diff --git a/sys-kernel/pinephone-sources/files/0001-bootsplash.patch b/sys-kernel/pinephone-sources/files/0001-bootsplash.patch deleted file mode 100644 index d5835e5..0000000 --- a/sys-kernel/pinephone-sources/files/0001-bootsplash.patch +++ /dev/null @@ -1,746 +0,0 @@ -diff --git a/MAINTAINERS b/MAINTAINERS -index a74227ad082e..b5633b56391e 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -2705,6 +2705,14 @@ S: Supported - F: drivers/net/bonding/ - F: include/uapi/linux/if_bonding.h - -+BOOTSPLASH -+M: Max Staudt -+L: linux-fbdev@vger.kernel.org -+S: Maintained -+F: drivers/video/fbdev/core/bootsplash*.* -+F: drivers/video/fbdev/core/dummycon.c -+F: include/linux/bootsplash.h -+ - BPF (Safe dynamic programs and tools) - M: Alexei Starovoitov - M: Daniel Borkmann -diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig -index 7f1f1fbcef9e..f3ff976266fe 100644 ---- a/drivers/video/console/Kconfig -+++ b/drivers/video/console/Kconfig -@@ -151,6 +151,30 @@ config FRAMEBUFFER_CONSOLE_ROTATION - such that other users of the framebuffer will remain normally - oriented. - -+config BOOTSPLASH -+ bool "Bootup splash screen" -+ depends on FRAMEBUFFER_CONSOLE -+ help -+ This option enables the Linux bootsplash screen. -+ -+ The bootsplash is a full-screen logo or animation indicating a -+ booting system. It replaces the classic scrolling text with a -+ graphical alternative, similar to other systems. -+ -+ Since this is technically implemented as a hook on top of fbcon, -+ it can only work if the FRAMEBUFFER_CONSOLE is enabled and a -+ framebuffer driver is active. Thus, to get a text-free boot, -+ the system needs to boot with vesafb, efifb, or similar. -+ -+ Once built into the kernel, the bootsplash needs to be enabled -+ with bootsplash.enabled=1 and a splash file needs to be supplied. -+ -+ Further documentation can be found in: -+ Documentation/fb/bootsplash.txt -+ -+ If unsure, say N. -+ This is typically used by distributors and system integrators. -+ - config STI_CONSOLE - bool "STI text console" - depends on PARISC -diff --git a/drivers/video/fbdev/core/Makefile b/drivers/video/fbdev/core/Makefile -index 73493bbd7a15..66895321928e 100644 ---- a/drivers/video/fbdev/core/Makefile -+++ b/drivers/video/fbdev/core/Makefile -@@ -29,3 +29,6 @@ obj-$(CONFIG_FB_SYS_IMAGEBLIT) += sysimgblt.o - obj-$(CONFIG_FB_SYS_FOPS) += fb_sys_fops.o - obj-$(CONFIG_FB_SVGALIB) += svgalib.o - obj-$(CONFIG_FB_DDC) += fb_ddc.o -+ -+obj-$(CONFIG_BOOTSPLASH) += bootsplash.o bootsplash_render.o \ -+ dummyblit.o -diff --git a/drivers/video/fbdev/core/bootsplash.c b/drivers/video/fbdev/core/bootsplash.c -new file mode 100644 -index 000000000000..e449755af268 ---- /dev/null -+++ b/drivers/video/fbdev/core/bootsplash.c -@@ -0,0 +1,294 @@ -+/* -+ * Kernel based bootsplash. -+ * -+ * (Main file: Glue code, workers, timer, PM, kernel and userland API) -+ * -+ * Authors: -+ * Max Staudt -+ * -+ * SPDX-License-Identifier: GPL-2.0 -+ */ -+ -+#define pr_fmt(fmt) "bootsplash: " fmt -+ -+ -+#include -+#include -+#include -+#include /* dev_warn() */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include /* console_blanked */ -+#include -+#include -+#include -+#include -+#include -+ -+#include "bootsplash_internal.h" -+ -+ -+/* -+ * We only have one splash screen, so let's keep a single -+ * instance of the internal state. -+ */ -+static struct splash_priv splash_state; -+ -+ -+static void splash_callback_redraw_vc(struct work_struct *ignored) -+{ -+ if (console_blanked) -+ return; -+ -+ console_lock(); -+ if (vc_cons[fg_console].d) -+ update_screen(vc_cons[fg_console].d); -+ console_unlock(); -+} -+ -+ -+static bool is_fb_compatible(const struct fb_info *info) -+{ -+ if (!(info->flags & FBINFO_BE_MATH) -+ != !fb_be_math((struct fb_info *)info)) { -+ dev_warn(info->device, -+ "Can't draw on foreign endianness framebuffer.\n"); -+ -+ return false; -+ } -+ -+ if (info->flags & FBINFO_MISC_TILEBLITTING) { -+ dev_warn(info->device, -+ "Can't draw splash on tiling framebuffer.\n"); -+ -+ return false; -+ } -+ -+ if (info->fix.type != FB_TYPE_PACKED_PIXELS -+ || (info->fix.visual != FB_VISUAL_TRUECOLOR -+ && info->fix.visual != FB_VISUAL_DIRECTCOLOR)) { -+ dev_warn(info->device, -+ "Can't draw splash on non-packed or non-truecolor framebuffer.\n"); -+ -+ dev_warn(info->device, -+ " type: %u visual: %u\n", -+ info->fix.type, info->fix.visual); -+ -+ return false; -+ } -+ -+ if (info->var.bits_per_pixel != 16 -+ && info->var.bits_per_pixel != 24 -+ && info->var.bits_per_pixel != 32) { -+ dev_warn(info->device, -+ "We only support drawing on framebuffers with 16, 24, or 32 bpp, not %d.\n", -+ info->var.bits_per_pixel); -+ -+ return false; -+ } -+ -+ return true; -+} -+ -+ -+/* -+ * Called by fbcon_switch() when an instance is activated or refreshed. -+ */ -+void bootsplash_render_full(struct fb_info *info) -+{ -+ if (!is_fb_compatible(info)) -+ return; -+ -+ bootsplash_do_render_background(info); -+} -+ -+ -+/* -+ * External status enquiry and on/off switch -+ */ -+bool bootsplash_would_render_now(void) -+{ -+ return !oops_in_progress -+ && !console_blanked -+ && bootsplash_is_enabled(); -+} -+ -+bool bootsplash_is_enabled(void) -+{ -+ bool was_enabled; -+ -+ /* Make sure we have the newest state */ -+ smp_rmb(); -+ -+ was_enabled = test_bit(0, &splash_state.enabled); -+ -+ return was_enabled; -+} -+ -+void bootsplash_disable(void) -+{ -+ int was_enabled; -+ -+ was_enabled = test_and_clear_bit(0, &splash_state.enabled); -+ -+ if (was_enabled) { -+ if (oops_in_progress) { -+ /* Redraw screen now so we can see a panic */ -+ if (vc_cons[fg_console].d) -+ update_screen(vc_cons[fg_console].d); -+ } else { -+ /* No urgency, redraw at next opportunity */ -+ schedule_work(&splash_state.work_redraw_vc); -+ } -+ } -+} -+ -+void bootsplash_enable(void) -+{ -+ bool was_enabled; -+ -+ if (oops_in_progress) -+ return; -+ -+ was_enabled = test_and_set_bit(0, &splash_state.enabled); -+ -+ if (!was_enabled) -+ schedule_work(&splash_state.work_redraw_vc); -+} -+ -+ -+/* -+ * Userland API via platform device in sysfs -+ */ -+static ssize_t splash_show_enabled(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ return sprintf(buf, "%d\n", bootsplash_is_enabled()); -+} -+ -+static ssize_t splash_store_enabled(struct device *device, -+ struct device_attribute *attr, -+ const char *buf, size_t count) -+{ -+ bool enable; -+ int err; -+ -+ if (!buf || !count) -+ return -EFAULT; -+ -+ err = kstrtobool(buf, &enable); -+ if (err) -+ return err; -+ -+ if (enable) -+ bootsplash_enable(); -+ else -+ bootsplash_disable(); -+ -+ return count; -+} -+ -+static DEVICE_ATTR(enabled, 0644, splash_show_enabled, splash_store_enabled); -+ -+ -+static struct attribute *splash_dev_attrs[] = { -+ &dev_attr_enabled.attr, -+ NULL -+}; -+ -+ATTRIBUTE_GROUPS(splash_dev); -+ -+ -+ -+ -+/* -+ * Power management fixup via platform device -+ * -+ * When the system is woken from sleep or restored after hibernating, we -+ * cannot expect the screen contents to still be present in video RAM. -+ * Thus, we have to redraw the splash if we're currently active. -+ */ -+static int splash_resume(struct device *device) -+{ -+ if (bootsplash_would_render_now()) -+ schedule_work(&splash_state.work_redraw_vc); -+ -+ return 0; -+} -+ -+static int splash_suspend(struct device *device) -+{ -+ cancel_work_sync(&splash_state.work_redraw_vc); -+ -+ return 0; -+} -+ -+ -+static const struct dev_pm_ops splash_pm_ops = { -+ .thaw = splash_resume, -+ .restore = splash_resume, -+ .resume = splash_resume, -+ .suspend = splash_suspend, -+ .freeze = splash_suspend, -+}; -+ -+static struct platform_driver splash_driver = { -+ .driver = { -+ .name = "bootsplash", -+ .pm = &splash_pm_ops, -+ }, -+}; -+ -+ -+/* -+ * Main init -+ */ -+void bootsplash_init(void) -+{ -+ int ret; -+ -+ /* Initialized already? */ -+ if (splash_state.splash_device) -+ return; -+ -+ -+ /* Register platform device to export user API */ -+ ret = platform_driver_register(&splash_driver); -+ if (ret) { -+ pr_err("platform_driver_register() failed: %d\n", ret); -+ goto err; -+ } -+ -+ splash_state.splash_device -+ = platform_device_alloc("bootsplash", 0); -+ -+ if (!splash_state.splash_device) -+ goto err_driver; -+ -+ splash_state.splash_device->dev.groups = splash_dev_groups; -+ -+ ret = platform_device_add(splash_state.splash_device); -+ if (ret) { -+ pr_err("platform_device_add() failed: %d\n", ret); -+ goto err_device; -+ } -+ -+ -+ INIT_WORK(&splash_state.work_redraw_vc, splash_callback_redraw_vc); -+ -+ return; -+ -+err_device: -+ platform_device_put(splash_state.splash_device); -+ splash_state.splash_device = NULL; -+err_driver: -+ platform_driver_unregister(&splash_driver); -+err: -+ pr_err("Failed to initialize.\n"); -+} -diff --git a/drivers/video/fbdev/core/bootsplash_internal.h b/drivers/video/fbdev/core/bootsplash_internal.h -new file mode 100644 -index 000000000000..b11da5cb90bf ---- /dev/null -+++ b/drivers/video/fbdev/core/bootsplash_internal.h -@@ -0,0 +1,55 @@ -+/* -+ * Kernel based bootsplash. -+ * -+ * (Internal data structures used at runtime) -+ * -+ * Authors: -+ * Max Staudt -+ * -+ * SPDX-License-Identifier: GPL-2.0 -+ */ -+ -+#ifndef __BOOTSPLASH_INTERNAL_H -+#define __BOOTSPLASH_INTERNAL_H -+ -+ -+#include -+#include -+#include -+#include -+#include -+ -+ -+/* -+ * Runtime types -+ */ -+struct splash_priv { -+ /* -+ * Enabled/disabled state, to be used with atomic bit operations. -+ * Bit 0: 0 = Splash hidden -+ * 1 = Splash shown -+ * -+ * Note: fbcon.c uses this twice, by calling -+ * bootsplash_would_render_now() in set_blitting_type() and -+ * in fbcon_switch(). -+ * This is racy, but eventually consistent: Turning the -+ * splash on/off will cause a redraw, which calls -+ * fbcon_switch(), which calls set_blitting_type(). -+ * So the last on/off toggle will make things consistent. -+ */ -+ unsigned long enabled; -+ -+ /* Our gateway to userland via sysfs */ -+ struct platform_device *splash_device; -+ -+ struct work_struct work_redraw_vc; -+}; -+ -+ -+ -+/* -+ * Rendering functions -+ */ -+void bootsplash_do_render_background(struct fb_info *info); -+ -+#endif -diff --git a/drivers/video/fbdev/core/bootsplash_render.c b/drivers/video/fbdev/core/bootsplash_render.c -new file mode 100644 -index 000000000000..4d7e0117f653 ---- /dev/null -+++ b/drivers/video/fbdev/core/bootsplash_render.c -@@ -0,0 +1,93 @@ -+/* -+ * Kernel based bootsplash. -+ * -+ * (Rendering functions) -+ * -+ * Authors: -+ * Max Staudt -+ * -+ * SPDX-License-Identifier: GPL-2.0 -+ */ -+ -+#define pr_fmt(fmt) "bootsplash: " fmt -+ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "bootsplash_internal.h" -+ -+ -+ -+ -+/* -+ * Rendering: Internal drawing routines -+ */ -+ -+ -+/* -+ * Pack pixel into target format and do Big/Little Endian handling. -+ * This would be a good place to handle endianness conversion if necessary. -+ */ -+static inline u32 pack_pixel(const struct fb_var_screeninfo *dst_var, -+ u8 red, u8 green, u8 blue) -+{ -+ u32 dstpix; -+ -+ /* Quantize pixel */ -+ red = red >> (8 - dst_var->red.length); -+ green = green >> (8 - dst_var->green.length); -+ blue = blue >> (8 - dst_var->blue.length); -+ -+ /* Pack pixel */ -+ dstpix = red << (dst_var->red.offset) -+ | green << (dst_var->green.offset) -+ | blue << (dst_var->blue.offset); -+ -+ /* -+ * Move packed pixel to the beginning of the memory cell, -+ * so we can memcpy() it out easily -+ */ -+#ifdef __BIG_ENDIAN -+ switch (dst_var->bits_per_pixel) { -+ case 16: -+ dstpix <<= 16; -+ break; -+ case 24: -+ dstpix <<= 8; -+ break; -+ case 32: -+ break; -+ } -+#else -+ /* This is intrinsically unnecessary on Little Endian */ -+#endif -+ -+ return dstpix; -+} -+ -+ -+void bootsplash_do_render_background(struct fb_info *info) -+{ -+ unsigned int x, y; -+ u32 dstpix; -+ u32 dst_octpp = info->var.bits_per_pixel / 8; -+ -+ dstpix = pack_pixel(&info->var, -+ 0, -+ 0, -+ 0); -+ -+ for (y = 0; y < info->var.yres_virtual; y++) { -+ u8 *dstline = info->screen_buffer + (y * info->fix.line_length); -+ -+ for (x = 0; x < info->var.xres_virtual; x++) { -+ memcpy(dstline, &dstpix, dst_octpp); -+ -+ dstline += dst_octpp; -+ } -+ } -+} -diff --git a/drivers/video/fbdev/core/dummyblit.c b/drivers/video/fbdev/core/dummyblit.c -new file mode 100644 -index 000000000000..8c22ff92ce24 ---- /dev/null -+++ b/drivers/video/fbdev/core/dummyblit.c -@@ -0,0 +1,89 @@ -+/* -+ * linux/drivers/video/fbdev/core/dummyblit.c -- Dummy Blitting Operation -+ * -+ * Authors: -+ * Max Staudt -+ * -+ * These functions are used in place of blitblit/tileblit to suppress -+ * fbcon's text output while a splash is shown. -+ * -+ * Only suppressing actual rendering keeps the text buffer in the VC layer -+ * intact and makes it easy to switch back from the bootsplash to a full -+ * text console with a simple redraw (with the original functions in place). -+ * -+ * Based on linux/drivers/video/fbdev/core/bitblit.c -+ * and linux/drivers/video/fbdev/core/tileblit.c -+ * -+ * SPDX-License-Identifier: GPL-2.0 -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include "fbcon.h" -+ -+static void dummy_bmove(struct vc_data *vc, struct fb_info *info, int sy, -+ int sx, int dy, int dx, int height, int width) -+{ -+ ; -+} -+ -+static void dummy_clear(struct vc_data *vc, struct fb_info *info, int sy, -+ int sx, int height, int width) -+{ -+ ; -+} -+ -+static void dummy_putcs(struct vc_data *vc, struct fb_info *info, -+ const unsigned short *s, int count, int yy, int xx, -+ int fg, int bg) -+{ -+ ; -+} -+ -+static void dummy_clear_margins(struct vc_data *vc, struct fb_info *info, -+ int color, int bottom_only) -+{ -+ ; -+} -+ -+static void dummy_cursor(struct vc_data *vc, struct fb_info *info, int mode, -+ int softback_lines, int fg, int bg) -+{ -+ ; -+} -+ -+static int dummy_update_start(struct fb_info *info) -+{ -+ /* -+ * Copied from bitblit.c and tileblit.c -+ * -+ * As of Linux 4.12, nobody seems to care about our return value. -+ */ -+ struct fbcon_ops *ops = info->fbcon_par; -+ int err; -+ -+ err = fb_pan_display(info, &ops->var); -+ ops->var.xoffset = info->var.xoffset; -+ ops->var.yoffset = info->var.yoffset; -+ ops->var.vmode = info->var.vmode; -+ return err; -+} -+ -+void fbcon_set_dummyops(struct fbcon_ops *ops) -+{ -+ ops->bmove = dummy_bmove; -+ ops->clear = dummy_clear; -+ ops->putcs = dummy_putcs; -+ ops->clear_margins = dummy_clear_margins; -+ ops->cursor = dummy_cursor; -+ ops->update_start = dummy_update_start; -+ ops->rotate_font = NULL; -+} -+EXPORT_SYMBOL_GPL(fbcon_set_dummyops); -+ -+MODULE_AUTHOR("Max Staudt "); -+MODULE_DESCRIPTION("Dummy Blitting Operation"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/video/fbdev/core/fbcon.c b/drivers/video/fbdev/core/fbcon.c -index 04612f938bab..9a39a6fcfe98 100644 ---- a/drivers/video/fbdev/core/fbcon.c -+++ b/drivers/video/fbdev/core/fbcon.c -@@ -80,6 +80,7 @@ - #include - - #include "fbcon.h" -+#include - - #ifdef FBCONDEBUG - # define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args) -@@ -542,6 +543,8 @@ static int do_fbcon_takeover(int show_logo) - for (i = first_fb_vc; i <= last_fb_vc; i++) - con2fb_map[i] = info_idx; - -+ bootsplash_init(); -+ - err = do_take_over_console(&fb_con, first_fb_vc, last_fb_vc, - fbcon_is_default); - -@@ -661,6 +664,9 @@ static void set_blitting_type(struct vc_data *vc, struct fb_info *info) - else { - fbcon_set_rotation(info); - fbcon_set_bitops(ops); -+ -+ if (bootsplash_would_render_now()) -+ fbcon_set_dummyops(ops); - } - } - -@@ -683,6 +689,19 @@ static void set_blitting_type(struct vc_data *vc, struct fb_info *info) - ops->p = &fb_display[vc->vc_num]; - fbcon_set_rotation(info); - fbcon_set_bitops(ops); -+ -+ /* -+ * Note: -+ * This is *eventually correct*. -+ * Setting the fbcon operations and drawing the splash happen at -+ * different points in time. If the splash is enabled/disabled -+ * in between, then bootsplash_{en,dis}able will schedule a -+ * redraw, which will again render the splash (or not) and set -+ * the correct fbcon ops. -+ * The last run will then be the right one. -+ */ -+ if (bootsplash_would_render_now()) -+ fbcon_set_dummyops(ops); - } - - static int fbcon_invalid_charcount(struct fb_info *info, unsigned charcount) -@@ -2184,6 +2203,9 @@ static int fbcon_switch(struct vc_data *vc) - info = registered_fb[con2fb_map[vc->vc_num]]; - ops = info->fbcon_par; - -+ if (bootsplash_would_render_now()) -+ bootsplash_render_full(info); -+ - if (softback_top) { - if (softback_lines) - fbcon_set_origin(vc); -diff --git a/drivers/video/fbdev/core/fbcon.h b/drivers/video/fbdev/core/fbcon.h -index 18f3ac144237..45f94347fe5e 100644 ---- a/drivers/video/fbdev/core/fbcon.h -+++ b/drivers/video/fbdev/core/fbcon.h -@@ -214,6 +214,11 @@ static inline int attr_col_ec(int shift, struct vc_data *vc, - #define SCROLL_REDRAW 0x004 - #define SCROLL_PAN_REDRAW 0x005 - -+#ifdef CONFIG_BOOTSPLASH -+extern void fbcon_set_dummyops(struct fbcon_ops *ops); -+#else /* CONFIG_BOOTSPLASH */ -+#define fbcon_set_dummyops(x) -+#endif /* CONFIG_BOOTSPLASH */ - #ifdef CONFIG_FB_TILEBLITTING - extern void fbcon_set_tileops(struct vc_data *vc, struct fb_info *info); - #endif -diff --git a/include/linux/bootsplash.h b/include/linux/bootsplash.h -new file mode 100644 -index 000000000000..c6dd0b43180d ---- /dev/null -+++ b/include/linux/bootsplash.h -@@ -0,0 +1,43 @@ -+/* -+ * Kernel based bootsplash. -+ * -+ * Authors: -+ * Max Staudt -+ * -+ * SPDX-License-Identifier: GPL-2.0 -+ */ -+ -+#ifndef __LINUX_BOOTSPLASH_H -+#define __LINUX_BOOTSPLASH_H -+ -+#include -+ -+ -+#ifdef CONFIG_BOOTSPLASH -+ -+extern void bootsplash_render_full(struct fb_info *info); -+ -+extern bool bootsplash_would_render_now(void); -+ -+extern bool bootsplash_is_enabled(void); -+extern void bootsplash_disable(void); -+extern void bootsplash_enable(void); -+ -+extern void bootsplash_init(void); -+ -+#else /* CONFIG_BOOTSPLASH */ -+ -+#define bootsplash_render_full(x) -+ -+#define bootsplash_would_render_now() (false) -+ -+#define bootsplash_is_enabled() (false) -+#define bootsplash_disable() -+#define bootsplash_enable() -+ -+#define bootsplash_init() -+ -+#endif /* CONFIG_BOOTSPLASH */ -+ -+ -+#endif diff --git a/sys-kernel/pinephone-sources/files/0001-revert-fbcon-remove-now-unusued-softback_lines-cursor-argument.patch b/sys-kernel/pinephone-sources/files/0001-revert-fbcon-remove-now-unusued-softback_lines-cursor-argument.patch deleted file mode 100644 index e7d4da5..0000000 --- a/sys-kernel/pinephone-sources/files/0001-revert-fbcon-remove-now-unusued-softback_lines-cursor-argument.patch +++ /dev/null @@ -1,150 +0,0 @@ ---- b/drivers/video/fbdev/core/bitblit.c -+++ a/drivers/video/fbdev/core/bitblit.c -@@ -234,7 +234,7 @@ - } - - static void bit_cursor(struct vc_data *vc, struct fb_info *info, int mode, -+ int softback_lines, int fg, int bg) -- int fg, int bg) - { - struct fb_cursor cursor; - struct fbcon_ops *ops = info->fbcon_par; -@@ -247,6 +247,15 @@ - - cursor.set = 0; - -+ if (softback_lines) { -+ if (y + softback_lines >= vc->vc_rows) { -+ mode = CM_ERASE; -+ ops->cursor_flash = 0; -+ return; -+ } else -+ y += softback_lines; -+ } -+ - c = scr_readw((u16 *) vc->vc_pos); - attribute = get_attribute(info, c); - src = vc->vc_font.data + ((c & charmask) * (w * vc->vc_font.height)); ---- b/drivers/video/fbdev/core/fbcon.c -+++ a/drivers/video/fbdev/core/fbcon.c -@@ -394,7 +394,7 @@ - c = scr_readw((u16 *) vc->vc_pos); - mode = (!ops->cursor_flash || ops->cursor_state.enable) ? - CM_ERASE : CM_DRAW; -+ ops->cursor(vc, info, mode, 0, get_color(vc, info, c, 1), -- ops->cursor(vc, info, mode, get_color(vc, info, c, 1), - get_color(vc, info, c, 0)); - console_unlock(); - } -@@ -1345,7 +1345,7 @@ - - ops->cursor_flash = (mode == CM_ERASE) ? 0 : 1; - -+ ops->cursor(vc, info, mode, 0, get_color(vc, info, c, 1), -- ops->cursor(vc, info, mode, get_color(vc, info, c, 1), - get_color(vc, info, c, 0)); - } - ---- b/drivers/video/fbdev/core/fbcon.h -+++ a/drivers/video/fbdev/core/fbcon.h -@@ -62,7 +62,7 @@ - void (*clear_margins)(struct vc_data *vc, struct fb_info *info, - int color, int bottom_only); - void (*cursor)(struct vc_data *vc, struct fb_info *info, int mode, -+ int softback_lines, int fg, int bg); -- int fg, int bg); - int (*update_start)(struct fb_info *info); - int (*rotate_font)(struct fb_info *info, struct vc_data *vc); - struct fb_var_screeninfo var; /* copy of the current fb_var_screeninfo */ ---- b/drivers/video/fbdev/core/fbcon_ccw.c -+++ a/drivers/video/fbdev/core/fbcon_ccw.c -@@ -219,7 +219,7 @@ - } - - static void ccw_cursor(struct vc_data *vc, struct fb_info *info, int mode, -+ int softback_lines, int fg, int bg) -- int fg, int bg) - { - struct fb_cursor cursor; - struct fbcon_ops *ops = info->fbcon_par; -@@ -236,6 +236,15 @@ - - cursor.set = 0; - -+ if (softback_lines) { -+ if (y + softback_lines >= vc->vc_rows) { -+ mode = CM_ERASE; -+ ops->cursor_flash = 0; -+ return; -+ } else -+ y += softback_lines; -+ } -+ - c = scr_readw((u16 *) vc->vc_pos); - attribute = get_attribute(info, c); - src = ops->fontbuffer + ((c & charmask) * (w * vc->vc_font.width)); ---- b/drivers/video/fbdev/core/fbcon_cw.c -+++ a/drivers/video/fbdev/core/fbcon_cw.c -@@ -202,7 +202,7 @@ - } - - static void cw_cursor(struct vc_data *vc, struct fb_info *info, int mode, -+ int softback_lines, int fg, int bg) -- int fg, int bg) - { - struct fb_cursor cursor; - struct fbcon_ops *ops = info->fbcon_par; -@@ -219,6 +219,15 @@ - - cursor.set = 0; - -+ if (softback_lines) { -+ if (y + softback_lines >= vc->vc_rows) { -+ mode = CM_ERASE; -+ ops->cursor_flash = 0; -+ return; -+ } else -+ y += softback_lines; -+ } -+ - c = scr_readw((u16 *) vc->vc_pos); - attribute = get_attribute(info, c); - src = ops->fontbuffer + ((c & charmask) * (w * vc->vc_font.width)); ---- b/drivers/video/fbdev/core/fbcon_ud.c -+++ a/drivers/video/fbdev/core/fbcon_ud.c -@@ -249,7 +249,7 @@ - } - - static void ud_cursor(struct vc_data *vc, struct fb_info *info, int mode, -+ int softback_lines, int fg, int bg) -- int fg, int bg) - { - struct fb_cursor cursor; - struct fbcon_ops *ops = info->fbcon_par; -@@ -267,6 +267,15 @@ - - cursor.set = 0; - -+ if (softback_lines) { -+ if (y + softback_lines >= vc->vc_rows) { -+ mode = CM_ERASE; -+ ops->cursor_flash = 0; -+ return; -+ } else -+ y += softback_lines; -+ } -+ - c = scr_readw((u16 *) vc->vc_pos); - attribute = get_attribute(info, c); - src = ops->fontbuffer + ((c & charmask) * (w * vc->vc_font.height)); ---- b/drivers/video/fbdev/core/tileblit.c -+++ a/drivers/video/fbdev/core/tileblit.c -@@ -80,7 +80,7 @@ - } - - static void tile_cursor(struct vc_data *vc, struct fb_info *info, int mode, -+ int softback_lines, int fg, int bg) -- int fg, int bg) - { - struct fb_tilecursor cursor; - int use_sw = (vc->vc_cursor_type & 0x10); diff --git a/sys-kernel/pinephone-sources/files/0002-Bluetooth-Fix-LL-PRivacy-BLE-device-fails-to-connect.patch b/sys-kernel/pinephone-sources/files/0002-Bluetooth-Fix-LL-PRivacy-BLE-device-fails-to-connect.patch deleted file mode 100644 index 8707046..0000000 --- a/sys-kernel/pinephone-sources/files/0002-Bluetooth-Fix-LL-PRivacy-BLE-device-fails-to-connect.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 27061f0b322a585c30db111719f89c23c15a88b4 Mon Sep 17 00:00:00 2001 -From: Sathish Narasimman -Date: Thu, 29 Oct 2020 13:18:21 +0530 -Subject: Bluetooth: Fix: LL PRivacy BLE device fails to connect - -When adding device to white list the device is added to resolving list -also. It has to be added only when HCI_ENABLE_LL_PRIVACY flag is set. -HCI_ENABLE_LL_PRIVACY flag has to be tested before adding/deleting devices -to resolving list. use_ll_privacy macro is used only to check if controller -supports LL_Privacy. - -https://bugzilla.kernel.org/show_bug.cgi?id=209745 - -Fixes: 0eee35bdfa3b ("Bluetooth: Update resolving list when updating whitelist") -Signed-off-by: Sathish Narasimman -Signed-off-by: Marcel Holtmann ---- - net/bluetooth/hci_request.c | 12 ++++++++---- - 1 file changed, 8 insertions(+), 4 deletions(-) - -diff --git a/net/bluetooth/hci_request.c b/net/bluetooth/hci_request.c -index e0269192f2e5..a565c91b8599 100644 ---- a/net/bluetooth/hci_request.c -+++ b/net/bluetooth/hci_request.c -@@ -698,7 +698,8 @@ static void del_from_white_list(struct hci_request *req, bdaddr_t *bdaddr, - cp.bdaddr_type); - hci_req_add(req, HCI_OP_LE_DEL_FROM_WHITE_LIST, sizeof(cp), &cp); - -- if (use_ll_privacy(req->hdev)) { -+ if (use_ll_privacy(req->hdev) && -+ hci_dev_test_flag(req->hdev, HCI_ENABLE_LL_PRIVACY)) { - struct smp_irk *irk; - - irk = hci_find_irk_by_addr(req->hdev, bdaddr, bdaddr_type); -@@ -732,7 +733,8 @@ static int add_to_white_list(struct hci_request *req, - return -1; - - /* White list can not be used with RPAs */ -- if (!allow_rpa && !use_ll_privacy(hdev) && -+ if (!allow_rpa && -+ !hci_dev_test_flag(hdev, HCI_ENABLE_LL_PRIVACY) && - hci_find_irk_by_addr(hdev, ¶ms->addr, params->addr_type)) { - return -1; - } -@@ -750,7 +752,8 @@ static int add_to_white_list(struct hci_request *req, - cp.bdaddr_type); - hci_req_add(req, HCI_OP_LE_ADD_TO_WHITE_LIST, sizeof(cp), &cp); - -- if (use_ll_privacy(hdev)) { -+ if (use_ll_privacy(hdev) && -+ hci_dev_test_flag(hdev, HCI_ENABLE_LL_PRIVACY)) { - struct smp_irk *irk; - - irk = hci_find_irk_by_addr(hdev, ¶ms->addr, -@@ -812,7 +815,8 @@ static u8 update_white_list(struct hci_request *req) - } - - /* White list can not be used with RPAs */ -- if (!allow_rpa && !use_ll_privacy(hdev) && -+ if (!allow_rpa && -+ !hci_dev_test_flag(hdev, HCI_ENABLE_LL_PRIVACY) && - hci_find_irk_by_addr(hdev, &b->bdaddr, b->bdaddr_type)) { - return 0x00; - } --- -cgit v1.2.3-1-gf6bb5 - diff --git a/sys-kernel/pinephone-sources/files/0002-bootsplash.patch b/sys-kernel/pinephone-sources/files/0002-bootsplash.patch deleted file mode 100644 index 92d62ca..0000000 --- a/sys-kernel/pinephone-sources/files/0002-bootsplash.patch +++ /dev/null @@ -1,669 +0,0 @@ -diff --git a/MAINTAINERS b/MAINTAINERS -index b5633b56391e..5c237445761e 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -2712,6 +2712,7 @@ S: Maintained - F: drivers/video/fbdev/core/bootsplash*.* - F: drivers/video/fbdev/core/dummycon.c - F: include/linux/bootsplash.h -+F: include/uapi/linux/bootsplash_file.h - - BPF (Safe dynamic programs and tools) - M: Alexei Starovoitov -diff --git a/drivers/video/fbdev/core/Makefile b/drivers/video/fbdev/core/Makefile -index 66895321928e..6a8d1bab8a01 100644 ---- a/drivers/video/fbdev/core/Makefile -+++ b/drivers/video/fbdev/core/Makefile -@@ -31,4 +31,4 @@ obj-$(CONFIG_FB_SVGALIB) += svgalib.o - obj-$(CONFIG_FB_DDC) += fb_ddc.o - - obj-$(CONFIG_BOOTSPLASH) += bootsplash.o bootsplash_render.o \ -- dummyblit.o -+ bootsplash_load.o dummyblit.o -diff --git a/drivers/video/fbdev/core/bootsplash.c b/drivers/video/fbdev/core/bootsplash.c -index e449755af268..843c5400fefc 100644 ---- a/drivers/video/fbdev/core/bootsplash.c -+++ b/drivers/video/fbdev/core/bootsplash.c -@@ -32,6 +32,7 @@ - #include - - #include "bootsplash_internal.h" -+#include "uapi/linux/bootsplash_file.h" - - - /* -@@ -102,10 +103,17 @@ static bool is_fb_compatible(const struct fb_info *info) - */ - void bootsplash_render_full(struct fb_info *info) - { -+ mutex_lock(&splash_state.data_lock); -+ - if (!is_fb_compatible(info)) -- return; -+ goto out; -+ -+ bootsplash_do_render_background(info, splash_state.file); -+ -+ bootsplash_do_render_pictures(info, splash_state.file); - -- bootsplash_do_render_background(info); -+out: -+ mutex_unlock(&splash_state.data_lock); - } - - -@@ -116,6 +124,7 @@ bool bootsplash_would_render_now(void) - { - return !oops_in_progress - && !console_blanked -+ && splash_state.file - && bootsplash_is_enabled(); - } - -@@ -252,6 +261,7 @@ static struct platform_driver splash_driver = { - void bootsplash_init(void) - { - int ret; -+ struct splash_file_priv *fp; - - /* Initialized already? */ - if (splash_state.splash_device) -@@ -280,8 +290,26 @@ void bootsplash_init(void) - } - - -+ mutex_init(&splash_state.data_lock); -+ set_bit(0, &splash_state.enabled); -+ - INIT_WORK(&splash_state.work_redraw_vc, splash_callback_redraw_vc); - -+ -+ if (!splash_state.bootfile || !strlen(splash_state.bootfile)) -+ return; -+ -+ fp = bootsplash_load_firmware(&splash_state.splash_device->dev, -+ splash_state.bootfile); -+ -+ if (!fp) -+ goto err; -+ -+ mutex_lock(&splash_state.data_lock); -+ splash_state.splash_fb = NULL; -+ splash_state.file = fp; -+ mutex_unlock(&splash_state.data_lock); -+ - return; - - err_device: -@@ -292,3 +320,7 @@ void bootsplash_init(void) - err: - pr_err("Failed to initialize.\n"); - } -+ -+ -+module_param_named(bootfile, splash_state.bootfile, charp, 0444); -+MODULE_PARM_DESC(bootfile, "Bootsplash file to load on boot"); -diff --git a/drivers/video/fbdev/core/bootsplash_internal.h b/drivers/video/fbdev/core/bootsplash_internal.h -index b11da5cb90bf..71e2a27ac0b8 100644 ---- a/drivers/video/fbdev/core/bootsplash_internal.h -+++ b/drivers/video/fbdev/core/bootsplash_internal.h -@@ -15,15 +15,43 @@ - - #include - #include -+#include - #include - #include - #include - -+#include "uapi/linux/bootsplash_file.h" -+ - - /* - * Runtime types - */ -+struct splash_blob_priv { -+ struct splash_blob_header *blob_header; -+ const void *data; -+}; -+ -+ -+struct splash_pic_priv { -+ const struct splash_pic_header *pic_header; -+ -+ struct splash_blob_priv *blobs; -+ u16 blobs_loaded; -+}; -+ -+ -+struct splash_file_priv { -+ const struct firmware *fw; -+ const struct splash_file_header *header; -+ -+ struct splash_pic_priv *pics; -+}; -+ -+ - struct splash_priv { -+ /* Bootup and runtime state */ -+ char *bootfile; -+ - /* - * Enabled/disabled state, to be used with atomic bit operations. - * Bit 0: 0 = Splash hidden -@@ -43,6 +71,13 @@ struct splash_priv { - struct platform_device *splash_device; - - struct work_struct work_redraw_vc; -+ -+ /* Splash data structures including lock for everything below */ -+ struct mutex data_lock; -+ -+ struct fb_info *splash_fb; -+ -+ struct splash_file_priv *file; - }; - - -@@ -50,6 +85,14 @@ struct splash_priv { - /* - * Rendering functions - */ --void bootsplash_do_render_background(struct fb_info *info); -+void bootsplash_do_render_background(struct fb_info *info, -+ const struct splash_file_priv *fp); -+void bootsplash_do_render_pictures(struct fb_info *info, -+ const struct splash_file_priv *fp); -+ -+ -+void bootsplash_free_file(struct splash_file_priv *fp); -+struct splash_file_priv *bootsplash_load_firmware(struct device *device, -+ const char *path); - - #endif -diff --git a/drivers/video/fbdev/core/bootsplash_load.c b/drivers/video/fbdev/core/bootsplash_load.c -new file mode 100644 -index 000000000000..fd807571ab7d ---- /dev/null -+++ b/drivers/video/fbdev/core/bootsplash_load.c -@@ -0,0 +1,225 @@ -+/* -+ * Kernel based bootsplash. -+ * -+ * (Loading and freeing functions) -+ * -+ * Authors: -+ * Max Staudt -+ * -+ * SPDX-License-Identifier: GPL-2.0 -+ */ -+ -+#define pr_fmt(fmt) "bootsplash: " fmt -+ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "bootsplash_internal.h" -+#include "uapi/linux/bootsplash_file.h" -+ -+ -+ -+ -+/* -+ * Free all vmalloc()'d resources describing a splash file. -+ */ -+void bootsplash_free_file(struct splash_file_priv *fp) -+{ -+ if (!fp) -+ return; -+ -+ if (fp->pics) { -+ unsigned int i; -+ -+ for (i = 0; i < fp->header->num_pics; i++) { -+ struct splash_pic_priv *pp = &fp->pics[i]; -+ -+ if (pp->blobs) -+ vfree(pp->blobs); -+ } -+ -+ vfree(fp->pics); -+ } -+ -+ release_firmware(fp->fw); -+ vfree(fp); -+} -+ -+ -+ -+ -+/* -+ * Load a splash screen from a "firmware" file. -+ * -+ * Parsing, and sanity checks. -+ */ -+#ifdef __BIG_ENDIAN -+ #define BOOTSPLASH_MAGIC BOOTSPLASH_MAGIC_BE -+#else -+ #define BOOTSPLASH_MAGIC BOOTSPLASH_MAGIC_LE -+#endif -+ -+struct splash_file_priv *bootsplash_load_firmware(struct device *device, -+ const char *path) -+{ -+ const struct firmware *fw; -+ struct splash_file_priv *fp; -+ unsigned int i; -+ const u8 *walker; -+ -+ if (request_firmware(&fw, path, device)) -+ return NULL; -+ -+ if (fw->size < sizeof(struct splash_file_header) -+ || memcmp(fw->data, BOOTSPLASH_MAGIC, sizeof(fp->header->id))) { -+ pr_err("Not a bootsplash file.\n"); -+ -+ release_firmware(fw); -+ return NULL; -+ } -+ -+ fp = vzalloc(sizeof(struct splash_file_priv)); -+ if (!fp) { -+ release_firmware(fw); -+ return NULL; -+ } -+ -+ pr_info("Loading splash file (%li bytes)\n", fw->size); -+ -+ fp->fw = fw; -+ fp->header = (struct splash_file_header *)fw->data; -+ -+ /* Sanity checks */ -+ if (fp->header->version != BOOTSPLASH_VERSION) { -+ pr_err("Loaded v%d file, but we only support version %d\n", -+ fp->header->version, -+ BOOTSPLASH_VERSION); -+ -+ goto err; -+ } -+ -+ if (fw->size < sizeof(struct splash_file_header) -+ + fp->header->num_pics -+ * sizeof(struct splash_pic_header) -+ + fp->header->num_blobs -+ * sizeof(struct splash_blob_header)) { -+ pr_err("File incomplete.\n"); -+ -+ goto err; -+ } -+ -+ /* Read picture headers */ -+ if (fp->header->num_pics) { -+ fp->pics = vzalloc(fp->header->num_pics -+ * sizeof(struct splash_pic_priv)); -+ if (!fp->pics) -+ goto err; -+ } -+ -+ walker = fw->data + sizeof(struct splash_file_header); -+ for (i = 0; i < fp->header->num_pics; i++) { -+ struct splash_pic_priv *pp = &fp->pics[i]; -+ struct splash_pic_header *ph = (void *)walker; -+ -+ pr_debug("Picture %u: Size %ux%u\n", i, ph->width, ph->height); -+ -+ if (ph->num_blobs < 1) { -+ pr_err("Picture %u: Zero blobs? Aborting load.\n", i); -+ goto err; -+ } -+ -+ pp->pic_header = ph; -+ pp->blobs = vzalloc(ph->num_blobs -+ * sizeof(struct splash_blob_priv)); -+ if (!pp->blobs) -+ goto err; -+ -+ walker += sizeof(struct splash_pic_header); -+ } -+ -+ /* Read blob headers */ -+ for (i = 0; i < fp->header->num_blobs; i++) { -+ struct splash_blob_header *bh = (void *)walker; -+ struct splash_pic_priv *pp; -+ -+ if (walker + sizeof(struct splash_blob_header) -+ > fw->data + fw->size) -+ goto err; -+ -+ walker += sizeof(struct splash_blob_header); -+ -+ if (walker + bh->length > fw->data + fw->size) -+ goto err; -+ -+ if (bh->picture_id >= fp->header->num_pics) -+ goto nextblob; -+ -+ pp = &fp->pics[bh->picture_id]; -+ -+ pr_debug("Blob %u, pic %u, blobs_loaded %u, num_blobs %u.\n", -+ i, bh->picture_id, -+ pp->blobs_loaded, pp->pic_header->num_blobs); -+ -+ if (pp->blobs_loaded >= pp->pic_header->num_blobs) -+ goto nextblob; -+ -+ switch (bh->type) { -+ case 0: -+ /* Raw 24-bit packed pixels */ -+ if (bh->length != pp->pic_header->width -+ * pp->pic_header->height * 3) { -+ pr_err("Blob %u, type 1: Length doesn't match picture.\n", -+ i); -+ -+ goto err; -+ } -+ break; -+ default: -+ pr_warn("Blob %u, unknown type %u.\n", i, bh->type); -+ goto nextblob; -+ } -+ -+ pp->blobs[pp->blobs_loaded].blob_header = bh; -+ pp->blobs[pp->blobs_loaded].data = walker; -+ pp->blobs_loaded++; -+ -+nextblob: -+ walker += bh->length; -+ if (bh->length % 16) -+ walker += 16 - (bh->length % 16); -+ } -+ -+ if (walker != fw->data + fw->size) -+ pr_warn("Trailing data in splash file.\n"); -+ -+ /* Walk over pictures and ensure all blob slots are filled */ -+ for (i = 0; i < fp->header->num_pics; i++) { -+ struct splash_pic_priv *pp = &fp->pics[i]; -+ -+ if (pp->blobs_loaded != pp->pic_header->num_blobs) { -+ pr_err("Picture %u doesn't have all blob slots filled.\n", -+ i); -+ -+ goto err; -+ } -+ } -+ -+ pr_info("Loaded (%ld bytes, %u pics, %u blobs).\n", -+ fw->size, -+ fp->header->num_pics, -+ fp->header->num_blobs); -+ -+ return fp; -+ -+ -+err: -+ bootsplash_free_file(fp); -+ return NULL; -+} -diff --git a/drivers/video/fbdev/core/bootsplash_render.c b/drivers/video/fbdev/core/bootsplash_render.c -index 4d7e0117f653..2ae36949d0e3 100644 ---- a/drivers/video/fbdev/core/bootsplash_render.c -+++ b/drivers/video/fbdev/core/bootsplash_render.c -@@ -19,6 +19,7 @@ - #include - - #include "bootsplash_internal.h" -+#include "uapi/linux/bootsplash_file.h" - - - -@@ -70,16 +71,69 @@ static inline u32 pack_pixel(const struct fb_var_screeninfo *dst_var, - } - - --void bootsplash_do_render_background(struct fb_info *info) -+/* -+ * Copy from source and blend into the destination picture. -+ * Currently assumes that the source picture is 24bpp. -+ * Currently assumes that the destination is <= 32bpp. -+ */ -+static int splash_convert_to_fb(u8 *dst, -+ const struct fb_var_screeninfo *dst_var, -+ unsigned int dst_stride, -+ unsigned int dst_xoff, -+ unsigned int dst_yoff, -+ const u8 *src, -+ unsigned int src_width, -+ unsigned int src_height) -+{ -+ unsigned int x, y; -+ unsigned int src_stride = 3 * src_width; /* Assume 24bpp packed */ -+ u32 dst_octpp = dst_var->bits_per_pixel / 8; -+ -+ dst_xoff += dst_var->xoffset; -+ dst_yoff += dst_var->yoffset; -+ -+ /* Copy with stride and pixel size adjustment */ -+ for (y = 0; -+ y < src_height && y + dst_yoff < dst_var->yres_virtual; -+ y++) { -+ const u8 *srcline = src + (y * src_stride); -+ u8 *dstline = dst + ((y + dst_yoff) * dst_stride) -+ + (dst_xoff * dst_octpp); -+ -+ for (x = 0; -+ x < src_width && x + dst_xoff < dst_var->xres_virtual; -+ x++) { -+ u8 red, green, blue; -+ u32 dstpix; -+ -+ /* Read pixel */ -+ red = *srcline++; -+ green = *srcline++; -+ blue = *srcline++; -+ -+ /* Write pixel */ -+ dstpix = pack_pixel(dst_var, red, green, blue); -+ memcpy(dstline, &dstpix, dst_octpp); -+ -+ dstline += dst_octpp; -+ } -+ } -+ -+ return 0; -+} -+ -+ -+void bootsplash_do_render_background(struct fb_info *info, -+ const struct splash_file_priv *fp) - { - unsigned int x, y; - u32 dstpix; - u32 dst_octpp = info->var.bits_per_pixel / 8; - - dstpix = pack_pixel(&info->var, -- 0, -- 0, -- 0); -+ fp->header->bg_red, -+ fp->header->bg_green, -+ fp->header->bg_blue); - - for (y = 0; y < info->var.yres_virtual; y++) { - u8 *dstline = info->screen_buffer + (y * info->fix.line_length); -@@ -91,3 +145,44 @@ void bootsplash_do_render_background(struct fb_info *info) - } - } - } -+ -+ -+void bootsplash_do_render_pictures(struct fb_info *info, -+ const struct splash_file_priv *fp) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < fp->header->num_pics; i++) { -+ struct splash_blob_priv *bp; -+ struct splash_pic_priv *pp = &fp->pics[i]; -+ long dst_xoff, dst_yoff; -+ -+ if (pp->blobs_loaded < 1) -+ continue; -+ -+ bp = &pp->blobs[0]; -+ -+ if (!bp || bp->blob_header->type != 0) -+ continue; -+ -+ dst_xoff = (info->var.xres - pp->pic_header->width) / 2; -+ dst_yoff = (info->var.yres - pp->pic_header->height) / 2; -+ -+ if (dst_xoff < 0 -+ || dst_yoff < 0 -+ || dst_xoff + pp->pic_header->width > info->var.xres -+ || dst_yoff + pp->pic_header->height > info->var.yres) { -+ pr_info_once("Picture %u is out of bounds at current resolution: %dx%d\n" -+ "(this will only be printed once every reboot)\n", -+ i, info->var.xres, info->var.yres); -+ -+ continue; -+ } -+ -+ /* Draw next splash frame */ -+ splash_convert_to_fb(info->screen_buffer, &info->var, -+ info->fix.line_length, dst_xoff, dst_yoff, -+ bp->data, -+ pp->pic_header->width, pp->pic_header->height); -+ } -+} -diff --git a/include/uapi/linux/bootsplash_file.h b/include/uapi/linux/bootsplash_file.h -new file mode 100644 -index 000000000000..89dc9cca8f0c ---- /dev/null -+++ b/include/uapi/linux/bootsplash_file.h -@@ -0,0 +1,118 @@ -+/* -+ * Kernel based bootsplash. -+ * -+ * (File format) -+ * -+ * Authors: -+ * Max Staudt -+ * -+ * SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note -+ */ -+ -+#ifndef __BOOTSPLASH_FILE_H -+#define __BOOTSPLASH_FILE_H -+ -+ -+#define BOOTSPLASH_VERSION 55561 -+ -+ -+#include -+#include -+ -+ -+/* -+ * On-disk types -+ * -+ * A splash file consists of: -+ * - One single 'struct splash_file_header' -+ * - An array of 'struct splash_pic_header' -+ * - An array of raw data blocks, each padded to 16 bytes and -+ * preceded by a 'struct splash_blob_header' -+ * -+ * A single-frame splash may look like this: -+ * -+ * +--------------------+ -+ * | | -+ * | splash_file_header | -+ * | -> num_blobs = 1 | -+ * | -> num_pics = 1 | -+ * | | -+ * +--------------------+ -+ * | | -+ * | splash_pic_header | -+ * | | -+ * +--------------------+ -+ * | | -+ * | splash_blob_header | -+ * | -> type = 0 | -+ * | -> picture_id = 0 | -+ * | | -+ * | (raw RGB data) | -+ * | (pad to 16 bytes) | -+ * | | -+ * +--------------------+ -+ * -+ * All multi-byte values are stored on disk in the native format -+ * expected by the system the file will be used on. -+ */ -+#define BOOTSPLASH_MAGIC_BE "Linux bootsplash" -+#define BOOTSPLASH_MAGIC_LE "hsalpstoob xuniL" -+ -+struct splash_file_header { -+ uint8_t id[16]; /* "Linux bootsplash" (no trailing NUL) */ -+ -+ /* Splash file format version to avoid clashes */ -+ uint16_t version; -+ -+ /* The background color */ -+ uint8_t bg_red; -+ uint8_t bg_green; -+ uint8_t bg_blue; -+ uint8_t bg_reserved; -+ -+ /* -+ * Number of pic/blobs so we can allocate memory for internal -+ * structures ahead of time when reading the file -+ */ -+ uint16_t num_blobs; -+ uint8_t num_pics; -+ -+ uint8_t padding[103]; -+} __attribute__((__packed__)); -+ -+ -+struct splash_pic_header { -+ uint16_t width; -+ uint16_t height; -+ -+ /* -+ * Number of data packages associated with this picture. -+ * Currently, the only use for more than 1 is for animations. -+ */ -+ uint8_t num_blobs; -+ -+ uint8_t padding[27]; -+} __attribute__((__packed__)); -+ -+ -+struct splash_blob_header { -+ /* Length of the data block in bytes. */ -+ uint32_t length; -+ -+ /* -+ * Type of the contents. -+ * 0 - Raw RGB data. -+ */ -+ uint16_t type; -+ -+ /* -+ * Picture this blob is associated with. -+ * Blobs will be added to a picture in the order they are -+ * found in the file. -+ */ -+ uint8_t picture_id; -+ -+ uint8_t padding[9]; -+} __attribute__((__packed__)); -+ -+#endif diff --git a/sys-kernel/pinephone-sources/files/0002-revert-fbcon-remove-no-op-fbcon_set_origin.patch b/sys-kernel/pinephone-sources/files/0002-revert-fbcon-remove-no-op-fbcon_set_origin.patch deleted file mode 100644 index 6491c54..0000000 --- a/sys-kernel/pinephone-sources/files/0002-revert-fbcon-remove-no-op-fbcon_set_origin.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- b/drivers/video/fbdev/core/fbcon.c -+++ a/drivers/video/fbdev/core/fbcon.c -@@ -163,6 +163,8 @@ - - #define advance_row(p, delta) (unsigned short *)((unsigned long)(p) + (delta) * vc->vc_size_row) - -+static int fbcon_set_origin(struct vc_data *); -+ - static int fbcon_cursor_noblink; - - #define divides(a, b) ((!(a) || (b)%(a)) ? 0 : 1) -@@ -2633,6 +2635,11 @@ - } - } - -+static int fbcon_set_origin(struct vc_data *vc) -+{ -+ return 0; -+} -+ - void fbcon_suspended(struct fb_info *info) - { - struct vc_data *vc = NULL; -@@ -3103,6 +3110,7 @@ - .con_font_default = fbcon_set_def_font, - .con_font_copy = fbcon_copy_font, - .con_set_palette = fbcon_set_palette, -+ .con_set_origin = fbcon_set_origin, - .con_invert_region = fbcon_invert_region, - .con_screen_pos = fbcon_screen_pos, - .con_getxy = fbcon_getxy, diff --git a/sys-kernel/pinephone-sources/files/0002-revert-fbcon-remove-soft-scrollback-code.patch b/sys-kernel/pinephone-sources/files/0002-revert-fbcon-remove-soft-scrollback-code.patch deleted file mode 100644 index 6d15dfd..0000000 --- a/sys-kernel/pinephone-sources/files/0002-revert-fbcon-remove-soft-scrollback-code.patch +++ /dev/null @@ -1,497 +0,0 @@ ---- b/drivers/video/fbdev/core/fbcon.c -+++ a/drivers/video/fbdev/core/fbcon.c -@@ -122,6 +122,12 @@ - /* logo_shown is an index to vc_cons when >= 0; otherwise follows FBCON_LOGO - enums. */ - static int logo_shown = FBCON_LOGO_CANSHOW; -+/* Software scrollback */ -+static int fbcon_softback_size = 32768; -+static unsigned long softback_buf, softback_curr; -+static unsigned long softback_in; -+static unsigned long softback_top, softback_end; -+static int softback_lines; - /* console mappings */ - static int first_fb_vc; - static int last_fb_vc = MAX_NR_CONSOLES - 1; -@@ -161,6 +167,8 @@ - - static const struct consw fb_con; - -+#define CM_SOFTBACK (8) -+ - #define advance_row(p, delta) (unsigned short *)((unsigned long)(p) + (delta) * vc->vc_size_row) - - static int fbcon_set_origin(struct vc_data *); -@@ -365,6 +373,18 @@ - return color; - } - -+static void fbcon_update_softback(struct vc_data *vc) -+{ -+ int l = fbcon_softback_size / vc->vc_size_row; -+ -+ if (l > 5) -+ softback_end = softback_buf + l * vc->vc_size_row; -+ else -+ /* Smaller scrollback makes no sense, and 0 would screw -+ the operation totally */ -+ softback_top = 0; -+} -+ - static void fb_flashcursor(struct work_struct *work) - { - struct fb_info *info = container_of(work, struct fb_info, queue); -@@ -394,7 +414,7 @@ - c = scr_readw((u16 *) vc->vc_pos); - mode = (!ops->cursor_flash || ops->cursor_state.enable) ? - CM_ERASE : CM_DRAW; -+ ops->cursor(vc, info, mode, softback_lines, get_color(vc, info, c, 1), -- ops->cursor(vc, info, mode, 0, get_color(vc, info, c, 1), - get_color(vc, info, c, 0)); - console_unlock(); - } -@@ -451,7 +471,13 @@ - } - - if (!strncmp(options, "scrollback:", 11)) { -+ options += 11; -+ if (*options) { -+ fbcon_softback_size = simple_strtoul(options, &options, 0); -+ if (*options == 'k' || *options == 'K') { -+ fbcon_softback_size *= 1024; -+ } -+ } -- pr_warn("Ignoring scrollback size option\n"); - continue; - } - -@@ -996,6 +1022,31 @@ - - set_blitting_type(vc, info); - -+ if (info->fix.type != FB_TYPE_TEXT) { -+ if (fbcon_softback_size) { -+ if (!softback_buf) { -+ softback_buf = -+ (unsigned long) -+ kvmalloc(fbcon_softback_size, -+ GFP_KERNEL); -+ if (!softback_buf) { -+ fbcon_softback_size = 0; -+ softback_top = 0; -+ } -+ } -+ } else { -+ if (softback_buf) { -+ kvfree((void *) softback_buf); -+ softback_buf = 0; -+ softback_top = 0; -+ } -+ } -+ if (softback_buf) -+ softback_in = softback_top = softback_curr = -+ softback_buf; -+ softback_lines = 0; -+ } -+ - /* Setup default font */ - if (!p->fontdata && !vc->vc_font.data) { - if (!fontname[0] || !(font = find_font(fontname))) -@@ -1169,6 +1220,9 @@ - if (logo) - fbcon_prepare_logo(vc, info, cols, rows, new_cols, new_rows); - -+ if (vc == svc && softback_buf) -+ fbcon_update_softback(vc); -+ - if (ops->rotate_font && ops->rotate_font(info, vc)) { - ops->rotate = FB_ROTATE_UR; - set_blitting_type(vc, info); -@@ -1331,6 +1385,7 @@ - { - struct fb_info *info = registered_fb[con2fb_map[vc->vc_num]]; - struct fbcon_ops *ops = info->fbcon_par; -+ int y; - int c = scr_readw((u16 *) vc->vc_pos); - - ops->cur_blink_jiffies = msecs_to_jiffies(vc->vc_cur_blink_ms); -@@ -1344,8 +1399,16 @@ - fbcon_add_cursor_timer(info); - - ops->cursor_flash = (mode == CM_ERASE) ? 0 : 1; -+ if (mode & CM_SOFTBACK) { -+ mode &= ~CM_SOFTBACK; -+ y = softback_lines; -+ } else { -+ if (softback_lines) -+ fbcon_set_origin(vc); -+ y = 0; -+ } - -+ ops->cursor(vc, info, mode, y, get_color(vc, info, c, 1), -- ops->cursor(vc, info, mode, 0, get_color(vc, info, c, 1), - get_color(vc, info, c, 0)); - } - -@@ -1416,6 +1479,8 @@ - - if (con_is_visible(vc)) { - update_screen(vc); -+ if (softback_buf) -+ fbcon_update_softback(vc); - } - } - -@@ -1553,6 +1618,99 @@ - scrollback_current = 0; - } - -+static void fbcon_redraw_softback(struct vc_data *vc, struct fbcon_display *p, -+ long delta) -+{ -+ int count = vc->vc_rows; -+ unsigned short *d, *s; -+ unsigned long n; -+ int line = 0; -+ -+ d = (u16 *) softback_curr; -+ if (d == (u16 *) softback_in) -+ d = (u16 *) vc->vc_origin; -+ n = softback_curr + delta * vc->vc_size_row; -+ softback_lines -= delta; -+ if (delta < 0) { -+ if (softback_curr < softback_top && n < softback_buf) { -+ n += softback_end - softback_buf; -+ if (n < softback_top) { -+ softback_lines -= -+ (softback_top - n) / vc->vc_size_row; -+ n = softback_top; -+ } -+ } else if (softback_curr >= softback_top -+ && n < softback_top) { -+ softback_lines -= -+ (softback_top - n) / vc->vc_size_row; -+ n = softback_top; -+ } -+ } else { -+ if (softback_curr > softback_in && n >= softback_end) { -+ n += softback_buf - softback_end; -+ if (n > softback_in) { -+ n = softback_in; -+ softback_lines = 0; -+ } -+ } else if (softback_curr <= softback_in && n > softback_in) { -+ n = softback_in; -+ softback_lines = 0; -+ } -+ } -+ if (n == softback_curr) -+ return; -+ softback_curr = n; -+ s = (u16 *) softback_curr; -+ if (s == (u16 *) softback_in) -+ s = (u16 *) vc->vc_origin; -+ while (count--) { -+ unsigned short *start; -+ unsigned short *le; -+ unsigned short c; -+ int x = 0; -+ unsigned short attr = 1; -+ -+ start = s; -+ le = advance_row(s, 1); -+ do { -+ c = scr_readw(s); -+ if (attr != (c & 0xff00)) { -+ attr = c & 0xff00; -+ if (s > start) { -+ fbcon_putcs(vc, start, s - start, -+ line, x); -+ x += s - start; -+ start = s; -+ } -+ } -+ if (c == scr_readw(d)) { -+ if (s > start) { -+ fbcon_putcs(vc, start, s - start, -+ line, x); -+ x += s - start + 1; -+ start = s + 1; -+ } else { -+ x++; -+ start++; -+ } -+ } -+ s++; -+ d++; -+ } while (s < le); -+ if (s > start) -+ fbcon_putcs(vc, start, s - start, line, x); -+ line++; -+ if (d == (u16 *) softback_end) -+ d = (u16 *) softback_buf; -+ if (d == (u16 *) softback_in) -+ d = (u16 *) vc->vc_origin; -+ if (s == (u16 *) softback_end) -+ s = (u16 *) softback_buf; -+ if (s == (u16 *) softback_in) -+ s = (u16 *) vc->vc_origin; -+ } -+} -+ - static void fbcon_redraw_move(struct vc_data *vc, struct fbcon_display *p, - int line, int count, int dy) - { -@@ -1692,6 +1850,31 @@ - } - } - -+static inline void fbcon_softback_note(struct vc_data *vc, int t, -+ int count) -+{ -+ unsigned short *p; -+ -+ if (vc->vc_num != fg_console) -+ return; -+ p = (unsigned short *) (vc->vc_origin + t * vc->vc_size_row); -+ -+ while (count) { -+ scr_memcpyw((u16 *) softback_in, p, vc->vc_size_row); -+ count--; -+ p = advance_row(p, 1); -+ softback_in += vc->vc_size_row; -+ if (softback_in == softback_end) -+ softback_in = softback_buf; -+ if (softback_in == softback_top) { -+ softback_top += vc->vc_size_row; -+ if (softback_top == softback_end) -+ softback_top = softback_buf; -+ } -+ } -+ softback_curr = softback_in; -+} -+ - static bool fbcon_scroll(struct vc_data *vc, unsigned int t, unsigned int b, - enum con_scroll dir, unsigned int count) - { -@@ -1714,6 +1897,8 @@ - case SM_UP: - if (count > vc->vc_rows) /* Maximum realistic size */ - count = vc->vc_rows; -+ if (softback_top) -+ fbcon_softback_note(vc, t, count); - if (logo_shown >= 0) - goto redraw_up; - switch (p->scrollmode) { -@@ -2084,6 +2269,14 @@ - info = registered_fb[con2fb_map[vc->vc_num]]; - ops = info->fbcon_par; - -+ if (softback_top) { -+ if (softback_lines) -+ fbcon_set_origin(vc); -+ softback_top = softback_curr = softback_in = softback_buf; -+ softback_lines = 0; -+ fbcon_update_softback(vc); -+ } -+ - if (logo_shown >= 0) { - struct vc_data *conp2 = vc_cons[logo_shown].d; - -@@ -2407,6 +2600,9 @@ - int cnt; - char *old_data = NULL; - -+ if (con_is_visible(vc) && softback_lines) -+ fbcon_set_origin(vc); -+ - resize = (w != vc->vc_font.width) || (h != vc->vc_font.height); - if (p->userfont) - old_data = vc->vc_font.data; -@@ -2432,6 +2628,8 @@ - cols /= w; - rows /= h; - vc_resize(vc, cols, rows); -+ if (con_is_visible(vc) && softback_buf) -+ fbcon_update_softback(vc); - } else if (con_is_visible(vc) - && vc->vc_mode == KD_TEXT) { - fbcon_clear_margins(vc, 0); -@@ -2590,7 +2788,19 @@ - - static u16 *fbcon_screen_pos(struct vc_data *vc, int offset) - { -+ unsigned long p; -+ int line; -+ -+ if (vc->vc_num != fg_console || !softback_lines) -+ return (u16 *) (vc->vc_origin + offset); -+ line = offset / vc->vc_size_row; -+ if (line >= softback_lines) -+ return (u16 *) (vc->vc_origin + offset - -+ softback_lines * vc->vc_size_row); -+ p = softback_curr + offset; -+ if (p >= softback_end) -+ p += softback_buf - softback_end; -+ return (u16 *) p; -- return (u16 *) (vc->vc_origin + offset); - } - - static unsigned long fbcon_getxy(struct vc_data *vc, unsigned long pos, -@@ -2604,7 +2814,22 @@ - - x = offset % vc->vc_cols; - y = offset / vc->vc_cols; -+ if (vc->vc_num == fg_console) -+ y += softback_lines; - ret = pos + (vc->vc_cols - x) * 2; -+ } else if (vc->vc_num == fg_console && softback_lines) { -+ unsigned long offset = pos - softback_curr; -+ -+ if (pos < softback_curr) -+ offset += softback_end - softback_buf; -+ offset /= 2; -+ x = offset % vc->vc_cols; -+ y = offset / vc->vc_cols; -+ ret = pos + (vc->vc_cols - x) * 2; -+ if (ret == softback_end) -+ ret = softback_buf; -+ if (ret == softback_in) -+ ret = vc->vc_origin; - } else { - /* Should not happen */ - x = y = 0; -@@ -2632,11 +2857,106 @@ - a = ((a) & 0x88ff) | (((a) & 0x7000) >> 4) | - (((a) & 0x0700) << 4); - scr_writew(a, p++); -+ if (p == (u16 *) softback_end) -+ p = (u16 *) softback_buf; -+ if (p == (u16 *) softback_in) -+ p = (u16 *) vc->vc_origin; -+ } -+} -+ -+static void fbcon_scrolldelta(struct vc_data *vc, int lines) -+{ -+ struct fb_info *info = registered_fb[con2fb_map[fg_console]]; -+ struct fbcon_ops *ops = info->fbcon_par; -+ struct fbcon_display *disp = &fb_display[fg_console]; -+ int offset, limit, scrollback_old; -+ -+ if (softback_top) { -+ if (vc->vc_num != fg_console) -+ return; -+ if (vc->vc_mode != KD_TEXT || !lines) -+ return; -+ if (logo_shown >= 0) { -+ struct vc_data *conp2 = vc_cons[logo_shown].d; -+ -+ if (conp2->vc_top == logo_lines -+ && conp2->vc_bottom == conp2->vc_rows) -+ conp2->vc_top = 0; -+ if (logo_shown == vc->vc_num) { -+ unsigned long p, q; -+ int i; -+ -+ p = softback_in; -+ q = vc->vc_origin + -+ logo_lines * vc->vc_size_row; -+ for (i = 0; i < logo_lines; i++) { -+ if (p == softback_top) -+ break; -+ if (p == softback_buf) -+ p = softback_end; -+ p -= vc->vc_size_row; -+ q -= vc->vc_size_row; -+ scr_memcpyw((u16 *) q, (u16 *) p, -+ vc->vc_size_row); -+ } -+ softback_in = softback_curr = p; -+ update_region(vc, vc->vc_origin, -+ logo_lines * vc->vc_cols); -+ } -+ logo_shown = FBCON_LOGO_CANSHOW; -+ } -+ fbcon_cursor(vc, CM_ERASE | CM_SOFTBACK); -+ fbcon_redraw_softback(vc, disp, lines); -+ fbcon_cursor(vc, CM_DRAW | CM_SOFTBACK); -+ return; - } -+ -+ if (!scrollback_phys_max) -+ return; -+ -+ scrollback_old = scrollback_current; -+ scrollback_current -= lines; -+ if (scrollback_current < 0) -+ scrollback_current = 0; -+ else if (scrollback_current > scrollback_max) -+ scrollback_current = scrollback_max; -+ if (scrollback_current == scrollback_old) -+ return; -+ -+ if (fbcon_is_inactive(vc, info)) -+ return; -+ -+ fbcon_cursor(vc, CM_ERASE); -+ -+ offset = disp->yscroll - scrollback_current; -+ limit = disp->vrows; -+ switch (disp->scrollmode) { -+ case SCROLL_WRAP_MOVE: -+ info->var.vmode |= FB_VMODE_YWRAP; -+ break; -+ case SCROLL_PAN_MOVE: -+ case SCROLL_PAN_REDRAW: -+ limit -= vc->vc_rows; -+ info->var.vmode &= ~FB_VMODE_YWRAP; -+ break; -+ } -+ if (offset < 0) -+ offset += limit; -+ else if (offset >= limit) -+ offset -= limit; -+ -+ ops->var.xoffset = 0; -+ ops->var.yoffset = offset * vc->vc_font.height; -+ ops->update_start(info); -+ -+ if (!scrollback_current) -+ fbcon_cursor(vc, CM_DRAW); - } - - static int fbcon_set_origin(struct vc_data *vc) - { -+ if (softback_lines) -+ fbcon_scrolldelta(vc, softback_lines); - return 0; - } - -@@ -2700,6 +3020,8 @@ - - fbcon_set_palette(vc, color_table); - update_screen(vc); -+ if (softback_buf) -+ fbcon_update_softback(vc); - } - } - -@@ -3110,6 +3432,7 @@ - .con_font_default = fbcon_set_def_font, - .con_font_copy = fbcon_copy_font, - .con_set_palette = fbcon_set_palette, -+ .con_scrolldelta = fbcon_scrolldelta, - .con_set_origin = fbcon_set_origin, - .con_invert_region = fbcon_invert_region, - .con_screen_pos = fbcon_screen_pos, -@@ -3344,6 +3667,9 @@ - } - #endif - -+ kvfree((void *)softback_buf); -+ softback_buf = 0UL; -+ - for_each_registered_fb(i) { - int pending = 0; - diff --git a/sys-kernel/pinephone-sources/files/0003-Bluetooth-Fix-attempting-to-set-RPA-timeout-when-unsupported.patch b/sys-kernel/pinephone-sources/files/0003-Bluetooth-Fix-attempting-to-set-RPA-timeout-when-unsupported.patch deleted file mode 100644 index f6bebdd..0000000 --- a/sys-kernel/pinephone-sources/files/0003-Bluetooth-Fix-attempting-to-set-RPA-timeout-when-unsupported.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 4264c74c96e7907b60ee6ed82670317d19ed7ebe Mon Sep 17 00:00:00 2001 -From: Edward Vear -Date: Tue, 27 Oct 2020 00:02:03 -0700 -Subject: Bluetooth: Fix attempting to set RPA timeout when unsupported - -During controller initialization, an LE Set RPA Timeout command is sent -to the controller if supported. However, the value checked to determine -if the command is supported is incorrect. Page 1921 of the Bluetooth -Core Spec v5.2 shows that bit 2 of octet 35 of the Supported_Commands -field corresponds to the LE Set RPA Timeout command, but currently -bit 6 of octet 35 is checked. This patch checks the correct value -instead. - -This issue led to the error seen in the following btmon output during -initialization of an adapter (rtl8761b) and prevented initialization -from completing. - -< HCI Command: LE Set Resolvable Private Address Timeout (0x08|0x002e) plen 2 - Timeout: 900 seconds -> HCI Event: Command Complete (0x0e) plen 4 - LE Set Resolvable Private Address Timeout (0x08|0x002e) ncmd 2 - Status: Unsupported Remote Feature / Unsupported LMP Feature (0x1a) -= Close Index: 00:E0:4C:6B:E5:03 - -The error did not appear when running with this patch. - -Signed-off-by: Edward Vear -Signed-off-by: Marcel Holtmann ---- - net/bluetooth/hci_core.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c -index be9cdf5dabe5..30a5267af490 100644 ---- a/net/bluetooth/hci_core.c -+++ b/net/bluetooth/hci_core.c -@@ -763,7 +763,7 @@ static int hci_init3_req(struct hci_request *req, unsigned long opt) - hci_req_add(req, HCI_OP_LE_CLEAR_RESOLV_LIST, 0, NULL); - } - -- if (hdev->commands[35] & 0x40) { -+ if (hdev->commands[35] & 0x04) { - __le16 rpa_timeout = cpu_to_le16(hdev->rpa_timeout); - - /* Set RPA timeout */ --- -cgit v1.2.3-1-gf6bb5 - diff --git a/sys-kernel/pinephone-sources/files/0003-Bluetooth-btusb.patch b/sys-kernel/pinephone-sources/files/0003-Bluetooth-btusb.patch deleted file mode 100644 index 14375ec..0000000 --- a/sys-kernel/pinephone-sources/files/0003-Bluetooth-btusb.patch +++ /dev/null @@ -1,40 +0,0 @@ -Bluetooth: btusb: Some Qualcomm Bluetooth adapters stop working -This issue starts from linux-5.10-rc1, I reproduced this issue on my -Dell Inspiron 7447 with BT adapter 0cf3:e005, the kernel will print -out: "Bluetooth: hci0: don't support firmware rome 0x31010000", and -someone else also reported the similar issue to bugzilla #211571. - -I found this is a regression introduced by 'commit b40f58b97386 -("Bluetooth: btusb: Add Qualcomm Bluetooth SoC WCN6855 support"), the -patch assumed that if high ROM version is not zero, it is an adapter -on WCN6855, but many old adapters don't need to load rampatch or nvm, -and they have non-zero high ROM version. - -To fix it, let the driver match the rom_version in the -qca_devices_table first, if there is no entry matched, check the -high ROM version, if it is not zero, we assume this adapter is ready -to work and no need to load rampatch and nvm like previously. - -BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=211571 -Fixes: b40f58b97386 ("Bluetooth: btusb: Add Qualcomm Bluetooth SoC WCN6855 support") -Signed-off-by: Hui Wang -Signed-off-by: Marcel Holtmann - -diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c -index 03b83aa91277..32161dd40ed6 100644 ---- a/drivers/bluetooth/btusb.c -+++ b/drivers/bluetooth/btusb.c -@@ -4069,6 +4069,13 @@ static int btusb_setup_qca(struct hci_dev *hdev) - info = &qca_devices_table[i]; - } - if (!info) { -+ /* If the rom_version is not matched in the qca_devices_table -+ * and the high ROM version is not zero, we assume this chip no -+ * need to load the rampatch and nvm. -+ */ -+ if (ver_rom & ~0xffffU) -+ return 0; -+ - bt_dev_err(hdev, "don't support firmware rome 0x%x", ver_rom); - return -ENODEV; - } diff --git a/sys-kernel/pinephone-sources/files/0003-bootsplash.patch b/sys-kernel/pinephone-sources/files/0003-bootsplash.patch deleted file mode 100644 index 2169537..0000000 --- a/sys-kernel/pinephone-sources/files/0003-bootsplash.patch +++ /dev/null @@ -1,66 +0,0 @@ -diff --git a/drivers/video/fbdev/core/bootsplash.c b/drivers/video/fbdev/core/bootsplash.c -index 843c5400fefc..815b007f81ca 100644 ---- a/drivers/video/fbdev/core/bootsplash.c -+++ b/drivers/video/fbdev/core/bootsplash.c -@@ -112,6 +112,8 @@ void bootsplash_render_full(struct fb_info *info) - - bootsplash_do_render_pictures(info, splash_state.file); - -+ bootsplash_do_render_flush(info); -+ - out: - mutex_unlock(&splash_state.data_lock); - } -diff --git a/drivers/video/fbdev/core/bootsplash_internal.h b/drivers/video/fbdev/core/bootsplash_internal.h -index 71e2a27ac0b8..0acb383aa4e3 100644 ---- a/drivers/video/fbdev/core/bootsplash_internal.h -+++ b/drivers/video/fbdev/core/bootsplash_internal.h -@@ -89,6 +89,7 @@ void bootsplash_do_render_background(struct fb_info *info, - const struct splash_file_priv *fp); - void bootsplash_do_render_pictures(struct fb_info *info, - const struct splash_file_priv *fp); -+void bootsplash_do_render_flush(struct fb_info *info); - - - void bootsplash_free_file(struct splash_file_priv *fp); -diff --git a/drivers/video/fbdev/core/bootsplash_render.c b/drivers/video/fbdev/core/bootsplash_render.c -index 2ae36949d0e3..8c09c306ff67 100644 ---- a/drivers/video/fbdev/core/bootsplash_render.c -+++ b/drivers/video/fbdev/core/bootsplash_render.c -@@ -186,3 +186,36 @@ void bootsplash_do_render_pictures(struct fb_info *info, - pp->pic_header->width, pp->pic_header->height); - } - } -+ -+ -+void bootsplash_do_render_flush(struct fb_info *info) -+{ -+ /* -+ * FB drivers using deferred_io (such as Xen) need to sync the -+ * screen after modifying its contents. When the FB is mmap()ed -+ * from userspace, this happens via a dirty pages callback, but -+ * when modifying the FB from the kernel, there is no such thing. -+ * -+ * So let's issue a fake fb_copyarea (copying the FB onto itself) -+ * to trick the FB driver into syncing the screen. -+ * -+ * A few DRM drivers' FB implementations are broken by not using -+ * deferred_io when they really should - we match on the known -+ * bad ones manually for now. -+ */ -+ if (info->fbdefio -+ || !strcmp(info->fix.id, "astdrmfb") -+ || !strcmp(info->fix.id, "cirrusdrmfb") -+ || !strcmp(info->fix.id, "mgadrmfb")) { -+ struct fb_copyarea area; -+ -+ area.dx = 0; -+ area.dy = 0; -+ area.width = info->var.xres; -+ area.height = info->var.yres; -+ area.sx = 0; -+ area.sy = 0; -+ -+ info->fbops->fb_copyarea(info, &area); -+ } -+} diff --git a/sys-kernel/pinephone-sources/files/0003-revert-fbcon-remove-soft-scrollback-code.patch b/sys-kernel/pinephone-sources/files/0003-revert-fbcon-remove-soft-scrollback-code.patch deleted file mode 100644 index 6d15dfd..0000000 --- a/sys-kernel/pinephone-sources/files/0003-revert-fbcon-remove-soft-scrollback-code.patch +++ /dev/null @@ -1,497 +0,0 @@ ---- b/drivers/video/fbdev/core/fbcon.c -+++ a/drivers/video/fbdev/core/fbcon.c -@@ -122,6 +122,12 @@ - /* logo_shown is an index to vc_cons when >= 0; otherwise follows FBCON_LOGO - enums. */ - static int logo_shown = FBCON_LOGO_CANSHOW; -+/* Software scrollback */ -+static int fbcon_softback_size = 32768; -+static unsigned long softback_buf, softback_curr; -+static unsigned long softback_in; -+static unsigned long softback_top, softback_end; -+static int softback_lines; - /* console mappings */ - static int first_fb_vc; - static int last_fb_vc = MAX_NR_CONSOLES - 1; -@@ -161,6 +167,8 @@ - - static const struct consw fb_con; - -+#define CM_SOFTBACK (8) -+ - #define advance_row(p, delta) (unsigned short *)((unsigned long)(p) + (delta) * vc->vc_size_row) - - static int fbcon_set_origin(struct vc_data *); -@@ -365,6 +373,18 @@ - return color; - } - -+static void fbcon_update_softback(struct vc_data *vc) -+{ -+ int l = fbcon_softback_size / vc->vc_size_row; -+ -+ if (l > 5) -+ softback_end = softback_buf + l * vc->vc_size_row; -+ else -+ /* Smaller scrollback makes no sense, and 0 would screw -+ the operation totally */ -+ softback_top = 0; -+} -+ - static void fb_flashcursor(struct work_struct *work) - { - struct fb_info *info = container_of(work, struct fb_info, queue); -@@ -394,7 +414,7 @@ - c = scr_readw((u16 *) vc->vc_pos); - mode = (!ops->cursor_flash || ops->cursor_state.enable) ? - CM_ERASE : CM_DRAW; -+ ops->cursor(vc, info, mode, softback_lines, get_color(vc, info, c, 1), -- ops->cursor(vc, info, mode, 0, get_color(vc, info, c, 1), - get_color(vc, info, c, 0)); - console_unlock(); - } -@@ -451,7 +471,13 @@ - } - - if (!strncmp(options, "scrollback:", 11)) { -+ options += 11; -+ if (*options) { -+ fbcon_softback_size = simple_strtoul(options, &options, 0); -+ if (*options == 'k' || *options == 'K') { -+ fbcon_softback_size *= 1024; -+ } -+ } -- pr_warn("Ignoring scrollback size option\n"); - continue; - } - -@@ -996,6 +1022,31 @@ - - set_blitting_type(vc, info); - -+ if (info->fix.type != FB_TYPE_TEXT) { -+ if (fbcon_softback_size) { -+ if (!softback_buf) { -+ softback_buf = -+ (unsigned long) -+ kvmalloc(fbcon_softback_size, -+ GFP_KERNEL); -+ if (!softback_buf) { -+ fbcon_softback_size = 0; -+ softback_top = 0; -+ } -+ } -+ } else { -+ if (softback_buf) { -+ kvfree((void *) softback_buf); -+ softback_buf = 0; -+ softback_top = 0; -+ } -+ } -+ if (softback_buf) -+ softback_in = softback_top = softback_curr = -+ softback_buf; -+ softback_lines = 0; -+ } -+ - /* Setup default font */ - if (!p->fontdata && !vc->vc_font.data) { - if (!fontname[0] || !(font = find_font(fontname))) -@@ -1169,6 +1220,9 @@ - if (logo) - fbcon_prepare_logo(vc, info, cols, rows, new_cols, new_rows); - -+ if (vc == svc && softback_buf) -+ fbcon_update_softback(vc); -+ - if (ops->rotate_font && ops->rotate_font(info, vc)) { - ops->rotate = FB_ROTATE_UR; - set_blitting_type(vc, info); -@@ -1331,6 +1385,7 @@ - { - struct fb_info *info = registered_fb[con2fb_map[vc->vc_num]]; - struct fbcon_ops *ops = info->fbcon_par; -+ int y; - int c = scr_readw((u16 *) vc->vc_pos); - - ops->cur_blink_jiffies = msecs_to_jiffies(vc->vc_cur_blink_ms); -@@ -1344,8 +1399,16 @@ - fbcon_add_cursor_timer(info); - - ops->cursor_flash = (mode == CM_ERASE) ? 0 : 1; -+ if (mode & CM_SOFTBACK) { -+ mode &= ~CM_SOFTBACK; -+ y = softback_lines; -+ } else { -+ if (softback_lines) -+ fbcon_set_origin(vc); -+ y = 0; -+ } - -+ ops->cursor(vc, info, mode, y, get_color(vc, info, c, 1), -- ops->cursor(vc, info, mode, 0, get_color(vc, info, c, 1), - get_color(vc, info, c, 0)); - } - -@@ -1416,6 +1479,8 @@ - - if (con_is_visible(vc)) { - update_screen(vc); -+ if (softback_buf) -+ fbcon_update_softback(vc); - } - } - -@@ -1553,6 +1618,99 @@ - scrollback_current = 0; - } - -+static void fbcon_redraw_softback(struct vc_data *vc, struct fbcon_display *p, -+ long delta) -+{ -+ int count = vc->vc_rows; -+ unsigned short *d, *s; -+ unsigned long n; -+ int line = 0; -+ -+ d = (u16 *) softback_curr; -+ if (d == (u16 *) softback_in) -+ d = (u16 *) vc->vc_origin; -+ n = softback_curr + delta * vc->vc_size_row; -+ softback_lines -= delta; -+ if (delta < 0) { -+ if (softback_curr < softback_top && n < softback_buf) { -+ n += softback_end - softback_buf; -+ if (n < softback_top) { -+ softback_lines -= -+ (softback_top - n) / vc->vc_size_row; -+ n = softback_top; -+ } -+ } else if (softback_curr >= softback_top -+ && n < softback_top) { -+ softback_lines -= -+ (softback_top - n) / vc->vc_size_row; -+ n = softback_top; -+ } -+ } else { -+ if (softback_curr > softback_in && n >= softback_end) { -+ n += softback_buf - softback_end; -+ if (n > softback_in) { -+ n = softback_in; -+ softback_lines = 0; -+ } -+ } else if (softback_curr <= softback_in && n > softback_in) { -+ n = softback_in; -+ softback_lines = 0; -+ } -+ } -+ if (n == softback_curr) -+ return; -+ softback_curr = n; -+ s = (u16 *) softback_curr; -+ if (s == (u16 *) softback_in) -+ s = (u16 *) vc->vc_origin; -+ while (count--) { -+ unsigned short *start; -+ unsigned short *le; -+ unsigned short c; -+ int x = 0; -+ unsigned short attr = 1; -+ -+ start = s; -+ le = advance_row(s, 1); -+ do { -+ c = scr_readw(s); -+ if (attr != (c & 0xff00)) { -+ attr = c & 0xff00; -+ if (s > start) { -+ fbcon_putcs(vc, start, s - start, -+ line, x); -+ x += s - start; -+ start = s; -+ } -+ } -+ if (c == scr_readw(d)) { -+ if (s > start) { -+ fbcon_putcs(vc, start, s - start, -+ line, x); -+ x += s - start + 1; -+ start = s + 1; -+ } else { -+ x++; -+ start++; -+ } -+ } -+ s++; -+ d++; -+ } while (s < le); -+ if (s > start) -+ fbcon_putcs(vc, start, s - start, line, x); -+ line++; -+ if (d == (u16 *) softback_end) -+ d = (u16 *) softback_buf; -+ if (d == (u16 *) softback_in) -+ d = (u16 *) vc->vc_origin; -+ if (s == (u16 *) softback_end) -+ s = (u16 *) softback_buf; -+ if (s == (u16 *) softback_in) -+ s = (u16 *) vc->vc_origin; -+ } -+} -+ - static void fbcon_redraw_move(struct vc_data *vc, struct fbcon_display *p, - int line, int count, int dy) - { -@@ -1692,6 +1850,31 @@ - } - } - -+static inline void fbcon_softback_note(struct vc_data *vc, int t, -+ int count) -+{ -+ unsigned short *p; -+ -+ if (vc->vc_num != fg_console) -+ return; -+ p = (unsigned short *) (vc->vc_origin + t * vc->vc_size_row); -+ -+ while (count) { -+ scr_memcpyw((u16 *) softback_in, p, vc->vc_size_row); -+ count--; -+ p = advance_row(p, 1); -+ softback_in += vc->vc_size_row; -+ if (softback_in == softback_end) -+ softback_in = softback_buf; -+ if (softback_in == softback_top) { -+ softback_top += vc->vc_size_row; -+ if (softback_top == softback_end) -+ softback_top = softback_buf; -+ } -+ } -+ softback_curr = softback_in; -+} -+ - static bool fbcon_scroll(struct vc_data *vc, unsigned int t, unsigned int b, - enum con_scroll dir, unsigned int count) - { -@@ -1714,6 +1897,8 @@ - case SM_UP: - if (count > vc->vc_rows) /* Maximum realistic size */ - count = vc->vc_rows; -+ if (softback_top) -+ fbcon_softback_note(vc, t, count); - if (logo_shown >= 0) - goto redraw_up; - switch (p->scrollmode) { -@@ -2084,6 +2269,14 @@ - info = registered_fb[con2fb_map[vc->vc_num]]; - ops = info->fbcon_par; - -+ if (softback_top) { -+ if (softback_lines) -+ fbcon_set_origin(vc); -+ softback_top = softback_curr = softback_in = softback_buf; -+ softback_lines = 0; -+ fbcon_update_softback(vc); -+ } -+ - if (logo_shown >= 0) { - struct vc_data *conp2 = vc_cons[logo_shown].d; - -@@ -2407,6 +2600,9 @@ - int cnt; - char *old_data = NULL; - -+ if (con_is_visible(vc) && softback_lines) -+ fbcon_set_origin(vc); -+ - resize = (w != vc->vc_font.width) || (h != vc->vc_font.height); - if (p->userfont) - old_data = vc->vc_font.data; -@@ -2432,6 +2628,8 @@ - cols /= w; - rows /= h; - vc_resize(vc, cols, rows); -+ if (con_is_visible(vc) && softback_buf) -+ fbcon_update_softback(vc); - } else if (con_is_visible(vc) - && vc->vc_mode == KD_TEXT) { - fbcon_clear_margins(vc, 0); -@@ -2590,7 +2788,19 @@ - - static u16 *fbcon_screen_pos(struct vc_data *vc, int offset) - { -+ unsigned long p; -+ int line; -+ -+ if (vc->vc_num != fg_console || !softback_lines) -+ return (u16 *) (vc->vc_origin + offset); -+ line = offset / vc->vc_size_row; -+ if (line >= softback_lines) -+ return (u16 *) (vc->vc_origin + offset - -+ softback_lines * vc->vc_size_row); -+ p = softback_curr + offset; -+ if (p >= softback_end) -+ p += softback_buf - softback_end; -+ return (u16 *) p; -- return (u16 *) (vc->vc_origin + offset); - } - - static unsigned long fbcon_getxy(struct vc_data *vc, unsigned long pos, -@@ -2604,7 +2814,22 @@ - - x = offset % vc->vc_cols; - y = offset / vc->vc_cols; -+ if (vc->vc_num == fg_console) -+ y += softback_lines; - ret = pos + (vc->vc_cols - x) * 2; -+ } else if (vc->vc_num == fg_console && softback_lines) { -+ unsigned long offset = pos - softback_curr; -+ -+ if (pos < softback_curr) -+ offset += softback_end - softback_buf; -+ offset /= 2; -+ x = offset % vc->vc_cols; -+ y = offset / vc->vc_cols; -+ ret = pos + (vc->vc_cols - x) * 2; -+ if (ret == softback_end) -+ ret = softback_buf; -+ if (ret == softback_in) -+ ret = vc->vc_origin; - } else { - /* Should not happen */ - x = y = 0; -@@ -2632,11 +2857,106 @@ - a = ((a) & 0x88ff) | (((a) & 0x7000) >> 4) | - (((a) & 0x0700) << 4); - scr_writew(a, p++); -+ if (p == (u16 *) softback_end) -+ p = (u16 *) softback_buf; -+ if (p == (u16 *) softback_in) -+ p = (u16 *) vc->vc_origin; -+ } -+} -+ -+static void fbcon_scrolldelta(struct vc_data *vc, int lines) -+{ -+ struct fb_info *info = registered_fb[con2fb_map[fg_console]]; -+ struct fbcon_ops *ops = info->fbcon_par; -+ struct fbcon_display *disp = &fb_display[fg_console]; -+ int offset, limit, scrollback_old; -+ -+ if (softback_top) { -+ if (vc->vc_num != fg_console) -+ return; -+ if (vc->vc_mode != KD_TEXT || !lines) -+ return; -+ if (logo_shown >= 0) { -+ struct vc_data *conp2 = vc_cons[logo_shown].d; -+ -+ if (conp2->vc_top == logo_lines -+ && conp2->vc_bottom == conp2->vc_rows) -+ conp2->vc_top = 0; -+ if (logo_shown == vc->vc_num) { -+ unsigned long p, q; -+ int i; -+ -+ p = softback_in; -+ q = vc->vc_origin + -+ logo_lines * vc->vc_size_row; -+ for (i = 0; i < logo_lines; i++) { -+ if (p == softback_top) -+ break; -+ if (p == softback_buf) -+ p = softback_end; -+ p -= vc->vc_size_row; -+ q -= vc->vc_size_row; -+ scr_memcpyw((u16 *) q, (u16 *) p, -+ vc->vc_size_row); -+ } -+ softback_in = softback_curr = p; -+ update_region(vc, vc->vc_origin, -+ logo_lines * vc->vc_cols); -+ } -+ logo_shown = FBCON_LOGO_CANSHOW; -+ } -+ fbcon_cursor(vc, CM_ERASE | CM_SOFTBACK); -+ fbcon_redraw_softback(vc, disp, lines); -+ fbcon_cursor(vc, CM_DRAW | CM_SOFTBACK); -+ return; - } -+ -+ if (!scrollback_phys_max) -+ return; -+ -+ scrollback_old = scrollback_current; -+ scrollback_current -= lines; -+ if (scrollback_current < 0) -+ scrollback_current = 0; -+ else if (scrollback_current > scrollback_max) -+ scrollback_current = scrollback_max; -+ if (scrollback_current == scrollback_old) -+ return; -+ -+ if (fbcon_is_inactive(vc, info)) -+ return; -+ -+ fbcon_cursor(vc, CM_ERASE); -+ -+ offset = disp->yscroll - scrollback_current; -+ limit = disp->vrows; -+ switch (disp->scrollmode) { -+ case SCROLL_WRAP_MOVE: -+ info->var.vmode |= FB_VMODE_YWRAP; -+ break; -+ case SCROLL_PAN_MOVE: -+ case SCROLL_PAN_REDRAW: -+ limit -= vc->vc_rows; -+ info->var.vmode &= ~FB_VMODE_YWRAP; -+ break; -+ } -+ if (offset < 0) -+ offset += limit; -+ else if (offset >= limit) -+ offset -= limit; -+ -+ ops->var.xoffset = 0; -+ ops->var.yoffset = offset * vc->vc_font.height; -+ ops->update_start(info); -+ -+ if (!scrollback_current) -+ fbcon_cursor(vc, CM_DRAW); - } - - static int fbcon_set_origin(struct vc_data *vc) - { -+ if (softback_lines) -+ fbcon_scrolldelta(vc, softback_lines); - return 0; - } - -@@ -2700,6 +3020,8 @@ - - fbcon_set_palette(vc, color_table); - update_screen(vc); -+ if (softback_buf) -+ fbcon_update_softback(vc); - } - } - -@@ -3110,6 +3432,7 @@ - .con_font_default = fbcon_set_def_font, - .con_font_copy = fbcon_copy_font, - .con_set_palette = fbcon_set_palette, -+ .con_scrolldelta = fbcon_scrolldelta, - .con_set_origin = fbcon_set_origin, - .con_invert_region = fbcon_invert_region, - .con_screen_pos = fbcon_screen_pos, -@@ -3344,6 +3667,9 @@ - } - #endif - -+ kvfree((void *)softback_buf); -+ softback_buf = 0UL; -+ - for_each_registered_fb(i) { - int pending = 0; - diff --git a/sys-kernel/pinephone-sources/files/0004-bootsplash.patch b/sys-kernel/pinephone-sources/files/0004-bootsplash.patch deleted file mode 100644 index 7eb54af..0000000 --- a/sys-kernel/pinephone-sources/files/0004-bootsplash.patch +++ /dev/null @@ -1,215 +0,0 @@ -diff --git a/drivers/video/fbdev/core/bootsplash_render.c b/drivers/video/fbdev/core/bootsplash_render.c -index 8c09c306ff67..07e3a4eab811 100644 ---- a/drivers/video/fbdev/core/bootsplash_render.c -+++ b/drivers/video/fbdev/core/bootsplash_render.c -@@ -155,6 +155,7 @@ void bootsplash_do_render_pictures(struct fb_info *info, - for (i = 0; i < fp->header->num_pics; i++) { - struct splash_blob_priv *bp; - struct splash_pic_priv *pp = &fp->pics[i]; -+ const struct splash_pic_header *ph = pp->pic_header; - long dst_xoff, dst_yoff; - - if (pp->blobs_loaded < 1) -@@ -165,8 +166,139 @@ void bootsplash_do_render_pictures(struct fb_info *info, - if (!bp || bp->blob_header->type != 0) - continue; - -- dst_xoff = (info->var.xres - pp->pic_header->width) / 2; -- dst_yoff = (info->var.yres - pp->pic_header->height) / 2; -+ switch (ph->position) { -+ case SPLASH_POS_FLAG_CORNER | SPLASH_CORNER_TOP_LEFT: -+ dst_xoff = 0; -+ dst_yoff = 0; -+ -+ dst_xoff += ph->position_offset; -+ dst_yoff += ph->position_offset; -+ break; -+ case SPLASH_POS_FLAG_CORNER | SPLASH_CORNER_TOP: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = 0; -+ -+ dst_yoff += ph->position_offset; -+ break; -+ case SPLASH_POS_FLAG_CORNER | SPLASH_CORNER_TOP_RIGHT: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_yoff = 0; -+ -+ dst_xoff -= ph->position_offset; -+ dst_yoff += ph->position_offset; -+ break; -+ case SPLASH_POS_FLAG_CORNER | SPLASH_CORNER_RIGHT: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ -+ dst_xoff -= ph->position_offset; -+ break; -+ case SPLASH_POS_FLAG_CORNER | SPLASH_CORNER_BOTTOM_RIGHT: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ -+ dst_xoff -= ph->position_offset; -+ dst_yoff -= ph->position_offset; -+ break; -+ case SPLASH_POS_FLAG_CORNER | SPLASH_CORNER_BOTTOM: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ -+ dst_yoff -= ph->position_offset; -+ break; -+ case SPLASH_POS_FLAG_CORNER | SPLASH_CORNER_BOTTOM_LEFT: -+ dst_xoff = 0 + ph->position_offset; -+ dst_yoff = info->var.yres - pp->pic_header->height -+ - ph->position_offset; -+ break; -+ case SPLASH_POS_FLAG_CORNER | SPLASH_CORNER_LEFT: -+ dst_xoff = 0; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ -+ dst_xoff += ph->position_offset; -+ break; -+ -+ case SPLASH_CORNER_TOP_LEFT: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ -+ dst_xoff -= ph->position_offset; -+ dst_yoff -= ph->position_offset; -+ break; -+ case SPLASH_CORNER_TOP: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ -+ dst_yoff -= ph->position_offset; -+ break; -+ case SPLASH_CORNER_TOP_RIGHT: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ -+ dst_xoff += ph->position_offset; -+ dst_yoff -= ph->position_offset; -+ break; -+ case SPLASH_CORNER_RIGHT: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ -+ dst_xoff += ph->position_offset; -+ break; -+ case SPLASH_CORNER_BOTTOM_RIGHT: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ -+ dst_xoff += ph->position_offset; -+ dst_yoff += ph->position_offset; -+ break; -+ case SPLASH_CORNER_BOTTOM: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ -+ dst_yoff += ph->position_offset; -+ break; -+ case SPLASH_CORNER_BOTTOM_LEFT: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ -+ dst_xoff -= ph->position_offset; -+ dst_yoff += ph->position_offset; -+ break; -+ case SPLASH_CORNER_LEFT: -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ -+ dst_xoff -= ph->position_offset; -+ break; -+ -+ default: -+ /* As a fallback, center the picture. */ -+ dst_xoff = info->var.xres - pp->pic_header->width; -+ dst_xoff /= 2; -+ dst_yoff = info->var.yres - pp->pic_header->height; -+ dst_yoff /= 2; -+ break; -+ } - - if (dst_xoff < 0 - || dst_yoff < 0 -diff --git a/include/uapi/linux/bootsplash_file.h b/include/uapi/linux/bootsplash_file.h -index 89dc9cca8f0c..71cedcc68933 100644 ---- a/include/uapi/linux/bootsplash_file.h -+++ b/include/uapi/linux/bootsplash_file.h -@@ -91,7 +91,32 @@ struct splash_pic_header { - */ - uint8_t num_blobs; - -- uint8_t padding[27]; -+ /* -+ * Corner to move the picture to / from. -+ * 0x00 - Top left -+ * 0x01 - Top -+ * 0x02 - Top right -+ * 0x03 - Right -+ * 0x04 - Bottom right -+ * 0x05 - Bottom -+ * 0x06 - Bottom left -+ * 0x07 - Left -+ * -+ * Flags: -+ * 0x10 - Calculate offset from the corner towards the center, -+ * rather than from the center towards the corner -+ */ -+ uint8_t position; -+ -+ /* -+ * Pixel offset from the selected position. -+ * Example: If the picture is in the top right corner, it will -+ * be placed position_offset pixels from the top and -+ * position_offset pixels from the right margin. -+ */ -+ uint16_t position_offset; -+ -+ uint8_t padding[24]; - } __attribute__((__packed__)); - - -@@ -115,4 +140,22 @@ struct splash_blob_header { - uint8_t padding[9]; - } __attribute__((__packed__)); - -+ -+ -+ -+/* -+ * Enums for on-disk types -+ */ -+enum splash_position { -+ SPLASH_CORNER_TOP_LEFT = 0, -+ SPLASH_CORNER_TOP = 1, -+ SPLASH_CORNER_TOP_RIGHT = 2, -+ SPLASH_CORNER_RIGHT = 3, -+ SPLASH_CORNER_BOTTOM_RIGHT = 4, -+ SPLASH_CORNER_BOTTOM = 5, -+ SPLASH_CORNER_BOTTOM_LEFT = 6, -+ SPLASH_CORNER_LEFT = 7, -+ SPLASH_POS_FLAG_CORNER = 0x10, -+}; -+ - #endif diff --git a/sys-kernel/pinephone-sources/files/0004-efivarfs-revert-fix-memory-leak-in-efivarfs_create.patch b/sys-kernel/pinephone-sources/files/0004-efivarfs-revert-fix-memory-leak-in-efivarfs_create.patch deleted file mode 100644 index 6589b85..0000000 --- a/sys-kernel/pinephone-sources/files/0004-efivarfs-revert-fix-memory-leak-in-efivarfs_create.patch +++ /dev/null @@ -1,58 +0,0 @@ -From a163474e9b86c2c25f20733385d8b1d6de492a7f Mon Sep 17 00:00:00 2001 -From: Ard Biesheuvel -Date: Wed, 25 Nov 2020 08:45:55 +0100 -Subject: efivarfs: revert "fix memory leak in efivarfs_create()" - -The memory leak addressed by commit fe5186cf12e3 is a false positive: -all allocations are recorded in a linked list, and freed when the -filesystem is unmounted. This leads to double frees, and as reported -by David, leads to crashes if SLUB is configured to self destruct when -double frees occur. - -So drop the redundant kfree() again, and instead, mark the offending -pointer variable so the allocation is ignored by kmemleak. - -Cc: Vamshi K Sthambamkadi -Fixes: fe5186cf12e3 ("efivarfs: fix memory leak in efivarfs_create()") -Reported-by: David Laight -Signed-off-by: Ard Biesheuvel ---- - fs/efivarfs/inode.c | 2 ++ - fs/efivarfs/super.c | 1 - - 2 files changed, 2 insertions(+), 1 deletion(-) - -diff --git a/fs/efivarfs/inode.c b/fs/efivarfs/inode.c -index 96c0c86f3fff..0297ad95eb5c 100644 ---- a/fs/efivarfs/inode.c -+++ b/fs/efivarfs/inode.c -@@ -7,6 +7,7 @@ - #include - #include - #include -+#include - #include - #include - -@@ -103,6 +104,7 @@ static int efivarfs_create(struct inode *dir, struct dentry *dentry, - var->var.VariableName[i] = '\0'; - - inode->i_private = var; -+ kmemleak_ignore(var); - - err = efivar_entry_add(var, &efivarfs_list); - if (err) -diff --git a/fs/efivarfs/super.c b/fs/efivarfs/super.c -index f943fd0b0699..15880a68faad 100644 ---- a/fs/efivarfs/super.c -+++ b/fs/efivarfs/super.c -@@ -21,7 +21,6 @@ LIST_HEAD(efivarfs_list); - static void efivarfs_evict_inode(struct inode *inode) - { - clear_inode(inode); -- kfree(inode->i_private); - } - - static const struct super_operations efivarfs_ops = { --- -cgit v1.2.3-1-gf6bb5 - diff --git a/sys-kernel/pinephone-sources/files/0005-bootsplash.patch b/sys-kernel/pinephone-sources/files/0005-bootsplash.patch deleted file mode 100644 index 2785c5e..0000000 --- a/sys-kernel/pinephone-sources/files/0005-bootsplash.patch +++ /dev/null @@ -1,327 +0,0 @@ -diff --git a/drivers/video/fbdev/core/bootsplash.c b/drivers/video/fbdev/core/bootsplash.c -index 815b007f81ca..c8642142cfea 100644 ---- a/drivers/video/fbdev/core/bootsplash.c -+++ b/drivers/video/fbdev/core/bootsplash.c -@@ -53,6 +53,14 @@ static void splash_callback_redraw_vc(struct work_struct *ignored) - console_unlock(); - } - -+static void splash_callback_animation(struct work_struct *ignored) -+{ -+ if (bootsplash_would_render_now()) { -+ /* This will also re-schedule this delayed worker */ -+ splash_callback_redraw_vc(ignored); -+ } -+} -+ - - static bool is_fb_compatible(const struct fb_info *info) - { -@@ -103,17 +111,44 @@ static bool is_fb_compatible(const struct fb_info *info) - */ - void bootsplash_render_full(struct fb_info *info) - { -+ bool is_update = false; -+ - mutex_lock(&splash_state.data_lock); - -- if (!is_fb_compatible(info)) -- goto out; -+ /* -+ * If we've painted on this FB recently, we don't have to do -+ * the sanity checks and background drawing again. -+ */ -+ if (splash_state.splash_fb == info) -+ is_update = true; -+ -+ -+ if (!is_update) { -+ /* Check whether we actually support this FB. */ -+ splash_state.splash_fb = NULL; -+ -+ if (!is_fb_compatible(info)) -+ goto out; -+ -+ /* Draw the background only once */ -+ bootsplash_do_render_background(info, splash_state.file); - -- bootsplash_do_render_background(info, splash_state.file); -+ /* Mark this FB as last seen */ -+ splash_state.splash_fb = info; -+ } - -- bootsplash_do_render_pictures(info, splash_state.file); -+ bootsplash_do_render_pictures(info, splash_state.file, is_update); - - bootsplash_do_render_flush(info); - -+ bootsplash_do_step_animations(splash_state.file); -+ -+ /* Schedule update for animated splash screens */ -+ if (splash_state.file->frame_ms > 0) -+ schedule_delayed_work(&splash_state.dwork_animation, -+ msecs_to_jiffies( -+ splash_state.file->frame_ms)); -+ - out: - mutex_unlock(&splash_state.data_lock); - } -@@ -169,8 +204,14 @@ void bootsplash_enable(void) - - was_enabled = test_and_set_bit(0, &splash_state.enabled); - -- if (!was_enabled) -+ if (!was_enabled) { -+ /* Force a full redraw when the splash is re-activated */ -+ mutex_lock(&splash_state.data_lock); -+ splash_state.splash_fb = NULL; -+ mutex_unlock(&splash_state.data_lock); -+ - schedule_work(&splash_state.work_redraw_vc); -+ } - } - - -@@ -227,6 +268,14 @@ ATTRIBUTE_GROUPS(splash_dev); - */ - static int splash_resume(struct device *device) - { -+ /* -+ * Force full redraw on resume since we've probably lost the -+ * framebuffer's contents meanwhile -+ */ -+ mutex_lock(&splash_state.data_lock); -+ splash_state.splash_fb = NULL; -+ mutex_unlock(&splash_state.data_lock); -+ - if (bootsplash_would_render_now()) - schedule_work(&splash_state.work_redraw_vc); - -@@ -235,6 +284,7 @@ static int splash_resume(struct device *device) - - static int splash_suspend(struct device *device) - { -+ cancel_delayed_work_sync(&splash_state.dwork_animation); - cancel_work_sync(&splash_state.work_redraw_vc); - - return 0; -@@ -296,6 +346,8 @@ void bootsplash_init(void) - set_bit(0, &splash_state.enabled); - - INIT_WORK(&splash_state.work_redraw_vc, splash_callback_redraw_vc); -+ INIT_DELAYED_WORK(&splash_state.dwork_animation, -+ splash_callback_animation); - - - if (!splash_state.bootfile || !strlen(splash_state.bootfile)) -diff --git a/drivers/video/fbdev/core/bootsplash_internal.h b/drivers/video/fbdev/core/bootsplash_internal.h -index 0acb383aa4e3..b3a74835d90f 100644 ---- a/drivers/video/fbdev/core/bootsplash_internal.h -+++ b/drivers/video/fbdev/core/bootsplash_internal.h -@@ -37,6 +37,8 @@ struct splash_pic_priv { - - struct splash_blob_priv *blobs; - u16 blobs_loaded; -+ -+ u16 anim_nextframe; - }; - - -@@ -45,6 +47,12 @@ struct splash_file_priv { - const struct splash_file_header *header; - - struct splash_pic_priv *pics; -+ -+ /* -+ * A local copy of the frame delay in the header. -+ * We modify it to keep the code simple. -+ */ -+ u16 frame_ms; - }; - - -@@ -71,6 +79,7 @@ struct splash_priv { - struct platform_device *splash_device; - - struct work_struct work_redraw_vc; -+ struct delayed_work dwork_animation; - - /* Splash data structures including lock for everything below */ - struct mutex data_lock; -@@ -88,8 +97,10 @@ struct splash_priv { - void bootsplash_do_render_background(struct fb_info *info, - const struct splash_file_priv *fp); - void bootsplash_do_render_pictures(struct fb_info *info, -- const struct splash_file_priv *fp); -+ const struct splash_file_priv *fp, -+ bool is_update); - void bootsplash_do_render_flush(struct fb_info *info); -+void bootsplash_do_step_animations(struct splash_file_priv *fp); - - - void bootsplash_free_file(struct splash_file_priv *fp); -diff --git a/drivers/video/fbdev/core/bootsplash_load.c b/drivers/video/fbdev/core/bootsplash_load.c -index fd807571ab7d..1f661b2d4cc9 100644 ---- a/drivers/video/fbdev/core/bootsplash_load.c -+++ b/drivers/video/fbdev/core/bootsplash_load.c -@@ -71,6 +71,7 @@ struct splash_file_priv *bootsplash_load_firmware(struct device *device, - { - const struct firmware *fw; - struct splash_file_priv *fp; -+ bool have_anim = false; - unsigned int i; - const u8 *walker; - -@@ -135,6 +136,13 @@ struct splash_file_priv *bootsplash_load_firmware(struct device *device, - goto err; - } - -+ if (ph->anim_type > SPLASH_ANIM_LOOP_FORWARD) { -+ pr_warn("Picture %u: Unsupported animation type %u.\n", -+ i, ph->anim_type); -+ -+ ph->anim_type = SPLASH_ANIM_NONE; -+ } -+ - pp->pic_header = ph; - pp->blobs = vzalloc(ph->num_blobs - * sizeof(struct splash_blob_priv)); -@@ -202,6 +210,7 @@ struct splash_file_priv *bootsplash_load_firmware(struct device *device, - /* Walk over pictures and ensure all blob slots are filled */ - for (i = 0; i < fp->header->num_pics; i++) { - struct splash_pic_priv *pp = &fp->pics[i]; -+ const struct splash_pic_header *ph = pp->pic_header; - - if (pp->blobs_loaded != pp->pic_header->num_blobs) { - pr_err("Picture %u doesn't have all blob slots filled.\n", -@@ -209,8 +218,20 @@ struct splash_file_priv *bootsplash_load_firmware(struct device *device, - - goto err; - } -+ -+ if (ph->anim_type -+ && ph->num_blobs > 1 -+ && ph->anim_loop < pp->blobs_loaded) -+ have_anim = true; - } - -+ if (!have_anim) -+ /* Disable animation timer if there is nothing to animate */ -+ fp->frame_ms = 0; -+ else -+ /* Enforce minimum delay between frames */ -+ fp->frame_ms = max((u16)20, fp->header->frame_ms); -+ - pr_info("Loaded (%ld bytes, %u pics, %u blobs).\n", - fw->size, - fp->header->num_pics, -diff --git a/drivers/video/fbdev/core/bootsplash_render.c b/drivers/video/fbdev/core/bootsplash_render.c -index 07e3a4eab811..76033606ca8a 100644 ---- a/drivers/video/fbdev/core/bootsplash_render.c -+++ b/drivers/video/fbdev/core/bootsplash_render.c -@@ -148,7 +148,8 @@ void bootsplash_do_render_background(struct fb_info *info, - - - void bootsplash_do_render_pictures(struct fb_info *info, -- const struct splash_file_priv *fp) -+ const struct splash_file_priv *fp, -+ bool is_update) - { - unsigned int i; - -@@ -161,7 +162,11 @@ void bootsplash_do_render_pictures(struct fb_info *info, - if (pp->blobs_loaded < 1) - continue; - -- bp = &pp->blobs[0]; -+ /* Skip static pictures when refreshing animations */ -+ if (ph->anim_type == SPLASH_ANIM_NONE && is_update) -+ continue; -+ -+ bp = &pp->blobs[pp->anim_nextframe]; - - if (!bp || bp->blob_header->type != 0) - continue; -@@ -351,3 +356,24 @@ void bootsplash_do_render_flush(struct fb_info *info) - info->fbops->fb_copyarea(info, &area); - } - } -+ -+ -+void bootsplash_do_step_animations(struct splash_file_priv *fp) -+{ -+ unsigned int i; -+ -+ /* Step every animation once */ -+ for (i = 0; i < fp->header->num_pics; i++) { -+ struct splash_pic_priv *pp = &fp->pics[i]; -+ -+ if (pp->blobs_loaded < 2 -+ || pp->pic_header->anim_loop > pp->blobs_loaded) -+ continue; -+ -+ if (pp->pic_header->anim_type == SPLASH_ANIM_LOOP_FORWARD) { -+ pp->anim_nextframe++; -+ if (pp->anim_nextframe >= pp->pic_header->num_blobs) -+ pp->anim_nextframe = pp->pic_header->anim_loop; -+ } -+ } -+} -diff --git a/include/uapi/linux/bootsplash_file.h b/include/uapi/linux/bootsplash_file.h -index 71cedcc68933..b3af0a3c6487 100644 ---- a/include/uapi/linux/bootsplash_file.h -+++ b/include/uapi/linux/bootsplash_file.h -@@ -77,7 +77,17 @@ struct splash_file_header { - uint16_t num_blobs; - uint8_t num_pics; - -- uint8_t padding[103]; -+ uint8_t unused_1; -+ -+ /* -+ * Milliseconds to wait before painting the next frame in -+ * an animation. -+ * This is actually a minimum, as the system is allowed to -+ * stall for longer between frames. -+ */ -+ uint16_t frame_ms; -+ -+ uint8_t padding[100]; - } __attribute__((__packed__)); - - -@@ -116,7 +126,23 @@ struct splash_pic_header { - */ - uint16_t position_offset; - -- uint8_t padding[24]; -+ /* -+ * Animation type. -+ * 0 - off -+ * 1 - forward loop -+ */ -+ uint8_t anim_type; -+ -+ /* -+ * Animation loop point. -+ * Actual meaning depends on animation type: -+ * Type 0 - Unused -+ * 1 - Frame at which to restart the forward loop -+ * (allowing for "intro" frames) -+ */ -+ uint8_t anim_loop; -+ -+ uint8_t padding[22]; - } __attribute__((__packed__)); - - -@@ -158,4 +184,9 @@ enum splash_position { - SPLASH_POS_FLAG_CORNER = 0x10, - }; - -+enum splash_anim_type { -+ SPLASH_ANIM_NONE = 0, -+ SPLASH_ANIM_LOOP_FORWARD = 1, -+}; -+ - #endif diff --git a/sys-kernel/pinephone-sources/files/0006-bootsplash.patch b/sys-kernel/pinephone-sources/files/0006-bootsplash.patch deleted file mode 100644 index d6c6db6..0000000 --- a/sys-kernel/pinephone-sources/files/0006-bootsplash.patch +++ /dev/null @@ -1,82 +0,0 @@ -diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c -index 2ebaba16f785..416735ab6dc1 100644 ---- a/drivers/tty/vt/vt.c -+++ b/drivers/tty/vt/vt.c -@@ -105,6 +105,7 @@ - #include - #include - #include -+#include - - #define MAX_NR_CON_DRIVER 16 - -@@ -4235,6 +4236,7 @@ void do_unblank_screen(int leaving_gfx) - } - - console_blanked = 0; -+ bootsplash_mark_dirty(); - if (vc->vc_sw->con_blank(vc, 0, leaving_gfx)) - /* Low-level driver cannot restore -> do it ourselves */ - update_screen(vc); -diff --git a/drivers/video/fbdev/core/bootsplash.c b/drivers/video/fbdev/core/bootsplash.c -index c8642142cfea..13fcaabbc2ca 100644 ---- a/drivers/video/fbdev/core/bootsplash.c -+++ b/drivers/video/fbdev/core/bootsplash.c -@@ -165,6 +165,13 @@ bool bootsplash_would_render_now(void) - && bootsplash_is_enabled(); - } - -+void bootsplash_mark_dirty(void) -+{ -+ mutex_lock(&splash_state.data_lock); -+ splash_state.splash_fb = NULL; -+ mutex_unlock(&splash_state.data_lock); -+} -+ - bool bootsplash_is_enabled(void) - { - bool was_enabled; -@@ -206,9 +213,7 @@ void bootsplash_enable(void) - - if (!was_enabled) { - /* Force a full redraw when the splash is re-activated */ -- mutex_lock(&splash_state.data_lock); -- splash_state.splash_fb = NULL; -- mutex_unlock(&splash_state.data_lock); -+ bootsplash_mark_dirty(); - - schedule_work(&splash_state.work_redraw_vc); - } -@@ -272,9 +277,7 @@ static int splash_resume(struct device *device) - * Force full redraw on resume since we've probably lost the - * framebuffer's contents meanwhile - */ -- mutex_lock(&splash_state.data_lock); -- splash_state.splash_fb = NULL; -- mutex_unlock(&splash_state.data_lock); -+ bootsplash_mark_dirty(); - - if (bootsplash_would_render_now()) - schedule_work(&splash_state.work_redraw_vc); -diff --git a/include/linux/bootsplash.h b/include/linux/bootsplash.h -index c6dd0b43180d..4075098aaadd 100644 ---- a/include/linux/bootsplash.h -+++ b/include/linux/bootsplash.h -@@ -19,6 +19,8 @@ extern void bootsplash_render_full(struct fb_info *info); - - extern bool bootsplash_would_render_now(void); - -+extern void bootsplash_mark_dirty(void); -+ - extern bool bootsplash_is_enabled(void); - extern void bootsplash_disable(void); - extern void bootsplash_enable(void); -@@ -31,6 +33,8 @@ extern void bootsplash_init(void); - - #define bootsplash_would_render_now() (false) - -+#define bootsplash_mark_dirty() -+ - #define bootsplash_is_enabled() (false) - #define bootsplash_disable() - #define bootsplash_enable() diff --git a/sys-kernel/pinephone-sources/files/0007-bootsplash.patch b/sys-kernel/pinephone-sources/files/0007-bootsplash.patch deleted file mode 100644 index 3f82eb0..0000000 --- a/sys-kernel/pinephone-sources/files/0007-bootsplash.patch +++ /dev/null @@ -1,42 +0,0 @@ -diff --git a/drivers/tty/vt/keyboard.c b/drivers/tty/vt/keyboard.c -index f4166263bb3a..a248429194bb 100644 ---- a/drivers/tty/vt/keyboard.c -+++ b/drivers/tty/vt/keyboard.c -@@ -49,6 +49,8 @@ - - #include - -+#include -+ - /* - * Exported functions/variables - */ -@@ -1413,6 +1415,28 @@ static void kbd_keycode(unsigned int key - } - #endif - -+ /* Trap keys when bootsplash is shown */ -+ if (bootsplash_would_render_now()) { -+ /* Deactivate bootsplash on ESC or Alt+Fxx VT switch */ -+ if (keycode >= KEY_F1 && keycode <= KEY_F12) { -+ bootsplash_disable(); -+ -+ /* -+ * No return here since we want to actually -+ * perform the VT switch. -+ */ -+ } else { -+ if (keycode == KEY_ESC) -+ bootsplash_disable(); -+ -+ /* -+ * Just drop any other keys. -+ * Their effect would be hidden by the splash. -+ */ -+ return; -+ } -+ } -+ - if (kbd->kbdmode == VC_MEDIUMRAW) { - /* - * This is extended medium raw mode, with keys above 127 diff --git a/sys-kernel/pinephone-sources/files/0008-bootsplash.patch b/sys-kernel/pinephone-sources/files/0008-bootsplash.patch deleted file mode 100644 index 8a3b715..0000000 --- a/sys-kernel/pinephone-sources/files/0008-bootsplash.patch +++ /dev/null @@ -1,21 +0,0 @@ -diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c -index 3ffc1ce29023..bc6a24c9dfa8 100644 ---- a/drivers/tty/sysrq.c -+++ b/drivers/tty/sysrq.c -@@ -49,6 +49,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -104,6 +105,8 @@ static void sysrq_handle_SAK(int key) - { - struct work_struct *SAK_work = &vc_cons[fg_console].SAK_work; - schedule_work(SAK_work); -+ -+ bootsplash_disable(); - } - static struct sysrq_key_op sysrq_SAK_op = { - .handler = sysrq_handle_SAK, diff --git a/sys-kernel/pinephone-sources/files/0009-bootsplash.patch b/sys-kernel/pinephone-sources/files/0009-bootsplash.patch deleted file mode 100644 index add68e7..0000000 --- a/sys-kernel/pinephone-sources/files/0009-bootsplash.patch +++ /dev/null @@ -1,21 +0,0 @@ -diff --git a/drivers/video/fbdev/core/fbcon.c b/drivers/video/fbdev/core/fbcon.c -index 9a39a6fcfe98..8a9c67e1c5d8 100644 ---- a/drivers/video/fbdev/core/fbcon.c -+++ b/drivers/video/fbdev/core/fbcon.c -@@ -1343,6 +1343,16 @@ static void fbcon_cursor(struct vc_data *vc, int mode) - int y; - int c = scr_readw((u16 *) vc->vc_pos); - -+ /* -+ * Disable the splash here so we don't have to hook into -+ * vt_console_print() in drivers/tty/vt/vt.c -+ * -+ * We'd disable the splash just before the call to -+ * hide_cursor() anyway, so this spot is just fine. -+ */ -+ if (oops_in_progress) -+ bootsplash_disable(); -+ - ops->cur_blink_jiffies = msecs_to_jiffies(vc->vc_cur_blink_ms); - - if (fbcon_is_inactive(vc, info) || vc->vc_deccm != 1) diff --git a/sys-kernel/pinephone-sources/files/0010-bootsplash.patch b/sys-kernel/pinephone-sources/files/0010-bootsplash.patch deleted file mode 100644 index e5c1fd0..0000000 --- a/sys-kernel/pinephone-sources/files/0010-bootsplash.patch +++ /dev/null @@ -1,321 +0,0 @@ -diff --git a/Documentation/ABI/testing/sysfs-platform-bootsplash b/Documentation/ABI/testing/sysfs-platform-bootsplash -new file mode 100644 -index 000000000000..742c7b035ded ---- /dev/null -+++ b/Documentation/ABI/testing/sysfs-platform-bootsplash -@@ -0,0 +1,11 @@ -+What: /sys/devices/platform/bootsplash.0/enabled -+Date: Oct 2017 -+KernelVersion: 4.14 -+Contact: Max Staudt -+Description: -+ Can be set and read. -+ -+ 0: Splash is disabled. -+ 1: Splash is shown whenever fbcon would show a text console -+ (i.e. no graphical application is running), and a splash -+ file is loaded. -diff --git a/Documentation/bootsplash.rst b/Documentation/bootsplash.rst -new file mode 100644 -index 000000000000..611f0c558925 ---- /dev/null -+++ b/Documentation/bootsplash.rst -@@ -0,0 +1,285 @@ -+==================== -+The Linux bootsplash -+==================== -+ -+:Date: November, 2017 -+:Author: Max Staudt -+ -+ -+The Linux bootsplash is a graphical replacement for the '``quiet``' boot -+option, typically showing a logo and a spinner animation as the system starts. -+ -+Currently, it is a part of the Framebuffer Console support, and can be found -+as ``CONFIG_BOOTSPLASH`` in the kernel configuration. This means that as long -+as it is enabled, it hijacks fbcon's output and draws a splash screen instead. -+ -+Purely compiling in the bootsplash will not render it functional - to actually -+render a splash, you will also need a splash theme file. See the example -+utility and script in ``tools/bootsplash`` for a live demo. -+ -+ -+ -+Motivation -+========== -+ -+- The '``quiet``' boot option only suppresses most messages during boot, but -+ errors are still shown. -+ -+- A user space implementation can only show a logo once user space has been -+ initialized far enough to allow this. A kernel splash can display a splash -+ immediately as soon as fbcon can be displayed. -+ -+- Implementing a splash screen in user space (e.g. Plymouth) is problematic -+ due to resource conflicts. -+ -+ For example, if Plymouth is keeping ``/dev/fb0`` (provided via vesafb/efifb) -+ open, then most DRM drivers can't replace it because the address space is -+ still busy - thus leading to a VRAM reservation error. -+ -+ See: https://bugzilla.opensuse.org/show_bug.cgi?id=980750 -+ -+ -+ -+Command line arguments -+====================== -+ -+``bootsplash.bootfile`` -+ Which file in the initramfs to load. -+ -+ The splash theme is loaded via request_firmware(), thus to load -+ ``/lib/firmware/bootsplash/mytheme`` pass the command line: -+ -+ ``bootsplash.bootfile=bootsplash/mytheme`` -+ -+ Note: The splash file *has to be* in the initramfs, as it needs to be -+ available when the splash is initialized early on. -+ -+ Default: none, i.e. a non-functional splash, falling back to showing text. -+ -+ -+ -+sysfs run-time configuration -+============================ -+ -+``/sys/devices/platform/bootsplash.0/enabled`` -+ Enable/disable the bootsplash. -+ The system boots with this set to 1, but will not show a splash unless -+ a splash theme file is also loaded. -+ -+ -+ -+Kconfig -+======= -+ -+``BOOTSPLASH`` -+ Whether to compile in bootsplash support -+ (depends on fbcon compiled in, i.e. ``FRAMEBUFFER_CONSOLE=y``) -+ -+ -+ -+Bootsplash file format -+====================== -+ -+A file specified in the kernel configuration as ``CONFIG_BOOTSPLASH_FILE`` -+or specified on the command line as ``bootsplash.bootfile`` will be loaded -+and displayed as soon as fbcon is initialized. -+ -+ -+Main blocks -+----------- -+ -+There are 3 main blocks in each file: -+ -+ - one File header -+ - n Picture headers -+ - m (Blob header + payload) blocks -+ -+ -+Structures -+---------- -+ -+The on-disk structures are defined in -+``drivers/video/fbdev/core/bootsplash_file.h`` and represent these blocks: -+ -+ - ``struct splash_file_header`` -+ -+ Represents the file header, with splash-wide information including: -+ -+ - The magic string "``Linux bootsplash``" on big-endian platforms -+ (the reverse on little endian) -+ - The file format version (for incompatible updates, hopefully never) -+ - The background color -+ - Number of picture and blob blocks -+ - Animation speed (we only allow one delay for all animations) -+ -+ The file header is followed by the first picture header. -+ -+ -+ - ``struct splash_picture_header`` -+ -+ Represents an object (picture) drawn on screen, including its immutable -+ properties: -+ - Width, height -+ - Positioning relative to screen corners or in the center -+ - Animation, if any -+ - Animation type -+ - Number of blobs -+ -+ The picture header is followed by another picture header, up until n -+ picture headers (as defined in the file header) have been read. Then, -+ the (blob header, payload) pairs follow. -+ -+ -+ - ``struct splash_blob_header`` -+ (followed by payload) -+ -+ Represents one raw data stream. So far, only picture data is defined. -+ -+ The blob header is followed by a payload, then padding to n*16 bytes, -+ then (if further blobs are defined in the file header) a further blob -+ header. -+ -+ -+Alignment -+--------- -+ -+The bootsplash file is designed to be loaded into memory as-is. -+ -+All structures are a multiple of 16 bytes long, all elements therein are -+aligned to multiples of their length, and the payloads are always padded -+up to multiples of 16 bytes. This is to allow aligned accesses in all -+cases while still simply mapping the structures over an in-memory copy of -+the bootsplash file. -+ -+ -+Further information -+------------------- -+ -+Please see ``drivers/video/fbdev/core/bootsplash_file.h`` for further -+details and possible values in the file. -+ -+ -+ -+Hooks - how the bootsplash is integrated -+======================================== -+ -+``drivers/video/fbdev/core/fbcon.c`` -+ ``fbcon_init()`` calls ``bootsplash_init()``, which loads the default -+ bootsplash file or the one specified on the kernel command line. -+ -+ ``fbcon_switch()`` draws the bootsplash when it's active, and is also -+ one of the callers of ``set_blitting_type()``. -+ -+ ``set_blitting_type()`` calls ``fbcon_set_dummyops()`` when the -+ bootsplash is active, overriding the text rendering functions. -+ -+ ``fbcon_cursor()`` will call ``bootsplash_disable()`` when an oops is -+ being printed in order to make a kernel panic visible. -+ -+``drivers/video/fbdev/core/dummyblit.c`` -+ This contains the dummy text rendering functions used to suppress text -+ output while the bootsplash is shown. -+ -+``drivers/tty/vt/keyboard.c`` -+ ``kbd_keycode()`` can call ``bootsplash_disable()`` when the user -+ presses ESC or F1-F12 (changing VT). This is to provide a built-in way -+ of disabling the splash manually at any time. -+ -+ -+ -+FAQ: Frequently Asked Questions -+=============================== -+ -+I want to see the log! How do I show the log? -+--------------------------------------------- -+ -+Press ESC while the splash is shown, or remove the ``bootsplash.bootfile`` -+parameter from the kernel cmdline. Without that parameter, the bootsplash -+will boot disabled. -+ -+ -+Why use FB instead of modern DRM/KMS? -+------------------------------------- -+ -+This is a semantic problem: -+ - What memory to draw the splash to? -+ - And what mode will the screen be set to? -+ -+Using the fbdev emulation solves these issues. -+ -+Let's start from a bare KMS system, without fbcon, and without fbdev -+emulation. In this case, as long as userspace doesn't open the KMS -+device, the state of the screen is undefined. No framebuffer is -+allocated in video RAM, and no particular mode is set. -+ -+In this case, we'd have to allocate a framebuffer to show the splash, -+and set our mode ourselves. This either wastes a screenful of video RAM -+if the splash is to co-exist with the userspace program's own allocated -+framebuffer, or there is a flicker as we deactivate and delete the -+bootsplash's framebuffer and hand control over to userspace. Since we -+may set a different mode than userspace, we'd also have flicker due -+to mode switching. -+ -+This logic is already contained in every KMS driver that performs fbdev -+emulation. So we might as well use that. And the correct API to do so is -+fbdev. Plus, we get compatibility with old, pure fbdev drivers for free. -+With the fbdev emulation, there is *always* a well-defined framebuffer -+to draw on. And the selection of mode has already been done by the -+graphics driver, so we don't need to reinvent that wheel, either. -+Finally, if userspace decides to use /dev/fbX, we don't have to worry -+about wasting video RAM, either. -+ -+ -+Why is the bootsplash integrated in fbcon? -+------------------------------------------ -+ -+Right now, the bootsplash is drawn from within fbcon, as this allows us -+to easily know *when* to draw - i.e. when we're safe from fbcon and -+userspace drawing all over our beautiful splash logo. -+ -+Separating them is not easy - see the to-do list below. -+ -+ -+ -+TO DO list for future development -+================================= -+ -+Second enable/disable switch for the system -+------------------------------------------- -+ -+It may be helpful to differentiate between the system and the user -+switching off the bootsplash. Thus, the system may make it disappear and -+reappear e.g. for a password prompt, yet once the user has pressed ESC, -+it could stay gone. -+ -+ -+Fix buggy DRM/KMS drivers -+------------------------- -+ -+Currently, the splash code manually checks for fbdev emulation provided by -+the ast, cirrus, and mgag200 DRM/KMS drivers. -+These drivers use a manual mechanism similar to deferred I/O for their FB -+emulation, and thus need to be manually flushed onto the screen in the same -+way. -+ -+This may be improved upon in several ways: -+ -+1. Changing these drivers to expose the fbdev BO's memory directly, like -+ bochsdrmfb does. -+2. Creating a new fb_ops->fb_flush() API to allow the kernel to flush the -+ framebuffer once the bootsplash has been drawn into it. -+ -+ -+Separating from fbcon -+--------------------- -+ -+Separating these two components would yield independence from fbcon being -+compiled into the kernel, and thus lowering code size in embedded -+applications. -+ -+To do this cleanly will involve a clean separation of users of an FB device -+within the kernel, i.e. fbcon, bootsplash, and userspace. Right now, the -+legacy fbcon code and VT code co-operate to switch between fbcon and -+userspace (by setting the VT into KD_GRAPHICS mode). Installing a muxer -+between these components ensues refactoring of old code and checking for -+correct locking. -diff --git a/MAINTAINERS b/MAINTAINERS -index 5c237445761e..7ffac272434e 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -2709,6 +2709,8 @@ BOOTSPLASH - M: Max Staudt - L: linux-fbdev@vger.kernel.org - S: Maintained -+F: Documentation/ABI/testing/sysfs-platform-bootsplash -+F: Documentation/bootsplash.rst - F: drivers/video/fbdev/core/bootsplash*.* - F: drivers/video/fbdev/core/dummycon.c - F: include/linux/bootsplash.h diff --git a/sys-kernel/pinephone-sources/files/0011-bootsplash.patch b/sys-kernel/pinephone-sources/files/0011-bootsplash.patch deleted file mode 100644 index 8e87eb4..0000000 --- a/sys-kernel/pinephone-sources/files/0011-bootsplash.patch +++ /dev/null @@ -1,129 +0,0 @@ -diff --git a/Documentation/ABI/testing/sysfs-platform-bootsplash b/Documentation/ABI/testing/sysfs-platform-bootsplash -index 742c7b035ded..f8f4b259220e 100644 ---- a/Documentation/ABI/testing/sysfs-platform-bootsplash -+++ b/Documentation/ABI/testing/sysfs-platform-bootsplash -@@ -9,3 +9,35 @@ Description: - 1: Splash is shown whenever fbcon would show a text console - (i.e. no graphical application is running), and a splash - file is loaded. -+ -+What: /sys/devices/platform/bootsplash.0/drop_splash -+Date: Oct 2017 -+KernelVersion: 4.14 -+Contact: Max Staudt -+Description: -+ Can only be set. -+ -+ Any value written will cause the current splash theme file -+ to be unloaded and the text console to be redrawn. -+ -+What: /sys/devices/platform/bootsplash.0/load_file -+Date: Oct 2017 -+KernelVersion: 4.14 -+Contact: Max Staudt -+Description: -+ Can only be set. -+ -+ Any value written will cause the splash to be disabled and -+ internal memory structures to be freed. -+ -+ A firmware path written will cause a new theme file to be -+ loaded and the current bootsplash to be replaced. -+ The current enabled/disabled status is not touched. -+ If the splash is already active, it will be redrawn. -+ -+ The path has to be a path in /lib/firmware since -+ request_firmware() is used to fetch the data. -+ -+ When setting the splash from the shell, echo -n has to be -+ used as any trailing '\n' newline will be interpreted as -+ part of the path. -diff --git a/Documentation/bootsplash.rst b/Documentation/bootsplash.rst -index 611f0c558925..b35aba5093e8 100644 ---- a/Documentation/bootsplash.rst -+++ b/Documentation/bootsplash.rst -@@ -67,6 +67,14 @@ sysfs run-time configuration - a splash theme file is also loaded. - - -+``/sys/devices/platform/bootsplash.0/drop_splash`` -+ Unload splash data and free memory. -+ -+``/sys/devices/platform/bootsplash.0/load_file`` -+ Load a splash file from ``/lib/firmware/``. -+ Note that trailing newlines will be interpreted as part of the file name. -+ -+ - - Kconfig - ======= -diff --git a/drivers/video/fbdev/core/bootsplash.c b/drivers/video/fbdev/core/bootsplash.c -index 13fcaabbc2ca..16cb0493629d 100644 ---- a/drivers/video/fbdev/core/bootsplash.c -+++ b/drivers/video/fbdev/core/bootsplash.c -@@ -251,11 +251,65 @@ static ssize_t splash_store_enabled(struct device *device, - return count; - } - -+static ssize_t splash_store_drop_splash(struct device *device, -+ struct device_attribute *attr, -+ const char *buf, size_t count) -+{ -+ struct splash_file_priv *fp; -+ -+ if (!buf || !count || !splash_state.file) -+ return count; -+ -+ mutex_lock(&splash_state.data_lock); -+ fp = splash_state.file; -+ splash_state.file = NULL; -+ mutex_unlock(&splash_state.data_lock); -+ -+ /* Redraw the text console */ -+ schedule_work(&splash_state.work_redraw_vc); -+ -+ bootsplash_free_file(fp); -+ -+ return count; -+} -+ -+static ssize_t splash_store_load_file(struct device *device, -+ struct device_attribute *attr, -+ const char *buf, size_t count) -+{ -+ struct splash_file_priv *fp, *fp_old; -+ -+ if (!count) -+ return 0; -+ -+ fp = bootsplash_load_firmware(&splash_state.splash_device->dev, -+ buf); -+ -+ if (!fp) -+ return -ENXIO; -+ -+ mutex_lock(&splash_state.data_lock); -+ fp_old = splash_state.file; -+ splash_state.splash_fb = NULL; -+ splash_state.file = fp; -+ mutex_unlock(&splash_state.data_lock); -+ -+ /* Update the splash or text console */ -+ schedule_work(&splash_state.work_redraw_vc); -+ -+ bootsplash_free_file(fp_old); -+ return count; -+} -+ - static DEVICE_ATTR(enabled, 0644, splash_show_enabled, splash_store_enabled); -+static DEVICE_ATTR(drop_splash, 0200, NULL, splash_store_drop_splash); -+static DEVICE_ATTR(load_file, 0200, NULL, splash_store_load_file); - - - static struct attribute *splash_dev_attrs[] = { - &dev_attr_enabled.attr, -+ &dev_attr_drop_splash.attr, -+ &dev_attr_load_file.attr, - NULL - }; - diff --git a/sys-kernel/pinephone-sources/files/0012-bootsplash.patch b/sys-kernel/pinephone-sources/files/0012-bootsplash.patch deleted file mode 100644 index 5d8ea1f..0000000 --- a/sys-kernel/pinephone-sources/files/0012-bootsplash.patch +++ /dev/null @@ -1,511 +0,0 @@ -diff --git a/MAINTAINERS b/MAINTAINERS -index 7ffac272434e..ddff07cd794c 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -2715,6 +2715,7 @@ F: drivers/video/fbdev/core/bootsplash*.* - F: drivers/video/fbdev/core/dummycon.c - F: include/linux/bootsplash.h - F: include/uapi/linux/bootsplash_file.h -+F: tools/bootsplash/* - - BPF (Safe dynamic programs and tools) - M: Alexei Starovoitov -diff --git a/tools/bootsplash/.gitignore b/tools/bootsplash/.gitignore -new file mode 100644 -index 000000000000..091b99a17567 ---- /dev/null -+++ b/tools/bootsplash/.gitignore -@@ -0,0 +1 @@ -+bootsplash-packer -diff --git a/tools/bootsplash/Makefile b/tools/bootsplash/Makefile -new file mode 100644 -index 000000000000..0ad8e8a84942 ---- /dev/null -+++ b/tools/bootsplash/Makefile -@@ -0,0 +1,9 @@ -+CC := $(CROSS_COMPILE)gcc -+CFLAGS := -I../../usr/include -+ -+PROGS := bootsplash-packer -+ -+all: $(PROGS) -+ -+clean: -+ rm -fr $(PROGS) -diff --git a/tools/bootsplash/bootsplash-packer.c b/tools/bootsplash/bootsplash-packer.c -new file mode 100644 -index 000000000000..ffb6a8b69885 ---- /dev/null -+++ b/tools/bootsplash/bootsplash-packer.c -@@ -0,0 +1,471 @@ -+/* -+ * Kernel based bootsplash. -+ * -+ * (Splash file packer tool) -+ * -+ * Authors: -+ * Max Staudt -+ * -+ * SPDX-License-Identifier: GPL-2.0 -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+ -+static void print_help(char *progname) -+{ -+ printf("Usage: %s [OPTIONS] outfile\n", progname); -+ printf("\n" -+ "Options, executed in order given:\n" -+ " -h, --help Print this help message\n" -+ "\n" -+ " --bg_red Background color (red part)\n" -+ " --bg_green Background color (green part)\n" -+ " --bg_blue Background color (blue part)\n" -+ " --bg_reserved (do not use)\n" -+ " --frame_ms Minimum milliseconds between animation steps\n" -+ "\n" -+ " --picture Start describing the next picture\n" -+ " --pic_width Picture width in pixels\n" -+ " --pic_height Picture height in pixels\n" -+ " --pic_position Coarse picture placement:\n" -+ " 0x00 - Top left\n" -+ " 0x01 - Top\n" -+ " 0x02 - Top right\n" -+ " 0x03 - Right\n" -+ " 0x04 - Bottom right\n" -+ " 0x05 - Bottom\n" -+ " 0x06 - Bottom left\n" -+ " 0x07 - Left\n" -+ "\n" -+ " Flags:\n" -+ " 0x10 - Calculate offset from corner towards center,\n" -+ " rather than from center towards corner\n" -+ " --pic_position_offset Distance from base position in pixels\n" -+ " --pic_anim_type Animation type:\n" -+ " 0 - None\n" -+ " 1 - Forward loop\n" -+ " --pic_anim_loop Loop point for animation\n" -+ "\n" -+ " --blob Include next data stream\n" -+ " --blob_type Type of data\n" -+ " --blob_picture_id Picture to associate this blob with, starting at 0\n" -+ " (default: number of last --picture)\n" -+ "\n"); -+ printf("This tool will write %s files.\n\n", -+#if __BYTE_ORDER == __BIG_ENDIAN -+ "Big Endian (BE)"); -+#elif __BYTE_ORDER == __LITTLE_ENDIAN -+ "Little Endian (LE)"); -+#else -+#error -+#endif -+} -+ -+ -+struct blob_entry { -+ struct blob_entry *next; -+ -+ char *fn; -+ -+ struct splash_blob_header header; -+}; -+ -+ -+static void dump_file_header(struct splash_file_header *h) -+{ -+ printf(" --- File header ---\n"); -+ printf("\n"); -+ printf(" version: %5u\n", h->version); -+ printf("\n"); -+ printf(" bg_red: %5u\n", h->bg_red); -+ printf(" bg_green: %5u\n", h->bg_green); -+ printf(" bg_blue: %5u\n", h->bg_blue); -+ printf(" bg_reserved: %5u\n", h->bg_reserved); -+ printf("\n"); -+ printf(" num_blobs: %5u\n", h->num_blobs); -+ printf(" num_pics: %5u\n", h->num_pics); -+ printf("\n"); -+ printf(" frame_ms: %5u\n", h->frame_ms); -+ printf("\n"); -+} -+ -+static void dump_pic_header(struct splash_pic_header *ph) -+{ -+ printf(" --- Picture header ---\n"); -+ printf("\n"); -+ printf(" width: %5u\n", ph->width); -+ printf(" height: %5u\n", ph->height); -+ printf("\n"); -+ printf(" num_blobs: %5u\n", ph->num_blobs); -+ printf("\n"); -+ printf(" position: %0x3x\n", ph->position); -+ printf(" position_offset: %5u\n", ph->position_offset); -+ printf("\n"); -+ printf(" anim_type: %5u\n", ph->anim_type); -+ printf(" anim_loop: %5u\n", ph->anim_loop); -+ printf("\n"); -+} -+ -+static void dump_blob(struct blob_entry *b) -+{ -+ printf(" --- Blob header ---\n"); -+ printf("\n"); -+ printf(" length: %7u\n", b->header.length); -+ printf(" type: %7u\n", b->header.type); -+ printf("\n"); -+ printf(" picture_id: %7u\n", b->header.picture_id); -+ printf("\n"); -+} -+ -+ -+#define OPT_MAX(var, max) \ -+ do { \ -+ if ((var) > max) { \ -+ fprintf(stderr, "--%s: Invalid value\n", \ -+ long_options[option_index].name); \ -+ break; \ -+ } \ -+ } while (0) -+ -+static struct option long_options[] = { -+ {"help", 0, 0, 'h'}, -+ {"bg_red", 1, 0, 10001}, -+ {"bg_green", 1, 0, 10002}, -+ {"bg_blue", 1, 0, 10003}, -+ {"bg_reserved", 1, 0, 10004}, -+ {"frame_ms", 1, 0, 10005}, -+ {"picture", 0, 0, 20000}, -+ {"pic_width", 1, 0, 20001}, -+ {"pic_height", 1, 0, 20002}, -+ {"pic_position", 1, 0, 20003}, -+ {"pic_position_offset", 1, 0, 20004}, -+ {"pic_anim_type", 1, 0, 20005}, -+ {"pic_anim_loop", 1, 0, 20006}, -+ {"blob", 1, 0, 30000}, -+ {"blob_type", 1, 0, 30001}, -+ {"blob_picture_id", 1, 0, 30002}, -+ {NULL, 0, NULL, 0} -+}; -+ -+ -+int main(int argc, char **argv) -+{ -+ FILE *of; -+ char *ofn; -+ int c; -+ int option_index = 0; -+ -+ unsigned long ul; -+ struct splash_file_header fh = {}; -+ struct splash_pic_header ph[255]; -+ struct blob_entry *blob_first = NULL; -+ struct blob_entry *blob_last = NULL; -+ struct blob_entry *blob_cur = NULL; -+ -+ if (argc < 2) { -+ print_help(argv[0]); -+ return EXIT_FAILURE; -+ } -+ -+ -+ /* Parse and and execute user commands */ -+ while ((c = getopt_long(argc, argv, "h", -+ long_options, &option_index)) != -1) { -+ switch (c) { -+ case 10001: /* bg_red */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 255); -+ fh.bg_red = ul; -+ break; -+ case 10002: /* bg_green */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 255); -+ fh.bg_green = ul; -+ break; -+ case 10003: /* bg_blue */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 255); -+ fh.bg_blue = ul; -+ break; -+ case 10004: /* bg_reserved */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 255); -+ fh.bg_reserved = ul; -+ break; -+ case 10005: /* frame_ms */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 65535); -+ fh.frame_ms = ul; -+ break; -+ -+ -+ case 20000: /* picture */ -+ if (fh.num_pics >= 255) { -+ fprintf(stderr, "--%s: Picture array full\n", -+ long_options[option_index].name); -+ break; -+ } -+ -+ fh.num_pics++; -+ break; -+ -+ case 20001: /* pic_width */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 65535); -+ ph[fh.num_pics - 1].width = ul; -+ break; -+ -+ case 20002: /* pic_height */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 65535); -+ ph[fh.num_pics - 1].height = ul; -+ break; -+ -+ case 20003: /* pic_position */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 255); -+ ph[fh.num_pics - 1].position = ul; -+ break; -+ -+ case 20004: /* pic_position_offset */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 255); -+ ph[fh.num_pics - 1].position_offset = ul; -+ break; -+ -+ case 20005: /* pic_anim_type */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 255); -+ ph[fh.num_pics - 1].anim_type = ul; -+ break; -+ -+ case 20006: /* pic_anim_loop */ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 255); -+ ph[fh.num_pics - 1].anim_loop = ul; -+ break; -+ -+ -+ case 30000: /* blob */ -+ if (fh.num_blobs >= 65535) { -+ fprintf(stderr, "--%s: Blob array full\n", -+ long_options[option_index].name); -+ break; -+ } -+ -+ blob_cur = calloc(1, sizeof(struct blob_entry)); -+ if (!blob_cur) { -+ fprintf(stderr, "--%s: Out of memory\n", -+ long_options[option_index].name); -+ break; -+ } -+ -+ blob_cur->fn = optarg; -+ if (fh.num_pics) -+ blob_cur->header.picture_id = fh.num_pics - 1; -+ -+ if (!blob_first) -+ blob_first = blob_cur; -+ if (blob_last) -+ blob_last->next = blob_cur; -+ blob_last = blob_cur; -+ fh.num_blobs++; -+ break; -+ -+ case 30001: /* blob_type */ -+ if (!blob_cur) { -+ fprintf(stderr, "--%s: No blob selected\n", -+ long_options[option_index].name); -+ break; -+ } -+ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 255); -+ blob_cur->header.type = ul; -+ break; -+ -+ case 30002: /* blob_picture_id */ -+ if (!blob_cur) { -+ fprintf(stderr, "--%s: No blob selected\n", -+ long_options[option_index].name); -+ break; -+ } -+ -+ ul = strtoul(optarg, NULL, 0); -+ OPT_MAX(ul, 255); -+ blob_cur->header.picture_id = ul; -+ break; -+ -+ -+ -+ case 'h': -+ case '?': -+ default: -+ print_help(argv[0]); -+ goto EXIT; -+ } /* switch (c) */ -+ } /* while ((c = getopt_long(...)) != -1) */ -+ -+ /* Consume and drop lone arguments */ -+ while (optind < argc) { -+ ofn = argv[optind]; -+ optind++; -+ } -+ -+ -+ /* Read file lengths */ -+ for (blob_cur = blob_first; blob_cur; blob_cur = blob_cur->next) { -+ FILE *f; -+ long pos; -+ int i; -+ -+ if (!blob_cur->fn) -+ continue; -+ -+ f = fopen(blob_cur->fn, "rb"); -+ if (!f) -+ goto ERR_FILE_LEN; -+ -+ if (fseek(f, 0, SEEK_END)) -+ goto ERR_FILE_LEN; -+ -+ pos = ftell(f); -+ if (pos < 0 || pos > (1 << 30)) -+ goto ERR_FILE_LEN; -+ -+ blob_cur->header.length = pos; -+ -+ fclose(f); -+ continue; -+ -+ERR_FILE_LEN: -+ fprintf(stderr, "Error getting file length (or too long): %s\n", -+ blob_cur->fn); -+ if (f) -+ fclose(f); -+ continue; -+ } -+ -+ -+ /* Set magic headers */ -+#if __BYTE_ORDER == __BIG_ENDIAN -+ memcpy(&fh.id[0], BOOTSPLASH_MAGIC_BE, 16); -+#elif __BYTE_ORDER == __LITTLE_ENDIAN -+ memcpy(&fh.id[0], BOOTSPLASH_MAGIC_LE, 16); -+#else -+#error -+#endif -+ fh.version = BOOTSPLASH_VERSION; -+ -+ /* Set blob counts */ -+ for (blob_cur = blob_first; blob_cur; blob_cur = blob_cur->next) { -+ if (blob_cur->header.picture_id < fh.num_pics) -+ ph[blob_cur->header.picture_id].num_blobs++; -+ } -+ -+ -+ /* Dump structs */ -+ dump_file_header(&fh); -+ -+ for (ul = 0; ul < fh.num_pics; ul++) -+ dump_pic_header(&ph[ul]); -+ -+ for (blob_cur = blob_first; blob_cur; blob_cur = blob_cur->next) -+ dump_blob(blob_cur); -+ -+ -+ /* Write to file */ -+ printf("Writing splash to file: %s\n", ofn); -+ of = fopen(ofn, "wb"); -+ if (!of) -+ goto ERR_WRITING; -+ -+ if (fwrite(&fh, sizeof(struct splash_file_header), 1, of) != 1) -+ goto ERR_WRITING; -+ -+ for (ul = 0; ul < fh.num_pics; ul++) { -+ if (fwrite(&ph[ul], sizeof(struct splash_pic_header), 1, of) -+ != 1) -+ goto ERR_WRITING; -+ } -+ -+ blob_cur = blob_first; -+ while (blob_cur) { -+ struct blob_entry *blob_old = blob_cur; -+ FILE *f; -+ char *buf[256]; -+ uint32_t left; -+ -+ if (fwrite(&blob_cur->header, -+ sizeof(struct splash_blob_header), 1, of) != 1) -+ goto ERR_WRITING; -+ -+ if (!blob_cur->header.length || !blob_cur->fn) -+ continue; -+ -+ f = fopen(blob_cur->fn, "rb"); -+ if (!f) -+ goto ERR_FILE_COPY; -+ -+ left = blob_cur->header.length; -+ while (left >= sizeof(buf)) { -+ if (fread(buf, sizeof(buf), 1, f) != 1) -+ goto ERR_FILE_COPY; -+ if (fwrite(buf, sizeof(buf), 1, of) != 1) -+ goto ERR_FILE_COPY; -+ left -= sizeof(buf); -+ } -+ if (left) { -+ if (fread(buf, left, 1, f) != 1) -+ goto ERR_FILE_COPY; -+ if (fwrite(buf, left, 1, of) != 1) -+ goto ERR_FILE_COPY; -+ } -+ -+ /* Pad data stream to 16 bytes */ -+ if (left % 16) { -+ if (fwrite("\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0", -+ 16 - (left % 16), 1, of) != 1) -+ goto ERR_FILE_COPY; -+ } -+ -+ fclose(f); -+ blob_cur = blob_cur->next; -+ free(blob_old); -+ continue; -+ -+ERR_FILE_COPY: -+ if (f) -+ fclose(f); -+ goto ERR_WRITING; -+ } -+ -+ fclose(of); -+ -+EXIT: -+ return EXIT_SUCCESS; -+ -+ -+ERR_WRITING: -+ fprintf(stderr, "Error writing splash.\n"); -+ fprintf(stderr, "The output file is probably corrupt.\n"); -+ if (of) -+ fclose(of); -+ -+ while (blob_cur) { -+ struct blob_entry *blob_old = blob_cur; -+ -+ blob_cur = blob_cur->next; -+ free(blob_old); -+ } -+ -+ return EXIT_FAILURE; -+} diff --git a/sys-kernel/pinephone-sources/files/5.11.3.patch b/sys-kernel/pinephone-sources/files/5.11.3.patch deleted file mode 100644 index 116d4bc..0000000 --- a/sys-kernel/pinephone-sources/files/5.11.3.patch +++ /dev/null @@ -1,31655 +0,0 @@ -diff --git a/Documentation/admin-guide/perf/arm-cmn.rst b/Documentation/admin-guide/perf/arm-cmn.rst -index 0e48093460140..796e25b7027b2 100644 ---- a/Documentation/admin-guide/perf/arm-cmn.rst -+++ b/Documentation/admin-guide/perf/arm-cmn.rst -@@ -17,7 +17,7 @@ PMU events - ---------- - - The PMU driver registers a single PMU device for the whole interconnect, --see /sys/bus/event_source/devices/arm_cmn. Multi-chip systems may link -+see /sys/bus/event_source/devices/arm_cmn_0. Multi-chip systems may link - more than one CMN together via external CCIX links - in this situation, - each mesh counts its own events entirely independently, and additional - PMU devices will be named arm_cmn_{1..n}. -diff --git a/Documentation/admin-guide/sysctl/vm.rst b/Documentation/admin-guide/sysctl/vm.rst -index e35a3f2fb006a..586cd4b864284 100644 ---- a/Documentation/admin-guide/sysctl/vm.rst -+++ b/Documentation/admin-guide/sysctl/vm.rst -@@ -983,11 +983,11 @@ that benefit from having their data cached, zone_reclaim_mode should be - left disabled as the caching effect is likely to be more important than - data locality. - --zone_reclaim may be enabled if it's known that the workload is partitioned --such that each partition fits within a NUMA node and that accessing remote --memory would cause a measurable performance reduction. The page allocator --will then reclaim easily reusable pages (those page cache pages that are --currently not used) before allocating off node pages. -+Consider enabling one or more zone_reclaim mode bits if it's known that the -+workload is partitioned such that each partition fits within a NUMA node -+and that accessing remote memory would cause a measurable performance -+reduction. The page allocator will take additional actions before -+allocating off node pages. - - Allowing zone reclaim to write out pages stops processes that are - writing large amounts of data from dirtying pages on other nodes. Zone -diff --git a/Documentation/filesystems/seq_file.rst b/Documentation/filesystems/seq_file.rst -index 56856481dc8d8..a6726082a7c25 100644 ---- a/Documentation/filesystems/seq_file.rst -+++ b/Documentation/filesystems/seq_file.rst -@@ -217,6 +217,12 @@ between the calls to start() and stop(), so holding a lock during that time - is a reasonable thing to do. The seq_file code will also avoid taking any - other locks while the iterator is active. - -+The iterater value returned by start() or next() is guaranteed to be -+passed to a subsequent next() or stop() call. This allows resources -+such as locks that were taken to be reliably released. There is *no* -+guarantee that the iterator will be passed to show(), though in practice -+it often will be. -+ - - Formatted output - ================ -diff --git a/Documentation/scsi/libsas.rst b/Documentation/scsi/libsas.rst -index 7216b5d258001..de422253b0ab7 100644 ---- a/Documentation/scsi/libsas.rst -+++ b/Documentation/scsi/libsas.rst -@@ -190,12 +190,10 @@ The event interface:: - - /* LLDD calls these to notify the class of an event. */ - void (*notify_ha_event)(struct sas_ha_struct *, enum ha_event); -- void (*notify_port_event)(struct sas_phy *, enum port_event); -- void (*notify_phy_event)(struct sas_phy *, enum phy_event); -- --When sas_register_ha() returns, those are set and can be --called by the LLDD to notify the SAS layer of such events --the SAS layer. -+ void sas_notify_port_event(struct sas_phy *, enum port_event); -+ void sas_notify_phy_event(struct sas_phy *, enum phy_event); -+ void sas_notify_port_event_gfp(struct sas_phy *, enum port_event, gfp_t); -+ void sas_notify_phy_event_gfp(struct sas_phy *, enum phy_event, gfp_t); - - The port notification:: - -diff --git a/Documentation/security/keys/core.rst b/Documentation/security/keys/core.rst -index aa0081685ee11..b3ed5c581034c 100644 ---- a/Documentation/security/keys/core.rst -+++ b/Documentation/security/keys/core.rst -@@ -1040,8 +1040,8 @@ The keyctl syscall functions are: - - "key" is the ID of the key to be watched. - -- "queue_fd" is a file descriptor referring to an open "/dev/watch_queue" -- which manages the buffer into which notifications will be delivered. -+ "queue_fd" is a file descriptor referring to an open pipe which -+ manages the buffer into which notifications will be delivered. - - "filter" is either NULL to remove a watch or a filter specification to - indicate what events are required from the key. -diff --git a/Makefile b/Makefile -index 617be9fd59ce5..a8c1162de3a0b 100644 ---- a/Makefile -+++ b/Makefile -@@ -1,7 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0 - VERSION = 5 - PATCHLEVEL = 11 --SUBLEVEL = 2 -+SUBLEVEL = 3 - EXTRAVERSION = - NAME = 💕 Valentine's Day Edition 💕 - -diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S -index d9cce7238a365..73eee41826e2d 100644 ---- a/arch/arm/boot/compressed/head.S -+++ b/arch/arm/boot/compressed/head.S -@@ -1164,9 +1164,9 @@ __armv4_mmu_cache_off: - __armv7_mmu_cache_off: - mrc p15, 0, r0, c1, c0 - #ifdef CONFIG_MMU -- bic r0, r0, #0x000d -+ bic r0, r0, #0x0005 - #else -- bic r0, r0, #0x000c -+ bic r0, r0, #0x0004 - #endif - mcr p15, 0, r0, c1, c0 @ turn MMU and cache off - mov r0, #0 -diff --git a/arch/arm/boot/dts/armada-388-helios4.dts b/arch/arm/boot/dts/armada-388-helios4.dts -index b3728de3bd3fa..ec134e22bae3e 100644 ---- a/arch/arm/boot/dts/armada-388-helios4.dts -+++ b/arch/arm/boot/dts/armada-388-helios4.dts -@@ -70,6 +70,9 @@ - - system-leds { - compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&helios_system_led_pins>; -+ - status-led { - label = "helios4:green:status"; - gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; -@@ -86,6 +89,9 @@ - - io-leds { - compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&helios_io_led_pins>; -+ - sata1-led { - label = "helios4:green:ata1"; - gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; -@@ -121,11 +127,15 @@ - fan1: j10-pwm { - compatible = "pwm-fan"; - pwms = <&gpio1 9 40000>; /* Target freq:25 kHz */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&helios_fan1_pins>; - }; - - fan2: j17-pwm { - compatible = "pwm-fan"; - pwms = <&gpio1 23 40000>; /* Target freq:25 kHz */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&helios_fan2_pins>; - }; - - usb2_phy: usb2-phy { -@@ -286,16 +296,22 @@ - "mpp39", "mpp40"; - marvell,function = "sd0"; - }; -- helios_led_pins: helios-led-pins { -- marvell,pins = "mpp24", "mpp25", -- "mpp49", "mpp50", -+ helios_system_led_pins: helios-system-led-pins { -+ marvell,pins = "mpp24", "mpp25"; -+ marvell,function = "gpio"; -+ }; -+ helios_io_led_pins: helios-io-led-pins { -+ marvell,pins = "mpp49", "mpp50", - "mpp52", "mpp53", - "mpp54"; - marvell,function = "gpio"; - }; -- helios_fan_pins: helios-fan-pins { -- marvell,pins = "mpp41", "mpp43", -- "mpp48", "mpp55"; -+ helios_fan1_pins: helios_fan1_pins { -+ marvell,pins = "mpp41", "mpp43"; -+ marvell,function = "gpio"; -+ }; -+ helios_fan2_pins: helios_fan2_pins { -+ marvell,pins = "mpp48", "mpp55"; - marvell,function = "gpio"; - }; - microsom_spi1_cs_pins: spi1-cs-pins { -diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi -index b3dafbc8cacac..e7a45ba18fc9c 100644 ---- a/arch/arm/boot/dts/aspeed-g4.dtsi -+++ b/arch/arm/boot/dts/aspeed-g4.dtsi -@@ -375,6 +375,7 @@ - compatible = "aspeed,ast2400-lpc-snoop"; - reg = <0x10 0x8>; - interrupts = <8>; -+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>; - status = "disabled"; - }; - -diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi -index 5bc0de0f33653..21930521a986a 100644 ---- a/arch/arm/boot/dts/aspeed-g5.dtsi -+++ b/arch/arm/boot/dts/aspeed-g5.dtsi -@@ -497,6 +497,7 @@ - compatible = "aspeed,ast2500-lpc-snoop"; - reg = <0x10 0x8>; - interrupts = <8>; -+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>; - status = "disabled"; - }; - -diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi -index 810b0676ab033..3ee470c2b7b56 100644 ---- a/arch/arm/boot/dts/aspeed-g6.dtsi -+++ b/arch/arm/boot/dts/aspeed-g6.dtsi -@@ -524,6 +524,7 @@ - compatible = "aspeed,ast2600-lpc-snoop"; - reg = <0x0 0x80>; - interrupts = ; -+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>; - status = "disabled"; - }; - -diff --git a/arch/arm/boot/dts/exynos3250-artik5.dtsi b/arch/arm/boot/dts/exynos3250-artik5.dtsi -index 04290ec4583a6..829c05b2c405f 100644 ---- a/arch/arm/boot/dts/exynos3250-artik5.dtsi -+++ b/arch/arm/boot/dts/exynos3250-artik5.dtsi -@@ -79,7 +79,7 @@ - pmic@66 { - compatible = "samsung,s2mps14-pmic"; - interrupt-parent = <&gpx3>; -- interrupts = <5 IRQ_TYPE_NONE>; -+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&s2mps14_irq>; - reg = <0x66>; -diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts -index 69451566945dc..fae046e08a5dd 100644 ---- a/arch/arm/boot/dts/exynos3250-monk.dts -+++ b/arch/arm/boot/dts/exynos3250-monk.dts -@@ -200,7 +200,7 @@ - pmic@66 { - compatible = "samsung,s2mps14-pmic"; - interrupt-parent = <&gpx0>; -- interrupts = <7 IRQ_TYPE_NONE>; -+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - reg = <0x66>; - wakeup-source; - -diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts -index a26e3e582a7e7..d64ccf4b7d324 100644 ---- a/arch/arm/boot/dts/exynos3250-rinato.dts -+++ b/arch/arm/boot/dts/exynos3250-rinato.dts -@@ -270,7 +270,7 @@ - pmic@66 { - compatible = "samsung,s2mps14-pmic"; - interrupt-parent = <&gpx0>; -- interrupts = <7 IRQ_TYPE_NONE>; -+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - reg = <0x66>; - wakeup-source; - -diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts -index 9d2baea62d0d7..fba1462b19dfd 100644 ---- a/arch/arm/boot/dts/exynos5250-spring.dts -+++ b/arch/arm/boot/dts/exynos5250-spring.dts -@@ -109,7 +109,7 @@ - compatible = "samsung,s5m8767-pmic"; - reg = <0x66>; - interrupt-parent = <&gpx3>; -- interrupts = <2 IRQ_TYPE_NONE>; -+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&s5m8767_irq &s5m8767_dvs &s5m8767_ds>; - wakeup-source; -diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts -index bf457d0c02ebd..1aad4859c5f14 100644 ---- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts -+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts -@@ -349,7 +349,7 @@ - reg = <0x66>; - - interrupt-parent = <&gpx3>; -- interrupts = <2 IRQ_TYPE_EDGE_FALLING>; -+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&s2mps11_irq>; - -diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi -index d0df560eb0db1..6d690b1db0994 100644 ---- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi -+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi -@@ -509,7 +509,7 @@ - samsung,s2mps11-acokb-ground; - - interrupt-parent = <&gpx0>; -- interrupts = <4 IRQ_TYPE_EDGE_FALLING>; -+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&s2mps11_irq>; - -diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi -index cb309743de5da..dd8ef58cbaed4 100644 ---- a/arch/arm/boot/dts/omap443x.dtsi -+++ b/arch/arm/boot/dts/omap443x.dtsi -@@ -33,10 +33,12 @@ - }; - - ocp { -+ /* 4430 has only gpio_86 tshut and no talert interrupt */ - bandgap: bandgap@4a002260 { - reg = <0x4a002260 0x4 - 0x4a00232C 0x4>; - compatible = "ti,omap4430-bandgap"; -+ gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; - - #thermal-sensor-cells = <0>; - }; -diff --git a/arch/arm/boot/dts/tegra30-ouya.dts b/arch/arm/boot/dts/tegra30-ouya.dts -index 74da1360d297c..0368b3b816ef2 100644 ---- a/arch/arm/boot/dts/tegra30-ouya.dts -+++ b/arch/arm/boot/dts/tegra30-ouya.dts -@@ -4352,8 +4352,8 @@ - nvidia,pins = "cam_mclk_pcc0"; - nvidia,function = "vi_alt3"; - nvidia,pull = ; -- nvidia,tristate = ; -- nvidia,enable-input = ; -+ nvidia,tristate = ; -+ nvidia,enable-input = ; - }; - pcc1 { - nvidia,pins = "pcc1"; -diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c -index 0203e545bbc8d..075a2e0ed2c15 100644 ---- a/arch/arm/kernel/sys_oabi-compat.c -+++ b/arch/arm/kernel/sys_oabi-compat.c -@@ -248,6 +248,7 @@ struct oabi_epoll_event { - __u64 data; - } __attribute__ ((packed,aligned(4))); - -+#ifdef CONFIG_EPOLL - asmlinkage long sys_oabi_epoll_ctl(int epfd, int op, int fd, - struct oabi_epoll_event __user *event) - { -@@ -298,6 +299,20 @@ asmlinkage long sys_oabi_epoll_wait(int epfd, - kfree(kbuf); - return err ? -EFAULT : ret; - } -+#else -+asmlinkage long sys_oabi_epoll_ctl(int epfd, int op, int fd, -+ struct oabi_epoll_event __user *event) -+{ -+ return -EINVAL; -+} -+ -+asmlinkage long sys_oabi_epoll_wait(int epfd, -+ struct oabi_epoll_event __user *events, -+ int maxevents, int timeout) -+{ -+ return -EINVAL; -+} -+#endif - - struct oabi_sembuf { - unsigned short sem_num; -diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S -index 0184de05c1be1..b683c2caa40b9 100644 ---- a/arch/arm/mach-at91/pm_suspend.S -+++ b/arch/arm/mach-at91/pm_suspend.S -@@ -442,7 +442,7 @@ ENDPROC(at91_backup_mode) - str tmp1, [pmc, #AT91_PMC_PLL_UPDT] - - /* step 2. */ -- ldr tmp1, =#AT91_PMC_PLL_ACR_DEFAULT_PLLA -+ ldr tmp1, =AT91_PMC_PLL_ACR_DEFAULT_PLLA - str tmp1, [pmc, #AT91_PMC_PLL_ACR] - - /* step 3. */ -diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig -index f7211b57b1e78..165c184801e19 100644 ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -13,7 +13,6 @@ config MACH_IXP4XX_OF - select I2C - select I2C_IOP3XX - select PCI -- select TIMER_OF - select USE_OF - help - Say 'Y' here to support Device Tree-based IXP4xx platforms. -diff --git a/arch/arm/mach-s3c/irq-s3c24xx-fiq.S b/arch/arm/mach-s3c/irq-s3c24xx-fiq.S -index b54cbd0122413..5d238d9a798e1 100644 ---- a/arch/arm/mach-s3c/irq-s3c24xx-fiq.S -+++ b/arch/arm/mach-s3c/irq-s3c24xx-fiq.S -@@ -35,7 +35,6 @@ - @ and an offset to the irq acknowledgment word - - ENTRY(s3c24xx_spi_fiq_rx) --s3c24xx_spi_fix_rx: - .word fiq_rx_end - fiq_rx_start - .word fiq_rx_irq_ack - fiq_rx_start - fiq_rx_start: -@@ -49,7 +48,7 @@ fiq_rx_start: - strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] - - subs fiq_rcount, fiq_rcount, #1 -- subnes pc, lr, #4 @@ return, still have work to do -+ subsne pc, lr, #4 @@ return, still have work to do - - @@ set IRQ controller so that next op will trigger IRQ - mov fiq_rtmp, #0 -@@ -61,7 +60,6 @@ fiq_rx_irq_ack: - fiq_rx_end: - - ENTRY(s3c24xx_spi_fiq_txrx) --s3c24xx_spi_fiq_txrx: - .word fiq_txrx_end - fiq_txrx_start - .word fiq_txrx_irq_ack - fiq_txrx_start - fiq_txrx_start: -@@ -76,7 +74,7 @@ fiq_txrx_start: - strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] - - subs fiq_rcount, fiq_rcount, #1 -- subnes pc, lr, #4 @@ return, still have work to do -+ subsne pc, lr, #4 @@ return, still have work to do - - mov fiq_rtmp, #0 - str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] -@@ -88,7 +86,6 @@ fiq_txrx_irq_ack: - fiq_txrx_end: - - ENTRY(s3c24xx_spi_fiq_tx) --s3c24xx_spi_fix_tx: - .word fiq_tx_end - fiq_tx_start - .word fiq_tx_irq_ack - fiq_tx_start - fiq_tx_start: -@@ -101,7 +98,7 @@ fiq_tx_start: - strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] - - subs fiq_rcount, fiq_rcount, #1 -- subnes pc, lr, #4 @@ return, still have work to do -+ subsne pc, lr, #4 @@ return, still have work to do - - mov fiq_rtmp, #0 - str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] -diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig -index f39568b28ec1c..3dfb25afa616f 100644 ---- a/arch/arm64/Kconfig -+++ b/arch/arm64/Kconfig -@@ -522,7 +522,7 @@ config ARM64_ERRATUM_1024718 - help - This option adds a workaround for ARM Cortex-A55 Erratum 1024718. - -- Affected Cortex-A55 cores (r0p0, r0p1, r1p0) could cause incorrect -+ Affected Cortex-A55 cores (all revisions) could cause incorrect - update of the hardware dirty bit when the DBM/AP bits are updated - without a break-before-make. The workaround is to disable the usage - of hardware DBM locally on the affected cores. CPUs not affected by -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi -index c48692b06e1fa..3402cec87035b 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi -@@ -32,7 +32,6 @@ - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - vmmc-supply = <®_dcdc1>; -- non-removable; - disable-wp; - bus-width = <4>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ -diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts -index 4b517ca720597..06de0b1ce7267 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts -@@ -89,13 +89,12 @@ - status = "okay"; - }; - --&sd_emmc_a { -- sd-uhs-sdr50; --}; -- - &usb { - phys = <&usb2_phy0>, <&usb2_phy1>; - phy-names = "usb2-phy0", "usb2-phy1"; - }; - */ - -+&sd_emmc_a { -+ sd-uhs-sdr50; -+}; -diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -index f873dc44ce9ca..55d9b56ac749d 100644 ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -164,7 +164,7 @@ - nand@1800 { - #address-cells = <1>; - #size-cells = <0>; -- compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand"; -+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; - reg = <0x1800 0x600>, <0x2000 0x10>; - reg-names = "nand", "nand-int-base"; - interrupts = ; -diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi -index 03486a8ffc67e..4c5106a0860d0 100644 ---- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi -+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi -@@ -388,7 +388,7 @@ - pmic@66 { - compatible = "samsung,s2mps13-pmic"; - interrupt-parent = <&gpa0>; -- interrupts = <7 IRQ_TYPE_NONE>; -+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - reg = <0x66>; - samsung,s2mps11-wrstbi-ground; - -diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts -index 695d4c1406466..125c03f351d97 100644 ---- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts -+++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts -@@ -90,7 +90,7 @@ - pmic@66 { - compatible = "samsung,s2mps15-pmic"; - reg = <0x66>; -- interrupts = <2 IRQ_TYPE_NONE>; -+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - interrupt-parent = <&gpa0>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_irq>; -diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi -index e1c0fcba5c206..07c099b4ed5b5 100644 ---- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi -+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi -@@ -166,7 +166,7 @@ - rx-fifo-depth = <16384>; - snps,multicast-filter-bins = <256>; - iommus = <&smmu 2>; -- altr,sysmgr-syscon = <&sysmgr 0x48 8>; -+ altr,sysmgr-syscon = <&sysmgr 0x48 0>; - clocks = <&clkmgr AGILEX_EMAC1_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>; - clock-names = "stmmaceth", "ptp_ref"; - status = "disabled"; -@@ -184,7 +184,7 @@ - rx-fifo-depth = <16384>; - snps,multicast-filter-bins = <256>; - iommus = <&smmu 3>; -- altr,sysmgr-syscon = <&sysmgr 0x4c 16>; -+ altr,sysmgr-syscon = <&sysmgr 0x4c 0>; - clocks = <&clkmgr AGILEX_EMAC2_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>; - clock-names = "stmmaceth", "ptp_ref"; - status = "disabled"; -diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts -index f5ec3b6447692..d239ab70ed995 100644 ---- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts -+++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts -@@ -205,7 +205,7 @@ - }; - - partition@20000 { -- label = "u-boot"; -+ label = "a53-firmware"; - reg = <0x20000 0x160000>; - }; - -diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -index 5b9ec032ce8d8..7c6d871538a63 100644 ---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -698,6 +698,8 @@ - clocks = <&pericfg CLK_PERI_MSDC30_1_PD>, - <&topckgen CLK_TOP_AXI_SEL>; - clock-names = "source", "hclk"; -+ resets = <&pericfg MT7622_PERI_MSDC1_SW_RST>; -+ reset-names = "hrst"; - status = "disabled"; - }; - -diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi -index 5b782a4769e7e..36a90dd2fa7c6 100644 ---- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi -@@ -6,7 +6,7 @@ - */ - - #include --#include -+#include - #include - #include - #include -@@ -661,6 +661,7 @@ - compatible = "mediatek,mt8183-disp-pwm"; - reg = <0 0x1100e000 0 0x1000>; - interrupts = ; -+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; - #pwm-cells = <2>; - clocks = <&topckgen CLK_TOP_MUX_DISP_PWM>, - <&infracfg CLK_INFRA_DISP_PWM>; -@@ -1011,7 +1012,7 @@ - clocks = <&mmsys CLK_MM_DISP_RDMA0>; - iommus = <&iommu M4U_PORT_DISP_RDMA0>; - mediatek,larb = <&larb0>; -- mediatek,rdma_fifo_size = <5120>; -+ mediatek,rdma-fifo-size = <5120>; - mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; - }; - -@@ -1023,7 +1024,7 @@ - clocks = <&mmsys CLK_MM_DISP_RDMA1>; - iommus = <&iommu M4U_PORT_DISP_RDMA1>; - mediatek,larb = <&larb0>; -- mediatek,rdma_fifo_size = <2048>; -+ mediatek,rdma-fifo-size = <2048>; - mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; - }; - -@@ -1055,8 +1056,7 @@ - }; - - gamma0: gamma@14011000 { -- compatible = "mediatek,mt8183-disp-gamma", -- "mediatek,mt8173-disp-gamma"; -+ compatible = "mediatek,mt8183-disp-gamma"; - reg = <0 0x14011000 0 0x1000>; - interrupts = ; - power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; -diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi -index f91269492d729..f1af798abd749 100644 ---- a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi -+++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi -@@ -106,6 +106,9 @@ - interrupt-parent = <&msmgpio>; - interrupts = <115 IRQ_TYPE_EDGE_RISING>; - -+ vdd-supply = <&pm8916_l17>; -+ vddio-supply = <&pm8916_l5>; -+ - pinctrl-names = "default"; - pinctrl-0 = <&accel_int_default>; - }; -@@ -113,6 +116,9 @@ - magnetometer@12 { - compatible = "bosch,bmc150_magn"; - reg = <0x12>; -+ -+ vdd-supply = <&pm8916_l17>; -+ vddio-supply = <&pm8916_l5>; - }; - }; - -diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dts -index e39c04d977c25..dd35c3344358c 100644 ---- a/arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dts -+++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dts -@@ -38,7 +38,7 @@ - - &pronto { - iris { -- compatible = "qcom,wcn3680"; -+ compatible = "qcom,wcn3660b"; - }; - }; - -diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi -index 402e891a84ab6..d25f6dc751e99 100644 ---- a/arch/arm64/boot/dts/qcom/msm8916.dtsi -+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi -@@ -56,7 +56,7 @@ - no-map; - }; - -- reserved@8668000 { -+ reserved@86680000 { - reg = <0x0 0x86680000 0x0 0x80000>; - no-map; - }; -@@ -69,7 +69,7 @@ - qcom,client-id = <1>; - }; - -- rfsa@867e00000 { -+ rfsa@867e0000 { - reg = <0x0 0x867e0000 0x0 0x20000>; - no-map; - }; -diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts -index ce22d4fa383e6..f13a63ca8efd6 100644 ---- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts -+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts -@@ -122,7 +122,7 @@ - - &apps_rsc { - pm8009-rpmh-regulators { -- compatible = "qcom,pm8009-rpmh-regulators"; -+ compatible = "qcom,pm8009-1-rpmh-regulators"; - qcom,pmic-id = "f"; - - vdd-s1-supply = <&vph_pwr>; -@@ -131,6 +131,13 @@ - vdd-l5-l6-supply = <&vreg_bob>; - vdd-l7-supply = <&vreg_s4a_1p8>; - -+ vreg_s2f_0p95: smps2 { -+ regulator-name = "vreg_s2f_0p95"; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <952000>; -+ regulator-initial-mode = ; -+ }; -+ - vreg_l1f_1p1: ldo1 { - regulator-name = "vreg_l1f_1p1"; - regulator-min-microvolt = <1104000>; -@@ -491,8 +498,6 @@ - vqmmc-supply = <&vreg_l6c_2p96>; - cd-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>; - bus-width = <4>; -- /* there seem to be issues with HS400-1.8V mode, so disable it */ -- no-1-8-v; - no-sdio; - no-emmc; - }; -@@ -706,13 +711,13 @@ - cmd { - pins = "sdc2_cmd"; - bias-pull-up; -- drive-strength = <16>; -+ drive-strength = <10>; - }; - - data { - pins = "sdc2_data"; - bias-pull-up; -- drive-strength = <16>; -+ drive-strength = <10>; - }; - }; - -diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts -index c0b93813ea9ac..c4ac6f5dc008d 100644 ---- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts -+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts -@@ -1114,11 +1114,11 @@ - reg = <0x10>; - - // CAM0_RST_N -- reset-gpios = <&tlmm 9 0>; -+ reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&cam0_default>; - gpios = <&tlmm 13 0>, -- <&tlmm 9 0>; -+ <&tlmm 9 GPIO_ACTIVE_LOW>; - - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; - clock-names = "xvclk"; -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index 65acd1f381eba..1ae90e8b70f32 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -1657,7 +1657,7 @@ - - clocks = <&gcc GCC_SDCC2_AHB_CLK>, - <&gcc GCC_SDCC2_APPS_CLK>, -- <&xo_board>; -+ <&rpmhcc RPMH_CXO_CLK>; - clock-names = "iface", "core", "xo"; - iommus = <&apps_smmu 0x4a0 0x0>; - qcom,dll-config = <0x0007642c>; -diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi -index e66b5b36e4894..759734b7715bd 100644 ---- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi -+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi -@@ -150,7 +150,7 @@ - regulator-name = "audio-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; -- gpio = <&gpio_exp2 7 GPIO_ACTIVE_HIGH>; -+ gpio = <&gpio_exp4 1 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - -diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi -index 8ac167aa18f04..ea937a926c0e3 100644 ---- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi -+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi -@@ -89,7 +89,6 @@ - pinctrl-names = "default"; - uart-has-rtscts; - status = "okay"; -- max-speed = <4000000>; - - bluetooth { - compatible = "brcm,bcm43438-bt"; -@@ -98,6 +97,7 @@ - device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>; - clocks = <&osc_32k>; - clock-names = "extclk"; -+ max-speed = <4000000>; - }; - }; - -@@ -148,7 +148,7 @@ - }; - - eeprom@50 { -- compatible = "microchip,at24c64", "atmel,24c64"; -+ compatible = "microchip,24c64", "atmel,24c64"; - pagesize = <32>; - read-only; /* Manufacturing EEPROM programmed at factory */ - reg = <0x50>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index db0d5c8e5f96a..93c734d8a46c2 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -928,6 +928,7 @@ - phy-mode = "rmii"; - phy-handle = <&phy>; - snps,txpbl = <0x4>; -+ clock_in_out = "output"; - status = "disabled"; - - mdio { -diff --git a/arch/arm64/crypto/aes-glue.c b/arch/arm64/crypto/aes-glue.c -index 34b8a89197be3..cafb5b96be0e6 100644 ---- a/arch/arm64/crypto/aes-glue.c -+++ b/arch/arm64/crypto/aes-glue.c -@@ -55,7 +55,7 @@ MODULE_DESCRIPTION("AES-ECB/CBC/CTR/XTS using ARMv8 Crypto Extensions"); - #define aes_mac_update neon_aes_mac_update - MODULE_DESCRIPTION("AES-ECB/CBC/CTR/XTS using ARMv8 NEON"); - #endif --#if defined(USE_V8_CRYPTO_EXTENSIONS) || !defined(CONFIG_CRYPTO_AES_ARM64_BS) -+#if defined(USE_V8_CRYPTO_EXTENSIONS) || !IS_ENABLED(CONFIG_CRYPTO_AES_ARM64_BS) - MODULE_ALIAS_CRYPTO("ecb(aes)"); - MODULE_ALIAS_CRYPTO("cbc(aes)"); - MODULE_ALIAS_CRYPTO("ctr(aes)"); -@@ -650,7 +650,7 @@ static int __maybe_unused xts_decrypt(struct skcipher_request *req) - } - - static struct skcipher_alg aes_algs[] = { { --#if defined(USE_V8_CRYPTO_EXTENSIONS) || !defined(CONFIG_CRYPTO_AES_ARM64_BS) -+#if defined(USE_V8_CRYPTO_EXTENSIONS) || !IS_ENABLED(CONFIG_CRYPTO_AES_ARM64_BS) - .base = { - .cra_name = "__ecb(aes)", - .cra_driver_name = "__ecb-aes-" MODE, -diff --git a/arch/arm64/crypto/sha1-ce-glue.c b/arch/arm64/crypto/sha1-ce-glue.c -index c93121bcfdeba..c1362861765fb 100644 ---- a/arch/arm64/crypto/sha1-ce-glue.c -+++ b/arch/arm64/crypto/sha1-ce-glue.c -@@ -19,6 +19,7 @@ - MODULE_DESCRIPTION("SHA1 secure hash using ARMv8 Crypto Extensions"); - MODULE_AUTHOR("Ard Biesheuvel "); - MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS_CRYPTO("sha1"); - - struct sha1_ce_state { - struct sha1_state sst; -diff --git a/arch/arm64/crypto/sha2-ce-glue.c b/arch/arm64/crypto/sha2-ce-glue.c -index 31ba3da5e61bd..ded3a6488f817 100644 ---- a/arch/arm64/crypto/sha2-ce-glue.c -+++ b/arch/arm64/crypto/sha2-ce-glue.c -@@ -19,6 +19,8 @@ - MODULE_DESCRIPTION("SHA-224/SHA-256 secure hash using ARMv8 Crypto Extensions"); - MODULE_AUTHOR("Ard Biesheuvel "); - MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS_CRYPTO("sha224"); -+MODULE_ALIAS_CRYPTO("sha256"); - - struct sha256_ce_state { - struct sha256_state sst; -diff --git a/arch/arm64/crypto/sha3-ce-glue.c b/arch/arm64/crypto/sha3-ce-glue.c -index e5a2936f08864..7288d30463548 100644 ---- a/arch/arm64/crypto/sha3-ce-glue.c -+++ b/arch/arm64/crypto/sha3-ce-glue.c -@@ -23,6 +23,10 @@ - MODULE_DESCRIPTION("SHA3 secure hash using ARMv8 Crypto Extensions"); - MODULE_AUTHOR("Ard Biesheuvel "); - MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS_CRYPTO("sha3-224"); -+MODULE_ALIAS_CRYPTO("sha3-256"); -+MODULE_ALIAS_CRYPTO("sha3-384"); -+MODULE_ALIAS_CRYPTO("sha3-512"); - - asmlinkage void sha3_ce_transform(u64 *st, const u8 *data, int blocks, - int md_len); -diff --git a/arch/arm64/crypto/sha512-ce-glue.c b/arch/arm64/crypto/sha512-ce-glue.c -index faa83f6cf376c..a6b1adf31c56b 100644 ---- a/arch/arm64/crypto/sha512-ce-glue.c -+++ b/arch/arm64/crypto/sha512-ce-glue.c -@@ -23,6 +23,8 @@ - MODULE_DESCRIPTION("SHA-384/SHA-512 secure hash using ARMv8 Crypto Extensions"); - MODULE_AUTHOR("Ard Biesheuvel "); - MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS_CRYPTO("sha384"); -+MODULE_ALIAS_CRYPTO("sha512"); - - asmlinkage void sha512_ce_transform(struct sha512_state *sst, u8 const *src, - int blocks); -diff --git a/arch/arm64/include/asm/module.lds.h b/arch/arm64/include/asm/module.lds.h -index 691f15af788e4..810045628c66e 100644 ---- a/arch/arm64/include/asm/module.lds.h -+++ b/arch/arm64/include/asm/module.lds.h -@@ -1,7 +1,7 @@ - #ifdef CONFIG_ARM64_MODULE_PLTS - SECTIONS { -- .plt (NOLOAD) : { BYTE(0) } -- .init.plt (NOLOAD) : { BYTE(0) } -- .text.ftrace_trampoline (NOLOAD) : { BYTE(0) } -+ .plt 0 (NOLOAD) : { BYTE(0) } -+ .init.plt 0 (NOLOAD) : { BYTE(0) } -+ .text.ftrace_trampoline 0 (NOLOAD) : { BYTE(0) } - } - #endif -diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c -index 3e6331b649323..33b6f56dcb21b 100644 ---- a/arch/arm64/kernel/cpufeature.c -+++ b/arch/arm64/kernel/cpufeature.c -@@ -1455,7 +1455,7 @@ static bool cpu_has_broken_dbm(void) - /* List of CPUs which have broken DBM support. */ - static const struct midr_range cpus[] = { - #ifdef CONFIG_ARM64_ERRATUM_1024718 -- MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0), // A55 r0p0 -r1p0 -+ MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), - /* Kryo4xx Silver (rdpe => r1p0) */ - MIDR_REV(MIDR_QCOM_KRYO_4XX_SILVER, 0xd, 0xe), - #endif -diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S -index a0dc987724eda..7ec430e18f95e 100644 ---- a/arch/arm64/kernel/head.S -+++ b/arch/arm64/kernel/head.S -@@ -882,6 +882,7 @@ SYM_FUNC_START_LOCAL(__primary_switch) - - tlbi vmalle1 // Remove any stale TLB entries - dsb nsh -+ isb - - msr sctlr_el1, x19 // re-enable the MMU - isb -diff --git a/arch/arm64/kernel/machine_kexec_file.c b/arch/arm64/kernel/machine_kexec_file.c -index 03210f6447900..0cde47a63bebf 100644 ---- a/arch/arm64/kernel/machine_kexec_file.c -+++ b/arch/arm64/kernel/machine_kexec_file.c -@@ -182,8 +182,10 @@ static int create_dtb(struct kimage *image, - - /* duplicate a device tree blob */ - ret = fdt_open_into(initial_boot_params, buf, buf_size); -- if (ret) -+ if (ret) { -+ vfree(buf); - return -EINVAL; -+ } - - ret = setup_dtb(image, initrd_load_addr, initrd_len, - cmdline, buf); -diff --git a/arch/arm64/kernel/probes/uprobes.c b/arch/arm64/kernel/probes/uprobes.c -index a412d8edbcd24..2c247634552b1 100644 ---- a/arch/arm64/kernel/probes/uprobes.c -+++ b/arch/arm64/kernel/probes/uprobes.c -@@ -38,7 +38,7 @@ int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm, - - /* TODO: Currently we do not support AARCH32 instruction probing */ - if (mm->context.flags & MMCF_AARCH32) -- return -ENOTSUPP; -+ return -EOPNOTSUPP; - else if (!IS_ALIGNED(addr, AARCH64_INSN_SIZE)) - return -EINVAL; - -diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c -index 8ac487c84e379..1d75471979cb1 100644 ---- a/arch/arm64/kernel/ptrace.c -+++ b/arch/arm64/kernel/ptrace.c -@@ -1796,7 +1796,7 @@ int syscall_trace_enter(struct pt_regs *regs) - - if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) { - tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER); -- if (!in_syscall(regs) || (flags & _TIF_SYSCALL_EMU)) -+ if (flags & _TIF_SYSCALL_EMU) - return NO_SYSCALL; - } - -diff --git a/arch/arm64/kernel/suspend.c b/arch/arm64/kernel/suspend.c -index a67b37a7a47e1..d7564891ffe12 100644 ---- a/arch/arm64/kernel/suspend.c -+++ b/arch/arm64/kernel/suspend.c -@@ -119,7 +119,7 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) - if (!ret) - ret = -EOPNOTSUPP; - } else { -- __cpu_suspend_exit(); -+ RCU_NONIDLE(__cpu_suspend_exit()); - } - - unpause_graph_tracing(); -diff --git a/arch/csky/kernel/ptrace.c b/arch/csky/kernel/ptrace.c -index d822144906ac1..a4cf2e2ac15ac 100644 ---- a/arch/csky/kernel/ptrace.c -+++ b/arch/csky/kernel/ptrace.c -@@ -83,7 +83,7 @@ static int gpr_get(struct task_struct *target, - /* Abiv1 regs->tls is fake and we need sync here. */ - regs->tls = task_thread_info(target)->tp_value; - -- return membuf_write(&to, regs, sizeof(regs)); -+ return membuf_write(&to, regs, sizeof(*regs)); - } - - static int gpr_set(struct task_struct *target, -diff --git a/arch/mips/Makefile b/arch/mips/Makefile -index cd4343edeb11b..5ffdd67093bc6 100644 ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -136,6 +136,25 @@ cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \ - # - cflags-y += -fno-stack-check - -+# binutils from v2.35 when built with --enable-mips-fix-loongson3-llsc=yes, -+# supports an -mfix-loongson3-llsc flag which emits a sync prior to each ll -+# instruction to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h -+# for a description). -+# -+# We disable this in order to prevent the assembler meddling with the -+# instruction that labels refer to, ie. if we label an ll instruction: -+# -+# 1: ll v0, 0(a0) -+# -+# ...then with the assembler fix applied the label may actually point at a sync -+# instruction inserted by the assembler, and if we were using the label in an -+# exception table the table would no longer contain the address of the ll -+# instruction. -+# -+# Avoid this by explicitly disabling that assembler behaviour. -+# -+cflags-y += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,) -+ - # - # CPU-dependent compiler/assembler options for optimization. - # -diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile -index 47cd9dc7454af..f93f72bcba97e 100644 ---- a/arch/mips/boot/compressed/Makefile -+++ b/arch/mips/boot/compressed/Makefile -@@ -37,6 +37,7 @@ KBUILD_AFLAGS := $(KBUILD_AFLAGS) -D__ASSEMBLY__ \ - # Prevents link failures: __sanitizer_cov_trace_pc() is not linked in. - KCOV_INSTRUMENT := n - GCOV_PROFILE := n -+UBSAN_SANITIZE := n - - # decompressor objects (linked with vmlinuz) - vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/string.o -diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c -index 982826ba0ef70..ce4e2806159bb 100644 ---- a/arch/mips/cavium-octeon/setup.c -+++ b/arch/mips/cavium-octeon/setup.c -@@ -1149,12 +1149,15 @@ void __init device_tree_init(void) - bool do_prune; - bool fill_mac; - -- if (fw_passed_dtb) { -- fdt = (void *)fw_passed_dtb; -+#ifdef CONFIG_MIPS_ELF_APPENDED_DTB -+ if (!fdt_check_header(&__appended_dtb)) { -+ fdt = &__appended_dtb; - do_prune = false; - fill_mac = true; - pr_info("Using appended Device Tree.\n"); -- } else if (octeon_bootinfo->minor_version >= 3 && octeon_bootinfo->fdt_addr) { -+ } else -+#endif -+ if (octeon_bootinfo->minor_version >= 3 && octeon_bootinfo->fdt_addr) { - fdt = phys_to_virt(octeon_bootinfo->fdt_addr); - if (fdt_check_header(fdt)) - panic("Corrupt Device Tree passed to kernel."); -diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h -index 3682d1a0bb808..ea4b62ece3366 100644 ---- a/arch/mips/include/asm/asm.h -+++ b/arch/mips/include/asm/asm.h -@@ -20,10 +20,27 @@ - #include - #include - -+#ifndef __VDSO__ -+/* -+ * Emit CFI data in .debug_frame sections, not .eh_frame sections. -+ * We don't do DWARF unwinding at runtime, so only the offline DWARF -+ * information is useful to anyone. Note we should change this if we -+ * ever decide to enable DWARF unwinding at runtime. -+ */ -+#define CFI_SECTIONS .cfi_sections .debug_frame -+#else -+ /* -+ * For the vDSO, emit both runtime unwind information and debug -+ * symbols for the .dbg file. -+ */ -+#define CFI_SECTIONS -+#endif -+ - /* - * LEAF - declare leaf routine - */ - #define LEAF(symbol) \ -+ CFI_SECTIONS; \ - .globl symbol; \ - .align 2; \ - .type symbol, @function; \ -@@ -36,6 +53,7 @@ symbol: .frame sp, 0, ra; \ - * NESTED - declare nested routine entry point - */ - #define NESTED(symbol, framesize, rpc) \ -+ CFI_SECTIONS; \ - .globl symbol; \ - .align 2; \ - .type symbol, @function; \ -diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h -index f904084fcb1fd..27ad767915390 100644 ---- a/arch/mips/include/asm/atomic.h -+++ b/arch/mips/include/asm/atomic.h -@@ -248,7 +248,7 @@ static __inline__ int pfx##_sub_if_positive(type i, pfx##_t * v) \ - * bltz that can branch to code outside of the LL/SC loop. As \ - * such, we don't need to emit another barrier here. \ - */ \ -- if (!__SYNC_loongson3_war) \ -+ if (__SYNC_loongson3_war == 0) \ - smp_mb__after_atomic(); \ - \ - return result; \ -diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h -index 5b0b3a6777ea5..ed8f3f3c4304a 100644 ---- a/arch/mips/include/asm/cmpxchg.h -+++ b/arch/mips/include/asm/cmpxchg.h -@@ -99,7 +99,7 @@ unsigned long __xchg(volatile void *ptr, unsigned long x, int size) - * contains a completion barrier prior to the LL, so we don't \ - * need to emit an extra one here. \ - */ \ -- if (!__SYNC_loongson3_war) \ -+ if (__SYNC_loongson3_war == 0) \ - smp_mb__before_llsc(); \ - \ - __res = (__typeof__(*(ptr))) \ -@@ -191,7 +191,7 @@ unsigned long __cmpxchg(volatile void *ptr, unsigned long old, - * contains a completion barrier prior to the LL, so we don't \ - * need to emit an extra one here. \ - */ \ -- if (!__SYNC_loongson3_war) \ -+ if (__SYNC_loongson3_war == 0) \ - smp_mb__before_llsc(); \ - \ - __res = cmpxchg_local((ptr), (old), (new)); \ -@@ -201,7 +201,7 @@ unsigned long __cmpxchg(volatile void *ptr, unsigned long old, - * contains a completion barrier after the SC, so we don't \ - * need to emit an extra one here. \ - */ \ -- if (!__SYNC_loongson3_war) \ -+ if (__SYNC_loongson3_war == 0) \ - smp_llsc_mb(); \ - \ - __res; \ -diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h -index 6a77bc4a6eec4..74082e35d57c8 100644 ---- a/arch/mips/include/asm/page.h -+++ b/arch/mips/include/asm/page.h -@@ -255,6 +255,12 @@ extern bool __virt_addr_valid(const volatile void *kaddr); - - #define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_TSK_EXEC - -+extern unsigned long __kaslr_offset; -+static inline unsigned long kaslr_offset(void) -+{ -+ return __kaslr_offset; -+} -+ - #include - #include - -diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c -index e6853697a0561..31cb9199197ca 100644 ---- a/arch/mips/kernel/cpu-probe.c -+++ b/arch/mips/kernel/cpu-probe.c -@@ -1830,16 +1830,17 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) - */ - case PRID_COMP_INGENIC_D0: - c->isa_level &= ~MIPS_CPU_ISA_M32R2; -- break; -+ fallthrough; - - /* - * The config0 register in the XBurst CPUs with a processor ID of -- * PRID_COMP_INGENIC_D1 has an abandoned huge page tlb mode, this -- * mode is not compatible with the MIPS standard, it will cause -- * tlbmiss and into an infinite loop (line 21 in the tlb-funcs.S) -- * when starting the init process. After chip reset, the default -- * is HPTLB mode, Write 0xa9000000 to cp0 register 5 sel 4 to -- * switch back to VTLB mode to prevent getting stuck. -+ * PRID_COMP_INGENIC_D0 or PRID_COMP_INGENIC_D1 has an abandoned -+ * huge page tlb mode, this mode is not compatible with the MIPS -+ * standard, it will cause tlbmiss and into an infinite loop -+ * (line 21 in the tlb-funcs.S) when starting the init process. -+ * After chip reset, the default is HPTLB mode, Write 0xa9000000 -+ * to cp0 register 5 sel 4 to switch back to VTLB mode to prevent -+ * getting stuck. - */ - case PRID_COMP_INGENIC_D1: - write_c0_page_ctrl(XBURST_PAGECTRL_HPTLB_DIS); -diff --git a/arch/mips/kernel/relocate.c b/arch/mips/kernel/relocate.c -index 0e365b7c742d9..ac16cf2716df5 100644 ---- a/arch/mips/kernel/relocate.c -+++ b/arch/mips/kernel/relocate.c -@@ -300,6 +300,13 @@ static inline int __init relocation_addr_valid(void *loc_new) - return 1; - } - -+static inline void __init update_kaslr_offset(unsigned long *addr, long offset) -+{ -+ unsigned long *new_addr = (unsigned long *)RELOCATED(addr); -+ -+ *new_addr = (unsigned long)offset; -+} -+ - #if defined(CONFIG_USE_OF) - void __weak *plat_get_fdt(void) - { -@@ -410,6 +417,9 @@ void *__init relocate_kernel(void) - - /* Return the new kernel's entry point */ - kernel_entry = RELOCATED(start_kernel); -+ -+ /* Error may occur before, so keep it at last */ -+ update_kaslr_offset(&__kaslr_offset, offset); - } - out: - return kernel_entry; -diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c -index 7e1f8e2774373..83ec0d5a0918b 100644 ---- a/arch/mips/kernel/setup.c -+++ b/arch/mips/kernel/setup.c -@@ -84,6 +84,9 @@ static struct resource code_resource = { .name = "Kernel code", }; - static struct resource data_resource = { .name = "Kernel data", }; - static struct resource bss_resource = { .name = "Kernel bss", }; - -+unsigned long __kaslr_offset __ro_after_init; -+EXPORT_SYMBOL(__kaslr_offset); -+ - static void *detect_magic __initdata = detect_memory_region; - - #ifdef CONFIG_MIPS_AUTO_PFN_OFFSET -diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S -index 5e97e9d02f98d..09fa4705ce8eb 100644 ---- a/arch/mips/kernel/vmlinux.lds.S -+++ b/arch/mips/kernel/vmlinux.lds.S -@@ -90,6 +90,7 @@ SECTIONS - - INIT_TASK_DATA(THREAD_SIZE) - NOSAVE_DATA -+ PAGE_ALIGNED_DATA(PAGE_SIZE) - CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) - READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) - DATA_DATA -@@ -223,6 +224,5 @@ SECTIONS - *(.options) - *(.pdr) - *(.reginfo) -- *(.eh_frame) - } - } -diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c -index df8eed3875f6d..43c2f271e6ab4 100644 ---- a/arch/mips/lantiq/irq.c -+++ b/arch/mips/lantiq/irq.c -@@ -302,7 +302,7 @@ static void ltq_hw_irq_handler(struct irq_desc *desc) - generic_handle_irq(irq_linear_revmap(ltq_domain, hwirq)); - - /* if this is a EBU irq, we need to ack it or get a deadlock */ -- if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0) && LTQ_EBU_PCC_ISTAT) -+ if (irq == LTQ_ICU_EBU_IRQ && !module && LTQ_EBU_PCC_ISTAT != 0) - ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_ISTAT) | 0x10, - LTQ_EBU_PCC_ISTAT); - } -diff --git a/arch/mips/loongson64/Platform b/arch/mips/loongson64/Platform -index ec42c5085905c..e2354e128d9a0 100644 ---- a/arch/mips/loongson64/Platform -+++ b/arch/mips/loongson64/Platform -@@ -5,28 +5,6 @@ - - cflags-$(CONFIG_CPU_LOONGSON64) += -Wa,--trap - --# --# Some versions of binutils, not currently mainline as of 2019/02/04, support --# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction --# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a --# description). --# --# We disable this in order to prevent the assembler meddling with the --# instruction that labels refer to, ie. if we label an ll instruction: --# --# 1: ll v0, 0(a0) --# --# ...then with the assembler fix applied the label may actually point at a sync --# instruction inserted by the assembler, and if we were using the label in an --# exception table the table would no longer contain the address of the ll --# instruction. --# --# Avoid this by explicitly disabling that assembler behaviour. If upstream --# binutils does not merge support for the flag then we can revisit & remove --# this later - for now it ensures vendor toolchains don't cause problems. --# --cflags-$(CONFIG_CPU_LOONGSON64) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,) -- - # - # binutils from v2.25 on and gcc starting from v4.9.0 treat -march=loongson3a - # as MIPS64 R2; older versions as just R1. This leaves the possibility open -diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c -index 4f976d687ab00..f67297b3175fe 100644 ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -1593,7 +1593,7 @@ static int probe_scache(void) - return 1; - } - --static void __init loongson2_sc_init(void) -+static void loongson2_sc_init(void) - { - struct cpuinfo_mips *c = ¤t_cpu_data; - -diff --git a/arch/mips/vdso/Makefile b/arch/mips/vdso/Makefile -index 5810cc12bc1d9..2131d3fd73333 100644 ---- a/arch/mips/vdso/Makefile -+++ b/arch/mips/vdso/Makefile -@@ -16,16 +16,13 @@ ccflags-vdso := \ - $(filter -march=%,$(KBUILD_CFLAGS)) \ - $(filter -m%-float,$(KBUILD_CFLAGS)) \ - $(filter -mno-loongson-%,$(KBUILD_CFLAGS)) \ -+ $(CLANG_FLAGS) \ - -D__VDSO__ - - ifndef CONFIG_64BIT - ccflags-vdso += -DBUILD_VDSO32 - endif - --ifdef CONFIG_CC_IS_CLANG --ccflags-vdso += $(filter --target=%,$(KBUILD_CFLAGS)) --endif -- - # - # The -fno-jump-tables flag only prevents the compiler from generating - # jump tables but does not prevent the compiler from emitting absolute -diff --git a/arch/nios2/kernel/entry.S b/arch/nios2/kernel/entry.S -index da8442450e460..0794cd7803dfe 100644 ---- a/arch/nios2/kernel/entry.S -+++ b/arch/nios2/kernel/entry.S -@@ -389,7 +389,10 @@ ENTRY(ret_from_interrupt) - */ - ENTRY(sys_clone) - SAVE_SWITCH_STACK -+ subi sp, sp, 4 /* make space for tls pointer */ -+ stw r8, 0(sp) /* pass tls pointer (r8) via stack (5th argument) */ - call nios2_clone -+ addi sp, sp, 4 - RESTORE_SWITCH_STACK - ret - -diff --git a/arch/nios2/kernel/sys_nios2.c b/arch/nios2/kernel/sys_nios2.c -index cd390ec4f88bf..b1ca856999521 100644 ---- a/arch/nios2/kernel/sys_nios2.c -+++ b/arch/nios2/kernel/sys_nios2.c -@@ -22,6 +22,7 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, - unsigned int op) - { - struct vm_area_struct *vma; -+ struct mm_struct *mm = current->mm; - - if (len == 0) - return 0; -@@ -34,16 +35,22 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, - if (addr + len < addr) - return -EFAULT; - -+ if (mmap_read_lock_killable(mm)) -+ return -EINTR; -+ - /* - * Verify that the specified address region actually belongs - * to this process. - */ -- vma = find_vma(current->mm, addr); -- if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end) -+ vma = find_vma(mm, addr); -+ if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end) { -+ mmap_read_unlock(mm); - return -EFAULT; -+ } - - flush_cache_range(vma, addr, addr + len); - -+ mmap_read_unlock(mm); - return 0; - } - -diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig -index 107bb4319e0e0..a685e42d39932 100644 ---- a/arch/powerpc/Kconfig -+++ b/arch/powerpc/Kconfig -@@ -772,7 +772,7 @@ config PPC_64K_PAGES - - config PPC_256K_PAGES - bool "256k page size" -- depends on 44x && !STDBINUTILS -+ depends on 44x && !STDBINUTILS && !PPC_47x - help - Make the page size 256k. - -diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h -index 55d6ede30c19a..9ab344d29a545 100644 ---- a/arch/powerpc/include/asm/kexec.h -+++ b/arch/powerpc/include/asm/kexec.h -@@ -136,6 +136,7 @@ int load_crashdump_segments_ppc64(struct kimage *image, - int setup_purgatory_ppc64(struct kimage *image, const void *slave_code, - const void *fdt, unsigned long kernel_load_addr, - unsigned long fdt_load_addr); -+unsigned int kexec_fdt_totalsize_ppc64(struct kimage *image); - int setup_new_fdt_ppc64(const struct kimage *image, void *fdt, - unsigned long initrd_load_addr, - unsigned long initrd_len, const char *cmdline); -diff --git a/arch/powerpc/include/asm/paravirt.h b/arch/powerpc/include/asm/paravirt.h -index edc08f04aef77..5d1726bb28e79 100644 ---- a/arch/powerpc/include/asm/paravirt.h -+++ b/arch/powerpc/include/asm/paravirt.h -@@ -10,6 +10,7 @@ - #endif - - #ifdef CONFIG_PPC_SPLPAR -+#include - #include - #include - -diff --git a/arch/powerpc/include/asm/uaccess.h b/arch/powerpc/include/asm/uaccess.h -index 501c9a79038c0..f53bfefb4a577 100644 ---- a/arch/powerpc/include/asm/uaccess.h -+++ b/arch/powerpc/include/asm/uaccess.h -@@ -216,8 +216,6 @@ do { \ - #define __put_user_nocheck_goto(x, ptr, size, label) \ - do { \ - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ -- if (!is_kernel_addr((unsigned long)__pu_addr)) \ -- might_fault(); \ - __chk_user_ptr(ptr); \ - __put_user_size_goto((x), __pu_addr, (size), label); \ - } while (0) -@@ -313,7 +311,7 @@ do { \ - __typeof__(size) __gu_size = (size); \ - \ - __chk_user_ptr(__gu_addr); \ -- if (!is_kernel_addr((unsigned long)__gu_addr)) \ -+ if (do_allow && !is_kernel_addr((unsigned long)__gu_addr)) \ - might_fault(); \ - barrier_nospec(); \ - if (do_allow) \ -@@ -508,6 +506,9 @@ static __must_check inline bool user_access_begin(const void __user *ptr, size_t - { - if (unlikely(!access_ok(ptr, len))) - return false; -+ -+ might_fault(); -+ - allow_read_write_user((void __user *)ptr, ptr, len); - return true; - } -@@ -521,6 +522,9 @@ user_read_access_begin(const void __user *ptr, size_t len) - { - if (unlikely(!access_ok(ptr, len))) - return false; -+ -+ might_fault(); -+ - allow_read_from_user(ptr, len); - return true; - } -@@ -532,6 +536,9 @@ user_write_access_begin(const void __user *ptr, size_t len) - { - if (unlikely(!access_ok(ptr, len))) - return false; -+ -+ might_fault(); -+ - allow_write_to_user((void __user *)ptr, len); - return true; - } -diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S -index 1c9b0ccc2172e..9bc4e7dd0beef 100644 ---- a/arch/powerpc/kernel/entry_32.S -+++ b/arch/powerpc/kernel/entry_32.S -@@ -356,6 +356,9 @@ trace_syscall_entry_irq_off: - - .globl transfer_to_syscall - transfer_to_syscall: -+#ifdef CONFIG_PPC_BOOK3S_32 -+ kuep_lock r11, r12 -+#endif - #ifdef CONFIG_TRACE_IRQFLAGS - andi. r12,r9,MSR_EE - beq- trace_syscall_entry_irq_off -diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_32.h -index a2f72c966bafb..abc7b603ab65c 100644 ---- a/arch/powerpc/kernel/head_32.h -+++ b/arch/powerpc/kernel/head_32.h -@@ -47,7 +47,7 @@ - lwz r1,TASK_STACK-THREAD(r1) - addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE - 1: -- mtcrf 0x7f, r1 -+ mtcrf 0x3f, r1 - bt 32 - THREAD_ALIGN_SHIFT, stack_overflow - #else - subi r11, r1, INT_FRAME_SIZE /* use r1 if kernel */ -diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S -index 52702f3db6df6..9eb63cf6ac38e 100644 ---- a/arch/powerpc/kernel/head_8xx.S -+++ b/arch/powerpc/kernel/head_8xx.S -@@ -165,7 +165,7 @@ SystemCall: - /* On the MPC8xx, this is a software emulation interrupt. It occurs - * for all unimplemented and illegal instructions. - */ -- EXCEPTION(0x1000, SoftEmu, program_check_exception, EXC_XFER_STD) -+ EXCEPTION(0x1000, SoftEmu, emulation_assist_interrupt, EXC_XFER_STD) - - . = 0x1100 - /* -diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S -index 858fbc8b19f32..bc57e3a82d689 100644 ---- a/arch/powerpc/kernel/head_book3s_32.S -+++ b/arch/powerpc/kernel/head_book3s_32.S -@@ -278,12 +278,6 @@ MachineCheck: - 7: EXCEPTION_PROLOG_2 - addi r3,r1,STACK_FRAME_OVERHEAD - #ifdef CONFIG_PPC_CHRP --#ifdef CONFIG_VMAP_STACK -- mfspr r4, SPRN_SPRG_THREAD -- tovirt(r4, r4) -- lwz r4, RTAS_SP(r4) -- cmpwi cr1, r4, 0 --#endif - beq cr1, machine_check_tramp - twi 31, 0, 0 - #else -diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c -index cc7a6271b6b4e..e8a548447dd68 100644 ---- a/arch/powerpc/kernel/irq.c -+++ b/arch/powerpc/kernel/irq.c -@@ -269,6 +269,31 @@ again: - } - } - -+#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_KUAP) -+static inline void replay_soft_interrupts_irqrestore(void) -+{ -+ unsigned long kuap_state = get_kuap(); -+ -+ /* -+ * Check if anything calls local_irq_enable/restore() when KUAP is -+ * disabled (user access enabled). We handle that case here by saving -+ * and re-locking AMR but we shouldn't get here in the first place, -+ * hence the warning. -+ */ -+ kuap_check_amr(); -+ -+ if (kuap_state != AMR_KUAP_BLOCKED) -+ set_kuap(AMR_KUAP_BLOCKED); -+ -+ replay_soft_interrupts(); -+ -+ if (kuap_state != AMR_KUAP_BLOCKED) -+ set_kuap(kuap_state); -+} -+#else -+#define replay_soft_interrupts_irqrestore() replay_soft_interrupts() -+#endif -+ - notrace void arch_local_irq_restore(unsigned long mask) - { - unsigned char irq_happened; -@@ -332,7 +357,7 @@ notrace void arch_local_irq_restore(unsigned long mask) - irq_soft_mask_set(IRQS_ALL_DISABLED); - trace_hardirqs_off(); - -- replay_soft_interrupts(); -+ replay_soft_interrupts_irqrestore(); - local_paca->irq_happened = 0; - - trace_hardirqs_on(); -diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c -index e9d4eb6144e1f..ccf77b985c8f6 100644 ---- a/arch/powerpc/kernel/prom_init.c -+++ b/arch/powerpc/kernel/prom_init.c -@@ -1331,14 +1331,10 @@ static void __init prom_check_platform_support(void) - if (prop_len > sizeof(vec)) - prom_printf("WARNING: ibm,arch-vec-5-platform-support longer than expected (len: %d)\n", - prop_len); -- prom_getprop(prom.chosen, "ibm,arch-vec-5-platform-support", -- &vec, sizeof(vec)); -- for (i = 0; i < sizeof(vec); i += 2) { -- prom_debug("%d: index = 0x%x val = 0x%x\n", i / 2 -- , vec[i] -- , vec[i + 1]); -- prom_parse_platform_support(vec[i], vec[i + 1], -- &supported); -+ prom_getprop(prom.chosen, "ibm,arch-vec-5-platform-support", &vec, sizeof(vec)); -+ for (i = 0; i < prop_len; i += 2) { -+ prom_debug("%d: index = 0x%x val = 0x%x\n", i / 2, vec[i], vec[i + 1]); -+ prom_parse_platform_support(vec[i], vec[i + 1], &supported); - } - } - -diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c -index 67feb35244606..83633a24ce788 100644 ---- a/arch/powerpc/kernel/time.c -+++ b/arch/powerpc/kernel/time.c -@@ -53,6 +53,7 @@ - #include - #include - #include -+#include - #include - #include - -@@ -1030,6 +1031,7 @@ void __init time_init(void) - tick_setup_hrtimer_broadcast(); - - of_clk_init(NULL); -+ enable_sched_clock_irqtime(); - } - - /* -diff --git a/arch/powerpc/kexec/elf_64.c b/arch/powerpc/kexec/elf_64.c -index d0e459bb2f05a..9842e33533df1 100644 ---- a/arch/powerpc/kexec/elf_64.c -+++ b/arch/powerpc/kexec/elf_64.c -@@ -102,7 +102,7 @@ static void *elf64_load(struct kimage *image, char *kernel_buf, - pr_debug("Loaded initrd at 0x%lx\n", initrd_load_addr); - } - -- fdt_size = fdt_totalsize(initial_boot_params) * 2; -+ fdt_size = kexec_fdt_totalsize_ppc64(image); - fdt = kmalloc(fdt_size, GFP_KERNEL); - if (!fdt) { - pr_err("Not enough memory for the device tree.\n"); -diff --git a/arch/powerpc/kexec/file_load_64.c b/arch/powerpc/kexec/file_load_64.c -index c69bcf9b547a8..02b9e4d0dc40b 100644 ---- a/arch/powerpc/kexec/file_load_64.c -+++ b/arch/powerpc/kexec/file_load_64.c -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -925,6 +926,40 @@ out: - return ret; - } - -+/** -+ * kexec_fdt_totalsize_ppc64 - Return the estimated size needed to setup FDT -+ * for kexec/kdump kernel. -+ * @image: kexec image being loaded. -+ * -+ * Returns the estimated size needed for kexec/kdump kernel FDT. -+ */ -+unsigned int kexec_fdt_totalsize_ppc64(struct kimage *image) -+{ -+ unsigned int fdt_size; -+ u64 usm_entries; -+ -+ /* -+ * The below estimate more than accounts for a typical kexec case where -+ * the additional space is to accommodate things like kexec cmdline, -+ * chosen node with properties for initrd start & end addresses and -+ * a property to indicate kexec boot.. -+ */ -+ fdt_size = fdt_totalsize(initial_boot_params) + (2 * COMMAND_LINE_SIZE); -+ if (image->type != KEXEC_TYPE_CRASH) -+ return fdt_size; -+ -+ /* -+ * For kdump kernel, also account for linux,usable-memory and -+ * linux,drconf-usable-memory properties. Get an approximate on the -+ * number of usable memory entries and use for FDT size estimation. -+ */ -+ usm_entries = ((memblock_end_of_DRAM() / drmem_lmb_size()) + -+ (2 * (resource_size(&crashk_res) / drmem_lmb_size()))); -+ fdt_size += (unsigned int)(usm_entries * sizeof(u64)); -+ -+ return fdt_size; -+} -+ - /** - * setup_new_fdt_ppc64 - Update the flattend device-tree of the kernel - * being loaded. -diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig -index 549591d9aaa2c..e45644657d49d 100644 ---- a/arch/powerpc/kvm/Kconfig -+++ b/arch/powerpc/kvm/Kconfig -@@ -54,6 +54,7 @@ config KVM_BOOK3S_32 - select KVM - select KVM_BOOK3S_32_HANDLER - select KVM_BOOK3S_PR_POSSIBLE -+ select PPC_FPU - help - Support running unmodified book3s_32 guest kernels - in virtual machines on book3s_32 host processors. -diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c -index cf52d26f49cd7..25966ae3271ef 100644 ---- a/arch/powerpc/kvm/powerpc.c -+++ b/arch/powerpc/kvm/powerpc.c -@@ -1518,7 +1518,7 @@ int kvmppc_handle_vmx_load(struct kvm_vcpu *vcpu, - return emulated; - } - --int kvmppc_get_vmx_dword(struct kvm_vcpu *vcpu, int index, u64 *val) -+static int kvmppc_get_vmx_dword(struct kvm_vcpu *vcpu, int index, u64 *val) - { - union kvmppc_one_reg reg; - int vmx_offset = 0; -@@ -1536,7 +1536,7 @@ int kvmppc_get_vmx_dword(struct kvm_vcpu *vcpu, int index, u64 *val) - return result; - } - --int kvmppc_get_vmx_word(struct kvm_vcpu *vcpu, int index, u64 *val) -+static int kvmppc_get_vmx_word(struct kvm_vcpu *vcpu, int index, u64 *val) - { - union kvmppc_one_reg reg; - int vmx_offset = 0; -@@ -1554,7 +1554,7 @@ int kvmppc_get_vmx_word(struct kvm_vcpu *vcpu, int index, u64 *val) - return result; - } - --int kvmppc_get_vmx_hword(struct kvm_vcpu *vcpu, int index, u64 *val) -+static int kvmppc_get_vmx_hword(struct kvm_vcpu *vcpu, int index, u64 *val) - { - union kvmppc_one_reg reg; - int vmx_offset = 0; -@@ -1572,7 +1572,7 @@ int kvmppc_get_vmx_hword(struct kvm_vcpu *vcpu, int index, u64 *val) - return result; - } - --int kvmppc_get_vmx_byte(struct kvm_vcpu *vcpu, int index, u64 *val) -+static int kvmppc_get_vmx_byte(struct kvm_vcpu *vcpu, int index, u64 *val) - { - union kvmppc_one_reg reg; - int vmx_offset = 0; -diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c -index ede093e962347..bb5c20d4ca91c 100644 ---- a/arch/powerpc/lib/sstep.c -+++ b/arch/powerpc/lib/sstep.c -@@ -1306,9 +1306,11 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - if ((word & 0xfe2) == 2) - op->type = SYSCALL; - else if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && -- (word & 0xfe3) == 1) -+ (word & 0xfe3) == 1) { /* scv */ - op->type = SYSCALL_VECTORED_0; -- else -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; -+ } else - op->type = UNKNOWN; - return 0; - #endif -@@ -1412,7 +1414,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - #ifdef __powerpc64__ - case 1: - if (!cpu_has_feature(CPU_FTR_ARCH_31)) -- return -1; -+ goto unknown_opcode; - - prefix_r = GET_PREFIX_R(word); - ra = GET_PREFIX_RA(suffix); -@@ -1445,8 +1447,13 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - - #ifdef __powerpc64__ - case 4: -+ /* -+ * There are very many instructions with this primary opcode -+ * introduced in the ISA as early as v2.03. However, the ones -+ * we currently emulate were all introduced with ISA 3.0 -+ */ - if (!cpu_has_feature(CPU_FTR_ARCH_300)) -- return -1; -+ goto unknown_opcode; - - switch (word & 0x3f) { - case 48: /* maddhd */ -@@ -1472,7 +1479,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - * There are other instructions from ISA 3.0 with the same - * primary opcode which do not have emulation support yet. - */ -- return -1; -+ goto unknown_opcode; - #endif - - case 7: /* mulli */ -@@ -1532,6 +1539,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - case 19: - if (((word >> 1) & 0x1f) == 2) { - /* addpcis */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - imm = (short) (word & 0xffc1); /* d0 + d2 fields */ - imm |= (word >> 15) & 0x3e; /* d1 field */ - op->val = regs->nip + (imm << 16) + 4; -@@ -1844,7 +1853,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - #ifdef __powerpc64__ - case 265: /* modud */ - if (!cpu_has_feature(CPU_FTR_ARCH_300)) -- return -1; -+ goto unknown_opcode; - op->val = regs->gpr[ra] % regs->gpr[rb]; - goto compute_done; - #endif -@@ -1854,7 +1863,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - - case 267: /* moduw */ - if (!cpu_has_feature(CPU_FTR_ARCH_300)) -- return -1; -+ goto unknown_opcode; - op->val = (unsigned int) regs->gpr[ra] % - (unsigned int) regs->gpr[rb]; - goto compute_done; -@@ -1891,7 +1900,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - #endif - case 755: /* darn */ - if (!cpu_has_feature(CPU_FTR_ARCH_300)) -- return -1; -+ goto unknown_opcode; - switch (ra & 0x3) { - case 0: - /* 32-bit conditioned */ -@@ -1909,18 +1918,18 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - goto compute_done; - } - -- return -1; -+ goto unknown_opcode; - #ifdef __powerpc64__ - case 777: /* modsd */ - if (!cpu_has_feature(CPU_FTR_ARCH_300)) -- return -1; -+ goto unknown_opcode; - op->val = (long int) regs->gpr[ra] % - (long int) regs->gpr[rb]; - goto compute_done; - #endif - case 779: /* modsw */ - if (!cpu_has_feature(CPU_FTR_ARCH_300)) -- return -1; -+ goto unknown_opcode; - op->val = (int) regs->gpr[ra] % - (int) regs->gpr[rb]; - goto compute_done; -@@ -1997,14 +2006,14 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - #endif - case 538: /* cnttzw */ - if (!cpu_has_feature(CPU_FTR_ARCH_300)) -- return -1; -+ goto unknown_opcode; - val = (unsigned int) regs->gpr[rd]; - op->val = (val ? __builtin_ctz(val) : 32); - goto logical_done; - #ifdef __powerpc64__ - case 570: /* cnttzd */ - if (!cpu_has_feature(CPU_FTR_ARCH_300)) -- return -1; -+ goto unknown_opcode; - val = regs->gpr[rd]; - op->val = (val ? __builtin_ctzl(val) : 64); - goto logical_done; -@@ -2114,7 +2123,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - case 890: /* extswsli with sh_5 = 0 */ - case 891: /* extswsli with sh_5 = 1 */ - if (!cpu_has_feature(CPU_FTR_ARCH_300)) -- return -1; -+ goto unknown_opcode; - op->type = COMPUTE + SETREG; - sh = rb | ((word & 2) << 4); - val = (signed int) regs->gpr[rd]; -@@ -2441,6 +2450,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 268: /* lxvx */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(LOAD_VSX, 0, 16); - op->element_size = 16; -@@ -2450,6 +2461,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - case 269: /* lxvl */ - case 301: { /* lxvll */ - int nb; -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->ea = ra ? regs->gpr[ra] : 0; - nb = regs->gpr[rb] & 0xff; -@@ -2470,13 +2483,15 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - - case 333: /* lxvpx */ - if (!cpu_has_feature(CPU_FTR_ARCH_31)) -- return -1; -+ goto unknown_opcode; - op->reg = VSX_REGISTER_XTP(rd); - op->type = MKOP(LOAD_VSX, 0, 32); - op->element_size = 32; - break; - - case 364: /* lxvwsx */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(LOAD_VSX, 0, 4); - op->element_size = 4; -@@ -2484,6 +2499,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 396: /* stxvx */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(STORE_VSX, 0, 16); - op->element_size = 16; -@@ -2493,6 +2510,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - case 397: /* stxvl */ - case 429: { /* stxvll */ - int nb; -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->ea = ra ? regs->gpr[ra] : 0; - nb = regs->gpr[rb] & 0xff; -@@ -2506,7 +2525,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - } - case 461: /* stxvpx */ - if (!cpu_has_feature(CPU_FTR_ARCH_31)) -- return -1; -+ goto unknown_opcode; - op->reg = VSX_REGISTER_XTP(rd); - op->type = MKOP(STORE_VSX, 0, 32); - op->element_size = 32; -@@ -2544,6 +2563,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 781: /* lxsibzx */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(LOAD_VSX, 0, 1); - op->element_size = 8; -@@ -2551,6 +2572,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 812: /* lxvh8x */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(LOAD_VSX, 0, 16); - op->element_size = 2; -@@ -2558,6 +2581,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 813: /* lxsihzx */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(LOAD_VSX, 0, 2); - op->element_size = 8; -@@ -2571,6 +2596,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 876: /* lxvb16x */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(LOAD_VSX, 0, 16); - op->element_size = 1; -@@ -2584,6 +2611,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 909: /* stxsibx */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(STORE_VSX, 0, 1); - op->element_size = 8; -@@ -2591,6 +2620,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 940: /* stxvh8x */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(STORE_VSX, 0, 16); - op->element_size = 2; -@@ -2598,6 +2629,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 941: /* stxsihx */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(STORE_VSX, 0, 2); - op->element_size = 8; -@@ -2611,6 +2644,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 1004: /* stxvb16x */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd | ((word & 1) << 5); - op->type = MKOP(STORE_VSX, 0, 16); - op->element_size = 1; -@@ -2719,12 +2754,16 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - op->type = MKOP(LOAD_FP, 0, 16); - break; - case 2: /* lxsd */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd + 32; - op->type = MKOP(LOAD_VSX, 0, 8); - op->element_size = 8; - op->vsx_flags = VSX_CHECK_VEC; - break; - case 3: /* lxssp */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->reg = rd + 32; - op->type = MKOP(LOAD_VSX, 0, 4); - op->element_size = 8; -@@ -2754,7 +2793,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - #ifdef CONFIG_VSX - case 6: - if (!cpu_has_feature(CPU_FTR_ARCH_31)) -- return -1; -+ goto unknown_opcode; - op->ea = dqform_ea(word, regs); - op->reg = VSX_REGISTER_XTP(rd); - op->element_size = 32; -@@ -2777,6 +2816,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 1: /* lxv */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->ea = dqform_ea(word, regs); - if (word & 8) - op->reg = rd + 32; -@@ -2787,6 +2828,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - - case 2: /* stxsd with LSB of DS field = 0 */ - case 6: /* stxsd with LSB of DS field = 1 */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->ea = dsform_ea(word, regs); - op->reg = rd + 32; - op->type = MKOP(STORE_VSX, 0, 8); -@@ -2796,6 +2839,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - - case 3: /* stxssp with LSB of DS field = 0 */ - case 7: /* stxssp with LSB of DS field = 1 */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->ea = dsform_ea(word, regs); - op->reg = rd + 32; - op->type = MKOP(STORE_VSX, 0, 4); -@@ -2804,6 +2849,8 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - - case 5: /* stxv */ -+ if (!cpu_has_feature(CPU_FTR_ARCH_300)) -+ goto unknown_opcode; - op->ea = dqform_ea(word, regs); - if (word & 8) - op->reg = rd + 32; -@@ -2833,7 +2880,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - break; - case 1: /* Prefixed instructions */ - if (!cpu_has_feature(CPU_FTR_ARCH_31)) -- return -1; -+ goto unknown_opcode; - - prefix_r = GET_PREFIX_R(word); - ra = GET_PREFIX_RA(suffix); -@@ -2972,6 +3019,20 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - - } - -+ if (OP_IS_LOAD_STORE(op->type) && (op->type & UPDATE)) { -+ switch (GETTYPE(op->type)) { -+ case LOAD: -+ if (ra == rd) -+ goto unknown_opcode; -+ fallthrough; -+ case STORE: -+ case LOAD_FP: -+ case STORE_FP: -+ if (ra == 0) -+ goto unknown_opcode; -+ } -+ } -+ - #ifdef CONFIG_VSX - if ((GETTYPE(op->type) == LOAD_VSX || - GETTYPE(op->type) == STORE_VSX) && -@@ -2982,6 +3043,10 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs, - - return 0; - -+ unknown_opcode: -+ op->type = UNKNOWN; -+ return 0; -+ - logical_done: - if (word & 1) - set_cr0(regs, op); -diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c -index 16e86ba8aa209..f6b7749d6ada7 100644 ---- a/arch/powerpc/platforms/pseries/dlpar.c -+++ b/arch/powerpc/platforms/pseries/dlpar.c -@@ -127,7 +127,6 @@ void dlpar_free_cc_nodes(struct device_node *dn) - #define NEXT_PROPERTY 3 - #define PREV_PARENT 4 - #define MORE_MEMORY 5 --#define CALL_AGAIN -2 - #define ERR_CFG_USE -9003 - - struct device_node *dlpar_configure_connector(__be32 drc_index, -@@ -168,6 +167,9 @@ struct device_node *dlpar_configure_connector(__be32 drc_index, - - spin_unlock(&rtas_data_buf_lock); - -+ if (rtas_busy_delay(rc)) -+ continue; -+ - switch (rc) { - case COMPLETE: - break; -@@ -216,9 +218,6 @@ struct device_node *dlpar_configure_connector(__be32 drc_index, - last_dn = last_dn->parent; - break; - -- case CALL_AGAIN: -- break; -- - case MORE_MEMORY: - case ERR_CFG_USE: - default: -diff --git a/arch/riscv/kernel/vdso/Makefile b/arch/riscv/kernel/vdso/Makefile -index 0cfd6da784f84..71a315e73cbe7 100644 ---- a/arch/riscv/kernel/vdso/Makefile -+++ b/arch/riscv/kernel/vdso/Makefile -@@ -32,9 +32,10 @@ CPPFLAGS_vdso.lds += -P -C -U$(ARCH) - # Disable -pg to prevent insert call site - CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os - --# Disable gcov profiling for VDSO code -+# Disable profiling and instrumentation for VDSO code - GCOV_PROFILE := n - KCOV_INSTRUMENT := n -+KASAN_SANITIZE := n - - # Force dependency - $(obj)/vdso.o: $(obj)/vdso.so -diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c -index 5aaa2ca6a9286..978a35ea6081f 100644 ---- a/arch/s390/kernel/vtime.c -+++ b/arch/s390/kernel/vtime.c -@@ -136,7 +136,8 @@ static int do_account_vtime(struct task_struct *tsk) - " stck %1" /* Store current tod clock value */ - #endif - : "=Q" (S390_lowcore.last_update_timer), -- "=Q" (S390_lowcore.last_update_clock)); -+ "=Q" (S390_lowcore.last_update_clock) -+ : : "cc"); - clock = S390_lowcore.last_update_clock - clock; - timer -= S390_lowcore.last_update_timer; - -diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig -index c9c34dc52b7d8..639dde28124a2 100644 ---- a/arch/sparc/Kconfig -+++ b/arch/sparc/Kconfig -@@ -494,7 +494,7 @@ config COMPAT - bool - depends on SPARC64 - default y -- select COMPAT_BINFMT_ELF -+ select COMPAT_BINFMT_ELF if BINFMT_ELF - select HAVE_UID16 - select ARCH_WANT_OLD_COMPAT_IPC - select COMPAT_OLD_SIGACTION -diff --git a/arch/sparc/kernel/led.c b/arch/sparc/kernel/led.c -index bd48575172c32..3a66e62eb2a0e 100644 ---- a/arch/sparc/kernel/led.c -+++ b/arch/sparc/kernel/led.c -@@ -50,6 +50,7 @@ static void led_blink(struct timer_list *unused) - add_timer(&led_blink_timer); - } - -+#ifdef CONFIG_PROC_FS - static int led_proc_show(struct seq_file *m, void *v) - { - if (get_auxio() & AUXIO_LED) -@@ -111,6 +112,7 @@ static const struct proc_ops led_proc_ops = { - .proc_release = single_release, - .proc_write = led_proc_write, - }; -+#endif - - static struct proc_dir_entry *led; - -diff --git a/arch/sparc/lib/memset.S b/arch/sparc/lib/memset.S -index b89d42b29e344..f427f34b8b79b 100644 ---- a/arch/sparc/lib/memset.S -+++ b/arch/sparc/lib/memset.S -@@ -142,6 +142,7 @@ __bzero: - ZERO_LAST_BLOCKS(%o0, 0x48, %g2) - ZERO_LAST_BLOCKS(%o0, 0x08, %g2) - 13: -+ EXT(12b, 13b, 21f) - be 8f - andcc %o1, 4, %g0 - -diff --git a/arch/um/include/shared/skas/mm_id.h b/arch/um/include/shared/skas/mm_id.h -index 4337b4ced0954..e82e203f5f419 100644 ---- a/arch/um/include/shared/skas/mm_id.h -+++ b/arch/um/include/shared/skas/mm_id.h -@@ -12,6 +12,7 @@ struct mm_id { - int pid; - } u; - unsigned long stack; -+ int kill; - }; - - #endif -diff --git a/arch/um/kernel/tlb.c b/arch/um/kernel/tlb.c -index 61776790cd678..5be1b0da9f3be 100644 ---- a/arch/um/kernel/tlb.c -+++ b/arch/um/kernel/tlb.c -@@ -125,6 +125,9 @@ static int add_mmap(unsigned long virt, unsigned long phys, unsigned long len, - struct host_vm_op *last; - int fd = -1, ret = 0; - -+ if (virt + len > STUB_START && virt < STUB_END) -+ return -EINVAL; -+ - if (hvc->userspace) - fd = phys_mapping(phys, &offset); - else -@@ -162,7 +165,7 @@ static int add_munmap(unsigned long addr, unsigned long len, - struct host_vm_op *last; - int ret = 0; - -- if ((addr >= STUB_START) && (addr < STUB_END)) -+ if (addr + len > STUB_START && addr < STUB_END) - return -EINVAL; - - if (hvc->index != 0) { -@@ -192,6 +195,9 @@ static int add_mprotect(unsigned long addr, unsigned long len, - struct host_vm_op *last; - int ret = 0; - -+ if (addr + len > STUB_START && addr < STUB_END) -+ return -EINVAL; -+ - if (hvc->index != 0) { - last = &hvc->ops[hvc->index - 1]; - if ((last->type == MPROTECT) && -@@ -346,12 +352,11 @@ void fix_range_common(struct mm_struct *mm, unsigned long start_addr, - - /* This is not an else because ret is modified above */ - if (ret) { -+ struct mm_id *mm_idp = ¤t->mm->context.id; -+ - printk(KERN_ERR "fix_range_common: failed, killing current " - "process: %d\n", task_tgid_vnr(current)); -- /* We are under mmap_lock, release it such that current can terminate */ -- mmap_write_unlock(current->mm); -- force_sig(SIGKILL); -- do_signal(¤t->thread.regs); -+ mm_idp->kill = 1; - } - } - -@@ -472,6 +477,10 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long address) - struct mm_id *mm_id; - - address &= PAGE_MASK; -+ -+ if (address >= STUB_START && address < STUB_END) -+ goto kill; -+ - pgd = pgd_offset(mm, address); - if (!pgd_present(*pgd)) - goto kill; -diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c -index 0621d521208e4..02c4741ade5e8 100644 ---- a/arch/um/os-Linux/skas/process.c -+++ b/arch/um/os-Linux/skas/process.c -@@ -249,6 +249,7 @@ static int userspace_tramp(void *stack) - } - - int userspace_pid[NR_CPUS]; -+int kill_userspace_mm[NR_CPUS]; - - /** - * start_userspace() - prepare a new userspace process -@@ -342,6 +343,8 @@ void userspace(struct uml_pt_regs *regs, unsigned long *aux_fp_regs) - interrupt_end(); - - while (1) { -+ if (kill_userspace_mm[0]) -+ fatal_sigsegv(); - - /* - * This can legitimately fail if the process loads a -@@ -663,4 +666,5 @@ void reboot_skas(void) - void __switch_mm(struct mm_id *mm_idp) - { - userspace_pid[0] = mm_idp->u.pid; -+ kill_userspace_mm[0] = mm_idp->kill; - } -diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c -index ad8a7188a2bf7..f9a1d98e75349 100644 ---- a/arch/x86/crypto/aesni-intel_glue.c -+++ b/arch/x86/crypto/aesni-intel_glue.c -@@ -686,7 +686,8 @@ static int gcmaes_crypt_by_sg(bool enc, struct aead_request *req, - struct crypto_aead *tfm = crypto_aead_reqtfm(req); - unsigned long auth_tag_len = crypto_aead_authsize(tfm); - const struct aesni_gcm_tfm_s *gcm_tfm = aesni_gcm_tfm; -- struct gcm_context_data data AESNI_ALIGN_ATTR; -+ u8 databuf[sizeof(struct gcm_context_data) + (AESNI_ALIGN - 8)] __aligned(8); -+ struct gcm_context_data *data = PTR_ALIGN((void *)databuf, AESNI_ALIGN); - struct scatter_walk dst_sg_walk = {}; - unsigned long left = req->cryptlen; - unsigned long len, srclen, dstlen; -@@ -735,8 +736,7 @@ static int gcmaes_crypt_by_sg(bool enc, struct aead_request *req, - } - - kernel_fpu_begin(); -- gcm_tfm->init(aes_ctx, &data, iv, -- hash_subkey, assoc, assoclen); -+ gcm_tfm->init(aes_ctx, data, iv, hash_subkey, assoc, assoclen); - if (req->src != req->dst) { - while (left) { - src = scatterwalk_map(&src_sg_walk); -@@ -746,10 +746,10 @@ static int gcmaes_crypt_by_sg(bool enc, struct aead_request *req, - len = min(srclen, dstlen); - if (len) { - if (enc) -- gcm_tfm->enc_update(aes_ctx, &data, -+ gcm_tfm->enc_update(aes_ctx, data, - dst, src, len); - else -- gcm_tfm->dec_update(aes_ctx, &data, -+ gcm_tfm->dec_update(aes_ctx, data, - dst, src, len); - } - left -= len; -@@ -767,10 +767,10 @@ static int gcmaes_crypt_by_sg(bool enc, struct aead_request *req, - len = scatterwalk_clamp(&src_sg_walk, left); - if (len) { - if (enc) -- gcm_tfm->enc_update(aes_ctx, &data, -+ gcm_tfm->enc_update(aes_ctx, data, - src, src, len); - else -- gcm_tfm->dec_update(aes_ctx, &data, -+ gcm_tfm->dec_update(aes_ctx, data, - src, src, len); - } - left -= len; -@@ -779,7 +779,7 @@ static int gcmaes_crypt_by_sg(bool enc, struct aead_request *req, - scatterwalk_done(&src_sg_walk, 1, left); - } - } -- gcm_tfm->finalize(aes_ctx, &data, authTag, auth_tag_len); -+ gcm_tfm->finalize(aes_ctx, data, authTag, auth_tag_len); - kernel_fpu_end(); - - if (!assocmem) -@@ -828,7 +828,8 @@ static int helper_rfc4106_encrypt(struct aead_request *req) - struct crypto_aead *tfm = crypto_aead_reqtfm(req); - struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm); - void *aes_ctx = &(ctx->aes_key_expanded); -- u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN))); -+ u8 ivbuf[16 + (AESNI_ALIGN - 8)] __aligned(8); -+ u8 *iv = PTR_ALIGN(&ivbuf[0], AESNI_ALIGN); - unsigned int i; - __be32 counter = cpu_to_be32(1); - -@@ -855,7 +856,8 @@ static int helper_rfc4106_decrypt(struct aead_request *req) - struct crypto_aead *tfm = crypto_aead_reqtfm(req); - struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm); - void *aes_ctx = &(ctx->aes_key_expanded); -- u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN))); -+ u8 ivbuf[16 + (AESNI_ALIGN - 8)] __aligned(8); -+ u8 *iv = PTR_ALIGN(&ivbuf[0], AESNI_ALIGN); - unsigned int i; - - if (unlikely(req->assoclen != 16 && req->assoclen != 20)) -@@ -985,7 +987,8 @@ static int generic_gcmaes_encrypt(struct aead_request *req) - struct crypto_aead *tfm = crypto_aead_reqtfm(req); - struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(tfm); - void *aes_ctx = &(ctx->aes_key_expanded); -- u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN))); -+ u8 ivbuf[16 + (AESNI_ALIGN - 8)] __aligned(8); -+ u8 *iv = PTR_ALIGN(&ivbuf[0], AESNI_ALIGN); - __be32 counter = cpu_to_be32(1); - - memcpy(iv, req->iv, 12); -@@ -1001,7 +1004,8 @@ static int generic_gcmaes_decrypt(struct aead_request *req) - struct crypto_aead *tfm = crypto_aead_reqtfm(req); - struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(tfm); - void *aes_ctx = &(ctx->aes_key_expanded); -- u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN))); -+ u8 ivbuf[16 + (AESNI_ALIGN - 8)] __aligned(8); -+ u8 *iv = PTR_ALIGN(&ivbuf[0], AESNI_ALIGN); - - memcpy(iv, req->iv, 12); - *((__be32 *)(iv+12)) = counter; -diff --git a/arch/x86/entry/common.c b/arch/x86/entry/common.c -index 0904f5676e4d8..f89ae8ada64fe 100644 ---- a/arch/x86/entry/common.c -+++ b/arch/x86/entry/common.c -@@ -270,7 +270,7 @@ __visible noinstr void xen_pv_evtchn_do_upcall(struct pt_regs *regs) - - instrumentation_begin(); - run_on_irqstack_cond(__xen_pv_evtchn_do_upcall, regs); -- instrumentation_begin(); -+ instrumentation_end(); - - set_irq_regs(old_regs); - -diff --git a/arch/x86/include/asm/virtext.h b/arch/x86/include/asm/virtext.h -index 9aad0e0876fba..fda3e7747c223 100644 ---- a/arch/x86/include/asm/virtext.h -+++ b/arch/x86/include/asm/virtext.h -@@ -30,15 +30,22 @@ static inline int cpu_has_vmx(void) - } - - --/** Disable VMX on the current CPU -+/** -+ * cpu_vmxoff() - Disable VMX on the current CPU - * -- * vmxoff causes a undefined-opcode exception if vmxon was not run -- * on the CPU previously. Only call this function if you know VMX -- * is enabled. -+ * Disable VMX and clear CR4.VMXE (even if VMXOFF faults) -+ * -+ * Note, VMXOFF causes a #UD if the CPU is !post-VMXON, but it's impossible to -+ * atomically track post-VMXON state, e.g. this may be called in NMI context. -+ * Eat all faults as all other faults on VMXOFF faults are mode related, i.e. -+ * faults are guaranteed to be due to the !post-VMXON check unless the CPU is -+ * magically in RM, VM86, compat mode, or at CPL>0. - */ - static inline void cpu_vmxoff(void) - { -- asm volatile ("vmxoff"); -+ asm_volatile_goto("1: vmxoff\n\t" -+ _ASM_EXTABLE(1b, %l[fault]) :::: fault); -+fault: - cr4_clear_bits(X86_CR4_VMXE); - } - -diff --git a/arch/x86/kernel/cpu/sgx/main.c b/arch/x86/kernel/cpu/sgx/main.c -index c519fc5f69480..8df81a3ed9457 100644 ---- a/arch/x86/kernel/cpu/sgx/main.c -+++ b/arch/x86/kernel/cpu/sgx/main.c -@@ -700,25 +700,27 @@ static bool __init sgx_page_cache_init(void) - return true; - } - --static void __init sgx_init(void) -+static int __init sgx_init(void) - { - int ret; - int i; - - if (!cpu_feature_enabled(X86_FEATURE_SGX)) -- return; -+ return -ENODEV; - - if (!sgx_page_cache_init()) -- return; -+ return -ENOMEM; - -- if (!sgx_page_reclaimer_init()) -+ if (!sgx_page_reclaimer_init()) { -+ ret = -ENOMEM; - goto err_page_cache; -+ } - - ret = sgx_drv_init(); - if (ret) - goto err_kthread; - -- return; -+ return 0; - - err_kthread: - kthread_stop(ksgxd_tsk); -@@ -728,6 +730,8 @@ err_page_cache: - vfree(sgx_epc_sections[i].pages); - memunmap(sgx_epc_sections[i].virt_addr); - } -+ -+ return ret; - } - - device_initcall(sgx_init); -diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c -index 8a67d1fa8dc58..ed8ac6bcbafb2 100644 ---- a/arch/x86/kernel/msr.c -+++ b/arch/x86/kernel/msr.c -@@ -182,6 +182,13 @@ static long msr_ioctl(struct file *file, unsigned int ioc, unsigned long arg) - err = security_locked_down(LOCKDOWN_MSR); - if (err) - break; -+ -+ err = filter_write(regs[1]); -+ if (err) -+ return err; -+ -+ add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); -+ - err = wrmsr_safe_regs_on_cpu(cpu, regs); - if (err) - break; -diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c -index db115943e8bdc..efbaef8b4de98 100644 ---- a/arch/x86/kernel/reboot.c -+++ b/arch/x86/kernel/reboot.c -@@ -538,31 +538,21 @@ static void emergency_vmx_disable_all(void) - local_irq_disable(); - - /* -- * We need to disable VMX on all CPUs before rebooting, otherwise -- * we risk hanging up the machine, because the CPU ignores INIT -- * signals when VMX is enabled. -+ * Disable VMX on all CPUs before rebooting, otherwise we risk hanging -+ * the machine, because the CPU blocks INIT when it's in VMX root. - * -- * We can't take any locks and we may be on an inconsistent -- * state, so we use NMIs as IPIs to tell the other CPUs to disable -- * VMX and halt. -+ * We can't take any locks and we may be on an inconsistent state, so -+ * use NMIs as IPIs to tell the other CPUs to exit VMX root and halt. - * -- * For safety, we will avoid running the nmi_shootdown_cpus() -- * stuff unnecessarily, but we don't have a way to check -- * if other CPUs have VMX enabled. So we will call it only if the -- * CPU we are running on has VMX enabled. -- * -- * We will miss cases where VMX is not enabled on all CPUs. This -- * shouldn't do much harm because KVM always enable VMX on all -- * CPUs anyway. But we can miss it on the small window where KVM -- * is still enabling VMX. -+ * Do the NMI shootdown even if VMX if off on _this_ CPU, as that -+ * doesn't prevent a different CPU from being in VMX root operation. - */ -- if (cpu_has_vmx() && cpu_vmx_enabled()) { -- /* Disable VMX on this CPU. */ -- cpu_vmxoff(); -+ if (cpu_has_vmx()) { -+ /* Safely force _this_ CPU out of VMX root operation. */ -+ __cpu_emergency_vmxoff(); - -- /* Halt and disable VMX on the other CPUs */ -+ /* Halt and exit VMX root operation on the other CPUs. */ - nmi_shootdown_cpus(vmxoff_nmi); -- - } - } - -diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c -index 66a08322988f2..1453b9b794425 100644 ---- a/arch/x86/kvm/emulate.c -+++ b/arch/x86/kvm/emulate.c -@@ -2564,12 +2564,12 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt, - ctxt->_eip = GET_SMSTATE(u64, smstate, 0x7f78); - ctxt->eflags = GET_SMSTATE(u32, smstate, 0x7f70) | X86_EFLAGS_FIXED; - -- val = GET_SMSTATE(u32, smstate, 0x7f68); -+ val = GET_SMSTATE(u64, smstate, 0x7f68); - - if (ctxt->ops->set_dr(ctxt, 6, (val & DR6_VOLATILE) | DR6_FIXED_1)) - return X86EMUL_UNHANDLEABLE; - -- val = GET_SMSTATE(u32, smstate, 0x7f60); -+ val = GET_SMSTATE(u64, smstate, 0x7f60); - - if (ctxt->ops->set_dr(ctxt, 7, (val & DR7_VOLATILE) | DR7_FIXED_1)) - return X86EMUL_UNHANDLEABLE; -diff --git a/arch/x86/kvm/mmu/tdp_mmu.c b/arch/x86/kvm/mmu/tdp_mmu.c -index b56d604809b8a..17976998bffbc 100644 ---- a/arch/x86/kvm/mmu/tdp_mmu.c -+++ b/arch/x86/kvm/mmu/tdp_mmu.c -@@ -1067,7 +1067,8 @@ static void zap_collapsible_spte_range(struct kvm *kvm, - - pfn = spte_to_pfn(iter.old_spte); - if (kvm_is_reserved_pfn(pfn) || -- !PageTransCompoundMap(pfn_to_page(pfn))) -+ (!PageCompound(pfn_to_page(pfn)) && -+ !kvm_is_zone_device_pfn(pfn))) - continue; - - tdp_mmu_set_spte(kvm, &iter, 0); -diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c -index db30670dd8c4a..d36773c7b5359 100644 ---- a/arch/x86/kvm/svm/nested.c -+++ b/arch/x86/kvm/svm/nested.c -@@ -51,6 +51,23 @@ static void nested_svm_inject_npf_exit(struct kvm_vcpu *vcpu, - nested_svm_vmexit(svm); - } - -+static void svm_inject_page_fault_nested(struct kvm_vcpu *vcpu, struct x86_exception *fault) -+{ -+ struct vcpu_svm *svm = to_svm(vcpu); -+ WARN_ON(!is_guest_mode(vcpu)); -+ -+ if (vmcb_is_intercept(&svm->nested.ctl, INTERCEPT_EXCEPTION_OFFSET + PF_VECTOR) && -+ !svm->nested.nested_run_pending) { -+ svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + PF_VECTOR; -+ svm->vmcb->control.exit_code_hi = 0; -+ svm->vmcb->control.exit_info_1 = fault->error_code; -+ svm->vmcb->control.exit_info_2 = fault->address; -+ nested_svm_vmexit(svm); -+ } else { -+ kvm_inject_page_fault(vcpu, fault); -+ } -+} -+ - static u64 nested_svm_get_tdp_pdptr(struct kvm_vcpu *vcpu, int index) - { - struct vcpu_svm *svm = to_svm(vcpu); -@@ -58,7 +75,7 @@ static u64 nested_svm_get_tdp_pdptr(struct kvm_vcpu *vcpu, int index) - u64 pdpte; - int ret; - -- ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(__sme_clr(cr3)), &pdpte, -+ ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(cr3), &pdpte, - offset_in_page(cr3) + index * 8, 8); - if (ret) - return 0; -@@ -446,6 +463,9 @@ int enter_svm_guest_mode(struct vcpu_svm *svm, u64 vmcb12_gpa, - if (ret) - return ret; - -+ if (!npt_enabled) -+ svm->vcpu.arch.mmu->inject_page_fault = svm_inject_page_fault_nested; -+ - svm_set_gif(svm, true); - - return 0; -diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c -index 3442d44ca53b8..825ef6d281c98 100644 ---- a/arch/x86/kvm/svm/svm.c -+++ b/arch/x86/kvm/svm/svm.c -@@ -1105,12 +1105,12 @@ static u64 svm_write_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 offset) - static void svm_check_invpcid(struct vcpu_svm *svm) - { - /* -- * Intercept INVPCID instruction only if shadow page table is -- * enabled. Interception is not required with nested page table -- * enabled. -+ * Intercept INVPCID if shadow paging is enabled to sync/free shadow -+ * roots, or if INVPCID is disabled in the guest to inject #UD. - */ - if (kvm_cpu_cap_has(X86_FEATURE_INVPCID)) { -- if (!npt_enabled) -+ if (!npt_enabled || -+ !guest_cpuid_has(&svm->vcpu, X86_FEATURE_INVPCID)) - svm_set_intercept(svm, INTERCEPT_INVPCID); - else - svm_clr_intercept(svm, INTERCEPT_INVPCID); -diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c -index 1b404e4d7dd8e..b967c1c774a1f 100644 ---- a/arch/x86/kvm/x86.c -+++ b/arch/x86/kvm/x86.c -@@ -1782,6 +1782,7 @@ EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr); - - bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu) - { -+ xfer_to_guest_mode_prepare(); - return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) || - xfer_to_guest_mode_work_pending(); - } -diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c -index f1f1b5a0956a0..441c3e9b89719 100644 ---- a/arch/x86/mm/fault.c -+++ b/arch/x86/mm/fault.c -@@ -54,7 +54,7 @@ kmmio_fault(struct pt_regs *regs, unsigned long addr) - * 32-bit mode: - * - * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. -- * Check that here and ignore it. -+ * Check that here and ignore it. This is AMD erratum #91. - * - * 64-bit mode: - * -@@ -83,11 +83,7 @@ check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr, - #ifdef CONFIG_X86_64 - case 0x40: - /* -- * In AMD64 long mode 0x40..0x4F are valid REX prefixes -- * Need to figure out under what instruction mode the -- * instruction was issued. Could check the LDT for lm, -- * but for now it's good enough to assume that long -- * mode only uses well known segments or kernel. -+ * In 64-bit mode 0x40..0x4F are valid REX prefixes - */ - return (!user_mode(regs) || user_64bit_mode(regs)); - #endif -@@ -127,20 +123,31 @@ is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) - instr = (void *)convert_ip_to_linear(current, regs); - max_instr = instr + 15; - -- if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE_MAX) -- return 0; -+ /* -+ * This code has historically always bailed out if IP points to a -+ * not-present page (e.g. due to a race). No one has ever -+ * complained about this. -+ */ -+ pagefault_disable(); - - while (instr < max_instr) { - unsigned char opcode; - -- if (get_kernel_nofault(opcode, instr)) -- break; -+ if (user_mode(regs)) { -+ if (get_user(opcode, instr)) -+ break; -+ } else { -+ if (get_kernel_nofault(opcode, instr)) -+ break; -+ } - - instr++; - - if (!check_prefetch_opcode(regs, instr, opcode, &prefetch)) - break; - } -+ -+ pagefault_enable(); - return prefetch; - } - -diff --git a/arch/x86/mm/pat/memtype.c b/arch/x86/mm/pat/memtype.c -index 8f665c352bf0d..ca311aaa67b88 100644 ---- a/arch/x86/mm/pat/memtype.c -+++ b/arch/x86/mm/pat/memtype.c -@@ -1164,12 +1164,14 @@ static void *memtype_seq_start(struct seq_file *seq, loff_t *pos) - - static void *memtype_seq_next(struct seq_file *seq, void *v, loff_t *pos) - { -+ kfree(v); - ++*pos; - return memtype_get_idx(*pos); - } - - static void memtype_seq_stop(struct seq_file *seq, void *v) - { -+ kfree(v); - } - - static int memtype_seq_show(struct seq_file *seq, void *v) -@@ -1181,8 +1183,6 @@ static int memtype_seq_show(struct seq_file *seq, void *v) - entry_print->end, - cattr_name(entry_print->type)); - -- kfree(entry_print); -- - return 0; - } - -diff --git a/block/bfq-iosched.c b/block/bfq-iosched.c -index 9e81d1052091f..5720978e4d09b 100644 ---- a/block/bfq-iosched.c -+++ b/block/bfq-iosched.c -@@ -2937,6 +2937,7 @@ static void __bfq_set_in_service_queue(struct bfq_data *bfqd, - } - - bfqd->in_service_queue = bfqq; -+ bfqd->in_serv_last_pos = 0; - } - - /* -diff --git a/block/blk-settings.c b/block/blk-settings.c -index 43990b1d148b8..89447d32d9ea5 100644 ---- a/block/blk-settings.c -+++ b/block/blk-settings.c -@@ -481,6 +481,14 @@ void blk_queue_io_opt(struct request_queue *q, unsigned int opt) - } - EXPORT_SYMBOL(blk_queue_io_opt); - -+static unsigned int blk_round_down_sectors(unsigned int sectors, unsigned int lbs) -+{ -+ sectors = round_down(sectors, lbs >> SECTOR_SHIFT); -+ if (sectors < PAGE_SIZE >> SECTOR_SHIFT) -+ sectors = PAGE_SIZE >> SECTOR_SHIFT; -+ return sectors; -+} -+ - /** - * blk_stack_limits - adjust queue_limits for stacked devices - * @t: the stacking driver limits (top device) -@@ -607,6 +615,10 @@ int blk_stack_limits(struct queue_limits *t, struct queue_limits *b, - ret = -1; - } - -+ t->max_sectors = blk_round_down_sectors(t->max_sectors, t->logical_block_size); -+ t->max_hw_sectors = blk_round_down_sectors(t->max_hw_sectors, t->logical_block_size); -+ t->max_dev_sectors = blk_round_down_sectors(t->max_dev_sectors, t->logical_block_size); -+ - /* Discard alignment and granularity */ - if (b->discard_granularity) { - alignment = queue_limit_discard_alignment(b, start); -diff --git a/block/bsg.c b/block/bsg.c -index d7bae94b64d95..3d78e843a83f6 100644 ---- a/block/bsg.c -+++ b/block/bsg.c -@@ -157,8 +157,10 @@ static int bsg_sg_io(struct request_queue *q, fmode_t mode, void __user *uarg) - return PTR_ERR(rq); - - ret = q->bsg_dev.ops->fill_hdr(rq, &hdr, mode); -- if (ret) -+ if (ret) { -+ blk_put_request(rq); - return ret; -+ } - - rq->timeout = msecs_to_jiffies(hdr.timeout); - if (!rq->timeout) -diff --git a/block/genhd.c b/block/genhd.c -index 9e741a4f351be..07a0ef741de19 100644 ---- a/block/genhd.c -+++ b/block/genhd.c -@@ -74,7 +74,7 @@ bool set_capacity_and_notify(struct gendisk *disk, sector_t size) - return false; - - pr_info("%s: detected capacity change from %lld to %lld\n", -- disk->disk_name, size, capacity); -+ disk->disk_name, capacity, size); - - /* - * Historically we did not send a uevent for changes to/from an empty -diff --git a/block/ioctl.c b/block/ioctl.c -index d61d652078f41..ff241e663c018 100644 ---- a/block/ioctl.c -+++ b/block/ioctl.c -@@ -81,20 +81,27 @@ static int compat_blkpg_ioctl(struct block_device *bdev, - } - #endif - --static int blkdev_reread_part(struct block_device *bdev) -+static int blkdev_reread_part(struct block_device *bdev, fmode_t mode) - { -- int ret; -+ struct block_device *tmp; - - if (!disk_part_scan_enabled(bdev->bd_disk) || bdev_is_partition(bdev)) - return -EINVAL; - if (!capable(CAP_SYS_ADMIN)) - return -EACCES; - -- mutex_lock(&bdev->bd_mutex); -- ret = bdev_disk_changed(bdev, false); -- mutex_unlock(&bdev->bd_mutex); -+ /* -+ * Reopen the device to revalidate the driver state and force a -+ * partition rescan. -+ */ -+ mode &= ~FMODE_EXCL; -+ set_bit(GD_NEED_PART_SCAN, &bdev->bd_disk->state); - -- return ret; -+ tmp = blkdev_get_by_dev(bdev->bd_dev, mode, NULL); -+ if (IS_ERR(tmp)) -+ return PTR_ERR(tmp); -+ blkdev_put(tmp, mode); -+ return 0; - } - - static int blk_ioctl_discard(struct block_device *bdev, fmode_t mode, -@@ -498,7 +505,7 @@ static int blkdev_common_ioctl(struct block_device *bdev, fmode_t mode, - bdev->bd_bdi->ra_pages = (arg * 512) / PAGE_SIZE; - return 0; - case BLKRRPART: -- return blkdev_reread_part(bdev); -+ return blkdev_reread_part(bdev, mode); - case BLKTRACESTART: - case BLKTRACESTOP: - case BLKTRACETEARDOWN: -diff --git a/certs/blacklist.c b/certs/blacklist.c -index 6514f9ebc943f..f1c434b04b5e4 100644 ---- a/certs/blacklist.c -+++ b/certs/blacklist.c -@@ -162,7 +162,7 @@ static int __init blacklist_init(void) - KEY_USR_VIEW | KEY_USR_READ | - KEY_USR_SEARCH, - KEY_ALLOC_NOT_IN_QUOTA | -- KEY_FLAG_KEEP, -+ KEY_ALLOC_SET_KEEP, - NULL, NULL); - if (IS_ERR(blacklist_keyring)) - panic("Can't allocate system blacklist keyring\n"); -diff --git a/crypto/ecdh_helper.c b/crypto/ecdh_helper.c -index 66fcb2ea81544..fca63b559f655 100644 ---- a/crypto/ecdh_helper.c -+++ b/crypto/ecdh_helper.c -@@ -67,6 +67,9 @@ int crypto_ecdh_decode_key(const char *buf, unsigned int len, - if (secret.type != CRYPTO_KPP_SECRET_TYPE_ECDH) - return -EINVAL; - -+ if (unlikely(len < secret.len)) -+ return -EINVAL; -+ - ptr = ecdh_unpack_data(¶ms->curve_id, ptr, sizeof(params->curve_id)); - ptr = ecdh_unpack_data(¶ms->key_size, ptr, sizeof(params->key_size)); - if (secret.len != crypto_ecdh_key_len(params)) -diff --git a/crypto/michael_mic.c b/crypto/michael_mic.c -index 63350c4ad4617..f4c31049601c9 100644 ---- a/crypto/michael_mic.c -+++ b/crypto/michael_mic.c -@@ -7,7 +7,7 @@ - * Copyright (c) 2004 Jouni Malinen - */ - #include --#include -+#include - #include - #include - #include -@@ -19,7 +19,7 @@ struct michael_mic_ctx { - }; - - struct michael_mic_desc_ctx { -- u8 pending[4]; -+ __le32 pending; - size_t pending_len; - - u32 l, r; -@@ -60,13 +60,12 @@ static int michael_update(struct shash_desc *desc, const u8 *data, - unsigned int len) - { - struct michael_mic_desc_ctx *mctx = shash_desc_ctx(desc); -- const __le32 *src; - - if (mctx->pending_len) { - int flen = 4 - mctx->pending_len; - if (flen > len) - flen = len; -- memcpy(&mctx->pending[mctx->pending_len], data, flen); -+ memcpy((u8 *)&mctx->pending + mctx->pending_len, data, flen); - mctx->pending_len += flen; - data += flen; - len -= flen; -@@ -74,23 +73,21 @@ static int michael_update(struct shash_desc *desc, const u8 *data, - if (mctx->pending_len < 4) - return 0; - -- src = (const __le32 *)mctx->pending; -- mctx->l ^= le32_to_cpup(src); -+ mctx->l ^= le32_to_cpu(mctx->pending); - michael_block(mctx->l, mctx->r); - mctx->pending_len = 0; - } - -- src = (const __le32 *)data; -- - while (len >= 4) { -- mctx->l ^= le32_to_cpup(src++); -+ mctx->l ^= get_unaligned_le32(data); - michael_block(mctx->l, mctx->r); -+ data += 4; - len -= 4; - } - - if (len > 0) { - mctx->pending_len = len; -- memcpy(mctx->pending, src, len); -+ memcpy(&mctx->pending, data, len); - } - - return 0; -@@ -100,8 +97,7 @@ static int michael_update(struct shash_desc *desc, const u8 *data, - static int michael_final(struct shash_desc *desc, u8 *out) - { - struct michael_mic_desc_ctx *mctx = shash_desc_ctx(desc); -- u8 *data = mctx->pending; -- __le32 *dst = (__le32 *)out; -+ u8 *data = (u8 *)&mctx->pending; - - /* Last block and padding (0x5a, 4..7 x 0) */ - switch (mctx->pending_len) { -@@ -123,8 +119,8 @@ static int michael_final(struct shash_desc *desc, u8 *out) - /* l ^= 0; */ - michael_block(mctx->l, mctx->r); - -- dst[0] = cpu_to_le32(mctx->l); -- dst[1] = cpu_to_le32(mctx->r); -+ put_unaligned_le32(mctx->l, out); -+ put_unaligned_le32(mctx->r, out + 4); - - return 0; - } -@@ -135,13 +131,11 @@ static int michael_setkey(struct crypto_shash *tfm, const u8 *key, - { - struct michael_mic_ctx *mctx = crypto_shash_ctx(tfm); - -- const __le32 *data = (const __le32 *)key; -- - if (keylen != 8) - return -EINVAL; - -- mctx->l = le32_to_cpu(data[0]); -- mctx->r = le32_to_cpu(data[1]); -+ mctx->l = get_unaligned_le32(key); -+ mctx->r = get_unaligned_le32(key + 4); - return 0; - } - -@@ -156,7 +150,6 @@ static struct shash_alg alg = { - .cra_name = "michael_mic", - .cra_driver_name = "michael_mic-generic", - .cra_blocksize = 8, -- .cra_alignmask = 3, - .cra_ctxsize = sizeof(struct michael_mic_ctx), - .cra_module = THIS_MODULE, - } -diff --git a/drivers/acpi/acpi_configfs.c b/drivers/acpi/acpi_configfs.c -index cf91f49101eac..3a14859dbb757 100644 ---- a/drivers/acpi/acpi_configfs.c -+++ b/drivers/acpi/acpi_configfs.c -@@ -268,7 +268,12 @@ static int __init acpi_configfs_init(void) - - acpi_table_group = configfs_register_default_group(root, "table", - &acpi_tables_type); -- return PTR_ERR_OR_ZERO(acpi_table_group); -+ if (IS_ERR(acpi_table_group)) { -+ configfs_unregister_subsystem(&acpi_configfs); -+ return PTR_ERR(acpi_table_group); -+ } -+ -+ return 0; - } - module_init(acpi_configfs_init); - -diff --git a/drivers/acpi/property.c b/drivers/acpi/property.c -index 24e87b6305731..16b28084c1ca6 100644 ---- a/drivers/acpi/property.c -+++ b/drivers/acpi/property.c -@@ -787,9 +787,6 @@ static int acpi_data_prop_read_single(const struct acpi_device_data *data, - const union acpi_object *obj; - int ret; - -- if (!val) -- return -EINVAL; -- - if (proptype >= DEV_PROP_U8 && proptype <= DEV_PROP_U64) { - ret = acpi_data_get_property(data, propname, ACPI_TYPE_INTEGER, &obj); - if (ret) -@@ -799,28 +796,43 @@ static int acpi_data_prop_read_single(const struct acpi_device_data *data, - case DEV_PROP_U8: - if (obj->integer.value > U8_MAX) - return -EOVERFLOW; -- *(u8 *)val = obj->integer.value; -+ -+ if (val) -+ *(u8 *)val = obj->integer.value; -+ - break; - case DEV_PROP_U16: - if (obj->integer.value > U16_MAX) - return -EOVERFLOW; -- *(u16 *)val = obj->integer.value; -+ -+ if (val) -+ *(u16 *)val = obj->integer.value; -+ - break; - case DEV_PROP_U32: - if (obj->integer.value > U32_MAX) - return -EOVERFLOW; -- *(u32 *)val = obj->integer.value; -+ -+ if (val) -+ *(u32 *)val = obj->integer.value; -+ - break; - default: -- *(u64 *)val = obj->integer.value; -+ if (val) -+ *(u64 *)val = obj->integer.value; -+ - break; - } -+ -+ if (!val) -+ return 1; - } else if (proptype == DEV_PROP_STRING) { - ret = acpi_data_get_property(data, propname, ACPI_TYPE_STRING, &obj); - if (ret) - return ret; - -- *(char **)val = obj->string.pointer; -+ if (val) -+ *(char **)val = obj->string.pointer; - - return 1; - } else { -@@ -834,7 +846,7 @@ int acpi_dev_prop_read_single(struct acpi_device *adev, const char *propname, - { - int ret; - -- if (!adev) -+ if (!adev || !val) - return -EINVAL; - - ret = acpi_data_prop_read_single(&adev->data, propname, proptype, val); -@@ -928,10 +940,20 @@ static int acpi_data_prop_read(const struct acpi_device_data *data, - const union acpi_object *items; - int ret; - -- if (val && nval == 1) { -+ if (nval == 1 || !val) { - ret = acpi_data_prop_read_single(data, propname, proptype, val); -- if (ret >= 0) -+ /* -+ * The overflow error means that the property is there and it is -+ * single-value, but its type does not match, so return. -+ */ -+ if (ret >= 0 || ret == -EOVERFLOW) - return ret; -+ -+ /* -+ * Reading this property as a single-value one failed, but its -+ * value may still be represented as one-element array, so -+ * continue. -+ */ - } - - ret = acpi_data_get_property_array(data, propname, ACPI_TYPE_ANY, &obj); -diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c -index ecc304149067c..b5f5ca4e3f343 100644 ---- a/drivers/amba/bus.c -+++ b/drivers/amba/bus.c -@@ -299,10 +299,11 @@ static int amba_remove(struct device *dev) - { - struct amba_device *pcdev = to_amba_device(dev); - struct amba_driver *drv = to_amba_driver(dev->driver); -- int ret; -+ int ret = 0; - - pm_runtime_get_sync(dev); -- ret = drv->remove(pcdev); -+ if (drv->remove) -+ ret = drv->remove(pcdev); - pm_runtime_put_noidle(dev); - - /* Undo the runtime PM settings in amba_probe() */ -@@ -319,7 +320,9 @@ static int amba_remove(struct device *dev) - static void amba_shutdown(struct device *dev) - { - struct amba_driver *drv = to_amba_driver(dev->driver); -- drv->shutdown(to_amba_device(dev)); -+ -+ if (drv->shutdown) -+ drv->shutdown(to_amba_device(dev)); - } - - /** -@@ -332,12 +335,13 @@ static void amba_shutdown(struct device *dev) - */ - int amba_driver_register(struct amba_driver *drv) - { -- drv->drv.bus = &amba_bustype; -+ if (!drv->probe) -+ return -EINVAL; - --#define SETFN(fn) if (drv->fn) drv->drv.fn = amba_##fn -- SETFN(probe); -- SETFN(remove); -- SETFN(shutdown); -+ drv->drv.bus = &amba_bustype; -+ drv->drv.probe = amba_probe; -+ drv->drv.remove = amba_remove; -+ drv->drv.shutdown = amba_shutdown; - - return driver_register(&drv->drv); - } -diff --git a/drivers/ata/ahci_brcm.c b/drivers/ata/ahci_brcm.c -index 49f7acbfcf01e..5b32df5d33adc 100644 ---- a/drivers/ata/ahci_brcm.c -+++ b/drivers/ata/ahci_brcm.c -@@ -377,6 +377,10 @@ static int __maybe_unused brcm_ahci_resume(struct device *dev) - if (ret) - return ret; - -+ ret = ahci_platform_enable_regulators(hpriv); -+ if (ret) -+ goto out_disable_clks; -+ - brcm_sata_init(priv); - brcm_sata_phys_enable(priv); - brcm_sata_alpm_init(hpriv); -@@ -406,6 +410,8 @@ out_disable_platform_phys: - ahci_platform_disable_phys(hpriv); - out_disable_phys: - brcm_sata_phys_disable(priv); -+ ahci_platform_disable_regulators(hpriv); -+out_disable_clks: - ahci_platform_disable_clks(hpriv); - return ret; - } -@@ -490,6 +496,10 @@ static int brcm_ahci_probe(struct platform_device *pdev) - if (ret) - goto out_reset; - -+ ret = ahci_platform_enable_regulators(hpriv); -+ if (ret) -+ goto out_disable_clks; -+ - /* Must be first so as to configure endianness including that - * of the standard AHCI register space. - */ -@@ -499,7 +509,7 @@ static int brcm_ahci_probe(struct platform_device *pdev) - priv->port_mask = brcm_ahci_get_portmask(hpriv, priv); - if (!priv->port_mask) { - ret = -ENODEV; -- goto out_disable_clks; -+ goto out_disable_regulators; - } - - /* Must be done before ahci_platform_enable_phys() */ -@@ -524,6 +534,8 @@ out_disable_platform_phys: - ahci_platform_disable_phys(hpriv); - out_disable_phys: - brcm_sata_phys_disable(priv); -+out_disable_regulators: -+ ahci_platform_disable_regulators(hpriv); - out_disable_clks: - ahci_platform_disable_clks(hpriv); - out_reset: -diff --git a/drivers/auxdisplay/Kconfig b/drivers/auxdisplay/Kconfig -index a2b59b84bb881..1509cb74705a3 100644 ---- a/drivers/auxdisplay/Kconfig -+++ b/drivers/auxdisplay/Kconfig -@@ -507,6 +507,3 @@ config PANEL - depends on PARPORT - select AUXDISPLAY - select PARPORT_PANEL -- --config CHARLCD -- tristate "Character LCD core support" if COMPILE_TEST -diff --git a/drivers/auxdisplay/ht16k33.c b/drivers/auxdisplay/ht16k33.c -index d951d54b26f52..d8602843e8a53 100644 ---- a/drivers/auxdisplay/ht16k33.c -+++ b/drivers/auxdisplay/ht16k33.c -@@ -117,8 +117,7 @@ static void ht16k33_fb_queue(struct ht16k33_priv *priv) - { - struct ht16k33_fbdev *fbdev = &priv->fbdev; - -- schedule_delayed_work(&fbdev->work, -- msecs_to_jiffies(HZ / fbdev->refresh_rate)); -+ schedule_delayed_work(&fbdev->work, HZ / fbdev->refresh_rate); - } - - /* -diff --git a/drivers/base/auxiliary.c b/drivers/base/auxiliary.c -index 8336535f1e110..d8b314e7d0fdc 100644 ---- a/drivers/base/auxiliary.c -+++ b/drivers/base/auxiliary.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include "base.h" - - static const struct auxiliary_device_id *auxiliary_match_id(const struct auxiliary_device_id *id, - const struct auxiliary_device *auxdev) -@@ -260,19 +261,11 @@ void auxiliary_driver_unregister(struct auxiliary_driver *auxdrv) - } - EXPORT_SYMBOL_GPL(auxiliary_driver_unregister); - --static int __init auxiliary_bus_init(void) -+void __init auxiliary_bus_init(void) - { -- return bus_register(&auxiliary_bus_type); -+ WARN_ON(bus_register(&auxiliary_bus_type)); - } - --static void __exit auxiliary_bus_exit(void) --{ -- bus_unregister(&auxiliary_bus_type); --} -- --module_init(auxiliary_bus_init); --module_exit(auxiliary_bus_exit); -- - MODULE_LICENSE("GPL v2"); - MODULE_DESCRIPTION("Auxiliary Bus"); - MODULE_AUTHOR("David Ertman "); -diff --git a/drivers/base/base.h b/drivers/base/base.h -index f5600a83124fa..52b3d7b75c275 100644 ---- a/drivers/base/base.h -+++ b/drivers/base/base.h -@@ -119,6 +119,11 @@ static inline int hypervisor_init(void) { return 0; } - extern int platform_bus_init(void); - extern void cpu_dev_init(void); - extern void container_dev_init(void); -+#ifdef CONFIG_AUXILIARY_BUS -+extern void auxiliary_bus_init(void); -+#else -+static inline void auxiliary_bus_init(void) { } -+#endif - - struct kobject *virtual_device_parent(struct device *dev); - -diff --git a/drivers/base/init.c b/drivers/base/init.c -index 908e6520e804b..a9f57c22fb9e2 100644 ---- a/drivers/base/init.c -+++ b/drivers/base/init.c -@@ -32,6 +32,7 @@ void __init driver_init(void) - */ - of_core_init(); - platform_bus_init(); -+ auxiliary_bus_init(); - cpu_dev_init(); - memory_dev_init(); - container_dev_init(); -diff --git a/drivers/base/regmap/regmap-sdw.c b/drivers/base/regmap/regmap-sdw.c -index c83be26434e76..966de8a136d90 100644 ---- a/drivers/base/regmap/regmap-sdw.c -+++ b/drivers/base/regmap/regmap-sdw.c -@@ -13,7 +13,7 @@ static int regmap_sdw_write(void *context, unsigned int reg, unsigned int val) - struct device *dev = context; - struct sdw_slave *slave = dev_to_sdw_dev(dev); - -- return sdw_write(slave, reg, val); -+ return sdw_write_no_pm(slave, reg, val); - } - - static int regmap_sdw_read(void *context, unsigned int reg, unsigned int *val) -@@ -22,7 +22,7 @@ static int regmap_sdw_read(void *context, unsigned int reg, unsigned int *val) - struct sdw_slave *slave = dev_to_sdw_dev(dev); - int read; - -- read = sdw_read(slave, reg); -+ read = sdw_read_no_pm(slave, reg); - if (read < 0) - return read; - -diff --git a/drivers/base/swnode.c b/drivers/base/swnode.c -index 4a4b2008fbc26..4fcc1a6fb724c 100644 ---- a/drivers/base/swnode.c -+++ b/drivers/base/swnode.c -@@ -443,14 +443,18 @@ software_node_get_next_child(const struct fwnode_handle *fwnode, - struct swnode *c = to_swnode(child); - - if (!p || list_empty(&p->children) || -- (c && list_is_last(&c->entry, &p->children))) -+ (c && list_is_last(&c->entry, &p->children))) { -+ fwnode_handle_put(child); - return NULL; -+ } - - if (c) - c = list_next_entry(c, entry); - else - c = list_first_entry(&p->children, struct swnode, entry); -- return &c->fwnode; -+ -+ fwnode_handle_put(child); -+ return fwnode_handle_get(&c->fwnode); - } - - static struct fwnode_handle * -diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c -index dfe1dfc901ccc..0b71292d9d5ab 100644 ---- a/drivers/block/floppy.c -+++ b/drivers/block/floppy.c -@@ -4121,23 +4121,23 @@ static int floppy_open(struct block_device *bdev, fmode_t mode) - if (fdc_state[FDC(drive)].rawcmd == 1) - fdc_state[FDC(drive)].rawcmd = 2; - -- if (!(mode & FMODE_NDELAY)) { -- if (mode & (FMODE_READ|FMODE_WRITE)) { -- drive_state[drive].last_checked = 0; -- clear_bit(FD_OPEN_SHOULD_FAIL_BIT, -- &drive_state[drive].flags); -- if (bdev_check_media_change(bdev)) -- floppy_revalidate(bdev->bd_disk); -- if (test_bit(FD_DISK_CHANGED_BIT, &drive_state[drive].flags)) -- goto out; -- if (test_bit(FD_OPEN_SHOULD_FAIL_BIT, &drive_state[drive].flags)) -- goto out; -- } -- res = -EROFS; -- if ((mode & FMODE_WRITE) && -- !test_bit(FD_DISK_WRITABLE_BIT, &drive_state[drive].flags)) -+ if (mode & (FMODE_READ|FMODE_WRITE)) { -+ drive_state[drive].last_checked = 0; -+ clear_bit(FD_OPEN_SHOULD_FAIL_BIT, &drive_state[drive].flags); -+ if (bdev_check_media_change(bdev)) -+ floppy_revalidate(bdev->bd_disk); -+ if (test_bit(FD_DISK_CHANGED_BIT, &drive_state[drive].flags)) -+ goto out; -+ if (test_bit(FD_OPEN_SHOULD_FAIL_BIT, &drive_state[drive].flags)) - goto out; - } -+ -+ res = -EROFS; -+ -+ if ((mode & FMODE_WRITE) && -+ !test_bit(FD_DISK_WRITABLE_BIT, &drive_state[drive].flags)) -+ goto out; -+ - mutex_unlock(&open_lock); - mutex_unlock(&floppy_mutex); - return 0; -diff --git a/drivers/block/zram/zram_drv.c b/drivers/block/zram/zram_drv.c -index e2933cb7a82a3..3279969fc99cb 100644 ---- a/drivers/block/zram/zram_drv.c -+++ b/drivers/block/zram/zram_drv.c -@@ -1082,7 +1082,7 @@ static ssize_t mm_stat_show(struct device *dev, - zram->limit_pages << PAGE_SHIFT, - max_used << PAGE_SHIFT, - (u64)atomic64_read(&zram->stats.same_pages), -- pool_stats.pages_compacted, -+ atomic_long_read(&pool_stats.pages_compacted), - (u64)atomic64_read(&zram->stats.huge_pages), - (u64)atomic64_read(&zram->stats.huge_pages_since)); - up_read(&zram->init_lock); -diff --git a/drivers/bluetooth/btqcomsmd.c b/drivers/bluetooth/btqcomsmd.c -index 98d53764871f5..2acb719e596f5 100644 ---- a/drivers/bluetooth/btqcomsmd.c -+++ b/drivers/bluetooth/btqcomsmd.c -@@ -142,12 +142,16 @@ static int btqcomsmd_probe(struct platform_device *pdev) - - btq->cmd_channel = qcom_wcnss_open_channel(wcnss, "APPS_RIVA_BT_CMD", - btqcomsmd_cmd_callback, btq); -- if (IS_ERR(btq->cmd_channel)) -- return PTR_ERR(btq->cmd_channel); -+ if (IS_ERR(btq->cmd_channel)) { -+ ret = PTR_ERR(btq->cmd_channel); -+ goto destroy_acl_channel; -+ } - - hdev = hci_alloc_dev(); -- if (!hdev) -- return -ENOMEM; -+ if (!hdev) { -+ ret = -ENOMEM; -+ goto destroy_cmd_channel; -+ } - - hci_set_drvdata(hdev, btq); - btq->hdev = hdev; -@@ -161,14 +165,21 @@ static int btqcomsmd_probe(struct platform_device *pdev) - hdev->set_bdaddr = qca_set_bdaddr_rome; - - ret = hci_register_dev(hdev); -- if (ret < 0) { -- hci_free_dev(hdev); -- return ret; -- } -+ if (ret < 0) -+ goto hci_free_dev; - - platform_set_drvdata(pdev, btq); - - return 0; -+ -+hci_free_dev: -+ hci_free_dev(hdev); -+destroy_cmd_channel: -+ rpmsg_destroy_ept(btq->cmd_channel); -+destroy_acl_channel: -+ rpmsg_destroy_ept(btq->acl_channel); -+ -+ return ret; - } - - static int btqcomsmd_remove(struct platform_device *pdev) -diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c -index da57c561642c4..a4f834a50a988 100644 ---- a/drivers/bluetooth/btusb.c -+++ b/drivers/bluetooth/btusb.c -@@ -3195,7 +3195,7 @@ static void btusb_mtk_wmt_recv(struct urb *urb) - skb = bt_skb_alloc(HCI_WMT_MAX_EVENT_SIZE, GFP_ATOMIC); - if (!skb) { - hdev->stat.err_rx++; -- goto err_out; -+ return; - } - - hci_skb_pkt_type(skb) = HCI_EVENT_PKT; -@@ -3213,13 +3213,18 @@ static void btusb_mtk_wmt_recv(struct urb *urb) - */ - if (test_bit(BTUSB_TX_WAIT_VND_EVT, &data->flags)) { - data->evt_skb = skb_clone(skb, GFP_ATOMIC); -- if (!data->evt_skb) -- goto err_out; -+ if (!data->evt_skb) { -+ kfree_skb(skb); -+ return; -+ } - } - - err = hci_recv_frame(hdev, skb); -- if (err < 0) -- goto err_free_skb; -+ if (err < 0) { -+ kfree_skb(data->evt_skb); -+ data->evt_skb = NULL; -+ return; -+ } - - if (test_and_clear_bit(BTUSB_TX_WAIT_VND_EVT, - &data->flags)) { -@@ -3228,11 +3233,6 @@ static void btusb_mtk_wmt_recv(struct urb *urb) - wake_up_bit(&data->flags, - BTUSB_TX_WAIT_VND_EVT); - } --err_out: -- return; --err_free_skb: -- kfree_skb(data->evt_skb); -- data->evt_skb = NULL; - return; - } else if (urb->status == -ENOENT) { - /* Avoid suspend failed when usb_kill_urb */ -diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c -index f83d67eafc9f0..637c5b8c2aa1a 100644 ---- a/drivers/bluetooth/hci_ldisc.c -+++ b/drivers/bluetooth/hci_ldisc.c -@@ -127,10 +127,9 @@ int hci_uart_tx_wakeup(struct hci_uart *hu) - if (!test_bit(HCI_UART_PROTO_READY, &hu->flags)) - goto no_schedule; - -- if (test_and_set_bit(HCI_UART_SENDING, &hu->tx_state)) { -- set_bit(HCI_UART_TX_WAKEUP, &hu->tx_state); -+ set_bit(HCI_UART_TX_WAKEUP, &hu->tx_state); -+ if (test_and_set_bit(HCI_UART_SENDING, &hu->tx_state)) - goto no_schedule; -- } - - BT_DBG(""); - -@@ -174,10 +173,10 @@ restart: - kfree_skb(skb); - } - -+ clear_bit(HCI_UART_SENDING, &hu->tx_state); - if (test_bit(HCI_UART_TX_WAKEUP, &hu->tx_state)) - goto restart; - -- clear_bit(HCI_UART_SENDING, &hu->tx_state); - wake_up_bit(&hu->tx_state, HCI_UART_SENDING); - } - -@@ -802,7 +801,8 @@ static int hci_uart_tty_ioctl(struct tty_struct *tty, struct file *file, - * We don't provide read/write/poll interface for user space. - */ - static ssize_t hci_uart_tty_read(struct tty_struct *tty, struct file *file, -- unsigned char __user *buf, size_t nr) -+ unsigned char *buf, size_t nr, -+ void **cookie, unsigned long offset) - { - return 0; - } -@@ -819,29 +819,28 @@ static __poll_t hci_uart_tty_poll(struct tty_struct *tty, - return 0; - } - -+static struct tty_ldisc_ops hci_uart_ldisc = { -+ .owner = THIS_MODULE, -+ .magic = TTY_LDISC_MAGIC, -+ .name = "n_hci", -+ .open = hci_uart_tty_open, -+ .close = hci_uart_tty_close, -+ .read = hci_uart_tty_read, -+ .write = hci_uart_tty_write, -+ .ioctl = hci_uart_tty_ioctl, -+ .compat_ioctl = hci_uart_tty_ioctl, -+ .poll = hci_uart_tty_poll, -+ .receive_buf = hci_uart_tty_receive, -+ .write_wakeup = hci_uart_tty_wakeup, -+}; -+ - static int __init hci_uart_init(void) - { -- static struct tty_ldisc_ops hci_uart_ldisc; - int err; - - BT_INFO("HCI UART driver ver %s", VERSION); - - /* Register the tty discipline */ -- -- memset(&hci_uart_ldisc, 0, sizeof(hci_uart_ldisc)); -- hci_uart_ldisc.magic = TTY_LDISC_MAGIC; -- hci_uart_ldisc.name = "n_hci"; -- hci_uart_ldisc.open = hci_uart_tty_open; -- hci_uart_ldisc.close = hci_uart_tty_close; -- hci_uart_ldisc.read = hci_uart_tty_read; -- hci_uart_ldisc.write = hci_uart_tty_write; -- hci_uart_ldisc.ioctl = hci_uart_tty_ioctl; -- hci_uart_ldisc.compat_ioctl = hci_uart_tty_ioctl; -- hci_uart_ldisc.poll = hci_uart_tty_poll; -- hci_uart_ldisc.receive_buf = hci_uart_tty_receive; -- hci_uart_ldisc.write_wakeup = hci_uart_tty_wakeup; -- hci_uart_ldisc.owner = THIS_MODULE; -- - err = tty_register_ldisc(N_HCI, &hci_uart_ldisc); - if (err) { - BT_ERR("HCI line discipline registration failed. (%d)", err); -diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c -index 4a963682c7021..de36af63e1825 100644 ---- a/drivers/bluetooth/hci_qca.c -+++ b/drivers/bluetooth/hci_qca.c -@@ -50,7 +50,8 @@ - #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000 - #define CMD_TRANS_TIMEOUT_MS 100 - #define MEMDUMP_TIMEOUT_MS 8000 --#define IBS_DISABLE_SSR_TIMEOUT_MS (MEMDUMP_TIMEOUT_MS + 1000) -+#define IBS_DISABLE_SSR_TIMEOUT_MS \ -+ (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS) - #define FW_DOWNLOAD_TIMEOUT_MS 3000 - - /* susclk rate */ -@@ -76,7 +77,8 @@ enum qca_flags { - QCA_MEMDUMP_COLLECTION, - QCA_HW_ERROR_EVENT, - QCA_SSR_TRIGGERED, -- QCA_BT_OFF -+ QCA_BT_OFF, -+ QCA_ROM_FW - }; - - enum qca_capabilities { -@@ -1024,7 +1026,9 @@ static void qca_controller_memdump(struct work_struct *work) - dump_size = __le32_to_cpu(dump->dump_size); - if (!(dump_size)) { - bt_dev_err(hu->hdev, "Rx invalid memdump size"); -+ kfree(qca_memdump); - kfree_skb(skb); -+ qca->qca_memdump = NULL; - mutex_unlock(&qca->hci_memdump_lock); - return; - } -@@ -1661,6 +1665,7 @@ static int qca_setup(struct hci_uart *hu) - if (ret) - return ret; - -+ clear_bit(QCA_ROM_FW, &qca->flags); - /* Patch downloading has to be done without IBS mode */ - set_bit(QCA_IBS_DISABLED, &qca->flags); - -@@ -1718,12 +1723,14 @@ retry: - hu->hdev->cmd_timeout = qca_cmd_timeout; - } else if (ret == -ENOENT) { - /* No patch/nvm-config found, run with original fw/config */ -+ set_bit(QCA_ROM_FW, &qca->flags); - ret = 0; - } else if (ret == -EAGAIN) { - /* - * Userspace firmware loader will return -EAGAIN in case no - * patch/nvm-config is found, so run with original fw/config. - */ -+ set_bit(QCA_ROM_FW, &qca->flags); - ret = 0; - } - -@@ -2100,17 +2107,29 @@ static int __maybe_unused qca_suspend(struct device *dev) - - set_bit(QCA_SUSPENDING, &qca->flags); - -- if (test_bit(QCA_BT_OFF, &qca->flags)) -+ /* if BT SoC is running with default firmware then it does not -+ * support in-band sleep -+ */ -+ if (test_bit(QCA_ROM_FW, &qca->flags)) -+ return 0; -+ -+ /* During SSR after memory dump collection, controller will be -+ * powered off and then powered on.If controller is powered off -+ * during SSR then we should wait until SSR is completed. -+ */ -+ if (test_bit(QCA_BT_OFF, &qca->flags) && -+ !test_bit(QCA_SSR_TRIGGERED, &qca->flags)) - return 0; - -- if (test_bit(QCA_IBS_DISABLED, &qca->flags)) { -+ if (test_bit(QCA_IBS_DISABLED, &qca->flags) || -+ test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { - wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ? - IBS_DISABLE_SSR_TIMEOUT_MS : - FW_DOWNLOAD_TIMEOUT_MS; - - /* QCA_IBS_DISABLED flag is set to true, During FW download - * and during memory dump collection. It is reset to false, -- * After FW download complete and after memory dump collections. -+ * After FW download complete. - */ - wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED, - TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout)); -@@ -2122,10 +2141,6 @@ static int __maybe_unused qca_suspend(struct device *dev) - } - } - -- /* After memory dump collection, Controller is powered off.*/ -- if (test_bit(QCA_BT_OFF, &qca->flags)) -- return 0; -- - cancel_work_sync(&qca->ws_awake_device); - cancel_work_sync(&qca->ws_awake_rx); - -diff --git a/drivers/bluetooth/hci_serdev.c b/drivers/bluetooth/hci_serdev.c -index ef96ad06fa54e..9e03402ef1b37 100644 ---- a/drivers/bluetooth/hci_serdev.c -+++ b/drivers/bluetooth/hci_serdev.c -@@ -83,9 +83,9 @@ static void hci_uart_write_work(struct work_struct *work) - hci_uart_tx_complete(hu, hci_skb_pkt_type(skb)); - kfree_skb(skb); - } -- } while (test_bit(HCI_UART_TX_WAKEUP, &hu->tx_state)); - -- clear_bit(HCI_UART_SENDING, &hu->tx_state); -+ clear_bit(HCI_UART_SENDING, &hu->tx_state); -+ } while (test_bit(HCI_UART_TX_WAKEUP, &hu->tx_state)); - } - - /* ------- Interface to HCI layer ------ */ -diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c -index f0697f433c2f1..08c45457c90fe 100644 ---- a/drivers/bus/mhi/core/init.c -+++ b/drivers/bus/mhi/core/init.c -@@ -552,6 +552,9 @@ void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl, - tre_ring = &mhi_chan->tre_ring; - chan_ctxt = &mhi_cntrl->mhi_ctxt->chan_ctxt[mhi_chan->chan]; - -+ if (!chan_ctxt->rbase) /* Already uninitialized */ -+ return; -+ - mhi_free_coherent(mhi_cntrl, tre_ring->alloc_size, - tre_ring->pre_aligned, tre_ring->dma_handle); - vfree(buf_ring->base); -diff --git a/drivers/char/hw_random/ingenic-trng.c b/drivers/char/hw_random/ingenic-trng.c -index 954a8411d67d2..0eb80f786f4dd 100644 ---- a/drivers/char/hw_random/ingenic-trng.c -+++ b/drivers/char/hw_random/ingenic-trng.c -@@ -113,13 +113,17 @@ static int ingenic_trng_probe(struct platform_device *pdev) - ret = hwrng_register(&trng->rng); - if (ret) { - dev_err(&pdev->dev, "Failed to register hwrng\n"); -- return ret; -+ goto err_unprepare_clk; - } - - platform_set_drvdata(pdev, trng); - - dev_info(&pdev->dev, "Ingenic DTRNG driver registered\n"); - return 0; -+ -+err_unprepare_clk: -+ clk_disable_unprepare(trng->clk); -+ return ret; - } - - static int ingenic_trng_remove(struct platform_device *pdev) -diff --git a/drivers/char/hw_random/timeriomem-rng.c b/drivers/char/hw_random/timeriomem-rng.c -index e262445fed5f5..f35f0f31f52ad 100644 ---- a/drivers/char/hw_random/timeriomem-rng.c -+++ b/drivers/char/hw_random/timeriomem-rng.c -@@ -69,7 +69,7 @@ static int timeriomem_rng_read(struct hwrng *hwrng, void *data, - */ - if (retval > 0) - usleep_range(period_us, -- period_us + min(1, period_us / 100)); -+ period_us + max(1, period_us / 100)); - - *(u32 *)data = readl(priv->io_base); - retval += sizeof(u32); -diff --git a/drivers/char/random.c b/drivers/char/random.c -index 5f3b8ac9d97b0..a894c0559a8cf 100644 ---- a/drivers/char/random.c -+++ b/drivers/char/random.c -@@ -1972,7 +1972,7 @@ static long random_ioctl(struct file *f, unsigned int cmd, unsigned long arg) - return -EPERM; - if (crng_init < 2) - return -ENODATA; -- crng_reseed(&primary_crng, NULL); -+ crng_reseed(&primary_crng, &input_pool); - crng_global_init_time = jiffies - 1; - return 0; - default: -diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h -index 947d1db0a5ccf..283f78211c3a7 100644 ---- a/drivers/char/tpm/tpm.h -+++ b/drivers/char/tpm/tpm.h -@@ -164,8 +164,6 @@ extern const struct file_operations tpmrm_fops; - extern struct idr dev_nums_idr; - - ssize_t tpm_transmit(struct tpm_chip *chip, u8 *buf, size_t bufsiz); --ssize_t tpm_transmit_cmd(struct tpm_chip *chip, struct tpm_buf *buf, -- size_t min_rsp_body_length, const char *desc); - int tpm_get_timeouts(struct tpm_chip *); - int tpm_auto_startup(struct tpm_chip *chip); - -@@ -194,8 +192,6 @@ static inline void tpm_msleep(unsigned int delay_msec) - int tpm_chip_start(struct tpm_chip *chip); - void tpm_chip_stop(struct tpm_chip *chip); - struct tpm_chip *tpm_find_get_ops(struct tpm_chip *chip); --__must_check int tpm_try_get_ops(struct tpm_chip *chip); --void tpm_put_ops(struct tpm_chip *chip); - - struct tpm_chip *tpm_chip_alloc(struct device *dev, - const struct tpm_class_ops *ops); -diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c -index 92c51c6cfd1b7..431919d5f48af 100644 ---- a/drivers/char/tpm/tpm_tis_core.c -+++ b/drivers/char/tpm/tpm_tis_core.c -@@ -125,7 +125,8 @@ static bool check_locality(struct tpm_chip *chip, int l) - if (rc < 0) - return false; - -- if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == -+ if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID -+ | TPM_ACCESS_REQUEST_USE)) == - (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { - priv->locality = l; - return true; -@@ -134,58 +135,13 @@ static bool check_locality(struct tpm_chip *chip, int l) - return false; - } - --static bool locality_inactive(struct tpm_chip *chip, int l) --{ -- struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); -- int rc; -- u8 access; -- -- rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); -- if (rc < 0) -- return false; -- -- if ((access & (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) -- == TPM_ACCESS_VALID) -- return true; -- -- return false; --} -- - static int release_locality(struct tpm_chip *chip, int l) - { - struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); -- unsigned long stop, timeout; -- long rc; - - tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY); - -- stop = jiffies + chip->timeout_a; -- -- if (chip->flags & TPM_CHIP_FLAG_IRQ) { --again: -- timeout = stop - jiffies; -- if ((long)timeout <= 0) -- return -1; -- -- rc = wait_event_interruptible_timeout(priv->int_queue, -- (locality_inactive(chip, l)), -- timeout); -- -- if (rc > 0) -- return 0; -- -- if (rc == -ERESTARTSYS && freezing(current)) { -- clear_thread_flag(TIF_SIGPENDING); -- goto again; -- } -- } else { -- do { -- if (locality_inactive(chip, l)) -- return 0; -- tpm_msleep(TPM_TIMEOUT); -- } while (time_before(jiffies, stop)); -- } -- return -1; -+ return 0; - } - - static int request_locality(struct tpm_chip *chip, int l) -diff --git a/drivers/clk/clk-ast2600.c b/drivers/clk/clk-ast2600.c -index 177368cac6dd6..a55b37fc2c8bd 100644 ---- a/drivers/clk/clk-ast2600.c -+++ b/drivers/clk/clk-ast2600.c -@@ -17,7 +17,8 @@ - - #define ASPEED_G6_NUM_CLKS 71 - --#define ASPEED_G6_SILICON_REV 0x004 -+#define ASPEED_G6_SILICON_REV 0x014 -+#define CHIP_REVISION_ID GENMASK(23, 16) - - #define ASPEED_G6_RESET_CTRL 0x040 - #define ASPEED_G6_RESET_CTRL2 0x050 -@@ -190,18 +191,34 @@ static struct clk_hw *ast2600_calc_pll(const char *name, u32 val) - static struct clk_hw *ast2600_calc_apll(const char *name, u32 val) - { - unsigned int mult, div; -+ u32 chip_id = readl(scu_g6_base + ASPEED_G6_SILICON_REV); - -- if (val & BIT(20)) { -- /* Pass through mode */ -- mult = div = 1; -+ if (((chip_id & CHIP_REVISION_ID) >> 16) >= 2) { -+ if (val & BIT(24)) { -+ /* Pass through mode */ -+ mult = div = 1; -+ } else { -+ /* F = 25Mhz * [(m + 1) / (n + 1)] / (p + 1) */ -+ u32 m = val & 0x1fff; -+ u32 n = (val >> 13) & 0x3f; -+ u32 p = (val >> 19) & 0xf; -+ -+ mult = (m + 1); -+ div = (n + 1) * (p + 1); -+ } - } else { -- /* F = 25Mhz * (2-od) * [(m + 2) / (n + 1)] */ -- u32 m = (val >> 5) & 0x3f; -- u32 od = (val >> 4) & 0x1; -- u32 n = val & 0xf; -+ if (val & BIT(20)) { -+ /* Pass through mode */ -+ mult = div = 1; -+ } else { -+ /* F = 25Mhz * (2-od) * [(m + 2) / (n + 1)] */ -+ u32 m = (val >> 5) & 0x3f; -+ u32 od = (val >> 4) & 0x1; -+ u32 n = val & 0xf; - -- mult = (2 - od) * (m + 2); -- div = n + 1; -+ mult = (2 - od) * (m + 2); -+ div = n + 1; -+ } - } - return clk_hw_register_fixed_factor(NULL, name, "clkin", 0, - mult, div); -diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c -index c499799693ccc..344997203f0e7 100644 ---- a/drivers/clk/clk-divider.c -+++ b/drivers/clk/clk-divider.c -@@ -494,8 +494,13 @@ struct clk_hw *__clk_hw_register_divider(struct device *dev, - else - init.ops = &clk_divider_ops; - init.flags = flags; -- init.parent_names = (parent_name ? &parent_name: NULL); -- init.num_parents = (parent_name ? 1 : 0); -+ init.parent_names = parent_name ? &parent_name : NULL; -+ init.parent_hws = parent_hw ? &parent_hw : NULL; -+ init.parent_data = parent_data; -+ if (parent_name || parent_hw || parent_data) -+ init.num_parents = 1; -+ else -+ init.num_parents = 0; - - /* struct clk_divider assignments */ - div->reg = reg; -diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c -index b17a13e9337c4..49f27fe532139 100644 ---- a/drivers/clk/meson/clk-pll.c -+++ b/drivers/clk/meson/clk-pll.c -@@ -365,13 +365,14 @@ static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, - { - struct clk_regmap *clk = to_clk_regmap(hw); - struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); -- unsigned int enabled, m, n, frac = 0, ret; -+ unsigned int enabled, m, n, frac = 0; - unsigned long old_rate; -+ int ret; - - if (parent_rate == 0 || rate == 0) - return -EINVAL; - -- old_rate = rate; -+ old_rate = clk_hw_get_rate(hw); - - ret = meson_clk_get_pll_settings(rate, parent_rate, &m, &n, pll); - if (ret) -@@ -393,7 +394,8 @@ static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, - if (!enabled) - return 0; - -- if (meson_clk_pll_enable(hw)) { -+ ret = meson_clk_pll_enable(hw); -+ if (ret) { - pr_warn("%s: pll did not lock, trying to restore old rate %lu\n", - __func__, old_rate); - /* -@@ -405,7 +407,7 @@ static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, - meson_clk_pll_set_rate(hw, old_rate, parent_rate); - } - -- return 0; -+ return ret; - } - - /* -diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c -index 9d7016bcd6800..b8dcfe62312bb 100644 ---- a/drivers/clk/qcom/gcc-msm8998.c -+++ b/drivers/clk/qcom/gcc-msm8998.c -@@ -135,7 +135,7 @@ static struct pll_vco fabia_vco[] = { - - static struct clk_alpha_pll gpll0 = { - .offset = 0x0, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .vco_table = fabia_vco, - .num_vco = ARRAY_SIZE(fabia_vco), - .clkr = { -@@ -145,58 +145,58 @@ static struct clk_alpha_pll gpll0 = { - .name = "gpll0", - .parent_names = (const char *[]){ "xo" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_ops, -+ .ops = &clk_alpha_pll_fixed_fabia_ops, - } - }, - }; - - static struct clk_alpha_pll_postdiv gpll0_out_even = { - .offset = 0x0, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll0_out_even", - .parent_names = (const char *[]){ "gpll0" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll0_out_main = { - .offset = 0x0, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll0_out_main", - .parent_names = (const char *[]){ "gpll0" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll0_out_odd = { - .offset = 0x0, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll0_out_odd", - .parent_names = (const char *[]){ "gpll0" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll0_out_test = { - .offset = 0x0, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll0_out_test", - .parent_names = (const char *[]){ "gpll0" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll gpll1 = { - .offset = 0x1000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .vco_table = fabia_vco, - .num_vco = ARRAY_SIZE(fabia_vco), - .clkr = { -@@ -206,58 +206,58 @@ static struct clk_alpha_pll gpll1 = { - .name = "gpll1", - .parent_names = (const char *[]){ "xo" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_ops, -+ .ops = &clk_alpha_pll_fixed_fabia_ops, - } - }, - }; - - static struct clk_alpha_pll_postdiv gpll1_out_even = { - .offset = 0x1000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll1_out_even", - .parent_names = (const char *[]){ "gpll1" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll1_out_main = { - .offset = 0x1000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll1_out_main", - .parent_names = (const char *[]){ "gpll1" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll1_out_odd = { - .offset = 0x1000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll1_out_odd", - .parent_names = (const char *[]){ "gpll1" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll1_out_test = { - .offset = 0x1000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll1_out_test", - .parent_names = (const char *[]){ "gpll1" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll gpll2 = { - .offset = 0x2000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .vco_table = fabia_vco, - .num_vco = ARRAY_SIZE(fabia_vco), - .clkr = { -@@ -267,58 +267,58 @@ static struct clk_alpha_pll gpll2 = { - .name = "gpll2", - .parent_names = (const char *[]){ "xo" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_ops, -+ .ops = &clk_alpha_pll_fixed_fabia_ops, - } - }, - }; - - static struct clk_alpha_pll_postdiv gpll2_out_even = { - .offset = 0x2000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll2_out_even", - .parent_names = (const char *[]){ "gpll2" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll2_out_main = { - .offset = 0x2000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll2_out_main", - .parent_names = (const char *[]){ "gpll2" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll2_out_odd = { - .offset = 0x2000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll2_out_odd", - .parent_names = (const char *[]){ "gpll2" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll2_out_test = { - .offset = 0x2000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll2_out_test", - .parent_names = (const char *[]){ "gpll2" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll gpll3 = { - .offset = 0x3000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .vco_table = fabia_vco, - .num_vco = ARRAY_SIZE(fabia_vco), - .clkr = { -@@ -328,58 +328,58 @@ static struct clk_alpha_pll gpll3 = { - .name = "gpll3", - .parent_names = (const char *[]){ "xo" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_ops, -+ .ops = &clk_alpha_pll_fixed_fabia_ops, - } - }, - }; - - static struct clk_alpha_pll_postdiv gpll3_out_even = { - .offset = 0x3000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll3_out_even", - .parent_names = (const char *[]){ "gpll3" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll3_out_main = { - .offset = 0x3000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll3_out_main", - .parent_names = (const char *[]){ "gpll3" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll3_out_odd = { - .offset = 0x3000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll3_out_odd", - .parent_names = (const char *[]){ "gpll3" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll3_out_test = { - .offset = 0x3000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll3_out_test", - .parent_names = (const char *[]){ "gpll3" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll gpll4 = { - .offset = 0x77000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .vco_table = fabia_vco, - .num_vco = ARRAY_SIZE(fabia_vco), - .clkr = { -@@ -389,52 +389,52 @@ static struct clk_alpha_pll gpll4 = { - .name = "gpll4", - .parent_names = (const char *[]){ "xo" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_ops, -+ .ops = &clk_alpha_pll_fixed_fabia_ops, - } - }, - }; - - static struct clk_alpha_pll_postdiv gpll4_out_even = { - .offset = 0x77000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll4_out_even", - .parent_names = (const char *[]){ "gpll4" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll4_out_main = { - .offset = 0x77000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll4_out_main", - .parent_names = (const char *[]){ "gpll4" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll4_out_odd = { - .offset = 0x77000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll4_out_odd", - .parent_names = (const char *[]){ "gpll4" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - - static struct clk_alpha_pll_postdiv gpll4_out_test = { - .offset = 0x77000, -- .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], -+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr.hw.init = &(struct clk_init_data){ - .name = "gpll4_out_test", - .parent_names = (const char *[]){ "gpll4" }, - .num_parents = 1, -- .ops = &clk_alpha_pll_postdiv_ops, -+ .ops = &clk_alpha_pll_postdiv_fabia_ops, - }, - }; - -diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c -index b05901b249172..88e896abb6631 100644 ---- a/drivers/clk/qcom/gcc-sc7180.c -+++ b/drivers/clk/qcom/gcc-sc7180.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0-only - /* -- * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. -+ * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved. - */ - - #include -@@ -919,19 +919,6 @@ static struct clk_branch gcc_camera_throttle_hf_axi_clk = { - }, - }; - --static struct clk_branch gcc_camera_xo_clk = { -- .halt_reg = 0xb02c, -- .halt_check = BRANCH_HALT, -- .clkr = { -- .enable_reg = 0xb02c, -- .enable_mask = BIT(0), -- .hw.init = &(struct clk_init_data){ -- .name = "gcc_camera_xo_clk", -- .ops = &clk_branch2_ops, -- }, -- }, --}; -- - static struct clk_branch gcc_ce1_ahb_clk = { - .halt_reg = 0x4100c, - .halt_check = BRANCH_HALT_VOTED, -@@ -1096,19 +1083,6 @@ static struct clk_branch gcc_disp_throttle_hf_axi_clk = { - }, - }; - --static struct clk_branch gcc_disp_xo_clk = { -- .halt_reg = 0xb030, -- .halt_check = BRANCH_HALT, -- .clkr = { -- .enable_reg = 0xb030, -- .enable_mask = BIT(0), -- .hw.init = &(struct clk_init_data){ -- .name = "gcc_disp_xo_clk", -- .ops = &clk_branch2_ops, -- }, -- }, --}; -- - static struct clk_branch gcc_gp1_clk = { - .halt_reg = 0x64000, - .halt_check = BRANCH_HALT, -@@ -2159,19 +2133,6 @@ static struct clk_branch gcc_video_throttle_axi_clk = { - }, - }; - --static struct clk_branch gcc_video_xo_clk = { -- .halt_reg = 0xb028, -- .halt_check = BRANCH_HALT, -- .clkr = { -- .enable_reg = 0xb028, -- .enable_mask = BIT(0), -- .hw.init = &(struct clk_init_data){ -- .name = "gcc_video_xo_clk", -- .ops = &clk_branch2_ops, -- }, -- }, --}; -- - static struct clk_branch gcc_mss_cfg_ahb_clk = { - .halt_reg = 0x8a000, - .halt_check = BRANCH_HALT, -@@ -2304,7 +2265,6 @@ static struct clk_regmap *gcc_sc7180_clocks[] = { - [GCC_BOOT_ROM_AHB_CLK] = &gcc_boot_rom_ahb_clk.clkr, - [GCC_CAMERA_HF_AXI_CLK] = &gcc_camera_hf_axi_clk.clkr, - [GCC_CAMERA_THROTTLE_HF_AXI_CLK] = &gcc_camera_throttle_hf_axi_clk.clkr, -- [GCC_CAMERA_XO_CLK] = &gcc_camera_xo_clk.clkr, - [GCC_CE1_AHB_CLK] = &gcc_ce1_ahb_clk.clkr, - [GCC_CE1_AXI_CLK] = &gcc_ce1_axi_clk.clkr, - [GCC_CE1_CLK] = &gcc_ce1_clk.clkr, -@@ -2317,7 +2277,6 @@ static struct clk_regmap *gcc_sc7180_clocks[] = { - [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr, - [GCC_DISP_HF_AXI_CLK] = &gcc_disp_hf_axi_clk.clkr, - [GCC_DISP_THROTTLE_HF_AXI_CLK] = &gcc_disp_throttle_hf_axi_clk.clkr, -- [GCC_DISP_XO_CLK] = &gcc_disp_xo_clk.clkr, - [GCC_GP1_CLK] = &gcc_gp1_clk.clkr, - [GCC_GP1_CLK_SRC] = &gcc_gp1_clk_src.clkr, - [GCC_GP2_CLK] = &gcc_gp2_clk.clkr, -@@ -2413,7 +2372,6 @@ static struct clk_regmap *gcc_sc7180_clocks[] = { - [GCC_VIDEO_AXI_CLK] = &gcc_video_axi_clk.clkr, - [GCC_VIDEO_GPLL0_DIV_CLK_SRC] = &gcc_video_gpll0_div_clk_src.clkr, - [GCC_VIDEO_THROTTLE_AXI_CLK] = &gcc_video_throttle_axi_clk.clkr, -- [GCC_VIDEO_XO_CLK] = &gcc_video_xo_clk.clkr, - [GPLL0] = &gpll0.clkr, - [GPLL0_OUT_EVEN] = &gpll0_out_even.clkr, - [GPLL6] = &gpll6.clkr, -@@ -2510,6 +2468,9 @@ static int gcc_sc7180_probe(struct platform_device *pdev) - regmap_update_bits(regmap, 0x0b004, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0x0b008, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0x0b00c, BIT(0), BIT(0)); -+ regmap_update_bits(regmap, 0x0b02c, BIT(0), BIT(0)); -+ regmap_update_bits(regmap, 0x0b028, BIT(0), BIT(0)); -+ regmap_update_bits(regmap, 0x0b030, BIT(0), BIT(0)); - regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0)); - - ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, -diff --git a/drivers/clk/qcom/lpass-gfm-sm8250.c b/drivers/clk/qcom/lpass-gfm-sm8250.c -index d366c7c2abc77..f5e31e692b9b4 100644 ---- a/drivers/clk/qcom/lpass-gfm-sm8250.c -+++ b/drivers/clk/qcom/lpass-gfm-sm8250.c -@@ -33,14 +33,13 @@ struct clk_gfm { - void __iomem *gfm_mux; - }; - --#define GFM_MASK BIT(1) - #define to_clk_gfm(_hw) container_of(_hw, struct clk_gfm, hw) - - static u8 clk_gfm_get_parent(struct clk_hw *hw) - { - struct clk_gfm *clk = to_clk_gfm(hw); - -- return readl(clk->gfm_mux) & GFM_MASK; -+ return readl(clk->gfm_mux) & clk->mux_mask; - } - - static int clk_gfm_set_parent(struct clk_hw *hw, u8 index) -@@ -51,9 +50,10 @@ static int clk_gfm_set_parent(struct clk_hw *hw, u8 index) - val = readl(clk->gfm_mux); - - if (index) -- val |= GFM_MASK; -+ val |= clk->mux_mask; - else -- val &= ~GFM_MASK; -+ val &= ~clk->mux_mask; -+ - - writel(val, clk->gfm_mux); - -diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c -index aa5389b04d742..7b2c640c3de0c 100644 ---- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c -+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c -@@ -69,7 +69,6 @@ enum clk_ids { - CLK_PLL5_DIV2, - CLK_PLL5_DIV4, - CLK_S1, -- CLK_S2, - CLK_S3, - CLK_SDSRC, - CLK_RPCSRC, -@@ -137,7 +136,7 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = { - DEF_FIXED("icu", R8A779A0_CLK_ICU, CLK_PLL5_DIV4, 2, 1), - DEF_FIXED("icud2", R8A779A0_CLK_ICUD2, CLK_PLL5_DIV4, 4, 1), - DEF_FIXED("vcbus", R8A779A0_CLK_VCBUS, CLK_PLL5_DIV4, 1, 1), -- DEF_FIXED("cbfusa", R8A779A0_CLK_CBFUSA, CLK_MAIN, 2, 1), -+ DEF_FIXED("cbfusa", R8A779A0_CLK_CBFUSA, CLK_EXTAL, 2, 1), - - DEF_DIV6P1("mso", R8A779A0_CLK_MSO, CLK_PLL5_DIV4, 0x87c), - DEF_DIV6P1("canfd", R8A779A0_CLK_CANFD, CLK_PLL5_DIV4, 0x878), -diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig -index 14c7c47124787..66be9ea69e332 100644 ---- a/drivers/clocksource/Kconfig -+++ b/drivers/clocksource/Kconfig -@@ -79,6 +79,7 @@ config IXP4XX_TIMER - bool "Intel XScale IXP4xx timer driver" if COMPILE_TEST - depends on HAS_IOMEM - select CLKSRC_MMIO -+ select TIMER_OF if OF - help - Enables support for the Intel XScale IXP4xx SoC timer. - -diff --git a/drivers/clocksource/mxs_timer.c b/drivers/clocksource/mxs_timer.c -index bc96a4cbf26c6..e52e12d27d2aa 100644 ---- a/drivers/clocksource/mxs_timer.c -+++ b/drivers/clocksource/mxs_timer.c -@@ -131,10 +131,7 @@ static void mxs_irq_clear(char *state) - - /* Clear pending interrupt */ - timrot_irq_acknowledge(); -- --#ifdef DEBUG -- pr_info("%s: changing mode to %s\n", __func__, state) --#endif /* DEBUG */ -+ pr_debug("%s: changing mode to %s\n", __func__, state); - } - - static int mxs_shutdown(struct clock_event_device *evt) -diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c -index d3e5a6fceb61b..d1bbc16fba4b4 100644 ---- a/drivers/cpufreq/acpi-cpufreq.c -+++ b/drivers/cpufreq/acpi-cpufreq.c -@@ -54,7 +54,6 @@ struct acpi_cpufreq_data { - unsigned int resume; - unsigned int cpu_feature; - unsigned int acpi_perf_cpu; -- unsigned int first_perf_state; - cpumask_var_t freqdomain_cpus; - void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val); - u32 (*cpu_freq_read)(struct acpi_pct_register *reg); -@@ -223,10 +222,10 @@ static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr) - - perf = to_perf_data(data); - -- cpufreq_for_each_entry(pos, policy->freq_table + data->first_perf_state) -+ cpufreq_for_each_entry(pos, policy->freq_table) - if (msr == perf->states[pos->driver_data].status) - return pos->frequency; -- return policy->freq_table[data->first_perf_state].frequency; -+ return policy->freq_table[0].frequency; - } - - static unsigned extract_freq(struct cpufreq_policy *policy, u32 val) -@@ -365,7 +364,6 @@ static unsigned int get_cur_freq_on_cpu(unsigned int cpu) - struct cpufreq_policy *policy; - unsigned int freq; - unsigned int cached_freq; -- unsigned int state; - - pr_debug("%s (%d)\n", __func__, cpu); - -@@ -377,11 +375,7 @@ static unsigned int get_cur_freq_on_cpu(unsigned int cpu) - if (unlikely(!data || !policy->freq_table)) - return 0; - -- state = to_perf_data(data)->state; -- if (state < data->first_perf_state) -- state = data->first_perf_state; -- -- cached_freq = policy->freq_table[state].frequency; -+ cached_freq = policy->freq_table[to_perf_data(data)->state].frequency; - freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data)); - if (freq != cached_freq) { - /* -@@ -680,7 +674,6 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) - struct cpuinfo_x86 *c = &cpu_data(cpu); - unsigned int valid_states = 0; - unsigned int result = 0; -- unsigned int state_count; - u64 max_boost_ratio; - unsigned int i; - #ifdef CONFIG_SMP -@@ -795,28 +788,8 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) - goto err_unreg; - } - -- state_count = perf->state_count + 1; -- -- max_boost_ratio = get_max_boost_ratio(cpu); -- if (max_boost_ratio) { -- /* -- * Make a room for one more entry to represent the highest -- * available "boost" frequency. -- */ -- state_count++; -- valid_states++; -- data->first_perf_state = valid_states; -- } else { -- /* -- * If the maximum "boost" frequency is unknown, ask the arch -- * scale-invariance code to use the "nominal" performance for -- * CPU utilization scaling so as to prevent the schedutil -- * governor from selecting inadequate CPU frequencies. -- */ -- arch_set_max_freq_ratio(true); -- } -- -- freq_table = kcalloc(state_count, sizeof(*freq_table), GFP_KERNEL); -+ freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table), -+ GFP_KERNEL); - if (!freq_table) { - result = -ENOMEM; - goto err_unreg; -@@ -851,27 +824,25 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) - } - freq_table[valid_states].frequency = CPUFREQ_TABLE_END; - -+ max_boost_ratio = get_max_boost_ratio(cpu); - if (max_boost_ratio) { -- unsigned int state = data->first_perf_state; -- unsigned int freq = freq_table[state].frequency; -+ unsigned int freq = freq_table[0].frequency; - - /* - * Because the loop above sorts the freq_table entries in the - * descending order, freq is the maximum frequency in the table. - * Assume that it corresponds to the CPPC nominal frequency and -- * use it to populate the frequency field of the extra "boost" -- * frequency entry. -+ * use it to set cpuinfo.max_freq. - */ -- freq_table[0].frequency = freq * max_boost_ratio >> SCHED_CAPACITY_SHIFT; -+ policy->cpuinfo.max_freq = freq * max_boost_ratio >> SCHED_CAPACITY_SHIFT; -+ } else { - /* -- * The purpose of the extra "boost" frequency entry is to make -- * the rest of cpufreq aware of the real maximum frequency, but -- * the way to request it is the same as for the first_perf_state -- * entry that is expected to cover the entire range of "boost" -- * frequencies of the CPU, so copy the driver_data value from -- * that entry. -+ * If the maximum "boost" frequency is unknown, ask the arch -+ * scale-invariance code to use the "nominal" performance for -+ * CPU utilization scaling so as to prevent the schedutil -+ * governor from selecting inadequate CPU frequencies. - */ -- freq_table[0].driver_data = freq_table[state].driver_data; -+ arch_set_max_freq_ratio(true); - } - - policy->freq_table = freq_table; -@@ -947,8 +918,7 @@ static void acpi_cpufreq_cpu_ready(struct cpufreq_policy *policy) - { - struct acpi_processor_performance *perf = per_cpu_ptr(acpi_perf_data, - policy->cpu); -- struct acpi_cpufreq_data *data = policy->driver_data; -- unsigned int freq = policy->freq_table[data->first_perf_state].frequency; -+ unsigned int freq = policy->freq_table[0].frequency; - - if (perf->states[0].core_frequency * 1000 != freq) - pr_warn(FW_WARN "P-state 0 is not max freq\n"); -diff --git a/drivers/cpufreq/brcmstb-avs-cpufreq.c b/drivers/cpufreq/brcmstb-avs-cpufreq.c -index 3e31e5d28b79c..4153150e20db5 100644 ---- a/drivers/cpufreq/brcmstb-avs-cpufreq.c -+++ b/drivers/cpufreq/brcmstb-avs-cpufreq.c -@@ -597,6 +597,16 @@ unmap_base: - return ret; - } - -+static void brcm_avs_prepare_uninit(struct platform_device *pdev) -+{ -+ struct private_data *priv; -+ -+ priv = platform_get_drvdata(pdev); -+ -+ iounmap(priv->avs_intr_base); -+ iounmap(priv->base); -+} -+ - static int brcm_avs_cpufreq_init(struct cpufreq_policy *policy) - { - struct cpufreq_frequency_table *freq_table; -@@ -732,21 +742,21 @@ static int brcm_avs_cpufreq_probe(struct platform_device *pdev) - - brcm_avs_driver.driver_data = pdev; - -- return cpufreq_register_driver(&brcm_avs_driver); -+ ret = cpufreq_register_driver(&brcm_avs_driver); -+ if (ret) -+ brcm_avs_prepare_uninit(pdev); -+ -+ return ret; - } - - static int brcm_avs_cpufreq_remove(struct platform_device *pdev) - { -- struct private_data *priv; - int ret; - - ret = cpufreq_unregister_driver(&brcm_avs_driver); -- if (ret) -- return ret; -+ WARN_ON(ret); - -- priv = platform_get_drvdata(pdev); -- iounmap(priv->base); -- iounmap(priv->avs_intr_base); -+ brcm_avs_prepare_uninit(pdev); - - return 0; - } -diff --git a/drivers/cpufreq/freq_table.c b/drivers/cpufreq/freq_table.c -index f839dc9852c08..d3f756f7b5a05 100644 ---- a/drivers/cpufreq/freq_table.c -+++ b/drivers/cpufreq/freq_table.c -@@ -52,7 +52,13 @@ int cpufreq_frequency_table_cpuinfo(struct cpufreq_policy *policy, - } - - policy->min = policy->cpuinfo.min_freq = min_freq; -- policy->max = policy->cpuinfo.max_freq = max_freq; -+ policy->max = max_freq; -+ /* -+ * If the driver has set its own cpuinfo.max_freq above max_freq, leave -+ * it as is. -+ */ -+ if (policy->cpuinfo.max_freq < max_freq) -+ policy->max = policy->cpuinfo.max_freq = max_freq; - - if (policy->min == ~0) - return -EINVAL; -diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c -index be05e038d956c..c4d8a5126d611 100644 ---- a/drivers/cpufreq/intel_pstate.c -+++ b/drivers/cpufreq/intel_pstate.c -@@ -819,13 +819,13 @@ static struct freq_attr *hwp_cpufreq_attrs[] = { - NULL, - }; - --static void intel_pstate_get_hwp_max(unsigned int cpu, int *phy_max, -+static void intel_pstate_get_hwp_max(struct cpudata *cpu, int *phy_max, - int *current_max) - { - u64 cap; - -- rdmsrl_on_cpu(cpu, MSR_HWP_CAPABILITIES, &cap); -- WRITE_ONCE(all_cpu_data[cpu]->hwp_cap_cached, cap); -+ rdmsrl_on_cpu(cpu->cpu, MSR_HWP_CAPABILITIES, &cap); -+ WRITE_ONCE(cpu->hwp_cap_cached, cap); - if (global.no_turbo || global.turbo_disabled) - *current_max = HWP_GUARANTEED_PERF(cap); - else -@@ -1213,7 +1213,7 @@ static void update_qos_request(enum freq_qos_req_type type) - continue; - - if (hwp_active) -- intel_pstate_get_hwp_max(i, &turbo_max, &max_state); -+ intel_pstate_get_hwp_max(cpu, &turbo_max, &max_state); - else - turbo_max = cpu->pstate.turbo_pstate; - -@@ -1714,21 +1714,22 @@ static void intel_pstate_max_within_limits(struct cpudata *cpu) - static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) - { - cpu->pstate.min_pstate = pstate_funcs.get_min(); -- cpu->pstate.max_pstate = pstate_funcs.get_max(); - cpu->pstate.max_pstate_physical = pstate_funcs.get_max_physical(); - cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); - cpu->pstate.scaling = pstate_funcs.get_scaling(); -- cpu->pstate.max_freq = cpu->pstate.max_pstate * cpu->pstate.scaling; - - if (hwp_active && !hwp_mode_bdw) { - unsigned int phy_max, current_max; - -- intel_pstate_get_hwp_max(cpu->cpu, &phy_max, ¤t_max); -+ intel_pstate_get_hwp_max(cpu, &phy_max, ¤t_max); - cpu->pstate.turbo_freq = phy_max * cpu->pstate.scaling; - cpu->pstate.turbo_pstate = phy_max; -+ cpu->pstate.max_pstate = HWP_GUARANTEED_PERF(READ_ONCE(cpu->hwp_cap_cached)); - } else { - cpu->pstate.turbo_freq = cpu->pstate.turbo_pstate * cpu->pstate.scaling; -+ cpu->pstate.max_pstate = pstate_funcs.get_max(); - } -+ cpu->pstate.max_freq = cpu->pstate.max_pstate * cpu->pstate.scaling; - - if (pstate_funcs.get_aperf_mperf_shift) - cpu->aperf_mperf_shift = pstate_funcs.get_aperf_mperf_shift(); -@@ -2207,7 +2208,7 @@ static void intel_pstate_update_perf_limits(struct cpudata *cpu, - * rather than pure ratios. - */ - if (hwp_active) { -- intel_pstate_get_hwp_max(cpu->cpu, &turbo_max, &max_state); -+ intel_pstate_get_hwp_max(cpu, &turbo_max, &max_state); - } else { - max_state = global.no_turbo || global.turbo_disabled ? - cpu->pstate.max_pstate : cpu->pstate.turbo_pstate; -@@ -2322,7 +2323,7 @@ static void intel_pstate_verify_cpu_policy(struct cpudata *cpu, - if (hwp_active) { - int max_state, turbo_max; - -- intel_pstate_get_hwp_max(cpu->cpu, &turbo_max, &max_state); -+ intel_pstate_get_hwp_max(cpu, &turbo_max, &max_state); - max_freq = max_state * cpu->pstate.scaling; - } else { - max_freq = intel_pstate_get_max_freq(cpu); -@@ -2709,7 +2710,7 @@ static int intel_cpufreq_cpu_init(struct cpufreq_policy *policy) - if (hwp_active) { - u64 value; - -- intel_pstate_get_hwp_max(policy->cpu, &turbo_max, &max_state); -+ intel_pstate_get_hwp_max(cpu, &turbo_max, &max_state); - policy->transition_delay_us = INTEL_CPUFREQ_TRANSITION_DELAY_HWP; - rdmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, &value); - WRITE_ONCE(cpu->hwp_req_cached, value); -diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c -index 9ed5341dc515b..2726e77c9e5a9 100644 ---- a/drivers/cpufreq/qcom-cpufreq-hw.c -+++ b/drivers/cpufreq/qcom-cpufreq-hw.c -@@ -32,6 +32,7 @@ struct qcom_cpufreq_soc_data { - - struct qcom_cpufreq_data { - void __iomem *base; -+ struct resource *res; - const struct qcom_cpufreq_soc_data *soc_data; - }; - -@@ -280,6 +281,7 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) - struct of_phandle_args args; - struct device_node *cpu_np; - struct device *cpu_dev; -+ struct resource *res; - void __iomem *base; - struct qcom_cpufreq_data *data; - int ret, index; -@@ -303,18 +305,33 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) - - index = args.args[0]; - -- base = devm_platform_ioremap_resource(pdev, index); -- if (IS_ERR(base)) -- return PTR_ERR(base); -+ res = platform_get_resource(pdev, IORESOURCE_MEM, index); -+ if (!res) { -+ dev_err(dev, "failed to get mem resource %d\n", index); -+ return -ENODEV; -+ } -+ -+ if (!request_mem_region(res->start, resource_size(res), res->name)) { -+ dev_err(dev, "failed to request resource %pR\n", res); -+ return -EBUSY; -+ } - -- data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); -+ base = ioremap(res->start, resource_size(res)); -+ if (IS_ERR(base)) { -+ dev_err(dev, "failed to map resource %pR\n", res); -+ ret = PTR_ERR(base); -+ goto release_region; -+ } -+ -+ data = kzalloc(sizeof(*data), GFP_KERNEL); - if (!data) { - ret = -ENOMEM; -- goto error; -+ goto unmap_base; - } - - data->soc_data = of_device_get_match_data(&pdev->dev); - data->base = base; -+ data->res = res; - - /* HW should be in enabled state to proceed */ - if (!(readl_relaxed(base + data->soc_data->reg_enable) & 0x1)) { -@@ -349,7 +366,11 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) - - return 0; - error: -- devm_iounmap(dev, base); -+ kfree(data); -+unmap_base: -+ iounmap(data->base); -+release_region: -+ release_mem_region(res->start, resource_size(res)); - return ret; - } - -@@ -357,12 +378,15 @@ static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy) - { - struct device *cpu_dev = get_cpu_device(policy->cpu); - struct qcom_cpufreq_data *data = policy->driver_data; -- struct platform_device *pdev = cpufreq_get_driver_data(); -+ struct resource *res = data->res; -+ void __iomem *base = data->base; - - dev_pm_opp_remove_all_dynamic(cpu_dev); - dev_pm_opp_of_cpumask_remove_table(policy->related_cpus); - kfree(policy->freq_table); -- devm_iounmap(&pdev->dev, data->base); -+ kfree(data); -+ iounmap(base); -+ release_mem_region(res->start, resource_size(res)); - - return 0; - } -diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c -index b72de8939497b..ffa628c89e21f 100644 ---- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c -+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c -@@ -20,6 +20,7 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct skcipher_request *areq) - unsigned int ivsize = crypto_skcipher_ivsize(tfm); - struct sun4i_cipher_req_ctx *ctx = skcipher_request_ctx(areq); - u32 mode = ctx->mode; -+ void *backup_iv = NULL; - /* when activating SS, the default FIFO space is SS_RX_DEFAULT(32) */ - u32 rx_cnt = SS_RX_DEFAULT; - u32 tx_cnt = 0; -@@ -30,6 +31,8 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct skcipher_request *areq) - unsigned int ileft = areq->cryptlen; - unsigned int oleft = areq->cryptlen; - unsigned int todo; -+ unsigned long pi = 0, po = 0; /* progress for in and out */ -+ bool miter_err; - struct sg_mapping_iter mi, mo; - unsigned int oi, oo; /* offset for in and out */ - unsigned long flags; -@@ -42,52 +45,71 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct skcipher_request *areq) - return -EINVAL; - } - -+ if (areq->iv && ivsize > 0 && mode & SS_DECRYPTION) { -+ backup_iv = kzalloc(ivsize, GFP_KERNEL); -+ if (!backup_iv) -+ return -ENOMEM; -+ scatterwalk_map_and_copy(backup_iv, areq->src, areq->cryptlen - ivsize, ivsize, 0); -+ } -+ - spin_lock_irqsave(&ss->slock, flags); - -- for (i = 0; i < op->keylen; i += 4) -- writel(*(op->key + i / 4), ss->base + SS_KEY0 + i); -+ for (i = 0; i < op->keylen / 4; i++) -+ writesl(ss->base + SS_KEY0 + i * 4, &op->key[i], 1); - - if (areq->iv) { - for (i = 0; i < 4 && i < ivsize / 4; i++) { - v = *(u32 *)(areq->iv + i * 4); -- writel(v, ss->base + SS_IV0 + i * 4); -+ writesl(ss->base + SS_IV0 + i * 4, &v, 1); - } - } - writel(mode, ss->base + SS_CTL); - -- sg_miter_start(&mi, areq->src, sg_nents(areq->src), -- SG_MITER_FROM_SG | SG_MITER_ATOMIC); -- sg_miter_start(&mo, areq->dst, sg_nents(areq->dst), -- SG_MITER_TO_SG | SG_MITER_ATOMIC); -- sg_miter_next(&mi); -- sg_miter_next(&mo); -- if (!mi.addr || !mo.addr) { -- dev_err_ratelimited(ss->dev, "ERROR: sg_miter return null\n"); -- err = -EINVAL; -- goto release_ss; -- } - - ileft = areq->cryptlen / 4; - oleft = areq->cryptlen / 4; - oi = 0; - oo = 0; - do { -- todo = min(rx_cnt, ileft); -- todo = min_t(size_t, todo, (mi.length - oi) / 4); -- if (todo) { -- ileft -= todo; -- writesl(ss->base + SS_RXFIFO, mi.addr + oi, todo); -- oi += todo * 4; -- } -- if (oi == mi.length) { -- sg_miter_next(&mi); -- oi = 0; -+ if (ileft) { -+ sg_miter_start(&mi, areq->src, sg_nents(areq->src), -+ SG_MITER_FROM_SG | SG_MITER_ATOMIC); -+ if (pi) -+ sg_miter_skip(&mi, pi); -+ miter_err = sg_miter_next(&mi); -+ if (!miter_err || !mi.addr) { -+ dev_err_ratelimited(ss->dev, "ERROR: sg_miter return null\n"); -+ err = -EINVAL; -+ goto release_ss; -+ } -+ todo = min(rx_cnt, ileft); -+ todo = min_t(size_t, todo, (mi.length - oi) / 4); -+ if (todo) { -+ ileft -= todo; -+ writesl(ss->base + SS_RXFIFO, mi.addr + oi, todo); -+ oi += todo * 4; -+ } -+ if (oi == mi.length) { -+ pi += mi.length; -+ oi = 0; -+ } -+ sg_miter_stop(&mi); - } - - spaces = readl(ss->base + SS_FCSR); - rx_cnt = SS_RXFIFO_SPACES(spaces); - tx_cnt = SS_TXFIFO_SPACES(spaces); - -+ sg_miter_start(&mo, areq->dst, sg_nents(areq->dst), -+ SG_MITER_TO_SG | SG_MITER_ATOMIC); -+ if (po) -+ sg_miter_skip(&mo, po); -+ miter_err = sg_miter_next(&mo); -+ if (!miter_err || !mo.addr) { -+ dev_err_ratelimited(ss->dev, "ERROR: sg_miter return null\n"); -+ err = -EINVAL; -+ goto release_ss; -+ } - todo = min(tx_cnt, oleft); - todo = min_t(size_t, todo, (mo.length - oo) / 4); - if (todo) { -@@ -96,21 +118,23 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct skcipher_request *areq) - oo += todo * 4; - } - if (oo == mo.length) { -- sg_miter_next(&mo); - oo = 0; -+ po += mo.length; - } -+ sg_miter_stop(&mo); - } while (oleft); - - if (areq->iv) { -- for (i = 0; i < 4 && i < ivsize / 4; i++) { -- v = readl(ss->base + SS_IV0 + i * 4); -- *(u32 *)(areq->iv + i * 4) = v; -+ if (mode & SS_DECRYPTION) { -+ memcpy(areq->iv, backup_iv, ivsize); -+ kfree_sensitive(backup_iv); -+ } else { -+ scatterwalk_map_and_copy(areq->iv, areq->dst, areq->cryptlen - ivsize, -+ ivsize, 0); - } - } - - release_ss: -- sg_miter_stop(&mi); -- sg_miter_stop(&mo); - writel(0, ss->base + SS_CTL); - spin_unlock_irqrestore(&ss->slock, flags); - return err; -@@ -161,13 +185,16 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq) - unsigned int ileft = areq->cryptlen; - unsigned int oleft = areq->cryptlen; - unsigned int todo; -+ void *backup_iv = NULL; - struct sg_mapping_iter mi, mo; -+ unsigned long pi = 0, po = 0; /* progress for in and out */ -+ bool miter_err; - unsigned int oi, oo; /* offset for in and out */ - unsigned int ob = 0; /* offset in buf */ - unsigned int obo = 0; /* offset in bufo*/ - unsigned int obl = 0; /* length of data in bufo */ - unsigned long flags; -- bool need_fallback; -+ bool need_fallback = false; - - if (!areq->cryptlen) - return 0; -@@ -186,12 +213,12 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq) - * we can use the SS optimized function - */ - while (in_sg && no_chunk == 1) { -- if (in_sg->length % 4) -+ if ((in_sg->length | in_sg->offset) & 3u) - no_chunk = 0; - in_sg = sg_next(in_sg); - } - while (out_sg && no_chunk == 1) { -- if (out_sg->length % 4) -+ if ((out_sg->length | out_sg->offset) & 3u) - no_chunk = 0; - out_sg = sg_next(out_sg); - } -@@ -202,30 +229,26 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq) - if (need_fallback) - return sun4i_ss_cipher_poll_fallback(areq); - -+ if (areq->iv && ivsize > 0 && mode & SS_DECRYPTION) { -+ backup_iv = kzalloc(ivsize, GFP_KERNEL); -+ if (!backup_iv) -+ return -ENOMEM; -+ scatterwalk_map_and_copy(backup_iv, areq->src, areq->cryptlen - ivsize, ivsize, 0); -+ } -+ - spin_lock_irqsave(&ss->slock, flags); - -- for (i = 0; i < op->keylen; i += 4) -- writel(*(op->key + i / 4), ss->base + SS_KEY0 + i); -+ for (i = 0; i < op->keylen / 4; i++) -+ writesl(ss->base + SS_KEY0 + i * 4, &op->key[i], 1); - - if (areq->iv) { - for (i = 0; i < 4 && i < ivsize / 4; i++) { - v = *(u32 *)(areq->iv + i * 4); -- writel(v, ss->base + SS_IV0 + i * 4); -+ writesl(ss->base + SS_IV0 + i * 4, &v, 1); - } - } - writel(mode, ss->base + SS_CTL); - -- sg_miter_start(&mi, areq->src, sg_nents(areq->src), -- SG_MITER_FROM_SG | SG_MITER_ATOMIC); -- sg_miter_start(&mo, areq->dst, sg_nents(areq->dst), -- SG_MITER_TO_SG | SG_MITER_ATOMIC); -- sg_miter_next(&mi); -- sg_miter_next(&mo); -- if (!mi.addr || !mo.addr) { -- dev_err_ratelimited(ss->dev, "ERROR: sg_miter return null\n"); -- err = -EINVAL; -- goto release_ss; -- } - ileft = areq->cryptlen; - oleft = areq->cryptlen; - oi = 0; -@@ -233,8 +256,16 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq) - - while (oleft) { - if (ileft) { -- char buf[4 * SS_RX_MAX];/* buffer for linearize SG src */ -- -+ sg_miter_start(&mi, areq->src, sg_nents(areq->src), -+ SG_MITER_FROM_SG | SG_MITER_ATOMIC); -+ if (pi) -+ sg_miter_skip(&mi, pi); -+ miter_err = sg_miter_next(&mi); -+ if (!miter_err || !mi.addr) { -+ dev_err_ratelimited(ss->dev, "ERROR: sg_miter return null\n"); -+ err = -EINVAL; -+ goto release_ss; -+ } - /* - * todo is the number of consecutive 4byte word that we - * can read from current SG -@@ -256,52 +287,57 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq) - */ - todo = min(rx_cnt * 4 - ob, ileft); - todo = min_t(size_t, todo, mi.length - oi); -- memcpy(buf + ob, mi.addr + oi, todo); -+ memcpy(ss->buf + ob, mi.addr + oi, todo); - ileft -= todo; - oi += todo; - ob += todo; - if (!(ob % 4)) { -- writesl(ss->base + SS_RXFIFO, buf, -+ writesl(ss->base + SS_RXFIFO, ss->buf, - ob / 4); - ob = 0; - } - } - if (oi == mi.length) { -- sg_miter_next(&mi); -+ pi += mi.length; - oi = 0; - } -+ sg_miter_stop(&mi); - } - - spaces = readl(ss->base + SS_FCSR); - rx_cnt = SS_RXFIFO_SPACES(spaces); - tx_cnt = SS_TXFIFO_SPACES(spaces); -- dev_dbg(ss->dev, -- "%x %u/%zu %u/%u cnt=%u %u/%zu %u/%u cnt=%u %u\n", -- mode, -- oi, mi.length, ileft, areq->cryptlen, rx_cnt, -- oo, mo.length, oleft, areq->cryptlen, tx_cnt, ob); - - if (!tx_cnt) - continue; -+ sg_miter_start(&mo, areq->dst, sg_nents(areq->dst), -+ SG_MITER_TO_SG | SG_MITER_ATOMIC); -+ if (po) -+ sg_miter_skip(&mo, po); -+ miter_err = sg_miter_next(&mo); -+ if (!miter_err || !mo.addr) { -+ dev_err_ratelimited(ss->dev, "ERROR: sg_miter return null\n"); -+ err = -EINVAL; -+ goto release_ss; -+ } - /* todo in 4bytes word */ - todo = min(tx_cnt, oleft / 4); - todo = min_t(size_t, todo, (mo.length - oo) / 4); -+ - if (todo) { - readsl(ss->base + SS_TXFIFO, mo.addr + oo, todo); - oleft -= todo * 4; - oo += todo * 4; - if (oo == mo.length) { -- sg_miter_next(&mo); -+ po += mo.length; - oo = 0; - } - } else { -- char bufo[4 * SS_TX_MAX]; /* buffer for linearize SG dst */ -- - /* - * read obl bytes in bufo, we read at maximum for - * emptying the device - */ -- readsl(ss->base + SS_TXFIFO, bufo, tx_cnt); -+ readsl(ss->base + SS_TXFIFO, ss->bufo, tx_cnt); - obl = tx_cnt * 4; - obo = 0; - do { -@@ -313,28 +349,31 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq) - */ - todo = min_t(size_t, - mo.length - oo, obl - obo); -- memcpy(mo.addr + oo, bufo + obo, todo); -+ memcpy(mo.addr + oo, ss->bufo + obo, todo); - oleft -= todo; - obo += todo; - oo += todo; - if (oo == mo.length) { -+ po += mo.length; - sg_miter_next(&mo); - oo = 0; - } - } while (obo < obl); - /* bufo must be fully used here */ - } -+ sg_miter_stop(&mo); - } - if (areq->iv) { -- for (i = 0; i < 4 && i < ivsize / 4; i++) { -- v = readl(ss->base + SS_IV0 + i * 4); -- *(u32 *)(areq->iv + i * 4) = v; -+ if (mode & SS_DECRYPTION) { -+ memcpy(areq->iv, backup_iv, ivsize); -+ kfree_sensitive(backup_iv); -+ } else { -+ scatterwalk_map_and_copy(areq->iv, areq->dst, areq->cryptlen - ivsize, -+ ivsize, 0); - } - } - - release_ss: -- sg_miter_stop(&mi); -- sg_miter_stop(&mo); - writel(0, ss->base + SS_CTL); - spin_unlock_irqrestore(&ss->slock, flags); - -diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss.h b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss.h -index 5c291e4a6857b..c242fccb2ab67 100644 ---- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss.h -+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss.h -@@ -148,6 +148,8 @@ struct sun4i_ss_ctx { - struct reset_control *reset; - struct device *dev; - struct resource *res; -+ char buf[4 * SS_RX_MAX];/* buffer for linearize SG src */ -+ char bufo[4 * SS_TX_MAX]; /* buffer for linearize SG dst */ - spinlock_t slock; /* control the use of the device */ - #ifdef CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG - u32 seed[SS_SEED_LEN / BITS_PER_LONG]; -diff --git a/drivers/crypto/bcm/cipher.c b/drivers/crypto/bcm/cipher.c -index 30390a7324b29..0e5537838ef36 100644 ---- a/drivers/crypto/bcm/cipher.c -+++ b/drivers/crypto/bcm/cipher.c -@@ -42,7 +42,7 @@ - - /* ================= Device Structure ================== */ - --struct device_private iproc_priv; -+struct bcm_device_private iproc_priv; - - /* ==================== Parameters ===================== */ - -diff --git a/drivers/crypto/bcm/cipher.h b/drivers/crypto/bcm/cipher.h -index 0ad5892b445d3..71281a3bdbdc0 100644 ---- a/drivers/crypto/bcm/cipher.h -+++ b/drivers/crypto/bcm/cipher.h -@@ -420,7 +420,7 @@ struct spu_hw { - u32 num_chan; - }; - --struct device_private { -+struct bcm_device_private { - struct platform_device *pdev; - - struct spu_hw spu; -@@ -467,6 +467,6 @@ struct device_private { - struct mbox_chan **mbox; - }; - --extern struct device_private iproc_priv; -+extern struct bcm_device_private iproc_priv; - - #endif -diff --git a/drivers/crypto/bcm/util.c b/drivers/crypto/bcm/util.c -index 2b304fc780595..77aeedb840555 100644 ---- a/drivers/crypto/bcm/util.c -+++ b/drivers/crypto/bcm/util.c -@@ -348,7 +348,7 @@ char *spu_alg_name(enum spu_cipher_alg alg, enum spu_cipher_mode mode) - static ssize_t spu_debugfs_read(struct file *filp, char __user *ubuf, - size_t count, loff_t *offp) - { -- struct device_private *ipriv; -+ struct bcm_device_private *ipriv; - char *buf; - ssize_t ret, out_offset, out_count; - int i; -diff --git a/drivers/crypto/qat/Kconfig b/drivers/crypto/qat/Kconfig -index 846a3d90b41a3..77783feb62b25 100644 ---- a/drivers/crypto/qat/Kconfig -+++ b/drivers/crypto/qat/Kconfig -@@ -11,7 +11,7 @@ config CRYPTO_DEV_QAT - select CRYPTO_SHA1 - select CRYPTO_SHA256 - select CRYPTO_SHA512 -- select CRYPTO_AES -+ select CRYPTO_LIB_AES - select FW_LOADER - - config CRYPTO_DEV_QAT_DH895xCC -diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c -index 4fd85f31630ac..25c9f825b8b54 100644 ---- a/drivers/crypto/talitos.c -+++ b/drivers/crypto/talitos.c -@@ -1093,11 +1093,12 @@ static void ipsec_esp_decrypt_hwauth_done(struct device *dev, - */ - static int sg_to_link_tbl_offset(struct scatterlist *sg, int sg_count, - unsigned int offset, int datalen, int elen, -- struct talitos_ptr *link_tbl_ptr) -+ struct talitos_ptr *link_tbl_ptr, int align) - { - int n_sg = elen ? sg_count + 1 : sg_count; - int count = 0; - int cryptlen = datalen + elen; -+ int padding = ALIGN(cryptlen, align) - cryptlen; - - while (cryptlen && sg && n_sg--) { - unsigned int len = sg_dma_len(sg); -@@ -1121,7 +1122,7 @@ static int sg_to_link_tbl_offset(struct scatterlist *sg, int sg_count, - offset += datalen; - } - to_talitos_ptr(link_tbl_ptr + count, -- sg_dma_address(sg) + offset, len, 0); -+ sg_dma_address(sg) + offset, sg_next(sg) ? len : len + padding, 0); - to_talitos_ptr_ext_set(link_tbl_ptr + count, 0, 0); - count++; - cryptlen -= len; -@@ -1144,10 +1145,11 @@ static int talitos_sg_map_ext(struct device *dev, struct scatterlist *src, - unsigned int len, struct talitos_edesc *edesc, - struct talitos_ptr *ptr, int sg_count, - unsigned int offset, int tbl_off, int elen, -- bool force) -+ bool force, int align) - { - struct talitos_private *priv = dev_get_drvdata(dev); - bool is_sec1 = has_ftr_sec1(priv); -+ int aligned_len = ALIGN(len, align); - - if (!src) { - to_talitos_ptr(ptr, 0, 0, is_sec1); -@@ -1155,22 +1157,22 @@ static int talitos_sg_map_ext(struct device *dev, struct scatterlist *src, - } - to_talitos_ptr_ext_set(ptr, elen, is_sec1); - if (sg_count == 1 && !force) { -- to_talitos_ptr(ptr, sg_dma_address(src) + offset, len, is_sec1); -+ to_talitos_ptr(ptr, sg_dma_address(src) + offset, aligned_len, is_sec1); - return sg_count; - } - if (is_sec1) { -- to_talitos_ptr(ptr, edesc->dma_link_tbl + offset, len, is_sec1); -+ to_talitos_ptr(ptr, edesc->dma_link_tbl + offset, aligned_len, is_sec1); - return sg_count; - } - sg_count = sg_to_link_tbl_offset(src, sg_count, offset, len, elen, -- &edesc->link_tbl[tbl_off]); -+ &edesc->link_tbl[tbl_off], align); - if (sg_count == 1 && !force) { - /* Only one segment now, so no link tbl needed*/ - copy_talitos_ptr(ptr, &edesc->link_tbl[tbl_off], is_sec1); - return sg_count; - } - to_talitos_ptr(ptr, edesc->dma_link_tbl + -- tbl_off * sizeof(struct talitos_ptr), len, is_sec1); -+ tbl_off * sizeof(struct talitos_ptr), aligned_len, is_sec1); - to_talitos_ptr_ext_or(ptr, DESC_PTR_LNKTBL_JUMP, is_sec1); - - return sg_count; -@@ -1182,7 +1184,7 @@ static int talitos_sg_map(struct device *dev, struct scatterlist *src, - unsigned int offset, int tbl_off) - { - return talitos_sg_map_ext(dev, src, len, edesc, ptr, sg_count, offset, -- tbl_off, 0, false); -+ tbl_off, 0, false, 1); - } - - /* -@@ -1251,7 +1253,7 @@ static int ipsec_esp(struct talitos_edesc *edesc, struct aead_request *areq, - - ret = talitos_sg_map_ext(dev, areq->src, cryptlen, edesc, &desc->ptr[4], - sg_count, areq->assoclen, tbl_off, elen, -- false); -+ false, 1); - - if (ret > 1) { - tbl_off += ret; -@@ -1271,7 +1273,7 @@ static int ipsec_esp(struct talitos_edesc *edesc, struct aead_request *areq, - elen = 0; - ret = talitos_sg_map_ext(dev, areq->dst, cryptlen, edesc, &desc->ptr[5], - sg_count, areq->assoclen, tbl_off, elen, -- is_ipsec_esp && !encrypt); -+ is_ipsec_esp && !encrypt, 1); - tbl_off += ret; - - if (!encrypt && is_ipsec_esp) { -@@ -1577,6 +1579,8 @@ static int common_nonsnoop(struct talitos_edesc *edesc, - bool sync_needed = false; - struct talitos_private *priv = dev_get_drvdata(dev); - bool is_sec1 = has_ftr_sec1(priv); -+ bool is_ctr = (desc->hdr & DESC_HDR_SEL0_MASK) == DESC_HDR_SEL0_AESU && -+ (desc->hdr & DESC_HDR_MODE0_AESU_MASK) == DESC_HDR_MODE0_AESU_CTR; - - /* first DWORD empty */ - -@@ -1597,8 +1601,8 @@ static int common_nonsnoop(struct talitos_edesc *edesc, - /* - * cipher in - */ -- sg_count = talitos_sg_map(dev, areq->src, cryptlen, edesc, -- &desc->ptr[3], sg_count, 0, 0); -+ sg_count = talitos_sg_map_ext(dev, areq->src, cryptlen, edesc, &desc->ptr[3], -+ sg_count, 0, 0, 0, false, is_ctr ? 16 : 1); - if (sg_count > 1) - sync_needed = true; - -@@ -2761,6 +2765,22 @@ static struct talitos_alg_template driver_algs[] = { - DESC_HDR_SEL0_AESU | - DESC_HDR_MODE0_AESU_CTR, - }, -+ { .type = CRYPTO_ALG_TYPE_SKCIPHER, -+ .alg.skcipher = { -+ .base.cra_name = "ctr(aes)", -+ .base.cra_driver_name = "ctr-aes-talitos", -+ .base.cra_blocksize = 1, -+ .base.cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_ALLOCATES_MEMORY, -+ .min_keysize = AES_MIN_KEY_SIZE, -+ .max_keysize = AES_MAX_KEY_SIZE, -+ .ivsize = AES_BLOCK_SIZE, -+ .setkey = skcipher_aes_setkey, -+ }, -+ .desc_hdr_template = DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU | -+ DESC_HDR_SEL0_AESU | -+ DESC_HDR_MODE0_AESU_CTR, -+ }, - { .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { - .base.cra_name = "ecb(des)", -@@ -3178,6 +3198,12 @@ static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev, - t_alg->algt.alg.skcipher.setkey ?: skcipher_setkey; - t_alg->algt.alg.skcipher.encrypt = skcipher_encrypt; - t_alg->algt.alg.skcipher.decrypt = skcipher_decrypt; -+ if (!strcmp(alg->cra_name, "ctr(aes)") && !has_ftr_sec1(priv) && -+ DESC_TYPE(t_alg->algt.desc_hdr_template) != -+ DESC_TYPE(DESC_HDR_TYPE_AESU_CTR_NONSNOOP)) { -+ devm_kfree(dev, t_alg); -+ return ERR_PTR(-ENOTSUPP); -+ } - break; - case CRYPTO_ALG_TYPE_AEAD: - alg = &t_alg->algt.alg.aead.base; -diff --git a/drivers/crypto/talitos.h b/drivers/crypto/talitos.h -index 1469b956948ab..32825119e8805 100644 ---- a/drivers/crypto/talitos.h -+++ b/drivers/crypto/talitos.h -@@ -344,6 +344,7 @@ static inline bool has_ftr_sec1(struct talitos_private *priv) - - /* primary execution unit mode (MODE0) and derivatives */ - #define DESC_HDR_MODE0_ENCRYPT cpu_to_be32(0x00100000) -+#define DESC_HDR_MODE0_AESU_MASK cpu_to_be32(0x00600000) - #define DESC_HDR_MODE0_AESU_CBC cpu_to_be32(0x00200000) - #define DESC_HDR_MODE0_AESU_CTR cpu_to_be32(0x00600000) - #define DESC_HDR_MODE0_DEU_CBC cpu_to_be32(0x00400000) -diff --git a/drivers/dax/bus.c b/drivers/dax/bus.c -index 737b207c9e30d..3003558c1a8bb 100644 ---- a/drivers/dax/bus.c -+++ b/drivers/dax/bus.c -@@ -1038,7 +1038,7 @@ static ssize_t range_parse(const char *opt, size_t len, struct range *range) - { - unsigned long long addr = 0; - char *start, *end, *str; -- ssize_t rc = EINVAL; -+ ssize_t rc = -EINVAL; - - str = kstrdup(opt, GFP_KERNEL); - if (!str) -diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c -index 0feb323bae1e3..f8459cc5315df 100644 ---- a/drivers/dma/fsldma.c -+++ b/drivers/dma/fsldma.c -@@ -1214,6 +1214,7 @@ static int fsldma_of_probe(struct platform_device *op) - { - struct fsldma_device *fdev; - struct device_node *child; -+ unsigned int i; - int err; - - fdev = kzalloc(sizeof(*fdev), GFP_KERNEL); -@@ -1292,6 +1293,10 @@ static int fsldma_of_probe(struct platform_device *op) - return 0; - - out_free_fdev: -+ for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { -+ if (fdev->chan[i]) -+ fsl_dma_chan_remove(fdev->chan[i]); -+ } - irq_dispose_mapping(fdev->irq); - iounmap(fdev->regs); - out_free: -@@ -1314,6 +1319,7 @@ static int fsldma_of_remove(struct platform_device *op) - if (fdev->chan[i]) - fsl_dma_chan_remove(fdev->chan[i]); - } -+ irq_dispose_mapping(fdev->irq); - - iounmap(fdev->regs); - kfree(fdev); -diff --git a/drivers/dma/hsu/pci.c b/drivers/dma/hsu/pci.c -index 07cc7320a614f..9045a6f7f5893 100644 ---- a/drivers/dma/hsu/pci.c -+++ b/drivers/dma/hsu/pci.c -@@ -26,22 +26,12 @@ - static irqreturn_t hsu_pci_irq(int irq, void *dev) - { - struct hsu_dma_chip *chip = dev; -- struct pci_dev *pdev = to_pci_dev(chip->dev); - u32 dmaisr; - u32 status; - unsigned short i; - int ret = 0; - int err; - -- /* -- * On Intel Tangier B0 and Anniedale the interrupt line, disregarding -- * to have different numbers, is shared between HSU DMA and UART IPs. -- * Thus on such SoCs we are expecting that IRQ handler is called in -- * UART driver only. -- */ -- if (pdev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA) -- return IRQ_HANDLED; -- - dmaisr = readl(chip->regs + HSU_PCI_DMAISR); - for (i = 0; i < chip->hsu->nr_channels; i++) { - if (dmaisr & 0x1) { -@@ -105,6 +95,17 @@ static int hsu_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) - if (ret) - goto err_register_irq; - -+ /* -+ * On Intel Tangier B0 and Anniedale the interrupt line, disregarding -+ * to have different numbers, is shared between HSU DMA and UART IPs. -+ * Thus on such SoCs we are expecting that IRQ handler is called in -+ * UART driver only. Instead of handling the spurious interrupt -+ * from HSU DMA here and waste CPU time and delay HSU UART interrupt -+ * handling, disable the interrupt entirely. -+ */ -+ if (pdev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA) -+ disable_irq_nosync(chip->irq); -+ - pci_set_drvdata(pdev, chip); - - return 0; -diff --git a/drivers/dma/idxd/dma.c b/drivers/dma/idxd/dma.c -index 71fd6e4c42cd7..a15e50126434e 100644 ---- a/drivers/dma/idxd/dma.c -+++ b/drivers/dma/idxd/dma.c -@@ -165,6 +165,7 @@ int idxd_register_dma_device(struct idxd_device *idxd) - INIT_LIST_HEAD(&dma->channels); - dma->dev = &idxd->pdev->dev; - -+ dma_cap_set(DMA_PRIVATE, dma->cap_mask); - dma_cap_set(DMA_COMPLETION_NO_ORDER, dma->cap_mask); - dma->device_release = idxd_dma_release; - -diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c -index 9fede32641e9e..04202d75f4eed 100644 ---- a/drivers/dma/owl-dma.c -+++ b/drivers/dma/owl-dma.c -@@ -1245,6 +1245,7 @@ static int owl_dma_remove(struct platform_device *pdev) - owl_dma_free(od); - - clk_disable_unprepare(od->clk); -+ dma_pool_destroy(od->lli_pool); - - return 0; - } -diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c -index 1a0bf6b0567a5..e48eb397f433d 100644 ---- a/drivers/dma/qcom/gpi.c -+++ b/drivers/dma/qcom/gpi.c -@@ -584,7 +584,7 @@ static inline void gpi_write_reg_field(struct gpii *gpii, void __iomem *addr, - gpi_write_reg(gpii, addr, val); - } - --static inline void -+static __always_inline void - gpi_update_reg(struct gpii *gpii, u32 offset, u32 mask, u32 val) - { - void __iomem *addr = gpii->regs + offset; -diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c -index f474a12323354..46bc1a419bdfb 100644 ---- a/drivers/dma/ti/k3-udma.c -+++ b/drivers/dma/ti/k3-udma.c -@@ -4306,6 +4306,7 @@ static int udma_get_mmrs(struct platform_device *pdev, struct udma_dev *ud) - ud->bchan_cnt = BCDMA_CAP2_BCHAN_CNT(cap2); - ud->tchan_cnt = BCDMA_CAP2_TCHAN_CNT(cap2); - ud->rchan_cnt = BCDMA_CAP2_RCHAN_CNT(cap2); -+ ud->rflow_cnt = ud->rchan_cnt; - break; - case DMA_TYPE_PKTDMA: - cap4 = udma_read(ud->mmrs[MMR_GCFG], 0x30); -diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c -index 5392e1fc6b4ef..cacdf1589b101 100644 ---- a/drivers/firmware/arm_scmi/driver.c -+++ b/drivers/firmware/arm_scmi/driver.c -@@ -848,8 +848,6 @@ static int scmi_remove(struct platform_device *pdev) - struct scmi_info *info = platform_get_drvdata(pdev); - struct idr *idr = &info->tx_idr; - -- scmi_notification_exit(&info->handle); -- - mutex_lock(&scmi_list_mutex); - if (info->users) - ret = -EBUSY; -@@ -860,6 +858,8 @@ static int scmi_remove(struct platform_device *pdev) - if (ret) - return ret; - -+ scmi_notification_exit(&info->handle); -+ - /* Safe to free channels since no more users */ - ret = idr_for_each(idr, info->desc->ops->chan_free, idr); - idr_destroy(&info->tx_idr); -diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c -index a2a8d155c75e3..b7568ee33696d 100644 ---- a/drivers/gpio/gpio-pcf857x.c -+++ b/drivers/gpio/gpio-pcf857x.c -@@ -332,7 +332,7 @@ static int pcf857x_probe(struct i2c_client *client, - * reset state. Otherwise it flags pins to be driven low. - */ - gpio->out = ~n_latch; -- gpio->status = gpio->out; -+ gpio->status = gpio->read(gpio->client); - - /* Enable irqchip if we have an interrupt */ - if (client->irq) { -diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig -index 0973f408d75fe..af6c6d214d916 100644 ---- a/drivers/gpu/drm/Kconfig -+++ b/drivers/gpu/drm/Kconfig -@@ -15,6 +15,9 @@ menuconfig DRM - select I2C_ALGOBIT - select DMA_SHARED_BUFFER - select SYNC_FILE -+# gallium uses SYS_kcmp for os_same_file_description() to de-duplicate -+# device and dmabuf fd. Let's make sure that is available for our userspace. -+ select KCMP - help - Kernel-level support for the Direct Rendering Infrastructure (DRI) - introduced in XFree86 4.0. If you say Y here, you need to select -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h -index 5993dd0fdd8e7..37fb846af4888 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h -@@ -1003,6 +1003,12 @@ struct amdgpu_device { - bool in_suspend; - bool in_hibernate; - -+ /* -+ * The combination flag in_poweroff_reboot_com used to identify the poweroff -+ * and reboot opt in the s0i3 system-wide suspend. -+ */ -+ bool in_poweroff_reboot_com; -+ - atomic_t in_gpu_reset; - enum pp_mp1_state mp1_state; - struct rw_semaphore reset_sem; -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -index cab1ebaf6d629..bc5b644ddda34 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -@@ -2666,7 +2666,8 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev) - { - int i, r; - -- if (!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) { -+ if (adev->in_poweroff_reboot_com || -+ !amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) { - amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE); - amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE); - } -@@ -3726,7 +3727,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon) - - amdgpu_fence_driver_suspend(adev); - -- if (!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) -+ if (adev->in_poweroff_reboot_com || -+ !amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) - r = amdgpu_device_ip_suspend_phase2(adev); - else - amdgpu_gfx_state_change_set(adev, sGpuChangeState_D3Entry); -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c -index 7169fb5e3d9c4..0ffea970d0179 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c -@@ -1266,7 +1266,9 @@ amdgpu_pci_shutdown(struct pci_dev *pdev) - */ - if (!amdgpu_passthrough(adev)) - adev->mp1_state = PP_MP1_STATE_UNLOAD; -+ adev->in_poweroff_reboot_com = true; - amdgpu_device_ip_suspend(adev); -+ adev->in_poweroff_reboot_com = false; - adev->mp1_state = PP_MP1_STATE_NONE; - } - -@@ -1308,8 +1310,13 @@ static int amdgpu_pmops_thaw(struct device *dev) - static int amdgpu_pmops_poweroff(struct device *dev) - { - struct drm_device *drm_dev = dev_get_drvdata(dev); -+ struct amdgpu_device *adev = drm_to_adev(drm_dev); -+ int r; - -- return amdgpu_device_suspend(drm_dev, true); -+ adev->in_poweroff_reboot_com = true; -+ r = amdgpu_device_suspend(drm_dev, true); -+ adev->in_poweroff_reboot_com = false; -+ return r; - } - - static int amdgpu_pmops_restore(struct device *dev) -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c -index 82e952696d24f..1fb2a91ad30ad 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c -@@ -846,7 +846,7 @@ static int amdgpu_ras_error_inject_xgmi(struct amdgpu_device *adev, - if (amdgpu_dpm_allow_xgmi_power_down(adev, true)) - dev_warn(adev->dev, "Failed to allow XGMI power down"); - -- if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW)) -+ if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_ALLOW)) - dev_warn(adev->dev, "Failed to allow df cstate"); - - return ret; -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h -index 6752d8b131188..ce8dc995c10cf 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h -@@ -21,7 +21,7 @@ - * - */ - --#if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) -+#if !defined(_AMDGPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) - #define _AMDGPU_TRACE_H_ - - #include -diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c -index d86b42a365601..e7d6da05011ff 100644 ---- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c -@@ -71,6 +71,11 @@ - #define GB_ADDR_CONFIG__NUM_PKRS__SHIFT 0x8 - #define GB_ADDR_CONFIG__NUM_PKRS_MASK 0x00000700L - -+#define mmCGTS_TCC_DISABLE_gc_10_3 0x5006 -+#define mmCGTS_TCC_DISABLE_gc_10_3_BASE_IDX 1 -+#define mmCGTS_USER_TCC_DISABLE_gc_10_3 0x5007 -+#define mmCGTS_USER_TCC_DISABLE_gc_10_3_BASE_IDX 1 -+ - #define mmCP_MEC_CNTL_Sienna_Cichlid 0x0f55 - #define mmCP_MEC_CNTL_Sienna_Cichlid_BASE_IDX 0 - #define mmRLC_SAFE_MODE_Sienna_Cichlid 0x4ca0 -@@ -99,10 +104,6 @@ - #define mmGCR_GENERAL_CNTL_Sienna_Cichlid 0x1580 - #define mmGCR_GENERAL_CNTL_Sienna_Cichlid_BASE_IDX 0 - --#define mmCGTS_TCC_DISABLE_Vangogh 0x5006 --#define mmCGTS_TCC_DISABLE_Vangogh_BASE_IDX 1 --#define mmCGTS_USER_TCC_DISABLE_Vangogh 0x5007 --#define mmCGTS_USER_TCC_DISABLE_Vangogh_BASE_IDX 1 - #define mmGOLDEN_TSC_COUNT_UPPER_Vangogh 0x0025 - #define mmGOLDEN_TSC_COUNT_UPPER_Vangogh_BASE_IDX 1 - #define mmGOLDEN_TSC_COUNT_LOWER_Vangogh 0x0026 -@@ -4942,15 +4943,12 @@ static void gfx_v10_0_get_tcc_info(struct amdgpu_device *adev) - /* TCCs are global (not instanced). */ - uint32_t tcc_disable; - -- switch (adev->asic_type) { -- case CHIP_VANGOGH: -- tcc_disable = RREG32_SOC15(GC, 0, mmCGTS_TCC_DISABLE_Vangogh) | -- RREG32_SOC15(GC, 0, mmCGTS_USER_TCC_DISABLE_Vangogh); -- break; -- default: -+ if (adev->asic_type >= CHIP_SIENNA_CICHLID) { -+ tcc_disable = RREG32_SOC15(GC, 0, mmCGTS_TCC_DISABLE_gc_10_3) | -+ RREG32_SOC15(GC, 0, mmCGTS_USER_TCC_DISABLE_gc_10_3); -+ } else { - tcc_disable = RREG32_SOC15(GC, 0, mmCGTS_TCC_DISABLE) | -- RREG32_SOC15(GC, 0, mmCGTS_USER_TCC_DISABLE); -- break; -+ RREG32_SOC15(GC, 0, mmCGTS_USER_TCC_DISABLE); - } - - adev->gfx.config.tcc_disabled_mask = -diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c -index 0b3516c4eefb3..b2a93d8010828 100644 ---- a/drivers/gpu/drm/amd/amdgpu/soc15.c -+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c -@@ -241,6 +241,8 @@ static u32 soc15_get_xclk(struct amdgpu_device *adev) - { - u32 reference_clock = adev->clock.spll.reference_freq; - -+ if (adev->asic_type == CHIP_RENOIR) -+ return 10000; - if (adev->asic_type == CHIP_RAVEN) - return reference_clock / 4; - -diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h -index 16262e5d93f5c..7351dd195274e 100644 ---- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h -+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h -@@ -243,11 +243,11 @@ get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd) - static inline void dqm_lock(struct device_queue_manager *dqm) - { - mutex_lock(&dqm->lock_hidden); -- dqm->saved_flags = memalloc_nofs_save(); -+ dqm->saved_flags = memalloc_noreclaim_save(); - } - static inline void dqm_unlock(struct device_queue_manager *dqm) - { -- memalloc_nofs_restore(dqm->saved_flags); -+ memalloc_noreclaim_restore(dqm->saved_flags); - mutex_unlock(&dqm->lock_hidden); - } - -diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c -index 961abf1cf040c..947cd923fb4c3 100644 ---- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c -+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c -@@ -1131,7 +1131,7 @@ static void amdgpu_dm_fini(struct amdgpu_device *adev) - - #ifdef CONFIG_DRM_AMD_DC_HDCP - if (adev->dm.hdcp_workqueue) { -- hdcp_destroy(adev->dm.hdcp_workqueue); -+ hdcp_destroy(&adev->dev->kobj, adev->dm.hdcp_workqueue); - adev->dm.hdcp_workqueue = NULL; - } - -@@ -1934,7 +1934,7 @@ static void dm_gpureset_commit_state(struct dc_state *dc_state, - dc_commit_updates_for_stream( - dm->dc, bundle->surface_updates, - dc_state->stream_status->plane_count, -- dc_state->streams[k], &bundle->stream_update); -+ dc_state->streams[k], &bundle->stream_update, dc_state); - } - - cleanup: -@@ -1965,7 +1965,8 @@ static void dm_set_dpms_off(struct dc_link *link) - - stream_update.stream = stream_state; - dc_commit_updates_for_stream(stream_state->ctx->dc, NULL, 0, -- stream_state, &stream_update); -+ stream_state, &stream_update, -+ stream_state->ctx->dc->current_state); - mutex_unlock(&adev->dm.dc_lock); - } - -@@ -7548,7 +7549,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, - struct drm_crtc *pcrtc, - bool wait_for_vblank) - { -- int i; -+ uint32_t i; - uint64_t timestamp_ns; - struct drm_plane *plane; - struct drm_plane_state *old_plane_state, *new_plane_state; -@@ -7589,7 +7590,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, - amdgpu_dm_commit_cursors(state); - - /* update planes when needed */ -- for_each_oldnew_plane_in_state_reverse(state, plane, old_plane_state, new_plane_state, i) { -+ for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { - struct drm_crtc *crtc = new_plane_state->crtc; - struct drm_crtc_state *new_crtc_state; - struct drm_framebuffer *fb = new_plane_state->fb; -@@ -7812,7 +7813,8 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, - bundle->surface_updates, - planes_count, - acrtc_state->stream, -- &bundle->stream_update); -+ &bundle->stream_update, -+ dc_state); - - /** - * Enable or disable the interrupts on the backend. -@@ -8148,13 +8150,13 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) - struct dm_connector_state *dm_new_con_state = to_dm_connector_state(new_con_state); - struct dm_connector_state *dm_old_con_state = to_dm_connector_state(old_con_state); - struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc); -- struct dc_surface_update surface_updates[MAX_SURFACES]; -+ struct dc_surface_update dummy_updates[MAX_SURFACES]; - struct dc_stream_update stream_update; - struct dc_info_packet hdr_packet; - struct dc_stream_status *status = NULL; - bool abm_changed, hdr_changed, scaling_changed; - -- memset(&surface_updates, 0, sizeof(surface_updates)); -+ memset(&dummy_updates, 0, sizeof(dummy_updates)); - memset(&stream_update, 0, sizeof(stream_update)); - - if (acrtc) { -@@ -8211,15 +8213,16 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) - * To fix this, DC should permit updating only stream properties. - */ - for (j = 0; j < status->plane_count; j++) -- surface_updates[j].surface = status->plane_states[j]; -+ dummy_updates[j].surface = status->plane_states[0]; - - - mutex_lock(&dm->dc_lock); - dc_commit_updates_for_stream(dm->dc, -- surface_updates, -+ dummy_updates, - status->plane_count, - dm_new_crtc_state->stream, -- &stream_update); -+ &stream_update, -+ dc_state); - mutex_unlock(&dm->dc_lock); - } - -diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c -index c2cd184f0bbd4..79de68ac03f20 100644 ---- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c -+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c -@@ -376,7 +376,7 @@ static void event_cpirq(struct work_struct *work) - } - - --void hdcp_destroy(struct hdcp_workqueue *hdcp_work) -+void hdcp_destroy(struct kobject *kobj, struct hdcp_workqueue *hdcp_work) - { - int i = 0; - -@@ -385,6 +385,7 @@ void hdcp_destroy(struct hdcp_workqueue *hdcp_work) - cancel_delayed_work_sync(&hdcp_work[i].watchdog_timer_dwork); - } - -+ sysfs_remove_bin_file(kobj, &hdcp_work[0].attr); - kfree(hdcp_work->srm); - kfree(hdcp_work->srm_temp); - kfree(hdcp_work); -diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h -index 5159b3a5e5b03..09294ff122fea 100644 ---- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h -+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h -@@ -69,7 +69,7 @@ void hdcp_update_display(struct hdcp_workqueue *hdcp_work, - - void hdcp_reset_display(struct hdcp_workqueue *work, unsigned int link_index); - void hdcp_handle_cpirq(struct hdcp_workqueue *work, unsigned int link_index); --void hdcp_destroy(struct hdcp_workqueue *work); -+void hdcp_destroy(struct kobject *kobj, struct hdcp_workqueue *work); - - struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev, struct cp_psp *cp_psp, struct dc *dc); - -diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table.c b/drivers/gpu/drm/amd/display/dc/bios/command_table.c -index 070459e3e4070..afc10b954ffa7 100644 ---- a/drivers/gpu/drm/amd/display/dc/bios/command_table.c -+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table.c -@@ -245,6 +245,23 @@ static enum bp_result encoder_control_digx_v3( - cntl->enable_dp_audio); - params.ucLaneNum = (uint8_t)(cntl->lanes_number); - -+ switch (cntl->color_depth) { -+ case COLOR_DEPTH_888: -+ params.ucBitPerColor = PANEL_8BIT_PER_COLOR; -+ break; -+ case COLOR_DEPTH_101010: -+ params.ucBitPerColor = PANEL_10BIT_PER_COLOR; -+ break; -+ case COLOR_DEPTH_121212: -+ params.ucBitPerColor = PANEL_12BIT_PER_COLOR; -+ break; -+ case COLOR_DEPTH_161616: -+ params.ucBitPerColor = PANEL_16BIT_PER_COLOR; -+ break; -+ default: -+ break; -+ } -+ - if (EXEC_BIOS_CMD_TABLE(DIGxEncoderControl, params)) - result = BP_RESULT_OK; - -@@ -274,6 +291,23 @@ static enum bp_result encoder_control_digx_v4( - cntl->enable_dp_audio)); - params.ucLaneNum = (uint8_t)(cntl->lanes_number); - -+ switch (cntl->color_depth) { -+ case COLOR_DEPTH_888: -+ params.ucBitPerColor = PANEL_8BIT_PER_COLOR; -+ break; -+ case COLOR_DEPTH_101010: -+ params.ucBitPerColor = PANEL_10BIT_PER_COLOR; -+ break; -+ case COLOR_DEPTH_121212: -+ params.ucBitPerColor = PANEL_12BIT_PER_COLOR; -+ break; -+ case COLOR_DEPTH_161616: -+ params.ucBitPerColor = PANEL_16BIT_PER_COLOR; -+ break; -+ default: -+ break; -+ } -+ - if (EXEC_BIOS_CMD_TABLE(DIGxEncoderControl, params)) - result = BP_RESULT_OK; - -@@ -1057,6 +1091,19 @@ static enum bp_result set_pixel_clock_v5( - * driver choose program it itself, i.e. here we program it - * to 888 by default. - */ -+ if (bp_params->signal_type == SIGNAL_TYPE_HDMI_TYPE_A) -+ switch (bp_params->color_depth) { -+ case TRANSMITTER_COLOR_DEPTH_30: -+ /* yes this is correct, the atom define is wrong */ -+ clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_32BPP; -+ break; -+ case TRANSMITTER_COLOR_DEPTH_36: -+ /* yes this is correct, the atom define is wrong */ -+ clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP; -+ break; -+ default: -+ break; -+ } - - if (EXEC_BIOS_CMD_TABLE(SetPixelClock, clk)) - result = BP_RESULT_OK; -@@ -1135,6 +1182,20 @@ static enum bp_result set_pixel_clock_v6( - * driver choose program it itself, i.e. here we pass required - * target rate that includes deep color. - */ -+ if (bp_params->signal_type == SIGNAL_TYPE_HDMI_TYPE_A) -+ switch (bp_params->color_depth) { -+ case TRANSMITTER_COLOR_DEPTH_30: -+ clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_30BPP_V6; -+ break; -+ case TRANSMITTER_COLOR_DEPTH_36: -+ clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_36BPP_V6; -+ break; -+ case TRANSMITTER_COLOR_DEPTH_48: -+ clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_48BPP; -+ break; -+ default: -+ break; -+ } - - if (EXEC_BIOS_CMD_TABLE(SetPixelClock, clk)) - result = BP_RESULT_OK; -diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c -index 6cf1a5a2a5ecc..58eb0d69873a6 100644 ---- a/drivers/gpu/drm/amd/display/dc/core/dc.c -+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c -@@ -2679,7 +2679,8 @@ void dc_commit_updates_for_stream(struct dc *dc, - struct dc_surface_update *srf_updates, - int surface_count, - struct dc_stream_state *stream, -- struct dc_stream_update *stream_update) -+ struct dc_stream_update *stream_update, -+ struct dc_state *state) - { - const struct dc_stream_status *stream_status; - enum surface_update_type update_type; -@@ -2698,12 +2699,6 @@ void dc_commit_updates_for_stream(struct dc *dc, - - - if (update_type >= UPDATE_TYPE_FULL) { -- struct dc_plane_state *new_planes[MAX_SURFACES]; -- -- memset(new_planes, 0, sizeof(new_planes)); -- -- for (i = 0; i < surface_count; i++) -- new_planes[i] = srf_updates[i].surface; - - /* initialize scratch memory for building context */ - context = dc_create_state(dc); -@@ -2712,21 +2707,15 @@ void dc_commit_updates_for_stream(struct dc *dc, - return; - } - -- dc_resource_state_copy_construct( -- dc->current_state, context); -+ dc_resource_state_copy_construct(state, context); - -- /*remove old surfaces from context */ -- if (!dc_rem_all_planes_for_stream(dc, stream, context)) { -- DC_ERROR("Failed to remove streams for new validate context!\n"); -- return; -- } -+ for (i = 0; i < dc->res_pool->pipe_count; i++) { -+ struct pipe_ctx *new_pipe = &context->res_ctx.pipe_ctx[i]; -+ struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i]; - -- /* add surface to context */ -- if (!dc_add_all_planes_for_stream(dc, stream, new_planes, surface_count, context)) { -- DC_ERROR("Failed to add streams for new validate context!\n"); -- return; -+ if (new_pipe->plane_state && new_pipe->plane_state != old_pipe->plane_state) -+ new_pipe->plane_state->force_full_update = true; - } -- - } - - -diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h -index e243c01b9672e..b7910976b81a7 100644 ---- a/drivers/gpu/drm/amd/display/dc/dc_stream.h -+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h -@@ -283,7 +283,8 @@ void dc_commit_updates_for_stream(struct dc *dc, - struct dc_surface_update *srf_updates, - int surface_count, - struct dc_stream_state *stream, -- struct dc_stream_update *stream_update); -+ struct dc_stream_update *stream_update, -+ struct dc_state *state); - /* - * Log the current stream state. - */ -diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c -index fb733f573715e..466f8f5803c9c 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c -+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c -@@ -871,6 +871,20 @@ static bool dce110_program_pix_clk( - bp_pc_params.flags.SET_EXTERNAL_REF_DIV_SRC = - pll_settings->use_external_clk; - -+ switch (pix_clk_params->color_depth) { -+ case COLOR_DEPTH_101010: -+ bp_pc_params.color_depth = TRANSMITTER_COLOR_DEPTH_30; -+ break; -+ case COLOR_DEPTH_121212: -+ bp_pc_params.color_depth = TRANSMITTER_COLOR_DEPTH_36; -+ break; -+ case COLOR_DEPTH_161616: -+ bp_pc_params.color_depth = TRANSMITTER_COLOR_DEPTH_48; -+ break; -+ default: -+ break; -+ } -+ - if (clk_src->bios->funcs->set_pixel_clock( - clk_src->bios, &bp_pc_params) != BP_RESULT_OK) - return false; -diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c -index ada57f745fd76..19e380e0a3301 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c -+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c -@@ -564,6 +564,7 @@ static void dce110_stream_encoder_hdmi_set_stream_attribute( - cntl.enable_dp_audio = enable_audio; - cntl.pixel_clock = actual_pix_clk_khz; - cntl.lanes_number = LANE_COUNT_FOUR; -+ cntl.color_depth = crtc_timing->display_color_depth; - - if (enc110->base.bp->funcs->encoder_control( - enc110->base.bp, &cntl) != BP_RESULT_OK) -diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c -index 130a0a0c83329..68028ec995e74 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c -+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c -@@ -601,12 +601,12 @@ static void set_clamp( - clamp_max = 0x3FC0; - break; - case COLOR_DEPTH_101010: -- /* 10bit MSB aligned on 14 bit bus '11 1111 1111 1100' */ -- clamp_max = 0x3FFC; -+ /* 10bit MSB aligned on 14 bit bus '11 1111 1111 0000' */ -+ clamp_max = 0x3FF0; - break; - case COLOR_DEPTH_121212: -- /* 12bit MSB aligned on 14 bit bus '11 1111 1111 1111' */ -- clamp_max = 0x3FFF; -+ /* 12bit MSB aligned on 14 bit bus '11 1111 1111 1100' */ -+ clamp_max = 0x3FFC; - break; - default: - clamp_max = 0x3FC0; -diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c -index 81db0179f7ea8..85dc2b16c9418 100644 ---- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c -+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c -@@ -480,7 +480,6 @@ unsigned int dcn10_get_dig_frontend(struct link_encoder *enc) - break; - default: - // invalid source select DIG -- ASSERT(false); - result = ENGINE_ID_UNKNOWN; - } - -diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c -index d6b4885618713..354c2a2702d79 100644 ---- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c -@@ -408,8 +408,8 @@ static struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv14_soc = { - }, - }, - .num_states = 5, -- .sr_exit_time_us = 11.6, -- .sr_enter_plus_exit_time_us = 13.9, -+ .sr_exit_time_us = 8.6, -+ .sr_enter_plus_exit_time_us = 10.9, - .urgent_latency_us = 4.0, - .urgent_latency_pixel_data_only_us = 4.0, - .urgent_latency_pixel_mixed_with_vm_data_us = 4.0, -@@ -3245,7 +3245,7 @@ restore_dml_state: - bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, - bool fast_validate) - { -- bool voltage_supported = false; -+ bool voltage_supported; - DC_FP_START(); - voltage_supported = dcn20_validate_bandwidth_fp(dc, context, fast_validate); - DC_FP_END(); -diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c -index 6743764289167..072f8c8809243 100644 ---- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c -@@ -1329,8 +1329,8 @@ validate_out: - return out; - } - --bool dcn21_validate_bandwidth(struct dc *dc, struct dc_state *context, -- bool fast_validate) -+static noinline bool dcn21_validate_bandwidth_fp(struct dc *dc, -+ struct dc_state *context, bool fast_validate) - { - bool out = false; - -@@ -1383,6 +1383,22 @@ validate_out: - - return out; - } -+ -+/* -+ * Some of the functions further below use the FPU, so we need to wrap this -+ * with DC_FP_START()/DC_FP_END(). Use the same approach as for -+ * dcn20_validate_bandwidth in dcn20_resource.c. -+ */ -+bool dcn21_validate_bandwidth(struct dc *dc, struct dc_state *context, -+ bool fast_validate) -+{ -+ bool voltage_supported; -+ DC_FP_START(); -+ voltage_supported = dcn21_validate_bandwidth_fp(dc, context, fast_validate); -+ DC_FP_END(); -+ return voltage_supported; -+} -+ - static void dcn21_destroy_resource_pool(struct resource_pool **pool) - { - struct dcn21_resource_pool *dcn21_pool = TO_DCN21_RES_POOL(*pool); -diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c -index 3deb3fb1724dc..0631c16f9aff8 100644 ---- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c -+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c -@@ -539,6 +539,8 @@ void dcn30_init_hw(struct dc *dc) - - fe = dc->links[i]->link_enc->funcs->get_dig_frontend( - dc->links[i]->link_enc); -+ if (fe == ENGINE_ID_UNKNOWN) -+ continue; - - for (j = 0; j < dc->res_pool->stream_enc_count; j++) { - if (fe == dc->res_pool->stream_enc[j]->id) { -diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c -index 1b971265418b6..0e0f494fbb5e1 100644 ---- a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c -+++ b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c -@@ -168,6 +168,11 @@ static const struct irq_source_info_funcs vblank_irq_info_funcs = { - .ack = NULL - }; - -+static const struct irq_source_info_funcs vupdate_no_lock_irq_info_funcs = { -+ .set = NULL, -+ .ack = NULL -+}; -+ - #undef BASE_INNER - #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg - -@@ -230,6 +235,17 @@ static const struct irq_source_info_funcs vblank_irq_info_funcs = { - .funcs = &vblank_irq_info_funcs\ - } - -+/* vupdate_no_lock_int_entry maps to DC_IRQ_SOURCE_VUPDATEx, to match semantic -+ * of DCE's DC_IRQ_SOURCE_VUPDATEx. -+ */ -+#define vupdate_no_lock_int_entry(reg_num)\ -+ [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ -+ IRQ_REG_ENTRY(OTG, reg_num,\ -+ OTG_GLOBAL_SYNC_STATUS, VUPDATE_NO_LOCK_INT_EN,\ -+ OTG_GLOBAL_SYNC_STATUS, VUPDATE_NO_LOCK_EVENT_CLEAR),\ -+ .funcs = &vupdate_no_lock_irq_info_funcs\ -+ } -+ - #define vblank_int_entry(reg_num)\ - [DC_IRQ_SOURCE_VBLANK1 + reg_num] = {\ - IRQ_REG_ENTRY(OTG, reg_num,\ -@@ -338,6 +354,12 @@ irq_source_info_dcn21[DAL_IRQ_SOURCES_NUMBER] = { - vupdate_int_entry(3), - vupdate_int_entry(4), - vupdate_int_entry(5), -+ vupdate_no_lock_int_entry(0), -+ vupdate_no_lock_int_entry(1), -+ vupdate_no_lock_int_entry(2), -+ vupdate_no_lock_int_entry(3), -+ vupdate_no_lock_int_entry(4), -+ vupdate_no_lock_int_entry(5), - vblank_int_entry(0), - vblank_int_entry(1), - vblank_int_entry(2), -diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c -index 7b6ef05a1d35a..0b5be50b2eeeb 100644 ---- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c -+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c -@@ -1074,7 +1074,7 @@ static ssize_t amdgpu_get_pp_dpm_sclk(struct device *dev, - static ssize_t amdgpu_read_mask(const char *buf, size_t count, uint32_t *mask) - { - int ret; -- long level; -+ unsigned long level; - char *sub_str = NULL; - char *tmp; - char buf_cpy[AMDGPU_MASK_BUF_MAX + 1]; -@@ -1090,8 +1090,8 @@ static ssize_t amdgpu_read_mask(const char *buf, size_t count, uint32_t *mask) - while (tmp[0]) { - sub_str = strsep(&tmp, delimiter); - if (strlen(sub_str)) { -- ret = kstrtol(sub_str, 0, &level); -- if (ret) -+ ret = kstrtoul(sub_str, 0, &level); -+ if (ret || level > 31) - return -EINVAL; - *mask |= 1 << level; - } else -diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c -index b11c0522a4410..405501c74e400 100644 ---- a/drivers/gpu/drm/drm_dp_mst_topology.c -+++ b/drivers/gpu/drm/drm_dp_mst_topology.c -@@ -2302,7 +2302,8 @@ drm_dp_mst_port_add_connector(struct drm_dp_mst_branch *mstb, - } - - if (port->pdt != DP_PEER_DEVICE_NONE && -- drm_dp_mst_is_end_device(port->pdt, port->mcs)) { -+ drm_dp_mst_is_end_device(port->pdt, port->mcs) && -+ port->port_num >= DP_MST_LOGICAL_PORT_0) { - port->cached_edid = drm_get_edid(port->connector, - &port->aux.ddc); - drm_connector_set_tile_property(port->connector); -diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c -index 4b81195106875..e82db0f4e7715 100644 ---- a/drivers/gpu/drm/drm_fb_helper.c -+++ b/drivers/gpu/drm/drm_fb_helper.c -@@ -946,11 +946,15 @@ static int setcmap_legacy(struct fb_cmap *cmap, struct fb_info *info) - drm_modeset_lock_all(fb_helper->dev); - drm_client_for_each_modeset(modeset, &fb_helper->client) { - crtc = modeset->crtc; -- if (!crtc->funcs->gamma_set || !crtc->gamma_size) -- return -EINVAL; -+ if (!crtc->funcs->gamma_set || !crtc->gamma_size) { -+ ret = -EINVAL; -+ goto out; -+ } - -- if (cmap->start + cmap->len > crtc->gamma_size) -- return -EINVAL; -+ if (cmap->start + cmap->len > crtc->gamma_size) { -+ ret = -EINVAL; -+ goto out; -+ } - - r = crtc->gamma_store; - g = r + crtc->gamma_size; -@@ -963,8 +967,9 @@ static int setcmap_legacy(struct fb_cmap *cmap, struct fb_info *info) - ret = crtc->funcs->gamma_set(crtc, r, g, b, - crtc->gamma_size, NULL); - if (ret) -- return ret; -+ goto out; - } -+out: - drm_modeset_unlock_all(fb_helper->dev); - - return ret; -diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c -index 33fb2f05ce662..1ac67d4505e07 100644 ---- a/drivers/gpu/drm/drm_modes.c -+++ b/drivers/gpu/drm/drm_modes.c -@@ -762,7 +762,7 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode) - if (mode->htotal == 0 || mode->vtotal == 0) - return 0; - -- num = mode->clock * 1000; -+ num = mode->clock; - den = mode->htotal * mode->vtotal; - - if (mode->flags & DRM_MODE_FLAG_INTERLACE) -@@ -772,7 +772,7 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode) - if (mode->vscan > 1) - den *= mode->vscan; - -- return DIV_ROUND_CLOSEST(num, den); -+ return DIV_ROUND_CLOSEST_ULL(mul_u32_u32(num, 1000), den); - } - EXPORT_SYMBOL(drm_mode_vrefresh); - -diff --git a/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c b/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c -index e281070611480..fc9a34ed58bd1 100644 ---- a/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c -+++ b/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c -@@ -279,11 +279,8 @@ int oaktrail_hdmi_i2c_init(struct pci_dev *dev) - hdmi_dev = pci_get_drvdata(dev); - - i2c_dev = kzalloc(sizeof(struct hdmi_i2c_dev), GFP_KERNEL); -- if (i2c_dev == NULL) { -- DRM_ERROR("Can't allocate interface\n"); -- ret = -ENOMEM; -- goto exit; -- } -+ if (!i2c_dev) -+ return -ENOMEM; - - i2c_dev->adap = &oaktrail_hdmi_i2c_adapter; - i2c_dev->status = I2C_STAT_INIT; -@@ -300,16 +297,23 @@ int oaktrail_hdmi_i2c_init(struct pci_dev *dev) - oaktrail_hdmi_i2c_adapter.name, hdmi_dev); - if (ret) { - DRM_ERROR("Failed to request IRQ for I2C controller\n"); -- goto err; -+ goto free_dev; - } - - /* Adapter registration */ - ret = i2c_add_numbered_adapter(&oaktrail_hdmi_i2c_adapter); -- return ret; -+ if (ret) { -+ DRM_ERROR("Failed to add I2C adapter\n"); -+ goto free_irq; -+ } - --err: -+ return 0; -+ -+free_irq: -+ free_irq(dev->irq, hdmi_dev); -+free_dev: - kfree(i2c_dev); --exit: -+ - return ret; - } - -diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c -index cc2d59e8471da..134068f9328d5 100644 ---- a/drivers/gpu/drm/gma500/psb_drv.c -+++ b/drivers/gpu/drm/gma500/psb_drv.c -@@ -312,6 +312,8 @@ static int psb_driver_load(struct drm_device *dev, unsigned long flags) - if (ret) - goto out_err; - -+ ret = -ENOMEM; -+ - dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0); - if (!dev_priv->mmu) - goto out_err; -diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c -index 82674a8853c60..2fa9ba36eeaa3 100644 ---- a/drivers/gpu/drm/i915/display/intel_hdmi.c -+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c -@@ -2216,7 +2216,11 @@ hdmi_port_clock_valid(struct intel_hdmi *hdmi, - has_hdmi_sink)) - return MODE_CLOCK_HIGH; - -- /* BXT DPLL can't generate 223-240 MHz */ -+ /* GLK DPLL can't generate 446-480 MHz */ -+ if (IS_GEMINILAKE(dev_priv) && clock > 446666 && clock < 480000) -+ return MODE_CLOCK_RANGE; -+ -+ /* BXT/GLK DPLL can't generate 223-240 MHz */ - if (IS_GEN9_LP(dev_priv) && clock > 223333 && clock < 240000) - return MODE_CLOCK_RANGE; - -diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c b/drivers/gpu/drm/i915/gt/gen7_renderclear.c -index e961ad6a31294..4adbc2bba97fb 100644 ---- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c -+++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c -@@ -240,7 +240,7 @@ gen7_emit_state_base_address(struct batch_chunk *batch, - /* general */ - *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; - /* surface */ -- *cs++ = batch_addr(batch) | surface_state_base | BASE_ADDRESS_MODIFY; -+ *cs++ = (batch_addr(batch) + surface_state_base) | BASE_ADDRESS_MODIFY; - /* dynamic */ - *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; - /* indirect */ -@@ -353,19 +353,21 @@ static void gen7_emit_pipeline_flush(struct batch_chunk *batch) - - static void gen7_emit_pipeline_invalidate(struct batch_chunk *batch) - { -- u32 *cs = batch_alloc_items(batch, 0, 8); -+ u32 *cs = batch_alloc_items(batch, 0, 10); - - /* ivb: Stall before STATE_CACHE_INVALIDATE */ -- *cs++ = GFX_OP_PIPE_CONTROL(4); -+ *cs++ = GFX_OP_PIPE_CONTROL(5); - *cs++ = PIPE_CONTROL_STALL_AT_SCOREBOARD | - PIPE_CONTROL_CS_STALL; - *cs++ = 0; - *cs++ = 0; -+ *cs++ = 0; - -- *cs++ = GFX_OP_PIPE_CONTROL(4); -+ *cs++ = GFX_OP_PIPE_CONTROL(5); - *cs++ = PIPE_CONTROL_STATE_CACHE_INVALIDATE; - *cs++ = 0; - *cs++ = 0; -+ *cs++ = 0; - - batch_advance(batch, cs); - } -@@ -391,12 +393,14 @@ static void emit_batch(struct i915_vma * const vma, - desc_count); - - /* Reset inherited context registers */ -+ gen7_emit_pipeline_flush(&cmds); - gen7_emit_pipeline_invalidate(&cmds); - batch_add(&cmds, MI_LOAD_REGISTER_IMM(2)); - batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7)); - batch_add(&cmds, 0xffff0000); - batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_1)); - batch_add(&cmds, 0xffff0000 | PIXEL_SUBSPAN_COLLECT_OPT_DISABLE); -+ gen7_emit_pipeline_invalidate(&cmds); - gen7_emit_pipeline_flush(&cmds); - - /* Switch to the media pipeline and our base address */ -diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c -index 63b4c5643f9cd..5cc20b403a252 100644 ---- a/drivers/gpu/drm/lima/lima_sched.c -+++ b/drivers/gpu/drm/lima/lima_sched.c -@@ -201,7 +201,7 @@ static int lima_pm_busy(struct lima_device *ldev) - int ret; - - /* resume GPU if it has been suspended by runtime PM */ -- ret = pm_runtime_get_sync(ldev->dev); -+ ret = pm_runtime_resume_and_get(ldev->dev); - if (ret < 0) - return ret; - -diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c -index 74ef6fc0528b6..523716e3c278a 100644 ---- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c -+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c -@@ -267,7 +267,7 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, - } - - con = ovl_fmt_convert(ovl, fmt); -- if (state->base.fb->format->has_alpha) -+ if (state->base.fb && state->base.fb->format->has_alpha) - con |= OVL_CON_AEN | OVL_CON_ALPHA; - - if (pending->rotation & DRM_MODE_REFLECT_Y) { -diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c -index e6703ae987608..b3318f86aabc0 100644 ---- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c -+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c -@@ -264,6 +264,16 @@ int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) - } - name = "GPU_SET"; - break; -+ case GMU_OOB_PERFCOUNTER_SET: -+ if (gmu->legacy) { -+ request = GMU_OOB_PERFCOUNTER_REQUEST; -+ ack = GMU_OOB_PERFCOUNTER_ACK; -+ } else { -+ request = GMU_OOB_PERFCOUNTER_REQUEST_NEW; -+ ack = GMU_OOB_PERFCOUNTER_ACK_NEW; -+ } -+ name = "PERFCOUNTER"; -+ break; - case GMU_OOB_BOOT_SLUMBER: - request = GMU_OOB_BOOT_SLUMBER_REQUEST; - ack = GMU_OOB_BOOT_SLUMBER_ACK; -@@ -301,9 +311,14 @@ int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) - void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) - { - if (!gmu->legacy) { -- WARN_ON(state != GMU_OOB_GPU_SET); -- gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, -- 1 << GMU_OOB_GPU_SET_CLEAR_NEW); -+ if (state == GMU_OOB_GPU_SET) { -+ gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, -+ 1 << GMU_OOB_GPU_SET_CLEAR_NEW); -+ } else { -+ WARN_ON(state != GMU_OOB_PERFCOUNTER_SET); -+ gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, -+ 1 << GMU_OOB_PERFCOUNTER_CLEAR_NEW); -+ } - return; - } - -@@ -312,6 +327,10 @@ void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) - gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, - 1 << GMU_OOB_GPU_SET_CLEAR); - break; -+ case GMU_OOB_PERFCOUNTER_SET: -+ gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, -+ 1 << GMU_OOB_PERFCOUNTER_CLEAR); -+ break; - case GMU_OOB_BOOT_SLUMBER: - gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, - 1 << GMU_OOB_BOOT_SLUMBER_CLEAR); -diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h -index c6d2bced8e5de..9fa278de2106a 100644 ---- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h -+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h -@@ -156,6 +156,7 @@ enum a6xx_gmu_oob_state { - GMU_OOB_BOOT_SLUMBER = 0, - GMU_OOB_GPU_SET, - GMU_OOB_DCVS_SET, -+ GMU_OOB_PERFCOUNTER_SET, - }; - - /* These are the interrupt / ack bits for each OOB request that are set -@@ -190,6 +191,13 @@ enum a6xx_gmu_oob_state { - #define GMU_OOB_GPU_SET_ACK_NEW 31 - #define GMU_OOB_GPU_SET_CLEAR_NEW 31 - -+#define GMU_OOB_PERFCOUNTER_REQUEST 17 -+#define GMU_OOB_PERFCOUNTER_ACK 25 -+#define GMU_OOB_PERFCOUNTER_CLEAR 25 -+ -+#define GMU_OOB_PERFCOUNTER_REQUEST_NEW 28 -+#define GMU_OOB_PERFCOUNTER_ACK_NEW 30 -+#define GMU_OOB_PERFCOUNTER_CLEAR_NEW 30 - - void a6xx_hfi_init(struct a6xx_gmu *gmu); - int a6xx_hfi_start(struct a6xx_gmu *gmu, int boot_state); -diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c -index 130661898546a..0366419d8bfed 100644 ---- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c -+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c -@@ -1117,7 +1117,7 @@ static void a6xx_llc_slices_init(struct platform_device *pdev, - a6xx_gpu->llc_slice = llcc_slice_getd(LLCC_GPU); - a6xx_gpu->htw_llc_slice = llcc_slice_getd(LLCC_GPUHTW); - -- if (IS_ERR(a6xx_gpu->llc_slice) && IS_ERR(a6xx_gpu->htw_llc_slice)) -+ if (IS_ERR_OR_NULL(a6xx_gpu->llc_slice) && IS_ERR_OR_NULL(a6xx_gpu->htw_llc_slice)) - a6xx_gpu->llc_mmio = ERR_PTR(-EINVAL); - } - -@@ -1169,14 +1169,18 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) - { - struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); - struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); -+ static DEFINE_MUTEX(perfcounter_oob); -+ -+ mutex_lock(&perfcounter_oob); - - /* Force the GPU power on so we can read this register */ -- a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); -+ a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); - - *value = gpu_read64(gpu, REG_A6XX_RBBM_PERFCTR_CP_0_LO, - REG_A6XX_RBBM_PERFCTR_CP_0_HI); - -- a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); -+ a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); -+ mutex_unlock(&perfcounter_oob); - return 0; - } - -diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c -index f09175698827a..b35914de1b275 100644 ---- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c -+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c -@@ -200,15 +200,15 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, - if (!iommu) - return NULL; - -- - if (adreno_is_a6xx(adreno_gpu)) { - struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); - struct io_pgtable_domain_attr pgtbl_cfg; -+ - /* -- * This allows GPU to set the bus attributes required to use system -- * cache on behalf of the iommu page table walker. -- */ -- if (!IS_ERR(a6xx_gpu->htw_llc_slice)) { -+ * This allows GPU to set the bus attributes required to use system -+ * cache on behalf of the iommu page table walker. -+ */ -+ if (!IS_ERR_OR_NULL(a6xx_gpu->htw_llc_slice)) { - pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_ARM_OUTER_WBWA; - iommu_domain_set_attr(iommu, DOMAIN_ATTR_IO_PGTABLE_CFG, &pgtbl_cfg); - } -diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c -index 0c8f9f88301fa..f5d71b2740793 100644 ---- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c -+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c -@@ -1180,7 +1180,7 @@ static void mdp5_crtc_pp_done_irq(struct mdp_irq *irq, uint32_t irqstatus) - struct mdp5_crtc *mdp5_crtc = container_of(irq, struct mdp5_crtc, - pp_done); - -- complete(&mdp5_crtc->pp_completion); -+ complete_all(&mdp5_crtc->pp_completion); - } - - static void mdp5_crtc_wait_for_pp_done(struct drm_crtc *crtc) -diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c -index e3462f5d96d75..6cbe10af0a7af 100644 ---- a/drivers/gpu/drm/msm/dp/dp_ctrl.c -+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c -@@ -631,7 +631,7 @@ static void _dp_ctrl_calc_tu(struct dp_tu_calc_input *in, - - tu = kzalloc(sizeof(*tu), GFP_KERNEL); - if (!tu) -- return -+ return; - - dp_panel_update_tu_timings(in, tu); - -diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c -index 3bc7ed21de286..81f6794a25100 100644 ---- a/drivers/gpu/drm/msm/dp/dp_display.c -+++ b/drivers/gpu/drm/msm/dp/dp_display.c -@@ -651,8 +651,8 @@ static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data) - dp_add_event(dp, EV_DISCONNECT_PENDING_TIMEOUT, 0, DP_TIMEOUT_5_SECOND); - - /* signal the disconnect event early to ensure proper teardown */ -- dp_display_handle_plugged_change(g_dp_display, false); - reinit_completion(&dp->audio_comp); -+ dp_display_handle_plugged_change(g_dp_display, false); - - dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_PLUG_INT_MASK | - DP_DP_IRQ_HPD_INT_MASK, true); -@@ -890,6 +890,9 @@ static int dp_display_disable(struct dp_display_private *dp, u32 data) - - /* wait only if audio was enabled */ - if (dp_display->audio_enabled) { -+ /* signal the disconnect event */ -+ reinit_completion(&dp->audio_comp); -+ dp_display_handle_plugged_change(dp_display, false); - if (!wait_for_completion_timeout(&dp->audio_comp, - HZ * 5)) - DRM_ERROR("audio comp timeout\n"); -diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c -index 1afb7c579dbbb..eca86bf448f74 100644 ---- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c -+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c -@@ -139,7 +139,7 @@ const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs = { - .disable = dsi_20nm_phy_disable, - .init = msm_dsi_phy_init_common, - }, -- .io_start = { 0xfd998300, 0xfd9a0300 }, -+ .io_start = { 0xfd998500, 0xfd9a0500 }, - .num_dsi_phy = 2, - }; - -diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c -index 108c405e03dd9..94525ac76d4e6 100644 ---- a/drivers/gpu/drm/msm/msm_drv.c -+++ b/drivers/gpu/drm/msm/msm_drv.c -@@ -788,9 +788,10 @@ static int msm_ioctl_gem_info_iova(struct drm_device *dev, - struct drm_file *file, struct drm_gem_object *obj, - uint64_t *iova) - { -+ struct msm_drm_private *priv = dev->dev_private; - struct msm_file_private *ctx = file->driver_priv; - -- if (!ctx->aspace) -+ if (!priv->gpu) - return -EINVAL; - - /* -diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c -index d04c349d8112a..5480852bdedaf 100644 ---- a/drivers/gpu/drm/msm/msm_gem_submit.c -+++ b/drivers/gpu/drm/msm/msm_gem_submit.c -@@ -198,6 +198,8 @@ static int submit_lookup_cmds(struct msm_gem_submit *submit, - submit->cmd[i].idx = submit_cmd.submit_idx; - submit->cmd[i].nr_relocs = submit_cmd.nr_relocs; - -+ userptr = u64_to_user_ptr(submit_cmd.relocs); -+ - sz = array_size(submit_cmd.nr_relocs, - sizeof(struct drm_msm_gem_submit_reloc)); - /* check for overflow: */ -diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h -index d8151a89e1631..4735251a394d8 100644 ---- a/drivers/gpu/drm/msm/msm_kms.h -+++ b/drivers/gpu/drm/msm/msm_kms.h -@@ -157,6 +157,7 @@ struct msm_kms { - * from the crtc's pending_timer close to end of the frame: - */ - struct mutex commit_lock[MAX_CRTCS]; -+ struct lock_class_key commit_lock_keys[MAX_CRTCS]; - unsigned pending_crtc_mask; - struct msm_pending_timer pending_timers[MAX_CRTCS]; - }; -@@ -166,8 +167,11 @@ static inline int msm_kms_init(struct msm_kms *kms, - { - unsigned i, ret; - -- for (i = 0; i < ARRAY_SIZE(kms->commit_lock); i++) -- mutex_init(&kms->commit_lock[i]); -+ for (i = 0; i < ARRAY_SIZE(kms->commit_lock); i++) { -+ lockdep_register_key(&kms->commit_lock_keys[i]); -+ __mutex_init(&kms->commit_lock[i], "&kms->commit_lock[i]", -+ &kms->commit_lock_keys[i]); -+ } - - kms->funcs = funcs; - -diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/conn.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/conn.h -index f5f59261ea819..d1beaad0c82b6 100644 ---- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/conn.h -+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/conn.h -@@ -14,6 +14,7 @@ enum dcb_connector_type { - DCB_CONNECTOR_LVDS_SPWG = 0x41, - DCB_CONNECTOR_DP = 0x46, - DCB_CONNECTOR_eDP = 0x47, -+ DCB_CONNECTOR_mDP = 0x48, - DCB_CONNECTOR_HDMI_0 = 0x60, - DCB_CONNECTOR_HDMI_1 = 0x61, - DCB_CONNECTOR_HDMI_C = 0x63, -diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c -index 5d191e58edf11..e48f1f7eb3705 100644 ---- a/drivers/gpu/drm/nouveau/nouveau_chan.c -+++ b/drivers/gpu/drm/nouveau/nouveau_chan.c -@@ -533,6 +533,7 @@ nouveau_channel_new(struct nouveau_drm *drm, struct nvif_device *device, - if (ret) { - NV_PRINTK(err, cli, "channel failed to initialise, %d\n", ret); - nouveau_channel_del(pchan); -+ goto done; - } - - ret = nouveau_svmm_join((*pchan)->vmm->svmm, (*pchan)->inst); -diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c -index 8b4b3688c7ae3..4c992fd5bd68a 100644 ---- a/drivers/gpu/drm/nouveau/nouveau_connector.c -+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c -@@ -1210,6 +1210,7 @@ drm_conntype_from_dcb(enum dcb_connector_type dcb) - case DCB_CONNECTOR_DMS59_DP0: - case DCB_CONNECTOR_DMS59_DP1: - case DCB_CONNECTOR_DP : -+ case DCB_CONNECTOR_mDP : - case DCB_CONNECTOR_USB_C : return DRM_MODE_CONNECTOR_DisplayPort; - case DCB_CONNECTOR_eDP : return DRM_MODE_CONNECTOR_eDP; - case DCB_CONNECTOR_HDMI_0 : -diff --git a/drivers/gpu/drm/panel/panel-elida-kd35t133.c b/drivers/gpu/drm/panel/panel-elida-kd35t133.c -index bc36aa3c11234..fe5ac3ef90185 100644 ---- a/drivers/gpu/drm/panel/panel-elida-kd35t133.c -+++ b/drivers/gpu/drm/panel/panel-elida-kd35t133.c -@@ -265,7 +265,8 @@ static int kd35t133_probe(struct mipi_dsi_device *dsi) - dsi->lanes = 1; - dsi->format = MIPI_DSI_FMT_RGB888; - dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | -- MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET; -+ MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET | -+ MIPI_DSI_CLOCK_NON_CONTINUOUS; - - drm_panel_init(&ctx->panel, &dsi->dev, &kd35t133_funcs, - DRM_MODE_CONNECTOR_DSI); -diff --git a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c -index 0c5f22e95c2db..624d17b96a693 100644 ---- a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c -+++ b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c -@@ -22,6 +22,7 @@ - /* Manufacturer specific Commands send via DSI */ - #define MANTIX_CMD_OTP_STOP_RELOAD_MIPI 0x41 - #define MANTIX_CMD_INT_CANCEL 0x4C -+#define MANTIX_CMD_SPI_FINISH 0x90 - - struct mantix { - struct device *dev; -@@ -66,6 +67,10 @@ static int mantix_init_sequence(struct mantix *ctx) - dsi_generic_write_seq(dsi, 0x80, 0x64, 0x00, 0x64, 0x00, 0x00); - msleep(20); - -+ dsi_generic_write_seq(dsi, MANTIX_CMD_SPI_FINISH, 0xA5); -+ dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x00, 0x2F); -+ msleep(20); -+ - dev_dbg(dev, "Panel init sequence done\n"); - return 0; - } -diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c -index 6b4e97bfd46ee..603c5dfe87682 100644 ---- a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c -+++ b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c -@@ -25,6 +25,14 @@ - /* Manufacturer Command Set */ - #define MCS_ELVSS_ON 0xb1 - #define MCS_TEMP_SWIRE 0xb2 -+#define MCS_PENTILE_1 0xb3 -+#define MCS_PENTILE_2 0xb4 -+#define MCS_GAMMA_DELTA_Y_RED 0xb5 -+#define MCS_GAMMA_DELTA_X_RED 0xb6 -+#define MCS_GAMMA_DELTA_Y_GREEN 0xb7 -+#define MCS_GAMMA_DELTA_X_GREEN 0xb8 -+#define MCS_GAMMA_DELTA_Y_BLUE 0xb9 -+#define MCS_GAMMA_DELTA_X_BLUE 0xba - #define MCS_MIECTL1 0xc0 - #define MCS_BCMODE 0xc1 - #define MCS_ERROR_CHECK 0xd5 -@@ -281,6 +289,7 @@ struct s6e63m0 { - struct backlight_device *bl_dev; - u8 lcd_type; - u8 elvss_pulse; -+ bool dsi_mode; - - struct regulator_bulk_data supplies[2]; - struct gpio_desc *reset_gpio; -@@ -395,9 +404,21 @@ static int s6e63m0_check_lcd_type(struct s6e63m0 *ctx) - - static void s6e63m0_init(struct s6e63m0 *ctx) - { -- s6e63m0_dcs_write_seq_static(ctx, MCS_PANELCTL, -- 0x01, 0x27, 0x27, 0x07, 0x07, 0x54, 0x9f, -- 0x63, 0x8f, 0x1a, 0x33, 0x0d, 0x00, 0x00); -+ /* -+ * We do not know why there is a difference in the DSI mode. -+ * (No datasheet.) -+ * -+ * In the vendor driver this sequence is called -+ * "SEQ_PANEL_CONDITION_SET" or "DCS_CMD_SEQ_PANEL_COND_SET". -+ */ -+ if (ctx->dsi_mode) -+ s6e63m0_dcs_write_seq_static(ctx, MCS_PANELCTL, -+ 0x01, 0x2c, 0x2c, 0x07, 0x07, 0x5f, 0xb3, -+ 0x6d, 0x97, 0x1d, 0x3a, 0x0f, 0x00, 0x00); -+ else -+ s6e63m0_dcs_write_seq_static(ctx, MCS_PANELCTL, -+ 0x01, 0x27, 0x27, 0x07, 0x07, 0x54, 0x9f, -+ 0x63, 0x8f, 0x1a, 0x33, 0x0d, 0x00, 0x00); - - s6e63m0_dcs_write_seq_static(ctx, MCS_DISCTL, - 0x02, 0x03, 0x1c, 0x10, 0x10); -@@ -414,40 +435,40 @@ static void s6e63m0_init(struct s6e63m0 *ctx) - - s6e63m0_dcs_write_seq_static(ctx, MCS_SRCCTL, - 0x00, 0x8e, 0x07); -- s6e63m0_dcs_write_seq_static(ctx, 0xb3, 0x6c); -+ s6e63m0_dcs_write_seq_static(ctx, MCS_PENTILE_1, 0x6c); - -- s6e63m0_dcs_write_seq_static(ctx, 0xb5, -+ s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_Y_RED, - 0x2c, 0x12, 0x0c, 0x0a, 0x10, 0x0e, 0x17, - 0x13, 0x1f, 0x1a, 0x2a, 0x24, 0x1f, 0x1b, - 0x1a, 0x17, 0x2b, 0x26, 0x22, 0x20, 0x3a, - 0x34, 0x30, 0x2c, 0x29, 0x26, 0x25, 0x23, - 0x21, 0x20, 0x1e, 0x1e); - -- s6e63m0_dcs_write_seq_static(ctx, 0xb6, -+ s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_X_RED, - 0x00, 0x00, 0x11, 0x22, 0x33, 0x44, 0x44, - 0x44, 0x55, 0x55, 0x66, 0x66, 0x66, 0x66, - 0x66, 0x66); - -- s6e63m0_dcs_write_seq_static(ctx, 0xb7, -+ s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_Y_GREEN, - 0x2c, 0x12, 0x0c, 0x0a, 0x10, 0x0e, 0x17, - 0x13, 0x1f, 0x1a, 0x2a, 0x24, 0x1f, 0x1b, - 0x1a, 0x17, 0x2b, 0x26, 0x22, 0x20, 0x3a, - 0x34, 0x30, 0x2c, 0x29, 0x26, 0x25, 0x23, - 0x21, 0x20, 0x1e, 0x1e); - -- s6e63m0_dcs_write_seq_static(ctx, 0xb8, -+ s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_X_GREEN, - 0x00, 0x00, 0x11, 0x22, 0x33, 0x44, 0x44, - 0x44, 0x55, 0x55, 0x66, 0x66, 0x66, 0x66, - 0x66, 0x66); - -- s6e63m0_dcs_write_seq_static(ctx, 0xb9, -+ s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_Y_BLUE, - 0x2c, 0x12, 0x0c, 0x0a, 0x10, 0x0e, 0x17, - 0x13, 0x1f, 0x1a, 0x2a, 0x24, 0x1f, 0x1b, - 0x1a, 0x17, 0x2b, 0x26, 0x22, 0x20, 0x3a, - 0x34, 0x30, 0x2c, 0x29, 0x26, 0x25, 0x23, - 0x21, 0x20, 0x1e, 0x1e); - -- s6e63m0_dcs_write_seq_static(ctx, 0xba, -+ s6e63m0_dcs_write_seq_static(ctx, MCS_GAMMA_DELTA_X_BLUE, - 0x00, 0x00, 0x11, 0x22, 0x33, 0x44, 0x44, - 0x44, 0x55, 0x55, 0x66, 0x66, 0x66, 0x66, - 0x66, 0x66); -@@ -671,12 +692,12 @@ static const struct backlight_ops s6e63m0_backlight_ops = { - .update_status = s6e63m0_set_brightness, - }; - --static int s6e63m0_backlight_register(struct s6e63m0 *ctx) -+static int s6e63m0_backlight_register(struct s6e63m0 *ctx, u32 max_brightness) - { - struct backlight_properties props = { - .type = BACKLIGHT_RAW, -- .brightness = MAX_BRIGHTNESS, -- .max_brightness = MAX_BRIGHTNESS -+ .brightness = max_brightness, -+ .max_brightness = max_brightness, - }; - struct device *dev = ctx->dev; - int ret = 0; -@@ -698,12 +719,14 @@ int s6e63m0_probe(struct device *dev, - bool dsi_mode) - { - struct s6e63m0 *ctx; -+ u32 max_brightness; - int ret; - - ctx = devm_kzalloc(dev, sizeof(struct s6e63m0), GFP_KERNEL); - if (!ctx) - return -ENOMEM; - -+ ctx->dsi_mode = dsi_mode; - ctx->dcs_read = dcs_read; - ctx->dcs_write = dcs_write; - dev_set_drvdata(dev, ctx); -@@ -712,6 +735,14 @@ int s6e63m0_probe(struct device *dev, - ctx->enabled = false; - ctx->prepared = false; - -+ ret = device_property_read_u32(dev, "max-brightness", &max_brightness); -+ if (ret) -+ max_brightness = MAX_BRIGHTNESS; -+ if (max_brightness > MAX_BRIGHTNESS) { -+ dev_err(dev, "illegal max brightness specified\n"); -+ max_brightness = MAX_BRIGHTNESS; -+ } -+ - ctx->supplies[0].supply = "vdd3"; - ctx->supplies[1].supply = "vci"; - ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies), -@@ -731,7 +762,7 @@ int s6e63m0_probe(struct device *dev, - dsi_mode ? DRM_MODE_CONNECTOR_DSI : - DRM_MODE_CONNECTOR_DPI); - -- ret = s6e63m0_backlight_register(ctx); -+ ret = s6e63m0_backlight_register(ctx, max_brightness); - if (ret < 0) - return ret; - -diff --git a/drivers/gpu/drm/rcar-du/rcar_cmm.c b/drivers/gpu/drm/rcar-du/rcar_cmm.c -index c578095b09a53..382d53f8a22e8 100644 ---- a/drivers/gpu/drm/rcar-du/rcar_cmm.c -+++ b/drivers/gpu/drm/rcar-du/rcar_cmm.c -@@ -122,7 +122,7 @@ int rcar_cmm_enable(struct platform_device *pdev) - { - int ret; - -- ret = pm_runtime_get_sync(&pdev->dev); -+ ret = pm_runtime_resume_and_get(&pdev->dev); - if (ret < 0) - return ret; - -diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c -index b5fb941e0f534..e23b9c7b4afeb 100644 ---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c -+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c -@@ -730,13 +730,10 @@ static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc, - */ - if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index) && - rstate->outputs == BIT(RCAR_DU_OUTPUT_DPAD0)) { -- struct rcar_du_encoder *encoder = -- rcdu->encoders[RCAR_DU_OUTPUT_LVDS0 + rcrtc->index]; -+ struct drm_bridge *bridge = rcdu->lvds[rcrtc->index]; - const struct drm_display_mode *mode = - &crtc->state->adjusted_mode; -- struct drm_bridge *bridge; - -- bridge = drm_bridge_chain_get_first_bridge(&encoder->base); - rcar_lvds_clk_enable(bridge, mode->clock * 1000); - } - -@@ -764,15 +761,12 @@ static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc, - - if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index) && - rstate->outputs == BIT(RCAR_DU_OUTPUT_DPAD0)) { -- struct rcar_du_encoder *encoder = -- rcdu->encoders[RCAR_DU_OUTPUT_LVDS0 + rcrtc->index]; -- struct drm_bridge *bridge; -+ struct drm_bridge *bridge = rcdu->lvds[rcrtc->index]; - - /* - * Disable the LVDS clock output, see - * rcar_du_crtc_atomic_enable(). - */ -- bridge = drm_bridge_chain_get_first_bridge(&encoder->base); - rcar_lvds_clk_disable(bridge); - } - -diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h -index 61504c54e2ecf..3597a179bfb78 100644 ---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h -+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h -@@ -20,10 +20,10 @@ - - struct clk; - struct device; -+struct drm_bridge; - struct drm_device; - struct drm_property; - struct rcar_du_device; --struct rcar_du_encoder; - - #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK BIT(0) /* Per-CRTC IRQ and clock */ - #define RCAR_DU_FEATURE_VSP1_SOURCE BIT(1) /* Has inputs from VSP1 */ -@@ -71,6 +71,7 @@ struct rcar_du_device_info { - #define RCAR_DU_MAX_CRTCS 4 - #define RCAR_DU_MAX_GROUPS DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2) - #define RCAR_DU_MAX_VSPS 4 -+#define RCAR_DU_MAX_LVDS 2 - - struct rcar_du_device { - struct device *dev; -@@ -83,11 +84,10 @@ struct rcar_du_device { - struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS]; - unsigned int num_crtcs; - -- struct rcar_du_encoder *encoders[RCAR_DU_OUTPUT_MAX]; -- - struct rcar_du_group groups[RCAR_DU_MAX_GROUPS]; - struct platform_device *cmms[RCAR_DU_MAX_CRTCS]; - struct rcar_du_vsp vsps[RCAR_DU_MAX_VSPS]; -+ struct drm_bridge *lvds[RCAR_DU_MAX_LVDS]; - - struct { - struct drm_property *colorkey; -diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c -index b0335da0c1614..50fc14534fa4d 100644 ---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c -+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c -@@ -57,7 +57,6 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu, - if (renc == NULL) - return -ENOMEM; - -- rcdu->encoders[output] = renc; - renc->output = output; - encoder = rcar_encoder_to_drm_encoder(renc); - -@@ -91,6 +90,10 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu, - ret = -EPROBE_DEFER; - goto done; - } -+ -+ if (output == RCAR_DU_OUTPUT_LVDS0 || -+ output == RCAR_DU_OUTPUT_LVDS1) -+ rcdu->lvds[output - RCAR_DU_OUTPUT_LVDS0] = bridge; - } - - /* -diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c -index 72dda446355fe..7015e22872bbe 100644 ---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c -+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c -@@ -700,10 +700,10 @@ static int rcar_du_cmm_init(struct rcar_du_device *rcdu) - int ret; - - cmm = of_parse_phandle(np, "renesas,cmms", i); -- if (IS_ERR(cmm)) { -+ if (!cmm) { - dev_err(rcdu->dev, - "Failed to parse 'renesas,cmms' property\n"); -- return PTR_ERR(cmm); -+ return -EINVAL; - } - - if (!of_device_is_available(cmm)) { -@@ -713,10 +713,10 @@ static int rcar_du_cmm_init(struct rcar_du_device *rcdu) - } - - pdev = of_find_device_by_node(cmm); -- if (IS_ERR(pdev)) { -+ if (!pdev) { - dev_err(rcdu->dev, "No device found for CMM%u\n", i); - of_node_put(cmm); -- return PTR_ERR(pdev); -+ return -EINVAL; - } - - of_node_put(cmm); -diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -index 4a2099cb582e1..857d97cdc67c6 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -@@ -17,9 +17,20 @@ - - #define NUM_YUV2YUV_COEFFICIENTS 12 - -+/* AFBC supports a number of configurable modes. Relevant to us is block size -+ * (16x16 or 32x8), storage modifiers (SPARSE, SPLIT), and the YUV-like -+ * colourspace transform (YTR). 16x16 SPARSE mode is always used. SPLIT mode -+ * could be enabled via the hreg_block_split register, but is not currently -+ * handled. The colourspace transform is implicitly always assumed by the -+ * decoder, so consumers must use this transform as well. -+ * -+ * Failure to match modifiers will cause errors displaying AFBC buffers -+ * produced by conformant AFBC producers, including Mesa. -+ */ - #define ROCKCHIP_AFBC_MOD \ - DRM_FORMAT_MOD_ARM_AFBC( \ - AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | AFBC_FORMAT_MOD_SPARSE \ -+ | AFBC_FORMAT_MOD_YTR \ - ) - - enum vop_data_format { -diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c -index b498d474ef9e4..864e423d6d2ba 100644 ---- a/drivers/gpu/drm/scheduler/sched_main.c -+++ b/drivers/gpu/drm/scheduler/sched_main.c -@@ -891,6 +891,9 @@ void drm_sched_fini(struct drm_gpu_scheduler *sched) - if (sched->thread) - kthread_stop(sched->thread); - -+ /* Confirm no work left behind accessing device structures */ -+ cancel_delayed_work_sync(&sched->work_tdr); -+ - sched->ready = false; - } - EXPORT_SYMBOL(drm_sched_fini); -diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c -index 1e643bc7e786a..9f06dec0fc61d 100644 ---- a/drivers/gpu/drm/sun4i/sun4i_tcon.c -+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c -@@ -569,30 +569,13 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, - if (info->bus_flags & DRM_BUS_FLAG_DE_LOW) - val |= SUN4I_TCON0_IO_POL_DE_NEGATIVE; - -- /* -- * On A20 and similar SoCs, the only way to achieve Positive Edge -- * (Rising Edge), is setting dclk clock phase to 2/3(240°). -- * By default TCON works in Negative Edge(Falling Edge), -- * this is why phase is set to 0 in that case. -- * Unfortunately there's no way to logically invert dclk through -- * IO_POL register. -- * The only acceptable way to work, triple checked with scope, -- * is using clock phase set to 0° for Negative Edge and set to 240° -- * for Positive Edge. -- * On A33 and similar SoCs there would be a 90° phase option, -- * but it divides also dclk by 2. -- * Following code is a way to avoid quirks all around TCON -- * and DOTCLOCK drivers. -- */ -- if (info->bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE) -- clk_set_phase(tcon->dclk, 240); -- - if (info->bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) -- clk_set_phase(tcon->dclk, 0); -+ val |= SUN4I_TCON0_IO_POL_DCLK_DRIVE_NEGEDGE; - - regmap_update_bits(tcon->regs, SUN4I_TCON0_IO_POL_REG, - SUN4I_TCON0_IO_POL_HSYNC_POSITIVE | - SUN4I_TCON0_IO_POL_VSYNC_POSITIVE | -+ SUN4I_TCON0_IO_POL_DCLK_DRIVE_NEGEDGE | - SUN4I_TCON0_IO_POL_DE_NEGATIVE, - val); - -diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h -index ee555318e3c2f..e624f6977eb84 100644 ---- a/drivers/gpu/drm/sun4i/sun4i_tcon.h -+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h -@@ -113,6 +113,7 @@ - #define SUN4I_TCON0_IO_POL_REG 0x88 - #define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase) ((phase & 3) << 28) - #define SUN4I_TCON0_IO_POL_DE_NEGATIVE BIT(27) -+#define SUN4I_TCON0_IO_POL_DCLK_DRIVE_NEGEDGE BIT(26) - #define SUN4I_TCON0_IO_POL_HSYNC_POSITIVE BIT(25) - #define SUN4I_TCON0_IO_POL_VSYNC_POSITIVE BIT(24) - -diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c -index 85dd7131553af..0ae3a025efe9d 100644 ---- a/drivers/gpu/drm/tegra/dc.c -+++ b/drivers/gpu/drm/tegra/dc.c -@@ -2186,7 +2186,7 @@ static int tegra_dc_runtime_resume(struct host1x_client *client) - struct device *dev = client->dev; - int err; - -- err = pm_runtime_get_sync(dev); -+ err = pm_runtime_resume_and_get(dev); - if (err < 0) { - dev_err(dev, "failed to get runtime PM: %d\n", err); - return err; -diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c -index 5691ef1b0e586..f46d377f0c304 100644 ---- a/drivers/gpu/drm/tegra/dsi.c -+++ b/drivers/gpu/drm/tegra/dsi.c -@@ -1111,7 +1111,7 @@ static int tegra_dsi_runtime_resume(struct host1x_client *client) - struct device *dev = client->dev; - int err; - -- err = pm_runtime_get_sync(dev); -+ err = pm_runtime_resume_and_get(dev); - if (err < 0) { - dev_err(dev, "failed to get runtime PM: %d\n", err); - return err; -diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c -index d09a24931c87c..e5d2a40260288 100644 ---- a/drivers/gpu/drm/tegra/hdmi.c -+++ b/drivers/gpu/drm/tegra/hdmi.c -@@ -1510,7 +1510,7 @@ static int tegra_hdmi_runtime_resume(struct host1x_client *client) - struct device *dev = client->dev; - int err; - -- err = pm_runtime_get_sync(dev); -+ err = pm_runtime_resume_and_get(dev); - if (err < 0) { - dev_err(dev, "failed to get runtime PM: %d\n", err); - return err; -diff --git a/drivers/gpu/drm/tegra/hub.c b/drivers/gpu/drm/tegra/hub.c -index 22a03f7ffdc12..5ce771cba1335 100644 ---- a/drivers/gpu/drm/tegra/hub.c -+++ b/drivers/gpu/drm/tegra/hub.c -@@ -789,7 +789,7 @@ static int tegra_display_hub_runtime_resume(struct host1x_client *client) - unsigned int i; - int err; - -- err = pm_runtime_get_sync(dev); -+ err = pm_runtime_resume_and_get(dev); - if (err < 0) { - dev_err(dev, "failed to get runtime PM: %d\n", err); - return err; -diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c -index cc2aa2308a515..f02a035dda453 100644 ---- a/drivers/gpu/drm/tegra/sor.c -+++ b/drivers/gpu/drm/tegra/sor.c -@@ -3218,7 +3218,7 @@ static int tegra_sor_runtime_resume(struct host1x_client *client) - struct device *dev = client->dev; - int err; - -- err = pm_runtime_get_sync(dev); -+ err = pm_runtime_resume_and_get(dev); - if (err < 0) { - dev_err(dev, "failed to get runtime PM: %d\n", err); - return err; -diff --git a/drivers/gpu/drm/tegra/vic.c b/drivers/gpu/drm/tegra/vic.c -index ade56b860cf9d..b77f726303d89 100644 ---- a/drivers/gpu/drm/tegra/vic.c -+++ b/drivers/gpu/drm/tegra/vic.c -@@ -314,7 +314,7 @@ static int vic_open_channel(struct tegra_drm_client *client, - struct vic *vic = to_vic(client); - int err; - -- err = pm_runtime_get_sync(vic->dev); -+ err = pm_runtime_resume_and_get(vic->dev); - if (err < 0) - return err; - -diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c -index 9a03c7834b1ed..22073e77fdf9a 100644 ---- a/drivers/gpu/drm/ttm/ttm_bo.c -+++ b/drivers/gpu/drm/ttm/ttm_bo.c -@@ -967,8 +967,10 @@ static int ttm_bo_bounce_temp_buffer(struct ttm_buffer_object *bo, - return ret; - /* move to the bounce domain */ - ret = ttm_bo_handle_move_mem(bo, &hop_mem, false, ctx, NULL); -- if (ret) -+ if (ret) { -+ ttm_resource_free(bo, &hop_mem); - return ret; -+ } - return 0; - } - -@@ -1000,18 +1002,19 @@ static int ttm_bo_move_buffer(struct ttm_buffer_object *bo, - * stop and the driver will be called to make - * the second hop. - */ --bounce: - ret = ttm_bo_mem_space(bo, placement, &mem, ctx); - if (ret) - return ret; -+bounce: - ret = ttm_bo_handle_move_mem(bo, &mem, false, ctx, &hop); - if (ret == -EMULTIHOP) { - ret = ttm_bo_bounce_temp_buffer(bo, &mem, ctx, &hop); - if (ret) -- return ret; -+ goto out; - /* try and move to final place now. */ - goto bounce; - } -+out: - if (ret) - ttm_resource_free(bo, &mem); - return ret; -diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c -index 98cab0bbe92d8..a9f494590c578 100644 ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -119,24 +119,57 @@ static void vc5_hdmi_reset(struct vc4_hdmi *vc4_hdmi) - HDMI_READ(HDMI_CLOCK_STOP) | VC4_DVP_HT_CLOCK_STOP_PIXEL); - } - -+#ifdef CONFIG_DRM_VC4_HDMI_CEC -+static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi *vc4_hdmi) -+{ -+ u16 clk_cnt; -+ u32 value; -+ -+ value = HDMI_READ(HDMI_CEC_CNTRL_1); -+ value &= ~VC4_HDMI_CEC_DIV_CLK_CNT_MASK; -+ -+ /* -+ * Set the clock divider: the hsm_clock rate and this divider -+ * setting will give a 40 kHz CEC clock. -+ */ -+ clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / CEC_CLOCK_FREQ; -+ value |= clk_cnt << VC4_HDMI_CEC_DIV_CLK_CNT_SHIFT; -+ HDMI_WRITE(HDMI_CEC_CNTRL_1, value); -+} -+#else -+static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi *vc4_hdmi) {} -+#endif -+ - static enum drm_connector_status - vc4_hdmi_connector_detect(struct drm_connector *connector, bool force) - { - struct vc4_hdmi *vc4_hdmi = connector_to_vc4_hdmi(connector); -+ bool connected = false; - - if (vc4_hdmi->hpd_gpio) { - if (gpio_get_value_cansleep(vc4_hdmi->hpd_gpio) ^ - vc4_hdmi->hpd_active_low) -- return connector_status_connected; -- cec_phys_addr_invalidate(vc4_hdmi->cec_adap); -- return connector_status_disconnected; -+ connected = true; -+ } else if (drm_probe_ddc(vc4_hdmi->ddc)) { -+ connected = true; -+ } else if (HDMI_READ(HDMI_HOTPLUG) & VC4_HDMI_HOTPLUG_CONNECTED) { -+ connected = true; - } - -- if (drm_probe_ddc(vc4_hdmi->ddc)) -- return connector_status_connected; -+ if (connected) { -+ if (connector->status != connector_status_connected) { -+ struct edid *edid = drm_get_edid(connector, vc4_hdmi->ddc); -+ -+ if (edid) { -+ cec_s_phys_addr_from_edid(vc4_hdmi->cec_adap, edid); -+ vc4_hdmi->encoder.hdmi_monitor = drm_detect_hdmi_monitor(edid); -+ kfree(edid); -+ } -+ } - -- if (HDMI_READ(HDMI_HOTPLUG) & VC4_HDMI_HOTPLUG_CONNECTED) - return connector_status_connected; -+ } -+ - cec_phys_addr_invalidate(vc4_hdmi->cec_adap); - return connector_status_disconnected; - } -@@ -639,6 +672,8 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder) - return; - } - -+ vc4_hdmi_cec_update_clk_div(vc4_hdmi); -+ - /* - * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup - * at 300MHz. -@@ -660,9 +695,6 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder) - return; - } - -- if (vc4_hdmi->variant->reset) -- vc4_hdmi->variant->reset(vc4_hdmi); -- - if (vc4_hdmi->variant->phy_init) - vc4_hdmi->variant->phy_init(vc4_hdmi, mode); - -@@ -790,6 +822,9 @@ static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder, - pixel_rate = mode->clock * 1000; - } - -+ if (mode->flags & DRM_MODE_FLAG_DBLCLK) -+ pixel_rate = pixel_rate * 2; -+ - if (pixel_rate > vc4_hdmi->variant->max_pixel_clock) - return -EINVAL; - -@@ -1312,13 +1347,20 @@ static irqreturn_t vc4_cec_irq_handler_thread(int irq, void *priv) - - static void vc4_cec_read_msg(struct vc4_hdmi *vc4_hdmi, u32 cntrl1) - { -+ struct drm_device *dev = vc4_hdmi->connector.dev; - struct cec_msg *msg = &vc4_hdmi->cec_rx_msg; - unsigned int i; - - msg->len = 1 + ((cntrl1 & VC4_HDMI_CEC_REC_WRD_CNT_MASK) >> - VC4_HDMI_CEC_REC_WRD_CNT_SHIFT); -+ -+ if (msg->len > 16) { -+ drm_err(dev, "Attempting to read too much data (%d)\n", msg->len); -+ return; -+ } -+ - for (i = 0; i < msg->len; i += 4) { -- u32 val = HDMI_READ(HDMI_CEC_RX_DATA_1 + i); -+ u32 val = HDMI_READ(HDMI_CEC_RX_DATA_1 + (i >> 2)); - - msg->msg[i] = val & 0xff; - msg->msg[i + 1] = (val >> 8) & 0xff; -@@ -1411,11 +1453,17 @@ static int vc4_hdmi_cec_adap_transmit(struct cec_adapter *adap, u8 attempts, - u32 signal_free_time, struct cec_msg *msg) - { - struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap); -+ struct drm_device *dev = vc4_hdmi->connector.dev; - u32 val; - unsigned int i; - -+ if (msg->len > 16) { -+ drm_err(dev, "Attempting to transmit too much data (%d)\n", msg->len); -+ return -ENOMEM; -+ } -+ - for (i = 0; i < msg->len; i += 4) -- HDMI_WRITE(HDMI_CEC_TX_DATA_1 + i, -+ HDMI_WRITE(HDMI_CEC_TX_DATA_1 + (i >> 2), - (msg->msg[i]) | - (msg->msg[i + 1] << 8) | - (msg->msg[i + 2] << 16) | -@@ -1460,16 +1508,14 @@ static int vc4_hdmi_cec_init(struct vc4_hdmi *vc4_hdmi) - cec_s_conn_info(vc4_hdmi->cec_adap, &conn_info); - - HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, 0xffffffff); -+ - value = HDMI_READ(HDMI_CEC_CNTRL_1); -- value &= ~VC4_HDMI_CEC_DIV_CLK_CNT_MASK; -- /* -- * Set the logical address to Unregistered and set the clock -- * divider: the hsm_clock rate and this divider setting will -- * give a 40 kHz CEC clock. -- */ -- value |= VC4_HDMI_CEC_ADDR_MASK | -- (4091 << VC4_HDMI_CEC_DIV_CLK_CNT_SHIFT); -+ /* Set the logical address to Unregistered */ -+ value |= VC4_HDMI_CEC_ADDR_MASK; - HDMI_WRITE(HDMI_CEC_CNTRL_1, value); -+ -+ vc4_hdmi_cec_update_clk_div(vc4_hdmi); -+ - ret = devm_request_threaded_irq(&pdev->dev, platform_get_irq(pdev, 0), - vc4_cec_irq_handler, - vc4_cec_irq_handler_thread, 0, -@@ -1740,6 +1786,9 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) - vc4_hdmi->disable_wifi_frequencies = - of_property_read_bool(dev->of_node, "wifi-2.4ghz-coexistence"); - -+ if (vc4_hdmi->variant->reset) -+ vc4_hdmi->variant->reset(vc4_hdmi); -+ - pm_runtime_enable(dev); - - drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); -diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h -index 96d764ebfe675..5379c36f09923 100644 ---- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h -@@ -29,6 +29,7 @@ enum vc4_hdmi_field { - HDMI_CEC_CPU_MASK_SET, - HDMI_CEC_CPU_MASK_STATUS, - HDMI_CEC_CPU_STATUS, -+ HDMI_CEC_CPU_SET, - - /* - * Transmit data, first byte is low byte of the 32-bit reg. -@@ -196,9 +197,10 @@ static const struct vc4_hdmi_register __maybe_unused vc4_hdmi_fields[] = { - VC4_HDMI_REG(HDMI_TX_PHY_RESET_CTL, 0x02c0), - VC4_HDMI_REG(HDMI_TX_PHY_CTL_0, 0x02c4), - VC4_HDMI_REG(HDMI_CEC_CPU_STATUS, 0x0340), -+ VC4_HDMI_REG(HDMI_CEC_CPU_SET, 0x0344), - VC4_HDMI_REG(HDMI_CEC_CPU_CLEAR, 0x0348), - VC4_HDMI_REG(HDMI_CEC_CPU_MASK_STATUS, 0x034c), -- VC4_HDMI_REG(HDMI_CEC_CPU_MASK_SET, 0x034c), -+ VC4_HDMI_REG(HDMI_CEC_CPU_MASK_SET, 0x0350), - VC4_HDMI_REG(HDMI_CEC_CPU_MASK_CLEAR, 0x0354), - VC4_HDMI_REG(HDMI_RAM_PACKET_START, 0x0400), - }; -diff --git a/drivers/gpu/drm/virtio/virtgpu_gem.c b/drivers/gpu/drm/virtio/virtgpu_gem.c -index c30c75ee83fce..8502400b2f9c9 100644 ---- a/drivers/gpu/drm/virtio/virtgpu_gem.c -+++ b/drivers/gpu/drm/virtio/virtgpu_gem.c -@@ -39,9 +39,6 @@ static int virtio_gpu_gem_create(struct drm_file *file, - int ret; - u32 handle; - -- if (vgdev->has_virgl_3d) -- virtio_gpu_create_context(dev, file); -- - ret = virtio_gpu_object_create(vgdev, params, &obj, NULL); - if (ret < 0) - return ret; -@@ -119,6 +116,11 @@ int virtio_gpu_gem_object_open(struct drm_gem_object *obj, - if (!vgdev->has_virgl_3d) - goto out_notify; - -+ /* the context might still be missing when the first ioctl is -+ * DRM_IOCTL_MODE_CREATE_DUMB or DRM_IOCTL_PRIME_FD_TO_HANDLE -+ */ -+ virtio_gpu_create_context(obj->dev, file); -+ - objs = virtio_gpu_array_alloc(1); - if (!objs) - return -ENOMEM; -diff --git a/drivers/gpu/drm/virtio/virtgpu_kms.c b/drivers/gpu/drm/virtio/virtgpu_kms.c -index b4ec479c32cda..b375394193be8 100644 ---- a/drivers/gpu/drm/virtio/virtgpu_kms.c -+++ b/drivers/gpu/drm/virtio/virtgpu_kms.c -@@ -163,6 +163,7 @@ int virtio_gpu_init(struct drm_device *dev) - vgdev->host_visible_region.len, - dev_name(&vgdev->vdev->dev))) { - DRM_ERROR("Could not reserve host visible region\n"); -+ ret = -EBUSY; - goto err_vqs; - } - -diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c -index 8a8b2b982f83c..097cb1ee31268 100644 ---- a/drivers/hid/hid-core.c -+++ b/drivers/hid/hid-core.c -@@ -1307,6 +1307,9 @@ EXPORT_SYMBOL_GPL(hid_open_report); - - static s32 snto32(__u32 value, unsigned n) - { -+ if (!value || !n) -+ return 0; -+ - switch (n) { - case 8: return ((__s8)value); - case 16: return ((__s16)value); -diff --git a/drivers/hid/hid-logitech-dj.c b/drivers/hid/hid-logitech-dj.c -index 45e7e0bdd382b..fcdc922bc9733 100644 ---- a/drivers/hid/hid-logitech-dj.c -+++ b/drivers/hid/hid-logitech-dj.c -@@ -980,6 +980,7 @@ static void logi_hidpp_recv_queue_notif(struct hid_device *hdev, - case 0x07: - device_type = "eQUAD step 4 Gaming"; - logi_hidpp_dev_conn_notif_equad(hdev, hidpp_report, &workitem); -+ workitem.reports_supported |= STD_KEYBOARD; - break; - case 0x08: - device_type = "eQUAD step 4 for gamepads"; -diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c -index 1bd0eb71559ca..44d715c12f6ab 100644 ---- a/drivers/hid/wacom_wac.c -+++ b/drivers/hid/wacom_wac.c -@@ -2600,7 +2600,12 @@ static void wacom_wac_finger_event(struct hid_device *hdev, - wacom_wac->is_invalid_bt_frame = !value; - return; - case HID_DG_CONTACTMAX: -- features->touch_max = value; -+ if (!features->touch_max) { -+ features->touch_max = value; -+ } else { -+ hid_warn(hdev, "%s: ignoring attempt to overwrite non-zero touch_max " -+ "%d -> %d\n", __func__, features->touch_max, value); -+ } - return; - } - -diff --git a/drivers/hsi/controllers/omap_ssi_core.c b/drivers/hsi/controllers/omap_ssi_core.c -index 7596dc1646484..44a3f5660c109 100644 ---- a/drivers/hsi/controllers/omap_ssi_core.c -+++ b/drivers/hsi/controllers/omap_ssi_core.c -@@ -424,7 +424,7 @@ static int ssi_hw_init(struct hsi_controller *ssi) - struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); - int err; - -- err = pm_runtime_get_sync(ssi->device.parent); -+ err = pm_runtime_resume_and_get(ssi->device.parent); - if (err < 0) { - dev_err(&ssi->device, "runtime PM failed %d\n", err); - return err; -diff --git a/drivers/hv/channel_mgmt.c b/drivers/hv/channel_mgmt.c -index 1d44bb635bb84..6be9f56cb6270 100644 ---- a/drivers/hv/channel_mgmt.c -+++ b/drivers/hv/channel_mgmt.c -@@ -1102,8 +1102,7 @@ static void vmbus_onoffer_rescind(struct vmbus_channel_message_header *hdr) - vmbus_device_unregister(channel->device_obj); - put_device(dev); - } -- } -- if (channel->primary_channel != NULL) { -+ } else if (channel->primary_channel != NULL) { - /* - * Sub-channel is being rescinded. Following is the channel - * close sequence when initiated from the driveri (refer to -diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c -index b20b6ff17cf65..578d4628d9183 100644 ---- a/drivers/hwtracing/coresight/coresight-etm4x-core.c -+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c -@@ -226,7 +226,8 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) - writel_relaxed(0x0, drvdata->base + TRCAUXCTLR); - writel_relaxed(config->eventctrl0, drvdata->base + TRCEVENTCTL0R); - writel_relaxed(config->eventctrl1, drvdata->base + TRCEVENTCTL1R); -- writel_relaxed(config->stall_ctrl, drvdata->base + TRCSTALLCTLR); -+ if (drvdata->stallctl) -+ writel_relaxed(config->stall_ctrl, drvdata->base + TRCSTALLCTLR); - writel_relaxed(config->ts_ctrl, drvdata->base + TRCTSCTLR); - writel_relaxed(config->syncfreq, drvdata->base + TRCSYNCPR); - writel_relaxed(config->ccctlr, drvdata->base + TRCCCCTLR); -@@ -1288,7 +1289,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) - state->trcauxctlr = readl(drvdata->base + TRCAUXCTLR); - state->trceventctl0r = readl(drvdata->base + TRCEVENTCTL0R); - state->trceventctl1r = readl(drvdata->base + TRCEVENTCTL1R); -- state->trcstallctlr = readl(drvdata->base + TRCSTALLCTLR); -+ if (drvdata->stallctl) -+ state->trcstallctlr = readl(drvdata->base + TRCSTALLCTLR); - state->trctsctlr = readl(drvdata->base + TRCTSCTLR); - state->trcsyncpr = readl(drvdata->base + TRCSYNCPR); - state->trcccctlr = readl(drvdata->base + TRCCCCTLR); -@@ -1355,7 +1357,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) - - state->trcclaimset = readl(drvdata->base + TRCCLAIMCLR); - -- state->trcpdcr = readl(drvdata->base + TRCPDCR); -+ if (!drvdata->skip_power_up) -+ state->trcpdcr = readl(drvdata->base + TRCPDCR); - - /* wait for TRCSTATR.IDLE to go up */ - if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1)) { -@@ -1373,9 +1376,9 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) - * potentially save power on systems that respect the TRCPDCR_PU - * despite requesting software to save/restore state. - */ -- writel_relaxed((state->trcpdcr & ~TRCPDCR_PU), -- drvdata->base + TRCPDCR); -- -+ if (!drvdata->skip_power_up) -+ writel_relaxed((state->trcpdcr & ~TRCPDCR_PU), -+ drvdata->base + TRCPDCR); - out: - CS_LOCK(drvdata->base); - return ret; -@@ -1397,7 +1400,8 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) - writel_relaxed(state->trcauxctlr, drvdata->base + TRCAUXCTLR); - writel_relaxed(state->trceventctl0r, drvdata->base + TRCEVENTCTL0R); - writel_relaxed(state->trceventctl1r, drvdata->base + TRCEVENTCTL1R); -- writel_relaxed(state->trcstallctlr, drvdata->base + TRCSTALLCTLR); -+ if (drvdata->stallctl) -+ writel_relaxed(state->trcstallctlr, drvdata->base + TRCSTALLCTLR); - writel_relaxed(state->trctsctlr, drvdata->base + TRCTSCTLR); - writel_relaxed(state->trcsyncpr, drvdata->base + TRCSYNCPR); - writel_relaxed(state->trcccctlr, drvdata->base + TRCCCCTLR); -@@ -1469,7 +1473,8 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) - - writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET); - -- writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR); -+ if (!drvdata->skip_power_up) -+ writel_relaxed(state->trcpdcr, drvdata->base + TRCPDCR); - - drvdata->state_needs_restore = false; - -diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c -index 989ce7b8ade7c..4682f26139961 100644 ---- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c -+++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c -@@ -389,7 +389,7 @@ static ssize_t mode_store(struct device *dev, - config->eventctrl1 &= ~BIT(12); - - /* bit[8], Instruction stall bit */ -- if (config->mode & ETM_MODE_ISTALL_EN) -+ if ((config->mode & ETM_MODE_ISTALL_EN) && (drvdata->stallctl == true)) - config->stall_ctrl |= BIT(8); - else - config->stall_ctrl &= ~BIT(8); -diff --git a/drivers/i2c/busses/i2c-bcm-iproc.c b/drivers/i2c/busses/i2c-bcm-iproc.c -index d8295b1c379d1..35baca2f62c4e 100644 ---- a/drivers/i2c/busses/i2c-bcm-iproc.c -+++ b/drivers/i2c/busses/i2c-bcm-iproc.c -@@ -159,6 +159,11 @@ - - #define IE_S_ALL_INTERRUPT_SHIFT 21 - #define IE_S_ALL_INTERRUPT_MASK 0x3f -+/* -+ * It takes ~18us to reading 10bytes of data, hence to keep tasklet -+ * running for less time, max slave read per tasklet is set to 10 bytes. -+ */ -+#define MAX_SLAVE_RX_PER_INT 10 - - enum i2c_slave_read_status { - I2C_SLAVE_RX_FIFO_EMPTY = 0, -@@ -205,8 +210,18 @@ struct bcm_iproc_i2c_dev { - /* bytes that have been read */ - unsigned int rx_bytes; - unsigned int thld_bytes; -+ -+ bool slave_rx_only; -+ bool rx_start_rcvd; -+ bool slave_read_complete; -+ u32 tx_underrun; -+ u32 slave_int_mask; -+ struct tasklet_struct slave_rx_tasklet; - }; - -+/* tasklet to process slave rx data */ -+static void slave_rx_tasklet_fn(unsigned long); -+ - /* - * Can be expanded in the future if more interrupt status bits are utilized - */ -@@ -215,7 +230,8 @@ struct bcm_iproc_i2c_dev { - - #define ISR_MASK_SLAVE (BIT(IS_S_START_BUSY_SHIFT)\ - | BIT(IS_S_RX_EVENT_SHIFT) | BIT(IS_S_RD_EVENT_SHIFT)\ -- | BIT(IS_S_TX_UNDERRUN_SHIFT)) -+ | BIT(IS_S_TX_UNDERRUN_SHIFT) | BIT(IS_S_RX_FIFO_FULL_SHIFT)\ -+ | BIT(IS_S_RX_THLD_SHIFT)) - - static int bcm_iproc_i2c_reg_slave(struct i2c_client *slave); - static int bcm_iproc_i2c_unreg_slave(struct i2c_client *slave); -@@ -259,6 +275,7 @@ static void bcm_iproc_i2c_slave_init( - { - u32 val; - -+ iproc_i2c->tx_underrun = 0; - if (need_reset) { - /* put controller in reset */ - val = iproc_i2c_rd_reg(iproc_i2c, CFG_OFFSET); -@@ -295,8 +312,11 @@ static void bcm_iproc_i2c_slave_init( - - /* Enable interrupt register to indicate a valid byte in receive fifo */ - val = BIT(IE_S_RX_EVENT_SHIFT); -+ /* Enable interrupt register to indicate a Master read transaction */ -+ val |= BIT(IE_S_RD_EVENT_SHIFT); - /* Enable interrupt register for the Slave BUSY command */ - val |= BIT(IE_S_START_BUSY_SHIFT); -+ iproc_i2c->slave_int_mask = val; - iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val); - } - -@@ -321,76 +341,176 @@ static void bcm_iproc_i2c_check_slave_status( - } - } - --static bool bcm_iproc_i2c_slave_isr(struct bcm_iproc_i2c_dev *iproc_i2c, -- u32 status) -+static void bcm_iproc_i2c_slave_read(struct bcm_iproc_i2c_dev *iproc_i2c) - { -+ u8 rx_data, rx_status; -+ u32 rx_bytes = 0; - u32 val; -- u8 value, rx_status; - -- /* Slave RX byte receive */ -- if (status & BIT(IS_S_RX_EVENT_SHIFT)) { -+ while (rx_bytes < MAX_SLAVE_RX_PER_INT) { - val = iproc_i2c_rd_reg(iproc_i2c, S_RX_OFFSET); - rx_status = (val >> S_RX_STATUS_SHIFT) & S_RX_STATUS_MASK; -+ rx_data = ((val >> S_RX_DATA_SHIFT) & S_RX_DATA_MASK); -+ - if (rx_status == I2C_SLAVE_RX_START) { -- /* Start of SMBUS for Master write */ -+ /* Start of SMBUS Master write */ - i2c_slave_event(iproc_i2c->slave, -- I2C_SLAVE_WRITE_REQUESTED, &value); -- -- val = iproc_i2c_rd_reg(iproc_i2c, S_RX_OFFSET); -- value = (u8)((val >> S_RX_DATA_SHIFT) & S_RX_DATA_MASK); -+ I2C_SLAVE_WRITE_REQUESTED, &rx_data); -+ iproc_i2c->rx_start_rcvd = true; -+ iproc_i2c->slave_read_complete = false; -+ } else if (rx_status == I2C_SLAVE_RX_DATA && -+ iproc_i2c->rx_start_rcvd) { -+ /* Middle of SMBUS Master write */ - i2c_slave_event(iproc_i2c->slave, -- I2C_SLAVE_WRITE_RECEIVED, &value); -- } else if (status & BIT(IS_S_RD_EVENT_SHIFT)) { -- /* Start of SMBUS for Master Read */ -- i2c_slave_event(iproc_i2c->slave, -- I2C_SLAVE_READ_REQUESTED, &value); -- iproc_i2c_wr_reg(iproc_i2c, S_TX_OFFSET, value); -+ I2C_SLAVE_WRITE_RECEIVED, &rx_data); -+ } else if (rx_status == I2C_SLAVE_RX_END && -+ iproc_i2c->rx_start_rcvd) { -+ /* End of SMBUS Master write */ -+ if (iproc_i2c->slave_rx_only) -+ i2c_slave_event(iproc_i2c->slave, -+ I2C_SLAVE_WRITE_RECEIVED, -+ &rx_data); -+ -+ i2c_slave_event(iproc_i2c->slave, I2C_SLAVE_STOP, -+ &rx_data); -+ } else if (rx_status == I2C_SLAVE_RX_FIFO_EMPTY) { -+ iproc_i2c->rx_start_rcvd = false; -+ iproc_i2c->slave_read_complete = true; -+ break; -+ } - -- val = BIT(S_CMD_START_BUSY_SHIFT); -- iproc_i2c_wr_reg(iproc_i2c, S_CMD_OFFSET, val); -+ rx_bytes++; -+ } -+} - -- /* -- * Enable interrupt for TX FIFO becomes empty and -- * less than PKT_LENGTH bytes were output on the SMBUS -- */ -- val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET); -- val |= BIT(IE_S_TX_UNDERRUN_SHIFT); -- iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val); -- } else { -- /* Master write other than start */ -- value = (u8)((val >> S_RX_DATA_SHIFT) & S_RX_DATA_MASK); -+static void slave_rx_tasklet_fn(unsigned long data) -+{ -+ struct bcm_iproc_i2c_dev *iproc_i2c = (struct bcm_iproc_i2c_dev *)data; -+ u32 int_clr; -+ -+ bcm_iproc_i2c_slave_read(iproc_i2c); -+ -+ /* clear pending IS_S_RX_EVENT_SHIFT interrupt */ -+ int_clr = BIT(IS_S_RX_EVENT_SHIFT); -+ -+ if (!iproc_i2c->slave_rx_only && iproc_i2c->slave_read_complete) { -+ /* -+ * In case of single byte master-read request, -+ * IS_S_TX_UNDERRUN_SHIFT event is generated before -+ * IS_S_START_BUSY_SHIFT event. Hence start slave data send -+ * from first IS_S_TX_UNDERRUN_SHIFT event. -+ * -+ * This means don't send any data from slave when -+ * IS_S_RD_EVENT_SHIFT event is generated else it will increment -+ * eeprom or other backend slave driver read pointer twice. -+ */ -+ iproc_i2c->tx_underrun = 0; -+ iproc_i2c->slave_int_mask |= BIT(IE_S_TX_UNDERRUN_SHIFT); -+ -+ /* clear IS_S_RD_EVENT_SHIFT interrupt */ -+ int_clr |= BIT(IS_S_RD_EVENT_SHIFT); -+ } -+ -+ /* clear slave interrupt */ -+ iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, int_clr); -+ /* enable slave interrupts */ -+ iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, iproc_i2c->slave_int_mask); -+} -+ -+static bool bcm_iproc_i2c_slave_isr(struct bcm_iproc_i2c_dev *iproc_i2c, -+ u32 status) -+{ -+ u32 val; -+ u8 value; -+ -+ /* -+ * Slave events in case of master-write, master-write-read and, -+ * master-read -+ * -+ * Master-write : only IS_S_RX_EVENT_SHIFT event -+ * Master-write-read: both IS_S_RX_EVENT_SHIFT and IS_S_RD_EVENT_SHIFT -+ * events -+ * Master-read : both IS_S_RX_EVENT_SHIFT and IS_S_RD_EVENT_SHIFT -+ * events or only IS_S_RD_EVENT_SHIFT -+ */ -+ if (status & BIT(IS_S_RX_EVENT_SHIFT) || -+ status & BIT(IS_S_RD_EVENT_SHIFT)) { -+ /* disable slave interrupts */ -+ val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET); -+ val &= ~iproc_i2c->slave_int_mask; -+ iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val); -+ -+ if (status & BIT(IS_S_RD_EVENT_SHIFT)) -+ /* Master-write-read request */ -+ iproc_i2c->slave_rx_only = false; -+ else -+ /* Master-write request only */ -+ iproc_i2c->slave_rx_only = true; -+ -+ /* schedule tasklet to read data later */ -+ tasklet_schedule(&iproc_i2c->slave_rx_tasklet); -+ -+ /* clear only IS_S_RX_EVENT_SHIFT interrupt */ -+ iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, -+ BIT(IS_S_RX_EVENT_SHIFT)); -+ } -+ -+ if (status & BIT(IS_S_TX_UNDERRUN_SHIFT)) { -+ iproc_i2c->tx_underrun++; -+ if (iproc_i2c->tx_underrun == 1) -+ /* Start of SMBUS for Master Read */ - i2c_slave_event(iproc_i2c->slave, -- I2C_SLAVE_WRITE_RECEIVED, &value); -- if (rx_status == I2C_SLAVE_RX_END) -- i2c_slave_event(iproc_i2c->slave, -- I2C_SLAVE_STOP, &value); -- } -- } else if (status & BIT(IS_S_TX_UNDERRUN_SHIFT)) { -- /* Master read other than start */ -- i2c_slave_event(iproc_i2c->slave, -- I2C_SLAVE_READ_PROCESSED, &value); -+ I2C_SLAVE_READ_REQUESTED, -+ &value); -+ else -+ /* Master read other than start */ -+ i2c_slave_event(iproc_i2c->slave, -+ I2C_SLAVE_READ_PROCESSED, -+ &value); - - iproc_i2c_wr_reg(iproc_i2c, S_TX_OFFSET, value); -+ /* start transfer */ - val = BIT(S_CMD_START_BUSY_SHIFT); - iproc_i2c_wr_reg(iproc_i2c, S_CMD_OFFSET, val); -+ -+ /* clear interrupt */ -+ iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, -+ BIT(IS_S_TX_UNDERRUN_SHIFT)); - } - -- /* Stop */ -+ /* Stop received from master in case of master read transaction */ - if (status & BIT(IS_S_START_BUSY_SHIFT)) { -- i2c_slave_event(iproc_i2c->slave, I2C_SLAVE_STOP, &value); - /* - * Enable interrupt for TX FIFO becomes empty and - * less than PKT_LENGTH bytes were output on the SMBUS - */ -- val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET); -- val &= ~BIT(IE_S_TX_UNDERRUN_SHIFT); -- iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val); -+ iproc_i2c->slave_int_mask &= ~BIT(IE_S_TX_UNDERRUN_SHIFT); -+ iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, -+ iproc_i2c->slave_int_mask); -+ -+ /* End of SMBUS for Master Read */ -+ val = BIT(S_TX_WR_STATUS_SHIFT); -+ iproc_i2c_wr_reg(iproc_i2c, S_TX_OFFSET, val); -+ -+ val = BIT(S_CMD_START_BUSY_SHIFT); -+ iproc_i2c_wr_reg(iproc_i2c, S_CMD_OFFSET, val); -+ -+ /* flush TX FIFOs */ -+ val = iproc_i2c_rd_reg(iproc_i2c, S_FIFO_CTRL_OFFSET); -+ val |= (BIT(S_FIFO_TX_FLUSH_SHIFT)); -+ iproc_i2c_wr_reg(iproc_i2c, S_FIFO_CTRL_OFFSET, val); -+ -+ i2c_slave_event(iproc_i2c->slave, I2C_SLAVE_STOP, &value); -+ -+ /* clear interrupt */ -+ iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, -+ BIT(IS_S_START_BUSY_SHIFT)); - } - -- /* clear interrupt status */ -- iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, status); -+ /* check slave transmit status only if slave is transmitting */ -+ if (!iproc_i2c->slave_rx_only) -+ bcm_iproc_i2c_check_slave_status(iproc_i2c); - -- bcm_iproc_i2c_check_slave_status(iproc_i2c); - return true; - } - -@@ -505,12 +625,17 @@ static void bcm_iproc_i2c_process_m_event(struct bcm_iproc_i2c_dev *iproc_i2c, - static irqreturn_t bcm_iproc_i2c_isr(int irq, void *data) - { - struct bcm_iproc_i2c_dev *iproc_i2c = data; -- u32 status = iproc_i2c_rd_reg(iproc_i2c, IS_OFFSET); -+ u32 slave_status; -+ u32 status; - bool ret; -- u32 sl_status = status & ISR_MASK_SLAVE; - -- if (sl_status) { -- ret = bcm_iproc_i2c_slave_isr(iproc_i2c, sl_status); -+ status = iproc_i2c_rd_reg(iproc_i2c, IS_OFFSET); -+ /* process only slave interrupt which are enabled */ -+ slave_status = status & iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET) & -+ ISR_MASK_SLAVE; -+ -+ if (slave_status) { -+ ret = bcm_iproc_i2c_slave_isr(iproc_i2c, slave_status); - if (ret) - return IRQ_HANDLED; - else -@@ -1066,6 +1191,10 @@ static int bcm_iproc_i2c_reg_slave(struct i2c_client *slave) - return -EAFNOSUPPORT; - - iproc_i2c->slave = slave; -+ -+ tasklet_init(&iproc_i2c->slave_rx_tasklet, slave_rx_tasklet_fn, -+ (unsigned long)iproc_i2c); -+ - bcm_iproc_i2c_slave_init(iproc_i2c, false); - return 0; - } -@@ -1086,6 +1215,8 @@ static int bcm_iproc_i2c_unreg_slave(struct i2c_client *slave) - IE_S_ALL_INTERRUPT_SHIFT); - iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, tmp); - -+ tasklet_kill(&iproc_i2c->slave_rx_tasklet); -+ - /* Erase the slave address programmed */ - tmp = iproc_i2c_rd_reg(iproc_i2c, S_CFG_SMBUS_ADDR_OFFSET); - tmp &= ~BIT(S_CFG_EN_NIC_SMB_ADDR3_SHIFT); -diff --git a/drivers/i2c/busses/i2c-brcmstb.c b/drivers/i2c/busses/i2c-brcmstb.c -index d4e0a0f6732ae..ba766d24219ef 100644 ---- a/drivers/i2c/busses/i2c-brcmstb.c -+++ b/drivers/i2c/busses/i2c-brcmstb.c -@@ -316,7 +316,7 @@ static int brcmstb_send_i2c_cmd(struct brcmstb_i2c_dev *dev, - goto cmd_out; - } - -- if ((CMD_RD || CMD_WR) && -+ if ((cmd == CMD_RD || cmd == CMD_WR) && - bsc_readl(dev, iic_enable) & BSC_IIC_EN_NOACK_MASK) { - rc = -EREMOTEIO; - dev_dbg(dev->device, "controller received NOACK intr for %s\n", -diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c -index 20a9881a0d6cd..5ac30d95650cc 100644 ---- a/drivers/i2c/busses/i2c-exynos5.c -+++ b/drivers/i2c/busses/i2c-exynos5.c -@@ -606,6 +606,7 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop) - u32 i2c_ctl; - u32 int_en = 0; - u32 i2c_auto_conf = 0; -+ u32 i2c_addr = 0; - u32 fifo_ctl; - unsigned long flags; - unsigned short trig_lvl; -@@ -640,7 +641,12 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop) - int_en |= HSI2C_INT_TX_ALMOSTEMPTY_EN; - } - -- writel(HSI2C_SLV_ADDR_MAS(i2c->msg->addr), i2c->regs + HSI2C_ADDR); -+ i2c_addr = HSI2C_SLV_ADDR_MAS(i2c->msg->addr); -+ -+ if (i2c->op_clock >= I2C_MAX_FAST_MODE_PLUS_FREQ) -+ i2c_addr |= HSI2C_MASTER_ID(MASTER_ID(i2c->adap.nr)); -+ -+ writel(i2c_addr, i2c->regs + HSI2C_ADDR); - - writel(fifo_ctl, i2c->regs + HSI2C_FIFO_CTL); - writel(i2c_ctl, i2c->regs + HSI2C_CTL); -diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c -index 046d241183c58..214b4c913a139 100644 ---- a/drivers/i2c/busses/i2c-qcom-geni.c -+++ b/drivers/i2c/busses/i2c-qcom-geni.c -@@ -86,6 +86,9 @@ struct geni_i2c_dev { - u32 clk_freq_out; - const struct geni_i2c_clk_fld *clk_fld; - int suspended; -+ void *dma_buf; -+ size_t xfer_len; -+ dma_addr_t dma_addr; - }; - - struct geni_i2c_err_log { -@@ -348,14 +351,39 @@ static void geni_i2c_tx_fsm_rst(struct geni_i2c_dev *gi2c) - dev_err(gi2c->se.dev, "Timeout resetting TX_FSM\n"); - } - -+static void geni_i2c_rx_msg_cleanup(struct geni_i2c_dev *gi2c, -+ struct i2c_msg *cur) -+{ -+ gi2c->cur_rd = 0; -+ if (gi2c->dma_buf) { -+ if (gi2c->err) -+ geni_i2c_rx_fsm_rst(gi2c); -+ geni_se_rx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); -+ i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err); -+ } -+} -+ -+static void geni_i2c_tx_msg_cleanup(struct geni_i2c_dev *gi2c, -+ struct i2c_msg *cur) -+{ -+ gi2c->cur_wr = 0; -+ if (gi2c->dma_buf) { -+ if (gi2c->err) -+ geni_i2c_tx_fsm_rst(gi2c); -+ geni_se_tx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); -+ i2c_put_dma_safe_msg_buf(gi2c->dma_buf, cur, !gi2c->err); -+ } -+} -+ - static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, - u32 m_param) - { -- dma_addr_t rx_dma; -+ dma_addr_t rx_dma = 0; - unsigned long time_left; - void *dma_buf; - struct geni_se *se = &gi2c->se; - size_t len = msg->len; -+ struct i2c_msg *cur; - - dma_buf = i2c_get_dma_safe_msg_buf(msg, 32); - if (dma_buf) -@@ -370,19 +398,18 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, - geni_se_select_mode(se, GENI_SE_FIFO); - i2c_put_dma_safe_msg_buf(dma_buf, msg, false); - dma_buf = NULL; -+ } else { -+ gi2c->xfer_len = len; -+ gi2c->dma_addr = rx_dma; -+ gi2c->dma_buf = dma_buf; - } - -+ cur = gi2c->cur; - time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); - if (!time_left) - geni_i2c_abort_xfer(gi2c); - -- gi2c->cur_rd = 0; -- if (dma_buf) { -- if (gi2c->err) -- geni_i2c_rx_fsm_rst(gi2c); -- geni_se_rx_dma_unprep(se, rx_dma, len); -- i2c_put_dma_safe_msg_buf(dma_buf, msg, !gi2c->err); -- } -+ geni_i2c_rx_msg_cleanup(gi2c, cur); - - return gi2c->err; - } -@@ -390,11 +417,12 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, - static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, - u32 m_param) - { -- dma_addr_t tx_dma; -+ dma_addr_t tx_dma = 0; - unsigned long time_left; - void *dma_buf; - struct geni_se *se = &gi2c->se; - size_t len = msg->len; -+ struct i2c_msg *cur; - - dma_buf = i2c_get_dma_safe_msg_buf(msg, 32); - if (dma_buf) -@@ -409,22 +437,21 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, - geni_se_select_mode(se, GENI_SE_FIFO); - i2c_put_dma_safe_msg_buf(dma_buf, msg, false); - dma_buf = NULL; -+ } else { -+ gi2c->xfer_len = len; -+ gi2c->dma_addr = tx_dma; -+ gi2c->dma_buf = dma_buf; - } - - if (!dma_buf) /* Get FIFO IRQ */ - writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG); - -+ cur = gi2c->cur; - time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); - if (!time_left) - geni_i2c_abort_xfer(gi2c); - -- gi2c->cur_wr = 0; -- if (dma_buf) { -- if (gi2c->err) -- geni_i2c_tx_fsm_rst(gi2c); -- geni_se_tx_dma_unprep(se, tx_dma, len); -- i2c_put_dma_safe_msg_buf(dma_buf, msg, !gi2c->err); -- } -+ geni_i2c_tx_msg_cleanup(gi2c, cur); - - return gi2c->err; - } -diff --git a/drivers/i3c/master/Kconfig b/drivers/i3c/master/Kconfig -index e68f15f4b4d0c..afff0e2320f74 100644 ---- a/drivers/i3c/master/Kconfig -+++ b/drivers/i3c/master/Kconfig -@@ -25,6 +25,7 @@ config DW_I3C_MASTER - config MIPI_I3C_HCI - tristate "MIPI I3C Host Controller Interface driver (EXPERIMENTAL)" - depends on I3C -+ depends on HAS_IOMEM - help - Support for hardware following the MIPI Aliance's I3C Host Controller - Interface specification. -diff --git a/drivers/ide/falconide.c b/drivers/ide/falconide.c -index 77af4c1a3f38c..bb86d84558d9a 100644 ---- a/drivers/ide/falconide.c -+++ b/drivers/ide/falconide.c -@@ -164,6 +164,7 @@ static int __init falconide_init(struct platform_device *pdev) - if (rc) - goto err_free; - -+ platform_set_drvdata(pdev, host); - return 0; - err_free: - ide_host_free(host); -@@ -174,7 +175,7 @@ err: - - static int falconide_remove(struct platform_device *pdev) - { -- struct ide_host *host = dev_get_drvdata(&pdev->dev); -+ struct ide_host *host = platform_get_drvdata(pdev); - - ide_host_remove(host); - -diff --git a/drivers/infiniband/core/cm.c b/drivers/infiniband/core/cm.c -index 98165589c8ab6..be996dba040cc 100644 ---- a/drivers/infiniband/core/cm.c -+++ b/drivers/infiniband/core/cm.c -@@ -4333,7 +4333,7 @@ static int cm_add_one(struct ib_device *ib_device) - unsigned long flags; - int ret; - int count = 0; -- u8 i; -+ unsigned int i; - - cm_dev = kzalloc(struct_size(cm_dev, port, ib_device->phys_port_cnt), - GFP_KERNEL); -@@ -4345,7 +4345,7 @@ static int cm_add_one(struct ib_device *ib_device) - cm_dev->going_down = 0; - - set_bit(IB_MGMT_METHOD_SEND, reg_req.method_mask); -- for (i = 1; i <= ib_device->phys_port_cnt; i++) { -+ rdma_for_each_port (ib_device, i) { - if (!rdma_cap_ib_cm(ib_device, i)) - continue; - -@@ -4431,7 +4431,7 @@ static void cm_remove_one(struct ib_device *ib_device, void *client_data) - .clr_port_cap_mask = IB_PORT_CM_SUP - }; - unsigned long flags; -- int i; -+ unsigned int i; - - write_lock_irqsave(&cm.device_lock, flags); - list_del(&cm_dev->list); -@@ -4441,7 +4441,7 @@ static void cm_remove_one(struct ib_device *ib_device, void *client_data) - cm_dev->going_down = 1; - spin_unlock_irq(&cm.lock); - -- for (i = 1; i <= ib_device->phys_port_cnt; i++) { -+ rdma_for_each_port (ib_device, i) { - if (!rdma_cap_ib_cm(ib_device, i)) - continue; - -diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c -index c51b84b2d2f37..e3638f80e1d52 100644 ---- a/drivers/infiniband/core/cma.c -+++ b/drivers/infiniband/core/cma.c -@@ -352,7 +352,13 @@ struct ib_device *cma_get_ib_dev(struct cma_device *cma_dev) - - struct cma_multicast { - struct rdma_id_private *id_priv; -- struct ib_sa_multicast *sa_mc; -+ union { -+ struct ib_sa_multicast *sa_mc; -+ struct { -+ struct work_struct work; -+ struct rdma_cm_event event; -+ } iboe_join; -+ }; - struct list_head list; - void *context; - struct sockaddr_storage addr; -@@ -1823,6 +1829,8 @@ static void destroy_mc(struct rdma_id_private *id_priv, - cma_igmp_send(ndev, &mgid, false); - dev_put(ndev); - } -+ -+ cancel_work_sync(&mc->iboe_join.work); - } - kfree(mc); - } -@@ -2683,6 +2691,28 @@ static int cma_query_ib_route(struct rdma_id_private *id_priv, - return (id_priv->query_id < 0) ? id_priv->query_id : 0; - } - -+static void cma_iboe_join_work_handler(struct work_struct *work) -+{ -+ struct cma_multicast *mc = -+ container_of(work, struct cma_multicast, iboe_join.work); -+ struct rdma_cm_event *event = &mc->iboe_join.event; -+ struct rdma_id_private *id_priv = mc->id_priv; -+ int ret; -+ -+ mutex_lock(&id_priv->handler_mutex); -+ if (READ_ONCE(id_priv->state) == RDMA_CM_DESTROYING || -+ READ_ONCE(id_priv->state) == RDMA_CM_DEVICE_REMOVAL) -+ goto out_unlock; -+ -+ ret = cma_cm_event_handler(id_priv, event); -+ WARN_ON(ret); -+ -+out_unlock: -+ mutex_unlock(&id_priv->handler_mutex); -+ if (event->event == RDMA_CM_EVENT_MULTICAST_JOIN) -+ rdma_destroy_ah_attr(&event->param.ud.ah_attr); -+} -+ - static void cma_work_handler(struct work_struct *_work) - { - struct cma_work *work = container_of(_work, struct cma_work, work); -@@ -4478,10 +4508,7 @@ static int cma_ib_mc_handler(int status, struct ib_sa_multicast *multicast) - cma_make_mc_event(status, id_priv, multicast, &event, mc); - ret = cma_cm_event_handler(id_priv, &event); - rdma_destroy_ah_attr(&event.param.ud.ah_attr); -- if (ret) { -- destroy_id_handler_unlock(id_priv); -- return 0; -- } -+ WARN_ON(ret); - - out: - mutex_unlock(&id_priv->handler_mutex); -@@ -4604,7 +4631,6 @@ static void cma_iboe_set_mgid(struct sockaddr *addr, union ib_gid *mgid, - static int cma_iboe_join_multicast(struct rdma_id_private *id_priv, - struct cma_multicast *mc) - { -- struct cma_work *work; - struct rdma_dev_addr *dev_addr = &id_priv->id.route.addr.dev_addr; - int err = 0; - struct sockaddr *addr = (struct sockaddr *)&mc->addr; -@@ -4618,10 +4644,6 @@ static int cma_iboe_join_multicast(struct rdma_id_private *id_priv, - if (cma_zero_addr(addr)) - return -EINVAL; - -- work = kzalloc(sizeof *work, GFP_KERNEL); -- if (!work) -- return -ENOMEM; -- - gid_type = id_priv->cma_dev->default_gid_type[id_priv->id.port_num - - rdma_start_port(id_priv->cma_dev->device)]; - cma_iboe_set_mgid(addr, &ib.rec.mgid, gid_type); -@@ -4632,10 +4654,9 @@ static int cma_iboe_join_multicast(struct rdma_id_private *id_priv, - - if (dev_addr->bound_dev_if) - ndev = dev_get_by_index(dev_addr->net, dev_addr->bound_dev_if); -- if (!ndev) { -- err = -ENODEV; -- goto err_free; -- } -+ if (!ndev) -+ return -ENODEV; -+ - ib.rec.rate = iboe_get_rate(ndev); - ib.rec.hop_limit = 1; - ib.rec.mtu = iboe_get_mtu(ndev->mtu); -@@ -4653,24 +4674,15 @@ static int cma_iboe_join_multicast(struct rdma_id_private *id_priv, - err = -ENOTSUPP; - } - dev_put(ndev); -- if (err || !ib.rec.mtu) { -- if (!err) -- err = -EINVAL; -- goto err_free; -- } -+ if (err || !ib.rec.mtu) -+ return err ?: -EINVAL; -+ - rdma_ip2gid((struct sockaddr *)&id_priv->id.route.addr.src_addr, - &ib.rec.port_gid); -- work->id = id_priv; -- INIT_WORK(&work->work, cma_work_handler); -- cma_make_mc_event(0, id_priv, &ib, &work->event, mc); -- /* Balances with cma_id_put() in cma_work_handler */ -- cma_id_get(id_priv); -- queue_work(cma_wq, &work->work); -+ INIT_WORK(&mc->iboe_join.work, cma_iboe_join_work_handler); -+ cma_make_mc_event(0, id_priv, &ib, &mc->iboe_join.event, mc); -+ queue_work(cma_wq, &mc->iboe_join.work); - return 0; -- --err_free: -- kfree(work); -- return err; - } - - int rdma_join_multicast(struct rdma_cm_id *id, struct sockaddr *addr, -diff --git a/drivers/infiniband/core/user_mad.c b/drivers/infiniband/core/user_mad.c -index 19104a6756915..dd7f3b437c6be 100644 ---- a/drivers/infiniband/core/user_mad.c -+++ b/drivers/infiniband/core/user_mad.c -@@ -379,6 +379,11 @@ static ssize_t ib_umad_read(struct file *filp, char __user *buf, - - mutex_lock(&file->mutex); - -+ if (file->agents_dead) { -+ mutex_unlock(&file->mutex); -+ return -EIO; -+ } -+ - while (list_empty(&file->recv_list)) { - mutex_unlock(&file->mutex); - -@@ -392,6 +397,11 @@ static ssize_t ib_umad_read(struct file *filp, char __user *buf, - mutex_lock(&file->mutex); - } - -+ if (file->agents_dead) { -+ mutex_unlock(&file->mutex); -+ return -EIO; -+ } -+ - packet = list_entry(file->recv_list.next, struct ib_umad_packet, list); - list_del(&packet->list); - -@@ -524,7 +534,7 @@ static ssize_t ib_umad_write(struct file *filp, const char __user *buf, - - agent = __get_agent(file, packet->mad.hdr.id); - if (!agent) { -- ret = -EINVAL; -+ ret = -EIO; - goto err_up; - } - -@@ -653,10 +663,14 @@ static __poll_t ib_umad_poll(struct file *filp, struct poll_table_struct *wait) - /* we will always be able to post a MAD send */ - __poll_t mask = EPOLLOUT | EPOLLWRNORM; - -+ mutex_lock(&file->mutex); - poll_wait(filp, &file->recv_wait, wait); - - if (!list_empty(&file->recv_list)) - mask |= EPOLLIN | EPOLLRDNORM; -+ if (file->agents_dead) -+ mask = EPOLLERR; -+ mutex_unlock(&file->mutex); - - return mask; - } -@@ -1336,6 +1350,7 @@ static void ib_umad_kill_port(struct ib_umad_port *port) - list_for_each_entry(file, &port->file_list, port_list) { - mutex_lock(&file->mutex); - file->agents_dead = 1; -+ wake_up_interruptible(&file->recv_wait); - mutex_unlock(&file->mutex); - - for (id = 0; id < IB_UMAD_MAX_AGENTS; ++id) -diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h -index ad8253245a85f..54abe615b502a 100644 ---- a/drivers/infiniband/hw/hns/hns_roce_device.h -+++ b/drivers/infiniband/hw/hns/hns_roce_device.h -@@ -54,6 +54,7 @@ - /* Hardware specification only for v1 engine */ - #define HNS_ROCE_MIN_CQE_NUM 0x40 - #define HNS_ROCE_MIN_WQE_NUM 0x20 -+#define HNS_ROCE_MIN_SRQ_WQE_NUM 1 - - /* Hardware specification only for v1 engine */ - #define HNS_ROCE_MAX_INNER_MTPT_NUM 0x7 -@@ -65,6 +66,8 @@ - #define HNS_ROCE_CQE_WCMD_EMPTY_BIT 0x2 - #define HNS_ROCE_MIN_CQE_CNT 16 - -+#define HNS_ROCE_RESERVED_SGE 1 -+ - #define HNS_ROCE_MAX_IRQ_NUM 128 - - #define HNS_ROCE_SGE_IN_WQE 2 -@@ -393,6 +396,7 @@ struct hns_roce_wq { - spinlock_t lock; - u32 wqe_cnt; /* WQE num */ - u32 max_gs; -+ u32 rsv_sge; - int offset; - int wqe_shift; /* WQE size */ - u32 head; -@@ -489,6 +493,8 @@ struct hns_roce_idx_que { - struct hns_roce_mtr mtr; - int entry_shift; - unsigned long *bitmap; -+ u32 head; -+ u32 tail; - }; - - struct hns_roce_srq { -@@ -496,6 +502,7 @@ struct hns_roce_srq { - unsigned long srqn; - u32 wqe_cnt; - int max_gs; -+ u32 rsv_sge; - int wqe_shift; - void __iomem *db_reg_l; - -@@ -507,8 +514,6 @@ struct hns_roce_srq { - u64 *wrid; - struct hns_roce_idx_que idx_que; - spinlock_t lock; -- u16 head; -- u16 tail; - struct mutex mutex; - void (*event)(struct hns_roce_srq *srq, enum hns_roce_event event); - }; -@@ -647,7 +652,7 @@ struct hns_roce_qp { - struct hns_roce_db sdb; - unsigned long en_flags; - u32 doorbell_qpn; -- u32 sq_signal_bits; -+ enum ib_sig_type sq_signal_bits; - struct hns_roce_wq sq; - - struct hns_roce_mtr mtr; -diff --git a/drivers/infiniband/hw/hns/hns_roce_hem.c b/drivers/infiniband/hw/hns/hns_roce_hem.c -index edc9d6b98d954..cfd2e1b60c7f0 100644 ---- a/drivers/infiniband/hw/hns/hns_roce_hem.c -+++ b/drivers/infiniband/hw/hns/hns_roce_hem.c -@@ -1075,9 +1075,8 @@ static struct roce_hem_item *hem_list_alloc_item(struct hns_roce_dev *hr_dev, - return NULL; - - if (exist_bt) { -- hem->addr = dma_alloc_coherent(hr_dev->dev, -- count * BA_BYTE_LEN, -- &hem->dma_addr, GFP_KERNEL); -+ hem->addr = dma_alloc_coherent(hr_dev->dev, count * BA_BYTE_LEN, -+ &hem->dma_addr, GFP_KERNEL); - if (!hem->addr) { - kfree(hem); - return NULL; -@@ -1336,6 +1335,10 @@ static int hem_list_alloc_root_bt(struct hns_roce_dev *hr_dev, - if (ba_num < 1) - return -ENOMEM; - -+ if (ba_num > unit) -+ return -ENOBUFS; -+ -+ ba_num = min_t(int, ba_num, unit); - INIT_LIST_HEAD(&temp_root); - offset = r->offset; - /* indicate to last region */ -diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c -index f68585ff8e8a5..c2539a8d91116 100644 ---- a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c -+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c -@@ -43,6 +43,22 @@ - #include "hns_roce_hem.h" - #include "hns_roce_hw_v1.h" - -+/** -+ * hns_get_gid_index - Get gid index. -+ * @hr_dev: pointer to structure hns_roce_dev. -+ * @port: port, value range: 0 ~ MAX -+ * @gid_index: gid_index, value range: 0 ~ MAX -+ * Description: -+ * N ports shared gids, allocation method as follow: -+ * GID[0][0], GID[1][0],.....GID[N - 1][0], -+ * GID[0][0], GID[1][0],.....GID[N - 1][0], -+ * And so on -+ */ -+u8 hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index) -+{ -+ return gid_index * hr_dev->caps.num_ports + port; -+} -+ - static void set_data_seg(struct hns_roce_wqe_data_seg *dseg, struct ib_sge *sg) - { - dseg->lkey = cpu_to_le32(sg->lkey); -diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c -index 833e1f259936f..0f76e193317e6 100644 ---- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c -+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c -@@ -741,6 +741,7 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp, - unsigned long flags; - void *wqe = NULL; - u32 wqe_idx; -+ u32 max_sge; - int nreq; - int ret; - int i; -@@ -754,6 +755,7 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp, - goto out; - } - -+ max_sge = hr_qp->rq.max_gs - hr_qp->rq.rsv_sge; - for (nreq = 0; wr; ++nreq, wr = wr->next) { - if (unlikely(hns_roce_wq_overflow(&hr_qp->rq, nreq, - hr_qp->ibqp.recv_cq))) { -@@ -764,9 +766,9 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp, - - wqe_idx = (hr_qp->rq.head + nreq) & (hr_qp->rq.wqe_cnt - 1); - -- if (unlikely(wr->num_sge > hr_qp->rq.max_gs)) { -+ if (unlikely(wr->num_sge > max_sge)) { - ibdev_err(ibdev, "num_sge = %d >= max_sge = %u.\n", -- wr->num_sge, hr_qp->rq.max_gs); -+ wr->num_sge, max_sge); - ret = -EINVAL; - *bad_wr = wr; - goto out; -@@ -781,9 +783,10 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp, - dseg++; - } - -- if (wr->num_sge < hr_qp->rq.max_gs) { -+ if (hr_qp->rq.rsv_sge) { - dseg->lkey = cpu_to_le32(HNS_ROCE_INVALID_LKEY); - dseg->addr = 0; -+ dseg->len = cpu_to_le32(HNS_ROCE_INVALID_SGE_LENGTH); - } - - /* rq support inline data */ -@@ -846,11 +849,20 @@ static void hns_roce_free_srq_wqe(struct hns_roce_srq *srq, int wqe_index) - spin_lock(&srq->lock); - - bitmap_clear(srq->idx_que.bitmap, wqe_index, 1); -- srq->tail++; -+ srq->idx_que.tail++; - - spin_unlock(&srq->lock); - } - -+int hns_roce_srqwq_overflow(struct hns_roce_srq *srq, int nreq) -+{ -+ struct hns_roce_idx_que *idx_que = &srq->idx_que; -+ unsigned int cur; -+ -+ cur = idx_que->head - idx_que->tail; -+ return cur + nreq >= srq->wqe_cnt; -+} -+ - static int find_empty_entry(struct hns_roce_idx_que *idx_que, - unsigned long size) - { -@@ -879,22 +891,27 @@ static int hns_roce_v2_post_srq_recv(struct ib_srq *ibsrq, - __le32 *srq_idx; - int ret = 0; - int wqe_idx; -+ u32 max_sge; - void *wqe; - int nreq; - int i; - - spin_lock_irqsave(&srq->lock, flags); - -- ind = srq->head & (srq->wqe_cnt - 1); -+ ind = srq->idx_que.head & (srq->wqe_cnt - 1); -+ max_sge = srq->max_gs - srq->rsv_sge; - - for (nreq = 0; wr; ++nreq, wr = wr->next) { -- if (unlikely(wr->num_sge >= srq->max_gs)) { -+ if (unlikely(wr->num_sge > max_sge)) { -+ ibdev_err(&hr_dev->ib_dev, -+ "srq: num_sge = %d, max_sge = %u.\n", -+ wr->num_sge, max_sge); - ret = -EINVAL; - *bad_wr = wr; - break; - } - -- if (unlikely(srq->head == srq->tail)) { -+ if (unlikely(hns_roce_srqwq_overflow(srq, nreq))) { - ret = -ENOMEM; - *bad_wr = wr; - break; -@@ -916,9 +933,9 @@ static int hns_roce_v2_post_srq_recv(struct ib_srq *ibsrq, - dseg[i].addr = cpu_to_le64(wr->sg_list[i].addr); - } - -- if (wr->num_sge < srq->max_gs) { -- dseg[i].len = 0; -- dseg[i].lkey = cpu_to_le32(0x100); -+ if (srq->rsv_sge) { -+ dseg[i].len = cpu_to_le32(HNS_ROCE_INVALID_SGE_LENGTH); -+ dseg[i].lkey = cpu_to_le32(HNS_ROCE_INVALID_LKEY); - dseg[i].addr = 0; - } - -@@ -930,7 +947,7 @@ static int hns_roce_v2_post_srq_recv(struct ib_srq *ibsrq, - } - - if (likely(nreq)) { -- srq->head += nreq; -+ srq->idx_que.head += nreq; - - /* - * Make sure that descriptors are written before -@@ -942,7 +959,7 @@ static int hns_roce_v2_post_srq_recv(struct ib_srq *ibsrq, - cpu_to_le32(HNS_ROCE_V2_SRQ_DB << V2_DB_BYTE_4_CMD_S | - (srq->srqn & V2_DB_BYTE_4_TAG_M)); - srq_db.parameter = -- cpu_to_le32(srq->head & V2_DB_PARAMETER_IDX_M); -+ cpu_to_le32(srq->idx_que.head & V2_DB_PARAMETER_IDX_M); - - hns_roce_write64(hr_dev, (__le32 *)&srq_db, srq->db_reg_l); - } -@@ -1247,7 +1264,7 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev, - u32 timeout = 0; - int handle = 0; - u16 desc_ret; -- int ret = 0; -+ int ret; - int ntc; - - spin_lock_bh(&csq->lock); -@@ -1292,15 +1309,14 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev, - if (hns_roce_cmq_csq_done(hr_dev)) { - complete = true; - handle = 0; -+ ret = 0; - while (handle < num) { - /* get the result of hardware write back */ - desc_to_use = &csq->desc[ntc]; - desc[handle] = *desc_to_use; - dev_dbg(hr_dev->dev, "Get cmq desc:\n"); - desc_ret = le16_to_cpu(desc[handle].retval); -- if (desc_ret == CMD_EXEC_SUCCESS) -- ret = 0; -- else -+ if (unlikely(desc_ret != CMD_EXEC_SUCCESS)) - ret = -EIO; - priv->cmq.last_status = desc_ret; - ntc++; -@@ -1866,7 +1882,6 @@ static void set_default_caps(struct hns_roce_dev *hr_dev) - - caps->flags = HNS_ROCE_CAP_FLAG_REREG_MR | - HNS_ROCE_CAP_FLAG_ROCE_V1_V2 | -- HNS_ROCE_CAP_FLAG_RQ_INLINE | - HNS_ROCE_CAP_FLAG_RECORD_DB | - HNS_ROCE_CAP_FLAG_SQ_RECORD_DB; - -@@ -1999,10 +2014,12 @@ static int hns_roce_query_pf_caps(struct hns_roce_dev *hr_dev) - caps->max_sq_sg = le16_to_cpu(resp_a->max_sq_sg); - caps->max_sq_inline = le16_to_cpu(resp_a->max_sq_inline); - caps->max_rq_sg = le16_to_cpu(resp_a->max_rq_sg); -+ caps->max_rq_sg = roundup_pow_of_two(caps->max_rq_sg); - caps->max_extend_sg = le32_to_cpu(resp_a->max_extend_sg); - caps->num_qpc_timer = le16_to_cpu(resp_a->num_qpc_timer); - caps->num_cqc_timer = le16_to_cpu(resp_a->num_cqc_timer); - caps->max_srq_sges = le16_to_cpu(resp_a->max_srq_sges); -+ caps->max_srq_sges = roundup_pow_of_two(caps->max_srq_sges); - caps->num_aeq_vectors = resp_a->num_aeq_vectors; - caps->num_other_vectors = resp_a->num_other_vectors; - caps->max_sq_desc_sz = resp_a->max_sq_desc_sz; -@@ -4235,7 +4252,6 @@ static int modify_qp_init_to_rtr(struct ib_qp *ibqp, - struct hns_roce_v2_qp_context *context, - struct hns_roce_v2_qp_context *qpc_mask) - { -- const struct ib_global_route *grh = rdma_ah_read_grh(&attr->ah_attr); - struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device); - struct hns_roce_qp *hr_qp = to_hr_qp(ibqp); - struct ib_device *ibdev = &hr_dev->ib_dev; -@@ -4243,7 +4259,6 @@ static int modify_qp_init_to_rtr(struct ib_qp *ibqp, - dma_addr_t irrl_ba; - enum ib_mtu mtu; - u8 lp_pktn_ini; -- u8 port_num; - u64 *mtts; - u8 *dmac; - u8 *smac; -@@ -4324,15 +4339,6 @@ static int modify_qp_init_to_rtr(struct ib_qp *ibqp, - V2_QPC_BYTE_56_DQPN_M, V2_QPC_BYTE_56_DQPN_S, 0); - } - -- /* Configure GID index */ -- port_num = rdma_ah_get_port_num(&attr->ah_attr); -- roce_set_field(context->byte_20_smac_sgid_idx, -- V2_QPC_BYTE_20_SGID_IDX_M, V2_QPC_BYTE_20_SGID_IDX_S, -- hns_get_gid_index(hr_dev, port_num - 1, -- grh->sgid_index)); -- roce_set_field(qpc_mask->byte_20_smac_sgid_idx, -- V2_QPC_BYTE_20_SGID_IDX_M, V2_QPC_BYTE_20_SGID_IDX_S, 0); -- - memcpy(&(context->dmac), dmac, sizeof(u32)); - roce_set_field(context->byte_52_udpspn_dmac, V2_QPC_BYTE_52_DMAC_M, - V2_QPC_BYTE_52_DMAC_S, *((u16 *)(&dmac[4]))); -@@ -5083,7 +5089,7 @@ static int hns_roce_v2_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, - done: - qp_attr->cur_qp_state = qp_attr->qp_state; - qp_attr->cap.max_recv_wr = hr_qp->rq.wqe_cnt; -- qp_attr->cap.max_recv_sge = hr_qp->rq.max_gs; -+ qp_attr->cap.max_recv_sge = hr_qp->rq.max_gs - hr_qp->rq.rsv_sge; - - if (!ibqp->uobject) { - qp_attr->cap.max_send_wr = hr_qp->sq.wqe_cnt; -@@ -5331,7 +5337,7 @@ static int hns_roce_v2_modify_srq(struct ib_srq *ibsrq, - return -EINVAL; - - if (srq_attr_mask & IB_SRQ_LIMIT) { -- if (srq_attr->srq_limit >= srq->wqe_cnt) -+ if (srq_attr->srq_limit > srq->wqe_cnt) - return -EINVAL; - - mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); -@@ -5394,8 +5400,8 @@ static int hns_roce_v2_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr) - SRQC_BYTE_8_SRQ_LIMIT_WL_S); - - attr->srq_limit = limit_wl; -- attr->max_wr = srq->wqe_cnt - 1; -- attr->max_sge = srq->max_gs; -+ attr->max_wr = srq->wqe_cnt; -+ attr->max_sge = srq->max_gs - srq->rsv_sge; - - out: - hns_roce_free_cmd_mailbox(hr_dev, mailbox); -diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h -index bdaccf86460dd..09d88d97a7ff9 100644 ---- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h -+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h -@@ -96,7 +96,8 @@ - #define HNS_ROCE_V2_CQC_TIMER_ENTRY_SZ PAGE_SIZE - #define HNS_ROCE_V2_PAGE_SIZE_SUPPORTED 0xFFFFF000 - #define HNS_ROCE_V2_MAX_INNER_MTPT_NUM 2 --#define HNS_ROCE_INVALID_LKEY 0x100 -+#define HNS_ROCE_INVALID_LKEY 0x0 -+#define HNS_ROCE_INVALID_SGE_LENGTH 0x80000000 - #define HNS_ROCE_CMQ_TX_TIMEOUT 30000 - #define HNS_ROCE_V2_UC_RC_SGE_NUM_IN_WQE 2 - #define HNS_ROCE_V2_RSV_QPS 8 -diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c -index d9179bae4989d..baadb12b13752 100644 ---- a/drivers/infiniband/hw/hns/hns_roce_main.c -+++ b/drivers/infiniband/hw/hns/hns_roce_main.c -@@ -42,22 +42,6 @@ - #include "hns_roce_device.h" - #include "hns_roce_hem.h" - --/** -- * hns_get_gid_index - Get gid index. -- * @hr_dev: pointer to structure hns_roce_dev. -- * @port: port, value range: 0 ~ MAX -- * @gid_index: gid_index, value range: 0 ~ MAX -- * Description: -- * N ports shared gids, allocation method as follow: -- * GID[0][0], GID[1][0],.....GID[N - 1][0], -- * GID[0][0], GID[1][0],.....GID[N - 1][0], -- * And so on -- */ --u8 hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index) --{ -- return gid_index * hr_dev->caps.num_ports + port; --} -- - static int hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr) - { - u8 phy_port; -@@ -772,8 +756,7 @@ static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev) - return 0; - - err_qp_table_free: -- if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SRQ) -- hns_roce_cleanup_qp_table(hr_dev); -+ hns_roce_cleanup_qp_table(hr_dev); - - err_cq_table_free: - hns_roce_cleanup_cq_table(hr_dev); -diff --git a/drivers/infiniband/hw/hns/hns_roce_mr.c b/drivers/infiniband/hw/hns/hns_roce_mr.c -index 1bcffd93ff3e3..1e0465f05b7da 100644 ---- a/drivers/infiniband/hw/hns/hns_roce_mr.c -+++ b/drivers/infiniband/hw/hns/hns_roce_mr.c -@@ -631,30 +631,26 @@ int hns_roce_dealloc_mw(struct ib_mw *ibmw) - } - - static int mtr_map_region(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, -- dma_addr_t *pages, struct hns_roce_buf_region *region) -+ struct hns_roce_buf_region *region, dma_addr_t *pages, -+ int max_count) - { -+ int count, npage; -+ int offset, end; - __le64 *mtts; -- int offset; -- int count; -- int npage; - u64 addr; -- int end; - int i; - -- /* if hopnum is 0, buffer cannot store BAs, so skip write mtt */ -- if (!region->hopnum) -- return 0; -- - offset = region->offset; - end = offset + region->count; - npage = 0; -- while (offset < end) { -+ while (offset < end && npage < max_count) { -+ count = 0; - mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list, - offset, &count, NULL); - if (!mtts) - return -ENOBUFS; - -- for (i = 0; i < count; i++) { -+ for (i = 0; i < count && npage < max_count; i++) { - if (hr_dev->hw_rev == HNS_ROCE_HW_VER1) - addr = to_hr_hw_page_addr(pages[npage]); - else -@@ -666,7 +662,7 @@ static int mtr_map_region(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, - offset += count; - } - -- return 0; -+ return npage; - } - - static inline bool mtr_has_mtt(struct hns_roce_buf_attr *attr) -@@ -833,8 +829,8 @@ int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, - { - struct ib_device *ibdev = &hr_dev->ib_dev; - struct hns_roce_buf_region *r; -- unsigned int i; -- int err; -+ unsigned int i, mapped_cnt; -+ int ret; - - /* - * Only use the first page address as root ba when hopnum is 0, this -@@ -845,26 +841,42 @@ int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, - return 0; - } - -- for (i = 0; i < mtr->hem_cfg.region_count; i++) { -+ for (i = 0, mapped_cnt = 0; i < mtr->hem_cfg.region_count && -+ mapped_cnt < page_cnt; i++) { - r = &mtr->hem_cfg.region[i]; -+ /* if hopnum is 0, no need to map pages in this region */ -+ if (!r->hopnum) { -+ mapped_cnt += r->count; -+ continue; -+ } -+ - if (r->offset + r->count > page_cnt) { -- err = -EINVAL; -+ ret = -EINVAL; - ibdev_err(ibdev, - "failed to check mtr%u end %u + %u, max %u.\n", - i, r->offset, r->count, page_cnt); -- return err; -+ return ret; - } - -- err = mtr_map_region(hr_dev, mtr, &pages[r->offset], r); -- if (err) { -+ ret = mtr_map_region(hr_dev, mtr, r, &pages[r->offset], -+ page_cnt - mapped_cnt); -+ if (ret < 0) { - ibdev_err(ibdev, - "failed to map mtr%u offset %u, ret = %d.\n", -- i, r->offset, err); -- return err; -+ i, r->offset, ret); -+ return ret; - } -+ mapped_cnt += ret; -+ ret = 0; - } - -- return 0; -+ if (mapped_cnt < page_cnt) { -+ ret = -ENOBUFS; -+ ibdev_err(ibdev, "failed to map mtr pages count: %u < %u.\n", -+ mapped_cnt, page_cnt); -+ } -+ -+ return ret; - } - - int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, -diff --git a/drivers/infiniband/hw/hns/hns_roce_qp.c b/drivers/infiniband/hw/hns/hns_roce_qp.c -index 1116371adf74f..8695c96e66964 100644 ---- a/drivers/infiniband/hw/hns/hns_roce_qp.c -+++ b/drivers/infiniband/hw/hns/hns_roce_qp.c -@@ -413,9 +413,32 @@ static void free_qpn(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp) - mutex_unlock(&hr_dev->qp_table.bank_mutex); - } - -+static u32 proc_rq_sge(struct hns_roce_dev *dev, struct hns_roce_qp *hr_qp, -+ bool user) -+{ -+ u32 max_sge = dev->caps.max_rq_sg; -+ -+ if (dev->pci_dev->revision >= PCI_REVISION_ID_HIP09) -+ return max_sge; -+ -+ /* Reserve SGEs only for HIP08 in kernel; The userspace driver will -+ * calculate number of max_sge with reserved SGEs when allocating wqe -+ * buf, so there is no need to do this again in kernel. But the number -+ * may exceed the capacity of SGEs recorded in the firmware, so the -+ * kernel driver should just adapt the value accordingly. -+ */ -+ if (user) -+ max_sge = roundup_pow_of_two(max_sge + 1); -+ else -+ hr_qp->rq.rsv_sge = 1; -+ -+ return max_sge; -+} -+ - static int set_rq_size(struct hns_roce_dev *hr_dev, struct ib_qp_cap *cap, -- struct hns_roce_qp *hr_qp, int has_rq) -+ struct hns_roce_qp *hr_qp, int has_rq, bool user) - { -+ u32 max_sge = proc_rq_sge(hr_dev, hr_qp, user); - u32 cnt; - - /* If srq exist, set zero for relative number of rq */ -@@ -431,8 +454,9 @@ static int set_rq_size(struct hns_roce_dev *hr_dev, struct ib_qp_cap *cap, - - /* Check the validity of QP support capacity */ - if (!cap->max_recv_wr || cap->max_recv_wr > hr_dev->caps.max_wqes || -- cap->max_recv_sge > hr_dev->caps.max_rq_sg) { -- ibdev_err(&hr_dev->ib_dev, "RQ config error, depth=%u, sge=%d\n", -+ cap->max_recv_sge > max_sge) { -+ ibdev_err(&hr_dev->ib_dev, -+ "RQ config error, depth = %u, sge = %u\n", - cap->max_recv_wr, cap->max_recv_sge); - return -EINVAL; - } -@@ -444,7 +468,8 @@ static int set_rq_size(struct hns_roce_dev *hr_dev, struct ib_qp_cap *cap, - return -EINVAL; - } - -- hr_qp->rq.max_gs = roundup_pow_of_two(max(1U, cap->max_recv_sge)); -+ hr_qp->rq.max_gs = roundup_pow_of_two(max(1U, cap->max_recv_sge) + -+ hr_qp->rq.rsv_sge); - - if (hr_dev->caps.max_rq_sg <= HNS_ROCE_SGE_IN_WQE) - hr_qp->rq.wqe_shift = ilog2(hr_dev->caps.max_rq_desc_sz); -@@ -459,7 +484,7 @@ static int set_rq_size(struct hns_roce_dev *hr_dev, struct ib_qp_cap *cap, - hr_qp->rq_inl_buf.wqe_cnt = 0; - - cap->max_recv_wr = cnt; -- cap->max_recv_sge = hr_qp->rq.max_gs; -+ cap->max_recv_sge = hr_qp->rq.max_gs - hr_qp->rq.rsv_sge; - - return 0; - } -@@ -919,7 +944,7 @@ static int set_qp_param(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp, - hr_qp->sq_signal_bits = IB_SIGNAL_REQ_WR; - - ret = set_rq_size(hr_dev, &init_attr->cap, hr_qp, -- hns_roce_qp_has_rq(init_attr)); -+ hns_roce_qp_has_rq(init_attr), !!udata); - if (ret) { - ibdev_err(ibdev, "failed to set user RQ size, ret = %d.\n", - ret); -diff --git a/drivers/infiniband/hw/hns/hns_roce_srq.c b/drivers/infiniband/hw/hns/hns_roce_srq.c -index c4ae57e4173a1..51de9305bb4de 100644 ---- a/drivers/infiniband/hw/hns/hns_roce_srq.c -+++ b/drivers/infiniband/hw/hns/hns_roce_srq.c -@@ -3,6 +3,7 @@ - * Copyright (c) 2018 Hisilicon Limited. - */ - -+#include - #include - #include "hns_roce_device.h" - #include "hns_roce_cmd.h" -@@ -246,6 +247,9 @@ static int alloc_srq_idx(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq, - } - } - -+ idx_que->head = 0; -+ idx_que->tail = 0; -+ - return 0; - err_idx_mtr: - hns_roce_mtr_destroy(hr_dev, &idx_que->mtr); -@@ -264,8 +268,6 @@ static void free_srq_idx(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq) - - static int alloc_srq_wrid(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq) - { -- srq->head = 0; -- srq->tail = srq->wqe_cnt - 1; - srq->wrid = kvmalloc_array(srq->wqe_cnt, sizeof(u64), GFP_KERNEL); - if (!srq->wrid) - return -ENOMEM; -@@ -279,6 +281,28 @@ static void free_srq_wrid(struct hns_roce_srq *srq) - srq->wrid = NULL; - } - -+static u32 proc_srq_sge(struct hns_roce_dev *dev, struct hns_roce_srq *hr_srq, -+ bool user) -+{ -+ u32 max_sge = dev->caps.max_srq_sges; -+ -+ if (dev->pci_dev->revision >= PCI_REVISION_ID_HIP09) -+ return max_sge; -+ -+ /* Reserve SGEs only for HIP08 in kernel; The userspace driver will -+ * calculate number of max_sge with reserved SGEs when allocating wqe -+ * buf, so there is no need to do this again in kernel. But the number -+ * may exceed the capacity of SGEs recorded in the firmware, so the -+ * kernel driver should just adapt the value accordingly. -+ */ -+ if (user) -+ max_sge = roundup_pow_of_two(max_sge + 1); -+ else -+ hr_srq->rsv_sge = 1; -+ -+ return max_sge; -+} -+ - int hns_roce_create_srq(struct ib_srq *ib_srq, - struct ib_srq_init_attr *init_attr, - struct ib_udata *udata) -@@ -288,6 +312,7 @@ int hns_roce_create_srq(struct ib_srq *ib_srq, - struct hns_roce_srq *srq = to_hr_srq(ib_srq); - struct ib_device *ibdev = &hr_dev->ib_dev; - struct hns_roce_ib_create_srq ucmd = {}; -+ u32 max_sge; - int ret; - u32 cqn; - -@@ -295,16 +320,27 @@ int hns_roce_create_srq(struct ib_srq *ib_srq, - init_attr->srq_type != IB_SRQT_XRC) - return -EOPNOTSUPP; - -- /* Check the actual SRQ wqe and SRQ sge num */ -- if (init_attr->attr.max_wr >= hr_dev->caps.max_srq_wrs || -- init_attr->attr.max_sge > hr_dev->caps.max_srq_sges) -+ max_sge = proc_srq_sge(hr_dev, srq, !!udata); -+ -+ if (init_attr->attr.max_wr > hr_dev->caps.max_srq_wrs || -+ init_attr->attr.max_sge > max_sge) { -+ ibdev_err(&hr_dev->ib_dev, -+ "SRQ config error, depth = %u, sge = %d\n", -+ init_attr->attr.max_wr, init_attr->attr.max_sge); - return -EINVAL; -+ } - - mutex_init(&srq->mutex); - spin_lock_init(&srq->lock); - -- srq->wqe_cnt = roundup_pow_of_two(init_attr->attr.max_wr + 1); -- srq->max_gs = init_attr->attr.max_sge; -+ init_attr->attr.max_wr = max_t(u32, init_attr->attr.max_wr, -+ HNS_ROCE_MIN_SRQ_WQE_NUM); -+ srq->wqe_cnt = roundup_pow_of_two(init_attr->attr.max_wr); -+ srq->max_gs = -+ roundup_pow_of_two(init_attr->attr.max_sge + srq->rsv_sge); -+ init_attr->attr.max_wr = srq->wqe_cnt; -+ init_attr->attr.max_sge = srq->max_gs; -+ init_attr->attr.srq_limit = 0; - - if (udata) { - ret = ib_copy_from_udata(&ucmd, udata, -@@ -351,6 +387,8 @@ int hns_roce_create_srq(struct ib_srq *ib_srq, - - srq->event = hns_roce_ib_srq_event; - resp.srqn = srq->srqn; -+ srq->max_gs = init_attr->attr.max_sge; -+ init_attr->attr.max_sge = srq->max_gs - srq->rsv_sge; - - if (udata) { - ret = ib_copy_to_udata(udata, &resp, -diff --git a/drivers/infiniband/hw/mlx5/devx.c b/drivers/infiniband/hw/mlx5/devx.c -index 819c142857d65..ff8e17d7f7ca8 100644 ---- a/drivers/infiniband/hw/mlx5/devx.c -+++ b/drivers/infiniband/hw/mlx5/devx.c -@@ -1064,7 +1064,9 @@ static void devx_obj_build_destroy_cmd(void *in, void *out, void *din, - MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RQT); - break; - case MLX5_CMD_OP_CREATE_TIR: -- MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_TIR); -+ *obj_id = MLX5_GET(create_tir_out, out, tirn); -+ MLX5_SET(destroy_tir_in, din, opcode, MLX5_CMD_OP_DESTROY_TIR); -+ MLX5_SET(destroy_tir_in, din, tirn, *obj_id); - break; - case MLX5_CMD_OP_CREATE_TIS: - MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_TIS); -diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c -index aabdc07e47537..3562e69eacb14 100644 ---- a/drivers/infiniband/hw/mlx5/main.c -+++ b/drivers/infiniband/hw/mlx5/main.c -@@ -3927,7 +3927,7 @@ static void mlx5_ib_stage_init_cleanup(struct mlx5_ib_dev *dev) - mlx5_ib_cleanup_multiport_master(dev); - WARN_ON(!xa_empty(&dev->odp_mkeys)); - cleanup_srcu_struct(&dev->odp_srcu); -- -+ mutex_destroy(&dev->cap_mask_mutex); - WARN_ON(!xa_empty(&dev->sig_mrs)); - WARN_ON(!bitmap_empty(dev->dm.memic_alloc_pages, MLX5_MAX_MEMIC_PAGES)); - } -@@ -3978,6 +3978,10 @@ static int mlx5_ib_stage_init_init(struct mlx5_ib_dev *dev) - dev->ib_dev.dev.parent = mdev->device; - dev->ib_dev.lag_flags = RDMA_LAG_FLAGS_HASH_ALL_SLAVES; - -+ err = init_srcu_struct(&dev->odp_srcu); -+ if (err) -+ goto err_mp; -+ - mutex_init(&dev->cap_mask_mutex); - INIT_LIST_HEAD(&dev->qp_list); - spin_lock_init(&dev->reset_flow_resource_lock); -@@ -3987,17 +3991,11 @@ static int mlx5_ib_stage_init_init(struct mlx5_ib_dev *dev) - - spin_lock_init(&dev->dm.lock); - dev->dm.dev = mdev; -- -- err = init_srcu_struct(&dev->odp_srcu); -- if (err) -- goto err_mp; -- - return 0; - - err_mp: - mlx5_ib_cleanup_multiport_master(dev); -- -- return -ENOMEM; -+ return err; - } - - static int mlx5_ib_enable_driver(struct ib_device *dev) -diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c -index 0cb7cc642d87d..bab40ad527dae 100644 ---- a/drivers/infiniband/hw/mlx5/qp.c -+++ b/drivers/infiniband/hw/mlx5/qp.c -@@ -2432,9 +2432,6 @@ static int check_qp_type(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, - case MLX5_IB_QPT_HW_GSI: - case IB_QPT_DRIVER: - case IB_QPT_GSI: -- if (dev->profile == &raw_eth_profile) -- goto out; -- fallthrough; - case IB_QPT_RAW_PACKET: - case IB_QPT_UD: - case MLX5_IB_QPT_REG_UMR: -@@ -2629,10 +2626,6 @@ static int process_create_flags(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, - int create_flags = attr->create_flags; - bool cond; - -- if (qp->type == IB_QPT_UD && dev->profile == &raw_eth_profile) -- if (create_flags & ~MLX5_IB_QP_CREATE_WC_TEST) -- return -EINVAL; -- - if (qp_type == MLX5_IB_QPT_DCT) - return (create_flags) ? -EINVAL : 0; - -@@ -4211,6 +4204,23 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, - return 0; - } - -+static bool mlx5_ib_modify_qp_allowed(struct mlx5_ib_dev *dev, -+ struct mlx5_ib_qp *qp, -+ enum ib_qp_type qp_type) -+{ -+ if (dev->profile != &raw_eth_profile) -+ return true; -+ -+ if (qp_type == IB_QPT_RAW_PACKET || qp_type == MLX5_IB_QPT_REG_UMR) -+ return true; -+ -+ /* Internal QP used for wc testing, with NOPs in wq */ -+ if (qp->flags & MLX5_IB_QP_CREATE_WC_TEST) -+ return true; -+ -+ return false; -+} -+ - int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, - int attr_mask, struct ib_udata *udata) - { -@@ -4223,6 +4233,9 @@ int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, - int err = -EINVAL; - int port; - -+ if (!mlx5_ib_modify_qp_allowed(dev, qp, ibqp->qp_type)) -+ return -EOPNOTSUPP; -+ - if (attr_mask & ~(IB_QP_ATTR_STANDARD_BITS | IB_QP_RATE_LIMIT)) - return -EOPNOTSUPP; - -diff --git a/drivers/infiniband/sw/rxe/rxe_net.c b/drivers/infiniband/sw/rxe/rxe_net.c -index 943914c2a50c7..bce44502ab0ed 100644 ---- a/drivers/infiniband/sw/rxe/rxe_net.c -+++ b/drivers/infiniband/sw/rxe/rxe_net.c -@@ -414,6 +414,11 @@ int rxe_send(struct rxe_pkt_info *pkt, struct sk_buff *skb) - - void rxe_loopback(struct sk_buff *skb) - { -+ if (skb->protocol == htons(ETH_P_IP)) -+ skb_pull(skb, sizeof(struct iphdr)); -+ else -+ skb_pull(skb, sizeof(struct ipv6hdr)); -+ - rxe_rcv(skb); - } - -diff --git a/drivers/infiniband/sw/rxe/rxe_recv.c b/drivers/infiniband/sw/rxe/rxe_recv.c -index c9984a28eecc7..cb69a125e2806 100644 ---- a/drivers/infiniband/sw/rxe/rxe_recv.c -+++ b/drivers/infiniband/sw/rxe/rxe_recv.c -@@ -9,21 +9,26 @@ - #include "rxe.h" - #include "rxe_loc.h" - -+/* check that QP matches packet opcode type and is in a valid state */ - static int check_type_state(struct rxe_dev *rxe, struct rxe_pkt_info *pkt, - struct rxe_qp *qp) - { -+ unsigned int pkt_type; -+ - if (unlikely(!qp->valid)) - goto err1; - -+ pkt_type = pkt->opcode & 0xe0; -+ - switch (qp_type(qp)) { - case IB_QPT_RC: -- if (unlikely((pkt->opcode & IB_OPCODE_RC) != 0)) { -+ if (unlikely(pkt_type != IB_OPCODE_RC)) { - pr_warn_ratelimited("bad qp type\n"); - goto err1; - } - break; - case IB_QPT_UC: -- if (unlikely(!(pkt->opcode & IB_OPCODE_UC))) { -+ if (unlikely(pkt_type != IB_OPCODE_UC)) { - pr_warn_ratelimited("bad qp type\n"); - goto err1; - } -@@ -31,7 +36,7 @@ static int check_type_state(struct rxe_dev *rxe, struct rxe_pkt_info *pkt, - case IB_QPT_UD: - case IB_QPT_SMI: - case IB_QPT_GSI: -- if (unlikely(!(pkt->opcode & IB_OPCODE_UD))) { -+ if (unlikely(pkt_type != IB_OPCODE_UD)) { - pr_warn_ratelimited("bad qp type\n"); - goto err1; - } -@@ -252,7 +257,6 @@ static void rxe_rcv_mcast_pkt(struct rxe_dev *rxe, struct sk_buff *skb) - - list_for_each_entry(mce, &mcg->qp_list, qp_list) { - qp = mce->qp; -- pkt = SKB_TO_PKT(skb); - - /* validate qp for incoming packet */ - err = check_type_state(rxe, pkt, qp); -@@ -264,12 +268,18 @@ static void rxe_rcv_mcast_pkt(struct rxe_dev *rxe, struct sk_buff *skb) - continue; - - /* for all but the last qp create a new clone of the -- * skb and pass to the qp. -+ * skb and pass to the qp. If an error occurs in the -+ * checks for the last qp in the list we need to -+ * free the skb since it hasn't been passed on to -+ * rxe_rcv_pkt() which would free it later. - */ -- if (mce->qp_list.next != &mcg->qp_list) -+ if (mce->qp_list.next != &mcg->qp_list) { - per_qp_skb = skb_clone(skb, GFP_ATOMIC); -- else -+ } else { - per_qp_skb = skb; -+ /* show we have consumed the skb */ -+ skb = NULL; -+ } - - if (unlikely(!per_qp_skb)) - continue; -@@ -284,9 +294,8 @@ static void rxe_rcv_mcast_pkt(struct rxe_dev *rxe, struct sk_buff *skb) - - rxe_drop_ref(mcg); /* drop ref from rxe_pool_get_key. */ - -- return; -- - err1: -+ /* free skb if not consumed */ - kfree_skb(skb); - } - -diff --git a/drivers/infiniband/sw/siw/siw.h b/drivers/infiniband/sw/siw/siw.h -index adda789962196..368959ae9a8cc 100644 ---- a/drivers/infiniband/sw/siw/siw.h -+++ b/drivers/infiniband/sw/siw/siw.h -@@ -653,7 +653,7 @@ static inline struct siw_sqe *orq_get_free(struct siw_qp *qp) - { - struct siw_sqe *orq_e = orq_get_tail(qp); - -- if (orq_e && READ_ONCE(orq_e->flags) == 0) -+ if (READ_ONCE(orq_e->flags) == 0) - return orq_e; - - return NULL; -diff --git a/drivers/infiniband/sw/siw/siw_main.c b/drivers/infiniband/sw/siw/siw_main.c -index ee95cf29179d2..41c46dfaebf66 100644 ---- a/drivers/infiniband/sw/siw/siw_main.c -+++ b/drivers/infiniband/sw/siw/siw_main.c -@@ -135,7 +135,7 @@ static struct { - - static int siw_init_cpulist(void) - { -- int i, num_nodes = num_possible_nodes(); -+ int i, num_nodes = nr_node_ids; - - memset(siw_tx_thread, 0, sizeof(siw_tx_thread)); - -diff --git a/drivers/infiniband/sw/siw/siw_qp.c b/drivers/infiniband/sw/siw/siw_qp.c -index 875d36d4b1c61..ddb2e66f9f133 100644 ---- a/drivers/infiniband/sw/siw/siw_qp.c -+++ b/drivers/infiniband/sw/siw/siw_qp.c -@@ -199,26 +199,26 @@ void siw_qp_llp_write_space(struct sock *sk) - - static int siw_qp_readq_init(struct siw_qp *qp, int irq_size, int orq_size) - { -- irq_size = roundup_pow_of_two(irq_size); -- orq_size = roundup_pow_of_two(orq_size); -- -- qp->attrs.irq_size = irq_size; -- qp->attrs.orq_size = orq_size; -- -- qp->irq = vzalloc(irq_size * sizeof(struct siw_sqe)); -- if (!qp->irq) { -- siw_dbg_qp(qp, "irq malloc for %d failed\n", irq_size); -- qp->attrs.irq_size = 0; -- return -ENOMEM; -+ if (irq_size) { -+ irq_size = roundup_pow_of_two(irq_size); -+ qp->irq = vzalloc(irq_size * sizeof(struct siw_sqe)); -+ if (!qp->irq) { -+ qp->attrs.irq_size = 0; -+ return -ENOMEM; -+ } - } -- qp->orq = vzalloc(orq_size * sizeof(struct siw_sqe)); -- if (!qp->orq) { -- siw_dbg_qp(qp, "orq malloc for %d failed\n", orq_size); -- qp->attrs.orq_size = 0; -- qp->attrs.irq_size = 0; -- vfree(qp->irq); -- return -ENOMEM; -+ if (orq_size) { -+ orq_size = roundup_pow_of_two(orq_size); -+ qp->orq = vzalloc(orq_size * sizeof(struct siw_sqe)); -+ if (!qp->orq) { -+ qp->attrs.orq_size = 0; -+ qp->attrs.irq_size = 0; -+ vfree(qp->irq); -+ return -ENOMEM; -+ } - } -+ qp->attrs.irq_size = irq_size; -+ qp->attrs.orq_size = orq_size; - siw_dbg_qp(qp, "ORD %d, IRD %d\n", orq_size, irq_size); - return 0; - } -@@ -288,13 +288,14 @@ int siw_qp_mpa_rts(struct siw_qp *qp, enum mpa_v2_ctrl ctrl) - if (ctrl & MPA_V2_RDMA_WRITE_RTR) - wqe->sqe.opcode = SIW_OP_WRITE; - else if (ctrl & MPA_V2_RDMA_READ_RTR) { -- struct siw_sqe *rreq; -+ struct siw_sqe *rreq = NULL; - - wqe->sqe.opcode = SIW_OP_READ; - - spin_lock(&qp->orq_lock); - -- rreq = orq_get_free(qp); -+ if (qp->attrs.orq_size) -+ rreq = orq_get_free(qp); - if (rreq) { - siw_read_to_orq(rreq, &wqe->sqe); - qp->orq_put++; -@@ -877,135 +878,88 @@ void siw_read_to_orq(struct siw_sqe *rreq, struct siw_sqe *sqe) - rreq->num_sge = 1; - } - --/* -- * Must be called with SQ locked. -- * To avoid complete SQ starvation by constant inbound READ requests, -- * the active IRQ will not be served after qp->irq_burst, if the -- * SQ has pending work. -- */ --int siw_activate_tx(struct siw_qp *qp) -+static int siw_activate_tx_from_sq(struct siw_qp *qp) - { -- struct siw_sqe *irqe, *sqe; -+ struct siw_sqe *sqe; - struct siw_wqe *wqe = tx_wqe(qp); - int rv = 1; - -- irqe = &qp->irq[qp->irq_get % qp->attrs.irq_size]; -- -- if (irqe->flags & SIW_WQE_VALID) { -- sqe = sq_get_next(qp); -- -- /* -- * Avoid local WQE processing starvation in case -- * of constant inbound READ request stream -- */ -- if (sqe && ++qp->irq_burst >= SIW_IRQ_MAXBURST_SQ_ACTIVE) { -- qp->irq_burst = 0; -- goto skip_irq; -- } -- memset(wqe->mem, 0, sizeof(*wqe->mem) * SIW_MAX_SGE); -- wqe->wr_status = SIW_WR_QUEUED; -- -- /* start READ RESPONSE */ -- wqe->sqe.opcode = SIW_OP_READ_RESPONSE; -- wqe->sqe.flags = 0; -- if (irqe->num_sge) { -- wqe->sqe.num_sge = 1; -- wqe->sqe.sge[0].length = irqe->sge[0].length; -- wqe->sqe.sge[0].laddr = irqe->sge[0].laddr; -- wqe->sqe.sge[0].lkey = irqe->sge[0].lkey; -- } else { -- wqe->sqe.num_sge = 0; -- } -- -- /* Retain original RREQ's message sequence number for -- * potential error reporting cases. -- */ -- wqe->sqe.sge[1].length = irqe->sge[1].length; -- -- wqe->sqe.rkey = irqe->rkey; -- wqe->sqe.raddr = irqe->raddr; -+ sqe = sq_get_next(qp); -+ if (!sqe) -+ return 0; - -- wqe->processed = 0; -- qp->irq_get++; -+ memset(wqe->mem, 0, sizeof(*wqe->mem) * SIW_MAX_SGE); -+ wqe->wr_status = SIW_WR_QUEUED; - -- /* mark current IRQ entry free */ -- smp_store_mb(irqe->flags, 0); -+ /* First copy SQE to kernel private memory */ -+ memcpy(&wqe->sqe, sqe, sizeof(*sqe)); - -+ if (wqe->sqe.opcode >= SIW_NUM_OPCODES) { -+ rv = -EINVAL; - goto out; - } -- sqe = sq_get_next(qp); -- if (sqe) { --skip_irq: -- memset(wqe->mem, 0, sizeof(*wqe->mem) * SIW_MAX_SGE); -- wqe->wr_status = SIW_WR_QUEUED; -- -- /* First copy SQE to kernel private memory */ -- memcpy(&wqe->sqe, sqe, sizeof(*sqe)); -- -- if (wqe->sqe.opcode >= SIW_NUM_OPCODES) { -+ if (wqe->sqe.flags & SIW_WQE_INLINE) { -+ if (wqe->sqe.opcode != SIW_OP_SEND && -+ wqe->sqe.opcode != SIW_OP_WRITE) { - rv = -EINVAL; - goto out; - } -- if (wqe->sqe.flags & SIW_WQE_INLINE) { -- if (wqe->sqe.opcode != SIW_OP_SEND && -- wqe->sqe.opcode != SIW_OP_WRITE) { -- rv = -EINVAL; -- goto out; -- } -- if (wqe->sqe.sge[0].length > SIW_MAX_INLINE) { -- rv = -EINVAL; -- goto out; -- } -- wqe->sqe.sge[0].laddr = (uintptr_t)&wqe->sqe.sge[1]; -- wqe->sqe.sge[0].lkey = 0; -- wqe->sqe.num_sge = 1; -+ if (wqe->sqe.sge[0].length > SIW_MAX_INLINE) { -+ rv = -EINVAL; -+ goto out; - } -- if (wqe->sqe.flags & SIW_WQE_READ_FENCE) { -- /* A READ cannot be fenced */ -- if (unlikely(wqe->sqe.opcode == SIW_OP_READ || -- wqe->sqe.opcode == -- SIW_OP_READ_LOCAL_INV)) { -- siw_dbg_qp(qp, "cannot fence read\n"); -- rv = -EINVAL; -- goto out; -- } -- spin_lock(&qp->orq_lock); -+ wqe->sqe.sge[0].laddr = (uintptr_t)&wqe->sqe.sge[1]; -+ wqe->sqe.sge[0].lkey = 0; -+ wqe->sqe.num_sge = 1; -+ } -+ if (wqe->sqe.flags & SIW_WQE_READ_FENCE) { -+ /* A READ cannot be fenced */ -+ if (unlikely(wqe->sqe.opcode == SIW_OP_READ || -+ wqe->sqe.opcode == -+ SIW_OP_READ_LOCAL_INV)) { -+ siw_dbg_qp(qp, "cannot fence read\n"); -+ rv = -EINVAL; -+ goto out; -+ } -+ spin_lock(&qp->orq_lock); - -- if (!siw_orq_empty(qp)) { -- qp->tx_ctx.orq_fence = 1; -- rv = 0; -- } -- spin_unlock(&qp->orq_lock); -+ if (qp->attrs.orq_size && !siw_orq_empty(qp)) { -+ qp->tx_ctx.orq_fence = 1; -+ rv = 0; -+ } -+ spin_unlock(&qp->orq_lock); - -- } else if (wqe->sqe.opcode == SIW_OP_READ || -- wqe->sqe.opcode == SIW_OP_READ_LOCAL_INV) { -- struct siw_sqe *rreq; -+ } else if (wqe->sqe.opcode == SIW_OP_READ || -+ wqe->sqe.opcode == SIW_OP_READ_LOCAL_INV) { -+ struct siw_sqe *rreq; - -- wqe->sqe.num_sge = 1; -+ if (unlikely(!qp->attrs.orq_size)) { -+ /* We negotiated not to send READ req's */ -+ rv = -EINVAL; -+ goto out; -+ } -+ wqe->sqe.num_sge = 1; - -- spin_lock(&qp->orq_lock); -+ spin_lock(&qp->orq_lock); - -- rreq = orq_get_free(qp); -- if (rreq) { -- /* -- * Make an immediate copy in ORQ to be ready -- * to process loopback READ reply -- */ -- siw_read_to_orq(rreq, &wqe->sqe); -- qp->orq_put++; -- } else { -- qp->tx_ctx.orq_fence = 1; -- rv = 0; -- } -- spin_unlock(&qp->orq_lock); -+ rreq = orq_get_free(qp); -+ if (rreq) { -+ /* -+ * Make an immediate copy in ORQ to be ready -+ * to process loopback READ reply -+ */ -+ siw_read_to_orq(rreq, &wqe->sqe); -+ qp->orq_put++; -+ } else { -+ qp->tx_ctx.orq_fence = 1; -+ rv = 0; - } -- -- /* Clear SQE, can be re-used by application */ -- smp_store_mb(sqe->flags, 0); -- qp->sq_get++; -- } else { -- rv = 0; -+ spin_unlock(&qp->orq_lock); - } -+ -+ /* Clear SQE, can be re-used by application */ -+ smp_store_mb(sqe->flags, 0); -+ qp->sq_get++; - out: - if (unlikely(rv < 0)) { - siw_dbg_qp(qp, "error %d\n", rv); -@@ -1014,6 +968,65 @@ out: - return rv; - } - -+/* -+ * Must be called with SQ locked. -+ * To avoid complete SQ starvation by constant inbound READ requests, -+ * the active IRQ will not be served after qp->irq_burst, if the -+ * SQ has pending work. -+ */ -+int siw_activate_tx(struct siw_qp *qp) -+{ -+ struct siw_sqe *irqe; -+ struct siw_wqe *wqe = tx_wqe(qp); -+ -+ if (!qp->attrs.irq_size) -+ return siw_activate_tx_from_sq(qp); -+ -+ irqe = &qp->irq[qp->irq_get % qp->attrs.irq_size]; -+ -+ if (!(irqe->flags & SIW_WQE_VALID)) -+ return siw_activate_tx_from_sq(qp); -+ -+ /* -+ * Avoid local WQE processing starvation in case -+ * of constant inbound READ request stream -+ */ -+ if (sq_get_next(qp) && ++qp->irq_burst >= SIW_IRQ_MAXBURST_SQ_ACTIVE) { -+ qp->irq_burst = 0; -+ return siw_activate_tx_from_sq(qp); -+ } -+ memset(wqe->mem, 0, sizeof(*wqe->mem) * SIW_MAX_SGE); -+ wqe->wr_status = SIW_WR_QUEUED; -+ -+ /* start READ RESPONSE */ -+ wqe->sqe.opcode = SIW_OP_READ_RESPONSE; -+ wqe->sqe.flags = 0; -+ if (irqe->num_sge) { -+ wqe->sqe.num_sge = 1; -+ wqe->sqe.sge[0].length = irqe->sge[0].length; -+ wqe->sqe.sge[0].laddr = irqe->sge[0].laddr; -+ wqe->sqe.sge[0].lkey = irqe->sge[0].lkey; -+ } else { -+ wqe->sqe.num_sge = 0; -+ } -+ -+ /* Retain original RREQ's message sequence number for -+ * potential error reporting cases. -+ */ -+ wqe->sqe.sge[1].length = irqe->sge[1].length; -+ -+ wqe->sqe.rkey = irqe->rkey; -+ wqe->sqe.raddr = irqe->raddr; -+ -+ wqe->processed = 0; -+ qp->irq_get++; -+ -+ /* mark current IRQ entry free */ -+ smp_store_mb(irqe->flags, 0); -+ -+ return 1; -+} -+ - /* - * Check if current CQ state qualifies for calling CQ completion - * handler. Must be called with CQ lock held. -diff --git a/drivers/infiniband/sw/siw/siw_qp_rx.c b/drivers/infiniband/sw/siw/siw_qp_rx.c -index 4bd1f1f84057b..60116f20653c7 100644 ---- a/drivers/infiniband/sw/siw/siw_qp_rx.c -+++ b/drivers/infiniband/sw/siw/siw_qp_rx.c -@@ -680,6 +680,10 @@ static int siw_init_rresp(struct siw_qp *qp, struct siw_rx_stream *srx) - } - spin_lock_irqsave(&qp->sq_lock, flags); - -+ if (unlikely(!qp->attrs.irq_size)) { -+ run_sq = 0; -+ goto error_irq; -+ } - if (tx_work->wr_status == SIW_WR_IDLE) { - /* - * immediately schedule READ response w/o -@@ -712,8 +716,9 @@ static int siw_init_rresp(struct siw_qp *qp, struct siw_rx_stream *srx) - /* RRESP now valid as current TX wqe or placed into IRQ */ - smp_store_mb(resp->flags, SIW_WQE_VALID); - } else { -- pr_warn("siw: [QP %u]: irq %d exceeded %d\n", qp_id(qp), -- qp->irq_put % qp->attrs.irq_size, qp->attrs.irq_size); -+error_irq: -+ pr_warn("siw: [QP %u]: IRQ exceeded or null, size %d\n", -+ qp_id(qp), qp->attrs.irq_size); - - siw_init_terminate(qp, TERM_ERROR_LAYER_RDMAP, - RDMAP_ETYPE_REMOTE_OPERATION, -@@ -740,6 +745,9 @@ static int siw_orqe_start_rx(struct siw_qp *qp) - struct siw_sqe *orqe; - struct siw_wqe *wqe = NULL; - -+ if (unlikely(!qp->attrs.orq_size)) -+ return -EPROTO; -+ - /* make sure ORQ indices are current */ - smp_mb(); - -@@ -796,8 +804,8 @@ int siw_proc_rresp(struct siw_qp *qp) - */ - rv = siw_orqe_start_rx(qp); - if (rv) { -- pr_warn("siw: [QP %u]: ORQ empty at idx %d\n", -- qp_id(qp), qp->orq_get % qp->attrs.orq_size); -+ pr_warn("siw: [QP %u]: ORQ empty, size %d\n", -+ qp_id(qp), qp->attrs.orq_size); - goto error_term; - } - rv = siw_rresp_check_ntoh(srx, frx); -@@ -1290,11 +1298,13 @@ static int siw_rdmap_complete(struct siw_qp *qp, int error) - wc_status); - siw_wqe_put_mem(wqe, SIW_OP_READ); - -- if (!error) -+ if (!error) { - rv = siw_check_tx_fence(qp); -- else -- /* Disable current ORQ eleement */ -- WRITE_ONCE(orq_get_current(qp)->flags, 0); -+ } else { -+ /* Disable current ORQ element */ -+ if (qp->attrs.orq_size) -+ WRITE_ONCE(orq_get_current(qp)->flags, 0); -+ } - break; - - case RDMAP_RDMA_READ_REQ: -diff --git a/drivers/infiniband/sw/siw/siw_qp_tx.c b/drivers/infiniband/sw/siw/siw_qp_tx.c -index d19d8325588b5..7989c4043db4e 100644 ---- a/drivers/infiniband/sw/siw/siw_qp_tx.c -+++ b/drivers/infiniband/sw/siw/siw_qp_tx.c -@@ -1107,8 +1107,8 @@ next_wqe: - /* - * RREQ may have already been completed by inbound RRESP! - */ -- if (tx_type == SIW_OP_READ || -- tx_type == SIW_OP_READ_LOCAL_INV) { -+ if ((tx_type == SIW_OP_READ || -+ tx_type == SIW_OP_READ_LOCAL_INV) && qp->attrs.orq_size) { - /* Cleanup pending entry in ORQ */ - qp->orq_put--; - qp->orq[qp->orq_put % qp->attrs.orq_size].flags = 0; -diff --git a/drivers/infiniband/sw/siw/siw_verbs.c b/drivers/infiniband/sw/siw/siw_verbs.c -index 68fd053fc7748..e389d44e5591d 100644 ---- a/drivers/infiniband/sw/siw/siw_verbs.c -+++ b/drivers/infiniband/sw/siw/siw_verbs.c -@@ -365,13 +365,23 @@ struct ib_qp *siw_create_qp(struct ib_pd *pd, - if (rv) - goto err_out; - -+ num_sqe = attrs->cap.max_send_wr; -+ num_rqe = attrs->cap.max_recv_wr; -+ - /* All queue indices are derived from modulo operations - * on a free running 'get' (consumer) and 'put' (producer) - * unsigned counter. Having queue sizes at power of two - * avoids handling counter wrap around. - */ -- num_sqe = roundup_pow_of_two(attrs->cap.max_send_wr); -- num_rqe = roundup_pow_of_two(attrs->cap.max_recv_wr); -+ if (num_sqe) -+ num_sqe = roundup_pow_of_two(num_sqe); -+ else { -+ /* Zero sized SQ is not supported */ -+ rv = -EINVAL; -+ goto err_out; -+ } -+ if (num_rqe) -+ num_rqe = roundup_pow_of_two(num_rqe); - - if (udata) - qp->sendq = vmalloc_user(num_sqe * sizeof(struct siw_sqe)); -@@ -379,7 +389,6 @@ struct ib_qp *siw_create_qp(struct ib_pd *pd, - qp->sendq = vzalloc(num_sqe * sizeof(struct siw_sqe)); - - if (qp->sendq == NULL) { -- siw_dbg(base_dev, "SQ size %d alloc failed\n", num_sqe); - rv = -ENOMEM; - goto err_out_xa; - } -@@ -413,7 +422,6 @@ struct ib_qp *siw_create_qp(struct ib_pd *pd, - qp->recvq = vzalloc(num_rqe * sizeof(struct siw_rqe)); - - if (qp->recvq == NULL) { -- siw_dbg(base_dev, "RQ size %d alloc failed\n", num_rqe); - rv = -ENOMEM; - goto err_out_xa; - } -@@ -966,9 +974,9 @@ int siw_post_receive(struct ib_qp *base_qp, const struct ib_recv_wr *wr, - unsigned long flags; - int rv = 0; - -- if (qp->srq) { -+ if (qp->srq || qp->attrs.rq_size == 0) { - *bad_wr = wr; -- return -EOPNOTSUPP; /* what else from errno.h? */ -+ return -EINVAL; - } - if (!rdma_is_kernel_res(&qp->base_qp.res)) { - siw_dbg_qp(qp, "no kernel post_recv for user mapped rq\n"); -diff --git a/drivers/infiniband/ulp/rtrs/rtrs-clt-sysfs.c b/drivers/infiniband/ulp/rtrs/rtrs-clt-sysfs.c -index ba00f0de14caa..ad77659800cd2 100644 ---- a/drivers/infiniband/ulp/rtrs/rtrs-clt-sysfs.c -+++ b/drivers/infiniband/ulp/rtrs/rtrs-clt-sysfs.c -@@ -408,6 +408,7 @@ int rtrs_clt_create_sess_files(struct rtrs_clt_sess *sess) - "%s", str); - if (err) { - pr_err("kobject_init_and_add: %d\n", err); -+ kobject_put(&sess->kobj); - return err; - } - err = sysfs_create_group(&sess->kobj, &rtrs_clt_sess_attr_group); -@@ -419,6 +420,7 @@ int rtrs_clt_create_sess_files(struct rtrs_clt_sess *sess) - &sess->kobj, "stats"); - if (err) { - pr_err("kobject_init_and_add: %d\n", err); -+ kobject_put(&sess->stats->kobj_stats); - goto remove_group; - } - -diff --git a/drivers/infiniband/ulp/rtrs/rtrs-clt.c b/drivers/infiniband/ulp/rtrs/rtrs-clt.c -index 67f86c405a265..785cd1cf2a402 100644 ---- a/drivers/infiniband/ulp/rtrs/rtrs-clt.c -+++ b/drivers/infiniband/ulp/rtrs/rtrs-clt.c -@@ -31,6 +31,8 @@ - */ - #define RTRS_RECONNECT_SEED 8 - -+#define FIRST_CONN 0x01 -+ - MODULE_DESCRIPTION("RDMA Transport Client"); - MODULE_LICENSE("GPL"); - -@@ -1511,7 +1513,7 @@ static void destroy_con(struct rtrs_clt_con *con) - static int create_con_cq_qp(struct rtrs_clt_con *con) - { - struct rtrs_clt_sess *sess = to_clt_sess(con->c.sess); -- u16 wr_queue_size; -+ u32 max_send_wr, max_recv_wr, cq_size; - int err, cq_vector; - struct rtrs_msg_rkey_rsp *rsp; - -@@ -1523,7 +1525,8 @@ static int create_con_cq_qp(struct rtrs_clt_con *con) - * + 2 for drain and heartbeat - * in case qp gets into error state - */ -- wr_queue_size = SERVICE_CON_QUEUE_DEPTH * 3 + 2; -+ max_send_wr = SERVICE_CON_QUEUE_DEPTH * 2 + 2; -+ max_recv_wr = SERVICE_CON_QUEUE_DEPTH * 2 + 2; - /* We must be the first here */ - if (WARN_ON(sess->s.dev)) - return -EINVAL; -@@ -1555,25 +1558,29 @@ static int create_con_cq_qp(struct rtrs_clt_con *con) - - /* Shared between connections */ - sess->s.dev_ref++; -- wr_queue_size = -+ max_send_wr = - min_t(int, sess->s.dev->ib_dev->attrs.max_qp_wr, - /* QD * (REQ + RSP + FR REGS or INVS) + drain */ - sess->queue_depth * 3 + 1); -+ max_recv_wr = -+ min_t(int, sess->s.dev->ib_dev->attrs.max_qp_wr, -+ sess->queue_depth * 3 + 1); - } - /* alloc iu to recv new rkey reply when server reports flags set */ - if (sess->flags == RTRS_MSG_NEW_RKEY_F || con->c.cid == 0) { -- con->rsp_ius = rtrs_iu_alloc(wr_queue_size, sizeof(*rsp), -+ con->rsp_ius = rtrs_iu_alloc(max_recv_wr, sizeof(*rsp), - GFP_KERNEL, sess->s.dev->ib_dev, - DMA_FROM_DEVICE, - rtrs_clt_rdma_done); - if (!con->rsp_ius) - return -ENOMEM; -- con->queue_size = wr_queue_size; -+ con->queue_size = max_recv_wr; - } -+ cq_size = max_send_wr + max_recv_wr; - cq_vector = con->cpu % sess->s.dev->ib_dev->num_comp_vectors; - err = rtrs_cq_qp_create(&sess->s, &con->c, sess->max_send_sge, -- cq_vector, wr_queue_size, wr_queue_size, -- IB_POLL_SOFTIRQ); -+ cq_vector, cq_size, max_send_wr, -+ max_recv_wr, IB_POLL_SOFTIRQ); - /* - * In case of error we do not bother to clean previous allocations, - * since destroy_con_cq_qp() must be called. -@@ -1657,6 +1664,7 @@ static int rtrs_rdma_route_resolved(struct rtrs_clt_con *con) - .cid_num = cpu_to_le16(sess->s.con_num), - .recon_cnt = cpu_to_le16(sess->s.recon_cnt), - }; -+ msg.first_conn = sess->for_new_clt ? FIRST_CONN : 0; - uuid_copy(&msg.sess_uuid, &sess->s.uuid); - uuid_copy(&msg.paths_uuid, &clt->paths_uuid); - -@@ -1742,6 +1750,8 @@ static int rtrs_rdma_conn_established(struct rtrs_clt_con *con, - scnprintf(sess->hca_name, sizeof(sess->hca_name), - sess->s.dev->ib_dev->name); - sess->s.src_addr = con->c.cm_id->route.addr.src_addr; -+ /* set for_new_clt, to allow future reconnect on any path */ -+ sess->for_new_clt = 1; - } - - return 0; -@@ -2565,11 +2575,8 @@ static struct rtrs_clt *alloc_clt(const char *sessname, size_t paths_num, - clt->dev.class = rtrs_clt_dev_class; - clt->dev.release = rtrs_clt_dev_release; - err = dev_set_name(&clt->dev, "%s", sessname); -- if (err) { -- free_percpu(clt->pcpu_path); -- kfree(clt); -- return ERR_PTR(err); -- } -+ if (err) -+ goto err; - /* - * Suppress user space notification until - * sysfs files are created -@@ -2577,29 +2584,31 @@ static struct rtrs_clt *alloc_clt(const char *sessname, size_t paths_num, - dev_set_uevent_suppress(&clt->dev, true); - err = device_register(&clt->dev); - if (err) { -- free_percpu(clt->pcpu_path); - put_device(&clt->dev); -- return ERR_PTR(err); -+ goto err; - } - - clt->kobj_paths = kobject_create_and_add("paths", &clt->dev.kobj); - if (!clt->kobj_paths) { -- free_percpu(clt->pcpu_path); -- device_unregister(&clt->dev); -- return NULL; -+ err = -ENOMEM; -+ goto err_dev; - } - err = rtrs_clt_create_sysfs_root_files(clt); - if (err) { -- free_percpu(clt->pcpu_path); - kobject_del(clt->kobj_paths); - kobject_put(clt->kobj_paths); -- device_unregister(&clt->dev); -- return ERR_PTR(err); -+ goto err_dev; - } - dev_set_uevent_suppress(&clt->dev, false); - kobject_uevent(&clt->dev.kobj, KOBJ_ADD); - - return clt; -+err_dev: -+ device_unregister(&clt->dev); -+err: -+ free_percpu(clt->pcpu_path); -+ kfree(clt); -+ return ERR_PTR(err); - } - - static void wait_for_inflight_permits(struct rtrs_clt *clt) -@@ -2672,6 +2681,8 @@ struct rtrs_clt *rtrs_clt_open(struct rtrs_clt_ops *ops, - err = PTR_ERR(sess); - goto close_all_sess; - } -+ if (!i) -+ sess->for_new_clt = 1; - list_add_tail_rcu(&sess->s.entry, &clt->paths_list); - - err = init_sess(sess); -diff --git a/drivers/infiniband/ulp/rtrs/rtrs-clt.h b/drivers/infiniband/ulp/rtrs/rtrs-clt.h -index b8dbd701b3cb2..7c9e155027969 100644 ---- a/drivers/infiniband/ulp/rtrs/rtrs-clt.h -+++ b/drivers/infiniband/ulp/rtrs/rtrs-clt.h -@@ -143,6 +143,7 @@ struct rtrs_clt_sess { - int max_send_sge; - u32 flags; - struct kobject kobj; -+ u8 for_new_clt; - struct rtrs_clt_stats *stats; - /* cache hca_port and hca_name to display in sysfs */ - u8 hca_port; -diff --git a/drivers/infiniband/ulp/rtrs/rtrs-pri.h b/drivers/infiniband/ulp/rtrs/rtrs-pri.h -index 3f2918671dbed..8caad0a2322bf 100644 ---- a/drivers/infiniband/ulp/rtrs/rtrs-pri.h -+++ b/drivers/infiniband/ulp/rtrs/rtrs-pri.h -@@ -188,7 +188,9 @@ struct rtrs_msg_conn_req { - __le16 recon_cnt; - uuid_t sess_uuid; - uuid_t paths_uuid; -- u8 reserved[12]; -+ u8 first_conn : 1; -+ u8 reserved_bits : 7; -+ u8 reserved[11]; - }; - - /** -@@ -303,8 +305,9 @@ int rtrs_post_rdma_write_imm_empty(struct rtrs_con *con, struct ib_cqe *cqe, - struct ib_send_wr *head); - - int rtrs_cq_qp_create(struct rtrs_sess *rtrs_sess, struct rtrs_con *con, -- u32 max_send_sge, int cq_vector, u16 cq_size, -- u16 wr_queue_size, enum ib_poll_context poll_ctx); -+ u32 max_send_sge, int cq_vector, int cq_size, -+ u32 max_send_wr, u32 max_recv_wr, -+ enum ib_poll_context poll_ctx); - void rtrs_cq_qp_destroy(struct rtrs_con *con); - - void rtrs_init_hb(struct rtrs_sess *sess, struct ib_cqe *cqe, -diff --git a/drivers/infiniband/ulp/rtrs/rtrs-srv-sysfs.c b/drivers/infiniband/ulp/rtrs/rtrs-srv-sysfs.c -index d2edff3b8f0df..126a96e75c621 100644 ---- a/drivers/infiniband/ulp/rtrs/rtrs-srv-sysfs.c -+++ b/drivers/infiniband/ulp/rtrs/rtrs-srv-sysfs.c -@@ -51,6 +51,8 @@ static ssize_t rtrs_srv_disconnect_store(struct kobject *kobj, - sockaddr_to_str((struct sockaddr *)&sess->s.dst_addr, str, sizeof(str)); - - rtrs_info(s, "disconnect for path %s requested\n", str); -+ /* first remove sysfs itself to avoid deadlock */ -+ sysfs_remove_file_self(&sess->kobj, &attr->attr); - close_sess(sess); - - return count; -@@ -181,6 +183,7 @@ static int rtrs_srv_create_once_sysfs_root_folders(struct rtrs_srv_sess *sess) - err = -ENOMEM; - pr_err("kobject_create_and_add(): %d\n", err); - device_del(&srv->dev); -+ put_device(&srv->dev); - goto unlock; - } - dev_set_uevent_suppress(&srv->dev, false); -@@ -206,6 +209,7 @@ rtrs_srv_destroy_once_sysfs_root_folders(struct rtrs_srv_sess *sess) - kobject_put(srv->kobj_paths); - mutex_unlock(&srv->paths_mutex); - device_del(&srv->dev); -+ put_device(&srv->dev); - } else { - mutex_unlock(&srv->paths_mutex); - } -@@ -234,6 +238,7 @@ static int rtrs_srv_create_stats_files(struct rtrs_srv_sess *sess) - &sess->kobj, "stats"); - if (err) { - rtrs_err(s, "kobject_init_and_add(): %d\n", err); -+ kobject_put(&sess->stats->kobj_stats); - return err; - } - err = sysfs_create_group(&sess->stats->kobj_stats, -@@ -290,8 +295,8 @@ remove_group: - sysfs_remove_group(&sess->kobj, &rtrs_srv_sess_attr_group); - put_kobj: - kobject_del(&sess->kobj); -- kobject_put(&sess->kobj); - destroy_root: -+ kobject_put(&sess->kobj); - rtrs_srv_destroy_once_sysfs_root_folders(sess); - - return err; -@@ -302,7 +307,7 @@ void rtrs_srv_destroy_sess_files(struct rtrs_srv_sess *sess) - if (sess->kobj.state_in_sysfs) { - kobject_del(&sess->stats->kobj_stats); - kobject_put(&sess->stats->kobj_stats); -- kobject_del(&sess->kobj); -+ sysfs_remove_group(&sess->kobj, &rtrs_srv_sess_attr_group); - kobject_put(&sess->kobj); - - rtrs_srv_destroy_once_sysfs_root_folders(sess); -diff --git a/drivers/infiniband/ulp/rtrs/rtrs-srv.c b/drivers/infiniband/ulp/rtrs/rtrs-srv.c -index c42fd470c4eb4..3850d2a938f8e 100644 ---- a/drivers/infiniband/ulp/rtrs/rtrs-srv.c -+++ b/drivers/infiniband/ulp/rtrs/rtrs-srv.c -@@ -222,7 +222,8 @@ static int rdma_write_sg(struct rtrs_srv_op *id) - dma_addr_t dma_addr = sess->dma_addr[id->msg_id]; - struct rtrs_srv_mr *srv_mr; - struct rtrs_srv *srv = sess->srv; -- struct ib_send_wr inv_wr, imm_wr; -+ struct ib_send_wr inv_wr; -+ struct ib_rdma_wr imm_wr; - struct ib_rdma_wr *wr = NULL; - enum ib_send_flags flags; - size_t sg_cnt; -@@ -267,21 +268,22 @@ static int rdma_write_sg(struct rtrs_srv_op *id) - WARN_ON_ONCE(rkey != wr->rkey); - - wr->wr.opcode = IB_WR_RDMA_WRITE; -+ wr->wr.wr_cqe = &io_comp_cqe; - wr->wr.ex.imm_data = 0; - wr->wr.send_flags = 0; - - if (need_inval && always_invalidate) { - wr->wr.next = &rwr.wr; - rwr.wr.next = &inv_wr; -- inv_wr.next = &imm_wr; -+ inv_wr.next = &imm_wr.wr; - } else if (always_invalidate) { - wr->wr.next = &rwr.wr; -- rwr.wr.next = &imm_wr; -+ rwr.wr.next = &imm_wr.wr; - } else if (need_inval) { - wr->wr.next = &inv_wr; -- inv_wr.next = &imm_wr; -+ inv_wr.next = &imm_wr.wr; - } else { -- wr->wr.next = &imm_wr; -+ wr->wr.next = &imm_wr.wr; - } - /* - * From time to time we have to post signaled sends, -@@ -294,16 +296,18 @@ static int rdma_write_sg(struct rtrs_srv_op *id) - inv_wr.sg_list = NULL; - inv_wr.num_sge = 0; - inv_wr.opcode = IB_WR_SEND_WITH_INV; -+ inv_wr.wr_cqe = &io_comp_cqe; - inv_wr.send_flags = 0; - inv_wr.ex.invalidate_rkey = rkey; - } - -- imm_wr.next = NULL; -+ imm_wr.wr.next = NULL; - if (always_invalidate) { - struct rtrs_msg_rkey_rsp *msg; - - srv_mr = &sess->mrs[id->msg_id]; - rwr.wr.opcode = IB_WR_REG_MR; -+ rwr.wr.wr_cqe = &local_reg_cqe; - rwr.wr.num_sge = 0; - rwr.mr = srv_mr->mr; - rwr.wr.send_flags = 0; -@@ -318,22 +322,22 @@ static int rdma_write_sg(struct rtrs_srv_op *id) - list.addr = srv_mr->iu->dma_addr; - list.length = sizeof(*msg); - list.lkey = sess->s.dev->ib_pd->local_dma_lkey; -- imm_wr.sg_list = &list; -- imm_wr.num_sge = 1; -- imm_wr.opcode = IB_WR_SEND_WITH_IMM; -+ imm_wr.wr.sg_list = &list; -+ imm_wr.wr.num_sge = 1; -+ imm_wr.wr.opcode = IB_WR_SEND_WITH_IMM; - ib_dma_sync_single_for_device(sess->s.dev->ib_dev, - srv_mr->iu->dma_addr, - srv_mr->iu->size, DMA_TO_DEVICE); - } else { -- imm_wr.sg_list = NULL; -- imm_wr.num_sge = 0; -- imm_wr.opcode = IB_WR_RDMA_WRITE_WITH_IMM; -+ imm_wr.wr.sg_list = NULL; -+ imm_wr.wr.num_sge = 0; -+ imm_wr.wr.opcode = IB_WR_RDMA_WRITE_WITH_IMM; - } -- imm_wr.send_flags = flags; -- imm_wr.ex.imm_data = cpu_to_be32(rtrs_to_io_rsp_imm(id->msg_id, -+ imm_wr.wr.send_flags = flags; -+ imm_wr.wr.ex.imm_data = cpu_to_be32(rtrs_to_io_rsp_imm(id->msg_id, - 0, need_inval)); - -- imm_wr.wr_cqe = &io_comp_cqe; -+ imm_wr.wr.wr_cqe = &io_comp_cqe; - ib_dma_sync_single_for_device(sess->s.dev->ib_dev, dma_addr, - offset, DMA_BIDIRECTIONAL); - -@@ -360,7 +364,8 @@ static int send_io_resp_imm(struct rtrs_srv_con *con, struct rtrs_srv_op *id, - { - struct rtrs_sess *s = con->c.sess; - struct rtrs_srv_sess *sess = to_srv_sess(s); -- struct ib_send_wr inv_wr, imm_wr, *wr = NULL; -+ struct ib_send_wr inv_wr, *wr = NULL; -+ struct ib_rdma_wr imm_wr; - struct ib_reg_wr rwr; - struct rtrs_srv *srv = sess->srv; - struct rtrs_srv_mr *srv_mr; -@@ -379,6 +384,7 @@ static int send_io_resp_imm(struct rtrs_srv_con *con, struct rtrs_srv_op *id, - - if (need_inval) { - if (likely(sg_cnt)) { -+ inv_wr.wr_cqe = &io_comp_cqe; - inv_wr.sg_list = NULL; - inv_wr.num_sge = 0; - inv_wr.opcode = IB_WR_SEND_WITH_INV; -@@ -396,15 +402,15 @@ static int send_io_resp_imm(struct rtrs_srv_con *con, struct rtrs_srv_op *id, - if (need_inval && always_invalidate) { - wr = &inv_wr; - inv_wr.next = &rwr.wr; -- rwr.wr.next = &imm_wr; -+ rwr.wr.next = &imm_wr.wr; - } else if (always_invalidate) { - wr = &rwr.wr; -- rwr.wr.next = &imm_wr; -+ rwr.wr.next = &imm_wr.wr; - } else if (need_inval) { - wr = &inv_wr; -- inv_wr.next = &imm_wr; -+ inv_wr.next = &imm_wr.wr; - } else { -- wr = &imm_wr; -+ wr = &imm_wr.wr; - } - /* - * From time to time we have to post signalled sends, -@@ -413,14 +419,15 @@ static int send_io_resp_imm(struct rtrs_srv_con *con, struct rtrs_srv_op *id, - flags = (atomic_inc_return(&con->wr_cnt) % srv->queue_depth) ? - 0 : IB_SEND_SIGNALED; - imm = rtrs_to_io_rsp_imm(id->msg_id, errno, need_inval); -- imm_wr.next = NULL; -+ imm_wr.wr.next = NULL; - if (always_invalidate) { - struct ib_sge list; - struct rtrs_msg_rkey_rsp *msg; - - srv_mr = &sess->mrs[id->msg_id]; -- rwr.wr.next = &imm_wr; -+ rwr.wr.next = &imm_wr.wr; - rwr.wr.opcode = IB_WR_REG_MR; -+ rwr.wr.wr_cqe = &local_reg_cqe; - rwr.wr.num_sge = 0; - rwr.wr.send_flags = 0; - rwr.mr = srv_mr->mr; -@@ -435,21 +442,21 @@ static int send_io_resp_imm(struct rtrs_srv_con *con, struct rtrs_srv_op *id, - list.addr = srv_mr->iu->dma_addr; - list.length = sizeof(*msg); - list.lkey = sess->s.dev->ib_pd->local_dma_lkey; -- imm_wr.sg_list = &list; -- imm_wr.num_sge = 1; -- imm_wr.opcode = IB_WR_SEND_WITH_IMM; -+ imm_wr.wr.sg_list = &list; -+ imm_wr.wr.num_sge = 1; -+ imm_wr.wr.opcode = IB_WR_SEND_WITH_IMM; - ib_dma_sync_single_for_device(sess->s.dev->ib_dev, - srv_mr->iu->dma_addr, - srv_mr->iu->size, DMA_TO_DEVICE); - } else { -- imm_wr.sg_list = NULL; -- imm_wr.num_sge = 0; -- imm_wr.opcode = IB_WR_RDMA_WRITE_WITH_IMM; -+ imm_wr.wr.sg_list = NULL; -+ imm_wr.wr.num_sge = 0; -+ imm_wr.wr.opcode = IB_WR_RDMA_WRITE_WITH_IMM; - } -- imm_wr.send_flags = flags; -- imm_wr.wr_cqe = &io_comp_cqe; -+ imm_wr.wr.send_flags = flags; -+ imm_wr.wr.wr_cqe = &io_comp_cqe; - -- imm_wr.ex.imm_data = cpu_to_be32(imm); -+ imm_wr.wr.ex.imm_data = cpu_to_be32(imm); - - err = ib_post_send(id->con->c.qp, wr, NULL); - if (unlikely(err)) -@@ -651,7 +658,7 @@ static int map_cont_bufs(struct rtrs_srv_sess *sess) - if (!srv_mr->iu) { - err = -ENOMEM; - rtrs_err(ss, "rtrs_iu_alloc(), err: %d\n", err); -- goto free_iu; -+ goto dereg_mr; - } - } - /* Eventually dma addr for each chunk can be cached */ -@@ -667,7 +674,6 @@ err: - srv_mr = &sess->mrs[mri]; - sgt = &srv_mr->sgt; - mr = srv_mr->mr; --free_iu: - rtrs_iu_free(srv_mr->iu, sess->s.dev->ib_dev, 1); - dereg_mr: - ib_dereg_mr(mr); -@@ -1328,7 +1334,8 @@ static void free_srv(struct rtrs_srv *srv) - } - - static struct rtrs_srv *get_or_create_srv(struct rtrs_srv_ctx *ctx, -- const uuid_t *paths_uuid) -+ const uuid_t *paths_uuid, -+ bool first_conn) - { - struct rtrs_srv *srv; - int i; -@@ -1341,13 +1348,18 @@ static struct rtrs_srv *get_or_create_srv(struct rtrs_srv_ctx *ctx, - return srv; - } - } -+ mutex_unlock(&ctx->srv_mutex); -+ /* -+ * If this request is not the first connection request from the -+ * client for this session then fail and return error. -+ */ -+ if (!first_conn) -+ return ERR_PTR(-ENXIO); - - /* need to allocate a new srv */ - srv = kzalloc(sizeof(*srv), GFP_KERNEL); -- if (!srv) { -- mutex_unlock(&ctx->srv_mutex); -- return NULL; -- } -+ if (!srv) -+ return ERR_PTR(-ENOMEM); - - INIT_LIST_HEAD(&srv->paths_list); - mutex_init(&srv->paths_mutex); -@@ -1357,8 +1369,6 @@ static struct rtrs_srv *get_or_create_srv(struct rtrs_srv_ctx *ctx, - srv->ctx = ctx; - device_initialize(&srv->dev); - srv->dev.release = rtrs_srv_dev_release; -- list_add(&srv->ctx_list, &ctx->srv_list); -- mutex_unlock(&ctx->srv_mutex); - - srv->chunks = kcalloc(srv->queue_depth, sizeof(*srv->chunks), - GFP_KERNEL); -@@ -1371,6 +1381,9 @@ static struct rtrs_srv *get_or_create_srv(struct rtrs_srv_ctx *ctx, - goto err_free_chunks; - } - refcount_set(&srv->refcount, 1); -+ mutex_lock(&ctx->srv_mutex); -+ list_add(&srv->ctx_list, &ctx->srv_list); -+ mutex_unlock(&ctx->srv_mutex); - - return srv; - -@@ -1381,7 +1394,7 @@ err_free_chunks: - - err_free_srv: - kfree(srv); -- return NULL; -+ return ERR_PTR(-ENOMEM); - } - - static void put_srv(struct rtrs_srv *srv) -@@ -1461,10 +1474,12 @@ static bool __is_path_w_addr_exists(struct rtrs_srv *srv, - - static void free_sess(struct rtrs_srv_sess *sess) - { -- if (sess->kobj.state_in_sysfs) -+ if (sess->kobj.state_in_sysfs) { -+ kobject_del(&sess->kobj); - kobject_put(&sess->kobj); -- else -+ } else { - kfree(sess); -+ } - } - - static void rtrs_srv_close_work(struct work_struct *work) -@@ -1586,7 +1601,7 @@ static int create_con(struct rtrs_srv_sess *sess, - struct rtrs_sess *s = &sess->s; - struct rtrs_srv_con *con; - -- u16 cq_size, wr_queue_size; -+ u32 cq_size, wr_queue_size; - int err, cq_vector; - - con = kzalloc(sizeof(*con), GFP_KERNEL); -@@ -1600,7 +1615,7 @@ static int create_con(struct rtrs_srv_sess *sess, - con->c.cm_id = cm_id; - con->c.sess = &sess->s; - con->c.cid = cid; -- atomic_set(&con->wr_cnt, 0); -+ atomic_set(&con->wr_cnt, 1); - - if (con->c.cid == 0) { - /* -@@ -1630,7 +1645,8 @@ static int create_con(struct rtrs_srv_sess *sess, - - /* TODO: SOFTIRQ can be faster, but be careful with softirq context */ - err = rtrs_cq_qp_create(&sess->s, &con->c, 1, cq_vector, cq_size, -- wr_queue_size, IB_POLL_WORKQUEUE); -+ wr_queue_size, wr_queue_size, -+ IB_POLL_WORKQUEUE); - if (err) { - rtrs_err(s, "rtrs_cq_qp_create(), err: %d\n", err); - goto free_con; -@@ -1781,13 +1797,9 @@ static int rtrs_rdma_connect(struct rdma_cm_id *cm_id, - goto reject_w_econnreset; - } - recon_cnt = le16_to_cpu(msg->recon_cnt); -- srv = get_or_create_srv(ctx, &msg->paths_uuid); -- /* -- * "refcount == 0" happens if a previous thread calls get_or_create_srv -- * allocate srv, but chunks of srv are not allocated yet. -- */ -- if (!srv || refcount_read(&srv->refcount) == 0) { -- err = -ENOMEM; -+ srv = get_or_create_srv(ctx, &msg->paths_uuid, msg->first_conn); -+ if (IS_ERR(srv)) { -+ err = PTR_ERR(srv); - goto reject_w_err; - } - mutex_lock(&srv->paths_mutex); -@@ -1862,8 +1874,8 @@ reject_w_econnreset: - return rtrs_rdma_do_reject(cm_id, -ECONNRESET); - - close_and_return_err: -- close_sess(sess); - mutex_unlock(&srv->paths_mutex); -+ close_sess(sess); - - return err; - } -diff --git a/drivers/infiniband/ulp/rtrs/rtrs.c b/drivers/infiniband/ulp/rtrs/rtrs.c -index 2e3a849e0a77c..da4ff764dd3f0 100644 ---- a/drivers/infiniband/ulp/rtrs/rtrs.c -+++ b/drivers/infiniband/ulp/rtrs/rtrs.c -@@ -182,16 +182,16 @@ int rtrs_post_rdma_write_imm_empty(struct rtrs_con *con, struct ib_cqe *cqe, - u32 imm_data, enum ib_send_flags flags, - struct ib_send_wr *head) - { -- struct ib_send_wr wr; -+ struct ib_rdma_wr wr; - -- wr = (struct ib_send_wr) { -- .wr_cqe = cqe, -- .send_flags = flags, -- .opcode = IB_WR_RDMA_WRITE_WITH_IMM, -- .ex.imm_data = cpu_to_be32(imm_data), -+ wr = (struct ib_rdma_wr) { -+ .wr.wr_cqe = cqe, -+ .wr.send_flags = flags, -+ .wr.opcode = IB_WR_RDMA_WRITE_WITH_IMM, -+ .wr.ex.imm_data = cpu_to_be32(imm_data), - }; - -- return rtrs_post_send(con->qp, head, &wr); -+ return rtrs_post_send(con->qp, head, &wr.wr); - } - EXPORT_SYMBOL_GPL(rtrs_post_rdma_write_imm_empty); - -@@ -231,14 +231,14 @@ static int create_cq(struct rtrs_con *con, int cq_vector, u16 cq_size, - } - - static int create_qp(struct rtrs_con *con, struct ib_pd *pd, -- u16 wr_queue_size, u32 max_sge) -+ u32 max_send_wr, u32 max_recv_wr, u32 max_sge) - { - struct ib_qp_init_attr init_attr = {NULL}; - struct rdma_cm_id *cm_id = con->cm_id; - int ret; - -- init_attr.cap.max_send_wr = wr_queue_size; -- init_attr.cap.max_recv_wr = wr_queue_size; -+ init_attr.cap.max_send_wr = max_send_wr; -+ init_attr.cap.max_recv_wr = max_recv_wr; - init_attr.cap.max_recv_sge = 1; - init_attr.event_handler = qp_event_handler; - init_attr.qp_context = con; -@@ -260,8 +260,9 @@ static int create_qp(struct rtrs_con *con, struct ib_pd *pd, - } - - int rtrs_cq_qp_create(struct rtrs_sess *sess, struct rtrs_con *con, -- u32 max_send_sge, int cq_vector, u16 cq_size, -- u16 wr_queue_size, enum ib_poll_context poll_ctx) -+ u32 max_send_sge, int cq_vector, int cq_size, -+ u32 max_send_wr, u32 max_recv_wr, -+ enum ib_poll_context poll_ctx) - { - int err; - -@@ -269,7 +270,8 @@ int rtrs_cq_qp_create(struct rtrs_sess *sess, struct rtrs_con *con, - if (err) - return err; - -- err = create_qp(con, sess->dev->ib_pd, wr_queue_size, max_send_sge); -+ err = create_qp(con, sess->dev->ib_pd, max_send_wr, max_recv_wr, -+ max_send_sge); - if (err) { - ib_free_cq(con->cq); - con->cq = NULL; -diff --git a/drivers/input/joydev.c b/drivers/input/joydev.c -index a2b5fbba2d3b3..430dc69750048 100644 ---- a/drivers/input/joydev.c -+++ b/drivers/input/joydev.c -@@ -456,7 +456,7 @@ static int joydev_handle_JSIOCSAXMAP(struct joydev *joydev, - if (IS_ERR(abspam)) - return PTR_ERR(abspam); - -- for (i = 0; i < joydev->nabs; i++) { -+ for (i = 0; i < len && i < joydev->nabs; i++) { - if (abspam[i] > ABS_MAX) { - retval = -EINVAL; - goto out; -@@ -480,6 +480,9 @@ static int joydev_handle_JSIOCSBTNMAP(struct joydev *joydev, - int i; - int retval = 0; - -+ if (len % sizeof(*keypam)) -+ return -EINVAL; -+ - len = min(len, sizeof(joydev->keypam)); - - /* Validate the map. */ -@@ -487,7 +490,7 @@ static int joydev_handle_JSIOCSBTNMAP(struct joydev *joydev, - if (IS_ERR(keypam)) - return PTR_ERR(keypam); - -- for (i = 0; i < joydev->nkey; i++) { -+ for (i = 0; i < (len / 2) && i < joydev->nkey; i++) { - if (keypam[i] > KEY_MAX || keypam[i] < BTN_MISC) { - retval = -EINVAL; - goto out; -diff --git a/drivers/input/joystick/xpad.c b/drivers/input/joystick/xpad.c -index 8cc8ca4a9ac01..9f0d07dcbf06b 100644 ---- a/drivers/input/joystick/xpad.c -+++ b/drivers/input/joystick/xpad.c -@@ -305,6 +305,7 @@ static const struct xpad_device { - { 0x1bad, 0xfd00, "Razer Onza TE", 0, XTYPE_XBOX360 }, - { 0x1bad, 0xfd01, "Razer Onza", 0, XTYPE_XBOX360 }, - { 0x20d6, 0x2001, "BDA Xbox Series X Wired Controller", 0, XTYPE_XBOXONE }, -+ { 0x20d6, 0x2009, "PowerA Enhanced Wired Controller for Xbox Series X|S", 0, XTYPE_XBOXONE }, - { 0x20d6, 0x281f, "PowerA Wired Controller For Xbox 360", 0, XTYPE_XBOX360 }, - { 0x2e24, 0x0652, "Hyperkin Duke X-Box One pad", 0, XTYPE_XBOXONE }, - { 0x24c6, 0x5000, "Razer Atrox Arcade Stick", MAP_TRIGGERS_TO_BUTTONS, XTYPE_XBOX360 }, -diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig -index 2b321c17054ad..94eab82086b27 100644 ---- a/drivers/input/keyboard/Kconfig -+++ b/drivers/input/keyboard/Kconfig -@@ -446,7 +446,7 @@ config KEYBOARD_MPR121 - - config KEYBOARD_SNVS_PWRKEY - tristate "IMX SNVS Power Key Driver" -- depends on ARCH_MXC || COMPILE_TEST -+ depends on ARCH_MXC || (COMPILE_TEST && HAS_IOMEM) - depends on OF - help - This is the snvs powerkey driver for the Freescale i.MX application -diff --git a/drivers/input/misc/da7280.c b/drivers/input/misc/da7280.c -index 37568b00873d4..b08610d6e575e 100644 ---- a/drivers/input/misc/da7280.c -+++ b/drivers/input/misc/da7280.c -@@ -863,6 +863,7 @@ static void da7280_parse_properties(struct device *dev, - gpi_str3[7] = '0' + i; - haptics->gpi_ctl[i].polarity = 0; - error = device_property_read_string(dev, gpi_str3, &str); -+ if (!error) - haptics->gpi_ctl[i].polarity = - da7280_haptic_of_gpi_pol_str(dev, str); - } -@@ -1299,11 +1300,13 @@ static int __maybe_unused da7280_resume(struct device *dev) - return retval; - } - -+#ifdef CONFIG_OF - static const struct of_device_id da7280_of_match[] = { - { .compatible = "dlg,da7280", }, - { } - }; - MODULE_DEVICE_TABLE(of, da7280_of_match); -+#endif - - static const struct i2c_device_id da7280_i2c_id[] = { - { "da7280", }, -diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h -index c74b020796a94..9119e12a57784 100644 ---- a/drivers/input/serio/i8042-x86ia64io.h -+++ b/drivers/input/serio/i8042-x86ia64io.h -@@ -588,6 +588,10 @@ static const struct dmi_system_id i8042_dmi_noselftest_table[] = { - DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), - DMI_MATCH(DMI_CHASSIS_TYPE, "10"), /* Notebook */ - }, -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), -+ DMI_MATCH(DMI_CHASSIS_TYPE, "31"), /* Convertible Notebook */ -+ }, - }, - { } - }; -diff --git a/drivers/input/serio/serport.c b/drivers/input/serio/serport.c -index 8ac970a423de6..33e9d9bfd036f 100644 ---- a/drivers/input/serio/serport.c -+++ b/drivers/input/serio/serport.c -@@ -156,7 +156,9 @@ out: - * returning 0 characters. - */ - --static ssize_t serport_ldisc_read(struct tty_struct * tty, struct file * file, unsigned char __user * buf, size_t nr) -+static ssize_t serport_ldisc_read(struct tty_struct * tty, struct file * file, -+ unsigned char *kbuf, size_t nr, -+ void **cookie, unsigned long offset) - { - struct serport *serport = (struct serport*) tty->disc_data; - struct serio *serio; -diff --git a/drivers/input/touchscreen/elo.c b/drivers/input/touchscreen/elo.c -index e0bacd34866ad..96173232e53fe 100644 ---- a/drivers/input/touchscreen/elo.c -+++ b/drivers/input/touchscreen/elo.c -@@ -341,8 +341,10 @@ static int elo_connect(struct serio *serio, struct serio_driver *drv) - switch (elo->id) { - - case 0: /* 10-byte protocol */ -- if (elo_setup_10(elo)) -+ if (elo_setup_10(elo)) { -+ err = -EIO; - goto fail3; -+ } - - break; - -diff --git a/drivers/input/touchscreen/raydium_i2c_ts.c b/drivers/input/touchscreen/raydium_i2c_ts.c -index 603a948460d64..4d2d22a869773 100644 ---- a/drivers/input/touchscreen/raydium_i2c_ts.c -+++ b/drivers/input/touchscreen/raydium_i2c_ts.c -@@ -445,6 +445,7 @@ static int raydium_i2c_write_object(struct i2c_client *client, - enum raydium_bl_ack state) - { - int error; -+ static const u8 cmd[] = { 0xFF, 0x39 }; - - error = raydium_i2c_send(client, RM_CMD_BOOT_WRT, data, len); - if (error) { -@@ -453,7 +454,7 @@ static int raydium_i2c_write_object(struct i2c_client *client, - return error; - } - -- error = raydium_i2c_send(client, RM_CMD_BOOT_ACK, NULL, 0); -+ error = raydium_i2c_send(client, RM_CMD_BOOT_ACK, cmd, sizeof(cmd)); - if (error) { - dev_err(&client->dev, "Ack obj command failed: %d\n", error); - return error; -diff --git a/drivers/input/touchscreen/st1232.c b/drivers/input/touchscreen/st1232.c -index b4e7bcbe9b91d..6abae665ca71d 100644 ---- a/drivers/input/touchscreen/st1232.c -+++ b/drivers/input/touchscreen/st1232.c -@@ -94,8 +94,13 @@ static int st1232_ts_wait_ready(struct st1232_ts_data *ts) - - for (retries = 10; retries; retries--) { - error = st1232_ts_read_data(ts, REG_STATUS, 1); -- if (!error && ts->read_buf[0] == (STATUS_NORMAL | ERROR_NONE)) -- return 0; -+ if (!error) { -+ switch (ts->read_buf[0]) { -+ case STATUS_NORMAL | ERROR_NONE: -+ case STATUS_IDLE | ERROR_NONE: -+ return 0; -+ } -+ } - - usleep_range(1000, 2000); - } -diff --git a/drivers/input/touchscreen/sur40.c b/drivers/input/touchscreen/sur40.c -index 620cdd7d214a6..12f2562b0141b 100644 ---- a/drivers/input/touchscreen/sur40.c -+++ b/drivers/input/touchscreen/sur40.c -@@ -787,6 +787,7 @@ static int sur40_probe(struct usb_interface *interface, - dev_err(&interface->dev, - "Unable to register video controls."); - v4l2_ctrl_handler_free(&sur40->hdl); -+ error = sur40->hdl.error; - goto err_unreg_v4l2; - } - -diff --git a/drivers/input/touchscreen/zinitix.c b/drivers/input/touchscreen/zinitix.c -index a3e3adbabc673..b1548971d683e 100644 ---- a/drivers/input/touchscreen/zinitix.c -+++ b/drivers/input/touchscreen/zinitix.c -@@ -190,7 +190,7 @@ static int zinitix_write_cmd(struct i2c_client *client, u16 reg) - return 0; - } - --static bool zinitix_init_touch(struct bt541_ts_data *bt541) -+static int zinitix_init_touch(struct bt541_ts_data *bt541) - { - struct i2c_client *client = bt541->client; - int i; -diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c -index 8ca7415d785d9..c70d6e79f5346 100644 ---- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c -+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c -@@ -2280,7 +2280,7 @@ static void arm_smmu_iotlb_sync(struct iommu_domain *domain, - { - struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); - -- arm_smmu_tlb_inv_range(gather->start, gather->end - gather->start, -+ arm_smmu_tlb_inv_range(gather->start, gather->end - gather->start + 1, - gather->pgsize, true, smmu_domain); - } - -diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c -index bcda17012aee8..abb1d2f4ce301 100644 ---- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c -+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c -@@ -206,6 +206,8 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) - smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i)); - - if (FIELD_GET(ARM_SMMU_SMR_VALID, smr)) { -+ /* Ignore valid bit for SMR mask extraction. */ -+ smr &= ~ARM_SMMU_SMR_VALID; - smmu->smrs[i].id = FIELD_GET(ARM_SMMU_SMR_ID, smr); - smmu->smrs[i].mask = FIELD_GET(ARM_SMMU_SMR_MASK, smr); - smmu->smrs[i].valid = true; -diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c -index ffeebda8d6def..fd5f59373fc62 100644 ---- a/drivers/iommu/iommu.c -+++ b/drivers/iommu/iommu.c -@@ -2426,9 +2426,6 @@ static int __iommu_map(struct iommu_domain *domain, unsigned long iova, - size -= pgsize; - } - -- if (ops->iotlb_sync_map) -- ops->iotlb_sync_map(domain); -- - /* unroll mapping in case something went wrong */ - if (ret) - iommu_unmap(domain, orig_iova, orig_size - size); -@@ -2438,18 +2435,31 @@ static int __iommu_map(struct iommu_domain *domain, unsigned long iova, - return ret; - } - -+static int _iommu_map(struct iommu_domain *domain, unsigned long iova, -+ phys_addr_t paddr, size_t size, int prot, gfp_t gfp) -+{ -+ const struct iommu_ops *ops = domain->ops; -+ int ret; -+ -+ ret = __iommu_map(domain, iova, paddr, size, prot, gfp); -+ if (ret == 0 && ops->iotlb_sync_map) -+ ops->iotlb_sync_map(domain); -+ -+ return ret; -+} -+ - int iommu_map(struct iommu_domain *domain, unsigned long iova, - phys_addr_t paddr, size_t size, int prot) - { - might_sleep(); -- return __iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL); -+ return _iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL); - } - EXPORT_SYMBOL_GPL(iommu_map); - - int iommu_map_atomic(struct iommu_domain *domain, unsigned long iova, - phys_addr_t paddr, size_t size, int prot) - { -- return __iommu_map(domain, iova, paddr, size, prot, GFP_ATOMIC); -+ return _iommu_map(domain, iova, paddr, size, prot, GFP_ATOMIC); - } - EXPORT_SYMBOL_GPL(iommu_map_atomic); - -@@ -2533,6 +2543,7 @@ static size_t __iommu_map_sg(struct iommu_domain *domain, unsigned long iova, - struct scatterlist *sg, unsigned int nents, int prot, - gfp_t gfp) - { -+ const struct iommu_ops *ops = domain->ops; - size_t len = 0, mapped = 0; - phys_addr_t start; - unsigned int i = 0; -@@ -2563,6 +2574,8 @@ static size_t __iommu_map_sg(struct iommu_domain *domain, unsigned long iova, - sg = sg_next(sg); - } - -+ if (ops->iotlb_sync_map) -+ ops->iotlb_sync_map(domain); - return mapped; - - out_err: -diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c -index 8e56cec532e71..bfe6ec329f8d5 100644 ---- a/drivers/iommu/mtk_iommu.c -+++ b/drivers/iommu/mtk_iommu.c -@@ -444,7 +444,7 @@ static void mtk_iommu_iotlb_sync(struct iommu_domain *domain, - struct iommu_iotlb_gather *gather) - { - struct mtk_iommu_data *data = mtk_iommu_get_m4u_data(); -- size_t length = gather->end - gather->start; -+ size_t length = gather->end - gather->start + 1; - - if (gather->start == ULONG_MAX) - return; -diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig -index b147f22a78f48..d7d1a0fab2c1a 100644 ---- a/drivers/irqchip/Kconfig -+++ b/drivers/irqchip/Kconfig -@@ -457,7 +457,8 @@ config IMX_IRQSTEER - Support for the i.MX IRQSTEER interrupt multiplexer/remapper. - - config IMX_INTMUX -- def_bool y if ARCH_MXC || COMPILE_TEST -+ bool "i.MX INTMUX support" if COMPILE_TEST -+ default y if ARCH_MXC - select IRQ_DOMAIN - help - Support for the i.MX INTMUX interrupt multiplexer. -diff --git a/drivers/irqchip/irq-loongson-pch-msi.c b/drivers/irqchip/irq-loongson-pch-msi.c -index 12aeeab432893..32562b7e681b5 100644 ---- a/drivers/irqchip/irq-loongson-pch-msi.c -+++ b/drivers/irqchip/irq-loongson-pch-msi.c -@@ -225,7 +225,7 @@ static int pch_msi_init(struct device_node *node, - goto err_priv; - } - -- priv->msi_map = bitmap_alloc(priv->num_irqs, GFP_KERNEL); -+ priv->msi_map = bitmap_zalloc(priv->num_irqs, GFP_KERNEL); - if (!priv->msi_map) { - ret = -ENOMEM; - goto err_priv; -diff --git a/drivers/irqchip/irq-ls-extirq.c b/drivers/irqchip/irq-ls-extirq.c -index f94f974a87645..853b3972dbe78 100644 ---- a/drivers/irqchip/irq-ls-extirq.c -+++ b/drivers/irqchip/irq-ls-extirq.c -@@ -64,7 +64,7 @@ static struct irq_chip ls_extirq_chip = { - .irq_set_type = ls_extirq_set_type, - .irq_retrigger = irq_chip_retrigger_hierarchy, - .irq_set_affinity = irq_chip_set_affinity_parent, -- .flags = IRQCHIP_SET_TYPE_MASKED, -+ .flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_SKIP_SET_WAKE, - }; - - static int -diff --git a/drivers/macintosh/adb-iop.c b/drivers/macintosh/adb-iop.c -index 0ee3272491501..2633bc254935c 100644 ---- a/drivers/macintosh/adb-iop.c -+++ b/drivers/macintosh/adb-iop.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - - #include - -@@ -249,7 +250,7 @@ static void adb_iop_set_ap_complete(struct iop_msg *msg) - { - struct adb_iopmsg *amsg = (struct adb_iopmsg *)msg->message; - -- autopoll_devs = (amsg->data[1] << 8) | amsg->data[0]; -+ autopoll_devs = get_unaligned_be16(amsg->data); - if (autopoll_devs & (1 << autopoll_addr)) - return; - autopoll_addr = autopoll_devs ? (ffs(autopoll_devs) - 1) : 0; -@@ -266,8 +267,7 @@ static int adb_iop_autopoll(int devs) - amsg.flags = ADB_IOP_SET_AUTOPOLL | (mask ? ADB_IOP_AUTOPOLL : 0); - amsg.count = 2; - amsg.cmd = 0; -- amsg.data[0] = mask & 0xFF; -- amsg.data[1] = (mask >> 8) & 0xFF; -+ put_unaligned_be16(mask, amsg.data); - - iop_send_message(ADB_IOP, ADB_CHAN, NULL, sizeof(amsg), (__u8 *)&amsg, - adb_iop_set_ap_complete); -diff --git a/drivers/mailbox/arm_mhuv2.c b/drivers/mailbox/arm_mhuv2.c -index 67fb10885bb4f..9f71de666e3f6 100644 ---- a/drivers/mailbox/arm_mhuv2.c -+++ b/drivers/mailbox/arm_mhuv2.c -@@ -699,7 +699,9 @@ static irqreturn_t mhuv2_receiver_interrupt(int irq, void *arg) - ret = IRQ_HANDLED; - } - -- kfree(data); -+ if (!IS_ERR(data)) -+ kfree(data); -+ - return ret; - } - -diff --git a/drivers/mailbox/sprd-mailbox.c b/drivers/mailbox/sprd-mailbox.c -index f6fab24ae8a9a..4c325301a2fe8 100644 ---- a/drivers/mailbox/sprd-mailbox.c -+++ b/drivers/mailbox/sprd-mailbox.c -@@ -35,7 +35,7 @@ - #define SPRD_MBOX_IRQ_CLR BIT(0) - - /* Bit and mask definiation for outbox's SPRD_MBOX_FIFO_STS register */ --#define SPRD_OUTBOX_FIFO_FULL BIT(0) -+#define SPRD_OUTBOX_FIFO_FULL BIT(2) - #define SPRD_OUTBOX_FIFO_WR_SHIFT 16 - #define SPRD_OUTBOX_FIFO_RD_SHIFT 24 - #define SPRD_OUTBOX_FIFO_POS_MASK GENMASK(7, 0) -diff --git a/drivers/md/bcache/bcache.h b/drivers/md/bcache/bcache.h -index 1d57f48307e66..e8bf4f752e8be 100644 ---- a/drivers/md/bcache/bcache.h -+++ b/drivers/md/bcache/bcache.h -@@ -1001,6 +1001,7 @@ void bch_write_bdev_super(struct cached_dev *dc, struct closure *parent); - - extern struct workqueue_struct *bcache_wq; - extern struct workqueue_struct *bch_journal_wq; -+extern struct workqueue_struct *bch_flush_wq; - extern struct mutex bch_register_lock; - extern struct list_head bch_cache_sets; - -@@ -1042,5 +1043,7 @@ void bch_debug_exit(void); - void bch_debug_init(void); - void bch_request_exit(void); - int bch_request_init(void); -+void bch_btree_exit(void); -+int bch_btree_init(void); - - #endif /* _BCACHE_H */ -diff --git a/drivers/md/bcache/btree.c b/drivers/md/bcache/btree.c -index 910df242c83df..fe6dce125aba2 100644 ---- a/drivers/md/bcache/btree.c -+++ b/drivers/md/bcache/btree.c -@@ -99,6 +99,8 @@ - #define PTR_HASH(c, k) \ - (((k)->ptr[0] >> c->bucket_bits) | PTR_GEN(k, 0)) - -+static struct workqueue_struct *btree_io_wq; -+ - #define insert_lock(s, b) ((b)->level <= (s)->lock) - - -@@ -308,7 +310,7 @@ static void __btree_node_write_done(struct closure *cl) - btree_complete_write(b, w); - - if (btree_node_dirty(b)) -- schedule_delayed_work(&b->work, 30 * HZ); -+ queue_delayed_work(btree_io_wq, &b->work, 30 * HZ); - - closure_return_with_destructor(cl, btree_node_write_unlock); - } -@@ -481,7 +483,7 @@ static void bch_btree_leaf_dirty(struct btree *b, atomic_t *journal_ref) - BUG_ON(!i->keys); - - if (!btree_node_dirty(b)) -- schedule_delayed_work(&b->work, 30 * HZ); -+ queue_delayed_work(btree_io_wq, &b->work, 30 * HZ); - - set_btree_node_dirty(b); - -@@ -2764,3 +2766,18 @@ void bch_keybuf_init(struct keybuf *buf) - spin_lock_init(&buf->lock); - array_allocator_init(&buf->freelist); - } -+ -+void bch_btree_exit(void) -+{ -+ if (btree_io_wq) -+ destroy_workqueue(btree_io_wq); -+} -+ -+int __init bch_btree_init(void) -+{ -+ btree_io_wq = alloc_workqueue("bch_btree_io", WQ_MEM_RECLAIM, 0); -+ if (!btree_io_wq) -+ return -ENOMEM; -+ -+ return 0; -+} -diff --git a/drivers/md/bcache/journal.c b/drivers/md/bcache/journal.c -index aefbdb7e003bc..c6613e8173337 100644 ---- a/drivers/md/bcache/journal.c -+++ b/drivers/md/bcache/journal.c -@@ -932,8 +932,8 @@ atomic_t *bch_journal(struct cache_set *c, - journal_try_write(c); - } else if (!w->dirty) { - w->dirty = true; -- schedule_delayed_work(&c->journal.work, -- msecs_to_jiffies(c->journal_delay_ms)); -+ queue_delayed_work(bch_flush_wq, &c->journal.work, -+ msecs_to_jiffies(c->journal_delay_ms)); - spin_unlock(&c->journal.lock); - } else { - spin_unlock(&c->journal.lock); -diff --git a/drivers/md/bcache/super.c b/drivers/md/bcache/super.c -index 2047a9cccdb5d..7457ec160c9a1 100644 ---- a/drivers/md/bcache/super.c -+++ b/drivers/md/bcache/super.c -@@ -49,6 +49,7 @@ static int bcache_major; - static DEFINE_IDA(bcache_device_idx); - static wait_queue_head_t unregister_wait; - struct workqueue_struct *bcache_wq; -+struct workqueue_struct *bch_flush_wq; - struct workqueue_struct *bch_journal_wq; - - -@@ -2821,6 +2822,9 @@ static void bcache_exit(void) - destroy_workqueue(bcache_wq); - if (bch_journal_wq) - destroy_workqueue(bch_journal_wq); -+ if (bch_flush_wq) -+ destroy_workqueue(bch_flush_wq); -+ bch_btree_exit(); - - if (bcache_major) - unregister_blkdev(bcache_major, "bcache"); -@@ -2876,10 +2880,26 @@ static int __init bcache_init(void) - return bcache_major; - } - -+ if (bch_btree_init()) -+ goto err; -+ - bcache_wq = alloc_workqueue("bcache", WQ_MEM_RECLAIM, 0); - if (!bcache_wq) - goto err; - -+ /* -+ * Let's not make this `WQ_MEM_RECLAIM` for the following reasons: -+ * -+ * 1. It used `system_wq` before which also does no memory reclaim. -+ * 2. With `WQ_MEM_RECLAIM` desktop stalls, increased boot times, and -+ * reduced throughput can be observed. -+ * -+ * We still want to user our own queue to not congest the `system_wq`. -+ */ -+ bch_flush_wq = alloc_workqueue("bch_flush", 0, 0); -+ if (!bch_flush_wq) -+ goto err; -+ - bch_journal_wq = alloc_workqueue("bch_journal", WQ_MEM_RECLAIM, 0); - if (!bch_journal_wq) - goto err; -diff --git a/drivers/md/dm-core.h b/drivers/md/dm-core.h -index 086d293c2b036..2576c966a0096 100644 ---- a/drivers/md/dm-core.h -+++ b/drivers/md/dm-core.h -@@ -102,6 +102,10 @@ struct mapped_device { - /* kobject and completion */ - struct dm_kobject_holder kobj_holder; - -+ int swap_bios; -+ struct semaphore swap_bios_semaphore; -+ struct mutex swap_bios_lock; -+ - struct dm_stats stats; - - /* for blk-mq request-based DM support */ -diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c -index 5a55617a08e68..07aa619d36e7b 100644 ---- a/drivers/md/dm-crypt.c -+++ b/drivers/md/dm-crypt.c -@@ -3324,6 +3324,7 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv) - wake_up_process(cc->write_thread); - - ti->num_flush_bios = 1; -+ ti->limit_swap_bios = true; - - return 0; - -diff --git a/drivers/md/dm-era-target.c b/drivers/md/dm-era-target.c -index b24e3839bb3a1..d9ac7372108c9 100644 ---- a/drivers/md/dm-era-target.c -+++ b/drivers/md/dm-era-target.c -@@ -47,6 +47,7 @@ struct writeset { - static void writeset_free(struct writeset *ws) - { - vfree(ws->bits); -+ ws->bits = NULL; - } - - static int setup_on_disk_bitset(struct dm_disk_bitset *info, -@@ -71,8 +72,6 @@ static size_t bitset_size(unsigned nr_bits) - */ - static int writeset_alloc(struct writeset *ws, dm_block_t nr_blocks) - { -- ws->md.nr_bits = nr_blocks; -- ws->md.root = INVALID_WRITESET_ROOT; - ws->bits = vzalloc(bitset_size(nr_blocks)); - if (!ws->bits) { - DMERR("%s: couldn't allocate in memory bitset", __func__); -@@ -85,12 +84,14 @@ static int writeset_alloc(struct writeset *ws, dm_block_t nr_blocks) - /* - * Wipes the in-core bitset, and creates a new on disk bitset. - */ --static int writeset_init(struct dm_disk_bitset *info, struct writeset *ws) -+static int writeset_init(struct dm_disk_bitset *info, struct writeset *ws, -+ dm_block_t nr_blocks) - { - int r; - -- memset(ws->bits, 0, bitset_size(ws->md.nr_bits)); -+ memset(ws->bits, 0, bitset_size(nr_blocks)); - -+ ws->md.nr_bits = nr_blocks; - r = setup_on_disk_bitset(info, ws->md.nr_bits, &ws->md.root); - if (r) { - DMERR("%s: setup_on_disk_bitset failed", __func__); -@@ -134,7 +135,7 @@ static int writeset_test_and_set(struct dm_disk_bitset *info, - { - int r; - -- if (!test_and_set_bit(block, ws->bits)) { -+ if (!test_bit(block, ws->bits)) { - r = dm_bitset_set_bit(info, ws->md.root, block, &ws->md.root); - if (r) { - /* FIXME: fail mode */ -@@ -388,7 +389,7 @@ static void ws_dec(void *context, const void *value) - - static int ws_eq(void *context, const void *value1, const void *value2) - { -- return !memcmp(value1, value2, sizeof(struct writeset_metadata)); -+ return !memcmp(value1, value2, sizeof(struct writeset_disk)); - } - - /*----------------------------------------------------------------*/ -@@ -564,6 +565,15 @@ static int open_metadata(struct era_metadata *md) - } - - disk = dm_block_data(sblock); -+ -+ /* Verify the data block size hasn't changed */ -+ if (le32_to_cpu(disk->data_block_size) != md->block_size) { -+ DMERR("changing the data block size (from %u to %llu) is not supported", -+ le32_to_cpu(disk->data_block_size), md->block_size); -+ r = -EINVAL; -+ goto bad; -+ } -+ - r = dm_tm_open_with_sm(md->bm, SUPERBLOCK_LOCATION, - disk->metadata_space_map_root, - sizeof(disk->metadata_space_map_root), -@@ -575,10 +585,10 @@ static int open_metadata(struct era_metadata *md) - - setup_infos(md); - -- md->block_size = le32_to_cpu(disk->data_block_size); - md->nr_blocks = le32_to_cpu(disk->nr_blocks); - md->current_era = le32_to_cpu(disk->current_era); - -+ ws_unpack(&disk->current_writeset, &md->current_writeset->md); - md->writeset_tree_root = le64_to_cpu(disk->writeset_tree_root); - md->era_array_root = le64_to_cpu(disk->era_array_root); - md->metadata_snap = le64_to_cpu(disk->metadata_snap); -@@ -746,6 +756,12 @@ static int metadata_digest_lookup_writeset(struct era_metadata *md, - ws_unpack(&disk, &d->writeset); - d->value = cpu_to_le32(key); - -+ /* -+ * We initialise another bitset info to avoid any caching side effects -+ * with the previous one. -+ */ -+ dm_disk_bitset_init(md->tm, &d->info); -+ - d->nr_bits = min(d->writeset.nr_bits, md->nr_blocks); - d->current_bit = 0; - d->step = metadata_digest_transcribe_writeset; -@@ -759,12 +775,6 @@ static int metadata_digest_start(struct era_metadata *md, struct digest *d) - return 0; - - memset(d, 0, sizeof(*d)); -- -- /* -- * We initialise another bitset info to avoid any caching side -- * effects with the previous one. -- */ -- dm_disk_bitset_init(md->tm, &d->info); - d->step = metadata_digest_lookup_writeset; - - return 0; -@@ -802,6 +812,8 @@ static struct era_metadata *metadata_open(struct block_device *bdev, - - static void metadata_close(struct era_metadata *md) - { -+ writeset_free(&md->writesets[0]); -+ writeset_free(&md->writesets[1]); - destroy_persistent_data_objects(md); - kfree(md); - } -@@ -839,6 +851,7 @@ static int metadata_resize(struct era_metadata *md, void *arg) - r = writeset_alloc(&md->writesets[1], *new_size); - if (r) { - DMERR("%s: writeset_alloc failed for writeset 1", __func__); -+ writeset_free(&md->writesets[0]); - return r; - } - -@@ -849,6 +862,8 @@ static int metadata_resize(struct era_metadata *md, void *arg) - &value, &md->era_array_root); - if (r) { - DMERR("%s: dm_array_resize failed", __func__); -+ writeset_free(&md->writesets[0]); -+ writeset_free(&md->writesets[1]); - return r; - } - -@@ -870,7 +885,6 @@ static int metadata_era_archive(struct era_metadata *md) - } - - ws_pack(&md->current_writeset->md, &value); -- md->current_writeset->md.root = INVALID_WRITESET_ROOT; - - keys[0] = md->current_era; - __dm_bless_for_disk(&value); -@@ -882,6 +896,7 @@ static int metadata_era_archive(struct era_metadata *md) - return r; - } - -+ md->current_writeset->md.root = INVALID_WRITESET_ROOT; - md->archived_writesets = true; - - return 0; -@@ -898,7 +913,7 @@ static int metadata_new_era(struct era_metadata *md) - int r; - struct writeset *new_writeset = next_writeset(md); - -- r = writeset_init(&md->bitset_info, new_writeset); -+ r = writeset_init(&md->bitset_info, new_writeset, md->nr_blocks); - if (r) { - DMERR("%s: writeset_init failed", __func__); - return r; -@@ -951,7 +966,7 @@ static int metadata_commit(struct era_metadata *md) - int r; - struct dm_block *sblock; - -- if (md->current_writeset->md.root != SUPERBLOCK_LOCATION) { -+ if (md->current_writeset->md.root != INVALID_WRITESET_ROOT) { - r = dm_bitset_flush(&md->bitset_info, md->current_writeset->md.root, - &md->current_writeset->md.root); - if (r) { -@@ -1225,8 +1240,10 @@ static void process_deferred_bios(struct era *era) - int r; - struct bio_list deferred_bios, marked_bios; - struct bio *bio; -+ struct blk_plug plug; - bool commit_needed = false; - bool failed = false; -+ struct writeset *ws = era->md->current_writeset; - - bio_list_init(&deferred_bios); - bio_list_init(&marked_bios); -@@ -1236,9 +1253,11 @@ static void process_deferred_bios(struct era *era) - bio_list_init(&era->deferred_bios); - spin_unlock(&era->deferred_lock); - -+ if (bio_list_empty(&deferred_bios)) -+ return; -+ - while ((bio = bio_list_pop(&deferred_bios))) { -- r = writeset_test_and_set(&era->md->bitset_info, -- era->md->current_writeset, -+ r = writeset_test_and_set(&era->md->bitset_info, ws, - get_block(era, bio)); - if (r < 0) { - /* -@@ -1246,7 +1265,6 @@ static void process_deferred_bios(struct era *era) - * FIXME: finish. - */ - failed = true; -- - } else if (r == 0) - commit_needed = true; - -@@ -1262,9 +1280,19 @@ static void process_deferred_bios(struct era *era) - if (failed) - while ((bio = bio_list_pop(&marked_bios))) - bio_io_error(bio); -- else -- while ((bio = bio_list_pop(&marked_bios))) -+ else { -+ blk_start_plug(&plug); -+ while ((bio = bio_list_pop(&marked_bios))) { -+ /* -+ * Only update the in-core writeset if the on-disk one -+ * was updated too. -+ */ -+ if (commit_needed) -+ set_bit(get_block(era, bio), ws->bits); - submit_bio_noacct(bio); -+ } -+ blk_finish_plug(&plug); -+ } - } - - static void process_rpc_calls(struct era *era) -@@ -1473,15 +1501,6 @@ static int era_ctr(struct dm_target *ti, unsigned argc, char **argv) - } - era->md = md; - -- era->nr_blocks = calc_nr_blocks(era); -- -- r = metadata_resize(era->md, &era->nr_blocks); -- if (r) { -- ti->error = "couldn't resize metadata"; -- era_destroy(era); -- return -ENOMEM; -- } -- - era->wq = alloc_ordered_workqueue("dm-" DM_MSG_PREFIX, WQ_MEM_RECLAIM); - if (!era->wq) { - ti->error = "could not create workqueue for metadata object"; -@@ -1556,16 +1575,24 @@ static int era_preresume(struct dm_target *ti) - dm_block_t new_size = calc_nr_blocks(era); - - if (era->nr_blocks != new_size) { -- r = in_worker1(era, metadata_resize, &new_size); -- if (r) -+ r = metadata_resize(era->md, &new_size); -+ if (r) { -+ DMERR("%s: metadata_resize failed", __func__); -+ return r; -+ } -+ -+ r = metadata_commit(era->md); -+ if (r) { -+ DMERR("%s: metadata_commit failed", __func__); - return r; -+ } - - era->nr_blocks = new_size; - } - - start_worker(era); - -- r = in_worker0(era, metadata_new_era); -+ r = in_worker0(era, metadata_era_rollover); - if (r) { - DMERR("%s: metadata_era_rollover failed", __func__); - return r; -diff --git a/drivers/md/dm-table.c b/drivers/md/dm-table.c -index 4acf2342f7adf..77086db8b9200 100644 ---- a/drivers/md/dm-table.c -+++ b/drivers/md/dm-table.c -@@ -820,24 +820,24 @@ void dm_table_set_type(struct dm_table *t, enum dm_queue_mode type) - EXPORT_SYMBOL_GPL(dm_table_set_type); - - /* validate the dax capability of the target device span */ --int device_supports_dax(struct dm_target *ti, struct dm_dev *dev, -+int device_not_dax_capable(struct dm_target *ti, struct dm_dev *dev, - sector_t start, sector_t len, void *data) - { - int blocksize = *(int *) data, id; - bool rc; - - id = dax_read_lock(); -- rc = dax_supported(dev->dax_dev, dev->bdev, blocksize, start, len); -+ rc = !dax_supported(dev->dax_dev, dev->bdev, blocksize, start, len); - dax_read_unlock(id); - - return rc; - } - - /* Check devices support synchronous DAX */ --static int device_dax_synchronous(struct dm_target *ti, struct dm_dev *dev, -- sector_t start, sector_t len, void *data) -+static int device_not_dax_synchronous_capable(struct dm_target *ti, struct dm_dev *dev, -+ sector_t start, sector_t len, void *data) - { -- return dev->dax_dev && dax_synchronous(dev->dax_dev); -+ return !dev->dax_dev || !dax_synchronous(dev->dax_dev); - } - - bool dm_table_supports_dax(struct dm_table *t, -@@ -854,7 +854,7 @@ bool dm_table_supports_dax(struct dm_table *t, - return false; - - if (!ti->type->iterate_devices || -- !ti->type->iterate_devices(ti, iterate_fn, blocksize)) -+ ti->type->iterate_devices(ti, iterate_fn, blocksize)) - return false; - } - -@@ -925,7 +925,7 @@ static int dm_table_determine_type(struct dm_table *t) - verify_bio_based: - /* We must use this table as bio-based */ - t->type = DM_TYPE_BIO_BASED; -- if (dm_table_supports_dax(t, device_supports_dax, &page_size) || -+ if (dm_table_supports_dax(t, device_not_dax_capable, &page_size) || - (list_empty(devices) && live_md_type == DM_TYPE_DAX_BIO_BASED)) { - t->type = DM_TYPE_DAX_BIO_BASED; - } -@@ -1295,6 +1295,46 @@ struct dm_target *dm_table_find_target(struct dm_table *t, sector_t sector) - return &t->targets[(KEYS_PER_NODE * n) + k]; - } - -+/* -+ * type->iterate_devices() should be called when the sanity check needs to -+ * iterate and check all underlying data devices. iterate_devices() will -+ * iterate all underlying data devices until it encounters a non-zero return -+ * code, returned by whether the input iterate_devices_callout_fn, or -+ * iterate_devices() itself internally. -+ * -+ * For some target type (e.g. dm-stripe), one call of iterate_devices() may -+ * iterate multiple underlying devices internally, in which case a non-zero -+ * return code returned by iterate_devices_callout_fn will stop the iteration -+ * in advance. -+ * -+ * Cases requiring _any_ underlying device supporting some kind of attribute, -+ * should use the iteration structure like dm_table_any_dev_attr(), or call -+ * it directly. @func should handle semantics of positive examples, e.g. -+ * capable of something. -+ * -+ * Cases requiring _all_ underlying devices supporting some kind of attribute, -+ * should use the iteration structure like dm_table_supports_nowait() or -+ * dm_table_supports_discards(). Or introduce dm_table_all_devs_attr() that -+ * uses an @anti_func that handle semantics of counter examples, e.g. not -+ * capable of something. So: return !dm_table_any_dev_attr(t, anti_func, data); -+ */ -+static bool dm_table_any_dev_attr(struct dm_table *t, -+ iterate_devices_callout_fn func, void *data) -+{ -+ struct dm_target *ti; -+ unsigned int i; -+ -+ for (i = 0; i < dm_table_get_num_targets(t); i++) { -+ ti = dm_table_get_target(t, i); -+ -+ if (ti->type->iterate_devices && -+ ti->type->iterate_devices(ti, func, data)) -+ return true; -+ } -+ -+ return false; -+} -+ - static int count_device(struct dm_target *ti, struct dm_dev *dev, - sector_t start, sector_t len, void *data) - { -@@ -1331,13 +1371,13 @@ bool dm_table_has_no_data_devices(struct dm_table *table) - return true; - } - --static int device_is_zoned_model(struct dm_target *ti, struct dm_dev *dev, -- sector_t start, sector_t len, void *data) -+static int device_not_zoned_model(struct dm_target *ti, struct dm_dev *dev, -+ sector_t start, sector_t len, void *data) - { - struct request_queue *q = bdev_get_queue(dev->bdev); - enum blk_zoned_model *zoned_model = data; - -- return q && blk_queue_zoned_model(q) == *zoned_model; -+ return !q || blk_queue_zoned_model(q) != *zoned_model; - } - - static bool dm_table_supports_zoned_model(struct dm_table *t, -@@ -1354,37 +1394,20 @@ static bool dm_table_supports_zoned_model(struct dm_table *t, - return false; - - if (!ti->type->iterate_devices || -- !ti->type->iterate_devices(ti, device_is_zoned_model, &zoned_model)) -+ ti->type->iterate_devices(ti, device_not_zoned_model, &zoned_model)) - return false; - } - - return true; - } - --static int device_matches_zone_sectors(struct dm_target *ti, struct dm_dev *dev, -- sector_t start, sector_t len, void *data) -+static int device_not_matches_zone_sectors(struct dm_target *ti, struct dm_dev *dev, -+ sector_t start, sector_t len, void *data) - { - struct request_queue *q = bdev_get_queue(dev->bdev); - unsigned int *zone_sectors = data; - -- return q && blk_queue_zone_sectors(q) == *zone_sectors; --} -- --static bool dm_table_matches_zone_sectors(struct dm_table *t, -- unsigned int zone_sectors) --{ -- struct dm_target *ti; -- unsigned i; -- -- for (i = 0; i < dm_table_get_num_targets(t); i++) { -- ti = dm_table_get_target(t, i); -- -- if (!ti->type->iterate_devices || -- !ti->type->iterate_devices(ti, device_matches_zone_sectors, &zone_sectors)) -- return false; -- } -- -- return true; -+ return !q || blk_queue_zone_sectors(q) != *zone_sectors; - } - - static int validate_hardware_zoned_model(struct dm_table *table, -@@ -1404,7 +1427,7 @@ static int validate_hardware_zoned_model(struct dm_table *table, - if (!zone_sectors || !is_power_of_2(zone_sectors)) - return -EINVAL; - -- if (!dm_table_matches_zone_sectors(table, zone_sectors)) { -+ if (dm_table_any_dev_attr(table, device_not_matches_zone_sectors, &zone_sectors)) { - DMERR("%s: zone sectors is not consistent across all devices", - dm_device_name(table->md)); - return -EINVAL; -@@ -1578,29 +1601,12 @@ static int device_dax_write_cache_enabled(struct dm_target *ti, - return false; - } - --static int dm_table_supports_dax_write_cache(struct dm_table *t) --{ -- struct dm_target *ti; -- unsigned i; -- -- for (i = 0; i < dm_table_get_num_targets(t); i++) { -- ti = dm_table_get_target(t, i); -- -- if (ti->type->iterate_devices && -- ti->type->iterate_devices(ti, -- device_dax_write_cache_enabled, NULL)) -- return true; -- } -- -- return false; --} -- --static int device_is_nonrot(struct dm_target *ti, struct dm_dev *dev, -- sector_t start, sector_t len, void *data) -+static int device_is_rotational(struct dm_target *ti, struct dm_dev *dev, -+ sector_t start, sector_t len, void *data) - { - struct request_queue *q = bdev_get_queue(dev->bdev); - -- return q && blk_queue_nonrot(q); -+ return q && !blk_queue_nonrot(q); - } - - static int device_is_not_random(struct dm_target *ti, struct dm_dev *dev, -@@ -1611,23 +1617,6 @@ static int device_is_not_random(struct dm_target *ti, struct dm_dev *dev, - return q && !blk_queue_add_random(q); - } - --static bool dm_table_all_devices_attribute(struct dm_table *t, -- iterate_devices_callout_fn func) --{ -- struct dm_target *ti; -- unsigned i; -- -- for (i = 0; i < dm_table_get_num_targets(t); i++) { -- ti = dm_table_get_target(t, i); -- -- if (!ti->type->iterate_devices || -- !ti->type->iterate_devices(ti, func, NULL)) -- return false; -- } -- -- return true; --} -- - static int device_not_write_same_capable(struct dm_target *ti, struct dm_dev *dev, - sector_t start, sector_t len, void *data) - { -@@ -1779,27 +1768,6 @@ static int device_requires_stable_pages(struct dm_target *ti, - return q && blk_queue_stable_writes(q); - } - --/* -- * If any underlying device requires stable pages, a table must require -- * them as well. Only targets that support iterate_devices are considered: -- * don't want error, zero, etc to require stable pages. -- */ --static bool dm_table_requires_stable_pages(struct dm_table *t) --{ -- struct dm_target *ti; -- unsigned i; -- -- for (i = 0; i < dm_table_get_num_targets(t); i++) { -- ti = dm_table_get_target(t, i); -- -- if (ti->type->iterate_devices && -- ti->type->iterate_devices(ti, device_requires_stable_pages, NULL)) -- return true; -- } -- -- return false; --} -- - void dm_table_set_restrictions(struct dm_table *t, struct request_queue *q, - struct queue_limits *limits) - { -@@ -1837,22 +1805,22 @@ void dm_table_set_restrictions(struct dm_table *t, struct request_queue *q, - } - blk_queue_write_cache(q, wc, fua); - -- if (dm_table_supports_dax(t, device_supports_dax, &page_size)) { -+ if (dm_table_supports_dax(t, device_not_dax_capable, &page_size)) { - blk_queue_flag_set(QUEUE_FLAG_DAX, q); -- if (dm_table_supports_dax(t, device_dax_synchronous, NULL)) -+ if (dm_table_supports_dax(t, device_not_dax_synchronous_capable, NULL)) - set_dax_synchronous(t->md->dax_dev); - } - else - blk_queue_flag_clear(QUEUE_FLAG_DAX, q); - -- if (dm_table_supports_dax_write_cache(t)) -+ if (dm_table_any_dev_attr(t, device_dax_write_cache_enabled, NULL)) - dax_write_cache(t->md->dax_dev, true); - - /* Ensure that all underlying devices are non-rotational. */ -- if (dm_table_all_devices_attribute(t, device_is_nonrot)) -- blk_queue_flag_set(QUEUE_FLAG_NONROT, q); -- else -+ if (dm_table_any_dev_attr(t, device_is_rotational, NULL)) - blk_queue_flag_clear(QUEUE_FLAG_NONROT, q); -+ else -+ blk_queue_flag_set(QUEUE_FLAG_NONROT, q); - - if (!dm_table_supports_write_same(t)) - q->limits.max_write_same_sectors = 0; -@@ -1864,8 +1832,11 @@ void dm_table_set_restrictions(struct dm_table *t, struct request_queue *q, - /* - * Some devices don't use blk_integrity but still want stable pages - * because they do their own checksumming. -+ * If any underlying device requires stable pages, a table must require -+ * them as well. Only targets that support iterate_devices are considered: -+ * don't want error, zero, etc to require stable pages. - */ -- if (dm_table_requires_stable_pages(t)) -+ if (dm_table_any_dev_attr(t, device_requires_stable_pages, NULL)) - blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, q); - else - blk_queue_flag_clear(QUEUE_FLAG_STABLE_WRITES, q); -@@ -1876,7 +1847,8 @@ void dm_table_set_restrictions(struct dm_table *t, struct request_queue *q, - * Clear QUEUE_FLAG_ADD_RANDOM if any underlying device does not - * have it set. - */ -- if (blk_queue_add_random(q) && dm_table_all_devices_attribute(t, device_is_not_random)) -+ if (blk_queue_add_random(q) && -+ dm_table_any_dev_attr(t, device_is_not_random, NULL)) - blk_queue_flag_clear(QUEUE_FLAG_ADD_RANDOM, q); - - /* -diff --git a/drivers/md/dm-writecache.c b/drivers/md/dm-writecache.c -index d5223a0e5cc51..8628c4aa2e854 100644 ---- a/drivers/md/dm-writecache.c -+++ b/drivers/md/dm-writecache.c -@@ -148,6 +148,7 @@ struct dm_writecache { - size_t metadata_sectors; - size_t n_blocks; - uint64_t seq_count; -+ sector_t data_device_sectors; - void *block_start; - struct wc_entry *entries; - unsigned block_size; -@@ -159,14 +160,22 @@ struct dm_writecache { - bool overwrote_committed:1; - bool memory_vmapped:1; - -+ bool start_sector_set:1; - bool high_wm_percent_set:1; - bool low_wm_percent_set:1; - bool max_writeback_jobs_set:1; - bool autocommit_blocks_set:1; - bool autocommit_time_set:1; -+ bool max_age_set:1; - bool writeback_fua_set:1; - bool flush_on_suspend:1; - bool cleaner:1; -+ bool cleaner_set:1; -+ -+ unsigned high_wm_percent_value; -+ unsigned low_wm_percent_value; -+ unsigned autocommit_time_value; -+ unsigned max_age_value; - - unsigned writeback_all; - struct workqueue_struct *writeback_wq; -@@ -523,7 +532,7 @@ static void ssd_commit_superblock(struct dm_writecache *wc) - - region.bdev = wc->ssd_dev->bdev; - region.sector = 0; -- region.count = PAGE_SIZE; -+ region.count = PAGE_SIZE >> SECTOR_SHIFT; - - if (unlikely(region.sector + region.count > wc->metadata_sectors)) - region.count = wc->metadata_sectors - region.sector; -@@ -969,6 +978,8 @@ static void writecache_resume(struct dm_target *ti) - - wc_lock(wc); - -+ wc->data_device_sectors = i_size_read(wc->dev->bdev->bd_inode) >> SECTOR_SHIFT; -+ - if (WC_MODE_PMEM(wc)) { - persistent_memory_invalidate_cache(wc->memory_map, wc->memory_map_size); - } else { -@@ -1638,6 +1649,10 @@ static bool wc_add_block(struct writeback_struct *wb, struct wc_entry *e, gfp_t - void *address = memory_data(wc, e); - - persistent_memory_flush_cache(address, block_size); -+ -+ if (unlikely(bio_end_sector(&wb->bio) >= wc->data_device_sectors)) -+ return true; -+ - return bio_add_page(&wb->bio, persistent_memory_page(address), - block_size, persistent_memory_page_offset(address)) != 0; - } -@@ -1709,6 +1724,9 @@ static void __writecache_writeback_pmem(struct dm_writecache *wc, struct writeba - if (writecache_has_error(wc)) { - bio->bi_status = BLK_STS_IOERR; - bio_endio(bio); -+ } else if (unlikely(!bio_sectors(bio))) { -+ bio->bi_status = BLK_STS_OK; -+ bio_endio(bio); - } else { - submit_bio(bio); - } -@@ -1752,6 +1770,14 @@ static void __writecache_writeback_ssd(struct dm_writecache *wc, struct writebac - e = f; - } - -+ if (unlikely(to.sector + to.count > wc->data_device_sectors)) { -+ if (to.sector >= wc->data_device_sectors) { -+ writecache_copy_endio(0, 0, c); -+ continue; -+ } -+ from.count = to.count = wc->data_device_sectors - to.sector; -+ } -+ - dm_kcopyd_copy(wc->dm_kcopyd, &from, 1, &to, 0, writecache_copy_endio, c); - - __writeback_throttle(wc, wbl); -@@ -2205,6 +2231,7 @@ static int writecache_ctr(struct dm_target *ti, unsigned argc, char **argv) - if (sscanf(string, "%llu%c", &start_sector, &dummy) != 1) - goto invalid_optional; - wc->start_sector = start_sector; -+ wc->start_sector_set = true; - if (wc->start_sector != start_sector || - wc->start_sector >= wc->memory_map_size >> SECTOR_SHIFT) - goto invalid_optional; -@@ -2214,6 +2241,7 @@ static int writecache_ctr(struct dm_target *ti, unsigned argc, char **argv) - goto invalid_optional; - if (high_wm_percent < 0 || high_wm_percent > 100) - goto invalid_optional; -+ wc->high_wm_percent_value = high_wm_percent; - wc->high_wm_percent_set = true; - } else if (!strcasecmp(string, "low_watermark") && opt_params >= 1) { - string = dm_shift_arg(&as), opt_params--; -@@ -2221,6 +2249,7 @@ static int writecache_ctr(struct dm_target *ti, unsigned argc, char **argv) - goto invalid_optional; - if (low_wm_percent < 0 || low_wm_percent > 100) - goto invalid_optional; -+ wc->low_wm_percent_value = low_wm_percent; - wc->low_wm_percent_set = true; - } else if (!strcasecmp(string, "writeback_jobs") && opt_params >= 1) { - string = dm_shift_arg(&as), opt_params--; -@@ -2240,6 +2269,7 @@ static int writecache_ctr(struct dm_target *ti, unsigned argc, char **argv) - if (autocommit_msecs > 3600000) - goto invalid_optional; - wc->autocommit_jiffies = msecs_to_jiffies(autocommit_msecs); -+ wc->autocommit_time_value = autocommit_msecs; - wc->autocommit_time_set = true; - } else if (!strcasecmp(string, "max_age") && opt_params >= 1) { - unsigned max_age_msecs; -@@ -2249,7 +2279,10 @@ static int writecache_ctr(struct dm_target *ti, unsigned argc, char **argv) - if (max_age_msecs > 86400000) - goto invalid_optional; - wc->max_age = msecs_to_jiffies(max_age_msecs); -+ wc->max_age_set = true; -+ wc->max_age_value = max_age_msecs; - } else if (!strcasecmp(string, "cleaner")) { -+ wc->cleaner_set = true; - wc->cleaner = true; - } else if (!strcasecmp(string, "fua")) { - if (WC_MODE_PMEM(wc)) { -@@ -2455,7 +2488,6 @@ static void writecache_status(struct dm_target *ti, status_type_t type, - struct dm_writecache *wc = ti->private; - unsigned extra_args; - unsigned sz = 0; -- uint64_t x; - - switch (type) { - case STATUSTYPE_INFO: -@@ -2467,11 +2499,11 @@ static void writecache_status(struct dm_target *ti, status_type_t type, - DMEMIT("%c %s %s %u ", WC_MODE_PMEM(wc) ? 'p' : 's', - wc->dev->name, wc->ssd_dev->name, wc->block_size); - extra_args = 0; -- if (wc->start_sector) -+ if (wc->start_sector_set) - extra_args += 2; -- if (wc->high_wm_percent_set && !wc->cleaner) -+ if (wc->high_wm_percent_set) - extra_args += 2; -- if (wc->low_wm_percent_set && !wc->cleaner) -+ if (wc->low_wm_percent_set) - extra_args += 2; - if (wc->max_writeback_jobs_set) - extra_args += 2; -@@ -2479,37 +2511,29 @@ static void writecache_status(struct dm_target *ti, status_type_t type, - extra_args += 2; - if (wc->autocommit_time_set) - extra_args += 2; -- if (wc->max_age != MAX_AGE_UNSPECIFIED) -+ if (wc->max_age_set) - extra_args += 2; -- if (wc->cleaner) -+ if (wc->cleaner_set) - extra_args++; - if (wc->writeback_fua_set) - extra_args++; - - DMEMIT("%u", extra_args); -- if (wc->start_sector) -+ if (wc->start_sector_set) - DMEMIT(" start_sector %llu", (unsigned long long)wc->start_sector); -- if (wc->high_wm_percent_set && !wc->cleaner) { -- x = (uint64_t)wc->freelist_high_watermark * 100; -- x += wc->n_blocks / 2; -- do_div(x, (size_t)wc->n_blocks); -- DMEMIT(" high_watermark %u", 100 - (unsigned)x); -- } -- if (wc->low_wm_percent_set && !wc->cleaner) { -- x = (uint64_t)wc->freelist_low_watermark * 100; -- x += wc->n_blocks / 2; -- do_div(x, (size_t)wc->n_blocks); -- DMEMIT(" low_watermark %u", 100 - (unsigned)x); -- } -+ if (wc->high_wm_percent_set) -+ DMEMIT(" high_watermark %u", wc->high_wm_percent_value); -+ if (wc->low_wm_percent_set) -+ DMEMIT(" low_watermark %u", wc->low_wm_percent_value); - if (wc->max_writeback_jobs_set) - DMEMIT(" writeback_jobs %u", wc->max_writeback_jobs); - if (wc->autocommit_blocks_set) - DMEMIT(" autocommit_blocks %u", wc->autocommit_blocks); - if (wc->autocommit_time_set) -- DMEMIT(" autocommit_time %u", jiffies_to_msecs(wc->autocommit_jiffies)); -- if (wc->max_age != MAX_AGE_UNSPECIFIED) -- DMEMIT(" max_age %u", jiffies_to_msecs(wc->max_age)); -- if (wc->cleaner) -+ DMEMIT(" autocommit_time %u", wc->autocommit_time_value); -+ if (wc->max_age_set) -+ DMEMIT(" max_age %u", wc->max_age_value); -+ if (wc->cleaner_set) - DMEMIT(" cleaner"); - if (wc->writeback_fua_set) - DMEMIT(" %sfua", wc->writeback_fua ? "" : "no"); -@@ -2519,7 +2543,7 @@ static void writecache_status(struct dm_target *ti, status_type_t type, - - static struct target_type writecache_target = { - .name = "writecache", -- .version = {1, 3, 0}, -+ .version = {1, 4, 0}, - .module = THIS_MODULE, - .ctr = writecache_ctr, - .dtr = writecache_dtr, -diff --git a/drivers/md/dm.c b/drivers/md/dm.c -index 7bac564f3faa6..6f03adc128495 100644 ---- a/drivers/md/dm.c -+++ b/drivers/md/dm.c -@@ -148,6 +148,16 @@ EXPORT_SYMBOL_GPL(dm_bio_get_target_bio_nr); - #define DM_NUMA_NODE NUMA_NO_NODE - static int dm_numa_node = DM_NUMA_NODE; - -+#define DEFAULT_SWAP_BIOS (8 * 1048576 / PAGE_SIZE) -+static int swap_bios = DEFAULT_SWAP_BIOS; -+static int get_swap_bios(void) -+{ -+ int latch = READ_ONCE(swap_bios); -+ if (unlikely(latch <= 0)) -+ latch = DEFAULT_SWAP_BIOS; -+ return latch; -+} -+ - /* - * For mempools pre-allocation at the table loading time. - */ -@@ -969,6 +979,11 @@ void disable_write_zeroes(struct mapped_device *md) - limits->max_write_zeroes_sectors = 0; - } - -+static bool swap_bios_limit(struct dm_target *ti, struct bio *bio) -+{ -+ return unlikely((bio->bi_opf & REQ_SWAP) != 0) && unlikely(ti->limit_swap_bios); -+} -+ - static void clone_endio(struct bio *bio) - { - blk_status_t error = bio->bi_status; -@@ -1019,6 +1034,11 @@ static void clone_endio(struct bio *bio) - } - } - -+ if (unlikely(swap_bios_limit(tio->ti, bio))) { -+ struct mapped_device *md = io->md; -+ up(&md->swap_bios_semaphore); -+ } -+ - free_tio(tio); - dec_pending(io, error); - } -@@ -1128,7 +1148,7 @@ static bool dm_dax_supported(struct dax_device *dax_dev, struct block_device *bd - if (!map) - goto out; - -- ret = dm_table_supports_dax(map, device_supports_dax, &blocksize); -+ ret = dm_table_supports_dax(map, device_not_dax_capable, &blocksize); - - out: - dm_put_live_table(md, srcu_idx); -@@ -1252,6 +1272,22 @@ void dm_accept_partial_bio(struct bio *bio, unsigned n_sectors) - } - EXPORT_SYMBOL_GPL(dm_accept_partial_bio); - -+static noinline void __set_swap_bios_limit(struct mapped_device *md, int latch) -+{ -+ mutex_lock(&md->swap_bios_lock); -+ while (latch < md->swap_bios) { -+ cond_resched(); -+ down(&md->swap_bios_semaphore); -+ md->swap_bios--; -+ } -+ while (latch > md->swap_bios) { -+ cond_resched(); -+ up(&md->swap_bios_semaphore); -+ md->swap_bios++; -+ } -+ mutex_unlock(&md->swap_bios_lock); -+} -+ - static blk_qc_t __map_bio(struct dm_target_io *tio) - { - int r; -@@ -1271,6 +1307,14 @@ static blk_qc_t __map_bio(struct dm_target_io *tio) - atomic_inc(&io->io_count); - sector = clone->bi_iter.bi_sector; - -+ if (unlikely(swap_bios_limit(ti, clone))) { -+ struct mapped_device *md = io->md; -+ int latch = get_swap_bios(); -+ if (unlikely(latch != md->swap_bios)) -+ __set_swap_bios_limit(md, latch); -+ down(&md->swap_bios_semaphore); -+ } -+ - r = ti->type->map(ti, clone); - switch (r) { - case DM_MAPIO_SUBMITTED: -@@ -1281,10 +1325,18 @@ static blk_qc_t __map_bio(struct dm_target_io *tio) - ret = submit_bio_noacct(clone); - break; - case DM_MAPIO_KILL: -+ if (unlikely(swap_bios_limit(ti, clone))) { -+ struct mapped_device *md = io->md; -+ up(&md->swap_bios_semaphore); -+ } - free_tio(tio); - dec_pending(io, BLK_STS_IOERR); - break; - case DM_MAPIO_REQUEUE: -+ if (unlikely(swap_bios_limit(ti, clone))) { -+ struct mapped_device *md = io->md; -+ up(&md->swap_bios_semaphore); -+ } - free_tio(tio); - dec_pending(io, BLK_STS_DM_REQUEUE); - break; -@@ -1747,6 +1799,7 @@ static void cleanup_mapped_device(struct mapped_device *md) - mutex_destroy(&md->suspend_lock); - mutex_destroy(&md->type_lock); - mutex_destroy(&md->table_devices_lock); -+ mutex_destroy(&md->swap_bios_lock); - - dm_mq_cleanup_mapped_device(md); - } -@@ -1814,6 +1867,10 @@ static struct mapped_device *alloc_dev(int minor) - init_waitqueue_head(&md->eventq); - init_completion(&md->kobj_holder.completion); - -+ md->swap_bios = get_swap_bios(); -+ sema_init(&md->swap_bios_semaphore, md->swap_bios); -+ mutex_init(&md->swap_bios_lock); -+ - md->disk->major = _major; - md->disk->first_minor = minor; - md->disk->fops = &dm_blk_dops; -@@ -3097,6 +3154,9 @@ MODULE_PARM_DESC(reserved_bio_based_ios, "Reserved IOs in bio-based mempools"); - module_param(dm_numa_node, int, S_IRUGO | S_IWUSR); - MODULE_PARM_DESC(dm_numa_node, "NUMA node for DM device memory allocations"); - -+module_param(swap_bios, int, S_IRUGO | S_IWUSR); -+MODULE_PARM_DESC(swap_bios, "Maximum allowed inflight swap IOs"); -+ - MODULE_DESCRIPTION(DM_NAME " driver"); - MODULE_AUTHOR("Joe Thornber "); - MODULE_LICENSE("GPL"); -diff --git a/drivers/md/dm.h b/drivers/md/dm.h -index fffe1e289c533..b441ad772c188 100644 ---- a/drivers/md/dm.h -+++ b/drivers/md/dm.h -@@ -73,7 +73,7 @@ void dm_table_free_md_mempools(struct dm_table *t); - struct dm_md_mempools *dm_table_get_md_mempools(struct dm_table *t); - bool dm_table_supports_dax(struct dm_table *t, iterate_devices_callout_fn fn, - int *blocksize); --int device_supports_dax(struct dm_target *ti, struct dm_dev *dev, -+int device_not_dax_capable(struct dm_target *ti, struct dm_dev *dev, - sector_t start, sector_t len, void *data); - - void dm_lock_md_type(struct mapped_device *md); -diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig -index 2b9d81e4794a4..6eed3209ee2d3 100644 ---- a/drivers/media/i2c/Kconfig -+++ b/drivers/media/i2c/Kconfig -@@ -1000,6 +1000,7 @@ config VIDEO_OV772X - tristate "OmniVision OV772x sensor support" - depends on I2C && VIDEO_V4L2 - select REGMAP_SCCB -+ select V4L2_FWNODE - help - This is a Video4Linux2 sensor driver for the OmniVision - OV772x camera. -diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c -index c82c1493e099d..b1e2476d3c9e6 100644 ---- a/drivers/media/i2c/max9286.c -+++ b/drivers/media/i2c/max9286.c -@@ -580,7 +580,7 @@ static int max9286_v4l2_notifier_register(struct max9286_priv *priv) - - asd = v4l2_async_notifier_add_fwnode_subdev(&priv->notifier, - source->fwnode, -- sizeof(*asd)); -+ sizeof(struct max9286_asd)); - if (IS_ERR(asd)) { - dev_err(dev, "Failed to add subdev for source %u: %ld", - i, PTR_ERR(asd)); -diff --git a/drivers/media/i2c/ov5670.c b/drivers/media/i2c/ov5670.c -index 148fd4e05029a..866c8c2e8f59a 100644 ---- a/drivers/media/i2c/ov5670.c -+++ b/drivers/media/i2c/ov5670.c -@@ -2084,7 +2084,8 @@ static int ov5670_init_controls(struct ov5670 *ov5670) - - /* By default, V4L2_CID_PIXEL_RATE is read only */ - ov5670->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov5670_ctrl_ops, -- V4L2_CID_PIXEL_RATE, 0, -+ V4L2_CID_PIXEL_RATE, -+ link_freq_configs[0].pixel_rate, - link_freq_configs[0].pixel_rate, - 1, - link_freq_configs[0].pixel_rate); -diff --git a/drivers/media/pci/cx25821/cx25821-core.c b/drivers/media/pci/cx25821/cx25821-core.c -index 6f8ffab8840f4..07b6d0c49bbfa 100644 ---- a/drivers/media/pci/cx25821/cx25821-core.c -+++ b/drivers/media/pci/cx25821/cx25821-core.c -@@ -976,8 +976,10 @@ int cx25821_riscmem_alloc(struct pci_dev *pci, - __le32 *cpu; - dma_addr_t dma = 0; - -- if (NULL != risc->cpu && risc->size < size) -+ if (risc->cpu && risc->size < size) { - pci_free_consistent(pci, risc->size, risc->cpu, risc->dma); -+ risc->cpu = NULL; -+ } - if (NULL == risc->cpu) { - cpu = pci_zalloc_consistent(pci, size, &dma); - if (NULL == cpu) -diff --git a/drivers/media/pci/intel/ipu3/Kconfig b/drivers/media/pci/intel/ipu3/Kconfig -index 82d7f17e6a024..7a805201034b7 100644 ---- a/drivers/media/pci/intel/ipu3/Kconfig -+++ b/drivers/media/pci/intel/ipu3/Kconfig -@@ -2,7 +2,8 @@ - config VIDEO_IPU3_CIO2 - tristate "Intel ipu3-cio2 driver" - depends on VIDEO_V4L2 && PCI -- depends on (X86 && ACPI) || COMPILE_TEST -+ depends on ACPI || COMPILE_TEST -+ depends on X86 - select MEDIA_CONTROLLER - select VIDEO_V4L2_SUBDEV_API - select V4L2_FWNODE -diff --git a/drivers/media/pci/intel/ipu3/ipu3-cio2.c b/drivers/media/pci/intel/ipu3/ipu3-cio2.c -index 6cada8a6e50cc..143ba9d90342f 100644 ---- a/drivers/media/pci/intel/ipu3/ipu3-cio2.c -+++ b/drivers/media/pci/intel/ipu3/ipu3-cio2.c -@@ -1269,7 +1269,7 @@ static int cio2_subdev_set_fmt(struct v4l2_subdev *sd, - fmt->format.code = formats[0].mbus_code; - - for (i = 0; i < ARRAY_SIZE(formats); i++) { -- if (formats[i].mbus_code == fmt->format.code) { -+ if (formats[i].mbus_code == mbus_code) { - fmt->format.code = mbus_code; - break; - } -diff --git a/drivers/media/pci/saa7134/saa7134-empress.c b/drivers/media/pci/saa7134/saa7134-empress.c -index 39e3c7f8c5b46..76a37fbd84587 100644 ---- a/drivers/media/pci/saa7134/saa7134-empress.c -+++ b/drivers/media/pci/saa7134/saa7134-empress.c -@@ -282,8 +282,11 @@ static int empress_init(struct saa7134_dev *dev) - q->lock = &dev->lock; - q->dev = &dev->pci->dev; - err = vb2_queue_init(q); -- if (err) -+ if (err) { -+ video_device_release(dev->empress_dev); -+ dev->empress_dev = NULL; - return err; -+ } - dev->empress_dev->queue = q; - dev->empress_dev->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING | - V4L2_CAP_VIDEO_CAPTURE; -diff --git a/drivers/media/pci/smipcie/smipcie-ir.c b/drivers/media/pci/smipcie/smipcie-ir.c -index e6b74e161a055..c0604d9c70119 100644 ---- a/drivers/media/pci/smipcie/smipcie-ir.c -+++ b/drivers/media/pci/smipcie/smipcie-ir.c -@@ -60,38 +60,44 @@ static void smi_ir_decode(struct smi_rc *ir) - { - struct smi_dev *dev = ir->dev; - struct rc_dev *rc_dev = ir->rc_dev; -- u32 dwIRControl, dwIRData; -- u8 index, ucIRCount, readLoop; -+ u32 control, data; -+ u8 index, ir_count, read_loop; - -- dwIRControl = smi_read(IR_Init_Reg); -+ control = smi_read(IR_Init_Reg); - -- if (dwIRControl & rbIRVld) { -- ucIRCount = (u8) smi_read(IR_Data_Cnt); -+ dev_dbg(&rc_dev->dev, "ircontrol: 0x%08x\n", control); - -- readLoop = ucIRCount/4; -- if (ucIRCount % 4) -- readLoop += 1; -- for (index = 0; index < readLoop; index++) { -- dwIRData = smi_read(IR_DATA_BUFFER_BASE + (index * 4)); -+ if (control & rbIRVld) { -+ ir_count = (u8)smi_read(IR_Data_Cnt); - -- ir->irData[index*4 + 0] = (u8)(dwIRData); -- ir->irData[index*4 + 1] = (u8)(dwIRData >> 8); -- ir->irData[index*4 + 2] = (u8)(dwIRData >> 16); -- ir->irData[index*4 + 3] = (u8)(dwIRData >> 24); -+ dev_dbg(&rc_dev->dev, "ircount %d\n", ir_count); -+ -+ read_loop = ir_count / 4; -+ if (ir_count % 4) -+ read_loop += 1; -+ for (index = 0; index < read_loop; index++) { -+ data = smi_read(IR_DATA_BUFFER_BASE + (index * 4)); -+ dev_dbg(&rc_dev->dev, "IRData 0x%08x\n", data); -+ -+ ir->irData[index * 4 + 0] = (u8)(data); -+ ir->irData[index * 4 + 1] = (u8)(data >> 8); -+ ir->irData[index * 4 + 2] = (u8)(data >> 16); -+ ir->irData[index * 4 + 3] = (u8)(data >> 24); - } -- smi_raw_process(rc_dev, ir->irData, ucIRCount); -- smi_set(IR_Init_Reg, rbIRVld); -+ smi_raw_process(rc_dev, ir->irData, ir_count); - } - -- if (dwIRControl & rbIRhighidle) { -+ if (control & rbIRhighidle) { - struct ir_raw_event rawir = {}; - -+ dev_dbg(&rc_dev->dev, "high idle\n"); -+ - rawir.pulse = 0; - rawir.duration = SMI_SAMPLE_PERIOD * SMI_SAMPLE_IDLEMIN; - ir_raw_event_store_with_filter(rc_dev, &rawir); -- smi_set(IR_Init_Reg, rbIRhighidle); - } - -+ smi_set(IR_Init_Reg, rbIRVld); - ir_raw_event_handle(rc_dev); - } - -@@ -150,7 +156,7 @@ int smi_ir_init(struct smi_dev *dev) - rc_dev->dev.parent = &dev->pci_dev->dev; - - rc_dev->map_name = dev->info->rc_map; -- rc_dev->timeout = MS_TO_US(100); -+ rc_dev->timeout = SMI_SAMPLE_PERIOD * SMI_SAMPLE_IDLEMIN; - rc_dev->rx_resolution = SMI_SAMPLE_PERIOD; - - ir->rc_dev = rc_dev; -@@ -173,7 +179,7 @@ void smi_ir_exit(struct smi_dev *dev) - struct smi_rc *ir = &dev->ir; - struct rc_dev *rc_dev = ir->rc_dev; - -- smi_ir_stop(ir); - rc_unregister_device(rc_dev); -+ smi_ir_stop(ir); - ir->rc_dev = NULL; - } -diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c -index c46a79eace98b..f2c4dadd6a0eb 100644 ---- a/drivers/media/platform/aspeed-video.c -+++ b/drivers/media/platform/aspeed-video.c -@@ -1551,12 +1551,12 @@ static int aspeed_video_setup_video(struct aspeed_video *video) - V4L2_JPEG_CHROMA_SUBSAMPLING_420, mask, - V4L2_JPEG_CHROMA_SUBSAMPLING_444); - -- if (video->ctrl_handler.error) { -+ rc = video->ctrl_handler.error; -+ if (rc) { - v4l2_ctrl_handler_free(&video->ctrl_handler); - v4l2_device_unregister(v4l2_dev); - -- dev_err(video->dev, "Failed to init controls: %d\n", -- video->ctrl_handler.error); -+ dev_err(video->dev, "Failed to init controls: %d\n", rc); - return rc; - } - -diff --git a/drivers/media/platform/marvell-ccic/mcam-core.c b/drivers/media/platform/marvell-ccic/mcam-core.c -index c012fd2e1d291..34266fba824f2 100644 ---- a/drivers/media/platform/marvell-ccic/mcam-core.c -+++ b/drivers/media/platform/marvell-ccic/mcam-core.c -@@ -931,6 +931,7 @@ static int mclk_enable(struct clk_hw *hw) - mclk_div = 2; - } - -+ pm_runtime_get_sync(cam->dev); - clk_enable(cam->clk[0]); - mcam_reg_write(cam, REG_CLKCTRL, (mclk_src << 29) | mclk_div); - mcam_ctlr_power_up(cam); -@@ -944,6 +945,7 @@ static void mclk_disable(struct clk_hw *hw) - - mcam_ctlr_power_down(cam); - clk_disable(cam->clk[0]); -+ pm_runtime_put(cam->dev); - } - - static unsigned long mclk_recalc_rate(struct clk_hw *hw, -diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c -index dfb42e19bf813..be3842e6ca475 100644 ---- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c -+++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c -@@ -303,7 +303,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) - ret = PTR_ERR((__force void *)dev->reg_base[VENC_SYS]); - goto err_res; - } -- mtk_v4l2_debug(2, "reg[%d] base=0x%p", i, dev->reg_base[VENC_SYS]); -+ mtk_v4l2_debug(2, "reg[%d] base=0x%p", VENC_SYS, dev->reg_base[VENC_SYS]); - - res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (res == NULL) { -@@ -332,7 +332,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) - ret = PTR_ERR((__force void *)dev->reg_base[VENC_LT_SYS]); - goto err_res; - } -- mtk_v4l2_debug(2, "reg[%d] base=0x%p", i, dev->reg_base[VENC_LT_SYS]); -+ mtk_v4l2_debug(2, "reg[%d] base=0x%p", VENC_LT_SYS, dev->reg_base[VENC_LT_SYS]); - - dev->enc_lt_irq = platform_get_irq(pdev, 1); - irq_set_status_flags(dev->enc_lt_irq, IRQ_NOAUTOEN); -diff --git a/drivers/media/platform/mtk-vcodec/vdec/vdec_vp9_if.c b/drivers/media/platform/mtk-vcodec/vdec/vdec_vp9_if.c -index 5ea153a685225..d9880210b2ab6 100644 ---- a/drivers/media/platform/mtk-vcodec/vdec/vdec_vp9_if.c -+++ b/drivers/media/platform/mtk-vcodec/vdec/vdec_vp9_if.c -@@ -890,7 +890,8 @@ static int vdec_vp9_decode(void *h_vdec, struct mtk_vcodec_mem *bs, - memset(inst->seg_id_buf.va, 0, inst->seg_id_buf.size); - - if (vsi->show_frame & BIT(2)) { -- if (vpu_dec_start(&inst->vpu, NULL, 0)) { -+ ret = vpu_dec_start(&inst->vpu, NULL, 0); -+ if (ret) { - mtk_vcodec_err(inst, "vpu trig decoder failed"); - goto DECODE_ERROR; - } -diff --git a/drivers/media/platform/pxa_camera.c b/drivers/media/platform/pxa_camera.c -index b664ce7558a1a..75fad9689c901 100644 ---- a/drivers/media/platform/pxa_camera.c -+++ b/drivers/media/platform/pxa_camera.c -@@ -1386,6 +1386,9 @@ static int pxac_vb2_prepare(struct vb2_buffer *vb) - struct pxa_camera_dev *pcdev = vb2_get_drv_priv(vb->vb2_queue); - struct pxa_buffer *buf = vb2_to_pxa_buffer(vb); - int ret = 0; -+#ifdef DEBUG -+ int i; -+#endif - - switch (pcdev->channels) { - case 1: -diff --git a/drivers/media/platform/qcom/camss/camss-video.c b/drivers/media/platform/qcom/camss/camss-video.c -index bd9334af1c734..97cea7c4d7697 100644 ---- a/drivers/media/platform/qcom/camss/camss-video.c -+++ b/drivers/media/platform/qcom/camss/camss-video.c -@@ -579,7 +579,7 @@ static int video_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f) - break; - } - -- if (k < f->index) -+ if (k == -1 || k < f->index) - /* - * All the unique pixel formats matching the arguments - * have been enumerated (k >= 0 and f->index > 0), or -@@ -961,6 +961,7 @@ int msm_video_register(struct camss_video *video, struct v4l2_device *v4l2_dev, - video->nformats = ARRAY_SIZE(formats_rdi_8x96); - } - } else { -+ ret = -EINVAL; - goto error_video_register; - } - -diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c -index 59a0266b1f399..2eef245c31a17 100644 ---- a/drivers/media/platform/ti-vpe/cal.c -+++ b/drivers/media/platform/ti-vpe/cal.c -@@ -406,7 +406,7 @@ static irqreturn_t cal_irq(int irq_cal, void *data) - */ - - struct cal_v4l2_async_subdev { -- struct v4l2_async_subdev asd; -+ struct v4l2_async_subdev asd; /* Must be first */ - struct cal_camerarx *phy; - }; - -@@ -472,7 +472,7 @@ static int cal_async_notifier_register(struct cal_dev *cal) - fwnode = of_fwnode_handle(phy->sensor_node); - asd = v4l2_async_notifier_add_fwnode_subdev(&cal->notifier, - fwnode, -- sizeof(*asd)); -+ sizeof(*casd)); - if (IS_ERR(asd)) { - phy_err(phy, "Failed to add subdev to notifier\n"); - ret = PTR_ERR(asd); -diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c -index dc62533cf32ce..aa66e4f5f3f34 100644 ---- a/drivers/media/platform/vsp1/vsp1_drv.c -+++ b/drivers/media/platform/vsp1/vsp1_drv.c -@@ -882,8 +882,10 @@ static int vsp1_probe(struct platform_device *pdev) - } - - done: -- if (ret) -+ if (ret) { - pm_runtime_disable(&pdev->dev); -+ rcar_fcp_put(vsp1->fcp); -+ } - - return ret; - } -diff --git a/drivers/media/rc/ir_toy.c b/drivers/media/rc/ir_toy.c -index e0242c9b6aeb1..3e729a17b35ff 100644 ---- a/drivers/media/rc/ir_toy.c -+++ b/drivers/media/rc/ir_toy.c -@@ -491,6 +491,7 @@ static void irtoy_disconnect(struct usb_interface *intf) - - static const struct usb_device_id irtoy_table[] = { - { USB_DEVICE_INTERFACE_CLASS(0x04d8, 0xfd08, USB_CLASS_CDC_DATA) }, -+ { USB_DEVICE_INTERFACE_CLASS(0x04d8, 0xf58b, USB_CLASS_CDC_DATA) }, - { } - }; - -diff --git a/drivers/media/rc/mceusb.c b/drivers/media/rc/mceusb.c -index f1dbd059ed087..c8d63673e131d 100644 ---- a/drivers/media/rc/mceusb.c -+++ b/drivers/media/rc/mceusb.c -@@ -1169,7 +1169,7 @@ static void mceusb_handle_command(struct mceusb_dev *ir, u8 *buf_in) - switch (subcmd) { - /* the one and only 5-byte return value command */ - case MCE_RSP_GETPORTSTATUS: -- if (buf_in[5] == 0) -+ if (buf_in[5] == 0 && *hi < 8) - ir->txports_cabled |= 1 << *hi; - break; - -diff --git a/drivers/media/test-drivers/vidtv/vidtv_psi.c b/drivers/media/test-drivers/vidtv/vidtv_psi.c -index 4511a2a98405d..1724bb485e670 100644 ---- a/drivers/media/test-drivers/vidtv/vidtv_psi.c -+++ b/drivers/media/test-drivers/vidtv/vidtv_psi.c -@@ -1164,6 +1164,8 @@ u32 vidtv_psi_pmt_write_into(struct vidtv_psi_pmt_write_args *args) - struct vidtv_psi_desc *table_descriptor = args->pmt->descriptor; - struct vidtv_psi_table_pmt_stream *stream = args->pmt->stream; - struct vidtv_psi_desc *stream_descriptor; -+ u32 crc = INITIAL_CRC; -+ u32 nbytes = 0; - struct header_write_args h_args = { - .dest_buf = args->buf, - .dest_offset = args->offset, -@@ -1181,6 +1183,7 @@ u32 vidtv_psi_pmt_write_into(struct vidtv_psi_pmt_write_args *args) - .new_psi_section = false, - .is_crc = false, - .dest_buf_sz = args->buf_sz, -+ .crc = &crc, - }; - struct desc_write_args d_args = { - .dest_buf = args->buf, -@@ -1193,8 +1196,6 @@ u32 vidtv_psi_pmt_write_into(struct vidtv_psi_pmt_write_args *args) - .pid = args->pid, - .dest_buf_sz = args->buf_sz, - }; -- u32 crc = INITIAL_CRC; -- u32 nbytes = 0; - - vidtv_psi_pmt_table_update_sec_len(args->pmt); - -diff --git a/drivers/media/tuners/qm1d1c0042.c b/drivers/media/tuners/qm1d1c0042.c -index 0e26d22f0b268..53aa2558f71e1 100644 ---- a/drivers/media/tuners/qm1d1c0042.c -+++ b/drivers/media/tuners/qm1d1c0042.c -@@ -343,8 +343,10 @@ static int qm1d1c0042_init(struct dvb_frontend *fe) - if (val == reg_initval[reg_index][0x00]) - break; - } -- if (reg_index >= QM1D1C0042_NUM_REG_ROWS) -+ if (reg_index >= QM1D1C0042_NUM_REG_ROWS) { -+ ret = -EINVAL; - goto failed; -+ } - memcpy(state->regs, reg_initval[reg_index], QM1D1C0042_NUM_REGS); - usleep_range(2000, 3000); - -diff --git a/drivers/media/usb/dvb-usb-v2/lmedm04.c b/drivers/media/usb/dvb-usb-v2/lmedm04.c -index 5a7a9522d46da..9ddda8d68ee0f 100644 ---- a/drivers/media/usb/dvb-usb-v2/lmedm04.c -+++ b/drivers/media/usb/dvb-usb-v2/lmedm04.c -@@ -391,7 +391,7 @@ static int lme2510_int_read(struct dvb_usb_adapter *adap) - ep = usb_pipe_endpoint(d->udev, lme_int->lme_urb->pipe); - - if (usb_endpoint_type(&ep->desc) == USB_ENDPOINT_XFER_BULK) -- lme_int->lme_urb->pipe = usb_rcvbulkpipe(d->udev, 0xa), -+ lme_int->lme_urb->pipe = usb_rcvbulkpipe(d->udev, 0xa); - - usb_submit_urb(lme_int->lme_urb, GFP_ATOMIC); - info("INT Interrupt Service Started"); -diff --git a/drivers/media/usb/em28xx/em28xx-core.c b/drivers/media/usb/em28xx/em28xx-core.c -index e6088b5d1b805..3daa64bb1e1d9 100644 ---- a/drivers/media/usb/em28xx/em28xx-core.c -+++ b/drivers/media/usb/em28xx/em28xx-core.c -@@ -956,14 +956,10 @@ int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk, - - usb_bufs->buf[i] = kzalloc(sb_size, GFP_KERNEL); - if (!usb_bufs->buf[i]) { -- em28xx_uninit_usb_xfer(dev, mode); -- - for (i--; i >= 0; i--) - kfree(usb_bufs->buf[i]); - -- kfree(usb_bufs->buf); -- usb_bufs->buf = NULL; -- -+ em28xx_uninit_usb_xfer(dev, mode); - return -ENOMEM; - } - -diff --git a/drivers/media/usb/tm6000/tm6000-dvb.c b/drivers/media/usb/tm6000/tm6000-dvb.c -index 19c90fa9e443d..293a460f4616c 100644 ---- a/drivers/media/usb/tm6000/tm6000-dvb.c -+++ b/drivers/media/usb/tm6000/tm6000-dvb.c -@@ -141,6 +141,10 @@ static int tm6000_start_stream(struct tm6000_core *dev) - if (ret < 0) { - printk(KERN_ERR "tm6000: error %i in %s during pipe reset\n", - ret, __func__); -+ -+ kfree(dvb->bulk_urb->transfer_buffer); -+ usb_free_urb(dvb->bulk_urb); -+ dvb->bulk_urb = NULL; - return ret; - } else - printk(KERN_ERR "tm6000: pipe reset\n"); -diff --git a/drivers/media/usb/uvc/uvc_v4l2.c b/drivers/media/usb/uvc/uvc_v4l2.c -index fa06bfa174ad3..c7172b8952a96 100644 ---- a/drivers/media/usb/uvc/uvc_v4l2.c -+++ b/drivers/media/usb/uvc/uvc_v4l2.c -@@ -248,7 +248,9 @@ static int uvc_v4l2_try_format(struct uvc_streaming *stream, - goto done; - - /* After the probe, update fmt with the values returned from -- * negotiation with the device. -+ * negotiation with the device. Some devices return invalid bFormatIndex -+ * and bFrameIndex values, in which case we can only assume they have -+ * accepted the requested format as-is. - */ - for (i = 0; i < stream->nformats; ++i) { - if (probe->bFormatIndex == stream->format[i].index) { -@@ -257,11 +259,10 @@ static int uvc_v4l2_try_format(struct uvc_streaming *stream, - } - } - -- if (i == stream->nformats) { -- uvc_trace(UVC_TRACE_FORMAT, "Unknown bFormatIndex %u\n", -+ if (i == stream->nformats) -+ uvc_trace(UVC_TRACE_FORMAT, -+ "Unknown bFormatIndex %u, using default\n", - probe->bFormatIndex); -- return -EINVAL; -- } - - for (i = 0; i < format->nframes; ++i) { - if (probe->bFrameIndex == format->frame[i].bFrameIndex) { -@@ -270,11 +271,10 @@ static int uvc_v4l2_try_format(struct uvc_streaming *stream, - } - } - -- if (i == format->nframes) { -- uvc_trace(UVC_TRACE_FORMAT, "Unknown bFrameIndex %u\n", -+ if (i == format->nframes) -+ uvc_trace(UVC_TRACE_FORMAT, -+ "Unknown bFrameIndex %u, using default\n", - probe->bFrameIndex); -- return -EINVAL; -- } - - fmt->fmt.pix.width = frame->wWidth; - fmt->fmt.pix.height = frame->wHeight; -diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c -index 3198abdd538ce..9906b41004e9b 100644 ---- a/drivers/media/v4l2-core/v4l2-ioctl.c -+++ b/drivers/media/v4l2-core/v4l2-ioctl.c -@@ -3283,7 +3283,7 @@ video_usercopy(struct file *file, unsigned int orig_cmd, unsigned long arg, - v4l2_kioctl func) - { - char sbuf[128]; -- void *mbuf = NULL; -+ void *mbuf = NULL, *array_buf = NULL; - void *parg = (void *)arg; - long err = -EINVAL; - bool has_array_args; -@@ -3318,27 +3318,21 @@ video_usercopy(struct file *file, unsigned int orig_cmd, unsigned long arg, - has_array_args = err; - - if (has_array_args) { -- /* -- * When adding new types of array args, make sure that the -- * parent argument to ioctl (which contains the pointer to the -- * array) fits into sbuf (so that mbuf will still remain -- * unused up to here). -- */ -- mbuf = kvmalloc(array_size, GFP_KERNEL); -+ array_buf = kvmalloc(array_size, GFP_KERNEL); - err = -ENOMEM; -- if (NULL == mbuf) -+ if (array_buf == NULL) - goto out_array_args; - err = -EFAULT; - if (in_compat_syscall()) -- err = v4l2_compat_get_array_args(file, mbuf, user_ptr, -- array_size, orig_cmd, -- parg); -+ err = v4l2_compat_get_array_args(file, array_buf, -+ user_ptr, array_size, -+ orig_cmd, parg); - else -- err = copy_from_user(mbuf, user_ptr, array_size) ? -+ err = copy_from_user(array_buf, user_ptr, array_size) ? - -EFAULT : 0; - if (err) - goto out_array_args; -- *kernel_ptr = mbuf; -+ *kernel_ptr = array_buf; - } - - /* Handles IOCTL */ -@@ -3360,12 +3354,13 @@ video_usercopy(struct file *file, unsigned int orig_cmd, unsigned long arg, - if (in_compat_syscall()) { - int put_err; - -- put_err = v4l2_compat_put_array_args(file, user_ptr, mbuf, -- array_size, orig_cmd, -- parg); -+ put_err = v4l2_compat_put_array_args(file, user_ptr, -+ array_buf, -+ array_size, -+ orig_cmd, parg); - if (put_err) - err = put_err; -- } else if (copy_to_user(user_ptr, mbuf, array_size)) { -+ } else if (copy_to_user(user_ptr, array_buf, array_size)) { - err = -EFAULT; - } - goto out_array_args; -@@ -3381,6 +3376,7 @@ out_array_args: - if (video_put_user((void __user *)arg, parg, cmd, orig_cmd)) - err = -EFAULT; - out: -+ kvfree(array_buf); - kvfree(mbuf); - return err; - } -diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c -index ac350f8d1e20f..82d09b88240e1 100644 ---- a/drivers/memory/mtk-smi.c -+++ b/drivers/memory/mtk-smi.c -@@ -130,7 +130,7 @@ static void mtk_smi_clk_disable(const struct mtk_smi *smi) - - int mtk_smi_larb_get(struct device *larbdev) - { -- int ret = pm_runtime_get_sync(larbdev); -+ int ret = pm_runtime_resume_and_get(larbdev); - - return (ret < 0) ? ret : 0; - } -@@ -374,7 +374,7 @@ static int __maybe_unused mtk_smi_larb_resume(struct device *dev) - int ret; - - /* Power on smi-common. */ -- ret = pm_runtime_get_sync(larb->smi_common_dev); -+ ret = pm_runtime_resume_and_get(larb->smi_common_dev); - if (ret < 0) { - dev_err(dev, "Failed to pm get for smi-common(%d).\n", ret); - return ret; -diff --git a/drivers/memory/ti-aemif.c b/drivers/memory/ti-aemif.c -index 159a16f5e7d67..51d20c2ccb755 100644 ---- a/drivers/memory/ti-aemif.c -+++ b/drivers/memory/ti-aemif.c -@@ -378,8 +378,10 @@ static int aemif_probe(struct platform_device *pdev) - */ - for_each_available_child_of_node(np, child_np) { - ret = of_aemif_parse_abus_config(pdev, child_np); -- if (ret < 0) -+ if (ret < 0) { -+ of_node_put(child_np); - goto error; -+ } - } - } else if (pdata && pdata->num_abus_data > 0) { - for (i = 0; i < pdata->num_abus_data; i++, aemif->num_cs++) { -@@ -405,8 +407,10 @@ static int aemif_probe(struct platform_device *pdev) - for_each_available_child_of_node(np, child_np) { - ret = of_platform_populate(child_np, NULL, - dev_lookup, dev); -- if (ret < 0) -+ if (ret < 0) { -+ of_node_put(child_np); - goto error; -+ } - } - } else if (pdata) { - for (i = 0; i < pdata->num_sub_devices; i++) { -diff --git a/drivers/mfd/altera-sysmgr.c b/drivers/mfd/altera-sysmgr.c -index 193a96c8b1eab..20cb294c75122 100644 ---- a/drivers/mfd/altera-sysmgr.c -+++ b/drivers/mfd/altera-sysmgr.c -@@ -145,7 +145,8 @@ static int sysmgr_probe(struct platform_device *pdev) - sysmgr_config.reg_write = s10_protected_reg_write; - - /* Need physical address for SMCC call */ -- regmap = devm_regmap_init(dev, NULL, (void *)res->start, -+ regmap = devm_regmap_init(dev, NULL, -+ (void *)(uintptr_t)res->start, - &sysmgr_config); - } else { - base = devm_ioremap(dev, res->start, resource_size(res)); -diff --git a/drivers/mfd/bd9571mwv.c b/drivers/mfd/bd9571mwv.c -index fab3cdc27ed64..19d57a45134c6 100644 ---- a/drivers/mfd/bd9571mwv.c -+++ b/drivers/mfd/bd9571mwv.c -@@ -185,9 +185,9 @@ static int bd9571mwv_probe(struct i2c_client *client, - return ret; - } - -- ret = mfd_add_devices(bd->dev, PLATFORM_DEVID_AUTO, bd9571mwv_cells, -- ARRAY_SIZE(bd9571mwv_cells), NULL, 0, -- regmap_irq_get_domain(bd->irq_data)); -+ ret = devm_mfd_add_devices(bd->dev, PLATFORM_DEVID_AUTO, -+ bd9571mwv_cells, ARRAY_SIZE(bd9571mwv_cells), -+ NULL, 0, regmap_irq_get_domain(bd->irq_data)); - if (ret) { - regmap_del_irq_chip(bd->irq, bd->irq_data); - return ret; -diff --git a/drivers/mfd/gateworks-gsc.c b/drivers/mfd/gateworks-gsc.c -index 576da62fbb0ce..d87876747b913 100644 ---- a/drivers/mfd/gateworks-gsc.c -+++ b/drivers/mfd/gateworks-gsc.c -@@ -234,7 +234,7 @@ static int gsc_probe(struct i2c_client *client) - - ret = devm_regmap_add_irq_chip(dev, gsc->regmap, client->irq, - IRQF_ONESHOT | IRQF_SHARED | -- IRQF_TRIGGER_FALLING, 0, -+ IRQF_TRIGGER_LOW, 0, - &gsc_irq_chip, &irq_data); - if (ret) - return ret; -diff --git a/drivers/mfd/wm831x-auxadc.c b/drivers/mfd/wm831x-auxadc.c -index 8a7cc0f86958b..65b98f3fbd929 100644 ---- a/drivers/mfd/wm831x-auxadc.c -+++ b/drivers/mfd/wm831x-auxadc.c -@@ -93,11 +93,10 @@ static int wm831x_auxadc_read_irq(struct wm831x *wm831x, - wait_for_completion_timeout(&req->done, msecs_to_jiffies(500)); - - mutex_lock(&wm831x->auxadc_lock); -- -- list_del(&req->list); - ret = req->val; - - out: -+ list_del(&req->list); - mutex_unlock(&wm831x->auxadc_lock); - - kfree(req); -diff --git a/drivers/misc/cardreader/rts5227.c b/drivers/misc/cardreader/rts5227.c -index 8859011672cb9..8200af22b529e 100644 ---- a/drivers/misc/cardreader/rts5227.c -+++ b/drivers/misc/cardreader/rts5227.c -@@ -398,6 +398,11 @@ static int rts522a_extra_init_hw(struct rtsx_pcr *pcr) - { - rts5227_extra_init_hw(pcr); - -+ /* Power down OCP for power consumption */ -+ if (!pcr->card_exist) -+ rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, -+ OC_POWER_DOWN); -+ - rtsx_pci_write_register(pcr, FUNC_FORCE_CTL, FUNC_FORCE_UPME_XMT_DBG, - FUNC_FORCE_UPME_XMT_DBG); - rtsx_pci_write_register(pcr, PCLK_CTL, 0x04, 0x04); -diff --git a/drivers/misc/eeprom/eeprom_93xx46.c b/drivers/misc/eeprom/eeprom_93xx46.c -index 7c45f82b43027..d92c4d2c521a3 100644 ---- a/drivers/misc/eeprom/eeprom_93xx46.c -+++ b/drivers/misc/eeprom/eeprom_93xx46.c -@@ -512,3 +512,4 @@ MODULE_LICENSE("GPL"); - MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs"); - MODULE_AUTHOR("Anatolij Gustschin "); - MODULE_ALIAS("spi:93xx46"); -+MODULE_ALIAS("spi:eeprom-93xx46"); -diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c -index 70eb5ed942d03..f12e909034ac0 100644 ---- a/drivers/misc/fastrpc.c -+++ b/drivers/misc/fastrpc.c -@@ -520,12 +520,13 @@ fastrpc_map_dma_buf(struct dma_buf_attachment *attachment, - { - struct fastrpc_dma_buf_attachment *a = attachment->priv; - struct sg_table *table; -+ int ret; - - table = &a->sgt; - -- if (!dma_map_sgtable(attachment->dev, table, dir, 0)) -- return ERR_PTR(-ENOMEM); -- -+ ret = dma_map_sgtable(attachment->dev, table, dir, 0); -+ if (ret) -+ table = ERR_PTR(ret); - return table; - } - -diff --git a/drivers/misc/mei/bus.c b/drivers/misc/mei/bus.c -index 2907db260fba5..bf0407e8905c4 100644 ---- a/drivers/misc/mei/bus.c -+++ b/drivers/misc/mei/bus.c -@@ -60,6 +60,13 @@ ssize_t __mei_cl_send(struct mei_cl *cl, u8 *buf, size_t length, u8 vtag, - goto out; - } - -+ if (vtag) { -+ /* Check if vtag is supported by client */ -+ rets = mei_cl_vt_support_check(cl); -+ if (rets) -+ goto out; -+ } -+ - if (length > mei_cl_mtu(cl)) { - rets = -EFBIG; - goto out; -diff --git a/drivers/misc/mei/hbm.c b/drivers/misc/mei/hbm.c -index 686e8b6a4c55e..0cba3c6dfb148 100644 ---- a/drivers/misc/mei/hbm.c -+++ b/drivers/misc/mei/hbm.c -@@ -1373,7 +1373,7 @@ int mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr) - return -EPROTO; - } - -- dev->dev_state = MEI_DEV_POWER_DOWN; -+ mei_set_devstate(dev, MEI_DEV_POWER_DOWN); - dev_info(dev->dev, "hbm: stop response: resetting.\n"); - /* force the reset */ - return -EPROTO; -diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h -index 9cf8d8f60cfef..14be76d4c2e61 100644 ---- a/drivers/misc/mei/hw-me-regs.h -+++ b/drivers/misc/mei/hw-me-regs.h -@@ -101,6 +101,11 @@ - #define MEI_DEV_ID_MCC 0x4B70 /* Mule Creek Canyon (EHL) */ - #define MEI_DEV_ID_MCC_4 0x4B75 /* Mule Creek Canyon 4 (EHL) */ - -+#define MEI_DEV_ID_EBG 0x1BE0 /* Emmitsburg WS */ -+ -+#define MEI_DEV_ID_ADP_S 0x7AE8 /* Alder Lake Point S */ -+#define MEI_DEV_ID_ADP_LP 0x7A60 /* Alder Lake Point LP */ -+ - /* - * MEI HW Section - */ -diff --git a/drivers/misc/mei/interrupt.c b/drivers/misc/mei/interrupt.c -index 326955b04fda9..2161c1234ad72 100644 ---- a/drivers/misc/mei/interrupt.c -+++ b/drivers/misc/mei/interrupt.c -@@ -295,12 +295,17 @@ static inline bool hdr_is_fixed(struct mei_msg_hdr *mei_hdr) - static inline int hdr_is_valid(u32 msg_hdr) - { - struct mei_msg_hdr *mei_hdr; -+ u32 expected_len = 0; - - mei_hdr = (struct mei_msg_hdr *)&msg_hdr; - if (!msg_hdr || mei_hdr->reserved) - return -EBADMSG; - -- if (mei_hdr->dma_ring && mei_hdr->length != MEI_SLOT_SIZE) -+ if (mei_hdr->dma_ring) -+ expected_len += MEI_SLOT_SIZE; -+ if (mei_hdr->extended) -+ expected_len += MEI_SLOT_SIZE; -+ if (mei_hdr->length < expected_len) - return -EBADMSG; - - return 0; -@@ -324,6 +329,8 @@ int mei_irq_read_handler(struct mei_device *dev, - struct mei_cl *cl; - int ret; - u32 ext_meta_hdr_u32; -+ u32 hdr_size_left; -+ u32 hdr_size_ext; - int i; - int ext_hdr_end; - -@@ -353,6 +360,7 @@ int mei_irq_read_handler(struct mei_device *dev, - } - - ext_hdr_end = 1; -+ hdr_size_left = mei_hdr->length; - - if (mei_hdr->extended) { - if (!dev->rd_msg_hdr[1]) { -@@ -363,8 +371,21 @@ int mei_irq_read_handler(struct mei_device *dev, - dev_dbg(dev->dev, "extended header is %08x\n", - ext_meta_hdr_u32); - } -- meta_hdr = ((struct mei_ext_meta_hdr *) -- dev->rd_msg_hdr + 1); -+ meta_hdr = ((struct mei_ext_meta_hdr *)dev->rd_msg_hdr + 1); -+ if (check_add_overflow((u32)sizeof(*meta_hdr), -+ mei_slots2data(meta_hdr->size), -+ &hdr_size_ext)) { -+ dev_err(dev->dev, "extended message size too big %d\n", -+ meta_hdr->size); -+ return -EBADMSG; -+ } -+ if (hdr_size_left < hdr_size_ext) { -+ dev_err(dev->dev, "corrupted message header len %d\n", -+ mei_hdr->length); -+ return -EBADMSG; -+ } -+ hdr_size_left -= hdr_size_ext; -+ - ext_hdr_end = meta_hdr->size + 2; - for (i = dev->rd_msg_hdr_count; i < ext_hdr_end; i++) { - dev->rd_msg_hdr[i] = mei_read_hdr(dev); -@@ -376,6 +397,12 @@ int mei_irq_read_handler(struct mei_device *dev, - } - - if (mei_hdr->dma_ring) { -+ if (hdr_size_left != sizeof(dev->rd_msg_hdr[ext_hdr_end])) { -+ dev_err(dev->dev, "corrupted message header len %d\n", -+ mei_hdr->length); -+ return -EBADMSG; -+ } -+ - dev->rd_msg_hdr[ext_hdr_end] = mei_read_hdr(dev); - dev->rd_msg_hdr_count++; - (*slots)--; -diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c -index 1de9ef7a272ba..a7e179626b635 100644 ---- a/drivers/misc/mei/pci-me.c -+++ b/drivers/misc/mei/pci-me.c -@@ -107,6 +107,11 @@ static const struct pci_device_id mei_me_pci_tbl[] = { - - {MEI_PCI_DEVICE(MEI_DEV_ID_CDF, MEI_ME_PCH8_CFG)}, - -+ {MEI_PCI_DEVICE(MEI_DEV_ID_EBG, MEI_ME_PCH15_SPS_CFG)}, -+ -+ {MEI_PCI_DEVICE(MEI_DEV_ID_ADP_S, MEI_ME_PCH15_CFG)}, -+ {MEI_PCI_DEVICE(MEI_DEV_ID_ADP_LP, MEI_ME_PCH15_CFG)}, -+ - /* required last entry */ - {0, } - }; -diff --git a/drivers/misc/vmw_vmci/vmci_queue_pair.c b/drivers/misc/vmw_vmci/vmci_queue_pair.c -index c49065887e8f5..c2338750313c4 100644 ---- a/drivers/misc/vmw_vmci/vmci_queue_pair.c -+++ b/drivers/misc/vmw_vmci/vmci_queue_pair.c -@@ -537,6 +537,9 @@ static struct vmci_queue *qp_host_alloc_queue(u64 size) - - queue_page_size = num_pages * sizeof(*queue->kernel_if->u.h.page); - -+ if (queue_size + queue_page_size > KMALLOC_MAX_SIZE) -+ return NULL; -+ - queue = kzalloc(queue_size + queue_page_size, GFP_KERNEL); - if (queue) { - queue->q_header = NULL; -@@ -630,7 +633,7 @@ static void qp_release_pages(struct page **pages, - - for (i = 0; i < num_pages; i++) { - if (dirty) -- set_page_dirty(pages[i]); -+ set_page_dirty_lock(pages[i]); - - put_page(pages[i]); - pages[i] = NULL; -diff --git a/drivers/mmc/host/owl-mmc.c b/drivers/mmc/host/owl-mmc.c -index 53b81582f1afe..5490962dc8e53 100644 ---- a/drivers/mmc/host/owl-mmc.c -+++ b/drivers/mmc/host/owl-mmc.c -@@ -640,7 +640,7 @@ static int owl_mmc_probe(struct platform_device *pdev) - owl_host->irq = platform_get_irq(pdev, 0); - if (owl_host->irq < 0) { - ret = -EINVAL; -- goto err_free_host; -+ goto err_release_channel; - } - - ret = devm_request_irq(&pdev->dev, owl_host->irq, owl_irq_handler, -@@ -648,19 +648,21 @@ static int owl_mmc_probe(struct platform_device *pdev) - if (ret) { - dev_err(&pdev->dev, "Failed to request irq %d\n", - owl_host->irq); -- goto err_free_host; -+ goto err_release_channel; - } - - ret = mmc_add_host(mmc); - if (ret) { - dev_err(&pdev->dev, "Failed to add host\n"); -- goto err_free_host; -+ goto err_release_channel; - } - - dev_dbg(&pdev->dev, "Owl MMC Controller Initialized\n"); - - return 0; - -+err_release_channel: -+ dma_release_channel(owl_host->dma); - err_free_host: - mmc_free_host(mmc); - -@@ -674,6 +676,7 @@ static int owl_mmc_remove(struct platform_device *pdev) - - mmc_remove_host(mmc); - disable_irq(owl_host->irq); -+ dma_release_channel(owl_host->dma); - mmc_free_host(mmc); - - return 0; -diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c -index fe13e1ea22dcc..f3e76d6b3e3fe 100644 ---- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c -+++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c -@@ -186,8 +186,8 @@ renesas_sdhi_internal_dmac_start_dma(struct tmio_mmc_host *host, - mmc_get_dma_dir(data))) - goto force_pio; - -- /* This DMAC cannot handle if buffer is not 8-bytes alignment */ -- if (!IS_ALIGNED(sg_dma_address(sg), 8)) -+ /* This DMAC cannot handle if buffer is not 128-bytes alignment */ -+ if (!IS_ALIGNED(sg_dma_address(sg), 128)) - goto force_pio_with_unmap; - - if (data->flags & MMC_DATA_READ) { -diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c -index 16ed19f479392..a20459744d213 100644 ---- a/drivers/mmc/host/sdhci-esdhc-imx.c -+++ b/drivers/mmc/host/sdhci-esdhc-imx.c -@@ -1666,9 +1666,10 @@ static int sdhci_esdhc_imx_remove(struct platform_device *pdev) - struct sdhci_host *host = platform_get_drvdata(pdev); - struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); - struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); -- int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff); -+ int dead; - - pm_runtime_get_sync(&pdev->dev); -+ dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff); - pm_runtime_disable(&pdev->dev); - pm_runtime_put_noidle(&pdev->dev); - -diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c -index fa76748d89293..94e3f72f6405d 100644 ---- a/drivers/mmc/host/sdhci-pci-o2micro.c -+++ b/drivers/mmc/host/sdhci-pci-o2micro.c -@@ -33,6 +33,8 @@ - #define O2_SD_ADMA2 0xE7 - #define O2_SD_INF_MOD 0xF1 - #define O2_SD_MISC_CTRL4 0xFC -+#define O2_SD_MISC_CTRL 0x1C0 -+#define O2_SD_PWR_FORCE_L0 0x0002 - #define O2_SD_TUNING_CTRL 0x300 - #define O2_SD_PLL_SETTING 0x304 - #define O2_SD_MISC_SETTING 0x308 -@@ -300,6 +302,8 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode) - { - struct sdhci_host *host = mmc_priv(mmc); - int current_bus_width = 0; -+ u32 scratch32 = 0; -+ u16 scratch = 0; - - /* - * This handler only implements the eMMC tuning that is specific to -@@ -312,6 +316,17 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode) - if (WARN_ON((opcode != MMC_SEND_TUNING_BLOCK_HS200) && - (opcode != MMC_SEND_TUNING_BLOCK))) - return -EINVAL; -+ -+ /* Force power mode enter L0 */ -+ scratch = sdhci_readw(host, O2_SD_MISC_CTRL); -+ scratch |= O2_SD_PWR_FORCE_L0; -+ sdhci_writew(host, scratch, O2_SD_MISC_CTRL); -+ -+ /* wait DLL lock, timeout value 5ms */ -+ if (readx_poll_timeout(sdhci_o2_pll_dll_wdt_control, host, -+ scratch32, (scratch32 & O2_DLL_LOCK_STATUS), 1, 5000)) -+ pr_warn("%s: DLL can't lock in 5ms after force L0 during tuning.\n", -+ mmc_hostname(host->mmc)); - /* - * Judge the tuning reason, whether caused by dll shift - * If cause by dll shift, should call sdhci_o2_dll_recovery -@@ -344,6 +359,11 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode) - sdhci_set_bus_width(host, current_bus_width); - } - -+ /* Cancel force power mode enter L0 */ -+ scratch = sdhci_readw(host, O2_SD_MISC_CTRL); -+ scratch &= ~(O2_SD_PWR_FORCE_L0); -+ sdhci_writew(host, scratch, O2_SD_MISC_CTRL); -+ - sdhci_reset(host, SDHCI_RESET_CMD); - sdhci_reset(host, SDHCI_RESET_DATA); - -diff --git a/drivers/mmc/host/sdhci-sprd.c b/drivers/mmc/host/sdhci-sprd.c -index f85171edabeb9..5dc36efff47ff 100644 ---- a/drivers/mmc/host/sdhci-sprd.c -+++ b/drivers/mmc/host/sdhci-sprd.c -@@ -708,14 +708,14 @@ static int sdhci_sprd_remove(struct platform_device *pdev) - { - struct sdhci_host *host = platform_get_drvdata(pdev); - struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host); -- struct mmc_host *mmc = host->mmc; - -- mmc_remove_host(mmc); -+ sdhci_remove_host(host, 0); -+ - clk_disable_unprepare(sprd_host->clk_sdio); - clk_disable_unprepare(sprd_host->clk_enable); - clk_disable_unprepare(sprd_host->clk_2x_enable); - -- mmc_free_host(mmc); -+ sdhci_pltfm_free(pdev); - - return 0; - } -diff --git a/drivers/mmc/host/usdhi6rol0.c b/drivers/mmc/host/usdhi6rol0.c -index e2d5112d809dc..615f3d008af1e 100644 ---- a/drivers/mmc/host/usdhi6rol0.c -+++ b/drivers/mmc/host/usdhi6rol0.c -@@ -1858,10 +1858,12 @@ static int usdhi6_probe(struct platform_device *pdev) - - ret = mmc_add_host(mmc); - if (ret < 0) -- goto e_clk_off; -+ goto e_release_dma; - - return 0; - -+e_release_dma: -+ usdhi6_dma_release(host); - e_clk_off: - clk_disable_unprepare(host->clk); - e_free_mmc: -diff --git a/drivers/mtd/devices/phram.c b/drivers/mtd/devices/phram.c -index cfd170946ba48..5b04ae6c30573 100644 ---- a/drivers/mtd/devices/phram.c -+++ b/drivers/mtd/devices/phram.c -@@ -222,6 +222,7 @@ static int phram_setup(const char *val) - uint64_t start; - uint64_t len; - uint64_t erasesize = PAGE_SIZE; -+ uint32_t rem; - int i, ret; - - if (strnlen(val, sizeof(buf)) >= sizeof(buf)) -@@ -263,8 +264,11 @@ static int phram_setup(const char *val) - } - } - -+ if (erasesize) -+ div_u64_rem(len, (uint32_t)erasesize, &rem); -+ - if (len == 0 || erasesize == 0 || erasesize > len -- || erasesize > UINT_MAX || do_div(len, (uint32_t)erasesize) != 0) { -+ || erasesize > UINT_MAX || rem) { - parse_err("illegal erasesize or len\n"); - goto error; - } -diff --git a/drivers/mtd/nand/raw/intel-nand-controller.c b/drivers/mtd/nand/raw/intel-nand-controller.c -index a304fda5d1fa5..8b49fd56cf964 100644 ---- a/drivers/mtd/nand/raw/intel-nand-controller.c -+++ b/drivers/mtd/nand/raw/intel-nand-controller.c -@@ -318,8 +318,10 @@ static int ebu_dma_start(struct ebu_nand_controller *ebu_host, u32 dir, - } - - tx = dmaengine_prep_slave_single(chan, buf_dma, len, dir, flags); -- if (!tx) -- return -ENXIO; -+ if (!tx) { -+ ret = -ENXIO; -+ goto err_unmap; -+ } - - tx->callback = callback; - tx->callback_param = ebu_host; -diff --git a/drivers/mtd/parsers/afs.c b/drivers/mtd/parsers/afs.c -index 980e332bdac48..26116694c821b 100644 ---- a/drivers/mtd/parsers/afs.c -+++ b/drivers/mtd/parsers/afs.c -@@ -370,10 +370,8 @@ static int parse_afs_partitions(struct mtd_info *mtd, - return i; - - out_free_parts: -- while (i >= 0) { -+ while (--i >= 0) - kfree(parts[i].name); -- i--; -- } - kfree(parts); - *pparts = NULL; - return ret; -diff --git a/drivers/mtd/parsers/parser_imagetag.c b/drivers/mtd/parsers/parser_imagetag.c -index d69607b482272..fab0949aabba1 100644 ---- a/drivers/mtd/parsers/parser_imagetag.c -+++ b/drivers/mtd/parsers/parser_imagetag.c -@@ -83,6 +83,7 @@ static int bcm963xx_parse_imagetag_partitions(struct mtd_info *master, - pr_err("invalid rootfs address: %*ph\n", - (int)sizeof(buf->flash_image_start), - buf->flash_image_start); -+ ret = -EINVAL; - goto out; - } - -@@ -92,6 +93,7 @@ static int bcm963xx_parse_imagetag_partitions(struct mtd_info *master, - pr_err("invalid kernel address: %*ph\n", - (int)sizeof(buf->kernel_address), - buf->kernel_address); -+ ret = -EINVAL; - goto out; - } - -@@ -100,6 +102,7 @@ static int bcm963xx_parse_imagetag_partitions(struct mtd_info *master, - pr_err("invalid kernel length: %*ph\n", - (int)sizeof(buf->kernel_length), - buf->kernel_length); -+ ret = -EINVAL; - goto out; - } - -@@ -108,6 +111,7 @@ static int bcm963xx_parse_imagetag_partitions(struct mtd_info *master, - pr_err("invalid total length: %*ph\n", - (int)sizeof(buf->total_length), - buf->total_length); -+ ret = -EINVAL; - goto out; - } - -diff --git a/drivers/mtd/spi-nor/controllers/hisi-sfc.c b/drivers/mtd/spi-nor/controllers/hisi-sfc.c -index 7c26f8f565cba..47fbf1d1e5573 100644 ---- a/drivers/mtd/spi-nor/controllers/hisi-sfc.c -+++ b/drivers/mtd/spi-nor/controllers/hisi-sfc.c -@@ -399,8 +399,10 @@ static int hisi_spi_nor_register_all(struct hifmc_host *host) - - for_each_available_child_of_node(dev->of_node, np) { - ret = hisi_spi_nor_register(np, host); -- if (ret) -+ if (ret) { -+ of_node_put(np); - goto fail; -+ } - - if (host->num_chip == HIFMC_MAX_CHIP_NUM) { - dev_warn(dev, "Flash device number exceeds the maximum chipselect number\n"); -diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c -index 20df44b753dab..b17faccc95c43 100644 ---- a/drivers/mtd/spi-nor/core.c -+++ b/drivers/mtd/spi-nor/core.c -@@ -1364,14 +1364,15 @@ spi_nor_find_best_erase_type(const struct spi_nor_erase_map *map, - - erase = &map->erase_type[i]; - -+ /* Alignment is not mandatory for overlaid regions */ -+ if (region->offset & SNOR_OVERLAID_REGION && -+ region->size <= len) -+ return erase; -+ - /* Don't erase more than what the user has asked for. */ - if (erase->size > len) - continue; - -- /* Alignment is not mandatory for overlaid regions */ -- if (region->offset & SNOR_OVERLAID_REGION) -- return erase; -- - spi_nor_div_by_erase_size(erase, addr, &rem); - if (rem) - continue; -@@ -1515,6 +1516,7 @@ static int spi_nor_init_erase_cmd_list(struct spi_nor *nor, - goto destroy_erase_cmd_list; - - if (prev_erase != erase || -+ erase->size != cmd->size || - region->offset & SNOR_OVERLAID_REGION) { - cmd = spi_nor_init_erase_cmd(region, erase); - if (IS_ERR(cmd)) { -diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c -index 6ee7719e59037..25142ec4737b7 100644 ---- a/drivers/mtd/spi-nor/sfdp.c -+++ b/drivers/mtd/spi-nor/sfdp.c -@@ -788,7 +788,7 @@ spi_nor_region_check_overlay(struct spi_nor_erase_region *region, - int i; - - for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) { -- if (!(erase_type & BIT(i))) -+ if (!(erase[i].size && erase_type & BIT(erase[i].idx))) - continue; - if (region->size & erase[i].size_mask) { - spi_nor_region_mark_overlay(region); -@@ -858,6 +858,7 @@ spi_nor_init_non_uniform_erase_map(struct spi_nor *nor, - offset = (region[i].offset & ~SNOR_ERASE_FLAGS_MASK) + - region[i].size; - } -+ spi_nor_region_mark_end(®ion[i - 1]); - - save_uniform_erase_type = map->uniform_erase_type; - map->uniform_erase_type = spi_nor_sort_erase_mask(map, -@@ -881,8 +882,6 @@ spi_nor_init_non_uniform_erase_map(struct spi_nor *nor, - if (!(regions_erase_type & BIT(erase[i].idx))) - spi_nor_set_erase_type(&erase[i], 0, 0xFF); - -- spi_nor_region_mark_end(®ion[i - 1]); -- - return 0; - } - -diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig -index 260f9f46668b8..63339d29be905 100644 ---- a/drivers/net/Kconfig -+++ b/drivers/net/Kconfig -@@ -87,7 +87,7 @@ config WIREGUARD - select CRYPTO_CURVE25519_X86 if X86 && 64BIT - select ARM_CRYPTO if ARM - select ARM64_CRYPTO if ARM64 -- select CRYPTO_CHACHA20_NEON if (ARM || ARM64) && KERNEL_MODE_NEON -+ select CRYPTO_CHACHA20_NEON if ARM || (ARM64 && KERNEL_MODE_NEON) - select CRYPTO_POLY1305_NEON if ARM64 && KERNEL_MODE_NEON - select CRYPTO_POLY1305_ARM if ARM - select CRYPTO_CURVE25519_NEON if ARM && KERNEL_MODE_NEON -diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c -index f07e8b737d31e..ee39e79927efb 100644 ---- a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c -+++ b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c -@@ -2901,7 +2901,7 @@ static int mcp251xfd_probe(struct spi_device *spi) - spi_get_device_id(spi)->driver_data; - - /* Errata Reference: -- * mcp2517fd: DS80000789B, mcp2518fd: DS80000792C 4. -+ * mcp2517fd: DS80000792C 5., mcp2518fd: DS80000789C 4. - * - * The SPI can write corrupted data to the RAM at fast SPI - * speeds: -diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c -index 45fdb1256dbfe..0f1ee4a4fa55a 100644 ---- a/drivers/net/dsa/ocelot/felix.c -+++ b/drivers/net/dsa/ocelot/felix.c -@@ -654,14 +654,18 @@ static void felix_teardown(struct dsa_switch *ds) - struct felix *felix = ocelot_to_felix(ocelot); - int port; - -- if (felix->info->mdio_bus_free) -- felix->info->mdio_bus_free(ocelot); -- -- for (port = 0; port < ocelot->num_phys_ports; port++) -- ocelot_deinit_port(ocelot, port); - ocelot_deinit_timestamp(ocelot); -- /* stop workqueue thread */ - ocelot_deinit(ocelot); -+ -+ for (port = 0; port < ocelot->num_phys_ports; port++) { -+ if (dsa_is_unused_port(ds, port)) -+ continue; -+ -+ ocelot_deinit_port(ocelot, port); -+ } -+ -+ if (felix->info->mdio_bus_free) -+ felix->info->mdio_bus_free(ocelot); - } - - static int felix_hwtstamp_get(struct dsa_switch *ds, int port, -diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h -index b40d4377cc71d..b2cd3bdba9f89 100644 ---- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h -+++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h -@@ -1279,10 +1279,18 @@ - #define MDIO_PMA_10GBR_FECCTRL 0x00ab - #endif - -+#ifndef MDIO_PMA_RX_CTRL1 -+#define MDIO_PMA_RX_CTRL1 0x8051 -+#endif -+ - #ifndef MDIO_PCS_DIG_CTRL - #define MDIO_PCS_DIG_CTRL 0x8000 - #endif - -+#ifndef MDIO_PCS_DIGITAL_STAT -+#define MDIO_PCS_DIGITAL_STAT 0x8010 -+#endif -+ - #ifndef MDIO_AN_XNP - #define MDIO_AN_XNP 0x0016 - #endif -@@ -1358,6 +1366,8 @@ - #define XGBE_KR_TRAINING_ENABLE BIT(1) - - #define XGBE_PCS_CL37_BP BIT(12) -+#define XGBE_PCS_PSEQ_STATE_MASK 0x1c -+#define XGBE_PCS_PSEQ_STATE_POWER_GOOD 0x10 - - #define XGBE_AN_CL37_INT_CMPLT BIT(0) - #define XGBE_AN_CL37_INT_MASK 0x01 -@@ -1375,6 +1385,10 @@ - #define XGBE_PMA_CDR_TRACK_EN_OFF 0x00 - #define XGBE_PMA_CDR_TRACK_EN_ON 0x01 - -+#define XGBE_PMA_RX_RST_0_MASK BIT(4) -+#define XGBE_PMA_RX_RST_0_RESET_ON 0x10 -+#define XGBE_PMA_RX_RST_0_RESET_OFF 0x00 -+ - /* Bit setting and getting macros - * The get macro will extract the current bit field value from within - * the variable -diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c -index 2709a2db56577..395eb0b526802 100644 ---- a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c -+++ b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c -@@ -1368,6 +1368,7 @@ static void xgbe_stop(struct xgbe_prv_data *pdata) - return; - - netif_tx_stop_all_queues(netdev); -+ netif_carrier_off(pdata->netdev); - - xgbe_stop_timers(pdata); - flush_workqueue(pdata->dev_workqueue); -diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c -index 93ef5a30cb8d9..4e97b48695220 100644 ---- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c -+++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c -@@ -1345,7 +1345,7 @@ static void xgbe_phy_status(struct xgbe_prv_data *pdata) - &an_restart); - if (an_restart) { - xgbe_phy_config_aneg(pdata); -- return; -+ goto adjust_link; - } - - if (pdata->phy.link) { -@@ -1396,7 +1396,6 @@ static void xgbe_phy_stop(struct xgbe_prv_data *pdata) - pdata->phy_if.phy_impl.stop(pdata); - - pdata->phy.link = 0; -- netif_carrier_off(pdata->netdev); - - xgbe_phy_adjust_link(pdata); - } -diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c -index 859ded0c06b05..18e48b3bc402b 100644 ---- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c -+++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c -@@ -922,6 +922,9 @@ static bool xgbe_phy_belfuse_phy_quirks(struct xgbe_prv_data *pdata) - if ((phy_id & 0xfffffff0) != 0x03625d10) - return false; - -+ /* Reset PHY - wait for self-clearing reset bit to clear */ -+ genphy_soft_reset(phy_data->phydev); -+ - /* Disable RGMII mode */ - phy_write(phy_data->phydev, 0x18, 0x7007); - reg = phy_read(phy_data->phydev, 0x18); -@@ -1953,6 +1956,27 @@ static void xgbe_phy_set_redrv_mode(struct xgbe_prv_data *pdata) - xgbe_phy_put_comm_ownership(pdata); - } - -+static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata) -+{ -+ int reg; -+ -+ reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PCS, MDIO_PCS_DIGITAL_STAT, -+ XGBE_PCS_PSEQ_STATE_MASK); -+ if (reg == XGBE_PCS_PSEQ_STATE_POWER_GOOD) { -+ /* Mailbox command timed out, reset of RX block is required. -+ * This can be done by asseting the reset bit and wait for -+ * its compeletion. -+ */ -+ XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_CTRL1, -+ XGBE_PMA_RX_RST_0_MASK, XGBE_PMA_RX_RST_0_RESET_ON); -+ ndelay(20); -+ XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_CTRL1, -+ XGBE_PMA_RX_RST_0_MASK, XGBE_PMA_RX_RST_0_RESET_OFF); -+ usleep_range(40, 50); -+ netif_err(pdata, link, pdata->netdev, "firmware mailbox reset performed\n"); -+ } -+} -+ - static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, - unsigned int cmd, unsigned int sub_cmd) - { -@@ -1960,9 +1984,11 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, - unsigned int wait; - - /* Log if a previous command did not complete */ -- if (XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS)) -+ if (XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS)) { - netif_dbg(pdata, link, pdata->netdev, - "firmware mailbox not ready for command\n"); -+ xgbe_phy_rx_reset(pdata); -+ } - - /* Construct the command */ - XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, cmd); -@@ -1984,6 +2010,9 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, - - netif_dbg(pdata, link, pdata->netdev, - "firmware mailbox command did not complete\n"); -+ -+ /* Reset on error */ -+ xgbe_phy_rx_reset(pdata); - } - - static void xgbe_phy_rrc(struct xgbe_prv_data *pdata) -@@ -2584,6 +2613,14 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) - if (reg & MDIO_STAT1_LSTATUS) - return 1; - -+ if (pdata->phy.autoneg == AUTONEG_ENABLE && -+ phy_data->port_mode == XGBE_PORT_MODE_BACKPLANE) { -+ if (!test_bit(XGBE_LINK_INIT, &pdata->dev_state)) { -+ netif_carrier_off(pdata->netdev); -+ *an_restart = 1; -+ } -+ } -+ - /* No link, attempt a receiver reset cycle */ - if (phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) { - phy_data->rrc_count = 0; -diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c -index d10e4f85dd11a..1c96b7ba24f28 100644 ---- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c -+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c -@@ -8856,9 +8856,10 @@ void bnxt_tx_disable(struct bnxt *bp) - txr->dev_state = BNXT_DEV_STATE_CLOSING; - } - } -+ /* Drop carrier first to prevent TX timeout */ -+ netif_carrier_off(bp->dev); - /* Stop all TX queues */ - netif_tx_disable(bp->dev); -- netif_carrier_off(bp->dev); - } - - void bnxt_tx_enable(struct bnxt *bp) -diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c -index 6b7b69ed62db0..a9bcf887d2fbe 100644 ---- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c -+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c -@@ -472,8 +472,8 @@ static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req, - if (BNXT_PF(bp) && !bnxt_hwrm_get_nvm_cfg_ver(bp, &nvm_cfg_ver)) { - u32 ver = nvm_cfg_ver.vu32; - -- sprintf(buf, "%X.%X.%X", (ver >> 16) & 0xF, (ver >> 8) & 0xF, -- ver & 0xF); -+ sprintf(buf, "%d.%d.%d", (ver >> 16) & 0xf, (ver >> 8) & 0xf, -+ ver & 0xf); - rc = bnxt_dl_info_put(bp, req, BNXT_VERSION_STORED, - DEVLINK_INFO_VERSION_GENERIC_FW_PSID, - buf); -diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h -index 1b49f2fa9b185..34546f5312eee 100644 ---- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h -+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h -@@ -46,6 +46,9 @@ - #define MAX_ULD_QSETS 16 - #define MAX_ULD_NPORTS 4 - -+/* ulp_mem_io + ulptx_idata + payload + padding */ -+#define MAX_IMM_ULPTX_WR_LEN (32 + 8 + 256 + 8) -+ - /* CPL message priority levels */ - enum { - CPL_PRIORITY_DATA = 0, /* data messages */ -diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c -index 196652a114c5f..3334c9e2152ab 100644 ---- a/drivers/net/ethernet/chelsio/cxgb4/sge.c -+++ b/drivers/net/ethernet/chelsio/cxgb4/sge.c -@@ -2842,17 +2842,22 @@ int t4_mgmt_tx(struct adapter *adap, struct sk_buff *skb) - * @skb: the packet - * - * Returns true if a packet can be sent as an offload WR with immediate -- * data. We currently use the same limit as for Ethernet packets. -+ * data. -+ * FW_OFLD_TX_DATA_WR limits the payload to 255 bytes due to 8-bit field. -+ * However, FW_ULPTX_WR commands have a 256 byte immediate only -+ * payload limit. - */ - static inline int is_ofld_imm(const struct sk_buff *skb) - { - struct work_request_hdr *req = (struct work_request_hdr *)skb->data; - unsigned long opcode = FW_WR_OP_G(ntohl(req->wr_hi)); - -- if (opcode == FW_CRYPTO_LOOKASIDE_WR) -+ if (unlikely(opcode == FW_ULPTX_WR)) -+ return skb->len <= MAX_IMM_ULPTX_WR_LEN; -+ else if (opcode == FW_CRYPTO_LOOKASIDE_WR) - return skb->len <= SGE_MAX_WR_LEN; - else -- return skb->len <= MAX_IMM_TX_PKT_LEN; -+ return skb->len <= MAX_IMM_OFLD_TX_DATA_WR_LEN; - } - - /** -diff --git a/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h b/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h -index 47ba81e42f5d0..b1161bdeda4dc 100644 ---- a/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h -+++ b/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h -@@ -50,9 +50,6 @@ - #define MIN_RCV_WND (24 * 1024U) - #define LOOPBACK(x) (((x) & htonl(0xff000000)) == htonl(0x7f000000)) - --/* ulp_mem_io + ulptx_idata + payload + padding */ --#define MAX_IMM_ULPTX_WR_LEN (32 + 8 + 256 + 8) -- - /* for TX: a skb must have a headroom of at least TX_HEADER_LEN bytes */ - #define TX_HEADER_LEN \ - (sizeof(struct fw_ofld_tx_data_wr) + sizeof(struct sge_opaque_hdr)) -diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c -index 6faa20bed4885..9905caeaeee3e 100644 ---- a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c -+++ b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c -@@ -2672,7 +2672,6 @@ static enum qman_cb_dqrr_result rx_default_dqrr(struct qman_portal *portal, - u32 hash; - u64 ns; - -- np = container_of(&portal, struct dpaa_napi_portal, p); - dpaa_fq = container_of(fq, struct dpaa_fq, fq_base); - fd_status = be32_to_cpu(fd->status); - fd_format = qm_fd_get_format(fd); -@@ -2687,6 +2686,7 @@ static enum qman_cb_dqrr_result rx_default_dqrr(struct qman_portal *portal, - - percpu_priv = this_cpu_ptr(priv->percpu_priv); - percpu_stats = &percpu_priv->stats; -+ np = &percpu_priv->np; - - if (unlikely(dpaa_eth_napi_schedule(percpu_priv, portal, sched_napi))) - return qman_cb_dqrr_stop; -diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c -index fb0bcd18ec0c1..f1c2b3c7f7e99 100644 ---- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c -+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c -@@ -399,10 +399,20 @@ static u32 dpaa2_eth_run_xdp(struct dpaa2_eth_priv *priv, - xdp.frame_sz = DPAA2_ETH_RX_BUF_RAW_SIZE; - - err = xdp_do_redirect(priv->net_dev, &xdp, xdp_prog); -- if (unlikely(err)) -+ if (unlikely(err)) { -+ addr = dma_map_page(priv->net_dev->dev.parent, -+ virt_to_page(vaddr), 0, -+ priv->rx_buf_size, DMA_BIDIRECTIONAL); -+ if (unlikely(dma_mapping_error(priv->net_dev->dev.parent, addr))) { -+ free_pages((unsigned long)vaddr, 0); -+ } else { -+ ch->buf_count++; -+ dpaa2_eth_xdp_release_buf(priv, ch, addr); -+ } - ch->stats.xdp_drop++; -- else -+ } else { - ch->stats.xdp_redirect++; -+ } - break; - } - -diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pf.c b/drivers/net/ethernet/freescale/enetc/enetc_pf.c -index 3eb5f1375bd4c..515c5b29d7aab 100644 ---- a/drivers/net/ethernet/freescale/enetc/enetc_pf.c -+++ b/drivers/net/ethernet/freescale/enetc/enetc_pf.c -@@ -1157,14 +1157,15 @@ static void enetc_pf_remove(struct pci_dev *pdev) - struct enetc_ndev_priv *priv; - - priv = netdev_priv(si->ndev); -- enetc_phylink_destroy(priv); -- enetc_mdiobus_destroy(pf); - - if (pf->num_vfs) - enetc_sriov_configure(pdev, 0); - - unregister_netdev(si->ndev); - -+ enetc_phylink_destroy(priv); -+ enetc_mdiobus_destroy(pf); -+ - enetc_free_msix(priv); - - enetc_free_si_resources(priv); -diff --git a/drivers/net/ethernet/ibm/ibmvnic.c b/drivers/net/ethernet/ibm/ibmvnic.c -index a536fdbf05e19..13ae7eee7ef5f 100644 ---- a/drivers/net/ethernet/ibm/ibmvnic.c -+++ b/drivers/net/ethernet/ibm/ibmvnic.c -@@ -247,8 +247,13 @@ static void free_long_term_buff(struct ibmvnic_adapter *adapter, - if (!ltb->buff) - return; - -+ /* VIOS automatically unmaps the long term buffer at remote -+ * end for the following resets: -+ * FAILOVER, MOBILITY, TIMEOUT. -+ */ - if (adapter->reset_reason != VNIC_RESET_FAILOVER && -- adapter->reset_reason != VNIC_RESET_MOBILITY) -+ adapter->reset_reason != VNIC_RESET_MOBILITY && -+ adapter->reset_reason != VNIC_RESET_TIMEOUT) - send_request_unmap(adapter, ltb->map_id); - dma_free_coherent(dev, ltb->size, ltb->buff, ltb->addr); - } -@@ -1353,10 +1358,8 @@ static int __ibmvnic_close(struct net_device *netdev) - - adapter->state = VNIC_CLOSING; - rc = set_link_state(adapter, IBMVNIC_LOGICAL_LNK_DN); -- if (rc) -- return rc; - adapter->state = VNIC_CLOSED; -- return 0; -+ return rc; - } - - static int ibmvnic_close(struct net_device *netdev) -@@ -1702,6 +1705,9 @@ static netdev_tx_t ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev) - skb_copy_from_linear_data(skb, dst, skb->len); - } - -+ /* post changes to long_term_buff *dst before VIOS accessing it */ -+ dma_wmb(); -+ - tx_pool->consumer_index = - (tx_pool->consumer_index + 1) % tx_pool->num_buffers; - -@@ -2389,6 +2395,8 @@ static int ibmvnic_reset(struct ibmvnic_adapter *adapter, - unsigned long flags; - int ret; - -+ spin_lock_irqsave(&adapter->rwi_lock, flags); -+ - /* - * If failover is pending don't schedule any other reset. - * Instead let the failover complete. If there is already a -@@ -2409,14 +2417,11 @@ static int ibmvnic_reset(struct ibmvnic_adapter *adapter, - goto err; - } - -- spin_lock_irqsave(&adapter->rwi_lock, flags); -- - list_for_each(entry, &adapter->rwi_list) { - tmp = list_entry(entry, struct ibmvnic_rwi, list); - if (tmp->reset_reason == reason) { - netdev_dbg(netdev, "Skipping matching reset, reason=%d\n", - reason); -- spin_unlock_irqrestore(&adapter->rwi_lock, flags); - ret = EBUSY; - goto err; - } -@@ -2424,8 +2429,6 @@ static int ibmvnic_reset(struct ibmvnic_adapter *adapter, - - rwi = kzalloc(sizeof(*rwi), GFP_ATOMIC); - if (!rwi) { -- spin_unlock_irqrestore(&adapter->rwi_lock, flags); -- ibmvnic_close(netdev); - ret = ENOMEM; - goto err; - } -@@ -2438,12 +2441,17 @@ static int ibmvnic_reset(struct ibmvnic_adapter *adapter, - } - rwi->reset_reason = reason; - list_add_tail(&rwi->list, &adapter->rwi_list); -- spin_unlock_irqrestore(&adapter->rwi_lock, flags); - netdev_dbg(adapter->netdev, "Scheduling reset (reason %d)\n", reason); - schedule_work(&adapter->ibmvnic_reset); - -- return 0; -+ ret = 0; - err: -+ /* ibmvnic_close() below can block, so drop the lock first */ -+ spin_unlock_irqrestore(&adapter->rwi_lock, flags); -+ -+ if (ret == ENOMEM) -+ ibmvnic_close(netdev); -+ - return -ret; - } - -@@ -2541,6 +2549,8 @@ restart_poll: - offset = be16_to_cpu(next->rx_comp.off_frame_data); - flags = next->rx_comp.flags; - skb = rx_buff->skb; -+ /* load long_term_buff before copying to skb */ -+ dma_rmb(); - skb_copy_to_linear_data(skb, rx_buff->data + offset, - length); - -@@ -5459,7 +5469,18 @@ static int ibmvnic_remove(struct vio_dev *dev) - unsigned long flags; - - spin_lock_irqsave(&adapter->state_lock, flags); -+ -+ /* If ibmvnic_reset() is scheduling a reset, wait for it to -+ * finish. Then, set the state to REMOVING to prevent it from -+ * scheduling any more work and to have reset functions ignore -+ * any resets that have already been scheduled. Drop the lock -+ * after setting state, so __ibmvnic_reset() which is called -+ * from the flush_work() below, can make progress. -+ */ -+ spin_lock_irqsave(&adapter->rwi_lock, flags); - adapter->state = VNIC_REMOVING; -+ spin_unlock_irqrestore(&adapter->rwi_lock, flags); -+ - spin_unlock_irqrestore(&adapter->state_lock, flags); - - flush_work(&adapter->ibmvnic_reset); -diff --git a/drivers/net/ethernet/ibm/ibmvnic.h b/drivers/net/ethernet/ibm/ibmvnic.h -index c09c3f6bba9f2..72fea3b1c87d9 100644 ---- a/drivers/net/ethernet/ibm/ibmvnic.h -+++ b/drivers/net/ethernet/ibm/ibmvnic.h -@@ -31,7 +31,7 @@ - #define IBMVNIC_BUFFS_PER_POOL 100 - #define IBMVNIC_MAX_QUEUES 16 - #define IBMVNIC_MAX_QUEUE_SZ 4096 --#define IBMVNIC_MAX_IND_DESCS 128 -+#define IBMVNIC_MAX_IND_DESCS 16 - #define IBMVNIC_IND_ARR_SZ (IBMVNIC_MAX_IND_DESCS * 32) - - #define IBMVNIC_TSO_BUF_SZ 65536 -@@ -1081,6 +1081,7 @@ struct ibmvnic_adapter { - struct tasklet_struct tasklet; - enum vnic_state state; - enum ibmvnic_reset_reason reset_reason; -+ /* when taking both state and rwi locks, take state lock first */ - spinlock_t rwi_lock; - struct list_head rwi_list; - struct work_struct ibmvnic_reset; -@@ -1097,6 +1098,8 @@ struct ibmvnic_adapter { - struct ibmvnic_tunables desired; - struct ibmvnic_tunables fallback; - -- /* Used for serializatin of state field */ -+ /* Used for serialization of state field. When taking both state -+ * and rwi locks, take state lock first. -+ */ - spinlock_t state_lock; - }; -diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c -index 26ba1f3eb2d85..9e81f85ee2d8d 100644 ---- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c -+++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c -@@ -4878,7 +4878,7 @@ static int i40e_set_priv_flags(struct net_device *dev, u32 flags) - enum i40e_admin_queue_err adq_err; - struct i40e_vsi *vsi = np->vsi; - struct i40e_pf *pf = vsi->back; -- bool is_reset_needed; -+ u32 reset_needed = 0; - i40e_status status; - u32 i, j; - -@@ -4923,9 +4923,11 @@ static int i40e_set_priv_flags(struct net_device *dev, u32 flags) - flags_complete: - changed_flags = orig_flags ^ new_flags; - -- is_reset_needed = !!(changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | -- I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED | -- I40E_FLAG_DISABLE_FW_LLDP)); -+ if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) -+ reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG; -+ if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED | -+ I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED)) -+ reset_needed = BIT(__I40E_PF_RESET_REQUESTED); - - /* Before we finalize any flag changes, we need to perform some - * checks to ensure that the changes are supported and safe. -@@ -5057,7 +5059,7 @@ flags_complete: - case I40E_AQ_RC_EEXIST: - dev_warn(&pf->pdev->dev, - "FW LLDP agent is already running\n"); -- is_reset_needed = false; -+ reset_needed = 0; - break; - case I40E_AQ_RC_EPERM: - dev_warn(&pf->pdev->dev, -@@ -5086,8 +5088,8 @@ flags_complete: - /* Issue reset to cause things to take effect, as additional bits - * are added we will need to create a mask of bits requiring reset - */ -- if (is_reset_needed) -- i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true); -+ if (reset_needed) -+ i40e_do_reset(pf, reset_needed, true); - - return 0; - } -diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c -index 1db482d310c2d..fcd6f623f2fd8 100644 ---- a/drivers/net/ethernet/intel/i40e/i40e_main.c -+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c -@@ -2616,7 +2616,7 @@ static void i40e_sync_filters_subtask(struct i40e_pf *pf) - return; - if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state)) - return; -- if (test_and_set_bit(__I40E_VF_DISABLE, pf->state)) { -+ if (test_bit(__I40E_VF_DISABLE, pf->state)) { - set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state); - return; - } -@@ -2634,7 +2634,6 @@ static void i40e_sync_filters_subtask(struct i40e_pf *pf) - } - } - } -- clear_bit(__I40E_VF_DISABLE, pf->state); - } - - /** -@@ -5921,7 +5920,7 @@ static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid, - ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc; - ch->seid = ctxt.seid; - ch->vsi_number = ctxt.vsi_number; -- ch->stat_counter_idx = cpu_to_le16(ctxt.info.stat_counter_idx); -+ ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx); - - /* copy just the sections touched not the entire info - * since not all sections are valid as returned by -@@ -7600,8 +7599,8 @@ static inline void - i40e_set_cld_element(struct i40e_cloud_filter *filter, - struct i40e_aqc_cloud_filters_element_data *cld) - { -- int i, j; - u32 ipa; -+ int i; - - memset(cld, 0, sizeof(*cld)); - ether_addr_copy(cld->outer_mac, filter->dst_mac); -@@ -7612,14 +7611,14 @@ i40e_set_cld_element(struct i40e_cloud_filter *filter, - - if (filter->n_proto == ETH_P_IPV6) { - #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1) -- for (i = 0, j = 0; i < ARRAY_SIZE(filter->dst_ipv6); -- i++, j += 2) { -+ for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) { - ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]); -- ipa = cpu_to_le32(ipa); -- memcpy(&cld->ipaddr.raw_v6.data[j], &ipa, sizeof(ipa)); -+ -+ *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa); - } - } else { - ipa = be32_to_cpu(filter->dst_ipv4); -+ - memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa)); - } - -@@ -7667,6 +7666,8 @@ int i40e_add_del_cloud_filter(struct i40e_vsi *vsi, - if (filter->flags >= ARRAY_SIZE(flag_table)) - return I40E_ERR_CONFIG; - -+ memset(&cld_filter, 0, sizeof(cld_filter)); -+ - /* copy element needed to add cloud filter from filter */ - i40e_set_cld_element(filter, &cld_filter); - -@@ -7730,10 +7731,13 @@ int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi, - return -EOPNOTSUPP; - - /* adding filter using src_port/src_ip is not supported at this stage */ -- if (filter->src_port || filter->src_ipv4 || -+ if (filter->src_port || -+ (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) || - !ipv6_addr_any(&filter->ip.v6.src_ip6)) - return -EOPNOTSUPP; - -+ memset(&cld_filter, 0, sizeof(cld_filter)); -+ - /* copy element needed to add cloud filter from filter */ - i40e_set_cld_element(filter, &cld_filter.element); - -@@ -7757,7 +7761,7 @@ int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi, - cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT); - } - -- } else if (filter->dst_ipv4 || -+ } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) || - !ipv6_addr_any(&filter->ip.v6.dst_ip6)) { - cld_filter.element.flags = - cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT); -@@ -8533,11 +8537,6 @@ void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired) - dev_dbg(&pf->pdev->dev, "PFR requested\n"); - i40e_handle_reset_warning(pf, lock_acquired); - -- dev_info(&pf->pdev->dev, -- pf->flags & I40E_FLAG_DISABLE_FW_LLDP ? -- "FW LLDP is disabled\n" : -- "FW LLDP is enabled\n"); -- - } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) { - /* Request a PF Reset - * -@@ -8545,6 +8544,10 @@ void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired) - */ - i40e_prep_for_reset(pf, lock_acquired); - i40e_reset_and_rebuild(pf, true, lock_acquired); -+ dev_info(&pf->pdev->dev, -+ pf->flags & I40E_FLAG_DISABLE_FW_LLDP ? -+ "FW LLDP is disabled\n" : -+ "FW LLDP is enabled\n"); - - } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) { - int v; -@@ -10001,7 +10004,6 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired) - int old_recovery_mode_bit = test_bit(__I40E_RECOVERY_MODE, pf->state); - struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; - struct i40e_hw *hw = &pf->hw; -- u8 set_fc_aq_fail = 0; - i40e_status ret; - u32 val; - int v; -@@ -10127,13 +10129,6 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired) - i40e_stat_str(&pf->hw, ret), - i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); - -- /* make sure our flow control settings are restored */ -- ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true); -- if (ret) -- dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n", -- i40e_stat_str(&pf->hw, ret), -- i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); -- - /* Rebuild the VSIs and VEBs that existed before reset. - * They are still in our local switch element arrays, so only - * need to rebuild the switch model in the HW. -@@ -11709,6 +11704,8 @@ i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf) - struct i40e_aqc_configure_partition_bw_data bw_data; - i40e_status status; - -+ memset(&bw_data, 0, sizeof(bw_data)); -+ - /* Set the valid bit for this PF */ - bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id)); - bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK; -@@ -14714,7 +14711,6 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) - int err; - u32 val; - u32 i; -- u8 set_fc_aq_fail; - - err = pci_enable_device_mem(pdev); - if (err) -@@ -15048,24 +15044,6 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) - } - INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list); - -- /* Make sure flow control is set according to current settings */ -- err = i40e_set_fc(hw, &set_fc_aq_fail, true); -- if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET) -- dev_dbg(&pf->pdev->dev, -- "Set fc with err %s aq_err %s on get_phy_cap\n", -- i40e_stat_str(hw, err), -- i40e_aq_str(hw, hw->aq.asq_last_status)); -- if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET) -- dev_dbg(&pf->pdev->dev, -- "Set fc with err %s aq_err %s on set_phy_config\n", -- i40e_stat_str(hw, err), -- i40e_aq_str(hw, hw->aq.asq_last_status)); -- if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE) -- dev_dbg(&pf->pdev->dev, -- "Set fc with err %s aq_err %s on get_link_info\n", -- i40e_stat_str(hw, err), -- i40e_aq_str(hw, hw->aq.asq_last_status)); -- - /* if FDIR VSI was set up, start it now */ - for (i = 0; i < pf->num_alloc_vsi; i++) { - if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { -diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c -index 4aca637d4a23c..903d4e8cb0a11 100644 ---- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c -+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c -@@ -1793,7 +1793,7 @@ void i40e_process_skb_fields(struct i40e_ring *rx_ring, - skb_record_rx_queue(skb, rx_ring->queue_index); - - if (qword & BIT(I40E_RX_DESC_STATUS_L2TAG1P_SHIFT)) { -- u16 vlan_tag = rx_desc->wb.qword0.lo_dword.l2tag1; -+ __le16 vlan_tag = rx_desc->wb.qword0.lo_dword.l2tag1; - - __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), - le16_to_cpu(vlan_tag)); -@@ -3113,13 +3113,16 @@ static int i40e_tx_enable_csum(struct sk_buff *skb, u32 *tx_flags, - - l4_proto = ip.v4->protocol; - } else if (*tx_flags & I40E_TX_FLAGS_IPV6) { -+ int ret; -+ - tunnel |= I40E_TX_CTX_EXT_IP_IPV6; - - exthdr = ip.hdr + sizeof(*ip.v6); - l4_proto = ip.v6->nexthdr; -- if (l4.hdr != exthdr) -- ipv6_skip_exthdr(skb, exthdr - skb->data, -- &l4_proto, &frag_off); -+ ret = ipv6_skip_exthdr(skb, exthdr - skb->data, -+ &l4_proto, &frag_off); -+ if (ret < 0) -+ return -1; - } - - /* define outer transport */ -diff --git a/drivers/net/ethernet/intel/i40e/i40e_xsk.c b/drivers/net/ethernet/intel/i40e/i40e_xsk.c -index 492ce213208d2..37a21fb999221 100644 ---- a/drivers/net/ethernet/intel/i40e/i40e_xsk.c -+++ b/drivers/net/ethernet/intel/i40e/i40e_xsk.c -@@ -444,7 +444,7 @@ static void i40e_set_rs_bit(struct i40e_ring *xdp_ring) - struct i40e_tx_desc *tx_desc; - - tx_desc = I40E_TX_DESC(xdp_ring, ntu); -- tx_desc->cmd_type_offset_bsz |= (I40E_TX_DESC_CMD_RS << I40E_TXD_QW1_CMD_SHIFT); -+ tx_desc->cmd_type_offset_bsz |= cpu_to_le64(I40E_TX_DESC_CMD_RS << I40E_TXD_QW1_CMD_SHIFT); - } - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index fa1e128c24eca..619d93f8b54c4 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -443,9 +443,7 @@ struct ice_pf { - struct ice_hw_port_stats stats_prev; - struct ice_hw hw; - u8 stat_prev_loaded:1; /* has previous stats been loaded */ --#ifdef CONFIG_DCB - u16 dcbx_cap; --#endif /* CONFIG_DCB */ - u32 tx_timeout_count; - unsigned long tx_timeout_last_recovery; - u32 tx_timeout_recovery_level; -diff --git a/drivers/net/ethernet/intel/ice/ice_dcb_nl.c b/drivers/net/ethernet/intel/ice/ice_dcb_nl.c -index 87f91b750d59a..8c133a8be6add 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dcb_nl.c -+++ b/drivers/net/ethernet/intel/ice/ice_dcb_nl.c -@@ -136,7 +136,7 @@ ice_dcbnl_getnumtcs(struct net_device *dev, int __always_unused tcid, u8 *num) - if (!test_bit(ICE_FLAG_DCB_CAPABLE, pf->flags)) - return -EINVAL; - -- *num = IEEE_8021QAZ_MAX_TCS; -+ *num = pf->hw.func_caps.common_cap.maxtc; - return 0; - } - -@@ -160,6 +160,10 @@ static u8 ice_dcbnl_setdcbx(struct net_device *netdev, u8 mode) - { - struct ice_pf *pf = ice_netdev_to_pf(netdev); - -+ /* if FW LLDP agent is running, DCBNL not allowed to change mode */ -+ if (test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags)) -+ return ICE_DCB_NO_HW_CHG; -+ - /* No support for LLD_MANAGED modes or CEE+IEEE */ - if ((mode & DCB_CAP_DCBX_LLD_MANAGED) || - ((mode & DCB_CAP_DCBX_VER_IEEE) && (mode & DCB_CAP_DCBX_VER_CEE)) || -diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c -index 69c113a4de7e6..aebebd2102da0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ethtool.c -+++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c -@@ -8,6 +8,7 @@ - #include "ice_fltr.h" - #include "ice_lib.h" - #include "ice_dcb_lib.h" -+#include - - struct ice_stats { - char stat_string[ETH_GSTRING_LEN]; -@@ -1238,6 +1239,9 @@ static int ice_set_priv_flags(struct net_device *netdev, u32 flags) - status = ice_init_pf_dcb(pf, true); - if (status) - dev_warn(dev, "Fail to init DCB\n"); -+ -+ pf->dcbx_cap &= ~DCB_CAP_DCBX_LLD_MANAGED; -+ pf->dcbx_cap |= DCB_CAP_DCBX_HOST; - } else { - enum ice_status status; - bool dcbx_agent_status; -@@ -1280,6 +1284,9 @@ static int ice_set_priv_flags(struct net_device *netdev, u32 flags) - if (status) - dev_dbg(dev, "Fail to enable MIB change events\n"); - -+ pf->dcbx_cap &= ~DCB_CAP_DCBX_HOST; -+ pf->dcbx_cap |= DCB_CAP_DCBX_LLD_MANAGED; -+ - ice_nway_reset(netdev); - } - } -@@ -3321,6 +3328,18 @@ ice_get_channels(struct net_device *dev, struct ethtool_channels *ch) - ch->max_other = ch->other_count; - } - -+/** -+ * ice_get_valid_rss_size - return valid number of RSS queues -+ * @hw: pointer to the HW structure -+ * @new_size: requested RSS queues -+ */ -+static int ice_get_valid_rss_size(struct ice_hw *hw, int new_size) -+{ -+ struct ice_hw_common_caps *caps = &hw->func_caps.common_cap; -+ -+ return min_t(int, new_size, BIT(caps->rss_table_entry_width)); -+} -+ - /** - * ice_vsi_set_dflt_rss_lut - set default RSS LUT with requested RSS size - * @vsi: VSI to reconfigure RSS LUT on -@@ -3348,14 +3367,10 @@ static int ice_vsi_set_dflt_rss_lut(struct ice_vsi *vsi, int req_rss_size) - return -ENOMEM; - - /* set RSS LUT parameters */ -- if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) { -+ if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) - vsi->rss_size = 1; -- } else { -- struct ice_hw_common_caps *caps = &hw->func_caps.common_cap; -- -- vsi->rss_size = min_t(int, req_rss_size, -- BIT(caps->rss_table_entry_width)); -- } -+ else -+ vsi->rss_size = ice_get_valid_rss_size(hw, req_rss_size); - - /* create/set RSS LUT */ - ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size); -@@ -3434,9 +3449,12 @@ static int ice_set_channels(struct net_device *dev, struct ethtool_channels *ch) - - ice_vsi_recfg_qs(vsi, new_rx, new_tx); - -- if (new_rx && !netif_is_rxfh_configured(dev)) -+ if (!netif_is_rxfh_configured(dev)) - return ice_vsi_set_dflt_rss_lut(vsi, new_rx); - -+ /* Update rss_size due to change in Rx queues */ -+ vsi->rss_size = ice_get_valid_rss_size(&pf->hw, new_rx); -+ - return 0; - } - -diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c b/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c -index ec7f6c64132ee..b3161c5def465 100644 ---- a/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c -+++ b/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c -@@ -1878,6 +1878,29 @@ static int ice_vc_get_ver_msg(struct ice_vf *vf, u8 *msg) - sizeof(struct virtchnl_version_info)); - } - -+/** -+ * ice_vc_get_max_frame_size - get max frame size allowed for VF -+ * @vf: VF used to determine max frame size -+ * -+ * Max frame size is determined based on the current port's max frame size and -+ * whether a port VLAN is configured on this VF. The VF is not aware whether -+ * it's in a port VLAN so the PF needs to account for this in max frame size -+ * checks and sending the max frame size to the VF. -+ */ -+static u16 ice_vc_get_max_frame_size(struct ice_vf *vf) -+{ -+ struct ice_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx]; -+ struct ice_port_info *pi = vsi->port_info; -+ u16 max_frame_size; -+ -+ max_frame_size = pi->phy.link_info.max_frame_size; -+ -+ if (vf->port_vlan_info) -+ max_frame_size -= VLAN_HLEN; -+ -+ return max_frame_size; -+} -+ - /** - * ice_vc_get_vf_res_msg - * @vf: pointer to the VF info -@@ -1960,6 +1983,7 @@ static int ice_vc_get_vf_res_msg(struct ice_vf *vf, u8 *msg) - vfres->max_vectors = pf->num_msix_per_vf; - vfres->rss_key_size = ICE_VSIQF_HKEY_ARRAY_SIZE; - vfres->rss_lut_size = ICE_VSIQF_HLUT_ARRAY_SIZE; -+ vfres->max_mtu = ice_vc_get_max_frame_size(vf); - - vfres->vsi_res[0].vsi_id = vf->lan_vsi_num; - vfres->vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV; -@@ -2952,6 +2976,8 @@ static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg) - - /* copy Rx queue info from VF into VSI */ - if (qpi->rxq.ring_len > 0) { -+ u16 max_frame_size = ice_vc_get_max_frame_size(vf); -+ - num_rxq++; - vsi->rx_rings[i]->dma = qpi->rxq.dma_ring_addr; - vsi->rx_rings[i]->count = qpi->rxq.ring_len; -@@ -2964,7 +2990,7 @@ static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg) - } - vsi->rx_buf_len = qpi->rxq.databuffer_size; - vsi->rx_rings[i]->rx_buf_len = vsi->rx_buf_len; -- if (qpi->rxq.max_pkt_size >= (16 * 1024) || -+ if (qpi->rxq.max_pkt_size > max_frame_size || - qpi->rxq.max_pkt_size < 64) { - v_ret = VIRTCHNL_STATUS_ERR_PARAM; - goto error_param; -@@ -2972,6 +2998,11 @@ static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg) - } - - vsi->max_frame = qpi->rxq.max_pkt_size; -+ /* add space for the port VLAN since the VF driver is not -+ * expected to account for it in the MTU calculation -+ */ -+ if (vf->port_vlan_info) -+ vsi->max_frame += VLAN_HLEN; - } - - /* VF can request to configure less than allocated queues or default -diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c -index bc4d8d1444019..fd5b33646ea71 100644 ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3432,7 +3432,9 @@ static int mvneta_txq_sw_init(struct mvneta_port *pp, - return -ENOMEM; - - /* Setup XPS mapping */ -- if (txq_number > 1) -+ if (pp->neta_armada3700) -+ cpu = 0; -+ else if (txq_number > 1) - cpu = txq->id % num_present_cpus(); - else - cpu = pp->rxq_def % num_present_cpus(); -@@ -4210,6 +4212,11 @@ static int mvneta_cpu_online(unsigned int cpu, struct hlist_node *node) - node_online); - struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); - -+ /* Armada 3700's per-cpu interrupt for mvneta is broken, all interrupts -+ * are routed to CPU 0, so we don't need all the cpu-hotplug support -+ */ -+ if (pp->neta_armada3700) -+ return 0; - - spin_lock(&pp->lock); - /* -diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c -index d27543c1a166a..bb3fdaf337519 100644 ---- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c -+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c -@@ -385,7 +385,7 @@ static ssize_t rvu_dbg_qsize_write(struct file *filp, - u16 pcifunc; - int ret, lf; - -- cmd_buf = memdup_user(buffer, count); -+ cmd_buf = memdup_user(buffer, count + 1); - if (IS_ERR(cmd_buf)) - return -ENOMEM; - -diff --git a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c -index 394f43add85cf..a99e71bc7b3c9 100644 ---- a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c -+++ b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c -@@ -4986,6 +4986,7 @@ static int mlx4_do_mirror_rule(struct mlx4_dev *dev, struct res_fs_rule *fs_rule - - if (!fs_rule->mirr_mbox) { - mlx4_err(dev, "rule mirroring mailbox is null\n"); -+ mlx4_free_cmd_mailbox(dev, mailbox); - return -EINVAL; - } - memcpy(mailbox->buf, fs_rule->mirr_mbox, fs_rule->mirr_mbox_size); -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c -index 3261d0dc11044..41474e42a819a 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c -@@ -128,6 +128,11 @@ static int mlx5_devlink_reload_down(struct devlink *devlink, bool netns_change, - { - struct mlx5_core_dev *dev = devlink_priv(devlink); - -+ if (mlx5_lag_is_active(dev)) { -+ NL_SET_ERR_MSG_MOD(extack, "reload is unsupported in Lag mode\n"); -+ return -EOPNOTSUPP; -+ } -+ - switch (action) { - case DEVLINK_RELOAD_ACTION_DRIVER_REINIT: - mlx5_unload_one(dev, false); -@@ -273,6 +278,10 @@ static int mlx5_devlink_enable_roce_validate(struct devlink *devlink, u32 id, - NL_SET_ERR_MSG_MOD(extack, "Device doesn't support RoCE"); - return -EOPNOTSUPP; - } -+ if (mlx5_core_is_mp_slave(dev) || mlx5_lag_is_active(dev)) { -+ NL_SET_ERR_MSG_MOD(extack, "Multi port slave/Lag device can't configure RoCE"); -+ return -EOPNOTSUPP; -+ } - - return 0; - } -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c -index 6bc6b48a56dc7..24e2c0d955b99 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - #include - - #include "lib/fs_chains.h" -@@ -51,11 +52,11 @@ struct mlx5_tc_ct_priv { - struct mlx5_flow_table *ct_nat; - struct mlx5_flow_table *post_ct; - struct mutex control_lock; /* guards parallel adds/dels */ -- struct mutex shared_counter_lock; - struct mapping_ctx *zone_mapping; - struct mapping_ctx *labels_mapping; - enum mlx5_flow_namespace_type ns_type; - struct mlx5_fs_chains *chains; -+ spinlock_t ht_lock; /* protects ft entries */ - }; - - struct mlx5_ct_flow { -@@ -124,6 +125,10 @@ struct mlx5_ct_counter { - bool is_shared; - }; - -+enum { -+ MLX5_CT_ENTRY_FLAG_VALID, -+}; -+ - struct mlx5_ct_entry { - struct rhash_head node; - struct rhash_head tuple_node; -@@ -134,6 +139,12 @@ struct mlx5_ct_entry { - struct mlx5_ct_tuple tuple; - struct mlx5_ct_tuple tuple_nat; - struct mlx5_ct_zone_rule zone_rules[2]; -+ -+ struct mlx5_tc_ct_priv *ct_priv; -+ struct work_struct work; -+ -+ refcount_t refcnt; -+ unsigned long flags; - }; - - static const struct rhashtable_params cts_ht_params = { -@@ -740,6 +751,87 @@ err_attr: - return err; - } - -+static bool -+mlx5_tc_ct_entry_valid(struct mlx5_ct_entry *entry) -+{ -+ return test_bit(MLX5_CT_ENTRY_FLAG_VALID, &entry->flags); -+} -+ -+static struct mlx5_ct_entry * -+mlx5_tc_ct_entry_get(struct mlx5_tc_ct_priv *ct_priv, struct mlx5_ct_tuple *tuple) -+{ -+ struct mlx5_ct_entry *entry; -+ -+ entry = rhashtable_lookup_fast(&ct_priv->ct_tuples_ht, tuple, -+ tuples_ht_params); -+ if (entry && mlx5_tc_ct_entry_valid(entry) && -+ refcount_inc_not_zero(&entry->refcnt)) { -+ return entry; -+ } else if (!entry) { -+ entry = rhashtable_lookup_fast(&ct_priv->ct_tuples_nat_ht, -+ tuple, tuples_nat_ht_params); -+ if (entry && mlx5_tc_ct_entry_valid(entry) && -+ refcount_inc_not_zero(&entry->refcnt)) -+ return entry; -+ } -+ -+ return entry ? ERR_PTR(-EINVAL) : NULL; -+} -+ -+static void mlx5_tc_ct_entry_remove_from_tuples(struct mlx5_ct_entry *entry) -+{ -+ struct mlx5_tc_ct_priv *ct_priv = entry->ct_priv; -+ -+ rhashtable_remove_fast(&ct_priv->ct_tuples_nat_ht, -+ &entry->tuple_nat_node, -+ tuples_nat_ht_params); -+ rhashtable_remove_fast(&ct_priv->ct_tuples_ht, &entry->tuple_node, -+ tuples_ht_params); -+} -+ -+static void mlx5_tc_ct_entry_del(struct mlx5_ct_entry *entry) -+{ -+ struct mlx5_tc_ct_priv *ct_priv = entry->ct_priv; -+ -+ mlx5_tc_ct_entry_del_rules(ct_priv, entry); -+ -+ spin_lock_bh(&ct_priv->ht_lock); -+ mlx5_tc_ct_entry_remove_from_tuples(entry); -+ spin_unlock_bh(&ct_priv->ht_lock); -+ -+ mlx5_tc_ct_counter_put(ct_priv, entry); -+ kfree(entry); -+} -+ -+static void -+mlx5_tc_ct_entry_put(struct mlx5_ct_entry *entry) -+{ -+ if (!refcount_dec_and_test(&entry->refcnt)) -+ return; -+ -+ mlx5_tc_ct_entry_del(entry); -+} -+ -+static void mlx5_tc_ct_entry_del_work(struct work_struct *work) -+{ -+ struct mlx5_ct_entry *entry = container_of(work, struct mlx5_ct_entry, work); -+ -+ mlx5_tc_ct_entry_del(entry); -+} -+ -+static void -+__mlx5_tc_ct_entry_put(struct mlx5_ct_entry *entry) -+{ -+ struct mlx5e_priv *priv; -+ -+ if (!refcount_dec_and_test(&entry->refcnt)) -+ return; -+ -+ priv = netdev_priv(entry->ct_priv->netdev); -+ INIT_WORK(&entry->work, mlx5_tc_ct_entry_del_work); -+ queue_work(priv->wq, &entry->work); -+} -+ - static struct mlx5_ct_counter * - mlx5_tc_ct_counter_create(struct mlx5_tc_ct_priv *ct_priv) - { -@@ -792,16 +884,26 @@ mlx5_tc_ct_shared_counter_get(struct mlx5_tc_ct_priv *ct_priv, - } - - /* Use the same counter as the reverse direction */ -- mutex_lock(&ct_priv->shared_counter_lock); -- rev_entry = rhashtable_lookup_fast(&ct_priv->ct_tuples_ht, &rev_tuple, -- tuples_ht_params); -- if (rev_entry) { -- if (refcount_inc_not_zero(&rev_entry->counter->refcount)) { -- mutex_unlock(&ct_priv->shared_counter_lock); -- return rev_entry->counter; -- } -+ spin_lock_bh(&ct_priv->ht_lock); -+ rev_entry = mlx5_tc_ct_entry_get(ct_priv, &rev_tuple); -+ -+ if (IS_ERR(rev_entry)) { -+ spin_unlock_bh(&ct_priv->ht_lock); -+ goto create_counter; -+ } -+ -+ if (rev_entry && refcount_inc_not_zero(&rev_entry->counter->refcount)) { -+ ct_dbg("Using shared counter entry=0x%p rev=0x%p\n", entry, rev_entry); -+ shared_counter = rev_entry->counter; -+ spin_unlock_bh(&ct_priv->ht_lock); -+ -+ mlx5_tc_ct_entry_put(rev_entry); -+ return shared_counter; - } -- mutex_unlock(&ct_priv->shared_counter_lock); -+ -+ spin_unlock_bh(&ct_priv->ht_lock); -+ -+create_counter: - - shared_counter = mlx5_tc_ct_counter_create(ct_priv); - if (IS_ERR(shared_counter)) { -@@ -866,10 +968,14 @@ mlx5_tc_ct_block_flow_offload_add(struct mlx5_ct_ft *ft, - if (!meta_action) - return -EOPNOTSUPP; - -- entry = rhashtable_lookup_fast(&ft->ct_entries_ht, &cookie, -- cts_ht_params); -- if (entry) -- return 0; -+ spin_lock_bh(&ct_priv->ht_lock); -+ entry = rhashtable_lookup_fast(&ft->ct_entries_ht, &cookie, cts_ht_params); -+ if (entry && refcount_inc_not_zero(&entry->refcnt)) { -+ spin_unlock_bh(&ct_priv->ht_lock); -+ mlx5_tc_ct_entry_put(entry); -+ return -EEXIST; -+ } -+ spin_unlock_bh(&ct_priv->ht_lock); - - entry = kzalloc(sizeof(*entry), GFP_KERNEL); - if (!entry) -@@ -878,6 +984,8 @@ mlx5_tc_ct_block_flow_offload_add(struct mlx5_ct_ft *ft, - entry->tuple.zone = ft->zone; - entry->cookie = flow->cookie; - entry->restore_cookie = meta_action->ct_metadata.cookie; -+ refcount_set(&entry->refcnt, 2); -+ entry->ct_priv = ct_priv; - - err = mlx5_tc_ct_rule_to_tuple(&entry->tuple, flow_rule); - if (err) -@@ -888,35 +996,40 @@ mlx5_tc_ct_block_flow_offload_add(struct mlx5_ct_ft *ft, - if (err) - goto err_set; - -- err = rhashtable_insert_fast(&ct_priv->ct_tuples_ht, -- &entry->tuple_node, -- tuples_ht_params); -+ spin_lock_bh(&ct_priv->ht_lock); -+ -+ err = rhashtable_lookup_insert_fast(&ft->ct_entries_ht, &entry->node, -+ cts_ht_params); -+ if (err) -+ goto err_entries; -+ -+ err = rhashtable_lookup_insert_fast(&ct_priv->ct_tuples_ht, -+ &entry->tuple_node, -+ tuples_ht_params); - if (err) - goto err_tuple; - - if (memcmp(&entry->tuple, &entry->tuple_nat, sizeof(entry->tuple))) { -- err = rhashtable_insert_fast(&ct_priv->ct_tuples_nat_ht, -- &entry->tuple_nat_node, -- tuples_nat_ht_params); -+ err = rhashtable_lookup_insert_fast(&ct_priv->ct_tuples_nat_ht, -+ &entry->tuple_nat_node, -+ tuples_nat_ht_params); - if (err) - goto err_tuple_nat; - } -+ spin_unlock_bh(&ct_priv->ht_lock); - - err = mlx5_tc_ct_entry_add_rules(ct_priv, flow_rule, entry, - ft->zone_restore_id); - if (err) - goto err_rules; - -- err = rhashtable_insert_fast(&ft->ct_entries_ht, &entry->node, -- cts_ht_params); -- if (err) -- goto err_insert; -+ set_bit(MLX5_CT_ENTRY_FLAG_VALID, &entry->flags); -+ mlx5_tc_ct_entry_put(entry); /* this function reference */ - - return 0; - --err_insert: -- mlx5_tc_ct_entry_del_rules(ct_priv, entry); - err_rules: -+ spin_lock_bh(&ct_priv->ht_lock); - if (mlx5_tc_ct_entry_has_nat(entry)) - rhashtable_remove_fast(&ct_priv->ct_tuples_nat_ht, - &entry->tuple_nat_node, tuples_nat_ht_params); -@@ -925,47 +1038,43 @@ err_tuple_nat: - &entry->tuple_node, - tuples_ht_params); - err_tuple: -+ rhashtable_remove_fast(&ft->ct_entries_ht, -+ &entry->node, -+ cts_ht_params); -+err_entries: -+ spin_unlock_bh(&ct_priv->ht_lock); - err_set: - kfree(entry); -- netdev_warn(ct_priv->netdev, -- "Failed to offload ct entry, err: %d\n", err); -+ if (err != -EEXIST) -+ netdev_warn(ct_priv->netdev, "Failed to offload ct entry, err: %d\n", err); - return err; - } - --static void --mlx5_tc_ct_del_ft_entry(struct mlx5_tc_ct_priv *ct_priv, -- struct mlx5_ct_entry *entry) --{ -- mlx5_tc_ct_entry_del_rules(ct_priv, entry); -- mutex_lock(&ct_priv->shared_counter_lock); -- if (mlx5_tc_ct_entry_has_nat(entry)) -- rhashtable_remove_fast(&ct_priv->ct_tuples_nat_ht, -- &entry->tuple_nat_node, -- tuples_nat_ht_params); -- rhashtable_remove_fast(&ct_priv->ct_tuples_ht, &entry->tuple_node, -- tuples_ht_params); -- mutex_unlock(&ct_priv->shared_counter_lock); -- mlx5_tc_ct_counter_put(ct_priv, entry); -- --} -- - static int - mlx5_tc_ct_block_flow_offload_del(struct mlx5_ct_ft *ft, - struct flow_cls_offload *flow) - { -+ struct mlx5_tc_ct_priv *ct_priv = ft->ct_priv; - unsigned long cookie = flow->cookie; - struct mlx5_ct_entry *entry; - -- entry = rhashtable_lookup_fast(&ft->ct_entries_ht, &cookie, -- cts_ht_params); -- if (!entry) -+ spin_lock_bh(&ct_priv->ht_lock); -+ entry = rhashtable_lookup_fast(&ft->ct_entries_ht, &cookie, cts_ht_params); -+ if (!entry) { -+ spin_unlock_bh(&ct_priv->ht_lock); - return -ENOENT; -+ } - -- mlx5_tc_ct_del_ft_entry(ft->ct_priv, entry); -- WARN_ON(rhashtable_remove_fast(&ft->ct_entries_ht, -- &entry->node, -- cts_ht_params)); -- kfree(entry); -+ if (!mlx5_tc_ct_entry_valid(entry)) { -+ spin_unlock_bh(&ct_priv->ht_lock); -+ return -EINVAL; -+ } -+ -+ rhashtable_remove_fast(&ft->ct_entries_ht, &entry->node, cts_ht_params); -+ mlx5_tc_ct_entry_remove_from_tuples(entry); -+ spin_unlock_bh(&ct_priv->ht_lock); -+ -+ mlx5_tc_ct_entry_put(entry); - - return 0; - } -@@ -974,19 +1083,30 @@ static int - mlx5_tc_ct_block_flow_offload_stats(struct mlx5_ct_ft *ft, - struct flow_cls_offload *f) - { -+ struct mlx5_tc_ct_priv *ct_priv = ft->ct_priv; - unsigned long cookie = f->cookie; - struct mlx5_ct_entry *entry; - u64 lastuse, packets, bytes; - -- entry = rhashtable_lookup_fast(&ft->ct_entries_ht, &cookie, -- cts_ht_params); -- if (!entry) -+ spin_lock_bh(&ct_priv->ht_lock); -+ entry = rhashtable_lookup_fast(&ft->ct_entries_ht, &cookie, cts_ht_params); -+ if (!entry) { -+ spin_unlock_bh(&ct_priv->ht_lock); - return -ENOENT; -+ } -+ -+ if (!mlx5_tc_ct_entry_valid(entry) || !refcount_inc_not_zero(&entry->refcnt)) { -+ spin_unlock_bh(&ct_priv->ht_lock); -+ return -EINVAL; -+ } -+ -+ spin_unlock_bh(&ct_priv->ht_lock); - - mlx5_fc_query_cached(entry->counter->counter, &bytes, &packets, &lastuse); - flow_stats_update(&f->stats, bytes, packets, 0, lastuse, - FLOW_ACTION_HW_STATS_DELAYED); - -+ mlx5_tc_ct_entry_put(entry); - return 0; - } - -@@ -1478,11 +1598,9 @@ err_mapping: - static void - mlx5_tc_ct_flush_ft_entry(void *ptr, void *arg) - { -- struct mlx5_tc_ct_priv *ct_priv = arg; - struct mlx5_ct_entry *entry = ptr; - -- mlx5_tc_ct_del_ft_entry(ct_priv, entry); -- kfree(entry); -+ mlx5_tc_ct_entry_put(entry); - } - - static void -@@ -1960,6 +2078,7 @@ mlx5_tc_ct_init(struct mlx5e_priv *priv, struct mlx5_fs_chains *chains, - goto err_mapping_labels; - } - -+ spin_lock_init(&ct_priv->ht_lock); - ct_priv->ns_type = ns_type; - ct_priv->chains = chains; - ct_priv->netdev = priv->netdev; -@@ -1994,7 +2113,6 @@ mlx5_tc_ct_init(struct mlx5e_priv *priv, struct mlx5_fs_chains *chains, - - idr_init(&ct_priv->fte_ids); - mutex_init(&ct_priv->control_lock); -- mutex_init(&ct_priv->shared_counter_lock); - rhashtable_init(&ct_priv->zone_ht, &zone_params); - rhashtable_init(&ct_priv->ct_tuples_ht, &tuples_ht_params); - rhashtable_init(&ct_priv->ct_tuples_nat_ht, &tuples_nat_ht_params); -@@ -2037,7 +2155,6 @@ mlx5_tc_ct_clean(struct mlx5_tc_ct_priv *ct_priv) - rhashtable_destroy(&ct_priv->ct_tuples_nat_ht); - rhashtable_destroy(&ct_priv->zone_ht); - mutex_destroy(&ct_priv->control_lock); -- mutex_destroy(&ct_priv->shared_counter_lock); - idr_destroy(&ct_priv->fte_ids); - kfree(ct_priv); - } -@@ -2059,14 +2176,22 @@ mlx5e_tc_ct_restore_flow(struct mlx5_tc_ct_priv *ct_priv, - if (!mlx5_tc_ct_skb_to_tuple(skb, &tuple, zone)) - return false; - -- entry = rhashtable_lookup_fast(&ct_priv->ct_tuples_ht, &tuple, -- tuples_ht_params); -- if (!entry) -- entry = rhashtable_lookup_fast(&ct_priv->ct_tuples_nat_ht, -- &tuple, tuples_nat_ht_params); -- if (!entry) -+ spin_lock(&ct_priv->ht_lock); -+ -+ entry = mlx5_tc_ct_entry_get(ct_priv, &tuple); -+ if (!entry) { -+ spin_unlock(&ct_priv->ht_lock); -+ return false; -+ } -+ -+ if (IS_ERR(entry)) { -+ spin_unlock(&ct_priv->ht_lock); - return false; -+ } -+ spin_unlock(&ct_priv->ht_lock); - - tcf_ct_flow_table_restore_skb(skb, entry->restore_cookie); -+ __mlx5_tc_ct_entry_put(entry); -+ - return true; - } -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h b/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h -index d487e5e371625..8d991c3b7a503 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h -+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h -@@ -83,7 +83,7 @@ static inline void mlx5e_xdp_tx_disable(struct mlx5e_priv *priv) - - clear_bit(MLX5E_STATE_XDP_TX_ENABLED, &priv->state); - /* Let other device's napi(s) and XSK wakeups see our new state. */ -- synchronize_rcu(); -+ synchronize_net(); - } - - static inline bool mlx5e_xdp_tx_is_enabled(struct mlx5e_priv *priv) -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c b/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c -index d87c345878d3d..f4bce1365639e 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c -@@ -111,7 +111,7 @@ err_free_cparam: - void mlx5e_close_xsk(struct mlx5e_channel *c) - { - clear_bit(MLX5E_CHANNEL_STATE_XSK, c->state); -- synchronize_rcu(); /* Sync with the XSK wakeup and with NAPI. */ -+ synchronize_net(); /* Sync with the XSK wakeup and with NAPI. */ - - mlx5e_close_rq(&c->xskrq); - mlx5e_close_cq(&c->xskrq.cq); -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h -index 1fae7fab8297e..ff81b69a59a9b 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h -+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h -@@ -173,7 +173,7 @@ static inline bool mlx5e_accel_tx_eseg(struct mlx5e_priv *priv, - #endif - - #if IS_ENABLED(CONFIG_GENEVE) -- if (skb->encapsulation) -+ if (skb->encapsulation && skb->ip_summed == CHECKSUM_PARTIAL) - mlx5e_tx_tunnel_accel(skb, eseg, ihs); - #endif - -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c -index 6a1d82503ef8f..d06532d0baa43 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c -@@ -57,6 +57,20 @@ struct mlx5e_ktls_offload_context_rx { - struct mlx5e_ktls_rx_resync_ctx resync; - }; - -+static bool mlx5e_ktls_priv_rx_put(struct mlx5e_ktls_offload_context_rx *priv_rx) -+{ -+ if (!refcount_dec_and_test(&priv_rx->resync.refcnt)) -+ return false; -+ -+ kfree(priv_rx); -+ return true; -+} -+ -+static void mlx5e_ktls_priv_rx_get(struct mlx5e_ktls_offload_context_rx *priv_rx) -+{ -+ refcount_inc(&priv_rx->resync.refcnt); -+} -+ - static int mlx5e_ktls_create_tir(struct mlx5_core_dev *mdev, u32 *tirn, u32 rqtn) - { - int err, inlen; -@@ -326,7 +340,7 @@ static void resync_handle_work(struct work_struct *work) - priv_rx = container_of(resync, struct mlx5e_ktls_offload_context_rx, resync); - - if (unlikely(test_bit(MLX5E_PRIV_RX_FLAG_DELETING, priv_rx->flags))) { -- refcount_dec(&resync->refcnt); -+ mlx5e_ktls_priv_rx_put(priv_rx); - return; - } - -@@ -334,7 +348,7 @@ static void resync_handle_work(struct work_struct *work) - sq = &c->async_icosq; - - if (resync_post_get_progress_params(sq, priv_rx)) -- refcount_dec(&resync->refcnt); -+ mlx5e_ktls_priv_rx_put(priv_rx); - } - - static void resync_init(struct mlx5e_ktls_rx_resync_ctx *resync, -@@ -377,7 +391,11 @@ unlock: - return err; - } - --/* Function is called with elevated refcount, it decreases it. */ -+/* Function can be called with the refcount being either elevated or not. -+ * It decreases the refcount and may free the kTLS priv context. -+ * Refcount is not elevated only if tls_dev_del has been called, but GET_PSV was -+ * already in flight. -+ */ - void mlx5e_ktls_handle_get_psv_completion(struct mlx5e_icosq_wqe_info *wi, - struct mlx5e_icosq *sq) - { -@@ -410,7 +428,7 @@ void mlx5e_ktls_handle_get_psv_completion(struct mlx5e_icosq_wqe_info *wi, - tls_offload_rx_resync_async_request_end(priv_rx->sk, cpu_to_be32(hw_seq)); - priv_rx->stats->tls_resync_req_end++; - out: -- refcount_dec(&resync->refcnt); -+ mlx5e_ktls_priv_rx_put(priv_rx); - dma_unmap_single(dev, buf->dma_addr, PROGRESS_PARAMS_PADDED_SIZE, DMA_FROM_DEVICE); - kfree(buf); - } -@@ -431,9 +449,9 @@ static bool resync_queue_get_psv(struct sock *sk) - return false; - - resync = &priv_rx->resync; -- refcount_inc(&resync->refcnt); -+ mlx5e_ktls_priv_rx_get(priv_rx); - if (unlikely(!queue_work(resync->priv->tls->rx_wq, &resync->work))) -- refcount_dec(&resync->refcnt); -+ mlx5e_ktls_priv_rx_put(priv_rx); - - return true; - } -@@ -625,31 +643,6 @@ err_create_key: - return err; - } - --/* Elevated refcount on the resync object means there are -- * outstanding operations (uncompleted GET_PSV WQEs) that -- * will read the resync / priv_rx objects once completed. -- * Wait for them to avoid use-after-free. -- */ --static void wait_for_resync(struct net_device *netdev, -- struct mlx5e_ktls_rx_resync_ctx *resync) --{ --#define MLX5E_KTLS_RX_RESYNC_TIMEOUT 20000 /* msecs */ -- unsigned long exp_time = jiffies + msecs_to_jiffies(MLX5E_KTLS_RX_RESYNC_TIMEOUT); -- unsigned int refcnt; -- -- do { -- refcnt = refcount_read(&resync->refcnt); -- if (refcnt == 1) -- return; -- -- msleep(20); -- } while (time_before(jiffies, exp_time)); -- -- netdev_warn(netdev, -- "Failed waiting for kTLS RX resync refcnt to be released (%u).\n", -- refcnt); --} -- - void mlx5e_ktls_del_rx(struct net_device *netdev, struct tls_context *tls_ctx) - { - struct mlx5e_ktls_offload_context_rx *priv_rx; -@@ -663,7 +656,7 @@ void mlx5e_ktls_del_rx(struct net_device *netdev, struct tls_context *tls_ctx) - priv_rx = mlx5e_get_ktls_rx_priv_ctx(tls_ctx); - set_bit(MLX5E_PRIV_RX_FLAG_DELETING, priv_rx->flags); - mlx5e_set_ktls_rx_priv_ctx(tls_ctx, NULL); -- synchronize_rcu(); /* Sync with NAPI */ -+ synchronize_net(); /* Sync with NAPI */ - if (!cancel_work_sync(&priv_rx->rule.work)) - /* completion is needed, as the priv_rx in the add flow - * is maintained on the wqe info (wi), not on the socket. -@@ -671,8 +664,7 @@ void mlx5e_ktls_del_rx(struct net_device *netdev, struct tls_context *tls_ctx) - wait_for_completion(&priv_rx->add_ctx); - resync = &priv_rx->resync; - if (cancel_work_sync(&resync->work)) -- refcount_dec(&resync->refcnt); -- wait_for_resync(netdev, resync); -+ mlx5e_ktls_priv_rx_put(priv_rx); - - priv_rx->stats->tls_del++; - if (priv_rx->rule.rule) -@@ -680,5 +672,9 @@ void mlx5e_ktls_del_rx(struct net_device *netdev, struct tls_context *tls_ctx) - - mlx5_core_destroy_tir(mdev, priv_rx->tirn); - mlx5_ktls_destroy_key(mdev, priv_rx->key_id); -- kfree(priv_rx); -+ /* priv_rx should normally be freed here, but if there is an outstanding -+ * GET_PSV, deallocation will be delayed until the CQE for GET_PSV is -+ * processed. -+ */ -+ mlx5e_ktls_priv_rx_put(priv_rx); - } -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c -index 302001d6661ea..8612c388db7d3 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c -@@ -525,7 +525,7 @@ static int mlx5e_get_coalesce(struct net_device *netdev, - #define MLX5E_MAX_COAL_FRAMES MLX5_MAX_CQ_COUNT - - static void --mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal) -+mlx5e_set_priv_channels_tx_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal) - { - struct mlx5_core_dev *mdev = priv->mdev; - int tc; -@@ -540,6 +540,17 @@ mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesc - coal->tx_coalesce_usecs, - coal->tx_max_coalesced_frames); - } -+ } -+} -+ -+static void -+mlx5e_set_priv_channels_rx_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal) -+{ -+ struct mlx5_core_dev *mdev = priv->mdev; -+ int i; -+ -+ for (i = 0; i < priv->channels.num; ++i) { -+ struct mlx5e_channel *c = priv->channels.c[i]; - - mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq, - coal->rx_coalesce_usecs, -@@ -586,21 +597,9 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv, - tx_moder->pkts = coal->tx_max_coalesced_frames; - new_channels.params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce; - -- if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) { -- priv->channels.params = new_channels.params; -- goto out; -- } -- /* we are opened */ -- - reset_rx = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled; - reset_tx = !!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled; - -- if (!reset_rx && !reset_tx) { -- mlx5e_set_priv_channels_coalesce(priv, coal); -- priv->channels.params = new_channels.params; -- goto out; -- } -- - if (reset_rx) { - u8 mode = MLX5E_GET_PFLAG(&new_channels.params, - MLX5E_PFLAG_RX_CQE_BASED_MODER); -@@ -614,6 +613,20 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv, - mlx5e_reset_tx_moderation(&new_channels.params, mode); - } - -+ if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) { -+ priv->channels.params = new_channels.params; -+ goto out; -+ } -+ -+ if (!reset_rx && !reset_tx) { -+ if (!coal->use_adaptive_rx_coalesce) -+ mlx5e_set_priv_channels_rx_coalesce(priv, coal); -+ if (!coal->use_adaptive_tx_coalesce) -+ mlx5e_set_priv_channels_tx_coalesce(priv, coal); -+ priv->channels.params = new_channels.params; -+ goto out; -+ } -+ - err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL); - - out: -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c -index 3fc7d18ac868b..a2e0b548bf570 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c -@@ -65,6 +65,7 @@ - #include "en/devlink.h" - #include "lib/mlx5.h" - #include "en/ptp.h" -+#include "fpga/ipsec.h" - - bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev) - { -@@ -106,7 +107,7 @@ bool mlx5e_striding_rq_possible(struct mlx5_core_dev *mdev, - if (!mlx5e_check_fragmented_striding_rq_cap(mdev)) - return false; - -- if (MLX5_IPSEC_DEV(mdev)) -+ if (mlx5_fpga_is_ipsec_device(mdev)) - return false; - - if (params->xdp_prog) { -@@ -914,7 +915,7 @@ void mlx5e_activate_rq(struct mlx5e_rq *rq) - void mlx5e_deactivate_rq(struct mlx5e_rq *rq) - { - clear_bit(MLX5E_RQ_STATE_ENABLED, &rq->state); -- synchronize_rcu(); /* Sync with NAPI to prevent mlx5e_post_rx_wqes. */ -+ synchronize_net(); /* Sync with NAPI to prevent mlx5e_post_rx_wqes. */ - } - - void mlx5e_close_rq(struct mlx5e_rq *rq) -@@ -1348,7 +1349,7 @@ void mlx5e_deactivate_txqsq(struct mlx5e_txqsq *sq) - struct mlx5_wq_cyc *wq = &sq->wq; - - clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state); -- synchronize_rcu(); /* Sync with NAPI to prevent netif_tx_wake_queue. */ -+ synchronize_net(); /* Sync with NAPI to prevent netif_tx_wake_queue. */ - - mlx5e_tx_disable_queue(sq->txq); - -@@ -1423,7 +1424,7 @@ void mlx5e_activate_icosq(struct mlx5e_icosq *icosq) - void mlx5e_deactivate_icosq(struct mlx5e_icosq *icosq) - { - clear_bit(MLX5E_SQ_STATE_ENABLED, &icosq->state); -- synchronize_rcu(); /* Sync with NAPI. */ -+ synchronize_net(); /* Sync with NAPI. */ - } - - void mlx5e_close_icosq(struct mlx5e_icosq *sq) -@@ -1502,7 +1503,7 @@ void mlx5e_close_xdpsq(struct mlx5e_xdpsq *sq) - struct mlx5e_channel *c = sq->channel; - - clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state); -- synchronize_rcu(); /* Sync with NAPI. */ -+ synchronize_net(); /* Sync with NAPI. */ - - mlx5e_destroy_sq(c->mdev, sq->sqn); - mlx5e_free_xdpsq_descs(sq); -@@ -1826,12 +1827,12 @@ static int mlx5e_open_queues(struct mlx5e_channel *c, - - mlx5e_build_create_cq_param(&ccp, c); - -- err = mlx5e_open_cq(c->priv, icocq_moder, &cparam->icosq.cqp, &ccp, -+ err = mlx5e_open_cq(c->priv, icocq_moder, &cparam->async_icosq.cqp, &ccp, - &c->async_icosq.cq); - if (err) - return err; - -- err = mlx5e_open_cq(c->priv, icocq_moder, &cparam->async_icosq.cqp, &ccp, -+ err = mlx5e_open_cq(c->priv, icocq_moder, &cparam->icosq.cqp, &ccp, - &c->icosq.cq); - if (err) - goto err_close_async_icosq_cq; -@@ -2069,7 +2070,7 @@ static void mlx5e_build_rq_frags_info(struct mlx5_core_dev *mdev, - int i; - - #ifdef CONFIG_MLX5_EN_IPSEC -- if (MLX5_IPSEC_DEV(mdev)) -+ if (mlx5_fpga_is_ipsec_device(mdev)) - byte_count += MLX5E_METADATA_ETHER_LEN; - #endif - -@@ -4455,8 +4456,9 @@ static int mlx5e_xdp_allowed(struct mlx5e_priv *priv, struct bpf_prog *prog) - return -EINVAL; - } - -- if (MLX5_IPSEC_DEV(priv->mdev)) { -- netdev_warn(netdev, "can't set XDP with IPSec offload\n"); -+ if (mlx5_fpga_is_ipsec_device(priv->mdev)) { -+ netdev_warn(netdev, -+ "XDP is not available on Innova cards with IPsec support\n"); - return -EINVAL; - } - -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c -index ca4b55839a8a7..4864deed9dc94 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c -@@ -1795,8 +1795,8 @@ int mlx5e_rq_set_handlers(struct mlx5e_rq *rq, struct mlx5e_params *params, bool - - rq->handle_rx_cqe = priv->profile->rx_handlers->handle_rx_cqe_mpwqe; - #ifdef CONFIG_MLX5_EN_IPSEC -- if (MLX5_IPSEC_DEV(mdev)) { -- netdev_err(netdev, "MPWQE RQ with IPSec offload not supported\n"); -+ if (mlx5_fpga_is_ipsec_device(mdev)) { -+ netdev_err(netdev, "MPWQE RQ with Innova IPSec offload not supported\n"); - return -EINVAL; - } - #endif -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c -index dd0bfbacad474..717fbaa6ce736 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c -@@ -5040,7 +5040,7 @@ static int apply_police_params(struct mlx5e_priv *priv, u64 rate, - */ - if (rate) { - rate = (rate * BITS_PER_BYTE) + 500000; -- rate_mbps = max_t(u32, do_div(rate, 1000000), 1); -+ rate_mbps = max_t(u64, do_div(rate, 1000000), 1); - } - - err = mlx5_esw_modify_vport_rate(esw, vport_num, rate_mbps); -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c b/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c -index cc67366495b09..22bee49902327 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c -@@ -124,7 +124,7 @@ struct mlx5_fpga_ipsec { - struct ida halloc; - }; - --static bool mlx5_fpga_is_ipsec_device(struct mlx5_core_dev *mdev) -+bool mlx5_fpga_is_ipsec_device(struct mlx5_core_dev *mdev) - { - if (!mdev->fpga || !MLX5_CAP_GEN(mdev, fpga)) - return false; -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.h b/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.h -index db88eb4c49e34..8931b55844773 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.h -+++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.h -@@ -43,6 +43,7 @@ u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev); - const struct mlx5_flow_cmds * - mlx5_fs_cmd_get_default_ipsec_fpga_cmds(enum fs_flow_table_type type); - void mlx5_fpga_ipsec_build_fs_cmds(void); -+bool mlx5_fpga_is_ipsec_device(struct mlx5_core_dev *mdev); - #else - static inline - const struct mlx5_accel_ipsec_ops *mlx5_fpga_ipsec_ops(struct mlx5_core_dev *mdev) -@@ -55,6 +56,7 @@ mlx5_fs_cmd_get_default_ipsec_fpga_cmds(enum fs_flow_table_type type) - } - - static inline void mlx5_fpga_ipsec_build_fs_cmds(void) {}; -+static inline bool mlx5_fpga_is_ipsec_device(struct mlx5_core_dev *mdev) { return false; } - - #endif /* CONFIG_MLX5_FPGA_IPSEC */ - #endif /* __MLX5_FPGA_IPSEC_H__ */ -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/health.c b/drivers/net/ethernet/mellanox/mlx5/core/health.c -index 54523bed16cd3..0c32c485eb588 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/health.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/health.c -@@ -190,6 +190,16 @@ static bool reset_fw_if_needed(struct mlx5_core_dev *dev) - return true; - } - -+static void enter_error_state(struct mlx5_core_dev *dev, bool force) -+{ -+ if (mlx5_health_check_fatal_sensors(dev) || force) { /* protected state setting */ -+ dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; -+ mlx5_cmd_flush(dev); -+ } -+ -+ mlx5_notifier_call_chain(dev->priv.events, MLX5_DEV_EVENT_SYS_ERROR, (void *)1); -+} -+ - void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force) - { - bool err_detected = false; -@@ -208,12 +218,7 @@ void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force) - goto unlock; - } - -- if (mlx5_health_check_fatal_sensors(dev) || force) { /* protected state setting */ -- dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; -- mlx5_cmd_flush(dev); -- } -- -- mlx5_notifier_call_chain(dev->priv.events, MLX5_DEV_EVENT_SYS_ERROR, (void *)1); -+ enter_error_state(dev, force); - unlock: - mutex_unlock(&dev->intf_state_mutex); - } -@@ -613,7 +618,7 @@ static void mlx5_fw_fatal_reporter_err_work(struct work_struct *work) - priv = container_of(health, struct mlx5_priv, health); - dev = container_of(priv, struct mlx5_core_dev, priv); - -- mlx5_enter_error_state(dev, false); -+ enter_error_state(dev, false); - if (IS_ERR_OR_NULL(health->fw_fatal_reporter)) { - if (mlx5_health_try_recover(dev)) - mlx5_core_err(dev, "health recovery failed\n"); -@@ -707,8 +712,9 @@ static void poll_health(struct timer_list *t) - mlx5_core_err(dev, "Fatal error %u detected\n", fatal_error); - dev->priv.health.fatal_error = fatal_error; - print_health_info(dev); -+ dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; - mlx5_trigger_health_work(dev); -- goto out; -+ return; - } - - count = ioread32be(health->health_counter); -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c -index ca6f2fc39ea0a..ba1a4ae28097d 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/main.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c -@@ -1396,7 +1396,8 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *id) - dev_err(&pdev->dev, "mlx5_crdump_enable failed with error code %d\n", err); - - pci_save_state(pdev); -- devlink_reload_enable(devlink); -+ if (!mlx5_core_is_mp_slave(dev)) -+ devlink_reload_enable(devlink); - return 0; - - err_load_one: -diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c -index 0d78408b4e269..470ff6b3ebef1 100644 ---- a/drivers/net/ethernet/realtek/r8169_main.c -+++ b/drivers/net/ethernet/realtek/r8169_main.c -@@ -2315,14 +2315,14 @@ static void r8168dp_hw_jumbo_disable(struct rtl8169_private *tp) - - static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp) - { -- RTL_W8(tp, MaxTxPacketSize, 0x3f); -+ RTL_W8(tp, MaxTxPacketSize, 0x24); - RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0); - RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01); - } - - static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp) - { -- RTL_W8(tp, MaxTxPacketSize, 0x0c); -+ RTL_W8(tp, MaxTxPacketSize, 0x3f); - RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0); - RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01); - } -diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c -index f184b00f51166..5f500141567d0 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c -+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c -@@ -301,7 +301,7 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac) - return -EINVAL; - } - -- if (rx_dly_config & PRG_ETH0_ADJ_ENABLE) { -+ if (delay_config & PRG_ETH0_ADJ_ENABLE) { - if (!dwmac->timing_adj_clk) { - dev_err(dwmac->dev, - "The timing-adjustment clock is mandatory for the RX delay re-timing\n"); -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c -index 56985542e2029..44bb133c30007 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c -@@ -316,6 +316,32 @@ static int tc_setup_cbs(struct stmmac_priv *priv, - if (!priv->dma_cap.av) - return -EOPNOTSUPP; - -+ /* Port Transmit Rate and Speed Divider */ -+ switch (priv->speed) { -+ case SPEED_10000: -+ ptr = 32; -+ speed_div = 10000000; -+ break; -+ case SPEED_5000: -+ ptr = 32; -+ speed_div = 5000000; -+ break; -+ case SPEED_2500: -+ ptr = 8; -+ speed_div = 2500000; -+ break; -+ case SPEED_1000: -+ ptr = 8; -+ speed_div = 1000000; -+ break; -+ case SPEED_100: -+ ptr = 4; -+ speed_div = 100000; -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } -+ - mode_to_use = priv->plat->tx_queues_cfg[queue].mode_to_use; - if (mode_to_use == MTL_QUEUE_DCB && qopt->enable) { - ret = stmmac_dma_qmode(priv, priv->ioaddr, queue, MTL_QUEUE_AVB); -@@ -332,10 +358,6 @@ static int tc_setup_cbs(struct stmmac_priv *priv, - priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; - } - -- /* Port Transmit Rate and Speed Divider */ -- ptr = (priv->speed == SPEED_100) ? 4 : 8; -- speed_div = (priv->speed == SPEED_100) ? 100000 : 1000000; -- - /* Final adjustments for HW */ - value = div_s64(qopt->idleslope * 1024ll * ptr, speed_div); - priv->plat->tx_queues_cfg[queue].idle_slope = value & GENMASK(31, 0); -diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c -index 6fea980acf646..b4a0bfce5b762 100644 ---- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c -+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c -@@ -1817,6 +1817,18 @@ static int axienet_probe(struct platform_device *pdev) - lp->options = XAE_OPTION_DEFAULTS; - lp->rx_bd_num = RX_BD_NUM_DEFAULT; - lp->tx_bd_num = TX_BD_NUM_DEFAULT; -+ -+ lp->clk = devm_clk_get_optional(&pdev->dev, NULL); -+ if (IS_ERR(lp->clk)) { -+ ret = PTR_ERR(lp->clk); -+ goto free_netdev; -+ } -+ ret = clk_prepare_enable(lp->clk); -+ if (ret) { -+ dev_err(&pdev->dev, "Unable to enable clock: %d\n", ret); -+ goto free_netdev; -+ } -+ - /* Map device registers */ - ethres = platform_get_resource(pdev, IORESOURCE_MEM, 0); - lp->regs = devm_ioremap_resource(&pdev->dev, ethres); -@@ -1992,20 +2004,6 @@ static int axienet_probe(struct platform_device *pdev) - - lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0); - if (lp->phy_node) { -- lp->clk = devm_clk_get(&pdev->dev, NULL); -- if (IS_ERR(lp->clk)) { -- dev_warn(&pdev->dev, "Failed to get clock: %ld\n", -- PTR_ERR(lp->clk)); -- lp->clk = NULL; -- } else { -- ret = clk_prepare_enable(lp->clk); -- if (ret) { -- dev_err(&pdev->dev, "Unable to enable clock: %d\n", -- ret); -- goto free_netdev; -- } -- } -- - ret = axienet_mdio_setup(lp); - if (ret) - dev_warn(&pdev->dev, -diff --git a/drivers/net/gtp.c b/drivers/net/gtp.c -index 4c04e271f1844..fd3c2d86e48b1 100644 ---- a/drivers/net/gtp.c -+++ b/drivers/net/gtp.c -@@ -539,7 +539,6 @@ static int gtp_build_skb_ip4(struct sk_buff *skb, struct net_device *dev, - if (!skb_is_gso(skb) && (iph->frag_off & htons(IP_DF)) && - mtu < ntohs(iph->tot_len)) { - netdev_dbg(dev, "packet too big, fragmentation needed\n"); -- memset(IPCB(skb), 0, sizeof(*IPCB(skb))); - icmp_ndo_send(skb, ICMP_DEST_UNREACH, ICMP_FRAG_NEEDED, - htonl(mtu)); - goto err_rt; -diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c -index 84bb8ae927252..eb1c8396bcdd9 100644 ---- a/drivers/net/ipa/ipa_main.c -+++ b/drivers/net/ipa/ipa_main.c -@@ -581,10 +581,10 @@ ipa_resource_config(struct ipa *ipa, const struct ipa_resource_data *data) - return -EINVAL; - - for (i = 0; i < data->resource_src_count; i++) -- ipa_resource_config_src(ipa, data->resource_src); -+ ipa_resource_config_src(ipa, &data->resource_src[i]); - - for (i = 0; i < data->resource_dst_count; i++) -- ipa_resource_config_dst(ipa, data->resource_dst); -+ ipa_resource_config_dst(ipa, &data->resource_dst[i]); - - return 0; - } -diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c -index 54e0d75203dac..57f8021b70af5 100644 ---- a/drivers/net/phy/micrel.c -+++ b/drivers/net/phy/micrel.c -@@ -1295,6 +1295,7 @@ static struct phy_driver ksphy_driver[] = { - .driver_data = &ksz8081_type, - .probe = kszphy_probe, - .config_init = ksz8081_config_init, -+ .soft_reset = genphy_soft_reset, - .config_intr = kszphy_config_intr, - .handle_interrupt = kszphy_handle_interrupt, - .get_sset_count = kszphy_get_sset_count, -diff --git a/drivers/net/phy/mscc/Makefile b/drivers/net/phy/mscc/Makefile -index d8e22a4eeeffa..78d84194f79ae 100644 ---- a/drivers/net/phy/mscc/Makefile -+++ b/drivers/net/phy/mscc/Makefile -@@ -4,6 +4,7 @@ - - obj-$(CONFIG_MICROSEMI_PHY) := mscc.o - mscc-objs := mscc_main.o -+mscc-objs += mscc_serdes.o - - ifdef CONFIG_MACSEC - mscc-objs += mscc_macsec.o -diff --git a/drivers/net/phy/mscc/mscc.h b/drivers/net/phy/mscc/mscc.h -index 9481bce94c2ed..a50235fdf7d99 100644 ---- a/drivers/net/phy/mscc/mscc.h -+++ b/drivers/net/phy/mscc/mscc.h -@@ -102,6 +102,7 @@ enum rgmii_clock_delay { - #define PHY_MCB_S6G_READ BIT(30) - - #define PHY_S6G_PLL5G_CFG0 0x06 -+#define PHY_S6G_PLL5G_CFG2 0x08 - #define PHY_S6G_LCPLL_CFG 0x11 - #define PHY_S6G_PLL_CFG 0x2b - #define PHY_S6G_COMMON_CFG 0x2c -@@ -121,6 +122,9 @@ enum rgmii_clock_delay { - #define PHY_S6G_PLL_FSM_CTRL_DATA_POS 8 - #define PHY_S6G_PLL_FSM_ENA_POS 7 - -+#define PHY_S6G_CFG2_FSM_DIS 1 -+#define PHY_S6G_CFG2_FSM_CLK_BP 23 -+ - #define MSCC_EXT_PAGE_ACCESS 31 - #define MSCC_PHY_PAGE_STANDARD 0x0000 /* Standard registers */ - #define MSCC_PHY_PAGE_EXTENDED 0x0001 /* Extended registers */ -@@ -136,6 +140,10 @@ enum rgmii_clock_delay { - #define MSCC_PHY_PAGE_1588 0x1588 /* PTP (1588) */ - #define MSCC_PHY_PAGE_TEST 0x2a30 /* Test reg */ - #define MSCC_PHY_PAGE_TR 0x52b5 /* Token ring registers */ -+#define MSCC_PHY_GPIO_CONTROL_2 14 -+ -+#define MSCC_PHY_COMA_MODE 0x2000 /* input(1) / output(0) */ -+#define MSCC_PHY_COMA_OUTPUT 0x1000 /* value to output */ - - /* Extended Page 1 Registers */ - #define MSCC_PHY_CU_MEDIA_CRC_VALID_CNT 18 -@@ -335,6 +343,10 @@ enum rgmii_clock_delay { - #define VSC8584_REVB 0x0001 - #define MSCC_DEV_REV_MASK GENMASK(3, 0) - -+#define MSCC_ROM_TRAP_SERDES_6G_CFG 0x1E48 -+#define MSCC_RAM_TRAP_SERDES_6G_CFG 0x1E4F -+#define PATCH_VEC_ZERO_EN 0x0100 -+ - struct reg_val { - u16 reg; - u32 val; -@@ -412,6 +424,22 @@ struct vsc8531_edge_rate_table { - }; - #endif /* CONFIG_OF_MDIO */ - -+enum csr_target { -+ MACRO_CTRL = 0x07, -+}; -+ -+u32 vsc85xx_csr_read(struct phy_device *phydev, -+ enum csr_target target, u32 reg); -+ -+int vsc85xx_csr_write(struct phy_device *phydev, -+ enum csr_target target, u32 reg, u32 val); -+ -+int phy_base_write(struct phy_device *phydev, u32 regnum, u16 val); -+int phy_base_read(struct phy_device *phydev, u32 regnum); -+int phy_update_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb); -+int phy_commit_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb); -+int vsc8584_cmd(struct phy_device *phydev, u16 val); -+ - #if IS_ENABLED(CONFIG_MACSEC) - int vsc8584_macsec_init(struct phy_device *phydev); - void vsc8584_handle_macsec_interrupt(struct phy_device *phydev); -diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c -index 2f2157e3deab5..3a7705228ed59 100644 ---- a/drivers/net/phy/mscc/mscc_main.c -+++ b/drivers/net/phy/mscc/mscc_main.c -@@ -17,7 +17,7 @@ - #include - #include - #include -- -+#include "mscc_serdes.h" - #include "mscc.h" - - static const struct vsc85xx_hw_stat vsc85xx_hw_stats[] = { -@@ -689,7 +689,7 @@ out_unlock: - } - - /* phydev->bus->mdio_lock should be locked when using this function */ --static int phy_base_write(struct phy_device *phydev, u32 regnum, u16 val) -+int phy_base_write(struct phy_device *phydev, u32 regnum, u16 val) - { - if (unlikely(!mutex_is_locked(&phydev->mdio.bus->mdio_lock))) { - dev_err(&phydev->mdio.dev, "MDIO bus lock not held!\n"); -@@ -700,7 +700,7 @@ static int phy_base_write(struct phy_device *phydev, u32 regnum, u16 val) - } - - /* phydev->bus->mdio_lock should be locked when using this function */ --static int phy_base_read(struct phy_device *phydev, u32 regnum) -+int phy_base_read(struct phy_device *phydev, u32 regnum) - { - if (unlikely(!mutex_is_locked(&phydev->mdio.bus->mdio_lock))) { - dev_err(&phydev->mdio.dev, "MDIO bus lock not held!\n"); -@@ -710,6 +710,113 @@ static int phy_base_read(struct phy_device *phydev, u32 regnum) - return __phy_package_read(phydev, regnum); - } - -+u32 vsc85xx_csr_read(struct phy_device *phydev, -+ enum csr_target target, u32 reg) -+{ -+ unsigned long deadline; -+ u32 val, val_l, val_h; -+ -+ phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_CSR_CNTL); -+ -+ /* CSR registers are grouped under different Target IDs. -+ * 6-bit Target_ID is split between MSCC_EXT_PAGE_CSR_CNTL_20 and -+ * MSCC_EXT_PAGE_CSR_CNTL_19 registers. -+ * Target_ID[5:2] maps to bits[3:0] of MSCC_EXT_PAGE_CSR_CNTL_20 -+ * and Target_ID[1:0] maps to bits[13:12] of MSCC_EXT_PAGE_CSR_CNTL_19. -+ */ -+ -+ /* Setup the Target ID */ -+ phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_20, -+ MSCC_PHY_CSR_CNTL_20_TARGET(target >> 2)); -+ -+ if ((target >> 2 == 0x1) || (target >> 2 == 0x3)) -+ /* non-MACsec access */ -+ target &= 0x3; -+ else -+ target = 0; -+ -+ /* Trigger CSR Action - Read into the CSR's */ -+ phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_19, -+ MSCC_PHY_CSR_CNTL_19_CMD | MSCC_PHY_CSR_CNTL_19_READ | -+ MSCC_PHY_CSR_CNTL_19_REG_ADDR(reg) | -+ MSCC_PHY_CSR_CNTL_19_TARGET(target)); -+ -+ /* Wait for register access*/ -+ deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -+ do { -+ usleep_range(500, 1000); -+ val = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_19); -+ } while (time_before(jiffies, deadline) && -+ !(val & MSCC_PHY_CSR_CNTL_19_CMD)); -+ -+ if (!(val & MSCC_PHY_CSR_CNTL_19_CMD)) -+ return 0xffffffff; -+ -+ /* Read the Least Significant Word (LSW) (17) */ -+ val_l = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_17); -+ -+ /* Read the Most Significant Word (MSW) (18) */ -+ val_h = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_18); -+ -+ phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, -+ MSCC_PHY_PAGE_STANDARD); -+ -+ return (val_h << 16) | val_l; -+} -+ -+int vsc85xx_csr_write(struct phy_device *phydev, -+ enum csr_target target, u32 reg, u32 val) -+{ -+ unsigned long deadline; -+ -+ phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_CSR_CNTL); -+ -+ /* CSR registers are grouped under different Target IDs. -+ * 6-bit Target_ID is split between MSCC_EXT_PAGE_CSR_CNTL_20 and -+ * MSCC_EXT_PAGE_CSR_CNTL_19 registers. -+ * Target_ID[5:2] maps to bits[3:0] of MSCC_EXT_PAGE_CSR_CNTL_20 -+ * and Target_ID[1:0] maps to bits[13:12] of MSCC_EXT_PAGE_CSR_CNTL_19. -+ */ -+ -+ /* Setup the Target ID */ -+ phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_20, -+ MSCC_PHY_CSR_CNTL_20_TARGET(target >> 2)); -+ -+ /* Write the Least Significant Word (LSW) (17) */ -+ phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_17, (u16)val); -+ -+ /* Write the Most Significant Word (MSW) (18) */ -+ phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_18, (u16)(val >> 16)); -+ -+ if ((target >> 2 == 0x1) || (target >> 2 == 0x3)) -+ /* non-MACsec access */ -+ target &= 0x3; -+ else -+ target = 0; -+ -+ /* Trigger CSR Action - Write into the CSR's */ -+ phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_19, -+ MSCC_PHY_CSR_CNTL_19_CMD | -+ MSCC_PHY_CSR_CNTL_19_REG_ADDR(reg) | -+ MSCC_PHY_CSR_CNTL_19_TARGET(target)); -+ -+ /* Wait for register access */ -+ deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -+ do { -+ usleep_range(500, 1000); -+ val = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_19); -+ } while (time_before(jiffies, deadline) && -+ !(val & MSCC_PHY_CSR_CNTL_19_CMD)); -+ -+ if (!(val & MSCC_PHY_CSR_CNTL_19_CMD)) -+ return -ETIMEDOUT; -+ -+ phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, -+ MSCC_PHY_PAGE_STANDARD); -+ -+ return 0; -+} -+ - /* bus->mdio_lock should be locked when using this function */ - static void vsc8584_csr_write(struct phy_device *phydev, u16 addr, u32 val) - { -@@ -719,7 +826,7 @@ static void vsc8584_csr_write(struct phy_device *phydev, u16 addr, u32 val) - } - - /* bus->mdio_lock should be locked when using this function */ --static int vsc8584_cmd(struct phy_device *phydev, u16 val) -+int vsc8584_cmd(struct phy_device *phydev, u16 val) - { - unsigned long deadline; - u16 reg_val; -@@ -1131,6 +1238,92 @@ out: - return ret; - } - -+/* Access LCPLL Cfg_2 */ -+static void vsc8584_pll5g_cfg2_wr(struct phy_device *phydev, -+ bool disable_fsm) -+{ -+ u32 rd_dat; -+ -+ rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); -+ rd_dat &= ~BIT(PHY_S6G_CFG2_FSM_DIS); -+ rd_dat |= (disable_fsm << PHY_S6G_CFG2_FSM_DIS); -+ vsc85xx_csr_write(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2, rd_dat); -+} -+ -+/* trigger a read to the spcified MCB */ -+static int vsc8584_mcb_rd_trig(struct phy_device *phydev, -+ u32 mcb_reg_addr, u8 mcb_slave_num) -+{ -+ u32 rd_dat = 0; -+ -+ /* read MCB */ -+ vsc85xx_csr_write(phydev, MACRO_CTRL, mcb_reg_addr, -+ (0x40000000 | (1L << mcb_slave_num))); -+ -+ return read_poll_timeout(vsc85xx_csr_read, rd_dat, -+ !(rd_dat & 0x40000000), -+ 4000, 200000, 0, -+ phydev, MACRO_CTRL, mcb_reg_addr); -+} -+ -+/* trigger a write to the spcified MCB */ -+static int vsc8584_mcb_wr_trig(struct phy_device *phydev, -+ u32 mcb_reg_addr, -+ u8 mcb_slave_num) -+{ -+ u32 rd_dat = 0; -+ -+ /* write back MCB */ -+ vsc85xx_csr_write(phydev, MACRO_CTRL, mcb_reg_addr, -+ (0x80000000 | (1L << mcb_slave_num))); -+ -+ return read_poll_timeout(vsc85xx_csr_read, rd_dat, -+ !(rd_dat & 0x80000000), -+ 4000, 200000, 0, -+ phydev, MACRO_CTRL, mcb_reg_addr); -+} -+ -+/* Sequence to Reset LCPLL for the VIPER and ELISE PHY */ -+static int vsc8584_pll5g_reset(struct phy_device *phydev) -+{ -+ bool dis_fsm; -+ int ret = 0; -+ -+ ret = vsc8584_mcb_rd_trig(phydev, 0x11, 0); -+ if (ret < 0) -+ goto done; -+ dis_fsm = 1; -+ -+ /* Reset LCPLL */ -+ vsc8584_pll5g_cfg2_wr(phydev, dis_fsm); -+ -+ /* write back LCPLL MCB */ -+ ret = vsc8584_mcb_wr_trig(phydev, 0x11, 0); -+ if (ret < 0) -+ goto done; -+ -+ /* 10 mSec sleep while LCPLL is hold in reset */ -+ usleep_range(10000, 20000); -+ -+ /* read LCPLL MCB into CSRs */ -+ ret = vsc8584_mcb_rd_trig(phydev, 0x11, 0); -+ if (ret < 0) -+ goto done; -+ dis_fsm = 0; -+ -+ /* Release the Reset of LCPLL */ -+ vsc8584_pll5g_cfg2_wr(phydev, dis_fsm); -+ -+ /* write back LCPLL MCB */ -+ ret = vsc8584_mcb_wr_trig(phydev, 0x11, 0); -+ if (ret < 0) -+ goto done; -+ -+ usleep_range(110000, 200000); -+done: -+ return ret; -+} -+ - /* bus->mdio_lock should be locked when using this function */ - static int vsc8584_config_pre_init(struct phy_device *phydev) - { -@@ -1323,6 +1516,21 @@ static void vsc8584_get_base_addr(struct phy_device *phydev) - vsc8531->addr = addr; - } - -+static void vsc85xx_coma_mode_release(struct phy_device *phydev) -+{ -+ /* The coma mode (pin or reg) provides an optional feature that -+ * may be used to control when the PHYs become active. -+ * Alternatively the COMA_MODE pin may be connected low -+ * so that the PHYs are fully active once out of reset. -+ */ -+ -+ /* Enable output (mode=0) and write zero to it */ -+ vsc85xx_phy_write_page(phydev, MSCC_PHY_PAGE_EXTENDED_GPIO); -+ __phy_modify(phydev, MSCC_PHY_GPIO_CONTROL_2, -+ MSCC_PHY_COMA_MODE | MSCC_PHY_COMA_OUTPUT, 0); -+ vsc85xx_phy_write_page(phydev, MSCC_PHY_PAGE_STANDARD); -+} -+ - static int vsc8584_config_init(struct phy_device *phydev) - { - struct vsc8531_private *vsc8531 = phydev->priv; -@@ -1541,6 +1749,100 @@ static int vsc85xx_config_init(struct phy_device *phydev) - return 0; - } - -+static int __phy_write_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb, -+ u32 op) -+{ -+ unsigned long deadline; -+ u32 val; -+ int ret; -+ -+ ret = vsc85xx_csr_write(phydev, PHY_MCB_TARGET, reg, -+ op | (1 << mcb)); -+ if (ret) -+ return -EINVAL; -+ -+ deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -+ do { -+ usleep_range(500, 1000); -+ val = vsc85xx_csr_read(phydev, PHY_MCB_TARGET, reg); -+ -+ if (val == 0xffffffff) -+ return -EIO; -+ -+ } while (time_before(jiffies, deadline) && (val & op)); -+ -+ if (val & op) -+ return -ETIMEDOUT; -+ -+ return 0; -+} -+ -+/* Trigger a read to the specified MCB */ -+int phy_update_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb) -+{ -+ return __phy_write_mcb_s6g(phydev, reg, mcb, PHY_MCB_S6G_READ); -+} -+ -+/* Trigger a write to the specified MCB */ -+int phy_commit_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb) -+{ -+ return __phy_write_mcb_s6g(phydev, reg, mcb, PHY_MCB_S6G_WRITE); -+} -+ -+static int vsc8514_config_host_serdes(struct phy_device *phydev) -+{ -+ int ret; -+ u16 val; -+ -+ ret = phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, -+ MSCC_PHY_PAGE_EXTENDED_GPIO); -+ if (ret) -+ return ret; -+ -+ val = phy_base_read(phydev, MSCC_PHY_MAC_CFG_FASTLINK); -+ val &= ~MAC_CFG_MASK; -+ val |= MAC_CFG_QSGMII; -+ ret = phy_base_write(phydev, MSCC_PHY_MAC_CFG_FASTLINK, val); -+ if (ret) -+ return ret; -+ -+ ret = phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, -+ MSCC_PHY_PAGE_STANDARD); -+ if (ret) -+ return ret; -+ -+ ret = vsc8584_cmd(phydev, PROC_CMD_NOP); -+ if (ret) -+ return ret; -+ -+ ret = vsc8584_cmd(phydev, -+ PROC_CMD_MCB_ACCESS_MAC_CONF | -+ PROC_CMD_RST_CONF_PORT | -+ PROC_CMD_READ_MOD_WRITE_PORT | PROC_CMD_QSGMII_MAC); -+ if (ret) { -+ dev_err(&phydev->mdio.dev, "%s: QSGMII error: %d\n", -+ __func__, ret); -+ return ret; -+ } -+ -+ /* Apply 6G SerDes FOJI Algorithm -+ * Initial condition requirement: -+ * 1. hold 8051 in reset -+ * 2. disable patch vector 0, in order to allow IB cal poll during FoJi -+ * 3. deassert 8051 reset after change patch vector status -+ * 4. proceed with FoJi (vsc85xx_sd6g_config_v2) -+ */ -+ vsc8584_micro_assert_reset(phydev); -+ val = phy_base_read(phydev, MSCC_INT_MEM_CNTL); -+ /* clear bit 8, to disable patch vector 0 */ -+ val &= ~PATCH_VEC_ZERO_EN; -+ ret = phy_base_write(phydev, MSCC_INT_MEM_CNTL, val); -+ /* Enable 8051 clock, don't set patch present, disable PRAM clock override */ -+ vsc8584_micro_deassert_reset(phydev, false); -+ -+ return vsc85xx_sd6g_config_v2(phydev); -+} -+ - static int vsc8514_config_pre_init(struct phy_device *phydev) - { - /* These are the settings to override the silicon default -@@ -1569,8 +1871,16 @@ static int vsc8514_config_pre_init(struct phy_device *phydev) - {0x16b2, 0x00007000}, - {0x16b4, 0x00000814}, - }; -+ struct device *dev = &phydev->mdio.dev; - unsigned int i; - u16 reg; -+ int ret; -+ -+ ret = vsc8584_pll5g_reset(phydev); -+ if (ret < 0) { -+ dev_err(dev, "failed LCPLL reset, ret: %d\n", ret); -+ return ret; -+ } - - phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD); - -@@ -1602,151 +1912,48 @@ static int vsc8514_config_pre_init(struct phy_device *phydev) - reg &= ~SMI_BROADCAST_WR_EN; - phy_base_write(phydev, MSCC_PHY_EXT_CNTL_STATUS, reg); - -- return 0; --} -- --static u32 vsc85xx_csr_ctrl_phy_read(struct phy_device *phydev, -- u32 target, u32 reg) --{ -- unsigned long deadline; -- u32 val, val_l, val_h; -- -- phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_CSR_CNTL); -- -- /* CSR registers are grouped under different Target IDs. -- * 6-bit Target_ID is split between MSCC_EXT_PAGE_CSR_CNTL_20 and -- * MSCC_EXT_PAGE_CSR_CNTL_19 registers. -- * Target_ID[5:2] maps to bits[3:0] of MSCC_EXT_PAGE_CSR_CNTL_20 -- * and Target_ID[1:0] maps to bits[13:12] of MSCC_EXT_PAGE_CSR_CNTL_19. -- */ -- -- /* Setup the Target ID */ -- phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_20, -- MSCC_PHY_CSR_CNTL_20_TARGET(target >> 2)); -- -- /* Trigger CSR Action - Read into the CSR's */ -- phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_19, -- MSCC_PHY_CSR_CNTL_19_CMD | MSCC_PHY_CSR_CNTL_19_READ | -- MSCC_PHY_CSR_CNTL_19_REG_ADDR(reg) | -- MSCC_PHY_CSR_CNTL_19_TARGET(target & 0x3)); -- -- /* Wait for register access*/ -- deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -- do { -- usleep_range(500, 1000); -- val = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_19); -- } while (time_before(jiffies, deadline) && -- !(val & MSCC_PHY_CSR_CNTL_19_CMD)); -- -- if (!(val & MSCC_PHY_CSR_CNTL_19_CMD)) -- return 0xffffffff; -- -- /* Read the Least Significant Word (LSW) (17) */ -- val_l = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_17); -- -- /* Read the Most Significant Word (MSW) (18) */ -- val_h = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_18); -- -- phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, -- MSCC_PHY_PAGE_STANDARD); -- -- return (val_h << 16) | val_l; --} -- --static int vsc85xx_csr_ctrl_phy_write(struct phy_device *phydev, -- u32 target, u32 reg, u32 val) --{ -- unsigned long deadline; -- -- phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_CSR_CNTL); -- -- /* CSR registers are grouped under different Target IDs. -- * 6-bit Target_ID is split between MSCC_EXT_PAGE_CSR_CNTL_20 and -- * MSCC_EXT_PAGE_CSR_CNTL_19 registers. -- * Target_ID[5:2] maps to bits[3:0] of MSCC_EXT_PAGE_CSR_CNTL_20 -- * and Target_ID[1:0] maps to bits[13:12] of MSCC_EXT_PAGE_CSR_CNTL_19. -+ /* Add pre-patching commands to: -+ * 1. enable 8051 clock, operate 8051 clock at 125 MHz -+ * instead of HW default 62.5MHz -+ * 2. write patch vector 0, to skip IB cal polling executed -+ * as part of the 0x80E0 ROM command - */ -+ vsc8584_micro_deassert_reset(phydev, false); - -- /* Setup the Target ID */ -- phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_20, -- MSCC_PHY_CSR_CNTL_20_TARGET(target >> 2)); -- -- /* Write the Least Significant Word (LSW) (17) */ -- phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_17, (u16)val); -- -- /* Write the Most Significant Word (MSW) (18) */ -- phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_18, (u16)(val >> 16)); -- -- /* Trigger CSR Action - Write into the CSR's */ -- phy_base_write(phydev, MSCC_EXT_PAGE_CSR_CNTL_19, -- MSCC_PHY_CSR_CNTL_19_CMD | -- MSCC_PHY_CSR_CNTL_19_REG_ADDR(reg) | -- MSCC_PHY_CSR_CNTL_19_TARGET(target & 0x3)); -- -- /* Wait for register access */ -- deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -- do { -- usleep_range(500, 1000); -- val = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_19); -- } while (time_before(jiffies, deadline) && -- !(val & MSCC_PHY_CSR_CNTL_19_CMD)); -- -- if (!(val & MSCC_PHY_CSR_CNTL_19_CMD)) -- return -ETIMEDOUT; -- -+ vsc8584_micro_assert_reset(phydev); - phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, -- MSCC_PHY_PAGE_STANDARD); -- -- return 0; --} -- --static int __phy_write_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb, -- u32 op) --{ -- unsigned long deadline; -- u32 val; -- int ret; -- -- ret = vsc85xx_csr_ctrl_phy_write(phydev, PHY_MCB_TARGET, reg, -- op | (1 << mcb)); -+ MSCC_PHY_PAGE_EXTENDED_GPIO); -+ /* ROM address to trap, for patch vector 0 */ -+ reg = MSCC_ROM_TRAP_SERDES_6G_CFG; -+ ret = phy_base_write(phydev, MSCC_TRAP_ROM_ADDR(1), reg); - if (ret) -- return -EINVAL; -- -- deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -- do { -- usleep_range(500, 1000); -- val = vsc85xx_csr_ctrl_phy_read(phydev, PHY_MCB_TARGET, reg); -- -- if (val == 0xffffffff) -- return -EIO; -- -- } while (time_before(jiffies, deadline) && (val & op)); -- -- if (val & op) -- return -ETIMEDOUT; -- -- return 0; --} -- --/* Trigger a read to the specified MCB */ --static int phy_update_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb) --{ -- return __phy_write_mcb_s6g(phydev, reg, mcb, PHY_MCB_S6G_READ); --} -+ goto err; -+ /* RAM address to jump to, when patch vector 0 enabled */ -+ reg = MSCC_RAM_TRAP_SERDES_6G_CFG; -+ ret = phy_base_write(phydev, MSCC_PATCH_RAM_ADDR(1), reg); -+ if (ret) -+ goto err; -+ reg = phy_base_read(phydev, MSCC_INT_MEM_CNTL); -+ reg |= PATCH_VEC_ZERO_EN; /* bit 8, enable patch vector 0 */ -+ ret = phy_base_write(phydev, MSCC_INT_MEM_CNTL, reg); -+ if (ret) -+ goto err; - --/* Trigger a write to the specified MCB */ --static int phy_commit_mcb_s6g(struct phy_device *phydev, u32 reg, u8 mcb) --{ -- return __phy_write_mcb_s6g(phydev, reg, mcb, PHY_MCB_S6G_WRITE); -+ /* Enable 8051 clock, don't set patch present -+ * yet, disable PRAM clock override -+ */ -+ vsc8584_micro_deassert_reset(phydev, false); -+ return ret; -+ err: -+ /* restore 8051 and bail w error */ -+ vsc8584_micro_deassert_reset(phydev, false); -+ return ret; - } - - static int vsc8514_config_init(struct phy_device *phydev) - { - struct vsc8531_private *vsc8531 = phydev->priv; -- unsigned long deadline; - int ret, i; -- u16 val; -- u32 reg; - - phydev->mdix_ctrl = ETH_TP_MDI_AUTO; - -@@ -1763,123 +1970,14 @@ static int vsc8514_config_init(struct phy_device *phydev) - * do the correct init sequence for all PHYs that are package-critical - * in this pre-init function. - */ -- if (phy_package_init_once(phydev)) -- vsc8514_config_pre_init(phydev); -- -- ret = phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, -- MSCC_PHY_PAGE_EXTENDED_GPIO); -- if (ret) -- goto err; -- -- val = phy_base_read(phydev, MSCC_PHY_MAC_CFG_FASTLINK); -- -- val &= ~MAC_CFG_MASK; -- val |= MAC_CFG_QSGMII; -- ret = phy_base_write(phydev, MSCC_PHY_MAC_CFG_FASTLINK, val); -- if (ret) -- goto err; -- -- ret = phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, -- MSCC_PHY_PAGE_STANDARD); -- if (ret) -- goto err; -- -- ret = vsc8584_cmd(phydev, -- PROC_CMD_MCB_ACCESS_MAC_CONF | -- PROC_CMD_RST_CONF_PORT | -- PROC_CMD_READ_MOD_WRITE_PORT | PROC_CMD_QSGMII_MAC); -- if (ret) -- goto err; -- -- /* 6g mcb */ -- phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -- /* lcpll mcb */ -- phy_update_mcb_s6g(phydev, PHY_S6G_LCPLL_CFG, 0); -- /* pll5gcfg0 */ -- ret = vsc85xx_csr_ctrl_phy_write(phydev, PHY_MCB_TARGET, -- PHY_S6G_PLL5G_CFG0, 0x7036f145); -- if (ret) -- goto err; -- -- phy_commit_mcb_s6g(phydev, PHY_S6G_LCPLL_CFG, 0); -- /* pllcfg */ -- ret = vsc85xx_csr_ctrl_phy_write(phydev, PHY_MCB_TARGET, -- PHY_S6G_PLL_CFG, -- (3 << PHY_S6G_PLL_ENA_OFFS_POS) | -- (120 << PHY_S6G_PLL_FSM_CTRL_DATA_POS) -- | (0 << PHY_S6G_PLL_FSM_ENA_POS)); -- if (ret) -- goto err; -- -- /* commoncfg */ -- ret = vsc85xx_csr_ctrl_phy_write(phydev, PHY_MCB_TARGET, -- PHY_S6G_COMMON_CFG, -- (0 << PHY_S6G_SYS_RST_POS) | -- (0 << PHY_S6G_ENA_LANE_POS) | -- (0 << PHY_S6G_ENA_LOOP_POS) | -- (0 << PHY_S6G_QRATE_POS) | -- (3 << PHY_S6G_IF_MODE_POS)); -- if (ret) -- goto err; -- -- /* misccfg */ -- ret = vsc85xx_csr_ctrl_phy_write(phydev, PHY_MCB_TARGET, -- PHY_S6G_MISC_CFG, 1); -- if (ret) -- goto err; -- -- /* gpcfg */ -- ret = vsc85xx_csr_ctrl_phy_write(phydev, PHY_MCB_TARGET, -- PHY_S6G_GPC_CFG, 768); -- if (ret) -- goto err; -- -- phy_commit_mcb_s6g(phydev, PHY_S6G_DFT_CFG2, 0); -- -- deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -- do { -- usleep_range(500, 1000); -- phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, -- 0); /* read 6G MCB into CSRs */ -- reg = vsc85xx_csr_ctrl_phy_read(phydev, PHY_MCB_TARGET, -- PHY_S6G_PLL_STATUS); -- if (reg == 0xffffffff) { -- phy_unlock_mdio_bus(phydev); -- return -EIO; -- } -- -- } while (time_before(jiffies, deadline) && (reg & BIT(12))); -- -- if (reg & BIT(12)) { -- phy_unlock_mdio_bus(phydev); -- return -ETIMEDOUT; -- } -- -- /* misccfg */ -- ret = vsc85xx_csr_ctrl_phy_write(phydev, PHY_MCB_TARGET, -- PHY_S6G_MISC_CFG, 0); -- if (ret) -- goto err; -- -- phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -- -- deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -- do { -- usleep_range(500, 1000); -- phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, -- 0); /* read 6G MCB into CSRs */ -- reg = vsc85xx_csr_ctrl_phy_read(phydev, PHY_MCB_TARGET, -- PHY_S6G_IB_STATUS0); -- if (reg == 0xffffffff) { -- phy_unlock_mdio_bus(phydev); -- return -EIO; -- } -- -- } while (time_before(jiffies, deadline) && !(reg & BIT(8))); -- -- if (!(reg & BIT(8))) { -- phy_unlock_mdio_bus(phydev); -- return -ETIMEDOUT; -+ if (phy_package_init_once(phydev)) { -+ ret = vsc8514_config_pre_init(phydev); -+ if (ret) -+ goto err; -+ ret = vsc8514_config_host_serdes(phydev); -+ if (ret) -+ goto err; -+ vsc85xx_coma_mode_release(phydev); - } - - phy_unlock_mdio_bus(phydev); -diff --git a/drivers/net/phy/mscc/mscc_serdes.c b/drivers/net/phy/mscc/mscc_serdes.c -new file mode 100644 -index 0000000000000..b3e854f53d675 ---- /dev/null -+++ b/drivers/net/phy/mscc/mscc_serdes.c -@@ -0,0 +1,650 @@ -+// SPDX-License-Identifier: (GPL-2.0 OR MIT) -+/* -+ * Driver for Microsemi VSC85xx PHYs -+ * -+ * Author: Bjarni Jonasson -+ * License: Dual MIT/GPL -+ * Copyright (c) 2021 Microsemi Corporation -+ */ -+ -+#include -+#include "mscc_serdes.h" -+#include "mscc.h" -+ -+static int pll5g_detune(struct phy_device *phydev) -+{ -+ u32 rd_dat; -+ int ret; -+ -+ rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); -+ rd_dat &= ~PHY_S6G_PLL5G_CFG2_GAIN_MASK; -+ rd_dat |= PHY_S6G_PLL5G_CFG2_ENA_GAIN; -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_PLL5G_CFG2, rd_dat); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int pll5g_tune(struct phy_device *phydev) -+{ -+ u32 rd_dat; -+ int ret; -+ -+ rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); -+ rd_dat &= ~PHY_S6G_PLL5G_CFG2_ENA_GAIN; -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_PLL5G_CFG2, rd_dat); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_pll_cfg_wr(struct phy_device *phydev, -+ const u32 pll_ena_offs, -+ const u32 pll_fsm_ctrl_data, -+ const u32 pll_fsm_ena) -+{ -+ int ret; -+ -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_PLL_CFG, -+ (pll_fsm_ena << PHY_S6G_PLL_ENA_OFFS_POS) | -+ (pll_fsm_ctrl_data << PHY_S6G_PLL_FSM_CTRL_DATA_POS) | -+ (pll_ena_offs << PHY_S6G_PLL_FSM_ENA_POS)); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_common_cfg_wr(struct phy_device *phydev, -+ const u32 sys_rst, -+ const u32 ena_lane, -+ const u32 ena_loop, -+ const u32 qrate, -+ const u32 if_mode, -+ const u32 pwd_tx) -+{ -+ /* ena_loop = 8 for eloop */ -+ /* = 4 for floop */ -+ /* = 2 for iloop */ -+ /* = 1 for ploop */ -+ /* qrate = 1 for SGMII, 0 for QSGMII */ -+ /* if_mode = 1 for SGMII, 3 for QSGMII */ -+ -+ int ret; -+ -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_COMMON_CFG, -+ (sys_rst << PHY_S6G_SYS_RST_POS) | -+ (ena_lane << PHY_S6G_ENA_LANE_POS) | -+ (ena_loop << PHY_S6G_ENA_LOOP_POS) | -+ (qrate << PHY_S6G_QRATE_POS) | -+ (if_mode << PHY_S6G_IF_MODE_POS)); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_des_cfg_wr(struct phy_device *phydev, -+ const u32 des_phy_ctrl, -+ const u32 des_mbtr_ctrl, -+ const u32 des_bw_hyst, -+ const u32 des_bw_ana, -+ const u32 des_cpmd_sel) -+{ -+ u32 reg_val; -+ int ret; -+ -+ /* configurable terms */ -+ reg_val = (des_phy_ctrl << PHY_S6G_DES_PHY_CTRL_POS) | -+ (des_mbtr_ctrl << PHY_S6G_DES_MBTR_CTRL_POS) | -+ (des_cpmd_sel << PHY_S6G_DES_CPMD_SEL_POS) | -+ (des_bw_hyst << PHY_S6G_DES_BW_HYST_POS) | -+ (des_bw_ana << PHY_S6G_DES_BW_ANA_POS); -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_DES_CFG, -+ reg_val); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_ib_cfg0_wr(struct phy_device *phydev, -+ const u32 ib_rtrm_adj, -+ const u32 ib_sig_det_clk_sel, -+ const u32 ib_reg_pat_sel_offset, -+ const u32 ib_cal_ena) -+{ -+ u32 base_val; -+ u32 reg_val; -+ int ret; -+ -+ /* constant terms */ -+ base_val = 0x60a85837; -+ /* configurable terms */ -+ reg_val = base_val | (ib_rtrm_adj << 25) | -+ (ib_sig_det_clk_sel << 16) | -+ (ib_reg_pat_sel_offset << 8) | -+ (ib_cal_ena << 3); -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_IB_CFG0, -+ reg_val); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_ib_cfg1_wr(struct phy_device *phydev, -+ const u32 ib_tjtag, -+ const u32 ib_tsdet, -+ const u32 ib_scaly, -+ const u32 ib_frc_offset, -+ const u32 ib_filt_offset) -+{ -+ u32 ib_filt_val; -+ u32 reg_val = 0; -+ int ret; -+ -+ /* constant terms */ -+ ib_filt_val = 0xe0; -+ /* configurable terms */ -+ reg_val = (ib_tjtag << 17) + (ib_tsdet << 12) + (ib_scaly << 8) + -+ ib_filt_val + (ib_filt_offset << 4) + (ib_frc_offset << 0); -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_IB_CFG1, -+ reg_val); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_ib_cfg2_wr(struct phy_device *phydev, -+ const u32 ib_tinfv, -+ const u32 ib_tcalv, -+ const u32 ib_ureg) -+{ -+ u32 ib_cfg2_val; -+ u32 base_val; -+ int ret; -+ -+ /* constant terms */ -+ base_val = 0x0f878010; -+ /* configurable terms */ -+ ib_cfg2_val = base_val | ((ib_tinfv) << 28) | ((ib_tcalv) << 5) | -+ (ib_ureg << 0); -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_IB_CFG2, -+ ib_cfg2_val); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_ib_cfg3_wr(struct phy_device *phydev, -+ const u32 ib_ini_hp, -+ const u32 ib_ini_mid, -+ const u32 ib_ini_lp, -+ const u32 ib_ini_offset) -+{ -+ u32 reg_val; -+ int ret; -+ -+ reg_val = (ib_ini_hp << 24) + (ib_ini_mid << 16) + -+ (ib_ini_lp << 8) + (ib_ini_offset << 0); -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_IB_CFG3, -+ reg_val); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_ib_cfg4_wr(struct phy_device *phydev, -+ const u32 ib_max_hp, -+ const u32 ib_max_mid, -+ const u32 ib_max_lp, -+ const u32 ib_max_offset) -+{ -+ u32 reg_val; -+ int ret; -+ -+ reg_val = (ib_max_hp << 24) + (ib_max_mid << 16) + -+ (ib_max_lp << 8) + (ib_max_offset << 0); -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_IB_CFG4, -+ reg_val); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_misc_cfg_wr(struct phy_device *phydev, -+ const u32 lane_rst) -+{ -+ int ret; -+ -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_MISC_CFG, -+ lane_rst); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_gp_cfg_wr(struct phy_device *phydev, const u32 gp_cfg_val) -+{ -+ int ret; -+ -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_GP_CFG, -+ gp_cfg_val); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_dft_cfg2_wr(struct phy_device *phydev, -+ const u32 rx_ji_ampl, -+ const u32 rx_step_freq, -+ const u32 rx_ji_ena, -+ const u32 rx_waveform_sel, -+ const u32 rx_freqoff_dir, -+ const u32 rx_freqoff_ena) -+{ -+ u32 reg_val; -+ int ret; -+ -+ /* configurable terms */ -+ reg_val = (rx_ji_ampl << 8) | (rx_step_freq << 4) | -+ (rx_ji_ena << 3) | (rx_waveform_sel << 2) | -+ (rx_freqoff_dir << 1) | rx_freqoff_ena; -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_IB_DFT_CFG2, -+ reg_val); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+static int vsc85xx_sd6g_dft_cfg0_wr(struct phy_device *phydev, -+ const u32 prbs_sel, -+ const u32 test_mode, -+ const u32 rx_dft_ena) -+{ -+ u32 reg_val; -+ int ret; -+ -+ /* configurable terms */ -+ reg_val = (prbs_sel << 20) | (test_mode << 16) | (rx_dft_ena << 2); -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_DFT_CFG0, -+ reg_val); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+/* Access LCPLL Cfg_0 */ -+static int vsc85xx_pll5g_cfg0_wr(struct phy_device *phydev, -+ const u32 selbgv820) -+{ -+ u32 base_val; -+ u32 reg_val; -+ int ret; -+ -+ /* constant terms */ -+ base_val = 0x7036f145; -+ /* configurable terms */ -+ reg_val = base_val | (selbgv820 << 23); -+ ret = vsc85xx_csr_write(phydev, MACRO_CTRL, -+ PHY_S6G_PLL5G_CFG0, reg_val); -+ if (ret) -+ dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); -+ return ret; -+} -+ -+int vsc85xx_sd6g_config_v2(struct phy_device *phydev) -+{ -+ u32 ib_sig_det_clk_sel_cal = 0; -+ u32 ib_sig_det_clk_sel_mm = 7; -+ u32 pll_fsm_ctrl_data = 60; -+ unsigned long deadline; -+ u32 des_bw_ana_val = 3; -+ u32 ib_tsdet_cal = 16; -+ u32 ib_tsdet_mm = 5; -+ u32 ib_rtrm_adj; -+ u32 if_mode = 1; -+ u32 gp_iter = 5; -+ u32 val32 = 0; -+ u32 qrate = 1; -+ u32 iter; -+ int val = 0; -+ int ret; -+ -+ phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD); -+ -+ /* Detune/Unlock LCPLL */ -+ ret = pll5g_detune(phydev); -+ if (ret) -+ return ret; -+ -+ /* 0. Reset RCPLL */ -+ ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_common_cfg_wr(phydev, 0, 0, 0, qrate, if_mode, 0); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 0); -+ if (ret) -+ return ret; -+ -+ /* 1. Configure sd6g for SGMII prior to sd6g_IB_CAL */ -+ ib_rtrm_adj = 13; -+ ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_mm, 0, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_mm, 15, 0, 1); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg2_wr(phydev, 3, 13, 5); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg3_wr(phydev, 0, 31, 1, 31); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg4_wr(phydev, 63, 63, 2, 63); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 1); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* 2. Start rcpll_fsm */ -+ ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 1); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -+ do { -+ usleep_range(500, 1000); -+ ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ val32 = vsc85xx_csr_read(phydev, MACRO_CTRL, -+ PHY_S6G_PLL_STATUS); -+ /* wait for bit 12 to clear */ -+ } while (time_before(jiffies, deadline) && (val32 & BIT(12))); -+ -+ if (val32 & BIT(12)) -+ return -ETIMEDOUT; -+ -+ /* 4. Release digital reset and disable transmitter */ -+ ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 1); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* 5. Apply a frequency offset on RX-side (using internal FoJi logic) */ -+ ret = vsc85xx_sd6g_gp_cfg_wr(phydev, 768); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_dft_cfg2_wr(phydev, 0, 2, 0, 0, 0, 1); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_dft_cfg0_wr(phydev, 0, 0, 1); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 2); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* 6. Prepare required settings for IBCAL */ -+ ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_cal, 15, 1, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_cal, 0, 0); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* 7. Start IB_CAL */ -+ ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, -+ ib_sig_det_clk_sel_cal, 0, 1); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ /* 11 cycles (for ViperA) or 5 cycles (for ViperB & Elise) w/ SW clock */ -+ for (iter = 0; iter < gp_iter; iter++) { -+ /* set gp(0) */ -+ ret = vsc85xx_sd6g_gp_cfg_wr(phydev, 769); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ /* clear gp(0) */ -+ ret = vsc85xx_sd6g_gp_cfg_wr(phydev, 768); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ } -+ -+ ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_cal, 15, 1, 1); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_cal, 15, 0, 1); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* 8. Wait for IB cal to complete */ -+ deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -+ do { -+ usleep_range(500, 1000); -+ ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ val32 = vsc85xx_csr_read(phydev, MACRO_CTRL, -+ PHY_S6G_IB_STATUS0); -+ /* wait for bit 8 to set */ -+ } while (time_before(jiffies, deadline) && (~val32 & BIT(8))); -+ -+ if (~val32 & BIT(8)) -+ return -ETIMEDOUT; -+ -+ /* 9. Restore cfg values for mission mode */ -+ ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_mm, 0, 1); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_mm, 15, 0, 1); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* 10. Re-enable transmitter */ -+ ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 0); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* 11. Disable frequency offset generation (using internal FoJi logic) */ -+ ret = vsc85xx_sd6g_dft_cfg2_wr(phydev, 0, 0, 0, 0, 0, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_dft_cfg0_wr(phydev, 0, 0, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 0); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* Tune/Re-lock LCPLL */ -+ ret = pll5g_tune(phydev); -+ if (ret) -+ return ret; -+ -+ /* 12. Configure for Final Configuration and Settings */ -+ /* a. Reset RCPLL */ -+ ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_common_cfg_wr(phydev, 0, 1, 0, qrate, if_mode, 0); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* b. Configure sd6g for desired operating mode */ -+ phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_EXTENDED_GPIO); -+ ret = phy_base_read(phydev, MSCC_PHY_MAC_CFG_FASTLINK); -+ if ((ret & MAC_CFG_MASK) == MAC_CFG_QSGMII) { -+ /* QSGMII */ -+ pll_fsm_ctrl_data = 120; -+ qrate = 0; -+ if_mode = 3; -+ des_bw_ana_val = 5; -+ val = PROC_CMD_MCB_ACCESS_MAC_CONF | PROC_CMD_RST_CONF_PORT | -+ PROC_CMD_READ_MOD_WRITE_PORT | PROC_CMD_QSGMII_MAC; -+ -+ ret = vsc8584_cmd(phydev, val); -+ if (ret) { -+ dev_err(&phydev->mdio.dev, "%s: QSGMII error: %d\n", -+ __func__, ret); -+ return ret; -+ } -+ -+ phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD); -+ } else if ((ret & MAC_CFG_MASK) == MAC_CFG_SGMII) { -+ /* SGMII */ -+ pll_fsm_ctrl_data = 60; -+ qrate = 1; -+ if_mode = 1; -+ des_bw_ana_val = 3; -+ -+ val = PROC_CMD_MCB_ACCESS_MAC_CONF | PROC_CMD_RST_CONF_PORT | -+ PROC_CMD_READ_MOD_WRITE_PORT | PROC_CMD_SGMII_MAC; -+ -+ ret = vsc8584_cmd(phydev, val); -+ if (ret) { -+ dev_err(&phydev->mdio.dev, "%s: SGMII error: %d\n", -+ __func__, ret); -+ return ret; -+ } -+ -+ phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD); -+ } else { -+ dev_err(&phydev->mdio.dev, "%s: invalid mac_if: %x\n", -+ __func__, ret); -+ } -+ -+ ret = phy_update_mcb_s6g(phydev, PHY_S6G_LCPLL_CFG, 0); -+ if (ret) -+ return ret; -+ ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_pll5g_cfg0_wr(phydev, 4); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_S6G_LCPLL_CFG, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_mm, 0, 1); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_mm, 15, 0, 1); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 0); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg2_wr(phydev, 3, 13, 5); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg3_wr(phydev, 0, 31, 1, 31); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_ib_cfg4_wr(phydev, 63, 63, 2, 63); -+ if (ret) -+ return ret; -+ ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 1); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* 13. Start rcpll_fsm */ -+ ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 1); -+ if (ret) -+ return ret; -+ ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ -+ /* 14. Wait for PLL cal to complete */ -+ deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); -+ do { -+ usleep_range(500, 1000); -+ ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+ if (ret) -+ return ret; -+ val32 = vsc85xx_csr_read(phydev, MACRO_CTRL, -+ PHY_S6G_PLL_STATUS); -+ /* wait for bit 12 to clear */ -+ } while (time_before(jiffies, deadline) && (val32 & BIT(12))); -+ -+ if (val32 & BIT(12)) -+ return -ETIMEDOUT; -+ -+ /* release lane reset */ -+ ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 0); -+ if (ret) -+ return ret; -+ -+ return phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0); -+} -diff --git a/drivers/net/phy/mscc/mscc_serdes.h b/drivers/net/phy/mscc/mscc_serdes.h -new file mode 100644 -index 0000000000000..2a6371322af91 ---- /dev/null -+++ b/drivers/net/phy/mscc/mscc_serdes.h -@@ -0,0 +1,31 @@ -+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ -+/* -+ * Driver for Microsemi VSC85xx PHYs -+ * -+ * Copyright (c) 2021 Microsemi Corporation -+ */ -+ -+#ifndef _MSCC_SERDES_PHY_H_ -+#define _MSCC_SERDES_PHY_H_ -+ -+#define PHY_S6G_PLL5G_CFG2_GAIN_MASK GENMASK(9, 5) -+#define PHY_S6G_PLL5G_CFG2_ENA_GAIN 1 -+ -+#define PHY_S6G_DES_PHY_CTRL_POS 13 -+#define PHY_S6G_DES_MBTR_CTRL_POS 10 -+#define PHY_S6G_DES_CPMD_SEL_POS 8 -+#define PHY_S6G_DES_BW_HYST_POS 5 -+#define PHY_S6G_DES_BW_ANA_POS 1 -+#define PHY_S6G_DES_CFG 0x21 -+#define PHY_S6G_IB_CFG0 0x22 -+#define PHY_S6G_IB_CFG1 0x23 -+#define PHY_S6G_IB_CFG2 0x24 -+#define PHY_S6G_IB_CFG3 0x25 -+#define PHY_S6G_IB_CFG4 0x26 -+#define PHY_S6G_GP_CFG 0x2E -+#define PHY_S6G_DFT_CFG0 0x35 -+#define PHY_S6G_IB_DFT_CFG2 0x37 -+ -+int vsc85xx_sd6g_config_v2(struct phy_device *phydev); -+ -+#endif /* _MSCC_PHY_SERDES_H_ */ -diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c -index 80c2e646c0934..71169e7d6177d 100644 ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -300,50 +300,22 @@ static int mdio_bus_phy_resume(struct device *dev) - - phydev->suspended_by_mdio_bus = 0; - -- ret = phy_resume(phydev); -+ ret = phy_init_hw(phydev); - if (ret < 0) - return ret; - --no_resume: -- if (phydev->attached_dev && phydev->adjust_link) -- phy_start_machine(phydev); -- -- return 0; --} -- --static int mdio_bus_phy_restore(struct device *dev) --{ -- struct phy_device *phydev = to_phy_device(dev); -- struct net_device *netdev = phydev->attached_dev; -- int ret; -- -- if (!netdev) -- return 0; -- -- ret = phy_init_hw(phydev); -+ ret = phy_resume(phydev); - if (ret < 0) - return ret; -- -+no_resume: - if (phydev->attached_dev && phydev->adjust_link) - phy_start_machine(phydev); - - return 0; - } - --static const struct dev_pm_ops mdio_bus_phy_pm_ops = { -- .suspend = mdio_bus_phy_suspend, -- .resume = mdio_bus_phy_resume, -- .freeze = mdio_bus_phy_suspend, -- .thaw = mdio_bus_phy_resume, -- .restore = mdio_bus_phy_restore, --}; -- --#define MDIO_BUS_PHY_PM_OPS (&mdio_bus_phy_pm_ops) -- --#else -- --#define MDIO_BUS_PHY_PM_OPS NULL -- -+static SIMPLE_DEV_PM_OPS(mdio_bus_phy_pm_ops, mdio_bus_phy_suspend, -+ mdio_bus_phy_resume); - #endif /* CONFIG_PM */ - - /** -@@ -554,7 +526,7 @@ static const struct device_type mdio_bus_phy_type = { - .name = "PHY", - .groups = phy_dev_groups, - .release = phy_device_release, -- .pm = MDIO_BUS_PHY_PM_OPS, -+ .pm = pm_ptr(&mdio_bus_phy_pm_ops), - }; - - static int phy_request_driver_module(struct phy_device *dev, u32 phy_id) -@@ -1143,10 +1115,19 @@ int phy_init_hw(struct phy_device *phydev) - if (ret < 0) - return ret; - -- if (phydev->drv->config_init) -+ if (phydev->drv->config_init) { - ret = phydev->drv->config_init(phydev); -+ if (ret < 0) -+ return ret; -+ } - -- return ret; -+ if (phydev->drv->config_intr) { -+ ret = phydev->drv->config_intr(phydev); -+ if (ret < 0) -+ return ret; -+ } -+ -+ return 0; - } - EXPORT_SYMBOL(phy_init_hw); - -diff --git a/drivers/net/phy/sfp.c b/drivers/net/phy/sfp.c -index 91d74c1a920ab..f2b5e467a8001 100644 ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -336,19 +336,11 @@ static int sfp_i2c_read(struct sfp *sfp, bool a2, u8 dev_addr, void *buf, - size_t len) - { - struct i2c_msg msgs[2]; -- size_t block_size; -+ u8 bus_addr = a2 ? 0x51 : 0x50; -+ size_t block_size = sfp->i2c_block_size; - size_t this_len; -- u8 bus_addr; - int ret; - -- if (a2) { -- block_size = 16; -- bus_addr = 0x51; -- } else { -- block_size = sfp->i2c_block_size; -- bus_addr = 0x50; -- } -- - msgs[0].addr = bus_addr; - msgs[0].flags = 0; - msgs[0].len = 1; -@@ -1282,6 +1274,20 @@ static void sfp_hwmon_probe(struct work_struct *work) - struct sfp *sfp = container_of(work, struct sfp, hwmon_probe.work); - int err, i; - -+ /* hwmon interface needs to access 16bit registers in atomic way to -+ * guarantee coherency of the diagnostic monitoring data. If it is not -+ * possible to guarantee coherency because EEPROM is broken in such way -+ * that does not support atomic 16bit read operation then we have to -+ * skip registration of hwmon device. -+ */ -+ if (sfp->i2c_block_size < 2) { -+ dev_info(sfp->dev, -+ "skipping hwmon device registration due to broken EEPROM\n"); -+ dev_info(sfp->dev, -+ "diagnostic EEPROM area cannot be read atomically to guarantee data coherency\n"); -+ return; -+ } -+ - err = sfp_read(sfp, true, 0, &sfp->diag, sizeof(sfp->diag)); - if (err < 0) { - if (sfp->hwmon_tries--) { -@@ -1642,26 +1648,30 @@ static int sfp_sm_mod_hpower(struct sfp *sfp, bool enable) - return 0; - } - --/* Some modules (Nokia 3FE46541AA) lock up if byte 0x51 is read as a -- * single read. Switch back to reading 16 byte blocks unless we have -- * a CarlitoxxPro module (rebranded VSOL V2801F). Even more annoyingly, -- * some VSOL V2801F have the vendor name changed to OEM. -+/* GPON modules based on Realtek RTL8672 and RTL9601C chips (e.g. V-SOL -+ * V2801F, CarlitoxxPro CPGOS03-0490, Ubiquiti U-Fiber Instant, ...) do -+ * not support multibyte reads from the EEPROM. Each multi-byte read -+ * operation returns just one byte of EEPROM followed by zeros. There is -+ * no way to identify which modules are using Realtek RTL8672 and RTL9601C -+ * chips. Moreover every OEM of V-SOL V2801F module puts its own vendor -+ * name and vendor id into EEPROM, so there is even no way to detect if -+ * module is V-SOL V2801F. Therefore check for those zeros in the read -+ * data and then based on check switch to reading EEPROM to one byte -+ * at a time. - */ --static int sfp_quirk_i2c_block_size(const struct sfp_eeprom_base *base) -+static bool sfp_id_needs_byte_io(struct sfp *sfp, void *buf, size_t len) - { -- if (!memcmp(base->vendor_name, "VSOL ", 16)) -- return 1; -- if (!memcmp(base->vendor_name, "OEM ", 16) && -- !memcmp(base->vendor_pn, "V2801F ", 16)) -- return 1; -+ size_t i, block_size = sfp->i2c_block_size; - -- /* Some modules can't cope with long reads */ -- return 16; --} -+ /* Already using byte IO */ -+ if (block_size == 1) -+ return false; - --static void sfp_quirks_base(struct sfp *sfp, const struct sfp_eeprom_base *base) --{ -- sfp->i2c_block_size = sfp_quirk_i2c_block_size(base); -+ for (i = 1; i < len; i += block_size) { -+ if (memchr_inv(buf + i, '\0', min(block_size - 1, len - i))) -+ return false; -+ } -+ return true; - } - - static int sfp_cotsworks_fixup_check(struct sfp *sfp, struct sfp_eeprom_id *id) -@@ -1705,11 +1715,11 @@ static int sfp_sm_mod_probe(struct sfp *sfp, bool report) - u8 check; - int ret; - -- /* Some modules (CarlitoxxPro CPGOS03-0490) do not support multibyte -- * reads from the EEPROM, so start by reading the base identifying -- * information one byte at a time. -+ /* Some SFP modules and also some Linux I2C drivers do not like reads -+ * longer than 16 bytes, so read the EEPROM in chunks of 16 bytes at -+ * a time. - */ -- sfp->i2c_block_size = 1; -+ sfp->i2c_block_size = 16; - - ret = sfp_read(sfp, false, 0, &id.base, sizeof(id.base)); - if (ret < 0) { -@@ -1723,6 +1733,33 @@ static int sfp_sm_mod_probe(struct sfp *sfp, bool report) - return -EAGAIN; - } - -+ /* Some SFP modules (e.g. Nokia 3FE46541AA) lock up if read from -+ * address 0x51 is just one byte at a time. Also SFF-8472 requires -+ * that EEPROM supports atomic 16bit read operation for diagnostic -+ * fields, so do not switch to one byte reading at a time unless it -+ * is really required and we have no other option. -+ */ -+ if (sfp_id_needs_byte_io(sfp, &id.base, sizeof(id.base))) { -+ dev_info(sfp->dev, -+ "Detected broken RTL8672/RTL9601C emulated EEPROM\n"); -+ dev_info(sfp->dev, -+ "Switching to reading EEPROM to one byte at a time\n"); -+ sfp->i2c_block_size = 1; -+ -+ ret = sfp_read(sfp, false, 0, &id.base, sizeof(id.base)); -+ if (ret < 0) { -+ if (report) -+ dev_err(sfp->dev, "failed to read EEPROM: %d\n", -+ ret); -+ return -EAGAIN; -+ } -+ -+ if (ret != sizeof(id.base)) { -+ dev_err(sfp->dev, "EEPROM short read: %d\n", ret); -+ return -EAGAIN; -+ } -+ } -+ - /* Cotsworks do not seem to update the checksums when they - * do the final programming with the final module part number, - * serial number and date code. -@@ -1757,9 +1794,6 @@ static int sfp_sm_mod_probe(struct sfp *sfp, bool report) - } - } - -- /* Apply any early module-specific quirks */ -- sfp_quirks_base(sfp, &id.base); -- - ret = sfp_read(sfp, false, SFP_CC_BASE + 1, &id.ext, sizeof(id.ext)); - if (ret < 0) { - if (report) -diff --git a/drivers/net/ppp/ppp_async.c b/drivers/net/ppp/ppp_async.c -index 29a0917a81e60..f14a9d190de91 100644 ---- a/drivers/net/ppp/ppp_async.c -+++ b/drivers/net/ppp/ppp_async.c -@@ -259,7 +259,8 @@ static int ppp_asynctty_hangup(struct tty_struct *tty) - */ - static ssize_t - ppp_asynctty_read(struct tty_struct *tty, struct file *file, -- unsigned char __user *buf, size_t count) -+ unsigned char *buf, size_t count, -+ void **cookie, unsigned long offset) - { - return -EAGAIN; - } -diff --git a/drivers/net/ppp/ppp_synctty.c b/drivers/net/ppp/ppp_synctty.c -index 0f338752c38b9..f774b7e52da44 100644 ---- a/drivers/net/ppp/ppp_synctty.c -+++ b/drivers/net/ppp/ppp_synctty.c -@@ -257,7 +257,8 @@ static int ppp_sync_hangup(struct tty_struct *tty) - */ - static ssize_t - ppp_sync_read(struct tty_struct *tty, struct file *file, -- unsigned char __user *buf, size_t count) -+ unsigned char *buf, size_t count, -+ void **cookie, unsigned long offset) - { - return -EAGAIN; - } -diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c -index a8ad710629e69..0842371eca3d6 100644 ---- a/drivers/net/vxlan.c -+++ b/drivers/net/vxlan.c -@@ -4725,7 +4725,6 @@ static void vxlan_destroy_tunnels(struct net *net, struct list_head *head) - struct vxlan_net *vn = net_generic(net, vxlan_net_id); - struct vxlan_dev *vxlan, *next; - struct net_device *dev, *aux; -- unsigned int h; - - for_each_netdev_safe(net, dev, aux) - if (dev->rtnl_link_ops == &vxlan_link_ops) -@@ -4739,14 +4738,13 @@ static void vxlan_destroy_tunnels(struct net *net, struct list_head *head) - unregister_netdevice_queue(vxlan->dev, head); - } - -- for (h = 0; h < PORT_HASH_SIZE; ++h) -- WARN_ON_ONCE(!hlist_empty(&vn->sock_list[h])); - } - - static void __net_exit vxlan_exit_batch_net(struct list_head *net_list) - { - struct net *net; - LIST_HEAD(list); -+ unsigned int h; - - rtnl_lock(); - list_for_each_entry(net, net_list, exit_list) { -@@ -4759,6 +4757,13 @@ static void __net_exit vxlan_exit_batch_net(struct list_head *net_list) - - unregister_netdevice_many(&list); - rtnl_unlock(); -+ -+ list_for_each_entry(net, net_list, exit_list) { -+ struct vxlan_net *vn = net_generic(net, vxlan_net_id); -+ -+ for (h = 0; h < PORT_HASH_SIZE; ++h) -+ WARN_ON_ONCE(!hlist_empty(&vn->sock_list[h])); -+ } - } - - static struct pernet_operations vxlan_net_ops = { -diff --git a/drivers/net/wireguard/device.c b/drivers/net/wireguard/device.c -index a3ed49cd95c31..b4d84c881c7d0 100644 ---- a/drivers/net/wireguard/device.c -+++ b/drivers/net/wireguard/device.c -@@ -138,7 +138,7 @@ static netdev_tx_t wg_xmit(struct sk_buff *skb, struct net_device *dev) - else if (skb->protocol == htons(ETH_P_IPV6)) - net_dbg_ratelimited("%s: No peer has allowed IPs matching %pI6\n", - dev->name, &ipv6_hdr(skb)->daddr); -- goto err; -+ goto err_icmp; - } - - family = READ_ONCE(peer->endpoint.addr.sa_family); -@@ -201,12 +201,13 @@ static netdev_tx_t wg_xmit(struct sk_buff *skb, struct net_device *dev) - - err_peer: - wg_peer_put(peer); --err: -- ++dev->stats.tx_errors; -+err_icmp: - if (skb->protocol == htons(ETH_P_IP)) - icmp_ndo_send(skb, ICMP_DEST_UNREACH, ICMP_HOST_UNREACH, 0); - else if (skb->protocol == htons(ETH_P_IPV6)) - icmpv6_ndo_send(skb, ICMPV6_DEST_UNREACH, ICMPV6_ADDR_UNREACH, 0); -+err: -+ ++dev->stats.tx_errors; - kfree_skb(skb); - return ret; - } -@@ -234,8 +235,8 @@ static void wg_destruct(struct net_device *dev) - destroy_workqueue(wg->handshake_receive_wq); - destroy_workqueue(wg->handshake_send_wq); - destroy_workqueue(wg->packet_crypt_wq); -- wg_packet_queue_free(&wg->decrypt_queue, true); -- wg_packet_queue_free(&wg->encrypt_queue, true); -+ wg_packet_queue_free(&wg->decrypt_queue); -+ wg_packet_queue_free(&wg->encrypt_queue); - rcu_barrier(); /* Wait for all the peers to be actually freed. */ - wg_ratelimiter_uninit(); - memzero_explicit(&wg->static_identity, sizeof(wg->static_identity)); -@@ -337,12 +338,12 @@ static int wg_newlink(struct net *src_net, struct net_device *dev, - goto err_destroy_handshake_send; - - ret = wg_packet_queue_init(&wg->encrypt_queue, wg_packet_encrypt_worker, -- true, MAX_QUEUED_PACKETS); -+ MAX_QUEUED_PACKETS); - if (ret < 0) - goto err_destroy_packet_crypt; - - ret = wg_packet_queue_init(&wg->decrypt_queue, wg_packet_decrypt_worker, -- true, MAX_QUEUED_PACKETS); -+ MAX_QUEUED_PACKETS); - if (ret < 0) - goto err_free_encrypt_queue; - -@@ -367,9 +368,9 @@ static int wg_newlink(struct net *src_net, struct net_device *dev, - err_uninit_ratelimiter: - wg_ratelimiter_uninit(); - err_free_decrypt_queue: -- wg_packet_queue_free(&wg->decrypt_queue, true); -+ wg_packet_queue_free(&wg->decrypt_queue); - err_free_encrypt_queue: -- wg_packet_queue_free(&wg->encrypt_queue, true); -+ wg_packet_queue_free(&wg->encrypt_queue); - err_destroy_packet_crypt: - destroy_workqueue(wg->packet_crypt_wq); - err_destroy_handshake_send: -diff --git a/drivers/net/wireguard/device.h b/drivers/net/wireguard/device.h -index 4d0144e169478..854bc3d97150e 100644 ---- a/drivers/net/wireguard/device.h -+++ b/drivers/net/wireguard/device.h -@@ -27,13 +27,14 @@ struct multicore_worker { - - struct crypt_queue { - struct ptr_ring ring; -- union { -- struct { -- struct multicore_worker __percpu *worker; -- int last_cpu; -- }; -- struct work_struct work; -- }; -+ struct multicore_worker __percpu *worker; -+ int last_cpu; -+}; -+ -+struct prev_queue { -+ struct sk_buff *head, *tail, *peeked; -+ struct { struct sk_buff *next, *prev; } empty; // Match first 2 members of struct sk_buff. -+ atomic_t count; - }; - - struct wg_device { -diff --git a/drivers/net/wireguard/peer.c b/drivers/net/wireguard/peer.c -index b3b6370e6b959..cd5cb0292cb67 100644 ---- a/drivers/net/wireguard/peer.c -+++ b/drivers/net/wireguard/peer.c -@@ -32,27 +32,22 @@ struct wg_peer *wg_peer_create(struct wg_device *wg, - peer = kzalloc(sizeof(*peer), GFP_KERNEL); - if (unlikely(!peer)) - return ERR_PTR(ret); -- peer->device = wg; -+ if (dst_cache_init(&peer->endpoint_cache, GFP_KERNEL)) -+ goto err; - -+ peer->device = wg; - wg_noise_handshake_init(&peer->handshake, &wg->static_identity, - public_key, preshared_key, peer); -- if (dst_cache_init(&peer->endpoint_cache, GFP_KERNEL)) -- goto err_1; -- if (wg_packet_queue_init(&peer->tx_queue, wg_packet_tx_worker, false, -- MAX_QUEUED_PACKETS)) -- goto err_2; -- if (wg_packet_queue_init(&peer->rx_queue, NULL, false, -- MAX_QUEUED_PACKETS)) -- goto err_3; -- - peer->internal_id = atomic64_inc_return(&peer_counter); - peer->serial_work_cpu = nr_cpumask_bits; - wg_cookie_init(&peer->latest_cookie); - wg_timers_init(peer); - wg_cookie_checker_precompute_peer_keys(peer); - spin_lock_init(&peer->keypairs.keypair_update_lock); -- INIT_WORK(&peer->transmit_handshake_work, -- wg_packet_handshake_send_worker); -+ INIT_WORK(&peer->transmit_handshake_work, wg_packet_handshake_send_worker); -+ INIT_WORK(&peer->transmit_packet_work, wg_packet_tx_worker); -+ wg_prev_queue_init(&peer->tx_queue); -+ wg_prev_queue_init(&peer->rx_queue); - rwlock_init(&peer->endpoint_lock); - kref_init(&peer->refcount); - skb_queue_head_init(&peer->staged_packet_queue); -@@ -68,11 +63,7 @@ struct wg_peer *wg_peer_create(struct wg_device *wg, - pr_debug("%s: Peer %llu created\n", wg->dev->name, peer->internal_id); - return peer; - --err_3: -- wg_packet_queue_free(&peer->tx_queue, false); --err_2: -- dst_cache_destroy(&peer->endpoint_cache); --err_1: -+err: - kfree(peer); - return ERR_PTR(ret); - } -@@ -197,8 +188,7 @@ static void rcu_release(struct rcu_head *rcu) - struct wg_peer *peer = container_of(rcu, struct wg_peer, rcu); - - dst_cache_destroy(&peer->endpoint_cache); -- wg_packet_queue_free(&peer->rx_queue, false); -- wg_packet_queue_free(&peer->tx_queue, false); -+ WARN_ON(wg_prev_queue_peek(&peer->tx_queue) || wg_prev_queue_peek(&peer->rx_queue)); - - /* The final zeroing takes care of clearing any remaining handshake key - * material and other potentially sensitive information. -diff --git a/drivers/net/wireguard/peer.h b/drivers/net/wireguard/peer.h -index 23af409229972..0809cda08bfa4 100644 ---- a/drivers/net/wireguard/peer.h -+++ b/drivers/net/wireguard/peer.h -@@ -36,7 +36,7 @@ struct endpoint { - - struct wg_peer { - struct wg_device *device; -- struct crypt_queue tx_queue, rx_queue; -+ struct prev_queue tx_queue, rx_queue; - struct sk_buff_head staged_packet_queue; - int serial_work_cpu; - struct noise_keypairs keypairs; -@@ -45,7 +45,7 @@ struct wg_peer { - rwlock_t endpoint_lock; - struct noise_handshake handshake; - atomic64_t last_sent_handshake; -- struct work_struct transmit_handshake_work, clear_peer_work; -+ struct work_struct transmit_handshake_work, clear_peer_work, transmit_packet_work; - struct cookie latest_cookie; - struct hlist_node pubkey_hash; - u64 rx_bytes, tx_bytes; -diff --git a/drivers/net/wireguard/queueing.c b/drivers/net/wireguard/queueing.c -index 71b8e80b58e12..48e7b982a3073 100644 ---- a/drivers/net/wireguard/queueing.c -+++ b/drivers/net/wireguard/queueing.c -@@ -9,8 +9,7 @@ struct multicore_worker __percpu * - wg_packet_percpu_multicore_worker_alloc(work_func_t function, void *ptr) - { - int cpu; -- struct multicore_worker __percpu *worker = -- alloc_percpu(struct multicore_worker); -+ struct multicore_worker __percpu *worker = alloc_percpu(struct multicore_worker); - - if (!worker) - return NULL; -@@ -23,7 +22,7 @@ wg_packet_percpu_multicore_worker_alloc(work_func_t function, void *ptr) - } - - int wg_packet_queue_init(struct crypt_queue *queue, work_func_t function, -- bool multicore, unsigned int len) -+ unsigned int len) - { - int ret; - -@@ -31,25 +30,78 @@ int wg_packet_queue_init(struct crypt_queue *queue, work_func_t function, - ret = ptr_ring_init(&queue->ring, len, GFP_KERNEL); - if (ret) - return ret; -- if (function) { -- if (multicore) { -- queue->worker = wg_packet_percpu_multicore_worker_alloc( -- function, queue); -- if (!queue->worker) { -- ptr_ring_cleanup(&queue->ring, NULL); -- return -ENOMEM; -- } -- } else { -- INIT_WORK(&queue->work, function); -- } -+ queue->worker = wg_packet_percpu_multicore_worker_alloc(function, queue); -+ if (!queue->worker) { -+ ptr_ring_cleanup(&queue->ring, NULL); -+ return -ENOMEM; - } - return 0; - } - --void wg_packet_queue_free(struct crypt_queue *queue, bool multicore) -+void wg_packet_queue_free(struct crypt_queue *queue) - { -- if (multicore) -- free_percpu(queue->worker); -+ free_percpu(queue->worker); - WARN_ON(!__ptr_ring_empty(&queue->ring)); - ptr_ring_cleanup(&queue->ring, NULL); - } -+ -+#define NEXT(skb) ((skb)->prev) -+#define STUB(queue) ((struct sk_buff *)&queue->empty) -+ -+void wg_prev_queue_init(struct prev_queue *queue) -+{ -+ NEXT(STUB(queue)) = NULL; -+ queue->head = queue->tail = STUB(queue); -+ queue->peeked = NULL; -+ atomic_set(&queue->count, 0); -+ BUILD_BUG_ON( -+ offsetof(struct sk_buff, next) != offsetof(struct prev_queue, empty.next) - -+ offsetof(struct prev_queue, empty) || -+ offsetof(struct sk_buff, prev) != offsetof(struct prev_queue, empty.prev) - -+ offsetof(struct prev_queue, empty)); -+} -+ -+static void __wg_prev_queue_enqueue(struct prev_queue *queue, struct sk_buff *skb) -+{ -+ WRITE_ONCE(NEXT(skb), NULL); -+ WRITE_ONCE(NEXT(xchg_release(&queue->head, skb)), skb); -+} -+ -+bool wg_prev_queue_enqueue(struct prev_queue *queue, struct sk_buff *skb) -+{ -+ if (!atomic_add_unless(&queue->count, 1, MAX_QUEUED_PACKETS)) -+ return false; -+ __wg_prev_queue_enqueue(queue, skb); -+ return true; -+} -+ -+struct sk_buff *wg_prev_queue_dequeue(struct prev_queue *queue) -+{ -+ struct sk_buff *tail = queue->tail, *next = smp_load_acquire(&NEXT(tail)); -+ -+ if (tail == STUB(queue)) { -+ if (!next) -+ return NULL; -+ queue->tail = next; -+ tail = next; -+ next = smp_load_acquire(&NEXT(next)); -+ } -+ if (next) { -+ queue->tail = next; -+ atomic_dec(&queue->count); -+ return tail; -+ } -+ if (tail != READ_ONCE(queue->head)) -+ return NULL; -+ __wg_prev_queue_enqueue(queue, STUB(queue)); -+ next = smp_load_acquire(&NEXT(tail)); -+ if (next) { -+ queue->tail = next; -+ atomic_dec(&queue->count); -+ return tail; -+ } -+ return NULL; -+} -+ -+#undef NEXT -+#undef STUB -diff --git a/drivers/net/wireguard/queueing.h b/drivers/net/wireguard/queueing.h -index dfb674e030764..4ef2944a68bc9 100644 ---- a/drivers/net/wireguard/queueing.h -+++ b/drivers/net/wireguard/queueing.h -@@ -17,12 +17,13 @@ struct wg_device; - struct wg_peer; - struct multicore_worker; - struct crypt_queue; -+struct prev_queue; - struct sk_buff; - - /* queueing.c APIs: */ - int wg_packet_queue_init(struct crypt_queue *queue, work_func_t function, -- bool multicore, unsigned int len); --void wg_packet_queue_free(struct crypt_queue *queue, bool multicore); -+ unsigned int len); -+void wg_packet_queue_free(struct crypt_queue *queue); - struct multicore_worker __percpu * - wg_packet_percpu_multicore_worker_alloc(work_func_t function, void *ptr); - -@@ -135,8 +136,31 @@ static inline int wg_cpumask_next_online(int *next) - return cpu; - } - -+void wg_prev_queue_init(struct prev_queue *queue); -+ -+/* Multi producer */ -+bool wg_prev_queue_enqueue(struct prev_queue *queue, struct sk_buff *skb); -+ -+/* Single consumer */ -+struct sk_buff *wg_prev_queue_dequeue(struct prev_queue *queue); -+ -+/* Single consumer */ -+static inline struct sk_buff *wg_prev_queue_peek(struct prev_queue *queue) -+{ -+ if (queue->peeked) -+ return queue->peeked; -+ queue->peeked = wg_prev_queue_dequeue(queue); -+ return queue->peeked; -+} -+ -+/* Single consumer */ -+static inline void wg_prev_queue_drop_peeked(struct prev_queue *queue) -+{ -+ queue->peeked = NULL; -+} -+ - static inline int wg_queue_enqueue_per_device_and_peer( -- struct crypt_queue *device_queue, struct crypt_queue *peer_queue, -+ struct crypt_queue *device_queue, struct prev_queue *peer_queue, - struct sk_buff *skb, struct workqueue_struct *wq, int *next_cpu) - { - int cpu; -@@ -145,8 +169,9 @@ static inline int wg_queue_enqueue_per_device_and_peer( - /* We first queue this up for the peer ingestion, but the consumer - * will wait for the state to change to CRYPTED or DEAD before. - */ -- if (unlikely(ptr_ring_produce_bh(&peer_queue->ring, skb))) -+ if (unlikely(!wg_prev_queue_enqueue(peer_queue, skb))) - return -ENOSPC; -+ - /* Then we queue it up in the device queue, which consumes the - * packet as soon as it can. - */ -@@ -157,9 +182,7 @@ static inline int wg_queue_enqueue_per_device_and_peer( - return 0; - } - --static inline void wg_queue_enqueue_per_peer(struct crypt_queue *queue, -- struct sk_buff *skb, -- enum packet_state state) -+static inline void wg_queue_enqueue_per_peer_tx(struct sk_buff *skb, enum packet_state state) - { - /* We take a reference, because as soon as we call atomic_set, the - * peer can be freed from below us. -@@ -167,14 +190,12 @@ static inline void wg_queue_enqueue_per_peer(struct crypt_queue *queue, - struct wg_peer *peer = wg_peer_get(PACKET_PEER(skb)); - - atomic_set_release(&PACKET_CB(skb)->state, state); -- queue_work_on(wg_cpumask_choose_online(&peer->serial_work_cpu, -- peer->internal_id), -- peer->device->packet_crypt_wq, &queue->work); -+ queue_work_on(wg_cpumask_choose_online(&peer->serial_work_cpu, peer->internal_id), -+ peer->device->packet_crypt_wq, &peer->transmit_packet_work); - wg_peer_put(peer); - } - --static inline void wg_queue_enqueue_per_peer_napi(struct sk_buff *skb, -- enum packet_state state) -+static inline void wg_queue_enqueue_per_peer_rx(struct sk_buff *skb, enum packet_state state) - { - /* We take a reference, because as soon as we call atomic_set, the - * peer can be freed from below us. -diff --git a/drivers/net/wireguard/receive.c b/drivers/net/wireguard/receive.c -index 2c9551ea6dc73..7dc84bcca2613 100644 ---- a/drivers/net/wireguard/receive.c -+++ b/drivers/net/wireguard/receive.c -@@ -444,7 +444,6 @@ packet_processed: - int wg_packet_rx_poll(struct napi_struct *napi, int budget) - { - struct wg_peer *peer = container_of(napi, struct wg_peer, napi); -- struct crypt_queue *queue = &peer->rx_queue; - struct noise_keypair *keypair; - struct endpoint endpoint; - enum packet_state state; -@@ -455,11 +454,10 @@ int wg_packet_rx_poll(struct napi_struct *napi, int budget) - if (unlikely(budget <= 0)) - return 0; - -- while ((skb = __ptr_ring_peek(&queue->ring)) != NULL && -+ while ((skb = wg_prev_queue_peek(&peer->rx_queue)) != NULL && - (state = atomic_read_acquire(&PACKET_CB(skb)->state)) != - PACKET_STATE_UNCRYPTED) { -- __ptr_ring_discard_one(&queue->ring); -- peer = PACKET_PEER(skb); -+ wg_prev_queue_drop_peeked(&peer->rx_queue); - keypair = PACKET_CB(skb)->keypair; - free = true; - -@@ -508,7 +506,7 @@ void wg_packet_decrypt_worker(struct work_struct *work) - enum packet_state state = - likely(decrypt_packet(skb, PACKET_CB(skb)->keypair)) ? - PACKET_STATE_CRYPTED : PACKET_STATE_DEAD; -- wg_queue_enqueue_per_peer_napi(skb, state); -+ wg_queue_enqueue_per_peer_rx(skb, state); - if (need_resched()) - cond_resched(); - } -@@ -531,12 +529,10 @@ static void wg_packet_consume_data(struct wg_device *wg, struct sk_buff *skb) - if (unlikely(READ_ONCE(peer->is_dead))) - goto err; - -- ret = wg_queue_enqueue_per_device_and_peer(&wg->decrypt_queue, -- &peer->rx_queue, skb, -- wg->packet_crypt_wq, -- &wg->decrypt_queue.last_cpu); -+ ret = wg_queue_enqueue_per_device_and_peer(&wg->decrypt_queue, &peer->rx_queue, skb, -+ wg->packet_crypt_wq, &wg->decrypt_queue.last_cpu); - if (unlikely(ret == -EPIPE)) -- wg_queue_enqueue_per_peer_napi(skb, PACKET_STATE_DEAD); -+ wg_queue_enqueue_per_peer_rx(skb, PACKET_STATE_DEAD); - if (likely(!ret || ret == -EPIPE)) { - rcu_read_unlock_bh(); - return; -diff --git a/drivers/net/wireguard/send.c b/drivers/net/wireguard/send.c -index f74b9341ab0fe..5368f7c35b4bf 100644 ---- a/drivers/net/wireguard/send.c -+++ b/drivers/net/wireguard/send.c -@@ -239,8 +239,7 @@ void wg_packet_send_keepalive(struct wg_peer *peer) - wg_packet_send_staged_packets(peer); - } - --static void wg_packet_create_data_done(struct sk_buff *first, -- struct wg_peer *peer) -+static void wg_packet_create_data_done(struct wg_peer *peer, struct sk_buff *first) - { - struct sk_buff *skb, *next; - bool is_keepalive, data_sent = false; -@@ -262,22 +261,19 @@ static void wg_packet_create_data_done(struct sk_buff *first, - - void wg_packet_tx_worker(struct work_struct *work) - { -- struct crypt_queue *queue = container_of(work, struct crypt_queue, -- work); -+ struct wg_peer *peer = container_of(work, struct wg_peer, transmit_packet_work); - struct noise_keypair *keypair; - enum packet_state state; - struct sk_buff *first; -- struct wg_peer *peer; - -- while ((first = __ptr_ring_peek(&queue->ring)) != NULL && -+ while ((first = wg_prev_queue_peek(&peer->tx_queue)) != NULL && - (state = atomic_read_acquire(&PACKET_CB(first)->state)) != - PACKET_STATE_UNCRYPTED) { -- __ptr_ring_discard_one(&queue->ring); -- peer = PACKET_PEER(first); -+ wg_prev_queue_drop_peeked(&peer->tx_queue); - keypair = PACKET_CB(first)->keypair; - - if (likely(state == PACKET_STATE_CRYPTED)) -- wg_packet_create_data_done(first, peer); -+ wg_packet_create_data_done(peer, first); - else - kfree_skb_list(first); - -@@ -306,16 +302,14 @@ void wg_packet_encrypt_worker(struct work_struct *work) - break; - } - } -- wg_queue_enqueue_per_peer(&PACKET_PEER(first)->tx_queue, first, -- state); -+ wg_queue_enqueue_per_peer_tx(first, state); - if (need_resched()) - cond_resched(); - } - } - --static void wg_packet_create_data(struct sk_buff *first) -+static void wg_packet_create_data(struct wg_peer *peer, struct sk_buff *first) - { -- struct wg_peer *peer = PACKET_PEER(first); - struct wg_device *wg = peer->device; - int ret = -EINVAL; - -@@ -323,13 +317,10 @@ static void wg_packet_create_data(struct sk_buff *first) - if (unlikely(READ_ONCE(peer->is_dead))) - goto err; - -- ret = wg_queue_enqueue_per_device_and_peer(&wg->encrypt_queue, -- &peer->tx_queue, first, -- wg->packet_crypt_wq, -- &wg->encrypt_queue.last_cpu); -+ ret = wg_queue_enqueue_per_device_and_peer(&wg->encrypt_queue, &peer->tx_queue, first, -+ wg->packet_crypt_wq, &wg->encrypt_queue.last_cpu); - if (unlikely(ret == -EPIPE)) -- wg_queue_enqueue_per_peer(&peer->tx_queue, first, -- PACKET_STATE_DEAD); -+ wg_queue_enqueue_per_peer_tx(first, PACKET_STATE_DEAD); - err: - rcu_read_unlock_bh(); - if (likely(!ret || ret == -EPIPE)) -@@ -393,7 +384,7 @@ void wg_packet_send_staged_packets(struct wg_peer *peer) - packets.prev->next = NULL; - wg_peer_get(keypair->entry.peer); - PACKET_CB(packets.next)->keypair = keypair; -- wg_packet_create_data(packets.next); -+ wg_packet_create_data(peer, packets.next); - return; - - out_invalid: -diff --git a/drivers/net/wireless/ath/ath10k/mac.c b/drivers/net/wireless/ath/ath10k/mac.c -index 7d98250380ec5..e815aab412d7a 100644 ---- a/drivers/net/wireless/ath/ath10k/mac.c -+++ b/drivers/net/wireless/ath/ath10k/mac.c -@@ -9117,7 +9117,9 @@ static void ath10k_sta_statistics(struct ieee80211_hw *hw, - if (!ath10k_peer_stats_enabled(ar)) - return; - -+ mutex_lock(&ar->conf_mutex); - ath10k_debug_fw_stats_request(ar); -+ mutex_unlock(&ar->conf_mutex); - - sinfo->rx_duration = arsta->rx_duration; - sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_DURATION); -diff --git a/drivers/net/wireless/ath/ath10k/snoc.c b/drivers/net/wireless/ath/ath10k/snoc.c -index bf9a8cb713dc0..1c3307e3b1085 100644 ---- a/drivers/net/wireless/ath/ath10k/snoc.c -+++ b/drivers/net/wireless/ath/ath10k/snoc.c -@@ -1045,12 +1045,13 @@ static int ath10k_snoc_hif_power_up(struct ath10k *ar, - ret = ath10k_snoc_init_pipes(ar); - if (ret) { - ath10k_err(ar, "failed to initialize CE: %d\n", ret); -- goto err_wlan_enable; -+ goto err_free_rri; - } - - return 0; - --err_wlan_enable: -+err_free_rri: -+ ath10k_ce_free_rri(ar); - ath10k_snoc_wlan_disable(ar); - - return ret; -diff --git a/drivers/net/wireless/ath/ath10k/wmi-tlv.c b/drivers/net/wireless/ath/ath10k/wmi-tlv.c -index 7b5834157fe51..e6135795719a1 100644 ---- a/drivers/net/wireless/ath/ath10k/wmi-tlv.c -+++ b/drivers/net/wireless/ath/ath10k/wmi-tlv.c -@@ -240,8 +240,10 @@ static int ath10k_wmi_tlv_parse_peer_stats_info(struct ath10k *ar, u16 tag, u16 - __le32_to_cpu(stat->last_tx_rate_code), - __le32_to_cpu(stat->last_tx_bitrate_kbps)); - -+ rcu_read_lock(); - sta = ieee80211_find_sta_by_ifaddr(ar->hw, stat->peer_macaddr.addr, NULL); - if (!sta) { -+ rcu_read_unlock(); - ath10k_warn(ar, "not found station for peer stats\n"); - return -EINVAL; - } -@@ -251,6 +253,7 @@ static int ath10k_wmi_tlv_parse_peer_stats_info(struct ath10k *ar, u16 tag, u16 - arsta->rx_bitrate_kbps = __le32_to_cpu(stat->last_rx_bitrate_kbps); - arsta->tx_rate_code = __le32_to_cpu(stat->last_tx_rate_code); - arsta->tx_bitrate_kbps = __le32_to_cpu(stat->last_tx_bitrate_kbps); -+ rcu_read_unlock(); - - return 0; - } -diff --git a/drivers/net/wireless/ath/ath11k/mac.c b/drivers/net/wireless/ath/ath11k/mac.c -index c1608f64ea95d..7d799fe6fbd89 100644 ---- a/drivers/net/wireless/ath/ath11k/mac.c -+++ b/drivers/net/wireless/ath/ath11k/mac.c -@@ -4248,11 +4248,6 @@ static int ath11k_mac_op_start(struct ieee80211_hw *hw) - /* Configure the hash seed for hash based reo dest ring selection */ - ath11k_wmi_pdev_lro_cfg(ar, ar->pdev->pdev_id); - -- mutex_unlock(&ar->conf_mutex); -- -- rcu_assign_pointer(ab->pdevs_active[ar->pdev_idx], -- &ab->pdevs[ar->pdev_idx]); -- - /* allow device to enter IMPS */ - if (ab->hw_params.idle_ps) { - ret = ath11k_wmi_pdev_set_param(ar, WMI_PDEV_PARAM_IDLE_PS_CONFIG, -@@ -4262,6 +4257,12 @@ static int ath11k_mac_op_start(struct ieee80211_hw *hw) - goto err; - } - } -+ -+ mutex_unlock(&ar->conf_mutex); -+ -+ rcu_assign_pointer(ab->pdevs_active[ar->pdev_idx], -+ &ab->pdevs[ar->pdev_idx]); -+ - return 0; - - err: -diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c -index 017a43bc400ca..4c81b1d7f4171 100644 ---- a/drivers/net/wireless/ath/ath9k/debug.c -+++ b/drivers/net/wireless/ath/ath9k/debug.c -@@ -1223,8 +1223,11 @@ static ssize_t write_file_nf_override(struct file *file, - - ah->nf_override = val; - -- if (ah->curchan) -+ if (ah->curchan) { -+ ath9k_ps_wakeup(sc); - ath9k_hw_loadnf(ah, ah->curchan); -+ ath9k_ps_restore(sc); -+ } - - return count; - } -diff --git a/drivers/net/wireless/broadcom/b43/phy_n.c b/drivers/net/wireless/broadcom/b43/phy_n.c -index b669dff24b6e0..665b737fbb0d8 100644 ---- a/drivers/net/wireless/broadcom/b43/phy_n.c -+++ b/drivers/net/wireless/broadcom/b43/phy_n.c -@@ -5311,7 +5311,7 @@ static void b43_nphy_restore_cal(struct b43_wldev *dev) - - for (i = 0; i < 4; i++) { - if (dev->phy.rev >= 3) -- table[i] = coef[i]; -+ coef[i] = table[i]; - else - coef[i] = 0; - } -diff --git a/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c b/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c -index 895a907acdf0f..37ce4fe136c5e 100644 ---- a/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c -+++ b/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c -@@ -198,14 +198,14 @@ static int iwl_pnvm_parse(struct iwl_trans *trans, const u8 *data, - le32_to_cpu(sku_id->data[1]), - le32_to_cpu(sku_id->data[2])); - -+ data += sizeof(*tlv) + ALIGN(tlv_len, 4); -+ len -= ALIGN(tlv_len, 4); -+ - if (trans->sku_id[0] == le32_to_cpu(sku_id->data[0]) && - trans->sku_id[1] == le32_to_cpu(sku_id->data[1]) && - trans->sku_id[2] == le32_to_cpu(sku_id->data[2])) { - int ret; - -- data += sizeof(*tlv) + ALIGN(tlv_len, 4); -- len -= ALIGN(tlv_len, 4); -- - ret = iwl_pnvm_handle_section(trans, data, len); - if (!ret) - return 0; -@@ -227,6 +227,7 @@ int iwl_pnvm_load(struct iwl_trans *trans, - struct iwl_notification_wait pnvm_wait; - static const u16 ntf_cmds[] = { WIDE_ID(REGULATORY_AND_NVM_GROUP, - PNVM_INIT_COMPLETE_NTFY) }; -+ int ret; - - /* if the SKU_ID is empty, there's nothing to do */ - if (!trans->sku_id[0] && !trans->sku_id[1] && !trans->sku_id[2]) -@@ -236,7 +237,6 @@ int iwl_pnvm_load(struct iwl_trans *trans, - if (!trans->pnvm_loaded) { - const struct firmware *pnvm; - char pnvm_name[64]; -- int ret; - - /* - * The prefix unfortunately includes a hyphen at the end, so -@@ -264,6 +264,11 @@ int iwl_pnvm_load(struct iwl_trans *trans, - - release_firmware(pnvm); - } -+ } else { -+ /* if we already loaded, we need to set it again */ -+ ret = iwl_trans_set_pnvm(trans, NULL, 0); -+ if (ret) -+ return ret; - } - - iwl_init_notification_wait(notif_wait, &pnvm_wait, -diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/fw.c b/drivers/net/wireless/intel/iwlwifi/mvm/fw.c -index 313e9f106f465..4c5609cdcbdee 100644 ---- a/drivers/net/wireless/intel/iwlwifi/mvm/fw.c -+++ b/drivers/net/wireless/intel/iwlwifi/mvm/fw.c -@@ -859,12 +859,10 @@ static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) - if (cmd_ver == 3) { - len = sizeof(cmd.v3); - n_bands = ARRAY_SIZE(cmd.v3.table[0]); -- cmd.v3.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); - } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, - IWL_UCODE_TLV_API_SAR_TABLE_VER)) { - len = sizeof(cmd.v2); - n_bands = ARRAY_SIZE(cmd.v2.table[0]); -- cmd.v2.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); - } else { - len = sizeof(cmd.v1); - n_bands = ARRAY_SIZE(cmd.v1.table[0]); -@@ -884,6 +882,16 @@ static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) - if (ret) - return 0; - -+ /* -+ * Set the revision on versions that contain it. -+ * This must be done after calling iwl_sar_geo_init(). -+ */ -+ if (cmd_ver == 3) -+ cmd.v3.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); -+ else if (fw_has_api(&mvm->fwrt.fw->ucode_capa, -+ IWL_UCODE_TLV_API_SAR_TABLE_VER)) -+ cmd.v2.table_revision = cpu_to_le32(mvm->fwrt.geo_rev); -+ - return iwl_mvm_send_cmd_pdu(mvm, - WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT), - 0, len, &cmd); -@@ -892,7 +900,6 @@ static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) - static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm) - { - union acpi_object *wifi_pkg, *data, *enabled; -- union iwl_ppag_table_cmd ppag_table; - int i, j, ret, tbl_rev, num_sub_bands; - int idx = 2; - s8 *gain; -@@ -946,8 +953,8 @@ read_table: - goto out_free; - } - -- ppag_table.v1.enabled = cpu_to_le32(enabled->integer.value); -- if (!ppag_table.v1.enabled) { -+ mvm->fwrt.ppag_table.v1.enabled = cpu_to_le32(enabled->integer.value); -+ if (!mvm->fwrt.ppag_table.v1.enabled) { - ret = 0; - goto out_free; - } -@@ -962,16 +969,23 @@ read_table: - union acpi_object *ent; - - ent = &wifi_pkg->package.elements[idx++]; -- if (ent->type != ACPI_TYPE_INTEGER || -- (j == 0 && ent->integer.value > ACPI_PPAG_MAX_LB) || -- (j == 0 && ent->integer.value < ACPI_PPAG_MIN_LB) || -- (j != 0 && ent->integer.value > ACPI_PPAG_MAX_HB) || -- (j != 0 && ent->integer.value < ACPI_PPAG_MIN_HB)) { -- ppag_table.v1.enabled = cpu_to_le32(0); -+ if (ent->type != ACPI_TYPE_INTEGER) { - ret = -EINVAL; - goto out_free; - } -+ - gain[i * num_sub_bands + j] = ent->integer.value; -+ -+ if ((j == 0 && -+ (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_LB || -+ gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_LB)) || -+ (j != 0 && -+ (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_HB || -+ gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_HB))) { -+ mvm->fwrt.ppag_table.v1.enabled = cpu_to_le32(0); -+ ret = -EINVAL; -+ goto out_free; -+ } - } - } - ret = 0; -@@ -984,7 +998,6 @@ int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) - { - u8 cmd_ver; - int i, j, ret, num_sub_bands, cmd_size; -- union iwl_ppag_table_cmd ppag_table; - s8 *gain; - - if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) { -@@ -1003,7 +1016,7 @@ int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) - if (cmd_ver == 1) { - num_sub_bands = IWL_NUM_SUB_BANDS; - gain = mvm->fwrt.ppag_table.v1.gain[0]; -- cmd_size = sizeof(ppag_table.v1); -+ cmd_size = sizeof(mvm->fwrt.ppag_table.v1); - if (mvm->fwrt.ppag_ver == 2) { - IWL_DEBUG_RADIO(mvm, - "PPAG table is v2 but FW supports v1, sending truncated table\n"); -@@ -1011,7 +1024,7 @@ int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) - } else if (cmd_ver == 2) { - num_sub_bands = IWL_NUM_SUB_BANDS_V2; - gain = mvm->fwrt.ppag_table.v2.gain[0]; -- cmd_size = sizeof(ppag_table.v2); -+ cmd_size = sizeof(mvm->fwrt.ppag_table.v2); - if (mvm->fwrt.ppag_ver == 1) { - IWL_DEBUG_RADIO(mvm, - "PPAG table is v1 but FW supports v2, sending padded table\n"); -@@ -1031,7 +1044,7 @@ int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) - IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); - ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, - PER_PLATFORM_ANT_GAIN_CMD), -- 0, cmd_size, &ppag_table); -+ 0, cmd_size, &mvm->fwrt.ppag_table); - if (ret < 0) - IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n", - ret); -diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c b/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c -index 4e1bdf13e5e71..0b012f8c9eb22 100644 ---- a/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c -+++ b/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c -@@ -999,9 +999,6 @@ void iwl_mvm_remove_csa_period(struct iwl_mvm *mvm, - - lockdep_assert_held(&mvm->mutex); - -- if (!te_data->running) -- return; -- - spin_lock_bh(&mvm->time_event_lock); - id = te_data->id; - spin_unlock_bh(&mvm->time_event_lock); -diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c b/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c -index 5b5134dd49af8..8fba190e84cf3 100644 ---- a/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c -+++ b/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c -@@ -298,17 +298,20 @@ int iwl_trans_pcie_ctx_info_gen3_set_pnvm(struct iwl_trans *trans, - if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) - return 0; - -- ret = iwl_pcie_ctxt_info_alloc_dma(trans, data, len, -- &trans_pcie->pnvm_dram); -- if (ret < 0) { -- IWL_DEBUG_FW(trans, "Failed to allocate PNVM DMA %d.\n", -- ret); -- return ret; -+ /* only allocate the DRAM if not allocated yet */ -+ if (!trans->pnvm_loaded) { -+ if (WARN_ON(prph_sc_ctrl->pnvm_cfg.pnvm_size)) -+ return -EBUSY; -+ -+ ret = iwl_pcie_ctxt_info_alloc_dma(trans, data, len, -+ &trans_pcie->pnvm_dram); -+ if (ret < 0) { -+ IWL_DEBUG_FW(trans, "Failed to allocate PNVM DMA %d.\n", -+ ret); -+ return ret; -+ } - } - -- if (WARN_ON(prph_sc_ctrl->pnvm_cfg.pnvm_size)) -- return -EBUSY; -- - prph_sc_ctrl->pnvm_cfg.pnvm_base_addr = - cpu_to_le64(trans_pcie->pnvm_dram.physical); - prph_sc_ctrl->pnvm_cfg.pnvm_size = -diff --git a/drivers/net/xen-netback/interface.c b/drivers/net/xen-netback/interface.c -index acb786d8b1d8f..e02a4fbb74de5 100644 ---- a/drivers/net/xen-netback/interface.c -+++ b/drivers/net/xen-netback/interface.c -@@ -162,13 +162,15 @@ irqreturn_t xenvif_interrupt(int irq, void *dev_id) - { - struct xenvif_queue *queue = dev_id; - int old; -+ bool has_rx, has_tx; - - old = atomic_fetch_or(NETBK_COMMON_EOI, &queue->eoi_pending); - WARN(old, "Interrupt while EOI pending\n"); - -- /* Use bitwise or as we need to call both functions. */ -- if ((!xenvif_handle_tx_interrupt(queue) | -- !xenvif_handle_rx_interrupt(queue))) { -+ has_tx = xenvif_handle_tx_interrupt(queue); -+ has_rx = xenvif_handle_rx_interrupt(queue); -+ -+ if (!has_rx && !has_tx) { - atomic_andnot(NETBK_COMMON_EOI, &queue->eoi_pending); - xen_irq_lateeoi(irq, XEN_EOI_FLAG_SPURIOUS); - } -diff --git a/drivers/nvme/host/multipath.c b/drivers/nvme/host/multipath.c -index 282b7a4ea9a9a..fdfc18a222cc3 100644 ---- a/drivers/nvme/host/multipath.c -+++ b/drivers/nvme/host/multipath.c -@@ -677,6 +677,10 @@ void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id) - if (blk_queue_stable_writes(ns->queue) && ns->head->disk) - blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, - ns->head->disk->queue); -+#ifdef CONFIG_BLK_DEV_ZONED -+ if (blk_queue_is_zoned(ns->queue) && ns->head->disk) -+ ns->head->disk->queue->nr_zones = ns->queue->nr_zones; -+#endif - } - - void nvme_mpath_remove_disk(struct nvme_ns_head *head) -diff --git a/drivers/nvme/target/admin-cmd.c b/drivers/nvme/target/admin-cmd.c -index dc1ea468b182b..1827d8d8f3b00 100644 ---- a/drivers/nvme/target/admin-cmd.c -+++ b/drivers/nvme/target/admin-cmd.c -@@ -469,7 +469,6 @@ out: - static void nvmet_execute_identify_ns(struct nvmet_req *req) - { - struct nvmet_ctrl *ctrl = req->sq->ctrl; -- struct nvmet_ns *ns; - struct nvme_id_ns *id; - u16 status = 0; - -@@ -486,20 +485,21 @@ static void nvmet_execute_identify_ns(struct nvmet_req *req) - } - - /* return an all zeroed buffer if we can't find an active namespace */ -- ns = nvmet_find_namespace(ctrl, req->cmd->identify.nsid); -- if (!ns) { -- status = NVME_SC_INVALID_NS; -+ req->ns = nvmet_find_namespace(ctrl, req->cmd->identify.nsid); -+ if (!req->ns) { -+ status = 0; - goto done; - } - -- nvmet_ns_revalidate(ns); -+ nvmet_ns_revalidate(req->ns); - - /* - * nuse = ncap = nsze isn't always true, but we have no way to find - * that out from the underlying device. - */ -- id->ncap = id->nsze = cpu_to_le64(ns->size >> ns->blksize_shift); -- switch (req->port->ana_state[ns->anagrpid]) { -+ id->ncap = id->nsze = -+ cpu_to_le64(req->ns->size >> req->ns->blksize_shift); -+ switch (req->port->ana_state[req->ns->anagrpid]) { - case NVME_ANA_INACCESSIBLE: - case NVME_ANA_PERSISTENT_LOSS: - break; -@@ -508,8 +508,8 @@ static void nvmet_execute_identify_ns(struct nvmet_req *req) - break; - } - -- if (ns->bdev) -- nvmet_bdev_set_limits(ns->bdev, id); -+ if (req->ns->bdev) -+ nvmet_bdev_set_limits(req->ns->bdev, id); - - /* - * We just provide a single LBA format that matches what the -@@ -523,25 +523,24 @@ static void nvmet_execute_identify_ns(struct nvmet_req *req) - * controllers, but also with any other user of the block device. - */ - id->nmic = (1 << 0); -- id->anagrpid = cpu_to_le32(ns->anagrpid); -+ id->anagrpid = cpu_to_le32(req->ns->anagrpid); - -- memcpy(&id->nguid, &ns->nguid, sizeof(id->nguid)); -+ memcpy(&id->nguid, &req->ns->nguid, sizeof(id->nguid)); - -- id->lbaf[0].ds = ns->blksize_shift; -+ id->lbaf[0].ds = req->ns->blksize_shift; - -- if (ctrl->pi_support && nvmet_ns_has_pi(ns)) { -+ if (ctrl->pi_support && nvmet_ns_has_pi(req->ns)) { - id->dpc = NVME_NS_DPC_PI_FIRST | NVME_NS_DPC_PI_LAST | - NVME_NS_DPC_PI_TYPE1 | NVME_NS_DPC_PI_TYPE2 | - NVME_NS_DPC_PI_TYPE3; - id->mc = NVME_MC_EXTENDED_LBA; -- id->dps = ns->pi_type; -+ id->dps = req->ns->pi_type; - id->flbas = NVME_NS_FLBAS_META_EXT; -- id->lbaf[0].ms = cpu_to_le16(ns->metadata_size); -+ id->lbaf[0].ms = cpu_to_le16(req->ns->metadata_size); - } - -- if (ns->readonly) -+ if (req->ns->readonly) - id->nsattr |= (1 << 0); -- nvmet_put_namespace(ns); - done: - if (!status) - status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id)); -diff --git a/drivers/nvme/target/tcp.c b/drivers/nvme/target/tcp.c -index aacf06f0b4312..8b0485ada315b 100644 ---- a/drivers/nvme/target/tcp.c -+++ b/drivers/nvme/target/tcp.c -@@ -379,7 +379,7 @@ err: - return NVME_SC_INTERNAL; - } - --static void nvmet_tcp_ddgst(struct ahash_request *hash, -+static void nvmet_tcp_send_ddgst(struct ahash_request *hash, - struct nvmet_tcp_cmd *cmd) - { - ahash_request_set_crypt(hash, cmd->req.sg, -@@ -387,6 +387,23 @@ static void nvmet_tcp_ddgst(struct ahash_request *hash, - crypto_ahash_digest(hash); - } - -+static void nvmet_tcp_recv_ddgst(struct ahash_request *hash, -+ struct nvmet_tcp_cmd *cmd) -+{ -+ struct scatterlist sg; -+ struct kvec *iov; -+ int i; -+ -+ crypto_ahash_init(hash); -+ for (i = 0, iov = cmd->iov; i < cmd->nr_mapped; i++, iov++) { -+ sg_init_one(&sg, iov->iov_base, iov->iov_len); -+ ahash_request_set_crypt(hash, &sg, NULL, iov->iov_len); -+ crypto_ahash_update(hash); -+ } -+ ahash_request_set_crypt(hash, NULL, (void *)&cmd->exp_ddgst, 0); -+ crypto_ahash_final(hash); -+} -+ - static void nvmet_setup_c2h_data_pdu(struct nvmet_tcp_cmd *cmd) - { - struct nvme_tcp_data_pdu *pdu = cmd->data_pdu; -@@ -411,7 +428,7 @@ static void nvmet_setup_c2h_data_pdu(struct nvmet_tcp_cmd *cmd) - - if (queue->data_digest) { - pdu->hdr.flags |= NVME_TCP_F_DDGST; -- nvmet_tcp_ddgst(queue->snd_hash, cmd); -+ nvmet_tcp_send_ddgst(queue->snd_hash, cmd); - } - - if (cmd->queue->hdr_digest) { -@@ -1060,7 +1077,7 @@ static void nvmet_tcp_prep_recv_ddgst(struct nvmet_tcp_cmd *cmd) - { - struct nvmet_tcp_queue *queue = cmd->queue; - -- nvmet_tcp_ddgst(queue->rcv_hash, cmd); -+ nvmet_tcp_recv_ddgst(queue->rcv_hash, cmd); - queue->offset = 0; - queue->left = NVME_TCP_DIGEST_LENGTH; - queue->rcv_state = NVMET_TCP_RECV_DDGST; -@@ -1081,14 +1098,14 @@ static int nvmet_tcp_try_recv_data(struct nvmet_tcp_queue *queue) - cmd->rbytes_done += ret; - } - -+ if (queue->data_digest) { -+ nvmet_tcp_prep_recv_ddgst(cmd); -+ return 0; -+ } - nvmet_tcp_unmap_pdu_iovec(cmd); - - if (!(cmd->flags & NVMET_TCP_F_INIT_FAILED) && - cmd->rbytes_done == cmd->req.transfer_len) { -- if (queue->data_digest) { -- nvmet_tcp_prep_recv_ddgst(cmd); -- return 0; -- } - cmd->req.execute(&cmd->req); - } - -@@ -1468,17 +1485,27 @@ static int nvmet_tcp_set_queue_sock(struct nvmet_tcp_queue *queue) - if (inet->rcv_tos > 0) - ip_sock_set_tos(sock->sk, inet->rcv_tos); - -+ ret = 0; - write_lock_bh(&sock->sk->sk_callback_lock); -- sock->sk->sk_user_data = queue; -- queue->data_ready = sock->sk->sk_data_ready; -- sock->sk->sk_data_ready = nvmet_tcp_data_ready; -- queue->state_change = sock->sk->sk_state_change; -- sock->sk->sk_state_change = nvmet_tcp_state_change; -- queue->write_space = sock->sk->sk_write_space; -- sock->sk->sk_write_space = nvmet_tcp_write_space; -+ if (sock->sk->sk_state != TCP_ESTABLISHED) { -+ /* -+ * If the socket is already closing, don't even start -+ * consuming it -+ */ -+ ret = -ENOTCONN; -+ } else { -+ sock->sk->sk_user_data = queue; -+ queue->data_ready = sock->sk->sk_data_ready; -+ sock->sk->sk_data_ready = nvmet_tcp_data_ready; -+ queue->state_change = sock->sk->sk_state_change; -+ sock->sk->sk_state_change = nvmet_tcp_state_change; -+ queue->write_space = sock->sk->sk_write_space; -+ sock->sk->sk_write_space = nvmet_tcp_write_space; -+ queue_work_on(queue_cpu(queue), nvmet_tcp_wq, &queue->io_work); -+ } - write_unlock_bh(&sock->sk->sk_callback_lock); - -- return 0; -+ return ret; - } - - static int nvmet_tcp_alloc_queue(struct nvmet_tcp_port *port, -@@ -1526,8 +1553,6 @@ static int nvmet_tcp_alloc_queue(struct nvmet_tcp_port *port, - if (ret) - goto out_destroy_sq; - -- queue_work_on(queue_cpu(queue), nvmet_tcp_wq, &queue->io_work); -- - return 0; - out_destroy_sq: - mutex_lock(&nvmet_tcp_queue_mutex); -diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c -index 177f5bf27c6d5..a5ab1e0c74cf6 100644 ---- a/drivers/nvmem/core.c -+++ b/drivers/nvmem/core.c -@@ -682,7 +682,9 @@ static int nvmem_add_cells_from_of(struct nvmem_device *nvmem) - - for_each_child_of_node(parent, child) { - addr = of_get_property(child, "reg", &len); -- if (!addr || (len < 2 * sizeof(u32))) { -+ if (!addr) -+ continue; -+ if (len < 2 * sizeof(u32)) { - dev_err(dev, "nvmem: invalid reg on %pOF\n", child); - return -EINVAL; - } -@@ -713,6 +715,7 @@ static int nvmem_add_cells_from_of(struct nvmem_device *nvmem) - cell->name, nvmem->stride); - /* Cells already added will be freed later. */ - kfree_const(cell->name); -+ of_node_put(cell->np); - kfree(cell); - return -EINVAL; - } -diff --git a/drivers/nvmem/qcom-spmi-sdam.c b/drivers/nvmem/qcom-spmi-sdam.c -index a72704cd04681..f6e9f96933ca2 100644 ---- a/drivers/nvmem/qcom-spmi-sdam.c -+++ b/drivers/nvmem/qcom-spmi-sdam.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0-only - /* -- * Copyright (c) 2017, 2020 The Linux Foundation. All rights reserved. -+ * Copyright (c) 2017, 2020-2021, The Linux Foundation. All rights reserved. - */ - - #include -@@ -18,7 +18,6 @@ - #define SDAM_PBS_TRIG_CLR 0xE6 - - struct sdam_chip { -- struct platform_device *pdev; - struct regmap *regmap; - struct nvmem_config sdam_config; - unsigned int base; -@@ -65,7 +64,7 @@ static int sdam_read(void *priv, unsigned int offset, void *val, - size_t bytes) - { - struct sdam_chip *sdam = priv; -- struct device *dev = &sdam->pdev->dev; -+ struct device *dev = sdam->sdam_config.dev; - int rc; - - if (!sdam_is_valid(sdam, offset, bytes)) { -@@ -86,7 +85,7 @@ static int sdam_write(void *priv, unsigned int offset, void *val, - size_t bytes) - { - struct sdam_chip *sdam = priv; -- struct device *dev = &sdam->pdev->dev; -+ struct device *dev = sdam->sdam_config.dev; - int rc; - - if (!sdam_is_valid(sdam, offset, bytes)) { -diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c -index feb0f2d67fc5f..dcc1dd96911a9 100644 ---- a/drivers/of/fdt.c -+++ b/drivers/of/fdt.c -@@ -1146,8 +1146,16 @@ int __init __weak early_init_dt_mark_hotplug_memory_arch(u64 base, u64 size) - int __init __weak early_init_dt_reserve_memory_arch(phys_addr_t base, - phys_addr_t size, bool nomap) - { -- if (nomap) -- return memblock_remove(base, size); -+ if (nomap) { -+ /* -+ * If the memory is already reserved (by another region), we -+ * should not allow it to be marked nomap. -+ */ -+ if (memblock_is_region_reserved(base, size)) -+ return -EBUSY; -+ -+ return memblock_mark_nomap(base, size); -+ } - return memblock_reserve(base, size); - } - -diff --git a/drivers/opp/of.c b/drivers/opp/of.c -index 03cb387236c4c..d0c0336be39b4 100644 ---- a/drivers/opp/of.c -+++ b/drivers/opp/of.c -@@ -755,7 +755,6 @@ static struct dev_pm_opp *_opp_add_static_v2(struct opp_table *opp_table, - struct device *dev, struct device_node *np) - { - struct dev_pm_opp *new_opp; -- u64 rate = 0; - u32 val; - int ret; - bool rate_not_available = false; -@@ -772,7 +771,8 @@ static struct dev_pm_opp *_opp_add_static_v2(struct opp_table *opp_table, - - /* Check if the OPP supports hardware's hierarchy of versions or not */ - if (!_opp_is_supported(dev, opp_table, np)) { -- dev_dbg(dev, "OPP not supported by hardware: %llu\n", rate); -+ dev_dbg(dev, "OPP not supported by hardware: %lu\n", -+ new_opp->rate); - goto free_opp; - } - -diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c -index 811c1cb2e8deb..1cb7cfc75d6e4 100644 ---- a/drivers/pci/controller/cadence/pcie-cadence-host.c -+++ b/drivers/pci/controller/cadence/pcie-cadence-host.c -@@ -321,9 +321,10 @@ static int cdns_pcie_host_map_dma_ranges(struct cdns_pcie_rc *rc) - - resource_list_for_each_entry(entry, &bridge->dma_ranges) { - err = cdns_pcie_host_bar_config(rc, entry); -- if (err) -+ if (err) { - dev_err(dev, "Fail to configure IB using dma-ranges\n"); -- return err; -+ return err; -+ } - } - - return 0; -diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c -index affa2713bf80e..0d605a0d69e30 100644 ---- a/drivers/pci/controller/dwc/pcie-qcom.c -+++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -398,7 +398,9 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) - - /* enable external reference clock */ - val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK); -- val &= ~PHY_REFCLK_USE_PAD; -+ /* USE_PAD is required only for ipq806x */ -+ if (!of_device_is_compatible(node, "qcom,pcie-apq8064")) -+ val &= ~PHY_REFCLK_USE_PAD; - val |= PHY_REFCLK_SSP_EN; - writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK); - -diff --git a/drivers/pci/controller/pcie-rcar-host.c b/drivers/pci/controller/pcie-rcar-host.c -index 4d1c4b24e5370..a728e8f9ad3c8 100644 ---- a/drivers/pci/controller/pcie-rcar-host.c -+++ b/drivers/pci/controller/pcie-rcar-host.c -@@ -735,7 +735,7 @@ static int rcar_pcie_enable_msi(struct rcar_pcie_host *host) - } - - /* setup MSI data target */ -- msi->pages = __get_free_pages(GFP_KERNEL, 0); -+ msi->pages = __get_free_pages(GFP_KERNEL | GFP_DMA32, 0); - rcar_pcie_hw_enable_msi(host); - - return 0; -diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c -index 904dec0d3a88f..990a00e08bc5b 100644 ---- a/drivers/pci/controller/pcie-rockchip.c -+++ b/drivers/pci/controller/pcie-rockchip.c -@@ -82,7 +82,7 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) - } - - rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev, -- "mgmt-sticky"); -+ "mgmt-sticky"); - if (IS_ERR(rockchip->mgmt_sticky_rst)) { - if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER) - dev_err(dev, "missing mgmt-sticky reset property in node\n"); -@@ -118,11 +118,11 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) - } - - if (rockchip->is_rc) { -- rockchip->ep_gpio = devm_gpiod_get(dev, "ep", GPIOD_OUT_HIGH); -- if (IS_ERR(rockchip->ep_gpio)) { -- dev_err(dev, "missing ep-gpios property in node\n"); -- return PTR_ERR(rockchip->ep_gpio); -- } -+ rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", -+ GPIOD_OUT_HIGH); -+ if (IS_ERR(rockchip->ep_gpio)) -+ return dev_err_probe(dev, PTR_ERR(rockchip->ep_gpio), -+ "failed to get ep GPIO\n"); - } - - rockchip->aclk_pcie = devm_clk_get(dev, "aclk"); -diff --git a/drivers/pci/controller/pcie-xilinx-cpm.c b/drivers/pci/controller/pcie-xilinx-cpm.c -index f92e0152e65e3..67937facd90cd 100644 ---- a/drivers/pci/controller/pcie-xilinx-cpm.c -+++ b/drivers/pci/controller/pcie-xilinx-cpm.c -@@ -404,6 +404,7 @@ static int xilinx_cpm_pcie_init_irq_domain(struct xilinx_cpm_pcie_port *port) - return 0; - out: - xilinx_cpm_free_irq_domains(port); -+ of_node_put(pcie_intc_node); - dev_err(dev, "Failed to allocate IRQ domains\n"); - - return -ENOMEM; -diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c -index 139869d50eb26..fdaf86a888b73 100644 ---- a/drivers/pci/pci-bridge-emul.c -+++ b/drivers/pci/pci-bridge-emul.c -@@ -21,8 +21,9 @@ - #include "pci-bridge-emul.h" - - #define PCI_BRIDGE_CONF_END PCI_STD_HEADER_SIZEOF -+#define PCI_CAP_PCIE_SIZEOF (PCI_EXP_SLTSTA2 + 2) - #define PCI_CAP_PCIE_START PCI_BRIDGE_CONF_END --#define PCI_CAP_PCIE_END (PCI_CAP_PCIE_START + PCI_EXP_SLTSTA2 + 2) -+#define PCI_CAP_PCIE_END (PCI_CAP_PCIE_START + PCI_CAP_PCIE_SIZEOF) - - /** - * struct pci_bridge_reg_behavior - register bits behaviors -@@ -46,7 +47,8 @@ struct pci_bridge_reg_behavior { - u32 w1c; - }; - --static const struct pci_bridge_reg_behavior pci_regs_behavior[] = { -+static const -+struct pci_bridge_reg_behavior pci_regs_behavior[PCI_STD_HEADER_SIZEOF / 4] = { - [PCI_VENDOR_ID / 4] = { .ro = ~0 }, - [PCI_COMMAND / 4] = { - .rw = (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | -@@ -164,7 +166,8 @@ static const struct pci_bridge_reg_behavior pci_regs_behavior[] = { - }, - }; - --static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = { -+static const -+struct pci_bridge_reg_behavior pcie_cap_regs_behavior[PCI_CAP_PCIE_SIZEOF / 4] = { - [PCI_CAP_LIST_ID / 4] = { - /* - * Capability ID, Next Capability Pointer and -@@ -260,6 +263,8 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = { - int pci_bridge_emul_init(struct pci_bridge_emul *bridge, - unsigned int flags) - { -+ BUILD_BUG_ON(sizeof(bridge->conf) != PCI_BRIDGE_CONF_END); -+ - bridge->conf.class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16); - bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE; - bridge->conf.cache_line_size = 0x10; -diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c -index 43eda101fcf40..7f1acb3918d0c 100644 ---- a/drivers/pci/setup-res.c -+++ b/drivers/pci/setup-res.c -@@ -410,10 +410,16 @@ EXPORT_SYMBOL(pci_release_resource); - int pci_resize_resource(struct pci_dev *dev, int resno, int size) - { - struct resource *res = dev->resource + resno; -+ struct pci_host_bridge *host; - int old, ret; - u32 sizes; - u16 cmd; - -+ /* Check if we must preserve the firmware's resource assignment */ -+ host = pci_find_host_bridge(dev->bus); -+ if (host->preserve_config) -+ return -ENOTSUPP; -+ - /* Make sure the resource isn't assigned before resizing it. */ - if (!(res->flags & IORESOURCE_UNSET)) - return -EBUSY; -diff --git a/drivers/pci/syscall.c b/drivers/pci/syscall.c -index 31e39558d49d8..8b003c890b87b 100644 ---- a/drivers/pci/syscall.c -+++ b/drivers/pci/syscall.c -@@ -20,7 +20,7 @@ SYSCALL_DEFINE5(pciconfig_read, unsigned long, bus, unsigned long, dfn, - u16 word; - u32 dword; - long err; -- long cfg_ret; -+ int cfg_ret; - - if (!capable(CAP_SYS_ADMIN)) - return -EPERM; -@@ -46,7 +46,7 @@ SYSCALL_DEFINE5(pciconfig_read, unsigned long, bus, unsigned long, dfn, - } - - err = -EIO; -- if (cfg_ret != PCIBIOS_SUCCESSFUL) -+ if (cfg_ret) - goto error; - - switch (len) { -@@ -105,7 +105,7 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn, - if (err) - break; - err = pci_user_write_config_byte(dev, off, byte); -- if (err != PCIBIOS_SUCCESSFUL) -+ if (err) - err = -EIO; - break; - -@@ -114,7 +114,7 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn, - if (err) - break; - err = pci_user_write_config_word(dev, off, word); -- if (err != PCIBIOS_SUCCESSFUL) -+ if (err) - err = -EIO; - break; - -@@ -123,7 +123,7 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn, - if (err) - break; - err = pci_user_write_config_dword(dev, off, dword); -- if (err != PCIBIOS_SUCCESSFUL) -+ if (err) - err = -EIO; - break; - -diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c -index a76ff594f3ca4..46defb1dcf867 100644 ---- a/drivers/perf/arm-cmn.c -+++ b/drivers/perf/arm-cmn.c -@@ -1150,7 +1150,7 @@ static int arm_cmn_commit_txn(struct pmu *pmu) - static int arm_cmn_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node) - { - struct arm_cmn *cmn; -- unsigned int target; -+ unsigned int i, target; - - cmn = hlist_entry_safe(node, struct arm_cmn, cpuhp_node); - if (cpu != cmn->cpu) -@@ -1161,6 +1161,8 @@ static int arm_cmn_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node) - return 0; - - perf_pmu_migrate_context(&cmn->pmu, cpu, target); -+ for (i = 0; i < cmn->num_dtcs; i++) -+ irq_set_affinity_hint(cmn->dtc[i].irq, cpumask_of(target)); - cmn->cpu = target; - return 0; - } -@@ -1502,7 +1504,7 @@ static int arm_cmn_probe(struct platform_device *pdev) - struct arm_cmn *cmn; - const char *name; - static atomic_t id; -- int err, rootnode, this_id; -+ int err, rootnode; - - cmn = devm_kzalloc(&pdev->dev, sizeof(*cmn), GFP_KERNEL); - if (!cmn) -@@ -1549,14 +1551,9 @@ static int arm_cmn_probe(struct platform_device *pdev) - .cancel_txn = arm_cmn_end_txn, - }; - -- this_id = atomic_fetch_inc(&id); -- if (this_id == 0) { -- name = "arm_cmn"; -- } else { -- name = devm_kasprintf(cmn->dev, GFP_KERNEL, "arm_cmn_%d", this_id); -- if (!name) -- return -ENOMEM; -- } -+ name = devm_kasprintf(cmn->dev, GFP_KERNEL, "arm_cmn_%d", atomic_fetch_inc(&id)); -+ if (!name) -+ return -ENOMEM; - - err = cpuhp_state_add_instance(arm_cmn_hp_state, &cmn->cpuhp_node); - if (err) -diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig -index 00dabe5fab8a0..68d9c2f6a5caf 100644 ---- a/drivers/phy/Kconfig -+++ b/drivers/phy/Kconfig -@@ -52,6 +52,7 @@ config PHY_XGENE - config USB_LGM_PHY - tristate "INTEL Lightning Mountain USB PHY Driver" - depends on USB_SUPPORT -+ depends on X86 || COMPILE_TEST - select USB_PHY - select REGULATOR - select REGULATOR_FIXED_VOLTAGE -diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c -index f310e15d94cbc..591a15834b48f 100644 ---- a/drivers/phy/cadence/phy-cadence-torrent.c -+++ b/drivers/phy/cadence/phy-cadence-torrent.c -@@ -2298,6 +2298,7 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev) - - if (total_num_lanes > MAX_NUM_LANES) { - dev_err(dev, "Invalid lane configuration\n"); -+ ret = -EINVAL; - goto put_lnk_rst; - } - -diff --git a/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c b/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c -index a7d126192cf12..29d246ea24b47 100644 ---- a/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c -+++ b/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c -@@ -124,8 +124,16 @@ static int ltq_rcu_usb2_phy_power_on(struct phy *phy) - reset_control_deassert(priv->phy_reset); - - ret = clk_prepare_enable(priv->phy_gate_clk); -- if (ret) -+ if (ret) { - dev_err(dev, "failed to enable PHY gate\n"); -+ return ret; -+ } -+ -+ /* -+ * at least the xrx200 usb2 phy requires some extra time to be -+ * operational after enabling the clock -+ */ -+ usleep_range(100, 200); - - return ret; - } -diff --git a/drivers/phy/rockchip/phy-rockchip-emmc.c b/drivers/phy/rockchip/phy-rockchip-emmc.c -index 1e424f263e7ab..496d199852aff 100644 ---- a/drivers/phy/rockchip/phy-rockchip-emmc.c -+++ b/drivers/phy/rockchip/phy-rockchip-emmc.c -@@ -248,15 +248,17 @@ static int rockchip_emmc_phy_init(struct phy *phy) - * - SDHCI driver to get the PHY - * - SDHCI driver to init the PHY - * -- * The clock is optional, so upon any error we just set to NULL. -+ * The clock is optional, using clk_get_optional() to get the clock -+ * and do error processing if the return value != NULL - * - * NOTE: we don't do anything special for EPROBE_DEFER here. Given the - * above expected use case, EPROBE_DEFER isn't sensible to expect, so - * it's just like any other error. - */ -- rk_phy->emmcclk = clk_get(&phy->dev, "emmcclk"); -+ rk_phy->emmcclk = clk_get_optional(&phy->dev, "emmcclk"); - if (IS_ERR(rk_phy->emmcclk)) { -- dev_dbg(&phy->dev, "Error getting emmcclk: %d\n", ret); -+ ret = PTR_ERR(rk_phy->emmcclk); -+ dev_err(&phy->dev, "Error getting emmcclk: %d\n", ret); - rk_phy->emmcclk = NULL; - } - -diff --git a/drivers/platform/chrome/cros_ec_proto.c b/drivers/platform/chrome/cros_ec_proto.c -index 7c92a6e22d75d..aa7f7aa772971 100644 ---- a/drivers/platform/chrome/cros_ec_proto.c -+++ b/drivers/platform/chrome/cros_ec_proto.c -@@ -526,11 +526,13 @@ int cros_ec_query_all(struct cros_ec_device *ec_dev) - * power), not wake up. - */ - ec_dev->host_event_wake_mask = U32_MAX & -- ~(BIT(EC_HOST_EVENT_AC_DISCONNECTED) | -- BIT(EC_HOST_EVENT_BATTERY_LOW) | -- BIT(EC_HOST_EVENT_BATTERY_CRITICAL) | -- BIT(EC_HOST_EVENT_PD_MCU) | -- BIT(EC_HOST_EVENT_BATTERY_STATUS)); -+ ~(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) | -+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) | -+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) | -+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) | -+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) | -+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) | -+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS)); - /* - * Old ECs may not support this command. Complain about all - * other errors. -diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig -index 91e6176cdfbdf..ac4125ec06603 100644 ---- a/drivers/platform/x86/Kconfig -+++ b/drivers/platform/x86/Kconfig -@@ -1369,7 +1369,7 @@ config INTEL_PMC_CORE - - MPHY/PLL gating status (Sunrisepoint PCH only) - - config INTEL_PMT_CLASS -- tristate "Intel Platform Monitoring Technology (PMT) Class driver" -+ tristate - help - The Intel Platform Monitoring Technology (PMT) class driver provides - the basic sysfs interface and file hierarchy uses by PMT devices. -@@ -1382,6 +1382,7 @@ config INTEL_PMT_CLASS - - config INTEL_PMT_TELEMETRY - tristate "Intel Platform Monitoring Technology (PMT) Telemetry driver" -+ depends on MFD_INTEL_PMT - select INTEL_PMT_CLASS - help - The Intel Platform Monitory Technology (PMT) Telemetry driver provides -@@ -1393,6 +1394,7 @@ config INTEL_PMT_TELEMETRY - - config INTEL_PMT_CRASHLOG - tristate "Intel Platform Monitoring Technology (PMT) Crashlog driver" -+ depends on MFD_INTEL_PMT - select INTEL_PMT_CLASS - help - The Intel Platform Monitoring Technology (PMT) crashlog driver provides -diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c b/drivers/power/reset/at91-sama5d2_shdwc.c -index 2fe3a627cb535..d9cf91e5b06d0 100644 ---- a/drivers/power/reset/at91-sama5d2_shdwc.c -+++ b/drivers/power/reset/at91-sama5d2_shdwc.c -@@ -37,7 +37,7 @@ - - #define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */ - #define AT91_SHDW_WKUPDBC_SHIFT 24 --#define AT91_SHDW_WKUPDBC_MASK GENMASK(31, 16) -+#define AT91_SHDW_WKUPDBC_MASK GENMASK(26, 24) - #define AT91_SHDW_WKUPDBC(x) (((x) << AT91_SHDW_WKUPDBC_SHIFT) \ - & AT91_SHDW_WKUPDBC_MASK) - -diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig -index eec646c568b7b..1699b9269a78e 100644 ---- a/drivers/power/supply/Kconfig -+++ b/drivers/power/supply/Kconfig -@@ -229,6 +229,7 @@ config BATTERY_SBS - config CHARGER_SBS - tristate "SBS Compliant charger" - depends on I2C -+ select REGMAP_I2C - help - Say Y to include support for SBS compliant battery chargers. - -diff --git a/drivers/power/supply/axp20x_usb_power.c b/drivers/power/supply/axp20x_usb_power.c -index 70b28b699a80c..8933ae26c3d69 100644 ---- a/drivers/power/supply/axp20x_usb_power.c -+++ b/drivers/power/supply/axp20x_usb_power.c -@@ -593,6 +593,7 @@ static int axp20x_usb_power_probe(struct platform_device *pdev) - power->axp20x_id = axp_data->axp20x_id; - power->regmap = axp20x->regmap; - power->num_irqs = axp_data->num_irq_names; -+ INIT_DELAYED_WORK(&power->vbus_detect, axp20x_usb_power_poll_vbus); - - if (power->axp20x_id == AXP202_ID) { - /* Enable vbus valid checking */ -@@ -645,7 +646,6 @@ static int axp20x_usb_power_probe(struct platform_device *pdev) - } - } - -- INIT_DELAYED_WORK(&power->vbus_detect, axp20x_usb_power_poll_vbus); - if (axp20x_usb_vbus_needs_polling(power)) - queue_delayed_work(system_power_efficient_wq, &power->vbus_detect, 0); - -diff --git a/drivers/power/supply/cpcap-battery.c b/drivers/power/supply/cpcap-battery.c -index 295611b3b15e9..cebc5c8fda1b5 100644 ---- a/drivers/power/supply/cpcap-battery.c -+++ b/drivers/power/supply/cpcap-battery.c -@@ -561,17 +561,21 @@ static int cpcap_battery_update_charger(struct cpcap_battery_ddata *ddata, - POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE, - &prop); - if (error) -- return error; -+ goto out_put; - - /* Allow charger const voltage lower than battery const voltage */ - if (const_charge_voltage > prop.intval) -- return 0; -+ goto out_put; - - val.intval = const_charge_voltage; - -- return power_supply_set_property(charger, -+ error = power_supply_set_property(charger, - POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE, - &val); -+out_put: -+ power_supply_put(charger); -+ -+ return error; - } - - static int cpcap_battery_set_property(struct power_supply *psy, -@@ -666,7 +670,7 @@ static int cpcap_battery_init_irq(struct platform_device *pdev, - - error = devm_request_threaded_irq(ddata->dev, irq, NULL, - cpcap_battery_irq_thread, -- IRQF_SHARED, -+ IRQF_SHARED | IRQF_ONESHOT, - name, ddata); - if (error) { - dev_err(ddata->dev, "could not get irq %s: %i\n", -diff --git a/drivers/power/supply/cpcap-charger.c b/drivers/power/supply/cpcap-charger.c -index c0d452e3dc8b0..22fff01425d63 100644 ---- a/drivers/power/supply/cpcap-charger.c -+++ b/drivers/power/supply/cpcap-charger.c -@@ -301,6 +301,8 @@ cpcap_charger_get_bat_const_charge_voltage(struct cpcap_charger_ddata *ddata) - &prop); - if (!error) - voltage = prop.intval; -+ -+ power_supply_put(battery); - } - - return voltage; -@@ -708,7 +710,7 @@ static int cpcap_usb_init_irq(struct platform_device *pdev, - - error = devm_request_threaded_irq(ddata->dev, irq, NULL, - cpcap_charger_irq_thread, -- IRQF_SHARED, -+ IRQF_SHARED | IRQF_ONESHOT, - name, ddata); - if (error) { - dev_err(ddata->dev, "could not get irq %s: %i\n", -diff --git a/drivers/power/supply/smb347-charger.c b/drivers/power/supply/smb347-charger.c -index d3bf35ed12cee..8cfbd8d6b4786 100644 ---- a/drivers/power/supply/smb347-charger.c -+++ b/drivers/power/supply/smb347-charger.c -@@ -137,6 +137,7 @@ - * @mains_online: is AC/DC input connected - * @usb_online: is USB input connected - * @charging_enabled: is charging enabled -+ * @irq_unsupported: is interrupt unsupported by SMB hardware - * @max_charge_current: maximum current (in uA) the battery can be charged - * @max_charge_voltage: maximum voltage (in uV) the battery can be charged - * @pre_charge_current: current (in uA) to use in pre-charging phase -@@ -193,6 +194,7 @@ struct smb347_charger { - bool mains_online; - bool usb_online; - bool charging_enabled; -+ bool irq_unsupported; - - unsigned int max_charge_current; - unsigned int max_charge_voltage; -@@ -862,6 +864,9 @@ static int smb347_irq_set(struct smb347_charger *smb, bool enable) - { - int ret; - -+ if (smb->irq_unsupported) -+ return 0; -+ - ret = smb347_set_writable(smb, true); - if (ret < 0) - return ret; -@@ -923,8 +928,6 @@ static int smb347_irq_init(struct smb347_charger *smb, - ret = regmap_update_bits(smb->regmap, CFG_STAT, - CFG_STAT_ACTIVE_HIGH | CFG_STAT_DISABLED, - CFG_STAT_DISABLED); -- if (ret < 0) -- client->irq = 0; - - smb347_set_writable(smb, false); - -@@ -1345,6 +1348,7 @@ static int smb347_probe(struct i2c_client *client, - if (ret < 0) { - dev_warn(dev, "failed to initialize IRQ: %d\n", ret); - dev_warn(dev, "disabling IRQ support\n"); -+ smb->irq_unsupported = true; - } else { - smb347_irq_enable(smb); - } -@@ -1357,8 +1361,8 @@ static int smb347_remove(struct i2c_client *client) - { - struct smb347_charger *smb = i2c_get_clientdata(client); - -- if (client->irq) -- smb347_irq_disable(smb); -+ smb347_irq_disable(smb); -+ - return 0; - } - -diff --git a/drivers/pwm/pwm-iqs620a.c b/drivers/pwm/pwm-iqs620a.c -index 5ede8255926ef..14b18fb4f5274 100644 ---- a/drivers/pwm/pwm-iqs620a.c -+++ b/drivers/pwm/pwm-iqs620a.c -@@ -46,7 +46,8 @@ static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - { - struct iqs620_pwm_private *iqs620_pwm; - struct iqs62x_core *iqs62x; -- u64 duty_scale; -+ unsigned int duty_cycle; -+ unsigned int duty_scale; - int ret; - - if (state->polarity != PWM_POLARITY_NORMAL) -@@ -70,7 +71,8 @@ static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - * For lower duty cycles (e.g. 0), the PWM output is simply disabled to - * allow an external pull-down resistor to hold the GPIO3/LTX pin low. - */ -- duty_scale = div_u64(state->duty_cycle * 256, IQS620_PWM_PERIOD_NS); -+ duty_cycle = min_t(u64, state->duty_cycle, IQS620_PWM_PERIOD_NS); -+ duty_scale = duty_cycle * 256 / IQS620_PWM_PERIOD_NS; - - mutex_lock(&iqs620_pwm->lock); - -@@ -82,7 +84,7 @@ static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - } - - if (duty_scale) { -- u8 duty_val = min_t(u64, duty_scale - 1, 0xff); -+ u8 duty_val = duty_scale - 1; - - ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE, - duty_val); -diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c -index 389a5e1404128..f3a5641f6bca5 100644 ---- a/drivers/pwm/pwm-rockchip.c -+++ b/drivers/pwm/pwm-rockchip.c -@@ -288,6 +288,7 @@ static int rockchip_pwm_probe(struct platform_device *pdev) - const struct of_device_id *id; - struct rockchip_pwm_chip *pc; - u32 enable_conf, ctrl; -+ bool enabled; - int ret, count; - - id = of_match_device(rockchip_pwm_dt_ids, &pdev->dev); -@@ -330,9 +331,9 @@ static int rockchip_pwm_probe(struct platform_device *pdev) - return ret; - } - -- ret = clk_prepare(pc->pclk); -+ ret = clk_prepare_enable(pc->pclk); - if (ret) { -- dev_err(&pdev->dev, "Can't prepare APB clk: %d\n", ret); -+ dev_err(&pdev->dev, "Can't prepare enable APB clk: %d\n", ret); - goto err_clk; - } - -@@ -349,23 +350,26 @@ static int rockchip_pwm_probe(struct platform_device *pdev) - pc->chip.of_pwm_n_cells = 3; - } - -+ enable_conf = pc->data->enable_conf; -+ ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl); -+ enabled = (ctrl & enable_conf) == enable_conf; -+ - ret = pwmchip_add(&pc->chip); - if (ret < 0) { -- clk_unprepare(pc->clk); - dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret); - goto err_pclk; - } - - /* Keep the PWM clk enabled if the PWM appears to be up and running. */ -- enable_conf = pc->data->enable_conf; -- ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl); -- if ((ctrl & enable_conf) != enable_conf) -+ if (!enabled) - clk_disable(pc->clk); - -+ clk_disable(pc->pclk); -+ - return 0; - - err_pclk: -- clk_unprepare(pc->pclk); -+ clk_disable_unprepare(pc->pclk); - err_clk: - clk_disable_unprepare(pc->clk); - -diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c -index 90cb8445f7216..d260c442b788d 100644 ---- a/drivers/regulator/axp20x-regulator.c -+++ b/drivers/regulator/axp20x-regulator.c -@@ -1070,7 +1070,7 @@ static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq) - static int axp20x_regulator_parse_dt(struct platform_device *pdev) - { - struct device_node *np, *regulators; -- int ret; -+ int ret = 0; - u32 dcdcfreq = 0; - - np = of_node_get(pdev->dev.parent->of_node); -@@ -1085,13 +1085,12 @@ static int axp20x_regulator_parse_dt(struct platform_device *pdev) - ret = axp20x_set_dcdc_freq(pdev, dcdcfreq); - if (ret < 0) { - dev_err(&pdev->dev, "Error setting dcdc frequency: %d\n", ret); -- return ret; - } -- - of_node_put(regulators); - } - -- return 0; -+ of_node_put(np); -+ return ret; - } - - static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode) -diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c -index 67a768fe5b2a3..2e6c6af9d1c3a 100644 ---- a/drivers/regulator/core.c -+++ b/drivers/regulator/core.c -@@ -1617,7 +1617,7 @@ static struct regulator *create_regulator(struct regulator_dev *rdev, - const char *supply_name) - { - struct regulator *regulator; -- int err; -+ int err = 0; - - if (dev) { - char buf[REG_STR_SIZE]; -@@ -1663,8 +1663,8 @@ static struct regulator *create_regulator(struct regulator_dev *rdev, - } - } - -- regulator->debugfs = debugfs_create_dir(supply_name, -- rdev->debugfs); -+ if (err != -EEXIST) -+ regulator->debugfs = debugfs_create_dir(supply_name, rdev->debugfs); - if (!regulator->debugfs) { - rdev_dbg(rdev, "Failed to create debugfs directory\n"); - } else { -diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c -index c395a8dda6f7c..37a2abbe85c72 100644 ---- a/drivers/regulator/qcom-rpmh-regulator.c -+++ b/drivers/regulator/qcom-rpmh-regulator.c -@@ -732,6 +732,15 @@ static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = { - .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, - }; - -+static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = { -+ .regulator_type = VRM, -+ .ops = &rpmh_regulator_vrm_ops, -+ .voltage_range = REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000), -+ .n_voltages = 5, -+ .pmic_mode_map = pmic_mode_map_pmic5_smps, -+ .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, -+}; -+ - static const struct rpmh_vreg_hw_data pmic5_bob = { - .regulator_type = VRM, - .ops = &rpmh_regulator_vrm_bypass_ops, -@@ -928,6 +937,19 @@ static const struct rpmh_vreg_init_data pm8009_vreg_data[] = { - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"), - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), -+ RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"), -+ {}, -+}; -+ -+static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = { -+ RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"), -+ RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515_1, "vdd-s2"), -+ RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), -+ RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"), -+ RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), -+ RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"), -+ RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), -+ RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), - RPMH_VREG("ldo7", "ldo%s6", &pmic5_pldo_lv, "vdd-l7"), - {}, - }; -@@ -1057,6 +1079,10 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { - .compatible = "qcom,pm8009-rpmh-regulators", - .data = pm8009_vreg_data, - }, -+ { -+ .compatible = "qcom,pm8009-1-rpmh-regulators", -+ .data = pm8009_1_vreg_data, -+ }, - { - .compatible = "qcom,pm8150-rpmh-regulators", - .data = pm8150_vreg_data, -diff --git a/drivers/regulator/rohm-regulator.c b/drivers/regulator/rohm-regulator.c -index 399002383b28b..5c558b153d55e 100644 ---- a/drivers/regulator/rohm-regulator.c -+++ b/drivers/regulator/rohm-regulator.c -@@ -52,9 +52,12 @@ int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs, - char *prop; - unsigned int reg, mask, omask, oreg = desc->enable_reg; - -- for (i = 0; i < ROHM_DVS_LEVEL_MAX && !ret; i++) { -- if (dvs->level_map & (1 << i)) { -- switch (i + 1) { -+ for (i = 0; i < ROHM_DVS_LEVEL_VALID_AMOUNT && !ret; i++) { -+ int bit; -+ -+ bit = BIT(i); -+ if (dvs->level_map & bit) { -+ switch (bit) { - case ROHM_DVS_LEVEL_RUN: - prop = "rohm,dvs-run-voltage"; - reg = dvs->run_reg; -diff --git a/drivers/regulator/s5m8767.c b/drivers/regulator/s5m8767.c -index 3fa472127e9a1..7c111bbdc2afa 100644 ---- a/drivers/regulator/s5m8767.c -+++ b/drivers/regulator/s5m8767.c -@@ -544,14 +544,18 @@ static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev, - rdata = devm_kcalloc(&pdev->dev, - pdata->num_regulators, sizeof(*rdata), - GFP_KERNEL); -- if (!rdata) -+ if (!rdata) { -+ of_node_put(regulators_np); - return -ENOMEM; -+ } - - rmode = devm_kcalloc(&pdev->dev, - pdata->num_regulators, sizeof(*rmode), - GFP_KERNEL); -- if (!rmode) -+ if (!rmode) { -+ of_node_put(regulators_np); - return -ENOMEM; -+ } - - pdata->regulators = rdata; - pdata->opmode = rmode; -@@ -573,10 +577,13 @@ static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev, - "s5m8767,pmic-ext-control", - GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE, - "s5m8767"); -- if (PTR_ERR(rdata->ext_control_gpiod) == -ENOENT) -+ if (PTR_ERR(rdata->ext_control_gpiod) == -ENOENT) { - rdata->ext_control_gpiod = NULL; -- else if (IS_ERR(rdata->ext_control_gpiod)) -+ } else if (IS_ERR(rdata->ext_control_gpiod)) { -+ of_node_put(reg_np); -+ of_node_put(regulators_np); - return PTR_ERR(rdata->ext_control_gpiod); -+ } - - rdata->id = i; - rdata->initdata = of_get_regulator_init_data( -diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h -index 988edb4977c31..bcab38511bf31 100644 ---- a/drivers/remoteproc/mtk_common.h -+++ b/drivers/remoteproc/mtk_common.h -@@ -47,6 +47,7 @@ - - #define MT8192_CORE0_SW_RSTN_CLR 0x10000 - #define MT8192_CORE0_SW_RSTN_SET 0x10004 -+#define MT8192_CORE0_WDT_IRQ 0x10030 - #define MT8192_CORE0_WDT_CFG 0x10034 - - #define SCP_FW_VER_LEN 32 -diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c -index e0c2356903616..eba825b46696e 100644 ---- a/drivers/remoteproc/mtk_scp.c -+++ b/drivers/remoteproc/mtk_scp.c -@@ -197,17 +197,19 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp) - - scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET); - -- if (scp_to_host & MT8192_SCP_IPC_INT_BIT) -+ if (scp_to_host & MT8192_SCP_IPC_INT_BIT) { - scp_ipi_handler(scp); -- else -- scp_wdt_handler(scp, scp_to_host); - -- /* -- * SCP won't send another interrupt until we clear -- * MT8192_SCP2APMCU_IPC. -- */ -- writel(MT8192_SCP_IPC_INT_BIT, -- scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); -+ /* -+ * SCP won't send another interrupt until we clear -+ * MT8192_SCP2APMCU_IPC. -+ */ -+ writel(MT8192_SCP_IPC_INT_BIT, -+ scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); -+ } else { -+ scp_wdt_handler(scp, scp_to_host); -+ writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ); -+ } - } - - static irqreturn_t scp_irq_handler(int irq, void *priv) -diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig -index 6123f9f4fbc90..4e2b3a175607b 100644 ---- a/drivers/rtc/Kconfig -+++ b/drivers/rtc/Kconfig -@@ -692,6 +692,7 @@ config RTC_DRV_S5M - tristate "Samsung S2M/S5M series" - depends on MFD_SEC_CORE || COMPILE_TEST - select REGMAP_IRQ -+ select REGMAP_I2C - help - If you say yes here you will get support for the - RTC of Samsung S2MPS14 and S5M PMIC series. -@@ -1300,7 +1301,7 @@ config RTC_DRV_OPAL - - config RTC_DRV_ZYNQMP - tristate "Xilinx Zynq Ultrascale+ MPSoC RTC" -- depends on OF -+ depends on OF && HAS_IOMEM - help - If you say yes here you get support for the RTC controller found on - Xilinx Zynq Ultrascale+ MPSoC. -diff --git a/drivers/rtc/rtc-rx6110.c b/drivers/rtc/rtc-rx6110.c -index a7b671a210223..79161d4c6ce4d 100644 ---- a/drivers/rtc/rtc-rx6110.c -+++ b/drivers/rtc/rtc-rx6110.c -@@ -331,7 +331,7 @@ static int rx6110_probe(struct rx6110_data *rx6110, struct device *dev) - return 0; - } - --#ifdef CONFIG_SPI_MASTER -+#if IS_ENABLED(CONFIG_SPI_MASTER) - static struct regmap_config regmap_spi_config = { - .reg_bits = 8, - .val_bits = 8, -@@ -411,7 +411,7 @@ static void rx6110_spi_unregister(void) - } - #endif /* CONFIG_SPI_MASTER */ - --#ifdef CONFIG_I2C -+#if IS_ENABLED(CONFIG_I2C) - static struct regmap_config regmap_i2c_config = { - .reg_bits = 8, - .val_bits = 8, -diff --git a/drivers/s390/crypto/zcrypt_api.c b/drivers/s390/crypto/zcrypt_api.c -index 10206e4498d07..52eaf51c9bb64 100644 ---- a/drivers/s390/crypto/zcrypt_api.c -+++ b/drivers/s390/crypto/zcrypt_api.c -@@ -1438,6 +1438,8 @@ static int icarsamodexpo_ioctl(struct ap_perms *perms, unsigned long arg) - if (rc == -EAGAIN) - tr.again_counter++; - } while (rc == -EAGAIN && tr.again_counter < TRACK_AGAIN_MAX); -+ if (rc == -EAGAIN && tr.again_counter >= TRACK_AGAIN_MAX) -+ rc = -EIO; - if (rc) { - ZCRYPT_DBF(DBF_DEBUG, "ioctl ICARSAMODEXPO rc=%d\n", rc); - return rc; -@@ -1481,6 +1483,8 @@ static int icarsacrt_ioctl(struct ap_perms *perms, unsigned long arg) - if (rc == -EAGAIN) - tr.again_counter++; - } while (rc == -EAGAIN && tr.again_counter < TRACK_AGAIN_MAX); -+ if (rc == -EAGAIN && tr.again_counter >= TRACK_AGAIN_MAX) -+ rc = -EIO; - if (rc) { - ZCRYPT_DBF(DBF_DEBUG, "ioctl ICARSACRT rc=%d\n", rc); - return rc; -@@ -1524,6 +1528,8 @@ static int zsecsendcprb_ioctl(struct ap_perms *perms, unsigned long arg) - if (rc == -EAGAIN) - tr.again_counter++; - } while (rc == -EAGAIN && tr.again_counter < TRACK_AGAIN_MAX); -+ if (rc == -EAGAIN && tr.again_counter >= TRACK_AGAIN_MAX) -+ rc = -EIO; - if (rc) - ZCRYPT_DBF(DBF_DEBUG, "ioctl ZSENDCPRB rc=%d status=0x%x\n", - rc, xcRB.status); -@@ -1568,6 +1574,8 @@ static int zsendep11cprb_ioctl(struct ap_perms *perms, unsigned long arg) - if (rc == -EAGAIN) - tr.again_counter++; - } while (rc == -EAGAIN && tr.again_counter < TRACK_AGAIN_MAX); -+ if (rc == -EAGAIN && tr.again_counter >= TRACK_AGAIN_MAX) -+ rc = -EIO; - if (rc) - ZCRYPT_DBF(DBF_DEBUG, "ioctl ZSENDEP11CPRB rc=%d\n", rc); - if (copy_to_user(uxcrb, &xcrb, sizeof(xcrb))) -@@ -1744,6 +1752,8 @@ static long trans_modexpo32(struct ap_perms *perms, struct file *filp, - if (rc == -EAGAIN) - tr.again_counter++; - } while (rc == -EAGAIN && tr.again_counter < TRACK_AGAIN_MAX); -+ if (rc == -EAGAIN && tr.again_counter >= TRACK_AGAIN_MAX) -+ rc = -EIO; - if (rc) - return rc; - return put_user(mex64.outputdatalength, -@@ -1795,6 +1805,8 @@ static long trans_modexpo_crt32(struct ap_perms *perms, struct file *filp, - if (rc == -EAGAIN) - tr.again_counter++; - } while (rc == -EAGAIN && tr.again_counter < TRACK_AGAIN_MAX); -+ if (rc == -EAGAIN && tr.again_counter >= TRACK_AGAIN_MAX) -+ rc = -EIO; - if (rc) - return rc; - return put_user(crt64.outputdatalength, -@@ -1865,6 +1877,8 @@ static long trans_xcRB32(struct ap_perms *perms, struct file *filp, - if (rc == -EAGAIN) - tr.again_counter++; - } while (rc == -EAGAIN && tr.again_counter < TRACK_AGAIN_MAX); -+ if (rc == -EAGAIN && tr.again_counter >= TRACK_AGAIN_MAX) -+ rc = -EIO; - xcRB32.reply_control_blk_length = xcRB64.reply_control_blk_length; - xcRB32.reply_data_length = xcRB64.reply_data_length; - xcRB32.status = xcRB64.status; -diff --git a/drivers/s390/virtio/virtio_ccw.c b/drivers/s390/virtio/virtio_ccw.c -index 5730572b52cd5..54e686dca6dea 100644 ---- a/drivers/s390/virtio/virtio_ccw.c -+++ b/drivers/s390/virtio/virtio_ccw.c -@@ -117,7 +117,7 @@ struct virtio_rev_info { - }; - - /* the highest virtio-ccw revision we support */ --#define VIRTIO_CCW_REV_MAX 1 -+#define VIRTIO_CCW_REV_MAX 2 - - struct virtio_ccw_vq_info { - struct virtqueue *vq; -@@ -952,7 +952,7 @@ static u8 virtio_ccw_get_status(struct virtio_device *vdev) - u8 old_status = vcdev->dma_area->status; - struct ccw1 *ccw; - -- if (vcdev->revision < 1) -+ if (vcdev->revision < 2) - return vcdev->dma_area->status; - - ccw = ccw_device_dma_zalloc(vcdev->cdev, sizeof(*ccw)); -diff --git a/drivers/scsi/aic94xx/aic94xx_scb.c b/drivers/scsi/aic94xx/aic94xx_scb.c -index 13677973da5cf..770546177ca46 100644 ---- a/drivers/scsi/aic94xx/aic94xx_scb.c -+++ b/drivers/scsi/aic94xx/aic94xx_scb.c -@@ -68,7 +68,6 @@ static void asd_phy_event_tasklet(struct asd_ascb *ascb, - struct done_list_struct *dl) - { - struct asd_ha_struct *asd_ha = ascb->ha; -- struct sas_ha_struct *sas_ha = &asd_ha->sas_ha; - int phy_id = dl->status_block[0] & DL_PHY_MASK; - struct asd_phy *phy = &asd_ha->phys[phy_id]; - -@@ -81,7 +80,7 @@ static void asd_phy_event_tasklet(struct asd_ascb *ascb, - ASD_DPRINTK("phy%d: device unplugged\n", phy_id); - asd_turn_led(asd_ha, phy_id, 0); - sas_phy_disconnected(&phy->sas_phy); -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); - break; - case CURRENT_OOB_DONE: - /* hot plugged device */ -@@ -89,12 +88,12 @@ static void asd_phy_event_tasklet(struct asd_ascb *ascb, - get_lrate_mode(phy, oob_mode); - ASD_DPRINTK("phy%d device plugged: lrate:0x%x, proto:0x%x\n", - phy_id, phy->sas_phy.linkrate, phy->sas_phy.iproto); -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); - break; - case CURRENT_SPINUP_HOLD: - /* hot plug SATA, no COMWAKE sent */ - asd_turn_led(asd_ha, phy_id, 1); -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); - break; - case CURRENT_GTO_TIMEOUT: - case CURRENT_OOB_ERROR: -@@ -102,7 +101,7 @@ static void asd_phy_event_tasklet(struct asd_ascb *ascb, - dl->status_block[1]); - asd_turn_led(asd_ha, phy_id, 0); - sas_phy_disconnected(&phy->sas_phy); -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); - break; - } - } -@@ -222,7 +221,6 @@ static void asd_bytes_dmaed_tasklet(struct asd_ascb *ascb, - int edb_el = edb_id + ascb->edb_index; - struct asd_dma_tok *edb = ascb->ha->seq.edb_arr[edb_el]; - struct asd_phy *phy = &ascb->ha->phys[phy_id]; -- struct sas_ha_struct *sas_ha = phy->sas_phy.ha; - u16 size = ((dl->status_block[3] & 7) << 8) | dl->status_block[2]; - - size = min(size, (u16) sizeof(phy->frame_rcvd)); -@@ -234,7 +232,7 @@ static void asd_bytes_dmaed_tasklet(struct asd_ascb *ascb, - spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); - asd_dump_frame_rcvd(phy, dl); - asd_form_port(ascb->ha, phy); -- sas_ha->notify_port_event(&phy->sas_phy, PORTE_BYTES_DMAED); -+ sas_notify_port_event(&phy->sas_phy, PORTE_BYTES_DMAED); - } - - static void asd_link_reset_err_tasklet(struct asd_ascb *ascb, -@@ -270,7 +268,7 @@ static void asd_link_reset_err_tasklet(struct asd_ascb *ascb, - asd_turn_led(asd_ha, phy_id, 0); - sas_phy_disconnected(sas_phy); - asd_deform_port(asd_ha, phy); -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - - if (retries_left == 0) { - int num = 1; -@@ -315,7 +313,7 @@ static void asd_primitive_rcvd_tasklet(struct asd_ascb *ascb, - spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); - sas_phy->sas_prim = ffs(cont); - spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); -- sas_ha->notify_port_event(sas_phy,PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - break; - - case LmUNKNOWNP: -@@ -336,7 +334,7 @@ static void asd_primitive_rcvd_tasklet(struct asd_ascb *ascb, - /* The sequencer disables all phys on that port. - * We have to re-enable the phys ourselves. */ - asd_deform_port(asd_ha, phy); -- sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET); -+ sas_notify_port_event(sas_phy, PORTE_HARD_RESET); - break; - - default: -@@ -567,7 +565,7 @@ static void escb_tasklet_complete(struct asd_ascb *ascb, - /* the device is gone */ - sas_phy_disconnected(sas_phy); - asd_deform_port(asd_ha, phy); -- sas_ha->notify_port_event(sas_phy, PORTE_TIMER_EVENT); -+ sas_notify_port_event(sas_phy, PORTE_TIMER_EVENT); - break; - default: - ASD_DPRINTK("%s: phy%d: unknown event:0x%x\n", __func__, -diff --git a/drivers/scsi/bnx2fc/Kconfig b/drivers/scsi/bnx2fc/Kconfig -index 3cf7e08df8093..ecdc0f0f4f4e6 100644 ---- a/drivers/scsi/bnx2fc/Kconfig -+++ b/drivers/scsi/bnx2fc/Kconfig -@@ -5,6 +5,7 @@ config SCSI_BNX2X_FCOE - depends on (IPV6 || IPV6=n) - depends on LIBFC - depends on LIBFCOE -+ depends on MMU - select NETDEVICES - select ETHERNET - select NET_VENDOR_BROADCOM -diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c -index cf0bfac920a81..76f8fc3fad599 100644 ---- a/drivers/scsi/hisi_sas/hisi_sas_main.c -+++ b/drivers/scsi/hisi_sas/hisi_sas_main.c -@@ -616,7 +616,6 @@ static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no) - { - struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; - struct asd_sas_phy *sas_phy = &phy->sas_phy; -- struct sas_ha_struct *sas_ha; - - if (!phy->phy_attached) - return; -@@ -627,8 +626,7 @@ static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no) - return; - } - -- sas_ha = &hisi_hba->sha; -- sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE); -+ sas_notify_phy_event(sas_phy, PHYE_OOB_DONE); - - if (sas_phy->phy) { - struct sas_phy *sphy = sas_phy->phy; -@@ -656,7 +654,7 @@ static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no) - } - - sas_phy->frame_rcvd_size = phy->frame_rcvd_size; -- sas_ha->notify_port_event(sas_phy, PORTE_BYTES_DMAED); -+ sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED); - } - - static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device) -@@ -1411,7 +1409,6 @@ static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba) - - static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state) - { -- struct sas_ha_struct *sas_ha = &hisi_hba->sha; - struct asd_sas_port *_sas_port = NULL; - int phy_no; - -@@ -1432,7 +1429,7 @@ static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state) - _sas_port = sas_port; - - if (dev_is_expander(dev->dev_type)) -- sas_ha->notify_port_event(sas_phy, -+ sas_notify_port_event(sas_phy, - PORTE_BROADCAST_RCVD); - } - } else { -@@ -2194,7 +2191,6 @@ void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy) - { - struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; - struct asd_sas_phy *sas_phy = &phy->sas_phy; -- struct sas_ha_struct *sas_ha = &hisi_hba->sha; - struct device *dev = hisi_hba->dev; - - if (rdy) { -@@ -2210,7 +2206,7 @@ void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy) - return; - } - /* Phy down and not ready */ -- sas_ha->notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL); -+ sas_notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL); - sas_phy_disconnected(sas_phy); - - if (port) { -diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c -index 45e866cb9164d..22eecc89d41bd 100644 ---- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c -+++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c -@@ -1408,7 +1408,6 @@ static irqreturn_t int_bcast_v1_hw(int irq, void *p) - struct hisi_sas_phy *phy = p; - struct hisi_hba *hisi_hba = phy->hisi_hba; - struct asd_sas_phy *sas_phy = &phy->sas_phy; -- struct sas_ha_struct *sha = &hisi_hba->sha; - struct device *dev = hisi_hba->dev; - int phy_no = sas_phy->id; - u32 irq_value; -@@ -1424,7 +1423,7 @@ static irqreturn_t int_bcast_v1_hw(int irq, void *p) - } - - if (!test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) -- sha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - - end: - hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2, -diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c -index 9adfdefef9cad..10ba0680da04b 100644 ---- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c -+++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c -@@ -2818,14 +2818,13 @@ static void phy_bcast_v2_hw(int phy_no, struct hisi_hba *hisi_hba) - { - struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; - struct asd_sas_phy *sas_phy = &phy->sas_phy; -- struct sas_ha_struct *sas_ha = &hisi_hba->sha; - u32 bcast_status; - - hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 1); - bcast_status = hisi_sas_phy_read32(hisi_hba, phy_no, RX_PRIMS_STATUS); - if ((bcast_status & RX_BCAST_CHG_MSK) && - !test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) -- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0, - CHL_INT0_SL_RX_BCST_ACK_MSK); - hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 0); -diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c -index 7c12804b4e1d1..9d9dcc11a866b 100644 ---- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c -+++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c -@@ -1600,14 +1600,13 @@ static irqreturn_t phy_bcast_v3_hw(int phy_no, struct hisi_hba *hisi_hba) - { - struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; - struct asd_sas_phy *sas_phy = &phy->sas_phy; -- struct sas_ha_struct *sas_ha = &hisi_hba->sha; - u32 bcast_status; - - hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 1); - bcast_status = hisi_sas_phy_read32(hisi_hba, phy_no, RX_PRIMS_STATUS); - if ((bcast_status & RX_BCAST_CHG_MSK) && - !test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) -- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0, - CHL_INT0_SL_RX_BCST_ACK_MSK); - hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 0); -diff --git a/drivers/scsi/isci/port.c b/drivers/scsi/isci/port.c -index 1df45f028ea75..e50c3b0deeb30 100644 ---- a/drivers/scsi/isci/port.c -+++ b/drivers/scsi/isci/port.c -@@ -164,7 +164,8 @@ static void isci_port_bc_change_received(struct isci_host *ihost, - "%s: isci_phy = %p, sas_phy = %p\n", - __func__, iphy, &iphy->sas_phy); - -- ihost->sas_ha.notify_port_event(&iphy->sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event_gfp(&iphy->sas_phy, -+ PORTE_BROADCAST_RCVD, GFP_ATOMIC); - sci_port_bcn_enable(iport); - } - -@@ -223,8 +224,8 @@ static void isci_port_link_up(struct isci_host *isci_host, - /* Notify libsas that we have an address frame, if indeed - * we've found an SSP, SMP, or STP target */ - if (success) -- isci_host->sas_ha.notify_port_event(&iphy->sas_phy, -- PORTE_BYTES_DMAED); -+ sas_notify_port_event_gfp(&iphy->sas_phy, -+ PORTE_BYTES_DMAED, GFP_ATOMIC); - } - - -@@ -270,8 +271,8 @@ static void isci_port_link_down(struct isci_host *isci_host, - * isci_port_deformed and isci_dev_gone functions. - */ - sas_phy_disconnected(&isci_phy->sas_phy); -- isci_host->sas_ha.notify_phy_event(&isci_phy->sas_phy, -- PHYE_LOSS_OF_SIGNAL); -+ sas_notify_phy_event_gfp(&isci_phy->sas_phy, -+ PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC); - - dev_dbg(&isci_host->pdev->dev, - "%s: isci_port = %p - Done\n", __func__, isci_port); -diff --git a/drivers/scsi/libsas/sas_event.c b/drivers/scsi/libsas/sas_event.c -index a1852f6c042b9..ba266a17250ae 100644 ---- a/drivers/scsi/libsas/sas_event.c -+++ b/drivers/scsi/libsas/sas_event.c -@@ -109,7 +109,7 @@ void sas_enable_revalidation(struct sas_ha_struct *ha) - - sas_phy = container_of(port->phy_list.next, struct asd_sas_phy, - port_phy_el); -- ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - } - mutex_unlock(&ha->disco_mutex); - } -@@ -131,18 +131,15 @@ static void sas_phy_event_worker(struct work_struct *work) - sas_free_event(ev); - } - --static int sas_notify_port_event(struct asd_sas_phy *phy, enum port_event event) -+static int __sas_notify_port_event(struct asd_sas_phy *phy, -+ enum port_event event, -+ struct asd_sas_event *ev) - { -- struct asd_sas_event *ev; - struct sas_ha_struct *ha = phy->ha; - int ret; - - BUG_ON(event >= PORT_NUM_EVENTS); - -- ev = sas_alloc_event(phy); -- if (!ev) -- return -ENOMEM; -- - INIT_SAS_EVENT(ev, sas_port_event_worker, phy, event); - - ret = sas_queue_event(event, &ev->work, ha); -@@ -152,18 +149,40 @@ static int sas_notify_port_event(struct asd_sas_phy *phy, enum port_event event) - return ret; - } - --int sas_notify_phy_event(struct asd_sas_phy *phy, enum phy_event event) -+int sas_notify_port_event_gfp(struct asd_sas_phy *phy, enum port_event event, -+ gfp_t gfp_flags) - { - struct asd_sas_event *ev; -- struct sas_ha_struct *ha = phy->ha; -- int ret; - -- BUG_ON(event >= PHY_NUM_EVENTS); -+ ev = sas_alloc_event_gfp(phy, gfp_flags); -+ if (!ev) -+ return -ENOMEM; -+ -+ return __sas_notify_port_event(phy, event, ev); -+} -+EXPORT_SYMBOL_GPL(sas_notify_port_event_gfp); -+ -+int sas_notify_port_event(struct asd_sas_phy *phy, enum port_event event) -+{ -+ struct asd_sas_event *ev; - - ev = sas_alloc_event(phy); - if (!ev) - return -ENOMEM; - -+ return __sas_notify_port_event(phy, event, ev); -+} -+EXPORT_SYMBOL_GPL(sas_notify_port_event); -+ -+static inline int __sas_notify_phy_event(struct asd_sas_phy *phy, -+ enum phy_event event, -+ struct asd_sas_event *ev) -+{ -+ struct sas_ha_struct *ha = phy->ha; -+ int ret; -+ -+ BUG_ON(event >= PHY_NUM_EVENTS); -+ - INIT_SAS_EVENT(ev, sas_phy_event_worker, phy, event); - - ret = sas_queue_event(event, &ev->work, ha); -@@ -173,10 +192,27 @@ int sas_notify_phy_event(struct asd_sas_phy *phy, enum phy_event event) - return ret; - } - --int sas_init_events(struct sas_ha_struct *sas_ha) -+int sas_notify_phy_event_gfp(struct asd_sas_phy *phy, enum phy_event event, -+ gfp_t gfp_flags) - { -- sas_ha->notify_port_event = sas_notify_port_event; -- sas_ha->notify_phy_event = sas_notify_phy_event; -+ struct asd_sas_event *ev; - -- return 0; -+ ev = sas_alloc_event_gfp(phy, gfp_flags); -+ if (!ev) -+ return -ENOMEM; -+ -+ return __sas_notify_phy_event(phy, event, ev); -+} -+EXPORT_SYMBOL_GPL(sas_notify_phy_event_gfp); -+ -+int sas_notify_phy_event(struct asd_sas_phy *phy, enum phy_event event) -+{ -+ struct asd_sas_event *ev; -+ -+ ev = sas_alloc_event(phy); -+ if (!ev) -+ return -ENOMEM; -+ -+ return __sas_notify_phy_event(phy, event, ev); - } -+EXPORT_SYMBOL_GPL(sas_notify_phy_event); -diff --git a/drivers/scsi/libsas/sas_init.c b/drivers/scsi/libsas/sas_init.c -index 21c43b18d5d5b..f8ae1f0f17d36 100644 ---- a/drivers/scsi/libsas/sas_init.c -+++ b/drivers/scsi/libsas/sas_init.c -@@ -123,12 +123,6 @@ int sas_register_ha(struct sas_ha_struct *sas_ha) - goto Undo_phys; - } - -- error = sas_init_events(sas_ha); -- if (error) { -- pr_notice("couldn't start event thread:%d\n", error); -- goto Undo_ports; -- } -- - error = -ENOMEM; - snprintf(name, sizeof(name), "%s_event_q", dev_name(sas_ha->dev)); - sas_ha->event_q = create_singlethread_workqueue(name); -@@ -590,16 +584,15 @@ sas_domain_attach_transport(struct sas_domain_function_template *dft) - } - EXPORT_SYMBOL_GPL(sas_domain_attach_transport); - -- --struct asd_sas_event *sas_alloc_event(struct asd_sas_phy *phy) -+static struct asd_sas_event *__sas_alloc_event(struct asd_sas_phy *phy, -+ gfp_t gfp_flags) - { - struct asd_sas_event *event; -- gfp_t flags = in_interrupt() ? GFP_ATOMIC : GFP_KERNEL; - struct sas_ha_struct *sas_ha = phy->ha; - struct sas_internal *i = - to_sas_internal(sas_ha->core.shost->transportt); - -- event = kmem_cache_zalloc(sas_event_cache, flags); -+ event = kmem_cache_zalloc(sas_event_cache, gfp_flags); - if (!event) - return NULL; - -@@ -610,7 +603,8 @@ struct asd_sas_event *sas_alloc_event(struct asd_sas_phy *phy) - if (cmpxchg(&phy->in_shutdown, 0, 1) == 0) { - pr_notice("The phy%d bursting events, shut it down.\n", - phy->id); -- sas_notify_phy_event(phy, PHYE_SHUTDOWN); -+ sas_notify_phy_event_gfp(phy, PHYE_SHUTDOWN, -+ gfp_flags); - } - } else { - /* Do not support PHY control, stop allocating events */ -@@ -624,6 +618,17 @@ struct asd_sas_event *sas_alloc_event(struct asd_sas_phy *phy) - return event; - } - -+struct asd_sas_event *sas_alloc_event(struct asd_sas_phy *phy) -+{ -+ return __sas_alloc_event(phy, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); -+} -+ -+struct asd_sas_event *sas_alloc_event_gfp(struct asd_sas_phy *phy, -+ gfp_t gfp_flags) -+{ -+ return __sas_alloc_event(phy, gfp_flags); -+} -+ - void sas_free_event(struct asd_sas_event *event) - { - struct asd_sas_phy *phy = event->phy; -diff --git a/drivers/scsi/libsas/sas_internal.h b/drivers/scsi/libsas/sas_internal.h -index 1f1d01901978c..52e09c3e2b50d 100644 ---- a/drivers/scsi/libsas/sas_internal.h -+++ b/drivers/scsi/libsas/sas_internal.h -@@ -49,12 +49,13 @@ int sas_register_phys(struct sas_ha_struct *sas_ha); - void sas_unregister_phys(struct sas_ha_struct *sas_ha); - - struct asd_sas_event *sas_alloc_event(struct asd_sas_phy *phy); -+struct asd_sas_event *sas_alloc_event_gfp(struct asd_sas_phy *phy, -+ gfp_t gfp_flags); - void sas_free_event(struct asd_sas_event *event); - - int sas_register_ports(struct sas_ha_struct *sas_ha); - void sas_unregister_ports(struct sas_ha_struct *sas_ha); - --int sas_init_events(struct sas_ha_struct *sas_ha); - void sas_disable_revalidation(struct sas_ha_struct *ha); - void sas_enable_revalidation(struct sas_ha_struct *ha); - void __sas_drain_work(struct sas_ha_struct *ha); -@@ -78,6 +79,8 @@ int sas_smp_phy_control(struct domain_device *dev, int phy_id, - int sas_smp_get_phy_events(struct sas_phy *phy); - - int sas_notify_phy_event(struct asd_sas_phy *phy, enum phy_event event); -+int sas_notify_phy_event_gfp(struct asd_sas_phy *phy, enum phy_event event, -+ gfp_t flags); - void sas_device_set_phy(struct domain_device *dev, struct sas_port *port); - struct domain_device *sas_find_dev_by_rphy(struct sas_rphy *rphy); - struct domain_device *sas_ex_to_ata(struct domain_device *ex_dev, int phy_id); -diff --git a/drivers/scsi/lpfc/lpfc_hbadisc.c b/drivers/scsi/lpfc/lpfc_hbadisc.c -index 2b6b5fc671feb..e5ace4a4f432a 100644 ---- a/drivers/scsi/lpfc/lpfc_hbadisc.c -+++ b/drivers/scsi/lpfc/lpfc_hbadisc.c -@@ -1145,13 +1145,14 @@ lpfc_mbx_cmpl_local_config_link(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb) - struct lpfc_vport *vport = pmb->vport; - LPFC_MBOXQ_t *sparam_mb; - struct lpfc_dmabuf *sparam_mp; -+ u16 status = pmb->u.mb.mbxStatus; - int rc; - -- if (pmb->u.mb.mbxStatus) -- goto out; -- - mempool_free(pmb, phba->mbox_mem_pool); - -+ if (status) -+ goto out; -+ - /* don't perform discovery for SLI4 loopback diagnostic test */ - if ((phba->sli_rev == LPFC_SLI_REV4) && - !(phba->hba_flag & HBA_FCOE_MODE) && -@@ -1214,12 +1215,10 @@ lpfc_mbx_cmpl_local_config_link(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb) - - out: - lpfc_printf_vlog(vport, KERN_ERR, LOG_TRACE_EVENT, -- "0306 CONFIG_LINK mbxStatus error x%x " -- "HBA state x%x\n", -- pmb->u.mb.mbxStatus, vport->port_state); --sparam_out: -- mempool_free(pmb, phba->mbox_mem_pool); -+ "0306 CONFIG_LINK mbxStatus error x%x HBA state x%x\n", -+ status, vport->port_state); - -+sparam_out: - lpfc_linkdown(phba); - - lpfc_printf_vlog(vport, KERN_ERR, LOG_TRACE_EVENT, -diff --git a/drivers/scsi/mvsas/mv_sas.c b/drivers/scsi/mvsas/mv_sas.c -index a920eced92ecc..484e01428da28 100644 ---- a/drivers/scsi/mvsas/mv_sas.c -+++ b/drivers/scsi/mvsas/mv_sas.c -@@ -216,11 +216,11 @@ void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo, - MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi); - } - --static void mvs_bytes_dmaed(struct mvs_info *mvi, int i) -+static void mvs_bytes_dmaed(struct mvs_info *mvi, int i, gfp_t gfp_flags) - { - struct mvs_phy *phy = &mvi->phy[i]; - struct asd_sas_phy *sas_phy = &phy->sas_phy; -- struct sas_ha_struct *sas_ha; -+ - if (!phy->phy_attached) - return; - -@@ -229,8 +229,7 @@ static void mvs_bytes_dmaed(struct mvs_info *mvi, int i) - return; - } - -- sas_ha = mvi->sas; -- sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE); -+ sas_notify_phy_event_gfp(sas_phy, PHYE_OOB_DONE, gfp_flags); - - if (sas_phy->phy) { - struct sas_phy *sphy = sas_phy->phy; -@@ -262,8 +261,7 @@ static void mvs_bytes_dmaed(struct mvs_info *mvi, int i) - - sas_phy->frame_rcvd_size = phy->frame_rcvd_size; - -- mvi->sas->notify_port_event(sas_phy, -- PORTE_BYTES_DMAED); -+ sas_notify_port_event_gfp(sas_phy, PORTE_BYTES_DMAED, gfp_flags); - } - - void mvs_scan_start(struct Scsi_Host *shost) -@@ -279,7 +277,7 @@ void mvs_scan_start(struct Scsi_Host *shost) - for (j = 0; j < core_nr; j++) { - mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j]; - for (i = 0; i < mvi->chip->n_phy; ++i) -- mvs_bytes_dmaed(mvi, i); -+ mvs_bytes_dmaed(mvi, i, GFP_KERNEL); - } - mvs_prv->scan_finished = 1; - } -@@ -1880,7 +1878,6 @@ static void mvs_work_queue(struct work_struct *work) - struct mvs_info *mvi = mwq->mvi; - unsigned long flags; - u32 phy_no = (unsigned long) mwq->data; -- struct sas_ha_struct *sas_ha = mvi->sas; - struct mvs_phy *phy = &mvi->phy[phy_no]; - struct asd_sas_phy *sas_phy = &phy->sas_phy; - -@@ -1895,21 +1892,21 @@ static void mvs_work_queue(struct work_struct *work) - if (!(tmp & PHY_READY_MASK)) { - sas_phy_disconnected(sas_phy); - mvs_phy_disconnected(phy); -- sas_ha->notify_phy_event(sas_phy, -- PHYE_LOSS_OF_SIGNAL); -+ sas_notify_phy_event_gfp(sas_phy, -+ PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC); - mv_dprintk("phy%d Removed Device\n", phy_no); - } else { - MVS_CHIP_DISP->detect_porttype(mvi, phy_no); - mvs_update_phyinfo(mvi, phy_no, 1); -- mvs_bytes_dmaed(mvi, phy_no); -+ mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC); - mvs_port_notify_formed(sas_phy, 0); - mv_dprintk("phy%d Attached Device\n", phy_no); - } - } - } else if (mwq->handler & EXP_BRCT_CHG) { - phy->phy_event &= ~EXP_BRCT_CHG; -- sas_ha->notify_port_event(sas_phy, -- PORTE_BROADCAST_RCVD); -+ sas_notify_port_event_gfp(sas_phy, -+ PORTE_BROADCAST_RCVD, GFP_ATOMIC); - mv_dprintk("phy%d Got Broadcast Change\n", phy_no); - } - list_del(&mwq->entry); -@@ -2026,7 +2023,7 @@ void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events) - mdelay(10); - } - -- mvs_bytes_dmaed(mvi, phy_no); -+ mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC); - /* whether driver is going to handle hot plug */ - if (phy->phy_event & PHY_PLUG_OUT) { - mvs_port_notify_formed(&phy->sas_phy, 0); -diff --git a/drivers/scsi/pm8001/pm8001_hwi.c b/drivers/scsi/pm8001/pm8001_hwi.c -index c8d4d87c54737..dd15246d5b037 100644 ---- a/drivers/scsi/pm8001/pm8001_hwi.c -+++ b/drivers/scsi/pm8001/pm8001_hwi.c -@@ -3179,7 +3179,7 @@ void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i) - pm8001_dbg(pm8001_ha, MSG, "phy %d byte dmaded.\n", i); - - sas_phy->frame_rcvd_size = phy->frame_rcvd_size; -- pm8001_ha->sas->notify_port_event(sas_phy, PORTE_BYTES_DMAED); -+ sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED); - } - - /* Get the link rate speed */ -@@ -3293,7 +3293,6 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) - u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate); - u8 portstate = (u8)(npip_portstate & 0x0000000F); - struct pm8001_port *port = &pm8001_ha->port[port_id]; -- struct sas_ha_struct *sas_ha = pm8001_ha->sas; - struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; - unsigned long flags; - u8 deviceType = pPayload->sas_identify.dev_type; -@@ -3337,7 +3336,7 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) - else if (phy->identify.device_type != SAS_PHY_UNUSED) - phy->identify.target_port_protocols = SAS_PROTOCOL_SMP; - phy->sas_phy.oob_mode = SAS_OOB_MODE; -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); - spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); - memcpy(phy->frame_rcvd, &pPayload->sas_identify, - sizeof(struct sas_identify_frame)-4); -@@ -3369,7 +3368,6 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) - u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate); - u8 portstate = (u8)(npip_portstate & 0x0000000F); - struct pm8001_port *port = &pm8001_ha->port[port_id]; -- struct sas_ha_struct *sas_ha = pm8001_ha->sas; - struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; - unsigned long flags; - pm8001_dbg(pm8001_ha, DEVIO, "HW_EVENT_SATA_PHY_UP port id = %d, phy id = %d\n", -@@ -3381,7 +3379,7 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) - phy->phy_type |= PORT_TYPE_SATA; - phy->phy_attached = 1; - phy->sas_phy.oob_mode = SATA_OOB_MODE; -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); - spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); - memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4), - sizeof(struct dev_to_host_fis)); -@@ -3728,11 +3726,11 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb) - break; - case HW_EVENT_SATA_SPINUP_HOLD: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n"); -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); - break; - case HW_EVENT_PHY_DOWN: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n"); -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); - phy->phy_attached = 0; - phy->phy_state = 0; - hw_event_phy_down(pm8001_ha, piomb); -@@ -3741,7 +3739,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb) - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n"); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - /* the broadcast change primitive received, tell the LIBSAS this event - to revalidate the sas domain*/ -@@ -3752,20 +3750,20 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb) - spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); - sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE; - spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); -- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - break; - case HW_EVENT_PHY_ERROR: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n"); - sas_phy_disconnected(&phy->sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); - break; - case HW_EVENT_BROADCAST_EXP: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n"); - spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); - sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP; - spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); -- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - break; - case HW_EVENT_LINK_ERR_INVALID_DWORD: - pm8001_dbg(pm8001_ha, MSG, -@@ -3774,7 +3772,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb) - HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - case HW_EVENT_LINK_ERR_DISPARITY_ERROR: - pm8001_dbg(pm8001_ha, MSG, -@@ -3784,7 +3782,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb) - port_id, phy_id, 0, 0); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - case HW_EVENT_LINK_ERR_CODE_VIOLATION: - pm8001_dbg(pm8001_ha, MSG, -@@ -3794,7 +3792,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb) - port_id, phy_id, 0, 0); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH: - pm8001_dbg(pm8001_ha, MSG, -@@ -3804,7 +3802,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb) - port_id, phy_id, 0, 0); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - case HW_EVENT_MALFUNCTION: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n"); -@@ -3814,7 +3812,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb) - spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); - sas_phy->sas_prim = HW_EVENT_BROADCAST_SES; - spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); -- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - break; - case HW_EVENT_INBOUND_CRC_ERROR: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n"); -@@ -3824,13 +3822,13 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb) - break; - case HW_EVENT_HARD_RESET_RECEIVED: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n"); -- sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET); -+ sas_notify_port_event(sas_phy, PORTE_HARD_RESET); - break; - case HW_EVENT_ID_FRAME_TIMEOUT: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n"); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - case HW_EVENT_LINK_ERR_PHY_RESET_FAILED: - pm8001_dbg(pm8001_ha, MSG, -@@ -3840,20 +3838,20 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb) - port_id, phy_id, 0, 0); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - case HW_EVENT_PORT_RESET_TIMER_TMO: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n"); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - case HW_EVENT_PORT_RECOVERY_TIMER_TMO: - pm8001_dbg(pm8001_ha, MSG, - "HW_EVENT_PORT_RECOVERY_TIMER_TMO\n"); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - case HW_EVENT_PORT_RECOVER: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n"); -diff --git a/drivers/scsi/pm8001/pm8001_sas.c b/drivers/scsi/pm8001/pm8001_sas.c -index d1e9dba2ef193..e21c6cfff4cbd 100644 ---- a/drivers/scsi/pm8001/pm8001_sas.c -+++ b/drivers/scsi/pm8001/pm8001_sas.c -@@ -158,7 +158,6 @@ int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, - int rc = 0, phy_id = sas_phy->id; - struct pm8001_hba_info *pm8001_ha = NULL; - struct sas_phy_linkrates *rates; -- struct sas_ha_struct *sas_ha; - struct pm8001_phy *phy; - DECLARE_COMPLETION_ONSTACK(completion); - unsigned long flags; -@@ -207,18 +206,16 @@ int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, - if (pm8001_ha->chip_id != chip_8001) { - if (pm8001_ha->phy[phy_id].phy_state == - PHY_STATE_LINK_UP_SPCV) { -- sas_ha = pm8001_ha->sas; - sas_phy_disconnected(&phy->sas_phy); -- sas_ha->notify_phy_event(&phy->sas_phy, -+ sas_notify_phy_event(&phy->sas_phy, - PHYE_LOSS_OF_SIGNAL); - phy->phy_attached = 0; - } - } else { - if (pm8001_ha->phy[phy_id].phy_state == - PHY_STATE_LINK_UP_SPC) { -- sas_ha = pm8001_ha->sas; - sas_phy_disconnected(&phy->sas_phy); -- sas_ha->notify_phy_event(&phy->sas_phy, -+ sas_notify_phy_event(&phy->sas_phy, - PHYE_LOSS_OF_SIGNAL); - phy->phy_attached = 0; - } -diff --git a/drivers/scsi/pm8001/pm80xx_hwi.c b/drivers/scsi/pm8001/pm80xx_hwi.c -index 6772b0924dac8..f617177b7bb33 100644 ---- a/drivers/scsi/pm8001/pm80xx_hwi.c -+++ b/drivers/scsi/pm8001/pm80xx_hwi.c -@@ -3243,7 +3243,6 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) - u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); - - struct pm8001_port *port = &pm8001_ha->port[port_id]; -- struct sas_ha_struct *sas_ha = pm8001_ha->sas; - struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; - unsigned long flags; - u8 deviceType = pPayload->sas_identify.dev_type; -@@ -3288,7 +3287,7 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) - else if (phy->identify.device_type != SAS_PHY_UNUSED) - phy->identify.target_port_protocols = SAS_PROTOCOL_SMP; - phy->sas_phy.oob_mode = SAS_OOB_MODE; -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); - spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); - memcpy(phy->frame_rcvd, &pPayload->sas_identify, - sizeof(struct sas_identify_frame)-4); -@@ -3322,7 +3321,6 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) - u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); - - struct pm8001_port *port = &pm8001_ha->port[port_id]; -- struct sas_ha_struct *sas_ha = pm8001_ha->sas; - struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; - unsigned long flags; - pm8001_dbg(pm8001_ha, DEVIO, -@@ -3336,7 +3334,7 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) - phy->phy_type |= PORT_TYPE_SATA; - phy->phy_attached = 1; - phy->sas_phy.oob_mode = SATA_OOB_MODE; -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); - spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); - memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4), - sizeof(struct dev_to_host_fis)); -@@ -3418,11 +3416,8 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) - break; - - } -- if (port_sata && (portstate != PORT_IN_RESET)) { -- struct sas_ha_struct *sas_ha = pm8001_ha->sas; -- -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); -- } -+ if (port_sata && (portstate != PORT_IN_RESET)) -+ sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); - } - - static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) -@@ -3520,7 +3515,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) - break; - case HW_EVENT_SATA_SPINUP_HOLD: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n"); -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); - break; - case HW_EVENT_PHY_DOWN: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n"); -@@ -3536,7 +3531,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n"); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - /* the broadcast change primitive received, tell the LIBSAS this event - to revalidate the sas domain*/ -@@ -3547,20 +3542,20 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) - spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); - sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE; - spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); -- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - break; - case HW_EVENT_PHY_ERROR: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n"); - sas_phy_disconnected(&phy->sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); -+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); - break; - case HW_EVENT_BROADCAST_EXP: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n"); - spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); - sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP; - spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); -- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - break; - case HW_EVENT_LINK_ERR_INVALID_DWORD: - pm8001_dbg(pm8001_ha, MSG, -@@ -3597,7 +3592,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) - spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); - sas_phy->sas_prim = HW_EVENT_BROADCAST_SES; - spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); -- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); -+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); - break; - case HW_EVENT_INBOUND_CRC_ERROR: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n"); -@@ -3607,13 +3602,13 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) - break; - case HW_EVENT_HARD_RESET_RECEIVED: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n"); -- sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET); -+ sas_notify_port_event(sas_phy, PORTE_HARD_RESET); - break; - case HW_EVENT_ID_FRAME_TIMEOUT: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n"); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - case HW_EVENT_LINK_ERR_PHY_RESET_FAILED: - pm8001_dbg(pm8001_ha, MSG, -@@ -3623,7 +3618,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) - port_id, phy_id, 0, 0); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - break; - case HW_EVENT_PORT_RESET_TIMER_TMO: - pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n"); -@@ -3631,7 +3626,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) - port_id, phy_id, 0, 0); - sas_phy_disconnected(sas_phy); - phy->phy_attached = 0; -- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); -+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); - if (pm8001_ha->phy[phy_id].reset_completion) { - pm8001_ha->phy[phy_id].port_reset_status = - PORT_RESET_TMO; -@@ -3648,7 +3643,7 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) - for (i = 0; i < pm8001_ha->chip->n_phy; i++) { - if (port->wide_port_phymap & (1 << i)) { - phy = &pm8001_ha->phy[i]; -- sas_ha->notify_phy_event(&phy->sas_phy, -+ sas_notify_phy_event(&phy->sas_phy, - PHYE_LOSS_OF_SIGNAL); - port->wide_port_phymap &= ~(1 << i); - } -diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c -index bb7431912d410..144a893e7335b 100644 ---- a/drivers/scsi/qla2xxx/qla_dbg.c -+++ b/drivers/scsi/qla2xxx/qla_dbg.c -@@ -202,6 +202,7 @@ qla24xx_dump_ram(struct qla_hw_data *ha, uint32_t addr, __be32 *ram, - wrt_reg_word(®->mailbox0, MBC_DUMP_RISC_RAM_EXTENDED); - wrt_reg_word(®->mailbox1, LSW(addr)); - wrt_reg_word(®->mailbox8, MSW(addr)); -+ wrt_reg_word(®->mailbox10, 0); - - wrt_reg_word(®->mailbox2, MSW(LSD(dump_dma))); - wrt_reg_word(®->mailbox3, LSW(LSD(dump_dma))); -diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c -index d7d4ab65009c4..510cbe2bf1e5b 100644 ---- a/drivers/scsi/qla2xxx/qla_mbx.c -+++ b/drivers/scsi/qla2xxx/qla_mbx.c -@@ -4276,7 +4276,8 @@ qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr, - if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) { - mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED; - mcp->mb[8] = MSW(addr); -- mcp->out_mb = MBX_8|MBX_0; -+ mcp->mb[10] = 0; -+ mcp->out_mb = MBX_10|MBX_8|MBX_0; - } else { - mcp->mb[0] = MBC_DUMP_RISC_RAM; - mcp->out_mb = MBX_0; -diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c -index a3d2d4bc4a3dc..6a3a163b07065 100644 ---- a/drivers/scsi/sd.c -+++ b/drivers/scsi/sd.c -@@ -707,9 +707,9 @@ static int sd_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, - put_unaligned_be16(spsp, &cdb[2]); - put_unaligned_be32(len, &cdb[6]); - -- ret = scsi_execute_req(sdev, cdb, -- send ? DMA_TO_DEVICE : DMA_FROM_DEVICE, -- buffer, len, NULL, SD_TIMEOUT, sdkp->max_retries, NULL); -+ ret = scsi_execute(sdev, cdb, send ? DMA_TO_DEVICE : DMA_FROM_DEVICE, -+ buffer, len, NULL, NULL, SD_TIMEOUT, sdkp->max_retries, 0, -+ RQF_PM, NULL); - return ret <= 0 ? ret : -EIO; - } - #endif /* CONFIG_BLK_SED_OPAL */ -diff --git a/drivers/scsi/sd_zbc.c b/drivers/scsi/sd_zbc.c -index cf07b7f935790..87a7274e4632b 100644 ---- a/drivers/scsi/sd_zbc.c -+++ b/drivers/scsi/sd_zbc.c -@@ -688,6 +688,7 @@ int sd_zbc_revalidate_zones(struct scsi_disk *sdkp) - unsigned int nr_zones = sdkp->rev_nr_zones; - u32 max_append; - int ret = 0; -+ unsigned int flags; - - /* - * For all zoned disks, initialize zone append emulation data if not -@@ -720,16 +721,19 @@ int sd_zbc_revalidate_zones(struct scsi_disk *sdkp) - disk->queue->nr_zones == nr_zones) - goto unlock; - -+ flags = memalloc_noio_save(); - sdkp->zone_blocks = zone_blocks; - sdkp->nr_zones = nr_zones; -- sdkp->rev_wp_offset = kvcalloc(nr_zones, sizeof(u32), GFP_NOIO); -+ sdkp->rev_wp_offset = kvcalloc(nr_zones, sizeof(u32), GFP_KERNEL); - if (!sdkp->rev_wp_offset) { - ret = -ENOMEM; -+ memalloc_noio_restore(flags); - goto unlock; - } - - ret = blk_revalidate_disk_zones(disk, sd_zbc_revalidate_zones_cb); - -+ memalloc_noio_restore(flags); - kvfree(sdkp->rev_wp_offset); - sdkp->rev_wp_offset = NULL; - -diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c -index fb32d122f2e38..728168cd18f55 100644 ---- a/drivers/scsi/ufs/ufshcd.c -+++ b/drivers/scsi/ufs/ufshcd.c -@@ -94,6 +94,8 @@ - 16, 4, buf, __len, false); \ - } while (0) - -+static bool early_suspend; -+ - int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len, - const char *prefix) - { -@@ -8939,8 +8941,14 @@ int ufshcd_system_suspend(struct ufs_hba *hba) - int ret = 0; - ktime_t start = ktime_get(); - -+ if (!hba) { -+ early_suspend = true; -+ return 0; -+ } -+ - down(&hba->eh_sem); -- if (!hba || !hba->is_powered) -+ -+ if (!hba->is_powered) - return 0; - - if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) == -@@ -8989,9 +8997,12 @@ int ufshcd_system_resume(struct ufs_hba *hba) - int ret = 0; - ktime_t start = ktime_get(); - -- if (!hba) { -- up(&hba->eh_sem); -+ if (!hba) - return -EINVAL; -+ -+ if (unlikely(early_suspend)) { -+ early_suspend = false; -+ down(&hba->eh_sem); - } - - if (!hba->is_powered || pm_runtime_suspended(hba->dev)) -diff --git a/drivers/soc/aspeed/aspeed-lpc-snoop.c b/drivers/soc/aspeed/aspeed-lpc-snoop.c -index 682ba0eb4eba1..20acac6342eff 100644 ---- a/drivers/soc/aspeed/aspeed-lpc-snoop.c -+++ b/drivers/soc/aspeed/aspeed-lpc-snoop.c -@@ -11,6 +11,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -67,6 +68,7 @@ struct aspeed_lpc_snoop_channel { - struct aspeed_lpc_snoop { - struct regmap *regmap; - int irq; -+ struct clk *clk; - struct aspeed_lpc_snoop_channel chan[NUM_SNOOP_CHANNELS]; - }; - -@@ -282,22 +284,42 @@ static int aspeed_lpc_snoop_probe(struct platform_device *pdev) - return -ENODEV; - } - -+ lpc_snoop->clk = devm_clk_get(dev, NULL); -+ if (IS_ERR(lpc_snoop->clk)) { -+ rc = PTR_ERR(lpc_snoop->clk); -+ if (rc != -EPROBE_DEFER) -+ dev_err(dev, "couldn't get clock\n"); -+ return rc; -+ } -+ rc = clk_prepare_enable(lpc_snoop->clk); -+ if (rc) { -+ dev_err(dev, "couldn't enable clock\n"); -+ return rc; -+ } -+ - rc = aspeed_lpc_snoop_config_irq(lpc_snoop, pdev); - if (rc) -- return rc; -+ goto err; - - rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 0, port); - if (rc) -- return rc; -+ goto err; - - /* Configuration of 2nd snoop channel port is optional */ - if (of_property_read_u32_index(dev->of_node, "snoop-ports", - 1, &port) == 0) { - rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 1, port); -- if (rc) -+ if (rc) { - aspeed_lpc_disable_snoop(lpc_snoop, 0); -+ goto err; -+ } - } - -+ return 0; -+ -+err: -+ clk_disable_unprepare(lpc_snoop->clk); -+ - return rc; - } - -@@ -309,6 +331,8 @@ static int aspeed_lpc_snoop_remove(struct platform_device *pdev) - aspeed_lpc_disable_snoop(lpc_snoop, 0); - aspeed_lpc_disable_snoop(lpc_snoop, 1); - -+ clk_disable_unprepare(lpc_snoop->clk); -+ - return 0; - } - -diff --git a/drivers/soc/aspeed/aspeed-socinfo.c b/drivers/soc/aspeed/aspeed-socinfo.c -index 773930e0cb100..e3215f826d17a 100644 ---- a/drivers/soc/aspeed/aspeed-socinfo.c -+++ b/drivers/soc/aspeed/aspeed-socinfo.c -@@ -25,6 +25,7 @@ static struct { - /* AST2600 */ - { "AST2600", 0x05000303 }, - { "AST2620", 0x05010203 }, -+ { "AST2605", 0x05030103 }, - }; - - static const char *siliconid_to_name(u32 siliconid) -@@ -43,14 +44,30 @@ static const char *siliconid_to_name(u32 siliconid) - static const char *siliconid_to_rev(u32 siliconid) - { - unsigned int rev = (siliconid >> 16) & 0xff; -- -- switch (rev) { -- case 0: -- return "A0"; -- case 1: -- return "A1"; -- case 3: -- return "A2"; -+ unsigned int gen = (siliconid >> 24) & 0xff; -+ -+ if (gen < 0x5) { -+ /* AST2500 and below */ -+ switch (rev) { -+ case 0: -+ return "A0"; -+ case 1: -+ return "A1"; -+ case 3: -+ return "A2"; -+ } -+ } else { -+ /* AST2600 */ -+ switch (rev) { -+ case 0: -+ return "A0"; -+ case 1: -+ return "A1"; -+ case 2: -+ return "A2"; -+ case 3: -+ return "A3"; -+ } - } - - return "??"; -diff --git a/drivers/soc/qcom/ocmem.c b/drivers/soc/qcom/ocmem.c -index 7f9e9944d1eae..f1875dc31ae2c 100644 ---- a/drivers/soc/qcom/ocmem.c -+++ b/drivers/soc/qcom/ocmem.c -@@ -189,6 +189,7 @@ struct ocmem *of_get_ocmem(struct device *dev) - { - struct platform_device *pdev; - struct device_node *devnode; -+ struct ocmem *ocmem; - - devnode = of_parse_phandle(dev->of_node, "sram", 0); - if (!devnode || !devnode->parent) { -@@ -202,7 +203,12 @@ struct ocmem *of_get_ocmem(struct device *dev) - return ERR_PTR(-EPROBE_DEFER); - } - -- return platform_get_drvdata(pdev); -+ ocmem = platform_get_drvdata(pdev); -+ if (!ocmem) { -+ dev_err(dev, "Cannot get ocmem\n"); -+ return ERR_PTR(-ENODEV); -+ } -+ return ocmem; - } - EXPORT_SYMBOL(of_get_ocmem); - -diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c -index d21530d24253e..6daa3c5771d16 100644 ---- a/drivers/soc/qcom/socinfo.c -+++ b/drivers/soc/qcom/socinfo.c -@@ -286,7 +286,7 @@ static int qcom_show_pmic_model(struct seq_file *seq, void *p) - if (model < 0) - return -EINVAL; - -- if (model <= ARRAY_SIZE(pmic_models) && pmic_models[model]) -+ if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) - seq_printf(seq, "%s\n", pmic_models[model]); - else - seq_printf(seq, "unknown (%d)\n", model); -diff --git a/drivers/soc/samsung/exynos-asv.c b/drivers/soc/samsung/exynos-asv.c -index 8abf4dfaa5c59..5daeadc363829 100644 ---- a/drivers/soc/samsung/exynos-asv.c -+++ b/drivers/soc/samsung/exynos-asv.c -@@ -119,11 +119,6 @@ static int exynos_asv_probe(struct platform_device *pdev) - u32 product_id = 0; - int ret, i; - -- cpu_dev = get_cpu_device(0); -- ret = dev_pm_opp_get_opp_count(cpu_dev); -- if (ret < 0) -- return -EPROBE_DEFER; -- - asv = devm_kzalloc(&pdev->dev, sizeof(*asv), GFP_KERNEL); - if (!asv) - return -ENOMEM; -@@ -134,7 +129,13 @@ static int exynos_asv_probe(struct platform_device *pdev) - return PTR_ERR(asv->chipid_regmap); - } - -- regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_PRO_ID, &product_id); -+ ret = regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_PRO_ID, -+ &product_id); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "Cannot read revision from ChipID: %d\n", -+ ret); -+ return -ENODEV; -+ } - - switch (product_id & EXYNOS_MASK) { - case 0xE5422000: -@@ -144,6 +145,11 @@ static int exynos_asv_probe(struct platform_device *pdev) - return -ENODEV; - } - -+ cpu_dev = get_cpu_device(0); -+ ret = dev_pm_opp_get_opp_count(cpu_dev); -+ if (ret < 0) -+ return -EPROBE_DEFER; -+ - ret = of_property_read_u32(pdev->dev.of_node, "samsung,asv-bin", - &asv->of_bin); - if (ret < 0) -diff --git a/drivers/soc/ti/pm33xx.c b/drivers/soc/ti/pm33xx.c -index 64f3e31055401..7bab4bbaf02dc 100644 ---- a/drivers/soc/ti/pm33xx.c -+++ b/drivers/soc/ti/pm33xx.c -@@ -535,7 +535,7 @@ static int am33xx_pm_probe(struct platform_device *pdev) - - ret = am33xx_push_sram_idle(); - if (ret) -- goto err_free_sram; -+ goto err_unsetup_rtc; - - am33xx_pm_set_ipc_ops(); - -@@ -575,6 +575,9 @@ err_pm_runtime_put: - err_pm_runtime_disable: - pm_runtime_disable(dev); - wkup_m3_ipc_put(m3_ipc); -+err_unsetup_rtc: -+ iounmap(rtc_base_virt); -+ clk_put(rtc_fck); - err_free_sram: - am33xx_pm_free_sram(); - pm33xx_dev = NULL; -diff --git a/drivers/soundwire/bus.c b/drivers/soundwire/bus.c -index d1e8c3a54976b..662b3b0302467 100644 ---- a/drivers/soundwire/bus.c -+++ b/drivers/soundwire/bus.c -@@ -405,10 +405,11 @@ sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) - return sdw_transfer(slave->bus, &msg); - } - --static int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value) -+int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value) - { - return sdw_nwrite_no_pm(slave, addr, 1, &value); - } -+EXPORT_SYMBOL(sdw_write_no_pm); - - static int - sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr) -@@ -476,8 +477,7 @@ int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 val - } - EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked); - --static int --sdw_read_no_pm(struct sdw_slave *slave, u32 addr) -+int sdw_read_no_pm(struct sdw_slave *slave, u32 addr) - { - u8 buf; - int ret; -@@ -488,6 +488,19 @@ sdw_read_no_pm(struct sdw_slave *slave, u32 addr) - else - return buf; - } -+EXPORT_SYMBOL(sdw_read_no_pm); -+ -+static int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) -+{ -+ int tmp; -+ -+ tmp = sdw_read_no_pm(slave, addr); -+ if (tmp < 0) -+ return tmp; -+ -+ tmp = (tmp & ~mask) | val; -+ return sdw_write_no_pm(slave, addr, tmp); -+} - - /** - * sdw_nread() - Read "n" contiguous SDW Slave registers -@@ -500,16 +513,16 @@ int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) - { - int ret; - -- ret = pm_runtime_get_sync(slave->bus->dev); -+ ret = pm_runtime_get_sync(&slave->dev); - if (ret < 0 && ret != -EACCES) { -- pm_runtime_put_noidle(slave->bus->dev); -+ pm_runtime_put_noidle(&slave->dev); - return ret; - } - - ret = sdw_nread_no_pm(slave, addr, count, val); - -- pm_runtime_mark_last_busy(slave->bus->dev); -- pm_runtime_put(slave->bus->dev); -+ pm_runtime_mark_last_busy(&slave->dev); -+ pm_runtime_put(&slave->dev); - - return ret; - } -@@ -526,16 +539,16 @@ int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) - { - int ret; - -- ret = pm_runtime_get_sync(slave->bus->dev); -+ ret = pm_runtime_get_sync(&slave->dev); - if (ret < 0 && ret != -EACCES) { -- pm_runtime_put_noidle(slave->bus->dev); -+ pm_runtime_put_noidle(&slave->dev); - return ret; - } - - ret = sdw_nwrite_no_pm(slave, addr, count, val); - -- pm_runtime_mark_last_busy(slave->bus->dev); -- pm_runtime_put(slave->bus->dev); -+ pm_runtime_mark_last_busy(&slave->dev); -+ pm_runtime_put(&slave->dev); - - return ret; - } -@@ -1210,7 +1223,7 @@ static int sdw_slave_set_frequency(struct sdw_slave *slave) - } - scale_index++; - -- ret = sdw_write(slave, SDW_SCP_BUS_CLOCK_BASE, base); -+ ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base); - if (ret < 0) { - dev_err(&slave->dev, - "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret); -@@ -1218,13 +1231,13 @@ static int sdw_slave_set_frequency(struct sdw_slave *slave) - } - - /* initialize scale for both banks */ -- ret = sdw_write(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index); -+ ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index); - if (ret < 0) { - dev_err(&slave->dev, - "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret); - return ret; - } -- ret = sdw_write(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index); -+ ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index); - if (ret < 0) - dev_err(&slave->dev, - "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret); -@@ -1256,7 +1269,7 @@ static int sdw_initialize_slave(struct sdw_slave *slave) - val = slave->prop.scp_int1_mask; - - /* Enable SCP interrupts */ -- ret = sdw_update(slave, SDW_SCP_INTMASK1, val, val); -+ ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val); - if (ret < 0) { - dev_err(slave->bus->dev, - "SDW_SCP_INTMASK1 write failed:%d\n", ret); -@@ -1271,7 +1284,7 @@ static int sdw_initialize_slave(struct sdw_slave *slave) - val = prop->dp0_prop->imp_def_interrupts; - val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE; - -- ret = sdw_update(slave, SDW_DP0_INTMASK, val, val); -+ ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val); - if (ret < 0) - dev_err(slave->bus->dev, - "SDW_DP0_INTMASK read failed:%d\n", ret); -@@ -1440,7 +1453,7 @@ static int sdw_handle_slave_alerts(struct sdw_slave *slave) - ret = pm_runtime_get_sync(&slave->dev); - if (ret < 0 && ret != -EACCES) { - dev_err(&slave->dev, "Failed to resume device: %d\n", ret); -- pm_runtime_put_noidle(slave->bus->dev); -+ pm_runtime_put_noidle(&slave->dev); - return ret; - } - -diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c -index 9fa55164354a2..580660599f461 100644 ---- a/drivers/soundwire/cadence_master.c -+++ b/drivers/soundwire/cadence_master.c -@@ -484,10 +484,10 @@ cdns_fill_msg_resp(struct sdw_cdns *cdns, - if (!(cdns->response_buf[i] & CDNS_MCP_RESP_ACK)) { - no_ack = 1; - dev_dbg_ratelimited(cdns->dev, "Msg Ack not received\n"); -- if (cdns->response_buf[i] & CDNS_MCP_RESP_NACK) { -- nack = 1; -- dev_err_ratelimited(cdns->dev, "Msg NACK received\n"); -- } -+ } -+ if (cdns->response_buf[i] & CDNS_MCP_RESP_NACK) { -+ nack = 1; -+ dev_err_ratelimited(cdns->dev, "Msg NACK received\n"); - } - } - -diff --git a/drivers/soundwire/intel_init.c b/drivers/soundwire/intel_init.c -index cabdadb09a1bb..bc8520eb385ec 100644 ---- a/drivers/soundwire/intel_init.c -+++ b/drivers/soundwire/intel_init.c -@@ -405,11 +405,12 @@ int sdw_intel_acpi_scan(acpi_handle *parent_handle, - { - acpi_status status; - -+ info->handle = NULL; - status = acpi_walk_namespace(ACPI_TYPE_DEVICE, - parent_handle, 1, - sdw_intel_acpi_cb, - NULL, info, NULL); -- if (ACPI_FAILURE(status)) -+ if (ACPI_FAILURE(status) || info->handle == NULL) - return -ENODEV; - - return sdw_intel_scan_controller(info); -diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c -index 948396b382d73..f429436082afa 100644 ---- a/drivers/spi/spi-atmel.c -+++ b/drivers/spi/spi-atmel.c -@@ -1590,7 +1590,7 @@ static int atmel_spi_probe(struct platform_device *pdev) - if (ret == 0) { - as->use_dma = true; - } else if (ret == -EPROBE_DEFER) { -- return ret; -+ goto out_unmap_regs; - } - } else if (as->caps.has_pdc_support) { - as->use_pdc = true; -diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c -index ba7d40c2922f7..826b01f346246 100644 ---- a/drivers/spi/spi-cadence-quadspi.c -+++ b/drivers/spi/spi-cadence-quadspi.c -@@ -461,7 +461,7 @@ static int cqspi_read_setup(struct cqspi_flash_pdata *f_pdata, - /* Setup dummy clock cycles */ - dummy_clk = op->dummy.nbytes * 8; - if (dummy_clk > CQSPI_DUMMY_CLKS_MAX) -- dummy_clk = CQSPI_DUMMY_CLKS_MAX; -+ return -EOPNOTSUPP; - - if (dummy_clk) - reg |= (dummy_clk & CQSPI_REG_RD_INSTR_DUMMY_MASK) -diff --git a/drivers/spi/spi-dw-bt1.c b/drivers/spi/spi-dw-bt1.c -index 4aa8596fb1f2b..5be6b7b80c21b 100644 ---- a/drivers/spi/spi-dw-bt1.c -+++ b/drivers/spi/spi-dw-bt1.c -@@ -84,7 +84,7 @@ static void dw_spi_bt1_dirmap_copy_from_map(void *to, void __iomem *from, size_t - if (shift) { - chunk = min_t(size_t, 4 - shift, len); - data = readl_relaxed(from - shift); -- memcpy(to, &data + shift, chunk); -+ memcpy(to, (char *)&data + shift, chunk); - from += chunk; - to += chunk; - len -= chunk; -diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c -index 6d8e0a05a5355..e4a8d203f9408 100644 ---- a/drivers/spi/spi-fsl-spi.c -+++ b/drivers/spi/spi-fsl-spi.c -@@ -695,7 +695,7 @@ static void fsl_spi_cs_control(struct spi_device *spi, bool on) - - if (WARN_ON_ONCE(!pinfo->immr_spi_cs)) - return; -- iowrite32be(on ? SPI_BOOT_SEL_BIT : 0, pinfo->immr_spi_cs); -+ iowrite32be(on ? 0 : SPI_BOOT_SEL_BIT, pinfo->immr_spi_cs); - } - } - -diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c -index 73ca821763d69..5dc4ea4b4450e 100644 ---- a/drivers/spi/spi-imx.c -+++ b/drivers/spi/spi-imx.c -@@ -1685,7 +1685,7 @@ static int spi_imx_probe(struct platform_device *pdev) - master->dev.of_node = pdev->dev.of_node; - ret = spi_bitbang_start(&spi_imx->bitbang); - if (ret) { -- dev_err(&pdev->dev, "bitbang start failed with %d\n", ret); -+ dev_err_probe(&pdev->dev, ret, "bitbang start failed\n"); - goto out_bitbang_start; - } - -diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c -index f236e3034cf85..aafac128bb5f1 100644 ---- a/drivers/spi/spi-pxa2xx-pci.c -+++ b/drivers/spi/spi-pxa2xx-pci.c -@@ -21,7 +21,8 @@ enum { - PORT_BSW1, - PORT_BSW2, - PORT_CE4100, -- PORT_LPT, -+ PORT_LPT0, -+ PORT_LPT1, - }; - - struct pxa_spi_info { -@@ -57,8 +58,10 @@ static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 }; - static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 }; - static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 }; - --static struct dw_dma_slave lpt_tx_param = { .dst_id = 0 }; --static struct dw_dma_slave lpt_rx_param = { .src_id = 1 }; -+static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 }; -+static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 }; -+static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 }; -+static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 }; - - static bool lpss_dma_filter(struct dma_chan *chan, void *param) - { -@@ -185,12 +188,19 @@ static struct pxa_spi_info spi_info_configs[] = { - .num_chipselect = 1, - .max_clk_rate = 50000000, - }, -- [PORT_LPT] = { -+ [PORT_LPT0] = { - .type = LPSS_LPT_SSP, - .port_id = 0, - .setup = lpss_spi_setup, -- .tx_param = &lpt_tx_param, -- .rx_param = &lpt_rx_param, -+ .tx_param = &lpt0_tx_param, -+ .rx_param = &lpt0_rx_param, -+ }, -+ [PORT_LPT1] = { -+ .type = LPSS_LPT_SSP, -+ .port_id = 1, -+ .setup = lpss_spi_setup, -+ .tx_param = &lpt1_tx_param, -+ .rx_param = &lpt1_rx_param, - }, - }; - -@@ -285,8 +295,9 @@ static const struct pci_device_id pxa2xx_spi_pci_devices[] = { - { PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 }, - { PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 }, - { PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 }, -- { PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT }, -- { }, -+ { PCI_VDEVICE(INTEL, 0x9ce5), PORT_LPT0 }, -+ { PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT1 }, -+ { } - }; - MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices); - -diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c -index 6017209c6d2f7..6eeb39669a866 100644 ---- a/drivers/spi/spi-stm32.c -+++ b/drivers/spi/spi-stm32.c -@@ -1677,6 +1677,10 @@ static int stm32_spi_transfer_one(struct spi_master *master, - struct stm32_spi *spi = spi_master_get_devdata(master); - int ret; - -+ /* Don't do anything on 0 bytes transfers */ -+ if (transfer->len == 0) -+ return 0; -+ - spi->tx_buf = transfer->tx_buf; - spi->rx_buf = transfer->rx_buf; - spi->tx_len = spi->tx_buf ? transfer->len : 0; -diff --git a/drivers/spi/spi-synquacer.c b/drivers/spi/spi-synquacer.c -index 8cdca6ab80989..ea706d9629cb1 100644 ---- a/drivers/spi/spi-synquacer.c -+++ b/drivers/spi/spi-synquacer.c -@@ -490,6 +490,10 @@ static void synquacer_spi_set_cs(struct spi_device *spi, bool enable) - val &= ~(SYNQUACER_HSSPI_DMPSEL_CS_MASK << - SYNQUACER_HSSPI_DMPSEL_CS_SHIFT); - val |= spi->chip_select << SYNQUACER_HSSPI_DMPSEL_CS_SHIFT; -+ -+ if (!enable) -+ val |= SYNQUACER_HSSPI_DMSTOP_STOP; -+ - writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); - } - -diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c -index 720ab34784c1d..ccca3a7409fac 100644 ---- a/drivers/spi/spi.c -+++ b/drivers/spi/spi.c -@@ -1267,7 +1267,7 @@ static int spi_transfer_one_message(struct spi_controller *ctlr, - ptp_read_system_prets(xfer->ptp_sts); - } - -- if (xfer->tx_buf || xfer->rx_buf) { -+ if ((xfer->tx_buf || xfer->rx_buf) && xfer->len) { - reinit_completion(&ctlr->xfer_completion); - - fallback_pio: -diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c -index de844b4121107..bbbd311eda030 100644 ---- a/drivers/spmi/spmi-pmic-arb.c -+++ b/drivers/spmi/spmi-pmic-arb.c -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0-only - /* -- * Copyright (c) 2012-2015, 2017, The Linux Foundation. All rights reserved. -+ * Copyright (c) 2012-2015, 2017, 2021, The Linux Foundation. All rights reserved. - */ - #include - #include -@@ -505,8 +505,7 @@ static void cleanup_irq(struct spmi_pmic_arb *pmic_arb, u16 apid, int id) - static void periph_interrupt(struct spmi_pmic_arb *pmic_arb, u16 apid) - { - unsigned int irq; -- u32 status; -- int id; -+ u32 status, id; - u8 sid = (pmic_arb->apid_data[apid].ppid >> 8) & 0xF; - u8 per = pmic_arb->apid_data[apid].ppid & 0xFF; - -diff --git a/drivers/staging/gdm724x/gdm_usb.c b/drivers/staging/gdm724x/gdm_usb.c -index dc4da66c3695b..54bdb64f52e88 100644 ---- a/drivers/staging/gdm724x/gdm_usb.c -+++ b/drivers/staging/gdm724x/gdm_usb.c -@@ -56,20 +56,24 @@ static int gdm_usb_recv(void *priv_dev, - - static int request_mac_address(struct lte_udev *udev) - { -- u8 buf[16] = {0,}; -- struct hci_packet *hci = (struct hci_packet *)buf; -+ struct hci_packet *hci; - struct usb_device *usbdev = udev->usbdev; - int actual; - int ret = -1; - -+ hci = kmalloc(struct_size(hci, data, 1), GFP_KERNEL); -+ if (!hci) -+ return -ENOMEM; -+ - hci->cmd_evt = gdm_cpu_to_dev16(udev->gdm_ed, LTE_GET_INFORMATION); - hci->len = gdm_cpu_to_dev16(udev->gdm_ed, 1); - hci->data[0] = MAC_ADDRESS; - -- ret = usb_bulk_msg(usbdev, usb_sndbulkpipe(usbdev, 2), buf, 5, -+ ret = usb_bulk_msg(usbdev, usb_sndbulkpipe(usbdev, 2), hci, 5, - &actual, 1000); - - udev->request_mac_addr = 1; -+ kfree(hci); - - return ret; - } -diff --git a/drivers/staging/media/allegro-dvt/allegro-core.c b/drivers/staging/media/allegro-dvt/allegro-core.c -index 9f718f43282bc..640451134072b 100644 ---- a/drivers/staging/media/allegro-dvt/allegro-core.c -+++ b/drivers/staging/media/allegro-dvt/allegro-core.c -@@ -2483,8 +2483,6 @@ static int allegro_open(struct file *file) - INIT_LIST_HEAD(&channel->buffers_reference); - INIT_LIST_HEAD(&channel->buffers_intermediate); - -- list_add(&channel->list, &dev->channels); -- - channel->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, channel, - allegro_queue_init); - -@@ -2493,6 +2491,7 @@ static int allegro_open(struct file *file) - goto error; - } - -+ list_add(&channel->list, &dev->channels); - file->private_data = &channel->fh; - v4l2_fh_add(&channel->fh); - -diff --git a/drivers/staging/media/atomisp/pci/atomisp_subdev.c b/drivers/staging/media/atomisp/pci/atomisp_subdev.c -index b666cb23e5ca1..2ef5f44e4b6b6 100644 ---- a/drivers/staging/media/atomisp/pci/atomisp_subdev.c -+++ b/drivers/staging/media/atomisp/pci/atomisp_subdev.c -@@ -349,12 +349,20 @@ static int isp_subdev_get_selection(struct v4l2_subdev *sd, - return 0; - } - --static char *atomisp_pad_str[] = { "ATOMISP_SUBDEV_PAD_SINK", -- "ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE", -- "ATOMISP_SUBDEV_PAD_SOURCE_VF", -- "ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW", -- "ATOMISP_SUBDEV_PAD_SOURCE_VIDEO" -- }; -+static const char *atomisp_pad_str(unsigned int pad) -+{ -+ static const char *const pad_str[] = { -+ "ATOMISP_SUBDEV_PAD_SINK", -+ "ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE", -+ "ATOMISP_SUBDEV_PAD_SOURCE_VF", -+ "ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW", -+ "ATOMISP_SUBDEV_PAD_SOURCE_VIDEO", -+ }; -+ -+ if (pad >= ARRAY_SIZE(pad_str)) -+ return "ATOMISP_INVALID_PAD"; -+ return pad_str[pad]; -+} - - int atomisp_subdev_set_selection(struct v4l2_subdev *sd, - struct v4l2_subdev_pad_config *cfg, -@@ -378,7 +386,7 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd, - - dev_dbg(isp->dev, - "sel: pad %s tgt %s l %d t %d w %d h %d which %s f 0x%8.8x\n", -- atomisp_pad_str[pad], target == V4L2_SEL_TGT_CROP -+ atomisp_pad_str(pad), target == V4L2_SEL_TGT_CROP - ? "V4L2_SEL_TGT_CROP" : "V4L2_SEL_TGT_COMPOSE", - r->left, r->top, r->width, r->height, - which == V4L2_SUBDEV_FORMAT_TRY ? "V4L2_SUBDEV_FORMAT_TRY" -@@ -612,7 +620,7 @@ void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd, - enum atomisp_input_stream_id stream_id; - - dev_dbg(isp->dev, "ffmt: pad %s w %d h %d code 0x%8.8x which %s\n", -- atomisp_pad_str[pad], ffmt->width, ffmt->height, ffmt->code, -+ atomisp_pad_str(pad), ffmt->width, ffmt->height, ffmt->code, - which == V4L2_SUBDEV_FORMAT_TRY ? "V4L2_SUBDEV_FORMAT_TRY" - : "V4L2_SUBDEV_FORMAT_ACTIVE"); - -diff --git a/drivers/staging/media/atomisp/pci/hmm/hmm.c b/drivers/staging/media/atomisp/pci/hmm/hmm.c -index e0eaff0f8a228..6a5ee46070898 100644 ---- a/drivers/staging/media/atomisp/pci/hmm/hmm.c -+++ b/drivers/staging/media/atomisp/pci/hmm/hmm.c -@@ -269,7 +269,7 @@ ia_css_ptr hmm_alloc(size_t bytes, enum hmm_bo_type type, - hmm_set(bo->start, 0, bytes); - - dev_dbg(atomisp_dev, -- "%s: pages: 0x%08x (%ld bytes), type: %d from highmem %d, user ptr %p, cached %d\n", -+ "%s: pages: 0x%08x (%zu bytes), type: %d from highmem %d, user ptr %p, cached %d\n", - __func__, bo->start, bytes, type, from_highmem, userptr, cached); - - return bo->start; -diff --git a/drivers/staging/media/imx/imx-media-csc-scaler.c b/drivers/staging/media/imx/imx-media-csc-scaler.c -index fab1155a5958c..63a0204502a8b 100644 ---- a/drivers/staging/media/imx/imx-media-csc-scaler.c -+++ b/drivers/staging/media/imx/imx-media-csc-scaler.c -@@ -869,11 +869,7 @@ void imx_media_csc_scaler_device_unregister(struct imx_media_video_dev *vdev) - struct ipu_csc_scaler_priv *priv = vdev_to_priv(vdev); - struct video_device *vfd = priv->vdev.vfd; - -- mutex_lock(&priv->mutex); -- - video_unregister_device(vfd); -- -- mutex_unlock(&priv->mutex); - } - - struct imx_media_video_dev * -diff --git a/drivers/staging/media/imx/imx-media-dev.c b/drivers/staging/media/imx/imx-media-dev.c -index 6d2205461e565..338b8bd0bb076 100644 ---- a/drivers/staging/media/imx/imx-media-dev.c -+++ b/drivers/staging/media/imx/imx-media-dev.c -@@ -53,6 +53,7 @@ static int imx6_media_probe_complete(struct v4l2_async_notifier *notifier) - imxmd->m2m_vdev = imx_media_csc_scaler_device_init(imxmd); - if (IS_ERR(imxmd->m2m_vdev)) { - ret = PTR_ERR(imxmd->m2m_vdev); -+ imxmd->m2m_vdev = NULL; - goto unlock; - } - -@@ -107,10 +108,14 @@ static int imx_media_remove(struct platform_device *pdev) - - v4l2_info(&imxmd->v4l2_dev, "Removing imx-media\n"); - -+ if (imxmd->m2m_vdev) { -+ imx_media_csc_scaler_device_unregister(imxmd->m2m_vdev); -+ imxmd->m2m_vdev = NULL; -+ } -+ - v4l2_async_notifier_unregister(&imxmd->notifier); - imx_media_unregister_ipu_internal_subdevs(imxmd); - v4l2_async_notifier_cleanup(&imxmd->notifier); -- imx_media_csc_scaler_device_unregister(imxmd->m2m_vdev); - media_device_unregister(&imxmd->md); - v4l2_device_unregister(&imxmd->v4l2_dev); - media_device_cleanup(&imxmd->md); -diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c -index a3f3df9017046..ac52b1daf9914 100644 ---- a/drivers/staging/media/imx/imx7-media-csi.c -+++ b/drivers/staging/media/imx/imx7-media-csi.c -@@ -499,6 +499,7 @@ static int imx7_csi_pad_link_validate(struct v4l2_subdev *sd, - struct v4l2_subdev_format *sink_fmt) - { - struct imx7_csi *csi = v4l2_get_subdevdata(sd); -+ struct media_entity *src; - struct media_pad *pad; - int ret; - -@@ -509,11 +510,21 @@ static int imx7_csi_pad_link_validate(struct v4l2_subdev *sd, - if (!csi->src_sd) - return -EPIPE; - -+ src = &csi->src_sd->entity; -+ -+ /* -+ * if the source is neither a CSI MUX or CSI-2 get the one directly -+ * upstream from this CSI -+ */ -+ if (src->function != MEDIA_ENT_F_VID_IF_BRIDGE && -+ src->function != MEDIA_ENT_F_VID_MUX) -+ src = &csi->sd.entity; -+ - /* -- * find the entity that is selected by the CSI mux. This is needed -+ * find the entity that is selected by the source. This is needed - * to distinguish between a parallel or CSI-2 pipeline. - */ -- pad = imx_media_pipeline_pad(&csi->src_sd->entity, 0, 0, true); -+ pad = imx_media_pipeline_pad(src, 0, 0, true); - if (!pad) - return -ENODEV; - -@@ -1164,12 +1175,12 @@ static int imx7_csi_notify_bound(struct v4l2_async_notifier *notifier, - struct imx7_csi *csi = imx7_csi_notifier_to_dev(notifier); - struct media_pad *sink = &csi->sd.entity.pads[IMX7_CSI_PAD_SINK]; - -- /* The bound subdev must always be the CSI mux */ -- if (WARN_ON(sd->entity.function != MEDIA_ENT_F_VID_MUX)) -- return -ENXIO; -- -- /* Mark it as such via its group id */ -- sd->grp_id = IMX_MEDIA_GRP_ID_CSI_MUX; -+ /* -+ * If the subdev is a video mux, it must be one of the CSI -+ * muxes. Mark it as such via its group id. -+ */ -+ if (sd->entity.function == MEDIA_ENT_F_VID_MUX) -+ sd->grp_id = IMX_MEDIA_GRP_ID_CSI_MUX; - - return v4l2_create_fwnode_links_to_pad(sd, sink); - } -diff --git a/drivers/staging/mt7621-dma/Makefile b/drivers/staging/mt7621-dma/Makefile -index 66da1bf10c32e..23256d1286f3e 100644 ---- a/drivers/staging/mt7621-dma/Makefile -+++ b/drivers/staging/mt7621-dma/Makefile -@@ -1,4 +1,4 @@ - # SPDX-License-Identifier: GPL-2.0 --obj-$(CONFIG_MTK_HSDMA) += mtk-hsdma.o -+obj-$(CONFIG_MTK_HSDMA) += hsdma-mt7621.o - - ccflags-y += -I$(srctree)/drivers/dma -diff --git a/drivers/staging/mt7621-dma/hsdma-mt7621.c b/drivers/staging/mt7621-dma/hsdma-mt7621.c -new file mode 100644 -index 0000000000000..b0ed935de7acc ---- /dev/null -+++ b/drivers/staging/mt7621-dma/hsdma-mt7621.c -@@ -0,0 +1,760 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2015, Michael Lee -+ * MTK HSDMA support -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "virt-dma.h" -+ -+#define HSDMA_BASE_OFFSET 0x800 -+ -+#define HSDMA_REG_TX_BASE 0x00 -+#define HSDMA_REG_TX_CNT 0x04 -+#define HSDMA_REG_TX_CTX 0x08 -+#define HSDMA_REG_TX_DTX 0x0c -+#define HSDMA_REG_RX_BASE 0x100 -+#define HSDMA_REG_RX_CNT 0x104 -+#define HSDMA_REG_RX_CRX 0x108 -+#define HSDMA_REG_RX_DRX 0x10c -+#define HSDMA_REG_INFO 0x200 -+#define HSDMA_REG_GLO_CFG 0x204 -+#define HSDMA_REG_RST_CFG 0x208 -+#define HSDMA_REG_DELAY_INT 0x20c -+#define HSDMA_REG_FREEQ_THRES 0x210 -+#define HSDMA_REG_INT_STATUS 0x220 -+#define HSDMA_REG_INT_MASK 0x228 -+#define HSDMA_REG_SCH_Q01 0x280 -+#define HSDMA_REG_SCH_Q23 0x284 -+ -+#define HSDMA_DESCS_MAX 0xfff -+#define HSDMA_DESCS_NUM 8 -+#define HSDMA_DESCS_MASK (HSDMA_DESCS_NUM - 1) -+#define HSDMA_NEXT_DESC(x) (((x) + 1) & HSDMA_DESCS_MASK) -+ -+/* HSDMA_REG_INFO */ -+#define HSDMA_INFO_INDEX_MASK 0xf -+#define HSDMA_INFO_INDEX_SHIFT 24 -+#define HSDMA_INFO_BASE_MASK 0xff -+#define HSDMA_INFO_BASE_SHIFT 16 -+#define HSDMA_INFO_RX_MASK 0xff -+#define HSDMA_INFO_RX_SHIFT 8 -+#define HSDMA_INFO_TX_MASK 0xff -+#define HSDMA_INFO_TX_SHIFT 0 -+ -+/* HSDMA_REG_GLO_CFG */ -+#define HSDMA_GLO_TX_2B_OFFSET BIT(31) -+#define HSDMA_GLO_CLK_GATE BIT(30) -+#define HSDMA_GLO_BYTE_SWAP BIT(29) -+#define HSDMA_GLO_MULTI_DMA BIT(10) -+#define HSDMA_GLO_TWO_BUF BIT(9) -+#define HSDMA_GLO_32B_DESC BIT(8) -+#define HSDMA_GLO_BIG_ENDIAN BIT(7) -+#define HSDMA_GLO_TX_DONE BIT(6) -+#define HSDMA_GLO_BT_MASK 0x3 -+#define HSDMA_GLO_BT_SHIFT 4 -+#define HSDMA_GLO_RX_BUSY BIT(3) -+#define HSDMA_GLO_RX_DMA BIT(2) -+#define HSDMA_GLO_TX_BUSY BIT(1) -+#define HSDMA_GLO_TX_DMA BIT(0) -+ -+#define HSDMA_BT_SIZE_16BYTES (0 << HSDMA_GLO_BT_SHIFT) -+#define HSDMA_BT_SIZE_32BYTES (1 << HSDMA_GLO_BT_SHIFT) -+#define HSDMA_BT_SIZE_64BYTES (2 << HSDMA_GLO_BT_SHIFT) -+#define HSDMA_BT_SIZE_128BYTES (3 << HSDMA_GLO_BT_SHIFT) -+ -+#define HSDMA_GLO_DEFAULT (HSDMA_GLO_MULTI_DMA | \ -+ HSDMA_GLO_RX_DMA | HSDMA_GLO_TX_DMA | HSDMA_BT_SIZE_32BYTES) -+ -+/* HSDMA_REG_RST_CFG */ -+#define HSDMA_RST_RX_SHIFT 16 -+#define HSDMA_RST_TX_SHIFT 0 -+ -+/* HSDMA_REG_DELAY_INT */ -+#define HSDMA_DELAY_INT_EN BIT(15) -+#define HSDMA_DELAY_PEND_OFFSET 8 -+#define HSDMA_DELAY_TIME_OFFSET 0 -+#define HSDMA_DELAY_TX_OFFSET 16 -+#define HSDMA_DELAY_RX_OFFSET 0 -+ -+#define HSDMA_DELAY_INIT(x) (HSDMA_DELAY_INT_EN | \ -+ ((x) << HSDMA_DELAY_PEND_OFFSET)) -+#define HSDMA_DELAY(x) ((HSDMA_DELAY_INIT(x) << \ -+ HSDMA_DELAY_TX_OFFSET) | HSDMA_DELAY_INIT(x)) -+ -+/* HSDMA_REG_INT_STATUS */ -+#define HSDMA_INT_DELAY_RX_COH BIT(31) -+#define HSDMA_INT_DELAY_RX_INT BIT(30) -+#define HSDMA_INT_DELAY_TX_COH BIT(29) -+#define HSDMA_INT_DELAY_TX_INT BIT(28) -+#define HSDMA_INT_RX_MASK 0x3 -+#define HSDMA_INT_RX_SHIFT 16 -+#define HSDMA_INT_RX_Q0 BIT(16) -+#define HSDMA_INT_TX_MASK 0xf -+#define HSDMA_INT_TX_SHIFT 0 -+#define HSDMA_INT_TX_Q0 BIT(0) -+ -+/* tx/rx dma desc flags */ -+#define HSDMA_PLEN_MASK 0x3fff -+#define HSDMA_DESC_DONE BIT(31) -+#define HSDMA_DESC_LS0 BIT(30) -+#define HSDMA_DESC_PLEN0(_x) (((_x) & HSDMA_PLEN_MASK) << 16) -+#define HSDMA_DESC_TAG BIT(15) -+#define HSDMA_DESC_LS1 BIT(14) -+#define HSDMA_DESC_PLEN1(_x) ((_x) & HSDMA_PLEN_MASK) -+ -+/* align 4 bytes */ -+#define HSDMA_ALIGN_SIZE 3 -+/* align size 128bytes */ -+#define HSDMA_MAX_PLEN 0x3f80 -+ -+struct hsdma_desc { -+ u32 addr0; -+ u32 flags; -+ u32 addr1; -+ u32 unused; -+}; -+ -+struct mtk_hsdma_sg { -+ dma_addr_t src_addr; -+ dma_addr_t dst_addr; -+ u32 len; -+}; -+ -+struct mtk_hsdma_desc { -+ struct virt_dma_desc vdesc; -+ unsigned int num_sgs; -+ struct mtk_hsdma_sg sg[1]; -+}; -+ -+struct mtk_hsdma_chan { -+ struct virt_dma_chan vchan; -+ unsigned int id; -+ dma_addr_t desc_addr; -+ int tx_idx; -+ int rx_idx; -+ struct hsdma_desc *tx_ring; -+ struct hsdma_desc *rx_ring; -+ struct mtk_hsdma_desc *desc; -+ unsigned int next_sg; -+}; -+ -+struct mtk_hsdam_engine { -+ struct dma_device ddev; -+ struct device_dma_parameters dma_parms; -+ void __iomem *base; -+ struct tasklet_struct task; -+ volatile unsigned long chan_issued; -+ -+ struct mtk_hsdma_chan chan[1]; -+}; -+ -+static inline struct mtk_hsdam_engine *mtk_hsdma_chan_get_dev( -+ struct mtk_hsdma_chan *chan) -+{ -+ return container_of(chan->vchan.chan.device, struct mtk_hsdam_engine, -+ ddev); -+} -+ -+static inline struct mtk_hsdma_chan *to_mtk_hsdma_chan(struct dma_chan *c) -+{ -+ return container_of(c, struct mtk_hsdma_chan, vchan.chan); -+} -+ -+static inline struct mtk_hsdma_desc *to_mtk_hsdma_desc( -+ struct virt_dma_desc *vdesc) -+{ -+ return container_of(vdesc, struct mtk_hsdma_desc, vdesc); -+} -+ -+static inline u32 mtk_hsdma_read(struct mtk_hsdam_engine *hsdma, u32 reg) -+{ -+ return readl(hsdma->base + reg); -+} -+ -+static inline void mtk_hsdma_write(struct mtk_hsdam_engine *hsdma, -+ unsigned int reg, u32 val) -+{ -+ writel(val, hsdma->base + reg); -+} -+ -+static void mtk_hsdma_reset_chan(struct mtk_hsdam_engine *hsdma, -+ struct mtk_hsdma_chan *chan) -+{ -+ chan->tx_idx = 0; -+ chan->rx_idx = HSDMA_DESCS_NUM - 1; -+ -+ mtk_hsdma_write(hsdma, HSDMA_REG_TX_CTX, chan->tx_idx); -+ mtk_hsdma_write(hsdma, HSDMA_REG_RX_CRX, chan->rx_idx); -+ -+ mtk_hsdma_write(hsdma, HSDMA_REG_RST_CFG, -+ 0x1 << (chan->id + HSDMA_RST_TX_SHIFT)); -+ mtk_hsdma_write(hsdma, HSDMA_REG_RST_CFG, -+ 0x1 << (chan->id + HSDMA_RST_RX_SHIFT)); -+} -+ -+static void hsdma_dump_reg(struct mtk_hsdam_engine *hsdma) -+{ -+ dev_dbg(hsdma->ddev.dev, -+ "tbase %08x, tcnt %08x, tctx %08x, tdtx: %08x, rbase %08x, rcnt %08x, rctx %08x, rdtx %08x\n", -+ mtk_hsdma_read(hsdma, HSDMA_REG_TX_BASE), -+ mtk_hsdma_read(hsdma, HSDMA_REG_TX_CNT), -+ mtk_hsdma_read(hsdma, HSDMA_REG_TX_CTX), -+ mtk_hsdma_read(hsdma, HSDMA_REG_TX_DTX), -+ mtk_hsdma_read(hsdma, HSDMA_REG_RX_BASE), -+ mtk_hsdma_read(hsdma, HSDMA_REG_RX_CNT), -+ mtk_hsdma_read(hsdma, HSDMA_REG_RX_CRX), -+ mtk_hsdma_read(hsdma, HSDMA_REG_RX_DRX)); -+ -+ dev_dbg(hsdma->ddev.dev, -+ "info %08x, glo %08x, delay %08x, intr_stat %08x, intr_mask %08x\n", -+ mtk_hsdma_read(hsdma, HSDMA_REG_INFO), -+ mtk_hsdma_read(hsdma, HSDMA_REG_GLO_CFG), -+ mtk_hsdma_read(hsdma, HSDMA_REG_DELAY_INT), -+ mtk_hsdma_read(hsdma, HSDMA_REG_INT_STATUS), -+ mtk_hsdma_read(hsdma, HSDMA_REG_INT_MASK)); -+} -+ -+static void hsdma_dump_desc(struct mtk_hsdam_engine *hsdma, -+ struct mtk_hsdma_chan *chan) -+{ -+ struct hsdma_desc *tx_desc; -+ struct hsdma_desc *rx_desc; -+ int i; -+ -+ dev_dbg(hsdma->ddev.dev, "tx idx: %d, rx idx: %d\n", -+ chan->tx_idx, chan->rx_idx); -+ -+ for (i = 0; i < HSDMA_DESCS_NUM; i++) { -+ tx_desc = &chan->tx_ring[i]; -+ rx_desc = &chan->rx_ring[i]; -+ -+ dev_dbg(hsdma->ddev.dev, -+ "%d tx addr0: %08x, flags %08x, tx addr1: %08x, rx addr0 %08x, flags %08x\n", -+ i, tx_desc->addr0, tx_desc->flags, -+ tx_desc->addr1, rx_desc->addr0, rx_desc->flags); -+ } -+} -+ -+static void mtk_hsdma_reset(struct mtk_hsdam_engine *hsdma, -+ struct mtk_hsdma_chan *chan) -+{ -+ int i; -+ -+ /* disable dma */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, 0); -+ -+ /* disable intr */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, 0); -+ -+ /* init desc value */ -+ for (i = 0; i < HSDMA_DESCS_NUM; i++) { -+ chan->tx_ring[i].addr0 = 0; -+ chan->tx_ring[i].flags = HSDMA_DESC_LS0 | HSDMA_DESC_DONE; -+ } -+ for (i = 0; i < HSDMA_DESCS_NUM; i++) { -+ chan->rx_ring[i].addr0 = 0; -+ chan->rx_ring[i].flags = 0; -+ } -+ -+ /* reset */ -+ mtk_hsdma_reset_chan(hsdma, chan); -+ -+ /* enable intr */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, HSDMA_INT_RX_Q0); -+ -+ /* enable dma */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, HSDMA_GLO_DEFAULT); -+} -+ -+static int mtk_hsdma_terminate_all(struct dma_chan *c) -+{ -+ struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c); -+ struct mtk_hsdam_engine *hsdma = mtk_hsdma_chan_get_dev(chan); -+ unsigned long timeout; -+ LIST_HEAD(head); -+ -+ spin_lock_bh(&chan->vchan.lock); -+ chan->desc = NULL; -+ clear_bit(chan->id, &hsdma->chan_issued); -+ vchan_get_all_descriptors(&chan->vchan, &head); -+ spin_unlock_bh(&chan->vchan.lock); -+ -+ vchan_dma_desc_free_list(&chan->vchan, &head); -+ -+ /* wait dma transfer complete */ -+ timeout = jiffies + msecs_to_jiffies(2000); -+ while (mtk_hsdma_read(hsdma, HSDMA_REG_GLO_CFG) & -+ (HSDMA_GLO_RX_BUSY | HSDMA_GLO_TX_BUSY)) { -+ if (time_after_eq(jiffies, timeout)) { -+ hsdma_dump_desc(hsdma, chan); -+ mtk_hsdma_reset(hsdma, chan); -+ dev_err(hsdma->ddev.dev, "timeout, reset it\n"); -+ break; -+ } -+ cpu_relax(); -+ } -+ -+ return 0; -+} -+ -+static int mtk_hsdma_start_transfer(struct mtk_hsdam_engine *hsdma, -+ struct mtk_hsdma_chan *chan) -+{ -+ dma_addr_t src, dst; -+ size_t len, tlen; -+ struct hsdma_desc *tx_desc, *rx_desc; -+ struct mtk_hsdma_sg *sg; -+ unsigned int i; -+ int rx_idx; -+ -+ sg = &chan->desc->sg[0]; -+ len = sg->len; -+ chan->desc->num_sgs = DIV_ROUND_UP(len, HSDMA_MAX_PLEN); -+ -+ /* tx desc */ -+ src = sg->src_addr; -+ for (i = 0; i < chan->desc->num_sgs; i++) { -+ tx_desc = &chan->tx_ring[chan->tx_idx]; -+ -+ if (len > HSDMA_MAX_PLEN) -+ tlen = HSDMA_MAX_PLEN; -+ else -+ tlen = len; -+ -+ if (i & 0x1) { -+ tx_desc->addr1 = src; -+ tx_desc->flags |= HSDMA_DESC_PLEN1(tlen); -+ } else { -+ tx_desc->addr0 = src; -+ tx_desc->flags = HSDMA_DESC_PLEN0(tlen); -+ -+ /* update index */ -+ chan->tx_idx = HSDMA_NEXT_DESC(chan->tx_idx); -+ } -+ -+ src += tlen; -+ len -= tlen; -+ } -+ if (i & 0x1) -+ tx_desc->flags |= HSDMA_DESC_LS0; -+ else -+ tx_desc->flags |= HSDMA_DESC_LS1; -+ -+ /* rx desc */ -+ rx_idx = HSDMA_NEXT_DESC(chan->rx_idx); -+ len = sg->len; -+ dst = sg->dst_addr; -+ for (i = 0; i < chan->desc->num_sgs; i++) { -+ rx_desc = &chan->rx_ring[rx_idx]; -+ if (len > HSDMA_MAX_PLEN) -+ tlen = HSDMA_MAX_PLEN; -+ else -+ tlen = len; -+ -+ rx_desc->addr0 = dst; -+ rx_desc->flags = HSDMA_DESC_PLEN0(tlen); -+ -+ dst += tlen; -+ len -= tlen; -+ -+ /* update index */ -+ rx_idx = HSDMA_NEXT_DESC(rx_idx); -+ } -+ -+ /* make sure desc and index all up to date */ -+ wmb(); -+ mtk_hsdma_write(hsdma, HSDMA_REG_TX_CTX, chan->tx_idx); -+ -+ return 0; -+} -+ -+static int gdma_next_desc(struct mtk_hsdma_chan *chan) -+{ -+ struct virt_dma_desc *vdesc; -+ -+ vdesc = vchan_next_desc(&chan->vchan); -+ if (!vdesc) { -+ chan->desc = NULL; -+ return 0; -+ } -+ chan->desc = to_mtk_hsdma_desc(vdesc); -+ chan->next_sg = 0; -+ -+ return 1; -+} -+ -+static void mtk_hsdma_chan_done(struct mtk_hsdam_engine *hsdma, -+ struct mtk_hsdma_chan *chan) -+{ -+ struct mtk_hsdma_desc *desc; -+ int chan_issued; -+ -+ chan_issued = 0; -+ spin_lock_bh(&chan->vchan.lock); -+ desc = chan->desc; -+ if (likely(desc)) { -+ if (chan->next_sg == desc->num_sgs) { -+ list_del(&desc->vdesc.node); -+ vchan_cookie_complete(&desc->vdesc); -+ chan_issued = gdma_next_desc(chan); -+ } -+ } else { -+ dev_dbg(hsdma->ddev.dev, "no desc to complete\n"); -+ } -+ -+ if (chan_issued) -+ set_bit(chan->id, &hsdma->chan_issued); -+ spin_unlock_bh(&chan->vchan.lock); -+} -+ -+static irqreturn_t mtk_hsdma_irq(int irq, void *devid) -+{ -+ struct mtk_hsdam_engine *hsdma = devid; -+ u32 status; -+ -+ status = mtk_hsdma_read(hsdma, HSDMA_REG_INT_STATUS); -+ if (unlikely(!status)) -+ return IRQ_NONE; -+ -+ if (likely(status & HSDMA_INT_RX_Q0)) -+ tasklet_schedule(&hsdma->task); -+ else -+ dev_dbg(hsdma->ddev.dev, "unhandle irq status %08x\n", status); -+ /* clean intr bits */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_INT_STATUS, status); -+ -+ return IRQ_HANDLED; -+} -+ -+static void mtk_hsdma_issue_pending(struct dma_chan *c) -+{ -+ struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c); -+ struct mtk_hsdam_engine *hsdma = mtk_hsdma_chan_get_dev(chan); -+ -+ spin_lock_bh(&chan->vchan.lock); -+ if (vchan_issue_pending(&chan->vchan) && !chan->desc) { -+ if (gdma_next_desc(chan)) { -+ set_bit(chan->id, &hsdma->chan_issued); -+ tasklet_schedule(&hsdma->task); -+ } else { -+ dev_dbg(hsdma->ddev.dev, "no desc to issue\n"); -+ } -+ } -+ spin_unlock_bh(&chan->vchan.lock); -+} -+ -+static struct dma_async_tx_descriptor *mtk_hsdma_prep_dma_memcpy( -+ struct dma_chan *c, dma_addr_t dest, dma_addr_t src, -+ size_t len, unsigned long flags) -+{ -+ struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c); -+ struct mtk_hsdma_desc *desc; -+ -+ if (len <= 0) -+ return NULL; -+ -+ desc = kzalloc(sizeof(*desc), GFP_ATOMIC); -+ if (!desc) { -+ dev_err(c->device->dev, "alloc memcpy decs error\n"); -+ return NULL; -+ } -+ -+ desc->sg[0].src_addr = src; -+ desc->sg[0].dst_addr = dest; -+ desc->sg[0].len = len; -+ -+ return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); -+} -+ -+static enum dma_status mtk_hsdma_tx_status(struct dma_chan *c, -+ dma_cookie_t cookie, -+ struct dma_tx_state *state) -+{ -+ return dma_cookie_status(c, cookie, state); -+} -+ -+static void mtk_hsdma_free_chan_resources(struct dma_chan *c) -+{ -+ vchan_free_chan_resources(to_virt_chan(c)); -+} -+ -+static void mtk_hsdma_desc_free(struct virt_dma_desc *vdesc) -+{ -+ kfree(container_of(vdesc, struct mtk_hsdma_desc, vdesc)); -+} -+ -+static void mtk_hsdma_tx(struct mtk_hsdam_engine *hsdma) -+{ -+ struct mtk_hsdma_chan *chan; -+ -+ if (test_and_clear_bit(0, &hsdma->chan_issued)) { -+ chan = &hsdma->chan[0]; -+ if (chan->desc) -+ mtk_hsdma_start_transfer(hsdma, chan); -+ else -+ dev_dbg(hsdma->ddev.dev, "chan 0 no desc to issue\n"); -+ } -+} -+ -+static void mtk_hsdma_rx(struct mtk_hsdam_engine *hsdma) -+{ -+ struct mtk_hsdma_chan *chan; -+ int next_idx, drx_idx, cnt; -+ -+ chan = &hsdma->chan[0]; -+ next_idx = HSDMA_NEXT_DESC(chan->rx_idx); -+ drx_idx = mtk_hsdma_read(hsdma, HSDMA_REG_RX_DRX); -+ -+ cnt = (drx_idx - next_idx) & HSDMA_DESCS_MASK; -+ if (!cnt) -+ return; -+ -+ chan->next_sg += cnt; -+ chan->rx_idx = (chan->rx_idx + cnt) & HSDMA_DESCS_MASK; -+ -+ /* update rx crx */ -+ wmb(); -+ mtk_hsdma_write(hsdma, HSDMA_REG_RX_CRX, chan->rx_idx); -+ -+ mtk_hsdma_chan_done(hsdma, chan); -+} -+ -+static void mtk_hsdma_tasklet(struct tasklet_struct *t) -+{ -+ struct mtk_hsdam_engine *hsdma = from_tasklet(hsdma, t, task); -+ -+ mtk_hsdma_rx(hsdma); -+ mtk_hsdma_tx(hsdma); -+} -+ -+static int mtk_hsdam_alloc_desc(struct mtk_hsdam_engine *hsdma, -+ struct mtk_hsdma_chan *chan) -+{ -+ int i; -+ -+ chan->tx_ring = dma_alloc_coherent(hsdma->ddev.dev, -+ 2 * HSDMA_DESCS_NUM * -+ sizeof(*chan->tx_ring), -+ &chan->desc_addr, GFP_ATOMIC | __GFP_ZERO); -+ if (!chan->tx_ring) -+ goto no_mem; -+ -+ chan->rx_ring = &chan->tx_ring[HSDMA_DESCS_NUM]; -+ -+ /* init tx ring value */ -+ for (i = 0; i < HSDMA_DESCS_NUM; i++) -+ chan->tx_ring[i].flags = HSDMA_DESC_LS0 | HSDMA_DESC_DONE; -+ -+ return 0; -+no_mem: -+ return -ENOMEM; -+} -+ -+static void mtk_hsdam_free_desc(struct mtk_hsdam_engine *hsdma, -+ struct mtk_hsdma_chan *chan) -+{ -+ if (chan->tx_ring) { -+ dma_free_coherent(hsdma->ddev.dev, -+ 2 * HSDMA_DESCS_NUM * sizeof(*chan->tx_ring), -+ chan->tx_ring, chan->desc_addr); -+ chan->tx_ring = NULL; -+ chan->rx_ring = NULL; -+ } -+} -+ -+static int mtk_hsdma_init(struct mtk_hsdam_engine *hsdma) -+{ -+ struct mtk_hsdma_chan *chan; -+ int ret; -+ u32 reg; -+ -+ /* init desc */ -+ chan = &hsdma->chan[0]; -+ ret = mtk_hsdam_alloc_desc(hsdma, chan); -+ if (ret) -+ return ret; -+ -+ /* tx */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_TX_BASE, chan->desc_addr); -+ mtk_hsdma_write(hsdma, HSDMA_REG_TX_CNT, HSDMA_DESCS_NUM); -+ /* rx */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_RX_BASE, chan->desc_addr + -+ (sizeof(struct hsdma_desc) * HSDMA_DESCS_NUM)); -+ mtk_hsdma_write(hsdma, HSDMA_REG_RX_CNT, HSDMA_DESCS_NUM); -+ /* reset */ -+ mtk_hsdma_reset_chan(hsdma, chan); -+ -+ /* enable rx intr */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, HSDMA_INT_RX_Q0); -+ -+ /* enable dma */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, HSDMA_GLO_DEFAULT); -+ -+ /* hardware info */ -+ reg = mtk_hsdma_read(hsdma, HSDMA_REG_INFO); -+ dev_info(hsdma->ddev.dev, "rx: %d, tx: %d\n", -+ (reg >> HSDMA_INFO_RX_SHIFT) & HSDMA_INFO_RX_MASK, -+ (reg >> HSDMA_INFO_TX_SHIFT) & HSDMA_INFO_TX_MASK); -+ -+ hsdma_dump_reg(hsdma); -+ -+ return ret; -+} -+ -+static void mtk_hsdma_uninit(struct mtk_hsdam_engine *hsdma) -+{ -+ struct mtk_hsdma_chan *chan; -+ -+ /* disable dma */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, 0); -+ -+ /* disable intr */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, 0); -+ -+ /* free desc */ -+ chan = &hsdma->chan[0]; -+ mtk_hsdam_free_desc(hsdma, chan); -+ -+ /* tx */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_TX_BASE, 0); -+ mtk_hsdma_write(hsdma, HSDMA_REG_TX_CNT, 0); -+ /* rx */ -+ mtk_hsdma_write(hsdma, HSDMA_REG_RX_BASE, 0); -+ mtk_hsdma_write(hsdma, HSDMA_REG_RX_CNT, 0); -+ /* reset */ -+ mtk_hsdma_reset_chan(hsdma, chan); -+} -+ -+static const struct of_device_id mtk_hsdma_of_match[] = { -+ { .compatible = "mediatek,mt7621-hsdma" }, -+ { }, -+}; -+ -+static int mtk_hsdma_probe(struct platform_device *pdev) -+{ -+ const struct of_device_id *match; -+ struct mtk_hsdma_chan *chan; -+ struct mtk_hsdam_engine *hsdma; -+ struct dma_device *dd; -+ int ret; -+ int irq; -+ void __iomem *base; -+ -+ ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); -+ if (ret) -+ return ret; -+ -+ match = of_match_device(mtk_hsdma_of_match, &pdev->dev); -+ if (!match) -+ return -EINVAL; -+ -+ hsdma = devm_kzalloc(&pdev->dev, sizeof(*hsdma), GFP_KERNEL); -+ if (!hsdma) -+ return -EINVAL; -+ -+ base = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(base)) -+ return PTR_ERR(base); -+ hsdma->base = base + HSDMA_BASE_OFFSET; -+ tasklet_setup(&hsdma->task, mtk_hsdma_tasklet); -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return -EINVAL; -+ ret = devm_request_irq(&pdev->dev, irq, mtk_hsdma_irq, -+ 0, dev_name(&pdev->dev), hsdma); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to request irq\n"); -+ return ret; -+ } -+ -+ device_reset(&pdev->dev); -+ -+ dd = &hsdma->ddev; -+ dma_cap_set(DMA_MEMCPY, dd->cap_mask); -+ dd->copy_align = HSDMA_ALIGN_SIZE; -+ dd->device_free_chan_resources = mtk_hsdma_free_chan_resources; -+ dd->device_prep_dma_memcpy = mtk_hsdma_prep_dma_memcpy; -+ dd->device_terminate_all = mtk_hsdma_terminate_all; -+ dd->device_tx_status = mtk_hsdma_tx_status; -+ dd->device_issue_pending = mtk_hsdma_issue_pending; -+ dd->dev = &pdev->dev; -+ dd->dev->dma_parms = &hsdma->dma_parms; -+ dma_set_max_seg_size(dd->dev, HSDMA_MAX_PLEN); -+ INIT_LIST_HEAD(&dd->channels); -+ -+ chan = &hsdma->chan[0]; -+ chan->id = 0; -+ chan->vchan.desc_free = mtk_hsdma_desc_free; -+ vchan_init(&chan->vchan, dd); -+ -+ /* init hardware */ -+ ret = mtk_hsdma_init(hsdma); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to alloc ring descs\n"); -+ return ret; -+ } -+ -+ ret = dma_async_device_register(dd); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to register dma device\n"); -+ goto err_uninit_hsdma; -+ } -+ -+ ret = of_dma_controller_register(pdev->dev.of_node, -+ of_dma_xlate_by_chan_id, hsdma); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to register of dma controller\n"); -+ goto err_unregister; -+ } -+ -+ platform_set_drvdata(pdev, hsdma); -+ -+ return 0; -+ -+err_unregister: -+ dma_async_device_unregister(dd); -+err_uninit_hsdma: -+ mtk_hsdma_uninit(hsdma); -+ return ret; -+} -+ -+static int mtk_hsdma_remove(struct platform_device *pdev) -+{ -+ struct mtk_hsdam_engine *hsdma = platform_get_drvdata(pdev); -+ -+ mtk_hsdma_uninit(hsdma); -+ -+ of_dma_controller_free(pdev->dev.of_node); -+ dma_async_device_unregister(&hsdma->ddev); -+ -+ return 0; -+} -+ -+static struct platform_driver mtk_hsdma_driver = { -+ .probe = mtk_hsdma_probe, -+ .remove = mtk_hsdma_remove, -+ .driver = { -+ .name = KBUILD_MODNAME, -+ .of_match_table = mtk_hsdma_of_match, -+ }, -+}; -+module_platform_driver(mtk_hsdma_driver); -+ -+MODULE_AUTHOR("Michael Lee "); -+MODULE_DESCRIPTION("MTK HSDMA driver"); -+MODULE_LICENSE("GPL v2"); -diff --git a/drivers/staging/mt7621-dma/mtk-hsdma.c b/drivers/staging/mt7621-dma/mtk-hsdma.c -deleted file mode 100644 -index bc4bb43743131..0000000000000 ---- a/drivers/staging/mt7621-dma/mtk-hsdma.c -+++ /dev/null -@@ -1,760 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0+ --/* -- * Copyright (C) 2015, Michael Lee -- * MTK HSDMA support -- */ -- --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include -- --#include "virt-dma.h" -- --#define HSDMA_BASE_OFFSET 0x800 -- --#define HSDMA_REG_TX_BASE 0x00 --#define HSDMA_REG_TX_CNT 0x04 --#define HSDMA_REG_TX_CTX 0x08 --#define HSDMA_REG_TX_DTX 0x0c --#define HSDMA_REG_RX_BASE 0x100 --#define HSDMA_REG_RX_CNT 0x104 --#define HSDMA_REG_RX_CRX 0x108 --#define HSDMA_REG_RX_DRX 0x10c --#define HSDMA_REG_INFO 0x200 --#define HSDMA_REG_GLO_CFG 0x204 --#define HSDMA_REG_RST_CFG 0x208 --#define HSDMA_REG_DELAY_INT 0x20c --#define HSDMA_REG_FREEQ_THRES 0x210 --#define HSDMA_REG_INT_STATUS 0x220 --#define HSDMA_REG_INT_MASK 0x228 --#define HSDMA_REG_SCH_Q01 0x280 --#define HSDMA_REG_SCH_Q23 0x284 -- --#define HSDMA_DESCS_MAX 0xfff --#define HSDMA_DESCS_NUM 8 --#define HSDMA_DESCS_MASK (HSDMA_DESCS_NUM - 1) --#define HSDMA_NEXT_DESC(x) (((x) + 1) & HSDMA_DESCS_MASK) -- --/* HSDMA_REG_INFO */ --#define HSDMA_INFO_INDEX_MASK 0xf --#define HSDMA_INFO_INDEX_SHIFT 24 --#define HSDMA_INFO_BASE_MASK 0xff --#define HSDMA_INFO_BASE_SHIFT 16 --#define HSDMA_INFO_RX_MASK 0xff --#define HSDMA_INFO_RX_SHIFT 8 --#define HSDMA_INFO_TX_MASK 0xff --#define HSDMA_INFO_TX_SHIFT 0 -- --/* HSDMA_REG_GLO_CFG */ --#define HSDMA_GLO_TX_2B_OFFSET BIT(31) --#define HSDMA_GLO_CLK_GATE BIT(30) --#define HSDMA_GLO_BYTE_SWAP BIT(29) --#define HSDMA_GLO_MULTI_DMA BIT(10) --#define HSDMA_GLO_TWO_BUF BIT(9) --#define HSDMA_GLO_32B_DESC BIT(8) --#define HSDMA_GLO_BIG_ENDIAN BIT(7) --#define HSDMA_GLO_TX_DONE BIT(6) --#define HSDMA_GLO_BT_MASK 0x3 --#define HSDMA_GLO_BT_SHIFT 4 --#define HSDMA_GLO_RX_BUSY BIT(3) --#define HSDMA_GLO_RX_DMA BIT(2) --#define HSDMA_GLO_TX_BUSY BIT(1) --#define HSDMA_GLO_TX_DMA BIT(0) -- --#define HSDMA_BT_SIZE_16BYTES (0 << HSDMA_GLO_BT_SHIFT) --#define HSDMA_BT_SIZE_32BYTES (1 << HSDMA_GLO_BT_SHIFT) --#define HSDMA_BT_SIZE_64BYTES (2 << HSDMA_GLO_BT_SHIFT) --#define HSDMA_BT_SIZE_128BYTES (3 << HSDMA_GLO_BT_SHIFT) -- --#define HSDMA_GLO_DEFAULT (HSDMA_GLO_MULTI_DMA | \ -- HSDMA_GLO_RX_DMA | HSDMA_GLO_TX_DMA | HSDMA_BT_SIZE_32BYTES) -- --/* HSDMA_REG_RST_CFG */ --#define HSDMA_RST_RX_SHIFT 16 --#define HSDMA_RST_TX_SHIFT 0 -- --/* HSDMA_REG_DELAY_INT */ --#define HSDMA_DELAY_INT_EN BIT(15) --#define HSDMA_DELAY_PEND_OFFSET 8 --#define HSDMA_DELAY_TIME_OFFSET 0 --#define HSDMA_DELAY_TX_OFFSET 16 --#define HSDMA_DELAY_RX_OFFSET 0 -- --#define HSDMA_DELAY_INIT(x) (HSDMA_DELAY_INT_EN | \ -- ((x) << HSDMA_DELAY_PEND_OFFSET)) --#define HSDMA_DELAY(x) ((HSDMA_DELAY_INIT(x) << \ -- HSDMA_DELAY_TX_OFFSET) | HSDMA_DELAY_INIT(x)) -- --/* HSDMA_REG_INT_STATUS */ --#define HSDMA_INT_DELAY_RX_COH BIT(31) --#define HSDMA_INT_DELAY_RX_INT BIT(30) --#define HSDMA_INT_DELAY_TX_COH BIT(29) --#define HSDMA_INT_DELAY_TX_INT BIT(28) --#define HSDMA_INT_RX_MASK 0x3 --#define HSDMA_INT_RX_SHIFT 16 --#define HSDMA_INT_RX_Q0 BIT(16) --#define HSDMA_INT_TX_MASK 0xf --#define HSDMA_INT_TX_SHIFT 0 --#define HSDMA_INT_TX_Q0 BIT(0) -- --/* tx/rx dma desc flags */ --#define HSDMA_PLEN_MASK 0x3fff --#define HSDMA_DESC_DONE BIT(31) --#define HSDMA_DESC_LS0 BIT(30) --#define HSDMA_DESC_PLEN0(_x) (((_x) & HSDMA_PLEN_MASK) << 16) --#define HSDMA_DESC_TAG BIT(15) --#define HSDMA_DESC_LS1 BIT(14) --#define HSDMA_DESC_PLEN1(_x) ((_x) & HSDMA_PLEN_MASK) -- --/* align 4 bytes */ --#define HSDMA_ALIGN_SIZE 3 --/* align size 128bytes */ --#define HSDMA_MAX_PLEN 0x3f80 -- --struct hsdma_desc { -- u32 addr0; -- u32 flags; -- u32 addr1; -- u32 unused; --}; -- --struct mtk_hsdma_sg { -- dma_addr_t src_addr; -- dma_addr_t dst_addr; -- u32 len; --}; -- --struct mtk_hsdma_desc { -- struct virt_dma_desc vdesc; -- unsigned int num_sgs; -- struct mtk_hsdma_sg sg[1]; --}; -- --struct mtk_hsdma_chan { -- struct virt_dma_chan vchan; -- unsigned int id; -- dma_addr_t desc_addr; -- int tx_idx; -- int rx_idx; -- struct hsdma_desc *tx_ring; -- struct hsdma_desc *rx_ring; -- struct mtk_hsdma_desc *desc; -- unsigned int next_sg; --}; -- --struct mtk_hsdam_engine { -- struct dma_device ddev; -- struct device_dma_parameters dma_parms; -- void __iomem *base; -- struct tasklet_struct task; -- volatile unsigned long chan_issued; -- -- struct mtk_hsdma_chan chan[1]; --}; -- --static inline struct mtk_hsdam_engine *mtk_hsdma_chan_get_dev( -- struct mtk_hsdma_chan *chan) --{ -- return container_of(chan->vchan.chan.device, struct mtk_hsdam_engine, -- ddev); --} -- --static inline struct mtk_hsdma_chan *to_mtk_hsdma_chan(struct dma_chan *c) --{ -- return container_of(c, struct mtk_hsdma_chan, vchan.chan); --} -- --static inline struct mtk_hsdma_desc *to_mtk_hsdma_desc( -- struct virt_dma_desc *vdesc) --{ -- return container_of(vdesc, struct mtk_hsdma_desc, vdesc); --} -- --static inline u32 mtk_hsdma_read(struct mtk_hsdam_engine *hsdma, u32 reg) --{ -- return readl(hsdma->base + reg); --} -- --static inline void mtk_hsdma_write(struct mtk_hsdam_engine *hsdma, -- unsigned int reg, u32 val) --{ -- writel(val, hsdma->base + reg); --} -- --static void mtk_hsdma_reset_chan(struct mtk_hsdam_engine *hsdma, -- struct mtk_hsdma_chan *chan) --{ -- chan->tx_idx = 0; -- chan->rx_idx = HSDMA_DESCS_NUM - 1; -- -- mtk_hsdma_write(hsdma, HSDMA_REG_TX_CTX, chan->tx_idx); -- mtk_hsdma_write(hsdma, HSDMA_REG_RX_CRX, chan->rx_idx); -- -- mtk_hsdma_write(hsdma, HSDMA_REG_RST_CFG, -- 0x1 << (chan->id + HSDMA_RST_TX_SHIFT)); -- mtk_hsdma_write(hsdma, HSDMA_REG_RST_CFG, -- 0x1 << (chan->id + HSDMA_RST_RX_SHIFT)); --} -- --static void hsdma_dump_reg(struct mtk_hsdam_engine *hsdma) --{ -- dev_dbg(hsdma->ddev.dev, -- "tbase %08x, tcnt %08x, tctx %08x, tdtx: %08x, rbase %08x, rcnt %08x, rctx %08x, rdtx %08x\n", -- mtk_hsdma_read(hsdma, HSDMA_REG_TX_BASE), -- mtk_hsdma_read(hsdma, HSDMA_REG_TX_CNT), -- mtk_hsdma_read(hsdma, HSDMA_REG_TX_CTX), -- mtk_hsdma_read(hsdma, HSDMA_REG_TX_DTX), -- mtk_hsdma_read(hsdma, HSDMA_REG_RX_BASE), -- mtk_hsdma_read(hsdma, HSDMA_REG_RX_CNT), -- mtk_hsdma_read(hsdma, HSDMA_REG_RX_CRX), -- mtk_hsdma_read(hsdma, HSDMA_REG_RX_DRX)); -- -- dev_dbg(hsdma->ddev.dev, -- "info %08x, glo %08x, delay %08x, intr_stat %08x, intr_mask %08x\n", -- mtk_hsdma_read(hsdma, HSDMA_REG_INFO), -- mtk_hsdma_read(hsdma, HSDMA_REG_GLO_CFG), -- mtk_hsdma_read(hsdma, HSDMA_REG_DELAY_INT), -- mtk_hsdma_read(hsdma, HSDMA_REG_INT_STATUS), -- mtk_hsdma_read(hsdma, HSDMA_REG_INT_MASK)); --} -- --static void hsdma_dump_desc(struct mtk_hsdam_engine *hsdma, -- struct mtk_hsdma_chan *chan) --{ -- struct hsdma_desc *tx_desc; -- struct hsdma_desc *rx_desc; -- int i; -- -- dev_dbg(hsdma->ddev.dev, "tx idx: %d, rx idx: %d\n", -- chan->tx_idx, chan->rx_idx); -- -- for (i = 0; i < HSDMA_DESCS_NUM; i++) { -- tx_desc = &chan->tx_ring[i]; -- rx_desc = &chan->rx_ring[i]; -- -- dev_dbg(hsdma->ddev.dev, -- "%d tx addr0: %08x, flags %08x, tx addr1: %08x, rx addr0 %08x, flags %08x\n", -- i, tx_desc->addr0, tx_desc->flags, -- tx_desc->addr1, rx_desc->addr0, rx_desc->flags); -- } --} -- --static void mtk_hsdma_reset(struct mtk_hsdam_engine *hsdma, -- struct mtk_hsdma_chan *chan) --{ -- int i; -- -- /* disable dma */ -- mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, 0); -- -- /* disable intr */ -- mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, 0); -- -- /* init desc value */ -- for (i = 0; i < HSDMA_DESCS_NUM; i++) { -- chan->tx_ring[i].addr0 = 0; -- chan->tx_ring[i].flags = HSDMA_DESC_LS0 | HSDMA_DESC_DONE; -- } -- for (i = 0; i < HSDMA_DESCS_NUM; i++) { -- chan->rx_ring[i].addr0 = 0; -- chan->rx_ring[i].flags = 0; -- } -- -- /* reset */ -- mtk_hsdma_reset_chan(hsdma, chan); -- -- /* enable intr */ -- mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, HSDMA_INT_RX_Q0); -- -- /* enable dma */ -- mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, HSDMA_GLO_DEFAULT); --} -- --static int mtk_hsdma_terminate_all(struct dma_chan *c) --{ -- struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c); -- struct mtk_hsdam_engine *hsdma = mtk_hsdma_chan_get_dev(chan); -- unsigned long timeout; -- LIST_HEAD(head); -- -- spin_lock_bh(&chan->vchan.lock); -- chan->desc = NULL; -- clear_bit(chan->id, &hsdma->chan_issued); -- vchan_get_all_descriptors(&chan->vchan, &head); -- spin_unlock_bh(&chan->vchan.lock); -- -- vchan_dma_desc_free_list(&chan->vchan, &head); -- -- /* wait dma transfer complete */ -- timeout = jiffies + msecs_to_jiffies(2000); -- while (mtk_hsdma_read(hsdma, HSDMA_REG_GLO_CFG) & -- (HSDMA_GLO_RX_BUSY | HSDMA_GLO_TX_BUSY)) { -- if (time_after_eq(jiffies, timeout)) { -- hsdma_dump_desc(hsdma, chan); -- mtk_hsdma_reset(hsdma, chan); -- dev_err(hsdma->ddev.dev, "timeout, reset it\n"); -- break; -- } -- cpu_relax(); -- } -- -- return 0; --} -- --static int mtk_hsdma_start_transfer(struct mtk_hsdam_engine *hsdma, -- struct mtk_hsdma_chan *chan) --{ -- dma_addr_t src, dst; -- size_t len, tlen; -- struct hsdma_desc *tx_desc, *rx_desc; -- struct mtk_hsdma_sg *sg; -- unsigned int i; -- int rx_idx; -- -- sg = &chan->desc->sg[0]; -- len = sg->len; -- chan->desc->num_sgs = DIV_ROUND_UP(len, HSDMA_MAX_PLEN); -- -- /* tx desc */ -- src = sg->src_addr; -- for (i = 0; i < chan->desc->num_sgs; i++) { -- tx_desc = &chan->tx_ring[chan->tx_idx]; -- -- if (len > HSDMA_MAX_PLEN) -- tlen = HSDMA_MAX_PLEN; -- else -- tlen = len; -- -- if (i & 0x1) { -- tx_desc->addr1 = src; -- tx_desc->flags |= HSDMA_DESC_PLEN1(tlen); -- } else { -- tx_desc->addr0 = src; -- tx_desc->flags = HSDMA_DESC_PLEN0(tlen); -- -- /* update index */ -- chan->tx_idx = HSDMA_NEXT_DESC(chan->tx_idx); -- } -- -- src += tlen; -- len -= tlen; -- } -- if (i & 0x1) -- tx_desc->flags |= HSDMA_DESC_LS0; -- else -- tx_desc->flags |= HSDMA_DESC_LS1; -- -- /* rx desc */ -- rx_idx = HSDMA_NEXT_DESC(chan->rx_idx); -- len = sg->len; -- dst = sg->dst_addr; -- for (i = 0; i < chan->desc->num_sgs; i++) { -- rx_desc = &chan->rx_ring[rx_idx]; -- if (len > HSDMA_MAX_PLEN) -- tlen = HSDMA_MAX_PLEN; -- else -- tlen = len; -- -- rx_desc->addr0 = dst; -- rx_desc->flags = HSDMA_DESC_PLEN0(tlen); -- -- dst += tlen; -- len -= tlen; -- -- /* update index */ -- rx_idx = HSDMA_NEXT_DESC(rx_idx); -- } -- -- /* make sure desc and index all up to date */ -- wmb(); -- mtk_hsdma_write(hsdma, HSDMA_REG_TX_CTX, chan->tx_idx); -- -- return 0; --} -- --static int gdma_next_desc(struct mtk_hsdma_chan *chan) --{ -- struct virt_dma_desc *vdesc; -- -- vdesc = vchan_next_desc(&chan->vchan); -- if (!vdesc) { -- chan->desc = NULL; -- return 0; -- } -- chan->desc = to_mtk_hsdma_desc(vdesc); -- chan->next_sg = 0; -- -- return 1; --} -- --static void mtk_hsdma_chan_done(struct mtk_hsdam_engine *hsdma, -- struct mtk_hsdma_chan *chan) --{ -- struct mtk_hsdma_desc *desc; -- int chan_issued; -- -- chan_issued = 0; -- spin_lock_bh(&chan->vchan.lock); -- desc = chan->desc; -- if (likely(desc)) { -- if (chan->next_sg == desc->num_sgs) { -- list_del(&desc->vdesc.node); -- vchan_cookie_complete(&desc->vdesc); -- chan_issued = gdma_next_desc(chan); -- } -- } else { -- dev_dbg(hsdma->ddev.dev, "no desc to complete\n"); -- } -- -- if (chan_issued) -- set_bit(chan->id, &hsdma->chan_issued); -- spin_unlock_bh(&chan->vchan.lock); --} -- --static irqreturn_t mtk_hsdma_irq(int irq, void *devid) --{ -- struct mtk_hsdam_engine *hsdma = devid; -- u32 status; -- -- status = mtk_hsdma_read(hsdma, HSDMA_REG_INT_STATUS); -- if (unlikely(!status)) -- return IRQ_NONE; -- -- if (likely(status & HSDMA_INT_RX_Q0)) -- tasklet_schedule(&hsdma->task); -- else -- dev_dbg(hsdma->ddev.dev, "unhandle irq status %08x\n", status); -- /* clean intr bits */ -- mtk_hsdma_write(hsdma, HSDMA_REG_INT_STATUS, status); -- -- return IRQ_HANDLED; --} -- --static void mtk_hsdma_issue_pending(struct dma_chan *c) --{ -- struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c); -- struct mtk_hsdam_engine *hsdma = mtk_hsdma_chan_get_dev(chan); -- -- spin_lock_bh(&chan->vchan.lock); -- if (vchan_issue_pending(&chan->vchan) && !chan->desc) { -- if (gdma_next_desc(chan)) { -- set_bit(chan->id, &hsdma->chan_issued); -- tasklet_schedule(&hsdma->task); -- } else { -- dev_dbg(hsdma->ddev.dev, "no desc to issue\n"); -- } -- } -- spin_unlock_bh(&chan->vchan.lock); --} -- --static struct dma_async_tx_descriptor *mtk_hsdma_prep_dma_memcpy( -- struct dma_chan *c, dma_addr_t dest, dma_addr_t src, -- size_t len, unsigned long flags) --{ -- struct mtk_hsdma_chan *chan = to_mtk_hsdma_chan(c); -- struct mtk_hsdma_desc *desc; -- -- if (len <= 0) -- return NULL; -- -- desc = kzalloc(sizeof(*desc), GFP_ATOMIC); -- if (!desc) { -- dev_err(c->device->dev, "alloc memcpy decs error\n"); -- return NULL; -- } -- -- desc->sg[0].src_addr = src; -- desc->sg[0].dst_addr = dest; -- desc->sg[0].len = len; -- -- return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); --} -- --static enum dma_status mtk_hsdma_tx_status(struct dma_chan *c, -- dma_cookie_t cookie, -- struct dma_tx_state *state) --{ -- return dma_cookie_status(c, cookie, state); --} -- --static void mtk_hsdma_free_chan_resources(struct dma_chan *c) --{ -- vchan_free_chan_resources(to_virt_chan(c)); --} -- --static void mtk_hsdma_desc_free(struct virt_dma_desc *vdesc) --{ -- kfree(container_of(vdesc, struct mtk_hsdma_desc, vdesc)); --} -- --static void mtk_hsdma_tx(struct mtk_hsdam_engine *hsdma) --{ -- struct mtk_hsdma_chan *chan; -- -- if (test_and_clear_bit(0, &hsdma->chan_issued)) { -- chan = &hsdma->chan[0]; -- if (chan->desc) -- mtk_hsdma_start_transfer(hsdma, chan); -- else -- dev_dbg(hsdma->ddev.dev, "chan 0 no desc to issue\n"); -- } --} -- --static void mtk_hsdma_rx(struct mtk_hsdam_engine *hsdma) --{ -- struct mtk_hsdma_chan *chan; -- int next_idx, drx_idx, cnt; -- -- chan = &hsdma->chan[0]; -- next_idx = HSDMA_NEXT_DESC(chan->rx_idx); -- drx_idx = mtk_hsdma_read(hsdma, HSDMA_REG_RX_DRX); -- -- cnt = (drx_idx - next_idx) & HSDMA_DESCS_MASK; -- if (!cnt) -- return; -- -- chan->next_sg += cnt; -- chan->rx_idx = (chan->rx_idx + cnt) & HSDMA_DESCS_MASK; -- -- /* update rx crx */ -- wmb(); -- mtk_hsdma_write(hsdma, HSDMA_REG_RX_CRX, chan->rx_idx); -- -- mtk_hsdma_chan_done(hsdma, chan); --} -- --static void mtk_hsdma_tasklet(struct tasklet_struct *t) --{ -- struct mtk_hsdam_engine *hsdma = from_tasklet(hsdma, t, task); -- -- mtk_hsdma_rx(hsdma); -- mtk_hsdma_tx(hsdma); --} -- --static int mtk_hsdam_alloc_desc(struct mtk_hsdam_engine *hsdma, -- struct mtk_hsdma_chan *chan) --{ -- int i; -- -- chan->tx_ring = dma_alloc_coherent(hsdma->ddev.dev, -- 2 * HSDMA_DESCS_NUM * -- sizeof(*chan->tx_ring), -- &chan->desc_addr, GFP_ATOMIC | __GFP_ZERO); -- if (!chan->tx_ring) -- goto no_mem; -- -- chan->rx_ring = &chan->tx_ring[HSDMA_DESCS_NUM]; -- -- /* init tx ring value */ -- for (i = 0; i < HSDMA_DESCS_NUM; i++) -- chan->tx_ring[i].flags = HSDMA_DESC_LS0 | HSDMA_DESC_DONE; -- -- return 0; --no_mem: -- return -ENOMEM; --} -- --static void mtk_hsdam_free_desc(struct mtk_hsdam_engine *hsdma, -- struct mtk_hsdma_chan *chan) --{ -- if (chan->tx_ring) { -- dma_free_coherent(hsdma->ddev.dev, -- 2 * HSDMA_DESCS_NUM * sizeof(*chan->tx_ring), -- chan->tx_ring, chan->desc_addr); -- chan->tx_ring = NULL; -- chan->rx_ring = NULL; -- } --} -- --static int mtk_hsdma_init(struct mtk_hsdam_engine *hsdma) --{ -- struct mtk_hsdma_chan *chan; -- int ret; -- u32 reg; -- -- /* init desc */ -- chan = &hsdma->chan[0]; -- ret = mtk_hsdam_alloc_desc(hsdma, chan); -- if (ret) -- return ret; -- -- /* tx */ -- mtk_hsdma_write(hsdma, HSDMA_REG_TX_BASE, chan->desc_addr); -- mtk_hsdma_write(hsdma, HSDMA_REG_TX_CNT, HSDMA_DESCS_NUM); -- /* rx */ -- mtk_hsdma_write(hsdma, HSDMA_REG_RX_BASE, chan->desc_addr + -- (sizeof(struct hsdma_desc) * HSDMA_DESCS_NUM)); -- mtk_hsdma_write(hsdma, HSDMA_REG_RX_CNT, HSDMA_DESCS_NUM); -- /* reset */ -- mtk_hsdma_reset_chan(hsdma, chan); -- -- /* enable rx intr */ -- mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, HSDMA_INT_RX_Q0); -- -- /* enable dma */ -- mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, HSDMA_GLO_DEFAULT); -- -- /* hardware info */ -- reg = mtk_hsdma_read(hsdma, HSDMA_REG_INFO); -- dev_info(hsdma->ddev.dev, "rx: %d, tx: %d\n", -- (reg >> HSDMA_INFO_RX_SHIFT) & HSDMA_INFO_RX_MASK, -- (reg >> HSDMA_INFO_TX_SHIFT) & HSDMA_INFO_TX_MASK); -- -- hsdma_dump_reg(hsdma); -- -- return ret; --} -- --static void mtk_hsdma_uninit(struct mtk_hsdam_engine *hsdma) --{ -- struct mtk_hsdma_chan *chan; -- -- /* disable dma */ -- mtk_hsdma_write(hsdma, HSDMA_REG_GLO_CFG, 0); -- -- /* disable intr */ -- mtk_hsdma_write(hsdma, HSDMA_REG_INT_MASK, 0); -- -- /* free desc */ -- chan = &hsdma->chan[0]; -- mtk_hsdam_free_desc(hsdma, chan); -- -- /* tx */ -- mtk_hsdma_write(hsdma, HSDMA_REG_TX_BASE, 0); -- mtk_hsdma_write(hsdma, HSDMA_REG_TX_CNT, 0); -- /* rx */ -- mtk_hsdma_write(hsdma, HSDMA_REG_RX_BASE, 0); -- mtk_hsdma_write(hsdma, HSDMA_REG_RX_CNT, 0); -- /* reset */ -- mtk_hsdma_reset_chan(hsdma, chan); --} -- --static const struct of_device_id mtk_hsdma_of_match[] = { -- { .compatible = "mediatek,mt7621-hsdma" }, -- { }, --}; -- --static int mtk_hsdma_probe(struct platform_device *pdev) --{ -- const struct of_device_id *match; -- struct mtk_hsdma_chan *chan; -- struct mtk_hsdam_engine *hsdma; -- struct dma_device *dd; -- int ret; -- int irq; -- void __iomem *base; -- -- ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); -- if (ret) -- return ret; -- -- match = of_match_device(mtk_hsdma_of_match, &pdev->dev); -- if (!match) -- return -EINVAL; -- -- hsdma = devm_kzalloc(&pdev->dev, sizeof(*hsdma), GFP_KERNEL); -- if (!hsdma) -- return -EINVAL; -- -- base = devm_platform_ioremap_resource(pdev, 0); -- if (IS_ERR(base)) -- return PTR_ERR(base); -- hsdma->base = base + HSDMA_BASE_OFFSET; -- tasklet_setup(&hsdma->task, mtk_hsdma_tasklet); -- -- irq = platform_get_irq(pdev, 0); -- if (irq < 0) -- return -EINVAL; -- ret = devm_request_irq(&pdev->dev, irq, mtk_hsdma_irq, -- 0, dev_name(&pdev->dev), hsdma); -- if (ret) { -- dev_err(&pdev->dev, "failed to request irq\n"); -- return ret; -- } -- -- device_reset(&pdev->dev); -- -- dd = &hsdma->ddev; -- dma_cap_set(DMA_MEMCPY, dd->cap_mask); -- dd->copy_align = HSDMA_ALIGN_SIZE; -- dd->device_free_chan_resources = mtk_hsdma_free_chan_resources; -- dd->device_prep_dma_memcpy = mtk_hsdma_prep_dma_memcpy; -- dd->device_terminate_all = mtk_hsdma_terminate_all; -- dd->device_tx_status = mtk_hsdma_tx_status; -- dd->device_issue_pending = mtk_hsdma_issue_pending; -- dd->dev = &pdev->dev; -- dd->dev->dma_parms = &hsdma->dma_parms; -- dma_set_max_seg_size(dd->dev, HSDMA_MAX_PLEN); -- INIT_LIST_HEAD(&dd->channels); -- -- chan = &hsdma->chan[0]; -- chan->id = 0; -- chan->vchan.desc_free = mtk_hsdma_desc_free; -- vchan_init(&chan->vchan, dd); -- -- /* init hardware */ -- ret = mtk_hsdma_init(hsdma); -- if (ret) { -- dev_err(&pdev->dev, "failed to alloc ring descs\n"); -- return ret; -- } -- -- ret = dma_async_device_register(dd); -- if (ret) { -- dev_err(&pdev->dev, "failed to register dma device\n"); -- goto err_uninit_hsdma; -- } -- -- ret = of_dma_controller_register(pdev->dev.of_node, -- of_dma_xlate_by_chan_id, hsdma); -- if (ret) { -- dev_err(&pdev->dev, "failed to register of dma controller\n"); -- goto err_unregister; -- } -- -- platform_set_drvdata(pdev, hsdma); -- -- return 0; -- --err_unregister: -- dma_async_device_unregister(dd); --err_uninit_hsdma: -- mtk_hsdma_uninit(hsdma); -- return ret; --} -- --static int mtk_hsdma_remove(struct platform_device *pdev) --{ -- struct mtk_hsdam_engine *hsdma = platform_get_drvdata(pdev); -- -- mtk_hsdma_uninit(hsdma); -- -- of_dma_controller_free(pdev->dev.of_node); -- dma_async_device_unregister(&hsdma->ddev); -- -- return 0; --} -- --static struct platform_driver mtk_hsdma_driver = { -- .probe = mtk_hsdma_probe, -- .remove = mtk_hsdma_remove, -- .driver = { -- .name = "hsdma-mt7621", -- .of_match_table = mtk_hsdma_of_match, -- }, --}; --module_platform_driver(mtk_hsdma_driver); -- --MODULE_AUTHOR("Michael Lee "); --MODULE_DESCRIPTION("MTK HSDMA driver"); --MODULE_LICENSE("GPL v2"); -diff --git a/drivers/staging/rtl8188eu/os_dep/usb_intf.c b/drivers/staging/rtl8188eu/os_dep/usb_intf.c -index 43ebd11b53fe5..efad43d8e465d 100644 ---- a/drivers/staging/rtl8188eu/os_dep/usb_intf.c -+++ b/drivers/staging/rtl8188eu/os_dep/usb_intf.c -@@ -41,6 +41,7 @@ static const struct usb_device_id rtw_usb_id_tbl[] = { - {USB_DEVICE(0x2357, 0x0111)}, /* TP-Link TL-WN727N v5.21 */ - {USB_DEVICE(0x2C4E, 0x0102)}, /* MERCUSYS MW150US v2 */ - {USB_DEVICE(0x0df6, 0x0076)}, /* Sitecom N150 v2 */ -+ {USB_DEVICE(0x7392, 0xb811)}, /* Edimax EW-7811UN V2 */ - {USB_DEVICE(USB_VENDER_ID_REALTEK, 0xffef)}, /* Rosewill RNX-N150NUB */ - {} /* Terminating entry */ - }; -diff --git a/drivers/staging/rtl8723bs/os_dep/wifi_regd.c b/drivers/staging/rtl8723bs/os_dep/wifi_regd.c -index 2833fc6901e6e..3f04b7a954ba0 100644 ---- a/drivers/staging/rtl8723bs/os_dep/wifi_regd.c -+++ b/drivers/staging/rtl8723bs/os_dep/wifi_regd.c -@@ -34,7 +34,7 @@ - NL80211_RRF_PASSIVE_SCAN) - - static const struct ieee80211_regdomain rtw_regdom_rd = { -- .n_reg_rules = 3, -+ .n_reg_rules = 2, - .alpha2 = "99", - .reg_rules = { - RTW_2GHZ_CH01_11, -diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -index f500a70438056..2ca5805b2fce0 100644 ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -958,7 +958,7 @@ static int vchiq_irq_queue_bulk_tx_rx(struct vchiq_instance *instance, - struct vchiq_service *service; - struct bulk_waiter_node *waiter = NULL; - bool found = false; -- void *userdata = NULL; -+ void *userdata; - int status = 0; - int ret; - -@@ -997,6 +997,8 @@ static int vchiq_irq_queue_bulk_tx_rx(struct vchiq_instance *instance, - "found bulk_waiter %pK for pid %d", waiter, - current->pid); - userdata = &waiter->bulk_waiter; -+ } else { -+ userdata = args->userdata; - } - - /* -@@ -1715,7 +1717,7 @@ vchiq_compat_ioctl_queue_bulk(struct file *file, - { - struct vchiq_queue_bulk_transfer32 args32; - struct vchiq_queue_bulk_transfer args; -- enum vchiq_bulk_dir dir = (cmd == VCHIQ_IOC_QUEUE_BULK_TRANSMIT) ? -+ enum vchiq_bulk_dir dir = (cmd == VCHIQ_IOC_QUEUE_BULK_TRANSMIT32) ? - VCHIQ_BULK_TRANSMIT : VCHIQ_BULK_RECEIVE; - - if (copy_from_user(&args32, argp, sizeof(args32))) -diff --git a/drivers/staging/wfx/data_tx.c b/drivers/staging/wfx/data_tx.c -index 36b36ef39d053..77fb104efdec1 100644 ---- a/drivers/staging/wfx/data_tx.c -+++ b/drivers/staging/wfx/data_tx.c -@@ -331,6 +331,7 @@ static int wfx_tx_inner(struct wfx_vif *wvif, struct ieee80211_sta *sta, - { - struct hif_msg *hif_msg; - struct hif_req_tx *req; -+ struct wfx_tx_priv *tx_priv; - struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); - struct ieee80211_key_conf *hw_key = tx_info->control.hw_key; - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; -@@ -344,11 +345,14 @@ static int wfx_tx_inner(struct wfx_vif *wvif, struct ieee80211_sta *sta, - - // From now tx_info->control is unusable - memset(tx_info->rate_driver_data, 0, sizeof(struct wfx_tx_priv)); -+ // Fill tx_priv -+ tx_priv = (struct wfx_tx_priv *)tx_info->rate_driver_data; -+ tx_priv->icv_size = wfx_tx_get_icv_len(hw_key); - - // Fill hif_msg - WARN(skb_headroom(skb) < wmsg_len, "not enough space in skb"); - WARN(offset & 1, "attempt to transmit an unaligned frame"); -- skb_put(skb, wfx_tx_get_icv_len(hw_key)); -+ skb_put(skb, tx_priv->icv_size); - skb_push(skb, wmsg_len); - memset(skb->data, 0, wmsg_len); - hif_msg = (struct hif_msg *)skb->data; -@@ -484,6 +488,7 @@ static void wfx_tx_fill_rates(struct wfx_dev *wdev, - - void wfx_tx_confirm_cb(struct wfx_dev *wdev, const struct hif_cnf_tx *arg) - { -+ const struct wfx_tx_priv *tx_priv; - struct ieee80211_tx_info *tx_info; - struct wfx_vif *wvif; - struct sk_buff *skb; -@@ -495,6 +500,7 @@ void wfx_tx_confirm_cb(struct wfx_dev *wdev, const struct hif_cnf_tx *arg) - return; - } - tx_info = IEEE80211_SKB_CB(skb); -+ tx_priv = wfx_skb_tx_priv(skb); - wvif = wdev_to_wvif(wdev, ((struct hif_msg *)skb->data)->interface); - WARN_ON(!wvif); - if (!wvif) -@@ -503,6 +509,8 @@ void wfx_tx_confirm_cb(struct wfx_dev *wdev, const struct hif_cnf_tx *arg) - // Note that wfx_pending_get_pkt_us_delay() get data from tx_info - _trace_tx_stats(arg, skb, wfx_pending_get_pkt_us_delay(wdev, skb)); - wfx_tx_fill_rates(wdev, tx_info, arg); -+ skb_trim(skb, skb->len - tx_priv->icv_size); -+ - // From now, you can touch to tx_info->status, but do not touch to - // tx_priv anymore - // FIXME: use ieee80211_tx_info_clear_status() -diff --git a/drivers/staging/wfx/data_tx.h b/drivers/staging/wfx/data_tx.h -index 46c9fff7a870e..401363d6b563a 100644 ---- a/drivers/staging/wfx/data_tx.h -+++ b/drivers/staging/wfx/data_tx.h -@@ -35,6 +35,7 @@ struct tx_policy_cache { - - struct wfx_tx_priv { - ktime_t xmit_timestamp; -+ unsigned char icv_size; - }; - - void wfx_tx_policy_init(struct wfx_vif *wvif); -diff --git a/drivers/target/iscsi/cxgbit/cxgbit_target.c b/drivers/target/iscsi/cxgbit/cxgbit_target.c -index 9b3eb2e8c92ad..b926e1d6c7b8e 100644 ---- a/drivers/target/iscsi/cxgbit/cxgbit_target.c -+++ b/drivers/target/iscsi/cxgbit/cxgbit_target.c -@@ -86,8 +86,7 @@ static int cxgbit_is_ofld_imm(const struct sk_buff *skb) - if (likely(cxgbit_skcb_flags(skb) & SKCBF_TX_ISO)) - length += sizeof(struct cpl_tx_data_iso); - --#define MAX_IMM_TX_PKT_LEN 256 -- return length <= MAX_IMM_TX_PKT_LEN; -+ return length <= MAX_IMM_OFLD_TX_DATA_WR_LEN; - } - - /* -diff --git a/drivers/tee/optee/rpc.c b/drivers/tee/optee/rpc.c -index 1e3614e4798f0..6cbb3643c6c48 100644 ---- a/drivers/tee/optee/rpc.c -+++ b/drivers/tee/optee/rpc.c -@@ -54,8 +54,9 @@ bad: - static void handle_rpc_func_cmd_i2c_transfer(struct tee_context *ctx, - struct optee_msg_arg *arg) - { -- struct i2c_client client = { 0 }; - struct tee_param *params; -+ struct i2c_adapter *adapter; -+ struct i2c_msg msg = { }; - size_t i; - int ret = -EOPNOTSUPP; - u8 attr[] = { -@@ -85,48 +86,48 @@ static void handle_rpc_func_cmd_i2c_transfer(struct tee_context *ctx, - goto bad; - } - -- client.adapter = i2c_get_adapter(params[0].u.value.b); -- if (!client.adapter) -+ adapter = i2c_get_adapter(params[0].u.value.b); -+ if (!adapter) - goto bad; - - if (params[1].u.value.a & OPTEE_MSG_RPC_CMD_I2C_FLAGS_TEN_BIT) { -- if (!i2c_check_functionality(client.adapter, -+ if (!i2c_check_functionality(adapter, - I2C_FUNC_10BIT_ADDR)) { -- i2c_put_adapter(client.adapter); -+ i2c_put_adapter(adapter); - goto bad; - } - -- client.flags = I2C_CLIENT_TEN; -+ msg.flags = I2C_M_TEN; - } - -- client.addr = params[0].u.value.c; -- snprintf(client.name, I2C_NAME_SIZE, "i2c%d", client.adapter->nr); -+ msg.addr = params[0].u.value.c; -+ msg.buf = params[2].u.memref.shm->kaddr; -+ msg.len = params[2].u.memref.size; - - switch (params[0].u.value.a) { - case OPTEE_MSG_RPC_CMD_I2C_TRANSFER_RD: -- ret = i2c_master_recv(&client, params[2].u.memref.shm->kaddr, -- params[2].u.memref.size); -+ msg.flags |= I2C_M_RD; - break; - case OPTEE_MSG_RPC_CMD_I2C_TRANSFER_WR: -- ret = i2c_master_send(&client, params[2].u.memref.shm->kaddr, -- params[2].u.memref.size); - break; - default: -- i2c_put_adapter(client.adapter); -+ i2c_put_adapter(adapter); - goto bad; - } - -+ ret = i2c_transfer(adapter, &msg, 1); -+ - if (ret < 0) { - arg->ret = TEEC_ERROR_COMMUNICATION; - } else { -- params[3].u.value.a = ret; -+ params[3].u.value.a = msg.len; - if (optee_to_msg_param(arg->params, arg->num_params, params)) - arg->ret = TEEC_ERROR_BAD_PARAMETERS; - else - arg->ret = TEEC_SUCCESS; - } - -- i2c_put_adapter(client.adapter); -+ i2c_put_adapter(adapter); - kfree(params); - return; - bad: -diff --git a/drivers/thermal/cpufreq_cooling.c b/drivers/thermal/cpufreq_cooling.c -index 612f063c1cfcd..ddc166e3a93eb 100644 ---- a/drivers/thermal/cpufreq_cooling.c -+++ b/drivers/thermal/cpufreq_cooling.c -@@ -441,7 +441,7 @@ static int cpufreq_set_cur_state(struct thermal_cooling_device *cdev, - frequency = get_state_freq(cpufreq_cdev, state); - - ret = freq_qos_update_request(&cpufreq_cdev->qos_req, frequency); -- if (ret > 0) { -+ if (ret >= 0) { - cpufreq_cdev->cpufreq_state = state; - cpus = cpufreq_cdev->policy->cpus; - max_capacity = arch_scale_cpu_capacity(cpumask_first(cpus)); -diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c -index c676fa89ee0b6..51dafc06f5414 100644 ---- a/drivers/tty/n_gsm.c -+++ b/drivers/tty/n_gsm.c -@@ -2559,7 +2559,8 @@ static void gsmld_write_wakeup(struct tty_struct *tty) - */ - - static ssize_t gsmld_read(struct tty_struct *tty, struct file *file, -- unsigned char __user *buf, size_t nr) -+ unsigned char *buf, size_t nr, -+ void **cookie, unsigned long offset) - { - return -EOPNOTSUPP; - } -diff --git a/drivers/tty/n_hdlc.c b/drivers/tty/n_hdlc.c -index 12557ee1edb68..1363e659dc1db 100644 ---- a/drivers/tty/n_hdlc.c -+++ b/drivers/tty/n_hdlc.c -@@ -416,13 +416,19 @@ static void n_hdlc_tty_receive(struct tty_struct *tty, const __u8 *data, - * Returns the number of bytes returned or error code. - */ - static ssize_t n_hdlc_tty_read(struct tty_struct *tty, struct file *file, -- __u8 __user *buf, size_t nr) -+ __u8 *kbuf, size_t nr, -+ void **cookie, unsigned long offset) - { - struct n_hdlc *n_hdlc = tty->disc_data; - int ret = 0; - struct n_hdlc_buf *rbuf; - DECLARE_WAITQUEUE(wait, current); - -+ /* Is this a repeated call for an rbuf we already found earlier? */ -+ rbuf = *cookie; -+ if (rbuf) -+ goto have_rbuf; -+ - add_wait_queue(&tty->read_wait, &wait); - - for (;;) { -@@ -436,25 +442,8 @@ static ssize_t n_hdlc_tty_read(struct tty_struct *tty, struct file *file, - set_current_state(TASK_INTERRUPTIBLE); - - rbuf = n_hdlc_buf_get(&n_hdlc->rx_buf_list); -- if (rbuf) { -- if (rbuf->count > nr) { -- /* too large for caller's buffer */ -- ret = -EOVERFLOW; -- } else { -- __set_current_state(TASK_RUNNING); -- if (copy_to_user(buf, rbuf->buf, rbuf->count)) -- ret = -EFAULT; -- else -- ret = rbuf->count; -- } -- -- if (n_hdlc->rx_free_buf_list.count > -- DEFAULT_RX_BUF_COUNT) -- kfree(rbuf); -- else -- n_hdlc_buf_put(&n_hdlc->rx_free_buf_list, rbuf); -+ if (rbuf) - break; -- } - - /* no data */ - if (tty_io_nonblock(tty, file)) { -@@ -473,6 +462,39 @@ static ssize_t n_hdlc_tty_read(struct tty_struct *tty, struct file *file, - remove_wait_queue(&tty->read_wait, &wait); - __set_current_state(TASK_RUNNING); - -+ if (!rbuf) -+ return ret; -+ *cookie = rbuf; -+ -+have_rbuf: -+ /* Have we used it up entirely? */ -+ if (offset >= rbuf->count) -+ goto done_with_rbuf; -+ -+ /* More data to go, but can't copy any more? EOVERFLOW */ -+ ret = -EOVERFLOW; -+ if (!nr) -+ goto done_with_rbuf; -+ -+ /* Copy as much data as possible */ -+ ret = rbuf->count - offset; -+ if (ret > nr) -+ ret = nr; -+ memcpy(kbuf, rbuf->buf+offset, ret); -+ offset += ret; -+ -+ /* If we still have data left, we leave the rbuf in the cookie */ -+ if (offset < rbuf->count) -+ return ret; -+ -+done_with_rbuf: -+ *cookie = NULL; -+ -+ if (n_hdlc->rx_free_buf_list.count > DEFAULT_RX_BUF_COUNT) -+ kfree(rbuf); -+ else -+ n_hdlc_buf_put(&n_hdlc->rx_free_buf_list, rbuf); -+ - return ret; - - } /* end of n_hdlc_tty_read() */ -diff --git a/drivers/tty/n_null.c b/drivers/tty/n_null.c -index 96feabae47407..ce03ae78f5c6a 100644 ---- a/drivers/tty/n_null.c -+++ b/drivers/tty/n_null.c -@@ -20,7 +20,8 @@ static void n_null_close(struct tty_struct *tty) - } - - static ssize_t n_null_read(struct tty_struct *tty, struct file *file, -- unsigned char __user * buf, size_t nr) -+ unsigned char *buf, size_t nr, -+ void **cookie, unsigned long offset) - { - return -EOPNOTSUPP; - } -diff --git a/drivers/tty/n_r3964.c b/drivers/tty/n_r3964.c -index 934dd2fb2ec80..3161f0a535e37 100644 ---- a/drivers/tty/n_r3964.c -+++ b/drivers/tty/n_r3964.c -@@ -129,7 +129,7 @@ static void remove_client_block(struct r3964_info *pInfo, - static int r3964_open(struct tty_struct *tty); - static void r3964_close(struct tty_struct *tty); - static ssize_t r3964_read(struct tty_struct *tty, struct file *file, -- unsigned char __user * buf, size_t nr); -+ void *cookie, unsigned char *buf, size_t nr); - static ssize_t r3964_write(struct tty_struct *tty, struct file *file, - const unsigned char *buf, size_t nr); - static int r3964_ioctl(struct tty_struct *tty, struct file *file, -@@ -1058,7 +1058,8 @@ static void r3964_close(struct tty_struct *tty) - } - - static ssize_t r3964_read(struct tty_struct *tty, struct file *file, -- unsigned char __user * buf, size_t nr) -+ unsigned char *kbuf, size_t nr, -+ void **cookie, unsigned long offset) - { - struct r3964_info *pInfo = tty->disc_data; - struct r3964_client_info *pClient; -@@ -1109,10 +1110,7 @@ static ssize_t r3964_read(struct tty_struct *tty, struct file *file, - kfree(pMsg); - TRACE_M("r3964_read - msg kfree %p", pMsg); - -- if (copy_to_user(buf, &theMsg, ret)) { -- ret = -EFAULT; -- goto unlock; -- } -+ memcpy(kbuf, &theMsg, ret); - - TRACE_PS("read - return %d", ret); - goto unlock; -diff --git a/drivers/tty/n_tracerouter.c b/drivers/tty/n_tracerouter.c -index 4479af4d2fa5c..3490ed51b1a3c 100644 ---- a/drivers/tty/n_tracerouter.c -+++ b/drivers/tty/n_tracerouter.c -@@ -118,7 +118,9 @@ static void n_tracerouter_close(struct tty_struct *tty) - * -EINVAL - */ - static ssize_t n_tracerouter_read(struct tty_struct *tty, struct file *file, -- unsigned char __user *buf, size_t nr) { -+ unsigned char *buf, size_t nr, -+ void **cookie, unsigned long offset) -+{ - return -EINVAL; - } - -diff --git a/drivers/tty/n_tracesink.c b/drivers/tty/n_tracesink.c -index d96ba82cc3569..1d9931041fd8b 100644 ---- a/drivers/tty/n_tracesink.c -+++ b/drivers/tty/n_tracesink.c -@@ -115,7 +115,9 @@ static void n_tracesink_close(struct tty_struct *tty) - * -EINVAL - */ - static ssize_t n_tracesink_read(struct tty_struct *tty, struct file *file, -- unsigned char __user *buf, size_t nr) { -+ unsigned char *buf, size_t nr, -+ void **cookie, unsigned long offset) -+{ - return -EINVAL; - } - -diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c -index 219e85756171b..0bd32ae8a269d 100644 ---- a/drivers/tty/n_tty.c -+++ b/drivers/tty/n_tty.c -@@ -164,29 +164,24 @@ static void zero_buffer(struct tty_struct *tty, u8 *buffer, int size) - memset(buffer, 0x00, size); - } - --static int tty_copy_to_user(struct tty_struct *tty, void __user *to, -- size_t tail, size_t n) -+static void tty_copy(struct tty_struct *tty, void *to, size_t tail, size_t n) - { - struct n_tty_data *ldata = tty->disc_data; - size_t size = N_TTY_BUF_SIZE - tail; - void *from = read_buf_addr(ldata, tail); -- int uncopied; - - if (n > size) { - tty_audit_add_data(tty, from, size); -- uncopied = copy_to_user(to, from, size); -- zero_buffer(tty, from, size - uncopied); -- if (uncopied) -- return uncopied; -+ memcpy(to, from, size); -+ zero_buffer(tty, from, size); - to += size; - n -= size; - from = ldata->read_buf; - } - - tty_audit_add_data(tty, from, n); -- uncopied = copy_to_user(to, from, n); -- zero_buffer(tty, from, n - uncopied); -- return uncopied; -+ memcpy(to, from, n); -+ zero_buffer(tty, from, n); - } - - /** -@@ -1944,15 +1939,16 @@ static inline int input_available_p(struct tty_struct *tty, int poll) - /** - * copy_from_read_buf - copy read data directly - * @tty: terminal device -- * @b: user data -+ * @kbp: data - * @nr: size of data - * - * Helper function to speed up n_tty_read. It is only called when -- * ICANON is off; it copies characters straight from the tty queue to -- * user space directly. It can be profitably called twice; once to -- * drain the space from the tail pointer to the (physical) end of the -- * buffer, and once to drain the space from the (physical) beginning of -- * the buffer to head pointer. -+ * ICANON is off; it copies characters straight from the tty queue. -+ * -+ * It can be profitably called twice; once to drain the space from -+ * the tail pointer to the (physical) end of the buffer, and once -+ * to drain the space from the (physical) beginning of the buffer -+ * to head pointer. - * - * Called under the ldata->atomic_read_lock sem - * -@@ -1962,7 +1958,7 @@ static inline int input_available_p(struct tty_struct *tty, int poll) - */ - - static int copy_from_read_buf(struct tty_struct *tty, -- unsigned char __user **b, -+ unsigned char **kbp, - size_t *nr) - - { -@@ -1978,8 +1974,7 @@ static int copy_from_read_buf(struct tty_struct *tty, - n = min(*nr, n); - if (n) { - unsigned char *from = read_buf_addr(ldata, tail); -- retval = copy_to_user(*b, from, n); -- n -= retval; -+ memcpy(*kbp, from, n); - is_eof = n == 1 && *from == EOF_CHAR(tty); - tty_audit_add_data(tty, from, n); - zero_buffer(tty, from, n); -@@ -1988,7 +1983,7 @@ static int copy_from_read_buf(struct tty_struct *tty, - if (L_EXTPROC(tty) && ldata->icanon && is_eof && - (head == ldata->read_tail)) - n = 0; -- *b += n; -+ *kbp += n; - *nr -= n; - } - return retval; -@@ -1997,12 +1992,12 @@ static int copy_from_read_buf(struct tty_struct *tty, - /** - * canon_copy_from_read_buf - copy read data in canonical mode - * @tty: terminal device -- * @b: user data -+ * @kbp: data - * @nr: size of data - * - * Helper function for n_tty_read. It is only called when ICANON is on; - * it copies one line of input up to and including the line-delimiting -- * character into the user-space buffer. -+ * character into the result buffer. - * - * NB: When termios is changed from non-canonical to canonical mode and - * the read buffer contains data, n_tty_set_termios() simulates an EOF -@@ -2018,14 +2013,14 @@ static int copy_from_read_buf(struct tty_struct *tty, - */ - - static int canon_copy_from_read_buf(struct tty_struct *tty, -- unsigned char __user **b, -+ unsigned char **kbp, - size_t *nr) - { - struct n_tty_data *ldata = tty->disc_data; - size_t n, size, more, c; - size_t eol; - size_t tail; -- int ret, found = 0; -+ int found = 0; - - /* N.B. avoid overrun if nr == 0 */ - if (!*nr) -@@ -2061,10 +2056,8 @@ static int canon_copy_from_read_buf(struct tty_struct *tty, - n_tty_trace("%s: eol:%zu found:%d n:%zu c:%zu tail:%zu more:%zu\n", - __func__, eol, found, n, c, tail, more); - -- ret = tty_copy_to_user(tty, *b, tail, n); -- if (ret) -- return -EFAULT; -- *b += n; -+ tty_copy(tty, *kbp, tail, n); -+ *kbp += n; - *nr -= n; - - if (found) -@@ -2129,10 +2122,11 @@ static int job_control(struct tty_struct *tty, struct file *file) - */ - - static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, -- unsigned char __user *buf, size_t nr) -+ unsigned char *kbuf, size_t nr, -+ void **cookie, unsigned long offset) - { - struct n_tty_data *ldata = tty->disc_data; -- unsigned char __user *b = buf; -+ unsigned char *kb = kbuf; - DEFINE_WAIT_FUNC(wait, woken_wake_function); - int c; - int minimum, time; -@@ -2178,17 +2172,13 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, - /* First test for status change. */ - if (packet && tty->link->ctrl_status) { - unsigned char cs; -- if (b != buf) -+ if (kb != kbuf) - break; - spin_lock_irq(&tty->link->ctrl_lock); - cs = tty->link->ctrl_status; - tty->link->ctrl_status = 0; - spin_unlock_irq(&tty->link->ctrl_lock); -- if (put_user(cs, b)) { -- retval = -EFAULT; -- break; -- } -- b++; -+ *kb++ = cs; - nr--; - break; - } -@@ -2231,24 +2221,20 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, - } - - if (ldata->icanon && !L_EXTPROC(tty)) { -- retval = canon_copy_from_read_buf(tty, &b, &nr); -+ retval = canon_copy_from_read_buf(tty, &kb, &nr); - if (retval) - break; - } else { - int uncopied; - - /* Deal with packet mode. */ -- if (packet && b == buf) { -- if (put_user(TIOCPKT_DATA, b)) { -- retval = -EFAULT; -- break; -- } -- b++; -+ if (packet && kb == kbuf) { -+ *kb++ = TIOCPKT_DATA; - nr--; - } - -- uncopied = copy_from_read_buf(tty, &b, &nr); -- uncopied += copy_from_read_buf(tty, &b, &nr); -+ uncopied = copy_from_read_buf(tty, &kb, &nr); -+ uncopied += copy_from_read_buf(tty, &kb, &nr); - if (uncopied) { - retval = -EFAULT; - break; -@@ -2257,7 +2243,7 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, - - n_tty_check_unthrottle(tty); - -- if (b - buf >= minimum) -+ if (kb - kbuf >= minimum) - break; - if (time) - timeout = time; -@@ -2269,8 +2255,8 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, - remove_wait_queue(&tty->read_wait, &wait); - mutex_unlock(&ldata->atomic_read_lock); - -- if (b - buf) -- retval = b - buf; -+ if (kb - kbuf) -+ retval = kb - kbuf; - - return retval; - } -diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c -index f4de32d3f2afe..6248304a001f4 100644 ---- a/drivers/tty/serial/stm32-usart.c -+++ b/drivers/tty/serial/stm32-usart.c -@@ -383,17 +383,18 @@ static void stm32_transmit_chars_dma(struct uart_port *port) - DMA_MEM_TO_DEV, - DMA_PREP_INTERRUPT); - -- if (!desc) { -- for (i = count; i > 0; i--) -- stm32_transmit_chars_pio(port); -- return; -- } -+ if (!desc) -+ goto fallback_err; - - desc->callback = stm32_tx_dma_complete; - desc->callback_param = port; - - /* Push current DMA TX transaction in the pending queue */ -- dmaengine_submit(desc); -+ if (dma_submit_error(dmaengine_submit(desc))) { -+ /* dma no yet started, safe to free resources */ -+ dmaengine_terminate_async(stm32port->tx_ch); -+ goto fallback_err; -+ } - - /* Issue pending DMA TX requests */ - dma_async_issue_pending(stm32port->tx_ch); -@@ -402,6 +403,11 @@ static void stm32_transmit_chars_dma(struct uart_port *port) - - xmit->tail = (xmit->tail + count) & (UART_XMIT_SIZE - 1); - port->icount.tx += count; -+ return; -+ -+fallback_err: -+ for (i = count; i > 0; i--) -+ stm32_transmit_chars_pio(port); - } - - static void stm32_transmit_chars(struct uart_port *port) -@@ -1130,7 +1136,11 @@ static int stm32_of_dma_rx_probe(struct stm32_port *stm32port, - desc->callback_param = NULL; - - /* Push current DMA transaction in the pending queue */ -- dmaengine_submit(desc); -+ ret = dma_submit_error(dmaengine_submit(desc)); -+ if (ret) { -+ dmaengine_terminate_sync(stm32port->rx_ch); -+ goto config_err; -+ } - - /* Issue pending DMA requests */ - dma_async_issue_pending(stm32port->rx_ch); -diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c -index 082da38762fc7..623738d8e32c8 100644 ---- a/drivers/tty/tty_io.c -+++ b/drivers/tty/tty_io.c -@@ -142,7 +142,7 @@ LIST_HEAD(tty_drivers); /* linked list of tty drivers */ - /* Mutex to protect creating and releasing a tty */ - DEFINE_MUTEX(tty_mutex); - --static ssize_t tty_read(struct file *, char __user *, size_t, loff_t *); -+static ssize_t tty_read(struct kiocb *, struct iov_iter *); - static ssize_t tty_write(struct kiocb *, struct iov_iter *); - static __poll_t tty_poll(struct file *, poll_table *); - static int tty_open(struct inode *, struct file *); -@@ -473,8 +473,9 @@ static void tty_show_fdinfo(struct seq_file *m, struct file *file) - - static const struct file_operations tty_fops = { - .llseek = no_llseek, -- .read = tty_read, -+ .read_iter = tty_read, - .write_iter = tty_write, -+ .splice_read = generic_file_splice_read, - .splice_write = iter_file_splice_write, - .poll = tty_poll, - .unlocked_ioctl = tty_ioctl, -@@ -487,8 +488,9 @@ static const struct file_operations tty_fops = { - - static const struct file_operations console_fops = { - .llseek = no_llseek, -- .read = tty_read, -+ .read_iter = tty_read, - .write_iter = redirected_tty_write, -+ .splice_read = generic_file_splice_read, - .splice_write = iter_file_splice_write, - .poll = tty_poll, - .unlocked_ioctl = tty_ioctl, -@@ -829,6 +831,65 @@ static void tty_update_time(struct timespec64 *time) - time->tv_sec = sec; - } - -+/* -+ * Iterate on the ldisc ->read() function until we've gotten all -+ * the data the ldisc has for us. -+ * -+ * The "cookie" is something that the ldisc read function can fill -+ * in to let us know that there is more data to be had. -+ * -+ * We promise to continue to call the ldisc until it stops returning -+ * data or clears the cookie. The cookie may be something that the -+ * ldisc maintains state for and needs to free. -+ */ -+static int iterate_tty_read(struct tty_ldisc *ld, struct tty_struct *tty, -+ struct file *file, struct iov_iter *to) -+{ -+ int retval = 0; -+ void *cookie = NULL; -+ unsigned long offset = 0; -+ char kernel_buf[64]; -+ size_t count = iov_iter_count(to); -+ -+ do { -+ int size, copied; -+ -+ size = count > sizeof(kernel_buf) ? sizeof(kernel_buf) : count; -+ size = ld->ops->read(tty, file, kernel_buf, size, &cookie, offset); -+ if (!size) -+ break; -+ -+ /* -+ * A ldisc read error return will override any previously copied -+ * data (eg -EOVERFLOW from HDLC) -+ */ -+ if (size < 0) { -+ memzero_explicit(kernel_buf, sizeof(kernel_buf)); -+ return size; -+ } -+ -+ copied = copy_to_iter(kernel_buf, size, to); -+ offset += copied; -+ count -= copied; -+ -+ /* -+ * If the user copy failed, we still need to do another ->read() -+ * call if we had a cookie to let the ldisc clear up. -+ * -+ * But make sure size is zeroed. -+ */ -+ if (unlikely(copied != size)) { -+ count = 0; -+ retval = -EFAULT; -+ } -+ } while (cookie); -+ -+ /* We always clear tty buffer in case they contained passwords */ -+ memzero_explicit(kernel_buf, sizeof(kernel_buf)); -+ return offset ? offset : retval; -+} -+ -+ - /** - * tty_read - read method for tty device files - * @file: pointer to tty file -@@ -844,10 +905,10 @@ static void tty_update_time(struct timespec64 *time) - * read calls may be outstanding in parallel. - */ - --static ssize_t tty_read(struct file *file, char __user *buf, size_t count, -- loff_t *ppos) -+static ssize_t tty_read(struct kiocb *iocb, struct iov_iter *to) - { - int i; -+ struct file *file = iocb->ki_filp; - struct inode *inode = file_inode(file); - struct tty_struct *tty = file_tty(file); - struct tty_ldisc *ld; -@@ -860,12 +921,9 @@ static ssize_t tty_read(struct file *file, char __user *buf, size_t count, - /* We want to wait for the line discipline to sort out in this - situation */ - ld = tty_ldisc_ref_wait(tty); -- if (!ld) -- return hung_up_tty_read(file, buf, count, ppos); -- if (ld->ops->read) -- i = ld->ops->read(tty, file, buf, count); -- else -- i = -EIO; -+ i = -EIO; -+ if (ld && ld->ops->read) -+ i = iterate_tty_read(ld, tty, file, to); - tty_ldisc_deref(ld); - - if (i > 0) -@@ -2887,7 +2945,7 @@ static long tty_compat_ioctl(struct file *file, unsigned int cmd, - - static int this_tty(const void *t, struct file *file, unsigned fd) - { -- if (likely(file->f_op->read != tty_read)) -+ if (likely(file->f_op->read_iter != tty_read)) - return 0; - return file_tty(file) != t ? 0 : fd + 1; - } -diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c -index e9ac215b96633..fc3269f5faf19 100644 ---- a/drivers/usb/dwc2/hcd.c -+++ b/drivers/usb/dwc2/hcd.c -@@ -1313,19 +1313,20 @@ static void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg, - if (num_packets > max_hc_pkt_count) { - num_packets = max_hc_pkt_count; - chan->xfer_len = num_packets * chan->max_packet; -+ } else if (chan->ep_is_in) { -+ /* -+ * Always program an integral # of max packets -+ * for IN transfers. -+ * Note: This assumes that the input buffer is -+ * aligned and sized accordingly. -+ */ -+ chan->xfer_len = num_packets * chan->max_packet; - } - } else { - /* Need 1 packet for transfer length of 0 */ - num_packets = 1; - } - -- if (chan->ep_is_in) -- /* -- * Always program an integral # of max packets for IN -- * transfers -- */ -- chan->xfer_len = num_packets * chan->max_packet; -- - if (chan->ep_type == USB_ENDPOINT_XFER_INT || - chan->ep_type == USB_ENDPOINT_XFER_ISOC) - /* -diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c -index a052d39b4375e..d5f4ec1b73b15 100644 ---- a/drivers/usb/dwc2/hcd_intr.c -+++ b/drivers/usb/dwc2/hcd_intr.c -@@ -500,7 +500,7 @@ static int dwc2_update_urb_state(struct dwc2_hsotg *hsotg, - &short_read); - - if (urb->actual_length + xfer_length > urb->length) { -- dev_warn(hsotg->dev, "%s(): trimming xfer length\n", __func__); -+ dev_dbg(hsotg->dev, "%s(): trimming xfer length\n", __func__); - xfer_length = urb->length - urb->actual_length; - } - -@@ -1977,6 +1977,18 @@ error: - qtd->error_count++; - dwc2_update_urb_state_abn(hsotg, chan, chnum, qtd->urb, - qtd, DWC2_HC_XFER_XACT_ERR); -+ /* -+ * We can get here after a completed transaction -+ * (urb->actual_length >= urb->length) which was not reported -+ * as completed. If that is the case, and we do not abort -+ * the transfer, a transfer of size 0 will be enqueued -+ * subsequently. If urb->actual_length is not DMA-aligned, -+ * the buffer will then point to an unaligned address, and -+ * the resulting behavior is undefined. Bail out in that -+ * situation. -+ */ -+ if (qtd->urb->actual_length >= qtd->urb->length) -+ qtd->error_count = 3; - dwc2_hcd_save_data_toggle(hsotg, chan, chnum, qtd); - dwc2_halt_channel(hsotg, chan, qtd, DWC2_HC_XFER_XACT_ERR); - } -diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c -index ee44321fee386..56f7235bc068c 100644 ---- a/drivers/usb/dwc3/gadget.c -+++ b/drivers/usb/dwc3/gadget.c -@@ -605,8 +605,23 @@ static int dwc3_gadget_set_ep_config(struct dwc3_ep *dep, unsigned int action) - params.param0 |= DWC3_DEPCFG_FIFO_NUMBER(dep->number >> 1); - - if (desc->bInterval) { -- params.param1 |= DWC3_DEPCFG_BINTERVAL_M1(desc->bInterval - 1); -- dep->interval = 1 << (desc->bInterval - 1); -+ u8 bInterval_m1; -+ -+ /* -+ * Valid range for DEPCFG.bInterval_m1 is from 0 to 13, and it -+ * must be set to 0 when the controller operates in full-speed. -+ */ -+ bInterval_m1 = min_t(u8, desc->bInterval - 1, 13); -+ if (dwc->gadget->speed == USB_SPEED_FULL) -+ bInterval_m1 = 0; -+ -+ if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT && -+ dwc->gadget->speed == USB_SPEED_FULL) -+ dep->interval = desc->bInterval; -+ else -+ dep->interval = 1 << (desc->bInterval - 1); -+ -+ params.param1 |= DWC3_DEPCFG_BINTERVAL_M1(bInterval_m1); - } - - return dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_SETEPCONFIG, ¶ms); -diff --git a/drivers/usb/gadget/function/u_audio.c b/drivers/usb/gadget/function/u_audio.c -index e6d32c5367812..908e49dafd620 100644 ---- a/drivers/usb/gadget/function/u_audio.c -+++ b/drivers/usb/gadget/function/u_audio.c -@@ -89,7 +89,12 @@ static void u_audio_iso_complete(struct usb_ep *ep, struct usb_request *req) - struct snd_uac_chip *uac = prm->uac; - - /* i/f shutting down */ -- if (!prm->ep_enabled || req->status == -ESHUTDOWN) -+ if (!prm->ep_enabled) { -+ usb_ep_free_request(ep, req); -+ return; -+ } -+ -+ if (req->status == -ESHUTDOWN) - return; - - /* -@@ -336,8 +341,14 @@ static inline void free_ep(struct uac_rtd_params *prm, struct usb_ep *ep) - - for (i = 0; i < params->req_number; i++) { - if (prm->ureq[i].req) { -- usb_ep_dequeue(ep, prm->ureq[i].req); -- usb_ep_free_request(ep, prm->ureq[i].req); -+ if (usb_ep_dequeue(ep, prm->ureq[i].req)) -+ usb_ep_free_request(ep, prm->ureq[i].req); -+ /* -+ * If usb_ep_dequeue() cannot successfully dequeue the -+ * request, the request will be freed by the completion -+ * callback. -+ */ -+ - prm->ureq[i].req = NULL; - } - } -diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c -index 94398f89e600d..4168801b95955 100644 ---- a/drivers/usb/serial/ftdi_sio.c -+++ b/drivers/usb/serial/ftdi_sio.c -@@ -1386,8 +1386,9 @@ static int change_speed(struct tty_struct *tty, struct usb_serial_port *port) - index_value = get_ftdi_divisor(tty, port); - value = (u16)index_value; - index = (u16)(index_value >> 16); -- if ((priv->chip_type == FT2232C) || (priv->chip_type == FT2232H) || -- (priv->chip_type == FT4232H) || (priv->chip_type == FT232H)) { -+ if (priv->chip_type == FT2232C || priv->chip_type == FT2232H || -+ priv->chip_type == FT4232H || priv->chip_type == FT232H || -+ priv->chip_type == FTX) { - /* Probably the BM type needs the MSB of the encoded fractional - * divider also moved like for the chips above. Any infos? */ - index = (u16)((index << 8) | priv->interface); -diff --git a/drivers/usb/serial/mos7720.c b/drivers/usb/serial/mos7720.c -index 41ee2984a0dff..785e975819278 100644 ---- a/drivers/usb/serial/mos7720.c -+++ b/drivers/usb/serial/mos7720.c -@@ -1092,8 +1092,10 @@ static int mos7720_write(struct tty_struct *tty, struct usb_serial_port *port, - if (urb->transfer_buffer == NULL) { - urb->transfer_buffer = kmalloc(URB_TRANSFER_BUFFER_SIZE, - GFP_ATOMIC); -- if (!urb->transfer_buffer) -+ if (!urb->transfer_buffer) { -+ bytes_sent = -ENOMEM; - goto exit; -+ } - } - transfer_size = min(count, URB_TRANSFER_BUFFER_SIZE); - -diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c -index 23f91d658cb46..30c25ef0dacd2 100644 ---- a/drivers/usb/serial/mos7840.c -+++ b/drivers/usb/serial/mos7840.c -@@ -883,8 +883,10 @@ static int mos7840_write(struct tty_struct *tty, struct usb_serial_port *port, - if (urb->transfer_buffer == NULL) { - urb->transfer_buffer = kmalloc(URB_TRANSFER_BUFFER_SIZE, - GFP_ATOMIC); -- if (!urb->transfer_buffer) -+ if (!urb->transfer_buffer) { -+ bytes_sent = -ENOMEM; - goto exit; -+ } - } - transfer_size = min(count, URB_TRANSFER_BUFFER_SIZE); - -diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c -index 2049e66f34a3f..c6969ca728390 100644 ---- a/drivers/usb/serial/option.c -+++ b/drivers/usb/serial/option.c -@@ -1569,7 +1569,8 @@ static const struct usb_device_id option_ids[] = { - { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1272, 0xff, 0xff, 0xff) }, - { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1273, 0xff, 0xff, 0xff) }, - { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1274, 0xff, 0xff, 0xff) }, -- { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1275, 0xff, 0xff, 0xff) }, -+ { USB_DEVICE(ZTE_VENDOR_ID, 0x1275), /* ZTE P685M */ -+ .driver_info = RSVD(3) | RSVD(4) }, - { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1276, 0xff, 0xff, 0xff) }, - { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1277, 0xff, 0xff, 0xff) }, - { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1278, 0xff, 0xff, 0xff) }, -diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c -index be8067017eaa5..29dda60e3bcde 100644 ---- a/drivers/usb/serial/pl2303.c -+++ b/drivers/usb/serial/pl2303.c -@@ -183,6 +183,7 @@ struct pl2303_type_data { - speed_t max_baud_rate; - unsigned long quirks; - unsigned int no_autoxonxoff:1; -+ unsigned int no_divisors:1; - }; - - struct pl2303_serial_private { -@@ -209,6 +210,7 @@ static const struct pl2303_type_data pl2303_type_data[TYPE_COUNT] = { - }, - [TYPE_HXN] = { - .max_baud_rate = 12000000, -+ .no_divisors = true, - }, - }; - -@@ -571,8 +573,12 @@ static void pl2303_encode_baud_rate(struct tty_struct *tty, - baud = min_t(speed_t, baud, spriv->type->max_baud_rate); - /* - * Use direct method for supported baud rates, otherwise use divisors. -+ * Newer chip types do not support divisor encoding. - */ -- baud_sup = pl2303_get_supported_baud_rate(baud); -+ if (spriv->type->no_divisors) -+ baud_sup = baud; -+ else -+ baud_sup = pl2303_get_supported_baud_rate(baud); - - if (baud == baud_sup) - baud = pl2303_encode_baud_rate_direct(buf, baud); -diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c b/drivers/vdpa/mlx5/net/mlx5_vnet.c -index b5fe6d2ad22f5..25fd971be63f7 100644 ---- a/drivers/vdpa/mlx5/net/mlx5_vnet.c -+++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c -@@ -1820,7 +1820,7 @@ static void mlx5_vdpa_get_config(struct vdpa_device *vdev, unsigned int offset, - struct mlx5_vdpa_dev *mvdev = to_mvdev(vdev); - struct mlx5_vdpa_net *ndev = to_mlx5_vdpa_ndev(mvdev); - -- if (offset + len < sizeof(struct virtio_net_config)) -+ if (offset + len <= sizeof(struct virtio_net_config)) - memcpy(buf, (u8 *)&ndev->config + offset, len); - } - -diff --git a/drivers/vfio/pci/vfio_pci_zdev.c b/drivers/vfio/pci/vfio_pci_zdev.c -index 2296856340311..1bb7edac56899 100644 ---- a/drivers/vfio/pci/vfio_pci_zdev.c -+++ b/drivers/vfio/pci/vfio_pci_zdev.c -@@ -74,6 +74,8 @@ static int zpci_util_cap(struct zpci_dev *zdev, struct vfio_pci_device *vdev, - int ret; - - cap = kmalloc(cap_size, GFP_KERNEL); -+ if (!cap) -+ return -ENOMEM; - - cap->header.id = VFIO_DEVICE_INFO_CAP_ZPCI_UTIL; - cap->header.version = 1; -@@ -98,6 +100,8 @@ static int zpci_pfip_cap(struct zpci_dev *zdev, struct vfio_pci_device *vdev, - int ret; - - cap = kmalloc(cap_size, GFP_KERNEL); -+ if (!cap) -+ return -ENOMEM; - - cap->header.id = VFIO_DEVICE_INFO_CAP_ZPCI_PFIP; - cap->header.version = 1; -diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c -index 0b4dedaa91289..78bd28873945a 100644 ---- a/drivers/vfio/vfio_iommu_type1.c -+++ b/drivers/vfio/vfio_iommu_type1.c -@@ -236,6 +236,18 @@ static void vfio_dma_populate_bitmap(struct vfio_dma *dma, size_t pgsize) - } - } - -+static void vfio_iommu_populate_bitmap_full(struct vfio_iommu *iommu) -+{ -+ struct rb_node *n; -+ unsigned long pgshift = __ffs(iommu->pgsize_bitmap); -+ -+ for (n = rb_first(&iommu->dma_list); n; n = rb_next(n)) { -+ struct vfio_dma *dma = rb_entry(n, struct vfio_dma, node); -+ -+ bitmap_set(dma->bitmap, 0, dma->size >> pgshift); -+ } -+} -+ - static int vfio_dma_bitmap_alloc_all(struct vfio_iommu *iommu, size_t pgsize) - { - struct rb_node *n; -@@ -945,6 +957,7 @@ static long vfio_unmap_unpin(struct vfio_iommu *iommu, struct vfio_dma *dma, - - static void vfio_remove_dma(struct vfio_iommu *iommu, struct vfio_dma *dma) - { -+ WARN_ON(!RB_EMPTY_ROOT(&dma->pfn_list)); - vfio_unmap_unpin(iommu, dma, true); - vfio_unlink_dma(iommu, dma); - put_task_struct(dma->task); -@@ -2238,23 +2251,6 @@ static void vfio_iommu_unmap_unpin_reaccount(struct vfio_iommu *iommu) - } - } - --static void vfio_sanity_check_pfn_list(struct vfio_iommu *iommu) --{ -- struct rb_node *n; -- -- n = rb_first(&iommu->dma_list); -- for (; n; n = rb_next(n)) { -- struct vfio_dma *dma; -- -- dma = rb_entry(n, struct vfio_dma, node); -- -- if (WARN_ON(!RB_EMPTY_ROOT(&dma->pfn_list))) -- break; -- } -- /* mdev vendor driver must unregister notifier */ -- WARN_ON(iommu->notifier.head); --} -- - /* - * Called when a domain is removed in detach. It is possible that - * the removed domain decided the iova aperture window. Modify the -@@ -2354,10 +2350,10 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, - kfree(group); - - if (list_empty(&iommu->external_domain->group_list)) { -- vfio_sanity_check_pfn_list(iommu); -- -- if (!IS_IOMMU_CAP_DOMAIN_IN_CONTAINER(iommu)) -+ if (!IS_IOMMU_CAP_DOMAIN_IN_CONTAINER(iommu)) { -+ WARN_ON(iommu->notifier.head); - vfio_iommu_unmap_unpin_all(iommu); -+ } - - kfree(iommu->external_domain); - iommu->external_domain = NULL; -@@ -2391,10 +2387,12 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, - */ - if (list_empty(&domain->group_list)) { - if (list_is_singular(&iommu->domain_list)) { -- if (!iommu->external_domain) -+ if (!iommu->external_domain) { -+ WARN_ON(iommu->notifier.head); - vfio_iommu_unmap_unpin_all(iommu); -- else -+ } else { - vfio_iommu_unmap_unpin_reaccount(iommu); -+ } - } - iommu_domain_free(domain->domain); - list_del(&domain->next); -@@ -2415,8 +2413,11 @@ detach_group_done: - * Removal of a group without dirty tracking may allow the iommu scope - * to be promoted. - */ -- if (update_dirty_scope) -+ if (update_dirty_scope) { - update_pinned_page_dirty_scope(iommu); -+ if (iommu->dirty_page_tracking) -+ vfio_iommu_populate_bitmap_full(iommu); -+ } - mutex_unlock(&iommu->lock); - } - -@@ -2475,7 +2476,6 @@ static void vfio_iommu_type1_release(void *iommu_data) - - if (iommu->external_domain) { - vfio_release_domain(iommu->external_domain, true); -- vfio_sanity_check_pfn_list(iommu); - kfree(iommu->external_domain); - } - -diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig -index cfb7f5612ef0f..4f02db65dedec 100644 ---- a/drivers/video/fbdev/Kconfig -+++ b/drivers/video/fbdev/Kconfig -@@ -1269,6 +1269,7 @@ config FB_ATY - select FB_CFB_IMAGEBLIT - select FB_BACKLIGHT if FB_ATY_BACKLIGHT - select FB_MACMODES if PPC -+ select FB_ATY_CT if SPARC64 && PCI - help - This driver supports graphics boards with the ATI Mach64 chips. - Say Y if you have such a graphics board. -@@ -1279,7 +1280,6 @@ config FB_ATY - config FB_ATY_CT - bool "Mach64 CT/VT/GT/LT (incl. 3D RAGE) support" - depends on PCI && FB_ATY -- default y if SPARC64 && PCI - help - Say Y here to support use of ATI's 64-bit Rage boards (or other - boards based on the Mach64 CT, VT, GT, and LT chipsets) as a -diff --git a/drivers/virt/vboxguest/vboxguest_utils.c b/drivers/virt/vboxguest/vboxguest_utils.c -index ea05af41ec69e..8d195e3f83012 100644 ---- a/drivers/virt/vboxguest/vboxguest_utils.c -+++ b/drivers/virt/vboxguest/vboxguest_utils.c -@@ -468,7 +468,7 @@ static int hgcm_cancel_call(struct vbg_dev *gdev, struct vmmdev_hgcm_call *call) - * Cancellation fun. - */ - static int vbg_hgcm_do_call(struct vbg_dev *gdev, struct vmmdev_hgcm_call *call, -- u32 timeout_ms, bool *leak_it) -+ u32 timeout_ms, bool interruptible, bool *leak_it) - { - int rc, cancel_rc, ret; - long timeout; -@@ -495,10 +495,15 @@ static int vbg_hgcm_do_call(struct vbg_dev *gdev, struct vmmdev_hgcm_call *call, - else - timeout = msecs_to_jiffies(timeout_ms); - -- timeout = wait_event_interruptible_timeout( -- gdev->hgcm_wq, -- hgcm_req_done(gdev, &call->header), -- timeout); -+ if (interruptible) { -+ timeout = wait_event_interruptible_timeout(gdev->hgcm_wq, -+ hgcm_req_done(gdev, &call->header), -+ timeout); -+ } else { -+ timeout = wait_event_timeout(gdev->hgcm_wq, -+ hgcm_req_done(gdev, &call->header), -+ timeout); -+ } - - /* timeout > 0 means hgcm_req_done has returned true, so success */ - if (timeout > 0) -@@ -631,7 +636,8 @@ int vbg_hgcm_call(struct vbg_dev *gdev, u32 requestor, u32 client_id, - hgcm_call_init_call(call, client_id, function, parms, parm_count, - bounce_bufs); - -- ret = vbg_hgcm_do_call(gdev, call, timeout_ms, &leak_it); -+ ret = vbg_hgcm_do_call(gdev, call, timeout_ms, -+ requestor & VMMDEV_REQUESTOR_USERMODE, &leak_it); - if (ret == 0) { - *vbox_status = call->header.result; - ret = hgcm_call_copy_back_result(call, parms, parm_count, -diff --git a/drivers/w1/slaves/w1_therm.c b/drivers/w1/slaves/w1_therm.c -index 3712b1e6dc71e..976eea28f268a 100644 ---- a/drivers/w1/slaves/w1_therm.c -+++ b/drivers/w1/slaves/w1_therm.c -@@ -667,28 +667,24 @@ static inline int w1_DS18B20_get_resolution(struct w1_slave *sl) - */ - static inline int w1_DS18B20_convert_temp(u8 rom[9]) - { -- int t; -- u32 bv; -+ u16 bv; -+ s16 t; -+ -+ /* Signed 16-bit value to unsigned, cpu order */ -+ bv = le16_to_cpup((__le16 *)rom); - - /* Config register bit R2 = 1 - GX20MH01 in 13 or 14 bit resolution mode */ - if (rom[4] & 0x80) { -- /* Signed 16-bit value to unsigned, cpu order */ -- bv = le16_to_cpup((__le16 *)rom); -- - /* Insert two temperature bits from config register */ - /* Avoid arithmetic shift of signed value */ - bv = (bv << 2) | (rom[4] & 3); -- -- t = (int) sign_extend32(bv, 17); /* Degrees, lowest bit is 2^-6 */ -- return (t*1000)/64; /* Millidegrees */ -+ t = (s16) bv; /* Degrees, lowest bit is 2^-6 */ -+ return (int)t * 1000 / 64; /* Sign-extend to int; millidegrees */ - } -- -- t = (int)le16_to_cpup((__le16 *)rom); -- return t*1000/16; -+ t = (s16)bv; /* Degrees, lowest bit is 2^-4 */ -+ return (int)t * 1000 / 16; /* Sign-extend to int; millidegrees */ - } - -- -- - /** - * w1_DS18S20_convert_temp() - temperature computation for DS18S20 - * @rom: data read from device RAM (8 data bytes + 1 CRC byte) -diff --git a/drivers/watchdog/intel-mid_wdt.c b/drivers/watchdog/intel-mid_wdt.c -index 1ae03b64ef8bf..9b2173f765c8c 100644 ---- a/drivers/watchdog/intel-mid_wdt.c -+++ b/drivers/watchdog/intel-mid_wdt.c -@@ -154,6 +154,10 @@ static int mid_wdt_probe(struct platform_device *pdev) - watchdog_set_nowayout(wdt_dev, WATCHDOG_NOWAYOUT); - watchdog_set_drvdata(wdt_dev, mid); - -+ mid->scu = devm_intel_scu_ipc_dev_get(dev); -+ if (!mid->scu) -+ return -EPROBE_DEFER; -+ - ret = devm_request_irq(dev, pdata->irq, mid_wdt_irq, - IRQF_SHARED | IRQF_NO_SUSPEND, "watchdog", - wdt_dev); -@@ -162,10 +166,6 @@ static int mid_wdt_probe(struct platform_device *pdev) - return ret; - } - -- mid->scu = devm_intel_scu_ipc_dev_get(dev); -- if (!mid->scu) -- return -EPROBE_DEFER; -- - /* - * The firmware followed by U-Boot leaves the watchdog running - * with the default threshold which may vary. When we get here -diff --git a/drivers/watchdog/mei_wdt.c b/drivers/watchdog/mei_wdt.c -index 5391bf3e6b11d..c5967d8b4256a 100644 ---- a/drivers/watchdog/mei_wdt.c -+++ b/drivers/watchdog/mei_wdt.c -@@ -382,6 +382,7 @@ static int mei_wdt_register(struct mei_wdt *wdt) - - watchdog_set_drvdata(&wdt->wdd, wdt); - watchdog_stop_on_reboot(&wdt->wdd); -+ watchdog_stop_on_unregister(&wdt->wdd); - - ret = watchdog_register_device(&wdt->wdd); - if (ret) -diff --git a/drivers/watchdog/qcom-wdt.c b/drivers/watchdog/qcom-wdt.c -index 7cf0f2ec649b6..e38a87ffe5f5f 100644 ---- a/drivers/watchdog/qcom-wdt.c -+++ b/drivers/watchdog/qcom-wdt.c -@@ -22,7 +22,6 @@ enum wdt_reg { - }; - - #define QCOM_WDT_ENABLE BIT(0) --#define QCOM_WDT_ENABLE_IRQ BIT(1) - - static const u32 reg_offset_data_apcs_tmr[] = { - [WDT_RST] = 0x38, -@@ -63,16 +62,6 @@ struct qcom_wdt *to_qcom_wdt(struct watchdog_device *wdd) - return container_of(wdd, struct qcom_wdt, wdd); - } - --static inline int qcom_get_enable(struct watchdog_device *wdd) --{ -- int enable = QCOM_WDT_ENABLE; -- -- if (wdd->pretimeout) -- enable |= QCOM_WDT_ENABLE_IRQ; -- -- return enable; --} -- - static irqreturn_t qcom_wdt_isr(int irq, void *arg) - { - struct watchdog_device *wdd = arg; -@@ -91,7 +80,7 @@ static int qcom_wdt_start(struct watchdog_device *wdd) - writel(1, wdt_addr(wdt, WDT_RST)); - writel(bark * wdt->rate, wdt_addr(wdt, WDT_BARK_TIME)); - writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BITE_TIME)); -- writel(qcom_get_enable(wdd), wdt_addr(wdt, WDT_EN)); -+ writel(QCOM_WDT_ENABLE, wdt_addr(wdt, WDT_EN)); - return 0; - } - -diff --git a/fs/affs/namei.c b/fs/affs/namei.c -index 41c5749f4db78..5400a876d73fb 100644 ---- a/fs/affs/namei.c -+++ b/fs/affs/namei.c -@@ -460,8 +460,10 @@ affs_xrename(struct inode *old_dir, struct dentry *old_dentry, - return -EIO; - - bh_new = affs_bread(sb, d_inode(new_dentry)->i_ino); -- if (!bh_new) -+ if (!bh_new) { -+ affs_brelse(bh_old); - return -EIO; -+ } - - /* Remove old header from its parent directory. */ - affs_lock_dir(old_dir); -diff --git a/fs/btrfs/backref.c b/fs/btrfs/backref.c -index 9cadacf3ec275..7ac59a568595a 100644 ---- a/fs/btrfs/backref.c -+++ b/fs/btrfs/backref.c -@@ -2541,13 +2541,6 @@ void btrfs_backref_cleanup_node(struct btrfs_backref_cache *cache, - list_del(&edge->list[UPPER]); - btrfs_backref_free_edge(cache, edge); - -- if (RB_EMPTY_NODE(&upper->rb_node)) { -- BUG_ON(!list_empty(&node->upper)); -- btrfs_backref_drop_node(cache, node); -- node = upper; -- node->lowest = 1; -- continue; -- } - /* - * Add the node to leaf node list if no other child block - * cached. -@@ -2624,7 +2617,7 @@ static int handle_direct_tree_backref(struct btrfs_backref_cache *cache, - /* Only reloc backref cache cares about a specific root */ - if (cache->is_reloc) { - root = find_reloc_root(cache->fs_info, cur->bytenr); -- if (WARN_ON(!root)) -+ if (!root) - return -ENOENT; - cur->root = root; - } else { -diff --git a/fs/btrfs/backref.h b/fs/btrfs/backref.h -index ff705cc564a9a..17abde7f794ce 100644 ---- a/fs/btrfs/backref.h -+++ b/fs/btrfs/backref.h -@@ -296,6 +296,9 @@ static inline void btrfs_backref_free_node(struct btrfs_backref_cache *cache, - struct btrfs_backref_node *node) - { - if (node) { -+ ASSERT(list_empty(&node->list)); -+ ASSERT(list_empty(&node->lower)); -+ ASSERT(node->eb == NULL); - cache->nr_nodes--; - btrfs_put_root(node->root); - kfree(node); -@@ -340,11 +343,11 @@ static inline void btrfs_backref_drop_node_buffer( - static inline void btrfs_backref_drop_node(struct btrfs_backref_cache *tree, - struct btrfs_backref_node *node) - { -- BUG_ON(!list_empty(&node->upper)); -+ ASSERT(list_empty(&node->upper)); - - btrfs_backref_drop_node_buffer(node); -- list_del(&node->list); -- list_del(&node->lower); -+ list_del_init(&node->list); -+ list_del_init(&node->lower); - if (!RB_EMPTY_NODE(&node->rb_node)) - rb_erase(&node->rb_node, &tree->rb_root); - btrfs_backref_free_node(tree, node); -diff --git a/fs/btrfs/block-group.c b/fs/btrfs/block-group.c -index 48ebc106a606c..3b1c387375a6b 100644 ---- a/fs/btrfs/block-group.c -+++ b/fs/btrfs/block-group.c -@@ -1371,9 +1371,7 @@ void btrfs_delete_unused_bgs(struct btrfs_fs_info *fs_info) - btrfs_space_info_update_bytes_pinned(fs_info, space_info, - -block_group->pinned); - space_info->bytes_readonly += block_group->pinned; -- percpu_counter_add_batch(&space_info->total_bytes_pinned, -- -block_group->pinned, -- BTRFS_TOTAL_BYTES_PINNED_BATCH); -+ __btrfs_mod_total_bytes_pinned(space_info, -block_group->pinned); - block_group->pinned = 0; - - spin_unlock(&block_group->lock); -@@ -2564,8 +2562,10 @@ again: - - if (!path) { - path = btrfs_alloc_path(); -- if (!path) -- return -ENOMEM; -+ if (!path) { -+ ret = -ENOMEM; -+ goto out; -+ } - } - - /* -@@ -2659,16 +2659,14 @@ again: - btrfs_put_block_group(cache); - if (drop_reserve) - btrfs_delayed_refs_rsv_release(fs_info, 1); -- -- if (ret) -- break; -- - /* - * Avoid blocking other tasks for too long. It might even save - * us from writing caches for block groups that are going to be - * removed. - */ - mutex_unlock(&trans->transaction->cache_write_mutex); -+ if (ret) -+ goto out; - mutex_lock(&trans->transaction->cache_write_mutex); - } - mutex_unlock(&trans->transaction->cache_write_mutex); -@@ -2692,7 +2690,12 @@ again: - goto again; - } - spin_unlock(&cur_trans->dirty_bgs_lock); -- } else if (ret < 0) { -+ } -+out: -+ if (ret < 0) { -+ spin_lock(&cur_trans->dirty_bgs_lock); -+ list_splice_init(&dirty, &cur_trans->dirty_bgs); -+ spin_unlock(&cur_trans->dirty_bgs_lock); - btrfs_cleanup_dirty_bgs(cur_trans, fs_info); - } - -@@ -2896,10 +2899,8 @@ int btrfs_update_block_group(struct btrfs_trans_handle *trans, - spin_unlock(&cache->lock); - spin_unlock(&cache->space_info->lock); - -- percpu_counter_add_batch( -- &cache->space_info->total_bytes_pinned, -- num_bytes, -- BTRFS_TOTAL_BYTES_PINNED_BATCH); -+ __btrfs_mod_total_bytes_pinned(cache->space_info, -+ num_bytes); - set_extent_dirty(&trans->transaction->pinned_extents, - bytenr, bytenr + num_bytes - 1, - GFP_NOFS | __GFP_NOFAIL); -diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c -index cc89b63d65a4d..40bf27a65c5d5 100644 ---- a/fs/btrfs/ctree.c -+++ b/fs/btrfs/ctree.c -@@ -221,9 +221,12 @@ int btrfs_copy_root(struct btrfs_trans_handle *trans, - ret = btrfs_inc_ref(trans, root, cow, 1); - else - ret = btrfs_inc_ref(trans, root, cow, 0); -- -- if (ret) -+ if (ret) { -+ btrfs_tree_unlock(cow); -+ free_extent_buffer(cow); -+ btrfs_abort_transaction(trans, ret); - return ret; -+ } - - btrfs_mark_buffer_dirty(cow); - *cow_ret = cow; -diff --git a/fs/btrfs/delayed-ref.c b/fs/btrfs/delayed-ref.c -index 353cc2994d106..30883b9a26d84 100644 ---- a/fs/btrfs/delayed-ref.c -+++ b/fs/btrfs/delayed-ref.c -@@ -648,12 +648,12 @@ inserted: - */ - static noinline void update_existing_head_ref(struct btrfs_trans_handle *trans, - struct btrfs_delayed_ref_head *existing, -- struct btrfs_delayed_ref_head *update, -- int *old_ref_mod_ret) -+ struct btrfs_delayed_ref_head *update) - { - struct btrfs_delayed_ref_root *delayed_refs = - &trans->transaction->delayed_refs; - struct btrfs_fs_info *fs_info = trans->fs_info; -+ u64 flags = btrfs_ref_head_to_space_flags(existing); - int old_ref_mod; - - BUG_ON(existing->is_data != update->is_data); -@@ -701,8 +701,6 @@ static noinline void update_existing_head_ref(struct btrfs_trans_handle *trans, - * currently, for refs we just added we know we're a-ok. - */ - old_ref_mod = existing->total_ref_mod; -- if (old_ref_mod_ret) -- *old_ref_mod_ret = old_ref_mod; - existing->ref_mod += update->ref_mod; - existing->total_ref_mod += update->ref_mod; - -@@ -724,6 +722,27 @@ static noinline void update_existing_head_ref(struct btrfs_trans_handle *trans, - trans->delayed_ref_updates += csum_leaves; - } - } -+ -+ /* -+ * This handles the following conditions: -+ * -+ * 1. We had a ref mod of 0 or more and went negative, indicating that -+ * we may be freeing space, so add our space to the -+ * total_bytes_pinned counter. -+ * 2. We were negative and went to 0 or positive, so no longer can say -+ * that the space would be pinned, decrement our counter from the -+ * total_bytes_pinned counter. -+ * 3. We are now at 0 and have ->must_insert_reserved set, which means -+ * this was a new allocation and then we dropped it, and thus must -+ * add our space to the total_bytes_pinned counter. -+ */ -+ if (existing->total_ref_mod < 0 && old_ref_mod >= 0) -+ btrfs_mod_total_bytes_pinned(fs_info, flags, existing->num_bytes); -+ else if (existing->total_ref_mod >= 0 && old_ref_mod < 0) -+ btrfs_mod_total_bytes_pinned(fs_info, flags, -existing->num_bytes); -+ else if (existing->total_ref_mod == 0 && existing->must_insert_reserved) -+ btrfs_mod_total_bytes_pinned(fs_info, flags, existing->num_bytes); -+ - spin_unlock(&existing->lock); - } - -@@ -798,8 +817,7 @@ static noinline struct btrfs_delayed_ref_head * - add_delayed_ref_head(struct btrfs_trans_handle *trans, - struct btrfs_delayed_ref_head *head_ref, - struct btrfs_qgroup_extent_record *qrecord, -- int action, int *qrecord_inserted_ret, -- int *old_ref_mod, int *new_ref_mod) -+ int action, int *qrecord_inserted_ret) - { - struct btrfs_delayed_ref_head *existing; - struct btrfs_delayed_ref_root *delayed_refs; -@@ -821,8 +839,7 @@ add_delayed_ref_head(struct btrfs_trans_handle *trans, - existing = htree_insert(&delayed_refs->href_root, - &head_ref->href_node); - if (existing) { -- update_existing_head_ref(trans, existing, head_ref, -- old_ref_mod); -+ update_existing_head_ref(trans, existing, head_ref); - /* - * we've updated the existing ref, free the newly - * allocated ref -@@ -830,14 +847,17 @@ add_delayed_ref_head(struct btrfs_trans_handle *trans, - kmem_cache_free(btrfs_delayed_ref_head_cachep, head_ref); - head_ref = existing; - } else { -- if (old_ref_mod) -- *old_ref_mod = 0; -+ u64 flags = btrfs_ref_head_to_space_flags(head_ref); -+ - if (head_ref->is_data && head_ref->ref_mod < 0) { - delayed_refs->pending_csums += head_ref->num_bytes; - trans->delayed_ref_updates += - btrfs_csum_bytes_to_leaves(trans->fs_info, - head_ref->num_bytes); - } -+ if (head_ref->ref_mod < 0) -+ btrfs_mod_total_bytes_pinned(trans->fs_info, flags, -+ head_ref->num_bytes); - delayed_refs->num_heads++; - delayed_refs->num_heads_ready++; - atomic_inc(&delayed_refs->num_entries); -@@ -845,8 +865,6 @@ add_delayed_ref_head(struct btrfs_trans_handle *trans, - } - if (qrecord_inserted_ret) - *qrecord_inserted_ret = qrecord_inserted; -- if (new_ref_mod) -- *new_ref_mod = head_ref->total_ref_mod; - - return head_ref; - } -@@ -909,8 +927,7 @@ static void init_delayed_ref_common(struct btrfs_fs_info *fs_info, - */ - int btrfs_add_delayed_tree_ref(struct btrfs_trans_handle *trans, - struct btrfs_ref *generic_ref, -- struct btrfs_delayed_extent_op *extent_op, -- int *old_ref_mod, int *new_ref_mod) -+ struct btrfs_delayed_extent_op *extent_op) - { - struct btrfs_fs_info *fs_info = trans->fs_info; - struct btrfs_delayed_tree_ref *ref; -@@ -977,8 +994,7 @@ int btrfs_add_delayed_tree_ref(struct btrfs_trans_handle *trans, - * the spin lock - */ - head_ref = add_delayed_ref_head(trans, head_ref, record, -- action, &qrecord_inserted, -- old_ref_mod, new_ref_mod); -+ action, &qrecord_inserted); - - ret = insert_delayed_ref(trans, delayed_refs, head_ref, &ref->node); - spin_unlock(&delayed_refs->lock); -@@ -1006,8 +1022,7 @@ int btrfs_add_delayed_tree_ref(struct btrfs_trans_handle *trans, - */ - int btrfs_add_delayed_data_ref(struct btrfs_trans_handle *trans, - struct btrfs_ref *generic_ref, -- u64 reserved, int *old_ref_mod, -- int *new_ref_mod) -+ u64 reserved) - { - struct btrfs_fs_info *fs_info = trans->fs_info; - struct btrfs_delayed_data_ref *ref; -@@ -1073,8 +1088,7 @@ int btrfs_add_delayed_data_ref(struct btrfs_trans_handle *trans, - * the spin lock - */ - head_ref = add_delayed_ref_head(trans, head_ref, record, -- action, &qrecord_inserted, -- old_ref_mod, new_ref_mod); -+ action, &qrecord_inserted); - - ret = insert_delayed_ref(trans, delayed_refs, head_ref, &ref->node); - spin_unlock(&delayed_refs->lock); -@@ -1117,7 +1131,7 @@ int btrfs_add_delayed_extent_op(struct btrfs_trans_handle *trans, - spin_lock(&delayed_refs->lock); - - add_delayed_ref_head(trans, head_ref, NULL, BTRFS_UPDATE_DELAYED_HEAD, -- NULL, NULL, NULL); -+ NULL); - - spin_unlock(&delayed_refs->lock); - -diff --git a/fs/btrfs/delayed-ref.h b/fs/btrfs/delayed-ref.h -index 1c977e6d45dc3..3ba140468f126 100644 ---- a/fs/btrfs/delayed-ref.h -+++ b/fs/btrfs/delayed-ref.h -@@ -326,6 +326,16 @@ static inline void btrfs_put_delayed_ref(struct btrfs_delayed_ref_node *ref) - } - } - -+static inline u64 btrfs_ref_head_to_space_flags( -+ struct btrfs_delayed_ref_head *head_ref) -+{ -+ if (head_ref->is_data) -+ return BTRFS_BLOCK_GROUP_DATA; -+ else if (head_ref->is_system) -+ return BTRFS_BLOCK_GROUP_SYSTEM; -+ return BTRFS_BLOCK_GROUP_METADATA; -+} -+ - static inline void btrfs_put_delayed_ref_head(struct btrfs_delayed_ref_head *head) - { - if (refcount_dec_and_test(&head->refs)) -@@ -334,12 +344,10 @@ static inline void btrfs_put_delayed_ref_head(struct btrfs_delayed_ref_head *hea - - int btrfs_add_delayed_tree_ref(struct btrfs_trans_handle *trans, - struct btrfs_ref *generic_ref, -- struct btrfs_delayed_extent_op *extent_op, -- int *old_ref_mod, int *new_ref_mod); -+ struct btrfs_delayed_extent_op *extent_op); - int btrfs_add_delayed_data_ref(struct btrfs_trans_handle *trans, - struct btrfs_ref *generic_ref, -- u64 reserved, int *old_ref_mod, -- int *new_ref_mod); -+ u64 reserved); - int btrfs_add_delayed_extent_op(struct btrfs_trans_handle *trans, - u64 bytenr, u64 num_bytes, - struct btrfs_delayed_extent_op *extent_op); -diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c -index 0c335dae5af7a..6f0c59debc2b3 100644 ---- a/fs/btrfs/extent-tree.c -+++ b/fs/btrfs/extent-tree.c -@@ -82,41 +82,6 @@ void btrfs_free_excluded_extents(struct btrfs_block_group *cache) - EXTENT_UPTODATE); - } - --static u64 generic_ref_to_space_flags(struct btrfs_ref *ref) --{ -- if (ref->type == BTRFS_REF_METADATA) { -- if (ref->tree_ref.root == BTRFS_CHUNK_TREE_OBJECTID) -- return BTRFS_BLOCK_GROUP_SYSTEM; -- else -- return BTRFS_BLOCK_GROUP_METADATA; -- } -- return BTRFS_BLOCK_GROUP_DATA; --} -- --static void add_pinned_bytes(struct btrfs_fs_info *fs_info, -- struct btrfs_ref *ref) --{ -- struct btrfs_space_info *space_info; -- u64 flags = generic_ref_to_space_flags(ref); -- -- space_info = btrfs_find_space_info(fs_info, flags); -- ASSERT(space_info); -- percpu_counter_add_batch(&space_info->total_bytes_pinned, ref->len, -- BTRFS_TOTAL_BYTES_PINNED_BATCH); --} -- --static void sub_pinned_bytes(struct btrfs_fs_info *fs_info, -- struct btrfs_ref *ref) --{ -- struct btrfs_space_info *space_info; -- u64 flags = generic_ref_to_space_flags(ref); -- -- space_info = btrfs_find_space_info(fs_info, flags); -- ASSERT(space_info); -- percpu_counter_add_batch(&space_info->total_bytes_pinned, -ref->len, -- BTRFS_TOTAL_BYTES_PINNED_BATCH); --} -- - /* simple helper to search for an existing data extent at a given offset */ - int btrfs_lookup_data_extent(struct btrfs_fs_info *fs_info, u64 start, u64 len) - { -@@ -1388,7 +1353,6 @@ int btrfs_inc_extent_ref(struct btrfs_trans_handle *trans, - struct btrfs_ref *generic_ref) - { - struct btrfs_fs_info *fs_info = trans->fs_info; -- int old_ref_mod, new_ref_mod; - int ret; - - ASSERT(generic_ref->type != BTRFS_REF_NOT_SET && -@@ -1397,17 +1361,12 @@ int btrfs_inc_extent_ref(struct btrfs_trans_handle *trans, - generic_ref->tree_ref.root == BTRFS_TREE_LOG_OBJECTID); - - if (generic_ref->type == BTRFS_REF_METADATA) -- ret = btrfs_add_delayed_tree_ref(trans, generic_ref, -- NULL, &old_ref_mod, &new_ref_mod); -+ ret = btrfs_add_delayed_tree_ref(trans, generic_ref, NULL); - else -- ret = btrfs_add_delayed_data_ref(trans, generic_ref, 0, -- &old_ref_mod, &new_ref_mod); -+ ret = btrfs_add_delayed_data_ref(trans, generic_ref, 0); - - btrfs_ref_tree_mod(fs_info, generic_ref); - -- if (ret == 0 && old_ref_mod < 0 && new_ref_mod >= 0) -- sub_pinned_bytes(fs_info, generic_ref); -- - return ret; - } - -@@ -1795,34 +1754,28 @@ void btrfs_cleanup_ref_head_accounting(struct btrfs_fs_info *fs_info, - { - int nr_items = 1; /* Dropping this ref head update. */ - -- if (head->total_ref_mod < 0) { -- struct btrfs_space_info *space_info; -- u64 flags; -+ /* -+ * We had csum deletions accounted for in our delayed refs rsv, we need -+ * to drop the csum leaves for this update from our delayed_refs_rsv. -+ */ -+ if (head->total_ref_mod < 0 && head->is_data) { -+ spin_lock(&delayed_refs->lock); -+ delayed_refs->pending_csums -= head->num_bytes; -+ spin_unlock(&delayed_refs->lock); -+ nr_items += btrfs_csum_bytes_to_leaves(fs_info, head->num_bytes); -+ } - -- if (head->is_data) -- flags = BTRFS_BLOCK_GROUP_DATA; -- else if (head->is_system) -- flags = BTRFS_BLOCK_GROUP_SYSTEM; -- else -- flags = BTRFS_BLOCK_GROUP_METADATA; -- space_info = btrfs_find_space_info(fs_info, flags); -- ASSERT(space_info); -- percpu_counter_add_batch(&space_info->total_bytes_pinned, -- -head->num_bytes, -- BTRFS_TOTAL_BYTES_PINNED_BATCH); -+ /* -+ * We were dropping refs, or had a new ref and dropped it, and thus must -+ * adjust down our total_bytes_pinned, the space may or may not have -+ * been pinned and so is accounted for properly in the pinned space by -+ * now. -+ */ -+ if (head->total_ref_mod < 0 || -+ (head->total_ref_mod == 0 && head->must_insert_reserved)) { -+ u64 flags = btrfs_ref_head_to_space_flags(head); - -- /* -- * We had csum deletions accounted for in our delayed refs rsv, -- * we need to drop the csum leaves for this update from our -- * delayed_refs_rsv. -- */ -- if (head->is_data) { -- spin_lock(&delayed_refs->lock); -- delayed_refs->pending_csums -= head->num_bytes; -- spin_unlock(&delayed_refs->lock); -- nr_items += btrfs_csum_bytes_to_leaves(fs_info, -- head->num_bytes); -- } -+ btrfs_mod_total_bytes_pinned(fs_info, flags, -head->num_bytes); - } - - btrfs_delayed_refs_rsv_release(fs_info, nr_items); -@@ -2572,8 +2525,7 @@ static int pin_down_extent(struct btrfs_trans_handle *trans, - spin_unlock(&cache->lock); - spin_unlock(&cache->space_info->lock); - -- percpu_counter_add_batch(&cache->space_info->total_bytes_pinned, -- num_bytes, BTRFS_TOTAL_BYTES_PINNED_BATCH); -+ __btrfs_mod_total_bytes_pinned(cache->space_info, num_bytes); - set_extent_dirty(&trans->transaction->pinned_extents, bytenr, - bytenr + num_bytes - 1, GFP_NOFS | __GFP_NOFAIL); - return 0; -@@ -2784,8 +2736,7 @@ static int unpin_extent_range(struct btrfs_fs_info *fs_info, - cache->pinned -= len; - btrfs_space_info_update_bytes_pinned(fs_info, space_info, -len); - space_info->max_extent_size = 0; -- percpu_counter_add_batch(&space_info->total_bytes_pinned, -- -len, BTRFS_TOTAL_BYTES_PINNED_BATCH); -+ __btrfs_mod_total_bytes_pinned(space_info, -len); - if (cache->ro) { - space_info->bytes_readonly += len; - readonly = true; -@@ -3318,7 +3269,6 @@ void btrfs_free_tree_block(struct btrfs_trans_handle *trans, - { - struct btrfs_fs_info *fs_info = root->fs_info; - struct btrfs_ref generic_ref = { 0 }; -- int pin = 1; - int ret; - - btrfs_init_generic_ref(&generic_ref, BTRFS_DROP_DELAYED_REF, -@@ -3327,13 +3277,9 @@ void btrfs_free_tree_block(struct btrfs_trans_handle *trans, - root->root_key.objectid); - - if (root->root_key.objectid != BTRFS_TREE_LOG_OBJECTID) { -- int old_ref_mod, new_ref_mod; -- - btrfs_ref_tree_mod(fs_info, &generic_ref); -- ret = btrfs_add_delayed_tree_ref(trans, &generic_ref, NULL, -- &old_ref_mod, &new_ref_mod); -+ ret = btrfs_add_delayed_tree_ref(trans, &generic_ref, NULL); - BUG_ON(ret); /* -ENOMEM */ -- pin = old_ref_mod >= 0 && new_ref_mod < 0; - } - - if (last_ref && btrfs_header_generation(buf) == trans->transid) { -@@ -3345,7 +3291,6 @@ void btrfs_free_tree_block(struct btrfs_trans_handle *trans, - goto out; - } - -- pin = 0; - cache = btrfs_lookup_block_group(fs_info, buf->start); - - if (btrfs_header_flag(buf, BTRFS_HEADER_FLAG_WRITTEN)) { -@@ -3362,9 +3307,6 @@ void btrfs_free_tree_block(struct btrfs_trans_handle *trans, - trace_btrfs_reserved_extent_free(fs_info, buf->start, buf->len); - } - out: -- if (pin) -- add_pinned_bytes(fs_info, &generic_ref); -- - if (last_ref) { - /* - * Deleting the buffer, clear the corrupt flag since it doesn't -@@ -3378,7 +3320,6 @@ out: - int btrfs_free_extent(struct btrfs_trans_handle *trans, struct btrfs_ref *ref) - { - struct btrfs_fs_info *fs_info = trans->fs_info; -- int old_ref_mod, new_ref_mod; - int ret; - - if (btrfs_is_testing(fs_info)) -@@ -3394,14 +3335,11 @@ int btrfs_free_extent(struct btrfs_trans_handle *trans, struct btrfs_ref *ref) - ref->data_ref.ref_root == BTRFS_TREE_LOG_OBJECTID)) { - /* unlocks the pinned mutex */ - btrfs_pin_extent(trans, ref->bytenr, ref->len, 1); -- old_ref_mod = new_ref_mod = 0; - ret = 0; - } else if (ref->type == BTRFS_REF_METADATA) { -- ret = btrfs_add_delayed_tree_ref(trans, ref, NULL, -- &old_ref_mod, &new_ref_mod); -+ ret = btrfs_add_delayed_tree_ref(trans, ref, NULL); - } else { -- ret = btrfs_add_delayed_data_ref(trans, ref, 0, -- &old_ref_mod, &new_ref_mod); -+ ret = btrfs_add_delayed_data_ref(trans, ref, 0); - } - - if (!((ref->type == BTRFS_REF_METADATA && -@@ -3410,9 +3348,6 @@ int btrfs_free_extent(struct btrfs_trans_handle *trans, struct btrfs_ref *ref) - ref->data_ref.ref_root == BTRFS_TREE_LOG_OBJECTID))) - btrfs_ref_tree_mod(fs_info, ref); - -- if (ret == 0 && old_ref_mod >= 0 && new_ref_mod < 0) -- add_pinned_bytes(fs_info, ref); -- - return ret; - } - -@@ -4528,7 +4463,6 @@ int btrfs_alloc_reserved_file_extent(struct btrfs_trans_handle *trans, - struct btrfs_key *ins) - { - struct btrfs_ref generic_ref = { 0 }; -- int ret; - - BUG_ON(root->root_key.objectid == BTRFS_TREE_LOG_OBJECTID); - -@@ -4536,9 +4470,8 @@ int btrfs_alloc_reserved_file_extent(struct btrfs_trans_handle *trans, - ins->objectid, ins->offset, 0); - btrfs_init_data_ref(&generic_ref, root->root_key.objectid, owner, offset); - btrfs_ref_tree_mod(root->fs_info, &generic_ref); -- ret = btrfs_add_delayed_data_ref(trans, &generic_ref, -- ram_bytes, NULL, NULL); -- return ret; -+ -+ return btrfs_add_delayed_data_ref(trans, &generic_ref, ram_bytes); - } - - /* -@@ -4730,8 +4663,7 @@ struct extent_buffer *btrfs_alloc_tree_block(struct btrfs_trans_handle *trans, - generic_ref.real_root = root->root_key.objectid; - btrfs_init_tree_ref(&generic_ref, level, root_objectid); - btrfs_ref_tree_mod(fs_info, &generic_ref); -- ret = btrfs_add_delayed_tree_ref(trans, &generic_ref, -- extent_op, NULL, NULL); -+ ret = btrfs_add_delayed_tree_ref(trans, &generic_ref, extent_op); - if (ret) - goto out_free_delayed; - } -diff --git a/fs/btrfs/free-space-cache.c b/fs/btrfs/free-space-cache.c -index 4d8897879c9cb..71d0d14bc18b3 100644 ---- a/fs/btrfs/free-space-cache.c -+++ b/fs/btrfs/free-space-cache.c -@@ -775,8 +775,10 @@ static int __load_free_space_cache(struct btrfs_root *root, struct inode *inode, - while (num_entries) { - e = kmem_cache_zalloc(btrfs_free_space_cachep, - GFP_NOFS); -- if (!e) -+ if (!e) { -+ ret = -ENOMEM; - goto free_cache; -+ } - - ret = io_ctl_read_entry(&io_ctl, e, &type); - if (ret) { -@@ -785,6 +787,7 @@ static int __load_free_space_cache(struct btrfs_root *root, struct inode *inode, - } - - if (!e->bytes) { -+ ret = -1; - kmem_cache_free(btrfs_free_space_cachep, e); - goto free_cache; - } -@@ -805,6 +808,7 @@ static int __load_free_space_cache(struct btrfs_root *root, struct inode *inode, - e->bitmap = kmem_cache_zalloc( - btrfs_free_space_bitmap_cachep, GFP_NOFS); - if (!e->bitmap) { -+ ret = -ENOMEM; - kmem_cache_free( - btrfs_free_space_cachep, e); - goto free_cache; -diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c -index a8e0a6b038d3e..ad34c5a09befc 100644 ---- a/fs/btrfs/inode.c -+++ b/fs/btrfs/inode.c -@@ -8186,8 +8186,9 @@ static void btrfs_invalidatepage(struct page *page, unsigned int offset, - - if (!inode_evicting) - lock_extent_bits(tree, page_start, page_end, &cached_state); --again: -+ - start = page_start; -+again: - ordered = btrfs_lookup_ordered_range(inode, start, page_end - start + 1); - if (ordered) { - found_ordered = true; -diff --git a/fs/btrfs/relocation.c b/fs/btrfs/relocation.c -index df63ef64c5c0d..c01e0d7bef2c9 100644 ---- a/fs/btrfs/relocation.c -+++ b/fs/btrfs/relocation.c -@@ -668,9 +668,7 @@ static void __del_reloc_root(struct btrfs_root *root) - RB_CLEAR_NODE(&node->rb_node); - } - spin_unlock(&rc->reloc_root_tree.lock); -- if (!node) -- return; -- BUG_ON((struct btrfs_root *)node->data != root); -+ ASSERT(!node || (struct btrfs_root *)node->data == root); - } - - /* -diff --git a/fs/btrfs/space-info.h b/fs/btrfs/space-info.h -index 5646393b928c9..74706f604bce1 100644 ---- a/fs/btrfs/space-info.h -+++ b/fs/btrfs/space-info.h -@@ -152,4 +152,21 @@ static inline void btrfs_space_info_free_bytes_may_use( - int btrfs_reserve_data_bytes(struct btrfs_fs_info *fs_info, u64 bytes, - enum btrfs_reserve_flush_enum flush); - -+static inline void __btrfs_mod_total_bytes_pinned( -+ struct btrfs_space_info *space_info, -+ s64 mod) -+{ -+ percpu_counter_add_batch(&space_info->total_bytes_pinned, mod, -+ BTRFS_TOTAL_BYTES_PINNED_BATCH); -+} -+ -+static inline void btrfs_mod_total_bytes_pinned(struct btrfs_fs_info *fs_info, -+ u64 flags, s64 mod) -+{ -+ struct btrfs_space_info *space_info = btrfs_find_space_info(fs_info, flags); -+ -+ ASSERT(space_info); -+ __btrfs_mod_total_bytes_pinned(space_info, mod); -+} -+ - #endif /* BTRFS_SPACE_INFO_H */ -diff --git a/fs/ceph/caps.c b/fs/ceph/caps.c -index 255a512f1277e..638d18c198ea7 100644 ---- a/fs/ceph/caps.c -+++ b/fs/ceph/caps.c -@@ -3093,10 +3093,12 @@ static void __ceph_put_cap_refs(struct ceph_inode_info *ci, int had, - dout("put_cap_refs %p had %s%s%s\n", inode, ceph_cap_string(had), - last ? " last" : "", put ? " put" : ""); - -- if (last && !skip_checking_caps) -- ceph_check_caps(ci, 0, NULL); -- else if (flushsnaps) -- ceph_flush_snaps(ci, NULL); -+ if (!skip_checking_caps) { -+ if (last) -+ ceph_check_caps(ci, 0, NULL); -+ else if (flushsnaps) -+ ceph_flush_snaps(ci, NULL); -+ } - if (wake) - wake_up_all(&ci->i_cap_wq); - while (put-- > 0) -diff --git a/fs/cifs/cifs_swn.c b/fs/cifs/cifs_swn.c -index d35f599aa00e6..f2d730fffccb3 100644 ---- a/fs/cifs/cifs_swn.c -+++ b/fs/cifs/cifs_swn.c -@@ -272,7 +272,7 @@ static struct cifs_swn_reg *cifs_find_swn_reg(struct cifs_tcon *tcon) - if (IS_ERR(share_name)) { - int ret; - -- ret = PTR_ERR(net_name); -+ ret = PTR_ERR(share_name); - cifs_dbg(VFS, "%s: failed to extract share name from target '%s': %d\n", - __func__, tcon->treeName, ret); - kfree(net_name); -diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c -index 4bb9decbbf27f..1439d3c9ff773 100644 ---- a/fs/cifs/connect.c -+++ b/fs/cifs/connect.c -@@ -3038,96 +3038,91 @@ static int update_vol_info(const struct dfs_cache_tgt_iterator *tgt_it, - return 0; - } - --static int setup_dfs_tgt_conn(const char *path, const char *full_path, -- const struct dfs_cache_tgt_iterator *tgt_it, -- struct cifs_sb_info *cifs_sb, struct smb3_fs_context *ctx, -- unsigned int *xid, struct TCP_Server_Info **server, -- struct cifs_ses **ses, struct cifs_tcon **tcon) --{ -- int rc; -- struct dfs_info3_param ref = {0}; -- char *mdata = NULL; -- struct smb3_fs_context fake_ctx = {NULL}; -- char *fake_devname = NULL; -- -- cifs_dbg(FYI, "%s: dfs path: %s\n", __func__, path); -- -- rc = dfs_cache_get_tgt_referral(path, tgt_it, &ref); -- if (rc) -- return rc; -- -- mdata = cifs_compose_mount_options(cifs_sb->ctx->mount_options, -- full_path + 1, &ref, -- &fake_devname); -- free_dfs_info_param(&ref); -- -- if (IS_ERR(mdata)) { -- rc = PTR_ERR(mdata); -- mdata = NULL; -- } else -- rc = cifs_setup_volume_info(&fake_ctx, mdata, fake_devname); -- -- kfree(mdata); -- kfree(fake_devname); -- -- if (!rc) { -- /* -- * We use a 'fake_ctx' here because we need pass it down to the -- * mount_{get,put} functions to test connection against new DFS -- * targets. -- */ -- mount_put_conns(cifs_sb, *xid, *server, *ses, *tcon); -- rc = mount_get_conns(&fake_ctx, cifs_sb, xid, server, ses, -- tcon); -- if (!rc || (*server && *ses)) { -- /* -- * We were able to connect to new target server. -- * Update current context with new target server. -- */ -- rc = update_vol_info(tgt_it, &fake_ctx, ctx); -- } -- } -- smb3_cleanup_fs_context_contents(&fake_ctx); -- return rc; --} -- - static int do_dfs_failover(const char *path, const char *full_path, struct cifs_sb_info *cifs_sb, - struct smb3_fs_context *ctx, struct cifs_ses *root_ses, - unsigned int *xid, struct TCP_Server_Info **server, - struct cifs_ses **ses, struct cifs_tcon **tcon) - { - int rc; -- struct dfs_cache_tgt_list tgt_list; -+ struct dfs_cache_tgt_list tgt_list = {0}; - struct dfs_cache_tgt_iterator *tgt_it = NULL; -+ struct smb3_fs_context tmp_ctx = {NULL}; - - if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_DFS) - return -EOPNOTSUPP; - -+ cifs_dbg(FYI, "%s: path=%s full_path=%s\n", __func__, path, full_path); -+ - rc = dfs_cache_noreq_find(path, NULL, &tgt_list); - if (rc) - return rc; -+ /* -+ * We use a 'tmp_ctx' here because we need pass it down to the mount_{get,put} functions to -+ * test connection against new DFS targets. -+ */ -+ rc = smb3_fs_context_dup(&tmp_ctx, ctx); -+ if (rc) -+ goto out; - - for (;;) { -+ struct dfs_info3_param ref = {0}; -+ char *fake_devname = NULL, *mdata = NULL; -+ - /* Get next DFS target server - if any */ - rc = get_next_dfs_tgt(path, &tgt_list, &tgt_it); - if (rc) - break; -- /* Connect to next DFS target */ -- rc = setup_dfs_tgt_conn(path, full_path, tgt_it, cifs_sb, ctx, xid, server, ses, -- tcon); -- if (!rc || (*server && *ses)) -+ -+ rc = dfs_cache_get_tgt_referral(path, tgt_it, &ref); -+ if (rc) -+ break; -+ -+ cifs_dbg(FYI, "%s: old ctx: UNC=%s prepath=%s\n", __func__, tmp_ctx.UNC, -+ tmp_ctx.prepath); -+ -+ mdata = cifs_compose_mount_options(cifs_sb->ctx->mount_options, full_path + 1, &ref, -+ &fake_devname); -+ free_dfs_info_param(&ref); -+ -+ if (IS_ERR(mdata)) { -+ rc = PTR_ERR(mdata); -+ mdata = NULL; -+ } else -+ rc = cifs_setup_volume_info(&tmp_ctx, mdata, fake_devname); -+ -+ kfree(mdata); -+ kfree(fake_devname); -+ -+ if (rc) -+ break; -+ -+ cifs_dbg(FYI, "%s: new ctx: UNC=%s prepath=%s\n", __func__, tmp_ctx.UNC, -+ tmp_ctx.prepath); -+ -+ mount_put_conns(cifs_sb, *xid, *server, *ses, *tcon); -+ rc = mount_get_conns(&tmp_ctx, cifs_sb, xid, server, ses, tcon); -+ if (!rc || (*server && *ses)) { -+ /* -+ * We were able to connect to new target server. Update current context with -+ * new target server. -+ */ -+ rc = update_vol_info(tgt_it, &tmp_ctx, ctx); - break; -+ } - } - if (!rc) { -+ cifs_dbg(FYI, "%s: final ctx: UNC=%s prepath=%s\n", __func__, tmp_ctx.UNC, -+ tmp_ctx.prepath); - /* -- * Update DFS target hint in DFS referral cache with the target -- * server we successfully reconnected to. -+ * Update DFS target hint in DFS referral cache with the target server we -+ * successfully reconnected to. - */ -- rc = dfs_cache_update_tgthint(*xid, root_ses ? root_ses : *ses, -- cifs_sb->local_nls, -- cifs_remap(cifs_sb), path, -- tgt_it); -+ rc = dfs_cache_update_tgthint(*xid, root_ses ? root_ses : *ses, cifs_sb->local_nls, -+ cifs_remap(cifs_sb), path, tgt_it); - } -+ -+out: -+ smb3_cleanup_fs_context_contents(&tmp_ctx); - dfs_cache_free_tgts(&tgt_list); - return rc; - } -@@ -3285,77 +3280,77 @@ static void put_root_ses(struct cifs_ses *ses) - cifs_put_smb_ses(ses); - } - --/* Check if a path component is remote and then update @dfs_path accordingly */ --static int check_dfs_prepath(struct cifs_sb_info *cifs_sb, struct smb3_fs_context *ctx, -- const unsigned int xid, struct TCP_Server_Info *server, -- struct cifs_tcon *tcon, char **dfs_path) -+/* Set up next dfs prefix path in @dfs_path */ -+static int next_dfs_prepath(struct cifs_sb_info *cifs_sb, struct smb3_fs_context *ctx, -+ const unsigned int xid, struct TCP_Server_Info *server, -+ struct cifs_tcon *tcon, char **dfs_path) - { -- char *path, *s; -- char sep = CIFS_DIR_SEP(cifs_sb), tmp; -- char *npath; -- int rc = 0; -- int added_treename = tcon->Flags & SMB_SHARE_IS_IN_DFS; -- int skip = added_treename; -+ char *path, *npath; -+ int added_treename = is_tcon_dfs(tcon); -+ int rc; - - path = cifs_build_path_to_root(ctx, cifs_sb, tcon, added_treename); - if (!path) - return -ENOMEM; - -- /* -- * Walk through the path components in @path and check if they're accessible. In case any of -- * the components is -EREMOTE, then update @dfs_path with the next DFS referral request path -- * (NOT including the remaining components). -- */ -- s = path; -- do { -- /* skip separators */ -- while (*s && *s == sep) -- s++; -- if (!*s) -- break; -- /* next separator */ -- while (*s && *s != sep) -- s++; -- /* -- * if the treename is added, we then have to skip the first -- * part within the separators -- */ -- if (skip) { -- skip = 0; -- continue; -+ rc = is_path_remote(cifs_sb, ctx, xid, server, tcon); -+ if (rc == -EREMOTE) { -+ struct smb3_fs_context v = {NULL}; -+ /* if @path contains a tree name, skip it in the prefix path */ -+ if (added_treename) { -+ rc = smb3_parse_devname(path, &v); -+ if (rc) -+ goto out; -+ npath = build_unc_path_to_root(&v, cifs_sb, true); -+ smb3_cleanup_fs_context_contents(&v); -+ } else { -+ v.UNC = ctx->UNC; -+ v.prepath = path + 1; -+ npath = build_unc_path_to_root(&v, cifs_sb, true); - } -- tmp = *s; -- *s = 0; -- rc = server->ops->is_path_accessible(xid, tcon, cifs_sb, path); -- if (rc && rc == -EREMOTE) { -- struct smb3_fs_context v = {NULL}; -- /* if @path contains a tree name, skip it in the prefix path */ -- if (added_treename) { -- rc = smb3_parse_devname(path, &v); -- if (rc) -- break; -- rc = -EREMOTE; -- npath = build_unc_path_to_root(&v, cifs_sb, true); -- smb3_cleanup_fs_context_contents(&v); -- } else { -- v.UNC = ctx->UNC; -- v.prepath = path + 1; -- npath = build_unc_path_to_root(&v, cifs_sb, true); -- } -- if (IS_ERR(npath)) { -- rc = PTR_ERR(npath); -- break; -- } -- kfree(*dfs_path); -- *dfs_path = npath; -+ -+ if (IS_ERR(npath)) { -+ rc = PTR_ERR(npath); -+ goto out; - } -- *s = tmp; -- } while (rc == 0); - -+ kfree(*dfs_path); -+ *dfs_path = npath; -+ rc = -EREMOTE; -+ } -+ -+out: - kfree(path); - return rc; - } - -+/* Check if resolved targets can handle any DFS referrals */ -+static int is_referral_server(const char *ref_path, struct cifs_tcon *tcon, bool *ref_server) -+{ -+ int rc; -+ struct dfs_info3_param ref = {0}; -+ -+ if (is_tcon_dfs(tcon)) { -+ *ref_server = true; -+ } else { -+ cifs_dbg(FYI, "%s: ref_path=%s\n", __func__, ref_path); -+ -+ rc = dfs_cache_noreq_find(ref_path, &ref, NULL); -+ if (rc) { -+ cifs_dbg(VFS, "%s: dfs_cache_noreq_find: failed (rc=%d)\n", __func__, rc); -+ return rc; -+ } -+ cifs_dbg(FYI, "%s: ref.flags=0x%x\n", __func__, ref.flags); -+ /* -+ * Check if all targets are capable of handling DFS referrals as per -+ * MS-DFSC 2.2.4 RESP_GET_DFS_REFERRAL. -+ */ -+ *ref_server = !!(ref.flags & DFSREF_REFERRAL_SERVER); -+ free_dfs_info_param(&ref); -+ } -+ return 0; -+} -+ - int cifs_mount(struct cifs_sb_info *cifs_sb, struct smb3_fs_context *ctx) - { - int rc = 0; -@@ -3367,18 +3362,19 @@ int cifs_mount(struct cifs_sb_info *cifs_sb, struct smb3_fs_context *ctx) - char *ref_path = NULL, *full_path = NULL; - char *oldmnt = NULL; - char *mntdata = NULL; -+ bool ref_server = false; - - rc = mount_get_conns(ctx, cifs_sb, &xid, &server, &ses, &tcon); - /* -- * Unconditionally try to get an DFS referral (even cached) to determine whether it is an -- * DFS mount. -+ * If called with 'nodfs' mount option, then skip DFS resolving. Otherwise unconditionally -+ * try to get an DFS referral (even cached) to determine whether it is an DFS mount. - * - * Skip prefix path to provide support for DFS referrals from w2k8 servers which don't seem - * to respond with PATH_NOT_COVERED to requests that include the prefix. - */ -- if (dfs_cache_find(xid, ses, cifs_sb->local_nls, cifs_remap(cifs_sb), ctx->UNC + 1, NULL, -+ if ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_DFS) || -+ dfs_cache_find(xid, ses, cifs_sb->local_nls, cifs_remap(cifs_sb), ctx->UNC + 1, NULL, - NULL)) { -- /* No DFS referral was returned. Looks like a regular share. */ - if (rc) - goto error; - /* Check if it is fully accessible and then mount it */ -@@ -3432,13 +3428,18 @@ int cifs_mount(struct cifs_sb_info *cifs_sb, struct smb3_fs_context *ctx) - break; - if (!tcon) - continue; -+ - /* Make sure that requests go through new root servers */ -- if (is_tcon_dfs(tcon)) { -+ rc = is_referral_server(ref_path + 1, tcon, &ref_server); -+ if (rc) -+ break; -+ if (ref_server) { - put_root_ses(root_ses); - set_root_ses(cifs_sb, ses, &root_ses); - } -- /* Check for remaining path components and then continue chasing them (-EREMOTE) */ -- rc = check_dfs_prepath(cifs_sb, ctx, xid, server, tcon, &ref_path); -+ -+ /* Get next dfs path and then continue chasing them if -EREMOTE */ -+ rc = next_dfs_prepath(cifs_sb, ctx, xid, server, tcon, &ref_path); - /* Prevent recursion on broken link referrals */ - if (rc == -EREMOTE && ++count > MAX_NESTED_LINKS) - rc = -ELOOP; -diff --git a/fs/cifs/dfs_cache.c b/fs/cifs/dfs_cache.c -index 4950ab0486aee..098b4bc8da59a 100644 ---- a/fs/cifs/dfs_cache.c -+++ b/fs/cifs/dfs_cache.c -@@ -37,11 +37,12 @@ struct cache_dfs_tgt { - struct cache_entry { - struct hlist_node hlist; - const char *path; -- int ttl; -- int srvtype; -- int flags; -+ int hdr_flags; /* RESP_GET_DFS_REFERRAL.ReferralHeaderFlags */ -+ int ttl; /* DFS_REREFERRAL_V3.TimeToLive */ -+ int srvtype; /* DFS_REREFERRAL_V3.ServerType */ -+ int ref_flags; /* DFS_REREFERRAL_V3.ReferralEntryFlags */ - struct timespec64 etime; -- int path_consumed; -+ int path_consumed; /* RESP_GET_DFS_REFERRAL.PathConsumed */ - int numtgts; - struct list_head tlist; - struct cache_dfs_tgt *tgthint; -@@ -166,14 +167,11 @@ static int dfscache_proc_show(struct seq_file *m, void *v) - continue; - - seq_printf(m, -- "cache entry: path=%s,type=%s,ttl=%d,etime=%ld," -- "interlink=%s,path_consumed=%d,expired=%s\n", -- ce->path, -- ce->srvtype == DFS_TYPE_ROOT ? "root" : "link", -- ce->ttl, ce->etime.tv_nsec, -- IS_INTERLINK_SET(ce->flags) ? "yes" : "no", -- ce->path_consumed, -- cache_entry_expired(ce) ? "yes" : "no"); -+ "cache entry: path=%s,type=%s,ttl=%d,etime=%ld,hdr_flags=0x%x,ref_flags=0x%x,interlink=%s,path_consumed=%d,expired=%s\n", -+ ce->path, ce->srvtype == DFS_TYPE_ROOT ? "root" : "link", -+ ce->ttl, ce->etime.tv_nsec, ce->ref_flags, ce->hdr_flags, -+ IS_INTERLINK_SET(ce->hdr_flags) ? "yes" : "no", -+ ce->path_consumed, cache_entry_expired(ce) ? "yes" : "no"); - - list_for_each_entry(t, &ce->tlist, list) { - seq_printf(m, " %s%s\n", -@@ -236,11 +234,12 @@ static inline void dump_tgts(const struct cache_entry *ce) - - static inline void dump_ce(const struct cache_entry *ce) - { -- cifs_dbg(FYI, "cache entry: path=%s,type=%s,ttl=%d,etime=%ld,interlink=%s,path_consumed=%d,expired=%s\n", -+ cifs_dbg(FYI, "cache entry: path=%s,type=%s,ttl=%d,etime=%ld,hdr_flags=0x%x,ref_flags=0x%x,interlink=%s,path_consumed=%d,expired=%s\n", - ce->path, - ce->srvtype == DFS_TYPE_ROOT ? "root" : "link", ce->ttl, - ce->etime.tv_nsec, -- IS_INTERLINK_SET(ce->flags) ? "yes" : "no", -+ ce->hdr_flags, ce->ref_flags, -+ IS_INTERLINK_SET(ce->hdr_flags) ? "yes" : "no", - ce->path_consumed, - cache_entry_expired(ce) ? "yes" : "no"); - dump_tgts(ce); -@@ -381,7 +380,8 @@ static int copy_ref_data(const struct dfs_info3_param *refs, int numrefs, - ce->ttl = refs[0].ttl; - ce->etime = get_expire_time(ce->ttl); - ce->srvtype = refs[0].server_type; -- ce->flags = refs[0].ref_flag; -+ ce->hdr_flags = refs[0].flags; -+ ce->ref_flags = refs[0].ref_flag; - ce->path_consumed = refs[0].path_consumed; - - for (i = 0; i < numrefs; i++) { -@@ -799,7 +799,8 @@ static int setup_referral(const char *path, struct cache_entry *ce, - ref->path_consumed = ce->path_consumed; - ref->ttl = ce->ttl; - ref->server_type = ce->srvtype; -- ref->ref_flag = ce->flags; -+ ref->ref_flag = ce->ref_flags; -+ ref->flags = ce->hdr_flags; - - return 0; - -diff --git a/fs/cifs/fs_context.c b/fs/cifs/fs_context.c -index 12a5da0230b52..798c32cab146f 100644 ---- a/fs/cifs/fs_context.c -+++ b/fs/cifs/fs_context.c -@@ -542,20 +542,37 @@ static int smb3_fs_context_parse_monolithic(struct fs_context *fc, - - /* BB Need to add support for sep= here TBD */ - while ((key = strsep(&options, ",")) != NULL) { -- if (*key) { -- size_t v_len = 0; -- char *value = strchr(key, '='); -- -- if (value) { -- if (value == key) -- continue; -- *value++ = 0; -- v_len = strlen(value); -- } -- ret = vfs_parse_fs_string(fc, key, value, v_len); -- if (ret < 0) -- break; -+ size_t len; -+ char *value; -+ -+ if (*key == 0) -+ break; -+ -+ /* Check if following character is the deliminator If yes, -+ * we have encountered a double deliminator reset the NULL -+ * character to the deliminator -+ */ -+ while (options && options[0] == ',') { -+ len = strlen(key); -+ strcpy(key + len, options); -+ options = strchr(options, ','); -+ if (options) -+ *options++ = 0; - } -+ -+ -+ len = 0; -+ value = strchr(key, '='); -+ if (value) { -+ if (value == key) -+ continue; -+ *value++ = 0; -+ len = strlen(value); -+ } -+ -+ ret = vfs_parse_fs_string(fc, key, value, len); -+ if (ret < 0) -+ break; - } - - return ret; -diff --git a/fs/debugfs/inode.c b/fs/debugfs/inode.c -index 2fcf66473436b..86c7f04896207 100644 ---- a/fs/debugfs/inode.c -+++ b/fs/debugfs/inode.c -@@ -297,7 +297,7 @@ struct dentry *debugfs_lookup(const char *name, struct dentry *parent) - { - struct dentry *dentry; - -- if (IS_ERR(parent)) -+ if (!debugfs_initialized() || IS_ERR_OR_NULL(name) || IS_ERR(parent)) - return NULL; - - if (!parent) -@@ -318,6 +318,9 @@ static struct dentry *start_creating(const char *name, struct dentry *parent) - if (!(debugfs_allow & DEBUGFS_ALLOW_API)) - return ERR_PTR(-EPERM); - -+ if (!debugfs_initialized()) -+ return ERR_PTR(-ENOENT); -+ - pr_debug("creating file '%s'\n", name); - - if (IS_ERR(parent)) -diff --git a/fs/erofs/xattr.c b/fs/erofs/xattr.c -index 5bde77d708524..47314a26767a8 100644 ---- a/fs/erofs/xattr.c -+++ b/fs/erofs/xattr.c -@@ -48,8 +48,14 @@ static int init_inode_xattrs(struct inode *inode) - int ret = 0; - - /* the most case is that xattrs of this inode are initialized. */ -- if (test_bit(EROFS_I_EA_INITED_BIT, &vi->flags)) -+ if (test_bit(EROFS_I_EA_INITED_BIT, &vi->flags)) { -+ /* -+ * paired with smp_mb() at the end of the function to ensure -+ * fields will only be observed after the bit is set. -+ */ -+ smp_mb(); - return 0; -+ } - - if (wait_on_bit_lock(&vi->flags, EROFS_I_BL_XATTR_BIT, TASK_KILLABLE)) - return -ERESTARTSYS; -@@ -137,6 +143,8 @@ static int init_inode_xattrs(struct inode *inode) - } - xattr_iter_end(&it, atomic_map); - -+ /* paired with smp_mb() at the beginning of the function. */ -+ smp_mb(); - set_bit(EROFS_I_EA_INITED_BIT, &vi->flags); - - out_unlock: -diff --git a/fs/erofs/zmap.c b/fs/erofs/zmap.c -index ae325541884e3..14d2de35110cc 100644 ---- a/fs/erofs/zmap.c -+++ b/fs/erofs/zmap.c -@@ -36,8 +36,14 @@ static int z_erofs_fill_inode_lazy(struct inode *inode) - void *kaddr; - struct z_erofs_map_header *h; - -- if (test_bit(EROFS_I_Z_INITED_BIT, &vi->flags)) -+ if (test_bit(EROFS_I_Z_INITED_BIT, &vi->flags)) { -+ /* -+ * paired with smp_mb() at the end of the function to ensure -+ * fields will only be observed after the bit is set. -+ */ -+ smp_mb(); - return 0; -+ } - - if (wait_on_bit_lock(&vi->flags, EROFS_I_BL_Z_BIT, TASK_KILLABLE)) - return -ERESTARTSYS; -@@ -83,6 +89,8 @@ static int z_erofs_fill_inode_lazy(struct inode *inode) - - vi->z_physical_clusterbits[1] = vi->z_logical_clusterbits + - ((h->h_clusterbits >> 5) & 7); -+ /* paired with smp_mb() at the beginning of the function */ -+ smp_mb(); - set_bit(EROFS_I_Z_INITED_BIT, &vi->flags); - unmap_done: - kunmap_atomic(kaddr); -diff --git a/fs/eventpoll.c b/fs/eventpoll.c -index a829af074eb58..3196474cbe24c 100644 ---- a/fs/eventpoll.c -+++ b/fs/eventpoll.c -@@ -979,7 +979,7 @@ static struct epitem *ep_find(struct eventpoll *ep, struct file *file, int fd) - return epir; - } - --#ifdef CONFIG_CHECKPOINT_RESTORE -+#ifdef CONFIG_KCMP - static struct epitem *ep_find_tfd(struct eventpoll *ep, int tfd, unsigned long toff) - { - struct rb_node *rbp; -@@ -1021,7 +1021,7 @@ struct file *get_epoll_tfile_raw_ptr(struct file *file, int tfd, - - return file_raw; - } --#endif /* CONFIG_CHECKPOINT_RESTORE */ -+#endif /* CONFIG_KCMP */ - - /** - * Adds a new entry to the tail of the list in a lockless way, i.e. -diff --git a/fs/exfat/exfat_raw.h b/fs/exfat/exfat_raw.h -index 6aec6288e1f21..7f39b1c6469c4 100644 ---- a/fs/exfat/exfat_raw.h -+++ b/fs/exfat/exfat_raw.h -@@ -77,6 +77,10 @@ - - #define EXFAT_FILE_NAME_LEN 15 - -+#define EXFAT_MIN_SECT_SIZE_BITS 9 -+#define EXFAT_MAX_SECT_SIZE_BITS 12 -+#define EXFAT_MAX_SECT_PER_CLUS_BITS(x) (25 - (x)->sect_size_bits) -+ - /* EXFAT: Main and Backup Boot Sector (512 bytes) */ - struct boot_sector { - __u8 jmp_boot[BOOTSEC_JUMP_BOOT_LEN]; -diff --git a/fs/exfat/super.c b/fs/exfat/super.c -index 87be5bfc31eb4..c6d8d2e534865 100644 ---- a/fs/exfat/super.c -+++ b/fs/exfat/super.c -@@ -381,8 +381,7 @@ static int exfat_calibrate_blocksize(struct super_block *sb, int logical_sect) - { - struct exfat_sb_info *sbi = EXFAT_SB(sb); - -- if (!is_power_of_2(logical_sect) || -- logical_sect < 512 || logical_sect > 4096) { -+ if (!is_power_of_2(logical_sect)) { - exfat_err(sb, "bogus logical sector size %u", logical_sect); - return -EIO; - } -@@ -451,6 +450,25 @@ static int exfat_read_boot_sector(struct super_block *sb) - return -EINVAL; - } - -+ /* -+ * sect_size_bits could be at least 9 and at most 12. -+ */ -+ if (p_boot->sect_size_bits < EXFAT_MIN_SECT_SIZE_BITS || -+ p_boot->sect_size_bits > EXFAT_MAX_SECT_SIZE_BITS) { -+ exfat_err(sb, "bogus sector size bits : %u\n", -+ p_boot->sect_size_bits); -+ return -EINVAL; -+ } -+ -+ /* -+ * sect_per_clus_bits could be at least 0 and at most 25 - sect_size_bits. -+ */ -+ if (p_boot->sect_per_clus_bits > EXFAT_MAX_SECT_PER_CLUS_BITS(p_boot)) { -+ exfat_err(sb, "bogus sectors bits per cluster : %u\n", -+ p_boot->sect_per_clus_bits); -+ return -EINVAL; -+ } -+ - sbi->sect_per_clus = 1 << p_boot->sect_per_clus_bits; - sbi->sect_per_clus_bits = p_boot->sect_per_clus_bits; - sbi->cluster_size_bits = p_boot->sect_per_clus_bits + -@@ -477,16 +495,19 @@ static int exfat_read_boot_sector(struct super_block *sb) - sbi->used_clusters = EXFAT_CLUSTERS_UNTRACKED; - - /* check consistencies */ -- if (sbi->num_FAT_sectors << p_boot->sect_size_bits < -- sbi->num_clusters * 4) { -+ if ((u64)sbi->num_FAT_sectors << p_boot->sect_size_bits < -+ (u64)sbi->num_clusters * 4) { - exfat_err(sb, "bogus fat length"); - return -EINVAL; - } -+ - if (sbi->data_start_sector < -- sbi->FAT1_start_sector + sbi->num_FAT_sectors * p_boot->num_fats) { -+ (u64)sbi->FAT1_start_sector + -+ (u64)sbi->num_FAT_sectors * p_boot->num_fats) { - exfat_err(sb, "bogus data start sector"); - return -EINVAL; - } -+ - if (sbi->vol_flags & VOLUME_DIRTY) - exfat_warn(sb, "Volume was not properly unmounted. Some data may be corrupt. Please run fsck."); - if (sbi->vol_flags & MEDIA_FAILURE) -diff --git a/fs/ext4/Kconfig b/fs/ext4/Kconfig -index 619dd35ddd48a..86699c8cab281 100644 ---- a/fs/ext4/Kconfig -+++ b/fs/ext4/Kconfig -@@ -103,8 +103,7 @@ config EXT4_DEBUG - - config EXT4_KUNIT_TESTS - tristate "KUnit tests for ext4" if !KUNIT_ALL_TESTS -- select EXT4_FS -- depends on KUNIT -+ depends on EXT4_FS && KUNIT - default KUNIT_ALL_TESTS - help - This builds the ext4 KUnit tests. -diff --git a/fs/ext4/namei.c b/fs/ext4/namei.c -index cf652ba3e74d2..df0368d578b16 100644 ---- a/fs/ext4/namei.c -+++ b/fs/ext4/namei.c -@@ -2401,11 +2401,10 @@ again: - (frame - 1)->bh); - if (err) - goto journal_error; -- if (restart) { -- err = ext4_handle_dirty_dx_node(handle, dir, -- frame->bh); -+ err = ext4_handle_dirty_dx_node(handle, dir, -+ frame->bh); -+ if (err) - goto journal_error; -- } - } else { - struct dx_root *dxroot; - memcpy((char *) entries2, (char *) entries, -diff --git a/fs/f2fs/compress.c b/fs/f2fs/compress.c -index 4bcbacfe33259..7a774c9e4cb89 100644 ---- a/fs/f2fs/compress.c -+++ b/fs/f2fs/compress.c -@@ -1415,7 +1415,7 @@ retry_write: - - ret = f2fs_write_single_data_page(cc->rpages[i], &_submitted, - NULL, NULL, wbc, io_type, -- compr_blocks); -+ compr_blocks, false); - if (ret) { - if (ret == AOP_WRITEPAGE_ACTIVATE) { - unlock_page(cc->rpages[i]); -@@ -1450,6 +1450,9 @@ retry_write: - - *submitted += _submitted; - } -+ -+ f2fs_balance_fs(F2FS_M_SB(mapping), true); -+ - return 0; - out_err: - for (++i; i < cc->cluster_size; i++) { -diff --git a/fs/f2fs/data.c b/fs/f2fs/data.c -index aa34d620bec98..4d3ebf094f6d7 100644 ---- a/fs/f2fs/data.c -+++ b/fs/f2fs/data.c -@@ -499,7 +499,7 @@ static inline void __submit_bio(struct f2fs_sb_info *sbi, - if (f2fs_lfs_mode(sbi) && current->plug) - blk_finish_plug(current->plug); - -- if (F2FS_IO_ALIGNED(sbi)) -+ if (!F2FS_IO_ALIGNED(sbi)) - goto submit_io; - - start = bio->bi_iter.bi_size >> F2FS_BLKSIZE_BITS; -@@ -2743,7 +2743,8 @@ int f2fs_write_single_data_page(struct page *page, int *submitted, - sector_t *last_block, - struct writeback_control *wbc, - enum iostat_type io_type, -- int compr_blocks) -+ int compr_blocks, -+ bool allow_balance) - { - struct inode *inode = page->mapping->host; - struct f2fs_sb_info *sbi = F2FS_I_SB(inode); -@@ -2881,7 +2882,7 @@ out: - } - unlock_page(page); - if (!S_ISDIR(inode->i_mode) && !IS_NOQUOTA(inode) && -- !F2FS_I(inode)->cp_task) -+ !F2FS_I(inode)->cp_task && allow_balance) - f2fs_balance_fs(sbi, need_balance_fs); - - if (unlikely(f2fs_cp_error(sbi))) { -@@ -2928,7 +2929,7 @@ out: - #endif - - return f2fs_write_single_data_page(page, NULL, NULL, NULL, -- wbc, FS_DATA_IO, 0); -+ wbc, FS_DATA_IO, 0, true); - } - - /* -@@ -3096,7 +3097,8 @@ continue_unlock: - } - #endif - ret = f2fs_write_single_data_page(page, &submitted, -- &bio, &last_block, wbc, io_type, 0); -+ &bio, &last_block, wbc, io_type, -+ 0, true); - if (ret == AOP_WRITEPAGE_ACTIVATE) - unlock_page(page); - #ifdef CONFIG_F2FS_FS_COMPRESSION -diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h -index bb11759191dcc..1578402c58444 100644 ---- a/fs/f2fs/f2fs.h -+++ b/fs/f2fs/f2fs.h -@@ -3469,7 +3469,7 @@ int f2fs_write_single_data_page(struct page *page, int *submitted, - struct bio **bio, sector_t *last_block, - struct writeback_control *wbc, - enum iostat_type io_type, -- int compr_blocks); -+ int compr_blocks, bool allow_balance); - void f2fs_invalidate_page(struct page *page, unsigned int offset, - unsigned int length); - int f2fs_release_page(struct page *page, gfp_t wait); -diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c -index f585545277d77..d5ebc67c7130b 100644 ---- a/fs/f2fs/file.c -+++ b/fs/f2fs/file.c -@@ -60,6 +60,9 @@ static vm_fault_t f2fs_vm_page_mkwrite(struct vm_fault *vmf) - bool need_alloc = true; - int err = 0; - -+ if (unlikely(IS_IMMUTABLE(inode))) -+ return VM_FAULT_SIGBUS; -+ - if (unlikely(f2fs_cp_error(sbi))) { - err = -EIO; - goto err; -@@ -767,6 +770,10 @@ int f2fs_truncate(struct inode *inode) - return -EIO; - } - -+ err = dquot_initialize(inode); -+ if (err) -+ return err; -+ - /* we should check inline_data size */ - if (!f2fs_may_inline_data(inode)) { - err = f2fs_convert_inline_inode(inode); -@@ -848,7 +855,8 @@ static void __setattr_copy(struct inode *inode, const struct iattr *attr) - if (ia_valid & ATTR_MODE) { - umode_t mode = attr->ia_mode; - -- if (!in_group_p(inode->i_gid) && !capable(CAP_FSETID)) -+ if (!in_group_p(inode->i_gid) && -+ !capable_wrt_inode_uidgid(inode, CAP_FSETID)) - mode &= ~S_ISGID; - set_acl_inode(inode, mode); - } -@@ -865,6 +873,14 @@ int f2fs_setattr(struct dentry *dentry, struct iattr *attr) - if (unlikely(f2fs_cp_error(F2FS_I_SB(inode)))) - return -EIO; - -+ if (unlikely(IS_IMMUTABLE(inode))) -+ return -EPERM; -+ -+ if (unlikely(IS_APPEND(inode) && -+ (attr->ia_valid & (ATTR_MODE | ATTR_UID | -+ ATTR_GID | ATTR_TIMES_SET)))) -+ return -EPERM; -+ - if ((attr->ia_valid & ATTR_SIZE) && - !f2fs_is_compress_backend_ready(inode)) - return -EOPNOTSUPP; -@@ -4043,8 +4059,10 @@ static int redirty_blocks(struct inode *inode, pgoff_t page_idx, int len) - - for (i = 0; i < page_len; i++, redirty_idx++) { - page = find_lock_page(mapping, redirty_idx); -- if (!page) -- ret = -ENOENT; -+ if (!page) { -+ ret = -ENOMEM; -+ break; -+ } - set_page_dirty(page); - f2fs_put_page(page, 1); - f2fs_put_page(page, 0); -@@ -4349,6 +4367,11 @@ static ssize_t f2fs_file_write_iter(struct kiocb *iocb, struct iov_iter *from) - inode_lock(inode); - } - -+ if (unlikely(IS_IMMUTABLE(inode))) { -+ ret = -EPERM; -+ goto unlock; -+ } -+ - ret = generic_write_checks(iocb, from); - if (ret > 0) { - bool preallocated = false; -@@ -4413,6 +4436,7 @@ write: - if (ret > 0) - f2fs_update_iostat(F2FS_I_SB(inode), APP_WRITE_IO, ret); - } -+unlock: - inode_unlock(inode); - out: - trace_f2fs_file_write_iter(inode, iocb->ki_pos, -diff --git a/fs/f2fs/inline.c b/fs/f2fs/inline.c -index 806ebabf58706..993caefcd2bb0 100644 ---- a/fs/f2fs/inline.c -+++ b/fs/f2fs/inline.c -@@ -192,6 +192,10 @@ int f2fs_convert_inline_inode(struct inode *inode) - f2fs_hw_is_readonly(sbi) || f2fs_readonly(sbi->sb)) - return 0; - -+ err = dquot_initialize(inode); -+ if (err) -+ return err; -+ - page = f2fs_grab_cache_page(inode->i_mapping, 0, false); - if (!page) - return -ENOMEM; -diff --git a/fs/f2fs/super.c b/fs/f2fs/super.c -index b4a07fe62d1a5..972736d71fa4d 100644 ---- a/fs/f2fs/super.c -+++ b/fs/f2fs/super.c -@@ -1796,6 +1796,9 @@ restore_flag: - - static void f2fs_enable_checkpoint(struct f2fs_sb_info *sbi) - { -+ /* we should flush all the data to keep data consistency */ -+ sync_inodes_sb(sbi->sb); -+ - down_write(&sbi->gc_lock); - f2fs_dirty_to_prefree(sbi); - -diff --git a/fs/gfs2/bmap.c b/fs/gfs2/bmap.c -index 62d9081d1e26e..a1f9dde33058f 100644 ---- a/fs/gfs2/bmap.c -+++ b/fs/gfs2/bmap.c -@@ -1230,6 +1230,9 @@ static int gfs2_iomap_end(struct inode *inode, loff_t pos, loff_t length, - - gfs2_inplace_release(ip); - -+ if (ip->i_qadata && ip->i_qadata->qa_qd_num) -+ gfs2_quota_unlock(ip); -+ - if (length != written && (iomap->flags & IOMAP_F_NEW)) { - /* Deallocate blocks that were just allocated. */ - loff_t blockmask = i_blocksize(inode) - 1; -@@ -1242,9 +1245,6 @@ static int gfs2_iomap_end(struct inode *inode, loff_t pos, loff_t length, - } - } - -- if (ip->i_qadata && ip->i_qadata->qa_qd_num) -- gfs2_quota_unlock(ip); -- - if (unlikely(!written)) - goto out_unlock; - -diff --git a/fs/gfs2/lock_dlm.c b/fs/gfs2/lock_dlm.c -index 9f2b5609f225d..153272f82984b 100644 ---- a/fs/gfs2/lock_dlm.c -+++ b/fs/gfs2/lock_dlm.c -@@ -284,7 +284,6 @@ static void gdlm_put_lock(struct gfs2_glock *gl) - { - struct gfs2_sbd *sdp = gl->gl_name.ln_sbd; - struct lm_lockstruct *ls = &sdp->sd_lockstruct; -- int lvb_needs_unlock = 0; - int error; - - if (gl->gl_lksb.sb_lkid == 0) { -@@ -297,13 +296,10 @@ static void gdlm_put_lock(struct gfs2_glock *gl) - gfs2_sbstats_inc(gl, GFS2_LKS_DCOUNT); - gfs2_update_request_times(gl); - -- /* don't want to skip dlm_unlock writing the lvb when lock is ex */ -- -- if (gl->gl_lksb.sb_lvbptr && (gl->gl_state == LM_ST_EXCLUSIVE)) -- lvb_needs_unlock = 1; -+ /* don't want to skip dlm_unlock writing the lvb when lock has one */ - - if (test_bit(SDF_SKIP_DLM_UNLOCK, &sdp->sd_flags) && -- !lvb_needs_unlock) { -+ !gl->gl_lksb.sb_lvbptr) { - gfs2_glock_free(gl); - return; - } -diff --git a/fs/gfs2/recovery.c b/fs/gfs2/recovery.c -index c26c68ebd29d4..a3c1911862f01 100644 ---- a/fs/gfs2/recovery.c -+++ b/fs/gfs2/recovery.c -@@ -514,8 +514,10 @@ void gfs2_recover_func(struct work_struct *work) - error = foreach_descriptor(jd, head.lh_tail, - head.lh_blkno, pass); - lops_after_scan(jd, error, pass); -- if (error) -+ if (error) { -+ up_read(&sdp->sd_log_flush_lock); - goto fail_gunlock_thaw; -+ } - } - - recover_local_statfs(jd, &head); -diff --git a/fs/gfs2/util.c b/fs/gfs2/util.c -index a374397f42730..574bea29f21ee 100644 ---- a/fs/gfs2/util.c -+++ b/fs/gfs2/util.c -@@ -93,9 +93,10 @@ out_unlock: - - static void signal_our_withdraw(struct gfs2_sbd *sdp) - { -- struct gfs2_glock *gl = sdp->sd_live_gh.gh_gl; -+ struct gfs2_glock *live_gl = sdp->sd_live_gh.gh_gl; - struct inode *inode = sdp->sd_jdesc->jd_inode; - struct gfs2_inode *ip = GFS2_I(inode); -+ struct gfs2_glock *i_gl = ip->i_gl; - u64 no_formal_ino = ip->i_no_formal_ino; - int ret = 0; - int tries; -@@ -141,7 +142,8 @@ static void signal_our_withdraw(struct gfs2_sbd *sdp) - atomic_set(&sdp->sd_freeze_state, SFS_FROZEN); - thaw_super(sdp->sd_vfs); - } else { -- wait_on_bit(&gl->gl_flags, GLF_DEMOTE, TASK_UNINTERRUPTIBLE); -+ wait_on_bit(&i_gl->gl_flags, GLF_DEMOTE, -+ TASK_UNINTERRUPTIBLE); - } - - /* -@@ -161,15 +163,15 @@ static void signal_our_withdraw(struct gfs2_sbd *sdp) - * on other nodes to be successful, otherwise we remain the owner of - * the glock as far as dlm is concerned. - */ -- if (gl->gl_ops->go_free) { -- set_bit(GLF_FREEING, &gl->gl_flags); -- wait_on_bit(&gl->gl_flags, GLF_FREEING, TASK_UNINTERRUPTIBLE); -+ if (i_gl->gl_ops->go_free) { -+ set_bit(GLF_FREEING, &i_gl->gl_flags); -+ wait_on_bit(&i_gl->gl_flags, GLF_FREEING, TASK_UNINTERRUPTIBLE); - } - - /* - * Dequeue the "live" glock, but keep a reference so it's never freed. - */ -- gfs2_glock_hold(gl); -+ gfs2_glock_hold(live_gl); - gfs2_glock_dq_wait(&sdp->sd_live_gh); - /* - * We enqueue the "live" glock in EX so that all other nodes -@@ -208,7 +210,7 @@ static void signal_our_withdraw(struct gfs2_sbd *sdp) - gfs2_glock_nq(&sdp->sd_live_gh); - } - -- gfs2_glock_queue_put(gl); /* drop the extra reference we acquired */ -+ gfs2_glock_queue_put(live_gl); /* drop extra reference we acquired */ - clear_bit(SDF_WITHDRAW_RECOVERY, &sdp->sd_flags); - - /* -diff --git a/fs/io_uring.c b/fs/io_uring.c -index 931671082e615..4d0ede0418571 100644 ---- a/fs/io_uring.c -+++ b/fs/io_uring.c -@@ -8723,8 +8723,21 @@ static __poll_t io_uring_poll(struct file *file, poll_table *wait) - smp_rmb(); - if (!io_sqring_full(ctx)) - mask |= EPOLLOUT | EPOLLWRNORM; -- io_cqring_overflow_flush(ctx, false, NULL, NULL); -- if (io_cqring_events(ctx)) -+ -+ /* -+ * Don't flush cqring overflow list here, just do a simple check. -+ * Otherwise there could possible be ABBA deadlock: -+ * CPU0 CPU1 -+ * ---- ---- -+ * lock(&ctx->uring_lock); -+ * lock(&ep->mtx); -+ * lock(&ctx->uring_lock); -+ * lock(&ep->mtx); -+ * -+ * Users may get EPOLLIN meanwhile seeing nothing in cqring, this -+ * pushs them to do the flush. -+ */ -+ if (io_cqring_events(ctx) || test_bit(0, &ctx->cq_check_overflow)) - mask |= EPOLLIN | EPOLLRDNORM; - - return mask; -diff --git a/fs/isofs/dir.c b/fs/isofs/dir.c -index f0fe641893a5e..b9e6a7ec78be4 100644 ---- a/fs/isofs/dir.c -+++ b/fs/isofs/dir.c -@@ -152,6 +152,7 @@ static int do_isofs_readdir(struct inode *inode, struct file *file, - printk(KERN_NOTICE "iso9660: Corrupted directory entry" - " in block %lu of inode %lu\n", block, - inode->i_ino); -+ brelse(bh); - return -EIO; - } - -diff --git a/fs/isofs/namei.c b/fs/isofs/namei.c -index 402769881c32b..58f80e1b3ac0d 100644 ---- a/fs/isofs/namei.c -+++ b/fs/isofs/namei.c -@@ -102,6 +102,7 @@ isofs_find_entry(struct inode *dir, struct dentry *dentry, - printk(KERN_NOTICE "iso9660: Corrupted directory entry" - " in block %lu of inode %lu\n", block, - dir->i_ino); -+ brelse(bh); - return 0; - } - -diff --git a/fs/jffs2/summary.c b/fs/jffs2/summary.c -index be7c8a6a57480..4fe64519870f1 100644 ---- a/fs/jffs2/summary.c -+++ b/fs/jffs2/summary.c -@@ -783,6 +783,8 @@ static int jffs2_sum_write_data(struct jffs2_sb_info *c, struct jffs2_eraseblock - dbg_summary("Writing unknown RWCOMPAT_COPY node type %x\n", - je16_to_cpu(temp->u.nodetype)); - jffs2_sum_disable_collecting(c->summary); -+ /* The above call removes the list, nothing more to do */ -+ goto bail_rwcompat; - } else { - BUG(); /* unknown node in summary information */ - } -@@ -794,6 +796,7 @@ static int jffs2_sum_write_data(struct jffs2_sb_info *c, struct jffs2_eraseblock - - c->summary->sum_num--; - } -+ bail_rwcompat: - - jffs2_sum_reset_collected(c->summary); - -diff --git a/fs/jfs/jfs_dmap.c b/fs/jfs/jfs_dmap.c -index 94b7c1cb5ceb3..7aee156086198 100644 ---- a/fs/jfs/jfs_dmap.c -+++ b/fs/jfs/jfs_dmap.c -@@ -1656,7 +1656,7 @@ s64 dbDiscardAG(struct inode *ip, int agno, s64 minlen) - } else if (rc == -ENOSPC) { - /* search for next smaller log2 block */ - l2nb = BLKSTOL2(nblocks) - 1; -- nblocks = 1 << l2nb; -+ nblocks = 1LL << l2nb; - } else { - /* Trim any already allocated blocks */ - jfs_error(bmp->db_ipbmap->i_sb, "-EIO\n"); -diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c -index 2f4679a62712a..fc8bbfd9beb36 100644 ---- a/fs/nfs/nfs4proc.c -+++ b/fs/nfs/nfs4proc.c -@@ -5438,15 +5438,16 @@ static void nfs4_bitmask_adjust(__u32 *bitmask, struct inode *inode, - - if (cache_validity & NFS_INO_INVALID_ATIME) - bitmask[1] |= FATTR4_WORD1_TIME_ACCESS; -- if (cache_validity & NFS_INO_INVALID_ACCESS) -- bitmask[0] |= FATTR4_WORD1_MODE | FATTR4_WORD1_OWNER | -- FATTR4_WORD1_OWNER_GROUP; -- if (cache_validity & NFS_INO_INVALID_ACL) -- bitmask[0] |= FATTR4_WORD0_ACL; -- if (cache_validity & NFS_INO_INVALID_LABEL) -+ if (cache_validity & NFS_INO_INVALID_OTHER) -+ bitmask[1] |= FATTR4_WORD1_MODE | FATTR4_WORD1_OWNER | -+ FATTR4_WORD1_OWNER_GROUP | -+ FATTR4_WORD1_NUMLINKS; -+ if (label && label->len && cache_validity & NFS_INO_INVALID_LABEL) - bitmask[2] |= FATTR4_WORD2_SECURITY_LABEL; -- if (cache_validity & NFS_INO_INVALID_CTIME) -+ if (cache_validity & NFS_INO_INVALID_CHANGE) - bitmask[0] |= FATTR4_WORD0_CHANGE; -+ if (cache_validity & NFS_INO_INVALID_CTIME) -+ bitmask[1] |= FATTR4_WORD1_TIME_METADATA; - if (cache_validity & NFS_INO_INVALID_MTIME) - bitmask[1] |= FATTR4_WORD1_TIME_MODIFY; - if (cache_validity & NFS_INO_INVALID_SIZE) -diff --git a/fs/nfsd/nfsctl.c b/fs/nfsd/nfsctl.c -index f6d5d783f4a45..0759e589ab52b 100644 ---- a/fs/nfsd/nfsctl.c -+++ b/fs/nfsd/nfsctl.c -@@ -1522,12 +1522,9 @@ static int __init init_nfsd(void) - int retval; - printk(KERN_INFO "Installing knfsd (copyright (C) 1996 okir@monad.swb.de).\n"); - -- retval = register_pernet_subsys(&nfsd_net_ops); -- if (retval < 0) -- return retval; - retval = register_cld_notifier(); - if (retval) -- goto out_unregister_pernet; -+ return retval; - retval = nfsd4_init_slabs(); - if (retval) - goto out_unregister_notifier; -@@ -1544,9 +1541,14 @@ static int __init init_nfsd(void) - goto out_free_lockd; - retval = register_filesystem(&nfsd_fs_type); - if (retval) -+ goto out_free_exports; -+ retval = register_pernet_subsys(&nfsd_net_ops); -+ if (retval < 0) - goto out_free_all; - return 0; - out_free_all: -+ unregister_pernet_subsys(&nfsd_net_ops); -+out_free_exports: - remove_proc_entry("fs/nfs/exports", NULL); - remove_proc_entry("fs/nfs", NULL); - out_free_lockd: -@@ -1559,13 +1561,12 @@ out_free_slabs: - nfsd4_free_slabs(); - out_unregister_notifier: - unregister_cld_notifier(); --out_unregister_pernet: -- unregister_pernet_subsys(&nfsd_net_ops); - return retval; - } - - static void __exit exit_nfsd(void) - { -+ unregister_pernet_subsys(&nfsd_net_ops); - nfsd_drc_slab_free(); - remove_proc_entry("fs/nfs/exports", NULL); - remove_proc_entry("fs/nfs", NULL); -@@ -1575,7 +1576,6 @@ static void __exit exit_nfsd(void) - nfsd4_exit_pnfs(); - unregister_filesystem(&nfsd_fs_type); - unregister_cld_notifier(); -- unregister_pernet_subsys(&nfsd_net_ops); - } - - MODULE_AUTHOR("Olaf Kirch "); -diff --git a/fs/ocfs2/cluster/heartbeat.c b/fs/ocfs2/cluster/heartbeat.c -index 0179a73a3fa2c..12a7590601ddb 100644 ---- a/fs/ocfs2/cluster/heartbeat.c -+++ b/fs/ocfs2/cluster/heartbeat.c -@@ -2042,7 +2042,7 @@ static struct config_item *o2hb_heartbeat_group_make_item(struct config_group *g - o2hb_nego_timeout_handler, - reg, NULL, ®->hr_handler_list); - if (ret) -- goto free; -+ goto remove_item; - - ret = o2net_register_handler(O2HB_NEGO_APPROVE_MSG, reg->hr_key, - sizeof(struct o2hb_nego_msg), -@@ -2057,6 +2057,12 @@ static struct config_item *o2hb_heartbeat_group_make_item(struct config_group *g - - unregister_handler: - o2net_unregister_handler_list(®->hr_handler_list); -+remove_item: -+ spin_lock(&o2hb_live_lock); -+ list_del(®->hr_all_item); -+ if (o2hb_global_heartbeat_active()) -+ clear_bit(reg->hr_region_num, o2hb_region_bitmap); -+ spin_unlock(&o2hb_live_lock); - free: - kfree(reg); - return ERR_PTR(ret); -diff --git a/fs/proc/proc_sysctl.c b/fs/proc/proc_sysctl.c -index d2018f70d1fae..070d2df8ab9cf 100644 ---- a/fs/proc/proc_sysctl.c -+++ b/fs/proc/proc_sysctl.c -@@ -571,7 +571,7 @@ static ssize_t proc_sys_call_handler(struct kiocb *iocb, struct iov_iter *iter, - error = -ENOMEM; - if (count >= KMALLOC_MAX_SIZE) - goto out; -- kbuf = kzalloc(count + 1, GFP_KERNEL); -+ kbuf = kvzalloc(count + 1, GFP_KERNEL); - if (!kbuf) - goto out; - -@@ -600,7 +600,7 @@ static ssize_t proc_sys_call_handler(struct kiocb *iocb, struct iov_iter *iter, - - error = count; - out_free_buf: -- kfree(kbuf); -+ kvfree(kbuf); - out: - sysctl_head_finish(head); - -diff --git a/fs/proc/self.c b/fs/proc/self.c -index cc71ce3466dc0..a4012154e1096 100644 ---- a/fs/proc/self.c -+++ b/fs/proc/self.c -@@ -20,7 +20,7 @@ static const char *proc_self_get_link(struct dentry *dentry, - * Not currently supported. Once we can inherit all of struct pid, - * we can allow this. - */ -- if (current->flags & PF_KTHREAD) -+ if (current->flags & PF_IO_WORKER) - return ERR_PTR(-EOPNOTSUPP); - - if (!tgid) -diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c -index 602e3a52884d8..3cec6fbef725e 100644 ---- a/fs/proc/task_mmu.c -+++ b/fs/proc/task_mmu.c -@@ -1210,7 +1210,6 @@ static ssize_t clear_refs_write(struct file *file, const char __user *buf, - struct mm_struct *mm; - struct vm_area_struct *vma; - enum clear_refs_types type; -- struct mmu_gather tlb; - int itype; - int rv; - -@@ -1249,7 +1248,6 @@ static ssize_t clear_refs_write(struct file *file, const char __user *buf, - goto out_unlock; - } - -- tlb_gather_mmu(&tlb, mm, 0, -1); - if (type == CLEAR_REFS_SOFT_DIRTY) { - for (vma = mm->mmap; vma; vma = vma->vm_next) { - if (!(vma->vm_flags & VM_SOFTDIRTY)) -@@ -1258,15 +1256,18 @@ static ssize_t clear_refs_write(struct file *file, const char __user *buf, - vma_set_page_prot(vma); - } - -+ inc_tlb_flush_pending(mm); - mmu_notifier_range_init(&range, MMU_NOTIFY_SOFT_DIRTY, - 0, NULL, mm, 0, -1UL); - mmu_notifier_invalidate_range_start(&range); - } - walk_page_range(mm, 0, mm->highest_vm_end, &clear_refs_walk_ops, - &cp); -- if (type == CLEAR_REFS_SOFT_DIRTY) -+ if (type == CLEAR_REFS_SOFT_DIRTY) { - mmu_notifier_invalidate_range_end(&range); -- tlb_finish_mmu(&tlb, 0, -1); -+ flush_tlb_mm(mm); -+ dec_tlb_flush_pending(mm); -+ } - out_unlock: - mmap_write_unlock(mm); - out_mm: -diff --git a/fs/proc/thread_self.c b/fs/proc/thread_self.c -index a553273fbd417..d56681d86d28a 100644 ---- a/fs/proc/thread_self.c -+++ b/fs/proc/thread_self.c -@@ -17,6 +17,13 @@ static const char *proc_thread_self_get_link(struct dentry *dentry, - pid_t pid = task_pid_nr_ns(current, ns); - char *name; - -+ /* -+ * Not currently supported. Once we can inherit all of struct pid, -+ * we can allow this. -+ */ -+ if (current->flags & PF_IO_WORKER) -+ return ERR_PTR(-EOPNOTSUPP); -+ - if (!pid) - return ERR_PTR(-ENOENT); - name = kmalloc(10 + 6 + 10 + 1, dentry ? GFP_KERNEL : GFP_ATOMIC); -diff --git a/fs/pstore/platform.c b/fs/pstore/platform.c -index 32f64abc277c3..d963ae7902f92 100644 ---- a/fs/pstore/platform.c -+++ b/fs/pstore/platform.c -@@ -269,7 +269,7 @@ static int pstore_compress(const void *in, void *out, - { - int ret; - -- if (!IS_ENABLED(CONFIG_PSTORE_COMPRESSION)) -+ if (!IS_ENABLED(CONFIG_PSTORE_COMPRESS)) - return -EINVAL; - - ret = crypto_comp_compress(tfm, in, inlen, out, &outlen); -@@ -671,7 +671,7 @@ static void decompress_record(struct pstore_record *record) - int unzipped_len; - char *unzipped, *workspace; - -- if (!IS_ENABLED(CONFIG_PSTORE_COMPRESSION) || !record->compressed) -+ if (!IS_ENABLED(CONFIG_PSTORE_COMPRESS) || !record->compressed) - return; - - /* Only PSTORE_TYPE_DMESG support compression. */ -diff --git a/fs/quota/quota_v2.c b/fs/quota/quota_v2.c -index c21106557a37e..b1467f3921c28 100644 ---- a/fs/quota/quota_v2.c -+++ b/fs/quota/quota_v2.c -@@ -164,19 +164,24 @@ static int v2_read_file_info(struct super_block *sb, int type) - quota_error(sb, "Number of blocks too big for quota file size (%llu > %llu).", - (loff_t)qinfo->dqi_blocks << qinfo->dqi_blocksize_bits, - i_size_read(sb_dqopt(sb)->files[type])); -- goto out; -+ goto out_free; - } - if (qinfo->dqi_free_blk >= qinfo->dqi_blocks) { - quota_error(sb, "Free block number too big (%u >= %u).", - qinfo->dqi_free_blk, qinfo->dqi_blocks); -- goto out; -+ goto out_free; - } - if (qinfo->dqi_free_entry >= qinfo->dqi_blocks) { - quota_error(sb, "Block with free entry too big (%u >= %u).", - qinfo->dqi_free_entry, qinfo->dqi_blocks); -- goto out; -+ goto out_free; - } - ret = 0; -+out_free: -+ if (ret) { -+ kfree(info->dqi_priv); -+ info->dqi_priv = NULL; -+ } - out: - up_read(&dqopt->dqio_sem); - return ret; -diff --git a/fs/ubifs/auth.c b/fs/ubifs/auth.c -index 51a7c8c2c3f0a..e564d5ff87816 100644 ---- a/fs/ubifs/auth.c -+++ b/fs/ubifs/auth.c -@@ -327,7 +327,7 @@ int ubifs_init_authentication(struct ubifs_info *c) - ubifs_err(c, "hmac %s is bigger than maximum allowed hmac size (%d > %d)", - hmac_name, c->hmac_desc_len, UBIFS_HMAC_ARR_SZ); - err = -EINVAL; -- goto out_free_hash; -+ goto out_free_hmac; - } - - err = crypto_shash_setkey(c->hmac_tfm, ukp->data, ukp->datalen); -diff --git a/fs/ubifs/replay.c b/fs/ubifs/replay.c -index 79801c9a5b874..0f8a6a16421b4 100644 ---- a/fs/ubifs/replay.c -+++ b/fs/ubifs/replay.c -@@ -559,7 +559,9 @@ static int is_last_bud(struct ubifs_info *c, struct ubifs_bud *bud) - } - - /* authenticate_sleb_hash is split out for stack usage */ --static int authenticate_sleb_hash(struct ubifs_info *c, struct shash_desc *log_hash, u8 *hash) -+static int noinline_for_stack -+authenticate_sleb_hash(struct ubifs_info *c, -+ struct shash_desc *log_hash, u8 *hash) - { - SHASH_DESC_ON_STACK(hash_desc, c->hash_tfm); - -diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c -index 138b9426c6c18..ddb2ca636c93d 100644 ---- a/fs/ubifs/super.c -+++ b/fs/ubifs/super.c -@@ -838,8 +838,10 @@ static int alloc_wbufs(struct ubifs_info *c) - c->jheads[i].wbuf.jhead = i; - c->jheads[i].grouped = 1; - c->jheads[i].log_hash = ubifs_hash_get_desc(c); -- if (IS_ERR(c->jheads[i].log_hash)) -+ if (IS_ERR(c->jheads[i].log_hash)) { -+ err = PTR_ERR(c->jheads[i].log_hash); - goto out; -+ } - } - - /* -diff --git a/fs/zonefs/super.c b/fs/zonefs/super.c -index bec47f2d074be..3fe933b1010c3 100644 ---- a/fs/zonefs/super.c -+++ b/fs/zonefs/super.c -@@ -250,6 +250,9 @@ static loff_t zonefs_check_zone_condition(struct inode *inode, - } - inode->i_mode &= ~0222; - return i_size_read(inode); -+ case BLK_ZONE_COND_FULL: -+ /* The write pointer of full zones is invalid. */ -+ return zi->i_max_size; - default: - if (zi->i_ztype == ZONEFS_ZTYPE_CNV) - return zi->i_max_size; -diff --git a/include/acpi/acexcep.h b/include/acpi/acexcep.h -index 2fc624a617690..f8a4afb0279a3 100644 ---- a/include/acpi/acexcep.h -+++ b/include/acpi/acexcep.h -@@ -59,11 +59,11 @@ struct acpi_exception_info { - - #define AE_OK (acpi_status) 0x0000 - --#define ACPI_ENV_EXCEPTION(status) (status & AE_CODE_ENVIRONMENTAL) --#define ACPI_AML_EXCEPTION(status) (status & AE_CODE_AML) --#define ACPI_PROG_EXCEPTION(status) (status & AE_CODE_PROGRAMMER) --#define ACPI_TABLE_EXCEPTION(status) (status & AE_CODE_ACPI_TABLES) --#define ACPI_CNTL_EXCEPTION(status) (status & AE_CODE_CONTROL) -+#define ACPI_ENV_EXCEPTION(status) (((status) & AE_CODE_MASK) == AE_CODE_ENVIRONMENTAL) -+#define ACPI_AML_EXCEPTION(status) (((status) & AE_CODE_MASK) == AE_CODE_AML) -+#define ACPI_PROG_EXCEPTION(status) (((status) & AE_CODE_MASK) == AE_CODE_PROGRAMMER) -+#define ACPI_TABLE_EXCEPTION(status) (((status) & AE_CODE_MASK) == AE_CODE_ACPI_TABLES) -+#define ACPI_CNTL_EXCEPTION(status) (((status) & AE_CODE_MASK) == AE_CODE_CONTROL) - - /* - * Environmental exceptions -diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h -index b97c628ad91ff..34d8287cd7749 100644 ---- a/include/asm-generic/vmlinux.lds.h -+++ b/include/asm-generic/vmlinux.lds.h -@@ -828,8 +828,13 @@ - /* DWARF 4 */ \ - .debug_types 0 : { *(.debug_types) } \ - /* DWARF 5 */ \ -+ .debug_addr 0 : { *(.debug_addr) } \ -+ .debug_line_str 0 : { *(.debug_line_str) } \ -+ .debug_loclists 0 : { *(.debug_loclists) } \ - .debug_macro 0 : { *(.debug_macro) } \ -- .debug_addr 0 : { *(.debug_addr) } -+ .debug_names 0 : { *(.debug_names) } \ -+ .debug_rnglists 0 : { *(.debug_rnglists) } \ -+ .debug_str_offsets 0 : { *(.debug_str_offsets) } - - /* Stabs debugging sections. */ - #define STABS_DEBUG \ -@@ -988,12 +993,13 @@ - #endif - - /* -- * Clang's -fsanitize=kernel-address and -fsanitize=thread produce -- * unwanted sections (.eh_frame and .init_array.*), but -- * CONFIG_CONSTRUCTORS wants to keep any .init_array.* sections. -+ * Clang's -fprofile-arcs, -fsanitize=kernel-address, and -+ * -fsanitize=thread produce unwanted sections (.eh_frame -+ * and .init_array.*), but CONFIG_CONSTRUCTORS wants to -+ * keep any .init_array.* sections. - * https://bugs.llvm.org/show_bug.cgi?id=46478 - */ --#if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KCSAN) -+#if defined(CONFIG_GCOV_KERNEL) || defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KCSAN) - # ifdef CONFIG_CONSTRUCTORS - # define SANITIZER_DISCARDS \ - *(.eh_frame) -diff --git a/include/linux/bpf.h b/include/linux/bpf.h -index 07cb5d15e7439..6e585dbc10df3 100644 ---- a/include/linux/bpf.h -+++ b/include/linux/bpf.h -@@ -1206,8 +1206,6 @@ void bpf_prog_sub(struct bpf_prog *prog, int i); - void bpf_prog_inc(struct bpf_prog *prog); - struct bpf_prog * __must_check bpf_prog_inc_not_zero(struct bpf_prog *prog); - void bpf_prog_put(struct bpf_prog *prog); --void __bpf_free_used_maps(struct bpf_prog_aux *aux, -- struct bpf_map **used_maps, u32 len); - - void bpf_prog_free_id(struct bpf_prog *prog, bool do_idr_lock); - void bpf_map_free_id(struct bpf_map *map, bool do_idr_lock); -@@ -1403,7 +1401,10 @@ static inline void bpf_long_memcpy(void *dst, const void *src, u32 size) - /* verify correctness of eBPF program */ - int bpf_check(struct bpf_prog **fp, union bpf_attr *attr, - union bpf_attr __user *uattr); -+ -+#ifndef CONFIG_BPF_JIT_ALWAYS_ON - void bpf_patch_call_args(struct bpf_insn *insn, u32 stack_depth); -+#endif - - struct btf *bpf_get_btf_vmlinux(void); - -@@ -1673,6 +1674,9 @@ static inline struct bpf_prog *bpf_prog_get_type(u32 ufd, - return bpf_prog_get_type_dev(ufd, type, false); - } - -+void __bpf_free_used_maps(struct bpf_prog_aux *aux, -+ struct bpf_map **used_maps, u32 len); -+ - bool bpf_prog_get_ok(struct bpf_prog *, enum bpf_prog_type *, bool); - - int bpf_prog_offload_compile(struct bpf_prog *prog); -diff --git a/include/linux/device-mapper.h b/include/linux/device-mapper.h -index 61a66fb8ebb34..d2d7f9b6a2761 100644 ---- a/include/linux/device-mapper.h -+++ b/include/linux/device-mapper.h -@@ -325,6 +325,11 @@ struct dm_target { - * whether or not its underlying devices have support. - */ - bool discards_supported:1; -+ -+ /* -+ * Set if we need to limit the number of in-flight bios when swapping. -+ */ -+ bool limit_swap_bios:1; - }; - - void *dm_per_bio_data(struct bio *bio, size_t data_size); -diff --git a/include/linux/entry-kvm.h b/include/linux/entry-kvm.h -index 9b93f8584ff7d..8b2b1d68b9545 100644 ---- a/include/linux/entry-kvm.h -+++ b/include/linux/entry-kvm.h -@@ -46,6 +46,20 @@ static inline int arch_xfer_to_guest_mode_handle_work(struct kvm_vcpu *vcpu, - */ - int xfer_to_guest_mode_handle_work(struct kvm_vcpu *vcpu); - -+/** -+ * xfer_to_guest_mode_prepare - Perform last minute preparation work that -+ * need to be handled while IRQs are disabled -+ * upon entering to guest. -+ * -+ * Has to be invoked with interrupts disabled before the last call -+ * to xfer_to_guest_mode_work_pending(). -+ */ -+static inline void xfer_to_guest_mode_prepare(void) -+{ -+ lockdep_assert_irqs_disabled(); -+ rcu_nocb_flush_deferred_wakeup(); -+} -+ - /** - * __xfer_to_guest_mode_work_pending - Check if work is pending - * -diff --git a/include/linux/eventpoll.h b/include/linux/eventpoll.h -index 0350393465d42..593322c946e63 100644 ---- a/include/linux/eventpoll.h -+++ b/include/linux/eventpoll.h -@@ -18,7 +18,7 @@ struct file; - - #ifdef CONFIG_EPOLL - --#ifdef CONFIG_CHECKPOINT_RESTORE -+#ifdef CONFIG_KCMP - struct file *get_epoll_tfile_raw_ptr(struct file *file, int tfd, unsigned long toff); - #endif - -diff --git a/include/linux/filter.h b/include/linux/filter.h -index 29c27656165b2..5edf2b6608812 100644 ---- a/include/linux/filter.h -+++ b/include/linux/filter.h -@@ -886,7 +886,7 @@ void sk_filter_uncharge(struct sock *sk, struct sk_filter *fp); - u64 __bpf_call_base(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5); - #define __bpf_call_base_args \ - ((u64 (*)(u64, u64, u64, u64, u64, const struct bpf_insn *)) \ -- __bpf_call_base) -+ (void *)__bpf_call_base) - - struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog); - void bpf_jit_compile(struct bpf_prog *prog); -diff --git a/include/linux/icmpv6.h b/include/linux/icmpv6.h -index 1b3371ae81936..9055cb380ee24 100644 ---- a/include/linux/icmpv6.h -+++ b/include/linux/icmpv6.h -@@ -3,6 +3,7 @@ - #define _LINUX_ICMPV6_H - - #include -+#include - #include - - static inline struct icmp6hdr *icmp6_hdr(const struct sk_buff *skb) -@@ -15,13 +16,16 @@ static inline struct icmp6hdr *icmp6_hdr(const struct sk_buff *skb) - #if IS_ENABLED(CONFIG_IPV6) - - typedef void ip6_icmp_send_t(struct sk_buff *skb, u8 type, u8 code, __u32 info, -- const struct in6_addr *force_saddr); --#if IS_BUILTIN(CONFIG_IPV6) -+ const struct in6_addr *force_saddr, -+ const struct inet6_skb_parm *parm); - void icmp6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info, -- const struct in6_addr *force_saddr); --static inline void icmpv6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info) -+ const struct in6_addr *force_saddr, -+ const struct inet6_skb_parm *parm); -+#if IS_BUILTIN(CONFIG_IPV6) -+static inline void __icmpv6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info, -+ const struct inet6_skb_parm *parm) - { -- icmp6_send(skb, type, code, info, NULL); -+ icmp6_send(skb, type, code, info, NULL, parm); - } - static inline int inet6_register_icmp_sender(ip6_icmp_send_t *fn) - { -@@ -34,18 +38,28 @@ static inline int inet6_unregister_icmp_sender(ip6_icmp_send_t *fn) - return 0; - } - #else --extern void icmpv6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info); -+extern void __icmpv6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info, -+ const struct inet6_skb_parm *parm); - extern int inet6_register_icmp_sender(ip6_icmp_send_t *fn); - extern int inet6_unregister_icmp_sender(ip6_icmp_send_t *fn); - #endif - -+static inline void icmpv6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info) -+{ -+ __icmpv6_send(skb, type, code, info, IP6CB(skb)); -+} -+ - int ip6_err_gen_icmpv6_unreach(struct sk_buff *skb, int nhs, int type, - unsigned int data_len); - - #if IS_ENABLED(CONFIG_NF_NAT) - void icmpv6_ndo_send(struct sk_buff *skb_in, u8 type, u8 code, __u32 info); - #else --#define icmpv6_ndo_send icmpv6_send -+static inline void icmpv6_ndo_send(struct sk_buff *skb_in, u8 type, u8 code, __u32 info) -+{ -+ struct inet6_skb_parm parm = { 0 }; -+ __icmpv6_send(skb_in, type, code, info, &parm); -+} - #endif - - #else -diff --git a/include/linux/iommu.h b/include/linux/iommu.h -index efa96263b81b3..d63d3e9cc7b67 100644 ---- a/include/linux/iommu.h -+++ b/include/linux/iommu.h -@@ -170,7 +170,7 @@ enum iommu_dev_features { - * struct iommu_iotlb_gather - Range information for a pending IOTLB flush - * - * @start: IOVA representing the start of the range to be flushed -- * @end: IOVA representing the end of the range to be flushed (exclusive) -+ * @end: IOVA representing the end of the range to be flushed (inclusive) - * @pgsize: The interval at which to perform the flush - * - * This structure is intended to be updated by multiple calls to the -@@ -538,7 +538,7 @@ static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain, - struct iommu_iotlb_gather *gather, - unsigned long iova, size_t size) - { -- unsigned long start = iova, end = start + size; -+ unsigned long start = iova, end = start + size - 1; - - /* - * If the new page is disjoint from the current range or is mapped at -diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h -index dda61d150a138..f514a7dd8c9cf 100644 ---- a/include/linux/ipv6.h -+++ b/include/linux/ipv6.h -@@ -84,7 +84,6 @@ struct ipv6_params { - __s32 autoconf; - }; - extern struct ipv6_params ipv6_defaults; --#include - #include - #include - -diff --git a/include/linux/kexec.h b/include/linux/kexec.h -index 9e93bef529680..5f61389f5f361 100644 ---- a/include/linux/kexec.h -+++ b/include/linux/kexec.h -@@ -300,6 +300,11 @@ struct kimage { - /* Information for loading purgatory */ - struct purgatory_info purgatory_info; - #endif -+ -+#ifdef CONFIG_IMA_KEXEC -+ /* Virtual address of IMA measurement buffer for kexec syscall */ -+ void *ima_buffer; -+#endif - }; - - /* kexec interface functions */ -diff --git a/include/linux/key.h b/include/linux/key.h -index 0f2e24f13c2bd..eed3ce139a32e 100644 ---- a/include/linux/key.h -+++ b/include/linux/key.h -@@ -289,6 +289,7 @@ extern struct key *key_alloc(struct key_type *type, - #define KEY_ALLOC_BUILT_IN 0x0004 /* Key is built into kernel */ - #define KEY_ALLOC_BYPASS_RESTRICTION 0x0008 /* Override the check on restricted keyrings */ - #define KEY_ALLOC_UID_KEYRING 0x0010 /* allocating a user or user session keyring */ -+#define KEY_ALLOC_SET_KEEP 0x0020 /* Set the KEEP flag on the key/keyring */ - - extern void key_revoke(struct key *key); - extern void key_invalidate(struct key *key); -diff --git a/include/linux/kgdb.h b/include/linux/kgdb.h -index 0d6cf64c8bb12..3c755f6eaefd8 100644 ---- a/include/linux/kgdb.h -+++ b/include/linux/kgdb.h -@@ -360,9 +360,11 @@ extern atomic_t kgdb_active; - extern bool dbg_is_early; - extern void __init dbg_late_init(void); - extern void kgdb_panic(const char *msg); -+extern void kgdb_free_init_mem(void); - #else /* ! CONFIG_KGDB */ - #define in_dbg_master() (0) - #define dbg_late_init() - static inline void kgdb_panic(const char *msg) {} -+static inline void kgdb_free_init_mem(void) { } - #endif /* ! CONFIG_KGDB */ - #endif /* _KGDB_H_ */ -diff --git a/include/linux/khugepaged.h b/include/linux/khugepaged.h -index c941b73773216..2fcc01891b474 100644 ---- a/include/linux/khugepaged.h -+++ b/include/linux/khugepaged.h -@@ -3,6 +3,7 @@ - #define _LINUX_KHUGEPAGED_H - - #include /* MMF_VM_HUGEPAGE */ -+#include - - - #ifdef CONFIG_TRANSPARENT_HUGEPAGE -@@ -57,6 +58,7 @@ static inline int khugepaged_enter(struct vm_area_struct *vma, - { - if (!test_bit(MMF_VM_HUGEPAGE, &vma->vm_mm->flags)) - if ((khugepaged_always() || -+ (shmem_file(vma->vm_file) && shmem_huge_enabled(vma)) || - (khugepaged_req_madv() && (vm_flags & VM_HUGEPAGE))) && - !(vm_flags & VM_NOHUGEPAGE) && - !test_bit(MMF_DISABLE_THP, &vma->vm_mm->flags)) -diff --git a/include/linux/memremap.h b/include/linux/memremap.h -index 79c49e7f5c304..f5b464daeeca5 100644 ---- a/include/linux/memremap.h -+++ b/include/linux/memremap.h -@@ -137,6 +137,7 @@ void *devm_memremap_pages(struct device *dev, struct dev_pagemap *pgmap); - void devm_memunmap_pages(struct device *dev, struct dev_pagemap *pgmap); - struct dev_pagemap *get_dev_pagemap(unsigned long pfn, - struct dev_pagemap *pgmap); -+bool pgmap_pfn_valid(struct dev_pagemap *pgmap, unsigned long pfn); - - unsigned long vmem_altmap_offset(struct vmem_altmap *altmap); - void vmem_altmap_free(struct vmem_altmap *altmap, unsigned long nr_pfns); -@@ -165,6 +166,11 @@ static inline struct dev_pagemap *get_dev_pagemap(unsigned long pfn, - return NULL; - } - -+static inline bool pgmap_pfn_valid(struct dev_pagemap *pgmap, unsigned long pfn) -+{ -+ return false; -+} -+ - static inline unsigned long vmem_altmap_offset(struct vmem_altmap *altmap) - { - return 0; -diff --git a/include/linux/mfd/rohm-generic.h b/include/linux/mfd/rohm-generic.h -index 4283b5b33e040..2b85b9deb03ae 100644 ---- a/include/linux/mfd/rohm-generic.h -+++ b/include/linux/mfd/rohm-generic.h -@@ -20,14 +20,12 @@ struct rohm_regmap_dev { - struct regmap *regmap; - }; - --enum { -- ROHM_DVS_LEVEL_UNKNOWN, -- ROHM_DVS_LEVEL_RUN, -- ROHM_DVS_LEVEL_IDLE, -- ROHM_DVS_LEVEL_SUSPEND, -- ROHM_DVS_LEVEL_LPSR, -- ROHM_DVS_LEVEL_MAX = ROHM_DVS_LEVEL_LPSR, --}; -+#define ROHM_DVS_LEVEL_RUN BIT(0) -+#define ROHM_DVS_LEVEL_IDLE BIT(1) -+#define ROHM_DVS_LEVEL_SUSPEND BIT(2) -+#define ROHM_DVS_LEVEL_LPSR BIT(3) -+#define ROHM_DVS_LEVEL_VALID_AMOUNT 4 -+#define ROHM_DVS_LEVEL_UNKNOWN 0 - - /** - * struct rohm_dvs_config - dynamic voltage scaling register descriptions -diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h -index fd02c5fa60cb1..36c2119de7022 100644 ---- a/include/linux/rcupdate.h -+++ b/include/linux/rcupdate.h -@@ -110,8 +110,10 @@ static inline void rcu_user_exit(void) { } - - #ifdef CONFIG_RCU_NOCB_CPU - void rcu_init_nohz(void); -+void rcu_nocb_flush_deferred_wakeup(void); - #else /* #ifdef CONFIG_RCU_NOCB_CPU */ - static inline void rcu_init_nohz(void) { } -+static inline void rcu_nocb_flush_deferred_wakeup(void) { } - #endif /* #else #ifdef CONFIG_RCU_NOCB_CPU */ - - /** -diff --git a/include/linux/rmap.h b/include/linux/rmap.h -index 70085ca1a3fc9..def5c62c93b3b 100644 ---- a/include/linux/rmap.h -+++ b/include/linux/rmap.h -@@ -213,7 +213,8 @@ struct page_vma_mapped_walk { - - static inline void page_vma_mapped_walk_done(struct page_vma_mapped_walk *pvmw) - { -- if (pvmw->pte) -+ /* HugeTLB pte is set to the relevant page table entry without pte_mapped. */ -+ if (pvmw->pte && !PageHuge(pvmw->page)) - pte_unmap(pvmw->pte); - if (pvmw->ptl) - spin_unlock(pvmw->ptl); -diff --git a/include/linux/soundwire/sdw.h b/include/linux/soundwire/sdw.h -index f0b01b728640d..d08039d65825e 100644 ---- a/include/linux/soundwire/sdw.h -+++ b/include/linux/soundwire/sdw.h -@@ -1005,6 +1005,8 @@ int sdw_bus_exit_clk_stop(struct sdw_bus *bus); - - int sdw_read(struct sdw_slave *slave, u32 addr); - int sdw_write(struct sdw_slave *slave, u32 addr, u8 value); -+int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value); -+int sdw_read_no_pm(struct sdw_slave *slave, u32 addr); - int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val); - int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val); - -diff --git a/include/linux/tpm.h b/include/linux/tpm.h -index 8f4ff39f51e7d..804a3f69bbd93 100644 ---- a/include/linux/tpm.h -+++ b/include/linux/tpm.h -@@ -397,6 +397,10 @@ static inline u32 tpm2_rc_value(u32 rc) - #if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE) - - extern int tpm_is_tpm2(struct tpm_chip *chip); -+extern __must_check int tpm_try_get_ops(struct tpm_chip *chip); -+extern void tpm_put_ops(struct tpm_chip *chip); -+extern ssize_t tpm_transmit_cmd(struct tpm_chip *chip, struct tpm_buf *buf, -+ size_t min_rsp_body_length, const char *desc); - extern int tpm_pcr_read(struct tpm_chip *chip, u32 pcr_idx, - struct tpm_digest *digest); - extern int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx, -@@ -410,7 +414,6 @@ static inline int tpm_is_tpm2(struct tpm_chip *chip) - { - return -ENODEV; - } -- - static inline int tpm_pcr_read(struct tpm_chip *chip, int pcr_idx, - struct tpm_digest *digest) - { -diff --git a/include/linux/tty_ldisc.h b/include/linux/tty_ldisc.h -index b1e6043e99175..572a079761165 100644 ---- a/include/linux/tty_ldisc.h -+++ b/include/linux/tty_ldisc.h -@@ -185,7 +185,8 @@ struct tty_ldisc_ops { - void (*close)(struct tty_struct *); - void (*flush_buffer)(struct tty_struct *tty); - ssize_t (*read)(struct tty_struct *tty, struct file *file, -- unsigned char __user *buf, size_t nr); -+ unsigned char *buf, size_t nr, -+ void **cookie, unsigned long offset); - ssize_t (*write)(struct tty_struct *tty, struct file *file, - const unsigned char *buf, size_t nr); - int (*ioctl)(struct tty_struct *tty, struct file *file, -diff --git a/include/linux/zsmalloc.h b/include/linux/zsmalloc.h -index 4807ca4d52e03..2a430e713ce51 100644 ---- a/include/linux/zsmalloc.h -+++ b/include/linux/zsmalloc.h -@@ -35,7 +35,7 @@ enum zs_mapmode { - - struct zs_pool_stats { - /* How many pages were migrated (freed) */ -- unsigned long pages_compacted; -+ atomic_long_t pages_compacted; - }; - - struct zs_pool; -diff --git a/include/net/act_api.h b/include/net/act_api.h -index 55dab604861fe..2bf3092ae7ecc 100644 ---- a/include/net/act_api.h -+++ b/include/net/act_api.h -@@ -166,6 +166,7 @@ int tcf_idr_create_from_flags(struct tc_action_net *tn, u32 index, - struct nlattr *est, struct tc_action **a, - const struct tc_action_ops *ops, int bind, - u32 flags); -+void tcf_idr_insert_many(struct tc_action *actions[]); - void tcf_idr_cleanup(struct tc_action_net *tn, u32 index); - int tcf_idr_check_alloc(struct tc_action_net *tn, u32 *index, - struct tc_action **a, int bind); -@@ -186,10 +187,13 @@ int tcf_action_init(struct net *net, struct tcf_proto *tp, struct nlattr *nla, - struct nlattr *est, char *name, int ovr, int bind, - struct tc_action *actions[], size_t *attr_size, - bool rtnl_held, struct netlink_ext_ack *extack); -+struct tc_action_ops *tc_action_load_ops(char *name, struct nlattr *nla, -+ bool rtnl_held, -+ struct netlink_ext_ack *extack); - struct tc_action *tcf_action_init_1(struct net *net, struct tcf_proto *tp, - struct nlattr *nla, struct nlattr *est, - char *name, int ovr, int bind, -- bool rtnl_held, -+ struct tc_action_ops *ops, bool rtnl_held, - struct netlink_ext_ack *extack); - int tcf_action_dump(struct sk_buff *skb, struct tc_action *actions[], int bind, - int ref, bool terse); -diff --git a/include/net/icmp.h b/include/net/icmp.h -index 9ac2d2672a938..fd84adc479633 100644 ---- a/include/net/icmp.h -+++ b/include/net/icmp.h -@@ -46,7 +46,11 @@ static inline void icmp_send(struct sk_buff *skb_in, int type, int code, __be32 - #if IS_ENABLED(CONFIG_NF_NAT) - void icmp_ndo_send(struct sk_buff *skb_in, int type, int code, __be32 info); - #else --#define icmp_ndo_send icmp_send -+static inline void icmp_ndo_send(struct sk_buff *skb_in, int type, int code, __be32 info) -+{ -+ struct ip_options opts = { 0 }; -+ __icmp_send(skb_in, type, code, info, &opts); -+} - #endif - - int icmp_rcv(struct sk_buff *skb); -diff --git a/include/net/tcp.h b/include/net/tcp.h -index 25bbada379c46..244208f6f6c2a 100644 ---- a/include/net/tcp.h -+++ b/include/net/tcp.h -@@ -1431,8 +1431,13 @@ void tcp_cleanup_rbuf(struct sock *sk, int copied); - */ - static inline bool tcp_rmem_pressure(const struct sock *sk) - { -- int rcvbuf = READ_ONCE(sk->sk_rcvbuf); -- int threshold = rcvbuf - (rcvbuf >> 3); -+ int rcvbuf, threshold; -+ -+ if (tcp_under_memory_pressure(sk)) -+ return true; -+ -+ rcvbuf = READ_ONCE(sk->sk_rcvbuf); -+ threshold = rcvbuf - (rcvbuf >> 3); - - return atomic_read(&sk->sk_rmem_alloc) > threshold; - } -diff --git a/include/scsi/libsas.h b/include/scsi/libsas.h -index 4e2d61e8fb1ed..e6a43163ab5b7 100644 ---- a/include/scsi/libsas.h -+++ b/include/scsi/libsas.h -@@ -391,10 +391,6 @@ struct sas_ha_struct { - int strict_wide_ports; /* both sas_addr and attached_sas_addr must match - * their siblings when forming wide ports */ - -- /* LLDD calls these to notify the class of an event. */ -- int (*notify_port_event)(struct asd_sas_phy *, enum port_event); -- int (*notify_phy_event)(struct asd_sas_phy *, enum phy_event); -- - void *lldd_ha; /* not touched by sas class code */ - - struct list_head eh_done_q; /* complete via scsi_eh_flush_done_q */ -@@ -706,4 +702,11 @@ struct sas_phy *sas_get_local_phy(struct domain_device *dev); - - int sas_request_addr(struct Scsi_Host *shost, u8 *addr); - -+int sas_notify_port_event(struct asd_sas_phy *phy, enum port_event event); -+int sas_notify_phy_event(struct asd_sas_phy *phy, enum phy_event event); -+int sas_notify_port_event_gfp(struct asd_sas_phy *phy, enum port_event event, -+ gfp_t gfp_flags); -+int sas_notify_phy_event_gfp(struct asd_sas_phy *phy, enum phy_event event, -+ gfp_t gfp_flags); -+ - #endif /* _SASLIB_H_ */ -diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h -index 723c8e23ca87d..5f42a14481bd4 100644 ---- a/include/uapi/drm/drm_fourcc.h -+++ b/include/uapi/drm/drm_fourcc.h -@@ -1036,9 +1036,9 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) - * Not all combinations are valid, and different SoCs may support different - * combinations of layout and options. - */ --#define __fourcc_mod_amlogic_layout_mask 0xf -+#define __fourcc_mod_amlogic_layout_mask 0xff - #define __fourcc_mod_amlogic_options_shift 8 --#define __fourcc_mod_amlogic_options_mask 0xf -+#define __fourcc_mod_amlogic_options_mask 0xff - - #define DRM_FORMAT_MOD_AMLOGIC_FBC(__layout, __options) \ - fourcc_mod_code(AMLOGIC, \ -diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h -index b49fbf2bdc408..1c064627e6c33 100644 ---- a/include/uapi/drm/drm_mode.h -+++ b/include/uapi/drm/drm_mode.h -@@ -414,15 +414,12 @@ enum drm_mode_subconnector { - * - * If the @count_modes field is set to zero, the kernel will perform a forced - * probe on the connector to refresh the connector status, modes and EDID. -- * A forced-probe can be slow and the ioctl will block. A force-probe can cause -- * flickering and temporary freezes, so it should not be performed -- * automatically. -+ * A forced-probe can be slow, might cause flickering and the ioctl will block. - * -- * User-space shouldn't need to force-probe connectors in general: the kernel -- * will automatically take care of probing connectors that don't support -- * hot-plug detection when appropriate. However, user-space may force-probe -- * connectors on user request (e.g. clicking a "Scan connectors" button, or -- * opening a UI to manage screens). -+ * User-space needs to force-probe connectors to ensure their metadata is -+ * up-to-date at startup and after receiving a hot-plug event. User-space -+ * may perform a forced-probe when the user explicitly requests it. User-space -+ * shouldn't perform a forced-probe in other situations. - */ - struct drm_mode_get_connector { - /** @encoders_ptr: Pointer to ``__u32`` array of object IDs. */ -diff --git a/init/Kconfig b/init/Kconfig -index 29ad683250288..b7d3c6a12196f 100644 ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -1193,6 +1193,7 @@ endif # NAMESPACES - config CHECKPOINT_RESTORE - bool "Checkpoint/restore support" - select PROC_CHILDREN -+ select KCMP - default n - help - Enables additional kernel features in a sake of checkpoint/restore. -@@ -1736,6 +1737,16 @@ config ARCH_HAS_MEMBARRIER_CALLBACKS - config ARCH_HAS_MEMBARRIER_SYNC_CORE - bool - -+config KCMP -+ bool "Enable kcmp() system call" if EXPERT -+ help -+ Enable the kernel resource comparison system call. It provides -+ user-space with the ability to compare two processes to see if they -+ share a common resource, such as a file descriptor or even virtual -+ memory space. -+ -+ If unsure, say N. -+ - config RSEQ - bool "Enable rseq() system call" if EXPERT - default y -diff --git a/init/main.c b/init/main.c -index a626e78dbf061..aeef291bf28df 100644 ---- a/init/main.c -+++ b/init/main.c -@@ -1423,6 +1423,7 @@ static int __ref kernel_init(void *unused) - async_synchronize_full(); - kprobe_free_init_mem(); - ftrace_free_init_mem(); -+ kgdb_free_init_mem(); - free_initmem(); - mark_readonly(); - -diff --git a/kernel/Makefile b/kernel/Makefile -index aa7368c7eabf3..320f1f3941b79 100644 ---- a/kernel/Makefile -+++ b/kernel/Makefile -@@ -51,7 +51,7 @@ obj-y += livepatch/ - obj-y += dma/ - obj-y += entry/ - --obj-$(CONFIG_CHECKPOINT_RESTORE) += kcmp.o -+obj-$(CONFIG_KCMP) += kcmp.o - obj-$(CONFIG_FREEZER) += freezer.o - obj-$(CONFIG_PROFILING) += profile.o - obj-$(CONFIG_STACKTRACE) += stacktrace.o -diff --git a/kernel/bpf/bpf_iter.c b/kernel/bpf/bpf_iter.c -index 5454161407f1f..a0d9eade9c804 100644 ---- a/kernel/bpf/bpf_iter.c -+++ b/kernel/bpf/bpf_iter.c -@@ -287,7 +287,7 @@ int bpf_iter_reg_target(const struct bpf_iter_reg *reg_info) - { - struct bpf_iter_target_info *tinfo; - -- tinfo = kmalloc(sizeof(*tinfo), GFP_KERNEL); -+ tinfo = kzalloc(sizeof(*tinfo), GFP_KERNEL); - if (!tinfo) - return -ENOMEM; - -diff --git a/kernel/bpf/bpf_lru_list.c b/kernel/bpf/bpf_lru_list.c -index 1b6b9349cb857..d99e89f113c43 100644 ---- a/kernel/bpf/bpf_lru_list.c -+++ b/kernel/bpf/bpf_lru_list.c -@@ -502,13 +502,14 @@ struct bpf_lru_node *bpf_lru_pop_free(struct bpf_lru *lru, u32 hash) - static void bpf_common_lru_push_free(struct bpf_lru *lru, - struct bpf_lru_node *node) - { -+ u8 node_type = READ_ONCE(node->type); - unsigned long flags; - -- if (WARN_ON_ONCE(node->type == BPF_LRU_LIST_T_FREE) || -- WARN_ON_ONCE(node->type == BPF_LRU_LOCAL_LIST_T_FREE)) -+ if (WARN_ON_ONCE(node_type == BPF_LRU_LIST_T_FREE) || -+ WARN_ON_ONCE(node_type == BPF_LRU_LOCAL_LIST_T_FREE)) - return; - -- if (node->type == BPF_LRU_LOCAL_LIST_T_PENDING) { -+ if (node_type == BPF_LRU_LOCAL_LIST_T_PENDING) { - struct bpf_lru_locallist *loc_l; - - loc_l = per_cpu_ptr(lru->common_lru.local_list, node->cpu); -diff --git a/kernel/bpf/devmap.c b/kernel/bpf/devmap.c -index f6e9c68afdd42..85d9d1b72a33a 100644 ---- a/kernel/bpf/devmap.c -+++ b/kernel/bpf/devmap.c -@@ -802,9 +802,7 @@ static int dev_map_notification(struct notifier_block *notifier, - break; - - /* will be freed in free_netdev() */ -- netdev->xdp_bulkq = -- __alloc_percpu_gfp(sizeof(struct xdp_dev_bulk_queue), -- sizeof(void *), GFP_ATOMIC); -+ netdev->xdp_bulkq = alloc_percpu(struct xdp_dev_bulk_queue); - if (!netdev->xdp_bulkq) - return NOTIFY_BAD; - -diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c -index 20babdd06278f..33683eafea90e 100644 ---- a/kernel/bpf/verifier.c -+++ b/kernel/bpf/verifier.c -@@ -4834,8 +4834,9 @@ static int check_func_call(struct bpf_verifier_env *env, struct bpf_insn *insn, - subprog); - clear_caller_saved_regs(env, caller->regs); - -- /* All global functions return SCALAR_VALUE */ -+ /* All global functions return a 64-bit SCALAR_VALUE */ - mark_reg_unknown(env, caller->regs, BPF_REG_0); -+ caller->regs[BPF_REG_0].subreg_def = DEF_NOT_SUBREG; - - /* continue with next insn after call */ - return 0; -diff --git a/kernel/debug/debug_core.c b/kernel/debug/debug_core.c -index af6e8b4fb3599..c0bb31e683e99 100644 ---- a/kernel/debug/debug_core.c -+++ b/kernel/debug/debug_core.c -@@ -456,6 +456,17 @@ setundefined: - return 0; - } - -+void kgdb_free_init_mem(void) -+{ -+ int i; -+ -+ /* Clear init memory breakpoints. */ -+ for (i = 0; i < KGDB_MAX_BREAKPOINTS; i++) { -+ if (init_section_contains((void *)kgdb_break[i].bpt_addr, 0)) -+ kgdb_break[i].state = BP_UNDEFINED; -+ } -+} -+ - #ifdef CONFIG_KGDB_KDB - void kdb_dump_stack_on_cpu(int cpu) - { -diff --git a/kernel/debug/kdb/kdb_private.h b/kernel/debug/kdb/kdb_private.h -index a4281fb99299e..81874213b0fe9 100644 ---- a/kernel/debug/kdb/kdb_private.h -+++ b/kernel/debug/kdb/kdb_private.h -@@ -230,7 +230,7 @@ extern struct task_struct *kdb_curr_task(int); - - #define kdb_task_has_cpu(p) (task_curr(p)) - --#define GFP_KDB (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL) -+#define GFP_KDB (in_dbg_master() ? GFP_ATOMIC : GFP_KERNEL) - - extern void *debug_kmalloc(size_t size, gfp_t flags); - extern void debug_kfree(void *); -diff --git a/kernel/entry/common.c b/kernel/entry/common.c -index f9d491b17b78b..1ef9b15ceec9b 100644 ---- a/kernel/entry/common.c -+++ b/kernel/entry/common.c -@@ -184,6 +184,10 @@ static unsigned long exit_to_user_mode_loop(struct pt_regs *regs, - * enabled above. - */ - local_irq_disable_exit_to_user(); -+ -+ /* Check if any of the above work has queued a deferred wakeup */ -+ rcu_nocb_flush_deferred_wakeup(); -+ - ti_work = READ_ONCE(current_thread_info()->flags); - } - -@@ -197,6 +201,9 @@ static void exit_to_user_mode_prepare(struct pt_regs *regs) - - lockdep_assert_irqs_disabled(); - -+ /* Flush pending rcuog wakeup before the last need_resched() check */ -+ rcu_nocb_flush_deferred_wakeup(); -+ - if (unlikely(ti_work & EXIT_TO_USER_MODE_WORK)) - ti_work = exit_to_user_mode_loop(regs, ti_work); - -diff --git a/kernel/kcsan/core.c b/kernel/kcsan/core.c -index 3994a217bde76..3bf98db9c702d 100644 ---- a/kernel/kcsan/core.c -+++ b/kernel/kcsan/core.c -@@ -12,7 +12,6 @@ - #include - #include - #include --#include - #include - #include - -@@ -101,7 +100,7 @@ static atomic_long_t watchpoints[CONFIG_KCSAN_NUM_WATCHPOINTS + NUM_SLOTS-1]; - static DEFINE_PER_CPU(long, kcsan_skip); - - /* For kcsan_prandom_u32_max(). */ --static DEFINE_PER_CPU(struct rnd_state, kcsan_rand_state); -+static DEFINE_PER_CPU(u32, kcsan_rand_state); - - static __always_inline atomic_long_t *find_watchpoint(unsigned long addr, - size_t size, -@@ -275,20 +274,17 @@ should_watch(const volatile void *ptr, size_t size, int type, struct kcsan_ctx * - } - - /* -- * Returns a pseudo-random number in interval [0, ep_ro). See prandom_u32_max() -- * for more details. -- * -- * The open-coded version here is using only safe primitives for all contexts -- * where we can have KCSAN instrumentation. In particular, we cannot use -- * prandom_u32() directly, as its tracepoint could cause recursion. -+ * Returns a pseudo-random number in interval [0, ep_ro). Simple linear -+ * congruential generator, using constants from "Numerical Recipes". - */ - static u32 kcsan_prandom_u32_max(u32 ep_ro) - { -- struct rnd_state *state = &get_cpu_var(kcsan_rand_state); -- const u32 res = prandom_u32_state(state); -+ u32 state = this_cpu_read(kcsan_rand_state); -+ -+ state = 1664525 * state + 1013904223; -+ this_cpu_write(kcsan_rand_state, state); - -- put_cpu_var(kcsan_rand_state); -- return (u32)(((u64) res * ep_ro) >> 32); -+ return state % ep_ro; - } - - static inline void reset_kcsan_skip(void) -@@ -639,10 +635,14 @@ static __always_inline void check_access(const volatile void *ptr, size_t size, - - void __init kcsan_init(void) - { -+ int cpu; -+ - BUG_ON(!in_task()); - - kcsan_debugfs_init(); -- prandom_seed_full_state(&kcsan_rand_state); -+ -+ for_each_possible_cpu(cpu) -+ per_cpu(kcsan_rand_state, cpu) = (u32)get_cycles(); - - /* - * We are in the init task, and no other tasks should be running; -diff --git a/kernel/kexec_file.c b/kernel/kexec_file.c -index b02086d704923..5c3447cf7ad58 100644 ---- a/kernel/kexec_file.c -+++ b/kernel/kexec_file.c -@@ -166,6 +166,11 @@ void kimage_file_post_load_cleanup(struct kimage *image) - vfree(pi->sechdrs); - pi->sechdrs = NULL; - -+#ifdef CONFIG_IMA_KEXEC -+ vfree(image->ima_buffer); -+ image->ima_buffer = NULL; -+#endif /* CONFIG_IMA_KEXEC */ -+ - /* See if architecture has anything to cleanup post load */ - arch_kimage_file_post_load_cleanup(image); - -diff --git a/kernel/kprobes.c b/kernel/kprobes.c -index d5a3eb74a6574..779d8322e307d 100644 ---- a/kernel/kprobes.c -+++ b/kernel/kprobes.c -@@ -861,7 +861,6 @@ out: - cpus_read_unlock(); - } - --#ifdef CONFIG_SYSCTL - static void optimize_all_kprobes(void) - { - struct hlist_head *head; -@@ -887,6 +886,7 @@ out: - mutex_unlock(&kprobe_mutex); - } - -+#ifdef CONFIG_SYSCTL - static void unoptimize_all_kprobes(void) - { - struct hlist_head *head; -@@ -2497,18 +2497,14 @@ static int __init init_kprobes(void) - } - } - --#if defined(CONFIG_OPTPROBES) --#if defined(__ARCH_WANT_KPROBES_INSN_SLOT) -- /* Init kprobe_optinsn_slots */ -- kprobe_optinsn_slots.insn_size = MAX_OPTINSN_SIZE; --#endif -- /* By default, kprobes can be optimized */ -- kprobes_allow_optimization = true; --#endif -- - /* By default, kprobes are armed */ - kprobes_all_disarmed = false; - -+#if defined(CONFIG_OPTPROBES) && defined(__ARCH_WANT_KPROBES_INSN_SLOT) -+ /* Init kprobe_optinsn_slots for allocation */ -+ kprobe_optinsn_slots.insn_size = MAX_OPTINSN_SIZE; -+#endif -+ - err = arch_init_kprobes(); - if (!err) - err = register_die_notifier(&kprobe_exceptions_nb); -@@ -2523,6 +2519,21 @@ static int __init init_kprobes(void) - } - early_initcall(init_kprobes); - -+#if defined(CONFIG_OPTPROBES) -+static int __init init_optprobes(void) -+{ -+ /* -+ * Enable kprobe optimization - this kicks the optimizer which -+ * depends on synchronize_rcu_tasks() and ksoftirqd, that is -+ * not spawned in early initcall. So delay the optimization. -+ */ -+ optimize_all_kprobes(); -+ -+ return 0; -+} -+subsys_initcall(init_optprobes); -+#endif -+ - #ifdef CONFIG_DEBUG_FS - static void report_probe(struct seq_file *pi, struct kprobe *p, - const char *sym, int offset, char *modname, struct kprobe *pp) -diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c -index bdaf4829098c0..780012eb2f3fe 100644 ---- a/kernel/locking/lockdep.c -+++ b/kernel/locking/lockdep.c -@@ -3707,7 +3707,7 @@ static void - print_usage_bug(struct task_struct *curr, struct held_lock *this, - enum lock_usage_bit prev_bit, enum lock_usage_bit new_bit) - { -- if (!debug_locks_off_graph_unlock() || debug_locks_silent) -+ if (!debug_locks_off() || debug_locks_silent) - return; - - pr_warn("\n"); -@@ -3748,6 +3748,7 @@ valid_state(struct task_struct *curr, struct held_lock *this, - enum lock_usage_bit new_bit, enum lock_usage_bit bad_bit) - { - if (unlikely(hlock_class(this)->usage_mask & (1 << bad_bit))) { -+ graph_unlock(); - print_usage_bug(curr, this, bad_bit, new_bit); - return 0; - } -diff --git a/kernel/module.c b/kernel/module.c -index 4bf30e4b3eaaa..1e5aad8123104 100644 ---- a/kernel/module.c -+++ b/kernel/module.c -@@ -2348,6 +2348,21 @@ static int verify_exported_symbols(struct module *mod) - return 0; - } - -+static bool ignore_undef_symbol(Elf_Half emachine, const char *name) -+{ -+ /* -+ * On x86, PIC code and Clang non-PIC code may have call foo@PLT. GNU as -+ * before 2.37 produces an unreferenced _GLOBAL_OFFSET_TABLE_ on x86-64. -+ * i386 has a similar problem but may not deserve a fix. -+ * -+ * If we ever have to ignore many symbols, consider refactoring the code to -+ * only warn if referenced by a relocation. -+ */ -+ if (emachine == EM_386 || emachine == EM_X86_64) -+ return !strcmp(name, "_GLOBAL_OFFSET_TABLE_"); -+ return false; -+} -+ - /* Change all symbols so that st_value encodes the pointer directly. */ - static int simplify_symbols(struct module *mod, const struct load_info *info) - { -@@ -2395,8 +2410,10 @@ static int simplify_symbols(struct module *mod, const struct load_info *info) - break; - } - -- /* Ok if weak. */ -- if (!ksym && ELF_ST_BIND(sym[i].st_info) == STB_WEAK) -+ /* Ok if weak or ignored. */ -+ if (!ksym && -+ (ELF_ST_BIND(sym[i].st_info) == STB_WEAK || -+ ignore_undef_symbol(info->hdr->e_machine, name))) - break; - - ret = PTR_ERR(ksym) ?: -ENOENT; -@@ -2964,7 +2981,7 @@ static int module_sig_check(struct load_info *info, int flags) - } - - if (is_module_sig_enforced()) { -- pr_notice("%s: loading of %s is rejected\n", info->name, reason); -+ pr_notice("Loading of %s is rejected\n", reason); - return -EKEYREJECTED; - } - -@@ -2977,9 +2994,33 @@ static int module_sig_check(struct load_info *info, int flags) - } - #endif /* !CONFIG_MODULE_SIG */ - --/* Sanity checks against invalid binaries, wrong arch, weird elf version. */ --static int elf_header_check(struct load_info *info) -+static int validate_section_offset(struct load_info *info, Elf_Shdr *shdr) -+{ -+ unsigned long secend; -+ -+ /* -+ * Check for both overflow and offset/size being -+ * too large. -+ */ -+ secend = shdr->sh_offset + shdr->sh_size; -+ if (secend < shdr->sh_offset || secend > info->len) -+ return -ENOEXEC; -+ -+ return 0; -+} -+ -+/* -+ * Sanity checks against invalid binaries, wrong arch, weird elf version. -+ * -+ * Also do basic validity checks against section offsets and sizes, the -+ * section name string table, and the indices used for it (sh_name). -+ */ -+static int elf_validity_check(struct load_info *info) - { -+ unsigned int i; -+ Elf_Shdr *shdr, *strhdr; -+ int err; -+ - if (info->len < sizeof(*(info->hdr))) - return -ENOEXEC; - -@@ -2989,11 +3030,78 @@ static int elf_header_check(struct load_info *info) - || info->hdr->e_shentsize != sizeof(Elf_Shdr)) - return -ENOEXEC; - -+ /* -+ * e_shnum is 16 bits, and sizeof(Elf_Shdr) is -+ * known and small. So e_shnum * sizeof(Elf_Shdr) -+ * will not overflow unsigned long on any platform. -+ */ - if (info->hdr->e_shoff >= info->len - || (info->hdr->e_shnum * sizeof(Elf_Shdr) > - info->len - info->hdr->e_shoff)) - return -ENOEXEC; - -+ info->sechdrs = (void *)info->hdr + info->hdr->e_shoff; -+ -+ /* -+ * Verify if the section name table index is valid. -+ */ -+ if (info->hdr->e_shstrndx == SHN_UNDEF -+ || info->hdr->e_shstrndx >= info->hdr->e_shnum) -+ return -ENOEXEC; -+ -+ strhdr = &info->sechdrs[info->hdr->e_shstrndx]; -+ err = validate_section_offset(info, strhdr); -+ if (err < 0) -+ return err; -+ -+ /* -+ * The section name table must be NUL-terminated, as required -+ * by the spec. This makes strcmp and pr_* calls that access -+ * strings in the section safe. -+ */ -+ info->secstrings = (void *)info->hdr + strhdr->sh_offset; -+ if (info->secstrings[strhdr->sh_size - 1] != '\0') -+ return -ENOEXEC; -+ -+ /* -+ * The code assumes that section 0 has a length of zero and -+ * an addr of zero, so check for it. -+ */ -+ if (info->sechdrs[0].sh_type != SHT_NULL -+ || info->sechdrs[0].sh_size != 0 -+ || info->sechdrs[0].sh_addr != 0) -+ return -ENOEXEC; -+ -+ for (i = 1; i < info->hdr->e_shnum; i++) { -+ shdr = &info->sechdrs[i]; -+ switch (shdr->sh_type) { -+ case SHT_NULL: -+ case SHT_NOBITS: -+ continue; -+ case SHT_SYMTAB: -+ if (shdr->sh_link == SHN_UNDEF -+ || shdr->sh_link >= info->hdr->e_shnum) -+ return -ENOEXEC; -+ fallthrough; -+ default: -+ err = validate_section_offset(info, shdr); -+ if (err < 0) { -+ pr_err("Invalid ELF section in module (section %u type %u)\n", -+ i, shdr->sh_type); -+ return err; -+ } -+ -+ if (shdr->sh_flags & SHF_ALLOC) { -+ if (shdr->sh_name >= strhdr->sh_size) { -+ pr_err("Invalid ELF section name in module (section %u type %u)\n", -+ i, shdr->sh_type); -+ return -ENOEXEC; -+ } -+ } -+ break; -+ } -+ } -+ - return 0; - } - -@@ -3095,11 +3203,6 @@ static int rewrite_section_headers(struct load_info *info, int flags) - - for (i = 1; i < info->hdr->e_shnum; i++) { - Elf_Shdr *shdr = &info->sechdrs[i]; -- if (shdr->sh_type != SHT_NOBITS -- && info->len < shdr->sh_offset + shdr->sh_size) { -- pr_err("Module len %lu truncated\n", info->len); -- return -ENOEXEC; -- } - - /* - * Mark all sections sh_addr with their address in the -@@ -3133,11 +3236,6 @@ static int setup_load_info(struct load_info *info, int flags) - { - unsigned int i; - -- /* Set up the convenience variables */ -- info->sechdrs = (void *)info->hdr + info->hdr->e_shoff; -- info->secstrings = (void *)info->hdr -- + info->sechdrs[info->hdr->e_shstrndx].sh_offset; -- - /* Try to find a name early so we can log errors with a module name */ - info->index.info = find_sec(info, ".modinfo"); - if (info->index.info) -@@ -3894,26 +3992,50 @@ static int load_module(struct load_info *info, const char __user *uargs, - long err = 0; - char *after_dashes; - -- err = elf_header_check(info); -+ /* -+ * Do the signature check (if any) first. All that -+ * the signature check needs is info->len, it does -+ * not need any of the section info. That can be -+ * set up later. This will minimize the chances -+ * of a corrupt module causing problems before -+ * we even get to the signature check. -+ * -+ * The check will also adjust info->len by stripping -+ * off the sig length at the end of the module, making -+ * checks against info->len more correct. -+ */ -+ err = module_sig_check(info, flags); -+ if (err) -+ goto free_copy; -+ -+ /* -+ * Do basic sanity checks against the ELF header and -+ * sections. -+ */ -+ err = elf_validity_check(info); - if (err) { -- pr_err("Module has invalid ELF header\n"); -+ pr_err("Module has invalid ELF structures\n"); - goto free_copy; - } - -+ /* -+ * Everything checks out, so set up the section info -+ * in the info structure. -+ */ - err = setup_load_info(info, flags); - if (err) - goto free_copy; - -+ /* -+ * Now that we know we have the correct module name, check -+ * if it's blacklisted. -+ */ - if (blacklisted(info->name)) { - err = -EPERM; - pr_err("Module %s is blacklisted\n", info->name); - goto free_copy; - } - -- err = module_sig_check(info, flags); -- if (err) -- goto free_copy; -- - err = rewrite_section_headers(info, flags); - if (err) - goto free_copy; -diff --git a/kernel/module_signature.c b/kernel/module_signature.c -index 4224a1086b7d8..00132d12487cd 100644 ---- a/kernel/module_signature.c -+++ b/kernel/module_signature.c -@@ -25,7 +25,7 @@ int mod_check_sig(const struct module_signature *ms, size_t file_len, - return -EBADMSG; - - if (ms->id_type != PKEY_ID_PKCS7) { -- pr_err("%s: Module is not signed with expected PKCS#7 message\n", -+ pr_err("%s: not signed with expected PKCS#7 message\n", - name); - return -ENOPKG; - } -diff --git a/kernel/module_signing.c b/kernel/module_signing.c -index 9d9fc678c91d6..8723ae70ea1fe 100644 ---- a/kernel/module_signing.c -+++ b/kernel/module_signing.c -@@ -30,7 +30,7 @@ int mod_verify_sig(const void *mod, struct load_info *info) - - memcpy(&ms, mod + (modlen - sizeof(ms)), sizeof(ms)); - -- ret = mod_check_sig(&ms, modlen, info->name); -+ ret = mod_check_sig(&ms, modlen, "module"); - if (ret) - return ret; - -diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c -index 5a95c688621fa..575a34b88936f 100644 ---- a/kernel/printk/printk.c -+++ b/kernel/printk/printk.c -@@ -735,9 +735,9 @@ static ssize_t devkmsg_read(struct file *file, char __user *buf, - logbuf_lock_irq(); - } - -- if (user->seq < prb_first_valid_seq(prb)) { -+ if (r->info->seq != user->seq) { - /* our last seen message is gone, return error and reset */ -- user->seq = prb_first_valid_seq(prb); -+ user->seq = r->info->seq; - ret = -EPIPE; - logbuf_unlock_irq(); - goto out; -@@ -812,6 +812,7 @@ static loff_t devkmsg_llseek(struct file *file, loff_t offset, int whence) - static __poll_t devkmsg_poll(struct file *file, poll_table *wait) - { - struct devkmsg_user *user = file->private_data; -+ struct printk_info info; - __poll_t ret = 0; - - if (!user) -@@ -820,9 +821,9 @@ static __poll_t devkmsg_poll(struct file *file, poll_table *wait) - poll_wait(file, &log_wait, wait); - - logbuf_lock_irq(); -- if (prb_read_valid(prb, user->seq, NULL)) { -+ if (prb_read_valid_info(prb, user->seq, &info, NULL)) { - /* return error when data has vanished underneath us */ -- if (user->seq < prb_first_valid_seq(prb)) -+ if (info.seq != user->seq) - ret = EPOLLIN|EPOLLRDNORM|EPOLLERR|EPOLLPRI; - else - ret = EPOLLIN|EPOLLRDNORM; -@@ -1559,6 +1560,7 @@ static void syslog_clear(void) - - int do_syslog(int type, char __user *buf, int len, int source) - { -+ struct printk_info info; - bool clear = false; - static int saved_console_loglevel = LOGLEVEL_DEFAULT; - int error; -@@ -1629,9 +1631,14 @@ int do_syslog(int type, char __user *buf, int len, int source) - /* Number of chars in the log buffer */ - case SYSLOG_ACTION_SIZE_UNREAD: - logbuf_lock_irq(); -- if (syslog_seq < prb_first_valid_seq(prb)) { -+ if (!prb_read_valid_info(prb, syslog_seq, &info, NULL)) { -+ /* No unread messages. */ -+ logbuf_unlock_irq(); -+ return 0; -+ } -+ if (info.seq != syslog_seq) { - /* messages are gone, move to first one */ -- syslog_seq = prb_first_valid_seq(prb); -+ syslog_seq = info.seq; - syslog_partial = 0; - } - if (source == SYSLOG_FROM_PROC) { -@@ -1643,7 +1650,6 @@ int do_syslog(int type, char __user *buf, int len, int source) - error = prb_next_seq(prb) - syslog_seq; - } else { - bool time = syslog_partial ? syslog_time : printk_time; -- struct printk_info info; - unsigned int line_count; - u64 seq; - -@@ -3429,9 +3435,11 @@ bool kmsg_dump_get_buffer(struct kmsg_dumper *dumper, bool syslog, - goto out; - - logbuf_lock_irqsave(flags); -- if (dumper->cur_seq < prb_first_valid_seq(prb)) { -- /* messages are gone, move to first available one */ -- dumper->cur_seq = prb_first_valid_seq(prb); -+ if (prb_read_valid_info(prb, dumper->cur_seq, &info, NULL)) { -+ if (info.seq != dumper->cur_seq) { -+ /* messages are gone, move to first available one */ -+ dumper->cur_seq = info.seq; -+ } - } - - /* last entry */ -diff --git a/kernel/printk/printk_safe.c b/kernel/printk/printk_safe.c -index a0e6f746de6c4..2e9e3ed7d63ef 100644 ---- a/kernel/printk/printk_safe.c -+++ b/kernel/printk/printk_safe.c -@@ -45,6 +45,8 @@ struct printk_safe_seq_buf { - static DEFINE_PER_CPU(struct printk_safe_seq_buf, safe_print_seq); - static DEFINE_PER_CPU(int, printk_context); - -+static DEFINE_RAW_SPINLOCK(safe_read_lock); -+ - #ifdef CONFIG_PRINTK_NMI - static DEFINE_PER_CPU(struct printk_safe_seq_buf, nmi_print_seq); - #endif -@@ -180,8 +182,6 @@ static void report_message_lost(struct printk_safe_seq_buf *s) - */ - static void __printk_safe_flush(struct irq_work *work) - { -- static raw_spinlock_t read_lock = -- __RAW_SPIN_LOCK_INITIALIZER(read_lock); - struct printk_safe_seq_buf *s = - container_of(work, struct printk_safe_seq_buf, work); - unsigned long flags; -@@ -195,7 +195,7 @@ static void __printk_safe_flush(struct irq_work *work) - * different CPUs. This is especially important when printing - * a backtrace. - */ -- raw_spin_lock_irqsave(&read_lock, flags); -+ raw_spin_lock_irqsave(&safe_read_lock, flags); - - i = 0; - more: -@@ -232,7 +232,7 @@ more: - - out: - report_message_lost(s); -- raw_spin_unlock_irqrestore(&read_lock, flags); -+ raw_spin_unlock_irqrestore(&safe_read_lock, flags); - } - - /** -@@ -278,6 +278,14 @@ void printk_safe_flush_on_panic(void) - raw_spin_lock_init(&logbuf_lock); - } - -+ if (raw_spin_is_locked(&safe_read_lock)) { -+ if (num_online_cpus() > 1) -+ return; -+ -+ debug_locks_off(); -+ raw_spin_lock_init(&safe_read_lock); -+ } -+ - printk_safe_flush(); - } - -diff --git a/kernel/rcu/tree.c b/kernel/rcu/tree.c -index 40e5e3dd253e0..ce17b8477442f 100644 ---- a/kernel/rcu/tree.c -+++ b/kernel/rcu/tree.c -@@ -644,7 +644,6 @@ static noinstr void rcu_eqs_enter(bool user) - trace_rcu_dyntick(TPS("Start"), rdp->dynticks_nesting, 0, atomic_read(&rdp->dynticks)); - WARN_ON_ONCE(IS_ENABLED(CONFIG_RCU_EQS_DEBUG) && !user && !is_idle_task(current)); - rdp = this_cpu_ptr(&rcu_data); -- do_nocb_deferred_wakeup(rdp); - rcu_prepare_for_idle(); - rcu_preempt_deferred_qs(current); - -@@ -678,6 +677,50 @@ void rcu_idle_enter(void) - EXPORT_SYMBOL_GPL(rcu_idle_enter); - - #ifdef CONFIG_NO_HZ_FULL -+ -+#if !defined(CONFIG_GENERIC_ENTRY) || !defined(CONFIG_KVM_XFER_TO_GUEST_WORK) -+/* -+ * An empty function that will trigger a reschedule on -+ * IRQ tail once IRQs get re-enabled on userspace/guest resume. -+ */ -+static void late_wakeup_func(struct irq_work *work) -+{ -+} -+ -+static DEFINE_PER_CPU(struct irq_work, late_wakeup_work) = -+ IRQ_WORK_INIT(late_wakeup_func); -+ -+/* -+ * If either: -+ * -+ * 1) the task is about to enter in guest mode and $ARCH doesn't support KVM generic work -+ * 2) the task is about to enter in user mode and $ARCH doesn't support generic entry. -+ * -+ * In these cases the late RCU wake ups aren't supported in the resched loops and our -+ * last resort is to fire a local irq_work that will trigger a reschedule once IRQs -+ * get re-enabled again. -+ */ -+noinstr static void rcu_irq_work_resched(void) -+{ -+ struct rcu_data *rdp = this_cpu_ptr(&rcu_data); -+ -+ if (IS_ENABLED(CONFIG_GENERIC_ENTRY) && !(current->flags & PF_VCPU)) -+ return; -+ -+ if (IS_ENABLED(CONFIG_KVM_XFER_TO_GUEST_WORK) && (current->flags & PF_VCPU)) -+ return; -+ -+ instrumentation_begin(); -+ if (do_nocb_deferred_wakeup(rdp) && need_resched()) { -+ irq_work_queue(this_cpu_ptr(&late_wakeup_work)); -+ } -+ instrumentation_end(); -+} -+ -+#else -+static inline void rcu_irq_work_resched(void) { } -+#endif -+ - /** - * rcu_user_enter - inform RCU that we are resuming userspace. - * -@@ -692,8 +735,16 @@ EXPORT_SYMBOL_GPL(rcu_idle_enter); - noinstr void rcu_user_enter(void) - { - lockdep_assert_irqs_disabled(); -+ -+ /* -+ * Other than generic entry implementation, we may be past the last -+ * rescheduling opportunity in the entry code. Trigger a self IPI -+ * that will fire and reschedule once we resume in user/guest mode. -+ */ -+ rcu_irq_work_resched(); - rcu_eqs_enter(true); - } -+ - #endif /* CONFIG_NO_HZ_FULL */ - - /** -diff --git a/kernel/rcu/tree.h b/kernel/rcu/tree.h -index 7708ed161f4a2..9226f4021a36d 100644 ---- a/kernel/rcu/tree.h -+++ b/kernel/rcu/tree.h -@@ -433,7 +433,7 @@ static bool rcu_nocb_try_bypass(struct rcu_data *rdp, struct rcu_head *rhp, - static void __call_rcu_nocb_wake(struct rcu_data *rdp, bool was_empty, - unsigned long flags); - static int rcu_nocb_need_deferred_wakeup(struct rcu_data *rdp); --static void do_nocb_deferred_wakeup(struct rcu_data *rdp); -+static bool do_nocb_deferred_wakeup(struct rcu_data *rdp); - static void rcu_boot_init_nocb_percpu_data(struct rcu_data *rdp); - static void rcu_spawn_cpu_nocb_kthread(int cpu); - static void __init rcu_spawn_nocb_kthreads(void); -diff --git a/kernel/rcu/tree_plugin.h b/kernel/rcu/tree_plugin.h -index 7e291ce0a1d6f..cdc1b7651c039 100644 ---- a/kernel/rcu/tree_plugin.h -+++ b/kernel/rcu/tree_plugin.h -@@ -1631,8 +1631,8 @@ bool rcu_is_nocb_cpu(int cpu) - * Kick the GP kthread for this NOCB group. Caller holds ->nocb_lock - * and this function releases it. - */ --static void wake_nocb_gp(struct rcu_data *rdp, bool force, -- unsigned long flags) -+static bool wake_nocb_gp(struct rcu_data *rdp, bool force, -+ unsigned long flags) - __releases(rdp->nocb_lock) - { - bool needwake = false; -@@ -1643,7 +1643,7 @@ static void wake_nocb_gp(struct rcu_data *rdp, bool force, - trace_rcu_nocb_wake(rcu_state.name, rdp->cpu, - TPS("AlreadyAwake")); - rcu_nocb_unlock_irqrestore(rdp, flags); -- return; -+ return false; - } - del_timer(&rdp->nocb_timer); - rcu_nocb_unlock_irqrestore(rdp, flags); -@@ -1656,6 +1656,8 @@ static void wake_nocb_gp(struct rcu_data *rdp, bool force, - raw_spin_unlock_irqrestore(&rdp_gp->nocb_gp_lock, flags); - if (needwake) - wake_up_process(rdp_gp->nocb_gp_kthread); -+ -+ return needwake; - } - - /* -@@ -2152,20 +2154,23 @@ static int rcu_nocb_need_deferred_wakeup(struct rcu_data *rdp) - } - - /* Do a deferred wakeup of rcu_nocb_kthread(). */ --static void do_nocb_deferred_wakeup_common(struct rcu_data *rdp) -+static bool do_nocb_deferred_wakeup_common(struct rcu_data *rdp) - { - unsigned long flags; - int ndw; -+ int ret; - - rcu_nocb_lock_irqsave(rdp, flags); - if (!rcu_nocb_need_deferred_wakeup(rdp)) { - rcu_nocb_unlock_irqrestore(rdp, flags); -- return; -+ return false; - } - ndw = READ_ONCE(rdp->nocb_defer_wakeup); - WRITE_ONCE(rdp->nocb_defer_wakeup, RCU_NOCB_WAKE_NOT); -- wake_nocb_gp(rdp, ndw == RCU_NOCB_WAKE_FORCE, flags); -+ ret = wake_nocb_gp(rdp, ndw == RCU_NOCB_WAKE_FORCE, flags); - trace_rcu_nocb_wake(rcu_state.name, rdp->cpu, TPS("DeferredWake")); -+ -+ return ret; - } - - /* Do a deferred wakeup of rcu_nocb_kthread() from a timer handler. */ -@@ -2181,12 +2186,19 @@ static void do_nocb_deferred_wakeup_timer(struct timer_list *t) - * This means we do an inexact common-case check. Note that if - * we miss, ->nocb_timer will eventually clean things up. - */ --static void do_nocb_deferred_wakeup(struct rcu_data *rdp) -+static bool do_nocb_deferred_wakeup(struct rcu_data *rdp) - { - if (rcu_nocb_need_deferred_wakeup(rdp)) -- do_nocb_deferred_wakeup_common(rdp); -+ return do_nocb_deferred_wakeup_common(rdp); -+ return false; - } - -+void rcu_nocb_flush_deferred_wakeup(void) -+{ -+ do_nocb_deferred_wakeup(this_cpu_ptr(&rcu_data)); -+} -+EXPORT_SYMBOL_GPL(rcu_nocb_flush_deferred_wakeup); -+ - void __init rcu_init_nohz(void) - { - int cpu; -@@ -2518,8 +2530,9 @@ static int rcu_nocb_need_deferred_wakeup(struct rcu_data *rdp) - return false; - } - --static void do_nocb_deferred_wakeup(struct rcu_data *rdp) -+static bool do_nocb_deferred_wakeup(struct rcu_data *rdp) - { -+ return false; - } - - static void rcu_spawn_cpu_nocb_kthread(int cpu) -diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c -index 04a3ce20da671..bbc78794224ac 100644 ---- a/kernel/sched/fair.c -+++ b/kernel/sched/fair.c -@@ -3943,6 +3943,22 @@ static inline void util_est_enqueue(struct cfs_rq *cfs_rq, - trace_sched_util_est_cfs_tp(cfs_rq); - } - -+static inline void util_est_dequeue(struct cfs_rq *cfs_rq, -+ struct task_struct *p) -+{ -+ unsigned int enqueued; -+ -+ if (!sched_feat(UTIL_EST)) -+ return; -+ -+ /* Update root cfs_rq's estimated utilization */ -+ enqueued = cfs_rq->avg.util_est.enqueued; -+ enqueued -= min_t(unsigned int, enqueued, _task_util_est(p)); -+ WRITE_ONCE(cfs_rq->avg.util_est.enqueued, enqueued); -+ -+ trace_sched_util_est_cfs_tp(cfs_rq); -+} -+ - /* - * Check if a (signed) value is within a specified (unsigned) margin, - * based on the observation that: -@@ -3956,23 +3972,16 @@ static inline bool within_margin(int value, int margin) - return ((unsigned int)(value + margin - 1) < (2 * margin - 1)); - } - --static void --util_est_dequeue(struct cfs_rq *cfs_rq, struct task_struct *p, bool task_sleep) -+static inline void util_est_update(struct cfs_rq *cfs_rq, -+ struct task_struct *p, -+ bool task_sleep) - { - long last_ewma_diff; - struct util_est ue; -- int cpu; - - if (!sched_feat(UTIL_EST)) - return; - -- /* Update root cfs_rq's estimated utilization */ -- ue.enqueued = cfs_rq->avg.util_est.enqueued; -- ue.enqueued -= min_t(unsigned int, ue.enqueued, _task_util_est(p)); -- WRITE_ONCE(cfs_rq->avg.util_est.enqueued, ue.enqueued); -- -- trace_sched_util_est_cfs_tp(cfs_rq); -- - /* - * Skip update of task's estimated utilization when the task has not - * yet completed an activation, e.g. being migrated. -@@ -4012,8 +4021,7 @@ util_est_dequeue(struct cfs_rq *cfs_rq, struct task_struct *p, bool task_sleep) - * To avoid overestimation of actual task utilization, skip updates if - * we cannot grant there is idle time in this CPU. - */ -- cpu = cpu_of(rq_of(cfs_rq)); -- if (task_util(p) > capacity_orig_of(cpu)) -+ if (task_util(p) > capacity_orig_of(cpu_of(rq_of(cfs_rq)))) - return; - - /* -@@ -4052,7 +4060,7 @@ static inline void update_misfit_status(struct task_struct *p, struct rq *rq) - if (!static_branch_unlikely(&sched_asym_cpucapacity)) - return; - -- if (!p) { -+ if (!p || p->nr_cpus_allowed == 1) { - rq->misfit_task_load = 0; - return; - } -@@ -4096,8 +4104,11 @@ static inline void - util_est_enqueue(struct cfs_rq *cfs_rq, struct task_struct *p) {} - - static inline void --util_est_dequeue(struct cfs_rq *cfs_rq, struct task_struct *p, -- bool task_sleep) {} -+util_est_dequeue(struct cfs_rq *cfs_rq, struct task_struct *p) {} -+ -+static inline void -+util_est_update(struct cfs_rq *cfs_rq, struct task_struct *p, -+ bool task_sleep) {} - static inline void update_misfit_status(struct task_struct *p, struct rq *rq) {} - - #endif /* CONFIG_SMP */ -@@ -5609,6 +5620,8 @@ static void dequeue_task_fair(struct rq *rq, struct task_struct *p, int flags) - int idle_h_nr_running = task_has_idle_policy(p); - bool was_sched_idle = sched_idle_rq(rq); - -+ util_est_dequeue(&rq->cfs, p); -+ - for_each_sched_entity(se) { - cfs_rq = cfs_rq_of(se); - dequeue_entity(cfs_rq, se, flags); -@@ -5659,7 +5672,7 @@ static void dequeue_task_fair(struct rq *rq, struct task_struct *p, int flags) - rq->next_balance = jiffies; - - dequeue_throttle: -- util_est_dequeue(&rq->cfs, p, task_sleep); -+ util_est_update(&rq->cfs, p, task_sleep); - hrtick_update(rq); - } - -diff --git a/kernel/sched/idle.c b/kernel/sched/idle.c -index 305727ea06772..7199e6f23789e 100644 ---- a/kernel/sched/idle.c -+++ b/kernel/sched/idle.c -@@ -285,6 +285,7 @@ static void do_idle(void) - } - - arch_cpu_idle_enter(); -+ rcu_nocb_flush_deferred_wakeup(); - - /* - * In poll mode we reenable interrupts and spin. Also if we -diff --git a/kernel/seccomp.c b/kernel/seccomp.c -index 952dc1c902295..63b40d12896bd 100644 ---- a/kernel/seccomp.c -+++ b/kernel/seccomp.c -@@ -1284,6 +1284,8 @@ static int __seccomp_filter(int this_syscall, const struct seccomp_data *sd, - const bool recheck_after_trace) - { - BUG(); -+ -+ return -1; - } - #endif - -diff --git a/kernel/smp.c b/kernel/smp.c -index 1b6070bf97bb0..aeb0adfa06063 100644 ---- a/kernel/smp.c -+++ b/kernel/smp.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -449,6 +450,9 @@ void flush_smp_call_function_from_idle(void) - - local_irq_save(flags); - flush_smp_call_function_queue(true); -+ if (local_softirq_pending()) -+ do_softirq(); -+ - local_irq_restore(flags); - } - -diff --git a/kernel/tracepoint.c b/kernel/tracepoint.c -index 7261fa0f5e3cc..e8f20ae29c18f 100644 ---- a/kernel/tracepoint.c -+++ b/kernel/tracepoint.c -@@ -53,6 +53,12 @@ struct tp_probes { - struct tracepoint_func probes[]; - }; - -+/* Called in removal of a func but failed to allocate a new tp_funcs */ -+static void tp_stub_func(void) -+{ -+ return; -+} -+ - static inline void *allocate_probes(int count) - { - struct tp_probes *p = kmalloc(struct_size(p, probes, count), -@@ -131,6 +137,7 @@ func_add(struct tracepoint_func **funcs, struct tracepoint_func *tp_func, - { - struct tracepoint_func *old, *new; - int nr_probes = 0; -+ int stub_funcs = 0; - int pos = -1; - - if (WARN_ON(!tp_func->func)) -@@ -147,14 +154,34 @@ func_add(struct tracepoint_func **funcs, struct tracepoint_func *tp_func, - if (old[nr_probes].func == tp_func->func && - old[nr_probes].data == tp_func->data) - return ERR_PTR(-EEXIST); -+ if (old[nr_probes].func == tp_stub_func) -+ stub_funcs++; - } - } -- /* + 2 : one for new probe, one for NULL func */ -- new = allocate_probes(nr_probes + 2); -+ /* + 2 : one for new probe, one for NULL func - stub functions */ -+ new = allocate_probes(nr_probes + 2 - stub_funcs); - if (new == NULL) - return ERR_PTR(-ENOMEM); - if (old) { -- if (pos < 0) { -+ if (stub_funcs) { -+ /* Need to copy one at a time to remove stubs */ -+ int probes = 0; -+ -+ pos = -1; -+ for (nr_probes = 0; old[nr_probes].func; nr_probes++) { -+ if (old[nr_probes].func == tp_stub_func) -+ continue; -+ if (pos < 0 && old[nr_probes].prio < prio) -+ pos = probes++; -+ new[probes++] = old[nr_probes]; -+ } -+ nr_probes = probes; -+ if (pos < 0) -+ pos = probes; -+ else -+ nr_probes--; /* Account for insertion */ -+ -+ } else if (pos < 0) { - pos = nr_probes; - memcpy(new, old, nr_probes * sizeof(struct tracepoint_func)); - } else { -@@ -188,8 +215,9 @@ static void *func_remove(struct tracepoint_func **funcs, - /* (N -> M), (N > 1, M >= 0) probes */ - if (tp_func->func) { - for (nr_probes = 0; old[nr_probes].func; nr_probes++) { -- if (old[nr_probes].func == tp_func->func && -- old[nr_probes].data == tp_func->data) -+ if ((old[nr_probes].func == tp_func->func && -+ old[nr_probes].data == tp_func->data) || -+ old[nr_probes].func == tp_stub_func) - nr_del++; - } - } -@@ -208,14 +236,32 @@ static void *func_remove(struct tracepoint_func **funcs, - /* N -> M, (N > 1, M > 0) */ - /* + 1 for NULL */ - new = allocate_probes(nr_probes - nr_del + 1); -- if (new == NULL) -- return ERR_PTR(-ENOMEM); -- for (i = 0; old[i].func; i++) -- if (old[i].func != tp_func->func -- || old[i].data != tp_func->data) -- new[j++] = old[i]; -- new[nr_probes - nr_del].func = NULL; -- *funcs = new; -+ if (new) { -+ for (i = 0; old[i].func; i++) -+ if ((old[i].func != tp_func->func -+ || old[i].data != tp_func->data) -+ && old[i].func != tp_stub_func) -+ new[j++] = old[i]; -+ new[nr_probes - nr_del].func = NULL; -+ *funcs = new; -+ } else { -+ /* -+ * Failed to allocate, replace the old function -+ * with calls to tp_stub_func. -+ */ -+ for (i = 0; old[i].func; i++) -+ if (old[i].func == tp_func->func && -+ old[i].data == tp_func->data) { -+ old[i].func = tp_stub_func; -+ /* Set the prio to the next event. */ -+ if (old[i + 1].func) -+ old[i].prio = -+ old[i + 1].prio; -+ else -+ old[i].prio = -1; -+ } -+ *funcs = old; -+ } - } - debug_print_probes(*funcs); - return old; -@@ -295,10 +341,12 @@ static int tracepoint_remove_func(struct tracepoint *tp, - tp_funcs = rcu_dereference_protected(tp->funcs, - lockdep_is_held(&tracepoints_mutex)); - old = func_remove(&tp_funcs, func); -- if (IS_ERR(old)) { -- WARN_ON_ONCE(PTR_ERR(old) != -ENOMEM); -+ if (WARN_ON_ONCE(IS_ERR(old))) - return PTR_ERR(old); -- } -+ -+ if (tp_funcs == old) -+ /* Failed allocating new tp_funcs, replaced func with stub */ -+ return 0; - - if (!tp_funcs) { - /* Removed last function */ -diff --git a/mm/compaction.c b/mm/compaction.c -index 190ccdaa6c192..6e69f33ad599f 100644 ---- a/mm/compaction.c -+++ b/mm/compaction.c -@@ -1288,7 +1288,7 @@ static void - fast_isolate_around(struct compact_control *cc, unsigned long pfn, unsigned long nr_isolated) - { - unsigned long start_pfn, end_pfn; -- struct page *page = pfn_to_page(pfn); -+ struct page *page; - - /* Do not search around if there are enough pages already */ - if (cc->nr_freepages >= cc->nr_migratepages) -@@ -1299,8 +1299,12 @@ fast_isolate_around(struct compact_control *cc, unsigned long pfn, unsigned long - return; - - /* Pageblock boundaries */ -- start_pfn = pageblock_start_pfn(pfn); -- end_pfn = min(pageblock_end_pfn(pfn), zone_end_pfn(cc->zone)) - 1; -+ start_pfn = max(pageblock_start_pfn(pfn), cc->zone->zone_start_pfn); -+ end_pfn = min(pageblock_end_pfn(pfn), zone_end_pfn(cc->zone)); -+ -+ page = pageblock_pfn_to_page(start_pfn, end_pfn, cc->zone); -+ if (!page) -+ return; - - /* Scan before */ - if (start_pfn != pfn) { -@@ -1402,7 +1406,8 @@ fast_isolate_freepages(struct compact_control *cc) - pfn = page_to_pfn(freepage); - - if (pfn >= highest) -- highest = pageblock_start_pfn(pfn); -+ highest = max(pageblock_start_pfn(pfn), -+ cc->zone->zone_start_pfn); - - if (pfn >= low_pfn) { - cc->fast_search_fail = 0; -@@ -1472,7 +1477,8 @@ fast_isolate_freepages(struct compact_control *cc) - } else { - if (cc->direct_compaction && pfn_valid(min_pfn)) { - page = pageblock_pfn_to_page(min_pfn, -- pageblock_end_pfn(min_pfn), -+ min(pageblock_end_pfn(min_pfn), -+ zone_end_pfn(cc->zone)), - cc->zone); - cc->free_pfn = min_pfn; - } -@@ -1702,6 +1708,7 @@ static unsigned long fast_find_migrateblock(struct compact_control *cc) - unsigned long pfn = cc->migrate_pfn; - unsigned long high_pfn; - int order; -+ bool found_block = false; - - /* Skip hints are relied on to avoid repeats on the fast search */ - if (cc->ignore_skip_hint) -@@ -1744,7 +1751,7 @@ static unsigned long fast_find_migrateblock(struct compact_control *cc) - high_pfn = pageblock_start_pfn(cc->migrate_pfn + distance); - - for (order = cc->order - 1; -- order >= PAGE_ALLOC_COSTLY_ORDER && pfn == cc->migrate_pfn && nr_scanned < limit; -+ order >= PAGE_ALLOC_COSTLY_ORDER && !found_block && nr_scanned < limit; - order--) { - struct free_area *area = &cc->zone->free_area[order]; - struct list_head *freelist; -@@ -1759,7 +1766,11 @@ static unsigned long fast_find_migrateblock(struct compact_control *cc) - list_for_each_entry(freepage, freelist, lru) { - unsigned long free_pfn; - -- nr_scanned++; -+ if (nr_scanned++ >= limit) { -+ move_freelist_tail(freelist, freepage); -+ break; -+ } -+ - free_pfn = page_to_pfn(freepage); - if (free_pfn < high_pfn) { - /* -@@ -1768,12 +1779,8 @@ static unsigned long fast_find_migrateblock(struct compact_control *cc) - * the list assumes an entry is deleted, not - * reordered. - */ -- if (get_pageblock_skip(freepage)) { -- if (list_is_last(freelist, &freepage->lru)) -- break; -- -+ if (get_pageblock_skip(freepage)) - continue; -- } - - /* Reorder to so a future search skips recent pages */ - move_freelist_tail(freelist, freepage); -@@ -1781,15 +1788,10 @@ static unsigned long fast_find_migrateblock(struct compact_control *cc) - update_fast_start_pfn(cc, free_pfn); - pfn = pageblock_start_pfn(free_pfn); - cc->fast_search_fail = 0; -+ found_block = true; - set_pageblock_skip(freepage); - break; - } -- -- if (nr_scanned >= limit) { -- cc->fast_search_fail++; -- move_freelist_tail(freelist, freepage); -- break; -- } - } - spin_unlock_irqrestore(&cc->zone->lock, flags); - } -@@ -1800,9 +1802,10 @@ static unsigned long fast_find_migrateblock(struct compact_control *cc) - * If fast scanning failed then use a cached entry for a page block - * that had free pages as the basis for starting a linear scan. - */ -- if (pfn == cc->migrate_pfn) -+ if (!found_block) { -+ cc->fast_search_fail++; - pfn = reinit_migrate_pfn(cc); -- -+ } - return pfn; - } - -diff --git a/mm/hugetlb.c b/mm/hugetlb.c -index 4bdb58ab14cbb..723e8d342c627 100644 ---- a/mm/hugetlb.c -+++ b/mm/hugetlb.c -@@ -1312,14 +1312,16 @@ static inline void destroy_compound_gigantic_page(struct page *page, - static void update_and_free_page(struct hstate *h, struct page *page) - { - int i; -+ struct page *subpage = page; - - if (hstate_is_gigantic(h) && !gigantic_page_runtime_supported()) - return; - - h->nr_huge_pages--; - h->nr_huge_pages_node[page_to_nid(page)]--; -- for (i = 0; i < pages_per_huge_page(h); i++) { -- page[i].flags &= ~(1 << PG_locked | 1 << PG_error | -+ for (i = 0; i < pages_per_huge_page(h); -+ i++, subpage = mem_map_next(subpage, page, i)) { -+ subpage->flags &= ~(1 << PG_locked | 1 << PG_error | - 1 << PG_referenced | 1 << PG_dirty | - 1 << PG_active | 1 << PG_private | - 1 << PG_writeback); -@@ -2520,7 +2522,7 @@ static void __init hugetlb_hstate_alloc_pages(struct hstate *h) - if (hstate_is_gigantic(h)) { - if (hugetlb_cma_size) { - pr_warn_once("HugeTLB: hugetlb_cma is enabled, skip boot time allocation\n"); -- break; -+ goto free; - } - if (!alloc_bootmem_huge_page(h)) - break; -@@ -2538,7 +2540,7 @@ static void __init hugetlb_hstate_alloc_pages(struct hstate *h) - h->max_huge_pages, buf, i); - h->max_huge_pages = i; - } -- -+free: - kfree(node_alloc_noretry); - } - -@@ -2988,8 +2990,10 @@ static int hugetlb_sysfs_add_hstate(struct hstate *h, struct kobject *parent, - return -ENOMEM; - - retval = sysfs_create_group(hstate_kobjs[hi], hstate_attr_group); -- if (retval) -+ if (retval) { - kobject_put(hstate_kobjs[hi]); -+ hstate_kobjs[hi] = NULL; -+ } - - return retval; - } -diff --git a/mm/khugepaged.c b/mm/khugepaged.c -index 67ab391a53739..494d3cb0b58a3 100644 ---- a/mm/khugepaged.c -+++ b/mm/khugepaged.c -@@ -442,18 +442,28 @@ static inline int khugepaged_test_exit(struct mm_struct *mm) - static bool hugepage_vma_check(struct vm_area_struct *vma, - unsigned long vm_flags) - { -- if ((!(vm_flags & VM_HUGEPAGE) && !khugepaged_always()) || -- (vm_flags & VM_NOHUGEPAGE) || -+ /* Explicitly disabled through madvise. */ -+ if ((vm_flags & VM_NOHUGEPAGE) || - test_bit(MMF_DISABLE_THP, &vma->vm_mm->flags)) - return false; - -- if (shmem_file(vma->vm_file) || -- (IS_ENABLED(CONFIG_READ_ONLY_THP_FOR_FS) && -- vma->vm_file && -- (vm_flags & VM_DENYWRITE))) { -+ /* Enabled via shmem mount options or sysfs settings. */ -+ if (shmem_file(vma->vm_file) && shmem_huge_enabled(vma)) { - return IS_ALIGNED((vma->vm_start >> PAGE_SHIFT) - vma->vm_pgoff, - HPAGE_PMD_NR); - } -+ -+ /* THP settings require madvise. */ -+ if (!(vm_flags & VM_HUGEPAGE) && !khugepaged_always()) -+ return false; -+ -+ /* Read-only file mappings need to be aligned for THP to work. */ -+ if (IS_ENABLED(CONFIG_READ_ONLY_THP_FOR_FS) && vma->vm_file && -+ (vm_flags & VM_DENYWRITE)) { -+ return IS_ALIGNED((vma->vm_start >> PAGE_SHIFT) - vma->vm_pgoff, -+ HPAGE_PMD_NR); -+ } -+ - if (!vma->anon_vma || vma->vm_ops) - return false; - if (vma_is_temporary_stack(vma)) -diff --git a/mm/memcontrol.c b/mm/memcontrol.c -index 913c2b9e5c72d..d76a1f9c0e552 100644 ---- a/mm/memcontrol.c -+++ b/mm/memcontrol.c -@@ -1080,13 +1080,9 @@ static __always_inline struct mem_cgroup *get_active_memcg(void) - - rcu_read_lock(); - memcg = active_memcg(); -- if (memcg) { -- /* current->active_memcg must hold a ref. */ -- if (WARN_ON_ONCE(!css_tryget(&memcg->css))) -- memcg = root_mem_cgroup; -- else -- memcg = current->active_memcg; -- } -+ /* remote memcg must hold a ref. */ -+ if (memcg && WARN_ON_ONCE(!css_tryget(&memcg->css))) -+ memcg = root_mem_cgroup; - rcu_read_unlock(); - - return memcg; -@@ -5637,10 +5633,8 @@ static int mem_cgroup_move_account(struct page *page, - __mod_lruvec_state(from_vec, NR_ANON_MAPPED, -nr_pages); - __mod_lruvec_state(to_vec, NR_ANON_MAPPED, nr_pages); - if (PageTransHuge(page)) { -- __mod_lruvec_state(from_vec, NR_ANON_THPS, -- -nr_pages); -- __mod_lruvec_state(to_vec, NR_ANON_THPS, -- nr_pages); -+ __dec_lruvec_state(from_vec, NR_ANON_THPS); -+ __inc_lruvec_state(to_vec, NR_ANON_THPS); - } - - } -@@ -6760,7 +6754,19 @@ int mem_cgroup_charge(struct page *page, struct mm_struct *mm, gfp_t gfp_mask) - memcg_check_events(memcg, page); - local_irq_enable(); - -- if (PageSwapCache(page)) { -+ /* -+ * Cgroup1's unified memory+swap counter has been charged with the -+ * new swapcache page, finish the transfer by uncharging the swap -+ * slot. The swap slot would also get uncharged when it dies, but -+ * it can stick around indefinitely and we'd count the page twice -+ * the entire time. -+ * -+ * Cgroup2 has separate resource counters for memory and swap, -+ * so this is a non-issue here. Memory and swap charge lifetimes -+ * correspond 1:1 to page and swap slot lifetimes: we charge the -+ * page to memory here, and uncharge swap when the slot is freed. -+ */ -+ if (do_memsw_account() && PageSwapCache(page)) { - swp_entry_t entry = { .val = page_private(page) }; - /* - * The swap entry might not get freed for a long time, -diff --git a/mm/memory-failure.c b/mm/memory-failure.c -index e9481632fcd1b..4e3684d694c12 100644 ---- a/mm/memory-failure.c -+++ b/mm/memory-failure.c -@@ -1308,6 +1308,12 @@ static int memory_failure_dev_pagemap(unsigned long pfn, int flags, - */ - put_page(page); - -+ /* device metadata space is not recoverable */ -+ if (!pgmap_pfn_valid(pgmap, pfn)) { -+ rc = -ENXIO; -+ goto out; -+ } -+ - /* - * Prevent the inode from being freed while we are interrogating - * the address_space, typically this would be handled by -diff --git a/mm/memory.c b/mm/memory.c -index 985dac0958dcf..c05d4c4c03d6d 100644 ---- a/mm/memory.c -+++ b/mm/memory.c -@@ -2165,11 +2165,11 @@ static int remap_pte_range(struct mm_struct *mm, pmd_t *pmd, - unsigned long addr, unsigned long end, - unsigned long pfn, pgprot_t prot) - { -- pte_t *pte; -+ pte_t *pte, *mapped_pte; - spinlock_t *ptl; - int err = 0; - -- pte = pte_alloc_map_lock(mm, pmd, addr, &ptl); -+ mapped_pte = pte = pte_alloc_map_lock(mm, pmd, addr, &ptl); - if (!pte) - return -ENOMEM; - arch_enter_lazy_mmu_mode(); -@@ -2183,7 +2183,7 @@ static int remap_pte_range(struct mm_struct *mm, pmd_t *pmd, - pfn++; - } while (pte++, addr += PAGE_SIZE, addr != end); - arch_leave_lazy_mmu_mode(); -- pte_unmap_unlock(pte - 1, ptl); -+ pte_unmap_unlock(mapped_pte, ptl); - return err; - } - -@@ -5204,17 +5204,19 @@ long copy_huge_page_from_user(struct page *dst_page, - void *page_kaddr; - unsigned long i, rc = 0; - unsigned long ret_val = pages_per_huge_page * PAGE_SIZE; -+ struct page *subpage = dst_page; - -- for (i = 0; i < pages_per_huge_page; i++) { -+ for (i = 0; i < pages_per_huge_page; -+ i++, subpage = mem_map_next(subpage, dst_page, i)) { - if (allow_pagefault) -- page_kaddr = kmap(dst_page + i); -+ page_kaddr = kmap(subpage); - else -- page_kaddr = kmap_atomic(dst_page + i); -+ page_kaddr = kmap_atomic(subpage); - rc = copy_from_user(page_kaddr, - (const void __user *)(src + i * PAGE_SIZE), - PAGE_SIZE); - if (allow_pagefault) -- kunmap(dst_page + i); -+ kunmap(subpage); - else - kunmap_atomic(page_kaddr); - -diff --git a/mm/memremap.c b/mm/memremap.c -index 16b2fb482da11..2455bac895066 100644 ---- a/mm/memremap.c -+++ b/mm/memremap.c -@@ -80,6 +80,21 @@ static unsigned long pfn_first(struct dev_pagemap *pgmap, int range_id) - return pfn + vmem_altmap_offset(pgmap_altmap(pgmap)); - } - -+bool pgmap_pfn_valid(struct dev_pagemap *pgmap, unsigned long pfn) -+{ -+ int i; -+ -+ for (i = 0; i < pgmap->nr_range; i++) { -+ struct range *range = &pgmap->ranges[i]; -+ -+ if (pfn >= PHYS_PFN(range->start) && -+ pfn <= PHYS_PFN(range->end)) -+ return pfn >= pfn_first(pgmap, i); -+ } -+ -+ return false; -+} -+ - static unsigned long pfn_end(struct dev_pagemap *pgmap, int range_id) - { - const struct range *range = &pgmap->ranges[range_id]; -diff --git a/mm/slab_common.c b/mm/slab_common.c -index e981c80d216c2..0b775cb5c1089 100644 ---- a/mm/slab_common.c -+++ b/mm/slab_common.c -@@ -837,8 +837,8 @@ void *kmalloc_order(size_t size, gfp_t flags, unsigned int order) - page = alloc_pages(flags, order); - if (likely(page)) { - ret = page_address(page); -- mod_node_page_state(page_pgdat(page), NR_SLAB_UNRECLAIMABLE_B, -- PAGE_SIZE << order); -+ mod_lruvec_page_state(page, NR_SLAB_UNRECLAIMABLE_B, -+ PAGE_SIZE << order); - } - ret = kasan_kmalloc_large(ret, size, flags); - /* As ret might get tagged, call kmemleak hook after KASAN. */ -diff --git a/mm/slub.c b/mm/slub.c -index b22a4b101c846..69dacc61b8435 100644 ---- a/mm/slub.c -+++ b/mm/slub.c -@@ -3999,8 +3999,8 @@ static void *kmalloc_large_node(size_t size, gfp_t flags, int node) - page = alloc_pages_node(node, flags, order); - if (page) { - ptr = page_address(page); -- mod_node_page_state(page_pgdat(page), NR_SLAB_UNRECLAIMABLE_B, -- PAGE_SIZE << order); -+ mod_lruvec_page_state(page, NR_SLAB_UNRECLAIMABLE_B, -+ PAGE_SIZE << order); - } - - return kmalloc_large_node_hook(ptr, size, flags); -@@ -4131,8 +4131,8 @@ void kfree(const void *x) - - BUG_ON(!PageCompound(page)); - kfree_hook(object); -- mod_node_page_state(page_pgdat(page), NR_SLAB_UNRECLAIMABLE_B, -- -(PAGE_SIZE << order)); -+ mod_lruvec_page_state(page, NR_SLAB_UNRECLAIMABLE_B, -+ -(PAGE_SIZE << order)); - __free_pages(page, order); - return; - } -diff --git a/mm/vmscan.c b/mm/vmscan.c -index b1b574ad199d2..ad9f2adaf02ec 100644 ---- a/mm/vmscan.c -+++ b/mm/vmscan.c -@@ -4095,8 +4095,13 @@ module_init(kswapd_init) - */ - int node_reclaim_mode __read_mostly; - --#define RECLAIM_WRITE (1<<0) /* Writeout pages during reclaim */ --#define RECLAIM_UNMAP (1<<1) /* Unmap pages during reclaim */ -+/* -+ * These bit locations are exposed in the vm.zone_reclaim_mode sysctl -+ * ABI. New bits are OK, but existing bits can never change. -+ */ -+#define RECLAIM_ZONE (1<<0) /* Run shrink_inactive_list on the zone */ -+#define RECLAIM_WRITE (1<<1) /* Writeout pages during reclaim */ -+#define RECLAIM_UNMAP (1<<2) /* Unmap pages during reclaim */ - - /* - * Priority for NODE_RECLAIM. This determines the fraction of pages -diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c -index 7289f502ffaca..052977d7936ed 100644 ---- a/mm/zsmalloc.c -+++ b/mm/zsmalloc.c -@@ -2213,11 +2213,13 @@ static unsigned long zs_can_compact(struct size_class *class) - return obj_wasted * class->pages_per_zspage; - } - --static void __zs_compact(struct zs_pool *pool, struct size_class *class) -+static unsigned long __zs_compact(struct zs_pool *pool, -+ struct size_class *class) - { - struct zs_compact_control cc; - struct zspage *src_zspage; - struct zspage *dst_zspage = NULL; -+ unsigned long pages_freed = 0; - - spin_lock(&class->lock); - while ((src_zspage = isolate_zspage(class, true))) { -@@ -2247,7 +2249,7 @@ static void __zs_compact(struct zs_pool *pool, struct size_class *class) - putback_zspage(class, dst_zspage); - if (putback_zspage(class, src_zspage) == ZS_EMPTY) { - free_zspage(pool, class, src_zspage); -- pool->stats.pages_compacted += class->pages_per_zspage; -+ pages_freed += class->pages_per_zspage; - } - spin_unlock(&class->lock); - cond_resched(); -@@ -2258,12 +2260,15 @@ static void __zs_compact(struct zs_pool *pool, struct size_class *class) - putback_zspage(class, src_zspage); - - spin_unlock(&class->lock); -+ -+ return pages_freed; - } - - unsigned long zs_compact(struct zs_pool *pool) - { - int i; - struct size_class *class; -+ unsigned long pages_freed = 0; - - for (i = ZS_SIZE_CLASSES - 1; i >= 0; i--) { - class = pool->size_class[i]; -@@ -2271,10 +2276,11 @@ unsigned long zs_compact(struct zs_pool *pool) - continue; - if (class->index != i) - continue; -- __zs_compact(pool, class); -+ pages_freed += __zs_compact(pool, class); - } -+ atomic_long_add(pages_freed, &pool->stats.pages_compacted); - -- return pool->stats.pages_compacted; -+ return pages_freed; - } - EXPORT_SYMBOL_GPL(zs_compact); - -@@ -2291,13 +2297,12 @@ static unsigned long zs_shrinker_scan(struct shrinker *shrinker, - struct zs_pool *pool = container_of(shrinker, struct zs_pool, - shrinker); - -- pages_freed = pool->stats.pages_compacted; - /* - * Compact classes and calculate compaction delta. - * Can run concurrently with a manually triggered - * (by user) compaction. - */ -- pages_freed = zs_compact(pool) - pages_freed; -+ pages_freed = zs_compact(pool); - - return pages_freed ? pages_freed : SHRINK_STOP; - } -diff --git a/net/bluetooth/a2mp.c b/net/bluetooth/a2mp.c -index da7fd7c8c2dc0..463bad58478b2 100644 ---- a/net/bluetooth/a2mp.c -+++ b/net/bluetooth/a2mp.c -@@ -381,9 +381,9 @@ static int a2mp_getampassoc_req(struct amp_mgr *mgr, struct sk_buff *skb, - hdev = hci_dev_get(req->id); - if (!hdev || hdev->amp_type == AMP_TYPE_BREDR || tmp) { - struct a2mp_amp_assoc_rsp rsp; -- rsp.id = req->id; - - memset(&rsp, 0, sizeof(rsp)); -+ rsp.id = req->id; - - if (tmp) { - rsp.status = A2MP_STATUS_COLLISION_OCCURED; -@@ -512,6 +512,7 @@ static int a2mp_createphyslink_req(struct amp_mgr *mgr, struct sk_buff *skb, - assoc = kmemdup(req->amp_assoc, assoc_len, GFP_KERNEL); - if (!assoc) { - amp_ctrl_put(ctrl); -+ hci_dev_put(hdev); - return -ENOMEM; - } - -diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c -index 9d2c9a1c552fd..9f8573131b97e 100644 ---- a/net/bluetooth/hci_core.c -+++ b/net/bluetooth/hci_core.c -@@ -1362,8 +1362,10 @@ int hci_inquiry(void __user *arg) - * cleared). If it is interrupted by a signal, return -EINTR. - */ - if (wait_on_bit(&hdev->flags, HCI_INQUIRY, -- TASK_INTERRUPTIBLE)) -- return -EINTR; -+ TASK_INTERRUPTIBLE)) { -+ err = -EINTR; -+ goto done; -+ } - } - - /* for unlimited number of responses we will use buffer with -diff --git a/net/bluetooth/hci_request.c b/net/bluetooth/hci_request.c -index 71bffd7454720..5aa7bd5030a21 100644 ---- a/net/bluetooth/hci_request.c -+++ b/net/bluetooth/hci_request.c -@@ -1087,6 +1087,8 @@ void hci_req_add_le_passive_scan(struct hci_request *req) - if (hdev->suspended) { - window = hdev->le_scan_window_suspend; - interval = hdev->le_scan_int_suspend; -+ -+ set_bit(SUSPEND_SCAN_ENABLE, hdev->suspend_tasks); - } else if (hci_is_le_conn_scanning(hdev)) { - window = hdev->le_scan_window_connect; - interval = hdev->le_scan_int_connect; -@@ -1170,19 +1172,6 @@ static void hci_req_set_event_filter(struct hci_request *req) - hci_req_add(req, HCI_OP_WRITE_SCAN_ENABLE, 1, &scan); - } - --static void hci_req_config_le_suspend_scan(struct hci_request *req) --{ -- /* Before changing params disable scan if enabled */ -- if (hci_dev_test_flag(req->hdev, HCI_LE_SCAN)) -- hci_req_add_le_scan_disable(req, false); -- -- /* Configure params and enable scanning */ -- hci_req_add_le_passive_scan(req); -- -- /* Block suspend notifier on response */ -- set_bit(SUSPEND_SCAN_ENABLE, req->hdev->suspend_tasks); --} -- - static void cancel_adv_timeout(struct hci_dev *hdev) - { - if (hdev->adv_instance_timeout) { -@@ -1245,8 +1234,10 @@ static void suspend_req_complete(struct hci_dev *hdev, u8 status, u16 opcode) - { - bt_dev_dbg(hdev, "Request complete opcode=0x%x, status=0x%x", opcode, - status); -- if (test_and_clear_bit(SUSPEND_SCAN_ENABLE, hdev->suspend_tasks) || -- test_and_clear_bit(SUSPEND_SCAN_DISABLE, hdev->suspend_tasks)) { -+ if (test_bit(SUSPEND_SCAN_ENABLE, hdev->suspend_tasks) || -+ test_bit(SUSPEND_SCAN_DISABLE, hdev->suspend_tasks)) { -+ clear_bit(SUSPEND_SCAN_ENABLE, hdev->suspend_tasks); -+ clear_bit(SUSPEND_SCAN_DISABLE, hdev->suspend_tasks); - wake_up(&hdev->suspend_wait_q); - } - } -@@ -1336,7 +1327,7 @@ void hci_req_prepare_suspend(struct hci_dev *hdev, enum suspended_state next) - /* Enable event filter for paired devices */ - hci_req_set_event_filter(&req); - /* Enable passive scan at lower duty cycle */ -- hci_req_config_le_suspend_scan(&req); -+ __hci_update_background_scan(&req); - /* Pause scan changes again. */ - hdev->scanning_paused = true; - hci_req_run(&req, suspend_req_complete); -@@ -1346,7 +1337,7 @@ void hci_req_prepare_suspend(struct hci_dev *hdev, enum suspended_state next) - - hci_req_clear_event_filter(&req); - /* Reset passive/background scanning to normal */ -- hci_req_config_le_suspend_scan(&req); -+ __hci_update_background_scan(&req); - - /* Unpause directed advertising */ - hdev->advertising_paused = false; -diff --git a/net/core/filter.c b/net/core/filter.c -index 255aeee724026..ee665720a41a0 100644 ---- a/net/core/filter.c -+++ b/net/core/filter.c -@@ -5552,6 +5552,7 @@ BPF_CALL_4(bpf_skb_fib_lookup, struct sk_buff *, skb, - { - struct net *net = dev_net(skb->dev); - int rc = -EAFNOSUPPORT; -+ bool check_mtu = false; - - if (plen < sizeof(*params)) - return -EINVAL; -@@ -5559,22 +5560,28 @@ BPF_CALL_4(bpf_skb_fib_lookup, struct sk_buff *, skb, - if (flags & ~(BPF_FIB_LOOKUP_DIRECT | BPF_FIB_LOOKUP_OUTPUT)) - return -EINVAL; - -+ if (params->tot_len) -+ check_mtu = true; -+ - switch (params->family) { - #if IS_ENABLED(CONFIG_INET) - case AF_INET: -- rc = bpf_ipv4_fib_lookup(net, params, flags, false); -+ rc = bpf_ipv4_fib_lookup(net, params, flags, check_mtu); - break; - #endif - #if IS_ENABLED(CONFIG_IPV6) - case AF_INET6: -- rc = bpf_ipv6_fib_lookup(net, params, flags, false); -+ rc = bpf_ipv6_fib_lookup(net, params, flags, check_mtu); - break; - #endif - } - -- if (!rc) { -+ if (rc == BPF_FIB_LKUP_RET_SUCCESS && !check_mtu) { - struct net_device *dev; - -+ /* When tot_len isn't provided by user, check skb -+ * against MTU of FIB lookup resulting net_device -+ */ - dev = dev_get_by_index_rcu(net, params->ifindex); - if (!is_skb_forwardable(dev, skb)) - rc = BPF_FIB_LKUP_RET_FRAG_NEEDED; -diff --git a/net/ipv4/icmp.c b/net/ipv4/icmp.c -index 396b492c804f4..616e2dc1c8fa4 100644 ---- a/net/ipv4/icmp.c -+++ b/net/ipv4/icmp.c -@@ -775,13 +775,14 @@ EXPORT_SYMBOL(__icmp_send); - void icmp_ndo_send(struct sk_buff *skb_in, int type, int code, __be32 info) - { - struct sk_buff *cloned_skb = NULL; -+ struct ip_options opts = { 0 }; - enum ip_conntrack_info ctinfo; - struct nf_conn *ct; - __be32 orig_ip; - - ct = nf_ct_get(skb_in, &ctinfo); - if (!ct || !(ct->status & IPS_SRC_NAT)) { -- icmp_send(skb_in, type, code, info); -+ __icmp_send(skb_in, type, code, info, &opts); - return; - } - -@@ -796,7 +797,7 @@ void icmp_ndo_send(struct sk_buff *skb_in, int type, int code, __be32 info) - - orig_ip = ip_hdr(skb_in)->saddr; - ip_hdr(skb_in)->saddr = ct->tuplehash[0].tuple.src.u3.ip; -- icmp_send(skb_in, type, code, info); -+ __icmp_send(skb_in, type, code, info, &opts); - ip_hdr(skb_in)->saddr = orig_ip; - out: - consume_skb(cloned_skb); -diff --git a/net/ipv6/icmp.c b/net/ipv6/icmp.c -index f3d05866692e0..fd1f896115c1e 100644 ---- a/net/ipv6/icmp.c -+++ b/net/ipv6/icmp.c -@@ -331,10 +331,9 @@ static int icmpv6_getfrag(void *from, char *to, int offset, int len, int odd, st - } - - #if IS_ENABLED(CONFIG_IPV6_MIP6) --static void mip6_addr_swap(struct sk_buff *skb) -+static void mip6_addr_swap(struct sk_buff *skb, const struct inet6_skb_parm *opt) - { - struct ipv6hdr *iph = ipv6_hdr(skb); -- struct inet6_skb_parm *opt = IP6CB(skb); - struct ipv6_destopt_hao *hao; - struct in6_addr tmp; - int off; -@@ -351,7 +350,7 @@ static void mip6_addr_swap(struct sk_buff *skb) - } - } - #else --static inline void mip6_addr_swap(struct sk_buff *skb) {} -+static inline void mip6_addr_swap(struct sk_buff *skb, const struct inet6_skb_parm *opt) {} - #endif - - static struct dst_entry *icmpv6_route_lookup(struct net *net, -@@ -446,7 +445,8 @@ static int icmp6_iif(const struct sk_buff *skb) - * Send an ICMP message in response to a packet in error - */ - void icmp6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info, -- const struct in6_addr *force_saddr) -+ const struct in6_addr *force_saddr, -+ const struct inet6_skb_parm *parm) - { - struct inet6_dev *idev = NULL; - struct ipv6hdr *hdr = ipv6_hdr(skb); -@@ -542,7 +542,7 @@ void icmp6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info, - if (!(skb->dev->flags & IFF_LOOPBACK) && !icmpv6_global_allow(net, type)) - goto out_bh_enable; - -- mip6_addr_swap(skb); -+ mip6_addr_swap(skb, parm); - - sk = icmpv6_xmit_lock(net); - if (!sk) -@@ -559,7 +559,7 @@ void icmp6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info, - /* select a more meaningful saddr from input if */ - struct net_device *in_netdev; - -- in_netdev = dev_get_by_index(net, IP6CB(skb)->iif); -+ in_netdev = dev_get_by_index(net, parm->iif); - if (in_netdev) { - ipv6_dev_get_saddr(net, in_netdev, &fl6.daddr, - inet6_sk(sk)->srcprefs, -@@ -640,7 +640,7 @@ EXPORT_SYMBOL(icmp6_send); - */ - void icmpv6_param_prob(struct sk_buff *skb, u8 code, int pos) - { -- icmp6_send(skb, ICMPV6_PARAMPROB, code, pos, NULL); -+ icmp6_send(skb, ICMPV6_PARAMPROB, code, pos, NULL, IP6CB(skb)); - kfree_skb(skb); - } - -@@ -697,10 +697,10 @@ int ip6_err_gen_icmpv6_unreach(struct sk_buff *skb, int nhs, int type, - } - if (type == ICMP_TIME_EXCEEDED) - icmp6_send(skb2, ICMPV6_TIME_EXCEED, ICMPV6_EXC_HOPLIMIT, -- info, &temp_saddr); -+ info, &temp_saddr, IP6CB(skb2)); - else - icmp6_send(skb2, ICMPV6_DEST_UNREACH, ICMPV6_ADDR_UNREACH, -- info, &temp_saddr); -+ info, &temp_saddr, IP6CB(skb2)); - if (rt) - ip6_rt_put(rt); - -diff --git a/net/ipv6/ip6_icmp.c b/net/ipv6/ip6_icmp.c -index 70c8c2f36c980..9e3574880cb03 100644 ---- a/net/ipv6/ip6_icmp.c -+++ b/net/ipv6/ip6_icmp.c -@@ -33,23 +33,25 @@ int inet6_unregister_icmp_sender(ip6_icmp_send_t *fn) - } - EXPORT_SYMBOL(inet6_unregister_icmp_sender); - --void icmpv6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info) -+void __icmpv6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info, -+ const struct inet6_skb_parm *parm) - { - ip6_icmp_send_t *send; - - rcu_read_lock(); - send = rcu_dereference(ip6_icmp_send); - if (send) -- send(skb, type, code, info, NULL); -+ send(skb, type, code, info, NULL, parm); - rcu_read_unlock(); - } --EXPORT_SYMBOL(icmpv6_send); -+EXPORT_SYMBOL(__icmpv6_send); - #endif - - #if IS_ENABLED(CONFIG_NF_NAT) - #include - void icmpv6_ndo_send(struct sk_buff *skb_in, u8 type, u8 code, __u32 info) - { -+ struct inet6_skb_parm parm = { 0 }; - struct sk_buff *cloned_skb = NULL; - enum ip_conntrack_info ctinfo; - struct in6_addr orig_ip; -@@ -57,7 +59,7 @@ void icmpv6_ndo_send(struct sk_buff *skb_in, u8 type, u8 code, __u32 info) - - ct = nf_ct_get(skb_in, &ctinfo); - if (!ct || !(ct->status & IPS_SRC_NAT)) { -- icmpv6_send(skb_in, type, code, info); -+ __icmpv6_send(skb_in, type, code, info, &parm); - return; - } - -@@ -72,7 +74,7 @@ void icmpv6_ndo_send(struct sk_buff *skb_in, u8 type, u8 code, __u32 info) - - orig_ip = ipv6_hdr(skb_in)->saddr; - ipv6_hdr(skb_in)->saddr = ct->tuplehash[0].tuple.src.u3.in6; -- icmpv6_send(skb_in, type, code, info); -+ __icmpv6_send(skb_in, type, code, info, &parm); - ipv6_hdr(skb_in)->saddr = orig_ip; - out: - consume_skb(cloned_skb); -diff --git a/net/mac80211/mesh_hwmp.c b/net/mac80211/mesh_hwmp.c -index 313eee12410ec..3db514c4c63ab 100644 ---- a/net/mac80211/mesh_hwmp.c -+++ b/net/mac80211/mesh_hwmp.c -@@ -356,7 +356,7 @@ u32 airtime_link_metric_get(struct ieee80211_local *local, - */ - tx_time = (device_constant + 10 * test_frame_len / rate); - estimated_retx = ((1 << (2 * ARITH_SHIFT)) / (s_unit - err)); -- result = (tx_time * estimated_retx) >> (2 * ARITH_SHIFT); -+ result = ((u64)tx_time * estimated_retx) >> (2 * ARITH_SHIFT); - return (u32)result; - } - -diff --git a/net/nfc/nci/uart.c b/net/nfc/nci/uart.c -index 11b554ce07ffc..1204c438e87dc 100644 ---- a/net/nfc/nci/uart.c -+++ b/net/nfc/nci/uart.c -@@ -292,7 +292,8 @@ static int nci_uart_tty_ioctl(struct tty_struct *tty, struct file *file, - - /* We don't provide read/write/poll interface for user space. */ - static ssize_t nci_uart_tty_read(struct tty_struct *tty, struct file *file, -- unsigned char __user *buf, size_t nr) -+ unsigned char *buf, size_t nr, -+ void **cookie, unsigned long offset) - { - return 0; - } -diff --git a/net/qrtr/tun.c b/net/qrtr/tun.c -index b238c40a99842..304b41fea5ab0 100644 ---- a/net/qrtr/tun.c -+++ b/net/qrtr/tun.c -@@ -31,6 +31,7 @@ static int qrtr_tun_send(struct qrtr_endpoint *ep, struct sk_buff *skb) - static int qrtr_tun_open(struct inode *inode, struct file *filp) - { - struct qrtr_tun *tun; -+ int ret; - - tun = kzalloc(sizeof(*tun), GFP_KERNEL); - if (!tun) -@@ -43,7 +44,16 @@ static int qrtr_tun_open(struct inode *inode, struct file *filp) - - filp->private_data = tun; - -- return qrtr_endpoint_register(&tun->ep, QRTR_EP_NID_AUTO); -+ ret = qrtr_endpoint_register(&tun->ep, QRTR_EP_NID_AUTO); -+ if (ret) -+ goto out; -+ -+ return 0; -+ -+out: -+ filp->private_data = NULL; -+ kfree(tun); -+ return ret; - } - - static ssize_t qrtr_tun_read_iter(struct kiocb *iocb, struct iov_iter *to) -diff --git a/net/sched/act_api.c b/net/sched/act_api.c -index 2e85b636b27bd..b919826939e0b 100644 ---- a/net/sched/act_api.c -+++ b/net/sched/act_api.c -@@ -908,7 +908,7 @@ static const struct nla_policy tcf_action_policy[TCA_ACT_MAX + 1] = { - [TCA_ACT_HW_STATS] = NLA_POLICY_BITFIELD32(TCA_ACT_HW_STATS_ANY), - }; - --static void tcf_idr_insert_many(struct tc_action *actions[]) -+void tcf_idr_insert_many(struct tc_action *actions[]) - { - int i; - -@@ -928,19 +928,13 @@ static void tcf_idr_insert_many(struct tc_action *actions[]) - } - } - --struct tc_action *tcf_action_init_1(struct net *net, struct tcf_proto *tp, -- struct nlattr *nla, struct nlattr *est, -- char *name, int ovr, int bind, -- bool rtnl_held, -- struct netlink_ext_ack *extack) -+struct tc_action_ops *tc_action_load_ops(char *name, struct nlattr *nla, -+ bool rtnl_held, -+ struct netlink_ext_ack *extack) - { -- struct nla_bitfield32 flags = { 0, 0 }; -- u8 hw_stats = TCA_ACT_HW_STATS_ANY; -- struct tc_action *a; -+ struct nlattr *tb[TCA_ACT_MAX + 1]; - struct tc_action_ops *a_o; -- struct tc_cookie *cookie = NULL; - char act_name[IFNAMSIZ]; -- struct nlattr *tb[TCA_ACT_MAX + 1]; - struct nlattr *kind; - int err; - -@@ -948,33 +942,21 @@ struct tc_action *tcf_action_init_1(struct net *net, struct tcf_proto *tp, - err = nla_parse_nested_deprecated(tb, TCA_ACT_MAX, nla, - tcf_action_policy, extack); - if (err < 0) -- goto err_out; -+ return ERR_PTR(err); - err = -EINVAL; - kind = tb[TCA_ACT_KIND]; - if (!kind) { - NL_SET_ERR_MSG(extack, "TC action kind must be specified"); -- goto err_out; -+ return ERR_PTR(err); - } - if (nla_strscpy(act_name, kind, IFNAMSIZ) < 0) { - NL_SET_ERR_MSG(extack, "TC action name too long"); -- goto err_out; -- } -- if (tb[TCA_ACT_COOKIE]) { -- cookie = nla_memdup_cookie(tb); -- if (!cookie) { -- NL_SET_ERR_MSG(extack, "No memory to generate TC cookie"); -- err = -ENOMEM; -- goto err_out; -- } -+ return ERR_PTR(err); - } -- hw_stats = tcf_action_hw_stats_get(tb[TCA_ACT_HW_STATS]); -- if (tb[TCA_ACT_FLAGS]) -- flags = nla_get_bitfield32(tb[TCA_ACT_FLAGS]); - } else { - if (strlcpy(act_name, name, IFNAMSIZ) >= IFNAMSIZ) { - NL_SET_ERR_MSG(extack, "TC action name too long"); -- err = -EINVAL; -- goto err_out; -+ return ERR_PTR(-EINVAL); - } - } - -@@ -996,24 +978,56 @@ struct tc_action *tcf_action_init_1(struct net *net, struct tcf_proto *tp, - * indicate this using -EAGAIN. - */ - if (a_o != NULL) { -- err = -EAGAIN; -- goto err_mod; -+ module_put(a_o->owner); -+ return ERR_PTR(-EAGAIN); - } - #endif - NL_SET_ERR_MSG(extack, "Failed to load TC action module"); -- err = -ENOENT; -- goto err_free; -+ return ERR_PTR(-ENOENT); - } - -+ return a_o; -+} -+ -+struct tc_action *tcf_action_init_1(struct net *net, struct tcf_proto *tp, -+ struct nlattr *nla, struct nlattr *est, -+ char *name, int ovr, int bind, -+ struct tc_action_ops *a_o, bool rtnl_held, -+ struct netlink_ext_ack *extack) -+{ -+ struct nla_bitfield32 flags = { 0, 0 }; -+ u8 hw_stats = TCA_ACT_HW_STATS_ANY; -+ struct nlattr *tb[TCA_ACT_MAX + 1]; -+ struct tc_cookie *cookie = NULL; -+ struct tc_action *a; -+ int err; -+ - /* backward compatibility for policer */ -- if (name == NULL) -+ if (name == NULL) { -+ err = nla_parse_nested_deprecated(tb, TCA_ACT_MAX, nla, -+ tcf_action_policy, extack); -+ if (err < 0) -+ return ERR_PTR(err); -+ if (tb[TCA_ACT_COOKIE]) { -+ cookie = nla_memdup_cookie(tb); -+ if (!cookie) { -+ NL_SET_ERR_MSG(extack, "No memory to generate TC cookie"); -+ err = -ENOMEM; -+ goto err_out; -+ } -+ } -+ hw_stats = tcf_action_hw_stats_get(tb[TCA_ACT_HW_STATS]); -+ if (tb[TCA_ACT_FLAGS]) -+ flags = nla_get_bitfield32(tb[TCA_ACT_FLAGS]); -+ - err = a_o->init(net, tb[TCA_ACT_OPTIONS], est, &a, ovr, bind, - rtnl_held, tp, flags.value, extack); -- else -+ } else { - err = a_o->init(net, nla, est, &a, ovr, bind, rtnl_held, - tp, flags.value, extack); -+ } - if (err < 0) -- goto err_mod; -+ goto err_out; - - if (!name && tb[TCA_ACT_COOKIE]) - tcf_set_action_cookie(&a->act_cookie, cookie); -@@ -1030,14 +1044,11 @@ struct tc_action *tcf_action_init_1(struct net *net, struct tcf_proto *tp, - - return a; - --err_mod: -- module_put(a_o->owner); --err_free: -+err_out: - if (cookie) { - kfree(cookie->data); - kfree(cookie); - } --err_out: - return ERR_PTR(err); - } - -@@ -1048,6 +1059,7 @@ int tcf_action_init(struct net *net, struct tcf_proto *tp, struct nlattr *nla, - struct tc_action *actions[], size_t *attr_size, - bool rtnl_held, struct netlink_ext_ack *extack) - { -+ struct tc_action_ops *ops[TCA_ACT_MAX_PRIO] = {}; - struct nlattr *tb[TCA_ACT_MAX_PRIO + 1]; - struct tc_action *act; - size_t sz = 0; -@@ -1059,9 +1071,20 @@ int tcf_action_init(struct net *net, struct tcf_proto *tp, struct nlattr *nla, - if (err < 0) - return err; - -+ for (i = 1; i <= TCA_ACT_MAX_PRIO && tb[i]; i++) { -+ struct tc_action_ops *a_o; -+ -+ a_o = tc_action_load_ops(name, tb[i], rtnl_held, extack); -+ if (IS_ERR(a_o)) { -+ err = PTR_ERR(a_o); -+ goto err_mod; -+ } -+ ops[i - 1] = a_o; -+ } -+ - for (i = 1; i <= TCA_ACT_MAX_PRIO && tb[i]; i++) { - act = tcf_action_init_1(net, tp, tb[i], est, name, ovr, bind, -- rtnl_held, extack); -+ ops[i - 1], rtnl_held, extack); - if (IS_ERR(act)) { - err = PTR_ERR(act); - goto err; -@@ -1081,6 +1104,11 @@ int tcf_action_init(struct net *net, struct tcf_proto *tp, struct nlattr *nla, - - err: - tcf_action_destroy(actions, bind); -+err_mod: -+ for (i = 0; i < TCA_ACT_MAX_PRIO; i++) { -+ if (ops[i]) -+ module_put(ops[i]->owner); -+ } - return err; - } - -diff --git a/net/sched/cls_api.c b/net/sched/cls_api.c -index 37b77bd309746..e37556cc37ab6 100644 ---- a/net/sched/cls_api.c -+++ b/net/sched/cls_api.c -@@ -3043,16 +3043,24 @@ int tcf_exts_validate(struct net *net, struct tcf_proto *tp, struct nlattr **tb, - size_t attr_size = 0; - - if (exts->police && tb[exts->police]) { -+ struct tc_action_ops *a_o; -+ -+ a_o = tc_action_load_ops("police", tb[exts->police], rtnl_held, extack); -+ if (IS_ERR(a_o)) -+ return PTR_ERR(a_o); - act = tcf_action_init_1(net, tp, tb[exts->police], - rate_tlv, "police", ovr, -- TCA_ACT_BIND, rtnl_held, -+ TCA_ACT_BIND, a_o, rtnl_held, - extack); -- if (IS_ERR(act)) -+ if (IS_ERR(act)) { -+ module_put(a_o->owner); - return PTR_ERR(act); -+ } - - act->type = exts->type = TCA_OLD_COMPAT; - exts->actions[0] = act; - exts->nr_actions = 1; -+ tcf_idr_insert_many(exts->actions); - } else if (exts->action && tb[exts->action]) { - int err; - -diff --git a/net/sunrpc/xprtrdma/svc_rdma_transport.c b/net/sunrpc/xprtrdma/svc_rdma_transport.c -index afba4e9d5425d..c895f80df659c 100644 ---- a/net/sunrpc/xprtrdma/svc_rdma_transport.c -+++ b/net/sunrpc/xprtrdma/svc_rdma_transport.c -@@ -475,9 +475,6 @@ static struct svc_xprt *svc_rdma_accept(struct svc_xprt *xprt) - if (!svc_rdma_post_recvs(newxprt)) - goto errout; - -- /* Swap out the handler */ -- newxprt->sc_cm_id->event_handler = svc_rdma_cma_handler; -- - /* Construct RDMA-CM private message */ - pmsg.cp_magic = rpcrdma_cmp_magic; - pmsg.cp_version = RPCRDMA_CMP_VERSION; -@@ -498,7 +495,10 @@ static struct svc_xprt *svc_rdma_accept(struct svc_xprt *xprt) - } - conn_param.private_data = &pmsg; - conn_param.private_data_len = sizeof(pmsg); -+ rdma_lock_handler(newxprt->sc_cm_id); -+ newxprt->sc_cm_id->event_handler = svc_rdma_cma_handler; - ret = rdma_accept(newxprt->sc_cm_id, &conn_param); -+ rdma_unlock_handler(newxprt->sc_cm_id); - if (ret) { - trace_svcrdma_accept_err(newxprt, ret); - goto errout; -diff --git a/samples/Kconfig b/samples/Kconfig -index 0ed6e4d71d87b..e76cdfc50e257 100644 ---- a/samples/Kconfig -+++ b/samples/Kconfig -@@ -210,7 +210,7 @@ config SAMPLE_WATCHDOG - depends on CC_CAN_LINK - - config SAMPLE_WATCH_QUEUE -- bool "Build example /dev/watch_queue notification consumer" -+ bool "Build example watch_queue notification API consumer" - depends on CC_CAN_LINK && HEADERS_INSTALL - help - Build example userspace program to use the new mount_notify(), -diff --git a/samples/watch_queue/watch_test.c b/samples/watch_queue/watch_test.c -index 46e618a897fef..8c6cb57d5cfc5 100644 ---- a/samples/watch_queue/watch_test.c -+++ b/samples/watch_queue/watch_test.c -@@ -1,5 +1,5 @@ - // SPDX-License-Identifier: GPL-2.0 --/* Use /dev/watch_queue to watch for notifications. -+/* Use watch_queue API to watch for notifications. - * - * Copyright (C) 2020 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) -diff --git a/security/commoncap.c b/security/commoncap.c -index 26c1cb725dcbe..78598be45f101 100644 ---- a/security/commoncap.c -+++ b/security/commoncap.c -@@ -500,7 +500,8 @@ int cap_convert_nscap(struct dentry *dentry, const void **ivalue, size_t size) - __u32 magic, nsmagic; - struct inode *inode = d_backing_inode(dentry); - struct user_namespace *task_ns = current_user_ns(), -- *fs_ns = inode->i_sb->s_user_ns; -+ *fs_ns = inode->i_sb->s_user_ns, -+ *ancestor; - kuid_t rootid; - size_t newsize; - -@@ -523,6 +524,15 @@ int cap_convert_nscap(struct dentry *dentry, const void **ivalue, size_t size) - if (nsrootid == -1) - return -EINVAL; - -+ /* -+ * Do not allow allow adding a v3 filesystem capability xattr -+ * if the rootid field is ambiguous. -+ */ -+ for (ancestor = task_ns->parent; ancestor; ancestor = ancestor->parent) { -+ if (from_kuid(ancestor, rootid) == 0) -+ return -EINVAL; -+ } -+ - newsize = sizeof(struct vfs_ns_cap_data); - nscap = kmalloc(newsize, GFP_ATOMIC); - if (!nscap) -diff --git a/security/integrity/evm/evm_crypto.c b/security/integrity/evm/evm_crypto.c -index 168c3b78ac47b..a6dd47eb086da 100644 ---- a/security/integrity/evm/evm_crypto.c -+++ b/security/integrity/evm/evm_crypto.c -@@ -73,7 +73,7 @@ static struct shash_desc *init_desc(char type, uint8_t hash_algo) - { - long rc; - const char *algo; -- struct crypto_shash **tfm, *tmp_tfm; -+ struct crypto_shash **tfm, *tmp_tfm = NULL; - struct shash_desc *desc; - - if (type == EVM_XATTR_HMAC) { -@@ -118,13 +118,16 @@ unlock: - alloc: - desc = kmalloc(sizeof(*desc) + crypto_shash_descsize(*tfm), - GFP_KERNEL); -- if (!desc) -+ if (!desc) { -+ crypto_free_shash(tmp_tfm); - return ERR_PTR(-ENOMEM); -+ } - - desc->tfm = *tfm; - - rc = crypto_shash_init(desc); - if (rc) { -+ crypto_free_shash(tmp_tfm); - kfree(desc); - return ERR_PTR(rc); - } -diff --git a/security/integrity/ima/ima_kexec.c b/security/integrity/ima/ima_kexec.c -index 121de3e04af23..e29bea3dd4ccd 100644 ---- a/security/integrity/ima/ima_kexec.c -+++ b/security/integrity/ima/ima_kexec.c -@@ -119,6 +119,7 @@ void ima_add_kexec_buffer(struct kimage *image) - ret = kexec_add_buffer(&kbuf); - if (ret) { - pr_err("Error passing over kexec measurement buffer.\n"); -+ vfree(kexec_buffer); - return; - } - -@@ -128,6 +129,8 @@ void ima_add_kexec_buffer(struct kimage *image) - return; - } - -+ image->ima_buffer = kexec_buffer; -+ - pr_debug("kexec measurement buffer for the loaded kernel at 0x%lx.\n", - kbuf.mem); - } -diff --git a/security/integrity/ima/ima_mok.c b/security/integrity/ima/ima_mok.c -index 36cadadbfba47..1e5c019161738 100644 ---- a/security/integrity/ima/ima_mok.c -+++ b/security/integrity/ima/ima_mok.c -@@ -38,13 +38,12 @@ __init int ima_mok_init(void) - (KEY_POS_ALL & ~KEY_POS_SETATTR) | - KEY_USR_VIEW | KEY_USR_READ | - KEY_USR_WRITE | KEY_USR_SEARCH, -- KEY_ALLOC_NOT_IN_QUOTA, -+ KEY_ALLOC_NOT_IN_QUOTA | -+ KEY_ALLOC_SET_KEEP, - restriction, NULL); - - if (IS_ERR(ima_blacklist_keyring)) - panic("Can't allocate IMA blacklist keyring."); -- -- set_bit(KEY_FLAG_KEEP, &ima_blacklist_keyring->flags); - return 0; - } - device_initcall(ima_mok_init); -diff --git a/security/keys/Kconfig b/security/keys/Kconfig -index 83bc23409164a..c161642a84841 100644 ---- a/security/keys/Kconfig -+++ b/security/keys/Kconfig -@@ -119,7 +119,7 @@ config KEY_NOTIFICATIONS - bool "Provide key/keyring change notifications" - depends on KEYS && WATCH_QUEUE - help -- This option provides support for getting change notifications on keys -- and keyrings on which the caller has View permission. This makes use -- of the /dev/watch_queue misc device to handle the notification -- buffer and provides KEYCTL_WATCH_KEY to enable/disable watches. -+ This option provides support for getting change notifications -+ on keys and keyrings on which the caller has View permission. -+ This makes use of pipes to handle the notification buffer and -+ provides KEYCTL_WATCH_KEY to enable/disable watches. -diff --git a/security/keys/key.c b/security/keys/key.c -index ebe752b137aa1..c45afdd1dfbb4 100644 ---- a/security/keys/key.c -+++ b/security/keys/key.c -@@ -303,6 +303,8 @@ struct key *key_alloc(struct key_type *type, const char *desc, - key->flags |= 1 << KEY_FLAG_BUILTIN; - if (flags & KEY_ALLOC_UID_KEYRING) - key->flags |= 1 << KEY_FLAG_UID_KEYRING; -+ if (flags & KEY_ALLOC_SET_KEEP) -+ key->flags |= 1 << KEY_FLAG_KEEP; - - #ifdef KEY_DEBUGGING - key->magic = KEY_DEBUG_MAGIC; -diff --git a/security/keys/trusted-keys/trusted_tpm1.c b/security/keys/trusted-keys/trusted_tpm1.c -index 74d82093cbaa9..493eb91ed017f 100644 ---- a/security/keys/trusted-keys/trusted_tpm1.c -+++ b/security/keys/trusted-keys/trusted_tpm1.c -@@ -403,9 +403,12 @@ static int osap(struct tpm_buf *tb, struct osapsess *s, - int ret; - - ret = tpm_get_random(chip, ononce, TPM_NONCE_SIZE); -- if (ret != TPM_NONCE_SIZE) -+ if (ret < 0) - return ret; - -+ if (ret != TPM_NONCE_SIZE) -+ return -EIO; -+ - tpm_buf_reset(tb, TPM_TAG_RQU_COMMAND, TPM_ORD_OSAP); - tpm_buf_append_u16(tb, type); - tpm_buf_append_u32(tb, handle); -@@ -496,8 +499,12 @@ static int tpm_seal(struct tpm_buf *tb, uint16_t keytype, - goto out; - - ret = tpm_get_random(chip, td->nonceodd, TPM_NONCE_SIZE); -+ if (ret < 0) -+ return ret; -+ - if (ret != TPM_NONCE_SIZE) -- goto out; -+ return -EIO; -+ - ordinal = htonl(TPM_ORD_SEAL); - datsize = htonl(datalen); - pcrsize = htonl(pcrinfosize); -@@ -601,9 +608,12 @@ static int tpm_unseal(struct tpm_buf *tb, - - ordinal = htonl(TPM_ORD_UNSEAL); - ret = tpm_get_random(chip, nonceodd, TPM_NONCE_SIZE); -+ if (ret < 0) -+ return ret; -+ - if (ret != TPM_NONCE_SIZE) { - pr_info("trusted_key: tpm_get_random failed (%d)\n", ret); -- return ret; -+ return -EIO; - } - ret = TSS_authhmac(authdata1, keyauth, TPM_NONCE_SIZE, - enonce1, nonceodd, cont, sizeof(uint32_t), -@@ -791,7 +801,7 @@ static int getoptions(char *c, struct trusted_key_payload *pay, - case Opt_migratable: - if (*args[0].from == '0') - pay->migratable = 0; -- else -+ else if (*args[0].from != '1') - return -EINVAL; - break; - case Opt_pcrlock: -@@ -1013,8 +1023,12 @@ static int trusted_instantiate(struct key *key, - case Opt_new: - key_len = payload->key_len; - ret = tpm_get_random(chip, payload->key, key_len); -+ if (ret < 0) -+ goto out; -+ - if (ret != key_len) { - pr_info("trusted_key: key_create failed (%d)\n", ret); -+ ret = -EIO; - goto out; - } - if (tpm2) -diff --git a/security/keys/trusted-keys/trusted_tpm2.c b/security/keys/trusted-keys/trusted_tpm2.c -index 08ec7f48f01d0..e2a0ed5d02f01 100644 ---- a/security/keys/trusted-keys/trusted_tpm2.c -+++ b/security/keys/trusted-keys/trusted_tpm2.c -@@ -83,6 +83,12 @@ int tpm2_seal_trusted(struct tpm_chip *chip, - if (rc) - return rc; - -+ rc = tpm_buf_init(&buf, TPM2_ST_SESSIONS, TPM2_CC_CREATE); -+ if (rc) { -+ tpm_put_ops(chip); -+ return rc; -+ } -+ - tpm_buf_append_u32(&buf, options->keyhandle); - tpm2_buf_append_auth(&buf, TPM2_RS_PW, - NULL /* nonce */, 0, -@@ -130,7 +136,7 @@ int tpm2_seal_trusted(struct tpm_chip *chip, - goto out; - } - -- rc = tpm_send(chip, buf.data, tpm_buf_length(&buf)); -+ rc = tpm_transmit_cmd(chip, &buf, 4, "sealing data"); - if (rc) - goto out; - -@@ -157,6 +163,7 @@ out: - rc = -EPERM; - } - -+ tpm_put_ops(chip); - return rc; - } - -@@ -211,7 +218,7 @@ static int tpm2_load_cmd(struct tpm_chip *chip, - goto out; - } - -- rc = tpm_send(chip, buf.data, tpm_buf_length(&buf)); -+ rc = tpm_transmit_cmd(chip, &buf, 4, "loading blob"); - if (!rc) - *blob_handle = be32_to_cpup( - (__be32 *) &buf.data[TPM_HEADER_SIZE]); -@@ -260,7 +267,7 @@ static int tpm2_unseal_cmd(struct tpm_chip *chip, - options->blobauth /* hmac */, - TPM_DIGEST_SIZE); - -- rc = tpm_send(chip, buf.data, tpm_buf_length(&buf)); -+ rc = tpm_transmit_cmd(chip, &buf, 6, "unsealing"); - if (rc > 0) - rc = -EPERM; - -@@ -304,12 +311,19 @@ int tpm2_unseal_trusted(struct tpm_chip *chip, - u32 blob_handle; - int rc; - -- rc = tpm2_load_cmd(chip, payload, options, &blob_handle); -+ rc = tpm_try_get_ops(chip); - if (rc) - return rc; - -+ rc = tpm2_load_cmd(chip, payload, options, &blob_handle); -+ if (rc) -+ goto out; -+ - rc = tpm2_unseal_cmd(chip, payload, options, blob_handle); - tpm2_flush_context(chip, blob_handle); - -+out: -+ tpm_put_ops(chip); -+ - return rc; - } -diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c -index 644b17ec9e63a..95a3c1eda9e4a 100644 ---- a/security/selinux/hooks.c -+++ b/security/selinux/hooks.c -@@ -3413,6 +3413,10 @@ static int selinux_inode_setsecurity(struct inode *inode, const char *name, - static int selinux_inode_listsecurity(struct inode *inode, char *buffer, size_t buffer_size) - { - const int len = sizeof(XATTR_NAME_SELINUX); -+ -+ if (!selinux_initialized(&selinux_state)) -+ return 0; -+ - if (buffer && len <= buffer_size) - memcpy(buffer, XATTR_NAME_SELINUX, len); - return len; -diff --git a/sound/core/init.c b/sound/core/init.c -index 75aec71c48a86..cc8208df26f39 100644 ---- a/sound/core/init.c -+++ b/sound/core/init.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -416,6 +417,9 @@ int snd_card_disconnect(struct snd_card *card) - /* notify all devices that we are disconnected */ - snd_device_disconnect_all(card); - -+ if (card->sync_irq > 0) -+ synchronize_irq(card->sync_irq); -+ - snd_info_card_disconnect(card); - if (card->registered) { - device_del(&card->card_dev); -diff --git a/sound/core/pcm.c b/sound/core/pcm.c -index be5714f1bb58c..41cbdac5b1cfa 100644 ---- a/sound/core/pcm.c -+++ b/sound/core/pcm.c -@@ -1111,6 +1111,10 @@ static int snd_pcm_dev_disconnect(struct snd_device *device) - } - } - -+ for (cidx = 0; cidx < 2; cidx++) -+ for (substream = pcm->streams[cidx].substream; substream; substream = substream->next) -+ snd_pcm_sync_stop(substream, false); -+ - pcm_call_notify(pcm, n_disconnect); - for (cidx = 0; cidx < 2; cidx++) { - snd_unregister_device(&pcm->streams[cidx].dev); -diff --git a/sound/core/pcm_local.h b/sound/core/pcm_local.h -index 17a1a5d870980..b3e8be5aeafb3 100644 ---- a/sound/core/pcm_local.h -+++ b/sound/core/pcm_local.h -@@ -63,6 +63,7 @@ static inline void snd_pcm_timer_done(struct snd_pcm_substream *substream) {} - - void __snd_pcm_xrun(struct snd_pcm_substream *substream); - void snd_pcm_group_init(struct snd_pcm_group *group); -+void snd_pcm_sync_stop(struct snd_pcm_substream *substream, bool sync_irq); - - #ifdef CONFIG_SND_DMA_SGBUF - struct page *snd_pcm_sgbuf_ops_page(struct snd_pcm_substream *substream, -diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c -index c4aac703dc224..c6f65ee8142d6 100644 ---- a/sound/core/pcm_native.c -+++ b/sound/core/pcm_native.c -@@ -583,13 +583,13 @@ static inline void snd_pcm_timer_notify(struct snd_pcm_substream *substream, - #endif - } - --static void snd_pcm_sync_stop(struct snd_pcm_substream *substream) -+void snd_pcm_sync_stop(struct snd_pcm_substream *substream, bool sync_irq) - { -- if (substream->runtime->stop_operating) { -+ if (substream->runtime && substream->runtime->stop_operating) { - substream->runtime->stop_operating = false; -- if (substream->ops->sync_stop) -+ if (substream->ops && substream->ops->sync_stop) - substream->ops->sync_stop(substream); -- else if (substream->pcm->card->sync_irq > 0) -+ else if (sync_irq && substream->pcm->card->sync_irq > 0) - synchronize_irq(substream->pcm->card->sync_irq); - } - } -@@ -686,7 +686,7 @@ static int snd_pcm_hw_params(struct snd_pcm_substream *substream, - if (atomic_read(&substream->mmap_count)) - return -EBADFD; - -- snd_pcm_sync_stop(substream); -+ snd_pcm_sync_stop(substream, true); - - params->rmask = ~0U; - err = snd_pcm_hw_refine(substream, params); -@@ -809,7 +809,7 @@ static int do_hw_free(struct snd_pcm_substream *substream) - { - int result = 0; - -- snd_pcm_sync_stop(substream); -+ snd_pcm_sync_stop(substream, true); - if (substream->ops->hw_free) - result = substream->ops->hw_free(substream); - if (substream->managed_buffer_alloc) -@@ -1421,8 +1421,10 @@ static int snd_pcm_do_stop(struct snd_pcm_substream *substream, - snd_pcm_state_t state) - { - if (substream->runtime->trigger_master == substream && -- snd_pcm_running(substream)) -+ snd_pcm_running(substream)) { - substream->ops->trigger(substream, SNDRV_PCM_TRIGGER_STOP); -+ substream->runtime->stop_operating = true; -+ } - return 0; /* unconditonally stop all substreams */ - } - -@@ -1435,7 +1437,6 @@ static void snd_pcm_post_stop(struct snd_pcm_substream *substream, - runtime->status->state = state; - snd_pcm_timer_notify(substream, SNDRV_TIMER_EVENT_MSTOP); - } -- runtime->stop_operating = true; - wake_up(&runtime->sleep); - wake_up(&runtime->tsleep); - } -@@ -1615,6 +1616,7 @@ static int snd_pcm_do_suspend(struct snd_pcm_substream *substream, - if (! snd_pcm_running(substream)) - return 0; - substream->ops->trigger(substream, SNDRV_PCM_TRIGGER_SUSPEND); -+ runtime->stop_operating = true; - return 0; /* suspend unconditionally */ - } - -@@ -1691,6 +1693,12 @@ int snd_pcm_suspend_all(struct snd_pcm *pcm) - return err; - } - } -+ -+ for (stream = 0; stream < 2; stream++) -+ for (substream = pcm->streams[stream].substream; -+ substream; substream = substream->next) -+ snd_pcm_sync_stop(substream, false); -+ - return 0; - } - EXPORT_SYMBOL(snd_pcm_suspend_all); -@@ -1736,7 +1744,6 @@ static void snd_pcm_post_resume(struct snd_pcm_substream *substream, - snd_pcm_trigger_tstamp(substream); - runtime->status->state = runtime->status->suspended_state; - snd_pcm_timer_notify(substream, SNDRV_TIMER_EVENT_MRESUME); -- snd_pcm_sync_stop(substream); - } - - static const struct action_ops snd_pcm_action_resume = { -@@ -1866,7 +1873,7 @@ static int snd_pcm_do_prepare(struct snd_pcm_substream *substream, - snd_pcm_state_t state) - { - int err; -- snd_pcm_sync_stop(substream); -+ snd_pcm_sync_stop(substream, true); - err = substream->ops->prepare(substream); - if (err < 0) - return err; -diff --git a/sound/firewire/fireface/ff-protocol-latter.c b/sound/firewire/fireface/ff-protocol-latter.c -index 8d3b23778eb26..7ddb7b97f02db 100644 ---- a/sound/firewire/fireface/ff-protocol-latter.c -+++ b/sound/firewire/fireface/ff-protocol-latter.c -@@ -15,6 +15,61 @@ - #define LATTER_FETCH_MODE 0xffff00000010ULL - #define LATTER_SYNC_STATUS 0x0000801c0000ULL - -+// The content of sync status register differs between models. -+// -+// Fireface UCX: -+// 0xf0000000: (unidentified) -+// 0x0f000000: effective rate of sampling clock -+// 0x00f00000: detected rate of word clock on BNC interface -+// 0x000f0000: detected rate of ADAT or S/PDIF on optical interface -+// 0x0000f000: detected rate of S/PDIF on coaxial interface -+// 0x00000e00: effective source of sampling clock -+// 0x00000e00: Internal -+// 0x00000800: (unidentified) -+// 0x00000600: Word clock on BNC interface -+// 0x00000400: ADAT on optical interface -+// 0x00000200: S/PDIF on coaxial or optical interface -+// 0x00000100: Optical interface is used for ADAT signal -+// 0x00000080: (unidentified) -+// 0x00000040: Synchronized to word clock on BNC interface -+// 0x00000020: Synchronized to ADAT or S/PDIF on optical interface -+// 0x00000010: Synchronized to S/PDIF on coaxial interface -+// 0x00000008: (unidentified) -+// 0x00000004: Lock word clock on BNC interface -+// 0x00000002: Lock ADAT or S/PDIF on optical interface -+// 0x00000001: Lock S/PDIF on coaxial interface -+// -+// Fireface 802 (and perhaps UFX): -+// 0xf0000000: effective rate of sampling clock -+// 0x0f000000: detected rate of ADAT-B on 2nd optical interface -+// 0x00f00000: detected rate of ADAT-A on 1st optical interface -+// 0x000f0000: detected rate of AES/EBU on XLR or coaxial interface -+// 0x0000f000: detected rate of word clock on BNC interface -+// 0x00000e00: effective source of sampling clock -+// 0x00000e00: internal -+// 0x00000800: ADAT-B -+// 0x00000600: ADAT-A -+// 0x00000400: AES/EBU -+// 0x00000200: Word clock -+// 0x00000080: Synchronized to ADAT-B on 2nd optical interface -+// 0x00000040: Synchronized to ADAT-A on 1st optical interface -+// 0x00000020: Synchronized to AES/EBU on XLR or 2nd optical interface -+// 0x00000010: Synchronized to word clock on BNC interface -+// 0x00000008: Lock ADAT-B on 2nd optical interface -+// 0x00000004: Lock ADAT-A on 1st optical interface -+// 0x00000002: Lock AES/EBU on XLR or 2nd optical interface -+// 0x00000001: Lock word clock on BNC interface -+// -+// The pattern for rate bits: -+// 0x00: 32.0 kHz -+// 0x01: 44.1 kHz -+// 0x02: 48.0 kHz -+// 0x04: 64.0 kHz -+// 0x05: 88.2 kHz -+// 0x06: 96.0 kHz -+// 0x08: 128.0 kHz -+// 0x09: 176.4 kHz -+// 0x0a: 192.0 kHz - static int parse_clock_bits(u32 data, unsigned int *rate, - enum snd_ff_clock_src *src, - enum snd_ff_unit_version unit_version) -@@ -23,35 +78,48 @@ static int parse_clock_bits(u32 data, unsigned int *rate, - unsigned int rate; - u32 flag; - } *rate_entry, rate_entries[] = { -- { 32000, 0x00000000, }, -- { 44100, 0x01000000, }, -- { 48000, 0x02000000, }, -- { 64000, 0x04000000, }, -- { 88200, 0x05000000, }, -- { 96000, 0x06000000, }, -- { 128000, 0x08000000, }, -- { 176400, 0x09000000, }, -- { 192000, 0x0a000000, }, -+ { 32000, 0x00, }, -+ { 44100, 0x01, }, -+ { 48000, 0x02, }, -+ { 64000, 0x04, }, -+ { 88200, 0x05, }, -+ { 96000, 0x06, }, -+ { 128000, 0x08, }, -+ { 176400, 0x09, }, -+ { 192000, 0x0a, }, - }; - static const struct { - enum snd_ff_clock_src src; - u32 flag; -- } *clk_entry, clk_entries[] = { -+ } *clk_entry, *clk_entries, ucx_clk_entries[] = { - { SND_FF_CLOCK_SRC_SPDIF, 0x00000200, }, - { SND_FF_CLOCK_SRC_ADAT1, 0x00000400, }, - { SND_FF_CLOCK_SRC_WORD, 0x00000600, }, - { SND_FF_CLOCK_SRC_INTERNAL, 0x00000e00, }, -+ }, ufx_ff802_clk_entries[] = { -+ { SND_FF_CLOCK_SRC_WORD, 0x00000200, }, -+ { SND_FF_CLOCK_SRC_SPDIF, 0x00000400, }, -+ { SND_FF_CLOCK_SRC_ADAT1, 0x00000600, }, -+ { SND_FF_CLOCK_SRC_ADAT2, 0x00000800, }, -+ { SND_FF_CLOCK_SRC_INTERNAL, 0x00000e00, }, - }; -+ u32 rate_bits; -+ unsigned int clk_entry_count; - int i; - -- if (unit_version != SND_FF_UNIT_VERSION_UCX) { -- // e.g. 0x00fe0f20 but expected 0x00eff002. -- data = ((data & 0xf0f0f0f0) >> 4) | ((data & 0x0f0f0f0f) << 4); -+ if (unit_version == SND_FF_UNIT_VERSION_UCX) { -+ rate_bits = (data & 0x0f000000) >> 24; -+ clk_entries = ucx_clk_entries; -+ clk_entry_count = ARRAY_SIZE(ucx_clk_entries); -+ } else { -+ rate_bits = (data & 0xf0000000) >> 28; -+ clk_entries = ufx_ff802_clk_entries; -+ clk_entry_count = ARRAY_SIZE(ufx_ff802_clk_entries); - } - - for (i = 0; i < ARRAY_SIZE(rate_entries); ++i) { - rate_entry = rate_entries + i; -- if ((data & 0x0f000000) == rate_entry->flag) { -+ if (rate_bits == rate_entry->flag) { - *rate = rate_entry->rate; - break; - } -@@ -59,14 +127,14 @@ static int parse_clock_bits(u32 data, unsigned int *rate, - if (i == ARRAY_SIZE(rate_entries)) - return -EIO; - -- for (i = 0; i < ARRAY_SIZE(clk_entries); ++i) { -+ for (i = 0; i < clk_entry_count; ++i) { - clk_entry = clk_entries + i; - if ((data & 0x000e00) == clk_entry->flag) { - *src = clk_entry->src; - break; - } - } -- if (i == ARRAY_SIZE(clk_entries)) -+ if (i == clk_entry_count) - return -EIO; - - return 0; -@@ -249,16 +317,22 @@ static void latter_dump_status(struct snd_ff *ff, struct snd_info_buffer *buffer - char *const label; - u32 locked_mask; - u32 synced_mask; -- } *clk_entry, clk_entries[] = { -+ } *clk_entry, *clk_entries, ucx_clk_entries[] = { - { "S/PDIF", 0x00000001, 0x00000010, }, - { "ADAT", 0x00000002, 0x00000020, }, - { "WDClk", 0x00000004, 0x00000040, }, -+ }, ufx_ff802_clk_entries[] = { -+ { "WDClk", 0x00000001, 0x00000010, }, -+ { "AES/EBU", 0x00000002, 0x00000020, }, -+ { "ADAT-A", 0x00000004, 0x00000040, }, -+ { "ADAT-B", 0x00000008, 0x00000080, }, - }; - __le32 reg; - u32 data; - unsigned int rate; - enum snd_ff_clock_src src; - const char *label; -+ unsigned int clk_entry_count; - int i; - int err; - -@@ -270,7 +344,15 @@ static void latter_dump_status(struct snd_ff *ff, struct snd_info_buffer *buffer - - snd_iprintf(buffer, "External source detection:\n"); - -- for (i = 0; i < ARRAY_SIZE(clk_entries); ++i) { -+ if (ff->unit_version == SND_FF_UNIT_VERSION_UCX) { -+ clk_entries = ucx_clk_entries; -+ clk_entry_count = ARRAY_SIZE(ucx_clk_entries); -+ } else { -+ clk_entries = ufx_ff802_clk_entries; -+ clk_entry_count = ARRAY_SIZE(ufx_ff802_clk_entries); -+ } -+ -+ for (i = 0; i < clk_entry_count; ++i) { - clk_entry = clk_entries + i; - snd_iprintf(buffer, "%s: ", clk_entry->label); - if (data & clk_entry->locked_mask) { -diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c -index 5a50d3a464459..1233d4ee8a39d 100644 ---- a/sound/pci/hda/hda_intel.c -+++ b/sound/pci/hda/hda_intel.c -@@ -2481,6 +2481,8 @@ static const struct pci_device_id azx_ids[] = { - /* CometLake-H */ - { PCI_DEVICE(0x8086, 0x06C8), - .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE}, -+ { PCI_DEVICE(0x8086, 0xf1c8), -+ .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE}, - /* CometLake-S */ - { PCI_DEVICE(0x8086, 0xa3f0), - .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE}, -diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c -index 97adff0cbcab4..e405be7929e31 100644 ---- a/sound/pci/hda/patch_hdmi.c -+++ b/sound/pci/hda/patch_hdmi.c -@@ -2130,7 +2130,6 @@ static int hdmi_pcm_close(struct hda_pcm_stream *hinfo, - goto unlock; - } - per_cvt = get_cvt(spec, cvt_idx); -- snd_BUG_ON(!per_cvt->assigned); - per_cvt->assigned = 0; - hinfo->nid = 0; - -diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c -index 290645516313c..1927605f0f7ed 100644 ---- a/sound/pci/hda/patch_realtek.c -+++ b/sound/pci/hda/patch_realtek.c -@@ -1905,6 +1905,7 @@ enum { - ALC889_FIXUP_FRONT_HP_NO_PRESENCE, - ALC889_FIXUP_VAIO_TT, - ALC888_FIXUP_EEE1601, -+ ALC886_FIXUP_EAPD, - ALC882_FIXUP_EAPD, - ALC883_FIXUP_EAPD, - ALC883_FIXUP_ACER_EAPD, -@@ -2238,6 +2239,15 @@ static const struct hda_fixup alc882_fixups[] = { - { } - } - }, -+ [ALC886_FIXUP_EAPD] = { -+ .type = HDA_FIXUP_VERBS, -+ .v.verbs = (const struct hda_verb[]) { -+ /* change to EAPD mode */ -+ { 0x20, AC_VERB_SET_COEF_INDEX, 0x07 }, -+ { 0x20, AC_VERB_SET_PROC_COEF, 0x0068 }, -+ { } -+ } -+ }, - [ALC882_FIXUP_EAPD] = { - .type = HDA_FIXUP_VERBS, - .v.verbs = (const struct hda_verb[]) { -@@ -2510,6 +2520,7 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { - SND_PCI_QUIRK(0x106b, 0x4a00, "Macbook 5,2", ALC889_FIXUP_MBA11_VREF), - - SND_PCI_QUIRK(0x1071, 0x8258, "Evesham Voyaeger", ALC882_FIXUP_EAPD), -+ SND_PCI_QUIRK(0x13fe, 0x1009, "Advantech MIT-W101", ALC886_FIXUP_EAPD), - SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte EP45-DS3/Z87X-UD3H", ALC889_FIXUP_FRONT_HP_NO_PRESENCE), - SND_PCI_QUIRK(0x1458, 0xa0b8, "Gigabyte AZ370-Gaming", ALC1220_FIXUP_GB_DUAL_CODECS), - SND_PCI_QUIRK(0x1458, 0xa0cd, "Gigabyte X570 Aorus Master", ALC1220_FIXUP_CLEVO_P950), -@@ -4280,6 +4291,28 @@ static void alc280_fixup_hp_gpio4(struct hda_codec *codec, - } - } - -+/* HP Spectre x360 14 model needs a unique workaround for enabling the amp; -+ * it needs to toggle the GPIO0 once on and off at each time (bko#210633) -+ */ -+static void alc245_fixup_hp_x360_amp(struct hda_codec *codec, -+ const struct hda_fixup *fix, int action) -+{ -+ struct alc_spec *spec = codec->spec; -+ -+ switch (action) { -+ case HDA_FIXUP_ACT_PRE_PROBE: -+ spec->gpio_mask |= 0x01; -+ spec->gpio_dir |= 0x01; -+ break; -+ case HDA_FIXUP_ACT_INIT: -+ /* need to toggle GPIO to enable the amp */ -+ alc_update_gpio_data(codec, 0x01, true); -+ msleep(100); -+ alc_update_gpio_data(codec, 0x01, false); -+ break; -+ } -+} -+ - static void alc_update_coef_led(struct hda_codec *codec, - struct alc_coef_led *led, - bool polarity, bool on) -@@ -6266,6 +6299,7 @@ enum { - ALC280_FIXUP_HP_DOCK_PINS, - ALC269_FIXUP_HP_DOCK_GPIO_MIC1_LED, - ALC280_FIXUP_HP_9480M, -+ ALC245_FIXUP_HP_X360_AMP, - ALC288_FIXUP_DELL_HEADSET_MODE, - ALC288_FIXUP_DELL1_MIC_NO_PRESENCE, - ALC288_FIXUP_DELL_XPS_13, -@@ -6971,6 +7005,10 @@ static const struct hda_fixup alc269_fixups[] = { - .type = HDA_FIXUP_FUNC, - .v.func = alc280_fixup_hp_9480m, - }, -+ [ALC245_FIXUP_HP_X360_AMP] = { -+ .type = HDA_FIXUP_FUNC, -+ .v.func = alc245_fixup_hp_x360_amp, -+ }, - [ALC288_FIXUP_DELL_HEADSET_MODE] = { - .type = HDA_FIXUP_FUNC, - .v.func = alc_fixup_headset_mode_dell_alc288, -@@ -7985,6 +8023,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { - SND_PCI_QUIRK(0x103c, 0x87c8, "HP", ALC287_FIXUP_HP_GPIO_LED), - SND_PCI_QUIRK(0x103c, 0x87f4, "HP", ALC287_FIXUP_HP_GPIO_LED), - SND_PCI_QUIRK(0x103c, 0x87f5, "HP", ALC287_FIXUP_HP_GPIO_LED), -+ SND_PCI_QUIRK(0x103c, 0x87f7, "HP Spectre x360 14", ALC245_FIXUP_HP_X360_AMP), - SND_PCI_QUIRK(0x1043, 0x103e, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC), - SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300), - SND_PCI_QUIRK(0x1043, 0x106d, "Asus K53BE", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), -@@ -8357,6 +8396,7 @@ static const struct hda_model_fixup alc269_fixup_models[] = { - {.id = ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET, .name = "alc298-samsung-headphone"}, - {.id = ALC255_FIXUP_XIAOMI_HEADSET_MIC, .name = "alc255-xiaomi-headset"}, - {.id = ALC274_FIXUP_HP_MIC, .name = "alc274-hp-mic-detect"}, -+ {.id = ALC245_FIXUP_HP_X360_AMP, .name = "alc245-hp-x360-amp"}, - {} - }; - #define ALC225_STANDARD_PINS \ -diff --git a/sound/soc/codecs/cpcap.c b/sound/soc/codecs/cpcap.c -index f046987ee4cdb..c0425e3707d9c 100644 ---- a/sound/soc/codecs/cpcap.c -+++ b/sound/soc/codecs/cpcap.c -@@ -1264,12 +1264,12 @@ static int cpcap_voice_hw_params(struct snd_pcm_substream *substream, - - if (direction == SNDRV_PCM_STREAM_CAPTURE) { - mask = 0x0000; -- mask |= CPCAP_BIT_MIC1_RX_TIMESLOT0; -- mask |= CPCAP_BIT_MIC1_RX_TIMESLOT1; -- mask |= CPCAP_BIT_MIC1_RX_TIMESLOT2; -- mask |= CPCAP_BIT_MIC2_TIMESLOT0; -- mask |= CPCAP_BIT_MIC2_TIMESLOT1; -- mask |= CPCAP_BIT_MIC2_TIMESLOT2; -+ mask |= BIT(CPCAP_BIT_MIC1_RX_TIMESLOT0); -+ mask |= BIT(CPCAP_BIT_MIC1_RX_TIMESLOT1); -+ mask |= BIT(CPCAP_BIT_MIC1_RX_TIMESLOT2); -+ mask |= BIT(CPCAP_BIT_MIC2_TIMESLOT0); -+ mask |= BIT(CPCAP_BIT_MIC2_TIMESLOT1); -+ mask |= BIT(CPCAP_BIT_MIC2_TIMESLOT2); - val = 0x0000; - if (channels >= 2) - val = BIT(CPCAP_BIT_MIC1_RX_TIMESLOT0); -diff --git a/sound/soc/codecs/cs42l56.c b/sound/soc/codecs/cs42l56.c -index bb9599cc832bc..c44a5cdb796ec 100644 ---- a/sound/soc/codecs/cs42l56.c -+++ b/sound/soc/codecs/cs42l56.c -@@ -1250,6 +1250,7 @@ static int cs42l56_i2c_probe(struct i2c_client *i2c_client, - dev_err(&i2c_client->dev, - "CS42L56 Device ID (%X). Expected %X\n", - devid, CS42L56_DEVID); -+ ret = -EINVAL; - goto err_enable; - } - alpha_rev = reg & CS42L56_AREV_MASK; -@@ -1307,7 +1308,7 @@ static int cs42l56_i2c_probe(struct i2c_client *i2c_client, - ret = devm_snd_soc_register_component(&i2c_client->dev, - &soc_component_dev_cs42l56, &cs42l56_dai, 1); - if (ret < 0) -- return ret; -+ goto err_enable; - - return 0; - -diff --git a/sound/soc/codecs/max98373.c b/sound/soc/codecs/max98373.c -index 31d571d4fac1c..746c829312b87 100644 ---- a/sound/soc/codecs/max98373.c -+++ b/sound/soc/codecs/max98373.c -@@ -190,7 +190,7 @@ static int max98373_feedback_get(struct snd_kcontrol *kcontrol, - } - } - -- return snd_soc_put_volsw(kcontrol, ucontrol); -+ return snd_soc_get_volsw(kcontrol, ucontrol); - } - - static const struct snd_kcontrol_new max98373_snd_controls[] = { -diff --git a/sound/soc/codecs/rt5682-i2c.c b/sound/soc/codecs/rt5682-i2c.c -index 37d13120f5ba8..93c1603b42f10 100644 ---- a/sound/soc/codecs/rt5682-i2c.c -+++ b/sound/soc/codecs/rt5682-i2c.c -@@ -273,6 +273,9 @@ static void rt5682_i2c_shutdown(struct i2c_client *client) - { - struct rt5682_priv *rt5682 = i2c_get_clientdata(client); - -+ cancel_delayed_work_sync(&rt5682->jack_detect_work); -+ cancel_delayed_work_sync(&rt5682->jd_check_work); -+ - rt5682_reset(rt5682); - } - -diff --git a/sound/soc/codecs/wsa881x.c b/sound/soc/codecs/wsa881x.c -index 4530b74f5921b..db87e07b11c94 100644 ---- a/sound/soc/codecs/wsa881x.c -+++ b/sound/soc/codecs/wsa881x.c -@@ -640,6 +640,7 @@ static struct regmap_config wsa881x_regmap_config = { - .val_bits = 8, - .cache_type = REGCACHE_RBTREE, - .reg_defaults = wsa881x_defaults, -+ .max_register = WSA881X_SPKR_STATUS3, - .num_reg_defaults = ARRAY_SIZE(wsa881x_defaults), - .volatile_reg = wsa881x_volatile_register, - .readable_reg = wsa881x_readable_register, -diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig -index 84db0b7b9d593..d7f30036d4343 100644 ---- a/sound/soc/fsl/Kconfig -+++ b/sound/soc/fsl/Kconfig -@@ -108,6 +108,7 @@ config SND_SOC_FSL_XCVR - config SND_SOC_FSL_AUD2HTX - tristate "AUDIO TO HDMI TX module support" - depends on ARCH_MXC || COMPILE_TEST -+ select SND_SOC_IMX_PCM_DMA if SND_IMX_SOC != n - help - Say Y if you want to add AUDIO TO HDMI TX support for NXP. - -diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c -index 6cada4c1e283b..ab31045cfc952 100644 ---- a/sound/soc/generic/simple-card-utils.c -+++ b/sound/soc/generic/simple-card-utils.c -@@ -172,16 +172,15 @@ int asoc_simple_parse_clk(struct device *dev, - * or device's module clock. - */ - clk = devm_get_clk_from_child(dev, node, NULL); -- if (!IS_ERR(clk)) { -- simple_dai->sysclk = clk_get_rate(clk); -+ if (IS_ERR(clk)) -+ clk = devm_get_clk_from_child(dev, dlc->of_node, NULL); - -+ if (!IS_ERR(clk)) { - simple_dai->clk = clk; -- } else if (!of_property_read_u32(node, "system-clock-frequency", &val)) { -+ simple_dai->sysclk = clk_get_rate(clk); -+ } else if (!of_property_read_u32(node, "system-clock-frequency", -+ &val)) { - simple_dai->sysclk = val; -- } else { -- clk = devm_get_clk_from_child(dev, dlc->of_node, NULL); -- if (!IS_ERR(clk)) -- simple_dai->sysclk = clk_get_rate(clk); - } - - if (of_property_read_bool(node, "system-clock-direction-out")) -diff --git a/sound/soc/intel/boards/sof_sdw.c b/sound/soc/intel/boards/sof_sdw.c -index 6d0d6ef711e0f..152ea166eeaef 100644 ---- a/sound/soc/intel/boards/sof_sdw.c -+++ b/sound/soc/intel/boards/sof_sdw.c -@@ -54,7 +54,8 @@ static const struct dmi_system_id sof_sdw_quirk_table[] = { - DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"), - DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "0A32") - }, -- .driver_data = (void *)(SOF_RT711_JD_SRC_JD2 | -+ .driver_data = (void *)(SOF_SDW_TGL_HDMI | -+ SOF_RT711_JD_SRC_JD2 | - SOF_RT715_DAI_ID_FIX | - SOF_SDW_FOUR_SPK), - }, -@@ -64,7 +65,8 @@ static const struct dmi_system_id sof_sdw_quirk_table[] = { - DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"), - DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "0A3E") - }, -- .driver_data = (void *)(SOF_RT711_JD_SRC_JD2 | -+ .driver_data = (void *)(SOF_SDW_TGL_HDMI | -+ SOF_RT711_JD_SRC_JD2 | - SOF_RT715_DAI_ID_FIX), - }, - { -@@ -73,7 +75,8 @@ static const struct dmi_system_id sof_sdw_quirk_table[] = { - DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"), - DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "0A5E") - }, -- .driver_data = (void *)(SOF_RT711_JD_SRC_JD2 | -+ .driver_data = (void *)(SOF_SDW_TGL_HDMI | -+ SOF_RT711_JD_SRC_JD2 | - SOF_RT715_DAI_ID_FIX | - SOF_SDW_FOUR_SPK), - }, -diff --git a/sound/soc/qcom/lpass-apq8016.c b/sound/soc/qcom/lpass-apq8016.c -index 8507ef8f6679b..3efa133d1c641 100644 ---- a/sound/soc/qcom/lpass-apq8016.c -+++ b/sound/soc/qcom/lpass-apq8016.c -@@ -250,7 +250,7 @@ static struct lpass_variant apq8016_data = { - .micmode = REG_FIELD_ID(0x1000, 4, 7, 4, 0x1000), - .micmono = REG_FIELD_ID(0x1000, 3, 3, 4, 0x1000), - .wssrc = REG_FIELD_ID(0x1000, 2, 2, 4, 0x1000), -- .bitwidth = REG_FIELD_ID(0x1000, 0, 0, 4, 0x1000), -+ .bitwidth = REG_FIELD_ID(0x1000, 0, 1, 4, 0x1000), - - .rdma_dyncclk = REG_FIELD_ID(0x8400, 12, 12, 2, 0x1000), - .rdma_bursten = REG_FIELD_ID(0x8400, 11, 11, 2, 0x1000), -diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c -index 66b834312f330..8e5415c9234f1 100644 ---- a/sound/soc/qcom/lpass-cpu.c -+++ b/sound/soc/qcom/lpass-cpu.c -@@ -286,16 +286,12 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, - dev_err(dai->dev, "error writing to i2sctl reg: %d\n", - ret); - -- if (drvdata->bit_clk_state[id] == LPAIF_BIT_CLK_DISABLE) { -- ret = clk_enable(drvdata->mi2s_bit_clk[id]); -- if (ret) { -- dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); -- clk_disable(drvdata->mi2s_osr_clk[id]); -- return ret; -- } -- drvdata->bit_clk_state[id] = LPAIF_BIT_CLK_ENABLE; -+ ret = clk_enable(drvdata->mi2s_bit_clk[id]); -+ if (ret) { -+ dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); -+ clk_disable(drvdata->mi2s_osr_clk[id]); -+ return ret; - } -- - break; - case SNDRV_PCM_TRIGGER_STOP: - case SNDRV_PCM_TRIGGER_SUSPEND: -@@ -310,10 +306,9 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, - if (ret) - dev_err(dai->dev, "error writing to i2sctl reg: %d\n", - ret); -- if (drvdata->bit_clk_state[id] == LPAIF_BIT_CLK_ENABLE) { -- clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); -- drvdata->bit_clk_state[id] = LPAIF_BIT_CLK_DISABLE; -- } -+ -+ clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); -+ - break; - } - -@@ -599,7 +594,7 @@ static bool lpass_hdmi_regmap_writeable(struct device *dev, unsigned int reg) - return true; - } - -- for (i = 0; i < v->rdma_channels; ++i) { -+ for (i = 0; i < v->hdmi_rdma_channels; ++i) { - if (reg == LPAIF_HDMI_RDMACTL_REG(v, i)) - return true; - if (reg == LPAIF_HDMI_RDMABASE_REG(v, i)) -@@ -645,7 +640,7 @@ static bool lpass_hdmi_regmap_readable(struct device *dev, unsigned int reg) - if (reg == LPASS_HDMITX_APP_IRQSTAT_REG(v)) - return true; - -- for (i = 0; i < v->rdma_channels; ++i) { -+ for (i = 0; i < v->hdmi_rdma_channels; ++i) { - if (reg == LPAIF_HDMI_RDMACTL_REG(v, i)) - return true; - if (reg == LPAIF_HDMI_RDMABASE_REG(v, i)) -@@ -672,7 +667,7 @@ static bool lpass_hdmi_regmap_volatile(struct device *dev, unsigned int reg) - if (reg == LPASS_HDMI_TX_LEGACY_ADDR(v)) - return true; - -- for (i = 0; i < v->rdma_channels; ++i) { -+ for (i = 0; i < v->hdmi_rdma_channels; ++i) { - if (reg == LPAIF_HDMI_RDMACURR_REG(v, i)) - return true; - } -@@ -822,7 +817,7 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) - } - - lpass_hdmi_regmap_config.max_register = LPAIF_HDMI_RDMAPER_REG(variant, -- variant->hdmi_rdma_channels); -+ variant->hdmi_rdma_channels - 1); - drvdata->hdmiif_map = devm_regmap_init_mmio(dev, drvdata->hdmiif, - &lpass_hdmi_regmap_config); - if (IS_ERR(drvdata->hdmiif_map)) { -@@ -866,7 +861,6 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) - PTR_ERR(drvdata->mi2s_bit_clk[dai_id])); - return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]); - } -- drvdata->bit_clk_state[dai_id] = LPAIF_BIT_CLK_DISABLE; - } - - /* Allocation for i2sctl regmap fields */ -diff --git a/sound/soc/qcom/lpass-lpaif-reg.h b/sound/soc/qcom/lpass-lpaif-reg.h -index baf72f124ea9b..2eb03ad9b7c74 100644 ---- a/sound/soc/qcom/lpass-lpaif-reg.h -+++ b/sound/soc/qcom/lpass-lpaif-reg.h -@@ -60,9 +60,6 @@ - #define LPAIF_I2SCTL_BITWIDTH_24 1 - #define LPAIF_I2SCTL_BITWIDTH_32 2 - --#define LPAIF_BIT_CLK_DISABLE 0 --#define LPAIF_BIT_CLK_ENABLE 1 -- - #define LPAIF_I2SCTL_RESET_STATE 0x003C0004 - #define LPAIF_DMACTL_RESET_STATE 0x00200000 - -diff --git a/sound/soc/qcom/lpass-sc7180.c b/sound/soc/qcom/lpass-sc7180.c -index 735c9dac28f26..8c168d3c589e9 100644 ---- a/sound/soc/qcom/lpass-sc7180.c -+++ b/sound/soc/qcom/lpass-sc7180.c -@@ -171,7 +171,7 @@ static struct lpass_variant sc7180_data = { - .rdma_channels = 5, - .hdmi_rdma_reg_base = 0x64000, - .hdmi_rdma_reg_stride = 0x1000, -- .hdmi_rdma_channels = 3, -+ .hdmi_rdma_channels = 4, - .dmactl_audif_start = 1, - .wrdma_reg_base = 0x18000, - .wrdma_reg_stride = 0x1000, -diff --git a/sound/soc/qcom/lpass.h b/sound/soc/qcom/lpass.h -index 2d68af0da34d8..83b2e08ade060 100644 ---- a/sound/soc/qcom/lpass.h -+++ b/sound/soc/qcom/lpass.h -@@ -68,7 +68,6 @@ struct lpass_data { - unsigned int mi2s_playback_sd_mode[LPASS_MAX_MI2S_PORTS]; - unsigned int mi2s_capture_sd_mode[LPASS_MAX_MI2S_PORTS]; - int hdmi_port_enable; -- int bit_clk_state[LPASS_MAX_MI2S_PORTS]; - - /* low-power audio interface (LPAIF) registers */ - void __iomem *lpaif; -diff --git a/sound/soc/qcom/qdsp6/q6asm-dai.c b/sound/soc/qcom/qdsp6/q6asm-dai.c -index c9ac9c1d26c47..9766725c29166 100644 ---- a/sound/soc/qcom/qdsp6/q6asm-dai.c -+++ b/sound/soc/qcom/qdsp6/q6asm-dai.c -@@ -1233,6 +1233,25 @@ static void q6asm_dai_pcm_free(struct snd_soc_component *component, - } - } - -+static const struct snd_soc_dapm_widget q6asm_dapm_widgets[] = { -+ SND_SOC_DAPM_AIF_IN("MM_DL1", "MultiMedia1 Playback", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_IN("MM_DL2", "MultiMedia2 Playback", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_IN("MM_DL3", "MultiMedia3 Playback", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_IN("MM_DL4", "MultiMedia4 Playback", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_IN("MM_DL5", "MultiMedia5 Playback", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_IN("MM_DL6", "MultiMedia6 Playback", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_IN("MM_DL7", "MultiMedia7 Playback", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_IN("MM_DL8", "MultiMedia8 Playback", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_OUT("MM_UL1", "MultiMedia1 Capture", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_OUT("MM_UL2", "MultiMedia2 Capture", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_OUT("MM_UL3", "MultiMedia3 Capture", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_OUT("MM_UL4", "MultiMedia4 Capture", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_OUT("MM_UL5", "MultiMedia5 Capture", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_OUT("MM_UL6", "MultiMedia6 Capture", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_OUT("MM_UL7", "MultiMedia7 Capture", 0, SND_SOC_NOPM, 0, 0), -+ SND_SOC_DAPM_AIF_OUT("MM_UL8", "MultiMedia8 Capture", 0, SND_SOC_NOPM, 0, 0), -+}; -+ - static const struct snd_soc_component_driver q6asm_fe_dai_component = { - .name = DRV_NAME, - .open = q6asm_dai_open, -@@ -1245,6 +1264,8 @@ static const struct snd_soc_component_driver q6asm_fe_dai_component = { - .pcm_construct = q6asm_dai_pcm_new, - .pcm_destruct = q6asm_dai_pcm_free, - .compress_ops = &q6asm_dai_compress_ops, -+ .dapm_widgets = q6asm_dapm_widgets, -+ .num_dapm_widgets = ARRAY_SIZE(q6asm_dapm_widgets), - }; - - static struct snd_soc_dai_driver q6asm_fe_dais_template[] = { -diff --git a/sound/soc/qcom/qdsp6/q6routing.c b/sound/soc/qcom/qdsp6/q6routing.c -index 53185e26fea17..0a6b9433f6acf 100644 ---- a/sound/soc/qcom/qdsp6/q6routing.c -+++ b/sound/soc/qcom/qdsp6/q6routing.c -@@ -713,24 +713,6 @@ static const struct snd_kcontrol_new mmul8_mixer_controls[] = { - Q6ROUTING_TX_MIXERS(MSM_FRONTEND_DAI_MULTIMEDIA8) }; - - static const struct snd_soc_dapm_widget msm_qdsp6_widgets[] = { -- /* Frontend AIF */ -- SND_SOC_DAPM_AIF_IN("MM_DL1", "MultiMedia1 Playback", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_IN("MM_DL2", "MultiMedia2 Playback", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_IN("MM_DL3", "MultiMedia3 Playback", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_IN("MM_DL4", "MultiMedia4 Playback", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_IN("MM_DL5", "MultiMedia5 Playback", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_IN("MM_DL6", "MultiMedia6 Playback", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_IN("MM_DL7", "MultiMedia7 Playback", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_IN("MM_DL8", "MultiMedia8 Playback", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_OUT("MM_UL1", "MultiMedia1 Capture", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_OUT("MM_UL2", "MultiMedia2 Capture", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_OUT("MM_UL3", "MultiMedia3 Capture", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_OUT("MM_UL4", "MultiMedia4 Capture", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_OUT("MM_UL5", "MultiMedia5 Capture", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_OUT("MM_UL6", "MultiMedia6 Capture", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_OUT("MM_UL7", "MultiMedia7 Capture", 0, 0, 0, 0), -- SND_SOC_DAPM_AIF_OUT("MM_UL8", "MultiMedia8 Capture", 0, 0, 0, 0), -- - /* Mixer definitions */ - SND_SOC_DAPM_MIXER("HDMI Mixer", SND_SOC_NOPM, 0, 0, - hdmi_mixer_controls, -diff --git a/sound/soc/sh/siu.h b/sound/soc/sh/siu.h -index 6201840f1bc05..a675c36fc9d95 100644 ---- a/sound/soc/sh/siu.h -+++ b/sound/soc/sh/siu.h -@@ -169,7 +169,7 @@ static inline u32 siu_read32(u32 __iomem *addr) - #define SIU_BRGBSEL (0x108 / sizeof(u32)) - #define SIU_BRRB (0x10c / sizeof(u32)) - --extern struct snd_soc_component_driver siu_component; -+extern const struct snd_soc_component_driver siu_component; - extern struct siu_info *siu_i2s_data; - - int siu_init_port(int port, struct siu_port **port_info, struct snd_card *card); -diff --git a/sound/soc/sh/siu_pcm.c b/sound/soc/sh/siu_pcm.c -index 45c4320976ab9..4785886df4f03 100644 ---- a/sound/soc/sh/siu_pcm.c -+++ b/sound/soc/sh/siu_pcm.c -@@ -543,7 +543,7 @@ static void siu_pcm_free(struct snd_soc_component *component, - dev_dbg(pcm->card->dev, "%s\n", __func__); - } - --struct const snd_soc_component_driver siu_component = { -+const struct snd_soc_component_driver siu_component = { - .name = DRV_NAME, - .open = siu_pcm_open, - .close = siu_pcm_close, -diff --git a/sound/soc/sof/debug.c b/sound/soc/sof/debug.c -index 30213a1beaaa2..715a374b33cfb 100644 ---- a/sound/soc/sof/debug.c -+++ b/sound/soc/sof/debug.c -@@ -352,7 +352,7 @@ static ssize_t sof_dfsentry_write(struct file *file, const char __user *buffer, - char *string; - int ret; - -- string = kzalloc(count, GFP_KERNEL); -+ string = kzalloc(count+1, GFP_KERNEL); - if (!string) - return -ENOMEM; - -diff --git a/sound/soc/sof/intel/hda-dsp.c b/sound/soc/sof/intel/hda-dsp.c -index 1c5e05b88a90d..1799fc56a3e41 100644 ---- a/sound/soc/sof/intel/hda-dsp.c -+++ b/sound/soc/sof/intel/hda-dsp.c -@@ -802,11 +802,15 @@ int hda_dsp_runtime_idle(struct snd_sof_dev *sdev) - - int hda_dsp_runtime_suspend(struct snd_sof_dev *sdev) - { -+ struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; - const struct sof_dsp_power_state target_state = { - .state = SOF_DSP_PM_D3, - }; - int ret; - -+ /* cancel any attempt for DSP D0I3 */ -+ cancel_delayed_work_sync(&hda->d0i3_work); -+ - /* stop hda controller and power dsp off */ - ret = hda_suspend(sdev, true); - if (ret < 0) -diff --git a/sound/soc/sof/sof-pci-dev.c b/sound/soc/sof/sof-pci-dev.c -index 215711ac74509..9adf50b20a735 100644 ---- a/sound/soc/sof/sof-pci-dev.c -+++ b/sound/soc/sof/sof-pci-dev.c -@@ -65,6 +65,13 @@ static const struct dmi_system_id community_key_platforms[] = { - DMI_MATCH(DMI_BOARD_NAME, "UP-APL01"), - } - }, -+ { -+ .ident = "Up Extreme", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "AAEON"), -+ DMI_MATCH(DMI_BOARD_NAME, "UP-WHL01"), -+ } -+ }, - { - .ident = "Google Chromebooks", - .matches = { -diff --git a/sound/usb/card.h b/sound/usb/card.h -index 37091b1176143..a741e7da83a29 100644 ---- a/sound/usb/card.h -+++ b/sound/usb/card.h -@@ -71,7 +71,7 @@ struct snd_usb_endpoint { - unsigned char altsetting; /* corresponding alternate setting */ - unsigned char ep_idx; /* endpoint array index */ - -- unsigned long flags; /* running bit flags */ -+ atomic_t state; /* running state */ - - void (*prepare_data_urb) (struct snd_usb_substream *subs, - struct urb *urb); -diff --git a/sound/usb/endpoint.c b/sound/usb/endpoint.c -index 8e568823c9924..102d53515a76f 100644 ---- a/sound/usb/endpoint.c -+++ b/sound/usb/endpoint.c -@@ -21,8 +21,11 @@ - #include "clock.h" - #include "quirks.h" - --#define EP_FLAG_RUNNING 1 --#define EP_FLAG_STOPPING 2 -+enum { -+ EP_STATE_STOPPED, -+ EP_STATE_RUNNING, -+ EP_STATE_STOPPING, -+}; - - /* interface refcounting */ - struct snd_usb_iface_ref { -@@ -115,6 +118,16 @@ static const char *usb_error_string(int err) - } - } - -+static inline bool ep_state_running(struct snd_usb_endpoint *ep) -+{ -+ return atomic_read(&ep->state) == EP_STATE_RUNNING; -+} -+ -+static inline bool ep_state_update(struct snd_usb_endpoint *ep, int old, int new) -+{ -+ return atomic_cmpxchg(&ep->state, old, new) == old; -+} -+ - /** - * snd_usb_endpoint_implicit_feedback_sink: Report endpoint usage type - * -@@ -393,7 +406,7 @@ next_packet_fifo_dequeue(struct snd_usb_endpoint *ep) - */ - static void queue_pending_output_urbs(struct snd_usb_endpoint *ep) - { -- while (test_bit(EP_FLAG_RUNNING, &ep->flags)) { -+ while (ep_state_running(ep)) { - - unsigned long flags; - struct snd_usb_packet_info *packet; -@@ -454,13 +467,13 @@ static void snd_complete_urb(struct urb *urb) - if (unlikely(atomic_read(&ep->chip->shutdown))) - goto exit_clear; - -- if (unlikely(!test_bit(EP_FLAG_RUNNING, &ep->flags))) -+ if (unlikely(!ep_state_running(ep))) - goto exit_clear; - - if (usb_pipeout(ep->pipe)) { - retire_outbound_urb(ep, ctx); - /* can be stopped during retire callback */ -- if (unlikely(!test_bit(EP_FLAG_RUNNING, &ep->flags))) -+ if (unlikely(!ep_state_running(ep))) - goto exit_clear; - - if (snd_usb_endpoint_implicit_feedback_sink(ep)) { -@@ -474,12 +487,12 @@ static void snd_complete_urb(struct urb *urb) - - prepare_outbound_urb(ep, ctx); - /* can be stopped during prepare callback */ -- if (unlikely(!test_bit(EP_FLAG_RUNNING, &ep->flags))) -+ if (unlikely(!ep_state_running(ep))) - goto exit_clear; - } else { - retire_inbound_urb(ep, ctx); - /* can be stopped during retire callback */ -- if (unlikely(!test_bit(EP_FLAG_RUNNING, &ep->flags))) -+ if (unlikely(!ep_state_running(ep))) - goto exit_clear; - - prepare_inbound_urb(ep, ctx); -@@ -835,7 +848,7 @@ static int wait_clear_urbs(struct snd_usb_endpoint *ep) - unsigned long end_time = jiffies + msecs_to_jiffies(1000); - int alive; - -- if (!test_bit(EP_FLAG_STOPPING, &ep->flags)) -+ if (atomic_read(&ep->state) != EP_STATE_STOPPING) - return 0; - - do { -@@ -850,10 +863,11 @@ static int wait_clear_urbs(struct snd_usb_endpoint *ep) - usb_audio_err(ep->chip, - "timeout: still %d active urbs on EP #%x\n", - alive, ep->ep_num); -- clear_bit(EP_FLAG_STOPPING, &ep->flags); - -- ep->sync_sink = NULL; -- snd_usb_endpoint_set_callback(ep, NULL, NULL, NULL); -+ if (ep_state_update(ep, EP_STATE_STOPPING, EP_STATE_STOPPED)) { -+ ep->sync_sink = NULL; -+ snd_usb_endpoint_set_callback(ep, NULL, NULL, NULL); -+ } - - return 0; - } -@@ -868,26 +882,20 @@ void snd_usb_endpoint_sync_pending_stop(struct snd_usb_endpoint *ep) - } - - /* -- * Stop and unlink active urbs. -+ * Stop active urbs - * -- * This function checks and clears EP_FLAG_RUNNING state. -- * When @wait_sync is set, it waits until all pending URBs are killed. -+ * This function moves the EP to STOPPING state if it's being RUNNING. - */ --static int stop_and_unlink_urbs(struct snd_usb_endpoint *ep, bool force, -- bool wait_sync) -+static int stop_urbs(struct snd_usb_endpoint *ep, bool force) - { - unsigned int i; - -- if (!force && atomic_read(&ep->chip->shutdown)) /* to be sure... */ -- return -EBADFD; -- -- if (atomic_read(&ep->running)) -+ if (!force && atomic_read(&ep->running)) - return -EBUSY; - -- if (!test_and_clear_bit(EP_FLAG_RUNNING, &ep->flags)) -- goto out; -+ if (!ep_state_update(ep, EP_STATE_RUNNING, EP_STATE_STOPPING)) -+ return 0; - -- set_bit(EP_FLAG_STOPPING, &ep->flags); - INIT_LIST_HEAD(&ep->ready_playback_urbs); - ep->next_packet_head = 0; - ep->next_packet_queued = 0; -@@ -901,24 +909,25 @@ static int stop_and_unlink_urbs(struct snd_usb_endpoint *ep, bool force, - } - } - -- out: -- if (wait_sync) -- return wait_clear_urbs(ep); - return 0; - } - - /* - * release an endpoint's urbs - */ --static void release_urbs(struct snd_usb_endpoint *ep, int force) -+static int release_urbs(struct snd_usb_endpoint *ep, bool force) - { -- int i; -+ int i, err; - - /* route incoming urbs to nirvana */ - snd_usb_endpoint_set_callback(ep, NULL, NULL, NULL); - -- /* stop urbs */ -- stop_and_unlink_urbs(ep, force, true); -+ /* stop and unlink urbs */ -+ err = stop_urbs(ep, force); -+ if (err) -+ return err; -+ -+ wait_clear_urbs(ep); - - for (i = 0; i < ep->nurbs; i++) - release_urb_ctx(&ep->urb[i]); -@@ -928,6 +937,7 @@ static void release_urbs(struct snd_usb_endpoint *ep, int force) - - ep->syncbuf = NULL; - ep->nurbs = 0; -+ return 0; - } - - /* -@@ -1118,7 +1128,7 @@ static int data_ep_set_params(struct snd_usb_endpoint *ep) - return 0; - - out_of_memory: -- release_urbs(ep, 0); -+ release_urbs(ep, false); - return -ENOMEM; - } - -@@ -1162,7 +1172,7 @@ static int sync_ep_set_params(struct snd_usb_endpoint *ep) - return 0; - - out_of_memory: -- release_urbs(ep, 0); -+ release_urbs(ep, false); - return -ENOMEM; - } - -@@ -1180,7 +1190,9 @@ static int snd_usb_endpoint_set_params(struct snd_usb_audio *chip, - int err; - - /* release old buffers, if any */ -- release_urbs(ep, 0); -+ err = release_urbs(ep, false); -+ if (err < 0) -+ return err; - - ep->datainterval = fmt->datainterval; - ep->maxpacksize = fmt->maxpacksize; -@@ -1360,7 +1372,8 @@ int snd_usb_endpoint_start(struct snd_usb_endpoint *ep) - * from that context. - */ - -- set_bit(EP_FLAG_RUNNING, &ep->flags); -+ if (!ep_state_update(ep, EP_STATE_STOPPED, EP_STATE_RUNNING)) -+ goto __error; - - if (snd_usb_endpoint_implicit_feedback_sink(ep)) { - for (i = 0; i < ep->nurbs; i++) { -@@ -1433,7 +1446,7 @@ void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep) - WRITE_ONCE(ep->sync_source->sync_sink, NULL); - - if (!atomic_dec_return(&ep->running)) -- stop_and_unlink_urbs(ep, false, false); -+ stop_urbs(ep, false); - } - - /** -@@ -1446,12 +1459,12 @@ void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep) - */ - void snd_usb_endpoint_release(struct snd_usb_endpoint *ep) - { -- release_urbs(ep, 1); -+ release_urbs(ep, true); - } - - /** - * snd_usb_endpoint_free_all: Free the resources of an snd_usb_endpoint -- * @card: The chip -+ * @chip: The chip - * - * This free all endpoints and those resources - */ -diff --git a/sound/usb/implicit.c b/sound/usb/implicit.c -index 521cc846d9d9f..bba54430e6d0b 100644 ---- a/sound/usb/implicit.c -+++ b/sound/usb/implicit.c -@@ -73,6 +73,7 @@ static const struct snd_usb_implicit_fb_match playback_implicit_fb_quirks[] = { - /* No quirk for playback but with capture quirk (see below) */ - IMPLICIT_FB_SKIP_DEV(0x0582, 0x0130), /* BOSS BR-80 */ - IMPLICIT_FB_SKIP_DEV(0x0582, 0x0171), /* BOSS RC-505 */ -+ IMPLICIT_FB_SKIP_DEV(0x0582, 0x0185), /* BOSS GP-10 */ - IMPLICIT_FB_SKIP_DEV(0x0582, 0x0189), /* BOSS GT-100v2 */ - IMPLICIT_FB_SKIP_DEV(0x0582, 0x01d6), /* BOSS GT-1 */ - IMPLICIT_FB_SKIP_DEV(0x0582, 0x01d8), /* BOSS Katana */ -@@ -86,6 +87,7 @@ static const struct snd_usb_implicit_fb_match playback_implicit_fb_quirks[] = { - static const struct snd_usb_implicit_fb_match capture_implicit_fb_quirks[] = { - IMPLICIT_FB_FIXED_DEV(0x0582, 0x0130, 0x0d, 0x01), /* BOSS BR-80 */ - IMPLICIT_FB_FIXED_DEV(0x0582, 0x0171, 0x0d, 0x01), /* BOSS RC-505 */ -+ IMPLICIT_FB_FIXED_DEV(0x0582, 0x0185, 0x0d, 0x01), /* BOSS GP-10 */ - IMPLICIT_FB_FIXED_DEV(0x0582, 0x0189, 0x0d, 0x01), /* BOSS GT-100v2 */ - IMPLICIT_FB_FIXED_DEV(0x0582, 0x01d6, 0x0d, 0x01), /* BOSS GT-1 */ - IMPLICIT_FB_FIXED_DEV(0x0582, 0x01d8, 0x0d, 0x01), /* BOSS Katana */ -diff --git a/sound/usb/pcm.c b/sound/usb/pcm.c -index 078bb4c940334..bf5a0f3c1fade 100644 ---- a/sound/usb/pcm.c -+++ b/sound/usb/pcm.c -@@ -270,10 +270,7 @@ static int snd_usb_pcm_sync_stop(struct snd_pcm_substream *substream) - { - struct snd_usb_substream *subs = substream->runtime->private_data; - -- if (!snd_usb_lock_shutdown(subs->stream->chip)) { -- sync_pending_stops(subs); -- snd_usb_unlock_shutdown(subs->stream->chip); -- } -+ sync_pending_stops(subs); - return 0; - } - -@@ -1558,7 +1555,7 @@ void snd_usb_preallocate_buffer(struct snd_usb_substream *subs) - { - struct snd_pcm *pcm = subs->stream->pcm; - struct snd_pcm_substream *s = pcm->streams[subs->direction].substream; -- struct device *dev = subs->dev->bus->controller; -+ struct device *dev = subs->dev->bus->sysdev; - - if (snd_usb_use_vmalloc) - snd_pcm_set_managed_buffer(s, SNDRV_DMA_TYPE_VMALLOC, -diff --git a/tools/lib/bpf/libbpf.c b/tools/lib/bpf/libbpf.c -index 6ae748f6ea118..a0d4fc4de4027 100644 ---- a/tools/lib/bpf/libbpf.c -+++ b/tools/lib/bpf/libbpf.c -@@ -883,24 +883,24 @@ static int bpf_map__init_kern_struct_ops(struct bpf_map *map, - if (btf_is_ptr(mtype)) { - struct bpf_program *prog; - -- mtype = skip_mods_and_typedefs(btf, mtype->type, &mtype_id); -+ prog = st_ops->progs[i]; -+ if (!prog) -+ continue; -+ - kern_mtype = skip_mods_and_typedefs(kern_btf, - kern_mtype->type, - &kern_mtype_id); -- if (!btf_is_func_proto(mtype) || -- !btf_is_func_proto(kern_mtype)) { -- pr_warn("struct_ops init_kern %s: non func ptr %s is not supported\n", -+ -+ /* mtype->type must be a func_proto which was -+ * guaranteed in bpf_object__collect_st_ops_relos(), -+ * so only check kern_mtype for func_proto here. -+ */ -+ if (!btf_is_func_proto(kern_mtype)) { -+ pr_warn("struct_ops init_kern %s: kernel member %s is not a func ptr\n", - map->name, mname); - return -ENOTSUP; - } - -- prog = st_ops->progs[i]; -- if (!prog) { -- pr_debug("struct_ops init_kern %s: func ptr %s is not set\n", -- map->name, mname); -- continue; -- } -- - prog->attach_btf_id = kern_type_id; - prog->expected_attach_type = kern_member_idx; - -diff --git a/tools/objtool/arch/x86/special.c b/tools/objtool/arch/x86/special.c -index fd4af88c0ea52..151b13d0a2676 100644 ---- a/tools/objtool/arch/x86/special.c -+++ b/tools/objtool/arch/x86/special.c -@@ -48,7 +48,7 @@ bool arch_support_alt_relocation(struct special_alt *special_alt, - * replacement group. - */ - return insn->offset == special_alt->new_off && -- (insn->type == INSN_CALL || is_static_jump(insn)); -+ (insn->type == INSN_CALL || is_jump(insn)); - } - - /* -diff --git a/tools/objtool/check.c b/tools/objtool/check.c -index 4bd30315eb62b..dc24aac08edd6 100644 ---- a/tools/objtool/check.c -+++ b/tools/objtool/check.c -@@ -789,7 +789,8 @@ static int add_jump_destinations(struct objtool_file *file) - dest_sec = reloc->sym->sec; - dest_off = reloc->sym->sym.st_value + - arch_dest_reloc_offset(reloc->addend); -- } else if (strstr(reloc->sym->name, "_indirect_thunk_")) { -+ } else if (!strncmp(reloc->sym->name, "__x86_indirect_thunk_", 21) || -+ !strncmp(reloc->sym->name, "__x86_retpoline_", 16)) { - /* - * Retpoline jumps are really dynamic jumps in - * disguise, so convert them accordingly. -@@ -849,8 +850,8 @@ static int add_jump_destinations(struct objtool_file *file) - * case where the parent function's only reference to a - * subfunction is through a jump table. - */ -- if (!strstr(insn->func->name, ".cold.") && -- strstr(insn->jump_dest->func->name, ".cold.")) { -+ if (!strstr(insn->func->name, ".cold") && -+ strstr(insn->jump_dest->func->name, ".cold")) { - insn->func->cfunc = insn->jump_dest->func; - insn->jump_dest->func->pfunc = insn->func; - -@@ -2592,15 +2593,19 @@ static int validate_branch(struct objtool_file *file, struct symbol *func, - break; - - case INSN_STD: -- if (state.df) -+ if (state.df) { - WARN_FUNC("recursive STD", sec, insn->offset); -+ return 1; -+ } - - state.df = true; - break; - - case INSN_CLD: -- if (!state.df && func) -+ if (!state.df && func) { - WARN_FUNC("redundant CLD", sec, insn->offset); -+ return 1; -+ } - - state.df = false; - break; -diff --git a/tools/objtool/check.h b/tools/objtool/check.h -index 5ec00a4b891b6..2804848e628e3 100644 ---- a/tools/objtool/check.h -+++ b/tools/objtool/check.h -@@ -54,6 +54,17 @@ static inline bool is_static_jump(struct instruction *insn) - insn->type == INSN_JUMP_UNCONDITIONAL; - } - -+static inline bool is_dynamic_jump(struct instruction *insn) -+{ -+ return insn->type == INSN_JUMP_DYNAMIC || -+ insn->type == INSN_JUMP_DYNAMIC_CONDITIONAL; -+} -+ -+static inline bool is_jump(struct instruction *insn) -+{ -+ return is_static_jump(insn) || is_dynamic_jump(insn); -+} -+ - struct instruction *find_insn(struct objtool_file *file, - struct section *sec, unsigned long offset); - -diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c -index fd39116506123..51e593e896ea5 100644 ---- a/tools/perf/builtin-record.c -+++ b/tools/perf/builtin-record.c -@@ -1663,7 +1663,7 @@ static int __cmd_record(struct record *rec, int argc, const char **argv) - status = -1; - goto out_delete_session; - } -- err = evlist__add_pollfd(rec->evlist, done_fd); -+ err = evlist__add_wakeup_eventfd(rec->evlist, done_fd); - if (err < 0) { - pr_err("Failed to add wakeup eventfd to poll list\n"); - status = err; -diff --git a/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json -index 40010a8724b3a..ce6e7e7960579 100644 ---- a/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json -+++ b/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json -@@ -114,7 +114,7 @@ - "PublicDescription": "Level 2 access to instruciton TLB that caused a page table walk. This event counts on any instruciton access which causes L2I_TLB_REFILL to count", - "EventCode": "0x35", - "EventName": "L2I_TLB_ACCESS", -- "BriefDescription": "L2D TLB access" -+ "BriefDescription": "L2I TLB access" - }, - { - "PublicDescription": "Branch target buffer misprediction", -diff --git a/tools/perf/tests/sample-parsing.c b/tools/perf/tests/sample-parsing.c -index 2393916f6128a..92869eea5dbd4 100644 ---- a/tools/perf/tests/sample-parsing.c -+++ b/tools/perf/tests/sample-parsing.c -@@ -196,7 +196,7 @@ static int do_test(u64 sample_type, u64 sample_regs, u64 read_format) - .data = {1, -1ULL, 211, 212, 213}, - }; - u64 regs[64]; -- const u64 raw_data[] = {0x123456780a0b0c0dULL, 0x1102030405060708ULL}; -+ const u32 raw_data[] = {0x12345678, 0x0a0b0c0d, 0x11020304, 0x05060708, 0 }; - const u64 data[] = {0x2211443366558877ULL, 0, 0xaabbccddeeff4321ULL}; - const u64 aux_data[] = {0xa55a, 0, 0xeeddee, 0x0282028202820282}; - struct perf_sample sample = { -diff --git a/tools/perf/util/cgroup.c b/tools/perf/util/cgroup.c -index 5dff7e489921b..f24ab45855535 100644 ---- a/tools/perf/util/cgroup.c -+++ b/tools/perf/util/cgroup.c -@@ -161,7 +161,7 @@ void evlist__set_default_cgroup(struct evlist *evlist, struct cgroup *cgroup) - - /* helper function for ftw() in match_cgroups and list_cgroups */ - static int add_cgroup_name(const char *fpath, const struct stat *sb __maybe_unused, -- int typeflag) -+ int typeflag, struct FTW *ftwbuf __maybe_unused) - { - struct cgroup_name *cn; - -@@ -209,12 +209,12 @@ static int list_cgroups(const char *str) - if (!s) - return -1; - /* pretend if it's added by ftw() */ -- ret = add_cgroup_name(s, NULL, FTW_D); -+ ret = add_cgroup_name(s, NULL, FTW_D, NULL); - free(s); - if (ret) - return -1; - } else { -- if (add_cgroup_name("", NULL, FTW_D) < 0) -+ if (add_cgroup_name("", NULL, FTW_D, NULL) < 0) - return -1; - } - -@@ -247,7 +247,7 @@ static int match_cgroups(const char *str) - prefix_len = strlen(mnt); - - /* collect all cgroups in the cgroup_list */ -- if (ftw(mnt, add_cgroup_name, 20) < 0) -+ if (nftw(mnt, add_cgroup_name, 20, 0) < 0) - return -1; - - for (;;) { -diff --git a/tools/perf/util/event.c b/tools/perf/util/event.c -index 05616d4138a96..7e440fa90c938 100644 ---- a/tools/perf/util/event.c -+++ b/tools/perf/util/event.c -@@ -673,6 +673,8 @@ int machine__resolve(struct machine *machine, struct addr_location *al, - } - - al->sym = map__find_symbol(al->map, al->addr); -+ } else if (symbol_conf.dso_list) { -+ al->filtered |= (1 << HIST_FILTER__DSO); - } - - if (symbol_conf.sym_list) { -diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c -index 05363a7247c41..fea4c1e8010d9 100644 ---- a/tools/perf/util/evlist.c -+++ b/tools/perf/util/evlist.c -@@ -572,6 +572,14 @@ int evlist__filter_pollfd(struct evlist *evlist, short revents_and_mask) - return perf_evlist__filter_pollfd(&evlist->core, revents_and_mask); - } - -+#ifdef HAVE_EVENTFD_SUPPORT -+int evlist__add_wakeup_eventfd(struct evlist *evlist, int fd) -+{ -+ return perf_evlist__add_pollfd(&evlist->core, fd, NULL, POLLIN, -+ fdarray_flag__nonfilterable); -+} -+#endif -+ - int evlist__poll(struct evlist *evlist, int timeout) - { - return perf_evlist__poll(&evlist->core, timeout); -diff --git a/tools/perf/util/evlist.h b/tools/perf/util/evlist.h -index 1aae75895dea0..6d4d62151bc89 100644 ---- a/tools/perf/util/evlist.h -+++ b/tools/perf/util/evlist.h -@@ -142,6 +142,10 @@ struct evsel *evlist__find_tracepoint_by_name(struct evlist *evlist, const char - int evlist__add_pollfd(struct evlist *evlist, int fd); - int evlist__filter_pollfd(struct evlist *evlist, short revents_and_mask); - -+#ifdef HAVE_EVENTFD_SUPPORT -+int evlist__add_wakeup_eventfd(struct evlist *evlist, int fd); -+#endif -+ - int evlist__poll(struct evlist *evlist, int timeout); - - struct evsel *evlist__id2evsel(struct evlist *evlist, u64 id); -diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c -index 697513f351549..197eb58a39cb7 100644 ---- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c -+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c -@@ -24,6 +24,13 @@ - #include "intel-pt-decoder.h" - #include "intel-pt-log.h" - -+#define BITULL(x) (1ULL << (x)) -+ -+/* IA32_RTIT_CTL MSR bits */ -+#define INTEL_PT_CYC_ENABLE BITULL(1) -+#define INTEL_PT_CYC_THRESHOLD (BITULL(22) | BITULL(21) | BITULL(20) | BITULL(19)) -+#define INTEL_PT_CYC_THRESHOLD_SHIFT 19 -+ - #define INTEL_PT_BLK_SIZE 1024 - - #define BIT63 (((uint64_t)1 << 63)) -@@ -167,6 +174,8 @@ struct intel_pt_decoder { - uint64_t sample_tot_cyc_cnt; - uint64_t base_cyc_cnt; - uint64_t cyc_cnt_timestamp; -+ uint64_t ctl; -+ uint64_t cyc_threshold; - double tsc_to_cyc; - bool continuous_period; - bool overflow; -@@ -204,6 +213,14 @@ static uint64_t intel_pt_lower_power_of_2(uint64_t x) - return x << i; - } - -+static uint64_t intel_pt_cyc_threshold(uint64_t ctl) -+{ -+ if (!(ctl & INTEL_PT_CYC_ENABLE)) -+ return 0; -+ -+ return (ctl & INTEL_PT_CYC_THRESHOLD) >> INTEL_PT_CYC_THRESHOLD_SHIFT; -+} -+ - static void intel_pt_setup_period(struct intel_pt_decoder *decoder) - { - if (decoder->period_type == INTEL_PT_PERIOD_TICKS) { -@@ -245,12 +262,15 @@ struct intel_pt_decoder *intel_pt_decoder_new(struct intel_pt_params *params) - - decoder->flags = params->flags; - -+ decoder->ctl = params->ctl; - decoder->period = params->period; - decoder->period_type = params->period_type; - - decoder->max_non_turbo_ratio = params->max_non_turbo_ratio; - decoder->max_non_turbo_ratio_fp = params->max_non_turbo_ratio; - -+ decoder->cyc_threshold = intel_pt_cyc_threshold(decoder->ctl); -+ - intel_pt_setup_period(decoder); - - decoder->mtc_shift = params->mtc_period; -@@ -1761,6 +1781,9 @@ static int intel_pt_walk_psbend(struct intel_pt_decoder *decoder) - break; - - case INTEL_PT_CYC: -+ intel_pt_calc_cyc_timestamp(decoder); -+ break; -+ - case INTEL_PT_VMCS: - case INTEL_PT_MNT: - case INTEL_PT_PAD: -@@ -2014,6 +2037,7 @@ static int intel_pt_hop_trace(struct intel_pt_decoder *decoder, bool *no_tip, in - - static int intel_pt_walk_trace(struct intel_pt_decoder *decoder) - { -+ int last_packet_type = INTEL_PT_PAD; - bool no_tip = false; - int err; - -@@ -2022,6 +2046,12 @@ static int intel_pt_walk_trace(struct intel_pt_decoder *decoder) - if (err) - return err; - next: -+ if (decoder->cyc_threshold) { -+ if (decoder->sample_cyc && last_packet_type != INTEL_PT_CYC) -+ decoder->sample_cyc = false; -+ last_packet_type = decoder->packet.type; -+ } -+ - if (decoder->hop) { - switch (intel_pt_hop_trace(decoder, &no_tip, &err)) { - case HOP_IGNORE: -@@ -2811,9 +2841,18 @@ const struct intel_pt_state *intel_pt_decode(struct intel_pt_decoder *decoder) - } - if (intel_pt_sample_time(decoder->pkt_state)) { - intel_pt_update_sample_time(decoder); -- if (decoder->sample_cyc) -+ if (decoder->sample_cyc) { - decoder->sample_tot_cyc_cnt = decoder->tot_cyc_cnt; -+ decoder->state.flags |= INTEL_PT_SAMPLE_IPC; -+ decoder->sample_cyc = false; -+ } - } -+ /* -+ * When using only TSC/MTC to compute cycles, IPC can be -+ * sampled as soon as the cycle count changes. -+ */ -+ if (!decoder->have_cyc) -+ decoder->state.flags |= INTEL_PT_SAMPLE_IPC; - } - - decoder->state.timestamp = decoder->sample_timestamp; -diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h -index 8645fc2654811..48adaa78acfc2 100644 ---- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h -+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h -@@ -17,6 +17,7 @@ - #define INTEL_PT_ABORT_TX (1 << 1) - #define INTEL_PT_ASYNC (1 << 2) - #define INTEL_PT_FUP_IP (1 << 3) -+#define INTEL_PT_SAMPLE_IPC (1 << 4) - - enum intel_pt_sample_type { - INTEL_PT_BRANCH = 1 << 0, -@@ -243,6 +244,7 @@ struct intel_pt_params { - void *data; - bool return_compression; - bool branch_enable; -+ uint64_t ctl; - uint64_t period; - enum intel_pt_period_type period_type; - unsigned max_non_turbo_ratio; -diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c -index 60214de42f31b..2fff6f760457f 100644 ---- a/tools/perf/util/intel-pt.c -+++ b/tools/perf/util/intel-pt.c -@@ -893,6 +893,18 @@ static bool intel_pt_sampling_mode(struct intel_pt *pt) - return false; - } - -+static u64 intel_pt_ctl(struct intel_pt *pt) -+{ -+ struct evsel *evsel; -+ u64 config; -+ -+ evlist__for_each_entry(pt->session->evlist, evsel) { -+ if (intel_pt_get_config(pt, &evsel->core.attr, &config)) -+ return config; -+ } -+ return 0; -+} -+ - static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns) - { - u64 quot, rem; -@@ -1026,6 +1038,7 @@ static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt, - params.data = ptq; - params.return_compression = intel_pt_return_compression(pt); - params.branch_enable = intel_pt_branch_enable(pt); -+ params.ctl = intel_pt_ctl(pt); - params.max_non_turbo_ratio = pt->max_non_turbo_ratio; - params.mtc_period = intel_pt_mtc_period(pt); - params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n; -@@ -1381,7 +1394,8 @@ static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq) - sample.branch_stack = (struct branch_stack *)&dummy_bs; - } - -- sample.cyc_cnt = ptq->ipc_cyc_cnt - ptq->last_br_cyc_cnt; -+ if (ptq->state->flags & INTEL_PT_SAMPLE_IPC) -+ sample.cyc_cnt = ptq->ipc_cyc_cnt - ptq->last_br_cyc_cnt; - if (sample.cyc_cnt) { - sample.insn_cnt = ptq->ipc_insn_cnt - ptq->last_br_insn_cnt; - ptq->last_br_insn_cnt = ptq->ipc_insn_cnt; -@@ -1431,7 +1445,8 @@ static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq) - else - sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt; - -- sample.cyc_cnt = ptq->ipc_cyc_cnt - ptq->last_in_cyc_cnt; -+ if (ptq->state->flags & INTEL_PT_SAMPLE_IPC) -+ sample.cyc_cnt = ptq->ipc_cyc_cnt - ptq->last_in_cyc_cnt; - if (sample.cyc_cnt) { - sample.insn_cnt = ptq->ipc_insn_cnt - ptq->last_in_insn_cnt; - ptq->last_in_insn_cnt = ptq->ipc_insn_cnt; -@@ -1966,14 +1981,8 @@ static int intel_pt_sample(struct intel_pt_queue *ptq) - - ptq->have_sample = false; - -- if (ptq->state->tot_cyc_cnt > ptq->ipc_cyc_cnt) { -- /* -- * Cycle count and instruction count only go together to create -- * a valid IPC ratio when the cycle count changes. -- */ -- ptq->ipc_insn_cnt = ptq->state->tot_insn_cnt; -- ptq->ipc_cyc_cnt = ptq->state->tot_cyc_cnt; -- } -+ ptq->ipc_insn_cnt = ptq->state->tot_insn_cnt; -+ ptq->ipc_cyc_cnt = ptq->state->tot_cyc_cnt; - - /* - * Do PEBS first to allow for the possibility that the PEBS timestamp -diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c -index 64a039cbba1b5..7dcf3327c5f7d 100644 ---- a/tools/perf/util/symbol.c -+++ b/tools/perf/util/symbol.c -@@ -1561,12 +1561,11 @@ static int bfd2elf_binding(asymbol *symbol) - int dso__load_bfd_symbols(struct dso *dso, const char *debugfile) - { - int err = -1; -- long symbols_size, symbols_count; -+ long symbols_size, symbols_count, i; - asection *section; - asymbol **symbols, *sym; - struct symbol *symbol; - bfd *abfd; -- u_int i; - u64 start, len; - - abfd = bfd_openr(dso->long_name, NULL); -@@ -1867,8 +1866,10 @@ int dso__load(struct dso *dso, struct map *map) - if (nsexit) - nsinfo__mountns_enter(dso->nsinfo, &nsc); - -- if (bfdrc == 0) -+ if (bfdrc == 0) { -+ ret = 0; - break; -+ } - - if (!is_reg || sirc < 0) - continue; -diff --git a/tools/perf/util/unwind-libdw.c b/tools/perf/util/unwind-libdw.c -index 0ada907c60d49..a74b517f74974 100644 ---- a/tools/perf/util/unwind-libdw.c -+++ b/tools/perf/util/unwind-libdw.c -@@ -60,10 +60,8 @@ static int __report_module(struct addr_location *al, u64 ip, - mod = dwfl_addrmodule(ui->dwfl, ip); - if (mod) { - Dwarf_Addr s; -- void **userdatap; - -- dwfl_module_info(mod, &userdatap, &s, NULL, NULL, NULL, NULL, NULL); -- *userdatap = dso; -+ dwfl_module_info(mod, NULL, &s, NULL, NULL, NULL, NULL, NULL); - if (s != al->map->start - al->map->pgoff) - mod = 0; - } -@@ -79,6 +77,13 @@ static int __report_module(struct addr_location *al, u64 ip, - al->map->start - al->map->pgoff, false); - } - -+ if (mod) { -+ void **userdatap; -+ -+ dwfl_module_info(mod, &userdatap, NULL, NULL, NULL, NULL, NULL, NULL); -+ *userdatap = dso; -+ } -+ - return mod && dwfl_addrmodule(ui->dwfl, ip) == mod ? 0 : -1; - } - -diff --git a/tools/testing/kunit/kunit_tool_test.py b/tools/testing/kunit/kunit_tool_test.py -index b593f4448e839..9a036e9d44554 100755 ---- a/tools/testing/kunit/kunit_tool_test.py -+++ b/tools/testing/kunit/kunit_tool_test.py -@@ -288,19 +288,17 @@ class StrContains(str): - class KUnitMainTest(unittest.TestCase): - def setUp(self): - path = get_absolute_path('test_data/test_is_test_passed-all_passed.log') -- file = open(path) -- all_passed_log = file.readlines() -- self.print_patch = mock.patch('builtins.print') -- self.print_mock = self.print_patch.start() -+ with open(path) as file: -+ all_passed_log = file.readlines() -+ -+ self.print_mock = mock.patch('builtins.print').start() -+ self.addCleanup(mock.patch.stopall) -+ - self.linux_source_mock = mock.Mock() - self.linux_source_mock.build_reconfig = mock.Mock(return_value=True) - self.linux_source_mock.build_um_kernel = mock.Mock(return_value=True) - self.linux_source_mock.run_kernel = mock.Mock(return_value=all_passed_log) - -- def tearDown(self): -- self.print_patch.stop() -- pass -- - def test_config_passes_args_pass(self): - kunit.main(['config', '--build_dir=.kunit'], self.linux_source_mock) - assert self.linux_source_mock.build_reconfig.call_count == 1 -diff --git a/tools/testing/scatterlist/main.c b/tools/testing/scatterlist/main.c -index 71c960dcd8a42..652254754b4cb 100644 ---- a/tools/testing/scatterlist/main.c -+++ b/tools/testing/scatterlist/main.c -@@ -55,7 +55,6 @@ int main(void) - struct test *test, tests[] = { - { -EINVAL, 1, pfn(0), NULL, PAGE_SIZE, 0, 1 }, - { 0, 1, pfn(0), NULL, PAGE_SIZE, PAGE_SIZE + 1, 1 }, -- { 0, 1, pfn(0), NULL, PAGE_SIZE, sgmax + 1, 1 }, - { 0, 1, pfn(0), NULL, PAGE_SIZE, sgmax, 1 }, - { 0, 1, pfn(0), NULL, 1, sgmax, 1 }, - { 0, 2, pfn(0, 1), NULL, 2 * PAGE_SIZE, sgmax, 1 }, -diff --git a/tools/testing/selftests/bpf/prog_tests/btf_map_in_map.c b/tools/testing/selftests/bpf/prog_tests/btf_map_in_map.c -index 76ebe4c250f11..eb90a6b8850d2 100644 ---- a/tools/testing/selftests/bpf/prog_tests/btf_map_in_map.c -+++ b/tools/testing/selftests/bpf/prog_tests/btf_map_in_map.c -@@ -20,39 +20,6 @@ static __u32 bpf_map_id(struct bpf_map *map) - return info.id; - } - --/* -- * Trigger synchronize_rcu() in kernel. -- * -- * ARRAY_OF_MAPS/HASH_OF_MAPS lookup/update operations trigger synchronize_rcu() -- * if looking up an existing non-NULL element or updating the map with a valid -- * inner map FD. Use this fact to trigger synchronize_rcu(): create map-in-map, -- * create a trivial ARRAY map, update map-in-map with ARRAY inner map. Then -- * cleanup. At the end, at least one synchronize_rcu() would be called. -- */ --static int kern_sync_rcu(void) --{ -- int inner_map_fd, outer_map_fd, err, zero = 0; -- -- inner_map_fd = bpf_create_map(BPF_MAP_TYPE_ARRAY, 4, 4, 1, 0); -- if (CHECK(inner_map_fd < 0, "inner_map_create", "failed %d\n", -errno)) -- return -1; -- -- outer_map_fd = bpf_create_map_in_map(BPF_MAP_TYPE_ARRAY_OF_MAPS, NULL, -- sizeof(int), inner_map_fd, 1, 0); -- if (CHECK(outer_map_fd < 0, "outer_map_create", "failed %d\n", -errno)) { -- close(inner_map_fd); -- return -1; -- } -- -- err = bpf_map_update_elem(outer_map_fd, &zero, &inner_map_fd, 0); -- if (err) -- err = -errno; -- CHECK(err, "outer_map_update", "failed %d\n", err); -- close(inner_map_fd); -- close(outer_map_fd); -- return err; --} -- - static void test_lookup_update(void) - { - int map1_fd, map2_fd, map3_fd, map4_fd, map5_fd, map1_id, map2_id; -diff --git a/tools/testing/selftests/bpf/test_progs.c b/tools/testing/selftests/bpf/test_progs.c -index 7d077d48cadd0..6396932b97e29 100644 ---- a/tools/testing/selftests/bpf/test_progs.c -+++ b/tools/testing/selftests/bpf/test_progs.c -@@ -11,6 +11,7 @@ - #include - #include - #include /* backtrace */ -+#include - - #define EXIT_NO_TEST 2 - #define EXIT_ERR_SETUP_INFRA 3 -@@ -370,8 +371,18 @@ static int delete_module(const char *name, int flags) - return syscall(__NR_delete_module, name, flags); - } - -+/* -+ * Trigger synchronize_rcu() in kernel. -+ */ -+int kern_sync_rcu(void) -+{ -+ return syscall(__NR_membarrier, MEMBARRIER_CMD_SHARED, 0, 0); -+} -+ - static void unload_bpf_testmod(void) - { -+ if (kern_sync_rcu()) -+ fprintf(env.stderr, "Failed to trigger kernel-side RCU sync!\n"); - if (delete_module("bpf_testmod", 0)) { - if (errno == ENOENT) { - if (env.verbosity > VERBOSE_NONE) -@@ -379,7 +390,7 @@ static void unload_bpf_testmod(void) - return; - } - fprintf(env.stderr, "Failed to unload bpf_testmod.ko from kernel: %d\n", -errno); -- exit(1); -+ return; - } - if (env.verbosity > VERBOSE_NONE) - fprintf(stdout, "Successfully unloaded bpf_testmod.ko.\n"); -diff --git a/tools/testing/selftests/bpf/test_progs.h b/tools/testing/selftests/bpf/test_progs.h -index 115953243f623..e49e2fdde9425 100644 ---- a/tools/testing/selftests/bpf/test_progs.h -+++ b/tools/testing/selftests/bpf/test_progs.h -@@ -219,6 +219,7 @@ int bpf_find_map(const char *test, struct bpf_object *obj, const char *name); - int compare_map_keys(int map1_fd, int map2_fd); - int compare_stack_ips(int smap_fd, int amap_fd, int stack_trace_len); - int extract_build_id(char *build_id, size_t size); -+int kern_sync_rcu(void); - - #ifdef __x86_64__ - #define SYS_NANOSLEEP_KPROBE_NAME "__x64_sys_nanosleep" -diff --git a/tools/testing/selftests/bpf/test_xdp_redirect.sh b/tools/testing/selftests/bpf/test_xdp_redirect.sh -index dd80f0c84afb4..c033850886f44 100755 ---- a/tools/testing/selftests/bpf/test_xdp_redirect.sh -+++ b/tools/testing/selftests/bpf/test_xdp_redirect.sh -@@ -1,4 +1,4 @@ --#!/bin/sh -+#!/bin/bash - # Create 2 namespaces with two veth peers, and - # forward packets in-between using generic XDP - # -@@ -57,12 +57,8 @@ test_xdp_redirect() - ip link set dev veth1 $xdpmode obj test_xdp_redirect.o sec redirect_to_222 &> /dev/null - ip link set dev veth2 $xdpmode obj test_xdp_redirect.o sec redirect_to_111 &> /dev/null - -- ip netns exec ns1 ping -c 1 10.1.1.22 &> /dev/null -- local ret1=$? -- ip netns exec ns2 ping -c 1 10.1.1.11 &> /dev/null -- local ret2=$? -- -- if [ $ret1 -eq 0 -a $ret2 -eq 0 ]; then -+ if ip netns exec ns1 ping -c 1 10.1.1.22 &> /dev/null && -+ ip netns exec ns2 ping -c 1 10.1.1.11 &> /dev/null; then - echo "selftests: test_xdp_redirect $xdpmode [PASS]"; - else - ret=1 -diff --git a/tools/testing/selftests/dmabuf-heaps/Makefile b/tools/testing/selftests/dmabuf-heaps/Makefile -index 607c2acd20829..604b43ece15f5 100644 ---- a/tools/testing/selftests/dmabuf-heaps/Makefile -+++ b/tools/testing/selftests/dmabuf-heaps/Makefile -@@ -1,5 +1,5 @@ - # SPDX-License-Identifier: GPL-2.0 --CFLAGS += -static -O3 -Wl,-no-as-needed -Wall -I../../../../usr/include -+CFLAGS += -static -O3 -Wl,-no-as-needed -Wall - - TEST_GEN_PROGS = dmabuf-heap - -diff --git a/tools/testing/selftests/ftrace/test.d/trigger/inter-event/trigger-synthetic_event_syntax_errors.tc b/tools/testing/selftests/ftrace/test.d/trigger/inter-event/trigger-synthetic_event_syntax_errors.tc -index ada594fe16cb3..955e3ceea44b5 100644 ---- a/tools/testing/selftests/ftrace/test.d/trigger/inter-event/trigger-synthetic_event_syntax_errors.tc -+++ b/tools/testing/selftests/ftrace/test.d/trigger/inter-event/trigger-synthetic_event_syntax_errors.tc -@@ -1,19 +1,38 @@ - #!/bin/sh - # SPDX-License-Identifier: GPL-2.0 - # description: event trigger - test synthetic_events syntax parser errors --# requires: synthetic_events error_log -+# requires: synthetic_events error_log "char name[]' >> synthetic_events":README - - check_error() { # command-with-error-pos-by-^ - ftrace_errlog_check 'synthetic_events' "$1" 'synthetic_events' - } - -+check_dyn_error() { # command-with-error-pos-by-^ -+ ftrace_errlog_check 'synthetic_events' "$1" 'dynamic_events' -+} -+ - check_error 'myevent ^chr arg' # INVALID_TYPE --check_error 'myevent ^char str[];; int v' # INVALID_TYPE --check_error 'myevent char ^str]; int v' # INVALID_NAME --check_error 'myevent char ^str;[]' # INVALID_NAME --check_error 'myevent ^char str[; int v' # INVALID_TYPE --check_error '^mye;vent char str[]' # BAD_NAME --check_error 'myevent char str[]; ^int' # INVALID_FIELD --check_error '^myevent' # INCOMPLETE_CMD -+check_error 'myevent ^unsigned arg' # INCOMPLETE_TYPE -+ -+check_error 'myevent char ^str]; int v' # BAD_NAME -+check_error '^mye-vent char str[]' # BAD_NAME -+check_error 'myevent char ^st-r[]' # BAD_NAME -+ -+check_error 'myevent char str;^[]' # INVALID_FIELD -+check_error 'myevent char str; ^int' # INVALID_FIELD -+ -+check_error 'myevent char ^str[; int v' # INVALID_ARRAY_SPEC -+check_error 'myevent char ^str[kdjdk]' # INVALID_ARRAY_SPEC -+check_error 'myevent char ^str[257]' # INVALID_ARRAY_SPEC -+ -+check_error '^mye;vent char str[]' # INVALID_CMD -+check_error '^myevent ; char str[]' # INVALID_CMD -+check_error '^myevent; char str[]' # INVALID_CMD -+check_error '^myevent ;char str[]' # INVALID_CMD -+check_error '^; char str[]' # INVALID_CMD -+check_error '^;myevent char str[]' # INVALID_CMD -+check_error '^myevent' # INVALID_CMD -+ -+check_dyn_error '^s:junk/myevent char str[' # INVALID_DYN_CMD - - exit 0 -diff --git a/tools/testing/selftests/net/mptcp/mptcp_connect.sh b/tools/testing/selftests/net/mptcp/mptcp_connect.sh -index 2cfd87d94db89..e927df83efb91 100755 ---- a/tools/testing/selftests/net/mptcp/mptcp_connect.sh -+++ b/tools/testing/selftests/net/mptcp/mptcp_connect.sh -@@ -493,7 +493,7 @@ do_transfer() - echo "${listener_ns} SYNRX: ${cl_proto} -> ${srv_proto}: expect ${expect_synrx}, got ${stat_synrx_now_l}" - fi - if [ $expect_ackrx -ne $stat_ackrx_now_l ] ;then -- echo "${listener_ns} ACKRX: ${cl_proto} -> ${srv_proto}: expect ${expect_synrx}, got ${stat_synrx_now_l}" -+ echo "${listener_ns} ACKRX: ${cl_proto} -> ${srv_proto}: expect ${expect_ackrx}, got ${stat_ackrx_now_l} " - fi - - if [ $retc -eq 0 ] && [ $rets -eq 0 ];then -diff --git a/tools/testing/selftests/powerpc/eeh/eeh-basic.sh b/tools/testing/selftests/powerpc/eeh/eeh-basic.sh -index 0d783e1065c86..64779f073e177 100755 ---- a/tools/testing/selftests/powerpc/eeh/eeh-basic.sh -+++ b/tools/testing/selftests/powerpc/eeh/eeh-basic.sh -@@ -86,5 +86,5 @@ echo "$failed devices failed to recover ($dev_count tested)" - lspci | diff -u $pre_lspci - - rm -f $pre_lspci - --test "$failed" == 0 -+test "$failed" -eq 0 - exit $? -diff --git a/tools/testing/selftests/seccomp/seccomp_bpf.c b/tools/testing/selftests/seccomp/seccomp_bpf.c -index 26c72f2b61b1b..1b6c7d33c4ff2 100644 ---- a/tools/testing/selftests/seccomp/seccomp_bpf.c -+++ b/tools/testing/selftests/seccomp/seccomp_bpf.c -@@ -315,7 +315,7 @@ TEST(kcmp) - ret = __filecmp(getpid(), getpid(), 1, 1); - EXPECT_EQ(ret, 0); - if (ret != 0 && errno == ENOSYS) -- SKIP(return, "Kernel does not support kcmp() (missing CONFIG_CHECKPOINT_RESTORE?)"); -+ SKIP(return, "Kernel does not support kcmp() (missing CONFIG_KCMP?)"); - } - - TEST(mode_strict_support) -diff --git a/tools/testing/selftests/wireguard/netns.sh b/tools/testing/selftests/wireguard/netns.sh -index 74c69b75f6f5a..7ed7cd95e58fe 100755 ---- a/tools/testing/selftests/wireguard/netns.sh -+++ b/tools/testing/selftests/wireguard/netns.sh -@@ -39,7 +39,7 @@ ip0() { pretty 0 "ip $*"; ip -n $netns0 "$@"; } - ip1() { pretty 1 "ip $*"; ip -n $netns1 "$@"; } - ip2() { pretty 2 "ip $*"; ip -n $netns2 "$@"; } - sleep() { read -t "$1" -N 1 || true; } --waitiperf() { pretty "${1//*-}" "wait for iperf:5201 pid $2"; while [[ $(ss -N "$1" -tlpH 'sport = 5201') != *\"iperf3\",pid=$2,fd=* ]]; do sleep 0.1; done; } -+waitiperf() { pretty "${1//*-}" "wait for iperf:${3:-5201} pid $2"; while [[ $(ss -N "$1" -tlpH "sport = ${3:-5201}") != *\"iperf3\",pid=$2,fd=* ]]; do sleep 0.1; done; } - waitncatudp() { pretty "${1//*-}" "wait for udp:1111 pid $2"; while [[ $(ss -N "$1" -ulpH 'sport = 1111') != *\"ncat\",pid=$2,fd=* ]]; do sleep 0.1; done; } - waitiface() { pretty "${1//*-}" "wait for $2 to come up"; ip netns exec "$1" bash -c "while [[ \$(< \"/sys/class/net/$2/operstate\") != up ]]; do read -t .1 -N 0 || true; done;"; } - -@@ -141,6 +141,19 @@ tests() { - n2 iperf3 -s -1 -B fd00::2 & - waitiperf $netns2 $! - n1 iperf3 -Z -t 3 -b 0 -u -c fd00::2 -+ -+ # TCP over IPv4, in parallel -+ for max in 4 5 50; do -+ local pids=( ) -+ for ((i=0; i < max; ++i)) do -+ n2 iperf3 -p $(( 5200 + i )) -s -1 -B 192.168.241.2 & -+ pids+=( $! ); waitiperf $netns2 $! $(( 5200 + i )) -+ done -+ for ((i=0; i < max; ++i)) do -+ n1 iperf3 -Z -t 3 -p $(( 5200 + i )) -c 192.168.241.2 & -+ done -+ wait "${pids[@]}" -+ done - } - - [[ $(ip1 link show dev wg0) =~ mtu\ ([0-9]+) ]] && orig_mtu="${BASH_REMATCH[1]}" diff --git a/sys-kernel/pinephone-sources/files/5.11.5.patch b/sys-kernel/pinephone-sources/files/5.11.5.patch deleted file mode 100644 index cd533a8..0000000 --- a/sys-kernel/pinephone-sources/files/5.11.5.patch +++ /dev/null @@ -1,1526 +0,0 @@ -diff --git a/Makefile b/Makefile -index cb9a8e8239511..1673c12fb4b35 100644 ---- a/Makefile -+++ b/Makefile -@@ -1,7 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0 - VERSION = 5 - PATCHLEVEL = 11 --SUBLEVEL = 4 -+SUBLEVEL = 5 - EXTRAVERSION = - NAME = 💕 Valentine's Day Edition 💕 - -diff --git a/arch/ia64/kernel/signal.c b/arch/ia64/kernel/signal.c -index e67b22fc3c60b..c1b299760bf7a 100644 ---- a/arch/ia64/kernel/signal.c -+++ b/arch/ia64/kernel/signal.c -@@ -341,7 +341,8 @@ ia64_do_signal (struct sigscratch *scr, long in_syscall) - * need to push through a forced SIGSEGV. - */ - while (1) { -- get_signal(&ksig); -+ if (!get_signal(&ksig)) -+ break; - - /* - * get_signal() may have run a debugger (via notify_parent()) -diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c -index bfda153b1a41d..87682dcb64ec3 100644 ---- a/drivers/base/power/runtime.c -+++ b/drivers/base/power/runtime.c -@@ -325,22 +325,22 @@ static void rpm_put_suppliers(struct device *dev) - static int __rpm_callback(int (*cb)(struct device *), struct device *dev) - __releases(&dev->power.lock) __acquires(&dev->power.lock) - { -- int retval, idx; - bool use_links = dev->power.links_count > 0; -+ bool get = false; -+ int retval, idx; -+ bool put; - - if (dev->power.irq_safe) { - spin_unlock(&dev->power.lock); -+ } else if (!use_links) { -+ spin_unlock_irq(&dev->power.lock); - } else { -+ get = dev->power.runtime_status == RPM_RESUMING; -+ - spin_unlock_irq(&dev->power.lock); - -- /* -- * Resume suppliers if necessary. -- * -- * The device's runtime PM status cannot change until this -- * routine returns, so it is safe to read the status outside of -- * the lock. -- */ -- if (use_links && dev->power.runtime_status == RPM_RESUMING) { -+ /* Resume suppliers if necessary. */ -+ if (get) { - idx = device_links_read_lock(); - - retval = rpm_get_suppliers(dev); -@@ -355,24 +355,36 @@ static int __rpm_callback(int (*cb)(struct device *), struct device *dev) - - if (dev->power.irq_safe) { - spin_lock(&dev->power.lock); -- } else { -- /* -- * If the device is suspending and the callback has returned -- * success, drop the usage counters of the suppliers that have -- * been reference counted on its resume. -- * -- * Do that if resume fails too. -- */ -- if (use_links -- && ((dev->power.runtime_status == RPM_SUSPENDING && !retval) -- || (dev->power.runtime_status == RPM_RESUMING && retval))) { -- idx = device_links_read_lock(); -+ return retval; -+ } - -- fail: -- rpm_put_suppliers(dev); -+ spin_lock_irq(&dev->power.lock); - -- device_links_read_unlock(idx); -- } -+ if (!use_links) -+ return retval; -+ -+ /* -+ * If the device is suspending and the callback has returned success, -+ * drop the usage counters of the suppliers that have been reference -+ * counted on its resume. -+ * -+ * Do that if the resume fails too. -+ */ -+ put = dev->power.runtime_status == RPM_SUSPENDING && !retval; -+ if (put) -+ __update_runtime_status(dev, RPM_SUSPENDED); -+ else -+ put = get && retval; -+ -+ if (put) { -+ spin_unlock_irq(&dev->power.lock); -+ -+ idx = device_links_read_lock(); -+ -+fail: -+ rpm_put_suppliers(dev); -+ -+ device_links_read_unlock(idx); - - spin_lock_irq(&dev->power.lock); - } -diff --git a/drivers/block/rsxx/core.c b/drivers/block/rsxx/core.c -index 63f549889f875..5ac1881396afb 100644 ---- a/drivers/block/rsxx/core.c -+++ b/drivers/block/rsxx/core.c -@@ -165,15 +165,17 @@ static ssize_t rsxx_cram_read(struct file *fp, char __user *ubuf, - { - struct rsxx_cardinfo *card = file_inode(fp)->i_private; - char *buf; -- ssize_t st; -+ int st; - - buf = kzalloc(cnt, GFP_KERNEL); - if (!buf) - return -ENOMEM; - - st = rsxx_creg_read(card, CREG_ADD_CRAM + (u32)*ppos, cnt, buf, 1); -- if (!st) -- st = copy_to_user(ubuf, buf, cnt); -+ if (!st) { -+ if (copy_to_user(ubuf, buf, cnt)) -+ st = -EFAULT; -+ } - kfree(buf); - if (st) - return st; -diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c -index 431919d5f48af..a2e0395cbe618 100644 ---- a/drivers/char/tpm/tpm_tis_core.c -+++ b/drivers/char/tpm/tpm_tis_core.c -@@ -707,12 +707,22 @@ static int tpm_tis_gen_interrupt(struct tpm_chip *chip) - const char *desc = "attempting to generate an interrupt"; - u32 cap2; - cap_t cap; -+ int ret; - -+ /* TPM 2.0 */ - if (chip->flags & TPM_CHIP_FLAG_TPM2) - return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc); -- else -- return tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, -- 0); -+ -+ /* TPM 1.2 */ -+ ret = request_locality(chip, 0); -+ if (ret < 0) -+ return ret; -+ -+ ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0); -+ -+ release_locality(chip, 0); -+ -+ return ret; - } - - /* Register the IRQ and issue a command that will cause an interrupt. If an -@@ -1019,11 +1029,21 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, - init_waitqueue_head(&priv->read_queue); - init_waitqueue_head(&priv->int_queue); - if (irq != -1) { -- /* Before doing irq testing issue a command to the TPM in polling mode -+ /* -+ * Before doing irq testing issue a command to the TPM in polling mode - * to make sure it works. May as well use that command to set the - * proper timeouts for the driver. - */ -- if (tpm_get_timeouts(chip)) { -+ -+ rc = request_locality(chip, 0); -+ if (rc < 0) -+ goto out_err; -+ -+ rc = tpm_get_timeouts(chip); -+ -+ release_locality(chip, 0); -+ -+ if (rc) { - dev_err(dev, "Could not get TPM timeouts and durations\n"); - rc = -ENODEV; - goto out_err; -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c -index 8155c54392c88..36a741d63ddcf 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c -@@ -903,10 +903,11 @@ void amdgpu_acpi_fini(struct amdgpu_device *adev) - */ - bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev) - { -+#if defined(CONFIG_AMD_PMC) - if (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0) { - if (adev->flags & AMD_IS_APU) - return true; - } -- -+#endif - return false; - } -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c -index a6667a2ca0db3..c2190c3e97f31 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c -@@ -356,7 +356,7 @@ static ssize_t amdgpu_debugfs_regs_pcie_read(struct file *f, char __user *buf, - while (size) { - uint32_t value; - -- value = RREG32_PCIE(*pos >> 2); -+ value = RREG32_PCIE(*pos); - r = put_user(value, (uint32_t *)buf); - if (r) { - pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); -@@ -423,7 +423,7 @@ static ssize_t amdgpu_debugfs_regs_pcie_write(struct file *f, const char __user - return r; - } - -- WREG32_PCIE(*pos >> 2, value); -+ WREG32_PCIE(*pos, value); - - result += 4; - buf += 4; -diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c -index 6bee3677394ac..22b96b7d3647f 100644 ---- a/drivers/gpu/drm/amd/amdgpu/nv.c -+++ b/drivers/gpu/drm/amd/amdgpu/nv.c -@@ -498,7 +498,8 @@ static bool nv_is_headless_sku(struct pci_dev *pdev) - { - if ((pdev->device == 0x731E && - (pdev->revision == 0xC6 || pdev->revision == 0xC7)) || -- (pdev->device == 0x7340 && pdev->revision == 0xC9)) -+ (pdev->device == 0x7340 && pdev->revision == 0xC9) || -+ (pdev->device == 0x7360 && pdev->revision == 0xC7)) - return true; - return false; - } -@@ -568,7 +569,8 @@ int nv_set_ip_blocks(struct amdgpu_device *adev) - if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT && - !amdgpu_sriov_vf(adev)) - amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); -- amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); -+ if (!nv_is_headless_sku(adev->pdev)) -+ amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); - if (!amdgpu_sriov_vf(adev)) - amdgpu_device_ip_block_add(adev, &jpeg_v2_0_ip_block); - break; -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c -index 5aeb5f5a04478..9be8e1888daf4 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c -@@ -78,6 +78,9 @@ MODULE_FIRMWARE("amdgpu/dimgrey_cavefish_smc.bin"); - #define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK 0xC000 - #define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT 0xE - -+#define mmTHM_BACO_CNTL_ARCT 0xA7 -+#define mmTHM_BACO_CNTL_ARCT_BASE_IDX 0 -+ - static int link_width[] = {0, 1, 2, 4, 8, 12, 16}; - static int link_speed[] = {25, 50, 80, 160}; - -@@ -1581,9 +1584,15 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state) - break; - default: - if (!ras || !ras->supported) { -- data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL); -- data |= 0x80000000; -- WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data); -+ if (adev->asic_type == CHIP_ARCTURUS) { -+ data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL_ARCT); -+ data |= 0x80000000; -+ WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL_ARCT, data); -+ } else { -+ data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL); -+ data |= 0x80000000; -+ WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data); -+ } - - ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 0, NULL); - } else { -diff --git a/drivers/infiniband/core/cm.c b/drivers/infiniband/core/cm.c -index be996dba040cc..3d194bb608405 100644 ---- a/drivers/infiniband/core/cm.c -+++ b/drivers/infiniband/core/cm.c -@@ -3651,6 +3651,7 @@ static int cm_send_sidr_rep_locked(struct cm_id_private *cm_id_priv, - struct ib_cm_sidr_rep_param *param) - { - struct ib_mad_send_buf *msg; -+ unsigned long flags; - int ret; - - lockdep_assert_held(&cm_id_priv->lock); -@@ -3676,12 +3677,12 @@ static int cm_send_sidr_rep_locked(struct cm_id_private *cm_id_priv, - return ret; - } - cm_id_priv->id.state = IB_CM_IDLE; -- spin_lock_irq(&cm.lock); -+ spin_lock_irqsave(&cm.lock, flags); - if (!RB_EMPTY_NODE(&cm_id_priv->sidr_id_node)) { - rb_erase(&cm_id_priv->sidr_id_node, &cm.remote_sidr_table); - RB_CLEAR_NODE(&cm_id_priv->sidr_id_node); - } -- spin_unlock_irq(&cm.lock); -+ spin_unlock_irqrestore(&cm.lock, flags); - return 0; - } - -diff --git a/drivers/infiniband/hw/mlx5/devx.c b/drivers/infiniband/hw/mlx5/devx.c -index ff8e17d7f7ca8..8161035eb7740 100644 ---- a/drivers/infiniband/hw/mlx5/devx.c -+++ b/drivers/infiniband/hw/mlx5/devx.c -@@ -1970,8 +1970,10 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)( - - num_alloc_xa_entries++; - event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL); -- if (!event_sub) -+ if (!event_sub) { -+ err = -ENOMEM; - goto err; -+ } - - list_add_tail(&event_sub->event_list, &sub_list); - uverbs_uobject_get(&ev_file->uobj); -diff --git a/drivers/infiniband/sw/rxe/Kconfig b/drivers/infiniband/sw/rxe/Kconfig -index 4521490667925..06b8dc5093f77 100644 ---- a/drivers/infiniband/sw/rxe/Kconfig -+++ b/drivers/infiniband/sw/rxe/Kconfig -@@ -4,6 +4,7 @@ config RDMA_RXE - depends on INET && PCI && INFINIBAND - depends on INFINIBAND_VIRT_DMA - select NET_UDP_TUNNEL -+ select CRYPTO - select CRYPTO_CRC32 - help - This driver implements the InfiniBand RDMA transport over -diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c -index 4078358ed66ea..00fbc591a1425 100644 ---- a/drivers/iommu/dma-iommu.c -+++ b/drivers/iommu/dma-iommu.c -@@ -309,6 +309,11 @@ static void iommu_dma_flush_iotlb_all(struct iova_domain *iovad) - domain->ops->flush_iotlb_all(domain); - } - -+static bool dev_is_untrusted(struct device *dev) -+{ -+ return dev_is_pci(dev) && to_pci_dev(dev)->untrusted; -+} -+ - /** - * iommu_dma_init_domain - Initialise a DMA mapping domain - * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie() -@@ -363,8 +368,9 @@ static int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, - - init_iova_domain(iovad, 1UL << order, base_pfn); - -- if (!cookie->fq_domain && !iommu_domain_get_attr(domain, -- DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE, &attr) && attr) { -+ if (!cookie->fq_domain && (!dev || !dev_is_untrusted(dev)) && -+ !iommu_domain_get_attr(domain, DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE, &attr) && -+ attr) { - if (init_iova_flush_queue(iovad, iommu_dma_flush_iotlb_all, - iommu_dma_entry_dtor)) - pr_warn("iova flush queue initialization failed\n"); -@@ -521,11 +527,6 @@ static void __iommu_dma_unmap_swiotlb(struct device *dev, dma_addr_t dma_addr, - iova_align(iovad, size), dir, attrs); - } - --static bool dev_is_untrusted(struct device *dev) --{ -- return dev_is_pci(dev) && to_pci_dev(dev)->untrusted; --} -- - static dma_addr_t __iommu_dma_map(struct device *dev, phys_addr_t phys, - size_t size, int prot, u64 dma_mask) - { -diff --git a/drivers/iommu/intel/pasid.h b/drivers/iommu/intel/pasid.h -index 97dfcffbf495a..444c0bec221a4 100644 ---- a/drivers/iommu/intel/pasid.h -+++ b/drivers/iommu/intel/pasid.h -@@ -30,8 +30,8 @@ - #define VCMD_VRSP_IP 0x1 - #define VCMD_VRSP_SC(e) (((e) >> 1) & 0x3) - #define VCMD_VRSP_SC_SUCCESS 0 --#define VCMD_VRSP_SC_NO_PASID_AVAIL 1 --#define VCMD_VRSP_SC_INVALID_PASID 1 -+#define VCMD_VRSP_SC_NO_PASID_AVAIL 2 -+#define VCMD_VRSP_SC_INVALID_PASID 2 - #define VCMD_VRSP_RESULT_PASID(e) (((e) >> 8) & 0xfffff) - #define VCMD_CMD_OPERAND(e) ((e) << 8) - /* -diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c -index 4a3f095a1c267..97eb62f667d22 100644 ---- a/drivers/iommu/tegra-smmu.c -+++ b/drivers/iommu/tegra-smmu.c -@@ -798,10 +798,70 @@ static phys_addr_t tegra_smmu_iova_to_phys(struct iommu_domain *domain, - return SMMU_PFN_PHYS(pfn) + SMMU_OFFSET_IN_PAGE(iova); - } - -+static struct tegra_smmu *tegra_smmu_find(struct device_node *np) -+{ -+ struct platform_device *pdev; -+ struct tegra_mc *mc; -+ -+ pdev = of_find_device_by_node(np); -+ if (!pdev) -+ return NULL; -+ -+ mc = platform_get_drvdata(pdev); -+ if (!mc) -+ return NULL; -+ -+ return mc->smmu; -+} -+ -+static int tegra_smmu_configure(struct tegra_smmu *smmu, struct device *dev, -+ struct of_phandle_args *args) -+{ -+ const struct iommu_ops *ops = smmu->iommu.ops; -+ int err; -+ -+ err = iommu_fwspec_init(dev, &dev->of_node->fwnode, ops); -+ if (err < 0) { -+ dev_err(dev, "failed to initialize fwspec: %d\n", err); -+ return err; -+ } -+ -+ err = ops->of_xlate(dev, args); -+ if (err < 0) { -+ dev_err(dev, "failed to parse SW group ID: %d\n", err); -+ iommu_fwspec_free(dev); -+ return err; -+ } -+ -+ return 0; -+} -+ - static struct iommu_device *tegra_smmu_probe_device(struct device *dev) - { -- struct tegra_smmu *smmu = dev_iommu_priv_get(dev); -+ struct device_node *np = dev->of_node; -+ struct tegra_smmu *smmu = NULL; -+ struct of_phandle_args args; -+ unsigned int index = 0; -+ int err; -+ -+ while (of_parse_phandle_with_args(np, "iommus", "#iommu-cells", index, -+ &args) == 0) { -+ smmu = tegra_smmu_find(args.np); -+ if (smmu) { -+ err = tegra_smmu_configure(smmu, dev, &args); -+ of_node_put(args.np); - -+ if (err < 0) -+ return ERR_PTR(err); -+ -+ break; -+ } -+ -+ of_node_put(args.np); -+ index++; -+ } -+ -+ smmu = dev_iommu_priv_get(dev); - if (!smmu) - return ERR_PTR(-ENODEV); - -@@ -1028,6 +1088,16 @@ struct tegra_smmu *tegra_smmu_probe(struct device *dev, - if (!smmu) - return ERR_PTR(-ENOMEM); - -+ /* -+ * This is a bit of a hack. Ideally we'd want to simply return this -+ * value. However the IOMMU registration process will attempt to add -+ * all devices to the IOMMU when bus_set_iommu() is called. In order -+ * not to rely on global variables to track the IOMMU instance, we -+ * set it here so that it can be looked up from the .probe_device() -+ * callback via the IOMMU device's .drvdata field. -+ */ -+ mc->smmu = smmu; -+ - size = BITS_TO_LONGS(soc->num_asids) * sizeof(long); - - smmu->asids = devm_kzalloc(dev, size, GFP_KERNEL); -diff --git a/drivers/md/dm-bufio.c b/drivers/md/dm-bufio.c -index fce4cbf9529d6..50f3e673729c3 100644 ---- a/drivers/md/dm-bufio.c -+++ b/drivers/md/dm-bufio.c -@@ -1526,6 +1526,10 @@ EXPORT_SYMBOL_GPL(dm_bufio_get_block_size); - sector_t dm_bufio_get_device_size(struct dm_bufio_client *c) - { - sector_t s = i_size_read(c->bdev->bd_inode) >> SECTOR_SHIFT; -+ if (s >= c->start) -+ s -= c->start; -+ else -+ s = 0; - if (likely(c->sectors_per_block_bits >= 0)) - s >>= c->sectors_per_block_bits; - else -diff --git a/drivers/md/dm-verity-fec.c b/drivers/md/dm-verity-fec.c -index fb41b4f23c489..66f4c6398f670 100644 ---- a/drivers/md/dm-verity-fec.c -+++ b/drivers/md/dm-verity-fec.c -@@ -61,19 +61,18 @@ static int fec_decode_rs8(struct dm_verity *v, struct dm_verity_fec_io *fio, - static u8 *fec_read_parity(struct dm_verity *v, u64 rsb, int index, - unsigned *offset, struct dm_buffer **buf) - { -- u64 position, block; -+ u64 position, block, rem; - u8 *res; - - position = (index + rsb) * v->fec->roots; -- block = position >> v->data_dev_block_bits; -- *offset = (unsigned)(position - (block << v->data_dev_block_bits)); -+ block = div64_u64_rem(position, v->fec->roots << SECTOR_SHIFT, &rem); -+ *offset = (unsigned)rem; - -- res = dm_bufio_read(v->fec->bufio, v->fec->start + block, buf); -+ res = dm_bufio_read(v->fec->bufio, block, buf); - if (IS_ERR(res)) { - DMERR("%s: FEC %llu: parity read failed (block %llu): %ld", - v->data_dev->name, (unsigned long long)rsb, -- (unsigned long long)(v->fec->start + block), -- PTR_ERR(res)); -+ (unsigned long long)block, PTR_ERR(res)); - *buf = NULL; - } - -@@ -155,7 +154,7 @@ static int fec_decode_bufs(struct dm_verity *v, struct dm_verity_fec_io *fio, - - /* read the next block when we run out of parity bytes */ - offset += v->fec->roots; -- if (offset >= 1 << v->data_dev_block_bits) { -+ if (offset >= v->fec->roots << SECTOR_SHIFT) { - dm_bufio_release(buf); - - par = fec_read_parity(v, rsb, block_offset, &offset, &buf); -@@ -674,7 +673,7 @@ int verity_fec_ctr(struct dm_verity *v) - { - struct dm_verity_fec *f = v->fec; - struct dm_target *ti = v->ti; -- u64 hash_blocks; -+ u64 hash_blocks, fec_blocks; - int ret; - - if (!verity_fec_is_enabled(v)) { -@@ -744,15 +743,17 @@ int verity_fec_ctr(struct dm_verity *v) - } - - f->bufio = dm_bufio_client_create(f->dev->bdev, -- 1 << v->data_dev_block_bits, -+ f->roots << SECTOR_SHIFT, - 1, 0, NULL, NULL); - if (IS_ERR(f->bufio)) { - ti->error = "Cannot initialize FEC bufio client"; - return PTR_ERR(f->bufio); - } - -- if (dm_bufio_get_device_size(f->bufio) < -- ((f->start + f->rounds * f->roots) >> v->data_dev_block_bits)) { -+ dm_bufio_set_sector_offset(f->bufio, f->start << (v->data_dev_block_bits - SECTOR_SHIFT)); -+ -+ fec_blocks = div64_u64(f->rounds * f->roots, v->fec->roots << SECTOR_SHIFT); -+ if (dm_bufio_get_device_size(f->bufio) < fec_blocks) { - ti->error = "FEC device is too small"; - return -E2BIG; - } -diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c -index 470ff6b3ebef1..35b015c9ab025 100644 ---- a/drivers/net/ethernet/realtek/r8169_main.c -+++ b/drivers/net/ethernet/realtek/r8169_main.c -@@ -2208,6 +2208,7 @@ static void rtl_pll_power_down(struct rtl8169_private *tp) - - switch (tp->mac_version) { - case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_26: -+ case RTL_GIGA_MAC_VER_29 ... RTL_GIGA_MAC_VER_30: - case RTL_GIGA_MAC_VER_32 ... RTL_GIGA_MAC_VER_33: - case RTL_GIGA_MAC_VER_37: - case RTL_GIGA_MAC_VER_39: -@@ -2235,6 +2236,7 @@ static void rtl_pll_power_up(struct rtl8169_private *tp) - { - switch (tp->mac_version) { - case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_26: -+ case RTL_GIGA_MAC_VER_29 ... RTL_GIGA_MAC_VER_30: - case RTL_GIGA_MAC_VER_32 ... RTL_GIGA_MAC_VER_33: - case RTL_GIGA_MAC_VER_37: - case RTL_GIGA_MAC_VER_39: -diff --git a/fs/btrfs/block-group.c b/fs/btrfs/block-group.c -index 3b1c387375a6b..3cf1b953f5236 100644 ---- a/fs/btrfs/block-group.c -+++ b/fs/btrfs/block-group.c -@@ -1150,6 +1150,11 @@ static int inc_block_group_ro(struct btrfs_block_group *cache, int force) - spin_lock(&sinfo->lock); - spin_lock(&cache->lock); - -+ if (cache->swap_extents) { -+ ret = -ETXTBSY; -+ goto out; -+ } -+ - if (cache->ro) { - cache->ro++; - ret = 0; -@@ -2253,7 +2258,7 @@ again: - } - - ret = inc_block_group_ro(cache, 0); -- if (!do_chunk_alloc) -+ if (!do_chunk_alloc || ret == -ETXTBSY) - goto unlock_out; - if (!ret) - goto out; -@@ -2262,6 +2267,8 @@ again: - if (ret < 0) - goto out; - ret = inc_block_group_ro(cache, 0); -+ if (ret == -ETXTBSY) -+ goto unlock_out; - out: - if (cache->flags & BTRFS_BLOCK_GROUP_SYSTEM) { - alloc_flags = btrfs_get_alloc_profile(fs_info, cache->flags); -@@ -3345,6 +3352,7 @@ int btrfs_free_block_groups(struct btrfs_fs_info *info) - ASSERT(list_empty(&block_group->io_list)); - ASSERT(list_empty(&block_group->bg_list)); - ASSERT(refcount_read(&block_group->refs) == 1); -+ ASSERT(block_group->swap_extents == 0); - btrfs_put_block_group(block_group); - - spin_lock(&info->block_group_cache_lock); -@@ -3411,3 +3419,26 @@ void btrfs_unfreeze_block_group(struct btrfs_block_group *block_group) - __btrfs_remove_free_space_cache(block_group->free_space_ctl); - } - } -+ -+bool btrfs_inc_block_group_swap_extents(struct btrfs_block_group *bg) -+{ -+ bool ret = true; -+ -+ spin_lock(&bg->lock); -+ if (bg->ro) -+ ret = false; -+ else -+ bg->swap_extents++; -+ spin_unlock(&bg->lock); -+ -+ return ret; -+} -+ -+void btrfs_dec_block_group_swap_extents(struct btrfs_block_group *bg, int amount) -+{ -+ spin_lock(&bg->lock); -+ ASSERT(!bg->ro); -+ ASSERT(bg->swap_extents >= amount); -+ bg->swap_extents -= amount; -+ spin_unlock(&bg->lock); -+} -diff --git a/fs/btrfs/block-group.h b/fs/btrfs/block-group.h -index 8f74a96074f7b..8a925741dc34a 100644 ---- a/fs/btrfs/block-group.h -+++ b/fs/btrfs/block-group.h -@@ -181,6 +181,12 @@ struct btrfs_block_group { - */ - int needs_free_space; - -+ /* -+ * Number of extents in this block group used for swap files. -+ * All accesses protected by the spinlock 'lock'. -+ */ -+ int swap_extents; -+ - /* Record locked full stripes for RAID5/6 block group */ - struct btrfs_full_stripe_locks_tree full_stripe_locks_root; - }; -@@ -301,4 +307,7 @@ int btrfs_rmap_block(struct btrfs_fs_info *fs_info, u64 chunk_start, - u64 physical, u64 **logical, int *naddrs, int *stripe_len); - #endif - -+bool btrfs_inc_block_group_swap_extents(struct btrfs_block_group *bg); -+void btrfs_dec_block_group_swap_extents(struct btrfs_block_group *bg, int amount); -+ - #endif /* BTRFS_BLOCK_GROUP_H */ -diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h -index 4debdbdde2abb..0c8c55a41d7b2 100644 ---- a/fs/btrfs/ctree.h -+++ b/fs/btrfs/ctree.h -@@ -523,6 +523,11 @@ struct btrfs_swapfile_pin { - * points to a struct btrfs_device. - */ - bool is_block_group; -+ /* -+ * Only used when 'is_block_group' is true and it is the number of -+ * extents used by a swapfile for this block group ('ptr' field). -+ */ -+ int bg_extent_count; - }; - - bool btrfs_pinned_by_swapfile(struct btrfs_fs_info *fs_info, void *ptr); -diff --git a/fs/btrfs/delayed-inode.c b/fs/btrfs/delayed-inode.c -index 70c0340d839cb..f12e6a0aa3c70 100644 ---- a/fs/btrfs/delayed-inode.c -+++ b/fs/btrfs/delayed-inode.c -@@ -649,7 +649,7 @@ static int btrfs_delayed_inode_reserve_metadata( - btrfs_ino(inode), - num_bytes, 1); - } else { -- btrfs_qgroup_free_meta_prealloc(root, fs_info->nodesize); -+ btrfs_qgroup_free_meta_prealloc(root, num_bytes); - } - return ret; - } -diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c -index 0e41459b8de66..f851a1a63833d 100644 ---- a/fs/btrfs/file.c -+++ b/fs/btrfs/file.c -@@ -3264,8 +3264,11 @@ reserve_space: - goto out; - ret = btrfs_qgroup_reserve_data(BTRFS_I(inode), &data_reserved, - alloc_start, bytes_to_reserve); -- if (ret) -+ if (ret) { -+ unlock_extent_cached(&BTRFS_I(inode)->io_tree, lockstart, -+ lockend, &cached_state); - goto out; -+ } - ret = btrfs_prealloc_file_range(inode, mode, alloc_start, - alloc_end - alloc_start, - i_blocksize(inode), -diff --git a/fs/btrfs/free-space-cache.c b/fs/btrfs/free-space-cache.c -index 71d0d14bc18b3..b64b88987367c 100644 ---- a/fs/btrfs/free-space-cache.c -+++ b/fs/btrfs/free-space-cache.c -@@ -2708,8 +2708,10 @@ static void __btrfs_return_cluster_to_free_space( - struct rb_node *node; - - spin_lock(&cluster->lock); -- if (cluster->block_group != block_group) -- goto out; -+ if (cluster->block_group != block_group) { -+ spin_unlock(&cluster->lock); -+ return; -+ } - - cluster->block_group = NULL; - cluster->window_start = 0; -@@ -2747,8 +2749,6 @@ static void __btrfs_return_cluster_to_free_space( - entry->offset, &entry->offset_index, bitmap); - } - cluster->root = RB_ROOT; -- --out: - spin_unlock(&cluster->lock); - btrfs_put_block_group(block_group); - } -@@ -3028,8 +3028,6 @@ u64 btrfs_alloc_from_cluster(struct btrfs_block_group *block_group, - entry->bytes -= bytes; - } - -- if (entry->bytes == 0) -- rb_erase(&entry->offset_index, &cluster->root); - break; - } - out: -@@ -3046,7 +3044,10 @@ out: - ctl->free_space -= bytes; - if (!entry->bitmap && !btrfs_free_space_trimmed(entry)) - ctl->discardable_bytes[BTRFS_STAT_CURR] -= bytes; -+ -+ spin_lock(&cluster->lock); - if (entry->bytes == 0) { -+ rb_erase(&entry->offset_index, &cluster->root); - ctl->free_extents--; - if (entry->bitmap) { - kmem_cache_free(btrfs_free_space_bitmap_cachep, -@@ -3059,6 +3060,7 @@ out: - kmem_cache_free(btrfs_free_space_cachep, entry); - } - -+ spin_unlock(&cluster->lock); - spin_unlock(&ctl->tree_lock); - - return ret; -diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c -index ad34c5a09befc..40ccb8ddab23a 100644 ---- a/fs/btrfs/inode.c -+++ b/fs/btrfs/inode.c -@@ -9993,6 +9993,7 @@ static int btrfs_add_swapfile_pin(struct inode *inode, void *ptr, - sp->ptr = ptr; - sp->inode = inode; - sp->is_block_group = is_block_group; -+ sp->bg_extent_count = 1; - - spin_lock(&fs_info->swapfile_pins_lock); - p = &fs_info->swapfile_pins.rb_node; -@@ -10006,6 +10007,8 @@ static int btrfs_add_swapfile_pin(struct inode *inode, void *ptr, - (sp->ptr == entry->ptr && sp->inode > entry->inode)) { - p = &(*p)->rb_right; - } else { -+ if (is_block_group) -+ entry->bg_extent_count++; - spin_unlock(&fs_info->swapfile_pins_lock); - kfree(sp); - return 1; -@@ -10031,8 +10034,11 @@ static void btrfs_free_swapfile_pins(struct inode *inode) - sp = rb_entry(node, struct btrfs_swapfile_pin, node); - if (sp->inode == inode) { - rb_erase(&sp->node, &fs_info->swapfile_pins); -- if (sp->is_block_group) -+ if (sp->is_block_group) { -+ btrfs_dec_block_group_swap_extents(sp->ptr, -+ sp->bg_extent_count); - btrfs_put_block_group(sp->ptr); -+ } - kfree(sp); - } - node = next; -@@ -10093,7 +10099,8 @@ static int btrfs_swap_activate(struct swap_info_struct *sis, struct file *file, - sector_t *span) - { - struct inode *inode = file_inode(file); -- struct btrfs_fs_info *fs_info = BTRFS_I(inode)->root->fs_info; -+ struct btrfs_root *root = BTRFS_I(inode)->root; -+ struct btrfs_fs_info *fs_info = root->fs_info; - struct extent_io_tree *io_tree = &BTRFS_I(inode)->io_tree; - struct extent_state *cached_state = NULL; - struct extent_map *em = NULL; -@@ -10144,13 +10151,27 @@ static int btrfs_swap_activate(struct swap_info_struct *sis, struct file *file, - "cannot activate swapfile while exclusive operation is running"); - return -EBUSY; - } -+ -+ /* -+ * Prevent snapshot creation while we are activating the swap file. -+ * We do not want to race with snapshot creation. If snapshot creation -+ * already started before we bumped nr_swapfiles from 0 to 1 and -+ * completes before the first write into the swap file after it is -+ * activated, than that write would fallback to COW. -+ */ -+ if (!btrfs_drew_try_write_lock(&root->snapshot_lock)) { -+ btrfs_exclop_finish(fs_info); -+ btrfs_warn(fs_info, -+ "cannot activate swapfile because snapshot creation is in progress"); -+ return -EINVAL; -+ } - /* - * Snapshots can create extents which require COW even if NODATACOW is - * set. We use this counter to prevent snapshots. We must increment it - * before walking the extents because we don't want a concurrent - * snapshot to run after we've already checked the extents. - */ -- atomic_inc(&BTRFS_I(inode)->root->nr_swapfiles); -+ atomic_inc(&root->nr_swapfiles); - - isize = ALIGN_DOWN(inode->i_size, fs_info->sectorsize); - -@@ -10247,6 +10268,17 @@ static int btrfs_swap_activate(struct swap_info_struct *sis, struct file *file, - goto out; - } - -+ if (!btrfs_inc_block_group_swap_extents(bg)) { -+ btrfs_warn(fs_info, -+ "block group for swapfile at %llu is read-only%s", -+ bg->start, -+ atomic_read(&fs_info->scrubs_running) ? -+ " (scrub running)" : ""); -+ btrfs_put_block_group(bg); -+ ret = -EINVAL; -+ goto out; -+ } -+ - ret = btrfs_add_swapfile_pin(inode, bg, true); - if (ret) { - btrfs_put_block_group(bg); -@@ -10285,6 +10317,8 @@ out: - if (ret) - btrfs_swap_deactivate(file); - -+ btrfs_drew_write_unlock(&root->snapshot_lock); -+ - btrfs_exclop_finish(fs_info); - - if (ret) -diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c -index dde49a791f3e2..0a4ab121c684b 100644 ---- a/fs/btrfs/ioctl.c -+++ b/fs/btrfs/ioctl.c -@@ -1926,7 +1926,10 @@ static noinline int btrfs_ioctl_snap_create_v2(struct file *file, - if (vol_args->flags & BTRFS_SUBVOL_RDONLY) - readonly = true; - if (vol_args->flags & BTRFS_SUBVOL_QGROUP_INHERIT) { -- if (vol_args->size > PAGE_SIZE) { -+ u64 nums; -+ -+ if (vol_args->size < sizeof(*inherit) || -+ vol_args->size > PAGE_SIZE) { - ret = -EINVAL; - goto free_args; - } -@@ -1935,6 +1938,20 @@ static noinline int btrfs_ioctl_snap_create_v2(struct file *file, - ret = PTR_ERR(inherit); - goto free_args; - } -+ -+ if (inherit->num_qgroups > PAGE_SIZE || -+ inherit->num_ref_copies > PAGE_SIZE || -+ inherit->num_excl_copies > PAGE_SIZE) { -+ ret = -EINVAL; -+ goto free_inherit; -+ } -+ -+ nums = inherit->num_qgroups + 2 * inherit->num_ref_copies + -+ 2 * inherit->num_excl_copies; -+ if (vol_args->size != struct_size(inherit, qgroups, nums)) { -+ ret = -EINVAL; -+ goto free_inherit; -+ } - } - - ret = __btrfs_ioctl_snap_create(file, vol_args->name, vol_args->fd, -diff --git a/fs/btrfs/raid56.c b/fs/btrfs/raid56.c -index 93fbf87bdc8d3..123b79672c63c 100644 ---- a/fs/btrfs/raid56.c -+++ b/fs/btrfs/raid56.c -@@ -2363,16 +2363,21 @@ static noinline void finish_parity_scrub(struct btrfs_raid_bio *rbio, - SetPageUptodate(p_page); - - if (has_qstripe) { -+ /* RAID6, allocate and map temp space for the Q stripe */ - q_page = alloc_page(GFP_NOFS | __GFP_HIGHMEM); - if (!q_page) { - __free_page(p_page); - goto cleanup; - } - SetPageUptodate(q_page); -+ pointers[rbio->real_stripes - 1] = kmap(q_page); - } - - atomic_set(&rbio->error, 0); - -+ /* Map the parity stripe just once */ -+ pointers[nr_data] = kmap(p_page); -+ - for_each_set_bit(pagenr, rbio->dbitmap, rbio->stripe_npages) { - struct page *p; - void *parity; -@@ -2382,16 +2387,8 @@ static noinline void finish_parity_scrub(struct btrfs_raid_bio *rbio, - pointers[stripe] = kmap(p); - } - -- /* then add the parity stripe */ -- pointers[stripe++] = kmap(p_page); -- - if (has_qstripe) { -- /* -- * raid6, add the qstripe and call the -- * library function to fill in our p/q -- */ -- pointers[stripe++] = kmap(q_page); -- -+ /* RAID6, call the library function to fill in our P/Q */ - raid6_call.gen_syndrome(rbio->real_stripes, PAGE_SIZE, - pointers); - } else { -@@ -2412,12 +2409,14 @@ static noinline void finish_parity_scrub(struct btrfs_raid_bio *rbio, - - for (stripe = 0; stripe < nr_data; stripe++) - kunmap(page_in_rbio(rbio, stripe, pagenr, 0)); -- kunmap(p_page); - } - -+ kunmap(p_page); - __free_page(p_page); -- if (q_page) -+ if (q_page) { -+ kunmap(q_page); - __free_page(q_page); -+ } - - writeback: - /* -diff --git a/fs/btrfs/reflink.c b/fs/btrfs/reflink.c -index b03e7891394e3..a3bc721bab7c8 100644 ---- a/fs/btrfs/reflink.c -+++ b/fs/btrfs/reflink.c -@@ -550,6 +550,24 @@ process_slot: - */ - btrfs_release_path(path); - -+ /* -+ * When using NO_HOLES and we are cloning a range that covers -+ * only a hole (no extents) into a range beyond the current -+ * i_size, punching a hole in the target range will not create -+ * an extent map defining a hole, because the range starts at or -+ * beyond current i_size. If the file previously had an i_size -+ * greater than the new i_size set by this clone operation, we -+ * need to make sure the next fsync is a full fsync, so that it -+ * detects and logs a hole covering a range from the current -+ * i_size to the new i_size. If the clone range covers extents, -+ * besides a hole, then we know the full sync flag was already -+ * set by previous calls to btrfs_replace_file_extents() that -+ * replaced file extent items. -+ */ -+ if (last_dest_end >= i_size_read(inode)) -+ set_bit(BTRFS_INODE_NEEDS_FULL_SYNC, -+ &BTRFS_I(inode)->runtime_flags); -+ - ret = btrfs_replace_file_extents(inode, path, last_dest_end, - destoff + len - 1, NULL, &trans); - if (ret) -diff --git a/fs/btrfs/scrub.c b/fs/btrfs/scrub.c -index 5f4f88a4d2c8a..c09a494be8c68 100644 ---- a/fs/btrfs/scrub.c -+++ b/fs/btrfs/scrub.c -@@ -3630,6 +3630,13 @@ int scrub_enumerate_chunks(struct scrub_ctx *sctx, - * commit_transactions. - */ - ro_set = 0; -+ } else if (ret == -ETXTBSY) { -+ btrfs_warn(fs_info, -+ "skipping scrub of block group %llu due to active swapfile", -+ cache->start); -+ scrub_pause_off(fs_info); -+ ret = 0; -+ goto skip_unfreeze; - } else { - btrfs_warn(fs_info, - "failed setting block group ro: %d", ret); -@@ -3719,7 +3726,7 @@ int scrub_enumerate_chunks(struct scrub_ctx *sctx, - } else { - spin_unlock(&cache->lock); - } -- -+skip_unfreeze: - btrfs_unfreeze_block_group(cache); - btrfs_put_block_group(cache); - if (ret) -diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c -index 12d7d3be7cd45..8baa806f43d76 100644 ---- a/fs/btrfs/super.c -+++ b/fs/btrfs/super.c -@@ -1919,8 +1919,8 @@ static int btrfs_remount(struct super_block *sb, int *flags, char *data) - btrfs_resize_thread_pool(fs_info, - fs_info->thread_pool_size, old_thread_pool_size); - -- if (btrfs_test_opt(fs_info, FREE_SPACE_TREE) != -- btrfs_fs_compat_ro(fs_info, FREE_SPACE_TREE) && -+ if ((bool)btrfs_test_opt(fs_info, FREE_SPACE_TREE) != -+ (bool)btrfs_fs_compat_ro(fs_info, FREE_SPACE_TREE) && - (!sb_rdonly(sb) || (*flags & SB_RDONLY))) { - btrfs_warn(fs_info, - "remount supports changing free space tree only from ro to rw"); -diff --git a/fs/btrfs/tree-checker.c b/fs/btrfs/tree-checker.c -index 582061c7b5471..f4ade821307d7 100644 ---- a/fs/btrfs/tree-checker.c -+++ b/fs/btrfs/tree-checker.c -@@ -1453,22 +1453,14 @@ static int check_extent_data_ref(struct extent_buffer *leaf, - return -EUCLEAN; - } - for (; ptr < end; ptr += sizeof(*dref)) { -- u64 root_objectid; -- u64 owner; - u64 offset; -- u64 hash; - -+ /* -+ * We cannot check the extent_data_ref hash due to possible -+ * overflow from the leaf due to hash collisions. -+ */ - dref = (struct btrfs_extent_data_ref *)ptr; -- root_objectid = btrfs_extent_data_ref_root(leaf, dref); -- owner = btrfs_extent_data_ref_objectid(leaf, dref); - offset = btrfs_extent_data_ref_offset(leaf, dref); -- hash = hash_extent_data_ref(root_objectid, owner, offset); -- if (unlikely(hash != key->offset)) { -- extent_err(leaf, slot, -- "invalid extent data ref hash, item has 0x%016llx key has 0x%016llx", -- hash, key->offset); -- return -EUCLEAN; -- } - if (unlikely(!IS_ALIGNED(offset, leaf->fs_info->sectorsize))) { - extent_err(leaf, slot, - "invalid extent data backref offset, have %llu expect aligned to %u", -diff --git a/fs/btrfs/xattr.c b/fs/btrfs/xattr.c -index af6246f36a9e5..03135dbb318a5 100644 ---- a/fs/btrfs/xattr.c -+++ b/fs/btrfs/xattr.c -@@ -229,11 +229,33 @@ int btrfs_setxattr_trans(struct inode *inode, const char *name, - { - struct btrfs_root *root = BTRFS_I(inode)->root; - struct btrfs_trans_handle *trans; -+ const bool start_trans = (current->journal_info == NULL); - int ret; - -- trans = btrfs_start_transaction(root, 2); -- if (IS_ERR(trans)) -- return PTR_ERR(trans); -+ if (start_trans) { -+ /* -+ * 1 unit for inserting/updating/deleting the xattr -+ * 1 unit for the inode item update -+ */ -+ trans = btrfs_start_transaction(root, 2); -+ if (IS_ERR(trans)) -+ return PTR_ERR(trans); -+ } else { -+ /* -+ * This can happen when smack is enabled and a directory is being -+ * created. It happens through d_instantiate_new(), which calls -+ * smack_d_instantiate(), which in turn calls __vfs_setxattr() to -+ * set the transmute xattr (XATTR_NAME_SMACKTRANSMUTE) on the -+ * inode. We have already reserved space for the xattr and inode -+ * update at btrfs_mkdir(), so just use the transaction handle. -+ * We don't join or start a transaction, as that will reset the -+ * block_rsv of the handle and trigger a warning for the start -+ * case. -+ */ -+ ASSERT(strncmp(name, XATTR_SECURITY_PREFIX, -+ XATTR_SECURITY_PREFIX_LEN) == 0); -+ trans = current->journal_info; -+ } - - ret = btrfs_setxattr(trans, inode, name, value, size, flags); - if (ret) -@@ -244,7 +266,8 @@ int btrfs_setxattr_trans(struct inode *inode, const char *name, - ret = btrfs_update_inode(trans, root, BTRFS_I(inode)); - BUG_ON(ret); - out: -- btrfs_end_transaction(trans); -+ if (start_trans) -+ btrfs_end_transaction(trans); - return ret; - } - -diff --git a/fs/btrfs/zoned.c b/fs/btrfs/zoned.c -index c388466590191..2f80de4403595 100644 ---- a/fs/btrfs/zoned.c -+++ b/fs/btrfs/zoned.c -@@ -152,7 +152,7 @@ int btrfs_get_dev_zone_info(struct btrfs_device *device) - sector_t sector = 0; - struct blk_zone *zones = NULL; - unsigned int i, nreported = 0, nr_zones; -- unsigned int zone_sectors; -+ sector_t zone_sectors; - int ret; - - if (!bdev_is_zoned(bdev)) -@@ -485,7 +485,7 @@ int btrfs_sb_log_location_bdev(struct block_device *bdev, int mirror, int rw, - u64 *bytenr_ret) - { - struct blk_zone zones[BTRFS_NR_SB_LOG_ZONES]; -- unsigned int zone_sectors; -+ sector_t zone_sectors; - u32 sb_zone; - int ret; - u64 zone_size; -diff --git a/fs/io_uring.c b/fs/io_uring.c -index 4d0ede0418571..38bfd168ad3b7 100644 ---- a/fs/io_uring.c -+++ b/fs/io_uring.c -@@ -5316,6 +5316,9 @@ static void __io_queue_proc(struct io_poll_iocb *poll, struct io_poll_table *pt, - pt->error = -EINVAL; - return; - } -+ /* double add on the same waitqueue head, ignore */ -+ if (poll->head == head) -+ return; - poll = kmalloc(sizeof(*poll), GFP_ATOMIC); - if (!poll) { - pt->error = -ENOMEM; -diff --git a/include/crypto/hash.h b/include/crypto/hash.h -index af2ff31ff619f..13f8a6a54ca87 100644 ---- a/include/crypto/hash.h -+++ b/include/crypto/hash.h -@@ -149,7 +149,7 @@ struct ahash_alg { - - struct shash_desc { - struct crypto_shash *tfm; -- void *__ctx[] CRYPTO_MINALIGN_ATTR; -+ void *__ctx[] __aligned(ARCH_SLAB_MINALIGN); - }; - - #define HASH_MAX_DIGESTSIZE 64 -@@ -162,9 +162,9 @@ struct shash_desc { - - #define HASH_MAX_STATESIZE 512 - --#define SHASH_DESC_ON_STACK(shash, ctx) \ -- char __##shash##_desc[sizeof(struct shash_desc) + \ -- HASH_MAX_DESCSIZE] CRYPTO_MINALIGN_ATTR; \ -+#define SHASH_DESC_ON_STACK(shash, ctx) \ -+ char __##shash##_desc[sizeof(struct shash_desc) + HASH_MAX_DESCSIZE] \ -+ __aligned(__alignof__(struct shash_desc)); \ - struct shash_desc *shash = (struct shash_desc *)__##shash##_desc - - /** -diff --git a/include/linux/crypto.h b/include/linux/crypto.h -index ef90e07c9635c..e3abd1f8646a1 100644 ---- a/include/linux/crypto.h -+++ b/include/linux/crypto.h -@@ -151,9 +151,12 @@ - * The macro CRYPTO_MINALIGN_ATTR (along with the void * type in the actual - * declaration) is used to ensure that the crypto_tfm context structure is - * aligned correctly for the given architecture so that there are no alignment -- * faults for C data types. In particular, this is required on platforms such -- * as arm where pointers are 32-bit aligned but there are data types such as -- * u64 which require 64-bit alignment. -+ * faults for C data types. On architectures that support non-cache coherent -+ * DMA, such as ARM or arm64, it also takes into account the minimal alignment -+ * that is required to ensure that the context struct member does not share any -+ * cachelines with the rest of the struct. This is needed to ensure that cache -+ * maintenance for non-coherent DMA (cache invalidation in particular) does not -+ * affect data that may be accessed by the CPU concurrently. - */ - #define CRYPTO_MINALIGN ARCH_KMALLOC_MINALIGN - -diff --git a/include/sound/intel-nhlt.h b/include/sound/intel-nhlt.h -index 743c2f4422806..d0574805865f9 100644 ---- a/include/sound/intel-nhlt.h -+++ b/include/sound/intel-nhlt.h -@@ -112,6 +112,11 @@ struct nhlt_vendor_dmic_array_config { - /* TODO add vendor mic config */ - } __packed; - -+enum { -+ NHLT_CONFIG_TYPE_GENERIC = 0, -+ NHLT_CONFIG_TYPE_MIC_ARRAY = 1 -+}; -+ - enum { - NHLT_MIC_ARRAY_2CH_SMALL = 0xa, - NHLT_MIC_ARRAY_2CH_BIG = 0xb, -diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c -index ec08f948dd80e..063f8ea6aad97 100644 ---- a/kernel/trace/ring_buffer.c -+++ b/kernel/trace/ring_buffer.c -@@ -2821,6 +2821,17 @@ rb_try_to_discard(struct ring_buffer_per_cpu *cpu_buffer, - write_stamp, write_stamp - delta)) - return 0; - -+ /* -+ * It's possible that the event time delta is zero -+ * (has the same time stamp as the previous event) -+ * in which case write_stamp and before_stamp could -+ * be the same. In such a case, force before_stamp -+ * to be different than write_stamp. It doesn't -+ * matter what it is, as long as its different. -+ */ -+ if (!delta) -+ rb_time_set(&cpu_buffer->before_stamp, 0); -+ - /* - * If an event were to come in now, it would see that the - * write_stamp and the before_stamp are different, and assume -diff --git a/scripts/recordmcount.c b/scripts/recordmcount.c -index b9c2ee7ab43fa..cce12e1971d85 100644 ---- a/scripts/recordmcount.c -+++ b/scripts/recordmcount.c -@@ -438,7 +438,7 @@ static int arm_is_fake_mcount(Elf32_Rel const *rp) - - static int arm64_is_fake_mcount(Elf64_Rel const *rp) - { -- return ELF64_R_TYPE(w(rp->r_info)) != R_AARCH64_CALL26; -+ return ELF64_R_TYPE(w8(rp->r_info)) != R_AARCH64_CALL26; - } - - /* 64-bit EM_MIPS has weird ELF64_Rela.r_info. -diff --git a/security/tomoyo/network.c b/security/tomoyo/network.c -index a89ed55d85d41..478f757ff8435 100644 ---- a/security/tomoyo/network.c -+++ b/security/tomoyo/network.c -@@ -613,7 +613,7 @@ static int tomoyo_check_unix_address(struct sockaddr *addr, - static bool tomoyo_kernel_service(void) - { - /* Nothing to do if I am a kernel service. */ -- return uaccess_kernel(); -+ return (current->flags & (PF_KTHREAD | PF_IO_WORKER)) == PF_KTHREAD; - } - - /** -diff --git a/sound/hda/intel-nhlt.c b/sound/hda/intel-nhlt.c -index 059aaf04f536a..d053beccfaec3 100644 ---- a/sound/hda/intel-nhlt.c -+++ b/sound/hda/intel-nhlt.c -@@ -31,18 +31,44 @@ int intel_nhlt_get_dmic_geo(struct device *dev, struct nhlt_acpi_table *nhlt) - struct nhlt_endpoint *epnt; - struct nhlt_dmic_array_config *cfg; - struct nhlt_vendor_dmic_array_config *cfg_vendor; -+ struct nhlt_fmt *fmt_configs; - unsigned int dmic_geo = 0; -- u8 j; -+ u16 max_ch = 0; -+ u8 i, j; - - if (!nhlt) - return 0; - -- epnt = (struct nhlt_endpoint *)nhlt->desc; -+ for (j = 0, epnt = nhlt->desc; j < nhlt->endpoint_count; j++, -+ epnt = (struct nhlt_endpoint *)((u8 *)epnt + epnt->length)) { - -- for (j = 0; j < nhlt->endpoint_count; j++) { -- if (epnt->linktype == NHLT_LINK_DMIC) { -- cfg = (struct nhlt_dmic_array_config *) -- (epnt->config.caps); -+ if (epnt->linktype != NHLT_LINK_DMIC) -+ continue; -+ -+ cfg = (struct nhlt_dmic_array_config *)(epnt->config.caps); -+ fmt_configs = (struct nhlt_fmt *)(epnt->config.caps + epnt->config.size); -+ -+ /* find max number of channels based on format_configuration */ -+ if (fmt_configs->fmt_count) { -+ dev_dbg(dev, "%s: found %d format definitions\n", -+ __func__, fmt_configs->fmt_count); -+ -+ for (i = 0; i < fmt_configs->fmt_count; i++) { -+ struct wav_fmt_ext *fmt_ext; -+ -+ fmt_ext = &fmt_configs->fmt_config[i].fmt_ext; -+ -+ if (fmt_ext->fmt.channels > max_ch) -+ max_ch = fmt_ext->fmt.channels; -+ } -+ dev_dbg(dev, "%s: max channels found %d\n", __func__, max_ch); -+ } else { -+ dev_dbg(dev, "%s: No format information found\n", __func__); -+ } -+ -+ if (cfg->device_config.config_type != NHLT_CONFIG_TYPE_MIC_ARRAY) { -+ dmic_geo = max_ch; -+ } else { - switch (cfg->array_type) { - case NHLT_MIC_ARRAY_2CH_SMALL: - case NHLT_MIC_ARRAY_2CH_BIG: -@@ -59,13 +85,23 @@ int intel_nhlt_get_dmic_geo(struct device *dev, struct nhlt_acpi_table *nhlt) - dmic_geo = cfg_vendor->nb_mics; - break; - default: -- dev_warn(dev, "undefined DMIC array_type 0x%0x\n", -- cfg->array_type); -+ dev_warn(dev, "%s: undefined DMIC array_type 0x%0x\n", -+ __func__, cfg->array_type); -+ } -+ -+ if (dmic_geo > 0) { -+ dev_dbg(dev, "%s: Array with %d dmics\n", __func__, dmic_geo); -+ } -+ if (max_ch > dmic_geo) { -+ dev_dbg(dev, "%s: max channels %d exceed dmic number %d\n", -+ __func__, max_ch, dmic_geo); - } - } -- epnt = (struct nhlt_endpoint *)((u8 *)epnt + epnt->length); - } - -+ dev_dbg(dev, "%s: dmic number %d max_ch %d\n", -+ __func__, dmic_geo, max_ch); -+ - return dmic_geo; - } - EXPORT_SYMBOL_GPL(intel_nhlt_get_dmic_geo); -diff --git a/sound/pci/ctxfi/cthw20k2.c b/sound/pci/ctxfi/cthw20k2.c -index fc1bc18caee98..85d1fc76f59e1 100644 ---- a/sound/pci/ctxfi/cthw20k2.c -+++ b/sound/pci/ctxfi/cthw20k2.c -@@ -991,7 +991,7 @@ static int daio_mgr_dao_init(void *blk, unsigned int idx, unsigned int conf) - - if (idx < 4) { - /* S/PDIF output */ -- switch ((conf & 0x7)) { -+ switch ((conf & 0xf)) { - case 1: - set_field(&ctl->txctl[idx], ATXCTL_NUC, 0); - break; -diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c -index 5f4f8c2d760f0..b47504fa8dfd0 100644 ---- a/sound/pci/hda/patch_realtek.c -+++ b/sound/pci/hda/patch_realtek.c -@@ -6408,6 +6408,7 @@ enum { - ALC236_FIXUP_DELL_AIO_HEADSET_MIC, - ALC282_FIXUP_ACER_DISABLE_LINEOUT, - ALC255_FIXUP_ACER_LIMIT_INT_MIC_BOOST, -+ ALC256_FIXUP_ACER_HEADSET_MIC, - }; - - static const struct hda_fixup alc269_fixups[] = { -@@ -7864,6 +7865,16 @@ static const struct hda_fixup alc269_fixups[] = { - .chained = true, - .chain_id = ALC255_FIXUP_ACER_MIC_NO_PRESENCE, - }, -+ [ALC256_FIXUP_ACER_HEADSET_MIC] = { -+ .type = HDA_FIXUP_PINS, -+ .v.pins = (const struct hda_pintbl[]) { -+ { 0x19, 0x02a1113c }, /* use as headset mic, without its own jack detect */ -+ { 0x1a, 0x90a1092f }, /* use as internal mic */ -+ { } -+ }, -+ .chained = true, -+ .chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC -+ }, - }; - - static const struct snd_pci_quirk alc269_fixup_tbl[] = { -@@ -7890,9 +7901,11 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { - SND_PCI_QUIRK(0x1025, 0x1246, "Acer Predator Helios 500", ALC299_FIXUP_PREDATOR_SPK), - SND_PCI_QUIRK(0x1025, 0x1247, "Acer vCopperbox", ALC269VC_FIXUP_ACER_VCOPPERBOX_PINS), - SND_PCI_QUIRK(0x1025, 0x1248, "Acer Veriton N4660G", ALC269VC_FIXUP_ACER_MIC_NO_PRESENCE), -+ SND_PCI_QUIRK(0x1025, 0x1269, "Acer SWIFT SF314-54", ALC256_FIXUP_ACER_HEADSET_MIC), - SND_PCI_QUIRK(0x1025, 0x128f, "Acer Veriton Z6860G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC), - SND_PCI_QUIRK(0x1025, 0x1290, "Acer Veriton Z4860G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC), - SND_PCI_QUIRK(0x1025, 0x1291, "Acer Veriton Z4660G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC), -+ SND_PCI_QUIRK(0x1025, 0x129c, "Acer SWIFT SF314-55", ALC256_FIXUP_ACER_HEADSET_MIC), - SND_PCI_QUIRK(0x1025, 0x1308, "Acer Aspire Z24-890", ALC286_FIXUP_ACER_AIO_HEADSET_MIC), - SND_PCI_QUIRK(0x1025, 0x132a, "Acer TravelMate B114-21", ALC233_FIXUP_ACER_HEADSET_MIC), - SND_PCI_QUIRK(0x1025, 0x1330, "Acer TravelMate X514-51T", ALC255_FIXUP_ACER_HEADSET_MIC), -diff --git a/sound/usb/clock.c b/sound/usb/clock.c -index dc68ed65e4787..771b652329571 100644 ---- a/sound/usb/clock.c -+++ b/sound/usb/clock.c -@@ -646,10 +646,10 @@ static int set_sample_rate_v2v3(struct snd_usb_audio *chip, - cur_rate = prev_rate; - - if (cur_rate != rate) { -- usb_audio_warn(chip, -- "%d:%d: freq mismatch (RO clock): req %d, clock runs @%d\n", -- fmt->iface, fmt->altsetting, rate, cur_rate); -- return -ENXIO; -+ usb_audio_dbg(chip, -+ "%d:%d: freq mismatch: req %d, clock runs @%d\n", -+ fmt->iface, fmt->altsetting, rate, cur_rate); -+ /* continue processing */ - } - - validation: -diff --git a/sound/usb/mixer.c b/sound/usb/mixer.c -index 12b15ed59eaa1..d5bdc9c4f452b 100644 ---- a/sound/usb/mixer.c -+++ b/sound/usb/mixer.c -@@ -1301,6 +1301,17 @@ no_res_check: - /* totally crap, return an error */ - return -EINVAL; - } -+ } else { -+ /* if the max volume is too low, it's likely a bogus range; -+ * here we use -96dB as the threshold -+ */ -+ if (cval->dBmax <= -9600) { -+ usb_audio_info(cval->head.mixer->chip, -+ "%d:%d: bogus dB values (%d/%d), disabling dB reporting\n", -+ cval->head.id, mixer_ctrl_intf(cval->head.mixer), -+ cval->dBmin, cval->dBmax); -+ cval->dBmin = cval->dBmax = 0; -+ } - } - - return 0; -diff --git a/sound/usb/mixer_maps.c b/sound/usb/mixer_maps.c -index a7212f16660ec..646deb6244b15 100644 ---- a/sound/usb/mixer_maps.c -+++ b/sound/usb/mixer_maps.c -@@ -536,6 +536,16 @@ static const struct usbmix_ctl_map usbmix_ctl_maps[] = { - .id = USB_ID(0x05a7, 0x1020), - .map = bose_companion5_map, - }, -+ { -+ /* Corsair Virtuoso SE (wired mode) */ -+ .id = USB_ID(0x1b1c, 0x0a3d), -+ .map = corsair_virtuoso_map, -+ }, -+ { -+ /* Corsair Virtuoso SE (wireless mode) */ -+ .id = USB_ID(0x1b1c, 0x0a3e), -+ .map = corsair_virtuoso_map, -+ }, - { - /* Corsair Virtuoso (wired mode) */ - .id = USB_ID(0x1b1c, 0x0a41), -diff --git a/sound/usb/pcm.c b/sound/usb/pcm.c -index bf5a0f3c1fade..e5311b6bb3f65 100644 ---- a/sound/usb/pcm.c -+++ b/sound/usb/pcm.c -@@ -845,13 +845,19 @@ get_sync_ep_from_substream(struct snd_usb_substream *subs) - - list_for_each_entry(fp, &subs->fmt_list, list) { - ep = snd_usb_get_endpoint(chip, fp->endpoint); -- if (ep && ep->cur_rate) -- return ep; -+ if (ep && ep->cur_audiofmt) { -+ /* if EP is already opened solely for this substream, -+ * we still allow us to change the parameter; otherwise -+ * this substream has to follow the existing parameter -+ */ -+ if (ep->cur_audiofmt != subs->cur_audiofmt || ep->opened > 1) -+ return ep; -+ } - if (!fp->implicit_fb) - continue; - /* for the implicit fb, check the sync ep as well */ - ep = snd_usb_get_endpoint(chip, fp->sync_ep); -- if (ep && ep->cur_rate) -+ if (ep && ep->cur_audiofmt) - return ep; - } - return NULL; -diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c -index 9ba4682ebc482..737b2729c0d37 100644 ---- a/sound/usb/quirks.c -+++ b/sound/usb/quirks.c -@@ -1482,7 +1482,7 @@ static int pioneer_djm_set_format_quirk(struct snd_usb_substream *subs, - usb_set_interface(subs->dev, 0, 1); - // we should derive windex from fmt-sync_ep but it's not set - snd_usb_ctl_msg(subs->stream->chip->dev, -- usb_rcvctrlpipe(subs->stream->chip->dev, 0), -+ usb_sndctrlpipe(subs->stream->chip->dev, 0), - 0x01, 0x22, 0x0100, windex, &sr, 0x0003); - return 0; - } diff --git a/sys-kernel/pinephone-sources/files/60-linux.hook b/sys-kernel/pinephone-sources/files/60-linux.hook deleted file mode 100644 index b33873c..0000000 --- a/sys-kernel/pinephone-sources/files/60-linux.hook +++ /dev/null @@ -1,12 +0,0 @@ -[Trigger] -Type = File -Operation = Install -Operation = Upgrade -Operation = Remove -Target = usr/lib/modules/%KERNVER%/* -Target = usr/lib/modules/%EXTRAMODULES%/* - -[Action] -Description = Updating %PKGBASE% module dependencies... -When = PostTransaction -Exec = /usr/bin/depmod %KERNVER% diff --git a/sys-kernel/pinephone-sources/files/90-linux.hook b/sys-kernel/pinephone-sources/files/90-linux.hook deleted file mode 100644 index ec864d3..0000000 --- a/sys-kernel/pinephone-sources/files/90-linux.hook +++ /dev/null @@ -1,11 +0,0 @@ -[Trigger] -Type = File -Operation = Install -Operation = Upgrade -Target = boot/Image -Target = usr/lib/initcpio/* - -[Action] -Description = Updating %PKGBASE% initcpios... -When = PostTransaction -Exec = /usr/bin/mkinitcpio -p %PKGBASE% diff --git a/sys-kernel/pinephone-sources/files/PATCH-0-4-HID-add-Apple-Magic-Mouse-2-support.txt b/sys-kernel/pinephone-sources/files/PATCH-0-4-HID-add-Apple-Magic-Mouse-2-support.txt deleted file mode 100644 index 590f73f..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-0-4-HID-add-Apple-Magic-Mouse-2-support.txt +++ /dev/null @@ -1,118 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, - DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, - HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, - MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham - autolearn_force=no version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 30CB3C433DB - for ; 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- Sat, 27 Mar 2021 06:05:52 -0700 (PDT) -Received: from johnchen902-arch-ryzen.. (2001-b011-3815-3a1f-9afa-9bff-fe6e-3ce2.dynamic-ip6.hinet.net. [2001:b011:3815:3a1f:9afa:9bff:fe6e:3ce2]) - by smtp.gmail.com with ESMTPSA id ot17sm6413787pjb.50.2021.03.27.06.05.51 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Sat, 27 Mar 2021 06:05:52 -0700 (PDT) -From: John Chen -To: linux-kernel@vger.kernel.org -Cc: Rohit Pidaparthi , - RicardoEPRodrigues , - Jiri Kosina , - Benjamin Tissoires , - John Chen -Subject: [PATCH 0/4] HID: add Apple Magic Mouse 2 support -Date: Sat, 27 Mar 2021 21:05:04 +0800 -Message-Id: <20210327130508.24849-1-johnchen902@gmail.com> -X-Mailer: git-send-email 2.31.0 -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -The HID descriptor of Magic Mouse 2 contains BTN_LEFT, BTN_RIGHT, REL_X, -REL_Y, whether it's charging, whether it's fully charged, and battery -capacity. - -$ xxd -p report_descriptor -05010902a101851205091901290215002501950275018102950175068103 -05010901a1001601f826ff073601fb46ff046513550d0930093175109502 -8106750895028101c00602ff09558555150026ff0075089540b1a2c00600 -ff0914a10185900584750195031500250109610585094409468102950581 -0175089501150026ff0009658102c000 - -As hidinput can handle the BTNs and RELs, the Magic Mouse 2 already -functions as a basic mouse. Nevertheless, It should be reasonable to -extend hid-magicmouse to support Magic Mouse 2 as well. Furthermore, -hidinput is patched to handle the battery capacity. - -This work is based on Recardo's, which is in turned based on Rohitpid's. -Their GitHub repositories are linked below: -https://github.com/RicardoEPRodrigues/magicmouse-hid -https://github.com/rohitpid/Linux-Magic-Trackpad-2-Driver - -John Chen (4): - HID: magicmouse: add Apple Magic Mouse 2 support - HID: magicmouse: fix 3 button emulation of Mouse 2 - HID: magicmouse: fix reconnection of Magic Mouse 2 - HID: input: map battery capacity (00850065) - - drivers/hid/hid-debug.c | 1 + - drivers/hid/hid-ids.h | 1 + - drivers/hid/hid-input.c | 11 +++ - drivers/hid/hid-magicmouse.c | 156 ++++++++++++++++++++++++++++------- - include/linux/hid.h | 3 + - 5 files changed, 140 insertions(+), 32 deletions(-) - --- -2.31.0 - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-1-4-HID-magicmouse-add-Apple-Magic-Mouse-2-support.patch b/sys-kernel/pinephone-sources/files/PATCH-1-4-HID-magicmouse-add-Apple-Magic-Mouse-2-support.patch deleted file mode 100644 index 1611a15..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-1-4-HID-magicmouse-add-Apple-Magic-Mouse-2-support.patch +++ /dev/null @@ -1,247 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, - DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, - HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, - MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham - autolearn_force=no version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 4888EC433C1 - for ; Sat, 27 Mar 2021 13:07:07 +0000 (UTC) -Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) - by mail.kernel.org (Postfix) with ESMTP id 0E6E861981 - for ; Sat, 27 Mar 2021 13:07:07 +0000 (UTC) -Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand - id S230295AbhC0NGh (ORCPT ); - Sat, 27 Mar 2021 09:06:37 -0400 -Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59740 "EHLO - lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org - with ESMTP id S229582AbhC0NGT (ORCPT - ); - Sat, 27 Mar 2021 09:06:19 -0400 -Received: from mail-pg1-x529.google.com (mail-pg1-x529.google.com [IPv6:2607:f8b0:4864:20::529]) - by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82262C0613B1 - for ; Sat, 27 Mar 2021 06:06:19 -0700 (PDT) -Received: by mail-pg1-x529.google.com with SMTP id v10so6405578pgs.12 - for ; Sat, 27 Mar 2021 06:06:19 -0700 (PDT) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=gmail.com; s=20161025; - h=from:to:cc:subject:date:message-id:in-reply-to:references - :mime-version:content-transfer-encoding; - bh=/43es5lmfTvSMg9V9lh/7OQVghMj1iNxFqwqD88gyCk=; - b=JA8+yZao+x/DmyoiRUpwr0wP9XgaNgDVez40dXm+yEd6Wlgs1dQvO3DkU8n7trJWcL - TCj7NqBp0z4pf3pSHrTxX7rWZX4yRyZJAXo7fqTPqfN2R0PkRIp5gnvcDv+7/BRM4nqx - 3pI6ubgKZ+rxYph8XNAuO94/oOjxgItIhOqYGbLPHwa2eoI60mUbrF/ukBsw8OwQ+Vli - 0siGyaoTCPP/h+9uuHJqQJ1yw6CCkCAxMwZXD79abtLytL6WkhuvoFJ6exRYGHawcHMs - bel32ifzIlv+7ULbcTI2uVNhxvdrD51tRSNrAZ77n+Tk8RivXMeSqSzPVngWZCs0uk6s - JryA== -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20161025; - h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to - :references:mime-version:content-transfer-encoding; - bh=/43es5lmfTvSMg9V9lh/7OQVghMj1iNxFqwqD88gyCk=; - b=fAhjI90TZfQpcQBqM4rN69d8uN92OH3j+lhm/dYYlmqdchK6ZZsPD3wt6VW8/ObU+0 - BpTic3inOmn0aVasSmAkbNxaVAUJ339klb/WnO9RfaemBLXDCBMgGjVr+ofhpIbfKxiZ - 0aBswW4Dc2uY39zmxm7wtJ2sRHHwj/Ltdt7B+NYes7Kzohvfg98YLvm8I5mloimR02U9 - HRlPKK2YbMcZ5i2Y8Q3faX8356caUUU7l91utK4EXdrVFCbNftXBEmRej6gXSZudCBga - 7w6Rgymaox0hfMZzYLWtJJp2fo3BcKA4+TD6bJ1yrxIdPmK59QMGoyMUIKqTIZIjN2c/ - gvpg== -X-Gm-Message-State: AOAM531lA6V8bOmQPsuLmZx3iv59gcixbI4HEH5eqWzOJ/N3DRaX/hb9 - NavPhvckezEkR22O7uWWvZAUxOplQlRwSsX5 -X-Google-Smtp-Source: ABdhPJyaSIYZWu4pp8j7TnxkxYd0BP77HzgDaIZFIDeoL910Tkv+L4VuoQLEw0GNu+5Zxi80enV/YQ== -X-Received: by 2002:a65:498b:: with SMTP id r11mr16491362pgs.364.1616850378733; - Sat, 27 Mar 2021 06:06:18 -0700 (PDT) -Received: from johnchen902-arch-ryzen.. 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[2001:b011:3815:3a1f:9afa:9bff:fe6e:3ce2]) - by smtp.gmail.com with ESMTPSA id ot17sm6413787pjb.50.2021.03.27.06.06.17 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Sat, 27 Mar 2021 06:06:18 -0700 (PDT) -From: John Chen -To: linux-kernel@vger.kernel.org -Cc: Rohit Pidaparthi , - RicardoEPRodrigues , - Jiri Kosina , - Benjamin Tissoires , - John Chen -Subject: [PATCH 1/4] HID: magicmouse: add Apple Magic Mouse 2 support -Date: Sat, 27 Mar 2021 21:05:05 +0800 -Message-Id: <20210327130508.24849-2-johnchen902@gmail.com> -X-Mailer: git-send-email 2.31.0 -In-Reply-To: <20210327130508.24849-1-johnchen902@gmail.com> -References: <20210327130508.24849-1-johnchen902@gmail.com> -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Bluetooth device - Vendor 004c (Apple) - Device 0269 (Magic Mouse 2) - -Add support for Apple Magic Mouse 2, putting the device in multi-touch -mode. - -Co-authored-by: Rohit Pidaparthi -Co-authored-by: RicardoEPRodrigues -Signed-off-by: John Chen ---- - drivers/hid/hid-ids.h | 1 + - drivers/hid/hid-magicmouse.c | 53 ++++++++++++++++++++++++++++++++---- - 2 files changed, 49 insertions(+), 5 deletions(-) - -diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h -index e42aaae3138f..fa0edf03570a 100644 ---- a/drivers/hid/hid-ids.h -+++ b/drivers/hid/hid-ids.h -@@ -93,6 +93,7 @@ - #define BT_VENDOR_ID_APPLE 0x004c - #define USB_DEVICE_ID_APPLE_MIGHTYMOUSE 0x0304 - #define USB_DEVICE_ID_APPLE_MAGICMOUSE 0x030d -+#define USB_DEVICE_ID_APPLE_MAGICMOUSE2 0x0269 - #define USB_DEVICE_ID_APPLE_MAGICTRACKPAD 0x030e - #define USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 0x0265 - #define USB_DEVICE_ID_APPLE_FOUNTAIN_ANSI 0x020e -diff --git a/drivers/hid/hid-magicmouse.c b/drivers/hid/hid-magicmouse.c -index abd86903875f..7aad6ca56780 100644 ---- a/drivers/hid/hid-magicmouse.c -+++ b/drivers/hid/hid-magicmouse.c -@@ -54,6 +54,7 @@ MODULE_PARM_DESC(report_undeciphered, "Report undeciphered multi-touch state fie - #define TRACKPAD2_USB_REPORT_ID 0x02 - #define TRACKPAD2_BT_REPORT_ID 0x31 - #define MOUSE_REPORT_ID 0x29 -+#define MOUSE2_REPORT_ID 0x12 - #define DOUBLE_REPORT_ID 0xf7 - /* These definitions are not precise, but they're close enough. (Bits - * 0x03 seem to indicate the aspect ratio of the touch, bits 0x70 seem -@@ -195,7 +196,8 @@ static void magicmouse_emit_touch(struct magicmouse_sc *msc, int raw_id, u8 *tda - int id, x, y, size, orientation, touch_major, touch_minor, state, down; - int pressure = 0; - -- if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) { -+ if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE || -+ input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) { - id = (tdata[6] << 2 | tdata[5] >> 6) & 0xf; - x = (tdata[1] << 28 | tdata[0] << 20) >> 20; - y = -((tdata[2] << 24 | tdata[1] << 16) >> 20); -@@ -296,7 +298,8 @@ static void magicmouse_emit_touch(struct magicmouse_sc *msc, int raw_id, u8 *tda - input_report_abs(input, ABS_MT_PRESSURE, pressure); - - if (report_undeciphered) { -- if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) -+ if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE || -+ input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) - input_event(input, EV_MSC, MSC_RAW, tdata[7]); - else if (input->id.product != - USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) -@@ -380,6 +383,34 @@ static int magicmouse_raw_event(struct hid_device *hdev, - * ts = data[3] >> 6 | data[4] << 2 | data[5] << 10; - */ - break; -+ case MOUSE2_REPORT_ID: -+ /* Size is either 8 or (14 + 8 * N) */ -+ if (size != 8 && (size < 14 || (size - 14) % 8 != 0)) -+ return 0; -+ npoints = (size - 14) / 8; -+ if (npoints > 15) { -+ hid_warn(hdev, "invalid size value (%d) for MOUSE2_REPORT_ID\n", -+ size); -+ return 0; -+ } -+ msc->ntouches = 0; -+ for (ii = 0; ii < npoints; ii++) -+ magicmouse_emit_touch(msc, ii, data + ii * 8 + 14); -+ -+ /* When emulating three-button mode, it is important -+ * to have the current touch information before -+ * generating a click event. -+ */ -+ x = (int)((data[3] << 24) | (data[2] << 16)) >> 16; -+ y = (int)((data[5] << 24) | (data[4] << 16)) >> 16; -+ clicks = data[1]; -+ -+ /* The following bits provide a device specific timestamp. They -+ * are unused here. -+ * -+ * ts = data[11] >> 6 | data[12] << 2 | data[13] << 10; -+ */ -+ break; - case DOUBLE_REPORT_ID: - /* Sometimes the trackpad sends two touch reports in one - * packet. -@@ -392,7 +423,8 @@ static int magicmouse_raw_event(struct hid_device *hdev, - return 0; - } - -- if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) { -+ if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE || -+ input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) { - magicmouse_emit_buttons(msc, clicks & 3); - input_report_rel(input, REL_X, x); - input_report_rel(input, REL_Y, y); -@@ -415,7 +447,8 @@ static int magicmouse_setup_input(struct input_dev *input, struct hid_device *hd - - __set_bit(EV_KEY, input->evbit); - -- if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) { -+ if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE || -+ input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) { - __set_bit(BTN_LEFT, input->keybit); - __set_bit(BTN_RIGHT, input->keybit); - if (emulate_3button) -@@ -480,7 +513,8 @@ static int magicmouse_setup_input(struct input_dev *input, struct hid_device *hd - * the origin at the same position, and just uses the additive - * inverse of the reported Y. - */ -- if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) { -+ if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE || -+ input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) { - input_set_abs_params(input, ABS_MT_ORIENTATION, -31, 32, 1, 0); - input_set_abs_params(input, ABS_MT_POSITION_X, - MOUSE_MIN_X, MOUSE_MAX_X, 4, 0); -@@ -586,6 +620,7 @@ static int magicmouse_probe(struct hid_device *hdev, - { - const u8 *feature; - const u8 feature_mt[] = { 0xD7, 0x01 }; -+ const u8 feature_mt_mouse2[] = { 0xF1, 0x02, 0x01 }; - const u8 feature_mt_trackpad2_usb[] = { 0x02, 0x01 }; - const u8 feature_mt_trackpad2_bt[] = { 0xF1, 0x02, 0x01 }; - u8 *buf; -@@ -631,6 +666,9 @@ static int magicmouse_probe(struct hid_device *hdev, - if (id->product == USB_DEVICE_ID_APPLE_MAGICMOUSE) - report = hid_register_report(hdev, HID_INPUT_REPORT, - MOUSE_REPORT_ID, 0); -+ else if (id->product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) -+ report = hid_register_report(hdev, HID_INPUT_REPORT, -+ MOUSE2_REPORT_ID, 0); - else if (id->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) { - if (id->vendor == BT_VENDOR_ID_APPLE) - report = hid_register_report(hdev, HID_INPUT_REPORT, -@@ -660,6 +698,9 @@ static int magicmouse_probe(struct hid_device *hdev, - feature_size = sizeof(feature_mt_trackpad2_usb); - feature = feature_mt_trackpad2_usb; - } -+ } else if (id->product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) { -+ feature_size = sizeof(feature_mt_mouse2); -+ feature = feature_mt_mouse2; - } else { - feature_size = sizeof(feature_mt); - feature = feature_mt; -@@ -696,6 +737,8 @@ static int magicmouse_probe(struct hid_device *hdev, - static const struct hid_device_id magic_mice[] = { - { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, - USB_DEVICE_ID_APPLE_MAGICMOUSE), .driver_data = 0 }, -+ { HID_BLUETOOTH_DEVICE(BT_VENDOR_ID_APPLE, -+ USB_DEVICE_ID_APPLE_MAGICMOUSE2), .driver_data = 0 }, - { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, - USB_DEVICE_ID_APPLE_MAGICTRACKPAD), .driver_data = 0 }, - { HID_BLUETOOTH_DEVICE(BT_VENDOR_ID_APPLE, --- -2.31.0 - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-2-4-HID-magicmouse-fix-3-button-emulation-of-Mouse-2.patch b/sys-kernel/pinephone-sources/files/PATCH-2-4-HID-magicmouse-fix-3-button-emulation-of-Mouse-2.patch deleted file mode 100644 index bc2276d..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-2-4-HID-magicmouse-fix-3-button-emulation-of-Mouse-2.patch +++ /dev/null @@ -1,134 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, - DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, - HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, - MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham - autolearn_force=no version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 06C18C433E1 - for ; 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[2001:b011:3815:3a1f:9afa:9bff:fe6e:3ce2]) - by smtp.gmail.com with ESMTPSA id ot17sm6413787pjb.50.2021.03.27.06.06.25 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Sat, 27 Mar 2021 06:06:26 -0700 (PDT) -From: John Chen -To: linux-kernel@vger.kernel.org -Cc: Rohit Pidaparthi , - RicardoEPRodrigues , - Jiri Kosina , - Benjamin Tissoires , - John Chen -Subject: [PATCH 2/4] HID: magicmouse: fix 3 button emulation of Mouse 2 -Date: Sat, 27 Mar 2021 21:05:06 +0800 -Message-Id: <20210327130508.24849-3-johnchen902@gmail.com> -X-Mailer: git-send-email 2.31.0 -In-Reply-To: <20210327130508.24849-1-johnchen902@gmail.com> -References: <20210327130508.24849-1-johnchen902@gmail.com> -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -It is observed that, with 3 button emulation, when middle button is -clicked, either the left button or right button is clicked as well. It -is caused by hidinput "correctly" acting on the event, oblivious to the -3 button emulation. - -As raw_event has taken care of everything, no further processing is -needed. However, the only way to stop at raw_event is to return an error -(negative) value. Therefore, the processing is stopped at event instead. - -Signed-off-by: John Chen ---- - drivers/hid/hid-magicmouse.c | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - -diff --git a/drivers/hid/hid-magicmouse.c b/drivers/hid/hid-magicmouse.c -index 7aad6ca56780..c646b4cd3783 100644 ---- a/drivers/hid/hid-magicmouse.c -+++ b/drivers/hid/hid-magicmouse.c -@@ -440,6 +440,21 @@ static int magicmouse_raw_event(struct hid_device *hdev, - return 1; - } - -+static int magicmouse_event(struct hid_device *hdev, struct hid_field *field, -+ struct hid_usage *usage, __s32 value) -+{ -+ struct magicmouse_sc *msc = hid_get_drvdata(hdev); -+ if (msc->input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE2 && -+ field->report->id == MOUSE2_REPORT_ID) { -+ // magic_mouse_raw_event has done all the work. Skip hidinput. -+ // -+ // Specifically, hidinput may modify BTN_LEFT and BTN_RIGHT, -+ // breaking emulate_3button. -+ return 1; -+ } -+ return 0; -+} -+ - static int magicmouse_setup_input(struct input_dev *input, struct hid_device *hdev) - { - int error; -@@ -754,6 +769,7 @@ static struct hid_driver magicmouse_driver = { - .id_table = magic_mice, - .probe = magicmouse_probe, - .raw_event = magicmouse_raw_event, -+ .event = magicmouse_event, - .input_mapping = magicmouse_input_mapping, - .input_configured = magicmouse_input_configured, - }; --- -2.31.0 - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-3-4-HID-magicmouse-fix-reconnection-of-Magic-Mouse-2.patch b/sys-kernel/pinephone-sources/files/PATCH-3-4-HID-magicmouse-fix-reconnection-of-Magic-Mouse-2.patch deleted file mode 100644 index 04dbaff..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-3-4-HID-magicmouse-fix-reconnection-of-Magic-Mouse-2.patch +++ /dev/null @@ -1,265 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, - DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, - HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, - MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham - autolearn_force=no version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 9A212C433DB - for ; Sat, 27 Mar 2021 13:10:34 +0000 (UTC) -Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) - by mail.kernel.org (Postfix) with ESMTP id 60FCC61981 - for ; Sat, 27 Mar 2021 13:10:34 +0000 (UTC) -Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand - id S230394AbhC0NHJ (ORCPT ); - Sat, 27 Mar 2021 09:07:09 -0400 -Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59810 "EHLO - lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org - with ESMTP id S230307AbhC0NGi (ORCPT - ); - Sat, 27 Mar 2021 09:06:38 -0400 -Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) - by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1EDFCC0613B1 - for ; Sat, 27 Mar 2021 06:06:38 -0700 (PDT) -Received: by mail-pf1-x432.google.com with SMTP id q5so6741894pfh.10 - for ; Sat, 27 Mar 2021 06:06:38 -0700 (PDT) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=gmail.com; s=20161025; - h=from:to:cc:subject:date:message-id:in-reply-to:references - :mime-version:content-transfer-encoding; - bh=fWEWnDB7IS15Aoqul4RZDergwEtbUe4NAH8lKjv7p/s=; - b=CGLrSHoDnG8b5CL6asLWP1Ym/QFl+wtwIF8PhKlW7RJ5IhavVtdO6Fd7/cY/3GQTDa - wvX9Q1wfBsakVlG9/sM9CuozOsra6Ec9c1B+0beWTAKj/tBjwvsVHtMoCiqOPL/Vbig6 - 4zkWMb6dwWSzAgmCqPEaYlyJYqBrDLzzXxqGhchwTfcNgNZQGq0xhh7tZsukEPz4XLIC - LNCy6+hPSVdRG1ADbyPpOGFn3fSeFs5KAwl3y1Cn0TvTPxgpckTLcFz5TsTF/w7VLGW1 - bn9Gakn+MaATqxahU0lDwyzI1sMK2er7/ddjV9VugYN4PzgL9DHGu/iGzXGFftDoLdaJ - tBIQ== -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20161025; - h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to - :references:mime-version:content-transfer-encoding; - bh=fWEWnDB7IS15Aoqul4RZDergwEtbUe4NAH8lKjv7p/s=; - b=PQiPlj7RSTzmBU6u/2xzL9qv8jrelC7cJFFiOHjwKfz43PMzm0nEj6PxY5ZFMSjmbs - JEfC8iDjJh39FJdthBrvaZX4yuTv4QmOdmRMWrN77sQYbZOaKOhbNrCx2/LdHzAFjLBY - qTHW0+siiP/ATBf1M0cSP200UZAjBwU8MRapxAlaIUmlrfr5+oM8ZrL2tMhzDYcn5b51 - TwXEVVI5Ep0YZxyGYQ04yaMBZxb1hSKev6UhrFpk96Ukg4IY3qBQBRpjWHIWqZY21aUl - EeDLmlWZaqDbp6UQQrAd2p1kIVyrxKD2Cf4aPnk2JcvzR9qGfMwV8cpR9rqwrXBEiyLj - KZFg== -X-Gm-Message-State: AOAM532lFsZyg8BiLek2pS5Ftc0rOopeD1Q9b7d5Lc7gC8pPIjHcnizK - 2/grg+4GExN9zVerojORiZgGkTwU1/c2DswO -X-Google-Smtp-Source: ABdhPJwECFbuV2SwesS0pF6L0s23ghF61g6whXAjcLZpxYe6b6OsgENBMa3gmTj9FFMF+68uJYhPPw== -X-Received: by 2002:a63:1d26:: with SMTP id d38mr17032822pgd.385.1616850397389; - Sat, 27 Mar 2021 06:06:37 -0700 (PDT) -Received: from johnchen902-arch-ryzen.. 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[2001:b011:3815:3a1f:9afa:9bff:fe6e:3ce2]) - by smtp.gmail.com with ESMTPSA id ot17sm6413787pjb.50.2021.03.27.06.06.36 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Sat, 27 Mar 2021 06:06:37 -0700 (PDT) -From: John Chen -To: linux-kernel@vger.kernel.org -Cc: Rohit Pidaparthi , - RicardoEPRodrigues , - Jiri Kosina , - Benjamin Tissoires , - John Chen -Subject: [PATCH 3/4] HID: magicmouse: fix reconnection of Magic Mouse 2 -Date: Sat, 27 Mar 2021 21:05:07 +0800 -Message-Id: <20210327130508.24849-4-johnchen902@gmail.com> -X-Mailer: git-send-email 2.31.0 -In-Reply-To: <20210327130508.24849-1-johnchen902@gmail.com> -References: <20210327130508.24849-1-johnchen902@gmail.com> -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -It is observed that the Magic Mouse 2 would not enter multi-touch mode -unless the mouse is connected before loading the module. It seems to be -a quirk specific to Magic Mouse 2 - -Retrying after 500ms fixes the problem for me. The delay can't be -reduced much further --- 300ms didn't work for me. Retrying immediately -after receiving an event didn't work either. - -Signed-off-by: John Chen ---- - drivers/hid/hid-magicmouse.c | 93 ++++++++++++++++++++++++------------ - 1 file changed, 63 insertions(+), 30 deletions(-) - -diff --git a/drivers/hid/hid-magicmouse.c b/drivers/hid/hid-magicmouse.c -index c646b4cd3783..69aefef9fe07 100644 ---- a/drivers/hid/hid-magicmouse.c -+++ b/drivers/hid/hid-magicmouse.c -@@ -16,6 +16,7 @@ - #include - #include - #include -+#include - - #include "hid-ids.h" - -@@ -128,6 +129,9 @@ struct magicmouse_sc { - u8 size; - } touches[16]; - int tracking_ids[16]; -+ -+ struct hid_device *hdev; -+ struct delayed_work work; - }; - - static int magicmouse_firm_touch(struct magicmouse_sc *msc) -@@ -629,9 +633,7 @@ static int magicmouse_input_configured(struct hid_device *hdev, - return 0; - } - -- --static int magicmouse_probe(struct hid_device *hdev, -- const struct hid_device_id *id) -+static int magicmouse_enable_multitouch(struct hid_device *hdev) - { - const u8 *feature; - const u8 feature_mt[] = { 0xD7, 0x01 }; -@@ -639,10 +641,52 @@ static int magicmouse_probe(struct hid_device *hdev, - const u8 feature_mt_trackpad2_usb[] = { 0x02, 0x01 }; - const u8 feature_mt_trackpad2_bt[] = { 0xF1, 0x02, 0x01 }; - u8 *buf; -+ int ret; -+ int feature_size; -+ -+ if (hdev->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) { -+ if (hdev->vendor == BT_VENDOR_ID_APPLE) { -+ feature_size = sizeof(feature_mt_trackpad2_bt); -+ feature = feature_mt_trackpad2_bt; -+ } else { /* USB_VENDOR_ID_APPLE */ -+ feature_size = sizeof(feature_mt_trackpad2_usb); -+ feature = feature_mt_trackpad2_usb; -+ } -+ } else if (hdev->product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) { -+ feature_size = sizeof(feature_mt_mouse2); -+ feature = feature_mt_mouse2; -+ } else { -+ feature_size = sizeof(feature_mt); -+ feature = feature_mt; -+ } -+ -+ buf = kmemdup(feature, feature_size, GFP_KERNEL); -+ if (!buf) -+ return -ENOMEM; -+ -+ ret = hid_hw_raw_request(hdev, buf[0], buf, feature_size, -+ HID_FEATURE_REPORT, HID_REQ_SET_REPORT); -+ kfree(buf); -+ return ret; -+} -+ -+static void magicmouse_enable_mt_work(struct work_struct *work) -+{ -+ struct magicmouse_sc *msc = -+ container_of(work, struct magicmouse_sc, work.work); -+ int ret; -+ -+ ret = magicmouse_enable_multitouch(msc->hdev); -+ if (ret < 0) -+ hid_err(msc->hdev, "unable to request touch data (%d)\n", ret); -+} -+ -+static int magicmouse_probe(struct hid_device *hdev, -+ const struct hid_device_id *id) -+{ - struct magicmouse_sc *msc; - struct hid_report *report; - int ret; -- int feature_size; - - if (id->vendor == USB_VENDOR_ID_APPLE && - id->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 && -@@ -656,6 +700,8 @@ static int magicmouse_probe(struct hid_device *hdev, - } - - msc->scroll_accel = SCROLL_ACCEL_DEFAULT; -+ msc->hdev = hdev; -+ INIT_DEFERRABLE_WORK(&msc->work, magicmouse_enable_mt_work); - - msc->quirks = id->driver_data; - hid_set_drvdata(hdev, msc); -@@ -705,28 +751,6 @@ static int magicmouse_probe(struct hid_device *hdev, - } - report->size = 6; - -- if (id->product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD2) { -- if (id->vendor == BT_VENDOR_ID_APPLE) { -- feature_size = sizeof(feature_mt_trackpad2_bt); -- feature = feature_mt_trackpad2_bt; -- } else { /* USB_VENDOR_ID_APPLE */ -- feature_size = sizeof(feature_mt_trackpad2_usb); -- feature = feature_mt_trackpad2_usb; -- } -- } else if (id->product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) { -- feature_size = sizeof(feature_mt_mouse2); -- feature = feature_mt_mouse2; -- } else { -- feature_size = sizeof(feature_mt); -- feature = feature_mt; -- } -- -- buf = kmemdup(feature, feature_size, GFP_KERNEL); -- if (!buf) { -- ret = -ENOMEM; -- goto err_stop_hw; -- } -- - /* - * Some devices repond with 'invalid report id' when feature - * report switching it into multitouch mode is sent to it. -@@ -735,13 +759,14 @@ static int magicmouse_probe(struct hid_device *hdev, - * but there seems to be no other way of switching the mode. - * Thus the super-ugly hacky success check below. - */ -- ret = hid_hw_raw_request(hdev, buf[0], buf, feature_size, -- HID_FEATURE_REPORT, HID_REQ_SET_REPORT); -- kfree(buf); -- if (ret != -EIO && ret != feature_size) { -+ ret = magicmouse_enable_multitouch(hdev); -+ if (ret != -EIO && ret < 0) { - hid_err(hdev, "unable to request touch data (%d)\n", ret); - goto err_stop_hw; - } -+ if (ret == -EIO && id->product == USB_DEVICE_ID_APPLE_MAGICMOUSE2) { -+ schedule_delayed_work(&msc->work, msecs_to_jiffies(500)); -+ } - - return 0; - err_stop_hw: -@@ -749,6 +774,13 @@ static int magicmouse_probe(struct hid_device *hdev, - return ret; - } - -+static void magicmouse_remove(struct hid_device *hdev) -+{ -+ struct magicmouse_sc *msc = hid_get_drvdata(hdev); -+ cancel_delayed_work_sync(&msc->work); -+ hid_hw_stop(hdev); -+} -+ - static const struct hid_device_id magic_mice[] = { - { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, - USB_DEVICE_ID_APPLE_MAGICMOUSE), .driver_data = 0 }, -@@ -768,6 +800,7 @@ static struct hid_driver magicmouse_driver = { - .name = "magicmouse", - .id_table = magic_mice, - .probe = magicmouse_probe, -+ .remove = magicmouse_remove, - .raw_event = magicmouse_raw_event, - .event = magicmouse_event, - .input_mapping = magicmouse_input_mapping, --- -2.31.0 - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-4-4-HID-input-map-battery-capacity-00850065.patch b/sys-kernel/pinephone-sources/files/PATCH-4-4-HID-input-map-battery-capacity-00850065.patch deleted file mode 100644 index d697933..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-4-4-HID-input-map-battery-capacity-00850065.patch +++ /dev/null @@ -1,155 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, - DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, - HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, - MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham - autolearn_force=no version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 9BE24C433E0 - for ; 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[2001:b011:3815:3a1f:9afa:9bff:fe6e:3ce2]) - by smtp.gmail.com with ESMTPSA id ot17sm6413787pjb.50.2021.03.27.06.06.42 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Sat, 27 Mar 2021 06:06:43 -0700 (PDT) -From: John Chen -To: linux-kernel@vger.kernel.org -Cc: Rohit Pidaparthi , - RicardoEPRodrigues , - Jiri Kosina , - Benjamin Tissoires , - John Chen -Subject: [PATCH 4/4] HID: input: map battery capacity (00850065) -Date: Sat, 27 Mar 2021 21:05:08 +0800 -Message-Id: <20210327130508.24849-5-johnchen902@gmail.com> -X-Mailer: git-send-email 2.31.0 -In-Reply-To: <20210327130508.24849-1-johnchen902@gmail.com> -References: <20210327130508.24849-1-johnchen902@gmail.com> -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -This is the capacity in percentage, relative to design capacity. -Specifically, it is present in Apple Magic Mouse 2. - -In contrast, usage 00850064 is also the capacity in percentage, but is -relative to full capacity. It is not mapped here because I don't have -such device. - -Signed-off-by: John Chen ---- - drivers/hid/hid-debug.c | 1 + - drivers/hid/hid-input.c | 11 +++++++++++ - include/linux/hid.h | 3 +++ - 3 files changed, 15 insertions(+) - -diff --git a/drivers/hid/hid-debug.c b/drivers/hid/hid-debug.c -index d7eaf9100370..59f8d716d78f 100644 ---- a/drivers/hid/hid-debug.c -+++ b/drivers/hid/hid-debug.c -@@ -417,6 +417,7 @@ static const struct hid_usage_entry hid_usage_table[] = { - { 0x85, 0x44, "Charging" }, - { 0x85, 0x45, "Discharging" }, - { 0x85, 0x4b, "NeedReplacement" }, -+ { 0x85, 0x65, "AbsoluteStateOfCharge" }, - { 0x85, 0x66, "RemainingCapacity" }, - { 0x85, 0x68, "RunTimeToEmpty" }, - { 0x85, 0x6a, "AverageTimeToFull" }, -diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c -index 236bccd37760..5dea3669a927 100644 ---- a/drivers/hid/hid-input.c -+++ b/drivers/hid/hid-input.c -@@ -1074,6 +1074,17 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel - } - goto unknown; - -+ case HID_UP_BATTERY: -+ switch (usage->hid) { -+ case HID_BAT_ABSOLUTESTATEOFCHARGE: -+ hidinput_setup_battery(device, HID_INPUT_REPORT, field); -+ usage->type = EV_PWR; -+ device->battery_min = 0; -+ device->battery_max = 100; -+ return; -+ } -+ goto unknown; -+ - case HID_UP_HPVENDOR: /* Reported on a Dutch layout HP5308 */ - set_bit(EV_REP, input->evbit); - switch (usage->hid & HID_USAGE) { -diff --git a/include/linux/hid.h b/include/linux/hid.h -index ef702b3f56e3..b40e1abbe11d 100644 ---- a/include/linux/hid.h -+++ b/include/linux/hid.h -@@ -153,6 +153,7 @@ struct hid_item { - #define HID_UP_CONSUMER 0x000c0000 - #define HID_UP_DIGITIZER 0x000d0000 - #define HID_UP_PID 0x000f0000 -+#define HID_UP_BATTERY 0x00850000 - #define HID_UP_HPVENDOR 0xff7f0000 - #define HID_UP_HPVENDOR2 0xff010000 - #define HID_UP_MSVENDOR 0xff000000 -@@ -297,6 +298,8 @@ struct hid_item { - #define HID_DG_TOOLSERIALNUMBER 0x000d005b - #define HID_DG_LATENCYMODE 0x000d0060 - -+#define HID_BAT_ABSOLUTESTATEOFCHARGE 0x00850065 -+ - #define HID_VD_ASUS_CUSTOM_MEDIA_KEYS 0xff310076 - /* - * HID report types --- Ouch! HID spec says 1 2 3! --- -2.31.0 - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-00-14-Multigenerational-LRU.txt b/sys-kernel/pinephone-sources/files/PATCH-v1-00-14-Multigenerational-LRU.txt deleted file mode 100644 index 0224e61..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-00-14-Multigenerational-LRU.txt +++ /dev/null @@ -1,330 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-21.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT, - USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 3BECEC433E0 - for ; Sat, 13 Mar 2021 07:59:06 +0000 (UTC) -Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) - by mail.kernel.org (Postfix) with ESMTP id E48DB64F1D - for ; Sat, 13 Mar 2021 07:59:05 +0000 (UTC) -Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand - id S233163AbhCMH6d (ORCPT ); - Sat, 13 Mar 2021 02:58:33 -0500 -Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58938 "EHLO - lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org - with ESMTP id S230309AbhCMH55 (ORCPT - ); - Sat, 13 Mar 2021 02:57:57 -0500 -Received: from mail-qk1-x74a.google.com (mail-qk1-x74a.google.com [IPv6:2607:f8b0:4864:20::74a]) - by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25364C061574 - for ; Fri, 12 Mar 2021 23:57:57 -0800 (PST) -Received: by mail-qk1-x74a.google.com with SMTP id k188so1766042qkb.5 - for ; Fri, 12 Mar 2021 23:57:57 -0800 (PST) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=google.com; s=20161025; - h=date:message-id:mime-version:subject:from:to:cc; - bh=Dl/3fLOB0H+oajTIzqKaDQePlH9N08uWOrKgpspO4TI=; - b=ZDlp8kO1cOzH9TKK391ns60MA5XH6wAt4WlC5cRspVrndQuLOdzpe4WuBER+H/7iF2 - P/jJN5bw/W10rtSgEJl+3nFM9KliKjzDKLX1Wjo+FdVZj7lWam1qWgkQTlezZ+NtB7MK - cT+C7m++Ac2yj63uufwG9IIyPjtCqwGGHd6caaZjsFdwrZIYl6mprawhmN0ajnA+KxLu - 3msx/zJkbVaZ75VF4EavCd4hAKjuHACTjU5DSIC+hq9i3Y5TuQGinRu50cx5wXXQqKu+ - TLyLtiLkTbZaVeLhF0uQooG8E4w+JXFmnfMxWOPsekXQyWZHebj5hpUPJ1nW39iQnMBt - NShw== -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20161025; - h=x-gm-message-state:date:message-id:mime-version:subject:from:to:cc; - bh=Dl/3fLOB0H+oajTIzqKaDQePlH9N08uWOrKgpspO4TI=; - b=XOeOFYm39AC6u/tzgFN40WA+JyClAjJZL1vfB4B2WAz2bh8R5boQeyY2Px52/PXMqe - PCZUSDqqa3qe2AL+XMFxSKay7L4rvvcPP294PgvjMTHIci5V4Nvhb2gooGAFYMoxkgvH - lEixBlTS6nGyJ8IubphUQVdIAQN9EaHViPwha6EQb3TvAyPjae5NDLVjv32BjQLi8CGw - OTubWcbqjEu/b5lo0MSHi/e6RCI3rcUJRFagT567WMEKCRXl9L9lKS2Y/hxoG2vx6f7E - NTzYk8hh52IHO/hBULiYGwss1WApIAFZmg6gkNZJQhw3Z7ZYCxHz7oMXAJCzFeOBikcZ - lJnw== -X-Gm-Message-State: AOAM5315xRkAW2HlZY5TGBhlW7nW/go+xoCYXD97M7G+xWGL5D5tgqcK - MXUwE4z8bQg+QCpnSwxROcufEldhmTU= -X-Google-Smtp-Source: ABdhPJyxefk+CsNOhJRg0zohX7wmgO41UdqyprhNKHQCCmk9ImMeIO+UNC1eONE3N7hnVkFPu9qRD/MnUEM= -X-Received: from yuzhao.bld.corp.google.com ([2620:15c:183:200:f931:d3e4:faa0:4f74]) - (user=yuzhao job=sendgmr) by 2002:a0c:fc06:: with SMTP id z6mr1801957qvo.25.1615622276103; - Fri, 12 Mar 2021 23:57:56 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:33 -0700 -Message-Id: <20210313075747.3781593-1-yuzhao@google.com> -Mime-Version: 1.0 -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 00/14] Multigenerational LRU -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -TLDR -==== -The current page reclaim is too expensive in terms of CPU usage and -often making poor choices about what to evict. We would like to offer -a performant, versatile and straightforward augment. - -Repo -==== -git fetch https://linux-mm.googlesource.com/page-reclaim refs/changes/01/1101/1 - -Gerrit https://linux-mm-review.googlesource.com/c/page-reclaim/+/1101 - -Background -========== -DRAM is a major factor in total cost of ownership, and improving -memory overcommit brings a high return on investment. Over the past -decade of research and experimentation in memory overcommit, we -observed a distinct trend across millions of servers and clients: the -size of page cache has been decreasing because of the growing -popularity of cloud storage. Nowadays anon pages account for more than -90% of our memory consumption and page cache contains mostly -executable pages. - -Problems -======== -Notion of the active/inactive ------------------------------ -For servers equipped with hundreds of gigabytes of memory, the -granularity of the active/inactive is too coarse to be useful for job -scheduling. And false active/inactive rates are relatively high. In -addition, scans of largely varying numbers of pages are unpredictable -because inactive_is_low() is based on magic numbers. - -For phones and laptops, the eviction is biased toward file pages -because the selection has to resort to heuristics as direct -comparisons between anon and file types are infeasible. On Android and -Chrome OS, executable pages are frequently evicted despite the fact -that there are many less recently used anon pages. This causes "janks" -(slow UI rendering) and negatively impacts user experience. - -For systems with multiple nodes and/or memcgs, it is impossible to -compare lruvecs based on the notion of the active/inactive. - -Incremental scans via the rmap ------------------------------- -Each incremental scan picks up at where the last scan left off and -stops after it has found a handful of unreferenced pages. For most of -the systems running cloud workloads, incremental scans lose the -advantage under sustained memory pressure due to high ratios of the -number of scanned pages to the number of reclaimed pages. In our case, -the average ratio of pgscan to pgsteal is about 7. - -On top of that, the rmap has poor memory locality due to its complex -data structures. The combined effects typically result in a high -amount of CPU usage in the reclaim path. For example, with zram, a -typical kswapd profile on v5.11 looks like: - 31.03% page_vma_mapped_walk - 25.59% lzo1x_1_do_compress - 4.63% do_raw_spin_lock - 3.89% vma_interval_tree_iter_next - 3.33% vma_interval_tree_subtree_search - -And with real swap, it looks like: - 45.16% page_vma_mapped_walk - 7.61% do_raw_spin_lock - 5.69% vma_interval_tree_iter_next - 4.91% vma_interval_tree_subtree_search - 3.71% page_referenced_one - -Solutions -========= -Notion of generation numbers ----------------------------- -The notion of generation numbers introduces a quantitative approach to -memory overcommit. A larger number of pages can be spread out across -configurable generations, and thus they have relatively low false -active/inactive rates. Each generation includes all pages that have -been referenced since the last generation. - -Given an lruvec, scans and the selections between anon and file types -are all based on generation numbers, which are simple and yet -effective. For different lruvecs, comparisons are still possible based -on birth times of generations. - -Differential scans via page tables ----------------------------------- -Each differential scan discovers all pages that have been referenced -since the last scan. Specifically, it walks the mm_struct list -associated with an lruvec to scan page tables of processes that have -been scheduled since the last scan. The cost of each differential scan -is roughly proportional to the number of referenced pages it -discovers. Unless address spaces are extremely sparse, page tables -usually have better memory locality than the rmap. The end result is -generally a significant reduction in CPU usage, for most of the -systems running cloud workloads. - -On Chrome OS, our real-world benchmark that browses popular websites -in multiple tabs demonstrates 51% less CPU usage from kswapd and 52% -(full) less PSI on v5.11. And kswapd profile looks like: - 49.36% lzo1x_1_do_compress - 4.54% page_vma_mapped_walk - 4.45% memset_erms - 3.47% walk_pte_range - 2.88% zram_bvec_rw - -In addition, direct reclaim latency is reduced by 22% at 99th -percentile and the number of refaults is reduced 7%. These metrics are -important to phones and laptops as they are correlated to user -experience. - -Workflow -======== -Evictable pages are divided into multiple generations for each lruvec. -The youngest generation number is stored in lruvec->evictable.max_seq -for both anon and file types as they are aged on an equal footing. The -oldest generation numbers are stored in lruvec->evictable.min_seq[2] -separately for anon and file types as clean file pages can be evicted -regardless of may_swap or may_writepage. Generation numbers are -truncated into ilog2(MAX_NR_GENS)+1 bits in order to fit into -page->flags. The sliding window technique is used to prevent truncated -generation numbers from overlapping. Each truncated generation number -is an index to -lruvec->evictable.lists[MAX_NR_GENS][ANON_AND_FILE][MAX_NR_ZONES]. -Evictable pages are added to the per-zone lists indexed by max_seq or -min_seq[2] (modulo MAX_NR_GENS), depending on whether they are being -faulted in or read ahead. The workflow comprises two conceptually -independent functions: the aging and the eviction. - -Aging ------ -The aging produces young generations. Given an lruvec, the aging scans -page tables for referenced pages of this lruvec. Upon finding one, the -aging updates its generation number to max_seq. After each round of -scan, the aging increments max_seq. The aging maintains either a -system-wide mm_struct list or per-memcg mm_struct lists and tracks -whether an mm_struct is being used on any CPUs or has been used since -the last scan. Multiple threads can concurrently work on the same -mm_struct list, and each of them will be given a different mm_struct -belonging to a process that has been scheduled since the last scan. - -Eviction --------- -The eviction consumes old generations. Given an lruvec, the eviction -scans the pages on the per-zone lists indexed by either of min_seq[2]. -It selects a type according to the values of min_seq[2] and -swappiness. During a scan, the eviction either sorts or isolates a -page, depending on whether the aging has updated its generation -number. When it finds all the per-zone lists are empty, the eviction -increments min_seq[2] indexed by this selected type. The eviction -triggers the aging when both of min_seq[2] reaches max_seq-1, assuming -both anon and file types are reclaimable. - -Use cases -========= -On Android, our most advanced simulation that generates memory -pressure from realistic user behavior shows 18% fewer low-memory -kills, which in turn reduces cold starts by 16%. - -On Borg, a similar approach enables us to identify jobs that -underutilize their memory and downsize them considerably without -compromising any of our service level indicators. - -On Chrome OS, our field telemetry reports 96% fewer low-memory tab -discards and 59% fewer OOM kills from fully-utilized devices and no UX -regressions from underutilized devices. - -For other use cases include working set estimation, proactive reclaim, -far memory tiering and NUMA-aware job scheduling, please refer to the -documentation included in this series and the following references. - -References -========== -1. Long-term SLOs for reclaimed cloud computing resources - https://research.google/pubs/pub43017/ -2. Profiling a warehouse-scale computer - https://research.google/pubs/pub44271/ -3. Evaluation of NUMA-Aware Scheduling in Warehouse-Scale Clusters - https://research.google/pubs/pub48329/ -4. Software-defined far memory in warehouse-scale computers - https://research.google/pubs/pub48551/ -5. Borg: the Next Generation - https://research.google/pubs/pub49065/ - -Yu Zhao (14): - include/linux/memcontrol.h: do not warn in page_memcg_rcu() if - !CONFIG_MEMCG - include/linux/nodemask.h: define next_memory_node() if !CONFIG_NUMA - include/linux/huge_mm.h: define is_huge_zero_pmd() if - !CONFIG_TRANSPARENT_HUGEPAGE - include/linux/cgroup.h: export cgroup_mutex - mm/swap.c: export activate_page() - mm, x86: support the access bit on non-leaf PMD entries - mm/pagewalk.c: add pud_entry_post() for post-order traversals - mm/vmscan.c: refactor shrink_node() - mm: multigenerational lru: mm_struct list - mm: multigenerational lru: core - mm: multigenerational lru: page activation - mm: multigenerational lru: user space interface - mm: multigenerational lru: Kconfig - mm: multigenerational lru: documentation - - Documentation/vm/index.rst | 1 + - Documentation/vm/multigen_lru.rst | 210 +++ - arch/Kconfig | 8 + - arch/x86/Kconfig | 1 + - arch/x86/include/asm/pgtable.h | 2 +- - arch/x86/mm/pgtable.c | 5 +- - fs/exec.c | 2 + - fs/proc/task_mmu.c | 3 +- - include/linux/cgroup.h | 15 +- - include/linux/huge_mm.h | 5 + - include/linux/memcontrol.h | 5 +- - include/linux/mm.h | 1 + - include/linux/mm_inline.h | 246 ++++ - include/linux/mm_types.h | 135 ++ - include/linux/mmzone.h | 62 +- - include/linux/nodemask.h | 1 + - include/linux/page-flags-layout.h | 20 +- - include/linux/pagewalk.h | 4 + - include/linux/pgtable.h | 4 +- - include/linux/swap.h | 5 +- - kernel/events/uprobes.c | 2 +- - kernel/exit.c | 1 + - kernel/fork.c | 10 + - kernel/kthread.c | 1 + - kernel/sched/core.c | 2 + - mm/Kconfig | 29 + - mm/huge_memory.c | 5 +- - mm/khugepaged.c | 2 +- - mm/memcontrol.c | 28 + - mm/memory.c | 14 +- - mm/migrate.c | 2 +- - mm/mm_init.c | 13 +- - mm/mmzone.c | 2 + - mm/pagewalk.c | 5 + - mm/rmap.c | 6 + - mm/swap.c | 58 +- - mm/swapfile.c | 6 +- - mm/userfaultfd.c | 2 +- - mm/vmscan.c | 2091 +++++++++++++++++++++++++++-- - 39 files changed, 2870 insertions(+), 144 deletions(-) - create mode 100644 Documentation/vm/multigen_lru.rst - --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-01-14-include-linux-memcontrol.h-do-not-warn-in-page_memcg_rcu-if-CONFIG_MEMCG.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-01-14-include-linux-memcontrol.h-do-not-warn-in-page_memcg_rcu-if-CONFIG_MEMCG.patch deleted file mode 100644 index d733d2a..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-01-14-include-linux-memcontrol.h-do-not-warn-in-page_memcg_rcu-if-CONFIG_MEMCG.patch +++ /dev/null @@ -1,129 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 42B16C433DB - for ; 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- Fri, 12 Mar 2021 23:57:57 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:34 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-2-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 01/14] include/linux/memcontrol.h: do not warn in - page_memcg_rcu() if !CONFIG_MEMCG -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -We want to make sure the rcu lock is held while using -page_memcg_rcu(). But having a WARN_ON_ONCE() in page_memcg_rcu() when -!CONFIG_MEMCG is superfluous because of the following legit use case: - - memcg = lock_page_memcg(page1) - (rcu_read_lock() if CONFIG_MEMCG=y) - - do something to page1 - - if (page_memcg_rcu(page2) == memcg) - do something to page2 too as it cannot be migrated away from the - memcg either. - - unlock_page_memcg(page1) - (rcu_read_unlock() if CONFIG_MEMCG=y) - -This patch removes the WARN_ON_ONCE() from page_memcg_rcu() for the -!CONFIG_MEMCG case. - -Signed-off-by: Yu Zhao ---- - include/linux/memcontrol.h | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h -index e6dc793d587d..f325aeb4b4e8 100644 ---- a/include/linux/memcontrol.h -+++ b/include/linux/memcontrol.h -@@ -1079,7 +1079,6 @@ static inline struct mem_cgroup *page_memcg(struct page *page) - - static inline struct mem_cgroup *page_memcg_rcu(struct page *page) - { -- WARN_ON_ONCE(!rcu_read_lock_held()); - return NULL; - } - --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-02-14-include-linux-nodemask.h-define-next_memory_node-if-CONFIG_NUMA.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-02-14-include-linux-nodemask.h-define-next_memory_node-if-CONFIG_NUMA.patch deleted file mode 100644 index 957ec97..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-02-14-include-linux-nodemask.h-define-next_memory_node-if-CONFIG_NUMA.patch +++ /dev/null @@ -1,113 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 7CAADC433E9 - for ; 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- Fri, 12 Mar 2021 23:57:58 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:35 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-3-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 02/14] include/linux/nodemask.h: define next_memory_node() - if !CONFIG_NUMA -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Currently next_memory_node only exists when CONFIG_NUMA=y. This patch -defines the macro for the !CONFIG_NUMA case. - -Signed-off-by: Yu Zhao ---- - include/linux/nodemask.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/include/linux/nodemask.h b/include/linux/nodemask.h -index ac398e143c9a..89fe4e3592f9 100644 ---- a/include/linux/nodemask.h -+++ b/include/linux/nodemask.h -@@ -486,6 +486,7 @@ static inline int num_node_state(enum node_states state) - #define first_online_node 0 - #define first_memory_node 0 - #define next_online_node(nid) (MAX_NUMNODES) -+#define next_memory_node(nid) (MAX_NUMNODES) - #define nr_node_ids 1U - #define nr_online_nodes 1U - --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-03-14-include-linux-huge_mm.h-define-is_huge_zero_pmd-if-CONFIG_TRANSPARENT_HUGEPAGE.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-03-14-include-linux-huge_mm.h-define-is_huge_zero_pmd-if-CONFIG_TRANSPARENT_HUGEPAGE.patch deleted file mode 100644 index 8318ddf..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-03-14-include-linux-huge_mm.h-define-is_huge_zero_pmd-if-CONFIG_TRANSPARENT_HUGEPAGE.patch +++ /dev/null @@ -1,118 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 97984C433E6 - for ; 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Fri, 12 Mar 2021 23:58:00 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:36 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-4-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 03/14] include/linux/huge_mm.h: define is_huge_zero_pmd() - if !CONFIG_TRANSPARENT_HUGEPAGE -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Currently is_huge_zero_pmd() only exists when -CONFIG_TRANSPARENT_HUGEPAGE=y. This patch defines the function for the -!CONFIG_TRANSPARENT_HUGEPAGE case. - -Signed-off-by: Yu Zhao ---- - include/linux/huge_mm.h | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/include/linux/huge_mm.h b/include/linux/huge_mm.h -index ba973efcd369..0ba7b3f9029c 100644 ---- a/include/linux/huge_mm.h -+++ b/include/linux/huge_mm.h -@@ -443,6 +443,11 @@ static inline bool is_huge_zero_page(struct page *page) - return false; - } - -+static inline bool is_huge_zero_pmd(pmd_t pmd) -+{ -+ return false; -+} -+ - static inline bool is_huge_zero_pud(pud_t pud) - { - return false; --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-04-14-include-linux-cgroup.h-export-cgroup_mutex.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-04-14-include-linux-cgroup.h-export-cgroup_mutex.patch deleted file mode 100644 index 8fd6190..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-04-14-include-linux-cgroup.h-export-cgroup_mutex.patch +++ /dev/null @@ -1,140 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id A8DC7C43381 - for ; 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- Fri, 12 Mar 2021 23:58:01 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:37 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-5-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 04/14] include/linux/cgroup.h: export cgroup_mutex -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Export cgroup_mutex so it can be used to synchronize with memcg -allocations. - -Signed-off-by: Yu Zhao ---- - include/linux/cgroup.h | 15 ++++++++++++++- - 1 file changed, 14 insertions(+), 1 deletion(-) - -diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h -index 4f2f79de083e..bd5744360cfa 100644 ---- a/include/linux/cgroup.h -+++ b/include/linux/cgroup.h -@@ -432,6 +432,18 @@ static inline void cgroup_put(struct cgroup *cgrp) - css_put(&cgrp->self); - } - -+extern struct mutex cgroup_mutex; -+ -+static inline void cgroup_lock(void) -+{ -+ mutex_lock(&cgroup_mutex); -+} -+ -+static inline void cgroup_unlock(void) -+{ -+ mutex_unlock(&cgroup_mutex); -+} -+ - /** - * task_css_set_check - obtain a task's css_set with extra access conditions - * @task: the task to obtain css_set for -@@ -446,7 +458,6 @@ static inline void cgroup_put(struct cgroup *cgrp) - * as locks used during the cgroup_subsys::attach() methods. - */ - #ifdef CONFIG_PROVE_RCU --extern struct mutex cgroup_mutex; - extern spinlock_t css_set_lock; - #define task_css_set_check(task, __c) \ - rcu_dereference_check((task)->cgroups, \ -@@ -704,6 +715,8 @@ struct cgroup; - static inline u64 cgroup_id(const struct cgroup *cgrp) { return 1; } - static inline void css_get(struct cgroup_subsys_state *css) {} - static inline void css_put(struct cgroup_subsys_state *css) {} -+static inline void cgroup_lock(void) {} -+static inline void cgroup_unlock(void) {} - static inline int cgroup_attach_task_all(struct task_struct *from, - struct task_struct *t) { return 0; } - static inline int cgroupstats_build(struct cgroupstats *stats, --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-05-14-mm-swap.c-export-activate_page.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-05-14-mm-swap.c-export-activate_page.patch deleted file mode 100644 index 39f5262..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-05-14-mm-swap.c-export-activate_page.patch +++ /dev/null @@ -1,178 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id C5A9BC4332B - for ; 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- Fri, 12 Mar 2021 23:58:02 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:38 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-6-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 05/14] mm/swap.c: export activate_page() -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Export activate_page(), which is a merger between the existing -activate_page() and __lru_cache_activate_page(), so it can be used to -activate pages that are already on lru or queued in lru_pvecs.lru_add. - -Signed-off-by: Yu Zhao ---- - include/linux/swap.h | 1 + - mm/swap.c | 28 +++++++++++++++------------- - 2 files changed, 16 insertions(+), 13 deletions(-) - -diff --git a/include/linux/swap.h b/include/linux/swap.h -index 4cc6ec3bf0ab..de2bbbf181ba 100644 ---- a/include/linux/swap.h -+++ b/include/linux/swap.h -@@ -344,6 +344,7 @@ extern void lru_add_drain_cpu(int cpu); - extern void lru_add_drain_cpu_zone(struct zone *zone); - extern void lru_add_drain_all(void); - extern void rotate_reclaimable_page(struct page *page); -+extern void activate_page(struct page *page); - extern void deactivate_file_page(struct page *page); - extern void deactivate_page(struct page *page); - extern void mark_page_lazyfree(struct page *page); -diff --git a/mm/swap.c b/mm/swap.c -index 31b844d4ed94..f20ed56ebbbf 100644 ---- a/mm/swap.c -+++ b/mm/swap.c -@@ -334,7 +334,7 @@ static bool need_activate_page_drain(int cpu) - return pagevec_count(&per_cpu(lru_pvecs.activate_page, cpu)) != 0; - } - --static void activate_page(struct page *page) -+static void activate_page_on_lru(struct page *page) - { - page = compound_head(page); - if (PageLRU(page) && !PageActive(page) && !PageUnevictable(page)) { -@@ -354,7 +354,7 @@ static inline void activate_page_drain(int cpu) - { - } - --static void activate_page(struct page *page) -+static void activate_page_on_lru(struct page *page) - { - struct lruvec *lruvec; - -@@ -368,11 +368,22 @@ static void activate_page(struct page *page) - } - #endif - --static void __lru_cache_activate_page(struct page *page) -+/* -+ * If the page is on the LRU, queue it for activation via -+ * lru_pvecs.activate_page. Otherwise, assume the page is on a -+ * pagevec, mark it active and it'll be moved to the active -+ * LRU on the next drain. -+ */ -+void activate_page(struct page *page) - { - struct pagevec *pvec; - int i; - -+ if (PageLRU(page)) { -+ activate_page_on_lru(page); -+ return; -+ } -+ - local_lock(&lru_pvecs.lock); - pvec = this_cpu_ptr(&lru_pvecs.lru_add); - -@@ -421,16 +432,7 @@ void mark_page_accessed(struct page *page) - * evictable page accessed has no effect. - */ - } else if (!PageActive(page)) { -- /* -- * If the page is on the LRU, queue it for activation via -- * lru_pvecs.activate_page. Otherwise, assume the page is on a -- * pagevec, mark it active and it'll be moved to the active -- * LRU on the next drain. -- */ -- if (PageLRU(page)) -- activate_page(page); -- else -- __lru_cache_activate_page(page); -+ activate_page(page); - ClearPageReferenced(page); - workingset_activation(page); - } --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-06-14-mm-x86-support-the-access-bit-on-non-leaf-PMD-entries.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-06-14-mm-x86-support-the-access-bit-on-non-leaf-PMD-entries.patch deleted file mode 100644 index 68fea19..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-06-14-mm-x86-support-the-access-bit-on-non-leaf-PMD-entries.patch +++ /dev/null @@ -1,202 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id CFB78C43331 - for ; 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- Fri, 12 Mar 2021 23:58:04 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:39 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-7-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 06/14] mm, x86: support the access bit on non-leaf PMD entries -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Some architectures support the accessed bit on non-leaf PMD entries -(parents) in addition to leaf PTE entries (children) where pages are -mapped, e.g., x86_64 sets the accessed bit on a parent when using it -as part of linear-address translation [1]. Page table walkers who are -interested in the accessed bit on children can take advantage of this: -they do not need to search the children when the accessed bit is not -set on a parent, given that they have previously cleared the accessed -bit on this parent in addition to its children. - -[1]: Intel 64 and IA-32 Architectures Software Developer's Manual - Volume 3 (October 2019), section 4.8 - -Signed-off-by: Yu Zhao ---- - arch/Kconfig | 8 ++++++++ - arch/x86/Kconfig | 1 + - arch/x86/include/asm/pgtable.h | 2 +- - arch/x86/mm/pgtable.c | 5 ++++- - include/linux/pgtable.h | 4 ++-- - 5 files changed, 16 insertions(+), 4 deletions(-) - -diff --git a/arch/Kconfig b/arch/Kconfig -index 2bb30673d8e6..137446d17732 100644 ---- a/arch/Kconfig -+++ b/arch/Kconfig -@@ -783,6 +783,14 @@ config HAVE_ARCH_TRANSPARENT_HUGEPAGE - config HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD - bool - -+config HAVE_ARCH_PARENT_PMD_YOUNG -+ bool -+ help -+ Architectures that select this are able to set the accessed bit on -+ non-leaf PMD entries in addition to leaf PTE entries where pages are -+ mapped. For them, page table walkers that clear the accessed bit may -+ stop at non-leaf PMD entries when they do not see the accessed bit. -+ - config HAVE_ARCH_HUGE_VMAP - bool - -diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index 2792879d398e..b5972eb82337 100644 ---- a/arch/x86/Kconfig -+++ b/arch/x86/Kconfig -@@ -163,6 +163,7 @@ config X86 - select HAVE_ARCH_TRACEHOOK - select HAVE_ARCH_TRANSPARENT_HUGEPAGE - select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64 -+ select HAVE_ARCH_PARENT_PMD_YOUNG if X86_64 - select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD - select HAVE_ARCH_VMAP_STACK if X86_64 - select HAVE_ARCH_WITHIN_STACK_FRAMES -diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h -index a02c67291cfc..a6b5cfe1fc5a 100644 ---- a/arch/x86/include/asm/pgtable.h -+++ b/arch/x86/include/asm/pgtable.h -@@ -846,7 +846,7 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd) - - static inline int pmd_bad(pmd_t pmd) - { -- return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; -+ return ((pmd_flags(pmd) | _PAGE_ACCESSED) & ~_PAGE_USER) != _KERNPG_TABLE; - } - - static inline unsigned long pages_to_mb(unsigned long npg) -diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c -index f6a9e2e36642..1c27e6f43f80 100644 ---- a/arch/x86/mm/pgtable.c -+++ b/arch/x86/mm/pgtable.c -@@ -550,7 +550,7 @@ int ptep_test_and_clear_young(struct vm_area_struct *vma, - return ret; - } - --#ifdef CONFIG_TRANSPARENT_HUGEPAGE -+#if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HAVE_ARCH_PARENT_PMD_YOUNG) - int pmdp_test_and_clear_young(struct vm_area_struct *vma, - unsigned long addr, pmd_t *pmdp) - { -@@ -562,6 +562,9 @@ int pmdp_test_and_clear_young(struct vm_area_struct *vma, - - return ret; - } -+#endif -+ -+#ifdef CONFIG_TRANSPARENT_HUGEPAGE - int pudp_test_and_clear_young(struct vm_area_struct *vma, - unsigned long addr, pud_t *pudp) - { -diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h -index 5e772392a379..08dd9b8c055a 100644 ---- a/include/linux/pgtable.h -+++ b/include/linux/pgtable.h -@@ -193,7 +193,7 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, - #endif - - #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG --#ifdef CONFIG_TRANSPARENT_HUGEPAGE -+#if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HAVE_ARCH_PARENT_PMD_YOUNG) - static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, - unsigned long address, - pmd_t *pmdp) -@@ -214,7 +214,7 @@ static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, - BUILD_BUG(); - return 0; - } --#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ -+#endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HAVE_ARCH_PARENT_PMD_YOUNG */ - #endif - - #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-07-14-mm-pagewalk.c-add-pud_entry_post-for-post-order-traversals.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-07-14-mm-pagewalk.c-add-pud_entry_post-for-post-order-traversals.patch deleted file mode 100644 index a189853..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-07-14-mm-pagewalk.c-add-pud_entry_post-for-post-order-traversals.patch +++ /dev/null @@ -1,144 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id E3438C43332 - for ; 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- Fri, 12 Mar 2021 23:58:05 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:40 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-8-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 07/14] mm/pagewalk.c: add pud_entry_post() for post-order traversals -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Add a new callback pud_entry_post() to struct mm_walk_ops so that page -table walkers can visit the non-leaf PMD entries of a PUD entry after -they have visited with the leaf PTE entries. This allows page table -walkers who clear the accessed bit to take advantage of the last -commit, in a similar way walk_pte_range() works for the PTE entries of -a PMD entry: they only need to take PTL once to search all the child -entries of a parent entry. - -Signed-off-by: Yu Zhao ---- - include/linux/pagewalk.h | 4 ++++ - mm/pagewalk.c | 5 +++++ - 2 files changed, 9 insertions(+) - -diff --git a/include/linux/pagewalk.h b/include/linux/pagewalk.h -index b1cb6b753abb..2b68ae9d27d3 100644 ---- a/include/linux/pagewalk.h -+++ b/include/linux/pagewalk.h -@@ -11,6 +11,8 @@ struct mm_walk; - * @pgd_entry: if set, called for each non-empty PGD (top-level) entry - * @p4d_entry: if set, called for each non-empty P4D entry - * @pud_entry: if set, called for each non-empty PUD entry -+ * @pud_entry_post: if set, called for each non-empty PUD entry after -+ * pmd_entry is called, for post-order traversal. - * @pmd_entry: if set, called for each non-empty PMD entry - * this handler is required to be able to handle - * pmd_trans_huge() pmds. They may simply choose to -@@ -41,6 +43,8 @@ struct mm_walk_ops { - unsigned long next, struct mm_walk *walk); - int (*pud_entry)(pud_t *pud, unsigned long addr, - unsigned long next, struct mm_walk *walk); -+ int (*pud_entry_post)(pud_t *pud, unsigned long addr, -+ unsigned long next, struct mm_walk *walk); - int (*pmd_entry)(pmd_t *pmd, unsigned long addr, - unsigned long next, struct mm_walk *walk); - int (*pte_entry)(pte_t *pte, unsigned long addr, -diff --git a/mm/pagewalk.c b/mm/pagewalk.c -index e81640d9f177..8ed1533f7eda 100644 ---- a/mm/pagewalk.c -+++ b/mm/pagewalk.c -@@ -160,6 +160,11 @@ static int walk_pud_range(p4d_t *p4d, unsigned long addr, unsigned long end, - err = walk_pmd_range(pud, addr, next, walk); - if (err) - break; -+ -+ if (ops->pud_entry_post) -+ err = ops->pud_entry_post(pud, addr, next, walk); -+ if (err) -+ break; - } while (pud++, addr = next, addr != end); - - return err; --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-08-14-mm-vmscan.c-refactor-shrink_node.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-08-14-mm-vmscan.c-refactor-shrink_node.patch deleted file mode 100644 index ab85053..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-08-14-mm-vmscan.c-refactor-shrink_node.patch +++ /dev/null @@ -1,311 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id CBC4DC4332D - for ; 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- Fri, 12 Mar 2021 23:58:06 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:41 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-9-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 08/14] mm/vmscan.c: refactor shrink_node() -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Heuristics in shrink_node() are rather independent and can be -refactored into a separate function to improve readability. - -Signed-off-by: Yu Zhao ---- - mm/vmscan.c | 186 +++++++++++++++++++++++++++------------------------- - 1 file changed, 98 insertions(+), 88 deletions(-) - -diff --git a/mm/vmscan.c b/mm/vmscan.c -index 562e87cbd7a1..1a24d2e0a4cb 100644 ---- a/mm/vmscan.c -+++ b/mm/vmscan.c -@@ -2224,6 +2224,103 @@ enum scan_balance { - SCAN_FILE, - }; - -+static void prepare_scan_count(pg_data_t *pgdat, struct scan_control *sc) -+{ -+ unsigned long file; -+ struct lruvec *target_lruvec; -+ -+ target_lruvec = mem_cgroup_lruvec(sc->target_mem_cgroup, pgdat); -+ -+ /* -+ * Determine the scan balance between anon and file LRUs. -+ */ -+ spin_lock_irq(&target_lruvec->lru_lock); -+ sc->anon_cost = target_lruvec->anon_cost; -+ sc->file_cost = target_lruvec->file_cost; -+ spin_unlock_irq(&target_lruvec->lru_lock); -+ -+ /* -+ * Target desirable inactive:active list ratios for the anon -+ * and file LRU lists. -+ */ -+ if (!sc->force_deactivate) { -+ unsigned long refaults; -+ -+ refaults = lruvec_page_state(target_lruvec, -+ WORKINGSET_ACTIVATE_ANON); -+ if (refaults != target_lruvec->refaults[0] || -+ inactive_is_low(target_lruvec, LRU_INACTIVE_ANON)) -+ sc->may_deactivate |= DEACTIVATE_ANON; -+ else -+ sc->may_deactivate &= ~DEACTIVATE_ANON; -+ -+ /* -+ * When refaults are being observed, it means a new -+ * workingset is being established. Deactivate to get -+ * rid of any stale active pages quickly. -+ */ -+ refaults = lruvec_page_state(target_lruvec, -+ WORKINGSET_ACTIVATE_FILE); -+ if (refaults != target_lruvec->refaults[1] || -+ inactive_is_low(target_lruvec, LRU_INACTIVE_FILE)) -+ sc->may_deactivate |= DEACTIVATE_FILE; -+ else -+ sc->may_deactivate &= ~DEACTIVATE_FILE; -+ } else -+ sc->may_deactivate = DEACTIVATE_ANON | DEACTIVATE_FILE; -+ -+ /* -+ * If we have plenty of inactive file pages that aren't -+ * thrashing, try to reclaim those first before touching -+ * anonymous pages. -+ */ -+ file = lruvec_page_state(target_lruvec, NR_INACTIVE_FILE); -+ if (file >> sc->priority && !(sc->may_deactivate & DEACTIVATE_FILE)) -+ sc->cache_trim_mode = 1; -+ else -+ sc->cache_trim_mode = 0; -+ -+ /* -+ * Prevent the reclaimer from falling into the cache trap: as -+ * cache pages start out inactive, every cache fault will tip -+ * the scan balance towards the file LRU. And as the file LRU -+ * shrinks, so does the window for rotation from references. -+ * This means we have a runaway feedback loop where a tiny -+ * thrashing file LRU becomes infinitely more attractive than -+ * anon pages. Try to detect this based on file LRU size. -+ */ -+ if (!cgroup_reclaim(sc)) { -+ unsigned long total_high_wmark = 0; -+ unsigned long free, anon; -+ int z; -+ -+ free = sum_zone_node_page_state(pgdat->node_id, NR_FREE_PAGES); -+ file = node_page_state(pgdat, NR_ACTIVE_FILE) + -+ node_page_state(pgdat, NR_INACTIVE_FILE); -+ -+ for (z = 0; z < MAX_NR_ZONES; z++) { -+ struct zone *zone = &pgdat->node_zones[z]; -+ -+ if (!managed_zone(zone)) -+ continue; -+ -+ total_high_wmark += high_wmark_pages(zone); -+ } -+ -+ /* -+ * Consider anon: if that's low too, this isn't a -+ * runaway file reclaim problem, but rather just -+ * extreme pressure. Reclaim as per usual then. -+ */ -+ anon = node_page_state(pgdat, NR_INACTIVE_ANON); -+ -+ sc->file_is_tiny = -+ file + free <= total_high_wmark && -+ !(sc->may_deactivate & DEACTIVATE_ANON) && -+ anon >> sc->priority; -+ } -+} -+ - /* - * Determine how aggressively the anon and file LRU lists should be - * scanned. The relative value of each set of LRU lists is determined -@@ -2669,7 +2766,6 @@ static void shrink_node(pg_data_t *pgdat, struct scan_control *sc) - unsigned long nr_reclaimed, nr_scanned; - struct lruvec *target_lruvec; - bool reclaimable = false; -- unsigned long file; - - target_lruvec = mem_cgroup_lruvec(sc->target_mem_cgroup, pgdat); - -@@ -2679,93 +2775,7 @@ static void shrink_node(pg_data_t *pgdat, struct scan_control *sc) - nr_reclaimed = sc->nr_reclaimed; - nr_scanned = sc->nr_scanned; - -- /* -- * Determine the scan balance between anon and file LRUs. -- */ -- spin_lock_irq(&target_lruvec->lru_lock); -- sc->anon_cost = target_lruvec->anon_cost; -- sc->file_cost = target_lruvec->file_cost; -- spin_unlock_irq(&target_lruvec->lru_lock); -- -- /* -- * Target desirable inactive:active list ratios for the anon -- * and file LRU lists. -- */ -- if (!sc->force_deactivate) { -- unsigned long refaults; -- -- refaults = lruvec_page_state(target_lruvec, -- WORKINGSET_ACTIVATE_ANON); -- if (refaults != target_lruvec->refaults[0] || -- inactive_is_low(target_lruvec, LRU_INACTIVE_ANON)) -- sc->may_deactivate |= DEACTIVATE_ANON; -- else -- sc->may_deactivate &= ~DEACTIVATE_ANON; -- -- /* -- * When refaults are being observed, it means a new -- * workingset is being established. Deactivate to get -- * rid of any stale active pages quickly. -- */ -- refaults = lruvec_page_state(target_lruvec, -- WORKINGSET_ACTIVATE_FILE); -- if (refaults != target_lruvec->refaults[1] || -- inactive_is_low(target_lruvec, LRU_INACTIVE_FILE)) -- sc->may_deactivate |= DEACTIVATE_FILE; -- else -- sc->may_deactivate &= ~DEACTIVATE_FILE; -- } else -- sc->may_deactivate = DEACTIVATE_ANON | DEACTIVATE_FILE; -- -- /* -- * If we have plenty of inactive file pages that aren't -- * thrashing, try to reclaim those first before touching -- * anonymous pages. -- */ -- file = lruvec_page_state(target_lruvec, NR_INACTIVE_FILE); -- if (file >> sc->priority && !(sc->may_deactivate & DEACTIVATE_FILE)) -- sc->cache_trim_mode = 1; -- else -- sc->cache_trim_mode = 0; -- -- /* -- * Prevent the reclaimer from falling into the cache trap: as -- * cache pages start out inactive, every cache fault will tip -- * the scan balance towards the file LRU. And as the file LRU -- * shrinks, so does the window for rotation from references. -- * This means we have a runaway feedback loop where a tiny -- * thrashing file LRU becomes infinitely more attractive than -- * anon pages. Try to detect this based on file LRU size. -- */ -- if (!cgroup_reclaim(sc)) { -- unsigned long total_high_wmark = 0; -- unsigned long free, anon; -- int z; -- -- free = sum_zone_node_page_state(pgdat->node_id, NR_FREE_PAGES); -- file = node_page_state(pgdat, NR_ACTIVE_FILE) + -- node_page_state(pgdat, NR_INACTIVE_FILE); -- -- for (z = 0; z < MAX_NR_ZONES; z++) { -- struct zone *zone = &pgdat->node_zones[z]; -- if (!managed_zone(zone)) -- continue; -- -- total_high_wmark += high_wmark_pages(zone); -- } -- -- /* -- * Consider anon: if that's low too, this isn't a -- * runaway file reclaim problem, but rather just -- * extreme pressure. Reclaim as per usual then. -- */ -- anon = node_page_state(pgdat, NR_INACTIVE_ANON); -- -- sc->file_is_tiny = -- file + free <= total_high_wmark && -- !(sc->may_deactivate & DEACTIVATE_ANON) && -- anon >> sc->priority; -- } -+ prepare_scan_count(pgdat, sc); - - shrink_node_memcgs(pgdat, sc); - --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-09-14-mm-multigenerational-lru-mm_struct-list.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-09-14-mm-multigenerational-lru-mm_struct-list.patch deleted file mode 100644 index 57de799..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-09-14-mm-multigenerational-lru-mm_struct-list.patch +++ /dev/null @@ -1,749 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 0360FC4332E - for ; Sat, 13 Mar 2021 07:59:07 +0000 (UTC) -Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) - by mail.kernel.org (Postfix) with ESMTP id E377164F1E - for ; Sat, 13 Mar 2021 07:59:06 +0000 (UTC) -Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand - id S233512AbhCMH6m (ORCPT ); - Sat, 13 Mar 2021 02:58:42 -0500 -Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58996 "EHLO - lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org - with ESMTP id S232709AbhCMH6J (ORCPT - ); - Sat, 13 Mar 2021 02:58:09 -0500 -Received: from mail-qk1-x749.google.com (mail-qk1-x749.google.com [IPv6:2607:f8b0:4864:20::749]) - by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E0386C061574 - for ; Fri, 12 Mar 2021 23:58:08 -0800 (PST) -Received: by mail-qk1-x749.google.com with SMTP id h134so19965073qke.1 - for ; Fri, 12 Mar 2021 23:58:08 -0800 (PST) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=google.com; s=20161025; - h=date:in-reply-to:message-id:mime-version:references:subject:from:to - :cc; - bh=7aNjMZwXzkZhXFvRmRWQJ8BQ+8lusUpXBFHauhX2ubg=; - b=rXTENBp2Eom7kHIkgQlwaM0zAjOFi5gmzyQ9fUwZQJp4tjb12IZlxofeTMBMfAGa/r - L4Ghc3L00KAFuV2LaP7uyJH7AsU4qMsIGq1k1CkPhOMdO7EV4BDTbgd4vEf68FTu94xi - vXrlWZYOskUlSCRkRuZtatqD65DIQyZkjMKdk2hKBnk6QJmcpPB6RWsgv88u3qVxEBZx - iiEhsjInkvzH6qtUYApIn6cqLI7Fd+8G1HrkDMmx13q4PXkdeunv1Az0GMeKsUNzGYYs - e4N6HA5c9v+Un/TrJ4yGhAbzwYgJSTU4Xrzr5/9QWPKNcFUkXgh0KosPnfdwtEviCEBv - 6pmg== -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20161025; - h=x-gm-message-state:date:in-reply-to:message-id:mime-version - :references:subject:from:to:cc; - bh=7aNjMZwXzkZhXFvRmRWQJ8BQ+8lusUpXBFHauhX2ubg=; - b=YWegDePJI84B+MDTMEsT3ncwRQ6xqfLVLoxaVcjlpDCwizTWwtdyaGlleP04JZ5N+5 - AkfxqK0DQUXAyBBm7v7dckpiAm/jUldpE5n9Uh4ZmUf6oJt35HCt8C2aWgCxnV6YH3xL - 86xAS1GV/vZb1DaCjG3Fa6mqH6EJPd/c9xZPVGxYnPYoLGKZDyI2j04nHrPyKye2NZMZ - HQohID0ijQkEqVBAuj4H9CyNS/XwXkM24UKVFyYk6hKAmmMp/Na4vDYy5LN2rRariQhj - uPMou6WiKPb6Ph6mcd35an6LnCUHgzKHE2Tu+AnxXcrqTu9ijLJ5E6/FY2cCcrIEXK7S - VoHQ== -X-Gm-Message-State: AOAM530An7ZbSyg9gdVA41zNIb/3lnpDD6ALzchYWG8q+sQY4pqkltfs - r5qU0vNqoKeYC+YKblti/xtfb5zboKM= -X-Google-Smtp-Source: ABdhPJxXAZ3oX16iFANwEv0b7ybctnsmZAK24tAjZNdUXRU2Fm50sCFyGpIqOrn3ll+aJz5mcnB7+tMAtOQ= -X-Received: from yuzhao.bld.corp.google.com ([2620:15c:183:200:f931:d3e4:faa0:4f74]) - (user=yuzhao job=sendgmr) by 2002:a0c:b8a3:: with SMTP id y35mr15828724qvf.23.1615622288067; - Fri, 12 Mar 2021 23:58:08 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:42 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-10-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 09/14] mm: multigenerational lru: mm_struct list -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Add an infrastructure that maintains either a system-wide mm_struct -list or per-memcg mm_struct lists. Multiple threads can concurrently -work on the same mm_struct list, and each of them will be given a -different mm_struct. Those who finish early can optionally wait on the -rest after the iterator has reached the end of the list. - -This infrastructure also tracks whether an mm_struct is being used on -any CPUs or has been used since the last time a worker looked at it. -In other words, workers will not be given an mm_struct that belongs to -a process that has been sleeping. - -Signed-off-by: Yu Zhao ---- - fs/exec.c | 2 + - include/linux/memcontrol.h | 4 + - include/linux/mm_types.h | 135 +++++++++++++++++++ - include/linux/mmzone.h | 2 - - kernel/exit.c | 1 + - kernel/fork.c | 10 ++ - kernel/kthread.c | 1 + - kernel/sched/core.c | 2 + - mm/memcontrol.c | 28 ++++ - mm/vmscan.c | 263 +++++++++++++++++++++++++++++++++++++ - 10 files changed, 446 insertions(+), 2 deletions(-) - -diff --git a/fs/exec.c b/fs/exec.c -index 18594f11c31f..c691d4d7720c 100644 ---- a/fs/exec.c -+++ b/fs/exec.c -@@ -1008,6 +1008,7 @@ static int exec_mmap(struct mm_struct *mm) - active_mm = tsk->active_mm; - tsk->active_mm = mm; - tsk->mm = mm; -+ lru_gen_add_mm(mm); - /* - * This prevents preemption while active_mm is being loaded and - * it and mm are being updated, which could cause problems for -@@ -1018,6 +1019,7 @@ static int exec_mmap(struct mm_struct *mm) - if (!IS_ENABLED(CONFIG_ARCH_WANT_IRQS_OFF_ACTIVATE_MM)) - local_irq_enable(); - activate_mm(active_mm, mm); -+ lru_gen_switch_mm(active_mm, mm); - if (IS_ENABLED(CONFIG_ARCH_WANT_IRQS_OFF_ACTIVATE_MM)) - local_irq_enable(); - tsk->mm->vmacache_seqnum = 0; -diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h -index f325aeb4b4e8..591557c5b7e2 100644 ---- a/include/linux/memcontrol.h -+++ b/include/linux/memcontrol.h -@@ -335,6 +335,10 @@ struct mem_cgroup { - struct deferred_split deferred_split_queue; - #endif - -+#ifdef CONFIG_LRU_GEN -+ struct lru_gen_mm_list *mm_list; -+#endif -+ - struct mem_cgroup_per_node *nodeinfo[0]; - /* WARNING: nodeinfo must be the last member here */ - }; -diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h -index 0974ad501a47..b8a038a016f2 100644 ---- a/include/linux/mm_types.h -+++ b/include/linux/mm_types.h -@@ -15,6 +15,8 @@ - #include - #include - #include -+#include -+#include - - #include - -@@ -382,6 +384,8 @@ struct core_state { - struct completion startup; - }; - -+#define ANON_AND_FILE 2 -+ - struct kioctx_table; - struct mm_struct { - struct { -@@ -560,6 +564,22 @@ struct mm_struct { - - #ifdef CONFIG_IOMMU_SUPPORT - u32 pasid; -+#endif -+#ifdef CONFIG_LRU_GEN -+ struct { -+ /* node of a global or per-memcg mm list */ -+ struct list_head list; -+#ifdef CONFIG_MEMCG -+ /* points to memcg of the owner task above */ -+ struct mem_cgroup *memcg; -+#endif -+ /* indicates this mm has been used since last walk */ -+ nodemask_t nodes[ANON_AND_FILE]; -+#ifndef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH -+ /* number of cpus that are using this mm */ -+ atomic_t nr_cpus; -+#endif -+ } lru_gen; - #endif - } __randomize_layout; - -@@ -587,6 +607,121 @@ static inline cpumask_t *mm_cpumask(struct mm_struct *mm) - return (struct cpumask *)&mm->cpu_bitmap; - } - -+#ifdef CONFIG_LRU_GEN -+ -+struct lru_gen_mm_list { -+ /* head of a global or per-memcg mm list */ -+ struct list_head head; -+ /* protects the list */ -+ spinlock_t lock; -+ struct { -+ /* set to max_seq after each round of walk */ -+ unsigned long cur_seq; -+ /* next mm on the list to walk */ -+ struct list_head *iter; -+ /* to wait for last worker to finish */ -+ struct wait_queue_head wait; -+ /* number of concurrent workers */ -+ int nr_workers; -+ } nodes[0]; -+}; -+ -+void lru_gen_init_mm(struct mm_struct *mm); -+void lru_gen_add_mm(struct mm_struct *mm); -+void lru_gen_del_mm(struct mm_struct *mm); -+#ifdef CONFIG_MEMCG -+int lru_gen_alloc_mm_list(struct mem_cgroup *memcg); -+void lru_gen_free_mm_list(struct mem_cgroup *memcg); -+void lru_gen_migrate_mm(struct mm_struct *mm); -+#endif -+ -+/* -+ * Track usage so mms that haven't been used since last walk can be skipped. -+ * -+ * This function introduces a theoretical overhead for each mm switch, but it -+ * hasn't been measurable. -+ */ -+static inline void lru_gen_switch_mm(struct mm_struct *old, struct mm_struct *new) -+{ -+ int file; -+ -+ /* exclude init_mm, efi_mm, etc. */ -+ if (!core_kernel_data((unsigned long)old)) { -+ VM_BUG_ON(old == &init_mm); -+ -+ for (file = 0; file < ANON_AND_FILE; file++) -+ nodes_setall(old->lru_gen.nodes[file]); -+ -+#ifndef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH -+ atomic_dec(&old->lru_gen.nr_cpus); -+ VM_BUG_ON_MM(atomic_read(&old->lru_gen.nr_cpus) < 0, old); -+#endif -+ } else -+ VM_BUG_ON_MM(READ_ONCE(old->lru_gen.list.prev) || -+ READ_ONCE(old->lru_gen.list.next), old); -+ -+ if (!core_kernel_data((unsigned long)new)) { -+ VM_BUG_ON(new == &init_mm); -+ -+#ifndef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH -+ atomic_inc(&new->lru_gen.nr_cpus); -+ VM_BUG_ON_MM(atomic_read(&new->lru_gen.nr_cpus) < 0, new); -+#endif -+ } else -+ VM_BUG_ON_MM(READ_ONCE(new->lru_gen.list.prev) || -+ READ_ONCE(new->lru_gen.list.next), new); -+} -+ -+/* Returns whether the mm is being used on any cpus. */ -+static inline bool lru_gen_mm_is_active(struct mm_struct *mm) -+{ -+#ifdef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH -+ return !cpumask_empty(mm_cpumask(mm)); -+#else -+ return atomic_read(&mm->lru_gen.nr_cpus); -+#endif -+} -+ -+#else /* CONFIG_LRU_GEN */ -+ -+static inline void lru_gen_init_mm(struct mm_struct *mm) -+{ -+} -+ -+static inline void lru_gen_add_mm(struct mm_struct *mm) -+{ -+} -+ -+static inline void lru_gen_del_mm(struct mm_struct *mm) -+{ -+} -+ -+#ifdef CONFIG_MEMCG -+static inline int lru_gen_alloc_mm_list(struct mem_cgroup *memcg) -+{ -+ return 0; -+} -+ -+static inline void lru_gen_free_mm_list(struct mem_cgroup *memcg) -+{ -+} -+ -+static inline void lru_gen_migrate_mm(struct mm_struct *mm) -+{ -+} -+#endif -+ -+static inline void lru_gen_switch_mm(struct mm_struct *old, struct mm_struct *new) -+{ -+} -+ -+static inline bool lru_gen_mm_is_active(struct mm_struct *mm) -+{ -+ return false; -+} -+ -+#endif /* CONFIG_LRU_GEN */ -+ - struct mmu_gather; - extern void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm); - extern void tlb_gather_mmu_fullmm(struct mmu_gather *tlb, struct mm_struct *mm); -diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h -index 47946cec7584..a99a1050565a 100644 ---- a/include/linux/mmzone.h -+++ b/include/linux/mmzone.h -@@ -285,8 +285,6 @@ static inline bool is_active_lru(enum lru_list lru) - return (lru == LRU_ACTIVE_ANON || lru == LRU_ACTIVE_FILE); - } - --#define ANON_AND_FILE 2 -- - enum lruvec_flags { - LRUVEC_CONGESTED, /* lruvec has many dirty pages - * backed by a congested BDI -diff --git a/kernel/exit.c b/kernel/exit.c -index 04029e35e69a..e4292717ce37 100644 ---- a/kernel/exit.c -+++ b/kernel/exit.c -@@ -422,6 +422,7 @@ void mm_update_next_owner(struct mm_struct *mm) - goto retry; - } - WRITE_ONCE(mm->owner, c); -+ lru_gen_migrate_mm(mm); - task_unlock(c); - put_task_struct(c); - } -diff --git a/kernel/fork.c b/kernel/fork.c -index d3171e8e88e5..e261b797955d 100644 ---- a/kernel/fork.c -+++ b/kernel/fork.c -@@ -665,6 +665,7 @@ static void check_mm(struct mm_struct *mm) - #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && !USE_SPLIT_PMD_PTLOCKS - VM_BUG_ON_MM(mm->pmd_huge_pte, mm); - #endif -+ VM_BUG_ON_MM(lru_gen_mm_is_active(mm), mm); - } - - #define allocate_mm() (kmem_cache_alloc(mm_cachep, GFP_KERNEL)) -@@ -1047,6 +1048,7 @@ static struct mm_struct *mm_init(struct mm_struct *mm, struct task_struct *p, - goto fail_nocontext; - - mm->user_ns = get_user_ns(user_ns); -+ lru_gen_init_mm(mm); - return mm; - - fail_nocontext: -@@ -1089,6 +1091,7 @@ static inline void __mmput(struct mm_struct *mm) - } - if (mm->binfmt) - module_put(mm->binfmt->module); -+ lru_gen_del_mm(mm); - mmdrop(mm); - } - -@@ -2513,6 +2516,13 @@ pid_t kernel_clone(struct kernel_clone_args *args) - get_task_struct(p); - } - -+ if (IS_ENABLED(CONFIG_LRU_GEN) && !(clone_flags & CLONE_VM)) { -+ /* lock p to synchronize with memcg migration */ -+ task_lock(p); -+ lru_gen_add_mm(p->mm); -+ task_unlock(p); -+ } -+ - wake_up_new_task(p); - - /* forking complete and child started to run, tell ptracer */ -diff --git a/kernel/kthread.c b/kernel/kthread.c -index 1578973c5740..8da7767bb06a 100644 ---- a/kernel/kthread.c -+++ b/kernel/kthread.c -@@ -1303,6 +1303,7 @@ void kthread_use_mm(struct mm_struct *mm) - tsk->mm = mm; - membarrier_update_current_mm(mm); - switch_mm_irqs_off(active_mm, mm, tsk); -+ lru_gen_switch_mm(active_mm, mm); - local_irq_enable(); - task_unlock(tsk); - #ifdef finish_arch_post_lock_switch -diff --git a/kernel/sched/core.c b/kernel/sched/core.c -index ca2bb629595f..56274a14ce09 100644 ---- a/kernel/sched/core.c -+++ b/kernel/sched/core.c -@@ -4308,6 +4308,7 @@ context_switch(struct rq *rq, struct task_struct *prev, - * finish_task_switch()'s mmdrop(). - */ - switch_mm_irqs_off(prev->active_mm, next->mm, next); -+ lru_gen_switch_mm(prev->active_mm, next->mm); - - if (!prev->mm) { // from kernel - /* will mmdrop() in finish_task_switch(). */ -@@ -7599,6 +7600,7 @@ void idle_task_exit(void) - - if (mm != &init_mm) { - switch_mm(mm, &init_mm, current); -+ lru_gen_switch_mm(mm, &init_mm); - finish_arch_post_lock_switch(); - } - -diff --git a/mm/memcontrol.c b/mm/memcontrol.c -index 845eec01ef9d..5836780fe138 100644 ---- a/mm/memcontrol.c -+++ b/mm/memcontrol.c -@@ -5209,6 +5209,7 @@ static void __mem_cgroup_free(struct mem_cgroup *memcg) - free_mem_cgroup_per_node_info(memcg, node); - free_percpu(memcg->vmstats_percpu); - free_percpu(memcg->vmstats_local); -+ lru_gen_free_mm_list(memcg); - kfree(memcg); - } - -@@ -5261,6 +5262,9 @@ static struct mem_cgroup *mem_cgroup_alloc(void) - if (alloc_mem_cgroup_per_node_info(memcg, node)) - goto fail; - -+ if (lru_gen_alloc_mm_list(memcg)) -+ goto fail; -+ - if (memcg_wb_domain_init(memcg, GFP_KERNEL)) - goto fail; - -@@ -6165,6 +6169,29 @@ static void mem_cgroup_move_task(void) - } - #endif - -+#ifdef CONFIG_LRU_GEN -+static void mem_cgroup_attach(struct cgroup_taskset *tset) -+{ -+ struct cgroup_subsys_state *css; -+ struct task_struct *task = NULL; -+ -+ cgroup_taskset_for_each_leader(task, css, tset) -+ ; -+ -+ if (!task) -+ return; -+ -+ task_lock(task); -+ if (task->mm && task->mm->owner == task) -+ lru_gen_migrate_mm(task->mm); -+ task_unlock(task); -+} -+#else -+static void mem_cgroup_attach(struct cgroup_taskset *tset) -+{ -+} -+#endif -+ - static int seq_puts_memcg_tunable(struct seq_file *m, unsigned long value) - { - if (value == PAGE_COUNTER_MAX) -@@ -6505,6 +6532,7 @@ struct cgroup_subsys memory_cgrp_subsys = { - .css_free = mem_cgroup_css_free, - .css_reset = mem_cgroup_css_reset, - .can_attach = mem_cgroup_can_attach, -+ .attach = mem_cgroup_attach, - .cancel_attach = mem_cgroup_cancel_attach, - .post_attach = mem_cgroup_move_task, - .dfl_cftypes = memory_files, -diff --git a/mm/vmscan.c b/mm/vmscan.c -index 1a24d2e0a4cb..f7657ab0d4b7 100644 ---- a/mm/vmscan.c -+++ b/mm/vmscan.c -@@ -4314,3 +4314,266 @@ void check_move_unevictable_pages(struct pagevec *pvec) - } - } - EXPORT_SYMBOL_GPL(check_move_unevictable_pages); -+ -+#ifdef CONFIG_LRU_GEN -+ -+/****************************************************************************** -+ * global and per-memcg mm list -+ ******************************************************************************/ -+ -+/* -+ * After pages are faulted in, they become the youngest generation. They must -+ * go through aging process twice before they can be evicted. After first scan, -+ * their accessed bit set during initial faults are cleared and they become the -+ * second youngest generation. And second scan makes sure they haven't been used -+ * since the first. -+ */ -+#define MIN_NR_GENS 2 -+ -+static struct lru_gen_mm_list *global_mm_list; -+ -+static struct lru_gen_mm_list *alloc_mm_list(void) -+{ -+ int nid; -+ struct lru_gen_mm_list *mm_list; -+ -+ mm_list = kzalloc(struct_size(mm_list, nodes, nr_node_ids), GFP_KERNEL); -+ if (!mm_list) -+ return NULL; -+ -+ INIT_LIST_HEAD(&mm_list->head); -+ spin_lock_init(&mm_list->lock); -+ -+ for_each_node(nid) { -+ mm_list->nodes[nid].cur_seq = MIN_NR_GENS - 1; -+ mm_list->nodes[nid].iter = &mm_list->head; -+ init_waitqueue_head(&mm_list->nodes[nid].wait); -+ } -+ -+ return mm_list; -+} -+ -+static struct lru_gen_mm_list *get_mm_list(struct mem_cgroup *memcg) -+{ -+#ifdef CONFIG_MEMCG -+ if (!mem_cgroup_disabled()) -+ return memcg ? memcg->mm_list : root_mem_cgroup->mm_list; -+#endif -+ VM_BUG_ON(memcg); -+ -+ return global_mm_list; -+} -+ -+void lru_gen_init_mm(struct mm_struct *mm) -+{ -+ int file; -+ -+ INIT_LIST_HEAD(&mm->lru_gen.list); -+#ifdef CONFIG_MEMCG -+ mm->lru_gen.memcg = NULL; -+#endif -+#ifndef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH -+ atomic_set(&mm->lru_gen.nr_cpus, 0); -+#endif -+ for (file = 0; file < ANON_AND_FILE; file++) -+ nodes_clear(mm->lru_gen.nodes[file]); -+} -+ -+void lru_gen_add_mm(struct mm_struct *mm) -+{ -+ struct mem_cgroup *memcg = get_mem_cgroup_from_mm(mm); -+ struct lru_gen_mm_list *mm_list = get_mm_list(memcg); -+ -+ VM_BUG_ON_MM(!list_empty(&mm->lru_gen.list), mm); -+#ifdef CONFIG_MEMCG -+ VM_BUG_ON_MM(mm->lru_gen.memcg, mm); -+ WRITE_ONCE(mm->lru_gen.memcg, memcg); -+#endif -+ spin_lock(&mm_list->lock); -+ list_add_tail(&mm->lru_gen.list, &mm_list->head); -+ spin_unlock(&mm_list->lock); -+} -+ -+void lru_gen_del_mm(struct mm_struct *mm) -+{ -+ int nid; -+#ifdef CONFIG_MEMCG -+ struct lru_gen_mm_list *mm_list = get_mm_list(mm->lru_gen.memcg); -+#else -+ struct lru_gen_mm_list *mm_list = get_mm_list(NULL); -+#endif -+ -+ spin_lock(&mm_list->lock); -+ -+ for_each_node(nid) { -+ if (mm_list->nodes[nid].iter != &mm->lru_gen.list) -+ continue; -+ -+ mm_list->nodes[nid].iter = mm_list->nodes[nid].iter->next; -+ if (mm_list->nodes[nid].iter == &mm_list->head) -+ WRITE_ONCE(mm_list->nodes[nid].cur_seq, -+ mm_list->nodes[nid].cur_seq + 1); -+ } -+ -+ list_del_init(&mm->lru_gen.list); -+ -+ spin_unlock(&mm_list->lock); -+ -+#ifdef CONFIG_MEMCG -+ mem_cgroup_put(mm->lru_gen.memcg); -+ WRITE_ONCE(mm->lru_gen.memcg, NULL); -+#endif -+} -+ -+#ifdef CONFIG_MEMCG -+int lru_gen_alloc_mm_list(struct mem_cgroup *memcg) -+{ -+ if (mem_cgroup_disabled()) -+ return 0; -+ -+ memcg->mm_list = alloc_mm_list(); -+ -+ return memcg->mm_list ? 0 : -ENOMEM; -+} -+ -+void lru_gen_free_mm_list(struct mem_cgroup *memcg) -+{ -+ kfree(memcg->mm_list); -+ memcg->mm_list = NULL; -+} -+ -+void lru_gen_migrate_mm(struct mm_struct *mm) -+{ -+ struct mem_cgroup *memcg; -+ -+ lockdep_assert_held(&mm->owner->alloc_lock); -+ -+ if (mem_cgroup_disabled()) -+ return; -+ -+ rcu_read_lock(); -+ memcg = mem_cgroup_from_task(mm->owner); -+ rcu_read_unlock(); -+ if (memcg == mm->lru_gen.memcg) -+ return; -+ -+ VM_BUG_ON_MM(!mm->lru_gen.memcg, mm); -+ VM_BUG_ON_MM(list_empty(&mm->lru_gen.list), mm); -+ -+ lru_gen_del_mm(mm); -+ lru_gen_add_mm(mm); -+} -+ -+static bool mm_has_migrated(struct mm_struct *mm, struct mem_cgroup *memcg) -+{ -+ return READ_ONCE(mm->lru_gen.memcg) != memcg; -+} -+#else -+static bool mm_has_migrated(struct mm_struct *mm, struct mem_cgroup *memcg) -+{ -+ return false; -+} -+#endif -+ -+static bool should_skip_mm(struct mm_struct *mm, int nid, int swappiness) -+{ -+ int file; -+ unsigned long size = 0; -+ -+ if (mm_is_oom_victim(mm)) -+ return true; -+ -+ for (file = !swappiness; file < ANON_AND_FILE; file++) { -+ if (lru_gen_mm_is_active(mm) || node_isset(nid, mm->lru_gen.nodes[file])) -+ size += file ? get_mm_counter(mm, MM_FILEPAGES) : -+ get_mm_counter(mm, MM_ANONPAGES) + -+ get_mm_counter(mm, MM_SHMEMPAGES); -+ } -+ -+ if (size < SWAP_CLUSTER_MAX) -+ return true; -+ -+ return !mmget_not_zero(mm); -+} -+ -+/* To support multiple workers that concurrently walk mm list. */ -+static bool get_next_mm(struct lruvec *lruvec, unsigned long next_seq, -+ int swappiness, struct mm_struct **iter) -+{ -+ bool last = true; -+ struct mm_struct *mm = NULL; -+ int nid = lruvec_pgdat(lruvec)->node_id; -+ struct mem_cgroup *memcg = lruvec_memcg(lruvec); -+ struct lru_gen_mm_list *mm_list = get_mm_list(memcg); -+ -+ if (*iter) -+ mmput_async(*iter); -+ else if (next_seq <= READ_ONCE(mm_list->nodes[nid].cur_seq)) -+ return false; -+ -+ spin_lock(&mm_list->lock); -+ -+ VM_BUG_ON(next_seq > mm_list->nodes[nid].cur_seq + 1); -+ VM_BUG_ON(*iter && next_seq < mm_list->nodes[nid].cur_seq); -+ VM_BUG_ON(*iter && !mm_list->nodes[nid].nr_workers); -+ -+ if (next_seq <= mm_list->nodes[nid].cur_seq) { -+ last = *iter; -+ goto done; -+ } -+ -+ if (mm_list->nodes[nid].iter == &mm_list->head) { -+ VM_BUG_ON(*iter || mm_list->nodes[nid].nr_workers); -+ mm_list->nodes[nid].iter = mm_list->nodes[nid].iter->next; -+ } -+ -+ while (!mm && mm_list->nodes[nid].iter != &mm_list->head) { -+ mm = list_entry(mm_list->nodes[nid].iter, struct mm_struct, lru_gen.list); -+ mm_list->nodes[nid].iter = mm_list->nodes[nid].iter->next; -+ if (should_skip_mm(mm, nid, swappiness)) -+ mm = NULL; -+ } -+ -+ if (mm_list->nodes[nid].iter == &mm_list->head) -+ WRITE_ONCE(mm_list->nodes[nid].cur_seq, -+ mm_list->nodes[nid].cur_seq + 1); -+done: -+ if (*iter && !mm) -+ mm_list->nodes[nid].nr_workers--; -+ if (!*iter && mm) -+ mm_list->nodes[nid].nr_workers++; -+ -+ last = last && !mm_list->nodes[nid].nr_workers && -+ mm_list->nodes[nid].iter == &mm_list->head; -+ -+ spin_unlock(&mm_list->lock); -+ -+ *iter = mm; -+ -+ return last; -+} -+ -+/****************************************************************************** -+ * initialization -+ ******************************************************************************/ -+ -+static int __init init_lru_gen(void) -+{ -+ if (mem_cgroup_disabled()) { -+ global_mm_list = alloc_mm_list(); -+ if (!global_mm_list) { -+ pr_err("lru_gen: failed to allocate global mm list\n"); -+ return -ENOMEM; -+ } -+ } -+ -+ return 0; -+}; -+/* -+ * We want to run as early as possible because some debug code, e.g., -+ * dma_resv_lockdep(), calls mm_alloc() and mmput(). We only depend on mm_kobj, -+ * which is initialized one stage earlier by postcore_initcall(). -+ */ -+arch_initcall(init_lru_gen); -+ -+#endif /* CONFIG_LRU_GEN */ --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-10-14-mm-multigenerational-lru-core.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-10-14-mm-multigenerational-lru-core.patch deleted file mode 100644 index fd782ae..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-10-14-mm-multigenerational-lru-core.patch +++ /dev/null @@ -1,1930 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 19540C43333 - for ; Sat, 13 Mar 2021 07:59:07 +0000 (UTC) -Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) - by mail.kernel.org (Postfix) with ESMTP id F40FB64F1D - for ; Sat, 13 Mar 2021 07:59:06 +0000 (UTC) -Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand - id S233530AbhCMH6o (ORCPT ); - Sat, 13 Mar 2021 02:58:44 -0500 -Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59004 "EHLO - lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org - with ESMTP id S232955AbhCMH6K (ORCPT - ); - Sat, 13 Mar 2021 02:58:10 -0500 -Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) - by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 354EEC061574 - for ; Fri, 12 Mar 2021 23:58:10 -0800 (PST) -Received: by mail-yb1-xb49.google.com with SMTP id 131so32126863ybp.16 - for ; Fri, 12 Mar 2021 23:58:10 -0800 (PST) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=google.com; s=20161025; - h=date:in-reply-to:message-id:mime-version:references:subject:from:to - :cc; - bh=lKQl5pndqzB+9aY2sJazZHwXRaTv0wpZFLyUcYj7GQA=; - b=ocmCOVDHi5OSSh/YMeG/LdNp1eeWdPoEMakQGeAxNOTTy4sPlhb0ca4Ygnm14qrLsD - 7XlvUWfcVDj+VdeKuBFZ02EJcowKSOpYpfqbnXi30dSRVEXwEh9UEJHsHiDUDrtJMPmN - 6yygmHTQqf4ygLaa/NYlNiVWi/Q0IQLt9NYECQdaBfahTxezfSJ5IMvCQffZtqs/lqJZ - FI1m5ZDkYiZf082Xl9ELwXTp+u4V/ZvflKPEeeP3UDh01OqomXqhXIAfYogyshWFmyJ7 - 6IUIbFbalKQBZVgSeoVTfLzQ3nu2sLzqLhWOaS0ioFZEyttu8Dq+JSXK5U4Baz2yL4vT - duNA== -X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; - d=1e100.net; s=20161025; - h=x-gm-message-state:date:in-reply-to:message-id:mime-version - :references:subject:from:to:cc; - bh=lKQl5pndqzB+9aY2sJazZHwXRaTv0wpZFLyUcYj7GQA=; - b=OCDBNo9HF1yn2n6c27SbWzFZ6kQ3ICeRBco3VdQEG9KlylQXTsfjcs+I3LB8hfnZXT - N1zdPfEmvw0AUOsKTvDsTWvt5Z/NglhSAQf1gnXVjGPUM75ip5Pb5OnUcolO3cx5Wjyv - qnAj7g0P49L/93ni6pxMRMIdJQ1HkuT9R7ZgSu2iQUlPEoAiAKT3PAXBnPDvD2o8STGb - EIosRt5rRacdFaO4/oW2X0JzgdeiMeaiN1X4mbInlAv5EZ2mMYq4SuTIcDTinYk3gag8 - hGksM4dnqvQmNoUrFdij+oL3yXlgtpx0SaBgSHv8XMv6FYoR+ZwXdiZxP8YVj0+G+Y7e - 3zbg== -X-Gm-Message-State: AOAM531HBgefraurevC51sGm+5dC/6PFZbGstSL3lMCltRzp5xggu0Ig - 5Cxe1LVCQXIG+aDadudBNaqDUxkim/0= -X-Google-Smtp-Source: ABdhPJxmaAV3Zuy65DGlCkT6I0DbSJaatE40ypeQ7LndNLV2Hp9Q9Eq4d4osGDWr2nCUrvQqAxFej4TvfJo= -X-Received: from yuzhao.bld.corp.google.com ([2620:15c:183:200:f931:d3e4:faa0:4f74]) - (user=yuzhao job=sendgmr) by 2002:a25:2f97:: with SMTP id v145mr25917083ybv.221.1615622289389; - Fri, 12 Mar 2021 23:58:09 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:43 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-11-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 10/14] mm: multigenerational lru: core -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Evictable pages are divided into multiple generations for each lruvec. -The youngest generation number is stored in max_seq for both anon and -file types as they are aged on an equal footing. The oldest generation -numbers are stored in min_seq[2] separately for anon and file types as -clean file pages can be evicted regardless of may_swap or -may_writepage. Generation numbers are truncated into -ilog2(MAX_NR_GENS)+1 bits in order to fit into page->flags. The -sliding window technique is used to prevent truncated generation -numbers from overlapping. Each truncated generation number is an index -to lruvec->evictable.lists[MAX_NR_GENS][ANON_AND_FILE][MAX_NR_ZONES]. -Evictable pages are added to the per-zone lists indexed by max_seq or -min_seq[2] (modulo MAX_NR_GENS), depending on whether they are being -faulted in or read ahead. - -The workflow comprises two conceptually independent functions: the -aging and the eviction. The aging produces young generations. Given an -lruvec, the aging walks the mm_struct list associated with this -lruvec, i.e., memcg->mm_list or global_mm_list, to scan page tables -for referenced pages. Upon finding one, the aging updates its -generation number to max_seq. After each round of scan, the aging -increments max_seq. Since scans are differential with respect to -referenced pages, the cost is roughly proportional to their number. - -The eviction consumes old generations. Given an lruvec, the eviction -scans the pages on the per-zone lists indexed by either of min_seq[2]. -It selects a type based on the values of min_seq[2] and swappiness. -During a scan, the eviction either sorts or isolates a page, depending -on whether the aging has updated its generation number or not. When it -finds all the per-zone lists are empty, the eviction increments -min_seq[2] indexed by this selected type. The eviction triggers the -aging when both of min_seq[2] reaches max_seq-1, assuming both anon -and file types are reclaimable. - -Signed-off-by: Yu Zhao ---- - include/linux/mm.h | 1 + - include/linux/mm_inline.h | 194 +++++ - include/linux/mmzone.h | 54 ++ - include/linux/page-flags-layout.h | 20 +- - mm/huge_memory.c | 3 +- - mm/mm_init.c | 13 +- - mm/mmzone.c | 2 + - mm/swap.c | 4 + - mm/swapfile.c | 4 + - mm/vmscan.c | 1255 +++++++++++++++++++++++++++++ - 10 files changed, 1541 insertions(+), 9 deletions(-) - -diff --git a/include/linux/mm.h b/include/linux/mm.h -index 77e64e3eac80..ac57ea124fb8 100644 ---- a/include/linux/mm.h -+++ b/include/linux/mm.h -@@ -1070,6 +1070,7 @@ vm_fault_t finish_mkwrite_fault(struct vm_fault *vmf); - #define ZONES_PGOFF (NODES_PGOFF - ZONES_WIDTH) - #define LAST_CPUPID_PGOFF (ZONES_PGOFF - LAST_CPUPID_WIDTH) - #define KASAN_TAG_PGOFF (LAST_CPUPID_PGOFF - KASAN_TAG_WIDTH) -+#define LRU_GEN_PGOFF (KASAN_TAG_PGOFF - LRU_GEN_WIDTH) - - /* - * Define the bit shifts to access each section. For non-existent -diff --git a/include/linux/mm_inline.h b/include/linux/mm_inline.h -index 355ea1ee32bd..2d306cab36bc 100644 ---- a/include/linux/mm_inline.h -+++ b/include/linux/mm_inline.h -@@ -79,11 +79,199 @@ static __always_inline enum lru_list page_lru(struct page *page) - return lru; - } - -+#ifdef CONFIG_LRU_GEN -+ -+#ifdef CONFIG_LRU_GEN_ENABLED -+DECLARE_STATIC_KEY_TRUE(lru_gen_static_key); -+#define lru_gen_enabled() static_branch_likely(&lru_gen_static_key) -+#else -+DECLARE_STATIC_KEY_FALSE(lru_gen_static_key); -+#define lru_gen_enabled() static_branch_unlikely(&lru_gen_static_key) -+#endif -+ -+/* -+ * Raw generation numbers (seq) from struct lru_gen are in unsigned long and -+ * therefore (virtually) monotonic; truncated generation numbers (gen) occupy -+ * at most ilog2(MAX_NR_GENS)+1 bits in page flags and therefore are cyclic. -+ */ -+static inline int lru_gen_from_seq(unsigned long seq) -+{ -+ return seq % MAX_NR_GENS; -+} -+ -+/* The youngest and the second youngest generations are considered active. */ -+static inline bool lru_gen_is_active(struct lruvec *lruvec, int gen) -+{ -+ unsigned long max_seq = READ_ONCE(lruvec->evictable.max_seq); -+ -+ VM_BUG_ON(!max_seq); -+ VM_BUG_ON(gen >= MAX_NR_GENS); -+ -+ return gen == lru_gen_from_seq(max_seq) || gen == lru_gen_from_seq(max_seq - 1); -+} -+ -+/* Returns -1 when multigenerational lru is disabled or page is isolated. */ -+static inline int page_lru_gen(struct page *page) -+{ -+ return ((READ_ONCE(page->flags) & LRU_GEN_MASK) >> LRU_GEN_PGOFF) - 1; -+} -+ -+/* Update multigenerational lru sizes in addition to active/inactive lru sizes. */ -+static inline void lru_gen_update_size(struct page *page, struct lruvec *lruvec, -+ int old_gen, int new_gen) -+{ -+ int file = page_is_file_lru(page); -+ int zone = page_zonenum(page); -+ int delta = thp_nr_pages(page); -+ enum lru_list lru = LRU_FILE * file; -+ -+ lockdep_assert_held(&lruvec->lru_lock); -+ VM_BUG_ON(old_gen != -1 && old_gen >= MAX_NR_GENS); -+ VM_BUG_ON(new_gen != -1 && new_gen >= MAX_NR_GENS); -+ VM_BUG_ON(old_gen == -1 && new_gen == -1); -+ -+ if (old_gen >= 0) -+ WRITE_ONCE(lruvec->evictable.sizes[old_gen][file][zone], -+ lruvec->evictable.sizes[old_gen][file][zone] - delta); -+ if (new_gen >= 0) -+ WRITE_ONCE(lruvec->evictable.sizes[new_gen][file][zone], -+ lruvec->evictable.sizes[new_gen][file][zone] + delta); -+ -+ if (old_gen < 0) { -+ if (lru_gen_is_active(lruvec, new_gen)) -+ lru += LRU_ACTIVE; -+ update_lru_size(lruvec, lru, zone, delta); -+ return; -+ } -+ -+ if (new_gen < 0) { -+ if (lru_gen_is_active(lruvec, old_gen)) -+ lru += LRU_ACTIVE; -+ update_lru_size(lruvec, lru, zone, -delta); -+ return; -+ } -+ -+ if (!lru_gen_is_active(lruvec, old_gen) && lru_gen_is_active(lruvec, new_gen)) { -+ update_lru_size(lruvec, lru, zone, -delta); -+ update_lru_size(lruvec, lru + LRU_ACTIVE, zone, delta); -+ } -+ -+ /* can't deactivate a page without deleting it first */ -+ VM_BUG_ON(lru_gen_is_active(lruvec, old_gen) && !lru_gen_is_active(lruvec, new_gen)); -+} -+ -+/* Add a page to a multigenerational lru list. Returns true on success. */ -+static inline bool page_set_lru_gen(struct page *page, struct lruvec *lruvec, bool front) -+{ -+ int gen; -+ unsigned long old_flags, new_flags; -+ int file = page_is_file_lru(page); -+ int zone = page_zonenum(page); -+ -+ if (PageUnevictable(page) || !lruvec->evictable.enabled[file]) -+ return false; -+ /* -+ * If a page is being faulted in, mark it as the youngest generation. -+ * try_walk_mm_list() may look at the size of the youngest generation -+ * to determine if a page table walk is needed. -+ * -+ * If an unmapped page is being activated, e.g., mark_page_accessed(), -+ * mark it as the second youngest generation so it won't affect -+ * try_walk_mm_list(). -+ * -+ * If a page is being evicted, i.e., waiting for writeback, mark it -+ * as the second oldest generation so it won't be scanned again -+ * immediately. And if there are more than three generations, it won't -+ * be counted as active either. -+ * -+ * If a page is being deactivated, rotated by writeback or allocated -+ * by readahead, mark it as the oldest generation so it will evicted -+ * first. -+ */ -+ if (PageActive(page) && page_mapped(page)) -+ gen = lru_gen_from_seq(lruvec->evictable.max_seq); -+ else if (PageActive(page)) -+ gen = lru_gen_from_seq(lruvec->evictable.max_seq - 1); -+ else if (PageReclaim(page)) -+ gen = lru_gen_from_seq(lruvec->evictable.min_seq[file] + 1); -+ else -+ gen = lru_gen_from_seq(lruvec->evictable.min_seq[file]); -+ -+ do { -+ old_flags = READ_ONCE(page->flags); -+ VM_BUG_ON_PAGE(old_flags & LRU_GEN_MASK, page); -+ -+ new_flags = (old_flags & ~(LRU_GEN_MASK | BIT(PG_active) | BIT(PG_workingset))) | -+ ((gen + 1UL) << LRU_GEN_PGOFF); -+ /* mark page as workingset if active */ -+ if (PageActive(page)) -+ new_flags |= BIT(PG_workingset); -+ } while (cmpxchg(&page->flags, old_flags, new_flags) != old_flags); -+ -+ lru_gen_update_size(page, lruvec, -1, gen); -+ if (front) -+ list_add(&page->lru, &lruvec->evictable.lists[gen][file][zone]); -+ else -+ list_add_tail(&page->lru, &lruvec->evictable.lists[gen][file][zone]); -+ -+ return true; -+} -+ -+/* Delete a page from a multigenerational lru list. Returns true on success. */ -+static inline bool page_clear_lru_gen(struct page *page, struct lruvec *lruvec) -+{ -+ int gen; -+ unsigned long old_flags, new_flags; -+ -+ do { -+ old_flags = READ_ONCE(page->flags); -+ if (!(old_flags & LRU_GEN_MASK)) -+ return false; -+ -+ VM_BUG_ON_PAGE(PageActive(page), page); -+ VM_BUG_ON_PAGE(PageUnevictable(page), page); -+ -+ gen = ((old_flags & LRU_GEN_MASK) >> LRU_GEN_PGOFF) - 1; -+ -+ new_flags = old_flags & ~LRU_GEN_MASK; -+ /* mark page active accordingly */ -+ if (lru_gen_is_active(lruvec, gen)) -+ new_flags |= BIT(PG_active); -+ } while (cmpxchg(&page->flags, old_flags, new_flags) != old_flags); -+ -+ lru_gen_update_size(page, lruvec, gen, -1); -+ list_del(&page->lru); -+ -+ return true; -+} -+ -+#else /* CONFIG_LRU_GEN */ -+ -+static inline bool lru_gen_enabled(void) -+{ -+ return false; -+} -+ -+static inline bool page_set_lru_gen(struct page *page, struct lruvec *lruvec, bool front) -+{ -+ return false; -+} -+ -+static inline bool page_clear_lru_gen(struct page *page, struct lruvec *lruvec) -+{ -+ return false; -+} -+ -+#endif /* CONFIG_LRU_GEN */ -+ - static __always_inline void add_page_to_lru_list(struct page *page, - struct lruvec *lruvec) - { - enum lru_list lru = page_lru(page); - -+ if (page_set_lru_gen(page, lruvec, true)) -+ return; -+ - update_lru_size(lruvec, lru, page_zonenum(page), thp_nr_pages(page)); - list_add(&page->lru, &lruvec->lists[lru]); - } -@@ -93,6 +281,9 @@ static __always_inline void add_page_to_lru_list_tail(struct page *page, - { - enum lru_list lru = page_lru(page); - -+ if (page_set_lru_gen(page, lruvec, false)) -+ return; -+ - update_lru_size(lruvec, lru, page_zonenum(page), thp_nr_pages(page)); - list_add_tail(&page->lru, &lruvec->lists[lru]); - } -@@ -100,6 +291,9 @@ static __always_inline void add_page_to_lru_list_tail(struct page *page, - static __always_inline void del_page_from_lru_list(struct page *page, - struct lruvec *lruvec) - { -+ if (page_clear_lru_gen(page, lruvec)) -+ return; -+ - list_del(&page->lru); - update_lru_size(lruvec, page_lru(page), page_zonenum(page), - -thp_nr_pages(page)); -diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h -index a99a1050565a..173083bb846e 100644 ---- a/include/linux/mmzone.h -+++ b/include/linux/mmzone.h -@@ -291,6 +291,56 @@ enum lruvec_flags { - */ - }; - -+struct lruvec; -+ -+#define LRU_GEN_MASK ((BIT(LRU_GEN_WIDTH) - 1) << LRU_GEN_PGOFF) -+ -+#ifdef CONFIG_LRU_GEN -+ -+#define MAX_NR_GENS CONFIG_NR_LRU_GENS -+ -+/* -+ * For a common x86_64 configuration that has 3 zones and 7 generations, -+ * the size of this struct is 1112; and 4 zones and 15 generations, the -+ * size is 3048. Though it can be configured to have 6 zones and 63 -+ * generations, there is unlikely a need for it. -+ */ -+struct lru_gen { -+ /* aging increments max generation number */ -+ unsigned long max_seq; -+ /* eviction increments min generation numbers */ -+ unsigned long min_seq[ANON_AND_FILE]; -+ /* birth time of each generation in jiffies */ -+ unsigned long timestamps[MAX_NR_GENS]; -+ /* multigenerational lru lists */ -+ struct list_head lists[MAX_NR_GENS][ANON_AND_FILE][MAX_NR_ZONES]; -+ /* sizes of multigenerational lru lists in pages */ -+ unsigned long sizes[MAX_NR_GENS][ANON_AND_FILE][MAX_NR_ZONES]; -+ /* used with swappiness to determine which to reclaim */ -+ unsigned long isolated[ANON_AND_FILE]; -+#ifdef CONFIG_MEMCG -+ /* reclaim priority to compare with other memcgs */ -+ atomic_t priority; -+#endif -+ /* whether multigenerational lru is enabled */ -+ bool enabled[ANON_AND_FILE]; -+}; -+ -+void lru_gen_init_lruvec(struct lruvec *lruvec); -+void lru_gen_set_state(bool enable, bool main, bool swap); -+ -+#else /* CONFIG_LRU_GEN */ -+ -+static inline void lru_gen_init_lruvec(struct lruvec *lruvec) -+{ -+} -+ -+static inline void lru_gen_set_state(bool enable, bool main, bool swap) -+{ -+} -+ -+#endif /* CONFIG_LRU_GEN */ -+ - struct lruvec { - struct list_head lists[NR_LRU_LISTS]; - /* per lruvec lru_lock for memcg */ -@@ -308,6 +358,10 @@ struct lruvec { - unsigned long refaults[ANON_AND_FILE]; - /* Various lruvec state flags (enum lruvec_flags) */ - unsigned long flags; -+#ifdef CONFIG_LRU_GEN -+ /* unevictable pages are on LRU_UNEVICTABLE */ -+ struct lru_gen evictable; -+#endif - #ifdef CONFIG_MEMCG - struct pglist_data *pgdat; - #endif -diff --git a/include/linux/page-flags-layout.h b/include/linux/page-flags-layout.h -index 7d4ec26d8a3e..0c24ace9da3c 100644 ---- a/include/linux/page-flags-layout.h -+++ b/include/linux/page-flags-layout.h -@@ -24,6 +24,20 @@ - #error ZONES_SHIFT -- too many zones configured adjust calculation - #endif - -+#ifndef CONFIG_LRU_GEN -+#define LRU_GEN_WIDTH 0 -+#else -+#if CONFIG_NR_LRU_GENS < 8 -+#define LRU_GEN_WIDTH 3 -+#elif CONFIG_NR_LRU_GENS < 16 -+#define LRU_GEN_WIDTH 4 -+#elif CONFIG_NR_LRU_GENS < 32 -+#define LRU_GEN_WIDTH 5 -+#else -+#define LRU_GEN_WIDTH 6 -+#endif -+#endif /* CONFIG_LRU_GEN */ -+ - #ifdef CONFIG_SPARSEMEM - #include - -@@ -56,7 +70,7 @@ - - #define ZONES_WIDTH ZONES_SHIFT - --#if SECTIONS_WIDTH+ZONES_WIDTH+NODES_SHIFT <= BITS_PER_LONG - NR_PAGEFLAGS -+#if SECTIONS_WIDTH+ZONES_WIDTH+LRU_GEN_WIDTH+NODES_SHIFT <= BITS_PER_LONG - NR_PAGEFLAGS - #define NODES_WIDTH NODES_SHIFT - #else - #ifdef CONFIG_SPARSEMEM_VMEMMAP -@@ -83,14 +97,14 @@ - #define KASAN_TAG_WIDTH 0 - #endif - --#if SECTIONS_WIDTH+ZONES_WIDTH+NODES_SHIFT+LAST_CPUPID_SHIFT+KASAN_TAG_WIDTH \ -+#if SECTIONS_WIDTH+ZONES_WIDTH+LRU_GEN_WIDTH+NODES_WIDTH+KASAN_TAG_WIDTH+LAST_CPUPID_SHIFT \ - <= BITS_PER_LONG - NR_PAGEFLAGS - #define LAST_CPUPID_WIDTH LAST_CPUPID_SHIFT - #else - #define LAST_CPUPID_WIDTH 0 - #endif - --#if SECTIONS_WIDTH+NODES_WIDTH+ZONES_WIDTH+LAST_CPUPID_WIDTH+KASAN_TAG_WIDTH \ -+#if SECTIONS_WIDTH+ZONES_WIDTH+LRU_GEN_WIDTH+NODES_WIDTH+KASAN_TAG_WIDTH+LAST_CPUPID_WIDTH \ - > BITS_PER_LONG - NR_PAGEFLAGS - #error "Not enough bits in page flags" - #endif -diff --git a/mm/huge_memory.c b/mm/huge_memory.c -index 395c75111d33..be9bf681313c 100644 ---- a/mm/huge_memory.c -+++ b/mm/huge_memory.c -@@ -2422,7 +2422,8 @@ static void __split_huge_page_tail(struct page *head, int tail, - #ifdef CONFIG_64BIT - (1L << PG_arch_2) | - #endif -- (1L << PG_dirty))); -+ (1L << PG_dirty) | -+ LRU_GEN_MASK)); - - /* ->mapping in first tail page is compound_mapcount */ - VM_BUG_ON_PAGE(tail > 2 && page_tail->mapping != TAIL_MAPPING, -diff --git a/mm/mm_init.c b/mm/mm_init.c -index 8e02e865cc65..0b91a25fbdee 100644 ---- a/mm/mm_init.c -+++ b/mm/mm_init.c -@@ -71,27 +71,30 @@ void __init mminit_verify_pageflags_layout(void) - width = shift - SECTIONS_WIDTH - NODES_WIDTH - ZONES_WIDTH - - LAST_CPUPID_SHIFT - KASAN_TAG_WIDTH; - mminit_dprintk(MMINIT_TRACE, "pageflags_layout_widths", -- "Section %d Node %d Zone %d Lastcpupid %d Kasantag %d Flags %d\n", -+ "Section %d Node %d Zone %d Lastcpupid %d Kasantag %d lru_gen %d Flags %d\n", - SECTIONS_WIDTH, - NODES_WIDTH, - ZONES_WIDTH, - LAST_CPUPID_WIDTH, - KASAN_TAG_WIDTH, -+ LRU_GEN_WIDTH, - NR_PAGEFLAGS); - mminit_dprintk(MMINIT_TRACE, "pageflags_layout_shifts", -- "Section %d Node %d Zone %d Lastcpupid %d Kasantag %d\n", -+ "Section %d Node %d Zone %d Lastcpupid %d Kasantag %d lru_gen %d\n", - SECTIONS_SHIFT, - NODES_SHIFT, - ZONES_SHIFT, - LAST_CPUPID_SHIFT, -- KASAN_TAG_WIDTH); -+ KASAN_TAG_WIDTH, -+ LRU_GEN_WIDTH); - mminit_dprintk(MMINIT_TRACE, "pageflags_layout_pgshifts", -- "Section %lu Node %lu Zone %lu Lastcpupid %lu Kasantag %lu\n", -+ "Section %lu Node %lu Zone %lu Lastcpupid %lu Kasantag %lu lru_gen %lu\n", - (unsigned long)SECTIONS_PGSHIFT, - (unsigned long)NODES_PGSHIFT, - (unsigned long)ZONES_PGSHIFT, - (unsigned long)LAST_CPUPID_PGSHIFT, -- (unsigned long)KASAN_TAG_PGSHIFT); -+ (unsigned long)KASAN_TAG_PGSHIFT, -+ (unsigned long)LRU_GEN_PGOFF); - mminit_dprintk(MMINIT_TRACE, "pageflags_layout_nodezoneid", - "Node/Zone ID: %lu -> %lu\n", - (unsigned long)(ZONEID_PGOFF + ZONEID_SHIFT), -diff --git a/mm/mmzone.c b/mm/mmzone.c -index eb89d6e018e2..2ec0d7793424 100644 ---- a/mm/mmzone.c -+++ b/mm/mmzone.c -@@ -81,6 +81,8 @@ void lruvec_init(struct lruvec *lruvec) - - for_each_lru(lru) - INIT_LIST_HEAD(&lruvec->lists[lru]); -+ -+ lru_gen_init_lruvec(lruvec); - } - - #if defined(CONFIG_NUMA_BALANCING) && !defined(LAST_CPUPID_NOT_IN_PAGE_FLAGS) -diff --git a/mm/swap.c b/mm/swap.c -index f20ed56ebbbf..bd10efe00684 100644 ---- a/mm/swap.c -+++ b/mm/swap.c -@@ -300,6 +300,10 @@ void lru_note_cost(struct lruvec *lruvec, bool file, unsigned int nr_pages) - - void lru_note_cost_page(struct page *page) - { -+ /* multigenerational lru doesn't use any heuristics */ -+ if (lru_gen_enabled()) -+ return; -+ - lru_note_cost(mem_cgroup_page_lruvec(page, page_pgdat(page)), - page_is_file_lru(page), thp_nr_pages(page)); - } -diff --git a/mm/swapfile.c b/mm/swapfile.c -index 084a5b9a18e5..fe03cfeaa08f 100644 ---- a/mm/swapfile.c -+++ b/mm/swapfile.c -@@ -2702,6 +2702,8 @@ SYSCALL_DEFINE1(swapoff, const char __user *, specialfile) - err = 0; - atomic_inc(&proc_poll_event); - wake_up_interruptible(&proc_poll_wait); -+ /* stop anon multigenerational lru if it's enabled */ -+ lru_gen_set_state(false, false, true); - - out_dput: - filp_close(victim, NULL); -@@ -3348,6 +3350,8 @@ SYSCALL_DEFINE2(swapon, const char __user *, specialfile, int, swap_flags) - mutex_unlock(&swapon_mutex); - atomic_inc(&proc_poll_event); - wake_up_interruptible(&proc_poll_wait); -+ /* start anon multigenerational lru if it's enabled */ -+ lru_gen_set_state(true, false, true); - - error = 0; - goto out; -diff --git a/mm/vmscan.c b/mm/vmscan.c -index f7657ab0d4b7..fd49a9a5d7f5 100644 ---- a/mm/vmscan.c -+++ b/mm/vmscan.c -@@ -49,6 +49,8 @@ - #include - #include - #include -+#include -+#include - - #include - #include -@@ -1110,6 +1112,10 @@ static unsigned int shrink_page_list(struct list_head *page_list, - if (!sc->may_unmap && page_mapped(page)) - goto keep_locked; - -+ /* in case this page was found accessed after it was isolated */ -+ if (lru_gen_enabled() && !ignore_references && PageReferenced(page)) -+ goto activate_locked; -+ - may_enter_fs = (sc->gfp_mask & __GFP_FS) || - (PageSwapCache(page) && (sc->gfp_mask & __GFP_IO)); - -@@ -2229,6 +2235,10 @@ static void prepare_scan_count(pg_data_t *pgdat, struct scan_control *sc) - unsigned long file; - struct lruvec *target_lruvec; - -+ /* multigenerational lru doesn't use any heuristics */ -+ if (lru_gen_enabled()) -+ return; -+ - target_lruvec = mem_cgroup_lruvec(sc->target_mem_cgroup, pgdat); - - /* -@@ -2518,6 +2528,19 @@ static void get_scan_count(struct lruvec *lruvec, struct scan_control *sc, - } - } - -+#ifdef CONFIG_LRU_GEN -+static void age_lru_gens(struct pglist_data *pgdat, struct scan_control *sc); -+static void shrink_lru_gens(struct lruvec *lruvec, struct scan_control *sc); -+#else -+static void age_lru_gens(struct pglist_data *pgdat, struct scan_control *sc) -+{ -+} -+ -+static void shrink_lru_gens(struct lruvec *lruvec, struct scan_control *sc) -+{ -+} -+#endif -+ - static void shrink_lruvec(struct lruvec *lruvec, struct scan_control *sc) - { - unsigned long nr[NR_LRU_LISTS]; -@@ -2529,6 +2552,11 @@ static void shrink_lruvec(struct lruvec *lruvec, struct scan_control *sc) - struct blk_plug plug; - bool scan_adjusted; - -+ if (lru_gen_enabled()) { -+ shrink_lru_gens(lruvec, sc); -+ return; -+ } -+ - get_scan_count(lruvec, sc, nr); - - /* Record the original scan target for proportional adjustments later */ -@@ -2995,6 +3023,10 @@ static void snapshot_refaults(struct mem_cgroup *target_memcg, pg_data_t *pgdat) - struct lruvec *target_lruvec; - unsigned long refaults; - -+ /* multigenerational lru doesn't use any heuristics */ -+ if (lru_gen_enabled()) -+ return; -+ - target_lruvec = mem_cgroup_lruvec(target_memcg, pgdat); - refaults = lruvec_page_state(target_lruvec, WORKINGSET_ACTIVATE_ANON); - target_lruvec->refaults[0] = refaults; -@@ -3369,6 +3401,11 @@ static void age_active_anon(struct pglist_data *pgdat, - struct mem_cgroup *memcg; - struct lruvec *lruvec; - -+ if (lru_gen_enabled()) { -+ age_lru_gens(pgdat, sc); -+ return; -+ } -+ - if (!total_swap_pages) - return; - -@@ -4553,12 +4590,1227 @@ static bool get_next_mm(struct lruvec *lruvec, unsigned long next_seq, - return last; - } - -+/****************************************************************************** -+ * aging (page table walk) -+ ******************************************************************************/ -+ -+#define DEFINE_MAX_SEQ(lruvec) \ -+ unsigned long max_seq = READ_ONCE((lruvec)->evictable.max_seq) -+ -+#define DEFINE_MIN_SEQ(lruvec) \ -+ unsigned long min_seq[ANON_AND_FILE] = { \ -+ READ_ONCE((lruvec)->evictable.min_seq[0]), \ -+ READ_ONCE((lruvec)->evictable.min_seq[1]), \ -+ } -+ -+#define for_each_gen_type_zone(gen, file, zone) \ -+ for ((gen) = 0; (gen) < MAX_NR_GENS; (gen)++) \ -+ for ((file) = 0; (file) < ANON_AND_FILE; (file)++) \ -+ for ((zone) = 0; (zone) < MAX_NR_ZONES; (zone)++) -+ -+#define for_each_type_zone(file, zone) \ -+ for ((file) = 0; (file) < ANON_AND_FILE; (file)++) \ -+ for ((zone) = 0; (zone) < MAX_NR_ZONES; (zone)++) -+ -+#define MAX_BATCH_SIZE 8192 -+ -+static DEFINE_PER_CPU(int [MAX_NR_GENS][ANON_AND_FILE][MAX_NR_ZONES], lru_batch_size); -+ -+static void update_batch_size(struct page *page, int old_gen, int new_gen) -+{ -+ int file = page_is_file_lru(page); -+ int zone = page_zonenum(page); -+ int delta = thp_nr_pages(page); -+ -+ VM_BUG_ON(preemptible()); -+ VM_BUG_ON(in_interrupt()); -+ VM_BUG_ON(old_gen >= MAX_NR_GENS); -+ VM_BUG_ON(new_gen >= MAX_NR_GENS); -+ -+ __this_cpu_sub(lru_batch_size[old_gen][file][zone], delta); -+ __this_cpu_add(lru_batch_size[new_gen][file][zone], delta); -+} -+ -+static void reset_batch_size(struct lruvec *lruvec) -+{ -+ int gen, file, zone; -+ -+ VM_BUG_ON(preemptible()); -+ VM_BUG_ON(in_interrupt()); -+ -+ spin_lock_irq(&lruvec->lru_lock); -+ -+ for_each_gen_type_zone(gen, file, zone) { -+ enum lru_list lru = LRU_FILE * file; -+ int total = __this_cpu_read(lru_batch_size[gen][file][zone]); -+ -+ if (!total) -+ continue; -+ -+ __this_cpu_write(lru_batch_size[gen][file][zone], 0); -+ -+ WRITE_ONCE(lruvec->evictable.sizes[gen][file][zone], -+ lruvec->evictable.sizes[gen][file][zone] + total); -+ -+ if (lru_gen_is_active(lruvec, gen)) -+ lru += LRU_ACTIVE; -+ update_lru_size(lruvec, lru, zone, total); -+ } -+ -+ spin_unlock_irq(&lruvec->lru_lock); -+} -+ -+static int page_update_lru_gen(struct page *page, int new_gen) -+{ -+ int old_gen; -+ unsigned long old_flags, new_flags; -+ -+ VM_BUG_ON(new_gen >= MAX_NR_GENS); -+ -+ do { -+ old_flags = READ_ONCE(page->flags); -+ -+ old_gen = ((old_flags & LRU_GEN_MASK) >> LRU_GEN_PGOFF) - 1; -+ if (old_gen < 0) { -+ /* make sure shrink_page_list() rejects this page */ -+ if (!PageReferenced(page)) -+ SetPageReferenced(page); -+ break; -+ } -+ -+ new_flags = (old_flags & ~LRU_GEN_MASK) | ((new_gen + 1UL) << LRU_GEN_PGOFF); -+ if (old_flags == new_flags) -+ break; -+ } while (cmpxchg(&page->flags, old_flags, new_flags) != old_flags); -+ -+ /* sort_page_by_gen() will sort this page during eviction */ -+ -+ return old_gen; -+} -+ -+struct mm_walk_args { -+ struct mem_cgroup *memcg; -+ unsigned long max_seq; -+ unsigned long next_addr; -+ unsigned long start_pfn; -+ unsigned long end_pfn; -+ unsigned long addr_bitmap; -+ int node_id; -+ int batch_size; -+ bool should_walk[ANON_AND_FILE]; -+}; -+ -+static inline unsigned long get_addr_mask(unsigned long addr) -+{ -+ return BIT((addr & ~PUD_MASK) >> ilog2(PUD_SIZE / BITS_PER_LONG)); -+} -+ -+static int walk_pte_range(pmd_t *pmdp, unsigned long start, unsigned long end, -+ struct mm_walk *walk) -+{ -+ pmd_t pmd; -+ pte_t *pte; -+ spinlock_t *ptl; -+ struct mm_walk_args *args = walk->private; -+ int old_gen, new_gen = lru_gen_from_seq(args->max_seq); -+ -+ pmd = pmd_read_atomic(pmdp); -+ barrier(); -+ if (!pmd_present(pmd) || pmd_trans_huge(pmd)) -+ return 0; -+ -+ VM_BUG_ON(pmd_huge(pmd) || pmd_devmap(pmd) || is_hugepd(__hugepd(pmd_val(pmd)))); -+ -+ if (IS_ENABLED(CONFIG_HAVE_ARCH_PARENT_PMD_YOUNG) && !pmd_young(pmd)) -+ return 0; -+ -+ pte = pte_offset_map_lock(walk->mm, &pmd, start, &ptl); -+ arch_enter_lazy_mmu_mode(); -+ -+ for (; start != end; pte++, start += PAGE_SIZE) { -+ struct page *page; -+ unsigned long pfn = pte_pfn(*pte); -+ -+ if (!pte_present(*pte) || !pte_young(*pte) || is_zero_pfn(pfn)) -+ continue; -+ -+ /* -+ * If this pte maps a page from a different node, set the -+ * bitmap to prevent the accessed bit on its parent pmd from -+ * being cleared. -+ */ -+ if (pfn < args->start_pfn || pfn >= args->end_pfn) { -+ args->addr_bitmap |= get_addr_mask(start); -+ continue; -+ } -+ -+ page = compound_head(pte_page(*pte)); -+ if (page_to_nid(page) != args->node_id) { -+ args->addr_bitmap |= get_addr_mask(start); -+ continue; -+ } -+ if (page_memcg_rcu(page) != args->memcg) -+ continue; -+ -+ if (ptep_test_and_clear_young(walk->vma, start, pte)) { -+ old_gen = page_update_lru_gen(page, new_gen); -+ if (old_gen >= 0 && old_gen != new_gen) { -+ update_batch_size(page, old_gen, new_gen); -+ args->batch_size++; -+ } -+ } -+ -+ if (pte_dirty(*pte) && !PageDirty(page) && -+ !(PageAnon(page) && PageSwapBacked(page) && !PageSwapCache(page))) -+ set_page_dirty(page); -+ } -+ -+ arch_leave_lazy_mmu_mode(); -+ pte_unmap_unlock(pte, ptl); -+ -+ return 0; -+} -+ -+static int walk_pmd_range(pud_t *pudp, unsigned long start, unsigned long end, -+ struct mm_walk *walk) -+{ -+ pud_t pud; -+ pmd_t *pmd; -+ spinlock_t *ptl; -+ struct mm_walk_args *args = walk->private; -+ int old_gen, new_gen = lru_gen_from_seq(args->max_seq); -+ -+ pud = READ_ONCE(*pudp); -+ if (!pud_present(pud) || WARN_ON_ONCE(pud_trans_huge(pud))) -+ return 0; -+ -+ VM_BUG_ON(pud_huge(pud) || pud_devmap(pud) || is_hugepd(__hugepd(pud_val(pud)))); -+ -+ if (!IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE) && -+ !IS_ENABLED(CONFIG_HAVE_ARCH_PARENT_PMD_YOUNG)) -+ goto done; -+ -+ pmd = pmd_offset(&pud, start); -+ ptl = pmd_lock(walk->mm, pmd); -+ arch_enter_lazy_mmu_mode(); -+ -+ for (; start != end; pmd++, start = pmd_addr_end(start, end)) { -+ struct page *page; -+ unsigned long pfn = pmd_pfn(*pmd); -+ -+ if (!pmd_present(*pmd) || !pmd_young(*pmd) || is_huge_zero_pmd(*pmd)) -+ continue; -+ -+ if (!pmd_trans_huge(*pmd)) { -+ if (!(args->addr_bitmap & get_addr_mask(start)) && -+ (!(pmd_addr_end(start, end) & ~PMD_MASK) || -+ !walk->vma->vm_next || -+ (walk->vma->vm_next->vm_start & PMD_MASK) > end)) -+ pmdp_test_and_clear_young(walk->vma, start, pmd); -+ continue; -+ } -+ -+ if (pfn < args->start_pfn || pfn >= args->end_pfn) -+ continue; -+ -+ page = pmd_page(*pmd); -+ if (page_to_nid(page) != args->node_id) -+ continue; -+ if (page_memcg_rcu(page) != args->memcg) -+ continue; -+ -+ if (pmdp_test_and_clear_young(walk->vma, start, pmd)) { -+ old_gen = page_update_lru_gen(page, new_gen); -+ if (old_gen >= 0 && old_gen != new_gen) { -+ update_batch_size(page, old_gen, new_gen); -+ args->batch_size++; -+ } -+ } -+ -+ if (pmd_dirty(*pmd) && !PageDirty(page) && -+ !(PageAnon(page) && PageSwapBacked(page) && !PageSwapCache(page))) -+ set_page_dirty(page); -+ } -+ -+ arch_leave_lazy_mmu_mode(); -+ spin_unlock(ptl); -+done: -+ args->addr_bitmap = 0; -+ -+ if (args->batch_size < MAX_BATCH_SIZE) -+ return 0; -+ -+ args->next_addr = end; -+ -+ return -EAGAIN; -+} -+ -+static int should_skip_vma(unsigned long start, unsigned long end, struct mm_walk *walk) -+{ -+ struct vm_area_struct *vma = walk->vma; -+ struct mm_walk_args *args = walk->private; -+ -+ if (vma->vm_flags & (VM_LOCKED | VM_SPECIAL | VM_HUGETLB)) -+ return true; -+ -+ if (!(vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC))) -+ return true; -+ -+ if (vma_is_anonymous(vma)) -+ return !args->should_walk[0]; -+ -+ if (vma_is_shmem(vma)) -+ return !args->should_walk[0] || -+ mapping_unevictable(vma->vm_file->f_mapping); -+ -+ return !args->should_walk[1] || vma_is_dax(vma) || -+ vma == get_gate_vma(vma->vm_mm) || -+ mapping_unevictable(vma->vm_file->f_mapping); -+} -+ -+static void walk_mm(struct lruvec *lruvec, struct mm_struct *mm, int swappiness) -+{ -+ int err; -+ int file; -+ struct mem_cgroup *memcg = lruvec_memcg(lruvec); -+ struct pglist_data *pgdat = lruvec_pgdat(lruvec); -+ struct mm_walk_args args = {}; -+ struct mm_walk_ops ops = { -+ .test_walk = should_skip_vma, -+ .pmd_entry = walk_pte_range, -+ .pud_entry_post = walk_pmd_range, -+ }; -+ -+ args.memcg = memcg; -+ args.max_seq = READ_ONCE(lruvec->evictable.max_seq); -+ args.next_addr = FIRST_USER_ADDRESS; -+ args.start_pfn = pgdat->node_start_pfn; -+ args.end_pfn = pgdat_end_pfn(pgdat); -+ args.node_id = pgdat->node_id; -+ -+ for (file = !swappiness; file < ANON_AND_FILE; file++) -+ args.should_walk[file] = lru_gen_mm_is_active(mm) || -+ node_isset(pgdat->node_id, mm->lru_gen.nodes[file]); -+ -+ do { -+ unsigned long start = args.next_addr; -+ unsigned long end = mm->highest_vm_end; -+ -+ err = -EBUSY; -+ -+ preempt_disable(); -+ rcu_read_lock(); -+ -+#ifdef CONFIG_MEMCG -+ if (memcg && atomic_read(&memcg->moving_account)) -+ goto contended; -+#endif -+ if (!mmap_read_trylock(mm)) -+ goto contended; -+ -+ args.batch_size = 0; -+ -+ err = walk_page_range(mm, start, end, &ops, &args); -+ -+ mmap_read_unlock(mm); -+ -+ if (args.batch_size) -+ reset_batch_size(lruvec); -+contended: -+ rcu_read_unlock(); -+ preempt_enable(); -+ -+ cond_resched(); -+ } while (err == -EAGAIN && !mm_is_oom_victim(mm) && !mm_has_migrated(mm, memcg)); -+ -+ if (err) -+ return; -+ -+ for (file = !swappiness; file < ANON_AND_FILE; file++) { -+ if (args.should_walk[file]) -+ node_clear(pgdat->node_id, mm->lru_gen.nodes[file]); -+ } -+} -+ -+static void page_inc_lru_gen(struct page *page, struct lruvec *lruvec, bool front) -+{ -+ int old_gen, new_gen; -+ unsigned long old_flags, new_flags; -+ int file = page_is_file_lru(page); -+ int zone = page_zonenum(page); -+ -+ old_gen = lru_gen_from_seq(lruvec->evictable.min_seq[file]); -+ -+ do { -+ old_flags = READ_ONCE(page->flags); -+ new_gen = ((old_flags & LRU_GEN_MASK) >> LRU_GEN_PGOFF) - 1; -+ VM_BUG_ON_PAGE(new_gen < 0, page); -+ if (new_gen >= 0 && new_gen != old_gen) -+ goto sort; -+ -+ new_gen = (old_gen + 1) % MAX_NR_GENS; -+ new_flags = (old_flags & ~LRU_GEN_MASK) | ((new_gen + 1UL) << LRU_GEN_PGOFF); -+ /* mark page for reclaim if pending writeback */ -+ if (front) -+ new_flags |= BIT(PG_reclaim); -+ } while (cmpxchg(&page->flags, old_flags, new_flags) != old_flags); -+ -+ lru_gen_update_size(page, lruvec, old_gen, new_gen); -+sort: -+ if (front) -+ list_move(&page->lru, &lruvec->evictable.lists[new_gen][file][zone]); -+ else -+ list_move_tail(&page->lru, &lruvec->evictable.lists[new_gen][file][zone]); -+} -+ -+static int get_nr_gens(struct lruvec *lruvec, int file) -+{ -+ return lruvec->evictable.max_seq - lruvec->evictable.min_seq[file] + 1; -+} -+ -+static bool __maybe_unused seq_is_valid(struct lruvec *lruvec) -+{ -+ lockdep_assert_held(&lruvec->lru_lock); -+ -+ return get_nr_gens(lruvec, 0) >= MIN_NR_GENS && -+ get_nr_gens(lruvec, 0) <= MAX_NR_GENS && -+ get_nr_gens(lruvec, 1) >= MIN_NR_GENS && -+ get_nr_gens(lruvec, 1) <= MAX_NR_GENS; -+} -+ -+static bool try_inc_min_seq(struct lruvec *lruvec, int file) -+{ -+ int gen, zone; -+ bool success = false; -+ -+ VM_BUG_ON(!seq_is_valid(lruvec)); -+ -+ while (get_nr_gens(lruvec, file) > MIN_NR_GENS) { -+ gen = lru_gen_from_seq(lruvec->evictable.min_seq[file]); -+ -+ for (zone = 0; zone < MAX_NR_ZONES; zone++) { -+ if (!list_empty(&lruvec->evictable.lists[gen][file][zone])) -+ return success; -+ } -+ -+ lruvec->evictable.isolated[file] = 0; -+ WRITE_ONCE(lruvec->evictable.min_seq[file], -+ lruvec->evictable.min_seq[file] + 1); -+ -+ success = true; -+ } -+ -+ return success; -+} -+ -+static bool inc_min_seq(struct lruvec *lruvec, int file) -+{ -+ int gen, zone; -+ int batch_size = 0; -+ -+ VM_BUG_ON(!seq_is_valid(lruvec)); -+ -+ if (get_nr_gens(lruvec, file) != MAX_NR_GENS) -+ return true; -+ -+ gen = lru_gen_from_seq(lruvec->evictable.min_seq[file]); -+ -+ for (zone = 0; zone < MAX_NR_ZONES; zone++) { -+ struct list_head *head = &lruvec->evictable.lists[gen][file][zone]; -+ -+ while (!list_empty(head)) { -+ struct page *page = lru_to_page(head); -+ -+ VM_BUG_ON_PAGE(PageTail(page), page); -+ VM_BUG_ON_PAGE(PageUnevictable(page), page); -+ VM_BUG_ON_PAGE(PageActive(page), page); -+ VM_BUG_ON_PAGE(page_is_file_lru(page) != file, page); -+ VM_BUG_ON_PAGE(page_zonenum(page) != zone, page); -+ -+ prefetchw_prev_lru_page(page, head, flags); -+ -+ page_inc_lru_gen(page, lruvec, false); -+ -+ if (++batch_size == MAX_BATCH_SIZE) -+ return false; -+ } -+ -+ VM_BUG_ON(lruvec->evictable.sizes[gen][file][zone]); -+ } -+ -+ lruvec->evictable.isolated[file] = 0; -+ WRITE_ONCE(lruvec->evictable.min_seq[file], -+ lruvec->evictable.min_seq[file] + 1); -+ -+ return true; -+} -+ -+static void inc_max_seq(struct lruvec *lruvec) -+{ -+ int gen, file, zone; -+ -+ spin_lock_irq(&lruvec->lru_lock); -+ -+ VM_BUG_ON(!seq_is_valid(lruvec)); -+ -+ for (file = 0; file < ANON_AND_FILE; file++) { -+ if (try_inc_min_seq(lruvec, file)) -+ continue; -+ -+ while (!inc_min_seq(lruvec, file)) { -+ spin_unlock_irq(&lruvec->lru_lock); -+ cond_resched(); -+ spin_lock_irq(&lruvec->lru_lock); -+ } -+ } -+ -+ gen = lru_gen_from_seq(lruvec->evictable.max_seq - 1); -+ for_each_type_zone(file, zone) { -+ enum lru_list lru = LRU_FILE * file; -+ long total = lruvec->evictable.sizes[gen][file][zone]; -+ -+ WARN_ON_ONCE(total != (int)total); -+ -+ update_lru_size(lruvec, lru, zone, total); -+ update_lru_size(lruvec, lru + LRU_ACTIVE, zone, -total); -+ } -+ -+ gen = lru_gen_from_seq(lruvec->evictable.max_seq + 1); -+ for_each_type_zone(file, zone) { -+ VM_BUG_ON(lruvec->evictable.sizes[gen][file][zone]); -+ VM_BUG_ON(!list_empty(&lruvec->evictable.lists[gen][file][zone])); -+ } -+ -+ WRITE_ONCE(lruvec->evictable.timestamps[gen], jiffies); -+ /* make sure the birth time is valid when read locklessly */ -+ smp_store_release(&lruvec->evictable.max_seq, lruvec->evictable.max_seq + 1); -+ -+ spin_unlock_irq(&lruvec->lru_lock); -+} -+ -+/* Main function used by foreground, background and user-triggered aging. */ -+static bool walk_mm_list(struct lruvec *lruvec, unsigned long next_seq, -+ struct scan_control *sc, int swappiness) -+{ -+ bool last; -+ struct mm_struct *mm = NULL; -+ int nid = lruvec_pgdat(lruvec)->node_id; -+ struct mem_cgroup *memcg = lruvec_memcg(lruvec); -+ struct lru_gen_mm_list *mm_list = get_mm_list(memcg); -+ -+ VM_BUG_ON(next_seq > READ_ONCE(lruvec->evictable.max_seq)); -+ -+ /* -+ * For each walk of the mm list of a memcg, we decrement the priority -+ * of its lruvec. For each walk of memcgs in kswapd, we increment the -+ * priorities of all lruvecs. -+ * -+ * So if this lruvec has a higher priority (smaller value), it means -+ * other concurrent reclaimers (global or memcg reclaim) have walked -+ * its mm list. Skip it for this priority to balance the pressure on -+ * all memcgs. -+ */ -+#ifdef CONFIG_MEMCG -+ if (!mem_cgroup_disabled() && !cgroup_reclaim(sc) && -+ sc->priority > atomic_read(&lruvec->evictable.priority)) -+ return false; -+#endif -+ -+ do { -+ last = get_next_mm(lruvec, next_seq, swappiness, &mm); -+ if (mm) -+ walk_mm(lruvec, mm, swappiness); -+ -+ cond_resched(); -+ } while (mm); -+ -+ if (!last) { -+ /* foreground aging prefers not to wait unless "necessary" */ -+ if (!current_is_kswapd() && sc->priority < DEF_PRIORITY - 2) -+ wait_event_killable(mm_list->nodes[nid].wait, -+ next_seq < READ_ONCE(lruvec->evictable.max_seq)); -+ -+ return next_seq < READ_ONCE(lruvec->evictable.max_seq); -+ } -+ -+ VM_BUG_ON(next_seq != READ_ONCE(lruvec->evictable.max_seq)); -+ -+ inc_max_seq(lruvec); -+ -+#ifdef CONFIG_MEMCG -+ if (!mem_cgroup_disabled()) -+ atomic_add_unless(&lruvec->evictable.priority, -1, 0); -+#endif -+ -+ /* order against inc_max_seq() */ -+ smp_mb(); -+ /* either we see any waiters or they will see updated max_seq */ -+ if (waitqueue_active(&mm_list->nodes[nid].wait)) -+ wake_up_all(&mm_list->nodes[nid].wait); -+ -+ wakeup_flusher_threads(WB_REASON_VMSCAN); -+ -+ return true; -+} -+ -+/****************************************************************************** -+ * eviction (lru list scan) -+ ******************************************************************************/ -+ -+static int max_nr_gens(unsigned long max_seq, unsigned long *min_seq, int swappiness) -+{ -+ return max_seq - min(min_seq[!swappiness], min_seq[1]) + 1; -+} -+ -+static bool sort_page_by_gen(struct page *page, struct lruvec *lruvec) -+{ -+ bool success; -+ int gen = page_lru_gen(page); -+ int file = page_is_file_lru(page); -+ int zone = page_zonenum(page); -+ -+ VM_BUG_ON_PAGE(gen == -1, page); -+ -+ /* a lazy free page that has been written into */ -+ if (file && PageDirty(page) && PageAnon(page)) { -+ success = page_clear_lru_gen(page, lruvec); -+ VM_BUG_ON_PAGE(!success, page); -+ SetPageSwapBacked(page); -+ add_page_to_lru_list_tail(page, lruvec); -+ return true; -+ } -+ -+ /* page_update_lru_gen() has updated the page */ -+ if (gen != lru_gen_from_seq(lruvec->evictable.min_seq[file])) { -+ list_move(&page->lru, &lruvec->evictable.lists[gen][file][zone]); -+ return true; -+ } -+ -+ /* -+ * A page can't be immediately evicted, and page_inc_lru_gen() will -+ * mark it for reclaim and hopefully writeback will write it soon. -+ * -+ * During page table walk, we call set_page_dirty() on pages that have -+ * dirty PTEs, which helps account dirty pages so writeback should do -+ * its job. -+ */ -+ if (PageLocked(page) || PageWriteback(page) || (file && PageDirty(page))) { -+ page_inc_lru_gen(page, lruvec, true); -+ return true; -+ } -+ -+ return false; -+} -+ -+static bool should_skip_page(struct page *page, struct scan_control *sc) -+{ -+ if (!sc->may_unmap && page_mapped(page)) -+ return true; -+ -+ if (!(sc->may_writepage && (sc->gfp_mask & __GFP_IO)) && -+ (PageDirty(page) || (PageAnon(page) && !PageSwapCache(page)))) -+ return true; -+ -+ if (!get_page_unless_zero(page)) -+ return true; -+ -+ if (!TestClearPageLRU(page)) { -+ put_page(page); -+ return true; -+ } -+ -+ return false; -+} -+ -+static void isolate_page_by_gen(struct page *page, struct lruvec *lruvec) -+{ -+ bool success; -+ -+ success = page_clear_lru_gen(page, lruvec); -+ VM_BUG_ON_PAGE(!success, page); -+ -+ if (PageActive(page)) { -+ ClearPageActive(page); -+ /* make sure shrink_page_list() rejects this page */ -+ if (!PageReferenced(page)) -+ SetPageReferenced(page); -+ return; -+ } -+ -+ /* make sure shrink_page_list() doesn't write back this page */ -+ if (PageReclaim(page)) -+ ClearPageReclaim(page); -+ /* make sure shrink_page_list() doesn't reject this page */ -+ if (PageReferenced(page)) -+ ClearPageReferenced(page); -+} -+ -+static int scan_lru_gen_pages(struct lruvec *lruvec, struct scan_control *sc, -+ long *nr_to_scan, int file, struct list_head *list) -+{ -+ bool success; -+ int gen, zone; -+ enum vm_event_item item; -+ int sorted = 0; -+ int scanned = 0; -+ int isolated = 0; -+ int batch_size = 0; -+ -+ VM_BUG_ON(!list_empty(list)); -+ -+ if (get_nr_gens(lruvec, file) == MIN_NR_GENS) -+ return -ENOENT; -+ -+ gen = lru_gen_from_seq(lruvec->evictable.min_seq[file]); -+ -+ for (zone = sc->reclaim_idx; zone >= 0; zone--) { -+ LIST_HEAD(moved); -+ int skipped = 0; -+ struct list_head *head = &lruvec->evictable.lists[gen][file][zone]; -+ -+ while (!list_empty(head)) { -+ struct page *page = lru_to_page(head); -+ int delta = thp_nr_pages(page); -+ -+ VM_BUG_ON_PAGE(PageTail(page), page); -+ VM_BUG_ON_PAGE(PageUnevictable(page), page); -+ VM_BUG_ON_PAGE(PageActive(page), page); -+ VM_BUG_ON_PAGE(page_is_file_lru(page) != file, page); -+ VM_BUG_ON_PAGE(page_zonenum(page) != zone, page); -+ -+ prefetchw_prev_lru_page(page, head, flags); -+ -+ scanned += delta; -+ -+ if (sort_page_by_gen(page, lruvec)) -+ sorted += delta; -+ else if (should_skip_page(page, sc)) { -+ list_move(&page->lru, &moved); -+ skipped += delta; -+ } else { -+ isolate_page_by_gen(page, lruvec); -+ list_add(&page->lru, list); -+ isolated += delta; -+ } -+ -+ if (scanned >= *nr_to_scan || isolated >= SWAP_CLUSTER_MAX || -+ ++batch_size == MAX_BATCH_SIZE) -+ break; -+ } -+ -+ list_splice(&moved, head); -+ __count_zid_vm_events(PGSCAN_SKIP, zone, skipped); -+ -+ if (scanned >= *nr_to_scan || isolated >= SWAP_CLUSTER_MAX || -+ batch_size == MAX_BATCH_SIZE) -+ break; -+ } -+ -+ success = try_inc_min_seq(lruvec, file); -+ -+ item = current_is_kswapd() ? PGSCAN_KSWAPD : PGSCAN_DIRECT; -+ if (!cgroup_reclaim(sc)) -+ __count_vm_events(item, scanned); -+ __count_memcg_events(lruvec_memcg(lruvec), item, scanned); -+ __count_vm_events(PGSCAN_ANON + file, scanned); -+ -+ *nr_to_scan -= scanned; -+ -+ if (*nr_to_scan <= 0 || success || isolated) -+ return isolated; -+ /* -+ * We may have trouble finding eligible pages due to restrictions from -+ * reclaim_idx, may_unmap and may_writepage. The following check makes -+ * sure we won't be stuck if we aren't making enough progress. -+ */ -+ return batch_size == MAX_BATCH_SIZE && sorted >= SWAP_CLUSTER_MAX ? 0 : -ENOENT; -+} -+ -+static int isolate_lru_gen_pages(struct lruvec *lruvec, struct scan_control *sc, -+ int swappiness, long *nr_to_scan, int *file, -+ struct list_head *list) -+{ -+ int i; -+ int isolated; -+ DEFINE_MAX_SEQ(lruvec); -+ DEFINE_MIN_SEQ(lruvec); -+ -+ VM_BUG_ON(!seq_is_valid(lruvec)); -+ -+ if (max_nr_gens(max_seq, min_seq, swappiness) == MIN_NR_GENS) -+ return 0; -+ -+ /* simply choose a type based on generations and swappiness */ -+ *file = !swappiness || min_seq[0] > min_seq[1] || -+ (min_seq[0] == min_seq[1] && -+ max(lruvec->evictable.isolated[0], 1UL) * (200 - swappiness) > -+ max(lruvec->evictable.isolated[1], 1UL) * (swappiness - 1)); -+ -+ for (i = !swappiness; i < ANON_AND_FILE; i++) { -+ isolated = scan_lru_gen_pages(lruvec, sc, nr_to_scan, *file, list); -+ if (isolated >= 0) -+ break; -+ -+ *file = !*file; -+ } -+ -+ if (isolated < 0) -+ isolated = *nr_to_scan = 0; -+ -+ lruvec->evictable.isolated[*file] += isolated; -+ -+ return isolated; -+} -+ -+/* Main function used by foreground, background and user-triggered eviction. */ -+static bool evict_lru_gen_pages(struct lruvec *lruvec, struct scan_control *sc, -+ int swappiness, long *nr_to_scan) -+{ -+ int file; -+ int isolated; -+ int reclaimed; -+ LIST_HEAD(list); -+ struct page *page; -+ enum vm_event_item item; -+ struct reclaim_stat stat; -+ struct pglist_data *pgdat = lruvec_pgdat(lruvec); -+ -+ spin_lock_irq(&lruvec->lru_lock); -+ -+ isolated = isolate_lru_gen_pages(lruvec, sc, swappiness, nr_to_scan, &file, &list); -+ VM_BUG_ON(list_empty(&list) == !!isolated); -+ -+ if (isolated) -+ __mod_node_page_state(pgdat, NR_ISOLATED_ANON + file, isolated); -+ -+ spin_unlock_irq(&lruvec->lru_lock); -+ -+ if (!isolated) -+ goto done; -+ -+ reclaimed = shrink_page_list(&list, pgdat, sc, &stat, false); -+ /* -+ * We have to prevent any pages from being added back to the same list -+ * it was isolated from. Otherwise we may risk looping on them forever. -+ */ -+ list_for_each_entry(page, &list, lru) { -+ if (!PageReclaim(page) && !PageMlocked(page) && !PageActive(page)) -+ SetPageActive(page); -+ } -+ -+ spin_lock_irq(&lruvec->lru_lock); -+ -+ move_pages_to_lru(lruvec, &list); -+ -+ __mod_node_page_state(pgdat, NR_ISOLATED_ANON + file, -isolated); -+ -+ item = current_is_kswapd() ? PGSTEAL_KSWAPD : PGSTEAL_DIRECT; -+ if (!cgroup_reclaim(sc)) -+ __count_vm_events(item, reclaimed); -+ __count_memcg_events(lruvec_memcg(lruvec), item, reclaimed); -+ __count_vm_events(PGSTEAL_ANON + file, reclaimed); -+ -+ spin_unlock_irq(&lruvec->lru_lock); -+ -+ mem_cgroup_uncharge_list(&list); -+ free_unref_page_list(&list); -+ -+ sc->nr_reclaimed += reclaimed; -+done: -+ return *nr_to_scan > 0 && sc->nr_reclaimed < sc->nr_to_reclaim; -+} -+ -+/****************************************************************************** -+ * reclaim (aging + eviction) -+ ******************************************************************************/ -+ -+static unsigned long get_nr_to_scan(struct lruvec *lruvec, struct scan_control *sc, -+ int swappiness) -+{ -+ int gen, file, zone; -+ long nr_to_scan = 0; -+ DEFINE_MAX_SEQ(lruvec); -+ DEFINE_MIN_SEQ(lruvec); -+ -+ lru_add_drain(); -+ -+ for (file = !swappiness; file < ANON_AND_FILE; file++) { -+ unsigned long seq; -+ -+ for (seq = min_seq[file]; seq <= max_seq; seq++) { -+ gen = lru_gen_from_seq(seq); -+ -+ for (zone = 0; zone <= sc->reclaim_idx; zone++) -+ nr_to_scan += READ_ONCE( -+ lruvec->evictable.sizes[gen][file][zone]); -+ } -+ } -+ -+ nr_to_scan = max(nr_to_scan, 0L); -+ nr_to_scan = round_up(nr_to_scan >> sc->priority, SWAP_CLUSTER_MAX); -+ -+ if (max_nr_gens(max_seq, min_seq, swappiness) > MIN_NR_GENS) -+ return nr_to_scan; -+ -+ /* kswapd does background aging, i.e., age_lru_gens() */ -+ if (current_is_kswapd()) -+ return 0; -+ -+ return walk_mm_list(lruvec, max_seq, sc, swappiness) ? nr_to_scan : 0; -+} -+ -+static int get_swappiness(struct lruvec *lruvec) -+{ -+ struct mem_cgroup *memcg = lruvec_memcg(lruvec); -+ int swappiness = mem_cgroup_get_nr_swap_pages(memcg) >= (long)SWAP_CLUSTER_MAX ? -+ mem_cgroup_swappiness(memcg) : 0; -+ -+ VM_BUG_ON(swappiness > 200U); -+ -+ return swappiness; -+} -+ -+static void shrink_lru_gens(struct lruvec *lruvec, struct scan_control *sc) -+{ -+ struct blk_plug plug; -+ unsigned long scanned = 0; -+ struct mem_cgroup *memcg = lruvec_memcg(lruvec); -+ -+ blk_start_plug(&plug); -+ -+ while (true) { -+ long nr_to_scan; -+ int swappiness = sc->may_swap ? get_swappiness(lruvec) : 0; -+ -+ nr_to_scan = get_nr_to_scan(lruvec, sc, swappiness) - scanned; -+ if (nr_to_scan < (long)SWAP_CLUSTER_MAX) -+ break; -+ -+ scanned += nr_to_scan; -+ -+ if (!evict_lru_gen_pages(lruvec, sc, swappiness, &nr_to_scan)) -+ break; -+ -+ scanned -= nr_to_scan; -+ -+ if (mem_cgroup_below_min(memcg) || -+ (mem_cgroup_below_low(memcg) && !sc->memcg_low_reclaim)) -+ break; -+ -+ cond_resched(); -+ } -+ -+ blk_finish_plug(&plug); -+} -+ -+/****************************************************************************** -+ * background aging -+ ******************************************************************************/ -+ -+static int lru_gen_spread = MIN_NR_GENS; -+ -+static int min_nr_gens(unsigned long max_seq, unsigned long *min_seq, int swappiness) -+{ -+ return max_seq - max(min_seq[!swappiness], min_seq[1]) + 1; -+} -+ -+static void try_walk_mm_list(struct lruvec *lruvec, struct scan_control *sc) -+{ -+ int gen, file, zone; -+ long old_and_young[2] = {}; -+ int spread = READ_ONCE(lru_gen_spread); -+ int swappiness = get_swappiness(lruvec); -+ DEFINE_MAX_SEQ(lruvec); -+ DEFINE_MIN_SEQ(lruvec); -+ -+ lru_add_drain(); -+ -+ for (file = !swappiness; file < ANON_AND_FILE; file++) { -+ unsigned long seq; -+ -+ for (seq = min_seq[file]; seq <= max_seq; seq++) { -+ gen = lru_gen_from_seq(seq); -+ -+ for (zone = 0; zone < MAX_NR_ZONES; zone++) -+ old_and_young[seq == max_seq] += READ_ONCE( -+ lruvec->evictable.sizes[gen][file][zone]); -+ } -+ } -+ -+ old_and_young[0] = max(old_and_young[0], 0L); -+ old_and_young[1] = max(old_and_young[1], 0L); -+ -+ if (old_and_young[0] + old_and_young[1] < SWAP_CLUSTER_MAX) -+ return; -+ -+ /* try to spread pages out across spread+1 generations */ -+ if (old_and_young[0] >= old_and_young[1] * spread && -+ min_nr_gens(max_seq, min_seq, swappiness) > max(spread, MIN_NR_GENS)) -+ return; -+ -+ walk_mm_list(lruvec, max_seq, sc, swappiness); -+} -+ -+static void age_lru_gens(struct pglist_data *pgdat, struct scan_control *sc) -+{ -+ struct mem_cgroup *memcg; -+ -+ VM_BUG_ON(!current_is_kswapd()); -+ -+ memcg = mem_cgroup_iter(NULL, NULL, NULL); -+ do { -+ struct lruvec *lruvec = mem_cgroup_lruvec(memcg, pgdat); -+ -+ if (!mem_cgroup_below_min(memcg) && -+ (!mem_cgroup_below_low(memcg) || sc->memcg_low_reclaim)) -+ try_walk_mm_list(lruvec, sc); -+ -+#ifdef CONFIG_MEMCG -+ if (!mem_cgroup_disabled()) -+ atomic_add_unless(&lruvec->evictable.priority, 1, DEF_PRIORITY); -+#endif -+ -+ cond_resched(); -+ } while ((memcg = mem_cgroup_iter(NULL, memcg, NULL))); -+} -+ -+/****************************************************************************** -+ * state change -+ ******************************************************************************/ -+ -+#ifdef CONFIG_LRU_GEN_ENABLED -+DEFINE_STATIC_KEY_TRUE(lru_gen_static_key); -+#else -+DEFINE_STATIC_KEY_FALSE(lru_gen_static_key); -+#endif -+ -+static DEFINE_MUTEX(lru_gen_state_mutex); -+static int lru_gen_nr_swapfiles __read_mostly; -+ -+static bool fill_lru_gen_lists(struct lruvec *lruvec) -+{ -+ enum lru_list lru; -+ int batch_size = 0; -+ -+ for_each_evictable_lru(lru) { -+ int file = is_file_lru(lru); -+ bool active = is_active_lru(lru); -+ struct list_head *head = &lruvec->lists[lru]; -+ -+ if (!lruvec->evictable.enabled[file]) -+ continue; -+ -+ while (!list_empty(head)) { -+ bool success; -+ struct page *page = lru_to_page(head); -+ -+ VM_BUG_ON_PAGE(PageTail(page), page); -+ VM_BUG_ON_PAGE(PageUnevictable(page), page); -+ VM_BUG_ON_PAGE(PageActive(page) != active, page); -+ VM_BUG_ON_PAGE(page_lru_gen(page) != -1, page); -+ VM_BUG_ON_PAGE(page_is_file_lru(page) != file, page); -+ -+ prefetchw_prev_lru_page(page, head, flags); -+ -+ del_page_from_lru_list(page, lruvec); -+ success = page_set_lru_gen(page, lruvec, true); -+ VM_BUG_ON(!success); -+ -+ if (++batch_size == MAX_BATCH_SIZE) -+ return false; -+ } -+ } -+ -+ return true; -+} -+ -+static bool drain_lru_gen_lists(struct lruvec *lruvec) -+{ -+ int gen, file, zone; -+ int batch_size = 0; -+ -+ for_each_gen_type_zone(gen, file, zone) { -+ struct list_head *head = &lruvec->evictable.lists[gen][file][zone]; -+ -+ if (lruvec->evictable.enabled[file]) -+ continue; -+ -+ while (!list_empty(head)) { -+ bool success; -+ struct page *page = lru_to_page(head); -+ -+ VM_BUG_ON_PAGE(PageTail(page), page); -+ VM_BUG_ON_PAGE(PageUnevictable(page), page); -+ VM_BUG_ON_PAGE(PageActive(page), page); -+ VM_BUG_ON_PAGE(page_is_file_lru(page) != file, page); -+ VM_BUG_ON_PAGE(page_zonenum(page) != zone, page); -+ -+ prefetchw_prev_lru_page(page, head, flags); -+ -+ success = page_clear_lru_gen(page, lruvec); -+ VM_BUG_ON(!success); -+ add_page_to_lru_list(page, lruvec); -+ -+ if (++batch_size == MAX_BATCH_SIZE) -+ return false; -+ } -+ } -+ -+ return true; -+} -+ -+static bool __maybe_unused state_is_valid(struct lruvec *lruvec) -+{ -+ int gen, file, zone; -+ enum lru_list lru; -+ -+ for_each_evictable_lru(lru) { -+ file = is_file_lru(lru); -+ -+ if (lruvec->evictable.enabled[file] && -+ !list_empty(&lruvec->lists[lru])) -+ return false; -+ } -+ -+ for_each_gen_type_zone(gen, file, zone) { -+ if (!lruvec->evictable.enabled[file] && -+ !list_empty(&lruvec->evictable.lists[gen][file][zone])) -+ return false; -+ -+ VM_WARN_ONCE(!lruvec->evictable.enabled[file] && -+ lruvec->evictable.sizes[gen][file][zone], -+ "lru_gen: possible unbalanced number of pages"); -+ } -+ -+ return true; -+} -+ -+/* -+ * We enable/disable file multigenerational lru according to the main switch. -+ * -+ * For anon multigenerational lru, we only enabled it when main switch is on -+ * and there is at least one swapfile; we disable it when there is no swapfile -+ * regardless of the value of the main switch. Otherwise, we may eventually -+ * run out of generation numbers and have to call inc_min_seq(), which brings -+ * an unnecessary cost. -+ */ -+void lru_gen_set_state(bool enable, bool main, bool swap) -+{ -+ struct mem_cgroup *memcg; -+ -+ mem_hotplug_begin(); -+ mutex_lock(&lru_gen_state_mutex); -+ cgroup_lock(); -+ -+ main = main && enable != lru_gen_enabled(); -+ swap = swap && !(enable ? lru_gen_nr_swapfiles++ : --lru_gen_nr_swapfiles); -+ swap = swap && lru_gen_enabled(); -+ if (!main && !swap) -+ goto unlock; -+ -+ if (main) { -+ if (enable) -+ static_branch_enable(&lru_gen_static_key); -+ else -+ static_branch_disable(&lru_gen_static_key); -+ } -+ -+ memcg = mem_cgroup_iter(NULL, NULL, NULL); -+ do { -+ int nid; -+ -+ for_each_node_state(nid, N_MEMORY) { -+ struct lruvec *lruvec = mem_cgroup_lruvec(memcg, NODE_DATA(nid)); -+ -+ spin_lock_irq(&lruvec->lru_lock); -+ -+ VM_BUG_ON(!seq_is_valid(lruvec)); -+ VM_BUG_ON(!state_is_valid(lruvec)); -+ -+ WRITE_ONCE(lruvec->evictable.enabled[0], -+ lru_gen_enabled() && lru_gen_nr_swapfiles); -+ WRITE_ONCE(lruvec->evictable.enabled[1], -+ lru_gen_enabled()); -+ -+ while (!(enable ? fill_lru_gen_lists(lruvec) : -+ drain_lru_gen_lists(lruvec))) { -+ spin_unlock_irq(&lruvec->lru_lock); -+ cond_resched(); -+ spin_lock_irq(&lruvec->lru_lock); -+ } -+ -+ spin_unlock_irq(&lruvec->lru_lock); -+ } -+ -+ cond_resched(); -+ } while ((memcg = mem_cgroup_iter(NULL, memcg, NULL))); -+unlock: -+ cgroup_unlock(); -+ mutex_unlock(&lru_gen_state_mutex); -+ mem_hotplug_done(); -+} -+ -+static int __meminit __maybe_unused -+lru_gen_online_mem(struct notifier_block *self, unsigned long action, void *arg) -+{ -+ struct mem_cgroup *memcg; -+ struct memory_notify *mnb = arg; -+ int nid = mnb->status_change_nid; -+ -+ if (action != MEM_GOING_ONLINE || nid == NUMA_NO_NODE) -+ return NOTIFY_DONE; -+ -+ mutex_lock(&lru_gen_state_mutex); -+ cgroup_lock(); -+ -+ memcg = mem_cgroup_iter(NULL, NULL, NULL); -+ do { -+ struct lruvec *lruvec = mem_cgroup_lruvec(memcg, NODE_DATA(nid)); -+ -+ VM_BUG_ON(!seq_is_valid(lruvec)); -+ VM_BUG_ON(!state_is_valid(lruvec)); -+ -+ WRITE_ONCE(lruvec->evictable.enabled[0], -+ lru_gen_enabled() && lru_gen_nr_swapfiles); -+ WRITE_ONCE(lruvec->evictable.enabled[1], -+ lru_gen_enabled()); -+ } while ((memcg = mem_cgroup_iter(NULL, memcg, NULL))); -+ -+ cgroup_unlock(); -+ mutex_unlock(&lru_gen_state_mutex); -+ -+ return NOTIFY_DONE; -+} -+ - /****************************************************************************** - * initialization - ******************************************************************************/ - -+void lru_gen_init_lruvec(struct lruvec *lruvec) -+{ -+ int i; -+ int gen, file, zone; -+ -+#ifdef CONFIG_MEMCG -+ atomic_set(&lruvec->evictable.priority, DEF_PRIORITY); -+#endif -+ -+ lruvec->evictable.max_seq = MIN_NR_GENS; -+ lruvec->evictable.enabled[0] = lru_gen_enabled() && lru_gen_nr_swapfiles; -+ lruvec->evictable.enabled[1] = lru_gen_enabled(); -+ -+ for (i = 0; i <= MIN_NR_GENS; i++) -+ lruvec->evictable.timestamps[i] = jiffies; -+ -+ for_each_gen_type_zone(gen, file, zone) -+ INIT_LIST_HEAD(&lruvec->evictable.lists[gen][file][zone]); -+} -+ - static int __init init_lru_gen(void) - { -+ BUILD_BUG_ON(MAX_NR_GENS <= MIN_NR_GENS); -+ BUILD_BUG_ON(BIT(LRU_GEN_WIDTH) <= MAX_NR_GENS); -+ - if (mem_cgroup_disabled()) { - global_mm_list = alloc_mm_list(); - if (!global_mm_list) { -@@ -4567,6 +5819,9 @@ static int __init init_lru_gen(void) - } - } - -+ if (hotplug_memory_notifier(lru_gen_online_mem, 0)) -+ pr_err("lru_gen: failed to subscribe hotplug notifications\n"); -+ - return 0; - }; - /* --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-11-14-mm-multigenerational-lru-page-activation.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-11-14-mm-multigenerational-lru-page-activation.patch deleted file mode 100644 index de17cb6..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-11-14-mm-multigenerational-lru-page-activation.patch +++ /dev/null @@ -1,612 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 898B5C432C3 - for ; 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- Fri, 12 Mar 2021 23:58:10 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:44 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-12-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 11/14] mm: multigenerational lru: page activation -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -In the page fault path, we want to add pages to the per-zone lists -index by max_seq as they cannot be evicted without going through -the aging first. For anon pages, we rename -lru_cache_add_inactive_or_unevictable() to lru_cache_add_page_vma() -and add a new parameter, which is set to true in the page fault path, -to indicate whether they should be added to the per-zone lists index -by max_seq. For page/swap cache, since we cannot differentiate the -page fault path from the read ahead path at the time we call -lru_cache_add() in add_to_page_cache_lru() and -__read_swap_cache_async(), we have to add a new function -lru_gen_activate_page(), which is essentially activate_page(), to move -pages to the per-zone lists indexed by max_seq at a later time. -Hopefully we would find pages we want to activate in lru_pvecs.lru_add -and simply set PageActive() on them without having to actually move -them. - -In the reclaim path, pages mapped around a referenced PTE may also -have been referenced due to spatial locality. We add a new function -lru_gen_scan_around() to scan the vicinity of such a PTE. - -In addition, we add a new function page_is_active() to tell whether a -page is active. We cannot use PageActive() because it is only set on -active pages while they are not on multigenerational lru. It is -cleared while pages are on multigenerational lru, in order to spare -the aging the trouble of clearing it when an active generation becomes -inactive. Internally, page_is_active() compares the generation number -of a page with max_seq and max_seq-1, which are active generations and -protected from the eviction. Other generations, which may or may not -exist, are inactive. - -Signed-off-by: Yu Zhao ---- - fs/proc/task_mmu.c | 3 ++- - include/linux/mm_inline.h | 52 ++++++++++++++++++++++++++++++++++++++ - include/linux/mmzone.h | 6 +++++ - include/linux/swap.h | 4 +-- - kernel/events/uprobes.c | 2 +- - mm/huge_memory.c | 2 +- - mm/khugepaged.c | 2 +- - mm/memory.c | 14 +++++++---- - mm/migrate.c | 2 +- - mm/rmap.c | 6 +++++ - mm/swap.c | 26 +++++++++++-------- - mm/swapfile.c | 2 +- - mm/userfaultfd.c | 2 +- - mm/vmscan.c | 53 ++++++++++++++++++++++++++++++++++++++- - 14 files changed, 150 insertions(+), 26 deletions(-) - -diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c -index 3cec6fbef725..7cd173710e76 100644 ---- a/fs/proc/task_mmu.c -+++ b/fs/proc/task_mmu.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -1720,7 +1721,7 @@ static void gather_stats(struct page *page, struct numa_maps *md, int pte_dirty, - if (PageSwapCache(page)) - md->swapcache += nr_pages; - -- if (PageActive(page) || PageUnevictable(page)) -+ if (PageUnevictable(page) || page_is_active(compound_head(page), NULL)) - md->active += nr_pages; - - if (PageWriteback(page)) -diff --git a/include/linux/mm_inline.h b/include/linux/mm_inline.h -index 2d306cab36bc..a1a382418fc4 100644 ---- a/include/linux/mm_inline.h -+++ b/include/linux/mm_inline.h -@@ -116,6 +116,49 @@ static inline int page_lru_gen(struct page *page) - return ((READ_ONCE(page->flags) & LRU_GEN_MASK) >> LRU_GEN_PGOFF) - 1; - } - -+/* This function works regardless whether multigenerational lru is enabled. */ -+static inline bool page_is_active(struct page *page, struct lruvec *lruvec) -+{ -+ struct mem_cgroup *memcg; -+ int gen = page_lru_gen(page); -+ bool active = false; -+ -+ VM_BUG_ON_PAGE(PageTail(page), page); -+ -+ if (gen < 0) -+ return PageActive(page); -+ -+ if (lruvec) { -+ VM_BUG_ON_PAGE(PageUnevictable(page), page); -+ VM_BUG_ON_PAGE(PageActive(page), page); -+ lockdep_assert_held(&lruvec->lru_lock); -+ -+ return lru_gen_is_active(lruvec, gen); -+ } -+ -+ rcu_read_lock(); -+ -+ memcg = page_memcg_rcu(page); -+ lruvec = mem_cgroup_lruvec(memcg, page_pgdat(page)); -+ active = lru_gen_is_active(lruvec, gen); -+ -+ rcu_read_unlock(); -+ -+ return active; -+} -+ -+/* Activate a page from page cache or swap cache after it's mapped. */ -+static inline void lru_gen_activate_page(struct page *page, struct vm_area_struct *vma) -+{ -+ if (!lru_gen_enabled() || PageActive(page)) -+ return; -+ -+ if (vma->vm_flags & (VM_LOCKED | VM_SPECIAL | VM_HUGETLB)) -+ return; -+ -+ activate_page(page); -+} -+ - /* Update multigenerational lru sizes in addition to active/inactive lru sizes. */ - static inline void lru_gen_update_size(struct page *page, struct lruvec *lruvec, - int old_gen, int new_gen) -@@ -252,6 +295,15 @@ static inline bool lru_gen_enabled(void) - return false; - } - -+static inline bool page_is_active(struct page *page, struct lruvec *lruvec) -+{ -+ return PageActive(page); -+} -+ -+static inline void lru_gen_activate_page(struct page *page, struct vm_area_struct *vma) -+{ -+} -+ - static inline bool page_set_lru_gen(struct page *page, struct lruvec *lruvec, bool front) - { - return false; -diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h -index 173083bb846e..99156602cd06 100644 ---- a/include/linux/mmzone.h -+++ b/include/linux/mmzone.h -@@ -292,6 +292,7 @@ enum lruvec_flags { - }; - - struct lruvec; -+struct page_vma_mapped_walk; - - #define LRU_GEN_MASK ((BIT(LRU_GEN_WIDTH) - 1) << LRU_GEN_PGOFF) - -@@ -328,6 +329,7 @@ struct lru_gen { - - void lru_gen_init_lruvec(struct lruvec *lruvec); - void lru_gen_set_state(bool enable, bool main, bool swap); -+void lru_gen_scan_around(struct page_vma_mapped_walk *pvmw); - - #else /* CONFIG_LRU_GEN */ - -@@ -339,6 +341,10 @@ static inline void lru_gen_set_state(bool enable, bool main, bool swap) - { - } - -+static inline void lru_gen_scan_around(struct page_vma_mapped_walk *pvmw) -+{ -+} -+ - #endif /* CONFIG_LRU_GEN */ - - struct lruvec { -diff --git a/include/linux/swap.h b/include/linux/swap.h -index de2bbbf181ba..0e7532c7db22 100644 ---- a/include/linux/swap.h -+++ b/include/linux/swap.h -@@ -350,8 +350,8 @@ extern void deactivate_page(struct page *page); - extern void mark_page_lazyfree(struct page *page); - extern void swap_setup(void); - --extern void lru_cache_add_inactive_or_unevictable(struct page *page, -- struct vm_area_struct *vma); -+extern void lru_cache_add_page_vma(struct page *page, struct vm_area_struct *vma, -+ bool faulting); - - /* linux/mm/vmscan.c */ - extern unsigned long zone_reclaimable_pages(struct zone *zone); -diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c -index 6addc9780319..4e93e5602723 100644 ---- a/kernel/events/uprobes.c -+++ b/kernel/events/uprobes.c -@@ -184,7 +184,7 @@ static int __replace_page(struct vm_area_struct *vma, unsigned long addr, - if (new_page) { - get_page(new_page); - page_add_new_anon_rmap(new_page, vma, addr, false); -- lru_cache_add_inactive_or_unevictable(new_page, vma); -+ lru_cache_add_page_vma(new_page, vma, false); - } else - /* no new page, just dec_mm_counter for old_page */ - dec_mm_counter(mm, MM_ANONPAGES); -diff --git a/mm/huge_memory.c b/mm/huge_memory.c -index be9bf681313c..62e14da5264e 100644 ---- a/mm/huge_memory.c -+++ b/mm/huge_memory.c -@@ -637,7 +637,7 @@ static vm_fault_t __do_huge_pmd_anonymous_page(struct vm_fault *vmf, - entry = mk_huge_pmd(page, vma->vm_page_prot); - entry = maybe_pmd_mkwrite(pmd_mkdirty(entry), vma); - page_add_new_anon_rmap(page, vma, haddr, true); -- lru_cache_add_inactive_or_unevictable(page, vma); -+ lru_cache_add_page_vma(page, vma, true); - pgtable_trans_huge_deposit(vma->vm_mm, vmf->pmd, pgtable); - set_pmd_at(vma->vm_mm, haddr, vmf->pmd, entry); - update_mmu_cache_pmd(vma, vmf->address, vmf->pmd); -diff --git a/mm/khugepaged.c b/mm/khugepaged.c -index a7d6cb912b05..08a43910f232 100644 ---- a/mm/khugepaged.c -+++ b/mm/khugepaged.c -@@ -1199,7 +1199,7 @@ static void collapse_huge_page(struct mm_struct *mm, - spin_lock(pmd_ptl); - BUG_ON(!pmd_none(*pmd)); - page_add_new_anon_rmap(new_page, vma, address, true); -- lru_cache_add_inactive_or_unevictable(new_page, vma); -+ lru_cache_add_page_vma(new_page, vma, true); - pgtable_trans_huge_deposit(mm, pmd, pgtable); - set_pmd_at(mm, address, pmd, _pmd); - update_mmu_cache_pmd(vma, address, pmd); -diff --git a/mm/memory.c b/mm/memory.c -index c8e357627318..7188607bddb9 100644 ---- a/mm/memory.c -+++ b/mm/memory.c -@@ -73,6 +73,7 @@ - #include - #include - #include -+#include - - #include - -@@ -845,7 +846,7 @@ copy_present_page(struct vm_area_struct *dst_vma, struct vm_area_struct *src_vma - copy_user_highpage(new_page, page, addr, src_vma); - __SetPageUptodate(new_page); - page_add_new_anon_rmap(new_page, dst_vma, addr, false); -- lru_cache_add_inactive_or_unevictable(new_page, dst_vma); -+ lru_cache_add_page_vma(new_page, dst_vma, false); - rss[mm_counter(new_page)]++; - - /* All done, just insert the new page copy in the child */ -@@ -2913,7 +2914,7 @@ static vm_fault_t wp_page_copy(struct vm_fault *vmf) - */ - ptep_clear_flush_notify(vma, vmf->address, vmf->pte); - page_add_new_anon_rmap(new_page, vma, vmf->address, false); -- lru_cache_add_inactive_or_unevictable(new_page, vma); -+ lru_cache_add_page_vma(new_page, vma, true); - /* - * We call the notify macro here because, when using secondary - * mmu page tables (such as kvm shadow page tables), we want the -@@ -3436,9 +3437,10 @@ vm_fault_t do_swap_page(struct vm_fault *vmf) - /* ksm created a completely new copy */ - if (unlikely(page != swapcache && swapcache)) { - page_add_new_anon_rmap(page, vma, vmf->address, false); -- lru_cache_add_inactive_or_unevictable(page, vma); -+ lru_cache_add_page_vma(page, vma, true); - } else { - do_page_add_anon_rmap(page, vma, vmf->address, exclusive); -+ lru_gen_activate_page(page, vma); - } - - swap_free(entry); -@@ -3582,7 +3584,7 @@ static vm_fault_t do_anonymous_page(struct vm_fault *vmf) - - inc_mm_counter_fast(vma->vm_mm, MM_ANONPAGES); - page_add_new_anon_rmap(page, vma, vmf->address, false); -- lru_cache_add_inactive_or_unevictable(page, vma); -+ lru_cache_add_page_vma(page, vma, true); - setpte: - set_pte_at(vma->vm_mm, vmf->address, vmf->pte, entry); - -@@ -3707,6 +3709,7 @@ vm_fault_t do_set_pmd(struct vm_fault *vmf, struct page *page) - - add_mm_counter(vma->vm_mm, mm_counter_file(page), HPAGE_PMD_NR); - page_add_file_rmap(page, true); -+ lru_gen_activate_page(page, vma); - /* - * deposit and withdraw with pmd lock held - */ -@@ -3750,10 +3753,11 @@ void do_set_pte(struct vm_fault *vmf, struct page *page, unsigned long addr) - if (write && !(vma->vm_flags & VM_SHARED)) { - inc_mm_counter_fast(vma->vm_mm, MM_ANONPAGES); - page_add_new_anon_rmap(page, vma, addr, false); -- lru_cache_add_inactive_or_unevictable(page, vma); -+ lru_cache_add_page_vma(page, vma, true); - } else { - inc_mm_counter_fast(vma->vm_mm, mm_counter_file(page)); - page_add_file_rmap(page, false); -+ lru_gen_activate_page(page, vma); - } - set_pte_at(vma->vm_mm, addr, vmf->pte, entry); - } -diff --git a/mm/migrate.c b/mm/migrate.c -index 62b81d5257aa..1064b03cac33 100644 ---- a/mm/migrate.c -+++ b/mm/migrate.c -@@ -3004,7 +3004,7 @@ static void migrate_vma_insert_page(struct migrate_vma *migrate, - inc_mm_counter(mm, MM_ANONPAGES); - page_add_new_anon_rmap(page, vma, addr, false); - if (!is_zone_device_page(page)) -- lru_cache_add_inactive_or_unevictable(page, vma); -+ lru_cache_add_page_vma(page, vma, false); - get_page(page); - - if (flush) { -diff --git a/mm/rmap.c b/mm/rmap.c -index b0fc27e77d6d..a44f9ee74ee1 100644 ---- a/mm/rmap.c -+++ b/mm/rmap.c -@@ -72,6 +72,7 @@ - #include - #include - #include -+#include - - #include - -@@ -792,6 +793,11 @@ static bool page_referenced_one(struct page *page, struct vm_area_struct *vma, - } - - if (pvmw.pte) { -+ /* multigenerational lru exploits spatial locality */ -+ if (lru_gen_enabled() && pte_young(*pvmw.pte)) { -+ lru_gen_scan_around(&pvmw); -+ referenced++; -+ } - if (ptep_clear_flush_young_notify(vma, address, - pvmw.pte)) { - /* -diff --git a/mm/swap.c b/mm/swap.c -index bd10efe00684..7aa85004b490 100644 ---- a/mm/swap.c -+++ b/mm/swap.c -@@ -310,7 +310,7 @@ void lru_note_cost_page(struct page *page) - - static void __activate_page(struct page *page, struct lruvec *lruvec) - { -- if (!PageActive(page) && !PageUnevictable(page)) { -+ if (!PageUnevictable(page) && !page_is_active(page, lruvec)) { - int nr_pages = thp_nr_pages(page); - - del_page_from_lru_list(page, lruvec); -@@ -341,7 +341,7 @@ static bool need_activate_page_drain(int cpu) - static void activate_page_on_lru(struct page *page) - { - page = compound_head(page); -- if (PageLRU(page) && !PageActive(page) && !PageUnevictable(page)) { -+ if (PageLRU(page) && !PageUnevictable(page) && !page_is_active(page, NULL)) { - struct pagevec *pvec; - - local_lock(&lru_pvecs.lock); -@@ -435,7 +435,7 @@ void mark_page_accessed(struct page *page) - * this list is never rotated or maintained, so marking an - * evictable page accessed has no effect. - */ -- } else if (!PageActive(page)) { -+ } else if (!page_is_active(page, NULL)) { - activate_page(page); - ClearPageReferenced(page); - workingset_activation(page); -@@ -471,15 +471,14 @@ void lru_cache_add(struct page *page) - EXPORT_SYMBOL(lru_cache_add); - - /** -- * lru_cache_add_inactive_or_unevictable -+ * lru_cache_add_page_vma - * @page: the page to be added to LRU - * @vma: vma in which page is mapped for determining reclaimability - * -- * Place @page on the inactive or unevictable LRU list, depending on its -- * evictability. -+ * Place @page on an LRU list, depending on its evictability. - */ --void lru_cache_add_inactive_or_unevictable(struct page *page, -- struct vm_area_struct *vma) -+void lru_cache_add_page_vma(struct page *page, struct vm_area_struct *vma, -+ bool faulting) - { - bool unevictable; - -@@ -496,6 +495,11 @@ void lru_cache_add_inactive_or_unevictable(struct page *page, - __mod_zone_page_state(page_zone(page), NR_MLOCK, nr_pages); - count_vm_events(UNEVICTABLE_PGMLOCKED, nr_pages); - } -+ -+ /* multigenerational lru uses PageActive() to track page faults */ -+ if (lru_gen_enabled() && !unevictable && faulting) -+ SetPageActive(page); -+ - lru_cache_add(page); - } - -@@ -522,7 +526,7 @@ void lru_cache_add_inactive_or_unevictable(struct page *page, - */ - static void lru_deactivate_file_fn(struct page *page, struct lruvec *lruvec) - { -- bool active = PageActive(page); -+ bool active = page_is_active(page, lruvec); - int nr_pages = thp_nr_pages(page); - - if (PageUnevictable(page)) -@@ -562,7 +566,7 @@ static void lru_deactivate_file_fn(struct page *page, struct lruvec *lruvec) - - static void lru_deactivate_fn(struct page *page, struct lruvec *lruvec) - { -- if (PageActive(page) && !PageUnevictable(page)) { -+ if (!PageUnevictable(page) && page_is_active(page, lruvec)) { - int nr_pages = thp_nr_pages(page); - - del_page_from_lru_list(page, lruvec); -@@ -676,7 +680,7 @@ void deactivate_file_page(struct page *page) - */ - void deactivate_page(struct page *page) - { -- if (PageLRU(page) && PageActive(page) && !PageUnevictable(page)) { -+ if (PageLRU(page) && !PageUnevictable(page) && page_is_active(page, NULL)) { - struct pagevec *pvec; - - local_lock(&lru_pvecs.lock); -diff --git a/mm/swapfile.c b/mm/swapfile.c -index fe03cfeaa08f..c0956b3bde03 100644 ---- a/mm/swapfile.c -+++ b/mm/swapfile.c -@@ -1936,7 +1936,7 @@ static int unuse_pte(struct vm_area_struct *vma, pmd_t *pmd, - page_add_anon_rmap(page, vma, addr, false); - } else { /* ksm created a completely new copy */ - page_add_new_anon_rmap(page, vma, addr, false); -- lru_cache_add_inactive_or_unevictable(page, vma); -+ lru_cache_add_page_vma(page, vma, false); - } - swap_free(entry); - out: -diff --git a/mm/userfaultfd.c b/mm/userfaultfd.c -index 9a3d451402d7..e1d4cd3103b8 100644 ---- a/mm/userfaultfd.c -+++ b/mm/userfaultfd.c -@@ -123,7 +123,7 @@ static int mcopy_atomic_pte(struct mm_struct *dst_mm, - - inc_mm_counter(dst_mm, MM_ANONPAGES); - page_add_new_anon_rmap(page, dst_vma, dst_addr, false); -- lru_cache_add_inactive_or_unevictable(page, dst_vma); -+ lru_cache_add_page_vma(page, dst_vma, true); - - set_pte_at(dst_mm, dst_addr, dst_pte, _dst_pte); - -diff --git a/mm/vmscan.c b/mm/vmscan.c -index fd49a9a5d7f5..ce868d89dc53 100644 ---- a/mm/vmscan.c -+++ b/mm/vmscan.c -@@ -1876,7 +1876,7 @@ static unsigned noinline_for_stack move_pages_to_lru(struct lruvec *lruvec, - add_page_to_lru_list(page, lruvec); - nr_pages = thp_nr_pages(page); - nr_moved += nr_pages; -- if (PageActive(page)) -+ if (page_is_active(page, lruvec)) - workingset_age_nonresident(lruvec, nr_pages); - } - -@@ -4688,6 +4688,57 @@ static int page_update_lru_gen(struct page *page, int new_gen) - return old_gen; - } - -+void lru_gen_scan_around(struct page_vma_mapped_walk *pvmw) -+{ -+ pte_t *pte; -+ unsigned long start, end; -+ int old_gen, new_gen; -+ unsigned long flags; -+ struct lruvec *lruvec; -+ struct mem_cgroup *memcg; -+ struct pglist_data *pgdat = page_pgdat(pvmw->page); -+ -+ lockdep_assert_held(pvmw->ptl); -+ VM_BUG_ON_VMA(pvmw->address < pvmw->vma->vm_start, pvmw->vma); -+ -+ start = max(pvmw->address & PMD_MASK, pvmw->vma->vm_start); -+ end = pmd_addr_end(pvmw->address, pvmw->vma->vm_end); -+ pte = pvmw->pte - ((pvmw->address - start) >> PAGE_SHIFT); -+ -+ memcg = lock_page_memcg(pvmw->page); -+ lruvec = lock_page_lruvec_irqsave(pvmw->page, &flags); -+ -+ new_gen = lru_gen_from_seq(lruvec->evictable.max_seq); -+ -+ for (; start != end; pte++, start += PAGE_SIZE) { -+ struct page *page; -+ unsigned long pfn = pte_pfn(*pte); -+ -+ if (!pte_present(*pte) || !pte_young(*pte) || is_zero_pfn(pfn)) -+ continue; -+ -+ if (pfn < pgdat->node_start_pfn || pfn >= pgdat_end_pfn(pgdat)) -+ continue; -+ -+ page = compound_head(pte_page(*pte)); -+ if (page_to_nid(page) != pgdat->node_id) -+ continue; -+ if (page_memcg_rcu(page) != memcg) -+ continue; -+ /* -+ * We may be holding many locks. So try to finish as fast as -+ * possible and leave the accessed and the dirty bits to page -+ * table walk. -+ */ -+ old_gen = page_update_lru_gen(page, new_gen); -+ if (old_gen >= 0 && old_gen != new_gen) -+ lru_gen_update_size(page, lruvec, old_gen, new_gen); -+ } -+ -+ unlock_page_lruvec_irqrestore(lruvec, flags); -+ unlock_page_memcg(pvmw->page); -+} -+ - struct mm_walk_args { - struct mem_cgroup *memcg; - unsigned long max_seq; --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-12-14-mm-multigenerational-lru-user-space-interface.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-12-14-mm-multigenerational-lru-user-space-interface.patch deleted file mode 100644 index cbef628..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-12-14-mm-multigenerational-lru-user-space-interface.patch +++ /dev/null @@ -1,492 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 29E96C4321A - for ; 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- Fri, 12 Mar 2021 23:58:12 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:45 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-13-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 12/14] mm: multigenerational lru: user space interface -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Add a sysfs file /sys/kernel/mm/lru_gen/enabled so user space can -enable and disable multigenerational lru at runtime. - -Add a sysfs file /sys/kernel/mm/lru_gen/spread so user space can -spread pages out across multiple generations. More generations make -the background aging more aggressive. - -Add a debugfs file /sys/kernel/debug/lru_gen so user space can monitor -multigenerational lru and trigger the aging and the eviction. This -file has the following output: - memcg memcg_id memcg_path - node node_id - min_gen birth_time anon_size file_size - ... - max_gen birth_time anon_size file_size - -Given a memcg and a node, "min_gen" is the oldest generation (number) -and "max_gen" is the youngest. Birth time is in milliseconds. Anon and -file sizes are in pages. - -Write "+ memcg_id node_id gen [swappiness]" to this file to account -referenced pages to generation "max_gen" and create next generation -"max_gen"+1. "gen" must be equal to "max_gen" in order to avoid races. -A swap file and a non-zero swappiness value are required to scan anon -pages. If swapping is not desired, set vm.swappiness to 0 and -overwrite it with a non-zero "swappiness". - -Write "- memcg_id node_id gen [swappiness] [nr_to_reclaim]" to this -file to evict generations less than or equal to "gen". "gen" must be -less than "max_gen"-1 as "max_gen" and "max_gen"-1 are active -generations and therefore protected from the eviction. "nr_to_reclaim" -can be used to limit the number of pages to be evicted. - -Multiple command lines are supported, so does concatenation with -delimiters "," and ";". - -Signed-off-by: Yu Zhao ---- - mm/vmscan.c | 334 ++++++++++++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 334 insertions(+) - -diff --git a/mm/vmscan.c b/mm/vmscan.c -index ce868d89dc53..b59b556e9587 100644 ---- a/mm/vmscan.c -+++ b/mm/vmscan.c -@@ -51,6 +51,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -5833,6 +5834,334 @@ lru_gen_online_mem(struct notifier_block *self, unsigned long action, void *arg) - return NOTIFY_DONE; - } - -+/****************************************************************************** -+ * sysfs interface -+ ******************************************************************************/ -+ -+static ssize_t show_lru_gen_spread(struct kobject *kobj, struct kobj_attribute *attr, -+ char *buf) -+{ -+ return sprintf(buf, "%d\n", READ_ONCE(lru_gen_spread)); -+} -+ -+static ssize_t store_lru_gen_spread(struct kobject *kobj, struct kobj_attribute *attr, -+ const char *buf, size_t len) -+{ -+ int spread; -+ -+ if (kstrtoint(buf, 10, &spread) || spread >= MAX_NR_GENS) -+ return -EINVAL; -+ -+ WRITE_ONCE(lru_gen_spread, spread); -+ -+ return len; -+} -+ -+static struct kobj_attribute lru_gen_spread_attr = __ATTR( -+ spread, 0644, -+ show_lru_gen_spread, store_lru_gen_spread -+); -+ -+static ssize_t show_lru_gen_enabled(struct kobject *kobj, struct kobj_attribute *attr, -+ char *buf) -+{ -+ return snprintf(buf, PAGE_SIZE, "%ld\n", lru_gen_enabled()); -+} -+ -+static ssize_t store_lru_gen_enabled(struct kobject *kobj, struct kobj_attribute *attr, -+ const char *buf, size_t len) -+{ -+ int enable; -+ -+ if (kstrtoint(buf, 10, &enable)) -+ return -EINVAL; -+ -+ lru_gen_set_state(enable, true, false); -+ -+ return len; -+} -+ -+static struct kobj_attribute lru_gen_enabled_attr = __ATTR( -+ enabled, 0644, show_lru_gen_enabled, store_lru_gen_enabled -+); -+ -+static struct attribute *lru_gen_attrs[] = { -+ &lru_gen_spread_attr.attr, -+ &lru_gen_enabled_attr.attr, -+ NULL -+}; -+ -+static struct attribute_group lru_gen_attr_group = { -+ .name = "lru_gen", -+ .attrs = lru_gen_attrs, -+}; -+ -+/****************************************************************************** -+ * debugfs interface -+ ******************************************************************************/ -+ -+static void *lru_gen_seq_start(struct seq_file *m, loff_t *pos) -+{ -+ struct mem_cgroup *memcg; -+ loff_t nr_to_skip = *pos; -+ -+ m->private = kzalloc(PATH_MAX, GFP_KERNEL); -+ if (!m->private) -+ return ERR_PTR(-ENOMEM); -+ -+ memcg = mem_cgroup_iter(NULL, NULL, NULL); -+ do { -+ int nid; -+ -+ for_each_node_state(nid, N_MEMORY) { -+ if (!nr_to_skip--) -+ return mem_cgroup_lruvec(memcg, NODE_DATA(nid)); -+ } -+ } while ((memcg = mem_cgroup_iter(NULL, memcg, NULL))); -+ -+ return NULL; -+} -+ -+static void lru_gen_seq_stop(struct seq_file *m, void *v) -+{ -+ if (!IS_ERR_OR_NULL(v)) -+ mem_cgroup_iter_break(NULL, lruvec_memcg(v)); -+ -+ kfree(m->private); -+ m->private = NULL; -+} -+ -+static void *lru_gen_seq_next(struct seq_file *m, void *v, loff_t *pos) -+{ -+ int nid = lruvec_pgdat(v)->node_id; -+ struct mem_cgroup *memcg = lruvec_memcg(v); -+ -+ ++*pos; -+ -+ nid = next_memory_node(nid); -+ if (nid == MAX_NUMNODES) { -+ memcg = mem_cgroup_iter(NULL, memcg, NULL); -+ if (!memcg) -+ return NULL; -+ -+ nid = first_memory_node; -+ } -+ -+ return mem_cgroup_lruvec(memcg, NODE_DATA(nid)); -+} -+ -+static int lru_gen_seq_show(struct seq_file *m, void *v) -+{ -+ unsigned long seq; -+ struct lruvec *lruvec = v; -+ int nid = lruvec_pgdat(lruvec)->node_id; -+ struct mem_cgroup *memcg = lruvec_memcg(lruvec); -+ DEFINE_MAX_SEQ(lruvec); -+ DEFINE_MIN_SEQ(lruvec); -+ -+ if (nid == first_memory_node) { -+#ifdef CONFIG_MEMCG -+ if (memcg) -+ cgroup_path(memcg->css.cgroup, m->private, PATH_MAX); -+#endif -+ seq_printf(m, "memcg %5hu %s\n", -+ mem_cgroup_id(memcg), (char *)m->private); -+ } -+ -+ seq_printf(m, " node %4d\n", nid); -+ -+ for (seq = min(min_seq[0], min_seq[1]); seq <= max_seq; seq++) { -+ int gen, file, zone; -+ unsigned int msecs; -+ long sizes[ANON_AND_FILE] = {}; -+ -+ gen = lru_gen_from_seq(seq); -+ -+ msecs = jiffies_to_msecs(jiffies - READ_ONCE( -+ lruvec->evictable.timestamps[gen])); -+ -+ for_each_type_zone(file, zone) -+ sizes[file] += READ_ONCE( -+ lruvec->evictable.sizes[gen][file][zone]); -+ -+ sizes[0] = max(sizes[0], 0L); -+ sizes[1] = max(sizes[1], 0L); -+ -+ seq_printf(m, "%11lu %9u %9lu %9lu\n", -+ seq, msecs, sizes[0], sizes[1]); -+ } -+ -+ return 0; -+} -+ -+static const struct seq_operations lru_gen_seq_ops = { -+ .start = lru_gen_seq_start, -+ .stop = lru_gen_seq_stop, -+ .next = lru_gen_seq_next, -+ .show = lru_gen_seq_show, -+}; -+ -+static int lru_gen_debugfs_open(struct inode *inode, struct file *file) -+{ -+ return seq_open(file, &lru_gen_seq_ops); -+} -+ -+static int advance_max_seq(struct lruvec *lruvec, unsigned long seq, int swappiness) -+{ -+ struct scan_control sc = { -+ .target_mem_cgroup = lruvec_memcg(lruvec), -+ }; -+ DEFINE_MAX_SEQ(lruvec); -+ -+ if (seq == max_seq) -+ walk_mm_list(lruvec, max_seq, &sc, swappiness); -+ -+ return seq > max_seq ? -EINVAL : 0; -+} -+ -+static int advance_min_seq(struct lruvec *lruvec, unsigned long seq, int swappiness, -+ unsigned long nr_to_reclaim) -+{ -+ struct blk_plug plug; -+ int err = -EINTR; -+ long nr_to_scan = LONG_MAX; -+ struct scan_control sc = { -+ .nr_to_reclaim = nr_to_reclaim, -+ .target_mem_cgroup = lruvec_memcg(lruvec), -+ .may_writepage = 1, -+ .may_unmap = 1, -+ .may_swap = 1, -+ .reclaim_idx = MAX_NR_ZONES - 1, -+ .gfp_mask = GFP_KERNEL, -+ }; -+ DEFINE_MAX_SEQ(lruvec); -+ -+ if (seq >= max_seq - 1) -+ return -EINVAL; -+ -+ blk_start_plug(&plug); -+ -+ while (!signal_pending(current)) { -+ DEFINE_MIN_SEQ(lruvec); -+ -+ if (seq < min(min_seq[!swappiness], min_seq[swappiness < 200]) || -+ !evict_lru_gen_pages(lruvec, &sc, swappiness, &nr_to_scan)) { -+ err = 0; -+ break; -+ } -+ -+ cond_resched(); -+ } -+ -+ blk_finish_plug(&plug); -+ -+ return err; -+} -+ -+static int advance_seq(char cmd, int memcg_id, int nid, unsigned long seq, -+ int swappiness, unsigned long nr_to_reclaim) -+{ -+ struct lruvec *lruvec; -+ int err = -EINVAL; -+ struct mem_cgroup *memcg = NULL; -+ -+ if (!mem_cgroup_disabled()) { -+ rcu_read_lock(); -+ memcg = mem_cgroup_from_id(memcg_id); -+#ifdef CONFIG_MEMCG -+ if (memcg && !css_tryget(&memcg->css)) -+ memcg = NULL; -+#endif -+ rcu_read_unlock(); -+ -+ if (!memcg) -+ goto done; -+ } -+ if (memcg_id != mem_cgroup_id(memcg)) -+ goto done; -+ -+ if (nid < 0 || nid >= MAX_NUMNODES || !node_state(nid, N_MEMORY)) -+ goto done; -+ -+ lruvec = mem_cgroup_lruvec(memcg, NODE_DATA(nid)); -+ -+ if (swappiness == -1) -+ swappiness = get_swappiness(lruvec); -+ else if (swappiness > 200U) -+ goto done; -+ -+ switch (cmd) { -+ case '+': -+ err = advance_max_seq(lruvec, seq, swappiness); -+ break; -+ case '-': -+ err = advance_min_seq(lruvec, seq, swappiness, nr_to_reclaim); -+ break; -+ } -+done: -+ mem_cgroup_put(memcg); -+ -+ return err; -+} -+ -+static ssize_t lru_gen_debugfs_write(struct file *file, const char __user *src, -+ size_t len, loff_t *pos) -+{ -+ void *buf; -+ char *cur, *next; -+ int err = 0; -+ -+ buf = kvmalloc(len + 1, GFP_USER); -+ if (!buf) -+ return -ENOMEM; -+ -+ if (copy_from_user(buf, src, len)) { -+ kvfree(buf); -+ return -EFAULT; -+ } -+ -+ next = buf; -+ next[len] = '\0'; -+ -+ while ((cur = strsep(&next, ",;\n"))) { -+ int n; -+ int end; -+ char cmd; -+ int memcg_id; -+ int nid; -+ unsigned long seq; -+ int swappiness = -1; -+ unsigned long nr_to_reclaim = -1; -+ -+ cur = skip_spaces(cur); -+ if (!*cur) -+ continue; -+ -+ n = sscanf(cur, "%c %u %u %lu %n %u %n %lu %n", &cmd, &memcg_id, &nid, -+ &seq, &end, &swappiness, &end, &nr_to_reclaim, &end); -+ if (n < 4 || cur[end]) { -+ err = -EINVAL; -+ break; -+ } -+ -+ err = advance_seq(cmd, memcg_id, nid, seq, swappiness, nr_to_reclaim); -+ if (err) -+ break; -+ } -+ -+ kvfree(buf); -+ -+ return err ? : len; -+} -+ -+static const struct file_operations lru_gen_debugfs_ops = { -+ .open = lru_gen_debugfs_open, -+ .read = seq_read, -+ .write = lru_gen_debugfs_write, -+ .llseek = seq_lseek, -+ .release = seq_release, -+}; -+ - /****************************************************************************** - * initialization - ******************************************************************************/ -@@ -5873,6 +6202,11 @@ static int __init init_lru_gen(void) - if (hotplug_memory_notifier(lru_gen_online_mem, 0)) - pr_err("lru_gen: failed to subscribe hotplug notifications\n"); - -+ if (sysfs_create_group(mm_kobj, &lru_gen_attr_group)) -+ pr_err("lru_gen: failed to create sysfs group\n"); -+ -+ debugfs_create_file("lru_gen", 0644, NULL, NULL, &lru_gen_debugfs_ops); -+ - return 0; - }; - /* --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-13-14-mm-multigenerational-lru-Kconfig.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-13-14-mm-multigenerational-lru-Kconfig.patch deleted file mode 100644 index 9918793..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-13-14-mm-multigenerational-lru-Kconfig.patch +++ /dev/null @@ -1,137 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 9E997C43619 - for ; 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Fri, 12 Mar 2021 23:58:13 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:46 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-14-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 13/14] mm: multigenerational lru: Kconfig -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Add configuration options for multigenerational lru. - -Signed-off-by: Yu Zhao ---- - mm/Kconfig | 29 +++++++++++++++++++++++++++++ - 1 file changed, 29 insertions(+) - -diff --git a/mm/Kconfig b/mm/Kconfig -index 24c045b24b95..3a5bcc2d7a45 100644 ---- a/mm/Kconfig -+++ b/mm/Kconfig -@@ -872,4 +872,33 @@ config MAPPING_DIRTY_HELPERS - config KMAP_LOCAL - bool - -+config LRU_GEN -+ bool "Multigenerational LRU" -+ depends on MMU -+ help -+ High performance multigenerational LRU to heavily overcommit workloads -+ that are not IO bound. See Documentation/vm/multigen_lru.rst for -+ details. -+ -+ Warning: do not enable this option unless you plan to use it because -+ it introduces a small per-process memory overhead. -+ -+config NR_LRU_GENS -+ int "Max number of generations" -+ depends on LRU_GEN -+ range 4 63 -+ default 7 -+ help -+ This will use ilog2(N)+1 spare bits from page flags. -+ -+ Warning: do not use numbers larger than necessary because each -+ generation introduces a small per-node and per-memcg memory overhead. -+ -+config LRU_GEN_ENABLED -+ bool "Turn on by default" -+ depends on LRU_GEN -+ help -+ The default value of /sys/kernel/mm/lru_gen/enabled is 0. This option -+ changes it to 1. -+ - endmenu --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/PATCH-v1-14-14-mm-multigenerational-lru-documentation.patch b/sys-kernel/pinephone-sources/files/PATCH-v1-14-14-mm-multigenerational-lru-documentation.patch deleted file mode 100644 index ead4652..0000000 --- a/sys-kernel/pinephone-sources/files/PATCH-v1-14-14-mm-multigenerational-lru-documentation.patch +++ /dev/null @@ -1,329 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-26.3 required=3.0 tests=BAYES_00,DKIMWL_WL_MED, - DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, - INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, - USER_AGENT_GIT,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no - version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 99A73C4360C - for ; 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- Fri, 12 Mar 2021 23:58:15 -0800 (PST) -Date: Sat, 13 Mar 2021 00:57:47 -0700 -In-Reply-To: <20210313075747.3781593-1-yuzhao@google.com> -Message-Id: <20210313075747.3781593-15-yuzhao@google.com> -Mime-Version: 1.0 -References: <20210313075747.3781593-1-yuzhao@google.com> -X-Mailer: git-send-email 2.31.0.rc2.261.g7f71774620-goog -Subject: [PATCH v1 14/14] mm: multigenerational lru: documentation -From: Yu Zhao -To: linux-mm@kvack.org -Cc: Alex Shi , - Andrew Morton , - Dave Hansen , - Hillf Danton , - Johannes Weiner , - Joonsoo Kim , - Matthew Wilcox , - Mel Gorman , Michal Hocko , - Roman Gushchin , Vlastimil Babka , - Wei Yang , - Yang Shi , - Ying Huang , - linux-kernel@vger.kernel.org, page-reclaim@google.com, - Yu Zhao -Content-Type: text/plain; charset="UTF-8" -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org -Archived-At: -List-Archive: -List-Post: - -Add Documentation/vm/multigen_lru.rst. - -Signed-off-by: Yu Zhao ---- - Documentation/vm/index.rst | 1 + - Documentation/vm/multigen_lru.rst | 210 ++++++++++++++++++++++++++++++ - 2 files changed, 211 insertions(+) - create mode 100644 Documentation/vm/multigen_lru.rst - -diff --git a/Documentation/vm/index.rst b/Documentation/vm/index.rst -index eff5fbd492d0..c353b3f55924 100644 ---- a/Documentation/vm/index.rst -+++ b/Documentation/vm/index.rst -@@ -17,6 +17,7 @@ various features of the Linux memory management - - swap_numa - zswap -+ multigen_lru - - Kernel developers MM documentation - ================================== -diff --git a/Documentation/vm/multigen_lru.rst b/Documentation/vm/multigen_lru.rst -new file mode 100644 -index 000000000000..fea927da2572 ---- /dev/null -+++ b/Documentation/vm/multigen_lru.rst -@@ -0,0 +1,210 @@ -+===================== -+Multigenerational LRU -+===================== -+ -+Quick Start -+=========== -+Build Options -+------------- -+:Required: Set ``CONFIG_LRU_GEN=y``. -+ -+:Optional: Change ``CONFIG_NR_LRU_GENS`` to a number ``X`` to support -+ a maximum of ``X`` generations. -+ -+:Optional: Set ``CONFIG_LRU_GEN_ENABLED=y`` to turn the feature on by -+ default. -+ -+Runtime Options -+--------------- -+:Required: Write ``1`` to ``/sys/kernel/mm/lru_gen/enable`` if the -+ feature was not turned on by default. -+ -+:Optional: Change ``/sys/kernel/mm/lru_gen/spread`` to a number ``N`` -+ to spread pages out across ``N+1`` generations. ``N`` must be less -+ than ``X``. Larger values make the background aging more aggressive. -+ -+:Optional: Read ``/sys/kernel/debug/lru_gen`` to verify the feature. -+ This file has the following output: -+ -+:: -+ -+ memcg memcg_id memcg_path -+ node node_id -+ min_gen birth_time anon_size file_size -+ ... -+ max_gen birth_time anon_size file_size -+ -+Given a memcg and a node, ``min_gen`` is the oldest generation -+(number) and ``max_gen`` is the youngest. Birth time is in -+milliseconds. Anon and file sizes are in pages. -+ -+Recipes -+------- -+:Android on ARMv8.1+: ``X=4``, ``N=0`` -+ -+:Android on pre-ARMv8.1 CPUs: Not recommended due to the lack of -+ ``ARM64_HW_AFDBM`` -+ -+:Laptops running Chrome on x86_64: ``X=7``, ``N=2`` -+ -+:Working set estimation: Write ``+ memcg_id node_id gen [swappiness]`` -+ to ``/sys/kernel/debug/lru_gen`` to account referenced pages to -+ generation ``max_gen`` and create the next generation ``max_gen+1``. -+ ``gen`` must be equal to ``max_gen`` in order to avoid races. A swap -+ file and a non-zero swappiness value are required to scan anon pages. -+ If swapping is not desired, set ``vm.swappiness`` to ``0`` and -+ overwrite it with a non-zero ``swappiness``. -+ -+:Proactive reclaim: Write ``- memcg_id node_id gen [swappiness] -+ [nr_to_reclaim]`` to ``/sys/kernel/debug/lru_gen`` to evict -+ generations less than or equal to ``gen``. ``gen`` must be less than -+ ``max_gen-1`` as ``max_gen`` and ``max_gen-1`` are active generations -+ and therefore protected from the eviction. ``nr_to_reclaim`` can be -+ used to limit the number of pages to be evicted. Multiple command -+ lines are supported, so does concatenation with delimiters ``,`` and -+ ``;``. -+ -+Workflow -+======== -+Evictable pages are divided into multiple generations for each -+``lruvec``. The youngest generation number is stored in ``max_seq`` -+for both anon and file types as they are aged on an equal footing. The -+oldest generation numbers are stored in ``min_seq[2]`` separately for -+anon and file types as clean file pages can be evicted regardless of -+swap and write-back constraints. Generation numbers are truncated into -+``ilog2(CONFIG_NR_LRU_GENS)+1`` bits in order to fit into -+``page->flags``. The sliding window technique is used to prevent -+truncated generation numbers from overlapping. Each truncated -+generation number is an index to an array of per-type and per-zone -+lists. Evictable pages are added to the per-zone lists indexed by -+``max_seq`` or ``min_seq[2]`` (modulo ``CONFIG_NR_LRU_GENS``), -+depending on whether they are being faulted in or read ahead. The -+workflow comprises two conceptually independent functions: the aging -+and the eviction. -+ -+Aging -+----- -+The aging produces young generations. Given an ``lruvec``, the aging -+scans page tables for referenced pages of this ``lruvec``. Upon -+finding one, the aging updates its generation number to ``max_seq``. -+After each round of scan, the aging increments ``max_seq``. The aging -+maintains either a system-wide ``mm_struct`` list or per-memcg -+``mm_struct`` lists, and it only scans page tables of processes that -+have been scheduled since the last scan. Since scans are differential -+with respect to referenced pages, the cost is roughly proportional to -+their number. -+ -+Eviction -+-------- -+The eviction consumes old generations. Given an ``lruvec``, the -+eviction scans the pages on the per-zone lists indexed by either of -+``min_seq[2]``. It selects a type according to the values of -+``min_seq[2]`` and swappiness. During a scan, the eviction either -+sorts or isolates a page, depending on whether the aging has updated -+its generation number. When it finds all the per-zone lists are empty, -+the eviction increments ``min_seq[2]`` indexed by this selected type. -+The eviction triggers the aging when both of ``min_seq[2]`` reaches -+``max_seq-1``, assuming both anon and file types are reclaimable. -+ -+Rationale -+========= -+Characteristics of cloud workloads -+---------------------------------- -+With cloud storage gone mainstream, the role of local storage has -+diminished. For most of the systems running cloud workloads, anon -+pages account for the majority of memory consumption and page cache -+contains mostly executable pages. Notably, the portion of the unmapped -+is negligible. -+ -+As a result, swapping is necessary to achieve substantial memory -+overcommit. And the ``rmap`` is the hottest in the reclaim path -+because its usage is proportional to the number of scanned pages, -+which on average is many times the number of reclaimed pages. -+ -+With ``zram``, a typical ``kswapd`` profile on v5.11 looks like: -+ -+:: -+ -+ 31.03% page_vma_mapped_walk -+ 25.59% lzo1x_1_do_compress -+ 4.63% do_raw_spin_lock -+ 3.89% vma_interval_tree_iter_next -+ 3.33% vma_interval_tree_subtree_search -+ -+And with real swap, it looks like: -+ -+:: -+ -+ 45.16% page_vma_mapped_walk -+ 7.61% do_raw_spin_lock -+ 5.69% vma_interval_tree_iter_next -+ 4.91% vma_interval_tree_subtree_search -+ 3.71% page_referenced_one -+ -+Limitations of the Current Implementation -+----------------------------------------- -+Notion of the Active/Inactive -+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -+For servers equipped with hundreds of gigabytes of memory, the -+granularity of the active/inactive is too coarse to be useful for job -+scheduling. And false active/inactive rates are relatively high. -+ -+For phones and laptops, the eviction is biased toward file pages -+because the selection has to resort to heuristics as direct -+comparisons between anon and file types are infeasible. -+ -+For systems with multiple nodes and/or memcgs, it is impossible to -+compare ``lruvec``\s based on the notion of the active/inactive. -+ -+Incremental Scans via the ``rmap`` -+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -+Each incremental scan picks up at where the last scan left off and -+stops after it has found a handful of unreferenced pages. For most of -+the systems running cloud workloads, incremental scans lose the -+advantage under sustained memory pressure due to high ratios of the -+number of scanned pages to the number of reclaimed pages. On top of -+that, the ``rmap`` has poor memory locality due to its complex data -+structures. The combined effects typically result in a high amount of -+CPU usage in the reclaim path. -+ -+Benefits of the Multigenerational LRU -+------------------------------------- -+Notion of Generation Numbers -+~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -+The notion of generation numbers introduces a quantitative approach to -+memory overcommit. A larger number of pages can be spread out across -+configurable generations, and thus they have relatively low false -+active/inactive rates. Each generation includes all pages that have -+been referenced since the last generation. -+ -+Given an ``lruvec``, scans and the selections between anon and file -+types are all based on generation numbers, which are simple and yet -+effective. For different ``lruvec``\s, comparisons are still possible -+based on birth times of generations. -+ -+Differential Scans via Page Tables -+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -+Each differential scan discovers all pages that have been referenced -+since the last scan. Specifically, it walks the ``mm_struct`` list -+associated with an ``lruvec`` to scan page tables of processes that -+have been scheduled since the last scan. The cost of each differential -+scan is roughly proportional to the number of referenced pages it -+discovers. Unless address spaces are extremely sparse, page tables -+usually have better memory locality than the ``rmap``. The end result -+is generally a significant reduction in CPU usage, for most of the -+systems running cloud workloads. -+ -+To-do List -+========== -+KVM Optimization -+---------------- -+Support shadow page table walk. -+ -+NUMA Optimization -+----------------- -+Add per-node RSS for ``should_skip_mm()``. -+ -+Refault Tracking Optimization -+----------------------------- -+Use generation numbers rather than LRU positions in -+``workingset_eviction()`` and ``workingset_refault()``. --- -2.31.0.rc2.261.g7f71774620-goog - - diff --git a/sys-kernel/pinephone-sources/files/all-5.11.4.patch b/sys-kernel/pinephone-sources/files/all-5.11.4.patch deleted file mode 100644 index a3f6f5c..0000000 --- a/sys-kernel/pinephone-sources/files/all-5.11.4.patch +++ /dev/null @@ -1,475856 +0,0 @@ -diff --git a/0001-sunxi-h3-Fix-PLL1-setup-to-never-use-dividers.patch b/0001-sunxi-h3-Fix-PLL1-setup-to-never-use-dividers.patch -new file mode 100644 -index 000000000000..60badbd23528 ---- /dev/null -+++ b/0001-sunxi-h3-Fix-PLL1-setup-to-never-use-dividers.patch -@@ -0,0 +1,33 @@ -+From 7f5071f906f79bdc99d6b4b0ccf0cb280abe740b Mon Sep 17 00:00:00 2001 -+From: Ondrej Jirman -+Date: Tue, 20 Dec 2016 11:25:12 +0100 -+Subject: [PATCH] sunxi: h3: Fix PLL1 setup to never use dividers -+ -+Kernel would lower the divider on first CLK change and cause the -+lock up. -+--- -+ arch/arm/mach-sunxi/clock_sun6i.c | 7 +++---- -+ 1 file changed, 3 insertions(+), 4 deletions(-) -+ -+diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c -+index 50fb302a19..91aa2a0478 100644 -+--- a/arch/arm/mach-sunxi/clock_sun6i.c -++++ b/arch/arm/mach-sunxi/clock_sun6i.c -+@@ -94,11 +94,10 @@ void clock_set_pll1(unsigned int clk) -+ int k = 1; -+ int m = 1; -+ -+- if (clk > 1152000000) { -+- k = 2; -+- } else if (clk > 768000000) { -++ if (clk >= 1368000000) { -+ k = 3; -+- m = 2; -++ } else if (clk >= 768000000) { -++ k = 2; -+ } -+ -+ /* Switch to 24MHz clock while changing PLL1 */ -+-- -+2.11.0 -+ -diff --git a/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml b/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml -index 5ccbb1f81960..b64997875b48 100644 ---- a/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml -+++ b/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml -@@ -54,6 +54,11 @@ properties: - "#io-channel-cells": - const: 1 - -+ x-powers,ts-as-gpadc: -+ description: | -+ Boolean. Defines whether the TS pin should be used -+ as GPADC rather than battery temperature sensor pin. -+ - additionalProperties: false - - examples: -diff --git a/Documentation/devicetree/bindings/input/gpio-vibrator.yaml b/Documentation/devicetree/bindings/input/gpio-vibrator.yaml -index 2384465eaa19..082ac06471db 100644 ---- a/Documentation/devicetree/bindings/input/gpio-vibrator.yaml -+++ b/Documentation/devicetree/bindings/input/gpio-vibrator.yaml -@@ -24,7 +24,12 @@ properties: - - required: - - compatible -- - enable-gpios -+ -+anyOf: -+ - required: -+ - enable-gpios -+ - required: -+ - vcc-supply - - additionalProperties: false - -diff --git a/Documentation/devicetree/bindings/leds/leds-axp20x.yaml b/Documentation/devicetree/bindings/leds/leds-axp20x.yaml -new file mode 100644 -index 000000000000..79282d55764b ---- /dev/null -+++ b/Documentation/devicetree/bindings/leds/leds-axp20x.yaml -@@ -0,0 +1,24 @@ -+# SPDX-License-Identifier: GPL-2.0 -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/leds/leds-axp20x.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: LED driver for AXP813 PMIC from X-Powers. -+ -+maintainers: -+ - Ondrej Jirman -+ -+description: | -+ This module is part of the AXP20x MFD device. For more details -+ see Documentation/devicetree/bindings/mfd/axp20x.txt. -+ -+ The LED controller is represented as a sub-node of the PMIC node on -+ the device tree. -+ -+properties: -+ compatible: -+ const: x-powers,axp813-charger-led -+ -+required: -+ - compatible -diff --git a/Documentation/devicetree/bindings/media/i2c/hm5065.txt b/Documentation/devicetree/bindings/media/i2c/hm5065.txt -new file mode 100644 -index 000000000000..92ba6cac0d2f ---- /dev/null -+++ b/Documentation/devicetree/bindings/media/i2c/hm5065.txt -@@ -0,0 +1,49 @@ -+* Himax HM5065 CSI camera sensor -+ -+Required Properties: -+- compatible: should be "himax,hm5065" -+- reg: I2C device address (0x1f) -+- clocks: reference to the external input clock for the sensor. -+- clock-names: should be "xclk". -+- IOVDD-supply: Digital I/O voltage supply, 2.8 volts -+- AVDD-supply: Analog voltage supply, 2.8 volts -+- DVDD-supply: Digital core voltage supply, 1.8 volts -+- AFVDD-supply: Auto focus voltage supply, 2.8 volts -+ -+Optional Properties (one or both must be configured): -+- reset-gpios: reference to the GPIO connected to the reset pin, if any. -+ This is an active low signal to the HM5065. -+- enable-gpios: reference to the GPIO connected to the CE pin, -+ if any. This is an active high signal to the HM5065. -+ -+The device node must contain one 'port' child node for its digital output -+video port, in accordance with the video interface bindings defined in -+Documentation/devicetree/bindings/media/video-interfaces.txt. -+ -+Example: -+ -+&i2c1 { -+ hm5065: camera@1f { -+ compatible = "himax,hm5065"; -+ reg = <0x1f>; -+ clocks = <&ccu CLK_CSI_MCLK>; -+ clock-names = "xclk"; -+ IOVDD-supply = <®_dldo3>; -+ AVDD-supply = <®_dldo4>; -+ DVDD-supply = <®_eldo3>; -+ AFVDD-supply = <®_dldo3>; -+ reset-gpios = <&pio 4 18 GPIO_ACTIVE_LOW>; /* PE18 */ -+ enable-gpios = <&pio 4 19 GPIO_ACTIVE_HIGH>; /* PE19 */ -+ -+ port { -+ hm5065_ep: endpoint { -+ remote-endpoint = <&csi0_hm5065_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; -+ vsync-active = <1>; -+ data-active = <1>; -+ pclk-sample = <1>; -+ }; -+ }; -+ }; -+}; -diff --git a/Documentation/devicetree/bindings/media/i2c/hm5065.yaml b/Documentation/devicetree/bindings/media/i2c/hm5065.yaml -new file mode 100644 -index 000000000000..6b723b8af6b3 ---- /dev/null -+++ b/Documentation/devicetree/bindings/media/i2c/hm5065.yaml -@@ -0,0 +1,90 @@ -+# SPDX-License-Identifier: GPL-2.0 -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/media/i2c/hm5065.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Himax HM5065 CSI camera sensor -+ -+description: |+ -+ At least one of reset-gpios and enable-gpios must be configured. -+ -+ The device node must contain one 'port' child node for its digital output -+ video port, in accordance with the video interface bindings defined in -+ -+ Documentation/devicetree/bindings/media/video-interfaces.txt. -+ -+maintainers: -+ - Ondrej Jirman -+ -+properties: -+ compatible: -+ const: himax,hm5065 -+ -+ reg: -+ maxItems: 1 -+ -+ reset-gpios: -+ maxItems: 1 -+ description: reference to the GPIO connected to the reset pin, if any. This is an active low signal to the HM5065. -+ -+ enable-gpios: -+ maxItems: 1 -+ description: reference to the GPIO connected to the CE pin, if any. This is an active high signal to the HM5065. -+ -+ IOVDD-supply: -+ description: Digital I/O voltage supply, 2.8 volts -+ -+ AVDD-supply: -+ description: Analog voltage supply, 2.8 volts -+ -+ DVDD-supply: -+ description: Digital core voltage supply, 1.8 volts -+ -+ AFVDD-supply: -+ description: Auto focus voltage supply, 2.8 volts -+ -+ clocks: -+ minItems: 1 -+ maxItems: 1 -+ description: reference to the external input clock for the sensor. -+ -+- clock-names: should be "xclk". -+ -+required: -+ - compatible -+ - reg -+ - clocks -+ - clock-names -+ - IOVDD-supply -+ - AVDD-supply -+ - DVDD-supply -+ - AFVDD-supply -+ -+Example: -+ -+&i2c1 { -+ hm5065: camera@1f { -+ compatible = "himax,hm5065"; -+ reg = <0x1f>; -+ clocks = <&ccu CLK_CSI_MCLK>; -+ clock-names = "xclk"; -+ IOVDD-supply = <®_dldo3>; -+ AVDD-supply = <®_dldo4>; -+ DVDD-supply = <®_eldo3>; -+ AFVDD-supply = <®_dldo3>; -+ reset-gpios = <&pio 4 18 GPIO_ACTIVE_LOW>; /* PE18 */ -+ enable-gpios = <&pio 4 19 GPIO_ACTIVE_HIGH>; /* PE19 */ -+ -+ port { -+ hm5065_ep: endpoint { -+ remote-endpoint = <&csi0_hm5065_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; -+ vsync-active = <1>; -+ data-active = <1>; -+ pclk-sample = <1>; -+ }; -+ }; -+ }; -+}; -diff --git a/Documentation/devicetree/bindings/net/rtl8723bs-bluetooth.txt b/Documentation/devicetree/bindings/net/rtl8723bs-bluetooth.txt -new file mode 100644 -index 000000000000..8357f242ae4c ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/rtl8723bs-bluetooth.txt -@@ -0,0 +1,35 @@ -+RTL8723BS/RTL8723CS Bluetooth -+--------------------- -+ -+RTL8723CS/RTL8723CS is WiFi + BT chip. WiFi part is connected over SDIO, while -+BT is connected over serial. It speaks H5 protocol with few extra commands -+to upload firmware and change module speed. -+ -+Required properties: -+ -+ - compatible: should be one of the following: -+ * "realtek,rtl8723bs-bt" -+ * "realtek,rtl8723cs-bt" -+Optional properties: -+ -+ - device-wake-gpios: GPIO specifier, used to wakeup the BT module (active high) -+ - enable-gpios: GPIO specifier, used to enable the BT module (active high) -+ - host-wake-gpios: GPIO specifier, used to wakeup the host processor (active high) -+ - firmware-postfix: firmware postfix to be used for firmware config -+ - reset-gpios: GPIO specifier, used to reset the BT module (active high) -+ -+Example: -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "realtek,rtl8723bs-bt"; -+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */ -+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ -+ host-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ -+ firmware-postfix="pine64"; -+ }; -+}; -diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml -index 3b764415c9ab..66859eb8f79a 100644 ---- a/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml -+++ b/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml -@@ -21,6 +21,11 @@ properties: - description: - Regulator for the headphone amplifier - -+ allwinner,internal-bias-resistor: -+ description: -+ Enable the internal 2.2K bias resistor between HBIAS and MICDET pins -+ type: boolean -+ - required: - - compatible - - reg -diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml -index 67405e6d8168..1a2590f54b9b 100644 ---- a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml -+++ b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml -@@ -12,7 +12,7 @@ maintainers: - - properties: - "#sound-dai-cells": -- const: 0 -+ const: 1 - - compatible: - oneOf: -diff --git a/MAINTAINERS b/MAINTAINERS -index bfc1b86e3e73..01595eb79075 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -7964,6 +7964,12 @@ W: http://www.highpoint-tech.com - F: Documentation/scsi/hptiop.rst - F: drivers/scsi/hptiop.c - -+HIMAX HM5065 SENSOR DRIVER -+M: Ondrej Jirman -+L: linux-media@vger.kernel.org -+S: Supported -+F: drivers/media/i2c/hm5065.c -+ - HIPPI - M: Jes Sorensen - L: linux-hippi@sunsite.dk -diff --git a/README.md b/README.md -new file mode 100644 -index 000000000000..7b307c3c2c5e ---- /dev/null -+++ b/README.md -@@ -0,0 +1,152 @@ -+Mainline linux kernel for Orange Pi PC/PC2/PC3/One, TBS A711, PinePhone, PocketBook Touch Lux 3 -+----------------------------------------------------------------------------------------------- -+ -+This kernel tree is meant for: -+ -+- Orange Pi One -+- Orange Pi PC -+- Orange Pi PC 2 -+- Orange Pi 3 -+- PinePhone 1.0, 1.1 and 1.2(a/b) -+- TBS A711 Tablet -+- PocketBook Touch Lux 3 -+- Pinebook Pro -+ -+Features in addition to mainline: -+ -+- [Orange Pi One/PC/PC2] More aggressive OPPs for CPU -+- [All] Mark one of DRM planes as a cursor plane, speeding up Xorg based desktop with modesetting driver -+- [Orange Pi One/PC/PC2] Configure on-board micro-switches to perform system power off function -+- [Orange Pi One/PC/PC2/3] HDMI audio -+- [Orange Pi 3] Ethernet -+- [TBS A711] HM5065 (back camera) -+- [PinePhone] WiFi, Bluetooth, Audio, Modem power, HDMI out over USB-C, USB-C support, cameras, PMIC improvements, power management, fixes here and there -+- [PocketBook Touch Lux 3] Display and Touchscreen support -+ -+Pre-built u-boot and kernels are available at https://xff.cz/kernels/ -+ -+You may need some firmware files for some part of the functionality. Those are -+available at: https://megous.com/git/linux-firmware -+ -+If you want to reproduce my pre-built kernels exactly, you'll need to uncomment -+CONFIG_EXTRA_FIRMWARE_DIR and CONFIG_EXTRA_FIRMWARE in the defconfigs, and -+point CONFIG_EXTRA_FIRMWARE_DIR to a directory on your computer where the -+clone of https://megous.com/git/linux-firmware resides. -+ -+You can also leave those two config options commented out, and copy the contents -+of https://megous.com/git/linux-firmware to /lib/firmware/ on the target device. -+ -+You can use this kernel to run a desktop environment on Orange Pi SBCs, -+Arch Linux on your Pinephone, or to have a completely opensource OS on -+a Pocketbook e-ink book reader. -+ -+Have fun! -+ -+ -+Build instructions -+------------------ -+ -+These are rudimentary instructions and you need to understand what you're doing. -+These are just core steps required to build the ATF/u-boot/kernel. Downloading, -+verifying, renaming to correct directories is not described or mentioned. You -+should be able to infer missing necessary steps yourself for your particular needs. -+ -+Get necessary toolchains from: -+ -+- https://releases.linaro.org/components/toolchain/binaries/latest/aarch64-linux-gnu/ for 64bit Orange Pi PC2 and Orange Pi 3, PinePhone -+- https://releases.linaro.org/components/toolchain/binaries/latest/arm-linux-gnueabihf/ for 32bit Orange Pis, Pocketbook, TBS tablet -+ -+Extract toolchains and prepare the environment: -+ -+ CWD=`pwd` -+ OUT=$CWD/builds -+ SRC=$CWD/u-boot -+ export PATH="$PATH:$CWD/Toolchains/arm/bin:$CWD/Toolchains/aarch64/bin" -+ -+For Orange Pi PC2, Orange Pi 3 or PinePhone: -+ -+ export CROSS_COMPILE=aarch64-linux-gnu- -+ export KBUILD_OUTPUT=$OUT/.tmp/uboot-pc2 -+ rm -rf "$KBUILD_OUTPUT" -+ mkdir -p $KBUILD_OUTPUT $OUT/pc2 -+ -+Get and build ATF from https://github.com/ARM-software/arm-trusted-firmware: -+ -+ make -C "$CWD/arm-trusted-firmware" PLAT=sun50i_a64 DEBUG=1 bl31 -+ cp "$CWD/arm-trusted-firmware/build/sun50i_a64/debug/bl31.bin" "$KBUILD_OUTPUT" -+ -+Use sun50i_a64 for Orange Pi PC2 or PinePhone and sun50i_h6 for Orange Pi 3. -+ -+Build u-boot from https://megous.com/git/u-boot/ (opi-v2020.04 branch) with appropriate -+defconfig (orangepi_one_defconfig, orangepi_pc2_defconfig, orangepi_pc_defconfig, orangepi_3_defconfig, tbs_a711_defconfig, pinephone_defconfig). -+ -+My u-boot branch already has all the necessary patches integrated and is configured for quick u-boot/kernel startup. -+ -+ make -C u-boot orangepi_pc2_defconfig -+ make -C u-boot -j5 -+ -+ cp $KBUILD_OUTPUT/.config $OUT/pc2/uboot.config -+ cat $KBUILD_OUTPUT/{spl/sunxi-spl.bin,u-boot.itb} > $OUT/pc2/uboot.bin -+ -+Get kernel from this repository and checkout the latest orange-pi-5.11 branch. -+ -+Build the kernel for 64-bit boards: -+ -+ export ARCH=arm64 -+ export CROSS_COMPILE=aarch64-linux-gnu- -+ export KBUILD_OUTPUT=$OUT/.tmp/linux-arm64 -+ mkdir -p $KBUILD_OUTPUT $OUT/pc2 -+ -+ make -C linux orangepi_defconfig -+ # or make -C linux pocketbook_touch_lux_3_defconfig -+ # or make -C linux tbs_a711_defconfig -+ make -C linux -j5 clean -+ make -C linux -j5 Image dtbs -+ -+ cp -f $KBUILD_OUTPUT/arch/arm64/boot/Image $OUT/pc2/ -+ cp -f $KBUILD_OUTPUT/.config $OUT/pc2/linux.config -+ cp -f $KBUILD_OUTPUT/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dtb $OUT/pc2/board.dtb -+ -+Build the kernel for 32-bit boards: -+ -+ export ARCH=arm -+ export CROSS_COMPILE=arm-linux-gnueabihf- -+ export KBUILD_OUTPUT=$OUT/.tmp/linux-arm -+ mkdir -p $KBUILD_OUTPUT $OUT/pc -+ -+ make orangepi_defconfig -+ # or make pinephone_defconfig -+ make -C linux orangepi_defconfig -+ make -C linux -j5 clean -+ make -C linux -j5 zImage dtbs -+ -+ cp -f $KBUILD_OUTPUT/arch/arm/boot/zImage $OUT/pc/ -+ cp -f $KBUILD_OUTPUT/.config $OUT/pc/linux.config -+ cp -f $KBUILD_OUTPUT/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dtb $OUT/pc/board.dtb -+ # Or use sun8i-h3-orangepi-one.dtb for Orange Pi One -+ -+ -+PinePhone -+--------- -+ -+I don't run u-boot on PinePhone, so my pre-built kernel packages don't come -+with u-boot built for PinePhone. -+ -+ -+Kernel lockup issues -+-------------------- -+ -+*If you're getting lockups on boot or later during thermal regulation, -+you're missing an u-boot patch.* -+ -+This patch is necessary to run this kernel! -+ -+These lockups are caused by improper NKMP clock factors selection -+in u-boot for PLL_CPUX. (M divider should not be used. P divider -+should be used only for frequencies below 240MHz.) -+ -+This patch for u-boot fixes it: -+ -+ 0001-sunxi-h3-Fix-PLL1-setup-to-never-use-dividers.patch -+ -+Kernel side is already fixed in this kernel tree. -diff --git a/arch/arm/Makefile b/arch/arm/Makefile -index 4aaec9599e8a..1a1e76d0b5bf 100644 ---- a/arch/arm/Makefile -+++ b/arch/arm/Makefile -@@ -61,7 +61,7 @@ KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra) - # macro, but instead defines a whole series of macros which makes - # testing for a specific architecture or later rather impossible. - arch-$(CONFIG_CPU_32v7M) =-D__LINUX_ARM_ARCH__=7 -march=armv7-m -Wa,-march=armv7-m --arch-$(CONFIG_CPU_32v7) =-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a) -+arch-$(CONFIG_CPU_32v7) =-D__LINUX_ARM_ARCH__=7 -march=armv7-a -Wa,-march=armv7-a - arch-$(CONFIG_CPU_32v6) =-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6) - # Only override the compiler option if ARMv6. The ARMv6K extensions are - # always available in ARMv7 -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 3d1ea0b25168..eb25d2dbbfa7 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -1208,6 +1208,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ - sun8i-h3-orangepi-lite.dtb \ - sun8i-h3-orangepi-one.dtb \ - sun8i-h3-orangepi-pc.dtb \ -+ sun8i-h3-orangepi-pc-sapomat.dtb \ - sun8i-h3-orangepi-pc-plus.dtb \ - sun8i-h3-orangepi-plus.dtb \ - sun8i-h3-orangepi-plus2e.dtb \ -diff --git a/arch/arm/boot/dts/axp81x.dtsi b/arch/arm/boot/dts/axp81x.dtsi -index 1dfeeceabf4c..00b092f94433 100644 ---- a/arch/arm/boot/dts/axp81x.dtsi -+++ b/arch/arm/boot/dts/axp81x.dtsi -@@ -175,4 +175,9 @@ - usb_power_supply: usb-power-supply { - compatible = "x-powers,axp813-usb-power-supply"; - }; -+ -+ charger_led: charger-led { -+ compatible = "x-powers,axp813-charger-led"; -+ status = "disabled"; -+ }; - }; -diff --git a/arch/arm/boot/dts/sun5i-a13-pocketbook-touch-lux-3.dts b/arch/arm/boot/dts/sun5i-a13-pocketbook-touch-lux-3.dts -index e9ef97c9c893..ffecd00fc0a6 100644 ---- a/arch/arm/boot/dts/sun5i-a13-pocketbook-touch-lux-3.dts -+++ b/arch/arm/boot/dts/sun5i-a13-pocketbook-touch-lux-3.dts -@@ -61,6 +61,11 @@ - }; - }; - -+ regulator-eink { -+ compatible = "custom,reg-userspace-consumer"; -+ controlled-supply = <&tp65185x>; -+ }; -+ - reg_1v8: regulator-1v8 { - compatible = "regulator-fixed"; - regulator-name = "vdd-1v8-nor-ctp"; -@@ -78,7 +83,6 @@ - gpio = <&pio 2 14 GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply = <®_1v8>; -- regulator-always-on; - }; - - reg_1v8_ctp: regulator-ctp { -@@ -111,6 +115,7 @@ - - &i2c0 { - status = "okay"; -+ //XXX: bsp has pullup on PB0/PB1 pins enabled, but it works without it - - axp209: pmic@34 { - reg = <0x34>; -@@ -126,13 +131,44 @@ - pcf8563: rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; -+ #clock-cells = <0>; -+ }; -+ -+ // hacky PMIC driver for eInk display -+ tp65185x: regulator@68 { -+ compatible = "tp,tp65185x"; -+ reg = <0x68>; -+ -+ regulator-min-microvolt = <3120000>; -+ regulator-max-microvolt = <3120000>; -+ regulator-name = "eink-vcom"; -+ -+ //XXX: we don't use interrupts in the driver right now -+ //interrupt-parent = <&pio>; -+ //interrupts = <1 10 IRQ_TYPE_LEVEL_LOW>; /* PB10 */ -+ -+ wakeup-gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */ -+ powerup-gpios = <&pio 4 7 GPIO_ACTIVE_HIGH>; /* PE7 */ -+ vcom-gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ -+ //XXX: not a pullup on BSP (might have an external resistor) -+ powergood-gpios = <&pio 4 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PE6 */ - }; - }; - - &i2c2 { - status = "okay"; - -- /* Touchpanel is connected here. */ -+ touchpanel@24 { -+ compatible = "cypress,cyttsp4_i2c_adapter"; -+ reg = <0x24>; -+ -+ interrupt-parent = <&pio>; -+ interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; /* PG11 */ -+ -+ vdd-supply = <®_1v8_ctp>; -+ power-gpios = <&pio 4 5 GPIO_ACTIVE_LOW>; /* PE5 */ -+ reset-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 */ -+ }; - }; - - &lradc { -@@ -178,6 +214,20 @@ - status = "okay"; - }; - -+&pio { -+ eink_pins_active: eink-pins-lcd { -+ pins = "PD3", "PD4", "PD5", "PD6", "PD7", "PD10", "PD11", "PD12", -+ "PD13", "PD15", "PD20", "PD21", "PD22", "PD23", "PD24"; -+ function = "lcd0"; -+ }; -+ -+ eink_pins_idle: eink-pins-gpio { -+ pins = "PD3", "PD4", "PD5", "PD6", "PD7", "PD10", "PD11", "PD12", -+ "PD13", "PD15", "PD20", "PD21", "PD22", "PD23", "PD24"; -+ function = "gpio_out"; -+ }; -+}; -+ - &pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; -@@ -218,6 +268,55 @@ - regulator-ramp-delay = <1600>; - }; - -+&soc { -+ display-controller@1c0c000 { -+ pinctrl-names = "idle", "active"; -+ pinctrl-0 = <&eink_pins_idle>; -+ pinctrl-1 = <&eink_pins_active>; -+ -+ all-gpios = <&pio 3 3 GPIO_ACTIVE_HIGH>, -+ <&pio 3 4 GPIO_ACTIVE_HIGH>, -+ <&pio 3 5 GPIO_ACTIVE_HIGH>, -+ <&pio 3 6 GPIO_ACTIVE_HIGH>, -+ <&pio 3 7 GPIO_ACTIVE_HIGH>, -+ <&pio 3 10 GPIO_ACTIVE_HIGH>, -+ <&pio 3 11 GPIO_ACTIVE_HIGH>, -+ <&pio 3 12 GPIO_ACTIVE_HIGH>, -+ <&pio 3 13 GPIO_ACTIVE_HIGH>, -+ <&pio 3 15 GPIO_ACTIVE_HIGH>, -+ <&pio 3 20 GPIO_ACTIVE_HIGH>, -+ <&pio 3 21 GPIO_ACTIVE_HIGH>, -+ <&pio 3 22 GPIO_ACTIVE_HIGH>, -+ <&pio 3 23 GPIO_ACTIVE_HIGH>, -+ <&pio 3 24 GPIO_ACTIVE_HIGH>; -+ -+ compatible = "custom,pocketbook-touch-lux-3-tcon0-ed060xd4-display"; -+ reg = <0x01c0c000 0x1000>, // TCON0 regs -+ <0x01e60000 0x10000>; // DEBE regs -+ -+ interrupts = <44>; // TCON interrupt -+ -+ resets = <&ccu RST_LCD>, <&ccu RST_DE_BE>; -+ reset-names = "tcon", "be"; -+ -+ clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_TCON_CH0>, -+ <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>, -+ <&ccu CLK_DRAM_DE_BE>; -+ clock-names = "tcon_bus", "tcon_mod", -+ "be_bus", "be_mod", -+ "be_ram"; -+ -+ assigned-clocks = <&ccu CLK_DE_BE>; -+ assigned-clock-rates = <300000000>; -+ -+ interconnects = <&mbus 18>; -+ interconnect-names = "dma-mem"; -+ -+ panel-supply = <&tp65185x>; -+ control-device-name = "eink-panel"; -+ }; -+}; -+ - &spi2 { - pinctrl-names = "default"; - pinctrl-0 = <&spi2_pe_pins>, <&spi2_cs0_pe_pin>; -@@ -229,6 +328,7 @@ - compatible = "macronix,mx25u4033", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <4000000>; -+ vdd-supply = <®_1v8_nor>; - }; - }; - -@@ -252,6 +352,8 @@ - }; - - &usbphy { -+ //XXX: might not work, need to test -+ usb0_vbus_det-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ - usb1_vbus-supply = <®_ldo3>; - status = "okay"; - }; -diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi -index c2b4fbf552a3..754df6e3e599 100644 ---- a/arch/arm/boot/dts/sun5i.dtsi -+++ b/arch/arm/boot/dts/sun5i.dtsi -@@ -51,6 +51,12 @@ - #address-cells = <1>; - #size-cells = <1>; - -+ aliases { -+ mmc0 = &mmc0; -+ mmc1 = &mmc1; -+ mmc2 = &mmc2; -+ }; -+ - cpus { - #address-cells = <1>; - #size-cells = <0>; -@@ -123,7 +129,7 @@ - }; - }; - -- soc { -+ soc: soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -@@ -648,6 +654,11 @@ - reg = <0x01c25000 0x100>; - interrupts = <29>; - #thermal-sensor-cells = <0>; -+ -+ rtp_adc: adc { -+ compatible = "allwinner,sun5i-a13-gpadc-iio"; -+ #io-channel-cells = <1>; -+ }; - }; - - uart0: serial@1c28000 { -diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts -index 73de34ae37fd..236ebfc06192 100644 ---- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts -+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts -@@ -226,8 +226,8 @@ - axp22x: pmic@68 { - compatible = "x-powers,axp221"; - reg = <0x68>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - x-powers,drive-vbus-en; - }; - }; -diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts -index a645c8f4257c..2436b13cbce1 100644 ---- a/arch/arm/boot/dts/sun6i-a31-m9.dts -+++ b/arch/arm/boot/dts/sun6i-a31-m9.dts -@@ -115,8 +115,8 @@ - axp22x: pmic@68 { - compatible = "x-powers,axp221"; - reg = <0x68>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - }; - }; - -diff --git a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts -index 648f24746234..ce712bdd8cd0 100644 ---- a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts -+++ b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts -@@ -115,8 +115,8 @@ - axp22x: pmic@68 { - compatible = "x-powers,axp221"; - reg = <0x68>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - }; - }; - -diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi -index f3425a66fc0a..50324688c28a 100644 ---- a/arch/arm/boot/dts/sun6i-a31.dtsi -+++ b/arch/arm/boot/dts/sun6i-a31.dtsi -@@ -611,6 +611,7 @@ - pio: pinctrl@1c20800 { - compatible = "allwinner,sun6i-a31-pinctrl"; - reg = <0x01c20800 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = , - , - , -@@ -802,6 +803,7 @@ - lradc: lradc@1c22800 { - compatible = "allwinner,sun4i-a10-lradc-keys"; - reg = <0x01c22800 0x100>; -+ interrupt-parent = <&r_intc>; - interrupts = ; - status = "disabled"; - }; -@@ -1299,16 +1301,17 @@ - #clock-cells = <1>; - compatible = "allwinner,sun6i-a31-rtc"; - reg = <0x01f00000 0x54>; -+ interrupt-parent = <&r_intc>; - interrupts = , - ; - clocks = <&osc32k>; - clock-output-names = "osc32k"; - }; - -- nmi_intc: interrupt-controller@1f00c00 { -+ r_intc: interrupt-controller@1f00c00 { - compatible = "allwinner,sun6i-a31-r-intc"; - interrupt-controller; -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - reg = <0x01f00c00 0x400>; - interrupts = ; - }; -@@ -1383,6 +1386,7 @@ - r_pio: pinctrl@1f02c00 { - compatible = "allwinner,sun6i-a31-r-pinctrl"; - reg = <0x01f02c00 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = , - ; - clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; -diff --git a/arch/arm/boot/dts/sun6i-a31s-primo81.dts b/arch/arm/boot/dts/sun6i-a31s-primo81.dts -index bc3170a0b8b5..c5c85eb44cc7 100644 ---- a/arch/arm/boot/dts/sun6i-a31s-primo81.dts -+++ b/arch/arm/boot/dts/sun6i-a31s-primo81.dts -@@ -159,8 +159,8 @@ - axp22x: pmic@68 { - compatible = "x-powers,axp221"; - reg = <0x68>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - x-powers,drive-vbus-en; - }; - }; -diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi -index 3099491de8c4..227ad489731c 100644 ---- a/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi -+++ b/arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi -@@ -78,8 +78,8 @@ - axp22x: pmic@68 { - compatible = "x-powers,axp221"; - reg = <0x68>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - }; - }; - -diff --git a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts -index 708caee52425..1f7cfaa86d3d 100644 ---- a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts -+++ b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts -@@ -148,8 +148,8 @@ - axp22x: pmic@68 { - compatible = "x-powers,axp221"; - reg = <0x68>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - eldoin-supply = <®_dcdc1>; - x-powers,drive-vbus-en; - }; -diff --git a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts -index 2504e7189c54..0b61f5368d44 100644 ---- a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts -+++ b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts -@@ -98,8 +98,8 @@ - axp22x: pmic@68 { - compatible = "x-powers,axp221"; - reg = <0x68>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - }; - }; - -diff --git a/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi -index 7de2abd541c1..f38d19c6be8c 100644 ---- a/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi -+++ b/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi -@@ -79,8 +79,8 @@ - axp22x: pmic@68 { - compatible = "x-powers,axp221"; - reg = <0x68>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - drivevbus-supply = <®_vcc5v0>; - x-powers,drive-vbus-en; - }; -diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi -index c1362d0f0ff8..4461d5098b20 100644 ---- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi -+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi -@@ -338,6 +338,7 @@ - pio: pinctrl@1c20800 { - /* compatible gets set in SoC specific dtsi file */ - reg = <0x01c20800 0x400>; -+ interrupt-parent = <&r_intc>; - /* interrupts get set in SoC specific dtsi file */ - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; - clock-names = "apb", "hosc", "losc"; -@@ -473,6 +474,7 @@ - lradc: lradc@1c22800 { - compatible = "allwinner,sun4i-a10-lradc-keys"; - reg = <0x01c22800 0x100>; -+ interrupt-parent = <&r_intc>; - interrupts = ; - status = "disabled"; - }; -@@ -709,6 +711,7 @@ - rtc: rtc@1f00000 { - compatible = "allwinner,sun8i-a23-rtc"; - reg = <0x01f00000 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = , - ; - clock-output-names = "osc32k", "osc32k-out"; -@@ -716,10 +719,10 @@ - #clock-cells = <1>; - }; - -- nmi_intc: interrupt-controller@1f00c00 { -+ r_intc: interrupt-controller@1f00c00 { - compatible = "allwinner,sun6i-a31-r-intc"; - interrupt-controller; -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - reg = <0x01f00c00 0x400>; - interrupts = ; - }; -@@ -805,6 +808,7 @@ - r_pio: pinctrl@1f02c00 { - compatible = "allwinner,sun8i-a23-r-pinctrl"; - reg = <0x01f02c00 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = ; - clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; - clock-names = "apb", "hosc", "losc"; -diff --git a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts -index a1953b2872d0..810fada3db00 100644 ---- a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts -+++ b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts -@@ -98,8 +98,8 @@ - axp22x: pmic@3a3 { - compatible = "x-powers,axp223"; - reg = <0x3a3>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - eldoin-supply = <®_dcdc1>; - x-powers,drive-vbus-en; - }; -diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts -index 785798e3a104..66fec9a8c777 100644 ---- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts -+++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts -@@ -164,8 +164,8 @@ - axp22x: pmic@3a3 { - compatible = "x-powers,axp223"; - reg = <0x3a3>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - eldoin-supply = <®_dcdc1>; - }; - }; -diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi -index c458f5fb124f..0b38f9f35074 100644 ---- a/arch/arm/boot/dts/sun8i-a33.dtsi -+++ b/arch/arm/boot/dts/sun8i-a33.dtsi -@@ -198,7 +198,7 @@ - }; - - link_codec: simple-audio-card,codec { -- sound-dai = <&codec>; -+ sound-dai = <&codec 0>; - }; - }; - -@@ -238,7 +238,7 @@ - }; - - codec: codec@1c22e00 { -- #sound-dai-cells = <0>; -+ #sound-dai-cells = <1>; - compatible = "allwinner,sun8i-a33-codec"; - reg = <0x01c22e00 0x400>; - interrupts = ; -diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts b/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts -index 9c006fc18821..c31c97d16024 100644 ---- a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts -+++ b/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts -@@ -122,7 +122,7 @@ - compatible = "x-powers,axp818", "x-powers,axp813"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - eldoin-supply = <®_dcdc1>; - swin-supply = <®_dcdc1>; - }; -@@ -142,7 +142,7 @@ - ac100_rtc: rtc { - compatible = "x-powers,ac100-rtc"; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - clocks = <&ac100_codec>; - #clock-cells = <1>; - clock-output-names = "cko1_rtc", -diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts -index 431f70234d36..2e8e1134a852 100644 ---- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts -+++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts -@@ -203,7 +203,7 @@ - compatible = "x-powers,axp813"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - eldoin-supply = <®_dcdc1>; - fldoin-supply = <®_dcdc5>; - swin-supply = <®_dcdc1>; -@@ -225,7 +225,7 @@ - ac100_rtc: rtc { - compatible = "x-powers,ac100-rtc"; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - clocks = <&ac100_codec>; - #clock-cells = <1>; - clock-output-names = "cko1_rtc", -diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts -index d8326a5c681d..f15eb782bca3 100644 ---- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts -+++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts -@@ -239,7 +239,7 @@ - compatible = "x-powers,axp818", "x-powers,axp813"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - eldoin-supply = <®_dcdc1>; - swin-supply = <®_dcdc1>; - x-powers,drive-vbus-en; -@@ -260,7 +260,7 @@ - ac100_rtc: rtc { - compatible = "x-powers,ac100-rtc"; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - clocks = <&ac100_codec>; - #clock-cells = <1>; - clock-output-names = "cko1_rtc", -diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts -index bfc9bb277a49..eabba5ebcd57 100644 ---- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts -+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts -@@ -61,6 +61,15 @@ - stdout-path = "serial0:115200n8"; - }; - -+ leds { -+ compatible = "gpio-leds"; -+ -+ flash_led { -+ label = "flash"; -+ gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; -@@ -70,6 +79,16 @@ - default-brightness-level = <9>; - }; - -+ i2c_gpio: i2c-gpio { -+ compatible = "i2c-gpio"; -+ /* PE15 = sda, PE14 = scl */ -+ sda-gpios = <&pio 4 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ scl-gpios = <&pio 4 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ i2c-gpio,delay-us = <1>; /* ~100 kHz */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ - panel { - compatible = "tbs,a711-panel", "panel-lvds"; - backlight = <&backlight>; -@@ -99,6 +118,11 @@ - }; - }; - -+ vibrator { -+ compatible = "gpio-vibrator"; -+ vcc-supply = <®_ldo_io1>; -+ }; -+ - reg_gps: reg-gps { - compatible = "regulator-fixed"; - regulator-name = "gps"; -@@ -118,7 +142,7 @@ - regulator-name = "vmain"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; -- gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; -+ gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */ - enable-active-high; - vin-supply = <®_vbat>; - }; -@@ -134,6 +158,92 @@ - clocks = <&ac100_rtc 1>; - clock-names = "ext_clock"; - }; -+ -+ modem { -+ compatible = "zte,mg3732"; -+ char-device-name = "modem-power"; -+ -+ power-supply = <®_vmain>; -+ -+ enable-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ -+ reset-gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ -+ wakeup-gpios = <&r_pio 0 11 GPIO_ACTIVE_HIGH>; /* PL11 */ -+ }; -+ -+ bt_sco_codec: bt-sco-codec { -+ #sound-dai-cells = <1>; -+ compatible = "linux,bt-sco"; -+ sound-name-prefix = "Bluetooth"; -+ }; -+ -+ speaker_amp: audio-amplifier { -+ compatible = "simple-audio-amplifier"; -+ enable-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */ -+ sound-name-prefix = "Speaker Amp"; -+ }; -+ -+ sound: sound { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "ac100-audio"; -+ simple-audio-card,aux-devs = <&ac100_codec_analog>, <&speaker_amp>; -+ simple-audio-card,widgets = "Microphone", "Headset Microphone", -+ "Microphone", "Internal Microphone", -+ "Headphone", "Headphone Jack", -+ "Speaker", "Internal Speaker"; -+ simple-audio-card,routing = -+ "Headphone Jack", "HP", -+ "Internal Speaker", "Speaker Amp OUTL", -+ "Speaker Amp INL", "SPKOUTL", -+ "Left DAC", "DACL", -+ "Right DAC", "DACR", -+ "ADCL", "Left ADC", -+ "ADCR", "Right ADC", -+ "Internal Microphone", "MBIAS", -+ "MIC1", "Internal Microphone", -+ "Headset Microphone", "HBIAS", -+ "MIC2", "Headset Microphone"; -+ -+ simple-audio-card,dai-link@0 { -+ format = "i2s"; -+ frame-master = <&link0_cpu>; -+ bitclock-master = <&link0_cpu>; -+ mclk-fs = <512>; -+ -+ link0_cpu: cpu { -+ sound-dai = <&i2s0>; -+ }; -+ -+ link0_codec: codec { -+ sound-dai = <&ac100_codec 0>; -+ }; -+ }; -+ -+ simple-audio-card,dai-link@2 { -+ format = "dsp_a"; -+ frame-master = <&link2_codec>; -+ bitclock-master = <&link2_codec>; -+ bitclock-inversion; -+ -+ link2_cpu: cpu { -+ sound-dai = <&bt_sco_codec 0>; -+ }; -+ -+ link2_codec: codec { -+ sound-dai = <&ac100_codec 2>; -+ dai-tdm-slot-num = <2>; -+ dai-tdm-slot-width = <16>; -+ }; -+ }; -+ }; -+}; -+ -+&ccu { -+ /* Use a stable clock source with known fixed rate for MCLK */ -+ assigned-clocks = <&ccu CLK_CSI_MCLK>; -+ assigned-clock-parents = <&osc24M>; -+ assigned-clock-rates = <24000000>; - }; - - &cpu0 { -@@ -144,6 +254,37 @@ - cpu-supply = <®_dcdc3>; - }; - -+&csi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&csi_8bit_parallel_pins>, <&csi_mclk_pin>; -+ status = "okay"; -+}; -+ -+&csi_in { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ csi_hm5065_ep: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&hm5065_ep>; -+ bus-width = <8>; -+ data-active = <1>; -+ pclk-sample = <0>; -+ hsync-active = <0>; -+ vsync-active = <1>; -+ }; -+ -+ csi_gc2145_ep: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&gc2145_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; -+ vsync-active = <1>; -+ data-active = <1>; -+ pclk-sample = <1>; -+ }; -+}; -+ - &de { - status = "okay"; - }; -@@ -189,9 +330,76 @@ - reg = <0x18>; - interrupt-parent = <&pio>; - interrupts = <7 10 IRQ_TYPE_EDGE_RISING>; /* PH10 / EINT10 */ -+ vdd-supply = <®_dcdc1>; -+ vddio-supply = <®_dcdc1>; -+ }; -+ -+ /* NFC (NPC 100) */ -+ npc100: nfc@28 { -+ compatible = "nxp,nxp-nci-i2c"; -+ reg = <0x28>; -+ interrupt-parent = <&r_pio>; -+ interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; /* PL6 */ -+ enable-gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */ -+ firmware-gpios = <&pio 3 3 GPIO_ACTIVE_HIGH>; /* PD3 */ -+ }; -+}; -+ -+&i2c_gpio { -+ hm5065: rear-camera@1f { -+ compatible = "himax,hm5065"; -+ reg = <0x1f>; -+ clocks = <&ccu CLK_CSI_MCLK>; -+ clock-names = "xclk"; -+ IOVDD-supply = <®_dldo3>; -+ AVDD-supply = <®_dldo4>; -+ DVDD-supply = <®_eldo3>; -+ AFVDD-supply = <®_dldo3>; -+ reset-gpios = <&pio 4 18 GPIO_ACTIVE_LOW>; /* PE18 */ -+ enable-gpios = <&pio 4 19 GPIO_ACTIVE_HIGH>; /* PE19 */ -+ -+ port { -+ hm5065_ep: endpoint { -+ remote-endpoint = <&csi_hm5065_ep>; -+ bus-width = <8>; -+ data-active = <1>; -+ pclk-sample = <0>; -+ hsync-active = <0>; -+ vsync-active = <1>; -+ }; -+ }; -+ }; -+ -+ gc2145: front-camera@3c { -+ compatible = "galaxycore,gc2145"; -+ reg = <0x3c>; -+ clocks = <&ccu CLK_CSI_MCLK>; -+ clock-names = "xclk"; -+ IOVDD-supply = <®_dldo3>; -+ AVDD-supply = <®_dldo4>; -+ DVDD-supply = <®_eldo3>; -+ reset-gpios = <&pio 4 16 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; /* PE16 */ -+ enable-gpios = <&pio 4 17 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; /* PE17 */ -+ -+ port { -+ gc2145_ep: endpoint { -+ remote-endpoint = <&csi_gc2145_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; -+ vsync-active = <1>; -+ data-active = <1>; -+ pclk-sample = <1>; -+ }; -+ }; - }; - }; - -+&i2s0 { -+ status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s0_pins>; -+}; -+ - &mmc0 { - vmmc-supply = <®_dcdc1>; - pinctrl-names = "default"; -@@ -263,7 +471,7 @@ - compatible = "x-powers,axp813"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - swin-supply = <®_dcdc1>; - x-powers,drive-vbus-en; - }; -@@ -272,18 +480,29 @@ - compatible = "x-powers,ac100"; - reg = <0xe89>; - -+ ac100_codec_analog: codec-analog { -+ compatible = "x-powers,ac100-codec-analog"; -+ cpvdd-supply = <®_aldo2>; -+ }; -+ - ac100_codec: codec { -+ #sound-dai-cells = <1>; - compatible = "x-powers,ac100-codec"; - interrupt-parent = <&r_pio>; - interrupts = <0 12 IRQ_TYPE_LEVEL_LOW>; /* PL12 */ - #clock-cells = <0>; - clock-output-names = "4M_adda"; -+ -+ LDOIN-supply = <®_aldo2>; -+ AVCC-supply = <®_aldo3>; -+ VDDIO1-supply = <®_dcdc1>; -+ VDDIO2-supply = <®_dldo1>; - }; - - ac100_rtc: rtc { - compatible = "x-powers,ac100-rtc"; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - clocks = <&ac100_codec>; - #clock-cells = <1>; - clock-output-names = "cko1_rtc", -@@ -300,6 +519,10 @@ - status = "okay"; - }; - -+&charger_led { -+ status = "okay"; -+}; -+ - ®_aldo1 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; -@@ -368,9 +591,10 @@ - }; - - ®_dldo2 { -- regulator-min-microvolt = <2800000>; -+ regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <4200000>; -- regulator-name = "vcc-mipi"; -+ regulator-name = "vbat-nfc"; -+ regulator-always-on; - }; - - ®_dldo3 { -@@ -391,9 +615,10 @@ - }; - - ®_eldo1 { -- regulator-min-microvolt = <1200000>; -+ regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; -- regulator-name = "dvdd-csi-r"; -+ regulator-name = "pvdd-nfc"; -+ regulator-always-on; - }; - - ®_eldo2 { -@@ -403,7 +628,7 @@ - }; - - ®_eldo3 { -- regulator-min-microvolt = <1200000>; -+ regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "dvdd-csi-f"; - }; -@@ -429,8 +654,8 @@ - }; - - ®_ldo_io1 { -- regulator-min-microvolt = <3100000>; -- regulator-max-microvolt = <3100000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; - regulator-name = "vcc-vb"; - status = "okay"; - }; -@@ -474,7 +699,7 @@ - device-wakeup-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ - host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ - shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ -- max-speed = <1500000>; -+// max-speed = <1500000>; stopped working in v5.6 - }; - }; - -diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi -index c010b27fdb6a..87cd0e27bf8d 100644 ---- a/arch/arm/boot/dts/sun8i-a83t.dtsi -+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi -@@ -57,6 +57,12 @@ - #address-cells = <1>; - #size-cells = <1>; - -+ aliases { -+ mmc0 = &mmc0; -+ mmc1 = &mmc1; -+ mmc2 = &mmc2; -+ }; -+ - cpus { - #address-cells = <1>; - #size-cells = <0>; -@@ -210,45 +216,27 @@ - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-600000000 { -- opp-hz = /bits/ 64 <600000000>; -- opp-microvolt = <840000>; -- clock-latency-ns = <244144>; /* 8 32k periods */ -- }; -- -- opp-720000000 { -- opp-hz = /bits/ 64 <720000000>; -- opp-microvolt = <840000>; -- clock-latency-ns = <244144>; /* 8 32k periods */ -- }; -- -- opp-864000000 { -- opp-hz = /bits/ 64 <864000000>; -- opp-microvolt = <840000>; -- clock-latency-ns = <244144>; /* 8 32k periods */ -- }; -- -- opp-912000000 { -- opp-hz = /bits/ 64 <912000000>; -+ opp-1008000000 { -+ opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <840000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-1008000000 { -- opp-hz = /bits/ 64 <1008000000>; -- opp-microvolt = <840000>; -+ opp-1412000000 { -+ opp-hz = /bits/ 64 <1412000000>; -+ opp-microvolt = <920000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-1128000000 { -- opp-hz = /bits/ 64 <1128000000>; -- opp-microvolt = <840000>; -+ opp-1608000000 { -+ opp-hz = /bits/ 64 <1608000000>; -+ opp-microvolt = <1000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-1200000000 { -- opp-hz = /bits/ 64 <1200000000>; -- opp-microvolt = <840000>; -+ opp-1800000000 { -+ opp-hz = /bits/ 64 <1800000000>; -+ opp-microvolt = <1080000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - }; -@@ -263,47 +251,36 @@ - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-600000000 { -- opp-hz = /bits/ 64 <600000000>; -- opp-microvolt = <840000>; -- clock-latency-ns = <244144>; /* 8 32k periods */ -- }; -- -- opp-720000000 { -- opp-hz = /bits/ 64 <720000000>; -- opp-microvolt = <840000>; -- clock-latency-ns = <244144>; /* 8 32k periods */ -- }; -- -- opp-864000000 { -- opp-hz = /bits/ 64 <864000000>; -+ opp-1008000000 { -+ opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <840000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-912000000 { -- opp-hz = /bits/ 64 <912000000>; -- opp-microvolt = <840000>; -+ opp-1412000000 { -+ opp-hz = /bits/ 64 <1412000000>; -+ opp-microvolt = <920000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-1008000000 { -- opp-hz = /bits/ 64 <1008000000>; -- opp-microvolt = <840000>; -+ opp-1608000000 { -+ opp-hz = /bits/ 64 <1608000000>; -+ opp-microvolt = <1000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-1128000000 { -- opp-hz = /bits/ 64 <1128000000>; -- opp-microvolt = <840000>; -+ opp-1800000000 { -+ opp-hz = /bits/ 64 <1800000000>; -+ opp-microvolt = <1080000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; -+ }; - -- opp-1200000000 { -- opp-hz = /bits/ 64 <1200000000>; -- opp-microvolt = <840000>; -- clock-latency-ns = <244144>; /* 8 32k periods */ -- }; -+ scpi_protocol: scpi { -+ compatible = "arm,scpi"; -+ mboxes = <&msgbox 0>, <&msgbox 1>; -+ mbox-names = "tx", "rx"; -+ shmem = <&scpi_sram>; - }; - - soc { -@@ -439,6 +416,33 @@ - compatible = "allwinner,sun8i-a83t-system-controller", - "syscon"; - reg = <0x01c00000 0x1000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges; -+ -+ sram_a2: sram@40000 { -+ compatible = "mmio-sram"; -+ reg = <0x00040000 0x14000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x00040000 0x14000>; -+ -+ scpi_sram: scp-shmem@13c00 { -+ compatible = "arm,scp-shmem"; -+ reg = <0x13e00 0x200>; -+ }; -+ }; -+ -+ }; -+ -+ video-codec@01c0e000 { -+ compatible = "allwinner,sun8i-a83t-video-engine"; -+ reg = <0x01c0e000 0x1000>; -+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, -+ <&ccu CLK_DRAM_VE>; -+ clock-names = "ahb", "mod", "ram"; -+ resets = <&ccu RST_BUS_VE>; -+ interrupts = ; - }; - - dma: dma-controller@1c02000 { -@@ -702,12 +706,14 @@ - reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&osc16Md512>; - clock-names = "hosc", "losc"; -+ protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - pio: pinctrl@1c20800 { - compatible = "allwinner,sun8i-a83t-pinctrl"; -+ interrupt-parent = <&r_intc>; - interrupts = , - , - ; -@@ -818,6 +824,11 @@ - function = "spdif"; - }; - -+ i2s0_pins: i2s0-pins { -+ pins = "PB4", "PB5", "PB6", "PB7", "PB8"; -+ function = "i2s0"; -+ }; -+ - uart0_pb_pins: uart0-pb-pins { - pins = "PB9", "PB10"; - function = "uart0"; -@@ -932,6 +943,7 @@ - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; -+ fifo-size = <64>; - clocks = <&ccu CLK_BUS_UART0>; - resets = <&ccu RST_BUS_UART0>; - status = "disabled"; -@@ -943,6 +955,7 @@ - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; -+ fifo-size = <64>; - clocks = <&ccu CLK_BUS_UART1>; - resets = <&ccu RST_BUS_UART1>; - status = "disabled"; -@@ -954,6 +967,7 @@ - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; -+ fifo-size = <64>; - clocks = <&ccu CLK_BUS_UART2>; - resets = <&ccu RST_BUS_UART2>; - status = "disabled"; -@@ -965,6 +979,7 @@ - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; -+ fifo-size = <64>; - clocks = <&ccu CLK_BUS_UART3>; - resets = <&ccu RST_BUS_UART3>; - status = "disabled"; -@@ -976,6 +991,7 @@ - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; -+ fifo-size = <64>; - clocks = <&ccu CLK_BUS_UART4>; - resets = <&ccu RST_BUS_UART4>; - status = "disabled"; -@@ -1114,7 +1130,7 @@ - compatible = "allwinner,sun8i-a83t-r-intc", - "allwinner,sun6i-a31-r-intc"; - interrupt-controller; -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - reg = <0x01f00c00 0x400>; - interrupts = ; - }; -@@ -1125,6 +1141,7 @@ - clocks = <&osc24M>, <&osc16Md512>, <&osc16M>, - <&ccu CLK_PLL_PERIPH>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; -+ protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; -@@ -1150,6 +1167,7 @@ - r_lradc: lradc@1f03c00 { - compatible = "allwinner,sun8i-a83t-r-lradc"; - reg = <0x01f03c00 0x100>; -+ interrupt-parent = <&r_intc>; - interrupts = ; - status = "disabled"; - }; -@@ -1157,6 +1175,7 @@ - r_pio: pinctrl@1f02c00 { - compatible = "allwinner,sun8i-a83t-r-pinctrl"; - reg = <0x01f02c00 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = ; - clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, - <&osc16Md512>; -diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts -index 45a24441ff18..f9bec6935120 100644 ---- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts -+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts -@@ -142,6 +142,14 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ -+&i2s2 { -+ status = "okay"; -+}; -+ - &ir { - linux,rc-map-name = "rc-tanix-tx3mini"; - pinctrl-names = "default"; -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -index 597c425d08ec..64e8e2829f27 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -@@ -144,6 +144,14 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ -+&i2s2 { -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&r_ir_rx_pin>; -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -index 4759ba3f2986..599188eb9d22 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -@@ -91,7 +91,7 @@ - - sw4 { - label = "sw4"; -- linux,code = ; -+ linux,code = ; - gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; - }; - }; -@@ -146,6 +146,14 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ -+&i2s2 { -+ status = "okay"; -+}; -+ - &mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-sapomat.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-sapomat.dts -new file mode 100644 -index 000000000000..55c82d5fb63f ---- /dev/null -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-sapomat.dts -@@ -0,0 +1,34 @@ -+#include -+#include -+#include "sun8i-h3-orangepi-pc.dts" -+ -+/ { -+ model = "Xunlong Orange Pi PC Sapomat"; -+ -+ sapomat_gpio_keys { -+ compatible = "gpio-keys-polled"; -+ poll-interval = <50>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sapomat_btn_pins>; -+ -+ red_btn { -+ label = "Red Button"; -+ linux,code = ; -+ gpios = <&pio 2 4 GPIO_ACTIVE_LOW>; /* PC4 */ -+ }; -+ -+ green_btn { -+ label = "Green Button"; -+ linux,code = ; -+ gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */ -+ }; -+ }; -+}; -+ -+&pio { -+ sapomat_btn_pins: btn_pins@0 { -+ pins = "PC4", "PC7"; -+ function = "gpio_in"; -+ bias-pull-up; -+ }; -+}; -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -index 5aff8ecc66cb..7898b5c083fe 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -@@ -91,7 +91,7 @@ - - sw4 { - label = "sw4"; -- linux,code = ; -+ linux,code = ; - gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; - }; - }; -@@ -146,6 +146,14 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ -+&i2s2 { -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&r_ir_rx_pin>; -@@ -193,7 +201,8 @@ - * Use 1.0V as the minimum voltage instead. - */ - regulator-min-microvolt = <1000000>; -- regulator-max-microvolt = <1300000>; -+ regulator-max-microvolt = <1400000>; -+ regulator-ramp-delay = <200>; - regulator-boot-on; - regulator-always-on; - }; -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 4e89701df91f..8e7d20e814f0 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -44,10 +44,22 @@ - #include - - / { -+ aliases { -+ mmc0 = &mmc0; -+ mmc1 = &mmc1; -+ mmc2 = &mmc2; -+ }; -+ - cpu0_opp_table: opp_table0 { - compatible = "operating-points-v2"; - opp-shared; - -+ opp-480000000 { -+ opp-hz = /bits/ 64 <480000000>; -+ opp-microvolt = <1040000 1040000 1300000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ - opp-648000000 { - opp-hz = /bits/ 64 <648000000>; - opp-microvolt = <1040000 1040000 1300000>; -@@ -60,11 +72,41 @@ - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -+ opp-960000000 { -+ opp-hz = /bits/ 64 <960000000>; -+ opp-microvolt = <1200000 1200000 1300000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ - opp-1008000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <1200000 1200000 1300000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; -+ -+ opp-1104000000 { -+ opp-hz = /bits/ 64 <1104000000>; -+ opp-microvolt = <1320000 1320000 1320000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1200000000 { -+ opp-hz = /bits/ 64 <1200000000>; -+ opp-microvolt = <1320000 1320000 1320000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1296000000 { -+ opp-hz = /bits/ 64 <1296000000>; -+ opp-microvolt = <1340000 1340000 1340000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1368000000 { -+ opp-hz = /bits/ 64 <1368000000>; -+ opp-microvolt = <1400000 1400000 1400000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; - }; - - cpus { -@@ -170,6 +212,19 @@ - #size-cells = <1>; - ranges; - -+ sram_a2: sram@40000 { -+ compatible = "mmio-sram"; -+ reg = <0x00040000 0xc000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x00040000 0xc000>; -+ -+ scpi_sram: scp-shmem@bc00 { -+ compatible = "arm,scp-shmem"; -+ reg = <0xbc00 0x200>; -+ }; -+ }; -+ - sram_c: sram@1d00000 { - compatible = "mmio-sram"; - reg = <0x01d00000 0x80000>; -diff --git a/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts -index e1c75f7fa3ca..8e8ecdcd3a83 100644 ---- a/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts -+++ b/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts -@@ -163,8 +163,8 @@ - axp22x: pmic@3a3 { - compatible = "x-powers,axp223"; - reg = <0x3a3>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - eldoin-supply = <®_dcdc1>; - x-powers,drive-vbus-en; - }; -diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts -index 4f48eec6b2ef..de4bce5f89a8 100644 ---- a/arch/arm/boot/dts/sun8i-r16-parrot.dts -+++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts -@@ -164,8 +164,8 @@ - axp22x: pmic@3a3 { - compatible = "x-powers,axp223"; - reg = <0x3a3>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - drivevbus-supply = <®_vcc5v0>; - x-powers,drive-vbus-en; - }; -diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi -index b3d8b8f056cd..d71ea3637850 100644 ---- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi -+++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi -@@ -92,8 +92,8 @@ - axp22x: pmic@3a3 { - compatible = "x-powers,axp223"; - reg = <0x3a3>; -- interrupt-parent = <&nmi_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-parent = <&r_intc>; -+ interrupts = ; - eldoin-supply = <®_dcdc1>; - drivevbus-supply = <®_vcc5v0>; - x-powers,drive-vbus-en; -diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 9be13378d4df..a2de727cbcb9 100644 ---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -105,6 +105,13 @@ - status = "disabled"; - }; - -+ scpi_protocol: scpi { -+ compatible = "arm,scpi"; -+ mboxes = <&msgbox 2>, <&msgbox 3>; -+ mbox-names = "tx", "rx"; -+ shmem = <&scpi_sram>; -+ }; -+ - soc { - compatible = "simple-bus"; - #address-cells = <1>; -@@ -388,6 +395,7 @@ - reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; - clock-names = "hosc", "losc"; -+ protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; -@@ -395,6 +403,7 @@ - pio: pinctrl@1c20800 { - /* compatible is in per SoC .dtsi file */ - reg = <0x01c20800 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = , - ; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; -@@ -669,9 +678,9 @@ - interrupts = ; - clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>; - clock-names = "apb", "mod"; -- dmas = <&dma 27>; -+ dmas = <&dma 27>, <&dma 27>; - resets = <&ccu RST_BUS_I2S2>; -- dma-names = "tx"; -+ dma-names = "rx", "tx"; - status = "disabled"; - }; - -@@ -806,6 +815,7 @@ - }; - - hdmi: hdmi@1ee0000 { -+ #sound-dai-cells = <0>; - compatible = "allwinner,sun8i-h3-dw-hdmi", - "allwinner,sun8i-a83t-dw-hdmi"; - reg = <0x01ee0000 0x10000>; -@@ -852,6 +862,7 @@ - rtc: rtc@1f00000 { - /* compatible is in per SoC .dtsi file */ - reg = <0x01f00000 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = , - ; - clock-output-names = "osc32k", "osc32k-out", "iosc"; -@@ -859,12 +870,22 @@ - #clock-cells = <1>; - }; - -+ r_intc: interrupt-controller@1f00c00 { -+ compatible = "allwinner,sun8i-h3-r-intc", -+ "allwinner,sun6i-a31-r-intc"; -+ interrupt-controller; -+ #interrupt-cells = <3>; -+ reg = <0x01f00c00 0x400>; -+ interrupts = ; -+ }; -+ - r_ccu: clock@1f01400 { - compatible = "allwinner,sun8i-h3-r-ccu"; - reg = <0x01f01400 0x100>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, - <&ccu CLK_PLL_PERIPH0>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; -+ protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; -@@ -900,6 +921,7 @@ - r_pio: pinctrl@1f02c00 { - compatible = "allwinner,sun8i-h3-r-pinctrl"; - reg = <0x01f02c00 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = ; - clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; - clock-names = "apb", "hosc", "losc"; -@@ -934,4 +956,23 @@ - status = "disabled"; - }; - }; -+ -+ hdmi_sound: hdmi-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "sun8i-h3-hdmi"; -+ simple-audio-card,mclk-fs = <128>; -+ simple-audio-card,frame-inversion; -+ status = "disabled"; -+ -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s2>; -+ dai-tdm-slot-num = <2>; -+ dai-tdm-slot-width = <32>; -+ }; -+ }; - }; -diff --git a/arch/arm/configs/orangepi_defconfig b/arch/arm/configs/orangepi_defconfig -new file mode 100644 -index 000000000000..b9159c8fc5dc ---- /dev/null -+++ b/arch/arm/configs/orangepi_defconfig -@@ -0,0 +1,683 @@ -+CONFIG_KERNEL_LZ4=y -+CONFIG_SYSVIPC=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_PREEMPT_VOLUNTARY=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+CONFIG_TASK_XACCT=y -+CONFIG_TASK_IO_ACCOUNTING=y -+CONFIG_MEMCG=y -+CONFIG_BLK_CGROUP=y -+CONFIG_RT_GROUP_SCHED=y -+CONFIG_CGROUP_PIDS=y -+CONFIG_CPUSETS=y -+# CONFIG_PROC_PID_CPUSET is not set -+CONFIG_CGROUP_DEVICE=y -+CONFIG_CGROUP_BPF=y -+CONFIG_USER_NS=y -+CONFIG_SCHED_AUTOGROUP=y -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+# CONFIG_RD_XZ is not set -+# CONFIG_RD_LZO is not set -+CONFIG_BOOT_CONFIG=y -+CONFIG_BPF_SYSCALL=y -+CONFIG_PERF_EVENTS=y -+CONFIG_ARCH_SUNXI=y -+# CONFIG_MACH_SUN9I is not set -+CONFIG_ARM_LPAE=y -+CONFIG_ARM_ERRATA_814220=y -+CONFIG_SMP=y -+CONFIG_SCHED_MC=y -+CONFIG_MCPM=y -+CONFIG_NR_CPUS=8 -+CONFIG_HOTPLUG_CPU=y -+CONFIG_HZ_300=y -+CONFIG_HIGHMEM=y -+# CONFIG_ARM_MODULE_PLTS is not set -+CONFIG_ZBOOT_ROM_TEXT=0 -+CONFIG_ZBOOT_ROM_BSS=0 -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_STAT=y -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -+CONFIG_CPUFREQ_DT=y -+CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=y -+CONFIG_CPU_IDLE=y -+CONFIG_CPU_IDLE_GOV_LADDER=y -+CONFIG_ARM_CPUIDLE=y -+CONFIG_ARM_PSCI_CPUIDLE=y -+CONFIG_VFP=y -+CONFIG_NEON=y -+CONFIG_KERNEL_MODE_NEON=y -+# CONFIG_SUSPEND is not set -+CONFIG_PM=y -+CONFIG_APM_EMULATION=y -+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -+CONFIG_CRYPTO_SHA1_ARM_NEON=y -+CONFIG_CRYPTO_SHA1_ARM_CE=y -+CONFIG_CRYPTO_SHA2_ARM_CE=y -+CONFIG_CRYPTO_SHA512_ARM=y -+CONFIG_CRYPTO_AES_ARM=y -+CONFIG_CRYPTO_AES_ARM_BS=y -+CONFIG_CRYPTO_AES_ARM_CE=y -+CONFIG_CRYPTO_GHASH_ARM_CE=y -+CONFIG_CRYPTO_CRCT10DIF_ARM_CE=y -+CONFIG_CRYPTO_CRC32_ARM_CE=y -+CONFIG_JUMP_LABEL=y -+# CONFIG_STACKPROTECTOR is not set -+CONFIG_MODULES=y -+CONFIG_BLK_DEV_THROTTLING=y -+CONFIG_BLK_WBT=y -+CONFIG_BLK_CGROUP_IOLATENCY=y -+CONFIG_BLK_CGROUP_IOCOST=y -+# CONFIG_MQ_IOSCHED_KYBER is not set -+CONFIG_IOSCHED_BFQ=y -+CONFIG_BFQ_GROUP_IOSCHED=y -+CONFIG_CMA=y -+CONFIG_CMA_DEBUGFS=y -+CONFIG_ZPOOL=y -+CONFIG_ZBUD=y -+CONFIG_Z3FOLD=y -+CONFIG_ZSMALLOC=y -+CONFIG_NET=y -+CONFIG_PACKET=y -+CONFIG_PACKET_DIAG=y -+CONFIG_UNIX=y -+CONFIG_UNIX_DIAG=y -+CONFIG_NET_KEY=y -+CONFIG_INET=y -+CONFIG_IP_MULTICAST=y -+CONFIG_IP_ADVANCED_ROUTER=y -+CONFIG_NET_IPIP=y -+CONFIG_IP_MROUTE=y -+CONFIG_SYN_COOKIES=y -+CONFIG_INET_UDP_DIAG=y -+CONFIG_INET_RAW_DIAG=y -+CONFIG_INET_DIAG_DESTROY=y -+CONFIG_IPV6_MIP6=y -+CONFIG_NETFILTER=y -+CONFIG_BRIDGE_NETFILTER=y -+CONFIG_NETFILTER_NETLINK_ACCT=y -+CONFIG_NETFILTER_NETLINK_QUEUE=y -+CONFIG_NETFILTER_NETLINK_LOG=y -+CONFIG_NF_CONNTRACK=y -+CONFIG_NF_LOG_NETDEV=y -+CONFIG_NF_CONNTRACK_MARK=y -+# CONFIG_NF_CONNTRACK_PROCFS is not set -+CONFIG_NF_CONNTRACK_FTP=y -+CONFIG_NF_CONNTRACK_H323=y -+CONFIG_NF_CONNTRACK_IRC=y -+CONFIG_NF_CONNTRACK_NETBIOS_NS=y -+CONFIG_NF_CONNTRACK_SNMP=y -+CONFIG_NF_CONNTRACK_PPTP=y -+CONFIG_NF_CONNTRACK_SIP=y -+CONFIG_NF_CONNTRACK_TFTP=y -+CONFIG_NF_CT_NETLINK=y -+CONFIG_NETFILTER_NETLINK_GLUE_CT=y -+CONFIG_NF_TABLES=y -+CONFIG_NF_TABLES_INET=y -+CONFIG_NF_TABLES_NETDEV=y -+CONFIG_NFT_NUMGEN=y -+CONFIG_NFT_CT=y -+CONFIG_NFT_COUNTER=y -+CONFIG_NFT_CONNLIMIT=y -+CONFIG_NFT_LOG=y -+CONFIG_NFT_LIMIT=y -+CONFIG_NFT_MASQ=y -+CONFIG_NFT_REDIR=y -+CONFIG_NFT_NAT=y -+CONFIG_NFT_TUNNEL=y -+CONFIG_NFT_OBJREF=y -+CONFIG_NFT_QUEUE=y -+CONFIG_NFT_QUOTA=y -+CONFIG_NFT_REJECT=y -+CONFIG_NFT_HASH=y -+CONFIG_NFT_FIB_INET=y -+CONFIG_NFT_SOCKET=y -+CONFIG_NFT_OSF=y -+CONFIG_NFT_TPROXY=y -+CONFIG_NFT_DUP_NETDEV=y -+CONFIG_NFT_FWD_NETDEV=y -+CONFIG_NFT_FIB_NETDEV=y -+CONFIG_NFT_REJECT_NETDEV=y -+CONFIG_NF_FLOW_TABLE_INET=y -+CONFIG_NF_FLOW_TABLE=y -+CONFIG_IP_SET=y -+CONFIG_IP_SET_BITMAP_IP=y -+CONFIG_IP_SET_BITMAP_IPMAC=y -+CONFIG_IP_SET_BITMAP_PORT=y -+CONFIG_IP_SET_HASH_IP=y -+CONFIG_IP_SET_HASH_IPMARK=y -+CONFIG_IP_SET_HASH_IPPORT=y -+CONFIG_IP_SET_HASH_IPPORTIP=y -+CONFIG_IP_SET_HASH_IPPORTNET=y -+CONFIG_IP_SET_HASH_IPMAC=y -+CONFIG_IP_SET_HASH_MAC=y -+CONFIG_IP_SET_HASH_NETPORTNET=y -+CONFIG_IP_SET_HASH_NET=y -+CONFIG_IP_SET_HASH_NETNET=y -+CONFIG_IP_SET_HASH_NETPORT=y -+CONFIG_IP_SET_HASH_NETIFACE=y -+CONFIG_IP_SET_LIST_SET=y -+CONFIG_NFT_DUP_IPV4=y -+CONFIG_NFT_FIB_IPV4=y -+CONFIG_NF_TABLES_ARP=y -+CONFIG_NF_FLOW_TABLE_IPV4=y -+CONFIG_NF_LOG_ARP=y -+CONFIG_NF_LOG_IPV4=y -+# CONFIG_NF_NAT_SNMP_BASIC is not set -+CONFIG_NFT_DUP_IPV6=y -+CONFIG_NFT_FIB_IPV6=y -+CONFIG_NF_FLOW_TABLE_IPV6=y -+CONFIG_NF_LOG_IPV6=y -+CONFIG_NF_TABLES_BRIDGE=y -+CONFIG_NFT_BRIDGE_REJECT=y -+CONFIG_NF_LOG_BRIDGE=y -+CONFIG_BPFILTER=y -+CONFIG_BPFILTER_UMH=y -+CONFIG_IP_SCTP=y -+CONFIG_SCTP_COOKIE_HMAC_SHA1=y -+CONFIG_L2TP=y -+CONFIG_L2TP_V3=y -+CONFIG_L2TP_IP=y -+CONFIG_BRIDGE=y -+CONFIG_BRIDGE_VLAN_FILTERING=y -+CONFIG_VLAN_8021Q=y -+CONFIG_NET_SCHED=y -+CONFIG_NET_SCH_CBQ=y -+CONFIG_NET_SCH_HTB=y -+CONFIG_NET_CLS_BASIC=y -+CONFIG_NET_CLS_ROUTE4=y -+CONFIG_NET_CLS_FW=y -+CONFIG_NET_CLS_CGROUP=y -+CONFIG_NET_CLS_BPF=y -+CONFIG_NET_CLS_MATCHALL=y -+CONFIG_NET_CLS_ACT=y -+CONFIG_NET_ACT_POLICE=y -+CONFIG_NET_ACT_GACT=y -+CONFIG_NET_TC_SKB_EXT=y -+CONFIG_BT=y -+CONFIG_BT_RFCOMM=y -+CONFIG_BT_RFCOMM_TTY=y -+CONFIG_BT_BNEP=y -+CONFIG_BT_BNEP_MC_FILTER=y -+CONFIG_BT_BNEP_PROTO_FILTER=y -+CONFIG_BT_HIDP=y -+CONFIG_BT_HS=y -+CONFIG_BT_LEDS=y -+CONFIG_BT_HCIBTSDIO=y -+CONFIG_BT_HCIUART=y -+CONFIG_BT_HCIUART_BCM=y -+CONFIG_CFG80211=y -+CONFIG_CFG80211_DEBUGFS=y -+CONFIG_MAC80211=y -+CONFIG_MAC80211_LEDS=y -+CONFIG_RFKILL=y -+CONFIG_RFKILL_GPIO=y -+CONFIG_NFC=y -+CONFIG_NFC_DIGITAL=y -+CONFIG_NFC_NCI=y -+CONFIG_NFC_NXP_NCI=y -+CONFIG_NFC_NXP_NCI_I2C=y -+CONFIG_UEVENT_HELPER=y -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+#CONFIG_EXTRA_FIRMWARE="regulatory.db regulatory.db.p7s edid/asus.bin" -+#CONFIG_EXTRA_FIRMWARE_DIR="/workspace/megous.com/orangepi-pc/firmware" -+CONFIG_GNSS=y -+CONFIG_GNSS_SIRF_SERIAL=y -+CONFIG_GNSS_UBX_SERIAL=y -+CONFIG_OF_OVERLAY=y -+CONFIG_ZRAM=y -+CONFIG_ZRAM_WRITEBACK=y -+CONFIG_ZRAM_MEMORY_TRACKING=y -+CONFIG_BLK_DEV_LOOP=y -+CONFIG_BLK_DEV_NBD=y -+CONFIG_SCSI=y -+CONFIG_BLK_DEV_SD=y -+# CONFIG_SCSI_LOWLEVEL is not set -+CONFIG_MD=y -+CONFIG_BLK_DEV_DM=y -+CONFIG_DM_CRYPT=y -+CONFIG_DM_INIT=y -+CONFIG_DM_INTEGRITY=y -+CONFIG_NETDEVICES=y -+CONFIG_WIREGUARD=y -+CONFIG_TUN=y -+CONFIG_VETH=y -+# CONFIG_NET_VENDOR_ALACRITECH is not set -+# CONFIG_NET_VENDOR_ALLWINNER is not set -+# CONFIG_NET_VENDOR_AMAZON is not set -+# CONFIG_NET_VENDOR_AQUANTIA is not set -+# CONFIG_NET_VENDOR_ARC is not set -+# CONFIG_NET_VENDOR_AURORA is not set -+# CONFIG_NET_VENDOR_BROADCOM is not set -+# CONFIG_NET_VENDOR_CADENCE is not set -+# CONFIG_NET_VENDOR_CAVIUM is not set -+# CONFIG_NET_VENDOR_CIRRUS is not set -+# CONFIG_NET_VENDOR_CORTINA is not set -+# CONFIG_NET_VENDOR_EZCHIP is not set -+# CONFIG_NET_VENDOR_FARADAY is not set -+# CONFIG_NET_VENDOR_GOOGLE is not set -+# CONFIG_NET_VENDOR_HISILICON is not set -+# CONFIG_NET_VENDOR_HUAWEI is not set -+# CONFIG_NET_VENDOR_INTEL is not set -+# CONFIG_NET_VENDOR_MARVELL is not set -+# CONFIG_NET_VENDOR_MELLANOX is not set -+# CONFIG_NET_VENDOR_MICREL is not set -+# CONFIG_NET_VENDOR_MICROCHIP is not set -+# CONFIG_NET_VENDOR_MICROSEMI is not set -+# CONFIG_NET_VENDOR_NATSEMI is not set -+# CONFIG_NET_VENDOR_NETRONOME is not set -+# CONFIG_NET_VENDOR_NI is not set -+# CONFIG_NET_VENDOR_PENSANDO is not set -+# CONFIG_NET_VENDOR_QUALCOMM is not set -+# CONFIG_NET_VENDOR_RENESAS is not set -+# CONFIG_NET_VENDOR_ROCKER is not set -+# CONFIG_NET_VENDOR_SAMSUNG is not set -+# CONFIG_NET_VENDOR_SEEQ is not set -+# CONFIG_NET_VENDOR_SOLARFLARE is not set -+# CONFIG_NET_VENDOR_SMSC is not set -+# CONFIG_NET_VENDOR_SOCIONEXT is not set -+CONFIG_STMMAC_ETH=y -+# CONFIG_NET_VENDOR_SYNOPSYS is not set -+# CONFIG_NET_VENDOR_VIA is not set -+# CONFIG_NET_VENDOR_WIZNET is not set -+# CONFIG_NET_VENDOR_XILINX is not set -+CONFIG_LED_TRIGGER_PHY=y -+CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y -+CONFIG_PPP=y -+CONFIG_PPP_BSDCOMP=y -+CONFIG_PPP_DEFLATE=y -+CONFIG_PPP_FILTER=y -+CONFIG_PPP_MPPE=y -+CONFIG_PPPOL2TP=y -+CONFIG_PPP_ASYNC=y -+CONFIG_PPP_SYNC_TTY=y -+CONFIG_USB_RTL8152=y -+CONFIG_USB_USBNET=y -+# CONFIG_USB_NET_AX8817X is not set -+# CONFIG_USB_NET_AX88179_178A is not set -+CONFIG_USB_NET_CDC_EEM=y -+# CONFIG_USB_NET_CDC_NCM is not set -+# CONFIG_USB_NET_NET1080 is not set -+# CONFIG_USB_NET_CDC_SUBSET is not set -+# CONFIG_USB_NET_ZAURUS is not set -+CONFIG_USB_RTL8153_ECM=y -+# CONFIG_WLAN_VENDOR_ADMTEK is not set -+# CONFIG_WLAN_VENDOR_ATH is not set -+# CONFIG_WLAN_VENDOR_ATMEL is not set -+CONFIG_BRCMFMAC=y -+# CONFIG_WLAN_VENDOR_CISCO is not set -+# CONFIG_WLAN_VENDOR_INTEL is not set -+# CONFIG_WLAN_VENDOR_INTERSIL is not set -+# CONFIG_WLAN_VENDOR_MARVELL is not set -+# CONFIG_WLAN_VENDOR_MEDIATEK is not set -+# CONFIG_WLAN_VENDOR_MICROCHIP is not set -+CONFIG_RT2X00=y -+CONFIG_RT2800USB=y -+# CONFIG_RT2800USB_RT35XX is not set -+CONFIG_RT2800USB_RT53XX=y -+# CONFIG_WLAN_VENDOR_REALTEK is not set -+# CONFIG_WLAN_VENDOR_RSI is not set -+# CONFIG_WLAN_VENDOR_ST is not set -+# CONFIG_WLAN_VENDOR_TI is not set -+# CONFIG_WLAN_VENDOR_ZYDAS is not set -+# CONFIG_WLAN_VENDOR_QUANTENNA is not set -+CONFIG_INPUT_MOUSEDEV=y -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_EVDEV=y -+CONFIG_KEYBOARD_ADC=y -+# CONFIG_KEYBOARD_ATKBD is not set -+CONFIG_KEYBOARD_GPIO=y -+CONFIG_KEYBOARD_GPIO_POLLED=y -+CONFIG_KEYBOARD_SUN4I_LRADC=y -+# CONFIG_INPUT_MOUSE is not set -+CONFIG_INPUT_TOUCHSCREEN=y -+CONFIG_TOUCHSCREEN_EDT_FT5X06=y -+CONFIG_INPUT_MISC=y -+CONFIG_INPUT_GPIO_VIBRA=y -+CONFIG_INPUT_AXP20X_PEK=y -+# CONFIG_SERIO is not set -+# CONFIG_LEGACY_PTYS is not set -+CONFIG_SERIAL_8250=y -+# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -+CONFIG_SERIAL_8250_CONSOLE=y -+CONFIG_SERIAL_8250_NR_UARTS=8 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=8 -+CONFIG_SERIAL_8250_DW=y -+CONFIG_SERIAL_OF_PLATFORM=y -+CONFIG_SERIAL_DEV_BUS=y -+# CONFIG_HW_RANDOM is not set -+CONFIG_DEVKMEM=y -+CONFIG_I2C_CHARDEV=y -+CONFIG_I2C_MUX=y -+CONFIG_I2C_GPIO=y -+CONFIG_I2C_MV64XXX=y -+CONFIG_I2C_SUN6I_P2WI=y -+CONFIG_SPI=y -+CONFIG_SPI_SUN4I=y -+CONFIG_SPI_SUN6I=y -+CONFIG_SPI_SPIDEV=y -+CONFIG_PINCTRL_AXP209=y -+CONFIG_POWER_RESET=y -+CONFIG_POWER_RESET_GPIO=y -+CONFIG_POWER_RESET_GPIO_RESTART=y -+CONFIG_POWER_SUPPLY=y -+CONFIG_CHARGER_AXP20X=y -+CONFIG_BATTERY_AXP20X=y -+CONFIG_AXP20X_POWER=y -+# CONFIG_HWMON is not set -+CONFIG_THERMAL=y -+CONFIG_THERMAL_STATISTICS=y -+CONFIG_THERMAL_WRITABLE_TRIPS=y -+CONFIG_THERMAL_GOV_FAIR_SHARE=y -+CONFIG_THERMAL_GOV_BANG_BANG=y -+CONFIG_CPU_THERMAL=y -+CONFIG_SUN8I_THERMAL=y -+CONFIG_WATCHDOG=y -+CONFIG_SUNXI_WATCHDOG=y -+CONFIG_MFD_SUN4I_GPADC=y -+CONFIG_MFD_AXP20X_I2C=y -+CONFIG_MFD_AXP20X_RSB=y -+CONFIG_REGULATOR=y -+CONFIG_REGULATOR_FIXED_VOLTAGE=y -+CONFIG_REGULATOR_USERSPACE_CONSUMER=y -+CONFIG_REGULATOR_AXP20X=y -+CONFIG_REGULATOR_GPIO=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_REGULATOR_SY8106A=y -+CONFIG_RC_CORE=y -+CONFIG_LIRC=y -+CONFIG_BPF_LIRC_MODE2=y -+CONFIG_RC_DECODERS=y -+CONFIG_IR_NEC_DECODER=y -+CONFIG_IR_RC5_DECODER=y -+CONFIG_IR_RC6_DECODER=y -+CONFIG_IR_JVC_DECODER=y -+CONFIG_IR_SONY_DECODER=y -+CONFIG_IR_SANYO_DECODER=y -+CONFIG_IR_SHARP_DECODER=y -+CONFIG_IR_MCE_KBD_DECODER=y -+CONFIG_IR_XMP_DECODER=y -+CONFIG_RC_DEVICES=y -+CONFIG_IR_GPIO_CIR=y -+CONFIG_IR_SUNXI=y -+CONFIG_MEDIA_CEC_RC=y -+CONFIG_MEDIA_CEC_SUPPORT=y -+CONFIG_MEDIA_SUPPORT=y -+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -+CONFIG_MEDIA_CAMERA_SUPPORT=y -+CONFIG_MEDIA_PLATFORM_SUPPORT=y -+CONFIG_MEDIA_USB_SUPPORT=y -+CONFIG_USB_VIDEO_CLASS=y -+# CONFIG_USB_GSPCA is not set -+CONFIG_V4L_PLATFORM_DRIVERS=y -+CONFIG_VIDEO_SUN6I_CSI=y -+CONFIG_V4L_MEM2MEM_DRIVERS=y -+CONFIG_VIDEO_MEM2MEM_DEINTERLACE=y -+CONFIG_VIDEO_SUN8I_DEINTERLACE=y -+CONFIG_VIDEO_SUN8I_ROTATE=y -+# CONFIG_VIDEO_IR_I2C is not set -+CONFIG_DRM=y -+CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_SUN4I=y -+CONFIG_DRM_SUN4I_HDMI_CEC=y -+# CONFIG_DRM_SUN6I_DSI is not set -+CONFIG_DRM_SUN8I_DW_HDMI=y -+CONFIG_DRM_PANEL_LVDS=y -+CONFIG_DRM_DW_HDMI_AHB_AUDIO=y -+CONFIG_DRM_DW_HDMI_I2S_AUDIO=y -+CONFIG_DRM_DW_HDMI_CEC=y -+CONFIG_DRM_LIMA=y -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_BACKLIGHT_CLASS_DEVICE=y -+CONFIG_BACKLIGHT_PWM=y -+CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER=y -+CONFIG_LOGO=y -+# CONFIG_LOGO_LINUX_MONO is not set -+# CONFIG_LOGO_LINUX_VGA16 is not set -+CONFIG_SOUND=y -+CONFIG_SND=y -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=y -+CONFIG_SND_PCM_OSS=y -+CONFIG_SND_HRTIMER=y -+CONFIG_SND_SEQUENCER=y -+CONFIG_SND_SEQUENCER_OSS=y -+CONFIG_SND_DUMMY=y -+CONFIG_SND_ALOOP=y -+# CONFIG_SND_SPI is not set -+CONFIG_SND_USB_AUDIO=y -+CONFIG_SND_SOC=y -+CONFIG_SND_SUN4I_CODEC=y -+CONFIG_SND_SUN8I_CODEC=y -+CONFIG_SND_SUN8I_CODEC_ANALOG=y -+CONFIG_SND_SUN4I_I2S=y -+CONFIG_SND_SUN4I_SPDIF=y -+CONFIG_SND_SOC_SPDIF=y -+CONFIG_SND_SIMPLE_CARD=y -+CONFIG_SND_AUDIO_GRAPH_CARD=y -+CONFIG_HIDRAW=y -+# CONFIG_HID_A4TECH is not set -+# CONFIG_HID_APPLE is not set -+# CONFIG_HID_BELKIN is not set -+# CONFIG_HID_CHERRY is not set -+# CONFIG_HID_CHICONY is not set -+# CONFIG_HID_CYPRESS is not set -+# CONFIG_HID_EZKEY is not set -+# CONFIG_HID_ITE is not set -+# CONFIG_HID_KENSINGTON is not set -+# CONFIG_HID_LOGITECH is not set -+# CONFIG_HID_REDRAGON is not set -+# CONFIG_HID_MICROSOFT is not set -+# CONFIG_HID_MONTEREY is not set -+CONFIG_USB_HIDDEV=y -+CONFIG_USB_LED_TRIG=y -+CONFIG_USB=y -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -+CONFIG_USB_OTG=y -+CONFIG_USB_OTG_FSM=y -+CONFIG_USB_LEDS_TRIGGER_USBPORT=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_HCD_PLATFORM=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_HCD_PLATFORM=y -+CONFIG_USB_ACM=y -+CONFIG_USB_PRINTER=y -+CONFIG_USB_WDM=y -+CONFIG_USB_STORAGE=y -+CONFIG_USB_UAS=y -+CONFIG_USBIP_CORE=y -+CONFIG_USBIP_VHCI_HCD=y -+CONFIG_USBIP_HOST=y -+CONFIG_USBIP_VUDC=y -+CONFIG_USB_MUSB_HDRC=y -+CONFIG_USB_MUSB_SUNXI=y -+CONFIG_MUSB_PIO_ONLY=y -+CONFIG_USB_SERIAL=y -+CONFIG_USB_SERIAL_CH341=y -+CONFIG_USB_SERIAL_CP210X=y -+CONFIG_USB_SERIAL_FTDI_SIO=y -+CONFIG_USB_SERIAL_PL2303=y -+CONFIG_USB_SERIAL_OPTION=y -+CONFIG_NOP_USB_XCEIV=y -+CONFIG_USB_GADGET=y -+CONFIG_U_SERIAL_CONSOLE=y -+CONFIG_USB_CONFIGFS=y -+CONFIG_USB_CONFIGFS_SERIAL=y -+CONFIG_USB_CONFIGFS_ACM=y -+CONFIG_USB_CONFIGFS_OBEX=y -+CONFIG_USB_CONFIGFS_NCM=y -+CONFIG_USB_CONFIGFS_ECM=y -+CONFIG_USB_CONFIGFS_ECM_SUBSET=y -+CONFIG_USB_CONFIGFS_RNDIS=y -+CONFIG_USB_CONFIGFS_EEM=y -+CONFIG_USB_CONFIGFS_MASS_STORAGE=y -+CONFIG_USB_CONFIGFS_F_LB_SS=y -+CONFIG_USB_CONFIGFS_F_FS=y -+CONFIG_USB_CONFIGFS_F_UAC1=y -+CONFIG_USB_CONFIGFS_F_UAC2=y -+CONFIG_USB_CONFIGFS_F_MIDI=y -+CONFIG_USB_CONFIGFS_F_HID=y -+CONFIG_USB_CONFIGFS_F_PRINTER=y -+CONFIG_USB_CDC_COMPOSITE=y -+CONFIG_MMC=y -+CONFIG_MMC_SUNXI=y -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_ONESHOT=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_LEDS_TRIGGER_CPU=y -+CONFIG_LEDS_TRIGGER_ACTIVITY=y -+CONFIG_LEDS_TRIGGER_GPIO=y -+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -+CONFIG_LEDS_TRIGGER_PANIC=y -+CONFIG_LEDS_TRIGGER_NETDEV=y -+CONFIG_LEDS_TRIGGER_PATTERN=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_INTF_SYSFS is not set -+# CONFIG_RTC_INTF_PROC is not set -+CONFIG_RTC_DRV_AC100=y -+CONFIG_RTC_DRV_SUNXI=y -+CONFIG_DMADEVICES=y -+CONFIG_DMA_SUN6I=y -+CONFIG_DMABUF_HEAPS=y -+CONFIG_DMABUF_HEAPS_SYSTEM=y -+CONFIG_DMABUF_HEAPS_CMA=y -+# CONFIG_VIRTIO_MENU is not set -+# CONFIG_VHOST_MENU is not set -+CONFIG_STAGING=y -+CONFIG_STAGING_MEDIA=y -+CONFIG_VIDEO_SUNXI=y -+CONFIG_VIDEO_SUNXI_CEDRUS=y -+# CONFIG_CLK_SUNXI_CLOCKS is not set -+# CONFIG_CLK_SUNXI_PRCM_SUN9I is not set -+# CONFIG_SUN4I_A10_CCU is not set -+# CONFIG_SUN5I_CCU is not set -+# CONFIG_SUN6I_A31_CCU is not set -+# CONFIG_SUN8I_A23_CCU is not set -+# CONFIG_SUN8I_A33_CCU is not set -+# CONFIG_SUN8I_V3S_CCU is not set -+# CONFIG_SUN8I_R40_CCU is not set -+# CONFIG_IOMMU_SUPPORT is not set -+CONFIG_DEVFREQ_GOV_PERFORMANCE=y -+CONFIG_DEVFREQ_GOV_POWERSAVE=y -+CONFIG_DEVFREQ_GOV_USERSPACE=y -+CONFIG_DEVFREQ_GOV_PASSIVE=y -+CONFIG_PM_DEVFREQ_EVENT=y -+CONFIG_IIO=y -+CONFIG_IIO_CONFIGFS=y -+CONFIG_BMA180=y -+CONFIG_AXP20X_ADC=y -+CONFIG_LTR501=y -+CONFIG_AK8975=y -+CONFIG_PWM=y -+CONFIG_PWM_SUN4I=y -+CONFIG_PHY_SUN4I_USB=y -+CONFIG_ARM_CCI_PMU=y -+# CONFIG_ARM_CCI5xx_PMU is not set -+CONFIG_NVMEM_SUNXI_SID=y -+CONFIG_VALIDATE_FS_PARSER=y -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_POSIX_ACL=y -+CONFIG_XFS_FS=y -+CONFIG_XFS_POSIX_ACL=y -+CONFIG_F2FS_FS=y -+CONFIG_F2FS_FS_SECURITY=y -+CONFIG_F2FS_CHECK_FS=y -+CONFIG_F2FS_FS_COMPRESSION=y -+CONFIG_FS_ENCRYPTION=y -+CONFIG_FANOTIFY=y -+CONFIG_AUTOFS4_FS=y -+CONFIG_FUSE_FS=y -+CONFIG_CUSE=y -+CONFIG_OVERLAY_FS=y -+CONFIG_OVERLAY_FS_INDEX=y -+CONFIG_OVERLAY_FS_METACOPY=y -+CONFIG_FSCACHE=y -+CONFIG_VFAT_FS=y -+CONFIG_PROC_CHILDREN=y -+CONFIG_TMPFS=y -+CONFIG_TMPFS_POSIX_ACL=y -+CONFIG_ECRYPT_FS=y -+CONFIG_ECRYPT_FS_MESSAGING=y -+CONFIG_SQUASHFS=y -+CONFIG_SQUASHFS_FILE_DIRECT=y -+CONFIG_SQUASHFS_DECOMP_MULTI=y -+CONFIG_SQUASHFS_XATTR=y -+CONFIG_SQUASHFS_LZ4=y -+CONFIG_SQUASHFS_LZO=y -+CONFIG_SQUASHFS_XZ=y -+CONFIG_SQUASHFS_ZSTD=y -+CONFIG_NFS_FS=y -+# CONFIG_NFS_V2 is not set -+# CONFIG_NFS_V3 is not set -+CONFIG_NFS_V4=y -+CONFIG_NFS_V4_1=y -+CONFIG_NFS_V4_2=y -+CONFIG_NFS_FSCACHE=y -+CONFIG_NFSD=y -+CONFIG_NFSD_V3_ACL=y -+CONFIG_NFSD_V4=y -+CONFIG_CIFS=y -+CONFIG_CIFS_XATTR=y -+CONFIG_CIFS_POSIX=y -+# CONFIG_CIFS_DEBUG is not set -+CONFIG_NLS_CODEPAGE_437=y -+CONFIG_NLS_CODEPAGE_852=y -+CONFIG_NLS_ISO8859_1=y -+CONFIG_NLS_ISO8859_2=y -+CONFIG_NLS_UTF8=y -+CONFIG_PERSISTENT_KEYRINGS=y -+CONFIG_ENCRYPTED_KEYS=y -+CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" -+CONFIG_CRYPTO_PCRYPT=y -+CONFIG_CRYPTO_CURVE25519=y -+CONFIG_CRYPTO_CHACHA20POLY1305=y -+CONFIG_CRYPTO_SEQIV=y -+CONFIG_CRYPTO_ECHAINIV=y -+CONFIG_CRYPTO_BLAKE2B=y -+CONFIG_CRYPTO_BLAKE2S=y -+CONFIG_CRYPTO_AES_TI=y -+CONFIG_CRYPTO_ARC4=y -+CONFIG_CRYPTO_SALSA20=y -+CONFIG_CRYPTO_DEFLATE=y -+CONFIG_CRYPTO_LZO=y -+CONFIG_CRYPTO_LZ4=y -+CONFIG_CRYPTO_ZSTD=y -+CONFIG_CRYPTO_ANSI_CPRNG=y -+CONFIG_CRYPTO_USER_API_HASH=y -+CONFIG_CRYPTO_USER_API_SKCIPHER=y -+CONFIG_CRYPTO_USER_API_RNG=y -+CONFIG_CRYPTO_USER_API_AEAD=y -+CONFIG_CRYPTO_DEV_SUN4I_SS=y -+CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y -+CONFIG_CRYPTO_DEV_SUN8I_CE=y -+CONFIG_CRYPTO_DEV_SUN8I_SS=y -+CONFIG_PKCS8_PRIVATE_KEY_PARSER=y -+CONFIG_DMA_CMA=y -+CONFIG_CMA_SIZE_MBYTES=128 -+CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15 -+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -+CONFIG_MAGIC_SYSRQ=y -+CONFIG_DEBUG_FS=y -+CONFIG_DEBUG_KERNEL=y -+CONFIG_DETECT_HUNG_TASK=y -+CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -+CONFIG_WQ_WATCHDOG=y -+# CONFIG_SCHED_DEBUG is not set -+# CONFIG_RCU_TRACE is not set -+# CONFIG_FTRACE is not set -+# CONFIG_RUNTIME_TESTING_MENU is not set -diff --git a/arch/arm/configs/pocketbook_touch_lux_3_defconfig b/arch/arm/configs/pocketbook_touch_lux_3_defconfig -new file mode 100644 -index 000000000000..8ec46d313d1e ---- /dev/null -+++ b/arch/arm/configs/pocketbook_touch_lux_3_defconfig -@@ -0,0 +1,425 @@ -+CONFIG_KERNEL_LZ4=y -+CONFIG_SYSVIPC=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_HZ_PERIODIC=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_PREEMPT=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+CONFIG_TASK_XACCT=y -+CONFIG_TASK_IO_ACCOUNTING=y -+CONFIG_MEMCG=y -+CONFIG_BLK_CGROUP=y -+CONFIG_RT_GROUP_SCHED=y -+CONFIG_CGROUP_PIDS=y -+CONFIG_CGROUP_DEVICE=y -+CONFIG_CGROUP_BPF=y -+CONFIG_USER_NS=y -+CONFIG_SCHED_AUTOGROUP=y -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+# CONFIG_RD_XZ is not set -+# CONFIG_RD_LZO is not set -+CONFIG_BOOT_CONFIG=y -+CONFIG_BPF_SYSCALL=y -+CONFIG_PERF_EVENTS=y -+CONFIG_ARCH_SUNXI=y -+# CONFIG_MACH_SUN4I is not set -+# CONFIG_MACH_SUN6I is not set -+# CONFIG_MACH_SUN7I is not set -+# CONFIG_MACH_SUN8I is not set -+# CONFIG_MACH_SUN9I is not set -+CONFIG_ARM_ERRATA_430973=y -+CONFIG_ARM_ERRATA_814220=y -+CONFIG_HAVE_ARM_ARCH_TIMER=y -+CONFIG_ARM_PSCI=y -+CONFIG_HZ_1000=y -+# CONFIG_ARM_MODULE_PLTS is not set -+CONFIG_ZBOOT_ROM_TEXT=0 -+CONFIG_ZBOOT_ROM_BSS=0 -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_STAT=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+CONFIG_CPUFREQ_DT=y -+CONFIG_CPU_IDLE=y -+CONFIG_CPU_IDLE_GOV_LADDER=y -+CONFIG_ARM_CPUIDLE=y -+CONFIG_VFP=y -+CONFIG_NEON=y -+CONFIG_KERNEL_MODE_NEON=y -+CONFIG_PM_WAKELOCKS=y -+CONFIG_PM_DEBUG=y -+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -+CONFIG_CRYPTO_SHA1_ARM_NEON=y -+CONFIG_CRYPTO_SHA1_ARM_CE=y -+CONFIG_CRYPTO_SHA2_ARM_CE=y -+CONFIG_CRYPTO_SHA512_ARM=y -+CONFIG_CRYPTO_AES_ARM=y -+CONFIG_CRYPTO_AES_ARM_BS=y -+CONFIG_CRYPTO_AES_ARM_CE=y -+CONFIG_CRYPTO_GHASH_ARM_CE=y -+CONFIG_CRYPTO_CRCT10DIF_ARM_CE=y -+CONFIG_CRYPTO_CRC32_ARM_CE=y -+CONFIG_CRYPTO_CHACHA20_NEON=y -+CONFIG_CRYPTO_POLY1305_ARM=y -+CONFIG_CRYPTO_CURVE25519_NEON=y -+CONFIG_JUMP_LABEL=y -+# CONFIG_STACKPROTECTOR is not set -+CONFIG_MODULES=y -+CONFIG_MODULE_FORCE_LOAD=y -+CONFIG_MODULE_UNLOAD=y -+CONFIG_MODVERSIONS=y -+CONFIG_BLK_DEV_INTEGRITY=y -+CONFIG_BLK_DEV_THROTTLING=y -+CONFIG_BLK_WBT=y -+CONFIG_BLK_CGROUP_IOLATENCY=y -+# CONFIG_MQ_IOSCHED_DEADLINE is not set -+# CONFIG_MQ_IOSCHED_KYBER is not set -+CONFIG_IOSCHED_BFQ=y -+CONFIG_BFQ_GROUP_IOSCHED=y -+CONFIG_CMA=y -+CONFIG_CMA_DEBUGFS=y -+CONFIG_ZPOOL=y -+CONFIG_ZBUD=y -+CONFIG_Z3FOLD=y -+CONFIG_ZSMALLOC=y -+CONFIG_NET=y -+CONFIG_PACKET=y -+CONFIG_PACKET_DIAG=y -+CONFIG_UNIX=y -+CONFIG_UNIX_DIAG=y -+CONFIG_XFRM_USER=m -+CONFIG_XFRM_SUB_POLICY=y -+CONFIG_INET=y -+CONFIG_SYN_COOKIES=y -+# CONFIG_INET_DIAG is not set -+CONFIG_MPTCP=y -+CONFIG_NETFILTER=y -+CONFIG_NETFILTER_NETLINK_QUEUE=m -+CONFIG_NETFILTER_NETLINK_LOG=m -+CONFIG_NF_CONNTRACK=m -+CONFIG_NF_LOG_NETDEV=m -+CONFIG_NF_CONNTRACK_MARK=y -+# CONFIG_NF_CONNTRACK_PROCFS is not set -+# CONFIG_NF_CT_PROTO_DCCP is not set -+# CONFIG_NF_CT_PROTO_SCTP is not set -+# CONFIG_NF_CT_PROTO_UDPLITE is not set -+CONFIG_NF_CONNTRACK_FTP=m -+CONFIG_NF_CONNTRACK_H323=m -+CONFIG_NF_CONNTRACK_IRC=m -+CONFIG_NF_CONNTRACK_NETBIOS_NS=m -+CONFIG_NF_CONNTRACK_SNMP=m -+CONFIG_NF_CONNTRACK_PPTP=m -+CONFIG_NF_CONNTRACK_SIP=m -+CONFIG_NF_CONNTRACK_TFTP=m -+CONFIG_NF_CT_NETLINK=m -+CONFIG_NETFILTER_NETLINK_GLUE_CT=y -+CONFIG_NF_TABLES=m -+CONFIG_NF_TABLES_NETDEV=y -+CONFIG_NFT_NUMGEN=m -+CONFIG_NFT_CT=m -+CONFIG_NFT_COUNTER=m -+CONFIG_NFT_CONNLIMIT=m -+CONFIG_NFT_LOG=m -+CONFIG_NFT_LIMIT=m -+CONFIG_NFT_MASQ=m -+CONFIG_NFT_REDIR=m -+CONFIG_NFT_NAT=m -+CONFIG_NFT_TUNNEL=m -+CONFIG_NFT_OBJREF=m -+CONFIG_NFT_QUEUE=m -+CONFIG_NFT_QUOTA=m -+CONFIG_NFT_REJECT=m -+CONFIG_NFT_HASH=m -+CONFIG_NFT_SOCKET=m -+CONFIG_NFT_OSF=m -+CONFIG_NFT_DUP_NETDEV=m -+CONFIG_NFT_FWD_NETDEV=m -+CONFIG_NF_FLOW_TABLE_INET=m -+CONFIG_NF_FLOW_TABLE=m -+CONFIG_IP_SET=m -+CONFIG_IP_SET_BITMAP_IP=m -+CONFIG_IP_SET_BITMAP_IPMAC=m -+CONFIG_IP_SET_BITMAP_PORT=m -+CONFIG_IP_SET_HASH_IP=m -+CONFIG_IP_SET_HASH_IPMARK=m -+CONFIG_IP_SET_HASH_IPPORT=m -+CONFIG_IP_SET_HASH_IPPORTIP=m -+CONFIG_IP_SET_HASH_IPPORTNET=m -+CONFIG_IP_SET_HASH_IPMAC=m -+CONFIG_IP_SET_HASH_MAC=m -+CONFIG_IP_SET_HASH_NETPORTNET=m -+CONFIG_IP_SET_HASH_NET=m -+CONFIG_IP_SET_HASH_NETNET=m -+CONFIG_IP_SET_HASH_NETPORT=m -+CONFIG_IP_SET_HASH_NETIFACE=m -+CONFIG_IP_SET_LIST_SET=m -+CONFIG_NF_SOCKET_IPV4=y -+CONFIG_NF_TABLES_IPV4=y -+CONFIG_NFT_DUP_IPV4=m -+CONFIG_NFT_FIB_IPV4=m -+CONFIG_NF_TABLES_ARP=y -+CONFIG_NF_FLOW_TABLE_IPV4=m -+CONFIG_NF_LOG_ARP=y -+CONFIG_NF_LOG_IPV4=y -+CONFIG_NF_REJECT_IPV4=y -+# CONFIG_NF_NAT_SNMP_BASIC is not set -+CONFIG_CFG80211=y -+CONFIG_CFG80211_DEBUGFS=y -+CONFIG_CFG80211_WEXT=y -+CONFIG_MAC80211=y -+CONFIG_MAC80211_LEDS=y -+CONFIG_MAC80211_DEBUGFS=y -+CONFIG_UEVENT_HELPER=y -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+#CONFIG_EXTRA_FIRMWARE="regulatory.db regulatory.db.p7s rtlwifi/rtl8188eufw.bin" -+#CONFIG_EXTRA_FIRMWARE_DIR="/workspace/megous.com/orangepi-pc/firmware" -+# CONFIG_FW_CACHE is not set -+CONFIG_SUNXI_RSB=y -+CONFIG_MTD=y -+# CONFIG_MTD_OF_PARTS is not set -+CONFIG_MTD_BLOCK_RO=y -+CONFIG_MTD_SPI_NOR=m -+CONFIG_OF_OVERLAY=y -+CONFIG_ZRAM=y -+CONFIG_ZRAM_WRITEBACK=y -+CONFIG_ZRAM_MEMORY_TRACKING=y -+CONFIG_BLK_DEV_LOOP=y -+CONFIG_BLK_DEV_NBD=y -+CONFIG_SCSI=y -+CONFIG_BLK_DEV_SD=y -+# CONFIG_SCSI_LOWLEVEL is not set -+CONFIG_NETDEVICES=y -+CONFIG_WIREGUARD=m -+CONFIG_TUN=y -+# CONFIG_ETHERNET is not set -+# CONFIG_USB_NET_DRIVERS is not set -+# CONFIG_WLAN_VENDOR_ADMTEK is not set -+# CONFIG_WLAN_VENDOR_ATH is not set -+# CONFIG_WLAN_VENDOR_ATMEL is not set -+# CONFIG_WLAN_VENDOR_BROADCOM is not set -+# CONFIG_WLAN_VENDOR_CISCO is not set -+# CONFIG_WLAN_VENDOR_INTEL is not set -+# CONFIG_WLAN_VENDOR_INTERSIL is not set -+# CONFIG_WLAN_VENDOR_MARVELL is not set -+# CONFIG_WLAN_VENDOR_MEDIATEK is not set -+# CONFIG_WLAN_VENDOR_RALINK is not set -+# CONFIG_WLAN_VENDOR_REALTEK is not set -+# CONFIG_WLAN_VENDOR_RSI is not set -+# CONFIG_WLAN_VENDOR_ST is not set -+# CONFIG_WLAN_VENDOR_TI is not set -+# CONFIG_WLAN_VENDOR_ZYDAS is not set -+# CONFIG_WLAN_VENDOR_QUANTENNA is not set -+CONFIG_INPUT_EVDEV=y -+# CONFIG_KEYBOARD_ATKBD is not set -+CONFIG_KEYBOARD_GPIO=y -+CONFIG_KEYBOARD_GPIO_POLLED=y -+CONFIG_KEYBOARD_SUN4I_LRADC=y -+# CONFIG_INPUT_MOUSE is not set -+CONFIG_INPUT_TOUCHSCREEN=y -+CONFIG_TOUCHSCREEN_CYTTSP4_CORE=m -+CONFIG_TOUCHSCREEN_CYTTSP4_I2C=m -+CONFIG_INPUT_MISC=y -+CONFIG_INPUT_AXP20X_PEK=y -+# CONFIG_SERIO is not set -+# CONFIG_LEGACY_PTYS is not set -+CONFIG_SERIAL_8250=y -+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -+# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -+CONFIG_SERIAL_8250_CONSOLE=y -+CONFIG_SERIAL_8250_NR_UARTS=8 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=8 -+CONFIG_SERIAL_8250_DW=y -+CONFIG_SERIAL_OF_PLATFORM=y -+CONFIG_SERIAL_DEV_BUS=y -+# CONFIG_HW_RANDOM is not set -+CONFIG_DEVKMEM=y -+CONFIG_I2C_CHARDEV=y -+CONFIG_I2C_MUX=y -+CONFIG_I2C_GPIO=y -+CONFIG_I2C_MV64XXX=y -+CONFIG_SPI=y -+CONFIG_SPI_SUN4I=y -+CONFIG_SPI_SPIDEV=y -+CONFIG_PINCTRL_AXP209=y -+CONFIG_POWER_SUPPLY=y -+CONFIG_CHARGER_AXP20X=y -+CONFIG_BATTERY_AXP20X=y -+CONFIG_AXP20X_POWER=y -+CONFIG_SENSORS_NTC_THERMISTOR=y -+CONFIG_THERMAL=y -+CONFIG_THERMAL_STATISTICS=y -+CONFIG_THERMAL_WRITABLE_TRIPS=y -+CONFIG_THERMAL_GOV_FAIR_SHARE=y -+CONFIG_THERMAL_GOV_BANG_BANG=y -+CONFIG_CPU_THERMAL=y -+CONFIG_WATCHDOG=y -+CONFIG_SUNXI_WATCHDOG=y -+CONFIG_MFD_SUN4I_GPADC=y -+CONFIG_MFD_AXP20X_I2C=y -+CONFIG_MFD_SUN6I_PRCM=y -+CONFIG_MFD_SYSCON=y -+CONFIG_REGULATOR=y -+CONFIG_REGULATOR_FIXED_VOLTAGE=y -+CONFIG_REGULATOR_USERSPACE_CONSUMER_OF=y -+CONFIG_REGULATOR_AXP20X=y -+CONFIG_REGULATOR_GPIO=y -+CONFIG_REGULATOR_TP65185X=y -+CONFIG_DRM=y -+CONFIG_FB_SUN5I_EINK=m -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_BACKLIGHT_CLASS_DEVICE=y -+CONFIG_BACKLIGHT_PWM=y -+# CONFIG_HID is not set -+# CONFIG_USB_HID is not set -+CONFIG_USB_LED_TRIG=y -+CONFIG_USB=m -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -+CONFIG_USB_OTG=y -+CONFIG_USB_OTG_FSM=m -+CONFIG_USB_LEDS_TRIGGER_USBPORT=m -+CONFIG_USB_EHCI_HCD=m -+CONFIG_USB_EHCI_HCD_PLATFORM=m -+CONFIG_USB_OHCI_HCD=m -+CONFIG_USB_OHCI_HCD_PLATFORM=m -+CONFIG_USB_WDM=m -+CONFIG_USB_MUSB_HDRC=m -+CONFIG_USB_MUSB_SUNXI=m -+CONFIG_MUSB_PIO_ONLY=y -+CONFIG_NOP_USB_XCEIV=m -+CONFIG_USB_GADGET=m -+CONFIG_U_SERIAL_CONSOLE=y -+CONFIG_USB_CONFIGFS=m -+CONFIG_USB_CONFIGFS_SERIAL=y -+CONFIG_USB_CONFIGFS_ACM=y -+CONFIG_USB_CONFIGFS_OBEX=y -+CONFIG_USB_CONFIGFS_NCM=y -+CONFIG_USB_CONFIGFS_ECM=y -+CONFIG_USB_CONFIGFS_ECM_SUBSET=y -+CONFIG_USB_CONFIGFS_RNDIS=y -+CONFIG_USB_CONFIGFS_EEM=y -+CONFIG_USB_CONFIGFS_MASS_STORAGE=y -+CONFIG_USB_CONFIGFS_F_LB_SS=y -+CONFIG_USB_CONFIGFS_F_FS=y -+CONFIG_USB_CONFIGFS_F_HID=y -+CONFIG_USB_CONFIGFS_F_PRINTER=y -+CONFIG_USB_CDC_COMPOSITE=m -+CONFIG_MMC=y -+CONFIG_MMC_SUNXI=y -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_ONESHOT=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_LEDS_TRIGGER_CPU=y -+CONFIG_LEDS_TRIGGER_ACTIVITY=y -+CONFIG_LEDS_TRIGGER_GPIO=y -+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -+CONFIG_LEDS_TRIGGER_PANIC=y -+CONFIG_LEDS_TRIGGER_NETDEV=y -+CONFIG_LEDS_TRIGGER_PATTERN=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_INTF_SYSFS is not set -+# CONFIG_RTC_INTF_PROC is not set -+CONFIG_RTC_DRV_PCF8563=y -+CONFIG_DMADEVICES=y -+# CONFIG_VIRTIO_MENU is not set -+# CONFIG_VHOST_MENU is not set -+CONFIG_STAGING=y -+CONFIG_R8188EU=m -+# CONFIG_CLK_SUNXI_PRCM_SUN6I is not set -+# CONFIG_CLK_SUNXI_PRCM_SUN8I is not set -+# CONFIG_CLK_SUNXI_PRCM_SUN9I is not set -+CONFIG_SUN8I_R_CCU=y -+# CONFIG_IOMMU_SUPPORT is not set -+CONFIG_PM_DEVFREQ=y -+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -+CONFIG_DEVFREQ_GOV_PERFORMANCE=y -+CONFIG_DEVFREQ_GOV_POWERSAVE=y -+CONFIG_DEVFREQ_GOV_USERSPACE=y -+CONFIG_DEVFREQ_GOV_PASSIVE=y -+CONFIG_PM_DEVFREQ_EVENT=y -+CONFIG_IIO=y -+CONFIG_IIO_CONFIGFS=y -+CONFIG_BMA180=y -+CONFIG_AXP20X_ADC=y -+CONFIG_SUN4I_GPADC=m -+CONFIG_LTR501=y -+CONFIG_AK8975=y -+CONFIG_PWM=y -+CONFIG_PWM_SUN4I=y -+CONFIG_PHY_SUN4I_USB=y -+CONFIG_ARM_CCI_PMU=y -+# CONFIG_ARM_CCI5xx_PMU is not set -+CONFIG_NVMEM_SUNXI_SID=y -+CONFIG_VALIDATE_FS_PARSER=y -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_POSIX_ACL=y -+CONFIG_F2FS_FS=y -+CONFIG_F2FS_FS_SECURITY=y -+CONFIG_F2FS_CHECK_FS=y -+CONFIG_F2FS_FS_COMPRESSION=y -+CONFIG_FS_ENCRYPTION=y -+CONFIG_FANOTIFY=y -+CONFIG_AUTOFS4_FS=y -+CONFIG_FUSE_FS=y -+CONFIG_CUSE=y -+CONFIG_VFAT_FS=y -+CONFIG_PROC_CHILDREN=y -+CONFIG_TMPFS=y -+CONFIG_TMPFS_POSIX_ACL=y -+# CONFIG_MISC_FILESYSTEMS is not set -+# CONFIG_NETWORK_FILESYSTEMS is not set -+CONFIG_NLS_CODEPAGE_437=y -+CONFIG_NLS_CODEPAGE_852=y -+CONFIG_NLS_ISO8859_1=y -+CONFIG_NLS_ISO8859_2=y -+CONFIG_NLS_UTF8=y -+CONFIG_PERSISTENT_KEYRINGS=y -+CONFIG_ENCRYPTED_KEYS=y -+CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" -+CONFIG_CRYPTO_ECDH=y -+CONFIG_CRYPTO_CURVE25519=y -+CONFIG_CRYPTO_CHACHA20POLY1305=y -+CONFIG_CRYPTO_SEQIV=y -+CONFIG_CRYPTO_ECHAINIV=y -+CONFIG_CRYPTO_ESSIV=y -+CONFIG_CRYPTO_BLAKE2B=y -+CONFIG_CRYPTO_BLAKE2S=y -+CONFIG_CRYPTO_MD4=y -+CONFIG_CRYPTO_AES_TI=y -+CONFIG_CRYPTO_ARC4=y -+CONFIG_CRYPTO_DES=y -+CONFIG_CRYPTO_SALSA20=y -+CONFIG_CRYPTO_DEFLATE=y -+CONFIG_CRYPTO_LZO=y -+CONFIG_CRYPTO_LZ4=y -+CONFIG_CRYPTO_ZSTD=y -+CONFIG_CRYPTO_ANSI_CPRNG=y -+CONFIG_CRYPTO_USER_API_HASH=y -+CONFIG_CRYPTO_USER_API_SKCIPHER=y -+CONFIG_CRYPTO_USER_API_RNG=y -+CONFIG_CRYPTO_USER_API_AEAD=y -+CONFIG_CRYPTO_LIB_BLAKE2S=y -+CONFIG_CRYPTO_LIB_CURVE25519=y -+CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y -+CONFIG_CRYPTO_DEV_SUN4I_SS=y -+CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y -+CONFIG_PKCS8_PRIVATE_KEY_PARSER=y -+CONFIG_CRC_CCITT=y -+CONFIG_CRC_ITU_T=y -+CONFIG_LIBCRC32C=y -+CONFIG_DMA_CMA=y -+CONFIG_CMA_SIZE_MBYTES=128 -+CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15 -+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -+CONFIG_DEBUG_FS=y -+# CONFIG_RUNTIME_TESTING_MENU is not set -diff --git a/arch/arm/configs/tbs_a711_defconfig b/arch/arm/configs/tbs_a711_defconfig -new file mode 100644 -index 000000000000..49e0c90adeec ---- /dev/null -+++ b/arch/arm/configs/tbs_a711_defconfig -@@ -0,0 +1,538 @@ -+CONFIG_KERNEL_LZ4=y -+CONFIG_SYSVIPC=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_PREEMPT_VOLUNTARY=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+CONFIG_TASK_XACCT=y -+CONFIG_TASK_IO_ACCOUNTING=y -+CONFIG_LOG_BUF_SHIFT=18 -+CONFIG_MEMCG=y -+CONFIG_BLK_CGROUP=y -+CONFIG_RT_GROUP_SCHED=y -+CONFIG_CGROUP_PIDS=y -+CONFIG_CPUSETS=y -+# CONFIG_PROC_PID_CPUSET is not set -+CONFIG_CGROUP_DEVICE=y -+CONFIG_CGROUP_BPF=y -+CONFIG_USER_NS=y -+CONFIG_SCHED_AUTOGROUP=y -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+# CONFIG_RD_XZ is not set -+# CONFIG_RD_LZO is not set -+CONFIG_BPF_SYSCALL=y -+CONFIG_PERF_EVENTS=y -+CONFIG_ARCH_SUNXI=y -+# CONFIG_MACH_SUN9I is not set -+CONFIG_ARM_ERRATA_814220=y -+CONFIG_SMP=y -+CONFIG_SCHED_MC=y -+CONFIG_MCPM=y -+CONFIG_NR_CPUS=8 -+CONFIG_HZ_1000=y -+CONFIG_HIGHMEM=y -+# CONFIG_ARM_MODULE_PLTS is not set -+CONFIG_ZBOOT_ROM_TEXT=0 -+CONFIG_ZBOOT_ROM_BSS=0 -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_STAT=y -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -+CONFIG_CPUFREQ_DT=y -+CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=y -+CONFIG_CPU_IDLE=y -+CONFIG_CPU_IDLE_GOV_LADDER=y -+CONFIG_ARM_CPUIDLE=y -+CONFIG_VFP=y -+CONFIG_NEON=y -+CONFIG_KERNEL_MODE_NEON=y -+CONFIG_PM_WAKELOCKS=y -+CONFIG_PM_DEBUG=y -+CONFIG_PM_ADVANCED_DEBUG=y -+CONFIG_APM_EMULATION=y -+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -+CONFIG_ARM_SCPI_PROTOCOL=m -+# CONFIG_ARM_SCPI_POWER_DOMAIN is not set -+CONFIG_CRYPTO_SHA1_ARM_NEON=y -+CONFIG_CRYPTO_SHA1_ARM_CE=y -+CONFIG_CRYPTO_SHA2_ARM_CE=y -+CONFIG_CRYPTO_SHA512_ARM=y -+CONFIG_CRYPTO_AES_ARM=y -+CONFIG_CRYPTO_AES_ARM_BS=y -+CONFIG_CRYPTO_AES_ARM_CE=y -+CONFIG_CRYPTO_CRC32_ARM_CE=y -+CONFIG_CRYPTO_POLY1305_ARM=y -+CONFIG_CRYPTO_CURVE25519_NEON=y -+CONFIG_JUMP_LABEL=y -+# CONFIG_STACKPROTECTOR is not set -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+CONFIG_BLK_DEV_INTEGRITY=y -+CONFIG_BLK_DEV_THROTTLING=y -+CONFIG_BLK_WBT=y -+CONFIG_BLK_CGROUP_IOLATENCY=y -+# CONFIG_MQ_IOSCHED_DEADLINE is not set -+# CONFIG_MQ_IOSCHED_KYBER is not set -+CONFIG_IOSCHED_BFQ=y -+CONFIG_CMA=y -+CONFIG_CMA_DEBUGFS=y -+CONFIG_ZPOOL=y -+CONFIG_ZBUD=y -+CONFIG_Z3FOLD=y -+CONFIG_ZSMALLOC=y -+CONFIG_NET=y -+CONFIG_PACKET=y -+CONFIG_PACKET_DIAG=y -+CONFIG_UNIX=y -+CONFIG_UNIX_DIAG=y -+CONFIG_INET=y -+CONFIG_IP_ADVANCED_ROUTER=y -+CONFIG_SYN_COOKIES=y -+CONFIG_INET_DIAG=m -+CONFIG_INET_UDP_DIAG=m -+CONFIG_INET_RAW_DIAG=m -+# CONFIG_IPV6_SIT is not set -+CONFIG_MPTCP=y -+CONFIG_NETFILTER=y -+CONFIG_BRIDGE_NETFILTER=m -+CONFIG_NETFILTER_NETLINK_ACCT=m -+CONFIG_NETFILTER_NETLINK_QUEUE=m -+CONFIG_NETFILTER_NETLINK_LOG=m -+CONFIG_NF_CONNTRACK=m -+CONFIG_NF_LOG_NETDEV=m -+CONFIG_NF_CONNTRACK_MARK=y -+# CONFIG_NF_CONNTRACK_PROCFS is not set -+# CONFIG_NF_CT_PROTO_DCCP is not set -+# CONFIG_NF_CT_PROTO_SCTP is not set -+# CONFIG_NF_CT_PROTO_UDPLITE is not set -+CONFIG_NF_CONNTRACK_FTP=m -+CONFIG_NF_CONNTRACK_IRC=m -+CONFIG_NF_CONNTRACK_NETBIOS_NS=m -+CONFIG_NF_CONNTRACK_SIP=m -+CONFIG_NF_CT_NETLINK=m -+CONFIG_NETFILTER_NETLINK_GLUE_CT=y -+CONFIG_NF_TABLES=m -+CONFIG_NF_TABLES_INET=y -+CONFIG_NFT_NUMGEN=m -+CONFIG_NFT_CT=m -+CONFIG_NFT_COUNTER=m -+CONFIG_NFT_CONNLIMIT=m -+CONFIG_NFT_LOG=m -+CONFIG_NFT_LIMIT=m -+CONFIG_NFT_MASQ=m -+CONFIG_NFT_REDIR=m -+CONFIG_NFT_NAT=m -+CONFIG_NFT_TUNNEL=m -+CONFIG_NFT_OBJREF=m -+CONFIG_NFT_QUEUE=m -+CONFIG_NFT_QUOTA=m -+CONFIG_NFT_REJECT=m -+CONFIG_NFT_HASH=m -+CONFIG_NFT_FIB_INET=m -+CONFIG_NFT_SOCKET=m -+CONFIG_NFT_OSF=m -+CONFIG_NF_FLOW_TABLE_INET=m -+CONFIG_NF_FLOW_TABLE=m -+CONFIG_IP_SET=m -+CONFIG_IP_SET_BITMAP_IP=m -+CONFIG_IP_SET_BITMAP_IPMAC=m -+CONFIG_IP_SET_BITMAP_PORT=m -+CONFIG_IP_SET_HASH_IP=m -+CONFIG_IP_SET_HASH_IPMARK=m -+CONFIG_IP_SET_HASH_IPPORT=m -+CONFIG_IP_SET_HASH_IPPORTIP=m -+CONFIG_IP_SET_HASH_IPPORTNET=m -+CONFIG_IP_SET_HASH_IPMAC=m -+CONFIG_IP_SET_HASH_MAC=m -+CONFIG_IP_SET_HASH_NETPORTNET=m -+CONFIG_IP_SET_HASH_NET=m -+CONFIG_IP_SET_HASH_NETNET=m -+CONFIG_IP_SET_HASH_NETPORT=m -+CONFIG_IP_SET_HASH_NETIFACE=m -+CONFIG_IP_SET_LIST_SET=m -+CONFIG_NFT_DUP_IPV4=m -+CONFIG_NFT_FIB_IPV4=m -+CONFIG_NF_TABLES_ARP=y -+CONFIG_NF_FLOW_TABLE_IPV4=m -+CONFIG_NF_LOG_ARP=m -+CONFIG_NF_LOG_IPV4=m -+CONFIG_NFT_DUP_IPV6=m -+CONFIG_NFT_FIB_IPV6=m -+CONFIG_NF_FLOW_TABLE_IPV6=m -+CONFIG_NF_LOG_IPV6=m -+CONFIG_NF_TABLES_BRIDGE=m -+CONFIG_NFT_BRIDGE_REJECT=m -+CONFIG_NF_LOG_BRIDGE=m -+CONFIG_BRIDGE=m -+CONFIG_NET_SCHED=y -+CONFIG_NET_SCH_CBQ=y -+CONFIG_NET_SCH_HTB=y -+CONFIG_NET_CLS_BASIC=y -+CONFIG_NET_CLS_ROUTE4=y -+CONFIG_NET_CLS_FW=y -+CONFIG_NET_CLS_CGROUP=y -+CONFIG_NET_CLS_MATCHALL=y -+CONFIG_NET_CLS_ACT=y -+CONFIG_NET_ACT_POLICE=y -+CONFIG_NET_ACT_GACT=y -+CONFIG_BT=m -+CONFIG_BT_RFCOMM=m -+CONFIG_BT_RFCOMM_TTY=y -+CONFIG_BT_BNEP=m -+CONFIG_BT_BNEP_MC_FILTER=y -+CONFIG_BT_BNEP_PROTO_FILTER=y -+CONFIG_BT_HIDP=m -+CONFIG_BT_HS=y -+CONFIG_BT_LEDS=y -+CONFIG_BT_HCIBTSDIO=m -+CONFIG_BT_HCIUART=m -+CONFIG_BT_HCIUART_BCM=y -+CONFIG_CFG80211=y -+CONFIG_CFG80211_DEBUGFS=y -+CONFIG_MAC80211=y -+CONFIG_MAC80211_LEDS=y -+CONFIG_RFKILL=y -+CONFIG_RFKILL_GPIO=y -+CONFIG_NFC=m -+CONFIG_NFC_DIGITAL=m -+CONFIG_NFC_NCI=m -+CONFIG_NFC_NXP_NCI=m -+CONFIG_NFC_NXP_NCI_I2C=m -+CONFIG_UEVENT_HELPER=y -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+#CONFIG_EXTRA_FIRMWARE="regulatory.db regulatory.db.p7s brcm/brcmfmac43362-sdio.bin brcm/brcmfmac43362-sdio.txt brcm/BCM20702A1.hcd hm5065-af.bin hm5065-init.bin brcm/brcmfmac43362-sdio.tbs-biometrics,a711.txt" -+#CONFIG_EXTRA_FIRMWARE_DIR="/workspace/megous.com/orangepi-pc/firmware" -+# CONFIG_FW_CACHE is not set -+CONFIG_GNSS=y -+CONFIG_GNSS_SIRF_SERIAL=y -+CONFIG_GNSS_UBX_SERIAL=y -+CONFIG_OF_OVERLAY=y -+CONFIG_ZRAM=y -+CONFIG_ZRAM_WRITEBACK=y -+CONFIG_ZRAM_MEMORY_TRACKING=y -+CONFIG_BLK_DEV_LOOP=m -+CONFIG_BLK_DEV_NBD=m -+CONFIG_MODEM_POWER=m -+CONFIG_MD=y -+CONFIG_BLK_DEV_DM=y -+CONFIG_DM_CRYPT=y -+CONFIG_DM_INIT=y -+CONFIG_NETDEVICES=y -+CONFIG_WIREGUARD=m -+CONFIG_TUN=m -+CONFIG_VETH=m -+# CONFIG_ETHERNET is not set -+CONFIG_PPP=m -+CONFIG_PPP_BSDCOMP=m -+CONFIG_PPP_DEFLATE=m -+CONFIG_PPP_FILTER=y -+CONFIG_PPP_MPPE=m -+CONFIG_PPP_ASYNC=m -+CONFIG_PPP_SYNC_TTY=m -+# CONFIG_USB_NET_DRIVERS is not set -+# CONFIG_WLAN_VENDOR_ADMTEK is not set -+# CONFIG_WLAN_VENDOR_ATH is not set -+# CONFIG_WLAN_VENDOR_ATMEL is not set -+CONFIG_BRCMFMAC=m -+# CONFIG_WLAN_VENDOR_CISCO is not set -+# CONFIG_WLAN_VENDOR_INTEL is not set -+# CONFIG_WLAN_VENDOR_INTERSIL is not set -+# CONFIG_WLAN_VENDOR_MARVELL is not set -+# CONFIG_WLAN_VENDOR_MEDIATEK is not set -+# CONFIG_WLAN_VENDOR_RALINK is not set -+# CONFIG_WLAN_VENDOR_REALTEK is not set -+# CONFIG_WLAN_VENDOR_RSI is not set -+# CONFIG_WLAN_VENDOR_ST is not set -+# CONFIG_WLAN_VENDOR_TI is not set -+# CONFIG_WLAN_VENDOR_ZYDAS is not set -+# CONFIG_WLAN_VENDOR_QUANTENNA is not set -+CONFIG_INPUT_EVDEV=y -+# CONFIG_KEYBOARD_ATKBD is not set -+CONFIG_KEYBOARD_GPIO=y -+CONFIG_KEYBOARD_GPIO_POLLED=y -+CONFIG_KEYBOARD_SUN4I_LRADC=y -+# CONFIG_INPUT_MOUSE is not set -+CONFIG_INPUT_TOUCHSCREEN=y -+CONFIG_TOUCHSCREEN_EDT_FT5X06=m -+CONFIG_INPUT_MISC=y -+CONFIG_INPUT_GPIO_VIBRA=y -+CONFIG_INPUT_AXP20X_PEK=y -+# CONFIG_SERIO is not set -+# CONFIG_LEGACY_PTYS is not set -+CONFIG_SERIAL_8250=y -+# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -+CONFIG_SERIAL_8250_CONSOLE=y -+CONFIG_SERIAL_8250_NR_UARTS=8 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=8 -+CONFIG_SERIAL_8250_DW=y -+CONFIG_SERIAL_OF_PLATFORM=y -+CONFIG_SERIAL_DEV_BUS=y -+# CONFIG_HW_RANDOM is not set -+CONFIG_DEVKMEM=y -+CONFIG_I2C_CHARDEV=y -+CONFIG_I2C_MUX=y -+CONFIG_I2C_GPIO=y -+CONFIG_I2C_MV64XXX=y -+CONFIG_SPI=y -+CONFIG_SPI_SUN4I=y -+CONFIG_SPI_SUN6I=y -+CONFIG_SPI_SPIDEV=y -+CONFIG_PINCTRL_AXP209=y -+CONFIG_POWER_SUPPLY=y -+CONFIG_CHARGER_AXP20X=y -+CONFIG_BATTERY_AXP20X=y -+CONFIG_AXP20X_POWER=y -+# CONFIG_HWMON is not set -+CONFIG_THERMAL=y -+CONFIG_THERMAL_STATISTICS=y -+CONFIG_THERMAL_WRITABLE_TRIPS=y -+CONFIG_THERMAL_GOV_FAIR_SHARE=y -+CONFIG_THERMAL_GOV_BANG_BANG=y -+CONFIG_CPU_THERMAL=y -+CONFIG_SUN8I_THERMAL=y -+CONFIG_WATCHDOG=y -+CONFIG_SUNXI_WATCHDOG=y -+CONFIG_MFD_SUN4I_GPADC=y -+CONFIG_MFD_AC100=y -+CONFIG_MFD_AXP20X_RSB=y -+CONFIG_MFD_SYSCON=y -+CONFIG_REGULATOR=y -+CONFIG_REGULATOR_FIXED_VOLTAGE=y -+CONFIG_REGULATOR_USERSPACE_CONSUMER=y -+CONFIG_REGULATOR_AXP20X=y -+CONFIG_REGULATOR_GPIO=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_MEDIA_SUPPORT=m -+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -+CONFIG_MEDIA_CAMERA_SUPPORT=y -+CONFIG_MEDIA_PLATFORM_SUPPORT=y -+CONFIG_VIDEO_ADV_DEBUG=y -+CONFIG_V4L_PLATFORM_DRIVERS=y -+CONFIG_VIDEO_SUN6I_CSI=m -+CONFIG_V4L_MEM2MEM_DRIVERS=y -+CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m -+CONFIG_VIDEO_SUN8I_DEINTERLACE=m -+CONFIG_VIDEO_SUN8I_ROTATE=m -+CONFIG_VIDEO_HM5065=m -+CONFIG_VIDEO_GC2145=m -+CONFIG_DRM=y -+CONFIG_DRM_SUN4I=y -+# CONFIG_DRM_SUN4I_HDMI is not set -+# CONFIG_DRM_SUN4I_BACKEND is not set -+# CONFIG_DRM_SUN6I_DSI is not set -+CONFIG_DRM_PANEL_LVDS=y -+CONFIG_BACKLIGHT_CLASS_DEVICE=y -+CONFIG_BACKLIGHT_PWM=y -+CONFIG_SOUND=m -+CONFIG_SND=m -+CONFIG_SND_HRTIMER=m -+# CONFIG_SND_SUPPORT_OLD_API is not set -+CONFIG_SND_DEBUG=y -+CONFIG_SND_DEBUG_VERBOSE=y -+CONFIG_SND_CTL_VALIDATION=y -+# CONFIG_SND_DRIVERS is not set -+# CONFIG_SND_ARM is not set -+# CONFIG_SND_SPI is not set -+# CONFIG_SND_USB is not set -+CONFIG_SND_SOC=m -+CONFIG_SND_SUN8I_CODEC=m -+CONFIG_SND_AC100_CODEC=m -+CONFIG_SND_SUN4I_I2S=m -+CONFIG_SND_SOC_BT_SCO=m -+CONFIG_SND_SOC_EC25=m -+CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m -+CONFIG_SND_SIMPLE_CARD=m -+CONFIG_HIDRAW=y -+# CONFIG_HID_A4TECH is not set -+# CONFIG_HID_APPLE is not set -+# CONFIG_HID_BELKIN is not set -+# CONFIG_HID_CHERRY is not set -+# CONFIG_HID_CHICONY is not set -+# CONFIG_HID_CYPRESS is not set -+# CONFIG_HID_EZKEY is not set -+# CONFIG_HID_ITE is not set -+# CONFIG_HID_KENSINGTON is not set -+# CONFIG_HID_LOGITECH is not set -+# CONFIG_HID_REDRAGON is not set -+# CONFIG_HID_MICROSOFT is not set -+# CONFIG_HID_MONTEREY is not set -+CONFIG_USB_HIDDEV=y -+CONFIG_USB_LED_TRIG=y -+CONFIG_USB=m -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -+CONFIG_USB_OTG=y -+CONFIG_USB_OTG_FSM=m -+CONFIG_USB_LEDS_TRIGGER_USBPORT=m -+CONFIG_USB_EHCI_HCD=m -+CONFIG_USB_EHCI_HCD_PLATFORM=m -+CONFIG_USB_OHCI_HCD=m -+CONFIG_USB_OHCI_HCD_PLATFORM=m -+CONFIG_USB_ACM=m -+CONFIG_USB_WDM=m -+CONFIG_USB_MUSB_HDRC=m -+CONFIG_USB_MUSB_SUNXI=m -+CONFIG_USB_SERIAL=m -+CONFIG_USB_SERIAL_GENERIC=y -+CONFIG_USB_SERIAL_OPTION=m -+CONFIG_NOP_USB_XCEIV=m -+CONFIG_USB_GADGET=m -+CONFIG_U_SERIAL_CONSOLE=y -+CONFIG_USB_CONFIGFS=m -+CONFIG_USB_CONFIGFS_SERIAL=y -+CONFIG_USB_CONFIGFS_ACM=y -+CONFIG_USB_CONFIGFS_OBEX=y -+CONFIG_USB_CONFIGFS_NCM=y -+CONFIG_USB_CONFIGFS_ECM=y -+CONFIG_USB_CONFIGFS_ECM_SUBSET=y -+CONFIG_USB_CONFIGFS_RNDIS=y -+CONFIG_USB_CONFIGFS_EEM=y -+CONFIG_USB_CONFIGFS_MASS_STORAGE=y -+CONFIG_USB_CONFIGFS_F_LB_SS=y -+CONFIG_USB_CONFIGFS_F_FS=y -+CONFIG_USB_CONFIGFS_F_UAC1=y -+CONFIG_USB_CONFIGFS_F_UAC2=y -+CONFIG_USB_CONFIGFS_F_MIDI=y -+CONFIG_USB_CONFIGFS_F_HID=y -+CONFIG_USB_CONFIGFS_F_UVC=y -+CONFIG_USB_CONFIGFS_F_PRINTER=y -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_EEM=y -+CONFIG_MMC=y -+CONFIG_MMC_SUNXI=y -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_AXP20X=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_ONESHOT=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_LEDS_TRIGGER_BACKLIGHT=y -+CONFIG_LEDS_TRIGGER_CPU=y -+CONFIG_LEDS_TRIGGER_ACTIVITY=y -+CONFIG_LEDS_TRIGGER_GPIO=y -+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -+CONFIG_LEDS_TRIGGER_PANIC=y -+CONFIG_LEDS_TRIGGER_NETDEV=y -+CONFIG_LEDS_TRIGGER_PATTERN=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_INTF_SYSFS is not set -+# CONFIG_RTC_INTF_PROC is not set -+CONFIG_RTC_DRV_AC100=y -+# CONFIG_RTC_DRV_SUN6I is not set -+CONFIG_DMADEVICES=y -+CONFIG_DMA_SUN6I=y -+CONFIG_DMABUF_HEAPS=y -+CONFIG_DMABUF_HEAPS_SYSTEM=y -+CONFIG_DMABUF_HEAPS_CMA=y -+# CONFIG_VIRTIO_MENU is not set -+# CONFIG_VHOST_MENU is not set -+CONFIG_STAGING=y -+CONFIG_STAGING_MEDIA=y -+CONFIG_VIDEO_SUNXI=y -+CONFIG_VIDEO_SUNXI_CEDRUS=m -+# CONFIG_CLK_SUNXI_PRCM_SUN9I is not set -+# CONFIG_SUN4I_A10_CCU is not set -+# CONFIG_SUN5I_CCU is not set -+# CONFIG_SUN6I_A31_CCU is not set -+# CONFIG_SUN8I_A23_CCU is not set -+# CONFIG_SUN8I_A33_CCU is not set -+# CONFIG_SUN8I_V3S_CCU is not set -+# CONFIG_SUN8I_R40_CCU is not set -+CONFIG_MAILBOX=y -+# CONFIG_IOMMU_SUPPORT is not set -+CONFIG_IIO=y -+CONFIG_IIO_KFIFO_BUF=y -+CONFIG_IIO_CONFIGFS=y -+CONFIG_BMA180=m -+CONFIG_AXP20X_ADC=y -+CONFIG_PWM=y -+CONFIG_PWM_SUN4I=y -+CONFIG_PHY_SUN4I_USB=y -+CONFIG_ARM_CCI_PMU=y -+# CONFIG_ARM_CCI5xx_PMU is not set -+CONFIG_NVMEM_SUNXI_SID=y -+CONFIG_VALIDATE_FS_PARSER=y -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_POSIX_ACL=y -+CONFIG_F2FS_FS=y -+CONFIG_F2FS_FS_SECURITY=y -+CONFIG_F2FS_CHECK_FS=y -+CONFIG_F2FS_FS_COMPRESSION=y -+# CONFIG_MANDATORY_FILE_LOCKING is not set -+CONFIG_FS_ENCRYPTION=y -+CONFIG_FANOTIFY=y -+CONFIG_AUTOFS4_FS=y -+CONFIG_FUSE_FS=m -+CONFIG_VFAT_FS=y -+CONFIG_PROC_CHILDREN=y -+CONFIG_TMPFS=y -+CONFIG_TMPFS_POSIX_ACL=y -+# CONFIG_MISC_FILESYSTEMS is not set -+# CONFIG_NETWORK_FILESYSTEMS is not set -+CONFIG_NLS_CODEPAGE_437=y -+CONFIG_NLS_CODEPAGE_852=y -+CONFIG_NLS_ISO8859_1=y -+CONFIG_NLS_ISO8859_2=y -+CONFIG_NLS_UTF8=y -+CONFIG_PERSISTENT_KEYRINGS=y -+CONFIG_ENCRYPTED_KEYS=y -+CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" -+CONFIG_CRYPTO_PCRYPT=y -+CONFIG_CRYPTO_ECDH=y -+CONFIG_CRYPTO_CURVE25519=y -+CONFIG_CRYPTO_CHACHA20POLY1305=y -+CONFIG_CRYPTO_SEQIV=y -+CONFIG_CRYPTO_ECHAINIV=y -+CONFIG_CRYPTO_BLAKE2B=y -+CONFIG_CRYPTO_BLAKE2S=y -+CONFIG_CRYPTO_MD4=y -+CONFIG_CRYPTO_MD5=y -+CONFIG_CRYPTO_AES_TI=y -+CONFIG_CRYPTO_SALSA20=y -+CONFIG_CRYPTO_DEFLATE=m -+CONFIG_CRYPTO_LZO=y -+CONFIG_CRYPTO_LZ4=y -+CONFIG_CRYPTO_LZ4HC=y -+CONFIG_CRYPTO_ZSTD=y -+CONFIG_CRYPTO_ANSI_CPRNG=y -+CONFIG_CRYPTO_USER_API_HASH=m -+CONFIG_CRYPTO_USER_API_SKCIPHER=m -+CONFIG_CRYPTO_USER_API_RNG=m -+CONFIG_CRYPTO_USER_API_AEAD=m -+CONFIG_CRYPTO_DEV_SUN4I_SS=m -+CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y -+CONFIG_CRYPTO_DEV_SUN8I_CE=m -+CONFIG_CRYPTO_DEV_SUN8I_SS=m -+CONFIG_PKCS8_PRIVATE_KEY_PARSER=y -+CONFIG_CRC_CCITT=y -+CONFIG_CRC_T10DIF=y -+CONFIG_CRC_ITU_T=y -+CONFIG_LIBCRC32C=y -+CONFIG_DMA_CMA=y -+CONFIG_CMA_SIZE_MBYTES=64 -+CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15 -+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -+CONFIG_MAGIC_SYSRQ=y -+CONFIG_DEBUG_FS=y -+CONFIG_DEBUG_KERNEL=y -+CONFIG_DETECT_HUNG_TASK=y -+CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -+CONFIG_WQ_WATCHDOG=y -+# CONFIG_SCHED_DEBUG is not set -+# CONFIG_RCU_TRACE is not set -+CONFIG_BOOTTIME_TRACING=y -+CONFIG_FUNCTION_TRACER=y -+# CONFIG_UPROBE_EVENTS is not set -+CONFIG_DEBUG_LL=y -+CONFIG_EARLY_PRINTK=y -+# CONFIG_RUNTIME_TESTING_MENU is not set -diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c -index ef0058de432b..b87be5d007bf 100644 ---- a/arch/arm/kernel/topology.c -+++ b/arch/arm/kernel/topology.c -@@ -121,7 +121,7 @@ static void __init parse_dt_topology(void) - - rate = of_get_property(cn, "clock-frequency", &len); - if (!rate || len != 4) { -- pr_err("%pOF missing clock-frequency property\n", cn); -+ //pr_err("%pOF missing clock-frequency property\n", cn); - continue; - } - -diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index eeadb1a4dcfe..e5c2fce281cd 100644 ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -6,6 +6,8 @@ menuconfig ARCH_SUNXI - select CLKSRC_MMIO - select GENERIC_IRQ_CHIP - select GPIOLIB -+ select IRQ_DOMAIN_HIERARCHY -+ select IRQ_FASTEOI_HIERARCHY_HANDLERS - select PINCTRL - select PM_OPP - select SUN4I_TIMER -diff --git a/arch/arm/mach-sunxi/mc_smp.c b/arch/arm/mach-sunxi/mc_smp.c -index 26cbce135338..abc1f638c206 100644 ---- a/arch/arm/mach-sunxi/mc_smp.c -+++ b/arch/arm/mach-sunxi/mc_smp.c -@@ -147,6 +147,9 @@ static int sunxi_cpu_power_switch_set(unsigned int cpu, unsigned int cluster, - - static void sunxi_cpu0_hotplug_support_set(bool enable) - { -+ if (is_a83t) -+ return; -+ - if (enable) { - writel(CPU0_SUPPORT_HOTPLUG_MAGIC0, sram_b_smp_base); - writel(CPU0_SUPPORT_HOTPLUG_MAGIC1, sram_b_smp_base + 0x4); -diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c -index 19635721013d..244341ffe8f3 100644 ---- a/arch/arm/mach-sunxi/sunxi.c -+++ b/arch/arm/mach-sunxi/sunxi.c -@@ -14,10 +14,14 @@ - #include - #include - #include -+#include - #include -+#include -+#include - - #include - #include -+#include - - static const char * const sunxi_board_dt_compat[] = { - "allwinner,sun4i-a10", -@@ -88,10 +92,63 @@ static const char * const sun8i_a83t_cntvoff_board_dt_compat[] = { - NULL, - }; - -+#ifdef CONFIG_PM_SLEEP -+static int sun8i_a83t_pm_valid(suspend_state_t state) -+{ -+ return state == PM_SUSPEND_MEM; -+} -+ -+static int sun8i_a83t_suspend_finish(unsigned long val) -+{ -+ struct scpi_ops *scpi; -+ -+ scpi = get_scpi_ops(); -+ if (scpi && scpi->sys_set_power_state) { -+ //HACK: use invalid state to mean: suspend last CPU and the system -+ scpi->sys_set_power_state(3); -+ cpu_do_idle(); -+ } else { -+ // don't do much if scpi is not available -+ cpu_do_idle(); -+ } -+ -+ return 0; -+} -+ -+static int sun8i_a83t_pm_enter(suspend_state_t state) -+{ -+ switch (state) { -+ case PM_SUSPEND_MEM: -+ cpu_suspend(0, sun8i_a83t_suspend_finish); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static const struct platform_suspend_ops sun8i_a83t_pm_ops = { -+ .enter = sun8i_a83t_pm_enter, -+ .valid = sun8i_a83t_pm_valid, -+}; -+#define SUN8I_A83T_PM_OPS &sun8i_a83t_pm_ops -+#else -+#define SUN8I_A83T_PM_OPS NULL -+#endif -+ -+static void __init sun8i_a83t_init_machine(void) -+{ -+ suspend_set_ops(SUN8I_A83T_PM_OPS); -+ -+ of_platform_default_populate(NULL, NULL, NULL); -+} -+ - DT_MACHINE_START(SUN8I_A83T_CNTVOFF_DT, "Allwinner A83t board") - .init_early = sun8i_a83t_cntvoff_init, - .init_time = sun6i_timer_init, - .dt_compat = sun8i_a83t_cntvoff_board_dt_compat, -+ .init_machine = sun8i_a83t_init_machine, - MACHINE_END - - static const char * const sun9i_board_dt_compat[] = { -diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms -index 6eecdef538bd..f2aa1518c6f4 100644 ---- a/arch/arm64/Kconfig.platforms -+++ b/arch/arm64/Kconfig.platforms -@@ -17,6 +17,8 @@ config ARCH_SUNXI - bool "Allwinner sunxi 64-bit SoC Family" - select ARCH_HAS_RESET_CONTROLLER - select GENERIC_IRQ_CHIP -+ select IRQ_DOMAIN_HIERARCHY -+ select IRQ_FASTEOI_HIERARCHY_HANDLERS - select PINCTRL - select RESET_CONTROLLER - help -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts -index c7bd73f35ed8..f17cc89f472d 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts -@@ -173,7 +173,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ - }; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -index e5e840b9fbb4..e45bef292aa3 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -@@ -191,7 +191,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ - }; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts -index e58db8a6cab6..57b64c57781b 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts -@@ -152,7 +152,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - }; - }; - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts -index f3f8e177ab61..ec7e2c0e82c1 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts -@@ -185,7 +185,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ - }; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts -index 70e31743f0ba..097a5511523a 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts -@@ -192,7 +192,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ - }; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -index 329cf276561e..c2113a1ee372 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -99,6 +99,10 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ - &i2c1 { - status = "okay"; - }; -@@ -107,6 +111,10 @@ - bias-pull-up; - }; - -+&i2s2 { -+ status = "okay"; -+}; -+ - &mdio { - ext_rmii_phy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; -@@ -139,7 +147,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - }; - }; - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts -index 7ae16541d14f..34e67f5f8297 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts -@@ -245,7 +245,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - }; - }; - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts -index 3d5a2ae9aa39..c7ff4b7c193b 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts -@@ -8,9 +8,121 @@ - / { - model = "Pine64 PinePhone Developer Batch (1.0)"; - compatible = "pine64,pinephone-1.0", "allwinner,sun50i-a64"; -+ -+ reg_vbus: usb0-vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb0-vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ -+ enable-active-high; -+ vin-supply = <®_drivevbus>; -+ }; -+}; -+ -+&axp803 { -+ x-powers,drive-vbus-en; -+}; -+ -+&i2c0 { -+ hdmi-bridge@28 { -+ compatible = "analogix,anx7688"; -+ reg = <0x28>; -+ -+ interrupt-parent = <&r_pio>; -+ interrupts = <0 11 IRQ_TYPE_EDGE_FALLING>; /* PL11 */ -+ -+ enable-gpios = <&pio 3 10 GPIO_ACTIVE_LOW>; /* PD10 */ -+ reset-gpios = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */ -+ -+ cabledet-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ -+ -+ avdd10-supply = <®_anx1v0>; -+ dvdd10-supply = <®_anx1v0>; -+ /* This is for the HW hack variant, but will also work for non-modified version. */ -+ avdd18-supply = <®_ldo_io1>; -+ dvdd18-supply = <®_ldo_io1>; -+ avdd33-supply = <®_dldo1>; -+ vconn-supply = <®_vconn5v0>; -+ hdmi_vt-supply = <®_dldo1>; -+ -+ source-caps = < -+ PDO_FIXED(5000, 500, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM | PDO_FIXED_DUAL_ROLE) -+ >; -+ -+ sink-caps = < -+ PDO_FIXED(5000, 3000, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM | PDO_FIXED_DUAL_ROLE) -+ >; -+ -+ /* -+ * ANX7688 can't enable/disable USB-5V <-> DCIN switch by -+ * itself, and PMIC's N_VBUSEN is not connected anywhere either, -+ * so we need to configure everything in software: -+ * -+ * - get the VBUS status from ANX7688 via I2C -+ * - configure PMIC to let it know vbus drive status (via -+ * reg_drivevbus) -+ * - enable VBUS switch and USB-5V regulator (via reg_vbus -+ * and reg_usb_5v) -+ */ -+ vbus-supply = <®_vbus>; -+ vbus_in-supply = <&usb_power_supply>; -+ -+ port { -+ typec0_dr_sw: endpoint { -+ remote-endpoint = <&usb0_drd_sw>; -+ }; -+ }; -+ }; -+}; -+ -+/* -+ * The N_VBUSEN pin is disconnected, but we need to inform the PMIC about -+ * the VBUS status anyway. To avoid the pin from floating and to inform -+ * the PMIC, about VBUS status, we couple reg_drivevbus with reg_vbus. -+ */ -+®_drivevbus { -+ vin-supply = <®_usb_5v>; -+ status = "okay"; -+}; -+ -+&uart3 { -+ modem { -+ compatible = "quectel,eg25"; -+ char-device-name = "modem-power"; -+ -+ power-supply = <®_vbat_bb>; /* PL7 */ -+ -+ enable-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ -+ reset-gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */ -+ pwrkey-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ -+ -+ sleep-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ -+ wakeup-gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2-RI */ -+ -+ cts-gpios = <&pio 3 5 GPIO_ACTIVE_HIGH>; /* PD5-CTS */ -+ dtr-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6-DTR */ -+ rts-gpios = <&pio 3 4 GPIO_ACTIVE_HIGH>; /* PD4-RTS */ -+ -+ quectel,qdai = "1,1,0,1,0,0,1,1"; -+ }; -+}; -+ -+&usbphy { -+ usb-role-switch; -+ -+ port { -+ usb0_drd_sw: endpoint { -+ remote-endpoint = <&typec0_dr_sw>; -+ }; -+ }; - }; - - &sgm3140 { - enable-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */ - flash-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ - }; -+ -+&codec_analog { -+ allwinner,internal-bias-resistor; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts -index c9b9f6e9ee8c..85b50a2a4d4f 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts -@@ -8,6 +8,20 @@ - / { - model = "Pine64 PinePhone Braveheart (1.1)"; - compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64"; -+ -+ reg_vbus: usb0-vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb0-vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ -+ enable-active-high; -+ vin-supply = <®_drivevbus>; -+ }; -+}; -+ -+&axp803 { -+ x-powers,drive-vbus-en; - }; - - &backlight { -@@ -29,7 +43,106 @@ - default-brightness-level = <400>; - }; - -+&codec_analog { -+ allwinner,internal-bias-resistor; -+}; -+ -+&i2c0 { -+ hdmi-bridge@28 { -+ compatible = "analogix,anx7688"; -+ reg = <0x28>; -+ -+ interrupt-parent = <&r_pio>; -+ interrupts = <0 11 IRQ_TYPE_EDGE_FALLING>; /* PL11 */ -+ -+ enable-gpios = <&pio 3 10 GPIO_ACTIVE_LOW>; /* PD10 */ -+ reset-gpios = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */ -+ -+ cabledet-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ -+ -+ avdd10-supply = <®_anx1v0>; -+ dvdd10-supply = <®_anx1v0>; -+ /* This is for the HW hack variant, but will also work for non-modified version. */ -+ avdd18-supply = <®_ldo_io1>; -+ dvdd18-supply = <®_ldo_io1>; -+ avdd33-supply = <®_dldo1>; -+ vconn-supply = <®_vconn5v0>; -+ hdmi_vt-supply = <®_dldo1>; -+ -+ source-caps = < -+ PDO_FIXED(5000, 500, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM | PDO_FIXED_DUAL_ROLE) -+ >; -+ -+ sink-caps = < -+ PDO_FIXED(5000, 3000, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM | PDO_FIXED_DUAL_ROLE) -+ >; -+ -+ /* -+ * ANX7688 can't enable/disable USB-5V <-> DCIN switch by -+ * itself, and PMIC's N_VBUSEN is not connected anywhere either, -+ * so we need to configure everything in software: -+ * -+ * - get the VBUS status from ANX7688 via I2C -+ * - configure PMIC to let it know vbus drive status (via -+ * reg_drivevbus) -+ * - enable VBUS switch and USB-5V regulator (via reg_vbus -+ * and reg_usb_5v) -+ */ -+ vbus-supply = <®_vbus>; -+ vbus_in-supply = <&usb_power_supply>; -+ -+ port { -+ typec0_dr_sw: endpoint { -+ remote-endpoint = <&usb0_drd_sw>; -+ }; -+ }; -+ }; -+}; -+ -+/* -+ * The N_VBUSEN pin is disconnected, but we need to inform the PMIC about -+ * the VBUS status anyway. To avoid the pin from floating and to inform -+ * the PMIC, about VBUS status, we couple reg_drivevbus with reg_vbus. -+ */ -+®_drivevbus { -+ vin-supply = <®_usb_5v>; -+ status = "okay"; -+}; -+ - &sgm3140 { - enable-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ - flash-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */ - }; -+ -+&uart3 { -+ modem { -+ compatible = "quectel,eg25"; -+ char-device-name = "modem-power"; -+ -+ power-supply = <®_vbat_bb>; /* PL7 */ -+ -+ enable-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ -+ reset-gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */ -+ pwrkey-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ -+ //status-pwrkey-multiplexed; /* status acts as pwrkey */ -+ -+ sleep-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ -+ wakeup-gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2-RI */ -+ -+ dtr-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6-DTR */ -+ cts-gpios = <&pio 3 5 GPIO_ACTIVE_HIGH>; /* PD5-CTS */ -+ rts-gpios = <&pio 3 4 GPIO_ACTIVE_HIGH>; /* PD4-RTS */ -+ -+ quectel,qdai = "1,1,0,1,0,0,1,1"; -+ }; -+}; -+ -+&usbphy { -+ usb-role-switch; -+ -+ port { -+ usb0_drd_sw: endpoint { -+ remote-endpoint = <&typec0_dr_sw>; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.2.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.2.dts -index acc0ab53b9c1..05bb42023b30 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.2.dts -@@ -15,6 +15,10 @@ - }; - }; - -+&axp803 { -+ x-powers,sense-vbus-en; -+}; -+ - &backlight { - power-supply = <®_ldo_io0>; - /* -@@ -48,7 +52,90 @@ - mmc-pwrseq = <&wifi_pwrseq>; - }; - -+&i2c0 { -+ hdmi-bridge@28 { -+ compatible = "analogix,anx7688"; -+ reg = <0x28>; -+ -+ interrupt-parent = <&r_pio>; -+ interrupts = <0 11 IRQ_TYPE_EDGE_FALLING>; /* PL11 */ -+ -+ enable-gpios = <&pio 3 10 GPIO_ACTIVE_LOW>; /* PD10 */ -+ reset-gpios = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ -+ -+ cabledet-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ -+ -+ avdd10-supply = <®_anx1v0>; -+ dvdd10-supply = <®_anx1v0>; -+ avdd18-supply = <®_ldo_io1>; -+ dvdd18-supply = <®_ldo_io1>; -+ avdd33-supply = <®_dcdc1>; -+ vconn-supply = <®_vconn5v0>; -+ hdmi_vt-supply = <®_dldo1>; -+ -+ source-caps = < -+ PDO_FIXED(5000, 500, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM | PDO_FIXED_DUAL_ROLE) -+ >; -+ -+ sink-caps = < -+ PDO_FIXED(5000, 3000, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM | PDO_FIXED_DUAL_ROLE) -+ >; -+ -+ /* -+ * ANX7688 will enable/disable USB-5V <-> DCIN switch by itself -+ * via VBUS_CTRL pin. The driver just has to enable the USB-5V -+ * so that the switch has power. -+ */ -+ vbus-supply = <®_usb_5v>; -+ vbus_in-supply = <&usb_power_supply>; -+ -+ port { -+ typec0_dr_sw: endpoint { -+ remote-endpoint = <&usb0_drd_sw>; -+ }; -+ }; -+ }; -+}; -+ -+®_anx1v0 { -+ gpio = <&pio 3 11 GPIO_ACTIVE_HIGH>; /* PD11 */ -+ enable-active-high; -+}; -+ - &sgm3140 { - enable-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ - flash-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */ - }; -+ -+&uart3 { -+ modem { -+ compatible = "quectel,eg25"; -+ char-device-name = "modem-power"; -+ -+ power-supply = <®_vbat_bb>; /* PL7 */ -+ -+ enable-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ -+ reset-gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */ -+ status-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ -+ pwrkey-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ -+ -+ host-ready-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ -+ wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6-RI */ -+ -+ dtr-gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2-DTR */ -+ cts-gpios = <&pio 3 5 GPIO_ACTIVE_HIGH>; /* PD5-CTS */ -+ rts-gpios = <&pio 3 4 GPIO_ACTIVE_HIGH>; /* PD4-RTS */ -+ -+ quectel,qdai = "1,1,0,1,0,0,1,1"; -+ }; -+}; -+ -+&usbphy { -+ usb-role-switch; -+ -+ port { -+ usb0_drd_sw: endpoint { -+ remote-endpoint = <&typec0_dr_sw>; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi -index 2dfe9bae8c67..fbca6df2f432 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - - / { - aliases { -@@ -24,10 +25,181 @@ - /* Backlight configuration differs per PinePhone revision. */ - }; - -+ bat: battery { -+ compatible = "simple-battery"; -+ voltage-min-design-microvolt = <3000000>; -+ voltage-max-design-microvolt = <4350000>; -+ energy-full-design-microwatt-hours = <12000000>; -+ charge-full-design-microamp-hours = <2750000>; -+ precharge-current-microamp = <130000>; -+ charge-term-current-microamp = <50000>; -+ constant-charge-current-max-microamp = <1300000>; -+ constant-charge-voltage-max-microvolt = <4350000>; -+ factory-internal-resistance-micro-ohms = <150000>; -+ resistance-temp-table = <20 150>; -+ ocv-capacity-celsius = <20>; -+ ocv-capacity-table-0 = -+ <4334000 100>, -+ <4319700 99>, -+ <4304300 98>, -+ <4292200 97>, -+ <4280100 96>, -+ <4269100 95>, -+ <4253700 94>, -+ <4242700 93>, -+ <4232800 92>, -+ <4222900 91>, -+ <4211900 90>, -+ <4203100 89>, -+ <4192100 88>, -+ <4177800 87>, -+ <4167900 86>, -+ <4155800 85>, -+ <4147000 84>, -+ <4136000 83>, -+ <4126100 82>, -+ <4111800 81>, -+ <4102999 80>, -+ <4093100 79>, -+ <4084300 78>, -+ <4075500 77>, -+ <4064500 76>, -+ <4054600 75>, -+ <4042500 74>, -+ <4035900 73>, -+ <4029300 72>, -+ <4018300 71>, -+ <4006200 70>, -+ <3993000 69>, -+ <3974300 68>, -+ <3964400 67>, -+ <3956700 66>, -+ <3949000 65>, -+ <3943500 64>, -+ <3938000 63>, -+ <3931400 62>, -+ <3923700 61>, -+ <3917100 60>, -+ <3903900 59>, -+ <3895100 58>, -+ <3887400 57>, -+ <3878600 56>, -+ <3870900 55>, -+ <3863200 54>, -+ <3855500 53>, -+ <3848900 52>, -+ <3837900 51>, -+ <3830200 50>, -+ <3825800 49>, -+ <3821400 48>, -+ <3815900 47>, -+ <3810400 46>, -+ <3806000 45>, -+ <3801600 44>, -+ <3797200 43>, -+ <3792800 42>, -+ <3789500 41>, -+ <3786200 40>, -+ <3781800 39>, -+ <3778500 38>, -+ <3775200 37>, -+ <3770800 36>, -+ <3764200 35>, -+ <3760900 34>, -+ <3758700 33>, -+ <3755400 32>, -+ <3754300 31>, -+ <3752100 30>, -+ <3748800 29>, -+ <3749900 28>, -+ <3745500 27>, -+ <3742200 26>, -+ <3741100 25>, -+ <3737800 24>, -+ <3734500 23>, -+ <3731200 22>, -+ <3730100 21>, -+ <3724600 20>, -+ <3722400 19>, -+ <3718000 18>, -+ <3713600 17>, -+ <3708100 16>, -+ <3701500 15>, -+ <3689400 14>, -+ <3682800 13>, -+ <3674000 12>, -+ <3666300 11>, -+ <3659700 10>, -+ <3653100 9>, -+ <3647600 8>, -+ <3641000 7>, -+ <3625600 6>, -+ <3613500 5>, -+ <3591500 4>, -+ <3554100 3>, -+ <3489200 2>, -+ <3393500 1>, -+ <3256000 0>; -+ x-powers,ocv-capacity-table = -+ <0xc0 0>, -+ <0xc1 1>, -+ <0xc2 1>, -+ <0xc3 2>, -+ <0xc4 2>, -+ <0xc5 4>, -+ <0xc6 4>, -+ <0xc7 5>, -+ <0xc8 6>, -+ <0xc9 8>, -+ <0xca 11>, -+ <0xcb 15>, -+ <0xcc 22>, -+ <0xcd 36>, -+ <0xce 44>, -+ <0xcf 48>, -+ <0xd0 51>, -+ <0xd1 53>, -+ <0xd2 56>, -+ <0xd3 60>, -+ <0xd4 64>, -+ <0xd5 69>, -+ <0xd6 71>, -+ <0xd7 75>, -+ <0xd8 78>, -+ <0xd9 82>, -+ <0xda 84>, -+ <0xdb 85>, -+ <0xdc 88>, -+ <0xdd 92>, -+ <0xde 95>, -+ <0xdf 98>; -+ }; -+ -+ bt_sco_codec: bt-sco-codec { -+ #sound-dai-cells = <1>; -+ compatible = "linux,bt-sco"; -+ sound-name-prefix = "Bluetooth"; -+ }; -+ - chosen { - stdout-path = "serial0:115200n8"; - }; - -+ ec25_codec: ec25-codec { -+ #sound-dai-cells = <1>; -+ compatible = "quectel,ec25"; -+ sound-name-prefix = "Modem"; -+ }; -+ -+ i2c_csi: i2c-csi { -+ compatible = "i2c-gpio"; -+ sda-gpios = <&pio 4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; /* PE13 */ -+ scl-gpios = <&pio 4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; /* PE12 */ -+ i2c-gpio,delay-us = <3>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -35,21 +207,60 @@ - function = LED_FUNCTION_INDICATOR; - color = ; - gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ -+ retain-state-suspended; - }; - - green { - function = LED_FUNCTION_INDICATOR; - color = ; - gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */ -+ retain-state-suspended; - }; - - red { - function = LED_FUNCTION_INDICATOR; - color = ; - gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ -+ retain-state-suspended; -+ }; -+ }; -+ -+ hdmi-connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; - }; - }; - -+ reg_anx1v0: anx1v0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "anx1v0"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ }; -+ -+ reg_usb_5v: usb-5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb-5v"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&pio 3 8 GPIO_ACTIVE_HIGH>; /* PD8 */ -+ enable-active-high; -+ }; -+ -+ reg_vbat_bb: vbat-bb { -+ compatible = "regulator-fixed"; -+ regulator-name = "vbat-bb"; -+ regulator-min-microvolt = <3500000>; -+ regulator-max-microvolt = <3500000>; -+ gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ -+ enable-active-high; -+ }; -+ - reg_vbat_wifi: vbat-wifi { - compatible = "regulator-fixed"; - regulator-min-microvolt = <3300000>; -@@ -57,6 +268,16 @@ - regulator-name = "vbat-wifi"; - }; - -+ /* This is a charge pump for CC1 and CC2 pins on USB-C connector. */ -+ reg_vconn5v0: vconn5v0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vconn5v0"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&pio 3 9 GPIO_ACTIVE_HIGH>; /* PD9 */ -+ enable-active-high; -+ }; -+ - sgm3140: led-controller { - compatible = "sgmicro,sgm3140"; - vin-supply = <®_dcdc1>; -@@ -68,6 +289,34 @@ - }; - }; - -+ /* PinePhone specific reboot modes for p-boot. */ -+ reboot-mode { -+ compatible = "nvmem-reboot-mode"; -+ nvmem-cells = <&reboot_mode>; -+ nvmem-cell-names = "reboot-mode"; -+ -+ mode-normal = <0x0>; -+ mode-fel = <0xb0010fe1>; -+ mode-emmc-egon = <0xb001e33c>; -+ mode-sd1 = <0xb0010020>; -+ mode-sd2 = <0xb0010021>; -+ mode-sd3 = <0xb0010022>; -+ mode-sd4 = <0xb0010023>; -+ mode-sd5 = <0xb0010024>; -+ mode-sd6 = <0xb0010025>; -+ mode-sd7 = <0xb0010026>; -+ mode-sd8 = <0xb0010027>; -+ mode-emmc1 = <0xb0010000>; -+ mode-emmc2 = <0xb0010001>; -+ mode-emmc3 = <0xb0010002>; -+ mode-emmc4 = <0xb0010003>; -+ mode-emmc5 = <0xb0010004>; -+ mode-emmc6 = <0xb0010005>; -+ mode-emmc7 = <0xb0010006>; -+ mode-emmc8 = <0xb0010007>; -+ mode-menu = <0xb00100ff>; -+ }; -+ - speaker_amp: audio-amplifier { - compatible = "simple-audio-amplifier"; - enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */ -@@ -82,6 +331,8 @@ - }; - - &codec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&aif2_pins>, <&aif3_pins>; - status = "okay"; - }; - -@@ -106,6 +357,36 @@ - cpu-supply = <®_dcdc2>; - }; - -+&csi { -+ pinctrl-0 = <&csi_pins>, <&csi_mclk_pin>; -+ status = "okay"; -+ -+ port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ csi_ov5640_ep: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&ov5640_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; /* Active high */ -+ vsync-active = <0>; /* Active low */ -+ data-active = <1>; /* Active high */ -+ pclk-sample = <1>; /* Rising */ -+ }; -+ -+ csi_gc2145_ep: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&gc2145_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; -+ vsync-active = <1>; -+ data-active = <1>; -+ pclk-sample = <1>; -+ }; -+ }; -+}; -+ - &dai { - status = "okay"; - }; -@@ -140,8 +421,74 @@ - status = "okay"; - }; - -+&hdmi { -+ hvcc-supply = <®_dldo1>; -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ -+&hdmi_sound { -+ status = "okay"; -+}; -+ -+&i2c_csi { -+ gc2145: front-camera@3c { -+ compatible = "galaxycore,gc2145"; -+ reg = <0x3c>; -+ clocks = <&ccu CLK_CSI_MCLK>; -+ clock-names = "xclk"; -+ -+ AVDD-supply = <®_dldo3>; -+ DVDD-supply = <®_aldo1>; -+ IOVDD-supply = <®_eldo3>; -+ reset-gpios = <&pio 4 16 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; /* PE16 */ -+ enable-gpios = <&pio 4 17 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; /* PE17 */ -+ -+ port { -+ gc2145_ep: endpoint { -+ remote-endpoint = <&csi_gc2145_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; -+ vsync-active = <1>; -+ data-active = <1>; -+ pclk-sample = <1>; -+ }; -+ }; -+ }; -+ -+ ov5640: rear-camera@4c { -+ compatible = "ovti,ov5640"; -+ reg = <0x4c>; -+ clocks = <&ccu CLK_CSI_MCLK>; -+ clock-names = "xclk"; -+ -+ AVDD-supply = <®_dldo3>; -+ DOVDD-supply = <®_aldo1>; /* shared with AFVCC */ -+ DVDD-supply = <®_eldo3>; -+ reset-gpios = <&pio 3 3 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; /* PD3 */ -+ powerdown-gpios = <&pio 2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; /* PC0 */ -+ -+ port { -+ ov5640_ep: endpoint { -+ remote-endpoint = <&csi_ov5640_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; /* Active high */ -+ vsync-active = <0>; /* Active low */ -+ data-active = <1>; /* Active high */ -+ pclk-sample = <1>; /* Rising */ -+ }; -+ }; -+ }; -+}; -+ - &i2c0 { - status = "okay"; -+ clock-frequency = <400000>; - - touchscreen@5d { - compatible = "goodix,gt917s"; -@@ -159,6 +506,7 @@ - - &i2c1 { - status = "okay"; -+ clock-frequency = <400000>; - - /* Magnetometer */ - lis3mdl: magnetometer@1e { -@@ -186,6 +534,9 @@ - interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */ - vdd-supply = <®_dldo1>; - vddio-supply = <®_dldo1>; -+ mount-matrix = "0", "1", "0", -+ "-1", "0", "0", -+ "0", "0", "-1"; - }; - }; - -@@ -194,6 +545,10 @@ - status = "okay"; - }; - -+&i2s2 { -+ status = "okay"; -+}; -+ - &lradc { - vref-supply = <®_aldo3>; - status = "okay"; -@@ -221,6 +576,7 @@ - cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ - disable-wp; - bus-width = <4>; -+ post-power-on-delay-ms = <1>; /* power is already turned on by the bootloader */ - status = "okay"; - }; - -@@ -231,10 +587,14 @@ - vqmmc-supply = <®_dldo4>; - bus-width = <4>; - non-removable; -+ post-power-on-delay-ms = <1>; /* wifi power is always on */ - status = "okay"; -+ keep-power-in-suspend; - - rtl8723cs: wifi@1 { - reg = <1>; -+ interrupt-parent = <&r_pio>; -+ interrupts = <0 3 IRQ_TYPE_EDGE_FALLING>; /* PL3 */ - }; - }; - -@@ -246,6 +606,7 @@ - bus-width = <8>; - non-removable; - cap-mmc-hw-reset; -+ post-power-on-delay-ms = <1>; /* power is already turned on by the bootloader */ - status = "okay"; - }; - -@@ -261,7 +622,11 @@ - vcc-pb-supply = <®_dcdc1>; - vcc-pc-supply = <®_dcdc1>; - vcc-pd-supply = <®_dcdc1>; -- vcc-pe-supply = <®_aldo1>; -+ /* pinctrl would enable this even if no camera is powered, -+ * which is wrong/not necessary -+ * -+ * vcc-pe-supply = <®_aldo1>; (also used by pogo pins i2c) -+ */ - vcc-pf-supply = <®_dcdc1>; - vcc-pg-supply = <®_dldo4>; - vcc-ph-supply = <®_dcdc1>; -@@ -288,7 +653,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - }; - }; - -@@ -296,6 +661,7 @@ - - &battery_power_supply { - status = "okay"; -+ monitored-battery = <&bat>; - }; - - ®_aldo1 { -@@ -416,8 +782,18 @@ - regulator-name = "vcc-rtc"; - }; - -+&rtc { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ reboot_mode: reboot-mode@4 { -+ reg = <0x4 0x4>; -+ }; -+}; -+ - &sound { - status = "okay"; -+ simple-audio-card,name = "PinePhone"; - simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; - simple-audio-card,widgets = "Microphone", "Headset Microphone", - "Microphone", "Internal Microphone", -@@ -439,6 +815,40 @@ - "MIC1", "Internal Microphone", - "Headset Microphone", "HBIAS", - "MIC2", "Headset Microphone"; -+ -+ simple-audio-card,dai-link@1 { -+ format = "dsp_a"; -+ frame-master = <&link1_codec>; -+ bitclock-master = <&link1_codec>; -+ bitclock-inversion; -+ -+ link1_cpu: cpu { -+ sound-dai = <&ec25_codec 0>; -+ }; -+ -+ link1_codec: codec { -+ sound-dai = <&codec 1>; -+ dai-tdm-slot-num = <1>; -+ dai-tdm-slot-width = <32>; -+ }; -+ }; -+ -+ simple-audio-card,dai-link@2 { -+ format = "dsp_a"; -+ frame-master = <&link2_codec>; -+ bitclock-master = <&link2_codec>; -+ bitclock-inversion; -+ -+ link2_cpu: cpu { -+ sound-dai = <&bt_sco_codec 0>; -+ }; -+ -+ link2_codec: codec { -+ sound-dai = <&codec 2>; -+ dai-tdm-slot-num = <1>; -+ dai-tdm-slot-width = <32>; -+ }; -+ }; - }; - - &uart0 { -@@ -457,6 +867,7 @@ - device-wake-gpios = <&pio 7 6 GPIO_ACTIVE_LOW>; /* PH6 */ - enable-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ - host-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ -+ firmware-postfix = "pinephone"; - }; - }; - -@@ -468,7 +879,7 @@ - }; - - &usb_otg { -- dr_mode = "peripheral"; -+ dr_mode = "otg"; - status = "okay"; - }; - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts -index 0494bfaf2ffa..91134608770a 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts -@@ -43,12 +43,35 @@ - #address-cells = <1>; - #size-cells = <0>; - -+ /* Front camera */ -+ gc2145: front-camera@3c { -+ compatible = "galaxycore,gc2145"; -+ reg = <0x3c>; -+ clocks = <&ccu CLK_CSI_MCLK>; -+ clock-names = "xclk"; -+ -+ AVDD-supply = <®_dldo3>; -+ DVDD-supply = <®_aldo1>; -+ IOVDD-supply = <®_eldo3>; -+ reset-gpios = <&pio 4 16 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; /* PE16 */ -+ enable-gpios = <&pio 4 17 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; /* PE17 */ -+ -+ port { -+ gc2145_ep: endpoint { -+ remote-endpoint = <&csi_gc2145_ep>; -+ bus-width = <8>; -+ hsync-active = <1>; -+ vsync-active = <1>; -+ data-active = <1>; -+ pclk-sample = <1>; -+ }; -+ }; -+ }; -+ - /* Rear camera */ -- ov5640: camera@3c { -+ ov5640: rear-camera@4c { - compatible = "ovti,ov5640"; -- reg = <0x3c>; -- pinctrl-names = "default"; -- pinctrl-0 = <&csi_mclk_pin>; -+ reg = <0x4c>; - clocks = <&ccu CLK_CSI_MCLK>; - clock-names = "xclk"; - -@@ -60,7 +83,7 @@ - - port { - ov5640_ep: endpoint { -- remote-endpoint = <&csi_ep>; -+ remote-endpoint = <&csi_ov5640_ep>; - bus-width = <8>; - hsync-active = <1>; /* Active high */ - vsync-active = <0>; /* Active low */ -@@ -119,10 +142,15 @@ - }; - - &csi { -+ pinctrl-0 = <&csi_pins>, <&csi_mclk_pin>; - status = "okay"; - - port { -- csi_ep: endpoint { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ csi_ov5640_ep: endpoint@0 { -+ reg = <0>; - remote-endpoint = <&ov5640_ep>; - bus-width = <8>; - hsync-active = <1>; /* Active high */ -@@ -130,6 +158,16 @@ - data-active = <1>; /* Active high */ - pclk-sample = <1>; /* Rising */ - }; -+ -+ csi_gc2145_ep: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&gc2145_ep>; -+ bus-width=<8>; -+ hsync-active = <1>; /* Active high */ -+ vsync-active = <1>; /* Active high */ -+ data-active = <1>; /* Active high */ -+ pclk-sample = <1>; /* Rising */ -+ }; - }; - }; - -@@ -150,12 +188,10 @@ - status = "okay"; - - panel@0 { -- compatible = "feixin,k101-im2ba02"; -+ compatible = "feixin,k101-im2byl02"; - reg = <0>; -- avdd-supply = <®_dc1sw>; -- dvdd-supply = <®_dc1sw>; -- cvdd-supply = <®_ldo_io1>; -- reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ -+ power-supply = <®_dc1sw>; -+ reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */ - backlight = <&backlight>; - }; - }; -@@ -266,7 +302,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - x-powers,drive-vbus-en; - }; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi -index 3402cec87035..50308077ea8c 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi -@@ -45,7 +45,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - }; - }; - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts -index a1864a89fb89..03f733ee44d9 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts -@@ -205,7 +205,7 @@ - compatible = "x-powers,axp803"; - reg = <0x3a3>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - wakeup-source; - }; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 57786fc120c3..8d012b4ca7bc 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -17,6 +17,12 @@ - #address-cells = <1>; - #size-cells = <1>; - -+ aliases { -+ mmc0 = &mmc0; -+ mmc1 = &mmc1; -+ mmc2 = &mmc2; -+ }; -+ - chosen { - #address-cells = <1>; - #size-cells = <1>; -@@ -102,6 +108,25 @@ - status = "disabled"; - }; - -+ hdmi_sound: hdmi-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "sun50i-a64-hdmi"; -+ simple-audio-card,mclk-fs = <128>; -+ simple-audio-card,frame-inversion; -+ status = "disabled"; -+ -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s2>; -+ dai-tdm-slot-num = <2>; -+ dai-tdm-slot-width = <32>; -+ }; -+ }; -+ - osc24M: osc24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; -@@ -130,13 +155,18 @@ - method = "smc"; - }; - -+ scpi_protocol: scpi { -+ compatible = "arm,scpi"; -+ mboxes = <&msgbox 2>, <&msgbox 3>; -+ mbox-names = "tx", "rx"; -+ shmem = <&scpi_sram>; -+ }; -+ - sound: sound { -+ #address-cells = <1>; -+ #size-cells = <0>; - compatible = "simple-audio-card"; - simple-audio-card,name = "sun50i-a64-audio"; -- simple-audio-card,format = "i2s"; -- simple-audio-card,frame-master = <&cpudai>; -- simple-audio-card,bitclock-master = <&cpudai>; -- simple-audio-card,mclk-fs = <128>; - simple-audio-card,aux-devs = <&codec_analog>; - simple-audio-card,routing = - "Left DAC", "DACL", -@@ -145,12 +175,19 @@ - "ADCR", "Right ADC"; - status = "disabled"; - -- cpudai: simple-audio-card,cpu { -- sound-dai = <&dai>; -- }; -+ simple-audio-card,dai-link@0 { -+ format = "i2s"; -+ frame-master = <&link0_cpu>; -+ bitclock-master = <&link0_cpu>; -+ mclk-fs = <128>; - -- link_codec: simple-audio-card,codec { -- sound-dai = <&codec>; -+ link0_cpu: cpu { -+ sound-dai = <&dai>; -+ }; -+ -+ link0_codec: codec { -+ sound-dai = <&codec 0>; -+ }; - }; - }; - -@@ -339,6 +376,19 @@ - #size-cells = <1>; - ranges; - -+ sram_a2: sram@40000 { -+ compatible = "mmio-sram"; -+ reg = <0x00040000 0x14000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x00040000 0x14000>; -+ -+ scpi_sram: scp-shmem@13c00 { -+ compatible = "arm,scp-shmem"; -+ reg = <0x13c00 0x200>; -+ }; -+ }; -+ - sram_c: sram@18000 { - compatible = "mmio-sram"; - reg = <0x00018000 0x28000>; -@@ -641,6 +691,7 @@ - reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; - clock-names = "hosc", "losc"; -+ protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; -@@ -648,6 +699,7 @@ - pio: pinctrl@1c20800 { - compatible = "allwinner,sun50i-a64-pinctrl"; - reg = <0x01c20800 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = , - , - ; -@@ -658,6 +710,18 @@ - interrupt-controller; - #interrupt-cells = <3>; - -+ /omit-if-no-ref/ -+ aif2_pins: aif2-pins { -+ pins = "PB4", "PB5", "PB6", "PB7"; -+ function = "aif2"; -+ }; -+ -+ /omit-if-no-ref/ -+ aif3_pins: aif3-pins { -+ pins = "PG10", "PG11", "PG12", "PG13"; -+ function = "aif3"; -+ }; -+ - csi_pins: csi-pins { - pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6", - "PE7", "PE8", "PE9", "PE10", "PE11"; -@@ -816,8 +880,9 @@ - - lradc: lradc@1c21800 { - compatible = "allwinner,sun50i-a64-lradc", -- "allwinner,sun8i-a83t-r-lradc"; -+ "allwinner,sun4i-a10-lradc-keys"; - reg = <0x01c21800 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = ; - status = "disabled"; - }; -@@ -878,7 +943,7 @@ - }; - - codec: codec@1c22e00 { -- #sound-dai-cells = <0>; -+ #sound-dai-cells = <1>; - compatible = "allwinner,sun50i-a64-codec", - "allwinner,sun8i-a33-codec"; - reg = <0x01c22e00 0x600>; -@@ -906,6 +971,7 @@ - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; -+ fifo-size = <64>; - clocks = <&ccu CLK_BUS_UART0>; - resets = <&ccu RST_BUS_UART0>; - status = "disabled"; -@@ -917,6 +983,7 @@ - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; -+ fifo-size = <64>; - clocks = <&ccu CLK_BUS_UART1>; - resets = <&ccu RST_BUS_UART1>; - status = "disabled"; -@@ -928,6 +995,7 @@ - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; -+ fifo-size = <64>; - clocks = <&ccu CLK_BUS_UART2>; - resets = <&ccu RST_BUS_UART2>; - status = "disabled"; -@@ -939,6 +1007,7 @@ - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; -+ fifo-size = <64>; - clocks = <&ccu CLK_BUS_UART3>; - resets = <&ccu RST_BUS_UART3>; - status = "disabled"; -@@ -950,6 +1019,7 @@ - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; -+ fifo-size = <64>; - clocks = <&ccu CLK_BUS_UART4>; - resets = <&ccu RST_BUS_UART4>; - status = "disabled"; -@@ -1067,6 +1137,9 @@ - clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; - clock-names = "bus", "core"; - resets = <&ccu RST_BUS_GPU>; -+ -+ assigned-clocks = <&ccu CLK_GPU>; -+ assigned-clock-rates = <432000000>; - }; - - gic: interrupt-controller@1c81000 { -@@ -1081,8 +1154,7 @@ - }; - - pwm: pwm@1c21400 { -- compatible = "allwinner,sun50i-a64-pwm", -- "allwinner,sun5i-a13-pwm"; -+ compatible = "allwinner,sun50i-a64-pwm"; - reg = <0x01c21400 0x400>; - clocks = <&osc24M>; - pinctrl-names = "default"; -@@ -1161,6 +1233,7 @@ - }; - - hdmi: hdmi@1ee0000 { -+ #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-a64-dw-hdmi", - "allwinner,sun8i-a83t-dw-hdmi"; - reg = <0x01ee0000 0x10000>; -@@ -1208,6 +1281,7 @@ - compatible = "allwinner,sun50i-a64-rtc", - "allwinner,sun8i-h3-rtc"; - reg = <0x01f00000 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = , - ; - clock-output-names = "osc32k", "osc32k-out", "iosc"; -@@ -1219,7 +1293,7 @@ - compatible = "allwinner,sun50i-a64-r-intc", - "allwinner,sun6i-a31-r-intc"; - interrupt-controller; -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - reg = <0x01f00c00 0x400>; - interrupts = ; - }; -@@ -1230,6 +1304,7 @@ - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, - <&ccu CLK_PLL_PERIPH0>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; -+ protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; -@@ -1266,8 +1341,7 @@ - }; - - r_pwm: pwm@1f03800 { -- compatible = "allwinner,sun50i-a64-pwm", -- "allwinner,sun5i-a13-pwm"; -+ compatible = "allwinner,sun50i-a64-pwm"; - reg = <0x01f03800 0x400>; - clocks = <&osc24M>; - pinctrl-names = "default"; -@@ -1279,6 +1353,7 @@ - r_pio: pinctrl@1f02c00 { - compatible = "allwinner,sun50i-a64-r-pinctrl"; - reg = <0x01f02c00 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = ; - clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; - clock-names = "apb", "hosc", "losc"; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5-cpu-opp.dtsi -index b2657201957e..1f5a4e6d1844 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-cpu-opp.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-cpu-opp.dtsi -@@ -6,57 +6,57 @@ - compatible = "operating-points-v2"; - opp-shared; - -- opp-408000000 { -- opp-hz = /bits/ 64 <408000000>; -- opp-microvolt = <1000000 1000000 1310000>; -+ opp-480000000 { -+ opp-hz = /bits/ 64 <480000000>; -+ opp-microvolt = <1040000 1040000 1300000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - - opp-648000000 { - opp-hz = /bits/ 64 <648000000>; -- opp-microvolt = <1040000 1040000 1310000>; -+ opp-microvolt = <1040000 1040000 1300000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - - opp-816000000 { - opp-hz = /bits/ 64 <816000000>; -- opp-microvolt = <1080000 1080000 1310000>; -- clock-latency-ns = <244144>; /* 8 32k periods */ -- }; -- -- opp-912000000 { -- opp-hz = /bits/ 64 <912000000>; -- opp-microvolt = <1120000 1120000 1310000>; -+ opp-microvolt = <1100000 1100000 1300000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - - opp-960000000 { - opp-hz = /bits/ 64 <960000000>; -- opp-microvolt = <1160000 1160000 1310000>; -+ opp-microvolt = <1200000 1200000 1300000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - - opp-1008000000 { - opp-hz = /bits/ 64 <1008000000>; -- opp-microvolt = <1200000 1200000 1310000>; -+ opp-microvolt = <1200000 1200000 1300000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ -+ opp-1104000000 { -+ opp-hz = /bits/ 64 <1104000000>; -+ opp-microvolt = <1320000 1320000 1320000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-1056000000 { -- opp-hz = /bits/ 64 <1056000000>; -- opp-microvolt = <1240000 1240000 1310000>; -+ opp-1200000000 { -+ opp-hz = /bits/ 64 <1200000000>; -+ opp-microvolt = <1320000 1320000 1320000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-1104000000 { -- opp-hz = /bits/ 64 <1104000000>; -- opp-microvolt = <1260000 1260000 1310000>; -+ opp-1296000000 { -+ opp-hz = /bits/ 64 <1296000000>; -+ opp-microvolt = <1340000 1340000 1340000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -- opp-1152000000 { -- opp-hz = /bits/ 64 <1152000000>; -- opp-microvolt = <1300000 1300000 1310000>; -+ opp-1368000000 { -+ opp-hz = /bits/ 64 <1368000000>; -+ opp-microvolt = <1400000 1400000 1400000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -index 8bf2db9dcbda..50c739fff5c0 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -@@ -3,6 +3,7 @@ - - /dts-v1/; - #include "sun50i-h5.dtsi" -+#include "sun50i-h5-cpu-opp.dtsi" - - #include - #include -@@ -59,7 +60,7 @@ - - sw4 { - label = "sw4"; -- linux,code = ; -+ linux,code = ; - gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; - wakeup-source; - }; -@@ -86,6 +87,10 @@ - }; - }; - -+&cpu0 { -+ cpu-supply = <®_vdd_cpux>; -+}; -+ - &codec { - allwinner,audio-routing = - "Line Out", "LINEOUT", -@@ -144,6 +149,14 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ -+&i2s2 { -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&r_ir_rx_pin>; -@@ -201,6 +214,31 @@ - }; - }; - -+&r_i2c { -+ status = "okay"; -+ -+ reg_vdd_cpux: regulator@65 { -+ compatible = "silergy,sy8106a"; -+ reg = <0x65>; -+ regulator-name = "vdd-cpux"; -+ silergy,fixed-microvolt = <1200000>; -+ /* -+ * The datasheet uses 1.1V as the minimum value of VDD-CPUX, -+ * however both the Armbian DVFS table and the official one -+ * have operating points with voltage under 1.1V, and both -+ * DVFS table are known to work properly at the lowest -+ * operating point. -+ * -+ * Use 1.0V as the minimum voltage instead. -+ */ -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1400000>; -+ regulator-ramp-delay = <200>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pa_pins>; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi -index 10489e508695..31037177a385 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi -@@ -6,6 +6,12 @@ - #include - - / { -+ aliases { -+ mmc0 = &mmc0; -+ mmc1 = &mmc1; -+ mmc2 = &mmc2; -+ }; -+ - cpus { - #address-cells = <1>; - #size-cells = <0>; -@@ -86,6 +92,19 @@ - #size-cells = <1>; - ranges; - -+ sram_a2: sram@40000 { -+ compatible = "mmio-sram"; -+ reg = <0x00040000 0x14000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x00040000 0x14000>; -+ -+ scpi_sram: scp-shmem@13c00 { -+ compatible = "arm,scp-shmem"; -+ reg = <0x13c00 0x200>; -+ }; -+ }; -+ - sram_c1: sram@18000 { - compatible = "mmio-sram"; - reg = <0x00018000 0x1c000>; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts -index 7c9dbde645b5..c175da1ff5b9 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts -@@ -118,6 +118,14 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ -+&i2s1 { -+ status = "okay"; -+}; -+ - &mdio { - ext_rgmii_phy: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; -@@ -157,7 +165,7 @@ - compatible = "x-powers,axp805", "x-powers,axp806"; - reg = <0x36>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - x-powers,self-working-mode; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -index 15c9dd8c4479..96bd41c782f1 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -@@ -15,6 +15,7 @@ - aliases { - serial0 = &uart0; - serial1 = &uart1; -+ ethernet0 = &emac; - }; - - chosen { -@@ -64,6 +65,15 @@ - regulator-always-on; - }; - -+ reg_gmac_2v5: gmac-2v5 { -+ compatible = "regulator-fixed"; -+ regulator-name = "gmac-2v5"; -+ regulator-min-microvolt = <2500000>; -+ regulator-max-microvolt = <2500000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ -+ }; -+ - reg_vcc33_wifi: vcc33-wifi { - /* Always on 3.3V regulator for WiFi and BT */ - compatible = "regulator-fixed"; -@@ -128,6 +138,35 @@ - }; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&ext_rgmii_pins>; -+ phy-mode = "rgmii-id"; -+ phy-handle = <&ext_rgmii_phy>; -+ /* -+ * The board uses 2.5V RGMII signalling. Power sequence to enable -+ * the phy is to enable GMAC-2V5 and GMAC-3V (aldo2) power rails -+ * at the same time and to wait 100ms. The driver enables phy-io -+ * first. Delay is achieved with enable-ramp-delay on reg_aldo2. -+ */ -+ phy-supply = <®_aldo2>; -+ phy-io-supply = <®_gmac_2v5>; -+ allwinner,rx-delay-ps = <200>; -+ allwinner,tx-delay-ps = <200>; -+ status = "okay"; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ -+ reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */ -+ reset-assert-us = <15000>; -+ reset-deassert-us = <40000>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_cldo1>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ -@@ -161,6 +200,14 @@ - status = "okay"; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ -+&i2s1 { -+ status = "okay"; -+}; -+ - &ohci0 { - status = "okay"; - }; -@@ -182,7 +229,7 @@ - compatible = "x-powers,axp805", "x-powers,axp806"; - reg = <0x36>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - x-powers,self-working-mode; -@@ -207,6 +254,7 @@ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc33-audio-tv-ephy-mac"; -+ regulator-enable-ramp-delay = <100000>; - }; - - /* ALDO3 is shorted to CLDO1 */ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -index ebc120a9232f..1ee19f5fc6ab 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -@@ -119,7 +119,7 @@ - compatible = "x-powers,axp805", "x-powers,axp806"; - reg = <0x36>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - x-powers,self-working-mode; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -index 961732c52aa0..0b9117e986b7 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -@@ -167,7 +167,7 @@ - compatible = "x-powers,axp805", "x-powers,axp806"; - reg = <0x36>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - x-powers,self-working-mode; -@@ -280,7 +280,7 @@ - compatible = "nxp,pcf8563"; - reg = <0x51>; - interrupt-parent = <&r_intc>; -- interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupts = ; - #clock-cells = <0>; - }; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index 77765d4a05ec..c37b40adadb2 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -16,6 +16,12 @@ - #address-cells = <1>; - #size-cells = <1>; - -+ aliases { -+ mmc0 = &mmc0; -+ mmc1 = &mmc1; -+ mmc2 = &mmc2; -+ }; -+ - cpus { - #address-cells = <1>; - #size-cells = <0>; -@@ -67,6 +73,25 @@ - status = "disabled"; - }; - -+ hdmi_sound: hdmi-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "sun50i-h6-hdmi"; -+ simple-audio-card,mclk-fs = <128>; -+ simple-audio-card,frame-inversion; -+ status = "disabled"; -+ -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s1>; -+ dai-tdm-slot-num = <2>; -+ dai-tdm-slot-width = <32>; -+ }; -+ }; -+ - osc24M: osc24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; -@@ -88,6 +113,13 @@ - method = "smc"; - }; - -+ scpi_protocol: scpi { -+ compatible = "arm,scpi"; -+ mboxes = <&msgbox 2>, <&msgbox 3>; -+ mbox-names = "tx", "rx"; -+ shmem = <&scpi_sram>; -+ }; -+ - timer { - compatible = "arm,armv8-timer"; - arm,no-tick-in-suspend; -@@ -196,6 +228,19 @@ - #size-cells = <1>; - ranges; - -+ sram_a2: sram@100000 { -+ compatible = "mmio-sram"; -+ reg = <0x00100000 0x18000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x00100000 0x18000>; -+ -+ scpi_sram: scp-shmem@17c00 { -+ compatible = "arm,scp-shmem"; -+ reg = <0x17c00 0x200>; -+ }; -+ }; -+ - sram_c: sram@28000 { - compatible = "mmio-sram"; - reg = <0x00028000 0x1e000>; -@@ -230,6 +275,7 @@ - reg = <0x03001000 0x1000>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>; - clock-names = "hosc", "losc", "iosc"; -+ protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; -@@ -294,6 +340,7 @@ - pio: pinctrl@300b000 { - compatible = "allwinner,sun50i-h6-pinctrl"; - reg = <0x0300b000 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = , - , - , -@@ -759,6 +806,7 @@ - }; - - hdmi: hdmi@6000000 { -+ #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-h6-dw-hdmi"; - reg = <0x06000000 0x10000>; - reg-io-width = <1>; -@@ -902,6 +950,7 @@ - rtc: rtc@7000000 { - compatible = "allwinner,sun50i-h6-rtc"; - reg = <0x07000000 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = , - ; - clock-output-names = "osc32k", "osc32k-out", "iosc"; -@@ -914,6 +963,7 @@ - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, - <&ccu CLK_PLL_PERIPH0>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; -+ protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; -@@ -927,10 +977,9 @@ - }; - - r_intc: interrupt-controller@7021000 { -- compatible = "allwinner,sun50i-h6-r-intc", -- "allwinner,sun6i-a31-r-intc"; -+ compatible = "allwinner,sun50i-h6-r-intc"; - interrupt-controller; -- #interrupt-cells = <2>; -+ #interrupt-cells = <3>; - reg = <0x07021000 0x400>; - interrupts = ; - }; -@@ -938,6 +987,7 @@ - r_pio: pinctrl@7022000 { - compatible = "allwinner,sun50i-h6-r-pinctrl"; - reg = <0x07022000 0x400>; -+ interrupt-parent = <&r_intc>; - interrupts = , - ; - clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -index 219b7507a10f..4cd472501959 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -380,7 +380,7 @@ - }; - - &cdn_dp { -- status = "okay"; -+ //status = "okay"; - }; - - &cpu_b0 { -@@ -705,14 +705,14 @@ - - connector { - compatible = "usb-c-connector"; -- data-role = "host"; -+ data-role = "dual"; - label = "USB-C"; - op-sink-microwatt = <1000000>; - power-role = "dual"; - sink-pdos = -- ; -+ ; - source-pdos = -- ; -+ ; - try-power-role = "sink"; - - ports { -diff --git a/arch/arm64/configs/orangepi_defconfig b/arch/arm64/configs/orangepi_defconfig -new file mode 100644 -index 000000000000..5dee5914f221 ---- /dev/null -+++ b/arch/arm64/configs/orangepi_defconfig -@@ -0,0 +1,645 @@ -+CONFIG_SYSVIPC=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_PREEMPT_VOLUNTARY=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASK_XACCT=y -+CONFIG_TASK_IO_ACCOUNTING=y -+CONFIG_IKCONFIG=y -+CONFIG_IKCONFIG_PROC=y -+CONFIG_CGROUPS=y -+CONFIG_MEMCG=y -+CONFIG_BLK_CGROUP=y -+CONFIG_CGROUP_SCHED=y -+CONFIG_CGROUP_PIDS=y -+CONFIG_CPUSETS=y -+# CONFIG_PROC_PID_CPUSET is not set -+CONFIG_CGROUP_DEVICE=y -+CONFIG_CGROUP_BPF=y -+CONFIG_USER_NS=y -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+# CONFIG_RD_XZ is not set -+# CONFIG_RD_LZO is not set -+CONFIG_BOOT_CONFIG=y -+CONFIG_BPF_SYSCALL=y -+CONFIG_PERF_EVENTS=y -+CONFIG_ARCH_SUNXI=y -+# CONFIG_ARM64_ERRATUM_1024718 is not set -+# CONFIG_ARM64_ERRATUM_1165522 is not set -+# CONFIG_ARM64_ERRATUM_1319367 is not set -+# CONFIG_ARM64_ERRATUM_1530923 is not set -+# CONFIG_ARM64_ERRATUM_1286807 is not set -+# CONFIG_ARM64_ERRATUM_1542419 is not set -+# CONFIG_CAVIUM_ERRATUM_22375 is not set -+# CONFIG_CAVIUM_ERRATUM_23154 is not set -+# CONFIG_CAVIUM_ERRATUM_27456 is not set -+# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set -+# CONFIG_FUJITSU_ERRATUM_010001 is not set -+# CONFIG_HISILICON_ERRATUM_161600802 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set -+# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set -+CONFIG_SCHED_MC=y -+CONFIG_NR_CPUS=8 -+CONFIG_PARAVIRT=y -+# CONFIG_ARM64_RAS_EXTN is not set -+# CONFIG_ARM64_PTR_AUTH is not set -+# CONFIG_ARM64_AMU_EXTN is not set -+# CONFIG_EFI is not set -+CONFIG_PM_WAKELOCKS=y -+CONFIG_PM_DEBUG=y -+CONFIG_CPU_IDLE=y -+CONFIG_CPU_IDLE_GOV_LADDER=y -+CONFIG_ARM_CPUIDLE=y -+CONFIG_ARM_PSCI_CPUIDLE=y -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_STAT=y -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -+CONFIG_CPUFREQ_DT=y -+CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=y -+CONFIG_VIRTUALIZATION=y -+CONFIG_KVM=y -+CONFIG_CRYPTO_SHA1_ARM64_CE=y -+CONFIG_CRYPTO_SHA2_ARM64_CE=y -+CONFIG_CRYPTO_SHA512_ARM64_CE=y -+CONFIG_CRYPTO_SHA3_ARM64=y -+CONFIG_CRYPTO_SM3_ARM64_CE=y -+CONFIG_CRYPTO_SM4_ARM64_CE=y -+CONFIG_CRYPTO_GHASH_ARM64_CE=y -+CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y -+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -+CONFIG_CRYPTO_AES_ARM64_BS=y -+CONFIG_JUMP_LABEL=y -+# CONFIG_STACKPROTECTOR is not set -+CONFIG_MODULES=y -+CONFIG_BLK_DEV_THROTTLING=y -+CONFIG_BLK_WBT=y -+CONFIG_BLK_CGROUP_IOLATENCY=y -+CONFIG_BLK_CGROUP_IOCOST=y -+# CONFIG_MQ_IOSCHED_KYBER is not set -+CONFIG_IOSCHED_BFQ=y -+CONFIG_BFQ_GROUP_IOSCHED=y -+CONFIG_CMA=y -+CONFIG_ZPOOL=y -+CONFIG_ZBUD=y -+CONFIG_Z3FOLD=y -+CONFIG_ZSMALLOC=y -+CONFIG_NET=y -+CONFIG_PACKET=y -+CONFIG_PACKET_DIAG=y -+CONFIG_UNIX=y -+CONFIG_UNIX_DIAG=y -+CONFIG_NET_KEY=y -+CONFIG_INET=y -+CONFIG_IP_MULTICAST=y -+CONFIG_IP_ADVANCED_ROUTER=y -+CONFIG_NET_IPIP=y -+CONFIG_IP_MROUTE=y -+CONFIG_SYN_COOKIES=y -+CONFIG_INET_UDP_DIAG=y -+CONFIG_INET_RAW_DIAG=y -+CONFIG_INET_DIAG_DESTROY=y -+CONFIG_IPV6_MIP6=y -+CONFIG_IPV6_TUNNEL=y -+CONFIG_NETFILTER=y -+CONFIG_BRIDGE_NETFILTER=y -+CONFIG_NETFILTER_NETLINK_ACCT=y -+CONFIG_NETFILTER_NETLINK_QUEUE=y -+CONFIG_NETFILTER_NETLINK_LOG=y -+CONFIG_NF_CONNTRACK=y -+CONFIG_NF_LOG_NETDEV=y -+CONFIG_NF_CONNTRACK_MARK=y -+# CONFIG_NF_CONNTRACK_PROCFS is not set -+CONFIG_NF_CONNTRACK_FTP=y -+CONFIG_NF_CONNTRACK_H323=y -+CONFIG_NF_CONNTRACK_IRC=y -+CONFIG_NF_CONNTRACK_NETBIOS_NS=y -+CONFIG_NF_CONNTRACK_SNMP=y -+CONFIG_NF_CONNTRACK_PPTP=y -+CONFIG_NF_CONNTRACK_SIP=y -+CONFIG_NF_CONNTRACK_TFTP=y -+CONFIG_NF_CT_NETLINK=y -+CONFIG_NETFILTER_NETLINK_GLUE_CT=y -+CONFIG_NF_TABLES=y -+CONFIG_NF_TABLES_INET=y -+CONFIG_NF_TABLES_NETDEV=y -+CONFIG_NFT_NUMGEN=y -+CONFIG_NFT_CT=y -+CONFIG_NFT_COUNTER=y -+CONFIG_NFT_CONNLIMIT=y -+CONFIG_NFT_LOG=y -+CONFIG_NFT_LIMIT=y -+CONFIG_NFT_MASQ=y -+CONFIG_NFT_REDIR=y -+CONFIG_NFT_NAT=y -+CONFIG_NFT_TUNNEL=y -+CONFIG_NFT_OBJREF=y -+CONFIG_NFT_QUEUE=y -+CONFIG_NFT_QUOTA=y -+CONFIG_NFT_REJECT=y -+CONFIG_NFT_HASH=y -+CONFIG_NFT_FIB_INET=y -+CONFIG_NFT_SOCKET=y -+CONFIG_NFT_OSF=y -+CONFIG_NFT_TPROXY=y -+CONFIG_NFT_DUP_NETDEV=y -+CONFIG_NFT_FWD_NETDEV=y -+CONFIG_NFT_FIB_NETDEV=y -+CONFIG_NFT_REJECT_NETDEV=y -+CONFIG_NF_FLOW_TABLE_INET=y -+CONFIG_NF_FLOW_TABLE=y -+CONFIG_IP_SET=y -+CONFIG_IP_SET_BITMAP_IP=y -+CONFIG_IP_SET_BITMAP_IPMAC=y -+CONFIG_IP_SET_BITMAP_PORT=y -+CONFIG_IP_SET_HASH_IP=y -+CONFIG_IP_SET_HASH_IPMARK=y -+CONFIG_IP_SET_HASH_IPPORT=y -+CONFIG_IP_SET_HASH_IPPORTIP=y -+CONFIG_IP_SET_HASH_IPPORTNET=y -+CONFIG_IP_SET_HASH_IPMAC=y -+CONFIG_IP_SET_HASH_MAC=y -+CONFIG_IP_SET_HASH_NETPORTNET=y -+CONFIG_IP_SET_HASH_NET=y -+CONFIG_IP_SET_HASH_NETNET=y -+CONFIG_IP_SET_HASH_NETPORT=y -+CONFIG_IP_SET_HASH_NETIFACE=y -+CONFIG_IP_SET_LIST_SET=y -+CONFIG_NFT_DUP_IPV4=y -+CONFIG_NFT_FIB_IPV4=y -+CONFIG_NF_TABLES_ARP=y -+CONFIG_NF_FLOW_TABLE_IPV4=y -+CONFIG_NF_LOG_ARP=y -+CONFIG_NF_LOG_IPV4=y -+# CONFIG_NF_NAT_SNMP_BASIC is not set -+CONFIG_NFT_DUP_IPV6=y -+CONFIG_NFT_FIB_IPV6=y -+CONFIG_NF_FLOW_TABLE_IPV6=y -+CONFIG_NF_LOG_IPV6=y -+CONFIG_NF_TABLES_BRIDGE=y -+CONFIG_NFT_BRIDGE_REJECT=y -+CONFIG_NF_LOG_BRIDGE=y -+CONFIG_BPFILTER=y -+CONFIG_BPFILTER_UMH=y -+CONFIG_IP_SCTP=y -+CONFIG_SCTP_COOKIE_HMAC_SHA1=y -+CONFIG_L2TP=y -+CONFIG_L2TP_V3=y -+CONFIG_L2TP_IP=y -+CONFIG_BRIDGE=y -+CONFIG_BRIDGE_VLAN_FILTERING=y -+CONFIG_VLAN_8021Q=y -+CONFIG_NET_SCHED=y -+CONFIG_NET_SCH_CBQ=y -+CONFIG_NET_SCH_HTB=y -+CONFIG_NET_CLS_BASIC=y -+CONFIG_NET_CLS_ROUTE4=y -+CONFIG_NET_CLS_FW=y -+CONFIG_NET_CLS_CGROUP=y -+CONFIG_NET_CLS_BPF=y -+CONFIG_NET_CLS_MATCHALL=y -+CONFIG_NET_CLS_ACT=y -+CONFIG_NET_ACT_POLICE=y -+CONFIG_NET_ACT_GACT=y -+CONFIG_NET_TC_SKB_EXT=y -+CONFIG_BT=y -+CONFIG_BT_RFCOMM=y -+CONFIG_BT_RFCOMM_TTY=y -+CONFIG_BT_BNEP=y -+CONFIG_BT_BNEP_MC_FILTER=y -+CONFIG_BT_BNEP_PROTO_FILTER=y -+CONFIG_BT_HIDP=y -+CONFIG_BT_HS=y -+CONFIG_BT_LEDS=y -+CONFIG_BT_HCIUART=y -+CONFIG_BT_HCIUART_BCM=y -+CONFIG_CFG80211=y -+CONFIG_CFG80211_DEBUGFS=y -+CONFIG_CFG80211_WEXT=y -+CONFIG_MAC80211=y -+CONFIG_MAC80211_LEDS=y -+CONFIG_RFKILL=y -+CONFIG_RFKILL_GPIO=y -+CONFIG_UEVENT_HELPER=y -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+#CONFIG_EXTRA_FIRMWARE="regulatory.db regulatory.db.p7s edid/asus.bin brcm/brcmfmac43456-sdio.bin brcm/brcmfmac43456-sdio.txt brcm/BCM4345C5.hcd" -+#CONFIG_EXTRA_FIRMWARE_DIR="/workspace/megous.com/orangepi-pc/firmware" -+CONFIG_GNSS=y -+CONFIG_ZRAM=y -+CONFIG_ZRAM_WRITEBACK=y -+CONFIG_ZRAM_MEMORY_TRACKING=y -+CONFIG_BLK_DEV_LOOP=y -+CONFIG_BLK_DEV_NBD=y -+CONFIG_SCSI=y -+CONFIG_BLK_DEV_SD=y -+# CONFIG_SCSI_LOWLEVEL is not set -+CONFIG_MD=y -+CONFIG_BLK_DEV_DM=y -+CONFIG_DM_CRYPT=y -+CONFIG_DM_INIT=y -+CONFIG_DM_INTEGRITY=y -+CONFIG_NETDEVICES=y -+CONFIG_WIREGUARD=y -+CONFIG_TUN=y -+CONFIG_VETH=y -+# CONFIG_NET_VENDOR_ALACRITECH is not set -+# CONFIG_NET_VENDOR_ALLWINNER is not set -+# CONFIG_NET_VENDOR_AMAZON is not set -+# CONFIG_NET_VENDOR_AMD is not set -+# CONFIG_NET_VENDOR_AQUANTIA is not set -+# CONFIG_NET_VENDOR_ARC is not set -+# CONFIG_NET_VENDOR_AURORA is not set -+# CONFIG_NET_VENDOR_BROADCOM is not set -+# CONFIG_NET_VENDOR_CADENCE is not set -+# CONFIG_NET_VENDOR_CAVIUM is not set -+# CONFIG_NET_VENDOR_CORTINA is not set -+# CONFIG_NET_VENDOR_EZCHIP is not set -+# CONFIG_NET_VENDOR_GOOGLE is not set -+# CONFIG_NET_VENDOR_HISILICON is not set -+# CONFIG_NET_VENDOR_HUAWEI is not set -+# CONFIG_NET_VENDOR_INTEL is not set -+# CONFIG_NET_VENDOR_MARVELL is not set -+# CONFIG_NET_VENDOR_MELLANOX is not set -+# CONFIG_NET_VENDOR_MICREL is not set -+# CONFIG_NET_VENDOR_MICROCHIP is not set -+# CONFIG_NET_VENDOR_MICROSEMI is not set -+# CONFIG_NET_VENDOR_NATSEMI is not set -+# CONFIG_NET_VENDOR_NETRONOME is not set -+# CONFIG_NET_VENDOR_NI is not set -+# CONFIG_NET_VENDOR_PENSANDO is not set -+# CONFIG_NET_VENDOR_QUALCOMM is not set -+# CONFIG_NET_VENDOR_RENESAS is not set -+# CONFIG_NET_VENDOR_ROCKER is not set -+# CONFIG_NET_VENDOR_SAMSUNG is not set -+# CONFIG_NET_VENDOR_SEEQ is not set -+# CONFIG_NET_VENDOR_SOLARFLARE is not set -+# CONFIG_NET_VENDOR_SMSC is not set -+# CONFIG_NET_VENDOR_SOCIONEXT is not set -+CONFIG_STMMAC_ETH=y -+# CONFIG_NET_VENDOR_SYNOPSYS is not set -+# CONFIG_NET_VENDOR_VIA is not set -+# CONFIG_NET_VENDOR_WIZNET is not set -+# CONFIG_NET_VENDOR_XILINX is not set -+CONFIG_LED_TRIGGER_PHY=y -+CONFIG_REALTEK_PHY=y -+CONFIG_MDIO_SUN4I=y -+CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y -+CONFIG_PPP=y -+CONFIG_PPP_BSDCOMP=y -+CONFIG_PPP_DEFLATE=y -+CONFIG_PPP_FILTER=y -+CONFIG_PPP_MPPE=y -+CONFIG_PPPOE=y -+CONFIG_PPPOL2TP=y -+CONFIG_PPP_ASYNC=y -+CONFIG_PPP_SYNC_TTY=y -+CONFIG_USB_RTL8152=y -+CONFIG_USB_USBNET=y -+# CONFIG_USB_NET_AX8817X is not set -+# CONFIG_USB_NET_AX88179_178A is not set -+CONFIG_USB_NET_CDC_EEM=y -+# CONFIG_USB_NET_NET1080 is not set -+# CONFIG_USB_NET_CDC_SUBSET is not set -+# CONFIG_USB_NET_ZAURUS is not set -+CONFIG_USB_RTL8153_ECM=y -+# CONFIG_WLAN_VENDOR_ADMTEK is not set -+# CONFIG_WLAN_VENDOR_ATH is not set -+# CONFIG_WLAN_VENDOR_ATMEL is not set -+CONFIG_B43=y -+CONFIG_B43_SDIO=y -+CONFIG_BRCMFMAC=y -+# CONFIG_WLAN_VENDOR_CISCO is not set -+# CONFIG_WLAN_VENDOR_INTEL is not set -+# CONFIG_WLAN_VENDOR_INTERSIL is not set -+# CONFIG_WLAN_VENDOR_MARVELL is not set -+# CONFIG_WLAN_VENDOR_MEDIATEK is not set -+CONFIG_RT2X00=y -+CONFIG_RT2800USB=y -+# CONFIG_RT2800USB_RT35XX is not set -+CONFIG_RT2800USB_RT53XX=y -+# CONFIG_WLAN_VENDOR_REALTEK is not set -+# CONFIG_WLAN_VENDOR_RSI is not set -+# CONFIG_WLAN_VENDOR_ST is not set -+# CONFIG_WLAN_VENDOR_TI is not set -+# CONFIG_WLAN_VENDOR_ZYDAS is not set -+# CONFIG_WLAN_VENDOR_QUANTENNA is not set -+CONFIG_INPUT_MOUSEDEV=y -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_EVDEV=y -+# CONFIG_KEYBOARD_ATKBD is not set -+CONFIG_KEYBOARD_GPIO=y -+CONFIG_KEYBOARD_GPIO_POLLED=y -+# CONFIG_INPUT_MOUSE is not set -+CONFIG_INPUT_MISC=y -+CONFIG_INPUT_AXP20X_PEK=y -+# CONFIG_SERIO is not set -+# CONFIG_LEGACY_PTYS is not set -+CONFIG_SERIAL_8250=y -+# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -+CONFIG_SERIAL_8250_CONSOLE=y -+CONFIG_SERIAL_8250_NR_UARTS=8 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=8 -+CONFIG_SERIAL_8250_DW=y -+CONFIG_SERIAL_OF_PLATFORM=y -+CONFIG_SERIAL_DEV_BUS=y -+# CONFIG_HW_RANDOM is not set -+CONFIG_I2C_CHARDEV=y -+CONFIG_I2C_MV64XXX=y -+CONFIG_SPI=y -+CONFIG_SPI_SUN4I=y -+CONFIG_SPI_SUN6I=y -+CONFIG_SPI_SPIDEV=y -+CONFIG_PINCTRL_AXP209=y -+CONFIG_PINCTRL_SINGLE=y -+CONFIG_POWER_RESET_GPIO=y -+CONFIG_POWER_RESET_GPIO_RESTART=y -+# CONFIG_HWMON is not set -+CONFIG_THERMAL=y -+CONFIG_THERMAL_STATISTICS=y -+CONFIG_THERMAL_WRITABLE_TRIPS=y -+CONFIG_THERMAL_GOV_FAIR_SHARE=y -+CONFIG_THERMAL_GOV_BANG_BANG=y -+CONFIG_CPU_THERMAL=y -+CONFIG_SUN8I_THERMAL=y -+CONFIG_WATCHDOG=y -+CONFIG_SUNXI_WATCHDOG=y -+CONFIG_MFD_SUN4I_GPADC=y -+CONFIG_MFD_AXP20X_I2C=y -+CONFIG_REGULATOR=y -+CONFIG_REGULATOR_FIXED_VOLTAGE=y -+CONFIG_REGULATOR_USERSPACE_CONSUMER=y -+CONFIG_REGULATOR_AXP20X=y -+CONFIG_REGULATOR_GPIO=y -+CONFIG_REGULATOR_SY8106A=y -+CONFIG_RC_CORE=y -+CONFIG_LIRC=y -+CONFIG_BPF_LIRC_MODE2=y -+CONFIG_RC_DECODERS=y -+CONFIG_IR_NEC_DECODER=y -+CONFIG_IR_RC5_DECODER=y -+CONFIG_IR_RC6_DECODER=y -+CONFIG_IR_JVC_DECODER=y -+CONFIG_IR_SONY_DECODER=y -+CONFIG_IR_SANYO_DECODER=y -+CONFIG_IR_SHARP_DECODER=y -+CONFIG_IR_MCE_KBD_DECODER=y -+CONFIG_IR_XMP_DECODER=y -+CONFIG_RC_DEVICES=y -+CONFIG_IR_GPIO_CIR=y -+CONFIG_IR_SUNXI=y -+CONFIG_MEDIA_CEC_RC=y -+CONFIG_MEDIA_CEC_SUPPORT=y -+CONFIG_MEDIA_SUPPORT=y -+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -+CONFIG_MEDIA_CAMERA_SUPPORT=y -+CONFIG_MEDIA_PLATFORM_SUPPORT=y -+CONFIG_MEDIA_USB_SUPPORT=y -+CONFIG_USB_VIDEO_CLASS=y -+# CONFIG_USB_GSPCA is not set -+CONFIG_V4L_PLATFORM_DRIVERS=y -+CONFIG_VIDEO_SUN6I_CSI=y -+CONFIG_V4L_MEM2MEM_DRIVERS=y -+CONFIG_VIDEO_MEM2MEM_DEINTERLACE=y -+CONFIG_VIDEO_SUN8I_DEINTERLACE=y -+CONFIG_VIDEO_SUN8I_ROTATE=y -+# CONFIG_VIDEO_IR_I2C is not set -+CONFIG_DRM=y -+CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_SUN4I=y -+CONFIG_DRM_SUN4I_HDMI_CEC=y -+CONFIG_DRM_SUN8I_DW_HDMI=y -+CONFIG_DRM_SUN8I_MIXER=y -+CONFIG_DRM_DW_HDMI_AHB_AUDIO=y -+CONFIG_DRM_DW_HDMI_I2S_AUDIO=y -+CONFIG_DRM_DW_HDMI_CEC=y -+CONFIG_DRM_LIMA=y -+CONFIG_DRM_PANFROST=y -+CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER=y -+CONFIG_LOGO=y -+CONFIG_SOUND=y -+CONFIG_SND=y -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=y -+CONFIG_SND_PCM_OSS=y -+CONFIG_SND_HRTIMER=y -+# CONFIG_SND_SPI is not set -+CONFIG_SND_USB_AUDIO=y -+CONFIG_SND_SOC=y -+CONFIG_SND_SUN4I_CODEC=y -+CONFIG_SND_SUN8I_CODEC=y -+CONFIG_SND_SUN8I_CODEC_ANALOG=y -+CONFIG_SND_SUN50I_CODEC_ANALOG=y -+CONFIG_SND_SUN4I_I2S=y -+CONFIG_SND_SUN4I_SPDIF=y -+CONFIG_SND_SOC_SPDIF=y -+CONFIG_SND_SIMPLE_CARD=y -+CONFIG_HIDRAW=y -+# CONFIG_HID_A4TECH is not set -+# CONFIG_HID_APPLE is not set -+# CONFIG_HID_BELKIN is not set -+# CONFIG_HID_CHERRY is not set -+# CONFIG_HID_CHICONY is not set -+# CONFIG_HID_CYPRESS is not set -+# CONFIG_HID_EZKEY is not set -+# CONFIG_HID_KENSINGTON is not set -+# CONFIG_HID_LOGITECH is not set -+# CONFIG_HID_REDRAGON is not set -+# CONFIG_HID_MICROSOFT is not set -+# CONFIG_HID_MONTEREY is not set -+CONFIG_USB_HIDDEV=y -+CONFIG_USB_LED_TRIG=y -+CONFIG_USB=y -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -+CONFIG_USB_OTG=y -+CONFIG_USB_OTG_FSM=y -+CONFIG_USB_LEDS_TRIGGER_USBPORT=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_HCD_PLATFORM=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_HCD_PLATFORM=y -+CONFIG_USB_ACM=y -+CONFIG_USB_PRINTER=y -+CONFIG_USB_WDM=y -+CONFIG_USB_STORAGE=y -+CONFIG_USB_UAS=y -+CONFIG_USBIP_CORE=y -+CONFIG_USBIP_VHCI_HCD=y -+CONFIG_USBIP_HOST=y -+CONFIG_USBIP_VUDC=y -+CONFIG_USB_MUSB_HDRC=y -+CONFIG_USB_MUSB_SUNXI=y -+CONFIG_MUSB_PIO_ONLY=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_HOST=y -+CONFIG_USB_SERIAL=y -+CONFIG_USB_SERIAL_CH341=y -+CONFIG_USB_SERIAL_CP210X=y -+CONFIG_USB_SERIAL_FTDI_SIO=y -+CONFIG_USB_SERIAL_PL2303=y -+CONFIG_NOP_USB_XCEIV=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_VBUS_DRAW=500 -+CONFIG_U_SERIAL_CONSOLE=y -+CONFIG_USB_CONFIGFS=y -+CONFIG_USB_CONFIGFS_SERIAL=y -+CONFIG_USB_CONFIGFS_ACM=y -+CONFIG_USB_CONFIGFS_OBEX=y -+CONFIG_USB_CONFIGFS_NCM=y -+CONFIG_USB_CONFIGFS_ECM=y -+CONFIG_USB_CONFIGFS_ECM_SUBSET=y -+CONFIG_USB_CONFIGFS_RNDIS=y -+CONFIG_USB_CONFIGFS_EEM=y -+CONFIG_USB_CONFIGFS_MASS_STORAGE=y -+CONFIG_USB_CONFIGFS_F_LB_SS=y -+CONFIG_USB_CONFIGFS_F_FS=y -+CONFIG_USB_CONFIGFS_F_UAC1=y -+CONFIG_USB_CONFIGFS_F_UAC2=y -+CONFIG_USB_CONFIGFS_F_MIDI=y -+CONFIG_USB_CONFIGFS_F_HID=y -+CONFIG_USB_CONFIGFS_F_PRINTER=y -+CONFIG_USB_CDC_COMPOSITE=y -+CONFIG_MMC=y -+CONFIG_MMC_SUNXI=y -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_ONESHOT=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_LEDS_TRIGGER_CPU=y -+CONFIG_LEDS_TRIGGER_ACTIVITY=y -+CONFIG_LEDS_TRIGGER_GPIO=y -+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -+CONFIG_LEDS_TRIGGER_PANIC=y -+CONFIG_LEDS_TRIGGER_NETDEV=y -+CONFIG_LEDS_TRIGGER_PATTERN=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_INTF_PROC is not set -+CONFIG_RTC_DRV_SUN6I=y -+CONFIG_DMADEVICES=y -+CONFIG_DMA_SUN6I=y -+CONFIG_DMABUF_HEAPS=y -+CONFIG_DMABUF_HEAPS_SYSTEM=y -+CONFIG_DMABUF_HEAPS_CMA=y -+# CONFIG_VIRTIO_MENU is not set -+CONFIG_STAGING=y -+CONFIG_STAGING_MEDIA=y -+CONFIG_VIDEO_SUNXI=y -+CONFIG_VIDEO_SUNXI_CEDRUS=y -+# CONFIG_CLK_SUNXI_PRCM_SUN9I is not set -+# CONFIG_SUN50I_A64_CCU is not set -+# CONFIG_FSL_ERRATUM_A008585 is not set -+# CONFIG_HISILICON_ERRATUM_161010101 is not set -+CONFIG_DEVFREQ_GOV_PERFORMANCE=y -+CONFIG_DEVFREQ_GOV_POWERSAVE=y -+CONFIG_DEVFREQ_GOV_USERSPACE=y -+CONFIG_DEVFREQ_GOV_PASSIVE=y -+CONFIG_PM_DEVFREQ_EVENT=y -+CONFIG_PWM=y -+CONFIG_PWM_SUN4I=y -+CONFIG_PHY_SUN4I_USB=y -+CONFIG_PHY_SUN50I_USB3=y -+CONFIG_ARM_CCI_PMU=y -+# CONFIG_ARM_CCI400_PMU is not set -+# CONFIG_ARM_CCI5xx_PMU is not set -+CONFIG_NVMEM_SUNXI_SID=y -+CONFIG_VALIDATE_FS_PARSER=y -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_POSIX_ACL=y -+CONFIG_XFS_FS=y -+CONFIG_XFS_POSIX_ACL=y -+CONFIG_F2FS_FS=y -+CONFIG_F2FS_FS_SECURITY=y -+CONFIG_F2FS_CHECK_FS=y -+CONFIG_F2FS_FS_COMPRESSION=y -+CONFIG_FS_ENCRYPTION=y -+CONFIG_FANOTIFY=y -+CONFIG_AUTOFS4_FS=y -+CONFIG_FUSE_FS=y -+CONFIG_CUSE=y -+CONFIG_OVERLAY_FS=y -+CONFIG_OVERLAY_FS_INDEX=y -+CONFIG_OVERLAY_FS_METACOPY=y -+CONFIG_FSCACHE=y -+CONFIG_VFAT_FS=y -+CONFIG_PROC_CHILDREN=y -+CONFIG_TMPFS=y -+CONFIG_TMPFS_POSIX_ACL=y -+CONFIG_ECRYPT_FS=y -+CONFIG_ECRYPT_FS_MESSAGING=y -+CONFIG_SQUASHFS=y -+CONFIG_SQUASHFS_FILE_DIRECT=y -+CONFIG_SQUASHFS_DECOMP_MULTI=y -+CONFIG_SQUASHFS_XATTR=y -+CONFIG_SQUASHFS_LZ4=y -+CONFIG_SQUASHFS_LZO=y -+CONFIG_SQUASHFS_XZ=y -+CONFIG_SQUASHFS_ZSTD=y -+CONFIG_NFS_FS=y -+# CONFIG_NFS_V2 is not set -+# CONFIG_NFS_V3 is not set -+CONFIG_NFS_V4=y -+CONFIG_NFS_V4_1=y -+CONFIG_NFS_V4_2=y -+CONFIG_NFSD=y -+CONFIG_NFSD_V3_ACL=y -+CONFIG_NFSD_V4=y -+CONFIG_CIFS=y -+CONFIG_CIFS_XATTR=y -+CONFIG_CIFS_POSIX=y -+# CONFIG_CIFS_DEBUG is not set -+CONFIG_NLS_CODEPAGE_437=y -+CONFIG_NLS_CODEPAGE_852=y -+CONFIG_NLS_ISO8859_1=y -+CONFIG_NLS_ISO8859_2=y -+CONFIG_NLS_UTF8=y -+CONFIG_PERSISTENT_KEYRINGS=y -+CONFIG_ENCRYPTED_KEYS=y -+CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" -+CONFIG_CRYPTO_USER=y -+CONFIG_CRYPTO_PCRYPT=y -+CONFIG_CRYPTO_CURVE25519=y -+CONFIG_CRYPTO_CHACHA20POLY1305=y -+CONFIG_CRYPTO_SEQIV=y -+CONFIG_CRYPTO_ECHAINIV=y -+CONFIG_CRYPTO_BLAKE2B=y -+CONFIG_CRYPTO_BLAKE2S=y -+CONFIG_CRYPTO_ARC4=y -+CONFIG_CRYPTO_DES=y -+CONFIG_CRYPTO_SALSA20=y -+CONFIG_CRYPTO_DEFLATE=y -+CONFIG_CRYPTO_LZO=y -+CONFIG_CRYPTO_LZ4=y -+CONFIG_CRYPTO_ZSTD=y -+CONFIG_CRYPTO_ANSI_CPRNG=y -+CONFIG_CRYPTO_USER_API_HASH=y -+CONFIG_CRYPTO_USER_API_SKCIPHER=y -+CONFIG_CRYPTO_USER_API_RNG=y -+CONFIG_CRYPTO_USER_API_AEAD=y -+CONFIG_PKCS8_PRIVATE_KEY_PARSER=y -+CONFIG_DMA_CMA=y -+CONFIG_CMA_SIZE_MBYTES=64 -+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -+CONFIG_FRAME_WARN=1024 -+CONFIG_MAGIC_SYSRQ=y -+CONFIG_DEBUG_FS=y -+CONFIG_DEBUG_KERNEL=y -+CONFIG_DETECT_HUNG_TASK=y -+CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -+CONFIG_WQ_WATCHDOG=y -+# CONFIG_RCU_TRACE is not set -+# CONFIG_FTRACE is not set -+# CONFIG_STRICT_DEVMEM is not set -+# CONFIG_RUNTIME_TESTING_MENU is not set -diff --git a/arch/arm64/configs/pinebook_pro_defconfig b/arch/arm64/configs/pinebook_pro_defconfig -new file mode 100644 -index 000000000000..7b35c793aadf ---- /dev/null -+++ b/arch/arm64/configs/pinebook_pro_defconfig -@@ -0,0 +1,595 @@ -+CONFIG_SYSVIPC=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_PREEMPT_VOLUNTARY=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASK_XACCT=y -+CONFIG_TASK_IO_ACCOUNTING=y -+CONFIG_IKCONFIG=y -+CONFIG_IKCONFIG_PROC=y -+CONFIG_CGROUPS=y -+CONFIG_MEMCG=y -+CONFIG_BLK_CGROUP=y -+CONFIG_CGROUP_SCHED=y -+CONFIG_CGROUP_PIDS=y -+CONFIG_CPUSETS=y -+# CONFIG_PROC_PID_CPUSET is not set -+CONFIG_CGROUP_DEVICE=y -+CONFIG_CGROUP_BPF=y -+CONFIG_USER_NS=y -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+# CONFIG_RD_XZ is not set -+# CONFIG_RD_LZO is not set -+CONFIG_BPF_SYSCALL=y -+CONFIG_PERF_EVENTS=y -+CONFIG_ARCH_ROCKCHIP=y -+# CONFIG_ARM64_ERRATUM_832075 is not set -+# CONFIG_ARM64_ERRATUM_834220 is not set -+# CONFIG_ARM64_ERRATUM_1024718 is not set -+# CONFIG_ARM64_ERRATUM_1165522 is not set -+# CONFIG_ARM64_ERRATUM_1530923 is not set -+# CONFIG_ARM64_ERRATUM_1286807 is not set -+# CONFIG_ARM64_ERRATUM_1463225 is not set -+# CONFIG_ARM64_ERRATUM_1542419 is not set -+# CONFIG_CAVIUM_ERRATUM_22375 is not set -+# CONFIG_CAVIUM_ERRATUM_23154 is not set -+# CONFIG_CAVIUM_ERRATUM_27456 is not set -+# CONFIG_CAVIUM_ERRATUM_30115 is not set -+# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set -+# CONFIG_FUJITSU_ERRATUM_010001 is not set -+# CONFIG_HISILICON_ERRATUM_161600802 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set -+# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set -+# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set -+CONFIG_SCHED_MC=y -+CONFIG_NR_CPUS=8 -+CONFIG_NUMA=y -+CONFIG_NODES_SHIFT=2 -+CONFIG_HZ_1000=y -+CONFIG_PARAVIRT=y -+CONFIG_COMPAT=y -+# CONFIG_ARM64_RAS_EXTN is not set -+# CONFIG_ARM64_PTR_AUTH is not set -+# CONFIG_ARM64_BTI is not set -+# CONFIG_ARM64_E0PD is not set -+# CONFIG_ARCH_RANDOM is not set -+# CONFIG_EFI is not set -+CONFIG_PM_WAKELOCKS=y -+CONFIG_PM_DEBUG=y -+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -+CONFIG_ENERGY_MODEL=y -+CONFIG_CPU_IDLE=y -+CONFIG_CPU_IDLE_GOV_LADDER=y -+CONFIG_ARM_CPUIDLE=y -+CONFIG_ARM_PSCI_CPUIDLE=y -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_STAT=y -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -+CONFIG_CPUFREQ_DT=y -+CONFIG_ARM_SCMI_CPUFREQ=y -+CONFIG_ARM_SCMI_PROTOCOL=y -+CONFIG_ARM_SCPI_PROTOCOL=y -+CONFIG_VIRTUALIZATION=y -+CONFIG_KVM=y -+CONFIG_CRYPTO_SHA1_ARM64_CE=y -+CONFIG_CRYPTO_SHA2_ARM64_CE=y -+CONFIG_CRYPTO_SHA512_ARM64_CE=y -+CONFIG_CRYPTO_SHA3_ARM64=y -+CONFIG_CRYPTO_SM3_ARM64_CE=y -+CONFIG_CRYPTO_SM4_ARM64_CE=y -+CONFIG_CRYPTO_GHASH_ARM64_CE=y -+CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y -+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -+CONFIG_CRYPTO_AES_ARM64_BS=y -+CONFIG_JUMP_LABEL=y -+# CONFIG_STACKPROTECTOR is not set -+# CONFIG_GCC_PLUGINS is not set -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+CONFIG_MODVERSIONS=y -+CONFIG_BLK_DEV_INTEGRITY=y -+CONFIG_BLK_DEV_THROTTLING=y -+CONFIG_BLK_WBT=y -+CONFIG_BLK_CGROUP_IOLATENCY=y -+CONFIG_BLK_CGROUP_IOCOST=y -+CONFIG_PARTITION_ADVANCED=y -+# CONFIG_MQ_IOSCHED_DEADLINE is not set -+# CONFIG_MQ_IOSCHED_KYBER is not set -+CONFIG_IOSCHED_BFQ=y -+CONFIG_BFQ_GROUP_IOSCHED=y -+CONFIG_CMA=y -+CONFIG_CMA_AREAS=7 -+CONFIG_ZPOOL=y -+CONFIG_ZBUD=y -+CONFIG_Z3FOLD=y -+CONFIG_ZSMALLOC=y -+CONFIG_NET=y -+CONFIG_PACKET=y -+CONFIG_PACKET_DIAG=y -+CONFIG_UNIX=y -+CONFIG_UNIX_DIAG=y -+CONFIG_XFRM_USER=y -+CONFIG_NET_KEY=y -+CONFIG_INET=y -+CONFIG_IP_MULTICAST=y -+CONFIG_IP_ADVANCED_ROUTER=y -+CONFIG_SYN_COOKIES=y -+# CONFIG_INET_DIAG is not set -+# CONFIG_IPV6_SIT is not set -+CONFIG_MPTCP=y -+CONFIG_NETFILTER=y -+CONFIG_NETFILTER_NETLINK_QUEUE=y -+CONFIG_NETFILTER_NETLINK_LOG=y -+CONFIG_NF_CONNTRACK=y -+CONFIG_NF_LOG_NETDEV=y -+CONFIG_NF_CONNTRACK_MARK=y -+# CONFIG_NF_CONNTRACK_PROCFS is not set -+# CONFIG_NF_CT_PROTO_DCCP is not set -+# CONFIG_NF_CT_PROTO_SCTP is not set -+# CONFIG_NF_CT_PROTO_UDPLITE is not set -+CONFIG_NF_CONNTRACK_FTP=y -+CONFIG_NF_CONNTRACK_H323=y -+CONFIG_NF_CONNTRACK_IRC=y -+CONFIG_NF_CONNTRACK_NETBIOS_NS=y -+CONFIG_NF_CONNTRACK_SNMP=y -+CONFIG_NF_CONNTRACK_PPTP=y -+CONFIG_NF_CONNTRACK_SIP=y -+CONFIG_NF_CONNTRACK_TFTP=y -+CONFIG_NF_CT_NETLINK=y -+CONFIG_NETFILTER_NETLINK_GLUE_CT=y -+CONFIG_NF_TABLES=y -+CONFIG_NF_TABLES_INET=y -+CONFIG_NF_TABLES_NETDEV=y -+CONFIG_NFT_NUMGEN=y -+CONFIG_NFT_CT=y -+CONFIG_NFT_COUNTER=y -+CONFIG_NFT_CONNLIMIT=y -+CONFIG_NFT_LOG=y -+CONFIG_NFT_LIMIT=y -+CONFIG_NFT_MASQ=y -+CONFIG_NFT_REDIR=y -+CONFIG_NFT_NAT=y -+CONFIG_NFT_TUNNEL=y -+CONFIG_NFT_OBJREF=y -+CONFIG_NFT_QUEUE=y -+CONFIG_NFT_QUOTA=y -+CONFIG_NFT_REJECT=y -+CONFIG_NFT_HASH=y -+CONFIG_NFT_FIB_INET=y -+CONFIG_NFT_SOCKET=y -+CONFIG_NFT_OSF=y -+CONFIG_NFT_DUP_NETDEV=y -+CONFIG_NFT_FWD_NETDEV=y -+CONFIG_NF_FLOW_TABLE_INET=y -+CONFIG_NF_FLOW_TABLE=y -+CONFIG_IP_SET=y -+CONFIG_IP_SET_BITMAP_IP=y -+CONFIG_IP_SET_BITMAP_IPMAC=y -+CONFIG_IP_SET_BITMAP_PORT=y -+CONFIG_IP_SET_HASH_IP=y -+CONFIG_IP_SET_HASH_IPMARK=y -+CONFIG_IP_SET_HASH_IPPORT=y -+CONFIG_IP_SET_HASH_IPPORTIP=y -+CONFIG_IP_SET_HASH_IPPORTNET=y -+CONFIG_IP_SET_HASH_IPMAC=y -+CONFIG_IP_SET_HASH_MAC=y -+CONFIG_IP_SET_HASH_NETPORTNET=y -+CONFIG_IP_SET_HASH_NET=y -+CONFIG_IP_SET_HASH_NETNET=y -+CONFIG_IP_SET_HASH_NETPORT=y -+CONFIG_IP_SET_HASH_NETIFACE=y -+CONFIG_IP_SET_LIST_SET=y -+CONFIG_NFT_FIB_IPV4=y -+CONFIG_NF_TABLES_ARP=y -+CONFIG_NF_FLOW_TABLE_IPV4=y -+CONFIG_NF_LOG_ARP=y -+CONFIG_NF_LOG_IPV4=y -+# CONFIG_NF_NAT_SNMP_BASIC is not set -+CONFIG_NFT_DUP_IPV6=y -+CONFIG_NFT_FIB_IPV6=y -+CONFIG_NF_FLOW_TABLE_IPV6=y -+CONFIG_NF_LOG_IPV6=y -+CONFIG_BPFILTER=y -+CONFIG_BPFILTER_UMH=y -+CONFIG_NETLINK_DIAG=y -+CONFIG_CGROUP_NET_CLASSID=y -+CONFIG_BPF_JIT=y -+CONFIG_BT=y -+CONFIG_BT_RFCOMM=y -+CONFIG_BT_RFCOMM_TTY=y -+CONFIG_BT_BNEP=y -+CONFIG_BT_BNEP_MC_FILTER=y -+CONFIG_BT_BNEP_PROTO_FILTER=y -+CONFIG_BT_HIDP=y -+CONFIG_BT_HS=y -+CONFIG_BT_LEDS=y -+CONFIG_BT_HCIUART=y -+CONFIG_BT_HCIUART_BCM=y -+CONFIG_CFG80211=y -+CONFIG_CFG80211_DEBUGFS=y -+CONFIG_CFG80211_WEXT=y -+CONFIG_MAC80211=y -+CONFIG_MAC80211_LEDS=y -+CONFIG_RFKILL=y -+CONFIG_RFKILL_GPIO=y -+CONFIG_UEVENT_HELPER=y -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+#CONFIG_EXTRA_FIRMWARE="regulatory.db regulatory.db.p7s brcm/brcmfmac43456-sdio.bin brcm/brcmfmac43456-sdio.txt brcm/BCM4345C5.hcd" -+#CONFIG_EXTRA_FIRMWARE_DIR="/workspace/megous.com/orangepi-pc/firmware" -+CONFIG_ZRAM=y -+CONFIG_ZRAM_WRITEBACK=y -+CONFIG_ZRAM_MEMORY_TRACKING=y -+CONFIG_BLK_DEV_LOOP=y -+CONFIG_BLK_DEV_NBD=y -+CONFIG_SCSI=y -+# CONFIG_SCSI_PROC_FS is not set -+CONFIG_BLK_DEV_SD=y -+# CONFIG_SCSI_LOWLEVEL is not set -+CONFIG_MD=y -+CONFIG_BLK_DEV_DM=y -+CONFIG_DM_CRYPT=y -+CONFIG_DM_INIT=y -+CONFIG_DM_UEVENT=y -+CONFIG_NETDEVICES=y -+CONFIG_WIREGUARD=y -+CONFIG_TUN=y -+CONFIG_VETH=y -+# CONFIG_ETHERNET is not set -+CONFIG_USB_RTL8152=y -+CONFIG_USB_USBNET=y -+# CONFIG_USB_NET_AX8817X is not set -+# CONFIG_USB_NET_AX88179_178A is not set -+CONFIG_USB_NET_CDC_EEM=y -+CONFIG_USB_NET_CDC_MBIM=y -+# CONFIG_USB_NET_NET1080 is not set -+# CONFIG_USB_NET_CDC_SUBSET is not set -+# CONFIG_USB_NET_ZAURUS is not set -+# CONFIG_WLAN_VENDOR_ADMTEK is not set -+# CONFIG_WLAN_VENDOR_ATH is not set -+# CONFIG_WLAN_VENDOR_ATMEL is not set -+CONFIG_BRCMFMAC=y -+# CONFIG_WLAN_VENDOR_CISCO is not set -+# CONFIG_WLAN_VENDOR_INTEL is not set -+# CONFIG_WLAN_VENDOR_INTERSIL is not set -+# CONFIG_WLAN_VENDOR_MARVELL is not set -+# CONFIG_WLAN_VENDOR_MEDIATEK is not set -+# CONFIG_WLAN_VENDOR_RALINK is not set -+# CONFIG_WLAN_VENDOR_REALTEK is not set -+# CONFIG_WLAN_VENDOR_RSI is not set -+# CONFIG_WLAN_VENDOR_ST is not set -+# CONFIG_WLAN_VENDOR_TI is not set -+# CONFIG_WLAN_VENDOR_ZYDAS is not set -+# CONFIG_WLAN_VENDOR_QUANTENNA is not set -+CONFIG_INPUT_FF_MEMLESS=y -+CONFIG_INPUT_MOUSEDEV=y -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_EVDEV=y -+# CONFIG_KEYBOARD_ATKBD is not set -+CONFIG_KEYBOARD_GPIO=y -+CONFIG_KEYBOARD_GPIO_POLLED=y -+# CONFIG_INPUT_MOUSE is not set -+CONFIG_INPUT_MISC=y -+CONFIG_INPUT_UINPUT=y -+CONFIG_INPUT_RK805_PWRKEY=y -+# CONFIG_SERIO is not set -+# CONFIG_LEGACY_PTYS is not set -+CONFIG_SERIAL_8250=y -+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -+# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -+CONFIG_SERIAL_8250_CONSOLE=y -+CONFIG_SERIAL_8250_NR_UARTS=8 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=8 -+CONFIG_SERIAL_8250_DW=y -+CONFIG_SERIAL_OF_PLATFORM=y -+CONFIG_SERIAL_DEV_BUS=y -+# CONFIG_HW_RANDOM is not set -+CONFIG_I2C_CHARDEV=y -+CONFIG_I2C_MUX=y -+CONFIG_I2C_GPIO=y -+CONFIG_I2C_RK3X=y -+CONFIG_SPI=y -+CONFIG_SPI_ROCKCHIP=y -+CONFIG_PINCTRL_RK805=y -+CONFIG_BATTERY_CW2015=y -+CONFIG_CHARGER_GPIO=y -+CONFIG_THERMAL=y -+CONFIG_THERMAL_STATISTICS=y -+CONFIG_THERMAL_WRITABLE_TRIPS=y -+CONFIG_THERMAL_GOV_FAIR_SHARE=y -+CONFIG_THERMAL_GOV_BANG_BANG=y -+CONFIG_CPU_THERMAL=y -+CONFIG_DEVFREQ_THERMAL=y -+CONFIG_ROCKCHIP_THERMAL=y -+CONFIG_WATCHDOG=y -+CONFIG_DW_WATCHDOG=y -+CONFIG_MFD_RK808=y -+CONFIG_REGULATOR=y -+CONFIG_REGULATOR_FIXED_VOLTAGE=y -+CONFIG_REGULATOR_FAN53555=y -+CONFIG_REGULATOR_GPIO=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_REGULATOR_RK808=y -+CONFIG_MEDIA_SUPPORT=y -+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -+CONFIG_MEDIA_CAMERA_SUPPORT=y -+CONFIG_MEDIA_PLATFORM_SUPPORT=y -+CONFIG_VIDEO_V4L2_SUBDEV_API=y -+CONFIG_MEDIA_USB_SUPPORT=y -+CONFIG_USB_VIDEO_CLASS=y -+# CONFIG_USB_GSPCA is not set -+CONFIG_V4L_PLATFORM_DRIVERS=y -+CONFIG_V4L_MEM2MEM_DRIVERS=y -+CONFIG_VIDEO_MEM2MEM_DEINTERLACE=y -+CONFIG_VIDEO_ROCKCHIP_RGA=y -+CONFIG_DRM=y -+CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_ROCKCHIP=y -+CONFIG_ROCKCHIP_ANALOGIX_DP=y -+CONFIG_ROCKCHIP_CDN_DP=y -+CONFIG_ROCKCHIP_DW_HDMI=y -+CONFIG_ROCKCHIP_INNO_HDMI=y -+CONFIG_DRM_PANEL_SIMPLE=y -+CONFIG_DRM_DISPLAY_CONNECTOR=y -+CONFIG_DRM_PANFROST=y -+CONFIG_BACKLIGHT_CLASS_DEVICE=y -+CONFIG_BACKLIGHT_PWM=y -+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -+CONFIG_SOUND=y -+CONFIG_SND=y -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=y -+CONFIG_SND_PCM_OSS=y -+CONFIG_SND_HRTIMER=y -+# CONFIG_SND_SUPPORT_OLD_API is not set -+# CONFIG_SND_SPI is not set -+CONFIG_SND_USB_AUDIO=y -+CONFIG_SND_SOC=y -+CONFIG_SND_SOC_ROCKCHIP=y -+CONFIG_SND_SOC_ROCKCHIP_PDM=y -+CONFIG_SND_SOC_RK3399_GRU_SOUND=y -+CONFIG_SND_SOC_BT_SCO=y -+CONFIG_SND_SOC_ES8316=y -+CONFIG_SND_SOC_SIMPLE_AMPLIFIER=y -+CONFIG_SND_SIMPLE_CARD=y -+CONFIG_SND_AUDIO_GRAPH_CARD=y -+# CONFIG_HID_A4TECH is not set -+# CONFIG_HID_APPLE is not set -+# CONFIG_HID_BELKIN is not set -+# CONFIG_HID_CHERRY is not set -+# CONFIG_HID_CHICONY is not set -+# CONFIG_HID_CYPRESS is not set -+# CONFIG_HID_EZKEY is not set -+# CONFIG_HID_ITE is not set -+# CONFIG_HID_KENSINGTON is not set -+# CONFIG_HID_LOGITECH is not set -+# CONFIG_HID_REDRAGON is not set -+# CONFIG_HID_MICROSOFT is not set -+# CONFIG_HID_MONTEREY is not set -+CONFIG_HID_MULTITOUCH=y -+CONFIG_USB_HIDDEV=y -+CONFIG_USB_LED_TRIG=y -+CONFIG_USB=y -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -+CONFIG_USB_OTG=y -+CONFIG_USB_OTG_FSM=y -+CONFIG_USB_LEDS_TRIGGER_USBPORT=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_HCD_PLATFORM=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_HCD_PLATFORM=y -+CONFIG_USB_ACM=y -+CONFIG_USB_STORAGE=y -+CONFIG_USB_UAS=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC2=y -+CONFIG_USB_SERIAL=y -+CONFIG_USB_SERIAL_SIMPLE=y -+CONFIG_USB_SERIAL_QCAUX=y -+CONFIG_USB_SERIAL_QUALCOMM=y -+CONFIG_USB_SERIAL_OPTION=y -+CONFIG_NOP_USB_XCEIV=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_VBUS_DRAW=500 -+CONFIG_U_SERIAL_CONSOLE=y -+CONFIG_USB_CONFIGFS=y -+CONFIG_USB_CONFIGFS_SERIAL=y -+CONFIG_USB_CONFIGFS_ACM=y -+CONFIG_USB_CONFIGFS_OBEX=y -+CONFIG_USB_CONFIGFS_NCM=y -+CONFIG_USB_CONFIGFS_ECM=y -+CONFIG_USB_CONFIGFS_ECM_SUBSET=y -+CONFIG_USB_CONFIGFS_RNDIS=y -+CONFIG_USB_CONFIGFS_EEM=y -+CONFIG_USB_CONFIGFS_MASS_STORAGE=y -+CONFIG_USB_CONFIGFS_F_LB_SS=y -+CONFIG_USB_CONFIGFS_F_FS=y -+CONFIG_USB_CONFIGFS_F_UAC1=y -+CONFIG_USB_CONFIGFS_F_UAC2=y -+CONFIG_USB_CONFIGFS_F_MIDI=y -+CONFIG_USB_CONFIGFS_F_HID=y -+CONFIG_USB_CONFIGFS_F_UVC=y -+CONFIG_USB_CONFIGFS_F_PRINTER=y -+CONFIG_USB_AUDIO=y -+CONFIG_USB_ETH=y -+CONFIG_USB_ETH_EEM=y -+CONFIG_USB_G_NCM=y -+CONFIG_USB_GADGETFS=y -+CONFIG_USB_FUNCTIONFS=y -+CONFIG_USB_FUNCTIONFS_ETH=y -+CONFIG_USB_FUNCTIONFS_RNDIS=y -+CONFIG_USB_FUNCTIONFS_GENERIC=y -+CONFIG_USB_MASS_STORAGE=y -+CONFIG_USB_G_SERIAL=y -+CONFIG_USB_MIDI_GADGET=y -+CONFIG_USB_G_PRINTER=y -+CONFIG_USB_CDC_COMPOSITE=y -+CONFIG_USB_G_ACM_MS=y -+CONFIG_USB_G_MULTI=y -+CONFIG_USB_G_MULTI_CDC=y -+CONFIG_USB_G_HID=y -+CONFIG_USB_G_WEBCAM=y -+CONFIG_TYPEC=y -+CONFIG_TYPEC_TCPM=y -+CONFIG_TYPEC_TCPCI=y -+CONFIG_TYPEC_FUSB302=y -+CONFIG_TYPEC_UCSI=y -+CONFIG_TYPEC_DP_ALTMODE=y -+CONFIG_MMC=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_PLTFM=y -+CONFIG_MMC_SDHCI_OF_ARASAN=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_ONESHOT=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_LEDS_TRIGGER_CPU=y -+CONFIG_LEDS_TRIGGER_ACTIVITY=y -+CONFIG_LEDS_TRIGGER_GPIO=y -+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -+CONFIG_LEDS_TRIGGER_PANIC=y -+CONFIG_LEDS_TRIGGER_NETDEV=y -+CONFIG_LEDS_TRIGGER_PATTERN=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_INTF_PROC is not set -+CONFIG_RTC_DRV_RK808=y -+CONFIG_DMADEVICES=y -+CONFIG_PL330_DMA=y -+CONFIG_DMABUF_HEAPS=y -+CONFIG_DMABUF_HEAPS_SYSTEM=y -+CONFIG_DMABUF_HEAPS_CMA=y -+# CONFIG_VIRTIO_MENU is not set -+# CONFIG_VHOST_MENU is not set -+CONFIG_STAGING=y -+CONFIG_STAGING_MEDIA=y -+CONFIG_VIDEO_HANTRO=y -+CONFIG_VIDEO_ROCKCHIP_VDEC=y -+CONFIG_COMMON_CLK_RK808=y -+CONFIG_MAILBOX=y -+CONFIG_ROCKCHIP_MBOX=y -+CONFIG_IOMMU_IO_PGTABLE_ARMV7S=y -+CONFIG_ROCKCHIP_IOMMU=y -+CONFIG_ARM_SMMU=y -+CONFIG_ARM_SMMU_V3=y -+CONFIG_ROCKCHIP_IODOMAIN=y -+CONFIG_ROCKCHIP_PM_DOMAINS=y -+CONFIG_DEVFREQ_GOV_PERFORMANCE=y -+CONFIG_DEVFREQ_GOV_POWERSAVE=y -+CONFIG_DEVFREQ_GOV_USERSPACE=y -+CONFIG_DEVFREQ_GOV_PASSIVE=y -+CONFIG_ARM_RK3399_DMC_DEVFREQ=y -+CONFIG_EXTCON_ADC_JACK=y -+CONFIG_EXTCON_GPIO=y -+CONFIG_EXTCON_USB_GPIO=y -+CONFIG_IIO=y -+CONFIG_IIO_SW_DEVICE=y -+CONFIG_IIO_SW_TRIGGER=y -+CONFIG_ROCKCHIP_SARADC=y -+CONFIG_PWM=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_PHY_ROCKCHIP_DP=y -+CONFIG_PHY_ROCKCHIP_EMMC=y -+CONFIG_PHY_ROCKCHIP_INNO_HDMI=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=y -+CONFIG_PHY_ROCKCHIP_PCIE=y -+CONFIG_PHY_ROCKCHIP_TYPEC=y -+CONFIG_PHY_ROCKCHIP_USB=y -+CONFIG_ARM_CCI_PMU=y -+# CONFIG_ARM_CCI5xx_PMU is not set -+CONFIG_ROCKCHIP_EFUSE=y -+CONFIG_ROCKCHIP_OTP=y -+CONFIG_VALIDATE_FS_PARSER=y -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_POSIX_ACL=y -+CONFIG_F2FS_FS=y -+CONFIG_F2FS_FS_SECURITY=y -+CONFIG_F2FS_CHECK_FS=y -+CONFIG_F2FS_FS_COMPRESSION=y -+CONFIG_FS_ENCRYPTION=y -+CONFIG_FANOTIFY=y -+CONFIG_AUTOFS_FS=y -+CONFIG_FUSE_FS=y -+CONFIG_CUSE=y -+CONFIG_OVERLAY_FS=y -+CONFIG_OVERLAY_FS_INDEX=y -+CONFIG_OVERLAY_FS_METACOPY=y -+CONFIG_VFAT_FS=y -+CONFIG_PROC_CHILDREN=y -+CONFIG_TMPFS=y -+CONFIG_TMPFS_POSIX_ACL=y -+CONFIG_ECRYPT_FS=y -+CONFIG_ECRYPT_FS_MESSAGING=y -+CONFIG_SQUASHFS=y -+CONFIG_SQUASHFS_FILE_DIRECT=y -+CONFIG_SQUASHFS_DECOMP_MULTI=y -+CONFIG_SQUASHFS_XATTR=y -+CONFIG_SQUASHFS_LZ4=y -+CONFIG_SQUASHFS_LZO=y -+CONFIG_SQUASHFS_XZ=y -+CONFIG_SQUASHFS_ZSTD=y -+# CONFIG_NETWORK_FILESYSTEMS is not set -+CONFIG_NLS_CODEPAGE_437=y -+CONFIG_NLS_CODEPAGE_852=y -+CONFIG_NLS_ISO8859_1=y -+CONFIG_NLS_ISO8859_2=y -+CONFIG_NLS_UTF8=y -+CONFIG_PERSISTENT_KEYRINGS=y -+CONFIG_ENCRYPTED_KEYS=y -+CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" -+CONFIG_CRYPTO_USER=y -+CONFIG_CRYPTO_PCRYPT=y -+CONFIG_CRYPTO_CURVE25519=y -+CONFIG_CRYPTO_CHACHA20POLY1305=y -+CONFIG_CRYPTO_SEQIV=y -+CONFIG_CRYPTO_ECHAINIV=y -+CONFIG_CRYPTO_BLAKE2B=y -+CONFIG_CRYPTO_BLAKE2S=y -+CONFIG_CRYPTO_MD4=y -+CONFIG_CRYPTO_ARC4=y -+CONFIG_CRYPTO_SALSA20=y -+CONFIG_CRYPTO_DEFLATE=y -+CONFIG_CRYPTO_LZO=y -+CONFIG_CRYPTO_LZ4=y -+CONFIG_CRYPTO_ZSTD=y -+CONFIG_CRYPTO_ANSI_CPRNG=y -+CONFIG_CRYPTO_USER_API_HASH=y -+CONFIG_CRYPTO_USER_API_SKCIPHER=y -+CONFIG_CRYPTO_USER_API_RNG=y -+CONFIG_CRYPTO_USER_API_AEAD=y -+CONFIG_CRYPTO_DEV_ROCKCHIP=y -+CONFIG_PKCS8_PRIVATE_KEY_PARSER=y -+CONFIG_CORDIC=y -+CONFIG_DMA_CMA=y -+CONFIG_CMA_SIZE_MBYTES=64 -+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -+CONFIG_FRAME_WARN=1024 -+CONFIG_MAGIC_SYSRQ=y -+CONFIG_DEBUG_FS=y -+CONFIG_DEBUG_KERNEL=y -+CONFIG_DETECT_HUNG_TASK=y -+CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -+CONFIG_WQ_WATCHDOG=y -+# CONFIG_SCHED_DEBUG is not set -+# CONFIG_RCU_TRACE is not set -+CONFIG_BOOTTIME_TRACING=y -+CONFIG_FUNCTION_TRACER=y -+# CONFIG_UPROBE_EVENTS is not set -+# CONFIG_STRICT_DEVMEM is not set -+# CONFIG_RUNTIME_TESTING_MENU is not set -diff --git a/arch/arm64/configs/pinephone_defconfig b/arch/arm64/configs/pinephone_defconfig -new file mode 100644 -index 000000000000..503792982c7b ---- /dev/null -+++ b/arch/arm64/configs/pinephone_defconfig -@@ -0,0 +1,659 @@ -+CONFIG_SYSVIPC=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_PREEMPT_VOLUNTARY=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+CONFIG_TASK_XACCT=y -+CONFIG_TASK_IO_ACCOUNTING=y -+CONFIG_MEMCG=y -+CONFIG_BLK_CGROUP=y -+CONFIG_CFS_BANDWIDTH=y -+CONFIG_RT_GROUP_SCHED=y -+CONFIG_CGROUP_PIDS=y -+CONFIG_CGROUP_FREEZER=y -+CONFIG_CPUSETS=y -+# CONFIG_PROC_PID_CPUSET is not set -+CONFIG_CGROUP_DEVICE=y -+CONFIG_CGROUP_CPUACCT=y -+CONFIG_CGROUP_BPF=y -+CONFIG_USER_NS=y -+CONFIG_SCHED_AUTOGROUP=y -+# CONFIG_RD_GZIP is not set -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+# CONFIG_RD_XZ is not set -+# CONFIG_RD_LZO is not set -+# CONFIG_RD_ZSTD is not set -+CONFIG_BOOT_CONFIG=y -+CONFIG_BPF_SYSCALL=y -+CONFIG_BPF_JIT_ALWAYS_ON=y -+CONFIG_PERF_EVENTS=y -+CONFIG_ARCH_SUNXI=y -+# CONFIG_ARM64_ERRATUM_832075 is not set -+# CONFIG_ARM64_ERRATUM_1024718 is not set -+# CONFIG_ARM64_ERRATUM_1418040 is not set -+# CONFIG_ARM64_ERRATUM_1165522 is not set -+# CONFIG_ARM64_ERRATUM_1319367 is not set -+# CONFIG_ARM64_ERRATUM_1530923 is not set -+# CONFIG_ARM64_ERRATUM_1286807 is not set -+# CONFIG_ARM64_ERRATUM_1463225 is not set -+# CONFIG_ARM64_ERRATUM_1542419 is not set -+# CONFIG_CAVIUM_ERRATUM_22375 is not set -+# CONFIG_CAVIUM_ERRATUM_23154 is not set -+# CONFIG_CAVIUM_ERRATUM_27456 is not set -+# CONFIG_CAVIUM_ERRATUM_30115 is not set -+# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set -+# CONFIG_FUJITSU_ERRATUM_010001 is not set -+# CONFIG_HISILICON_ERRATUM_161600802 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set -+# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set -+# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set -+CONFIG_SCHED_MC=y -+CONFIG_NR_CPUS=4 -+CONFIG_COMPAT=y -+# CONFIG_ARM64_HW_AFDBM is not set -+# CONFIG_ARM64_PAN is not set -+# CONFIG_ARM64_USE_LSE_ATOMICS is not set -+# CONFIG_ARM64_VHE is not set -+# CONFIG_ARM64_RAS_EXTN is not set -+# CONFIG_ARM64_CNP is not set -+# CONFIG_ARM64_PTR_AUTH is not set -+# CONFIG_ARM64_AMU_EXTN is not set -+# CONFIG_ARM64_TLB_RANGE is not set -+# CONFIG_ARM64_BTI is not set -+# CONFIG_ARM64_E0PD is not set -+# CONFIG_ARCH_RANDOM is not set -+# CONFIG_ARM64_SVE is not set -+# CONFIG_EFI is not set -+CONFIG_PM_AUTOSLEEP=y -+CONFIG_PM_WAKELOCKS=y -+CONFIG_PM_DEBUG=y -+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -+CONFIG_ENERGY_MODEL=y -+CONFIG_CPU_IDLE=y -+CONFIG_CPU_IDLE_GOV_LADDER=y -+CONFIG_ARM_CPUIDLE=y -+CONFIG_ARM_PSCI_CPUIDLE=y -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_STAT=y -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -+CONFIG_CPUFREQ_DT=y -+CONFIG_ARM_SCPI_PROTOCOL=y -+# CONFIG_ARM_SMCCC_SOC_ID is not set -+CONFIG_CRYPTO_SHA1_ARM64_CE=m -+CONFIG_CRYPTO_SHA2_ARM64_CE=m -+CONFIG_CRYPTO_SHA512_ARM64_CE=m -+CONFIG_CRYPTO_SHA3_ARM64=m -+CONFIG_CRYPTO_SM3_ARM64_CE=m -+CONFIG_CRYPTO_SM4_ARM64_CE=m -+CONFIG_CRYPTO_GHASH_ARM64_CE=m -+CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m -+CONFIG_CRYPTO_AES_ARM64_CE_CCM=m -+CONFIG_CRYPTO_AES_ARM64_CE_BLK=m -+CONFIG_CRYPTO_AES_ARM64_BS=m -+CONFIG_JUMP_LABEL=y -+# CONFIG_STACKPROTECTOR is not set -+# CONFIG_GCC_PLUGINS is not set -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+CONFIG_MODVERSIONS=y -+# CONFIG_BLK_DEV_BSG is not set -+CONFIG_BLK_DEV_THROTTLING=y -+CONFIG_BLK_WBT=y -+CONFIG_BLK_CGROUP_IOLATENCY=y -+CONFIG_BLK_CGROUP_IOCOST=y -+CONFIG_PARTITION_ADVANCED=y -+# CONFIG_MQ_IOSCHED_DEADLINE is not set -+# CONFIG_MQ_IOSCHED_KYBER is not set -+CONFIG_IOSCHED_BFQ=y -+CONFIG_BFQ_GROUP_IOSCHED=y -+CONFIG_CMA=y -+CONFIG_CMA_DEBUGFS=y -+CONFIG_ZPOOL=y -+CONFIG_ZBUD=y -+CONFIG_Z3FOLD=y -+CONFIG_ZSMALLOC=y -+CONFIG_NET=y -+CONFIG_PACKET=y -+CONFIG_PACKET_DIAG=y -+CONFIG_UNIX=y -+CONFIG_UNIX_DIAG=y -+CONFIG_XFRM_USER=y -+CONFIG_NET_KEY=m -+CONFIG_INET=y -+CONFIG_IP_MULTICAST=y -+CONFIG_IP_ADVANCED_ROUTER=y -+CONFIG_SYN_COOKIES=y -+# CONFIG_INET_DIAG is not set -+# CONFIG_IPV6_SIT is not set -+CONFIG_MPTCP=y -+CONFIG_NETFILTER=y -+CONFIG_NETFILTER_NETLINK_QUEUE=m -+CONFIG_NETFILTER_NETLINK_LOG=m -+CONFIG_NF_CONNTRACK=m -+CONFIG_NF_LOG_NETDEV=m -+CONFIG_NF_CONNTRACK_MARK=y -+# CONFIG_NF_CONNTRACK_PROCFS is not set -+# CONFIG_NF_CT_PROTO_DCCP is not set -+# CONFIG_NF_CT_PROTO_SCTP is not set -+# CONFIG_NF_CT_PROTO_UDPLITE is not set -+CONFIG_NF_CONNTRACK_FTP=m -+CONFIG_NF_CONNTRACK_H323=m -+CONFIG_NF_CONNTRACK_IRC=m -+CONFIG_NF_CONNTRACK_NETBIOS_NS=m -+CONFIG_NF_CONNTRACK_SNMP=m -+CONFIG_NF_CONNTRACK_PPTP=m -+CONFIG_NF_CONNTRACK_SIP=m -+CONFIG_NF_CONNTRACK_TFTP=m -+CONFIG_NF_CT_NETLINK=m -+CONFIG_NETFILTER_NETLINK_GLUE_CT=y -+CONFIG_NF_TABLES=m -+CONFIG_NF_TABLES_INET=y -+CONFIG_NF_TABLES_NETDEV=y -+CONFIG_NFT_NUMGEN=m -+CONFIG_NFT_CT=m -+CONFIG_NFT_COUNTER=m -+CONFIG_NFT_CONNLIMIT=m -+CONFIG_NFT_LOG=m -+CONFIG_NFT_LIMIT=m -+CONFIG_NFT_MASQ=m -+CONFIG_NFT_REDIR=m -+CONFIG_NFT_NAT=m -+CONFIG_NFT_TUNNEL=m -+CONFIG_NFT_OBJREF=m -+CONFIG_NFT_QUEUE=m -+CONFIG_NFT_QUOTA=m -+CONFIG_NFT_REJECT=m -+CONFIG_NFT_HASH=m -+CONFIG_NFT_FIB_INET=m -+CONFIG_NFT_SOCKET=m -+CONFIG_NFT_OSF=m -+CONFIG_NFT_DUP_NETDEV=m -+CONFIG_NFT_FWD_NETDEV=m -+CONFIG_NF_FLOW_TABLE_INET=m -+CONFIG_NF_FLOW_TABLE=m -+CONFIG_IP_SET=m -+CONFIG_IP_SET_BITMAP_IP=m -+CONFIG_IP_SET_BITMAP_IPMAC=m -+CONFIG_IP_SET_BITMAP_PORT=m -+CONFIG_IP_SET_HASH_IP=m -+CONFIG_IP_SET_HASH_IPMARK=m -+CONFIG_IP_SET_HASH_IPPORT=m -+CONFIG_IP_SET_HASH_IPPORTIP=m -+CONFIG_IP_SET_HASH_IPPORTNET=m -+CONFIG_IP_SET_HASH_IPMAC=m -+CONFIG_IP_SET_HASH_MAC=m -+CONFIG_IP_SET_HASH_NETPORTNET=m -+CONFIG_IP_SET_HASH_NET=m -+CONFIG_IP_SET_HASH_NETNET=m -+CONFIG_IP_SET_HASH_NETPORT=m -+CONFIG_IP_SET_HASH_NETIFACE=m -+CONFIG_IP_SET_LIST_SET=m -+CONFIG_NFT_FIB_IPV4=m -+CONFIG_NF_TABLES_ARP=y -+CONFIG_NF_FLOW_TABLE_IPV4=m -+CONFIG_NF_LOG_ARP=m -+CONFIG_NF_LOG_IPV4=m -+# CONFIG_NF_NAT_SNMP_BASIC is not set -+CONFIG_NFT_DUP_IPV6=m -+CONFIG_NFT_FIB_IPV6=m -+CONFIG_NF_FLOW_TABLE_IPV6=m -+CONFIG_NF_LOG_IPV6=m -+CONFIG_BPFILTER=y -+CONFIG_BPFILTER_UMH=y -+CONFIG_NET_SCHED=y -+CONFIG_NET_SCH_CBQ=m -+CONFIG_NET_SCH_HTB=m -+CONFIG_NET_CLS_BASIC=m -+CONFIG_NET_CLS_ROUTE4=m -+CONFIG_NET_CLS_FW=m -+CONFIG_NET_CLS_CGROUP=m -+CONFIG_NET_CLS_ACT=y -+CONFIG_NET_ACT_POLICE=m -+CONFIG_NET_ACT_GACT=m -+CONFIG_NET_ACT_MIRRED=m -+CONFIG_NETLINK_DIAG=m -+CONFIG_BPF_JIT=y -+CONFIG_BT=m -+CONFIG_BT_RFCOMM=m -+CONFIG_BT_RFCOMM_TTY=y -+CONFIG_BT_BNEP=m -+CONFIG_BT_BNEP_MC_FILTER=y -+CONFIG_BT_BNEP_PROTO_FILTER=y -+CONFIG_BT_HIDP=m -+CONFIG_BT_HS=y -+CONFIG_BT_LEDS=y -+CONFIG_BT_HCIUART=m -+CONFIG_BT_HCIUART_RTL=y -+CONFIG_CFG80211=m -+CONFIG_CFG80211_DEBUGFS=y -+CONFIG_CFG80211_WEXT=y -+CONFIG_MAC80211=m -+CONFIG_MAC80211_LEDS=y -+CONFIG_RFKILL=m -+CONFIG_RFKILL_GPIO=m -+CONFIG_UEVENT_HELPER=y -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+#CONFIG_EXTRA_FIRMWARE="regulatory.db regulatory.db.p7s" -+#CONFIG_EXTRA_FIRMWARE_DIR="/workspace/megous.com/orangepi-pc/firmware" -+CONFIG_ZRAM=m -+CONFIG_ZRAM_WRITEBACK=y -+CONFIG_ZRAM_MEMORY_TRACKING=y -+CONFIG_BLK_DEV_LOOP=m -+CONFIG_BLK_DEV_NBD=m -+CONFIG_MODEM_POWER=m -+CONFIG_SCSI=m -+CONFIG_BLK_DEV_SD=m -+# CONFIG_SCSI_LOWLEVEL is not set -+CONFIG_MD=y -+CONFIG_BLK_DEV_DM=y -+CONFIG_DM_CRYPT=y -+CONFIG_DM_INIT=y -+CONFIG_DM_UEVENT=y -+CONFIG_NETDEVICES=y -+CONFIG_WIREGUARD=m -+CONFIG_TUN=m -+CONFIG_VETH=m -+# CONFIG_ETHERNET is not set -+CONFIG_PPP=m -+CONFIG_PPP_BSDCOMP=m -+CONFIG_PPP_DEFLATE=m -+CONFIG_PPP_FILTER=y -+CONFIG_PPP_MPPE=m -+CONFIG_USB_RTL8152=m -+CONFIG_USB_USBNET=m -+# CONFIG_USB_NET_AX8817X is not set -+# CONFIG_USB_NET_AX88179_178A is not set -+CONFIG_USB_NET_CDC_EEM=m -+CONFIG_USB_NET_CDC_MBIM=m -+# CONFIG_USB_NET_NET1080 is not set -+# CONFIG_USB_NET_CDC_SUBSET is not set -+# CONFIG_USB_NET_ZAURUS is not set -+CONFIG_USB_NET_QMI_WWAN=m -+CONFIG_USB_RTL8153_ECM=m -+# CONFIG_WLAN_VENDOR_ADMTEK is not set -+# CONFIG_WLAN_VENDOR_ATH is not set -+# CONFIG_WLAN_VENDOR_ATMEL is not set -+# CONFIG_WLAN_VENDOR_BROADCOM is not set -+# CONFIG_WLAN_VENDOR_CISCO is not set -+# CONFIG_WLAN_VENDOR_INTEL is not set -+# CONFIG_WLAN_VENDOR_INTERSIL is not set -+# CONFIG_WLAN_VENDOR_MARVELL is not set -+# CONFIG_WLAN_VENDOR_MEDIATEK is not set -+# CONFIG_WLAN_VENDOR_MICROCHIP is not set -+# CONFIG_WLAN_VENDOR_RALINK is not set -+# CONFIG_WLAN_VENDOR_REALTEK is not set -+# CONFIG_WLAN_VENDOR_RSI is not set -+# CONFIG_WLAN_VENDOR_ST is not set -+# CONFIG_WLAN_VENDOR_TI is not set -+# CONFIG_WLAN_VENDOR_ZYDAS is not set -+# CONFIG_WLAN_VENDOR_QUANTENNA is not set -+CONFIG_INPUT_MOUSEDEV=m -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_EVDEV=y -+# CONFIG_KEYBOARD_ATKBD is not set -+CONFIG_KEYBOARD_GPIO=y -+CONFIG_KEYBOARD_GPIO_POLLED=y -+CONFIG_KEYBOARD_SUN4I_LRADC=y -+# CONFIG_INPUT_MOUSE is not set -+CONFIG_INPUT_TOUCHSCREEN=y -+CONFIG_TOUCHSCREEN_GOODIX=m -+CONFIG_INPUT_MISC=y -+CONFIG_INPUT_GPIO_VIBRA=y -+CONFIG_INPUT_AXP20X_PEK=y -+CONFIG_INPUT_UINPUT=y -+# CONFIG_SERIO is not set -+# CONFIG_LEGACY_PTYS is not set -+CONFIG_SERIAL_8250=y -+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -+# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -+CONFIG_SERIAL_8250_CONSOLE=y -+CONFIG_SERIAL_8250_NR_UARTS=8 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=8 -+CONFIG_SERIAL_8250_DW=y -+CONFIG_SERIAL_OF_PLATFORM=y -+CONFIG_SERIAL_DEV_BUS=y -+# CONFIG_HW_RANDOM is not set -+CONFIG_I2C_CHARDEV=y -+CONFIG_I2C_MUX=y -+CONFIG_I2C_GPIO=y -+CONFIG_I2C_MV64XXX=y -+CONFIG_PINCTRL_AXP209=y -+CONFIG_PINCTRL_SINGLE=y -+# CONFIG_PINCTRL_SUN8I_H3_R is not set -+# CONFIG_PINCTRL_SUN50I_H5 is not set -+# CONFIG_PINCTRL_SUN50I_H6 is not set -+# CONFIG_PINCTRL_SUN50I_H6_R is not set -+CONFIG_NVMEM_REBOOT_MODE=y -+CONFIG_CHARGER_AXP20X=y -+CONFIG_BATTERY_AXP20X=y -+CONFIG_AXP20X_POWER=y -+# CONFIG_HWMON is not set -+CONFIG_THERMAL=y -+CONFIG_THERMAL_STATISTICS=y -+CONFIG_THERMAL_WRITABLE_TRIPS=y -+CONFIG_THERMAL_GOV_FAIR_SHARE=y -+CONFIG_THERMAL_GOV_BANG_BANG=y -+CONFIG_CPU_THERMAL=y -+CONFIG_SUN8I_THERMAL=y -+CONFIG_WATCHDOG=y -+CONFIG_SUNXI_WATCHDOG=y -+CONFIG_MFD_SUN4I_GPADC=y -+CONFIG_MFD_AXP20X_RSB=y -+CONFIG_MFD_SYSCON=y -+CONFIG_REGULATOR=y -+CONFIG_REGULATOR_FIXED_VOLTAGE=y -+CONFIG_REGULATOR_AXP20X=y -+CONFIG_REGULATOR_GPIO=y -+CONFIG_MEDIA_SUPPORT=m -+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -+CONFIG_MEDIA_CAMERA_SUPPORT=y -+CONFIG_MEDIA_PLATFORM_SUPPORT=y -+CONFIG_V4L2_FLASH_LED_CLASS=m -+CONFIG_V4L_PLATFORM_DRIVERS=y -+CONFIG_VIDEO_SUN6I_CSI=m -+CONFIG_V4L_MEM2MEM_DRIVERS=y -+CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m -+CONFIG_VIDEO_SUN8I_DEINTERLACE=m -+CONFIG_VIDEO_SUN8I_ROTATE=m -+CONFIG_VIDEO_OV5640=m -+CONFIG_VIDEO_GC2145=m -+CONFIG_DRM=y -+CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_SUN4I=y -+# CONFIG_DRM_SUN4I_HDMI is not set -+# CONFIG_DRM_SUN4I_BACKEND is not set -+CONFIG_DRM_SUN6I_DSI=y -+CONFIG_DRM_SUN8I_DW_HDMI=y -+CONFIG_DRM_SUN8I_MIXER=y -+CONFIG_DRM_PANEL_ILITEK_ILI9881C=y -+CONFIG_DRM_PANEL_SITRONIX_ST7703=y -+CONFIG_DRM_DW_HDMI_AHB_AUDIO=m -+CONFIG_DRM_DW_HDMI_I2S_AUDIO=m -+CONFIG_DRM_DW_HDMI_CEC=y -+CONFIG_DRM_LIMA=m -+CONFIG_FB_SIMPLE=y -+CONFIG_BACKLIGHT_CLASS_DEVICE=y -+CONFIG_BACKLIGHT_PWM=y -+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -+CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER=y -+CONFIG_SOUND=m -+CONFIG_SND=m -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_HRTIMER=m -+# CONFIG_SND_SUPPORT_OLD_API is not set -+CONFIG_SND_SEQUENCER=m -+CONFIG_SND_SEQ_DUMMY=m -+CONFIG_SND_SEQUENCER_OSS=m -+CONFIG_SND_ALOOP=m -+CONFIG_SND_USB_AUDIO=m -+CONFIG_SND_SOC=m -+CONFIG_SND_SUN4I_CODEC=m -+CONFIG_SND_SUN8I_CODEC=m -+CONFIG_SND_SUN8I_CODEC_ANALOG=m -+CONFIG_SND_SUN50I_CODEC_ANALOG=m -+CONFIG_SND_SUN4I_I2S=m -+CONFIG_SND_SUN4I_SPDIF=m -+CONFIG_SND_SOC_BT_SCO=m -+CONFIG_SND_SOC_EC25=m -+CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m -+CONFIG_SND_SIMPLE_CARD=m -+CONFIG_SND_AUDIO_GRAPH_CARD=m -+CONFIG_HID=m -+# CONFIG_HID_A4TECH is not set -+# CONFIG_HID_APPLE is not set -+# CONFIG_HID_BELKIN is not set -+# CONFIG_HID_CHERRY is not set -+# CONFIG_HID_CHICONY is not set -+# CONFIG_HID_CYPRESS is not set -+# CONFIG_HID_EZKEY is not set -+# CONFIG_HID_ITE is not set -+# CONFIG_HID_KENSINGTON is not set -+# CONFIG_HID_LOGITECH is not set -+# CONFIG_HID_REDRAGON is not set -+# CONFIG_HID_MICROSOFT is not set -+# CONFIG_HID_MONTEREY is not set -+CONFIG_USB_HIDDEV=y -+CONFIG_USB_LED_TRIG=y -+CONFIG_USB=m -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -+CONFIG_USB_OTG=y -+CONFIG_USB_OTG_FSM=m -+CONFIG_USB_LEDS_TRIGGER_USBPORT=m -+CONFIG_USB_MON=m -+CONFIG_USB_EHCI_HCD=m -+CONFIG_USB_EHCI_HCD_PLATFORM=m -+CONFIG_USB_OHCI_HCD=m -+CONFIG_USB_OHCI_HCD_PLATFORM=m -+CONFIG_USB_ACM=m -+CONFIG_USB_STORAGE=m -+CONFIG_USB_UAS=m -+CONFIG_USBIP_CORE=m -+CONFIG_USBIP_VHCI_HCD=m -+CONFIG_USBIP_HOST=m -+CONFIG_USBIP_VUDC=m -+CONFIG_USB_MUSB_HDRC=m -+CONFIG_USB_MUSB_SUNXI=m -+CONFIG_MUSB_PIO_ONLY=y -+CONFIG_USB_SERIAL=m -+CONFIG_USB_SERIAL_SIMPLE=m -+CONFIG_USB_SERIAL_CH341=m -+CONFIG_USB_SERIAL_CP210X=m -+CONFIG_USB_SERIAL_FTDI_SIO=m -+CONFIG_USB_SERIAL_QCAUX=m -+CONFIG_USB_SERIAL_QUALCOMM=m -+CONFIG_USB_SERIAL_OPTION=m -+CONFIG_NOP_USB_XCEIV=m -+CONFIG_USB_GADGET=m -+CONFIG_USB_GADGET_VBUS_DRAW=500 -+CONFIG_U_SERIAL_CONSOLE=y -+CONFIG_USB_CONFIGFS=m -+CONFIG_USB_CONFIGFS_SERIAL=y -+CONFIG_USB_CONFIGFS_ACM=y -+CONFIG_USB_CONFIGFS_OBEX=y -+CONFIG_USB_CONFIGFS_NCM=y -+CONFIG_USB_CONFIGFS_ECM=y -+CONFIG_USB_CONFIGFS_ECM_SUBSET=y -+CONFIG_USB_CONFIGFS_RNDIS=y -+CONFIG_USB_CONFIGFS_EEM=y -+CONFIG_USB_CONFIGFS_MASS_STORAGE=y -+CONFIG_USB_CONFIGFS_F_LB_SS=y -+CONFIG_USB_CONFIGFS_F_FS=y -+CONFIG_USB_CONFIGFS_F_UAC1=y -+CONFIG_USB_CONFIGFS_F_UAC2=y -+CONFIG_USB_CONFIGFS_F_MIDI=y -+CONFIG_USB_CONFIGFS_F_HID=y -+CONFIG_USB_CONFIGFS_F_UVC=y -+CONFIG_USB_CONFIGFS_F_PRINTER=y -+CONFIG_USB_AUDIO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_EEM=y -+CONFIG_USB_G_NCM=m -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FUNCTIONFS=m -+CONFIG_USB_FUNCTIONFS_ETH=y -+CONFIG_USB_FUNCTIONFS_RNDIS=y -+CONFIG_USB_FUNCTIONFS_GENERIC=y -+CONFIG_USB_MASS_STORAGE=m -+CONFIG_USB_G_SERIAL=m -+CONFIG_USB_MIDI_GADGET=m -+CONFIG_USB_G_PRINTER=m -+CONFIG_USB_CDC_COMPOSITE=m -+CONFIG_USB_G_ACM_MS=m -+CONFIG_USB_G_MULTI=m -+CONFIG_USB_G_MULTI_CDC=y -+CONFIG_USB_G_HID=m -+CONFIG_USB_G_WEBCAM=m -+CONFIG_USB_RAW_GADGET=m -+CONFIG_TYPEC=y -+CONFIG_TYPEC_TCPM=m -+CONFIG_TYPEC_TCPCI=m -+CONFIG_TYPEC_UCSI=m -+CONFIG_TYPEC_ANX7688=m -+CONFIG_TYPEC_DP_ALTMODE=m -+CONFIG_MMC=y -+CONFIG_MMC_SUNXI=y -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+CONFIG_LEDS_CLASS_FLASH=y -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_SGM3140=m -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_ONESHOT=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_LEDS_TRIGGER_CPU=y -+CONFIG_LEDS_TRIGGER_ACTIVITY=y -+CONFIG_LEDS_TRIGGER_GPIO=y -+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -+CONFIG_LEDS_TRIGGER_TRANSIENT=m -+CONFIG_LEDS_TRIGGER_CAMERA=m -+CONFIG_LEDS_TRIGGER_PANIC=y -+CONFIG_LEDS_TRIGGER_NETDEV=y -+CONFIG_LEDS_TRIGGER_PATTERN=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_INTF_PROC is not set -+CONFIG_RTC_DRV_SUN6I=y -+CONFIG_DMADEVICES=y -+CONFIG_DMA_SUN6I=y -+CONFIG_DMABUF_HEAPS=y -+CONFIG_DMABUF_HEAPS_SYSTEM=y -+CONFIG_DMABUF_HEAPS_CMA=y -+# CONFIG_VIRTIO_MENU is not set -+# CONFIG_VHOST_MENU is not set -+CONFIG_STAGING=y -+CONFIG_STAGING_MEDIA=y -+CONFIG_VIDEO_SUNXI=y -+CONFIG_VIDEO_SUNXI_CEDRUS=m -+CONFIG_ASHMEM=y -+CONFIG_RTL8723CS=m -+# CONFIG_CLK_SUNXI_PRCM_SUN9I is not set -+# CONFIG_SUN50I_H6_CCU is not set -+# CONFIG_SUN50I_H6_R_CCU is not set -+# CONFIG_SUN8I_H3_CCU is not set -+# CONFIG_HISILICON_ERRATUM_161010101 is not set -+# CONFIG_ARM64_ERRATUM_858921 is not set -+CONFIG_MAILBOX=y -+CONFIG_IOMMU_IO_PGTABLE_LPAE=y -+CONFIG_DEVFREQ_GOV_PERFORMANCE=m -+CONFIG_DEVFREQ_GOV_POWERSAVE=m -+CONFIG_DEVFREQ_GOV_USERSPACE=m -+CONFIG_DEVFREQ_GOV_PASSIVE=m -+CONFIG_PM_DEVFREQ_EVENT=y -+CONFIG_IIO=y -+CONFIG_IIO_BUFFER_CB=m -+CONFIG_IIO_BUFFER_HW_CONSUMER=m -+CONFIG_IIO_SW_DEVICE=m -+CONFIG_IIO_SW_TRIGGER=m -+CONFIG_AXP20X_ADC=y -+CONFIG_INV_MPU6050_I2C=m -+CONFIG_STK3310=m -+CONFIG_IIO_ST_MAGN_3AXIS=m -+CONFIG_IIO_HRTIMER_TRIGGER=m -+CONFIG_IIO_INTERRUPT_TRIGGER=m -+CONFIG_IIO_SYSFS_TRIGGER=m -+CONFIG_PWM=y -+CONFIG_PWM_SUN4I=y -+CONFIG_PHY_SUN4I_USB=y -+CONFIG_ARM_CCI_PMU=y -+# CONFIG_ARM_CCI5xx_PMU is not set -+CONFIG_ANDROID=y -+CONFIG_ANDROID_BINDER_IPC=y -+CONFIG_ANDROID_BINDERFS=y -+CONFIG_ANDROID_BINDER_IPC_SELFTEST=y -+CONFIG_NVMEM_SUNXI_SID=y -+CONFIG_VALIDATE_FS_PARSER=y -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_POSIX_ACL=y -+CONFIG_XFS_FS=m -+CONFIG_XFS_POSIX_ACL=y -+CONFIG_BTRFS_FS=y -+CONFIG_BTRFS_FS_POSIX_ACL=y -+CONFIG_NILFS2_FS=m -+CONFIG_F2FS_FS=y -+CONFIG_F2FS_FS_SECURITY=y -+CONFIG_F2FS_CHECK_FS=y -+CONFIG_F2FS_FS_COMPRESSION=y -+CONFIG_FS_ENCRYPTION=y -+CONFIG_FANOTIFY=y -+CONFIG_AUTOFS_FS=m -+CONFIG_FUSE_FS=m -+CONFIG_CUSE=m -+CONFIG_OVERLAY_FS=m -+CONFIG_OVERLAY_FS_INDEX=y -+CONFIG_OVERLAY_FS_METACOPY=y -+CONFIG_VFAT_FS=y -+CONFIG_PROC_CHILDREN=y -+CONFIG_TMPFS=y -+CONFIG_TMPFS_POSIX_ACL=y -+CONFIG_CONFIGFS_FS=y -+CONFIG_ECRYPT_FS=m -+CONFIG_ECRYPT_FS_MESSAGING=y -+CONFIG_SQUASHFS=m -+CONFIG_SQUASHFS_FILE_DIRECT=y -+CONFIG_SQUASHFS_DECOMP_MULTI=y -+CONFIG_SQUASHFS_XATTR=y -+CONFIG_SQUASHFS_LZ4=y -+CONFIG_SQUASHFS_LZO=y -+CONFIG_SQUASHFS_XZ=y -+CONFIG_SQUASHFS_ZSTD=y -+# CONFIG_NETWORK_FILESYSTEMS is not set -+CONFIG_NLS_CODEPAGE_437=y -+CONFIG_NLS_CODEPAGE_852=y -+CONFIG_NLS_ISO8859_1=y -+CONFIG_NLS_ISO8859_2=y -+CONFIG_NLS_UTF8=y -+CONFIG_PERSISTENT_KEYRINGS=y -+CONFIG_ENCRYPTED_KEYS=y -+CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" -+CONFIG_CRYPTO_USER=m -+CONFIG_CRYPTO_PCRYPT=m -+CONFIG_CRYPTO_CRYPTD=y -+CONFIG_CRYPTO_CURVE25519=m -+CONFIG_CRYPTO_CHACHA20POLY1305=m -+CONFIG_CRYPTO_SEQIV=m -+CONFIG_CRYPTO_ECHAINIV=m -+CONFIG_CRYPTO_BLAKE2S=m -+CONFIG_CRYPTO_MD4=m -+CONFIG_CRYPTO_SHA1=y -+CONFIG_CRYPTO_SHA3=y -+CONFIG_CRYPTO_SM3=y -+CONFIG_CRYPTO_ARC4=m -+CONFIG_CRYPTO_SALSA20=m -+CONFIG_CRYPTO_SM4=y -+CONFIG_CRYPTO_DEFLATE=y -+CONFIG_CRYPTO_LZO=y -+CONFIG_CRYPTO_LZ4=y -+CONFIG_CRYPTO_ZSTD=y -+CONFIG_CRYPTO_ANSI_CPRNG=m -+CONFIG_CRYPTO_USER_API_HASH=m -+CONFIG_CRYPTO_USER_API_SKCIPHER=m -+CONFIG_CRYPTO_USER_API_RNG=m -+CONFIG_CRYPTO_USER_API_AEAD=m -+CONFIG_CRYPTO_DEV_SUN8I_CE=m -+CONFIG_PKCS8_PRIVATE_KEY_PARSER=m -+# CONFIG_RAID6_PQ_BENCHMARK is not set -+CONFIG_CRC_T10DIF=y -+CONFIG_DMA_CMA=y -+CONFIG_CMA_SIZE_MBYTES=64 -+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -+CONFIG_DYNAMIC_DEBUG=y -+CONFIG_FRAME_WARN=1024 -+CONFIG_MAGIC_SYSRQ=y -+CONFIG_DEBUG_FS=y -+CONFIG_STACKTRACE=y -+# CONFIG_STRICT_DEVMEM is not set -+# CONFIG_RUNTIME_TESTING_MENU is not set -diff --git a/arch/arm64/configs/pinephone_multidist_defconfig b/arch/arm64/configs/pinephone_multidist_defconfig -new file mode 100644 -index 000000000000..2194ce7cdb2e ---- /dev/null -+++ b/arch/arm64/configs/pinephone_multidist_defconfig -@@ -0,0 +1,630 @@ -+CONFIG_SYSVIPC=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_PREEMPT_VOLUNTARY=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+CONFIG_TASK_XACCT=y -+CONFIG_TASK_IO_ACCOUNTING=y -+CONFIG_MEMCG=y -+CONFIG_BLK_CGROUP=y -+CONFIG_CFS_BANDWIDTH=y -+CONFIG_RT_GROUP_SCHED=y -+CONFIG_CGROUP_PIDS=y -+CONFIG_CGROUP_FREEZER=y -+CONFIG_CPUSETS=y -+# CONFIG_PROC_PID_CPUSET is not set -+CONFIG_CGROUP_DEVICE=y -+CONFIG_CGROUP_CPUACCT=y -+CONFIG_CGROUP_BPF=y -+CONFIG_USER_NS=y -+CONFIG_SCHED_AUTOGROUP=y -+# CONFIG_RD_GZIP is not set -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+# CONFIG_RD_XZ is not set -+# CONFIG_RD_LZO is not set -+# CONFIG_RD_ZSTD is not set -+CONFIG_BPF_SYSCALL=y -+CONFIG_BPF_JIT_ALWAYS_ON=y -+CONFIG_PERF_EVENTS=y -+CONFIG_ARCH_SUNXI=y -+# CONFIG_ARM64_ERRATUM_832075 is not set -+# CONFIG_ARM64_ERRATUM_1024718 is not set -+# CONFIG_ARM64_ERRATUM_1418040 is not set -+# CONFIG_ARM64_ERRATUM_1165522 is not set -+# CONFIG_ARM64_ERRATUM_1319367 is not set -+# CONFIG_ARM64_ERRATUM_1530923 is not set -+# CONFIG_ARM64_ERRATUM_1286807 is not set -+# CONFIG_ARM64_ERRATUM_1463225 is not set -+# CONFIG_ARM64_ERRATUM_1542419 is not set -+# CONFIG_CAVIUM_ERRATUM_22375 is not set -+# CONFIG_CAVIUM_ERRATUM_23154 is not set -+# CONFIG_CAVIUM_ERRATUM_27456 is not set -+# CONFIG_CAVIUM_ERRATUM_30115 is not set -+# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set -+# CONFIG_FUJITSU_ERRATUM_010001 is not set -+# CONFIG_HISILICON_ERRATUM_161600802 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set -+# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set -+# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set -+# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set -+CONFIG_SCHED_MC=y -+CONFIG_NR_CPUS=4 -+CONFIG_COMPAT=y -+# CONFIG_ARM64_HW_AFDBM is not set -+# CONFIG_ARM64_PAN is not set -+# CONFIG_ARM64_USE_LSE_ATOMICS is not set -+# CONFIG_ARM64_VHE is not set -+# CONFIG_ARM64_RAS_EXTN is not set -+# CONFIG_ARM64_CNP is not set -+# CONFIG_ARM64_PTR_AUTH is not set -+# CONFIG_ARM64_AMU_EXTN is not set -+# CONFIG_ARM64_TLB_RANGE is not set -+# CONFIG_ARM64_BTI is not set -+# CONFIG_ARM64_E0PD is not set -+# CONFIG_ARCH_RANDOM is not set -+# CONFIG_ARM64_SVE is not set -+# CONFIG_EFI is not set -+CONFIG_PM_AUTOSLEEP=y -+CONFIG_PM_WAKELOCKS=y -+CONFIG_PM_DEBUG=y -+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -+CONFIG_ENERGY_MODEL=y -+CONFIG_CPU_IDLE=y -+CONFIG_CPU_IDLE_GOV_LADDER=y -+CONFIG_ARM_CPUIDLE=y -+CONFIG_ARM_PSCI_CPUIDLE=y -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_STAT=y -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -+CONFIG_CPUFREQ_DT=y -+CONFIG_ARM_SCPI_PROTOCOL=y -+# CONFIG_ARM_SMCCC_SOC_ID is not set -+CONFIG_CRYPTO_SHA1_ARM64_CE=y -+CONFIG_CRYPTO_SHA2_ARM64_CE=y -+CONFIG_CRYPTO_SHA512_ARM64_CE=y -+CONFIG_CRYPTO_SHA3_ARM64=y -+CONFIG_CRYPTO_SM3_ARM64_CE=y -+CONFIG_CRYPTO_SM4_ARM64_CE=y -+CONFIG_CRYPTO_GHASH_ARM64_CE=y -+CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y -+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -+CONFIG_CRYPTO_AES_ARM64_BS=y -+CONFIG_JUMP_LABEL=y -+# CONFIG_STACKPROTECTOR is not set -+# CONFIG_GCC_PLUGINS is not set -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+CONFIG_MODVERSIONS=y -+# CONFIG_BLK_DEV_BSG is not set -+CONFIG_BLK_DEV_THROTTLING=y -+CONFIG_BLK_WBT=y -+CONFIG_BLK_CGROUP_IOLATENCY=y -+CONFIG_BLK_CGROUP_IOCOST=y -+CONFIG_PARTITION_ADVANCED=y -+# CONFIG_MQ_IOSCHED_DEADLINE is not set -+# CONFIG_MQ_IOSCHED_KYBER is not set -+CONFIG_IOSCHED_BFQ=y -+CONFIG_BFQ_GROUP_IOSCHED=y -+CONFIG_CMA=y -+CONFIG_CMA_DEBUGFS=y -+CONFIG_ZPOOL=y -+CONFIG_ZBUD=y -+CONFIG_Z3FOLD=y -+CONFIG_ZSMALLOC=y -+CONFIG_NET=y -+CONFIG_PACKET=y -+CONFIG_PACKET_DIAG=y -+CONFIG_UNIX=y -+CONFIG_UNIX_DIAG=y -+CONFIG_XFRM_USER=y -+CONFIG_NET_KEY=y -+CONFIG_INET=y -+CONFIG_IP_MULTICAST=y -+CONFIG_IP_ADVANCED_ROUTER=y -+CONFIG_SYN_COOKIES=y -+# CONFIG_INET_DIAG is not set -+# CONFIG_IPV6_SIT is not set -+CONFIG_MPTCP=y -+CONFIG_NETFILTER=y -+CONFIG_NETFILTER_NETLINK_QUEUE=y -+CONFIG_NETFILTER_NETLINK_LOG=y -+CONFIG_NF_CONNTRACK=y -+CONFIG_NF_LOG_NETDEV=y -+CONFIG_NF_CONNTRACK_MARK=y -+# CONFIG_NF_CONNTRACK_PROCFS is not set -+# CONFIG_NF_CT_PROTO_DCCP is not set -+# CONFIG_NF_CT_PROTO_SCTP is not set -+# CONFIG_NF_CT_PROTO_UDPLITE is not set -+CONFIG_NF_CONNTRACK_FTP=y -+CONFIG_NF_CONNTRACK_H323=y -+CONFIG_NF_CONNTRACK_IRC=y -+CONFIG_NF_CONNTRACK_NETBIOS_NS=y -+CONFIG_NF_CONNTRACK_SNMP=y -+CONFIG_NF_CONNTRACK_PPTP=y -+CONFIG_NF_CONNTRACK_SIP=y -+CONFIG_NF_CONNTRACK_TFTP=y -+CONFIG_NF_CT_NETLINK=y -+CONFIG_NETFILTER_NETLINK_GLUE_CT=y -+CONFIG_NF_TABLES=y -+CONFIG_NF_TABLES_INET=y -+CONFIG_NF_TABLES_NETDEV=y -+CONFIG_NFT_NUMGEN=y -+CONFIG_NFT_CT=y -+CONFIG_NFT_COUNTER=y -+CONFIG_NFT_CONNLIMIT=y -+CONFIG_NFT_LOG=y -+CONFIG_NFT_LIMIT=y -+CONFIG_NFT_MASQ=y -+CONFIG_NFT_REDIR=y -+CONFIG_NFT_NAT=y -+CONFIG_NFT_TUNNEL=y -+CONFIG_NFT_OBJREF=y -+CONFIG_NFT_QUEUE=y -+CONFIG_NFT_QUOTA=y -+CONFIG_NFT_REJECT=y -+CONFIG_NFT_HASH=y -+CONFIG_NFT_FIB_INET=y -+CONFIG_NFT_SOCKET=y -+CONFIG_NFT_OSF=y -+CONFIG_NFT_DUP_NETDEV=y -+CONFIG_NFT_FWD_NETDEV=y -+CONFIG_NF_FLOW_TABLE_INET=y -+CONFIG_NF_FLOW_TABLE=y -+CONFIG_IP_SET=y -+CONFIG_IP_SET_BITMAP_IP=y -+CONFIG_IP_SET_BITMAP_IPMAC=y -+CONFIG_IP_SET_BITMAP_PORT=y -+CONFIG_IP_SET_HASH_IP=y -+CONFIG_IP_SET_HASH_IPMARK=y -+CONFIG_IP_SET_HASH_IPPORT=y -+CONFIG_IP_SET_HASH_IPPORTIP=y -+CONFIG_IP_SET_HASH_IPPORTNET=y -+CONFIG_IP_SET_HASH_IPMAC=y -+CONFIG_IP_SET_HASH_MAC=y -+CONFIG_IP_SET_HASH_NETPORTNET=y -+CONFIG_IP_SET_HASH_NET=y -+CONFIG_IP_SET_HASH_NETNET=y -+CONFIG_IP_SET_HASH_NETPORT=y -+CONFIG_IP_SET_HASH_NETIFACE=y -+CONFIG_IP_SET_LIST_SET=y -+CONFIG_NFT_FIB_IPV4=y -+CONFIG_NF_TABLES_ARP=y -+CONFIG_NF_FLOW_TABLE_IPV4=y -+CONFIG_NF_LOG_ARP=y -+CONFIG_NF_LOG_IPV4=y -+# CONFIG_NF_NAT_SNMP_BASIC is not set -+CONFIG_NFT_DUP_IPV6=y -+CONFIG_NFT_FIB_IPV6=y -+CONFIG_NF_FLOW_TABLE_IPV6=y -+CONFIG_NF_LOG_IPV6=y -+CONFIG_BPFILTER=y -+CONFIG_BPFILTER_UMH=y -+CONFIG_NET_SCHED=y -+CONFIG_NET_SCH_CBQ=y -+CONFIG_NET_SCH_HTB=y -+CONFIG_NET_CLS_BASIC=y -+CONFIG_NET_CLS_ROUTE4=y -+CONFIG_NET_CLS_FW=y -+CONFIG_NET_CLS_CGROUP=y -+CONFIG_NET_CLS_ACT=y -+CONFIG_NET_ACT_POLICE=y -+CONFIG_NET_ACT_GACT=y -+CONFIG_NET_ACT_MIRRED=y -+CONFIG_NETLINK_DIAG=y -+CONFIG_BPF_JIT=y -+CONFIG_BT=y -+CONFIG_BT_RFCOMM=y -+CONFIG_BT_RFCOMM_TTY=y -+CONFIG_BT_BNEP=y -+CONFIG_BT_BNEP_MC_FILTER=y -+CONFIG_BT_BNEP_PROTO_FILTER=y -+CONFIG_BT_HIDP=y -+CONFIG_BT_HS=y -+CONFIG_BT_LEDS=y -+CONFIG_BT_HCIUART=y -+CONFIG_BT_HCIUART_RTL=y -+CONFIG_CFG80211=y -+CONFIG_CFG80211_DEBUGFS=y -+CONFIG_CFG80211_WEXT=y -+CONFIG_MAC80211=y -+CONFIG_MAC80211_LEDS=y -+CONFIG_RFKILL=y -+CONFIG_RFKILL_GPIO=y -+CONFIG_UEVENT_HELPER=y -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+CONFIG_EXTRA_FIRMWARE="regulatory.db regulatory.db.p7s anx7688-fw.bin rtl_bt/rtl8723bs_config-pine64.bin rtl_bt/rtl8723cs_xx_config-pinephone.bin rtl_bt/rtl8723cs_xx_fw.bin ov5640_af.bin" -+CONFIG_EXTRA_FIRMWARE_DIR="/workspace/megous.com/orangepi-pc/firmware" -+CONFIG_ZRAM=y -+CONFIG_ZRAM_WRITEBACK=y -+CONFIG_ZRAM_MEMORY_TRACKING=y -+CONFIG_BLK_DEV_LOOP=y -+CONFIG_BLK_DEV_NBD=y -+CONFIG_MODEM_POWER=y -+CONFIG_SCSI=y -+CONFIG_BLK_DEV_SD=y -+# CONFIG_SCSI_LOWLEVEL is not set -+CONFIG_MD=y -+CONFIG_BLK_DEV_DM=y -+CONFIG_DM_CRYPT=y -+CONFIG_DM_INIT=y -+CONFIG_DM_UEVENT=y -+CONFIG_NETDEVICES=y -+CONFIG_WIREGUARD=y -+CONFIG_TUN=y -+CONFIG_VETH=y -+# CONFIG_ETHERNET is not set -+CONFIG_PPP=y -+CONFIG_PPP_BSDCOMP=y -+CONFIG_PPP_DEFLATE=y -+CONFIG_PPP_FILTER=y -+CONFIG_PPP_MPPE=y -+CONFIG_USB_RTL8152=y -+CONFIG_USB_USBNET=y -+# CONFIG_USB_NET_AX8817X is not set -+# CONFIG_USB_NET_AX88179_178A is not set -+CONFIG_USB_NET_CDC_EEM=y -+CONFIG_USB_NET_CDC_MBIM=y -+# CONFIG_USB_NET_NET1080 is not set -+# CONFIG_USB_NET_CDC_SUBSET is not set -+# CONFIG_USB_NET_ZAURUS is not set -+CONFIG_USB_NET_QMI_WWAN=y -+CONFIG_USB_RTL8153_ECM=y -+# CONFIG_WLAN_VENDOR_ADMTEK is not set -+# CONFIG_WLAN_VENDOR_ATH is not set -+# CONFIG_WLAN_VENDOR_ATMEL is not set -+# CONFIG_WLAN_VENDOR_BROADCOM is not set -+# CONFIG_WLAN_VENDOR_CISCO is not set -+# CONFIG_WLAN_VENDOR_INTEL is not set -+# CONFIG_WLAN_VENDOR_INTERSIL is not set -+# CONFIG_WLAN_VENDOR_MARVELL is not set -+# CONFIG_WLAN_VENDOR_MEDIATEK is not set -+# CONFIG_WLAN_VENDOR_RALINK is not set -+# CONFIG_WLAN_VENDOR_REALTEK is not set -+# CONFIG_WLAN_VENDOR_RSI is not set -+# CONFIG_WLAN_VENDOR_ST is not set -+# CONFIG_WLAN_VENDOR_TI is not set -+# CONFIG_WLAN_VENDOR_ZYDAS is not set -+# CONFIG_WLAN_VENDOR_QUANTENNA is not set -+CONFIG_INPUT_MOUSEDEV=y -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_EVDEV=y -+# CONFIG_KEYBOARD_ATKBD is not set -+CONFIG_KEYBOARD_GPIO=y -+CONFIG_KEYBOARD_GPIO_POLLED=y -+CONFIG_KEYBOARD_SUN4I_LRADC=y -+# CONFIG_INPUT_MOUSE is not set -+CONFIG_INPUT_TOUCHSCREEN=y -+CONFIG_TOUCHSCREEN_GOODIX=y -+CONFIG_INPUT_MISC=y -+CONFIG_INPUT_GPIO_VIBRA=y -+CONFIG_INPUT_AXP20X_PEK=y -+CONFIG_INPUT_UINPUT=y -+# CONFIG_SERIO is not set -+# CONFIG_LEGACY_PTYS is not set -+CONFIG_SERIAL_8250=y -+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -+# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -+CONFIG_SERIAL_8250_CONSOLE=y -+CONFIG_SERIAL_8250_NR_UARTS=8 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=8 -+CONFIG_SERIAL_8250_DW=y -+CONFIG_SERIAL_OF_PLATFORM=y -+CONFIG_SERIAL_DEV_BUS=y -+# CONFIG_HW_RANDOM is not set -+CONFIG_I2C_CHARDEV=y -+CONFIG_I2C_GPIO=y -+CONFIG_I2C_MV64XXX=y -+CONFIG_PINCTRL_AXP209=y -+CONFIG_PINCTRL_SINGLE=y -+# CONFIG_PINCTRL_SUN8I_H3_R is not set -+# CONFIG_PINCTRL_SUN50I_H5 is not set -+# CONFIG_PINCTRL_SUN50I_H6 is not set -+# CONFIG_PINCTRL_SUN50I_H6_R is not set -+CONFIG_NVMEM_REBOOT_MODE=y -+CONFIG_CHARGER_AXP20X=y -+CONFIG_BATTERY_AXP20X=y -+CONFIG_AXP20X_POWER=y -+# CONFIG_HWMON is not set -+CONFIG_THERMAL=y -+CONFIG_THERMAL_STATISTICS=y -+CONFIG_THERMAL_WRITABLE_TRIPS=y -+CONFIG_THERMAL_GOV_FAIR_SHARE=y -+CONFIG_THERMAL_GOV_BANG_BANG=y -+CONFIG_CPU_THERMAL=y -+CONFIG_SUN8I_THERMAL=y -+CONFIG_WATCHDOG=y -+CONFIG_SUNXI_WATCHDOG=y -+CONFIG_MFD_SUN4I_GPADC=y -+CONFIG_MFD_AXP20X_RSB=y -+CONFIG_MFD_SYSCON=y -+CONFIG_REGULATOR=y -+CONFIG_REGULATOR_FIXED_VOLTAGE=y -+CONFIG_REGULATOR_AXP20X=y -+CONFIG_REGULATOR_GPIO=y -+CONFIG_MEDIA_SUPPORT=y -+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -+CONFIG_MEDIA_CAMERA_SUPPORT=y -+CONFIG_MEDIA_PLATFORM_SUPPORT=y -+CONFIG_V4L2_FLASH_LED_CLASS=y -+CONFIG_V4L_PLATFORM_DRIVERS=y -+CONFIG_VIDEO_SUN6I_CSI=y -+CONFIG_V4L_MEM2MEM_DRIVERS=y -+CONFIG_VIDEO_MEM2MEM_DEINTERLACE=y -+CONFIG_VIDEO_SUN8I_DEINTERLACE=y -+CONFIG_VIDEO_SUN8I_ROTATE=y -+CONFIG_VIDEO_OV5640=y -+CONFIG_VIDEO_GC2145=y -+CONFIG_DRM=y -+CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_SUN4I=y -+# CONFIG_DRM_SUN4I_HDMI is not set -+# CONFIG_DRM_SUN4I_BACKEND is not set -+CONFIG_DRM_SUN6I_DSI=y -+CONFIG_DRM_SUN8I_DW_HDMI=y -+CONFIG_DRM_SUN8I_MIXER=y -+CONFIG_DRM_PANEL_ILITEK_ILI9881C=y -+CONFIG_DRM_PANEL_SITRONIX_ST7703=y -+CONFIG_DRM_DW_HDMI_AHB_AUDIO=y -+CONFIG_DRM_DW_HDMI_I2S_AUDIO=y -+CONFIG_DRM_DW_HDMI_CEC=y -+CONFIG_DRM_LIMA=y -+CONFIG_FB_SIMPLE=y -+CONFIG_BACKLIGHT_CLASS_DEVICE=y -+CONFIG_BACKLIGHT_PWM=y -+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -+CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER=y -+CONFIG_SOUND=y -+CONFIG_SND=y -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=y -+CONFIG_SND_PCM_OSS=y -+CONFIG_SND_HRTIMER=y -+# CONFIG_SND_SUPPORT_OLD_API is not set -+CONFIG_SND_SEQUENCER=y -+CONFIG_SND_SEQ_DUMMY=y -+CONFIG_SND_SEQUENCER_OSS=y -+CONFIG_SND_ALOOP=y -+CONFIG_SND_USB_AUDIO=y -+CONFIG_SND_SOC=y -+CONFIG_SND_SUN4I_CODEC=y -+CONFIG_SND_SUN8I_CODEC=y -+CONFIG_SND_SUN8I_CODEC_ANALOG=y -+CONFIG_SND_SUN50I_CODEC_ANALOG=y -+CONFIG_SND_SUN4I_I2S=y -+CONFIG_SND_SUN4I_SPDIF=y -+CONFIG_SND_SOC_BT_SCO=y -+CONFIG_SND_SOC_EC25=y -+CONFIG_SND_SOC_SIMPLE_AMPLIFIER=y -+CONFIG_SND_SIMPLE_CARD=y -+CONFIG_SND_AUDIO_GRAPH_CARD=y -+# CONFIG_HID_A4TECH is not set -+# CONFIG_HID_APPLE is not set -+# CONFIG_HID_BELKIN is not set -+# CONFIG_HID_CHERRY is not set -+# CONFIG_HID_CHICONY is not set -+# CONFIG_HID_CYPRESS is not set -+# CONFIG_HID_EZKEY is not set -+# CONFIG_HID_ITE is not set -+# CONFIG_HID_KENSINGTON is not set -+# CONFIG_HID_LOGITECH is not set -+# CONFIG_HID_REDRAGON is not set -+# CONFIG_HID_MICROSOFT is not set -+# CONFIG_HID_MONTEREY is not set -+CONFIG_USB_HIDDEV=y -+CONFIG_USB_LED_TRIG=y -+CONFIG_USB=y -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -+CONFIG_USB_OTG=y -+CONFIG_USB_OTG_FSM=y -+CONFIG_USB_LEDS_TRIGGER_USBPORT=y -+CONFIG_USB_MON=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_HCD_PLATFORM=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_HCD_PLATFORM=y -+CONFIG_USB_ACM=y -+CONFIG_USB_STORAGE=y -+CONFIG_USB_UAS=y -+CONFIG_USB_MUSB_HDRC=y -+CONFIG_USB_MUSB_SUNXI=y -+CONFIG_MUSB_PIO_ONLY=y -+CONFIG_USB_SERIAL=y -+CONFIG_USB_SERIAL_CONSOLE=y -+CONFIG_USB_SERIAL_GENERIC=y -+CONFIG_USB_SERIAL_SIMPLE=y -+CONFIG_USB_SERIAL_CH341=y -+CONFIG_USB_SERIAL_CP210X=y -+CONFIG_USB_SERIAL_FTDI_SIO=y -+CONFIG_USB_SERIAL_QCAUX=y -+CONFIG_USB_SERIAL_OPTION=y -+CONFIG_NOP_USB_XCEIV=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_VBUS_DRAW=500 -+CONFIG_U_SERIAL_CONSOLE=y -+CONFIG_USB_CONFIGFS=y -+CONFIG_USB_CONFIGFS_SERIAL=y -+CONFIG_USB_CONFIGFS_ACM=y -+CONFIG_USB_CONFIGFS_OBEX=y -+CONFIG_USB_CONFIGFS_NCM=y -+CONFIG_USB_CONFIGFS_ECM=y -+CONFIG_USB_CONFIGFS_ECM_SUBSET=y -+CONFIG_USB_CONFIGFS_RNDIS=y -+CONFIG_USB_CONFIGFS_EEM=y -+CONFIG_USB_CONFIGFS_MASS_STORAGE=y -+CONFIG_USB_CONFIGFS_F_FS=y -+CONFIG_USB_CONFIGFS_F_UAC1=y -+CONFIG_USB_CONFIGFS_F_UAC2=y -+CONFIG_USB_CONFIGFS_F_HID=y -+CONFIG_USB_CONFIGFS_F_UVC=y -+CONFIG_USB_CONFIGFS_F_PRINTER=y -+CONFIG_TYPEC=y -+CONFIG_TYPEC_TCPM=y -+CONFIG_TYPEC_TCPCI=y -+CONFIG_TYPEC_UCSI=y -+CONFIG_TYPEC_ANX7688=y -+CONFIG_TYPEC_DP_ALTMODE=y -+CONFIG_MMC=y -+CONFIG_MMC_SUNXI=y -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+CONFIG_LEDS_CLASS_FLASH=y -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_SGM3140=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_ONESHOT=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_LEDS_TRIGGER_CPU=y -+CONFIG_LEDS_TRIGGER_ACTIVITY=y -+CONFIG_LEDS_TRIGGER_GPIO=y -+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -+CONFIG_LEDS_TRIGGER_TRANSIENT=y -+CONFIG_LEDS_TRIGGER_CAMERA=y -+CONFIG_LEDS_TRIGGER_PANIC=y -+CONFIG_LEDS_TRIGGER_NETDEV=y -+CONFIG_LEDS_TRIGGER_PATTERN=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_INTF_PROC is not set -+CONFIG_RTC_DRV_SUN6I=y -+CONFIG_DMADEVICES=y -+CONFIG_DMA_SUN6I=y -+CONFIG_DMABUF_HEAPS=y -+CONFIG_DMABUF_HEAPS_SYSTEM=y -+CONFIG_DMABUF_HEAPS_CMA=y -+# CONFIG_VIRTIO_MENU is not set -+# CONFIG_VHOST_MENU is not set -+CONFIG_STAGING=y -+CONFIG_STAGING_MEDIA=y -+CONFIG_VIDEO_SUNXI=y -+CONFIG_VIDEO_SUNXI_CEDRUS=y -+CONFIG_ASHMEM=y -+CONFIG_RTL8723CS=y -+# CONFIG_CLK_SUNXI_PRCM_SUN9I is not set -+# CONFIG_SUN50I_H6_CCU is not set -+# CONFIG_SUN50I_H6_R_CCU is not set -+# CONFIG_SUN8I_H3_CCU is not set -+# CONFIG_HISILICON_ERRATUM_161010101 is not set -+# CONFIG_ARM64_ERRATUM_858921 is not set -+CONFIG_MAILBOX=y -+CONFIG_IOMMU_IO_PGTABLE_LPAE=y -+CONFIG_DEVFREQ_GOV_PERFORMANCE=y -+CONFIG_DEVFREQ_GOV_POWERSAVE=y -+CONFIG_DEVFREQ_GOV_USERSPACE=y -+CONFIG_DEVFREQ_GOV_PASSIVE=y -+CONFIG_PM_DEVFREQ_EVENT=y -+CONFIG_IIO=y -+CONFIG_IIO_BUFFER_CB=y -+CONFIG_IIO_BUFFER_HW_CONSUMER=y -+CONFIG_IIO_SW_DEVICE=y -+CONFIG_IIO_SW_TRIGGER=y -+CONFIG_AXP20X_ADC=y -+CONFIG_INV_MPU6050_I2C=y -+CONFIG_STK3310=y -+CONFIG_IIO_ST_MAGN_3AXIS=y -+CONFIG_IIO_HRTIMER_TRIGGER=y -+CONFIG_IIO_INTERRUPT_TRIGGER=y -+CONFIG_IIO_SYSFS_TRIGGER=y -+CONFIG_PWM=y -+CONFIG_PWM_SUN4I=y -+CONFIG_PHY_SUN4I_USB=y -+CONFIG_ARM_CCI_PMU=y -+# CONFIG_ARM_CCI5xx_PMU is not set -+CONFIG_ANDROID=y -+CONFIG_ANDROID_BINDER_IPC=y -+CONFIG_ANDROID_BINDERFS=y -+CONFIG_ANDROID_BINDER_IPC_SELFTEST=y -+CONFIG_NVMEM_SUNXI_SID=y -+CONFIG_VALIDATE_FS_PARSER=y -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_POSIX_ACL=y -+CONFIG_XFS_FS=y -+CONFIG_XFS_POSIX_ACL=y -+CONFIG_BTRFS_FS=y -+CONFIG_BTRFS_FS_POSIX_ACL=y -+CONFIG_NILFS2_FS=y -+CONFIG_F2FS_FS=y -+CONFIG_F2FS_FS_SECURITY=y -+CONFIG_F2FS_CHECK_FS=y -+CONFIG_F2FS_FS_COMPRESSION=y -+CONFIG_FS_ENCRYPTION=y -+CONFIG_FANOTIFY=y -+CONFIG_AUTOFS_FS=y -+CONFIG_FUSE_FS=y -+CONFIG_CUSE=y -+CONFIG_OVERLAY_FS=y -+CONFIG_OVERLAY_FS_INDEX=y -+CONFIG_OVERLAY_FS_METACOPY=y -+CONFIG_VFAT_FS=y -+CONFIG_PROC_CHILDREN=y -+CONFIG_TMPFS=y -+CONFIG_TMPFS_POSIX_ACL=y -+CONFIG_ECRYPT_FS=y -+CONFIG_ECRYPT_FS_MESSAGING=y -+CONFIG_SQUASHFS=y -+CONFIG_SQUASHFS_FILE_DIRECT=y -+CONFIG_SQUASHFS_DECOMP_MULTI=y -+CONFIG_SQUASHFS_XATTR=y -+CONFIG_SQUASHFS_LZ4=y -+CONFIG_SQUASHFS_LZO=y -+CONFIG_SQUASHFS_XZ=y -+CONFIG_SQUASHFS_ZSTD=y -+# CONFIG_NETWORK_FILESYSTEMS is not set -+CONFIG_NLS_CODEPAGE_437=y -+CONFIG_NLS_CODEPAGE_852=y -+CONFIG_NLS_ISO8859_1=y -+CONFIG_NLS_ISO8859_2=y -+CONFIG_NLS_UTF8=y -+CONFIG_PERSISTENT_KEYRINGS=y -+CONFIG_ENCRYPTED_KEYS=y -+CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" -+CONFIG_CRYPTO_USER=y -+CONFIG_CRYPTO_PCRYPT=y -+CONFIG_CRYPTO_CURVE25519=y -+CONFIG_CRYPTO_CHACHA20POLY1305=y -+CONFIG_CRYPTO_SEQIV=y -+CONFIG_CRYPTO_ECHAINIV=y -+CONFIG_CRYPTO_BLAKE2S=y -+CONFIG_CRYPTO_MD4=y -+CONFIG_CRYPTO_ARC4=y -+CONFIG_CRYPTO_SALSA20=y -+CONFIG_CRYPTO_DEFLATE=y -+CONFIG_CRYPTO_LZO=y -+CONFIG_CRYPTO_LZ4=y -+CONFIG_CRYPTO_ZSTD=y -+CONFIG_CRYPTO_ANSI_CPRNG=y -+CONFIG_CRYPTO_USER_API_HASH=y -+CONFIG_CRYPTO_USER_API_SKCIPHER=y -+CONFIG_CRYPTO_USER_API_RNG=y -+CONFIG_CRYPTO_USER_API_AEAD=y -+CONFIG_CRYPTO_DEV_SUN8I_CE=y -+CONFIG_PKCS8_PRIVATE_KEY_PARSER=y -+# CONFIG_RAID6_PQ_BENCHMARK is not set -+CONFIG_CRC_T10DIF=y -+CONFIG_DMA_CMA=y -+CONFIG_CMA_SIZE_MBYTES=64 -+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -+CONFIG_DYNAMIC_DEBUG=y -+CONFIG_FRAME_WARN=1024 -+CONFIG_MAGIC_SYSRQ=y -+CONFIG_DEBUG_FS=y -+CONFIG_FTRACE=y -+CONFIG_BOOTTIME_TRACING=y -+CONFIG_FUNCTION_TRACER=y -+CONFIG_FUNCTION_PROFILER=y -+CONFIG_TRACER_SNAPSHOT=y -+CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP=y -+# CONFIG_UPROBE_EVENTS is not set -+# CONFIG_STRICT_DEVMEM is not set -+# CONFIG_RUNTIME_TESTING_MENU is not set -diff --git a/arch/arm64/include/asm/xor.h b/arch/arm64/include/asm/xor.h -index 947f6a4f1aa0..4bfa897a45cb 100644 ---- a/arch/arm64/include/asm/xor.h -+++ b/arch/arm64/include/asm/xor.h -@@ -57,14 +57,8 @@ static struct xor_block_template xor_block_arm64 = { - .do_4 = xor_neon_4, - .do_5 = xor_neon_5 - }; --#undef XOR_TRY_TEMPLATES --#define XOR_TRY_TEMPLATES \ -- do { \ -- xor_speed(&xor_block_8regs); \ -- xor_speed(&xor_block_32regs); \ -- if (cpu_has_neon()) { \ -- xor_speed(&xor_block_arm64);\ -- } \ -- } while (0) -+ -+#define XOR_SELECT_TEMPLATE(x) \ -+ (&xor_block_32regs) - - #endif /* ! CONFIG_KERNEL_MODE_NEON */ -diff --git a/drivers/bluetooth/btrtl.c b/drivers/bluetooth/btrtl.c -index a4f7cace66b0..049ec74a74df 100644 ---- a/drivers/bluetooth/btrtl.c -+++ b/drivers/bluetooth/btrtl.c -@@ -17,7 +17,12 @@ - - #define VERSION "0.1" - -+#define RTL_CHIP_8723CS_CG 3 -+#define RTL_CHIP_8723CS_VF 4 -+#define RTL_CHIP_8723CS_XX 5 - #define RTL_EPATCH_SIGNATURE "Realtech" -+#define RTL_ROM_LMP_3499 0x3499 -+#define RTL_ROM_LMP_8703B 0x8703 - #define RTL_ROM_LMP_8723A 0x1200 - #define RTL_ROM_LMP_8723B 0x8723 - #define RTL_ROM_LMP_8821A 0x8821 -@@ -30,6 +35,7 @@ - #define IC_MATCH_FL_HCIREV (1 << 1) - #define IC_MATCH_FL_HCIVER (1 << 2) - #define IC_MATCH_FL_HCIBUS (1 << 3) -+#define IC_MATCH_FL_CHIP_TYPE (1 << 4) - #define IC_INFO(lmps, hcir, hciv, bus) \ - .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_HCIREV | \ - IC_MATCH_FL_HCIVER | IC_MATCH_FL_HCIBUS, \ -@@ -44,6 +50,7 @@ struct id_table { - __u16 hci_rev; - __u8 hci_ver; - __u8 hci_bus; -+ __u8 chip_type; - bool config_needed; - bool has_rom_version; - char *fw_name; -@@ -82,6 +89,39 @@ static const struct id_table ic_id_table[] = { - .fw_name = "rtl_bt/rtl8723b_fw.bin", - .cfg_name = "rtl_bt/rtl8723b_config" }, - -+ /* 8723CS-CG */ -+ { .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE | -+ IC_MATCH_FL_HCIBUS, -+ .lmp_subver = RTL_ROM_LMP_8703B, -+ .chip_type = RTL_CHIP_8723CS_CG, -+ .hci_bus = HCI_UART, -+ .config_needed = true, -+ .has_rom_version = true, -+ .fw_name = "rtl_bt/rtl8723cs_cg_fw.bin", -+ .cfg_name = "rtl_bt/rtl8723cs_cg_config" }, -+ -+ /* 8723CS-VF */ -+ { .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE | -+ IC_MATCH_FL_HCIBUS, -+ .lmp_subver = RTL_ROM_LMP_8703B, -+ .chip_type = RTL_CHIP_8723CS_VF, -+ .hci_bus = HCI_UART, -+ .config_needed = true, -+ .has_rom_version = true, -+ .fw_name = "rtl_bt/rtl8723cs_vf_fw.bin", -+ .cfg_name = "rtl_bt/rtl8723cs_vf_config" }, -+ -+ /* 8723CS-XX */ -+ { .match_flags = IC_MATCH_FL_LMPSUBV | IC_MATCH_FL_CHIP_TYPE | -+ IC_MATCH_FL_HCIBUS, -+ .lmp_subver = RTL_ROM_LMP_8703B, -+ .chip_type = RTL_CHIP_8723CS_XX, -+ .hci_bus = HCI_UART, -+ .config_needed = true, -+ .has_rom_version = true, -+ .fw_name = "rtl_bt/rtl8723cs_xx_fw.bin", -+ .cfg_name = "rtl_bt/rtl8723cs_xx_config" }, -+ - /* 8723D */ - { IC_INFO(RTL_ROM_LMP_8723B, 0xd, 0x8, HCI_USB), - .config_needed = true, -@@ -154,7 +194,8 @@ static const struct id_table ic_id_table[] = { - }; - - static const struct id_table *btrtl_match_ic(u16 lmp_subver, u16 hci_rev, -- u8 hci_ver, u8 hci_bus) -+ u8 hci_ver, u8 hci_bus, -+ u8 chip_type) - { - int i; - -@@ -171,6 +212,9 @@ static const struct id_table *btrtl_match_ic(u16 lmp_subver, u16 hci_rev, - if ((ic_id_table[i].match_flags & IC_MATCH_FL_HCIBUS) && - (ic_id_table[i].hci_bus != hci_bus)) - continue; -+ if ((ic_id_table[i].match_flags & IC_MATCH_FL_CHIP_TYPE) && -+ (ic_id_table[i].chip_type != chip_type)) -+ continue; - - break; - } -@@ -253,6 +297,7 @@ static int rtlbt_parse_firmware(struct hci_dev *hdev, - { RTL_ROM_LMP_8723B, 1 }, - { RTL_ROM_LMP_8821A, 2 }, - { RTL_ROM_LMP_8761A, 3 }, -+ { RTL_ROM_LMP_8703B, 7 }, - { RTL_ROM_LMP_8822B, 8 }, - { RTL_ROM_LMP_8723B, 9 }, /* 8723D */ - { RTL_ROM_LMP_8821A, 10 }, /* 8821C */ -@@ -529,6 +574,48 @@ out: - return ret; - } - -+static bool rtl_has_chip_type(u16 lmp_subver) -+{ -+ switch (lmp_subver) { -+ case RTL_ROM_LMP_8703B: -+ return true; -+ default: -+ break; -+ } -+ -+ return false; -+} -+ -+static int rtl_read_chip_type(struct hci_dev *hdev, u8 *type) -+{ -+ struct rtl_chip_type_evt *chip_type; -+ struct sk_buff *skb; -+ const unsigned char cmd_buf[] = {0x00, 0x94, 0xa0, 0x00, 0xb0}; -+ -+ /* Read RTL chip type command */ -+ skb = __hci_cmd_sync(hdev, 0xfc61, 5, cmd_buf, HCI_INIT_TIMEOUT); -+ if (IS_ERR(skb)) { -+ rtl_dev_err(hdev, "Read chip type failed (%ld)", -+ PTR_ERR(skb)); -+ return PTR_ERR(skb); -+ } -+ -+ if (skb->len != sizeof(*chip_type)) { -+ rtl_dev_err(hdev, "RTL chip type event length mismatch"); -+ kfree_skb(skb); -+ return -EIO; -+ } -+ -+ chip_type = (struct rtl_chip_type_evt *)skb->data; -+ rtl_dev_info(hdev, "chip_type status=%x type=%x", -+ chip_type->status, chip_type->type); -+ -+ *type = chip_type->type & 0x0f; -+ -+ kfree_skb(skb); -+ return 0; -+} -+ - void btrtl_free(struct btrtl_device_info *btrtl_dev) - { - kvfree(btrtl_dev->fw_data); -@@ -543,9 +630,9 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev, - struct btrtl_device_info *btrtl_dev; - struct sk_buff *skb; - struct hci_rp_read_local_version *resp; -- char cfg_name[40]; -+ char cfg_name[128]; - u16 hci_rev, lmp_subver; -- u8 hci_ver; -+ u8 hci_ver, chip_type = 0; - int ret; - u16 opcode; - u8 cmd[2]; -@@ -615,8 +702,14 @@ struct btrtl_device_info *btrtl_initialize(struct hci_dev *hdev, - out_free: - kfree_skb(skb); - -+ if (rtl_has_chip_type(lmp_subver)) { -+ ret = rtl_read_chip_type(hdev, &chip_type); -+ if (ret) -+ goto err_free; -+ } -+ - btrtl_dev->ic_info = btrtl_match_ic(lmp_subver, hci_rev, hci_ver, -- hdev->bus); -+ hdev->bus, chip_type); - - if (!btrtl_dev->ic_info) { - rtl_dev_info(hdev, "unknown IC info, lmp subver %04x, hci rev %04x, hci ver %04x", -@@ -689,6 +782,7 @@ int btrtl_download_firmware(struct hci_dev *hdev, - case RTL_ROM_LMP_8761A: - case RTL_ROM_LMP_8822B: - case RTL_ROM_LMP_8852A: -+ case RTL_ROM_LMP_8703B: - return btrtl_setup_rtl8723b(hdev, btrtl_dev); - default: - rtl_dev_info(hdev, "assuming no firmware upload needed"); -@@ -707,7 +801,12 @@ int btrtl_setup_realtek(struct hci_dev *hdev) - return PTR_ERR(btrtl_dev); - - ret = btrtl_download_firmware(hdev, btrtl_dev); -+ if (ret) -+ goto out_free; -+ -+ btrtl_apply_quirks(hdev, btrtl_dev); - -+out_free: - btrtl_free(btrtl_dev); - - /* Enable controller to do both LE scan and BR/EDR inquiry -@@ -847,6 +946,24 @@ int btrtl_get_uart_settings(struct hci_dev *hdev, - } - EXPORT_SYMBOL_GPL(btrtl_get_uart_settings); - -+void btrtl_apply_quirks(struct hci_dev *hdev, -+ struct btrtl_device_info *btrtl_dev) -+{ -+ switch (btrtl_dev->ic_info->lmp_subver) { -+ case RTL_ROM_LMP_8703B: -+ /* 8723CS reports two pages for local ext features, -+ * but it doesn't support any features from page 2 - -+ * it either responds with garbage or with error status -+ */ -+ set_bit(HCI_QUIRK_BROKEN_LOCAL_EXT_FTR_MAX_PAGE, -+ &hdev->quirks); -+ break; -+ default: -+ break; -+ } -+} -+EXPORT_SYMBOL_GPL(btrtl_apply_quirks); -+ - MODULE_AUTHOR("Daniel Drake "); - MODULE_DESCRIPTION("Bluetooth support for Realtek devices ver " VERSION); - MODULE_VERSION(VERSION); -@@ -856,6 +973,12 @@ MODULE_FIRMWARE("rtl_bt/rtl8723b_fw.bin"); - MODULE_FIRMWARE("rtl_bt/rtl8723b_config.bin"); - MODULE_FIRMWARE("rtl_bt/rtl8723bs_fw.bin"); - MODULE_FIRMWARE("rtl_bt/rtl8723bs_config.bin"); -+MODULE_FIRMWARE("rtl_bt/rtl8723cs_cg_fw.bin"); -+MODULE_FIRMWARE("rtl_bt/rtl8723cs_cg_config.bin"); -+MODULE_FIRMWARE("rtl_bt/rtl8723cs_vf_fw.bin"); -+MODULE_FIRMWARE("rtl_bt/rtl8723cs_vf_config.bin"); -+MODULE_FIRMWARE("rtl_bt/rtl8723cs_xx_fw.bin"); -+MODULE_FIRMWARE("rtl_bt/rtl8723cs_xx_config.bin"); - MODULE_FIRMWARE("rtl_bt/rtl8723ds_fw.bin"); - MODULE_FIRMWARE("rtl_bt/rtl8723ds_config.bin"); - MODULE_FIRMWARE("rtl_bt/rtl8761a_fw.bin"); -diff --git a/drivers/bluetooth/btrtl.h b/drivers/bluetooth/btrtl.h -index 2a582682136d..152ed2ece4c2 100644 ---- a/drivers/bluetooth/btrtl.h -+++ b/drivers/bluetooth/btrtl.h -@@ -14,6 +14,11 @@ - - struct btrtl_device_info; - -+struct rtl_chip_type_evt { -+ __u8 status; -+ __u8 type; -+} __packed; -+ - struct rtl_download_cmd { - __u8 index; - __u8 data[RTL_FRAG_LEN]; -@@ -60,6 +65,8 @@ int btrtl_get_uart_settings(struct hci_dev *hdev, - struct btrtl_device_info *btrtl_dev, - unsigned int *controller_baudrate, - u32 *device_baudrate, bool *flow_control); -+void btrtl_apply_quirks(struct hci_dev *hdev, -+ struct btrtl_device_info *btrtl_dev); - - #else - -@@ -96,6 +103,11 @@ static inline int btrtl_get_uart_settings(struct hci_dev *hdev, - bool *flow_control) - { - return -ENOENT; -+ -+static inline void btrtl_apply_quirks(struct hci_dev *hdev, -+ struct btrtl_device_info *btrtl_dev) -+{ -+} - } - - #endif -diff --git a/drivers/bluetooth/hci_bcm.c b/drivers/bluetooth/hci_bcm.c -index 8ea5ca8d71d6..2ef79c318be0 100644 ---- a/drivers/bluetooth/hci_bcm.c -+++ b/drivers/bluetooth/hci_bcm.c -@@ -1478,8 +1478,13 @@ static struct bcm_device_data bcm43438_device_data = { - .drive_rts_on_open = true, - }; - -+static struct bcm_device_data bcm20702a1_device_data = { -+ .drive_rts_on_open = true, -+ .no_early_set_baudrate = true, -+}; -+ - static const struct of_device_id bcm_bluetooth_of_match[] = { -- { .compatible = "brcm,bcm20702a1" }, -+ { .compatible = "brcm,bcm20702a1", .data = &bcm20702a1_device_data }, - { .compatible = "brcm,bcm4329-bt" }, - { .compatible = "brcm,bcm4345c5" }, - { .compatible = "brcm,bcm4330-bt" }, -diff --git a/drivers/bluetooth/hci_h5.c b/drivers/bluetooth/hci_h5.c -index 7be16a7f653b..fff816702777 100644 ---- a/drivers/bluetooth/hci_h5.c -+++ b/drivers/bluetooth/hci_h5.c -@@ -93,6 +93,7 @@ struct h5 { - const struct h5_vnd *vnd; - const char *id; - -+ struct gpio_desc *reset_gpio; - struct gpio_desc *enable_gpio; - struct gpio_desc *device_wake_gpio; - }; -@@ -821,6 +822,9 @@ static int h5_serdev_probe(struct serdev_device *serdev) - return -ENODEV; - - h5->vnd = (const struct h5_vnd *)data; -+ -+ of_property_read_string(dev->of_node, -+ "firmware-postfix", &h5->id); - } - - -@@ -833,6 +837,10 @@ static int h5_serdev_probe(struct serdev_device *serdev) - if (IS_ERR(h5->device_wake_gpio)) - return PTR_ERR(h5->device_wake_gpio); - -+ h5->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); -+ if (IS_ERR(h5->reset_gpio)) -+ return PTR_ERR(h5->reset_gpio); -+ - return hci_uart_register_device(&h5->serdev_hu, &h5p); - } - -@@ -905,6 +913,10 @@ static int h5_btrtl_setup(struct h5 *h5) - err = btrtl_download_firmware(h5->hu->hdev, btrtl_dev); - /* Give the device some time before the hci-core sends it a reset */ - usleep_range(10000, 20000); -+ if (err) -+ goto out_free; -+ -+ btrtl_apply_quirks(h5->hu->hdev, btrtl_dev); - - out_free: - btrtl_free(btrtl_dev); -@@ -921,6 +933,9 @@ static void h5_btrtl_open(struct h5 *h5) - - /* The controller needs up to 500ms to wakeup */ - gpiod_set_value_cansleep(h5->enable_gpio, 1); -+ /* Take it out of reset */ -+ gpiod_set_value_cansleep(h5->reset_gpio, 0); -+ msleep(100); - gpiod_set_value_cansleep(h5->device_wake_gpio, 1); - msleep(500); - } -@@ -928,6 +943,7 @@ static void h5_btrtl_open(struct h5 *h5) - static void h5_btrtl_close(struct h5 *h5) - { - gpiod_set_value_cansleep(h5->device_wake_gpio, 0); -+ gpiod_set_value_cansleep(h5->reset_gpio, 1); - gpiod_set_value_cansleep(h5->enable_gpio, 0); - } - -@@ -999,6 +1015,12 @@ static struct h5_vnd rtl_vnd = { - .resume = h5_btrtl_resume, - .acpi_gpio_map = acpi_btrtl_gpios, - }; -+ -+static struct h5_vnd rtl_vnd_nosuspend = { -+ .setup = h5_btrtl_setup, -+ .open = h5_btrtl_open, -+ .close = h5_btrtl_close, -+}; - #endif - - #ifdef CONFIG_ACPI -@@ -1022,6 +1044,8 @@ static const struct of_device_id rtl_bluetooth_of_match[] = { - .data = (const void *)&rtl_vnd }, - { .compatible = "realtek,rtl8723bs-bt", - .data = (const void *)&rtl_vnd }, -+ { .compatible = "realtek,rtl8723cs-bt", -+ .data = (const void *)&rtl_vnd_nosuspend }, - #endif - { }, - }; -diff --git a/drivers/bus/sun50i-de2.c b/drivers/bus/sun50i-de2.c -index 672518741f86..9f2fbbcb08b3 100644 ---- a/drivers/bus/sun50i-de2.c -+++ b/drivers/bus/sun50i-de2.c -@@ -16,7 +16,8 @@ static int sun50i_de2_bus_probe(struct platform_device *pdev) - - ret = sunxi_sram_claim(&pdev->dev); - if (ret) { -- dev_err(&pdev->dev, "Error couldn't map SRAM to device\n"); -+ dev_err_probe(&pdev->dev, ret, -+ "Couldn't map SRAM to device\n"); - return ret; - } - -diff --git a/drivers/bus/sunxi-rsb.c b/drivers/bus/sunxi-rsb.c -index 1bb00a959c67..edb5f338f494 100644 ---- a/drivers/bus/sunxi-rsb.c -+++ b/drivers/bus/sunxi-rsb.c -@@ -45,6 +45,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -@@ -126,6 +128,7 @@ struct sunxi_rsb { - struct completion complete; - struct mutex lock; - unsigned int status; -+ u32 clk_freq; - }; - - /* bus / slave device related functions */ -@@ -273,8 +276,6 @@ static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb) - - reinit_completion(&rsb->complete); - -- writel(RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER, -- rsb->regs + RSB_INTE); - writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB, - rsb->regs + RSB_CTRL); - -@@ -282,7 +283,7 @@ static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb) - msecs_to_jiffies(100))) { - dev_dbg(rsb->dev, "RSB timeout\n"); - -- /* abort the transfer */ -+ /* abort the transfer and disable interrupts */ - writel(RSB_CTRL_ABORT_TRANS, rsb->regs + RSB_CTRL); - - /* clear any interrupt flags */ -@@ -311,112 +312,76 @@ static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb) - return 0; - } - --static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr, -- u32 *buf, size_t len) -+/* RSB regmap functions */ -+struct sunxi_rsb_ctx { -+ struct sunxi_rsb_device *rdev; -+ u32 mask; -+ u8 rd_cmd; -+ u8 wr_cmd; -+}; -+ -+static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg, -+ unsigned int *val) - { -- u32 cmd; -+ struct sunxi_rsb_ctx *ctx = context; -+ struct sunxi_rsb_device *rdev = ctx->rdev; -+ struct sunxi_rsb *rsb = rdev->rsb; - int ret; - -- if (!buf) -+ if (!val) - return -EINVAL; -- -- switch (len) { -- case 1: -- cmd = RSB_CMD_RD8; -- break; -- case 2: -- cmd = RSB_CMD_RD16; -- break; -- case 4: -- cmd = RSB_CMD_RD32; -- break; -- default: -- dev_err(rsb->dev, "Invalid access width: %zd\n", len); -+ if (reg > 0xff) - return -EINVAL; -- } - -+ pm_runtime_get_sync(rsb->dev); - mutex_lock(&rsb->lock); - -- writel(addr, rsb->regs + RSB_ADDR); -- writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR); -- writel(cmd, rsb->regs + RSB_CMD); -+ writel(reg, rsb->regs + RSB_ADDR); -+ writel(RSB_DAR_RTA(rdev->rtaddr), rsb->regs + RSB_DAR); -+ writel(ctx->rd_cmd, rsb->regs + RSB_CMD); - - ret = _sunxi_rsb_run_xfer(rsb); - if (ret) - goto unlock; - -- *buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0); -+ *val = readl(rsb->regs + RSB_DATA) & ctx->mask; - - unlock: - mutex_unlock(&rsb->lock); -+ pm_runtime_mark_last_busy(rsb->dev); -+ pm_runtime_put_autosuspend(rsb->dev); - - return ret; - } - --static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr, -- const u32 *buf, size_t len) -+static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg, -+ unsigned int val) - { -- u32 cmd; -+ struct sunxi_rsb_ctx *ctx = context; -+ struct sunxi_rsb_device *rdev = ctx->rdev; -+ struct sunxi_rsb *rsb = rdev->rsb; - int ret; - -- if (!buf) -- return -EINVAL; -- -- switch (len) { -- case 1: -- cmd = RSB_CMD_WR8; -- break; -- case 2: -- cmd = RSB_CMD_WR16; -- break; -- case 4: -- cmd = RSB_CMD_WR32; -- break; -- default: -- dev_err(rsb->dev, "Invalid access width: %zd\n", len); -+ if (reg > 0xff) - return -EINVAL; -- } - -+ pm_runtime_get_sync(rsb->dev); - mutex_lock(&rsb->lock); - -- writel(addr, rsb->regs + RSB_ADDR); -- writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR); -- writel(*buf, rsb->regs + RSB_DATA); -- writel(cmd, rsb->regs + RSB_CMD); -+ writel(reg, rsb->regs + RSB_ADDR); -+ writel(RSB_DAR_RTA(rdev->rtaddr), rsb->regs + RSB_DAR); -+ writel(val, rsb->regs + RSB_DATA); -+ writel(ctx->wr_cmd, rsb->regs + RSB_CMD); -+ - ret = _sunxi_rsb_run_xfer(rsb); - - mutex_unlock(&rsb->lock); -+ pm_runtime_mark_last_busy(rsb->dev); -+ pm_runtime_put_autosuspend(rsb->dev); - - return ret; - } - --/* RSB regmap functions */ --struct sunxi_rsb_ctx { -- struct sunxi_rsb_device *rdev; -- int size; --}; -- --static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg, -- unsigned int *val) --{ -- struct sunxi_rsb_ctx *ctx = context; -- struct sunxi_rsb_device *rdev = ctx->rdev; -- -- if (reg > 0xff) -- return -EINVAL; -- -- return sunxi_rsb_read(rdev->rsb, rdev->rtaddr, reg, val, ctx->size); --} -- --static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg, -- unsigned int val) --{ -- struct sunxi_rsb_ctx *ctx = context; -- struct sunxi_rsb_device *rdev = ctx->rdev; -- -- return sunxi_rsb_write(rdev->rsb, rdev->rtaddr, reg, &val, ctx->size); --} -- - static void regmap_sunxi_rsb_free_ctx(void *context) - { - struct sunxi_rsb_ctx *ctx = context; -@@ -436,13 +401,24 @@ static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device * - const struct regmap_config *config) - { - struct sunxi_rsb_ctx *ctx; -+ u8 rd_cmd, wr_cmd; - - switch (config->val_bits) { - case 8: -+ rd_cmd = RSB_CMD_RD8; -+ wr_cmd = RSB_CMD_WR8; -+ break; - case 16: -+ rd_cmd = RSB_CMD_RD16; -+ wr_cmd = RSB_CMD_WR16; -+ break; - case 32: -+ rd_cmd = RSB_CMD_RD32; -+ wr_cmd = RSB_CMD_WR32; - break; - default: -+ dev_err(&rdev->dev, "Invalid RSB access width: %d\n", -+ config->val_bits); - return ERR_PTR(-EINVAL); - } - -@@ -451,7 +427,9 @@ static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device * - return ERR_PTR(-ENOMEM); - - ctx->rdev = rdev; -- ctx->size = config->val_bits / 8; -+ ctx->mask = GENMASK(config->val_bits - 1, 0); -+ ctx->rd_cmd = rd_cmd; -+ ctx->wr_cmd = wr_cmd; - - return ctx; - } -@@ -480,7 +458,8 @@ static irqreturn_t sunxi_rsb_irq(int irq, void *dev_id) - status = readl(rsb->regs + RSB_INTS); - rsb->status = status; - -- /* Clear interrupts */ -+ /* Disable and clear interrupts */ -+ writel(0, rsb->regs + RSB_CTRL); - status &= (RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | - RSB_INTS_TRANS_OVER); - writel(status, rsb->regs + RSB_INTS); -@@ -614,22 +593,122 @@ static int of_rsb_register_devices(struct sunxi_rsb *rsb) - return 0; - } - --static const struct of_device_id sunxi_rsb_of_match_table[] = { -- { .compatible = "allwinner,sun8i-a23-rsb" }, -- {} -+static int sunxi_rsb_init_controller(struct sunxi_rsb *rsb) -+{ -+ struct device *dev = rsb->dev; -+ unsigned long p_clk_freq; -+ u32 clk_delay, reg; -+ int clk_div, ret; -+ -+ ret = clk_prepare_enable(rsb->clk); -+ if (ret) { -+ dev_err(dev, "failed to enable clk: %d\n", ret); -+ return ret; -+ } -+ -+ ret = reset_control_reset(rsb->rstc); -+ if (ret) { -+ dev_err(dev, "failed to deassert reset line: %d\n", ret); -+ goto err_clk_disable; -+ } -+ -+ /* reset the controller */ -+ writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL); -+ readl_poll_timeout(rsb->regs + RSB_CTRL, reg, -+ !(reg & RSB_CTRL_SOFT_RST), 1000, 100000); -+ -+ /* -+ * Clock frequency and delay calculation code is from -+ * Allwinner U-boot sources. -+ * -+ * From A83 user manual: -+ * bus clock frequency = parent clock frequency / (2 * (divider + 1)) -+ */ -+ p_clk_freq = clk_get_rate(rsb->clk); -+ clk_div = p_clk_freq / rsb->clk_freq / 2; -+ if (!clk_div) -+ clk_div = 1; -+ else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1) -+ clk_div = RSB_CCR_MAX_CLK_DIV + 1; -+ -+ clk_delay = clk_div >> 1; -+ if (!clk_delay) -+ clk_delay = 1; -+ -+ dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2); -+ writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1), -+ rsb->regs + RSB_CCR); -+ -+ /* -+ * Select the interrupts we care about. They will not actually fire -+ * until the RSB_CTRL_GLOBAL_INT_ENB bit is set. -+ */ -+ writel(RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER, -+ rsb->regs + RSB_INTE); -+ -+ return 0; -+ -+err_clk_disable: -+ clk_disable_unprepare(rsb->clk); -+ -+ return ret; -+} -+ -+static int sunxi_rsb_exit_controller(struct sunxi_rsb *rsb) -+{ -+ reset_control_assert(rsb->rstc); -+ clk_disable_unprepare(rsb->clk); -+ -+ return 0; -+} -+ -+static int __maybe_unused sunxi_rsb_runtime_suspend(struct device *dev) -+{ -+ struct sunxi_rsb *rsb = dev_get_drvdata(dev); -+ -+ clk_disable_unprepare(rsb->clk); -+ -+ return 0; -+} -+ -+static int __maybe_unused sunxi_rsb_runtime_resume(struct device *dev) -+{ -+ struct sunxi_rsb *rsb = dev_get_drvdata(dev); -+ -+ return clk_prepare_enable(rsb->clk); -+} -+ -+static int __maybe_unused sunxi_rsb_suspend(struct device *dev) -+{ -+ struct sunxi_rsb *rsb = dev_get_drvdata(dev); -+ -+ /* Ensure the clock is running before asserting reset. */ -+ if (pm_runtime_status_suspended(dev)) -+ pm_runtime_resume(dev); -+ -+ return sunxi_rsb_exit_controller(rsb); -+} -+ -+static int __maybe_unused sunxi_rsb_resume(struct device *dev) -+{ -+ struct sunxi_rsb *rsb = dev_get_drvdata(dev); -+ -+ return sunxi_rsb_init_controller(rsb); -+} -+ -+static const struct dev_pm_ops sunxi_rsb_dev_pm_ops = { -+ SET_RUNTIME_PM_OPS(sunxi_rsb_runtime_suspend, -+ sunxi_rsb_runtime_resume, NULL) -+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sunxi_rsb_suspend, sunxi_rsb_resume) - }; --MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table); - - static int sunxi_rsb_probe(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; -- struct resource *r; - struct sunxi_rsb *rsb; -- unsigned long p_clk_freq; -- u32 clk_delay, clk_freq = 3000000; -- int clk_div, irq, ret; -- u32 reg; -+ u32 clk_freq = 3000000; -+ int irq, ret; - - of_property_read_u32(np, "clock-frequency", &clk_freq); - if (clk_freq > RSB_MAX_FREQ) { -@@ -644,9 +723,10 @@ static int sunxi_rsb_probe(struct platform_device *pdev) - return -ENOMEM; - - rsb->dev = dev; -+ rsb->clk_freq = clk_freq; - platform_set_drvdata(pdev, rsb); -- r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -- rsb->regs = devm_ioremap_resource(dev, r); -+ -+ rsb->regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(rsb->regs)) - return PTR_ERR(rsb->regs); - -@@ -661,63 +741,27 @@ static int sunxi_rsb_probe(struct platform_device *pdev) - return ret; - } - -- ret = clk_prepare_enable(rsb->clk); -- if (ret) { -- dev_err(dev, "failed to enable clk: %d\n", ret); -- return ret; -- } -- -- p_clk_freq = clk_get_rate(rsb->clk); -- - rsb->rstc = devm_reset_control_get(dev, NULL); - if (IS_ERR(rsb->rstc)) { - ret = PTR_ERR(rsb->rstc); - dev_err(dev, "failed to retrieve reset controller: %d\n", ret); -- goto err_clk_disable; -- } -- -- ret = reset_control_deassert(rsb->rstc); -- if (ret) { -- dev_err(dev, "failed to deassert reset line: %d\n", ret); -- goto err_clk_disable; -+ return ret; - } - - init_completion(&rsb->complete); - mutex_init(&rsb->lock); - -- /* reset the controller */ -- writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL); -- readl_poll_timeout(rsb->regs + RSB_CTRL, reg, -- !(reg & RSB_CTRL_SOFT_RST), 1000, 100000); -- -- /* -- * Clock frequency and delay calculation code is from -- * Allwinner U-boot sources. -- * -- * From A83 user manual: -- * bus clock frequency = parent clock frequency / (2 * (divider + 1)) -- */ -- clk_div = p_clk_freq / clk_freq / 2; -- if (!clk_div) -- clk_div = 1; -- else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1) -- clk_div = RSB_CCR_MAX_CLK_DIV + 1; -- -- clk_delay = clk_div >> 1; -- if (!clk_delay) -- clk_delay = 1; -- -- dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2); -- writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1), -- rsb->regs + RSB_CCR); -- - ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb); - if (ret) { - dev_err(dev, "can't register interrupt handler irq %d: %d\n", - irq, ret); -- goto err_reset_assert; -+ return ret; - } - -+ ret = sunxi_rsb_init_controller(rsb); -+ if (ret) -+ return ret; -+ - /* initialize all devices on the bus into RSB mode */ - ret = sunxi_rsb_init_device_mode(rsb); - if (ret) -@@ -725,34 +769,43 @@ static int sunxi_rsb_probe(struct platform_device *pdev) - - of_rsb_register_devices(rsb); - -- return 0; -- --err_reset_assert: -- reset_control_assert(rsb->rstc); -- --err_clk_disable: -- clk_disable_unprepare(rsb->clk); -+ pm_suspend_ignore_children(dev, true); -+ pm_runtime_set_autosuspend_delay(dev, 1000); -+ pm_runtime_use_autosuspend(dev); -+ pm_runtime_set_active(dev); -+ pm_runtime_enable(dev); - -- return ret; -+ return 0; - } - - static int sunxi_rsb_remove(struct platform_device *pdev) - { - struct sunxi_rsb *rsb = platform_get_drvdata(pdev); - -+ pm_runtime_get_sync(&pdev->dev); -+ - device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices); -- reset_control_assert(rsb->rstc); -- clk_disable_unprepare(rsb->clk); -+ sunxi_rsb_exit_controller(rsb); -+ -+ pm_runtime_disable(&pdev->dev); -+ pm_runtime_put_noidle(&pdev->dev); - - return 0; - } - -+static const struct of_device_id sunxi_rsb_of_match_table[] = { -+ { .compatible = "allwinner,sun8i-a23-rsb" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table); -+ - static struct platform_driver sunxi_rsb_driver = { - .probe = sunxi_rsb_probe, - .remove = sunxi_rsb_remove, - .driver = { -- .name = RSB_CTRL_NAME, -+ .name = RSB_CTRL_NAME, - .of_match_table = sunxi_rsb_of_match_table, -+ .pm = &sunxi_rsb_dev_pm_ops, - }, - }; - -diff --git a/drivers/clk/clk-conf.c b/drivers/clk/clk-conf.c -index 2ef819606c41..a57d28b0f397 100644 ---- a/drivers/clk/clk-conf.c -+++ b/drivers/clk/clk-conf.c -@@ -11,6 +11,54 @@ - #include - #include - -+#include "clk.h" -+ -+static int __set_clk_flags(struct device_node *node) -+{ -+ struct of_phandle_args clkspec; -+ struct property *prop; -+ int i, index = 0, rc; -+ const __be32 *cur; -+ struct clk *clk; -+ u32 nr_cells; -+ -+ rc = of_property_read_u32(node, "#clock-cells", &nr_cells); -+ if (rc < 0) { -+ pr_err("clk: missing #clock-cells property on %pOF\n", node); -+ return rc; -+ } -+ -+ clkspec.np = node; -+ clkspec.args_count = nr_cells; -+ -+ of_property_for_each_u32(node, "protected-clocks", prop, cur, clkspec.args[0]) { -+ /* read the remainder of the clock specifier */ -+ for (i = 1; i < nr_cells; ++i) { -+ cur = of_prop_next_u32(prop, cur, &clkspec.args[i]); -+ if (!cur) { -+ pr_err("clk: invalid value of protected-clocks" -+ " property at %pOF\n", node); -+ return -EINVAL; -+ } -+ } -+ clk = of_clk_get_from_provider(&clkspec); -+ if (IS_ERR(clk)) { -+ if (PTR_ERR(clk) != -EPROBE_DEFER) -+ pr_err("clk: couldn't get protected clock" -+ " %u for %pOF\n", index, node); -+ return PTR_ERR(clk); -+ } -+ -+ rc = __clk_protect(clk); -+ if (rc < 0) -+ pr_warn("clk: failed to protect %s: %d\n", -+ __clk_get_name(clk), rc); -+ clk_put(clk); -+ index++; -+ } -+ return 0; -+} -+ - static int __set_clk_parents(struct device_node *node, bool clk_supplier) - { - struct of_phandle_args clkspec; -@@ -135,6 +183,12 @@ int of_clk_set_defaults(struct device_node *node, bool clk_supplier) - if (!node) - return 0; - -+ if (clk_supplier) { -+ rc = __set_clk_flags(node); -+ if (rc < 0) -+ return rc; -+ } -+ - rc = __set_clk_parents(node, clk_supplier); - if (rc < 0) - return rc; -diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c -index 8c1d04db990d..9999c1c2dae6 100644 ---- a/drivers/clk/clk.c -+++ b/drivers/clk/clk.c -@@ -4261,6 +4261,37 @@ struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw, - } - EXPORT_SYMBOL_GPL(devm_clk_hw_get_clk); - -+/* -+ * clk-conf helpers -+ */ -+ -+int __clk_protect(struct clk *clk) -+{ -+ struct clk_core *core = clk->core; -+ int ret = 0; -+ -+ clk_prepare_lock(); -+ -+ /* -+ * If CLK_IS_CRITICAL was set in the clock's init data, then -+ * the clock was already prepared/enabled when it was added. -+ */ -+ if (core->flags & CLK_IS_CRITICAL) -+ goto out; -+ -+ core->flags |= CLK_IS_CRITICAL; -+ ret = clk_core_prepare(core); -+ if (ret) -+ goto out; -+ -+ ret = clk_core_enable_lock(core); -+ -+out: -+ clk_prepare_unlock(); -+ -+ return ret; -+} -+ - /* - * clkdev helpers - */ -diff --git a/drivers/clk/clk.h b/drivers/clk/clk.h -index 2d801900cad5..367a0f036b13 100644 ---- a/drivers/clk/clk.h -+++ b/drivers/clk/clk.h -@@ -24,6 +24,7 @@ struct clk_hw *clk_find_hw(const char *dev_id, const char *con_id); - #ifdef CONFIG_COMMON_CLK - struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw, - const char *dev_id, const char *con_id); -+int __clk_protect(struct clk *clk); - void __clk_put(struct clk *clk); - #else - /* All these casts to avoid ifdefs in clkdev... */ -@@ -33,6 +34,7 @@ clk_hw_create_clk(struct device *dev, struct clk_hw *hw, const char *dev_id, - { - return (struct clk *)hw; - } -+static inline int __clk_protect(struct clk *clk) { return 0; } - static inline void __clk_put(struct clk *clk) { } - - #endif -diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c -index 60d2a78d1395..6e150fd32dbe 100644 ---- a/drivers/clk/qcom/common.c -+++ b/drivers/clk/qcom/common.c -@@ -194,22 +194,6 @@ int qcom_cc_register_sleep_clk(struct device *dev) - } - EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk); - --/* Drop 'protected-clocks' from the list of clocks to register */ --static void qcom_cc_drop_protected(struct device *dev, struct qcom_cc *cc) --{ -- struct device_node *np = dev->of_node; -- struct property *prop; -- const __be32 *p; -- u32 i; -- -- of_property_for_each_u32(np, "protected-clocks", prop, p, i) { -- if (i >= cc->num_rclks) -- continue; -- -- cc->rclks[i] = NULL; -- } --} -- - static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec, - void *data) - { -@@ -272,8 +256,6 @@ int qcom_cc_really_probe(struct platform_device *pdev, - cc->rclks = rclks; - cc->num_rclks = num_clks; - -- qcom_cc_drop_protected(dev, cc); -- - for (i = 0; i < num_clk_hws; i++) { - ret = devm_clk_hw_register(dev, clk_hws[i]); - if (ret) -diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c -index 149cfde817cb..52bad5f61434 100644 ---- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c -+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c -@@ -47,15 +47,35 @@ static struct ccu_nkmp pll_cpux_clk = { - * With sigma-delta modulation for fractional-N on the audio PLL, - * we have to use specific dividers. This means the variable divider - * can no longer be used, as the audio codec requests the exact clock -- * rates we support through this mechanism. So we now hard code the -- * variable divider to 1. This means the clock rates will no longer -- * match the clock names. -+ * rates we support through this mechanism. -+ * -+ * For the audio codec to work correctly, pll-audio must be exactly -+ * 22579200 Hz or 24576000 Hz, and pll-audio-4x (1x the base) must be -+ * between 3x and 8x that frequency. For the SRC to work at 96 kHz, -+ * pll-audio-4x must be at least 6x pll-audio. -+ * -+ * For now, hard code the variable divider to 3. - */ - #define SUN50I_A64_PLL_AUDIO_REG 0x008 -+#define SUN50I_A64_PLL_AUDIO_BIAS_REG 0x224 - - static struct ccu_sdm_setting pll_audio_sdm_table[] = { -- { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 }, -- { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 }, -+ /* 24000000 * ( 7 + 0x10d84 / 131072 ) / 8 / 1 - 22579200 == -6.9Hz */ -+ { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 }, -+ /* 24000000 * ( 14 + 0x0ac02 / 131072 ) / 14 / 1 - 24576000 == -2.5Hz */ -+ { .rate = 24576000, .pattern = 0xc000ac08, .m = 14, .n = 14 }, -+ /* 24000000 * ( 8 + 0x0ef35 / 131072 ) / 3 / 3 - 22579200 == 3.3Hz */ -+ { .rate = 67737600, .pattern = 0xc000ef35, .m = 3, .n = 8 }, -+ /* 24000000 * ( 15 + 0x0b852 / 131072 ) / 5 / 3 - 24576000 == 1.0Hz */ -+ { .rate = 73728000, .pattern = 0xc000b852, .m = 5, .n = 15 }, -+ /* 24000000 * ( 7 + 0x10d84 / 131072 ) / 2 / 4 - 22579200 == -6.9Hz */ -+ { .rate = 90316800, .pattern = 0xc0010d84, .m = 2, .n = 7 }, -+ /* 24000000 * ( 16 + 0x0c49c / 131072 ) / 4 / 4 - 24576000 == 4.0Hz */ -+ { .rate = 98304000, .pattern = 0xc000c49c, .m = 4, .n = 16 }, -+ /* 24000000 * ( 5 + 0x14a23 / 131072 ) / 1 / 6 - 22579200 == -6.9Hz */ -+ { .rate = 135475200, .pattern = 0xc0014a23, .m = 1, .n = 5 }, -+ /* 24000000 * ( 12 + 0x09375 / 131072 ) / 2 / 6 - 24576000 == 4.0Hz */ -+ { .rate = 147456000, .pattern = 0xc0009375, .m = 2, .n = 12 }, - }; - - static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base", -@@ -528,8 +548,18 @@ static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", de_parents, - 0x104, 0, 4, 24, 3, BIT(31), - CLK_SET_RATE_PARENT); - --static const char * const tcon0_parents[] = { "pll-mipi", "pll-video0-2x" }; --static const u8 tcon0_table[] = { 0, 2, }; -+#define SUN50I_A64_TCON0_REG 0x118 -+ -+/* -+ * When using PLL-Video0 as the parent of tcon0 clock, tcon0 clock will -+ * conflict with HDMI PHY clock (also a child of PLL-Video0) which is on -+ * another display pipeline. Force tcon0 to use PLL-MIPI as parent here -+ * to prevent this. As the parent of PLL-MIPI is still PLL-Video0, a notifier -+ * is required to restore the rate of TCON0 when the rate of PLL-Video0 -+ * changed. -+ */ -+static const char * const tcon0_parents[] = { "pll-mipi", /* "pll-video0-2x" */ }; -+static const u8 tcon0_table[] = { 0, /* 2, */ }; - static SUNXI_CCU_MUX_TABLE_WITH_GATE(tcon0_clk, "tcon0", tcon0_parents, - tcon0_table, 0x118, 24, 3, BIT(31), - CLK_SET_RATE_PARENT); -@@ -604,10 +634,10 @@ static const struct clk_hw *clk_parent_pll_audio[] = { - &pll_audio_base_clk.common.hw - }; - --/* We hardcode the divider to 1 for now */ -+/* We hardcode the divider to 3 for now */ - static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio", - clk_parent_pll_audio, -- 1, 1, CLK_SET_RATE_PARENT); -+ 3, 1, CLK_SET_RATE_PARENT); - static CLK_FIXED_FACTOR_HWS(pll_audio_2x_clk, "pll-audio-2x", - clk_parent_pll_audio, - 2, 1, CLK_SET_RATE_PARENT); -@@ -936,6 +966,12 @@ static struct ccu_mux_nb sun50i_a64_cpu_nb = { - .bypass_index = 1, /* index of 24 MHz oscillator */ - }; - -+static struct ccu_rate_reset_nb sun50i_a64_pll_video0_reset_tcon0_nb = { -+ .common = &pll_video0_clk.common, -+}; -+ -+#define CCU_MIPI_DSI_CLK 0x168 -+ - static int sun50i_a64_ccu_probe(struct platform_device *pdev) - { - struct resource *res; -@@ -948,12 +984,29 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev) - if (IS_ERR(reg)) - return PTR_ERR(reg); - -- /* Force the PLL-Audio-1x divider to 1 */ -+ /* Force the pll-audio variable divider to 3 */ - val = readl(reg + SUN50I_A64_PLL_AUDIO_REG); - val &= ~GENMASK(19, 16); -- writel(val | (0 << 16), reg + SUN50I_A64_PLL_AUDIO_REG); -+ writel(val | (2 << 16), reg + SUN50I_A64_PLL_AUDIO_REG); -+ -+ /* Decrease the PLL AUDIO bias current to reduce noise. */ -+ writel(0x10040000, reg + SUN50I_A64_PLL_AUDIO_BIAS_REG); - -- writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG); -+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &val); -+ if (ret) { -+ writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG); -+ -+ /* Set MIPI-DSI clock parent to periph0(1x), so that video0(1x) is free to change. */ -+ val = readl(reg + CCU_MIPI_DSI_CLK); -+ val &= 0x30f; -+ val |= (2 << 8) | ((4 - 1) << 0); /* M-1 */ -+ writel(val, reg + CCU_MIPI_DSI_CLK); -+ } -+ -+ /* Force the parent of TCON0 to PLL-MIPI */ -+ val = readl(reg + SUN50I_A64_TCON0_REG); -+ val &= ~GENMASK(26, 24); -+ writel(val | (0 << 24), reg + SUN50I_A64_TCON0_REG); - - ret = sunxi_ccu_probe(pdev->dev.of_node, reg, &sun50i_a64_ccu_desc); - if (ret) -@@ -966,6 +1019,10 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev) - ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk, - &sun50i_a64_cpu_nb); - -+ /* Reset the rate of TCON0 clock when PLL-VIDEO0 is changed */ -+ sun50i_a64_pll_video0_reset_tcon0_nb.target_clk = tcon0_clk.common.hw.clk; -+ ccu_rate_reset_notifier_register(&sun50i_a64_pll_video0_reset_tcon0_nb); -+ - return 0; - } - -diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c -index 7e629a4493af..9d461deb13f8 100644 ---- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c -+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c -@@ -23,15 +23,21 @@ - - #include "ccu-sun8i-h3.h" - --static SUNXI_CCU_NKMP_WITH_GATE_LOCK(pll_cpux_clk, "pll-cpux", -- "osc24M", 0x000, -- 8, 5, /* N */ -- 4, 2, /* K */ -- 0, 2, /* M */ -- 16, 2, /* P */ -- BIT(31), /* gate */ -- BIT(28), /* lock */ -- CLK_SET_RATE_UNGATE); -+static struct ccu_nkmp pll_cpux_clk = { -+ .enable = BIT(31), -+ .lock = BIT(28), -+ .n = _SUNXI_CCU_MULT(8, 5), -+ .k = _SUNXI_CCU_MULT(4, 2), -+ .m = _SUNXI_CCU_DIV_MAX(0, 2, 1), -+ .p = _SUNXI_CCU_DIV_MAX(16, 2, 1), -+ .common = { -+ .reg = 0x000, -+ .hw.init = CLK_HW_INIT("pll-cpux", -+ "osc24M", -+ &ccu_nkmp_ops, -+ CLK_SET_RATE_UNGATE), -+ }, -+}; - - /* - * The Audio PLL is supposed to have 4 outputs: 3 fixed factors from -@@ -1123,20 +1129,6 @@ static const struct sunxi_ccu_desc sun50i_h5_ccu_desc = { - .num_resets = ARRAY_SIZE(sun50i_h5_ccu_resets), - }; - --static struct ccu_pll_nb sun8i_h3_pll_cpu_nb = { -- .common = &pll_cpux_clk.common, -- /* copy from pll_cpux_clk */ -- .enable = BIT(31), -- .lock = BIT(28), --}; -- --static struct ccu_mux_nb sun8i_h3_cpu_nb = { -- .common = &cpux_clk.common, -- .cm = &cpux_clk.mux, -- .delay_us = 1, /* > 8 clock cycles at 24 MHz */ -- .bypass_index = 1, /* index of 24 MHz oscillator */ --}; -- - static void __init sunxi_h3_h5_ccu_init(struct device_node *node, - const struct sunxi_ccu_desc *desc) - { -@@ -1155,13 +1147,6 @@ static void __init sunxi_h3_h5_ccu_init(struct device_node *node, - writel(val | (0 << 16), reg + SUN8I_H3_PLL_AUDIO_REG); - - sunxi_ccu_probe(node, reg, desc); -- -- /* Gate then ungate PLL CPU after any rate changes */ -- ccu_pll_notifier_register(&sun8i_h3_pll_cpu_nb); -- -- /* Reparent CPU during PLL CPU rate changes */ -- ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk, -- &sun8i_h3_cpu_nb); - } - - static void __init sun8i_h3_ccu_setup(struct device_node *node) -diff --git a/drivers/clk/sunxi-ng/ccu_common.c b/drivers/clk/sunxi-ng/ccu_common.c -index 2e20e650b6c0..c33d2de4569d 100644 ---- a/drivers/clk/sunxi-ng/ccu_common.c -+++ b/drivers/clk/sunxi-ng/ccu_common.c -@@ -79,6 +79,28 @@ int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb) - &pll_nb->clk_nb); - } - -+static int ccu_rate_reset_notifier_cb(struct notifier_block *nb, -+ unsigned long event, void *data) -+{ -+ struct ccu_rate_reset_nb *rate_reset = to_ccu_rate_reset_nb(nb); -+ -+ if (event == PRE_RATE_CHANGE) { -+ rate_reset->saved_rate = clk_get_rate(rate_reset->target_clk); -+ } else if (event == POST_RATE_CHANGE) { -+ clk_set_rate(rate_reset->target_clk, rate_reset->saved_rate); -+ } -+ -+ return NOTIFY_DONE; -+} -+ -+int ccu_rate_reset_notifier_register(struct ccu_rate_reset_nb *rate_reset_nb) -+{ -+ rate_reset_nb->clk_nb.notifier_call = ccu_rate_reset_notifier_cb; -+ -+ return clk_notifier_register(rate_reset_nb->common->hw.clk, -+ &rate_reset_nb->clk_nb); -+} -+ - int sunxi_ccu_probe(struct device_node *node, void __iomem *reg, - const struct sunxi_ccu_desc *desc) - { -diff --git a/drivers/clk/sunxi-ng/ccu_common.h b/drivers/clk/sunxi-ng/ccu_common.h -index 04e7a12200a2..09a468c2ab9b 100644 ---- a/drivers/clk/sunxi-ng/ccu_common.h -+++ b/drivers/clk/sunxi-ng/ccu_common.h -@@ -63,6 +63,18 @@ struct ccu_pll_nb { - - int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb); - -+struct ccu_rate_reset_nb { -+ struct notifier_block clk_nb; -+ struct ccu_common *common; -+ -+ struct clk *target_clk; -+ unsigned long saved_rate; -+}; -+ -+#define to_ccu_rate_reset_nb(_nb) container_of(_nb, struct ccu_rate_reset_nb, clk_nb) -+ -+int ccu_rate_reset_notifier_register(struct ccu_rate_reset_nb *rate_reset_nb); -+ - int sunxi_ccu_probe(struct device_node *node, void __iomem *reg, - const struct sunxi_ccu_desc *desc); - -diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c -index 2deed8d8773f..d1a77eb1e6b5 100644 ---- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c -+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c -@@ -102,6 +102,7 @@ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) - return ret; - - snprintf(name, MAX_NAME_LEN, "speed%d", speed); -+ pr_info("Using CPU speed bin %s\n", name); - - for_each_possible_cpu(cpu) { - struct device *cpu_dev = get_cpu_device(cpu); -diff --git a/drivers/firmware/arm_scpi.c b/drivers/firmware/arm_scpi.c -index d0dee37ad522..ceea3c7546e5 100644 ---- a/drivers/firmware/arm_scpi.c -+++ b/drivers/firmware/arm_scpi.c -@@ -184,6 +184,7 @@ enum scpi_drv_cmds { - CMD_SENSOR_VALUE, - CMD_SET_DEVICE_PWR_STATE, - CMD_GET_DEVICE_PWR_STATE, -+ CMD_SET_SYS_PWR_STATE, - CMD_MAX_COUNT, - }; - -@@ -200,6 +201,7 @@ static int scpi_std_commands[CMD_MAX_COUNT] = { - SCPI_CMD_SENSOR_VALUE, - SCPI_CMD_SET_DEVICE_PWR_STATE, - SCPI_CMD_GET_DEVICE_PWR_STATE, -+ SCPI_CMD_SET_SYS_PWR_STATE, - }; - - static int scpi_legacy_commands[CMD_MAX_COUNT] = { -@@ -215,6 +217,7 @@ static int scpi_legacy_commands[CMD_MAX_COUNT] = { - LEGACY_SCPI_CMD_SENSOR_VALUE, - -1, /* SET_DEVICE_PWR_STATE */ - -1, /* GET_DEVICE_PWR_STATE */ -+ LEGACY_SCPI_CMD_SYS_PWR_STATE, - }; - - struct scpi_xfer { -@@ -231,7 +234,8 @@ struct scpi_xfer { - - struct scpi_chan { - struct mbox_client cl; -- struct mbox_chan *chan; -+ struct mbox_chan *rx_chan; -+ struct mbox_chan *tx_chan; - void __iomem *tx_payload; - void __iomem *rx_payload; - struct list_head rx_pending; -@@ -505,7 +509,7 @@ static int scpi_send_message(u8 idx, void *tx_buf, unsigned int tx_len, - msg->rx_len = rx_len; - reinit_completion(&msg->done); - -- ret = mbox_send_message(scpi_chan->chan, msg); -+ ret = mbox_send_message(scpi_chan->tx_chan, msg); - if (ret < 0 || !rx_buf) - goto out; - -@@ -777,6 +781,12 @@ static int scpi_device_set_power_state(u16 dev_id, u8 pstate) - sizeof(dev_set), &stat, sizeof(stat)); - } - -+static int scpi_sys_set_power_state(u8 pstate) -+{ -+ return scpi_send_message(CMD_SET_SYS_PWR_STATE, &pstate, -+ sizeof(pstate), NULL, 0); -+} -+ - static struct scpi_ops scpi_ops = { - .get_version = scpi_get_version, - .clk_get_range = scpi_clk_get_range, -@@ -793,6 +803,7 @@ static struct scpi_ops scpi_ops = { - .sensor_get_value = scpi_sensor_get_value, - .device_get_power_state = scpi_device_get_power_state, - .device_set_power_state = scpi_device_set_power_state, -+ .sys_set_power_state = scpi_sys_set_power_state, - }; - - struct scpi_ops *get_scpi_ops(void) -@@ -854,8 +865,13 @@ static void scpi_free_channels(void *data) - struct scpi_drvinfo *info = data; - int i; - -- for (i = 0; i < info->num_chans; i++) -- mbox_free_channel(info->channels[i].chan); -+ for (i = 0; i < info->num_chans; i++) { -+ struct scpi_chan *pchan = &info->channels[i]; -+ -+ if (pchan->tx_chan != pchan->rx_chan) -+ mbox_free_channel(pchan->tx_chan); -+ mbox_free_channel(pchan->rx_chan); -+ } - } - - static int scpi_remove(struct platform_device *pdev) -@@ -903,6 +919,7 @@ static int scpi_probe(struct platform_device *pdev) - struct resource res; - struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; -+ bool use_mbox_names = false; - - scpi_info = devm_kzalloc(dev, sizeof(*scpi_info), GFP_KERNEL); - if (!scpi_info) -@@ -916,6 +933,14 @@ static int scpi_probe(struct platform_device *pdev) - dev_err(dev, "no mboxes property in '%pOF'\n", np); - return -ENODEV; - } -+ if (of_get_property(dev->of_node, "mbox-names", NULL)) { -+ use_mbox_names = true; -+ if (count != 2) { -+ dev_err(dev, "need exactly 2 mboxes with mbox-names\n"); -+ return -ENODEV; -+ } -+ count /= 2; -+ } - - scpi_info->channels = devm_kcalloc(dev, count, sizeof(struct scpi_chan), - GFP_KERNEL); -@@ -961,15 +986,34 @@ static int scpi_probe(struct platform_device *pdev) - mutex_init(&pchan->xfers_lock); - - ret = scpi_alloc_xfer_list(dev, pchan); -- if (!ret) { -- pchan->chan = mbox_request_channel(cl, idx); -- if (!IS_ERR(pchan->chan)) -- continue; -- ret = PTR_ERR(pchan->chan); -- if (ret != -EPROBE_DEFER) -- dev_err(dev, "failed to get channel%d err %d\n", -- idx, ret); -+ if (ret) -+ return ret; -+ -+ if (use_mbox_names) { -+ pchan->rx_chan = mbox_request_channel_byname(cl, "rx"); -+ if (IS_ERR(pchan->rx_chan)) { -+ ret = PTR_ERR(pchan->rx_chan); -+ goto fail; -+ } -+ pchan->tx_chan = mbox_request_channel_byname(cl, "tx"); -+ if (IS_ERR(pchan->rx_chan)) { -+ ret = PTR_ERR(pchan->tx_chan); -+ goto fail; -+ } -+ } else { -+ pchan->rx_chan = mbox_request_channel(cl, idx); -+ if (IS_ERR(pchan->rx_chan)) { -+ ret = PTR_ERR(pchan->rx_chan); -+ goto fail; -+ } -+ pchan->tx_chan = pchan->rx_chan; - } -+ continue; -+ -+fail: -+ if (ret != -EPROBE_DEFER) -+ dev_err(dev, "failed to get channel%d err %d\n", -+ idx, ret); - return ret; - } - -@@ -988,12 +1032,13 @@ static int scpi_probe(struct platform_device *pdev) - scpi_info->cmd_priority); - } - -+ /* - ret = scpi_init_versions(scpi_info); - if (ret) { - dev_err(dev, "incorrect or no SCP firmware found\n"); - return ret; - } -- -+ */ - if (scpi_info->is_legacy && !scpi_info->protocol_version && - !scpi_info->firmware_version) - dev_info(dev, "SCP Protocol legacy pre-1.0 firmware\n"); -diff --git a/drivers/gnss/ubx.c b/drivers/gnss/ubx.c -index 7b05bc40532e..9419836de2ea 100644 ---- a/drivers/gnss/ubx.c -+++ b/drivers/gnss/ubx.c -@@ -33,11 +33,45 @@ static int ubx_set_active(struct gnss_serial *gserial) - return 0; - } - -+// RXM-PMREQ -+static const u8 ubx_suspend_packet[] = { -+ 0xb5, 0x62, // 'ub' -+ 0x02, 0x41, // message class and id -+ 0x08, 0x00, // message length -+ 0x00, 0x00, 0x00, 0x00, // duration (0 == infinite) -+ 0x02, 0x00, 0x00, 0x00, // flags (backup) -+ 0x4d, 0x3b, // checksum -+}; -+ - static int ubx_set_standby(struct gnss_serial *gserial) - { - struct ubx_data *data = gnss_serial_get_drvdata(gserial); -+ struct serdev_device *serdev = gserial->serdev; - int ret; - -+#if 0 -+ // we can't know what state the device is in, so first make sure -+ // it's woken up by writing a zero byte to it and then suspend it -+ // for sure -+ -+ ret = serdev_device_write(serdev, "", 1, MAX_SCHEDULE_TIMEOUT); -+ if (ret < 0) -+ return ret; -+ -+ serdev_device_wait_until_sent(serdev, 0); -+ -+ // wait for wakeup -+ mdelay(100); -+ -+ ret = serdev_device_write(serdev, ubx_suspend_packet, -+ sizeof(ubx_suspend_packet), -+ MAX_SCHEDULE_TIMEOUT); -+ if (ret < 0 || ret < sizeof(ubx_suspend_packet)) -+ return ret; -+ -+ serdev_device_wait_until_sent(serdev, 0); -+#endif -+ - ret = regulator_disable(data->vcc); - if (ret) - return ret; -diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c -index e82db0f4e771..87ec4d2d9199 100644 ---- a/drivers/gpu/drm/drm_fb_helper.c -+++ b/drivers/gpu/drm/drm_fb_helper.c -@@ -2306,6 +2306,7 @@ static int drm_fb_helper_generic_probe(struct drm_fb_helper *fb_helper, - struct fb_info *fbi; - u32 format; - struct dma_buf_map map; -+ u32 fb_start; - int ret; - - drm_dbg_kms(dev, "surface width(%d), height(%d) and bpp(%d)\n", -@@ -2361,6 +2362,19 @@ static int drm_fb_helper_generic_probe(struct drm_fb_helper *fb_helper, - fbi->fix.smem_start = - page_to_phys(virt_to_page(fbi->screen_buffer)); - #endif -+ -+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start); -+ if (ret == 0 && !map.is_iomem) { -+ // copy framebuffer contents from p-boot if reasonable -+ if (fbi->screen_size != 720 * 1440 * 4) { -+ drm_err(dev, "surface width(%d), height(%d) and bpp(%d) does not match p-boot requirements\n", -+ sizes->surface_width, sizes->surface_height, -+ sizes->surface_bpp); -+ return 0; -+ } -+ -+ memcpy(map.vaddr, __va(fb_start), fbi->screen_size); -+ } - } - - return 0; -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index 7b8d7178d09a..e71c682cc579 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -79,16 +79,27 @@ static int lima_ioctl_gem_create(struct drm_device *dev, void *data, struct drm_ - { - struct drm_lima_gem_create *args = data; - -- if (args->pad) -- return -EINVAL; -- -- if (args->flags & ~(LIMA_BO_FLAG_HEAP)) -+ if (args->flags & ~(LIMA_BO_FLAG_HEAP | LIMA_BO_FLAG_FORCE_VA)) - return -EINVAL; - - if (args->size == 0) - return -EINVAL; - -- return lima_gem_create_handle(dev, file, args->size, args->flags, &args->handle); -+ if (args->flags & LIMA_BO_FLAG_FORCE_VA) { -+ u64 max = (u64)args->va + (u64)args->size; -+ -+ if (max > LIMA_VA_RESERVE_START) -+ return -EINVAL; -+ -+ if (!IS_ALIGNED(args->va, PAGE_SIZE)) -+ return -EINVAL; -+ } else { -+ if (args->va) -+ return -EINVAL; -+ } -+ -+ return lima_gem_create_handle(dev, file, args->size, args->flags, -+ &args->handle, args->va); - } - - static int lima_ioctl_gem_info(struct drm_device *dev, void *data, struct drm_file *file) -@@ -259,6 +270,7 @@ DEFINE_DRM_GEM_FOPS(lima_drm_driver_fops); - * Changelog: - * - * - 1.1.0 - add heap buffer support -+ * - 1.2.0 - add force va support - */ - - static const struct drm_driver lima_drm_driver = { -@@ -270,9 +282,9 @@ static const struct drm_driver lima_drm_driver = { - .fops = &lima_drm_driver_fops, - .name = "lima", - .desc = "lima DRM", -- .date = "20191231", -+ .date = "20200215", - .major = 1, -- .minor = 1, -+ .minor = 2, - .patchlevel = 0, - - .gem_create_object = lima_gem_create_object, -diff --git a/drivers/gpu/drm/lima/lima_gem.c b/drivers/gpu/drm/lima/lima_gem.c -index de62966243cd..9d8eb679c2c7 100644 ---- a/drivers/gpu/drm/lima/lima_gem.c -+++ b/drivers/gpu/drm/lima/lima_gem.c -@@ -100,7 +100,7 @@ int lima_heap_alloc(struct lima_bo *bo, struct lima_vm *vm) - } - - int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, -- u32 size, u32 flags, u32 *handle) -+ u32 size, u32 flags, u32 *handle, u32 va) - { - int err; - gfp_t mask; -@@ -121,8 +121,11 @@ int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, - mask |= __GFP_DMA32; - mapping_set_gfp_mask(obj->filp->f_mapping, mask); - -+ bo = to_lima_bo(obj); -+ bo->flags = flags; -+ bo->force_va = va; -+ - if (is_heap) { -- bo = to_lima_bo(obj); - err = lima_heap_alloc(bo, NULL); - if (err) - goto out; -diff --git a/drivers/gpu/drm/lima/lima_gem.h b/drivers/gpu/drm/lima/lima_gem.h -index ccea06142f4b..2a6db0c0be89 100644 ---- a/drivers/gpu/drm/lima/lima_gem.h -+++ b/drivers/gpu/drm/lima/lima_gem.h -@@ -15,6 +15,8 @@ struct lima_bo { - struct mutex lock; - struct list_head va; - -+ u32 flags; -+ u32 force_va; - size_t heap_size; - }; - -@@ -37,7 +39,7 @@ static inline struct dma_resv *lima_bo_resv(struct lima_bo *bo) - int lima_heap_alloc(struct lima_bo *bo, struct lima_vm *vm); - struct drm_gem_object *lima_gem_create_object(struct drm_device *dev, size_t size); - int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, -- u32 size, u32 flags, u32 *handle); -+ u32 size, u32 flags, u32 *handle, u32 va); - int lima_gem_get_info(struct drm_file *file, u32 handle, u32 *va, u64 *offset); - int lima_gem_submit(struct drm_file *file, struct lima_submit *submit); - int lima_gem_wait(struct drm_file *file, u32 handle, u32 op, s64 timeout_ns); -diff --git a/drivers/gpu/drm/lima/lima_vm.c b/drivers/gpu/drm/lima/lima_vm.c -index 2b2739adc7f5..5554c2548d9c 100644 ---- a/drivers/gpu/drm/lima/lima_vm.c -+++ b/drivers/gpu/drm/lima/lima_vm.c -@@ -3,6 +3,7 @@ - - #include - #include -+#include - - #include "lima_device.h" - #include "lima_vm.h" -@@ -93,6 +94,7 @@ int lima_vm_bo_add(struct lima_vm *vm, struct lima_bo *bo, bool create) - struct lima_bo_va *bo_va; - struct sg_dma_page_iter sg_iter; - int offset = 0, err; -+ u64 start, end; - - mutex_lock(&bo->lock); - -@@ -120,7 +122,16 @@ int lima_vm_bo_add(struct lima_vm *vm, struct lima_bo *bo, bool create) - - mutex_lock(&vm->lock); - -- err = drm_mm_insert_node(&vm->mm, &bo_va->node, lima_bo_size(bo)); -+ if (bo->flags & LIMA_BO_FLAG_FORCE_VA) { -+ start = bo->force_va; -+ end = start + lima_bo_size(bo); -+ } else { -+ start = 0; -+ end = U64_MAX; -+ } -+ -+ err = drm_mm_insert_node_in_range(&vm->mm, &bo_va->node, lima_bo_size(bo), -+ 0, 0, start, end, 0); - if (err) - goto err_out1; - -diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c -index 0145129d7c66..534dd7414d42 100644 ---- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c -+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c -@@ -590,14 +590,14 @@ static const struct drm_display_mode k101_im2byl02_default_mode = { - .clock = 69700, - - .hdisplay = 800, -- .hsync_start = 800 + 6, -- .hsync_end = 800 + 6 + 15, -- .htotal = 800 + 6 + 15 + 16, -+ .hsync_start = 800 + 52, -+ .hsync_end = 800 + 52 + 8, -+ .htotal = 800 + 52 + 8 + 48, - - .vdisplay = 1280, -- .vsync_start = 1280 + 8, -- .vsync_end = 1280 + 8 + 48, -- .vtotal = 1280 + 8 + 48 + 52, -+ .vsync_start = 1280 + 16, -+ .vsync_end = 1280 + 16 + 6, -+ .vtotal = 1280 + 16 + 6 + 15, - - .width_mm = 135, - .height_mm = 217, -diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c -index b30510b1696a..45357e6a7da0 100644 ---- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c -+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c -@@ -58,6 +58,7 @@ struct st7703 { - - struct dentry *debugfs; - const struct st7703_panel_desc *desc; -+ bool hw_preenabled; - }; - - struct st7703_panel_desc { -@@ -290,7 +291,6 @@ static int xbd599_init_sequence(struct st7703 *ctx) - dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, - 0x07, /* VREF_SEL = 4.2V */ - 0x07 /* NVREF_SEL = 4.2V */); -- msleep(20); - - dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, - 0x2C, /* VCOMDC_F = -0.67V */ -@@ -334,14 +334,14 @@ static int xbd599_init_sequence(struct st7703 *ctx) - - static const struct drm_display_mode xbd599_mode = { - .hdisplay = 720, -- .hsync_start = 720 + 40, -- .hsync_end = 720 + 40 + 40, -- .htotal = 720 + 40 + 40 + 40, -+ .hsync_start = 720 + 30, -+ .hsync_end = 720 + 30 + 28, -+ .htotal = 720 + 30 + 28 + 30, - .vdisplay = 1440, - .vsync_start = 1440 + 18, - .vsync_end = 1440 + 18 + 10, - .vtotal = 1440 + 18 + 10 + 17, -- .clock = 69000, -+ .clock = 72000, - .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, - .width_mm = 68, - .height_mm = 136, -@@ -361,22 +361,25 @@ static int st7703_enable(struct drm_panel *panel) - struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); - int ret; - -+ if (ctx->hw_preenabled) { -+ ctx->hw_preenabled = false; -+ return 0; -+ } -+ - ret = ctx->desc->init_sequence(ctx); - if (ret < 0) { - dev_err(ctx->dev, "Panel init sequence failed: %d\n", ret); - return ret; - } - -- msleep(20); -- - ret = mipi_dsi_dcs_exit_sleep_mode(dsi); - if (ret < 0) { - dev_err(ctx->dev, "Failed to exit sleep mode: %d\n", ret); - return ret; - } - -- /* Panel is operational 120 msec after reset */ -- msleep(60); -+ /* Dsiplay on can be issued 120 msec after sleep out */ -+ msleep(120); - - ret = mipi_dsi_dcs_set_display_on(dsi); - if (ret) -@@ -427,30 +430,35 @@ static int st7703_prepare(struct drm_panel *panel) - if (ctx->prepared) - return 0; - -+ if (!ctx->hw_preenabled) { - dev_dbg(ctx->dev, "Resetting the panel\n"); -- ret = regulator_enable(ctx->vcc); -- if (ret < 0) { -- dev_err(ctx->dev, "Failed to enable vcc supply: %d\n", ret); -- return ret; -+ gpiod_set_value_cansleep(ctx->reset_gpio, 1); - } -+ - ret = regulator_enable(ctx->iovcc); - if (ret < 0) { - dev_err(ctx->dev, "Failed to enable iovcc supply: %d\n", ret); -- goto disable_vcc; -+ return ret; - } - -- gpiod_set_value_cansleep(ctx->reset_gpio, 1); -- usleep_range(20, 40); -+ ret = regulator_enable(ctx->vcc); -+ if (ret < 0) { -+ dev_err(ctx->dev, "Failed to enable vcc supply: %d\n", ret); -+ regulator_disable(ctx->iovcc); -+ return ret; -+ } -+ -+ /* Give power supplies time to stabilize before deasserting reset. */ -+ if (!ctx->hw_preenabled) { -+ usleep_range(10000, 20000); -+ - gpiod_set_value_cansleep(ctx->reset_gpio, 0); -- msleep(20); -+ usleep_range(15000, 20000); -+ } - - ctx->prepared = true; - - return 0; -- --disable_vcc: -- regulator_disable(ctx->vcc); -- return ret; - } - - static int st7703_get_modes(struct drm_panel *panel, -@@ -523,12 +531,19 @@ static int st7703_probe(struct mipi_dsi_device *dsi) - { - struct device *dev = &dsi->dev; - struct st7703 *ctx; -+ u32 fb_start; - int ret; - - ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); - if (!ctx) - return -ENOMEM; - -+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start); -+ if (ret == 0) { -+ /* the display pipeline is already initialized by p-boot */ -+ ctx->hw_preenabled = true; -+ } -+ - ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); - if (IS_ERR(ctx->reset_gpio)) { - dev_err(dev, "cannot get reset gpio\n"); -@@ -570,7 +585,7 @@ static int st7703_probe(struct mipi_dsi_device *dsi) - - ret = mipi_dsi_attach(dsi); - if (ret < 0) { -- dev_err(dev, "mipi_dsi_attach failed (%d). Is host ready?\n", ret); -+ dev_err_probe(dev, ret, "mipi_dsi_attach failed\n"); - drm_panel_remove(&ctx->panel); - return ret; - } -diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c b/drivers/gpu/drm/sun4i/sun4i_crtc.c -index 45d9eb552d86..9e8b05b2c16b 100644 ---- a/drivers/gpu/drm/sun4i/sun4i_crtc.c -+++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c -@@ -103,6 +103,20 @@ static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc, - drm_crtc_send_vblank_event(crtc, event); - spin_unlock_irq(&crtc->dev->event_lock); - } -+ -+ if (crtc->state->color_mgmt_changed) { -+ if (crtc->state->gamma_lut) { -+ /* LUT can be only updated when gamma correction is -+ * disabled -+ */ -+ sun4i_tcon_enable_gamma(scrtc->tcon, false); -+ sun4i_tcon_load_gamma_lut(scrtc->tcon, -+ crtc->state->gamma_lut->data); -+ sun4i_tcon_enable_gamma(scrtc->tcon, true); -+ } else -+ sun4i_tcon_enable_gamma(scrtc->tcon, false); -+ } -+ - } - - static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc, -@@ -186,6 +200,7 @@ static const struct drm_crtc_funcs sun4i_crtc_funcs = { - .set_config = drm_atomic_helper_set_config, - .enable_vblank = sun4i_crtc_enable_vblank, - .disable_vblank = sun4i_crtc_disable_vblank, -+ .gamma_set = drm_atomic_helper_legacy_gamma_set, - }; - - struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm, -diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c -index 9f06dec0fc61..5e751b80e5e6 100644 ---- a/drivers/gpu/drm/sun4i/sun4i_tcon.c -+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c -@@ -39,6 +39,8 @@ - #include "sun8i_tcon_top.h" - #include "sunxi_engine.h" - -+static bool hw_preconfigured; -+ - static struct drm_connector *sun4i_tcon_get_connector(const struct drm_encoder *encoder) - { - struct drm_connector *connector; -@@ -107,9 +109,11 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel, - - if (enabled) { - clk_prepare_enable(clk); -- clk_rate_exclusive_get(clk); -+ if (!tcon->quirks->clk_kept_by_ccu) -+ clk_rate_exclusive_get(clk); - } else { -- clk_rate_exclusive_put(clk); -+ if (!tcon->quirks->clk_kept_by_ccu) -+ clk_rate_exclusive_put(clk); - clk_disable_unprepare(clk); - } - } -@@ -239,6 +243,34 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable) - } - EXPORT_SYMBOL(sun4i_tcon_enable_vblank); - -+void sun4i_tcon_load_gamma_lut(struct sun4i_tcon *tcon, -+ struct drm_color_lut *lut) -+{ -+ int i; -+ -+ for (i = 0; i < SUN4I_TCON_GAMMA_LUT_SIZE; i++) { -+ u32 r, g, b; -+ -+ r = drm_color_lut_extract(lut[i].red, 8); -+ g = drm_color_lut_extract(lut[i].green, 8); -+ b = drm_color_lut_extract(lut[i].blue, 8); -+ -+ regmap_write(tcon->regs, SUN4I_TCON_GAMMA_TABLE_REG + 4 * i, -+ SUN4I_TCON_GAMMA_TABLE_R(r) | -+ SUN4I_TCON_GAMMA_TABLE_G(g) | -+ SUN4I_TCON_GAMMA_TABLE_B(b)); -+ } -+} -+EXPORT_SYMBOL(sun4i_tcon_load_gamma_lut); -+ -+void sun4i_tcon_enable_gamma(struct sun4i_tcon *tcon, bool enable) -+{ -+ regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG, -+ SUN4I_TCON_GCTL_GAMMA_ENABLE, -+ enable ? SUN4I_TCON_GCTL_GAMMA_ENABLE : 0); -+} -+EXPORT_SYMBOL(sun4i_tcon_enable_gamma); -+ - /* - * This function is a helper for TCON output muxing. The TCON output - * muxing control register in earlier SoCs (without the TCON TOP block) -@@ -290,18 +322,6 @@ static int sun4i_tcon_get_clk_delay(const struct drm_display_mode *mode, - return delay; - } - --static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon, -- const struct drm_display_mode *mode) --{ -- /* Configure the dot clock */ -- clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); -- -- /* Set the resolution */ -- regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG, -- SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) | -- SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay)); --} -- - static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon, - const struct drm_connector *connector) - { -@@ -364,12 +384,18 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon, - u8 bpp = mipi_dsi_pixel_format_to_bpp(device->format); - u8 lanes = device->lanes; - u32 block_space, start_delay; -- u32 tcon_div; - - tcon->dclk_min_div = SUN6I_DSI_TCON_DIV; - tcon->dclk_max_div = SUN6I_DSI_TCON_DIV; - -- sun4i_tcon0_mode_set_common(tcon, mode); -+ /* Configure the dot clock */ -+ clk_set_rate(tcon->dclk, mode->crtc_clock * 1000 -+ * bpp / (lanes * SUN6I_DSI_TCON_DIV)); -+ -+ /* Set the resolution */ -+ regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG, -+ SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) | -+ SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay)); - - /* Set dithering if needed */ - sun4i_tcon0_mode_set_dithering(tcon, sun4i_tcon_get_connector(encoder)); -@@ -393,9 +419,7 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon, - * The datasheet says that this should be set higher than 20 * - * pixel cycle, but it's not clear what a pixel cycle is. - */ -- regmap_read(tcon->regs, SUN4I_TCON0_DCLK_REG, &tcon_div); -- tcon_div &= GENMASK(6, 0); -- block_space = mode->htotal * bpp / (tcon_div * lanes); -+ block_space = mode->htotal * bpp / (SUN6I_DSI_TCON_DIV * lanes); - block_space -= mode->hdisplay + 40; - - regmap_write(tcon->regs, SUN4I_TCON0_CPU_TRI0_REG, -@@ -437,7 +461,14 @@ static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon, - - tcon->dclk_min_div = 7; - tcon->dclk_max_div = 7; -- sun4i_tcon0_mode_set_common(tcon, mode); -+ -+ /* Configure the dot clock */ -+ clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); -+ -+ /* Set the resolution */ -+ regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG, -+ SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) | -+ SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay)); - - /* Set dithering if needed */ - sun4i_tcon0_mode_set_dithering(tcon, sun4i_tcon_get_connector(encoder)); -@@ -474,7 +505,9 @@ static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon, - SUN4I_TCON0_BASIC2_V_TOTAL(mode->crtc_vtotal * 2) | - SUN4I_TCON0_BASIC2_V_BACKPORCH(bp)); - -- reg = SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0; -+ reg = SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 | -+ SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL | -+ SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL; - if (sun4i_tcon_get_pixel_depth(encoder) == 24) - reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS; - else -@@ -514,7 +547,14 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, - - tcon->dclk_min_div = tcon->quirks->dclk_min_div; - tcon->dclk_max_div = 127; -- sun4i_tcon0_mode_set_common(tcon, mode); -+ -+ /* Configure the dot clock */ -+ clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); -+ -+ /* Set the resolution */ -+ regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG, -+ SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) | -+ SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay)); - - /* Set dithering if needed */ - sun4i_tcon0_mode_set_dithering(tcon, connector); -@@ -706,6 +746,13 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon, - const struct drm_encoder *encoder, - const struct drm_display_mode *mode) - { -+ if (tcon->hw_preconfigured) { -+ // avoid the first modeset -+ tcon->hw_preconfigured = false; -+ hw_preconfigured = false; -+ return; -+ } -+ - switch (encoder->encoder_type) { - case DRM_MODE_ENCODER_DSI: - /* DSI is tied to special case of CPU interface */ -@@ -790,8 +837,8 @@ static int sun4i_tcon_init_clocks(struct device *dev, - dev_err(dev, "Couldn't get the TCON channel 0 clock\n"); - return PTR_ERR(tcon->sclk0); - } -+ clk_prepare_enable(tcon->sclk0); - } -- clk_prepare_enable(tcon->sclk0); - - if (tcon->quirks->has_channel_1) { - tcon->sclk1 = devm_clk_get(dev, "tcon-ch1"); -@@ -856,6 +903,7 @@ static int sun4i_tcon_init_regmap(struct device *dev, - return PTR_ERR(tcon->regs); - } - -+ if (!tcon->hw_preconfigured) { - /* Make sure the TCON is disabled and all IRQs are off */ - regmap_write(tcon->regs, SUN4I_TCON_GCTL_REG, 0); - regmap_write(tcon->regs, SUN4I_TCON_GINT0_REG, 0); -@@ -864,6 +912,7 @@ static int sun4i_tcon_init_regmap(struct device *dev, - /* Disable IO lines and set them to tristate */ - regmap_write(tcon->regs, SUN4I_TCON0_IO_TRI_REG, ~0); - regmap_write(tcon->regs, SUN4I_TCON1_IO_TRI_REG, ~0); -+ } - - return 0; - } -@@ -1135,6 +1184,9 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, - tcon->dev = dev; - tcon->id = engine->id; - tcon->quirks = of_device_get_match_data(dev); -+ -+ if (tcon->id == 0) -+ tcon->hw_preconfigured = hw_preconfigured; - - tcon->lcd_rst = devm_reset_control_get(dev, "lcd"); - if (IS_ERR(tcon->lcd_rst)) { -@@ -1156,12 +1208,14 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, - } - } - -+ if (!tcon->hw_preconfigured) { - /* Make sure our TCON is reset */ - ret = reset_control_reset(tcon->lcd_rst); - if (ret) { - dev_err(dev, "Couldn't deassert our reset line\n"); - return ret; - } -+ } - - if (tcon->quirks->supports_lvds) { - /* -@@ -1289,6 +1343,11 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master, - - list_add_tail(&tcon->list, &drv->tcon_list); - -+ drm_mode_crtc_set_gamma_size(&tcon->crtc->crtc, -+ SUN4I_TCON_GAMMA_LUT_SIZE); -+ drm_crtc_enable_color_mgmt(&tcon->crtc->crtc, 0, false, -+ tcon->crtc->crtc.gamma_size); -+ - return 0; - - err_free_dotclock: -@@ -1323,8 +1382,15 @@ static int sun4i_tcon_probe(struct platform_device *pdev) - const struct sun4i_tcon_quirks *quirks; - struct drm_bridge *bridge; - struct drm_panel *panel; -+ u32 fb_start; - int ret; - -+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start); -+ if (ret == 0) { -+ /* the display pipeline is already initialized by p-boot */ -+ hw_preconfigured = true; -+ } -+ - quirks = of_device_get_match_data(&pdev->dev); - - /* panels and bridges are present only on TCONs with channel 0 */ -@@ -1511,6 +1577,14 @@ static const struct sun4i_tcon_quirks sun8i_a33_quirks = { - .supports_lvds = true, - }; - -+static const struct sun4i_tcon_quirks sun50i_a64_lcd_quirks = { -+ .supports_lvds = true, -+ .has_channel_0 = true, -+ .clk_kept_by_ccu = true, -+ .dclk_min_div = 1, -+ .setup_lvds_phy = sun6i_tcon_setup_lvds_phy, -+}; -+ - static const struct sun4i_tcon_quirks sun8i_a83t_lcd_quirks = { - .supports_lvds = true, - .has_channel_0 = true, -@@ -1561,6 +1635,7 @@ const struct of_device_id sun4i_tcon_of_table[] = { - { .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks }, - { .compatible = "allwinner,sun9i-a80-tcon-lcd", .data = &sun9i_a80_tcon_lcd_quirks }, - { .compatible = "allwinner,sun9i-a80-tcon-tv", .data = &sun9i_a80_tcon_tv_quirks }, -+ { .compatible = "allwinner,sun50i-a64-tcon-lcd", .data = &sun50i_a64_lcd_quirks }, - { } - }; - MODULE_DEVICE_TABLE(of, sun4i_tcon_of_table); -diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h -index e624f6977eb8..f532d87ea82f 100644 ---- a/drivers/gpu/drm/sun4i/sun4i_tcon.h -+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h -@@ -18,6 +18,7 @@ - - #define SUN4I_TCON_GCTL_REG 0x0 - #define SUN4I_TCON_GCTL_TCON_ENABLE BIT(31) -+#define SUN4I_TCON_GCTL_GAMMA_ENABLE BIT(30) - #define SUN4I_TCON_GCTL_IOMAP_MASK BIT(0) - #define SUN4I_TCON_GCTL_IOMAP_TCON1 (1 << 0) - #define SUN4I_TCON_GCTL_IOMAP_TCON0 (0 << 0) -@@ -228,7 +229,13 @@ - #define SUN4I_TCON1_FILL_BEG2_REG 0x31c - #define SUN4I_TCON1_FILL_END2_REG 0x320 - #define SUN4I_TCON1_FILL_DATA2_REG 0x324 --#define SUN4I_TCON1_GAMMA_TABLE_REG 0x400 -+ -+#define SUN4I_TCON_GAMMA_TABLE_REG 0x400 -+#define SUN4I_TCON_GAMMA_TABLE_B(x) ((x) & 0xff) -+#define SUN4I_TCON_GAMMA_TABLE_G(x) (((x) & 0xff) << 8) -+#define SUN4I_TCON_GAMMA_TABLE_R(x) (((x) & 0xff) << 16) -+ -+#define SUN4I_TCON_GAMMA_LUT_SIZE 256 - - #define SUN4I_TCON_MAX_CHANNELS 2 - -@@ -242,6 +249,7 @@ struct sun4i_tcon_quirks { - bool needs_edp_reset; /* a80 edp reset needed for tcon0 access */ - bool supports_lvds; /* Does the TCON support an LVDS output? */ - bool polarity_in_ch0; /* some tcon1 channels have polarity bits in tcon0 pol register */ -+ bool clk_kept_by_ccu; /* On A64 we rely on CCU to keep TCON0 clock stable */ - u8 dclk_min_div; /* minimum divider for TCON0 DCLK */ - - /* callback to handle tcon muxing options */ -@@ -285,6 +293,8 @@ struct sun4i_tcon { - - /* TCON list management */ - struct list_head list; -+ -+ bool hw_preconfigured; - }; - - struct drm_bridge *sun4i_tcon_find_bridge(struct device_node *node); -@@ -296,6 +306,9 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon, - const struct drm_display_mode *mode); - void sun4i_tcon_set_status(struct sun4i_tcon *crtc, - const struct drm_encoder *encoder, bool enable); -+void sun4i_tcon_load_gamma_lut(struct sun4i_tcon *tcon, -+ struct drm_color_lut *lut); -+void sun4i_tcon_enable_gamma(struct sun4i_tcon *tcon, bool enable); - - extern const struct of_device_id sun4i_tcon_of_table[]; - -diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c -index 4f5efcace68e..52806e824bb9 100644 ---- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c -+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c -@@ -732,6 +732,7 @@ static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder) - reset_control_deassert(dsi->reset); - clk_prepare_enable(dsi->mod_clk); - -+ if (!dsi->hw_preconfigured) { - /* - * Enable the DSI block. - */ -@@ -758,6 +759,7 @@ static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder) - sun6i_dsi_setup_inst_loop(dsi, mode); - sun6i_dsi_setup_format(dsi, mode); - sun6i_dsi_setup_timings(dsi, mode); -+ } - - phy_init(dsi->dphy); - -@@ -787,11 +789,15 @@ static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder) - if (dsi->panel) - drm_panel_enable(dsi->panel); - -+ if (!dsi->hw_preconfigured) { - sun6i_dsi_start(dsi, DSI_START_HSC); - - udelay(1000); - - sun6i_dsi_start(dsi, DSI_START_HSD); -+ } -+ -+ dsi->hw_preconfigured = false; - } - - static void sun6i_dsi_encoder_disable(struct drm_encoder *encoder) -@@ -852,7 +858,7 @@ static u32 sun6i_dsi_dcs_build_pkt_hdr(struct sun6i_dsi *dsi, - { - u32 pkt = msg->type; - -- if (msg->type == MIPI_DSI_DCS_LONG_WRITE) { -+ if (msg->type == MIPI_DSI_DCS_LONG_WRITE || msg->type == MIPI_DSI_GENERIC_LONG_WRITE) { - pkt |= ((msg->tx_len) & 0xffff) << 8; - pkt |= (((msg->tx_len) >> 8) & 0xffff) << 16; - } else { -@@ -1015,6 +1021,7 @@ static ssize_t sun6i_dsi_transfer(struct mipi_dsi_host *host, - ret = sun6i_dsi_dcs_write_short(dsi, msg); - break; - -+ case MIPI_DSI_GENERIC_LONG_WRITE: - case MIPI_DSI_DCS_LONG_WRITE: - ret = sun6i_dsi_dcs_write_long(dsi, msg); - break; -@@ -1106,6 +1113,7 @@ static int sun6i_dsi_probe(struct platform_device *pdev) - struct sun6i_dsi *dsi; - struct resource *res; - void __iomem *base; -+ u32 fb_start; - int ret; - - dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); -@@ -1116,6 +1124,12 @@ static int sun6i_dsi_probe(struct platform_device *pdev) - dsi->host.ops = &sun6i_dsi_host_ops; - dsi->host.dev = dev; - -+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start); -+ if (ret == 0) { -+ /* the display pipeline is already initialized by p-boot */ -+ dsi->hw_preconfigured = true; -+ } -+ - if (of_device_is_compatible(dev->of_node, - "allwinner,sun6i-a31-mipi-dsi")) - bus_clk_name = "bus"; -@@ -1129,7 +1143,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev) - - dsi->regulator = devm_regulator_get(dev, "vcc-dsi"); - if (IS_ERR(dsi->regulator)) { -- dev_err(dev, "Couldn't get VCC-DSI supply\n"); -+ dev_err_probe(dev, PTR_ERR(dsi->regulator), -+ "Couldn't get VCC-DSI supply\n"); - return PTR_ERR(dsi->regulator); - } - -diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h -index c863900ae3b4..7f80ff130e44 100644 ---- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h -+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h -@@ -31,6 +31,8 @@ struct sun6i_dsi { - struct mipi_dsi_device *device; - struct drm_device *drm; - struct drm_panel *panel; -+ -+ bool hw_preconfigured; - }; - - static inline struct sun6i_dsi *host_to_sun6i_dsi(struct mipi_dsi_host *host) -diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c -index 5b42cf25cc86..681adda35418 100644 ---- a/drivers/gpu/drm/sun4i/sun8i_mixer.c -+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c -@@ -22,6 +22,7 @@ - #include - - #include "sun4i_drv.h" -+#include "sun4i_tcon.h" - #include "sun8i_mixer.h" - #include "sun8i_ui_layer.h" - #include "sun8i_vi_layer.h" -@@ -32,6 +33,8 @@ struct de2_fmt_info { - u32 de2_fmt; - }; - -+static bool hw_preconfigured; -+ - static const struct de2_fmt_info de2_formats[] = { - { - .drm_fmt = DRM_FORMAT_ARGB8888, -@@ -250,8 +253,36 @@ int sun8i_mixer_drm_format_to_hw(u32 format, u32 *hw_format) - - static void sun8i_mixer_commit(struct sunxi_engine *engine) - { -+ struct sun8i_mixer* mixer = engine_to_sun8i_mixer(engine); -+ struct sun4i_tcon* tcon; -+ u32 val, saved, ret; -+ - DRM_DEBUG_DRIVER("Committing changes\n"); - -+ if (mixer->hw_preconfigured && engine->id == 0) { -+ /* -+ * This is the first commit, wait for vblank on tcon0 before continuing. -+ */ -+ list_for_each_entry(tcon, &mixer->drv->tcon_list, list) { -+ if (tcon->id == 0) { -+ regmap_read(tcon->regs, SUN4I_TCON_GINT0_REG, &saved); -+ saved &= 0xffff0000; -+ -+ regmap_write(tcon->regs, SUN4I_TCON_GINT0_REG, 0); -+ -+ ret = regmap_read_poll_timeout(tcon->regs, SUN4I_TCON_GINT0_REG, val, -+ val & (SUN4I_TCON_GINT0_VBLANK_INT(0) | -+ SUN4I_TCON_GINT0_VBLANK_INT(1) | -+ SUN4I_TCON_GINT0_TCON0_TRI_FINISH_INT), -+ 100, 40000); -+ -+ regmap_write(tcon->regs, SUN4I_TCON_GINT0_REG, saved); -+ } -+ } -+ -+ mixer->hw_preconfigured = false; -+ } -+ - regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF, - SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); - } -@@ -284,8 +315,13 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm, - - for (i = 0; i < mixer->cfg->ui_num; i++) { - struct sun8i_ui_layer *layer; -+ enum drm_plane_type type = DRM_PLANE_TYPE_OVERLAY; -+ if (i == 0) -+ type = DRM_PLANE_TYPE_PRIMARY; -+ else if (i == (mixer->cfg->ui_num - 1)) -+ type = DRM_PLANE_TYPE_CURSOR; - -- layer = sun8i_ui_layer_init_one(drm, mixer, i); -+ layer = sun8i_ui_layer_init_one(drm, mixer, i, type); - if (IS_ERR(layer)) { - dev_err(drm->dev, "Couldn't initialize %s plane\n", - i ? "overlay" : "primary"); -@@ -362,6 +398,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, - dev_set_drvdata(dev, mixer); - mixer->engine.ops = &sun8i_engine_ops; - mixer->engine.node = dev->of_node; -+ mixer->drv = drv; - - if (of_find_property(dev->of_node, "iommus", NULL)) { - /* -@@ -386,6 +423,11 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, - */ - mixer->engine.id = sun8i_mixer_of_get_id(dev->of_node); - -+ if (mixer->engine.id == 0) { -+ mixer->hw_preconfigured = hw_preconfigured; -+ hw_preconfigured = false; -+ } -+ - mixer->cfg = of_device_get_match_data(dev); - if (!mixer->cfg) - return -EINVAL; -@@ -434,8 +476,11 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, - * reason for the mixer to be functional. Make sure it's the - * case. - */ -+ -+ if (!mixer->hw_preconfigured) { - if (mixer->cfg->mod_rate) - clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate); -+ } - - clk_prepare_enable(mixer->mod_clk); - -@@ -443,6 +488,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, - - base = sun8i_blender_base(mixer); - -+ if (!mixer->hw_preconfigured) { - /* Reset registers and disable unused sub-engines */ - if (mixer->cfg->is_de3) { - for (i = 0; i < DE3_MIXER_UNIT_SIZE; i += 4) -@@ -474,6 +520,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, - /* Enable the mixer */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_CTL, - SUN8I_MIXER_GLOBAL_CTL_RT_EN); -+ } /* hw_preconfigured */ - - /* Set background color to black */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base), -@@ -494,8 +541,10 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, - SUN8I_MIXER_BLEND_MODE(base, i), - SUN8I_MIXER_BLEND_MODE_DEF); - -+ if (!mixer->hw_preconfigured) { - regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); -+ } - - return 0; - -@@ -525,6 +574,15 @@ static const struct component_ops sun8i_mixer_ops = { - - static int sun8i_mixer_probe(struct platform_device *pdev) - { -+ int ret; -+ u32 fb_start; -+ -+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start); -+ if (ret == 0) { -+ /* the display pipeline is already initialized by p-boot */ -+ hw_preconfigured = true; -+ } -+ - return component_add(&pdev->dev, &sun8i_mixer_ops); - } - -diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h -index 7576b523fdbb..1d31fdc71cbf 100644 ---- a/drivers/gpu/drm/sun4i/sun8i_mixer.h -+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h -@@ -179,6 +179,9 @@ struct sun8i_mixer { - - struct clk *bus_clk; - struct clk *mod_clk; -+ -+ struct sun4i_drv *drv; -+ bool hw_preconfigured; - }; - - static inline struct sun8i_mixer * -diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c -index 816ad4ce8996..5ef1f75130b8 100644 ---- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c -+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c -@@ -24,10 +24,11 @@ - #include "sun8i_ui_scaler.h" - - static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, -- int overlay, bool enable, unsigned int zpos, -- unsigned int old_zpos) -+ int overlay, bool was_enabled, bool enable, -+ unsigned int zpos, unsigned int old_zpos) - { - u32 val, bld_base, ch_base; -+ unsigned int old_pipe_ch; - - bld_base = sun8i_blender_base(mixer); - ch_base = sun8i_channel_base(mixer, channel); -@@ -35,28 +36,56 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, - DRM_DEBUG_DRIVER("%sabling channel %d overlay %d\n", - enable ? "En" : "Dis", channel, overlay); - -- if (enable) -- val = SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN; -- else -- val = 0; -- -+ /* We always update the layer enable bit, because it can clear -+ * spontaneously for unknown reasons. */ -+ val = enable ? SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN : 0; - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), - SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val); - -- if (!enable || zpos != old_zpos) { -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), -- SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), -- 0); -- -- regmap_update_bits(mixer->engine.regs, -+ /* -+ * If this layer was enabled and is being disabled or if it is -+ * enabled and just changing zpos, clear the old route, if it is -+ * still configured to this layer in HW. -+ */ -+ if ((was_enabled && !enable) || (enable && zpos != old_zpos)) { -+ /* get channel the pipe for old_zpos is routed to from the HW */ -+ regmap_read(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), -- SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), -- 0); -+ &old_pipe_ch); -+ old_pipe_ch &= SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos); -+ old_pipe_ch >>= SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(old_zpos); -+ -+ /* -+ * Check that pipe for old_zpos is still routed to our layer, -+ * and clear/disable it if it is. -+ */ -+ -+ if (old_pipe_ch == channel) { -+ DRM_DEBUG_DRIVER("chan=%d en=%d->%d zpos=%d->%d\n", -+ channel, was_enabled, enable, old_zpos, zpos); -+ -+ DRM_DEBUG_DRIVER(" disable pipe %d\n", old_zpos); -+ -+ regmap_update_bits(mixer->engine.regs, -+ SUN8I_MIXER_BLEND_ROUTE(bld_base), -+ SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), -+ 0); -+ -+ regmap_update_bits(mixer->engine.regs, -+ SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), -+ SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), -+ 0); -+ } - } - -- if (enable) { -+ /* -+ * If enabling this layer or changin zpos, set route to this layer. -+ */ -+ if ((enable && !was_enabled) || (enable && zpos != old_zpos)) { -+ DRM_DEBUG_DRIVER("chan=%d en=%d->%d zpos=%d->%d\n", -+ channel, was_enabled, enable, old_zpos, zpos); -+ - val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); - - regmap_update_bits(mixer->engine.regs, -@@ -69,7 +98,14 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), - val); -+ -+ DRM_DEBUG_DRIVER(" enable pipe %d <- ch %d\n", zpos, channel); - } -+ -+ unsigned tmp; -+ regmap_read(mixer->engine.regs, -+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), &tmp); -+ DRM_DEBUG_DRIVER(" post-en-dis %08x\n", tmp); - } - - static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, -@@ -187,11 +223,20 @@ static int sun8i_ui_layer_update_formats(struct sun8i_mixer *mixer, int channel, - return -EINVAL; - } - -+ unsigned tmp; -+ regmap_read(mixer->engine.regs, -+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), &tmp); -+ DRM_DEBUG_DRIVER(" pre-format %08x\n", tmp); -+ - val = hw_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET; - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), - SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val); - -+ regmap_read(mixer->engine.regs, -+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), &tmp); -+ DRM_DEBUG_DRIVER(" post-format %08x\n", tmp); -+ - return 0; - } - -@@ -263,45 +308,43 @@ static int sun8i_ui_layer_atomic_check(struct drm_plane *plane, - true, true); - } - --static void sun8i_ui_layer_atomic_disable(struct drm_plane *plane, -- struct drm_plane_state *old_state) -+static void sun8i_ui_layer_atomic_update(struct drm_plane *plane, -+ struct drm_plane_state *old_state) - { - struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); -+ unsigned int zpos = plane->state->normalized_zpos; - unsigned int old_zpos = old_state->normalized_zpos; - struct sun8i_mixer *mixer = layer->mixer; -+ bool was_enabled = old_state->crtc && old_state->visible; -+ bool enable = plane->state->crtc && plane->state->visible; -+ -+ if (enable) { -+ sun8i_ui_layer_update_coord(mixer, layer->channel, -+ layer->overlay, plane, zpos); -+ sun8i_ui_layer_update_formats(mixer, layer->channel, -+ layer->overlay, plane); -+ sun8i_ui_layer_update_buffer(mixer, layer->channel, -+ layer->overlay, plane); -+ } - -- sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0, -- old_zpos); -+ sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, -+ was_enabled, enable, zpos, old_zpos); - } - --static void sun8i_ui_layer_atomic_update(struct drm_plane *plane, -- struct drm_plane_state *old_state) -+void sun8i_ui_layer_plane_reset(struct drm_plane *plane) - { - struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); -- unsigned int zpos = plane->state->normalized_zpos; -- unsigned int old_zpos = old_state->normalized_zpos; -- struct sun8i_mixer *mixer = layer->mixer; - -- if (!plane->state->visible) { -- sun8i_ui_layer_enable(mixer, layer->channel, -- layer->overlay, false, 0, old_zpos); -+ drm_atomic_helper_plane_reset(plane); -+ if (!plane->state) - return; -- } - -- sun8i_ui_layer_update_coord(mixer, layer->channel, -- layer->overlay, plane, zpos); -- sun8i_ui_layer_update_formats(mixer, layer->channel, -- layer->overlay, plane); -- sun8i_ui_layer_update_buffer(mixer, layer->channel, -- layer->overlay, plane); -- sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, -- true, zpos, old_zpos); -+ plane->state->zpos = layer->channel; - } - - static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = { - .prepare_fb = drm_gem_fb_prepare_fb, - .atomic_check = sun8i_ui_layer_atomic_check, -- .atomic_disable = sun8i_ui_layer_atomic_disable, - .atomic_update = sun8i_ui_layer_atomic_update, - }; - -@@ -310,7 +353,7 @@ static const struct drm_plane_funcs sun8i_ui_layer_funcs = { - .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, - .destroy = drm_plane_cleanup, - .disable_plane = drm_atomic_helper_disable_plane, -- .reset = drm_atomic_helper_plane_reset, -+ .reset = sun8i_ui_layer_plane_reset, - .update_plane = drm_atomic_helper_update_plane, - }; - -@@ -339,9 +382,9 @@ static const u32 sun8i_ui_layer_formats[] = { - - struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, - struct sun8i_mixer *mixer, -- int index) -+ int index, -+ enum drm_plane_type type) - { -- enum drm_plane_type type = DRM_PLANE_TYPE_OVERLAY; - int channel = mixer->cfg->vi_num + index; - struct sun8i_ui_layer *layer; - unsigned int plane_cnt; -@@ -351,9 +394,6 @@ struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, - if (!layer) - return ERR_PTR(-ENOMEM); - -- if (index == 0) -- type = DRM_PLANE_TYPE_PRIMARY; -- - /* possible crtcs are set later */ - ret = drm_universal_plane_init(drm, &layer->plane, 0, - &sun8i_ui_layer_funcs, -diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.h b/drivers/gpu/drm/sun4i/sun8i_ui_layer.h -index f4ab1cf6cded..41d613fd2ae6 100644 ---- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.h -+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.h -@@ -58,5 +58,6 @@ plane_to_sun8i_ui_layer(struct drm_plane *plane) - - struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, - struct sun8i_mixer *mixer, -- int index); -+ int index, -+ enum drm_plane_type type); - #endif /* _SUN8I_UI_LAYER_H_ */ -diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c -index 76393fc976fe..c393c388e6be 100644 ---- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c -+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c -@@ -18,10 +18,11 @@ - #include "sun8i_vi_scaler.h" - - static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, -- int overlay, bool enable, unsigned int zpos, -- unsigned int old_zpos) -+ int overlay, bool was_enabled, bool enable, -+ unsigned int zpos, unsigned int old_zpos) - { - u32 val, bld_base, ch_base; -+ unsigned int old_pipe_ch; - - bld_base = sun8i_blender_base(mixer); - ch_base = sun8i_channel_base(mixer, channel); -@@ -29,28 +30,56 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, - DRM_DEBUG_DRIVER("%sabling VI channel %d overlay %d\n", - enable ? "En" : "Dis", channel, overlay); - -- if (enable) -- val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN; -- else -- val = 0; -- -+ /* We always update the layer enable bit, because it can clear -+ * spontaneously for unknown reasons. */ -+ val = enable ? SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN : 0; - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), - SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val); - -- if (!enable || zpos != old_zpos) { -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), -- SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), -- 0); -- -- regmap_update_bits(mixer->engine.regs, -+ /* -+ * If this layer was enabled and is being disabled or if it is -+ * enabled and just changing zpos, clear the old route, if it is -+ * still configured to this layer in HW. -+ */ -+ if ((was_enabled && !enable) || (enable && zpos != old_zpos)) { -+ /* get channel the pipe for old_zpos is routed to from the HW */ -+ regmap_read(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), -- SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), -- 0); -+ &old_pipe_ch); -+ old_pipe_ch &= SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos); -+ old_pipe_ch >>= SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(old_zpos); -+ -+ /* -+ * Check that pipe for old_zpos is still routed to our layer, -+ * and clear/disable it if it is. -+ */ -+ -+ if (old_pipe_ch == channel) { -+ DRM_DEBUG_DRIVER("chan=%d en=%d->%d zpos=%d->%d\n", -+ channel, was_enabled, enable, old_zpos, zpos); -+ -+ DRM_DEBUG_DRIVER(" disable pipe %d\n", old_zpos); -+ -+ regmap_update_bits(mixer->engine.regs, -+ SUN8I_MIXER_BLEND_ROUTE(bld_base), -+ SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), -+ 0); -+ -+ regmap_update_bits(mixer->engine.regs, -+ SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), -+ SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), -+ 0); -+ } - } - -- if (enable) { -+ /* -+ * If enabling this layer or changin zpos, set route to this layer. -+ */ -+ if ((enable && !was_enabled) || (enable && zpos != old_zpos)) { -+ DRM_DEBUG_DRIVER("chan=%d en=%d->%d zpos=%d->%d\n", -+ channel, was_enabled, enable, old_zpos, zpos); -+ - val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); - - regmap_update_bits(mixer->engine.regs, -@@ -63,7 +92,14 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), - val); -+ -+ DRM_DEBUG_DRIVER(" enable pipe %d <- ch %d\n", zpos, channel); - } -+ -+ unsigned tmp; -+ regmap_read(mixer->engine.regs, -+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp); -+ DRM_DEBUG_DRIVER(" post-en-dis %08x\n", tmp); - } - - static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, -@@ -244,11 +280,20 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, - return ret; - } - -+ unsigned tmp; -+ regmap_read(mixer->engine.regs, -+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp); -+ DRM_DEBUG_DRIVER(" pre-format %08x\n", tmp); -+ - val = hw_fmt << SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET; - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), - SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val); - -+ regmap_read(mixer->engine.regs, -+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp); -+ DRM_DEBUG_DRIVER(" mid1-format %08x\n", tmp); -+ - csc_mode = sun8i_vi_layer_get_csc_mode(fmt); - if (csc_mode != SUN8I_CSC_MODE_OFF) { - sun8i_csc_set_ccsc_coefficients(mixer, channel, csc_mode, -@@ -259,6 +304,10 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, - sun8i_csc_enable_ccsc(mixer, channel, false); - } - -+ regmap_read(mixer->engine.regs, -+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp); -+ DRM_DEBUG_DRIVER(" mid2-format %08x\n", tmp); -+ - if (!fmt->is_yuv) - val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE; - else -@@ -276,6 +325,10 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, - SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK, - SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(0xff)); - -+ regmap_read(mixer->engine.regs, -+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), &tmp); -+ DRM_DEBUG_DRIVER(" post-format %08x\n", tmp); -+ - return 0; - } - -@@ -366,45 +419,43 @@ static int sun8i_vi_layer_atomic_check(struct drm_plane *plane, - true, true); - } - --static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane, -- struct drm_plane_state *old_state) -+static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, -+ struct drm_plane_state *old_state) - { - struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); -+ unsigned int zpos = plane->state->normalized_zpos; - unsigned int old_zpos = old_state->normalized_zpos; - struct sun8i_mixer *mixer = layer->mixer; -+ bool was_enabled = old_state->crtc && old_state->visible; -+ bool enable = plane->state->crtc && plane->state->visible; -+ -+ if (enable) { -+ sun8i_vi_layer_update_coord(mixer, layer->channel, -+ layer->overlay, plane, zpos); -+ sun8i_vi_layer_update_formats(mixer, layer->channel, -+ layer->overlay, plane); -+ sun8i_vi_layer_update_buffer(mixer, layer->channel, -+ layer->overlay, plane); -+ } - -- sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, -- old_zpos); -+ sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, -+ was_enabled, enable, zpos, old_zpos); - } - --static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, -- struct drm_plane_state *old_state) -+void sun8i_vi_layer_plane_reset(struct drm_plane *plane) - { - struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); -- unsigned int zpos = plane->state->normalized_zpos; -- unsigned int old_zpos = old_state->normalized_zpos; -- struct sun8i_mixer *mixer = layer->mixer; - -- if (!plane->state->visible) { -- sun8i_vi_layer_enable(mixer, layer->channel, -- layer->overlay, false, 0, old_zpos); -+ drm_atomic_helper_plane_reset(plane); -+ if (!plane->state) - return; -- } - -- sun8i_vi_layer_update_coord(mixer, layer->channel, -- layer->overlay, plane, zpos); -- sun8i_vi_layer_update_formats(mixer, layer->channel, -- layer->overlay, plane); -- sun8i_vi_layer_update_buffer(mixer, layer->channel, -- layer->overlay, plane); -- sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, -- true, zpos, old_zpos); -+ plane->state->zpos = layer->channel; - } - - static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = { - .prepare_fb = drm_gem_fb_prepare_fb, - .atomic_check = sun8i_vi_layer_atomic_check, -- .atomic_disable = sun8i_vi_layer_atomic_disable, - .atomic_update = sun8i_vi_layer_atomic_update, - }; - -@@ -413,7 +464,7 @@ static const struct drm_plane_funcs sun8i_vi_layer_funcs = { - .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, - .destroy = drm_plane_cleanup, - .disable_plane = drm_atomic_helper_disable_plane, -- .reset = drm_atomic_helper_plane_reset, -+ .reset = sun8i_vi_layer_plane_reset, - .update_plane = drm_atomic_helper_update_plane, - }; - -diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c -index a4a6825c8758..3ac58cd927c2 100644 ---- a/drivers/i2c/busses/i2c-gpio.c -+++ b/drivers/i2c/busses/i2c-gpio.c -@@ -332,6 +332,13 @@ static struct gpio_desc *i2c_gpio_get_desc(struct device *dev, - return retdesc; - } - -+ /* return early so that EPROBE_DEFER is not ignored on named gpios */ -+ if (PTR_ERR(retdesc) == -EPROBE_DEFER) { -+ dev_err_probe(dev, PTR_ERR(retdesc), -+ "error trying to get descriptor\n"); -+ return retdesc; -+ } -+ - retdesc = devm_gpiod_get_index(dev, NULL, index, gflags); - if (!IS_ERR(retdesc)) { - dev_dbg(dev, "got GPIO from index %u\n", index); -@@ -348,8 +355,8 @@ static struct gpio_desc *i2c_gpio_get_desc(struct device *dev, - if (ret == -ENOENT) - retdesc = ERR_PTR(-EPROBE_DEFER); - -- if (PTR_ERR(retdesc) != -EPROBE_DEFER) -- dev_err(dev, "error trying to get descriptor: %d\n", ret); -+ dev_err_probe(dev, PTR_ERR(retdesc), -+ "error trying to get descriptor\n"); - - return retdesc; - } -diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c -index 5cfe70aedced..9003cd9025c4 100644 ---- a/drivers/i2c/busses/i2c-mv64xxx.c -+++ b/drivers/i2c/busses/i2c-mv64xxx.c -@@ -18,6 +18,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -717,6 +718,10 @@ mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) - struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap); - int rc, ret = num; - -+ rc = pm_runtime_resume_and_get(&adap->dev); -+ if (rc) -+ return rc; -+ - BUG_ON(drv_data->msgs != NULL); - drv_data->msgs = msgs; - drv_data->num_msgs = num; -@@ -732,6 +737,9 @@ mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) - drv_data->num_msgs = 0; - drv_data->msgs = NULL; - -+ pm_runtime_mark_last_busy(&adap->dev); -+ pm_runtime_put_autosuspend(&adap->dev); -+ - return ret; - } - -@@ -828,7 +836,6 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data, - rc = PTR_ERR(drv_data->rstc); - goto out; - } -- reset_control_deassert(drv_data->rstc); - - /* Its not yet defined how timeouts will be specified in device tree. - * So hard code the value to 1 second. -@@ -889,10 +896,44 @@ static int mv64xxx_i2c_init_recovery_info(struct mv64xxx_i2c_data *drv_data, - return -ENODEV; - } - -+ if (IS_ERR(pinctrl_lookup_state(rinfo->pinctrl, "gpio")) && -+ IS_ERR(pinctrl_lookup_state(rinfo->pinctrl, "recovery"))) { -+ /* No recovery state is vailable in pinctrl. */ -+ devm_pinctrl_put(rinfo->pinctrl); -+ rinfo->pinctrl = NULL; -+ return 0; -+ } -+ - drv_data->adapter.bus_recovery_info = rinfo; - return 0; - } - -+static int -+mv64xxx_i2c_runtime_suspend(struct device *dev) -+{ -+ struct mv64xxx_i2c_data *drv_data = dev_get_drvdata(dev); -+ -+ reset_control_assert(drv_data->rstc); -+ clk_disable_unprepare(drv_data->reg_clk); -+ clk_disable_unprepare(drv_data->clk); -+ -+ return 0; -+} -+ -+static int -+mv64xxx_i2c_runtime_resume(struct device *dev) -+{ -+ struct mv64xxx_i2c_data *drv_data = dev_get_drvdata(dev); -+ -+ clk_prepare_enable(drv_data->clk); -+ clk_prepare_enable(drv_data->reg_clk); -+ reset_control_reset(drv_data->rstc); -+ -+ mv64xxx_i2c_hw_init(drv_data); -+ -+ return 0; -+} -+ - static int - mv64xxx_i2c_probe(struct platform_device *pd) - { -@@ -920,18 +961,22 @@ mv64xxx_i2c_probe(struct platform_device *pd) - - /* Not all platforms have clocks */ - drv_data->clk = devm_clk_get(&pd->dev, NULL); -- if (PTR_ERR(drv_data->clk) == -EPROBE_DEFER) -- return -EPROBE_DEFER; -- if (!IS_ERR(drv_data->clk)) -- clk_prepare_enable(drv_data->clk); -+ if (IS_ERR(drv_data->clk)) { -+ if (PTR_ERR(drv_data->clk) == -EPROBE_DEFER) -+ return -EPROBE_DEFER; -+ drv_data->clk = NULL; -+ } - - drv_data->reg_clk = devm_clk_get(&pd->dev, "reg"); -- if (PTR_ERR(drv_data->reg_clk) == -EPROBE_DEFER) -- return -EPROBE_DEFER; -- if (!IS_ERR(drv_data->reg_clk)) -- clk_prepare_enable(drv_data->reg_clk); -+ if (IS_ERR(drv_data->reg_clk)) { -+ if (PTR_ERR(drv_data->reg_clk) == -EPROBE_DEFER) -+ return -EPROBE_DEFER; -+ drv_data->reg_clk = NULL; -+ } - - drv_data->irq = platform_get_irq(pd, 0); -+ if (drv_data->irq < 0) -+ return drv_data->irq; - - if (pdata) { - drv_data->freq_m = pdata->freq_m; -@@ -942,16 +987,12 @@ mv64xxx_i2c_probe(struct platform_device *pd) - } else if (pd->dev.of_node) { - rc = mv64xxx_of_config(drv_data, &pd->dev); - if (rc) -- goto exit_clk; -- } -- if (drv_data->irq < 0) { -- rc = drv_data->irq; -- goto exit_reset; -+ return rc; - } - - rc = mv64xxx_i2c_init_recovery_info(drv_data, &pd->dev); - if (rc == -EPROBE_DEFER) -- goto exit_reset; -+ return rc; - - drv_data->adapter.dev.parent = &pd->dev; - drv_data->adapter.algo = &mv64xxx_i2c_algo; -@@ -962,7 +1003,14 @@ mv64xxx_i2c_probe(struct platform_device *pd) - platform_set_drvdata(pd, drv_data); - i2c_set_adapdata(&drv_data->adapter, drv_data); - -- mv64xxx_i2c_hw_init(drv_data); -+ pm_runtime_set_autosuspend_delay(&pd->dev, MSEC_PER_SEC); -+ pm_runtime_use_autosuspend(&pd->dev); -+ pm_runtime_enable(&pd->dev); -+ if (!pm_runtime_enabled(&pd->dev)) { -+ rc = mv64xxx_i2c_runtime_resume(&pd->dev); -+ if (rc) -+ goto exit_disable_pm; -+ } - - rc = request_irq(drv_data->irq, mv64xxx_i2c_intr, 0, - MV64XXX_I2C_CTLR_NAME, drv_data); -@@ -970,7 +1018,7 @@ mv64xxx_i2c_probe(struct platform_device *pd) - dev_err(&drv_data->adapter.dev, - "mv64xxx: Can't register intr handler irq%d: %d\n", - drv_data->irq, rc); -- goto exit_reset; -+ goto exit_disable_pm; - } else if ((rc = i2c_add_numbered_adapter(&drv_data->adapter)) != 0) { - dev_err(&drv_data->adapter.dev, - "mv64xxx: Can't add i2c adapter, rc: %d\n", -rc); -@@ -981,54 +1029,50 @@ mv64xxx_i2c_probe(struct platform_device *pd) - - exit_free_irq: - free_irq(drv_data->irq, drv_data); --exit_reset: -- reset_control_assert(drv_data->rstc); --exit_clk: -- clk_disable_unprepare(drv_data->reg_clk); -- clk_disable_unprepare(drv_data->clk); -+exit_disable_pm: -+ pm_runtime_disable(&pd->dev); -+ if (!pm_runtime_status_suspended(&pd->dev)) -+ mv64xxx_i2c_runtime_suspend(&pd->dev); - - return rc; - } - - static int --mv64xxx_i2c_remove(struct platform_device *dev) -+mv64xxx_i2c_remove(struct platform_device *pd) - { -- struct mv64xxx_i2c_data *drv_data = platform_get_drvdata(dev); -+ struct mv64xxx_i2c_data *drv_data = platform_get_drvdata(pd); - - i2c_del_adapter(&drv_data->adapter); - free_irq(drv_data->irq, drv_data); -- reset_control_assert(drv_data->rstc); -- clk_disable_unprepare(drv_data->reg_clk); -- clk_disable_unprepare(drv_data->clk); -+ pm_runtime_disable(&pd->dev); -+ if (!pm_runtime_status_suspended(&pd->dev)) -+ mv64xxx_i2c_runtime_suspend(&pd->dev); - - return 0; - } - --#ifdef CONFIG_PM --static int mv64xxx_i2c_resume(struct device *dev) -+static void -+mv64xxx_i2c_shutdown(struct platform_device *pd) - { -- struct mv64xxx_i2c_data *drv_data = dev_get_drvdata(dev); -- -- mv64xxx_i2c_hw_init(drv_data); -- -- return 0; -+ pm_runtime_disable(&pd->dev); -+ if (!pm_runtime_status_suspended(&pd->dev)) -+ mv64xxx_i2c_runtime_suspend(&pd->dev); - } - --static const struct dev_pm_ops mv64xxx_i2c_pm = { -- .resume = mv64xxx_i2c_resume, -+static const struct dev_pm_ops mv64xxx_i2c_pm_ops = { -+ SET_RUNTIME_PM_OPS(mv64xxx_i2c_runtime_suspend, -+ mv64xxx_i2c_runtime_resume, NULL) -+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, -+ pm_runtime_force_resume) - }; - --#define mv64xxx_i2c_pm_ops (&mv64xxx_i2c_pm) --#else --#define mv64xxx_i2c_pm_ops NULL --#endif -- - static struct platform_driver mv64xxx_i2c_driver = { - .probe = mv64xxx_i2c_probe, - .remove = mv64xxx_i2c_remove, -+ .shutdown = mv64xxx_i2c_shutdown, - .driver = { - .name = MV64XXX_I2C_CTLR_NAME, -- .pm = mv64xxx_i2c_pm_ops, -+ .pm = &mv64xxx_i2c_pm_ops, - .of_match_table = mv64xxx_i2c_of_match_table, - }, - }; -diff --git a/drivers/iio/accel/bma180.c b/drivers/iio/accel/bma180.c -index 71f85a3e525b..c3c6d4fc0f11 100644 ---- a/drivers/iio/accel/bma180.c -+++ b/drivers/iio/accel/bma180.c -@@ -1200,6 +1200,7 @@ static struct i2c_driver bma180_driver = { - .name = "bma180", - .pm = BMA180_PM_OPS, - .of_match_table = bma180_of_match, -+ .probe_type = PROBE_PREFER_ASYNCHRONOUS, - }, - .probe = bma180_probe, - .remove = bma180_remove, -diff --git a/drivers/iio/adc/axp20x_adc.c b/drivers/iio/adc/axp20x_adc.c -index 3e0c0233b431..31d5658cc6f0 100644 ---- a/drivers/iio/adc/axp20x_adc.c -+++ b/drivers/iio/adc/axp20x_adc.c -@@ -39,6 +39,7 @@ - #define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x) - #define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK) - #define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x)) -+#define AXP20X_TS_FUNCTION_GPADC BIT(2) - - #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \ - { \ -@@ -694,6 +695,11 @@ static int axp20x_probe(struct platform_device *pdev) - regmap_update_bits(info->regmap, AXP20X_ADC_EN2, - AXP20X_ADC_EN2_MASK, AXP20X_ADC_EN2_MASK); - -+ if (of_property_read_bool(pdev->dev.of_node, "x-powers,ts-as-gpadc")) -+ regmap_update_bits(info->regmap, AXP20X_ADC_RATE, -+ AXP20X_TS_FUNCTION_GPADC, -+ AXP20X_TS_FUNCTION_GPADC); -+ - /* Configure ADCs rate */ - info->data->adc_rate(info, 100); - -diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c -index 99b43f28e879..247b8ae1d917 100644 ---- a/drivers/iio/adc/sun4i-gpadc-iio.c -+++ b/drivers/iio/adc/sun4i-gpadc-iio.c -@@ -622,7 +622,8 @@ static int sun4i_gpadc_probe(struct platform_device *pdev) - indio_dev->info = &sun4i_gpadc_iio_info; - indio_dev->modes = INDIO_DIRECT_MODE; - -- if (pdev->dev.of_node) -+ if (pdev->dev.of_node && of_match_node(sun4i_gpadc_of_id, -+ pdev->dev.of_node)) - ret = sun4i_gpadc_probe_dt(pdev, indio_dev); - else - ret = sun4i_gpadc_probe_mfd(pdev, indio_dev); -diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c -index c2e4c267c36b..fa80595989c9 100644 ---- a/drivers/iio/industrialio-core.c -+++ b/drivers/iio/industrialio-core.c -@@ -33,6 +33,16 @@ - #include - #include - -+static int ignore_mount_matrix = 0; -+ -+static int __init ignore_matrix(char *str) -+{ -+ ignore_mount_matrix = 1; -+ return 1; -+} -+ -+__setup("ignore_mount_matrix", ignore_matrix); -+ - /* IDA to assign each registered device a unique id */ - static DEFINE_IDA(iio_ida); - -@@ -571,6 +581,7 @@ int iio_read_mount_matrix(struct device *dev, const char *propname, - size_t len = ARRAY_SIZE(iio_mount_idmatrix.rotation); - int err; - -+ if (!ignore_mount_matrix) { - err = device_property_read_string_array(dev, propname, - matrix->rotation, len); - if (err == len) -@@ -583,6 +594,7 @@ int iio_read_mount_matrix(struct device *dev, const char *propname, - if (err != -EINVAL) - /* Invalid matrix declaration format. */ - return err; -+ } - - /* Matrix was not declared at all: fallback to identity. */ - return iio_setup_mount_idmatrix(dev, matrix); -diff --git a/drivers/input/keyboard/sun4i-lradc-keys.c b/drivers/input/keyboard/sun4i-lradc-keys.c -index 4a796bed48ac..bba679d7b54b 100644 ---- a/drivers/input/keyboard/sun4i-lradc-keys.c -+++ b/drivers/input/keyboard/sun4i-lradc-keys.c -@@ -22,6 +22,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - -@@ -226,8 +228,7 @@ static int sun4i_lradc_probe(struct platform_device *pdev) - { - struct sun4i_lradc_data *lradc; - struct device *dev = &pdev->dev; -- int i; -- int error; -+ int i, error, irq; - - lradc = devm_kzalloc(dev, sizeof(struct sun4i_lradc_data), GFP_KERNEL); - if (!lradc) -@@ -272,8 +273,13 @@ static int sun4i_lradc_probe(struct platform_device *pdev) - if (IS_ERR(lradc->base)) - return PTR_ERR(lradc->base); - -- error = devm_request_irq(dev, platform_get_irq(pdev, 0), -- sun4i_lradc_irq, 0, -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) { -+ dev_err(&pdev->dev, "Failed to get IRQ\n"); -+ return irq; -+ } -+ -+ error = devm_request_irq(dev, irq, sun4i_lradc_irq, 0, - "sun4i-a10-lradc-keys", lradc); - if (error) - return error; -@@ -282,6 +288,14 @@ static int sun4i_lradc_probe(struct platform_device *pdev) - if (error) - return error; - -+ device_init_wakeup(dev, true); -+ -+ error = dev_pm_set_wake_irq(dev, irq); -+ if (error) { -+ dev_err(dev, "Could not set wake IRQ\n"); -+ return error; -+ } -+ - return 0; - } - -diff --git a/drivers/input/misc/gpio-vibra.c b/drivers/input/misc/gpio-vibra.c -index f79f75595dd7..87508c3939e9 100644 ---- a/drivers/input/misc/gpio-vibra.c -+++ b/drivers/input/misc/gpio-vibra.c -@@ -39,7 +39,7 @@ static int gpio_vibrator_start(struct gpio_vibrator *vibrator) - struct device *pdev = vibrator->input->dev.parent; - int err; - -- if (!vibrator->vcc_on) { -+ if (vibrator->vcc && !vibrator->vcc_on) { - err = regulator_enable(vibrator->vcc); - if (err) { - dev_err(pdev, "failed to enable regulator: %d\n", err); -@@ -57,7 +57,7 @@ static void gpio_vibrator_stop(struct gpio_vibrator *vibrator) - { - gpiod_set_value_cansleep(vibrator->gpio, 0); - -- if (vibrator->vcc_on) { -+ if (vibrator->vcc && vibrator->vcc_on) { - regulator_disable(vibrator->vcc); - vibrator->vcc_on = false; - } -@@ -112,16 +112,19 @@ static int gpio_vibrator_probe(struct platform_device *pdev) - if (!vibrator->input) - return -ENOMEM; - -- vibrator->vcc = devm_regulator_get(&pdev->dev, "vcc"); -+ vibrator->vcc = devm_regulator_get_optional(&pdev->dev, "vcc"); - err = PTR_ERR_OR_ZERO(vibrator->vcc); -- if (err) { -+ if (err == -ENODEV) { -+ vibrator->vcc = NULL; -+ } else if (err) { - if (err != -EPROBE_DEFER) - dev_err(&pdev->dev, "Failed to request regulator: %d\n", - err); - return err; - } - -- vibrator->gpio = devm_gpiod_get(&pdev->dev, "enable", GPIOD_OUT_LOW); -+ vibrator->gpio = devm_gpiod_get_optional(&pdev->dev, "enable", -+ GPIOD_OUT_LOW); - err = PTR_ERR_OR_ZERO(vibrator->gpio); - if (err) { - if (err != -EPROBE_DEFER) -@@ -130,6 +133,11 @@ static int gpio_vibrator_probe(struct platform_device *pdev) - return err; - } - -+ if (!vibrator->vcc && !vibrator->gpio) { -+ dev_err(&pdev->dev, "Neither gpio nor regulator provided\n"); -+ return -EINVAL; -+ } -+ - INIT_WORK(&vibrator->play_work, gpio_vibrator_play_work); - - vibrator->input->name = "gpio-vibrator"; -diff --git a/drivers/input/touchscreen/cyttsp4_core.c b/drivers/input/touchscreen/cyttsp4_core.c -index dccbcb942fe5..c250d7be8ae1 100644 ---- a/drivers/input/touchscreen/cyttsp4_core.c -+++ b/drivers/input/touchscreen/cyttsp4_core.c -@@ -26,7 +26,7 @@ - #define CY_CORE_SLEEP_REQUEST_EXCLUSIVE_TIMEOUT 5000 - #define CY_CORE_MODE_CHANGE_TIMEOUT 1000 - #define CY_CORE_RESET_AND_WAIT_TIMEOUT 500 --#define CY_CORE_WAKEUP_TIMEOUT 500 -+#define CY_CORE_WAKEUP_TIMEOUT 250 - - #define CY_CORE_STARTUP_RETRY_COUNT 3 - -@@ -131,23 +131,18 @@ static int cyttsp4_hw_soft_reset(struct cyttsp4 *cd) - return 0; - } - --static int cyttsp4_hw_hard_reset(struct cyttsp4 *cd) --{ -- if (cd->cpdata->xres) { -- cd->cpdata->xres(cd->cpdata, cd->dev); -- dev_dbg(cd->dev, "%s: execute HARD reset\n", __func__); -- return 0; -- } -- dev_err(cd->dev, "%s: FAILED to execute HARD reset\n", __func__); -- return -ENOSYS; --} -- - static int cyttsp4_hw_reset(struct cyttsp4 *cd) - { -- int rc = cyttsp4_hw_hard_reset(cd); -- if (rc == -ENOSYS) -- rc = cyttsp4_hw_soft_reset(cd); -- return rc; -+ if (!cd->reset_gpio) -+ return cyttsp4_hw_soft_reset(cd); -+ -+ gpiod_set_value_cansleep(cd->reset_gpio, 1); -+ msleep(40); -+ -+ gpiod_set_value_cansleep(cd->reset_gpio, 0); -+ msleep(20); -+ -+ return 0; - } - - /* -@@ -541,8 +536,6 @@ static int cyttsp4_si_get_btn_data(struct cyttsp4 *cd) - { - struct cyttsp4_sysinfo *si = &cd->sysinfo; - int btn; -- int num_defined_keys; -- u16 *key_table; - void *p; - int rc = 0; - -@@ -559,24 +552,10 @@ static int cyttsp4_si_get_btn_data(struct cyttsp4 *cd) - } - si->btn = p; - -- if (cd->cpdata->sett[CY_IC_GRPNUM_BTN_KEYS] == NULL) -- num_defined_keys = 0; -- else if (cd->cpdata->sett[CY_IC_GRPNUM_BTN_KEYS]->data == NULL) -- num_defined_keys = 0; -- else -- num_defined_keys = cd->cpdata->sett -- [CY_IC_GRPNUM_BTN_KEYS]->size; -- -- for (btn = 0; btn < si->si_ofs.num_btns && -- btn < num_defined_keys; btn++) { -- key_table = (u16 *)cd->cpdata->sett -- [CY_IC_GRPNUM_BTN_KEYS]->data; -- si->btn[btn].key_code = key_table[btn]; -- si->btn[btn].state = CY_BTN_RELEASED; -- si->btn[btn].enabled = true; -- } -- for (; btn < si->si_ofs.num_btns; btn++) { -+ for (btn = 0; btn < si->si_ofs.num_btns; btn++) { - si->btn[btn].key_code = KEY_RESERVED; -+ if (btn < cd->n_keys) -+ si->btn[btn].key_code = cd->keys[btn].code; - si->btn[btn].state = CY_BTN_RELEASED; - si->btn[btn].enabled = true; - } -@@ -740,7 +719,7 @@ static void cyttsp4_queue_startup_(struct cyttsp4 *cd) - { - if (cd->startup_state == STARTUP_NONE) { - cd->startup_state = STARTUP_QUEUED; -- schedule_work(&cd->startup_work); -+ queue_work(cd->wq, &cd->startup_work); - dev_dbg(cd->dev, "%s: cyttsp4_startup queued\n", __func__); - } else { - dev_dbg(cd->dev, "%s: startup_state = %d\n", __func__, -@@ -748,41 +727,41 @@ static void cyttsp4_queue_startup_(struct cyttsp4 *cd) - } - } - --static void cyttsp4_report_slot_liftoff(struct cyttsp4_mt_data *md, -+static void cyttsp4_report_slot_liftoff(struct cyttsp4 *cd, - int max_slots) - { - int t; - -- if (md->num_prv_tch == 0) -+ if (cd->num_prv_tch == 0) - return; - - for (t = 0; t < max_slots; t++) { -- input_mt_slot(md->input, t); -- input_mt_report_slot_inactive(md->input); -+ input_mt_slot(cd->input, t); -+ input_mt_report_slot_inactive(cd->input); - } - } - --static void cyttsp4_lift_all(struct cyttsp4_mt_data *md) -+static void cyttsp4_lift_all(struct cyttsp4 *cd) - { -- if (!md->si) -+ if (!cd->si) - return; - -- if (md->num_prv_tch != 0) { -- cyttsp4_report_slot_liftoff(md, -- md->si->si_ofs.tch_abs[CY_TCH_T].max); -- input_sync(md->input); -- md->num_prv_tch = 0; -+ if (cd->num_prv_tch != 0) { -+ cyttsp4_report_slot_liftoff(cd, -+ cd->si->si_ofs.tch_abs[CY_TCH_T].max); -+ input_sync(cd->input); -+ cd->num_prv_tch = 0; - } - } - --static void cyttsp4_get_touch_axis(struct cyttsp4_mt_data *md, -+static void cyttsp4_get_touch_axis(struct cyttsp4 *cd, - int *axis, int size, int max, u8 *xy_data, int bofs) - { - int nbyte; - int next; - - for (nbyte = 0, *axis = 0, next = 0; nbyte < size; nbyte++) { -- dev_vdbg(&md->input->dev, -+ dev_vdbg(&cd->input->dev, - "%s: *axis=%02X(%d) size=%d max=%08X xy_data=%p" - " xy_data[%d]=%02X(%d) bofs=%d\n", - __func__, *axis, *axis, size, max, xy_data, next, -@@ -793,23 +772,23 @@ static void cyttsp4_get_touch_axis(struct cyttsp4_mt_data *md, - - *axis &= max - 1; - -- dev_vdbg(&md->input->dev, -+ dev_vdbg(&cd->input->dev, - "%s: *axis=%02X(%d) size=%d max=%08X xy_data=%p" - " xy_data[%d]=%02X(%d)\n", - __func__, *axis, *axis, size, max, xy_data, next, - xy_data[next], xy_data[next]); - } - --static void cyttsp4_get_touch(struct cyttsp4_mt_data *md, -+static void cyttsp4_get_touch(struct cyttsp4 *cd, - struct cyttsp4_touch *touch, u8 *xy_data) - { -- struct device *dev = &md->input->dev; -- struct cyttsp4_sysinfo *si = md->si; -+ struct device *dev = &cd->input->dev; -+ struct cyttsp4_sysinfo *si = cd->si; - enum cyttsp4_tch_abs abs; - bool flipped; - - for (abs = CY_TCH_X; abs < CY_TCH_NUM_ABS; abs++) { -- cyttsp4_get_touch_axis(md, &touch->abs[abs], -+ cyttsp4_get_touch_axis(cd, &touch->abs[abs], - si->si_ofs.tch_abs[abs].size, - si->si_ofs.tch_abs[abs].max, - xy_data + si->si_ofs.tch_abs[abs].ofs, -@@ -819,33 +798,33 @@ static void cyttsp4_get_touch(struct cyttsp4_mt_data *md, - touch->abs[abs], touch->abs[abs]); - } - -- if (md->pdata->flags & CY_FLAG_FLIP) { -+ if (cd->flags & CY_FLAG_FLIP) { - swap(touch->abs[CY_TCH_X], touch->abs[CY_TCH_Y]); - flipped = true; - } else - flipped = false; - -- if (md->pdata->flags & CY_FLAG_INV_X) { -+ if (cd->flags & CY_FLAG_INV_X) { - if (flipped) -- touch->abs[CY_TCH_X] = md->si->si_ofs.max_y - -+ touch->abs[CY_TCH_X] = cd->si->si_ofs.max_y - - touch->abs[CY_TCH_X]; - else -- touch->abs[CY_TCH_X] = md->si->si_ofs.max_x - -+ touch->abs[CY_TCH_X] = cd->si->si_ofs.max_x - - touch->abs[CY_TCH_X]; - } -- if (md->pdata->flags & CY_FLAG_INV_Y) { -+ if (cd->flags & CY_FLAG_INV_Y) { - if (flipped) -- touch->abs[CY_TCH_Y] = md->si->si_ofs.max_x - -+ touch->abs[CY_TCH_Y] = cd->si->si_ofs.max_x - - touch->abs[CY_TCH_Y]; - else -- touch->abs[CY_TCH_Y] = md->si->si_ofs.max_y - -+ touch->abs[CY_TCH_Y] = cd->si->si_ofs.max_y - - touch->abs[CY_TCH_Y]; - } - - dev_vdbg(dev, "%s: flip=%s inv-x=%s inv-y=%s x=%04X(%d) y=%04X(%d)\n", - __func__, flipped ? "true" : "false", -- md->pdata->flags & CY_FLAG_INV_X ? "true" : "false", -- md->pdata->flags & CY_FLAG_INV_Y ? "true" : "false", -+ cd->flags & CY_FLAG_INV_X ? "true" : "false", -+ cd->flags & CY_FLAG_INV_Y ? "true" : "false", - touch->abs[CY_TCH_X], touch->abs[CY_TCH_X], - touch->abs[CY_TCH_Y], touch->abs[CY_TCH_Y]); - } -@@ -864,55 +843,49 @@ static void cyttsp4_final_sync(struct input_dev *input, int max_slots, int *ids) - input_sync(input); - } - --static void cyttsp4_get_mt_touches(struct cyttsp4_mt_data *md, int num_cur_tch) -+static void cyttsp4_get_mt_touches(struct cyttsp4 *cd, int num_cur_tch) - { -- struct device *dev = &md->input->dev; -- struct cyttsp4_sysinfo *si = md->si; -+ struct device *dev = &cd->input->dev; -+ struct cyttsp4_sysinfo *si = cd->si; - struct cyttsp4_touch tch; -- int sig; - int i, j, t = 0; -- int ids[max(CY_TMA1036_MAX_TCH, CY_TMA4XX_MAX_TCH)]; -+ int ids[CY_TMA4XX_MAX_TCH + 1] = {0}; -+ struct cyttsp4_signal_def* sig; - -- memset(ids, 0, si->si_ofs.tch_abs[CY_TCH_T].max * sizeof(int)); - for (i = 0; i < num_cur_tch; i++) { -- cyttsp4_get_touch(md, &tch, si->xy_data + -- (i * si->si_ofs.tch_rec_size)); -- if ((tch.abs[CY_TCH_T] < md->pdata->frmwrk->abs -- [(CY_ABS_ID_OST * CY_NUM_ABS_SET) + CY_MIN_OST]) || -- (tch.abs[CY_TCH_T] > md->pdata->frmwrk->abs -- [(CY_ABS_ID_OST * CY_NUM_ABS_SET) + CY_MAX_OST])) { -+ cyttsp4_get_touch(cd, &tch, si->xy_data + -+ (i * si->si_ofs.tch_rec_size)); -+ -+ sig = &cd->signals[CY_ABS_ID_OST]; -+ if (tch.abs[CY_TCH_T] < sig->min || -+ tch.abs[CY_TCH_T] > sig->max) { - dev_err(dev, "%s: tch=%d -> bad trk_id=%d max_id=%d\n", -- __func__, i, tch.abs[CY_TCH_T], -- md->pdata->frmwrk->abs[(CY_ABS_ID_OST * -- CY_NUM_ABS_SET) + CY_MAX_OST]); -+ __func__, i, tch.abs[CY_TCH_T], sig->max); - continue; - } - - /* use 0 based track id's */ -- sig = md->pdata->frmwrk->abs -- [(CY_ABS_ID_OST * CY_NUM_ABS_SET) + 0]; -- if (sig != CY_IGNORE_VALUE) { -- t = tch.abs[CY_TCH_T] - md->pdata->frmwrk->abs -- [(CY_ABS_ID_OST * CY_NUM_ABS_SET) + CY_MIN_OST]; -+ if (sig->signal >= 0) { -+ t = tch.abs[CY_TCH_T] - sig->min; - if (tch.abs[CY_TCH_E] == CY_EV_LIFTOFF) { - dev_dbg(dev, "%s: t=%d e=%d lift-off\n", - __func__, t, tch.abs[CY_TCH_E]); - goto cyttsp4_get_mt_touches_pr_tch; - } -- input_mt_slot(md->input, t); -- input_mt_report_slot_state(md->input, MT_TOOL_FINGER, -- true); -+ input_mt_slot(cd->input, t); -+ input_mt_report_slot_state(cd->input, MT_TOOL_FINGER, -+ true); - ids[t] = true; - } - - /* all devices: position and pressure fields */ - for (j = 0; j <= CY_ABS_W_OST; j++) { -- sig = md->pdata->frmwrk->abs[((CY_ABS_X_OST + j) * -- CY_NUM_ABS_SET) + 0]; -- if (sig != CY_IGNORE_VALUE) -- input_report_abs(md->input, sig, -- tch.abs[CY_TCH_X + j]); -+ sig = &cd->signals[j]; -+ if (sig->signal >= 0) -+ input_report_abs(cd->input, sig->signal, -+ tch.abs[CY_TCH_X + j]); - } -+ - if (si->si_ofs.tch_rec_size > CY_TMA1036_TCH_REC_SIZE) { - /* - * TMA400 size and orientation fields: -@@ -925,12 +898,10 @@ static void cyttsp4_get_mt_touches(struct cyttsp4_mt_data *md, int num_cur_tch) - - /* Get the extended touch fields */ - for (j = 0; j < CY_NUM_EXT_TCH_FIELDS; j++) { -- sig = md->pdata->frmwrk->abs -- [((CY_ABS_MAJ_OST + j) * -- CY_NUM_ABS_SET) + 0]; -- if (sig != CY_IGNORE_VALUE) -- input_report_abs(md->input, sig, -- tch.abs[CY_TCH_MAJ + j]); -+ sig = &cd->signals[CY_ABS_MAJ_OST + j]; -+ if (sig->signal >= 0) -+ input_report_abs(cd->input, sig->signal, -+ tch.abs[CY_TCH_MAJ + j]); - } - } - -@@ -956,9 +927,9 @@ cyttsp4_get_mt_touches_pr_tch: - tch.abs[CY_TCH_E]); - } - -- cyttsp4_final_sync(md->input, si->si_ofs.tch_abs[CY_TCH_T].max, ids); -+ cyttsp4_final_sync(cd->input, si->si_ofs.tch_abs[CY_TCH_T].max, ids); - -- md->num_prv_tch = num_cur_tch; -+ cd->num_prv_tch = num_cur_tch; - - return; - } -@@ -966,9 +937,8 @@ cyttsp4_get_mt_touches_pr_tch: - /* read xy_data for all current touches */ - static int cyttsp4_xy_worker(struct cyttsp4 *cd) - { -- struct cyttsp4_mt_data *md = &cd->md; -- struct device *dev = &md->input->dev; -- struct cyttsp4_sysinfo *si = md->si; -+ struct device *dev = &cd->input->dev; -+ struct cyttsp4_sysinfo *si = cd->si; - u8 num_cur_tch; - u8 hst_mode; - u8 rep_len; -@@ -1040,9 +1010,9 @@ static int cyttsp4_xy_worker(struct cyttsp4 *cd) - dev_vdbg(dev, "%s: extract data num_cur_tch=%d\n", __func__, - num_cur_tch); - if (num_cur_tch) -- cyttsp4_get_mt_touches(md, num_cur_tch); -+ cyttsp4_get_mt_touches(cd, num_cur_tch); - else -- cyttsp4_lift_all(md); -+ cyttsp4_lift_all(cd); - - rc = 0; - -@@ -1053,21 +1023,20 @@ cyttsp4_xy_worker_exit: - static int cyttsp4_mt_attention(struct cyttsp4 *cd) - { - struct device *dev = cd->dev; -- struct cyttsp4_mt_data *md = &cd->md; - int rc = 0; - -- if (!md->si) -+ if (!cd->si) - return 0; - -- mutex_lock(&md->report_lock); -- if (!md->is_suspended) { -+ mutex_lock(&cd->report_lock); -+ if (!cd->is_suspended) { - /* core handles handshake */ - rc = cyttsp4_xy_worker(cd); - } else { - dev_vdbg(dev, "%s: Ignoring report while suspended\n", - __func__); - } -- mutex_unlock(&md->report_lock); -+ mutex_unlock(&cd->report_lock); - if (rc < 0) - dev_err(dev, "%s: xy_worker error r=%d\n", __func__, rc); - -@@ -1233,13 +1202,6 @@ cyttsp4_irq_handshake: - dev_err(dev, "%s: Fail handshake mode=0x%02X r=%d\n", - __func__, mode[0], rc); - -- /* -- * a non-zero udelay period is required for using -- * IRQF_TRIGGER_LOW in order to delay until the -- * device completes isr deassert -- */ -- udelay(cd->cpdata->level_irq_udelay); -- - cyttsp4_irq_exit: - mutex_unlock(&cd->system_lock); - return IRQ_HANDLED; -@@ -1274,9 +1236,7 @@ static void cyttsp4_watchdog_timer(struct timer_list *t) - - dev_vdbg(cd->dev, "%s: Watchdog timer triggered\n", __func__); - -- schedule_work(&cd->watchdog_work); -- -- return; -+ queue_work(cd->wq, &cd->watchdog_work); - } - - static int cyttsp4_request_exclusive(struct cyttsp4 *cd, void *ownptr, -@@ -1498,6 +1458,24 @@ cyttsp4_timer_watchdog_exit_error: - return; - } - -+#if 0 -+static int cyttsp4_set_power(struct cyttsp4* cd, int on) -+{ -+ dev_dbg(cd->dev, "Power %s\n", on ? "up" : "down"); -+ -+ if (!cd->power_gpio) -+ return -ENOSYS; -+ -+ //atomic_set(&cd->ignore_irq, 1); -+ -+ //gpiod_set_value_cansleep(cd->power_gpio, on); -+ -+ //atomic_set(&cd->ignore_irq, 0); -+ -+ return -ENOSYS; -+} -+#endif -+ - static int cyttsp4_core_sleep_(struct cyttsp4 *cd) - { - enum cyttsp4_sleep_state ss = SS_SLEEP_ON; -@@ -1544,18 +1522,14 @@ static int cyttsp4_core_sleep_(struct cyttsp4 *cd) - } - dev_vdbg(cd->dev, "%s: write DEEP SLEEP succeeded\n", __func__); - -- if (cd->cpdata->power) { -- dev_dbg(cd->dev, "%s: Power down HW\n", __func__); -- rc = cd->cpdata->power(cd->cpdata, 0, cd->dev, &cd->ignore_irq); -- } else { -- dev_dbg(cd->dev, "%s: No power function\n", __func__); -- rc = 0; -- } -+ /* -+ rc = cyttsp4_set_power(cd, 0); - if (rc < 0) { - dev_err(cd->dev, "%s: HW Power down fails r=%d\n", - __func__, rc); - goto error; - } -+ */ - - /* Give time to FW to sleep */ - msleep(50); -@@ -1661,7 +1635,7 @@ reset: - goto exit; - } - -- cyttsp4_lift_all(&cd->md); -+ cyttsp4_lift_all(cd); - - /* restore to sleep if was suspended */ - mutex_lock(&cd->system_lock); -@@ -1769,6 +1743,7 @@ static int cyttsp4_core_sleep(struct cyttsp4 *cd) - - static int cyttsp4_core_wake_(struct cyttsp4 *cd) - { -+#if 0 - struct device *dev = cd->dev; - int rc; - u8 mode; -@@ -1784,19 +1759,15 @@ static int cyttsp4_core_wake_(struct cyttsp4 *cd) - cd->int_status |= CY_INT_AWAKE; - cd->sleep_state = SS_WAKING; - -- if (cd->cpdata->power) { -- dev_dbg(dev, "%s: Power up HW\n", __func__); -- rc = cd->cpdata->power(cd->cpdata, 1, dev, &cd->ignore_irq); -- } else { -- dev_dbg(dev, "%s: No power function\n", __func__); -- rc = -ENOSYS; -- } -+ rc = cyttsp4_set_power(cd, 1); - if (rc < 0) { -- dev_err(dev, "%s: HW Power up fails r=%d\n", -+ if (rc != -ENOSYS) -+ dev_err(dev, "%s: HW Power up fails r=%d\n", - __func__, rc); - - /* Initiate a read transaction to wake up */ -- cyttsp4_adap_read(cd, CY_REG_BASE, sizeof(mode), &mode); -+ rc = cyttsp4_adap_read(cd, CY_REG_BASE, sizeof(mode), &mode); -+ dev_err(dev, "Waking up by read rc=%d\n", rc); - } else - dev_vdbg(cd->dev, "%s: HW power up succeeds\n", - __func__); -@@ -1813,7 +1784,13 @@ static int cyttsp4_core_wake_(struct cyttsp4 *cd) - cyttsp4_queue_startup_(cd); - mutex_unlock(&cd->system_lock); - } -- -+#else -+ mutex_lock(&cd->system_lock); -+ cd->int_status &= ~CY_INT_AWAKE; -+ /* Try starting up */ -+ cyttsp4_queue_startup_(cd); -+ mutex_unlock(&cd->system_lock); -+#endif - mutex_lock(&cd->system_lock); - cd->sleep_state = SS_SLEEP_OFF; - mutex_unlock(&cd->system_lock); -@@ -1848,10 +1825,9 @@ static int cyttsp4_core_wake(struct cyttsp4 *cd) - static int cyttsp4_core_suspend(struct device *dev) - { - struct cyttsp4 *cd = dev_get_drvdata(dev); -- struct cyttsp4_mt_data *md = &cd->md; - int rc; - -- md->is_suspended = true; -+ cd->is_suspended = true; - - rc = cyttsp4_core_sleep(cd); - if (rc < 0) { -@@ -1864,10 +1840,9 @@ static int cyttsp4_core_suspend(struct device *dev) - static int cyttsp4_core_resume(struct device *dev) - { - struct cyttsp4 *cd = dev_get_drvdata(dev); -- struct cyttsp4_mt_data *md = &cd->md; - int rc; - -- md->is_suspended = false; -+ cd->is_suspended = false; - - rc = cyttsp4_core_wake(cd); - if (rc < 0) { -@@ -1893,79 +1868,71 @@ static int cyttsp4_mt_open(struct input_dev *input) - - static void cyttsp4_mt_close(struct input_dev *input) - { -- struct cyttsp4_mt_data *md = input_get_drvdata(input); -- mutex_lock(&md->report_lock); -- if (!md->is_suspended) -+ struct cyttsp4 *cd = input_get_drvdata(input); -+ mutex_lock(&cd->report_lock); -+ if (!cd->is_suspended) - pm_runtime_put(input->dev.parent); -- mutex_unlock(&md->report_lock); -+ mutex_unlock(&cd->report_lock); - } - - - static int cyttsp4_setup_input_device(struct cyttsp4 *cd) - { - struct device *dev = cd->dev; -- struct cyttsp4_mt_data *md = &cd->md; -- int signal = CY_IGNORE_VALUE; -+ struct cyttsp4_signal_def *signal; - int max_x, max_y, max_p, min, max; - int max_x_tmp, max_y_tmp; - int i; - int rc; - - dev_vdbg(dev, "%s: Initialize event signals\n", __func__); -- __set_bit(EV_ABS, md->input->evbit); -- __set_bit(EV_REL, md->input->evbit); -- __set_bit(EV_KEY, md->input->evbit); -+ __set_bit(EV_ABS, cd->input->evbit); -+ __set_bit(EV_REL, cd->input->evbit); -+ __set_bit(EV_KEY, cd->input->evbit); - -- max_x_tmp = md->si->si_ofs.max_x; -- max_y_tmp = md->si->si_ofs.max_y; -+ max_x_tmp = cd->si->si_ofs.max_x; -+ max_y_tmp = cd->si->si_ofs.max_y; - - /* get maximum values from the sysinfo data */ -- if (md->pdata->flags & CY_FLAG_FLIP) { -+ if (cd->flags & CY_FLAG_FLIP) { - max_x = max_y_tmp - 1; - max_y = max_x_tmp - 1; - } else { - max_x = max_x_tmp - 1; - max_y = max_y_tmp - 1; - } -- max_p = md->si->si_ofs.max_p; -+ max_p = cd->si->si_ofs.max_p; - - /* set event signal capabilities */ -- for (i = 0; i < (md->pdata->frmwrk->size / CY_NUM_ABS_SET); i++) { -- signal = md->pdata->frmwrk->abs -- [(i * CY_NUM_ABS_SET) + CY_SIGNAL_OST]; -- if (signal != CY_IGNORE_VALUE) { -- __set_bit(signal, md->input->absbit); -- min = md->pdata->frmwrk->abs -- [(i * CY_NUM_ABS_SET) + CY_MIN_OST]; -- max = md->pdata->frmwrk->abs -- [(i * CY_NUM_ABS_SET) + CY_MAX_OST]; -- if (i == CY_ABS_ID_OST) { -- /* shift track ids down to start at 0 */ -- max = max - min; -- min = min - min; -- } else if (i == CY_ABS_X_OST) -- max = max_x; -- else if (i == CY_ABS_Y_OST) -- max = max_y; -- else if (i == CY_ABS_P_OST) -- max = max_p; -- input_set_abs_params(md->input, signal, min, max, -- md->pdata->frmwrk->abs -- [(i * CY_NUM_ABS_SET) + CY_FUZZ_OST], -- md->pdata->frmwrk->abs -- [(i * CY_NUM_ABS_SET) + CY_FLAT_OST]); -- dev_dbg(dev, "%s: register signal=%02X min=%d max=%d\n", -- __func__, signal, min, max); -- if ((i == CY_ABS_ID_OST) && -- (md->si->si_ofs.tch_rec_size < -- CY_TMA4XX_TCH_REC_SIZE)) -- break; -- } -+ for (i = 0; i < cd->n_signals; i++) { -+ signal = &cd->signals[i]; -+ -+ __set_bit(signal->signal, cd->input->absbit); -+ -+ max = signal->max; -+ min = signal->min; -+ -+ if (signal->signal == ABS_MT_POSITION_X) -+ max = max_x; -+ else if (signal->signal == ABS_MT_POSITION_Y) -+ max = max_y; -+ else if (signal->signal == ABS_MT_PRESSURE) -+ max = max_p; -+ -+ input_set_abs_params(cd->input, signal->signal, min, max, -+ signal->fuzz, signal->flat); -+ dev_dbg(dev, "%s: register signal=%02X min=%d max=%d\n", -+ __func__, signal->signal, min, max); -+ -+ if ((i == CY_ABS_ID_OST) && -+ (cd->si->si_ofs.tch_rec_size < -+ CY_TMA4XX_TCH_REC_SIZE)) -+ break; - } - -- input_mt_init_slots(md->input, md->si->si_ofs.tch_abs[CY_TCH_T].max, -+ input_mt_init_slots(cd->input, cd->si->si_ofs.tch_abs[CY_TCH_T].max, - INPUT_MT_DIRECT); -- rc = input_register_device(md->input); -+ rc = input_register_device(cd->input); - if (rc < 0) - dev_err(dev, "%s: Error, failed register input device r=%d\n", - __func__, rc); -@@ -1975,34 +1942,31 @@ static int cyttsp4_setup_input_device(struct cyttsp4 *cd) - static int cyttsp4_mt_probe(struct cyttsp4 *cd) - { - struct device *dev = cd->dev; -- struct cyttsp4_mt_data *md = &cd->md; -- struct cyttsp4_mt_platform_data *pdata = cd->pdata->mt_pdata; - int rc = 0; - -- mutex_init(&md->report_lock); -- md->pdata = pdata; -+ mutex_init(&cd->report_lock); - /* Create the input device and register it. */ - dev_vdbg(dev, "%s: Create the input device and register it\n", - __func__); -- md->input = input_allocate_device(); -- if (md->input == NULL) { -+ cd->input = input_allocate_device(); -+ if (cd->input == NULL) { - dev_err(dev, "%s: Error, failed to allocate input device\n", - __func__); - rc = -ENOSYS; - goto error_alloc_failed; - } - -- md->input->name = pdata->inp_dev_name; -- scnprintf(md->phys, sizeof(md->phys)-1, "%s", dev_name(dev)); -- md->input->phys = md->phys; -- md->input->id.bustype = cd->bus_ops->bustype; -- md->input->dev.parent = dev; -- md->input->open = cyttsp4_mt_open; -- md->input->close = cyttsp4_mt_close; -- input_set_drvdata(md->input, md); -+ cd->input->name = "mt_ctp"; -+ scnprintf(cd->phys, sizeof(cd->phys)-1, "%s", dev_name(dev)); -+ cd->input->phys = cd->phys; -+ cd->input->id.bustype = cd->bus_ops->bustype; -+ cd->input->dev.parent = dev; -+ cd->input->open = cyttsp4_mt_open; -+ cd->input->close = cyttsp4_mt_close; -+ input_set_drvdata(cd->input, cd); - - /* get sysinfo */ -- md->si = &cd->sysinfo; -+ cd->si = &cd->sysinfo; - - rc = cyttsp4_setup_input_device(cd); - if (rc) -@@ -2011,45 +1975,92 @@ static int cyttsp4_mt_probe(struct cyttsp4 *cd) - return 0; - - error_init_input: -- input_free_device(md->input); -+ input_free_device(cd->input); - error_alloc_failed: - dev_err(dev, "%s failed.\n", __func__); - return rc; - } - -+static struct cyttsp4_signal_def cyttsp4_default_signals[CY_NUM_ABS_OST] = { -+ [CY_ABS_X_OST] = { ABS_MT_POSITION_X, 0, 758, }, -+ [CY_ABS_Y_OST] = { ABS_MT_POSITION_Y, 0, 1024, }, -+ [CY_ABS_P_OST] = { ABS_MT_PRESSURE, 0, 255, }, -+ [CY_ABS_W_OST] = { -1 }, -+ [CY_ABS_ID_OST] = { ABS_MT_TRACKING_ID, 0, 15, }, -+ [CY_ABS_MAJ_OST] = { ABS_MT_TOUCH_MAJOR, 0, 255, }, -+ [CY_ABS_MIN_OST] = { ABS_MT_TOUCH_MINOR, 0, 255, }, -+ [CY_ABS_OR_OST] = { ABS_MT_ORIENTATION, -127, 127, }, -+}; -+ - struct cyttsp4 *cyttsp4_probe(const struct cyttsp4_bus_ops *ops, - struct device *dev, u16 irq, size_t xfer_buf_size) - { - struct cyttsp4 *cd; -- struct cyttsp4_platform_data *pdata = dev_get_platdata(dev); -- unsigned long irq_flags; - int rc = 0; - -- if (!pdata || !pdata->core_pdata || !pdata->mt_pdata) { -- dev_err(dev, "%s: Missing platform data\n", __func__); -- rc = -ENODEV; -- goto error_no_pdata; -- } -- -- cd = kzalloc(sizeof(*cd), GFP_KERNEL); -+ cd = devm_kzalloc(dev, sizeof(*cd), GFP_KERNEL); - if (!cd) { - dev_err(dev, "%s: Error, kzalloc\n", __func__); -- rc = -ENOMEM; -- goto error_alloc_data; -+ return ERR_PTR(-ENOMEM); -+ } -+ -+ cd->irq = irq; -+ cd->signals = cyttsp4_default_signals; -+ cd->n_signals = ARRAY_SIZE(cyttsp4_default_signals); -+ -+ if (device_property_read_bool(dev, "flip")) -+ cd->flags |= CY_FLAG_FLIP; -+ if (device_property_read_bool(dev, "invert-x")) -+ cd->flags |= CY_FLAG_INV_X; -+ if (device_property_read_bool(dev, "invert-y")) -+ cd->flags |= CY_FLAG_INV_Y; -+ -+ cd->vdd_supply = devm_regulator_get(dev, "vdd"); -+ if (IS_ERR(cd->vdd_supply)) { -+ rc = PTR_ERR(cd->vdd_supply); -+ if (rc != -EPROBE_DEFER) -+ dev_err(dev, "can't get vdd power (%d)\n", rc); -+ return ERR_PTR(rc); - } - -- cd->xfer_buf = kzalloc(xfer_buf_size, GFP_KERNEL); -+ rc = regulator_enable(cd->vdd_supply); -+ if (rc) { -+ dev_err(dev, "can't enable vdd power (%d)\n", rc); -+ return ERR_PTR(rc); -+ } -+ -+ cd->power_gpio = devm_gpiod_get(dev, "power", GPIOD_OUT_HIGH); -+ if (IS_ERR(cd->reset_gpio)) { -+ rc = PTR_ERR(cd->reset_gpio); -+ dev_err(dev, "can't get reset gpio (%d)\n", rc); -+ goto error_disable_vdd; -+ } -+ -+ cd->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); -+ if (IS_ERR(cd->reset_gpio)) { -+ rc = PTR_ERR(cd->reset_gpio); -+ dev_err(dev, "can't get reset gpio (%d)\n", rc); -+ goto error_disable_vdd; -+ } -+ -+ cd->xfer_buf = devm_kzalloc(dev, xfer_buf_size, GFP_KERNEL); - if (!cd->xfer_buf) { - dev_err(dev, "%s: Error, kzalloc\n", __func__); - rc = -ENOMEM; -- goto error_free_cd; -+ goto error_disable_vdd; -+ } -+ -+ cd->wq = alloc_workqueue("cyttsp4", WQ_SYSFS, 0); -+ if (!cd->wq) { -+ rc = -ENOMEM; -+ dev_err(dev, "failed to allocate workqueue\n"); -+ goto error_disable_vdd; - } - - /* Initialize device info */ - cd->dev = dev; -- cd->pdata = pdata; -- cd->cpdata = pdata->core_pdata; - cd->bus_ops = ops; -+ dev_set_drvdata(dev, cd); - - /* Initialize mutexes and spinlocks */ - mutex_init(&cd->system_lock); -@@ -2063,43 +2074,20 @@ struct cyttsp4 *cyttsp4_probe(const struct cyttsp4_bus_ops *ops, - INIT_WORK(&cd->watchdog_work, cyttsp4_watchdog_work); - - /* Initialize IRQ */ -- cd->irq = gpio_to_irq(cd->cpdata->irq_gpio); -- if (cd->irq < 0) { -- rc = -EINVAL; -- goto error_free_xfer; -- } -- -- dev_set_drvdata(dev, cd); -- -- /* Call platform init function */ -- if (cd->cpdata->init) { -- dev_dbg(cd->dev, "%s: Init HW\n", __func__); -- rc = cd->cpdata->init(cd->cpdata, 1, cd->dev); -- } else { -- dev_dbg(cd->dev, "%s: No HW INIT function\n", __func__); -- rc = 0; -- } -- if (rc < 0) -- dev_err(cd->dev, "%s: HW Init fail r=%d\n", __func__, rc); -- -- dev_dbg(dev, "%s: initialize threaded irq=%d\n", __func__, cd->irq); -- if (cd->cpdata->level_irq_udelay > 0) -- /* use level triggered interrupts */ -- irq_flags = IRQF_TRIGGER_LOW | IRQF_ONESHOT; -- else -- /* use edge triggered interrupts */ -- irq_flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT; -- -- rc = request_threaded_irq(cd->irq, NULL, cyttsp4_irq, irq_flags, -- dev_name(dev), cd); -- if (rc < 0) { -- dev_err(dev, "%s: Error, could not request irq\n", __func__); -- goto error_request_irq; -+ rc = devm_request_threaded_irq(dev, cd->irq, NULL, cyttsp4_irq, -+ IRQF_ONESHOT | IRQF_TRIGGER_FALLING, -+ dev_name(dev), cd); -+ if (rc) { -+ dev_err(cd->dev, "failed to request IRQ %d, err: %d\n", -+ cd->irq, rc); -+ goto error_free_wq; - } - - /* Setup watchdog timer */ - timer_setup(&cd->watchdog_timer, cyttsp4_watchdog_timer, 0); - -+ //XXX: msleep(300); -+ - /* - * call startup directly to ensure that the device - * is tested before leaving the probe -@@ -2107,17 +2095,15 @@ struct cyttsp4 *cyttsp4_probe(const struct cyttsp4_bus_ops *ops, - rc = cyttsp4_startup(cd); - - /* Do not fail probe if startup fails but the device is detected */ -- if (rc < 0 && cd->mode == CY_MODE_UNKNOWN) { -- dev_err(cd->dev, "%s: Fail initial startup r=%d\n", -+ if (rc && cd->mode == CY_MODE_UNKNOWN) { -+ dev_err(cd->dev, "%s: Fail initial startup rc=%d\n", - __func__, rc); - goto error_startup; - } - - rc = cyttsp4_mt_probe(cd); -- if (rc < 0) { -- dev_err(dev, "%s: Error, fail mt probe\n", __func__); -+ if (rc) - goto error_startup; -- } - - pm_runtime_enable(dev); - -@@ -2128,32 +2114,27 @@ error_startup: - cyttsp4_stop_wd_timer(cd); - pm_runtime_disable(dev); - cyttsp4_free_si_ptrs(cd); -- free_irq(cd->irq, cd); --error_request_irq: -- if (cd->cpdata->init) -- cd->cpdata->init(cd->cpdata, 0, dev); --error_free_xfer: -- kfree(cd->xfer_buf); --error_free_cd: -- kfree(cd); --error_alloc_data: --error_no_pdata: -- dev_err(dev, "%s failed.\n", __func__); -+error_free_wq: -+ destroy_workqueue(cd->wq); -+error_disable_vdd: -+ gpiod_set_value_cansleep(cd->reset_gpio, 1); -+ gpiod_set_value_cansleep(cd->power_gpio, 0); -+ regulator_disable(cd->vdd_supply); - return ERR_PTR(rc); - } - EXPORT_SYMBOL_GPL(cyttsp4_probe); - --static void cyttsp4_mt_release(struct cyttsp4_mt_data *md) -+static void cyttsp4_mt_release(struct cyttsp4 *cd) - { -- input_unregister_device(md->input); -- input_set_drvdata(md->input, NULL); -+ input_unregister_device(cd->input); -+ input_set_drvdata(cd->input, NULL); - } - - int cyttsp4_remove(struct cyttsp4 *cd) - { - struct device *dev = cd->dev; - -- cyttsp4_mt_release(&cd->md); -+ cyttsp4_mt_release(cd); - - /* - * Suspend the device before freeing the startup_work and stopping -@@ -2162,15 +2143,10 @@ int cyttsp4_remove(struct cyttsp4 *cd) - pm_runtime_suspend(dev); - pm_runtime_disable(dev); - -- cancel_work_sync(&cd->startup_work); -- - cyttsp4_stop_wd_timer(cd); -- -- free_irq(cd->irq, cd); -- if (cd->cpdata->init) -- cd->cpdata->init(cd->cpdata, 0, dev); -+ cancel_work_sync(&cd->startup_work); -+ destroy_workqueue(cd->wq); - cyttsp4_free_si_ptrs(cd); -- kfree(cd); - return 0; - } - EXPORT_SYMBOL_GPL(cyttsp4_remove); -@@ -2178,3 +2154,4 @@ EXPORT_SYMBOL_GPL(cyttsp4_remove); - MODULE_LICENSE("GPL"); - MODULE_DESCRIPTION("Cypress TrueTouch(R) Standard touchscreen core driver"); - MODULE_AUTHOR("Cypress"); -+MODULE_AUTHOR("Ondrej Jirman "); -diff --git a/drivers/input/touchscreen/cyttsp4_core.h b/drivers/input/touchscreen/cyttsp4_core.h -index 6262f6e45075..ac2d7b303f39 100644 ---- a/drivers/input/touchscreen/cyttsp4_core.h -+++ b/drivers/input/touchscreen/cyttsp4_core.h -@@ -24,6 +24,8 @@ - #include - #include - #include -+#include -+#include - - #define CY_REG_BASE 0x00 - -@@ -60,7 +62,7 @@ enum cyttsp_cmd_bits { - }; - - /* Timeout in ms. */ --#define CY_WATCHDOG_TIMEOUT 1000 -+#define CY_WATCHDOG_TIMEOUT 10000 - - #define CY_MAX_PRINT_SIZE 512 - #ifdef VERBOSE_DEBUG -@@ -305,16 +307,6 @@ struct cyttsp4_sysinfo { - u8 *xy_data; /* operational touch regs */ - }; - --struct cyttsp4_mt_data { -- struct cyttsp4_mt_platform_data *pdata; -- struct cyttsp4_sysinfo *si; -- struct input_dev *input; -- struct mutex report_lock; -- bool is_suspended; -- char phys[NAME_MAX]; -- int num_prv_tch; --}; -- - struct cyttsp4 { - struct device *dev; - struct mutex system_lock; -@@ -324,6 +316,7 @@ struct cyttsp4 { - enum cyttsp4_startup_state startup_state; - int int_status; - wait_queue_head_t wait_q; -+ struct workqueue_struct *wq; - int irq; - struct work_struct startup_work; - struct work_struct watchdog_work; -@@ -333,14 +326,25 @@ struct cyttsp4 { - int exclusive_waits; - atomic_t ignore_irq; - bool invalid_touch_app; -- struct cyttsp4_mt_data md; -- struct cyttsp4_platform_data *pdata; -- struct cyttsp4_core_platform_data *cpdata; -+ struct cyttsp4_sysinfo *si; -+ struct input_dev *input; -+ struct mutex report_lock; -+ bool is_suspended; -+ char phys[NAME_MAX]; -+ int num_prv_tch; - const struct cyttsp4_bus_ops *bus_ops; - u8 *xfer_buf; - #ifdef VERBOSE_DEBUG - u8 pr_buf[CY_MAX_PRBUF_SIZE]; - #endif -+ int flags; -+ int n_signals; -+ struct cyttsp4_signal_def *signals; -+ int n_keys; -+ struct cyttsp4_virtual_key* keys; -+ struct gpio_desc *reset_gpio; -+ struct gpio_desc *power_gpio; -+ struct regulator *vdd_supply; - }; - - struct cyttsp4_bus_ops { -@@ -363,32 +367,6 @@ enum cyttsp4_hst_mode_bits { - CY_HST_RESET = (1 << 0), - }; - --/* abs settings */ --#define CY_IGNORE_VALUE 0xFFFF -- --/* abs signal capabilities offsets in the frameworks array */ --enum cyttsp4_sig_caps { -- CY_SIGNAL_OST, -- CY_MIN_OST, -- CY_MAX_OST, -- CY_FUZZ_OST, -- CY_FLAT_OST, -- CY_NUM_ABS_SET /* number of signal capability fields */ --}; -- --/* abs axis signal offsets in the framworks array */ --enum cyttsp4_sig_ost { -- CY_ABS_X_OST, -- CY_ABS_Y_OST, -- CY_ABS_P_OST, -- CY_ABS_W_OST, -- CY_ABS_ID_OST, -- CY_ABS_MAJ_OST, -- CY_ABS_MIN_OST, -- CY_ABS_OR_OST, -- CY_NUM_ABS_OST /* number of abs signals */ --}; -- - enum cyttsp4_flags { - CY_FLAG_NONE = 0x00, - CY_FLAG_HOVER = 0x04, -@@ -424,6 +402,31 @@ enum cyttsp4_event_id { - /* y-axis, 0:origin is on top side of panel, 1: bottom */ - #define CY_PCFG_ORIGIN_Y_MASK 0x80 - -+/* abs axis signal offsets in the signals array */ -+enum cyttsp4_sig_ost { -+ CY_ABS_X_OST, -+ CY_ABS_Y_OST, -+ CY_ABS_P_OST, -+ CY_ABS_W_OST, -+ CY_ABS_ID_OST, -+ CY_ABS_MAJ_OST, -+ CY_ABS_MIN_OST, -+ CY_ABS_OR_OST, -+ CY_NUM_ABS_OST /* number of abs signals */ -+}; -+ -+struct cyttsp4_virtual_key { -+ int code; -+}; -+ -+struct cyttsp4_signal_def { -+ int signal; -+ int min; -+ int max; -+ int fuzz; -+ int flat; -+}; -+ - static inline int cyttsp4_adap_read(struct cyttsp4 *ts, u16 addr, int size, - void *buf) - { -diff --git a/drivers/input/touchscreen/cyttsp4_i2c.c b/drivers/input/touchscreen/cyttsp4_i2c.c -index c65ccb2f4716..f6095a1760e9 100644 ---- a/drivers/input/touchscreen/cyttsp4_i2c.c -+++ b/drivers/input/touchscreen/cyttsp4_i2c.c -@@ -53,14 +53,14 @@ static int cyttsp4_i2c_remove(struct i2c_client *client) - } - - static const struct i2c_device_id cyttsp4_i2c_id[] = { -- { CYTTSP4_I2C_NAME, 0 }, -+ { "cyttsp4_i2c_adapter", 0 }, - { } - }; - MODULE_DEVICE_TABLE(i2c, cyttsp4_i2c_id); - - static struct i2c_driver cyttsp4_i2c_driver = { - .driver = { -- .name = CYTTSP4_I2C_NAME, -+ .name = "cyttsp4_i2c_adapter", - .pm = &cyttsp4_pm_ops, - }, - .probe = cyttsp4_i2c_probe, -diff --git a/drivers/input/touchscreen/cyttsp4_spi.c b/drivers/input/touchscreen/cyttsp4_spi.c -index 2aec41eb76b7..b26d8e1ff93b 100644 ---- a/drivers/input/touchscreen/cyttsp4_spi.c -+++ b/drivers/input/touchscreen/cyttsp4_spi.c -@@ -174,7 +174,7 @@ static int cyttsp4_spi_remove(struct spi_device *spi) - - static struct spi_driver cyttsp4_spi_driver = { - .driver = { -- .name = CYTTSP4_SPI_NAME, -+ .name = "cyttsp4_spi_adapter", - .pm = &cyttsp4_pm_ops, - }, - .probe = cyttsp4_spi_probe, -diff --git a/drivers/input/touchscreen/goodix.c b/drivers/input/touchscreen/goodix.c -index c682b028f0a2..05c6ce1026ca 100644 ---- a/drivers/input/touchscreen/goodix.c -+++ b/drivers/input/touchscreen/goodix.c -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - #include - - #define GOODIX_GPIO_INT_NAME "irq" -@@ -115,6 +116,7 @@ struct goodix_ts_data { - unsigned int contact_size; - u8 config[GOODIX_CONFIG_MAX_LENGTH]; - unsigned short keymap[GOODIX_MAX_KEYS]; -+ struct dentry *debug_root; - }; - - static int goodix_check_cfg_8(struct goodix_ts_data *ts, -@@ -964,6 +966,16 @@ retry_get_irq_gpio: - return 0; - } - -+static int ts_config_bin_show(struct seq_file *s, void *data) -+{ -+ struct goodix_ts_data *ts = s->private; -+ -+ seq_write(s, ts->config, ts->chip->config_len); -+ -+ return 0; -+} -+DEFINE_SHOW_ATTRIBUTE(ts_config_bin); -+ - /** - * goodix_read_config - Read the embedded configuration of the panel - * -@@ -997,6 +1009,10 @@ static void goodix_read_config(struct goodix_ts_data *ts) - } - - ts->chip->calc_config_checksum(ts); -+ -+ ts->debug_root = debugfs_create_dir("goodix", NULL); -+ debugfs_create_file("config.bin", 0444, ts->debug_root, ts, -+ &ts_config_bin_fops); - } - - /** -@@ -1317,6 +1333,8 @@ static int goodix_ts_remove(struct i2c_client *client) - if (ts->load_cfg_from_disk) - wait_for_completion(&ts->firmware_loading_complete); - -+ debugfs_remove(ts->debug_root); -+ - return 0; - } - -diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile -index 0ac93bfaec61..95221e74ee99 100644 ---- a/drivers/irqchip/Makefile -+++ b/drivers/irqchip/Makefile -@@ -24,6 +24,7 @@ obj-$(CONFIG_OR1K_PIC) += irq-or1k-pic.o - obj-$(CONFIG_ORION_IRQCHIP) += irq-orion.o - obj-$(CONFIG_OMAP_IRQCHIP) += irq-omap-intc.o - obj-$(CONFIG_ARCH_SUNXI) += irq-sun4i.o -+obj-$(CONFIG_ARCH_SUNXI) += irq-sun6i-r.o - obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi-nmi.o - obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o - obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o -diff --git a/drivers/irqchip/irq-sun6i-r.c b/drivers/irqchip/irq-sun6i-r.c -new file mode 100644 -index 000000000000..4cd3e533740b ---- /dev/null -+++ b/drivers/irqchip/irq-sun6i-r.c -@@ -0,0 +1,379 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * The R_INTC in Allwinner A31 and newer SoCs manages several types of -+ * interrupts, as shown below: -+ * -+ * NMI IRQ DIRECT IRQs MUXED IRQs -+ * bit 0 bits 1-15^ bits 19-31 -+ * -+ * +---------+ +---------+ +---------+ +---------+ -+ * | NMI Pad | | IRQ d | | IRQ m | | IRQ m+7 | -+ * +---------+ +---------+ +---------+ +---------+ -+ * | | | | | | | -+ * | | | | |......| | -+ * +------V------+ +------------+ | | | +--V------V--+ | -+ * | Invert/ | | Write 1 to | | | | | AND with | | -+ * | Edge Detect | | PENDING[0] | | | | | MUX[m/8] | | -+ * +-------------+ +------------+ | | | +------------+ | -+ * | | | | | | | -+ * +--V-------V--+ +--V--+ | +--V--+ | +--V--+ -+ * | Set Reset| | GIC | | | GIC | | | GIC | -+ * | Latch | | SPI | | | SPI |... | ...| SPI | -+ * +-------------+ | N+d | | | m | | | m+7 | -+ * | | +-----+ | +-----+ | +-----+ -+ * | | | | -+ * +-------V-+ +-V----------+ +---------V--+ +--------V--------+ -+ * | GIC SPI | | AND with | | AND with | | AND with | -+ * | N (=32) | | ENABLE[0] | | ENABLE[d] | | ENABLE[19+m/8] | -+ * +---------+ +------------+ +------------+ +-----------------+ -+ * | | | -+ * +------V-----+ +------V-----+ +--------V--------+ -+ * | Read | | Read | | Read | -+ * | PENDING[0] | | PENDING[d] | | PENDING[19+m/8] | -+ * +------------+ +------------+ +-----------------+ -+ * -+ * ^ bits 16-18 are direct IRQs for peripherals with banked interrupts, such as -+ * the MSGBOX. These IRQs do not map to any GIC SPI. -+ * -+ * The H6 variant adds two more (banked) direct IRQs and implements the full -+ * set of 128 mux bits. This requires a second set of top-level registers. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#define SUN6I_NMI_CTRL (0x0c) -+#define SUN6I_IRQ_PENDING(n) (0x10 + 4 * (n)) -+#define SUN6I_IRQ_ENABLE(n) (0x40 + 4 * (n)) -+#define SUN6I_MUX_ENABLE(n) (0xc0 + 4 * (n)) -+ -+#define SUN6I_NMI_SRC_TYPE_LEVEL_LOW 0 -+#define SUN6I_NMI_SRC_TYPE_EDGE_FALLING 1 -+#define SUN6I_NMI_SRC_TYPE_LEVEL_HIGH 2 -+#define SUN6I_NMI_SRC_TYPE_EDGE_RISING 3 -+ -+#define SUN6I_NMI_BIT BIT(0) -+ -+#define SUN6I_NMI_NEEDS_ACK ((void *)1) -+ -+#define SUN6I_NR_TOP_LEVEL_IRQS 64 -+#define SUN6I_NR_DIRECT_IRQS 16 -+#define SUN6I_NR_MUX_BITS 128 -+ -+struct sun6i_r_intc_variant { -+ u32 first_mux_irq; -+ u32 nr_mux_irqs; -+ u32 mux_valid[BITS_TO_U32(SUN6I_NR_MUX_BITS)]; -+}; -+ -+static void __iomem *base; -+static irq_hw_number_t nmi_hwirq; -+static DECLARE_BITMAP(wake_irq_enabled, SUN6I_NR_TOP_LEVEL_IRQS); -+static DECLARE_BITMAP(wake_mux_enabled, SUN6I_NR_MUX_BITS); -+static DECLARE_BITMAP(wake_mux_valid, SUN6I_NR_MUX_BITS); -+ -+static void sun6i_r_intc_ack_nmi(void) -+{ -+ writel_relaxed(SUN6I_NMI_BIT, base + SUN6I_IRQ_PENDING(0)); -+} -+ -+static void sun6i_r_intc_nmi_ack(struct irq_data *data) -+{ -+ if (irqd_get_trigger_type(data) & IRQ_TYPE_EDGE_BOTH) -+ sun6i_r_intc_ack_nmi(); -+ else -+ data->chip_data = SUN6I_NMI_NEEDS_ACK; -+} -+ -+static void sun6i_r_intc_nmi_eoi(struct irq_data *data) -+{ -+ /* For oneshot IRQs, delay the ack until the IRQ is unmasked. */ -+ if (data->chip_data == SUN6I_NMI_NEEDS_ACK && !irqd_irq_masked(data)) { -+ data->chip_data = NULL; -+ sun6i_r_intc_ack_nmi(); -+ } -+ -+ irq_chip_eoi_parent(data); -+} -+ -+static void sun6i_r_intc_nmi_unmask(struct irq_data *data) -+{ -+ if (data->chip_data == SUN6I_NMI_NEEDS_ACK) { -+ data->chip_data = NULL; -+ sun6i_r_intc_ack_nmi(); -+ } -+ -+ irq_chip_unmask_parent(data); -+} -+ -+static int sun6i_r_intc_nmi_set_type(struct irq_data *data, unsigned int type) -+{ -+ u32 nmi_src_type; -+ -+ switch (type) { -+ case IRQ_TYPE_EDGE_RISING: -+ nmi_src_type = SUN6I_NMI_SRC_TYPE_EDGE_RISING; -+ break; -+ case IRQ_TYPE_EDGE_FALLING: -+ nmi_src_type = SUN6I_NMI_SRC_TYPE_EDGE_FALLING; -+ break; -+ case IRQ_TYPE_LEVEL_HIGH: -+ nmi_src_type = SUN6I_NMI_SRC_TYPE_LEVEL_HIGH; -+ break; -+ case IRQ_TYPE_LEVEL_LOW: -+ nmi_src_type = SUN6I_NMI_SRC_TYPE_LEVEL_LOW; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ writel_relaxed(nmi_src_type, base + SUN6I_NMI_CTRL); -+ -+ /* -+ * The "External NMI" GIC input connects to a latch inside R_INTC, not -+ * directly to the pin. So the GIC trigger type does not depend on the -+ * NMI pin trigger type. -+ */ -+ return irq_chip_set_type_parent(data, IRQ_TYPE_LEVEL_HIGH); -+} -+ -+static int sun6i_r_intc_nmi_set_irqchip_state(struct irq_data *data, -+ enum irqchip_irq_state which, -+ bool state) -+{ -+ if (which == IRQCHIP_STATE_PENDING && !state) -+ sun6i_r_intc_ack_nmi(); -+ -+ return irq_chip_set_parent_state(data, which, state); -+} -+ -+static int sun6i_r_intc_irq_set_wake(struct irq_data *data, unsigned int on) -+{ -+ unsigned long offset_from_nmi = data->hwirq - nmi_hwirq; -+ -+ if (offset_from_nmi < SUN6I_NR_DIRECT_IRQS) -+ assign_bit(offset_from_nmi, wake_irq_enabled, on); -+ else if (test_bit(data->hwirq, wake_mux_valid)) -+ assign_bit(data->hwirq, wake_mux_enabled, on); -+ else -+ /* Not wakeup capable. */ -+ return -EPERM; -+ -+ return 0; -+} -+ -+static struct irq_chip sun6i_r_intc_nmi_chip = { -+ .name = "sun6i-r-intc", -+ .irq_ack = sun6i_r_intc_nmi_ack, -+ .irq_mask = irq_chip_mask_parent, -+ .irq_unmask = sun6i_r_intc_nmi_unmask, -+ .irq_eoi = sun6i_r_intc_nmi_eoi, -+ .irq_set_affinity = irq_chip_set_affinity_parent, -+ .irq_set_type = sun6i_r_intc_nmi_set_type, -+ .irq_set_irqchip_state = sun6i_r_intc_nmi_set_irqchip_state, -+ .irq_set_wake = sun6i_r_intc_irq_set_wake, -+ .flags = IRQCHIP_SET_TYPE_MASKED, -+}; -+ -+static struct irq_chip sun6i_r_intc_wakeup_chip = { -+ .name = "sun6i-r-intc", -+ .irq_mask = irq_chip_mask_parent, -+ .irq_unmask = irq_chip_unmask_parent, -+ .irq_eoi = irq_chip_eoi_parent, -+ .irq_set_affinity = irq_chip_set_affinity_parent, -+ .irq_set_type = irq_chip_set_type_parent, -+ .irq_set_wake = sun6i_r_intc_irq_set_wake, -+ .flags = IRQCHIP_SET_TYPE_MASKED, -+}; -+ -+static int sun6i_r_intc_domain_translate(struct irq_domain *domain, -+ struct irq_fwspec *fwspec, -+ unsigned long *hwirq, -+ unsigned int *type) -+{ -+ /* Accept the old two-cell binding for the NMI only. */ -+ if (fwspec->param_count == 2 && fwspec->param[0] == 0) { -+ *hwirq = nmi_hwirq; -+ *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; -+ return 0; -+ } -+ -+ /* Otherwise this binding should match the GIC SPI binding. */ -+ if (fwspec->param_count < 3) -+ return -EINVAL; -+ if (fwspec->param[0] != GIC_SPI) -+ return -EINVAL; -+ -+ *hwirq = fwspec->param[1]; -+ *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; -+ -+ return 0; -+} -+ -+static int sun6i_r_intc_domain_alloc(struct irq_domain *domain, -+ unsigned int virq, -+ unsigned int nr_irqs, void *arg) -+{ -+ struct irq_fwspec *fwspec = arg; -+ struct irq_fwspec gic_fwspec; -+ unsigned long hwirq; -+ unsigned int type; -+ int i, ret; -+ -+ ret = sun6i_r_intc_domain_translate(domain, fwspec, &hwirq, &type); -+ if (ret) -+ return ret; -+ if (hwirq + nr_irqs > SUN6I_NR_MUX_BITS) -+ return -EINVAL; -+ -+ /* Construct a GIC-compatible fwspec from this fwspec. */ -+ gic_fwspec = (struct irq_fwspec) { -+ .fwnode = domain->parent->fwnode, -+ .param_count = 3, -+ .param = { GIC_SPI, hwirq, type }, -+ }; -+ -+ ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_fwspec); -+ if (ret) -+ return ret; -+ -+ for (i = 0; i < nr_irqs; ++i, ++hwirq, ++virq) { -+ if (hwirq == nmi_hwirq) { -+ irq_domain_set_hwirq_and_chip(domain, virq, hwirq, -+ &sun6i_r_intc_nmi_chip, 0); -+ irq_set_handler(virq, handle_fasteoi_ack_irq); -+ } else { -+ irq_domain_set_hwirq_and_chip(domain, virq, hwirq, -+ &sun6i_r_intc_wakeup_chip, 0); -+ } -+ } -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops sun6i_r_intc_domain_ops = { -+ .translate = sun6i_r_intc_domain_translate, -+ .alloc = sun6i_r_intc_domain_alloc, -+ .free = irq_domain_free_irqs_common, -+}; -+ -+static int sun6i_r_intc_suspend(void) -+{ -+ u32 buf[BITS_TO_U32(max(SUN6I_NR_TOP_LEVEL_IRQS, SUN6I_NR_MUX_BITS))]; -+ int i; -+ -+ /* Wake IRQs are enabled during system sleep and shutdown. */ -+ bitmap_to_arr32(buf, wake_irq_enabled, SUN6I_NR_TOP_LEVEL_IRQS); -+ for (i = 0; i < BITS_TO_U32(SUN6I_NR_TOP_LEVEL_IRQS); ++i) -+ writel_relaxed(buf[i], base + SUN6I_IRQ_ENABLE(i)); -+ bitmap_to_arr32(buf, wake_mux_enabled, SUN6I_NR_MUX_BITS); -+ for (i = 0; i < BITS_TO_U32(SUN6I_NR_MUX_BITS); ++i) -+ writel_relaxed(buf[i], base + SUN6I_MUX_ENABLE(i)); -+ -+ return 0; -+} -+ -+static void sun6i_r_intc_resume(void) -+{ -+ int i; -+ -+ /* Only the NMI is relevant during normal operation. */ -+ writel_relaxed(SUN6I_NMI_BIT, base + SUN6I_IRQ_ENABLE(0)); -+ for (i = 1; i < BITS_TO_U32(SUN6I_NR_TOP_LEVEL_IRQS); ++i) -+ writel_relaxed(0, base + SUN6I_IRQ_ENABLE(i)); -+} -+ -+static void sun6i_r_intc_shutdown(void) -+{ -+ sun6i_r_intc_suspend(); -+} -+ -+static struct syscore_ops sun6i_r_intc_syscore_ops = { -+ .suspend = sun6i_r_intc_suspend, -+ .resume = sun6i_r_intc_resume, -+ .shutdown = sun6i_r_intc_shutdown, -+}; -+ -+static int __init sun6i_r_intc_init(struct device_node *node, -+ struct device_node *parent, -+ const struct sun6i_r_intc_variant *v) -+{ -+ struct irq_domain *domain, *parent_domain; -+ struct of_phandle_args nmi_parent; -+ int ret; -+ -+ /* Extract the NMI hwirq number from the OF node. */ -+ ret = of_irq_parse_one(node, 0, &nmi_parent); -+ if (ret) -+ return ret; -+ if (nmi_parent.args_count < 3 || -+ nmi_parent.args[0] != GIC_SPI || -+ nmi_parent.args[2] != IRQ_TYPE_LEVEL_HIGH) -+ return -EINVAL; -+ nmi_hwirq = nmi_parent.args[1]; -+ -+ bitmap_set(wake_irq_enabled, v->first_mux_irq, v->nr_mux_irqs); -+ bitmap_from_arr32(wake_mux_valid, v->mux_valid, SUN6I_NR_MUX_BITS); -+ -+ parent_domain = irq_find_host(parent); -+ if (!parent_domain) { -+ pr_err("%pOF: Failed to obtain parent domain\n", node); -+ return -ENXIO; -+ } -+ -+ base = of_io_request_and_map(node, 0, NULL); -+ if (IS_ERR(base)) { -+ pr_err("%pOF: Failed to map MMIO region\n", node); -+ return PTR_ERR(base); -+ } -+ -+ domain = irq_domain_add_hierarchy(parent_domain, 0, 0, node, -+ &sun6i_r_intc_domain_ops, NULL); -+ if (!domain) { -+ pr_err("%pOF: Failed to allocate domain\n", node); -+ iounmap(base); -+ return -ENOMEM; -+ } -+ -+ register_syscore_ops(&sun6i_r_intc_syscore_ops); -+ -+ sun6i_r_intc_ack_nmi(); -+ sun6i_r_intc_resume(); -+ -+ return 0; -+} -+ -+static const struct sun6i_r_intc_variant sun6i_a31_r_intc_variant __initconst = { -+ .first_mux_irq = 19, -+ .nr_mux_irqs = 13, -+ .mux_valid = { 0xffffffff, 0xfff80000, 0xffffffff, 0x0000000f }, -+}; -+ -+static int __init sun6i_a31_r_intc_init(struct device_node *node, -+ struct device_node *parent) -+{ -+ return sun6i_r_intc_init(node, parent, &sun6i_a31_r_intc_variant); -+} -+IRQCHIP_DECLARE(sun6i_a31_r_intc, "allwinner,sun6i-a31-r-intc", sun6i_a31_r_intc_init); -+ -+static const struct sun6i_r_intc_variant sun50i_h6_r_intc_variant __initconst = { -+ .first_mux_irq = 21, -+ .nr_mux_irqs = 16, -+ .mux_valid = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff }, -+}; -+ -+static int __init sun50i_h6_r_intc_init(struct device_node *node, -+ struct device_node *parent) -+{ -+ return sun6i_r_intc_init(node, parent, &sun50i_h6_r_intc_variant); -+} -+IRQCHIP_DECLARE(sun50i_h6_r_intc, "allwinner,sun50i-h6-r-intc", sun50i_h6_r_intc_init); -diff --git a/drivers/irqchip/irq-sunxi-nmi.c b/drivers/irqchip/irq-sunxi-nmi.c -index a412b5d5d0fa..9f2bd0c5d289 100644 ---- a/drivers/irqchip/irq-sunxi-nmi.c -+++ b/drivers/irqchip/irq-sunxi-nmi.c -@@ -27,18 +27,12 @@ - - #define SUNXI_NMI_IRQ_BIT BIT(0) - --#define SUN6I_R_INTC_CTRL 0x0c --#define SUN6I_R_INTC_PENDING 0x10 --#define SUN6I_R_INTC_ENABLE 0x40 -- - /* - * For deprecated sun6i-a31-sc-nmi compatible. -- * Registers are offset by 0x0c. - */ --#define SUN6I_R_INTC_NMI_OFFSET 0x0c --#define SUN6I_NMI_CTRL (SUN6I_R_INTC_CTRL - SUN6I_R_INTC_NMI_OFFSET) --#define SUN6I_NMI_PENDING (SUN6I_R_INTC_PENDING - SUN6I_R_INTC_NMI_OFFSET) --#define SUN6I_NMI_ENABLE (SUN6I_R_INTC_ENABLE - SUN6I_R_INTC_NMI_OFFSET) -+#define SUN6I_NMI_CTRL 0x00 -+#define SUN6I_NMI_PENDING 0x04 -+#define SUN6I_NMI_ENABLE 0x34 - - #define SUN7I_NMI_CTRL 0x00 - #define SUN7I_NMI_PENDING 0x04 -@@ -61,12 +55,6 @@ struct sunxi_sc_nmi_reg_offs { - u32 enable; - }; - --static const struct sunxi_sc_nmi_reg_offs sun6i_r_intc_reg_offs __initconst = { -- .ctrl = SUN6I_R_INTC_CTRL, -- .pend = SUN6I_R_INTC_PENDING, -- .enable = SUN6I_R_INTC_ENABLE, --}; -- - static const struct sunxi_sc_nmi_reg_offs sun6i_reg_offs __initconst = { - .ctrl = SUN6I_NMI_CTRL, - .pend = SUN6I_NMI_PENDING, -@@ -232,14 +220,6 @@ fail_irqd_remove: - return ret; - } - --static int __init sun6i_r_intc_irq_init(struct device_node *node, -- struct device_node *parent) --{ -- return sunxi_sc_nmi_irq_init(node, &sun6i_r_intc_reg_offs); --} --IRQCHIP_DECLARE(sun6i_r_intc, "allwinner,sun6i-a31-r-intc", -- sun6i_r_intc_irq_init); -- - static int __init sun6i_sc_nmi_irq_init(struct device_node *node, - struct device_node *parent) - { -diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig -index 6c1d8b69a465..f86c2689ae9e 100644 ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -913,6 +913,7 @@ config LEDS_IP30 - To compile this driver as a module, choose M here: the module - will be called leds-ip30. - -+ - config LEDS_SGM3140 - tristate "LED support for the SGM3140" - depends on LEDS_CLASS_FLASH -@@ -928,6 +929,13 @@ config LEDS_ACER_A500 - This option enables support for the Power Button LED of - Acer Iconia Tab A500. - -+config LEDS_AXP20X -+ tristate "Charger LED support for AXP20X-like PMICs (AXP813, ...)" -+ depends on LEDS_CLASS && MFD_AXP20X -+ help -+ This option enables support for on-chip LED driver on -+ AXP20X-like PMICs. -+ - comment "Flash and Torch LED drivers" - source "drivers/leds/flash/Kconfig" - -diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile -index 156c0b4e60d9..e8504db3aa25 100644 ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -93,6 +93,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA) += leds-turris-omnia.o - obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o - obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o - obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o -+obj-$(CONFIG_LEDS_AXP20X) += leds-axp20x.o - - # LED SPI Drivers - obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o -diff --git a/drivers/leds/leds-axp20x.c b/drivers/leds/leds-axp20x.c -new file mode 100644 -index 000000000000..bc5896d65ad8 ---- /dev/null -+++ b/drivers/leds/leds-axp20x.c -@@ -0,0 +1,255 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+/* -+ * LED Driver for X-Powers AXP813 PMIC and similar. -+ * -+ * Copyright(c) 2020 Ondrej Jirman -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define AXP20X_CHGLED_CTRL_MASK BIT(3) -+#define AXP20X_CHGLED_CTRL_CHARGER BIT(3) -+#define AXP20X_CHGLED_CTRL_USER 0 -+ -+#define AXP20X_CHRG_CTRL2_MODE BIT(4) -+ -+#define AXP20X_CHGLED_USER_STATE_MASK GENMASK(5, 4) -+#define AXP20X_CHGLED_USER_STATE_OFF (0 << 4) -+#define AXP20X_CHGLED_USER_STATE_BLINK_SLOW (1 << 4) -+#define AXP20X_CHGLED_USER_STATE_BLINK_FAST (2 << 4) -+#define AXP20X_CHGLED_USER_STATE_ON (3 << 4) -+ -+static struct led_hw_trigger_type axp20x_charger_led_trigger_type; -+ -+struct axp20x_led { -+ struct led_classdev cdev; -+ struct regmap *regmap; -+}; -+ -+static int axp20x_led_set(struct led_classdev *led_cdev, -+ enum led_brightness value) -+{ -+ struct axp20x_led *led = -+ container_of(led_cdev, struct axp20x_led, cdev); -+ unsigned int val; -+ -+ val = value == LED_OFF ? AXP20X_CHGLED_USER_STATE_OFF : -+ AXP20X_CHGLED_USER_STATE_ON; -+ -+ return regmap_update_bits(led->regmap, AXP20X_OFF_CTRL, -+ AXP20X_CHGLED_USER_STATE_MASK, val); -+ -+} -+ -+static int axp20x_set_charger_control(struct led_classdev *led_cdev, bool on) -+{ -+ struct axp20x_led *led = container_of(led_cdev, struct axp20x_led, cdev); -+ -+ return regmap_update_bits(led->regmap, AXP20X_OFF_CTRL, -+ AXP20X_CHGLED_CTRL_MASK, -+ on ? AXP20X_CHGLED_CTRL_CHARGER : -+ AXP20X_CHGLED_CTRL_USER); -+} -+ -+static int axp20x_trig_charger_activate(struct led_classdev *led_cdev) -+{ -+ return axp20x_set_charger_control(led_cdev, true); -+} -+ -+static void axp20x_trig_charger_deactivate(struct led_classdev *led_cdev) -+{ -+ axp20x_set_charger_control(led_cdev, false); -+} -+ -+static ssize_t charger_mode_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct led_classdev *led_cdev = led_trigger_get_led(dev); -+ struct axp20x_led *led = container_of(led_cdev, struct axp20x_led, cdev); -+ unsigned int val; -+ int ret; -+ -+ ret = regmap_read(led->regmap, AXP20X_CHRG_CTRL2, &val); -+ if (ret) -+ return ret; -+ -+ return scnprintf(buf, PAGE_SIZE, "%u\n", -+ val & AXP20X_CHRG_CTRL2_MODE ? 1 : 0); -+} -+ -+static ssize_t charger_mode_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ struct led_classdev *led_cdev = led_trigger_get_led(dev); -+ struct axp20x_led *led = container_of(led_cdev, struct axp20x_led, cdev); -+ unsigned int mode; -+ int ret; -+ -+ ret = kstrtouint(buf, 0, &mode); -+ if (ret) -+ return ret; -+ -+ if (mode > 1) -+ return -ERANGE; -+ -+ ret = regmap_update_bits(led->regmap, AXP20X_CHRG_CTRL2, -+ AXP20X_CHRG_CTRL2_MODE, -+ mode ? AXP20X_CHRG_CTRL2_MODE : 0); -+ if (ret) -+ return ret; -+ -+ return len; -+} -+static DEVICE_ATTR_RW(charger_mode); -+ -+static struct attribute *axp20x_led_attrs[] = { -+ &dev_attr_charger_mode.attr, -+ NULL, -+}; -+ -+ATTRIBUTE_GROUPS(axp20x_led); -+ -+static struct led_trigger axp20x_charger_led_trigger = { -+ .name = "charger", -+ .trigger_type = &axp20x_charger_led_trigger_type, -+ .activate = axp20x_trig_charger_activate, -+ .deactivate = axp20x_trig_charger_deactivate, -+ .groups = axp20x_led_groups, -+}; -+ -+static int axp20x_led_probe(struct platform_device *pdev) -+{ -+ struct axp20x_dev *axp20x; -+ struct axp20x_led *led; -+ unsigned int val; -+ int ret; -+ -+ if (!of_device_is_available(pdev->dev.of_node)) -+ return -ENODEV; -+ -+ axp20x = dev_get_drvdata(pdev->dev.parent); -+ if (!axp20x) -+ return -EINVAL; -+ -+ led = devm_kzalloc(&pdev->dev, -+ sizeof(struct axp20x_led), -+ GFP_KERNEL); -+ if (!led) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, led); -+ -+ led->regmap = axp20x->regmap; -+ -+ led->cdev.name = "axp20x-chgarger-led"; -+ led->cdev.brightness_set_blocking = axp20x_led_set; -+ led->cdev.brightness = LED_OFF; -+ led->cdev.max_brightness = 1; -+ led->cdev.trigger_type = &axp20x_charger_led_trigger_type; -+ -+ ret = regmap_read(led->regmap, AXP20X_OFF_CTRL, &val); -+ if (ret) { -+ dev_err(&pdev->dev, "Failed to read charger control status\n"); -+ return ret; -+ } -+ -+ if ((val & AXP20X_CHGLED_CTRL_MASK) == AXP20X_CHGLED_CTRL_CHARGER) -+ led->cdev.default_trigger = axp20x_charger_led_trigger.name; -+ -+ ret = devm_led_classdev_register(pdev->dev.parent, &led->cdev); -+ if (ret) { -+ dev_err(&pdev->dev, "Failed to register led %s\n", -+ led->cdev.name); -+ return ret; -+ } -+ -+ ret = regmap_update_bits(led->regmap, AXP20X_OFF_CTRL, -+ AXP20X_CHGLED_CTRL_MASK, -+ AXP20X_CHGLED_CTRL_CHARGER); -+ if (ret) { -+ dev_err(&pdev->dev, "Failed to enable charger control\n"); -+ return ret; -+ } -+ -+ ret = axp20x_led_set(&led->cdev, led->cdev.brightness); -+ if (ret) { -+ dev_err(&pdev->dev, "Failed to init led brightness\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void axp20x_led_shutdown(struct platform_device *pdev) -+{ -+ struct axp20x_led *led = platform_get_drvdata(pdev); -+ -+ /* On shutdown, we want to give LED control back to the PMIC, -+ * so that it doesn't stay on, while the system is off. -+ */ -+ -+ axp20x_led_set(&led->cdev, LED_OFF); -+ axp20x_set_charger_control(&led->cdev, true); -+} -+ -+static int axp20x_led_remove(struct platform_device *pdev) -+{ -+ axp20x_led_shutdown(pdev); -+ -+ return 0; -+} -+ -+static const struct of_device_id axp20x_leds_of_match[] = { -+ { .compatible = "x-powers,axp813-charger-led", }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, axp20x_leds_of_match); -+ -+static struct platform_driver axp20x_led_driver = { -+ .driver = { -+ .name = "leds-axp20x", -+ .of_match_table = axp20x_leds_of_match, -+ }, -+ .probe = axp20x_led_probe, -+ .remove = axp20x_led_remove, -+ .shutdown = axp20x_led_shutdown, -+}; -+ -+static int __init axp20x_led_driver_init(void) -+{ -+ int ret; -+ -+ ret = led_trigger_register(&axp20x_charger_led_trigger); -+ if (ret) -+ return ret; -+ -+ ret = platform_driver_register(&axp20x_led_driver); -+ if (ret) { -+ led_trigger_unregister(&axp20x_charger_led_trigger); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void __exit axp20x_led_driver_exit(void) -+{ -+ platform_driver_unregister(&axp20x_led_driver); -+ led_trigger_unregister(&axp20x_charger_led_trigger); -+} -+ -+module_init(axp20x_led_driver_init); -+module_exit(axp20x_led_driver_exit); -+ -+MODULE_AUTHOR("Ondrej Jirman "); -+MODULE_DESCRIPTION("LED driver for AXP813 PMIC"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:leds-axp20x"); -diff --git a/drivers/mailbox/mailbox.c b/drivers/mailbox/mailbox.c -index 3e7d4b20ab34..82ca7c317700 100644 ---- a/drivers/mailbox/mailbox.c -+++ b/drivers/mailbox/mailbox.c -@@ -84,9 +84,11 @@ exit: - - /* kick start the timer immediately to avoid delays */ - if (!err && (chan->txdone_method & TXDONE_BY_POLL)) { -- /* but only if not already active */ -- if (!hrtimer_active(&chan->mbox->poll_hrt)) -- hrtimer_start(&chan->mbox->poll_hrt, 0, HRTIMER_MODE_REL); -+ if (!timekeeping_suspended) { -+ /* but only if not already active */ -+ if (!hrtimer_active(&chan->mbox->poll_hrt)) -+ hrtimer_start(&chan->mbox->poll_hrt, 0, HRTIMER_MODE_REL); -+ } - } - } - -@@ -262,6 +264,24 @@ int mbox_send_message(struct mbox_chan *chan, void *mssg) - - msg_submit(chan); - -+ if (chan->cl->tx_block && timekeeping_suspended) { -+ int i = chan->cl->tx_tout * 10; -+ bool txdone; -+ -+ while (i--) { -+ txdone = chan->mbox->ops->last_tx_done(chan); -+ if (txdone) { -+ tx_tick(chan, 0); -+ return 0; -+ } -+ -+ udelay(100); -+ } -+ -+ tx_tick(chan, -ETIME); -+ return -ETIME; -+ } -+ - if (chan->cl->tx_block) { - unsigned long wait; - int ret; -diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig -index 6eed3209ee2d..23897c4662fe 100644 ---- a/drivers/media/i2c/Kconfig -+++ b/drivers/media/i2c/Kconfig -@@ -1274,6 +1274,24 @@ config VIDEO_S5C73M3 - This is a V4L2 sensor driver for Samsung S5C73M3 - 8 Mpixel camera. - -+config VIDEO_HM5065 -+ tristate "Himax HM5065 sensor support" -+ depends on I2C && VIDEO_V4L2 -+ select VIDEO_V4L2_SUBDEV_API -+ select V4L2_FWNODE -+ help -+ This is a V4L2 sensor-level driver for Himax HM5065 -+ 5 Mpixel camera. -+ -+config VIDEO_GC2145 -+ tristate "GalaxyCore GC2145 sensor support" -+ depends on I2C && VIDEO_V4L2 -+ select VIDEO_V4L2_SUBDEV_API -+ select V4L2_FWNODE -+ help -+ This is a V4L2 sensor-level driver for GalaxyCore GC2145 -+ 2 Mpixel camera. -+ - endmenu - - menu "Lens drivers" -diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile -index a3149dce21bb..ddfe6170b318 100644 ---- a/drivers/media/i2c/Makefile -+++ b/drivers/media/i2c/Makefile -@@ -125,5 +125,7 @@ obj-$(CONFIG_VIDEO_MAX9286) += max9286.o - rdacm20-camera_module-objs := rdacm20.o max9271.o - obj-$(CONFIG_VIDEO_RDACM20) += rdacm20-camera_module.o - obj-$(CONFIG_VIDEO_ST_MIPID02) += st-mipid02.o -+obj-$(CONFIG_VIDEO_HM5065) += hm5065.o -+obj-$(CONFIG_VIDEO_GC2145) += gc2145.o - - obj-$(CONFIG_SDR_MAX2175) += max2175.o -diff --git a/drivers/media/i2c/gc2145.c b/drivers/media/i2c/gc2145.c -new file mode 100644 -index 000000000000..bed611045de9 ---- /dev/null -+++ b/drivers/media/i2c/gc2145.c -@@ -0,0 +1,2252 @@ -+/* -+ * Galaxycore GC2145 driver. -+ * Copyright (C) 2018 OndÅ™ej Jirman . -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#define DEBUG -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* -+ * GC2145 -+ * - 2M pixel -+ * - 1600 x 1200, max frame rate: 720P, 30fps@96MHz -+ * - Bayer RGB, RGB565, YCbCr 4:2:2 -+ * - AE, AWB -+ * - PLL -+ * - AVDD 2.7-3V, DVDD 1.7-1.9V, IOVDD 1.7-3V -+ * - Power 180mW / 200uA standby -+ * - Interpolation, denoise, gamma, edge enhance -+ * I2C: -+ * - write reg8 -+ * - read reg8 -+ * - write reg8 multi -+ * -+ * Power on: -+ * MCLK on -+ * PWDN, RESET low -+ * IOVDD, AVDD, DVDD on in sequence -+ * RESET high -+ * -+ * Power off: -+ * PWDN, RESET low -+ * RESET high -+ * delay -+ * PWDN high -+ * RESET low -+ * IOVDD, AVDD, DVDD off -+ * PWDN low? -+ * MCLK off -+ * -+ * Init: -+ * - check chip id -+ * - setup pll -+ * - setup CSI interface / PAD drive strength -+ * - setup resolution/fps -+ * - enable postprocessing -+ * (ISP related chapter) -+ * -+ * Stream on: -+ * - ??? -+ */ -+ -+#define GC2145_FIRMWARE_PARAMETERS "gc2145-init.bin" -+ -+#define GC2145_SENSOR_WIDTH_MIN 88u -+#define GC2145_SENSOR_HEIGHT_MIN 72u -+ -+//XXX: 1616x1232 8H/16V dummy pixels on each side -+#define GC2145_SENSOR_WIDTH_MAX 1600u -+#define GC2145_SENSOR_HEIGHT_MAX 1200u -+ -+/* {{{ Register definitions */ -+ -+/* system registers */ -+#define GC2145_REG_CHIP_ID 0xf0 -+#define GC2145_REG_CHIP_ID_VALUE 0x2145 -+ -+#define GC2145_REG_PAD_IO 0xf2 -+#define GC2145_REG_PLL_MODE1 0xf7 -+#define GC2145_REG_PLL_MODE2 0xf8 -+#define GC2145_REG_CM_MODE 0xf9 -+#define GC2145_REG_CLK_DIV_MODE 0xfa -+#define GC2145_REG_ANALOG_PWC 0xfc -+#define GC2145_REG_SCALER_MODE 0xfd -+#define GC2145_REG_RESET 0xfe -+ -+#define GC2145_P0_EXPOSURE_HI 0x03 -+#define GC2145_P0_EXPOSURE_LO 0x04 -+#define GC2145_P0_HBLANK_DELAY_HI 0x05 -+#define GC2145_P0_HBLANK_DELAY_LO 0x06 -+#define GC2145_P0_VBLANK_DELAY_HI 0x07 -+#define GC2145_P0_VBLANK_DELAY_LO 0x08 -+#define GC2145_P0_ROW_START_HI 0x09 -+#define GC2145_P0_ROW_START_LO 0x0a -+#define GC2145_P0_COL_START_HI 0x0b -+#define GC2145_P0_COL_START_LO 0x0c -+#define GC2145_P0_WIN_HEIGHT_HI 0x0d -+#define GC2145_P0_WIN_HEIGHT_LO 0x0e -+#define GC2145_P0_WIN_WIDTH_HI 0x0f -+#define GC2145_P0_WIN_WIDTH_LO 0x10 -+#define GC2145_P0_SH_DELAY_HI 0x11 -+#define GC2145_P0_SH_DELAY_LO 0x12 -+#define GC2145_P0_START_TIME 0x13 -+#define GC2145_P0_END_TIME 0x14 -+ -+#define GC2145_P0_ISP_BLK_ENABLE1 0x80 -+#define GC2145_P0_ISP_BLK_ENABLE2 0x81 -+#define GC2145_P0_ISP_BLK_ENABLE3 0x82 -+#define GC2145_P0_ISP_SPECIAL_EFFECT 0x83 -+#define GC2145_P0_ISP_OUT_FORMAT 0x84 -+#define GC2145_P0_FRAME_START 0x85 -+#define GC2145_P0_SYNC_MODE 0x86 -+#define GC2145_P0_ISP_BLK_ENABLE4 0x87 -+#define GC2145_P0_ISP_MODULE_GATING 0x88 -+#define GC2145_P0_ISP_BYPASS_MODE 0x89 -+#define GC2145_P0_DEBUG_MODE2 0x8c -+#define GC2145_P0_DEBUG_MODE3 0x8d -+ -+#define GC2145_P0_CROP_ENABLE 0x90 -+#define GC2145_P0_CROP_Y1_HI 0x91 -+#define GC2145_P0_CROP_Y1_LO 0x92 -+#define GC2145_P0_CROP_X1_HI 0x93 -+#define GC2145_P0_CROP_X1_LO 0x94 -+#define GC2145_P0_CROP_WIN_HEIGHT_HI 0x95 -+#define GC2145_P0_CROP_WIN_HEIGHT_LO 0x96 -+#define GC2145_P0_CROP_WIN_WIDTH_HI 0x97 -+#define GC2145_P0_CROP_WIN_WIDTH_LO 0x98 -+ -+#define GC2145_P0_SUBSAMPLE_RATIO 0x99 -+#define GC2145_P0_SUBSAMPLE_MODE 0x9a -+#define GC2145_P0_SUB_ROW_N1 0x9b -+#define GC2145_P0_SUB_ROW_N2 0x9c -+#define GC2145_P0_SUB_ROW_N3 0x9d -+#define GC2145_P0_SUB_ROW_N4 0x9e -+#define GC2145_P0_SUB_COL_N1 0x9f -+#define GC2145_P0_SUB_COL_N2 0xa0 -+#define GC2145_P0_SUB_COL_N3 0xa1 -+#define GC2145_P0_SUB_COL_N4 0xa2 -+#define GC2145_P0_OUT_BUF_ENABLE 0xc2 -+ -+/* }}} */ -+ -+struct gc2145_pixfmt { -+ u32 code; -+ u32 colorspace; -+ u8 fmt_setup; -+}; -+ -+static const struct gc2145_pixfmt gc2145_formats[] = { -+ { -+ .code = MEDIA_BUS_FMT_UYVY8_2X8, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .fmt_setup = 0x00, -+ }, -+ { -+ .code = MEDIA_BUS_FMT_VYUY8_2X8, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .fmt_setup = 0x01, -+ }, -+ { -+ .code = MEDIA_BUS_FMT_YUYV8_2X8, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .fmt_setup = 0x02, -+ }, -+ { -+ .code = MEDIA_BUS_FMT_YVYU8_2X8, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .fmt_setup = 0x03, -+ }, -+ { -+ .code = MEDIA_BUS_FMT_RGB565_2X8_LE, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .fmt_setup = 0x06, -+ }, -+ { -+ .code = MEDIA_BUS_FMT_SBGGR8_1X8, -+ .colorspace = V4L2_COLORSPACE_RAW, -+ .fmt_setup = 0x17, -+ }, -+}; -+ -+static const struct gc2145_pixfmt *gc2145_find_format(u32 code) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(gc2145_formats); i++) -+ if (gc2145_formats[i].code == code) -+ return &gc2145_formats[i]; -+ -+ return NULL; -+} -+ -+/* regulator supplies */ -+static const char * const gc2145_supply_name[] = { -+ "IOVDD", /* Digital I/O (1.7-3V) suppply */ -+ "AVDD", /* Analog (2.7-3V) supply */ -+ "DVDD", /* Digital Core (1.7-1.9V) supply */ -+}; -+ -+#define GC2145_NUM_SUPPLIES ARRAY_SIZE(gc2145_supply_name) -+ -+struct gc2145_ctrls { -+ struct v4l2_ctrl_handler handler; -+ struct { -+ struct v4l2_ctrl *auto_exposure; -+ struct v4l2_ctrl *exposure; -+ struct v4l2_ctrl *d_gain; -+ struct v4l2_ctrl *a_gain; -+ }; -+ struct v4l2_ctrl *metering; -+ struct v4l2_ctrl *exposure_bias; -+ struct { -+ struct v4l2_ctrl *wb; -+ struct v4l2_ctrl *blue_balance; -+ struct v4l2_ctrl *red_balance; -+ }; -+ struct v4l2_ctrl *aaa_lock; -+ struct v4l2_ctrl *hflip; -+ struct v4l2_ctrl *vflip; -+ struct v4l2_ctrl *pl_freq; -+ struct v4l2_ctrl *colorfx; -+ struct v4l2_ctrl *brightness; -+ struct v4l2_ctrl *saturation; -+ struct v4l2_ctrl *contrast; -+ struct v4l2_ctrl *gamma; -+ struct v4l2_ctrl *test_pattern; -+ struct v4l2_ctrl *test_data[4]; -+}; -+ -+enum { -+ TX_WRITE = 1, -+ TX_WRITE16, -+ TX_UPDATE_BITS, -+}; -+ -+#define GC2145_MAX_OPS 64 -+ -+struct gc2145_tx_op { -+ int op; -+ u16 reg; -+ u16 val; -+ u16 mask; -+}; -+ -+struct gc2145_dev { -+ struct i2c_client *i2c_client; -+ struct v4l2_subdev sd; -+ struct media_pad pad; -+ struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */ -+ struct clk *xclk; /* external clock for GC2145 */ -+ -+ struct regulator_bulk_data supplies[GC2145_NUM_SUPPLIES]; -+ struct gpio_desc *reset_gpio; // nrst pin -+ struct gpio_desc *enable_gpio; // ce pin -+ -+ /* lock to protect all members below */ -+ struct mutex lock; -+ -+ struct v4l2_mbus_framefmt fmt; -+ struct v4l2_fract frame_interval; -+ struct gc2145_ctrls ctrls; -+ -+ bool pending_mode_change; -+ bool powered; -+ bool streaming; -+ -+ u8 current_bank; -+ -+ struct gc2145_tx_op ops[GC2145_MAX_OPS]; -+ int n_ops; -+ int tx_started; -+}; -+ -+static inline struct gc2145_dev *to_gc2145_dev(struct v4l2_subdev *sd) -+{ -+ return container_of(sd, struct gc2145_dev, sd); -+} -+ -+/* {{{ Register access helpers */ -+ -+static int gc2145_write_regs(struct gc2145_dev *sensor, u8 addr, -+ u8 *data, int data_size) -+{ -+ struct i2c_client *client = sensor->i2c_client; -+ struct i2c_msg msg; -+ u8 buf[128 + 1]; -+ int ret; -+ -+ if (data_size > sizeof(buf) - 1) { -+ v4l2_err(&sensor->sd, "%s: oversized transfer (size=%d)\n", -+ __func__, data_size); -+ return -EINVAL; -+ } -+ -+ buf[0] = addr; -+ memcpy(buf + 1, data, data_size); -+ -+ msg.addr = client->addr; -+ msg.flags = client->flags; -+ msg.buf = buf; -+ msg.len = data_size + 1; -+ -+ dev_dbg(&sensor->i2c_client->dev, "[wr %02x] <= %*ph\n", -+ (u32)addr, data_size, data); -+ -+ ret = i2c_transfer(client->adapter, &msg, 1); -+ if (ret < 0) { -+ v4l2_err(&sensor->sd, -+ "%s: error %d: addr=%x, data=%*ph\n", -+ __func__, ret, (u32)addr, data_size, data); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int gc2145_read_regs(struct gc2145_dev *sensor, u8 addr, -+ u8 *data, int data_size) -+{ -+ struct i2c_client *client = sensor->i2c_client; -+ struct i2c_msg msg[2]; -+ int ret; -+ -+ msg[0].addr = client->addr; -+ msg[0].flags = client->flags; -+ msg[0].buf = &addr; -+ msg[0].len = 1; -+ -+ msg[1].addr = client->addr; -+ msg[1].flags = client->flags | I2C_M_RD; -+ msg[1].buf = data; -+ msg[1].len = data_size; -+ -+ ret = i2c_transfer(client->adapter, msg, 2); -+ if (ret < 0) { -+ v4l2_err(&sensor->sd, -+ "%s: error %d: start_index=%x, data_size=%d\n", -+ __func__, ret, (u32)addr, data_size); -+ return ret; -+ } -+ -+ dev_dbg(&sensor->i2c_client->dev, "[rd %02x] => %*ph\n", -+ (u32)addr, data_size, data); -+ -+ return 0; -+} -+ -+static int gc2145_switch_bank(struct gc2145_dev *sensor, u16 reg) -+{ -+ int ret; -+ u8 bank = reg >> 8; -+ -+ if (bank & ~3u) -+ return -ERANGE; -+ -+ if (sensor->current_bank != bank) { -+ ret = gc2145_write_regs(sensor, GC2145_REG_RESET, &bank, 1); -+ if (ret) -+ return ret; -+ -+ sensor->current_bank = bank; -+ dev_info(&sensor->i2c_client->dev, "bank switch: 0x%02x\n", -+ (unsigned int)sensor->current_bank); -+ } -+ -+ return 0; -+} -+ -+static int gc2145_read(struct gc2145_dev *sensor, u16 reg, u8 *val) -+{ -+ int ret; -+ -+ ret = gc2145_switch_bank(sensor, reg); -+ if (ret) -+ return ret; -+ -+ return gc2145_read_regs(sensor, reg, val, 1); -+} -+ -+static int gc2145_write(struct gc2145_dev *sensor, u16 reg, u8 val) -+{ -+ int ret; -+ -+ ret = gc2145_switch_bank(sensor, reg); -+ if (ret) -+ return ret; -+ -+ if ((reg & 0xffu) == GC2145_REG_RESET) -+ sensor->current_bank = val & 3; -+ -+ return gc2145_write_regs(sensor, reg, &val, 1); -+} -+ -+static int gc2145_update_bits(struct gc2145_dev *sensor, u16 reg, u8 mask, u8 val) -+{ -+ int ret; -+ u8 tmp; -+ -+ ret = gc2145_read(sensor, reg, &tmp); -+ if (ret) -+ return ret; -+ -+ tmp &= ~mask; -+ tmp |= val & mask; -+ -+ return gc2145_write(sensor, reg, tmp); -+} -+ -+static int gc2145_read16(struct gc2145_dev *sensor, u16 reg, u16 *val) -+{ -+ int ret; -+ -+ ret = gc2145_switch_bank(sensor, reg); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_read_regs(sensor, reg, (u8 *)val, sizeof(*val)); -+ if (ret) -+ return ret; -+ -+ *val = be16_to_cpu(*val); -+ return 0; -+} -+ -+static int gc2145_write16(struct gc2145_dev *sensor, u16 reg, u16 val) -+{ -+ u16 tmp = cpu_to_be16(val); -+ int ret; -+ -+ ret = gc2145_switch_bank(sensor, reg); -+ if (ret) -+ return ret; -+ -+ return gc2145_write_regs(sensor, reg, (u8 *)&tmp, sizeof(tmp)); -+} -+ -+static void gc2145_tx_start(struct gc2145_dev *sensor) -+{ -+ if (sensor->tx_started++) -+ dev_err(&sensor->i2c_client->dev, -+ "tx_start called multiple times\n"); -+ -+ sensor->n_ops = 0; -+} -+ -+static void gc2145_tx_add(struct gc2145_dev *sensor, int kind, -+ u16 reg, u16 val, u16 mask) -+{ -+ struct gc2145_tx_op *op; -+ -+ if (!sensor->tx_started) { -+ dev_err(&sensor->i2c_client->dev, -+ "op added without calling tx_start\n"); -+ return; -+ } -+ -+ if (sensor->n_ops >= ARRAY_SIZE(sensor->ops)) { -+ dev_err(&sensor->i2c_client->dev, -+ "ops overflow, increase GC2145_MAX_OPS\n"); -+ return; -+ } -+ -+ op = &sensor->ops[sensor->n_ops++]; -+ op->op = kind; -+ op->reg = reg; -+ op->val = val; -+ op->mask = mask; -+} -+ -+static void gc2145_tx_write8(struct gc2145_dev *sensor, u16 reg, u8 val) -+{ -+ return gc2145_tx_add(sensor, TX_WRITE, reg, val, 0); -+} -+ -+static void gc2145_tx_write16(struct gc2145_dev *sensor, u16 reg, u16 val) -+{ -+ return gc2145_tx_add(sensor, TX_WRITE16, reg, val, 0); -+} -+ -+static void gc2145_tx_update_bits(struct gc2145_dev *sensor, u16 reg, -+ u8 mask, u8 val) -+{ -+ return gc2145_tx_add(sensor, TX_UPDATE_BITS, reg, val, mask); -+} -+ -+static int gc2145_tx_commit(struct gc2145_dev *sensor) -+{ -+ struct gc2145_tx_op* op; -+ int i, ret, n_ops; -+ -+ if (!sensor->tx_started) { -+ dev_err(&sensor->i2c_client->dev, -+ "tx_commit called without tx_start\n"); -+ return 0; -+ } -+ -+ n_ops = sensor->n_ops; -+ sensor->tx_started = 0; -+ sensor->n_ops = 0; -+ -+ for (i = 0; i < n_ops; i++) { -+ op = &sensor->ops[i]; -+ -+ switch (op->op) { -+ case TX_WRITE: -+ ret = gc2145_write(sensor, op->reg, op->val); -+ break; -+ case TX_WRITE16: -+ ret = gc2145_write16(sensor, op->reg, op->val); -+ break; -+ case TX_UPDATE_BITS: -+ ret = gc2145_update_bits(sensor, op->reg, op->mask, op->val); -+ break; -+ default: -+ dev_err(&sensor->i2c_client->dev, "invalid op at %d\n", i); -+ ret = -EINVAL; -+ } -+ -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+/* -+ * Efficiently write to a set of registers, using auto-increment -+ * when possible. User must not use address 0xff. To switch banks, -+ * use sequence: 0xfe, bank_no. -+ */ -+static int gc2145_set_registers(struct gc2145_dev *sensor, -+ const uint8_t* data, size_t data_len) -+{ -+ int ret = 0, i = 0; -+ u16 start, len; -+ u8 buf[128]; -+ -+ if (data_len % 2 != 0) { -+ v4l2_err(&sensor->sd, "Register map has invalid size\n"); -+ return -EINVAL; -+ } -+ -+ /* we speed up communication by using auto-increment functionality */ -+ while (i < data_len) { -+ start = data[i]; -+ len = 0; -+ -+ while (i < data_len && data[i] == (start + len) && -+ len < sizeof(buf)) { -+ buf[len++] = data[i + 1]; -+ i += 2; -+ } -+ -+ ret = gc2145_write_regs(sensor, start, buf, len); -+ if (ret) -+ return ret; -+ } -+ -+ sensor->current_bank = 0xff; -+ return 0; -+} -+ -+/* -+ * The firmware format: -+ * , ..., -+ * "record" is a 1-byte register address followed by 1-byte data -+ */ -+static int gc2145_load_firmware(struct gc2145_dev *sensor, const char *name) -+{ -+ const struct firmware *fw; -+ int ret; -+ -+ ret = request_firmware(&fw, name, sensor->sd.v4l2_dev->dev); -+ if (ret) { -+ v4l2_warn(&sensor->sd, -+ "Failed to read firmware %s, continuing anyway...\n", -+ name); -+ return 1; -+ } -+ -+ if (fw->size == 0) -+ return 1; -+ -+ ret = gc2145_set_registers(sensor, fw->data, fw->size); -+ -+ release_firmware(fw); -+ return ret; -+} -+ -+/* }}} */ -+/* {{{ Controls */ -+ -+static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl) -+{ -+ return &container_of(ctrl->handler, struct gc2145_dev, -+ ctrls.handler)->sd; -+} -+ -+#if 0 -+static const u8 gc2145_wb_opts[][2] = { -+ { V4L2_WHITE_BALANCE_MANUAL, GC2145_REG_WB_MODE_OFF }, -+ { V4L2_WHITE_BALANCE_INCANDESCENT, GC2145_REG_WB_MODE_TUNGSTEN_PRESET }, -+ { V4L2_WHITE_BALANCE_FLUORESCENT, -+ GC2145_REG_WB_MODE_FLUORESCENT_PRESET }, -+ { V4L2_WHITE_BALANCE_HORIZON, GC2145_REG_WB_MODE_HORIZON_PRESET }, -+ { V4L2_WHITE_BALANCE_CLOUDY, GC2145_REG_WB_MODE_CLOUDY_PRESET }, -+ { V4L2_WHITE_BALANCE_DAYLIGHT, GC2145_REG_WB_MODE_SUNNY_PRESET }, -+ { V4L2_WHITE_BALANCE_AUTO, GC2145_REG_WB_MODE_AUTOMATIC }, -+}; -+ -+static int gc2145_set_power_line_frequency(struct gc2145_dev *sensor, s32 val) -+{ -+ u16 freq; -+ int ret; -+ -+ switch (val) { -+ case V4L2_CID_POWER_LINE_FREQUENCY_DISABLED: -+ ret = gc2145_write(sensor, GC2145_REG_ANTI_FLICKER_MODE, 0); -+ if (ret) -+ return ret; -+ -+ return gc2145_write(sensor, GC2145_REG_FD_ENABLE_DETECT, 0); -+ case V4L2_CID_POWER_LINE_FREQUENCY_50HZ: -+ case V4L2_CID_POWER_LINE_FREQUENCY_60HZ: -+ ret = gc2145_write(sensor, GC2145_REG_ANTI_FLICKER_MODE, 1); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_write(sensor, GC2145_REG_FD_ENABLE_DETECT, 0); -+ if (ret) -+ return ret; -+ -+ freq = (val == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ? -+ 0x4b20 : 0x4bc0; -+ -+ return gc2145_write16(sensor, GC2145_REG_FD_FLICKER_FREQUENCY, -+ freq); -+ case V4L2_CID_POWER_LINE_FREQUENCY_AUTO: -+ ret = gc2145_write(sensor, GC2145_REG_FD_ENABLE_DETECT, 1); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_write(sensor, GC2145_REG_ANTI_FLICKER_MODE, 1); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_write16(sensor, GC2145_REG_FD_MAX_NUMBER_ATTEMP, -+ 100); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_write16(sensor, GC2145_REG_FD_FLICKER_FREQUENCY, -+ 0); -+ if (ret) -+ return ret; -+ -+ return gc2145_write(sensor, GC2145_REG_FD_DETECTION_START, 1); -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int gc2145_set_colorfx(struct gc2145_dev *sensor, s32 val) -+{ -+ int ret; -+ -+ ret = gc2145_write(sensor, GC2145_REG_EFFECTS_COLOR, -+ GC2145_REG_EFFECTS_COLOR_NORMAL); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_write(sensor, GC2145_REG_EFFECTS_NEGATIVE, 0); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_write(sensor, GC2145_REG_EFFECTS_SOLARISING, 0); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_write(sensor, GC2145_REG_EFFECTS_SKECTH, 0); -+ if (ret) -+ return ret; -+ -+ switch (val) { -+ case V4L2_COLORFX_NONE: -+ return 0; -+ case V4L2_COLORFX_NEGATIVE: -+ return gc2145_write(sensor, GC2145_REG_EFFECTS_NEGATIVE, 1); -+ case V4L2_COLORFX_SOLARIZATION: -+ return gc2145_write(sensor, GC2145_REG_EFFECTS_SOLARISING, 1); -+ case V4L2_COLORFX_SKETCH: -+ return gc2145_write(sensor, GC2145_REG_EFFECTS_SKECTH, 1); -+ case V4L2_COLORFX_ANTIQUE: -+ return gc2145_write(sensor, GC2145_REG_EFFECTS_COLOR, -+ GC2145_REG_EFFECTS_COLOR_ANTIQUE); -+ case V4L2_COLORFX_SEPIA: -+ return gc2145_write(sensor, GC2145_REG_EFFECTS_COLOR, -+ GC2145_REG_EFFECTS_COLOR_SEPIA); -+ case V4L2_COLORFX_AQUA: -+ return gc2145_write(sensor, GC2145_REG_EFFECTS_COLOR, -+ GC2145_REG_EFFECTS_COLOR_AQUA); -+ case V4L2_COLORFX_BW: -+ return gc2145_write(sensor, GC2145_REG_EFFECTS_COLOR, -+ GC2145_REG_EFFECTS_COLOR_BLACK_WHITE); -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int gc2145_3a_lock(struct gc2145_dev *sensor, struct v4l2_ctrl *ctrl) -+{ -+ bool awb_lock = ctrl->val & V4L2_LOCK_WHITE_BALANCE; -+ bool ae_lock = ctrl->val & V4L2_LOCK_EXPOSURE; -+ int ret = 0; -+ -+ if ((ctrl->val ^ ctrl->cur.val) & V4L2_LOCK_EXPOSURE -+ && sensor->ctrls.auto_exposure->val == V4L2_EXPOSURE_AUTO) { -+ ret = gc2145_write(sensor, GC2145_REG_FREEZE_AUTO_EXPOSURE, -+ ae_lock); -+ if (ret) -+ return ret; -+ } -+ -+ if (((ctrl->val ^ ctrl->cur.val) & V4L2_LOCK_WHITE_BALANCE) -+ && sensor->ctrls.wb->val == V4L2_WHITE_BALANCE_AUTO) { -+ ret = gc2145_write(sensor, GC2145_REG_WB_MISC_SETTINGS, -+ awb_lock ? -+ GC2145_REG_WB_MISC_SETTINGS_FREEZE_ALGO : 0); -+ if (ret) -+ return ret; -+ } -+ -+ return ret; -+} -+ -+static int gc2145_set_white_balance(struct gc2145_dev *sensor) -+{ -+ struct gc2145_ctrls *ctrls = &sensor->ctrls; -+ bool manual_wb = ctrls->wb->val == V4L2_WHITE_BALANCE_MANUAL; -+ int ret = 0, i; -+ s32 val; -+ -+ if (ctrls->wb->is_new) { -+ for (i = 0; i < ARRAY_SIZE(gc2145_wb_opts); i++) { -+ if (gc2145_wb_opts[i][0] != ctrls->wb->val) -+ continue; -+ -+ ret = gc2145_write(sensor, GC2145_REG_WB_MODE, -+ gc2145_wb_opts[i][1]); -+ if (ret) -+ return ret; -+ goto next; -+ } -+ -+ return -EINVAL; -+ } -+ -+next: -+ if (ctrls->wb->is_new || ctrls->blue_balance->is_new) { -+ val = manual_wb ? ctrls->blue_balance->val : 1000; -+ ret = gc2145_write16(sensor, GC2145_REG_WB_HUE_B_BIAS, -+ gc2145_mili_to_fp16(val)); -+ if (ret) -+ return ret; -+ } -+ -+ if (ctrls->wb->is_new || ctrls->red_balance->is_new) { -+ val = manual_wb ? ctrls->red_balance->val : 1000; -+ ret = gc2145_write16(sensor, GC2145_REG_WB_HUE_R_BIAS, -+ gc2145_mili_to_fp16(val)); -+ } -+ -+ return ret; -+} -+ -+#endif -+ -+/* Exposure */ -+ -+static int gc2145_get_exposure(struct gc2145_dev *sensor) -+{ -+ struct gc2145_ctrls *ctrls = &sensor->ctrls; -+ u8 again, dgain; -+ u16 exp; -+ int ret; -+ -+ ret = gc2145_read(sensor, 0xb1, &again); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_read(sensor, 0xb2, &dgain); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_read16(sensor, 0x03, &exp); -+ if (ret) -+ return ret; -+ -+ ctrls->exposure->val = exp; -+ ctrls->d_gain->val = dgain; -+ ctrls->a_gain->val = again; -+ -+ return 0; -+} -+ -+#define AE_BIAS_MENU_DEFAULT_VALUE_INDEX 4 -+static const s64 ae_bias_menu_values[] = { -+ -4000, -3000, -2000, -1000, 0, 1000, 2000, 3000, 4000 -+}; -+ -+static const s8 ae_bias_menu_reg_values[] = { -+ 0x55, 0x60, 0x65, 0x70, 0x7b, 0x85, 0x90, 0x95, 0xa0 -+}; -+ -+static int gc2145_set_exposure(struct gc2145_dev *sensor) -+{ -+ struct gc2145_ctrls *ctrls = &sensor->ctrls; -+ bool is_auto = (ctrls->auto_exposure->val != V4L2_EXPOSURE_MANUAL); -+ -+ gc2145_tx_start(sensor); -+ -+ if (ctrls->auto_exposure->is_new) { -+ gc2145_tx_write8(sensor, 0xb6, is_auto ? 1 : 0); -+ -+ //XXX: remove? -+ //if (ctrls->auto_exposure->cur.val != ctrls->auto_exposure->val && -+ //!is_auto) { -+ /* -+ * Hack: At this point, there are current volatile -+ * values in val, but control framework will not -+ * update the cur values for our autocluster, as it -+ * should. I couldn't find the reason. This fixes -+ * it for our driver. Remove this after the kernel -+ * is fixed. -+ */ -+ //ctrls->exposure->cur.val = ctrls->exposure->val; -+ //ctrls->d_gain->cur.val = ctrls->d_gain->val; -+ //ctrls->a_gain->cur.val = ctrls->a_gain->val; -+ //} -+ } -+ -+ if (!is_auto && ctrls->exposure->is_new) -+ gc2145_tx_write16(sensor, 0x03, ctrls->exposure->val); -+ -+ if (!is_auto && ctrls->d_gain->is_new) -+ gc2145_tx_write8(sensor, 0xb2, ctrls->d_gain->val); -+ -+ if (!is_auto && ctrls->a_gain->is_new) -+ gc2145_tx_write8(sensor, 0xb1, ctrls->a_gain->val); -+ -+ return gc2145_tx_commit(sensor);; -+} -+ -+/* Test patterns */ -+ -+enum { -+ GC2145_TEST_PATTERN_DISABLED, -+ GC2145_TEST_PATTERN_VGA_COLOR_BARS, -+ GC2145_TEST_PATTERN_UXGA_COLOR_BARS, -+ GC2145_TEST_PATTERN_SKIN_MAP, -+ GC2145_TEST_PATTERN_SOLID_COLOR, -+}; -+ -+static const char * const test_pattern_menu[] = { -+ "Disabled", -+ "VGA color bars", -+ "UXGA color bars", -+ "Skin map", -+ "Solid black color", -+ "Solid light gray color", -+ "Solid gray color", -+ "Solid dark gray color", -+ "Solid white color", -+ "Solid red color", -+ "Solid green color", -+ "Solid blue color", -+ "Solid yellow color", -+ "Solid cyan color", -+ "Solid magenta color", -+}; -+ -+static int gc2145_g_volatile_ctrl(struct v4l2_ctrl *ctrl) -+{ -+ struct v4l2_subdev *sd = ctrl_to_sd(ctrl); -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ int ret; -+ -+ /* v4l2_ctrl_lock() locks our own mutex */ -+ -+ if (!sensor->powered) -+ return -EIO; -+ -+ switch (ctrl->id) { -+ case V4L2_CID_EXPOSURE_AUTO: -+ ret = gc2145_get_exposure(sensor); -+ if (ret) -+ return ret; -+ break; -+ default: -+ dev_err(&sensor->i2c_client->dev, "getting unknown control %d\n", ctrl->id); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int gc2145_s_ctrl(struct v4l2_ctrl *ctrl) -+{ -+ struct v4l2_subdev *sd = ctrl_to_sd(ctrl); -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ struct gc2145_ctrls *ctrls = &sensor->ctrls; -+ s32 val = ctrl->val; -+ unsigned int i; -+ int ret; -+ u8 test1, test2; -+ -+ /* v4l2_ctrl_lock() locks our own mutex */ -+ -+ /* -+ * If the device is not powered up by the host driver do -+ * not apply any controls to H/W at this time. Instead -+ * the controls will be restored right after power-up. -+ */ -+ if (!sensor->powered) -+ return 0; -+ -+ switch (ctrl->id) { -+ case V4L2_CID_EXPOSURE_AUTO: -+ return gc2145_set_exposure(sensor); -+ -+ case V4L2_CID_AUTO_EXPOSURE_BIAS: -+ if (val < 0 || val >= ARRAY_SIZE(ae_bias_menu_reg_values)) { -+ dev_err(&sensor->i2c_client->dev, "ae bias out of range\n"); -+ return -EINVAL; -+ } -+ -+ return gc2145_write(sensor, 0x113, -+ (u8)ae_bias_menu_reg_values[val]); -+ -+ case V4L2_CID_VFLIP: -+ return gc2145_update_bits(sensor, 0x17, BIT(1), val ? BIT(1) : 0); -+ -+ case V4L2_CID_HFLIP: -+ return gc2145_update_bits(sensor, 0x17, BIT(0), val ? BIT(0) : 0); -+ -+ case V4L2_CID_TEST_PATTERN: -+ for (i = 0; i < ARRAY_SIZE(ctrls->test_data); i++) -+ v4l2_ctrl_activate(ctrls->test_data[i], -+ val == 6); /* solid color */ -+ -+ test1 = 0; -+ test2 = 0x01; -+ -+ if (val == GC2145_TEST_PATTERN_VGA_COLOR_BARS) -+ test1 = 0x04; -+ else if (val == GC2145_TEST_PATTERN_UXGA_COLOR_BARS) -+ test1 = 0x44; -+ else if (val == GC2145_TEST_PATTERN_SKIN_MAP) -+ test1 = 0x10; -+ else if (val >= GC2145_TEST_PATTERN_SOLID_COLOR) { -+ test1 = 0x04; -+ test2 = ((val - GC2145_TEST_PATTERN_SOLID_COLOR) << 4) | 0x8; -+ } else if (val != GC2145_TEST_PATTERN_DISABLED) { -+ dev_err(&sensor->i2c_client->dev, "test pattern out of range\n"); -+ return -EINVAL; -+ } -+ -+ ret = gc2145_write(sensor, 0x8c, test1); -+ if (ret) -+ return ret; -+ -+ return gc2145_write(sensor, 0x8d, test2); -+ -+#if 0 -+ case V4L2_CID_EXPOSURE_METERING: -+ if (val == V4L2_EXPOSURE_METERING_AVERAGE) -+ reg = GC2145_REG_EXPOSURE_METERING_FLAT; -+ else if (val == V4L2_EXPOSURE_METERING_CENTER_WEIGHTED) -+ reg = GC2145_REG_EXPOSURE_METERING_CENTERED; -+ else -+ return -EINVAL; -+ -+ return gc2145_write(sensor, GC2145_REG_EXPOSURE_METERING, reg); -+ -+ case V4L2_CID_CONTRAST: -+ return gc2145_write(sensor, GC2145_REG_CONTRAST, val); -+ -+ case V4L2_CID_SATURATION: -+ return gc2145_write(sensor, GC2145_REG_COLOR_SATURATION, val); -+ -+ case V4L2_CID_BRIGHTNESS: -+ return gc2145_write(sensor, GC2145_REG_BRIGHTNESS, val); -+ -+ case V4L2_CID_POWER_LINE_FREQUENCY: -+ return gc2145_set_power_line_frequency(sensor, val); -+ -+ case V4L2_CID_GAMMA: -+ return gc2145_write(sensor, GC2145_REG_P0_GAMMA_GAIN, val); -+ -+ case V4L2_CID_COLORFX: -+ return gc2145_set_colorfx(sensor, val); -+ -+ case V4L2_CID_3A_LOCK: -+ return gc2145_3a_lock(sensor, ctrl); -+ -+ case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: -+ return gc2145_set_white_balance(sensor); -+ -+ case V4L2_CID_TEST_PATTERN_RED: -+ return gc2145_write16(sensor, GC2145_REG_TESTDATA_RED, val); -+ -+ case V4L2_CID_TEST_PATTERN_GREENR: -+ return gc2145_write16(sensor, GC2145_REG_TESTDATA_GREEN_R, val); -+ -+ case V4L2_CID_TEST_PATTERN_BLUE: -+ return gc2145_write16(sensor, GC2145_REG_TESTDATA_BLUE, val); -+ -+ case V4L2_CID_TEST_PATTERN_GREENB: -+ return gc2145_write16(sensor, GC2145_REG_TESTDATA_GREEN_B, val); -+ -+#endif -+ default: -+ dev_err(&sensor->i2c_client->dev, "setting unknown control %d\n", ctrl->id); -+ return -EINVAL; -+ } -+} -+ -+static const struct v4l2_ctrl_ops gc2145_ctrl_ops = { -+ .g_volatile_ctrl = gc2145_g_volatile_ctrl, -+ .s_ctrl = gc2145_s_ctrl, -+}; -+ -+static int gc2145_init_controls(struct gc2145_dev *sensor) -+{ -+ const struct v4l2_ctrl_ops *ops = &gc2145_ctrl_ops; -+ struct gc2145_ctrls *ctrls = &sensor->ctrls; -+ struct v4l2_ctrl_handler *hdl = &ctrls->handler; -+ //u8 wb_max = 0; -+ //u64 wb_mask = 0; -+ //unsigned int i; -+ int ret; -+ -+ v4l2_ctrl_handler_init(hdl, 32); -+ -+ /* we can use our own mutex for the ctrl lock */ -+ hdl->lock = &sensor->lock; -+ -+ /* Exposure controls */ -+ ctrls->auto_exposure = v4l2_ctrl_new_std_menu(hdl, ops, -+ V4L2_CID_EXPOSURE_AUTO, -+ V4L2_EXPOSURE_MANUAL, 0, -+ V4L2_EXPOSURE_AUTO); -+ ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, -+ 1, 0x1fff, 1, 0x80); -+ ctrls->a_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN, -+ 0, 255, 1, 0x20); -+ ctrls->d_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_DIGITAL_GAIN, -+ 0, 255, 1, 0x40); -+ ctrls->exposure_bias = -+ v4l2_ctrl_new_int_menu(hdl, ops, V4L2_CID_AUTO_EXPOSURE_BIAS, -+ ARRAY_SIZE(ae_bias_menu_values) - 1, -+ AE_BIAS_MENU_DEFAULT_VALUE_INDEX, -+ ae_bias_menu_values); -+ -+ /* V/H flips */ -+ ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_HFLIP, 0, 1, 1, 0); -+ ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_VFLIP, 0, 1, 1, 0); -+ -+ -+ /* Test patterns */ -+ ctrls->test_pattern = -+ v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN, -+ ARRAY_SIZE(test_pattern_menu) - 1, -+ 0, 0, test_pattern_menu); -+#if 0 -+ -+ ctrls->metering = -+ v4l2_ctrl_new_std_menu(hdl, ops, V4L2_CID_EXPOSURE_METERING, -+ V4L2_EXPOSURE_METERING_CENTER_WEIGHTED, -+ 0, V4L2_EXPOSURE_METERING_AVERAGE); -+ -+ for (i = 0; i < ARRAY_SIZE(gc2145_wb_opts); i++) { -+ if (wb_max < gc2145_wb_opts[i][0]) -+ wb_max = gc2145_wb_opts[i][0]; -+ wb_mask |= BIT(gc2145_wb_opts[i][0]); -+ } -+ -+ ctrls->wb = v4l2_ctrl_new_std_menu(hdl, ops, -+ V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE, -+ wb_max, ~wb_mask, V4L2_WHITE_BALANCE_AUTO); -+ -+ ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE, -+ 0, 4000, 1, 1000); -+ ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE, -+ 0, 4000, 1, 1000); -+ -+ ctrls->gamma = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAMMA, -+ 0, 31, 1, 20); -+ -+ ctrls->colorfx = -+ v4l2_ctrl_new_std_menu(hdl, ops, V4L2_CID_COLORFX, 15, -+ ~(BIT(V4L2_COLORFX_NONE) | -+ BIT(V4L2_COLORFX_NEGATIVE) | -+ BIT(V4L2_COLORFX_SOLARIZATION) | -+ BIT(V4L2_COLORFX_SKETCH) | -+ BIT(V4L2_COLORFX_SEPIA) | -+ BIT(V4L2_COLORFX_ANTIQUE) | -+ BIT(V4L2_COLORFX_AQUA) | -+ BIT(V4L2_COLORFX_BW)), -+ V4L2_COLORFX_NONE); -+ -+ ctrls->pl_freq = -+ v4l2_ctrl_new_std_menu(hdl, ops, V4L2_CID_POWER_LINE_FREQUENCY, -+ V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0, -+ V4L2_CID_POWER_LINE_FREQUENCY_50HZ); -+ -+ ctrls->brightness = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BRIGHTNESS, -+ 0, 200, 1, 90); -+ ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, -+ 0, 200, 1, 110); -+ ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, -+ 0, 200, 1, 108); -+ -+ ctrls->aaa_lock = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_3A_LOCK, -+ 0, 0x7, 0, 0); -+ -+ for (i = 0; i < ARRAY_SIZE(ctrls->test_data); i++) -+ ctrls->test_data[i] = -+ v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_TEST_PATTERN_RED + i, -+ 0, 1023, 1, 0); -+ -+ ctrls->af_status->flags |= V4L2_CTRL_FLAG_VOLATILE | -+ V4L2_CTRL_FLAG_READ_ONLY; -+ -+ v4l2_ctrl_auto_cluster(3, &ctrls->wb, V4L2_WHITE_BALANCE_MANUAL, false); -+#endif -+ -+ v4l2_ctrl_auto_cluster(4, &ctrls->auto_exposure, V4L2_EXPOSURE_MANUAL, -+ true); -+ -+ if (hdl->error) { -+ ret = hdl->error; -+ goto free_ctrls; -+ } -+ -+ sensor->sd.ctrl_handler = hdl; -+ return 0; -+ -+free_ctrls: -+ v4l2_ctrl_handler_free(hdl); -+ return ret; -+} -+ -+/* }}} */ -+/* {{{ Video ops */ -+ -+static int gc2145_g_frame_interval(struct v4l2_subdev *sd, -+ struct v4l2_subdev_frame_interval *fi) -+{ -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ -+ if (fi->pad != 0) -+ return -EINVAL; -+ -+ mutex_lock(&sensor->lock); -+ fi->interval = sensor->frame_interval; -+ mutex_unlock(&sensor->lock); -+ -+ return 0; -+} -+ -+static int gc2145_s_frame_interval(struct v4l2_subdev *sd, -+ struct v4l2_subdev_frame_interval *fi) -+{ -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ int ret = 0, fps; -+ -+ if (fi->pad != 0) -+ return -EINVAL; -+ -+ mutex_lock(&sensor->lock); -+ -+ /* user requested infinite frame rate */ -+ if (fi->interval.numerator == 0) -+ fps = 60; -+ else -+ fps = DIV_ROUND_CLOSEST(fi->interval.denominator, -+ fi->interval.numerator); -+ -+ fps = clamp(fps, 1, 60); -+ -+ sensor->frame_interval.numerator = 1; -+ sensor->frame_interval.denominator = fps; -+ fi->interval = sensor->frame_interval; -+ -+#if 0 -+ if (sensor->streaming) { -+ ret = gc2145_write16(sensor, GC2145_REG_DESIRED_FRAME_RATE_NUM, -+ fps); -+ if (ret) -+ goto err_unlock; -+ } -+err_unlock: -+#endif -+ -+ mutex_unlock(&sensor->lock); -+ return ret; -+} -+ -+/* -+ * Clock tree -+ * ---------- -+ * -+ * MCLK pin -+ * | -+ * DIV2 (optional) - Divide input MCLK by 2 when 0xf7[1] == 1 -+ * | -+ * /- PLL mux -\ - PLL selected by 0xf8[7], otherwise fixed 32x mult -+ * | | -+ * PLL | - PLL multiplies by 0xf8[5:0]+1 * 4 -+ * | Fixed 32/48x - Multiplies 32x when 0xf7[2] == 1 otherwise 48x -+ * \_________/ -+ * | -+ * DOUBLE (div by 4 or 8) based on 0xf7[3] -+ * | -+ * /-------\ -+ * | | -+ * pclk_div sclk_div -+ * | | -+ * 2pclk sclk -+ */ -+__maybe_unused -+static int gc2145_get_2pclk(struct gc2145_dev *sensor, unsigned long* pclk) -+{ -+ u8 pll_mode1, pll_mode2, clk_div_mode; -+ bool mclk_div2_en; // 0xf7[1] -+ bool pll_en; // 0xf8[7] -+ bool double_clk; // 0xf7[3] -+ bool fixed_32x; // 0xf7[2] -+ unsigned long pll_mult; // 0xf8[5:0] + 1 -+ unsigned long sclk_div; // 1 << (0xf7[5:4] + 1) -+ unsigned long pclk_div; // 0xfa[7:4] + 1 -+ unsigned long int_clk; -+ unsigned long mclk; -+ int ret; -+ -+ ret = gc2145_read(sensor, 0xf7, &pll_mode1); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_read(sensor, 0xf8, &pll_mode2); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_read(sensor, 0xfa, &clk_div_mode); -+ if (ret) -+ return ret; -+ -+ mclk = clk_get_rate(sensor->xclk); -+ if (mclk == 0) -+ return -EINVAL; -+ -+ mclk_div2_en = pll_mode1 & BIT(1); -+ pll_en = pll_mode2 & BIT(7); -+ double_clk = pll_mode1 & BIT(3); -+ fixed_32x = pll_mode1 & BIT(2); -+ pll_mult = (pll_mode2 & 0x3f) + 1; -+ pclk_div = (clk_div_mode >> 4) + 1; -+ sclk_div = 1 << (((pll_mode1 >> 4) & 0x3) + 1); -+ -+ int_clk = mclk / (mclk_div2_en ? 2 : 1); -+ -+ if (pll_en) -+ int_clk *= pll_mult * 4; -+ else -+ int_clk *= fixed_32x ? 32 : 48; -+ -+ int_clk /= double_clk ? 4 : 8; -+ -+ if (pclk) -+ *pclk = int_clk / pclk_div; -+ -+ return 0; -+} -+ -+static int gc2145_set_2pclk(struct gc2145_dev *sensor, -+ unsigned long *freq, bool apply) -+{ -+ unsigned long pll_mult, pll_mult_max, /*sclk_div,*/ pclk_div, pclk2,/* sclk,*/ -+ mclk; -+ unsigned long pll_mult_best = 0, pclk_div_best = 0, diff_best = ULONG_MAX, diff, -+ pclk2_best = 0; -+ int mclk_div2_en; //, double_clk; -+ int mclk_div2_en_best = 0; //, double_clk_best; -+ -+ mclk = clk_get_rate(sensor->xclk); -+ if (mclk == 0) -+ return -EINVAL; -+ -+ for (mclk_div2_en = 0; mclk_div2_en <= 1; mclk_div2_en++) { -+ pll_mult_max = 768000000 / 4 / (mclk / (mclk_div2_en ? 2 : 1)); -+ if (pll_mult_max > 32) -+ pll_mult_max = 32; -+ -+ for (pll_mult = 2; pll_mult <= pll_mult_max; pll_mult++) { -+ for (pclk_div = 1; pclk_div <= 8; pclk_div++) { -+ pclk2 = mclk / (mclk_div2_en ? 2 : 1) * pll_mult / pclk_div; -+ -+ if (pclk2 > *freq) -+ continue; -+ -+ diff = *freq - pclk2; -+ -+ if (diff < diff_best) { -+ diff_best = diff; -+ pclk2_best = pclk2; -+ -+ pll_mult_best = pll_mult; -+ pclk_div_best = pclk_div; -+ mclk_div2_en_best = mclk_div2_en; -+ } -+ -+ if (diff == 0) -+ goto found; -+ } -+ } -+ } -+ -+ if (diff_best == ULONG_MAX) -+ return -1; -+ -+found: -+ *freq = pclk2_best; -+ if (!apply) -+ return 0; -+ -+ gc2145_tx_start(sensor); -+ -+ gc2145_tx_write8(sensor, 0xf7, -+ ((pclk_div_best - 1)) << 4 | -+ (mclk_div2_en_best << 1) | BIT(0) /* pll_en */); -+ gc2145_tx_write8(sensor, 0xf8, BIT(7) | (pll_mult_best - 1)); -+ gc2145_tx_write8(sensor, 0xfa, -+ (pclk_div_best - 1) << 4 | -+ (((pclk_div_best - 1) / 2) & 0xf)); -+ -+ return gc2145_tx_commit(sensor); -+} -+ -+static int gc2145_setup_awb(struct gc2145_dev *sensor, -+ u16 x1, u16 y1, u16 x2, u16 y2) -+{ -+ int ratio = 8; //XXX: manual for gc2035 FAE says 4 -+ -+ gc2145_tx_start(sensor); -+ -+ // disable awb -+ gc2145_tx_update_bits(sensor, 0x82, BIT(1), 0); -+ -+ // reset white balance RGB gains -+ gc2145_tx_write8(sensor, 0xb3, 0x40); -+ gc2145_tx_write8(sensor, 0xb4, 0x40); -+ gc2145_tx_write8(sensor, 0xb5, 0x40); -+ -+ // awb window -+ gc2145_tx_write8(sensor, 0x1ec, x1 / ratio); -+ gc2145_tx_write8(sensor, 0x1ed, y1 / ratio); -+ gc2145_tx_write8(sensor, 0x1ee, x2 / ratio); -+ gc2145_tx_write8(sensor, 0x1ef, y2 / ratio); -+ -+ // eanble awb -+ gc2145_tx_update_bits(sensor, 0x82, BIT(1), BIT(1)); -+ -+ //1051 { 0xfe, 0x01 }, -+ //1052 { 0x74, 0x01 }, -+ -+ return gc2145_tx_commit(sensor); -+} -+ -+static int gc2145_setup_aec(struct gc2145_dev *sensor, -+ u16 x1, u16 y1, u16 x2, u16 y2, -+ u16 cx1, u16 cy1, u16 cx2, u16 cy2) -+{ -+ u16 x_ratio = 8; -+ -+ //XXX: gc2035 has x ratio 16 -+ //XXX: gc2035 doesn't have low light mode -+ gc2145_tx_start(sensor); -+ -+ // disable AEC -+ gc2145_tx_write8(sensor, 0xb6, 0); -+ -+ // set reasonable initial exposure and gains -+ gc2145_tx_write16(sensor, 0x03, 1200); -+ gc2145_tx_write8(sensor, 0xb1, 0x20); -+ gc2145_tx_write8(sensor, 0xb2, 0xe0); -+ -+ // setup measure window -+ gc2145_tx_write8(sensor, 0x101, x1 / x_ratio); -+ gc2145_tx_write8(sensor, 0x102, x2 / x_ratio); -+ gc2145_tx_write8(sensor, 0x103, y1 / 8); -+ gc2145_tx_write8(sensor, 0x104, y2 / 8); -+ -+ // setup center -+ gc2145_tx_write8(sensor, 0x105, cx1 / x_ratio); -+ gc2145_tx_write8(sensor, 0x106, cx2 / x_ratio); -+ gc2145_tx_write8(sensor, 0x107, cy1 / 8); -+ gc2145_tx_write8(sensor, 0x108, cy2 / 8); -+ -+ // increase maximum exposure level to 4 -+ //gc2145_tx_write8(sensor, 0x13c, 0x60); -+ // setup AEC mode: measure point, adjust_max_gain, skip_mode = 2 -+ //gc2145_tx_write8(sensor, 0x10a, 0xc2); -+ -+ // AEC_ASDE_select_luma_value AEC_low_light_exp_THD_max: -+ //gc2145_tx_write8(sensor, 0x121, 0x15); -+ -+ // enable AEC again -+ gc2145_tx_write8(sensor, 0xb6, 1); -+ -+ return gc2145_tx_commit(sensor); -+} -+ -+struct gc2145_sensor_params { -+ unsigned int enable_scaler; -+ unsigned int col_scaler_only; -+ unsigned int row_skip; -+ unsigned int col_skip; -+ unsigned long sh_delay; -+ unsigned long hb; -+ unsigned long vb; -+ unsigned long st; -+ unsigned long et; -+ unsigned long win_width; -+ unsigned long win_height; -+ unsigned long width; -+ unsigned long height; -+}; -+ -+static void gc2145_sensor_params_init(struct gc2145_sensor_params* p, int width, int height) -+{ -+ p->win_height = height + 32; -+ p->win_width = (width + 16); -+ p->width = width; -+ p->height = height; -+ p->st = 2; -+ p->et = 2; -+ p->vb = 8; -+ p->hb = 0x1f0; -+ p->sh_delay = 30; -+} -+ -+// unit is PCLK periods -+static unsigned long -+gc2145_sensor_params_get_row_period(struct gc2145_sensor_params* p) -+{ -+ return 2 * (p->win_width / 2 / (p->col_skip + 1) + p->sh_delay + p->hb + 4); -+} -+ -+static unsigned long -+gc2145_sensor_params_get_frame_period(struct gc2145_sensor_params* p) -+{ -+ unsigned long rt = gc2145_sensor_params_get_row_period(p); -+ -+ return rt * (p->vb + p->win_height) / (p->row_skip + 1); -+} -+ -+static void -+gc2145_sensor_params_fit_hb_to_power_line_period(struct gc2145_sensor_params* p, -+ unsigned long power_line_freq, -+ unsigned long pclk) -+{ -+ unsigned long rt, power_line_ratio; -+ -+ for (p->hb = 0x1f0; p->hb < 2047; p->hb++) { -+ rt = gc2145_sensor_params_get_row_period(p); -+ -+ // power_line_ratio is row_freq / power_line_freq * 1000 -+ power_line_ratio = pclk / power_line_freq * 1000 / rt; -+ -+ // if we're close enough, stop the search -+ if (power_line_ratio % 1000 < 50) -+ break; -+ } -+ -+ // finding the optimal Hb is not critical -+ if (p->hb == 2047) -+ p->hb = 0x1f0; -+} -+ -+static void -+gc2145_sensor_params_fit_vb_to_frame_period(struct gc2145_sensor_params* p, -+ unsigned long frame_period) -+{ -+ unsigned long rt, fp; -+ -+ p->vb = 8; -+ rt = gc2145_sensor_params_get_row_period(p); -+ fp = gc2145_sensor_params_get_frame_period(p); -+ -+ if (frame_period > fp) -+ p->vb = frame_period * (p->row_skip + 1) / rt - p->win_height; -+ -+ if (p->vb > 4095) -+ p->vb = 4095; -+} -+ -+static int gc2145_sensor_params_apply(struct gc2145_dev *sensor, -+ struct gc2145_sensor_params* p) -+{ -+ u32 off_x = (GC2145_SENSOR_WIDTH_MAX - p->width) / 2; -+ u32 off_y = (GC2145_SENSOR_HEIGHT_MAX - p->height) / 2; -+ -+ gc2145_tx_start(sensor); -+ -+ gc2145_tx_write8(sensor, 0xfd, (p->enable_scaler ? BIT(0) : 0) -+ | (p->col_scaler_only ? BIT(1) : 0)); -+ -+ gc2145_tx_write8(sensor, 0x18, 0x0a -+ | (p->col_skip ? BIT(7) : 0) -+ | (p->row_skip ? BIT(6) : 0)); -+ -+ gc2145_tx_write16(sensor, 0x09, off_y); -+ gc2145_tx_write16(sensor, 0x0b, off_x); -+ gc2145_tx_write16(sensor, 0x0d, p->win_height); -+ gc2145_tx_write16(sensor, 0x0f, p->win_width); -+ gc2145_tx_write16(sensor, 0x05, p->hb); -+ gc2145_tx_write16(sensor, 0x07, p->vb); -+ gc2145_tx_write16(sensor, 0x11, p->sh_delay); -+ -+ gc2145_tx_write8(sensor, 0x13, p->st); -+ gc2145_tx_write8(sensor, 0x14, p->et); -+ -+ return gc2145_tx_commit(sensor); -+} -+ -+static int gc2145_setup_mode(struct gc2145_dev *sensor) -+{ -+ int scaling_desired, ret, pad; -+ struct gc2145_sensor_params params = {0}; -+ unsigned long pclk2, frame_period; -+ unsigned long power_line_freq = 50; -+ unsigned long width = sensor->fmt.width; -+ unsigned long height = sensor->fmt.height; -+ unsigned long framerate = sensor->frame_interval.denominator; -+ const struct gc2145_pixfmt *pix_fmt; -+ -+ pix_fmt = gc2145_find_format(sensor->fmt.code); -+ if (!pix_fmt) { -+ dev_err(&sensor->i2c_client->dev, -+ "pixel format not supported %u\n", sensor->fmt.code); -+ return -EINVAL; -+ } -+ -+ /* -+ * Equations for calculating framerate are: -+ * -+ * ww = width + 16 -+ * wh = height + 32 -+ * Rt = (ww / 2 / (col_skip + 1) + sh_delay + Hb + 4) -+ * Ft = Rt * (Vb + wh) / (row_skip + 1) -+ * framerate = 2pclk / 4 / Ft -+ * -+ * Based on these equations: -+ * -+ * 1) First we need to determine what 2PCLK frequency to use. The 2PCLK -+ * frequency is not arbitrarily precise, so we need to calculate the -+ * actual frequency used, after setting our target frequency. -+ * -+ * We use a simple heuristic: -+ * -+ * If pixel_count * 2 * framerate * 1.15 is > 40MHz, we use 60MHz, -+ * otherwise we use 40MHz. -+ * -+ * 2) We want to determine lowest Hb that we can use to extend row -+ * period so that row time takes an integer fraction of the power -+ * line frequency period. Minimum Hb is 0x1f0. -+ * -+ * 3) If the requested resolution is less than half the sensor's size, -+ * we'll use scaling, or row skipping + column scaling, or row and -+ * column skiping, depending on what allows us to achieve the -+ * requested framerate. -+ * -+ * 4) We use the selected Hb to calculate Vb value that will give -+ * us the desired framerate, given the scaling/skipping option -+ * selected in 3). -+ */ -+ -+ scaling_desired = width <= GC2145_SENSOR_WIDTH_MAX / 2 -+ && height <= GC2145_SENSOR_HEIGHT_MAX / 2; -+ -+ pclk2 = 60000000; -+ -+ ret = gc2145_set_2pclk(sensor, &pclk2, false); -+ if (ret < 0) -+ return ret; -+ -+ gc2145_sensor_params_init(¶ms, width, height); -+ -+ // if the resolution is < half the sensor size, enable the scaler -+ // to cover more area of the chip -+ if (scaling_desired) { -+ params.enable_scaler = 1; -+ pclk2 *= 2; -+ gc2145_sensor_params_init(¶ms, width * 2, height * 2); -+ } -+ -+ // we need to call this each time pclk or power_line_freq is changed -+ gc2145_sensor_params_fit_hb_to_power_line_period(¶ms, -+ power_line_freq, -+ pclk2 / 2); -+ -+ frame_period = gc2145_sensor_params_get_frame_period(¶ms); -+ if (framerate <= pclk2 / 2 / frame_period) -+ goto apply; -+ -+ if (scaling_desired) { -+ // try using just the column scaler + row skip -+ params.col_scaler_only = 1; -+ params.row_skip = 1; -+ gc2145_sensor_params_fit_hb_to_power_line_period(¶ms, -+ power_line_freq, -+ pclk2 / 2); -+ -+ frame_period = gc2145_sensor_params_get_frame_period(¶ms); -+ if (framerate <= pclk2 / 2 / frame_period) -+ goto apply; -+ -+ -+ /* -+ // try disabling the scaler and just use skipping -+ params.enable_scaler = 0; -+ pclk2 /= 2; -+ params.col_scaler_only = 0; -+ params.col_skip = 1; -+ gc2145_sensor_params_fit_hb_to_power_line_period(¶ms, power_line_freq, pclk2 / 2); -+ -+ frame_period = gc2145_sensor_params_get_frame_period(¶ms); -+ -+ if (framerate <= pclk2 / 2 / frame_period) -+ goto apply; -+ */ -+ } -+ -+apply: -+ // adjust vb to fit the target framerate -+ gc2145_sensor_params_fit_vb_to_frame_period(¶ms, -+ pclk2 / 2 / framerate); -+ -+ gc2145_sensor_params_apply(sensor, ¶ms); -+ -+ ret = gc2145_set_2pclk(sensor, &pclk2, true); -+ if (ret < 0) -+ return ret; -+ -+ pad = (width > 256 && height > 256) ? 32 : 16; -+ -+ ret = gc2145_setup_awb(sensor, pad, pad, width - pad * 2, height - pad * 2); -+ if (ret) -+ return ret; -+ -+ ret = gc2145_setup_aec(sensor, -+ pad, pad, width - pad * 2, height - pad * 2, -+ 2 * pad, 2 * pad, width - pad * 4, height - pad * 4); -+ if (ret) -+ return ret; -+ -+ gc2145_tx_start(sensor); -+ -+ // anti-flicker step -+ //gc2145_tx_write16(sensor, 0x125, 360); //XXX: get this from the calculator (hb related) -+ -+ //XXX: calculate auto exposure settings, there are 4 slots that the HW -+ //uses and exposure settings are set in row_time units -+ -+ unsigned long rt = gc2145_sensor_params_get_row_period(¶ms); -+ unsigned long ft = gc2145_sensor_params_get_frame_period(¶ms); -+ unsigned long ft_rt = ft / rt / 4; -+ int i; -+ -+ for (i = 0; i < 7; i++) { -+ // exposure settings for exposure levels -+ gc2145_tx_write16(sensor, 0x127 + 2 * i, ft_rt * (i + 1)); -+ // max dg gains -+ gc2145_tx_write8(sensor, 0x135 + i, 0x50); -+ } -+ -+ // max analog gain -+ gc2145_tx_write8(sensor, 0x11f, 0x50); -+ // max digital gain -+ gc2145_tx_write8(sensor, 0x120, 0xe0); -+ -+ gc2145_tx_write8(sensor, GC2145_P0_ISP_OUT_FORMAT, pix_fmt->fmt_setup); -+ -+ // set gamma curve -+ gc2145_tx_update_bits(sensor, 0x80, BIT(6), BIT(6)); -+ -+ // disable denoising -+ gc2145_tx_update_bits(sensor, 0x80, BIT(2), 0); -+ -+ // drive strength -+ gc2145_tx_write8(sensor, 0x24, -+ (pclk2 / (params.enable_scaler + 1)) > 40000000 ? -+ 0xff : 0x55); -+ -+ return gc2145_tx_commit(sensor); -+} -+ -+static int gc2145_set_stream(struct gc2145_dev *sensor, int enable) -+{ -+ gc2145_tx_start(sensor); -+ -+ gc2145_tx_write8(sensor, GC2145_REG_PAD_IO, enable ? 0x0f : 0); -+ -+ //XXX: maybe disable cam module function blocks that are not used -+ //and downclock the PLL/disable it when not streaming? -+ -+ return gc2145_tx_commit(sensor); -+} -+ -+static int gc2145_s_stream(struct v4l2_subdev *sd, int enable) -+{ -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ int ret = 0; -+ -+ mutex_lock(&sensor->lock); -+ -+ if (sensor->streaming == !enable) { -+ if (enable && sensor->pending_mode_change) { -+ ret = gc2145_setup_mode(sensor); -+ if (ret) -+ goto out; -+ } -+ -+ ret = gc2145_set_stream(sensor, enable); -+ if (ret) -+ goto out; -+ -+ sensor->streaming = !!enable; -+ } -+ -+out: -+ mutex_unlock(&sensor->lock); -+ return ret; -+} -+ -+/* }}} */ -+/* {{{ Pad ops */ -+ -+static int gc2145_enum_mbus_code(struct v4l2_subdev *sd, -+ struct v4l2_subdev_pad_config *cfg, -+ struct v4l2_subdev_mbus_code_enum *code) -+{ -+ if (code->pad != 0 || code->index >= ARRAY_SIZE(gc2145_formats)) -+ return -EINVAL; -+ -+ code->code = gc2145_formats[code->index].code; -+ -+ return 0; -+} -+ -+static int gc2145_enum_frame_size(struct v4l2_subdev *sd, -+ struct v4l2_subdev_pad_config *cfg, -+ struct v4l2_subdev_frame_size_enum *fse) -+{ -+ if (fse->pad != 0 || fse->index > 0) -+ return -EINVAL; -+ -+ fse->min_width = GC2145_SENSOR_WIDTH_MIN; -+ fse->max_width = GC2145_SENSOR_WIDTH_MAX; -+ -+ fse->min_height = GC2145_SENSOR_HEIGHT_MIN; -+ fse->max_height = GC2145_SENSOR_HEIGHT_MAX; -+ -+ return 0; -+} -+ -+static int gc2145_enum_frame_interval( -+ struct v4l2_subdev *sd, -+ struct v4l2_subdev_pad_config *cfg, -+ struct v4l2_subdev_frame_interval_enum *fie) -+{ -+ if (fie->pad != 0 || fie->index > 0) -+ return -EINVAL; -+ -+ fie->interval.numerator = 1; -+ fie->interval.denominator = 30; -+ -+ return 0; -+} -+ -+static int gc2145_get_fmt(struct v4l2_subdev *sd, -+ struct v4l2_subdev_pad_config *cfg, -+ struct v4l2_subdev_format *format) -+{ -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ struct v4l2_mbus_framefmt *mf; -+ -+ if (format->pad != 0) -+ return -EINVAL; -+ -+ if (format->which == V4L2_SUBDEV_FORMAT_TRY) { -+ mf = v4l2_subdev_get_try_format(sd, cfg, format->pad); -+ format->format = *mf; -+ return 0; -+ } -+ -+ mutex_lock(&sensor->lock); -+ format->format = sensor->fmt; -+ mutex_unlock(&sensor->lock); -+ -+ return 0; -+} -+ -+static int gc2145_set_fmt(struct v4l2_subdev *sd, -+ struct v4l2_subdev_pad_config *cfg, -+ struct v4l2_subdev_format *format) -+{ -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ struct v4l2_mbus_framefmt *mf = &format->format; -+ const struct gc2145_pixfmt *pixfmt; -+ int ret = 0; -+ -+ if (format->pad != 0) -+ return -EINVAL; -+ -+ /* check if we support requested mbus fmt */ -+ pixfmt = gc2145_find_format(mf->code); -+ if (!pixfmt) -+ pixfmt = &gc2145_formats[0]; -+ -+ mf->code = pixfmt->code; -+ mf->colorspace = pixfmt->colorspace; -+ mf->xfer_func = V4L2_XFER_FUNC_DEFAULT; -+ mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; -+ mf->quantization = V4L2_QUANTIZATION_DEFAULT; -+ mf->field = V4L2_FIELD_NONE; -+ -+ mutex_lock(&sensor->lock); -+ -+ mf->width = clamp(mf->width, GC2145_SENSOR_WIDTH_MIN, -+ GC2145_SENSOR_WIDTH_MAX); -+ mf->height = clamp(mf->height, GC2145_SENSOR_HEIGHT_MIN, -+ GC2145_SENSOR_HEIGHT_MAX); -+ -+ if (format->which == V4L2_SUBDEV_FORMAT_TRY) { -+ struct v4l2_mbus_framefmt *try_mf; -+ -+ try_mf = v4l2_subdev_get_try_format(sd, cfg, format->pad); -+ *try_mf = *mf; -+ goto out; -+ } -+ -+ if (sensor->streaming) { -+ ret = -EBUSY; -+ goto out; -+ } -+ -+ sensor->fmt = *mf; -+ sensor->pending_mode_change = true; -+out: -+ mutex_unlock(&sensor->lock); -+ return ret; -+} -+ -+/* }}} */ -+/* {{{ Core Ops */ -+ -+static int gc2145_configure(struct gc2145_dev *sensor) -+{ -+ struct v4l2_fwnode_bus_parallel *bus = &sensor->ep.bus.parallel; -+ u8 sync_mode = 0; -+ u16 chip_id; -+ int ret; -+ -+ ret = gc2145_read16(sensor, GC2145_REG_CHIP_ID, &chip_id); -+ if (ret) -+ return ret; -+ -+ dev_info(&sensor->i2c_client->dev, "device id: 0x%04x\n", -+ (unsigned int)chip_id); -+ -+ if (chip_id != GC2145_REG_CHIP_ID_VALUE) { -+ dev_err(&sensor->i2c_client->dev, -+ "unsupported device id: 0x%04x\n", -+ (unsigned int)chip_id); -+ return -EINVAL; -+ } -+ -+ // setup parallel bus -+ -+ if (bus->flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) -+ sync_mode |= 0x01; -+ -+ if (bus->flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) -+ sync_mode |= 0x02; -+ -+ if (bus->flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) -+ sync_mode |= 0x04; -+ -+ gc2145_tx_start(sensor); -+ -+ // soft reset -+ gc2145_tx_write8(sensor, GC2145_REG_RESET, 0xf0); -+ -+ // enable analog/digital parts -+ gc2145_tx_write8(sensor, GC2145_REG_ANALOG_PWC, 0x06); -+ -+ // safe initial PLL setting -+ gc2145_tx_write8(sensor, GC2145_REG_PLL_MODE1, 0x1d); -+ gc2145_tx_write8(sensor, GC2145_REG_PLL_MODE2, 0x84); -+ gc2145_tx_write8(sensor, GC2145_REG_CLK_DIV_MODE, 0x00); -+ -+ gc2145_tx_write8(sensor, GC2145_REG_CM_MODE, 0xfe); -+ -+ // disable pads -+ gc2145_tx_write8(sensor, GC2145_REG_PAD_IO, 0); -+ -+ gc2145_tx_write8(sensor, 0x19, 0x0c); // set AD pipe number -+ gc2145_tx_write8(sensor, 0x20, 0x01); // AD clk mode -+ -+ // enable defect correction, etc. -+ gc2145_tx_write8(sensor, 0x80, 0x0b); -+ -+ gc2145_tx_write8(sensor, GC2145_P0_SYNC_MODE, sync_mode); -+ -+ ret = gc2145_tx_commit(sensor); -+ if (ret) -+ return ret; -+ -+ // load default register values from the firmware file -+ ret = gc2145_load_firmware(sensor, GC2145_FIRMWARE_PARAMETERS); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ -+static int gc2145_set_power(struct gc2145_dev *sensor, bool on) -+{ -+ int ret = 0; -+ -+ if (on) { -+ ret = regulator_bulk_enable(GC2145_NUM_SUPPLIES, -+ sensor->supplies); -+ if (ret) -+ return ret; -+ -+ ret = clk_set_rate(sensor->xclk, 24000000); -+ if (ret) -+ goto xclk_off; -+ -+ ret = clk_prepare_enable(sensor->xclk); -+ if (ret) -+ goto power_off; -+ -+ usleep_range(10000, 12000); -+ gpiod_direction_output(sensor->reset_gpio, 1); -+ usleep_range(10000, 12000); -+ gpiod_direction_output(sensor->enable_gpio, 1); -+ usleep_range(10000, 12000); -+ gpiod_direction_output(sensor->reset_gpio, 0); -+ usleep_range(40000, 50000); -+ -+ ret = gc2145_configure(sensor); -+ if (ret) -+ goto xclk_off; -+ -+ ret = gc2145_setup_mode(sensor); -+ if (ret) -+ goto xclk_off; -+ -+ return 0; -+ } -+ -+xclk_off: -+ clk_disable_unprepare(sensor->xclk); -+power_off: -+ gpiod_direction_input(sensor->reset_gpio); -+ gpiod_direction_input(sensor->enable_gpio); -+ regulator_bulk_disable(GC2145_NUM_SUPPLIES, sensor->supplies); -+ msleep(100); -+ return ret; -+} -+ -+static int gc2145_s_power(struct v4l2_subdev *sd, int on) -+{ -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ bool power_up, power_down; -+ int ret = 0; -+ -+ mutex_lock(&sensor->lock); -+ -+ power_up = on && !sensor->powered; -+ power_down = !on && sensor->powered; -+ -+ if (power_up || power_down) { -+ ret = gc2145_set_power(sensor, power_up); -+ if (!ret) -+ sensor->powered = on; -+ } -+ -+ mutex_unlock(&sensor->lock); -+ -+ if (!ret && power_up) { -+ /* restore controls */ -+ ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler); -+ if (ret) -+ gc2145_s_power(sd, 0); -+ } -+ -+ return ret; -+} -+ -+#ifdef CONFIG_VIDEO_ADV_DEBUG -+static int gc2145_g_register(struct v4l2_subdev *sd, -+ struct v4l2_dbg_register *reg) -+{ -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ int ret; -+ u8 val = 0; -+ -+ if (reg->reg > 0xffff) -+ return -EINVAL; -+ -+ reg->size = 1; -+ -+ mutex_lock(&sensor->lock); -+ ret = gc2145_read(sensor, reg->reg, &val); -+ mutex_unlock(&sensor->lock); -+ if (ret) -+ return -EIO; -+ -+ reg->val = val; -+ return 0; -+} -+ -+static int gc2145_s_register(struct v4l2_subdev *sd, -+ const struct v4l2_dbg_register *reg) -+{ -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ int ret; -+ -+ if (reg->reg > 0xffff || reg->val > 0xff) -+ return -EINVAL; -+ -+ mutex_lock(&sensor->lock); -+ ret = gc2145_write(sensor, reg->reg, reg->val); -+ mutex_unlock(&sensor->lock); -+ -+ return ret; -+} -+#endif -+ -+/* }}} */ -+ -+static const struct v4l2_subdev_core_ops gc2145_core_ops = { -+ .s_power = gc2145_s_power, -+#ifdef CONFIG_VIDEO_ADV_DEBUG -+ .g_register = gc2145_g_register, -+ .s_register = gc2145_s_register, -+#endif -+}; -+ -+static const struct v4l2_subdev_pad_ops gc2145_pad_ops = { -+ .enum_mbus_code = gc2145_enum_mbus_code, -+ .enum_frame_size = gc2145_enum_frame_size, -+ .enum_frame_interval = gc2145_enum_frame_interval, -+ .get_fmt = gc2145_get_fmt, -+ .set_fmt = gc2145_set_fmt, -+}; -+ -+static const struct v4l2_subdev_video_ops gc2145_video_ops = { -+ .g_frame_interval = gc2145_g_frame_interval, -+ .s_frame_interval = gc2145_s_frame_interval, -+ .s_stream = gc2145_s_stream, -+}; -+ -+static const struct v4l2_subdev_ops gc2145_subdev_ops = { -+ .core = &gc2145_core_ops, -+ .pad = &gc2145_pad_ops, -+ .video = &gc2145_video_ops, -+}; -+ -+static int gc2145_get_regulators(struct gc2145_dev *sensor) -+{ -+ int i; -+ -+ for (i = 0; i < GC2145_NUM_SUPPLIES; i++) -+ sensor->supplies[i].supply = gc2145_supply_name[i]; -+ -+ return devm_regulator_bulk_get(&sensor->i2c_client->dev, -+ GC2145_NUM_SUPPLIES, -+ sensor->supplies); -+} -+ -+static int gc2145_probe(struct i2c_client *client, -+ const struct i2c_device_id *id) -+{ -+ struct device *dev = &client->dev; -+ struct fwnode_handle *endpoint; -+ struct gc2145_dev *sensor; -+ int ret; -+ -+ sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL); -+ if (!sensor) -+ return -ENOMEM; -+ -+ sensor->i2c_client = client; -+ -+ sensor->fmt.code = gc2145_formats[0].code; -+ sensor->fmt.width = 1600; -+ sensor->fmt.height = 1200; -+ sensor->fmt.field = V4L2_FIELD_NONE; -+ sensor->frame_interval.numerator = 1; -+ sensor->frame_interval.denominator = 10; -+ sensor->pending_mode_change = true; -+ sensor->current_bank = 0xff; -+ -+ endpoint = fwnode_graph_get_next_endpoint( -+ of_fwnode_handle(client->dev.of_node), NULL); -+ if (!endpoint) { -+ dev_err(dev, "endpoint node not found\n"); -+ return -EINVAL; -+ } -+ -+ ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep); -+ fwnode_handle_put(endpoint); -+ if (ret) { -+ dev_err(dev, "could not parse endpoint\n"); -+ return ret; -+ } -+ -+ if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL) { -+ dev_err(dev, "unsupported bus type %d\n", sensor->ep.bus_type); -+ return -EINVAL; -+ } -+ -+ sensor->xclk = devm_clk_get(dev, "xclk"); -+ if (IS_ERR(sensor->xclk)) { -+ dev_err(dev, "failed to get xclk\n"); -+ return PTR_ERR(sensor->xclk); -+ } -+ -+ sensor->enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_IN); -+ if (IS_ERR(sensor->enable_gpio)) { -+ dev_err(dev, "failed to get enable gpio\n"); -+ return PTR_ERR(sensor->enable_gpio); -+ } -+ -+ sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_IN); -+ if (IS_ERR(sensor->reset_gpio)) { -+ dev_err(dev, "failed to get reset gpio\n"); -+ return PTR_ERR(sensor->reset_gpio); -+ } -+ -+ if (!sensor->enable_gpio || !sensor->reset_gpio) { -+ dev_err(dev, "enable and reset pins must be configured\n"); -+ return ret; -+ } -+ -+ v4l2_i2c_subdev_init(&sensor->sd, client, &gc2145_subdev_ops); -+ -+ sensor->sd.flags = V4L2_SUBDEV_FL_HAS_DEVNODE; -+ sensor->pad.flags = MEDIA_PAD_FL_SOURCE; -+ sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; -+ ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad); -+ if (ret) -+ return ret; -+ -+ mutex_init(&sensor->lock); -+ -+ ret = gc2145_get_regulators(sensor); -+ if (ret) -+ goto entity_cleanup; -+ -+ ret = gc2145_init_controls(sensor); -+ if (ret) -+ goto entity_cleanup; -+ -+ ret = v4l2_async_register_subdev(&sensor->sd); -+ if (ret) -+ goto free_ctrls; -+ -+ return 0; -+ -+free_ctrls: -+ v4l2_ctrl_handler_free(&sensor->ctrls.handler); -+entity_cleanup: -+ mutex_destroy(&sensor->lock); -+ media_entity_cleanup(&sensor->sd.entity); -+ return ret; -+} -+ -+static int gc2145_remove(struct i2c_client *client) -+{ -+ struct v4l2_subdev *sd = i2c_get_clientdata(client); -+ struct gc2145_dev *sensor = to_gc2145_dev(sd); -+ -+ v4l2_async_unregister_subdev(&sensor->sd); -+ mutex_destroy(&sensor->lock); -+ media_entity_cleanup(&sensor->sd.entity); -+ v4l2_ctrl_handler_free(&sensor->ctrls.handler); -+ -+ return 0; -+} -+ -+static const struct i2c_device_id gc2145_id[] = { -+ {"gc2145", 0}, -+ {}, -+}; -+MODULE_DEVICE_TABLE(i2c, gc2145_id); -+ -+static const struct of_device_id gc2145_dt_ids[] = { -+ { .compatible = "galaxycore,gc2145" }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, gc2145_dt_ids); -+ -+static struct i2c_driver gc2145_i2c_driver = { -+ .driver = { -+ .name = "gc2145", -+ .of_match_table = gc2145_dt_ids, -+ }, -+ .id_table = gc2145_id, -+ .probe = gc2145_probe, -+ .remove = gc2145_remove, -+}; -+ -+module_i2c_driver(gc2145_i2c_driver); -+ -+MODULE_AUTHOR("Ondrej Jirman "); -+MODULE_DESCRIPTION("GC2145 Camera Subdev Driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/media/i2c/hm5065.c b/drivers/media/i2c/hm5065.c -new file mode 100644 -index 000000000000..68e43308e862 ---- /dev/null -+++ b/drivers/media/i2c/hm5065.c -@@ -0,0 +1,2208 @@ -+/* -+ * Himax HM5065 driver. -+ * Copyright (C) 2017-2019 OndÅ™ej Jirman . -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define HM5065_AF_FIRMWARE "hm5065-af.bin" -+#define HM5065_FIRMWARE_PARAMETERS "hm5065-init.bin" -+ -+#define HM5065_SENSOR_WIDTH 2592u -+#define HM5065_SENSOR_HEIGHT 1944u -+#define HM5065_CAPTURE_WIDTH_MIN 88u -+#define HM5065_CAPTURE_HEIGHT_MIN 72u -+ -+/* {{{ Register definitions */ -+ -+/* registers are assumed to be u8 unless otherwise specified */ -+ -+/* device parameters */ -+#define HM5065_REG_DEVICE_ID 0x0000 /* u16 */ -+#define HM5065_REG_DEVICE_ID_VALUE 0x039e -+#define HM5065_REG_FIRMWARE_VSN 0x0002 -+#define HM5065_REG_PATCH_VSN 0x0003 -+#define HM5065_REG_EXCLOCKLUT 0x0009 /* standby */ -+ -+#define HM5065_REG_INT_EVENT_FLAG 0x000a -+#define HM5065_REG_INT_EVENT_FLAG_OP_MODE BIT(0) -+#define HM5065_REG_INT_EVENT_FLAG_CAM_MODE BIT(1) -+#define HM5065_REG_INT_EVENT_FLAG_JPEG_STATUS BIT(2) -+#define HM5065_REG_INT_EVENT_FLAG_NUM_FRAMES BIT(3) -+#define HM5065_REG_INT_EVENT_FLAG_AF_LOCKED BIT(4) -+ -+/* mode manager */ -+#define HM5065_REG_USER_COMMAND 0x0010 -+#define HM5065_REG_USER_COMMAND_STOP 0x00 -+#define HM5065_REG_USER_COMMAND_RUN 0x01 -+#define HM5065_REG_USER_COMMAND_POWEROFF 0x02 -+ -+#define HM5065_REG_STATE 0x0011 -+#define HM5065_REG_STATE_RAW 0x10 -+#define HM5065_REG_STATE_IDLE 0x20 -+#define HM5065_REG_STATE_RUNNING 0x30 -+ -+#define HM5065_REG_ACTIVE_PIPE_SETUP_BANK 0x0012 -+#define HM5065_REG_ACTIVE_PIPE_SETUP_BANK_0 0x00 -+#define HM5065_REG_ACTIVE_PIPE_SETUP_BANK_1 0x01 -+ -+#define HM5065_REG_NUMBER_OF_FRAMES_STREAMED 0x0014 /* ro */ -+#define HM5065_REG_REQUIRED_STREAM_LENGTH 0x0015 -+ -+#define HM5065_REG_CSI_ENABLE 0x0016 /* standby */ -+#define HM5065_REG_CSI_ENABLE_DISABLE 0x00 -+#define HM5065_REG_CSI_ENABLE_CSI2_1LANE 0x01 -+#define HM5065_REG_CSI_ENABLE_CSI2_2LANE 0x02 -+ -+/* pipe setup bank 0 */ -+#define HM5065_REG_P0_SENSOR_MODE 0x0040 -+#define HM5065_REG_SENSOR_MODE_FULLSIZE 0x00 -+#define HM5065_REG_SENSOR_MODE_BINNING_2X2 0x01 -+#define HM5065_REG_SENSOR_MODE_BINNING_4X4 0x02 -+#define HM5065_REG_SENSOR_MODE_SUBSAMPLING_2X2 0x03 -+#define HM5065_REG_SENSOR_MODE_SUBSAMPLING_4X4 0x04 -+ -+#define HM5065_REG_P0_IMAGE_SIZE 0x0041 -+#define HM5065_REG_IMAGE_SIZE_5MP 0x00 -+#define HM5065_REG_IMAGE_SIZE_UXGA 0x01 -+#define HM5065_REG_IMAGE_SIZE_SXGA 0x02 -+#define HM5065_REG_IMAGE_SIZE_SVGA 0x03 -+#define HM5065_REG_IMAGE_SIZE_VGA 0x04 -+#define HM5065_REG_IMAGE_SIZE_CIF 0x05 -+#define HM5065_REG_IMAGE_SIZE_QVGA 0x06 -+#define HM5065_REG_IMAGE_SIZE_QCIF 0x07 -+#define HM5065_REG_IMAGE_SIZE_QQVGA 0x08 -+#define HM5065_REG_IMAGE_SIZE_QQCIF 0x09 -+#define HM5065_REG_IMAGE_SIZE_MANUAL 0x0a -+ -+#define HM5065_REG_P0_MANUAL_HSIZE 0x0042 /* u16 */ -+#define HM5065_REG_P0_MANUAL_VSIZE 0x0044 /* u16 */ -+ -+#define HM5065_REG_P0_DATA_FORMAT 0x0046 -+#define HM5065_REG_DATA_FORMAT_YCBCR_JFIF 0x00 -+#define HM5065_REG_DATA_FORMAT_YCBCR_REC601 0x01 -+#define HM5065_REG_DATA_FORMAT_YCBCR_CUSTOM 0x02 -+#define HM5065_REG_DATA_FORMAT_RGB_565 0x03 -+#define HM5065_REG_DATA_FORMAT_RGB_565_CUSTOM 0x04 -+#define HM5065_REG_DATA_FORMAT_RGB_444 0x05 -+#define HM5065_REG_DATA_FORMAT_RGB_555 0x06 -+#define HM5065_REG_DATA_FORMAT_RAW10ITU10 0x07 -+#define HM5065_REG_DATA_FORMAT_RAW10ITU8 0x08 -+#define HM5065_REG_DATA_FORMAT_JPEG 0x09 -+ -+#define HM5065_REG_P0_GAMMA_GAIN 0x0049 /* 0-31 */ -+#define HM5065_REG_P0_GAMMA_INTERPOLATION 0x004a /* 0-16 */ -+#define HM5065_REG_P0_PEAKING_GAIN 0x004c /* 0-63 */ -+ -+#define HM5065_REG_P0_JPEG_SQUEEZE_MODE 0x004d -+#define HM5065_REG_JPEG_SQUEEZE_MODE_USER 0x00 -+#define HM5065_REG_JPEG_SQUEEZE_MODE_AUTO 0x01 -+ -+#define HM5065_REG_P0_JPEG_TARGET_FILE_SIZE 0x004e /* u16, kB */ -+#define HM5065_REG_P0_JPEG_IMAGE_QUALITY 0x0050 -+#define HM5065_REG_JPEG_IMAGE_QUALITY_HIGH 0x00 -+#define HM5065_REG_JPEG_IMAGE_QUALITY_MEDIUM 0x01 -+#define HM5065_REG_JPEG_IMAGE_QUALITY_LOW 0x02 -+ -+/* pipe setup bank 1 (only register indexes) */ -+#define HM5065_REG_P1_SENSOR_MODE 0x0060 -+#define HM5065_REG_P1_IMAGE_SIZE 0x0061 -+#define HM5065_REG_P1_MANUAL_HSIZE 0x0062 /* u16 */ -+#define HM5065_REG_P1_MANUAL_VSIZE 0x0064 /* u16 */ -+#define HM5065_REG_P1_DATA_FORMAT 0x0066 -+#define HM5065_REG_P1_GAMMA_GAIN 0x0069 /* 0-31 */ -+#define HM5065_REG_P1_GAMMA_INTERPOLATION 0x006a /* 0-16 */ -+#define HM5065_REG_P1_PEAKING_GAIN 0x006c /* 0-63 */ -+#define HM5065_REG_P1_JPEG_SQUEEZE_MODE 0x006d -+#define HM5065_REG_P1_JPEG_TARGET_FILE_SIZE 0x006e /* u16, kB */ -+#define HM5065_REG_P1_JPEG_IMAGE_QUALITY 0x0070 -+ -+/* pipe setup - common registers */ -+#define HM5065_REG_CONTRAST 0x0080 /* 0-200 */ -+#define HM5065_REG_COLOR_SATURATION 0x0081 /* 0-200 */ -+#define HM5065_REG_BRIGHTNESS 0x0082 /* 0-200 */ -+#define HM5065_REG_HORIZONTAL_MIRROR 0x0083 /* 0,1 */ -+#define HM5065_REG_VERTICAL_FLIP 0x0084 /* 0,1 */ -+ -+#define HM5065_REG_YCRCB_ORDER 0x0085 -+#define HM5065_REG_YCRCB_ORDER_CB_Y_CR_Y 0x00 -+#define HM5065_REG_YCRCB_ORDER_CR_Y_CB_Y 0x01 -+#define HM5065_REG_YCRCB_ORDER_Y_CB_Y_CR 0x02 -+#define HM5065_REG_YCRCB_ORDER_Y_CR_Y_CB 0x03 -+ -+/* clock chain parameter inputs (floating point) */ -+#define HM5065_REG_EXTERNAL_CLOCK_FREQ_MHZ 0x00b0 /* fp16, 6-27, standby */ -+#define HM5065_REG_TARGET_PLL_OUTPUT 0x00b2 /* fp16, 450-1000, standby */ -+ -+/* static frame rate control */ -+#define HM5065_REG_DESIRED_FRAME_RATE_NUM 0x00c8 /* u16 */ -+#define HM5065_REG_DESIRED_FRAME_RATE_DEN 0x00ca -+ -+/* static frame rate status */ -+#define HM5065_REG_REQUESTED_FRAME_RATE_HZ 0x00d8 /* fp16 */ -+#define HM5065_REG_MAX_FRAME_RATE_HZ 0x00da /* fp16 */ -+#define HM5065_REG_MIN_FRAME_RATE_HZ 0x00dc /* fp16 */ -+ -+/* exposure controls */ -+#define HM5065_REG_EXPOSURE_MODE 0x0128 -+#define HM5065_REG_EXPOSURE_MODE_AUTO 0x00 -+#define HM5065_REG_EXPOSURE_MODE_COMPILED_MANUAL 0x01 -+#define HM5065_REG_EXPOSURE_MODE_DIRECT_MANUAL 0x02 -+ -+#define HM5065_REG_EXPOSURE_METERING 0x0129 -+#define HM5065_REG_EXPOSURE_METERING_FLAT 0x00 -+#define HM5065_REG_EXPOSURE_METERING_BACKLIT 0x01 -+#define HM5065_REG_EXPOSURE_METERING_CENTERED 0x02 -+ -+#define HM5065_REG_MANUAL_EXPOSURE_TIME_NUM 0x012a -+#define HM5065_REG_MANUAL_EXPOSURE_TIME_DEN 0x012b -+#define HM5065_REG_MANUAL_EXPOSURE_TIME_US 0x012c /* fp16 */ -+#define HM5065_REG_COLD_START_DESIRED_TIME_US 0x012e /* fp16, standby */ -+#define HM5065_REG_EXPOSURE_COMPENSATION 0x0130 /* s8, -7 - +7 */ -+ -+#define HM5065_REG_DIRECT_MODE_COARSE_INTEGRATION_LINES 0x0132 /* u16 */ -+#define HM5065_REG_DIRECT_MODE_FINE_INTEGRATION_PIXELS 0x0134 /* u16 */ -+#define HM5065_REG_DIRECT_MODE_CODED_ANALOG_GAIN 0x0136 /* u16 */ -+#define HM5065_REG_DIRECT_MODE_DIGITAL_GAIN 0x0138 /* fp16 */ -+#define HM5065_REG_FREEZE_AUTO_EXPOSURE 0x0142 /* 0,1 */ -+#define HM5065_REG_USER_MAXIMUM_INTEGRATION_TIME_US 0x0143 /* fp16 */ -+#define HM5065_REG_ANTI_FLICKER_MODE 0x0148 /* 0,1 */ -+ -+/* exposure algorithm controls */ -+#define HM5065_REG_DIGITAL_GAIN_FLOOR 0x015c /* fp16 */ -+#define HM5065_REG_DIGITAL_GAIN_CEILING 0x015e /* fp16 */ -+#define HM5065_REG_ANALOG_GAIN_FLOOR 0x02c0 /* u16 */ -+#define HM5065_REG_ANALOG_GAIN_CEILING 0x02c2 /* u16 */ -+ -+/* exposure status */ -+#define HM5065_REG_COARSE_INTEGRATION 0x017c /* u16 */ -+#define HM5065_REG_FINE_INTEGRATION_PENDING_PIXELS 0x017e /* u16 */ -+#define HM5065_REG_ANALOG_GAIN_PENDING 0x0180 /* fp16 */ -+#define HM5065_REG_DIGITAL_GAIN_PENDING 0x0182 /* fp16 */ -+#define HM5065_REG_DESIRED_EXPOSURE_TIME_US 0x0184 /* fp16 */ -+#define HM5065_REG_COMPILED_EXPOSURE_TIME_US 0x0186 /* fp16 */ -+#define HM5065_REG_USER_MAXIMUM_INTEGRATION_LINES 0x0189 /* u16 */ -+#define HM5065_REG_TOTAL_INTEGRATION_TIME_PENDING_US 0x018b /* fp16 */ -+#define HM5065_REG_CODED_ANALOG_GAIN_PENDING 0x018d /* u16 */ -+ -+/* flicker detect */ -+#define HM5065_REG_FD_ENABLE_DETECT 0x0190 /* 0,1 */ -+#define HM5065_REG_FD_DETECTION_START 0x0191 /* 0,1 */ -+#define HM5065_REG_FD_MAX_NUMBER_ATTEMP 0x0192 /* 0-255, 0 = continuous */ -+#define HM5065_REG_FD_FLICKER_IDENTIFICATION_THRESHOLD 0x0193 /* u16 */ -+#define HM5065_REG_FD_WIN_TIMES 0x0195 -+#define HM5065_REG_FD_FRAME_RATE_SHIFT_NUMBER 0x0196 -+#define HM5065_REG_FD_MANUAL_FREF_ENABLE 0x0197 /* 0,1 */ -+#define HM5065_REG_FD_MANU_FREF_100 0x0198 /* u16 */ -+#define HM5065_REG_FD_MANU_FREF_120 0x019a /* u16 */ -+#define HM5065_REG_FD_FLICKER_FREQUENCY 0x019c /* fp16 */ -+ -+/* white balance control */ -+#define HM5065_REG_WB_MODE 0x01a0 -+#define HM5065_REG_WB_MODE_OFF 0x00 -+#define HM5065_REG_WB_MODE_AUTOMATIC 0x01 -+#define HM5065_REG_WB_MODE_AUTO_INSTANT 0x02 -+#define HM5065_REG_WB_MODE_MANUAL_RGB 0x03 -+#define HM5065_REG_WB_MODE_CLOUDY_PRESET 0x04 -+#define HM5065_REG_WB_MODE_SUNNY_PRESET 0x05 -+#define HM5065_REG_WB_MODE_LED_PRESET 0x06 -+#define HM5065_REG_WB_MODE_FLUORESCENT_PRESET 0x07 -+#define HM5065_REG_WB_MODE_TUNGSTEN_PRESET 0x08 -+#define HM5065_REG_WB_MODE_HORIZON_PRESET 0x09 -+ -+#define HM5065_REG_WB_MANUAL_RED_GAIN 0x01a1 -+#define HM5065_REG_WB_MANUAL_GREEN_GAIN 0x01a2 -+#define HM5065_REG_WB_MANUAL_BLUE_GAIN 0x01a3 -+ -+#define HM5065_REG_WB_MISC_SETTINGS 0x01a4 -+#define HM5065_REG_WB_MISC_SETTINGS_FREEZE_ALGO BIT(2) -+ -+#define HM5065_REG_WB_HUE_R_BIAS 0x01a5 /* fp16 */ -+#define HM5065_REG_WB_HUE_B_BIAS 0x01a7 /* fp16 */ -+ -+#define HM5065_REG_WB_STATUS 0x01c0 -+#define HM5065_REG_WB_STATUS_STABLE BIT(0) -+ -+#define HM5065_REG_WB_NORM_RED_GAIN 0x01c8 /* fp16 */ -+#define HM5065_REG_WB_PART_RED_GAIN 0x01e0 /* fp16 */ -+#define HM5065_REG_WB_PART_GREEN_GAIN 0x01e2 /* fp16 */ -+#define HM5065_REG_WB_PART_BLUE_GAIN 0x01e4 /* fp16 */ -+ -+/* image stability status */ -+#define HM5065_REG_WHITE_BALANCE_STABLE 0x0291 /* 0,1 */ -+#define HM5065_REG_EXPOSURE_STABLE 0x0292 /* 0,1 */ -+#define HM5065_REG_STABLE 0x0294 /* 0,1 */ -+ -+/* special effects */ -+#define HM5065_REG_EFFECTS_NEGATIVE 0x0380 /* 0,1 */ -+#define HM5065_REG_EFFECTS_SOLARISING 0x0381 /* 0,1 */ -+#define HM5065_REG_EFFECTS_SKECTH 0x0382 /* 0,1 */ -+ -+#define HM5065_REG_EFFECTS_COLOR 0x0384 -+#define HM5065_REG_EFFECTS_COLOR_NORMAL 0x00 -+#define HM5065_REG_EFFECTS_COLOR_RED_ONLY 0x01 -+#define HM5065_REG_EFFECTS_COLOR_YELLOW_ONLY 0x02 -+#define HM5065_REG_EFFECTS_COLOR_GREEN_ONLY 0x03 -+#define HM5065_REG_EFFECTS_COLOR_BLUE_ONLY 0x04 -+#define HM5065_REG_EFFECTS_COLOR_BLACK_WHITE 0x05 -+#define HM5065_REG_EFFECTS_COLOR_SEPIA 0x06 -+#define HM5065_REG_EFFECTS_COLOR_ANTIQUE 0x07 -+#define HM5065_REG_EFFECTS_COLOR_AQUA 0x08 -+#define HM5065_REG_EFFECTS_COLOR_MANUAL_MATRIX 0x09 -+ -+/* anti-vignete, otp flash (skipped), page 79-89 */ -+ -+/* flash control */ -+#define HM5065_REG_FLASH_MODE 0x02d0 /* 0,1 */ -+#define HM5065_REG_FLASH_RECOMMENDED 0x02d1 /* 0,1 */ -+ -+/* test pattern */ -+#define HM5065_REG_ENABLE_TEST_PATTERN 0x05d8 /* 0,1 */ -+ -+#define HM5065_REG_TEST_PATTERN 0x05d9 -+#define HM5065_REG_TEST_PATTERN_NONE 0x00 -+#define HM5065_REG_TEST_PATTERN_HORIZONTAL_GREY_SCALE 0x01 -+#define HM5065_REG_TEST_PATTERN_VERTICAL_GREY_SCALE 0x02 -+#define HM5065_REG_TEST_PATTERN_DIAGONAL_GREY_SCALE 0x03 -+#define HM5065_REG_TEST_PATTERN_PN28 0x04 -+#define HM5065_REG_TEST_PATTERN_PN9 0x05 -+#define HM5065_REG_TEST_PATTERN_SOLID_COLOR 0x06 -+#define HM5065_REG_TEST_PATTERN_COLOR_BARS 0x07 -+#define HM5065_REG_TEST_PATTERN_GRADUATED_COLOR_BARS 0x08 -+ -+#define HM5065_REG_TESTDATA_RED 0x4304 /* u16, 0-1023 */ -+#define HM5065_REG_TESTDATA_GREEN_R 0x4308 /* u16, 0-1023 */ -+#define HM5065_REG_TESTDATA_BLUE 0x430c /* u16, 0-1023 */ -+#define HM5065_REG_TESTDATA_GREEN_B 0x4310 /* u16, 0-1023 */ -+ -+/* contrast stretch */ -+#define HM5065_REG_CS_ENABLE 0x05e8 /* 0,1 */ -+#define HM5065_REG_CS_GAIN_CEILING 0x05e9 /* fp16 */ -+#define HM5065_REG_CS_BLACK_OFFSET_CEILING 0x05eb -+#define HM5065_REG_CS_WHITE_PIX_TARGET 0x05ec /* fp16 */ -+#define HM5065_REG_CS_BLACK_PIX_TARGET 0x05ee /* fp16 */ -+#define HM5065_REG_CS_ENABLED 0x05f8 /* 0,1 */ -+#define HM5065_REG_CS_TOTAL_PIXEL 0x05f9 /* fp16 */ -+#define HM5065_REG_CS_W_TARGET 0x05fb /* u32 */ -+#define HM5065_REG_CS_B_TARGET 0x05ff /* u32 */ -+#define HM5065_REG_CS_GAIN 0x0603 /* fp16 */ -+#define HM5065_REG_CS_BLACK_OFFSET 0x0605 -+#define HM5065_REG_CS_WHITE_LIMIT 0x0606 -+ -+/* preset controls */ -+#define HM5065_REG_PRESET_LOADER_ENABLE 0x0638 /* 0,1, standby */ -+ -+#define HM5065_REG_INDIVIDUAL_PRESET 0x0639 /* standby */ -+#define HM5065_REG_INDIVIDUAL_PRESET_ANTIVIGNETTE BIT(0) -+#define HM5065_REG_INDIVIDUAL_PRESET_WHITE_BALANCE BIT(1) -+#define HM5065_REG_INDIVIDUAL_PRESET_VCM BIT(4) -+ -+/* jpeg control parameters*/ -+#define HM5065_REG_JPEG_STATUS 0x0649 -+#define HM5065_REG_JPEG_RESTART 0x064a -+#define HM5065_REG_JPEG_HI_SQUEEZE_VALUE 0x064b /* 5-255 (5 = max q.) */ -+#define HM5065_REG_JPEG_MED_SQUEEZE_VALUE 0x064c /* 5-255 */ -+#define HM5065_REG_JPEG_LOW_SQUEEZE_VALUE 0x064d /* 5-255 */ -+#define HM5065_REG_JPEG_LINE_LENGTH 0x064e /* u16, standby */ -+#define HM5065_REG_JPEG_CLOCK_RATIO 0x0650 /* 1-8, standby */ -+#define HM5065_REG_JPEG_THRES 0x0651 /* u16, standby */ -+#define HM5065_REG_JPEG_BYTE_SENT 0x0653 /* u32 */ -+ -+/* autofocus */ -+ -+#define HM5065_REG_AF_WINDOWS_SYSTEM 0x065a -+#define HM5065_REG_AF_WINDOWS_SYSTEM_7_ZONES 0x00 -+#define HM5065_REG_AF_WINDOWS_SYSTEM_1_ZONE 0x01 -+ -+#define HM5065_REG_AF_H_RATIO_NUM 0x065b -+#define HM5065_REG_AF_H_RATIO_DEN 0x065c -+#define HM5065_REG_AF_V_RATIO_NUM 0x065d -+#define HM5065_REG_AF_V_RATIO_DEN 0x065e -+ -+#define HM5065_REG_AF_RANGE 0x0709 -+#define HM5065_REG_AF_RANGE_FULL 0x00 -+#define HM5065_REG_AF_RANGE_LANDSCAPE 0x01 -+#define HM5065_REG_AF_RANGE_MACRO 0x02 -+ -+#define HM5065_REG_AF_MODE 0x070a -+#define HM5065_REG_AF_MODE_MANUAL 0x00 -+#define HM5065_REG_AF_MODE_CONTINUOUS 0x01 -+#define HM5065_REG_AF_MODE_SINGLE 0x03 -+ -+#define HM5065_REG_AF_MODE_STATUS 0x0720 -+ -+#define HM5065_REG_AF_COMMAND 0x070b -+#define HM5065_REG_AF_COMMAND_NULL 0x00 -+#define HM5065_REG_AF_COMMAND_RELEASED_BUTTON 0x01 -+#define HM5065_REG_AF_COMMAND_HALF_BUTTON 0x02 -+#define HM5065_REG_AF_COMMAND_TAKE_SNAPSHOT 0x03 -+#define HM5065_REG_AF_COMMAND_REFOCUS 0x04 -+ -+#define HM5065_REG_AF_LENS_COMMAND 0x070c -+#define HM5065_REG_AF_LENS_COMMAND_NULL 0x00 -+#define HM5065_REG_AF_LENS_COMMAND_MOVE_STEP_TO_INFINITY 0x01 -+#define HM5065_REG_AF_LENS_COMMAND_MOVE_STEP_TO_MACRO 0x02 -+#define HM5065_REG_AF_LENS_COMMAND_GOTO_INFINITY 0x03 -+#define HM5065_REG_AF_LENS_COMMAND_GOTO_MACRO 0x04 -+#define HM5065_REG_AF_LENS_COMMAND_GOTO_RECOVERY 0x05 -+#define HM5065_REG_AF_LENS_COMMAND_GOTO_TARGET_POSITION 0x07 -+#define HM5065_REG_AF_LENS_COMMAND_GOTO_HYPERFOCAL 0x0C -+ -+#define HM5065_REG_AF_MANUAL_STEP_SIZE 0x070d -+#define HM5065_REG_AF_FACE_LOCATION_CTRL_ENABLE 0x0714 -+#define HM5065_REG_AF_FACE_LOCATION_CTRL_ENABLE_AF BIT(0) -+#define HM5065_REG_AF_FACE_LOCATION_CTRL_ENABLE_AE BIT(1) -+#define HM5065_REG_AF_FACE_LOCATION_CTRL_ENABLE_AWB BIT(2) -+#define HM5065_REG_AF_FACE_LOCATION_X_START 0x0715 /* u16 */ -+#define HM5065_REG_AF_FACE_LOCATION_X_SIZE 0x0717 /* u16 */ -+#define HM5065_REG_AF_FACE_LOCATION_Y_START 0x0719 /* u16 */ -+#define HM5065_REG_AF_FACE_LOCATION_Y_SIZE 0x071b /* u16 */ -+ -+#define HM5065_REG_AF_IN_FOCUS 0x07ae /* ro 0,1 */ -+#define HM5065_REG_AF_IS_STABLE 0x0725 /* ro 0,1 */ -+ -+/* reverse engineered registers */ -+#define HM5065_REG_BUS_DATA_FORMAT 0x7000 -+#define HM5065_REG_COLORSPACE 0x5200 -+#define HM5065_REG_BUS_CONFIG 0x7101 -+#define HM5065_REG_BUS_CONFIG_BT656 0x24 -+#define HM5065_REG_BUS_CONFIG_PARALLEL_HH_VL 0x44 -+ -+/* }}} */ -+ -+struct reg_value { -+ u16 addr; -+ u8 value; -+} __packed; -+ -+/* -+ * Sensor has various pre-defined PLL configurations for a set of -+ * external clock frequencies. -+ */ -+struct hm5065_clk_lut { -+ unsigned long clk_freq; -+ u8 lut_id; -+}; -+ -+static const struct hm5065_clk_lut hm5065_clk_luts[] = { -+ { .clk_freq = 12000000, .lut_id = 0x10 }, -+ { .clk_freq = 13000000, .lut_id = 0x11 }, -+ { .clk_freq = 13500000, .lut_id = 0x12 }, -+ { .clk_freq = 14400000, .lut_id = 0x13 }, -+ { .clk_freq = 18000000, .lut_id = 0x14 }, -+ { .clk_freq = 19200000, .lut_id = 0x15 }, -+ { .clk_freq = 24000000, .lut_id = 0x16 }, -+ { .clk_freq = 26000000, .lut_id = 0x17 }, -+ { .clk_freq = 27000000, .lut_id = 0x18 }, -+}; -+ -+static const struct hm5065_clk_lut *hm5065_find_clk_lut(unsigned long freq) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(hm5065_clk_luts); i++) -+ if (hm5065_clk_luts[i].clk_freq == freq) -+ return &hm5065_clk_luts[i]; -+ -+ return NULL; -+} -+ -+struct hm5065_pixfmt { -+ u32 code; -+ u32 colorspace; -+ u8 data_fmt; -+ u8 ycbcr_order; -+ u8 fmt_setup; -+}; -+ -+//XXX: identify colrorspace correctly, see datasheet page 40 -+static const struct hm5065_pixfmt hm5065_formats[] = { -+ { -+ .code = MEDIA_BUS_FMT_UYVY8_2X8, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .data_fmt = HM5065_REG_DATA_FORMAT_YCBCR_CUSTOM, -+ .ycbcr_order = HM5065_REG_YCRCB_ORDER_CB_Y_CR_Y, -+ .fmt_setup = 0x08 -+ }, -+ { -+ .code = MEDIA_BUS_FMT_VYUY8_2X8, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .data_fmt = HM5065_REG_DATA_FORMAT_YCBCR_CUSTOM, -+ .ycbcr_order = HM5065_REG_YCRCB_ORDER_CR_Y_CB_Y, -+ .fmt_setup = 0x08 -+ }, -+ { -+ .code = MEDIA_BUS_FMT_YUYV8_2X8, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .data_fmt = HM5065_REG_DATA_FORMAT_YCBCR_CUSTOM, -+ .ycbcr_order = HM5065_REG_YCRCB_ORDER_Y_CB_Y_CR, -+ .fmt_setup = 0x08 -+ }, -+ { -+ .code = MEDIA_BUS_FMT_YVYU8_2X8, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .data_fmt = HM5065_REG_DATA_FORMAT_YCBCR_CUSTOM, -+ .ycbcr_order = HM5065_REG_YCRCB_ORDER_Y_CR_Y_CB, -+ .fmt_setup = 0x08 -+ }, -+ { -+ .code = MEDIA_BUS_FMT_RGB565_2X8_LE, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .data_fmt = HM5065_REG_DATA_FORMAT_RGB_565, -+ .ycbcr_order = HM5065_REG_YCRCB_ORDER_Y_CR_Y_CB, -+ .fmt_setup = 0x02 -+ }, -+ { -+ .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, -+ .colorspace = V4L2_COLORSPACE_SRGB, -+ .data_fmt = HM5065_REG_DATA_FORMAT_RGB_555, -+ .ycbcr_order = HM5065_REG_YCRCB_ORDER_Y_CR_Y_CB, -+ .fmt_setup = 0x02 -+ }, -+}; -+ -+#define HM5065_NUM_FORMATS ARRAY_SIZE(hm5065_formats) -+ -+static const struct hm5065_pixfmt *hm5065_find_format(u32 code) -+{ -+ int i; -+ -+ for (i = 0; i < HM5065_NUM_FORMATS; i++) -+ if (hm5065_formats[i].code == code) -+ return &hm5065_formats[i]; -+ -+ return NULL; -+} -+ -+/* regulator supplies */ -+static const char * const hm5065_supply_name[] = { -+ "IOVDD", /* Digital I/O (2.8V) suppply */ -+ "AFVDD", /* Autofocus (2.8V) supply */ -+ "DVDD", /* Digital Core (1.8V) supply */ -+ "AVDD", /* Analog (2.8V) supply */ -+}; -+ -+#define HM5065_NUM_SUPPLIES ARRAY_SIZE(hm5065_supply_name) -+ -+struct hm5065_ctrls { -+ struct v4l2_ctrl_handler handler; -+ struct { -+ struct v4l2_ctrl *auto_exposure; -+ struct v4l2_ctrl *exposure; -+ struct v4l2_ctrl *d_gain; -+ struct v4l2_ctrl *a_gain; -+ }; -+ struct v4l2_ctrl *metering; -+ struct v4l2_ctrl *exposure_bias; -+ struct { -+ struct v4l2_ctrl *wb; -+ struct v4l2_ctrl *blue_balance; -+ struct v4l2_ctrl *red_balance; -+ }; -+ struct { -+ struct v4l2_ctrl *focus_auto; -+ struct v4l2_ctrl *af_start; -+ struct v4l2_ctrl *af_stop; -+ struct v4l2_ctrl *af_status; -+ struct v4l2_ctrl *af_distance; -+ struct v4l2_ctrl *focus_relative; -+ }; -+ struct v4l2_ctrl *aaa_lock; -+ struct v4l2_ctrl *hflip; -+ struct v4l2_ctrl *vflip; -+ struct v4l2_ctrl *pl_freq; -+ struct v4l2_ctrl *colorfx; -+ struct v4l2_ctrl *brightness; -+ struct v4l2_ctrl *saturation; -+ struct v4l2_ctrl *contrast; -+ struct v4l2_ctrl *gamma; -+ struct v4l2_ctrl *test_pattern; -+ struct v4l2_ctrl *test_data[4]; -+}; -+ -+struct hm5065_dev { -+ struct i2c_client *i2c_client; -+ struct v4l2_subdev sd; -+ struct media_pad pad; -+ struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */ -+ struct clk *xclk; /* external clock for HM5065 */ -+ -+ struct regulator_bulk_data supplies[HM5065_NUM_SUPPLIES]; -+ struct gpio_desc *reset_gpio; // nrst pin -+ struct gpio_desc *enable_gpio; // ce pin -+ -+ /* lock to protect all members below */ -+ struct mutex lock; -+ -+ struct v4l2_mbus_framefmt fmt; -+ struct v4l2_fract frame_interval; -+ struct hm5065_ctrls ctrls; -+ -+ bool pending_mode_change; -+ bool powered; -+ bool streaming; -+}; -+ -+static inline struct hm5065_dev *to_hm5065_dev(struct v4l2_subdev *sd) -+{ -+ return container_of(sd, struct hm5065_dev, sd); -+} -+ -+static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl) -+{ -+ return &container_of(ctrl->handler, struct hm5065_dev, -+ ctrls.handler)->sd; -+} -+ -+/* {{{ Register access helpers */ -+ -+static int hm5065_write_regs(struct hm5065_dev *sensor, u16 start_index, -+ u8 *data, int data_size) -+{ -+ struct i2c_client *client = sensor->i2c_client; -+ struct i2c_msg msg; -+ u8 buf[130]; -+ int ret; -+ -+ if (data_size > sizeof(buf) - 2) { -+ v4l2_err(&sensor->sd, "%s: oversized transfer (size=%d)\n", -+ __func__, data_size); -+ return -EINVAL; -+ } -+ -+ buf[0] = start_index >> 8; -+ buf[1] = start_index & 0xff; -+ memcpy(buf + 2, data, data_size); -+ -+ msg.addr = client->addr; -+ msg.flags = client->flags; -+ msg.buf = buf; -+ msg.len = data_size + 2; -+ -+ dev_dbg(&sensor->i2c_client->dev, "wr: %04x <= %*ph\n", -+ (u32)start_index, data_size, data); -+ -+ ret = i2c_transfer(client->adapter, &msg, 1); -+ if (ret < 0) { -+ v4l2_err(&sensor->sd, -+ "%s: error %d: start_index=%x, data=%*ph\n", -+ __func__, ret, (u32)start_index, data_size, data); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int hm5065_read_regs(struct hm5065_dev *sensor, u16 start_index, -+ u8 *data, int data_size) -+{ -+ struct i2c_client *client = sensor->i2c_client; -+ struct i2c_msg msg[2]; -+ u8 buf[2]; -+ int ret; -+ -+ buf[0] = start_index >> 8; -+ buf[1] = start_index & 0xff; -+ -+ msg[0].addr = client->addr; -+ msg[0].flags = client->flags; -+ msg[0].buf = buf; -+ msg[0].len = sizeof(buf); -+ -+ msg[1].addr = client->addr; -+ msg[1].flags = client->flags | I2C_M_RD; -+ msg[1].buf = data; -+ msg[1].len = data_size; -+ -+ ret = i2c_transfer(client->adapter, msg, 2); -+ if (ret < 0) { -+ v4l2_err(&sensor->sd, -+ "%s: error %d: start_index=%x, data_size=%d\n", -+ __func__, ret, (u32)start_index, data_size); -+ return ret; -+ } -+ -+ dev_dbg(&sensor->i2c_client->dev, "rd: %04x => %*ph\n", -+ (u32)start_index, data_size, data); -+ -+ return 0; -+} -+ -+static int hm5065_read(struct hm5065_dev *sensor, u16 reg, u8 *val) -+{ -+ return hm5065_read_regs(sensor, reg, val, 1); -+} -+ -+static int hm5065_write(struct hm5065_dev *sensor, u16 reg, u8 val) -+{ -+ return hm5065_write_regs(sensor, reg, &val, 1); -+} -+ -+static int hm5065_read16(struct hm5065_dev *sensor, u16 reg, u16 *val) -+{ -+ int ret; -+ -+ ret = hm5065_read_regs(sensor, reg, (u8 *)val, sizeof(*val)); -+ if (ret) -+ return ret; -+ -+ *val = be16_to_cpu(*val); -+ return 0; -+} -+ -+static int hm5065_write16(struct hm5065_dev *sensor, u16 reg, u16 val) -+{ -+ u16 tmp = cpu_to_be16(val); -+ -+ return hm5065_write_regs(sensor, reg, (u8 *)&tmp, sizeof(tmp)); -+} -+ -+/* -+ * The firmware format: -+ * , ..., -+ * "record" is a 2-byte register address (big endian) followed by 1-byte data -+ */ -+static int hm5065_load_firmware(struct hm5065_dev *sensor, const char *name) -+{ -+ int ret = 0, i = 0, list_size; -+ const struct firmware *fw; -+ struct reg_value *list; -+ u16 start, len; -+ u8 buf[128]; -+ -+ ret = request_firmware(&fw, name, sensor->sd.v4l2_dev->dev); -+ if (ret) { -+ v4l2_warn(&sensor->sd, -+ "Failed to read firmware %s, continuing anyway...\n", -+ name); -+ return 1; -+ } -+ -+ if (fw->size == 0) { -+ ret = 1; -+ goto err_release; -+ } -+ -+ if (fw->size % 3 != 0) { -+ v4l2_err(&sensor->sd, "Firmware image %s has invalid size\n", -+ name); -+ ret = -EINVAL; -+ goto err_release; -+ } -+ -+ list_size = fw->size / 3; -+ list = (struct reg_value *)fw->data; -+ -+ /* we speed up I2C communication via auto-increment functionality */ -+ while (i < list_size) { -+ start = be16_to_cpu(list[i].addr); -+ len = 0; -+ -+ while (i < list_size && -+ be16_to_cpu(list[i].addr) == (start + len) && -+ len < sizeof(buf)) -+ buf[len++] = list[i++].value; -+ -+ ret = hm5065_write_regs(sensor, start, buf, len); -+ if (ret) -+ goto err_release; -+ } -+ -+err_release: -+ release_firmware(fw); -+ return ret; -+} -+ -+/* -+ * Sensor uses ST Float900 format to represent floating point numbers. -+ * Binary floating point number: * (s ? -1 : 0) * 1.mmmmmmmmm * 2^eeeeee -+ * -+ * Following functions convert long value to and from the floating point format. -+ * -+ * Example: -+ * mili variant: val = 123456 => fp_val = 123.456 -+ * micro variant: val = -12345678 => fp_val = -12.345678 -+ */ -+static s64 hm5065_mili_from_fp16(u16 fp_val) -+{ -+ s64 val; -+ s64 mantisa = fp_val & 0x1ff; -+ int exp = (int)((fp_val >> 9) & 0x3f) - 31; -+ -+ val = (1000 * (mantisa | 0x200)); -+ if (exp > 0) -+ val <<= exp; -+ else if (exp < 0) -+ val >>= -exp; -+ val >>= 9; -+ -+ if (fp_val & 0x8000) -+ val = -val; -+ -+ return val; -+} -+ -+static u16 hm5065_mili_to_fp16(s32 val) -+{ -+ int fls; -+ u16 e, m, s = 0; -+ u64 v, rem; -+ -+ if (val == 0) -+ return 0; -+ -+ if (val < 0) { -+ val = -val; -+ s = 0x8000; -+ } -+ -+ v = (u64)val * 1024; -+ rem = do_div(v, 1000); -+ if (rem >= 500) -+ v++; -+ -+ fls = fls64(v) - 1; -+ e = 31 + fls - 10; -+ m = fls > 9 ? v >> (fls - 9) : v << (9 - fls); -+ -+ return s | (m & 0x1ff) | (e << 9); -+} -+ -+/* }}} */ -+/* {{{ Controls */ -+ -+static int hm5065_get_af_status(struct hm5065_dev *sensor) -+{ -+ struct hm5065_ctrls *ctrls = &sensor->ctrls; -+ u8 is_stable, mode; -+ int ret; -+ -+ ret = hm5065_read(sensor, HM5065_REG_AF_MODE_STATUS, &mode); -+ if (ret) -+ return ret; -+ -+ if (mode == HM5065_REG_AF_MODE_MANUAL) { -+ ctrls->af_status->val = V4L2_AUTO_FOCUS_STATUS_IDLE; -+ return 0; -+ } -+ -+ ret = hm5065_read(sensor, HM5065_REG_AF_IS_STABLE, &is_stable); -+ if (ret) -+ return ret; -+ -+ if (is_stable) -+ ctrls->af_status->val = V4L2_AUTO_FOCUS_STATUS_REACHED; -+ else if (!is_stable && mode == HM5065_REG_AF_MODE_CONTINUOUS) -+ ctrls->af_status->val = V4L2_AUTO_FOCUS_STATUS_BUSY; -+ else -+ ctrls->af_status->val = V4L2_AUTO_FOCUS_STATUS_IDLE; -+ -+ return 0; -+} -+ -+static int hm5065_get_exposure(struct hm5065_dev *sensor) -+{ -+ struct hm5065_ctrls *ctrls = &sensor->ctrls; -+ u16 again, dgain, exp; -+ int ret; -+ -+ ret = hm5065_read16(sensor, HM5065_REG_CODED_ANALOG_GAIN_PENDING, -+ &again); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_read16(sensor, HM5065_REG_DIGITAL_GAIN_PENDING, &dgain); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_read16(sensor, HM5065_REG_COARSE_INTEGRATION, &exp); -+ if (ret) -+ return ret; -+ -+ ctrls->exposure->val = exp; -+ ctrls->d_gain->val = clamp(hm5065_mili_from_fp16(dgain), 1000ll, -+ 4000ll); -+ ctrls->a_gain->val = again; -+ -+ return 0; -+} -+ -+static int hm5065_g_volatile_ctrl(struct v4l2_ctrl *ctrl) -+{ -+ struct v4l2_subdev *sd = ctrl_to_sd(ctrl); -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ int ret; -+ -+ /* v4l2_ctrl_lock() locks our own mutex */ -+ -+ if (!sensor->powered) -+ return -EIO; -+ -+ switch (ctrl->id) { -+ case V4L2_CID_FOCUS_AUTO: -+ ret = hm5065_get_af_status(sensor); -+ if (ret) -+ return ret; -+ break; -+ case V4L2_CID_EXPOSURE_AUTO: -+ ret = hm5065_get_exposure(sensor); -+ if (ret) -+ return ret; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static const u8 hm5065_wb_opts[][2] = { -+ { V4L2_WHITE_BALANCE_MANUAL, HM5065_REG_WB_MODE_OFF }, -+ { V4L2_WHITE_BALANCE_INCANDESCENT, HM5065_REG_WB_MODE_TUNGSTEN_PRESET }, -+ { V4L2_WHITE_BALANCE_FLUORESCENT, -+ HM5065_REG_WB_MODE_FLUORESCENT_PRESET }, -+ { V4L2_WHITE_BALANCE_HORIZON, HM5065_REG_WB_MODE_HORIZON_PRESET }, -+ { V4L2_WHITE_BALANCE_CLOUDY, HM5065_REG_WB_MODE_CLOUDY_PRESET }, -+ { V4L2_WHITE_BALANCE_DAYLIGHT, HM5065_REG_WB_MODE_SUNNY_PRESET }, -+ { V4L2_WHITE_BALANCE_AUTO, HM5065_REG_WB_MODE_AUTOMATIC }, -+}; -+ -+static int hm5065_set_power_line_frequency(struct hm5065_dev *sensor, s32 val) -+{ -+ u16 freq; -+ int ret; -+ -+ switch (val) { -+ case V4L2_CID_POWER_LINE_FREQUENCY_DISABLED: -+ ret = hm5065_write(sensor, HM5065_REG_ANTI_FLICKER_MODE, 0); -+ if (ret) -+ return ret; -+ -+ return hm5065_write(sensor, HM5065_REG_FD_ENABLE_DETECT, 0); -+ case V4L2_CID_POWER_LINE_FREQUENCY_50HZ: -+ case V4L2_CID_POWER_LINE_FREQUENCY_60HZ: -+ ret = hm5065_write(sensor, HM5065_REG_ANTI_FLICKER_MODE, 1); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_FD_ENABLE_DETECT, 0); -+ if (ret) -+ return ret; -+ -+ freq = (val == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ? -+ 0x4b20 : 0x4bc0; -+ -+ return hm5065_write16(sensor, HM5065_REG_FD_FLICKER_FREQUENCY, -+ freq); -+ case V4L2_CID_POWER_LINE_FREQUENCY_AUTO: -+ ret = hm5065_write(sensor, HM5065_REG_FD_ENABLE_DETECT, 1); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_ANTI_FLICKER_MODE, 1); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write16(sensor, HM5065_REG_FD_MAX_NUMBER_ATTEMP, -+ 100); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write16(sensor, HM5065_REG_FD_FLICKER_FREQUENCY, -+ 0); -+ if (ret) -+ return ret; -+ -+ return hm5065_write(sensor, HM5065_REG_FD_DETECTION_START, 1); -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int hm5065_set_colorfx(struct hm5065_dev *sensor, s32 val) -+{ -+ int ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_EFFECTS_COLOR, -+ HM5065_REG_EFFECTS_COLOR_NORMAL); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_EFFECTS_NEGATIVE, 0); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_EFFECTS_SOLARISING, 0); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_EFFECTS_SKECTH, 0); -+ if (ret) -+ return ret; -+ -+ switch (val) { -+ case V4L2_COLORFX_NONE: -+ return 0; -+ case V4L2_COLORFX_NEGATIVE: -+ return hm5065_write(sensor, HM5065_REG_EFFECTS_NEGATIVE, 1); -+ case V4L2_COLORFX_SOLARIZATION: -+ return hm5065_write(sensor, HM5065_REG_EFFECTS_SOLARISING, 1); -+ case V4L2_COLORFX_SKETCH: -+ return hm5065_write(sensor, HM5065_REG_EFFECTS_SKECTH, 1); -+ case V4L2_COLORFX_ANTIQUE: -+ return hm5065_write(sensor, HM5065_REG_EFFECTS_COLOR, -+ HM5065_REG_EFFECTS_COLOR_ANTIQUE); -+ case V4L2_COLORFX_SEPIA: -+ return hm5065_write(sensor, HM5065_REG_EFFECTS_COLOR, -+ HM5065_REG_EFFECTS_COLOR_SEPIA); -+ case V4L2_COLORFX_AQUA: -+ return hm5065_write(sensor, HM5065_REG_EFFECTS_COLOR, -+ HM5065_REG_EFFECTS_COLOR_AQUA); -+ case V4L2_COLORFX_BW: -+ return hm5065_write(sensor, HM5065_REG_EFFECTS_COLOR, -+ HM5065_REG_EFFECTS_COLOR_BLACK_WHITE); -+ default: -+ return -EINVAL; -+ } -+} -+ -+#define AE_BIAS_MENU_DEFAULT_VALUE_INDEX 7 -+static const s64 ae_bias_menu_values[] = { -+ -2100, -1800, -1500, -1200, -900, -600, -300, -+ 0, 300, 600, 900, 1200, 1500, 1800, 2100 -+}; -+ -+static const s8 ae_bias_menu_reg_values[] = { -+ -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7 -+}; -+ -+static int hm5065_set_exposure(struct hm5065_dev *sensor) -+{ -+ struct hm5065_ctrls *ctrls = &sensor->ctrls; -+ bool is_auto = (ctrls->auto_exposure->val != V4L2_EXPOSURE_MANUAL); -+ int ret = 0; -+ -+ if (ctrls->auto_exposure->is_new) { -+ ret = hm5065_write(sensor, HM5065_REG_EXPOSURE_MODE, -+ is_auto ? -+ HM5065_REG_EXPOSURE_MODE_AUTO : -+ HM5065_REG_EXPOSURE_MODE_DIRECT_MANUAL); -+ if (ret) -+ return ret; -+ -+ if (ctrls->auto_exposure->cur.val != ctrls->auto_exposure->val && -+ !is_auto) { -+ /* -+ * Hack: At this point, there are current volatile -+ * values in val, but control framework will not -+ * update the cur values for our autocluster, as it -+ * should. I couldn't find the reason. This fixes -+ * it for our driver. Remove this after the kernel -+ * is fixed. -+ */ -+ ctrls->exposure->cur.val = ctrls->exposure->val; -+ ctrls->d_gain->cur.val = ctrls->d_gain->val; -+ ctrls->a_gain->cur.val = ctrls->a_gain->val; -+ } -+ } -+ -+ if (!is_auto && ctrls->exposure->is_new) { -+ ret = hm5065_write16(sensor, -+ HM5065_REG_DIRECT_MODE_COARSE_INTEGRATION_LINES, -+ ctrls->exposure->val); -+ if (ret) -+ return ret; -+ } -+ -+ if (!is_auto && ctrls->d_gain->is_new) { -+ ret = hm5065_write16(sensor, -+ HM5065_REG_DIRECT_MODE_DIGITAL_GAIN, -+ hm5065_mili_to_fp16(ctrls->d_gain->val)); -+ if (ret) -+ return ret; -+ } -+ -+ if (!is_auto && ctrls->a_gain->is_new) -+ ret = hm5065_write16(sensor, -+ HM5065_REG_DIRECT_MODE_CODED_ANALOG_GAIN, -+ ctrls->a_gain->val); -+ -+ return ret; -+} -+ -+static int hm5065_3a_lock(struct hm5065_dev *sensor, struct v4l2_ctrl *ctrl) -+{ -+ bool awb_lock = ctrl->val & V4L2_LOCK_WHITE_BALANCE; -+ bool ae_lock = ctrl->val & V4L2_LOCK_EXPOSURE; -+ int ret = 0; -+ -+ if ((ctrl->val ^ ctrl->cur.val) & V4L2_LOCK_EXPOSURE -+ && sensor->ctrls.auto_exposure->val == V4L2_EXPOSURE_AUTO) { -+ ret = hm5065_write(sensor, HM5065_REG_FREEZE_AUTO_EXPOSURE, -+ ae_lock); -+ if (ret) -+ return ret; -+ } -+ -+ if (((ctrl->val ^ ctrl->cur.val) & V4L2_LOCK_WHITE_BALANCE) -+ && sensor->ctrls.wb->val == V4L2_WHITE_BALANCE_AUTO) { -+ ret = hm5065_write(sensor, HM5065_REG_WB_MISC_SETTINGS, -+ awb_lock ? -+ HM5065_REG_WB_MISC_SETTINGS_FREEZE_ALGO : 0); -+ if (ret) -+ return ret; -+ } -+ -+ return ret; -+} -+ -+static int hm5065_set_auto_focus(struct hm5065_dev *sensor) -+{ -+ struct hm5065_ctrls *ctrls = &sensor->ctrls; -+ bool auto_focus = ctrls->focus_auto->val; -+ int ret = 0; -+ u8 range; -+ -+ if (auto_focus && ctrls->af_distance->is_new) { -+ switch (ctrls->af_distance->val) { -+ case V4L2_AUTO_FOCUS_RANGE_MACRO: -+ range = HM5065_REG_AF_RANGE_MACRO; -+ break; -+ case V4L2_AUTO_FOCUS_RANGE_AUTO: -+ range = HM5065_REG_AF_RANGE_FULL; -+ break; -+ case V4L2_AUTO_FOCUS_RANGE_INFINITY: -+ range = HM5065_REG_AF_RANGE_LANDSCAPE; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ ret = hm5065_write(sensor, HM5065_REG_AF_RANGE, range); -+ if (ret) -+ return ret; -+ } -+ -+ if (ctrls->focus_auto->is_new) { -+ v4l2_ctrl_activate(ctrls->af_start, !auto_focus); -+ v4l2_ctrl_activate(ctrls->af_stop, !auto_focus); -+ v4l2_ctrl_activate(ctrls->focus_relative, !auto_focus); -+ -+ ret = hm5065_write(sensor, HM5065_REG_AF_MODE, -+ auto_focus ? -+ HM5065_REG_AF_MODE_CONTINUOUS : -+ HM5065_REG_AF_MODE_SINGLE); -+ if (ret) -+ return ret; -+ -+ if (!auto_focus) { -+ ret = hm5065_write(sensor, HM5065_REG_AF_COMMAND, -+ HM5065_REG_AF_COMMAND_RELEASED_BUTTON); -+ if (ret) -+ return ret; -+ } -+ } -+ -+ if (!auto_focus && ctrls->af_start->is_new) { -+ ret = hm5065_write(sensor, HM5065_REG_AF_MODE, -+ HM5065_REG_AF_MODE_SINGLE); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_AF_COMMAND, -+ HM5065_REG_AF_COMMAND_RELEASED_BUTTON); -+ if (ret) -+ return ret; -+ -+ usleep_range(190000, 200000); -+ -+ ret = hm5065_write(sensor, HM5065_REG_AF_COMMAND, -+ HM5065_REG_AF_COMMAND_HALF_BUTTON); -+ if (ret) -+ return ret; -+ } -+ -+ if (!auto_focus && ctrls->af_stop->is_new) { -+ ret = hm5065_write(sensor, HM5065_REG_AF_COMMAND, -+ HM5065_REG_AF_COMMAND_RELEASED_BUTTON); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_AF_MODE, -+ HM5065_REG_AF_MODE_MANUAL); -+ if (ret) -+ return ret; -+ } -+ -+ if (!auto_focus && ctrls->focus_relative->is_new && -+ ctrls->focus_relative->val) { -+ u8 cmd = 0xff; -+ s32 step = ctrls->focus_relative->val; -+ -+ ctrls->focus_relative->val = 0; -+ -+ ret = hm5065_write(sensor, HM5065_REG_AF_MODE, -+ HM5065_REG_AF_MODE_MANUAL); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_AF_MANUAL_STEP_SIZE, -+ abs(step)); -+ if (ret) -+ return ret; -+ -+ if (step < 0) -+ cmd = HM5065_REG_AF_LENS_COMMAND_MOVE_STEP_TO_INFINITY; -+ else if (step > 0) -+ cmd = HM5065_REG_AF_LENS_COMMAND_MOVE_STEP_TO_MACRO; -+ -+ if (cmd != 0xff) -+ ret = hm5065_write(sensor, HM5065_REG_AF_LENS_COMMAND, -+ cmd); -+ -+ if (ret) -+ return ret; -+ } -+ -+ return ret; -+} -+ -+static int hm5065_set_white_balance(struct hm5065_dev *sensor) -+{ -+ struct hm5065_ctrls *ctrls = &sensor->ctrls; -+ bool manual_wb = ctrls->wb->val == V4L2_WHITE_BALANCE_MANUAL; -+ int ret = 0, i; -+ s32 val; -+ -+ if (ctrls->wb->is_new) { -+ for (i = 0; i < ARRAY_SIZE(hm5065_wb_opts); i++) { -+ if (hm5065_wb_opts[i][0] != ctrls->wb->val) -+ continue; -+ -+ ret = hm5065_write(sensor, HM5065_REG_WB_MODE, -+ hm5065_wb_opts[i][1]); -+ if (ret) -+ return ret; -+ goto next; -+ } -+ -+ return -EINVAL; -+ } -+ -+next: -+ if (ctrls->wb->is_new || ctrls->blue_balance->is_new) { -+ val = manual_wb ? ctrls->blue_balance->val : 1000; -+ ret = hm5065_write16(sensor, HM5065_REG_WB_HUE_B_BIAS, -+ hm5065_mili_to_fp16(val)); -+ if (ret) -+ return ret; -+ } -+ -+ if (ctrls->wb->is_new || ctrls->red_balance->is_new) { -+ val = manual_wb ? ctrls->red_balance->val : 1000; -+ ret = hm5065_write16(sensor, HM5065_REG_WB_HUE_R_BIAS, -+ hm5065_mili_to_fp16(val)); -+ } -+ -+ return ret; -+} -+ -+static int hm5065_s_ctrl(struct v4l2_ctrl *ctrl) -+{ -+ struct v4l2_subdev *sd = ctrl_to_sd(ctrl); -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ struct hm5065_ctrls *ctrls = &sensor->ctrls; -+ s32 val = ctrl->val; -+ unsigned int i; -+ int ret; -+ u8 reg; -+ -+ /* v4l2_ctrl_lock() locks our own mutex */ -+ -+ /* -+ * If the device is not powered up by the host driver do -+ * not apply any controls to H/W at this time. Instead -+ * the controls will be restored right after power-up. -+ */ -+ if (!sensor->powered) -+ return 0; -+ -+ switch (ctrl->id) { -+ case V4L2_CID_EXPOSURE_AUTO: -+ return hm5065_set_exposure(sensor); -+ -+ case V4L2_CID_EXPOSURE_METERING: -+ if (val == V4L2_EXPOSURE_METERING_AVERAGE) -+ reg = HM5065_REG_EXPOSURE_METERING_FLAT; -+ else if (val == V4L2_EXPOSURE_METERING_CENTER_WEIGHTED) -+ reg = HM5065_REG_EXPOSURE_METERING_CENTERED; -+ else -+ return -EINVAL; -+ -+ return hm5065_write(sensor, HM5065_REG_EXPOSURE_METERING, reg); -+ -+ case V4L2_CID_AUTO_EXPOSURE_BIAS: -+ if (val < 0 || val >= ARRAY_SIZE(ae_bias_menu_reg_values)) -+ return -EINVAL; -+ -+ return hm5065_write(sensor, HM5065_REG_EXPOSURE_COMPENSATION, -+ (u8)ae_bias_menu_reg_values[val]); -+ -+ case V4L2_CID_FOCUS_AUTO: -+ return hm5065_set_auto_focus(sensor); -+ -+ case V4L2_CID_CONTRAST: -+ return hm5065_write(sensor, HM5065_REG_CONTRAST, val); -+ -+ case V4L2_CID_SATURATION: -+ return hm5065_write(sensor, HM5065_REG_COLOR_SATURATION, val); -+ -+ case V4L2_CID_BRIGHTNESS: -+ return hm5065_write(sensor, HM5065_REG_BRIGHTNESS, val); -+ -+ case V4L2_CID_POWER_LINE_FREQUENCY: -+ return hm5065_set_power_line_frequency(sensor, val); -+ -+ case V4L2_CID_GAMMA: -+ return hm5065_write(sensor, HM5065_REG_P0_GAMMA_GAIN, val); -+ -+ case V4L2_CID_VFLIP: -+ return hm5065_write(sensor, HM5065_REG_VERTICAL_FLIP, -+ val ? 1 : 0); -+ -+ case V4L2_CID_HFLIP: -+ return hm5065_write(sensor, HM5065_REG_HORIZONTAL_MIRROR, -+ val ? 1 : 0); -+ -+ case V4L2_CID_COLORFX: -+ return hm5065_set_colorfx(sensor, val); -+ -+ case V4L2_CID_3A_LOCK: -+ return hm5065_3a_lock(sensor, ctrl); -+ -+ case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: -+ return hm5065_set_white_balance(sensor); -+ -+ case V4L2_CID_TEST_PATTERN_RED: -+ return hm5065_write16(sensor, HM5065_REG_TESTDATA_RED, val); -+ -+ case V4L2_CID_TEST_PATTERN_GREENR: -+ return hm5065_write16(sensor, HM5065_REG_TESTDATA_GREEN_R, val); -+ -+ case V4L2_CID_TEST_PATTERN_BLUE: -+ return hm5065_write16(sensor, HM5065_REG_TESTDATA_BLUE, val); -+ -+ case V4L2_CID_TEST_PATTERN_GREENB: -+ return hm5065_write16(sensor, HM5065_REG_TESTDATA_GREEN_B, val); -+ -+ case V4L2_CID_TEST_PATTERN: -+ for (i = 0; i < ARRAY_SIZE(ctrls->test_data); i++) -+ v4l2_ctrl_activate(ctrls->test_data[i], -+ val == 6); /* solid color */ -+ -+ ret = hm5065_write(sensor, HM5065_REG_ENABLE_TEST_PATTERN, -+ val == 0 ? 0 : 1); -+ if (ret) -+ return ret; -+ -+ return hm5065_write(sensor, HM5065_REG_TEST_PATTERN, val); -+ -+ default: -+ return -EINVAL; -+ } -+} -+ -+static const struct v4l2_ctrl_ops hm5065_ctrl_ops = { -+ .g_volatile_ctrl = hm5065_g_volatile_ctrl, -+ .s_ctrl = hm5065_s_ctrl, -+}; -+ -+static const char * const test_pattern_menu[] = { -+ "Disabled", -+ "Horizontal gray scale", -+ "Vertical gray scale", -+ "Diagonal gray scale", -+ "PN28", -+ "PN9 (bus test)", -+ "Solid color", -+ "Color bars", -+ "Graduated color bars", -+}; -+ -+static int hm5065_init_controls(struct hm5065_dev *sensor) -+{ -+ const struct v4l2_ctrl_ops *ops = &hm5065_ctrl_ops; -+ struct hm5065_ctrls *ctrls = &sensor->ctrls; -+ struct v4l2_ctrl_handler *hdl = &ctrls->handler; -+ u8 wb_max = 0; -+ u64 wb_mask = 0; -+ unsigned int i; -+ int ret; -+ -+ v4l2_ctrl_handler_init(hdl, 32); -+ -+ /* we can use our own mutex for the ctrl lock */ -+ hdl->lock = &sensor->lock; -+ -+ ctrls->auto_exposure = v4l2_ctrl_new_std_menu(hdl, ops, -+ V4L2_CID_EXPOSURE_AUTO, -+ V4L2_EXPOSURE_MANUAL, 0, -+ V4L2_EXPOSURE_AUTO); -+ ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_EXPOSURE, -+ 1, HM5065_SENSOR_HEIGHT, 1, 30); -+ ctrls->d_gain = v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_DIGITAL_GAIN, -+ 1000, 4000, 1, 1000); -+ -+ ctrls->a_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN, -+ 0, 0xf4, 1, 0); -+ -+ ctrls->metering = -+ v4l2_ctrl_new_std_menu(hdl, ops, V4L2_CID_EXPOSURE_METERING, -+ V4L2_EXPOSURE_METERING_CENTER_WEIGHTED, -+ 0, V4L2_EXPOSURE_METERING_AVERAGE); -+ ctrls->exposure_bias = -+ v4l2_ctrl_new_int_menu(hdl, ops, -+ V4L2_CID_AUTO_EXPOSURE_BIAS, -+ ARRAY_SIZE(ae_bias_menu_values) - 1, -+ AE_BIAS_MENU_DEFAULT_VALUE_INDEX, -+ ae_bias_menu_values); -+ -+ for (i = 0; i < ARRAY_SIZE(hm5065_wb_opts); i++) { -+ if (wb_max < hm5065_wb_opts[i][0]) -+ wb_max = hm5065_wb_opts[i][0]; -+ wb_mask |= BIT(hm5065_wb_opts[i][0]); -+ } -+ -+ ctrls->wb = v4l2_ctrl_new_std_menu(hdl, ops, -+ V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE, -+ wb_max, ~wb_mask, V4L2_WHITE_BALANCE_AUTO); -+ -+ ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE, -+ 0, 4000, 1, 1000); -+ ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE, -+ 0, 4000, 1, 1000); -+ -+ ctrls->gamma = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAMMA, -+ 0, 31, 1, 20); -+ -+ ctrls->colorfx = -+ v4l2_ctrl_new_std_menu(hdl, ops, V4L2_CID_COLORFX, 15, -+ ~(BIT(V4L2_COLORFX_NONE) | -+ BIT(V4L2_COLORFX_NEGATIVE) | -+ BIT(V4L2_COLORFX_SOLARIZATION) | -+ BIT(V4L2_COLORFX_SKETCH) | -+ BIT(V4L2_COLORFX_SEPIA) | -+ BIT(V4L2_COLORFX_ANTIQUE) | -+ BIT(V4L2_COLORFX_AQUA) | -+ BIT(V4L2_COLORFX_BW)), -+ V4L2_COLORFX_NONE); -+ -+ ctrls->pl_freq = -+ v4l2_ctrl_new_std_menu(hdl, ops, V4L2_CID_POWER_LINE_FREQUENCY, -+ V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0, -+ V4L2_CID_POWER_LINE_FREQUENCY_50HZ); -+ -+ ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_HFLIP, 0, 1, 1, 0); -+ ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_VFLIP, 0, 1, 1, 0); -+ -+ ctrls->focus_auto = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FOCUS_AUTO, -+ 0, 1, 1, 1); -+ -+ ctrls->af_start = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTO_FOCUS_START, -+ 0, 1, 1, 0); -+ -+ ctrls->af_stop = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTO_FOCUS_STOP, -+ 0, 1, 1, 0); -+ -+ ctrls->af_status = v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_AUTO_FOCUS_STATUS, 0, -+ (V4L2_AUTO_FOCUS_STATUS_BUSY | -+ V4L2_AUTO_FOCUS_STATUS_REACHED | -+ V4L2_AUTO_FOCUS_STATUS_FAILED), -+ 0, V4L2_AUTO_FOCUS_STATUS_IDLE); -+ -+ ctrls->af_distance = -+ v4l2_ctrl_new_std_menu(hdl, ops, -+ V4L2_CID_AUTO_FOCUS_RANGE, -+ V4L2_AUTO_FOCUS_RANGE_MACRO, -+ ~(BIT(V4L2_AUTO_FOCUS_RANGE_AUTO) | -+ BIT(V4L2_AUTO_FOCUS_RANGE_INFINITY) | -+ BIT(V4L2_AUTO_FOCUS_RANGE_MACRO)), -+ V4L2_AUTO_FOCUS_RANGE_AUTO); -+ -+ ctrls->focus_relative = v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_FOCUS_RELATIVE, -+ -100, 100, 1, 0); -+ -+ ctrls->brightness = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BRIGHTNESS, -+ 0, 200, 1, 90); -+ ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, -+ 0, 200, 1, 110); -+ ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, -+ 0, 200, 1, 108); -+ -+ ctrls->aaa_lock = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_3A_LOCK, -+ 0, 0x7, 0, 0); -+ -+ ctrls->test_pattern = -+ v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN, -+ ARRAY_SIZE(test_pattern_menu) - 1, -+ 0, 0, test_pattern_menu); -+ for (i = 0; i < ARRAY_SIZE(ctrls->test_data); i++) -+ ctrls->test_data[i] = -+ v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_TEST_PATTERN_RED + i, -+ 0, 1023, 1, 0); -+ -+ if (hdl->error) { -+ ret = hdl->error; -+ goto free_ctrls; -+ } -+ -+ ctrls->af_status->flags |= V4L2_CTRL_FLAG_VOLATILE | -+ V4L2_CTRL_FLAG_READ_ONLY; -+ -+ v4l2_ctrl_auto_cluster(3, &ctrls->wb, V4L2_WHITE_BALANCE_MANUAL, false); -+ v4l2_ctrl_auto_cluster(4, &ctrls->auto_exposure, V4L2_EXPOSURE_MANUAL, -+ true); -+ v4l2_ctrl_cluster(6, &ctrls->focus_auto); -+ -+ sensor->sd.ctrl_handler = hdl; -+ return 0; -+ -+free_ctrls: -+ v4l2_ctrl_handler_free(hdl); -+ return ret; -+} -+ -+/* }}} */ -+/* {{{ Video ops */ -+ -+static int hm5065_g_frame_interval(struct v4l2_subdev *sd, -+ struct v4l2_subdev_frame_interval *fi) -+{ -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ -+ if (fi->pad != 0) -+ return -EINVAL; -+ -+ mutex_lock(&sensor->lock); -+ fi->interval = sensor->frame_interval; -+ mutex_unlock(&sensor->lock); -+ -+ return 0; -+} -+ -+static int hm5065_get_max_binning(int width, int height) -+{ -+ if (width < HM5065_SENSOR_WIDTH / 4 && -+ height < HM5065_SENSOR_HEIGHT / 4) -+ return 4; -+ else if (width < HM5065_SENSOR_WIDTH / 2 && -+ height < HM5065_SENSOR_HEIGHT / 2) -+ return 2; -+ -+ return 1; -+} -+ -+static int hm5065_get_max_fps(int width, int height) -+{ -+ int max_fps, bin_factor; -+ -+ // more bining allows for faster readouts -+ bin_factor = hm5065_get_max_binning(width, height); -+ max_fps = 25000000 / (width * height * 2) * bin_factor; -+ -+ return clamp(max_fps, 1, 60); -+} -+ -+static int hm5065_s_frame_interval(struct v4l2_subdev *sd, -+ struct v4l2_subdev_frame_interval *fi) -+{ -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ int ret = 0, fps, max_fps; -+ -+ if (fi->pad != 0) -+ return -EINVAL; -+ -+ mutex_lock(&sensor->lock); -+ -+ max_fps = hm5065_get_max_fps(sensor->fmt.width, sensor->fmt.height); -+ -+ /* user requested infinite frame rate */ -+ if (fi->interval.numerator == 0) -+ fps = max_fps; -+ else -+ fps = DIV_ROUND_CLOSEST(fi->interval.denominator, -+ fi->interval.numerator); -+ -+ fps = clamp(fps, 1, max_fps); -+ -+ sensor->frame_interval.numerator = 1; -+ sensor->frame_interval.denominator = fps; -+ fi->interval = sensor->frame_interval; -+ -+ if (sensor->streaming) { -+ ret = hm5065_write16(sensor, HM5065_REG_DESIRED_FRAME_RATE_NUM, -+ fps); -+ if (ret) -+ goto err_unlock; -+ -+ ret = hm5065_write(sensor, HM5065_REG_DESIRED_FRAME_RATE_DEN, -+ 1); -+ } -+ -+err_unlock: -+ mutex_unlock(&sensor->lock); -+ return ret; -+} -+ -+static int hm5065_setup_mode(struct hm5065_dev *sensor) -+{ -+ const struct hm5065_pixfmt *pix_fmt; -+ u8 sensor_mode; -+ int ret, fps; -+ -+ pix_fmt = hm5065_find_format(sensor->fmt.code); -+ if (!pix_fmt) { -+ dev_err(&sensor->i2c_client->dev, -+ "pixel format not supported %u\n", sensor->fmt.code); -+ return -EINVAL; -+ } -+ -+ ret = hm5065_write(sensor, HM5065_REG_USER_COMMAND, -+ HM5065_REG_USER_COMMAND_POWEROFF); -+ if (ret) -+ return ret; -+ -+ switch (hm5065_get_max_binning(sensor->fmt.width, sensor->fmt.height)) { -+ case 4: -+ sensor_mode = HM5065_REG_SENSOR_MODE_BINNING_4X4; -+ break; -+ case 2: -+ sensor_mode = HM5065_REG_SENSOR_MODE_BINNING_2X2; -+ break; -+ default: -+ sensor_mode = HM5065_REG_SENSOR_MODE_FULLSIZE; -+ } -+ -+ ret = hm5065_write(sensor, HM5065_REG_P0_SENSOR_MODE, sensor_mode); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write16(sensor, HM5065_REG_P0_MANUAL_HSIZE, -+ sensor->fmt.width); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write16(sensor, HM5065_REG_P0_MANUAL_VSIZE, -+ sensor->fmt.height); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_P0_IMAGE_SIZE, -+ HM5065_REG_IMAGE_SIZE_MANUAL); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_P0_DATA_FORMAT, -+ pix_fmt->data_fmt); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_YCRCB_ORDER, -+ pix_fmt->ycbcr_order); -+ if (ret) -+ return ret; -+ -+ /* without this, brightness, contrast and saturation will not work */ -+ ret = hm5065_write(sensor, HM5065_REG_COLORSPACE, 9); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_BUS_DATA_FORMAT, -+ pix_fmt->fmt_setup); -+ if (ret) -+ return ret; -+ -+ fps = hm5065_get_max_fps(sensor->fmt.width, sensor->fmt.height); -+ fps = clamp(fps, 1, (int)sensor->frame_interval.denominator); -+ -+ ret = hm5065_write16(sensor, HM5065_REG_DESIRED_FRAME_RATE_NUM, fps); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_write(sensor, HM5065_REG_DESIRED_FRAME_RATE_DEN, 1); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int hm5065_set_stream(struct hm5065_dev *sensor, int enable) -+{ -+ return hm5065_write(sensor, HM5065_REG_USER_COMMAND, enable ? -+ HM5065_REG_USER_COMMAND_RUN : -+ HM5065_REG_USER_COMMAND_STOP); -+} -+ -+static int hm5065_s_stream(struct v4l2_subdev *sd, int enable) -+{ -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ int ret = 0; -+ -+ mutex_lock(&sensor->lock); -+ -+ if (sensor->streaming == !enable) { -+ if (enable && sensor->pending_mode_change) { -+ ret = hm5065_setup_mode(sensor); -+ if (ret) -+ goto out; -+ } -+ -+ ret = hm5065_set_stream(sensor, enable); -+ if (ret) -+ goto out; -+ -+ if (enable && sensor->ctrls.focus_auto->cur.val) { -+ msleep(100); -+ -+ /* checking error here is not super important */ -+ hm5065_write(sensor, HM5065_REG_AF_MODE, -+ HM5065_REG_AF_MODE_CONTINUOUS); -+ } -+ -+ sensor->streaming = !!enable; -+ } -+ -+out: -+ mutex_unlock(&sensor->lock); -+ return ret; -+} -+ -+/* }}} */ -+/* {{{ Pad ops */ -+ -+static int hm5065_enum_mbus_code(struct v4l2_subdev *sd, -+ struct v4l2_subdev_pad_config *cfg, -+ struct v4l2_subdev_mbus_code_enum *code) -+{ -+ if (code->pad != 0) -+ return -EINVAL; -+ if (code->index >= HM5065_NUM_FORMATS) -+ return -EINVAL; -+ -+ code->code = hm5065_formats[code->index].code; -+ -+ return 0; -+} -+ -+static int hm5065_enum_frame_size(struct v4l2_subdev *sd, -+ struct v4l2_subdev_pad_config *cfg, -+ struct v4l2_subdev_frame_size_enum *fse) -+{ -+ if (fse->pad != 0) -+ return -EINVAL; -+ if (fse->index != 0) -+ return -EINVAL; -+ -+ fse->min_width = HM5065_CAPTURE_WIDTH_MIN; -+ fse->min_height = HM5065_CAPTURE_HEIGHT_MIN; -+ -+ fse->max_width = HM5065_SENSOR_WIDTH; -+ fse->max_height = HM5065_SENSOR_HEIGHT; -+ -+ return 0; -+} -+ -+static int hm5065_enum_frame_interval(struct v4l2_subdev *sd, -+ struct v4l2_subdev_pad_config *cfg, -+ struct v4l2_subdev_frame_interval_enum -+ *fie) -+{ -+ struct v4l2_fract tpf; -+ u32 max_fps, width, height; -+ -+ if (fie->pad != 0) -+ return -EINVAL; -+ -+ width = clamp(fie->width, HM5065_CAPTURE_WIDTH_MIN, -+ HM5065_SENSOR_WIDTH); -+ height = clamp(fie->height, HM5065_CAPTURE_HEIGHT_MIN, -+ HM5065_SENSOR_HEIGHT); -+ -+ max_fps = hm5065_get_max_fps(width, height); -+ -+ if (fie->index + 1 > max_fps) -+ return -EINVAL; -+ -+ tpf.numerator = 1; -+ tpf.denominator = fie->index + 1; -+ fie->interval = tpf; -+ -+ return 0; -+} -+ -+static int hm5065_get_fmt(struct v4l2_subdev *sd, -+ struct v4l2_subdev_pad_config *cfg, -+ struct v4l2_subdev_format *format) -+{ -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ struct v4l2_mbus_framefmt *mf; -+ -+ if (format->pad != 0) -+ return -EINVAL; -+ -+ if (format->which == V4L2_SUBDEV_FORMAT_TRY) { -+ mf = v4l2_subdev_get_try_format(sd, cfg, format->pad); -+ format->format = *mf; -+ return 0; -+ } -+ -+ mutex_lock(&sensor->lock); -+ format->format = sensor->fmt; -+ mutex_unlock(&sensor->lock); -+ -+ return 0; -+} -+ -+static int hm5065_set_fmt(struct v4l2_subdev *sd, -+ struct v4l2_subdev_pad_config *cfg, -+ struct v4l2_subdev_format *format) -+{ -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ struct v4l2_mbus_framefmt *mf = &format->format; -+ const struct hm5065_pixfmt *pixfmt; -+ int ret = 0; -+ -+ if (format->pad != 0) -+ return -EINVAL; -+ -+ /* check if we support requested mbus fmt */ -+ pixfmt = hm5065_find_format(mf->code); -+ if (!pixfmt) -+ pixfmt = &hm5065_formats[0]; -+ -+ mf->code = pixfmt->code; -+ mf->colorspace = pixfmt->colorspace; -+ mf->xfer_func = V4L2_XFER_FUNC_DEFAULT; -+ mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; -+ mf->quantization = V4L2_QUANTIZATION_DEFAULT; -+ mf->field = V4L2_FIELD_NONE; -+ -+ mutex_lock(&sensor->lock); -+ -+ mf->width = clamp(mf->width, HM5065_CAPTURE_WIDTH_MIN, -+ HM5065_SENSOR_WIDTH); -+ mf->height = clamp(mf->height, HM5065_CAPTURE_HEIGHT_MIN, -+ HM5065_SENSOR_HEIGHT); -+ -+ if (format->which == V4L2_SUBDEV_FORMAT_TRY) { -+ struct v4l2_mbus_framefmt *try_mf; -+ -+ try_mf = v4l2_subdev_get_try_format(sd, cfg, format->pad); -+ *try_mf = *mf; -+ goto out; -+ } -+ -+ if (sensor->streaming) { -+ ret = -EBUSY; -+ goto out; -+ } -+ -+ sensor->fmt = *mf; -+ sensor->pending_mode_change = true; -+out: -+ mutex_unlock(&sensor->lock); -+ return ret; -+} -+ -+/* }}} */ -+/* {{{ Core Ops */ -+ -+static void hm5065_chip_enable(struct hm5065_dev *sensor, bool enable) -+{ -+ gpiod_set_value(sensor->enable_gpio, enable ? 1 : 0); -+ gpiod_set_value(sensor->reset_gpio, enable ? 0 : 1); -+} -+ -+static int hm5065_configure(struct hm5065_dev *sensor) -+{ -+ int ret; -+ u16 device_id; -+ const struct hm5065_clk_lut *lut; -+ unsigned long xclk_freq; -+ -+ ret = hm5065_read16(sensor, HM5065_REG_DEVICE_ID, &device_id); -+ if (ret) -+ return ret; -+ -+ if (device_id != HM5065_REG_DEVICE_ID_VALUE) { -+ dev_err(&sensor->i2c_client->dev, -+ "unsupported device id: 0x%04x\n", -+ (unsigned int)device_id); -+ return -EINVAL; -+ } -+ -+ xclk_freq = clk_get_rate(sensor->xclk); -+ lut = hm5065_find_clk_lut(xclk_freq); -+ if (!lut) { -+ dev_err(&sensor->i2c_client->dev, -+ "xclk frequency out of range: %lu Hz\n", xclk_freq); -+ return -EINVAL; -+ } -+ -+ ret = hm5065_write(sensor, HM5065_REG_EXCLOCKLUT, lut->lut_id); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_load_firmware(sensor, HM5065_AF_FIRMWARE); -+ if (ret < 0) -+ return ret; -+ -+ if (ret == 0) /* ret == 1 means firmware file missing */ -+ mdelay(200); -+ -+ ret = hm5065_load_firmware(sensor, HM5065_FIRMWARE_PARAMETERS); -+ if (ret < 0) -+ return ret; -+ -+ if (sensor->ep.bus_type == V4L2_MBUS_BT656) { -+ ret = hm5065_write(sensor, HM5065_REG_BUS_CONFIG, -+ HM5065_REG_BUS_CONFIG_BT656); -+ } else { -+ ret = hm5065_write(sensor, HM5065_REG_BUS_CONFIG, -+ HM5065_REG_BUS_CONFIG_PARALLEL_HH_VL); -+ } -+ -+ return ret; -+} -+ -+static int hm5065_set_power(struct hm5065_dev *sensor, bool on) -+{ -+ int ret = 0; -+ -+ if (on) { -+ ret = regulator_bulk_enable(HM5065_NUM_SUPPLIES, -+ sensor->supplies); -+ if (ret) -+ return ret; -+ -+ ret = clk_prepare_enable(sensor->xclk); -+ if (ret) -+ goto power_off; -+ -+ ret = clk_set_rate(sensor->xclk, 24000000); -+ if (ret) -+ goto xclk_off; -+ -+ usleep_range(1000, 2000); -+ hm5065_chip_enable(sensor, false); -+ usleep_range(1000, 2000); -+ hm5065_chip_enable(sensor, true); -+ usleep_range(50000, 70000); -+ -+ ret = hm5065_configure(sensor); -+ if (ret) -+ goto xclk_off; -+ -+ ret = hm5065_setup_mode(sensor); -+ if (ret) -+ goto xclk_off; -+ -+ return 0; -+ } -+ -+xclk_off: -+ clk_disable_unprepare(sensor->xclk); -+power_off: -+ hm5065_chip_enable(sensor, false); -+ regulator_bulk_disable(HM5065_NUM_SUPPLIES, sensor->supplies); -+ msleep(100); -+ return ret; -+} -+ -+static int hm5065_s_power(struct v4l2_subdev *sd, int on) -+{ -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ bool power_up, power_down; -+ int ret = 0; -+ -+ mutex_lock(&sensor->lock); -+ -+ power_up = on && !sensor->powered; -+ power_down = !on && sensor->powered; -+ -+ if (power_up || power_down) { -+ ret = hm5065_set_power(sensor, power_up); -+ if (!ret) -+ sensor->powered = on; -+ } -+ -+ mutex_unlock(&sensor->lock); -+ -+ if (!ret && power_up) { -+ /* restore controls */ -+ ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler); -+ if (ret) -+ hm5065_s_power(sd, 0); -+ } -+ -+ return ret; -+} -+ -+#ifdef CONFIG_VIDEO_ADV_DEBUG -+static int hm5065_g_register(struct v4l2_subdev *sd, -+ struct v4l2_dbg_register *reg) -+{ -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ int ret; -+ u8 val = 0; -+ -+ if (reg->reg > 0xffff) -+ return -EINVAL; -+ -+ reg->size = 1; -+ -+ mutex_lock(&sensor->lock); -+ ret = hm5065_read(sensor, reg->reg, &val); -+ mutex_unlock(&sensor->lock); -+ if (ret) -+ return -EIO; -+ -+ reg->val = val; -+ return 0; -+} -+ -+static int hm5065_s_register(struct v4l2_subdev *sd, -+ const struct v4l2_dbg_register *reg) -+{ -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ int ret; -+ -+ if (reg->reg > 0xffff || reg->val > 0xff) -+ return -EINVAL; -+ -+ mutex_lock(&sensor->lock); -+ ret = hm5065_write(sensor, reg->reg, reg->val); -+ mutex_unlock(&sensor->lock); -+ -+ return ret; -+} -+#endif -+ -+/* }}} */ -+ -+static const struct v4l2_subdev_core_ops hm5065_core_ops = { -+ .s_power = hm5065_s_power, -+#ifdef CONFIG_VIDEO_ADV_DEBUG -+ .g_register = hm5065_g_register, -+ .s_register = hm5065_s_register, -+#endif -+}; -+ -+static const struct v4l2_subdev_pad_ops hm5065_pad_ops = { -+ .enum_mbus_code = hm5065_enum_mbus_code, -+ .enum_frame_size = hm5065_enum_frame_size, -+ .enum_frame_interval = hm5065_enum_frame_interval, -+ .get_fmt = hm5065_get_fmt, -+ .set_fmt = hm5065_set_fmt, -+}; -+ -+static const struct v4l2_subdev_video_ops hm5065_video_ops = { -+ .g_frame_interval = hm5065_g_frame_interval, -+ .s_frame_interval = hm5065_s_frame_interval, -+ .s_stream = hm5065_s_stream, -+}; -+ -+static const struct v4l2_subdev_ops hm5065_subdev_ops = { -+ .core = &hm5065_core_ops, -+ .pad = &hm5065_pad_ops, -+ .video = &hm5065_video_ops, -+}; -+ -+static int hm5065_get_regulators(struct hm5065_dev *sensor) -+{ -+ int i; -+ -+ for (i = 0; i < HM5065_NUM_SUPPLIES; i++) -+ sensor->supplies[i].supply = hm5065_supply_name[i]; -+ -+ return devm_regulator_bulk_get(&sensor->i2c_client->dev, -+ HM5065_NUM_SUPPLIES, -+ sensor->supplies); -+} -+ -+#define HM5065_PARALLEL_SUPPORT_FLAGS \ -+ (V4L2_MBUS_HSYNC_ACTIVE_LOW | V4L2_MBUS_VSYNC_ACTIVE_HIGH | \ -+ V4L2_MBUS_PCLK_SAMPLE_FALLING | V4L2_MBUS_DATA_ACTIVE_HIGH) -+ -+static int hm5065_probe(struct i2c_client *client, -+ const struct i2c_device_id *id) -+{ -+ struct device *dev = &client->dev; -+ struct fwnode_handle *endpoint; -+ struct hm5065_dev *sensor; -+ int ret; -+ -+ sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL); -+ if (!sensor) -+ return -ENOMEM; -+ -+ sensor->i2c_client = client; -+ -+ sensor->fmt.code = hm5065_formats[0].code; -+ sensor->fmt.width = 1280; -+ sensor->fmt.height = 720; -+ sensor->fmt.field = V4L2_FIELD_NONE; -+ sensor->frame_interval.numerator = 1; -+ sensor->frame_interval.denominator = 15; -+ sensor->pending_mode_change = true; -+ -+ endpoint = fwnode_graph_get_next_endpoint( -+ of_fwnode_handle(client->dev.of_node), NULL); -+ if (!endpoint) { -+ dev_err(dev, "endpoint node not found\n"); -+ return -EINVAL; -+ } -+ -+ ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep); -+ fwnode_handle_put(endpoint); -+ if (ret) { -+ dev_err(dev, "could not parse endpoint\n"); -+ return ret; -+ } -+ -+ /* -+ * We don't know how to configure the camera for any other parallel -+ * mode, yet. -+ */ -+ if (sensor->ep.bus_type != V4L2_MBUS_BT656 && -+ !(sensor->ep.bus_type == V4L2_MBUS_PARALLEL && -+ (sensor->ep.bus.parallel.flags & HM5065_PARALLEL_SUPPORT_FLAGS) == -+ HM5065_PARALLEL_SUPPORT_FLAGS)) { -+ dev_err(dev, "unsupported bus configuration %d/%08x\n", -+ sensor->ep.bus_type, sensor->ep.bus.parallel.flags); -+ return -EINVAL; -+ } -+ -+ /* get system clock (xclk) */ -+ sensor->xclk = devm_clk_get(dev, "xclk"); -+ if (IS_ERR(sensor->xclk)) { -+ dev_err(dev, "failed to get xclk\n"); -+ return PTR_ERR(sensor->xclk); -+ } -+ -+ sensor->enable_gpio = devm_gpiod_get_optional(dev, "enable", -+ GPIOD_OUT_LOW); -+ sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset", -+ GPIOD_OUT_HIGH); -+ -+ if (!sensor->enable_gpio && !sensor->reset_gpio) { -+ dev_err(dev, -+ "either chip enable or reset pin must be configured\n"); -+ return ret; -+ } -+ -+ v4l2_i2c_subdev_init(&sensor->sd, client, &hm5065_subdev_ops); -+ -+ sensor->sd.flags = V4L2_SUBDEV_FL_HAS_DEVNODE; -+ sensor->pad.flags = MEDIA_PAD_FL_SOURCE; -+ sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; -+ ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad); -+ if (ret) -+ return ret; -+ -+ ret = hm5065_get_regulators(sensor); -+ if (ret) -+ return ret; -+ -+ mutex_init(&sensor->lock); -+ -+ ret = hm5065_init_controls(sensor); -+ if (ret) -+ goto entity_cleanup; -+ -+ ret = v4l2_async_register_subdev(&sensor->sd); -+ if (ret) -+ goto free_ctrls; -+ -+ return 0; -+ -+free_ctrls: -+ v4l2_ctrl_handler_free(&sensor->ctrls.handler); -+entity_cleanup: -+ mutex_destroy(&sensor->lock); -+ media_entity_cleanup(&sensor->sd.entity); -+ return ret; -+} -+ -+static int hm5065_remove(struct i2c_client *client) -+{ -+ struct v4l2_subdev *sd = i2c_get_clientdata(client); -+ struct hm5065_dev *sensor = to_hm5065_dev(sd); -+ -+ v4l2_async_unregister_subdev(&sensor->sd); -+ mutex_destroy(&sensor->lock); -+ media_entity_cleanup(&sensor->sd.entity); -+ v4l2_ctrl_handler_free(&sensor->ctrls.handler); -+ -+ return 0; -+} -+ -+static const struct i2c_device_id hm5065_id[] = { -+ {"hm5065", 0}, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(i2c, hm5065_id); -+ -+static const struct of_device_id hm5065_dt_ids[] = { -+ { .compatible = "himax,hm5065" }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, hm5065_dt_ids); -+ -+static struct i2c_driver hm5065_i2c_driver = { -+ .driver = { -+ .name = "hm5065", -+ .of_match_table = hm5065_dt_ids, -+ }, -+ .id_table = hm5065_id, -+ .probe = hm5065_probe, -+ .remove = hm5065_remove, -+}; -+ -+module_i2c_driver(hm5065_i2c_driver); -+ -+MODULE_AUTHOR("Ondrej Jirman "); -+MODULE_DESCRIPTION("HM5065 Camera Subdev Driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c -index 14f3afa7721a..7764e755bd05 100644 ---- a/drivers/media/i2c/ov5640.c -+++ b/drivers/media/i2c/ov5640.c -@@ -112,7 +112,11 @@ enum ov5640_mode_id { - }; - - enum ov5640_frame_rate { -- OV5640_15_FPS = 0, -+ OV5640_2_FPS = 0, -+ OV5640_3_FPS, -+ OV5640_5_FPS, -+ OV5640_7_FPS, -+ OV5640_15_FPS, - OV5640_30_FPS, - OV5640_60_FPS, - OV5640_NUM_FRAMERATES, -@@ -154,6 +158,10 @@ MODULE_PARM_DESC(virtual_channel, - "MIPI CSI-2 virtual channel (0..3), default 0"); - - static const int ov5640_framerates[] = { -+ [OV5640_2_FPS] = 2, -+ [OV5640_3_FPS] = 3, -+ [OV5640_5_FPS] = 5, -+ [OV5640_7_FPS] = 7, - [OV5640_15_FPS] = 15, - [OV5640_30_FPS] = 30, - [OV5640_60_FPS] = 60, -@@ -1834,6 +1842,23 @@ static int ov5640_set_mode(struct ov5640_dev *sensor) - if (ret < 0) - return ret; - -+ u8 tmp; -+ ret = ov5640_read_reg(sensor, 0x5308, &tmp); -+ if (ret) -+ return ret; -+ -+ ret = ov5640_write_reg(sensor, 0x5308, tmp | 0x10 | 0x40); -+ if (ret) -+ return ret; -+ -+ ret = ov5640_write_reg(sensor, 0x5306, 0); -+ if (ret) -+ return ret; -+ -+ ret = ov5640_write_reg(sensor, 0x5302, 0); -+ if (ret) -+ return ret; -+ - sensor->pending_mode_change = false; - sensor->last_mode = mode; - -@@ -1905,6 +1930,7 @@ static void ov5640_reset(struct ov5640_dev *sensor) - static int ov5640_set_power_on(struct ov5640_dev *sensor) - { - struct i2c_client *client = sensor->i2c_client; -+ u16 chip_id; - int ret; - - ret = clk_prepare_enable(sensor->xclk); -@@ -1929,6 +1955,13 @@ static int ov5640_set_power_on(struct ov5640_dev *sensor) - if (ret) - goto power_off; - -+ ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id); -+ if (ret) { -+ dev_err(&client->dev, "%s: failed to read chip identifier\n", -+ __func__); -+ goto power_off; -+ } -+ - return 0; - - power_off: -@@ -1944,6 +1977,7 @@ static void ov5640_set_power_off(struct ov5640_dev *sensor) - ov5640_power(sensor, false); - regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies); - clk_disable_unprepare(sensor->xclk); -+ msleep(100); - } - - static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on) -@@ -2191,11 +2225,11 @@ static int ov5640_try_frame_interval(struct ov5640_dev *sensor, - u32 width, u32 height) - { - const struct ov5640_mode_info *mode; -- enum ov5640_frame_rate rate = OV5640_15_FPS; -+ enum ov5640_frame_rate rate = OV5640_2_FPS; - int minfps, maxfps, best_fps, fps; - int i; - -- minfps = ov5640_framerates[OV5640_15_FPS]; -+ minfps = ov5640_framerates[OV5640_2_FPS]; - maxfps = ov5640_framerates[OV5640_60_FPS]; - - if (fi->numerator == 0) { -@@ -3009,34 +3043,6 @@ static int ov5640_get_regulators(struct ov5640_dev *sensor) - sensor->supplies); - } - --static int ov5640_check_chip_id(struct ov5640_dev *sensor) --{ -- struct i2c_client *client = sensor->i2c_client; -- int ret = 0; -- u16 chip_id; -- -- ret = ov5640_set_power_on(sensor); -- if (ret) -- return ret; -- -- ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id); -- if (ret) { -- dev_err(&client->dev, "%s: failed to read chip identifier\n", -- __func__); -- goto power_off; -- } -- -- if (chip_id != 0x5640) { -- dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n", -- __func__, chip_id); -- ret = -ENXIO; -- } -- --power_off: -- ov5640_set_power_off(sensor); -- return ret; --} -- - static int ov5640_probe(struct i2c_client *client) - { - struct device *dev = &client->dev; -@@ -3072,7 +3078,7 @@ static int ov5640_probe(struct i2c_client *client) - &ov5640_mode_data[OV5640_MODE_VGA_640_480]; - sensor->last_mode = sensor->current_mode; - -- sensor->ae_target = 52; -+ sensor->ae_target = 28; - - /* optional indication of physical rotation of sensor */ - ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation", -@@ -3154,10 +3160,6 @@ static int ov5640_probe(struct i2c_client *client) - - mutex_init(&sensor->lock); - -- ret = ov5640_check_chip_id(sensor); -- if (ret) -- goto entity_cleanup; -- - ret = ov5640_init_controls(sensor); - if (ret) - goto entity_cleanup; -diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c -index 27935f1e9555..44e18419f4cf 100644 ---- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c -+++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c -@@ -48,7 +48,8 @@ static inline struct sun6i_csi_dev *sun6i_csi_to_dev(struct sun6i_csi *csi) - - /* TODO add 10&12 bit YUV, RGB support */ - bool sun6i_csi_is_format_supported(struct sun6i_csi *csi, -- u32 pixformat, u32 mbus_code) -+ u32 pixformat, u32 mbus_code, -+ struct v4l2_fwnode_endpoint* vep) - { - struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi); - -@@ -57,9 +58,9 @@ bool sun6i_csi_is_format_supported(struct sun6i_csi *csi, - * 8bit and 16bit bus width. - * Identify the media bus format from device tree. - */ -- if ((sdev->csi.v4l2_ep.bus_type == V4L2_MBUS_PARALLEL -- || sdev->csi.v4l2_ep.bus_type == V4L2_MBUS_BT656) -- && sdev->csi.v4l2_ep.bus.parallel.bus_width == 16) { -+ if ((vep->bus_type == V4L2_MBUS_PARALLEL -+ || vep->bus_type == V4L2_MBUS_BT656) -+ && vep->bus.parallel.bus_width == 16) { - switch (pixformat) { - case V4L2_PIX_FMT_HM12: - case V4L2_PIX_FMT_NV12: -@@ -124,6 +125,9 @@ bool sun6i_csi_is_format_supported(struct sun6i_csi *csi, - case V4L2_PIX_FMT_VYUY: - return (mbus_code == MEDIA_BUS_FMT_VYUY8_2X8); - -+ case V4L2_PIX_FMT_RGB555: -+ return mbus_code == MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE; -+ - case V4L2_PIX_FMT_HM12: - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_NV21: -@@ -359,6 +363,9 @@ static enum csi_input_seq get_csi_input_seq(struct sun6i_csi_dev *sdev, - break; - - case V4L2_PIX_FMT_YUYV: -+ case V4L2_PIX_FMT_YVYU: -+ case V4L2_PIX_FMT_UYVY: -+ case V4L2_PIX_FMT_VYUY: - return CSI_INPUT_SEQ_YUYV; - - default: -@@ -370,9 +377,9 @@ static enum csi_input_seq get_csi_input_seq(struct sun6i_csi_dev *sdev, - return CSI_INPUT_SEQ_YUYV; - } - --static void sun6i_csi_setup_bus(struct sun6i_csi_dev *sdev) -+static void sun6i_csi_setup_bus(struct sun6i_csi_dev *sdev, -+ struct v4l2_fwnode_endpoint* vep) - { -- struct v4l2_fwnode_endpoint *endpoint = &sdev->csi.v4l2_ep; - struct sun6i_csi *csi = &sdev->csi; - unsigned char bus_width; - u32 flags; -@@ -384,7 +391,7 @@ static void sun6i_csi_setup_bus(struct sun6i_csi_dev *sdev) - || csi->config.field == V4L2_FIELD_INTERLACED_BT) - input_interlaced = true; - -- bus_width = endpoint->bus.parallel.bus_width; -+ bus_width = vep->bus.parallel.bus_width; - - regmap_read(sdev->regmap, CSI_IF_CFG_REG, &cfg); - -@@ -399,11 +406,11 @@ static void sun6i_csi_setup_bus(struct sun6i_csi_dev *sdev) - else - cfg |= CSI_IF_CFG_SRC_TYPE_PROGRESSED; - -- switch (endpoint->bus_type) { -+ switch (vep->bus_type) { - case V4L2_MBUS_PARALLEL: - cfg |= CSI_IF_CFG_MIPI_IF_CSI; - -- flags = endpoint->bus.parallel.flags; -+ flags = vep->bus.parallel.flags; - - cfg |= (bus_width == 16) ? CSI_IF_CFG_CSI_IF_YUV422_16BIT : - CSI_IF_CFG_CSI_IF_YUV422_INTLV; -@@ -422,7 +429,7 @@ static void sun6i_csi_setup_bus(struct sun6i_csi_dev *sdev) - case V4L2_MBUS_BT656: - cfg |= CSI_IF_CFG_MIPI_IF_CSI; - -- flags = endpoint->bus.parallel.flags; -+ flags = vep->bus.parallel.flags; - - cfg |= (bus_width == 16) ? CSI_IF_CFG_CSI_IF_BT1120 : - CSI_IF_CFG_CSI_IF_BT656; -@@ -435,7 +442,7 @@ static void sun6i_csi_setup_bus(struct sun6i_csi_dev *sdev) - break; - default: - dev_warn(sdev->dev, "Unsupported bus type: %d\n", -- endpoint->bus_type); -+ vep->bus_type); - break; - } - -@@ -509,6 +516,8 @@ static void sun6i_csi_set_window(struct sun6i_csi_dev *sdev) - case V4L2_PIX_FMT_YVYU: - case V4L2_PIX_FMT_UYVY: - case V4L2_PIX_FMT_VYUY: -+ case V4L2_PIX_FMT_RGB565: -+ case V4L2_PIX_FMT_RGB555: - dev_dbg(sdev->dev, - "Horizontal length should be 2 times of width for packed YUV formats!\n"); - hor_len = width * 2; -@@ -555,8 +564,7 @@ static void sun6i_csi_set_window(struct sun6i_csi_dev *sdev) - dev_dbg(sdev->dev, - "Calculating pixelformat(0x%x)'s bytesperline as a packed format\n", - config->pixelformat); -- bytesperline_y = (sun6i_csi_get_bpp(config->pixelformat) * -- config->width) / 8; -+ bytesperline_y = sdev->csi.video.fmt.fmt.pix.bytesperline; - bytesperline_c = 0; - planar_offset[1] = -1; - planar_offset[2] = -1; -@@ -569,7 +577,8 @@ static void sun6i_csi_set_window(struct sun6i_csi_dev *sdev) - } - - int sun6i_csi_update_config(struct sun6i_csi *csi, -- struct sun6i_csi_config *config) -+ struct sun6i_csi_config *config, -+ struct v4l2_fwnode_endpoint* vep) - { - struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi); - -@@ -578,7 +587,7 @@ int sun6i_csi_update_config(struct sun6i_csi *csi, - - memcpy(&csi->config, config, sizeof(csi->config)); - -- sun6i_csi_setup_bus(sdev); -+ sun6i_csi_setup_bus(sdev, vep); - sun6i_csi_set_format(sdev); - sun6i_csi_set_window(sdev); - -@@ -626,37 +635,29 @@ void sun6i_csi_set_stream(struct sun6i_csi *csi, bool enable) - /* ----------------------------------------------------------------------------- - * Media Controller and V4L2 - */ --static int sun6i_csi_link_entity(struct sun6i_csi *csi, -- struct media_entity *entity, -- struct fwnode_handle *fwnode) -+static int sun6i_csi_link_subdev(struct sun6i_csi *csi, struct v4l2_subdev *sd, -+ int link_flags) - { -- struct media_entity *sink; -- struct media_pad *sink_pad; -- int src_pad_index; -- int ret; -+ struct media_entity *source = &sd->entity; -+ struct media_entity *sink = &csi->video.vdev.entity; -+ int src_pad, sink_pad = csi->video.pad.index, ret; - -- ret = media_entity_get_fwnode_pad(entity, fwnode, MEDIA_PAD_FL_SOURCE); -- if (ret < 0) { -+ src_pad = media_entity_get_fwnode_pad(source, sd->fwnode, -+ MEDIA_PAD_FL_SOURCE); -+ if (src_pad < 0) { - dev_err(csi->dev, "%s: no source pad in external entity %s\n", -- __func__, entity->name); -+ __func__, source->name); - return -EINVAL; - } - -- src_pad_index = ret; -- -- sink = &csi->video.vdev.entity; -- sink_pad = &csi->video.pad; -+ dev_info(csi->dev, "creating %s:%u -> %s:%u link\n", -+ source->name, src_pad, sink->name, sink_pad); - -- dev_dbg(csi->dev, "creating %s:%u -> %s:%u link\n", -- entity->name, src_pad_index, sink->name, sink_pad->index); -- ret = media_create_pad_link(entity, src_pad_index, sink, -- sink_pad->index, -- MEDIA_LNK_FL_ENABLED | -- MEDIA_LNK_FL_IMMUTABLE); -+ ret = media_create_pad_link(source, src_pad, sink, sink_pad, -+ link_flags); - if (ret < 0) { - dev_err(csi->dev, "failed to create %s:%u -> %s:%u link\n", -- entity->name, src_pad_index, -- sink->name, sink_pad->index); -+ source->name, src_pad, sink->name, sink_pad); - return ret; - } - -@@ -669,22 +670,24 @@ static int sun6i_subdev_notify_complete(struct v4l2_async_notifier *notifier) - notifier); - struct v4l2_device *v4l2_dev = &csi->v4l2_dev; - struct v4l2_subdev *sd; -- int ret; -+ int ret, link_flags = MEDIA_LNK_FL_ENABLED; - - dev_dbg(csi->dev, "notify complete, all subdevs registered\n"); - -- sd = list_first_entry(&v4l2_dev->subdevs, struct v4l2_subdev, list); -- if (!sd) -- return -EINVAL; -- -- ret = sun6i_csi_link_entity(csi, &sd->entity, sd->fwnode); -- if (ret < 0) -- return ret; -- - ret = v4l2_device_register_subdev_nodes(&csi->v4l2_dev); - if (ret < 0) - return ret; - -+ // link subdevs source pads to the controller sink pad, enable -+ // the first link -+ list_for_each_entry(sd, &v4l2_dev->subdevs, list) { -+ ret = sun6i_csi_link_subdev(csi, sd, link_flags); -+ if (ret < 0) -+ return ret; -+ -+ link_flags = 0; -+ } -+ - return media_device_register(&csi->media_dev); - } - -@@ -692,24 +695,41 @@ static const struct v4l2_async_notifier_operations sun6i_csi_async_ops = { - .complete = sun6i_subdev_notify_complete, - }; - -+static const struct media_device_ops sun6i_csi_media_ops = { -+ .link_notify = v4l2_pipeline_link_notify, -+}; -+ -+/* CSI module has one port that can support multiple endpoints. -+ * Typically front and back camera on a tablet. -+ * -+ * Multiple endpoints are supported by selectively enabling only -+ * one of the endpoint devices at a time and shutting down the -+ * rest. -+ */ - static int sun6i_csi_fwnode_parse(struct device *dev, - struct v4l2_fwnode_endpoint *vep, - struct v4l2_async_subdev *asd) - { -- struct sun6i_csi *csi = dev_get_drvdata(dev); -+ struct sun6i_csi_async_subdev* casd = -+ container_of(asd, struct sun6i_csi_async_subdev, asd); - -- if (vep->base.port || vep->base.id) { -- dev_warn(dev, "Only support a single port with one endpoint\n"); -+ if (vep->base.port) { -+ dev_warn(dev, "Too many ports\n"); -+ return -ENOTCONN; -+ } -+ -+ if (vep->base.id >= MAX_ENDPOINTS) { -+ dev_warn(dev, "Too many endpoints\n"); - return -ENOTCONN; - } - - switch (vep->bus_type) { - case V4L2_MBUS_PARALLEL: - case V4L2_MBUS_BT656: -- csi->v4l2_ep = *vep; -+ casd->vep = *vep; - return 0; - default: -- dev_err(dev, "Unsupported media bus type\n"); -+ dev_warn(dev, "Unsupported media bus type\n"); - return -ENOTCONN; - } - } -@@ -733,21 +753,23 @@ static int sun6i_csi_v4l2_init(struct sun6i_csi *csi) - strscpy(csi->media_dev.model, "Allwinner Video Capture Device", - sizeof(csi->media_dev.model)); - csi->media_dev.hw_revision = 0; -+ csi->media_dev.ops = &sun6i_csi_media_ops; - snprintf(csi->media_dev.bus_info, sizeof(csi->media_dev.bus_info), - "platform:%s", dev_name(csi->dev)); - - media_device_init(&csi->media_dev); - v4l2_async_notifier_init(&csi->notifier); - -+ /* - ret = v4l2_ctrl_handler_init(&csi->ctrl_handler, 0); - if (ret) { - dev_err(csi->dev, "V4L2 controls handler init failed (%d)\n", - ret); - goto clean_media; - } -- -+ */ - csi->v4l2_dev.mdev = &csi->media_dev; -- csi->v4l2_dev.ctrl_handler = &csi->ctrl_handler; -+ //csi->v4l2_dev.ctrl_handler = &csi->ctrl_handler; - ret = v4l2_device_register(csi->dev, &csi->v4l2_dev); - if (ret) { - dev_err(csi->dev, "V4L2 device registration failed (%d)\n", -@@ -760,9 +782,9 @@ static int sun6i_csi_v4l2_init(struct sun6i_csi *csi) - goto unreg_v4l2; - - ret = v4l2_async_notifier_parse_fwnode_endpoints(csi->dev, -- &csi->notifier, -- sizeof(struct v4l2_async_subdev), -- sun6i_csi_fwnode_parse); -+ &csi->notifier, -+ sizeof(struct sun6i_csi_async_subdev), -+ sun6i_csi_fwnode_parse); - if (ret) - goto clean_video; - -@@ -781,7 +803,7 @@ clean_video: - unreg_v4l2: - v4l2_device_unregister(&csi->v4l2_dev); - free_ctrl: -- v4l2_ctrl_handler_free(&csi->ctrl_handler); -+ //v4l2_ctrl_handler_free(&csi->ctrl_handler); - clean_media: - v4l2_async_notifier_cleanup(&csi->notifier); - media_device_cleanup(&csi->media_dev); -diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h -index c626821aaedb..3be680938255 100644 ---- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h -+++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h -@@ -11,10 +11,11 @@ - #include - #include - #include -+#include - - #include "sun6i_video.h" - --struct sun6i_csi; -+#define MAX_ENDPOINTS 4 - - /** - * struct sun6i_csi_config - configs for sun6i csi -@@ -37,25 +38,26 @@ struct sun6i_csi { - struct v4l2_ctrl_handler ctrl_handler; - struct v4l2_device v4l2_dev; - struct media_device media_dev; -- - struct v4l2_async_notifier notifier; -- -- /* video port settings */ -- struct v4l2_fwnode_endpoint v4l2_ep; -- - struct sun6i_csi_config config; -- - struct sun6i_video video; - }; - -+struct sun6i_csi_async_subdev { -+ struct v4l2_async_subdev asd; /* must be first */ -+ struct v4l2_fwnode_endpoint vep; -+}; -+ - /** - * sun6i_csi_is_format_supported() - check if the format supported by csi - * @csi: pointer to the csi - * @pixformat: v4l2 pixel format (V4L2_PIX_FMT_*) - * @mbus_code: media bus format code (MEDIA_BUS_FMT_*) -+ * @vep: parsed CSI side bus endpoint configuration - */ --bool sun6i_csi_is_format_supported(struct sun6i_csi *csi, u32 pixformat, -- u32 mbus_code); -+bool sun6i_csi_is_format_supported(struct sun6i_csi *csi, -+ u32 pixformat, u32 mbus_code, -+ struct v4l2_fwnode_endpoint* vep); - - /** - * sun6i_csi_set_power() - power on/off the csi -@@ -68,9 +70,11 @@ int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable); - * sun6i_csi_update_config() - update the csi register settings - * @csi: pointer to the csi - * @config: see struct sun6i_csi_config -+ * @vep: parsed CSI side bus endpoint configuration - */ - int sun6i_csi_update_config(struct sun6i_csi *csi, -- struct sun6i_csi_config *config); -+ struct sun6i_csi_config *config, -+ struct v4l2_fwnode_endpoint* vep); - - /** - * sun6i_csi_update_buf_addr() - update the csi frame buffer address -@@ -115,6 +119,7 @@ static inline int sun6i_csi_get_bpp(unsigned int pixformat) - case V4L2_PIX_FMT_YVYU: - case V4L2_PIX_FMT_UYVY: - case V4L2_PIX_FMT_VYUY: -+ case V4L2_PIX_FMT_RGB555: - case V4L2_PIX_FMT_NV16: - case V4L2_PIX_FMT_NV61: - case V4L2_PIX_FMT_YUV422P: -diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c -index b55de9ab64d8..9f98d264f926 100644 ---- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c -+++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c -@@ -48,6 +48,8 @@ static const u32 supported_pixformats[] = { - V4L2_PIX_FMT_YVYU, - V4L2_PIX_FMT_UYVY, - V4L2_PIX_FMT_VYUY, -+ V4L2_PIX_FMT_RGB565, -+ V4L2_PIX_FMT_RGB555, - V4L2_PIX_FMT_HM12, - V4L2_PIX_FMT_NV12, - V4L2_PIX_FMT_NV21, -@@ -136,6 +138,7 @@ static int sun6i_video_start_streaming(struct vb2_queue *vq, unsigned int count) - struct sun6i_csi_buffer *next_buf; - struct sun6i_csi_config config; - struct v4l2_subdev *subdev; -+ struct sun6i_csi_async_subdev* casd; - unsigned long flags; - int ret; - -@@ -153,6 +156,7 @@ static int sun6i_video_start_streaming(struct vb2_queue *vq, unsigned int count) - subdev = sun6i_video_remote_subdev(video, NULL); - if (!subdev) - goto stop_media_pipeline; -+ casd = container_of(subdev->asd, struct sun6i_csi_async_subdev, asd); - - config.pixelformat = video->fmt.fmt.pix.pixelformat; - config.code = video->mbus_code; -@@ -160,7 +164,7 @@ static int sun6i_video_start_streaming(struct vb2_queue *vq, unsigned int count) - config.width = video->fmt.fmt.pix.width; - config.height = video->fmt.fmt.pix.height; - -- ret = sun6i_csi_update_config(video->csi, &config); -+ ret = sun6i_csi_update_config(video->csi, &config, &casd->vep); - if (ret < 0) - goto stop_media_pipeline; - -@@ -352,6 +356,7 @@ static int sun6i_video_try_fmt(struct sun6i_video *video, - { - struct v4l2_pix_format *pixfmt = &f->fmt.pix; - int bpp; -+ u32 bpl_packed; - - if (!is_pixformat_valid(pixfmt->pixelformat)) - pixfmt->pixelformat = supported_pixformats[0]; -@@ -360,7 +365,13 @@ static int sun6i_video_try_fmt(struct sun6i_video *video, - &pixfmt->height, MIN_HEIGHT, MAX_WIDTH, 1, 1); - - bpp = sun6i_csi_get_bpp(pixfmt->pixelformat); -- pixfmt->bytesperline = (pixfmt->width * bpp) >> 3; -+ bpl_packed = (pixfmt->width * bpp) / 8; -+ -+ //XXX: only allow for YUYV and friends -+ if (pixfmt->bytesperline < bpl_packed -+ || pixfmt->bytesperline > bpl_packed + 256) -+ pixfmt->bytesperline = bpl_packed; -+ - pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height; - - if (pixfmt->field == V4L2_FIELD_ANY) -@@ -406,6 +417,8 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, - return sun6i_video_try_fmt(video, f); - } - -+//XXX: allow to change cameras/media graph setup via this api? -+// probably pointless... - static int vidioc_enum_input(struct file *file, void *fh, - struct v4l2_input *inp) - { -@@ -433,6 +446,32 @@ static int vidioc_s_input(struct file *file, void *fh, unsigned int i) - return 0; - } - -+static int vidioc_g_parm(struct file *file, void *priv, -+ struct v4l2_streamparm *p) -+{ -+ struct sun6i_video *video = video_drvdata(file); -+ struct v4l2_subdev *subdev; -+ -+ subdev = sun6i_video_remote_subdev(video, NULL); -+ if (!subdev) -+ return -ENXIO; -+ -+ return v4l2_g_parm_cap(video_devdata(file), subdev, p); -+} -+ -+static int vidioc_s_parm(struct file *file, void *priv, -+ struct v4l2_streamparm *p) -+{ -+ struct sun6i_video *video = video_drvdata(file); -+ struct v4l2_subdev *subdev; -+ -+ subdev = sun6i_video_remote_subdev(video, NULL); -+ if (!subdev) -+ return -ENXIO; -+ -+ return v4l2_s_parm_cap(video_devdata(file), subdev, p); -+} -+ - static const struct v4l2_ioctl_ops sun6i_video_ioctl_ops = { - .vidioc_querycap = vidioc_querycap, - .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, -@@ -444,6 +483,9 @@ static const struct v4l2_ioctl_ops sun6i_video_ioctl_ops = { - .vidioc_s_input = vidioc_s_input, - .vidioc_g_input = vidioc_g_input, - -+ .vidioc_g_parm = vidioc_g_parm, -+ .vidioc_s_parm = vidioc_s_parm, -+ - .vidioc_reqbufs = vb2_ioctl_reqbufs, - .vidioc_querybuf = vb2_ioctl_querybuf, - .vidioc_qbuf = vb2_ioctl_qbuf, -@@ -529,27 +571,17 @@ static const struct v4l2_file_operations sun6i_video_fops = { - /* ----------------------------------------------------------------------------- - * Media Operations - */ --static int sun6i_video_link_validate_get_format(struct media_pad *pad, -- struct v4l2_subdev_format *fmt) --{ -- if (is_media_entity_v4l2_subdev(pad->entity)) { -- struct v4l2_subdev *sd = -- media_entity_to_v4l2_subdev(pad->entity); -- -- fmt->which = V4L2_SUBDEV_FORMAT_ACTIVE; -- fmt->pad = pad->index; -- return v4l2_subdev_call(sd, pad, get_fmt, NULL, fmt); -- } -- -- return -EINVAL; --} - - static int sun6i_video_link_validate(struct media_link *link) - { - struct video_device *vdev = container_of(link->sink->entity, - struct video_device, entity); -+ struct v4l2_subdev *sd = -+ media_entity_to_v4l2_subdev(link->source->entity); -+ struct sun6i_csi_async_subdev* casd = -+ container_of(sd->asd, struct sun6i_csi_async_subdev, asd); - struct sun6i_video *video = video_get_drvdata(vdev); -- struct v4l2_subdev_format source_fmt; -+ struct v4l2_subdev_format source_fmt = {}; - int ret; - - video->mbus_code = 0; -@@ -560,13 +592,20 @@ static int sun6i_video_link_validate(struct media_link *link) - return -ENOLINK; - } - -- ret = sun6i_video_link_validate_get_format(link->source, &source_fmt); -+ if (!is_media_entity_v4l2_subdev(link->source->entity)) -+ return -EINVAL; -+ -+ source_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; -+ source_fmt.pad = link->source->index; -+ -+ ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &source_fmt); - if (ret < 0) - return ret; - - if (!sun6i_csi_is_format_supported(video->csi, - video->fmt.fmt.pix.pixelformat, -- source_fmt.format.code)) { -+ source_fmt.format.code, -+ &casd->vep)) { - dev_err(video->csi->dev, - "Unsupported pixformat: 0x%x with mbus code: 0x%x!\n", - video->fmt.fmt.pix.pixelformat, -@@ -588,8 +627,21 @@ static int sun6i_video_link_validate(struct media_link *link) - return 0; - } - -+static int sun6i_video_link_setup(struct media_entity *entity, -+ const struct media_pad *local, -+ const struct media_pad *remote, u32 flags) -+{ -+ if (flags & MEDIA_LNK_FL_ENABLED) { -+ if (media_entity_remote_pad(local)) -+ return -EBUSY; -+ } -+ -+ return 0; -+} -+ - static const struct media_entity_operations sun6i_video_media_ops = { -- .link_validate = sun6i_video_link_validate -+ .link_validate = sun6i_video_link_validate, -+ .link_setup = sun6i_video_link_setup, - }; - - int sun6i_video_init(struct sun6i_video *video, struct sun6i_csi *csi, -diff --git a/drivers/mfd/ac100.c b/drivers/mfd/ac100.c -index 6d49d7fb5f14..b02f2c015d58 100644 ---- a/drivers/mfd/ac100.c -+++ b/drivers/mfd/ac100.c -@@ -79,6 +79,9 @@ static struct mfd_cell ac100_cells[] = { - { - .name = "ac100-codec", - .of_compatible = "x-powers,ac100-codec", -+ }, { -+ .name = "ac100-codec-analog", -+ .of_compatible = "x-powers,ac100-codec-analog", - }, { - .name = "ac100-rtc", - .of_compatible = "x-powers,ac100-rtc", -diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c -index aa59496e4376..125d9ec44c81 100644 ---- a/drivers/mfd/axp20x.c -+++ b/drivers/mfd/axp20x.c -@@ -178,6 +178,15 @@ static const struct resource axp20x_ac_power_supply_resources[] = { - DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), - }; - -+static const struct resource axp20x_battery_resources[] = { -+ DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_BATT_PLUGIN, "BATT_PLUGIN"), -+ DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_BATT_REMOVAL, "BATT_REMOVAL"), -+ DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_BATT_ENT_ACT_MODE, "BATT_HEALTH_DEAD"), -+ DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_BATT_EXIT_ACT_MODE, "BATT_HEALTH_GOOD"), -+ DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_CHARG, "BATT_CHARGING"), -+ DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_CHARG_DONE, "BATT_CHARGING_DONE"), -+}; -+ - static const struct resource axp20x_pek_resources[] = { - DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), - DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), -@@ -199,6 +208,8 @@ static const struct resource axp22x_usb_power_supply_resources[] = { - static const struct resource axp803_usb_power_supply_resources[] = { - DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), - DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BC_USB_CHNG, "BC_USB_CHNG"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_MV_CHNG, "MV_CHNG"), - }; - - static const struct resource axp22x_pek_resources[] = { -@@ -220,6 +231,23 @@ static const struct resource axp288_fuel_gauge_resources[] = { - DEFINE_RES_IRQ(AXP288_IRQ_WL1), - }; - -+static const struct resource axp803_battery_resources[] = { -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_PLUGIN, "BATT_PLUGIN"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_REMOVAL, "BATT_REMOVAL"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_ENT_ACT_MODE, "BATT_HEALTH_DEAD"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_EXIT_ACT_MODE, "BATT_HEALTH_GOOD"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_CHARG, "BATT_CHARGING"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_CHARG_DONE, "BATT_CHARGING_DONE"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_CHG_TEMP_HIGH, "BATT_CHG_TEMP_HIGH"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_CHG_TEMP_HIGH_END, "BATT_CHG_TEMP_HIGH_END"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_CHG_TEMP_LOW, "BATT_CHG_TEMP_LOW"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_CHG_TEMP_LOW_END, "BATT_CHG_TEMP_LOW_END"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_ACT_TEMP_HIGH, "BATT_ACT_TEMP_HIGH"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_ACT_TEMP_HIGH_END, "BATT_ACT_TEMP_HIGH_END"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_ACT_TEMP_LOW, "BATT_ACT_TEMP_LOW"), -+ DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATT_ACT_TEMP_LOW_END, "BATT_ACT_TEMP_LOW_END"), -+}; -+ - static const struct resource axp803_pek_resources[] = { - DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"), - DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), -@@ -603,6 +631,8 @@ static const struct mfd_cell axp20x_cells[] = { - }, { - .name = "axp20x-battery-power-supply", - .of_compatible = "x-powers,axp209-battery-power-supply", -+ .num_resources = ARRAY_SIZE(axp20x_battery_resources), -+ .resources = axp20x_battery_resources, - }, { - .name = "axp20x-ac-power-supply", - .of_compatible = "x-powers,axp202-ac-power-supply", -@@ -634,6 +664,8 @@ static const struct mfd_cell axp221_cells[] = { - }, { - .name = "axp20x-battery-power-supply", - .of_compatible = "x-powers,axp221-battery-power-supply", -+ .num_resources = ARRAY_SIZE(axp20x_battery_resources), -+ .resources = axp20x_battery_resources, - }, { - .name = "axp20x-usb-power-supply", - .of_compatible = "x-powers,axp221-usb-power-supply", -@@ -653,6 +685,8 @@ static const struct mfd_cell axp223_cells[] = { - }, { - .name = "axp20x-battery-power-supply", - .of_compatible = "x-powers,axp221-battery-power-supply", -+ .num_resources = ARRAY_SIZE(axp20x_battery_resources), -+ .resources = axp20x_battery_resources, - }, { - .name = "axp20x-regulator", - }, { -@@ -739,6 +773,8 @@ static const struct mfd_cell axp803_cells[] = { - }, { - .name = "axp20x-battery-power-supply", - .of_compatible = "x-powers,axp813-battery-power-supply", -+ .num_resources = ARRAY_SIZE(axp803_battery_resources), -+ .resources = axp803_battery_resources, - }, { - .name = "axp20x-ac-power-supply", - .of_compatible = "x-powers,axp813-ac-power-supply", -@@ -796,6 +832,8 @@ static const struct mfd_cell axp813_cells[] = { - }, { - .name = "axp20x-battery-power-supply", - .of_compatible = "x-powers,axp813-battery-power-supply", -+ .num_resources = ARRAY_SIZE(axp803_battery_resources), -+ .resources = axp803_battery_resources, - }, { - .name = "axp20x-ac-power-supply", - .of_compatible = "x-powers,axp813-ac-power-supply", -@@ -806,6 +844,9 @@ static const struct mfd_cell axp813_cells[] = { - .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), - .resources = axp803_usb_power_supply_resources, - .of_compatible = "x-powers,axp813-usb-power-supply", -+ }, { -+ .name = "axp20x-charger-led", -+ .of_compatible = "x-powers,axp813-charger-led", - }, - }; - -diff --git a/drivers/mfd/sun4i-gpadc.c b/drivers/mfd/sun4i-gpadc.c -index cfe14d9bf6dc..693004e6c6a8 100644 ---- a/drivers/mfd/sun4i-gpadc.c -+++ b/drivers/mfd/sun4i-gpadc.c -@@ -54,6 +54,7 @@ static struct mfd_cell sun4i_gpadc_cells[] = { - static struct mfd_cell sun5i_gpadc_cells[] = { - { - .name = "sun5i-a13-gpadc-iio", -+ .of_compatible = "allwinner,sun5i-a13-gpadc-iio", - .resources = adc_resources, - .num_resources = ARRAY_SIZE(adc_resources), - }, -diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig -index fafa8b0d8099..062289d92bce 100644 ---- a/drivers/misc/Kconfig -+++ b/drivers/misc/Kconfig -@@ -466,6 +466,13 @@ config HISI_HIKEY_USB - switching between the dual-role USB-C port and the USB-A host ports - using only one USB controller. - -+config MODEM_POWER -+ tristate "Modem power/wakeup support for EG25, MG3732, etc." -+ depends on OF && SERIAL_DEV_BUS && RFKILL -+ help -+ This driver provides support for powering up and handling -+ wakeup signals for various modems. -+ - source "drivers/misc/c2port/Kconfig" - source "drivers/misc/eeprom/Kconfig" - source "drivers/misc/cb710/Kconfig" -diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile -index d23231e73330..b4fe92e1fe34 100644 ---- a/drivers/misc/Makefile -+++ b/drivers/misc/Makefile -@@ -57,3 +57,4 @@ obj-$(CONFIG_HABANA_AI) += habanalabs/ - obj-$(CONFIG_UACCE) += uacce/ - obj-$(CONFIG_XILINX_SDFEC) += xilinx_sdfec.o - obj-$(CONFIG_HISI_HIKEY_USB) += hisi_hikey_usb.o -+obj-$(CONFIG_MODEM_POWER) += modem-power.o -diff --git a/drivers/misc/modem-power.c b/drivers/misc/modem-power.c -new file mode 100644 -index 000000000000..0a5f37eb4208 ---- /dev/null -+++ b/drivers/misc/modem-power.c -@@ -0,0 +1,1976 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+/* -+ * Modem power control driver. -+ * -+ * Ondrej Jirman -+ * -+ * How this works -+ * -------------- -+ * -+ * The driver: -+ * - can be registered as a platform or serial device -+ * - will use gpios, regulator and (optionally) serial port to control the modem -+ * - exposes a character device to control the modem power and receive various -+ * events -+ * - exposes sysfs interface to control modem power and wakeup -+ * - supports multiple modem types and instances -+ * -+ * Power up/power down: -+ * - may take a lot of time (eg. ~13-22s powerup, >22s powerdown) -+ * - happens on a private workqueue under a lock -+ * - may happen from shutdown hook -+ * - prevents suspend when powerup/powerdown is in progress -+ * - is serialized and there's no abort of in-progress operations -+ * - for specific power sequence see comments in the section for each -+ * supported modem variant -+ * - the driver monitors the power status of the modem (optionally) -+ * and tries to complete the powerdown initiated via AT command -+ * - the driver tries to detect when the modem is killswitched off -+ * and updates the driver status to reflect that -+ * -+ * Suspend/resume: -+ * - suspend is blocked if powerup/down is in progress -+ * - modem can wakeup the host over gpio based IRQ (RI signal) -+ * - the driver will assert ap_ready after resume finishes -+ * -+ * Rfkill: -+ * - the driver implements a rfkill interface if rfkill gpio is available -+ */ -+ -+//#define DEBUG -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define DRIVER_NAME "modem-power" -+ -+enum { -+ MPWR_REQ_NONE = 0, -+ MPWR_REQ_RESET, -+ MPWR_REQ_PWDN, -+ MPWR_REQ_PWUP, -+}; -+ -+enum { -+ MPWR_MODE_NORMAL = 1, -+ MPWR_MODE_DUMB, -+ MPWR_MODE_FASTBOOT, -+ MPWR_MODE_ALT1, -+ MPWR_MODE_ALT2, -+}; -+ -+struct mpwr_dev; -+ -+struct mpwr_gpio { -+ const char* name; -+ unsigned desc_off; -+ int flags; -+ bool required; -+ int irq_flags; -+ unsigned irq_off; -+}; -+ -+#define MPWR_GPIO_DEF(_name, _flags, _req) \ -+ { .name = #_name, \ -+ .desc_off = offsetof(struct mpwr_dev, _name##_gpio), \ -+ .flags = _flags, \ -+ .required = _req, \ -+ } -+ -+#define MPWR_GPIO_DEF_IRQ(_name, _flags, _req, _irq_flags) \ -+ { .name = #_name, \ -+ .desc_off = offsetof(struct mpwr_dev, _name##_gpio), \ -+ .flags = _flags, \ -+ .required = _req, \ -+ .irq_flags = _irq_flags, \ -+ .irq_off = offsetof(struct mpwr_dev, _name##_irq), \ -+ } -+ -+struct mpwr_variant { -+ int (*power_init)(struct mpwr_dev* mpwr); -+ int (*power_up)(struct mpwr_dev* mpwr); -+ int (*power_down)(struct mpwr_dev* mpwr); -+ int (*reset)(struct mpwr_dev* mpwr); -+ void (*recv_msg)(struct mpwr_dev *mpwr, const char *msg); -+ int (*suspend)(struct mpwr_dev *mpwr); -+ int (*resume)(struct mpwr_dev *mpwr); -+ const struct mpwr_gpio* gpios; -+ bool regulator_required; -+ bool monitor_wakeup; -+}; -+ -+struct mpwr_dev { -+ struct device *dev; -+ const struct mpwr_variant* variant; -+ -+ wait_queue_head_t wait; -+ -+ /* serdev */ -+ struct serdev_device *serdev; -+ char rcvbuf[4096]; -+ size_t rcvbuf_fill; -+ char msg[4096]; -+ int msg_len; -+ int msg_ok; -+ //struct kfifo kfifo; -+ DECLARE_KFIFO(kfifo, unsigned char, 4096); -+ -+ /* power */ -+ struct regulator *regulator; -+ -+ /* outputs */ -+ struct gpio_desc *enable_gpio; -+ struct gpio_desc *reset_gpio; -+ struct gpio_desc *pwrkey_gpio; -+ struct gpio_desc *sleep_gpio; -+ struct gpio_desc *dtr_gpio; -+ struct gpio_desc *host_ready_gpio; -+ struct gpio_desc *cts_gpio; -+ struct gpio_desc *rts_gpio; -+ -+ /* inputs */ -+ struct gpio_desc *status_gpio; -+ struct gpio_desc *wakeup_gpio; -+ int wakeup_irq; -+ bool status_pwrkey_multiplexed; -+ -+ /* config */ -+ struct cdev cdev; -+ dev_t major; -+ -+ /* rfkill */ -+ struct rfkill *rfkill; -+ -+ /* powerup/dn work queue */ -+ struct workqueue_struct *wq; -+ struct work_struct power_work; -+ struct work_struct finish_pdn_work; -+ struct mutex modem_lock; -+ -+ // change -+ spinlock_t lock; /* protects last_request */ -+ int last_request; -+ int powerup_mode; -+ ktime_t last_wakeup; -+ -+ struct timer_list wd_timer; -+ struct delayed_work host_ready_work; -+ -+ unsigned long flags[1]; -+}; -+ -+enum { -+ /* modem is powered */ -+ MPWR_F_POWERED, -+ MPWR_F_POWER_CHANGE_INPROGRESS, -+ MPWR_F_KILLSWITCHED, -+ /* we got a wakeup from the modem */ -+ MPWR_F_GOT_WAKEUP, -+ /* serdev */ -+ MPWR_F_RECEIVING_MSG, -+ /* eg25 */ -+ MPWR_F_GOT_PDN, -+ /* config options */ -+ MPWR_F_BLOCKED, -+ /* file */ -+ MPWR_F_OPEN, -+ MPWR_F_OVERFLOW, -+}; -+ -+static struct class* mpwr_class; -+ -+static int mpwr_serdev_at_cmd(struct mpwr_dev *mpwr, const char *msg, int timeout_ms); -+static int mpwr_serdev_at_cmd_with_retry(struct mpwr_dev *mpwr, const char *msg, -+ int timeout_ms, int tries); -+static int mpwr_serdev_at_cmd_with_retry_ignore_timeout(struct mpwr_dev *mpwr, const char *msg, -+ int timeout_ms, int tries); -+ -+// {{{ mg2723 variant -+ -+static int mpwr_mg2723_power_init(struct mpwr_dev* mpwr) -+{ -+ // if the device has power applied or doesn't have regulator -+ // configured (we assume it's always powered) initialize GPIO -+ // to shut it down initially -+ if (!mpwr->regulator || regulator_is_enabled(mpwr->regulator)) { -+ gpiod_set_value(mpwr->enable_gpio, 0); -+ gpiod_set_value(mpwr->reset_gpio, 1); -+ } else { -+ // device is not powered, don't drive the gpios -+ gpiod_direction_input(mpwr->enable_gpio); -+ gpiod_direction_input(mpwr->reset_gpio); -+ } -+ -+ return 0; -+} -+ -+static int mpwr_mg2723_power_up(struct mpwr_dev* mpwr) -+{ -+ int ret; -+ -+ // power up -+ if (mpwr->regulator) { -+ ret = regulator_enable(mpwr->regulator); -+ if (ret < 0) { -+ dev_err(mpwr->dev, -+ "can't enable power supply err=%d", ret); -+ return ret; -+ } -+ } -+ -+ gpiod_direction_output(mpwr->enable_gpio, 1); -+ gpiod_direction_output(mpwr->reset_gpio, 1); -+ msleep(300); -+ gpiod_set_value(mpwr->reset_gpio, 0); -+ -+ return 0; -+} -+ -+static int mpwr_mg2723_power_down(struct mpwr_dev* mpwr) -+{ -+ gpiod_set_value(mpwr->enable_gpio, 0); -+ msleep(50); -+ -+ if (mpwr->regulator) { -+ regulator_disable(mpwr->regulator); -+ -+ gpiod_direction_input(mpwr->enable_gpio); -+ gpiod_direction_input(mpwr->reset_gpio); -+ } else { -+ gpiod_set_value(mpwr->reset_gpio, 1); -+ } -+ -+ return 0; -+} -+ -+static int mpwr_mg2723_reset(struct mpwr_dev* mpwr) -+{ -+ gpiod_set_value(mpwr->reset_gpio, 1); -+ msleep(300); -+ gpiod_set_value(mpwr->reset_gpio, 0); -+ -+ return 0; -+} -+ -+static const struct mpwr_gpio mpwr_mg2723_gpios[] = { -+ MPWR_GPIO_DEF(enable, GPIOD_IN, true), -+ MPWR_GPIO_DEF(reset, GPIOD_IN, true), -+ MPWR_GPIO_DEF_IRQ(wakeup, GPIOD_IN, true, IRQF_TRIGGER_FALLING), -+ { }, -+}; -+ -+static const struct mpwr_variant mpwr_mg2723_variant = { -+ .power_init = mpwr_mg2723_power_init, -+ .power_up = mpwr_mg2723_power_up, -+ .power_down = mpwr_mg2723_power_down, -+ .reset = mpwr_mg2723_reset, -+ .gpios = mpwr_mg2723_gpios, -+}; -+ -+// }}} -+// {{{ eg25 variant -+ -+static bool mpwr_eg25_qcfg_airplanecontrol_is_ok(const char* v) -+{ -+ return strstarts(v, "1,"); -+} -+ -+struct mpwr_eg25_qcfg { -+ const char* name; -+ const char* val; -+ bool (*is_ok)(const char* val); -+}; -+ -+#define EG25G_LATEST_KNOWN_FIRMWARE "EG25GGBR07A08M2G_01.002.07" -+ -+static const struct mpwr_eg25_qcfg mpwr_eg25_qcfgs[] = { -+ //{ "risignaltype", "\"respective\"", }, -+ { "risignaltype", "\"physical\"", }, -+ { "urc/ri/ring", "\"pulse\",1,1000,5000,\"off\",1", }, -+ { "urc/ri/smsincoming", "\"pulse\",1,1", }, -+ { "urc/ri/other", "\"off\",1,1", }, -+ { "urc/ri/pin", "uart_ri", }, -+ { "urc/delay", "0", }, -+ -+ //{ "sleep/datactrl", "0,300,1", }, -+ -+ { "sleepind/level", "0", }, -+ { "wakeupin/level", "0", }, -+ -+ { "ApRstLevel", "0", }, -+ { "ModemRstLevel", "0", }, -+ -+ // in EG25-G this tries to modify file in /etc (read-only) -+ // and fails -+ //{ "dbgctl", "0", }, -+ -+ // we don't need AP_READY -+ { "apready", "0,0,500", }, -+ -+ { "airplanecontrol", "1", mpwr_eg25_qcfg_airplanecontrol_is_ok }, -+ -+ // available since firmware R07A08_01.002.01.002 -+ { "fast/poweroff", "1" }, -+}; -+ -+static char* mpwr_serdev_get_response_value(struct mpwr_dev *mpwr, -+ const char* prefix) -+{ -+ int off; -+ -+ for (off = 0; off < mpwr->msg_len; off += strlen(mpwr->msg + off) + 1) -+ if (strstarts(mpwr->msg + off, prefix)) -+ return mpwr->msg + off + strlen(prefix); -+ -+ return NULL; -+} -+ -+static struct gpio_desc *mpwr_eg25_get_pwrkey_gpio(struct mpwr_dev *mpwr) -+{ -+ if (mpwr->status_pwrkey_multiplexed) -+ return mpwr->status_gpio; -+ -+ return mpwr->pwrkey_gpio; -+} -+ -+/* -+ * Gpio meanings -+ * ------------- -+ * -+ * enable_gpio - 1 = enables RF, 0 = disables RF -+ * sleep_gpio - 1 = puts modem to sleep, 0 = wakes up the modem (must be 0 -+ * during poweron) -+ * reset_gpio - accepts 150-460ms reset pulse (high __|^|__) -+ * pwrkey_gpio - accepts 100ms-650ms pulse for powerup (high __|^|__) -+ * 650ms+ pulse for powerdown -+ * (initiated after pulse ends, pulse may have indefinite -+ * duration) -+ * status_gpio - modem power status 0 = powered 1 = unpowered -+ * wakeup_gpio - "ring indicator" output from the modem -+ * host_ready_gpio - AP_READY pin - host is ready to receive URCs -+ * -+ * (pwrkey may be multiplexed with status_gpio) -+ * -+ * Modem behavior -+ * -------------- -+ * -+ * wakeup_gpio (RI): -+ * - goes high shortly after power is applied (~15ms) -+ * - goes low when RDY is sent -+ * -+ * dtr_gpio -+ * - when high, modem can sleep if requested -+ * - H->L will wake up a sleeping modem -+ * - internal pull-up -+ * -+ * ri -+ * - pulled low when there's URC -+ * - modem wakes up on URC automatically -+ * -+ * - AT+QURCCFG -+ * - AT+QINDCFG="csq",1 -+ * - AT+QINDCFG="ring",1 -+ * - AT+QINDCFG="smsincoming",1 -+ * - AT+CGREG=0 -+ * - AT+CREG=0 -+ * -+ * - AT+QURCCFG="urcport","uart1" -+ */ -+static int mpwr_eg25_power_up(struct mpwr_dev* mpwr) -+{ -+ struct gpio_desc *pwrkey_gpio = mpwr_eg25_get_pwrkey_gpio(mpwr); -+ bool wakeup_ok, status_ok; -+ bool needs_restart = false; -+ u32 speed = 115200; -+ int ret, i, off; -+ ktime_t start; -+ int mode = mpwr->powerup_mode; -+ -+ if (regulator_is_enabled(mpwr->regulator)) -+ dev_warn(mpwr->dev, -+ "regulator was already enabled during powerup"); -+ -+ /* Enable the modem power. */ -+ ret = regulator_enable(mpwr->regulator); -+ if (ret < 0) { -+ dev_err(mpwr->dev, -+ "can't enable power supply err=%d", ret); -+ return ret; -+ } -+ -+ /* Drive default gpio signals during powerup */ -+ /* host_ready_gpio should be 1 during normal powerup */ -+ gpiod_direction_output(mpwr->host_ready_gpio, mode != MPWR_MODE_ALT2); -+ /* #W_DISABLE must be left pulled up during modem power up -+ * early on, because opensource bootloader uses this signal to enter -+ * fastboot mode when it's pulled down. -+ * -+ * This should be 1 for normal powerup and 0 for fastboot mode with -+ * special Biktor's firmware. -+ */ -+ gpiod_direction_output(mpwr->enable_gpio, mode != MPWR_MODE_FASTBOOT); -+ gpiod_direction_output(mpwr->sleep_gpio, 0); -+ gpiod_direction_output(mpwr->reset_gpio, 0); -+ gpiod_direction_output(pwrkey_gpio, 0); -+ /* dtr_gpio should be 0 during normal powerup */ -+ gpiod_direction_output(mpwr->dtr_gpio, mode == MPWR_MODE_ALT1); -+ -+ /* Wait for powerup. (30ms min. according to datasheet) */ -+ msleep(50); -+ -+ /* Send 200ms pwrkey pulse to initiate poweron */ -+ gpiod_set_value(pwrkey_gpio, 1); -+ msleep(200); -+ gpiod_set_value(pwrkey_gpio, 0); -+ -+ /* skip modem killswitch status checks in fastboot bootloader entry mode */ -+ if (mode != MPWR_MODE_NORMAL) -+ goto open_serdev; -+ -+ /* Switch status key to input, in case it's multiplexed with pwrkey. */ -+ gpiod_direction_input(mpwr->status_gpio); -+ -+ /* -+ * Wait for status/wakeup change, assume good values, if CTS/status -+ * signals, are not configured. -+ */ -+ status_ok = mpwr->status_gpio ? false : true; -+ wakeup_ok = mpwr->wakeup_gpio ? false : true; -+ -+ /* wait up to 10s for status */ -+ start = ktime_get(); -+ while (ktime_ms_delta(ktime_get(), start) < 10000) { -+ if (!wakeup_ok && mpwr->wakeup_gpio && gpiod_get_value(mpwr->wakeup_gpio)) { -+ dev_info(mpwr->dev, "wakeup ok\n"); -+ wakeup_ok = true; -+ } -+ -+ if (!status_ok && mpwr->status_gpio && !gpiod_get_value(mpwr->status_gpio)) { -+ dev_info(mpwr->dev, "status ok\n"); -+ status_ok = true; -+ } -+ -+ /* modem is ready */ -+ if (wakeup_ok && status_ok) -+ break; -+ -+ msleep(50); -+ } -+ -+ if (!wakeup_ok) { -+ dev_err(mpwr->dev, "The modem looks kill-switched\n"); -+ if (!test_and_set_bit(MPWR_F_KILLSWITCHED, mpwr->flags)) -+ sysfs_notify(&mpwr->dev->kobj, NULL, "killswitched"); -+ goto err_shutdown_noclose; -+ } -+ -+ if (!status_ok) { -+ dev_err(mpwr->dev, "The modem didn't report powerup success in time\n"); -+ goto err_shutdown_noclose; -+ } -+ -+ if (test_and_clear_bit(MPWR_F_KILLSWITCHED, mpwr->flags)) -+ sysfs_notify(&mpwr->dev->kobj, NULL, "killswitched"); -+ -+open_serdev: -+ /* open serial console */ -+ ret = serdev_device_open(mpwr->serdev); -+ if (ret) { -+ dev_err(mpwr->dev, "error opening serdev (%d)\n", ret); -+ goto err_shutdown_noclose; -+ } -+ -+ of_property_read_u32(mpwr->dev->of_node, "current-speed", &speed); -+ serdev_device_set_baudrate(mpwr->serdev, speed); -+ serdev_device_set_flow_control(mpwr->serdev, false); -+ ret = serdev_device_set_parity(mpwr->serdev, SERDEV_PARITY_NONE); -+ if (ret) { -+ dev_err(mpwr->dev, "error setting serdev parity (%d)\n", ret); -+ goto err_shutdown; -+ } -+ -+ if (mode != MPWR_MODE_NORMAL) -+ goto powered_up; -+ -+ ret = mpwr_serdev_at_cmd_with_retry_ignore_timeout(mpwr, "AT&FE0", 1000, 30); -+ if (ret) -+ goto err_shutdown; -+ -+ /* print firmware version */ -+ ret = mpwr_serdev_at_cmd_with_retry(mpwr, "AT+QVERSION;+QSUBSYSVER", 1000, 15); -+ if (ret == 0 && mpwr->msg_len > 0) { -+ bool outdated = false; -+ -+ dev_info(mpwr->dev, "===================================================\n"); -+ for (off = 0; off < mpwr->msg_len; off += strlen(mpwr->msg + off) + 1) { -+ if (strstr(mpwr->msg + off, "Project Rev") && !strstr(mpwr->msg + off, EG25G_LATEST_KNOWN_FIRMWARE)) -+ outdated = true; -+ -+ dev_info(mpwr->dev, "%s\n", mpwr->msg + off); -+ } -+ dev_info(mpwr->dev, "===================================================\n"); -+ -+ if (outdated) -+ dev_warn(mpwr->dev, "Your modem has an outdated firmware. Latest know version is %s. Consider updating.\n", EG25G_LATEST_KNOWN_FIRMWARE); -+ } -+ -+ /* print ADB key to dmesg */ -+ ret = mpwr_serdev_at_cmd_with_retry(mpwr, "AT+QADBKEY?", 1000, 15); -+ if (ret == 0) { -+ const char *val = mpwr_serdev_get_response_value(mpwr, "+QADBKEY: "); -+ if (val) -+ dev_info(mpwr->dev, "ADB KEY is '%s' (you can use it to unlock ADB access to the modem, see https://xnux.eu/devices/feature/modem-pp.html)\n", val); -+ } -+ -+ // check DAI config -+ ret = mpwr_serdev_at_cmd_with_retry(mpwr, "AT+QDAI?", 1000, 15); -+ if (ret == 0) { -+ const char *val = mpwr_serdev_get_response_value(mpwr, "+QDAI: "); -+ const char *needed_val = NULL; -+ char buf[128]; -+ -+ if (val) { -+ of_property_read_string(mpwr->dev->of_node, "quectel,qdai", &needed_val); -+ -+ if (needed_val && strcmp(needed_val, val)) { -+ dev_warn(mpwr->dev, "QDAI is '%s' (changing to '%s')\n", val, needed_val); -+ -+ /* update qdai */ -+ snprintf(buf, sizeof buf, "AT+QDAI=%s", needed_val); -+ ret = mpwr_serdev_at_cmd(mpwr, buf, 5000); -+ if (ret == 0) -+ needs_restart = true; -+ } else { -+ dev_info(mpwr->dev, "QDAI is '%s'\n", val); -+ } -+ } -+ } -+ -+ /* reset the modem, to apply QDAI config if necessary */ -+ if (needs_restart) { -+ dev_info(mpwr->dev, "Restarting modem\n"); -+ -+ /* reboot is broken with fastboot enabled */ -+ mpwr_serdev_at_cmd(mpwr, "AT+QCFG=\"fast/poweroff\",0", 5000); -+ -+ ret = mpwr_serdev_at_cmd(mpwr, "AT+CFUN=1,1", 5000); -+ if (ret) -+ goto err_shutdown; -+ -+ /* wait a bit before starting to probe the modem again */ -+ msleep(6000); -+ -+ ret = mpwr_serdev_at_cmd_with_retry_ignore_timeout(mpwr, "AT&FE0", 1000, 30); -+ if (ret) -+ goto err_shutdown; -+ -+ // wait until QDAI starts succeeding (then the modem is ready -+ // to accept the following QCFGs) -+ ret = mpwr_serdev_at_cmd_with_retry(mpwr, "AT+QDAI?", 1000, 15); -+ if (ret) -+ goto err_shutdown; -+ } -+ -+ /* check and update important QCFGs */ -+ for (i = 0; i < ARRAY_SIZE(mpwr_eg25_qcfgs); i++) { -+ const char* name = mpwr_eg25_qcfgs[i].name; -+ const char* needed_val = mpwr_eg25_qcfgs[i].val; -+ bool (*is_ok)(const char* val) = mpwr_eg25_qcfgs[i].is_ok; -+ const char *val; -+ char buf[128]; -+ -+ snprintf(buf, sizeof buf, "AT+QCFG=\"%s\"", name); -+ ret = mpwr_serdev_at_cmd(mpwr, buf, 1000); -+ if (ret) -+ continue; -+ -+ snprintf(buf, sizeof buf, "+QCFG: \"%s\",", name); -+ val = mpwr_serdev_get_response_value(mpwr, buf); -+ if (val) { -+ if (needed_val && (is_ok ? !is_ok(val) : strcmp(needed_val, val))) { -+ dev_info(mpwr->dev, "QCFG '%s' is '%s' (changing to '%s')\n", name, val, needed_val); -+ -+ /* update qcfg */ -+ snprintf(buf, sizeof buf, "AT+QCFG=\"%s\",%s", name, needed_val); -+ ret = mpwr_serdev_at_cmd(mpwr, buf, 1000); -+ if (ret) -+ break; /* go to next QCFG */ -+ } else { -+ dev_info(mpwr->dev, "QCFG '%s' is '%s'\n", name, val); -+ } -+ } -+ } -+ -+ /* setup URC port */ -+ ret = mpwr_serdev_at_cmd(mpwr, "AT+QURCCFG=\"urcport\",\"all\"", 2000); -+ if (ret) { -+ dev_info(mpwr->dev, "Your modem doesn't support AT+QURCCFG=\"urcport\",\"all\", consider upgrading the firmware.\n"); -+ -+ ret = mpwr_serdev_at_cmd(mpwr, "AT+QURCCFG=\"urcport\",\"usbat\"", 2000); -+ if (ret) -+ dev_err(mpwr->dev, "Modem may not report URCs to the right port!\n"); -+ } -+ -+ /* enable the modem to go to sleep when DTR is low */ -+ ret = mpwr_serdev_at_cmd(mpwr, "AT+QSCLK=1", 2000); -+ if (ret) -+ dev_err(mpwr->dev, "Modem will probably not sleep!\n"); -+ -+powered_up: -+ // if we're signaling some alternate boot mode via GPIO, we need to -+ // sleep here so that modem's boot script notices the gpio -+ if (mode == MPWR_MODE_ALT1 || mode == MPWR_MODE_FASTBOOT || mode == MPWR_MODE_ALT2) -+ msleep(12000); -+ -+ gpiod_direction_output(mpwr->dtr_gpio, 1); -+ -+ return 0; -+ -+err_shutdown: -+ serdev_device_close(mpwr->serdev); -+err_shutdown_noclose: -+ dev_warn(mpwr->dev, -+ "Forcibly cutting off power, data loss may occur.\n"); -+ gpiod_direction_input(mpwr->enable_gpio); -+ gpiod_direction_input(mpwr->reset_gpio); -+ gpiod_direction_input(mpwr->sleep_gpio); -+ gpiod_direction_input(pwrkey_gpio); -+ gpiod_direction_input(mpwr->host_ready_gpio); -+ gpiod_direction_input(mpwr->dtr_gpio); -+ -+ regulator_disable(mpwr->regulator); -+ return -ENODEV; -+} -+ -+static int mpwr_eg25_power_down_finish(struct mpwr_dev* mpwr) -+{ -+ struct gpio_desc *pwrkey_gpio = mpwr_eg25_get_pwrkey_gpio(mpwr); -+ ktime_t start = ktime_get(); -+ int ret; -+ -+ serdev_device_close(mpwr->serdev); -+ -+ /* -+ * This function is called right after POWERED DOWN message is received. -+ * -+ * In case of fast/poweroff == 1, no POWERED DOWN message is sent. -+ * Fast power off times are around 1s since the end of 800ms -+ * POK pulse. -+ * -+ * When the modem powers down RI (wakeup) goes low and STATUS goes -+ * high at the same time. Status is not connected on some boards. -+ * RI should be inactive during poweroff, but we don't know for sure. -+ * -+ * Therfore: -+ * - wait for STATUS going low -+ * - in case that's not available wait for RI going low -+ * - in case timings seem off, warn the user -+ * -+ * In addition, some boards have PWRKEY multiplexed with STATUS signal. -+ * In that case we need to switch STATUS to output high level, as soon -+ * as it goes low in order to prevent a power-up signal being registered -+ * by the modem. -+ */ -+ -+ if (mpwr->status_gpio) { -+ /* wait up to 30s for status going high */ -+ while (ktime_ms_delta(ktime_get(), start) < 30000) { -+ if (gpiod_get_value(mpwr->status_gpio)) { -+ if (ktime_ms_delta(ktime_get(), start) < 500) -+ dev_warn(mpwr->dev, -+ "STATUS signal is high too soon during powerdown. Modem is already off?\n"); -+ goto powerdown; -+ } -+ -+ msleep(20); -+ } -+ -+ dev_warn(mpwr->dev, -+ "STATUS signal didn't go high during shutdown. Modem is still on?\n"); -+ goto force_powerdown; -+ } else { -+ clear_bit(MPWR_F_GOT_WAKEUP, mpwr->flags); -+ -+ if (!gpiod_get_value(mpwr->wakeup_gpio)) { -+ dev_warn(mpwr->dev, -+ "RI signal is low too soon during powerdown. Modem is already off, or spurious wakeup?\n"); -+ msleep(2000); -+ goto powerdown; -+ } -+ -+ ret = wait_event_timeout(mpwr->wait, -+ test_bit(MPWR_F_GOT_WAKEUP, mpwr->flags), -+ msecs_to_jiffies(30000)); -+ if (ret <= 0) { -+ dev_warn(mpwr->dev, -+ "RI signal didn't go low during shutdown, is modem really powering down?\n"); -+ goto force_powerdown; -+ } -+ -+ if (ktime_ms_delta(ktime_get(), start) < 500) { -+ dev_warn(mpwr->dev, -+ "RI signal is low too soon during powerdown. Modem is already off, or spurious wakeup?\n"); -+ msleep(2000); -+ goto powerdown; -+ } -+ } -+ -+powerdown: -+ gpiod_direction_input(mpwr->enable_gpio); -+ gpiod_direction_input(mpwr->reset_gpio); -+ gpiod_direction_input(mpwr->sleep_gpio); -+ gpiod_direction_input(pwrkey_gpio); -+ gpiod_direction_input(mpwr->host_ready_gpio); -+ gpiod_direction_input(mpwr->dtr_gpio); -+ -+ regulator_disable(mpwr->regulator); -+ -+ return 0; -+ -+force_powerdown: -+ dev_warn(mpwr->dev, -+ "Forcibly cutting off power, data loss may occur.\n"); -+ goto powerdown; -+} -+ -+static int mpwr_eg25_power_down(struct mpwr_dev* mpwr) -+{ -+ struct gpio_desc *pwrkey_gpio = mpwr_eg25_get_pwrkey_gpio(mpwr); -+ //int ret; -+ -+ /* Send 800ms pwrkey pulse to initiate powerdown. */ -+ gpiod_direction_output(pwrkey_gpio, 1); -+ msleep(800); -+ gpiod_set_value(pwrkey_gpio, 0); -+ -+ /* Switch status key to input, in case it's multiplexed with pwrkey. */ -+ gpiod_direction_input(mpwr->status_gpio); -+ -+ msleep(20); -+ -+#if 0 -+ // wait for POWERED DOWN message -+ clear_bit(MPWR_F_GOT_PDN, mpwr->flags); -+ ret = wait_event_timeout(mpwr->wait, -+ test_bit(MPWR_F_GOT_PDN, mpwr->flags), -+ msecs_to_jiffies(7000)); -+ if (ret <= 0) -+ dev_warn(mpwr->dev, -+ "POWERED DOWN message not received, is modem really powering down?\n"); -+#endif -+ -+ return mpwr_eg25_power_down_finish(mpwr); -+} -+ -+static void mpwr_finish_pdn_work(struct work_struct *work) -+{ -+ /* -+ struct mpwr_dev *mpwr = container_of(work, struct mpwr_dev, power_work); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&mpwr->lock, flags); -+ spin_unlock_irqrestore(&mpwr->lock, flags); -+ -+ pm_stay_awake(mpwr->dev); -+ -+ mutex_lock(&mpwr->modem_lock); -+ -+ mutex_unlock(&mpwr->modem_lock); -+ -+ pm_relax(mpwr->dev); -+ */ -+} -+ -+static void mpwr_eg25_receive_msg(struct mpwr_dev *mpwr, const char *msg) -+{ -+ unsigned int msg_len; -+ -+ if (!strcmp(msg, "POWERED DOWN")) { -+ // system is powering down -+ set_bit(MPWR_F_GOT_PDN, mpwr->flags); -+ wake_up(&mpwr->wait); -+ -+ /* -+ if (mutex_trylock(&mpwr->modem_lock)) { -+ // if no power op is in progress, this means userspace -+ // tried to shut the modem down via AT command, finish up -+ // the job -+ -+ pm_stay_awake(mpwr->dev); -+ -+ queue_work(mpwr->wq, &mpwr->power_work); -+ dev_warn(mpwr->dev, "userspace shut down the modem via AT command, finishing the job\n"); -+ mpwr_eg25_power_down_finish(mpwr); -+ mutex_unlock(&mpwr->modem_lock); -+ -+ pm_relax(mpwr->dev); -+ } -+ */ -+ return; -+ } -+ -+ if (!strcmp(msg, "RDY")) { -+ // system is ready after powerup -+ return; -+ } -+ -+ if (!test_bit(MPWR_F_OPEN, mpwr->flags)) -+ return; -+ -+ msg_len = strlen(msg); -+ -+ if (msg_len + 1 > kfifo_avail(&mpwr->kfifo)) { -+ if (!test_and_set_bit(MPWR_F_OVERFLOW, mpwr->flags)) -+ wake_up(&mpwr->wait); -+ return; -+ } -+ -+ kfifo_in(&mpwr->kfifo, msg, msg_len); -+ kfifo_in(&mpwr->kfifo, "\n", 1); -+ wake_up(&mpwr->wait); -+} -+ -+static void mpwr_host_ready_work(struct work_struct *work) -+{ -+ struct mpwr_dev *mpwr = container_of(work, struct mpwr_dev, host_ready_work.work); -+ int ret; -+ -+ mutex_lock(&mpwr->modem_lock); -+ gpiod_direction_output(mpwr->dtr_gpio, 0); -+ -+ /* -+ * We need to give the modem some time to wake up. -+ */ -+ msleep(5); -+ -+ ret = mpwr_serdev_at_cmd(mpwr, "AT+QCFG=\"urc/cache\",0", 500); -+ if (ret) -+ dev_warn(mpwr->dev, -+ "Failed to disable urc/cache, you may not be able to see URCs\n"); -+ -+ gpiod_direction_output(mpwr->dtr_gpio, 1); -+ mutex_unlock(&mpwr->modem_lock); -+ -+ gpiod_direction_output(mpwr->host_ready_gpio, 1); -+} -+ -+static int mpwr_eg25_suspend(struct mpwr_dev *mpwr) -+{ -+ int ret; -+ -+ cancel_delayed_work_sync(&mpwr->host_ready_work); -+ -+ gpiod_direction_output(mpwr->host_ready_gpio, 0); -+ -+ mutex_lock(&mpwr->modem_lock); -+ gpiod_direction_output(mpwr->dtr_gpio, 0); -+ -+ msleep(5); -+ -+ ret = mpwr_serdev_at_cmd(mpwr, "AT+QCFG=\"urc/cache\",1", 500); -+ if (ret) -+ dev_warn(mpwr->dev, -+ "Failed to enable urc/cache, you may lose URCs during suspend\n"); -+ -+ gpiod_direction_output(mpwr->dtr_gpio, 1); -+ mutex_unlock(&mpwr->modem_lock); -+ -+ return 0; -+} -+ -+static int mpwr_eg25_resume(struct mpwr_dev *mpwr) -+{ -+ //gpiod_direction_output(mpwr->dtr_gpio, 0); -+ -+ // delay disabling URC cache until the whole system is hopefully resumed... -+ schedule_delayed_work(&mpwr->host_ready_work, msecs_to_jiffies(1000)); -+ -+ return 0; -+} -+ -+static const struct mpwr_gpio mpwr_eg25_gpios[] = { -+ MPWR_GPIO_DEF(enable, GPIOD_OUT_HIGH, true), -+ MPWR_GPIO_DEF(reset, GPIOD_OUT_LOW, true), -+ MPWR_GPIO_DEF(pwrkey, GPIOD_OUT_LOW, false), -+ MPWR_GPIO_DEF(dtr, GPIOD_OUT_LOW, true), -+ MPWR_GPIO_DEF(status, GPIOD_IN, false), -+ MPWR_GPIO_DEF_IRQ(wakeup, GPIOD_IN, true, -+ IRQF_TRIGGER_FALLING), -+ -+ // XXX: not really needed... -+ MPWR_GPIO_DEF(sleep, GPIOD_OUT_LOW, false), -+ MPWR_GPIO_DEF(host_ready, GPIOD_OUT_HIGH, false), -+ MPWR_GPIO_DEF(cts, GPIOD_IN, false), -+ MPWR_GPIO_DEF(rts, GPIOD_OUT_LOW, false), -+ { }, -+}; -+ -+static const struct mpwr_variant mpwr_eg25_variant = { -+ .power_up = mpwr_eg25_power_up, -+ .power_down = mpwr_eg25_power_down, -+ .recv_msg = mpwr_eg25_receive_msg, -+ .suspend = mpwr_eg25_suspend, -+ .resume = mpwr_eg25_resume, -+ .gpios = mpwr_eg25_gpios, -+ .regulator_required = true, -+ .monitor_wakeup = true, -+}; -+ -+// }}} -+// {{{ generic helpers -+ -+static void mpwr_reset(struct mpwr_dev* mpwr) -+{ -+ struct device *dev = mpwr->dev; -+ int ret; -+ -+ if (!test_bit(MPWR_F_POWERED, mpwr->flags)) { -+ dev_err(dev, "reset requested but device is not enabled"); -+ return; -+ } -+ -+ if (!mpwr->reset_gpio) { -+ dev_err(dev, "reset is not configured for this device"); -+ return; -+ } -+ -+ if (!mpwr->variant->reset) { -+ dev_err(dev, "reset requested but not implemented"); -+ return; -+ } -+ -+ dev_info(dev, "resetting"); -+ ret = mpwr->variant->reset(mpwr); -+ if (ret) { -+ dev_err(dev, "reset failed"); -+ } -+} -+ -+static void mpwr_power_down(struct mpwr_dev* mpwr) -+{ -+ struct device *dev = mpwr->dev; -+ ktime_t start = ktime_get(); -+ int ret; -+ -+ if (!test_bit(MPWR_F_POWERED, mpwr->flags)) -+ return; -+ -+ if (!mpwr->variant->power_down) { -+ dev_err(dev, "power down requested but not implemented"); -+ return; -+ } -+ -+ dev_info(dev, "powering down"); -+ -+ ret = mpwr->variant->power_down(mpwr); -+ if (ret) { -+ dev_err(dev, "power down failed"); -+ } else { -+ clear_bit(MPWR_F_POWERED, mpwr->flags); -+ sysfs_notify(&mpwr->dev->kobj, NULL, "powered"); -+ dev_info(mpwr->dev, "powered down in %lld ms\n", -+ ktime_ms_delta(ktime_get(), start)); -+ } -+} -+ -+static void mpwr_power_up(struct mpwr_dev* mpwr) -+{ -+ struct device *dev = mpwr->dev; -+ ktime_t start = ktime_get(); -+ int ret; -+ -+ if (test_bit(MPWR_F_POWERED, mpwr->flags)) -+ return; -+ -+ if (!mpwr->variant->power_up) { -+ dev_err(dev, "power up requested but not implemented"); -+ return; -+ } -+ -+ dev_info(dev, "powering up"); -+ -+ ret = mpwr->variant->power_up(mpwr); -+ if (ret) { -+ dev_err(dev, "power up failed"); -+ } else { -+ set_bit(MPWR_F_POWERED, mpwr->flags); -+ sysfs_notify(&mpwr->dev->kobj, NULL, "powered"); -+ dev_info(mpwr->dev, "powered up in %lld ms\n", -+ ktime_ms_delta(ktime_get(), start)); -+ } -+} -+ -+// }}} -+// {{{ chardev -+ -+static int mpwr_release(struct inode *ip, struct file *fp) -+{ -+ struct mpwr_dev* mpwr = fp->private_data; -+ -+ clear_bit(MPWR_F_OPEN, mpwr->flags); -+ -+ return 0; -+} -+ -+static int mpwr_open(struct inode *ip, struct file *fp) -+{ -+ struct mpwr_dev* mpwr = container_of(ip->i_cdev, struct mpwr_dev, cdev); -+ -+ fp->private_data = mpwr; -+ -+ if (test_and_set_bit(MPWR_F_OPEN, mpwr->flags)) -+ return -EBUSY; -+ -+ nonseekable_open(ip, fp); -+ return 0; -+} -+ -+static ssize_t mpwr_read(struct file *fp, char __user *buf, size_t len, -+ loff_t *off) -+{ -+ struct mpwr_dev* mpwr = fp->private_data; -+ int non_blocking = fp->f_flags & O_NONBLOCK; -+ unsigned int copied; -+ int ret; -+ -+ if (non_blocking && kfifo_is_empty(&mpwr->kfifo)) -+ return -EWOULDBLOCK; -+ -+ ret = wait_event_interruptible(mpwr->wait, -+ !kfifo_is_empty(&mpwr->kfifo) -+ || test_bit(MPWR_F_OVERFLOW, mpwr->flags)); -+ if (ret) -+ return ret; -+ -+ if (test_and_clear_bit(MPWR_F_OVERFLOW, mpwr->flags)) { -+ if (len < 9) -+ return -E2BIG; -+ if (copy_to_user(buf, "OVERFLOW\n", 9)) -+ return -EFAULT; -+ return 9; -+ } -+ -+ ret = kfifo_to_user(&mpwr->kfifo, buf, len, &copied); -+ -+ return ret ? ret : copied; -+} -+ -+static unsigned int mpwr_poll(struct file *fp, poll_table *wait) -+{ -+ struct mpwr_dev* mpwr = fp->private_data; -+ -+ poll_wait(fp, &mpwr->wait, wait); -+ -+ if (!kfifo_is_empty(&mpwr->kfifo)) -+ return EPOLLIN | EPOLLRDNORM; -+ -+ return 0; -+} -+ -+static const struct file_operations mpwr_fops = { -+ .owner = THIS_MODULE, -+ .open = mpwr_open, -+ .release = mpwr_release, -+ .llseek = noop_llseek, -+ .read = mpwr_read, -+ .poll = mpwr_poll, -+}; -+ -+// }}} -+ -+static void mpwr_work_handler(struct work_struct *work) -+{ -+ struct mpwr_dev *mpwr = container_of(work, struct mpwr_dev, power_work); -+ unsigned long flags; -+ int last_request; -+ -+ spin_lock_irqsave(&mpwr->lock, flags); -+ last_request = mpwr->last_request; -+ mpwr->last_request = 0; -+ spin_unlock_irqrestore(&mpwr->lock, flags); -+ -+ pm_stay_awake(mpwr->dev); -+ -+ mutex_lock(&mpwr->modem_lock); -+ -+ if (last_request == MPWR_REQ_RESET) { -+ mpwr_reset(mpwr); -+ } else if (last_request == MPWR_REQ_PWDN) { -+ mpwr_power_down(mpwr); -+ } else if (last_request == MPWR_REQ_PWUP) { -+ mpwr_power_up(mpwr); -+ } -+ -+ mutex_unlock(&mpwr->modem_lock); -+ -+ clear_bit(MPWR_F_POWER_CHANGE_INPROGRESS, mpwr->flags); -+ sysfs_notify(&mpwr->dev->kobj, NULL, "is_busy"); -+ wake_up(&mpwr->wait); -+ -+ pm_relax(mpwr->dev); -+} -+ -+static void mpwr_request_power_change(struct mpwr_dev* mpwr, int request, int mode) -+{ -+ unsigned long flags; -+ -+ set_bit(MPWR_F_POWER_CHANGE_INPROGRESS, mpwr->flags); -+ sysfs_notify(&mpwr->dev->kobj, NULL, "is_busy"); -+ -+ spin_lock_irqsave(&mpwr->lock, flags); -+ mpwr->last_request = request; -+ if (mode >= 0) -+ mpwr->powerup_mode = mode; -+ spin_unlock_irqrestore(&mpwr->lock, flags); -+ -+ queue_work(mpwr->wq, &mpwr->power_work); -+} -+ -+static irqreturn_t mpwr_gpio_isr(int irq, void *dev_id) -+{ -+ struct mpwr_dev *mpwr = dev_id; -+ -+ if (irq == mpwr->wakeup_irq) { -+ dev_dbg(mpwr->dev, "wakeup irq\n"); -+ -+ if (device_can_wakeup(mpwr->dev)) -+ pm_wakeup_event(mpwr->dev, 2000); -+ -+ set_bit(MPWR_F_GOT_WAKEUP, mpwr->flags); -+ spin_lock(&mpwr->lock); -+ mpwr->last_wakeup = ktime_get(); -+ spin_unlock(&mpwr->lock); -+ wake_up(&mpwr->wait); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static void mpwr_wd_timer_fn(struct timer_list *t) -+{ -+ struct mpwr_dev *mpwr = from_timer(mpwr, t, wd_timer); -+ -+ if (!mpwr->variant->monitor_wakeup || !test_bit(MPWR_F_POWERED, mpwr->flags)) -+ return; -+ -+ /* -+ * Monitor wakeup status: -+ * -+ * If RI signal is low for too long we assume the user killswitched -+ * the modem at runtime. -+ */ -+ spin_lock(&mpwr->lock); -+ if (!gpiod_get_value(mpwr->wakeup_gpio)) { -+ if (ktime_ms_delta(ktime_get(), mpwr->last_wakeup) > 5000) { -+ if (!test_and_set_bit(MPWR_F_KILLSWITCHED, mpwr->flags)) -+ sysfs_notify(&mpwr->dev->kobj, NULL, "killswitched"); -+ wake_up(&mpwr->wait); -+ dev_warn(mpwr->dev, "modem looks killswitched at runtime!\n"); -+ } -+ } -+ spin_unlock(&mpwr->lock); -+ -+ mod_timer(t, jiffies + msecs_to_jiffies(1000)); -+} -+ -+// {{{ sysfs -+ -+static ssize_t powered_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct mpwr_dev *mpwr = platform_get_drvdata(to_platform_device(dev)); -+ -+ return scnprintf(buf, PAGE_SIZE, "%u\n", -+ !!test_bit(MPWR_F_POWERED, mpwr->flags)); -+} -+ -+static ssize_t powered_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ struct mpwr_dev *mpwr = platform_get_drvdata(to_platform_device(dev)); -+ unsigned status; -+ int ret; -+ -+ if (test_bit(MPWR_F_BLOCKED, mpwr->flags)) -+ return -EPERM; -+ -+ ret = kstrtouint(buf, 10, &status); -+ if (ret) -+ return ret; -+ -+ mpwr_request_power_change(mpwr, status ? MPWR_REQ_PWUP : MPWR_REQ_PWDN, status); -+ -+ return len; -+} -+ -+static ssize_t powered_blocking_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ struct mpwr_dev *mpwr = platform_get_drvdata(to_platform_device(dev)); -+ unsigned status; -+ int ret; -+ -+ if (test_bit(MPWR_F_BLOCKED, mpwr->flags)) -+ return -EPERM; -+ -+ ret = kstrtouint(buf, 10, &status); -+ if (ret) -+ return ret; -+ -+ mpwr_request_power_change(mpwr, status ? MPWR_REQ_PWUP : MPWR_REQ_PWDN, status); -+ -+ ret = wait_event_interruptible_timeout(mpwr->wait, -+ !test_bit(MPWR_F_POWER_CHANGE_INPROGRESS, mpwr->flags), -+ msecs_to_jiffies(60000)); -+ if (ret <= 0) { -+ dev_err(mpwr->dev, "Power state change timeout\n"); -+ return -EIO; -+ } -+ -+ if (!!status != !!test_bit(MPWR_F_POWERED, mpwr->flags)) -+ return -EIO; -+ -+ return len; -+} -+ -+static ssize_t help_show(struct device *dev, struct device_attribute *attr, char *buf) -+{ -+ return scnprintf(buf, PAGE_SIZE, -+ "echo N > powered, where N can be:\n" -+ "0: power off\n" -+ "1: normal powerup\n" -+ "2: dumb powerup (no AT commands and little error checking during powerup)\n" -+ "3: fastboot powerup (with biktor's patched aboot - #W_DISABLE held low during powerup)\n" -+ "4: alternate powerup (megi's userspace - DTR held high during powerup)\n\n" -+ "echo N > powered_blocking can be used for the write to block until power status transition completes\n"); -+} -+ -+static ssize_t killswitched_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct mpwr_dev *mpwr = platform_get_drvdata(to_platform_device(dev)); -+ -+ return scnprintf(buf, PAGE_SIZE, "%u\n", -+ !!test_bit(MPWR_F_KILLSWITCHED, mpwr->flags)); -+} -+ -+static ssize_t is_busy_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct mpwr_dev *mpwr = platform_get_drvdata(to_platform_device(dev)); -+ -+ return scnprintf(buf, PAGE_SIZE, "%u\n", -+ !!test_bit(MPWR_F_POWER_CHANGE_INPROGRESS, mpwr->flags)); -+} -+ -+static ssize_t hard_reset_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ struct mpwr_dev *mpwr = platform_get_drvdata(to_platform_device(dev)); -+ bool val; -+ int ret; -+ -+ if (test_bit(MPWR_F_BLOCKED, mpwr->flags)) -+ return -EPERM; -+ -+ ret = kstrtobool(buf, &val); -+ if (ret) -+ return ret; -+ if (val) -+ mpwr_request_power_change(mpwr, MPWR_REQ_RESET, -1); -+ -+ return len; -+} -+ -+static ssize_t debug_pins_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ struct mpwr_dev *mpwr = platform_get_drvdata(to_platform_device(dev)); -+ unsigned val; -+ int ret; -+ -+ if (test_bit(MPWR_F_BLOCKED, mpwr->flags)) -+ return -EPERM; -+ -+ ret = kstrtouint(buf, 16, &val); -+ if (ret) -+ return ret; -+ -+ gpiod_direction_output(mpwr->host_ready_gpio, val & BIT(0)); -+ gpiod_direction_output(mpwr->enable_gpio, val & BIT(1)); -+ gpiod_direction_output(mpwr->dtr_gpio, val & BIT(2)); -+ gpiod_direction_output(mpwr->rts_gpio, val & BIT(3)); -+ -+ return len; -+} -+ -+static ssize_t debug_pins_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct mpwr_dev *mpwr = platform_get_drvdata(to_platform_device(dev)); -+ -+ return scnprintf(buf, PAGE_SIZE, "CTS=%u RI=%u\n", -+ gpiod_get_value(mpwr->cts_gpio), gpiod_get_value(mpwr->wakeup_gpio)); -+} -+ -+static DEVICE_ATTR_RW(powered); -+static DEVICE_ATTR_WO(powered_blocking); -+static DEVICE_ATTR_RO(killswitched); -+static DEVICE_ATTR_RO(is_busy); -+static DEVICE_ATTR_RO(help); -+static DEVICE_ATTR_WO(hard_reset); -+static DEVICE_ATTR_RW(debug_pins); -+ -+static struct attribute *mpwr_attrs[] = { -+ &dev_attr_powered.attr, -+ &dev_attr_powered_blocking.attr, -+ &dev_attr_killswitched.attr, -+ &dev_attr_is_busy.attr, -+ &dev_attr_help.attr, -+ &dev_attr_hard_reset.attr, -+ &dev_attr_debug_pins.attr, -+ NULL, -+}; -+ -+static const struct attribute_group mpwr_group = { -+ .attrs = mpwr_attrs, -+}; -+ -+// }}} -+// {{{ rfkill -+ -+static int mpwr_rfkill_set(void *data, bool blocked) -+{ -+ struct mpwr_dev *mpwr = data; -+ -+ gpiod_set_value(mpwr->enable_gpio, !blocked); -+ return 0; -+} -+ -+static void mpwr_rfkill_query(struct rfkill *rfkill, void *data) -+{ -+ struct mpwr_dev *mpwr = data; -+ -+ rfkill_set_sw_state(rfkill, !gpiod_get_value(mpwr->enable_gpio)); -+} -+ -+static const struct rfkill_ops mpwr_rfkill_ops = { -+ .set_block = mpwr_rfkill_set, -+ .query = mpwr_rfkill_query, -+}; -+ -+// }}} -+// {{{ probe -+ -+static int mpwr_probe_generic(struct device *dev, struct mpwr_dev **mpwr_out) -+{ -+ struct mpwr_dev *mpwr; -+ struct device_node *np = dev->of_node; -+ struct device *sdev; -+ const char* cdev_name = NULL; -+ int ret, i; -+ -+ mpwr = devm_kzalloc(dev, sizeof(*mpwr), GFP_KERNEL); -+ if (!mpwr) -+ return -ENOMEM; -+ -+ mpwr->variant = of_device_get_match_data(dev); -+ if (!mpwr->variant) -+ return -EINVAL; -+ -+ mpwr->dev = dev; -+ init_waitqueue_head(&mpwr->wait); -+ mutex_init(&mpwr->modem_lock); -+ spin_lock_init(&mpwr->lock); -+ INIT_WORK(&mpwr->power_work, &mpwr_work_handler); -+ INIT_WORK(&mpwr->finish_pdn_work, &mpwr_finish_pdn_work); -+ INIT_DELAYED_WORK(&mpwr->host_ready_work, mpwr_host_ready_work); -+ INIT_KFIFO(mpwr->kfifo); -+ -+ ret = of_property_read_string(np, "char-device-name", &cdev_name); -+ if (ret) { -+ dev_err(dev, "char-device-name is not configured"); -+ return -EINVAL; -+ } -+ -+ if (of_property_read_bool(np, "blocked")) -+ set_bit(MPWR_F_BLOCKED, mpwr->flags); -+ -+ mpwr->status_pwrkey_multiplexed = -+ of_property_read_bool(np, "status-pwrkey-multiplexed"); -+ -+ mpwr->regulator = devm_regulator_get_optional(dev, "power"); -+ if (IS_ERR(mpwr->regulator)) { -+ ret = PTR_ERR(mpwr->regulator); -+ if (ret != -ENODEV) { -+ dev_err(dev, "can't get power supply err=%d", ret); -+ return ret; -+ } -+ -+ mpwr->regulator = NULL; -+ } -+ -+ if (!mpwr->regulator && mpwr->variant->regulator_required) { -+ dev_err(dev, "can't get power supply err=%d", -ENODEV); -+ return -ENODEV; -+ } -+ -+ for (i = 0; mpwr->variant->gpios[i].name; i++) { -+ const struct mpwr_gpio *io = &mpwr->variant->gpios[i]; -+ struct gpio_desc **desc = (struct gpio_desc **)((u8*)mpwr + -+ io->desc_off); -+ int *irq = (int*)((u8*)mpwr + io->irq_off); -+ char buf[64]; -+ -+ if (io->required) -+ *desc = devm_gpiod_get(dev, io->name, io->flags); -+ else -+ *desc = devm_gpiod_get_optional(dev, io->name, io->flags); -+ -+ if (IS_ERR(*desc)) { -+ dev_err(dev, "can't get %s gpio err=%ld", io->name, -+ PTR_ERR(*desc)); -+ return PTR_ERR(*desc); -+ } -+ -+ if (!*desc) -+ continue; -+ -+ if (io->irq_flags == 0 || io->irq_off == 0) -+ continue; -+ -+ *irq = gpiod_to_irq(*desc); -+ if (*irq <= 0) { -+ dev_err(dev, "error converting %s gpio to irq: %d", -+ io->name, ret); -+ return *irq; -+ } -+ -+ snprintf(buf, sizeof buf, "modem-%s-gpio", io->name); -+ ret = devm_request_irq(dev, *irq, mpwr_gpio_isr, io->irq_flags, -+ devm_kstrdup(dev, buf, GFP_KERNEL), mpwr); -+ if (ret) { -+ dev_err(dev, "error requesting %s irq: %d", -+ io->name, ret); -+ return ret; -+ } -+ } -+ -+ if (mpwr->status_pwrkey_multiplexed && mpwr->pwrkey_gpio) { -+ dev_err(dev, "status and pwrkey are multiplexed, but pwrkey defined\n"); -+ return -EINVAL; -+ } -+ -+ if (mpwr->status_pwrkey_multiplexed && !mpwr->status_gpio) { -+ dev_err(dev, "status and pwrkey are multiplexed, but status is not defined\n"); -+ return -EINVAL; -+ } -+ -+ ret = devm_device_add_group(dev, &mpwr_group); -+ if (ret) -+ return ret; -+ -+ // create char device -+ ret = alloc_chrdev_region(&mpwr->major, 0, 1, "modem-power"); -+ if (ret) { -+ dev_err(dev, "can't allocate chrdev region"); -+ goto err_disable_regulator; -+ } -+ -+ cdev_init(&mpwr->cdev, &mpwr_fops); -+ mpwr->cdev.owner = THIS_MODULE; -+ ret = cdev_add(&mpwr->cdev, mpwr->major, 1); -+ if (ret) { -+ dev_err(dev, "can't add cdev"); -+ goto err_unreg_chrev_region; -+ } -+ -+ sdev = device_create(mpwr_class, dev, mpwr->major, mpwr, cdev_name); -+ if (IS_ERR(sdev)) { -+ ret = PTR_ERR(sdev); -+ goto err_del_cdev; -+ } -+ -+ if (mpwr->wakeup_irq > 0) { -+ ret = device_init_wakeup(dev, true); -+ if (ret) { -+ dev_err(dev, "failed to init wakeup (%d)\n", ret); -+ goto err_free_dev; -+ } -+ } -+ -+ if (mpwr->enable_gpio) { -+ mpwr->rfkill = rfkill_alloc("modem", dev, RFKILL_TYPE_WWAN, -+ &mpwr_rfkill_ops, mpwr); -+ if (!mpwr->rfkill) { -+ dev_err(dev, "failed to alloc rfkill\n"); -+ ret = -ENOMEM; -+ goto err_deinit_wakeup; -+ } -+ -+ rfkill_init_sw_state(mpwr->rfkill, false); -+ -+ ret = rfkill_register(mpwr->rfkill); -+ if (ret) { -+ dev_err(dev, "failed to register rfkill (%d)\n", ret); -+ goto err_free_rfkill; -+ } -+ } -+ -+ mpwr->wq = alloc_ordered_workqueue("modem-power", 0); -+ if (!mpwr->wq) { -+ ret = -ENOMEM; -+ dev_err(dev, "failed to allocate workqueue\n"); -+ goto err_unreg_rfkill; -+ } -+ -+ if (mpwr->variant->power_init) -+ mpwr->variant->power_init(mpwr); -+ -+ timer_setup(&mpwr->wd_timer, mpwr_wd_timer_fn, 0); -+ mod_timer(&mpwr->wd_timer, jiffies + msecs_to_jiffies(50)); -+ -+ dev_info(dev, "modem power manager ready"); -+ *mpwr_out = mpwr; -+ -+ return 0; -+ -+err_unreg_rfkill: -+ if (mpwr->rfkill) -+ rfkill_unregister(mpwr->rfkill); -+err_free_rfkill: -+ if (mpwr->rfkill) -+ rfkill_destroy(mpwr->rfkill); -+err_deinit_wakeup: -+ if (mpwr->wakeup_irq > 0) -+ device_init_wakeup(dev, false); -+err_free_dev: -+ device_destroy(mpwr_class, mpwr->major); -+err_del_cdev: -+ cdev_del(&mpwr->cdev); -+err_unreg_chrev_region: -+ unregister_chrdev(mpwr->major, "modem-power"); -+err_disable_regulator: -+ cancel_work_sync(&mpwr->power_work); -+ return ret; -+} -+ -+static int mpwr_remove_generic(struct mpwr_dev *mpwr) -+{ -+ if (mpwr->rfkill) { -+ rfkill_unregister(mpwr->rfkill); -+ rfkill_destroy(mpwr->rfkill); -+ } -+ -+ if (mpwr->wakeup_irq > 0) -+ device_init_wakeup(mpwr->dev, false); -+ -+ del_timer_sync(&mpwr->wd_timer); -+ cancel_delayed_work_sync(&mpwr->host_ready_work); -+ -+ cancel_work_sync(&mpwr->power_work); -+ destroy_workqueue(mpwr->wq); -+ -+ mutex_lock(&mpwr->modem_lock); -+ mpwr_power_down(mpwr); -+ mutex_unlock(&mpwr->modem_lock); -+ -+ device_destroy(mpwr_class, mpwr->major); -+ cdev_del(&mpwr->cdev); -+ unregister_chrdev(mpwr->major, "modem-power"); -+ -+ return 0; -+} -+ -+static void mpwr_shutdown_generic(struct mpwr_dev *mpwr) -+{ -+ cancel_work_sync(&mpwr->power_work); -+ cancel_delayed_work_sync(&mpwr->host_ready_work); -+ -+ mutex_lock(&mpwr->modem_lock); -+ mpwr_power_down(mpwr); -+ mutex_unlock(&mpwr->modem_lock); -+} -+ -+// }}} -+// {{{ suspend/resume -+ -+static int __maybe_unused mpwr_suspend(struct device *dev) -+{ -+ struct mpwr_dev *mpwr = dev_get_drvdata(dev); -+ int ret = 0; -+ -+ if (!test_bit(MPWR_F_POWERED, mpwr->flags)) -+ return 0; -+ -+ //if (mpwr->sleep_gpio) -+ //gpiod_direction_output(mpwr->sleep_gpio, 1); -+ -+ if (mpwr->variant->suspend) -+ mpwr->variant->suspend(mpwr); -+ -+ if (mpwr->wakeup_irq && device_may_wakeup(mpwr->dev)) -+ enable_irq_wake(mpwr->wakeup_irq); -+ -+ return ret; -+} -+ -+static int __maybe_unused mpwr_resume(struct device *dev) -+{ -+ struct mpwr_dev *mpwr = dev_get_drvdata(dev); -+ int ret = 0; -+ -+ if (!test_bit(MPWR_F_POWERED, mpwr->flags)) -+ return 0; -+ -+ //if (mpwr->sleep_gpio) -+ //gpiod_direction_output(mpwr->sleep_gpio, 0); -+ -+ if (mpwr->variant->resume) -+ mpwr->variant->resume(mpwr); -+ -+ if (mpwr->wakeup_irq && device_may_wakeup(mpwr->dev)) -+ disable_irq_wake(mpwr->wakeup_irq); -+ -+ return ret; -+} -+ -+static const struct dev_pm_ops mpwr_pm_ops = { -+ SET_SYSTEM_SLEEP_PM_OPS(mpwr_suspend, mpwr_resume) -+}; -+ -+// }}} -+// {{{ serdev -+ -+static int mpwr_serdev_send_msg(struct mpwr_dev *mpwr, const char *msg) -+{ -+ int ret, len; -+ char buf[128]; -+ -+ if (!mpwr->serdev) -+ return -ENODEV; -+ -+ len = snprintf(buf, sizeof buf, "%s\r\n", msg); -+ if (len >= sizeof buf) -+ return -E2BIG; -+ -+ ret = serdev_device_write(mpwr->serdev, buf, len, msecs_to_jiffies(3000)); -+ if (ret < len) -+ return -EIO; -+ -+ serdev_device_wait_until_sent(mpwr->serdev, msecs_to_jiffies(3000)); -+ -+ return 0; -+} -+ -+static int __mpwr_serdev_at_cmd(struct mpwr_dev *mpwr, const char *msg, -+ int timeout_ms, bool report_error, bool report_timeout) -+{ -+ int ret; -+ -+ if (test_and_set_bit(MPWR_F_RECEIVING_MSG, mpwr->flags)) -+ return -EBUSY; -+ -+ mpwr->msg_len = 0; -+ -+ dev_dbg(mpwr->dev, "SEND: %s\n", msg); -+ -+ ret = mpwr_serdev_send_msg(mpwr, msg); -+ if (ret) { -+ clear_bit(MPWR_F_RECEIVING_MSG, mpwr->flags); -+ dev_err(mpwr->dev, "AT command '%s' can't be sent (%d)\n", msg, ret); -+ return ret; -+ } -+ -+ ret = wait_event_interruptible_timeout(mpwr->wait, -+ !test_bit(MPWR_F_RECEIVING_MSG, mpwr->flags), -+ msecs_to_jiffies(timeout_ms)); -+ if (ret <= 0) { -+ clear_bit(MPWR_F_RECEIVING_MSG, mpwr->flags); -+ if (report_timeout) -+ dev_err(mpwr->dev, "AT command '%s' timed out\n", msg); -+ return ret ? ret : -ETIMEDOUT; -+ } -+ -+ if (!mpwr->msg_ok) { -+ if (report_error) -+ dev_err(mpwr->dev, "AT command '%s' returned ERROR\n", msg); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int mpwr_serdev_at_cmd(struct mpwr_dev *mpwr, const char *msg, int timeout_ms) -+{ -+ return __mpwr_serdev_at_cmd(mpwr, msg, timeout_ms, true, true); -+} -+ -+static int __mpwr_serdev_at_cmd_with_retry(struct mpwr_dev *mpwr, const char *msg, -+ int timeout_ms, int tries, bool ignore_timeout) -+{ -+ int ret = 0; -+ -+ if (tries < 1) -+ tries = 1; -+ -+ while (tries-- > 0) { -+ ret = __mpwr_serdev_at_cmd(mpwr, msg, timeout_ms, false, !ignore_timeout); -+ if (ret != -EINVAL && (!ignore_timeout || ret != -ETIMEDOUT)) -+ return ret; -+ -+ if (ret != -ETIMEDOUT) -+ msleep(1000); -+ } -+ -+ dev_err(mpwr->dev, "AT command '%s' returned ERROR\n", msg); -+ return ret; -+} -+ -+static int mpwr_serdev_at_cmd_with_retry(struct mpwr_dev *mpwr, const char *msg, -+ int timeout_ms, int tries) -+{ -+ return __mpwr_serdev_at_cmd_with_retry(mpwr, msg, timeout_ms, tries, false); -+} -+ -+static int mpwr_serdev_at_cmd_with_retry_ignore_timeout(struct mpwr_dev *mpwr, const char *msg, -+ int timeout_ms, int tries) -+{ -+ return __mpwr_serdev_at_cmd_with_retry(mpwr, msg, timeout_ms, tries, true); -+} -+ -+static void mpwr_serdev_receive_msg(struct mpwr_dev *mpwr, const char *msg) -+{ -+ dev_dbg(mpwr->dev, "RECV: %s\n", msg); -+ -+ if (mpwr->variant->recv_msg) -+ mpwr->variant->recv_msg(mpwr, msg); -+ -+ if (!test_bit(MPWR_F_RECEIVING_MSG, mpwr->flags)) -+ return; -+ -+ if (!strcmp(msg, "OK")) { -+ clear_bit(MPWR_F_RECEIVING_MSG, mpwr->flags); -+ mpwr->msg_ok = true; -+ wake_up(&mpwr->wait); -+ return; -+ } else if (!strcmp(msg, "ERROR")) { -+ clear_bit(MPWR_F_RECEIVING_MSG, mpwr->flags); -+ mpwr->msg_ok = false; -+ wake_up(&mpwr->wait); -+ return; -+ } else { -+ int len = strlen(msg); -+ -+ if (mpwr->msg_len + len + 1 > sizeof(mpwr->msg)) { -+ dev_warn(mpwr->dev, "message buffer overflow, ignoring message\n"); -+ return; -+ } -+ -+ memcpy(mpwr->msg + mpwr->msg_len, msg, len + 1); -+ mpwr->msg_len += len + 1; -+ } -+} -+ -+static int mpwr_serdev_receive_buf(struct serdev_device *serdev, -+ const unsigned char *buf, size_t count) -+{ -+ struct mpwr_dev *mpwr = serdev_device_get_drvdata(serdev); -+ size_t avail = sizeof(mpwr->rcvbuf) - mpwr->rcvbuf_fill; -+ char* p; -+ -+ if (avail < count) -+ count = avail; -+ -+ if (avail > 0) { -+ memcpy(mpwr->rcvbuf + mpwr->rcvbuf_fill, buf, count); -+ mpwr->rcvbuf_fill += count; -+ } -+ -+ while (true) { -+ p = strnstr(mpwr->rcvbuf, "\r\n", mpwr->rcvbuf_fill); -+ if (p) { -+ if (p > mpwr->rcvbuf) { -+ *p = 0; -+ mpwr_serdev_receive_msg(mpwr, mpwr->rcvbuf); -+ } -+ -+ mpwr->rcvbuf_fill -= (p - mpwr->rcvbuf) + 2; -+ memmove(mpwr->rcvbuf, p + 2, mpwr->rcvbuf_fill); -+ } else { -+ if (sizeof(mpwr->rcvbuf) - mpwr->rcvbuf_fill == 0) { -+ mpwr->rcvbuf_fill = 0; -+ dev_warn(mpwr->dev, "rcvbuf overflow\n"); -+ } -+ -+ break; -+ } -+ } -+ -+ return count; -+} -+ -+static const struct serdev_device_ops mpwr_serdev_ops = { -+ .receive_buf = mpwr_serdev_receive_buf, -+ .write_wakeup = serdev_device_write_wakeup, -+}; -+ -+static int mpwr_serdev_probe(struct serdev_device *serdev) -+{ -+ struct device *dev = &serdev->dev; -+ struct mpwr_dev* mpwr; -+ int ret; -+ -+ ret = mpwr_probe_generic(dev, &mpwr); -+ if (ret) -+ return ret; -+ -+ serdev_device_set_drvdata(serdev, mpwr); -+ serdev_device_set_client_ops(serdev, &mpwr_serdev_ops); -+ mpwr->serdev = serdev; -+ -+ return 0; -+} -+ -+static void mpwr_serdev_remove(struct serdev_device *serdev) -+{ -+ struct mpwr_dev *mpwr = serdev_device_get_drvdata(serdev); -+ -+ mpwr_remove_generic(mpwr); -+} -+ -+static const struct of_device_id mpwr_of_match_serdev[] = { -+ { .compatible = "quectel,eg25", -+ .data = &mpwr_eg25_variant }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, mpwr_of_match_serdev); -+ -+static void mpwr_serdev_shutdown(struct device *dev) -+{ -+ struct mpwr_dev *mpwr = dev_get_drvdata(dev); -+ -+ mpwr_shutdown_generic(mpwr); -+} -+ -+static struct serdev_device_driver mpwr_serdev_driver = { -+ .probe = mpwr_serdev_probe, -+ .remove = mpwr_serdev_remove, -+ .driver = { -+ .name = DRIVER_NAME, -+ .of_match_table = mpwr_of_match_serdev, -+ .pm = &mpwr_pm_ops, -+ .shutdown = mpwr_serdev_shutdown, -+ }, -+}; -+ -+// }}} -+// {{{ platdev -+ -+static int mpwr_pdev_probe(struct platform_device *pdev) -+{ -+ struct mpwr_dev* mpwr; -+ int ret; -+ -+ ret = mpwr_probe_generic(&pdev->dev, &mpwr); -+ if (ret) -+ return ret; -+ -+ platform_set_drvdata(pdev, mpwr); -+ return 0; -+} -+ -+static int mpwr_pdev_remove(struct platform_device *pdev) -+{ -+ struct mpwr_dev *mpwr = platform_get_drvdata(pdev); -+ -+ return mpwr_remove_generic(mpwr); -+} -+ -+static void mpwr_pdev_shutdown(struct platform_device *pdev) -+{ -+ struct mpwr_dev *mpwr = platform_get_drvdata(pdev); -+ -+ mpwr_shutdown_generic(mpwr); -+} -+ -+static const struct of_device_id mpwr_of_match_plat[] = { -+ { .compatible = "zte,mg3732", -+ .data = &mpwr_mg2723_variant }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, mpwr_of_match_plat); -+ -+static struct platform_driver mpwr_platform_driver = { -+ .probe = mpwr_pdev_probe, -+ .remove = mpwr_pdev_remove, -+ .shutdown = mpwr_pdev_shutdown, -+ .driver = { -+ .name = DRIVER_NAME, -+ .of_match_table = mpwr_of_match_plat, -+ .pm = &mpwr_pm_ops, -+ }, -+}; -+ -+// }}} -+// {{{ driver init -+ -+static int __init mpwr_driver_init(void) -+{ -+ int ret; -+ -+ mpwr_class = class_create(THIS_MODULE, "modem-power"); -+ if (IS_ERR(mpwr_class)) -+ return PTR_ERR(mpwr_class); -+ -+ ret = serdev_device_driver_register(&mpwr_serdev_driver); -+ if (ret) -+ goto err_class; -+ -+ ret = platform_driver_register(&mpwr_platform_driver); -+ if (ret) -+ goto err_serdev; -+ -+ return ret; -+ -+err_serdev: -+ serdev_device_driver_unregister(&mpwr_serdev_driver); -+err_class: -+ class_destroy(mpwr_class); -+ return ret; -+} -+ -+static void __exit mpwr_driver_exit(void) -+{ -+ serdev_device_driver_unregister(&mpwr_serdev_driver); -+ platform_driver_unregister(&mpwr_platform_driver); -+ class_destroy(mpwr_class); -+} -+ -+module_init(mpwr_driver_init); -+module_exit(mpwr_driver_exit); -+ -+MODULE_DESCRIPTION("Modem power manager"); -+MODULE_AUTHOR("Ondrej Jirman "); -+MODULE_LICENSE("GPL v2"); -+ -+// }}} -diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c -index ff3063ce2acd..de5d2908f4cd 100644 ---- a/drivers/mmc/core/mmc.c -+++ b/drivers/mmc/core/mmc.c -@@ -1789,6 +1789,8 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, - */ - mmc_select_powerclass(card); - -+ msleep(20); -+ - /* - * Enable HPI feature (if supported) - */ -@@ -1808,6 +1810,8 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, - } - } - -+ msleep(20); -+ - /* - * If cache size is higher than 0, this indicates the existence of cache - * and it can be turned on. Note that some eMMCs from Micron has been -diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c -index 6310693f2ac0..2e8e7412e09f 100644 ---- a/drivers/mmc/host/sunxi-mmc.c -+++ b/drivers/mmc/host/sunxi-mmc.c -@@ -945,9 +945,15 @@ static void sunxi_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) - { - struct sunxi_mmc_host *host = mmc_priv(mmc); - -+ if (ios->power_mode == MMC_POWER_OFF) -+ sunxi_mmc_reset_host(host); -+ - sunxi_mmc_card_power(host, ios); - sunxi_mmc_set_bus_width(host, ios->bus_width); - sunxi_mmc_set_clk(host, ios); -+ -+ if (ios->power_mode == MMC_POWER_UP) -+ sunxi_mmc_init_host(host); - } - - static int sunxi_mmc_volt_switch(struct mmc_host *mmc, struct mmc_ios *ios) -@@ -973,8 +979,8 @@ static void sunxi_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) - unsigned long flags; - u32 imask; - -- if (enable) -- pm_runtime_get_noresume(host->dev); -+ //if (enable) -+ //pm_runtime_get_noresume(host->dev); - - spin_lock_irqsave(&host->lock, flags); - -@@ -989,8 +995,8 @@ static void sunxi_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) - mmc_writel(host, REG_IMASK, imask); - spin_unlock_irqrestore(&host->lock, flags); - -- if (!enable) -- pm_runtime_put_noidle(host->mmc->parent); -+ //if (!enable) -+ //pm_runtime_put_noidle(host->mmc->parent); - } - - static void sunxi_mmc_hw_reset(struct mmc_host *mmc) -@@ -1432,10 +1438,10 @@ static int sunxi_mmc_probe(struct platform_device *pdev) - if (ret) - goto error_free_dma; - -- pm_runtime_set_active(&pdev->dev); -- pm_runtime_set_autosuspend_delay(&pdev->dev, 50); -- pm_runtime_use_autosuspend(&pdev->dev); -- pm_runtime_enable(&pdev->dev); -+ //pm_runtime_set_active(&pdev->dev); -+ //pm_runtime_set_autosuspend_delay(&pdev->dev, 50); -+ //pm_runtime_use_autosuspend(&pdev->dev); -+ //pm_runtime_enable(&pdev->dev); - - ret = mmc_add_host(mmc); - if (ret) -@@ -1460,7 +1466,7 @@ static int sunxi_mmc_remove(struct platform_device *pdev) - struct sunxi_mmc_host *host = mmc_priv(mmc); - - mmc_remove_host(mmc); -- pm_runtime_force_suspend(&pdev->dev); -+ //pm_runtime_force_suspend(&pdev->dev); - disable_irq(host->irq); - sunxi_mmc_disable(host); - dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); -@@ -1499,7 +1505,6 @@ static int sunxi_mmc_runtime_suspend(struct device *dev) - * Disabling the irq will prevent this. - */ - disable_irq(host->irq); -- sunxi_mmc_reset_host(host); - sunxi_mmc_disable(host); - - return 0; -@@ -1516,8 +1521,8 @@ static struct platform_driver sunxi_mmc_driver = { - .driver = { - .name = "sunxi-mmc", - .probe_type = PROBE_PREFER_ASYNCHRONOUS, -- .of_match_table = sunxi_mmc_of_match, -- .pm = &sunxi_mmc_pm_ops, -+ .of_match_table = of_match_ptr(sunxi_mmc_of_match), -+ //.pm = &sunxi_mmc_pm_ops, - }, - .probe = sunxi_mmc_probe, - .remove = sunxi_mmc_remove, -diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c -index b17faccc95c4..741610a76b6b 100644 ---- a/drivers/mtd/spi-nor/core.c -+++ b/drivers/mtd/spi-nor/core.c -@@ -3621,6 +3621,22 @@ static int spi_nor_probe(struct spi_mem *spimem) - if (!nor) - return -ENOMEM; - -+ nor->reg_vdd = devm_regulator_get(&spi->dev, "vdd"); -+ if (IS_ERR(nor->reg_vdd)) { -+ ret = PTR_ERR(nor->reg_vdd); -+ if (ret != -EPROBE_DEFER) -+ dev_err(&spi->dev, "unable to get regulator: %d\n", ret); -+ return ret; -+ } -+ -+ ret = regulator_enable(nor->reg_vdd); -+ if (ret) { -+ dev_err(&spi->dev, "unable to enable regulator: %d\n", ret); -+ return ret; -+ } -+ -+ msleep(5); -+ - nor->spimem = spimem; - nor->dev = &spi->dev; - spi_nor_set_flash_node(nor, spi->dev.of_node); -@@ -3648,7 +3664,7 @@ static int spi_nor_probe(struct spi_mem *spimem) - - ret = spi_nor_scan(nor, flash_name, &hwcaps); - if (ret) -- return ret; -+ goto err_reg_disable; - - /* - * None of the existing parts have > 512B pages, but let's play safe -@@ -3661,20 +3677,28 @@ static int spi_nor_probe(struct spi_mem *spimem) - nor->bouncebuf = devm_kmalloc(nor->dev, - nor->bouncebuf_size, - GFP_KERNEL); -- if (!nor->bouncebuf) -- return -ENOMEM; -+ if (!nor->bouncebuf) { -+ ret = -ENOMEM; -+ goto err_reg_disable; -+ } - } - - ret = spi_nor_create_read_dirmap(nor); - if (ret) -- return ret; -+ goto err_reg_disable; - - ret = spi_nor_create_write_dirmap(nor); - if (ret) -- return ret; -+ goto err_reg_disable; - -- return mtd_device_register(&nor->mtd, data ? data->parts : NULL, -+ ret = mtd_device_register(&nor->mtd, data ? data->parts : NULL, - data ? data->nr_parts : 0); -+ if (!ret) -+ return 0; -+ -+err_reg_disable: -+ regulator_disable(nor->reg_vdd); -+ return ret; - } - - static int spi_nor_remove(struct spi_mem *spimem) -@@ -3682,6 +3706,7 @@ static int spi_nor_remove(struct spi_mem *spimem) - struct spi_nor *nor = spi_mem_get_drvdata(spimem); - - spi_nor_restore(nor); -+ regulator_disable(nor->reg_vdd); - - /* Clean up MTD stuff. */ - return mtd_device_unregister(&nor->mtd); -diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -index a5e0eff4a387..501552191fc4 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -@@ -57,20 +57,25 @@ struct emac_variant { - }; - - /* struct sunxi_priv_data - hold all sunxi private data -- * @tx_clk: reference to MAC TX clock -- * @ephy_clk: reference to the optional EPHY clock for the internal PHY -- * @regulator: reference to the optional regulator -- * @rst_ephy: reference to the optional EPHY reset for the internal PHY -- * @variant: reference to the current board variant -- * @regmap: regmap for using the syscon -- * @internal_phy_powered: Does the internal PHY is enabled -- * @use_internal_phy: Is the internal PHY selected for use -- * @mux_handle: Internal pointer used by mdio-mux lib -+ * @tx_clk: reference to MAC TX clock -+ * @ephy_clk: reference to the optional EPHY clock for -+ * the internal PHY -+ * @regulator_phy: reference to the optional regulator -+ * @regulator_phy_io: reference to the optional regulator for -+ * PHY I/O pins -+ * @rst_ephy: reference to the optional EPHY reset for -+ * the internal PHY -+ * @variant: reference to the current board variant -+ * @regmap: regmap for using the syscon -+ * @internal_phy_powered: Does the internal PHY is enabled -+ * @use_internal_phy: Is the internal PHY selected for use -+ * @mux_handle: Internal pointer used by mdio-mux lib - */ - struct sunxi_priv_data { - struct clk *tx_clk; - struct clk *ephy_clk; -- struct regulator *regulator; -+ struct regulator *regulator_phy; -+ struct regulator *regulator_phy_io; - struct reset_control *rst_ephy; - const struct emac_variant *variant; - struct regmap_field *regmap_field; -@@ -549,12 +554,16 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) - struct sunxi_priv_data *gmac = priv; - int ret; - -- if (gmac->regulator) { -- ret = regulator_enable(gmac->regulator); -- if (ret) { -- dev_err(&pdev->dev, "Fail to enable regulator\n"); -- return ret; -- } -+ ret = regulator_enable(gmac->regulator_phy_io); -+ if (ret) { -+ dev_err(&pdev->dev, "Fail to enable PHY I/O regulator\n"); -+ return ret; -+ } -+ -+ ret = regulator_enable(gmac->regulator_phy); -+ if (ret) { -+ dev_err(&pdev->dev, "Fail to enable PHY regulator\n"); -+ goto err_disable_regulator_phy_io; - } - - ret = clk_prepare_enable(gmac->tx_clk); -@@ -574,8 +583,9 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) - err_disable_clk: - clk_disable_unprepare(gmac->tx_clk); - err_disable_regulator: -- if (gmac->regulator) -- regulator_disable(gmac->regulator); -+ regulator_disable(gmac->regulator_phy); -+err_disable_regulator_phy_io: -+ regulator_disable(gmac->regulator_phy_io); - - return ret; - } -@@ -1026,8 +1036,8 @@ static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) - - clk_disable_unprepare(gmac->tx_clk); - -- if (gmac->regulator) -- regulator_disable(gmac->regulator); -+ regulator_disable(gmac->regulator_phy); -+ regulator_disable(gmac->regulator_phy_io); - } - - static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable) -@@ -1155,12 +1165,19 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) - } - - /* Optional regulator for PHY */ -- gmac->regulator = devm_regulator_get_optional(dev, "phy"); -- if (IS_ERR(gmac->regulator)) { -- if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER) -- return -EPROBE_DEFER; -- dev_info(dev, "No regulator found\n"); -- gmac->regulator = NULL; -+ gmac->regulator_phy = devm_regulator_get(dev, "phy"); -+ if (IS_ERR(gmac->regulator_phy)) { -+ ret = PTR_ERR(gmac->regulator_phy); -+ dev_err_probe(dev, ret, "Failed to get PHY regulator\n"); -+ return ret; -+ } -+ -+ /* Optional regulator for PHY I/O pins */ -+ gmac->regulator_phy_io = devm_regulator_get(dev, "phy-io"); -+ if (IS_ERR(gmac->regulator_phy_io)) { -+ ret = PTR_ERR(gmac->regulator_phy_io); -+ dev_err_probe(dev, ret, "Failed to get PHY I/O regulator\n"); -+ return ret; - } - - /* The "GMAC clock control" register might be located in the -@@ -1285,6 +1302,16 @@ static int sun8i_dwmac_remove(struct platform_device *pdev) - return 0; - } - -+static void sun8i_dwmac_shutdown(struct platform_device *pdev) -+{ -+ struct net_device *ndev = dev_get_drvdata(&pdev->dev);; -+ struct stmmac_priv *priv = netdev_priv(ndev); -+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; -+ -+ regulator_disable(gmac->regulator_phy); -+ regulator_disable(gmac->regulator_phy_io); -+} -+ - static const struct of_device_id sun8i_dwmac_match[] = { - { .compatible = "allwinner,sun8i-h3-emac", - .data = &emac_variant_h3 }, -@@ -1305,6 +1332,7 @@ MODULE_DEVICE_TABLE(of, sun8i_dwmac_match); - static struct platform_driver sun8i_dwmac_driver = { - .probe = sun8i_dwmac_probe, - .remove = sun8i_dwmac_remove, -+ .shutdown = sun8i_dwmac_shutdown, - .driver = { - .name = "dwmac-sun8i", - .pm = &stmmac_pltfr_pm_ops, -diff --git a/drivers/nfc/nxp-nci/i2c.c b/drivers/nfc/nxp-nci/i2c.c -index 7e451c10985d..1c8e7078d64e 100644 ---- a/drivers/nfc/nxp-nci/i2c.c -+++ b/drivers/nfc/nxp-nci/i2c.c -@@ -343,6 +343,7 @@ static struct i2c_driver nxp_nci_i2c_driver = { - .name = NXP_NCI_I2C_DRIVER_NAME, - .acpi_match_table = ACPI_PTR(acpi_id), - .of_match_table = of_nxp_nci_i2c_match, -+ .probe_type = PROBE_PREFER_ASYNCHRONOUS, - }, - .probe = nxp_nci_i2c_probe, - .id_table = nxp_nci_i2c_id_table, -diff --git a/drivers/nfc/pn544/i2c.c b/drivers/nfc/pn544/i2c.c -index 4ac8cb262559..3db4f5f57dd1 100644 ---- a/drivers/nfc/pn544/i2c.c -+++ b/drivers/nfc/pn544/i2c.c -@@ -16,6 +16,7 @@ - #include - #include - #include -+#include - - #include - -@@ -59,6 +60,14 @@ MODULE_DEVICE_TABLE(acpi, pn544_hci_i2c_acpi_match); - - #define PN544_HCI_I2C_DRIVER_NAME "pn544_hci_i2c" - -+/* regulator supplies */ -+static const char * const pn544_supply_names[] = { -+ "PVDD", /* Digital Core (1.8V) supply */ -+ "VBAT", /* Analog (2.9V-5.5V) supply */ -+}; -+ -+#define PN544_NUM_SUPPLIES ARRAY_SIZE(pn544_supply_names) -+ - /* - * Exposed through the 4 most significant bytes - * from the HCI SW_VERSION first byte, a.k.a. -@@ -150,6 +159,7 @@ struct pn544_i2c_phy { - struct i2c_client *i2c_dev; - struct nfc_hci_dev *hdev; - -+ struct regulator_bulk_data supplies[PN544_NUM_SUPPLIES]; - struct gpio_desc *gpiod_en; - struct gpio_desc *gpiod_fw; - -@@ -240,9 +250,14 @@ static void pn544_hci_i2c_enable_mode(struct pn544_i2c_phy *phy, int run_mode) - static int pn544_hci_i2c_enable(void *phy_id) - { - struct pn544_i2c_phy *phy = phy_id; -+ int ret; - - pr_info("%s\n", __func__); - -+ ret = regulator_bulk_enable(PN544_NUM_SUPPLIES, phy->supplies); -+ if (ret) -+ return ret; -+ - pn544_hci_i2c_enable_mode(phy, PN544_HCI_MODE); - - phy->powered = 1; -@@ -264,6 +279,8 @@ static void pn544_hci_i2c_disable(void *phy_id) - gpiod_set_value_cansleep(phy->gpiod_en, !phy->en_polarity); - usleep_range(10000, 15000); - -+ regulator_bulk_disable(PN544_NUM_SUPPLIES, phy->supplies); -+ - phy->powered = 0; - } - -@@ -370,7 +387,7 @@ static int pn544_hci_i2c_read(struct pn544_i2c_phy *phy, struct sk_buff **skb) - - if ((len < (PN544_HCI_I2C_LLC_MIN_SIZE - 1)) || - (len > (PN544_HCI_I2C_LLC_MAX_SIZE - 1))) { -- nfc_err(&client->dev, "invalid len byte\n"); -+ nfc_err(&client->dev, "invalid len byte %hhx\n", len); - r = -EBADMSG; - goto flush; - } -@@ -873,7 +890,7 @@ static int pn544_hci_i2c_probe(struct i2c_client *client, - { - struct device *dev = &client->dev; - struct pn544_i2c_phy *phy; -- int r = 0; -+ int r = 0, i; - - dev_dbg(&client->dev, "%s\n", __func__); - dev_dbg(&client->dev, "IRQ: %d\n", client->irq); -@@ -898,6 +915,14 @@ static int pn544_hci_i2c_probe(struct i2c_client *client, - if (r) - dev_dbg(dev, "Unable to add GPIO mapping table\n"); - -+ for (i = 0; i < PN544_NUM_SUPPLIES; i++) -+ phy->supplies[i].supply = pn544_supply_names[i]; -+ -+ r = devm_regulator_bulk_get(&client->dev, PN544_NUM_SUPPLIES, -+ phy->supplies); -+ if (r) -+ return r; -+ - /* Get EN GPIO */ - phy->gpiod_en = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW); - if (IS_ERR(phy->gpiod_en)) { -diff --git a/drivers/of/base.c b/drivers/of/base.c -index 161a23631472..bb539f7fe7ec 100644 ---- a/drivers/of/base.c -+++ b/drivers/of/base.c -@@ -36,6 +36,7 @@ LIST_HEAD(aliases_lookup); - struct device_node *of_root; - EXPORT_SYMBOL(of_root); - struct device_node *of_chosen; -+EXPORT_SYMBOL(of_chosen); - struct device_node *of_aliases; - struct device_node *of_stdout; - static const char *of_stdout_options; -diff --git a/drivers/phy/allwinner/Kconfig b/drivers/phy/allwinner/Kconfig -index fb584518b2d0..e93a53139460 100644 ---- a/drivers/phy/allwinner/Kconfig -+++ b/drivers/phy/allwinner/Kconfig -@@ -12,6 +12,7 @@ config PHY_SUN4I_USB - depends on USB_SUPPORT - select GENERIC_PHY - select USB_COMMON -+ select USB_ROLE_SWITCH - help - Enable this to support the transceiver that is part of Allwinner - sunxi SoCs. -diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c -index 788dd5cdbb7d..53846d7989c3 100644 ---- a/drivers/phy/allwinner/phy-sun4i-usb.c -+++ b/drivers/phy/allwinner/phy-sun4i-usb.c -@@ -34,6 +34,7 @@ - #include - #include - #include -+#include - #include - - #define REG_ISCR 0x00 -@@ -151,6 +152,9 @@ struct sun4i_usb_phy_data { - int id_det; - int vbus_det; - struct delayed_work detect; -+ struct usb_role_switch_desc switch_desc; -+ struct usb_role_switch *role_switch; -+ int usb_role; - }; - - #define to_sun4i_usb_phy_data(phy) \ -@@ -362,6 +366,9 @@ static int sun4i_usb_phy_exit(struct phy *_phy) - - static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data) - { -+ if (data->usb_role >= 0) -+ return data->usb_role == USB_ROLE_HOST ? 0 : 1; -+ - switch (data->dr_mode) { - case USB_DR_MODE_OTG: - if (data->id_det_gpio) -@@ -378,6 +385,9 @@ static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data) - - static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data) - { -+ if (data->usb_role >= 0) -+ return data->usb_role == USB_ROLE_NONE ? 0 : 1; -+ - if (data->vbus_det_gpio) - return gpiod_get_value_cansleep(data->vbus_det_gpio); - -@@ -397,7 +407,7 @@ static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data) - - static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data) - { -- return data->vbus_det_gpio || data->vbus_power_supply; -+ return data->usb_role >= 0 || data->vbus_det_gpio || data->vbus_power_supply; - } - - static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data) -@@ -657,6 +667,24 @@ static struct phy *sun4i_usb_phy_xlate(struct device *dev, - return data->phys[args->args[0]].phy; - } - -+static int sun4i_usb_role_set(struct usb_role_switch *sw, enum usb_role role) -+{ -+ struct sun4i_usb_phy_data *data = usb_role_switch_get_drvdata(sw); -+ -+ data->usb_role = role; -+ queue_delayed_work(system_wq, &data->detect, 0); -+ -+ return 0; -+} -+ -+static enum usb_role sun4i_usb_role_get(struct usb_role_switch *sw) -+{ -+ struct sun4i_usb_phy_data *data = usb_role_switch_get_drvdata(sw); -+ int role = sun4i_usb_phy0_get_id_det(data) ? USB_ROLE_DEVICE : USB_ROLE_HOST; -+ -+ return data->usb_role >= 0 ? data->usb_role : role; -+} -+ - static int sun4i_usb_phy_remove(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; -@@ -671,6 +699,8 @@ static int sun4i_usb_phy_remove(struct platform_device *pdev) - - cancel_delayed_work_sync(&data->detect); - -+ usb_role_switch_unregister(data->role_switch); -+ - return 0; - } - -@@ -699,6 +729,8 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev) - if (!data->cfg) - return -EINVAL; - -+ data->usb_role = -1; -+ - data->base = devm_platform_ioremap_resource_byname(pdev, "phy_ctrl"); - if (IS_ERR(data->base)) - return PTR_ERR(data->base); -@@ -706,14 +738,16 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev) - data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det", - GPIOD_IN); - if (IS_ERR(data->id_det_gpio)) { -- dev_err(dev, "Couldn't request ID GPIO\n"); -+ dev_err_probe(dev, PTR_ERR(data->id_det_gpio), -+ "Couldn't request ID GPIO\n"); - return PTR_ERR(data->id_det_gpio); - } - - data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det", - GPIOD_IN); - if (IS_ERR(data->vbus_det_gpio)) { -- dev_err(dev, "Couldn't request VBUS detect GPIO\n"); -+ dev_err_probe(dev, PTR_ERR(data->vbus_det_gpio), -+ "Couldn't request VBUS detect GPIO\n"); - return PTR_ERR(data->vbus_det_gpio); - } - -@@ -721,7 +755,8 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev) - data->vbus_power_supply = devm_power_supply_get_by_phandle(dev, - "usb0_vbus_power-supply"); - if (IS_ERR(data->vbus_power_supply)) { -- dev_err(dev, "Couldn't get the VBUS power supply\n"); -+ dev_err_probe(dev, PTR_ERR(data->vbus_power_supply), -+ "Couldn't get the VBUS power supply\n"); - return PTR_ERR(data->vbus_power_supply); - } - -@@ -754,8 +789,8 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev) - phy->vbus = devm_regulator_get_optional(dev, name); - if (IS_ERR(phy->vbus)) { - if (PTR_ERR(phy->vbus) == -EPROBE_DEFER) { -- dev_err(dev, -- "Couldn't get regulator %s... Deferring probe\n", -+ dev_err_probe(dev, PTR_ERR(phy->vbus), -+ "Couldn't get regulator %s\n", - name); - return -EPROBE_DEFER; - } -@@ -770,7 +805,8 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev) - - phy->clk = devm_clk_get(dev, name); - if (IS_ERR(phy->clk)) { -- dev_err(dev, "failed to get clock %s\n", name); -+ dev_err_probe(dev, PTR_ERR(phy->clk), -+ "failed to get clock %s\n", name); - return PTR_ERR(phy->clk); - } - -@@ -852,6 +888,23 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev) - return PTR_ERR(phy_provider); - } - -+ /* setup role switcher */ -+ data->switch_desc.name = "usb0"; -+ data->switch_desc.fwnode = dev_fwnode(dev); -+ data->switch_desc.set = sun4i_usb_role_set; -+ data->switch_desc.get = sun4i_usb_role_get; -+ data->switch_desc.driver_data = data; -+ -+ /* -+ * Don't interfere with the default behavior of this driver until -+ * the consumer of the role switch uses the switch for the first time. -+ */ -+ data->role_switch = usb_role_switch_register(dev, &data->switch_desc); -+ if (IS_ERR(data->role_switch)) { -+ dev_warn(dev, "Unable to register Role Switch\n"); -+ data->role_switch = NULL; -+ } -+ - dev_dbg(dev, "successfully loaded\n"); - - return 0; -diff --git a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c -index f0bc87d654d4..d9206c66325a 100644 ---- a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c -+++ b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c -@@ -92,6 +92,8 @@ struct sun6i_dphy { - - struct phy *phy; - struct phy_configure_opts_mipi_dphy config; -+ -+ bool hw_preconfigured; - }; - - static int sun6i_dphy_init(struct phy *phy) -@@ -124,6 +126,11 @@ static int sun6i_dphy_power_on(struct phy *phy) - struct sun6i_dphy *dphy = phy_get_drvdata(phy); - u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0); - -+ if (dphy->hw_preconfigured) { -+ dphy->hw_preconfigured = false; -+ return 0; -+ } -+ - regmap_write(dphy->regs, SUN6I_DPHY_TX_CTL_REG, - SUN6I_DPHY_TX_CTL_HS_TX_CLK_CONT); - -@@ -254,11 +261,19 @@ static int sun6i_dphy_probe(struct platform_device *pdev) - struct phy_provider *phy_provider; - struct sun6i_dphy *dphy; - void __iomem *regs; -+ u32 fb_start; -+ int ret; - - dphy = devm_kzalloc(&pdev->dev, sizeof(*dphy), GFP_KERNEL); - if (!dphy) - return -ENOMEM; - -+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &fb_start); -+ if (ret == 0) { -+ /* the display pipeline is already initialized by p-boot */ -+ dphy->hw_preconfigured = true; -+ } -+ - regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(regs)) { - dev_err(&pdev->dev, "Couldn't map the DPHY encoder registers\n"); -@@ -268,13 +283,15 @@ static int sun6i_dphy_probe(struct platform_device *pdev) - dphy->regs = devm_regmap_init_mmio_clk(&pdev->dev, "bus", - regs, &sun6i_dphy_regmap_config); - if (IS_ERR(dphy->regs)) { -- dev_err(&pdev->dev, "Couldn't create the DPHY encoder regmap\n"); -+ dev_err_probe(&pdev->dev, PTR_ERR(dphy->regs), -+ "Couldn't create the DPHY encoder regmap\n"); - return PTR_ERR(dphy->regs); - } - - dphy->reset = devm_reset_control_get_shared(&pdev->dev, NULL); - if (IS_ERR(dphy->reset)) { -- dev_err(&pdev->dev, "Couldn't get our reset line\n"); -+ dev_err_probe(&pdev->dev, PTR_ERR(dphy->reset), -+ "Couldn't get our reset line\n"); - return PTR_ERR(dphy->reset); - } - -diff --git a/drivers/power/supply/axp20x_battery.c b/drivers/power/supply/axp20x_battery.c -index e84b6e4da14a..f6c849bd15e3 100644 ---- a/drivers/power/supply/axp20x_battery.c -+++ b/drivers/power/supply/axp20x_battery.c -@@ -34,6 +34,7 @@ - - #define AXP20X_PWR_STATUS_BAT_CHARGING BIT(2) - -+#define AXP20X_PWR_OP_BATT_CHARGING BIT(6) - #define AXP20X_PWR_OP_BATT_PRESENT BIT(5) - #define AXP20X_PWR_OP_BATT_ACTIVATED BIT(3) - -@@ -55,14 +56,22 @@ - - #define AXP20X_V_OFF_MASK GENMASK(2, 0) - -+#define DRVNAME "axp20x-battery-power-supply" -+ - struct axp20x_batt_ps; - -+struct axp_irq_data { -+ const char *name; -+ irq_handler_t handler; -+}; -+ - struct axp_data { - int ccc_scale; - int ccc_offset; - bool has_fg_valid; - int (*get_max_voltage)(struct axp20x_batt_ps *batt, int *val); - int (*set_max_voltage)(struct axp20x_batt_ps *batt, int val); -+ const struct axp_irq_data *irqs; - }; - - struct axp20x_batt_ps { -@@ -72,9 +81,11 @@ struct axp20x_batt_ps { - struct iio_channel *batt_chrg_i; - struct iio_channel *batt_dischrg_i; - struct iio_channel *batt_v; -+ int health; - /* Maximum constant charge current */ - unsigned int max_ccc; - const struct axp_data *data; -+ struct power_supply_battery_info batt_info; - }; - - static int axp20x_battery_get_max_voltage(struct axp20x_batt_ps *axp20x_batt, -@@ -180,11 +191,31 @@ static int axp20x_get_constant_charge_current(struct axp20x_batt_ps *axp, - return 0; - } - -+static int axp20x_get_ocv_voltage(struct axp20x_batt_ps *axp, int *val) -+{ -+ int ret; -+ unsigned int ocvh, ocvl, ocv; -+ -+ ret = regmap_read(axp->regmap, AXP288_FG_OCVH_REG, &ocvh); -+ if (ret) -+ return ret; -+ -+ ret = regmap_read(axp->regmap, AXP288_FG_OCVL_REG, &ocvl); -+ if (ret) -+ return ret; -+ -+ ocv = ocvh << 4 | (ocvl & 0xf); -+ -+ *val = ocv * 1100; -+ return 0; -+} -+ - static int axp20x_battery_get_prop(struct power_supply *psy, - enum power_supply_property psp, - union power_supply_propval *val) - { - struct axp20x_batt_ps *axp20x_batt = power_supply_get_drvdata(psy); -+ struct power_supply_battery_info *info = &axp20x_batt->batt_info; - struct iio_channel *chan; - int ret = 0, reg, val1; - -@@ -200,12 +231,12 @@ static int axp20x_battery_get_prop(struct power_supply *psy, - break; - - case POWER_SUPPLY_PROP_STATUS: -- ret = regmap_read(axp20x_batt->regmap, AXP20X_PWR_INPUT_STATUS, -+ ret = regmap_read(axp20x_batt->regmap, AXP20X_PWR_OP_MODE, - ®); - if (ret) - return ret; - -- if (reg & AXP20X_PWR_STATUS_BAT_CHARGING) { -+ if (reg & AXP20X_PWR_OP_BATT_CHARGING) { - val->intval = POWER_SUPPLY_STATUS_CHARGING; - return 0; - } -@@ -245,7 +276,7 @@ static int axp20x_battery_get_prop(struct power_supply *psy, - return 0; - } - -- val->intval = POWER_SUPPLY_HEALTH_GOOD; -+ val->intval = axp20x_batt->health; - break; - - case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: -@@ -278,6 +309,9 @@ static int axp20x_battery_get_prop(struct power_supply *psy, - val->intval *= 1000; - break; - -+ case POWER_SUPPLY_PROP_VOLTAGE_OCV: -+ return axp20x_get_ocv_voltage(axp20x_batt, &val->intval); -+ - case POWER_SUPPLY_PROP_CAPACITY: - /* When no battery is present, return capacity is 100% */ - ret = regmap_read(axp20x_batt->regmap, AXP20X_PWR_OP_MODE, -@@ -290,6 +324,24 @@ static int axp20x_battery_get_prop(struct power_supply *psy, - return 0; - } - -+ /* If we have DT OCV tables, use them. */ -+ if (info->ocv_table[0]) { -+ ret = axp20x_get_ocv_voltage(axp20x_batt, &val1); -+ if (ret) -+ return -EINVAL; -+ -+ /* -+ * For now use table that's closest to the room -+ * temperature. -+ */ -+ ret = power_supply_batinfo_ocv2cap(info, val1, 20); -+ if (ret < 0) -+ return ret; -+ -+ val->intval = ret; -+ return 0; -+ } -+ - ret = regmap_read(axp20x_batt->regmap, AXP20X_FG_RES, ®); - if (ret) - return ret; -@@ -375,6 +427,11 @@ static int axp20x_battery_set_max_voltage(struct axp20x_batt_ps *axp20x_batt, - val = AXP20X_CHRG_CTRL1_TGT_4_2V; - break; - -+ case 4350000: -+ case 4360000: -+ val = AXP20X_CHRG_CTRL1_TGT_4_36V; -+ break; -+ - default: - /* - * AXP20x max voltage can be set to 4.36V and AXP22X max voltage -@@ -483,6 +540,7 @@ static enum power_supply_property axp20x_battery_props[] = { - POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, - POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, - POWER_SUPPLY_PROP_HEALTH, -+ POWER_SUPPLY_PROP_VOLTAGE_OCV, - POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, - POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, - POWER_SUPPLY_PROP_CAPACITY, -@@ -507,11 +565,82 @@ static const struct power_supply_desc axp20x_batt_ps_desc = { - .set_property = axp20x_battery_set_prop, - }; - -+static irqreturn_t axp20x_battery_changed_irq(int irq, void *devid) -+{ -+ struct axp20x_batt_ps *axp20x_batt = devid; -+ -+ power_supply_changed(axp20x_batt->batt); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t axp20x_battery_temp_cold_irq(int irq, void *devid) -+{ -+ struct axp20x_batt_ps *axp20x_batt = devid; -+ -+ axp20x_batt->health = POWER_SUPPLY_HEALTH_COLD; -+ -+ power_supply_changed(axp20x_batt->batt); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t axp20x_battery_temp_hot_irq(int irq, void *devid) -+{ -+ struct axp20x_batt_ps *axp20x_batt = devid; -+ -+ axp20x_batt->health = POWER_SUPPLY_HEALTH_OVERHEAT; -+ -+ power_supply_changed(axp20x_batt->batt); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t axp20x_battery_temp_normal_irq(int irq, void *devid) -+{ -+ struct axp20x_batt_ps *axp20x_batt = devid; -+ -+ axp20x_batt->health = POWER_SUPPLY_HEALTH_GOOD; -+ -+ power_supply_changed(axp20x_batt->batt); -+ -+ return IRQ_HANDLED; -+} -+ -+static const struct axp_irq_data axp20x_irqs[] = { -+ { "BATT_PLUGIN", axp20x_battery_changed_irq }, -+ { "BATT_REMOVAL", axp20x_battery_changed_irq }, -+ { "BATT_HEALTH_DEAD", axp20x_battery_changed_irq }, -+ { "BATT_HEALTH_GOOD", axp20x_battery_changed_irq }, -+ { "BATT_CHARGING", axp20x_battery_changed_irq }, -+ { "BATT_CHARGING_DONE", axp20x_battery_changed_irq }, -+ {} -+}; -+ -+static const struct axp_irq_data axp813_irqs[] = { -+ { "BATT_PLUGIN", axp20x_battery_changed_irq }, -+ { "BATT_REMOVAL", axp20x_battery_changed_irq }, -+ { "BATT_HEALTH_DEAD", axp20x_battery_changed_irq }, -+ { "BATT_HEALTH_GOOD", axp20x_battery_changed_irq }, -+ { "BATT_CHARGING", axp20x_battery_changed_irq }, -+ { "BATT_CHARGING_DONE", axp20x_battery_changed_irq }, -+ { "BATT_CHG_TEMP_HIGH", axp20x_battery_temp_hot_irq }, -+ { "BATT_CHG_TEMP_HIGH_END", axp20x_battery_temp_normal_irq }, -+ { "BATT_CHG_TEMP_LOW", axp20x_battery_temp_cold_irq }, -+ { "BATT_CHG_TEMP_LOW_END", axp20x_battery_temp_normal_irq }, -+ { "BATT_ACT_TEMP_HIGH", axp20x_battery_temp_hot_irq }, -+ { "BATT_ACT_TEMP_HIGH_END", axp20x_battery_temp_normal_irq }, -+ { "BATT_ACT_TEMP_LOW", axp20x_battery_temp_cold_irq }, -+ { "BATT_ACT_TEMP_LOW_END", axp20x_battery_temp_normal_irq }, -+ {} -+}; -+ - static const struct axp_data axp209_data = { - .ccc_scale = 100000, - .ccc_offset = 300000, - .get_max_voltage = axp20x_battery_get_max_voltage, - .set_max_voltage = axp20x_battery_set_max_voltage, -+ .irqs = axp20x_irqs, - }; - - static const struct axp_data axp221_data = { -@@ -520,6 +649,7 @@ static const struct axp_data axp221_data = { - .has_fg_valid = true, - .get_max_voltage = axp22x_battery_get_max_voltage, - .set_max_voltage = axp22x_battery_set_max_voltage, -+ .irqs = axp20x_irqs, - }; - - static const struct axp_data axp813_data = { -@@ -528,6 +658,7 @@ static const struct axp_data axp813_data = { - .has_fg_valid = true, - .get_max_voltage = axp813_battery_get_max_voltage, - .set_max_voltage = axp20x_battery_set_max_voltage, -+ .irqs = axp813_irqs, - }; - - static const struct of_device_id axp20x_battery_ps_id[] = { -@@ -544,12 +675,31 @@ static const struct of_device_id axp20x_battery_ps_id[] = { - }; - MODULE_DEVICE_TABLE(of, axp20x_battery_ps_id); - -+static int axp20x_battery_update_ocv_table(struct axp20x_batt_ps *axp20x_batt) -+{ -+ struct power_supply_battery_ocv_table *tab; -+ struct power_supply_battery_info *info; -+ int tab_size; -+ -+ info = &axp20x_batt->batt_info; -+ -+ tab = power_supply_find_ocv2cap_table(info, 20, &tab_size); -+ if (tab) { -+ /*XXX: program values into the PMIC */ -+ } -+ -+ return 0; -+} -+ - static int axp20x_power_probe(struct platform_device *pdev) - { -+ struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); - struct axp20x_batt_ps *axp20x_batt; - struct power_supply_config psy_cfg = {}; -- struct power_supply_battery_info info; - struct device *dev = &pdev->dev; -+ struct power_supply_battery_info *info; -+ const struct axp_irq_data *irq_data; -+ int irq, ret; - - if (!of_device_is_available(pdev->dev.of_node)) - return -ENODEV; -@@ -560,6 +710,7 @@ static int axp20x_power_probe(struct platform_device *pdev) - return -ENOMEM; - - axp20x_batt->dev = &pdev->dev; -+ info = &axp20x_batt->batt_info; - - axp20x_batt->batt_v = devm_iio_channel_get(&pdev->dev, "batt_v"); - if (IS_ERR(axp20x_batt->batt_v)) { -@@ -601,9 +752,11 @@ static int axp20x_power_probe(struct platform_device *pdev) - return PTR_ERR(axp20x_batt->batt); - } - -- if (!power_supply_get_battery_info(axp20x_batt->batt, &info)) { -- int vmin = info.voltage_min_design_uv; -- int ccc = info.constant_charge_current_max_ua; -+ axp20x_batt->health = POWER_SUPPLY_HEALTH_GOOD; -+ -+ if (!power_supply_get_battery_info(axp20x_batt->batt, info)) { -+ int vmin = info->voltage_min_design_uv; -+ int ccc = info->constant_charge_current_max_ua; - - if (vmin > 0 && axp20x_set_voltage_min_design(axp20x_batt, - vmin)) -@@ -621,6 +774,31 @@ static int axp20x_power_probe(struct platform_device *pdev) - axp20x_batt->max_ccc = ccc; - axp20x_set_constant_charge_current(axp20x_batt, ccc); - } -+ -+ if (axp20x_battery_update_ocv_table(axp20x_batt)) -+ dev_err(&pdev->dev, -+ "couldn't configure ocv table\n"); -+ -+ /*XXX: maybe also set initial RDC */ -+ } -+ -+ /* Request irqs after registering, as irqs may trigger immediately */ -+ for (irq_data = axp20x_batt->data->irqs; irq_data->name; irq_data++) { -+ irq = platform_get_irq_byname(pdev, irq_data->name); -+ if (irq < 0) { -+ dev_err(&pdev->dev, "No IRQ for %s: %d\n", -+ irq_data->name, irq); -+ return irq; -+ } -+ irq = regmap_irq_get_virq(axp20x->regmap_irqc, irq); -+ ret = devm_request_any_context_irq(&pdev->dev, irq, -+ irq_data->handler, 0, -+ DRVNAME, axp20x_batt); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "Error requesting %s IRQ: %d\n", -+ irq_data->name, ret); -+ return ret; -+ } - } - - /* -@@ -630,13 +808,66 @@ static int axp20x_power_probe(struct platform_device *pdev) - axp20x_get_constant_charge_current(axp20x_batt, - &axp20x_batt->max_ccc); - -+ if (of_machine_is_compatible("pine64,pinephone-1.2") > 0 || -+ of_machine_is_compatible("pine64,pinephone-1.1") > 0 || -+ of_machine_is_compatible("pine64,pinephone-1.0") > 0) { -+ // 3kOhm NTC inside PinePhone batery -+ // --------------------------------- -+ // -+ // Charging: -+ // 0 - 15 °C: Max 0.2C CC to 4.35V : 9750 Ohm - 4710 Ohm -+ // 15 - 50 °C: Max 0.5C CC to 4.35V : 4710 Ohm - 1080 Ohm -+ // -+ // Discharging: -+ // -10 °C : 16500 Ohm -+ // 55 °C : 896 Ohm -+ // enable TS pin input to ADC -+ -+ dev_info(dev, "Configuring battery thermal regulation for Pinephone\n"); -+ -+ ret = regmap_update_bits(axp20x_batt->regmap, 0x82, BIT(0), BIT(0)); -+ if (ret) -+ goto warn_bat; -+ -+ // safety thresholds: -+ -+ // voltage = reg_val * 12800 uV (range is 0 - 3.264V) -+ ret = regmap_write(axp20x_batt->regmap, 0x38, 9750 * 80 / 12800); // V_LTF-charge -+ if (ret) -+ goto warn_bat; -+ -+ ret = regmap_write(axp20x_batt->regmap, 0x39, 1080 * 80 / 12800); // V_HTF-charge -+ if (ret) -+ goto warn_bat; -+ -+ ret = regmap_write(axp20x_batt->regmap, 0x3c, 16500 * 80 / 12800); // V_LTF-work -+ if (ret) -+ goto warn_bat; -+ -+ ret = regmap_write(axp20x_batt->regmap, 0x3d, 896 * 80 / 12800); // V_HTF-work -+ if (ret) -+ goto warn_bat; -+ -+ // There is a hysteresis of 460.8 mV(refer to TS pin voltage) for UTP -+ // threshold, and there is a hysteresis of 57.6 mV for OTP threshold. -+ -+ // use TS pin only when charging, make it affect the charger, I = 80uA -+ ret = regmap_update_bits(axp20x_batt->regmap, 0x84, 0x37, 0x31); -+ if (ret) -+ goto warn_bat; -+ } -+ -+ return 0; -+ -+warn_bat: -+ dev_err(dev, "Failed to configure battery thermal regulation\n"); - return 0; - } - - static struct platform_driver axp20x_batt_driver = { - .probe = axp20x_power_probe, - .driver = { -- .name = "axp20x-battery-power-supply", -+ .name = DRVNAME, - .of_match_table = axp20x_battery_ps_id, - }, - }; -diff --git a/drivers/power/supply/axp20x_usb_power.c b/drivers/power/supply/axp20x_usb_power.c -index 8933ae26c3d6..54ac9a511375 100644 ---- a/drivers/power/supply/axp20x_usb_power.c -+++ b/drivers/power/supply/axp20x_usb_power.c -@@ -51,6 +51,13 @@ - #define AXP20X_ADC_EN1_VBUS_VOLT BIT(3) - - #define AXP20X_VBUS_MON_VBUS_VALID BIT(3) -+#define AXP813_CHRG_CTRL3_VBUS_CUR_LIMIT_MASK GENMASK(7, 4) -+#define AXP813_CHRG_CTRL3_VBUS_CUR_LIMIT_OFFSET 4 -+ -+#define AXP813_BC_RESULT_MASK GENMASK(7, 5) -+#define AXP813_BC_RESULT_SDP (1 << 5) -+#define AXP813_BC_RESULT_CDP (2 << 5) -+#define AXP813_BC_RESULT_DCP (3 << 5) - - #define AXP813_BC_EN BIT(0) - -@@ -174,6 +181,110 @@ static int axp813_get_current_max(struct axp20x_usb_power *power, int *val) - return 0; - } - -+static int -+axp813_usb_power_get_input_current_limit(struct axp20x_usb_power *power, -+ int *intval) -+{ -+ unsigned int v; -+ int ret = regmap_read(power->regmap, AXP813_CHRG_CTRL3, &v); -+ -+ if (ret) -+ return ret; -+ -+ v &= AXP813_CHRG_CTRL3_VBUS_CUR_LIMIT_MASK; -+ v >>= AXP813_CHRG_CTRL3_VBUS_CUR_LIMIT_OFFSET; -+ -+ switch (v) { -+ case 0: -+ *intval = 100000; -+ return 0; -+ case 1: -+ *intval = 500000; -+ return 0; -+ case 2: -+ *intval = 900000; -+ return 0; -+ case 3: -+ *intval = 1500000; -+ return 0; -+ case 4: -+ *intval = 2000000; -+ return 0; -+ case 5: -+ *intval = 2500000; -+ return 0; -+ case 6: -+ *intval = 3000000; -+ return 0; -+ case 7: -+ *intval = 3500000; -+ return 0; -+ default: -+ *intval = 4000000; -+ return 0; -+ } -+} -+ -+static int -+axp813_get_usb_bc_enabled(struct axp20x_usb_power *power, int *intval) -+{ -+ unsigned int reg; -+ int ret; -+ -+ ret = regmap_read(power->regmap, AXP288_BC_GLOBAL, ®); -+ if (ret) -+ return ret; -+ -+ *intval = !!(reg & AXP813_BC_EN); -+ return 0; -+} -+ -+static enum power_supply_usb_type axp813_usb_types[] = { -+ POWER_SUPPLY_USB_TYPE_PD, -+ POWER_SUPPLY_USB_TYPE_SDP, -+ POWER_SUPPLY_USB_TYPE_DCP, -+ POWER_SUPPLY_USB_TYPE_CDP, -+ POWER_SUPPLY_USB_TYPE_UNKNOWN, -+}; -+ -+static int axp813_get_usb_type(struct axp20x_usb_power *power, -+ union power_supply_propval *val) -+{ -+ unsigned int reg; -+ int ret; -+ -+ ret = regmap_read(power->regmap, AXP288_BC_GLOBAL, ®); -+ if (ret) -+ return ret; -+ -+ if (!(reg & AXP813_BC_EN)) { -+ val->intval = POWER_SUPPLY_USB_TYPE_PD; -+ return 0; -+ } -+ -+ ret = regmap_read(power->regmap, AXP288_BC_DET_STAT, ®); -+ if (ret) -+ return ret; -+ -+ switch (reg & AXP813_BC_RESULT_MASK) { -+ case AXP813_BC_RESULT_SDP: -+ val->intval = POWER_SUPPLY_USB_TYPE_SDP; -+ break; -+ case AXP813_BC_RESULT_CDP: -+ val->intval = POWER_SUPPLY_USB_TYPE_CDP; -+ break; -+ case AXP813_BC_RESULT_DCP: -+ val->intval = POWER_SUPPLY_USB_TYPE_DCP; -+ break; -+ default: -+ val->intval = POWER_SUPPLY_USB_TYPE_UNKNOWN; -+ break; -+ } -+ -+ return 0; -+} -+ -+ - static int axp20x_usb_power_get_property(struct power_supply *psy, - enum power_supply_property psp, union power_supply_propval *val) - { -@@ -212,8 +323,6 @@ static int axp20x_usb_power_get_property(struct power_supply *psy, - val->intval = ret * 1700; /* 1 step = 1.7 mV */ - return 0; - case POWER_SUPPLY_PROP_CURRENT_MAX: -- if (power->axp20x_id == AXP813_ID) -- return axp813_get_current_max(power, &val->intval); - return axp20x_get_current_max(power, &val->intval); - case POWER_SUPPLY_PROP_CURRENT_NOW: - if (IS_ENABLED(CONFIG_AXP20X_ADC)) { -@@ -272,6 +381,30 @@ static int axp20x_usb_power_get_property(struct power_supply *psy, - case POWER_SUPPLY_PROP_ONLINE: - val->intval = !!(input & AXP20X_PWR_STATUS_VBUS_USED); - break; -+ -+ case POWER_SUPPLY_PROP_USB_TYPE: -+ if (power->axp20x_id == AXP813_ID) -+ return axp813_get_usb_type(power, val); -+ -+ return -EINVAL; -+ -+ case POWER_SUPPLY_PROP_USB_BC_ENABLED: -+ if (power->axp20x_id == AXP813_ID) -+ return axp813_get_usb_bc_enabled(power, &val->intval); -+ -+ return -EINVAL; -+ -+ case POWER_SUPPLY_PROP_USB_DCP_INPUT_CURRENT_LIMIT: -+ if (power->axp20x_id == AXP813_ID) -+ return axp813_get_current_max(power, &val->intval); -+ -+ return -EINVAL; -+ -+ case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: -+ if (power->axp20x_id == AXP813_ID) -+ return axp813_usb_power_get_input_current_limit(power, -+ &val->intval); -+ /* fallthrough */ - default: - return -EINVAL; - } -@@ -315,6 +448,37 @@ static int axp20x_usb_power_set_voltage_min(struct axp20x_usb_power *power, - return -EINVAL; - } - -+static const unsigned axp813_input_current_limits_table[] = { -+ 100000, -+ 500000, -+ 900000, -+ 1500000, -+ 2000000, -+ 2500000, -+ 3000000, -+ 3500000, -+ 4000000, -+}; -+ -+static int -+axp813_usb_power_set_input_current_limit(struct axp20x_usb_power *power, -+ int intval) -+{ -+ unsigned int reg; -+ -+ if (intval < 100000) -+ return -EINVAL; -+ -+ for (reg = ARRAY_SIZE(axp813_input_current_limits_table) - 1; reg > 0; reg--) -+ if (intval >= axp813_input_current_limits_table[reg]) -+ break; -+ -+ return regmap_update_bits(power->regmap, -+ AXP813_CHRG_CTRL3, -+ AXP813_CHRG_CTRL3_VBUS_CUR_LIMIT_MASK, -+ reg << AXP813_CHRG_CTRL3_VBUS_CUR_LIMIT_OFFSET); -+} -+ - static int axp813_usb_power_set_current_max(struct axp20x_usb_power *power, - int intval) - { -@@ -363,6 +527,14 @@ static int axp20x_usb_power_set_current_max(struct axp20x_usb_power *power, - return -EINVAL; - } - -+static int -+axp813_set_usb_bc_enabled(struct axp20x_usb_power *power, int val) -+{ -+ return regmap_update_bits(power->regmap, AXP288_BC_GLOBAL, -+ AXP813_BC_EN, -+ val ? AXP813_BC_EN : 0); -+} -+ - static int axp20x_usb_power_set_property(struct power_supply *psy, - enum power_supply_property psp, - const union power_supply_propval *val) -@@ -379,11 +551,26 @@ static int axp20x_usb_power_set_property(struct power_supply *psy, - return axp20x_usb_power_set_voltage_min(power, val->intval); - - case POWER_SUPPLY_PROP_CURRENT_MAX: -+ return axp20x_usb_power_set_current_max(power, val->intval); -+ -+ case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: -+ if (power->axp20x_id == AXP813_ID) -+ return axp813_usb_power_set_input_current_limit(power, -+ val->intval); -+ return -EINVAL; -+ -+ case POWER_SUPPLY_PROP_USB_BC_ENABLED: -+ if (power->axp20x_id == AXP813_ID) -+ return axp813_set_usb_bc_enabled(power, val->intval); -+ -+ return -EINVAL; -+ -+ case POWER_SUPPLY_PROP_USB_DCP_INPUT_CURRENT_LIMIT: - if (power->axp20x_id == AXP813_ID) - return axp813_usb_power_set_current_max(power, - val->intval); -- return axp20x_usb_power_set_current_max(power, val->intval); - -+ return -EINVAL; - default: - return -EINVAL; - } -@@ -407,7 +594,10 @@ static int axp20x_usb_power_prop_writeable(struct power_supply *psy, - return power->axp20x_id == AXP813_ID; - - return psp == POWER_SUPPLY_PROP_VOLTAGE_MIN || -- psp == POWER_SUPPLY_PROP_CURRENT_MAX; -+ psp == POWER_SUPPLY_PROP_CURRENT_MAX || -+ psp == POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT || -+ psp == POWER_SUPPLY_PROP_USB_BC_ENABLED || -+ psp == POWER_SUPPLY_PROP_USB_DCP_INPUT_CURRENT_LIMIT; - } - - static enum power_supply_property axp20x_usb_power_properties[] = { -@@ -426,6 +616,18 @@ static enum power_supply_property axp22x_usb_power_properties[] = { - POWER_SUPPLY_PROP_ONLINE, - POWER_SUPPLY_PROP_VOLTAGE_MIN, - POWER_SUPPLY_PROP_CURRENT_MAX, -+ POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, -+}; -+ -+static enum power_supply_property axp813_usb_power_properties[] = { -+ POWER_SUPPLY_PROP_HEALTH, -+ POWER_SUPPLY_PROP_PRESENT, -+ POWER_SUPPLY_PROP_ONLINE, -+ POWER_SUPPLY_PROP_VOLTAGE_MIN, -+ POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, -+ POWER_SUPPLY_PROP_USB_BC_ENABLED, -+ POWER_SUPPLY_PROP_USB_DCP_INPUT_CURRENT_LIMIT, -+ POWER_SUPPLY_PROP_USB_TYPE, - }; - - static const struct power_supply_desc axp20x_usb_power_desc = { -@@ -448,6 +650,18 @@ static const struct power_supply_desc axp22x_usb_power_desc = { - .set_property = axp20x_usb_power_set_property, - }; - -+static const struct power_supply_desc axp813_usb_power_desc = { -+ .name = "axp20x-usb", -+ .type = POWER_SUPPLY_TYPE_USB, -+ .properties = axp813_usb_power_properties, -+ .num_properties = ARRAY_SIZE(axp813_usb_power_properties), -+ .property_is_writeable = axp20x_usb_power_prop_writeable, -+ .get_property = axp20x_usb_power_get_property, -+ .set_property = axp20x_usb_power_set_property, -+ .usb_types = axp813_usb_types, -+ .num_usb_types = ARRAY_SIZE(axp813_usb_types), -+}; -+ - static const char * const axp20x_irq_names[] = { - "VBUS_PLUGIN", - "VBUS_REMOVAL", -@@ -460,6 +674,13 @@ static const char * const axp22x_irq_names[] = { - "VBUS_REMOVAL", - }; - -+static const char * const axp813_irq_names[] = { -+ "VBUS_PLUGIN", -+ "VBUS_REMOVAL", -+ "BC_USB_CHNG", -+ "MV_CHNG", -+}; -+ - struct axp_data { - const struct power_supply_desc *power_desc; - const char * const *irq_names; -@@ -489,9 +710,9 @@ static const struct axp_data axp223_data = { - }; - - static const struct axp_data axp813_data = { -- .power_desc = &axp22x_usb_power_desc, -- .irq_names = axp22x_irq_names, -- .num_irq_names = ARRAY_SIZE(axp22x_irq_names), -+ .power_desc = &axp813_usb_power_desc, -+ .irq_names = axp813_irq_names, -+ .num_irq_names = ARRAY_SIZE(axp813_irq_names), - .axp20x_id = AXP813_ID, - }; - -@@ -618,6 +839,18 @@ static int axp20x_usb_power_probe(struct platform_device *pdev) - AXP813_BC_EN, AXP813_BC_EN); - } - -+ /*TODO: Re-work this into a supply property with OF based default value */ -+ if (of_machine_is_compatible("pine64,pinephone-1.2") > 0 || -+ of_machine_is_compatible("pine64,pinephone-1.1") > 0 || -+ of_machine_is_compatible("pine64,pinephone-1.0") > 0) { -+ -+ dev_info(&pdev->dev, "Increasing Vbus hold voltage to 4.5V\n"); -+ -+ ret = regmap_update_bits(axp20x->regmap, 0x30, 0x7 << 3, 0x5 << 3); -+ if (ret) -+ return ret; -+ } -+ - psy_cfg.of_node = pdev->dev.of_node; - psy_cfg.drv_data = power; - -diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c -index 0146f1bfc29b..7f2a4e8c8bbd 100644 ---- a/drivers/power/supply/cw2015_battery.c -+++ b/drivers/power/supply/cw2015_battery.c -@@ -673,7 +673,8 @@ static int cw_bat_probe(struct i2c_client *client) - &cw2015_bat_desc, - &psy_cfg); - if (IS_ERR(cw_bat->rk_bat)) { -- dev_err(cw_bat->dev, "Failed to register power supply\n"); -+ if (PTR_ERR(cw_bat->rk_bat) != -EPROBE_DEFER) -+ dev_err(cw_bat->dev, "Failed to register power supply\n"); - return PTR_ERR(cw_bat->rk_bat); - } - -diff --git a/drivers/power/supply/power_supply_core.c b/drivers/power/supply/power_supply_core.c -index 38e3aa642131..50071bedbe72 100644 ---- a/drivers/power/supply/power_supply_core.c -+++ b/drivers/power/supply/power_supply_core.c -@@ -1143,7 +1143,7 @@ __power_supply_register(struct device *parent, - - rc = power_supply_check_supplies(psy); - if (rc) { -- dev_info(dev, "Not all required supplies found, defer probe\n"); -+ //dev_info(dev, "Not all required supplies found, defer probe\n"); - goto check_supplies_failed; - } - -diff --git a/drivers/power/supply/power_supply_sysfs.c b/drivers/power/supply/power_supply_sysfs.c -index 92dd63171193..cf5da57d7d7b 100644 ---- a/drivers/power/supply/power_supply_sysfs.c -+++ b/drivers/power/supply/power_supply_sysfs.c -@@ -199,6 +199,8 @@ static struct power_supply_attr power_supply_attrs[] = { - POWER_SUPPLY_ATTR(TIME_TO_FULL_NOW), - POWER_SUPPLY_ATTR(TIME_TO_FULL_AVG), - POWER_SUPPLY_ENUM_ATTR(TYPE), -+ POWER_SUPPLY_ATTR(USB_BC_ENABLED), -+ POWER_SUPPLY_ATTR(USB_DCP_INPUT_CURRENT_LIMIT), - POWER_SUPPLY_ATTR(USB_TYPE), - POWER_SUPPLY_ENUM_ATTR(SCOPE), - POWER_SUPPLY_ATTR(PRECHARGE_CURRENT), -diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c -index ce5c4fc8da6f..75a07d4e3fbf 100644 ---- a/drivers/pwm/pwm-sun4i.c -+++ b/drivers/pwm/pwm-sun4i.c -@@ -89,7 +89,6 @@ struct sun4i_pwm_chip { - void __iomem *base; - spinlock_t ctrl_lock; - const struct sun4i_pwm_data *data; -- unsigned long next_period[2]; - }; - - static inline struct sun4i_pwm_chip *to_sun4i_pwm_chip(struct pwm_chip *chip) -@@ -228,6 +227,20 @@ static int sun4i_pwm_calculate(struct sun4i_pwm_chip *sun4i_pwm, - return 0; - } - -+static void sun4i_pwm_wait(unsigned long next_period) { -+ unsigned int delay_us; -+ unsigned long now; -+ -+ now = jiffies; -+ if (time_before(now, next_period)) { -+ delay_us = jiffies_to_usecs(next_period - now); -+ if ((delay_us / 500) > MAX_UDELAY_MS) -+ msleep(delay_us / 1000 + 1); -+ else -+ usleep_range(delay_us, delay_us * 2); -+ } -+} -+ - static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - const struct pwm_state *state) - { -@@ -235,8 +248,8 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - struct pwm_state cstate; - u32 ctrl, duty = 0, period = 0, val; - int ret; -- unsigned int delay_us, prescaler = 0; -- unsigned long now; -+ unsigned int prescaler = 0; -+ unsigned long next_period; - bool bypass; - - pwm_get_state(pwm, &cstate); -@@ -284,8 +297,7 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - - val = (duty & PWM_DTY_MASK) | PWM_PRD(period); - sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm)); -- sun4i_pwm->next_period[pwm->hwpwm] = jiffies + -- nsecs_to_jiffies(cstate.period + 1000); -+ next_period = jiffies + nsecs_to_jiffies(cstate.period + 1000); - - if (state->polarity != PWM_POLARITY_NORMAL) - ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm); -@@ -305,15 +317,7 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - return 0; - - /* We need a full period to elapse before disabling the channel. */ -- now = jiffies; -- if (time_before(now, sun4i_pwm->next_period[pwm->hwpwm])) { -- delay_us = jiffies_to_usecs(sun4i_pwm->next_period[pwm->hwpwm] - -- now); -- if ((delay_us / 500) > MAX_UDELAY_MS) -- msleep(delay_us / 1000 + 1); -- else -- usleep_range(delay_us, delay_us * 2); -- } -+ sun4i_pwm_wait(next_period); - - spin_lock(&sun4i_pwm->ctrl_lock); - ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); -diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig -index 5abdd29fb9f3..f3a7299633cc 100644 ---- a/drivers/regulator/Kconfig -+++ b/drivers/regulator/Kconfig -@@ -56,6 +56,15 @@ config REGULATOR_USERSPACE_CONSUMER - - If unsure, say no. - -+config REGULATOR_USERSPACE_CONSUMER_OF -+ tristate "Userspace regulator consumer support (OF)" -+ help -+ There are some classes of devices that are controlled entirely -+ from user space. Userspace consumer driver provides ability to -+ control power supplies for such devices. -+ -+ If unsure, say no. -+ - config REGULATOR_88PG86X - tristate "Marvell 88PG86X voltage regulators" - depends on I2C -@@ -1317,5 +1326,13 @@ config REGULATOR_QCOM_LABIBB - boost regulator and IBB can be used as a negative boost regulator - for LCD display panel. - -+config REGULATOR_TP65185X -+ tristate "eInk display regulator tp65185x" -+ depends on I2C -+ select REGMAP_I2C -+ help -+ This driver provides support for the voltage regulators for -+ eInk displays on various e-book readers. -+ - endif - -diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile -index 680e539f6579..b2aaee8fe55f 100644 ---- a/drivers/regulator/Makefile -+++ b/drivers/regulator/Makefile -@@ -9,6 +9,7 @@ obj-$(CONFIG_OF) += of_regulator.o - obj-$(CONFIG_REGULATOR_FIXED_VOLTAGE) += fixed.o - obj-$(CONFIG_REGULATOR_VIRTUAL_CONSUMER) += virtual.o - obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o -+obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER_OF) += userspace-consumer-of.o - - obj-$(CONFIG_REGULATOR_88PG86X) += 88pg86x.o - obj-$(CONFIG_REGULATOR_88PM800) += 88pm800-regulator.o -@@ -160,5 +161,6 @@ obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o - obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o - obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o - obj-$(CONFIG_REGULATOR_WM8994) += wm8994-regulator.o -+obj-$(CONFIG_REGULATOR_TP65185X) += tp65185x.o - - ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG -diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c -index d260c442b788..645edd9de36d 100644 ---- a/drivers/regulator/axp20x-regulator.c -+++ b/drivers/regulator/axp20x-regulator.c -@@ -93,6 +93,8 @@ - #define AXP22X_WORKMODE_DCDCX_MASK(x) BIT_MASK(x) - - #define AXP22X_MISC_N_VBUSEN_FUNC BIT(4) -+#define AXP22X_MISC_16S_RESET_FUNC BIT(3) -+#define AXP22X_MISC_OTP BIT(2) - - #define AXP22X_DCDC1_V_OUT_MASK GENMASK(4, 0) - #define AXP22X_DCDC2_V_OUT_MASK GENMASK(5, 0) -@@ -1344,19 +1346,56 @@ static int axp20x_regulator_probe(struct platform_device *pdev) - &dcdc5_name); - } - -+ if (!drivevbus && -+ of_property_read_bool(pdev->dev.parent->of_node, "x-powers,sense-vbus-en")) { -+ /* make N_VBUSEN an input */ -+ regmap_update_bits(axp20x->regmap, AXP20X_OVER_TMP, -+ AXP22X_MISC_N_VBUSEN_FUNC, -+ AXP22X_MISC_N_VBUSEN_FUNC); -+ } -+ - if (drivevbus) { -+ struct regulator_desc *new_desc; -+ bool drivevbus_vin = false; -+ struct device_node *nr, *nd; -+ -+ nr = of_get_child_by_name(pdev->dev.parent->of_node, "regulators"); -+ if (nr) { -+ nd = of_get_child_by_name(nr, "drivevbus"); -+ if (nd) { -+ drivevbus_vin = !!of_find_property(nd, "vin-supply", NULL); -+ of_node_put(nd); -+ } -+ -+ of_node_put(nr); -+ } -+ -+ new_desc = devm_kzalloc(&pdev->dev, sizeof(*new_desc), GFP_KERNEL); -+ if (!new_desc) -+ return -ENOMEM; -+ -+ *new_desc = axp22x_drivevbus_regulator; -+ -+ if (drivevbus_vin) { -+ new_desc->supply_name = "vin"; -+ dev_info(&pdev->dev, "drivevbus has vin\n"); -+ } -+ - /* Change N_VBUSEN sense pin to DRIVEVBUS output pin */ - regmap_update_bits(axp20x->regmap, AXP20X_OVER_TMP, - AXP22X_MISC_N_VBUSEN_FUNC, 0); -- rdev = devm_regulator_register(&pdev->dev, -- &axp22x_drivevbus_regulator, -- &config); -+ rdev = devm_regulator_register(&pdev->dev, new_desc, &config); - if (IS_ERR(rdev)) { - dev_err(&pdev->dev, "Failed to register drivevbus\n"); - return PTR_ERR(rdev); - } - } - -+ // enable 16s power-on reset and over-temperature protection -+ regmap_update_bits(axp20x->regmap, AXP20X_OVER_TMP, -+ AXP22X_MISC_16S_RESET_FUNC | AXP22X_MISC_OTP, -+ AXP22X_MISC_16S_RESET_FUNC | AXP22X_MISC_OTP); -+ - return 0; - } - -diff --git a/drivers/regulator/tp65185x.c b/drivers/regulator/tp65185x.c -new file mode 100644 -index 000000000000..773a6b9fe9e4 ---- /dev/null -+++ b/drivers/regulator/tp65185x.c -@@ -0,0 +1,549 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+// -+// Regulator device driver for tp65185x (eInk panel regulator) -+// -+// Copyright (C) 2019 OndÅ™ej Jirman -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define REG_TMST_VALUE 0x00 -+#define REG_ENABLE 0x01 -+#define REG_VADJ 0x02 -+#define REG_VCOM1 0x03 -+#define REG_VCOM2 0x04 -+#define REG_INT_EN1 0x05 -+#define REG_INT_EN2 0x06 -+#define REG_INT1 0x07 -+#define REG_INT2 0x08 -+#define REG_UPSEQ0 0x09 -+#define REG_UPSEQ1 0x0A -+#define REG_DWNSEQ0 0x0B -+#define REG_DWNSEQ1 0x0C -+#define REG_TMST1 0x0D -+#define REG_TMST2 0x0E -+#define REG_PG 0x0F -+#define REG_REVID 0x10 -+ -+#define REG_TMST1_READ_THERM 0x80 -+#define REG_TMST1_CONV_END 0x20 -+ -+struct tp65185x { -+ struct device* dev; -+ struct gpio_desc* wakeup_gpio; -+ struct gpio_desc* vcom_gpio; -+ struct gpio_desc* powerup_gpio; -+ struct gpio_desc* powergood_gpio; -+ struct regmap *regmap; -+ bool is_enabled; -+ struct mutex wakeup_mutex; -+ int wake_refs; -+ int vcom; -+}; -+ -+static const struct regmap_config tp65185x_regmap_config = { -+ .reg_bits = 8, -+ .val_bits = 8, -+ .max_register = 0x10, -+ .cache_type = REGCACHE_NONE, -+}; -+ -+struct voltage_rail { -+ const char* name; -+ int bit; -+ int bit_en; -+}; -+ -+static const struct voltage_rail rails[] = { -+ { "VB", 7, -1 }, -+ { "VDDH", 6, 3 }, -+ { "VN", 5, -1 }, -+ { "VPOS", 4, 2 }, -+ { "VEE", 3, 1 }, -+ { "VNEG", 1, 0 }, -+ { "VCOM", -1, 4 }, -+ { "V3P3", -1, 5 }, -+}; -+ -+static int apply_voltage(struct tp65185x *tp, int vcom) -+{ -+ int ret; -+ -+ ret = regmap_write(tp->regmap, REG_VCOM1, vcom & 0xff); -+ if (ret) -+ return ret; -+ -+ return regmap_write(tp->regmap, REG_VCOM2, (vcom >> 8) & 1); -+} -+ -+static int set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, -+ unsigned *selector) -+{ -+ struct tp65185x* tp = rdev_get_drvdata(rdev); -+ unsigned int vcom = min_uV / 10000; -+ -+ if (vcom > 511 || min_uV < 0) -+ return -EINVAL; -+ -+ tp->vcom = vcom; -+ -+ // setup VCOM -+ -+ if (!tp->is_enabled) -+ return 0; -+ -+ return apply_voltage(tp, vcom); -+} -+ -+static int get_voltage(struct regulator_dev *rdev) -+{ -+ struct tp65185x* tp = rdev_get_drvdata(rdev); -+ unsigned int lsb, msb; -+ int ret; -+ -+ if (tp->is_enabled) { -+ ret = regmap_read(rdev->regmap, REG_VCOM1, &lsb); -+ if (ret) -+ return ret; -+ -+ ret = regmap_read(rdev->regmap, REG_VCOM2, &msb); -+ if (ret) -+ return ret; -+ -+ return (lsb | ((msb & 1) << 8)) * 10000; -+ } -+ -+ return tp->vcom * 10000; -+} -+ -+#ifdef DEBUG -+static int show_power_status(struct tp65185x* tp, const char* state) -+{ -+ unsigned int reg; -+ int i, ret; -+ -+ ret = regmap_read(tp->regmap, REG_PG, ®); -+ if (ret) -+ return ret; -+ -+ dev_warn(tp->dev, "%s:\n", state); -+ -+ dev_warn(tp->dev, " voltage rail power good:\n"); -+ for (i = 0; i < ARRAY_SIZE(rails); i++) -+ if (rails[i].bit >= 0) -+ dev_warn(tp->dev, " %s %s\n", rails[i].name, -+ reg & BIT(rails[i].bit) ? "good" : "fail"); -+ -+ ret = regmap_read(tp->regmap, REG_ENABLE, ®); -+ if (ret) -+ return ret; -+ -+ dev_warn(tp->dev, " voltage rail enable status:\n"); -+ for (i = 0; i < ARRAY_SIZE(rails); i++) -+ if (rails[i].bit_en >= 0) -+ dev_warn(tp->dev, " %s %s\n", rails[i].name, -+ reg & BIT(rails[i].bit_en) -+ ? "enabled" : "disabled"); -+ -+ return 0; -+} -+#else -+static int show_power_status(struct tp65185x* tp, const char* state) -+{ -+ return 0; -+} -+#endif -+ -+static int show_power_bad(struct tp65185x* tp) -+{ -+ unsigned int reg; -+ int i, ret; -+ -+ ret = regmap_read(tp->regmap, REG_PG, ®); -+ if (ret) -+ return ret; -+ -+ dev_warn(tp->dev, "Voltage rail failures:\n"); -+ for (i = 0; i < ARRAY_SIZE(rails); i++) -+ if (rails[i].bit >= 0 && !(reg & BIT(rails[i].bit))) -+ dev_warn(tp->dev, " %s failed\n", rails[i].name); -+ -+ return 0; -+} -+ -+static int wait_for_power_good(struct tp65185x *tp) -+{ -+ int ret, loops = 10; -+ -+ // wait for power good -+ while (loops-- > 0) { -+ ret = gpiod_get_value(tp->powergood_gpio); -+ if (ret < 0) -+ return ret; -+ -+ if (ret) -+ return 0; -+ -+ msleep(5); -+ } -+ -+ show_power_bad(tp); -+ return -ETIMEDOUT; -+} -+ -+static void wakeup_regulator(struct tp65185x *tp, int wake) -+{ -+ mutex_lock(&tp->wakeup_mutex); -+ -+ if (wake) { -+ tp->wake_refs++; -+ if (tp->wake_refs > 1) -+ goto out_unlock; -+ -+ gpiod_set_value(tp->wakeup_gpio, 1); -+ usleep_range(3000, 4000); -+ } else { -+ tp->wake_refs--; -+ if (tp->wake_refs > 0) -+ goto out_unlock; -+ -+ gpiod_set_value(tp->wakeup_gpio, 0); -+ usleep_range(100, 200); -+ } -+ -+out_unlock: -+ mutex_unlock(&tp->wakeup_mutex); -+} -+ -+static int enable_supply(struct regulator_dev *rdev) -+{ -+ struct tp65185x* tp = rdev_get_drvdata(rdev); -+ int ret; -+ -+ if (tp->is_enabled) -+ return 0; -+ -+ wakeup_regulator(tp, 1); -+ -+ ret = apply_voltage(tp, tp->vcom); -+ if (ret) { -+ dev_err(tp->dev, "vcom restore failed (%d)\n", ret); -+ goto err; -+ } -+ -+ show_power_status(tp, "pre-powerup"); -+ -+ // enable the VDD on the panel (V3P3) first -+ ret = regmap_write(tp->regmap, REG_ENABLE, 0x20); -+ if (ret) { -+ dev_err(tp->dev, "vdd enable failed (%d)\n", ret); -+ goto err; -+ } -+ -+ usleep_range(2000, 2200); -+ -+ show_power_status(tp, "V3P3 en"); -+ -+ // powerup by default takes about 20ms -+ gpiod_set_value(tp->powerup_gpio, 1); -+ usleep_range(22000, 24000); -+ -+ ret = wait_for_power_good(tp); -+ if (ret) -+ goto err; -+ -+ show_power_status(tp, "powerup done"); -+ -+ // enable VCOM last -+ gpiod_set_value(tp->vcom_gpio, 1); -+ usleep_range(4000, 5000); -+ -+ show_power_status(tp, "powerup vcom"); -+ -+ tp->is_enabled = true; -+ return 0; -+ -+err: -+ gpiod_set_value(tp->vcom_gpio, 0); -+ usleep_range(2000, 3000); -+ gpiod_set_value(tp->powerup_gpio, 0); -+ msleep(100); -+ wakeup_regulator(tp, 0); -+ return ret; -+} -+ -+static int disable_supply(struct regulator_dev *rdev) -+{ -+ struct tp65185x* tp = rdev_get_drvdata(rdev); -+ -+ if (!tp->is_enabled) -+ return 0; -+ -+ show_power_status(tp, "pre-poweroff"); -+ -+ gpiod_set_value(tp->vcom_gpio, 0); -+ usleep_range(5000, 6000); -+ -+ show_power_status(tp, "vcom down"); -+ -+ gpiod_set_value(tp->powerup_gpio, 0); -+ -+ // it may take up to 100ms to power off all high voltage rails -+ msleep(100); -+ -+ show_power_status(tp, "power down"); -+ -+ // this will power down the V3P3 switch too -+ wakeup_regulator(tp, 0); -+ -+ tp->is_enabled = false; -+ -+ return 0; -+} -+ -+static int is_supply_enabled(struct regulator_dev *rdev) -+{ -+ struct tp65185x* tp = rdev_get_drvdata(rdev); -+ //int ret; -+ -+ //ret = gpiod_get_value(tp->powergood_gpio); -+ //if (ret < 0) -+ //return ret; -+ -+ return tp->is_enabled; -+} -+ -+static const struct regulator_ops tp65185x_ops = { -+ .is_enabled = is_supply_enabled, -+ .enable = enable_supply, -+ .disable = disable_supply, -+ .set_voltage = set_voltage, -+ .get_voltage = get_voltage, -+}; -+ -+static const struct regulator_desc tp65185x_reg = { -+ .name = "tp65185x", -+ .id = 0, -+ .continuous_voltage_range = 1, -+ .ops = &tp65185x_ops, -+ .type = REGULATOR_VOLTAGE, -+ .owner = THIS_MODULE, -+}; -+ -+static int tp65185x_ntc_read_temperature(struct tp65185x* tp, long *val) -+{ -+ int ret; -+ unsigned int reg; -+ -+ wakeup_regulator(tp, 1); -+ -+ ret = regmap_update_bits(tp->regmap, REG_TMST1, -+ REG_TMST1_READ_THERM, -+ REG_TMST1_READ_THERM); -+ if (ret) -+ goto err_sleep; -+ -+ ret = regmap_read_poll_timeout(tp->regmap, REG_TMST1, reg, -+ reg & REG_TMST1_CONV_END, -+ 2000, 100000); -+ if (ret) -+ goto err_sleep; -+ -+ ret = regmap_read(tp->regmap, REG_TMST_VALUE, ®); -+ if (ret) -+ goto err_sleep; -+ -+ *val = (s8)(u8)reg; -+ -+err_sleep: -+ wakeup_regulator(tp, 0); -+ return ret; -+} -+ -+static int tp65185x_ntc_read(struct device *dev, enum hwmon_sensor_types type, -+ u32 attr, int channel, long *val) -+{ -+ struct tp65185x *tp = dev_get_drvdata(dev); -+ -+ if (type == hwmon_temp && attr == hwmon_temp_input) { -+ return tp65185x_ntc_read_temperature(tp, val); -+ } else if (type == hwmon_temp && attr == hwmon_temp_type) { -+ *val = 4; -+ return 0; -+ } -+ -+ return -EINVAL; -+} -+ -+static umode_t tp65185x_ntc_is_visible(const void *data, -+ enum hwmon_sensor_types type, -+ u32 attr, int channel) -+{ -+ if (type == hwmon_temp) { -+ switch (attr) { -+ case hwmon_temp_input: -+ case hwmon_temp_type: -+ return 0444; -+ default: -+ break; -+ } -+ } -+ -+ return 0; -+} -+ -+static const struct hwmon_channel_info *tp65185x_ntc_info[] = { -+ HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ), -+ HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_TYPE), -+ NULL -+}; -+ -+static const struct hwmon_ops tp65185x_ntc_hwmon_ops = { -+ .is_visible = tp65185x_ntc_is_visible, -+ .read = tp65185x_ntc_read, -+}; -+ -+static const struct hwmon_chip_info tp65185x_ntc_chip_info = { -+ .ops = &tp65185x_ntc_hwmon_ops, -+ .info = tp65185x_ntc_info, -+}; -+ -+static int tp65185x_i2c_probe(struct i2c_client *i2c, -+ const struct i2c_device_id *id) -+{ -+ struct device *dev = &i2c->dev; -+ struct regulator_dev *rdev; -+ struct regulator_config config = { }; -+ unsigned int reg; -+ struct tp65185x* tp; -+ const char* rev = NULL; -+ struct device *hwmon_dev; -+ int ret; -+ -+ tp = devm_kzalloc(dev, sizeof(*tp), GFP_KERNEL); -+ if (!tp) -+ return -ENOMEM; -+ -+ tp->dev = dev; -+ mutex_init(&tp->wakeup_mutex); -+ -+ tp->powergood_gpio = devm_gpiod_get(dev, "powergood", GPIOD_IN); -+ if (IS_ERR(tp->powergood_gpio)) { -+ ret = PTR_ERR(tp->powergood_gpio); -+ dev_err(dev, "Can't get wakeup gpio (%d)\n", ret); -+ return ret; -+ } -+ -+ tp->powerup_gpio = devm_gpiod_get(dev, "powerup", GPIOD_OUT_LOW); -+ if (IS_ERR(tp->powerup_gpio)) { -+ ret = PTR_ERR(tp->powerup_gpio); -+ dev_err(dev, "Can't get wakeup gpio (%d)\n", ret); -+ return ret; -+ } -+ -+ tp->vcom_gpio = devm_gpiod_get(dev, "vcom", GPIOD_OUT_LOW); -+ if (IS_ERR(tp->vcom_gpio)) { -+ ret = PTR_ERR(tp->vcom_gpio); -+ dev_err(dev, "Can't get wakeup gpio (%d)\n", ret); -+ return ret; -+ } -+ -+ tp->wakeup_gpio = devm_gpiod_get(dev, "wakeup", GPIOD_OUT_HIGH); -+ if (IS_ERR(tp->wakeup_gpio)) { -+ ret = PTR_ERR(tp->wakeup_gpio); -+ dev_err(dev, "Can't get wakeup gpio (%d)\n", ret); -+ return ret; -+ } -+ -+ // wait for wakeup -+ usleep_range(10000, 12000); -+ -+ i2c_set_clientdata(i2c, tp); -+ -+ tp->regmap = devm_regmap_init_i2c(i2c, &tp65185x_regmap_config); -+ if (IS_ERR(tp->regmap)) { -+ ret = PTR_ERR(tp->regmap); -+ dev_err(dev, "Failed to allocate register map: %d\n", ret); -+ return ret; -+ } -+ -+ ret = regmap_read(tp->regmap, REG_REVID, ®); -+ if (ret) { -+ dev_err(dev, "chip id read failed (%d)\n", ret); -+ return ret; -+ } -+ -+ switch (reg) { -+ case 0x45: rev = "TPS65185 1p0"; break; -+ case 0x55: rev = "TPS65185 1p1"; break; -+ case 0x65: rev = "TPS65185 1p2"; break; -+ case 0x66: rev = "TPS651851 1p0"; break; -+ default: -+ dev_err(dev, "reading chip id\n"); -+ break; -+ -+ } -+ -+ dev_info(dev, "detected chip id 0x%02x (%s)\n", (int)reg, rev); -+ -+ // disable regulators, move to sleep -+ gpiod_set_value(tp->wakeup_gpio, 0); -+ -+ config.driver_data = tp; -+ config.dev = &i2c->dev; -+ config.regmap = tp->regmap; -+ config.of_node = dev->of_node; -+ config.init_data = of_get_regulator_init_data(dev, dev->of_node, -+ &tp65185x_reg); -+ if (!config.init_data) -+ return -ENOMEM; -+ -+ rdev = devm_regulator_register(&i2c->dev, &tp65185x_reg, &config); -+ if (IS_ERR(rdev)) { -+ ret = PTR_ERR(rdev); -+ dev_err(&i2c->dev, "Failed to register egulator (%d)\n", ret); -+ return ret; -+ } -+ -+ hwmon_dev = devm_hwmon_device_register_with_info(&i2c->dev, -+ "tps65185", -+ tp, -+ &tp65185x_ntc_chip_info, -+ NULL); -+ if (IS_ERR(hwmon_dev)) { -+ ret = PTR_ERR(hwmon_dev); -+ dev_err(dev, "unable to register tmst as hwmon device (%d)\n", -+ ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static const struct i2c_device_id tp65185x_i2c_id[] = { -+ { "tp65185x", 0 }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(i2c, tp65185x_i2c_id); -+ -+static struct i2c_driver tp65185x_regulator_driver = { -+ .driver = { -+ .name = "tp65185x", -+ }, -+ .probe = tp65185x_i2c_probe, -+ .id_table = tp65185x_i2c_id, -+}; -+ -+module_i2c_driver(tp65185x_regulator_driver); -+ -+MODULE_AUTHOR("OndÅ™ej Jirman "); -+MODULE_DESCRIPTION("Regulator device driver for tp65185x"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/regulator/userspace-consumer-of.c b/drivers/regulator/userspace-consumer-of.c -new file mode 100644 -index 000000000000..5b835af17bea ---- /dev/null -+++ b/drivers/regulator/userspace-consumer-of.c -@@ -0,0 +1,137 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct userspace_consumer_data { -+ struct mutex lock; -+ bool enabled; -+ struct regulator *supply; -+}; -+ -+static ssize_t reg_show_state(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct userspace_consumer_data *data = dev_get_drvdata(dev); -+ -+ if (data->enabled) -+ return sprintf(buf, "enabled\n"); -+ -+ return sprintf(buf, "disabled\n"); -+} -+ -+static ssize_t reg_set_state(struct device *dev, struct device_attribute *attr, -+ const char *buf, size_t count) -+{ -+ struct userspace_consumer_data *data = dev_get_drvdata(dev); -+ bool enabled; -+ int ret; -+ -+ /* -+ * sysfs_streq() doesn't need the \n's, but we add them so the strings -+ * will be shared with show_state(), above. -+ */ -+ if (sysfs_streq(buf, "enabled\n") || sysfs_streq(buf, "1")) -+ enabled = true; -+ else if (sysfs_streq(buf, "disabled\n") || sysfs_streq(buf, "0")) -+ enabled = false; -+ else { -+ dev_err(dev, "Configuring invalid mode\n"); -+ return count; -+ } -+ -+ mutex_lock(&data->lock); -+ if (enabled != data->enabled) { -+ if (enabled) -+ ret = regulator_enable(data->supply); -+ else -+ ret = regulator_disable(data->supply); -+ -+ if (ret == 0) -+ data->enabled = enabled; -+ else -+ dev_err(dev, "Failed to configure state: %d\n", ret); -+ } -+ mutex_unlock(&data->lock); -+ -+ return count; -+} -+ -+static DEVICE_ATTR(state, 0644, reg_show_state, reg_set_state); -+ -+static struct attribute *attributes[] = { -+ &dev_attr_state.attr, -+ NULL, -+}; -+ -+static const struct attribute_group attr_group = { -+ .attrs = attributes, -+}; -+ -+static int regulator_userspace_consumer_probe(struct platform_device *pdev) -+{ -+ struct userspace_consumer_data *drvdata; -+ int ret; -+ -+ drvdata = devm_kzalloc(&pdev->dev, -+ sizeof(struct userspace_consumer_data), -+ GFP_KERNEL); -+ if (drvdata == NULL) -+ return -ENOMEM; -+ -+ mutex_init(&drvdata->lock); -+ -+ drvdata->supply = devm_regulator_get(&pdev->dev, "controlled"); -+ if (IS_ERR(drvdata->supply)) { -+ ret = PTR_ERR(drvdata->supply); -+ if (ret != -EPROBE_DEFER) -+ dev_err(&pdev->dev, "Failed to get supply: %d\n", ret); -+ return ret; -+ } -+ -+ ret = sysfs_create_group(&pdev->dev.kobj, &attr_group); -+ if (ret != 0) -+ return ret; -+ -+ platform_set_drvdata(pdev, drvdata); -+ -+ return 0; -+} -+ -+static int regulator_userspace_consumer_remove(struct platform_device *pdev) -+{ -+ struct userspace_consumer_data *data = platform_get_drvdata(pdev); -+ -+ sysfs_remove_group(&pdev->dev.kobj, &attr_group); -+ -+ if (data->enabled) -+ regulator_disable(data->supply); -+ -+ return 0; -+} -+ -+static const struct of_device_id ids_of_match[] = { -+ { .compatible = "custom,reg-userspace-consumer", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, ids_of_match); -+ -+static struct platform_driver regulator_userspace_consumer_driver = { -+ .probe = regulator_userspace_consumer_probe, -+ .remove = regulator_userspace_consumer_remove, -+ .driver = { -+ .name = "reg-userspace-consumer-of", -+ .of_match_table = of_match_ptr(ids_of_match), -+ }, -+}; -+ -+module_platform_driver(regulator_userspace_consumer_driver); -+ -+MODULE_AUTHOR("Mike Rapoport "); -+MODULE_DESCRIPTION("Userspace consumer for voltage and current regulators"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c -index adec1b14a8de..50de48cf645a 100644 ---- a/drivers/rtc/rtc-sun6i.c -+++ b/drivers/rtc/rtc-sun6i.c -@@ -69,6 +69,10 @@ - #define SUN6I_LOSC_OUT_GATING 0x0060 - #define SUN6I_LOSC_OUT_GATING_EN_OFFSET 0 - -+/* General-purpose data */ -+#define SUN6I_GP_DATA 0x0100 -+#define SUN6I_GP_DATA_SIZE 0x40 -+ - /* - * Get date values - */ -@@ -641,7 +645,39 @@ static const struct rtc_class_ops sun6i_rtc_ops = { - .alarm_irq_enable = sun6i_rtc_alarm_irq_enable - }; - --#ifdef CONFIG_PM_SLEEP -+static int sun6i_rtc_nvmem_read(void *priv, unsigned int offset, void *_val, size_t bytes) -+{ -+ struct sun6i_rtc_dev *chip = priv; -+ u32 *val = _val; -+ int i; -+ -+ for (i = 0; i < bytes / 4; ++i) -+ val[i] = readl(chip->base + SUN6I_GP_DATA + offset + 4 * i); -+ -+ return 0; -+} -+ -+static int sun6i_rtc_nvmem_write(void *priv, unsigned int offset, void *_val, size_t bytes) -+{ -+ struct sun6i_rtc_dev *chip = priv; -+ u32 *val = _val; -+ int i; -+ -+ for (i = 0; i < bytes / 4; ++i) -+ writel(val[i], chip->base + SUN6I_GP_DATA + offset + 4 * i); -+ -+ return 0; -+} -+ -+static struct nvmem_config sun6i_rtc_nvmem_cfg = { -+ .type = NVMEM_TYPE_BATTERY_BACKED, -+ .reg_read = sun6i_rtc_nvmem_read, -+ .reg_write = sun6i_rtc_nvmem_write, -+ .size = SUN6I_GP_DATA_SIZE, -+ .word_size = 4, -+ .stride = 4, -+}; -+ - /* Enable IRQ wake on suspend, to wake up from RTC. */ - static int sun6i_rtc_suspend(struct device *dev) - { -@@ -654,7 +690,7 @@ static int sun6i_rtc_suspend(struct device *dev) - } - - /* Disable IRQ wake on resume. */ --static int sun6i_rtc_resume(struct device *dev) -+static int __maybe_unused sun6i_rtc_resume(struct device *dev) - { - struct sun6i_rtc_dev *chip = dev_get_drvdata(dev); - -@@ -663,7 +699,6 @@ static int sun6i_rtc_resume(struct device *dev) - - return 0; - } --#endif - - static SIMPLE_DEV_PM_OPS(sun6i_rtc_pm_ops, - sun6i_rtc_suspend, sun6i_rtc_resume); -@@ -730,11 +765,21 @@ static int sun6i_rtc_probe(struct platform_device *pdev) - if (ret) - return ret; - -+ sun6i_rtc_nvmem_cfg.priv = chip; -+ ret = devm_rtc_nvmem_register(chip->rtc, &sun6i_rtc_nvmem_cfg); -+ if (ret) -+ return ret; -+ - dev_info(&pdev->dev, "RTC enabled\n"); - - return 0; - } - -+static void sun6i_rtc_shutdown(struct platform_device *pdev) -+{ -+ sun6i_rtc_suspend(&pdev->dev); -+} -+ - /* - * As far as RTC functionality goes, all models are the same. The - * datasheets claim that different models have different number of -@@ -755,6 +800,7 @@ MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids); - - static struct platform_driver sun6i_rtc_driver = { - .probe = sun6i_rtc_probe, -+ .shutdown = sun6i_rtc_shutdown, - .driver = { - .name = "sun6i-rtc", - .of_match_table = sun6i_rtc_dt_ids, -diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig -index b22f73d7bfc4..df0e405aad05 100644 ---- a/drivers/staging/Kconfig -+++ b/drivers/staging/Kconfig -@@ -114,4 +114,6 @@ source "drivers/staging/wfx/Kconfig" - - source "drivers/staging/hikey9xx/Kconfig" - -+source "drivers/staging/rtl8723cs/Kconfig" -+ - endif # STAGING -diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile -index 2245059e69c7..8f42cff4aa3a 100644 ---- a/drivers/staging/Makefile -+++ b/drivers/staging/Makefile -@@ -47,3 +47,4 @@ obj-$(CONFIG_QLGE) += qlge/ - obj-$(CONFIG_WIMAX) += wimax/ - obj-$(CONFIG_WFX) += wfx/ - obj-y += hikey9xx/ -+obj-$(CONFIG_RTL8723CS) += rtl8723cs/ -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c -index ddad5d274ee8..8b2a9c4eef30 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c -@@ -338,7 +338,9 @@ static int cedrus_open(struct file *file) - - err_ctrls: - v4l2_ctrl_handler_free(&ctx->hdl); -+ kfree(ctx->ctrls); - err_free: -+ v4l2_fh_exit(&ctx->fh); - kfree(ctx); - mutex_unlock(&dev->dev_mutex); - -@@ -426,7 +428,7 @@ static int cedrus_probe(struct platform_device *pdev) - ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); - if (ret) { - dev_err(&pdev->dev, "Failed to register V4L2 device\n"); -- return ret; -+ goto err_hw; - } - - vfd = &dev->vfd; -@@ -489,6 +491,8 @@ err_m2m: - v4l2_m2m_release(dev->m2m_dev); - err_v4l2: - v4l2_device_unregister(&dev->v4l2_dev); -+err_hw: -+ cedrus_hw_remove(dev); - - return ret; - } -diff --git a/drivers/staging/rtl8723cs/Kconfig b/drivers/staging/rtl8723cs/Kconfig -new file mode 100644 -index 000000000000..9b2e6ad9dbbc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/Kconfig -@@ -0,0 +1,8 @@ -+# SPDX-License-Identifier: GPL-2.0 -+config RTL8723CS -+ tristate "Realtek RTL8723CS SDIO or SPI WiFi driver (2020)" -+ depends on WLAN && MMC && CFG80211 -+ select WIRELESS_EXT -+ select WEXT_PRIV -+ help -+ Help message of RTL8723CS -diff --git a/drivers/staging/rtl8723cs/Makefile b/drivers/staging/rtl8723cs/Makefile -new file mode 100644 -index 000000000000..b428d679e83e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/Makefile -@@ -0,0 +1,2522 @@ -+# SPDX-License-Identifier: GPL-2.0 -+EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS) -+EXTRA_CFLAGS += -O2 -+#EXTRA_CFLAGS += -O3 -+#EXTRA_CFLAGS += -Wall -+#EXTRA_CFLAGS += -Wextra -+#EXTRA_CFLAGS += -Werror -+#EXTRA_CFLAGS += -pedantic -+#EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes -+ -+EXTRA_CFLAGS += -Wno-unused-variable -+#EXTRA_CFLAGS += -Wno-unused-value -+#EXTRA_CFLAGS += -Wno-unused-label -+#EXTRA_CFLAGS += -Wno-unused-parameter -+#EXTRA_CFLAGS += -Wno-unused-function -+#EXTRA_CFLAGS += -Wno-unused -+#EXTRA_CFLAGS += -Wno-uninitialized -+ -+GCC_VER_49 := $(shell echo `$(CC) -dumpversion | cut -f1-2 -d.` \>= 4.9 | bc ) -+ifeq ($(GCC_VER_49),1) -+EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later -+endif -+ -+EXTRA_CFLAGS += -I$(srctree)/$(src)/include -+ -+EXTRA_LDFLAGS += --strip-debug -+ -+CONFIG_AUTOCFG_CP = n -+ -+########################## WIFI IC ############################ -+CONFIG_MULTIDRV = n -+CONFIG_RTL8188E = n -+CONFIG_RTL8812A = n -+CONFIG_RTL8821A = n -+CONFIG_RTL8192E = n -+CONFIG_RTL8723B = n -+CONFIG_RTL8814A = n -+CONFIG_RTL8723C = y -+CONFIG_RTL8188F = n -+CONFIG_RTL8188GTV = n -+CONFIG_RTL8822B = n -+CONFIG_RTL8723D = n -+CONFIG_RTL8821C = n -+CONFIG_RTL8710B = n -+CONFIG_RTL8192F = n -+CONFIG_RTL8822C = n -+CONFIG_RTL8814B = n -+CONFIG_RTL8723F = n -+######################### Interface ########################### -+CONFIG_USB_HCI = n -+CONFIG_PCI_HCI = n -+CONFIG_SDIO_HCI = y -+CONFIG_GSPI_HCI = n -+########################## Features ########################### -+CONFIG_AP_MODE = y -+CONFIG_P2P = y -+CONFIG_MP_INCLUDED = n -+CONFIG_POWER_SAVING = y -+CONFIG_IPS_MODE = 0 -+CONFIG_LPS_MODE = 1 -+CONFIG_USB_AUTOSUSPEND = n -+CONFIG_HW_PWRP_DETECTION = n -+CONFIG_BT_COEXIST = y -+CONFIG_WAPI_SUPPORT = n -+CONFIG_EFUSE_CONFIG_FILE = n -+CONFIG_EXT_CLK = n -+CONFIG_TRAFFIC_PROTECT = n -+CONFIG_LOAD_PHY_PARA_FROM_FILE = n -+CONFIG_TXPWR_BY_RATE = y -+CONFIG_TXPWR_BY_RATE_EN = y -+CONFIG_TXPWR_LIMIT = y -+CONFIG_TXPWR_LIMIT_EN = n -+CONFIG_RTW_CHPLAN = 0xFF -+CONFIG_RTW_ADAPTIVITY_EN = disable -+CONFIG_RTW_ADAPTIVITY_MODE = normal -+CONFIG_SIGNAL_SCALE_MAPPING = n -+CONFIG_80211W = y -+CONFIG_REDUCE_TX_CPU_LOADING = n -+CONFIG_BR_EXT = y -+CONFIG_TDLS = y -+CONFIG_WIFI_MONITOR = y -+CONFIG_MCC_MODE = n -+CONFIG_APPEND_VENDOR_IE_ENABLE = n -+CONFIG_RTW_NAPI = y -+CONFIG_RTW_GRO = y -+CONFIG_RTW_NETIF_SG = y -+CONFIG_RTW_IPCAM_APPLICATION = n -+CONFIG_RTW_REPEATER_SON = n -+CONFIG_ICMP_VOQ = n -+CONFIG_IP_R_MONITOR = n #arp VOQ and high rate -+# user priority mapping rule : tos, dscp -+CONFIG_RTW_UP_MAPPING_RULE = tos -+CONFIG_RTW_MBO = n -+########################## Android ########################### -+# CONFIG_RTW_ANDROID - 0: no Android, 4/5/6/7/8/9/10 : Android version -+CONFIG_RTW_ANDROID = 0 -+ -+ifeq ($(shell test $(CONFIG_RTW_ANDROID) -gt 0; echo $$?), 0) -+EXTRA_CFLAGS += -DCONFIG_RTW_ANDROID=$(CONFIG_RTW_ANDROID) -+endif -+########################## Debug ########################### -+CONFIG_RTW_DEBUG = n -+# default log level is _DRV_INFO_ = 4, -+# please refer to "How_to_set_driver_debug_log_level.doc" to set the available level. -+CONFIG_RTW_LOG_LEVEL = 6 -+ -+# enable /proc/net/rtlxxxx/ debug interfaces -+CONFIG_PROC_DEBUG = y -+ -+######################## Wake On Lan ########################## -+CONFIG_WOWLAN = y -+#bit3: ARP enable, bit2: deauth, bit1: unicast, bit0: magic pkt. -+CONFIG_WAKEUP_TYPE = 0xf -+CONFIG_WOW_LPS_MODE = default -+#bit0: disBBRF off, #bit1: Wireless remote controller (WRC) -+CONFIG_SUSPEND_TYPE = 0 -+CONFIG_WOW_STA_MIX = n -+CONFIG_GPIO_WAKEUP = y -+# Please contact with RTK support team first. After getting the agreement from RTK support team, -+# you are just able to modify the CONFIG_WAKEUP_GPIO_IDX with customized requirement. -+CONFIG_WAKEUP_GPIO_IDX = default -+CONFIG_HIGH_ACTIVE_DEV2HST = n -+######### only for USB ######### -+CONFIG_ONE_PIN_GPIO = n -+CONFIG_HIGH_ACTIVE_HST2DEV = n -+CONFIG_PNO_SUPPORT = n -+CONFIG_PNO_SET_DEBUG = n -+CONFIG_AP_WOWLAN = n -+######### Notify SDIO Host Keep Power During Syspend ########## -+CONFIG_RTW_SDIO_PM_KEEP_POWER = y -+###################### MP HW TX MODE FOR VHT ####################### -+CONFIG_MP_VHT_HW_TX_MODE = n -+###################### ROAMING ##################################### -+CONFIG_LAYER2_ROAMING = y -+#bit0: ROAM_ON_EXPIRED, #bit1: ROAM_ON_RESUME, #bit2: ROAM_ACTIVE -+CONFIG_ROAMING_FLAG = 0x3 -+###################### Platform Related ####################### -+CONFIG_PLATFORM_I386_PC = y -+CONFIG_PLATFORM_ANDROID_X86 = n -+CONFIG_PLATFORM_ANDROID_INTEL_X86 = n -+CONFIG_PLATFORM_JB_X86 = n -+CONFIG_PLATFORM_ARM_S3C2K4 = n -+CONFIG_PLATFORM_ARM_PXA2XX = n -+CONFIG_PLATFORM_ARM_S3C6K4 = n -+CONFIG_PLATFORM_MIPS_RMI = n -+CONFIG_PLATFORM_RTD2880B = n -+CONFIG_PLATFORM_MIPS_AR9132 = n -+CONFIG_PLATFORM_RTK_DMP = n -+CONFIG_PLATFORM_MIPS_PLM = n -+CONFIG_PLATFORM_MSTAR389 = n -+CONFIG_PLATFORM_MT53XX = n -+CONFIG_PLATFORM_ARM_MX51_241H = n -+CONFIG_PLATFORM_FS_MX61 = n -+CONFIG_PLATFORM_ACTIONS_ATJ227X = n -+CONFIG_PLATFORM_TEGRA3_CARDHU = n -+CONFIG_PLATFORM_TEGRA4_DALMORE = n -+CONFIG_PLATFORM_ARM_TCC8900 = n -+CONFIG_PLATFORM_ARM_TCC8920 = n -+CONFIG_PLATFORM_ARM_TCC8920_JB42 = n -+CONFIG_PLATFORM_ARM_TCC8930_JB42 = n -+CONFIG_PLATFORM_ARM_RK2818 = n -+CONFIG_PLATFORM_ARM_RK3066 = n -+CONFIG_PLATFORM_ARM_RK3188 = n -+CONFIG_PLATFORM_ARM_URBETTER = n -+CONFIG_PLATFORM_ARM_TI_PANDA = n -+CONFIG_PLATFORM_MIPS_JZ4760 = n -+CONFIG_PLATFORM_DMP_PHILIPS = n -+CONFIG_PLATFORM_MSTAR_TITANIA12 = n -+CONFIG_PLATFORM_MSTAR = n -+CONFIG_PLATFORM_SZEBOOK = n -+CONFIG_PLATFORM_ARM_SUNxI = n -+CONFIG_PLATFORM_ARM_SUN6I = n -+CONFIG_PLATFORM_ARM_SUN7I = n -+CONFIG_PLATFORM_ARM_SUN8I_W3P1 = n -+CONFIG_PLATFORM_ARM_SUN8I_W5P1 = n -+CONFIG_PLATFORM_ACTIONS_ATM702X = n -+CONFIG_PLATFORM_ACTIONS_ATV5201 = n -+CONFIG_PLATFORM_ACTIONS_ATM705X = n -+CONFIG_PLATFORM_ARM_SUN50IW1P1 = n -+CONFIG_PLATFORM_ARM_RTD299X = n -+CONFIG_PLATFORM_ARM_LGE = n -+CONFIG_PLATFORM_ARM_SPREADTRUM_6820 = n -+CONFIG_PLATFORM_ARM_SPREADTRUM_8810 = n -+CONFIG_PLATFORM_ARM_WMT = n -+CONFIG_PLATFORM_TI_DM365 = n -+CONFIG_PLATFORM_MOZART = n -+CONFIG_PLATFORM_RTK119X = n -+CONFIG_PLATFORM_RTK119X_AM = n -+CONFIG_PLATFORM_RTK129X = n -+CONFIG_PLATFORM_RTK1319 = n -+CONFIG_PLATFORM_RTK390X = n -+CONFIG_PLATFORM_NOVATEK_NT72668 = n -+CONFIG_PLATFORM_HISILICON = n -+CONFIG_PLATFORM_HISILICON_HI3798 = n -+CONFIG_PLATFORM_NV_TK1 = n -+CONFIG_PLATFORM_NV_TK1_UBUNTU = n -+CONFIG_PLATFORM_RTL8197D = n -+CONFIG_PLATFORM_AML_S905 = n -+CONFIG_PLATFORM_ZTE_ZX296716 = n -+########### CUSTOMER ################################ -+CONFIG_CUSTOMER_HUAWEI_GENERAL = n -+ -+CONFIG_DRVEXT_MODULE = n -+ -+export TopDIR ?= $(srctree)/$(src) -+ -+########### COMMON ################################# -+ifeq ($(CONFIG_GSPI_HCI), y) -+HCI_NAME = gspi -+endif -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+HCI_NAME = sdio -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+HCI_NAME = usb -+endif -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+HCI_NAME = pci -+endif -+ -+ -+_OS_INTFS_FILES := os_dep/osdep_service.o \ -+ os_dep/linux/os_intfs.o \ -+ os_dep/linux/$(HCI_NAME)_intf.o \ -+ os_dep/linux/$(HCI_NAME)_ops_linux.o \ -+ os_dep/linux/ioctl_linux.o \ -+ os_dep/linux/xmit_linux.o \ -+ os_dep/linux/mlme_linux.o \ -+ os_dep/linux/recv_linux.o \ -+ os_dep/linux/ioctl_cfg80211.o \ -+ os_dep/linux/rtw_cfgvendor.o \ -+ os_dep/linux/wifi_regd.o \ -+ os_dep/linux/rtw_android.o \ -+ os_dep/linux/rtw_proc.o \ -+ os_dep/linux/nlrtw.o \ -+ os_dep/linux/rtw_rhashtable.o -+ -+ifeq ($(CONFIG_MP_INCLUDED), y) -+_OS_INTFS_FILES += os_dep/linux/ioctl_mp.o -+endif -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_OS_INTFS_FILES += os_dep/linux/custom_gpio_linux.o -+_OS_INTFS_FILES += os_dep/linux/$(HCI_NAME)_ops_linux.o -+endif -+ -+ifeq ($(CONFIG_GSPI_HCI), y) -+_OS_INTFS_FILES += os_dep/linux/custom_gpio_linux.o -+_OS_INTFS_FILES += os_dep/linux/$(HCI_NAME)_ops_linux.o -+endif -+ -+ -+_HAL_INTFS_FILES := hal/hal_intf.o \ -+ hal/hal_com.o \ -+ hal/hal_com_phycfg.o \ -+ hal/hal_phy.o \ -+ hal/hal_dm.o \ -+ hal/hal_dm_acs.o \ -+ hal/hal_btcoex_wifionly.o \ -+ hal/hal_btcoex.o \ -+ hal/hal_mp.o \ -+ hal/hal_mcc.o \ -+ hal/hal_hci/hal_$(HCI_NAME).o \ -+ hal/led/hal_led.o \ -+ hal/led/hal_$(HCI_NAME)_led.o -+ -+ -+EXTRA_CFLAGS += -I$(srctree)/$(src)/platform -+_PLATFORM_FILES := platform/platform_ops.o -+ -+EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/btc -+ -+########### HAL_RTL8188E ################################# -+ifeq ($(CONFIG_RTL8188E), y) -+ -+RTL871X = rtl8188e -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8189es -+endif -+ -+ifeq ($(CONFIG_GSPI_HCI), y) -+MODULE_NAME = 8189es -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8188eu -+endif -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8188ee -+endif -+EXTRA_CFLAGS += -DCONFIG_RTL8188E -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8188EPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_xmit.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8188e_s_fw.o \ -+ hal/$(RTL871X)/hal8188e_t_fw.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+else -+ifeq ($(CONFIG_GSPI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+endif -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_PCIE.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_SDIO.o -+endif -+ -+endif -+ -+########### HAL_RTL8192E ################################# -+ifeq ($(CONFIG_RTL8192E), y) -+ -+RTL871X = rtl8192e -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8192es -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8192eu -+endif -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8192ee -+endif -+EXTRA_CFLAGS += -DCONFIG_RTL8192E -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8192EPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_xmit.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8192e_fw.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+else -+ifeq ($(CONFIG_GSPI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+endif -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8192E_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8192E_PCIE.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8192E_SDIO.o -+endif -+ -+ifeq ($(CONFIG_BT_COEXIST), y) -+_BTC_FILES += hal/btc/halbtc8192e1ant.o \ -+ hal/btc/halbtc8192e2ant.o -+endif -+ -+endif -+ -+########### HAL_RTL8812A_RTL8821A ################################# -+ -+ifneq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A), n_n) -+ -+RTL871X = rtl8812a -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8812au -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8812ae -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8812as -+endif -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8812PwrSeq.o \ -+ hal/$(RTL871X)/Hal8821APwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_xmit.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+else -+ifeq ($(CONFIG_GSPI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+endif -+endif -+ -+ifeq ($(CONFIG_RTL8812A), y) -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8812A_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8812A_PCIE.o -+endif -+endif -+ifeq ($(CONFIG_RTL8821A), y) -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8821A_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8821A_PCIE.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8821A_SDIO.o -+endif -+endif -+ -+ifeq ($(CONFIG_RTL8812A), y) -+EXTRA_CFLAGS += -DCONFIG_RTL8812A -+_HAL_INTFS_FILES += hal/rtl8812a/hal8812a_fw.o -+endif -+ -+ifeq ($(CONFIG_RTL8821A), y) -+ -+ifeq ($(CONFIG_RTL8812A), n) -+ -+RTL871X = rtl8821a -+ifeq ($(CONFIG_USB_HCI), y) -+ifeq ($(CONFIG_BT_COEXIST), y) -+MODULE_NAME := 8821au -+else -+MODULE_NAME := 8811au -+endif -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME := 8821ae -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME := 8821as -+endif -+ -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8821A -+ -+_HAL_INTFS_FILES += hal/rtl8812a/hal8821a_fw.o -+ -+endif -+ -+ifeq ($(CONFIG_BT_COEXIST), y) -+ifeq ($(CONFIG_RTL8812A), y) -+_BTC_FILES += hal/btc/halbtc8812a1ant.o \ -+ hal/btc/halbtc8812a2ant.o -+endif -+ifeq ($(CONFIG_RTL8821A), y) -+_BTC_FILES += hal/btc/halbtc8821a1ant.o \ -+ hal/btc/halbtc8821a2ant.o -+endif -+endif -+ -+endif -+ -+########### HAL_RTL8723B ################################# -+ifeq ($(CONFIG_RTL8723B), y) -+ -+RTL871X = rtl8723b -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8723bu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8723be -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8723bs -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8723B -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8723BPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8723b_fw.o -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723B_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723B_PCIE.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723B_SDIO.o -+endif -+ -+_BTC_FILES += hal/btc/halbtc8723bwifionly.o -+ifeq ($(CONFIG_BT_COEXIST), y) -+_BTC_FILES += hal/btc/halbtc8723b1ant.o \ -+ hal/btc/halbtc8723b2ant.o -+endif -+ -+endif -+ -+########### HAL_RTL8814A ################################# -+ifeq ($(CONFIG_RTL8814A), y) -+## ADD NEW VHT MP HW TX MODE ## -+#EXTRA_CFLAGS += -DCONFIG_MP_VHT_HW_TX_MODE -+#CONFIG_MP_VHT_HW_TX_MODE = y -+########################################## -+RTL871X = rtl8814a -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8814au -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8814ae -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8814as -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8814A -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8814PwrSeq.o \ -+ hal/$(RTL871X)/$(RTL871X)_xmit.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8814a_fw.o -+ -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+else -+ifeq ($(CONFIG_GSPI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+endif -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8814A_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8814A_PCIE.o -+endif -+ -+ifeq ($(CONFIG_BT_COEXIST), y) -+_BTC_FILES += hal/btc/halbtc8814a2ant.o -+endif -+endif -+ -+########### HAL_RTL8723C ################################# -+ifeq ($(CONFIG_RTL8723C), y) -+ -+RTL871X = rtl8703b -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8723cu -+MODULE_SUB_NAME = 8703bu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8723ce -+MODULE_SUB_NAME = 8703be -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8723cs -+MODULE_SUB_NAME = 8703bs -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8703B -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8703BPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8703b_fw.o -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8703B_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8703B_PCIE.o -+endif -+ -+ifeq ($(CONFIG_BT_COEXIST), y) -+_BTC_FILES += hal/btc/halbtc8703b1ant.o -+endif -+ -+endif -+ -+########### HAL_RTL8723D ################################# -+ifeq ($(CONFIG_RTL8723D), y) -+ -+RTL871X = rtl8723d -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8723du -+MODULE_SUB_NAME = 8723du -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8723de -+MODULE_SUB_NAME = 8723de -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8723ds -+MODULE_SUB_NAME = 8723ds -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8723D -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8723DPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8723d_fw.o \ -+ hal/$(RTL871X)/$(RTL871X)_lps_poff.o -+ -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723D_USB.o -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723D_PCIE.o -+endif -+ -+ifeq ($(CONFIG_BT_COEXIST), y) -+_BTC_FILES += hal/btc/halbtc8723d1ant.o \ -+ hal/btc/halbtc8723d2ant.o -+endif -+ -+endif -+ -+########### HAL_RTL8723F ################################# -+ifeq ($(CONFIG_RTL8723F), y) -+RTL871X := rtl8723f -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8723fu -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8723fs -+endif -+ -+endif -+ -+########### HAL_RTL8188F ################################# -+ifeq ($(CONFIG_RTL8188F), y) -+ -+RTL871X = rtl8188f -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8188fu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8188fe -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8189fs -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8188F -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8188FPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8188f_fw.o -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188F_USB.o -+endif -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188F_SDIO.o -+endif -+ -+endif -+ -+########### HAL_RTL8188GTV ################################# -+ifeq ($(CONFIG_RTL8188GTV), y) -+ -+RTL871X = rtl8188gtv -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8188gtvu -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8189gtvs -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8188GTV -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8188GTVPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8188gtv_fw.o -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188GTV_USB.o -+endif -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188GTV_SDIO.o -+endif -+ -+endif -+ -+########### HAL_RTL8822B ################################# -+ifeq ($(CONFIG_RTL8822B), y) -+RTL871X := rtl8822b -+ifeq ($(CONFIG_USB_HCI), y) -+ifeq ($(CONFIG_BT_COEXIST), n) -+MODULE_NAME = 8812bu -+else -+MODULE_NAME = 88x2bu -+endif -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 88x2be -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 88x2bs -+endif -+ -+endif -+########### HAL_RTL8821C ################################# -+ifeq ($(CONFIG_RTL8821C), y) -+RTL871X := rtl8821c -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8821cu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8821ce -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8821cs -+endif -+ -+endif -+ -+########### HAL_RTL8710B ################################# -+ifeq ($(CONFIG_RTL8710B), y) -+ -+RTL871X = rtl8710b -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8710bu -+MODULE_SUB_NAME = 8710bu -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8710B -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8710BPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8710b_fw.o \ -+ hal/$(RTL871X)/$(RTL871X)_lps_poff.o -+ -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8710B_USB.o -+endif -+ -+endif -+ -+########### HAL_RTL8192F ################################# -+ifeq ($(CONFIG_RTL8192F), y) -+ -+RTL871X = rtl8192f -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8192fu -+MODULE_SUB_NAME = 8192fu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8192fe -+MODULE_SUB_NAME = 8192fe -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 8192fs -+MODULE_SUB_NAME = 8192fs -+endif -+ -+EXTRA_CFLAGS += -DCONFIG_RTL8192F -+ -+_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ -+ hal/$(RTL871X)/Hal8192FPwrSeq.o\ -+ hal/$(RTL871X)/$(RTL871X)_sreset.o -+ -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ -+ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ -+ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ -+ hal/$(RTL871X)/$(RTL871X)_dm.o \ -+ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ -+ hal/$(RTL871X)/$(RTL871X)_cmd.o \ -+ hal/$(RTL871X)/hal8192f_fw.o \ -+ hal/$(RTL871X)/$(RTL871X)_lps_poff.o -+ -+ -+_HAL_INTFS_FILES += \ -+ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ -+ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -+else -+_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -+endif -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_SDIO.o -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_USB.o -+endif -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+_HAL_INTFS_FILES += hal/efuse/$(RTL871X)/HalEfuseMask8192F_PCIE.o -+endif -+ -+ifeq ($(CONFIG_BT_COEXIST), y) -+_BTC_FILES += hal/btc/halbtccommon.o \ -+ hal/btc/halbtc8192f.o -+endif -+ -+endif -+ -+########### HAL_RTL8822C ################################# -+ifeq ($(CONFIG_RTL8822C), y) -+RTL871X := rtl8822c -+ifeq ($(CONFIG_USB_HCI), y) -+ifeq ($(CONFIG_BT_COEXIST), n) -+MODULE_NAME = 8812cu -+else -+MODULE_NAME = 88x2cu -+endif -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 88x2ce -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME = 88x2cs -+endif -+ -+endif -+ -+########### HAL_RTL8814B ################################# -+ifeq ($(CONFIG_RTL8814B), y) -+RTL871X := rtl8814b -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME = 8814bu -+endif -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME = 8814be -+endif -+ -+endif -+ -+########### AUTO_CFG ################################# -+ -+ifeq ($(CONFIG_AUTOCFG_CP), y) -+ -+ifeq ($(CONFIG_MULTIDRV), y) -+$(shell cp $(TopDIR)/autoconf_multidrv_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -+else -+ifeq ($(CONFIG_RTL8188E)$(CONFIG_SDIO_HCI),yy) -+$(shell cp $(TopDIR)/autoconf_rtl8189e_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -+else ifeq ($(CONFIG_RTL8188F)$(CONFIG_SDIO_HCI),yy) -+$(shell cp $(TopDIR)/autoconf_rtl8189f_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -+else ifeq ($(CONFIG_RTL8723C),y) -+$(shell cp $(TopDIR)/autoconf_rtl8723c_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -+else -+$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -+endif -+endif -+ -+endif -+ -+########### END OF PATH ################################# -+ -+ifeq ($(CONFIG_AP_MODE), y) -+EXTRA_CFLAGS += -DCONFIG_AP_MODE -+endif -+ -+ifeq ($(CONFIG_P2P), y) -+EXTRA_CFLAGS += -DCONFIG_P2P -+ifneq ($(CONFIG_AP_MODE), y) -+$(error "CONFIG_AP_MODE is required for CONFIG_P2P") -+endif -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+ifeq ($(CONFIG_USB_AUTOSUSPEND), y) -+EXTRA_CFLAGS += -DCONFIG_USB_AUTOSUSPEND -+endif -+endif -+ -+ifeq ($(CONFIG_MP_INCLUDED), y) -+#MODULE_NAME := $(MODULE_NAME)_mp -+EXTRA_CFLAGS += -DCONFIG_MP_INCLUDED -+endif -+ -+ifeq ($(CONFIG_POWER_SAVING), y) -+ifneq ($(CONFIG_IPS_MODE), default) -+EXTRA_CFLAGS += -DRTW_IPS_MODE=$(CONFIG_IPS_MODE) -+endif -+ifneq ($(CONFIG_LPS_MODE), default) -+EXTRA_CFLAGS += -DRTW_LPS_MODE=$(CONFIG_LPS_MODE) -+endif -+ifneq ($(CONFIG_WOW_LPS_MODE), default) -+EXTRA_CFLAGS += -DRTW_WOW_LPS_MODE=$(CONFIG_WOW_LPS_MODE) -+endif -+EXTRA_CFLAGS += -DCONFIG_POWER_SAVING -+endif -+ -+ifeq ($(CONFIG_HW_PWRP_DETECTION), y) -+EXTRA_CFLAGS += -DCONFIG_HW_PWRP_DETECTION -+endif -+ -+ifeq ($(CONFIG_BT_COEXIST), y) -+EXTRA_CFLAGS += -DCONFIG_BT_COEXIST -+endif -+ -+ifeq ($(CONFIG_WAPI_SUPPORT), y) -+EXTRA_CFLAGS += -DCONFIG_WAPI_SUPPORT -+endif -+ -+ -+ifeq ($(CONFIG_EFUSE_CONFIG_FILE), y) -+EXTRA_CFLAGS += -DCONFIG_EFUSE_CONFIG_FILE -+ -+#EFUSE_MAP_PATH -+USER_EFUSE_MAP_PATH ?= -+ifneq ($(USER_EFUSE_MAP_PATH),) -+EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"$(USER_EFUSE_MAP_PATH)\" -+else ifeq ($(MODULE_NAME), 8189es) -+EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8189e.map\" -+else ifeq ($(MODULE_NAME), 8723bs) -+EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8723bs.map\" -+else -+EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/vendor/etc/firmware/wifi_efuse_$(MODULE_NAME).map\" -+endif -+ -+#WIFIMAC_PATH -+USER_WIFIMAC_PATH ?= -+ifneq ($(USER_WIFIMAC_PATH),) -+EXTRA_CFLAGS += -DWIFIMAC_PATH=\"$(USER_WIFIMAC_PATH)\" -+else -+EXTRA_CFLAGS += -DWIFIMAC_PATH=\"/data/wifimac.txt\" -+endif -+ -+endif -+ -+ifeq ($(CONFIG_EXT_CLK), y) -+EXTRA_CFLAGS += -DCONFIG_EXT_CLK -+endif -+ -+ifeq ($(CONFIG_TRAFFIC_PROTECT), y) -+EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT -+endif -+ -+ifeq ($(CONFIG_LOAD_PHY_PARA_FROM_FILE), y) -+EXTRA_CFLAGS += -DCONFIG_LOAD_PHY_PARA_FROM_FILE -+#EXTRA_CFLAGS += -DREALTEK_CONFIG_PATH_WITH_IC_NAME_FOLDER -+EXTRA_CFLAGS += -DREALTEK_CONFIG_PATH=\"/lib/firmware/\" -+endif -+ -+ifeq ($(CONFIG_TXPWR_BY_RATE), n) -+EXTRA_CFLAGS += -DCONFIG_TXPWR_BY_RATE=0 -+else ifeq ($(CONFIG_TXPWR_BY_RATE), y) -+EXTRA_CFLAGS += -DCONFIG_TXPWR_BY_RATE=1 -+endif -+ifeq ($(CONFIG_TXPWR_BY_RATE_EN), n) -+EXTRA_CFLAGS += -DCONFIG_TXPWR_BY_RATE_EN=0 -+else ifeq ($(CONFIG_TXPWR_BY_RATE_EN), y) -+EXTRA_CFLAGS += -DCONFIG_TXPWR_BY_RATE_EN=1 -+else ifeq ($(CONFIG_TXPWR_BY_RATE_EN), auto) -+EXTRA_CFLAGS += -DCONFIG_TXPWR_BY_RATE_EN=2 -+endif -+ -+ifeq ($(CONFIG_TXPWR_LIMIT), n) -+EXTRA_CFLAGS += -DCONFIG_TXPWR_LIMIT=0 -+else ifeq ($(CONFIG_TXPWR_LIMIT), y) -+EXTRA_CFLAGS += -DCONFIG_TXPWR_LIMIT=1 -+endif -+ifeq ($(CONFIG_TXPWR_LIMIT_EN), n) -+EXTRA_CFLAGS += -DCONFIG_TXPWR_LIMIT_EN=0 -+else ifeq ($(CONFIG_TXPWR_LIMIT_EN), y) -+EXTRA_CFLAGS += -DCONFIG_TXPWR_LIMIT_EN=1 -+else ifeq ($(CONFIG_TXPWR_LIMIT_EN), auto) -+EXTRA_CFLAGS += -DCONFIG_TXPWR_LIMIT_EN=2 -+endif -+ -+ifneq ($(CONFIG_RTW_CHPLAN), 0xFF) -+EXTRA_CFLAGS += -DCONFIG_RTW_CHPLAN=$(CONFIG_RTW_CHPLAN) -+endif -+ -+ifeq ($(CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY), y) -+EXTRA_CFLAGS += -DCONFIG_CALIBRATE_TX_POWER_BY_REGULATORY -+endif -+ -+ifeq ($(CONFIG_CALIBRATE_TX_POWER_TO_MAX), y) -+EXTRA_CFLAGS += -DCONFIG_CALIBRATE_TX_POWER_TO_MAX -+endif -+ -+ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), disable) -+EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=0 -+else ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), enable) -+EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=1 -+endif -+ -+ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), normal) -+EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=0 -+else ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), carrier_sense) -+EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=1 -+endif -+ -+ifeq ($(CONFIG_SIGNAL_SCALE_MAPPING), y) -+EXTRA_CFLAGS += -DCONFIG_SIGNAL_SCALE_MAPPING -+endif -+ -+ifeq ($(CONFIG_80211W), y) -+EXTRA_CFLAGS += -DCONFIG_IEEE80211W -+endif -+ -+ifeq ($(CONFIG_WOWLAN), y) -+EXTRA_CFLAGS += -DCONFIG_WOWLAN -DRTW_WAKEUP_EVENT=$(CONFIG_WAKEUP_TYPE) -+EXTRA_CFLAGS += -DRTW_SUSPEND_TYPE=$(CONFIG_SUSPEND_TYPE) -+ifeq ($(CONFIG_WOW_STA_MIX), y) -+EXTRA_CFLAGS += -DRTW_WOW_STA_MIX -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER -+endif -+endif -+ -+ifeq ($(CONFIG_AP_WOWLAN), y) -+EXTRA_CFLAGS += -DCONFIG_AP_WOWLAN -+ifeq ($(CONFIG_AP_MODE), n) -+EXTRA_CFLAGS += -DCONFIG_AP_MODE -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER -+endif -+endif -+ -+ifeq ($(CONFIG_LAYER2_ROAMING), y) -+EXTRA_CFLAGS += -DCONFIG_LAYER2_ROAMING -DCONFIG_ROAMING_FLAG=$(CONFIG_ROAMING_FLAG) -+endif -+ -+ifeq ($(CONFIG_PNO_SUPPORT), y) -+EXTRA_CFLAGS += -DCONFIG_PNO_SUPPORT -+ifeq ($(CONFIG_PNO_SET_DEBUG), y) -+EXTRA_CFLAGS += -DCONFIG_PNO_SET_DEBUG -+endif -+endif -+ -+ifeq ($(CONFIG_GPIO_WAKEUP), y) -+EXTRA_CFLAGS += -DCONFIG_GPIO_WAKEUP -+ifeq ($(CONFIG_ONE_PIN_GPIO), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_ONE_PIN_GPIO -+endif -+ifeq ($(CONFIG_HIGH_ACTIVE_DEV2HST), y) -+EXTRA_CFLAGS += -DHIGH_ACTIVE_DEV2HST=1 -+else -+EXTRA_CFLAGS += -DHIGH_ACTIVE_DEV2HST=0 -+endif -+endif -+ -+ifeq ($(CONFIG_HIGH_ACTIVE_HST2DEV), y) -+EXTRA_CFLAGS += -DHIGH_ACTIVE_HST2DEV=1 -+else -+EXTRA_CFLAGS += -DHIGH_ACTIVE_HST2DEV=0 -+endif -+ -+ifneq ($(CONFIG_WAKEUP_GPIO_IDX), default) -+EXTRA_CFLAGS += -DWAKEUP_GPIO_IDX=$(CONFIG_WAKEUP_GPIO_IDX) -+endif -+ -+ifeq ($(CONFIG_RTW_SDIO_PM_KEEP_POWER), y) -+ifeq ($(CONFIG_SDIO_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER -+endif -+endif -+ -+ifeq ($(CONFIG_REDUCE_TX_CPU_LOADING), y) -+EXTRA_CFLAGS += -DCONFIG_REDUCE_TX_CPU_LOADING -+endif -+ -+ifeq ($(CONFIG_BR_EXT), y) -+BR_NAME = br0 -+EXTRA_CFLAGS += -DCONFIG_BR_EXT -+EXTRA_CFLAGS += '-DCONFIG_BR_EXT_BRNAME="'$(BR_NAME)'"' -+endif -+ -+ -+ifeq ($(CONFIG_TDLS), y) -+EXTRA_CFLAGS += -DCONFIG_TDLS -+endif -+ -+ifeq ($(CONFIG_WIFI_MONITOR), y) -+EXTRA_CFLAGS += -DCONFIG_WIFI_MONITOR -+endif -+ -+ifeq ($(CONFIG_MCC_MODE), y) -+EXTRA_CFLAGS += -DCONFIG_MCC_MODE -+endif -+ -+ifeq ($(CONFIG_RTW_NAPI), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_NAPI -+endif -+ -+ifeq ($(CONFIG_RTW_GRO), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_GRO -+endif -+ -+ifeq ($(CONFIG_RTW_REPEATER_SON), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_REPEATER_SON -+endif -+ -+ifeq ($(CONFIG_RTW_IPCAM_APPLICATION), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_IPCAM_APPLICATION -+ifeq ($(CONFIG_WIFI_MONITOR), n) -+EXTRA_CFLAGS += -DCONFIG_WIFI_MONITOR -+endif -+endif -+ -+ifeq ($(CONFIG_RTW_NETIF_SG), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_NETIF_SG -+endif -+ -+ifeq ($(CONFIG_ICMP_VOQ), y) -+EXTRA_CFLAGS += -DCONFIG_ICMP_VOQ -+endif -+ -+ifeq ($(CONFIG_IP_R_MONITOR), y) -+EXTRA_CFLAGS += -DCONFIG_IP_R_MONITOR -+endif -+ -+ifeq ($(CONFIG_MP_VHT_HW_TX_MODE), y) -+EXTRA_CFLAGS += -DCONFIG_MP_VHT_HW_TX_MODE -+ifeq ($(CONFIG_PLATFORM_I386_PC), y) -+## For I386 X86 ToolChain use Hardware FLOATING -+EXTRA_CFLAGS += -mhard-float -+else -+## For ARM ToolChain use Hardware FLOATING -+EXTRA_CFLAGS += -mfloat-abi=hard -+endif -+endif -+ -+ifeq ($(CONFIG_APPEND_VENDOR_IE_ENABLE), y) -+EXTRA_CFLAGS += -DCONFIG_APPEND_VENDOR_IE_ENABLE -+endif -+ -+ifeq ($(CONFIG_RTW_DEBUG), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_DEBUG -+EXTRA_CFLAGS += -DRTW_LOG_LEVEL=$(CONFIG_RTW_LOG_LEVEL) -+endif -+ -+ifeq ($(CONFIG_PROC_DEBUG), y) -+EXTRA_CFLAGS += -DCONFIG_PROC_DEBUG -+endif -+ -+ifeq ($(CONFIG_RTW_UP_MAPPING_RULE), dscp) -+EXTRA_CFLAGS += -DCONFIG_RTW_UP_MAPPING_RULE=1 -+else -+EXTRA_CFLAGS += -DCONFIG_RTW_UP_MAPPING_RULE=0 -+endif -+ -+EXTRA_CFLAGS += -DDM_ODM_SUPPORT_TYPE=0x04 -+ -+ifeq ($(CONFIG_RTW_MBO), y) -+EXTRA_CFLAGS += -DCONFIG_RTW_MBO -DCONFIG_RTW_80211K -DCONFIG_RTW_WNM -DCONFIG_RTW_BTM_ROAM -+EXTRA_CFLAGS += -DCONFIG_RTW_80211R -+endif -+ -+ifeq ($(CONFIG_PLATFORM_I386_PC), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_RTW_80211R -+EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE -+ -+SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) -+ARCH ?= $(SUBARCH) -+CROSS_COMPILE ?= -+KVER := $(shell uname -r) -+KSRC := /lib/modules/$(KVER)/build -+MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ -+INSTALL_PREFIX := -+STAGINGMODDIR := /lib/modules/$(KVER)/kernel/drivers/staging -+endif -+ -+ifeq ($(CONFIG_PLATFORM_NV_TK1), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_NV_TK1 -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_PLATFORM_ANDROID -+# Enable this for Android 5.0 -+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -+EXTRA_CFLAGS += -DRTW_VENDOR_EXT_SUPPORT -+EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC -+ARCH ?= arm -+ -+CROSS_COMPILE := /mnt/newdisk/android_sdk/nvidia_tk1/android_L/prebuilts/gcc/linux-x86/arm/arm-eabi-4.8/bin/arm-eabi- -+KSRC :=/mnt/newdisk/android_sdk/nvidia_tk1/android_L/out/target/product/shieldtablet/obj/KERNEL/ -+MODULE_NAME = wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_NV_TK1_UBUNTU), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_NV_TK1 -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ -+ARCH ?= arm -+ -+CROSS_COMPILE ?= -+KVER := $(shell uname -r) -+KSRC := /lib/modules/$(KVER)/build -+MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ -+INSTALL_PREFIX := -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ACTIONS_ATM702X), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ACTIONS_ATM702X -+#ARCH := arm -+ARCH := $(R_ARCH) -+#CROSS_COMPILE := arm-none-linux-gnueabi- -+CROSS_COMPILE := $(R_CROSS_COMPILE) -+KVER:= 3.4.0 -+#KSRC := ../../../../build/out/kernel -+KSRC := $(KERNEL_BUILD_PATH) -+MODULE_NAME :=wlan -+endif -+ -+ -+ifeq ($(CONFIG_PLATFORM_ACTIONS_ATM705X), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+#EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC -+# default setting for Android 4.1, 4.2, 4.3, 4.4 -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ACTIONS_ATM705X -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ -+# Enable this for Android 5.0 -+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+_PLATFORM_FILES += platform/platform_arm_act_sdio.o -+endif -+ -+ARCH := arm -+CROSS_COMPILE := /opt/arm-2011.09/bin/arm-none-linux-gnueabi- -+KSRC := /home/android_sdk/Action-semi/705a_android_L/android/kernel -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_SUN50IW1P1), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN50IW1P1 -+EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+ -+# Enable this for Android 5.0 -+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -+ -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_PLATFORM_FILES += platform/platform_ARM_SUN50IW1P1_sdio.o -+endif -+ -+ARCH := arm64 -+# ===Cross compile setting for Android 5.1(64) SDK === -+CROSS_COMPILE := /home/android_sdk/Allwinner/a64/android-51/lichee/out/sun50iw1p1/android/common/buildroot/external-toolchain/bin/aarch64-linux-gnu- -+KSRC :=/home/android_sdk/Allwinner/a64/android-51/lichee/linux-3.10/ -+endif -+ -+ifeq ($(CONFIG_PLATFORM_TI_AM3517), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_SHUTTLE -+CROSS_COMPILE := arm-eabi- -+KSRC := $(shell pwd)/../../../Android/kernel -+ARCH := arm -+endif -+ -+ifeq ($(CONFIG_PLATFORM_MSTAR_TITANIA12), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR -DCONFIG_PLATFORM_MSTAR_TITANIA12 -+ARCH:=mips -+CROSS_COMPILE:= /usr/src/Mstar_kernel/mips-4.3/bin/mips-linux-gnu- -+KVER:= 2.6.28.9 -+KSRC:= /usr/src/Mstar_kernel/2.6.28.9/ -+endif -+ -+ifeq ($(CONFIG_PLATFORM_MSTAR), y) -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_MSTAR -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_MSTAR_HIGH -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -DCONFIG_FIX_NR_BULKIN_BUFFER -+endif -+ARCH:=arm -+CROSS_COMPILE:= /usr/src/bin/arm-none-linux-gnueabi- -+KVER:= 3.1.10 -+KSRC:= /usr/src/Mstar_kernel/3.1.10/ -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ANDROID_X86), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) -+ARCH := $(SUBARCH) -+CROSS_COMPILE := /media/DATA-2/android-x86/ics-x86_20120130/prebuilt/linux-x86/toolchain/i686-unknown-linux-gnu-4.2.1/bin/i686-unknown-linux-gnu- -+KSRC := /media/DATA-2/android-x86/ics-x86_20120130/out/target/product/generic_x86/obj/kernel -+MODULE_NAME :=wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ANDROID_INTEL_X86), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ANDROID_INTEL_X86 -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_INTEL_BYT -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_SKIP_SIGNAL_SCALE_MAPPING -+ifeq ($(CONFIG_SDIO_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE -+endif -+endif -+ -+ifeq ($(CONFIG_PLATFORM_JB_X86), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) -+ARCH := $(SUBARCH) -+CROSS_COMPILE := /home/android_sdk/android-x86_JB/prebuilts/gcc/linux-x86/x86/i686-linux-android-4.7/bin/i686-linux-android- -+KSRC := /home/android_sdk/android-x86_JB/out/target/product/x86/obj/kernel/ -+MODULE_NAME :=wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_PXA2XX), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ARCH := arm -+CROSS_COMPILE := arm-none-linux-gnueabi- -+KVER := 2.6.34.1 -+KSRC ?= /usr/src/linux-2.6.34.1 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_S3C2K4), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ARCH := arm -+CROSS_COMPILE := arm-linux- -+KVER := 2.6.24.7_$(ARCH) -+KSRC := /usr/src/kernels/linux-$(KVER) -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_S3C6K4), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ARCH := arm -+CROSS_COMPILE := arm-none-linux-gnueabi- -+KVER := 2.6.34.1 -+KSRC ?= /usr/src/linux-2.6.34.1 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_RTD2880B), y) -+EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -DCONFIG_PLATFORM_RTD2880B -+ARCH:= -+CROSS_COMPILE:= -+KVER:= -+KSRC:= -+endif -+ -+ifeq ($(CONFIG_PLATFORM_MIPS_RMI), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ARCH:=mips -+CROSS_COMPILE:=mipsisa32r2-uclibc- -+KVER:= -+KSRC:= /root/work/kernel_realtek -+endif -+ -+ifeq ($(CONFIG_PLATFORM_MIPS_PLM), y) -+EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -+ARCH:=mips -+CROSS_COMPILE:=mipsisa32r2-uclibc- -+KVER:= -+KSRC:= /root/work/kernel_realtek -+endif -+ -+ifeq ($(CONFIG_PLATFORM_MSTAR389), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR389 -+ARCH:=mips -+CROSS_COMPILE:= mips-linux-gnu- -+KVER:= 2.6.28.10 -+KSRC:= /home/mstar/mstar_linux/2.6.28.9/ -+endif -+ -+ifeq ($(CONFIG_PLATFORM_MIPS_AR9132), y) -+EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -+ARCH := mips -+CROSS_COMPILE := mips-openwrt-linux- -+KSRC := /home/alex/test_openwrt/tmp/linux-2.6.30.9 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_DMP_PHILIPS), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM -+ARCH := mips -+#CROSS_COMPILE:=/usr/local/msdk-4.3.6-mips-EL-2.6.12.6-0.9.30.3/bin/mipsel-linux- -+CROSS_COMPILE:=/usr/local/toolchain_mipsel/bin/mipsel-linux- -+KSRC ?=/usr/local/Jupiter/linux-2.6.12 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_RTK_DMP), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM -DCONFIG_WIRELESS_EXT -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+ifeq ($(CONFIG_USB_HCI), y) -+_PLATFORM_FILES += platform/platform_RTK_DMP_usb.o -+endif -+ARCH:=mips -+CROSS_COMPILE:=mipsel-linux- -+KVER:= -+KSRC ?= /usr/src/DMP_Kernel/jupiter/linux-2.6.12 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_MT53XX), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MT53XX -+ARCH:= arm -+CROSS_COMPILE:= arm11_mtk_le- -+KVER:= 2.6.27 -+KSRC?= /proj/mtk00802/BD_Compare/BDP/Dev/BDP_V301/BDP_Linux/linux-2.6.27 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_MX51_241H), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_WISTRON_PLATFORM -+ARCH := arm -+CROSS_COMPILE := /opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi- -+KVER := 2.6.31 -+KSRC ?= /lib/modules/2.6.31-770-g0e46b52/source -+endif -+ -+ifeq ($(CONFIG_PLATFORM_FS_MX61), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ARCH := arm -+CROSS_COMPILE := /home/share/CusEnv/FreeScale/arm-eabi-4.4.3/bin/arm-eabi- -+KSRC ?= /home/share/CusEnv/FreeScale/FS_kernel_env -+endif -+ -+ -+ -+ifeq ($(CONFIG_PLATFORM_ACTIONS_ATJ227X), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATJ227X -+ARCH := mips -+CROSS_COMPILE := /home/cnsd4/project/actions/tools-2.6.27/bin/mipsel-linux-gnu- -+KVER := 2.6.27 -+KSRC := /home/cnsd4/project/actions/linux-2.6.27.28 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_TI_DM365), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_TI_DM365 -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_RX -+EXTRA_CFLAGS += -DCONFIG_SINGLE_XMIT_BUF -DCONFIG_SINGLE_RECV_BUF -+ARCH := arm -+#CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le- -+#KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365 -+CROSS_COMPILE := /opt/montavista/pro5.0/devkit/arm/v5t_le/bin/arm-linux- -+KSRC:= /home/vivotek/lsp/DM365/kernel_platform/kernel/linux-2.6.18 -+KERNELOUTPUT := ${PRODUCTDIR}/tmp -+KVER := 2.6.18 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_MOZART), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MOZART -+ARCH := arm -+CROSS_COMPILE := /home/vivotek/lsp/mozart3v2/Mozart3e_Toolchain/build_arm_nofpu/usr/bin/arm-linux- -+KVER := $(shell uname -r) -+KSRC:= /opt/Vivotek/lsp/mozart3v2/kernel_platform/kernel/mozart_kernel-1.17 -+KERNELOUTPUT := /home/pink/sample/ODM/IP8136W-VINT/tmp/kernel -+endif -+ -+ifeq ($(CONFIG_PLATFORM_TEGRA3_CARDHU), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ARCH := arm -+CROSS_COMPILE := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- -+KSRC := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/out/target/product/cardhu/obj/KERNEL -+MODULE_NAME := wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_TEGRA4_DALMORE), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ARCH := arm -+CROSS_COMPILE := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- -+KSRC := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/out/target/product/dalmore/obj/KERNEL -+MODULE_NAME := wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_TCC8900), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ARCH := arm -+CROSS_COMPILE := /home/android_sdk/Telechips/SDK_2304_20110613/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- -+KSRC := /home/android_sdk/Telechips/SDK_2304_20110613/kernel -+MODULE_NAME := wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_TCC8920), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ARCH := arm -+CROSS_COMPILE := /home/android_sdk/Telechips/v12.06_r1-tcc-android-4.0.4/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- -+KSRC := /home/android_sdk/Telechips/v12.06_r1-tcc-android-4.0.4/kernel -+MODULE_NAME := wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_TCC8920_JB42), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ARCH := arm -+CROSS_COMPILE := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- -+KSRC := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/kernel -+MODULE_NAME := wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_RK2818), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ROCKCHIPS -+ARCH := arm -+CROSS_COMPILE := /usr/src/release_fae_version/toolchain/arm-eabi-4.4.0/bin/arm-eabi- -+KSRC := /usr/src/release_fae_version/kernel25_A7_281x -+MODULE_NAME := wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_RK3188), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ROCKCHIPS -+# default setting for Android 4.1, 4.2, 4.3, 4.4 -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_RTW_80211R -+# default setting for Power control -+#EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC -+ifeq ($(CONFIG_SDIO_HCI), y) -+EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN -+endif -+EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE -+# default setting for Special function -+ARCH := arm -+CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3188/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- -+KSRC := /home/android_sdk/Rockchip/Rk3188/kernel -+MODULE_NAME := 8723cs -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_RK3066), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_RK3066 -+EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -+ifeq ($(CONFIG_SDIO_HCI), y) -+EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN -+endif -+EXTRA_CFLAGS += -fno-pic -+ARCH := arm -+CROSS_COMPILE := /home/android_sdk/Rockchip/rk3066_20130607/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/bin/arm-linux-androideabi- -+#CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3066sdk/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/bin/arm-linux-androideabi- -+KSRC := /home/android_sdk/Rockchip/Rk3066sdk/kernel -+MODULE_NAME :=wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_URBETTER), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE -+ARCH := arm -+CROSS_COMPILE := /media/DATA-1/urbetter/arm-2009q3/bin/arm-none-linux-gnueabi- -+KSRC := /media/DATA-1/urbetter/ics-urbetter/kernel -+MODULE_NAME := wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_TI_PANDA), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE -+ARCH := arm -+#CROSS_COMPILE := /media/DATA-1/aosp/ics-aosp_20111227/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- -+#KSRC := /media/DATA-1/aosp/android-omap-panda-3.0_20120104 -+CROSS_COMPILE := /media/DATA-1/android-4.0/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- -+KSRC := /media/DATA-1/android-4.0/panda_kernel/omap -+MODULE_NAME := wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_MIPS_JZ4760), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_MINIMAL_MEMORY_USAGE -+ARCH ?= mips -+CROSS_COMPILE ?= /mnt/sdb5/Ingenic/Umido/mips-4.3/bin/mips-linux-gnu- -+KSRC ?= /mnt/sdb5/Ingenic/Umido/kernel -+endif -+ -+ifeq ($(CONFIG_PLATFORM_SZEBOOK), y) -+EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -+ARCH:=arm -+CROSS_COMPILE:=/opt/crosstool2/bin/armeb-unknown-linux-gnueabi- -+KVER:= 2.6.31.6 -+KSRC:= ../code/linux-2.6.31.6-2020/ -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_SUNxI), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUNxI -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+# default setting for A10-EVB mmc0 -+#EXTRA_CFLAGS += -DCONFIG_WITS_EVB_V13 -+_PLATFORM_FILES += platform/platform_ARM_SUNxI_sdio.o -+endif -+ -+ARCH := arm -+#CROSS_COMPILE := arm-none-linux-gnueabi- -+CROSS_COMPILE=/home/android_sdk/Allwinner/a10/android-jb42/lichee-jb42/buildroot/output/external-toolchain/bin/arm-none-linux-gnueabi- -+KVER := 3.0.8 -+#KSRC:= ../lichee/linux-3.0/ -+KSRC=/home/android_sdk/Allwinner/a10/android-jb42/lichee-jb42/linux-3.0 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_SUN6I), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN6I -+EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT -+# default setting for Android 4.1, 4.2, 4.3, 4.4 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION -+ -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+# default setting for A31-EVB mmc0 -+EXTRA_CFLAGS += -DCONFIG_A31_EVB -+_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o -+endif -+ -+ARCH := arm -+#Android-JB42 -+#CROSS_COMPILE := /home/android_sdk/Allwinner/a31/android-jb42/lichee/buildroot/output/external-toolchain/bin/arm-linux-gnueabi- -+#KSRC :=/home/android_sdk/Allwinner/a31/android-jb42/lichee/linux-3.3 -+#ifeq ($(CONFIG_USB_HCI), y) -+#MODULE_NAME := 8188eu_sw -+#endif -+# ==== Cross compile setting for kitkat-a3x_v4.5 ===== -+CROSS_COMPILE := /home/android_sdk/Allwinner/a31/kitkat-a3x_v4.5/lichee/buildroot/output/external-toolchain/bin/arm-linux-gnueabi- -+KSRC :=/home/android_sdk/Allwinner/a31/kitkat-a3x_v4.5/lichee/linux-3.3 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_SUN7I), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN7I -+EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT -+# default setting for Android 4.1, 4.2, 4.3, 4.4 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION -+ -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o -+endif -+ -+ARCH := arm -+# ===Cross compile setting for Android 4.2 SDK === -+#CROSS_COMPILE := /home/android_sdk/Allwinner/a20_evb/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- -+#KSRC := /home/android_sdk/Allwinner/a20_evb/lichee/linux-3.3 -+# ==== Cross compile setting for Android 4.3 SDK ===== -+#CROSS_COMPILE := /home/android_sdk/Allwinner/a20/android-jb43/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- -+#KSRC := /home/android_sdk/Allwinner/a20/android-jb43/lichee/linux-3.4 -+# ==== Cross compile setting for kitkat-a20_v4.4 ===== -+CROSS_COMPILE := /home/android_sdk/Allwinner/a20/kitkat-a20_v4.4/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- -+KSRC := /home/android_sdk/Allwinner/a20/kitkat-a20_v4.4/lichee/linux-3.4 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_SUN8I_W3P1), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN8I -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN8I_W3P1 -+EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o -+endif -+ -+ARCH := arm -+# ===Cross compile setting for Android 4.2 SDK === -+#CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-jb42/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- -+#KSRC :=/home/android_sdk/Allwinner/a23/android-jb42/lichee/linux-3.4 -+# ===Cross compile setting for Android 4.4 SDK === -+CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-kk44/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- -+KSRC :=/home/android_sdk/Allwinner/a23/android-kk44/lichee/linux-3.4 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_SUN8I_W5P1), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN8I -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN8I_W5P1 -+EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ -+# Enable this for Android 5.0 -+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -+ -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o -+endif -+ -+ARCH := arm -+# ===Cross compile setting for Android L SDK === -+CROSS_COMPILE := /home/android_sdk/Allwinner/a33/android-L/lichee/out/sun8iw5p1/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- -+KSRC :=/home/android_sdk/Allwinner/a33/android-L/lichee/linux-3.4 -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ACTIONS_ATV5201), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATV5201 -+EXTRA_CFLAGS += -DCONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP -+ARCH := mips -+CROSS_COMPILE := mipsel-linux-gnu- -+KVER := $(KERNEL_VER) -+KSRC:= $(CFGDIR)/../../kernel/linux-$(KERNEL_VER) -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_RTD299X), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ifeq ($(CONFIG_ANDROID), y) -+# Enable this for Android 5.0 -+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -+endif -+#ARCH, CROSS_COMPILE, KSRC,and MODDESTDIR are provided by external makefile -+INSTALL_PREFIX := -+MODULE_NAME := wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_RTD299X_LG), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DRTW_P2P_GROUP_INTERFACE=1 -+EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3 -+#EXTRA_CFLAGS += -DCONFIG_FIX_HWPORT -+EXTRA_CFLAGS += -DLGE_PRIVATE -+EXTRA_CFLAGS += -DPURE_SUPPLICANT -+EXTRA_CFLAGS += -DCONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP -DCONFIG_RTW_IOCTL_SET_COUNTRY -+EXTRA_CFLAGS += -DDBG_RX_DFRAME_RAW_DATA -+EXTRA_CFLAGS += -DRTW_REDUCE_SCAN_SWITCH_CH_TIME -+ARCH ?= arm -+KVER ?= -+ -+ifneq ($(PLATFORM), WEBOS) -+$(info PLATFORM is empty) -+CROSS_COMPILE ?= /mnt/newdisk/LGE/arm-lg115x-linux-gnueabi-4.8-2016.03-x86_64/bin/arm-lg115x-linux-gnueabi- -+KSRC ?= /mnt/newdisk/LGE/linux-rockhopper_k3lp_drd4tv_423 -+endif -+ -+CROSS_COMPILE ?= -+KSRC ?= $(LINUX_SRC) -+INSTALL_PREFIX ?= -+endif -+ -+ifeq ($(CONFIG_PLATFORM_HISILICON), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_HISILICON -+ifeq ($(SUPPORT_CONCURRENT),y) -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+endif -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ARCH := arm -+ifeq ($(CROSS_COMPILE),) -+ CROSS_COMPILE = arm-hisiv200-linux- -+endif -+MODULE_NAME := rtl8192eu -+ifeq ($(KSRC),) -+ KSRC := ../../../../../../kernel/linux-3.4.y -+endif -+endif -+ -+ifeq ($(CONFIG_PLATFORM_HISILICON_HI3798), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON_HI3798 -+#EXTRA_CFLAGS += -DCONFIG_PLATFORM_HISILICON_HI3798_MV200_HDMI_DONGLE -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+# default setting for Android -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -+EXTRA_CFLAGS += -DRTW_USE_CFG80211_STA_EVENT -+# default setting for Android 5.x and later -+#EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -+ -+# If system could power on and recognize Wi-Fi SDIO automatically, -+# platfrom operations are not necessary. -+#ifeq ($(CONFIG_SDIO_HCI), y) -+#EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+#_PLATFORM_FILES += platform/platform_hisilicon_hi3798_sdio.o -+#EXTRA_CFLAGS += -DCONFIG_HISI_SDIO_ID=1 -+#endif -+ -+ARCH ?= arm -+CROSS_COMPILE ?= /HiSTBAndroidV600R003C00SPC021_git_0512/device/hisilicon/bigfish/sdk/tools/linux/toolchains/arm-histbv310-linux/bin/arm-histbv310-linux- -+ifndef KSRC -+KSRC := /HiSTBAndroidV600R003C00SPC021_git_0512/device/hisilicon/bigfish/sdk/source/kernel/linux-3.18.y -+KSRC += O=/HiSTBAndroidV600R003C00SPC021_git_0512/out/target/product/Hi3798MV200/obj/KERNEL_OBJ -+endif -+ -+ifeq ($(CONFIG_RTL8822B), y) -+ifeq ($(CONFIG_SDIO_HCI), y) -+CONFIG_RTL8822BS ?= m -+USER_MODULE_NAME := rtl8822bs -+endif -+endif -+ -+endif -+ -+# Platform setting -+ifeq ($(CONFIG_PLATFORM_ARM_SPREADTRUM_6820), y) -+ifeq ($(CONFIG_ANDROID_2X), y) -+EXTRA_CFLAGS += -DANDROID_2X -+endif -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_SPRD -+EXTRA_CFLAGS += -DPLATFORM_SPREADTRUM_6820 -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ifeq ($(RTL871X), rtl8188e) -+EXTRA_CFLAGS += -DSOFTAP_PS_DURATION=50 -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+_PLATFORM_FILES += platform/platform_sprd_sdio.o -+endif -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_SPREADTRUM_8810), y) -+ifeq ($(CONFIG_ANDROID_2X), y) -+EXTRA_CFLAGS += -DANDROID_2X -+endif -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_SPRD -+EXTRA_CFLAGS += -DPLATFORM_SPREADTRUM_8810 -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+ifeq ($(RTL871X), rtl8188e) -+EXTRA_CFLAGS += -DSOFTAP_PS_DURATION=50 -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+_PLATFORM_FILES += platform/platform_sprd_sdio.o -+endif -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_WMT), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+ifeq ($(CONFIG_SDIO_HCI), y) -+_PLATFORM_FILES += platform/platform_ARM_WMT_sdio.o -+endif -+ARCH := arm -+CROSS_COMPILE := /home/android_sdk/WonderMedia/wm8880-android4.4/toolchain/arm_201103_gcc4.5.2/mybin/arm_1103_le- -+KSRC := /home/android_sdk/WonderMedia/wm8880-android4.4/kernel4.4/ -+MODULE_NAME :=8189es_kk -+endif -+ -+ifeq ($(CONFIG_PLATFORM_RTK119X), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+#EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN7I -+EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+#EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION -+EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION -+ -+#EXTRA_CFLAGS += -DCONFIG_#PLATFORM_OPS -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+#_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o -+endif -+ifeq ($(CONFIG_SDIO_HCI), y) -+_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o -+endif -+ -+ARCH := arm -+ -+# ==== Cross compile setting for Android 4.4 SDK ===== -+#CROSS_COMPILE := arm-linux-gnueabihf- -+KVER := 3.10.24 -+#KSRC :=/home/android_sdk/Allwinner/a20/android-kitkat44/lichee/linux-3.4 -+CROSS_COMPILE := /home/realtek/software_phoenix/phoenix/toolchain/usr/local/arm-2013.11/bin/arm-linux-gnueabihf- -+KSRC := /home/realtek/software_phoenix/linux-kernel -+MODULE_NAME := 8192eu -+ -+endif -+ -+# Actions-Micro use this flag for DHC 1195 and DHC 1395 -+ifeq ($(CONFIG_PLATFORM_RTK119X_AM), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_RTK119X_AM -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_FULL_CH_IN_P2P_HANDSHAKE -+EXTRA_CFLAGS += -DCONFIG_SEL_P2P_IFACE=2 -+EXTRA_CFLAGS += -DCONFIG_IFACE_NUMBER=3 -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+endif -+ -+ARCH := arm -+ -+#CROSS_COMPILE := arm-linux-gnueabihf- -+KVER := 3.10.24 -+#KSRC := -+CROSS_COMPILE := -+endif -+ -+ifeq ($(CONFIG_PLATFORM_RTK129X), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_RTK129X -+EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+#EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION -+EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION -+# Enable this for Android 5.0 -+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -+ifeq ($(CONFIG_RTL8821C)$(CONFIG_SDIO_HCI),yy) -+EXTRA_CFLAGS += -DCONFIG_WAKEUP_GPIO_INPUT_MODE -+EXTRA_CFLAGS += -DCONFIG_BT_WAKE_HST_OPEN_DRAIN -+endif -+EXTRA_CFLAGS += -Wno-error=date-time -+# default setting for Android 7.0 -+ifeq ($(RTK_ANDROID_VERSION), nougat) -+EXTRA_CFLAGS += -DRTW_P2P_GROUP_INTERFACE=1 -+endif -+#EXTRA_CFLAGS += -DCONFIG_#PLATFORM_OPS -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+endif -+ -+ARCH := arm64 -+ -+# ==== Cross compile setting for Android 4.4 SDK ===== -+#CROSS_COMPILE := arm-linux-gnueabihf- -+#KVER := 4.1.10 -+#CROSS_COMPILE := $(CROSS) -+#KSRC := $(LINUX_KERNEL_PATH) -+CROSS_COMPILE := /home/android_sdk/DHC/trunk-6.0.0_r1-QA160627/phoenix/toolchain/asdk64-4.9.4-a53-EL-3.10-g2.19-a64nt-160307/bin/asdk64-linux- -+KSRC := /home/android_sdk/DHC/trunk-6.0.0_r1-QA160627/linux-kernel -+endif -+ -+ifeq ($(CONFIG_PLATFORM_RTK1319), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_RTK1319 -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+#EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION -+EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION -+# Enable this for Android 5.0 -+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -+ifeq ($(CONFIG_RTL8821C)$(CONFIG_SDIO_HCI),yy) -+EXTRA_CFLAGS += -DCONFIG_WAKEUP_GPIO_INPUT_MODE -+EXTRA_CFLAGS += -DCONFIG_BT_WAKE_HST_OPEN_DRAIN -+endif -+EXTRA_CFLAGS += -Wno-error=date-time -+# default setting for Android 7.0 -+ifeq ($(RTK_ANDROID_VERSION), nougat) -+EXTRA_CFLAGS += -DRTW_P2P_GROUP_INTERFACE=1 -+endif -+#EXTRA_CFLAGS += -DCONFIG_#PLATFORM_OPS -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+endif -+ -+ARCH := arm64 -+ -+# ==== Cross compile setting for Android 4.4 SDK ===== -+#CROSS_COMPILE := arm-linux-gnueabihf- -+#KVER := 4.1.10 -+#CROSS_COMPILE := $(CROSS) -+#KSRC := $(LINUX_KERNEL_PATH) -+CROSS_COMPILE := /home/android_sdk/DHC/trunk-6.0.0_r1-QA160627/phoenix/toolchain/asdk64-4.9.4-a53-EL-3.10-g2.19-a64nt-160307/bin/asdk64-linux- -+KSRC := /home/android_sdk/DHC/trunk-6.0.0_r1-QA160627/linux-kernel -+endif -+ -+ifeq ($(CONFIG_PLATFORM_RTK390X), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_RTK390X -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_RTW_NETIF_SG -+ifeq ($(CONFIG_USB_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+endif -+ -+ARCH:=rlx -+ -+CROSS_COMPILE:=mips-linux- -+KSRC:= /home/realtek/share/Develop/IPCAM_SDK/RealSil/rts3901_sdk_v1.2_vanilla/linux-3.10 -+ -+endif -+ -+ifeq ($(CONFIG_PLATFORM_NOVATEK_NT72668), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_NOVATEK_NT72668 -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_RX -+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -+ARCH ?= arm -+CROSS_COMPILE := arm-linux-gnueabihf- -+KVER := 3.8.0 -+KSRC := /Custom/Novatek/TCL/linux-3.8_header -+#KSRC := $(KERNELDIR) -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ARM_TCC8930_JB42), y) -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+# default setting for Android 4.1, 4.2 -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -+ARCH := arm -+CROSS_COMPILE := /home/android_sdk/Telechips/v13.05_r1-tcc-android-4.2.2_tcc893x-evm_build/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- -+KSRC := /home/android_sdk/Telechips/v13.05_r1-tcc-android-4.2.2_tcc893x-evm_build/kernel -+MODULE_NAME := wlan -+endif -+ -+ifeq ($(CONFIG_PLATFORM_RTL8197D), y) -+EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -DCONFIG_PLATFORM_RTL8197D -+export DIR_LINUX=$(shell pwd)/../SDK/rlxlinux-sdk321-v50/linux-2.6.30 -+ARCH ?= rlx -+CROSS_COMPILE:= $(DIR_LINUX)/../toolchain/rsdk-1.5.5-5281-EB-2.6.30-0.9.30.3-110714/bin/rsdk-linux- -+KSRC := $(DIR_LINUX) -+endif -+ -+ifeq ($(CONFIG_PLATFORM_AML_S905), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_AML_S905 -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -fno-pic -+# default setting for Android -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -+EXTRA_CFLAGS += -DRTW_USE_CFG80211_STA_EVENT -+# default setting for Android 5.x and later -+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+_PLATFORM_FILES += platform/platform_aml_s905_sdio.o -+endif -+ -+ARCH ?= arm64 -+CROSS_COMPILE ?= /4.4_S905L_8822bs_compile/gcc-linaro-aarch64-linux-gnu-4.9-2014.09_linux/bin/aarch64-linux-gnu- -+ifndef KSRC -+KSRC := /4.4_S905L_8822bs_compile/common -+# To locate output files in a separate directory. -+KSRC += O=/4.4_S905L_8822bs_compile/KERNEL_OBJ -+endif -+ -+ifeq ($(CONFIG_RTL8822B), y) -+ifeq ($(CONFIG_SDIO_HCI), y) -+CONFIG_RTL8822BS ?= m -+USER_MODULE_NAME := 8822bs -+endif -+endif -+ -+endif -+ -+ifeq ($(CONFIG_PLATFORM_ZTE_ZX296716), y) -+EXTRA_CFLAGS += -Wno-error=date-time -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_ZTE_ZX296716 -+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -+# default setting for Android -+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE -+EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -+EXTRA_CFLAGS += -DRTW_USE_CFG80211_STA_EVENT -+# default setting for Android 5.x and later -+#EXTRA_CFLAGS += -DCONFIG_RADIO_WORK -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+# mark this temporarily -+#EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS -+#_PLATFORM_FILES += platform/platform_zte_zx296716_sdio.o -+endif -+ -+ARCH ?= arm64 -+CROSS_COMPILE ?= -+KSRC ?= -+ -+ifeq ($(CONFIG_RTL8822B), y) -+ifeq ($(CONFIG_SDIO_HCI), y) -+CONFIG_RTL8822BS ?= m -+USER_MODULE_NAME := 8822bs -+endif -+endif -+ -+endif -+ -+########### CUSTOMER ################################ -+ifeq ($(CONFIG_CUSTOMER_HUAWEI_GENERAL), y) -+CONFIG_CUSTOMER_HUAWEI = y -+endif -+ -+ifeq ($(CONFIG_CUSTOMER_HUAWEI), y) -+EXTRA_CFLAGS += -DCONFIG_HUAWEI_PROC -+endif -+ -+CONFIG_PLATFORM_CMAP_INTFS = n -+ifeq ($(CONFIG_PLATFORM_CMAP_INTFS), y) -+PLATFORM_CMAP_INTFS_TYPE = 00 -+EXTRA_CFLAGS += -DCONFIG_PLATFORM_CMAP_INTFS -DCMAP_UNASSOC_METRICS_STA_MAX=32 -+_OS_INTFS_FILES += os_dep/linux/custom_multiap_intfs/custom_multiap_intfs.o -+_PLATFORM_FILES += platform/custom_multiap_intfs_$(PLATFORM_CMAP_INTFS_TYPE).o -+endif -+ -+ifeq ($(CONFIG_MULTIDRV), y) -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+MODULE_NAME := rtw_sdio -+endif -+ -+ifeq ($(CONFIG_USB_HCI), y) -+MODULE_NAME := rtw_usb -+endif -+ -+ifeq ($(CONFIG_PCI_HCI), y) -+MODULE_NAME := rtw_pci -+endif -+ -+ -+endif -+ -+USER_MODULE_NAME ?= -+ifneq ($(USER_MODULE_NAME),) -+MODULE_NAME := $(USER_MODULE_NAME) -+endif -+ -+ifneq ($(KERNELRELEASE),) -+ -+########### this part for *.mk ############################ -+include $(srctree)/$(src)/hal/phydm/phydm.mk -+ -+########### HAL_RTL8822B ################################# -+ifeq ($(CONFIG_RTL8822B), y) -+include $(srctree)/$(src)/rtl8822b.mk -+endif -+ -+########### HAL_RTL8821C ################################# -+ifeq ($(CONFIG_RTL8821C), y) -+include $(srctree)/$(src)/rtl8821c.mk -+endif -+ -+########### HAL_RTL8822C ################################# -+ifeq ($(CONFIG_RTL8822C), y) -+include $(srctree)/$(src)/rtl8822c.mk -+endif -+ -+########### HAL_RTL8814B ################################# -+ifeq ($(CONFIG_RTL8814B), y) -+include $(srctree)/$(src)/rtl8814b.mk -+endif -+ -+########### HAL_RTL8723F ################################# -+ifeq ($(CONFIG_RTL8723F), y) -+include $(srctree)/$(src)/rtl8723f.mk -+endif -+ -+rtk_core := core/rtw_cmd.o \ -+ core/rtw_security.o \ -+ core/rtw_debug.o \ -+ core/rtw_io.o \ -+ core/rtw_ioctl_query.o \ -+ core/rtw_ioctl_set.o \ -+ core/rtw_ieee80211.o \ -+ core/rtw_mlme.o \ -+ core/rtw_mlme_ext.o \ -+ core/rtw_mi.o \ -+ core/rtw_wlan_util.o \ -+ core/rtw_vht.o \ -+ core/rtw_pwrctrl.o \ -+ core/rtw_rf.o \ -+ core/rtw_chplan.o \ -+ core/monitor/rtw_radiotap.o \ -+ core/rtw_recv.o \ -+ core/rtw_sta_mgt.o \ -+ core/rtw_ap.o \ -+ core/wds/rtw_wds.o \ -+ core/mesh/rtw_mesh.o \ -+ core/mesh/rtw_mesh_pathtbl.o \ -+ core/mesh/rtw_mesh_hwmp.o \ -+ core/rtw_xmit.o \ -+ core/rtw_p2p.o \ -+ core/rtw_rson.o \ -+ core/rtw_tdls.o \ -+ core/rtw_br_ext.o \ -+ core/rtw_iol.o \ -+ core/rtw_sreset.o \ -+ core/rtw_btcoex_wifionly.o \ -+ core/rtw_btcoex.o \ -+ core/rtw_beamforming.o \ -+ core/rtw_odm.o \ -+ core/rtw_rm.o \ -+ core/rtw_rm_fsm.o \ -+ core/rtw_ft.o \ -+ core/rtw_wnm.o \ -+ core/rtw_mbo.o \ -+ core/rtw_rm_util.o \ -+ core/efuse/rtw_efuse.o \ -+ core/rtw_roch.o -+ -+ifeq ($(CONFIG_SDIO_HCI), y) -+rtk_core += core/rtw_sdio.o -+endif -+ -+EXTRA_CFLAGS += -I$(srctree)/$(src)/core/crypto -+rtk_core += \ -+ core/crypto/aes-internal.o \ -+ core/crypto/aes-internal-enc.o \ -+ core/crypto/aes-gcm.o \ -+ core/crypto/aes-ccm.o \ -+ core/crypto/aes-omac1.o \ -+ core/crypto/ccmp.o \ -+ core/crypto/gcmp.o \ -+ core/crypto/aes-siv.o \ -+ core/crypto/aes-ctr.o \ -+ core/crypto/sha256-internal.o \ -+ core/crypto/sha256.o \ -+ core/crypto/sha256-prf.o \ -+ core/crypto/rtw_crypto_wrap.o \ -+ core/rtw_swcrypto.o -+ -+$(MODULE_NAME)-y += $(rtk_core) -+ -+$(MODULE_NAME)-$(CONFIG_WAPI_SUPPORT) += core/rtw_wapi.o \ -+ core/rtw_wapi_sms4.o -+ -+$(MODULE_NAME)-y += $(_OS_INTFS_FILES) -+$(MODULE_NAME)-y += $(_HAL_INTFS_FILES) -+$(MODULE_NAME)-y += $(_PHYDM_FILES) -+$(MODULE_NAME)-y += $(_BTC_FILES) -+$(MODULE_NAME)-y += $(_PLATFORM_FILES) -+ -+$(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o -+ -+ifeq ($(CONFIG_RTL8723B), y) -+$(MODULE_NAME)-$(CONFIG_MP_INCLUDED)+= core/rtw_bt_mp.o -+endif -+ -+obj-$(CONFIG_RTL8723CS) := $(MODULE_NAME).o -+ -+else -+ -+export CONFIG_RTL8723CS = m -+ -+all: modules -+ -+modules: -+ $(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) -C $(KSRC) M=$(shell pwd) modules -+ -+strip: -+ $(CROSS_COMPILE)strip $(MODULE_NAME).ko --strip-unneeded -+ -+install: -+ install -p -m 644 $(MODULE_NAME).ko $(MODDESTDIR) -+ /sbin/depmod -a ${KVER} -+ -+uninstall: -+ rm -f $(MODDESTDIR)/$(MODULE_NAME).ko -+ /sbin/depmod -a ${KVER} -+ -+backup_rtlwifi: -+ @echo "Making backup rtlwifi drivers" -+ifneq (,$(wildcard $(STAGINGMODDIR)/rtl*)) -+ @tar cPf $(wildcard $(STAGINGMODDIR))/backup_rtlwifi_driver.tar $(wildcard $(STAGINGMODDIR)/rtl*) -+ @rm -rf $(wildcard $(STAGINGMODDIR)/rtl*) -+endif -+ifneq (,$(wildcard $(MODDESTDIR)realtek)) -+ @tar cPf $(MODDESTDIR)backup_rtlwifi_driver.tar $(MODDESTDIR)realtek -+ @rm -fr $(MODDESTDIR)realtek -+endif -+ifneq (,$(wildcard $(MODDESTDIR)rtl*)) -+ @tar cPf $(MODDESTDIR)../backup_rtlwifi_driver.tar $(wildcard $(MODDESTDIR)rtl*) -+ @rm -fr $(wildcard $(MODDESTDIR)rtl*) -+endif -+ @/sbin/depmod -a ${KVER} -+ @echo "Please reboot your system" -+ -+restore_rtlwifi: -+ @echo "Restoring backups" -+ifneq (,$(wildcard $(STAGINGMODDIR)/backup_rtlwifi_driver.tar)) -+ @tar xPf $(STAGINGMODDIR)/backup_rtlwifi_driver.tar -+ @rm $(STAGINGMODDIR)/backup_rtlwifi_driver.tar -+endif -+ifneq (,$(wildcard $(MODDESTDIR)backup_rtlwifi_driver.tar)) -+ @tar xPf $(MODDESTDIR)backup_rtlwifi_driver.tar -+ @rm $(MODDESTDIR)backup_rtlwifi_driver.tar -+endif -+ifneq (,$(wildcard $(MODDESTDIR)../backup_rtlwifi_driver.tar)) -+ @tar xPf $(MODDESTDIR)../backup_rtlwifi_driver.tar -+ @rm $(MODDESTDIR)../backup_rtlwifi_driver.tar -+endif -+ @/sbin/depmod -a ${KVER} -+ @echo "Please reboot your system" -+ -+config_r: -+ @echo "make config" -+ /bin/bash script/Configure script/config.in -+ -+ -+.PHONY: modules clean -+ -+clean: -+ #$(MAKE) -C $(KSRC) M=$(shell pwd) clean -+ cd hal ; rm -fr */*/*/*.mod.c */*/*/*.mod */*/*/*.o */*/*/.*.cmd */*/*/*.ko -+ cd hal ; rm -fr */*/*.mod.c */*/*.mod */*/*.o */*/.*.cmd */*/*.ko -+ cd hal ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko -+ cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko -+ cd core ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko -+ cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko -+ cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko -+ cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko -+ cd platform ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko -+ rm -fr Module.symvers ; rm -fr Module.markers ; rm -fr modules.order -+ rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~ -+ rm -fr .tmp_versions -+endif -+ -diff --git a/drivers/staging/rtl8723cs/clean b/drivers/staging/rtl8723cs/clean -new file mode 100644 -index 000000000000..87664218b889 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/clean -@@ -0,0 +1,5 @@ -+#!/bin/bash -+rmmod 8192cu -+rmmod 8192ce -+rmmod 8192du -+rmmod 8192de -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes-ccm.c b/drivers/staging/rtl8723cs/core/crypto/aes-ccm.c -new file mode 100644 -index 000000000000..a2309b5f14f5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes-ccm.c -@@ -0,0 +1,211 @@ -+/* -+ * Counter with CBC-MAC (CCM) with AES -+ * -+ * Copyright (c) 2010-2012, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+#include "aes.h" -+#include "aes_wrap.h" -+ -+ -+static void xor_aes_block(u8 *dst, const u8 *src) -+{ -+ u32 *d = (u32 *) dst; -+ u32 *s = (u32 *) src; -+ *d++ ^= *s++; -+ *d++ ^= *s++; -+ *d++ ^= *s++; -+ *d++ ^= *s++; -+} -+ -+ -+static void aes_ccm_auth_start(void *aes, size_t M, size_t L, const u8 *nonce, -+ const u8 *aad, size_t aad_len, size_t plain_len, -+ u8 *x) -+{ -+ u8 aad_buf[2 * AES_BLOCK_SIZE]; -+ u8 b[AES_BLOCK_SIZE]; -+ -+ /* Authentication */ -+ /* B_0: Flags | Nonce N | l(m) */ -+ b[0] = aad_len ? 0x40 : 0 /* Adata */; -+ b[0] |= (((M - 2) / 2) /* M' */ << 3); -+ b[0] |= (L - 1) /* L' */; -+ os_memcpy(&b[1], nonce, 15 - L); -+ WPA_PUT_BE16(&b[AES_BLOCK_SIZE - L], plain_len); -+ -+ wpa_hexdump_key(_MSG_EXCESSIVE_, "CCM B_0", b, AES_BLOCK_SIZE); -+ aes_encrypt_128(aes, b, x); /* X_1 = E(K, B_0) */ -+ -+ if (!aad_len) -+ return; -+ -+ WPA_PUT_BE16(aad_buf, aad_len); -+ os_memcpy(aad_buf + 2, aad, aad_len); -+ os_memset(aad_buf + 2 + aad_len, 0, sizeof(aad_buf) - 2 - aad_len); -+ -+ xor_aes_block(aad_buf, x); -+ aes_encrypt_128(aes, aad_buf, x); /* X_2 = E(K, X_1 XOR B_1) */ -+ -+ if (aad_len > AES_BLOCK_SIZE - 2) { -+ xor_aes_block(&aad_buf[AES_BLOCK_SIZE], x); -+ /* X_3 = E(K, X_2 XOR B_2) */ -+ aes_encrypt_128(aes, &aad_buf[AES_BLOCK_SIZE], x); -+ } -+} -+ -+ -+static void aes_ccm_auth(void *aes, const u8 *data, size_t len, u8 *x) -+{ -+ size_t last = len % AES_BLOCK_SIZE; -+ size_t i; -+ -+ for (i = 0; i < len / AES_BLOCK_SIZE; i++) { -+ /* X_i+1 = E(K, X_i XOR B_i) */ -+ xor_aes_block(x, data); -+ data += AES_BLOCK_SIZE; -+ aes_encrypt_128(aes, x, x); -+ } -+ if (last) { -+ /* XOR zero-padded last block */ -+ for (i = 0; i < last; i++) -+ x[i] ^= *data++; -+ aes_encrypt_128(aes, x, x); -+ } -+} -+ -+ -+static void aes_ccm_encr_start(size_t L, const u8 *nonce, u8 *a) -+{ -+ /* A_i = Flags | Nonce N | Counter i */ -+ a[0] = L - 1; /* Flags = L' */ -+ os_memcpy(&a[1], nonce, 15 - L); -+} -+ -+ -+static void aes_ccm_encr(void *aes, size_t L, const u8 *in, size_t len, u8 *out, -+ u8 *a) -+{ -+ size_t last = len % AES_BLOCK_SIZE; -+ size_t i; -+ -+ /* crypt = msg XOR (S_1 | S_2 | ... | S_n) */ -+ for (i = 1; i <= len / AES_BLOCK_SIZE; i++) { -+ WPA_PUT_BE16(&a[AES_BLOCK_SIZE - 2], i); -+ /* S_i = E(K, A_i) */ -+ aes_encrypt_128(aes, a, out); -+ xor_aes_block(out, in); -+ out += AES_BLOCK_SIZE; -+ in += AES_BLOCK_SIZE; -+ } -+ if (last) { -+ WPA_PUT_BE16(&a[AES_BLOCK_SIZE - 2], i); -+ aes_encrypt_128(aes, a, out); -+ /* XOR zero-padded last block */ -+ for (i = 0; i < last; i++) -+ *out++ ^= *in++; -+ } -+} -+ -+ -+static void aes_ccm_encr_auth(void *aes, size_t M, u8 *x, u8 *a, u8 *auth) -+{ -+ size_t i; -+ u8 tmp[AES_BLOCK_SIZE]; -+ -+ wpa_hexdump_key(_MSG_EXCESSIVE_, "CCM T", x, M); -+ /* U = T XOR S_0; S_0 = E(K, A_0) */ -+ WPA_PUT_BE16(&a[AES_BLOCK_SIZE - 2], 0); -+ aes_encrypt_128(aes, a, tmp); -+ for (i = 0; i < M; i++) -+ auth[i] = x[i] ^ tmp[i]; -+ wpa_hexdump_key(_MSG_EXCESSIVE_, "CCM U", auth, M); -+} -+ -+ -+static void aes_ccm_decr_auth(void *aes, size_t M, u8 *a, const u8 *auth, u8 *t) -+{ -+ size_t i; -+ u8 tmp[AES_BLOCK_SIZE]; -+ -+ wpa_hexdump_key(_MSG_EXCESSIVE_, "CCM U", auth, M); -+ /* U = T XOR S_0; S_0 = E(K, A_0) */ -+ WPA_PUT_BE16(&a[AES_BLOCK_SIZE - 2], 0); -+ aes_encrypt_128(aes, a, tmp); -+ for (i = 0; i < M; i++) -+ t[i] = auth[i] ^ tmp[i]; -+ wpa_hexdump_key(_MSG_EXCESSIVE_, "CCM T", t, M); -+} -+ -+ -+/* AES-CCM with fixed L=2 and aad_len <= 30 assumption */ -+int aes_ccm_ae(const u8 *key, size_t key_len, const u8 *nonce, -+ size_t M, const u8 *plain, size_t plain_len, -+ const u8 *aad, size_t aad_len, u8 *crypt, u8 *auth) -+{ -+ const size_t L = 2; -+ void *aes; -+ u8 x[AES_BLOCK_SIZE], a[AES_BLOCK_SIZE]; -+ -+ if (aad_len > 30 || M > AES_BLOCK_SIZE) -+ return -1; -+ -+ aes = aes_encrypt_init(key, key_len); -+ if (aes == NULL) -+ return -1; -+ -+ aes_ccm_auth_start(aes, M, L, nonce, aad, aad_len, plain_len, x); -+ aes_ccm_auth(aes, plain, plain_len, x); -+ -+ /* Encryption */ -+ aes_ccm_encr_start(L, nonce, a); -+ aes_ccm_encr(aes, L, plain, plain_len, crypt, a); -+ aes_ccm_encr_auth(aes, M, x, a, auth); -+ -+ aes_encrypt_deinit(aes); -+ -+ return 0; -+} -+ -+ -+/* AES-CCM with fixed L=2 and aad_len <= 30 assumption */ -+int aes_ccm_ad(const u8 *key, size_t key_len, const u8 *nonce, -+ size_t M, const u8 *crypt, size_t crypt_len, -+ const u8 *aad, size_t aad_len, const u8 *auth, u8 *plain) -+{ -+ const size_t L = 2; -+ void *aes; -+ u8 x[AES_BLOCK_SIZE], a[AES_BLOCK_SIZE]; -+ u8 t[AES_BLOCK_SIZE]; -+ -+ if (aad_len > 30 || M > AES_BLOCK_SIZE) -+ return -1; -+ -+ aes = aes_encrypt_init(key, key_len); -+ if (aes == NULL) -+ return -1; -+ -+ /* Decryption */ -+ aes_ccm_encr_start(L, nonce, a); -+ aes_ccm_decr_auth(aes, M, a, auth, t); -+ -+ /* plaintext = msg XOR (S_1 | S_2 | ... | S_n) */ -+ aes_ccm_encr(aes, L, crypt, crypt_len, plain, a); -+ -+ aes_ccm_auth_start(aes, M, L, nonce, aad, aad_len, crypt_len, x); -+ aes_ccm_auth(aes, plain, crypt_len, x); -+ -+ aes_encrypt_deinit(aes); -+ -+ if (os_memcmp_const(x, t, M) != 0) { -+ wpa_printf(_MSG_EXCESSIVE_, "CCM: Auth mismatch"); -+ return -1; -+ } -+ -+ return 0; -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes-ctr.c b/drivers/staging/rtl8723cs/core/crypto/aes-ctr.c -new file mode 100644 -index 000000000000..9533709b7485 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes-ctr.c -@@ -0,0 +1,70 @@ -+/* -+ * AES-128/192/256 CTR -+ * -+ * Copyright (c) 2003-2007, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+#include "aes.h" -+#include "aes_wrap.h" -+ -+/** -+ * aes_ctr_encrypt - AES-128/192/256 CTR mode encryption -+ * @key: Key for encryption (key_len bytes) -+ * @key_len: Length of the key (16, 24, or 32 bytes) -+ * @nonce: Nonce for counter mode (16 bytes) -+ * @data: Data to encrypt in-place -+ * @data_len: Length of data in bytes -+ * Returns: 0 on success, -1 on failure -+ */ -+int aes_ctr_encrypt(const u8 *key, size_t key_len, const u8 *nonce, -+ u8 *data, size_t data_len) -+{ -+ void *ctx; -+ size_t j, len, left = data_len; -+ int i; -+ u8 *pos = data; -+ u8 counter[AES_BLOCK_SIZE], buf[AES_BLOCK_SIZE]; -+ -+ ctx = aes_encrypt_init(key, key_len); -+ if (ctx == NULL) -+ return -1; -+ os_memcpy(counter, nonce, AES_BLOCK_SIZE); -+ -+ while (left > 0) { -+ aes_encrypt_128(ctx, counter, buf); -+ -+ len = (left < AES_BLOCK_SIZE) ? left : AES_BLOCK_SIZE; -+ for (j = 0; j < len; j++) -+ pos[j] ^= buf[j]; -+ pos += len; -+ left -= len; -+ -+ for (i = AES_BLOCK_SIZE - 1; i >= 0; i--) { -+ counter[i]++; -+ if (counter[i]) -+ break; -+ } -+ } -+ aes_encrypt_deinit(ctx); -+ return 0; -+} -+ -+ -+/** -+ * aes_128_ctr_encrypt - AES-128 CTR mode encryption -+ * @key: Key for encryption (key_len bytes) -+ * @nonce: Nonce for counter mode (16 bytes) -+ * @data: Data to encrypt in-place -+ * @data_len: Length of data in bytes -+ * Returns: 0 on success, -1 on failure -+ */ -+int aes_128_ctr_encrypt(const u8 *key, const u8 *nonce, -+ u8 *data, size_t data_len) -+{ -+ return aes_ctr_encrypt(key, 16, nonce, data, data_len); -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes-gcm.c b/drivers/staging/rtl8723cs/core/crypto/aes-gcm.c -new file mode 100644 -index 000000000000..76061f53db24 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes-gcm.c -@@ -0,0 +1,326 @@ -+/* -+ * Galois/Counter Mode (GCM) and GMAC with AES -+ * -+ * Copyright (c) 2012, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+#include "aes.h" -+#include "aes_wrap.h" -+ -+static void inc32(u8 *block) -+{ -+ u32 val; -+ val = WPA_GET_BE32(block + AES_BLOCK_SIZE - 4); -+ val++; -+ WPA_PUT_BE32(block + AES_BLOCK_SIZE - 4, val); -+} -+ -+ -+static void xor_block(u8 *dst, const u8 *src) -+{ -+ u32 *d = (u32 *) dst; -+ u32 *s = (u32 *) src; -+ *d++ ^= *s++; -+ *d++ ^= *s++; -+ *d++ ^= *s++; -+ *d++ ^= *s++; -+} -+ -+ -+static void shift_right_block(u8 *v) -+{ -+ u32 val; -+ -+ val = WPA_GET_BE32(v + 12); -+ val >>= 1; -+ if (v[11] & 0x01) -+ val |= 0x80000000; -+ WPA_PUT_BE32(v + 12, val); -+ -+ val = WPA_GET_BE32(v + 8); -+ val >>= 1; -+ if (v[7] & 0x01) -+ val |= 0x80000000; -+ WPA_PUT_BE32(v + 8, val); -+ -+ val = WPA_GET_BE32(v + 4); -+ val >>= 1; -+ if (v[3] & 0x01) -+ val |= 0x80000000; -+ WPA_PUT_BE32(v + 4, val); -+ -+ val = WPA_GET_BE32(v); -+ val >>= 1; -+ WPA_PUT_BE32(v, val); -+} -+ -+ -+/* Multiplication in GF(2^128) */ -+static void gf_mult(const u8 *x, const u8 *y, u8 *z) -+{ -+ u8 v[16]; -+ int i, j; -+ -+ os_memset(z, 0, 16); /* Z_0 = 0^128 */ -+ os_memcpy(v, y, 16); /* V_0 = Y */ -+ -+ for (i = 0; i < 16; i++) { -+ for (j = 0; j < 8; j++) { -+ if (x[i] & BIT(7 - j)) { -+ /* Z_(i + 1) = Z_i XOR V_i */ -+ xor_block(z, v); -+ } else { -+ /* Z_(i + 1) = Z_i */ -+ } -+ -+ if (v[15] & 0x01) { -+ /* V_(i + 1) = (V_i >> 1) XOR R */ -+ shift_right_block(v); -+ /* R = 11100001 || 0^120 */ -+ v[0] ^= 0xe1; -+ } else { -+ /* V_(i + 1) = V_i >> 1 */ -+ shift_right_block(v); -+ } -+ } -+ } -+} -+ -+ -+static void ghash_start(u8 *y) -+{ -+ /* Y_0 = 0^128 */ -+ os_memset(y, 0, 16); -+} -+ -+ -+static void ghash(const u8 *h, const u8 *x, size_t xlen, u8 *y) -+{ -+ size_t m, i; -+ const u8 *xpos = x; -+ u8 tmp[16]; -+ -+ m = xlen / 16; -+ -+ for (i = 0; i < m; i++) { -+ /* Y_i = (Y^(i-1) XOR X_i) dot H */ -+ xor_block(y, xpos); -+ xpos += 16; -+ -+ /* dot operation: -+ * multiplication operation for binary Galois (finite) field of -+ * 2^128 elements */ -+ gf_mult(y, h, tmp); -+ os_memcpy(y, tmp, 16); -+ } -+ -+ if (x + xlen > xpos) { -+ /* Add zero padded last block */ -+ size_t last = x + xlen - xpos; -+ os_memcpy(tmp, xpos, last); -+ os_memset(tmp + last, 0, sizeof(tmp) - last); -+ -+ /* Y_i = (Y^(i-1) XOR X_i) dot H */ -+ xor_block(y, tmp); -+ -+ /* dot operation: -+ * multiplication operation for binary Galois (finite) field of -+ * 2^128 elements */ -+ gf_mult(y, h, tmp); -+ os_memcpy(y, tmp, 16); -+ } -+ -+ /* Return Y_m */ -+} -+ -+ -+static void aes_gctr(void *aes, const u8 *icb, const u8 *x, size_t xlen, u8 *y) -+{ -+ size_t i, n, last; -+ u8 cb[AES_BLOCK_SIZE], tmp[AES_BLOCK_SIZE]; -+ const u8 *xpos = x; -+ u8 *ypos = y; -+ -+ if (xlen == 0) -+ return; -+ -+ n = xlen / 16; -+ -+ os_memcpy(cb, icb, AES_BLOCK_SIZE); -+ /* Full blocks */ -+ for (i = 0; i < n; i++) { -+ aes_encrypt_128(aes, cb, ypos); -+ xor_block(ypos, xpos); -+ xpos += AES_BLOCK_SIZE; -+ ypos += AES_BLOCK_SIZE; -+ inc32(cb); -+ } -+ -+ last = x + xlen - xpos; -+ if (last) { -+ /* Last, partial block */ -+ aes_encrypt_128(aes, cb, tmp); -+ for (i = 0; i < last; i++) -+ *ypos++ = *xpos++ ^ tmp[i]; -+ } -+} -+ -+ -+static void * aes_gcm_init_hash_subkey(const u8 *key, size_t key_len, u8 *H) -+{ -+ void *aes; -+ -+ aes = aes_encrypt_init(key, key_len); -+ if (aes == NULL) -+ return NULL; -+ -+ /* Generate hash subkey H = AES_K(0^128) */ -+ os_memset(H, 0, AES_BLOCK_SIZE); -+ aes_encrypt_128(aes, H, H); -+ wpa_hexdump_key(_MSG_EXCESSIVE_, "Hash subkey H for GHASH", -+ H, AES_BLOCK_SIZE); -+ return aes; -+} -+ -+ -+static void aes_gcm_prepare_j0(const u8 *iv, size_t iv_len, const u8 *H, u8 *J0) -+{ -+ u8 len_buf[16]; -+ -+ if (iv_len == 12) { -+ /* Prepare block J_0 = IV || 0^31 || 1 [len(IV) = 96] */ -+ os_memcpy(J0, iv, iv_len); -+ os_memset(J0 + iv_len, 0, AES_BLOCK_SIZE - iv_len); -+ J0[AES_BLOCK_SIZE - 1] = 0x01; -+ } else { -+ /* -+ * s = 128 * ceil(len(IV)/128) - len(IV) -+ * J_0 = GHASH_H(IV || 0^(s+64) || [len(IV)]_64) -+ */ -+ ghash_start(J0); -+ ghash(H, iv, iv_len, J0); -+ WPA_PUT_BE64(len_buf, 0); -+ WPA_PUT_BE64(len_buf + 8, iv_len * 8); -+ ghash(H, len_buf, sizeof(len_buf), J0); -+ } -+} -+ -+ -+static void aes_gcm_gctr(void *aes, const u8 *J0, const u8 *in, size_t len, -+ u8 *out) -+{ -+ u8 J0inc[AES_BLOCK_SIZE]; -+ -+ if (len == 0) -+ return; -+ -+ os_memcpy(J0inc, J0, AES_BLOCK_SIZE); -+ inc32(J0inc); -+ aes_gctr(aes, J0inc, in, len, out); -+} -+ -+ -+static void aes_gcm_ghash(const u8 *H, const u8 *aad, size_t aad_len, -+ const u8 *crypt, size_t crypt_len, u8 *S) -+{ -+ u8 len_buf[16]; -+ -+ /* -+ * u = 128 * ceil[len(C)/128] - len(C) -+ * v = 128 * ceil[len(A)/128] - len(A) -+ * S = GHASH_H(A || 0^v || C || 0^u || [len(A)]64 || [len(C)]64) -+ * (i.e., zero padded to block size A || C and lengths of each in bits) -+ */ -+ ghash_start(S); -+ ghash(H, aad, aad_len, S); -+ ghash(H, crypt, crypt_len, S); -+ WPA_PUT_BE64(len_buf, aad_len * 8); -+ WPA_PUT_BE64(len_buf + 8, crypt_len * 8); -+ ghash(H, len_buf, sizeof(len_buf), S); -+ -+ wpa_hexdump_key(_MSG_EXCESSIVE_, "S = GHASH_H(...)", S, 16); -+} -+ -+ -+/** -+ * aes_gcm_ae - GCM-AE_K(IV, P, A) -+ */ -+int aes_gcm_ae(const u8 *key, size_t key_len, const u8 *iv, size_t iv_len, -+ const u8 *plain, size_t plain_len, -+ const u8 *aad, size_t aad_len, u8 *crypt, u8 *tag) -+{ -+ u8 H[AES_BLOCK_SIZE]; -+ u8 J0[AES_BLOCK_SIZE]; -+ u8 S[16]; -+ void *aes; -+ -+ aes = aes_gcm_init_hash_subkey(key, key_len, H); -+ if (aes == NULL) -+ return -1; -+ -+ aes_gcm_prepare_j0(iv, iv_len, H, J0); -+ -+ /* C = GCTR_K(inc_32(J_0), P) */ -+ aes_gcm_gctr(aes, J0, plain, plain_len, crypt); -+ -+ aes_gcm_ghash(H, aad, aad_len, crypt, plain_len, S); -+ -+ /* T = MSB_t(GCTR_K(J_0, S)) */ -+ aes_gctr(aes, J0, S, sizeof(S), tag); -+ -+ /* Return (C, T) */ -+ -+ aes_encrypt_deinit(aes); -+ -+ return 0; -+} -+ -+ -+/** -+ * aes_gcm_ad - GCM-AD_K(IV, C, A, T) -+ */ -+int aes_gcm_ad(const u8 *key, size_t key_len, const u8 *iv, size_t iv_len, -+ const u8 *crypt, size_t crypt_len, -+ const u8 *aad, size_t aad_len, const u8 *tag, u8 *plain) -+{ -+ u8 H[AES_BLOCK_SIZE]; -+ u8 J0[AES_BLOCK_SIZE]; -+ u8 S[16], T[16]; -+ void *aes; -+ -+ aes = aes_gcm_init_hash_subkey(key, key_len, H); -+ if (aes == NULL) -+ return -1; -+ -+ aes_gcm_prepare_j0(iv, iv_len, H, J0); -+ -+ /* P = GCTR_K(inc_32(J_0), C) */ -+ aes_gcm_gctr(aes, J0, crypt, crypt_len, plain); -+ -+ aes_gcm_ghash(H, aad, aad_len, crypt, crypt_len, S); -+ -+ /* T' = MSB_t(GCTR_K(J_0, S)) */ -+ aes_gctr(aes, J0, S, sizeof(S), T); -+ -+ aes_encrypt_deinit(aes); -+ -+ if (os_memcmp_const(tag, T, 16) != 0) { -+ wpa_printf(_MSG_EXCESSIVE_, "GCM: Tag mismatch"); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+ -+int aes_gmac(const u8 *key, size_t key_len, const u8 *iv, size_t iv_len, -+ const u8 *aad, size_t aad_len, u8 *tag) -+{ -+ return aes_gcm_ae(key, key_len, iv, iv_len, NULL, 0, aad, aad_len, NULL, -+ tag); -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes-internal-enc.c b/drivers/staging/rtl8723cs/core/crypto/aes-internal-enc.c -new file mode 100644 -index 000000000000..6728363b6bf2 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes-internal-enc.c -@@ -0,0 +1,129 @@ -+/* -+ * AES (Rijndael) cipher - encrypt -+ * -+ * Modifications to public domain implementation: -+ * - cleanup -+ * - use C pre-processor to make it easier to change S table access -+ * - added option (AES_SMALL_TABLES) for reducing code size by about 8 kB at -+ * cost of reduced throughput (quite small difference on Pentium 4, -+ * 10-25% when using -O1 or -O2 optimization) -+ * -+ * Copyright (c) 2003-2012, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+#include "aes_i.h" -+ -+static void rijndaelEncrypt(const u32 rk[], int Nr, const u8 pt[16], u8 ct[16]) -+{ -+ u32 s0, s1, s2, s3, t0, t1, t2, t3; -+#ifndef FULL_UNROLL -+ int r; -+#endif /* ?FULL_UNROLL */ -+ -+ /* -+ * map byte array block to cipher state -+ * and add initial round key: -+ */ -+ s0 = GETU32(pt ) ^ rk[0]; -+ s1 = GETU32(pt + 4) ^ rk[1]; -+ s2 = GETU32(pt + 8) ^ rk[2]; -+ s3 = GETU32(pt + 12) ^ rk[3]; -+ -+#define ROUND(i,d,s) \ -+d##0 = TE0(s##0) ^ TE1(s##1) ^ TE2(s##2) ^ TE3(s##3) ^ rk[4 * i]; \ -+d##1 = TE0(s##1) ^ TE1(s##2) ^ TE2(s##3) ^ TE3(s##0) ^ rk[4 * i + 1]; \ -+d##2 = TE0(s##2) ^ TE1(s##3) ^ TE2(s##0) ^ TE3(s##1) ^ rk[4 * i + 2]; \ -+d##3 = TE0(s##3) ^ TE1(s##0) ^ TE2(s##1) ^ TE3(s##2) ^ rk[4 * i + 3] -+ -+#ifdef FULL_UNROLL -+ -+ ROUND(1,t,s); -+ ROUND(2,s,t); -+ ROUND(3,t,s); -+ ROUND(4,s,t); -+ ROUND(5,t,s); -+ ROUND(6,s,t); -+ ROUND(7,t,s); -+ ROUND(8,s,t); -+ ROUND(9,t,s); -+ if (Nr > 10) { -+ ROUND(10,s,t); -+ ROUND(11,t,s); -+ if (Nr > 12) { -+ ROUND(12,s,t); -+ ROUND(13,t,s); -+ } -+ } -+ -+ rk += Nr << 2; -+ -+#else /* !FULL_UNROLL */ -+ -+ /* Nr - 1 full rounds: */ -+ r = Nr >> 1; -+ for (;;) { -+ ROUND(1,t,s); -+ rk += 8; -+ if (--r == 0) -+ break; -+ ROUND(0,s,t); -+ } -+ -+#endif /* ?FULL_UNROLL */ -+ -+#undef ROUND -+ -+ /* -+ * apply last round and -+ * map cipher state to byte array block: -+ */ -+ s0 = TE41(t0) ^ TE42(t1) ^ TE43(t2) ^ TE44(t3) ^ rk[0]; -+ PUTU32(ct , s0); -+ s1 = TE41(t1) ^ TE42(t2) ^ TE43(t3) ^ TE44(t0) ^ rk[1]; -+ PUTU32(ct + 4, s1); -+ s2 = TE41(t2) ^ TE42(t3) ^ TE43(t0) ^ TE44(t1) ^ rk[2]; -+ PUTU32(ct + 8, s2); -+ s3 = TE41(t3) ^ TE42(t0) ^ TE43(t1) ^ TE44(t2) ^ rk[3]; -+ PUTU32(ct + 12, s3); -+} -+ -+ -+void * aes_encrypt_init(const u8 *key, size_t len) -+{ -+ u32 *rk; -+ int res; -+ -+ if (TEST_FAIL()) -+ return NULL; -+ -+ rk = os_malloc(AES_PRIV_SIZE); -+ if (rk == NULL) -+ return NULL; -+ res = rijndaelKeySetupEnc(rk, key, len * 8); -+ if (res < 0) { -+ rtw_mfree(rk, AES_PRIV_SIZE); -+ return NULL; -+ } -+ rk[AES_PRIV_NR_POS] = res; -+ return rk; -+} -+ -+ -+int aes_encrypt_128(void *ctx, const u8 *plain, u8 *crypt) -+{ -+ u32 *rk = ctx; -+ rijndaelEncrypt(ctx, rk[AES_PRIV_NR_POS], plain, crypt); -+ return 0; -+} -+ -+ -+void aes_encrypt_deinit(void *ctx) -+{ -+ os_memset(ctx, 0, AES_PRIV_SIZE); -+ rtw_mfree(ctx, AES_PRIV_SIZE); -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes-internal.c b/drivers/staging/rtl8723cs/core/crypto/aes-internal.c -new file mode 100644 -index 000000000000..57d653949991 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes-internal.c -@@ -0,0 +1,843 @@ -+/* -+ * AES (Rijndael) cipher -+ * -+ * Modifications to public domain implementation: -+ * - cleanup -+ * - use C pre-processor to make it easier to change S table access -+ * - added option (AES_SMALL_TABLES) for reducing code size by about 8 kB at -+ * cost of reduced throughput (quite small difference on Pentium 4, -+ * 10-25% when using -O1 or -O2 optimization) -+ * -+ * Copyright (c) 2003-2012, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+#include "aes_i.h" -+ -+/* -+ * rijndael-alg-fst.c -+ * -+ * @version 3.0 (December 2000) -+ * -+ * Optimised ANSI C code for the Rijndael cipher (now AES) -+ * -+ * @author Vincent Rijmen -+ * @author Antoon Bosselaers -+ * @author Paulo Barreto -+ * -+ * This code is hereby placed in the public domain. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ''AS IS'' AND ANY EXPRESS -+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE -+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR -+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE -+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+ -+/* -+Te0[x] = S [x].[02, 01, 01, 03]; -+Te1[x] = S [x].[03, 02, 01, 01]; -+Te2[x] = S [x].[01, 03, 02, 01]; -+Te3[x] = S [x].[01, 01, 03, 02]; -+Te4[x] = S [x].[01, 01, 01, 01]; -+ -+Td0[x] = Si[x].[0e, 09, 0d, 0b]; -+Td1[x] = Si[x].[0b, 0e, 09, 0d]; -+Td2[x] = Si[x].[0d, 0b, 0e, 09]; -+Td3[x] = Si[x].[09, 0d, 0b, 0e]; -+Td4[x] = Si[x].[01, 01, 01, 01]; -+*/ -+ -+const u32 Te0[256] = { -+ 0xc66363a5U, 0xf87c7c84U, 0xee777799U, 0xf67b7b8dU, -+ 0xfff2f20dU, 0xd66b6bbdU, 0xde6f6fb1U, 0x91c5c554U, -+ 0x60303050U, 0x02010103U, 0xce6767a9U, 0x562b2b7dU, -+ 0xe7fefe19U, 0xb5d7d762U, 0x4dababe6U, 0xec76769aU, -+ 0x8fcaca45U, 0x1f82829dU, 0x89c9c940U, 0xfa7d7d87U, -+ 0xeffafa15U, 0xb25959ebU, 0x8e4747c9U, 0xfbf0f00bU, -+ 0x41adadecU, 0xb3d4d467U, 0x5fa2a2fdU, 0x45afafeaU, -+ 0x239c9cbfU, 0x53a4a4f7U, 0xe4727296U, 0x9bc0c05bU, -+ 0x75b7b7c2U, 0xe1fdfd1cU, 0x3d9393aeU, 0x4c26266aU, -+ 0x6c36365aU, 0x7e3f3f41U, 0xf5f7f702U, 0x83cccc4fU, -+ 0x6834345cU, 0x51a5a5f4U, 0xd1e5e534U, 0xf9f1f108U, -+ 0xe2717193U, 0xabd8d873U, 0x62313153U, 0x2a15153fU, -+ 0x0804040cU, 0x95c7c752U, 0x46232365U, 0x9dc3c35eU, -+ 0x30181828U, 0x379696a1U, 0x0a05050fU, 0x2f9a9ab5U, -+ 0x0e070709U, 0x24121236U, 0x1b80809bU, 0xdfe2e23dU, -+ 0xcdebeb26U, 0x4e272769U, 0x7fb2b2cdU, 0xea75759fU, -+ 0x1209091bU, 0x1d83839eU, 0x582c2c74U, 0x341a1a2eU, -+ 0x361b1b2dU, 0xdc6e6eb2U, 0xb45a5aeeU, 0x5ba0a0fbU, -+ 0xa45252f6U, 0x763b3b4dU, 0xb7d6d661U, 0x7db3b3ceU, -+ 0x5229297bU, 0xdde3e33eU, 0x5e2f2f71U, 0x13848497U, -+ 0xa65353f5U, 0xb9d1d168U, 0x00000000U, 0xc1eded2cU, -+ 0x40202060U, 0xe3fcfc1fU, 0x79b1b1c8U, 0xb65b5bedU, -+ 0xd46a6abeU, 0x8dcbcb46U, 0x67bebed9U, 0x7239394bU, -+ 0x944a4adeU, 0x984c4cd4U, 0xb05858e8U, 0x85cfcf4aU, -+ 0xbbd0d06bU, 0xc5efef2aU, 0x4faaaae5U, 0xedfbfb16U, -+ 0x864343c5U, 0x9a4d4dd7U, 0x66333355U, 0x11858594U, -+ 0x8a4545cfU, 0xe9f9f910U, 0x04020206U, 0xfe7f7f81U, -+ 0xa05050f0U, 0x783c3c44U, 0x259f9fbaU, 0x4ba8a8e3U, -+ 0xa25151f3U, 0x5da3a3feU, 0x804040c0U, 0x058f8f8aU, -+ 0x3f9292adU, 0x219d9dbcU, 0x70383848U, 0xf1f5f504U, -+ 0x63bcbcdfU, 0x77b6b6c1U, 0xafdada75U, 0x42212163U, -+ 0x20101030U, 0xe5ffff1aU, 0xfdf3f30eU, 0xbfd2d26dU, -+ 0x81cdcd4cU, 0x180c0c14U, 0x26131335U, 0xc3ecec2fU, -+ 0xbe5f5fe1U, 0x359797a2U, 0x884444ccU, 0x2e171739U, -+ 0x93c4c457U, 0x55a7a7f2U, 0xfc7e7e82U, 0x7a3d3d47U, -+ 0xc86464acU, 0xba5d5de7U, 0x3219192bU, 0xe6737395U, -+ 0xc06060a0U, 0x19818198U, 0x9e4f4fd1U, 0xa3dcdc7fU, -+ 0x44222266U, 0x542a2a7eU, 0x3b9090abU, 0x0b888883U, -+ 0x8c4646caU, 0xc7eeee29U, 0x6bb8b8d3U, 0x2814143cU, -+ 0xa7dede79U, 0xbc5e5ee2U, 0x160b0b1dU, 0xaddbdb76U, -+ 0xdbe0e03bU, 0x64323256U, 0x743a3a4eU, 0x140a0a1eU, -+ 0x924949dbU, 0x0c06060aU, 0x4824246cU, 0xb85c5ce4U, -+ 0x9fc2c25dU, 0xbdd3d36eU, 0x43acacefU, 0xc46262a6U, -+ 0x399191a8U, 0x319595a4U, 0xd3e4e437U, 0xf279798bU, -+ 0xd5e7e732U, 0x8bc8c843U, 0x6e373759U, 0xda6d6db7U, -+ 0x018d8d8cU, 0xb1d5d564U, 0x9c4e4ed2U, 0x49a9a9e0U, -+ 0xd86c6cb4U, 0xac5656faU, 0xf3f4f407U, 0xcfeaea25U, -+ 0xca6565afU, 0xf47a7a8eU, 0x47aeaee9U, 0x10080818U, -+ 0x6fbabad5U, 0xf0787888U, 0x4a25256fU, 0x5c2e2e72U, -+ 0x381c1c24U, 0x57a6a6f1U, 0x73b4b4c7U, 0x97c6c651U, -+ 0xcbe8e823U, 0xa1dddd7cU, 0xe874749cU, 0x3e1f1f21U, -+ 0x964b4bddU, 0x61bdbddcU, 0x0d8b8b86U, 0x0f8a8a85U, -+ 0xe0707090U, 0x7c3e3e42U, 0x71b5b5c4U, 0xcc6666aaU, -+ 0x904848d8U, 0x06030305U, 0xf7f6f601U, 0x1c0e0e12U, -+ 0xc26161a3U, 0x6a35355fU, 0xae5757f9U, 0x69b9b9d0U, -+ 0x17868691U, 0x99c1c158U, 0x3a1d1d27U, 0x279e9eb9U, -+ 0xd9e1e138U, 0xebf8f813U, 0x2b9898b3U, 0x22111133U, -+ 0xd26969bbU, 0xa9d9d970U, 0x078e8e89U, 0x339494a7U, -+ 0x2d9b9bb6U, 0x3c1e1e22U, 0x15878792U, 0xc9e9e920U, -+ 0x87cece49U, 0xaa5555ffU, 0x50282878U, 0xa5dfdf7aU, -+ 0x038c8c8fU, 0x59a1a1f8U, 0x09898980U, 0x1a0d0d17U, -+ 0x65bfbfdaU, 0xd7e6e631U, 0x844242c6U, 0xd06868b8U, -+ 0x824141c3U, 0x299999b0U, 0x5a2d2d77U, 0x1e0f0f11U, -+ 0x7bb0b0cbU, 0xa85454fcU, 0x6dbbbbd6U, 0x2c16163aU, -+}; -+#ifndef AES_SMALL_TABLES -+const u32 Te1[256] = { -+ 0xa5c66363U, 0x84f87c7cU, 0x99ee7777U, 0x8df67b7bU, -+ 0x0dfff2f2U, 0xbdd66b6bU, 0xb1de6f6fU, 0x5491c5c5U, -+ 0x50603030U, 0x03020101U, 0xa9ce6767U, 0x7d562b2bU, -+ 0x19e7fefeU, 0x62b5d7d7U, 0xe64dababU, 0x9aec7676U, -+ 0x458fcacaU, 0x9d1f8282U, 0x4089c9c9U, 0x87fa7d7dU, -+ 0x15effafaU, 0xebb25959U, 0xc98e4747U, 0x0bfbf0f0U, -+ 0xec41adadU, 0x67b3d4d4U, 0xfd5fa2a2U, 0xea45afafU, -+ 0xbf239c9cU, 0xf753a4a4U, 0x96e47272U, 0x5b9bc0c0U, -+ 0xc275b7b7U, 0x1ce1fdfdU, 0xae3d9393U, 0x6a4c2626U, -+ 0x5a6c3636U, 0x417e3f3fU, 0x02f5f7f7U, 0x4f83ccccU, -+ 0x5c683434U, 0xf451a5a5U, 0x34d1e5e5U, 0x08f9f1f1U, -+ 0x93e27171U, 0x73abd8d8U, 0x53623131U, 0x3f2a1515U, -+ 0x0c080404U, 0x5295c7c7U, 0x65462323U, 0x5e9dc3c3U, -+ 0x28301818U, 0xa1379696U, 0x0f0a0505U, 0xb52f9a9aU, -+ 0x090e0707U, 0x36241212U, 0x9b1b8080U, 0x3ddfe2e2U, -+ 0x26cdebebU, 0x694e2727U, 0xcd7fb2b2U, 0x9fea7575U, -+ 0x1b120909U, 0x9e1d8383U, 0x74582c2cU, 0x2e341a1aU, -+ 0x2d361b1bU, 0xb2dc6e6eU, 0xeeb45a5aU, 0xfb5ba0a0U, -+ 0xf6a45252U, 0x4d763b3bU, 0x61b7d6d6U, 0xce7db3b3U, -+ 0x7b522929U, 0x3edde3e3U, 0x715e2f2fU, 0x97138484U, -+ 0xf5a65353U, 0x68b9d1d1U, 0x00000000U, 0x2cc1ededU, -+ 0x60402020U, 0x1fe3fcfcU, 0xc879b1b1U, 0xedb65b5bU, -+ 0xbed46a6aU, 0x468dcbcbU, 0xd967bebeU, 0x4b723939U, -+ 0xde944a4aU, 0xd4984c4cU, 0xe8b05858U, 0x4a85cfcfU, -+ 0x6bbbd0d0U, 0x2ac5efefU, 0xe54faaaaU, 0x16edfbfbU, -+ 0xc5864343U, 0xd79a4d4dU, 0x55663333U, 0x94118585U, -+ 0xcf8a4545U, 0x10e9f9f9U, 0x06040202U, 0x81fe7f7fU, -+ 0xf0a05050U, 0x44783c3cU, 0xba259f9fU, 0xe34ba8a8U, -+ 0xf3a25151U, 0xfe5da3a3U, 0xc0804040U, 0x8a058f8fU, -+ 0xad3f9292U, 0xbc219d9dU, 0x48703838U, 0x04f1f5f5U, -+ 0xdf63bcbcU, 0xc177b6b6U, 0x75afdadaU, 0x63422121U, -+ 0x30201010U, 0x1ae5ffffU, 0x0efdf3f3U, 0x6dbfd2d2U, -+ 0x4c81cdcdU, 0x14180c0cU, 0x35261313U, 0x2fc3ececU, -+ 0xe1be5f5fU, 0xa2359797U, 0xcc884444U, 0x392e1717U, -+ 0x5793c4c4U, 0xf255a7a7U, 0x82fc7e7eU, 0x477a3d3dU, -+ 0xacc86464U, 0xe7ba5d5dU, 0x2b321919U, 0x95e67373U, -+ 0xa0c06060U, 0x98198181U, 0xd19e4f4fU, 0x7fa3dcdcU, -+ 0x66442222U, 0x7e542a2aU, 0xab3b9090U, 0x830b8888U, -+ 0xca8c4646U, 0x29c7eeeeU, 0xd36bb8b8U, 0x3c281414U, -+ 0x79a7dedeU, 0xe2bc5e5eU, 0x1d160b0bU, 0x76addbdbU, -+ 0x3bdbe0e0U, 0x56643232U, 0x4e743a3aU, 0x1e140a0aU, -+ 0xdb924949U, 0x0a0c0606U, 0x6c482424U, 0xe4b85c5cU, -+ 0x5d9fc2c2U, 0x6ebdd3d3U, 0xef43acacU, 0xa6c46262U, -+ 0xa8399191U, 0xa4319595U, 0x37d3e4e4U, 0x8bf27979U, -+ 0x32d5e7e7U, 0x438bc8c8U, 0x596e3737U, 0xb7da6d6dU, -+ 0x8c018d8dU, 0x64b1d5d5U, 0xd29c4e4eU, 0xe049a9a9U, -+ 0xb4d86c6cU, 0xfaac5656U, 0x07f3f4f4U, 0x25cfeaeaU, -+ 0xafca6565U, 0x8ef47a7aU, 0xe947aeaeU, 0x18100808U, -+ 0xd56fbabaU, 0x88f07878U, 0x6f4a2525U, 0x725c2e2eU, -+ 0x24381c1cU, 0xf157a6a6U, 0xc773b4b4U, 0x5197c6c6U, -+ 0x23cbe8e8U, 0x7ca1ddddU, 0x9ce87474U, 0x213e1f1fU, -+ 0xdd964b4bU, 0xdc61bdbdU, 0x860d8b8bU, 0x850f8a8aU, -+ 0x90e07070U, 0x427c3e3eU, 0xc471b5b5U, 0xaacc6666U, -+ 0xd8904848U, 0x05060303U, 0x01f7f6f6U, 0x121c0e0eU, -+ 0xa3c26161U, 0x5f6a3535U, 0xf9ae5757U, 0xd069b9b9U, -+ 0x91178686U, 0x5899c1c1U, 0x273a1d1dU, 0xb9279e9eU, -+ 0x38d9e1e1U, 0x13ebf8f8U, 0xb32b9898U, 0x33221111U, -+ 0xbbd26969U, 0x70a9d9d9U, 0x89078e8eU, 0xa7339494U, -+ 0xb62d9b9bU, 0x223c1e1eU, 0x92158787U, 0x20c9e9e9U, -+ 0x4987ceceU, 0xffaa5555U, 0x78502828U, 0x7aa5dfdfU, -+ 0x8f038c8cU, 0xf859a1a1U, 0x80098989U, 0x171a0d0dU, -+ 0xda65bfbfU, 0x31d7e6e6U, 0xc6844242U, 0xb8d06868U, -+ 0xc3824141U, 0xb0299999U, 0x775a2d2dU, 0x111e0f0fU, -+ 0xcb7bb0b0U, 0xfca85454U, 0xd66dbbbbU, 0x3a2c1616U, -+}; -+const u32 Te2[256] = { -+ 0x63a5c663U, 0x7c84f87cU, 0x7799ee77U, 0x7b8df67bU, -+ 0xf20dfff2U, 0x6bbdd66bU, 0x6fb1de6fU, 0xc55491c5U, -+ 0x30506030U, 0x01030201U, 0x67a9ce67U, 0x2b7d562bU, -+ 0xfe19e7feU, 0xd762b5d7U, 0xabe64dabU, 0x769aec76U, -+ 0xca458fcaU, 0x829d1f82U, 0xc94089c9U, 0x7d87fa7dU, -+ 0xfa15effaU, 0x59ebb259U, 0x47c98e47U, 0xf00bfbf0U, -+ 0xadec41adU, 0xd467b3d4U, 0xa2fd5fa2U, 0xafea45afU, -+ 0x9cbf239cU, 0xa4f753a4U, 0x7296e472U, 0xc05b9bc0U, -+ 0xb7c275b7U, 0xfd1ce1fdU, 0x93ae3d93U, 0x266a4c26U, -+ 0x365a6c36U, 0x3f417e3fU, 0xf702f5f7U, 0xcc4f83ccU, -+ 0x345c6834U, 0xa5f451a5U, 0xe534d1e5U, 0xf108f9f1U, -+ 0x7193e271U, 0xd873abd8U, 0x31536231U, 0x153f2a15U, -+ 0x040c0804U, 0xc75295c7U, 0x23654623U, 0xc35e9dc3U, -+ 0x18283018U, 0x96a13796U, 0x050f0a05U, 0x9ab52f9aU, -+ 0x07090e07U, 0x12362412U, 0x809b1b80U, 0xe23ddfe2U, -+ 0xeb26cdebU, 0x27694e27U, 0xb2cd7fb2U, 0x759fea75U, -+ 0x091b1209U, 0x839e1d83U, 0x2c74582cU, 0x1a2e341aU, -+ 0x1b2d361bU, 0x6eb2dc6eU, 0x5aeeb45aU, 0xa0fb5ba0U, -+ 0x52f6a452U, 0x3b4d763bU, 0xd661b7d6U, 0xb3ce7db3U, -+ 0x297b5229U, 0xe33edde3U, 0x2f715e2fU, 0x84971384U, -+ 0x53f5a653U, 0xd168b9d1U, 0x00000000U, 0xed2cc1edU, -+ 0x20604020U, 0xfc1fe3fcU, 0xb1c879b1U, 0x5bedb65bU, -+ 0x6abed46aU, 0xcb468dcbU, 0xbed967beU, 0x394b7239U, -+ 0x4ade944aU, 0x4cd4984cU, 0x58e8b058U, 0xcf4a85cfU, -+ 0xd06bbbd0U, 0xef2ac5efU, 0xaae54faaU, 0xfb16edfbU, -+ 0x43c58643U, 0x4dd79a4dU, 0x33556633U, 0x85941185U, -+ 0x45cf8a45U, 0xf910e9f9U, 0x02060402U, 0x7f81fe7fU, -+ 0x50f0a050U, 0x3c44783cU, 0x9fba259fU, 0xa8e34ba8U, -+ 0x51f3a251U, 0xa3fe5da3U, 0x40c08040U, 0x8f8a058fU, -+ 0x92ad3f92U, 0x9dbc219dU, 0x38487038U, 0xf504f1f5U, -+ 0xbcdf63bcU, 0xb6c177b6U, 0xda75afdaU, 0x21634221U, -+ 0x10302010U, 0xff1ae5ffU, 0xf30efdf3U, 0xd26dbfd2U, -+ 0xcd4c81cdU, 0x0c14180cU, 0x13352613U, 0xec2fc3ecU, -+ 0x5fe1be5fU, 0x97a23597U, 0x44cc8844U, 0x17392e17U, -+ 0xc45793c4U, 0xa7f255a7U, 0x7e82fc7eU, 0x3d477a3dU, -+ 0x64acc864U, 0x5de7ba5dU, 0x192b3219U, 0x7395e673U, -+ 0x60a0c060U, 0x81981981U, 0x4fd19e4fU, 0xdc7fa3dcU, -+ 0x22664422U, 0x2a7e542aU, 0x90ab3b90U, 0x88830b88U, -+ 0x46ca8c46U, 0xee29c7eeU, 0xb8d36bb8U, 0x143c2814U, -+ 0xde79a7deU, 0x5ee2bc5eU, 0x0b1d160bU, 0xdb76addbU, -+ 0xe03bdbe0U, 0x32566432U, 0x3a4e743aU, 0x0a1e140aU, -+ 0x49db9249U, 0x060a0c06U, 0x246c4824U, 0x5ce4b85cU, -+ 0xc25d9fc2U, 0xd36ebdd3U, 0xacef43acU, 0x62a6c462U, -+ 0x91a83991U, 0x95a43195U, 0xe437d3e4U, 0x798bf279U, -+ 0xe732d5e7U, 0xc8438bc8U, 0x37596e37U, 0x6db7da6dU, -+ 0x8d8c018dU, 0xd564b1d5U, 0x4ed29c4eU, 0xa9e049a9U, -+ 0x6cb4d86cU, 0x56faac56U, 0xf407f3f4U, 0xea25cfeaU, -+ 0x65afca65U, 0x7a8ef47aU, 0xaee947aeU, 0x08181008U, -+ 0xbad56fbaU, 0x7888f078U, 0x256f4a25U, 0x2e725c2eU, -+ 0x1c24381cU, 0xa6f157a6U, 0xb4c773b4U, 0xc65197c6U, -+ 0xe823cbe8U, 0xdd7ca1ddU, 0x749ce874U, 0x1f213e1fU, -+ 0x4bdd964bU, 0xbddc61bdU, 0x8b860d8bU, 0x8a850f8aU, -+ 0x7090e070U, 0x3e427c3eU, 0xb5c471b5U, 0x66aacc66U, -+ 0x48d89048U, 0x03050603U, 0xf601f7f6U, 0x0e121c0eU, -+ 0x61a3c261U, 0x355f6a35U, 0x57f9ae57U, 0xb9d069b9U, -+ 0x86911786U, 0xc15899c1U, 0x1d273a1dU, 0x9eb9279eU, -+ 0xe138d9e1U, 0xf813ebf8U, 0x98b32b98U, 0x11332211U, -+ 0x69bbd269U, 0xd970a9d9U, 0x8e89078eU, 0x94a73394U, -+ 0x9bb62d9bU, 0x1e223c1eU, 0x87921587U, 0xe920c9e9U, -+ 0xce4987ceU, 0x55ffaa55U, 0x28785028U, 0xdf7aa5dfU, -+ 0x8c8f038cU, 0xa1f859a1U, 0x89800989U, 0x0d171a0dU, -+ 0xbfda65bfU, 0xe631d7e6U, 0x42c68442U, 0x68b8d068U, -+ 0x41c38241U, 0x99b02999U, 0x2d775a2dU, 0x0f111e0fU, -+ 0xb0cb7bb0U, 0x54fca854U, 0xbbd66dbbU, 0x163a2c16U, -+}; -+const u32 Te3[256] = { -+ -+ 0x6363a5c6U, 0x7c7c84f8U, 0x777799eeU, 0x7b7b8df6U, -+ 0xf2f20dffU, 0x6b6bbdd6U, 0x6f6fb1deU, 0xc5c55491U, -+ 0x30305060U, 0x01010302U, 0x6767a9ceU, 0x2b2b7d56U, -+ 0xfefe19e7U, 0xd7d762b5U, 0xababe64dU, 0x76769aecU, -+ 0xcaca458fU, 0x82829d1fU, 0xc9c94089U, 0x7d7d87faU, -+ 0xfafa15efU, 0x5959ebb2U, 0x4747c98eU, 0xf0f00bfbU, -+ 0xadadec41U, 0xd4d467b3U, 0xa2a2fd5fU, 0xafafea45U, -+ 0x9c9cbf23U, 0xa4a4f753U, 0x727296e4U, 0xc0c05b9bU, -+ 0xb7b7c275U, 0xfdfd1ce1U, 0x9393ae3dU, 0x26266a4cU, -+ 0x36365a6cU, 0x3f3f417eU, 0xf7f702f5U, 0xcccc4f83U, -+ 0x34345c68U, 0xa5a5f451U, 0xe5e534d1U, 0xf1f108f9U, -+ 0x717193e2U, 0xd8d873abU, 0x31315362U, 0x15153f2aU, -+ 0x04040c08U, 0xc7c75295U, 0x23236546U, 0xc3c35e9dU, -+ 0x18182830U, 0x9696a137U, 0x05050f0aU, 0x9a9ab52fU, -+ 0x0707090eU, 0x12123624U, 0x80809b1bU, 0xe2e23ddfU, -+ 0xebeb26cdU, 0x2727694eU, 0xb2b2cd7fU, 0x75759feaU, -+ 0x09091b12U, 0x83839e1dU, 0x2c2c7458U, 0x1a1a2e34U, -+ 0x1b1b2d36U, 0x6e6eb2dcU, 0x5a5aeeb4U, 0xa0a0fb5bU, -+ 0x5252f6a4U, 0x3b3b4d76U, 0xd6d661b7U, 0xb3b3ce7dU, -+ 0x29297b52U, 0xe3e33eddU, 0x2f2f715eU, 0x84849713U, -+ 0x5353f5a6U, 0xd1d168b9U, 0x00000000U, 0xeded2cc1U, -+ 0x20206040U, 0xfcfc1fe3U, 0xb1b1c879U, 0x5b5bedb6U, -+ 0x6a6abed4U, 0xcbcb468dU, 0xbebed967U, 0x39394b72U, -+ 0x4a4ade94U, 0x4c4cd498U, 0x5858e8b0U, 0xcfcf4a85U, -+ 0xd0d06bbbU, 0xefef2ac5U, 0xaaaae54fU, 0xfbfb16edU, -+ 0x4343c586U, 0x4d4dd79aU, 0x33335566U, 0x85859411U, -+ 0x4545cf8aU, 0xf9f910e9U, 0x02020604U, 0x7f7f81feU, -+ 0x5050f0a0U, 0x3c3c4478U, 0x9f9fba25U, 0xa8a8e34bU, -+ 0x5151f3a2U, 0xa3a3fe5dU, 0x4040c080U, 0x8f8f8a05U, -+ 0x9292ad3fU, 0x9d9dbc21U, 0x38384870U, 0xf5f504f1U, -+ 0xbcbcdf63U, 0xb6b6c177U, 0xdada75afU, 0x21216342U, -+ 0x10103020U, 0xffff1ae5U, 0xf3f30efdU, 0xd2d26dbfU, -+ 0xcdcd4c81U, 0x0c0c1418U, 0x13133526U, 0xecec2fc3U, -+ 0x5f5fe1beU, 0x9797a235U, 0x4444cc88U, 0x1717392eU, -+ 0xc4c45793U, 0xa7a7f255U, 0x7e7e82fcU, 0x3d3d477aU, -+ 0x6464acc8U, 0x5d5de7baU, 0x19192b32U, 0x737395e6U, -+ 0x6060a0c0U, 0x81819819U, 0x4f4fd19eU, 0xdcdc7fa3U, -+ 0x22226644U, 0x2a2a7e54U, 0x9090ab3bU, 0x8888830bU, -+ 0x4646ca8cU, 0xeeee29c7U, 0xb8b8d36bU, 0x14143c28U, -+ 0xdede79a7U, 0x5e5ee2bcU, 0x0b0b1d16U, 0xdbdb76adU, -+ 0xe0e03bdbU, 0x32325664U, 0x3a3a4e74U, 0x0a0a1e14U, -+ 0x4949db92U, 0x06060a0cU, 0x24246c48U, 0x5c5ce4b8U, -+ 0xc2c25d9fU, 0xd3d36ebdU, 0xacacef43U, 0x6262a6c4U, -+ 0x9191a839U, 0x9595a431U, 0xe4e437d3U, 0x79798bf2U, -+ 0xe7e732d5U, 0xc8c8438bU, 0x3737596eU, 0x6d6db7daU, -+ 0x8d8d8c01U, 0xd5d564b1U, 0x4e4ed29cU, 0xa9a9e049U, -+ 0x6c6cb4d8U, 0x5656faacU, 0xf4f407f3U, 0xeaea25cfU, -+ 0x6565afcaU, 0x7a7a8ef4U, 0xaeaee947U, 0x08081810U, -+ 0xbabad56fU, 0x787888f0U, 0x25256f4aU, 0x2e2e725cU, -+ 0x1c1c2438U, 0xa6a6f157U, 0xb4b4c773U, 0xc6c65197U, -+ 0xe8e823cbU, 0xdddd7ca1U, 0x74749ce8U, 0x1f1f213eU, -+ 0x4b4bdd96U, 0xbdbddc61U, 0x8b8b860dU, 0x8a8a850fU, -+ 0x707090e0U, 0x3e3e427cU, 0xb5b5c471U, 0x6666aaccU, -+ 0x4848d890U, 0x03030506U, 0xf6f601f7U, 0x0e0e121cU, -+ 0x6161a3c2U, 0x35355f6aU, 0x5757f9aeU, 0xb9b9d069U, -+ 0x86869117U, 0xc1c15899U, 0x1d1d273aU, 0x9e9eb927U, -+ 0xe1e138d9U, 0xf8f813ebU, 0x9898b32bU, 0x11113322U, -+ 0x6969bbd2U, 0xd9d970a9U, 0x8e8e8907U, 0x9494a733U, -+ 0x9b9bb62dU, 0x1e1e223cU, 0x87879215U, 0xe9e920c9U, -+ 0xcece4987U, 0x5555ffaaU, 0x28287850U, 0xdfdf7aa5U, -+ 0x8c8c8f03U, 0xa1a1f859U, 0x89898009U, 0x0d0d171aU, -+ 0xbfbfda65U, 0xe6e631d7U, 0x4242c684U, 0x6868b8d0U, -+ 0x4141c382U, 0x9999b029U, 0x2d2d775aU, 0x0f0f111eU, -+ 0xb0b0cb7bU, 0x5454fca8U, 0xbbbbd66dU, 0x16163a2cU, -+}; -+const u32 Te4[256] = { -+ 0x63636363U, 0x7c7c7c7cU, 0x77777777U, 0x7b7b7b7bU, -+ 0xf2f2f2f2U, 0x6b6b6b6bU, 0x6f6f6f6fU, 0xc5c5c5c5U, -+ 0x30303030U, 0x01010101U, 0x67676767U, 0x2b2b2b2bU, -+ 0xfefefefeU, 0xd7d7d7d7U, 0xababababU, 0x76767676U, -+ 0xcacacacaU, 0x82828282U, 0xc9c9c9c9U, 0x7d7d7d7dU, -+ 0xfafafafaU, 0x59595959U, 0x47474747U, 0xf0f0f0f0U, -+ 0xadadadadU, 0xd4d4d4d4U, 0xa2a2a2a2U, 0xafafafafU, -+ 0x9c9c9c9cU, 0xa4a4a4a4U, 0x72727272U, 0xc0c0c0c0U, -+ 0xb7b7b7b7U, 0xfdfdfdfdU, 0x93939393U, 0x26262626U, -+ 0x36363636U, 0x3f3f3f3fU, 0xf7f7f7f7U, 0xccccccccU, -+ 0x34343434U, 0xa5a5a5a5U, 0xe5e5e5e5U, 0xf1f1f1f1U, -+ 0x71717171U, 0xd8d8d8d8U, 0x31313131U, 0x15151515U, -+ 0x04040404U, 0xc7c7c7c7U, 0x23232323U, 0xc3c3c3c3U, -+ 0x18181818U, 0x96969696U, 0x05050505U, 0x9a9a9a9aU, -+ 0x07070707U, 0x12121212U, 0x80808080U, 0xe2e2e2e2U, -+ 0xebebebebU, 0x27272727U, 0xb2b2b2b2U, 0x75757575U, -+ 0x09090909U, 0x83838383U, 0x2c2c2c2cU, 0x1a1a1a1aU, -+ 0x1b1b1b1bU, 0x6e6e6e6eU, 0x5a5a5a5aU, 0xa0a0a0a0U, -+ 0x52525252U, 0x3b3b3b3bU, 0xd6d6d6d6U, 0xb3b3b3b3U, -+ 0x29292929U, 0xe3e3e3e3U, 0x2f2f2f2fU, 0x84848484U, -+ 0x53535353U, 0xd1d1d1d1U, 0x00000000U, 0xededededU, -+ 0x20202020U, 0xfcfcfcfcU, 0xb1b1b1b1U, 0x5b5b5b5bU, -+ 0x6a6a6a6aU, 0xcbcbcbcbU, 0xbebebebeU, 0x39393939U, -+ 0x4a4a4a4aU, 0x4c4c4c4cU, 0x58585858U, 0xcfcfcfcfU, -+ 0xd0d0d0d0U, 0xefefefefU, 0xaaaaaaaaU, 0xfbfbfbfbU, -+ 0x43434343U, 0x4d4d4d4dU, 0x33333333U, 0x85858585U, -+ 0x45454545U, 0xf9f9f9f9U, 0x02020202U, 0x7f7f7f7fU, -+ 0x50505050U, 0x3c3c3c3cU, 0x9f9f9f9fU, 0xa8a8a8a8U, -+ 0x51515151U, 0xa3a3a3a3U, 0x40404040U, 0x8f8f8f8fU, -+ 0x92929292U, 0x9d9d9d9dU, 0x38383838U, 0xf5f5f5f5U, -+ 0xbcbcbcbcU, 0xb6b6b6b6U, 0xdadadadaU, 0x21212121U, -+ 0x10101010U, 0xffffffffU, 0xf3f3f3f3U, 0xd2d2d2d2U, -+ 0xcdcdcdcdU, 0x0c0c0c0cU, 0x13131313U, 0xececececU, -+ 0x5f5f5f5fU, 0x97979797U, 0x44444444U, 0x17171717U, -+ 0xc4c4c4c4U, 0xa7a7a7a7U, 0x7e7e7e7eU, 0x3d3d3d3dU, -+ 0x64646464U, 0x5d5d5d5dU, 0x19191919U, 0x73737373U, -+ 0x60606060U, 0x81818181U, 0x4f4f4f4fU, 0xdcdcdcdcU, -+ 0x22222222U, 0x2a2a2a2aU, 0x90909090U, 0x88888888U, -+ 0x46464646U, 0xeeeeeeeeU, 0xb8b8b8b8U, 0x14141414U, -+ 0xdedededeU, 0x5e5e5e5eU, 0x0b0b0b0bU, 0xdbdbdbdbU, -+ 0xe0e0e0e0U, 0x32323232U, 0x3a3a3a3aU, 0x0a0a0a0aU, -+ 0x49494949U, 0x06060606U, 0x24242424U, 0x5c5c5c5cU, -+ 0xc2c2c2c2U, 0xd3d3d3d3U, 0xacacacacU, 0x62626262U, -+ 0x91919191U, 0x95959595U, 0xe4e4e4e4U, 0x79797979U, -+ 0xe7e7e7e7U, 0xc8c8c8c8U, 0x37373737U, 0x6d6d6d6dU, -+ 0x8d8d8d8dU, 0xd5d5d5d5U, 0x4e4e4e4eU, 0xa9a9a9a9U, -+ 0x6c6c6c6cU, 0x56565656U, 0xf4f4f4f4U, 0xeaeaeaeaU, -+ 0x65656565U, 0x7a7a7a7aU, 0xaeaeaeaeU, 0x08080808U, -+ 0xbabababaU, 0x78787878U, 0x25252525U, 0x2e2e2e2eU, -+ 0x1c1c1c1cU, 0xa6a6a6a6U, 0xb4b4b4b4U, 0xc6c6c6c6U, -+ 0xe8e8e8e8U, 0xddddddddU, 0x74747474U, 0x1f1f1f1fU, -+ 0x4b4b4b4bU, 0xbdbdbdbdU, 0x8b8b8b8bU, 0x8a8a8a8aU, -+ 0x70707070U, 0x3e3e3e3eU, 0xb5b5b5b5U, 0x66666666U, -+ 0x48484848U, 0x03030303U, 0xf6f6f6f6U, 0x0e0e0e0eU, -+ 0x61616161U, 0x35353535U, 0x57575757U, 0xb9b9b9b9U, -+ 0x86868686U, 0xc1c1c1c1U, 0x1d1d1d1dU, 0x9e9e9e9eU, -+ 0xe1e1e1e1U, 0xf8f8f8f8U, 0x98989898U, 0x11111111U, -+ 0x69696969U, 0xd9d9d9d9U, 0x8e8e8e8eU, 0x94949494U, -+ 0x9b9b9b9bU, 0x1e1e1e1eU, 0x87878787U, 0xe9e9e9e9U, -+ 0xcecececeU, 0x55555555U, 0x28282828U, 0xdfdfdfdfU, -+ 0x8c8c8c8cU, 0xa1a1a1a1U, 0x89898989U, 0x0d0d0d0dU, -+ 0xbfbfbfbfU, 0xe6e6e6e6U, 0x42424242U, 0x68686868U, -+ 0x41414141U, 0x99999999U, 0x2d2d2d2dU, 0x0f0f0f0fU, -+ 0xb0b0b0b0U, 0x54545454U, 0xbbbbbbbbU, 0x16161616U, -+}; -+#endif /* AES_SMALL_TABLES */ -+const u32 Td0[256] = { -+ 0x51f4a750U, 0x7e416553U, 0x1a17a4c3U, 0x3a275e96U, -+ 0x3bab6bcbU, 0x1f9d45f1U, 0xacfa58abU, 0x4be30393U, -+ 0x2030fa55U, 0xad766df6U, 0x88cc7691U, 0xf5024c25U, -+ 0x4fe5d7fcU, 0xc52acbd7U, 0x26354480U, 0xb562a38fU, -+ 0xdeb15a49U, 0x25ba1b67U, 0x45ea0e98U, 0x5dfec0e1U, -+ 0xc32f7502U, 0x814cf012U, 0x8d4697a3U, 0x6bd3f9c6U, -+ 0x038f5fe7U, 0x15929c95U, 0xbf6d7aebU, 0x955259daU, -+ 0xd4be832dU, 0x587421d3U, 0x49e06929U, 0x8ec9c844U, -+ 0x75c2896aU, 0xf48e7978U, 0x99583e6bU, 0x27b971ddU, -+ 0xbee14fb6U, 0xf088ad17U, 0xc920ac66U, 0x7dce3ab4U, -+ 0x63df4a18U, 0xe51a3182U, 0x97513360U, 0x62537f45U, -+ 0xb16477e0U, 0xbb6bae84U, 0xfe81a01cU, 0xf9082b94U, -+ 0x70486858U, 0x8f45fd19U, 0x94de6c87U, 0x527bf8b7U, -+ 0xab73d323U, 0x724b02e2U, 0xe31f8f57U, 0x6655ab2aU, -+ 0xb2eb2807U, 0x2fb5c203U, 0x86c57b9aU, 0xd33708a5U, -+ 0x302887f2U, 0x23bfa5b2U, 0x02036abaU, 0xed16825cU, -+ 0x8acf1c2bU, 0xa779b492U, 0xf307f2f0U, 0x4e69e2a1U, -+ 0x65daf4cdU, 0x0605bed5U, 0xd134621fU, 0xc4a6fe8aU, -+ 0x342e539dU, 0xa2f355a0U, 0x058ae132U, 0xa4f6eb75U, -+ 0x0b83ec39U, 0x4060efaaU, 0x5e719f06U, 0xbd6e1051U, -+ 0x3e218af9U, 0x96dd063dU, 0xdd3e05aeU, 0x4de6bd46U, -+ 0x91548db5U, 0x71c45d05U, 0x0406d46fU, 0x605015ffU, -+ 0x1998fb24U, 0xd6bde997U, 0x894043ccU, 0x67d99e77U, -+ 0xb0e842bdU, 0x07898b88U, 0xe7195b38U, 0x79c8eedbU, -+ 0xa17c0a47U, 0x7c420fe9U, 0xf8841ec9U, 0x00000000U, -+ 0x09808683U, 0x322bed48U, 0x1e1170acU, 0x6c5a724eU, -+ 0xfd0efffbU, 0x0f853856U, 0x3daed51eU, 0x362d3927U, -+ 0x0a0fd964U, 0x685ca621U, 0x9b5b54d1U, 0x24362e3aU, -+ 0x0c0a67b1U, 0x9357e70fU, 0xb4ee96d2U, 0x1b9b919eU, -+ 0x80c0c54fU, 0x61dc20a2U, 0x5a774b69U, 0x1c121a16U, -+ 0xe293ba0aU, 0xc0a02ae5U, 0x3c22e043U, 0x121b171dU, -+ 0x0e090d0bU, 0xf28bc7adU, 0x2db6a8b9U, 0x141ea9c8U, -+ 0x57f11985U, 0xaf75074cU, 0xee99ddbbU, 0xa37f60fdU, -+ 0xf701269fU, 0x5c72f5bcU, 0x44663bc5U, 0x5bfb7e34U, -+ 0x8b432976U, 0xcb23c6dcU, 0xb6edfc68U, 0xb8e4f163U, -+ 0xd731dccaU, 0x42638510U, 0x13972240U, 0x84c61120U, -+ 0x854a247dU, 0xd2bb3df8U, 0xaef93211U, 0xc729a16dU, -+ 0x1d9e2f4bU, 0xdcb230f3U, 0x0d8652ecU, 0x77c1e3d0U, -+ 0x2bb3166cU, 0xa970b999U, 0x119448faU, 0x47e96422U, -+ 0xa8fc8cc4U, 0xa0f03f1aU, 0x567d2cd8U, 0x223390efU, -+ 0x87494ec7U, 0xd938d1c1U, 0x8ccaa2feU, 0x98d40b36U, -+ 0xa6f581cfU, 0xa57ade28U, 0xdab78e26U, 0x3fadbfa4U, -+ 0x2c3a9de4U, 0x5078920dU, 0x6a5fcc9bU, 0x547e4662U, -+ 0xf68d13c2U, 0x90d8b8e8U, 0x2e39f75eU, 0x82c3aff5U, -+ 0x9f5d80beU, 0x69d0937cU, 0x6fd52da9U, 0xcf2512b3U, -+ 0xc8ac993bU, 0x10187da7U, 0xe89c636eU, 0xdb3bbb7bU, -+ 0xcd267809U, 0x6e5918f4U, 0xec9ab701U, 0x834f9aa8U, -+ 0xe6956e65U, 0xaaffe67eU, 0x21bccf08U, 0xef15e8e6U, -+ 0xbae79bd9U, 0x4a6f36ceU, 0xea9f09d4U, 0x29b07cd6U, -+ 0x31a4b2afU, 0x2a3f2331U, 0xc6a59430U, 0x35a266c0U, -+ 0x744ebc37U, 0xfc82caa6U, 0xe090d0b0U, 0x33a7d815U, -+ 0xf104984aU, 0x41ecdaf7U, 0x7fcd500eU, 0x1791f62fU, -+ 0x764dd68dU, 0x43efb04dU, 0xccaa4d54U, 0xe49604dfU, -+ 0x9ed1b5e3U, 0x4c6a881bU, 0xc12c1fb8U, 0x4665517fU, -+ 0x9d5eea04U, 0x018c355dU, 0xfa877473U, 0xfb0b412eU, -+ 0xb3671d5aU, 0x92dbd252U, 0xe9105633U, 0x6dd64713U, -+ 0x9ad7618cU, 0x37a10c7aU, 0x59f8148eU, 0xeb133c89U, -+ 0xcea927eeU, 0xb761c935U, 0xe11ce5edU, 0x7a47b13cU, -+ 0x9cd2df59U, 0x55f2733fU, 0x1814ce79U, 0x73c737bfU, -+ 0x53f7cdeaU, 0x5ffdaa5bU, 0xdf3d6f14U, 0x7844db86U, -+ 0xcaaff381U, 0xb968c43eU, 0x3824342cU, 0xc2a3405fU, -+ 0x161dc372U, 0xbce2250cU, 0x283c498bU, 0xff0d9541U, -+ 0x39a80171U, 0x080cb3deU, 0xd8b4e49cU, 0x6456c190U, -+ 0x7bcb8461U, 0xd532b670U, 0x486c5c74U, 0xd0b85742U, -+}; -+#ifndef AES_SMALL_TABLES -+const u32 Td1[256] = { -+ 0x5051f4a7U, 0x537e4165U, 0xc31a17a4U, 0x963a275eU, -+ 0xcb3bab6bU, 0xf11f9d45U, 0xabacfa58U, 0x934be303U, -+ 0x552030faU, 0xf6ad766dU, 0x9188cc76U, 0x25f5024cU, -+ 0xfc4fe5d7U, 0xd7c52acbU, 0x80263544U, 0x8fb562a3U, -+ 0x49deb15aU, 0x6725ba1bU, 0x9845ea0eU, 0xe15dfec0U, -+ 0x02c32f75U, 0x12814cf0U, 0xa38d4697U, 0xc66bd3f9U, -+ 0xe7038f5fU, 0x9515929cU, 0xebbf6d7aU, 0xda955259U, -+ 0x2dd4be83U, 0xd3587421U, 0x2949e069U, 0x448ec9c8U, -+ 0x6a75c289U, 0x78f48e79U, 0x6b99583eU, 0xdd27b971U, -+ 0xb6bee14fU, 0x17f088adU, 0x66c920acU, 0xb47dce3aU, -+ 0x1863df4aU, 0x82e51a31U, 0x60975133U, 0x4562537fU, -+ 0xe0b16477U, 0x84bb6baeU, 0x1cfe81a0U, 0x94f9082bU, -+ 0x58704868U, 0x198f45fdU, 0x8794de6cU, 0xb7527bf8U, -+ 0x23ab73d3U, 0xe2724b02U, 0x57e31f8fU, 0x2a6655abU, -+ 0x07b2eb28U, 0x032fb5c2U, 0x9a86c57bU, 0xa5d33708U, -+ 0xf2302887U, 0xb223bfa5U, 0xba02036aU, 0x5ced1682U, -+ 0x2b8acf1cU, 0x92a779b4U, 0xf0f307f2U, 0xa14e69e2U, -+ 0xcd65daf4U, 0xd50605beU, 0x1fd13462U, 0x8ac4a6feU, -+ 0x9d342e53U, 0xa0a2f355U, 0x32058ae1U, 0x75a4f6ebU, -+ 0x390b83ecU, 0xaa4060efU, 0x065e719fU, 0x51bd6e10U, -+ 0xf93e218aU, 0x3d96dd06U, 0xaedd3e05U, 0x464de6bdU, -+ 0xb591548dU, 0x0571c45dU, 0x6f0406d4U, 0xff605015U, -+ 0x241998fbU, 0x97d6bde9U, 0xcc894043U, 0x7767d99eU, -+ 0xbdb0e842U, 0x8807898bU, 0x38e7195bU, 0xdb79c8eeU, -+ 0x47a17c0aU, 0xe97c420fU, 0xc9f8841eU, 0x00000000U, -+ 0x83098086U, 0x48322bedU, 0xac1e1170U, 0x4e6c5a72U, -+ 0xfbfd0effU, 0x560f8538U, 0x1e3daed5U, 0x27362d39U, -+ 0x640a0fd9U, 0x21685ca6U, 0xd19b5b54U, 0x3a24362eU, -+ 0xb10c0a67U, 0x0f9357e7U, 0xd2b4ee96U, 0x9e1b9b91U, -+ 0x4f80c0c5U, 0xa261dc20U, 0x695a774bU, 0x161c121aU, -+ 0x0ae293baU, 0xe5c0a02aU, 0x433c22e0U, 0x1d121b17U, -+ 0x0b0e090dU, 0xadf28bc7U, 0xb92db6a8U, 0xc8141ea9U, -+ 0x8557f119U, 0x4caf7507U, 0xbbee99ddU, 0xfda37f60U, -+ 0x9ff70126U, 0xbc5c72f5U, 0xc544663bU, 0x345bfb7eU, -+ 0x768b4329U, 0xdccb23c6U, 0x68b6edfcU, 0x63b8e4f1U, -+ 0xcad731dcU, 0x10426385U, 0x40139722U, 0x2084c611U, -+ 0x7d854a24U, 0xf8d2bb3dU, 0x11aef932U, 0x6dc729a1U, -+ 0x4b1d9e2fU, 0xf3dcb230U, 0xec0d8652U, 0xd077c1e3U, -+ 0x6c2bb316U, 0x99a970b9U, 0xfa119448U, 0x2247e964U, -+ 0xc4a8fc8cU, 0x1aa0f03fU, 0xd8567d2cU, 0xef223390U, -+ 0xc787494eU, 0xc1d938d1U, 0xfe8ccaa2U, 0x3698d40bU, -+ 0xcfa6f581U, 0x28a57adeU, 0x26dab78eU, 0xa43fadbfU, -+ 0xe42c3a9dU, 0x0d507892U, 0x9b6a5fccU, 0x62547e46U, -+ 0xc2f68d13U, 0xe890d8b8U, 0x5e2e39f7U, 0xf582c3afU, -+ 0xbe9f5d80U, 0x7c69d093U, 0xa96fd52dU, 0xb3cf2512U, -+ 0x3bc8ac99U, 0xa710187dU, 0x6ee89c63U, 0x7bdb3bbbU, -+ 0x09cd2678U, 0xf46e5918U, 0x01ec9ab7U, 0xa8834f9aU, -+ 0x65e6956eU, 0x7eaaffe6U, 0x0821bccfU, 0xe6ef15e8U, -+ 0xd9bae79bU, 0xce4a6f36U, 0xd4ea9f09U, 0xd629b07cU, -+ 0xaf31a4b2U, 0x312a3f23U, 0x30c6a594U, 0xc035a266U, -+ 0x37744ebcU, 0xa6fc82caU, 0xb0e090d0U, 0x1533a7d8U, -+ 0x4af10498U, 0xf741ecdaU, 0x0e7fcd50U, 0x2f1791f6U, -+ 0x8d764dd6U, 0x4d43efb0U, 0x54ccaa4dU, 0xdfe49604U, -+ 0xe39ed1b5U, 0x1b4c6a88U, 0xb8c12c1fU, 0x7f466551U, -+ 0x049d5eeaU, 0x5d018c35U, 0x73fa8774U, 0x2efb0b41U, -+ 0x5ab3671dU, 0x5292dbd2U, 0x33e91056U, 0x136dd647U, -+ 0x8c9ad761U, 0x7a37a10cU, 0x8e59f814U, 0x89eb133cU, -+ 0xeecea927U, 0x35b761c9U, 0xede11ce5U, 0x3c7a47b1U, -+ 0x599cd2dfU, 0x3f55f273U, 0x791814ceU, 0xbf73c737U, -+ 0xea53f7cdU, 0x5b5ffdaaU, 0x14df3d6fU, 0x867844dbU, -+ 0x81caaff3U, 0x3eb968c4U, 0x2c382434U, 0x5fc2a340U, -+ 0x72161dc3U, 0x0cbce225U, 0x8b283c49U, 0x41ff0d95U, -+ 0x7139a801U, 0xde080cb3U, 0x9cd8b4e4U, 0x906456c1U, -+ 0x617bcb84U, 0x70d532b6U, 0x74486c5cU, 0x42d0b857U, -+}; -+const u32 Td2[256] = { -+ 0xa75051f4U, 0x65537e41U, 0xa4c31a17U, 0x5e963a27U, -+ 0x6bcb3babU, 0x45f11f9dU, 0x58abacfaU, 0x03934be3U, -+ 0xfa552030U, 0x6df6ad76U, 0x769188ccU, 0x4c25f502U, -+ 0xd7fc4fe5U, 0xcbd7c52aU, 0x44802635U, 0xa38fb562U, -+ 0x5a49deb1U, 0x1b6725baU, 0x0e9845eaU, 0xc0e15dfeU, -+ 0x7502c32fU, 0xf012814cU, 0x97a38d46U, 0xf9c66bd3U, -+ 0x5fe7038fU, 0x9c951592U, 0x7aebbf6dU, 0x59da9552U, -+ 0x832dd4beU, 0x21d35874U, 0x692949e0U, 0xc8448ec9U, -+ 0x896a75c2U, 0x7978f48eU, 0x3e6b9958U, 0x71dd27b9U, -+ 0x4fb6bee1U, 0xad17f088U, 0xac66c920U, 0x3ab47dceU, -+ 0x4a1863dfU, 0x3182e51aU, 0x33609751U, 0x7f456253U, -+ 0x77e0b164U, 0xae84bb6bU, 0xa01cfe81U, 0x2b94f908U, -+ 0x68587048U, 0xfd198f45U, 0x6c8794deU, 0xf8b7527bU, -+ 0xd323ab73U, 0x02e2724bU, 0x8f57e31fU, 0xab2a6655U, -+ 0x2807b2ebU, 0xc2032fb5U, 0x7b9a86c5U, 0x08a5d337U, -+ 0x87f23028U, 0xa5b223bfU, 0x6aba0203U, 0x825ced16U, -+ 0x1c2b8acfU, 0xb492a779U, 0xf2f0f307U, 0xe2a14e69U, -+ 0xf4cd65daU, 0xbed50605U, 0x621fd134U, 0xfe8ac4a6U, -+ 0x539d342eU, 0x55a0a2f3U, 0xe132058aU, 0xeb75a4f6U, -+ 0xec390b83U, 0xefaa4060U, 0x9f065e71U, 0x1051bd6eU, -+ -+ 0x8af93e21U, 0x063d96ddU, 0x05aedd3eU, 0xbd464de6U, -+ 0x8db59154U, 0x5d0571c4U, 0xd46f0406U, 0x15ff6050U, -+ 0xfb241998U, 0xe997d6bdU, 0x43cc8940U, 0x9e7767d9U, -+ 0x42bdb0e8U, 0x8b880789U, 0x5b38e719U, 0xeedb79c8U, -+ 0x0a47a17cU, 0x0fe97c42U, 0x1ec9f884U, 0x00000000U, -+ 0x86830980U, 0xed48322bU, 0x70ac1e11U, 0x724e6c5aU, -+ 0xfffbfd0eU, 0x38560f85U, 0xd51e3daeU, 0x3927362dU, -+ 0xd9640a0fU, 0xa621685cU, 0x54d19b5bU, 0x2e3a2436U, -+ 0x67b10c0aU, 0xe70f9357U, 0x96d2b4eeU, 0x919e1b9bU, -+ 0xc54f80c0U, 0x20a261dcU, 0x4b695a77U, 0x1a161c12U, -+ 0xba0ae293U, 0x2ae5c0a0U, 0xe0433c22U, 0x171d121bU, -+ 0x0d0b0e09U, 0xc7adf28bU, 0xa8b92db6U, 0xa9c8141eU, -+ 0x198557f1U, 0x074caf75U, 0xddbbee99U, 0x60fda37fU, -+ 0x269ff701U, 0xf5bc5c72U, 0x3bc54466U, 0x7e345bfbU, -+ 0x29768b43U, 0xc6dccb23U, 0xfc68b6edU, 0xf163b8e4U, -+ 0xdccad731U, 0x85104263U, 0x22401397U, 0x112084c6U, -+ 0x247d854aU, 0x3df8d2bbU, 0x3211aef9U, 0xa16dc729U, -+ 0x2f4b1d9eU, 0x30f3dcb2U, 0x52ec0d86U, 0xe3d077c1U, -+ 0x166c2bb3U, 0xb999a970U, 0x48fa1194U, 0x642247e9U, -+ 0x8cc4a8fcU, 0x3f1aa0f0U, 0x2cd8567dU, 0x90ef2233U, -+ 0x4ec78749U, 0xd1c1d938U, 0xa2fe8ccaU, 0x0b3698d4U, -+ 0x81cfa6f5U, 0xde28a57aU, 0x8e26dab7U, 0xbfa43fadU, -+ 0x9de42c3aU, 0x920d5078U, 0xcc9b6a5fU, 0x4662547eU, -+ 0x13c2f68dU, 0xb8e890d8U, 0xf75e2e39U, 0xaff582c3U, -+ 0x80be9f5dU, 0x937c69d0U, 0x2da96fd5U, 0x12b3cf25U, -+ 0x993bc8acU, 0x7da71018U, 0x636ee89cU, 0xbb7bdb3bU, -+ 0x7809cd26U, 0x18f46e59U, 0xb701ec9aU, 0x9aa8834fU, -+ 0x6e65e695U, 0xe67eaaffU, 0xcf0821bcU, 0xe8e6ef15U, -+ 0x9bd9bae7U, 0x36ce4a6fU, 0x09d4ea9fU, 0x7cd629b0U, -+ 0xb2af31a4U, 0x23312a3fU, 0x9430c6a5U, 0x66c035a2U, -+ 0xbc37744eU, 0xcaa6fc82U, 0xd0b0e090U, 0xd81533a7U, -+ 0x984af104U, 0xdaf741ecU, 0x500e7fcdU, 0xf62f1791U, -+ 0xd68d764dU, 0xb04d43efU, 0x4d54ccaaU, 0x04dfe496U, -+ 0xb5e39ed1U, 0x881b4c6aU, 0x1fb8c12cU, 0x517f4665U, -+ 0xea049d5eU, 0x355d018cU, 0x7473fa87U, 0x412efb0bU, -+ 0x1d5ab367U, 0xd25292dbU, 0x5633e910U, 0x47136dd6U, -+ 0x618c9ad7U, 0x0c7a37a1U, 0x148e59f8U, 0x3c89eb13U, -+ 0x27eecea9U, 0xc935b761U, 0xe5ede11cU, 0xb13c7a47U, -+ 0xdf599cd2U, 0x733f55f2U, 0xce791814U, 0x37bf73c7U, -+ 0xcdea53f7U, 0xaa5b5ffdU, 0x6f14df3dU, 0xdb867844U, -+ 0xf381caafU, 0xc43eb968U, 0x342c3824U, 0x405fc2a3U, -+ 0xc372161dU, 0x250cbce2U, 0x498b283cU, 0x9541ff0dU, -+ 0x017139a8U, 0xb3de080cU, 0xe49cd8b4U, 0xc1906456U, -+ 0x84617bcbU, 0xb670d532U, 0x5c74486cU, 0x5742d0b8U, -+}; -+const u32 Td3[256] = { -+ 0xf4a75051U, 0x4165537eU, 0x17a4c31aU, 0x275e963aU, -+ 0xab6bcb3bU, 0x9d45f11fU, 0xfa58abacU, 0xe303934bU, -+ 0x30fa5520U, 0x766df6adU, 0xcc769188U, 0x024c25f5U, -+ 0xe5d7fc4fU, 0x2acbd7c5U, 0x35448026U, 0x62a38fb5U, -+ 0xb15a49deU, 0xba1b6725U, 0xea0e9845U, 0xfec0e15dU, -+ 0x2f7502c3U, 0x4cf01281U, 0x4697a38dU, 0xd3f9c66bU, -+ 0x8f5fe703U, 0x929c9515U, 0x6d7aebbfU, 0x5259da95U, -+ 0xbe832dd4U, 0x7421d358U, 0xe0692949U, 0xc9c8448eU, -+ 0xc2896a75U, 0x8e7978f4U, 0x583e6b99U, 0xb971dd27U, -+ 0xe14fb6beU, 0x88ad17f0U, 0x20ac66c9U, 0xce3ab47dU, -+ 0xdf4a1863U, 0x1a3182e5U, 0x51336097U, 0x537f4562U, -+ 0x6477e0b1U, 0x6bae84bbU, 0x81a01cfeU, 0x082b94f9U, -+ 0x48685870U, 0x45fd198fU, 0xde6c8794U, 0x7bf8b752U, -+ 0x73d323abU, 0x4b02e272U, 0x1f8f57e3U, 0x55ab2a66U, -+ 0xeb2807b2U, 0xb5c2032fU, 0xc57b9a86U, 0x3708a5d3U, -+ 0x2887f230U, 0xbfa5b223U, 0x036aba02U, 0x16825cedU, -+ 0xcf1c2b8aU, 0x79b492a7U, 0x07f2f0f3U, 0x69e2a14eU, -+ 0xdaf4cd65U, 0x05bed506U, 0x34621fd1U, 0xa6fe8ac4U, -+ 0x2e539d34U, 0xf355a0a2U, 0x8ae13205U, 0xf6eb75a4U, -+ 0x83ec390bU, 0x60efaa40U, 0x719f065eU, 0x6e1051bdU, -+ 0x218af93eU, 0xdd063d96U, 0x3e05aeddU, 0xe6bd464dU, -+ 0x548db591U, 0xc45d0571U, 0x06d46f04U, 0x5015ff60U, -+ 0x98fb2419U, 0xbde997d6U, 0x4043cc89U, 0xd99e7767U, -+ 0xe842bdb0U, 0x898b8807U, 0x195b38e7U, 0xc8eedb79U, -+ 0x7c0a47a1U, 0x420fe97cU, 0x841ec9f8U, 0x00000000U, -+ 0x80868309U, 0x2bed4832U, 0x1170ac1eU, 0x5a724e6cU, -+ 0x0efffbfdU, 0x8538560fU, 0xaed51e3dU, 0x2d392736U, -+ 0x0fd9640aU, 0x5ca62168U, 0x5b54d19bU, 0x362e3a24U, -+ 0x0a67b10cU, 0x57e70f93U, 0xee96d2b4U, 0x9b919e1bU, -+ 0xc0c54f80U, 0xdc20a261U, 0x774b695aU, 0x121a161cU, -+ 0x93ba0ae2U, 0xa02ae5c0U, 0x22e0433cU, 0x1b171d12U, -+ 0x090d0b0eU, 0x8bc7adf2U, 0xb6a8b92dU, 0x1ea9c814U, -+ 0xf1198557U, 0x75074cafU, 0x99ddbbeeU, 0x7f60fda3U, -+ 0x01269ff7U, 0x72f5bc5cU, 0x663bc544U, 0xfb7e345bU, -+ 0x4329768bU, 0x23c6dccbU, 0xedfc68b6U, 0xe4f163b8U, -+ 0x31dccad7U, 0x63851042U, 0x97224013U, 0xc6112084U, -+ 0x4a247d85U, 0xbb3df8d2U, 0xf93211aeU, 0x29a16dc7U, -+ 0x9e2f4b1dU, 0xb230f3dcU, 0x8652ec0dU, 0xc1e3d077U, -+ 0xb3166c2bU, 0x70b999a9U, 0x9448fa11U, 0xe9642247U, -+ 0xfc8cc4a8U, 0xf03f1aa0U, 0x7d2cd856U, 0x3390ef22U, -+ 0x494ec787U, 0x38d1c1d9U, 0xcaa2fe8cU, 0xd40b3698U, -+ 0xf581cfa6U, 0x7ade28a5U, 0xb78e26daU, 0xadbfa43fU, -+ 0x3a9de42cU, 0x78920d50U, 0x5fcc9b6aU, 0x7e466254U, -+ 0x8d13c2f6U, 0xd8b8e890U, 0x39f75e2eU, 0xc3aff582U, -+ 0x5d80be9fU, 0xd0937c69U, 0xd52da96fU, 0x2512b3cfU, -+ 0xac993bc8U, 0x187da710U, 0x9c636ee8U, 0x3bbb7bdbU, -+ 0x267809cdU, 0x5918f46eU, 0x9ab701ecU, 0x4f9aa883U, -+ 0x956e65e6U, 0xffe67eaaU, 0xbccf0821U, 0x15e8e6efU, -+ 0xe79bd9baU, 0x6f36ce4aU, 0x9f09d4eaU, 0xb07cd629U, -+ 0xa4b2af31U, 0x3f23312aU, 0xa59430c6U, 0xa266c035U, -+ 0x4ebc3774U, 0x82caa6fcU, 0x90d0b0e0U, 0xa7d81533U, -+ 0x04984af1U, 0xecdaf741U, 0xcd500e7fU, 0x91f62f17U, -+ 0x4dd68d76U, 0xefb04d43U, 0xaa4d54ccU, 0x9604dfe4U, -+ 0xd1b5e39eU, 0x6a881b4cU, 0x2c1fb8c1U, 0x65517f46U, -+ 0x5eea049dU, 0x8c355d01U, 0x877473faU, 0x0b412efbU, -+ 0x671d5ab3U, 0xdbd25292U, 0x105633e9U, 0xd647136dU, -+ 0xd7618c9aU, 0xa10c7a37U, 0xf8148e59U, 0x133c89ebU, -+ 0xa927eeceU, 0x61c935b7U, 0x1ce5ede1U, 0x47b13c7aU, -+ 0xd2df599cU, 0xf2733f55U, 0x14ce7918U, 0xc737bf73U, -+ 0xf7cdea53U, 0xfdaa5b5fU, 0x3d6f14dfU, 0x44db8678U, -+ 0xaff381caU, 0x68c43eb9U, 0x24342c38U, 0xa3405fc2U, -+ 0x1dc37216U, 0xe2250cbcU, 0x3c498b28U, 0x0d9541ffU, -+ 0xa8017139U, 0x0cb3de08U, 0xb4e49cd8U, 0x56c19064U, -+ 0xcb84617bU, 0x32b670d5U, 0x6c5c7448U, 0xb85742d0U, -+}; -+const u32 Td4[256] = { -+ 0x52525252U, 0x09090909U, 0x6a6a6a6aU, 0xd5d5d5d5U, -+ 0x30303030U, 0x36363636U, 0xa5a5a5a5U, 0x38383838U, -+ 0xbfbfbfbfU, 0x40404040U, 0xa3a3a3a3U, 0x9e9e9e9eU, -+ 0x81818181U, 0xf3f3f3f3U, 0xd7d7d7d7U, 0xfbfbfbfbU, -+ 0x7c7c7c7cU, 0xe3e3e3e3U, 0x39393939U, 0x82828282U, -+ 0x9b9b9b9bU, 0x2f2f2f2fU, 0xffffffffU, 0x87878787U, -+ 0x34343434U, 0x8e8e8e8eU, 0x43434343U, 0x44444444U, -+ 0xc4c4c4c4U, 0xdedededeU, 0xe9e9e9e9U, 0xcbcbcbcbU, -+ 0x54545454U, 0x7b7b7b7bU, 0x94949494U, 0x32323232U, -+ 0xa6a6a6a6U, 0xc2c2c2c2U, 0x23232323U, 0x3d3d3d3dU, -+ 0xeeeeeeeeU, 0x4c4c4c4cU, 0x95959595U, 0x0b0b0b0bU, -+ 0x42424242U, 0xfafafafaU, 0xc3c3c3c3U, 0x4e4e4e4eU, -+ 0x08080808U, 0x2e2e2e2eU, 0xa1a1a1a1U, 0x66666666U, -+ 0x28282828U, 0xd9d9d9d9U, 0x24242424U, 0xb2b2b2b2U, -+ 0x76767676U, 0x5b5b5b5bU, 0xa2a2a2a2U, 0x49494949U, -+ 0x6d6d6d6dU, 0x8b8b8b8bU, 0xd1d1d1d1U, 0x25252525U, -+ 0x72727272U, 0xf8f8f8f8U, 0xf6f6f6f6U, 0x64646464U, -+ 0x86868686U, 0x68686868U, 0x98989898U, 0x16161616U, -+ 0xd4d4d4d4U, 0xa4a4a4a4U, 0x5c5c5c5cU, 0xccccccccU, -+ 0x5d5d5d5dU, 0x65656565U, 0xb6b6b6b6U, 0x92929292U, -+ 0x6c6c6c6cU, 0x70707070U, 0x48484848U, 0x50505050U, -+ 0xfdfdfdfdU, 0xededededU, 0xb9b9b9b9U, 0xdadadadaU, -+ 0x5e5e5e5eU, 0x15151515U, 0x46464646U, 0x57575757U, -+ 0xa7a7a7a7U, 0x8d8d8d8dU, 0x9d9d9d9dU, 0x84848484U, -+ 0x90909090U, 0xd8d8d8d8U, 0xababababU, 0x00000000U, -+ 0x8c8c8c8cU, 0xbcbcbcbcU, 0xd3d3d3d3U, 0x0a0a0a0aU, -+ 0xf7f7f7f7U, 0xe4e4e4e4U, 0x58585858U, 0x05050505U, -+ 0xb8b8b8b8U, 0xb3b3b3b3U, 0x45454545U, 0x06060606U, -+ 0xd0d0d0d0U, 0x2c2c2c2cU, 0x1e1e1e1eU, 0x8f8f8f8fU, -+ 0xcacacacaU, 0x3f3f3f3fU, 0x0f0f0f0fU, 0x02020202U, -+ 0xc1c1c1c1U, 0xafafafafU, 0xbdbdbdbdU, 0x03030303U, -+ 0x01010101U, 0x13131313U, 0x8a8a8a8aU, 0x6b6b6b6bU, -+ 0x3a3a3a3aU, 0x91919191U, 0x11111111U, 0x41414141U, -+ 0x4f4f4f4fU, 0x67676767U, 0xdcdcdcdcU, 0xeaeaeaeaU, -+ 0x97979797U, 0xf2f2f2f2U, 0xcfcfcfcfU, 0xcecececeU, -+ 0xf0f0f0f0U, 0xb4b4b4b4U, 0xe6e6e6e6U, 0x73737373U, -+ 0x96969696U, 0xacacacacU, 0x74747474U, 0x22222222U, -+ 0xe7e7e7e7U, 0xadadadadU, 0x35353535U, 0x85858585U, -+ 0xe2e2e2e2U, 0xf9f9f9f9U, 0x37373737U, 0xe8e8e8e8U, -+ 0x1c1c1c1cU, 0x75757575U, 0xdfdfdfdfU, 0x6e6e6e6eU, -+ 0x47474747U, 0xf1f1f1f1U, 0x1a1a1a1aU, 0x71717171U, -+ 0x1d1d1d1dU, 0x29292929U, 0xc5c5c5c5U, 0x89898989U, -+ 0x6f6f6f6fU, 0xb7b7b7b7U, 0x62626262U, 0x0e0e0e0eU, -+ 0xaaaaaaaaU, 0x18181818U, 0xbebebebeU, 0x1b1b1b1bU, -+ 0xfcfcfcfcU, 0x56565656U, 0x3e3e3e3eU, 0x4b4b4b4bU, -+ 0xc6c6c6c6U, 0xd2d2d2d2U, 0x79797979U, 0x20202020U, -+ 0x9a9a9a9aU, 0xdbdbdbdbU, 0xc0c0c0c0U, 0xfefefefeU, -+ 0x78787878U, 0xcdcdcdcdU, 0x5a5a5a5aU, 0xf4f4f4f4U, -+ 0x1f1f1f1fU, 0xddddddddU, 0xa8a8a8a8U, 0x33333333U, -+ 0x88888888U, 0x07070707U, 0xc7c7c7c7U, 0x31313131U, -+ 0xb1b1b1b1U, 0x12121212U, 0x10101010U, 0x59595959U, -+ 0x27272727U, 0x80808080U, 0xececececU, 0x5f5f5f5fU, -+ 0x60606060U, 0x51515151U, 0x7f7f7f7fU, 0xa9a9a9a9U, -+ 0x19191919U, 0xb5b5b5b5U, 0x4a4a4a4aU, 0x0d0d0d0dU, -+ 0x2d2d2d2dU, 0xe5e5e5e5U, 0x7a7a7a7aU, 0x9f9f9f9fU, -+ 0x93939393U, 0xc9c9c9c9U, 0x9c9c9c9cU, 0xefefefefU, -+ 0xa0a0a0a0U, 0xe0e0e0e0U, 0x3b3b3b3bU, 0x4d4d4d4dU, -+ 0xaeaeaeaeU, 0x2a2a2a2aU, 0xf5f5f5f5U, 0xb0b0b0b0U, -+ 0xc8c8c8c8U, 0xebebebebU, 0xbbbbbbbbU, 0x3c3c3c3cU, -+ 0x83838383U, 0x53535353U, 0x99999999U, 0x61616161U, -+ 0x17171717U, 0x2b2b2b2bU, 0x04040404U, 0x7e7e7e7eU, -+ 0xbabababaU, 0x77777777U, 0xd6d6d6d6U, 0x26262626U, -+ 0xe1e1e1e1U, 0x69696969U, 0x14141414U, 0x63636363U, -+ 0x55555555U, 0x21212121U, 0x0c0c0c0cU, 0x7d7d7d7dU, -+}; -+const u32 rcon[] = { -+ 0x01000000, 0x02000000, 0x04000000, 0x08000000, -+ 0x10000000, 0x20000000, 0x40000000, 0x80000000, -+ 0x1B000000, 0x36000000, /* for 128-bit blocks, Rijndael never uses more than 10 rcon values */ -+}; -+#else /* AES_SMALL_TABLES */ -+const u8 Td4s[256] = { -+ 0x52U, 0x09U, 0x6aU, 0xd5U, 0x30U, 0x36U, 0xa5U, 0x38U, -+ 0xbfU, 0x40U, 0xa3U, 0x9eU, 0x81U, 0xf3U, 0xd7U, 0xfbU, -+ 0x7cU, 0xe3U, 0x39U, 0x82U, 0x9bU, 0x2fU, 0xffU, 0x87U, -+ 0x34U, 0x8eU, 0x43U, 0x44U, 0xc4U, 0xdeU, 0xe9U, 0xcbU, -+ 0x54U, 0x7bU, 0x94U, 0x32U, 0xa6U, 0xc2U, 0x23U, 0x3dU, -+ 0xeeU, 0x4cU, 0x95U, 0x0bU, 0x42U, 0xfaU, 0xc3U, 0x4eU, -+ 0x08U, 0x2eU, 0xa1U, 0x66U, 0x28U, 0xd9U, 0x24U, 0xb2U, -+ 0x76U, 0x5bU, 0xa2U, 0x49U, 0x6dU, 0x8bU, 0xd1U, 0x25U, -+ 0x72U, 0xf8U, 0xf6U, 0x64U, 0x86U, 0x68U, 0x98U, 0x16U, -+ 0xd4U, 0xa4U, 0x5cU, 0xccU, 0x5dU, 0x65U, 0xb6U, 0x92U, -+ 0x6cU, 0x70U, 0x48U, 0x50U, 0xfdU, 0xedU, 0xb9U, 0xdaU, -+ 0x5eU, 0x15U, 0x46U, 0x57U, 0xa7U, 0x8dU, 0x9dU, 0x84U, -+ 0x90U, 0xd8U, 0xabU, 0x00U, 0x8cU, 0xbcU, 0xd3U, 0x0aU, -+ 0xf7U, 0xe4U, 0x58U, 0x05U, 0xb8U, 0xb3U, 0x45U, 0x06U, -+ 0xd0U, 0x2cU, 0x1eU, 0x8fU, 0xcaU, 0x3fU, 0x0fU, 0x02U, -+ 0xc1U, 0xafU, 0xbdU, 0x03U, 0x01U, 0x13U, 0x8aU, 0x6bU, -+ 0x3aU, 0x91U, 0x11U, 0x41U, 0x4fU, 0x67U, 0xdcU, 0xeaU, -+ 0x97U, 0xf2U, 0xcfU, 0xceU, 0xf0U, 0xb4U, 0xe6U, 0x73U, -+ 0x96U, 0xacU, 0x74U, 0x22U, 0xe7U, 0xadU, 0x35U, 0x85U, -+ 0xe2U, 0xf9U, 0x37U, 0xe8U, 0x1cU, 0x75U, 0xdfU, 0x6eU, -+ 0x47U, 0xf1U, 0x1aU, 0x71U, 0x1dU, 0x29U, 0xc5U, 0x89U, -+ 0x6fU, 0xb7U, 0x62U, 0x0eU, 0xaaU, 0x18U, 0xbeU, 0x1bU, -+ 0xfcU, 0x56U, 0x3eU, 0x4bU, 0xc6U, 0xd2U, 0x79U, 0x20U, -+ 0x9aU, 0xdbU, 0xc0U, 0xfeU, 0x78U, 0xcdU, 0x5aU, 0xf4U, -+ 0x1fU, 0xddU, 0xa8U, 0x33U, 0x88U, 0x07U, 0xc7U, 0x31U, -+ 0xb1U, 0x12U, 0x10U, 0x59U, 0x27U, 0x80U, 0xecU, 0x5fU, -+ 0x60U, 0x51U, 0x7fU, 0xa9U, 0x19U, 0xb5U, 0x4aU, 0x0dU, -+ 0x2dU, 0xe5U, 0x7aU, 0x9fU, 0x93U, 0xc9U, 0x9cU, 0xefU, -+ 0xa0U, 0xe0U, 0x3bU, 0x4dU, 0xaeU, 0x2aU, 0xf5U, 0xb0U, -+ 0xc8U, 0xebU, 0xbbU, 0x3cU, 0x83U, 0x53U, 0x99U, 0x61U, -+ 0x17U, 0x2bU, 0x04U, 0x7eU, 0xbaU, 0x77U, 0xd6U, 0x26U, -+ 0xe1U, 0x69U, 0x14U, 0x63U, 0x55U, 0x21U, 0x0cU, 0x7dU, -+}; -+const u8 rcons[] = { -+ 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1B, 0x36 -+ /* for 128-bit blocks, Rijndael never uses more than 10 rcon values */ -+}; -+#endif /* AES_SMALL_TABLES */ -+/** -+ * Expand the cipher key into the encryption key schedule. -+ * -+ * @return the number of rounds for the given cipher key size. -+ */ -+int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits) -+{ -+ int i; -+ u32 temp; -+ -+ rk[0] = GETU32(cipherKey ); -+ rk[1] = GETU32(cipherKey + 4); -+ rk[2] = GETU32(cipherKey + 8); -+ rk[3] = GETU32(cipherKey + 12); -+ -+ if (keyBits == 128) { -+ for (i = 0; i < 10; i++) { -+ temp = rk[3]; -+ rk[4] = rk[0] ^ TE421(temp) ^ TE432(temp) ^ -+ TE443(temp) ^ TE414(temp) ^ RCON(i); -+ rk[5] = rk[1] ^ rk[4]; -+ rk[6] = rk[2] ^ rk[5]; -+ rk[7] = rk[3] ^ rk[6]; -+ rk += 4; -+ } -+ return 10; -+ } -+ -+ rk[4] = GETU32(cipherKey + 16); -+ rk[5] = GETU32(cipherKey + 20); -+ -+ if (keyBits == 192) { -+ for (i = 0; i < 8; i++) { -+ temp = rk[5]; -+ rk[6] = rk[0] ^ TE421(temp) ^ TE432(temp) ^ -+ TE443(temp) ^ TE414(temp) ^ RCON(i); -+ rk[7] = rk[1] ^ rk[6]; -+ rk[8] = rk[2] ^ rk[7]; -+ rk[9] = rk[3] ^ rk[8]; -+ if (i == 7) -+ return 12; -+ rk[10] = rk[4] ^ rk[9]; -+ rk[11] = rk[5] ^ rk[10]; -+ rk += 6; -+ } -+ } -+ -+ rk[6] = GETU32(cipherKey + 24); -+ rk[7] = GETU32(cipherKey + 28); -+ -+ if (keyBits == 256) { -+ for (i = 0; i < 7; i++) { -+ temp = rk[7]; -+ rk[8] = rk[0] ^ TE421(temp) ^ TE432(temp) ^ -+ TE443(temp) ^ TE414(temp) ^ RCON(i); -+ rk[9] = rk[1] ^ rk[8]; -+ rk[10] = rk[2] ^ rk[9]; -+ rk[11] = rk[3] ^ rk[10]; -+ if (i == 6) -+ return 14; -+ temp = rk[11]; -+ rk[12] = rk[4] ^ TE411(temp) ^ TE422(temp) ^ -+ TE433(temp) ^ TE444(temp); -+ rk[13] = rk[5] ^ rk[12]; -+ rk[14] = rk[6] ^ rk[13]; -+ rk[15] = rk[7] ^ rk[14]; -+ rk += 8; -+ } -+ } -+ -+ return -1; -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes-omac1.c b/drivers/staging/rtl8723cs/core/crypto/aes-omac1.c -new file mode 100644 -index 000000000000..2d20aed87046 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes-omac1.c -@@ -0,0 +1,172 @@ -+/* -+ * One-key CBC MAC (OMAC1) hash with AES -+ * -+ * Copyright (c) 2003-2007, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+#include "aes.h" -+#include "aes_wrap.h" -+ -+static void gf_mulx(u8 *pad) -+{ -+ int i, carry; -+ -+ carry = pad[0] & 0x80; -+ for (i = 0; i < AES_BLOCK_SIZE - 1; i++) -+ pad[i] = (pad[i] << 1) | (pad[i + 1] >> 7); -+ pad[AES_BLOCK_SIZE - 1] <<= 1; -+ if (carry) -+ pad[AES_BLOCK_SIZE - 1] ^= 0x87; -+} -+ -+ -+/** -+ * omac1_aes_vector - One-Key CBC MAC (OMAC1) hash with AES -+ * @key: Key for the hash operation -+ * @key_len: Key length in octets -+ * @num_elem: Number of elements in the data vector -+ * @addr: Pointers to the data areas -+ * @len: Lengths of the data blocks -+ * @mac: Buffer for MAC (128 bits, i.e., 16 bytes) -+ * Returns: 0 on success, -1 on failure -+ * -+ * This is a mode for using block cipher (AES in this case) for authentication. -+ * OMAC1 was standardized with the name CMAC by NIST in a Special Publication -+ * (SP) 800-38B. -+ */ -+int omac1_aes_vector(const u8 *key, size_t key_len, size_t num_elem, -+ const u8 *addr[], const size_t *len, u8 *mac) -+{ -+ void *ctx; -+ u8 cbc[AES_BLOCK_SIZE], pad[AES_BLOCK_SIZE]; -+ const u8 *pos, *end; -+ size_t i, e, left, total_len; -+ -+ if (TEST_FAIL()) -+ return -1; -+ -+ ctx = aes_encrypt_init(key, key_len); -+ if (ctx == NULL) -+ return -1; -+ os_memset(cbc, 0, AES_BLOCK_SIZE); -+ -+ total_len = 0; -+ for (e = 0; e < num_elem; e++) -+ total_len += len[e]; -+ left = total_len; -+ -+ e = 0; -+ pos = addr[0]; -+ end = pos + len[0]; -+ -+ while (left >= AES_BLOCK_SIZE) { -+ for (i = 0; i < AES_BLOCK_SIZE; i++) { -+ cbc[i] ^= *pos++; -+ if (pos >= end) { -+ /* -+ * Stop if there are no more bytes to process -+ * since there are no more entries in the array. -+ */ -+ if (i + 1 == AES_BLOCK_SIZE && -+ left == AES_BLOCK_SIZE) -+ break; -+ e++; -+ pos = addr[e]; -+ end = pos + len[e]; -+ } -+ } -+ if (left > AES_BLOCK_SIZE) -+ aes_encrypt_128(ctx, cbc, cbc); -+ left -= AES_BLOCK_SIZE; -+ } -+ -+ os_memset(pad, 0, AES_BLOCK_SIZE); -+ aes_encrypt_128(ctx, pad, pad); -+ gf_mulx(pad); -+ -+ if (left || total_len == 0) { -+ for (i = 0; i < left; i++) { -+ cbc[i] ^= *pos++; -+ if (pos >= end) { -+ /* -+ * Stop if there are no more bytes to process -+ * since there are no more entries in the array. -+ */ -+ if (i + 1 == left) -+ break; -+ e++; -+ pos = addr[e]; -+ end = pos + len[e]; -+ } -+ } -+ cbc[left] ^= 0x80; -+ gf_mulx(pad); -+ } -+ -+ for (i = 0; i < AES_BLOCK_SIZE; i++) -+ pad[i] ^= cbc[i]; -+ aes_encrypt_128(ctx, pad, mac); -+ aes_encrypt_deinit(ctx); -+ return 0; -+} -+ -+ -+/** -+ * omac1_aes_128_vector - One-Key CBC MAC (OMAC1) hash with AES-128 -+ * @key: 128-bit key for the hash operation -+ * @num_elem: Number of elements in the data vector -+ * @addr: Pointers to the data areas -+ * @len: Lengths of the data blocks -+ * @mac: Buffer for MAC (128 bits, i.e., 16 bytes) -+ * Returns: 0 on success, -1 on failure -+ * -+ * This is a mode for using block cipher (AES in this case) for authentication. -+ * OMAC1 was standardized with the name CMAC by NIST in a Special Publication -+ * (SP) 800-38B. -+ */ -+int omac1_aes_128_vector(const u8 *key, size_t num_elem, -+ const u8 *addr[], const size_t *len, u8 *mac) -+{ -+ return omac1_aes_vector(key, 16, num_elem, addr, len, mac); -+} -+ -+ -+/** -+ * omac1_aes_128 - One-Key CBC MAC (OMAC1) hash with AES-128 (aka AES-CMAC) -+ * @key: 128-bit key for the hash operation -+ * @data: Data buffer for which a MAC is determined -+ * @data_len: Length of data buffer in bytes -+ * @mac: Buffer for MAC (128 bits, i.e., 16 bytes) -+ * Returns: 0 on success, -1 on failure -+ * -+ * This is a mode for using block cipher (AES in this case) for authentication. -+ * OMAC1 was standardized with the name CMAC by NIST in a Special Publication -+ * (SP) 800-38B. -+ */ -+int omac1_aes_128(const u8 *key, const u8 *data, size_t data_len, u8 *mac) -+{ -+ return omac1_aes_128_vector(key, 1, &data, &data_len, mac); -+} -+ -+ -+/** -+ * omac1_aes_256 - One-Key CBC MAC (OMAC1) hash with AES-256 (aka AES-CMAC) -+ * @key: 256-bit key for the hash operation -+ * @data: Data buffer for which a MAC is determined -+ * @data_len: Length of data buffer in bytes -+ * @mac: Buffer for MAC (128 bits, i.e., 16 bytes) -+ * Returns: 0 on success, -1 on failure -+ * -+ * This is a mode for using block cipher (AES in this case) for authentication. -+ * OMAC1 was standardized with the name CMAC by NIST in a Special Publication -+ * (SP) 800-38B. -+ */ -+int omac1_aes_256(const u8 *key, const u8 *data, size_t data_len, u8 *mac) -+{ -+ return omac1_aes_vector(key, 32, 1, &data, &data_len, mac); -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes-siv.c b/drivers/staging/rtl8723cs/core/crypto/aes-siv.c -new file mode 100644 -index 000000000000..58656f2b5de4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes-siv.c -@@ -0,0 +1,207 @@ -+/* -+ * AES SIV (RFC 5297) -+ * Copyright (c) 2013 Cozybit, Inc. -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+#include "aes.h" -+#include "aes_wrap.h" -+#include "aes_siv.h" -+ -+ -+static const u8 zero[AES_BLOCK_SIZE]; -+ -+ -+static void dbl(u8 *pad) -+{ -+ int i, carry; -+ -+ carry = pad[0] & 0x80; -+ for (i = 0; i < AES_BLOCK_SIZE - 1; i++) -+ pad[i] = (pad[i] << 1) | (pad[i + 1] >> 7); -+ pad[AES_BLOCK_SIZE - 1] <<= 1; -+ if (carry) -+ pad[AES_BLOCK_SIZE - 1] ^= 0x87; -+} -+ -+ -+static void xor(u8 *a, const u8 *b) -+{ -+ int i; -+ -+ for (i = 0; i < AES_BLOCK_SIZE; i++) -+ *a++ ^= *b++; -+} -+ -+ -+static void xorend(u8 *a, int alen, const u8 *b, int blen) -+{ -+ int i; -+ -+ if (alen < blen) -+ return; -+ -+ for (i = 0; i < blen; i++) -+ a[alen - blen + i] ^= b[i]; -+} -+ -+ -+static void pad_block(u8 *pad, const u8 *addr, size_t len) -+{ -+ os_memset(pad, 0, AES_BLOCK_SIZE); -+ os_memcpy(pad, addr, len); -+ -+ if (len < AES_BLOCK_SIZE) -+ pad[len] = 0x80; -+} -+ -+ -+static int aes_s2v(const u8 *key, size_t key_len, -+ size_t num_elem, const u8 *addr[], size_t *len, u8 *mac) -+{ -+ u8 tmp[AES_BLOCK_SIZE], tmp2[AES_BLOCK_SIZE]; -+ u8 *buf = NULL; -+ int ret; -+ size_t i; -+ const u8 *data[1]; -+ size_t data_len[1]; -+ -+ if (!num_elem) { -+ os_memcpy(tmp, zero, sizeof(zero)); -+ tmp[AES_BLOCK_SIZE - 1] = 1; -+ data[0] = tmp; -+ data_len[0] = sizeof(tmp); -+ return omac1_aes_vector(key, key_len, 1, data, data_len, mac); -+ } -+ -+ data[0] = zero; -+ data_len[0] = sizeof(zero); -+ ret = omac1_aes_vector(key, key_len, 1, data, data_len, tmp); -+ if (ret) -+ return ret; -+ -+ for (i = 0; i < num_elem - 1; i++) { -+ ret = omac1_aes_vector(key, key_len, 1, &addr[i], &len[i], -+ tmp2); -+ if (ret) -+ return ret; -+ -+ dbl(tmp); -+ xor(tmp, tmp2); -+ } -+ if (len[i] >= AES_BLOCK_SIZE) { -+ buf = os_memdup(addr[i], len[i]); -+ if (!buf) -+ return -ENOMEM; -+ -+ xorend(buf, len[i], tmp, AES_BLOCK_SIZE); -+ data[0] = buf; -+ ret = omac1_aes_vector(key, key_len, 1, data, &len[i], mac); -+ bin_clear_free(buf, len[i]); -+ return ret; -+ } -+ -+ dbl(tmp); -+ pad_block(tmp2, addr[i], len[i]); -+ xor(tmp, tmp2); -+ -+ data[0] = tmp; -+ data_len[0] = sizeof(tmp); -+ return omac1_aes_vector(key, key_len, 1, data, data_len, mac); -+} -+ -+ -+int aes_siv_encrypt(const u8 *key, size_t key_len, -+ const u8 *pw, size_t pwlen, -+ size_t num_elem, const u8 *addr[], const size_t *len, -+ u8 *out) -+{ -+ const u8 *_addr[6]; -+ size_t _len[6]; -+ const u8 *k1, *k2; -+ u8 v[AES_BLOCK_SIZE]; -+ size_t i; -+ u8 *iv, *crypt_pw; -+ -+ if (num_elem > ARRAY_SIZE(_addr) - 1 || -+ (key_len != 32 && key_len != 48 && key_len != 64)) -+ return -1; -+ -+ key_len /= 2; -+ k1 = key; -+ k2 = key + key_len; -+ -+ for (i = 0; i < num_elem; i++) { -+ _addr[i] = addr[i]; -+ _len[i] = len[i]; -+ } -+ _addr[num_elem] = pw; -+ _len[num_elem] = pwlen; -+ -+ if (aes_s2v(k1, key_len, num_elem + 1, _addr, _len, v)) -+ return -1; -+ -+ iv = out; -+ crypt_pw = out + AES_BLOCK_SIZE; -+ -+ os_memcpy(iv, v, AES_BLOCK_SIZE); -+ os_memcpy(crypt_pw, pw, pwlen); -+ -+ /* zero out 63rd and 31st bits of ctr (from right) */ -+ v[8] &= 0x7f; -+ v[12] &= 0x7f; -+ return aes_ctr_encrypt(k2, key_len, v, crypt_pw, pwlen); -+} -+ -+ -+int aes_siv_decrypt(const u8 *key, size_t key_len, -+ const u8 *iv_crypt, size_t iv_c_len, -+ size_t num_elem, const u8 *addr[], const size_t *len, -+ u8 *out) -+{ -+ const u8 *_addr[6]; -+ size_t _len[6]; -+ const u8 *k1, *k2; -+ size_t crypt_len; -+ size_t i; -+ int ret; -+ u8 iv[AES_BLOCK_SIZE]; -+ u8 check[AES_BLOCK_SIZE]; -+ -+ if (iv_c_len < AES_BLOCK_SIZE || num_elem > ARRAY_SIZE(_addr) - 1 || -+ (key_len != 32 && key_len != 48 && key_len != 64)) -+ return -1; -+ crypt_len = iv_c_len - AES_BLOCK_SIZE; -+ key_len /= 2; -+ k1 = key; -+ k2 = key + key_len; -+ -+ for (i = 0; i < num_elem; i++) { -+ _addr[i] = addr[i]; -+ _len[i] = len[i]; -+ } -+ _addr[num_elem] = out; -+ _len[num_elem] = crypt_len; -+ -+ os_memcpy(iv, iv_crypt, AES_BLOCK_SIZE); -+ os_memcpy(out, iv_crypt + AES_BLOCK_SIZE, crypt_len); -+ -+ iv[8] &= 0x7f; -+ iv[12] &= 0x7f; -+ -+ ret = aes_ctr_encrypt(k2, key_len, iv, out, crypt_len); -+ if (ret) -+ return ret; -+ -+ ret = aes_s2v(k1, key_len, num_elem + 1, _addr, _len, check); -+ if (ret) -+ return ret; -+ if (os_memcmp(check, iv_crypt, AES_BLOCK_SIZE) == 0) -+ return 0; -+ -+ return -1; -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes.h b/drivers/staging/rtl8723cs/core/crypto/aes.h -new file mode 100644 -index 000000000000..1aafe3b4e52f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes.h -@@ -0,0 +1,21 @@ -+/* -+ * AES functions -+ * Copyright (c) 2003-2006, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#ifndef AES_H -+#define AES_H -+ -+#define AES_BLOCK_SIZE 16 -+ -+void * aes_encrypt_init(const u8 *key, size_t len); -+int aes_encrypt_128(void *ctx, const u8 *plain, u8 *crypt); -+void aes_encrypt_deinit(void *ctx); -+void * aes_decrypt_init(const u8 *key, size_t len); -+int aes_decrypt(void *ctx, const u8 *crypt, u8 *plain); -+void aes_decrypt_deinit(void *ctx); -+ -+#endif /* AES_H */ -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes_i.h b/drivers/staging/rtl8723cs/core/crypto/aes_i.h -new file mode 100644 -index 000000000000..54375cf35583 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes_i.h -@@ -0,0 +1,125 @@ -+/* -+ * AES (Rijndael) cipher -+ * Copyright (c) 2003-2012, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#ifndef AES_I_H -+#define AES_I_H -+ -+#include "aes.h" -+ -+/* #define FULL_UNROLL */ -+#define AES_SMALL_TABLES -+ -+extern const u32 Te0[256]; -+extern const u32 Te1[256]; -+extern const u32 Te2[256]; -+extern const u32 Te3[256]; -+extern const u32 Te4[256]; -+extern const u32 Td0[256]; -+extern const u32 Td1[256]; -+extern const u32 Td2[256]; -+extern const u32 Td3[256]; -+extern const u32 Td4[256]; -+extern const u32 rcon[10]; -+extern const u8 Td4s[256]; -+extern const u8 rcons[10]; -+ -+#ifndef AES_SMALL_TABLES -+ -+#define RCON(i) rcon[(i)] -+ -+#define TE0(i) Te0[((i) >> 24) & 0xff] -+#define TE1(i) Te1[((i) >> 16) & 0xff] -+#define TE2(i) Te2[((i) >> 8) & 0xff] -+#define TE3(i) Te3[(i) & 0xff] -+#define TE41(i) (Te4[((i) >> 24) & 0xff] & 0xff000000) -+#define TE42(i) (Te4[((i) >> 16) & 0xff] & 0x00ff0000) -+#define TE43(i) (Te4[((i) >> 8) & 0xff] & 0x0000ff00) -+#define TE44(i) (Te4[(i) & 0xff] & 0x000000ff) -+#define TE421(i) (Te4[((i) >> 16) & 0xff] & 0xff000000) -+#define TE432(i) (Te4[((i) >> 8) & 0xff] & 0x00ff0000) -+#define TE443(i) (Te4[(i) & 0xff] & 0x0000ff00) -+#define TE414(i) (Te4[((i) >> 24) & 0xff] & 0x000000ff) -+#define TE411(i) (Te4[((i) >> 24) & 0xff] & 0xff000000) -+#define TE422(i) (Te4[((i) >> 16) & 0xff] & 0x00ff0000) -+#define TE433(i) (Te4[((i) >> 8) & 0xff] & 0x0000ff00) -+#define TE444(i) (Te4[(i) & 0xff] & 0x000000ff) -+#define TE4(i) (Te4[(i)] & 0x000000ff) -+ -+#define TD0(i) Td0[((i) >> 24) & 0xff] -+#define TD1(i) Td1[((i) >> 16) & 0xff] -+#define TD2(i) Td2[((i) >> 8) & 0xff] -+#define TD3(i) Td3[(i) & 0xff] -+#define TD41(i) (Td4[((i) >> 24) & 0xff] & 0xff000000) -+#define TD42(i) (Td4[((i) >> 16) & 0xff] & 0x00ff0000) -+#define TD43(i) (Td4[((i) >> 8) & 0xff] & 0x0000ff00) -+#define TD44(i) (Td4[(i) & 0xff] & 0x000000ff) -+#define TD0_(i) Td0[(i) & 0xff] -+#define TD1_(i) Td1[(i) & 0xff] -+#define TD2_(i) Td2[(i) & 0xff] -+#define TD3_(i) Td3[(i) & 0xff] -+ -+#else /* AES_SMALL_TABLES */ -+ -+#define RCON(i) (rcons[(i)] << 24) -+ -+static inline u32 rotr(u32 val, int bits) -+{ -+ return (val >> bits) | (val << (32 - bits)); -+} -+ -+#define TE0(i) Te0[((i) >> 24) & 0xff] -+#define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8) -+#define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16) -+#define TE3(i) rotr(Te0[(i) & 0xff], 24) -+#define TE41(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000) -+#define TE42(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000) -+#define TE43(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00) -+#define TE44(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff) -+#define TE421(i) ((Te0[((i) >> 16) & 0xff] << 8) & 0xff000000) -+#define TE432(i) (Te0[((i) >> 8) & 0xff] & 0x00ff0000) -+#define TE443(i) (Te0[(i) & 0xff] & 0x0000ff00) -+#define TE414(i) ((Te0[((i) >> 24) & 0xff] >> 8) & 0x000000ff) -+#define TE411(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000) -+#define TE422(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000) -+#define TE433(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00) -+#define TE444(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff) -+#define TE4(i) ((Te0[(i)] >> 8) & 0x000000ff) -+ -+#define TD0(i) Td0[((i) >> 24) & 0xff] -+#define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8) -+#define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16) -+#define TD3(i) rotr(Td0[(i) & 0xff], 24) -+#define TD41(i) (Td4s[((i) >> 24) & 0xff] << 24) -+#define TD42(i) (Td4s[((i) >> 16) & 0xff] << 16) -+#define TD43(i) (Td4s[((i) >> 8) & 0xff] << 8) -+#define TD44(i) (Td4s[(i) & 0xff]) -+#define TD0_(i) Td0[(i) & 0xff] -+#define TD1_(i) rotr(Td0[(i) & 0xff], 8) -+#define TD2_(i) rotr(Td0[(i) & 0xff], 16) -+#define TD3_(i) rotr(Td0[(i) & 0xff], 24) -+ -+#endif /* AES_SMALL_TABLES */ -+ -+#ifdef _MSC_VER -+#define SWAP(x) (_lrotl(x, 8) & 0x00ff00ff | _lrotr(x, 8) & 0xff00ff00) -+#define GETU32(p) SWAP(*((u32 *)(p))) -+#define PUTU32(ct, st) { *((u32 *)(ct)) = SWAP((st)); } -+#else -+#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ \ -+((u32)(pt)[2] << 8) ^ ((u32)(pt)[3])) -+#define PUTU32(ct, st) { \ -+(ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); \ -+(ct)[2] = (u8)((st) >> 8); (ct)[3] = (u8)(st); } -+#endif -+ -+#define AES_PRIV_SIZE (4 * 4 * 15 + 4) -+#define AES_PRIV_NR_POS (4 * 15) -+ -+int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits); -+ -+#endif /* AES_I_H */ -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes_siv.h b/drivers/staging/rtl8723cs/core/crypto/aes_siv.h -new file mode 100644 -index 000000000000..fb05d80c1f12 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes_siv.h -@@ -0,0 +1,21 @@ -+/* -+ * AES SIV (RFC 5297) -+ * Copyright (c) 2013 Cozybit, Inc. -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#ifndef AES_SIV_H -+#define AES_SIV_H -+ -+int aes_siv_encrypt(const u8 *key, size_t key_len, -+ const u8 *pw, size_t pwlen, -+ size_t num_elem, const u8 *addr[], const size_t *len, -+ u8 *out); -+int aes_siv_decrypt(const u8 *key, size_t key_len, -+ const u8 *iv_crypt, size_t iv_c_len, -+ size_t num_elem, const u8 *addr[], const size_t *len, -+ u8 *out); -+ -+#endif /* AES_SIV_H */ -diff --git a/drivers/staging/rtl8723cs/core/crypto/aes_wrap.h b/drivers/staging/rtl8723cs/core/crypto/aes_wrap.h -new file mode 100644 -index 000000000000..b70b1d26e550 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/aes_wrap.h -@@ -0,0 +1,73 @@ -+/* -+ * AES-based functions -+ * -+ * - AES Key Wrap Algorithm (RFC3394) -+ * - One-Key CBC MAC (OMAC1) hash with AES-128 and AES-256 -+ * - AES-128/192/256 CTR mode encryption -+ * - AES-128 EAX mode encryption/decryption -+ * - AES-128 CBC -+ * - AES-GCM -+ * - AES-CCM -+ * -+ * Copyright (c) 2003-2012, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#ifndef AES_WRAP_H -+#define AES_WRAP_H -+ -+int __must_check aes_wrap(const u8 *kek, size_t kek_len, int n, const u8 *plain, -+ u8 *cipher); -+int __must_check aes_unwrap(const u8 *kek, size_t kek_len, int n, -+ const u8 *cipher, u8 *plain); -+int __must_check omac1_aes_vector(const u8 *key, size_t key_len, -+ size_t num_elem, const u8 *addr[], -+ const size_t *len, u8 *mac); -+int __must_check omac1_aes_128_vector(const u8 *key, size_t num_elem, -+ const u8 *addr[], const size_t *len, -+ u8 *mac); -+int __must_check omac1_aes_128(const u8 *key, const u8 *data, size_t data_len, -+ u8 *mac); -+int __must_check omac1_aes_256(const u8 *key, const u8 *data, size_t data_len, -+ u8 *mac); -+int __must_check aes_128_encrypt_block(const u8 *key, const u8 *in, u8 *out); -+int __must_check aes_ctr_encrypt(const u8 *key, size_t key_len, const u8 *nonce, -+ u8 *data, size_t data_len); -+int __must_check aes_128_ctr_encrypt(const u8 *key, const u8 *nonce, -+ u8 *data, size_t data_len); -+int __must_check aes_128_eax_encrypt(const u8 *key, -+ const u8 *nonce, size_t nonce_len, -+ const u8 *hdr, size_t hdr_len, -+ u8 *data, size_t data_len, u8 *tag); -+int __must_check aes_128_eax_decrypt(const u8 *key, -+ const u8 *nonce, size_t nonce_len, -+ const u8 *hdr, size_t hdr_len, -+ u8 *data, size_t data_len, const u8 *tag); -+int __must_check aes_128_cbc_encrypt(const u8 *key, const u8 *iv, u8 *data, -+ size_t data_len); -+int __must_check aes_128_cbc_decrypt(const u8 *key, const u8 *iv, u8 *data, -+ size_t data_len); -+int __must_check aes_gcm_ae(const u8 *key, size_t key_len, -+ const u8 *iv, size_t iv_len, -+ const u8 *plain, size_t plain_len, -+ const u8 *aad, size_t aad_len, -+ u8 *crypt, u8 *tag); -+int __must_check aes_gcm_ad(const u8 *key, size_t key_len, -+ const u8 *iv, size_t iv_len, -+ const u8 *crypt, size_t crypt_len, -+ const u8 *aad, size_t aad_len, const u8 *tag, -+ u8 *plain); -+int __must_check aes_gmac(const u8 *key, size_t key_len, -+ const u8 *iv, size_t iv_len, -+ const u8 *aad, size_t aad_len, u8 *tag); -+int __must_check aes_ccm_ae(const u8 *key, size_t key_len, const u8 *nonce, -+ size_t M, const u8 *plain, size_t plain_len, -+ const u8 *aad, size_t aad_len, u8 *crypt, u8 *auth); -+int __must_check aes_ccm_ad(const u8 *key, size_t key_len, const u8 *nonce, -+ size_t M, const u8 *crypt, size_t crypt_len, -+ const u8 *aad, size_t aad_len, const u8 *auth, -+ u8 *plain); -+ -+#endif /* AES_WRAP_H */ -diff --git a/drivers/staging/rtl8723cs/core/crypto/ccmp.c b/drivers/staging/rtl8723cs/core/crypto/ccmp.c -new file mode 100644 -index 000000000000..10390ac42d32 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/ccmp.c -@@ -0,0 +1,384 @@ -+/* -+ * CTR with CBC-MAC Protocol (CCMP) -+ * Copyright (c) 2010-2012, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+#include "aes.h" -+#include "aes_wrap.h" -+#include "wlancrypto_wrap.h" -+ -+ -+ -+static void ccmp_aad_nonce(const struct ieee80211_hdr *hdr, const u8 *data, -+ u8 *aad, size_t *aad_len, u8 *nonce) -+{ -+ u16 fc, stype, seq; -+ int qos = 0, addr4 = 0; -+ u8 *pos; -+ -+ nonce[0] = 0; -+ -+ fc = le_to_host16(hdr->frame_control); -+ stype = WLAN_FC_GET_STYPE(fc); -+ if ((fc & (WLAN_FC_TODS | WLAN_FC_FROMDS)) == -+ (WLAN_FC_TODS | WLAN_FC_FROMDS)) -+ addr4 = 1; -+ -+ if (WLAN_FC_GET_TYPE(fc) == WLAN_FC_TYPE_DATA) { -+ fc &= ~0x0070; /* Mask subtype bits */ -+ if (stype & WLAN_FC_STYPE_QOS_DATA) { -+ const u8 *qc; -+ qos = 1; -+ fc &= ~WLAN_FC_ORDER; -+ qc = (const u8 *)hdr + 24; -+ if (addr4) -+ qc += ETH_ALEN; -+ nonce[0] = qc[0] & 0x0f; -+ } -+ } else if (WLAN_FC_GET_TYPE(fc) == WLAN_FC_TYPE_MGMT) -+ nonce[0] |= 0x10; /* Management */ -+ -+ fc &= ~(WLAN_FC_RETRY | WLAN_FC_PWRMGT | WLAN_FC_MOREDATA); -+ fc |= WLAN_FC_ISWEP; -+ WPA_PUT_LE16(aad, fc); -+ pos = aad + 2; -+ os_memcpy(pos, GetAddr1Ptr((u8 *)hdr), 3 * ETH_ALEN); -+ pos += 3 * ETH_ALEN; -+ seq = le_to_host16(hdr->seq_ctrl); -+ seq &= ~0xfff0; /* Mask Seq#; do not modify Frag# */ -+ WPA_PUT_LE16(pos, seq); -+ pos += 2; -+ -+ os_memcpy(pos, (u8 *)hdr + 24, addr4 * ETH_ALEN + qos * 2); -+ pos += addr4 * ETH_ALEN; -+ if (qos) { -+ pos[0] &= ~0x70; -+ if (1 /* FIX: either device has SPP A-MSDU Capab = 0 */) -+ pos[0] &= ~0x80; -+ pos++; -+ *pos++ = 0x00; -+ } -+ -+ *aad_len = pos - aad; -+ -+ os_memcpy(nonce + 1, hdr->addr2, ETH_ALEN); -+ nonce[7] = data[7]; /* PN5 */ -+ nonce[8] = data[6]; /* PN4 */ -+ nonce[9] = data[5]; /* PN3 */ -+ nonce[10] = data[4]; /* PN2 */ -+ nonce[11] = data[1]; /* PN1 */ -+ nonce[12] = data[0]; /* PN0 */ -+} -+ -+ -+static void ccmp_aad_nonce_pv1(const u8 *hdr, const u8 *a1, const u8 *a2, -+ const u8 *a3, const u8 *pn, -+ u8 *aad, size_t *aad_len, u8 *nonce) -+{ -+ u16 fc, type; -+ u8 *pos; -+ -+ nonce[0] = BIT(5); /* PV1 */ -+ /* TODO: Priority for QMF; 0 is used for Data frames */ -+ -+ fc = WPA_GET_LE16(hdr); -+ type = (fc & (BIT(2) | BIT(3) | BIT(4))) >> 2; -+ -+ if (type == 1) -+ nonce[0] |= 0x10; /* Management */ -+ -+ fc &= ~(BIT(10) | BIT(11) | BIT(13) | BIT(14) | BIT(15)); -+ fc |= BIT(12); -+ WPA_PUT_LE16(aad, fc); -+ pos = aad + 2; -+ if (type == 0 || type == 3) { -+ const u8 *sc; -+ -+ os_memcpy(pos, a1, ETH_ALEN); -+ pos += ETH_ALEN; -+ os_memcpy(pos, a2, ETH_ALEN); -+ pos += ETH_ALEN; -+ -+ if (type == 0) { -+ /* Either A1 or A2 contains SID */ -+ sc = hdr + 2 + 2 + ETH_ALEN; -+ } else { -+ /* Both A1 and A2 contain full addresses */ -+ sc = hdr + 2 + 2 * ETH_ALEN; -+ } -+ /* SC with Sequence Number subfield (bits 4-15 of the Sequence -+ * Control field) masked to 0. */ -+ *pos++ = *sc & 0x0f; -+ *pos++ = 0; -+ -+ if (a3) { -+ os_memcpy(pos, a3, ETH_ALEN); -+ pos += ETH_ALEN; -+ } -+ } -+ -+ *aad_len = pos - aad; -+ -+ os_memcpy(nonce + 1, a2, ETH_ALEN); -+ nonce[7] = pn[5]; /* PN5 */ -+ nonce[8] = pn[4]; /* PN4 */ -+ nonce[9] = pn[3]; /* PN3 */ -+ nonce[10] = pn[2]; /* PN2 */ -+ nonce[11] = pn[1]; /* PN1 */ -+ nonce[12] = pn[0]; /* PN0 */ -+} -+ -+ -+u8 * ccmp_decrypt(const u8 *tk, const struct ieee80211_hdr *hdr, -+ const u8 *data, size_t data_len, size_t *decrypted_len) -+{ -+ u8 aad[30], nonce[13]; -+ size_t aad_len; -+ size_t mlen; -+ u8 *plain; -+ -+ if (data_len < 8 + 8) -+ return NULL; -+ -+ plain = os_malloc(data_len + AES_BLOCK_SIZE); -+ if (plain == NULL) -+ return NULL; -+ -+ mlen = data_len - 8 - 8; -+ -+ os_memset(aad, 0, sizeof(aad)); -+ ccmp_aad_nonce(hdr, data, aad, &aad_len, nonce); -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP AAD", aad, aad_len); -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP nonce", nonce, 13); -+ -+ if (aes_ccm_ad(tk, 16, nonce, 8, data + 8, mlen, aad, aad_len, -+ data + 8 + mlen, plain) < 0) { -+ u16 seq_ctrl = le_to_host16(hdr->seq_ctrl); -+ wpa_printf(_MSG_INFO_, "Invalid CCMP MIC in frame: A1=" MACSTR -+ " A2=" MACSTR " A3=" MACSTR " seq=%u frag=%u", -+ MAC2STR(hdr->addr1), MAC2STR(hdr->addr2), -+ MAC2STR(hdr->addr3), -+ WLAN_GET_SEQ_SEQ(seq_ctrl), -+ WLAN_GET_SEQ_FRAG(seq_ctrl)); -+ rtw_mfree(plain, data_len + AES_BLOCK_SIZE); -+ return NULL; -+ } -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP decrypted", plain, mlen); -+ -+ *decrypted_len = mlen; -+ return plain; -+} -+ -+ -+void ccmp_get_pn(u8 *pn, const u8 *data) -+{ -+ pn[0] = data[7]; /* PN5 */ -+ pn[1] = data[6]; /* PN4 */ -+ pn[2] = data[5]; /* PN3 */ -+ pn[3] = data[4]; /* PN2 */ -+ pn[4] = data[1]; /* PN1 */ -+ pn[5] = data[0]; /* PN0 */ -+} -+ -+ -+u8 * ccmp_encrypt(const u8 *tk, u8 *frame, size_t len, size_t hdrlen, u8 *qos, -+ u8 *pn, int keyid, size_t *encrypted_len) -+{ -+ u8 aad[30], nonce[13]; -+ size_t aad_len, plen; -+ u8 *crypt, *pos, *pdata; -+ struct ieee80211_hdr *hdr; -+ -+ if (len < hdrlen || hdrlen < 24) -+ return NULL; -+ plen = len - hdrlen; -+ -+ crypt = os_malloc(hdrlen + 8 + plen + 8 + AES_BLOCK_SIZE); -+ if (crypt == NULL) -+ return NULL; -+ -+ if (pn == NULL) { -+ os_memcpy(crypt, frame, hdrlen + 8); -+ hdr = (struct ieee80211_hdr *) crypt; -+ hdr->frame_control |= host_to_le16(WLAN_FC_ISWEP); -+ pos = crypt + hdrlen + 8; -+ pdata = frame + hdrlen + 8; -+ } else { -+ os_memcpy(crypt, frame, hdrlen); -+ hdr = (struct ieee80211_hdr *) crypt; -+ hdr->frame_control |= host_to_le16(WLAN_FC_ISWEP); -+ pos = crypt + hdrlen; -+ *pos++ = pn[5]; /* PN0 */ -+ *pos++ = pn[4]; /* PN1 */ -+ *pos++ = 0x00; /* Rsvd */ -+ *pos++ = 0x20 | (keyid << 6); -+ *pos++ = pn[3]; /* PN2 */ -+ *pos++ = pn[2]; /* PN3 */ -+ *pos++ = pn[1]; /* PN4 */ -+ *pos++ = pn[0]; /* PN5 */ -+ pdata = frame + hdrlen; -+ } -+ -+ os_memset(aad, 0, sizeof(aad)); -+ ccmp_aad_nonce(hdr, crypt + hdrlen, aad, &aad_len, nonce); -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP AAD", aad, aad_len); -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP nonce", nonce, 13); -+ -+ if (aes_ccm_ae(tk, 16, nonce, 8, pdata, plen, aad, aad_len, -+ pos, pos + plen) < 0) { -+ rtw_mfree(crypt, hdrlen + 8 + plen + 8 + AES_BLOCK_SIZE); -+ return NULL; -+ } -+ -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP encrypted", crypt + hdrlen + 8, plen); -+ -+ *encrypted_len = hdrlen + 8 + plen + 8; -+ -+ return crypt; -+} -+ -+ -+u8 * ccmp_encrypt_pv1(const u8 *tk, const u8 *a1, const u8 *a2, const u8 *a3, -+ const u8 *frame, size_t len, -+ size_t hdrlen, const u8 *pn, int keyid, -+ size_t *encrypted_len) -+{ -+ u8 aad[24], nonce[13]; -+ size_t aad_len, plen; -+ u8 *crypt, *pos; -+ struct ieee80211_hdr *hdr; -+ -+ if (len < hdrlen || hdrlen < 12) -+ return NULL; -+ plen = len - hdrlen; -+ -+ crypt = os_malloc(hdrlen + plen + 8 + AES_BLOCK_SIZE); -+ if (crypt == NULL) -+ return NULL; -+ -+ os_memcpy(crypt, frame, hdrlen); -+ hdr = (struct ieee80211_hdr *) crypt; -+ hdr->frame_control |= host_to_le16(BIT(12)); /* Protected Frame */ -+ pos = crypt + hdrlen; -+ -+ os_memset(aad, 0, sizeof(aad)); -+ ccmp_aad_nonce_pv1(crypt, a1, a2, a3, pn, aad, &aad_len, nonce); -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP AAD", aad, aad_len); -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP nonce", nonce, sizeof(nonce)); -+ -+ if (aes_ccm_ae(tk, 16, nonce, 8, frame + hdrlen, plen, aad, aad_len, -+ pos, pos + plen) < 0) { -+ rtw_mfree(crypt, hdrlen + plen + 8 + AES_BLOCK_SIZE); -+ return NULL; -+ } -+ -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP encrypted", crypt + hdrlen, plen); -+ -+ *encrypted_len = hdrlen + plen + 8; -+ -+ return crypt; -+} -+ -+ -+u8 * ccmp_256_decrypt(const u8 *tk, const struct ieee80211_hdr *hdr, -+ const u8 *data, size_t data_len, size_t *decrypted_len) -+{ -+ u8 aad[30], nonce[13]; -+ size_t aad_len; -+ size_t mlen; -+ u8 *plain; -+ -+ if (data_len < 8 + 16) -+ return NULL; -+ -+ plain = os_malloc(data_len + AES_BLOCK_SIZE); -+ if (plain == NULL) -+ return NULL; -+ -+ mlen = data_len - 8 - 16; -+ -+ os_memset(aad, 0, sizeof(aad)); -+ ccmp_aad_nonce(hdr, data, aad, &aad_len, nonce); -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP-256 AAD", aad, aad_len); -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP-256 nonce", nonce, 13); -+ -+ if (aes_ccm_ad(tk, 32, nonce, 16, data + 8, mlen, aad, aad_len, -+ data + 8 + mlen, plain) < 0) { -+ u16 seq_ctrl = le_to_host16(hdr->seq_ctrl); -+ wpa_printf(_MSG_INFO_, "Invalid CCMP-256 MIC in frame: A1=" MACSTR -+ " A2=" MACSTR " A3=" MACSTR " seq=%u frag=%u", -+ MAC2STR(hdr->addr1), MAC2STR(hdr->addr2), -+ MAC2STR(hdr->addr3), -+ WLAN_GET_SEQ_SEQ(seq_ctrl), -+ WLAN_GET_SEQ_FRAG(seq_ctrl)); -+ rtw_mfree(plain, data_len + AES_BLOCK_SIZE); -+ return NULL; -+ } -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP-256 decrypted", plain, mlen); -+ -+ *decrypted_len = mlen; -+ return plain; -+} -+ -+ -+u8 * ccmp_256_encrypt(const u8 *tk, u8 *frame, size_t len, size_t hdrlen, -+ u8 *qos, u8 *pn, int keyid, size_t *encrypted_len) -+{ -+ u8 aad[30], nonce[13]; -+ size_t aad_len, plen; -+ u8 *crypt, *pos, *pdata; -+ struct ieee80211_hdr *hdr; -+ -+ if (len < hdrlen || hdrlen < 24) -+ return NULL; -+ plen = len - hdrlen; -+ -+ crypt = os_malloc(hdrlen + 8 + plen + 16 + AES_BLOCK_SIZE); -+ if (crypt == NULL) -+ return NULL; -+ -+ if (pn == NULL) { -+ os_memcpy(crypt, frame, hdrlen + 8); -+ hdr = (struct ieee80211_hdr *) crypt; -+ hdr->frame_control |= host_to_le16(WLAN_FC_ISWEP); -+ pos = crypt + hdrlen + 8; -+ pdata = frame + hdrlen + 8; -+ } else { -+ os_memcpy(crypt, frame, hdrlen); -+ hdr = (struct ieee80211_hdr *) crypt; -+ hdr->frame_control |= host_to_le16(WLAN_FC_ISWEP); -+ pos = crypt + hdrlen; -+ *pos++ = pn[5]; /* PN0 */ -+ *pos++ = pn[4]; /* PN1 */ -+ *pos++ = 0x00; /* Rsvd */ -+ *pos++ = 0x20 | (keyid << 6); -+ *pos++ = pn[3]; /* PN2 */ -+ *pos++ = pn[2]; /* PN3 */ -+ *pos++ = pn[1]; /* PN4 */ -+ *pos++ = pn[0]; /* PN5 */ -+ pdata = frame + hdrlen; -+ } -+ -+ os_memset(aad, 0, sizeof(aad)); -+ ccmp_aad_nonce(hdr, crypt + hdrlen, aad, &aad_len, nonce); -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP-256 AAD", aad, aad_len); -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP-256 nonce", nonce, 13); -+ -+ if (aes_ccm_ae(tk, 32, nonce, 16, pdata, plen, aad, aad_len, -+ pos, pos + plen) < 0) { -+ rtw_mfree(crypt, hdrlen + 8 + plen + 16 + AES_BLOCK_SIZE); -+ return NULL; -+ } -+ -+ wpa_hexdump(_MSG_EXCESSIVE_, "CCMP-256 encrypted", crypt + hdrlen + 8, -+ plen); -+ -+ *encrypted_len = hdrlen + 8 + plen + 16; -+ -+ return crypt; -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/gcmp.c b/drivers/staging/rtl8723cs/core/crypto/gcmp.c -new file mode 100644 -index 000000000000..2d70a2192fed ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/gcmp.c -@@ -0,0 +1,193 @@ -+/* -+ * GCM with GMAC Protocol (GCMP) -+ * Copyright (c) 2012, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+#include "aes.h" -+#include "aes_wrap.h" -+#include "wlancrypto_wrap.h" -+ -+ -+static void gcmp_aad_nonce(const struct ieee80211_hdr *hdr, const u8 *data, -+ u8 *aad, size_t *aad_len, u8 *nonce) -+{ -+ u16 fc, stype, seq; -+ int qos = 0, addr4 = 0; -+ u8 *pos; -+ -+ fc = le_to_host16(hdr->frame_control); -+ stype = WLAN_FC_GET_STYPE(fc); -+ if ((fc & (WLAN_FC_TODS | WLAN_FC_FROMDS)) == -+ (WLAN_FC_TODS | WLAN_FC_FROMDS)) -+ addr4 = 1; -+ -+ if (WLAN_FC_GET_TYPE(fc) == WLAN_FC_TYPE_DATA) { -+ fc &= ~0x0070; /* Mask subtype bits */ -+ if (stype & WLAN_FC_STYPE_QOS_DATA) { -+ const u8 *qc; -+ qos = 1; -+ fc &= ~WLAN_FC_ORDER; -+ qc = (const u8 *)hdr + 24; -+ if (addr4) -+ qc += ETH_ALEN; -+ } -+ } -+ -+ fc &= ~(WLAN_FC_RETRY | WLAN_FC_PWRMGT | WLAN_FC_MOREDATA); -+ WPA_PUT_LE16(aad, fc); -+ pos = aad + 2; -+ os_memcpy(pos, GetAddr1Ptr((u8 *)hdr), 3 * ETH_ALEN); -+ pos += 3 * ETH_ALEN; -+ seq = le_to_host16(hdr->seq_ctrl); -+ seq &= ~0xfff0; /* Mask Seq#; do not modify Frag# */ -+ WPA_PUT_LE16(pos, seq); -+ pos += 2; -+ -+ wpa_printf(_MSG_INFO_, "pos - aad = %u, qos(%d)\n", (pos - aad), qos); -+ -+ os_memcpy(pos, (u8 *)hdr + 24, addr4 * ETH_ALEN + qos * 2); -+ pos += addr4 * ETH_ALEN; -+ if (qos) { -+ pos[0] &= ~0x70; -+ if (1 /* FIX: either device has SPP A-MSDU Capab = 0 */) -+ pos[0] &= ~0x80; -+ pos++; -+ *pos++ = 0x00; -+ } -+ -+ wpa_printf(_MSG_INFO_, "pos - aad = %u\n", (pos - aad)); -+ *aad_len = pos - aad; -+ -+ os_memcpy(nonce, hdr->addr2, ETH_ALEN); -+ nonce[6] = data[7]; /* PN5 */ -+ nonce[7] = data[6]; /* PN4 */ -+ nonce[8] = data[5]; /* PN3 */ -+ nonce[9] = data[4]; /* PN2 */ -+ nonce[10] = data[1]; /* PN1 */ -+ nonce[11] = data[0]; /* PN0 */ -+} -+ -+/** -+ * gcmp_decrypt - -+ * @tk: the temporal key -+ * @tk_len: length of @tk -+ * @hdr: the mac header -+ * @data: payload after mac header (PN + enc_data + MIC) -+ * @data_len: length of @data (PN + enc_data + MIC) -+ * @decrypted_len: length of the data decrypted -+ */ -+u8 * gcmp_decrypt(const u8 *tk, size_t tk_len, const struct ieee80211_hdr *hdr, -+ const u8 *data, size_t data_len, size_t *decrypted_len) -+{ -+ u8 aad[30], nonce[12], *plain; -+ size_t aad_len, mlen; -+ const u8 *m; -+ -+ if (data_len < 8 + 16) -+ return NULL; -+ -+ plain = os_malloc(data_len + AES_BLOCK_SIZE); -+ if (plain == NULL) -+ return NULL; -+ -+ m = data + 8; -+ mlen = data_len - 8 - 16; -+ -+ os_memset(aad, 0, sizeof(aad)); -+ gcmp_aad_nonce(hdr, data, aad, &aad_len, nonce); -+ wpa_hexdump(_MSG_EXCESSIVE_, "GCMP AAD", aad, aad_len); -+ wpa_hexdump(_MSG_EXCESSIVE_, "GCMP nonce", nonce, sizeof(nonce)); -+ -+ if (aes_gcm_ad(tk, tk_len, nonce, sizeof(nonce), m, mlen, aad, aad_len, -+ m + mlen, plain) < 0) { -+ u16 seq_ctrl = le_to_host16(hdr->seq_ctrl); -+ wpa_printf(_MSG_INFO_, "Invalid GCMP frame: A1=" MACSTR -+ " A2=" MACSTR " A3=" MACSTR " seq=%u frag=%u", -+ MAC2STR(hdr->addr1), MAC2STR(hdr->addr2), -+ MAC2STR(hdr->addr3), -+ WLAN_GET_SEQ_SEQ(seq_ctrl), -+ WLAN_GET_SEQ_FRAG(seq_ctrl)); -+ rtw_mfree(plain, data_len + AES_BLOCK_SIZE); -+ return NULL; -+ } -+ -+ *decrypted_len = mlen; -+ return plain; -+} -+ -+/** -+ * gcmp_encrypt - -+ * @tk: the temporal key -+ * @tk_len: length of @tk -+ * @frame: the point to mac header, the frame including mac header and payload, -+ * if @pn is NULL, then the frame including pn -+ * @len: length of @frame -+ * length = mac header + payload -+ * @hdrlen: length of the mac header -+ * @qos: pointer to the QOS field of the frame -+ * @pn: packet number -+ * @keyid: key id -+ * @encrypted_len: length of the encrypted frame -+ * including mac header, pn, payload and MIC -+ */ -+u8 * gcmp_encrypt(const u8 *tk, size_t tk_len, const u8 *frame, size_t len, -+ size_t hdrlen, const u8 *qos, -+ const u8 *pn, int keyid, size_t *encrypted_len) -+{ -+ u8 aad[30], nonce[12], *crypt, *pos; -+ const u8 *pdata; -+ size_t aad_len, plen; -+ struct ieee80211_hdr *hdr; -+ -+ if (len < hdrlen || hdrlen < 24) -+ return NULL; -+ plen = len - hdrlen; -+ -+ crypt = os_malloc(hdrlen + 8 + plen + 16 + AES_BLOCK_SIZE); -+ if (crypt == NULL) -+ return NULL; -+ -+ if (pn == NULL) { -+ os_memcpy(crypt, frame, hdrlen + 8); -+ hdr = (struct ieee80211_hdr *)crypt; -+ pos = crypt + hdrlen + 8; -+ pdata = frame + hdrlen + 8; -+ } else { -+ os_memcpy(crypt, frame, hdrlen); -+ hdr = (struct ieee80211_hdr *)crypt; -+ pos = crypt + hdrlen; -+ -+ *pos++ = pn[5]; /* PN0 */ -+ *pos++ = pn[4]; /* PN1 */ -+ *pos++ = 0x00; /* Rsvd */ -+ *pos++ = 0x20 | (keyid << 6); -+ *pos++ = pn[3]; /* PN2 */ -+ *pos++ = pn[2]; /* PN3 */ -+ *pos++ = pn[1]; /* PN4 */ -+ *pos++ = pn[0]; /* PN5 */ -+ pdata = frame + hdrlen; -+ } -+ -+ os_memset(aad, 0, sizeof(aad)); -+ gcmp_aad_nonce(hdr, crypt + hdrlen, aad, &aad_len, nonce); -+ wpa_hexdump(_MSG_EXCESSIVE_, "GCMP AAD", aad, aad_len); -+ wpa_hexdump(_MSG_EXCESSIVE_, "GCMP nonce", nonce, sizeof(nonce)); -+ -+ if (aes_gcm_ae(tk, tk_len, nonce, sizeof(nonce), pdata, plen, -+ aad, aad_len, pos, pos + plen) < 0) { -+ rtw_mfree(crypt, hdrlen + 8 + plen + 16 + AES_BLOCK_SIZE); -+ return NULL; -+ } -+ -+ wpa_hexdump(_MSG_EXCESSIVE_, "GCMP MIC", pos + plen, 16); -+ wpa_hexdump(_MSG_EXCESSIVE_, "GCMP encrypted", pos, plen); -+ -+ *encrypted_len = hdrlen + 8 + plen + 16; -+ -+ return crypt; -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/rtw_crypto_wrap.c b/drivers/staging/rtl8723cs/core/crypto/rtw_crypto_wrap.c -new file mode 100644 -index 000000000000..8fdb3c903bb7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/rtw_crypto_wrap.c -@@ -0,0 +1,85 @@ -+#include "rtw_crypto_wrap.h" -+ -+#ifndef DEBUG_CRYPTO -+#define DEBUG_CRYPTO 0 -+#endif /* DEBUG_CRYTO */ -+ -+int os_memcmp(const void *s1, const void *s2, size_t n) -+{ -+ return _rtw_memcmp2(s1, s2, n); -+} -+ -+int os_memcmp_const(const void *a, const void *b, size_t len) -+{ -+ const u8 *aa = a; -+ const u8 *bb = b; -+ size_t i; -+ u8 res; -+ -+ for (res = 0, i = 0; i < len; i++) -+ res |= aa[i] ^ bb[i]; -+ -+ return res; -+} -+ -+void* os_memdup(const void *src, u32 sz) -+{ -+ void *r = rtw_malloc(sz); -+ -+ if (r && src) -+ _rtw_memcpy(r, src, sz); -+ return r; -+} -+ -+size_t os_strlen(const char *s) -+{ -+ const char *p = s; -+ while (*p) -+ p++; -+ return p - s; -+} -+ -+ -+void forced_memzero(void *ptr, size_t len) -+{ -+ _rtw_memset(ptr, 0, len); -+} -+ -+void bin_clear_free(void *bin, size_t len) -+{ -+ if (bin) { -+ forced_memzero(bin, len); -+ rtw_mfree(bin, len); -+ } -+} -+ -+void wpa_printf(int level, const char *fmt, ...) -+{ -+#if DEBUG_CRYPTO -+#define MSG_LEN 100 -+ va_list args; -+ u8 buf[MSG_LEN] = { 0 }; -+ int err; -+ -+ va_start(args, fmt); -+ err = vsnprintf(buf, MSG_LEN, fmt, args); -+ va_end(args); -+ -+ RTW_INFO("%s", buf); -+#undef MSG_LEN -+#endif /* DEBUG_CRYPTO */ -+} -+ -+void wpa_hexdump(int level, const char *title, const void *buf, size_t len) -+{ -+#if DEBUG_CRYPTO -+ RTW_INFO_DUMP((u8 *)title, buf, len); -+#endif /* DEBUG_CRYPTO */ -+} -+ -+void wpa_hexdump_key(int level, const char *title, const void *buf, size_t len) -+{ -+#if DEBUG_CRYPTO -+ RTW_INFO_DUMP((u8 *)title, buf, len); -+#endif /* DEBUG_CRYPTO */ -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/rtw_crypto_wrap.h b/drivers/staging/rtl8723cs/core/crypto/rtw_crypto_wrap.h -new file mode 100644 -index 000000000000..9b64a14194ef ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/rtw_crypto_wrap.h -@@ -0,0 +1,64 @@ -+#ifndef RTW_CRYTO_WRAP_H -+#define RTW_CRYTO_WRAP_H -+ -+#include -+ -+#define TEST_FAIL() 0 -+ -+#define os_memset _rtw_memset -+#define os_memcpy _rtw_memcpy -+#define os_malloc rtw_malloc -+ -+#define le_to_host16 le16_to_cpu -+#define host_to_le16 cpu_to_le16 -+ -+#define WPA_PUT_LE16 RTW_PUT_LE16 -+#define WPA_GET_LE16 RTW_GET_LE16 -+#define WPA_PUT_LE32 RTW_PUT_LE32 -+#define WPA_GET_LE32 RTW_GET_LE32 -+#define WPA_PUT_LE64 RTW_PUT_LE64 -+#define WPA_GET_LE64 RTW_GET_LE64 -+#define WPA_PUT_BE16 RTW_PUT_BE16 -+#define WPA_GET_BE16 RTW_GET_BE16 -+#define WPA_PUT_BE32 RTW_PUT_BE32 -+#define WPA_GET_BE32 RTW_GET_BE32 -+#define WPA_PUT_BE64 RTW_PUT_BE64 -+#define WPA_GET_BE64 RTW_GET_BE64 -+ -+#ifndef MAC2STR -+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5] -+#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x" -+#endif -+ -+#define WLAN_FC_PVER 0x0003 -+#define WLAN_FC_TODS 0x0100 -+#define WLAN_FC_FROMDS 0x0200 -+#define WLAN_FC_MOREFRAG 0x0400 -+#define WLAN_FC_RETRY 0x0800 -+#define WLAN_FC_PWRMGT 0x1000 -+#define WLAN_FC_MOREDATA 0x2000 -+#define WLAN_FC_ISWEP 0x4000 -+#define WLAN_FC_ORDER 0x8000 -+ -+#define WLAN_FC_TYPE_DATA RTW_IEEE80211_FTYPE_DATA -+#define WLAN_FC_TYPE_MGMT RTW_IEEE80211_FTYPE_MGMT -+ -+#define WLAN_FC_STYPE_QOS_DATA RTW_IEEE80211_STYPE_QOS_DATA -+ -+enum { -+ _MSG_EXCESSIVE_, _MSG_MSGDUMP_, _MSG_DEBUG_, _MSG_INFO_, _MSG_WARNING_, _MSG_ERROR_ -+}; -+ -+int os_memcmp(const void *s1, const void *s2, size_t n); -+int os_memcmp_const(const void *a, const void *b, size_t len); -+void* os_memdup(const void *src, u32 sz); -+size_t os_strlen(const char *s); -+ -+void forced_memzero(void *ptr, size_t len); -+void bin_clear_free(void *bin, size_t len); -+ -+void wpa_printf(int level, const char *fmt, ...); -+void wpa_hexdump(int level, const char *title, const void *buf, size_t len); -+void wpa_hexdump_key(int level, const char *title, const void *buf, size_t len); -+ -+#endif /* RTW_CRYTO_WRAP_H */ -diff --git a/drivers/staging/rtl8723cs/core/crypto/sha256-internal.c b/drivers/staging/rtl8723cs/core/crypto/sha256-internal.c -new file mode 100644 -index 000000000000..98228ea3378c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/sha256-internal.c -@@ -0,0 +1,230 @@ -+/* -+ * SHA-256 hash implementation and interface functions -+ * Copyright (c) 2003-2011, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+//#include "common.h" -+#include "sha256.h" -+#include "sha256_i.h" -+//#include "crypto.h" -+#include "wlancrypto_wrap.h" -+ -+ -+/** -+ * sha256_vector - SHA256 hash for data vector -+ * @num_elem: Number of elements in the data vector -+ * @addr: Pointers to the data areas -+ * @len: Lengths of the data blocks -+ * @mac: Buffer for the hash -+ * Returns: 0 on success, -1 of failure -+ */ -+int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, -+ u8 *mac) -+{ -+ struct _sha256_state ctx; -+ size_t i; -+ -+ if (TEST_FAIL()) -+ return -1; -+ -+ _sha256_init(&ctx); -+ for (i = 0; i < num_elem; i++) -+ if (sha256_process(&ctx, addr[i], len[i])) -+ return -1; -+ if (sha256_done(&ctx, mac)) -+ return -1; -+ return 0; -+} -+ -+ -+/* ===== start - public domain SHA256 implementation ===== */ -+ -+/* This is based on SHA256 implementation in LibTomCrypt that was released into -+ * public domain by Tom St Denis. */ -+ -+/* the K array */ -+static const unsigned long K[64] = { -+ 0x428a2f98UL, 0x71374491UL, 0xb5c0fbcfUL, 0xe9b5dba5UL, 0x3956c25bUL, -+ 0x59f111f1UL, 0x923f82a4UL, 0xab1c5ed5UL, 0xd807aa98UL, 0x12835b01UL, -+ 0x243185beUL, 0x550c7dc3UL, 0x72be5d74UL, 0x80deb1feUL, 0x9bdc06a7UL, -+ 0xc19bf174UL, 0xe49b69c1UL, 0xefbe4786UL, 0x0fc19dc6UL, 0x240ca1ccUL, -+ 0x2de92c6fUL, 0x4a7484aaUL, 0x5cb0a9dcUL, 0x76f988daUL, 0x983e5152UL, -+ 0xa831c66dUL, 0xb00327c8UL, 0xbf597fc7UL, 0xc6e00bf3UL, 0xd5a79147UL, -+ 0x06ca6351UL, 0x14292967UL, 0x27b70a85UL, 0x2e1b2138UL, 0x4d2c6dfcUL, -+ 0x53380d13UL, 0x650a7354UL, 0x766a0abbUL, 0x81c2c92eUL, 0x92722c85UL, -+ 0xa2bfe8a1UL, 0xa81a664bUL, 0xc24b8b70UL, 0xc76c51a3UL, 0xd192e819UL, -+ 0xd6990624UL, 0xf40e3585UL, 0x106aa070UL, 0x19a4c116UL, 0x1e376c08UL, -+ 0x2748774cUL, 0x34b0bcb5UL, 0x391c0cb3UL, 0x4ed8aa4aUL, 0x5b9cca4fUL, -+ 0x682e6ff3UL, 0x748f82eeUL, 0x78a5636fUL, 0x84c87814UL, 0x8cc70208UL, -+ 0x90befffaUL, 0xa4506cebUL, 0xbef9a3f7UL, 0xc67178f2UL -+}; -+ -+ -+/* Various logical functions */ -+#define RORc(x, y) \ -+( ((((unsigned long) (x) & 0xFFFFFFFFUL) >> (unsigned long) ((y) & 31)) | \ -+ ((unsigned long) (x) << (unsigned long) (32 - ((y) & 31)))) & 0xFFFFFFFFUL) -+#define Ch(x,y,z) (z ^ (x & (y ^ z))) -+#define Maj(x,y,z) (((x | y) & z) | (x & y)) -+#define S(x, n) RORc((x), (n)) -+#define R(x, n) (((x)&0xFFFFFFFFUL)>>(n)) -+#define Sigma0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22)) -+#define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25)) -+#define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3)) -+#define Gamma1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10)) -+#ifndef MIN -+#define MIN(x, y) (((x) < (y)) ? (x) : (y)) -+#endif -+ -+/* compress 512-bits */ -+static int sha256_compress(struct _sha256_state *md, unsigned char *buf) -+{ -+ u32 S[8], W[64], t0, t1; -+ u32 t; -+ int i; -+ -+ /* copy state into S */ -+ for (i = 0; i < 8; i++) { -+ S[i] = md->state[i]; -+ } -+ -+ /* copy the state into 512-bits into W[0..15] */ -+ for (i = 0; i < 16; i++) -+ W[i] = WPA_GET_BE32(buf + (4 * i)); -+ -+ /* fill W[16..63] */ -+ for (i = 16; i < 64; i++) { -+ W[i] = Gamma1(W[i - 2]) + W[i - 7] + Gamma0(W[i - 15]) + -+ W[i - 16]; -+ } -+ -+ /* Compress */ -+#define RND(a,b,c,d,e,f,g,h,i) \ -+ t0 = h + Sigma1(e) + Ch(e, f, g) + K[i] + W[i]; \ -+ t1 = Sigma0(a) + Maj(a, b, c); \ -+ d += t0; \ -+ h = t0 + t1; -+ -+ for (i = 0; i < 64; ++i) { -+ RND(S[0], S[1], S[2], S[3], S[4], S[5], S[6], S[7], i); -+ t = S[7]; S[7] = S[6]; S[6] = S[5]; S[5] = S[4]; -+ S[4] = S[3]; S[3] = S[2]; S[2] = S[1]; S[1] = S[0]; S[0] = t; -+ } -+ -+ /* feedback */ -+ for (i = 0; i < 8; i++) { -+ md->state[i] = md->state[i] + S[i]; -+ } -+ return 0; -+} -+ -+ -+/* Initialize the hash state */ -+void _sha256_init(struct _sha256_state *md) -+{ -+ md->curlen = 0; -+ md->length = 0; -+ md->state[0] = 0x6A09E667UL; -+ md->state[1] = 0xBB67AE85UL; -+ md->state[2] = 0x3C6EF372UL; -+ md->state[3] = 0xA54FF53AUL; -+ md->state[4] = 0x510E527FUL; -+ md->state[5] = 0x9B05688CUL; -+ md->state[6] = 0x1F83D9ABUL; -+ md->state[7] = 0x5BE0CD19UL; -+} -+ -+/** -+ Process a block of memory though the hash -+ @param md The hash state -+ @param in The data to hash -+ @param inlen The length of the data (octets) -+ @return CRYPT_OK if successful -+*/ -+int sha256_process(struct _sha256_state *md, const unsigned char *in, -+ unsigned long inlen) -+{ -+ unsigned long n; -+ -+ if (md->curlen >= sizeof(md->buf)) -+ return -1; -+ -+ while (inlen > 0) { -+ if (md->curlen == 0 && inlen >= SHA256_BLOCK_SIZE) { -+ if (sha256_compress(md, (unsigned char *) in) < 0) -+ return -1; -+ md->length += SHA256_BLOCK_SIZE * 8; -+ in += SHA256_BLOCK_SIZE; -+ inlen -= SHA256_BLOCK_SIZE; -+ } else { -+ n = MIN(inlen, (SHA256_BLOCK_SIZE - md->curlen)); -+ os_memcpy(md->buf + md->curlen, in, n); -+ md->curlen += n; -+ in += n; -+ inlen -= n; -+ if (md->curlen == SHA256_BLOCK_SIZE) { -+ if (sha256_compress(md, md->buf) < 0) -+ return -1; -+ md->length += 8 * SHA256_BLOCK_SIZE; -+ md->curlen = 0; -+ } -+ } -+ } -+ -+ return 0; -+} -+ -+ -+/** -+ Terminate the hash to get the digest -+ @param md The hash state -+ @param out [out] The destination of the hash (32 bytes) -+ @return CRYPT_OK if successful -+*/ -+int sha256_done(struct _sha256_state *md, unsigned char *out) -+{ -+ int i; -+ -+ if (md->curlen >= sizeof(md->buf)) -+ return -1; -+ -+ /* increase the length of the message */ -+ md->length += md->curlen * 8; -+ -+ /* append the '1' bit */ -+ md->buf[md->curlen++] = (unsigned char) 0x80; -+ -+ /* if the length is currently above 56 bytes we append zeros -+ * then compress. Then we can fall back to padding zeros and length -+ * encoding like normal. -+ */ -+ if (md->curlen > 56) { -+ while (md->curlen < SHA256_BLOCK_SIZE) { -+ md->buf[md->curlen++] = (unsigned char) 0; -+ } -+ sha256_compress(md, md->buf); -+ md->curlen = 0; -+ } -+ -+ /* pad up to 56 bytes of zeroes */ -+ while (md->curlen < 56) { -+ md->buf[md->curlen++] = (unsigned char) 0; -+ } -+ -+ /* store length */ -+ WPA_PUT_BE64(md->buf + 56, md->length); -+ sha256_compress(md, md->buf); -+ -+ /* copy output */ -+ for (i = 0; i < 8; i++) -+ WPA_PUT_BE32(out + (4 * i), md->state[i]); -+ -+ return 0; -+} -+ -+/* ===== end - public domain SHA256 implementation ===== */ -diff --git a/drivers/staging/rtl8723cs/core/crypto/sha256-prf.c b/drivers/staging/rtl8723cs/core/crypto/sha256-prf.c -new file mode 100644 -index 000000000000..642b38ff618c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/sha256-prf.c -@@ -0,0 +1,109 @@ -+/* -+ * SHA256-based PRF (IEEE 802.11r) -+ * Copyright (c) 2003-2016, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+//#include "common.h" -+#include "sha256.h" -+//#include "crypto.h" -+#include "wlancrypto_wrap.h" -+ -+ -+/** -+ * sha256_prf - SHA256-based Pseudo-Random Function (IEEE 802.11r, 8.5.1.5.2) -+ * @key: Key for PRF -+ * @key_len: Length of the key in bytes -+ * @label: A unique label for each purpose of the PRF -+ * @data: Extra data to bind into the key -+ * @data_len: Length of the data -+ * @buf: Buffer for the generated pseudo-random key -+ * @buf_len: Number of bytes of key to generate -+ * Returns: 0 on success, -1 on failure -+ * -+ * This function is used to derive new, cryptographically separate keys from a -+ * given key. -+ */ -+int sha256_prf(const u8 *key, size_t key_len, const char *label, -+ const u8 *data, size_t data_len, u8 *buf, size_t buf_len) -+{ -+ return sha256_prf_bits(key, key_len, label, data, data_len, buf, -+ buf_len * 8); -+} -+ -+ -+/** -+ * sha256_prf_bits - IEEE Std 802.11-2012, 11.6.1.7.2 Key derivation function -+ * @key: Key for KDF -+ * @key_len: Length of the key in bytes -+ * @label: A unique label for each purpose of the PRF -+ * @data: Extra data to bind into the key -+ * @data_len: Length of the data -+ * @buf: Buffer for the generated pseudo-random key -+ * @buf_len: Number of bits of key to generate -+ * Returns: 0 on success, -1 on failure -+ * -+ * This function is used to derive new, cryptographically separate keys from a -+ * given key. If the requested buf_len is not divisible by eight, the least -+ * significant 1-7 bits of the last octet in the output are not part of the -+ * requested output. -+ */ -+int sha256_prf_bits(const u8 *key, size_t key_len, const char *label, -+ const u8 *data, size_t data_len, u8 *buf, -+ size_t buf_len_bits) -+{ -+ u16 counter = 1; -+ size_t pos, plen; -+ u8 hash[SHA256_MAC_LEN]; -+ const u8 *addr[4]; -+ size_t len[4]; -+ u8 counter_le[2], length_le[2]; -+ size_t buf_len = (buf_len_bits + 7) / 8; -+ -+ addr[0] = counter_le; -+ len[0] = 2; -+ addr[1] = (u8 *) label; -+ len[1] = os_strlen(label); -+ addr[2] = data; -+ len[2] = data_len; -+ addr[3] = length_le; -+ len[3] = sizeof(length_le); -+ -+ WPA_PUT_LE16(length_le, buf_len_bits); -+ pos = 0; -+ while (pos < buf_len) { -+ plen = buf_len - pos; -+ WPA_PUT_LE16(counter_le, counter); -+ if (plen >= SHA256_MAC_LEN) { -+ if (hmac_sha256_vector(key, key_len, 4, addr, len, -+ &buf[pos]) < 0) -+ return -1; -+ pos += SHA256_MAC_LEN; -+ } else { -+ if (hmac_sha256_vector(key, key_len, 4, addr, len, -+ hash) < 0) -+ return -1; -+ os_memcpy(&buf[pos], hash, plen); -+ pos += plen; -+ break; -+ } -+ counter++; -+ } -+ -+ /* -+ * Mask out unused bits in the last octet if it does not use all the -+ * bits. -+ */ -+ if (buf_len_bits % 8) { -+ u8 mask = 0xff << (8 - buf_len_bits % 8); -+ buf[pos - 1] &= mask; -+ } -+ -+ forced_memzero(hash, sizeof(hash)); -+ -+ return 0; -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/sha256.c b/drivers/staging/rtl8723cs/core/crypto/sha256.c -new file mode 100644 -index 000000000000..ea5d9e3f2dd6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/sha256.c -@@ -0,0 +1,104 @@ -+/* -+ * SHA-256 hash implementation and interface functions -+ * Copyright (c) 2003-2012, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#include "rtw_crypto_wrap.h" -+ -+#include "sha256.h" -+//#include "crypto.h" -+#include "wlancrypto_wrap.h" -+ -+ -+/** -+ * hmac_sha256_vector - HMAC-SHA256 over data vector (RFC 2104) -+ * @key: Key for HMAC operations -+ * @key_len: Length of the key in bytes -+ * @num_elem: Number of elements in the data vector -+ * @addr: Pointers to the data areas -+ * @len: Lengths of the data blocks -+ * @mac: Buffer for the hash (32 bytes) -+ * Returns: 0 on success, -1 on failure -+ */ -+int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, -+ const u8 *addr[], const size_t *len, u8 *mac) -+{ -+ unsigned char k_pad[64]; /* padding - key XORd with ipad/opad */ -+ unsigned char tk[32]; -+ const u8 *_addr[6]; -+ size_t _len[6], i; -+ -+ if (num_elem > 5) { -+ /* -+ * Fixed limit on the number of fragments to avoid having to -+ * allocate memory (which could fail). -+ */ -+ return -1; -+ } -+ -+ /* if key is longer than 64 bytes reset it to key = SHA256(key) */ -+ if (key_len > 64) { -+ if (sha256_vector(1, &key, &key_len, tk) < 0) -+ return -1; -+ key = tk; -+ key_len = 32; -+ } -+ -+ /* the HMAC_SHA256 transform looks like: -+ * -+ * SHA256(K XOR opad, SHA256(K XOR ipad, text)) -+ * -+ * where K is an n byte key -+ * ipad is the byte 0x36 repeated 64 times -+ * opad is the byte 0x5c repeated 64 times -+ * and text is the data being protected */ -+ -+ /* start out by storing key in ipad */ -+ os_memset(k_pad, 0, sizeof(k_pad)); -+ os_memcpy(k_pad, key, key_len); -+ /* XOR key with ipad values */ -+ for (i = 0; i < 64; i++) -+ k_pad[i] ^= 0x36; -+ -+ /* perform inner SHA256 */ -+ _addr[0] = k_pad; -+ _len[0] = 64; -+ for (i = 0; i < num_elem; i++) { -+ _addr[i + 1] = addr[i]; -+ _len[i + 1] = len[i]; -+ } -+ if (sha256_vector(1 + num_elem, _addr, _len, mac) < 0) -+ return -1; -+ -+ os_memset(k_pad, 0, sizeof(k_pad)); -+ os_memcpy(k_pad, key, key_len); -+ /* XOR key with opad values */ -+ for (i = 0; i < 64; i++) -+ k_pad[i] ^= 0x5c; -+ -+ /* perform outer SHA256 */ -+ _addr[0] = k_pad; -+ _len[0] = 64; -+ _addr[1] = mac; -+ _len[1] = SHA256_MAC_LEN; -+ return sha256_vector(2, _addr, _len, mac); -+} -+ -+ -+/** -+ * hmac_sha256 - HMAC-SHA256 over data buffer (RFC 2104) -+ * @key: Key for HMAC operations -+ * @key_len: Length of the key in bytes -+ * @data: Pointers to the data area -+ * @data_len: Length of the data area -+ * @mac: Buffer for the hash (32 bytes) -+ * Returns: 0 on success, -1 on failure -+ */ -+int hmac_sha256(const u8 *key, size_t key_len, const u8 *data, -+ size_t data_len, u8 *mac) -+{ -+ return hmac_sha256_vector(key, key_len, 1, &data, &data_len, mac); -+} -diff --git a/drivers/staging/rtl8723cs/core/crypto/sha256.h b/drivers/staging/rtl8723cs/core/crypto/sha256.h -new file mode 100644 -index 000000000000..5219022edd7d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/sha256.h -@@ -0,0 +1,30 @@ -+/* -+ * SHA256 hash implementation and interface functions -+ * Copyright (c) 2003-2016, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#ifndef SHA256_H -+#define SHA256_H -+ -+#define SHA256_MAC_LEN 32 -+ -+int hmac_sha256_vector(const u8 *key, size_t key_len, size_t num_elem, -+ const u8 *addr[], const size_t *len, u8 *mac); -+int hmac_sha256(const u8 *key, size_t key_len, const u8 *data, -+ size_t data_len, u8 *mac); -+int sha256_prf(const u8 *key, size_t key_len, const char *label, -+ const u8 *data, size_t data_len, u8 *buf, size_t buf_len); -+int sha256_prf_bits(const u8 *key, size_t key_len, const char *label, -+ const u8 *data, size_t data_len, u8 *buf, -+ size_t buf_len_bits); -+void tls_prf_sha256(const u8 *secret, size_t secret_len, -+ const char *label, const u8 *seed, size_t seed_len, -+ u8 *out, size_t outlen); -+int hmac_sha256_kdf(const u8 *secret, size_t secret_len, -+ const char *label, const u8 *seed, size_t seed_len, -+ u8 *out, size_t outlen); -+ -+#endif /* SHA256_H */ -diff --git a/drivers/staging/rtl8723cs/core/crypto/sha256_i.h b/drivers/staging/rtl8723cs/core/crypto/sha256_i.h -new file mode 100644 -index 000000000000..11ddd6b14716 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/sha256_i.h -@@ -0,0 +1,25 @@ -+/* -+ * SHA-256 internal definitions -+ * Copyright (c) 2003-2011, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#ifndef SHA256_I_H -+#define SHA256_I_H -+ -+#define SHA256_BLOCK_SIZE 64 -+ -+struct _sha256_state { -+ u64 length; -+ u32 state[8], curlen; -+ u8 buf[SHA256_BLOCK_SIZE]; -+}; -+ -+void _sha256_init(struct _sha256_state *md); -+int sha256_process(struct _sha256_state *md, const unsigned char *in, -+ unsigned long inlen); -+int sha256_done(struct _sha256_state *md, unsigned char *out); -+ -+#endif /* SHA256_I_H */ -diff --git a/drivers/staging/rtl8723cs/core/crypto/wlancrypto_wrap.h b/drivers/staging/rtl8723cs/core/crypto/wlancrypto_wrap.h -new file mode 100644 -index 000000000000..e331d036bb49 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/crypto/wlancrypto_wrap.h -@@ -0,0 +1,34 @@ -+/* -+ * wlantest - IEEE 802.11 protocol monitoring and testing tool -+ * Copyright (c) 2010-2013, Jouni Malinen -+ * -+ * This software may be distributed under the terms of the BSD license. -+ * See README for more details. -+ */ -+ -+#ifndef WLANCRYPTO_WRAP_H -+#define WLANCRYPTO_WRAP_H -+ -+int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, -+ u8 *mac); -+ -+u8* ccmp_decrypt(const u8 *tk, const struct ieee80211_hdr *hdr, -+ const u8 *data, size_t data_len, size_t *decrypted_len); -+u8* ccmp_encrypt(const u8 *tk, u8 *frame, size_t len, size_t hdrlen, u8 *qos, -+ u8 *pn, int keyid, size_t *encrypted_len); -+u8* ccmp_encrypt_pv1(const u8 *tk, const u8 *a1, const u8 *a2, const u8 *a3, -+ const u8 *frame, size_t len, -+ size_t hdrlen, const u8 *pn, int keyid, -+ size_t *encrypted_len); -+u8* ccmp_256_decrypt(const u8 *tk, const struct ieee80211_hdr *hdr, -+ const u8 *data, size_t data_len, size_t *decrypted_len); -+u8* ccmp_256_encrypt(const u8 *tk, u8 *frame, size_t len, size_t hdrlen, -+ u8 *qos, u8 *pn, int keyid, size_t *encrypted_len); -+ -+u8* gcmp_decrypt(const u8 *tk, size_t tk_len, const struct ieee80211_hdr *hdr, -+ const u8 *data, size_t data_len, size_t *decrypted_len); -+u8* gcmp_encrypt(const u8 *tk, size_t tk_len, const u8 *frame, size_t len, -+ size_t hdrlen, const u8 *qos, -+ const u8 *pn, int keyid, size_t *encrypted_len); -+ -+#endif /* WLANCRYPTO_WRAP_H */ -diff --git a/drivers/staging/rtl8723cs/core/efuse/rtw_efuse.c b/drivers/staging/rtl8723cs/core/efuse/rtw_efuse.c -new file mode 100644 -index 000000000000..b503f68b55df ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/efuse/rtw_efuse.c -@@ -0,0 +1,3574 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_EFUSE_C_ -+ -+#include -+#include -+ -+#include "../hal/efuse/efuse_mask.h" -+ -+/*------------------------Define local variable------------------------------*/ -+u8 fakeEfuseBank = {0}; -+u32 fakeEfuseUsedBytes = {0}; -+u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE] = {0}; -+u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN] = {0}; -+u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN] = {0}; -+ -+u32 BTEfuseUsedBytes = {0}; -+u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; -+u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0}; -+u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0}; -+ -+u32 fakeBTEfuseUsedBytes = {0}; -+u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; -+u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0}; -+u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0}; -+ -+u8 maskfileBuffer[64]; -+u8 btmaskfileBuffer[64]; -+ -+/*------------------------Define local variable------------------------------*/ -+BOOLEAN rtw_file_efuse_IsMasked(PADAPTER pAdapter, u16 Offset, u8 *maskbuf) -+{ -+ int r = Offset / 16; -+ int c = (Offset % 16) / 2; -+ int result = 0; -+ -+ if (pAdapter->registrypriv.boffefusemask) -+ return FALSE; -+ -+ if (c < 4) /* Upper double word */ -+ result = (maskbuf[r] & (0x10 << c)); -+ else -+ result = (maskbuf[r] & (0x01 << (c - 4))); -+ -+ return (result > 0) ? 0 : 1; -+} -+ -+BOOLEAN efuse_IsBT_Masked(PADAPTER pAdapter, u16 Offset) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ -+ if (pAdapter->registrypriv.boffefusemask) -+ return FALSE; -+ -+#ifdef CONFIG_BT_EFUSE_MASK -+#ifdef CONFIG_RTL8822C -+#ifdef CONFIG_USB_HCI -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ return (IS_BT_MASKED(8822C, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#ifdef CONFIG_PCI_HCI -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ return (IS_BT_MASKED(8822C, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#ifdef CONFIG_SDIO_HCI -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ return (IS_BT_MASKED(8822C, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#endif /*#ifdef CONFIG_RTL8822C*/ -+#endif /* CONFIG_BT_EFUSE_MASK */ -+ return FALSE; -+} -+ -+void rtw_bt_efuse_mask_array(PADAPTER pAdapter, u8 *pArray) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ -+#ifdef CONFIG_BT_EFUSE_MASK -+#ifdef CONFIG_RTL8822C -+#ifdef CONFIG_USB_HCI -+if (IS_HARDWARE_TYPE_8822CU(pAdapter)) -+ GET_BT_MASK_ARRAY(8822C, _MUSB, pArray); -+#endif -+#ifdef CONFIG_PCI_HCI -+ if (IS_HARDWARE_TYPE_8822CE(pAdapter)) -+ GET_BT_MASK_ARRAY(8822C, _MPCIE, pArray); -+#endif -+#ifdef CONFIG_SDIO_HCI -+ if (IS_HARDWARE_TYPE_8822CS(pAdapter)) -+ GET_BT_MASK_ARRAY(8822C, _MSDIO, pArray); -+#endif -+#endif /*#ifdef CONFIG_RTL8822C*/ -+#endif /* CONFIG_BT_EFUSE_MASK */ -+ -+} -+ -+u16 rtw_get_bt_efuse_mask_arraylen(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+#ifdef CONFIG_BT_EFUSE_MASK -+#ifdef CONFIG_RTL8822C -+#ifdef CONFIG_USB_HCI -+ if (IS_HARDWARE_TYPE_8822CU(pAdapter)) -+ return GET_BT_MASK_ARRAY_LEN(8822C, _MUSB); -+#endif -+#ifdef CONFIG_PCI_HCI -+ if (IS_HARDWARE_TYPE_8822CE(pAdapter)) -+ return GET_BT_MASK_ARRAY_LEN(8822C, _MPCIE); -+#endif -+#ifdef CONFIG_SDIO_HCI -+ if (IS_HARDWARE_TYPE_8822CS(pAdapter)) -+ return GET_BT_MASK_ARRAY_LEN(8822C, _MSDIO); -+#endif -+#endif /*#ifdef CONFIG_RTL8822C*/ -+#endif /* CONFIG_BT_EFUSE_MASK */ -+ -+ return 0; -+} -+ -+BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset) -+{ -+ -+ if (pAdapter->registrypriv.boffefusemask) -+ return FALSE; -+ -+#ifdef CONFIG_USB_HCI -+#if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) -+ return (IS_MASKED(8188E, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8812A) -+ if (IS_HARDWARE_TYPE_8812(pAdapter)) -+ return (IS_MASKED(8812A, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8821A) -+#if 0 -+ if (IS_HARDWARE_TYPE_8811AU(pAdapter)) -+ return (IS_MASKED(8811A, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+ if (IS_HARDWARE_TYPE_8821(pAdapter)) -+ return (IS_MASKED(8821A, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8192E) -+ if (IS_HARDWARE_TYPE_8192E(pAdapter)) -+ return (IS_MASKED(8192E, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8723B) -+ if (IS_HARDWARE_TYPE_8723B(pAdapter)) -+ return (IS_MASKED(8723B, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8703B) -+ if (IS_HARDWARE_TYPE_8703B(pAdapter)) -+ return (IS_MASKED(8703B, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8814A) -+ if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ return (IS_MASKED(8814A, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8188F) -+ if (IS_HARDWARE_TYPE_8188F(pAdapter)) -+ return (IS_MASKED(8188F, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8188GTV) -+ if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) -+ return (IS_MASKED(8188GTV, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8822B) -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) -+ return (IS_MASKED(8822B, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8723D) -+ if (IS_HARDWARE_TYPE_8723D(pAdapter)) -+ return (IS_MASKED(8723D, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8710B) -+ if (IS_HARDWARE_TYPE_8710B(pAdapter)) -+ return (IS_MASKED(8710B, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_8821CU(pAdapter)) -+ return (IS_MASKED(8821C, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+ -+#if defined(CONFIG_RTL8192F) -+ if (IS_HARDWARE_TYPE_8192FU(pAdapter)) -+ return (IS_MASKED(8192F, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8822C) -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ return (IS_MASKED(8822C, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8814B) -+ if (IS_HARDWARE_TYPE_8814B(pAdapter)) -+ return (IS_MASKED(8814B, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8723F) -+ if (IS_HARDWARE_TYPE_8723F(pAdapter)) -+ return (IS_MASKED(8723F, _MUSB, Offset)) ? TRUE : FALSE; -+#endif -+#endif /*CONFIG_USB_HCI*/ -+ -+#ifdef CONFIG_PCI_HCI -+#if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) -+ return (IS_MASKED(8188E, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8192E) -+ if (IS_HARDWARE_TYPE_8192E(pAdapter)) -+ return (IS_MASKED(8192E, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8812A) -+ if (IS_HARDWARE_TYPE_8812(pAdapter)) -+ return (IS_MASKED(8812A, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_8821(pAdapter)) -+ return (IS_MASKED(8821A, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8723B) -+ if (IS_HARDWARE_TYPE_8723B(pAdapter)) -+ return (IS_MASKED(8723B, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8814A) -+ if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ return (IS_MASKED(8814A, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8822B) -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) -+ return (IS_MASKED(8822B, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_8821CE(pAdapter)) -+ return (IS_MASKED(8821C, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+ -+#if defined(CONFIG_RTL8192F) -+ if (IS_HARDWARE_TYPE_8192FE(pAdapter)) -+ return (IS_MASKED(8192F, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8822C) -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ return (IS_MASKED(8822C, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8814B) -+ if (IS_HARDWARE_TYPE_8814B(pAdapter)) -+ return (IS_MASKED(8814B, _MPCIE, Offset)) ? TRUE : FALSE; -+#endif -+#endif /*CONFIG_PCI_HCI*/ -+ -+#ifdef CONFIG_SDIO_HCI -+#ifdef CONFIG_RTL8188E_SDIO -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) -+ return (IS_MASKED(8188E, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#ifdef CONFIG_RTL8723B -+ if (IS_HARDWARE_TYPE_8723BS(pAdapter)) -+ return (IS_MASKED(8723B, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#ifdef CONFIG_RTL8188F -+ if (IS_HARDWARE_TYPE_8188F(pAdapter)) -+ return (IS_MASKED(8188F, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#ifdef CONFIG_RTL8188GTV -+ if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) -+ return (IS_MASKED(8188GTV, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#ifdef CONFIG_RTL8192E -+ if (IS_HARDWARE_TYPE_8192ES(pAdapter)) -+ return (IS_MASKED(8192E, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_8821S(pAdapter)) -+ return (IS_MASKED(8821A, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_8821CS(pAdapter)) -+ return (IS_MASKED(8821C, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8822B) -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) -+ return (IS_MASKED(8822B, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8192F) -+ if (IS_HARDWARE_TYPE_8192FS(pAdapter)) -+ return (IS_MASKED(8192F, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8822C) -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ return (IS_MASKED(8822C, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#if defined(CONFIG_RTL8723F) -+ if (IS_HARDWARE_TYPE_8723F(pAdapter)) -+ return (IS_MASKED(8723F, _MSDIO, Offset)) ? TRUE : FALSE; -+#endif -+#endif /*CONFIG_SDIO_HCI*/ -+ -+ return FALSE; -+} -+ -+void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray) -+{ -+ -+#ifdef CONFIG_USB_HCI -+#if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) -+ GET_MASK_ARRAY(8188E, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8812A) -+ if (IS_HARDWARE_TYPE_8812(pAdapter)) -+ GET_MASK_ARRAY(8812A, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_8821(pAdapter)) -+ GET_MASK_ARRAY(8821A, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8192E) -+ if (IS_HARDWARE_TYPE_8192E(pAdapter)) -+ GET_MASK_ARRAY(8192E, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8723B) -+ if (IS_HARDWARE_TYPE_8723B(pAdapter)) -+ GET_MASK_ARRAY(8723B, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8703B) -+ if (IS_HARDWARE_TYPE_8703B(pAdapter)) -+ GET_MASK_ARRAY(8703B, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8188F) -+ if (IS_HARDWARE_TYPE_8188F(pAdapter)) -+ GET_MASK_ARRAY(8188F, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8188GTV) -+ if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) -+ GET_MASK_ARRAY(8188GTV, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8814A) -+ if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ GET_MASK_ARRAY(8814A, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8822B) -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) -+ GET_MASK_ARRAY(8822B, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_8821CU(pAdapter)) -+ GET_MASK_ARRAY(8821C, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8192F) -+ if (IS_HARDWARE_TYPE_8192FU(pAdapter)) -+ GET_MASK_ARRAY(8192F, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8822C) -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ GET_MASK_ARRAY(8822C, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8814B) -+ if (IS_HARDWARE_TYPE_8814B(pAdapter)) -+ GET_MASK_ARRAY(8814B, _MUSB, pArray); -+#endif -+#if defined(CONFIG_RTL8723F) -+ if (IS_HARDWARE_TYPE_8723F(pAdapter)) -+ GET_MASK_ARRAY(8723F, _MUSB, pArray); -+#endif -+#endif /*CONFIG_USB_HCI*/ -+ -+#ifdef CONFIG_PCI_HCI -+#if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) -+ GET_MASK_ARRAY(8188E, _MPCIE, pArray); -+#endif -+#if defined(CONFIG_RTL8192E) -+ if (IS_HARDWARE_TYPE_8192E(pAdapter)) -+ GET_MASK_ARRAY(8192E, _MPCIE, pArray); -+#endif -+#if defined(CONFIG_RTL8812A) -+ if (IS_HARDWARE_TYPE_8812(pAdapter)) -+ GET_MASK_ARRAY(8812A, _MPCIE, pArray); -+#endif -+#if defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_8821(pAdapter)) -+ GET_MASK_ARRAY(8821A, _MPCIE, pArray); -+#endif -+#if defined(CONFIG_RTL8723B) -+ if (IS_HARDWARE_TYPE_8723B(pAdapter)) -+ GET_MASK_ARRAY(8723B, _MPCIE, pArray); -+#endif -+#if defined(CONFIG_RTL8814A) -+ if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ GET_MASK_ARRAY(8814A, _MPCIE, pArray); -+#endif -+#if defined(CONFIG_RTL8822B) -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) -+ GET_MASK_ARRAY(8822B, _MPCIE, pArray); -+#endif -+#if defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_8821CE(pAdapter)) -+ GET_MASK_ARRAY(8821C, _MPCIE, pArray); -+#endif -+#if defined(CONFIG_RTL8192F) -+ if (IS_HARDWARE_TYPE_8192FE(pAdapter)) -+ GET_MASK_ARRAY(8192F, _MPCIE, pArray); -+#endif -+#if defined(CONFIG_RTL8822C) -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ GET_MASK_ARRAY(8822C, _MPCIE, pArray); -+#endif -+#if defined(CONFIG_RTL8814B) -+ if (IS_HARDWARE_TYPE_8814B(pAdapter)) -+ GET_MASK_ARRAY(8814B, _MPCIE, pArray); -+#endif -+#endif /*CONFIG_PCI_HCI*/ -+ -+#ifdef CONFIG_SDIO_HCI -+#if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) -+ GET_MASK_ARRAY(8188E, _MSDIO, pArray); -+#endif -+#if defined(CONFIG_RTL8723B) -+ if (IS_HARDWARE_TYPE_8723BS(pAdapter)) -+ GET_MASK_ARRAY(8723B, _MSDIO, pArray); -+#endif -+#if defined(CONFIG_RTL8188F) -+ if (IS_HARDWARE_TYPE_8188F(pAdapter)) -+ GET_MASK_ARRAY(8188F, _MSDIO, pArray); -+#endif -+#if defined(CONFIG_RTL8188GTV) -+ if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) -+ GET_MASK_ARRAY(8188GTV, _MSDIO, pArray); -+#endif -+#if defined(CONFIG_RTL8192E) -+ if (IS_HARDWARE_TYPE_8192ES(pAdapter)) -+ GET_MASK_ARRAY(8192E, _MSDIO, pArray); -+#endif -+#if defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_8821S(pAdapter)) -+ GET_MASK_ARRAY(8821A, _MSDIO, pArray); -+#endif -+#if defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_8821CS(pAdapter)) -+ GET_MASK_ARRAY(8821C , _MSDIO, pArray); -+#endif -+#if defined(CONFIG_RTL8822B) -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) -+ GET_MASK_ARRAY(8822B , _MSDIO, pArray); -+#endif -+#if defined(CONFIG_RTL8192F) -+ if (IS_HARDWARE_TYPE_8192FS(pAdapter)) -+ GET_MASK_ARRAY(8192F, _MSDIO, pArray); -+#endif -+#if defined(CONFIG_RTL8822C) -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ GET_MASK_ARRAY(8822C , _MSDIO, pArray); -+#endif -+#if defined(CONFIG_RTL8723F) -+ if (IS_HARDWARE_TYPE_8723F(pAdapter)) -+ GET_MASK_ARRAY(8723F, _MSDIO, pArray); -+#endif -+#endif /*CONFIG_SDIO_HCI*/ -+} -+ -+u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter) -+{ -+ -+#ifdef CONFIG_USB_HCI -+#if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8188E, _MUSB); -+#endif -+#if defined(CONFIG_RTL8812A) -+ if (IS_HARDWARE_TYPE_8812(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8812A, _MUSB); -+#endif -+#if defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_8821(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8821A, _MUSB); -+#endif -+#if defined(CONFIG_RTL8192E) -+ if (IS_HARDWARE_TYPE_8192E(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8192E, _MUSB); -+#endif -+#if defined(CONFIG_RTL8723B) -+ if (IS_HARDWARE_TYPE_8723B(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8723B, _MUSB); -+#endif -+#if defined(CONFIG_RTL8703B) -+ if (IS_HARDWARE_TYPE_8703B(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8703B, _MUSB); -+#endif -+#if defined(CONFIG_RTL8188F) -+ if (IS_HARDWARE_TYPE_8188F(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8188F, _MUSB); -+#endif -+#if defined(CONFIG_RTL8188GTV) -+ if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8188GTV, _MUSB); -+#endif -+#if defined(CONFIG_RTL8814A) -+ if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8814A, _MUSB); -+#endif -+#if defined(CONFIG_RTL8822B) -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8822B, _MUSB); -+#endif -+#if defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_8821CU(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8821C, _MUSB); -+#endif -+#if defined(CONFIG_RTL8192F) -+ if (IS_HARDWARE_TYPE_8192FU(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8192F, _MUSB); -+#endif -+#if defined(CONFIG_RTL8822C) -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8822C, _MUSB); -+#endif -+#if defined(CONFIG_RTL8814B) -+ if (IS_HARDWARE_TYPE_8814B(pAdapter)) { -+ return GET_MASK_ARRAY_LEN(8814B, _MUSB); -+ } -+#endif -+#if defined(CONFIG_RTL8723F) -+ if (IS_HARDWARE_TYPE_8723F(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8723F, _MUSB); -+#endif -+#endif /*CONFIG_USB_HCI*/ -+ -+#ifdef CONFIG_PCI_HCI -+#if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8188E, _MPCIE); -+#endif -+#if defined(CONFIG_RTL8192E) -+ if (IS_HARDWARE_TYPE_8192E(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8192E, _MPCIE); -+#endif -+#if defined(CONFIG_RTL8812A) -+ if (IS_HARDWARE_TYPE_8812(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8812A, _MPCIE); -+#endif -+#if defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_8821(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8821A, _MPCIE); -+#endif -+#if defined(CONFIG_RTL8723B) -+ if (IS_HARDWARE_TYPE_8723B(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8723B, _MPCIE); -+#endif -+#if defined(CONFIG_RTL8814A) -+ if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8814A, _MPCIE); -+#endif -+#if defined(CONFIG_RTL8822B) -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8822B, _MPCIE); -+#endif -+#if defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_8821CE(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8821C, _MPCIE); -+#endif -+#if defined(CONFIG_RTL8192F) -+ if (IS_HARDWARE_TYPE_8192FE(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8192F, _MPCIE); -+#endif -+#if defined(CONFIG_RTL8822C) -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8822C, _MPCIE); -+#endif -+#if defined(CONFIG_RTL8814B) -+ if (IS_HARDWARE_TYPE_8814B(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8814B, _MPCIE); -+#endif -+#endif /*CONFIG_PCI_HCI*/ -+ -+#ifdef CONFIG_SDIO_HCI -+#if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8188E, _MSDIO); -+#endif -+#if defined(CONFIG_RTL8723B) -+ if (IS_HARDWARE_TYPE_8723BS(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8723B, _MSDIO); -+#endif -+#if defined(CONFIG_RTL8188F) -+ if (IS_HARDWARE_TYPE_8188F(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8188F, _MSDIO); -+#endif -+#if defined(CONFIG_RTL8188GTV) -+ if (IS_HARDWARE_TYPE_8188GTV(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8188GTV, _MSDIO); -+#endif -+#if defined(CONFIG_RTL8192E) -+ if (IS_HARDWARE_TYPE_8192ES(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8192E, _MSDIO); -+#endif -+#if defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_8821S(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8821A, _MSDIO); -+#endif -+#if defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_8821CS(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8821C, _MSDIO); -+#endif -+#if defined(CONFIG_RTL8822B) -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8822B, _MSDIO); -+#endif -+#if defined(CONFIG_RTL8192F) -+ if (IS_HARDWARE_TYPE_8192FS(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8192F, _MSDIO); -+#endif -+#if defined(CONFIG_RTL8822C) -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8822C, _MSDIO); -+#endif -+#if defined(CONFIG_RTL8723F) -+ if (IS_HARDWARE_TYPE_8723F(pAdapter)) -+ return GET_MASK_ARRAY_LEN(8723F, _MSDIO); -+#endif -+#endif/*CONFIG_SDIO_HCI*/ -+ return 0; -+} -+ -+static void rtw_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) -+{ -+ u16 i = 0; -+ -+ if (padapter->registrypriv.boffefusemask == 0) { -+ for (i = 0; i < cnts; i++) { -+ if (padapter->registrypriv.bFileMaskEfuse == _TRUE) { -+ if (rtw_file_efuse_IsMasked(padapter, addr + i, maskfileBuffer)) /*use file efuse mask.*/ -+ data[i] = 0xff; -+ else -+ RTW_DBG("data[%x] = %x\n", i, data[i]); -+ } else { -+ if (efuse_IsMasked(padapter, addr + i)) -+ data[i] = 0xff; -+ else -+ RTW_DBG("data[%x] = %x\n", i, data[i]); -+ } -+ } -+ } -+} -+ -+u8 rtw_efuse_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) -+{ -+ u8 ret = _SUCCESS; -+ u16 mapLen = 0; -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); -+ -+ ret = rtw_efuse_map_read(padapter, addr, cnts , data); -+ -+ rtw_mask_map_read(padapter, addr, cnts , data); -+ -+ return ret; -+ -+} -+ -+/* *********************************************************** -+ * Efuse related code -+ * *********************************************************** */ -+static u8 hal_EfuseSwitchToBank( -+ PADAPTER padapter, -+ u8 bank, -+ u8 bPseudoTest) -+{ -+ u8 bRet = _FALSE; -+ u32 value32 = 0; -+#ifdef HAL_EFUSE_MEMORY -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; -+#endif -+ -+ -+ RTW_INFO("%s: Efuse switch bank to %d\n", __FUNCTION__, bank); -+ if (bPseudoTest) { -+#ifdef HAL_EFUSE_MEMORY -+ pEfuseHal->fakeEfuseBank = bank; -+#else -+ fakeEfuseBank = bank; -+#endif -+ bRet = _TRUE; -+ } else { -+ value32 = rtw_read32(padapter, 0x34); -+ bRet = _TRUE; -+ switch (bank) { -+ case 0: -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); -+ break; -+ case 1: -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0); -+ break; -+ case 2: -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1); -+ break; -+ case 3: -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2); -+ break; -+ default: -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); -+ bRet = _FALSE; -+ break; -+ } -+ rtw_write32(padapter, 0x34, value32); -+ } -+ -+ return bRet; -+} -+ -+void rtw_efuse_analyze(PADAPTER padapter, u8 Type, u8 Fake) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ PEFUSE_HAL pEfuseHal = &(pHalData->EfuseHal); -+ u16 eFuse_Addr = 0; -+ u8 offset, wden; -+ u16 i, j; -+ u8 efuseHeader = 0, efuseExtHdr = 0, efuseData[EFUSE_MAX_WORD_UNIT*2] = {0}, dataCnt = 0; -+ u16 efuseHeader2Byte = 0; -+ u8 *eFuseWord = NULL;// [EFUSE_MAX_SECTION_NUM][EFUSE_MAX_WORD_UNIT]; -+ u8 offset_2_0 = 0; -+ u8 pgSectionCnt = 0; -+ u8 wd_cnt = 0; -+ u8 max_section = 64; -+ u16 mapLen = 0, maprawlen = 0; -+ boolean bExtHeader = _FALSE; -+ u8 efuseType = EFUSE_WIFI; -+ boolean bPseudoTest = _FALSE; -+ u8 bank = 0, startBank = 0, endBank = 1-1; -+ boolean bCheckNextBank = FALSE; -+ u8 protectBytesBank = 0; -+ u16 efuse_max = 0; -+ u8 ParseEfuseExtHdr, ParseEfuseHeader, ParseOffset, ParseWDEN, ParseOffset2_0; -+ -+ eFuseWord = rtw_zmalloc(EFUSE_MAX_SECTION_NUM * (EFUSE_MAX_WORD_UNIT * 2)); -+ -+ if (eFuseWord == NULL) { -+ RTW_INFO("%s:rtw_zmalloc eFuseWord = NULL !!\n", __func__); -+ return; -+ } -+ -+ RTW_INFO("\n"); -+ if (Type == 0) { -+ if (Fake == 0) { -+ RTW_INFO("\n\tEFUSE_Analyze Wifi Content\n"); -+ efuseType = EFUSE_WIFI; -+ bPseudoTest = FALSE; -+ startBank = 0; -+ endBank = 0; -+ } else { -+ RTW_INFO("\n\tEFUSE_Analyze Wifi Pseudo Content\n"); -+ efuseType = EFUSE_WIFI; -+ bPseudoTest = TRUE; -+ startBank = 0; -+ endBank = 0; -+ } -+ } else { -+ if (Fake == 0) { -+ RTW_INFO("\n\tEFUSE_Analyze BT Content\n"); -+ efuseType = EFUSE_BT; -+ bPseudoTest = FALSE; -+ startBank = 1; -+ endBank = EFUSE_MAX_BANK - 1; -+ } else { -+ RTW_INFO("\n\tEFUSE_Analyze BT Pseudo Content\n"); -+ efuseType = EFUSE_BT; -+ bPseudoTest = TRUE; -+ startBank = 1; -+ endBank = EFUSE_MAX_BANK - 1; -+ if (IS_HARDWARE_TYPE_8821(padapter)) -+ endBank = 3 - 1;/*EFUSE_MAX_BANK_8821A - 1;*/ -+ } -+ } -+ -+ RTW_INFO("\n\r 1Byte header, [7:4]=offset, [3:0]=word enable\n"); -+ RTW_INFO("\n\r 2Byte header, header[7:5]=offset[2:0], header[4:0]=0x0F\n"); -+ RTW_INFO("\n\r 2Byte header, extHeader[7:4]=offset[6:3], extHeader[3:0]=word enable\n"); -+ -+ EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, bPseudoTest); -+ EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest); -+ EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_PROTECT_BYTES_BANK, (void *)&protectBytesBank, bPseudoTest); -+ EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_CONTENT_LEN_BANK, (void *)&efuse_max, bPseudoTest); -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&maprawlen, _FALSE); -+ -+ _rtw_memset(eFuseWord, 0xff, EFUSE_MAX_SECTION_NUM * (EFUSE_MAX_WORD_UNIT * 2)); -+ _rtw_memset(pEfuseHal->fakeEfuseInitMap, 0xff, EFUSE_MAX_MAP_LEN); -+ -+ if (IS_HARDWARE_TYPE_8821(padapter)) -+ endBank = 3 - 1;/*EFUSE_MAX_BANK_8821A - 1;*/ -+ -+ for (bank = startBank; bank <= endBank; bank++) { -+ if (!hal_EfuseSwitchToBank(padapter, bank, bPseudoTest)) { -+ RTW_INFO("EFUSE_SwitchToBank() Fail!!\n"); -+ goto out_free_buffer; -+ } -+ -+ eFuse_Addr = bank * EFUSE_MAX_BANK_SIZE; -+ -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); -+ -+ if (efuseHeader == 0xFF && bank == startBank && Fake != TRUE) { -+ RTW_INFO("Non-PGed Efuse\n"); -+ goto out_free_buffer; -+ } -+ RTW_INFO("EFUSE_REAL_CONTENT_LEN = %d\n", maprawlen); -+ -+ while ((efuseHeader != 0xFF) && ((efuseType == EFUSE_WIFI && (eFuse_Addr < maprawlen)) || (efuseType == EFUSE_BT && (eFuse_Addr < (endBank + 1) * EFUSE_MAX_BANK_SIZE)))) { -+ -+ RTW_INFO("Analyzing: Offset: 0x%X\n", eFuse_Addr); -+ -+ /* Check PG header for section num.*/ -+ if (EXT_HEADER(efuseHeader)) { -+ bExtHeader = TRUE; -+ offset_2_0 = GET_HDR_OFFSET_2_0(efuseHeader); -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); -+ -+ if (efuseExtHdr != 0xff) { -+ if (ALL_WORDS_DISABLED(efuseExtHdr)) { -+ /* Read next pg header*/ -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); -+ continue; -+ } else { -+ offset = ((efuseExtHdr & 0xF0) >> 1) | offset_2_0; -+ wden = (efuseExtHdr & 0x0F); -+ efuseHeader2Byte = (efuseExtHdr<<8)|efuseHeader; -+ RTW_INFO("Find efuseHeader2Byte = 0x%04X, offset=%d, wden=0x%x\n", -+ efuseHeader2Byte, offset, wden); -+ } -+ } else { -+ RTW_INFO("Error, efuse[%d]=0xff, efuseExtHdr=0xff\n", eFuse_Addr-1); -+ break; -+ } -+ } else { -+ offset = ((efuseHeader >> 4) & 0x0f); -+ wden = (efuseHeader & 0x0f); -+ } -+ -+ _rtw_memset(efuseData, '\0', EFUSE_MAX_WORD_UNIT * 2); -+ dataCnt = 0; -+ -+ if (offset < max_section) { -+ for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { -+ /* Check word enable condition in the section */ -+ if (!(wden & (0x01<> 8; -+ ParseEfuseHeader = (efuseHeader2Byte & 0xff); -+ ParseOffset2_0 = GET_HDR_OFFSET_2_0(ParseEfuseHeader); -+ ParseOffset = ((ParseEfuseExtHdr & 0xF0) >> 1) | ParseOffset2_0; -+ ParseWDEN = (ParseEfuseExtHdr & 0x0F); -+ RTW_INFO("Header=0x%x, ExtHeader=0x%x, ", ParseEfuseHeader, ParseEfuseExtHdr); -+ } else { -+ ParseEfuseHeader = efuseHeader; -+ ParseOffset = ((ParseEfuseHeader >> 4) & 0x0f); -+ ParseWDEN = (ParseEfuseHeader & 0x0f); -+ RTW_INFO("Header=0x%x, ", ParseEfuseHeader); -+ } -+ RTW_INFO("offset=0x%x(%d), word enable=0x%x\n", ParseOffset, ParseOffset, ParseWDEN); -+ -+ wd_cnt = 0; -+ for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { -+ if (!(wden & (0x01 << i))) { -+ RTW_INFO("Map[ %02X ] = %02X %02X\n", ((offset * EFUSE_MAX_WORD_UNIT * 2) + (i * 2)), efuseData[wd_cnt * 2 + 0], efuseData[wd_cnt * 2 + 1]); -+ wd_cnt++; -+ } -+ } -+ -+ pgSectionCnt++; -+ bExtHeader = FALSE; -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); -+ if (efuseHeader == 0xFF) { -+ if ((eFuse_Addr + protectBytesBank) >= efuse_max) -+ bCheckNextBank = TRUE; -+ else -+ bCheckNextBank = FALSE; -+ } -+ } -+ if (!bCheckNextBank) { -+ RTW_INFO("Not need to check next bank, eFuse_Addr=%d, protectBytesBank=%d, efuse_max=%d\n", -+ eFuse_Addr, protectBytesBank, efuse_max); -+ break; -+ } -+ } -+ /* switch bank back to 0 for BT/wifi later use*/ -+ hal_EfuseSwitchToBank(padapter, 0, bPseudoTest); -+ -+ /* 3. Collect 16 sections and 4 word unit into Efuse map.*/ -+ for (i = 0; i < max_section; i++) { -+ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) { -+ pEfuseHal->fakeEfuseInitMap[(i*8)+(j*2)] = (eFuseWord[(i*8)+(j*2)]); -+ pEfuseHal->fakeEfuseInitMap[(i*8)+((j*2)+1)] = (eFuseWord[(i*8)+((j*2)+1)]); -+ } -+ } -+ -+ RTW_INFO("\n\tEFUSE Analyze Map\n"); -+ i = 0; -+ j = 0; -+ -+ for (i = 0; i < mapLen; i++) { -+ if (i % 16 == 0) -+ RTW_PRINT_SEL(RTW_DBGDUMP, "0x%03x: ", i); -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "%02X%s" -+ , pEfuseHal->fakeEfuseInitMap[i] -+ , ((i + 1) % 16 == 0) ? "\n" : (((i + 1) % 8 == 0) ? " " : " ") -+ ); -+ } -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "\n"); -+ -+out_free_buffer: -+ if (eFuseWord) -+ rtw_mfree((u8 *)eFuseWord, EFUSE_MAX_SECTION_NUM * (EFUSE_MAX_WORD_UNIT * 2)); -+} -+ -+void efuse_PreUpdateAction( -+ PADAPTER pAdapter, -+ u32 *BackupRegs) -+{ -+ if (IS_HARDWARE_TYPE_8812AU(pAdapter) || IS_HARDWARE_TYPE_8822BU(pAdapter)) { -+ /* <20131115, Kordan> Turn off Rx to prevent from being busy when writing the EFUSE. (Asked by Chunchu.)*/ -+ BackupRegs[0] = phy_query_mac_reg(pAdapter, REG_RCR, bMaskDWord); -+ BackupRegs[1] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord); -+ BackupRegs[2] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord); -+#ifdef CONFIG_RTL8812A -+ BackupRegs[3] = phy_query_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord); -+#endif -+ PlatformEFIOWrite4Byte(pAdapter, REG_RCR, 0x1); -+ PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0, 0); -+ PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+1, 0); -+ PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+2, 0); -+ PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+3, 0); -+ PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+4, 0); -+ PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+5, 0); -+#ifdef CONFIG_RTL8812A -+ /* <20140410, Kordan> 0x11 = 0x4E, lower down LX_SPS0 voltage. (Asked by Chunchu)*/ -+ phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskByte1, 0x4E); -+#endif -+ RTW_INFO(" %s , done\n", __func__); -+ -+ } -+} -+ -+ -+void efuse_PostUpdateAction( -+ PADAPTER pAdapter, -+ u32 *BackupRegs) -+{ -+ if (IS_HARDWARE_TYPE_8812AU(pAdapter) || IS_HARDWARE_TYPE_8822BU(pAdapter)) { -+ /* <20131115, Kordan> Turn on Rx and restore the registers. (Asked by Chunchu.)*/ -+ phy_set_mac_reg(pAdapter, REG_RCR, bMaskDWord, BackupRegs[0]); -+ phy_set_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord, BackupRegs[1]); -+ phy_set_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord, BackupRegs[2]); -+#ifdef CONFIG_RTL8812A -+ phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord, BackupRegs[3]); -+#endif -+ RTW_INFO(" %s , done\n", __func__); -+ } -+} -+ -+ -+#ifdef RTW_HALMAC -+#include "../../hal/hal_halmac.h" -+ -+void Efuse_PowerSwitch(PADAPTER adapter, u8 write, u8 pwrstate) -+{ -+} -+ -+void BTEfuse_PowerSwitch(PADAPTER adapter, u8 write, u8 pwrstate) -+{ -+} -+ -+u8 efuse_GetCurrentSize(PADAPTER adapter, u16 *size) -+{ -+ *size = 0; -+ -+ return _FAIL; -+} -+ -+u16 efuse_GetMaxSize(PADAPTER adapter) -+{ -+ struct dvobj_priv *d; -+ u32 size = 0; -+ int err; -+ -+ d = adapter_to_dvobj(adapter); -+ err = rtw_halmac_get_physical_efuse_size(d, &size); -+ if (err) -+ return 0; -+ -+ return size; -+} -+ -+u16 efuse_GetavailableSize(PADAPTER adapter) -+{ -+ struct dvobj_priv *d; -+ u32 size = 0; -+ int err; -+ -+ d = adapter_to_dvobj(adapter); -+ err = rtw_halmac_get_available_efuse_size(d, &size); -+ if (err) -+ return 0; -+ -+ return size; -+} -+ -+ -+u8 efuse_bt_GetCurrentSize(PADAPTER adapter, u16 *usesize) -+{ -+ u8 *efuse_map; -+ -+ *usesize = 0; -+ efuse_map = rtw_malloc(EFUSE_BT_MAP_LEN); -+ if (efuse_map == NULL) { -+ RTW_DBG("%s: malloc FAIL\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+ /* for get bt phy efuse last use byte */ -+ hal_ReadEFuse_BT_logic_map(adapter, 0x00, EFUSE_BT_MAP_LEN, efuse_map); -+ *usesize = fakeBTEfuseUsedBytes; -+ -+ if (efuse_map) -+ rtw_mfree(efuse_map, EFUSE_BT_MAP_LEN); -+ -+ return _SUCCESS; -+} -+ -+u16 efuse_bt_GetMaxSize(PADAPTER adapter) -+{ -+ return EFUSE_BT_REAL_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK; -+} -+ -+void EFUSE_GetEfuseDefinition(PADAPTER adapter, u8 efusetype, u8 type, void *out, BOOLEAN test) -+{ -+ struct dvobj_priv *d; -+ u32 v32 = 0; -+ -+ -+ d = adapter_to_dvobj(adapter); -+ -+ if (adapter->hal_func.EFUSEGetEfuseDefinition) { -+ adapter->hal_func.EFUSEGetEfuseDefinition(adapter, efusetype, type, out, test); -+ return; -+ } -+ -+ if (EFUSE_WIFI == efusetype) { -+ switch (type) { -+ case TYPE_EFUSE_MAP_LEN: -+ rtw_halmac_get_logical_efuse_size(d, &v32); -+ *(u16 *)out = (u16)v32; -+ return; -+ -+ case TYPE_EFUSE_REAL_CONTENT_LEN: -+ rtw_halmac_get_physical_efuse_size(d, &v32); -+ *(u16 *)out = (u16)v32; -+ return; -+ } -+ } else if (EFUSE_BT == efusetype) { -+ switch (type) { -+ case TYPE_EFUSE_MAP_LEN: -+ *(u16 *)out = EFUSE_BT_MAP_LEN; -+ return; -+ -+ case TYPE_EFUSE_REAL_CONTENT_LEN: -+ *(u16 *)out = EFUSE_BT_REAL_CONTENT_LEN; -+ return; -+ } -+ } -+} -+ -+/* -+ * read/write raw efuse data -+ */ -+u8 rtw_efuse_access(PADAPTER adapter, u8 write, u16 addr, u16 cnts, u8 *data) -+{ -+ struct dvobj_priv *d; -+ u8 *efuse = NULL; -+ u32 size; -+ int err; -+ -+ -+ d = adapter_to_dvobj(adapter); -+ err = rtw_halmac_get_physical_efuse_size(d, &size); -+ if (err){ -+ size = EFUSE_MAX_SIZE; -+ RTW_INFO(" physical_efuse_size err size %d\n", size); -+ } -+ -+ if ((addr + cnts) > size) -+ return _FAIL; -+ -+ if (_TRUE == write) { -+ err = rtw_halmac_write_physical_efuse(d, addr, cnts, data); -+ if (err) -+ return _FAIL; -+ } else { -+ if (cnts > 16) -+ efuse = rtw_zmalloc(size); -+ -+ if (efuse) { -+ err = rtw_halmac_read_physical_efuse_map(d, efuse, size); -+ if (err) { -+ rtw_mfree(efuse, size); -+ return _FAIL; -+ } -+ -+ _rtw_memcpy(data, efuse + addr, cnts); -+ rtw_mfree(efuse, size); -+ } else { -+ err = rtw_halmac_read_physical_efuse(d, addr, cnts, data); -+ if (err) -+ return _FAIL; -+ } -+ } -+ -+ return _SUCCESS; -+} -+ -+static inline void dump_buf(u8 *buf, u32 len) -+{ -+ u32 i; -+ -+ RTW_INFO("-----------------Len %d----------------\n", len); -+ for (i = 0; i < len; i++) -+ printk("%2.2x-", *(buf + i)); -+ printk("\n"); -+} -+ -+/* -+ * read/write raw efuse data -+ */ -+u8 rtw_efuse_bt_access(PADAPTER adapter, u8 write, u16 addr, u16 cnts, u8 *data) -+{ -+ struct dvobj_priv *d; -+ u8 *efuse = NULL; -+ u32 size; -+ int err = _FAIL; -+ -+ -+ d = adapter_to_dvobj(adapter); -+ -+ size = EFUSE_BT_REAL_CONTENT_LEN; -+ -+ if ((addr + cnts) > size) -+ return _FAIL; -+ -+ if (_TRUE == write) { -+ err = rtw_halmac_write_bt_physical_efuse(d, addr, cnts, data); -+ if (err == -1) { -+ RTW_ERR("%s: rtw_halmac_write_bt_physical_efuse fail!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ RTW_INFO("%s: rtw_halmac_write_bt_physical_efuse OK! data 0x%x\n", __FUNCTION__, *data); -+ } else { -+ efuse = rtw_zmalloc(size); -+ -+ if (efuse) { -+ err = rtw_halmac_read_bt_physical_efuse_map(d, efuse, size); -+ -+ if (err == -1) { -+ RTW_ERR("%s: rtw_halmac_read_bt_physical_efuse_map fail!\n", __FUNCTION__); -+ rtw_mfree(efuse, size); -+ return _FAIL; -+ } -+ dump_buf(efuse + addr, cnts); -+ -+ _rtw_memcpy(data, efuse + addr, cnts); -+ -+ RTW_INFO("%s: rtw_halmac_read_bt_physical_efuse_map ok! data 0x%x\n", __FUNCTION__, *data); -+ rtw_mfree(efuse, size); -+ } -+ } -+ -+ return _SUCCESS; -+} -+ -+u8 rtw_efuse_map_read(PADAPTER adapter, u16 addr, u16 cnts, u8 *data) -+{ -+ struct dvobj_priv *d; -+ u8 *efuse = NULL; -+ u32 size, i; -+ int err; -+ u32 backupRegs[4] = {0}; -+ u8 status = _SUCCESS; -+ -+ efuse_PreUpdateAction(adapter, backupRegs); -+ -+ d = adapter_to_dvobj(adapter); -+ err = rtw_halmac_get_logical_efuse_size(d, &size); -+ if (err) { -+ status = _FAIL; -+ RTW_DBG("halmac_get_logical_efuse_size fail\n"); -+ goto exit; -+ } -+ /* size error handle */ -+ if ((addr + cnts) > size) { -+ if (addr < size) -+ cnts = size - addr; -+ else { -+ status = _FAIL; -+ RTW_DBG(" %s() ,addr + cnts) > size fail\n", __func__); -+ goto exit; -+ } -+ } -+ -+ if (cnts > 16) -+ efuse = rtw_zmalloc(size); -+ -+ if (efuse) { -+ err = rtw_halmac_read_logical_efuse_map(d, efuse, size, NULL, 0); -+ if (err) { -+ rtw_mfree(efuse, size); -+ status = _FAIL; -+ RTW_DBG(" %s() ,halmac_read_logical_efus map fail\n", __func__); -+ goto exit; -+ } -+ -+ _rtw_memcpy(data, efuse + addr, cnts); -+ rtw_mfree(efuse, size); -+ } else { -+ err = rtw_halmac_read_logical_efuse(d, addr, cnts, data); -+ if (err) { -+ status = _FAIL; -+ RTW_DBG(" %s() ,halmac_read_logical_efus data fail\n", __func__); -+ goto exit; -+ } -+ } -+ status = _SUCCESS; -+exit: -+ efuse_PostUpdateAction(adapter, backupRegs); -+ -+ return status; -+} -+ -+ -+u8 rtw_efuse_map_write(PADAPTER adapter, u16 addr, u16 cnts, u8 *data) -+{ -+ struct dvobj_priv *d; -+ u8 *efuse = NULL; -+ u32 size; -+ int err; -+ u8 mask_buf[64] = ""; -+ u16 mask_len = sizeof(u8) * rtw_get_efuse_mask_arraylen(adapter); -+ u32 backupRegs[4] = {0}; -+ u8 status = _SUCCESS;; -+ -+ efuse_PreUpdateAction(adapter, backupRegs); -+ -+ d = adapter_to_dvobj(adapter); -+ err = rtw_halmac_get_logical_efuse_size(d, &size); -+ if (err) { -+ status = _FAIL; -+ goto exit; -+ } -+ -+ if ((addr + cnts) > size) { -+ status = _FAIL; -+ goto exit; -+ } -+ -+ efuse = rtw_zmalloc(size); -+ if (!efuse) { -+ status = _FAIL; -+ goto exit; -+ } -+ -+ err = rtw_halmac_read_logical_efuse_map(d, efuse, size, NULL, 0); -+ if (err) { -+ rtw_mfree(efuse, size); -+ status = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memcpy(efuse + addr, data, cnts); -+ -+ if (adapter->registrypriv.boffefusemask == 0) { -+ RTW_INFO("Use mask Array Len: %d\n", mask_len); -+ -+ if (mask_len != 0) { -+ if (adapter->registrypriv.bFileMaskEfuse == _TRUE) -+ _rtw_memcpy(mask_buf, maskfileBuffer, mask_len); -+ else -+ rtw_efuse_mask_array(adapter, mask_buf); -+ -+ err = rtw_halmac_write_logical_efuse_map(d, efuse, size, mask_buf, mask_len); -+ } else -+ err = rtw_halmac_write_logical_efuse_map(d, efuse, size, NULL, 0); -+ } else { -+ _rtw_memset(mask_buf, 0xFF, sizeof(mask_buf)); -+ RTW_INFO("Efuse mask off\n"); -+ err = rtw_halmac_write_logical_efuse_map(d, efuse, size, mask_buf, size/16); -+ } -+ -+ if (err) { -+ rtw_mfree(efuse, size); -+ status = _FAIL; -+ goto exit; -+ } -+ -+ rtw_mfree(efuse, size); -+ status = _SUCCESS; -+exit : -+ efuse_PostUpdateAction(adapter, backupRegs); -+ -+ return status; -+} -+ -+int Efuse_PgPacketRead(PADAPTER adapter, u8 offset, u8 *data, BOOLEAN test) -+{ -+ return _FALSE; -+} -+ -+int Efuse_PgPacketWrite(PADAPTER adapter, u8 offset, u8 word_en, u8 *data, BOOLEAN test) -+{ -+ return _FALSE; -+} -+ -+static void rtw_bt_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) -+{ -+ u16 i = 0; -+ -+#ifdef CONFIG_BT_EFUSE_MASK -+ if (padapter->registrypriv.boffefusemask == 0) { -+ for (i = 0; i < cnts; i++) { -+ if (padapter->registrypriv.bBTFileMaskEfuse == _TRUE) { -+ if (rtw_file_efuse_IsMasked(padapter, addr + i, btmaskfileBuffer)) /*use BT file efuse mask.*/ -+ data[i] = 0xff; -+ else -+ RTW_INFO("data[%x] = %x\n", i, data[i]); -+ } else { -+ if (efuse_IsBT_Masked(padapter, addr + i)) /*use drv internal efuse mask.*/ -+ data[i] = 0xff; -+ else -+ RTW_INFO("data[%x] = %x\n", i, data[i]); -+ } -+ } -+ } -+#endif /*CONFIG_BT_EFUSE_MASK*/ -+} -+ -+u8 rtw_BT_efuse_map_read(PADAPTER adapter, u16 addr, u16 cnts, u8 *data) -+{ -+ hal_ReadEFuse_BT_logic_map(adapter, addr, cnts, data); -+ -+ rtw_bt_mask_map_read(adapter, addr, cnts, data); -+ -+ return _SUCCESS; -+} -+ -+ -+static u16 -+hal_EfuseGetCurrentSize_BT( -+ PADAPTER padapter, -+ u8 bPseudoTest) -+{ -+#ifdef HAL_EFUSE_MEMORY -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; -+#endif -+ u16 btusedbytes; -+ u16 efuse_addr; -+ u8 bank, startBank; -+ u8 hoffset = 0, hworden = 0; -+ u8 efuse_data, word_cnts = 0; -+ u16 retU2 = 0; -+ -+ -+ btusedbytes = fakeBTEfuseUsedBytes; -+ -+ efuse_addr = (u16)((btusedbytes % EFUSE_BT_REAL_BANK_CONTENT_LEN)); -+ startBank = (u8)(1 + (btusedbytes / EFUSE_BT_REAL_BANK_CONTENT_LEN)); -+ -+ RTW_INFO("%s: start from bank=%d addr=0x%X\n", __FUNCTION__, startBank, efuse_addr); -+ retU2 = EFUSE_BT_REAL_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK; -+ -+ for (bank = startBank; bank < 3; bank++) { -+ if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == _FALSE) { -+ RTW_ERR("%s: switch bank(%d) Fail!!\n", __FUNCTION__, bank); -+ /* bank = EFUSE_MAX_BANK; */ -+ break; -+ } -+ -+ /* only when bank is switched we have to reset the efuse_addr. */ -+ if (bank != startBank) -+ efuse_addr = 0; -+ -+ -+ while (AVAILABLE_EFUSE_ADDR(efuse_addr)) { -+ if (rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &efuse_data) == _FALSE) { -+ RTW_ERR("%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr); -+ /* bank = EFUSE_MAX_BANK; */ -+ break; -+ } -+ RTW_INFO("%s: efuse_OneByteRead ! addr=0x%X !efuse_data=0x%X! bank =%d\n", __FUNCTION__, efuse_addr, efuse_data, bank); -+ -+ if (efuse_data == 0xFF) -+ break; -+ -+ if (EXT_HEADER(efuse_data)) { -+ hoffset = GET_HDR_OFFSET_2_0(efuse_data); -+ efuse_addr++; -+ rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &efuse_data); -+ RTW_INFO("%s: efuse_OneByteRead EXT_HEADER ! addr=0x%X !efuse_data=0x%X! bank =%d\n", __FUNCTION__, efuse_addr, efuse_data, bank); -+ -+ if (ALL_WORDS_DISABLED(efuse_data)) { -+ efuse_addr++; -+ continue; -+ } -+ -+ /* hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); */ -+ hoffset |= ((efuse_data & 0xF0) >> 1); -+ hworden = efuse_data & 0x0F; -+ } else { -+ hoffset = (efuse_data >> 4) & 0x0F; -+ hworden = efuse_data & 0x0F; -+ } -+ -+ RTW_INFO(FUNC_ADPT_FMT": Offset=%d Worden=%#X\n", -+ FUNC_ADPT_ARG(padapter), hoffset, hworden); -+ -+ word_cnts = Efuse_CalculateWordCnts(hworden); -+ /* read next header */ -+ efuse_addr += (word_cnts * 2) + 1; -+ } -+ /* Check if we need to check next bank efuse */ -+ if (efuse_addr < retU2) -+ break;/* don't need to check next bank. */ -+ } -+ retU2 = ((bank - 1) * EFUSE_BT_REAL_BANK_CONTENT_LEN) + efuse_addr; -+ -+ fakeBTEfuseUsedBytes = retU2; -+ RTW_INFO("%s: CurrentSize=%d\n", __FUNCTION__, retU2); -+ return retU2; -+} -+ -+#ifdef CONFIG_RTL8822C -+void rtw_pre_bt_efuse(PADAPTER padapter) -+{ -+ char pgdata[4] = {0x72, 0x80, 0x14, 0x90}; /*BT 5M PLL*/ -+ u8 status = 1; -+ u8 bkmask; -+ BOOLEAN bt_en; -+ -+ bkmask = padapter->registrypriv.boffefusemask; -+ padapter->registrypriv.boffefusemask = 1; -+ -+ bt_en = rtw_read8(padapter, 0x6A) & BIT2 ? _TRUE : _FALSE; -+ if (IS_HARDWARE_TYPE_8822C(padapter) && bt_en == _TRUE) { -+ status = rtw_BT_efuse_map_write(padapter, 0x1f8, 4, pgdata); -+ RTW_INFO("%s done!!!\n", __FUNCTION__); -+ } -+ if (status == _FAIL) -+ RTW_INFO("%s: fail\n", __FUNCTION__); -+ padapter->registrypriv.boffefusemask = bkmask; -+} -+#endif -+ -+u8 rtw_BT_efuse_map_write(PADAPTER adapter, u16 addr, u16 cnts, u8 *data) -+{ -+#define RT_ASSERT_RET(expr) \ -+ if (!(expr)) { \ -+ printk("Assertion failed! %s at ......\n", #expr); \ -+ printk(" ......%s,%s, line=%d\n",__FILE__, __FUNCTION__, __LINE__); \ -+ return _FAIL; \ -+ } -+ -+ u8 offset, word_en; -+ u8 *efuse = NULL; -+ u8 *map; -+ u8 newdata[PGPKT_DATA_SIZE]; -+ s32 i = 0, j = 0, idx = 0, chk_total_byte = 0; -+ u8 ret = _SUCCESS; -+ u16 mapLen = 1024; -+ u16 startAddr = 0; -+ -+ if ((addr + cnts) > mapLen) -+ return _FAIL; -+ -+ RT_ASSERT_RET(PGPKT_DATA_SIZE == 8); /* have to be 8 byte alignment */ -+ RT_ASSERT_RET((mapLen & 0x7) == 0); /* have to be PGPKT_DATA_SIZE alignment for memcpy */ -+ -+ efuse = rtw_zmalloc(mapLen); -+ if (!efuse) -+ return _FAIL; -+ -+ map = rtw_zmalloc(mapLen); -+ if (map == NULL) { -+ rtw_mfree(efuse, mapLen); -+ return _FAIL; -+ } -+ -+ _rtw_memset(map, 0xFF, mapLen); -+ -+ ret = rtw_BT_efuse_map_read(adapter, 0, mapLen, map); -+ if (ret == _FAIL) -+ goto exit; -+ -+ _rtw_memcpy(efuse , map, mapLen); -+ _rtw_memcpy(efuse + addr, data, cnts); -+#ifdef CONFIG_BT_EFUSE_MASK -+ if (adapter->registrypriv.boffefusemask == 0) { -+ for (i = 0; i < cnts; i++) { -+ if (adapter->registrypriv.bBTFileMaskEfuse == _TRUE) { -+ if (rtw_file_efuse_IsMasked(adapter, addr + i, btmaskfileBuffer)) /*use file efuse mask. */ -+ efuse[addr + i] = map[addr + i]; -+ } else { -+ if (efuse_IsBT_Masked(adapter, addr + i)) -+ efuse[addr + i] = map[addr + i]; -+ } -+ RTW_INFO("%s , efuse[%x] = %x, map = %x\n", __func__, addr + i, efuse[ addr + i], map[addr + i]); -+ } -+ } -+#endif /*CONFIG_BT_EFUSE_MASK*/ -+ /* precheck pg efuse data byte*/ -+ chk_total_byte = 0; -+ idx = 0; -+ offset = (addr >> 3); -+ -+ while (idx < cnts) { -+ word_en = 0xF; -+ j = (addr + idx) & 0x7; -+ for (i = j; i < PGPKT_DATA_SIZE && idx < cnts; i++, idx++) { -+ if (efuse[addr + idx] != map[addr + idx]) -+ word_en &= ~BIT(i >> 1); -+ } -+ -+ if (word_en != 0xF) { -+ chk_total_byte += Efuse_CalculateWordCnts(word_en) * 2; -+ -+ if (offset >= EFUSE_MAX_SECTION_BASE) /* Over EFUSE_MAX_SECTION 16 for 2 ByteHeader */ -+ chk_total_byte += 2; -+ else -+ chk_total_byte += 1; -+ } -+ -+ offset++; -+ } -+ -+ RTW_INFO("Total PG bytes Count = %d\n", chk_total_byte); -+ startAddr = hal_EfuseGetCurrentSize_BT(adapter, _FALSE); -+ RTW_INFO("%s: startAddr=%#X\n", __func__, startAddr); -+ -+ if (!AVAILABLE_EFUSE_ADDR(startAddr + chk_total_byte)) { -+ RTW_INFO("%s: startAddr(0x%X) + PG data len %d >= efuse BT available offset (0x%X)\n", -+ __func__, startAddr, chk_total_byte, EFUSE_BT_REAL_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ idx = 0; -+ offset = (addr >> 3); -+ while (idx < cnts) { -+ word_en = 0xF; -+ j = (addr + idx) & 0x7; -+ _rtw_memcpy(newdata, &map[offset << 3], PGPKT_DATA_SIZE); -+ for (i = j; i < PGPKT_DATA_SIZE && idx < cnts; i++, idx++) { -+ if (efuse[addr + idx] != map[addr + idx]) { -+ word_en &= ~BIT(i >> 1); -+ newdata[i] = efuse[addr + idx]; -+ } -+ } -+ -+ if (word_en != 0xF) { -+ ret = EfusePgPacketWrite_BT(adapter, offset, word_en, newdata, _FALSE); -+ RTW_INFO("offset=%x\n", offset); -+ RTW_INFO("word_en=%x\n", word_en); -+ RTW_INFO("%s: data=", __FUNCTION__); -+ for (i = 0; i < PGPKT_DATA_SIZE; i++) -+ RTW_INFO("0x%02X ", newdata[i]); -+ RTW_INFO("\n"); -+ if (ret == _FAIL) -+ break; -+ } -+ offset++; -+ } -+exit: -+ if (efuse) -+ rtw_mfree(efuse, mapLen); -+ if (map) -+ rtw_mfree(map, mapLen); -+ return ret; -+} -+ -+void hal_ReadEFuse_BT_logic_map( -+ PADAPTER padapter, -+ u16 _offset, -+ u16 _size_byte, -+ u8 *pbuf -+) -+{ -+ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ u8 *efuseTbl, *phyefuse; -+ u8 bank; -+ u16 eFuse_Addr = 0; -+ u8 efuseHeader, efuseExtHdr, efuseData; -+ u8 offset, wden; -+ u16 i, total, used; -+ u8 efuse_usage; -+ -+ -+ /* */ -+ /* Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */ -+ /* */ -+ if ((_offset + _size_byte) > EFUSE_BT_MAP_LEN) { -+ RTW_INFO("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte); -+ return; -+ } -+ -+ efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN); -+ phyefuse = rtw_malloc(EFUSE_BT_REAL_CONTENT_LEN); -+ if (efuseTbl == NULL || phyefuse == NULL) { -+ RTW_INFO("%s: efuseTbl or phyefuse malloc fail!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ /* 0xff will be efuse default value instead of 0x00. */ -+ _rtw_memset(efuseTbl, 0xFF, EFUSE_BT_MAP_LEN); -+ _rtw_memset(phyefuse, 0xFF, EFUSE_BT_REAL_CONTENT_LEN); -+ -+ if (rtw_efuse_bt_access(padapter, _FALSE, 0, EFUSE_BT_REAL_CONTENT_LEN, phyefuse)) -+ dump_buf(phyefuse, EFUSE_BT_REAL_BANK_CONTENT_LEN); -+ -+ total = BANK_NUM; -+ for (bank = 1; bank <= total; bank++) { /* 8723d Max bake 0~2 */ -+ eFuse_Addr = 0; -+ -+ while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) { -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); */ -+ efuseHeader = phyefuse[eFuse_Addr++]; -+ -+ if (efuseHeader == 0xFF) -+ break; -+ RTW_INFO("%s: efuse[%#X]=0x%02x (header)\n", __FUNCTION__, (((bank - 1) * EFUSE_BT_REAL_CONTENT_LEN) + eFuse_Addr - 1), efuseHeader); -+ -+ /* Check PG header for section num. */ -+ if (EXT_HEADER(efuseHeader)) { /* extended header */ -+ offset = GET_HDR_OFFSET_2_0(efuseHeader); -+ RTW_INFO("%s: extended header offset_2_0=0x%X\n", __FUNCTION__, offset); -+ -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); */ -+ efuseExtHdr = phyefuse[eFuse_Addr++]; -+ -+ RTW_INFO("%s: efuse[%#X]=0x%02x (ext header)\n", __FUNCTION__, (((bank - 1) * EFUSE_BT_REAL_CONTENT_LEN) + eFuse_Addr - 1), efuseExtHdr); -+ if (ALL_WORDS_DISABLED(efuseExtHdr)) -+ continue; -+ -+ offset |= ((efuseExtHdr & 0xF0) >> 1); -+ wden = (efuseExtHdr & 0x0F); -+ } else { -+ offset = ((efuseHeader >> 4) & 0x0f); -+ wden = (efuseHeader & 0x0f); -+ } -+ -+ if (offset < EFUSE_BT_MAX_SECTION) { -+ u16 addr; -+ -+ /* Get word enable value from PG header */ -+ RTW_INFO("%s: Offset=%d Worden=%#X\n", __FUNCTION__, offset, wden); -+ -+ addr = offset * PGPKT_DATA_SIZE; -+ for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { -+ /* Check word enable condition in the section */ -+ if (!(wden & (0x01 << i))) { -+ efuseData = 0; -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); */ -+ efuseData = phyefuse[eFuse_Addr++]; -+ -+ RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr - 1, efuseData); -+ efuseTbl[addr] = efuseData; -+ -+ efuseData = 0; -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); */ -+ efuseData = phyefuse[eFuse_Addr++]; -+ -+ RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr - 1, efuseData); -+ efuseTbl[addr + 1] = efuseData; -+ } -+ addr += 2; -+ } -+ } else { -+ RTW_INFO("%s: offset(%d) is illegal!!\n", __FUNCTION__, offset); -+ eFuse_Addr += Efuse_CalculateWordCnts(wden) * 2; -+ } -+ } -+ -+ if ((eFuse_Addr - 1) < total) { -+ RTW_INFO("%s: bank(%d) data end at %#x\n", __FUNCTION__, bank, eFuse_Addr - 1); -+ break; -+ } -+ } -+ -+ /* switch bank back to bank 0 for later BT and wifi use. */ -+ //hal_EfuseSwitchToBank(padapter, 0, bPseudoTest); -+ -+ /* Copy from Efuse map to output pointer memory!!! */ -+ for (i = 0; i < _size_byte; i++) -+ pbuf[i] = efuseTbl[_offset + i]; -+ /* Calculate Efuse utilization */ -+ total = EFUSE_BT_REAL_BANK_CONTENT_LEN; -+ -+ used = eFuse_Addr - 1; -+ -+ if (total) -+ efuse_usage = (u8)((used * 100) / total); -+ else -+ efuse_usage = 100; -+ -+ fakeBTEfuseUsedBytes = used; -+ RTW_INFO("%s: BTEfuseUsed last Bytes = %#x\n", __FUNCTION__, fakeBTEfuseUsedBytes); -+ -+exit: -+ if (efuseTbl) -+ rtw_mfree(efuseTbl, EFUSE_BT_MAP_LEN); -+ if (phyefuse) -+ rtw_mfree(phyefuse, EFUSE_BT_REAL_BANK_CONTENT_LEN); -+} -+ -+ -+static u8 hal_EfusePartialWriteCheck( -+ PADAPTER padapter, -+ u8 efuseType, -+ u16 *pAddr, -+ PPGPKT_STRUCT pTargetPkt, -+ u8 bPseudoTest) -+{ -+ u8 bRet = _FALSE; -+ u16 startAddr = 0, efuse_max_available_len = EFUSE_BT_REAL_BANK_CONTENT_LEN, efuse_max = EFUSE_BT_REAL_BANK_CONTENT_LEN; -+ u8 efuse_data = 0; -+ -+ startAddr = (u16)fakeBTEfuseUsedBytes; -+ -+ startAddr %= efuse_max; -+ RTW_INFO("%s: startAddr=%#X\n", __FUNCTION__, startAddr); -+ -+ while (1) { -+ if (startAddr >= efuse_max_available_len) { -+ bRet = _FALSE; -+ RTW_INFO("%s: startAddr(%d) >= efuse_max_available_len(%d)\n", -+ __FUNCTION__, startAddr, efuse_max_available_len); -+ break; -+ } -+ if (rtw_efuse_bt_access(padapter, _FALSE, startAddr, 1, &efuse_data)&& (efuse_data != 0xFF)) { -+ bRet = _FALSE; -+ RTW_INFO("%s: Something Wrong! last bytes(%#X=0x%02X) is not 0xFF\n", -+ __FUNCTION__, startAddr, efuse_data); -+ break; -+ } else { -+ /* not used header, 0xff */ -+ *pAddr = startAddr; -+ /* RTW_INFO("%s: Started from unused header offset=%d\n", __FUNCTION__, startAddr)); */ -+ bRet = _TRUE; -+ break; -+ } -+ } -+ -+ return bRet; -+} -+ -+ -+static u8 hal_EfusePgPacketWrite2ByteHeader( -+ PADAPTER padapter, -+ u8 efuseType, -+ u16 *pAddr, -+ PPGPKT_STRUCT pTargetPkt, -+ u8 bPseudoTest) -+{ -+ u16 efuse_addr, efuse_max_available_len = EFUSE_BT_REAL_BANK_CONTENT_LEN; -+ u8 pg_header = 0, tmp_header = 0; -+ u8 repeatcnt = 0; -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ efuse_addr = *pAddr; -+ if (efuse_addr >= efuse_max_available_len) { -+ RTW_INFO("%s: addr(%d) over avaliable(%d)!!\n", __FUNCTION__, efuse_addr, efuse_max_available_len); -+ return _FALSE; -+ } -+ -+ pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; -+ /* RTW_INFO("%s: pg_header=0x%x\n", __FUNCTION__, pg_header); */ -+ -+ do { -+ -+ rtw_efuse_bt_access(padapter, _TRUE, efuse_addr, 1, &pg_header); -+ rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &tmp_header); -+ -+ if (tmp_header != 0xFF) -+ break; -+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { -+ RTW_INFO("%s: Repeat over limit for pg_header!!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ } while (1); -+ -+ if (tmp_header != pg_header) { -+ RTW_ERR("%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header); -+ return _FALSE; -+ } -+ -+ /* to write ext_header */ -+ efuse_addr++; -+ pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; -+ -+ do { -+ rtw_efuse_bt_access(padapter, _TRUE, efuse_addr, 1, &pg_header); -+ rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &tmp_header); -+ -+ if (tmp_header != 0xFF) -+ break; -+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { -+ RTW_INFO("%s: Repeat over limit for ext_header!!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ } while (1); -+ -+ if (tmp_header != pg_header) { /* offset PG fail */ -+ RTW_ERR("%s: PG EXT Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header); -+ return _FALSE; -+ } -+ -+ *pAddr = efuse_addr; -+ -+ return _TRUE; -+} -+ -+ -+static u8 hal_EfusePgPacketWrite1ByteHeader( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ u16 *pAddr, -+ PPGPKT_STRUCT pTargetPkt, -+ u8 bPseudoTest) -+{ -+ u8 pg_header = 0, tmp_header = 0; -+ u16 efuse_addr = *pAddr; -+ u8 repeatcnt = 0; -+ -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en; -+ -+ do { -+ rtw_efuse_bt_access(pAdapter, _TRUE, efuse_addr, 1, &pg_header); -+ rtw_efuse_bt_access(pAdapter, _FALSE, efuse_addr, 1, &tmp_header); -+ -+ if (tmp_header != 0xFF) -+ break; -+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { -+ RTW_INFO("%s: Repeat over limit for pg_header!!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ } while (1); -+ -+ if (tmp_header != pg_header) { -+ RTW_ERR("%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header); -+ return _FALSE; -+ } -+ -+ *pAddr = efuse_addr; -+ -+ return _TRUE; -+} -+ -+static u8 hal_EfusePgPacketWriteHeader( -+ PADAPTER padapter, -+ u8 efuseType, -+ u16 *pAddr, -+ PPGPKT_STRUCT pTargetPkt, -+ u8 bPseudoTest) -+{ -+ u8 bRet = _FALSE; -+ -+ if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) -+ bRet = hal_EfusePgPacketWrite2ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest); -+ else -+ bRet = hal_EfusePgPacketWrite1ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest); -+ -+ return bRet; -+} -+ -+ -+static u8 -+Hal_EfuseWordEnableDataWrite( -+ PADAPTER padapter, -+ u16 efuse_addr, -+ u8 word_en, -+ u8 *data, -+ u8 bPseudoTest) -+{ -+ u16 tmpaddr = 0; -+ u16 start_addr = efuse_addr; -+ u8 badworden = 0x0F; -+ u8 tmpdata[PGPKT_DATA_SIZE]; -+ -+ -+ /* RTW_INFO("%s: efuse_addr=%#x word_en=%#x\n", __FUNCTION__, efuse_addr, word_en); */ -+ _rtw_memset(tmpdata, 0xFF, PGPKT_DATA_SIZE); -+ -+ if (!(word_en & BIT(0))) { -+ tmpaddr = start_addr; -+ rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[0]); -+ rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[1]); -+ rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[0]); -+ rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[1]); -+ if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1])) -+ badworden &= (~BIT(0)); -+ } -+ if (!(word_en & BIT(1))) { -+ tmpaddr = start_addr; -+ rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[2]); -+ rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[3]); -+ rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[2]); -+ rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[3]); -+ if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3])) -+ badworden &= (~BIT(1)); -+ } -+ if (!(word_en & BIT(2))) { -+ tmpaddr = start_addr; -+ rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[4]); -+ rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[5]); -+ rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[4]); -+ rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[5]); -+ if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5])) -+ badworden &= (~BIT(2)); -+ } -+ if (!(word_en & BIT(3))) { -+ tmpaddr = start_addr; -+ rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[6]); -+ rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[7]); -+ rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[6]); -+ rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[7]); -+ -+ if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7])) -+ badworden &= (~BIT(3)); -+ } -+ -+ return badworden; -+} -+ -+static void -+hal_EfuseConstructPGPkt( -+ u8 offset, -+ u8 word_en, -+ u8 *pData, -+ PPGPKT_STRUCT pTargetPkt) -+{ -+ _rtw_memset(pTargetPkt->data, 0xFF, PGPKT_DATA_SIZE); -+ pTargetPkt->offset = offset; -+ pTargetPkt->word_en = word_en; -+ efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); -+ pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); -+} -+ -+static u8 -+hal_EfusePgPacketWriteData( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ u16 *pAddr, -+ PPGPKT_STRUCT pTargetPkt, -+ u8 bPseudoTest) -+{ -+ u16 efuse_addr; -+ u8 badworden; -+ -+ efuse_addr = *pAddr; -+ badworden = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); -+ if (badworden != 0x0F) { -+ RTW_INFO("%s: Fail!!\n", __FUNCTION__); -+ return _FALSE; -+ } else -+ RTW_INFO("%s: OK!!\n", __FUNCTION__); -+ -+ return _TRUE; -+} -+ -+u8 efuse_OneByteRead(struct _ADAPTER *a, u16 addr, u8 *data, u8 bPseudoTest) -+{ -+ struct dvobj_priv *d; -+ int err; -+ u8 ret = _TRUE; -+ -+ d = adapter_to_dvobj(a); -+ err = rtw_halmac_read_physical_efuse(d, addr, 1, data); -+ if (err) { -+ RTW_ERR("%s: addr=0x%x FAIL!!!\n", __FUNCTION__, addr); -+ ret = _FALSE; -+ } -+ -+ return ret; -+ -+} -+ -+ -+static u8 -+hal_BT_EfusePgCheckAvailableAddr( -+ PADAPTER pAdapter, -+ u8 bPseudoTest) -+{ -+ u16 max_available = EFUSE_BT_REAL_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK; -+ u16 current_size = 0; -+ -+ RTW_INFO("%s: max_available=%d\n", __FUNCTION__, max_available); -+ current_size = hal_EfuseGetCurrentSize_BT(pAdapter, bPseudoTest); -+ if (current_size >= max_available) { -+ RTW_INFO("%s: Error!! current_size(%d)>max_available(%d)\n", __FUNCTION__, current_size, max_available); -+ return _FALSE; -+ } -+ return _TRUE; -+} -+ -+u8 EfusePgPacketWrite_BT( -+ PADAPTER pAdapter, -+ u8 offset, -+ u8 word_en, -+ u8 *pData, -+ u8 bPseudoTest) -+{ -+ PGPKT_STRUCT targetPkt; -+ u16 startAddr = 0; -+ u8 efuseType = EFUSE_BT; -+ -+ if (!hal_BT_EfusePgCheckAvailableAddr(pAdapter, bPseudoTest)) -+ return _FALSE; -+ -+ hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); -+ -+ if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) -+ return _FALSE; -+ -+ if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) -+ return _FALSE; -+ -+ if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+ -+#else /* !RTW_HALMAC */ -+/* ------------------------------------------------------------------------------ */ -+#define REG_EFUSE_CTRL 0x0030 -+#define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */ -+/* ------------------------------------------------------------------------------ */ -+ -+ -+BOOLEAN -+Efuse_Read1ByteFromFakeContent( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u8 *Value); -+BOOLEAN -+Efuse_Read1ByteFromFakeContent( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u8 *Value) -+{ -+ if (Offset >= EFUSE_MAX_HW_SIZE) -+ return _FALSE; -+ /* DbgPrint("Read fake content, offset = %d\n", Offset); */ -+ if (fakeEfuseBank == 0) -+ *Value = fakeEfuseContent[Offset]; -+ else -+ *Value = fakeBTEfuseContent[fakeEfuseBank - 1][Offset]; -+ return _TRUE; -+} -+ -+BOOLEAN -+Efuse_Write1ByteToFakeContent( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u8 Value); -+BOOLEAN -+Efuse_Write1ByteToFakeContent( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u8 Value) -+{ -+ if (Offset >= EFUSE_MAX_HW_SIZE) -+ return _FALSE; -+ if (fakeEfuseBank == 0) -+ fakeEfuseContent[Offset] = Value; -+ else -+ fakeBTEfuseContent[fakeEfuseBank - 1][Offset] = Value; -+ return _TRUE; -+} -+ -+/*----------------------------------------------------------------------------- -+ * Function: Efuse_PowerSwitch -+ * -+ * Overview: When we want to enable write operation, we should change to -+ * pwr on state. When we stop write, we should switch to 500k mode -+ * and disable LDO 2.5V. -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 11/17/2008 MHC Create Version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+void -+Efuse_PowerSwitch( -+ PADAPTER pAdapter, -+ u8 bWrite, -+ u8 PwrState) -+{ -+ pAdapter->hal_func.EfusePowerSwitch(pAdapter, bWrite, PwrState); -+} -+ -+void -+BTEfuse_PowerSwitch( -+ PADAPTER pAdapter, -+ u8 bWrite, -+ u8 PwrState) -+{ -+ if (pAdapter->hal_func.BTEfusePowerSwitch) -+ pAdapter->hal_func.BTEfusePowerSwitch(pAdapter, bWrite, PwrState); -+} -+ -+/*----------------------------------------------------------------------------- -+ * Function: efuse_GetCurrentSize -+ * -+ * Overview: Get current efuse size!!! -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 11/16/2008 MHC Create Version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+u16 -+Efuse_GetCurrentSize( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ BOOLEAN bPseudoTest) -+{ -+ u16 ret = 0; -+ -+ ret = pAdapter->hal_func.EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest); -+ -+ return ret; -+} -+ -+/* -+ * Description: -+ * Execute E-Fuse read byte operation. -+ * Refered from SD1 Richard. -+ * -+ * Assumption: -+ * 1. Boot from E-Fuse and successfully auto-load. -+ * 2. PASSIVE_LEVEL (USB interface) -+ * -+ * Created by Roger, 2008.10.21. -+ * */ -+void -+ReadEFuseByte( -+ PADAPTER Adapter, -+ u16 _offset, -+ u8 *pbuf, -+ BOOLEAN bPseudoTest) -+{ -+ u32 value32; -+ u8 readbyte; -+ u16 retry; -+ /* systime start=rtw_get_current_time(); */ -+ -+ if (bPseudoTest) { -+ Efuse_Read1ByteFromFakeContent(Adapter, _offset, pbuf); -+ return; -+ } -+ if (IS_HARDWARE_TYPE_8723B(Adapter)) { -+ /* <20130121, Kordan> For SMIC S55 EFUSE specificatoin. */ -+ /* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) */ -+ phy_set_mac_reg(Adapter, EFUSE_TEST, BIT11, 0); -+ } -+ /* Write Address */ -+ rtw_write8(Adapter, EFUSE_CTRL + 1, (_offset & 0xff)); -+ readbyte = rtw_read8(Adapter, EFUSE_CTRL + 2); -+ rtw_write8(Adapter, EFUSE_CTRL + 2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc)); -+ -+ /* Write bit 32 0 */ -+ readbyte = rtw_read8(Adapter, EFUSE_CTRL + 3); -+ rtw_write8(Adapter, EFUSE_CTRL + 3, (readbyte & 0x7f)); -+ -+ /* Check bit 32 read-ready */ -+ retry = 0; -+ value32 = rtw_read32(Adapter, EFUSE_CTRL); -+ /* while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10)) */ -+ while (!(((value32 >> 24) & 0xff) & 0x80) && (retry < 10000)) { -+ value32 = rtw_read32(Adapter, EFUSE_CTRL); -+ retry++; -+ } -+ -+ /* 20100205 Joseph: Add delay suggested by SD1 Victor. */ -+ /* This fix the problem that Efuse read error in high temperature condition. */ -+ /* Designer says that there shall be some delay after ready bit is set, or the */ -+ /* result will always stay on last data we read. */ -+ rtw_udelay_os(50); -+ value32 = rtw_read32(Adapter, EFUSE_CTRL); -+ -+ *pbuf = (u8)(value32 & 0xff); -+ /* RTW_INFO("ReadEFuseByte _offset:%08u, in %d ms\n",_offset ,rtw_get_passing_time_ms(start)); */ -+ -+} -+ -+/* -+ * Description: -+ * 1. Execute E-Fuse read byte operation according as map offset and -+ * save to E-Fuse table. -+ * 2. Refered from SD1 Richard. -+ * -+ * Assumption: -+ * 1. Boot from E-Fuse and successfully auto-load. -+ * 2. PASSIVE_LEVEL (USB interface) -+ * -+ * Created by Roger, 2008.10.21. -+ * -+ * 2008/12/12 MH 1. Reorganize code flow and reserve bytes. and add description. -+ * 2. Add efuse utilization collect. -+ * 2008/12/22 MH Read Efuse must check if we write section 1 data again!!! Sec1 -+ * write addr must be after sec5. -+ * */ -+ -+void -+efuse_ReadEFuse( -+ PADAPTER Adapter, -+ u8 efuseType, -+ u16 _offset, -+ u16 _size_byte, -+ u8 *pbuf, -+ BOOLEAN bPseudoTest -+); -+void -+efuse_ReadEFuse( -+ PADAPTER Adapter, -+ u8 efuseType, -+ u16 _offset, -+ u16 _size_byte, -+ u8 *pbuf, -+ BOOLEAN bPseudoTest -+) -+{ -+ Adapter->hal_func.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); -+} -+ -+void -+EFUSE_GetEfuseDefinition( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ u8 type, -+ void *pOut, -+ BOOLEAN bPseudoTest -+) -+{ -+ pAdapter->hal_func.EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut, bPseudoTest); -+} -+ -+ -+/* 11/16/2008 MH Read one byte from real Efuse. */ -+u8 -+efuse_OneByteRead( -+ PADAPTER pAdapter, -+ u16 addr, -+ u8 *data, -+ BOOLEAN bPseudoTest) -+{ -+ u32 tmpidx = 0; -+ u8 bResult; -+ u8 readbyte; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ /* RTW_INFO("===> EFUSE_OneByteRead(), addr = %x\n", addr); */ -+ /* RTW_INFO("===> EFUSE_OneByteRead() start, 0x34 = 0x%X\n", rtw_read32(pAdapter, EFUSE_TEST)); */ -+ -+ if (bPseudoTest) { -+ bResult = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data); -+ return bResult; -+ } -+ -+#ifdef CONFIG_RTL8710B -+ /* <20171208, Peter>, Dont do the following write16(0x34) */ -+ if (IS_HARDWARE_TYPE_8710B(pAdapter)) { -+ bResult = pAdapter->hal_func.efuse_indirect_read4(pAdapter, addr, data); -+ return bResult; -+ } -+#endif -+ -+ if (IS_HARDWARE_TYPE_8723B(pAdapter) || -+ (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) || -+ (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id)) -+ ) { -+ /* <20130121, Kordan> For SMIC EFUSE specificatoin. */ -+ /* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) */ -+ /* phy_set_mac_reg(pAdapter, 0x34, BIT11, 0); */ -+ rtw_write16(pAdapter, 0x34, rtw_read16(pAdapter, 0x34) & (~BIT11)); -+ } -+ -+ /* -----------------e-fuse reg ctrl --------------------------------- */ -+ /* address */ -+ rtw_write8(pAdapter, EFUSE_CTRL + 1, (u8)(addr & 0xff)); -+ rtw_write8(pAdapter, EFUSE_CTRL + 2, ((u8)((addr >> 8) & 0x03)) | -+ (rtw_read8(pAdapter, EFUSE_CTRL + 2) & 0xFC)); -+ -+ /* rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72); */ /* read cmd */ -+ /* Write bit 32 0 */ -+ readbyte = rtw_read8(pAdapter, EFUSE_CTRL + 3); -+ rtw_write8(pAdapter, EFUSE_CTRL + 3, (readbyte & 0x7f)); -+ -+ while (!(0x80 & rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 1000)) { -+ rtw_mdelay_os(1); -+ tmpidx++; -+ } -+ if (tmpidx < 100) { -+ *data = rtw_read8(pAdapter, EFUSE_CTRL); -+ bResult = _TRUE; -+ } else { -+ *data = 0xff; -+ bResult = _FALSE; -+ RTW_INFO("%s: [ERROR] addr=0x%x bResult=%d time out 1s !!!\n", __FUNCTION__, addr, bResult); -+ RTW_INFO("%s: [ERROR] EFUSE_CTRL =0x%08x !!!\n", __FUNCTION__, rtw_read32(pAdapter, EFUSE_CTRL)); -+ } -+ -+ return bResult; -+} -+ -+/* 11/16/2008 MH Write one byte to reald Efuse. */ -+u8 -+efuse_OneByteWrite( -+ PADAPTER pAdapter, -+ u16 addr, -+ u8 data, -+ BOOLEAN bPseudoTest) -+{ -+ u8 tmpidx = 0; -+ u8 bResult = _FALSE; -+ u32 efuseValue = 0; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ /* RTW_INFO("===> EFUSE_OneByteWrite(), addr = %x data=%x\n", addr, data); */ -+ /* RTW_INFO("===> EFUSE_OneByteWrite() start, 0x34 = 0x%X\n", rtw_read32(pAdapter, EFUSE_TEST)); */ -+ -+ if (bPseudoTest) { -+ bResult = Efuse_Write1ByteToFakeContent(pAdapter, addr, data); -+ return bResult; -+ } -+ -+ Efuse_PowerSwitch(pAdapter, _TRUE, _TRUE); -+ -+ /* -----------------e-fuse reg ctrl --------------------------------- */ -+ /* address */ -+ -+ -+ efuseValue = rtw_read32(pAdapter, EFUSE_CTRL); -+ efuseValue |= (BIT21 | BIT31); -+ efuseValue &= ~(0x3FFFF); -+ efuseValue |= ((addr << 8 | data) & 0x3FFFF); -+ -+ /* <20130227, Kordan> 8192E MP chip A-cut had better not set 0x34[11] until B-Cut. */ -+ if (IS_HARDWARE_TYPE_8723B(pAdapter) || -+ (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) || -+ (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id)) -+ ) { -+ /* <20130121, Kordan> For SMIC EFUSE specificatoin. */ -+ /* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) */ -+ /* phy_set_mac_reg(pAdapter, 0x34, BIT11, 1); */ -+ rtw_write16(pAdapter, 0x34, rtw_read16(pAdapter, 0x34) | (BIT11)); -+ rtw_write32(pAdapter, EFUSE_CTRL, 0x90600000 | ((addr << 8 | data))); -+ } else -+ rtw_write32(pAdapter, EFUSE_CTRL, efuseValue); -+ -+ rtw_mdelay_os(1); -+ -+ while ((0x80 & rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 100)) { -+ rtw_mdelay_os(1); -+ tmpidx++; -+ } -+ -+ if (tmpidx < 100) -+ bResult = _TRUE; -+ else { -+ bResult = _FALSE; -+ RTW_INFO("%s: [ERROR] addr=0x%x ,efuseValue=0x%x ,bResult=%d time out 1s !!!\n", -+ __FUNCTION__, addr, efuseValue, bResult); -+ RTW_INFO("%s: [ERROR] EFUSE_CTRL =0x%08x !!!\n", __FUNCTION__, rtw_read32(pAdapter, EFUSE_CTRL)); -+ } -+ -+ /* disable Efuse program enable */ -+ if (IS_HARDWARE_TYPE_8723B(pAdapter) || -+ (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) || -+ (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id)) -+ ) -+ phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT(11), 0); -+ -+ Efuse_PowerSwitch(pAdapter, _TRUE, _FALSE); -+ -+ return bResult; -+} -+ -+int -+Efuse_PgPacketRead(PADAPTER pAdapter, -+ u8 offset, -+ u8 *data, -+ BOOLEAN bPseudoTest) -+{ -+ int ret = 0; -+ -+ ret = pAdapter->hal_func.Efuse_PgPacketRead(pAdapter, offset, data, bPseudoTest); -+ -+ return ret; -+} -+ -+int -+Efuse_PgPacketWrite(PADAPTER pAdapter, -+ u8 offset, -+ u8 word_en, -+ u8 *data, -+ BOOLEAN bPseudoTest) -+{ -+ int ret; -+ -+ ret = pAdapter->hal_func.Efuse_PgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); -+ -+ return ret; -+} -+ -+ -+int -+Efuse_PgPacketWrite_BT(PADAPTER pAdapter, -+ u8 offset, -+ u8 word_en, -+ u8 *data, -+ BOOLEAN bPseudoTest) -+{ -+ int ret; -+ -+ ret = pAdapter->hal_func.Efuse_PgPacketWrite_BT(pAdapter, offset, word_en, data, bPseudoTest); -+ -+ return ret; -+} -+ -+ -+u8 -+Efuse_WordEnableDataWrite(PADAPTER pAdapter, -+ u16 efuse_addr, -+ u8 word_en, -+ u8 *data, -+ BOOLEAN bPseudoTest) -+{ -+ u8 ret = 0; -+ -+ ret = pAdapter->hal_func.Efuse_WordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); -+ -+ return ret; -+} -+ -+static u8 efuse_read8(PADAPTER padapter, u16 address, u8 *value) -+{ -+ return efuse_OneByteRead(padapter, address, value, _FALSE); -+} -+ -+static u8 efuse_write8(PADAPTER padapter, u16 address, u8 *value) -+{ -+ return efuse_OneByteWrite(padapter, address, *value, _FALSE); -+} -+ -+/* -+ * read/wirte raw efuse data -+ */ -+u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 *data) -+{ -+ int i = 0; -+ u16 real_content_len = 0, max_available_size = 0; -+ u8 res = _FAIL ; -+ u8(*rw8)(PADAPTER, u16, u8 *); -+ u32 backupRegs[4] = {0}; -+ -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&real_content_len, _FALSE); -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, _FALSE); -+ -+ if (start_addr > real_content_len) -+ return _FAIL; -+ -+ if (_TRUE == bWrite) { -+ if ((start_addr + cnts) > max_available_size) -+ return _FAIL; -+ rw8 = &efuse_write8; -+ } else -+ rw8 = &efuse_read8; -+ -+ efuse_PreUpdateAction(padapter, backupRegs); -+ -+ Efuse_PowerSwitch(padapter, bWrite, _TRUE); -+ -+ /* e-fuse one byte read / write */ -+ for (i = 0; i < cnts; i++) { -+ if (start_addr >= real_content_len) { -+ res = _FAIL; -+ break; -+ } -+ -+ res = rw8(padapter, start_addr++, data++); -+ if (_FAIL == res) -+ break; -+ } -+ -+ Efuse_PowerSwitch(padapter, bWrite, _FALSE); -+ -+ efuse_PostUpdateAction(padapter, backupRegs); -+ -+ return res; -+} -+/* ------------------------------------------------------------------------------ */ -+u16 efuse_GetMaxSize(PADAPTER padapter) -+{ -+ u16 max_size; -+ -+ max_size = 0; -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_size, _FALSE); -+ return max_size; -+} -+/* ------------------------------------------------------------------------------ */ -+u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size) -+{ -+ Efuse_PowerSwitch(padapter, _FALSE, _TRUE); -+ *size = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, _FALSE); -+ Efuse_PowerSwitch(padapter, _FALSE, _FALSE); -+ -+ return _SUCCESS; -+} -+/* ------------------------------------------------------------------------------ */ -+u16 efuse_bt_GetMaxSize(PADAPTER padapter) -+{ -+ u16 max_size; -+ -+ max_size = 0; -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_size, _FALSE); -+ return max_size; -+} -+ -+u8 efuse_bt_GetCurrentSize(PADAPTER padapter, u16 *size) -+{ -+ Efuse_PowerSwitch(padapter, _FALSE, _TRUE); -+ *size = Efuse_GetCurrentSize(padapter, EFUSE_BT, _FALSE); -+ Efuse_PowerSwitch(padapter, _FALSE, _FALSE); -+ -+ return _SUCCESS; -+} -+ -+u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) -+{ -+ u16 mapLen = 0; -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); -+ -+ if ((addr + cnts) > mapLen) -+ return _FAIL; -+ -+ Efuse_PowerSwitch(padapter, _FALSE, _TRUE); -+ -+ efuse_ReadEFuse(padapter, EFUSE_WIFI, addr, cnts, data, _FALSE); -+ -+ Efuse_PowerSwitch(padapter, _FALSE, _FALSE); -+ -+ return _SUCCESS; -+} -+ -+u8 rtw_BT_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) -+{ -+ u16 mapLen = 0; -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); -+ -+ if ((addr + cnts) > mapLen) -+ return _FAIL; -+ -+ Efuse_PowerSwitch(padapter, _FALSE, _TRUE); -+ -+ efuse_ReadEFuse(padapter, EFUSE_BT, addr, cnts, data, _FALSE); -+ -+ Efuse_PowerSwitch(padapter, _FALSE, _FALSE); -+ -+ return _SUCCESS; -+} -+ -+/* ------------------------------------------------------------------------------ */ -+u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) -+{ -+#define RT_ASSERT_RET(expr) \ -+ if (!(expr)) { \ -+ printk("Assertion failed! %s at ......\n", #expr); \ -+ printk(" ......%s,%s, line=%d\n",__FILE__, __FUNCTION__, __LINE__); \ -+ return _FAIL; \ -+ } -+ -+ u8 *efuse = NULL; -+ u8 offset, word_en; -+ u8 *map = NULL; -+ u8 newdata[PGPKT_DATA_SIZE]; -+ s32 i, j, idx, chk_total_byte; -+ u8 ret = _SUCCESS; -+ u16 mapLen = 0, startAddr = 0, efuse_max_available_len = 0; -+ u32 backupRegs[4] = {0}; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; -+ -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_max_available_len, _FALSE); -+ -+ if ((addr + cnts) > mapLen) -+ return _FAIL; -+ -+ RT_ASSERT_RET(PGPKT_DATA_SIZE == 8); /* have to be 8 byte alignment */ -+ RT_ASSERT_RET((mapLen & 0x7) == 0); /* have to be PGPKT_DATA_SIZE alignment for memcpy */ -+ -+ efuse = rtw_zmalloc(mapLen); -+ if (!efuse) -+ return _FAIL; -+ -+ map = rtw_zmalloc(mapLen); -+ if (map == NULL) { -+ rtw_mfree(efuse, mapLen); -+ return _FAIL; -+ } -+ -+ _rtw_memset(map, 0xFF, mapLen); -+ -+ ret = rtw_efuse_map_read(padapter, 0, mapLen, map); -+ if (ret == _FAIL) -+ goto exit; -+ -+ _rtw_memcpy(efuse , map, mapLen); -+ _rtw_memcpy(efuse + addr, data, cnts); -+ -+ if (padapter->registrypriv.boffefusemask == 0) { -+ for (i = 0; i < cnts; i++) { -+ if (padapter->registrypriv.bFileMaskEfuse == _TRUE) { -+ if (rtw_file_efuse_IsMasked(padapter, addr + i, maskfileBuffer)) /*use file efuse mask. */ -+ efuse[addr + i] = map[addr + i]; -+ } else { -+ if (efuse_IsMasked(padapter, addr + i)) -+ efuse[addr + i] = map[addr + i]; -+ } -+ RTW_INFO("%s , data[%d] = %x, map[addr+i]= %x\n", __func__, addr + i, efuse[ addr + i], map[addr + i]); -+ } -+ } -+ /*Efuse_PowerSwitch(padapter, _TRUE, _TRUE);*/ -+ -+ chk_total_byte = 0; -+ idx = 0; -+ offset = (addr >> 3); -+ -+ while (idx < cnts) { -+ word_en = 0xF; -+ j = (addr + idx) & 0x7; -+ for (i = j; i < PGPKT_DATA_SIZE && idx < cnts; i++, idx++) { -+ if (efuse[addr + idx] != map[addr + idx]) -+ word_en &= ~BIT(i >> 1); -+ } -+ -+ if (word_en != 0xF) { -+ chk_total_byte += Efuse_CalculateWordCnts(word_en) * 2; -+ -+ if (offset >= EFUSE_MAX_SECTION_BASE) /* Over EFUSE_MAX_SECTION 16 for 2 ByteHeader */ -+ chk_total_byte += 2; -+ else -+ chk_total_byte += 1; -+ } -+ -+ offset++; -+ } -+ -+ RTW_INFO("Total PG bytes Count = %d\n", chk_total_byte); -+ rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); -+ -+ if (startAddr == 0) { -+ startAddr = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, _FALSE); -+ RTW_INFO("%s: Efuse_GetCurrentSize startAddr=%#X\n", __func__, startAddr); -+ } -+ RTW_DBG("%s: startAddr=%#X\n", __func__, startAddr); -+ -+ if ((startAddr + chk_total_byte) >= efuse_max_available_len) { -+ RTW_INFO("%s: startAddr(0x%X) + PG data len %d >= efuse_max_available_len(0x%X)\n", -+ __func__, startAddr, chk_total_byte, efuse_max_available_len); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ efuse_PreUpdateAction(padapter, backupRegs); -+ -+ idx = 0; -+ offset = (addr >> 3); -+ while (idx < cnts) { -+ word_en = 0xF; -+ j = (addr + idx) & 0x7; -+ _rtw_memcpy(newdata, &map[offset << 3], PGPKT_DATA_SIZE); -+ for (i = j; i < PGPKT_DATA_SIZE && idx < cnts; i++, idx++) { -+ if (efuse[addr + idx] != map[addr + idx]) { -+ word_en &= ~BIT(i >> 1); -+ newdata[i] = efuse[addr + idx]; -+#ifdef CONFIG_RTL8723B -+ if (addr + idx == 0x8) { -+ if (IS_C_CUT(pHalData->version_id) || IS_B_CUT(pHalData->version_id)) { -+ if (pHalData->adjuseVoltageVal == 6) { -+ newdata[i] = map[addr + idx]; -+ RTW_INFO(" %s ,\n adjuseVoltageVal = %d ,newdata[%d] = %x\n", __func__, pHalData->adjuseVoltageVal, i, newdata[i]); -+ } -+ } -+ } -+#endif -+ } -+ } -+ -+ if (word_en != 0xF) { -+ ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata, _FALSE); -+ RTW_INFO("offset=%x\n", offset); -+ RTW_INFO("word_en=%x\n", word_en); -+ -+ for (i = 0; i < PGPKT_DATA_SIZE; i++) -+ RTW_INFO("data=%x \t", newdata[i]); -+ if (ret == _FAIL) -+ break; -+ } -+ -+ offset++; -+ } -+ -+ /*Efuse_PowerSwitch(padapter, _TRUE, _FALSE);*/ -+ -+ efuse_PostUpdateAction(padapter, backupRegs); -+ -+exit: -+ -+ rtw_mfree(map, mapLen); -+ rtw_mfree(efuse, mapLen); -+ -+ return ret; -+} -+ -+ -+u8 rtw_BT_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) -+{ -+#define RT_ASSERT_RET(expr) \ -+ if (!(expr)) { \ -+ printk("Assertion failed! %s at ......\n", #expr); \ -+ printk(" ......%s,%s, line=%d\n",__FILE__, __FUNCTION__, __LINE__); \ -+ return _FAIL; \ -+ } -+ -+ u8 offset, word_en; -+ u8 *map; -+ u8 newdata[PGPKT_DATA_SIZE]; -+ s32 i = 0, j = 0, idx; -+ u8 ret = _SUCCESS; -+ u16 mapLen = 0; -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); -+ -+ if ((addr + cnts) > mapLen) -+ return _FAIL; -+ -+ RT_ASSERT_RET(PGPKT_DATA_SIZE == 8); /* have to be 8 byte alignment */ -+ RT_ASSERT_RET((mapLen & 0x7) == 0); /* have to be PGPKT_DATA_SIZE alignment for memcpy */ -+ -+ map = rtw_zmalloc(mapLen); -+ if (map == NULL) -+ return _FAIL; -+ -+ ret = rtw_BT_efuse_map_read(padapter, 0, mapLen, map); -+ if (ret == _FAIL) -+ goto exit; -+ RTW_INFO("OFFSET\tVALUE(hex)\n"); -+ for (i = 0; i < 1024; i += 16) { /* set 512 because the iwpriv's extra size have limit 0x7FF */ -+ RTW_INFO("0x%03x\t", i); -+ for (j = 0; j < 8; j++) -+ RTW_INFO("%02X ", map[i + j]); -+ RTW_INFO("\t"); -+ for (; j < 16; j++) -+ RTW_INFO("%02X ", map[i + j]); -+ RTW_INFO("\n"); -+ } -+ RTW_INFO("\n"); -+ Efuse_PowerSwitch(padapter, _TRUE, _TRUE); -+ -+ idx = 0; -+ offset = (addr >> 3); -+ while (idx < cnts) { -+ word_en = 0xF; -+ j = (addr + idx) & 0x7; -+ _rtw_memcpy(newdata, &map[offset << 3], PGPKT_DATA_SIZE); -+ for (i = j; i < PGPKT_DATA_SIZE && idx < cnts; i++, idx++) { -+ if (data[idx] != map[addr + idx]) { -+ word_en &= ~BIT(i >> 1); -+ newdata[i] = data[idx]; -+ } -+ } -+ -+ if (word_en != 0xF) { -+ RTW_INFO("offset=%x\n", offset); -+ RTW_INFO("word_en=%x\n", word_en); -+ RTW_INFO("%s: data=", __FUNCTION__); -+ for (i = 0; i < PGPKT_DATA_SIZE; i++) -+ RTW_INFO("0x%02X ", newdata[i]); -+ RTW_INFO("\n"); -+ ret = Efuse_PgPacketWrite_BT(padapter, offset, word_en, newdata, _FALSE); -+ if (ret == _FAIL) -+ break; -+ } -+ -+ offset++; -+ } -+ -+ Efuse_PowerSwitch(padapter, _TRUE, _FALSE); -+ -+exit: -+ -+ rtw_mfree(map, mapLen); -+ -+ return ret; -+} -+ -+/*----------------------------------------------------------------------------- -+ * Function: Efuse_ReadAllMap -+ * -+ * Overview: Read All Efuse content -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 11/11/2008 MHC Create Version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+void -+Efuse_ReadAllMap( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ u8 *Efuse, -+ BOOLEAN bPseudoTest); -+void -+Efuse_ReadAllMap( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ u8 *Efuse, -+ BOOLEAN bPseudoTest) -+{ -+ u16 mapLen = 0; -+ -+ Efuse_PowerSwitch(pAdapter, _FALSE, _TRUE); -+ -+ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, bPseudoTest); -+ -+ efuse_ReadEFuse(pAdapter, efuseType, 0, mapLen, Efuse, bPseudoTest); -+ -+ Efuse_PowerSwitch(pAdapter, _FALSE, _FALSE); -+} -+ -+/*----------------------------------------------------------------------------- -+ * Function: efuse_ShadowWrite1Byte -+ * efuse_ShadowWrite2Byte -+ * efuse_ShadowWrite4Byte -+ * -+ * Overview: Write efuse modify map by one/two/four byte. -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 11/12/2008 MHC Create Version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+#ifdef PLATFORM -+static void -+efuse_ShadowWrite1Byte( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u8 Value); -+#endif /* PLATFORM */ -+static void -+efuse_ShadowWrite1Byte( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u8 Value) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ -+ pHalData->efuse_eeprom_data[Offset] = Value; -+ -+} /* efuse_ShadowWrite1Byte */ -+ -+/* ---------------Write Two Bytes */ -+static void -+efuse_ShadowWrite2Byte( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u16 Value) -+{ -+ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ -+ -+ pHalData->efuse_eeprom_data[Offset] = Value & 0x00FF; -+ pHalData->efuse_eeprom_data[Offset + 1] = Value >> 8; -+ -+} /* efuse_ShadowWrite1Byte */ -+ -+/* ---------------Write Four Bytes */ -+static void -+efuse_ShadowWrite4Byte( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u32 Value) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ -+ pHalData->efuse_eeprom_data[Offset] = (u8)(Value & 0x000000FF); -+ pHalData->efuse_eeprom_data[Offset + 1] = (u8)((Value >> 8) & 0x0000FF); -+ pHalData->efuse_eeprom_data[Offset + 2] = (u8)((Value >> 16) & 0x00FF); -+ pHalData->efuse_eeprom_data[Offset + 3] = (u8)((Value >> 24) & 0xFF); -+ -+} /* efuse_ShadowWrite1Byte */ -+ -+ -+/*----------------------------------------------------------------------------- -+ * Function: EFUSE_ShadowWrite -+ * -+ * Overview: Write efuse modify map for later update operation to use!!!!! -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 11/12/2008 MHC Create Version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+void -+EFUSE_ShadowWrite( -+ PADAPTER pAdapter, -+ u8 Type, -+ u16 Offset, -+ u32 Value); -+void -+EFUSE_ShadowWrite( -+ PADAPTER pAdapter, -+ u8 Type, -+ u16 Offset, -+ u32 Value) -+{ -+#if (MP_DRIVER == 0) -+ return; -+#endif -+ if (pAdapter->registrypriv.mp_mode == 0) -+ return; -+ -+ -+ if (Type == 1) -+ efuse_ShadowWrite1Byte(pAdapter, Offset, (u8)Value); -+ else if (Type == 2) -+ efuse_ShadowWrite2Byte(pAdapter, Offset, (u16)Value); -+ else if (Type == 4) -+ efuse_ShadowWrite4Byte(pAdapter, Offset, (u32)Value); -+ -+} /* EFUSE_ShadowWrite */ -+ -+#endif /* !RTW_HALMAC */ -+/*----------------------------------------------------------------------------- -+ * Function: efuse_ShadowRead1Byte -+ * efuse_ShadowRead2Byte -+ * efuse_ShadowRead4Byte -+ * -+ * Overview: Read from efuse init map by one/two/four bytes !!!!! -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 11/12/2008 MHC Create Version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+static void -+efuse_ShadowRead1Byte( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u8 *Value) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ -+ *Value = pHalData->efuse_eeprom_data[Offset]; -+ -+} /* EFUSE_ShadowRead1Byte */ -+ -+/* ---------------Read Two Bytes */ -+static void -+efuse_ShadowRead2Byte( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u16 *Value) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ -+ *Value = pHalData->efuse_eeprom_data[Offset]; -+ *Value |= pHalData->efuse_eeprom_data[Offset + 1] << 8; -+ -+} /* EFUSE_ShadowRead2Byte */ -+ -+/* ---------------Read Four Bytes */ -+static void -+efuse_ShadowRead4Byte( -+ PADAPTER pAdapter, -+ u16 Offset, -+ u32 *Value) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ -+ *Value = pHalData->efuse_eeprom_data[Offset]; -+ *Value |= pHalData->efuse_eeprom_data[Offset + 1] << 8; -+ *Value |= pHalData->efuse_eeprom_data[Offset + 2] << 16; -+ *Value |= pHalData->efuse_eeprom_data[Offset + 3] << 24; -+ -+} /* efuse_ShadowRead4Byte */ -+ -+/*----------------------------------------------------------------------------- -+ * Function: EFUSE_ShadowRead -+ * -+ * Overview: Read from pHalData->efuse_eeprom_data -+ *---------------------------------------------------------------------------*/ -+void -+EFUSE_ShadowRead( -+ PADAPTER pAdapter, -+ u8 Type, -+ u16 Offset, -+ u32 *Value) -+{ -+ if (Type == 1) -+ efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value); -+ else if (Type == 2) -+ efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value); -+ else if (Type == 4) -+ efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value); -+ -+} /* EFUSE_ShadowRead */ -+ -+/* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */ -+u8 -+Efuse_CalculateWordCnts(u8 word_en) -+{ -+ u8 word_cnts = 0; -+ if (!(word_en & BIT(0))) -+ word_cnts++; /* 0 : write enable */ -+ if (!(word_en & BIT(1))) -+ word_cnts++; -+ if (!(word_en & BIT(2))) -+ word_cnts++; -+ if (!(word_en & BIT(3))) -+ word_cnts++; -+ return word_cnts; -+} -+ -+/*----------------------------------------------------------------------------- -+ * Function: efuse_WordEnableDataRead -+ * -+ * Overview: Read allowed word in current efuse section data. -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 11/16/2008 MHC Create Version 0. -+ * 11/21/2008 MHC Fix Write bug when we only enable late word. -+ * -+ *---------------------------------------------------------------------------*/ -+void -+efuse_WordEnableDataRead(u8 word_en, -+ u8 *sourdata, -+ u8 *targetdata) -+{ -+ if (!(word_en & BIT(0))) { -+ targetdata[0] = sourdata[0]; -+ targetdata[1] = sourdata[1]; -+ } -+ if (!(word_en & BIT(1))) { -+ targetdata[2] = sourdata[2]; -+ targetdata[3] = sourdata[3]; -+ } -+ if (!(word_en & BIT(2))) { -+ targetdata[4] = sourdata[4]; -+ targetdata[5] = sourdata[5]; -+ } -+ if (!(word_en & BIT(3))) { -+ targetdata[6] = sourdata[6]; -+ targetdata[7] = sourdata[7]; -+ } -+} -+ -+/*----------------------------------------------------------------------------- -+ * Function: EFUSE_ShadowMapUpdate -+ * -+ * Overview: Transfer current EFUSE content to shadow init and modify map. -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 11/13/2008 MHC Create Version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+void EFUSE_ShadowMapUpdate( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ BOOLEAN bPseudoTest) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ u16 mapLen = 0; -+#ifdef RTW_HALMAC -+ u8 *efuse_map = NULL; -+ int err; -+ -+ -+ mapLen = EEPROM_MAX_SIZE; -+ efuse_map = pHalData->efuse_eeprom_data; -+ /* efuse default content is 0xFF */ -+ _rtw_memset(efuse_map, 0xFF, EEPROM_MAX_SIZE); -+ -+ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, bPseudoTest); -+ if (!mapLen) { -+ RTW_WARN("%s: fail to get efuse size!\n", __FUNCTION__); -+ mapLen = EEPROM_MAX_SIZE; -+ } -+ if (mapLen > EEPROM_MAX_SIZE) { -+ RTW_WARN("%s: size of efuse data(%d) is large than expected(%d)!\n", -+ __FUNCTION__, mapLen, EEPROM_MAX_SIZE); -+ mapLen = EEPROM_MAX_SIZE; -+ } -+ -+ if (pHalData->bautoload_fail_flag == _FALSE) { -+ err = rtw_halmac_read_logical_efuse_map(adapter_to_dvobj(pAdapter), efuse_map, mapLen, NULL, 0); -+ if (err) -+ RTW_ERR("%s: fail to get efuse map!\n", __FUNCTION__); -+ } -+#else /* !RTW_HALMAC */ -+ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, bPseudoTest); -+ -+ if (pHalData->bautoload_fail_flag == _TRUE) -+ _rtw_memset(pHalData->efuse_eeprom_data, 0xFF, mapLen); -+ else { -+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE -+ if (_SUCCESS != retriveAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pHalData->efuse_eeprom_data)) { -+#endif -+ -+ Efuse_ReadAllMap(pAdapter, efuseType, pHalData->efuse_eeprom_data, bPseudoTest); -+ -+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE -+ storeAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pHalData->efuse_eeprom_data); -+ } -+#endif -+ } -+ -+ /* PlatformMoveMemory((void *)&pHalData->EfuseMap[EFUSE_MODIFY_MAP][0], */ -+ /* (void *)&pHalData->EfuseMap[EFUSE_INIT_MAP][0], mapLen); */ -+#endif /* !RTW_HALMAC */ -+ -+ rtw_mask_map_read(pAdapter, 0x00, mapLen, pHalData->efuse_eeprom_data); -+ -+ rtw_dump_cur_efuse(pAdapter); -+} /* EFUSE_ShadowMapUpdate */ -+ -+const u8 _mac_hidden_max_bw_to_hal_bw_cap[MAC_HIDDEN_MAX_BW_NUM] = { -+ 0, -+ 0, -+ (BW_CAP_160M | BW_CAP_80M | BW_CAP_40M | BW_CAP_20M | BW_CAP_10M | BW_CAP_5M), -+ (BW_CAP_5M), -+ (BW_CAP_10M | BW_CAP_5M), -+ (BW_CAP_20M | BW_CAP_10M | BW_CAP_5M), -+ (BW_CAP_40M | BW_CAP_20M | BW_CAP_10M | BW_CAP_5M), -+ (BW_CAP_80M | BW_CAP_40M | BW_CAP_20M | BW_CAP_10M | BW_CAP_5M), -+}; -+ -+const u8 _mac_hidden_proto_to_hal_proto_cap[MAC_HIDDEN_PROTOCOL_NUM] = { -+ 0, -+ 0, -+ (PROTO_CAP_11N | PROTO_CAP_11G | PROTO_CAP_11B), -+ (PROTO_CAP_11AC | PROTO_CAP_11N | PROTO_CAP_11G | PROTO_CAP_11B), -+}; -+ -+u8 mac_hidden_wl_func_to_hal_wl_func(u8 func) -+{ -+ u8 wl_func = 0; -+ -+ if (func & BIT0) -+ wl_func |= WL_FUNC_MIRACAST; -+ if (func & BIT1) -+ wl_func |= WL_FUNC_P2P; -+ if (func & BIT2) -+ wl_func |= WL_FUNC_TDLS; -+ if (func & BIT3) -+ wl_func |= WL_FUNC_FTM; -+ -+ return wl_func; -+} -+ -+#ifdef PLATFORM_LINUX -+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE -+/* #include */ -+ -+int isAdaptorInfoFileValid(void) -+{ -+ return _TRUE; -+} -+ -+int storeAdaptorInfoFile(char *path, u8 *efuse_data) -+{ -+ int ret = _SUCCESS; -+ -+ if (path && efuse_data) { -+ ret = rtw_store_to_file(path, efuse_data, EEPROM_MAX_SIZE_512); -+ if (ret == EEPROM_MAX_SIZE) -+ ret = _SUCCESS; -+ else -+ ret = _FAIL; -+ } else { -+ RTW_INFO("%s NULL pointer\n", __FUNCTION__); -+ ret = _FAIL; -+ } -+ return ret; -+} -+ -+int retriveAdaptorInfoFile(char *path, u8 *efuse_data) -+{ -+ int ret = _SUCCESS; -+ mm_segment_t oldfs; -+ struct file *fp; -+ -+ if (path && efuse_data) { -+ -+ ret = rtw_retrieve_from_file(path, efuse_data, EEPROM_MAX_SIZE); -+ -+ if (ret == EEPROM_MAX_SIZE) -+ ret = _SUCCESS; -+ else -+ ret = _FAIL; -+ -+#if 0 -+ if (isAdaptorInfoFileValid()) -+ return 0; -+ else -+ return _FAIL; -+#endif -+ -+ } else { -+ RTW_INFO("%s NULL pointer\n", __FUNCTION__); -+ ret = _FAIL; -+ } -+ return ret; -+} -+#endif /* CONFIG_ADAPTOR_INFO_CACHING_FILE */ -+ -+u8 rtw_efuse_file_read(PADAPTER padapter, u8 *filepath, u8 *buf, u32 len) -+{ -+ char *ptmpbuf = NULL, *ptr; -+ u8 val8; -+ u32 count, i, j; -+ int err; -+ u32 bufsize = 4096; -+ -+ ptmpbuf = rtw_zmalloc(bufsize); -+ if (ptmpbuf == NULL) -+ return _FALSE; -+ -+ count = rtw_retrieve_from_file(filepath, ptmpbuf, bufsize); -+ if (count <= 90) { -+ rtw_mfree(ptmpbuf, bufsize); -+ RTW_ERR("%s, filepatch %s, size=%d, FAIL!!\n", __FUNCTION__, filepath, count); -+ return _FALSE; -+ } -+ i = 0; -+ j = 0; -+ ptr = ptmpbuf; -+ while ((j < len) && (i < count)) { -+ if (ptmpbuf[i] == '\0') -+ break; -+ ptr = strpbrk(&ptmpbuf[i], " \t\n\r"); -+ if (ptr) { -+ if (ptr == &ptmpbuf[i]) { -+ i++; -+ continue; -+ } -+ /* Add string terminating null */ -+ *ptr = 0; -+ } else { -+ ptr = &ptmpbuf[count-1]; -+ } -+ -+ err = sscanf(&ptmpbuf[i], "%hhx", &val8); -+ if (err != 1) { -+ RTW_WARN("Something wrong to parse efuse file, string=%s\n", &ptmpbuf[i]); -+ } else { -+ buf[j] = val8; -+ RTW_DBG("i=%d, j=%d, 0x%02x\n", i, j, buf[j]); -+ j++; -+ } -+ i = ptr - ptmpbuf + 1; -+ } -+ rtw_mfree(ptmpbuf, bufsize); -+ RTW_INFO("%s, filepatch %s, size=%d, done\n", __FUNCTION__, filepath, count); -+ return _TRUE; -+} -+ -+ -+u8 rtw_efuse_file_store(PADAPTER padapter, u8 *filepath, u8 *buf, u32 len) -+{ -+ int err = 0, i = 0, j = 0, mapLen = 0 ; -+ char *cbuf, *pchr; -+ -+ cbuf = rtw_zmalloc(len * 3); -+ pchr = cbuf; -+ -+ if (filepath && buf) { -+ if (cbuf == NULL) { -+ RTW_INFO("%s, malloc cbuf _FAIL\n", __FUNCTION__); -+ err = _FAIL; -+ } else { -+ for (i = 0; i <= len; i += 16) { -+ for (j = 0; j < 16; j++) -+ pchr += sprintf(pchr, "%02X ", buf[i + j]); -+ pchr += sprintf(pchr, "\n"); -+ } -+ -+ err = rtw_store_to_file(filepath, cbuf, strlen(cbuf)); -+ RTW_INFO("%s, rtw_store_to_file len=%d,err =%d, len(cbuf)=%zd\n", __FUNCTION__, len, err, strlen(cbuf)); -+ if (err == strlen(cbuf)) { -+ err = _SUCCESS; -+ RTW_INFO("%s, filepatch %s, len=%d, done\n", __FUNCTION__, filepath, len); -+ } else { -+ err = _FAIL; -+ RTW_INFO("%s, filepatch %s, len=%d,err =%d, _FAIL\n", __FUNCTION__, filepath, len, err); -+ } -+ } -+ } -+ if (cbuf) -+ rtw_mfree(cbuf, len * 3); -+ -+ return err; -+} -+ -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+u32 rtw_read_efuse_from_file(const char *path, u8 *buf, int map_size) -+{ -+ u32 i; -+ u8 c; -+ u8 temp[3]; -+ u8 temp_i; -+ u8 end = _FALSE; -+ u32 ret = _FAIL; -+ -+ u8 *file_data = NULL; -+ u32 file_size, read_size, pos = 0; -+ u8 *map = NULL; -+ -+ if (rtw_is_file_readable_with_size(path, &file_size) != _TRUE) { -+ RTW_PRINT("%s %s is not readable\n", __func__, path); -+ goto exit; -+ } -+ -+ file_data = rtw_vmalloc(file_size); -+ if (!file_data) { -+ RTW_ERR("%s rtw_vmalloc(%d) fail\n", __func__, file_size); -+ goto exit; -+ } -+ -+ read_size = rtw_retrieve_from_file(path, file_data, file_size); -+ if (read_size == 0) { -+ RTW_ERR("%s read from %s fail\n", __func__, path); -+ goto exit; -+ } -+ -+ map = rtw_vmalloc(map_size); -+ if (!map) { -+ RTW_ERR("%s rtw_vmalloc(%d) fail\n", __func__, map_size); -+ goto exit; -+ } -+ _rtw_memset(map, 0xff, map_size); -+ -+ temp[2] = 0; /* end of string '\0' */ -+ -+ for (i = 0 ; i < map_size ; i++) { -+ temp_i = 0; -+ -+ while (1) { -+ if (pos >= read_size) { -+ end = _TRUE; -+ break; -+ } -+ c = file_data[pos++]; -+ -+ /* bypass spece or eol or null before first hex digit */ -+ if (temp_i == 0 && (is_eol(c) == _TRUE || is_space(c) == _TRUE || is_null(c) == _TRUE)) -+ continue; -+ -+ if (IsHexDigit(c) == _FALSE) { -+ RTW_ERR("%s invalid 8-bit hex format for offset:0x%03x\n", __func__, i); -+ goto exit; -+ } -+ -+ temp[temp_i++] = c; -+ -+ if (temp_i == 2) { -+ /* parse value */ -+ if (sscanf(temp, "%hhx", &map[i]) != 1) { -+ RTW_ERR("%s sscanf fail for offset:0x%03x\n", __func__, i); -+ goto exit; -+ } -+ break; -+ } -+ } -+ -+ if (end == _TRUE) { -+ if (temp_i != 0) { -+ RTW_ERR("%s incomplete 8-bit hex format for offset:0x%03x\n", __func__, i); -+ goto exit; -+ } -+ break; -+ } -+ } -+ -+ RTW_PRINT("efuse file:%s, 0x%03x byte content read\n", path, i); -+ -+ _rtw_memcpy(buf, map, map_size); -+ -+ ret = _SUCCESS; -+ -+exit: -+ if (file_data) -+ rtw_vmfree(file_data, file_size); -+ if (map) -+ rtw_vmfree(map, map_size); -+ -+ return ret; -+} -+ -+u32 rtw_read_macaddr_from_file(const char *path, u8 *buf) -+{ -+ u32 i; -+ u8 temp[3]; -+ u32 ret = _FAIL; -+ -+ u8 file_data[17]; -+ u32 read_size; -+ u8 addr[ETH_ALEN]; -+ -+ if (rtw_is_file_readable(path) != _TRUE) { -+ RTW_PRINT("%s %s is not readable\n", __func__, path); -+ goto exit; -+ } -+ -+ read_size = rtw_retrieve_from_file(path, file_data, 17); -+ if (read_size != 17) { -+ RTW_ERR("%s read from %s fail\n", __func__, path); -+ goto exit; -+ } -+ -+ temp[2] = 0; /* end of string '\0' */ -+ -+ for (i = 0 ; i < ETH_ALEN ; i++) { -+ if (IsHexDigit(file_data[i * 3]) == _FALSE || IsHexDigit(file_data[i * 3 + 1]) == _FALSE) { -+ RTW_ERR("%s invalid 8-bit hex format for address offset:%u\n", __func__, i); -+ goto exit; -+ } -+ -+ if (i < ETH_ALEN - 1 && file_data[i * 3 + 2] != ':') { -+ RTW_ERR("%s invalid separator after address offset:%u\n", __func__, i); -+ goto exit; -+ } -+ -+ temp[0] = file_data[i * 3]; -+ temp[1] = file_data[i * 3 + 1]; -+ if (sscanf(temp, "%hhx", &addr[i]) != 1) { -+ RTW_ERR("%s sscanf fail for address offset:0x%03x\n", __func__, i); -+ goto exit; -+ } -+ } -+ -+ _rtw_memcpy(buf, addr, ETH_ALEN); -+ -+ RTW_PRINT("wifi_mac file: %s\n", path); -+#ifdef CONFIG_RTW_DEBUG -+ RTW_INFO(MAC_FMT"\n", MAC_ARG(buf)); -+#endif -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_EFUSE_CONFIG_FILE */ -+ -+#endif /* PLATFORM_LINUX */ -diff --git a/drivers/staging/rtl8723cs/core/mesh/rtw_mesh.c b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh.c -new file mode 100644 -index 000000000000..41a311128935 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh.c -@@ -0,0 +1,4392 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_MESH_C_ -+ -+#ifdef CONFIG_RTW_MESH -+#include -+ -+const char *_rtw_mesh_plink_str[] = { -+ "UNKNOWN", -+ "LISTEN", -+ "OPN_SNT", -+ "OPN_RCVD", -+ "CNF_RCVD", -+ "ESTAB", -+ "HOLDING", -+ "BLOCKED", -+}; -+ -+const char *_rtw_mesh_ps_str[] = { -+ "UNKNOWN", -+ "ACTIVE", -+ "LSLEEP", -+ "DSLEEP", -+}; -+ -+const char *_action_self_protected_str[] = { -+ "ACT_SELF_PROTECTED_RSVD", -+ "MESH_OPEN", -+ "MESH_CONF", -+ "MESH_CLOSE", -+ "MESH_GK_INFORM", -+ "MESH_GK_ACK", -+}; -+ -+inline u8 *rtw_set_ie_mesh_id(u8 *buf, u32 *buf_len, const char *mesh_id, u8 id_len) -+{ -+ return rtw_set_ie(buf, WLAN_EID_MESH_ID, id_len, mesh_id, buf_len); -+} -+ -+inline u8 *rtw_set_ie_mesh_config(u8 *buf, u32 *buf_len -+ , u8 path_sel_proto, u8 path_sel_metric, u8 congest_ctl_mode, u8 sync_method, u8 auth_proto -+ , u8 num_of_peerings, bool cto_mgate, bool cto_as -+ , bool accept_peerings, bool mcca_sup, bool mcca_en, bool forwarding -+ , bool mbca_en, bool tbtt_adj, bool ps_level) -+{ -+ -+ u8 conf[7] = {0}; -+ -+ SET_MESH_CONF_ELE_PATH_SEL_PROTO_ID(conf, path_sel_proto); -+ SET_MESH_CONF_ELE_PATH_SEL_METRIC_ID(conf, path_sel_metric); -+ SET_MESH_CONF_ELE_CONGEST_CTRL_MODE_ID(conf, congest_ctl_mode); -+ SET_MESH_CONF_ELE_SYNC_METHOD_ID(conf, sync_method); -+ SET_MESH_CONF_ELE_AUTH_PROTO_ID(conf, auth_proto); -+ -+ SET_MESH_CONF_ELE_CTO_MGATE(conf, cto_mgate); -+ SET_MESH_CONF_ELE_NUM_OF_PEERINGS(conf, num_of_peerings); -+ SET_MESH_CONF_ELE_CTO_AS(conf, cto_as); -+ -+ SET_MESH_CONF_ELE_ACCEPT_PEERINGS(conf, accept_peerings); -+ SET_MESH_CONF_ELE_MCCA_SUP(conf, mcca_sup); -+ SET_MESH_CONF_ELE_MCCA_EN(conf, mcca_en); -+ SET_MESH_CONF_ELE_FORWARDING(conf, forwarding); -+ SET_MESH_CONF_ELE_MBCA_EN(conf, mbca_en); -+ SET_MESH_CONF_ELE_TBTT_ADJ(conf, tbtt_adj); -+ SET_MESH_CONF_ELE_PS_LEVEL(conf, ps_level); -+ -+ return rtw_set_ie(buf, WLAN_EID_MESH_CONFIG, 7, conf, buf_len); -+} -+ -+inline u8 *rtw_set_ie_mpm(u8 *buf, u32 *buf_len -+ , u8 proto_id, u16 llid, u16 *plid, u16 *reason, u8 *chosen_pmk) -+{ -+ u8 data[24] = {0}; -+ u8 *pos = data; -+ -+ RTW_PUT_LE16(pos, proto_id); -+ pos += 2; -+ -+ RTW_PUT_LE16(pos, llid); -+ pos += 2; -+ -+ if (plid) { -+ RTW_PUT_LE16(pos, *plid); -+ pos += 2; -+ } -+ -+ if (reason) { -+ RTW_PUT_LE16(pos, *reason); -+ pos += 2; -+ } -+ -+ if (chosen_pmk) { -+ _rtw_memcpy(pos, chosen_pmk, 16); -+ pos += 16; -+ } -+ -+ return rtw_set_ie(buf, WLAN_EID_MPM, pos - data, data, buf_len); -+} -+ -+bool rtw_bss_is_forwarding(WLAN_BSSID_EX *bss) -+{ -+ u8 *ie; -+ int ie_len; -+ bool ret = 0; -+ -+ ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len, -+ BSS_EX_TLV_IES_LEN(bss)); -+ if (!ie || ie_len != 7) -+ goto exit; -+ -+ ret = GET_MESH_CONF_ELE_FORWARDING(ie + 2); -+ -+exit: -+ return ret; -+} -+ -+bool rtw_bss_is_cto_mgate(WLAN_BSSID_EX *bss) -+{ -+ u8 *ie; -+ int ie_len; -+ bool ret = 0; -+ -+ ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len, -+ BSS_EX_TLV_IES_LEN(bss)); -+ if (!ie || ie_len != 7) -+ goto exit; -+ -+ ret = GET_MESH_CONF_ELE_CTO_MGATE(ie + 2); -+ -+exit: -+ return ret; -+} -+ -+int _rtw_bss_is_same_mbss(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b, u8 **a_mconf_ie_r, u8 **b_mconf_ie_r) -+{ -+ int ret = 0; -+ u8 *a_mconf_ie, *b_mconf_ie; -+ sint a_mconf_ie_len, b_mconf_ie_len; -+ -+ if (a->InfrastructureMode != Ndis802_11_mesh) -+ goto exit; -+ a_mconf_ie = rtw_get_ie(BSS_EX_TLV_IES(a), WLAN_EID_MESH_CONFIG, &a_mconf_ie_len, BSS_EX_TLV_IES_LEN(a)); -+ if (!a_mconf_ie || a_mconf_ie_len != 7) -+ goto exit; -+ if (a_mconf_ie_r) -+ *a_mconf_ie_r = a_mconf_ie; -+ -+ if (b->InfrastructureMode != Ndis802_11_mesh) -+ goto exit; -+ b_mconf_ie = rtw_get_ie(BSS_EX_TLV_IES(b), WLAN_EID_MESH_CONFIG, &b_mconf_ie_len, BSS_EX_TLV_IES_LEN(b)); -+ if (!b_mconf_ie || b_mconf_ie_len != 7) -+ goto exit; -+ if (b_mconf_ie_r) -+ *b_mconf_ie_r = b_mconf_ie; -+ -+ if (a->mesh_id.SsidLength != b->mesh_id.SsidLength -+ || _rtw_memcmp(a->mesh_id.Ssid, b->mesh_id.Ssid, a->mesh_id.SsidLength) == _FALSE) -+ goto exit; -+ -+ if (_rtw_memcmp(a_mconf_ie + 2, b_mconf_ie + 2, 5) == _FALSE) -+ goto exit; -+ -+ ret = 1; -+ -+exit: -+ return ret; -+} -+ -+int rtw_bss_is_same_mbss(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b) -+{ -+ return _rtw_bss_is_same_mbss(a, b, NULL, NULL); -+} -+ -+int rtw_bss_is_candidate_mesh_peer(_adapter *adapter, WLAN_BSSID_EX *target, u8 ch, u8 add_peer) -+{ -+ int ret = 0; -+ WLAN_BSSID_EX *self = &adapter->mlmepriv.cur_network.network; -+ u8 *s_mconf_ie, *t_mconf_ie; -+ u8 auth_pid; -+ int i, j; -+ -+ if (ch && self->Configuration.DSConfig != target->Configuration.DSConfig) -+ goto exit; -+ -+ if (!_rtw_bss_is_same_mbss(self, target, &s_mconf_ie, &t_mconf_ie)) -+ goto exit; -+ -+ if (add_peer) { -+ /* Accept additional mesh peerings */ -+ if (GET_MESH_CONF_ELE_ACCEPT_PEERINGS(t_mconf_ie + 2) == 0) -+ goto exit; -+ } -+ -+ /* BSSBasicRateSet */ -+ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { -+ if (target->SupportedRates[i] == 0) -+ break; -+ if (target->SupportedRates[i] & 0x80) { -+ u8 match = 0; -+ -+ if (!ch) { -+ /* off-channel, check target with our hardcode capability */ -+ if (target->Configuration.DSConfig > 14) -+ match = rtw_is_basic_rate_ofdm(target->SupportedRates[i]); -+ else -+ match = rtw_is_basic_rate_mix(target->SupportedRates[i]); -+ } else { -+ for (j = 0; j < NDIS_802_11_LENGTH_RATES_EX; j++) { -+ if (self->SupportedRates[j] == 0) -+ break; -+ if (self->SupportedRates[j] == target->SupportedRates[i]) { -+ match = 1; -+ break; -+ } -+ } -+ } -+ if (!match) -+ goto exit; -+ } -+ } -+ -+ /* BSSBasicMCSSet */ -+ -+ -+ auth_pid = GET_MESH_CONF_ELE_AUTH_PROTO_ID(s_mconf_ie + 2); -+ if (auth_pid && auth_pid <= 2) { -+ struct security_priv *sec = &adapter->securitypriv; -+ u8 *rsn_ie; -+ int rsn_ie_len; -+ int group_cipher = 0, pairwise_cipher = 0, gmcs = 0; -+ u8 mfp_opt = MFP_NO; -+ -+ /* 802.1X connected to AS ? */ -+ -+ /* RSN */ -+ rsn_ie = rtw_get_wpa2_ie(BSS_EX_TLV_IES(target), &rsn_ie_len, BSS_EX_TLV_IES_LEN(target)); -+ if (!rsn_ie || rsn_ie_len == 0) -+ goto exit; -+ if (rtw_parse_wpa2_ie(rsn_ie, rsn_ie_len + 2, &group_cipher, &pairwise_cipher, &gmcs, NULL, &mfp_opt) != _SUCCESS) -+ goto exit; -+ if ((sec->mfp_opt == MFP_REQUIRED && mfp_opt < MFP_OPTIONAL) -+ || (mfp_opt == MFP_REQUIRED && sec->mfp_opt < MFP_OPTIONAL)) -+ goto exit; -+ if (!(sec->wpa2_group_cipher & group_cipher)) -+ goto exit; -+ if (!(sec->wpa2_pairwise_cipher & pairwise_cipher)) -+ goto exit; -+ #ifdef CONFIG_IEEE80211W -+ if ((sec->mfp_opt >= MFP_OPTIONAL && mfp_opt >= MFP_OPTIONAL) -+ && security_type_bip_to_gmcs(sec->dot11wCipher) != gmcs) -+ goto exit; -+ #endif -+ } -+ -+ ret = 1; -+ -+exit: -+ return ret; -+} -+ -+void rtw_mesh_bss_peering_status(WLAN_BSSID_EX *bss, u8 *nop, u8 *accept) -+{ -+ u8 *ie; -+ int ie_len; -+ -+ if (nop) -+ *nop = 0; -+ if (accept) -+ *accept = 0; -+ -+ ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len, -+ BSS_EX_TLV_IES_LEN(bss)); -+ if (!ie || ie_len != 7) -+ goto exit; -+ -+ if (nop) -+ *nop = GET_MESH_CONF_ELE_NUM_OF_PEERINGS(ie + 2); -+ if (accept) -+ *accept = GET_MESH_CONF_ELE_ACCEPT_PEERINGS(ie + 2); -+ -+exit: -+ return; -+} -+ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+void rtw_mesh_update_scanned_acnode_status(_adapter *adapter, struct wlan_network *scanned) -+{ -+ bool acnode; -+ u8 nop, accept; -+ -+ rtw_mesh_bss_peering_status(&scanned->network, &nop, &accept); -+ -+ acnode = !nop && accept; -+ -+ if (acnode && scanned->acnode_stime == 0) { -+ scanned->acnode_stime = rtw_get_current_time(); -+ if (scanned->acnode_stime == 0) -+ scanned->acnode_stime++; -+ } else if (!acnode) { -+ scanned->acnode_stime = 0; -+ scanned->acnode_notify_etime = 0; -+ } -+} -+ -+bool rtw_mesh_scanned_is_acnode_confirmed(_adapter *adapter, struct wlan_network *scanned) -+{ -+ return scanned->acnode_stime -+ && rtw_get_passing_time_ms(scanned->acnode_stime) -+ > adapter->mesh_cfg.peer_sel_policy.acnode_conf_timeout_ms; -+} -+ -+static bool rtw_mesh_scanned_is_acnode_allow_notify(_adapter *adapter, struct wlan_network *scanned) -+{ -+ return scanned->acnode_notify_etime -+ && rtw_time_after(scanned->acnode_notify_etime, rtw_get_current_time()); -+} -+ -+bool rtw_mesh_acnode_prevent_allow_sacrifice(_adapter *adapter) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct sta_priv *stapriv = &adapter->stapriv; -+ bool allow = 0; -+ -+ if (!mcfg->peer_sel_policy.acnode_prevent -+ || mcfg->max_peer_links <= 1 -+ || stapriv->asoc_list_cnt < mcfg->max_peer_links) -+ goto exit; -+ -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ if (rtw_mesh_cto_mgate_required(adapter)) -+ goto exit; -+#endif -+ -+ allow = 1; -+ -+exit: -+ return allow; -+} -+ -+static bool rtw_mesh_acnode_candidate_exist(_adapter *adapter) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ _queue *queue = &(mlme->scanned_queue); -+ _list *head, *list; -+ _irqL irqL; -+ struct wlan_network *scanned = NULL; -+ struct sta_info *sta = NULL; -+ bool need = 0; -+ -+ _enter_critical_bh(&(mlme->scanned_queue.lock), &irqL); -+ -+ head = get_list_head(queue); -+ list = get_next(head); -+ while (!rtw_end_of_queue_search(head, list)) { -+ scanned = LIST_CONTAINOR(list, struct wlan_network, list); -+ list = get_next(list); -+ -+ if (rtw_get_passing_time_ms(scanned->last_scanned) < mcfg->peer_sel_policy.scanr_exp_ms -+ && rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned) -+ && (!mcfg->rssi_threshold || mcfg->rssi_threshold <= scanned->network.Rssi) -+ #if CONFIG_RTW_MACADDR_ACL -+ && rtw_access_ctrl(adapter, scanned->network.MacAddress) == _TRUE -+ #endif -+ && rtw_bss_is_candidate_mesh_peer(adapter, &scanned->network, 1, 1) -+ #if CONFIG_RTW_MESH_PEER_BLACKLIST -+ && !rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress) -+ #endif -+ #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ && rtw_mesh_cto_mgate_network_filter(adapter, scanned) -+ #endif -+ ) { -+ need = 1; -+ break; -+ } -+ } -+ -+ _exit_critical_bh(&(mlme->scanned_queue.lock), &irqL); -+ -+ return need; -+} -+ -+static int rtw_mesh_acnode_prevent_sacrifice_chk(_adapter *adapter, struct sta_info **sac, struct sta_info *com) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ int updated = 0; -+ -+ /* -+ * TODO: compare next_hop reference cnt of forwarding info -+ * don't sacrifice working next_hop or choose sta with least cnt -+ */ -+ -+ if (*sac == NULL) { -+ updated = 1; -+ goto exit; -+ } -+ -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ if (mcfg->peer_sel_policy.cto_mgate_require -+ && !mcfg->dot11MeshGateAnnouncementProtocol -+ ) { -+ if (IS_CTO_MGATE_CONF_TIMEOUT(com->plink)) { -+ if (!IS_CTO_MGATE_CONF_TIMEOUT((*sac)->plink)) { -+ /* blacklist > not blacklist */ -+ updated = 1; -+ goto exit; -+ } -+ } else if (!IS_CTO_MGATE_CONF_DISABLED(com->plink)) { -+ if (IS_CTO_MGATE_CONF_DISABLED((*sac)->plink)) { -+ /* confirming > disabled */ -+ updated = 1; -+ goto exit; -+ } -+ } -+ } -+#endif -+ -+exit: -+ if (updated) -+ *sac = com; -+ -+ return updated; -+} -+ -+struct sta_info *_rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ _list *head, *list; -+ struct sta_info *sta, *sacrifice = NULL; -+ u8 nop; -+ -+ head = &stapriv->asoc_list; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ sta = LIST_CONTAINOR(list, struct sta_info, asoc_list); -+ list = get_next(list); -+ -+ if (!sta->plink || !sta->plink->scanned) { -+ rtw_warn_on(1); -+ continue; -+ } -+ -+ rtw_mesh_bss_peering_status(&sta->plink->scanned->network, &nop, NULL); -+ if (nop < 2) -+ continue; -+ -+ rtw_mesh_acnode_prevent_sacrifice_chk(adapter, &sacrifice, sta); -+ } -+ -+ return sacrifice; -+} -+ -+struct sta_info *rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct sta_info *sacrifice = NULL; -+ -+ enter_critical_bh(&stapriv->asoc_list_lock); -+ -+ sacrifice = _rtw_mesh_acnode_prevent_pick_sacrifice(adapter); -+ -+ exit_critical_bh(&stapriv->asoc_list_lock); -+ -+ return sacrifice; -+} -+ -+static void rtw_mesh_acnode_rsvd_chk(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ u8 acnode_rsvd = 0; -+ -+ if (rtw_mesh_acnode_prevent_allow_sacrifice(adapter) -+ && rtw_mesh_acnode_prevent_pick_sacrifice(adapter) -+ && rtw_mesh_acnode_candidate_exist(adapter)) -+ acnode_rsvd = 1; -+ -+ if (plink_ctl->acnode_rsvd != acnode_rsvd) { -+ plink_ctl->acnode_rsvd = acnode_rsvd; -+ RTW_INFO(FUNC_ADPT_FMT" acnode_rsvd = %d\n", FUNC_ADPT_ARG(adapter), plink_ctl->acnode_rsvd); -+ update_beacon(adapter, WLAN_EID_MESH_CONFIG, NULL, 1, 0); -+ } -+} -+ -+static void rtw_mesh_acnode_set_notify_etime(_adapter *adapter, u8 *rframe_whdr) -+{ -+ if (adapter->mesh_info.plink_ctl.acnode_rsvd) { -+ struct wlan_network *scanned = rtw_find_network(&adapter->mlmepriv.scanned_queue, get_addr2_ptr(rframe_whdr)); -+ -+ if (rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned)) { -+ scanned->acnode_notify_etime = rtw_get_current_time() -+ + rtw_ms_to_systime(adapter->mesh_cfg.peer_sel_policy.acnode_notify_timeout_ms); -+ if (scanned->acnode_notify_etime == 0) -+ scanned->acnode_notify_etime++; -+ } -+ } -+} -+ -+void dump_mesh_acnode_prevent_settings(void *sel, _adapter *adapter) -+{ -+ struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -+ -+ RTW_PRINT_SEL(sel, "%-6s %-12s %-14s\n" -+ , "enable", "conf_timeout", "nofity_timeout"); -+ RTW_PRINT_SEL(sel, "%6u %12u %14u\n" -+ , peer_sel_policy->acnode_prevent -+ , peer_sel_policy->acnode_conf_timeout_ms -+ , peer_sel_policy->acnode_notify_timeout_ms); -+} -+#endif /* CONFIG_RTW_MESH_ACNODE_PREVENT */ -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+int rtw_mesh_peer_blacklist_add(_adapter *adapter, const u8 *addr) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ return rtw_blacklist_add(&plink_ctl->peer_blacklist, addr -+ , mcfg->peer_sel_policy.peer_blacklist_timeout_ms); -+} -+ -+int rtw_mesh_peer_blacklist_del(_adapter *adapter, const u8 *addr) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ return rtw_blacklist_del(&plink_ctl->peer_blacklist, addr); -+} -+ -+int rtw_mesh_peer_blacklist_search(_adapter *adapter, const u8 *addr) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ return rtw_blacklist_search(&plink_ctl->peer_blacklist, addr); -+} -+ -+void rtw_mesh_peer_blacklist_flush(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ rtw_blacklist_flush(&plink_ctl->peer_blacklist); -+} -+ -+void dump_mesh_peer_blacklist(void *sel, _adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ dump_blacklist(sel, &plink_ctl->peer_blacklist, "blacklist"); -+} -+ -+void dump_mesh_peer_blacklist_settings(void *sel, _adapter *adapter) -+{ -+ struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -+ -+ RTW_PRINT_SEL(sel, "%-12s %-17s\n" -+ , "conf_timeout", "blacklist_timeout"); -+ RTW_PRINT_SEL(sel, "%12u %17u\n" -+ , peer_sel_policy->peer_conf_timeout_ms -+ , peer_sel_policy->peer_blacklist_timeout_ms); -+} -+#endif /* CONFIG_RTW_MESH_PEER_BLACKLIST */ -+ -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+u8 rtw_mesh_cto_mgate_required(_adapter *adapter) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ -+ return mcfg->peer_sel_policy.cto_mgate_require -+ && !rtw_bss_is_cto_mgate(&(mlmeext->mlmext_info.network)); -+} -+ -+u8 rtw_mesh_cto_mgate_network_filter(_adapter *adapter, struct wlan_network *scanned) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ -+ return !rtw_mesh_cto_mgate_required(adapter) -+ || (rtw_bss_is_cto_mgate(&scanned->network) -+ && !rtw_mesh_cto_mgate_blacklist_search(adapter, scanned->network.MacAddress)); -+} -+ -+int rtw_mesh_cto_mgate_blacklist_add(_adapter *adapter, const u8 *addr) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ return rtw_blacklist_add(&plink_ctl->cto_mgate_blacklist, addr -+ , mcfg->peer_sel_policy.cto_mgate_blacklist_timeout_ms); -+} -+ -+int rtw_mesh_cto_mgate_blacklist_del(_adapter *adapter, const u8 *addr) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ return rtw_blacklist_del(&plink_ctl->cto_mgate_blacklist, addr); -+} -+ -+int rtw_mesh_cto_mgate_blacklist_search(_adapter *adapter, const u8 *addr) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ return rtw_blacklist_search(&plink_ctl->cto_mgate_blacklist, addr); -+} -+ -+void rtw_mesh_cto_mgate_blacklist_flush(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ rtw_blacklist_flush(&plink_ctl->cto_mgate_blacklist); -+} -+ -+void dump_mesh_cto_mgate_blacklist(void *sel, _adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ dump_blacklist(sel, &plink_ctl->cto_mgate_blacklist, "blacklist"); -+} -+ -+void dump_mesh_cto_mgate_blacklist_settings(void *sel, _adapter *adapter) -+{ -+ struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -+ -+ RTW_PRINT_SEL(sel, "%-12s %-17s\n" -+ , "conf_timeout", "blacklist_timeout"); -+ RTW_PRINT_SEL(sel, "%12u %17u\n" -+ , peer_sel_policy->cto_mgate_conf_timeout_ms -+ , peer_sel_policy->cto_mgate_blacklist_timeout_ms); -+} -+ -+static void rtw_mesh_cto_mgate_blacklist_chk(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ _queue *blist = &plink_ctl->cto_mgate_blacklist; -+ _list *list, *head; -+ struct blacklist_ent *ent = NULL; -+ struct wlan_network *scanned = NULL; -+ -+ enter_critical_bh(&blist->lock); -+ head = &blist->queue; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ ent = LIST_CONTAINOR(list, struct blacklist_ent, list); -+ list = get_next(list); -+ -+ if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) { -+ rtw_list_delete(&ent->list); -+ rtw_mfree(ent, sizeof(struct blacklist_ent)); -+ continue; -+ } -+ -+ scanned = rtw_find_network(&adapter->mlmepriv.scanned_queue, ent->addr); -+ if (!scanned) -+ continue; -+ -+ if (rtw_bss_is_forwarding(&scanned->network)) { -+ rtw_list_delete(&ent->list); -+ rtw_mfree(ent, sizeof(struct blacklist_ent)); -+ } -+ } -+ -+ exit_critical_bh(&blist->lock); -+} -+#endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */ -+ -+void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scanned) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ bool acnode = 0; -+ -+ if (IS_CH_WAITING(rfctl) && !IS_UNDER_CAC(rfctl)) -+ goto exit; -+ -+ if (plink_ctl->num >= RTW_MESH_MAX_PEER_CANDIDATES) -+ goto exit; -+ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+ if (plink_ctl->acnode_rsvd) { -+ acnode = rtw_mesh_scanned_is_acnode_confirmed(adapter, scanned); -+ if (acnode && !rtw_mesh_scanned_is_acnode_allow_notify(adapter, scanned)) -+ goto exit; -+ } -+#endif -+ -+ /* wpa_supplicant's auto peer will initiate peering when candidate peer is reported without max_peer_links consideration */ -+ if (plink_ctl->num >= mcfg->max_peer_links + acnode ? 1 : 0) -+ goto exit; -+ -+ if (rtw_get_passing_time_ms(scanned->last_scanned) >= mcfg->peer_sel_policy.scanr_exp_ms -+ || (mcfg->rssi_threshold && mcfg->rssi_threshold > scanned->network.Rssi) -+ || !rtw_bss_is_candidate_mesh_peer(adapter, &scanned->network, 1, 1) -+ #if CONFIG_RTW_MACADDR_ACL -+ || rtw_access_ctrl(adapter, scanned->network.MacAddress) == _FALSE -+ #endif -+ || rtw_mesh_plink_get(adapter, scanned->network.MacAddress) -+ #if CONFIG_RTW_MESH_PEER_BLACKLIST -+ || rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress) -+ #endif -+ #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ || !rtw_mesh_cto_mgate_network_filter(adapter, scanned) -+ #endif -+ ) -+ goto exit; -+ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+ if (acnode) { -+ scanned->acnode_notify_etime = 0; -+ RTW_INFO(FUNC_ADPT_FMT" acnode "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(scanned->network.MacAddress)); -+ } -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_notify_new_peer_candidate(adapter->rtw_wdev -+ , scanned->network.MacAddress -+ , BSS_EX_TLV_IES(&scanned->network) -+ , BSS_EX_TLV_IES_LEN(&scanned->network) -+ , scanned->network.Rssi -+ , GFP_ATOMIC -+ ); -+#endif -+ -+exit: -+ return; -+} -+ -+void rtw_mesh_peer_status_chk(_adapter *adapter) -+{ -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *plink; -+ _list *head, *list; -+ struct sta_info *sta = NULL; -+ struct sta_priv *stapriv = &adapter->stapriv; -+ int stainfo_offset; -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ u8 cto_mgate, forwarding, mgate; -+#endif -+ u8 flush; -+ s8 flush_list[NUM_STA]; -+ u8 flush_num = 0; -+ int i; -+ -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ if (rtw_mesh_cto_mgate_required(adapter)) { -+ /* active scan on operating channel */ -+ issue_probereq_ex(adapter, &adapter->mlmepriv.cur_network.network.mesh_id, NULL, 0, 0, 0, 0); -+ } -+#endif -+ -+ enter_critical_bh(&(plink_ctl->lock)); -+ -+ /* check established peers */ -+ enter_critical_bh(&stapriv->asoc_list_lock); -+ -+ head = &stapriv->asoc_list; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ sta = LIST_CONTAINOR(list, struct sta_info, asoc_list); -+ list = get_next(list); -+ -+ if (!sta->plink || !sta->plink->scanned) { -+ rtw_warn_on(1); -+ continue; -+ } -+ plink = sta->plink; -+ flush = 0; -+ -+ /* remove unsuitable peer */ -+ if (!rtw_bss_is_candidate_mesh_peer(adapter, &plink->scanned->network, 1, 0) -+ #if CONFIG_RTW_MACADDR_ACL -+ || rtw_access_ctrl(adapter, plink->addr) == _FALSE -+ #endif -+ ) { -+ flush = 1; -+ goto flush_add; -+ } -+ -+ #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ cto_mgate = rtw_bss_is_cto_mgate(&(plink->scanned->network)); -+ forwarding = rtw_bss_is_forwarding(&(plink->scanned->network)); -+ mgate = rtw_mesh_gate_search(minfo->mesh_paths, sta->cmn.mac_addr); -+ -+ /* CTO_MGATE required, remove peer without CTO_MGATE */ -+ if (rtw_mesh_cto_mgate_required(adapter) && !cto_mgate) { -+ flush = 1; -+ goto flush_add; -+ } -+ -+ /* cto_mgate_conf status update */ -+ if (IS_CTO_MGATE_CONF_DISABLED(plink)) { -+ if (cto_mgate && !forwarding && !mgate) -+ SET_CTO_MGATE_CONF_END_TIME(plink, mcfg->peer_sel_policy.cto_mgate_conf_timeout_ms); -+ else -+ rtw_mesh_cto_mgate_blacklist_del(adapter, sta->cmn.mac_addr); -+ } else { -+ /* cto_mgate_conf ongoing */ -+ if (cto_mgate && !forwarding && !mgate) { -+ if (IS_CTO_MGATE_CONF_TIMEOUT(plink)) { -+ rtw_mesh_cto_mgate_blacklist_add(adapter, sta->cmn.mac_addr); -+ -+ /* CTO_MGATE required, remove peering can't achieve CTO_MGATE */ -+ if (rtw_mesh_cto_mgate_required(adapter)) { -+ flush = 1; -+ goto flush_add; -+ } -+ } -+ } else { -+ SET_CTO_MGATE_CONF_DISABLED(plink); -+ rtw_mesh_cto_mgate_blacklist_del(adapter, sta->cmn.mac_addr); -+ } -+ } -+ #endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */ -+ -+flush_add: -+ if (flush) { -+ rtw_list_delete(&sta->asoc_list); -+ stapriv->asoc_list_cnt--; -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (sta->tbtx_enable) -+ stapriv->tbtx_asoc_list_cnt--; -+#endif -+ STA_SET_MESH_PLINK(sta, NULL); -+ -+ stainfo_offset = rtw_stainfo_offset(stapriv, sta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ flush_list[flush_num++] = stainfo_offset; -+ else -+ rtw_warn_on(1); -+ } -+ } -+ -+ exit_critical_bh(&stapriv->asoc_list_lock); -+ -+ /* check non-established peers */ -+ for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) { -+ plink = &plink_ctl->ent[i]; -+ if (plink->valid != _TRUE || plink->plink_state == RTW_MESH_PLINK_ESTAB) -+ continue; -+ -+ /* remove unsuitable peer */ -+ if (!rtw_bss_is_candidate_mesh_peer(adapter, &plink->scanned->network, 1, 1) -+ #if CONFIG_RTW_MACADDR_ACL -+ || rtw_access_ctrl(adapter, plink->addr) == _FALSE -+ #endif -+ ) { -+ _rtw_mesh_expire_peer_ent(adapter, plink); -+ continue; -+ } -+ -+ #if CONFIG_RTW_MESH_PEER_BLACKLIST -+ /* peer confirm check timeout, add to black list */ -+ if (IS_PEER_CONF_TIMEOUT(plink)) { -+ rtw_mesh_peer_blacklist_add(adapter, plink->addr); -+ _rtw_mesh_expire_peer_ent(adapter, plink); -+ } -+ #endif -+ } -+ -+ exit_critical_bh(&(plink_ctl->lock)); -+ -+ if (flush_num) { -+ u8 sta_addr[ETH_ALEN]; -+ u8 updated = _FALSE; -+ -+ for (i = 0; i < flush_num; i++) { -+ sta = rtw_get_stainfo_by_offset(stapriv, flush_list[i]); -+ _rtw_memcpy(sta_addr, sta->cmn.mac_addr, ETH_ALEN); -+ -+ updated |= ap_free_sta(adapter, sta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _FALSE); -+ rtw_mesh_expire_peer(adapter, sta_addr); -+ } -+ -+ associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL); -+ } -+ -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ /* loop cto_mgate_blacklist to remove ent according to scan_r */ -+ rtw_mesh_cto_mgate_blacklist_chk(adapter); -+#endif -+ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+ rtw_mesh_acnode_rsvd_chk(adapter); -+#endif -+ -+ return; -+} -+ -+#if CONFIG_RTW_MESH_OFFCH_CAND -+static u8 rtw_mesh_offch_cto_mgate_required(_adapter *adapter) -+{ -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ _queue *queue = &(mlme->scanned_queue); -+ _list *head, *pos; -+ struct wlan_network *scanned = NULL; -+ u8 ret = 0; -+ -+ if (!rtw_mesh_cto_mgate_required(adapter)) -+ goto exit; -+ -+ enter_critical_bh(&(mlme->scanned_queue.lock)); -+ -+ head = get_list_head(queue); -+ pos = get_next(head); -+ while (!rtw_end_of_queue_search(head, pos)) { -+ scanned = LIST_CONTAINOR(pos, struct wlan_network, list); -+ -+ if (rtw_get_passing_time_ms(scanned->last_scanned) < mcfg->peer_sel_policy.scanr_exp_ms -+ && (!mcfg->rssi_threshold || mcfg->rssi_threshold <= scanned->network.Rssi) -+ #if CONFIG_RTW_MACADDR_ACL -+ && rtw_access_ctrl(adapter, scanned->network.MacAddress) == _TRUE -+ #endif -+ && rtw_bss_is_candidate_mesh_peer(adapter, &scanned->network, 1, 1) -+ && rtw_bss_is_cto_mgate(&scanned->network) -+ #if CONFIG_RTW_MESH_PEER_BLACKLIST -+ && !rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress) -+ #endif -+ && !rtw_mesh_cto_mgate_blacklist_search(adapter, scanned->network.MacAddress) -+ ) -+ break; -+ -+ pos = get_next(pos); -+ } -+ -+ if (rtw_end_of_queue_search(head, pos)) -+ ret = 1; -+ -+ exit_critical_bh(&(mlme->scanned_queue.lock)); -+ -+exit: -+ return ret; -+#else -+ return 0; -+#endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */ -+} -+ -+u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ u8 ret = 0; -+ -+ if (!adapter->mesh_cfg.peer_sel_policy.offch_cand) -+ goto exit; -+ -+ ret = MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter) -+ && (!plink_ctl->num || rtw_mesh_offch_cto_mgate_required(adapter)) -+ ; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (ret) { -+ struct mi_state mstate_no_self; -+ -+ rtw_mi_status_no_self(adapter, &mstate_no_self); -+ if (MSTATE_STA_LD_NUM(&mstate_no_self)) -+ ret = 0; -+ } -+#endif -+ -+exit: -+ return ret; -+} -+ -+/* -+ * this function is called under off channel candidate is required -+ * the channel with maximum candidate count is selected -+*/ -+u8 rtw_mesh_select_operating_ch(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ _queue *queue = &(mlme->scanned_queue); -+ _list *head, *pos; -+ _irqL irqL; -+ struct wlan_network *scanned = NULL; -+ int i; -+ /* statistics for candidate accept peering */ -+ u8 cand_ap_cnt[MAX_CHANNEL_NUM] = {0}; -+ u8 max_cand_ap_ch = 0; -+ u8 max_cand_ap_cnt = 0; -+ /* statistics for candidate including not accept peering */ -+ u8 cand_cnt[MAX_CHANNEL_NUM] = {0}; -+ u8 max_cand_ch = 0; -+ u8 max_cand_cnt = 0; -+ -+ _enter_critical_bh(&(mlme->scanned_queue.lock), &irqL); -+ -+ head = get_list_head(queue); -+ pos = get_next(head); -+ while (!rtw_end_of_queue_search(head, pos)) { -+ scanned = LIST_CONTAINOR(pos, struct wlan_network, list); -+ pos = get_next(pos); -+ -+ if (rtw_get_passing_time_ms(scanned->last_scanned) < mcfg->peer_sel_policy.scanr_exp_ms -+ && (!mcfg->rssi_threshold || mcfg->rssi_threshold <= scanned->network.Rssi) -+ #if CONFIG_RTW_MACADDR_ACL -+ && rtw_access_ctrl(adapter, scanned->network.MacAddress) == _TRUE -+ #endif -+ && rtw_bss_is_candidate_mesh_peer(adapter, &scanned->network, 0, 0) -+ #if CONFIG_RTW_MESH_PEER_BLACKLIST -+ && !rtw_mesh_peer_blacklist_search(adapter, scanned->network.MacAddress) -+ #endif -+ #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ && rtw_mesh_cto_mgate_network_filter(adapter, scanned) -+ #endif -+ ) { -+ int ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, scanned->network.Configuration.DSConfig); -+ -+ if (ch_set_idx >= 0 -+ && !(rfctl->channel_set[ch_set_idx].flags & RTW_CHF_NO_IR) -+ && !CH_IS_NON_OCP(&rfctl->channel_set[ch_set_idx]) -+ ) { -+ u8 nop, accept; -+ -+ rtw_mesh_bss_peering_status(&scanned->network, &nop, &accept); -+ cand_cnt[ch_set_idx]++; -+ if (max_cand_cnt < cand_cnt[ch_set_idx]) { -+ max_cand_cnt = cand_cnt[ch_set_idx]; -+ max_cand_ch = rfctl->channel_set[ch_set_idx].ChannelNum; -+ } -+ if (accept) { -+ cand_ap_cnt[ch_set_idx]++; -+ if (max_cand_ap_cnt < cand_ap_cnt[ch_set_idx]) { -+ max_cand_ap_cnt = cand_ap_cnt[ch_set_idx]; -+ max_cand_ap_ch = rfctl->channel_set[ch_set_idx].ChannelNum; -+ } -+ } -+ } -+ } -+ } -+ -+ _exit_critical_bh(&(mlme->scanned_queue.lock), &irqL); -+ -+ return max_cand_ap_ch ? max_cand_ap_ch : max_cand_ch; -+} -+ -+void dump_mesh_offch_cand_settings(void *sel, _adapter *adapter) -+{ -+ struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -+ -+ RTW_PRINT_SEL(sel, "%-6s %-11s\n" -+ , "enable", "find_int_ms"); -+ RTW_PRINT_SEL(sel, "%6u %11u\n" -+ , peer_sel_policy->offch_cand, peer_sel_policy->offch_find_int_ms); -+} -+#endif /* CONFIG_RTW_MESH_OFFCH_CAND */ -+ -+void dump_mesh_peer_sel_policy(void *sel, _adapter *adapter) -+{ -+ struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -+ -+ RTW_PRINT_SEL(sel, "%-12s\n", "scanr_exp_ms"); -+ RTW_PRINT_SEL(sel, "%12u\n", peer_sel_policy->scanr_exp_ms); -+} -+ -+void dump_mesh_networks(void *sel, _adapter *adapter) -+{ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+#define NSTATE_TITLE_FMT_ACN " %-5s" -+#define NSTATE_VALUE_FMT_ACN " %5d" -+#define NSTATE_TITLE_ARG_ACN , "acn" -+#define NSTATE_VALUE_ARG_ACN , (acn_ms < 99999 ? acn_ms : 99999) -+#else -+#define NSTATE_TITLE_FMT_ACN "" -+#define NSTATE_VALUE_FMT_ACN "" -+#define NSTATE_TITLE_ARG_ACN -+#define NSTATE_VALUE_ARG_ACN -+#endif -+ -+ struct mlme_priv *mlme = &(adapter->mlmepriv); -+ _queue *queue = &(mlme->scanned_queue); -+ struct wlan_network *network; -+ _list *list, *head; -+ u8 same_mbss; -+ u8 candidate; -+ struct mesh_plink_ent *plink; -+ u8 blocked; -+ u8 established; -+ s32 age_ms; -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+ s32 acn_ms; -+#endif -+ u8 *mesh_conf_ie; -+ sint mesh_conf_ie_len; -+ u8 auth_pid; -+ u8 *rsn_ie; -+ int rsn_ie_len; -+ int gcs, pcs, gmcs; -+ u8 mfp_opt; -+ struct wlan_network **mesh_networks; -+ u8 mesh_network_cnt = 0; -+ int i; -+ -+ mesh_networks = rtw_zvmalloc(mlme->max_bss_cnt * sizeof(struct wlan_network *)); -+ if (!mesh_networks) -+ return; -+ -+ enter_critical_bh(&queue->lock); -+ head = get_list_head(queue); -+ list = get_next(head); -+ -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ network = LIST_CONTAINOR(list, struct wlan_network, list); -+ list = get_next(list); -+ -+ if (network->network.InfrastructureMode != Ndis802_11_mesh) -+ continue; -+ -+ mesh_conf_ie = rtw_get_ie(BSS_EX_TLV_IES(&network->network), WLAN_EID_MESH_CONFIG -+ , &mesh_conf_ie_len, BSS_EX_TLV_IES_LEN(&network->network)); -+ if (!mesh_conf_ie || mesh_conf_ie_len != 7) -+ continue; -+ -+ mesh_networks[mesh_network_cnt++] = network; -+ } -+ -+ exit_critical_bh(&queue->lock); -+ -+ RTW_PRINT_SEL(sel, " %-17s %-3s %-4s %-5s %-32s %-10s" -+ " %-3s %-3s %-4s" -+ " %-3s %-3s %-3s" -+ NSTATE_TITLE_FMT_ACN -+ "\n" -+ , "bssid", "ch", "rssi", "age", "mesh_id", "P M C S A " -+ , "pcs", "gcs", "gmcs" -+ , "nop", "fwd", "cto" -+ NSTATE_TITLE_ARG_ACN -+ ); -+ -+ if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)) { -+ network = &mlme->cur_network; -+ mesh_conf_ie = rtw_get_ie(BSS_EX_TLV_IES(&network->network), WLAN_EID_MESH_CONFIG -+ , &mesh_conf_ie_len, BSS_EX_TLV_IES_LEN(&network->network)); -+ if (mesh_conf_ie && mesh_conf_ie_len == 7) { -+ gcs = pcs = gmcs = 0; -+ mfp_opt = MFP_NO; -+ auth_pid = GET_MESH_CONF_ELE_AUTH_PROTO_ID(mesh_conf_ie + 2); -+ if (auth_pid && auth_pid <= 2) { -+ rsn_ie = rtw_get_wpa2_ie(BSS_EX_TLV_IES(&network->network) -+ , &rsn_ie_len, BSS_EX_TLV_IES_LEN(&network->network)); -+ if (rsn_ie && rsn_ie_len) -+ rtw_parse_wpa2_ie(rsn_ie, rsn_ie_len + 2, &gcs, &pcs, &gmcs, NULL, &mfp_opt); -+ } -+ RTW_PRINT_SEL(sel, "* "MAC_FMT" %3d %-32s %2x%2x%2x%2x%2x" -+ " %03x %03x %c%03x" -+ " %c%2u %3u %c%c " -+ "\n" -+ , MAC_ARG(network->network.MacAddress) -+ , network->network.Configuration.DSConfig -+ , network->network.mesh_id.Ssid -+ , GET_MESH_CONF_ELE_PATH_SEL_PROTO_ID(mesh_conf_ie + 2) -+ , GET_MESH_CONF_ELE_PATH_SEL_METRIC_ID(mesh_conf_ie + 2) -+ , GET_MESH_CONF_ELE_CONGEST_CTRL_MODE_ID(mesh_conf_ie + 2) -+ , GET_MESH_CONF_ELE_SYNC_METHOD_ID(mesh_conf_ie + 2) -+ , auth_pid -+ , pcs, gcs, mfp_opt == MFP_REQUIRED ? 'R' : (mfp_opt == MFP_OPTIONAL ? 'C' : ' ') -+ , mfp_opt >= MFP_OPTIONAL ? gmcs : 0 -+ , GET_MESH_CONF_ELE_ACCEPT_PEERINGS(mesh_conf_ie + 2) ? '+' : ' ' -+ , GET_MESH_CONF_ELE_NUM_OF_PEERINGS(mesh_conf_ie + 2) -+ , GET_MESH_CONF_ELE_FORWARDING(mesh_conf_ie + 2) -+ , GET_MESH_CONF_ELE_CTO_MGATE(mesh_conf_ie + 2) ? 'G' : ' ' -+ , GET_MESH_CONF_ELE_CTO_AS(mesh_conf_ie + 2) ? 'A' : ' ' -+ ); -+ } -+ } -+ -+ for (i = 0; i < mesh_network_cnt; i++) { -+ network = mesh_networks[i]; -+ -+ if (network->network.InfrastructureMode != Ndis802_11_mesh) -+ continue; -+ -+ mesh_conf_ie = rtw_get_ie(BSS_EX_TLV_IES(&network->network), WLAN_EID_MESH_CONFIG -+ , &mesh_conf_ie_len, BSS_EX_TLV_IES_LEN(&network->network)); -+ if (!mesh_conf_ie || mesh_conf_ie_len != 7) -+ continue; -+ -+ gcs = pcs = gmcs = 0; -+ mfp_opt = MFP_NO; -+ auth_pid = GET_MESH_CONF_ELE_AUTH_PROTO_ID(mesh_conf_ie + 2); -+ if (auth_pid && auth_pid <= 2) { -+ rsn_ie = rtw_get_wpa2_ie(BSS_EX_TLV_IES(&network->network), &rsn_ie_len, BSS_EX_TLV_IES_LEN(&network->network)); -+ if (rsn_ie && rsn_ie_len) -+ rtw_parse_wpa2_ie(rsn_ie, rsn_ie_len + 2, &gcs, &pcs, &gmcs, NULL, &mfp_opt); -+ } -+ age_ms = rtw_get_passing_time_ms(network->last_scanned); -+ #if CONFIG_RTW_MESH_ACNODE_PREVENT -+ if (network->acnode_stime == 0) -+ acn_ms = 0; -+ else -+ acn_ms = rtw_get_passing_time_ms(network->acnode_stime); -+ #endif -+ same_mbss = 0; -+ candidate = 0; -+ plink = NULL; -+ blocked = 0; -+ established = 0; -+ -+ if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)) { -+ plink = rtw_mesh_plink_get(adapter, network->network.MacAddress); -+ if (plink && plink->plink_state == RTW_MESH_PLINK_ESTAB) -+ established = 1; -+ else if (plink && plink->plink_state == RTW_MESH_PLINK_BLOCKED) -+ blocked = 1; -+ else if (plink) -+ ; -+ else if (rtw_bss_is_candidate_mesh_peer(adapter, &network->network, 0, 1)) -+ candidate = 1; -+ else if (rtw_bss_is_same_mbss(&mlme->cur_network.network, &network->network)) -+ same_mbss = 1; -+ } -+ -+ RTW_PRINT_SEL(sel, "%c "MAC_FMT" %3d %4ld %5d %-32s %2x%2x%2x%2x%2x" -+ " %03x %03x %c%03x" -+ " %c%2u %3u %c%c " -+ NSTATE_VALUE_FMT_ACN -+ "\n" -+ , established ? 'E' : (blocked ? 'B' : (plink ? 'N' : (candidate ? 'C' : (same_mbss ? 'S' : ' ')))) -+ , MAC_ARG(network->network.MacAddress) -+ , network->network.Configuration.DSConfig -+ , network->network.Rssi -+ , age_ms < 99999 ? age_ms : 99999 -+ , network->network.mesh_id.Ssid -+ , GET_MESH_CONF_ELE_PATH_SEL_PROTO_ID(mesh_conf_ie + 2) -+ , GET_MESH_CONF_ELE_PATH_SEL_METRIC_ID(mesh_conf_ie + 2) -+ , GET_MESH_CONF_ELE_CONGEST_CTRL_MODE_ID(mesh_conf_ie + 2) -+ , GET_MESH_CONF_ELE_SYNC_METHOD_ID(mesh_conf_ie + 2) -+ , auth_pid -+ , pcs, gcs, mfp_opt == MFP_REQUIRED ? 'R' : (mfp_opt == MFP_OPTIONAL ? 'C' : ' ') -+ , mfp_opt >= MFP_OPTIONAL ? gmcs : 0 -+ , GET_MESH_CONF_ELE_ACCEPT_PEERINGS(mesh_conf_ie + 2) ? '+' : ' ' -+ , GET_MESH_CONF_ELE_NUM_OF_PEERINGS(mesh_conf_ie + 2) -+ , GET_MESH_CONF_ELE_FORWARDING(mesh_conf_ie + 2) -+ , GET_MESH_CONF_ELE_CTO_MGATE(mesh_conf_ie + 2) ? 'G' : ' ' -+ , GET_MESH_CONF_ELE_CTO_AS(mesh_conf_ie + 2) ? 'A' : ' ' -+ NSTATE_VALUE_ARG_ACN -+ ); -+ } -+ -+ rtw_vmfree(mesh_networks, mlme->max_bss_cnt * sizeof(struct wlan_network *)); -+} -+ -+void rtw_mesh_adjust_chbw(u8 req_ch, u8 *req_bw, u8 *req_offset) -+{ -+ if (req_ch >= 5 && req_ch <= 9) { -+ /* prevent secondary channel offset mismatch */ -+ if (*req_bw > CHANNEL_WIDTH_20) { -+ *req_bw = CHANNEL_WIDTH_20; -+ *req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ } -+} -+ -+void rtw_mesh_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx, u16 alg, u16 seq, u16 status) -+{ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+ if (tx && seq == 1) -+ rtw_mesh_plink_set_peer_conf_timeout(adapter, GetAddr1Ptr(buf)); -+#endif -+} -+ -+#if CONFIG_RTW_MPM_TX_IES_SYNC_BSS -+#ifdef CONFIG_RTW_MESH_AEK -+static int rtw_mpm_ampe_dec(_adapter *adapter, struct mesh_plink_ent *plink -+ , u8 *fhead, size_t flen, u8* fbody, u8 *mic_ie, u8 *ampe_buf) -+{ -+ int ret = _FAIL, verify_ret; -+ const u8 *aad[] = {adapter_mac_addr(adapter), plink->addr, fbody}; -+ const size_t aad_len[] = {ETH_ALEN, ETH_ALEN, mic_ie - fbody}; -+ u8 *iv_crypt; -+ size_t iv_crypt_len = flen - (mic_ie + 2 - fhead); -+ -+ iv_crypt = rtw_malloc(iv_crypt_len); -+ if (!iv_crypt) -+ goto exit; -+ -+ _rtw_memcpy(iv_crypt, mic_ie + 2, iv_crypt_len); -+ -+ verify_ret = rtw_aes_siv_decrypt(plink->aek, 32, iv_crypt, iv_crypt_len -+ , 3, aad, aad_len, ampe_buf); -+ -+ rtw_mfree(iv_crypt, iv_crypt_len); -+ -+ if (verify_ret) { -+ RTW_WARN("verify error, aek_valid=%u\n", plink->aek_valid); -+ goto exit; -+ } else if (*ampe_buf != WLAN_EID_AMPE) { -+ RTW_WARN("plaintext is not AMPE IE\n"); -+ goto exit; -+ } else if ( 16 /* AES_BLOCK_SIZE*/ + 2 + *(ampe_buf + 1) > iv_crypt_len) { -+ RTW_WARN("plaintext AMPE IE length is not valid\n"); -+ goto exit; -+ } -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+static int rtw_mpm_ampe_enc(_adapter *adapter, struct mesh_plink_ent *plink -+ , u8* fbody, u8 *mic_ie, u8 *ampe_buf, bool inverse) -+{ -+ int ret = _FAIL, protect_ret; -+ const u8 *aad[3]; -+ const size_t aad_len[3] = {ETH_ALEN, ETH_ALEN, mic_ie - fbody}; -+ u8 *ampe_ie; -+ size_t ampe_ie_len = *(ampe_buf + 1) + 2; /* including id & len */ -+ -+ if (inverse) { -+ aad[0] = plink->addr; -+ aad[1] = adapter_mac_addr(adapter); -+ } else { -+ aad[0] = adapter_mac_addr(adapter); -+ aad[1] = plink->addr; -+ } -+ aad[2] = fbody; -+ -+ ampe_ie = rtw_malloc(ampe_ie_len); -+ if (!ampe_ie) -+ goto exit; -+ -+ _rtw_memcpy(ampe_ie, ampe_buf, ampe_ie_len); -+ -+ protect_ret = rtw_aes_siv_encrypt(plink->aek, 32, ampe_ie, ampe_ie_len -+ , 3, aad, aad_len, mic_ie + 2); -+ -+ rtw_mfree(ampe_ie, ampe_ie_len); -+ -+ if (protect_ret) { -+ RTW_WARN("protect error, aek_valid=%u\n", plink->aek_valid); -+ goto exit; -+ } -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_RTW_MESH_AEK */ -+ -+static int rtw_mpm_tx_ies_sync_bss(_adapter *adapter, struct mesh_plink_ent *plink -+ , u8 *fhead, size_t flen, u8* fbody, u8 tlv_ies_offset, u8 *mpm_ie, u8 *mic_ie -+ , u8 **nbuf, size_t *nlen) -+{ -+ int ret = _FAIL; -+ struct mlme_priv *mlme = &(adapter->mlmepriv); -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *mlmeinfo = &(mlmeext->mlmext_info); -+ WLAN_BSSID_EX *network = &(mlmeinfo->network); -+ uint left; -+ u8 *pos; -+ -+ uint mpm_ielen = *(mpm_ie + 1); -+ u8 *fpos; -+ u8 *new_buf = NULL; -+ size_t new_len = 0; -+ -+ u8 *new_fhead; -+ size_t new_flen; -+ u8 *new_fbody; -+ u8 *new_mic_ie; -+ -+#ifdef CONFIG_RTW_MESH_AEK -+ u8 *ampe_buf = NULL; -+ size_t ampe_buf_len = 0; -+ -+ /* decode */ -+ if (mic_ie) { -+ ampe_buf_len = flen - (mic_ie + 2 + 16 /* AES_BLOCK_SIZE */ - fhead); -+ ampe_buf = rtw_malloc(ampe_buf_len); -+ if (!ampe_buf) -+ goto exit; -+ -+ if (rtw_mpm_ampe_dec(adapter, plink, fhead, flen, fbody, mic_ie, ampe_buf) != _SUCCESS) -+ goto exit; -+ -+ if (*(ampe_buf + 1) >= 68) { -+ _rtw_memcpy(plink->sel_pcs, ampe_buf + 2, 4); -+ _rtw_memcpy(plink->l_nonce, ampe_buf + 6, 32); -+ _rtw_memcpy(plink->p_nonce, ampe_buf + 38, 32); -+ } -+ } -+#endif -+ -+ /* count for new frame length */ -+ new_len = sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset; -+ left = BSS_EX_TLV_IES_LEN(network); -+ pos = BSS_EX_TLV_IES(network); -+ while (left >= 2) { -+ u8 id, elen; -+ -+ id = *pos++; -+ elen = *pos++; -+ left -= 2; -+ -+ if (elen > left) -+ break; -+ -+ switch (id) { -+ case WLAN_EID_SSID: -+ case WLAN_EID_DS_PARAMS: -+ case WLAN_EID_TIM: -+ break; -+ default: -+ new_len += 2 + elen; -+ } -+ -+ left -= elen; -+ pos += elen; -+ } -+ new_len += mpm_ielen + 2; -+ if (mic_ie) -+ new_len += 16 /* AES_BLOCK_SIZE*/ + 2 + ampe_buf_len; -+ -+ /* alloc new frame */ -+ new_buf = rtw_malloc(new_len); -+ if (!new_buf) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ /* build new frame */ -+ _rtw_memcpy(new_buf, fhead, sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset); -+ new_fhead = new_buf; -+ new_flen = new_len; -+ new_fbody = new_fhead + sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ fpos = new_fbody + tlv_ies_offset; -+ left = BSS_EX_TLV_IES_LEN(network); -+ pos = BSS_EX_TLV_IES(network); -+ while (left >= 2) { -+ u8 id, elen; -+ -+ id = *pos++; -+ elen = *pos++; -+ left -= 2; -+ -+ if (elen > left) -+ break; -+ -+ switch (id) { -+ case WLAN_EID_SSID: -+ case WLAN_EID_DS_PARAMS: -+ case WLAN_EID_TIM: -+ break; -+ default: -+ fpos = rtw_set_ie(fpos, id, elen, pos, NULL); -+ if (id == WLAN_EID_MESH_CONFIG) -+ fpos = rtw_set_ie(fpos, WLAN_EID_MPM, mpm_ielen, mpm_ie + 2, NULL); -+ } -+ -+ left -= elen; -+ pos += elen; -+ } -+ if (mic_ie) { -+ new_mic_ie = fpos; -+ *fpos++ = WLAN_EID_MIC; -+ *fpos++ = 16 /* AES_BLOCK_SIZE */; -+ } -+ -+#ifdef CONFIG_RTW_MESH_AEK -+ /* encode */ -+ if (mic_ie) { -+ int enc_ret = rtw_mpm_ampe_enc(adapter, plink, new_fbody, new_mic_ie, ampe_buf, 0); -+ if (enc_ret != _SUCCESS) -+ goto exit; -+ } -+#endif -+ -+ *nlen = new_len; -+ *nbuf = new_buf; -+ -+ ret = _SUCCESS; -+ -+exit: -+ if (ret != _SUCCESS && new_buf) -+ rtw_mfree(new_buf, new_len); -+ -+#ifdef CONFIG_RTW_MESH_AEK -+ if (ampe_buf) -+ rtw_mfree(ampe_buf, ampe_buf_len); -+#endif -+ -+ return ret; -+} -+#endif /* CONFIG_RTW_MPM_TX_IES_SYNC_BSS */ -+ -+struct mpm_frame_info { -+ u8 *aid; -+ u16 aid_v; -+ u8 *pid; -+ u16 pid_v; -+ u8 *llid; -+ u16 llid_v; -+ u8 *plid; -+ u16 plid_v; -+ u8 *reason; -+ u16 reason_v; -+ u8 *chosen_pmk; -+}; -+ -+/* -+* pid:00000 llid:00000 chosen_pmk:0x00000000000000000000000000000000 -+* aid:00000 pid:00000 llid:00000 plid:00000 chosen_pmk:0x00000000000000000000000000000000 -+* pid:00000 llid:00000 plid:00000 reason:00000 chosen_pmk:0x00000000000000000000000000000000 -+*/ -+#define MPM_LOG_BUF_LEN 92 /* this length is limited for legal combination */ -+static void rtw_mpm_info_msg(struct mpm_frame_info *mpm_info, u8 *mpm_log_buf) -+{ -+ int cnt = 0; -+ -+ if (mpm_info->aid) { -+ cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "aid:%u ", mpm_info->aid_v); -+ if (cnt >= MPM_LOG_BUF_LEN - 1) -+ goto exit; -+ } -+ if (mpm_info->pid) { -+ cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "pid:%u ", mpm_info->pid_v); -+ if (cnt >= MPM_LOG_BUF_LEN - 1) -+ goto exit; -+ } -+ if (mpm_info->llid) { -+ cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "llid:%u ", mpm_info->llid_v); -+ if (cnt >= MPM_LOG_BUF_LEN - 1) -+ goto exit; -+ } -+ if (mpm_info->plid) { -+ cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "plid:%u ", mpm_info->plid_v); -+ if (cnt >= MPM_LOG_BUF_LEN - 1) -+ goto exit; -+ } -+ if (mpm_info->reason) { -+ cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "reason:%u ", mpm_info->reason_v); -+ if (cnt >= MPM_LOG_BUF_LEN - 1) -+ goto exit; -+ } -+ if (mpm_info->chosen_pmk) { -+ cnt += snprintf(mpm_log_buf + cnt, MPM_LOG_BUF_LEN - cnt - 1, "chosen_pmk:0x"KEY_FMT, KEY_ARG(mpm_info->chosen_pmk)); -+ if (cnt >= MPM_LOG_BUF_LEN - 1) -+ goto exit; -+ } -+ -+exit: -+ return; -+} -+ -+static int rtw_mpm_check_frames(_adapter *adapter, u8 action, const u8 **buf, size_t *len, u8 tx) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *plink = NULL; -+ u8 *nbuf = NULL; -+ size_t nlen = 0; -+ u8 *fhead = (u8 *)*buf; -+ size_t flen = *len; -+ u8 *peer_addr = tx ? GetAddr1Ptr(fhead) : get_addr2_ptr(fhead); -+ u8 *frame_body = fhead + sizeof(struct rtw_ieee80211_hdr_3addr); -+ struct mpm_frame_info mpm_info; -+ u8 tlv_ies_offset; -+ u8 *mpm_ie = NULL; -+ uint mpm_ielen = 0; -+ u8 *mic_ie = NULL; -+ uint mic_ielen = 0; -+ int ret = 0; -+ u8 mpm_log_buf[MPM_LOG_BUF_LEN] = {0}; -+ -+ if (action == RTW_ACT_SELF_PROTECTED_MESH_OPEN) -+ tlv_ies_offset = 4; -+ else if (action == RTW_ACT_SELF_PROTECTED_MESH_CONF) -+ tlv_ies_offset = 6; -+ else if (action == RTW_ACT_SELF_PROTECTED_MESH_CLOSE) -+ tlv_ies_offset = 2; -+ else { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ plink = rtw_mesh_plink_get(adapter, peer_addr); -+ if (!plink && (tx == _TRUE || action == RTW_ACT_SELF_PROTECTED_MESH_CONF)) { -+ /* warning message if no plink when: 1.TX all MPM or 2.RX CONF */ -+ RTW_WARN("RTW_%s:%s without plink of "MAC_FMT"\n" -+ , (tx == _TRUE) ? "Tx" : "Rx", action_self_protected_str(action), MAC_ARG(peer_addr)); -+ goto exit; -+ } -+ -+ _rtw_memset(&mpm_info, 0, sizeof(struct mpm_frame_info)); -+ -+ if (action == RTW_ACT_SELF_PROTECTED_MESH_CONF) { -+ mpm_info.aid = (u8 *)frame_body + 4; -+ mpm_info.aid_v = RTW_GET_LE16(mpm_info.aid); -+ } -+ -+ mpm_ie = rtw_get_ie(fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset -+ , WLAN_EID_MPM, &mpm_ielen -+ , flen - sizeof(struct rtw_ieee80211_hdr_3addr) - tlv_ies_offset); -+ if (!mpm_ie || mpm_ielen < 2 + 2) -+ goto exit; -+ -+ mpm_info.pid = mpm_ie + 2; -+ mpm_info.pid_v = RTW_GET_LE16(mpm_info.pid); -+ mpm_info.llid = mpm_info.pid + 2; -+ mpm_info.llid_v = RTW_GET_LE16(mpm_info.llid); -+ -+ switch (action) { -+ case RTW_ACT_SELF_PROTECTED_MESH_OPEN: -+ /* pid:2, llid:2, (chosen_pmk:16) */ -+ if (mpm_info.pid_v == 0 && mpm_ielen == 4) -+ ; -+ else if (mpm_info.pid_v == 1 && mpm_ielen == 20) -+ mpm_info.chosen_pmk = mpm_info.llid + 2; -+ else -+ goto exit; -+ break; -+ case RTW_ACT_SELF_PROTECTED_MESH_CONF: -+ /* pid:2, llid:2, plid:2, (chosen_pmk:16) */ -+ mpm_info.plid = mpm_info.llid + 2; -+ mpm_info.plid_v = RTW_GET_LE16(mpm_info.plid); -+ if (mpm_info.pid_v == 0 && mpm_ielen == 6) -+ ; -+ else if (mpm_info.pid_v == 1 && mpm_ielen == 22) -+ mpm_info.chosen_pmk = mpm_info.plid + 2; -+ else -+ goto exit; -+ break; -+ case RTW_ACT_SELF_PROTECTED_MESH_CLOSE: -+ /* pid:2, llid:2, (plid:2), reason:2, (chosen_pmk:16) */ -+ if (mpm_info.pid_v == 0 && mpm_ielen == 6) { -+ /* MPM, without plid */ -+ mpm_info.reason = mpm_info.llid + 2; -+ mpm_info.reason_v = RTW_GET_LE16(mpm_info.reason); -+ } else if (mpm_info.pid_v == 0 && mpm_ielen == 8) { -+ /* MPM, with plid */ -+ mpm_info.plid = mpm_info.llid + 2; -+ mpm_info.plid_v = RTW_GET_LE16(mpm_info.plid); -+ mpm_info.reason = mpm_info.plid + 2; -+ mpm_info.reason_v = RTW_GET_LE16(mpm_info.reason); -+ } else if (mpm_info.pid_v == 1 && mpm_ielen == 22) { -+ /* AMPE, without plid */ -+ mpm_info.reason = mpm_info.llid + 2; -+ mpm_info.reason_v = RTW_GET_LE16(mpm_info.reason); -+ mpm_info.chosen_pmk = mpm_info.reason + 2; -+ } else if (mpm_info.pid_v == 1 && mpm_ielen == 24) { -+ /* AMPE, with plid */ -+ mpm_info.plid = mpm_info.llid + 2; -+ mpm_info.plid_v = RTW_GET_LE16(mpm_info.plid); -+ mpm_info.reason = mpm_info.plid + 2; -+ mpm_info.reason_v = RTW_GET_LE16(mpm_info.reason); -+ mpm_info.chosen_pmk = mpm_info.reason + 2; -+ } else -+ goto exit; -+ break; -+ }; -+ -+ if (mpm_info.pid_v == 1) { -+ mic_ie = rtw_get_ie(fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset -+ , WLAN_EID_MIC, &mic_ielen -+ , flen - sizeof(struct rtw_ieee80211_hdr_3addr) - tlv_ies_offset); -+ if (!mic_ie || mic_ielen != 16 /* AES_BLOCK_SIZE */) -+ goto exit; -+ } -+ -+#if CONFIG_RTW_MPM_TX_IES_SYNC_BSS -+ if ((action == RTW_ACT_SELF_PROTECTED_MESH_OPEN || action == RTW_ACT_SELF_PROTECTED_MESH_CONF) -+ && tx == _TRUE -+ ) { -+#define DBG_RTW_MPM_TX_IES_SYNC_BSS 0 -+ -+ if (mpm_info.pid_v == 1 && (!plink || !MESH_PLINK_AEK_VALID(plink))) { -+ RTW_WARN("AEK not ready, IEs can't sync with BSS\n"); -+ goto bypass_sync_bss; -+ } -+ -+ if (DBG_RTW_MPM_TX_IES_SYNC_BSS) { -+ RTW_INFO(FUNC_ADPT_FMT" before:\n", FUNC_ADPT_ARG(adapter)); -+ dump_ies(RTW_DBGDUMP -+ , fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset -+ , flen - sizeof(struct rtw_ieee80211_hdr_3addr) - tlv_ies_offset); -+ } -+ -+ rtw_mpm_tx_ies_sync_bss(adapter, plink -+ , fhead, flen, frame_body, tlv_ies_offset, mpm_ie, mic_ie -+ , &nbuf, &nlen); -+ if (!nbuf) -+ goto exit; -+ -+ /* update pointer & len for new frame */ -+ fhead = nbuf; -+ flen = nlen; -+ frame_body = fhead + sizeof(struct rtw_ieee80211_hdr_3addr); -+ if (mpm_info.pid_v == 1) { -+ mic_ie = rtw_get_ie(fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset -+ , WLAN_EID_MIC, &mic_ielen -+ , flen - sizeof(struct rtw_ieee80211_hdr_3addr) - tlv_ies_offset); -+ } -+ -+ if (DBG_RTW_MPM_TX_IES_SYNC_BSS) { -+ RTW_INFO(FUNC_ADPT_FMT" after:\n", FUNC_ADPT_ARG(adapter)); -+ dump_ies(RTW_DBGDUMP -+ , fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + tlv_ies_offset -+ , flen - sizeof(struct rtw_ieee80211_hdr_3addr) - tlv_ies_offset); -+ } -+ } -+bypass_sync_bss: -+#endif /* CONFIG_RTW_MPM_TX_IES_SYNC_BSS */ -+ -+ if (!plink) -+ goto mpm_log; -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+ if (action == RTW_ACT_SELF_PROTECTED_MESH_OPEN) { -+ if (tx) -+ rtw_mesh_plink_set_peer_conf_timeout(adapter, peer_addr); -+ -+ } else -+#endif -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+ if (action == RTW_ACT_SELF_PROTECTED_MESH_CLOSE) { -+ if (tx && mpm_info.reason && mpm_info.reason_v == WLAN_REASON_MESH_MAX_PEERS) { -+ if (rtw_mesh_scanned_is_acnode_confirmed(adapter, plink->scanned) -+ && rtw_mesh_acnode_prevent_allow_sacrifice(adapter) -+ ) { -+ struct sta_info *sac = rtw_mesh_acnode_prevent_pick_sacrifice(adapter); -+ -+ if (sac) { -+ struct sta_priv *stapriv = &adapter->stapriv; -+ _irqL irqL; -+ u8 sta_addr[ETH_ALEN]; -+ u8 updated = _FALSE; -+ -+ _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ if (!rtw_is_list_empty(&sac->asoc_list)) { -+ rtw_list_delete(&sac->asoc_list); -+ stapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (sac->tbtx_enable) -+ stapriv->tbtx_asoc_list_cnt--; -+ #endif -+ STA_SET_MESH_PLINK(sac, NULL); -+ } -+ _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ RTW_INFO(FUNC_ADPT_FMT" sacrifice "MAC_FMT" for acnode\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(sac->cmn.mac_addr)); -+ -+ _rtw_memcpy(sta_addr, sac->cmn.mac_addr, ETH_ALEN); -+ updated = ap_free_sta(adapter, sac, 0, 0, 1); -+ rtw_mesh_expire_peer(stapriv->padapter, sta_addr); -+ -+ associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL); -+ } -+ } -+ } -+ } else -+#endif -+ if (action == RTW_ACT_SELF_PROTECTED_MESH_CONF) { -+ _irqL irqL; -+ u8 *ies = NULL; -+ u16 ies_len = 0; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ plink = _rtw_mesh_plink_get(adapter, peer_addr); -+ if (!plink) -+ goto release_plink_ctl; -+ -+ if (tx == _FALSE) { -+ ies = plink->rx_conf_ies; -+ ies_len = plink->rx_conf_ies_len; -+ plink->rx_conf_ies = NULL; -+ plink->rx_conf_ies_len = 0; -+ -+ plink->llid = mpm_info.plid_v; -+ plink->plid = mpm_info.llid_v; -+ plink->peer_aid = mpm_info.aid_v; -+ if (mpm_info.pid_v == 1) -+ _rtw_memcpy(plink->chosen_pmk, mpm_info.chosen_pmk, 16); -+ } -+ #ifdef CONFIG_RTW_MESH_DRIVER_AID -+ else { -+ ies = plink->tx_conf_ies; -+ ies_len = plink->tx_conf_ies_len; -+ plink->tx_conf_ies = NULL; -+ plink->tx_conf_ies_len = 0; -+ } -+ #endif -+ -+ if (ies && ies_len) -+ rtw_mfree(ies, ies_len); -+ -+ #ifndef CONFIG_RTW_MESH_DRIVER_AID -+ if (tx == _TRUE) -+ goto release_plink_ctl; /* no need to copy tx conf ies */ -+ #endif -+ -+ /* copy mesh confirm IEs */ -+ if (mpm_info.pid_v == 1) /* not include MIC & encrypted AMPE */ -+ ies_len = (mic_ie - fhead) - sizeof(struct rtw_ieee80211_hdr_3addr) - 2; -+ else -+ ies_len = flen - sizeof(struct rtw_ieee80211_hdr_3addr) - 2; -+ -+ ies = rtw_zmalloc(ies_len); -+ if (ies) { -+ _rtw_memcpy(ies, fhead + sizeof(struct rtw_ieee80211_hdr_3addr) + 2, ies_len); -+ if (tx == _FALSE) { -+ plink->rx_conf_ies = ies; -+ plink->rx_conf_ies_len = ies_len; -+ } -+ #ifdef CONFIG_RTW_MESH_DRIVER_AID -+ else { -+ plink->tx_conf_ies = ies; -+ plink->tx_conf_ies_len = ies_len; -+ } -+ #endif -+ } -+ -+release_plink_ctl: -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+ } -+ -+mpm_log: -+ rtw_mpm_info_msg(&mpm_info, mpm_log_buf); -+ RTW_INFO("RTW_%s:%s %s\n" -+ , (tx == _TRUE) ? "Tx" : "Rx" -+ , action_self_protected_str(action) -+ , mpm_log_buf -+ ); -+ -+ ret = 1; -+ -+exit: -+ if (nbuf) { -+ if (ret == 1) { -+ *buf = nbuf; -+ *len = nlen; -+ } else -+ rtw_mfree(nbuf, nlen); -+ } -+ -+ return ret; -+} -+ -+static int rtw_mesh_check_frames(_adapter *adapter, const u8 **buf, size_t *len, u8 tx) -+{ -+ int is_mesh_frame = -1; -+ const u8 *frame_body; -+ u8 category, action; -+ -+ frame_body = *buf + sizeof(struct rtw_ieee80211_hdr_3addr); -+ category = frame_body[0]; -+ -+ if (category == RTW_WLAN_CATEGORY_SELF_PROTECTED) { -+ action = frame_body[1]; -+ switch (action) { -+ case RTW_ACT_SELF_PROTECTED_MESH_OPEN: -+ case RTW_ACT_SELF_PROTECTED_MESH_CONF: -+ case RTW_ACT_SELF_PROTECTED_MESH_CLOSE: -+ rtw_mpm_check_frames(adapter, action, buf, len, tx); -+ is_mesh_frame = action; -+ break; -+ case RTW_ACT_SELF_PROTECTED_MESH_GK_INFORM: -+ case RTW_ACT_SELF_PROTECTED_MESH_GK_ACK: -+ RTW_INFO("RTW_%s:%s\n", (tx == _TRUE) ? "Tx" : "Rx", action_self_protected_str(action)); -+ is_mesh_frame = action; -+ break; -+ default: -+ break; -+ }; -+ } -+ -+ return is_mesh_frame; -+} -+ -+int rtw_mesh_check_frames_tx(_adapter *adapter, const u8 **buf, size_t *len) -+{ -+ return rtw_mesh_check_frames(adapter, buf, len, _TRUE); -+} -+ -+int rtw_mesh_check_frames_rx(_adapter *adapter, const u8 *buf, size_t len) -+{ -+ return rtw_mesh_check_frames(adapter, &buf, &len, _FALSE); -+} -+ -+int rtw_mesh_on_auth(_adapter *adapter, union recv_frame *rframe) -+{ -+ u8 *whdr = rframe->u.hdr.rx_data; -+ -+#if CONFIG_RTW_MACADDR_ACL -+ if (rtw_access_ctrl(adapter, get_addr2_ptr(whdr)) == _FALSE) -+ return _SUCCESS; -+#endif -+ -+ if (!rtw_mesh_plink_get(adapter, get_addr2_ptr(whdr))) { -+ #if CONFIG_RTW_MESH_ACNODE_PREVENT -+ rtw_mesh_acnode_set_notify_etime(adapter, whdr); -+ #endif -+ -+ if (adapter_to_rfctl(adapter)->offch_state == OFFCHS_NONE) -+ issue_probereq(adapter, &adapter->mlmepriv.cur_network.network.mesh_id, get_addr2_ptr(whdr)); -+ -+ /* only peer being added (checked by notify conditions) is allowed */ -+ return _SUCCESS; -+ } -+ -+ rtw_cfg80211_rx_mframe(adapter, rframe, NULL); -+ return _SUCCESS; -+} -+ -+unsigned int on_action_self_protected(_adapter *adapter, union recv_frame *rframe) -+{ -+ unsigned int ret = _FAIL; -+ struct sta_info *sta = NULL; -+ u8 *pframe = rframe->u.hdr.rx_data; -+ uint frame_len = rframe->u.hdr.len; -+ u8 *frame_body = (u8 *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ u8 category; -+ u8 action; -+ -+ /* check RA matches or not */ -+ if (!_rtw_memcmp(adapter_mac_addr(adapter), GetAddr1Ptr(pframe), ETH_ALEN)) -+ goto exit; -+ -+ category = frame_body[0]; -+ if (category != RTW_WLAN_CATEGORY_SELF_PROTECTED) -+ goto exit; -+ -+ action = frame_body[1]; -+ switch (action) { -+ case RTW_ACT_SELF_PROTECTED_MESH_OPEN: -+ case RTW_ACT_SELF_PROTECTED_MESH_CONF: -+ case RTW_ACT_SELF_PROTECTED_MESH_CLOSE: -+ case RTW_ACT_SELF_PROTECTED_MESH_GK_INFORM: -+ case RTW_ACT_SELF_PROTECTED_MESH_GK_ACK: -+ if (!(MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter))) -+ goto exit; -+#ifdef CONFIG_IOCTL_CFG80211 -+ #if CONFIG_RTW_MACADDR_ACL -+ if (rtw_access_ctrl(adapter, get_addr2_ptr(pframe)) == _FALSE) -+ goto exit; -+ #endif -+ #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ if (rtw_mesh_cto_mgate_required(adapter) -+ /* only peer being added (checked by notify conditions) is allowed */ -+ && !rtw_mesh_plink_get(adapter, get_addr2_ptr(pframe))) -+ goto exit; -+ #endif -+ rtw_cfg80211_rx_action(adapter, rframe, NULL); -+ ret = _SUCCESS; -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ break; -+ default: -+ break; -+ } -+ -+exit: -+ return ret; -+} -+ -+const u8 ae_to_mesh_ctrl_len[] = { -+ 6, -+ 12, /* MESH_FLAGS_AE_A4 */ -+ 18, /* MESH_FLAGS_AE_A5_A6 */ -+ 0, -+}; -+ -+unsigned int on_action_mesh(_adapter *adapter, union recv_frame *rframe) -+{ -+ unsigned int ret = _FAIL; -+ struct sta_info *sta = NULL; -+ struct sta_priv *stapriv = &adapter->stapriv; -+ u8 *pframe = rframe->u.hdr.rx_data; -+ uint frame_len = rframe->u.hdr.len; -+ u8 *frame_body = (u8 *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ u8 category; -+ u8 action; -+ -+ if (!MLME_IS_MESH(adapter)) -+ goto exit; -+ -+ /* check stainfo exist? */ -+ -+ category = frame_body[0]; -+ if (category != RTW_WLAN_CATEGORY_MESH) -+ goto exit; -+ -+ action = frame_body[1]; -+ switch (action) { -+ case RTW_ACT_MESH_HWMP_PATH_SELECTION: -+ rtw_mesh_rx_path_sel_frame(adapter, rframe); -+ ret = _SUCCESS; -+ break; -+ default: -+ break; -+ } -+ -+exit: -+ return ret; -+} -+ -+bool rtw_mesh_update_bss_peering_status(_adapter *adapter, WLAN_BSSID_EX *bss) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ u8 num_of_peerings = stapriv->asoc_list_cnt; -+ bool accept_peerings = stapriv->asoc_list_cnt < mcfg->max_peer_links; -+ u8 *ie; -+ int ie_len; -+ bool updated = 0; -+ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+ accept_peerings |= plink_ctl->acnode_rsvd; -+#endif -+ -+ ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len, BSS_EX_TLV_IES_LEN(bss)); -+ if (!ie || ie_len != 7) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (GET_MESH_CONF_ELE_NUM_OF_PEERINGS(ie + 2) != num_of_peerings) { -+ SET_MESH_CONF_ELE_NUM_OF_PEERINGS(ie + 2, num_of_peerings); -+ updated = 1; -+ } -+ -+ if (GET_MESH_CONF_ELE_ACCEPT_PEERINGS(ie + 2) != accept_peerings) { -+ SET_MESH_CONF_ELE_ACCEPT_PEERINGS(ie + 2, accept_peerings); -+ updated = 1; -+ } -+ -+exit: -+ return updated; -+} -+ -+bool rtw_mesh_update_bss_formation_info(_adapter *adapter, WLAN_BSSID_EX *bss) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ u8 cto_mgate = (minfo->num_gates || mcfg->dot11MeshGateAnnouncementProtocol); -+ u8 cto_as = 0; -+ u8 *ie; -+ int ie_len; -+ bool updated = 0; -+ -+ ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len, -+ BSS_EX_TLV_IES_LEN(bss)); -+ if (!ie || ie_len != 7) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (GET_MESH_CONF_ELE_CTO_MGATE(ie + 2) != cto_mgate) { -+ SET_MESH_CONF_ELE_CTO_MGATE(ie + 2, cto_mgate); -+ updated = 1; -+ } -+ -+ if (GET_MESH_CONF_ELE_CTO_AS(ie + 2) != cto_as) { -+ SET_MESH_CONF_ELE_CTO_AS(ie + 2, cto_as); -+ updated = 1; -+ } -+ -+exit: -+ return updated; -+} -+ -+bool rtw_mesh_update_bss_forwarding_state(_adapter *adapter, WLAN_BSSID_EX *bss) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ u8 forward = mcfg->dot11MeshForwarding; -+ u8 *ie; -+ int ie_len; -+ bool updated = 0; -+ -+ ie = rtw_get_ie(BSS_EX_TLV_IES(bss), WLAN_EID_MESH_CONFIG, &ie_len, -+ BSS_EX_TLV_IES_LEN(bss)); -+ if (!ie || ie_len != 7) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (GET_MESH_CONF_ELE_FORWARDING(ie + 2) != forward) { -+ SET_MESH_CONF_ELE_FORWARDING(ie + 2, forward); -+ updated = 1; -+ } -+ -+exit: -+ return updated; -+} -+ -+struct mesh_plink_ent *_rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *ent = NULL; -+ int i; -+ -+ for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) { -+ if (plink_ctl->ent[i].valid == _TRUE -+ && _rtw_memcmp(plink_ctl->ent[i].addr, hwaddr, ETH_ALEN) == _TRUE -+ ) { -+ ent = &plink_ctl->ent[i]; -+ break; -+ } -+ } -+ -+ return ent; -+} -+ -+struct mesh_plink_ent *rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *ent = NULL; -+ _irqL irqL; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ ent = _rtw_mesh_plink_get(adapter, hwaddr); -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ return ent; -+} -+ -+struct mesh_plink_ent *rtw_mesh_plink_get_no_estab_by_idx(_adapter *adapter, u8 idx) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *ent = NULL; -+ int i, j = 0; -+ _irqL irqL; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) { -+ if (plink_ctl->ent[i].valid == _TRUE -+ && plink_ctl->ent[i].plink_state != RTW_MESH_PLINK_ESTAB -+ ) { -+ if (j == idx) { -+ ent = &plink_ctl->ent[i]; -+ break; -+ } -+ j++; -+ } -+ } -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ return ent; -+} -+ -+int _rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *ent = NULL; -+ u8 exist = _FALSE; -+ int i; -+ -+ for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) { -+ if (plink_ctl->ent[i].valid == _TRUE -+ && _rtw_memcmp(plink_ctl->ent[i].addr, hwaddr, ETH_ALEN) == _TRUE -+ ) { -+ ent = &plink_ctl->ent[i]; -+ exist = _TRUE; -+ break; -+ } -+ -+ if (ent == NULL && plink_ctl->ent[i].valid == _FALSE) -+ ent = &plink_ctl->ent[i]; -+ } -+ -+ if (exist == _FALSE && ent) { -+ _rtw_memcpy(ent->addr, hwaddr, ETH_ALEN); -+ ent->valid = _TRUE; -+ #ifdef CONFIG_RTW_MESH_AEK -+ ent->aek_valid = 0; -+ #endif -+ ent->llid = 0; -+ ent->plid = 0; -+ _rtw_memset(ent->chosen_pmk, 0, 16); -+ #ifdef CONFIG_RTW_MESH_AEK -+ _rtw_memset(ent->sel_pcs, 0, 4); -+ _rtw_memset(ent->l_nonce, 0, 32); -+ _rtw_memset(ent->p_nonce, 0, 32); -+ #endif -+ ent->plink_state = RTW_MESH_PLINK_LISTEN; -+ #ifndef CONFIG_RTW_MESH_DRIVER_AID -+ ent->aid = 0; -+ #endif -+ ent->peer_aid = 0; -+ SET_PEER_CONF_DISABLED(ent); -+ SET_CTO_MGATE_CONF_DISABLED(ent); -+ plink_ctl->num++; -+ } -+ -+ return exist == _TRUE ? RTW_ALREADY : (ent ? _SUCCESS : _FAIL); -+} -+ -+int rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ _irqL irqL; -+ int ret; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ ret = _rtw_mesh_plink_add(adapter, hwaddr); -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ return ret; -+} -+ -+int rtw_mesh_plink_set_state(_adapter *adapter, const u8 *hwaddr, u8 state) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *ent = NULL; -+ _irqL irqL; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ ent = _rtw_mesh_plink_get(adapter, hwaddr); -+ if (ent) -+ ent->plink_state = state; -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ return ent ? _SUCCESS : _FAIL; -+} -+ -+#ifdef CONFIG_RTW_MESH_AEK -+int rtw_mesh_plink_set_aek(_adapter *adapter, const u8 *hwaddr, const u8 *aek) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *ent = NULL; -+ _irqL irqL; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ ent = _rtw_mesh_plink_get(adapter, hwaddr); -+ if (ent) { -+ _rtw_memcpy(ent->aek, aek, 32); -+ ent->aek_valid = 1; -+ } -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ return ent ? _SUCCESS : _FAIL; -+} -+#endif -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+int rtw_mesh_plink_set_peer_conf_timeout(_adapter *adapter, const u8 *hwaddr) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *ent = NULL; -+ _irqL irqL; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ ent = _rtw_mesh_plink_get(adapter, hwaddr); -+ if (ent) { -+ if (IS_PEER_CONF_DISABLED(ent)) -+ SET_PEER_CONF_END_TIME(ent, mcfg->peer_sel_policy.peer_conf_timeout_ms); -+ } -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ return ent ? _SUCCESS : _FAIL; -+} -+#endif -+ -+void _rtw_mesh_plink_del_ent(_adapter *adapter, struct mesh_plink_ent *ent) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ -+ ent->valid = _FALSE; -+ #ifdef CONFIG_RTW_MESH_DRIVER_AID -+ if (ent->tx_conf_ies && ent->tx_conf_ies_len) -+ rtw_mfree(ent->tx_conf_ies, ent->tx_conf_ies_len); -+ ent->tx_conf_ies = NULL; -+ ent->tx_conf_ies_len = 0; -+ #endif -+ if (ent->rx_conf_ies && ent->rx_conf_ies_len) -+ rtw_mfree(ent->rx_conf_ies, ent->rx_conf_ies_len); -+ ent->rx_conf_ies = NULL; -+ ent->rx_conf_ies_len = 0; -+ if (ent->scanned) -+ ent->scanned = NULL; -+ plink_ctl->num--; -+} -+ -+int rtw_mesh_plink_del(_adapter *adapter, const u8 *hwaddr) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *ent = NULL; -+ u8 exist = _FALSE; -+ int i; -+ _irqL irqL; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) { -+ if (plink_ctl->ent[i].valid == _TRUE -+ && _rtw_memcmp(plink_ctl->ent[i].addr, hwaddr, ETH_ALEN) == _TRUE -+ ) { -+ ent = &plink_ctl->ent[i]; -+ exist = _TRUE; -+ break; -+ } -+ } -+ -+ if (exist == _TRUE) -+ _rtw_mesh_plink_del_ent(adapter, ent); -+ -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ return exist == _TRUE ? _SUCCESS : RTW_ALREADY; -+} -+ -+void rtw_mesh_plink_ctl_init(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ int i; -+ -+ _rtw_spinlock_init(&plink_ctl->lock); -+ plink_ctl->num = 0; -+ for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) -+ plink_ctl->ent[i].valid = _FALSE; -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+ _rtw_init_queue(&plink_ctl->peer_blacklist); -+#endif -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ _rtw_init_queue(&plink_ctl->cto_mgate_blacklist); -+#endif -+} -+ -+void rtw_mesh_plink_ctl_deinit(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *ent; -+ int i; -+ _irqL irqL; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) { -+ ent = &plink_ctl->ent[i]; -+ #ifdef CONFIG_RTW_MESH_DRIVER_AID -+ if (ent->tx_conf_ies && ent->tx_conf_ies_len) -+ rtw_mfree(ent->tx_conf_ies, ent->tx_conf_ies_len); -+ #endif -+ if (ent->rx_conf_ies && ent->rx_conf_ies_len) -+ rtw_mfree(ent->rx_conf_ies, ent->rx_conf_ies_len); -+ } -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ _rtw_spinlock_free(&plink_ctl->lock); -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+ rtw_mesh_peer_blacklist_flush(adapter); -+ _rtw_deinit_queue(&plink_ctl->peer_blacklist); -+#endif -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ rtw_mesh_cto_mgate_blacklist_flush(adapter); -+ _rtw_deinit_queue(&plink_ctl->cto_mgate_blacklist); -+#endif -+} -+ -+void dump_mesh_plink_ctl(void *sel, _adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *ent; -+ int i; -+ -+ RTW_PRINT_SEL(sel, "num:%u\n", plink_ctl->num); -+ #if CONFIG_RTW_MESH_ACNODE_PREVENT -+ RTW_PRINT_SEL(sel, "acnode_rsvd:%u\n", plink_ctl->acnode_rsvd); -+ #endif -+ -+ for (i = 0; i < RTW_MESH_MAX_PEER_CANDIDATES; i++) { -+ ent = &plink_ctl->ent[i]; -+ if (!ent->valid) -+ continue; -+ -+ RTW_PRINT_SEL(sel, "\n"); -+ RTW_PRINT_SEL(sel, "peer:"MAC_FMT"\n", MAC_ARG(ent->addr)); -+ RTW_PRINT_SEL(sel, "plink_state:%s\n", rtw_mesh_plink_str(ent->plink_state)); -+ -+ #ifdef CONFIG_RTW_MESH_AEK -+ if (ent->aek_valid) -+ RTW_PRINT_SEL(sel, "aek:"KEY_FMT KEY_FMT"\n", KEY_ARG(ent->aek), KEY_ARG(ent->aek + 16)); -+ #endif -+ -+ RTW_PRINT_SEL(sel, "llid:%u, plid:%u\n", ent->llid, ent->plid); -+ #ifndef CONFIG_RTW_MESH_DRIVER_AID -+ RTW_PRINT_SEL(sel, "aid:%u\n", ent->aid); -+ #endif -+ RTW_PRINT_SEL(sel, "peer_aid:%u\n", ent->peer_aid); -+ -+ RTW_PRINT_SEL(sel, "chosen_pmk:"KEY_FMT"\n", KEY_ARG(ent->chosen_pmk)); -+ -+ #ifdef CONFIG_RTW_MESH_AEK -+ RTW_PRINT_SEL(sel, "sel_pcs:%02x%02x%02x%02x\n" -+ , ent->sel_pcs[0], ent->sel_pcs[1], ent->sel_pcs[2], ent->sel_pcs[3]); -+ RTW_PRINT_SEL(sel, "l_nonce:"KEY_FMT KEY_FMT"\n", KEY_ARG(ent->l_nonce), KEY_ARG(ent->l_nonce + 16)); -+ RTW_PRINT_SEL(sel, "p_nonce:"KEY_FMT KEY_FMT"\n", KEY_ARG(ent->p_nonce), KEY_ARG(ent->p_nonce + 16)); -+ #endif -+ -+ #ifdef CONFIG_RTW_MESH_DRIVER_AID -+ RTW_PRINT_SEL(sel, "tx_conf_ies:%p, len:%u\n", ent->tx_conf_ies, ent->tx_conf_ies_len); -+ #endif -+ RTW_PRINT_SEL(sel, "rx_conf_ies:%p, len:%u\n", ent->rx_conf_ies, ent->rx_conf_ies_len); -+ RTW_PRINT_SEL(sel, "scanned:%p\n", ent->scanned); -+ -+ #if CONFIG_RTW_MESH_PEER_BLACKLIST -+ if (!IS_PEER_CONF_DISABLED(ent)) { -+ if (!IS_PEER_CONF_TIMEOUT(ent)) -+ RTW_PRINT_SEL(sel, "peer_conf:%d\n", rtw_systime_to_ms(ent->peer_conf_end_time - rtw_get_current_time())); -+ else -+ RTW_PRINT_SEL(sel, "peer_conf:TIMEOUT\n"); -+ } -+ #endif -+ -+ #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ if (!IS_CTO_MGATE_CONF_DISABLED(ent)) { -+ if (!IS_CTO_MGATE_CONF_TIMEOUT(ent)) -+ RTW_PRINT_SEL(sel, "cto_mgate_conf:%d\n", rtw_systime_to_ms(ent->cto_mgate_conf_end_time - rtw_get_current_time())); -+ else -+ RTW_PRINT_SEL(sel, "cto_mgate_conf:TIMEOUT\n"); -+ } -+ #endif -+ } -+} -+ -+/* this function is called with plink_ctl being locked */ -+static int rtw_mesh_peer_establish(_adapter *adapter, struct mesh_plink_ent *plink, struct sta_info *sta) -+{ -+#ifndef DBG_RTW_MESH_PEER_ESTABLISH -+#define DBG_RTW_MESH_PEER_ESTABLISH 0 -+#endif -+ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ u8 *tlv_ies; -+ u16 tlv_ieslen; -+ struct rtw_ieee802_11_elems elems; -+ _irqL irqL; -+ int i; -+ u16 status = 0; -+ int ret = _FAIL; -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ u8 sta_tbtx_enable = _FALSE; -+#endif -+ -+ if (!plink->rx_conf_ies || !plink->rx_conf_ies_len) { -+ RTW_INFO(FUNC_ADPT_FMT" no rx confirm from sta "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr)); -+ goto exit; -+ } -+ -+ if (plink->rx_conf_ies_len < 4) { -+ RTW_INFO(FUNC_ADPT_FMT" confirm from sta "MAC_FMT" too short\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr)); -+ goto exit; -+ } -+ -+#ifdef CONFIG_RTW_MESH_DRIVER_AID -+ if (!plink->tx_conf_ies || !plink->tx_conf_ies_len) { -+ RTW_INFO(FUNC_ADPT_FMT" no tx confirm to sta "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr)); -+ goto exit; -+ } -+ -+ if (plink->tx_conf_ies_len < 4) { -+ RTW_INFO(FUNC_ADPT_FMT" confirm to sta "MAC_FMT" too short\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr)); -+ goto exit; -+ } -+#endif -+ -+ tlv_ies = plink->rx_conf_ies + 4; -+ tlv_ieslen = plink->rx_conf_ies_len - 4; -+ -+ if (DBG_RTW_MESH_PEER_ESTABLISH) -+ dump_ies(RTW_DBGDUMP, tlv_ies, tlv_ieslen); -+ -+ if (rtw_ieee802_11_parse_elems(tlv_ies, tlv_ieslen, &elems, 1) == ParseFailed) { -+ RTW_INFO(FUNC_ADPT_FMT" sta "MAC_FMT" sent invalid confirm\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr)); -+ goto exit; -+ } -+ -+ SET_PEER_CONF_DISABLED(plink); -+ if (rtw_bss_is_cto_mgate(&plink->scanned->network) -+ && !rtw_bss_is_forwarding(&plink->scanned->network)) -+ SET_CTO_MGATE_CONF_END_TIME(plink, mcfg->peer_sel_policy.cto_mgate_conf_timeout_ms); -+ else -+ SET_CTO_MGATE_CONF_DISABLED(plink); -+ -+ sta->state &= (~WIFI_FW_AUTH_SUCCESS); -+ sta->state |= WIFI_FW_ASSOC_STATE; -+ -+ rtw_ap_parse_sta_capability(adapter, sta, plink->rx_conf_ies); -+ -+ status = rtw_ap_parse_sta_supported_rates(adapter, sta, tlv_ies, tlv_ieslen); -+ if (status != _STATS_SUCCESSFUL_) -+ goto exit; -+ -+ status = rtw_ap_parse_sta_security_ie(adapter, sta, &elems); -+ if (status != _STATS_SUCCESSFUL_) { -+ RTW_INFO(FUNC_ADPT_FMT" security check fail, status=%u\n", FUNC_ADPT_ARG(adapter), status); -+ goto exit; -+ } -+ -+ rtw_ap_parse_sta_wmm_ie(adapter, sta, tlv_ies, tlv_ieslen); -+#ifdef CONFIG_RTS_FULL_BW -+ /*check vendor IE*/ -+ rtw_parse_sta_vendor_ie_8812(adapter, sta, tlv_ies, tlv_ieslen); -+#endif/*CONFIG_RTS_FULL_BW*/ -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (elems.tbtx_cap && elems.tbtx_cap_len != 0) { -+ if(rtw_is_tbtx_capabilty(elems.tbtx_cap, elems.tbtx_cap_len)) { -+ sta_tbtx_enable = _TRUE; -+ } -+ } -+#endif -+ -+ rtw_ap_parse_sta_ht_ie(adapter, sta, &elems); -+ rtw_ap_parse_sta_vht_ie(adapter, sta, &elems); -+ -+ /* AID */ -+#ifdef CONFIG_RTW_MESH_DRIVER_AID -+ sta->cmn.aid = RTW_GET_LE16(plink->tx_conf_ies + 2); -+#else -+ sta->cmn.aid = plink->aid; -+#endif -+ stapriv->sta_aid[sta->cmn.aid - 1] = sta; -+ RTW_INFO(FUNC_ADPT_FMT" sta "MAC_FMT" aid:%u\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr), sta->cmn.aid); -+ -+ sta->state &= (~WIFI_FW_ASSOC_STATE); -+ sta->state |= WIFI_FW_ASSOC_SUCCESS; -+ -+ sta->local_mps = RTW_MESH_PS_ACTIVE; -+ -+ rtw_ewma_err_rate_init(&sta->metrics.err_rate); -+ rtw_ewma_err_rate_add(&sta->metrics.err_rate, 1); -+ /* init data_rate to 1M */ -+ sta->metrics.data_rate = 10; -+ sta->alive = _TRUE; -+ -+ _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&sta->asoc_list)) { -+ STA_SET_MESH_PLINK(sta, plink); -+ /* TBD: up layer timeout mechanism */ -+ /* sta->expire_to = mcfg->plink_timeout / 2; */ -+ rtw_list_insert_tail(&sta->asoc_list, &stapriv->asoc_list); -+ stapriv->asoc_list_cnt++; -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (sta_tbtx_enable) { -+ sta->tbtx_enable = _TRUE; -+ stapriv->tbtx_asoc_list_cnt++; -+ } -+#endif -+ } -+ _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ -+ bss_cap_update_on_sta_join(adapter, sta); -+ sta_info_update(adapter, sta); -+ report_add_sta_event(adapter, sta->cmn.mac_addr); -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+int rtw_mesh_set_plink_state(_adapter *adapter, const u8 *mac, u8 plink_state) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *plink = NULL; -+ _irqL irqL2; -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct sta_info *sta = NULL; -+ _irqL irqL; -+ struct sta_info *del_sta = NULL; -+ int ret = _SUCCESS; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL2); -+ -+ plink = _rtw_mesh_plink_get(adapter, mac); -+ if (!plink) { -+ ret = _FAIL; -+ goto release_plink_ctl; -+ } -+ -+ plink->plink_state = plink_state; -+ -+ #if CONFIG_RTW_MESH_ACNODE_PREVENT -+ if (plink_state == RTW_MESH_PLINK_OPN_SNT) { -+ if (rtw_mesh_scanned_is_acnode_confirmed(adapter, plink->scanned) -+ && rtw_mesh_acnode_prevent_allow_sacrifice(adapter) -+ ) { -+ struct sta_info *sac = rtw_mesh_acnode_prevent_pick_sacrifice(adapter); -+ -+ if (sac) { -+ del_sta = sac; -+ _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ if (!rtw_is_list_empty(&del_sta->asoc_list)) { -+ rtw_list_delete(&del_sta->asoc_list); -+ stapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (del_sta->tbtx_enable) -+ stapriv->tbtx_asoc_list_cnt--; -+ #endif -+ STA_SET_MESH_PLINK(del_sta, NULL); -+ } -+ _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ RTW_INFO(FUNC_ADPT_FMT" sacrifice "MAC_FMT" for acnode\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(del_sta->cmn.mac_addr)); -+ } -+ } -+ } else -+ #endif -+ if (plink_state == RTW_MESH_PLINK_OPN_RCVD -+ || plink_state == RTW_MESH_PLINK_CNF_RCVD -+ || plink_state == RTW_MESH_PLINK_ESTAB -+ ) { -+ sta = rtw_get_stainfo(stapriv, mac); -+ if (!sta) { -+ sta = rtw_alloc_stainfo(stapriv, mac); -+ if (!sta) -+ goto release_plink_ctl; -+ } -+ -+ if (plink_state == RTW_MESH_PLINK_ESTAB) { -+ if (rtw_mesh_peer_establish(adapter, plink, sta) != _SUCCESS) { -+ del_sta = sta; -+ ret = _FAIL; -+ goto release_plink_ctl; -+ } -+ } -+ } -+ else if (plink_state == RTW_MESH_PLINK_HOLDING) { -+ del_sta = rtw_get_stainfo(stapriv, mac); -+ if (!del_sta) -+ goto release_plink_ctl; -+ -+ _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ if (!rtw_is_list_empty(&del_sta->asoc_list)) { -+ rtw_list_delete(&del_sta->asoc_list); -+ stapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (del_sta->tbtx_enable) -+ stapriv->tbtx_asoc_list_cnt--; -+ #endif -+ STA_SET_MESH_PLINK(del_sta, NULL); -+ } -+ _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ } -+ -+release_plink_ctl: -+ _exit_critical_bh(&(plink_ctl->lock), &irqL2); -+ -+ if (del_sta) { -+ u8 sta_addr[ETH_ALEN]; -+ u8 updated = _FALSE; -+ -+ _rtw_memcpy(sta_addr, del_sta->cmn.mac_addr, ETH_ALEN); -+ updated = ap_free_sta(adapter, del_sta, 0, 0, 1); -+ rtw_mesh_expire_peer(stapriv->padapter, sta_addr); -+ -+ associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL); -+ } -+ -+ return ret; -+} -+ -+struct mesh_set_plink_cmd_parm { -+ const u8 *mac; -+ u8 plink_state; -+}; -+ -+u8 rtw_mesh_set_plink_state_cmd_hdl(_adapter *adapter, u8 *parmbuf) -+{ -+ struct mesh_set_plink_cmd_parm *parm = (struct mesh_set_plink_cmd_parm *)parmbuf; -+ -+ if (rtw_mesh_set_plink_state(adapter, parm->mac, parm->plink_state) == _SUCCESS) -+ return H2C_SUCCESS; -+ -+ return H2C_CMD_FAIL; -+} -+ -+u8 rtw_mesh_set_plink_state_cmd(_adapter *adapter, const u8 *mac, u8 plink_state) -+{ -+ struct cmd_obj *cmdobj; -+ struct mesh_set_plink_cmd_parm *parm; -+ struct cmd_priv *cmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ /* prepare cmd parameter */ -+ parm = rtw_zmalloc(sizeof(*parm)); -+ if (parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ parm->mac = mac; -+ parm->plink_state = plink_state; -+ -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ cmdobj = rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ rtw_mfree(parm, sizeof(*parm)); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_MESH_PLINK_STATE); -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 2000); -+ -+ res = rtw_enqueue_cmd(cmdpriv, cmdobj); -+ if (res == _SUCCESS) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&cmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&cmdpriv->sctx_mutex, NULL); -+ if (sctx.status != RTW_SCTX_DONE_SUCCESS) -+ res = _FAIL; -+ } -+ -+exit: -+ return res; -+} -+ -+void rtw_mesh_expire_peer_notify(_adapter *adapter, const u8 *peer_addr) -+{ -+ u8 null_ssid[2] = {0, 0}; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_notify_new_peer_candidate(adapter->rtw_wdev -+ , peer_addr -+ , null_ssid -+ , 2 -+ , 0 -+ , GFP_ATOMIC -+ ); -+#endif -+ -+ return; -+} -+ -+static u8 *rtw_mesh_construct_peer_mesh_close(_adapter *adapter, struct mesh_plink_ent *plink, u16 reason, u32 *len) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ u8 *frame = NULL, *pos; -+ u32 flen; -+ struct rtw_ieee80211_hdr *whdr; -+ -+ if (minfo->mesh_auth_id && !MESH_PLINK_AEK_VALID(plink)) -+ goto exit; -+ -+ flen = sizeof(struct rtw_ieee80211_hdr_3addr) -+ + 2 /* category, action */ -+ + 2 + minfo->mesh_id_len /* mesh id */ -+ + 2 + 8 + (minfo->mesh_auth_id ? 16 : 0) /* mpm */ -+ + (minfo->mesh_auth_id ? 2 + 16 /* AES_BLOCK_SIZE */ : 0) /* mic */ -+ + (minfo->mesh_auth_id ? 70 : 0) /* ampe */ -+ ; -+ -+ pos = frame = rtw_zmalloc(flen); -+ if (!frame) -+ goto exit; -+ -+ whdr = (struct rtw_ieee80211_hdr *)frame; -+ _rtw_memcpy(whdr->addr1, adapter_mac_addr(adapter), ETH_ALEN); -+ _rtw_memcpy(whdr->addr2, plink->addr, ETH_ALEN); -+ _rtw_memcpy(whdr->addr3, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ set_frame_sub_type(frame, WIFI_ACTION); -+ -+ pos += sizeof(struct rtw_ieee80211_hdr_3addr); -+ *(pos++) = RTW_WLAN_CATEGORY_SELF_PROTECTED; -+ *(pos++) = RTW_ACT_SELF_PROTECTED_MESH_CLOSE; -+ -+ pos = rtw_set_ie_mesh_id(pos, NULL, minfo->mesh_id, minfo->mesh_id_len); -+ -+ pos = rtw_set_ie_mpm(pos, NULL -+ , minfo->mesh_auth_id ? 1 : 0 -+ , plink->plid -+ , &plink->llid -+ , &reason -+ , minfo->mesh_auth_id ? plink->chosen_pmk : NULL); -+ -+#ifdef CONFIG_RTW_MESH_AEK -+ if (minfo->mesh_auth_id) { -+ u8 ampe_buf[70]; -+ int enc_ret; -+ -+ *pos = WLAN_EID_MIC; -+ *(pos + 1) = 16 /* AES_BLOCK_SIZE */; -+ -+ ampe_buf[0] = WLAN_EID_AMPE; -+ ampe_buf[1] = 68; -+ _rtw_memcpy(ampe_buf + 2, plink->sel_pcs, 4); -+ _rtw_memcpy(ampe_buf + 6, plink->p_nonce, 32); -+ _rtw_memcpy(ampe_buf + 38, plink->l_nonce, 32); -+ -+ enc_ret = rtw_mpm_ampe_enc(adapter, plink -+ , frame + sizeof(struct rtw_ieee80211_hdr_3addr) -+ , pos, ampe_buf, 1); -+ if (enc_ret != _SUCCESS) { -+ rtw_mfree(frame, flen); -+ frame = NULL; -+ goto exit; -+ } -+ } -+#endif -+ -+ *len = flen; -+ -+exit: -+ return frame; -+} -+ -+void _rtw_mesh_expire_peer_ent(_adapter *adapter, struct mesh_plink_ent *plink) -+{ -+#if defined(CONFIG_RTW_MESH_STA_DEL_DISASOC) -+ _rtw_mesh_plink_del_ent(adapter, plink); -+ rtw_cfg80211_indicate_sta_disassoc(adapter, plink->addr, 0); -+#else -+ u8 *frame = NULL; -+ u32 flen; -+ -+ if (plink->plink_state == RTW_MESH_PLINK_ESTAB) -+ frame = rtw_mesh_construct_peer_mesh_close(adapter, plink, WLAN_REASON_MESH_CLOSE, &flen); -+ -+ if (frame) { -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ struct wireless_dev *wdev = adapter->rtw_wdev; -+ s32 freq = rtw_ch2freq(mlmeext->cur_channel); -+ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, flen, GFP_ATOMIC); -+ #else -+ cfg80211_rx_action(adapter->pnetdev, freq, frame, flen, GFP_ATOMIC); -+ #endif -+ -+ rtw_mfree(frame, flen); -+ } else { -+ rtw_mesh_expire_peer_notify(adapter, plink->addr); -+ RTW_INFO(FUNC_ADPT_FMT" set "MAC_FMT" plink unknown\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(plink->addr)); -+ plink->plink_state = RTW_MESH_PLINK_UNKNOWN; -+ } -+#endif -+} -+ -+void rtw_mesh_expire_peer(_adapter *adapter, const u8 *peer_addr) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *plink; -+ _irqL irqL; -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ plink = _rtw_mesh_plink_get(adapter, peer_addr); -+ if (!plink) -+ goto exit; -+ -+ _rtw_mesh_expire_peer_ent(adapter, plink); -+ -+exit: -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+} -+ -+u8 rtw_mesh_ps_annc(_adapter *adapter, u8 ps) -+{ -+ _irqL irqL; -+ _list *head, *list; -+ struct sta_info *sta; -+ struct sta_priv *stapriv = &adapter->stapriv; -+ u8 sta_alive_num = 0, i; -+ char sta_alive_list[NUM_STA]; -+ u8 annc_cnt = 0; -+ -+ if (rtw_linked_check(adapter) == _FALSE) -+ goto exit; -+ -+ _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ -+ head = &stapriv->asoc_list; -+ list = get_next(head); -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ int stainfo_offset; -+ -+ sta = LIST_CONTAINOR(list, struct sta_info, asoc_list); -+ list = get_next(list); -+ -+ stainfo_offset = rtw_stainfo_offset(stapriv, sta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ sta_alive_list[sta_alive_num++] = stainfo_offset; -+ } -+ _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ -+ for (i = 0; i < sta_alive_num; i++) { -+ sta = rtw_get_stainfo_by_offset(stapriv, sta_alive_list[i]); -+ if (!sta) -+ continue; -+ -+ issue_qos_nulldata(adapter, sta->cmn.mac_addr, 7, ps, 3, 500); -+ annc_cnt++; -+ } -+ -+exit: -+ return annc_cnt; -+} -+ -+static void mpath_tx_tasklet_hdl(void *priv) -+{ -+ _adapter *adapter = (_adapter *)priv; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct xmit_frame *xframe; -+ _list *list, *head; -+ _list tmp; -+ u32 tmp_len; -+ s32 res; -+ -+ _rtw_init_listhead(&tmp); -+ -+ while (1) { -+ tmp_len = 0; -+ enter_critical_bh(&minfo->mpath_tx_queue.lock); -+ if (minfo->mpath_tx_queue_len) { -+ rtw_list_splice_init(&minfo->mpath_tx_queue.queue, &tmp); -+ tmp_len = minfo->mpath_tx_queue_len; -+ minfo->mpath_tx_queue_len = 0; -+ } -+ exit_critical_bh(&minfo->mpath_tx_queue.lock); -+ -+ if (!tmp_len) -+ break; -+ -+ head = &tmp; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ xframe = LIST_CONTAINOR(list, struct xmit_frame, list); -+ list = get_next(list); -+ rtw_list_delete(&xframe->list); -+ res = rtw_xmit_posthandle(adapter, xframe, xframe->pkt); -+ if (res < 0) { -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s rtw_xmit fail\n", __FUNCTION__); -+ #endif -+ adapter->xmitpriv.tx_drop++; -+ } -+ } -+ } -+} -+ -+static void rtw_mpath_tx_queue_flush(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct xmit_frame *xframe; -+ _list *list, *head; -+ _list tmp; -+ -+ _rtw_init_listhead(&tmp); -+ -+ enter_critical_bh(&minfo->mpath_tx_queue.lock); -+ rtw_list_splice_init(&minfo->mpath_tx_queue.queue, &tmp); -+ minfo->mpath_tx_queue_len = 0; -+ exit_critical_bh(&minfo->mpath_tx_queue.lock); -+ -+ head = &tmp; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ xframe = LIST_CONTAINOR(list, struct xmit_frame, list); -+ list = get_next(list); -+ rtw_list_delete(&xframe->list); -+ rtw_free_xmitframe(&adapter->xmitpriv, xframe); -+ } -+} -+ -+#ifdef PLATFORM_LINUX /* 3.10 ~ 4.13 checked */ -+#if defined(CONFIG_SLUB) -+#include -+#elif defined(CONFIG_SLAB) -+#include -+#endif -+typedef struct kmem_cache rtw_mcache; -+#endif -+ -+rtw_mcache *rtw_mcache_create(const char *name, size_t size) -+{ -+#ifdef PLATFORM_LINUX /* 3.10 ~ 4.13 checked */ -+ return kmem_cache_create(name, size, 0, 0, NULL); -+#else -+ #error "TBD\n"; -+#endif -+} -+ -+void rtw_mcache_destroy(rtw_mcache *s) -+{ -+#ifdef PLATFORM_LINUX /* 3.10 ~ 4.13 checked */ -+ kmem_cache_destroy(s); -+#else -+ #error "TBD\n"; -+#endif -+} -+ -+void *_rtw_mcache_alloc(rtw_mcache *cachep) -+{ -+#ifdef PLATFORM_LINUX /* 3.10 ~ 4.13 checked */ -+ return kmem_cache_alloc(cachep, GFP_ATOMIC); -+#else -+ #error "TBD\n"; -+#endif -+} -+ -+void _rtw_mcache_free(rtw_mcache *cachep, void *objp) -+{ -+#ifdef PLATFORM_LINUX /* 3.10 ~ 4.13 checked */ -+ kmem_cache_free(cachep, objp); -+#else -+ #error "TBD\n"; -+#endif -+} -+ -+#ifdef DBG_MEM_ALLOC -+inline void *dbg_rtw_mcache_alloc(rtw_mcache *cachep, const enum mstat_f flags, const char *func, const int line) -+{ -+ void *p; -+ u32 sz = cachep->size; -+ -+ if (match_mstat_sniff_rules(flags, sz)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%u)\n", func, line, __func__, sz); -+ -+ p = _rtw_mcache_alloc(cachep); -+ -+ rtw_mstat_update( -+ flags -+ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , sz -+ ); -+ -+ return p; -+} -+ -+inline void dbg_rtw_mcache_free(rtw_mcache *cachep, void *pbuf, const enum mstat_f flags, const char *func, const int line) -+{ -+ u32 sz = cachep->size; -+ -+ if (match_mstat_sniff_rules(flags, sz)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%u)\n", func, line, __func__, sz); -+ -+ _rtw_mcache_free(cachep, pbuf); -+ -+ rtw_mstat_update( -+ flags -+ , MSTAT_FREE -+ , sz -+ ); -+} -+ -+#define rtw_mcache_alloc(cachep) dbg_rtw_mcache_alloc(cachep, MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_mcache_free(cachep, objp) dbg_rtw_mcache_free(cachep, objp, MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#else -+#define rtw_mcache_alloc(cachep) _rtw_mcache_alloc(cachep) -+#define rtw_mcache_free(cachep, objp) _rtw_mcache_free(cachep, objp) -+#endif /* DBG_MEM_ALLOC */ -+ -+/* Mesh Received Cache */ -+#define RTW_MRC_BUCKETS 256 /* must be a power of 2 */ -+#define RTW_MRC_QUEUE_MAX_LEN 4 -+#define RTW_MRC_TIMEOUT_MS (3 * 1000) -+ -+/** -+ * struct rtw_mrc_entry - entry in the Mesh Received Cache -+ * -+ * @seqnum: mesh sequence number of the frame -+ * @exp_time: expiration time of the entry -+ * @msa: mesh source address of the frame -+ * @list: hashtable list pointer -+ * -+ * The Mesh Received Cache keeps track of the latest received frames that -+ * have been received by a mesh interface and discards received frames -+ * that are found in the cache. -+ */ -+struct rtw_mrc_entry { -+ rtw_hlist_node list; -+ systime exp_time; -+ u32 seqnum; -+ u8 msa[ETH_ALEN]; -+}; -+ -+struct rtw_mrc { -+ rtw_hlist_head bucket[RTW_MRC_BUCKETS]; -+ u32 idx_mask; -+ rtw_mcache *cache; -+}; -+ -+static int rtw_mrc_init(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ char cache_name[IFNAMSIZ + 8 + 1]; -+ int i; -+ -+ minfo->mrc = rtw_malloc(sizeof(struct rtw_mrc)); -+ if (!minfo->mrc) -+ return -ENOMEM; -+ minfo->mrc->idx_mask = RTW_MRC_BUCKETS - 1; -+ for (i = 0; i < RTW_MRC_BUCKETS; i++) -+ rtw_hlist_head_init(&minfo->mrc->bucket[i]); -+ -+ sprintf(cache_name, "rtw_mrc_%s", ADPT_ARG(adapter)); -+ minfo->mrc->cache = rtw_mcache_create(cache_name, sizeof(struct rtw_mrc_entry)); -+ -+ return 0; -+} -+ -+static void rtw_mrc_free(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct rtw_mrc *mrc = minfo->mrc; -+ struct rtw_mrc_entry *p; -+ rtw_hlist_node *np, *n; -+ int i; -+ -+ if (!mrc) -+ return; -+ -+ for (i = 0; i < RTW_MRC_BUCKETS; i++) { -+ rtw_hlist_for_each_entry_safe(p, np, n, &mrc->bucket[i], list) { -+ rtw_hlist_del(&p->list); -+ rtw_mcache_free(mrc->cache, p); -+ } -+ } -+ -+ rtw_mcache_destroy(mrc->cache); -+ -+ rtw_mfree(mrc, sizeof(struct rtw_mrc)); -+ minfo->mrc = NULL; -+} -+ -+/** -+ * rtw_mrc_check - Check frame in mesh received cache and add if absent. -+ * -+ * @adapter: interface -+ * @msa: mesh source address -+ * @seq: mesh seq number -+ * -+ * Returns: 0 if the frame is not in the cache, nonzero otherwise. -+ * -+ * Checks using the mesh source address and the mesh sequence number if we have -+ * received this frame lately. If the frame is not in the cache, it is added to -+ * it. -+ */ -+static int rtw_mrc_check(_adapter *adapter, const u8 *msa, u32 seq) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct rtw_mrc *mrc = minfo->mrc; -+ int entries = 0; -+ u8 idx; -+ struct rtw_mrc_entry *p; -+ rtw_hlist_node *np, *n; -+ u8 timeout; -+ -+ if (!mrc) -+ return -1; -+ -+ idx = seq & mrc->idx_mask; -+ rtw_hlist_for_each_entry_safe(p, np, n, &mrc->bucket[idx], list) { -+ ++entries; -+ timeout = rtw_time_after(rtw_get_current_time(), p->exp_time); -+ if (timeout || entries == RTW_MRC_QUEUE_MAX_LEN) { -+ if (!timeout) -+ minfo->mshstats.mrc_del_qlen++; -+ -+ rtw_hlist_del(&p->list); -+ rtw_mcache_free(mrc->cache, p); -+ --entries; -+ } else if ((seq == p->seqnum) && _rtw_memcmp(msa, p->msa, ETH_ALEN) == _TRUE) -+ return -1; -+ } -+ -+ p = rtw_mcache_alloc(mrc->cache); -+ if (!p) -+ return 0; -+ -+ p->seqnum = seq; -+ p->exp_time = rtw_get_current_time() + rtw_ms_to_systime(RTW_MRC_TIMEOUT_MS); -+ _rtw_memcpy(p->msa, msa, ETH_ALEN); -+ rtw_hlist_add_head(&p->list, &mrc->bucket[idx]); -+ return 0; -+} -+ -+static int rtw_mesh_decache(_adapter *adapter, const u8 *msa, u32 seq) -+{ -+ return rtw_mrc_check(adapter, msa, seq); -+} -+ -+#ifndef RTW_MESH_SCAN_RESULT_EXP_MS -+#define RTW_MESH_SCAN_RESULT_EXP_MS (10 * 1000) -+#endif -+ -+#ifndef RTW_MESH_ACNODE_PREVENT -+#define RTW_MESH_ACNODE_PREVENT 0 -+#endif -+#ifndef RTW_MESH_ACNODE_CONF_TIMEOUT_MS -+#define RTW_MESH_ACNODE_CONF_TIMEOUT_MS (20 * 1000) -+#endif -+#ifndef RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS -+#define RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS (2 * 1000) -+#endif -+ -+#ifndef RTW_MESH_OFFCH_CAND -+#define RTW_MESH_OFFCH_CAND 1 -+#endif -+#ifndef RTW_MESH_OFFCH_CAND_FIND_INT_MS -+#define RTW_MESH_OFFCH_CAND_FIND_INT_MS (10 * 1000) -+#endif -+ -+#ifndef RTW_MESH_PEER_CONF_TIMEOUT_MS -+#define RTW_MESH_PEER_CONF_TIMEOUT_MS (20 * 1000) -+#endif -+#ifndef RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS -+#define RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS (20 * 1000) -+#endif -+ -+#ifndef RTW_MESH_CTO_MGATE_REQUIRE -+#define RTW_MESH_CTO_MGATE_REQUIRE 0 -+#endif -+#ifndef RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS -+#define RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS (20 * 1000) -+#endif -+#ifndef RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS -+#define RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS (20 * 1000) -+#endif -+ -+void rtw_mesh_cfg_init_peer_sel_policy(struct rtw_mesh_cfg *mcfg) -+{ -+ struct mesh_peer_sel_policy *sel_policy = &mcfg->peer_sel_policy; -+ -+ sel_policy->scanr_exp_ms = RTW_MESH_SCAN_RESULT_EXP_MS; -+ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+ sel_policy->acnode_prevent = RTW_MESH_ACNODE_PREVENT; -+ sel_policy->acnode_conf_timeout_ms = RTW_MESH_ACNODE_CONF_TIMEOUT_MS; -+ sel_policy->acnode_notify_timeout_ms = RTW_MESH_ACNODE_NOTIFY_TIMEOUT_MS; -+#endif -+ -+#if CONFIG_RTW_MESH_OFFCH_CAND -+ sel_policy->offch_cand = RTW_MESH_OFFCH_CAND; -+ sel_policy->offch_find_int_ms = RTW_MESH_OFFCH_CAND_FIND_INT_MS; -+#endif -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+ sel_policy->peer_conf_timeout_ms = RTW_MESH_PEER_CONF_TIMEOUT_MS; -+ sel_policy->peer_blacklist_timeout_ms = RTW_MESH_PEER_BLACKLIST_TIMEOUT_MS; -+#endif -+ -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ sel_policy->cto_mgate_require = RTW_MESH_CTO_MGATE_REQUIRE; -+ sel_policy->cto_mgate_conf_timeout_ms = RTW_MESH_CTO_MGATE_CONF_TIMEOUT_MS; -+ sel_policy->cto_mgate_blacklist_timeout_ms = RTW_MESH_CTO_MGATE_BLACKLIST_TIMEOUT_MS; -+#endif -+} -+ -+void rtw_mesh_cfg_init(_adapter *adapter) -+{ -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ -+ mcfg->max_peer_links = RTW_MESH_MAX_PEER_LINKS; -+ mcfg->plink_timeout = RTW_MESH_PEER_LINK_TIMEOUT; -+ -+ mcfg->dot11MeshTTL = RTW_MESH_TTL; -+ mcfg->element_ttl = RTW_MESH_DEFAULT_ELEMENT_TTL; -+ mcfg->dot11MeshHWMPmaxPREQretries = RTW_MESH_MAX_PREQ_RETRIES; -+ mcfg->path_refresh_time = RTW_MESH_PATH_REFRESH_TIME; -+ mcfg->min_discovery_timeout = RTW_MESH_MIN_DISCOVERY_TIMEOUT; -+ mcfg->dot11MeshHWMPactivePathTimeout = RTW_MESH_PATH_TIMEOUT; -+ mcfg->dot11MeshHWMPpreqMinInterval = RTW_MESH_PREQ_MIN_INT; -+ mcfg->dot11MeshHWMPperrMinInterval = RTW_MESH_PERR_MIN_INT; -+ mcfg->dot11MeshHWMPnetDiameterTraversalTime = RTW_MESH_DIAM_TRAVERSAL_TIME; -+ mcfg->dot11MeshHWMPRootMode = RTW_IEEE80211_ROOTMODE_NO_ROOT; -+ mcfg->dot11MeshHWMPRannInterval = RTW_MESH_RANN_INTERVAL; -+ mcfg->dot11MeshGateAnnouncementProtocol = _FALSE; -+ mcfg->dot11MeshForwarding = _TRUE; -+ mcfg->rssi_threshold = 0; -+ mcfg->dot11MeshHWMPactivePathToRootTimeout = RTW_MESH_PATH_TO_ROOT_TIMEOUT; -+ mcfg->dot11MeshHWMProotInterval = RTW_MESH_ROOT_INTERVAL; -+ mcfg->dot11MeshHWMPconfirmationInterval = RTW_MESH_ROOT_CONFIRMATION_INTERVAL; -+ mcfg->path_gate_timeout_factor = 3; -+ rtw_mesh_cfg_init_peer_sel_policy(mcfg); -+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK -+ mcfg->sane_metric_delta = RTW_MESH_SANE_METRIC_DELTA; -+ mcfg->max_root_add_chk_cnt = RTW_MESH_MAX_ROOT_ADD_CHK_CNT; -+#endif -+ -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ mcfg->b2u_flags_msrc = regsty->msrc_b2u_flags; -+ mcfg->b2u_flags_mfwd = regsty->mfwd_b2u_flags; -+#endif -+} -+ -+void rtw_mesh_cfg_init_max_peer_links(_adapter *adapter, u8 stack_conf) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ -+ mcfg->max_peer_links = RTW_MESH_MAX_PEER_LINKS; -+ -+ if (mcfg->max_peer_links > stack_conf) -+ mcfg->max_peer_links = stack_conf; -+} -+ -+void rtw_mesh_cfg_init_plink_timeout(_adapter *adapter, u32 stack_conf) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ -+ mcfg->plink_timeout = stack_conf; -+} -+ -+void rtw_mesh_init_mesh_info(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ -+ _rtw_memset(minfo, 0, sizeof(struct rtw_mesh_info)); -+ -+ rtw_mesh_plink_ctl_init(adapter); -+ -+ minfo->last_preq = rtw_get_current_time(); -+ /* minfo->last_sn_update = rtw_get_current_time(); */ -+ minfo->next_perr = rtw_get_current_time(); -+ -+ ATOMIC_SET(&minfo->mpaths, 0); -+ rtw_mesh_pathtbl_init(adapter); -+ -+ _rtw_init_queue(&minfo->mpath_tx_queue); -+ tasklet_init(&minfo->mpath_tx_tasklet -+ , (void(*)(unsigned long))mpath_tx_tasklet_hdl -+ , (unsigned long)adapter); -+ -+ rtw_mrc_init(adapter); -+ -+ _rtw_init_listhead(&minfo->preq_queue.list); -+ _rtw_spinlock_init(&minfo->mesh_preq_queue_lock); -+ -+ rtw_init_timer(&adapter->mesh_path_timer, adapter, rtw_ieee80211_mesh_path_timer, adapter); -+ rtw_init_timer(&adapter->mesh_path_root_timer, adapter, rtw_ieee80211_mesh_path_root_timer, adapter); -+ rtw_init_timer(&adapter->mesh_atlm_param_req_timer, adapter, rtw_mesh_atlm_param_req_timer, adapter); -+ _init_workitem(&adapter->mesh_work, rtw_mesh_work_hdl, NULL); -+} -+ -+void rtw_mesh_deinit_mesh_info(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ -+ tasklet_kill(&minfo->mpath_tx_tasklet); -+ rtw_mpath_tx_queue_flush(adapter); -+ _rtw_deinit_queue(&adapter->mesh_info.mpath_tx_queue); -+ -+ rtw_mrc_free(adapter); -+ -+ rtw_mesh_pathtbl_unregister(adapter); -+ -+ rtw_mesh_plink_ctl_deinit(adapter); -+ -+ _cancel_workitem_sync(&adapter->mesh_work); -+ _cancel_timer_ex(&adapter->mesh_path_timer); -+ _cancel_timer_ex(&adapter->mesh_path_root_timer); -+ _cancel_timer_ex(&adapter->mesh_atlm_param_req_timer); -+} -+ -+/** -+ * rtw_mesh_nexthop_resolve - lookup next hop; conditionally start path discovery -+ * -+ * @skb: 802.11 frame to be sent -+ * @sdata: network subif the frame will be sent through -+ * -+ * Lookup next hop for given skb and start path discovery if no -+ * forwarding information is found. -+ * -+ * Returns: 0 if the next hop was found and -ENOENT if the frame was queued. -+ * skb is freeed here if no mpath could be allocated. -+ */ -+int rtw_mesh_nexthop_resolve(_adapter *adapter, -+ struct xmit_frame *xframe) -+{ -+ struct pkt_attrib *attrib = &xframe->attrib; -+ struct rtw_mesh_path *mpath; -+ struct xmit_frame *xframe_to_free = NULL; -+ u8 *target_addr = attrib->mda; -+ int err = 0; -+ int ret = _SUCCESS; -+ -+ rtw_rcu_read_lock(); -+ err = rtw_mesh_nexthop_lookup(adapter, target_addr, attrib->msa, attrib->ra); -+ if (!err) -+ goto endlookup; -+ -+ /* no nexthop found, start resolving */ -+ mpath = rtw_mesh_path_lookup(adapter, target_addr); -+ if (!mpath) { -+ mpath = rtw_mesh_path_add(adapter, target_addr); -+ if (IS_ERR(mpath)) { -+ xframe->pkt = NULL; /* free pkt outside */ -+ rtw_mesh_path_discard_frame(adapter, xframe); -+ err = PTR_ERR(mpath); -+ ret = _FAIL; -+ goto endlookup; -+ } -+ } -+ -+ if (!(mpath->flags & RTW_MESH_PATH_RESOLVING)) -+ rtw_mesh_queue_preq(mpath, RTW_PREQ_Q_F_START); -+ -+ enter_critical_bh(&mpath->frame_queue.lock); -+ -+ if (mpath->frame_queue_len >= RTW_MESH_FRAME_QUEUE_LEN) { -+ xframe_to_free = LIST_CONTAINOR(get_next(get_list_head(&mpath->frame_queue)), struct xmit_frame, list); -+ rtw_list_delete(&(xframe_to_free->list)); -+ mpath->frame_queue_len--; -+ } -+ -+ rtw_list_insert_tail(&xframe->list, get_list_head(&mpath->frame_queue)); -+ mpath->frame_queue_len++; -+ -+ exit_critical_bh(&mpath->frame_queue.lock); -+ -+ ret = RTW_RA_RESOLVING; -+ if (xframe_to_free) -+ rtw_mesh_path_discard_frame(adapter, xframe_to_free); -+ -+endlookup: -+ rtw_rcu_read_unlock(); -+ return ret; -+} -+ -+/** -+ * rtw_mesh_nexthop_lookup - put the appropriate next hop on a mesh frame. Calling -+ * this function is considered "using" the associated mpath, so preempt a path -+ * refresh if this mpath expires soon. -+ * -+ * @skb: 802.11 frame to be sent -+ * @sdata: network subif the frame will be sent through -+ * -+ * Returns: 0 if the next hop was found. Nonzero otherwise. -+ */ -+int rtw_mesh_nexthop_lookup(_adapter *adapter, -+ const u8 *mda, const u8 *msa, u8 *ra) -+{ -+ struct rtw_mesh_path *mpath; -+ struct sta_info *next_hop; -+ const u8 *target_addr = mda; -+ int err = -ENOENT; -+ struct registry_priv *registry_par = &adapter->registrypriv; -+ u8 peer_alive_based_preq = registry_par->peer_alive_based_preq; -+ BOOLEAN nexthop_alive = _TRUE; -+ -+ rtw_rcu_read_lock(); -+ mpath = rtw_mesh_path_lookup(adapter, target_addr); -+ -+ if (!mpath || !(mpath->flags & RTW_MESH_PATH_ACTIVE)) -+ goto endlookup; -+ -+ next_hop = rtw_rcu_dereference(mpath->next_hop); -+ if (next_hop) { -+ _rtw_memcpy(ra, next_hop->cmn.mac_addr, ETH_ALEN); -+ err = 0; -+ } -+ -+ if (peer_alive_based_preq && next_hop) -+ nexthop_alive = next_hop->alive; -+ -+ if (_rtw_memcmp(adapter_mac_addr(adapter), msa, ETH_ALEN) == _TRUE && -+ !(mpath->flags & RTW_MESH_PATH_RESOLVING) && -+ !(mpath->flags & RTW_MESH_PATH_FIXED)) { -+ u8 flags = RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_REFRESH; -+ -+ if (peer_alive_based_preq && nexthop_alive == _FALSE) { -+ flags |= RTW_PREQ_Q_F_BCAST_PREQ; -+ rtw_mesh_queue_preq(mpath, flags); -+ } else if (rtw_time_after(rtw_get_current_time(), -+ mpath->exp_time - -+ rtw_ms_to_systime(adapter->mesh_cfg.path_refresh_time))) { -+ rtw_mesh_queue_preq(mpath, flags); -+ } -+ /* Avoid keeping trying unicast PREQ toward root, -+ when next_hop leaves */ -+ } else if (peer_alive_based_preq && -+ _rtw_memcmp(adapter_mac_addr(adapter), msa, ETH_ALEN) == _TRUE && -+ (mpath->flags & RTW_MESH_PATH_RESOLVING) && -+ !(mpath->flags & RTW_MESH_PATH_FIXED) && -+ !(mpath->flags & RTW_MESH_PATH_BCAST_PREQ) && -+ mpath->is_root && nexthop_alive == _FALSE) { -+ enter_critical_bh(&mpath->state_lock); -+ mpath->flags |= RTW_MESH_PATH_BCAST_PREQ; -+ exit_critical_bh(&mpath->state_lock); -+ } -+ -+endlookup: -+ rtw_rcu_read_unlock(); -+ return err; -+} -+ -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+static bool rtw_mesh_data_bmc_to_uc(_adapter *adapter -+ , const u8 *da, const u8 *sa, const u8 *mda, const u8 *msa -+ , u8 ae_need, const u8 *ori_ta, u8 mfwd_ttl -+ , u16 os_qid, _list *b2u_list, u8 *b2u_num, u32 *b2u_mseq) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct xmit_priv *xmitpriv = &adapter->xmitpriv; -+ _irqL irqL; -+ _list *head, *list; -+ struct sta_info *sta; -+ char b2u_sta_id[NUM_STA]; -+ u8 b2u_sta_num = 0; -+ bool bmc_need = _FALSE; -+ int i; -+ -+ _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ head = &stapriv->asoc_list; -+ list = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ int stainfo_offset; -+ -+ sta = LIST_CONTAINOR(list, struct sta_info, asoc_list); -+ list = get_next(list); -+ -+ stainfo_offset = rtw_stainfo_offset(stapriv, sta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ b2u_sta_id[b2u_sta_num++] = stainfo_offset; -+ } -+ _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ -+ if (!b2u_sta_num) -+ goto exit; -+ -+ for (i = 0; i < b2u_sta_num; i++) { -+ struct xmit_frame *b2uframe; -+ struct pkt_attrib *attrib; -+ -+ sta = rtw_get_stainfo_by_offset(stapriv, b2u_sta_id[i]); -+ if (!(sta->state & WIFI_ASOC_STATE) -+ || _rtw_memcmp(sta->cmn.mac_addr, msa, ETH_ALEN) == _TRUE -+ || (ori_ta && _rtw_memcmp(sta->cmn.mac_addr, ori_ta, ETH_ALEN) == _TRUE) -+ || is_broadcast_mac_addr(sta->cmn.mac_addr) -+ || is_zero_mac_addr(sta->cmn.mac_addr)) -+ continue; -+ -+ b2uframe = rtw_alloc_xmitframe(xmitpriv, os_qid); -+ if (!b2uframe) { -+ bmc_need = _TRUE; -+ break; -+ } -+ -+ if ((*b2u_num)++ == 0 && !ori_ta) { -+ *b2u_mseq = (cpu_to_le32(adapter->mesh_info.mesh_seqnum)); -+ adapter->mesh_info.mesh_seqnum++; -+ } -+ -+ attrib = &b2uframe->attrib; -+ -+ attrib->mb2u = 1; -+ attrib->mseq = *b2u_mseq; -+ attrib->mfwd_ttl = ori_ta ? mfwd_ttl : 0; -+ _rtw_memcpy(attrib->ra, sta->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy(attrib->ta, adapter_mac_addr(adapter), ETH_ALEN); -+ _rtw_memcpy(attrib->mda, mda, ETH_ALEN); -+ _rtw_memcpy(attrib->msa, msa, ETH_ALEN); -+ _rtw_memcpy(attrib->dst, da, ETH_ALEN); -+ _rtw_memcpy(attrib->src, sa, ETH_ALEN); -+ attrib->mesh_frame_mode = ae_need ? MESH_UCAST_PX_DATA : MESH_UCAST_DATA; -+ -+ rtw_list_insert_tail(&b2uframe->list, b2u_list); -+ } -+ -+exit: -+ return bmc_need; -+} -+ -+void dump_mesh_b2u_flags(void *sel, _adapter *adapter) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ -+ RTW_PRINT_SEL(sel, "%4s %4s\n", "msrc", "mfwd"); -+ RTW_PRINT_SEL(sel, "0x%02x 0x%02x\n", mcfg->b2u_flags_msrc, mcfg->b2u_flags_mfwd); -+} -+#endif /* CONFIG_RTW_MESH_DATA_BMC_TO_UC */ -+ -+int rtw_mesh_addr_resolve(_adapter *adapter, u16 os_qid, struct xmit_frame *xframe, _pkt *pkt, _list *b2u_list) -+{ -+ struct pkt_file pktfile; -+ struct ethhdr etherhdr; -+ struct pkt_attrib *attrib; -+ struct rtw_mesh_path *mpath = NULL, *mppath = NULL; -+ u8 is_da_mcast; -+ u8 ae_need; -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ bool bmc_need = _TRUE; -+ u8 b2u_num = 0; -+ u32 b2u_mseq = 0; -+#endif -+ int res = _SUCCESS; -+ -+ _rtw_open_pktfile(pkt, &pktfile); -+ if (_rtw_pktfile_read(&pktfile, (u8 *)ðerhdr, ETH_HLEN) != ETH_HLEN) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ xframe->pkt = pkt; -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ _rtw_init_listhead(b2u_list); -+#endif -+ -+ is_da_mcast = IS_MCAST(etherhdr.h_dest); -+ if (!is_da_mcast) { -+ struct sta_info *next_hop; -+ bool mpp_lookup = 1; -+ -+ mpath = rtw_mesh_path_lookup(adapter, etherhdr.h_dest); -+ if (mpath) { -+ mpp_lookup = 0; -+ next_hop = rtw_rcu_dereference(mpath->next_hop); -+ if (!next_hop -+ || !(mpath->flags & (RTW_MESH_PATH_ACTIVE | RTW_MESH_PATH_RESOLVING)) -+ ) { -+ /* mpath is not valid, search mppath */ -+ mpp_lookup = 1; -+ } -+ } -+ -+ if (mpp_lookup) { -+ mppath = rtw_mpp_path_lookup(adapter, etherhdr.h_dest); -+ if (mppath) -+ mppath->exp_time = rtw_get_current_time(); -+ } -+ -+ if (mppath && mpath) -+ rtw_mesh_path_del(adapter, mpath->dst); -+ -+ ae_need = _rtw_memcmp(adapter_mac_addr(adapter), etherhdr.h_source, ETH_ALEN) == _FALSE -+ || (mppath && _rtw_memcmp(mppath->mpp, etherhdr.h_dest, ETH_ALEN) == _FALSE); -+ } else { -+ ae_need = _rtw_memcmp(adapter_mac_addr(adapter), etherhdr.h_source, ETH_ALEN) == _FALSE; -+ -+ #if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ if (rtw_msrc_b2u_policy_chk(adapter->mesh_cfg.b2u_flags_msrc, etherhdr.h_dest)) { -+ bmc_need = rtw_mesh_data_bmc_to_uc(adapter -+ , etherhdr.h_dest, etherhdr.h_source -+ , etherhdr.h_dest, adapter_mac_addr(adapter), ae_need, NULL, 0 -+ , os_qid, b2u_list, &b2u_num, &b2u_mseq); -+ if (bmc_need == _FALSE) { -+ res = RTW_BMC_NO_NEED; -+ goto exit; -+ } -+ } -+ #endif -+ } -+ -+ attrib = &xframe->attrib; -+ -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ if (b2u_num) { -+ attrib->mb2u = 1; -+ attrib->mseq = b2u_mseq; -+ } else -+ attrib->mb2u = 0; -+#endif -+ -+ attrib->mfwd_ttl = 0; -+ _rtw_memcpy(attrib->dst, etherhdr.h_dest, ETH_ALEN); -+ _rtw_memcpy(attrib->src, etherhdr.h_source, ETH_ALEN); -+ _rtw_memcpy(attrib->ta, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ if (is_da_mcast) { -+ attrib->mesh_frame_mode = ae_need ? MESH_BMCAST_PX_DATA : MESH_BMCAST_DATA; -+ _rtw_memcpy(attrib->ra, attrib->dst, ETH_ALEN); -+ _rtw_memcpy(attrib->msa, adapter_mac_addr(adapter), ETH_ALEN); -+ } else { -+ attrib->mesh_frame_mode = ae_need ? MESH_UCAST_PX_DATA : MESH_UCAST_DATA; -+ _rtw_memcpy(attrib->mda, (mppath && ae_need) ? mppath->mpp : attrib->dst, ETH_ALEN); -+ _rtw_memcpy(attrib->msa, adapter_mac_addr(adapter), ETH_ALEN); -+ /* RA needs to be resolved */ -+ res = rtw_mesh_nexthop_resolve(adapter, xframe); -+ } -+ -+exit: -+ return res; -+} -+ -+s8 rtw_mesh_tx_set_whdr_mctrl_len(u8 mesh_frame_mode, struct pkt_attrib *attrib) -+{ -+ u8 ret = 0; -+ switch (mesh_frame_mode) { -+ case MESH_UCAST_DATA: -+ attrib->hdrlen = WLAN_HDR_A4_QOS_LEN; -+ /* mesh flag + mesh TTL + Mesh SN. no ext addr. */ -+ attrib->meshctrl_len = 6; -+ break; -+ case MESH_BMCAST_DATA: -+ attrib->hdrlen = WLAN_HDR_A3_QOS_LEN; -+ /* mesh flag + mesh TTL + Mesh SN. no ext addr. */ -+ attrib->meshctrl_len = 6; -+ break; -+ case MESH_UCAST_PX_DATA: -+ attrib->hdrlen = WLAN_HDR_A4_QOS_LEN; -+ /* mesh flag + mesh TTL + Mesh SN + extaddr1 + extaddr2. */ -+ attrib->meshctrl_len = 18; -+ break; -+ case MESH_BMCAST_PX_DATA: -+ attrib->hdrlen = WLAN_HDR_A3_QOS_LEN; -+ /* mesh flag + mesh TTL + Mesh SN + extaddr1 */ -+ attrib->meshctrl_len = 12; -+ break; -+ default: -+ RTW_WARN("Invalid mesh frame mode:%u\n", mesh_frame_mode); -+ ret = -1; -+ break; -+ } -+ -+ return ret; -+} -+ -+void rtw_mesh_tx_build_mctrl(_adapter *adapter, struct pkt_attrib *attrib, u8 *buf) -+{ -+ struct rtw_ieee80211s_hdr *mctrl = (struct rtw_ieee80211s_hdr *)buf; -+ -+ _rtw_memset(mctrl, 0, XATTRIB_GET_MCTRL_LEN(attrib)); -+ -+ if (attrib->mfwd_ttl -+ #if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ || attrib->mb2u -+ #endif -+ ) { -+ #if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ if (!attrib->mfwd_ttl) -+ mctrl->ttl = adapter->mesh_cfg.dot11MeshTTL; -+ else -+ #endif -+ mctrl->ttl = attrib->mfwd_ttl; -+ -+ mctrl->seqnum = (cpu_to_le32(attrib->mseq)); -+ } else { -+ mctrl->ttl = adapter->mesh_cfg.dot11MeshTTL; -+ mctrl->seqnum = (cpu_to_le32(adapter->mesh_info.mesh_seqnum)); -+ adapter->mesh_info.mesh_seqnum++; -+ } -+ -+ switch (attrib->mesh_frame_mode){ -+ case MESH_UCAST_DATA: -+ case MESH_BMCAST_DATA: -+ break; -+ case MESH_UCAST_PX_DATA: -+ mctrl->flags |= MESH_FLAGS_AE_A5_A6; -+ _rtw_memcpy(mctrl->eaddr1, attrib->dst, ETH_ALEN); -+ _rtw_memcpy(mctrl->eaddr2, attrib->src, ETH_ALEN); -+ break; -+ case MESH_BMCAST_PX_DATA: -+ mctrl->flags |= MESH_FLAGS_AE_A4; -+ _rtw_memcpy(mctrl->eaddr1, attrib->src, ETH_ALEN); -+ break; -+ case MESH_MHOP_UCAST_ACT: -+ /* TBD */ -+ break; -+ case MESH_MHOP_BMCAST_ACT: -+ /* TBD */ -+ break; -+ default: -+ break; -+ } -+} -+ -+u8 rtw_mesh_tx_build_whdr(_adapter *adapter, struct pkt_attrib *attrib -+ , u16 *fctrl, struct rtw_ieee80211_hdr *whdr) -+{ -+ switch (attrib->mesh_frame_mode) { -+ case MESH_UCAST_DATA: /* 1, 1, RA, TA, mDA(=DA), mSA(=SA) */ -+ case MESH_UCAST_PX_DATA: /* 1, 1, RA, TA, mDA, mSA, [DA, SA] */ -+ SetToDs(fctrl); -+ SetFrDs(fctrl); -+ _rtw_memcpy(whdr->addr1, attrib->ra, ETH_ALEN); -+ _rtw_memcpy(whdr->addr2, attrib->ta, ETH_ALEN); -+ _rtw_memcpy(whdr->addr3, attrib->mda, ETH_ALEN); -+ _rtw_memcpy(whdr->addr4, attrib->msa, ETH_ALEN); -+ break; -+ case MESH_BMCAST_DATA: /* 0, 1, RA(DA), TA, mSA(SA) */ -+ case MESH_BMCAST_PX_DATA: /* 0, 1, RA(DA), TA, mSA, [SA] */ -+ SetFrDs(fctrl); -+ _rtw_memcpy(whdr->addr1, attrib->ra, ETH_ALEN); -+ _rtw_memcpy(whdr->addr2, attrib->ta, ETH_ALEN); -+ _rtw_memcpy(whdr->addr3, attrib->msa, ETH_ALEN); -+ break; -+ case MESH_MHOP_UCAST_ACT: -+ /* TBD */ -+ RTW_INFO("MESH_MHOP_UCAST_ACT\n"); -+ break; -+ case MESH_MHOP_BMCAST_ACT: -+ /* TBD */ -+ RTW_INFO("MESH_MHOP_BMCAST_ACT\n"); -+ break; -+ default: -+ RTW_WARN("Invalid mesh frame mode\n"); -+ break; -+ } -+ -+ return 0; -+} -+ -+int rtw_mesh_rx_data_validate_hdr(_adapter *adapter, union recv_frame *rframe, struct sta_info **sta) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib; -+ u8 *whdr = get_recvframe_data(rframe); -+ u8 is_ra_bmc = 0; -+ u8 a4_shift = 0; -+ u8 ps; -+ u8 *qc; -+ u8 mps_mode = RTW_MESH_PS_UNKNOWN; -+ sint ret = _FAIL; -+ -+ if (!(MLME_STATE(adapter) & WIFI_ASOC_STATE)) -+ goto exit; -+ -+ if (!rattrib->qos) -+ goto exit; -+ -+ switch (rattrib->to_fr_ds) { -+ case 2: -+ if (!IS_MCAST(GetAddr1Ptr(whdr))) -+ goto exit; -+ *sta = rtw_get_stainfo(stapriv, get_addr2_ptr(whdr)); -+ if (*sta == NULL) { -+ ret = _SUCCESS; /* return _SUCCESS to drop at sta checking */ -+ goto exit; -+ } -+ _rtw_memcpy(rattrib->ra, GetAddr1Ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->ta, get_addr2_ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->mda, GetAddr1Ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->msa, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */ -+ _rtw_memcpy(rattrib->dst, GetAddr1Ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->src, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking mesh ctrl field */ -+ _rtw_memcpy(rattrib->bssid, get_addr2_ptr(whdr), ETH_ALEN); -+ is_ra_bmc = 1; -+ break; -+ case 3: -+ if (IS_MCAST(GetAddr1Ptr(whdr))) -+ goto exit; -+ *sta = rtw_get_stainfo(stapriv, get_addr2_ptr(whdr)); -+ if (*sta == NULL) { -+ ret = _SUCCESS; /* return _SUCCESS to drop at sta checking */ -+ goto exit; -+ } -+ _rtw_memcpy(rattrib->ra, GetAddr1Ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->ta, get_addr2_ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->mda, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */ -+ _rtw_memcpy(rattrib->msa, GetAddr4Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */ -+ _rtw_memcpy(rattrib->dst, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking mesh ctrl field */ -+ _rtw_memcpy(rattrib->src, GetAddr4Ptr(whdr), ETH_ALEN); /* may change after checking mesh ctrl field */ -+ _rtw_memcpy(rattrib->bssid, get_addr2_ptr(whdr), ETH_ALEN); -+ a4_shift = ETH_ALEN; -+ break; -+ default: -+ goto exit; -+ } -+ -+ qc = whdr + WLAN_HDR_A3_LEN + a4_shift; -+ ps = GetPwrMgt(whdr); -+ mps_mode = ps ? (is_ra_bmc || (get_mps_lv(qc)) ? RTW_MESH_PS_DSLEEP : RTW_MESH_PS_LSLEEP) : RTW_MESH_PS_ACTIVE; -+ -+ if (ps) { -+ if (!((*sta)->state & WIFI_SLEEP_STATE)) -+ stop_sta_xmit(adapter, *sta); -+ } else { -+ if ((*sta)->state & WIFI_SLEEP_STATE) -+ wakeup_sta_to_xmit(adapter, *sta); -+ } -+ -+ if (is_ra_bmc) -+ (*sta)->nonpeer_mps = mps_mode; -+ else { -+ (*sta)->peer_mps = mps_mode; -+ if (mps_mode != RTW_MESH_PS_ACTIVE && (*sta)->nonpeer_mps == RTW_MESH_PS_ACTIVE) -+ (*sta)->nonpeer_mps = RTW_MESH_PS_DSLEEP; -+ } -+ -+ if (get_frame_sub_type(whdr) & BIT(6)) { -+ /* No data, will not indicate to upper layer, temporily count it here */ -+ count_rx_stats(adapter, rframe, *sta); -+ ret = RTW_RX_HANDLED; -+ goto exit; -+ } -+ -+ rattrib->mesh_ctrl_present = get_mctrl_present(qc) ? 1 : 0; -+ if (!rattrib->mesh_ctrl_present) -+ goto exit; -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+int rtw_mesh_rx_data_validate_mctrl(_adapter *adapter, union recv_frame *rframe -+ , const struct rtw_ieee80211s_hdr *mctrl, const u8 *mda, const u8 *msa -+ , u8 *mctrl_len -+ , const u8 **da, const u8 **sa) -+{ -+ struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib; -+ u8 mlen; -+ u8 ae; -+ int ret = _SUCCESS; -+ -+ ae = mctrl->flags & MESH_FLAGS_AE; -+ mlen = ae_to_mesh_ctrl_len[ae]; -+ switch (rattrib->to_fr_ds) { -+ case 2: -+ *da = mda; -+ if (ae == MESH_FLAGS_AE_A4) -+ *sa = mctrl->eaddr1; -+ else if (ae == 0) -+ *sa = msa; -+ else -+ ret = _FAIL; -+ break; -+ case 3: -+ if (ae == MESH_FLAGS_AE_A5_A6) { -+ *da = mctrl->eaddr1; -+ *sa = mctrl->eaddr2; -+ } else if (ae == 0) { -+ *da = mda; -+ *sa = msa; -+ } else -+ ret = _FAIL; -+ break; -+ default: -+ ret = _FAIL; -+ } -+ -+ if (ret == _FAIL) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" invalid tfDS:%u AE:%u combination ra="MAC_FMT" ta="MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), rattrib->to_fr_ds, ae, MAC_ARG(rattrib->ra), MAC_ARG(rattrib->ta)); -+ #endif -+ *mctrl_len = 0; -+ } else -+ *mctrl_len = mlen; -+ -+ return ret; -+} -+ -+inline int rtw_mesh_rx_validate_mctrl_non_amsdu(_adapter *adapter, union recv_frame *rframe) -+{ -+ struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib; -+ const u8 *da, *sa; -+ int ret; -+ -+ ret = rtw_mesh_rx_data_validate_mctrl(adapter, rframe -+ , (struct rtw_ieee80211s_hdr *)(get_recvframe_data(rframe) + rattrib->hdrlen + rattrib->iv_len) -+ , rattrib->mda, rattrib->msa -+ , &rattrib->mesh_ctrl_len -+ , &da, &sa); -+ -+ if (ret == _SUCCESS) { -+ _rtw_memcpy(rattrib->dst, da, ETH_ALEN); -+ _rtw_memcpy(rattrib->src, sa, ETH_ALEN); -+ } -+ -+ return ret; -+} -+ -+/** -+ * rtw_mesh_rx_nexthop_resolve - lookup next hop; conditionally start path discovery -+ * -+ * @skb: 802.11 frame to be sent -+ * @sdata: network subif the frame will be sent through -+ * -+ * Lookup next hop for given skb and start path discovery if no -+ * forwarding information is found. -+ * -+ * Returns: 0 if the next hop was found and -ENOENT if the frame was queued. -+ * skb is freeed here if no mpath could be allocated. -+ */ -+static int rtw_mesh_rx_nexthop_resolve(_adapter *adapter, -+ const u8 *mda, const u8 *msa, u8 *ra) -+{ -+ struct rtw_mesh_path *mpath; -+ struct xmit_frame *xframe_to_free = NULL; -+ int err = 0; -+ int ret = _SUCCESS; -+ -+ rtw_rcu_read_lock(); -+ err = rtw_mesh_nexthop_lookup(adapter, mda, msa, ra); -+ if (!err) -+ goto endlookup; -+ -+ /* no nexthop found, start resolving */ -+ mpath = rtw_mesh_path_lookup(adapter, mda); -+ if (!mpath) { -+ mpath = rtw_mesh_path_add(adapter, mda); -+ if (IS_ERR(mpath)) { -+ err = PTR_ERR(mpath); -+ ret = _FAIL; -+ goto endlookup; -+ } -+ } -+ -+ if (!(mpath->flags & RTW_MESH_PATH_RESOLVING)) -+ rtw_mesh_queue_preq(mpath, RTW_PREQ_Q_F_START); -+ -+ ret = _FAIL; -+ -+endlookup: -+ rtw_rcu_read_unlock(); -+ return ret; -+} -+ -+#define RTW_MESH_DECACHE_BMC 1 -+#define RTW_MESH_DECACHE_UC 0 -+ -+#define RTW_MESH_FORWARD_MDA_SELF_COND 0 -+#define DBG_RTW_MESH_FORWARD_MDA_SELF_COND 0 -+int rtw_mesh_rx_msdu_act_check(union recv_frame *rframe -+ , const u8 *mda, const u8 *msa -+ , const u8 *da, const u8 *sa -+ , struct rtw_ieee80211s_hdr *mctrl -+ , u8 *msdu, enum rtw_rx_llc_hdl llc_hdl -+ , struct xmit_frame **fwd_frame, _list *b2u_list) -+{ -+ _adapter *adapter = rframe->u.hdr.adapter; -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib; -+ struct rtw_mesh_path *mppath; -+ u8 is_mda_bmc = IS_MCAST(mda); -+ u8 is_mda_self = !is_mda_bmc && _rtw_memcmp(mda, adapter_mac_addr(adapter), ETH_ALEN); -+ u16 os_qid; -+ struct xmit_frame *xframe; -+ struct pkt_attrib *xattrib; -+ u8 fwd_ra[ETH_ALEN] = {0}; -+ u8 fwd_mpp[ETH_ALEN] = {0}; /* forward to other gate */ -+ u32 fwd_mseq; -+ int act = 0; -+ u8 ae_need; -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ bool bmc_need = _TRUE; -+ u8 b2u_num = 0; -+#endif -+ -+ /* fwd info lifetime update */ -+ #if 0 -+ if (!is_mda_self) -+ mDA(A3) fwinfo.lifetime -+ mSA(A4) fwinfo.lifetime -+ Precursor-to-mDA(A2) fwinfo.lifetime -+ #endif -+ -+ /* update/create pxoxy info for SA, mSA */ -+ if ((mctrl->flags & MESH_FLAGS_AE) -+ && sa != msa && _rtw_memcmp(sa, msa, ETH_ALEN) == _FALSE -+ ) { -+ const u8 *proxied_addr = sa; -+ const u8 *mpp_addr = msa; -+ -+ rtw_rcu_read_lock(); -+ mppath = rtw_mpp_path_lookup(adapter, proxied_addr); -+ if (!mppath) -+ rtw_mpp_path_add(adapter, proxied_addr, mpp_addr); -+ else { -+ enter_critical_bh(&mppath->state_lock); -+ if (_rtw_memcmp(mppath->mpp, mpp_addr, ETH_ALEN) == _FALSE) -+ _rtw_memcpy(mppath->mpp, mpp_addr, ETH_ALEN); -+ mppath->exp_time = rtw_get_current_time(); -+ exit_critical_bh(&mppath->state_lock); -+ } -+ rtw_rcu_read_unlock(); -+ } -+ -+ /* mSA is self, need no further process */ -+ if (_rtw_memcmp(msa, adapter_mac_addr(adapter), ETH_ALEN) == _TRUE) -+ goto exit; -+ -+ fwd_mseq = le32_to_cpu(mctrl->seqnum); -+ -+ /* check duplicate MSDU from mSA */ -+ if (((RTW_MESH_DECACHE_BMC && is_mda_bmc) -+ || (RTW_MESH_DECACHE_UC && !is_mda_bmc)) -+ && rtw_mesh_decache(adapter, msa, fwd_mseq) -+ ) { -+ minfo->mshstats.dropped_frames_duplicate++; -+ goto exit; -+ } -+ -+ if (is_mda_bmc) { -+ /* mDA is bmc addr */ -+ act |= RTW_RX_MSDU_ACT_INDICATE; -+ if (!mcfg->dot11MeshForwarding) -+ goto exit; -+ goto fwd_chk; -+ -+ } else if (!is_mda_self) { -+ /* mDA is unicast but not self */ -+ if (!mcfg->dot11MeshForwarding) { -+ rtw_mesh_path_error_tx(adapter -+ , adapter->mesh_cfg.element_ttl -+ , mda, 0 -+ , WLAN_REASON_MESH_PATH_NOFORWARD -+ , rattrib->ta -+ ); -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" mDA("MAC_FMT") not self, !dot11MeshForwarding\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(mda)); -+ #endif -+ goto exit; -+ } -+ -+ if (rtw_mesh_rx_nexthop_resolve(adapter, mda, msa, fwd_ra) != _SUCCESS) { -+ /* mDA is unknown */ -+ rtw_mesh_path_error_tx(adapter -+ , adapter->mesh_cfg.element_ttl -+ , mda, 0 -+ , WLAN_REASON_MESH_PATH_NOFORWARD -+ , rattrib->ta -+ ); -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" mDA("MAC_FMT") unknown\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(mda)); -+ #endif -+ minfo->mshstats.dropped_frames_no_route++; -+ goto exit; -+ -+ } else { -+ /* mDA is known in fwd info */ -+ #if 0 -+ if (TA is not in precursors) -+ goto exit; -+ #endif -+ goto fwd_chk; -+ } -+ -+ } else { -+ /* mDA is self */ -+ #if RTW_MESH_FORWARD_MDA_SELF_COND -+ if (da == mda -+ || _rtw_memcmp(da, adapter_mac_addr(adapter), ETH_ALEN) -+ ) { -+ /* DA is self, indicate */ -+ act |= RTW_RX_MSDU_ACT_INDICATE; -+ goto exit; -+ } -+ -+ if (rtw_get_iface_by_macddr(adapter, da)) { -+ /* DA is buddy, indicate */ -+ act |= RTW_RX_MSDU_ACT_INDICATE; -+ #if DBG_RTW_MESH_FORWARD_MDA_SELF_COND -+ RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") is buddy("ADPT_FMT")\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(da), ADPT_ARG(rtw_get_iface_by_macddr(adapter, da))); -+ #endif -+ goto exit; -+ } -+ -+ /* DA is not self or buddy */ -+ if (rtw_mesh_nexthop_lookup(adapter, da, msa, fwd_ra) == 0) { -+ /* DA is known in fwd info */ -+ if (!mcfg->dot11MeshForwarding) { -+ /* path error to? */ -+ #if defined(DBG_RX_DROP_FRAME) || DBG_RTW_MESH_FORWARD_MDA_SELF_COND -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") not self, !dot11MeshForwarding\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(da)); -+ #endif -+ goto exit; -+ } -+ mda = da; -+ #if DBG_RTW_MESH_FORWARD_MDA_SELF_COND -+ RTW_INFO(FUNC_ADPT_FMT" fwd to DA("MAC_FMT"), fwd_RA("MAC_FMT")\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(fwd_ra)); -+ #endif -+ goto fwd_chk; -+ } -+ -+ rtw_rcu_read_lock(); -+ mppath = rtw_mpp_path_lookup(adapter, da); -+ if (mppath) { -+ if (_rtw_memcmp(mppath->mpp, adapter_mac_addr(adapter), ETH_ALEN) == _FALSE) { -+ /* DA is proxied by others */ -+ if (!mcfg->dot11MeshForwarding) { -+ /* path error to? */ -+ #if defined(DBG_RX_DROP_FRAME) || DBG_RTW_MESH_FORWARD_MDA_SELF_COND -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by ("MAC_FMT"), !dot11MeshForwarding\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(mppath->mpp)); -+ #endif -+ rtw_rcu_read_unlock(); -+ goto exit; -+ } -+ _rtw_memcpy(fwd_mpp, mppath->mpp, ETH_ALEN); -+ mda = fwd_mpp; -+ msa = adapter_mac_addr(adapter); -+ rtw_rcu_read_unlock(); -+ -+ /* resolve RA */ -+ if (rtw_mesh_nexthop_lookup(adapter, mda, msa, fwd_ra) != 0) { -+ minfo->mshstats.dropped_frames_no_route++; -+ #if defined(DBG_RX_DROP_FRAME) || DBG_RTW_MESH_FORWARD_MDA_SELF_COND -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by ("MAC_FMT"), RA resolve fail\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(mppath->mpp)); -+ #endif -+ goto exit; -+ } -+ #if DBG_RTW_MESH_FORWARD_MDA_SELF_COND -+ RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by ("MAC_FMT"), fwd_RA("MAC_FMT")\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(da), MAC_ARG(mppath->mpp), MAC_ARG(fwd_ra)); -+ #endif -+ goto fwd_chk; /* forward to other gate */ -+ } else { -+ #if DBG_RTW_MESH_FORWARD_MDA_SELF_COND -+ RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") is proxied by self\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(da)); -+ #endif -+ } -+ } -+ rtw_rcu_read_unlock(); -+ -+ if (!mppath) { -+ #if DBG_RTW_MESH_FORWARD_MDA_SELF_COND -+ RTW_INFO(FUNC_ADPT_FMT" DA("MAC_FMT") unknown\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(da)); -+ #endif -+ /* DA is unknown */ -+ #if 0 /* TODO: flags with AE bit */ -+ rtw_mesh_path_error_tx(adapter -+ , adapter->mesh_cfg.element_ttl -+ , mda, adapter->mesh_info.last_sn_update -+ , WLAN_REASON_MESH_PATH_NOPROXY -+ , msa -+ ); -+ #endif -+ } -+ -+ /* -+ * indicate to DS for both cases: -+ * 1.) DA is proxied by self -+ * 2.) DA is unknown -+ */ -+ #endif /* RTW_MESH_FORWARD_MDA_SELF_COND */ -+ act |= RTW_RX_MSDU_ACT_INDICATE; -+ goto exit; -+ } -+ -+fwd_chk: -+ -+ if (adapter->stapriv.asoc_list_cnt <= 1) -+ goto exit; -+ -+ if (mctrl->ttl == 1) { -+ minfo->mshstats.dropped_frames_ttl++; -+ if (!act) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" ttl reaches 0, not forwarding\n" -+ , FUNC_ADPT_ARG(adapter)); -+ #endif -+ } -+ goto exit; -+ } -+ -+ os_qid = rtw_os_recv_select_queue(msdu, llc_hdl); -+ -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ _rtw_init_listhead(b2u_list); -+#endif -+ -+ ae_need = _rtw_memcmp(da , mda, ETH_ALEN) == _FALSE -+ || _rtw_memcmp(sa , msa, ETH_ALEN) == _FALSE; -+ -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ if (is_mda_bmc -+ && rtw_mfwd_b2u_policy_chk(mcfg->b2u_flags_mfwd, mda, rattrib->to_fr_ds == 3) -+ ) { -+ bmc_need = rtw_mesh_data_bmc_to_uc(adapter -+ , da, sa, mda, msa, ae_need, rframe->u.hdr.psta->cmn.mac_addr, mctrl->ttl - 1 -+ , os_qid, b2u_list, &b2u_num, &fwd_mseq); -+ } -+ -+ if (bmc_need == _TRUE) -+#endif -+ { -+ xframe = rtw_alloc_xmitframe(&adapter->xmitpriv, os_qid); -+ if (!xframe) { -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME "FUNC_ADPT_FMT" rtw_alloc_xmitframe fail\n" -+ , FUNC_ADPT_ARG(adapter)); -+ #endif -+ goto exit; -+ } -+ -+ xattrib = &xframe->attrib; -+ -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ if (b2u_num) -+ xattrib->mb2u = 1; -+ else -+ xattrib->mb2u = 0; -+#endif -+ xattrib->mfwd_ttl = mctrl->ttl - 1; -+ xattrib->mseq = fwd_mseq; -+ _rtw_memcpy(xattrib->dst, da, ETH_ALEN); -+ _rtw_memcpy(xattrib->src, sa, ETH_ALEN); -+ _rtw_memcpy(xattrib->mda, mda, ETH_ALEN); -+ _rtw_memcpy(xattrib->msa, msa, ETH_ALEN); -+ _rtw_memcpy(xattrib->ta, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ if (is_mda_bmc) { -+ xattrib->mesh_frame_mode = ae_need ? MESH_BMCAST_PX_DATA : MESH_BMCAST_DATA; -+ _rtw_memcpy(xattrib->ra, mda, ETH_ALEN); -+ } else { -+ xattrib->mesh_frame_mode = ae_need ? MESH_UCAST_PX_DATA : MESH_UCAST_DATA; -+ _rtw_memcpy(xattrib->ra, fwd_ra, ETH_ALEN); -+ } -+ -+ *fwd_frame = xframe; -+ } -+ -+ act |= RTW_RX_MSDU_ACT_FORWARD; -+ if (is_mda_bmc) -+ minfo->mshstats.fwded_mcast++; -+ else -+ minfo->mshstats.fwded_unicast++; -+ minfo->mshstats.fwded_frames++; -+ -+exit: -+ return act; -+} -+ -+void dump_mesh_stats(void *sel, _adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct rtw_mesh_stats *stats = &minfo->mshstats; -+ -+ RTW_PRINT_SEL(sel, "fwd_bmc:%u\n", stats->fwded_mcast); -+ RTW_PRINT_SEL(sel, "fwd_uc:%u\n", stats->fwded_unicast); -+ -+ RTW_PRINT_SEL(sel, "drop_ttl:%u\n", stats->dropped_frames_ttl); -+ RTW_PRINT_SEL(sel, "drop_no_route:%u\n", stats->dropped_frames_no_route); -+ RTW_PRINT_SEL(sel, "drop_congestion:%u\n", stats->dropped_frames_congestion); -+ RTW_PRINT_SEL(sel, "drop_dup:%u\n", stats->dropped_frames_duplicate); -+ -+ RTW_PRINT_SEL(sel, "mrc_del_qlen:%u\n", stats->mrc_del_qlen); -+} -+#endif /* CONFIG_RTW_MESH */ -+ -diff --git a/drivers/staging/rtl8723cs/core/mesh/rtw_mesh.h b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh.h -new file mode 100644 -index 000000000000..5410ba404468 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh.h -@@ -0,0 +1,537 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_MESH_H_ -+#define __RTW_MESH_H_ -+ -+#ifndef CONFIG_AP_MODE -+ #error "CONFIG_RTW_MESH can't be enabled when CONFIG_AP_MODE is not defined\n" -+#endif -+ -+#define RTW_MESH_TTL 31 -+#define RTW_MESH_PERR_MIN_INT 100 -+#define RTW_MESH_DEFAULT_ELEMENT_TTL 31 -+#define RTW_MESH_RANN_INTERVAL 5000 -+#define RTW_MESH_PATH_TO_ROOT_TIMEOUT 6000 -+#define RTW_MESH_DIAM_TRAVERSAL_TIME 50 -+#define RTW_MESH_PATH_TIMEOUT 5000 -+#define RTW_MESH_PREQ_MIN_INT 10 -+#define RTW_MESH_MAX_PREQ_RETRIES 4 -+#define RTW_MESH_MIN_DISCOVERY_TIMEOUT (2 * RTW_MESH_DIAM_TRAVERSAL_TIME) -+#define RTW_MESH_ROOT_CONFIRMATION_INTERVAL 2000 -+#define RTW_MESH_PATH_REFRESH_TIME 1000 -+#define RTW_MESH_ROOT_INTERVAL 5000 -+ -+#define RTW_MESH_SANE_METRIC_DELTA 100 -+#define RTW_MESH_MAX_ROOT_ADD_CHK_CNT 2 -+ -+#define RTW_MESH_PLINK_UNKNOWN 0 -+#define RTW_MESH_PLINK_LISTEN 1 -+#define RTW_MESH_PLINK_OPN_SNT 2 -+#define RTW_MESH_PLINK_OPN_RCVD 3 -+#define RTW_MESH_PLINK_CNF_RCVD 4 -+#define RTW_MESH_PLINK_ESTAB 5 -+#define RTW_MESH_PLINK_HOLDING 6 -+#define RTW_MESH_PLINK_BLOCKED 7 -+ -+extern const char *_rtw_mesh_plink_str[]; -+#define rtw_mesh_plink_str(s) ((s <= RTW_MESH_PLINK_BLOCKED) ? _rtw_mesh_plink_str[s] : _rtw_mesh_plink_str[RTW_MESH_PLINK_UNKNOWN]) -+ -+#define RTW_MESH_PS_UNKNOWN 0 -+#define RTW_MESH_PS_ACTIVE 1 -+#define RTW_MESH_PS_LSLEEP 2 -+#define RTW_MESH_PS_DSLEEP 3 -+ -+extern const char *_rtw_mesh_ps_str[]; -+#define rtw_mesh_ps_str(mps) ((mps <= RTW_MESH_PS_DSLEEP) ? _rtw_mesh_ps_str[mps] : _rtw_mesh_ps_str[RTW_MESH_PS_UNKNOWN]) -+ -+#define GET_MESH_CONF_ELE_PATH_SEL_PROTO_ID(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 0, 0, 8) -+#define GET_MESH_CONF_ELE_PATH_SEL_METRIC_ID(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 1, 0, 8) -+#define GET_MESH_CONF_ELE_CONGEST_CTRL_MODE_ID(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 2, 0, 8) -+#define GET_MESH_CONF_ELE_SYNC_METHOD_ID(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 3, 0, 8) -+#define GET_MESH_CONF_ELE_AUTH_PROTO_ID(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 4, 0, 8) -+ -+#define GET_MESH_CONF_ELE_MESH_FORMATION(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 0, 8) -+#define GET_MESH_CONF_ELE_CTO_MGATE(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 0, 1) -+#define GET_MESH_CONF_ELE_NUM_OF_PEERINGS(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 1, 6) -+#define GET_MESH_CONF_ELE_CTO_AS(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 5, 7, 1) -+ -+#define GET_MESH_CONF_ELE_MESH_CAP(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 0, 8) -+#define GET_MESH_CONF_ELE_ACCEPT_PEERINGS(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 0, 1) -+#define GET_MESH_CONF_ELE_MCCA_SUP(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 1, 1) -+#define GET_MESH_CONF_ELE_MCCA_EN(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 2, 1) -+#define GET_MESH_CONF_ELE_FORWARDING(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 3, 1) -+#define GET_MESH_CONF_ELE_MBCA_EN(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 4, 1) -+#define GET_MESH_CONF_ELE_TBTT_ADJ(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 5, 1) -+#define GET_MESH_CONF_ELE_PS_LEVEL(_iec) LE_BITS_TO_1BYTE(((u8 *)(_iec)) + 6, 6, 1) -+ -+#define SET_MESH_CONF_ELE_PATH_SEL_PROTO_ID(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 0, 0, 8, _val) -+#define SET_MESH_CONF_ELE_PATH_SEL_METRIC_ID(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 1, 0, 8, _val) -+#define SET_MESH_CONF_ELE_CONGEST_CTRL_MODE_ID(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 2, 0, 8, _val) -+#define SET_MESH_CONF_ELE_SYNC_METHOD_ID(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 3, 0, 8, _val) -+#define SET_MESH_CONF_ELE_AUTH_PROTO_ID(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 4, 0, 8, _val) -+ -+#define SET_MESH_CONF_ELE_CTO_MGATE(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 5, 0, 1, _val) -+#define SET_MESH_CONF_ELE_NUM_OF_PEERINGS(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 5, 1, 6, _val) -+#define SET_MESH_CONF_ELE_CTO_AS(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 5, 7, 1, _val) -+ -+#define SET_MESH_CONF_ELE_ACCEPT_PEERINGS(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 0, 1, _val) -+#define SET_MESH_CONF_ELE_MCCA_SUP(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 1, 1, _val) -+#define SET_MESH_CONF_ELE_MCCA_EN(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 2, 1, _val) -+#define SET_MESH_CONF_ELE_FORWARDING(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 3, 1, _val) -+#define SET_MESH_CONF_ELE_MBCA_EN(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 4, 1, _val) -+#define SET_MESH_CONF_ELE_TBTT_ADJ(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 5, 1, _val) -+#define SET_MESH_CONF_ELE_PS_LEVEL(_iec, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_iec)) + 6, 6, 1, _val) -+ -+/* Mesh flags */ -+#define MESH_FLAGS_AE 0x3 /* mask */ -+#define MESH_FLAGS_AE_A4 0x1 -+#define MESH_FLAGS_AE_A5_A6 0x2 -+ -+/* Max number of paths */ -+#define RTW_MESH_MAX_PATHS 1024 -+ -+#define RTW_PREQ_Q_F_START 0x1 -+#define RTW_PREQ_Q_F_REFRESH 0x2 -+#define RTW_PREQ_Q_F_CHK 0x4 -+#define RTW_PREQ_Q_F_PEER_AKA 0x8 -+#define RTW_PREQ_Q_F_BCAST_PREQ 0x10 /* force path_dicover using broadcast */ -+struct rtw_mesh_preq_queue { -+ _list list; -+ u8 dst[ETH_ALEN]; -+ u8 flags; -+}; -+ -+extern const u8 ae_to_mesh_ctrl_len[]; -+ -+enum mesh_frame_type { -+ MESH_UCAST_DATA = 0x0, -+ MESH_BMCAST_DATA = 0x1, -+ MESH_UCAST_PX_DATA = 0x2, -+ MESH_BMCAST_PX_DATA = 0x3, -+ MESH_MHOP_UCAST_ACT = 0x4, -+ MESH_MHOP_BMCAST_ACT = 0x5, -+}; -+ -+enum mpath_sel_frame_type { -+ MPATH_PREQ = 0, -+ MPATH_PREP, -+ MPATH_PERR, -+ MPATH_RANN -+}; -+ -+/** -+ * enum rtw_mesh_deferred_task_flags - mesh deferred tasks -+ * -+ * -+ * -+ * @RTW_MESH_WORK_HOUSEKEEPING: run the periodic mesh housekeeping tasks -+ * @RTW_MESH_WORK_ROOT: the mesh root station needs to send a frame -+ * @RTW_MESH_WORK_DRIFT_ADJUST: time to compensate for clock drift relative to other -+ * mesh nodes -+ * @RTW_MESH_WORK_MBSS_CHANGED: rebuild beacon and notify driver of BSS changes -+ */ -+enum rtw_mesh_deferred_task_flags { -+ RTW_MESH_WORK_HOUSEKEEPING, -+ RTW_MESH_WORK_ROOT, -+ RTW_MESH_WORK_DRIFT_ADJUST, -+ RTW_MESH_WORK_MBSS_CHANGED, -+}; -+ -+#define RTW_MESH_MAX_PEER_CANDIDATES 15 /* aid consideration */ -+#define RTW_MESH_MAX_PEER_LINKS 8 -+#define RTW_MESH_PEER_LINK_TIMEOUT 20 -+ -+#define RTW_MESH_PEER_CONF_DISABLED 0 /* special time value means no confirmation ongoing */ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+#define IS_PEER_CONF_DISABLED(plink) ((plink)->peer_conf_end_time == RTW_MESH_PEER_CONF_DISABLED) -+#define IS_PEER_CONF_TIMEOUT(plink)(!IS_PEER_CONF_DISABLED(plink) && rtw_time_after(rtw_get_current_time(), (plink)->peer_conf_end_time)) -+#define SET_PEER_CONF_DISABLED(plink) (plink)->peer_conf_end_time = RTW_MESH_PEER_CONF_DISABLED -+#define SET_PEER_CONF_END_TIME(plink, timeout_ms) \ -+ do { \ -+ (plink)->peer_conf_end_time = rtw_get_current_time() + rtw_ms_to_systime(timeout_ms); \ -+ if ((plink)->peer_conf_end_time == RTW_MESH_PEER_CONF_DISABLED) \ -+ (plink)->peer_conf_end_time++; \ -+ } while (0) -+#else -+#define IS_PEER_CONF_DISABLED(plink) 1 -+#define IS_PEER_CONF_TIMEOUT(plink) 0 -+#define SET_PEER_CONF_DISABLED(plink) do {} while (0) -+#define SET_PEER_CONF_END_TIME(plink, timeout_ms) do {} while (0) -+#endif /* CONFIG_RTW_MESH_PEER_BLACKLIST */ -+ -+#define RTW_MESH_CTO_MGATE_CONF_DISABLED 0 /* special time value means no confirmation ongoing */ -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+#define IS_CTO_MGATE_CONF_DISABLED(plink) ((plink)->cto_mgate_conf_end_time == RTW_MESH_CTO_MGATE_CONF_DISABLED) -+#define IS_CTO_MGATE_CONF_TIMEOUT(plink)(!IS_CTO_MGATE_CONF_DISABLED(plink) && rtw_time_after(rtw_get_current_time(), (plink)->cto_mgate_conf_end_time)) -+#define SET_CTO_MGATE_CONF_DISABLED(plink) (plink)->cto_mgate_conf_end_time = RTW_MESH_CTO_MGATE_CONF_DISABLED -+#define SET_CTO_MGATE_CONF_END_TIME(plink, timeout_ms) \ -+ do { \ -+ (plink)->cto_mgate_conf_end_time = rtw_get_current_time() + rtw_ms_to_systime(timeout_ms); \ -+ if ((plink)->cto_mgate_conf_end_time == RTW_MESH_CTO_MGATE_CONF_DISABLED) \ -+ (plink)->cto_mgate_conf_end_time++; \ -+ } while (0) -+#else -+#define IS_CTO_MGATE_CONF_DISABLED(plink) 1 -+#define IS_CTO_MGATE_CONF_TIMEOUT(plink) 0 -+#define SET_CTO_MGATE_CONF_DISABLED(plink) do {} while (0) -+#define SET_CTO_MGATE_CONF_END_TIME(plink, timeout_ms) do {} while (0) -+#endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */ -+ -+struct mesh_plink_ent { -+ u8 valid; -+ u8 addr[ETH_ALEN]; -+ u8 plink_state; -+ -+#ifdef CONFIG_RTW_MESH_AEK -+ u8 aek_valid; -+ u8 aek[32]; -+#endif -+ -+ u16 llid; -+ u16 plid; -+#ifndef CONFIG_RTW_MESH_DRIVER_AID -+ u16 aid; /* aid assigned from upper layer */ -+#endif -+ u16 peer_aid; /* aid assigned from peer */ -+ -+ u8 chosen_pmk[16]; -+ -+#ifdef CONFIG_RTW_MESH_AEK -+ u8 sel_pcs[4]; -+ u8 l_nonce[32]; -+ u8 p_nonce[32]; -+#endif -+ -+#ifdef CONFIG_RTW_MESH_DRIVER_AID -+ u8 *tx_conf_ies; -+ u16 tx_conf_ies_len; -+#endif -+ u8 *rx_conf_ies; -+ u16 rx_conf_ies_len; -+ -+ struct wlan_network *scanned; -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+ systime peer_conf_end_time; -+#endif -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ systime cto_mgate_conf_end_time; -+#endif -+}; -+ -+#ifdef CONFIG_RTW_MESH_AEK -+#define MESH_PLINK_AEK_VALID(ent) ent->aek_valid -+#else -+#define MESH_PLINK_AEK_VALID(ent) 0 -+#endif -+ -+struct mesh_plink_pool { -+ _lock lock; -+ u8 num; /* current ent being used */ -+ struct mesh_plink_ent ent[RTW_MESH_MAX_PEER_CANDIDATES]; -+ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+ u8 acnode_rsvd; -+#endif -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+ _queue peer_blacklist; -+#endif -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ _queue cto_mgate_blacklist; -+#endif -+}; -+ -+struct mesh_peer_sel_policy { -+ u32 scanr_exp_ms; -+ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+ u8 acnode_prevent; -+ u32 acnode_conf_timeout_ms; -+ u32 acnode_notify_timeout_ms; -+#endif -+ -+#if CONFIG_RTW_MESH_OFFCH_CAND -+ u8 offch_cand; -+ u32 offch_find_int_ms; /* 0 means no offch find triggerred by driver self*/ -+#endif -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+ u32 peer_conf_timeout_ms; -+ u32 peer_blacklist_timeout_ms; -+#endif -+ -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ u8 cto_mgate_require; -+ u32 cto_mgate_conf_timeout_ms; -+ u32 cto_mgate_blacklist_timeout_ms; -+#endif -+}; -+ -+/* b2u flags */ -+#define RTW_MESH_B2U_ALL BIT0 -+#define RTW_MESH_B2U_GA_UCAST BIT1 /* Group addressed unicast frame, forward only */ -+#define RTW_MESH_B2U_BCAST BIT2 -+#define RTW_MESH_B2U_IP_MCAST BIT3 -+ -+#define rtw_msrc_b2u_policy_chk(flags, mda) ( \ -+ (flags & RTW_MESH_B2U_ALL) \ -+ || ((flags & RTW_MESH_B2U_BCAST) && is_broadcast_mac_addr(mda)) \ -+ || ((flags & RTW_MESH_B2U_IP_MCAST) && (IP_MCAST_MAC(mda) || ICMPV6_MCAST_MAC(mda))) \ -+ ) -+ -+#define rtw_mfwd_b2u_policy_chk(flags, mda, ucst) ( \ -+ (flags & RTW_MESH_B2U_ALL) \ -+ || ((flags & RTW_MESH_B2U_GA_UCAST) && ucst) \ -+ || ((flags & RTW_MESH_B2U_BCAST) && is_broadcast_mac_addr(mda)) \ -+ || ((flags & RTW_MESH_B2U_IP_MCAST) && (IP_MCAST_MAC(mda) || ICMPV6_MCAST_MAC(mda))) \ -+ ) -+ -+/** -+ * @sane_metric_delta: Controlling if trigger additional path check mechanism -+ * @max_root_add_chk_cnt: The retry cnt to send additional root confirmation -+ * PREQ through old(last) path -+ */ -+struct rtw_mesh_cfg { -+ u8 max_peer_links; /* peering limit */ -+ u32 plink_timeout; /* seconds */ -+ -+ u8 dot11MeshTTL; -+ u8 element_ttl; -+ u32 path_refresh_time; -+ u16 dot11MeshHWMPpreqMinInterval; -+ u16 dot11MeshHWMPnetDiameterTraversalTime; -+ u32 dot11MeshHWMPactivePathTimeout; -+ u8 dot11MeshHWMPmaxPREQretries; -+ u16 min_discovery_timeout; -+ u16 dot11MeshHWMPconfirmationInterval; -+ u16 dot11MeshHWMPperrMinInterval; -+ u8 dot11MeshHWMPRootMode; -+ BOOLEAN dot11MeshForwarding; -+ s32 rssi_threshold; /* in dBm, 0: no specified */ -+ u16 dot11MeshHWMPRannInterval; -+ BOOLEAN dot11MeshGateAnnouncementProtocol; -+ u32 dot11MeshHWMPactivePathToRootTimeout; -+ u16 dot11MeshHWMProotInterval; -+ u8 path_gate_timeout_factor; -+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK -+ u16 sane_metric_delta; -+ u8 max_root_add_chk_cnt; -+#endif -+ -+ struct mesh_peer_sel_policy peer_sel_policy; -+ -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ u8 b2u_flags_msrc; -+ u8 b2u_flags_mfwd; -+#endif -+}; -+ -+struct rtw_mesh_stats { -+ u32 fwded_mcast; /* Mesh forwarded multicast frames */ -+ u32 fwded_unicast; /* Mesh forwarded unicast frames */ -+ u32 fwded_frames; /* Mesh total forwarded frames */ -+ u32 dropped_frames_ttl; /* Not transmitted since mesh_ttl == 0*/ -+ u32 dropped_frames_no_route; /* Not transmitted, no route found */ -+ u32 dropped_frames_congestion;/* Not forwarded due to congestion */ -+ u32 dropped_frames_duplicate; -+ -+ u32 mrc_del_qlen; /* MRC entry deleted cause by queue length limit */ -+}; -+ -+struct rtw_mrc; -+ -+struct rtw_mesh_info { -+ u8 mesh_id[NDIS_802_11_LENGTH_SSID]; -+ size_t mesh_id_len; -+ /* Active Path Selection Protocol Identifier */ -+ u8 mesh_pp_id; -+ /* Active Path Selection Metric Identifier */ -+ u8 mesh_pm_id; -+ /* Congestion Control Mode Identifier */ -+ u8 mesh_cc_id; -+ /* Synchronization Protocol Identifier */ -+ u8 mesh_sp_id; -+ /* Authentication Protocol Identifier */ -+ u8 mesh_auth_id; -+ -+ struct mesh_plink_pool plink_ctl; -+ -+ u32 mesh_seqnum; -+ /* MSTA's own hwmp sequence number */ -+ u32 sn; -+ systime last_preq; -+ systime last_sn_update; -+ systime next_perr; -+ /* Last used Path Discovery ID */ -+ u32 preq_id; -+ -+ ATOMIC_T mpaths; -+ struct rtw_mesh_table *mesh_paths; -+ struct rtw_mesh_table *mpp_paths; -+ int mesh_paths_generation; -+ int mpp_paths_generation; -+ -+ int num_gates; -+ struct rtw_mesh_path *max_addr_gate; -+ bool max_addr_gate_is_larger_than_self; -+ -+ struct rtw_mesh_stats mshstats; -+ -+ _queue mpath_tx_queue; -+ u32 mpath_tx_queue_len; -+ _tasklet mpath_tx_tasklet; -+ -+ struct rtw_mrc *mrc; -+ -+ _lock mesh_preq_queue_lock; -+ struct rtw_mesh_preq_queue preq_queue; -+ int preq_queue_len; -+}; -+ -+extern const char *_action_self_protected_str[]; -+#define action_self_protected_str(action) ((action < RTW_ACT_SELF_PROTECTED_NUM) ? _action_self_protected_str[action] : _action_self_protected_str[0]) -+ -+u8 *rtw_set_ie_mesh_id(u8 *buf, u32 *buf_len, const char *mesh_id, u8 id_len); -+u8 *rtw_set_ie_mesh_config(u8 *buf, u32 *buf_len -+ , u8 path_sel_proto, u8 path_sel_metric, u8 congest_ctl_mode, u8 sync_method, u8 auth_proto -+ , u8 num_of_peerings, bool cto_mgate, bool cto_as -+ , bool accept_peerings, bool mcca_sup, bool mcca_en, bool forwarding -+ , bool mbca_en, bool tbtt_adj, bool ps_level); -+ -+int rtw_bss_is_same_mbss(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b); -+int rtw_bss_is_candidate_mesh_peer(_adapter *adapter, WLAN_BSSID_EX *target, u8 ch, u8 add_peer); -+ -+void rtw_chk_candidate_peer_notify(_adapter *adapter, struct wlan_network *scanned); -+ -+void rtw_mesh_peer_status_chk(_adapter *adapter); -+ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+void rtw_mesh_update_scanned_acnode_status(_adapter *adapter, struct wlan_network *scanned); -+bool rtw_mesh_scanned_is_acnode_confirmed(_adapter *adapter, struct wlan_network *scanned); -+bool rtw_mesh_acnode_prevent_allow_sacrifice(_adapter *adapter); -+struct sta_info *rtw_mesh_acnode_prevent_pick_sacrifice(_adapter *adapter); -+void dump_mesh_acnode_prevent_settings(void *sel, _adapter *adapter); -+#endif -+ -+#if CONFIG_RTW_MESH_OFFCH_CAND -+u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter); -+u8 rtw_mesh_select_operating_ch(_adapter *adapter); -+void dump_mesh_offch_cand_settings(void *sel, _adapter *adapter); -+#endif -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+int rtw_mesh_peer_blacklist_add(_adapter *adapter, const u8 *addr); -+int rtw_mesh_peer_blacklist_del(_adapter *adapter, const u8 *addr); -+int rtw_mesh_peer_blacklist_search(_adapter *adapter, const u8 *addr); -+void rtw_mesh_peer_blacklist_flush(_adapter *adapter); -+void dump_mesh_peer_blacklist(void *sel, _adapter *adapter); -+void dump_mesh_peer_blacklist_settings(void *sel, _adapter *adapter); -+#endif -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+u8 rtw_mesh_cto_mgate_required(_adapter *adapter); -+u8 rtw_mesh_cto_mgate_network_filter(_adapter *adapter, struct wlan_network *scanned); -+int rtw_mesh_cto_mgate_blacklist_add(_adapter *adapter, const u8 *addr); -+int rtw_mesh_cto_mgate_blacklist_del(_adapter *adapter, const u8 *addr); -+int rtw_mesh_cto_mgate_blacklist_search(_adapter *adapter, const u8 *addr); -+void rtw_mesh_cto_mgate_blacklist_flush(_adapter *adapter); -+void dump_mesh_cto_mgate_blacklist(void *sel, _adapter *adapter); -+void dump_mesh_cto_mgate_blacklist_settings(void *sel, _adapter *adapter); -+#endif -+void dump_mesh_peer_sel_policy(void *sel, _adapter *adapter); -+void dump_mesh_networks(void *sel, _adapter *adapter); -+ -+void rtw_mesh_adjust_chbw(u8 req_ch, u8 *req_bw, u8 *req_offset); -+ -+void rtw_mesh_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx, u16 alg, u16 seq, u16 status); -+int rtw_mesh_check_frames_tx(_adapter *adapter, const u8 **buf, size_t *len); -+int rtw_mesh_check_frames_rx(_adapter *adapter, const u8 *buf, size_t len); -+ -+int rtw_mesh_on_auth(_adapter *adapter, union recv_frame *rframe); -+unsigned int on_action_self_protected(_adapter *adapter, union recv_frame *rframe); -+ -+bool rtw_mesh_update_bss_peering_status(_adapter *adapter, WLAN_BSSID_EX *bss); -+bool rtw_mesh_update_bss_formation_info(_adapter *adapter, WLAN_BSSID_EX *bss); -+bool rtw_mesh_update_bss_forwarding_state(_adapter *adapter, WLAN_BSSID_EX *bss); -+ -+struct mesh_plink_ent *_rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr); -+struct mesh_plink_ent *rtw_mesh_plink_get(_adapter *adapter, const u8 *hwaddr); -+struct mesh_plink_ent *rtw_mesh_plink_get_no_estab_by_idx(_adapter *adapter, u8 idx); -+int _rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr); -+int rtw_mesh_plink_add(_adapter *adapter, const u8 *hwaddr); -+int rtw_mesh_plink_set_state(_adapter *adapter, const u8 *hwaddr, u8 state); -+#ifdef CONFIG_RTW_MESH_AEK -+int rtw_mesh_plink_set_aek(_adapter *adapter, const u8 *hwaddr, const u8 *aek); -+#endif -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+int rtw_mesh_plink_set_peer_conf_timeout(_adapter *adapter, const u8 *hwaddr); -+#endif -+void _rtw_mesh_plink_del_ent(_adapter *adapter, struct mesh_plink_ent *ent); -+int rtw_mesh_plink_del(_adapter *adapter, const u8 *hwaddr); -+void rtw_mesh_plink_ctl_init(_adapter *adapter); -+void rtw_mesh_plink_ctl_deinit(_adapter *adapter); -+void dump_mesh_plink_ctl(void *sel, _adapter *adapter); -+ -+u8 rtw_mesh_set_plink_state_cmd(_adapter *adapter, const u8 *mac, u8 plink_state); -+ -+void _rtw_mesh_expire_peer_ent(_adapter *adapter, struct mesh_plink_ent *plink); -+void rtw_mesh_expire_peer(_adapter *adapter, const u8 *peer_addr); -+u8 rtw_mesh_ps_annc(_adapter *adapter, u8 ps); -+ -+unsigned int on_action_mesh(_adapter *adapter, union recv_frame *rframe); -+ -+void rtw_mesh_cfg_init(_adapter *adapter); -+void rtw_mesh_cfg_init_max_peer_links(_adapter *adapter, u8 stack_conf); -+void rtw_mesh_cfg_init_plink_timeout(_adapter *adapter, u32 stack_conf); -+void rtw_mesh_init_mesh_info(_adapter *adapter); -+void rtw_mesh_deinit_mesh_info(_adapter *adapter); -+ -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+void dump_mesh_b2u_flags(void *sel, _adapter *adapter); -+#endif -+ -+int rtw_mesh_addr_resolve(_adapter *adapter, u16 os_qid, struct xmit_frame *xframe, _pkt *pkt, _list *b2u_list); -+ -+s8 rtw_mesh_tx_set_whdr_mctrl_len(u8 mesh_frame_mode, struct pkt_attrib *attrib); -+void rtw_mesh_tx_build_mctrl(_adapter *adapter, struct pkt_attrib *attrib, u8 *buf); -+u8 rtw_mesh_tx_build_whdr(_adapter *adapter, struct pkt_attrib *attrib -+ , u16 *fctrl, struct rtw_ieee80211_hdr *whdr); -+ -+int rtw_mesh_rx_data_validate_hdr(_adapter *adapter, union recv_frame *rframe, struct sta_info **sta); -+int rtw_mesh_rx_data_validate_mctrl(_adapter *adapter, union recv_frame *rframe -+ , const struct rtw_ieee80211s_hdr *mctrl, const u8 *mda, const u8 *msa -+ , u8 *mctrl_len, const u8 **da, const u8 **sa); -+int rtw_mesh_rx_validate_mctrl_non_amsdu(_adapter *adapter, union recv_frame *rframe); -+ -+int rtw_mesh_rx_msdu_act_check(union recv_frame *rframe -+ , const u8 *mda, const u8 *msa -+ , const u8 *da, const u8 *sa -+ , struct rtw_ieee80211s_hdr *mctrl -+ , u8 *msdu, enum rtw_rx_llc_hdl llc_hdl -+ , struct xmit_frame **fwd_frame, _list *b2u_list); -+ -+void dump_mesh_stats(void *sel, _adapter *adapter); -+ -+#if defined(PLATFORM_LINUX) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32)) -+#define rtw_lockdep_assert_held(l) lockdep_assert_held(l) -+#define rtw_lockdep_is_held(l) lockdep_is_held(l) -+#else -+#error "TBD\n" -+#endif -+ -+#include "rtw_mesh_pathtbl.h" -+#include "rtw_mesh_hwmp.h" -+#endif /* __RTW_MESH_H_ */ -+ -diff --git a/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_hwmp.c b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_hwmp.c -new file mode 100644 -index 000000000000..04be425b2140 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_hwmp.c -@@ -0,0 +1,1518 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_HWMP_C_ -+ -+#ifdef CONFIG_RTW_MESH -+#include -+#include -+ -+#define RTW_TEST_FRAME_LEN 8192 -+#define RTW_MAX_METRIC 0xffffffff -+#define RTW_ARITH_SHIFT 8 -+#define RTW_LINK_FAIL_THRESH 95 -+#define RTW_MAX_PREQ_QUEUE_LEN 64 -+#define RTW_ATLM_REQ_CYCLE 1000 -+ -+#define rtw_ilog2(n) \ -+( \ -+ (n) < 2 ? 0 : \ -+ (n) & (1ULL << 63) ? 63 : \ -+ (n) & (1ULL << 62) ? 62 : \ -+ (n) & (1ULL << 61) ? 61 : \ -+ (n) & (1ULL << 60) ? 60 : \ -+ (n) & (1ULL << 59) ? 59 : \ -+ (n) & (1ULL << 58) ? 58 : \ -+ (n) & (1ULL << 57) ? 57 : \ -+ (n) & (1ULL << 56) ? 56 : \ -+ (n) & (1ULL << 55) ? 55 : \ -+ (n) & (1ULL << 54) ? 54 : \ -+ (n) & (1ULL << 53) ? 53 : \ -+ (n) & (1ULL << 52) ? 52 : \ -+ (n) & (1ULL << 51) ? 51 : \ -+ (n) & (1ULL << 50) ? 50 : \ -+ (n) & (1ULL << 49) ? 49 : \ -+ (n) & (1ULL << 48) ? 48 : \ -+ (n) & (1ULL << 47) ? 47 : \ -+ (n) & (1ULL << 46) ? 46 : \ -+ (n) & (1ULL << 45) ? 45 : \ -+ (n) & (1ULL << 44) ? 44 : \ -+ (n) & (1ULL << 43) ? 43 : \ -+ (n) & (1ULL << 42) ? 42 : \ -+ (n) & (1ULL << 41) ? 41 : \ -+ (n) & (1ULL << 40) ? 40 : \ -+ (n) & (1ULL << 39) ? 39 : \ -+ (n) & (1ULL << 38) ? 38 : \ -+ (n) & (1ULL << 37) ? 37 : \ -+ (n) & (1ULL << 36) ? 36 : \ -+ (n) & (1ULL << 35) ? 35 : \ -+ (n) & (1ULL << 34) ? 34 : \ -+ (n) & (1ULL << 33) ? 33 : \ -+ (n) & (1ULL << 32) ? 32 : \ -+ (n) & (1ULL << 31) ? 31 : \ -+ (n) & (1ULL << 30) ? 30 : \ -+ (n) & (1ULL << 29) ? 29 : \ -+ (n) & (1ULL << 28) ? 28 : \ -+ (n) & (1ULL << 27) ? 27 : \ -+ (n) & (1ULL << 26) ? 26 : \ -+ (n) & (1ULL << 25) ? 25 : \ -+ (n) & (1ULL << 24) ? 24 : \ -+ (n) & (1ULL << 23) ? 23 : \ -+ (n) & (1ULL << 22) ? 22 : \ -+ (n) & (1ULL << 21) ? 21 : \ -+ (n) & (1ULL << 20) ? 20 : \ -+ (n) & (1ULL << 19) ? 19 : \ -+ (n) & (1ULL << 18) ? 18 : \ -+ (n) & (1ULL << 17) ? 17 : \ -+ (n) & (1ULL << 16) ? 16 : \ -+ (n) & (1ULL << 15) ? 15 : \ -+ (n) & (1ULL << 14) ? 14 : \ -+ (n) & (1ULL << 13) ? 13 : \ -+ (n) & (1ULL << 12) ? 12 : \ -+ (n) & (1ULL << 11) ? 11 : \ -+ (n) & (1ULL << 10) ? 10 : \ -+ (n) & (1ULL << 9) ? 9 : \ -+ (n) & (1ULL << 8) ? 8 : \ -+ (n) & (1ULL << 7) ? 7 : \ -+ (n) & (1ULL << 6) ? 6 : \ -+ (n) & (1ULL << 5) ? 5 : \ -+ (n) & (1ULL << 4) ? 4 : \ -+ (n) & (1ULL << 3) ? 3 : \ -+ (n) & (1ULL << 2) ? 2 : \ -+ 1 \ -+) -+ -+enum rtw_mpath_frame_type { -+ RTW_MPATH_PREQ = 0, -+ RTW_MPATH_PREP, -+ RTW_MPATH_PERR, -+ RTW_MPATH_RANN -+}; -+ -+static inline u32 rtw_u32_field_get(const u8 *preq_elem, int shift, BOOLEAN ae) -+{ -+ if (ae) -+ shift += 6; -+ return LE_BITS_TO_4BYTE(preq_elem + shift, 0, 32); -+} -+ -+static inline u16 rtw_u16_field_get(const u8 *preq_elem, int shift, BOOLEAN ae) -+{ -+ if (ae) -+ shift += 6; -+ return LE_BITS_TO_2BYTE(preq_elem + shift, 0, 16); -+} -+ -+/* HWMP IE processing macros */ -+#define RTW_AE_F (1<<6) -+#define RTW_AE_F_SET(x) (*x & RTW_AE_F) -+#define RTW_PREQ_IE_FLAGS(x) (*(x)) -+#define RTW_PREQ_IE_HOPCOUNT(x) (*(x + 1)) -+#define RTW_PREQ_IE_TTL(x) (*(x + 2)) -+#define RTW_PREQ_IE_PREQ_ID(x) rtw_u32_field_get(x, 3, 0) -+#define RTW_PREQ_IE_ORIG_ADDR(x) (x + 7) -+#define RTW_PREQ_IE_ORIG_SN(x) rtw_u32_field_get(x, 13, 0) -+#define RTW_PREQ_IE_LIFETIME(x) rtw_u32_field_get(x, 17, RTW_AE_F_SET(x)) -+#define RTW_PREQ_IE_METRIC(x) rtw_u32_field_get(x, 21, RTW_AE_F_SET(x)) -+#define RTW_PREQ_IE_TARGET_F(x) (*(RTW_AE_F_SET(x) ? x + 32 : x + 26)) -+#define RTW_PREQ_IE_TARGET_ADDR(x) (RTW_AE_F_SET(x) ? x + 33 : x + 27) -+#define RTW_PREQ_IE_TARGET_SN(x) rtw_u32_field_get(x, 33, RTW_AE_F_SET(x)) -+ -+#define RTW_PREP_IE_FLAGS(x) RTW_PREQ_IE_FLAGS(x) -+#define RTW_PREP_IE_HOPCOUNT(x) RTW_PREQ_IE_HOPCOUNT(x) -+#define RTW_PREP_IE_TTL(x) RTW_PREQ_IE_TTL(x) -+#define RTW_PREP_IE_ORIG_ADDR(x) (RTW_AE_F_SET(x) ? x + 27 : x + 21) -+#define RTW_PREP_IE_ORIG_SN(x) rtw_u32_field_get(x, 27, RTW_AE_F_SET(x)) -+#define RTW_PREP_IE_LIFETIME(x) rtw_u32_field_get(x, 13, RTW_AE_F_SET(x)) -+#define RTW_PREP_IE_METRIC(x) rtw_u32_field_get(x, 17, RTW_AE_F_SET(x)) -+#define RTW_PREP_IE_TARGET_ADDR(x) (x + 3) -+#define RTW_PREP_IE_TARGET_SN(x) rtw_u32_field_get(x, 9, 0) -+ -+#define RTW_PERR_IE_TTL(x) (*(x)) -+#define RTW_PERR_IE_TARGET_FLAGS(x) (*(x + 2)) -+#define RTW_PERR_IE_TARGET_ADDR(x) (x + 3) -+#define RTW_PERR_IE_TARGET_SN(x) rtw_u32_field_get(x, 9, 0) -+#define RTW_PERR_IE_TARGET_RCODE(x) rtw_u16_field_get(x, 13, 0) -+ -+#define RTW_TU_TO_SYSTIME(x) (rtw_us_to_systime((x) * 1024)) -+#define RTW_TU_TO_EXP_TIME(x) (rtw_get_current_time() + RTW_TU_TO_SYSTIME(x)) -+#define RTW_MSEC_TO_TU(x) (x*1000/1024) -+#define RTW_SN_GT(x, y) ((s32)(y - x) < 0) -+#define RTW_SN_LT(x, y) ((s32)(x - y) < 0) -+#define RTW_MAX_SANE_SN_DELTA 32 -+ -+static inline u32 RTW_SN_DELTA(u32 x, u32 y) -+{ -+ return x >= y ? x - y : y - x; -+} -+ -+#define rtw_net_traversal_jiffies(adapter) \ -+ rtw_ms_to_systime(adapter->mesh_cfg.dot11MeshHWMPnetDiameterTraversalTime) -+#define rtw_default_lifetime(adapter) \ -+ RTW_MSEC_TO_TU(adapter->mesh_cfg.dot11MeshHWMPactivePathTimeout) -+#define rtw_min_preq_int_jiff(adapter) \ -+ (rtw_ms_to_systime(adapter->mesh_cfg.dot11MeshHWMPpreqMinInterval)) -+#define rtw_max_preq_retries(adapter) (adapter->mesh_cfg.dot11MeshHWMPmaxPREQretries) -+#define rtw_disc_timeout_jiff(adapter) \ -+ rtw_ms_to_systime(adapter->mesh_cfg.min_discovery_timeout) -+#define rtw_root_path_confirmation_jiffies(adapter) \ -+ rtw_ms_to_systime(adapter->mesh_cfg.dot11MeshHWMPconfirmationInterval) -+ -+static inline BOOLEAN rtw_ether_addr_equal(const u8 *addr1, const u8 *addr2) -+{ -+ return _rtw_memcmp(addr1, addr2, ETH_ALEN); -+} -+ -+#ifdef PLATFORM_LINUX -+#define rtw_print_ratelimit() printk_ratelimit() -+#define rtw_mod_timer(ptimer, expires) mod_timer(&(ptimer)->timer, expires) -+#else -+ -+#endif -+ -+#define RTW_MESH_EWMA_PRECISION 20 -+#define RTW_MESH_EWMA_WEIGHT_RCP 8 -+#define RTW_TOTAL_PKT_MIN_THRESHOLD 1 -+inline void rtw_ewma_err_rate_init(struct rtw_ewma_err_rate *e) -+{ -+ e->internal = 0; -+} -+inline unsigned long rtw_ewma_err_rate_read(struct rtw_ewma_err_rate *e) -+{ -+ return e->internal >> (RTW_MESH_EWMA_PRECISION); -+} -+inline void rtw_ewma_err_rate_add(struct rtw_ewma_err_rate *e, -+ unsigned long val) -+{ -+ unsigned long internal = e->internal; -+ unsigned long weight_rcp = rtw_ilog2(RTW_MESH_EWMA_WEIGHT_RCP); -+ unsigned long precision = RTW_MESH_EWMA_PRECISION; -+ -+ (e->internal) = internal ? (((internal << weight_rcp) - internal) + -+ (val << precision)) >> weight_rcp : -+ (val << precision); -+} -+ -+static const u8 bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+static int rtw_mesh_path_sel_frame_tx(enum rtw_mpath_frame_type mpath_action, u8 flags, -+ const u8 *originator_addr, u32 originator_sn, -+ u8 target_flags, const u8 *target, -+ u32 target_sn, const u8 *da, u8 hopcount, u8 ttl, -+ u32 lifetime, u32 metric, u32 preq_id, -+ _adapter *adapter) -+{ -+ struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct xmit_frame *pmgntframe = NULL; -+ struct rtw_ieee80211_hdr *pwlanhdr = NULL; -+ struct pkt_attrib *pattrib = NULL; -+ u8 category = RTW_WLAN_CATEGORY_MESH; -+ u8 action = RTW_ACT_MESH_HWMP_PATH_SELECTION; -+ u16 *fctrl = NULL; -+ u8 *pos, ie_len; -+ -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return -1; -+ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(adapter, pattrib); -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pos = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pos; -+ -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(adapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pos, WIFI_ACTION); -+ -+ pos += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pos = rtw_set_fixed_ie(pos, 1, &(category), &(pattrib->pktlen)); -+ pos = rtw_set_fixed_ie(pos, 1, &(action), &(pattrib->pktlen)); -+ -+ switch (mpath_action) { -+ case RTW_MPATH_PREQ: -+ RTW_HWMP_DBG("sending PREQ to "MAC_FMT"\n", MAC_ARG(target)); -+ ie_len = 37; -+ pattrib->pktlen += (ie_len + 2); -+ *pos++ = WLAN_EID_PREQ; -+ break; -+ case RTW_MPATH_PREP: -+ RTW_HWMP_DBG("sending PREP to "MAC_FMT"\n", MAC_ARG(originator_addr)); -+ ie_len = 31; -+ pattrib->pktlen += (ie_len + 2); -+ *pos++ = WLAN_EID_PREP; -+ break; -+ case RTW_MPATH_RANN: -+ RTW_HWMP_DBG("sending RANN from "MAC_FMT"\n", MAC_ARG(originator_addr)); -+ ie_len = sizeof(struct rtw_ieee80211_rann_ie); -+ pattrib->pktlen += (ie_len + 2); -+ *pos++ = WLAN_EID_RANN; -+ break; -+ default: -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ return _FAIL; -+ } -+ *pos++ = ie_len; -+ *pos++ = flags; -+ *pos++ = hopcount; -+ *pos++ = ttl; -+ if (mpath_action == RTW_MPATH_PREP) { -+ _rtw_memcpy(pos, target, ETH_ALEN); -+ pos += ETH_ALEN; -+ *(u32 *)pos = cpu_to_le32(target_sn); -+ pos += 4; -+ } else { -+ if (mpath_action == RTW_MPATH_PREQ) { -+ *(u32 *)pos = cpu_to_le32(preq_id); -+ pos += 4; -+ } -+ _rtw_memcpy(pos, originator_addr, ETH_ALEN); -+ pos += ETH_ALEN; -+ *(u32 *)pos = cpu_to_le32(originator_sn); -+ pos += 4; -+ } -+ *(u32 *)pos = cpu_to_le32(lifetime); -+ pos += 4; -+ *(u32 *)pos = cpu_to_le32(metric); -+ pos += 4; -+ if (mpath_action == RTW_MPATH_PREQ) { -+ *pos++ = 1; /* support only 1 destination now */ -+ *pos++ = target_flags; -+ _rtw_memcpy(pos, target, ETH_ALEN); -+ pos += ETH_ALEN; -+ *(u32 *)pos = cpu_to_le32(target_sn); -+ pos += 4; -+ } else if (mpath_action == RTW_MPATH_PREP) { -+ _rtw_memcpy(pos, originator_addr, ETH_ALEN); -+ pos += ETH_ALEN; -+ *(u32 *)pos = cpu_to_le32(originator_sn); -+ pos += 4; -+ } -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ dump_mgntframe(adapter, pmgntframe); -+ return 0; -+} -+ -+int rtw_mesh_path_error_tx(_adapter *adapter, -+ u8 ttl, const u8 *target, u32 target_sn, -+ u16 perr_reason_code, const u8 *ra) -+{ -+ -+ struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct xmit_frame *pmgntframe = NULL; -+ struct rtw_ieee80211_hdr *pwlanhdr = NULL; -+ struct pkt_attrib *pattrib = NULL; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ u8 category = RTW_WLAN_CATEGORY_MESH; -+ u8 action = RTW_ACT_MESH_HWMP_PATH_SELECTION; -+ u8 *pos, ie_len; -+ u16 *fctrl = NULL; -+ -+ if (rtw_time_before(rtw_get_current_time(), minfo->next_perr)) -+ return -1; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return -1; -+ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(adapter, pattrib); -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pos = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pos; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(adapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pos, WIFI_ACTION); -+ -+ pos += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pos = rtw_set_fixed_ie(pos, 1, &(category), &(pattrib->pktlen)); -+ pos = rtw_set_fixed_ie(pos, 1, &(action), &(pattrib->pktlen)); -+ -+ ie_len = 15; -+ pattrib->pktlen += (2 + ie_len); -+ *pos++ = WLAN_EID_PERR; -+ *pos++ = ie_len; -+ /* ttl */ -+ *pos++ = ttl; -+ /* The Number of Destinations N */ -+ *pos++ = 1; -+ /* Flags format | B7 | B6 | B5:B0 | = | rsvd | AE | rsvd | */ -+ *pos = 0; -+ pos++; -+ _rtw_memcpy(pos, target, ETH_ALEN); -+ pos += ETH_ALEN; -+ *(u32 *)pos = cpu_to_le32(target_sn); -+ pos += 4; -+ *(u16 *)pos = cpu_to_le16(perr_reason_code); -+ -+ adapter->mesh_info.next_perr = RTW_TU_TO_EXP_TIME( -+ adapter->mesh_cfg.dot11MeshHWMPperrMinInterval); -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ /* Send directly. Rewrite it if deferred tx is needed */ -+ dump_mgntframe(adapter, pmgntframe); -+ -+ RTW_HWMP_DBG("TX PERR toward "MAC_FMT", ra = "MAC_FMT"\n", MAC_ARG(target), MAC_ARG(ra)); -+ -+ return 0; -+} -+ -+static u32 rtw_airtime_link_metric_get(_adapter *adapter, struct sta_info *sta) -+{ -+ struct dm_struct *dm = adapter_to_phydm(adapter); -+ int device_constant = phydm_get_plcp(dm, sta->cmn.mac_id) << RTW_ARITH_SHIFT; -+ u32 test_frame_len = RTW_TEST_FRAME_LEN << RTW_ARITH_SHIFT; -+ u32 s_unit = 1 << RTW_ARITH_SHIFT; -+ u32 err; -+ u16 rate; -+ u32 tx_time, estimated_retx; -+ u64 result; -+ /* The fail_avg should <= 100 here */ -+ u32 fail_avg = (u32)rtw_ewma_err_rate_read(&sta->metrics.err_rate); -+ -+ if (fail_avg > RTW_LINK_FAIL_THRESH) -+ return RTW_MAX_METRIC; -+ -+ rate = sta->metrics.data_rate; -+ /* rate unit is 100Kbps, min rate = 10 */ -+ if (rate < 10) { -+ RTW_HWMP_INFO("rate = %d\n", rate); -+ return RTW_MAX_METRIC; -+ } -+ -+ err = (fail_avg << RTW_ARITH_SHIFT) / 100; -+ -+ /* test_frame_len*10 to adjust the unit of rate(100kbps/unit) */ -+ tx_time = (device_constant + 10 * test_frame_len / rate); -+ estimated_retx = ((1 << (2 * RTW_ARITH_SHIFT)) / (s_unit - err)); -+ result = (tx_time * estimated_retx) >> (2 * RTW_ARITH_SHIFT); -+ /* Convert us to 0.01 TU(10.24us). x/10.24 = x*100/1024 */ -+ result = (result * 100) >> 10; -+ -+ return (u32)result; -+} -+ -+void rtw_ieee80211s_update_metric(_adapter *adapter, u8 mac_id, -+ u8 per, u8 rate, -+ u8 bw, u8 total_pkt) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ struct sta_info *sta; -+ u8 rate_idx; -+ u8 sgi; -+ -+ sta = macid_ctl->sta[mac_id]; -+ if (!sta) -+ return; -+ -+ /* if RA, use reported rate */ -+ if (adapter->fix_rate == 0xff) { -+ rate_idx = rate & 0x7f; -+ sgi = rate >> 7; -+ } else { -+ rate_idx = adapter->fix_rate & 0x7f; -+ sgi = adapter->fix_rate >> 7; -+ } -+ sta->metrics.data_rate = rtw_desc_rate_to_bitrate(bw, rate_idx, sgi); -+ -+ if (total_pkt < RTW_TOTAL_PKT_MIN_THRESHOLD) -+ return; -+ -+ /* TBD: sta->metrics.overhead = phydm_get_plcp(void *dm_void, u16 macid); */ -+ sta->metrics.total_pkt = total_pkt; -+ -+ rtw_ewma_err_rate_add(&sta->metrics.err_rate, per); -+ if (rtw_ewma_err_rate_read(&sta->metrics.err_rate) > -+ RTW_LINK_FAIL_THRESH) -+ rtw_mesh_plink_broken(sta); -+} -+ -+static void rtw_hwmp_preq_frame_process(_adapter *adapter, -+ struct rtw_ieee80211_hdr_3addr *mgmt, -+ const u8 *preq_elem, u32 originator_metric) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_path *path = NULL; -+ const u8 *target_addr, *originator_addr; -+ const u8 *da; -+ u8 target_flags, ttl, flags, to_gate_ask = 0; -+ u32 originator_sn, target_sn, lifetime, target_metric = 0; -+ BOOLEAN reply = _FALSE; -+ BOOLEAN forward = _TRUE; -+ BOOLEAN preq_is_gate; -+ -+ /* Update target SN, if present */ -+ target_addr = RTW_PREQ_IE_TARGET_ADDR(preq_elem); -+ originator_addr = RTW_PREQ_IE_ORIG_ADDR(preq_elem); -+ target_sn = RTW_PREQ_IE_TARGET_SN(preq_elem); -+ originator_sn = RTW_PREQ_IE_ORIG_SN(preq_elem); -+ target_flags = RTW_PREQ_IE_TARGET_F(preq_elem); -+ /* PREQ gate announcements */ -+ flags = RTW_PREQ_IE_FLAGS(preq_elem); -+ preq_is_gate = !!(flags & RTW_IEEE80211_PREQ_IS_GATE_FLAG); -+ -+ RTW_HWMP_DBG("received PREQ from "MAC_FMT"\n", MAC_ARG(originator_addr)); -+ -+ if (rtw_ether_addr_equal(target_addr, adapter_mac_addr(adapter))) { -+ RTW_HWMP_DBG("PREQ is for us\n"); -+#ifdef CONFIG_RTW_MESH_ON_DMD_GANN -+ rtw_rcu_read_lock(); -+ path = rtw_mesh_path_lookup(adapter, originator_addr); -+ if (path) { -+ if (preq_is_gate) -+ rtw_mesh_path_add_gate(path); -+ else if (path->is_gate) { -+ enter_critical_bh(&path->state_lock); -+ rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path); -+ exit_critical_bh(&path->state_lock); -+ } -+ } -+ path = NULL; -+ rtw_rcu_read_unlock(); -+#endif -+ forward = _FALSE; -+ reply = _TRUE; -+ to_gate_ask = 1; -+ target_metric = 0; -+ if (rtw_time_after(rtw_get_current_time(), minfo->last_sn_update + -+ rtw_net_traversal_jiffies(adapter)) || -+ rtw_time_before(rtw_get_current_time(), minfo->last_sn_update)) { -+ ++minfo->sn; -+ minfo->last_sn_update = rtw_get_current_time(); -+ } -+ target_sn = minfo->sn; -+ } else if (is_broadcast_mac_addr(target_addr) && -+ (target_flags & RTW_IEEE80211_PREQ_TO_FLAG)) { -+ rtw_rcu_read_lock(); -+ path = rtw_mesh_path_lookup(adapter, originator_addr); -+ if (path) { -+ if (flags & RTW_IEEE80211_PREQ_PROACTIVE_PREP_FLAG) { -+ reply = _TRUE; -+ target_addr = adapter_mac_addr(adapter); -+ target_sn = ++minfo->sn; -+ target_metric = 0; -+ minfo->last_sn_update = rtw_get_current_time(); -+ } -+ -+ if (preq_is_gate) { -+ lifetime = RTW_PREQ_IE_LIFETIME(preq_elem); -+ path->gate_ann_int = lifetime; -+ path->gate_asked = false; -+ rtw_mesh_path_add_gate(path); -+ } else if (path->is_gate) { -+ enter_critical_bh(&path->state_lock); -+ rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path); -+ exit_critical_bh(&path->state_lock); -+ } -+ } -+ rtw_rcu_read_unlock(); -+ } else { -+ rtw_rcu_read_lock(); -+#ifdef CONFIG_RTW_MESH_ON_DMD_GANN -+ path = rtw_mesh_path_lookup(adapter, originator_addr); -+ if (path) { -+ if (preq_is_gate) -+ rtw_mesh_path_add_gate(path); -+ else if (path->is_gate) { -+ enter_critical_bh(&path->state_lock); -+ rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path); -+ exit_critical_bh(&path->state_lock); -+ } -+ } -+ path = NULL; -+#endif -+ path = rtw_mesh_path_lookup(adapter, target_addr); -+ if (path) { -+ if ((!(path->flags & RTW_MESH_PATH_SN_VALID)) || -+ RTW_SN_LT(path->sn, target_sn)) { -+ path->sn = target_sn; -+ path->flags |= RTW_MESH_PATH_SN_VALID; -+ } else if ((!(target_flags & RTW_IEEE80211_PREQ_TO_FLAG)) && -+ (path->flags & RTW_MESH_PATH_ACTIVE)) { -+ reply = _TRUE; -+ target_metric = path->metric; -+ target_sn = path->sn; -+ /* Case E2 of sec 13.10.9.3 IEEE 802.11-2012*/ -+ target_flags |= RTW_IEEE80211_PREQ_TO_FLAG; -+ } -+ } -+ rtw_rcu_read_unlock(); -+ } -+ -+ if (reply) { -+ lifetime = RTW_PREQ_IE_LIFETIME(preq_elem); -+ ttl = mshcfg->element_ttl; -+ if (ttl != 0 && !to_gate_ask) { -+ RTW_HWMP_DBG("replying to the PREQ\n"); -+ rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREP, 0, originator_addr, -+ originator_sn, 0, target_addr, -+ target_sn, mgmt->addr2, 0, ttl, -+ lifetime, target_metric, 0, -+ adapter); -+ } else if (ttl != 0 && to_gate_ask) { -+ RTW_HWMP_DBG("replying to the PREQ (PREQ for us)\n"); -+ if (mshcfg->dot11MeshGateAnnouncementProtocol) { -+ /* BIT 7 is used to identify the prep is from mesh gate */ -+ to_gate_ask = RTW_IEEE80211_PREQ_IS_GATE_FLAG | BIT(7); -+ } else { -+ to_gate_ask = 0; -+ } -+ -+ rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREP, to_gate_ask, originator_addr, -+ originator_sn, 0, target_addr, -+ target_sn, mgmt->addr2, 0, ttl, -+ lifetime, target_metric, 0, -+ adapter); -+ } else { -+ minfo->mshstats.dropped_frames_ttl++; -+ } -+ } -+ -+ if (forward && mshcfg->dot11MeshForwarding) { -+ u32 preq_id; -+ u8 hopcount; -+ -+ ttl = RTW_PREQ_IE_TTL(preq_elem); -+ lifetime = RTW_PREQ_IE_LIFETIME(preq_elem); -+ if (ttl <= 1) { -+ minfo->mshstats.dropped_frames_ttl++; -+ return; -+ } -+ RTW_HWMP_DBG("forwarding the PREQ from "MAC_FMT"\n", MAC_ARG(originator_addr)); -+ --ttl; -+ preq_id = RTW_PREQ_IE_PREQ_ID(preq_elem); -+ hopcount = RTW_PREQ_IE_HOPCOUNT(preq_elem) + 1; -+ da = (path && path->is_root) ? -+ path->rann_snd_addr : bcast_addr; -+ -+ if (flags & RTW_IEEE80211_PREQ_PROACTIVE_PREP_FLAG) { -+ target_addr = RTW_PREQ_IE_TARGET_ADDR(preq_elem); -+ target_sn = RTW_PREQ_IE_TARGET_SN(preq_elem); -+ } -+ -+ rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREQ, flags, originator_addr, -+ originator_sn, target_flags, target_addr, -+ target_sn, da, hopcount, ttl, lifetime, -+ originator_metric, preq_id, adapter); -+ if (!is_multicast_mac_addr(da)) -+ minfo->mshstats.fwded_unicast++; -+ else -+ minfo->mshstats.fwded_mcast++; -+ minfo->mshstats.fwded_frames++; -+ } -+} -+ -+static inline struct sta_info * -+rtw_next_hop_deref_protected(struct rtw_mesh_path *path) -+{ -+ return rtw_rcu_dereference_protected(path->next_hop, -+ rtw_lockdep_is_held(&path->state_lock)); -+} -+ -+static void rtw_hwmp_prep_frame_process(_adapter *adapter, -+ struct rtw_ieee80211_hdr_3addr *mgmt, -+ const u8 *prep_elem, u32 metric) -+{ -+ struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_stats *mshstats = &adapter->mesh_info.mshstats; -+ struct rtw_mesh_path *path; -+ const u8 *target_addr, *originator_addr; -+ u8 ttl, hopcount, flags; -+ u8 next_hop[ETH_ALEN]; -+ u32 target_sn, originator_sn, lifetime; -+ -+ RTW_HWMP_DBG("received PREP from "MAC_FMT"\n", -+ MAC_ARG(RTW_PREP_IE_TARGET_ADDR(prep_elem))); -+ -+ originator_addr = RTW_PREP_IE_ORIG_ADDR(prep_elem); -+ if (rtw_ether_addr_equal(originator_addr, adapter_mac_addr(adapter))) { -+ /* destination, no forwarding required */ -+ rtw_rcu_read_lock(); -+ target_addr = RTW_PREP_IE_TARGET_ADDR(prep_elem); -+ path = rtw_mesh_path_lookup(adapter, target_addr); -+ if (path && path->gate_asked) { -+ flags = RTW_PREP_IE_FLAGS(prep_elem); -+ if (flags & BIT(7)) { -+ enter_critical_bh(&path->state_lock); -+ path->gate_asked = false; -+ exit_critical_bh(&path->state_lock); -+ if (!(flags & RTW_IEEE80211_PREQ_IS_GATE_FLAG)) { -+ enter_critical_bh(&path->state_lock); -+ rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path); -+ exit_critical_bh(&path->state_lock); -+ } -+ } -+ } -+ -+ rtw_rcu_read_unlock(); -+ return; -+ } -+ -+ if (!mshcfg->dot11MeshForwarding) -+ return; -+ -+ ttl = RTW_PREP_IE_TTL(prep_elem); -+ if (ttl <= 1) { -+ mshstats->dropped_frames_ttl++; -+ return; -+ } -+ -+ rtw_rcu_read_lock(); -+ path = rtw_mesh_path_lookup(adapter, originator_addr); -+ if (path) -+ enter_critical_bh(&path->state_lock); -+ else -+ goto fail; -+ if (!(path->flags & RTW_MESH_PATH_ACTIVE)) { -+ exit_critical_bh(&path->state_lock); -+ goto fail; -+ } -+ _rtw_memcpy(next_hop, rtw_next_hop_deref_protected(path)->cmn.mac_addr, ETH_ALEN); -+ exit_critical_bh(&path->state_lock); -+ --ttl; -+ flags = RTW_PREP_IE_FLAGS(prep_elem); -+ lifetime = RTW_PREP_IE_LIFETIME(prep_elem); -+ hopcount = RTW_PREP_IE_HOPCOUNT(prep_elem) + 1; -+ target_addr = RTW_PREP_IE_TARGET_ADDR(prep_elem); -+ target_sn = RTW_PREP_IE_TARGET_SN(prep_elem); -+ originator_sn = RTW_PREP_IE_ORIG_SN(prep_elem); -+ -+ rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREP, flags, originator_addr, originator_sn, 0, -+ target_addr, target_sn, next_hop, hopcount, -+ ttl, lifetime, metric, 0, adapter); -+ rtw_rcu_read_unlock(); -+ -+ mshstats->fwded_unicast++; -+ mshstats->fwded_frames++; -+ return; -+ -+fail: -+ rtw_rcu_read_unlock(); -+ mshstats->dropped_frames_no_route++; -+} -+ -+static void rtw_hwmp_perr_frame_process(_adapter *adapter, -+ struct rtw_ieee80211_hdr_3addr *mgmt, -+ const u8 *perr_elem) -+{ -+ struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_stats *mshstats = &adapter->mesh_info.mshstats; -+ struct rtw_mesh_path *path; -+ u8 ttl; -+ const u8 *ta, *target_addr; -+ u32 target_sn; -+ u16 perr_reason_code; -+ -+ ta = mgmt->addr2; -+ ttl = RTW_PERR_IE_TTL(perr_elem); -+ if (ttl <= 1) { -+ mshstats->dropped_frames_ttl++; -+ return; -+ } -+ ttl--; -+ target_addr = RTW_PERR_IE_TARGET_ADDR(perr_elem); -+ target_sn = RTW_PERR_IE_TARGET_SN(perr_elem); -+ perr_reason_code = RTW_PERR_IE_TARGET_RCODE(perr_elem); -+ -+ RTW_HWMP_DBG("received PERR toward target "MAC_FMT"\n", MAC_ARG(target_addr)); -+ -+ rtw_rcu_read_lock(); -+ path = rtw_mesh_path_lookup(adapter, target_addr); -+ if (path) { -+ struct sta_info *sta; -+ -+ enter_critical_bh(&path->state_lock); -+ sta = rtw_next_hop_deref_protected(path); -+ if (path->flags & RTW_MESH_PATH_ACTIVE && -+ rtw_ether_addr_equal(ta, sta->cmn.mac_addr) && -+ !(path->flags & RTW_MESH_PATH_FIXED) && -+ (!(path->flags & RTW_MESH_PATH_SN_VALID) || -+ RTW_SN_GT(target_sn, path->sn) || target_sn == 0)) { -+ path->flags &= ~RTW_MESH_PATH_ACTIVE; -+ if (target_sn != 0) -+ path->sn = target_sn; -+ else -+ path->sn += 1; -+ exit_critical_bh(&path->state_lock); -+ if (!mshcfg->dot11MeshForwarding) -+ goto endperr; -+ rtw_mesh_path_error_tx(adapter, ttl, target_addr, -+ target_sn, perr_reason_code, -+ bcast_addr); -+ } else -+ exit_critical_bh(&path->state_lock); -+ } -+endperr: -+ rtw_rcu_read_unlock(); -+} -+ -+static void rtw_hwmp_rann_frame_process(_adapter *adapter, -+ struct rtw_ieee80211_hdr_3addr *mgmt, -+ const struct rtw_ieee80211_rann_ie *rann) -+{ -+ struct sta_info *sta; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_stats *mshstats = &adapter->mesh_info.mshstats; -+ struct rtw_mesh_path *path; -+ u8 ttl, flags, hopcount; -+ const u8 *originator_addr; -+ u32 originator_sn, metric, metric_txsta, interval; -+ BOOLEAN root_is_gate; -+ -+ ttl = rann->rann_ttl; -+ flags = rann->rann_flags; -+ root_is_gate = !!(flags & RTW_RANN_FLAG_IS_GATE); -+ originator_addr = rann->rann_addr; -+ originator_sn = le32_to_cpu(rann->rann_seq); -+ interval = le32_to_cpu(rann->rann_interval); -+ hopcount = rann->rann_hopcount; -+ hopcount++; -+ metric = le32_to_cpu(rann->rann_metric); -+ -+ /* Ignore our own RANNs */ -+ if (rtw_ether_addr_equal(originator_addr, adapter_mac_addr(adapter))) -+ return; -+ -+ RTW_HWMP_DBG("received RANN from "MAC_FMT" via neighbour "MAC_FMT" (is_gate=%d)\n", -+ MAC_ARG(originator_addr), MAC_ARG(mgmt->addr2), root_is_gate); -+ -+ rtw_rcu_read_lock(); -+ sta = rtw_get_stainfo(pstapriv, mgmt->addr2); -+ if (!sta) { -+ rtw_rcu_read_unlock(); -+ return; -+ } -+ -+ metric_txsta = rtw_airtime_link_metric_get(adapter, sta); -+ -+ path = rtw_mesh_path_lookup(adapter, originator_addr); -+ if (!path) { -+ path = rtw_mesh_path_add(adapter, originator_addr); -+ if (IS_ERR(path)) { -+ rtw_rcu_read_unlock(); -+ mshstats->dropped_frames_no_route++; -+ return; -+ } -+ } -+ -+ if (!(RTW_SN_LT(path->sn, originator_sn)) && -+ !(path->sn == originator_sn && metric < path->rann_metric)) { -+ rtw_rcu_read_unlock(); -+ return; -+ } -+ -+ if ((!(path->flags & (RTW_MESH_PATH_ACTIVE | RTW_MESH_PATH_RESOLVING)) || -+ (rtw_time_after(rtw_get_current_time(), path->last_preq_to_root + -+ rtw_root_path_confirmation_jiffies(adapter)) || -+ rtw_time_before(rtw_get_current_time(), path->last_preq_to_root))) && -+ !(path->flags & RTW_MESH_PATH_FIXED) && (ttl != 0)) { -+ u8 preq_node_flag = RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_REFRESH; -+ -+ RTW_HWMP_DBG("time to refresh root path "MAC_FMT"\n", -+ MAC_ARG(originator_addr)); -+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK -+ if (RTW_SN_LT(path->sn, originator_sn) && -+ (path->rann_metric + mshcfg->sane_metric_delta < metric) && -+ _rtw_memcmp(bcast_addr, path->rann_snd_addr, ETH_ALEN) == _FALSE) { -+ RTW_HWMP_DBG("Trigger additional check for root " -+ "confirm PREQ. rann_snd_addr = "MAC_FMT -+ "add_chk_rann_snd_addr= "MAC_FMT"\n", -+ MAC_ARG(mgmt->addr2), -+ MAC_ARG(path->rann_snd_addr)); -+ _rtw_memcpy(path->add_chk_rann_snd_addr, -+ path->rann_snd_addr, ETH_ALEN); -+ preq_node_flag |= RTW_PREQ_Q_F_CHK; -+ -+ } -+#endif -+ rtw_mesh_queue_preq(path, preq_node_flag); -+ path->last_preq_to_root = rtw_get_current_time(); -+ } -+ -+ path->sn = originator_sn; -+ path->rann_metric = metric + metric_txsta; -+ path->is_root = _TRUE; -+ /* Recording RANNs sender address to send individually -+ * addressed PREQs destined for root mesh STA */ -+ _rtw_memcpy(path->rann_snd_addr, mgmt->addr2, ETH_ALEN); -+ -+ if (root_is_gate) { -+ path->gate_ann_int = interval; -+ path->gate_asked = false; -+ rtw_mesh_path_add_gate(path); -+ } else if (path->is_gate) { -+ enter_critical_bh(&path->state_lock); -+ rtw_mesh_gate_del(adapter->mesh_info.mesh_paths, path); -+ exit_critical_bh(&path->state_lock); -+ } -+ -+ if (ttl <= 1) { -+ mshstats->dropped_frames_ttl++; -+ rtw_rcu_read_unlock(); -+ return; -+ } -+ ttl--; -+ -+ if (mshcfg->dot11MeshForwarding) { -+ rtw_mesh_path_sel_frame_tx(RTW_MPATH_RANN, flags, originator_addr, -+ originator_sn, 0, NULL, 0, bcast_addr, -+ hopcount, ttl, interval, -+ metric + metric_txsta, 0, adapter); -+ } -+ -+ rtw_rcu_read_unlock(); -+} -+ -+static u32 rtw_hwmp_route_info_get(_adapter *adapter, -+ struct rtw_ieee80211_hdr_3addr *mgmt, -+ const u8 *hwmp_ie, enum rtw_mpath_frame_type action) -+{ -+ struct rtw_mesh_path *path; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *sta; -+ BOOLEAN fresh_info; -+ const u8 *originator_addr, *ta; -+ u32 originator_sn, originator_metric; -+ unsigned long originator_lifetime, exp_time; -+ u32 last_hop_metric, new_metric; -+ BOOLEAN process = _TRUE; -+ -+ rtw_rcu_read_lock(); -+ sta = rtw_get_stainfo(pstapriv, mgmt->addr2); -+ if (!sta) { -+ rtw_rcu_read_unlock(); -+ return 0; -+ } -+ -+ last_hop_metric = rtw_airtime_link_metric_get(adapter, sta); -+ /* Update and check originator routing info */ -+ fresh_info = _TRUE; -+ -+ switch (action) { -+ case RTW_MPATH_PREQ: -+ originator_addr = RTW_PREQ_IE_ORIG_ADDR(hwmp_ie); -+ originator_sn = RTW_PREQ_IE_ORIG_SN(hwmp_ie); -+ originator_lifetime = RTW_PREQ_IE_LIFETIME(hwmp_ie); -+ originator_metric = RTW_PREQ_IE_METRIC(hwmp_ie); -+ break; -+ case RTW_MPATH_PREP: -+ /* Note: For coding, the naming is not consist with spec */ -+ originator_addr = RTW_PREP_IE_TARGET_ADDR(hwmp_ie); -+ originator_sn = RTW_PREP_IE_TARGET_SN(hwmp_ie); -+ originator_lifetime = RTW_PREP_IE_LIFETIME(hwmp_ie); -+ originator_metric = RTW_PREP_IE_METRIC(hwmp_ie); -+ break; -+ default: -+ rtw_rcu_read_unlock(); -+ return 0; -+ } -+ new_metric = originator_metric + last_hop_metric; -+ if (new_metric < originator_metric) -+ new_metric = RTW_MAX_METRIC; -+ exp_time = RTW_TU_TO_EXP_TIME(originator_lifetime); -+ -+ if (rtw_ether_addr_equal(originator_addr, adapter_mac_addr(adapter))) { -+ process = _FALSE; -+ fresh_info = _FALSE; -+ } else { -+ path = rtw_mesh_path_lookup(adapter, originator_addr); -+ if (path) { -+ enter_critical_bh(&path->state_lock); -+ if (path->flags & RTW_MESH_PATH_FIXED) -+ fresh_info = _FALSE; -+ else if ((path->flags & RTW_MESH_PATH_ACTIVE) && -+ (path->flags & RTW_MESH_PATH_SN_VALID)) { -+ if (RTW_SN_GT(path->sn, originator_sn) || -+ (path->sn == originator_sn && -+ new_metric >= path->metric)) { -+ process = _FALSE; -+ fresh_info = _FALSE; -+ } -+ } else if (!(path->flags & RTW_MESH_PATH_ACTIVE)) { -+ BOOLEAN have_sn, newer_sn, bounced; -+ -+ have_sn = path->flags & RTW_MESH_PATH_SN_VALID; -+ newer_sn = have_sn && RTW_SN_GT(originator_sn, path->sn); -+ bounced = have_sn && -+ (RTW_SN_DELTA(originator_sn, path->sn) > -+ RTW_MAX_SANE_SN_DELTA); -+ -+ if (!have_sn || newer_sn) { -+ } else if (bounced) { -+ } else { -+ process = _FALSE; -+ fresh_info = _FALSE; -+ } -+ } -+ } else { -+ path = rtw_mesh_path_add(adapter, originator_addr); -+ if (IS_ERR(path)) { -+ rtw_rcu_read_unlock(); -+ return 0; -+ } -+ enter_critical_bh(&path->state_lock); -+ } -+ -+ if (fresh_info) { -+ rtw_mesh_path_assign_nexthop(path, sta); -+ path->flags |= RTW_MESH_PATH_SN_VALID; -+ path->metric = new_metric; -+ path->sn = originator_sn; -+ path->exp_time = rtw_time_after(path->exp_time, exp_time) -+ ? path->exp_time : exp_time; -+ rtw_mesh_path_activate(path); -+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK -+ if (path->is_root && (action == RTW_MPATH_PREP)) { -+ _rtw_memcpy(path->rann_snd_addr, -+ mgmt->addr2, ETH_ALEN); -+ path->rann_metric = new_metric; -+ } -+#endif -+ exit_critical_bh(&path->state_lock); -+ rtw_mesh_path_tx_pending(path); -+ } else -+ exit_critical_bh(&path->state_lock); -+ } -+ -+ /* Update and check transmitter routing info */ -+ ta = mgmt->addr2; -+ if (rtw_ether_addr_equal(originator_addr, ta)) -+ fresh_info = _FALSE; -+ else { -+ fresh_info = _TRUE; -+ -+ path = rtw_mesh_path_lookup(adapter, ta); -+ if (path) { -+ enter_critical_bh(&path->state_lock); -+ if ((path->flags & RTW_MESH_PATH_FIXED) || -+ ((path->flags & RTW_MESH_PATH_ACTIVE) && -+ (last_hop_metric > path->metric))) -+ fresh_info = _FALSE; -+ } else { -+ path = rtw_mesh_path_add(adapter, ta); -+ if (IS_ERR(path)) { -+ rtw_rcu_read_unlock(); -+ return 0; -+ } -+ enter_critical_bh(&path->state_lock); -+ } -+ -+ if (fresh_info) { -+ rtw_mesh_path_assign_nexthop(path, sta); -+ path->metric = last_hop_metric; -+ path->exp_time = rtw_time_after(path->exp_time, exp_time) -+ ? path->exp_time : exp_time; -+ rtw_mesh_path_activate(path); -+ exit_critical_bh(&path->state_lock); -+ rtw_mesh_path_tx_pending(path); -+ } else -+ exit_critical_bh(&path->state_lock); -+ } -+ -+ rtw_rcu_read_unlock(); -+ -+ return process ? new_metric : 0; -+} -+ -+static void rtw_mesh_rx_hwmp_frame_cnts(_adapter *adapter, u8 *addr) -+{ -+ struct sta_info *sta; -+ -+ sta = rtw_get_stainfo(&adapter->stapriv, addr); -+ if (sta) -+ sta->sta_stats.rx_hwmp_pkts++; -+} -+ -+void rtw_mesh_rx_path_sel_frame(_adapter *adapter, union recv_frame *rframe) -+{ -+ struct mesh_plink_ent *plink = NULL; -+ struct rtw_ieee802_11_elems elems; -+ u32 path_metric; -+ struct rx_pkt_attrib *attrib = &rframe->u.hdr.attrib; -+ u8 *pframe = rframe->u.hdr.rx_data, *start; -+ uint frame_len = rframe->u.hdr.len, left; -+ struct rtw_ieee80211_hdr_3addr *frame_hdr = (struct rtw_ieee80211_hdr_3addr *)pframe; -+ u8 *frame_body = (u8 *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ ParseRes parse_res; -+ -+ plink = rtw_mesh_plink_get(adapter, get_addr2_ptr(pframe)); -+ if (!plink || plink->plink_state != RTW_MESH_PLINK_ESTAB) -+ return; -+ -+ rtw_mesh_rx_hwmp_frame_cnts(adapter, get_addr2_ptr(pframe)); -+ -+ /* Mesh action frame IE offset = 2 */ -+ attrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ left = frame_len - attrib->hdrlen - attrib->iv_len - attrib->icv_len - 2; -+ start = pframe + attrib->hdrlen + 2; -+ -+ parse_res = rtw_ieee802_11_parse_elems(start, left, &elems, 1); -+ if (parse_res == ParseFailed) -+ RTW_HWMP_INFO(FUNC_ADPT_FMT" Path Select Frame ParseFailed\n" -+ , FUNC_ADPT_ARG(adapter)); -+ else if (parse_res == ParseUnknown) -+ RTW_HWMP_INFO(FUNC_ADPT_FMT" Path Select Frame ParseUnknown\n" -+ , FUNC_ADPT_ARG(adapter)); -+ -+ if (elems.preq) { -+ if (elems.preq_len != 37) -+ /* Right now we support just 1 destination and no AE */ -+ return; -+ path_metric = rtw_hwmp_route_info_get(adapter, frame_hdr, elems.preq, -+ MPATH_PREQ); -+ if (path_metric) -+ rtw_hwmp_preq_frame_process(adapter, frame_hdr, elems.preq, -+ path_metric); -+ } -+ if (elems.prep) { -+ if (elems.prep_len != 31) -+ /* Right now we support no AE */ -+ return; -+ path_metric = rtw_hwmp_route_info_get(adapter, frame_hdr, elems.prep, -+ MPATH_PREP); -+ if (path_metric) -+ rtw_hwmp_prep_frame_process(adapter, frame_hdr, elems.prep, -+ path_metric); -+ } -+ if (elems.perr) { -+ if (elems.perr_len != 15) -+ /* Right now we support only one destination per PERR */ -+ return; -+ rtw_hwmp_perr_frame_process(adapter, frame_hdr, elems.perr); -+ } -+ if (elems.rann) -+ rtw_hwmp_rann_frame_process(adapter, frame_hdr, (struct rtw_ieee80211_rann_ie *)elems.rann); -+} -+ -+void rtw_mesh_queue_preq(struct rtw_mesh_path *path, u8 flags) -+{ -+ _adapter *adapter = path->adapter; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct rtw_mesh_preq_queue *preq_node; -+ -+ preq_node = rtw_malloc(sizeof(struct rtw_mesh_preq_queue)); -+ if (!preq_node) { -+ RTW_HWMP_INFO("could not allocate PREQ node\n"); -+ return; -+ } -+ -+ enter_critical_bh(&minfo->mesh_preq_queue_lock); -+ if (minfo->preq_queue_len == RTW_MAX_PREQ_QUEUE_LEN) { -+ exit_critical_bh(&minfo->mesh_preq_queue_lock); -+ rtw_mfree(preq_node, sizeof(struct rtw_mesh_preq_queue)); -+ if (rtw_print_ratelimit()) -+ RTW_HWMP_INFO("PREQ node queue full\n"); -+ return; -+ } -+ -+ _rtw_spinlock(&path->state_lock); -+ if (path->flags & RTW_MESH_PATH_REQ_QUEUED) { -+ _rtw_spinunlock(&path->state_lock); -+ exit_critical_bh(&minfo->mesh_preq_queue_lock); -+ rtw_mfree(preq_node, sizeof(struct rtw_mesh_preq_queue)); -+ return; -+ } -+ -+ _rtw_memcpy(preq_node->dst, path->dst, ETH_ALEN); -+ preq_node->flags = flags; -+ -+ path->flags |= RTW_MESH_PATH_REQ_QUEUED; -+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK -+ if (flags & RTW_PREQ_Q_F_CHK) -+ path->flags |= RTW_MESH_PATH_ROOT_ADD_CHK; -+#endif -+ if (flags & RTW_PREQ_Q_F_PEER_AKA) -+ path->flags |= RTW_MESH_PATH_PEER_AKA; -+ if (flags & RTW_PREQ_Q_F_BCAST_PREQ) -+ path->flags |= RTW_MESH_PATH_BCAST_PREQ; -+ _rtw_spinunlock(&path->state_lock); -+ -+ rtw_list_insert_tail(&preq_node->list, &minfo->preq_queue.list); -+ ++minfo->preq_queue_len; -+ exit_critical_bh(&minfo->mesh_preq_queue_lock); -+ -+ if (rtw_time_after(rtw_get_current_time(), minfo->last_preq + rtw_min_preq_int_jiff(adapter))) -+ rtw_mesh_work(&adapter->mesh_work); -+ -+ else if (rtw_time_before(rtw_get_current_time(), minfo->last_preq)) { -+ /* systime wrapped around issue */ -+ minfo->last_preq = rtw_get_current_time() - rtw_min_preq_int_jiff(adapter) - 1; -+ rtw_mesh_work(&adapter->mesh_work); -+ } else -+ rtw_mod_timer(&adapter->mesh_path_timer, minfo->last_preq + -+ rtw_min_preq_int_jiff(adapter) + 1); -+} -+ -+static const u8 *rtw_hwmp_preq_da(struct rtw_mesh_path *path, -+ BOOLEAN is_root_add_chk, BOOLEAN da_is_peer, -+ BOOLEAN force_preq_bcast) -+{ -+ const u8 *da; -+ -+ if (da_is_peer) -+ da = path->dst; -+ else if (force_preq_bcast) -+ da = bcast_addr; -+ else if (path->is_root) -+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK -+ da = is_root_add_chk ? path->add_chk_rann_snd_addr: -+ path->rann_snd_addr; -+#else -+ da = path->rann_snd_addr; -+#endif -+ else -+ da = bcast_addr; -+ -+ return da; -+} -+ -+void rtw_mesh_path_start_discovery(_adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_preq_queue *preq_node; -+ struct rtw_mesh_path *path; -+ u8 ttl, target_flags = 0; -+ const u8 *da; -+ u32 lifetime; -+ u8 flags = 0; -+ BOOLEAN is_root_add_chk = _FALSE; -+ BOOLEAN da_is_peer, force_preq_bcast; -+ -+ enter_critical_bh(&minfo->mesh_preq_queue_lock); -+ if (!minfo->preq_queue_len || -+ rtw_time_before(rtw_get_current_time(), minfo->last_preq + -+ rtw_min_preq_int_jiff(adapter))) { -+ exit_critical_bh(&minfo->mesh_preq_queue_lock); -+ return; -+ } -+ -+ preq_node = rtw_list_first_entry(&minfo->preq_queue.list, -+ struct rtw_mesh_preq_queue, list); -+ rtw_list_delete(&preq_node->list); /* list_del_init(&preq_node->list); */ -+ --minfo->preq_queue_len; -+ exit_critical_bh(&minfo->mesh_preq_queue_lock); -+ -+ rtw_rcu_read_lock(); -+ path = rtw_mesh_path_lookup(adapter, preq_node->dst); -+ if (!path) -+ goto enddiscovery; -+ -+ enter_critical_bh(&path->state_lock); -+ if (path->flags & (RTW_MESH_PATH_DELETED | RTW_MESH_PATH_FIXED)) { -+ exit_critical_bh(&path->state_lock); -+ goto enddiscovery; -+ } -+ path->flags &= ~RTW_MESH_PATH_REQ_QUEUED; -+ if (preq_node->flags & RTW_PREQ_Q_F_START) { -+ if (path->flags & RTW_MESH_PATH_RESOLVING) { -+ exit_critical_bh(&path->state_lock); -+ goto enddiscovery; -+ } else { -+ path->flags &= ~RTW_MESH_PATH_RESOLVED; -+ path->flags |= RTW_MESH_PATH_RESOLVING; -+ path->discovery_retries = 0; -+ path->discovery_timeout = rtw_disc_timeout_jiff(adapter); -+ } -+ } else if (!(path->flags & RTW_MESH_PATH_RESOLVING) || -+ path->flags & RTW_MESH_PATH_RESOLVED) { -+ path->flags &= ~RTW_MESH_PATH_RESOLVING; -+ exit_critical_bh(&path->state_lock); -+ goto enddiscovery; -+ } -+ -+ minfo->last_preq = rtw_get_current_time(); -+ -+ if (rtw_time_after(rtw_get_current_time(), minfo->last_sn_update + -+ rtw_net_traversal_jiffies(adapter)) || -+ rtw_time_before(rtw_get_current_time(), minfo->last_sn_update)) { -+ ++minfo->sn; -+ minfo->last_sn_update = rtw_get_current_time(); -+ } -+ lifetime = rtw_default_lifetime(adapter); -+ ttl = mshcfg->element_ttl; -+ if (ttl == 0) { -+ minfo->mshstats.dropped_frames_ttl++; -+ exit_critical_bh(&path->state_lock); -+ goto enddiscovery; -+ } -+ -+ if (preq_node->flags & RTW_PREQ_Q_F_REFRESH) -+ target_flags |= RTW_IEEE80211_PREQ_TO_FLAG; -+ else -+ target_flags &= ~RTW_IEEE80211_PREQ_TO_FLAG; -+ -+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK -+ is_root_add_chk = !!(path->flags & RTW_MESH_PATH_ROOT_ADD_CHK); -+#endif -+ da_is_peer = !!(path->flags & RTW_MESH_PATH_PEER_AKA); -+ force_preq_bcast = !!(path->flags & RTW_MESH_PATH_BCAST_PREQ); -+ exit_critical_bh(&path->state_lock); -+ -+ da = rtw_hwmp_preq_da(path, is_root_add_chk, -+ da_is_peer, force_preq_bcast); -+ -+#ifdef CONFIG_RTW_MESH_ON_DMD_GANN -+ flags = (mshcfg->dot11MeshGateAnnouncementProtocol) -+ ? RTW_IEEE80211_PREQ_IS_GATE_FLAG : 0; -+#endif -+ rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREQ, flags, adapter_mac_addr(adapter), minfo->sn, -+ target_flags, path->dst, path->sn, da, 0, -+ ttl, lifetime, 0, minfo->preq_id++, adapter); -+ rtw_mod_timer(&path->timer, rtw_get_current_time() + path->discovery_timeout); -+ -+enddiscovery: -+ rtw_rcu_read_unlock(); -+ rtw_mfree(preq_node, sizeof(struct rtw_mesh_preq_queue)); -+} -+ -+void rtw_mesh_path_timer(void *ctx) -+{ -+ struct rtw_mesh_path *path = (void *) ctx; -+ _adapter *adapter = path->adapter; -+ int ret; -+ u8 retry = 0; -+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK -+ struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg; -+#endif -+ /* TBD: Proctect for suspend */ -+#if 0 -+ if (suspending) -+ return; -+#endif -+ enter_critical_bh(&path->state_lock); -+ if (path->flags & RTW_MESH_PATH_RESOLVED || -+ (!(path->flags & RTW_MESH_PATH_RESOLVING))) { -+ path->flags &= ~(RTW_MESH_PATH_RESOLVING | -+ RTW_MESH_PATH_RESOLVED | -+ RTW_MESH_PATH_ROOT_ADD_CHK | -+ RTW_MESH_PATH_PEER_AKA | -+ RTW_MESH_PATH_BCAST_PREQ); -+ exit_critical_bh(&path->state_lock); -+ } else if (path->discovery_retries < rtw_max_preq_retries(adapter)) { -+ ++path->discovery_retries; -+ path->discovery_timeout *= 2; -+ path->flags &= ~RTW_MESH_PATH_REQ_QUEUED; -+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK -+ if (path->discovery_retries > mshcfg->max_root_add_chk_cnt) -+ path->flags &= ~RTW_MESH_PATH_ROOT_ADD_CHK; -+#endif -+ if (path->gate_asked) -+ retry |= RTW_PREQ_Q_F_REFRESH; -+ -+ exit_critical_bh(&path->state_lock); -+ rtw_mesh_queue_preq(path, retry); -+ } else { -+ path->flags &= ~(RTW_MESH_PATH_RESOLVING | -+ RTW_MESH_PATH_RESOLVED | -+ RTW_MESH_PATH_REQ_QUEUED | -+ RTW_MESH_PATH_ROOT_ADD_CHK | -+ RTW_MESH_PATH_PEER_AKA | -+ RTW_MESH_PATH_BCAST_PREQ); -+ path->exp_time = rtw_get_current_time(); -+ exit_critical_bh(&path->state_lock); -+ if (!path->is_gate && rtw_mesh_gate_num(adapter) > 0) { -+ ret = rtw_mesh_path_send_to_gates(path); -+ if (ret) -+ RTW_HWMP_DBG("no gate was reachable\n"); -+ } else -+ rtw_mesh_path_flush_pending(path); -+ } -+} -+ -+ -+void rtw_mesh_path_tx_root_frame(_adapter *adapter) -+{ -+ struct rtw_mesh_cfg *mshcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ u32 interval = mshcfg->dot11MeshHWMPRannInterval; -+ u8 flags, target_flags = 0; -+ -+ flags = (mshcfg->dot11MeshGateAnnouncementProtocol) -+ ? RTW_RANN_FLAG_IS_GATE : 0; -+ -+ switch (mshcfg->dot11MeshHWMPRootMode) { -+ case RTW_IEEE80211_PROACTIVE_RANN: -+ rtw_mesh_path_sel_frame_tx(RTW_MPATH_RANN, flags, adapter_mac_addr(adapter), -+ ++minfo->sn, 0, NULL, 0, bcast_addr, -+ 0, mshcfg->element_ttl, -+ interval, 0, 0, adapter); -+ break; -+ case RTW_IEEE80211_PROACTIVE_PREQ_WITH_PREP: -+ flags |= RTW_IEEE80211_PREQ_PROACTIVE_PREP_FLAG; -+ case RTW_IEEE80211_PROACTIVE_PREQ_NO_PREP: -+ interval = mshcfg->dot11MeshHWMPactivePathToRootTimeout; -+ target_flags |= RTW_IEEE80211_PREQ_TO_FLAG | -+ RTW_IEEE80211_PREQ_USN_FLAG; -+ rtw_mesh_path_sel_frame_tx(RTW_MPATH_PREQ, flags, adapter_mac_addr(adapter), -+ ++minfo->sn, target_flags, -+ (u8 *) bcast_addr, 0, bcast_addr, -+ 0, mshcfg->element_ttl, interval, -+ 0, minfo->preq_id++, adapter); -+ break; -+ default: -+ RTW_HWMP_INFO("Proactive mechanism not supported\n"); -+ return; -+ } -+} -+ -+void rtw_mesh_work(_workitem *work) -+{ -+ /* use kernel global workqueue */ -+ _set_workitem(work); -+} -+ -+void rtw_ieee80211_mesh_path_timer(void *ctx) -+{ -+ _adapter *adapter = (_adapter *)ctx; -+ rtw_mesh_work(&adapter->mesh_work); -+} -+ -+void rtw_ieee80211_mesh_path_root_timer(void *ctx) -+{ -+ _adapter *adapter = (_adapter *)ctx; -+ -+ rtw_set_bit(RTW_MESH_WORK_ROOT, &adapter->wrkq_flags); -+ -+ rtw_mesh_work(&adapter->mesh_work); -+} -+ -+static void rtw_ieee80211_mesh_rootpath(_adapter *adapter) -+{ -+ u32 interval; -+ -+ rtw_mesh_path_tx_root_frame(adapter); -+ -+ if (adapter->mesh_cfg.dot11MeshHWMPRootMode == RTW_IEEE80211_PROACTIVE_RANN) -+ interval = adapter->mesh_cfg.dot11MeshHWMPRannInterval; -+ else -+ interval = adapter->mesh_cfg.dot11MeshHWMProotInterval; -+ -+ rtw_mod_timer(&adapter->mesh_path_root_timer, -+ RTW_TU_TO_EXP_TIME(interval)); -+} -+ -+BOOLEAN rtw_ieee80211_mesh_root_setup(_adapter *adapter) -+{ -+ BOOLEAN root_enabled = _FALSE; -+ -+ if (adapter->mesh_cfg.dot11MeshHWMPRootMode > RTW_IEEE80211_ROOTMODE_ROOT) { -+ rtw_set_bit(RTW_MESH_WORK_ROOT, &adapter->wrkq_flags); -+ root_enabled = _TRUE; -+ } -+ else { -+ rtw_clear_bit(RTW_MESH_WORK_ROOT, &adapter->wrkq_flags); -+ /* stop running timer */ -+ _cancel_timer_ex(&adapter->mesh_path_root_timer); -+ root_enabled = _FALSE; -+ } -+ -+ return root_enabled; -+} -+ -+void rtw_mesh_work_hdl(_workitem *work) -+{ -+ _adapter *adapter = container_of(work, _adapter, mesh_work); -+ -+ while(adapter->mesh_info.preq_queue_len) { -+ if (rtw_time_after(rtw_get_current_time(), -+ adapter->mesh_info.last_preq + rtw_min_preq_int_jiff(adapter))) -+ /* It will consume preq_queue_len */ -+ rtw_mesh_path_start_discovery(adapter); -+ else { -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ -+ rtw_mod_timer(&adapter->mesh_path_timer, -+ minfo->last_preq + rtw_min_preq_int_jiff(adapter) + 1); -+ break; -+ } -+ } -+ -+ if (rtw_test_and_clear_bit(RTW_MESH_WORK_ROOT, &adapter->wrkq_flags)) -+ rtw_ieee80211_mesh_rootpath(adapter); -+} -+ -+#ifndef RTW_PER_CMD_SUPPORT_FW -+static void rtw_update_metric_directly(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ u8 i; -+ -+ for (i = 0; i < macid_ctl->num; i++) { -+ u8 role; -+ role = GET_H2CCMD_MSRRPT_PARM_ROLE(&macid_ctl->h2c_msr[i]); -+ if (role == H2C_MSR_ROLE_MESH) { -+ struct sta_info *sta = macid_ctl->sta[i]; -+ u8 rate_idx, sgi, bw; -+ u32 rate; -+ -+ if (!sta) -+ continue; -+ rate_idx = rtw_get_current_tx_rate(adapter, sta); -+ sgi = rtw_get_current_tx_sgi(adapter, sta); -+ bw = sta->cmn.bw_mode; -+ rate = rtw_desc_rate_to_bitrate(bw, rate_idx, sgi); -+ sta->metrics.data_rate = rate; -+ } -+ } -+} -+#endif -+ -+void rtw_mesh_atlm_param_req_timer(void *ctx) -+{ -+ _adapter *adapter = (_adapter *)ctx; -+ u8 ret = _FAIL; -+ -+#ifdef RTW_PER_CMD_SUPPORT_FW -+ ret = rtw_req_per_cmd(adapter); -+ if (ret == _FAIL) -+ RTW_HWMP_INFO("rtw_req_per_cmd fail\n"); -+#else -+ rtw_update_metric_directly(adapter); -+#endif -+ _set_timer(&adapter->mesh_atlm_param_req_timer, RTW_ATLM_REQ_CYCLE); -+} -+ -+#endif /* CONFIG_RTW_MESH */ -+ -diff --git a/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_hwmp.h b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_hwmp.h -new file mode 100644 -index 000000000000..943341781602 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_hwmp.h -@@ -0,0 +1,60 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_MESH_HWMP_H_ -+#define __RTW_MESH_HWMP_H_ -+ -+#ifndef DBG_RTW_HWMP -+#define DBG_RTW_HWMP 0 -+#endif -+#if DBG_RTW_HWMP -+#define RTW_HWMP_DBG(fmt, arg...) RTW_PRINT(fmt, ##arg) -+#else -+#define RTW_HWMP_DBG(fmt, arg...) RTW_DBG(fmt, ##arg) -+#endif -+ -+#ifndef INFO_RTW_HWMP -+#define INFO_RTW_HWMP 0 -+#endif -+#if INFO_RTW_HWMP -+#define RTW_HWMP_INFO(fmt, arg...) RTW_PRINT(fmt, ##arg) -+#else -+#define RTW_HWMP_INFO(fmt, arg...) RTW_INFO(fmt, ##arg) -+#endif -+ -+ -+void rtw_ewma_err_rate_init(struct rtw_ewma_err_rate *e); -+unsigned long rtw_ewma_err_rate_read(struct rtw_ewma_err_rate *e); -+void rtw_ewma_err_rate_add(struct rtw_ewma_err_rate *e, unsigned long val); -+int rtw_mesh_path_error_tx(_adapter *adapter, -+ u8 ttl, const u8 *target, u32 target_sn, -+ u16 target_rcode, const u8 *ra); -+void rtw_ieee80211s_update_metric(_adapter *adapter, u8 mac_id, -+ u8 per, u8 rate, -+ u8 bw, u8 total_pkt); -+void rtw_mesh_rx_path_sel_frame(_adapter *adapter, union recv_frame *rframe); -+void rtw_mesh_queue_preq(struct rtw_mesh_path *mpath, u8 flags); -+void rtw_mesh_path_start_discovery(_adapter *adapter); -+void rtw_mesh_path_timer(void *ctx); -+void rtw_mesh_path_tx_root_frame(_adapter *adapter); -+void rtw_mesh_work_hdl(_workitem *work); -+void rtw_ieee80211_mesh_path_timer(void *ctx); -+void rtw_ieee80211_mesh_path_root_timer(void *ctx); -+BOOLEAN rtw_ieee80211_mesh_root_setup(_adapter *adapter); -+void rtw_mesh_work(_workitem *work); -+void rtw_mesh_atlm_param_req_timer(void *ctx); -+ -+#endif /* __RTW_MESH_HWMP_H_ */ -+ -+ -diff --git a/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_pathtbl.c b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_pathtbl.c -new file mode 100644 -index 000000000000..b74b56792d75 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_pathtbl.c -@@ -0,0 +1,1242 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_MESH_PATHTBL_C_ -+ -+#ifdef CONFIG_RTW_MESH -+#include -+#include -+ -+#ifdef PLATFORM_LINUX -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+static void rtw_mpath_free_rcu(struct rtw_mesh_path *mpath) -+{ -+ kfree_rcu(mpath, rcu); -+ rtw_mstat_update(MSTAT_TYPE_PHY, MSTAT_FREE, sizeof(struct rtw_mesh_path)); -+} -+#else -+static void rtw_mpath_free_rcu_callback(rtw_rcu_head *head) -+{ -+ struct rtw_mesh_path *mpath; -+ -+ mpath = container_of(head, struct rtw_mesh_path, rcu); -+ rtw_mfree(mpath, sizeof(struct rtw_mesh_path)); -+} -+ -+static void rtw_mpath_free_rcu(struct rtw_mesh_path *mpath) -+{ -+ call_rcu(&mpath->rcu, rtw_mpath_free_rcu_callback); -+} -+#endif -+#endif /* PLATFORM_LINUX */ -+ -+static void rtw_mesh_path_free_rcu(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath); -+ -+static u32 rtw_mesh_table_hash(const void *addr, u32 len, u32 seed) -+{ -+ /* Use last four bytes of hw addr as hash index */ -+ return jhash_1word(*(u32 *)(addr+2), seed); -+} -+ -+static const rtw_rhashtable_params rtw_mesh_rht_params = { -+ .nelem_hint = 2, -+ .automatic_shrinking = true, -+ .key_len = ETH_ALEN, -+ .key_offset = offsetof(struct rtw_mesh_path, dst), -+ .head_offset = offsetof(struct rtw_mesh_path, rhash), -+ .hashfn = rtw_mesh_table_hash, -+}; -+ -+static inline bool rtw_mpath_expired(struct rtw_mesh_path *mpath) -+{ -+ return (mpath->flags & RTW_MESH_PATH_ACTIVE) && -+ rtw_time_after(rtw_get_current_time(), mpath->exp_time) && -+ !(mpath->flags & RTW_MESH_PATH_FIXED); -+} -+ -+static void rtw_mesh_path_rht_free(void *ptr, void *tblptr) -+{ -+ struct rtw_mesh_path *mpath = ptr; -+ struct rtw_mesh_table *tbl = tblptr; -+ -+ rtw_mesh_path_free_rcu(tbl, mpath); -+} -+ -+static struct rtw_mesh_table *rtw_mesh_table_alloc(void) -+{ -+ struct rtw_mesh_table *newtbl; -+ -+ newtbl = rtw_malloc(sizeof(struct rtw_mesh_table)); -+ if (!newtbl) -+ return NULL; -+ -+ rtw_hlist_head_init(&newtbl->known_gates); -+ ATOMIC_SET(&newtbl->entries, 0); -+ _rtw_spinlock_init(&newtbl->gates_lock); -+ -+ return newtbl; -+} -+ -+static void rtw_mesh_table_free(struct rtw_mesh_table *tbl) -+{ -+ rtw_rhashtable_free_and_destroy(&tbl->rhead, -+ rtw_mesh_path_rht_free, tbl); -+ rtw_mfree(tbl, sizeof(struct rtw_mesh_table)); -+} -+ -+/** -+ * -+ * rtw_mesh_path_assign_nexthop - update mesh path next hop -+ * -+ * @mpath: mesh path to update -+ * @sta: next hop to assign -+ * -+ * Locking: mpath->state_lock must be held when calling this function -+ */ -+void rtw_mesh_path_assign_nexthop(struct rtw_mesh_path *mpath, struct sta_info *sta) -+{ -+ struct xmit_frame *xframe; -+ _list *list, *head; -+ -+ rtw_rcu_assign_pointer(mpath->next_hop, sta); -+ -+ enter_critical_bh(&mpath->frame_queue.lock); -+ head = &mpath->frame_queue.queue; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ xframe = LIST_CONTAINOR(list, struct xmit_frame, list); -+ list = get_next(list); -+ _rtw_memcpy(xframe->attrib.ra, sta->cmn.mac_addr, ETH_ALEN); -+ } -+ -+ exit_critical_bh(&mpath->frame_queue.lock); -+} -+ -+static void rtw_prepare_for_gate(struct xmit_frame *xframe, char *dst_addr, -+ struct rtw_mesh_path *gate_mpath) -+{ -+ struct pkt_attrib *attrib = &xframe->attrib; -+ char *next_hop; -+ -+ if (attrib->mesh_frame_mode == MESH_UCAST_DATA) -+ attrib->mesh_frame_mode = MESH_UCAST_PX_DATA; -+ -+ /* update next hop */ -+ rtw_rcu_read_lock(); -+ next_hop = rtw_rcu_dereference(gate_mpath->next_hop)->cmn.mac_addr; -+ _rtw_memcpy(attrib->ra, next_hop, ETH_ALEN); -+ rtw_rcu_read_unlock(); -+ _rtw_memcpy(attrib->mda, dst_addr, ETH_ALEN); -+} -+ -+/** -+ * -+ * rtw_mesh_path_move_to_queue - Move or copy frames from one mpath queue to another -+ * -+ * This function is used to transfer or copy frames from an unresolved mpath to -+ * a gate mpath. The function also adds the Address Extension field and -+ * updates the next hop. -+ * -+ * If a frame already has an Address Extension field, only the next hop and -+ * destination addresses are updated. -+ * -+ * The gate mpath must be an active mpath with a valid mpath->next_hop. -+ * -+ * @mpath: An active mpath the frames will be sent to (i.e. the gate) -+ * @from_mpath: The failed mpath -+ * @copy: When true, copy all the frames to the new mpath queue. When false, -+ * move them. -+ */ -+static void rtw_mesh_path_move_to_queue(struct rtw_mesh_path *gate_mpath, -+ struct rtw_mesh_path *from_mpath, -+ bool copy) -+{ -+ struct xmit_frame *fskb; -+ _list *list, *head; -+ _list failq; -+ u32 failq_len; -+ _irqL flags; -+ -+ if (rtw_warn_on(gate_mpath == from_mpath)) -+ return; -+ if (rtw_warn_on(!gate_mpath->next_hop)) -+ return; -+ -+ _rtw_init_listhead(&failq); -+ -+ _enter_critical_bh(&from_mpath->frame_queue.lock, &flags); -+ rtw_list_splice_init(&from_mpath->frame_queue.queue, &failq); -+ failq_len = from_mpath->frame_queue_len; -+ from_mpath->frame_queue_len = 0; -+ _exit_critical_bh(&from_mpath->frame_queue.lock, &flags); -+ -+ head = &failq; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ if (gate_mpath->frame_queue_len >= RTW_MESH_FRAME_QUEUE_LEN) { -+ RTW_MPATH_DBG(FUNC_ADPT_FMT" mpath queue for gate %pM is full!\n" -+ , FUNC_ADPT_ARG(gate_mpath->adapter), gate_mpath->dst); -+ break; -+ } -+ -+ fskb = LIST_CONTAINOR(list, struct xmit_frame, list); -+ list = get_next(list); -+ -+ rtw_list_delete(&fskb->list); -+ failq_len--; -+ rtw_prepare_for_gate(fskb, gate_mpath->dst, gate_mpath); -+ _enter_critical_bh(&gate_mpath->frame_queue.lock, &flags); -+ rtw_list_insert_tail(&fskb->list, get_list_head(&gate_mpath->frame_queue)); -+ gate_mpath->frame_queue_len++; -+ _exit_critical_bh(&gate_mpath->frame_queue.lock, &flags); -+ -+ #if 0 /* TODO: copy */ -+ skb = rtw_skb_copy(fskb); -+ if (rtw_warn_on(!skb)) -+ break; -+ -+ rtw_prepare_for_gate(skb, gate_mpath->dst, gate_mpath); -+ skb_queue_tail(&gate_mpath->frame_queue, skb); -+ -+ if (copy) -+ continue; -+ -+ __skb_unlink(fskb, &failq); -+ rtw_skb_free(fskb); -+ #endif -+ } -+ -+ RTW_MPATH_DBG(FUNC_ADPT_FMT" mpath queue for gate %pM has %d frames\n" -+ , FUNC_ADPT_ARG(gate_mpath->adapter), gate_mpath->dst, gate_mpath->frame_queue_len); -+ -+ if (!copy) -+ return; -+ -+ _enter_critical_bh(&from_mpath->frame_queue.lock, &flags); -+ rtw_list_splice(&failq, &from_mpath->frame_queue.queue); -+ from_mpath->frame_queue_len += failq_len; -+ _exit_critical_bh(&from_mpath->frame_queue.lock, &flags); -+} -+ -+ -+static struct rtw_mesh_path *rtw_mpath_lookup(struct rtw_mesh_table *tbl, const u8 *dst) -+{ -+ struct rtw_mesh_path *mpath; -+ -+ if (!tbl) -+ return NULL; -+ -+ mpath = rtw_rhashtable_lookup_fast(&tbl->rhead, dst, rtw_mesh_rht_params); -+ -+ if (mpath && rtw_mpath_expired(mpath)) { -+ enter_critical_bh(&mpath->state_lock); -+ mpath->flags &= ~RTW_MESH_PATH_ACTIVE; -+ exit_critical_bh(&mpath->state_lock); -+ } -+ return mpath; -+} -+ -+/** -+ * rtw_mesh_path_lookup - look up a path in the mesh path table -+ * @sdata: local subif -+ * @dst: hardware address (ETH_ALEN length) of destination -+ * -+ * Returns: pointer to the mesh path structure, or NULL if not found -+ * -+ * Locking: must be called within a read rcu section. -+ */ -+struct rtw_mesh_path * -+rtw_mesh_path_lookup(_adapter *adapter, const u8 *dst) -+{ -+ return rtw_mpath_lookup(adapter->mesh_info.mesh_paths, dst); -+} -+ -+struct rtw_mesh_path * -+rtw_mpp_path_lookup(_adapter *adapter, const u8 *dst) -+{ -+ return rtw_mpath_lookup(adapter->mesh_info.mpp_paths, dst); -+} -+ -+static struct rtw_mesh_path * -+__rtw_mesh_path_lookup_by_idx(struct rtw_mesh_table *tbl, int idx) -+{ -+ int i = 0, ret; -+ struct rtw_mesh_path *mpath = NULL; -+ rtw_rhashtable_iter iter; -+ -+ if (!tbl) -+ return NULL; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return NULL; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto err; -+ -+ while ((mpath = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) -+ continue; -+ if (IS_ERR(mpath)) -+ break; -+ if (i++ == idx) -+ break; -+ } -+err: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+ -+ if (IS_ERR(mpath) || !mpath) -+ return NULL; -+ -+ if (rtw_mpath_expired(mpath)) { -+ enter_critical_bh(&mpath->state_lock); -+ mpath->flags &= ~RTW_MESH_PATH_ACTIVE; -+ exit_critical_bh(&mpath->state_lock); -+ } -+ return mpath; -+} -+ -+/** -+ * rtw_mesh_path_lookup_by_idx - look up a path in the mesh path table by its index -+ * @idx: index -+ * @sdata: local subif, or NULL for all entries -+ * -+ * Returns: pointer to the mesh path structure, or NULL if not found. -+ * -+ * Locking: must be called within a read rcu section. -+ */ -+struct rtw_mesh_path * -+rtw_mesh_path_lookup_by_idx(_adapter *adapter, int idx) -+{ -+ return __rtw_mesh_path_lookup_by_idx(adapter->mesh_info.mesh_paths, idx); -+} -+ -+void dump_mpath(void *sel, _adapter *adapter) -+{ -+ struct rtw_mesh_path *mpath; -+ int idx = 0; -+ char dst[ETH_ALEN]; -+ char next_hop[ETH_ALEN]; -+ u32 sn, metric, qlen; -+ u32 exp_ms = 0, dto_ms; -+ u8 drty; -+ enum rtw_mesh_path_flags flags; -+ -+ RTW_PRINT_SEL(sel, "%-17s %-17s %-10s %-10s %-4s %-6s %-6s %-4s flags\n" -+ , "dst", "next_hop", "sn", "metric", "qlen", "exp_ms", "dto_ms", "drty" -+ ); -+ -+ do { -+ rtw_rcu_read_lock(); -+ -+ mpath = rtw_mesh_path_lookup_by_idx(adapter, idx); -+ if (mpath) { -+ _rtw_memcpy(dst, mpath->dst, ETH_ALEN); -+ _rtw_memcpy(next_hop, mpath->next_hop->cmn.mac_addr, ETH_ALEN); -+ sn = mpath->sn; -+ metric = mpath->metric; -+ qlen = mpath->frame_queue_len; -+ if (rtw_time_after(mpath->exp_time, rtw_get_current_time())) -+ exp_ms = rtw_get_remaining_time_ms(mpath->exp_time); -+ dto_ms = rtw_systime_to_ms(mpath->discovery_timeout); -+ drty = mpath->discovery_retries; -+ flags = mpath->flags; -+ } -+ -+ rtw_rcu_read_unlock(); -+ -+ if (mpath) { -+ RTW_PRINT_SEL(sel, MAC_FMT" "MAC_FMT" %10u %10u %4u %6u %6u %4u%s%s%s%s%s%s%s%s%s%s\n" -+ , MAC_ARG(dst), MAC_ARG(next_hop), sn, metric, qlen -+ , exp_ms < 999999 ? exp_ms : 999999 -+ , dto_ms < 999999 ? dto_ms : 999999 -+ , drty -+ , (flags & RTW_MESH_PATH_ACTIVE) ? " ACT" : "" -+ , (flags & RTW_MESH_PATH_RESOLVING) ? " RSVING" : "" -+ , (flags & RTW_MESH_PATH_SN_VALID) ? " SN_VALID" : "" -+ , (flags & RTW_MESH_PATH_FIXED) ? " FIXED" : "" -+ , (flags & RTW_MESH_PATH_RESOLVED) ? " RSVED" : "" -+ , (flags & RTW_MESH_PATH_REQ_QUEUED) ? " REQ_IN_Q" : "" -+ , (flags & RTW_MESH_PATH_DELETED) ? " DELETED" : "" -+ , (flags & RTW_MESH_PATH_ROOT_ADD_CHK) ? " R_ADD_CHK" : "" -+ , (flags & RTW_MESH_PATH_PEER_AKA) ? " PEER_AKA" : "" -+ , (flags & RTW_MESH_PATH_BCAST_PREQ) ? " BC_PREQ" : "" -+ ); -+ } -+ -+ idx++; -+ } while (mpath); -+} -+ -+/** -+ * rtw_mpp_path_lookup_by_idx - look up a path in the proxy path table by its index -+ * @idx: index -+ * @sdata: local subif, or NULL for all entries -+ * -+ * Returns: pointer to the proxy path structure, or NULL if not found. -+ * -+ * Locking: must be called within a read rcu section. -+ */ -+struct rtw_mesh_path * -+rtw_mpp_path_lookup_by_idx(_adapter *adapter, int idx) -+{ -+ return __rtw_mesh_path_lookup_by_idx(adapter->mesh_info.mpp_paths, idx); -+} -+ -+/** -+ * rtw_mesh_path_add_gate - add the given mpath to a mesh gate to our path table -+ * @mpath: gate path to add to table -+ */ -+int rtw_mesh_path_add_gate(struct rtw_mesh_path *mpath) -+{ -+ struct rtw_mesh_cfg *mcfg; -+ struct rtw_mesh_info *minfo; -+ struct rtw_mesh_table *tbl; -+ int err, ori_num_gates; -+ -+ rtw_rcu_read_lock(); -+ tbl = mpath->adapter->mesh_info.mesh_paths; -+ if (!tbl) { -+ err = -ENOENT; -+ goto err_rcu; -+ } -+ -+ enter_critical_bh(&mpath->state_lock); -+ mcfg = &mpath->adapter->mesh_cfg; -+ mpath->gate_timeout = rtw_get_current_time() + -+ rtw_ms_to_systime(mcfg->path_gate_timeout_factor * -+ mpath->gate_ann_int); -+ if (mpath->is_gate) { -+ err = -EEXIST; -+ exit_critical_bh(&mpath->state_lock); -+ goto err_rcu; -+ } -+ -+ minfo = &mpath->adapter->mesh_info; -+ mpath->is_gate = true; -+ _rtw_spinlock(&tbl->gates_lock); -+ ori_num_gates = minfo->num_gates; -+ minfo->num_gates++; -+ rtw_hlist_add_head_rcu(&mpath->gate_list, &tbl->known_gates); -+ -+ if (ori_num_gates == 0 -+ || rtw_macaddr_is_larger(mpath->dst, minfo->max_addr_gate->dst) -+ ) { -+ minfo->max_addr_gate = mpath; -+ minfo->max_addr_gate_is_larger_than_self = -+ rtw_macaddr_is_larger(mpath->dst, adapter_mac_addr(mpath->adapter)); -+ } -+ -+ _rtw_spinunlock(&tbl->gates_lock); -+ -+ exit_critical_bh(&mpath->state_lock); -+ -+ if (ori_num_gates == 0) { -+ update_beacon(mpath->adapter, WLAN_EID_MESH_CONFIG, NULL, _TRUE, 0); -+ #if CONFIG_RTW_MESH_CTO_MGATE_CARRIER -+ if (!rtw_mesh_cto_mgate_required(mpath->adapter)) -+ rtw_netif_carrier_on(mpath->adapter->pnetdev); -+ #endif -+ } -+ -+ RTW_MPATH_DBG( -+ FUNC_ADPT_FMT" Mesh path: Recorded new gate: %pM. %d known gates\n", -+ FUNC_ADPT_ARG(mpath->adapter), -+ mpath->dst, mpath->adapter->mesh_info.num_gates); -+ err = 0; -+err_rcu: -+ rtw_rcu_read_unlock(); -+ return err; -+} -+ -+/** -+ * rtw_mesh_gate_del - remove a mesh gate from the list of known gates -+ * @tbl: table which holds our list of known gates -+ * @mpath: gate mpath -+ */ -+void rtw_mesh_gate_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath) -+{ -+ struct rtw_mesh_cfg *mcfg; -+ struct rtw_mesh_info *minfo; -+ int ori_num_gates; -+ -+ rtw_lockdep_assert_held(&mpath->state_lock); -+ if (!mpath->is_gate) -+ return; -+ -+ mcfg = &mpath->adapter->mesh_cfg; -+ minfo = &mpath->adapter->mesh_info; -+ -+ mpath->is_gate = false; -+ enter_critical_bh(&tbl->gates_lock); -+ rtw_hlist_del_rcu(&mpath->gate_list); -+ ori_num_gates = minfo->num_gates; -+ minfo->num_gates--; -+ -+ if (ori_num_gates == 1) { -+ minfo->max_addr_gate = NULL; -+ minfo->max_addr_gate_is_larger_than_self = 0; -+ } else if (minfo->max_addr_gate == mpath) { -+ struct rtw_mesh_path *gate, *max_addr_gate = NULL; -+ rtw_hlist_node *node; -+ -+ rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) { -+ if (!max_addr_gate || rtw_macaddr_is_larger(gate->dst, max_addr_gate->dst)) -+ max_addr_gate = gate; -+ } -+ minfo->max_addr_gate = max_addr_gate; -+ minfo->max_addr_gate_is_larger_than_self = -+ rtw_macaddr_is_larger(max_addr_gate->dst, adapter_mac_addr(mpath->adapter)); -+ } -+ -+ exit_critical_bh(&tbl->gates_lock); -+ -+ if (ori_num_gates == 1) { -+ update_beacon(mpath->adapter, WLAN_EID_MESH_CONFIG, NULL, _TRUE, 0); -+ #if CONFIG_RTW_MESH_CTO_MGATE_CARRIER -+ if (rtw_mesh_cto_mgate_required(mpath->adapter)) -+ rtw_netif_carrier_off(mpath->adapter->pnetdev); -+ #endif -+ } -+ -+ RTW_MPATH_DBG( -+ FUNC_ADPT_FMT" Mesh path: Deleted gate: %pM. %d known gates\n", -+ FUNC_ADPT_ARG(mpath->adapter), -+ mpath->dst, mpath->adapter->mesh_info.num_gates); -+} -+ -+/** -+ * rtw_mesh_gate_search - search a mesh gate from the list of known gates -+ * @tbl: table which holds our list of known gates -+ * @addr: address of gate -+ */ -+bool rtw_mesh_gate_search(struct rtw_mesh_table *tbl, const u8 *addr) -+{ -+ struct rtw_mesh_path *gate; -+ rtw_hlist_node *node; -+ bool exist = 0; -+ -+ rtw_rcu_read_lock(); -+ rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) { -+ if (_rtw_memcmp(gate->dst, addr, ETH_ALEN) == _TRUE) { -+ exist = 1; -+ break; -+ } -+ } -+ -+ rtw_rcu_read_unlock(); -+ -+ return exist; -+} -+ -+/** -+ * rtw_mesh_gate_num - number of gates known to this interface -+ * @sdata: subif data -+ */ -+int rtw_mesh_gate_num(_adapter *adapter) -+{ -+ return adapter->mesh_info.num_gates; -+} -+ -+bool rtw_mesh_is_primary_gate(_adapter *adapter) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ -+ return mcfg->dot11MeshGateAnnouncementProtocol -+ && !minfo->max_addr_gate_is_larger_than_self; -+} -+ -+void dump_known_gates(void *sel, _adapter *adapter) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct rtw_mesh_table *tbl; -+ struct rtw_mesh_path *gate; -+ rtw_hlist_node *node; -+ -+ if (!rtw_mesh_gate_num(adapter)) -+ goto exit; -+ -+ rtw_rcu_read_lock(); -+ -+ tbl = minfo->mesh_paths; -+ if (!tbl) -+ goto unlock; -+ -+ RTW_PRINT_SEL(sel, "num:%d\n", rtw_mesh_gate_num(adapter)); -+ -+ rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) { -+ RTW_PRINT_SEL(sel, "%c"MAC_FMT"\n" -+ , gate == minfo->max_addr_gate ? '*' : ' ' -+ , MAC_ARG(gate->dst)); -+ } -+ -+unlock: -+ rtw_rcu_read_unlock(); -+exit: -+ return; -+} -+ -+static -+struct rtw_mesh_path *rtw_mesh_path_new(_adapter *adapter, -+ const u8 *dst) -+{ -+ struct rtw_mesh_path *new_mpath; -+ -+ new_mpath = rtw_zmalloc(sizeof(struct rtw_mesh_path)); -+ if (!new_mpath) -+ return NULL; -+ -+ _rtw_memcpy(new_mpath->dst, dst, ETH_ALEN); -+ _rtw_memset(new_mpath->rann_snd_addr, 0xFF, ETH_ALEN); -+ new_mpath->is_root = false; -+ new_mpath->adapter = adapter; -+ new_mpath->flags = 0; -+ new_mpath->gate_asked = false; -+ _rtw_init_queue(&new_mpath->frame_queue); -+ new_mpath->frame_queue_len = 0; -+ new_mpath->exp_time = rtw_get_current_time(); -+ _rtw_spinlock_init(&new_mpath->state_lock); -+ rtw_init_timer(&new_mpath->timer, adapter, rtw_mesh_path_timer, new_mpath); -+ -+ return new_mpath; -+} -+ -+/** -+ * rtw_mesh_path_add - allocate and add a new path to the mesh path table -+ * @dst: destination address of the path (ETH_ALEN length) -+ * @sdata: local subif -+ * -+ * Returns: 0 on success -+ * -+ * State: the initial state of the new path is set to 0 -+ */ -+struct rtw_mesh_path *rtw_mesh_path_add(_adapter *adapter, -+ const u8 *dst) -+{ -+ struct rtw_mesh_table *tbl = adapter->mesh_info.mesh_paths; -+ struct rtw_mesh_path *mpath, *new_mpath; -+ int ret; -+ -+ if (!tbl) -+ return ERR_PTR(-ENOTSUPP); -+ -+ if (_rtw_memcmp(dst, adapter_mac_addr(adapter), ETH_ALEN) == _TRUE) -+ /* never add ourselves as neighbours */ -+ return ERR_PTR(-ENOTSUPP); -+ -+ if (is_multicast_mac_addr(dst)) -+ return ERR_PTR(-ENOTSUPP); -+ -+ if (ATOMIC_INC_UNLESS(&adapter->mesh_info.mpaths, RTW_MESH_MAX_MPATHS) == 0) -+ return ERR_PTR(-ENOSPC); -+ -+ new_mpath = rtw_mesh_path_new(adapter, dst); -+ if (!new_mpath) -+ return ERR_PTR(-ENOMEM); -+ -+ do { -+ ret = rtw_rhashtable_lookup_insert_fast(&tbl->rhead, -+ &new_mpath->rhash, -+ rtw_mesh_rht_params); -+ -+ if (ret == -EEXIST) -+ mpath = rtw_rhashtable_lookup_fast(&tbl->rhead, -+ dst, -+ rtw_mesh_rht_params); -+ -+ } while (unlikely(ret == -EEXIST && !mpath)); -+ -+ if (ret && ret != -EEXIST) -+ return ERR_PTR(ret); -+ -+ /* At this point either new_mpath was added, or we found a -+ * matching entry already in the table; in the latter case -+ * free the unnecessary new entry. -+ */ -+ if (ret == -EEXIST) { -+ rtw_mfree(new_mpath, sizeof(struct rtw_mesh_path)); -+ new_mpath = mpath; -+ } -+ adapter->mesh_info.mesh_paths_generation++; -+ return new_mpath; -+} -+ -+int rtw_mpp_path_add(_adapter *adapter, -+ const u8 *dst, const u8 *mpp) -+{ -+ struct rtw_mesh_table *tbl = adapter->mesh_info.mpp_paths; -+ struct rtw_mesh_path *new_mpath; -+ int ret; -+ -+ if (!tbl) -+ return -ENOTSUPP; -+ -+ if (_rtw_memcmp(dst, adapter_mac_addr(adapter), ETH_ALEN) == _TRUE) -+ /* never add ourselves as neighbours */ -+ return -ENOTSUPP; -+ -+ if (is_multicast_mac_addr(dst)) -+ return -ENOTSUPP; -+ -+ new_mpath = rtw_mesh_path_new(adapter, dst); -+ -+ if (!new_mpath) -+ return -ENOMEM; -+ -+ _rtw_memcpy(new_mpath->mpp, mpp, ETH_ALEN); -+ ret = rtw_rhashtable_lookup_insert_fast(&tbl->rhead, -+ &new_mpath->rhash, -+ rtw_mesh_rht_params); -+ -+ adapter->mesh_info.mpp_paths_generation++; -+ return ret; -+} -+ -+void dump_mpp(void *sel, _adapter *adapter) -+{ -+ struct rtw_mesh_path *mpath; -+ int idx = 0; -+ char dst[ETH_ALEN]; -+ char mpp[ETH_ALEN]; -+ -+ RTW_PRINT_SEL(sel, "%-17s %-17s\n", "dst", "mpp"); -+ -+ do { -+ rtw_rcu_read_lock(); -+ -+ mpath = rtw_mpp_path_lookup_by_idx(adapter, idx); -+ if (mpath) { -+ _rtw_memcpy(dst, mpath->dst, ETH_ALEN); -+ _rtw_memcpy(mpp, mpath->mpp, ETH_ALEN); -+ } -+ -+ rtw_rcu_read_unlock(); -+ -+ if (mpath) { -+ RTW_PRINT_SEL(sel, MAC_FMT" "MAC_FMT"\n" -+ , MAC_ARG(dst), MAC_ARG(mpp)); -+ } -+ -+ idx++; -+ } while (mpath); -+} -+ -+/** -+ * rtw_mesh_plink_broken - deactivates paths and sends perr when a link breaks -+ * -+ * @sta: broken peer link -+ * -+ * This function must be called from the rate control algorithm if enough -+ * delivery errors suggest that a peer link is no longer usable. -+ */ -+void rtw_mesh_plink_broken(struct sta_info *sta) -+{ -+ _adapter *adapter = sta->padapter; -+ struct rtw_mesh_table *tbl = adapter->mesh_info.mesh_paths; -+ static const u8 bcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ struct rtw_mesh_path *mpath; -+ rtw_rhashtable_iter iter; -+ int ret; -+ -+ if (!tbl) -+ return; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto out; -+ -+ while ((mpath = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) -+ continue; -+ if (IS_ERR(mpath)) -+ break; -+ if (rtw_rcu_access_pointer(mpath->next_hop) == sta && -+ mpath->flags & RTW_MESH_PATH_ACTIVE && -+ !(mpath->flags & RTW_MESH_PATH_FIXED)) { -+ enter_critical_bh(&mpath->state_lock); -+ mpath->flags &= ~RTW_MESH_PATH_ACTIVE; -+ ++mpath->sn; -+ exit_critical_bh(&mpath->state_lock); -+ rtw_mesh_path_error_tx(adapter, -+ adapter->mesh_cfg.element_ttl, -+ mpath->dst, mpath->sn, -+ WLAN_REASON_MESH_PATH_DEST_UNREACHABLE, bcast); -+ } -+ } -+out: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+} -+ -+static void rtw_mesh_path_free_rcu(struct rtw_mesh_table *tbl, -+ struct rtw_mesh_path *mpath) -+{ -+ _adapter *adapter = mpath->adapter; -+ -+ enter_critical_bh(&mpath->state_lock); -+ mpath->flags |= RTW_MESH_PATH_RESOLVING | RTW_MESH_PATH_DELETED; -+ rtw_mesh_gate_del(tbl, mpath); -+ exit_critical_bh(&mpath->state_lock); -+ _cancel_timer_ex(&mpath->timer); -+ ATOMIC_DEC(&adapter->mesh_info.mpaths); -+ ATOMIC_DEC(&tbl->entries); -+ _rtw_spinlock_free(&mpath->state_lock); -+ -+ rtw_mesh_path_flush_pending(mpath); -+ -+ rtw_mpath_free_rcu(mpath); -+} -+ -+static void __rtw_mesh_path_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath) -+{ -+ rtw_rhashtable_remove_fast(&tbl->rhead, &mpath->rhash, rtw_mesh_rht_params); -+ rtw_mesh_path_free_rcu(tbl, mpath); -+} -+ -+/** -+ * rtw_mesh_path_flush_by_nexthop - Deletes mesh paths if their next hop matches -+ * -+ * @sta: mesh peer to match -+ * -+ * RCU notes: this function is called when a mesh plink transitions from -+ * PLINK_ESTAB to any other state, since PLINK_ESTAB state is the only one that -+ * allows path creation. This will happen before the sta can be freed (because -+ * sta_info_destroy() calls this) so any reader in a rcu read block will be -+ * protected against the plink disappearing. -+ */ -+void rtw_mesh_path_flush_by_nexthop(struct sta_info *sta) -+{ -+ _adapter *adapter = sta->padapter; -+ struct rtw_mesh_table *tbl = adapter->mesh_info.mesh_paths; -+ struct rtw_mesh_path *mpath; -+ rtw_rhashtable_iter iter; -+ int ret; -+ -+ if (!tbl) -+ return; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto out; -+ -+ while ((mpath = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) -+ continue; -+ if (IS_ERR(mpath)) -+ break; -+ -+ if (rtw_rcu_access_pointer(mpath->next_hop) == sta) -+ __rtw_mesh_path_del(tbl, mpath); -+ } -+out: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+} -+ -+static void rtw_mpp_flush_by_proxy(_adapter *adapter, -+ const u8 *proxy) -+{ -+ struct rtw_mesh_table *tbl = adapter->mesh_info.mpp_paths; -+ struct rtw_mesh_path *mpath; -+ rtw_rhashtable_iter iter; -+ int ret; -+ -+ if (!tbl) -+ return; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto out; -+ -+ while ((mpath = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) -+ continue; -+ if (IS_ERR(mpath)) -+ break; -+ -+ if (_rtw_memcmp(mpath->mpp, proxy, ETH_ALEN) == _TRUE) -+ __rtw_mesh_path_del(tbl, mpath); -+ } -+out: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+} -+ -+static void rtw_table_flush_by_iface(struct rtw_mesh_table *tbl) -+{ -+ struct rtw_mesh_path *mpath; -+ rtw_rhashtable_iter iter; -+ int ret; -+ -+ if (!tbl) -+ return; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto out; -+ -+ while ((mpath = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) -+ continue; -+ if (IS_ERR(mpath)) -+ break; -+ __rtw_mesh_path_del(tbl, mpath); -+ } -+out: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+} -+ -+/** -+ * rtw_mesh_path_flush_by_iface - Deletes all mesh paths associated with a given iface -+ * -+ * This function deletes both mesh paths as well as mesh portal paths. -+ * -+ * @sdata: interface data to match -+ * -+ */ -+void rtw_mesh_path_flush_by_iface(_adapter *adapter) -+{ -+ rtw_table_flush_by_iface(adapter->mesh_info.mesh_paths); -+ rtw_table_flush_by_iface(adapter->mesh_info.mpp_paths); -+} -+ -+/** -+ * rtw_table_path_del - delete a path from the mesh or mpp table -+ * -+ * @tbl: mesh or mpp path table -+ * @sdata: local subif -+ * @addr: dst address (ETH_ALEN length) -+ * -+ * Returns: 0 if successful -+ */ -+static int rtw_table_path_del(struct rtw_mesh_table *tbl, -+ const u8 *addr) -+{ -+ struct rtw_mesh_path *mpath; -+ -+ if (!tbl) -+ return -ENXIO; -+ -+ rtw_rcu_read_lock(); -+ mpath = rtw_rhashtable_lookup_fast(&tbl->rhead, addr, rtw_mesh_rht_params); -+ if (!mpath) { -+ rtw_rcu_read_unlock(); -+ return -ENXIO; -+ } -+ -+ __rtw_mesh_path_del(tbl, mpath); -+ rtw_rcu_read_unlock(); -+ return 0; -+} -+ -+ -+/** -+ * rtw_mesh_path_del - delete a mesh path from the table -+ * -+ * @addr: dst address (ETH_ALEN length) -+ * @sdata: local subif -+ * -+ * Returns: 0 if successful -+ */ -+int rtw_mesh_path_del(_adapter *adapter, const u8 *addr) -+{ -+ int err; -+ -+ /* flush relevant mpp entries first */ -+ rtw_mpp_flush_by_proxy(adapter, addr); -+ -+ err = rtw_table_path_del(adapter->mesh_info.mesh_paths, addr); -+ adapter->mesh_info.mesh_paths_generation++; -+ return err; -+} -+ -+/** -+ * rtw_mesh_path_tx_pending - sends pending frames in a mesh path queue -+ * -+ * @mpath: mesh path to activate -+ * -+ * Locking: the state_lock of the mpath structure must NOT be held when calling -+ * this function. -+ */ -+void rtw_mesh_path_tx_pending(struct rtw_mesh_path *mpath) -+{ -+ if (mpath->flags & RTW_MESH_PATH_ACTIVE) { -+ struct rtw_mesh_info *minfo = &mpath->adapter->mesh_info; -+ _list q; -+ u32 q_len = 0; -+ -+ _rtw_init_listhead(&q); -+ -+ /* move to local queue */ -+ enter_critical_bh(&mpath->frame_queue.lock); -+ if (mpath->frame_queue_len) { -+ rtw_list_splice_init(&mpath->frame_queue.queue, &q); -+ q_len = mpath->frame_queue_len; -+ mpath->frame_queue_len = 0; -+ } -+ exit_critical_bh(&mpath->frame_queue.lock); -+ -+ if (q_len) { -+ /* move to mpath_tx_queue */ -+ enter_critical_bh(&minfo->mpath_tx_queue.lock); -+ rtw_list_splice_tail(&q, &minfo->mpath_tx_queue.queue); -+ minfo->mpath_tx_queue_len += q_len; -+ exit_critical_bh(&minfo->mpath_tx_queue.lock); -+ -+ /* schedule mpath_tx_tasklet */ -+ tasklet_hi_schedule(&minfo->mpath_tx_tasklet); -+ } -+ } -+} -+ -+/** -+ * rtw_mesh_path_send_to_gates - sends pending frames to all known mesh gates -+ * -+ * @mpath: mesh path whose queue will be emptied -+ * -+ * If there is only one gate, the frames are transferred from the failed mpath -+ * queue to that gate's queue. If there are more than one gates, the frames -+ * are copied from each gate to the next. After frames are copied, the -+ * mpath queues are emptied onto the transmission queue. -+ */ -+int rtw_mesh_path_send_to_gates(struct rtw_mesh_path *mpath) -+{ -+ _adapter *adapter = mpath->adapter; -+ struct rtw_mesh_table *tbl; -+ struct rtw_mesh_path *from_mpath = mpath; -+ struct rtw_mesh_path *gate; -+ bool copy = false; -+ rtw_hlist_node *node; -+ -+ tbl = adapter->mesh_info.mesh_paths; -+ if (!tbl) -+ return 0; -+ -+ rtw_rcu_read_lock(); -+ rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) { -+ if (gate->flags & RTW_MESH_PATH_ACTIVE) { -+ RTW_MPATH_DBG(FUNC_ADPT_FMT" Forwarding to %pM\n", -+ FUNC_ADPT_ARG(adapter), gate->dst); -+ rtw_mesh_path_move_to_queue(gate, from_mpath, copy); -+ from_mpath = gate; -+ copy = true; -+ } else { -+ RTW_MPATH_DBG( -+ FUNC_ADPT_FMT" Not forwarding to %pM (flags %#x)\n", -+ FUNC_ADPT_ARG(adapter), gate->dst, gate->flags); -+ } -+ } -+ -+ rtw_hlist_for_each_entry_rcu(gate, node, &tbl->known_gates, gate_list) { -+ RTW_MPATH_DBG(FUNC_ADPT_FMT" Sending to %pM\n", -+ FUNC_ADPT_ARG(adapter), gate->dst); -+ rtw_mesh_path_tx_pending(gate); -+ } -+ rtw_rcu_read_unlock(); -+ -+ return (from_mpath == mpath) ? -EHOSTUNREACH : 0; -+} -+ -+/** -+ * rtw_mesh_path_discard_frame - discard a frame whose path could not be resolved -+ * -+ * @skb: frame to discard -+ * @sdata: network subif the frame was to be sent through -+ * -+ * Locking: the function must me called within a rcu_read_lock region -+ */ -+void rtw_mesh_path_discard_frame(_adapter *adapter, -+ struct xmit_frame *xframe) -+{ -+ rtw_free_xmitframe(&adapter->xmitpriv, xframe); -+ adapter->mesh_info.mshstats.dropped_frames_no_route++; -+} -+ -+/** -+ * rtw_mesh_path_flush_pending - free the pending queue of a mesh path -+ * -+ * @mpath: mesh path whose queue has to be freed -+ * -+ * Locking: the function must me called within a rcu_read_lock region -+ */ -+void rtw_mesh_path_flush_pending(struct rtw_mesh_path *mpath) -+{ -+ struct xmit_frame *xframe; -+ _list *list, *head; -+ _list tmp; -+ -+ _rtw_init_listhead(&tmp); -+ -+ enter_critical_bh(&mpath->frame_queue.lock); -+ rtw_list_splice_init(&mpath->frame_queue.queue, &tmp); -+ mpath->frame_queue_len = 0; -+ exit_critical_bh(&mpath->frame_queue.lock); -+ -+ head = &tmp; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ xframe = LIST_CONTAINOR(list, struct xmit_frame, list); -+ list = get_next(list); -+ rtw_list_delete(&xframe->list); -+ rtw_mesh_path_discard_frame(mpath->adapter, xframe); -+ } -+} -+ -+/** -+ * rtw_mesh_path_fix_nexthop - force a specific next hop for a mesh path -+ * -+ * @mpath: the mesh path to modify -+ * @next_hop: the next hop to force -+ * -+ * Locking: this function must be called holding mpath->state_lock -+ */ -+void rtw_mesh_path_fix_nexthop(struct rtw_mesh_path *mpath, struct sta_info *next_hop) -+{ -+ enter_critical_bh(&mpath->state_lock); -+ rtw_mesh_path_assign_nexthop(mpath, next_hop); -+ mpath->sn = 0xffff; -+ mpath->metric = 0; -+ mpath->hop_count = 0; -+ mpath->exp_time = 0; -+ mpath->flags = RTW_MESH_PATH_FIXED | RTW_MESH_PATH_SN_VALID; -+ rtw_mesh_path_activate(mpath); -+ exit_critical_bh(&mpath->state_lock); -+ rtw_ewma_err_rate_init(&next_hop->metrics.err_rate); -+ /* init it at a low value - 0 start is tricky */ -+ rtw_ewma_err_rate_add(&next_hop->metrics.err_rate, 1); -+ rtw_mesh_path_tx_pending(mpath); -+} -+ -+int rtw_mesh_pathtbl_init(_adapter *adapter) -+{ -+ struct rtw_mesh_table *tbl_path, *tbl_mpp; -+ int ret; -+ -+ tbl_path = rtw_mesh_table_alloc(); -+ if (!tbl_path) -+ return -ENOMEM; -+ -+ tbl_mpp = rtw_mesh_table_alloc(); -+ if (!tbl_mpp) { -+ ret = -ENOMEM; -+ goto free_path; -+ } -+ -+ rtw_rhashtable_init(&tbl_path->rhead, &rtw_mesh_rht_params); -+ rtw_rhashtable_init(&tbl_mpp->rhead, &rtw_mesh_rht_params); -+ -+ adapter->mesh_info.mesh_paths = tbl_path; -+ adapter->mesh_info.mpp_paths = tbl_mpp; -+ -+ return 0; -+ -+free_path: -+ rtw_mesh_table_free(tbl_path); -+ return ret; -+} -+ -+static -+void rtw_mesh_path_tbl_expire(_adapter *adapter, -+ struct rtw_mesh_table *tbl) -+{ -+ struct rtw_mesh_path *mpath; -+ rtw_rhashtable_iter iter; -+ int ret; -+ -+ if (!tbl) -+ return; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto out; -+ -+ while ((mpath = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) -+ continue; -+ if (IS_ERR(mpath)) -+ break; -+ if ((!(mpath->flags & RTW_MESH_PATH_RESOLVING)) && -+ (!(mpath->flags & RTW_MESH_PATH_FIXED)) && -+ rtw_time_after(rtw_get_current_time(), mpath->exp_time + RTW_MESH_PATH_EXPIRE)) -+ __rtw_mesh_path_del(tbl, mpath); -+ -+ if (mpath->is_gate && /* need not to deal with non-gate case */ -+ rtw_time_after(rtw_get_current_time(), mpath->gate_timeout)) { -+ RTW_MPATH_DBG(FUNC_ADPT_FMT"mpath [%pM] expired systime is %lu systime is %lu\n", -+ FUNC_ADPT_ARG(adapter), mpath->dst, -+ mpath->gate_timeout, rtw_get_current_time()); -+ enter_critical_bh(&mpath->state_lock); -+ if (mpath->gate_asked) { /* asked gate before */ -+ rtw_mesh_gate_del(tbl, mpath); -+ exit_critical_bh(&mpath->state_lock); -+ } else { -+ mpath->gate_asked = true; -+ mpath->gate_timeout = rtw_get_current_time() + rtw_ms_to_systime(mpath->gate_ann_int); -+ exit_critical_bh(&mpath->state_lock); -+ rtw_mesh_queue_preq(mpath, RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_REFRESH); -+ RTW_MPATH_DBG(FUNC_ADPT_FMT"mpath [%pM] ask mesh gate existence (is_root=%d)\n", -+ FUNC_ADPT_ARG(adapter), mpath->dst, mpath->is_root); -+ } -+ } -+ } -+ -+out: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+} -+ -+void rtw_mesh_path_expire(_adapter *adapter) -+{ -+ rtw_mesh_path_tbl_expire(adapter, adapter->mesh_info.mesh_paths); -+ rtw_mesh_path_tbl_expire(adapter, adapter->mesh_info.mpp_paths); -+} -+ -+void rtw_mesh_pathtbl_unregister(_adapter *adapter) -+{ -+ if (adapter->mesh_info.mesh_paths) { -+ rtw_mesh_table_free(adapter->mesh_info.mesh_paths); -+ adapter->mesh_info.mesh_paths = NULL; -+ } -+ -+ if (adapter->mesh_info.mpp_paths) { -+ rtw_mesh_table_free(adapter->mesh_info.mpp_paths); -+ adapter->mesh_info.mpp_paths = NULL; -+ } -+} -+#endif /* CONFIG_RTW_MESH */ -+ -diff --git a/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_pathtbl.h b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_pathtbl.h -new file mode 100644 -index 000000000000..be0c40980c9e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/mesh/rtw_mesh_pathtbl.h -@@ -0,0 +1,211 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_MESH_PATHTBL_H_ -+#define __RTW_MESH_PATHTBL_H_ -+ -+#ifndef DBG_RTW_MPATH -+#define DBG_RTW_MPATH 1 -+#endif -+#if DBG_RTW_MPATH -+#define RTW_MPATH_DBG(fmt, arg...) RTW_PRINT(fmt, ##arg) -+#else -+#define RTW_MPATH_DBG(fmt, arg...) do {} while (0) -+#endif -+ -+/** -+ * enum rtw_mesh_path_flags - mesh path flags -+ * -+ * @RTW_MESH_PATH_ACTIVE: the mesh path can be used for forwarding -+ * @RTW_MESH_PATH_RESOLVING: the discovery process is running for this mesh path -+ * @RTW_MESH_PATH_SN_VALID: the mesh path contains a valid destination sequence -+ * number -+ * @RTW_MESH_PATH_FIXED: the mesh path has been manually set and should not be -+ * modified -+ * @RTW_MESH_PATH_RESOLVED: the mesh path can has been resolved -+ * @RTW_MESH_PATH_REQ_QUEUED: there is an unsent path request for this destination -+ * already queued up, waiting for the discovery process to start. -+ * @RTW_MESH_PATH_DELETED: the mesh path has been deleted and should no longer -+ * be used -+ * @RTW_MESH_PATH_ROOT_ADD_CHK: root additional check in root mode. -+ * With this flag, It will try the last used rann_snd_addr -+ * @RTW_MESH_PATH_PEER_AKA: only used toward a peer, only used in active keep -+ * alive mechanism. PREQ's da = path dst -+ * @RTW_MESH_PATH_BCAST_PREQ: for re-checking next hop resolve toward root. -+ * Use it to force path_discover sending broadcast PREQ for root. -+ * -+ * RTW_MESH_PATH_RESOLVED is used by the mesh path timer to -+ * decide when to stop or cancel the mesh path discovery. -+ */ -+enum rtw_mesh_path_flags { -+ RTW_MESH_PATH_ACTIVE = BIT(0), -+ RTW_MESH_PATH_RESOLVING = BIT(1), -+ RTW_MESH_PATH_SN_VALID = BIT(2), -+ RTW_MESH_PATH_FIXED = BIT(3), -+ RTW_MESH_PATH_RESOLVED = BIT(4), -+ RTW_MESH_PATH_REQ_QUEUED = BIT(5), -+ RTW_MESH_PATH_DELETED = BIT(6), -+ RTW_MESH_PATH_ROOT_ADD_CHK = BIT(7), -+ RTW_MESH_PATH_PEER_AKA = BIT(8), -+ RTW_MESH_PATH_BCAST_PREQ = BIT(9), -+}; -+ -+/** -+ * struct rtw_mesh_path - mesh path structure -+ * -+ * @dst: mesh path destination mac address -+ * @mpp: mesh proxy mac address -+ * @rhash: rhashtable list pointer -+ * @gate_list: list pointer for known gates list -+ * @sdata: mesh subif -+ * @next_hop: mesh neighbor to which frames for this destination will be -+ * forwarded -+ * @timer: mesh path discovery timer -+ * @frame_queue: pending queue for frames sent to this destination while the -+ * path is unresolved -+ * @rcu: rcu head for freeing mesh path -+ * @sn: target sequence number -+ * @metric: current metric to this destination -+ * @hop_count: hops to destination -+ * @exp_time: in jiffies, when the path will expire or when it expired -+ * @discovery_timeout: timeout (lapse in jiffies) used for the last discovery -+ * retry -+ * @discovery_retries: number of discovery retries -+ * @flags: mesh path flags, as specified on &enum rtw_mesh_path_flags -+ * @state_lock: mesh path state lock used to protect changes to the -+ * mpath itself. No need to take this lock when adding or removing -+ * an mpath to a hash bucket on a path table. -+ * @rann_snd_addr: the RANN sender address -+ * @rann_metric: the aggregated path metric towards the root node -+ * @last_preq_to_root: Timestamp of last PREQ sent to root -+ * @is_root: the destination station of this path is a root node -+ * @is_gate: the destination station of this path is a mesh gate -+ * -+ * -+ * The dst address is unique in the mesh path table. Since the mesh_path is -+ * protected by RCU, deleting the next_hop STA must remove / substitute the -+ * mesh_path structure and wait until that is no longer reachable before -+ * destroying the STA completely. -+ */ -+struct rtw_mesh_path { -+ u8 dst[ETH_ALEN]; -+ u8 mpp[ETH_ALEN]; /* used for MPP or MAP */ -+ rtw_rhash_head rhash; -+ rtw_hlist_node gate_list; -+ _adapter *adapter; -+ struct sta_info __rcu *next_hop; -+ _timer timer; -+ _queue frame_queue; -+ u32 frame_queue_len; -+ rtw_rcu_head rcu; -+ u32 sn; -+ u32 metric; -+ u8 hop_count; -+ systime exp_time; -+ systime discovery_timeout; -+ systime gate_timeout; -+ u32 gate_ann_int; /* gate announce interval */ -+ u8 discovery_retries; -+ enum rtw_mesh_path_flags flags; -+ _lock state_lock; -+ u8 rann_snd_addr[ETH_ALEN]; -+#ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK -+ u8 add_chk_rann_snd_addr[ETH_ALEN]; -+#endif -+ u32 rann_metric; -+ unsigned long last_preq_to_root; -+ bool is_root; -+ bool is_gate; -+ bool gate_asked; -+}; -+ -+/** -+ * struct rtw_mesh_table -+ * -+ * @known_gates: list of known mesh gates and their mpaths by the station. The -+ * gate's mpath may or may not be resolved and active. -+ * @gates_lock: protects updates to known_gates -+ * @rhead: the rhashtable containing struct mesh_paths, keyed by dest addr -+ * @entries: number of entries in the table -+ */ -+struct rtw_mesh_table { -+ rtw_hlist_head known_gates; -+ _lock gates_lock; -+ rtw_rhashtable rhead; -+ ATOMIC_T entries; -+}; -+ -+#define RTW_MESH_PATH_EXPIRE (600 * HZ) -+ -+/* Maximum number of paths per interface */ -+#define RTW_MESH_MAX_MPATHS 1024 -+ -+/* Number of frames buffered per destination for unresolved destinations */ -+#define RTW_MESH_FRAME_QUEUE_LEN 10 -+ -+int rtw_mesh_nexthop_lookup(_adapter *adapter, -+ const u8 *mda, const u8 *msa, u8 *ra); -+int rtw_mesh_nexthop_resolve(_adapter *adapter, -+ struct xmit_frame *xframe); -+ -+struct rtw_mesh_path *rtw_mesh_path_lookup(_adapter *adapter, -+ const u8 *dst); -+struct rtw_mesh_path *rtw_mpp_path_lookup(_adapter *adapter, -+ const u8 *dst); -+int rtw_mpp_path_add(_adapter *adapter, -+ const u8 *dst, const u8 *mpp); -+void dump_mpp(void *sel, _adapter *adapter); -+ -+struct rtw_mesh_path * -+rtw_mesh_path_lookup_by_idx(_adapter *adapter, int idx); -+void dump_mpath(void *sel, _adapter *adapter); -+ -+struct rtw_mesh_path * -+rtw_mpp_path_lookup_by_idx(_adapter *adapter, int idx); -+void rtw_mesh_path_fix_nexthop(struct rtw_mesh_path *mpath, struct sta_info *next_hop); -+void rtw_mesh_path_expire(_adapter *adapter); -+ -+struct rtw_mesh_path * -+rtw_mesh_path_add(_adapter *adapter, const u8 *dst); -+ -+int rtw_mesh_path_add_gate(struct rtw_mesh_path *mpath); -+void rtw_mesh_gate_del(struct rtw_mesh_table *tbl, struct rtw_mesh_path *mpath); -+bool rtw_mesh_gate_search(struct rtw_mesh_table *tbl, const u8 *addr); -+int rtw_mesh_path_send_to_gates(struct rtw_mesh_path *mpath); -+int rtw_mesh_gate_num(_adapter *adapter); -+bool rtw_mesh_is_primary_gate(_adapter *adapter); -+void dump_known_gates(void *sel, _adapter *adapter); -+ -+void rtw_mesh_plink_broken(struct sta_info *sta); -+ -+void rtw_mesh_path_assign_nexthop(struct rtw_mesh_path *mpath, struct sta_info *sta); -+void rtw_mesh_path_flush_pending(struct rtw_mesh_path *mpath); -+void rtw_mesh_path_tx_pending(struct rtw_mesh_path *mpath); -+int rtw_mesh_pathtbl_init(_adapter *adapter); -+void rtw_mesh_pathtbl_unregister(_adapter *adapter); -+int rtw_mesh_path_del(_adapter *adapter, const u8 *addr); -+ -+void rtw_mesh_path_flush_by_nexthop(struct sta_info *sta); -+void rtw_mesh_path_discard_frame(_adapter *adapter, -+ struct xmit_frame *xframe); -+ -+static inline void rtw_mesh_path_activate(struct rtw_mesh_path *mpath) -+{ -+ mpath->flags |= RTW_MESH_PATH_ACTIVE | RTW_MESH_PATH_RESOLVED; -+} -+ -+void rtw_mesh_path_flush_by_iface(_adapter *adapter); -+ -+#endif /* __RTW_MESH_PATHTBL_H_ */ -+ -diff --git a/drivers/staging/rtl8723cs/core/monitor/rtw_radiotap.c b/drivers/staging/rtl8723cs/core/monitor/rtw_radiotap.c -new file mode 100644 -index 000000000000..e9ebc7d7ace7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/monitor/rtw_radiotap.c -@@ -0,0 +1,615 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_RADIOTAP_C_ -+ -+#ifdef CONFIG_WIFI_MONITOR -+ -+#include -+#include -+ -+#define CHAN2FREQ(a) ((a < 14) ? (2407+5*a) : (5000+5*a)) -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 20, 0)) -+#define IEEE80211_RADIOTAP_ZERO_LEN_PSDU 26 -+#define IEEE80211_RADIOTAP_LSIG 27 -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 0)) -+#define IEEE80211_RADIOTAP_TIMESTAMP 22 -+/* For IEEE80211_RADIOTAP_TIMESTAMP */ -+#define IEEE80211_RADIOTAP_TIMESTAMP_UNIT_MASK 0x000F -+#define IEEE80211_RADIOTAP_TIMESTAMP_UNIT_MS 0x0000 -+#define IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US 0x0001 -+#define IEEE80211_RADIOTAP_TIMESTAMP_UNIT_NS 0x0003 -+#define IEEE80211_RADIOTAP_TIMESTAMP_SPOS_MASK 0x00F0 -+#define IEEE80211_RADIOTAP_TIMESTAMP_SPOS_BEGIN_MDPU 0x0000 -+#define IEEE80211_RADIOTAP_TIMESTAMP_SPOS_EO_MPDU 0x0010 -+#define IEEE80211_RADIOTAP_TIMESTAMP_SPOS_EO_PPDU 0x0020 -+#define IEEE80211_RADIOTAP_TIMESTAMP_SPOS_PLCP_SIG_ACQ 0x0030 -+#define IEEE80211_RADIOTAP_TIMESTAMP_SPOS_UNKNOWN 0x00F0 -+ -+#define IEEE80211_RADIOTAP_TIMESTAMP_FLAG_64BIT 0x00 -+#define IEEE80211_RADIOTAP_TIMESTAMP_FLAG_32BIT 0x01 -+#define IEEE80211_RADIOTAP_TIMESTAMP_FLAG_ACCURACY 0x02 -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 12, 0)) -+/* for IEEE80211_RADIOTAP_CHANNEL */ -+#define IEEE80211_CHAN_GSM 0x1000 /* GSM (900 MHz) */ -+#define IEEE80211_CHAN_STURBO 0x2000 /* Static Turbo */ -+#define IEEE80211_CHAN_HALF 0x4000 /* Half channel (10 MHz wide) */ -+#define IEEE80211_CHAN_QUARTER 0x8000 /* Quarter channel (5 MHz wide) */ -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) -+#define IEEE80211_RADIOTAP_VHT 21 -+/* For IEEE80211_RADIOTAP_VHT */ -+#define IEEE80211_RADIOTAP_VHT_KNOWN_STBC 0x0001 -+#define IEEE80211_RADIOTAP_VHT_KNOWN_TXOP_PS_NA 0x0002 -+#define IEEE80211_RADIOTAP_VHT_KNOWN_GI 0x0004 -+#define IEEE80211_RADIOTAP_VHT_KNOWN_SGI_NSYM_DIS 0x0008 -+#define IEEE80211_RADIOTAP_VHT_KNOWN_LDPC_EXTRA_OFDM_SYM 0x0010 -+#define IEEE80211_RADIOTAP_VHT_KNOWN_BEAMFORMED 0x0020 -+#define IEEE80211_RADIOTAP_VHT_KNOWN_BANDWIDTH 0x0040 -+#define IEEE80211_RADIOTAP_VHT_KNOWN_GROUP_ID 0x0080 -+#define IEEE80211_RADIOTAP_VHT_KNOWN_PARTIAL_AID 0x0100 -+ -+#define IEEE80211_RADIOTAP_VHT_FLAG_STBC 0x01 -+#define IEEE80211_RADIOTAP_VHT_FLAG_TXOP_PS_NA 0x02 -+#define IEEE80211_RADIOTAP_VHT_FLAG_SGI 0x04 -+#define IEEE80211_RADIOTAP_VHT_FLAG_SGI_NSYM_M10_9 0x08 -+#define IEEE80211_RADIOTAP_VHT_FLAG_LDPC_EXTRA_OFDM_SYM 0x10 -+#define IEEE80211_RADIOTAP_VHT_FLAG_BEAMFORMED 0x20 -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)) -+#define IEEE80211_RADIOTAP_CODING_LDPC_USER0 0x01 -+#define IEEE80211_RADIOTAP_CODING_LDPC_USER1 0x02 -+#define IEEE80211_RADIOTAP_CODING_LDPC_USER2 0x04 -+#define IEEE80211_RADIOTAP_CODING_LDPC_USER3 0x08 -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 7, 0)) -+#define IEEE80211_RADIOTAP_AMPDU_STATUS 20 -+/* For IEEE80211_RADIOTAP_AMPDU_STATUS */ -+#define IEEE80211_RADIOTAP_AMPDU_REPORT_ZEROLEN 0x0001 -+#define IEEE80211_RADIOTAP_AMPDU_IS_ZEROLEN 0x0002 -+#define IEEE80211_RADIOTAP_AMPDU_LAST_KNOWN 0x0004 -+#define IEEE80211_RADIOTAP_AMPDU_IS_LAST 0x0008 -+#define IEEE80211_RADIOTAP_AMPDU_DELIM_CRC_ERR 0x0010 -+#define IEEE80211_RADIOTAP_AMPDU_DELIM_CRC_KNOWN 0x0020 -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(4, 17, 0)) -+#define IEEE80211_RADIOTAP_AMPDU_EOF 0x0040 -+#define IEEE80211_RADIOTAP_AMPDU_EOF_KNOWN 0x0080 -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 39)) -+#define IEEE80211_RADIOTAP_MCS 19 -+/* For IEEE80211_RADIOTAP_MCS */ -+#define IEEE80211_RADIOTAP_MCS_HAVE_BW 0x01 -+#define IEEE80211_RADIOTAP_MCS_HAVE_MCS 0x02 -+#define IEEE80211_RADIOTAP_MCS_HAVE_GI 0x04 -+#define IEEE80211_RADIOTAP_MCS_HAVE_FMT 0x08 -+#define IEEE80211_RADIOTAP_MCS_HAVE_FEC 0x10 -+ -+#define IEEE80211_RADIOTAP_MCS_BW_MASK 0x03 -+#define IEEE80211_RADIOTAP_MCS_BW_20 0 -+#define IEEE80211_RADIOTAP_MCS_BW_40 1 -+#define IEEE80211_RADIOTAP_MCS_BW_20L 2 -+#define IEEE80211_RADIOTAP_MCS_BW_20U 3 -+#define IEEE80211_RADIOTAP_MCS_SGI 0x04 -+#define IEEE80211_RADIOTAP_MCS_FMT_GF 0x08 -+#define IEEE80211_RADIOTAP_MCS_FEC_LDPC 0x10 -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0)) -+#define IEEE80211_RADIOTAP_MCS_HAVE_STBC 0x20 -+ -+#define IEEE80211_RADIOTAP_MCS_STBC_MASK 0x60 -+#define IEEE80211_RADIOTAP_MCS_STBC_1 1 -+#define IEEE80211_RADIOTAP_MCS_STBC_2 2 -+#define IEEE80211_RADIOTAP_MCS_STBC_3 3 -+#define IEEE80211_RADIOTAP_MCS_STBC_SHIFT 5 -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 34)) -+#define IEEE80211_RADIOTAP_RADIOTAP_NAMESPACE 29 -+#define IEEE80211_RADIOTAP_VENDOR_NAMESPACE 30 -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 30)) -+#define IEEE80211_RADIOTAP_F_BADFCS 0x40 -+#endif -+ -+static inline void _rtw_radiotap_fill_flags(struct rx_pkt_attrib *a, u8 *flags) -+{ -+ struct moinfo *moif = (struct moinfo *)&a->moif; -+ -+ if (0) -+ *flags |= IEEE80211_RADIOTAP_F_CFP; -+ -+ if (0) -+ *flags |= IEEE80211_RADIOTAP_F_SHORTPRE; -+ -+ if ((a->encrypt == 1) || (a->encrypt == 5)) -+ *flags |= IEEE80211_RADIOTAP_F_WEP; -+ -+ if (a->mfrag) -+ *flags |= IEEE80211_RADIOTAP_F_FRAG; -+ -+ if (1) -+ *flags |= IEEE80211_RADIOTAP_F_FCS; -+ -+ if (0) -+ *flags |= IEEE80211_RADIOTAP_F_DATAPAD; -+ -+ if (a->crc_err) -+ *flags |= IEEE80211_RADIOTAP_F_BADFCS; -+ -+ /* Currently unspecified but used -+ for short guard interval (HT) */ -+ if (moif->u.snif_info.sgi || a->sgi) -+ *flags |= 0x80; -+ -+} -+ -+sint rtw_fill_radiotap_hdr(_adapter *padapter, struct rx_pkt_attrib *a, u8 *buf) -+{ -+#define RTAP_HDR_MAX 64 -+ -+ sint ret = _SUCCESS; -+ struct moinfo *moif = (struct moinfo *)&a->moif; -+ -+ u8 rx_cnt = 0; -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ int i = 0; -+ u8 tmp_8bit = 0; -+ u16 tmp_16bit = 0; -+ u32 tmp_32bit = 0; -+ u64 tmp_64bit = 0; -+ -+ _pkt *pskb = NULL; -+ -+ struct ieee80211_radiotap_header *rtap_hdr = NULL; -+ u8 *ptr = NULL; -+ -+ /* -+ radiotap length (include header 8) -+ 11G length: 36 (0x0040002f) -+ 11N length: -+ 11AC length: 60 (0x0070002b) -+ */ -+ u8 hdr_buf[RTAP_HDR_MAX] = { 0 }; -+ u16 rt_len = 8; -+ -+ /* create header */ -+ rtap_hdr = (struct ieee80211_radiotap_header *)&hdr_buf[0]; -+ rtap_hdr->it_version = PKTHDR_RADIOTAP_VERSION; -+ -+ /* each antenna information */ -+ rx_cnt = rf_type_to_rf_rx_cnt(pHalData->rf_type); -+#if 0 -+ if (rx_cnt > 1) { -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_RADIOTAP_NAMESPACE) | -+ BIT(IEEE80211_RADIOTAP_EXT); -+ -+ for (i = 1; i < rx_cnt; i++) { -+ tmp_32bit = (BIT(IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | -+ BIT(IEEE80211_RADIOTAP_LOCK_QUALITY) | -+ BIT(IEEE80211_RADIOTAP_ANTENNA) | -+ BIT(IEEE80211_RADIOTAP_RADIOTAP_NAMESPACE) | -+ BIT(IEEE80211_RADIOTAP_EXT)); -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_32bit, 4); -+ rt_len += 4; -+ } -+ -+ tmp_32bit = (BIT(IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | -+ BIT(IEEE80211_RADIOTAP_LOCK_QUALITY) | -+ BIT(IEEE80211_RADIOTAP_ANTENNA)); -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_32bit, 4); -+ rt_len += 4; -+ } -+#endif -+ -+ /* tsft, Required Alignment: 8 bytes */ -+ if (0) { //(a->free_cnt) { -+ /* TSFT + free_cnt */ -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_TSFT); -+ if (!IS_ALIGNED(rt_len, 8)) -+ rt_len = ((rt_len + 7) & 0xFFF8); /* Alignment */ -+ -+ tmp_64bit = cpu_to_le64(a->free_cnt); -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_64bit, 8); -+ rt_len += 8; -+ } -+ -+ /* flags */ -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_FLAGS); -+ _rtw_radiotap_fill_flags(a, &hdr_buf[rt_len]); -+ rt_len += 1; -+ -+ /* rate */ -+ if (a->data_rate <= DESC_RATE54M) { -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_RATE); -+ hdr_buf[rt_len] = hw_rate_to_m_rate(a->data_rate); -+ rt_len += 1; -+ } -+ -+ /* channel & flags, Required Alignment: 2 bytes */ -+ if (1) { -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_CHANNEL); -+ rt_len += (rt_len % 2); /* Alignment */ -+ -+ tmp_16bit = CHAN2FREQ(rtw_get_oper_ch(padapter)); -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); -+ rt_len += 2; -+ -+ /* channel flags */ -+ tmp_16bit = 0; -+ if (pHalData->current_band_type == 0) -+ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_2GHZ); -+ else -+ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_5GHZ); -+ -+ if (a->data_rate <= DESC_RATE11M) { -+ /* CCK */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_CCK); -+ } else { -+ /* OFDM */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_OFDM); -+ } -+ -+ if (rtw_get_oper_bw(padapter) == CHANNEL_WIDTH_10) { -+ /* 10Mhz Channel Width */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_HALF); -+ } -+ -+ if (rtw_get_oper_bw(padapter) == CHANNEL_WIDTH_5) { -+ /* 5Mhz Channel Width */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_QUARTER); -+ } -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); -+ rt_len += 2; -+ } -+ -+ /* dBm Antenna Signal */ -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_DBM_ANTSIGNAL); -+ hdr_buf[rt_len] = a->phy_info.recv_signal_power; -+ rt_len += 1; -+ -+#if 0 -+ /* dBm Antenna Noise */ -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_DBM_ANTNOISE); -+ hdr_buf[rt_len] = 0; -+ rt_len += 1; -+#endif -+#if 0 -+ /* Signal Quality, Required Alignment: 2 bytes */ -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_LOCK_QUALITY); -+ if (!IS_ALIGNED(rt_len, 2)) -+ rt_len++; -+ hdr_buf[rt_len] = a->phy_info.signal_quality; -+ rt_len += 2; -+ -+#endif -+ -+#if 0 -+ /* Antenna */ -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_ANTENNA); -+ hdr_buf[rt_len] = 0; /* pHalData->rf_type; */ -+ rt_len += 1; -+#endif -+#if 0 -+ /* RX flags, Required Alignment: 2 bytes */ -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_RX_FLAGS); -+ tmp_16bit = 0; -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); -+ rt_len += 2; -+#endif -+ -+ /* MCS information, Required Alignment: 1 bytes */ -+ if (a->data_rate >= DESC_RATEMCS0 && a->data_rate <= DESC_RATEMCS31) { -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_MCS); -+ /* Structure u8 known, u8 flags, u8 mcs */ -+ -+ /* known.bandwidth */ -+ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_MCS_HAVE_BW; -+ if (moif->u.snif_info.ofdm_bw) -+ hdr_buf[rt_len + 1] |= IEEE80211_RADIOTAP_MCS_BW_40; -+ if (a->bw == CHANNEL_WIDTH_40) -+ hdr_buf[rt_len + 1] |= IEEE80211_RADIOTAP_MCS_BW_40; -+ else -+ hdr_buf[rt_len + 1] |= IEEE80211_RADIOTAP_MCS_BW_20; -+ -+ -+ /* known.guard interval */ -+ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_MCS_HAVE_GI; -+ if (moif->u.snif_info.sgi) { -+ hdr_buf[rt_len + 1] |= IEEE80211_RADIOTAP_MCS_SGI; -+ } else { -+ hdr_buf[rt_len + 1] |= ((a->sgi & 0x01) << 2); -+ } -+ -+ /* FEC Type */ -+ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_MCS_HAVE_FEC; -+ if (moif->u.snif_info.ldpc) { -+ hdr_buf[rt_len + 1] |= ((moif->u.snif_info.ldpc & 0x01) << 4); -+ } else { -+ hdr_buf[rt_len + 1] |= ((a->ldpc & 0x01) << 4); -+ } -+ -+ /* STBC */ -+ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_MCS_HAVE_STBC; -+ if (moif->u.snif_info.stbc) { -+ hdr_buf[rt_len + 1] |= ((moif->u.snif_info.stbc & 0x03) << 5); -+ } else { -+ hdr_buf[rt_len + 1] |= ((a->stbc & 0x03) << 5); -+ } -+ -+ /* known.MCS index */ -+ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_MCS_HAVE_MCS; -+ -+ /* u8 mcs */ -+ hdr_buf[rt_len + 2] = a->data_rate - DESC_RATEMCS0; -+ -+ rt_len += 3; -+ } -+ -+ /* AMPDU, Required Alignment: 4 bytes */ -+ if (a->ampdu) { -+ static u32 ref_num = 0x10000000; -+ static u8 ppdu_cnt = 0; -+ -+ /* Structure u32 reference number, u16 flags, u8 delimiter CRC value, u8 reserved */ -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_AMPDU_STATUS); -+ if (!IS_ALIGNED(rt_len, 4)) -+ rt_len = ((rt_len + 3) & 0xFFFC); /* Alignment */ -+ -+ /* u32 reference number */ -+ if (a->ppdu_cnt != ppdu_cnt) { -+ ppdu_cnt = a->ppdu_cnt; -+ ref_num += 1; -+ } -+ tmp_32bit = cpu_to_le32(ref_num); -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_32bit, 4); -+ rt_len += 4; -+ -+ /* u16 flags */ -+ tmp_16bit = 0; -+ if (0) { -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_AMPDU_REPORT_ZEROLEN); -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_AMPDU_IS_ZEROLEN); -+ } -+ -+ if (0) { -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_AMPDU_IS_LAST); -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_AMPDU_LAST_KNOWN); -+ } -+ -+ if (0) { -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_AMPDU_DELIM_CRC_ERR); -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_AMPDU_DELIM_CRC_KNOWN); -+ } -+ -+ if (a->ampdu_eof) { -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_AMPDU_EOF_KNOWN); -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_AMPDU_EOF); -+ } -+ -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); -+ rt_len += 2; -+ -+ /* u8 delimiter CRC value, u8 reserved */ -+ rt_len += 2; -+ } -+ -+ /* VHT, Required Alignment: 2 bytes */ -+ if (a->data_rate >= DESC_RATEVHTSS1MCS0 && a->data_rate <= DESC_RATEVHTSS4MCS9) { -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_VHT); -+ -+ rt_len += (rt_len % 2); /* Alignment */ -+ -+ /* Structure -+ u16 known, u8 flags, u8 bandwidth, u8 mcs_nss[4], -+ u8 coding, u8 group_id, u16 partial_aid */ -+ -+ tmp_16bit = 0; -+ -+ /* STBC */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_VHT_KNOWN_STBC); -+ if (moif->u.snif_info.stbc) { -+ hdr_buf[rt_len + 2] |= IEEE80211_RADIOTAP_VHT_FLAG_STBC; -+ } else { -+ hdr_buf[rt_len + 2] |= (a->stbc & 0x01); -+ } -+ -+ /* TXOP_PS_NOT_ALLOWED */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_VHT_KNOWN_TXOP_PS_NA); -+ if (moif->u.snif_info.vht_txop_not_allow) { -+ hdr_buf[rt_len + 2] |= IEEE80211_RADIOTAP_VHT_FLAG_TXOP_PS_NA; -+ } -+ -+ -+ /* Guard interval */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_VHT_KNOWN_GI); -+ if (moif->u.snif_info.sgi) { -+ hdr_buf[rt_len + 2] |= IEEE80211_RADIOTAP_VHT_FLAG_SGI; -+ } else { -+ hdr_buf[rt_len + 2] |= ((a->sgi & 0x01) << 2); -+ } -+ -+ /* Short GI NSYM */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_VHT_KNOWN_SGI_NSYM_DIS); -+ if (moif->u.snif_info.vht_nsym_dis) { -+ hdr_buf[rt_len + 2] |= IEEE80211_RADIOTAP_VHT_FLAG_SGI_NSYM_M10_9; -+ } -+ -+ /* LDPC extra OFDM symbol */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_VHT_KNOWN_LDPC_EXTRA_OFDM_SYM); -+ if (moif->u.snif_info.vht_ldpc_extra) { -+ hdr_buf[rt_len + 2] |= IEEE80211_RADIOTAP_VHT_FLAG_LDPC_EXTRA_OFDM_SYM; -+ } else { -+ hdr_buf[rt_len + 2] |= ((a->ldpc & 0x01) << 4); -+ } -+ -+ /* Short GI NSYM */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_VHT_KNOWN_BEAMFORMED); -+ if (moif->u.snif_info.vht_beamformed) { -+ hdr_buf[rt_len + 2] |= IEEE80211_RADIOTAP_VHT_FLAG_BEAMFORMED; -+ } -+ -+ /* know.Bandwidth */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_VHT_KNOWN_BANDWIDTH); -+ -+ /* Group ID */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_VHT_KNOWN_GROUP_ID); -+ -+ /* Partial AID */ -+ tmp_16bit |= cpu_to_le16(IEEE80211_RADIOTAP_VHT_KNOWN_PARTIAL_AID); -+ -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); -+ rt_len += 3; -+ -+ /* u8 bandwidth */ -+ if (moif->u.snif_info.ofdm_bw) -+ tmp_8bit = moif->u.snif_info.ofdm_bw; -+ else -+ tmp_8bit = a->bw; -+ -+ switch (tmp_8bit) { -+ case CHANNEL_WIDTH_20: -+ hdr_buf[rt_len] |= 0; -+ break; -+ case CHANNEL_WIDTH_40: -+ hdr_buf[rt_len] |= 1; -+ break; -+ case CHANNEL_WIDTH_80: -+ hdr_buf[rt_len] |= 4; -+ break; -+ case CHANNEL_WIDTH_160: -+ hdr_buf[rt_len] |= 11; -+ break; -+ default: -+ hdr_buf[rt_len] |= 0; -+ } -+ rt_len += 1; -+ -+ /* u8 mcs_nss[4] */ -+ if ((DESC_RATEVHTSS1MCS0 <= a->data_rate) && -+ (a->data_rate <= DESC_RATEVHTSS4MCS9)) { -+ /* User 0 */ -+ /* MCS */ -+ hdr_buf[rt_len] = ((a->data_rate - DESC_RATEVHTSS1MCS0) % 10) << 4; -+ /* NSS */ -+ hdr_buf[rt_len] |= (((a->data_rate - DESC_RATEVHTSS1MCS0) / 10) + 1); -+ } -+ rt_len += 4; -+ -+ /* u8 coding, phystat? */ -+ hdr_buf[rt_len] = 0; -+ rt_len += 1; -+ -+ /* u8 group_id */ -+ hdr_buf[rt_len] = moif->u.snif_info.vht_group_id; -+ rt_len += 1; -+ -+ /* u16 partial_aid */ -+ tmp_16bit = cpu_to_le16(moif->u.snif_info.vht_nsts_aid); -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); -+ rt_len += 2; -+ } -+ -+ /* frame timestamp, Required Alignment: 8 bytes */ -+ if (0) { //(a->free_cnt) { -+ rtap_hdr->it_present |= BIT(IEEE80211_RADIOTAP_TIMESTAMP); -+ if (!IS_ALIGNED(rt_len, 8)) -+ rt_len = ((rt_len + 7) & 0xFFF8); /* Alignment */ -+ -+ /* u64 timestamp */ -+ tmp_64bit = cpu_to_le64(a->free_cnt); -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_64bit, 8); -+ rt_len += 8; -+ -+ /* u16 accuracy */ -+ tmp_16bit = cpu_to_le16(22); -+ _rtw_memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); -+ rt_len += 2; -+ -+ /* u8 unit/position */ -+ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US; -+ rt_len += 1; -+ -+ /* u8 flags */ -+ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_TIMESTAMP_FLAG_32BIT; -+ hdr_buf[rt_len] |= IEEE80211_RADIOTAP_TIMESTAMP_FLAG_ACCURACY; -+ rt_len += 1; -+ } -+ -+ /* each antenna information */ -+#if 0 -+ if (rx_cnt > 1) { -+ for (i = 0; i <= rx_cnt; i++) { -+ /* dBm Antenna Signal */ -+ hdr_buf[rt_len] = a->phy_info.rx_mimo_signal_strength[i]; -+ rt_len += 1; -+ -+ /* Signal Quality */ -+ if (!IS_ALIGNED(rt_len, 2)) -+ rt_len++; -+ hdr_buf[rt_len] = cpu_to_le16(a->phy_info.rx_mimo_signal_quality[i]); -+ rt_len += 2; -+ -+ /* Antenna */ -+ hdr_buf[rt_len] = i; /* pHalData->rf_type; */ -+ rt_len += 1; -+ } -+ } -+#endif -+ -+ /* push to skb */ -+ pskb = (_pkt *)buf; -+ if (skb_headroom(pskb) < rt_len) { -+ RTW_INFO("%s:%d %s headroom is too small.\n", __FILE__, __LINE__, __func__); -+ ret = _FAIL; -+ return ret; -+ } -+ -+ ptr = skb_push(pskb, rt_len); -+ if (ptr) { -+ rtap_hdr->it_len = cpu_to_le16(rt_len); -+ rtap_hdr->it_present = cpu_to_le32(rtap_hdr->it_present); -+ memcpy(ptr, rtap_hdr, rt_len); -+ } else -+ ret = _FAIL; -+ -+ return ret; -+ -+} -+ -+void rx_query_moinfo(struct rx_pkt_attrib *a, u8 *desc) -+{ -+ switch (a->drvinfo_sz) { -+ case 40: -+ _rtw_memcpy(a->moif, &desc[32], 8); -+ break; -+ case 48: -+ _rtw_memcpy(a->moif, &desc[32], 12); -+ break; -+ case 32: -+ /* passthrough */ -+ default: -+ break; -+ } -+} -+ -+#endif /* CONFIG_WIFI_MONITOR */ -diff --git a/drivers/staging/rtl8723cs/core/monitor/rtw_radiotap.h b/drivers/staging/rtl8723cs/core/monitor/rtw_radiotap.h -new file mode 100644 -index 000000000000..affacd1855b4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/monitor/rtw_radiotap.h -@@ -0,0 +1,63 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_RADIOTAP_H_ -+#define __RTW_RADIOTAP_H_ -+ -+struct mon_reg_backup { -+ /* flags */ -+ u8 known_rcr:1; -+ u8 known_drvinfo:1; -+ u8 known_rxfilter:1; -+ u8 known_misc0:1; -+ /* data */ -+ u8 drvinfo; -+ u16 rxfilter0; -+ u16 rxfilter1; -+ u16 rxfilter2; -+ u32 rcr; -+ u32 misc0; -+}; -+ -+struct moinfo { -+ union { -+ struct { -+ u32 sgi:1; -+ u32 ldpc:1; -+ u32 stbc:2; -+ u32 not_sounding:1; -+ u32 ofdm_bw:2; -+ u32 vht_group_id:2; -+ u32 vht_nsts_aid:12; -+ u32 vht_txop_not_allow:1; -+ u32 vht_nsym_dis:1; -+ u32 vht_ldpc_extra:1; -+ u32 vht_su_mcs:12; -+ u32 vht_beamformed:1; -+ }snif_info; -+ -+ struct { -+ u32 A; -+ u32 B; -+ u32 C; -+ }plcp_info; -+ }u; -+}; -+ -+sint rtw_fill_radiotap_hdr(_adapter *padapter, struct rx_pkt_attrib *a, u8 *buf); -+ -+void rx_query_moinfo(struct rx_pkt_attrib *a, u8 *desc); -+ -+#endif /* __RTW_RADIOTAP_H_ */ -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_ap.c b/drivers/staging/rtl8723cs/core/rtw_ap.c -new file mode 100644 -index 000000000000..bd4632e4516c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_ap.c -@@ -0,0 +1,5992 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_AP_C_ -+ -+#include -+#include -+ -+#ifdef CONFIG_AP_MODE -+ -+extern unsigned char RTW_WPA_OUI[]; -+extern unsigned char WMM_OUI[]; -+extern unsigned char WPS_OUI[]; -+extern unsigned char P2P_OUI[]; -+extern unsigned char WFD_OUI[]; -+ -+void init_mlme_ap_info(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ _rtw_spinlock_init(&pmlmepriv->bcn_update_lock); -+ /* pmlmeext->bstart_bss = _FALSE; */ -+} -+ -+void free_mlme_ap_info(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ stop_ap_mode(padapter); -+ _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); -+ -+} -+ -+/* -+* Set TIM IE -+* return length of total TIM IE -+*/ -+u8 rtw_set_tim_ie(u8 dtim_cnt, u8 dtim_period -+ , const u8 *tim_bmp, u8 tim_bmp_len, u8 *tim_ie) -+{ -+ u8 *p = tim_ie; -+ u8 i, n1, n2; -+ u8 bmp_len; -+ -+ if (rtw_bmp_not_empty(tim_bmp, tim_bmp_len)) { -+ /* find the first nonzero octet in tim_bitmap */ -+ for (i = 0; i < tim_bmp_len; i++) -+ if (tim_bmp[i]) -+ break; -+ n1 = i & 0xFE; -+ -+ /* find the last nonzero octet in tim_bitmap, except octet 0 */ -+ for (i = tim_bmp_len - 1; i > 0; i--) -+ if (tim_bmp[i]) -+ break; -+ n2 = i; -+ bmp_len = n2 - n1 + 1; -+ } else { -+ n1 = n2 = 0; -+ bmp_len = 1; -+ } -+ -+ *p++ = WLAN_EID_TIM; -+ *p++ = 2 + 1 + bmp_len; -+ *p++ = dtim_cnt; -+ *p++ = dtim_period; -+ *p++ = (rtw_bmp_is_set(tim_bmp, tim_bmp_len, 0) ? BIT0 : 0) | n1; -+ _rtw_memcpy(p, tim_bmp + n1, bmp_len); -+ -+#if 0 -+ RTW_INFO("n1:%u, n2:%u, bmp_offset:%u, bmp_len:%u\n", n1, n2, n1 / 2, bmp_len); -+ RTW_INFO_DUMP("tim_ie: ", tim_ie + 2, 2 + 1 + bmp_len); -+#endif -+ return 2 + 2 + 1 + bmp_len; -+} -+ -+static void update_BCNTIM(_adapter *padapter) -+{ -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); -+ unsigned char *pie = pnetwork_mlmeext->IEs; -+ -+#if 0 -+ -+ -+ /* update TIM IE */ -+ /* if(rtw_tim_map_anyone_be_set(padapter, pstapriv->tim_bitmap)) */ -+#endif -+ if (_TRUE) { -+ u8 *p, *dst_ie, *premainder_ie = NULL, *pbackup_remainder_ie = NULL; -+ uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen; -+ -+ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_); -+ if (p != NULL && tim_ielen > 0) { -+ tim_ielen += 2; -+ -+ premainder_ie = p + tim_ielen; -+ -+ tim_ie_offset = (sint)(p - pie); -+ -+ remainder_ielen = pnetwork_mlmeext->IELength - tim_ie_offset - tim_ielen; -+ -+ /*append TIM IE from dst_ie offset*/ -+ dst_ie = p; -+ } else { -+ tim_ielen = 0; -+ -+ /*calculate head_len*/ -+ offset = _FIXED_IE_LENGTH_; -+ -+ /* get ssid_ie len */ -+ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SSID_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); -+ if (p != NULL) -+ offset += tmp_len + 2; -+ -+ /*get supported rates len*/ -+ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); -+ if (p != NULL) -+ offset += tmp_len + 2; -+ -+ /*DS Parameter Set IE, len=3*/ -+ offset += 3; -+ -+ premainder_ie = pie + offset; -+ -+ remainder_ielen = pnetwork_mlmeext->IELength - offset - tim_ielen; -+ -+ /*append TIM IE from offset*/ -+ dst_ie = pie + offset; -+ -+ } -+ -+ if (remainder_ielen > 0) { -+ pbackup_remainder_ie = rtw_malloc(remainder_ielen); -+ if (pbackup_remainder_ie && premainder_ie) -+ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); -+ } -+ -+ /* append TIM IE */ -+ dst_ie += rtw_set_tim_ie(0, 1, pstapriv->tim_bitmap, pstapriv->aid_bmp_len, dst_ie); -+ -+ /*copy remainder IE*/ -+ if (pbackup_remainder_ie) { -+ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); -+ -+ rtw_mfree(pbackup_remainder_ie, remainder_ielen); -+ } -+ -+ offset = (uint)(dst_ie - pie); -+ pnetwork_mlmeext->IELength = offset + remainder_ielen; -+ -+ } -+} -+ -+void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len) -+{ -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 bmatch = _FALSE; -+ u8 *pie = pnetwork->IEs; -+ u8 *p = NULL, *dst_ie = NULL, *premainder_ie = NULL, *pbackup_remainder_ie = NULL; -+ u32 i, offset, ielen = 0, ie_offset, remainder_ielen = 0; -+ -+ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); -+ -+ if (pIE->ElementID > index) -+ break; -+ else if (pIE->ElementID == index) { /* already exist the same IE */ -+ p = (u8 *)pIE; -+ ielen = pIE->Length; -+ bmatch = _TRUE; -+ break; -+ } -+ -+ p = (u8 *)pIE; -+ ielen = pIE->Length; -+ i += (pIE->Length + 2); -+ } -+ -+ if (p != NULL && ielen > 0) { -+ ielen += 2; -+ -+ premainder_ie = p + ielen; -+ -+ ie_offset = (sint)(p - pie); -+ -+ remainder_ielen = pnetwork->IELength - ie_offset - ielen; -+ -+ if (bmatch) -+ dst_ie = p; -+ else -+ dst_ie = (p + ielen); -+ } -+ -+ if (dst_ie == NULL) -+ return; -+ -+ if (remainder_ielen > 0) { -+ pbackup_remainder_ie = rtw_malloc(remainder_ielen); -+ if (pbackup_remainder_ie && premainder_ie) -+ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); -+ } -+ -+ *dst_ie++ = index; -+ *dst_ie++ = len; -+ -+ _rtw_memcpy(dst_ie, data, len); -+ dst_ie += len; -+ -+ /* copy remainder IE */ -+ if (pbackup_remainder_ie) { -+ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); -+ -+ rtw_mfree(pbackup_remainder_ie, remainder_ielen); -+ } -+ -+ offset = (uint)(dst_ie - pie); -+ pnetwork->IELength = offset + remainder_ielen; -+} -+ -+void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index) -+{ -+ u8 *p, *dst_ie = NULL, *premainder_ie = NULL, *pbackup_remainder_ie = NULL; -+ uint offset, ielen, ie_offset, remainder_ielen = 0; -+ u8 *pie = pnetwork->IEs; -+ -+ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, index, &ielen, pnetwork->IELength - _FIXED_IE_LENGTH_); -+ if (p != NULL && ielen > 0) { -+ ielen += 2; -+ -+ premainder_ie = p + ielen; -+ -+ ie_offset = (sint)(p - pie); -+ -+ remainder_ielen = pnetwork->IELength - ie_offset - ielen; -+ -+ dst_ie = p; -+ } else -+ return; -+ -+ if (remainder_ielen > 0) { -+ pbackup_remainder_ie = rtw_malloc(remainder_ielen); -+ if (pbackup_remainder_ie && premainder_ie) -+ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); -+ } -+ -+ /* copy remainder IE */ -+ if (pbackup_remainder_ie) { -+ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); -+ -+ rtw_mfree(pbackup_remainder_ie, remainder_ielen); -+ } -+ -+ offset = (uint)(dst_ie - pie); -+ pnetwork->IELength = offset + remainder_ielen; -+} -+ -+ -+u8 chk_sta_is_alive(struct sta_info *psta); -+u8 chk_sta_is_alive(struct sta_info *psta) -+{ -+ u8 ret = _FALSE; -+#ifdef DBG_EXPIRATION_CHK -+ RTW_INFO("sta:"MAC_FMT", rssi:%d, rx:"STA_PKTS_FMT", expire_to:%u, %s%ssq_len:%u\n" -+ , MAC_ARG(psta->cmn.mac_addr) -+ , psta->cmn.rssi_stat.rssi -+ /* , STA_RX_PKTS_ARG(psta) */ -+ , STA_RX_PKTS_DIFF_ARG(psta) -+ , psta->expire_to -+ , psta->state & WIFI_SLEEP_STATE ? "PS, " : "" -+ , psta->state & WIFI_STA_ALIVE_CHK_STATE ? "SAC, " : "" -+ , psta->sleepq_len -+ ); -+#endif -+ -+ /* if(sta_last_rx_pkts(psta) == sta_rx_pkts(psta)) */ -+ if ((psta->sta_stats.last_rx_data_pkts + psta->sta_stats.last_rx_ctrl_pkts) == (psta->sta_stats.rx_data_pkts + psta->sta_stats.rx_ctrl_pkts)) { -+#if 0 -+ if (psta->state & WIFI_SLEEP_STATE) -+ ret = _TRUE; -+#endif -+ } else -+ ret = _TRUE; -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(psta->padapter)) { -+ u8 bcn_alive, hwmp_alive; -+ -+ hwmp_alive = (psta->sta_stats.rx_hwmp_pkts != -+ psta->sta_stats.last_rx_hwmp_pkts); -+ bcn_alive = (psta->sta_stats.rx_beacon_pkts != -+ psta->sta_stats.last_rx_beacon_pkts); -+ /* The reference for nexthop_lookup */ -+ psta->alive = ret || hwmp_alive || bcn_alive; -+ /* The reference for expire_timeout_chk */ -+ /* Exclude bcn_alive to avoid a misjudge condition -+ that a peer unexpectedly leave and restart quickly*/ -+ ret = ret || hwmp_alive; -+ } -+#endif -+ -+ sta_update_last_rx_pkts(psta); -+ -+ return ret; -+} -+ -+/** -+ * issue_aka_chk_frame - issue active keep alive check frame -+ * aka = active keep alive -+ */ -+#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+static int issue_aka_chk_frame(_adapter *adapter, struct sta_info *psta) -+{ -+ int ret = _FAIL; -+ u8 *target_addr = psta->cmn.mac_addr; -+ -+ if (MLME_IS_AP(adapter)) { -+ /* issue null data to check sta alive */ -+ if (psta->state & WIFI_SLEEP_STATE) -+ ret = issue_nulldata(adapter, target_addr, 0, 1, 50); -+ else -+ ret = issue_nulldata(adapter, target_addr, 0, 3, 50); -+ } -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(adapter)) { -+ struct rtw_mesh_path *mpath; -+ -+ rtw_rcu_read_lock(); -+ mpath = rtw_mesh_path_lookup(adapter, target_addr); -+ if (!mpath) { -+ mpath = rtw_mesh_path_add(adapter, target_addr); -+ if (IS_ERR(mpath)) { -+ rtw_rcu_read_unlock(); -+ RTW_ERR(FUNC_ADPT_FMT" rtw_mesh_path_add for "MAC_FMT" fail.\n", -+ FUNC_ADPT_ARG(adapter), MAC_ARG(target_addr)); -+ return _FAIL; -+ } -+ } -+ if (mpath->flags & RTW_MESH_PATH_ACTIVE) -+ ret = _SUCCESS; -+ else { -+ u8 flags = RTW_PREQ_Q_F_START | RTW_PREQ_Q_F_PEER_AKA; -+ /* issue PREQ to check peer alive */ -+ rtw_mesh_queue_preq(mpath, flags); -+ ret = _FALSE; -+ } -+ rtw_rcu_read_unlock(); -+ } -+#endif -+ return ret; -+} -+#endif -+ -+#ifdef RTW_CONFIG_RFREG18_WA -+static void rtw_check_restore_rf18(_adapter *padapter) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ u32 reg; -+ u8 union_ch = 0, union_bw = 0, union_offset = 0, setchbw = _FALSE; -+ -+ reg = rtw_hal_read_rfreg(padapter, 0, 0x18, 0x3FF); -+ if ((reg & 0xFF) == 0) -+ setchbw = _TRUE; -+ reg = rtw_hal_read_rfreg(padapter, 1, 0x18, 0x3FF); -+ if ((reg & 0xFF) == 0) -+ setchbw = _TRUE; -+ -+ if (setchbw) { -+ if (!rtw_mi_get_ch_setting_union(padapter, &union_ch, &union_bw, &union_offset)) { -+ RTW_INFO("Hit RF(0x18)=0!! restore original channel setting.\n"); -+ union_ch = pmlmeext->cur_channel; -+ union_offset = pmlmeext->cur_ch_offset ; -+ union_bw = pmlmeext->cur_bwmode; -+ } else { -+ RTW_INFO("Hit RF(0x18)=0!! set ch(%x) offset(%x) bwmode(%x)\n", union_ch, union_offset, union_bw); -+ } -+ /* Initial the channel_bw setting procedure. */ -+ pHalData->current_channel = 0; -+ set_channel_bwmode(padapter, union_ch, union_offset, union_bw); -+ } -+} -+#endif -+ -+void expire_timeout_chk(_adapter *padapter) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ u8 updated = _FALSE; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 chk_alive_num = 0; -+ char chk_alive_list[NUM_STA]; -+ int i; -+ int stainfo_offset; -+ u8 flush_num = 0; -+ char flush_list[NUM_STA]={0}; -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter) -+ && check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) -+ ) { -+ struct rtw_mesh_cfg *mcfg = &padapter->mesh_cfg; -+ -+ rtw_mesh_path_expire(padapter); -+ -+ /* TBD: up layer timeout mechanism */ -+ /* if (!mcfg->plink_timeout) -+ return; */ -+#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ return; -+#endif -+ } -+#endif -+ -+#ifdef CONFIG_RTW_WDS -+ rtw_wds_path_expire(padapter); -+#endif -+ -+#ifdef CONFIG_MCC_MODE -+ /* then driver may check fail due to not recv client's frame under sitesurvey, -+ * don't expire timeout chk under MCC under sitesurvey */ -+ -+ if (rtw_hal_mcc_link_status_chk(padapter, __func__) == _FALSE) -+ return; -+#endif -+ -+ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); -+ -+ phead = &pstapriv->auth_list; -+ plist = get_next(phead); -+ -+ /* check auth_queue */ -+#ifdef DBG_EXPIRATION_CHK -+ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ RTW_INFO(FUNC_ADPT_FMT" auth_list, cnt:%u\n" -+ , FUNC_ADPT_ARG(padapter), pstapriv->auth_list_cnt); -+ } -+#endif -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, auth_list); -+ -+ plist = get_next(plist); -+ -+ -+#ifdef CONFIG_ATMEL_RC_PATCH -+ if (_rtw_memcmp((void *)(pstapriv->atmel_rc_pattern), (void *)(psta->cmn.mac_addr), ETH_ALEN) == _TRUE) -+ continue; -+ if (psta->flag_atmel_rc) -+ continue; -+#endif -+ if (psta->expire_to > 0) { -+ psta->expire_to--; -+ if (psta->expire_to == 0) { -+ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ flush_list[flush_num++] = stainfo_offset; -+ else -+ rtw_warn_on(1); -+ } -+ } -+ -+ } -+ -+ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); -+ for (i = 0; i < flush_num; i++) { -+ psta = rtw_get_stainfo_by_offset(pstapriv, flush_list[i]); -+ RTW_INFO(FUNC_ADPT_FMT" auth expire "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)); -+ rtw_free_stainfo(padapter, psta); -+ psta = NULL; -+ } -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ /* check asoc_queue */ -+#ifdef DBG_EXPIRATION_CHK -+ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ RTW_INFO(FUNC_ADPT_FMT" asoc_list, cnt:%u\n" -+ , FUNC_ADPT_ARG(padapter), pstapriv->asoc_list_cnt); -+ } -+#endif -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+#ifdef CONFIG_ATMEL_RC_PATCH -+ RTW_INFO("%s:%d psta=%p, %02x,%02x||%02x,%02x \n\n", __func__, __LINE__, -+ psta, pstapriv->atmel_rc_pattern[0], pstapriv->atmel_rc_pattern[5], psta->cmn.mac_addr[0], psta->cmn.mac_addr[5]); -+ if (_rtw_memcmp((void *)pstapriv->atmel_rc_pattern, (void *)(psta->cmn.mac_addr), ETH_ALEN) == _TRUE) -+ continue; -+ if (psta->flag_atmel_rc) -+ continue; -+ RTW_INFO("%s: debug line:%d\n", __func__, __LINE__); -+#endif -+#ifdef CONFIG_AUTO_AP_MODE -+ if (psta->isrc) -+ continue; -+#endif -+ if (chk_sta_is_alive(psta) || !psta->expire_to) { -+ psta->expire_to = pstapriv->expire_to; -+ psta->keep_alive_trycnt = 0; -+ #if !defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && defined(CONFIG_80211N_HT) -+ psta->under_exist_checking = 0; -+ #endif -+ } else -+ psta->expire_to--; -+ -+#if !defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && defined(CONFIG_80211N_HT) -+ if ((psta->flags & WLAN_STA_HT) && (psta->htpriv.agg_enable_bitmap || psta->under_exist_checking)) { -+ /* check sta by delba(addba) for 11n STA */ -+ /* ToDo: use CCX report to check for all STAs */ -+ /* RTW_INFO("asoc check by DELBA/ADDBA! (pstapriv->expire_to=%d s)(psta->expire_to=%d s), [%02x, %d]\n", pstapriv->expire_to*2, psta->expire_to*2, psta->htpriv.agg_enable_bitmap, psta->under_exist_checking); */ -+ if (psta->expire_to <= (pstapriv->expire_to - 50)) { -+ RTW_INFO("asoc expire by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to - psta->expire_to) * 2); -+ psta->under_exist_checking = 0; -+ psta->expire_to = 0; -+ } else if (psta->expire_to <= (pstapriv->expire_to - 3) && (psta->under_exist_checking == 0)) { -+ RTW_INFO("asoc check by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to - psta->expire_to) * 2); -+ psta->under_exist_checking = 1; -+ /* tear down TX AMPDU */ -+ send_delba(padapter, 1, psta->cmn.mac_addr);/* */ /* originator */ -+ psta->htpriv.agg_enable_bitmap = 0x0;/* reset */ -+ psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */ -+ } -+ } -+#endif /* !defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && defined(CONFIG_80211N_HT) */ -+ -+ if (psta->expire_to <= 0) { -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ if (padapter->registrypriv.wifi_spec == 1) { -+ psta->expire_to = pstapriv->expire_to; -+ continue; -+ } -+ -+#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+#ifdef CONFIG_80211N_HT -+ -+#define KEEP_ALIVE_TRYCNT (3) -+ -+ if (psta->keep_alive_trycnt > 0 && psta->keep_alive_trycnt <= KEEP_ALIVE_TRYCNT) { -+ if (psta->state & WIFI_STA_ALIVE_CHK_STATE) -+ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; -+ else -+ psta->keep_alive_trycnt = 0; -+ -+ } else if ((psta->keep_alive_trycnt > KEEP_ALIVE_TRYCNT) && !(psta->state & WIFI_STA_ALIVE_CHK_STATE)) -+ psta->keep_alive_trycnt = 0; -+ if ((psta->htpriv.ht_option == _TRUE) && (psta->htpriv.ampdu_enable == _TRUE)) { -+ uint priority = 1; /* test using BK */ -+ u8 issued = 0; -+ -+ /* issued = (psta->htpriv.agg_enable_bitmap>>priority)&0x1; */ -+ issued |= (psta->htpriv.candidate_tid_bitmap >> priority) & 0x1; -+ -+ if (0 == issued) { -+ if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { -+ psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); -+ -+ if (psta->state & WIFI_SLEEP_STATE) -+ psta->expire_to = 2; /* 2x2=4 sec */ -+ else -+ psta->expire_to = 1; /* 2 sec */ -+ -+ psta->state |= WIFI_STA_ALIVE_CHK_STATE; -+ -+ /* add_ba_hdl(padapter, (u8*)paddbareq_parm); */ -+ -+ RTW_INFO("issue addba_req to check if sta alive, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); -+ -+ issue_addba_req(padapter, psta->cmn.mac_addr, (u8)priority); -+ -+ _set_timer(&psta->addba_retry_timer, ADDBA_TO); -+ -+ psta->keep_alive_trycnt++; -+ -+ continue; -+ } -+ } -+ } -+ if (psta->keep_alive_trycnt > 0 && psta->state & WIFI_STA_ALIVE_CHK_STATE) { -+ psta->keep_alive_trycnt = 0; -+ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; -+ RTW_INFO("change to another methods to check alive if staion is at ps mode\n"); -+ } -+ -+#endif /* CONFIG_80211N_HT */ -+#endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ -+ if (psta->state & WIFI_SLEEP_STATE) { -+ if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { -+ /* to check if alive by another methods if staion is at ps mode. */ -+ psta->expire_to = pstapriv->expire_to; -+ psta->state |= WIFI_STA_ALIVE_CHK_STATE; -+ -+ /* RTW_INFO("alive chk, sta:" MAC_FMT " is at ps mode!\n", MAC_ARG(psta->cmn.mac_addr)); */ -+ -+ /* to update bcn with tim_bitmap for this station */ -+ rtw_tim_map_set(padapter, pstapriv->tim_bitmap, psta->cmn.aid); -+ update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0); -+ -+ if (!pmlmeext->active_keep_alive_check) -+ continue; -+ } -+ } -+ -+ { -+ int stainfo_offset; -+ -+ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ chk_alive_list[chk_alive_num++] = stainfo_offset; -+ continue; -+ } -+ } else { -+ /* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */ -+ if (psta->sleepq_len > (NR_XMITFRAME / pstapriv->asoc_list_cnt) -+ && padapter->xmitpriv.free_xmitframe_cnt < ((NR_XMITFRAME / pstapriv->asoc_list_cnt) / 2) -+ ) { -+ RTW_INFO(FUNC_ADPT_FMT" sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , psta->sleepq_len, padapter->xmitpriv.free_xmitframe_cnt, pstapriv->asoc_list_cnt); -+ wakeup_sta_to_xmit(padapter, psta); -+ } -+ } -+ } -+ -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ if (chk_alive_num) { -+#if defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) -+ u8 backup_ch = 0, backup_bw = 0, backup_offset = 0; -+ u8 union_ch = 0, union_bw = 0, union_offset = 0; -+ u8 switch_channel_by_drv = _TRUE; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+#endif -+ char del_asoc_list[NUM_STA]; -+ -+ _rtw_memset(del_asoc_list, NUM_STA, NUM_STA); -+ -+ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ if (pmlmeext->active_keep_alive_check) { -+ #ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) { -+ /* driver doesn't switch channel under MCC */ -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) -+ switch_channel_by_drv = _FALSE; -+ } -+ #endif -+ -+ if (!rtw_mi_get_ch_setting_union(padapter, &union_ch, &union_bw, &union_offset) -+ || pmlmeext->cur_channel != union_ch) -+ switch_channel_by_drv = _FALSE; -+ -+ /* switch to correct channel of current network before issue keep-alive frames */ -+ if (switch_channel_by_drv == _TRUE && rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { -+ backup_ch = rtw_get_oper_ch(padapter); -+ backup_bw = rtw_get_oper_bw(padapter); -+ backup_offset = rtw_get_oper_choffset(padapter); -+ set_channel_bwmode(padapter, union_ch, union_offset, union_bw); -+ } -+ } -+ #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ -+ -+ /* check loop */ -+ for (i = 0; i < chk_alive_num; i++) { -+ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ int ret = _FAIL; -+ #endif -+ -+ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); -+ -+ #ifdef CONFIG_ATMEL_RC_PATCH -+ if (_rtw_memcmp(pstapriv->atmel_rc_pattern, psta->cmn.mac_addr, ETH_ALEN) == _TRUE) -+ continue; -+ if (psta->flag_atmel_rc) -+ continue; -+ #endif -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) -+ continue; -+ -+ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ if (pmlmeext->active_keep_alive_check) { -+ /* issue active keep alive frame to check */ -+ ret = issue_aka_chk_frame(padapter, psta); -+ -+ psta->keep_alive_trycnt++; -+ if (ret == _SUCCESS) { -+ RTW_INFO(FUNC_ADPT_FMT" asoc check, "MAC_FMT" is alive\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)); -+ psta->expire_to = pstapriv->expire_to; -+ psta->keep_alive_trycnt = 0; -+ continue; -+ } else if (psta->keep_alive_trycnt <= 3) { -+ RTW_INFO(FUNC_ADPT_FMT" asoc check, "MAC_FMT" keep_alive_trycnt=%d\n" -+ , FUNC_ADPT_ARG(padapter) , MAC_ARG(psta->cmn.mac_addr), psta->keep_alive_trycnt); -+ psta->expire_to = 1; -+ continue; -+ } -+ } -+ #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ -+ -+ psta->keep_alive_trycnt = 0; -+ del_asoc_list[i] = chk_alive_list[i]; -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) { -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (psta->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt--; -+ #endif -+ STA_SET_MESH_PLINK(psta, NULL); -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ } -+ -+ /* delete loop */ -+ for (i = 0; i < chk_alive_num; i++) { -+ u8 sta_addr[ETH_ALEN]; -+ -+ if (del_asoc_list[i] >= NUM_STA) -+ continue; -+ -+ psta = rtw_get_stainfo_by_offset(pstapriv, del_asoc_list[i]); -+ _rtw_memcpy(sta_addr, psta->cmn.mac_addr, ETH_ALEN); -+ -+ RTW_INFO(FUNC_ADPT_FMT" asoc expire "MAC_FMT", state=0x%x\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr), psta->state); -+ updated |= ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _FALSE); -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) -+ rtw_mesh_expire_peer(padapter, sta_addr); -+ #endif -+ } -+ -+ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ if (pmlmeext->active_keep_alive_check) { -+ /* back to the original operation channel */ -+ if (switch_channel_by_drv == _TRUE && backup_ch > 0) -+ set_channel_bwmode(padapter, backup_ch, backup_offset, backup_bw); -+ } -+ #endif -+ } -+ -+#ifdef RTW_CONFIG_RFREG18_WA -+ rtw_check_restore_rf18(padapter); -+#endif -+ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); -+} -+ -+void rtw_ap_update_sta_ra_info(_adapter *padapter, struct sta_info *psta) -+{ -+ unsigned char sta_band = 0; -+ u64 tx_ra_bitmap = 0; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; -+ -+ if (!psta) -+ return; -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) -+ return; -+ -+ rtw_hal_update_sta_ra_info(padapter, psta); -+ tx_ra_bitmap = psta->cmn.ra_info.ramask; -+ -+ if (pcur_network->Configuration.DSConfig > 14) { -+ -+ if (tx_ra_bitmap & 0xffff000) -+ sta_band |= WIRELESS_11_5N; -+ -+ if (tx_ra_bitmap & 0xff0) -+ sta_band |= WIRELESS_11A; -+ -+ /* 5G band */ -+#ifdef CONFIG_80211AC_VHT -+ if (psta->vhtpriv.vht_option) -+ sta_band = WIRELESS_11_5AC; -+#endif -+ } else { -+ if (tx_ra_bitmap & 0xffff000) -+ sta_band |= WIRELESS_11_24N; -+ -+ if (tx_ra_bitmap & 0xff0) -+ sta_band |= WIRELESS_11G; -+ -+ if (tx_ra_bitmap & 0x0f) -+ sta_band |= WIRELESS_11B; -+ } -+ -+ psta->wireless_mode = sta_band; -+ rtw_hal_update_sta_wset(padapter, psta); -+ RTW_INFO("%s=> mac_id:%d , tx_ra_bitmap:0x%016llx, networkType:0x%02x\n", -+ __FUNCTION__, psta->cmn.mac_id, tx_ra_bitmap, psta->wireless_mode); -+} -+ -+#ifdef CONFIG_BMC_TX_RATE_SELECT -+u8 rtw_ap_find_mini_tx_rate(_adapter *adapter) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ u8 miini_tx_rate = ODM_RATEVHTSS4MCS9, sta_tx_rate; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ -+ sta_tx_rate = psta->cmn.ra_info.curr_tx_rate & 0x7F; -+ if (sta_tx_rate < miini_tx_rate) -+ miini_tx_rate = sta_tx_rate; -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ return miini_tx_rate; -+} -+ -+u8 rtw_ap_find_bmc_rate(_adapter *adapter, u8 tx_rate) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ u8 tx_ini_rate = ODM_RATE6M; -+ -+ switch (tx_rate) { -+ case ODM_RATEVHTSS3MCS9: -+ case ODM_RATEVHTSS3MCS8: -+ case ODM_RATEVHTSS3MCS7: -+ case ODM_RATEVHTSS3MCS6: -+ case ODM_RATEVHTSS3MCS5: -+ case ODM_RATEVHTSS3MCS4: -+ case ODM_RATEVHTSS3MCS3: -+ case ODM_RATEVHTSS2MCS9: -+ case ODM_RATEVHTSS2MCS8: -+ case ODM_RATEVHTSS2MCS7: -+ case ODM_RATEVHTSS2MCS6: -+ case ODM_RATEVHTSS2MCS5: -+ case ODM_RATEVHTSS2MCS4: -+ case ODM_RATEVHTSS2MCS3: -+ case ODM_RATEVHTSS1MCS9: -+ case ODM_RATEVHTSS1MCS8: -+ case ODM_RATEVHTSS1MCS7: -+ case ODM_RATEVHTSS1MCS6: -+ case ODM_RATEVHTSS1MCS5: -+ case ODM_RATEVHTSS1MCS4: -+ case ODM_RATEVHTSS1MCS3: -+ case ODM_RATEMCS15: -+ case ODM_RATEMCS14: -+ case ODM_RATEMCS13: -+ case ODM_RATEMCS12: -+ case ODM_RATEMCS11: -+ case ODM_RATEMCS7: -+ case ODM_RATEMCS6: -+ case ODM_RATEMCS5: -+ case ODM_RATEMCS4: -+ case ODM_RATEMCS3: -+ case ODM_RATE54M: -+ case ODM_RATE48M: -+ case ODM_RATE36M: -+ case ODM_RATE24M: -+ tx_ini_rate = ODM_RATE24M; -+ break; -+ case ODM_RATEVHTSS3MCS2: -+ case ODM_RATEVHTSS3MCS1: -+ case ODM_RATEVHTSS2MCS2: -+ case ODM_RATEVHTSS2MCS1: -+ case ODM_RATEVHTSS1MCS2: -+ case ODM_RATEVHTSS1MCS1: -+ case ODM_RATEMCS10: -+ case ODM_RATEMCS9: -+ case ODM_RATEMCS2: -+ case ODM_RATEMCS1: -+ case ODM_RATE18M: -+ case ODM_RATE12M: -+ tx_ini_rate = ODM_RATE12M; -+ break; -+ case ODM_RATEVHTSS3MCS0: -+ case ODM_RATEVHTSS2MCS0: -+ case ODM_RATEVHTSS1MCS0: -+ case ODM_RATEMCS8: -+ case ODM_RATEMCS0: -+ case ODM_RATE9M: -+ case ODM_RATE6M: -+ tx_ini_rate = ODM_RATE6M; -+ break; -+ case ODM_RATE11M: -+ case ODM_RATE5_5M: -+ case ODM_RATE2M: -+ case ODM_RATE1M: -+ tx_ini_rate = ODM_RATE1M; -+ break; -+ default: -+ tx_ini_rate = ODM_RATE6M; -+ break; -+ } -+ -+ if (hal_data->current_band_type == BAND_ON_5G) -+ if (tx_ini_rate < ODM_RATE6M) -+ tx_ini_rate = ODM_RATE6M; -+ -+ return tx_ini_rate; -+} -+ -+void rtw_update_bmc_sta_tx_rate(_adapter *adapter) -+{ -+ struct sta_info *psta = NULL; -+ u8 tx_rate; -+ -+ psta = rtw_get_bcmc_stainfo(adapter); -+ if (psta == NULL) { -+ RTW_ERR(ADPT_FMT "could not get bmc_sta !!\n", ADPT_ARG(adapter)); -+ return; -+ } -+ -+ if (adapter->bmc_tx_rate != MGN_UNKNOWN) { -+ psta->init_rate = adapter->bmc_tx_rate; -+ goto _exit; -+ } -+ -+ if (adapter->stapriv.asoc_sta_count <= 2) -+ goto _exit; -+ -+ tx_rate = rtw_ap_find_mini_tx_rate(adapter); -+ #ifdef CONFIG_BMC_TX_LOW_RATE -+ tx_rate = rtw_ap_find_bmc_rate(adapter, tx_rate); -+ #endif -+ -+ psta->init_rate = hw_rate_to_m_rate(tx_rate); -+ -+_exit: -+ RTW_INFO(ADPT_FMT" BMC Tx rate - %s\n", ADPT_ARG(adapter), MGN_RATE_STR(psta->init_rate)); -+} -+#endif -+ -+void rtw_init_bmc_sta_tx_rate(_adapter *padapter, struct sta_info *psta) -+{ -+#ifdef CONFIG_BMC_TX_LOW_RATE -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+#endif -+ u8 rate_idx = 0; -+ u8 brate_table[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, -+ MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M}; -+ -+ if (!MLME_IS_AP(padapter) && !MLME_IS_MESH(padapter)) -+ return; -+ -+ if (padapter->bmc_tx_rate != MGN_UNKNOWN) -+ psta->init_rate = padapter->bmc_tx_rate; -+ else { -+ #ifdef CONFIG_BMC_TX_LOW_RATE -+ if (IsEnableHWOFDM(pmlmeext->cur_wireless_mode) && (psta->cmn.ra_info.ramask && 0xFF0)) -+ rate_idx = get_lowest_rate_idx_ex(psta->cmn.ra_info.ramask, 4); /*from basic rate*/ -+ else -+ rate_idx = get_lowest_rate_idx(psta->cmn.ra_info.ramask); /*from basic rate*/ -+ #else -+ rate_idx = get_highest_rate_idx(psta->cmn.ra_info.ramask); /*from basic rate*/ -+ #endif -+ if (rate_idx < 12) -+ psta->init_rate = brate_table[rate_idx]; -+ else -+ psta->init_rate = MGN_1M; -+ } -+ -+ RTW_INFO(ADPT_FMT" BMC Init Tx rate - %s\n", ADPT_ARG(padapter), MGN_RATE_STR(psta->init_rate)); -+} -+ -+void update_bmc_sta(_adapter *padapter) -+{ -+ _irqL irqL; -+ unsigned char network_type; -+ int supportRateNum = 0; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; -+ struct sta_info *psta = rtw_get_bcmc_stainfo(padapter); -+ -+ if (psta) { -+ psta->cmn.aid = 0;/* default set to 0 */ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) -+ psta->qos_option = 1; -+ else -+#endif -+ psta->qos_option = 0; -+#ifdef CONFIG_80211N_HT -+ psta->htpriv.ht_option = _FALSE; -+#endif /* CONFIG_80211N_HT */ -+ -+ psta->ieee8021x_blocked = 0; -+ -+ _rtw_memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); -+ -+ /* psta->dot118021XPrivacy = _NO_PRIVACY_; */ /* !!! remove it, because it has been set before this. */ -+ -+ supportRateNum = rtw_get_rateset_len((u8 *)&pcur_network->SupportedRates); -+ network_type = rtw_check_network_type((u8 *)&pcur_network->SupportedRates, supportRateNum, pcur_network->Configuration.DSConfig); -+ if (IsSupportedTxCCK(network_type)) -+ network_type = WIRELESS_11B; -+ else if (network_type == WIRELESS_INVALID) { /* error handling */ -+ if (pcur_network->Configuration.DSConfig > 14) -+ network_type = WIRELESS_11A; -+ else -+ network_type = WIRELESS_11B; -+ } -+ update_sta_basic_rate(psta, network_type); -+ psta->wireless_mode = network_type; -+ -+ rtw_hal_update_sta_ra_info(padapter, psta); -+ -+ _enter_critical_bh(&psta->lock, &irqL); -+ psta->state = WIFI_ASOC_STATE; -+ _exit_critical_bh(&psta->lock, &irqL); -+ -+ rtw_sta_media_status_rpt(padapter, psta, 1); -+ rtw_init_bmc_sta_tx_rate(padapter, psta); -+ -+ } else -+ RTW_INFO("add_RATid_bmc_sta error!\n"); -+ -+} -+ -+#if defined(CONFIG_80211N_HT) && defined(CONFIG_BEAMFORMING) -+void update_sta_info_apmode_ht_bf_cap(_adapter *padapter, struct sta_info *psta) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; -+ struct ht_priv *phtpriv_sta = &psta->htpriv; -+ -+ u8 cur_beamform_cap = 0; -+ -+ /*Config Tx beamforming setting*/ -+ if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP((u8 *)(&phtpriv_sta->ht_cap))) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); -+ /*Shift to BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP*/ -+ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS((u8 *)(&phtpriv_sta->ht_cap)) << 6); -+ } -+ -+ if (TEST_FLAG(phtpriv_ap->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP((u8 *)(&phtpriv_sta->ht_cap))) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); -+ /*Shift to BEAMFORMING_HT_BEAMFORMER_STEER_NUM*/ -+ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS((u8 *)(&phtpriv_sta->ht_cap)) << 4); -+ } -+ if (cur_beamform_cap) -+ RTW_INFO("Client STA(%d) HT Beamforming Cap = 0x%02X\n", psta->cmn.aid, cur_beamform_cap); -+ -+ phtpriv_sta->beamform_cap = cur_beamform_cap; -+ psta->cmn.bf_info.ht_beamform_cap = cur_beamform_cap; -+ -+} -+#endif /*CONFIG_80211N_HT && CONFIG_BEAMFORMING*/ -+ -+/* notes: -+ * AID: 1~MAX for sta and 0 for bc/mc in ap/adhoc mode */ -+void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+#ifdef CONFIG_80211N_HT -+ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; -+ struct ht_priv *phtpriv_sta = &psta->htpriv; -+#endif /* CONFIG_80211N_HT */ -+ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0; -+ /* set intf_tag to if1 */ -+ /* psta->intf_tag = 0; */ -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ /*alloc macid when call rtw_alloc_stainfo(),release macid when call rtw_free_stainfo()*/ -+ -+ if (!MLME_IS_MESH(padapter) && psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) -+ psta->ieee8021x_blocked = _TRUE; -+ else -+ psta->ieee8021x_blocked = _FALSE; -+ -+ -+ /* update sta's cap */ -+ -+ /* ERP */ -+ VCS_update(padapter, psta); -+#ifdef CONFIG_80211N_HT -+ /* HT related cap */ -+ if (phtpriv_sta->ht_option) { -+ /* check if sta supports rx ampdu */ -+ phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; -+ -+ phtpriv_sta->rx_ampdu_min_spacing = (phtpriv_sta->ht_cap.ampdu_params_info & IEEE80211_HT_CAP_AMPDU_DENSITY) >> 2; -+ -+ /* bwmode */ -+ if ((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) -+ psta->cmn.bw_mode = CHANNEL_WIDTH_40; -+ else -+ psta->cmn.bw_mode = CHANNEL_WIDTH_20; -+ -+ if (phtpriv_sta->op_present -+ && !GET_HT_OP_ELE_STA_CHL_WIDTH(phtpriv_sta->ht_op)) -+ psta->cmn.bw_mode = CHANNEL_WIDTH_20; -+ -+ if (psta->ht_40mhz_intolerant) -+ psta->cmn.bw_mode = CHANNEL_WIDTH_20; -+ -+ if (pmlmeext->cur_bwmode < psta->cmn.bw_mode) -+ psta->cmn.bw_mode = pmlmeext->cur_bwmode; -+ -+ phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; -+ -+ -+ /* check if sta support s Short GI 20M */ -+ if ((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) -+ phtpriv_sta->sgi_20m = _TRUE; -+ -+ /* check if sta support s Short GI 40M */ -+ if ((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) { -+ if (psta->cmn.bw_mode == CHANNEL_WIDTH_40) /* according to psta->bw_mode */ -+ phtpriv_sta->sgi_40m = _TRUE; -+ else -+ phtpriv_sta->sgi_40m = _FALSE; -+ } -+ -+ psta->qos_option = _TRUE; -+ -+ /* B0 Config LDPC Coding Capability */ -+ if (TEST_FLAG(phtpriv_ap->ldpc_cap, LDPC_HT_ENABLE_TX) && -+ GET_HT_CAP_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap))) { -+ SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); -+ RTW_INFO("Enable HT Tx LDPC for STA(%d)\n", psta->cmn.aid); -+ } -+ -+ /* B7 B8 B9 Config STBC setting */ -+ if (TEST_FLAG(phtpriv_ap->stbc_cap, STBC_HT_ENABLE_TX) && -+ GET_HT_CAP_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap))) { -+ SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX)); -+ RTW_INFO("Enable HT Tx STBC for STA(%d)\n", psta->cmn.aid); -+ } -+ -+ #ifdef CONFIG_BEAMFORMING -+ update_sta_info_apmode_ht_bf_cap(padapter, psta); -+ #endif -+ } else { -+ phtpriv_sta->ampdu_enable = _FALSE; -+ -+ phtpriv_sta->sgi_20m = _FALSE; -+ phtpriv_sta->sgi_40m = _FALSE; -+ psta->cmn.bw_mode = CHANNEL_WIDTH_20; -+ phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ -+ phtpriv_sta->ldpc_cap = cur_ldpc_cap; -+ phtpriv_sta->stbc_cap = cur_stbc_cap; -+ -+ /* Rx AMPDU */ -+ send_delba(padapter, 0, psta->cmn.mac_addr);/* recipient */ -+ -+ /* TX AMPDU */ -+ send_delba(padapter, 1, psta->cmn.mac_addr);/* */ /* originator */ -+ phtpriv_sta->agg_enable_bitmap = 0x0;/* reset */ -+ phtpriv_sta->candidate_tid_bitmap = 0x0;/* reset */ -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_80211AC_VHT -+ update_sta_vht_info_apmode(padapter, psta); -+#endif -+ psta->cmn.ra_info.is_support_sgi = query_ra_short_GI(psta, rtw_get_tx_bw_mode(padapter, psta)); -+ update_ldpc_stbc_cap(psta); -+ -+ /* todo: init other variables */ -+ -+ _rtw_memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); -+ -+ -+ /* add ratid */ -+ /* add_RATid(padapter, psta); */ /* move to ap_sta_info_defer_update() */ -+ -+ /* ap mode */ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); -+ -+ _enter_critical_bh(&psta->lock, &irqL); -+ -+ /* Check encryption */ -+ if (!MLME_IS_MESH(padapter) && psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) -+ psta->state |= WIFI_UNDER_KEY_HANDSHAKE; -+ -+ psta->state |= WIFI_ASOC_STATE; -+ -+ _exit_critical_bh(&psta->lock, &irqL); -+} -+ -+#ifdef CONFIG_RTW_80211K -+static void update_rm_cap(u8 *frame_head, _adapter *pa, u32 pktlen, int offset) -+{ -+ u8 *res; -+ sint len; -+ -+ res = rtw_get_ie(frame_head + offset, _EID_RRM_EN_CAP_IE_, &len, -+ pktlen - offset); -+ if (res != NULL) -+ _rtw_memcpy((void *)pa->rmpriv.rm_en_cap_def, (res + 2), len); -+} -+#endif -+ -+static void update_ap_info(_adapter *padapter, struct sta_info *psta) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+#ifdef CONFIG_80211N_HT -+ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; -+#endif /* CONFIG_80211N_HT */ -+ -+ psta->wireless_mode = pmlmeext->cur_wireless_mode; -+ -+ psta->bssratelen = rtw_get_rateset_len(pnetwork->SupportedRates); -+ _rtw_memcpy(psta->bssrateset, pnetwork->SupportedRates, psta->bssratelen); -+ -+#ifdef CONFIG_80211N_HT -+ /* HT related cap */ -+ if (phtpriv_ap->ht_option) { -+ /* check if sta supports rx ampdu */ -+ /* phtpriv_ap->ampdu_enable = phtpriv_ap->ampdu_enable; */ -+ -+ /* check if sta support s Short GI 20M */ -+ if ((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) -+ phtpriv_ap->sgi_20m = _TRUE; -+ /* check if sta support s Short GI 40M */ -+ if ((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) -+ phtpriv_ap->sgi_40m = _TRUE; -+ -+ psta->qos_option = _TRUE; -+ } else { -+ phtpriv_ap->ampdu_enable = _FALSE; -+ -+ phtpriv_ap->sgi_20m = _FALSE; -+ phtpriv_ap->sgi_40m = _FALSE; -+ } -+ -+ psta->cmn.bw_mode = pmlmeext->cur_bwmode; -+ phtpriv_ap->ch_offset = pmlmeext->cur_ch_offset; -+ -+ phtpriv_ap->agg_enable_bitmap = 0x0;/* reset */ -+ phtpriv_ap->candidate_tid_bitmap = 0x0;/* reset */ -+ -+ _rtw_memcpy(&psta->htpriv, &pmlmepriv->htpriv, sizeof(struct ht_priv)); -+ -+#ifdef CONFIG_80211AC_VHT -+ _rtw_memcpy(&psta->vhtpriv, &pmlmepriv->vhtpriv, sizeof(struct vht_priv)); -+#endif /* CONFIG_80211AC_VHT */ -+ -+#endif /* CONFIG_80211N_HT */ -+ -+ psta->state |= WIFI_AP_STATE; /* Aries, add,fix bug of flush_cam_entry at STOP AP mode , 0724 */ -+} -+ -+static void rtw_set_hw_wmm_param(_adapter *padapter) -+{ -+ u8 AIFS, ECWMin, ECWMax, aSifsTime; -+ u8 acm_mask; -+ u16 TXOP; -+ u32 acParm, i; -+ u32 edca[4], inx[4]; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ acm_mask = 0; -+#ifdef CONFIG_80211N_HT -+ if (pregpriv->ht_enable && -+ (is_supported_5g(pmlmeext->cur_wireless_mode) || -+ (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))) -+ aSifsTime = 16; -+ else -+#endif /* CONFIG_80211N_HT */ -+ aSifsTime = 10; -+ -+ if (pmlmeinfo->WMM_enable == 0) { -+ padapter->mlmepriv.acm_mask = 0; -+ -+ AIFS = aSifsTime + (2 * pmlmeinfo->slotTime); -+ -+ if (pmlmeext->cur_wireless_mode & (WIRELESS_11G | WIRELESS_11A)) { -+ ECWMin = 4; -+ ECWMax = 10; -+ } else if (pmlmeext->cur_wireless_mode & WIRELESS_11B) { -+ ECWMin = 5; -+ ECWMax = 10; -+ } else { -+ ECWMin = 4; -+ ECWMax = 10; -+ } -+ -+ TXOP = 0; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); -+ -+ ECWMin = 2; -+ ECWMax = 3; -+ TXOP = 0x2f; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); -+ -+ } else { -+ edca[0] = edca[1] = edca[2] = edca[3] = 0; -+ -+ /*TODO:*/ -+ acm_mask = 0; -+ padapter->mlmepriv.acm_mask = acm_mask; -+ -+#if 0 -+ /* BK */ -+ /* AIFS = AIFSN * slot time + SIFS - r2t phy delay */ -+#endif -+ AIFS = (7 * pmlmeinfo->slotTime) + aSifsTime; -+ ECWMin = 4; -+ ECWMax = 10; -+ TXOP = 0; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); -+ edca[XMIT_BK_QUEUE] = acParm; -+ RTW_INFO("WMM(BK): %x\n", acParm); -+ -+ /* BE */ -+ AIFS = (3 * pmlmeinfo->slotTime) + aSifsTime; -+ ECWMin = 4; -+ ECWMax = 6; -+ TXOP = 0; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); -+ edca[XMIT_BE_QUEUE] = acParm; -+ RTW_INFO("WMM(BE): %x\n", acParm); -+ -+ /* VI */ -+ AIFS = (1 * pmlmeinfo->slotTime) + aSifsTime; -+ ECWMin = 3; -+ ECWMax = 4; -+ TXOP = 94; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); -+ edca[XMIT_VI_QUEUE] = acParm; -+ RTW_INFO("WMM(VI): %x\n", acParm); -+ -+ /* VO */ -+ AIFS = (1 * pmlmeinfo->slotTime) + aSifsTime; -+ ECWMin = 2; -+ ECWMax = 3; -+ TXOP = 47; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); -+ edca[XMIT_VO_QUEUE] = acParm; -+ RTW_INFO("WMM(VO): %x\n", acParm); -+ -+ -+ if (padapter->registrypriv.acm_method == 1) -+ rtw_hal_set_hwreg(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_mask)); -+ else -+ padapter->mlmepriv.acm_mask = acm_mask; -+ -+ inx[0] = 0; -+ inx[1] = 1; -+ inx[2] = 2; -+ inx[3] = 3; -+ -+ if (pregpriv->wifi_spec == 1) { -+ u32 j, tmp, change_inx = _FALSE; -+ -+ /* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */ -+ for (i = 0 ; i < 4 ; i++) { -+ for (j = i + 1 ; j < 4 ; j++) { -+ /* compare CW and AIFS */ -+ if ((edca[j] & 0xFFFF) < (edca[i] & 0xFFFF)) -+ change_inx = _TRUE; -+ else if ((edca[j] & 0xFFFF) == (edca[i] & 0xFFFF)) { -+ /* compare TXOP */ -+ if ((edca[j] >> 16) > (edca[i] >> 16)) -+ change_inx = _TRUE; -+ } -+ -+ if (change_inx) { -+ tmp = edca[i]; -+ edca[i] = edca[j]; -+ edca[j] = tmp; -+ -+ tmp = inx[i]; -+ inx[i] = inx[j]; -+ inx[j] = tmp; -+ -+ change_inx = _FALSE; -+ } -+ } -+ } -+ } -+ -+ for (i = 0 ; i < 4 ; i++) { -+ pxmitpriv->wmm_para_seq[i] = inx[i]; -+ RTW_INFO("wmm_para_seq(%d): %d\n", i, pxmitpriv->wmm_para_seq[i]); -+ } -+ -+ } -+ -+} -+#ifdef CONFIG_80211N_HT -+static void update_hw_ht_param(_adapter *padapter) -+{ -+ unsigned char max_AMPDU_len; -+ unsigned char min_MPDU_spacing; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ -+ /* handle A-MPDU parameter field */ -+ /* -+ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k -+ AMPDU_para [4:2]:Min MPDU Start Spacing -+ */ -+ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; -+ -+ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); -+ -+ /* */ -+ /* Config SM Power Save setting */ -+ /* */ -+ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; -+ if (pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) { -+#if 0 -+ u8 i; -+ /* update the MCS rates */ -+ for (i = 0; i < 16; i++) -+ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; -+#endif -+ RTW_INFO("%s(): WLAN_HT_CAP_SM_PS_STATIC\n", __FUNCTION__); -+ } -+ -+ /* */ -+ /* Config current HT Protection mode. */ -+ /* */ -+ /* pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; */ -+ -+} -+#endif /* CONFIG_80211N_HT */ -+static void rtw_ap_check_scan(_adapter *padapter) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ u32 delta_time, lifetime; -+ struct wlan_network *pnetwork = NULL; -+ WLAN_BSSID_EX *pbss = NULL; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ u8 do_scan = _FALSE; -+ u8 reason = RTW_AUTO_SCAN_REASON_UNSPECIFIED; -+ -+ lifetime = SCANQUEUE_LIFETIME; /* 20 sec */ -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ phead = get_list_head(queue); -+ if (rtw_end_of_queue_search(phead, get_next(phead)) == _TRUE) -+ if (padapter->registrypriv.wifi_spec) { -+ do_scan = _TRUE; -+ reason |= RTW_AUTO_SCAN_REASON_2040_BSS; -+ } -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+#ifdef CONFIG_RTW_ACS -+ if (padapter->registrypriv.acs_auto_scan) { -+ do_scan = _TRUE; -+ reason |= RTW_AUTO_SCAN_REASON_ACS; -+ rtw_acs_start(padapter); -+ } -+#endif/*CONFIG_RTW_ACS*/ -+ -+ if (_TRUE == do_scan) { -+ RTW_INFO("%s : drv scans by itself and wait_completed\n", __func__); -+ rtw_drv_scan_by_self(padapter, reason); -+ rtw_scan_wait_completed(padapter); -+ } -+ -+#ifdef CONFIG_RTW_ACS -+ if (padapter->registrypriv.acs_auto_scan) -+ rtw_acs_stop(padapter); -+#endif -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ if (rtw_chset_search_ch(adapter_to_chset(padapter), pnetwork->network.Configuration.DSConfig) >= 0 -+ && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE -+ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))) { -+ delta_time = (u32) rtw_get_passing_time_ms(pnetwork->last_scanned); -+ -+ if (delta_time < lifetime) { -+ -+ uint ie_len = 0; -+ u8 *pbuf = NULL; -+ u8 *ie = NULL; -+ -+ pbss = &pnetwork->network; -+ ie = pbss->IEs; -+ -+ /*check if HT CAP INFO IE exists or not*/ -+ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss->IELength - _BEACON_IE_OFFSET_)); -+ if (pbuf == NULL) { -+ /* HT CAP INFO IE don't exist, it is b/g mode bss.*/ -+ -+ if (_FALSE == ATOMIC_READ(&pmlmepriv->olbc)) -+ ATOMIC_SET(&pmlmepriv->olbc, _TRUE); -+ -+ if (_FALSE == ATOMIC_READ(&pmlmepriv->olbc_ht)) -+ ATOMIC_SET(&pmlmepriv->olbc_ht, _TRUE); -+ -+ if (padapter->registrypriv.wifi_spec) -+ RTW_INFO("%s: %s is a/b/g ap\n", __func__, pnetwork->network.Ssid.Ssid); -+ } -+ } -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+#ifdef CONFIG_80211N_HT -+ pmlmepriv->num_sta_no_ht = 0; /* reset to 0 after ap do scanning*/ -+#endif -+} -+ -+void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter) -+{ -+ WLAN_BSSID_EX *pnetwork = &(adapter->mlmepriv.cur_network.network); -+ struct sta_info *sta = NULL; -+ -+ /* update cur_wireless_mode */ -+ update_wireless_mode(adapter); -+ -+ /* update RRSR and RTS_INIT_RATE register after set channel and bandwidth */ -+ UpdateBrateTbl(adapter, pnetwork->SupportedRates); -+ rtw_hal_set_hwreg(adapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); -+ -+ /* update capability after cur_wireless_mode updated */ -+ update_capinfo(adapter, rtw_get_capability(pnetwork)); -+ -+ /* update bc/mc sta_info */ -+ update_bmc_sta(adapter); -+ -+ /* update AP's sta info */ -+ sta = rtw_get_stainfo(&adapter->stapriv, pnetwork->MacAddress); -+ if (!sta) { -+ RTW_INFO(FUNC_ADPT_FMT" !sta for macaddr="MAC_FMT"\n", FUNC_ADPT_ARG(adapter), MAC_ARG(pnetwork->MacAddress)); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ update_ap_info(adapter, sta); -+} -+ -+#ifdef CONFIG_FW_HANDLE_TXBCN -+bool rtw_ap_nums_check(_adapter *adapter) -+{ -+ if (rtw_ap_get_nums(adapter) < CONFIG_LIMITED_AP_NUM) -+ return _TRUE; -+ return _FALSE; -+} -+u8 rtw_ap_allocate_vapid(struct dvobj_priv *dvobj) -+{ -+ u8 vap_id; -+ -+ for (vap_id = 0; vap_id < CONFIG_LIMITED_AP_NUM; vap_id++) { -+ if (!(dvobj->vap_map & BIT(vap_id))) -+ break; -+ } -+ -+ if (vap_id < CONFIG_LIMITED_AP_NUM) -+ dvobj->vap_map |= BIT(vap_id); -+ -+ return vap_id; -+} -+u8 rtw_ap_release_vapid(struct dvobj_priv *dvobj, u8 vap_id) -+{ -+ if (vap_id >= CONFIG_LIMITED_AP_NUM) { -+ RTW_ERR("%s - vapid(%d) failed\n", __func__, vap_id); -+ rtw_warn_on(1); -+ return _FAIL; -+ } -+ dvobj->vap_map &= ~ BIT(vap_id); -+ return _SUCCESS; -+} -+#endif -+static void _rtw_iface_undersurvey_chk(const char *func, _adapter *adapter) -+{ -+ int i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mlme_priv *pmlmepriv; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ pmlmepriv = &iface->mlmepriv; -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY)) -+ RTW_ERR("%s ("ADPT_FMT") under survey\n", func, ADPT_ARG(iface)); -+ } -+ } -+} -+void start_bss_network(_adapter *padapter, struct createbss_parm *parm) -+{ -+#define DUMP_ADAPTERS_STATUS 0 -+ u8 mlme_act = MLME_ACTION_UNKNOWN; -+ u8 val8; -+ u16 bcn_interval; -+ u32 acparm; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; /* used as input */ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); -+ struct dvobj_priv *pdvobj = padapter->dvobj; -+ s16 req_ch = REQ_CH_NONE, req_bw = REQ_BW_NONE, req_offset = REQ_OFFSET_NONE; -+ u8 u_ch = 0, u_bw, u_offset; -+ bool set_u_ch; -+ u8 doiqk = _FALSE; -+ /* use for check ch bw offset can be allowed or not */ -+ u8 chbw_allow = _TRUE; -+ int i; -+ u8 ifbmp_ch_changed = 0; -+ -+ if (parm->req_ch != 0) { -+ /* bypass other setting, go checking ch, bw, offset */ -+ mlme_act = MLME_OPCH_SWITCH; -+ req_ch = parm->req_ch; -+ req_bw = parm->req_bw; -+ req_offset = parm->req_offset; -+ goto chbw_decision; -+ } else { -+ /* request comes from upper layer */ -+ if (MLME_IS_AP(padapter)) -+ mlme_act = MLME_AP_STARTED; -+ else if (MLME_IS_MESH(padapter)) -+ mlme_act = MLME_MESH_STARTED; -+ else -+ rtw_warn_on(1); -+ req_ch = 0; -+ _rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length); -+ } -+ -+ bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod; -+ -+ /* check if there is wps ie, */ -+ /* if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, */ -+ /* and at first time the security ie ( RSN/WPA IE) will not include in beacon. */ -+ if (NULL == rtw_get_wps_ie(pnetwork->IEs + _FIXED_IE_LENGTH_, pnetwork->IELength - _FIXED_IE_LENGTH_, NULL, NULL)) -+ pmlmeext->bstart_bss = _TRUE; -+ -+ /* todo: update wmm, ht cap */ -+ /* pmlmeinfo->WMM_enable; */ -+ /* pmlmeinfo->HT_enable; */ -+ if (pmlmepriv->qospriv.qos_option) -+ pmlmeinfo->WMM_enable = _TRUE; -+#ifdef CONFIG_80211N_HT -+ if (pmlmepriv->htpriv.ht_option) { -+ pmlmeinfo->WMM_enable = _TRUE; -+ pmlmeinfo->HT_enable = _TRUE; -+ /* pmlmeinfo->HT_info_enable = _TRUE; */ -+ /* pmlmeinfo->HT_caps_enable = _TRUE; */ -+ -+ update_hw_ht_param(padapter); -+ } -+#endif /* #CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_80211AC_VHT -+ if (pmlmepriv->vhtpriv.vht_option) { -+ pmlmeinfo->VHT_enable = _TRUE; -+ update_hw_vht_param(padapter); -+ } -+#endif /* CONFIG_80211AC_VHT */ -+ -+ if (pmlmepriv->cur_network.join_res != _TRUE) { /* setting only at first time */ -+ /* WEP Key will be set before this function, do not clear CAM. */ -+ if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_) -+ && !MLME_IS_MESH(padapter) /* mesh group key is set before this function */ -+ ) -+ flush_all_cam_entry(padapter); /* clear CAM */ -+ } -+ -+ /* set MSR to AP_Mode */ -+ Set_MSR(padapter, _HW_STATE_AP_); -+ -+ /* Set BSSID REG */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress); -+ -+ /* Set Security */ -+ val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) ? 0xcc : 0xcf; -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); -+ -+ /* Beacon Control related register */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval)); -+ -+ rtw_hal_rcr_set_chk_bssid(padapter, mlme_act); -+ -+chbw_decision: -+ ifbmp_ch_changed = rtw_ap_chbw_decision(padapter, parm->ifbmp, parm->excl_ifbmp -+ , req_ch, req_bw, req_offset -+ , &u_ch, &u_bw, &u_offset, &chbw_allow, &set_u_ch); -+ -+ for (i = 0; i < pdvobj->iface_nums; i++) { -+ if (!(parm->ifbmp & BIT(i)) || !pdvobj->padapters[i]) -+ continue; -+ -+ /* let pnetwork_mlme == pnetwork_mlmeext */ -+ _rtw_memcpy(&(pdvobj->padapters[i]->mlmepriv.cur_network.network) -+ , &(pdvobj->padapters[i]->mlmeextpriv.mlmext_info.network) -+ , pdvobj->padapters[i]->mlmeextpriv.mlmext_info.network.Length); -+ -+ rtw_start_bss_hdl_after_chbw_decided(pdvobj->padapters[i]); -+ -+ /* Set EDCA param reg after update cur_wireless_mode & update_capinfo */ -+ if (pregpriv->wifi_spec == 1) -+ rtw_set_hw_wmm_param(pdvobj->padapters[i]); -+ } -+ -+#if defined(CONFIG_DFS_MASTER) -+ rtw_dfs_rd_en_decision(padapter, mlme_act, parm->excl_ifbmp); -+#endif -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) { -+ /* -+ * due to check under rtw_ap_chbw_decision -+ * if under MCC mode, means req channel setting is the same as current channel setting -+ * if not under MCC mode, mean req channel setting is not the same as current channel setting -+ */ -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) { -+ RTW_INFO(FUNC_ADPT_FMT": req channel setting is the same as current channel setting, go to update BCN\n" -+ , FUNC_ADPT_ARG(padapter)); -+ -+ goto update_beacon; -+ -+ } -+ } -+ -+ /* issue null data to AP for all interface connecting to AP before switch channel setting for softap */ -+ rtw_hal_mcc_issue_null_data(padapter, chbw_allow, 1); -+#endif /* CONFIG_MCC_MODE */ -+ -+ if (!IS_CH_WAITING(adapter_to_rfctl(padapter))) { -+ doiqk = _TRUE; -+ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); -+ } -+ -+ if (set_u_ch) -+ set_channel_bwmode(padapter, u_ch, u_offset, u_bw); -+ -+ doiqk = _FALSE; -+ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); -+ -+#ifdef CONFIG_MCC_MODE -+ /* after set_channel_bwmode for backup IQK */ -+ if (rtw_hal_set_mcc_setting_start_bss_network(padapter, chbw_allow) == _FAIL) { -+ /* MCC setting fail, update to buddy's channel */ -+ rtw_mi_get_ch_setting_union_no_self(padapter, &u_ch, &u_bw, &u_offset); -+ pnetwork->Configuration.DSConfig = u_ch; -+ padapter->mlmeextpriv.cur_channel = u_ch; -+ padapter->mlmeextpriv.cur_bwmode = u_bw; -+ padapter->mlmeextpriv.cur_ch_offset = u_offset; -+ -+ if (ifbmp_ch_changed == 0) { -+ u8 ht_option = 0; -+ -+#ifdef CONFIG_80211N_HT -+ ht_option = padapter->mlmepriv.htpriv.ht_option; -+#endif -+ -+ rtw_cfg80211_ch_switch_notify(padapter -+ , padapter->mlmeextpriv.cur_channel -+ , padapter->mlmeextpriv.cur_bwmode -+ , padapter->mlmeextpriv.cur_ch_offset -+ , ht_option, 0); -+ } -+ } -+#endif -+ -+#if defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ for (i = 0; i < pdvobj->iface_nums; i++) { -+ if (!(ifbmp_ch_changed & BIT(i)) || !pdvobj->padapters[i]) -+ continue; -+ -+ { -+ u8 ht_option = 0; -+ -+ #ifdef CONFIG_80211N_HT -+ ht_option = pdvobj->padapters[i]->mlmepriv.htpriv.ht_option; -+ #endif -+ -+ rtw_cfg80211_ch_switch_notify(pdvobj->padapters[i] -+ , pdvobj->padapters[i]->mlmeextpriv.cur_channel -+ , pdvobj->padapters[i]->mlmeextpriv.cur_bwmode -+ , pdvobj->padapters[i]->mlmeextpriv.cur_ch_offset -+ , ht_option, 0); -+ } -+ } -+#endif /* defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) */ -+ -+ rtw_rfctl_update_op_mode(adapter_to_rfctl(padapter), parm->ifbmp, 1); -+ -+ if (DUMP_ADAPTERS_STATUS) { -+ RTW_INFO(FUNC_ADPT_FMT" done\n", FUNC_ADPT_ARG(padapter)); -+ dump_adapters_status(RTW_DBGDUMP , adapter_to_dvobj(padapter)); -+ } -+ -+#ifdef CONFIG_MCC_MODE -+update_beacon: -+#endif -+ -+ for (i = 0; i < pdvobj->iface_nums; i++) { -+ struct mlme_priv *mlme; -+ -+ if (!(parm->ifbmp & BIT(i)) || !pdvobj->padapters[i]) -+ continue; -+ -+ /* update beacon content only if bstart_bss is _TRUE */ -+ if (pdvobj->padapters[i]->mlmeextpriv.bstart_bss != _TRUE) -+ continue; -+ -+ mlme = &(pdvobj->padapters[i]->mlmepriv); -+ -+ #ifdef CONFIG_80211N_HT -+ if ((ATOMIC_READ(&mlme->olbc) == _TRUE) || (ATOMIC_READ(&mlme->olbc_ht) == _TRUE)) { -+ /* AP is not starting a 40 MHz BSS in presence of an 802.11g BSS. */ -+ mlme->ht_op_mode &= (~HT_INFO_OPERATION_MODE_OP_MODE_MASK); -+ mlme->ht_op_mode |= OP_MODE_MAY_BE_LEGACY_STAS; -+ update_beacon(pdvobj->padapters[i], _HT_ADD_INFO_IE_, NULL, _FALSE, 0); -+ } -+ #endif -+ -+ update_beacon(pdvobj->padapters[i], _TIM_IE_, NULL, _FALSE, 0); -+ } -+ -+ if (mlme_act != MLME_OPCH_SWITCH -+ && pmlmeext->bstart_bss == _TRUE -+ ) { -+#ifdef CONFIG_SUPPORT_MULTI_BCN -+ _irqL irqL; -+ -+ _enter_critical_bh(&pdvobj->ap_if_q.lock, &irqL); -+ if (rtw_is_list_empty(&padapter->list)) { -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ padapter->vap_id = rtw_ap_allocate_vapid(pdvobj); -+ #endif -+ rtw_list_insert_tail(&padapter->list, get_list_head(&pdvobj->ap_if_q)); -+ pdvobj->nr_ap_if++; -+ pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL / pdvobj->nr_ap_if; -+ } -+ _exit_critical_bh(&pdvobj->ap_if_q.lock, &irqL); -+ -+ #ifdef CONFIG_SWTIMER_BASED_TXBCN -+ rtw_ap_set_mbid_num(padapter, pdvobj->nr_ap_if); -+ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pdvobj->inter_bcn_space)); -+ #endif /*CONFIG_SWTIMER_BASED_TXBCN*/ -+ -+#endif /*CONFIG_SUPPORT_MULTI_BCN*/ -+ -+ #ifdef CONFIG_HW_P0_TSF_SYNC -+ correct_TSF(padapter, mlme_act); -+ #endif -+ } -+ -+ rtw_scan_wait_completed(padapter); -+ -+ _rtw_iface_undersurvey_chk(__func__, padapter); -+ /* send beacon */ -+ ResumeTxBeacon(padapter); -+ { -+#if !defined(CONFIG_INTERRUPT_BASED_TXBCN) -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_PCI_BCN_POLLING) -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+ if (pdvobj->nr_ap_if == 1 -+ && mlme_act != MLME_OPCH_SWITCH -+ ) { -+ RTW_INFO("start SW BCN TIMER!\n"); -+ _set_timer(&pdvobj->txbcn_timer, bcn_interval); -+ } -+#else -+ for (i = 0; i < pdvobj->iface_nums; i++) { -+ if (!(parm->ifbmp & BIT(i)) || !pdvobj->padapters[i]) -+ continue; -+ -+ if (send_beacon(pdvobj->padapters[i]) == _FAIL) -+ RTW_INFO(ADPT_FMT" issue_beacon, fail!\n", ADPT_ARG(pdvobj->padapters[i])); -+ } -+#endif -+#endif -+#endif /* !defined(CONFIG_INTERRUPT_BASED_TXBCN) */ -+ -+#ifdef CONFIG_FW_HANDLE_TXBCN -+ if (mlme_act != MLME_OPCH_SWITCH -+ && pmlmeext->bstart_bss == _TRUE) -+ rtw_ap_mbid_bcn_en(padapter, padapter->vap_id); -+#endif -+ } -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (MLME_IS_AP(padapter) && padapter->tbtx_capability == _TRUE) { -+ _set_timer(&pmlmeext->tbtx_token_dispatch_timer, 1); -+ RTW_INFO("Start token dispatch\n"); -+ } -+#endif -+} -+ -+int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) -+{ -+ int ret = _SUCCESS; -+ u8 *p; -+ u8 *pHT_caps_ie = NULL; -+ u8 *pHT_info_ie = NULL; -+ u16 cap, ht_cap = _FALSE; -+ uint ie_len = 0; -+ int group_cipher, pairwise_cipher, gmcs; -+ u32 akm; -+ u8 mfp_opt = MFP_NO; -+ u8 channel, network_type; -+ u8 OUI1[] = {0x00, 0x50, 0xf2, 0x01}; -+ u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; -+ HT_CAP_AMPDU_DENSITY best_ampdu_density; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; -+ u8 *ie = pbss_network->IEs; -+ u8 vht_cap = _FALSE; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ u8 rf_num = 0; -+ int ret_rm; -+ /* SSID */ -+ /* Supported rates */ -+ /* DS Params */ -+ /* WLAN_EID_COUNTRY */ -+ /* ERP Information element */ -+ /* Extended supported rates */ -+ /* WPA/WPA2 */ -+ /* Radio Resource Management */ -+ /* Wi-Fi Wireless Multimedia Extensions */ -+ /* ht_capab, ht_oper */ -+ /* WPS IE */ -+ -+ RTW_INFO("%s, len=%d\n", __FUNCTION__, len); -+ -+ if (!MLME_IS_AP(padapter) && !MLME_IS_MESH(padapter)) -+ return _FAIL; -+ -+ -+ if (len > MAX_IE_SZ) -+ return _FAIL; -+ -+ pbss_network->IELength = len; -+ -+ _rtw_memset(ie, 0, MAX_IE_SZ); -+ -+ _rtw_memcpy(ie, pbuf, pbss_network->IELength); -+ -+ -+ if (pbss_network->InfrastructureMode != Ndis802_11APMode -+ && pbss_network->InfrastructureMode != Ndis802_11_mesh -+ ) { -+ rtw_warn_on(1); -+ return _FAIL; -+ } -+ -+ -+ rtw_ap_check_scan(padapter); -+ -+ -+ pbss_network->Rssi = 0; -+ -+ _rtw_memcpy(pbss_network->MacAddress, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ /* beacon interval */ -+ p = rtw_get_beacon_interval_from_ie(ie);/* ie + 8; */ /* 8: TimeStamp, 2: Beacon Interval 2:Capability */ -+ /* pbss_network->Configuration.BeaconPeriod = le16_to_cpu(*(unsigned short*)p); */ -+ pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p); -+ -+ /* capability */ -+ /* cap = *(unsigned short *)rtw_get_capability_from_ie(ie); */ -+ /* cap = le16_to_cpu(cap); */ -+ cap = RTW_GET_LE16(ie); -+ -+ /* SSID */ -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) { -+ _rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); -+ _rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); -+ pbss_network->Ssid.SsidLength = ie_len; -+#ifdef CONFIG_P2P -+ _rtw_memcpy(padapter->wdinfo.p2p_group_ssid, pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); -+ padapter->wdinfo.p2p_group_ssid_len = pbss_network->Ssid.SsidLength; -+#endif -+ } -+ -+#ifdef CONFIG_RTW_MESH -+ /* Mesh ID */ -+ if (MLME_IS_MESH(padapter)) { -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, WLAN_EID_MESH_ID, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) { -+ _rtw_memset(&pbss_network->mesh_id, 0, sizeof(NDIS_802_11_SSID)); -+ _rtw_memcpy(pbss_network->mesh_id.Ssid, (p + 2), ie_len); -+ pbss_network->mesh_id.SsidLength = ie_len; -+ } -+ } -+#endif -+ -+ /* chnnel */ -+ channel = 0; -+ pbss_network->Configuration.Length = 0; -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) -+ channel = *(p + 2); -+ -+ pbss_network->Configuration.DSConfig = channel; -+ -+ /* support rate ie & ext support ie & IElen & SupportedRates */ -+ network_type = rtw_update_rate_bymode(pbss_network, pregistrypriv->wireless_mode); -+ -+ /* parsing ERP_IE */ -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) { -+ if(padapter->registrypriv.wireless_mode == WIRELESS_11B ) { -+ -+ pbss_network->IELength = pbss_network->IELength - *(p+1) - 2; -+ ret_rm = rtw_ies_remove_ie(ie , &len, _BEACON_IE_OFFSET_, _ERPINFO_IE_,NULL,0); -+ RTW_DBG("%s, remove_ie of ERP_IE=%d\n", __FUNCTION__, ret_rm); -+ } else -+ ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); -+ -+ } -+ -+ /* update privacy/security */ -+ if (cap & BIT(4)) -+ pbss_network->Privacy = 1; -+ else -+ pbss_network->Privacy = 0; -+ -+ psecuritypriv->wpa_psk = 0; -+ -+ /* wpa2 */ -+ akm = 0; -+ gmcs = 0; -+ group_cipher = 0; -+ pairwise_cipher = 0; -+ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; -+ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; -+ psecuritypriv->akmp = 0; -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) { -+ if (rtw_parse_wpa2_ie(p, ie_len + 2, &group_cipher, &pairwise_cipher, &gmcs, &akm, &mfp_opt) == _SUCCESS) { -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; -+ psecuritypriv->dot8021xalg = 1;/* psk, todo:802.1x */ -+ psecuritypriv->wpa_psk |= BIT(1); -+ -+ psecuritypriv->wpa2_group_cipher = group_cipher; -+ psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; -+ psecuritypriv->akmp = akm; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ /** -+ * Kernel < v5.x, the auth_type set as -+ * NL80211_AUTHTYPE_AUTOMATIC in -+ * cfg80211_rtw_start_ap(). if the AKM SAE in the RSN -+ * IE, we have to update the auth_type for SAE in -+ * rtw_check_beacon_data() -+ */ -+ if (CHECK_BIT(WLAN_AKM_TYPE_SAE, akm)) { -+ RTW_INFO("%s: Auth type as SAE\n", __func__); -+ psecuritypriv->auth_type = MLME_AUTHTYPE_SAE; -+ psecuritypriv->auth_alg = WLAN_AUTH_SAE; -+ } -+#endif /* CONFIG_IOCTL_CFG80211 */ -+#if 0 -+ switch (group_cipher) { -+ case WPA_CIPHER_NONE: -+ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; -+ break; -+ case WPA_CIPHER_WEP40: -+ psecuritypriv->wpa2_group_cipher = _WEP40_; -+ break; -+ case WPA_CIPHER_TKIP: -+ psecuritypriv->wpa2_group_cipher = _TKIP_; -+ break; -+ case WPA_CIPHER_CCMP: -+ psecuritypriv->wpa2_group_cipher = _AES_; -+ break; -+ case WPA_CIPHER_WEP104: -+ psecuritypriv->wpa2_group_cipher = _WEP104_; -+ break; -+ } -+ -+ switch (pairwise_cipher) { -+ case WPA_CIPHER_NONE: -+ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; -+ break; -+ case WPA_CIPHER_WEP40: -+ psecuritypriv->wpa2_pairwise_cipher = _WEP40_; -+ break; -+ case WPA_CIPHER_TKIP: -+ psecuritypriv->wpa2_pairwise_cipher = _TKIP_; -+ break; -+ case WPA_CIPHER_CCMP: -+ psecuritypriv->wpa2_pairwise_cipher = _AES_; -+ break; -+ case WPA_CIPHER_WEP104: -+ psecuritypriv->wpa2_pairwise_cipher = _WEP104_; -+ break; -+ } -+#endif -+ } -+ -+ } -+ -+ /* wpa */ -+ ie_len = 0; -+ group_cipher = 0; -+ pairwise_cipher = 0; -+ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; -+ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; -+ for (p = ie + _BEACON_IE_OFFSET_; ; p += (ie_len + 2)) { -+ p = rtw_get_ie(p, _SSN_IE_1_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); -+ if ((p) && (_rtw_memcmp(p + 2, OUI1, 4))) { -+ if (rtw_parse_wpa_ie(p, ie_len + 2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; -+ psecuritypriv->dot8021xalg = 1;/* psk, todo:802.1x */ -+ -+ psecuritypriv->wpa_psk |= BIT(0); -+ -+ psecuritypriv->wpa_group_cipher = group_cipher; -+ psecuritypriv->wpa_pairwise_cipher = pairwise_cipher; -+ -+#if 0 -+ switch (group_cipher) { -+ case WPA_CIPHER_NONE: -+ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; -+ break; -+ case WPA_CIPHER_WEP40: -+ psecuritypriv->wpa_group_cipher = _WEP40_; -+ break; -+ case WPA_CIPHER_TKIP: -+ psecuritypriv->wpa_group_cipher = _TKIP_; -+ break; -+ case WPA_CIPHER_CCMP: -+ psecuritypriv->wpa_group_cipher = _AES_; -+ break; -+ case WPA_CIPHER_WEP104: -+ psecuritypriv->wpa_group_cipher = _WEP104_; -+ break; -+ } -+ -+ switch (pairwise_cipher) { -+ case WPA_CIPHER_NONE: -+ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; -+ break; -+ case WPA_CIPHER_WEP40: -+ psecuritypriv->wpa_pairwise_cipher = _WEP40_; -+ break; -+ case WPA_CIPHER_TKIP: -+ psecuritypriv->wpa_pairwise_cipher = _TKIP_; -+ break; -+ case WPA_CIPHER_CCMP: -+ psecuritypriv->wpa_pairwise_cipher = _AES_; -+ break; -+ case WPA_CIPHER_WEP104: -+ psecuritypriv->wpa_pairwise_cipher = _WEP104_; -+ break; -+ } -+#endif -+ } -+ -+ break; -+ -+ } -+ -+ if ((p == NULL) || (ie_len == 0)) -+ break; -+ -+ } -+ -+ if (mfp_opt == MFP_INVALID) { -+ RTW_INFO(FUNC_ADPT_FMT" invalid MFP setting\n", FUNC_ADPT_ARG(padapter)); -+ return _FAIL; -+ } -+ psecuritypriv->mfp_opt = mfp_opt; -+ -+#ifdef CONFIG_RTW_80211K -+ /* RRM */ -+ update_rm_cap(pbuf, padapter, len, _BEACON_IE_OFFSET_); -+ -+#endif /* CONFIG_RTW_80211K */ -+ -+ /* wmm */ -+ ie_len = 0; -+ pmlmepriv->qospriv.qos_option = 0; -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) -+ pmlmepriv->qospriv.qos_option = 1; -+#endif -+ if (pregistrypriv->wmm_enable) { -+ for (p = ie + _BEACON_IE_OFFSET_; ; p += (ie_len + 2)) { -+ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); -+ if ((p) && _rtw_memcmp(p + 2, WMM_PARA_IE, 6)) { -+ pmlmepriv->qospriv.qos_option = 1; -+ -+ *(p + 8) |= BIT(7); /* QoS Info, support U-APSD */ -+ -+ /* disable all ACM bits since the WMM admission control is not supported */ -+ *(p + 10) &= ~BIT(4); /* BE */ -+ *(p + 14) &= ~BIT(4); /* BK */ -+ *(p + 18) &= ~BIT(4); /* VI */ -+ *(p + 22) &= ~BIT(4); /* VO */ -+ -+ WMM_param_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); -+ -+ break; -+ } -+ -+ if ((p == NULL) || (ie_len == 0)) -+ break; -+ } -+ } -+#ifdef CONFIG_80211N_HT -+ if(padapter->registrypriv.ht_enable && -+ is_supported_ht(padapter->registrypriv.wireless_mode)) { -+ /* parsing HT_CAP_IE */ -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) { -+ HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor = MAX_AMPDU_FACTOR_64K; -+ struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p + 2); -+ -+#ifdef CONFIG_RTW_DEBUG -+ if (0) { -+ RTW_INFO(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter)); -+ dump_ht_cap_ie_content(RTW_DBGDUMP, p + 2, ie_len); -+ } -+#endif /* CONFIG_RTW_DEBUG */ -+ pHT_caps_ie = p; -+ -+ ht_cap = _TRUE; -+ network_type |= WIRELESS_11_24N; -+ -+ rtw_ht_use_default_setting(padapter); -+ -+ /* Update HT Capabilities Info field */ -+ if (pmlmepriv->htpriv.sgi_20m == _FALSE) -+ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20); -+ -+ if (pmlmepriv->htpriv.sgi_40m == _FALSE) -+ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_40); -+ -+ if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX)) -+ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_LDPC_CODING); -+ -+ if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) -+ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_TX_STBC); -+ -+ if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX)) -+ pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R); -+ -+ /* Update A-MPDU Parameters field */ -+ pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR | IEEE80211_HT_CAP_AMPDU_DENSITY); -+ -+ if ((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || -+ (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) { -+ rtw_hal_get_def_var(padapter, HW_VAR_BEST_AMPDU_DENSITY, &best_ampdu_density); -+ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & (best_ampdu_density << 2)); -+ } else -+ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & 0x00); -+ -+ rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); -+ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); /* set Max Rx AMPDU size to 64K */ -+ -+ _rtw_memcpy(&(pmlmeinfo->HT_caps), pht_cap, sizeof(struct HT_caps_element)); -+ -+ /* Update Supported MCS Set field */ -+ { -+ u8 rx_nss = 0; -+ int i; -+ -+ rx_nss = GET_HAL_RX_NSS(padapter); -+ -+ /* RX MCS Bitmask */ -+ switch (rx_nss) { -+ case 1: -+ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R); -+ break; -+ case 2: -+ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R); -+ break; -+ case 3: -+ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_3R); -+ break; -+ case 4: -+ set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_4R); -+ break; -+ default: -+ RTW_WARN("rf_type:%d or rx_nss:%u is not expected\n", GET_HAL_RFPATH(padapter), rx_nss); -+ } -+ for (i = 0; i < 10; i++) -+ *(HT_CAP_ELE_RX_MCS_MAP(pht_cap) + i) &= padapter->mlmeextpriv.default_supported_mcs_set[i]; -+ } -+ -+#ifdef CONFIG_BEAMFORMING -+ /* Use registry value to enable HT Beamforming. */ -+ /* ToDo: use configure file to set these capability. */ -+ pht_cap->tx_BF_cap_info = 0; -+ -+ /* HT Beamformer */ -+ if (TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { -+ /* Transmit NDP Capable */ -+ SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(pht_cap, 1); -+ /* Explicit Compressed Steering Capable */ -+ SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pht_cap, 1); -+ /* Compressed Steering Number Antennas */ -+ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, 1); -+ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); -+ SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pht_cap, rf_num); -+ } -+ -+ /* HT Beamformee */ -+ if (TEST_FLAG(pmlmepriv->htpriv.beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) { -+ /* Receive NDP Capable */ -+ SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(pht_cap, 1); -+ /* Explicit Compressed Beamforming Feedback Capable */ -+ SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pht_cap, 2); -+ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); -+ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pht_cap, rf_num); -+ } -+#endif /* CONFIG_BEAMFORMING */ -+ -+ _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p + 2, ie_len); -+#ifdef CONFIG_RTW_DEBUG -+ if (0) { -+ RTW_INFO(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter)); -+ dump_ht_cap_ie_content(RTW_DBGDUMP, p + 2, ie_len); -+ } -+#endif /* CONFIG_RTW_DEBUG */ -+ } -+ -+ /* parsing HT_INFO_IE */ -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) { -+ pHT_info_ie = p; -+ if (channel == 0) -+ pbss_network->Configuration.DSConfig = GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2); -+ else if (channel != GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2)) { -+ RTW_INFO(FUNC_ADPT_FMT" ch inconsistent, DSSS:%u, HT primary:%u\n" -+ , FUNC_ADPT_ARG(padapter), channel, GET_HT_OP_ELE_PRI_CHL(pHT_info_ie + 2)); -+ } -+ } -+ } -+#endif /* CONFIG_80211N_HT */ -+ pmlmepriv->cur_network.network_type = network_type; -+ -+#ifdef CONFIG_80211N_HT -+ pmlmepriv->htpriv.ht_option = _FALSE; -+ -+ if ((psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_TKIP) || -+ (psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_TKIP)) { -+ /* todo: */ -+ /* ht_cap = _FALSE; */ -+ } -+ -+ /* ht_cap */ -+ if (padapter->registrypriv.ht_enable && -+ is_supported_ht(padapter->registrypriv.wireless_mode) && ht_cap == _TRUE) { -+ -+ pmlmepriv->htpriv.ht_option = _TRUE; -+ pmlmepriv->qospriv.qos_option = 1; -+ -+ pmlmepriv->htpriv.ampdu_enable = pregistrypriv->ampdu_enable ? _TRUE : _FALSE; -+ -+ HT_caps_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_caps_ie); -+ -+ HT_info_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_info_ie); -+ } -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ pmlmepriv->ori_vht_en = 0; -+ pmlmepriv->vhtpriv.vht_option = _FALSE; -+ -+ if (pmlmepriv->htpriv.ht_option == _TRUE -+ && pbss_network->Configuration.DSConfig > 14 -+ && REGSTY_IS_11AC_ENABLE(pregistrypriv) -+ && is_supported_vht(pregistrypriv->wireless_mode) -+ && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) -+ ) { -+ /* Parsing VHT CAP IE */ -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) -+ vht_cap = _TRUE; -+ -+ /* Parsing VHT OPERATION IE */ -+ -+ if (vht_cap == _TRUE -+ && MLME_IS_MESH(padapter) /* allow only mesh temporarily before VHT IE checking is ready */ -+ ) { -+ rtw_check_for_vht20(padapter, ie + _BEACON_IE_OFFSET_, pbss_network->IELength - _BEACON_IE_OFFSET_); -+ pmlmepriv->ori_vht_en = 1; -+ pmlmepriv->vhtpriv.vht_option = _TRUE; -+ } else if (REGSTY_IS_11AC_AUTO(pregistrypriv)) { -+ rtw_vht_ies_detach(padapter, pbss_network); -+ rtw_vht_ies_attach(padapter, pbss_network); -+ } -+ } -+ -+ if (pmlmepriv->vhtpriv.vht_option == _FALSE) -+ rtw_vht_ies_detach(padapter, pbss_network); -+#endif /* CONFIG_80211AC_VHT */ -+ -+#ifdef CONFIG_80211N_HT -+ if(padapter->registrypriv.ht_enable && -+ is_supported_ht(padapter->registrypriv.wireless_mode) && -+ pbss_network->Configuration.DSConfig <= 14 && padapter->registrypriv.wifi_spec == 1 && -+ pbss_network->IELength + 10 <= MAX_IE_SZ) { -+ uint len = 0; -+ -+ SET_EXT_CAPABILITY_ELE_BSS_COEXIST(pmlmepriv->ext_capab_ie_data, 1); -+ pmlmepriv->ext_capab_ie_len = 10; -+ rtw_set_ie(pbss_network->IEs + pbss_network->IELength, EID_EXTCapability, 8, pmlmepriv->ext_capab_ie_data, &len); -+ pbss_network->IELength += pmlmepriv->ext_capab_ie_len; -+ } -+#endif /* CONFIG_80211N_HT */ -+ -+ pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network); -+ -+ rtw_ies_get_chbw(pbss_network->IEs + _BEACON_IE_OFFSET_, pbss_network->IELength - _BEACON_IE_OFFSET_ -+ , &pmlmepriv->ori_ch, &pmlmepriv->ori_bw, &pmlmepriv->ori_offset, 1, 1); -+ rtw_warn_on(pmlmepriv->ori_ch == 0); -+ -+ { -+ /* alloc sta_info for ap itself */ -+ -+ struct sta_info *sta; -+ -+ sta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress); -+ if (!sta) { -+ sta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress); -+ if (sta == NULL) -+ return _FAIL; -+ } -+ } -+ -+ rtw_startbss_cmd(padapter, RTW_CMDF_WAIT_ACK); -+ { -+ int sk_band = RTW_GET_SCAN_BAND_SKIP(padapter); -+ -+ if (sk_band) -+ RTW_CLR_SCAN_BAND_SKIP(padapter, sk_band); -+ } -+ -+ rtw_indicate_connect(padapter); -+ -+ pmlmepriv->cur_network.join_res = _TRUE;/* for check if already set beacon */ -+ -+ /* update bc/mc sta_info */ -+ /* update_bmc_sta(padapter); */ -+ -+ return ret; -+ -+} -+ -+#if CONFIG_RTW_MACADDR_ACL -+void rtw_macaddr_acl_init(_adapter *adapter, u8 period) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct wlan_acl_pool *acl; -+ _queue *acl_node_q; -+ int i; -+ _irqL irqL; -+ -+ if (period >= RTW_ACL_PERIOD_NUM) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ acl = &stapriv->acl_list[period]; -+ acl_node_q = &acl->acl_node_q; -+ -+ _rtw_spinlock_init(&(acl_node_q->lock)); -+ -+ _enter_critical_bh(&(acl_node_q->lock), &irqL); -+ _rtw_init_listhead(&(acl_node_q->queue)); -+ acl->num = 0; -+ acl->mode = RTW_ACL_MODE_DISABLED; -+ for (i = 0; i < NUM_ACL; i++) { -+ _rtw_init_listhead(&acl->aclnode[i].list); -+ acl->aclnode[i].valid = _FALSE; -+ } -+ _exit_critical_bh(&(acl_node_q->lock), &irqL); -+} -+ -+static void _rtw_macaddr_acl_deinit(_adapter *adapter, u8 period, bool clear_only) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct wlan_acl_pool *acl; -+ _queue *acl_node_q; -+ _irqL irqL; -+ _list *head, *list; -+ struct rtw_wlan_acl_node *acl_node; -+ -+ if (period >= RTW_ACL_PERIOD_NUM) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ acl = &stapriv->acl_list[period]; -+ acl_node_q = &acl->acl_node_q; -+ -+ _enter_critical_bh(&(acl_node_q->lock), &irqL); -+ head = get_list_head(acl_node_q); -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ acl_node = LIST_CONTAINOR(list, struct rtw_wlan_acl_node, list); -+ list = get_next(list); -+ -+ if (acl_node->valid == _TRUE) { -+ acl_node->valid = _FALSE; -+ rtw_list_delete(&acl_node->list); -+ acl->num--; -+ } -+ } -+ _exit_critical_bh(&(acl_node_q->lock), &irqL); -+ -+ if (!clear_only) -+ _rtw_spinlock_free(&(acl_node_q->lock)); -+ -+ rtw_warn_on(acl->num); -+ acl->mode = RTW_ACL_MODE_DISABLED; -+} -+ -+void rtw_macaddr_acl_deinit(_adapter *adapter, u8 period) -+{ -+ _rtw_macaddr_acl_deinit(adapter, period, 0); -+} -+ -+void rtw_macaddr_acl_clear(_adapter *adapter, u8 period) -+{ -+ _rtw_macaddr_acl_deinit(adapter, period, 1); -+} -+ -+void rtw_set_macaddr_acl(_adapter *adapter, u8 period, int mode) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct wlan_acl_pool *acl; -+ -+ if (period >= RTW_ACL_PERIOD_NUM) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ acl = &stapriv->acl_list[period]; -+ -+ RTW_INFO(FUNC_ADPT_FMT" p=%u, mode=%d\n" -+ , FUNC_ADPT_ARG(adapter), period, mode); -+ -+ acl->mode = mode; -+} -+ -+int rtw_acl_add_sta(_adapter *adapter, u8 period, const u8 *addr) -+{ -+ _irqL irqL; -+ _list *list, *head; -+ u8 existed = 0; -+ int i = -1, ret = 0; -+ struct rtw_wlan_acl_node *acl_node; -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct wlan_acl_pool *acl; -+ _queue *acl_node_q; -+ -+ if (period >= RTW_ACL_PERIOD_NUM) { -+ rtw_warn_on(1); -+ ret = -1; -+ goto exit; -+ } -+ -+ acl = &stapriv->acl_list[period]; -+ acl_node_q = &acl->acl_node_q; -+ -+ _enter_critical_bh(&(acl_node_q->lock), &irqL); -+ -+ head = get_list_head(acl_node_q); -+ list = get_next(head); -+ -+ /* search for existed entry */ -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ acl_node = LIST_CONTAINOR(list, struct rtw_wlan_acl_node, list); -+ list = get_next(list); -+ -+ if (_rtw_memcmp(acl_node->addr, addr, ETH_ALEN)) { -+ if (acl_node->valid == _TRUE) { -+ existed = 1; -+ break; -+ } -+ } -+ } -+ if (existed) -+ goto release_lock; -+ -+ if (acl->num >= NUM_ACL) -+ goto release_lock; -+ -+ /* find empty one and use */ -+ for (i = 0; i < NUM_ACL; i++) { -+ -+ acl_node = &acl->aclnode[i]; -+ if (acl_node->valid == _FALSE) { -+ -+ _rtw_init_listhead(&acl_node->list); -+ _rtw_memcpy(acl_node->addr, addr, ETH_ALEN); -+ acl_node->valid = _TRUE; -+ -+ rtw_list_insert_tail(&acl_node->list, get_list_head(acl_node_q)); -+ acl->num++; -+ break; -+ } -+ } -+ -+release_lock: -+ _exit_critical_bh(&(acl_node_q->lock), &irqL); -+ -+ if (!existed && (i < 0 || i >= NUM_ACL)) -+ ret = -1; -+ -+ RTW_INFO(FUNC_ADPT_FMT" p=%u "MAC_FMT" %s (acl_num=%d)\n" -+ , FUNC_ADPT_ARG(adapter), period, MAC_ARG(addr) -+ , (existed ? "existed" : ((i < 0 || i >= NUM_ACL) ? "no room" : "added")) -+ , acl->num); -+exit: -+ return ret; -+} -+ -+int rtw_acl_remove_sta(_adapter *adapter, u8 period, const u8 *addr) -+{ -+ _irqL irqL; -+ _list *list, *head; -+ int ret = 0; -+ struct rtw_wlan_acl_node *acl_node; -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct wlan_acl_pool *acl; -+ _queue *acl_node_q; -+ u8 is_baddr = is_broadcast_mac_addr(addr); -+ u8 match = 0; -+ -+ if (period >= RTW_ACL_PERIOD_NUM) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ acl = &stapriv->acl_list[period]; -+ acl_node_q = &acl->acl_node_q; -+ -+ _enter_critical_bh(&(acl_node_q->lock), &irqL); -+ -+ head = get_list_head(acl_node_q); -+ list = get_next(head); -+ -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ acl_node = LIST_CONTAINOR(list, struct rtw_wlan_acl_node, list); -+ list = get_next(list); -+ -+ if (is_baddr || _rtw_memcmp(acl_node->addr, addr, ETH_ALEN)) { -+ if (acl_node->valid == _TRUE) { -+ acl_node->valid = _FALSE; -+ rtw_list_delete(&acl_node->list); -+ acl->num--; -+ match = 1; -+ } -+ } -+ } -+ -+ _exit_critical_bh(&(acl_node_q->lock), &irqL); -+ -+ RTW_INFO(FUNC_ADPT_FMT" p=%u "MAC_FMT" %s (acl_num=%d)\n" -+ , FUNC_ADPT_ARG(adapter), period, MAC_ARG(addr) -+ , is_baddr ? "clear all" : (match ? "match" : "no found") -+ , acl->num); -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_RTW_MACADDR_ACL */ -+ -+u8 rtw_ap_set_sta_key(_adapter *adapter, const u8 *addr, u8 alg, const u8 *key, u8 keyid, u8 gk) -+{ -+ struct cmd_priv *cmdpriv = &adapter->cmdpriv; -+ struct cmd_obj *cmd; -+ struct set_stakey_parm *param; -+ u8 res = _SUCCESS; -+ -+ cmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmd == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ param = (struct set_stakey_parm *)rtw_zmalloc(sizeof(struct set_stakey_parm)); -+ if (param == NULL) { -+ rtw_mfree((u8 *) cmd, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmd, param, CMD_SET_STAKEY); -+ -+ _rtw_memcpy(param->addr, addr, ETH_ALEN); -+ param->algorithm = alg; -+ param->keyid = keyid; -+ if (!!(alg & _SEC_TYPE_256_)) -+ _rtw_memcpy(param->key, key, 32); -+ else -+ _rtw_memcpy(param->key, key, 16); -+ param->gk = gk; -+ -+ res = rtw_enqueue_cmd(cmdpriv, cmd); -+ -+exit: -+ return res; -+} -+ -+u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta) -+{ -+ return rtw_ap_set_sta_key(padapter -+ , psta->cmn.mac_addr -+ , psta->dot118021XPrivacy -+ , psta->dot118021x_UncstKey.skey -+ , 0 -+ , 0 -+ ); -+} -+ -+static int rtw_ap_set_key(_adapter *padapter, u8 *key, u8 alg, int keyid, u8 set_tx) -+{ -+ u8 keylen; -+ struct cmd_obj *pcmd; -+ struct setkey_parm *psetkeyparm; -+ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); -+ int res = _SUCCESS; -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ pcmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ psetkeyparm = (struct setkey_parm *)rtw_zmalloc(sizeof(struct setkey_parm)); -+ if (psetkeyparm == NULL) { -+ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); -+ -+ psetkeyparm->keyid = (u8)keyid; -+ if (is_wep_enc(alg)) -+ padapter->securitypriv.key_mask |= BIT(psetkeyparm->keyid); -+ -+ psetkeyparm->algorithm = alg; -+ -+ psetkeyparm->set_tx = set_tx; -+ -+ switch (alg) { -+ case _WEP40_: -+ keylen = 5; -+ break; -+ case _WEP104_: -+ keylen = 13; -+ break; -+ case _GCMP_256_: -+ case _CCMP_256_: -+ keylen = 32; -+ break; -+ case _TKIP_: -+ case _TKIP_WTMIC_: -+ case _AES_: -+ case _GCMP_: -+ default: -+ keylen = 16; -+ } -+ -+ _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); -+ -+ pcmd->cmdcode = CMD_SET_KEY; /*_SetKey_CMD_;*/ -+ pcmd->parmbuf = (u8 *)psetkeyparm; -+ pcmd->cmdsz = (sizeof(struct setkey_parm)); -+ pcmd->rsp = NULL; -+ pcmd->rspsz = 0; -+ -+ -+ _rtw_init_listhead(&pcmd->list); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, pcmd); -+ -+exit: -+ -+ return res; -+} -+ -+int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ return rtw_ap_set_key(padapter, key, alg, keyid, 1); -+} -+ -+int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx) -+{ -+ u8 alg; -+ -+ switch (keylen) { -+ case 5: -+ alg = _WEP40_; -+ break; -+ case 13: -+ alg = _WEP104_; -+ break; -+ default: -+ alg = _NO_PRIVACY_; -+ } -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ return rtw_ap_set_key(padapter, key, alg, keyid, set_tx); -+} -+ -+u8 rtw_ap_bmc_frames_hdl(_adapter *padapter) -+{ -+#define HIQ_XMIT_COUNTS (6) -+ _irqL irqL; -+ struct sta_info *psta_bmc; -+ _list *xmitframe_plist, *xmitframe_phead; -+ struct xmit_frame *pxmitframe = NULL; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ bool update_tim = _FALSE; -+ -+ -+ if (padapter->registrypriv.wifi_spec != 1) -+ return H2C_SUCCESS; -+ -+ -+ psta_bmc = rtw_get_bcmc_stainfo(padapter); -+ if (!psta_bmc) -+ return H2C_SUCCESS; -+ -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ if ((rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, 0)) && (psta_bmc->sleepq_len > 0)) { -+ int tx_counts = 0; -+ -+ _update_beacon(padapter, _TIM_IE_, NULL, _FALSE, 0, "update TIM with TIB=1"); -+ -+ RTW_INFO("sleepq_len of bmc_sta = %d\n", psta_bmc->sleepq_len); -+ -+ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ -+ xmitframe_plist = get_next(xmitframe_plist); -+ -+ rtw_list_delete(&pxmitframe->list); -+ -+ psta_bmc->sleepq_len--; -+ tx_counts++; -+ -+ if (psta_bmc->sleepq_len > 0) -+ pxmitframe->attrib.mdata = 1; -+ else -+ pxmitframe->attrib.mdata = 0; -+ -+ if (tx_counts == HIQ_XMIT_COUNTS) -+ pxmitframe->attrib.mdata = 0; -+ -+ pxmitframe->attrib.triggered = 1; -+ -+ if (xmitframe_hiq_filter(pxmitframe) == _TRUE) -+ pxmitframe->attrib.qsel = QSLT_HIGH;/*HIQ*/ -+ -+ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); -+ -+ if (tx_counts == HIQ_XMIT_COUNTS) -+ break; -+ -+ } -+ -+ } else { -+ if (psta_bmc->sleepq_len == 0) { -+ -+ /*RTW_INFO("sleepq_len of bmc_sta = %d\n", psta_bmc->sleepq_len);*/ -+ -+ if (rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, 0)) -+ update_tim = _TRUE; -+ -+ rtw_tim_map_clear(padapter, pstapriv->tim_bitmap, 0); -+ rtw_tim_map_clear(padapter, pstapriv->sta_dz_bitmap, 0); -+ -+ if (update_tim == _TRUE) { -+ RTW_INFO("clear TIB\n"); -+ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0, "bmc sleepq and HIQ empty"); -+ } -+ } -+ } -+ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ -+#if 0 -+ /* HIQ Check */ -+ rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); -+ -+ while (_FALSE == empty && rtw_get_passing_time_ms(start) < 3000) { -+ rtw_msleep_os(100); -+ rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); -+ } -+ -+ -+ printk("check if hiq empty=%d\n", empty); -+#endif -+ -+ return H2C_SUCCESS; -+} -+ -+#ifdef CONFIG_NATIVEAP_MLME -+ -+static void associated_stainfo_update(_adapter *padapter, struct sta_info *psta, u32 sta_info_type) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ RTW_INFO("%s: "MAC_FMT", updated_type=0x%x\n", __func__, MAC_ARG(psta->cmn.mac_addr), sta_info_type); -+#ifdef CONFIG_80211N_HT -+ if (sta_info_type & STA_INFO_UPDATE_BW) { -+ -+ if ((psta->flags & WLAN_STA_HT) && !psta->ht_20mhz_set) { -+ if (pmlmepriv->sw_to_20mhz) { -+ psta->cmn.bw_mode = CHANNEL_WIDTH_20; -+ /*psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;*/ -+ psta->htpriv.sgi_40m = _FALSE; -+ } else { -+ /*TODO: Switch back to 40MHZ?80MHZ*/ -+ } -+ } -+ } -+#endif /* CONFIG_80211N_HT */ -+ /* -+ if (sta_info_type & STA_INFO_UPDATE_RATE) { -+ -+ } -+ */ -+ -+ if (sta_info_type & STA_INFO_UPDATE_PROTECTION_MODE) -+ VCS_update(padapter, psta); -+ -+ /* -+ if (sta_info_type & STA_INFO_UPDATE_CAP) { -+ -+ } -+ -+ if (sta_info_type & STA_INFO_UPDATE_HT_CAP) { -+ -+ } -+ -+ if (sta_info_type & STA_INFO_UPDATE_VHT_CAP) { -+ -+ } -+ */ -+ -+} -+ -+static void update_bcn_ext_capab_ie(_adapter *padapter) -+{ -+ sint ie_len = 0; -+ unsigned char *pbuf; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); -+ u8 *ie = pnetwork->IEs; -+ u8 null_extcap_data[8] = {0}; -+ -+ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_CAP_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (pbuf && ie_len > 0) -+ rtw_remove_bcn_ie(padapter, pnetwork, _EXT_CAP_IE_); -+ -+ if ((pmlmepriv->ext_capab_ie_len > 0) && -+ (_rtw_memcmp(pmlmepriv->ext_capab_ie_data, null_extcap_data, sizeof(null_extcap_data)) == _FALSE)) -+ rtw_add_bcn_ie(padapter, pnetwork, _EXT_CAP_IE_, pmlmepriv->ext_capab_ie_data, pmlmepriv->ext_capab_ie_len); -+ -+} -+ -+static void update_bcn_erpinfo_ie(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); -+ unsigned char *p, *ie = pnetwork->IEs; -+ u32 len = 0; -+ -+ RTW_INFO("%s, ERP_enable=%d\n", __FUNCTION__, pmlmeinfo->ERP_enable); -+ -+ if (!pmlmeinfo->ERP_enable) -+ return; -+ -+ /* parsing ERP_IE */ -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (p && len > 0) { -+ PNDIS_802_11_VARIABLE_IEs pIE = (PNDIS_802_11_VARIABLE_IEs)p; -+ -+ if (pmlmepriv->num_sta_non_erp == 1) -+ pIE->data[0] |= RTW_ERP_INFO_NON_ERP_PRESENT | RTW_ERP_INFO_USE_PROTECTION; -+ else -+ pIE->data[0] &= ~(RTW_ERP_INFO_NON_ERP_PRESENT | RTW_ERP_INFO_USE_PROTECTION); -+ -+ if (pmlmepriv->num_sta_no_short_preamble > 0) -+ pIE->data[0] |= RTW_ERP_INFO_BARKER_PREAMBLE_MODE; -+ else -+ pIE->data[0] &= ~(RTW_ERP_INFO_BARKER_PREAMBLE_MODE); -+ -+ ERP_IE_handler(padapter, pIE); -+ } -+ -+} -+ -+static void update_bcn_htcap_ie(_adapter *padapter) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+} -+ -+static void update_bcn_htinfo_ie(_adapter *padapter) -+{ -+#ifdef CONFIG_80211N_HT -+ /* -+ u8 beacon_updated = _FALSE; -+ u32 sta_info_update_type = STA_INFO_UPDATE_NONE; -+ */ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); -+ unsigned char *p, *ie = pnetwork->IEs; -+ u32 len = 0; -+ -+ if (pmlmepriv->htpriv.ht_option == _FALSE) -+ return; -+ -+ if (pmlmeinfo->HT_info_enable != 1) -+ return; -+ -+ -+ RTW_INFO("%s current operation mode=0x%X\n", -+ __FUNCTION__, pmlmepriv->ht_op_mode); -+ -+ RTW_INFO("num_sta_40mhz_intolerant(%d), 20mhz_width_req(%d), intolerant_ch_rpt(%d), olbc(%d)\n", -+ pmlmepriv->num_sta_40mhz_intolerant, pmlmepriv->ht_20mhz_width_req, pmlmepriv->ht_intolerant_ch_reported, ATOMIC_READ(&pmlmepriv->olbc)); -+ -+ /*parsing HT_INFO_IE, currently only update ht_op_mode - pht_info->infos[1] & pht_info->infos[2] for wifi logo test*/ -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (p && len > 0) { -+ struct HT_info_element *pht_info = NULL; -+ -+ pht_info = (struct HT_info_element *)(p + 2); -+ -+ /* for STA Channel Width/Secondary Channel Offset*/ -+ if ((pmlmepriv->sw_to_20mhz == 0) && (pmlmeext->cur_channel <= 14)) { -+ if ((pmlmepriv->num_sta_40mhz_intolerant > 0) || (pmlmepriv->ht_20mhz_width_req == _TRUE) -+ || (pmlmepriv->ht_intolerant_ch_reported == _TRUE) || (ATOMIC_READ(&pmlmepriv->olbc) == _TRUE)) { -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(pht_info, 0); -+ SET_HT_OP_ELE_STA_CHL_WIDTH(pht_info, 0); -+ -+ pmlmepriv->sw_to_20mhz = 1; -+ /* -+ sta_info_update_type |= STA_INFO_UPDATE_BW; -+ beacon_updated = _TRUE; -+ */ -+ -+ RTW_INFO("%s:switching to 20Mhz\n", __FUNCTION__); -+ -+ /*TODO : cur_bwmode/cur_ch_offset switches to 20Mhz*/ -+ } -+ } else { -+ -+ if ((pmlmepriv->num_sta_40mhz_intolerant == 0) && (pmlmepriv->ht_20mhz_width_req == _FALSE) -+ && (pmlmepriv->ht_intolerant_ch_reported == _FALSE) && (ATOMIC_READ(&pmlmepriv->olbc) == _FALSE)) { -+ -+ if (pmlmeext->cur_bwmode >= CHANNEL_WIDTH_40) { -+ -+ SET_HT_OP_ELE_STA_CHL_WIDTH(pht_info, 1); -+ -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(pht_info, -+ (pmlmeext->cur_ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ? -+ HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE : HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW); -+ -+ pmlmepriv->sw_to_20mhz = 0; -+ /* -+ sta_info_update_type |= STA_INFO_UPDATE_BW; -+ beacon_updated = _TRUE; -+ */ -+ -+ RTW_INFO("%s:switching back to 40Mhz\n", __FUNCTION__); -+ } -+ } -+ } -+ -+ /* to update ht_op_mode*/ -+ *(u16 *)(pht_info->infos + 1) = cpu_to_le16(pmlmepriv->ht_op_mode); -+ -+ } -+ -+ /*associated_clients_update(padapter, beacon_updated, sta_info_update_type);*/ -+#endif /* CONFIG_80211N_HT */ -+} -+ -+static void update_bcn_rsn_ie(_adapter *padapter) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+} -+ -+static void update_bcn_wpa_ie(_adapter *padapter) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+} -+ -+static void update_bcn_wmm_ie(_adapter *padapter) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+} -+ -+static void update_bcn_wps_ie(_adapter *padapter) -+{ -+ u8 *pwps_ie = NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie = NULL; -+ uint wps_ielen = 0, wps_offset, remainder_ielen; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); -+ unsigned char *ie = pnetwork->IEs; -+ u32 ielen = pnetwork->IELength; -+ -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ pwps_ie = rtw_get_wps_ie(ie + _FIXED_IE_LENGTH_, ielen - _FIXED_IE_LENGTH_, NULL, &wps_ielen); -+ -+ if (pwps_ie == NULL || wps_ielen == 0) -+ return; -+ -+ pwps_ie_src = pmlmepriv->wps_beacon_ie; -+ if (pwps_ie_src == NULL) -+ return; -+ -+ wps_offset = (uint)(pwps_ie - ie); -+ -+ premainder_ie = pwps_ie + wps_ielen; -+ -+ remainder_ielen = ielen - wps_offset - wps_ielen; -+ -+ if (remainder_ielen > 0) { -+ pbackup_remainder_ie = rtw_malloc(remainder_ielen); -+ if (pbackup_remainder_ie) -+ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); -+ } -+ -+ wps_ielen = (uint)pwps_ie_src[1];/* to get ie data len */ -+ if ((wps_offset + wps_ielen + 2 + remainder_ielen) <= MAX_IE_SZ) { -+ _rtw_memcpy(pwps_ie, pwps_ie_src, wps_ielen + 2); -+ pwps_ie += (wps_ielen + 2); -+ -+ if (pbackup_remainder_ie) -+ _rtw_memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen); -+ -+ /* update IELength */ -+ pnetwork->IELength = wps_offset + (wps_ielen + 2) + remainder_ielen; -+ } -+ -+ if (pbackup_remainder_ie) -+ rtw_mfree(pbackup_remainder_ie, remainder_ielen); -+ -+ /* deal with the case without set_tx_beacon_cmd() in update_beacon() */ -+#if defined(CONFIG_INTERRUPT_BASED_TXBCN) || defined(CONFIG_PCI_HCI) -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { -+ u8 sr = 0; -+ rtw_get_wps_attr_content(pwps_ie_src, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8 *)(&sr), NULL); -+ -+ if (sr) { -+ set_fwstate(pmlmepriv, WIFI_UNDER_WPS); -+ RTW_INFO("%s, set WIFI_UNDER_WPS\n", __func__); -+ } else { -+ clr_fwstate(pmlmepriv, WIFI_UNDER_WPS); -+ RTW_INFO("%s, clr WIFI_UNDER_WPS\n", __func__); -+ } -+ } -+#endif -+} -+ -+static void update_bcn_p2p_ie(_adapter *padapter) -+{ -+ -+} -+ -+static void update_bcn_vendor_spec_ie(_adapter *padapter, u8 *oui) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ if (_rtw_memcmp(RTW_WPA_OUI, oui, 4)) -+ update_bcn_wpa_ie(padapter); -+ else if (_rtw_memcmp(WMM_OUI, oui, 4)) -+ update_bcn_wmm_ie(padapter); -+ else if (_rtw_memcmp(WPS_OUI, oui, 4)) -+ update_bcn_wps_ie(padapter); -+ else if (_rtw_memcmp(P2P_OUI, oui, 4)) -+ update_bcn_p2p_ie(padapter); -+ else -+ RTW_INFO("unknown OUI type!\n"); -+ -+ -+} -+ -+void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, u8 flags, const char *tag) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv; -+ struct mlme_ext_priv *pmlmeext; -+ bool updated = 1; /* treat as upadated by default */ -+ -+ if (!padapter) -+ return; -+ -+ pmlmepriv = &(padapter->mlmepriv); -+ pmlmeext = &(padapter->mlmeextpriv); -+ -+ if (pmlmeext->bstart_bss == _FALSE) -+ return; -+ -+ _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); -+ -+ switch (ie_id) { -+ case _TIM_IE_: -+ update_BCNTIM(padapter); -+ break; -+ -+ case _ERPINFO_IE_: -+ update_bcn_erpinfo_ie(padapter); -+ break; -+ -+ case _HT_CAPABILITY_IE_: -+ update_bcn_htcap_ie(padapter); -+ break; -+ -+ case _RSN_IE_2_: -+ update_bcn_rsn_ie(padapter); -+ break; -+ -+ case _HT_ADD_INFO_IE_: -+ update_bcn_htinfo_ie(padapter); -+ break; -+ -+ case _EXT_CAP_IE_: -+ update_bcn_ext_capab_ie(padapter); -+ break; -+ -+#ifdef CONFIG_RTW_MESH -+ case WLAN_EID_MESH_CONFIG: -+ updated = rtw_mesh_update_bss_peering_status(padapter, &(pmlmeext->mlmext_info.network)); -+ updated |= rtw_mesh_update_bss_formation_info(padapter, &(pmlmeext->mlmext_info.network)); -+ updated |= rtw_mesh_update_bss_forwarding_state(padapter, &(pmlmeext->mlmext_info.network)); -+ break; -+#endif -+ -+ case _VENDOR_SPECIFIC_IE_: -+ update_bcn_vendor_spec_ie(padapter, oui); -+ break; -+ -+ case 0xFF: -+ default: -+ break; -+ } -+ -+ if (updated) -+ pmlmepriv->update_bcn = _TRUE; -+ -+ _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); -+ -+#ifndef CONFIG_INTERRUPT_BASED_TXBCN -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_PCI_BCN_POLLING) -+ if (tx && updated) { -+ /* send_beacon(padapter); */ /* send_beacon must execute on TSR level */ -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" ie_id:%u - %s\n", FUNC_ADPT_ARG(padapter), ie_id, tag); -+ if(flags == RTW_CMDF_WAIT_ACK) -+ set_tx_beacon_cmd(padapter, RTW_CMDF_WAIT_ACK); -+ else -+ set_tx_beacon_cmd(padapter, 0); -+ } -+#else -+ { -+ /* PCI will issue beacon when BCN interrupt occurs. */ -+ } -+#endif -+#endif /* !CONFIG_INTERRUPT_BASED_TXBCN */ -+} -+ -+#ifdef CONFIG_80211N_HT -+ -+void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len) -+{ -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 beacon_updated = _FALSE; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ uint frame_body_len = frame_len - sizeof(struct rtw_ieee80211_hdr_3addr); -+ u8 category, action; -+ -+ psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (psta == NULL) -+ return; -+ -+ -+ category = frame_body[0]; -+ action = frame_body[1]; -+ -+ if (frame_body_len > 0) { -+ if ((frame_body[2] == EID_BSSCoexistence) && (frame_body[3] > 0)) { -+ u8 ie_data = frame_body[4]; -+ -+ if (ie_data & RTW_WLAN_20_40_BSS_COEX_40MHZ_INTOL) { -+ if (psta->ht_40mhz_intolerant == 0) { -+ psta->ht_40mhz_intolerant = 1; -+ pmlmepriv->num_sta_40mhz_intolerant++; -+ beacon_updated = _TRUE; -+ } -+ } else if (ie_data & RTW_WLAN_20_40_BSS_COEX_20MHZ_WIDTH_REQ) { -+ if (pmlmepriv->ht_20mhz_width_req == _FALSE) { -+ pmlmepriv->ht_20mhz_width_req = _TRUE; -+ beacon_updated = _TRUE; -+ } -+ } else -+ beacon_updated = _FALSE; -+ } -+ } -+ -+ if (frame_body_len > 8) { -+ /* if EID_BSSIntolerantChlReport ie exists */ -+ if ((frame_body[5] == EID_BSSIntolerantChlReport) && (frame_body[6] > 0)) { -+ /*todo:*/ -+ if (pmlmepriv->ht_intolerant_ch_reported == _FALSE) { -+ pmlmepriv->ht_intolerant_ch_reported = _TRUE; -+ beacon_updated = _TRUE; -+ } -+ } -+ } -+ -+ if (beacon_updated) { -+ -+ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE, 0); -+ -+ associated_stainfo_update(padapter, psta, STA_INFO_UPDATE_BW); -+ } -+ -+ -+ -+} -+ -+void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field) -+{ -+ u8 e_field, m_field; -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ psta = rtw_get_stainfo(pstapriv, ta); -+ if (psta == NULL) -+ return; -+ -+ e_field = (ctrl_field & BIT(0)) ? 1 : 0; /*SM Power Save Enabled*/ -+ m_field = (ctrl_field & BIT(1)) ? 1 : 0; /*SM Mode, 0:static SMPS, 1:dynamic SMPS*/ -+ -+ if (e_field) { -+ if (m_field) { /*mode*/ -+ psta->htpriv.smps_cap = WLAN_HT_CAP_SM_PS_DYNAMIC; -+ RTW_ERR("Don't support dynamic SMPS\n"); -+ } -+ else -+ psta->htpriv.smps_cap = WLAN_HT_CAP_SM_PS_STATIC; -+ } else { -+ /*disable*/ -+ psta->htpriv.smps_cap = WLAN_HT_CAP_SM_PS_DISABLED; -+ } -+ -+ if (psta->htpriv.smps_cap != WLAN_HT_CAP_SM_PS_DYNAMIC) -+ rtw_ssmps_wk_cmd(padapter, psta, e_field, 1); -+} -+ -+/* -+op_mode -+Set to 0 (HT pure) under the followign conditions -+ - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or -+ - all STAs in the BSS are 20 MHz HT in 20 MHz BSS -+Set to 1 (HT non-member protection) if there may be non-HT STAs -+ in both the primary and the secondary channel -+Set to 2 if only HT STAs are associated in BSS, -+ however and at least one 20 MHz HT STA is associated -+Set to 3 (HT mixed mode) when one or more non-HT STAs are associated -+ (currently non-GF HT station is considered as non-HT STA also) -+*/ -+int rtw_ht_operation_update(_adapter *padapter) -+{ -+ u16 cur_op_mode, new_op_mode; -+ int op_mode_changes = 0; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; -+ -+ if (pmlmepriv->htpriv.ht_option == _FALSE) -+ return 0; -+ -+ /*if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) -+ return 0;*/ -+ -+ RTW_INFO("%s current operation mode=0x%X\n", -+ __FUNCTION__, pmlmepriv->ht_op_mode); -+ -+ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) -+ && pmlmepriv->num_sta_ht_no_gf) { -+ pmlmepriv->ht_op_mode |= -+ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; -+ op_mode_changes++; -+ } else if ((pmlmepriv->ht_op_mode & -+ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) && -+ pmlmepriv->num_sta_ht_no_gf == 0) { -+ pmlmepriv->ht_op_mode &= -+ ~HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; -+ op_mode_changes++; -+ } -+ -+ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && -+ (pmlmepriv->num_sta_no_ht || ATOMIC_READ(&pmlmepriv->olbc_ht))) { -+ pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; -+ op_mode_changes++; -+ } else if ((pmlmepriv->ht_op_mode & -+ HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && -+ (pmlmepriv->num_sta_no_ht == 0 && !ATOMIC_READ(&pmlmepriv->olbc_ht))) { -+ pmlmepriv->ht_op_mode &= -+ ~HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; -+ op_mode_changes++; -+ } -+ -+ /* Note: currently we switch to the MIXED op mode if HT non-greenfield -+ * station is associated. Probably it's a theoretical case, since -+ * it looks like all known HT STAs support greenfield. -+ */ -+ new_op_mode = 0; -+ if (pmlmepriv->num_sta_no_ht /*|| -+ (pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)*/) -+ new_op_mode = OP_MODE_MIXED; -+ else if ((phtpriv_ap->ht_cap.cap_info & IEEE80211_HT_CAP_SUP_WIDTH) -+ && pmlmepriv->num_sta_ht_20mhz) -+ new_op_mode = OP_MODE_20MHZ_HT_STA_ASSOCED; -+ else if (ATOMIC_READ(&pmlmepriv->olbc_ht)) -+ new_op_mode = OP_MODE_MAY_BE_LEGACY_STAS; -+ else -+ new_op_mode = OP_MODE_PURE; -+ -+ cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; -+ if (cur_op_mode != new_op_mode) { -+ pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_OP_MODE_MASK; -+ pmlmepriv->ht_op_mode |= new_op_mode; -+ op_mode_changes++; -+ } -+ -+ RTW_INFO("%s new operation mode=0x%X changes=%d\n", -+ __FUNCTION__, pmlmepriv->ht_op_mode, op_mode_changes); -+ -+ return op_mode_changes; -+ -+} -+ -+#endif /* CONFIG_80211N_HT */ -+ -+void associated_clients_update(_adapter *padapter, u8 updated, u32 sta_info_type) -+{ -+ /* update associcated stations cap. */ -+ if (updated == _TRUE) { -+ _irqL irqL; -+ _list *phead, *plist; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ /* check asoc_queue */ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ -+ plist = get_next(plist); -+ -+ associated_stainfo_update(padapter, psta, sta_info_type); -+ } -+ -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ } -+ -+} -+ -+/* called > TSR LEVEL for USB or SDIO Interface*/ -+void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta) -+{ -+ u8 beacon_updated = _FALSE; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ -+ -+#if 0 -+ if (!(psta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && -+ !psta->no_short_preamble_set) { -+ psta->no_short_preamble_set = 1; -+ pmlmepriv->num_sta_no_short_preamble++; -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_preamble == 1)) -+ ieee802_11_set_beacons(hapd->iface); -+ } -+#endif -+ -+ -+ if (!(psta->flags & WLAN_STA_SHORT_PREAMBLE)) { -+ if (!psta->no_short_preamble_set) { -+ psta->no_short_preamble_set = 1; -+ -+ pmlmepriv->num_sta_no_short_preamble++; -+ -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_preamble == 1)) -+ beacon_updated = _TRUE; -+ } -+ } else { -+ if (psta->no_short_preamble_set) { -+ psta->no_short_preamble_set = 0; -+ -+ pmlmepriv->num_sta_no_short_preamble--; -+ -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_preamble == 0)) -+ beacon_updated = _TRUE; -+ } -+ } -+ -+#if 0 -+ if (psta->flags & WLAN_STA_NONERP && !psta->nonerp_set) { -+ psta->nonerp_set = 1; -+ pmlmepriv->num_sta_non_erp++; -+ if (pmlmepriv->num_sta_non_erp == 1) -+ ieee802_11_set_beacons(hapd->iface); -+ } -+#endif -+ -+ if (psta->flags & WLAN_STA_NONERP) { -+ if (!psta->nonerp_set) { -+ psta->nonerp_set = 1; -+ -+ pmlmepriv->num_sta_non_erp++; -+ -+ if (pmlmepriv->num_sta_non_erp == 1) { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, _ERPINFO_IE_, NULL, _FALSE, 0); -+ } -+ } -+ -+ } else { -+ if (psta->nonerp_set) { -+ psta->nonerp_set = 0; -+ -+ pmlmepriv->num_sta_non_erp--; -+ -+ if (pmlmepriv->num_sta_non_erp == 0) { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, _ERPINFO_IE_, NULL, _FALSE, 0); -+ } -+ } -+ -+ } -+ -+ -+#if 0 -+ if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT) && -+ !psta->no_short_slot_time_set) { -+ psta->no_short_slot_time_set = 1; -+ pmlmepriv->num_sta_no_short_slot_time++; -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_slot_time == 1)) -+ ieee802_11_set_beacons(hapd->iface); -+ } -+#endif -+ -+ if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT)) { -+ if (!psta->no_short_slot_time_set) { -+ psta->no_short_slot_time_set = 1; -+ -+ pmlmepriv->num_sta_no_short_slot_time++; -+ -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_slot_time == 1)) -+ beacon_updated = _TRUE; -+ } -+ } else { -+ if (psta->no_short_slot_time_set) { -+ psta->no_short_slot_time_set = 0; -+ -+ pmlmepriv->num_sta_no_short_slot_time--; -+ -+ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && -+ (pmlmepriv->num_sta_no_short_slot_time == 0)) -+ beacon_updated = _TRUE; -+ } -+ } -+ -+#ifdef CONFIG_80211N_HT -+ if(padapter->registrypriv.ht_enable && -+ is_supported_ht(padapter->registrypriv.wireless_mode)) { -+ if (psta->flags & WLAN_STA_HT) { -+ u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); -+ -+ RTW_INFO("HT: STA " MAC_FMT " HT Capabilities Info: 0x%04x\n", -+ MAC_ARG(psta->cmn.mac_addr), ht_capab); -+ -+ if (psta->no_ht_set) { -+ psta->no_ht_set = 0; -+ pmlmepriv->num_sta_no_ht--; -+ } -+ -+ if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { -+ if (!psta->no_ht_gf_set) { -+ psta->no_ht_gf_set = 1; -+ pmlmepriv->num_sta_ht_no_gf++; -+ } -+ RTW_INFO("%s STA " MAC_FMT " - no " -+ "greenfield, num of non-gf stations %d\n", -+ __FUNCTION__, MAC_ARG(psta->cmn.mac_addr), -+ pmlmepriv->num_sta_ht_no_gf); -+ } -+ -+ if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { -+ if (!psta->ht_20mhz_set) { -+ psta->ht_20mhz_set = 1; -+ pmlmepriv->num_sta_ht_20mhz++; -+ } -+ RTW_INFO("%s STA " MAC_FMT " - 20 MHz HT, " -+ "num of 20MHz HT STAs %d\n", -+ __FUNCTION__, MAC_ARG(psta->cmn.mac_addr), -+ pmlmepriv->num_sta_ht_20mhz); -+ } -+ -+ if (((ht_capab & RTW_IEEE80211_HT_CAP_40MHZ_INTOLERANT) != 0) && -+ (psta->ht_40mhz_intolerant == 0)) { -+ psta->ht_40mhz_intolerant = 1; -+ pmlmepriv->num_sta_40mhz_intolerant++; -+ RTW_INFO("%s STA " MAC_FMT " - 40MHZ_INTOLERANT, ", -+ __FUNCTION__, MAC_ARG(psta->cmn.mac_addr)); -+ } -+ -+ } else { -+ if (!psta->no_ht_set) { -+ psta->no_ht_set = 1; -+ pmlmepriv->num_sta_no_ht++; -+ } -+ if (pmlmepriv->htpriv.ht_option == _TRUE) { -+ RTW_INFO("%s STA " MAC_FMT -+ " - no HT, num of non-HT stations %d\n", -+ __FUNCTION__, MAC_ARG(psta->cmn.mac_addr), -+ pmlmepriv->num_sta_no_ht); -+ } -+ } -+ -+ if (rtw_ht_operation_update(padapter) > 0) { -+ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE, 0); -+ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE, 0); -+ beacon_updated = _TRUE; -+ } -+ } -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ update_beacon(padapter, WLAN_EID_MESH_CONFIG, NULL, _FALSE, 0); -+ if (pstapriv->asoc_list_cnt == 1) -+ _set_timer(&padapter->mesh_atlm_param_req_timer, 0); -+ beacon_updated = _TRUE; -+ } -+#endif -+ -+ if (beacon_updated) -+ update_beacon(padapter, 0xFF, NULL, _TRUE, 0); -+ -+ /* update associcated stations cap. */ -+ associated_clients_update(padapter, beacon_updated, STA_INFO_UPDATE_ALL); -+ -+ RTW_INFO("%s, updated=%d\n", __func__, beacon_updated); -+ -+} -+ -+u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta) -+{ -+ u8 beacon_updated = _FALSE; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ -+ if (!psta) -+ return beacon_updated; -+ -+ if (rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, psta->cmn.aid)) { -+ rtw_tim_map_clear(padapter, pstapriv->tim_bitmap, psta->cmn.aid); -+ beacon_updated = _TRUE; -+ update_beacon(padapter, _TIM_IE_, NULL, _FALSE, 0); -+ } -+ -+ if (psta->no_short_preamble_set) { -+ psta->no_short_preamble_set = 0; -+ pmlmepriv->num_sta_no_short_preamble--; -+ if (pmlmeext->cur_wireless_mode > WIRELESS_11B -+ && pmlmepriv->num_sta_no_short_preamble == 0) -+ beacon_updated = _TRUE; -+ } -+ -+ if (psta->nonerp_set) { -+ psta->nonerp_set = 0; -+ pmlmepriv->num_sta_non_erp--; -+ if (pmlmepriv->num_sta_non_erp == 0) { -+ beacon_updated = _TRUE; -+ update_beacon(padapter, _ERPINFO_IE_, NULL, _FALSE, 0); -+ } -+ } -+ -+ if (psta->no_short_slot_time_set) { -+ psta->no_short_slot_time_set = 0; -+ pmlmepriv->num_sta_no_short_slot_time--; -+ if (pmlmeext->cur_wireless_mode > WIRELESS_11B -+ && pmlmepriv->num_sta_no_short_slot_time == 0) -+ beacon_updated = _TRUE; -+ } -+ -+#ifdef CONFIG_80211N_HT -+ if (psta->no_ht_gf_set) { -+ psta->no_ht_gf_set = 0; -+ pmlmepriv->num_sta_ht_no_gf--; -+ } -+ -+ if (psta->no_ht_set) { -+ psta->no_ht_set = 0; -+ pmlmepriv->num_sta_no_ht--; -+ } -+ -+ if (psta->ht_20mhz_set) { -+ psta->ht_20mhz_set = 0; -+ pmlmepriv->num_sta_ht_20mhz--; -+ } -+ -+ if (psta->ht_40mhz_intolerant) { -+ psta->ht_40mhz_intolerant = 0; -+ if (pmlmepriv->num_sta_40mhz_intolerant > 0) -+ pmlmepriv->num_sta_40mhz_intolerant--; -+ else -+ rtw_warn_on(1); -+ } -+ -+ if (rtw_ht_operation_update(padapter) > 0) { -+ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE, 0); -+ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _FALSE, 0); -+ } -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ update_beacon(padapter, WLAN_EID_MESH_CONFIG, NULL, _FALSE, 0); -+ if (pstapriv->asoc_list_cnt == 0) -+ _cancel_timer_ex(&padapter->mesh_atlm_param_req_timer); -+ beacon_updated = _TRUE; -+ } -+#endif -+ -+ if (beacon_updated == _TRUE) -+ update_beacon(padapter, 0xFF, NULL, _TRUE, 0); -+ -+#if 0 -+ /* update associated stations cap. */ -+ associated_clients_update(padapter, beacon_updated, STA_INFO_UPDATE_ALL); /* move it to avoid deadlock */ -+#endif -+ -+ RTW_INFO("%s, updated=%d\n", __func__, beacon_updated); -+ -+ return beacon_updated; -+ -+} -+ -+u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason, bool enqueue) -+{ -+ _irqL irqL; -+ u8 beacon_updated = _FALSE; -+ -+ if (!psta) -+ return beacon_updated; -+ -+ if (active == _TRUE) { -+#ifdef CONFIG_80211N_HT -+ /* tear down Rx AMPDU */ -+ send_delba(padapter, 0, psta->cmn.mac_addr);/* recipient */ -+ -+ /* tear down TX AMPDU */ -+ send_delba(padapter, 1, psta->cmn.mac_addr);/* */ /* originator */ -+ -+#endif /* CONFIG_80211N_HT */ -+ -+ if (!MLME_IS_MESH(padapter)) -+ issue_deauth(padapter, psta->cmn.mac_addr, reason); -+ } -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) -+ rtw_mesh_path_flush_by_nexthop(psta); -+#endif -+ -+#ifdef CONFIG_BEAMFORMING -+ beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, psta->cmn.mac_addr, ETH_ALEN, 1); -+#endif -+ -+#ifdef CONFIG_80211N_HT -+ psta->htpriv.agg_enable_bitmap = 0x0;/* reset */ -+ psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */ -+#endif -+ -+ -+ -+ _enter_critical_bh(&psta->lock, &irqL); -+ psta->state &= ~(WIFI_ASOC_STATE | WIFI_UNDER_KEY_HANDSHAKE); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if ((psta->auth_len != 0) && (psta->pauth_frame != NULL)) { -+ rtw_mfree(psta->pauth_frame, psta->auth_len); -+ psta->pauth_frame = NULL; -+ psta->auth_len = 0; -+ } -+ if (psta->passoc_req && psta->assoc_req_len > 0) { -+ rtw_mfree(psta->passoc_req , psta->assoc_req_len); -+ psta->passoc_req = NULL; -+ psta->assoc_req_len = 0; -+ } -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ _exit_critical_bh(&psta->lock, &irqL); -+ -+ if (!MLME_IS_MESH(padapter)) { -+ #ifdef CONFIG_RTW_WDS -+ rtw_wds_path_flush_by_nexthop(psta); -+ #endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ #ifdef COMPAT_KERNEL_RELEASE -+ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->cmn.mac_addr, reason); -+ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) -+ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->cmn.mac_addr, reason); -+ #else /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) */ -+ /* will call rtw_cfg80211_indicate_sta_disassoc() in cmd_thread for old API context */ -+ #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) */ -+#else -+ rtw_indicate_sta_disassoc_event(padapter, psta); -+#endif -+ } -+ -+ beacon_updated = bss_cap_update_on_sta_leave(padapter, psta); -+ -+ report_del_sta_event(padapter, psta->cmn.mac_addr, reason, enqueue, _FALSE); -+ -+ /* clear cam entry / key */ -+ rtw_clearstakey_cmd(padapter, psta, enqueue); -+ -+ return beacon_updated; -+ -+} -+ -+int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ int ret = 0; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) -+ return ret; -+ -+ RTW_INFO(FUNC_NDEV_FMT" with ch:%u, offset:%u\n", -+ FUNC_NDEV_ARG(padapter->pnetdev), new_ch, ch_offset); -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ /* for each sta in asoc_queue */ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ -+ issue_action_spct_ch_switch(padapter, psta->cmn.mac_addr, new_ch, ch_offset); -+ psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2); -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ issue_action_spct_ch_switch(padapter, bc_addr, new_ch, ch_offset); -+ -+ return ret; -+} -+ -+int rtw_sta_flush(_adapter *padapter, bool enqueue) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ int ret = 0; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 flush_num = 0; -+ char flush_list[NUM_STA]; -+ int i; -+ -+ if (!MLME_IS_AP(padapter) && !MLME_IS_MESH(padapter)) -+ return ret; -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev)); -+ -+ /* pick sta from sta asoc_queue */ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ int stainfo_offset; -+ -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (psta->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt--; -+ #endif -+ STA_SET_MESH_PLINK(psta, NULL); -+ -+ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ flush_list[flush_num++] = stainfo_offset; -+ else -+ rtw_warn_on(1); -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ /* call ap_free_sta() for each sta picked */ -+ for (i = 0; i < flush_num; i++) { -+ u8 sta_addr[ETH_ALEN]; -+ -+ psta = rtw_get_stainfo_by_offset(pstapriv, flush_list[i]); -+ _rtw_memcpy(sta_addr, psta->cmn.mac_addr, ETH_ALEN); -+ -+ ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, enqueue); -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) -+ rtw_mesh_expire_peer(padapter, sta_addr); -+ #endif -+ } -+ -+ if (!MLME_IS_MESH(padapter)) -+ issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING); -+ -+ associated_clients_update(padapter, _TRUE, STA_INFO_UPDATE_ALL); -+ -+ return ret; -+} -+ -+/* called > TSR LEVEL for USB or SDIO Interface*/ -+void sta_info_update(_adapter *padapter, struct sta_info *psta) -+{ -+ int flags = psta->flags; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ -+ /* update wmm cap. */ -+ if (WLAN_STA_WME & flags) -+ psta->qos_option = 1; -+ else -+ psta->qos_option = 0; -+ -+ if (pmlmepriv->qospriv.qos_option == 0) -+ psta->qos_option = 0; -+ -+ -+#ifdef CONFIG_80211N_HT -+ /* update 802.11n ht cap. */ -+ if (WLAN_STA_HT & flags) { -+ psta->htpriv.ht_option = _TRUE; -+ psta->qos_option = 1; -+ -+ psta->htpriv.smps_cap = (psta->htpriv.ht_cap.cap_info & IEEE80211_HT_CAP_SM_PS) >> 2; -+ } else -+ psta->htpriv.ht_option = _FALSE; -+ -+ if (pmlmepriv->htpriv.ht_option == _FALSE) -+ psta->htpriv.ht_option = _FALSE; -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ /* update 802.11AC vht cap. */ -+ if (WLAN_STA_VHT & flags) -+ psta->vhtpriv.vht_option = _TRUE; -+ else -+ psta->vhtpriv.vht_option = _FALSE; -+ -+ if (pmlmepriv->vhtpriv.vht_option == _FALSE) -+ psta->vhtpriv.vht_option = _FALSE; -+#endif -+ -+ update_sta_info_apmode(padapter, psta); -+} -+ -+/* called >= TSR LEVEL for USB or SDIO Interface*/ -+void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta) -+{ -+ if (psta->state & WIFI_ASOC_STATE) -+ rtw_hal_update_ra_mask(psta); /* DM_RATR_STA_INIT */ -+} -+/* restore hw setting from sw data structures */ -+void rtw_ap_restore_network(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ _irqL irqL; -+ _list *phead, *plist; -+ u8 chk_alive_num = 0; -+ char chk_alive_list[NUM_STA]; -+ int i; -+ -+ rtw_setopmode_cmd(padapter -+ , MLME_IS_AP(padapter) ? Ndis802_11APMode : Ndis802_11_mesh -+ , RTW_CMDF_DIRECTLY -+ ); -+ -+ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); -+ -+ rtw_startbss_cmd(padapter, RTW_CMDF_DIRECTLY); -+ -+ if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || -+ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) { -+ /* restore group key, WEP keys is restored in ips_leave() */ -+ rtw_set_key(padapter, psecuritypriv, psecuritypriv->dot118021XGrpKeyid, 0, _FALSE); -+ } -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ int stainfo_offset; -+ -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ -+ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ chk_alive_list[chk_alive_num++] = stainfo_offset; -+ } -+ -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ for (i = 0; i < chk_alive_num; i++) { -+ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); -+ -+ if (psta == NULL) -+ RTW_INFO(FUNC_ADPT_FMT" sta_info is null\n", FUNC_ADPT_ARG(padapter)); -+ else if (psta->state & WIFI_ASOC_STATE) { -+ rtw_sta_media_status_rpt(padapter, psta, 1); -+ Update_RA_Entry(padapter, psta); -+ /* pairwise key */ -+ /* per sta pairwise key and settings */ -+ if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || -+ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) -+ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY, _FALSE); -+ } -+ } -+ -+} -+ -+void start_ap_mode(_adapter *padapter) -+{ -+ int i; -+ struct sta_info *psta = NULL; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ pmlmepriv->update_bcn = _FALSE; -+ -+ /*init_mlme_ap_info(padapter);*/ -+ -+ pmlmeext->bstart_bss = _FALSE; -+ -+ pmlmepriv->num_sta_non_erp = 0; -+ -+ pmlmepriv->num_sta_no_short_slot_time = 0; -+ -+ pmlmepriv->num_sta_no_short_preamble = 0; -+ -+ pmlmepriv->num_sta_ht_no_gf = 0; -+#ifdef CONFIG_80211N_HT -+ pmlmepriv->num_sta_no_ht = 0; -+#endif /* CONFIG_80211N_HT */ -+ pmlmeinfo->HT_info_enable = 0; -+ pmlmeinfo->HT_caps_enable = 0; -+ pmlmeinfo->HT_enable = 0; -+ -+ pmlmepriv->num_sta_ht_20mhz = 0; -+ pmlmepriv->num_sta_40mhz_intolerant = 0; -+ ATOMIC_SET(&pmlmepriv->olbc, _FALSE); -+ ATOMIC_SET(&pmlmepriv->olbc_ht, _FALSE); -+ -+#ifdef CONFIG_80211N_HT -+ pmlmepriv->ht_20mhz_width_req = _FALSE; -+ pmlmepriv->ht_intolerant_ch_reported = _FALSE; -+ pmlmepriv->ht_op_mode = 0; -+ pmlmepriv->sw_to_20mhz = 0; -+#endif -+ -+ _rtw_memset(pmlmepriv->ext_capab_ie_data, 0, sizeof(pmlmepriv->ext_capab_ie_data)); -+ pmlmepriv->ext_capab_ie_len = 0; -+ -+ psecuritypriv->dot118021x_bmc_cam_id = INVALID_SEC_MAC_CAM_ID; -+ -+ for (i = 0 ; i < pstapriv->max_aid; i++) -+ pstapriv->sta_aid[i] = NULL; -+ -+#ifdef CONFIG_RTW_WDS -+ if (MLME_IS_AP(padapter)) -+ rtw_wds_pathtbl_init(padapter); -+#endif -+ -+ psta = rtw_get_bcmc_stainfo(padapter); -+ /*_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);*/ -+ if (psta) -+ rtw_free_stainfo(padapter, psta); -+ /*_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);*/ -+ -+ rtw_init_bcmc_stainfo(padapter); -+ -+ if (rtw_mi_get_ap_num(padapter)) -+ RTW_SET_SCAN_BAND_SKIP(padapter, BAND_5G); -+ -+} -+ -+void stop_ap_mode(_adapter *padapter) -+{ -+ u8 self_action = MLME_ACTION_UNKNOWN; -+ struct sta_info *psta = NULL; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+#ifdef CONFIG_SUPPORT_MULTI_BCN -+ struct dvobj_priv *pdvobj = padapter->dvobj; -+ _irqL irqL; -+#endif -+ -+ RTW_INFO("%s -"ADPT_FMT"\n", __func__, ADPT_ARG(padapter)); -+ -+ if (MLME_IS_AP(padapter)) -+ self_action = MLME_AP_STOPPED; -+ else if (MLME_IS_MESH(padapter)) -+ self_action = MLME_MESH_STOPPED; -+ else -+ rtw_warn_on(1); -+ -+ pmlmepriv->update_bcn = _FALSE; -+ /*pmlmeext->bstart_bss = _FALSE;*/ -+ padapter->netif_up = _FALSE; -+ /* _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); */ -+ -+ /* reset and init security priv , this can refine with rtw_reset_securitypriv */ -+ _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof(struct security_priv)); -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; -+ -+#ifdef CONFIG_DFS_MASTER -+ rtw_dfs_rd_en_decision(padapter, self_action, 0); -+#endif -+ -+ rtw_rfctl_update_op_mode(adapter_to_rfctl(padapter), BIT(padapter->iface_id), 0); -+ -+ /* free scan queue */ -+ rtw_free_network_queue(padapter, _TRUE); -+ -+#if CONFIG_RTW_MACADDR_ACL -+ rtw_macaddr_acl_clear(padapter, RTW_ACL_PERIOD_BSS); -+#endif -+ -+ rtw_sta_flush(padapter, _TRUE); -+ -+ /* free_assoc_sta_resources */ -+ rtw_free_all_stainfo(padapter); -+ -+ psta = rtw_get_bcmc_stainfo(padapter); -+ if (psta) { -+ rtw_sta_mstatus_disc_rpt(padapter, psta->cmn.mac_id); -+ /* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ rtw_free_stainfo(padapter, psta); -+ /*_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);*/ -+ } -+ -+ pmlmepriv->ap_isolate = 0; -+#ifdef CONFIG_RTW_WDS -+ adapter_set_use_wds(padapter, 0); -+#endif -+#ifdef CONFIG_RTW_MULTI_AP -+ padapter->multi_ap = 0; -+#endif -+ rtw_free_mlme_priv_ie_data(pmlmepriv); -+ -+#ifdef CONFIG_SUPPORT_MULTI_BCN -+ if (pmlmeext->bstart_bss == _TRUE) { -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ u8 free_apid = CONFIG_LIMITED_AP_NUM; -+ #endif -+ -+ _enter_critical_bh(&pdvobj->ap_if_q.lock, &irqL); -+ pdvobj->nr_ap_if--; -+ if (pdvobj->nr_ap_if > 0) -+ pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL / pdvobj->nr_ap_if; -+ else -+ pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL; -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ rtw_ap_release_vapid(pdvobj, padapter->vap_id); -+ free_apid = padapter->vap_id; -+ padapter->vap_id = CONFIG_LIMITED_AP_NUM; -+ #endif -+ rtw_list_delete(&padapter->list); -+ _exit_critical_bh(&pdvobj->ap_if_q.lock, &irqL); -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ rtw_ap_mbid_bcn_dis(padapter, free_apid); -+ #endif -+ -+ #ifdef CONFIG_SWTIMER_BASED_TXBCN -+ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pdvobj->inter_bcn_space)); -+ -+ if (pdvobj->nr_ap_if == 0) -+ _cancel_timer_ex(&pdvobj->txbcn_timer); -+ #endif -+ } -+#endif -+ -+ pmlmeext->bstart_bss = _FALSE; -+ -+ rtw_hal_rcr_set_chk_bssid(padapter, self_action); -+ -+#ifdef CONFIG_HW_P0_TSF_SYNC -+ correct_TSF(padapter, self_action); -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_MediaStatusNotify(padapter, 0); /* disconnect */ -+#endif -+ -+#ifdef CONFIG_RTW_WDS -+ if (MLME_IS_AP(padapter)) -+ rtw_wds_pathtbl_unregister(padapter); -+#endif -+} -+ -+#endif /* CONFIG_NATIVEAP_MLME */ -+ -+void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset) -+{ -+#define UPDATE_VHT_CAP 1 -+#define UPDATE_HT_CAP 1 -+#ifdef CONFIG_80211AC_VHT -+ struct vht_priv *vhtpriv = &adapter->mlmepriv.vhtpriv; -+#endif -+ { -+ u8 *p; -+ int ie_len; -+ u8 old_ch = bss->Configuration.DSConfig; -+ bool change_band = _FALSE; -+ -+ if ((ch <= 14 && old_ch >= 36) || (ch >= 36 && old_ch <= 14)) -+ change_band = _TRUE; -+ -+ /* update channel in IE */ -+ p = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); -+ if (p && ie_len > 0) -+ *(p + 2) = ch; -+ -+ bss->Configuration.DSConfig = ch; -+ -+ /* band is changed, update ERP, support rate, ext support rate IE */ -+ if (change_band == _TRUE) -+ change_band_update_ie(adapter, bss, ch); -+ } -+ -+#ifdef CONFIG_80211AC_VHT -+ if (vhtpriv->vht_option == _TRUE) { -+ u8 *vht_cap_ie, *vht_op_ie; -+ int vht_cap_ielen, vht_op_ielen; -+ u8 center_freq; -+ -+ vht_cap_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTCapability, &vht_cap_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); -+ vht_op_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_VHTOperation, &vht_op_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); -+ center_freq = rtw_get_center_ch(ch, bw, offset); -+ -+ /* update vht cap ie */ -+ if (vht_cap_ie && vht_cap_ielen) { -+ #if UPDATE_VHT_CAP -+ /* if ((bw == CHANNEL_WIDTH_160 || bw == CHANNEL_WIDTH_80_80) && pvhtpriv->sgi_160m) -+ SET_VHT_CAPABILITY_ELE_SHORT_GI160M(pvht_cap_ie + 2, 1); -+ else */ -+ SET_VHT_CAPABILITY_ELE_SHORT_GI160M(vht_cap_ie + 2, 0); -+ -+ if (bw >= CHANNEL_WIDTH_80 && vhtpriv->sgi_80m) -+ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(vht_cap_ie + 2, 1); -+ else -+ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(vht_cap_ie + 2, 0); -+ #endif -+ } -+ -+ /* update vht op ie */ -+ if (vht_op_ie && vht_op_ielen) { -+ if (bw < CHANNEL_WIDTH_80) { -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); -+ } else if (bw == CHANNEL_WIDTH_80) { -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 1); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, center_freq); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); -+ } else { -+ RTW_ERR(FUNC_ADPT_FMT" unsupported BW:%u\n", FUNC_ADPT_ARG(adapter), bw); -+ rtw_warn_on(1); -+ } -+ } -+ } -+#endif /* CONFIG_80211AC_VHT */ -+#ifdef CONFIG_80211N_HT -+ { -+ struct ht_priv *htpriv = &adapter->mlmepriv.htpriv; -+ u8 *ht_cap_ie, *ht_op_ie; -+ int ht_cap_ielen, ht_op_ielen; -+ -+ ht_cap_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_HTCapability, &ht_cap_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); -+ ht_op_ie = rtw_get_ie((bss->IEs + sizeof(NDIS_802_11_FIXED_IEs)), EID_HTInfo, &ht_op_ielen, (bss->IELength - sizeof(NDIS_802_11_FIXED_IEs))); -+ -+ /* update ht cap ie */ -+ if (ht_cap_ie && ht_cap_ielen) { -+ #if UPDATE_HT_CAP -+ if (bw >= CHANNEL_WIDTH_40) -+ SET_HT_CAP_ELE_CHL_WIDTH(ht_cap_ie + 2, 1); -+ else -+ SET_HT_CAP_ELE_CHL_WIDTH(ht_cap_ie + 2, 0); -+ -+ if (bw >= CHANNEL_WIDTH_40 && htpriv->sgi_40m) -+ SET_HT_CAP_ELE_SHORT_GI40M(ht_cap_ie + 2, 1); -+ else -+ SET_HT_CAP_ELE_SHORT_GI40M(ht_cap_ie + 2, 0); -+ -+ if (htpriv->sgi_20m) -+ SET_HT_CAP_ELE_SHORT_GI20M(ht_cap_ie + 2, 1); -+ else -+ SET_HT_CAP_ELE_SHORT_GI20M(ht_cap_ie + 2, 0); -+ #endif -+ } -+ -+ /* update ht op ie */ -+ if (ht_op_ie && ht_op_ielen) { -+ SET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2, ch); -+ switch (offset) { -+ case HAL_PRIME_CHNL_OFFSET_LOWER: -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCA); -+ break; -+ case HAL_PRIME_CHNL_OFFSET_UPPER: -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCB); -+ break; -+ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: -+ default: -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2, SCN); -+ break; -+ } -+ -+ if (bw >= CHANNEL_WIDTH_40) -+ SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2, 1); -+ else -+ SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2, 0); -+ } -+ } -+#endif /* CONFIG_80211N_HT */ -+} -+ -+static u8 rtw_ap_update_chbw_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp -+ , u8 cur_ie_ch[], u8 cur_ie_bw[], u8 cur_ie_offset[] -+ , u8 dec_ch[], u8 dec_bw[], u8 dec_offset[] -+ , const char *caller) -+{ -+ _adapter *iface; -+ struct mlme_ext_priv *mlmeext; -+ WLAN_BSSID_EX *network; -+ u8 ifbmp_ch_changed = 0; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) -+ continue; -+ -+ iface = dvobj->padapters[i]; -+ mlmeext = &(iface->mlmeextpriv); -+ -+ if (MLME_IS_ASOC(iface)) { -+ RTW_INFO(FUNC_ADPT_FMT" %u,%u,%u => %u,%u,%u%s\n", caller, ADPT_ARG(iface) -+ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset -+ , dec_ch[i], dec_bw[i], dec_offset[i] -+ , MLME_IS_OPCH_SW(iface) ? " OPCH_SW" : ""); -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT" %u,%u,%u => %u,%u,%u%s\n", caller, ADPT_ARG(iface) -+ , cur_ie_ch[i], cur_ie_bw[i], cur_ie_offset[i] -+ , dec_ch[i], dec_bw[i], dec_offset[i] -+ , MLME_IS_OPCH_SW(iface) ? " OPCH_SW" : ""); -+ } -+ } -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) -+ continue; -+ -+ iface = dvobj->padapters[i]; -+ mlmeext = &(iface->mlmeextpriv); -+ network = &(mlmeext->mlmext_info.network); -+ -+ /* ch setting differs from mlmeext.network IE */ -+ if (cur_ie_ch[i] != dec_ch[i] -+ || cur_ie_bw[i] != dec_bw[i] -+ || cur_ie_offset[i] != dec_offset[i]) -+ ifbmp_ch_changed |= BIT(i); -+ -+ /* ch setting differs from existing one */ -+ if (MLME_IS_ASOC(iface) -+ && (mlmeext->cur_channel != dec_ch[i] -+ || mlmeext->cur_bwmode != dec_bw[i] -+ || mlmeext->cur_ch_offset != dec_offset[i]) -+ ) { -+ if (rtw_linked_check(iface) == _TRUE) { -+ #ifdef CONFIG_SPCT_CH_SWITCH -+ if (1) -+ rtw_ap_inform_ch_switch(iface, dec_ch[i], dec_offset[i]); -+ else -+ #endif -+ rtw_sta_flush(iface, _FALSE); -+ } -+ } -+ -+ mlmeext->cur_channel = dec_ch[i]; -+ mlmeext->cur_bwmode = dec_bw[i]; -+ mlmeext->cur_ch_offset = dec_offset[i]; -+ -+ rtw_ap_update_bss_chbw(iface, network, dec_ch[i], dec_bw[i], dec_offset[i]); -+ } -+ -+ return ifbmp_ch_changed; -+} -+ -+static u8 rtw_ap_ch_specific_chk(_adapter *adapter, u8 ch, u8 *bw, u8 *offset, const char *caller) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ int ch_idx; -+ u8 ret = _SUCCESS; -+ -+ ch_idx = rtw_chset_search_ch(chset, ch); -+ if (ch_idx < 0) { -+ RTW_WARN("%s ch:%u doesn't fit in chplan\n", caller, ch); -+ ret = _FAIL; -+ goto exit; -+ } -+ if (chset[ch_idx].flags & RTW_CHF_NO_IR) { -+ RTW_WARN("%s ch:%u is passive\n", caller, ch); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ rtw_adjust_chbw(adapter, ch, bw, offset); -+ -+ if (!rtw_get_offset_by_chbw(ch, *bw, offset)) { -+ RTW_WARN("%s %u,%u has no valid offset\n", caller, ch, *bw); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ while (!rtw_chset_is_chbw_valid(chset, ch, *bw, *offset, 0, 0) -+ || (rtw_rfctl_dfs_domain_unknown(rfctl) && rtw_chset_is_dfs_chbw(chset, ch, *bw, *offset)) -+ ) { -+ if (*bw > CHANNEL_WIDTH_20) -+ (*bw)--; -+ if (*bw == CHANNEL_WIDTH_20) { -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+ } -+ -+ if (rtw_rfctl_dfs_domain_unknown(rfctl) && rtw_chset_is_dfs_chbw(chset, ch, *bw, *offset)) { -+ RTW_WARN("%s DFS channel %u can't be used\n", caller, ch); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+exit: -+ return ret; -+} -+ -+static bool rtw_ap_choose_chbw(_adapter *adapter, u8 sel_ch, u8 max_bw, u8 cur_ch -+ , u8 *ch, u8 *bw, u8 *offset, bool by_int_info, u8 mesh_only, const char *caller) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ bool ch_avail = _FALSE; -+ -+#if defined(CONFIG_DFS_MASTER) -+ if (!rtw_rfctl_dfs_domain_unknown(rfctl)) { -+ if (rfctl->radar_detected -+ && rfctl->dbg_dfs_choose_dfs_ch_first -+ ) { -+ ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw -+ , ch, bw, offset -+ , RTW_CHF_DFS, 0 -+ , cur_ch, by_int_info, mesh_only); -+ if (ch_avail == _TRUE) { -+ RTW_INFO("%s choose 5G DFS channel for debug\n", caller); -+ goto exit; -+ } -+ } -+ -+ if (rfctl->radar_detected -+ && (rfctl->dfs_ch_sel_e_flags || rfctl->dfs_ch_sel_d_flags) -+ ) { -+ ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw -+ , ch, bw, offset -+ , rfctl->dfs_ch_sel_e_flags, rfctl->dfs_ch_sel_d_flags -+ , cur_ch, by_int_info, mesh_only); -+ if (ch_avail == _TRUE) { -+ RTW_INFO("%s choose with dfs_ch_sel_ e_flags:0x%02x d_flags:0x%02x for debug\n" -+ , caller, rfctl->dfs_ch_sel_e_flags, rfctl->dfs_ch_sel_d_flags); -+ goto exit; -+ } -+ } -+ -+ ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw -+ , ch, bw, offset -+ , 0, 0 -+ , cur_ch, by_int_info, mesh_only); -+ } else -+#endif /* defined(CONFIG_DFS_MASTER) */ -+ { -+ ch_avail = rtw_choose_shortest_waiting_ch(rfctl, sel_ch, max_bw -+ , ch, bw, offset -+ , 0, RTW_CHF_DFS -+ , cur_ch, by_int_info, mesh_only); -+ } -+#if defined(CONFIG_DFS_MASTER) -+exit: -+#endif -+ if (ch_avail == _FALSE) -+ RTW_WARN("%s no available channel\n", caller); -+ -+ return ch_avail; -+} -+ -+u8 rtw_ap_chbw_decision(_adapter *adapter, u8 ifbmp, u8 excl_ifbmp -+ , s16 req_ch, s8 req_bw, s8 req_offset -+ , u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow, bool *set_u_ch) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ RT_CHANNEL_INFO *chset = adapter_to_chset(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ bool ch_avail = _FALSE; -+ u8 cur_ie_ch[CONFIG_IFACE_NUMBER] = {0}; -+ u8 cur_ie_bw[CONFIG_IFACE_NUMBER] = {0}; -+ u8 cur_ie_offset[CONFIG_IFACE_NUMBER] = {0}; -+ u8 dec_ch[CONFIG_IFACE_NUMBER] = {0}; -+ u8 dec_bw[CONFIG_IFACE_NUMBER] = {0}; -+ u8 dec_offset[CONFIG_IFACE_NUMBER] = {0}; -+ u8 u_ch = 0, u_bw = 0, u_offset = 0; -+ struct mlme_ext_priv *mlmeext; -+ WLAN_BSSID_EX *network; -+ struct mi_state mstate; -+ struct mi_state mstate_others; -+ u8 ifbmp_others = 0xFF & ~ifbmp & ~excl_ifbmp; -+ u8 ifbmp_ch_changed = 0; -+ bool ifbmp_all_mesh = 0; -+ _adapter *iface; -+ int i; -+ -+ *set_u_ch = _FALSE; -+ -+#ifdef CONFIG_RTW_MESH -+ for (i = 0; i < dvobj->iface_nums; i++) -+ if ((ifbmp & BIT(i)) && dvobj->padapters) -+ if (!MLME_IS_MESH(dvobj->padapters[i])) -+ break; -+ ifbmp_all_mesh = i >= dvobj->iface_nums ? 1 : 0; -+#endif -+ -+ RTW_INFO("%s ifbmp:0x%02x excl_ifbmp:0x%02x req:%d,%d,%d\n", __func__ -+ , ifbmp, excl_ifbmp, req_ch, req_bw, req_offset); -+ rtw_mi_status_by_ifbmp(dvobj, ifbmp, &mstate); -+ rtw_mi_status_by_ifbmp(dvobj, ifbmp_others, &mstate_others); -+ RTW_INFO("%s others ld_sta_num:%u, lg_sta_num:%u, ap_num:%u, mesh_num:%u\n" -+ , __func__, MSTATE_STA_LD_NUM(&mstate_others), MSTATE_STA_LG_NUM(&mstate_others) -+ , MSTATE_AP_NUM(&mstate_others), MSTATE_MESH_NUM(&mstate_others)); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) -+ continue; -+ iface = dvobj->padapters[i]; -+ mlmeext = &(iface->mlmeextpriv); -+ network = &(mlmeext->mlmext_info.network); -+ -+ /* get current IE channel settings */ -+ rtw_ies_get_chbw(BSS_EX_TLV_IES(network), BSS_EX_TLV_IES_LEN(network) -+ , &cur_ie_ch[i], &cur_ie_bw[i], &cur_ie_offset[i], 1, 1); -+ -+ /* prepare temporary channel setting decision */ -+ if (req_ch == 0) { -+ /* request comes from upper layer, use cur_ie values */ -+ dec_ch[i] = cur_ie_ch[i]; -+ dec_bw[i] = cur_ie_bw[i]; -+ dec_offset[i] = cur_ie_offset[i]; -+ } else { -+ /* use chbw of cur_ie updated with specifying req as temporary decision */ -+ dec_ch[i] = (req_ch <= REQ_CH_NONE) ? cur_ie_ch[i] : req_ch; -+ if (req_bw <= REQ_BW_NONE) { -+ if (req_bw == REQ_BW_ORI) -+ dec_bw[i] = iface->mlmepriv.ori_bw; -+ else -+ dec_bw[i] = cur_ie_bw[i]; -+ } else -+ dec_bw[i] = req_bw; -+ dec_offset[i] = (req_offset <= REQ_OFFSET_NONE) ? cur_ie_offset[i] : req_offset; -+ } -+ } -+ -+ if (MSTATE_STA_LD_NUM(&mstate_others) || MSTATE_STA_LG_NUM(&mstate_others) -+ || MSTATE_AP_NUM(&mstate_others) || MSTATE_MESH_NUM(&mstate_others) -+ ) { -+ /* has linked/linking STA or has AP/Mesh mode */ -+ rtw_warn_on(!rtw_mi_get_ch_setting_union_by_ifbmp(dvobj, ifbmp_others, &u_ch, &u_bw, &u_offset)); -+ RTW_INFO("%s others union:%u,%u,%u\n", __func__, u_ch, u_bw, u_offset); -+ } -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(adapter) && req_ch == 0) { -+ if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { -+ u8 if_id = adapter->iface_id; -+ -+ mlmeext = &(adapter->mlmeextpriv); -+ -+ /* check channel settings are the same */ -+ if (cur_ie_ch[if_id] == mlmeext->cur_channel -+ && cur_ie_bw[if_id] == mlmeext->cur_bwmode -+ && cur_ie_offset[if_id] == mlmeext->cur_ch_offset) { -+ -+ RTW_INFO(FUNC_ADPT_FMT"req ch settings are the same as current ch setting, go to exit\n" -+ , FUNC_ADPT_ARG(adapter)); -+ -+ *chbw_allow = _FALSE; -+ goto exit; -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT"request channel settings are not the same as current channel setting(%d,%d,%d,%d,%d,%d), restart MCC\n" -+ , FUNC_ADPT_ARG(adapter) -+ , cur_ie_ch[if_id], cur_ie_bw[if_id], cur_ie_offset[if_id] -+ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); -+ -+ rtw_hal_set_mcc_setting_disconnect(adapter); -+ } -+ } -+ } -+#endif /* CONFIG_MCC_MODE */ -+ -+ if (MSTATE_STA_LG_NUM(&mstate_others) && !MSTATE_STA_LD_NUM(&mstate_others)) { -+ /* has linking STA but no linked STA */ -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) -+ continue; -+ iface = dvobj->padapters[i]; -+ -+ rtw_adjust_chbw(iface, dec_ch[i], &dec_bw[i], &dec_offset[i]); -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(iface)) -+ rtw_mesh_adjust_chbw(dec_ch[i], &dec_bw[i], &dec_offset[i]); -+ #endif -+ -+ if (rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch[i], dec_bw[i], dec_offset[i])) { -+ rtw_chset_sync_chbw(chset -+ , &dec_ch[i], &dec_bw[i], &dec_offset[i] -+ , &u_ch, &u_bw, &u_offset, 1, 0); -+ *set_u_ch = _TRUE; -+ -+ /* channel bw offset can be allowed, not need MCC */ -+ *chbw_allow = _TRUE; -+ } else { -+ #ifdef CONFIG_MCC_MODE -+ if (MCC_EN(iface)) { -+ mlmeext = &(iface->mlmeextpriv); -+ mlmeext->cur_channel = *ch = dec_ch[i]; -+ mlmeext->cur_bwmode = *bw = dec_bw[i]; -+ mlmeext->cur_ch_offset = *offset = dec_offset[i]; -+ -+ /* channel bw offset can not be allowed, need MCC */ -+ *chbw_allow = _FALSE; -+ RTW_INFO(FUNC_ADPT_FMT" enable mcc: %u,%u,%u\n", FUNC_ADPT_ARG(iface) -+ , *ch, *bw, *offset); -+ goto exit; -+ } -+ #endif /* CONFIG_MCC_MODE */ -+ -+ /* set this for possible ch change when join down*/ -+ set_fwstate(&iface->mlmepriv, WIFI_OP_CH_SWITCHING); -+ } -+ } -+ -+ } else if (MSTATE_STA_LD_NUM(&mstate_others) -+ || MSTATE_AP_NUM(&mstate_others) || MSTATE_MESH_NUM(&mstate_others) -+ ) { -+ /* has linked STA mode or AP/Mesh mode */ -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) -+ continue; -+ iface = dvobj->padapters[i]; -+ -+ rtw_adjust_chbw(iface, u_ch, &dec_bw[i], &dec_offset[i]); -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(iface)) -+ rtw_mesh_adjust_chbw(u_ch, &dec_bw[i], &dec_offset[i]); -+ #endif -+ -+ #ifdef CONFIG_MCC_MODE -+ if (MCC_EN(iface)) { -+ if (!rtw_is_chbw_grouped(u_ch, u_bw, u_offset, dec_ch[i], dec_bw[i], dec_offset[i])) { -+ mlmeext = &(iface->mlmeextpriv); -+ mlmeext->cur_channel = *ch = dec_ch[i] = cur_ie_ch[i]; -+ mlmeext->cur_bwmode = *bw = dec_bw[i] = cur_ie_bw[i]; -+ mlmeext->cur_ch_offset = *offset = dec_offset[i] = cur_ie_offset[i]; -+ /* channel bw offset can not be allowed, need MCC */ -+ *chbw_allow = _FALSE; -+ RTW_INFO(FUNC_ADPT_FMT" enable mcc: %u,%u,%u\n", FUNC_ADPT_ARG(iface) -+ , *ch, *bw, *offset); -+ goto exit; -+ } else -+ /* channel bw offset can be allowed, not need MCC */ -+ *chbw_allow = _TRUE; -+ } -+ #endif /* CONFIG_MCC_MODE */ -+ -+ if (req_ch == 0 && dec_bw[i] > u_bw -+ && rtw_chset_is_dfs_chbw(chset, u_ch, u_bw, u_offset) -+ ) { -+ /* request comes from upper layer, prevent from additional channel waiting */ -+ dec_bw[i] = u_bw; -+ if (dec_bw[i] == CHANNEL_WIDTH_20) -+ dec_offset[i] = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ -+ /* follow */ -+ rtw_chset_sync_chbw(chset -+ , &dec_ch[i], &dec_bw[i], &dec_offset[i] -+ , &u_ch, &u_bw, &u_offset, 1, 0); -+ } -+ -+ *set_u_ch = _TRUE; -+ -+ } else { -+ /* autonomous decision */ -+ u8 ori_ch = 0; -+ u8 max_bw; -+ bool by_int_info; -+ -+ /* autonomous decision, not need MCC */ -+ *chbw_allow = _TRUE; -+ -+ if (req_ch <= REQ_CH_NONE) /* channel is not specified */ -+ goto choose_chbw; -+ -+ /* get tmp dec union of ifbmp */ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) -+ continue; -+ if (u_ch == 0) { -+ u_ch = dec_ch[i]; -+ u_bw = dec_bw[i]; -+ u_offset = dec_offset[i]; -+ rtw_adjust_chbw(adapter, u_ch, &u_bw, &u_offset); -+ rtw_get_offset_by_chbw(u_ch, u_bw, &u_offset); -+ } else { -+ u8 tmp_ch = dec_ch[i]; -+ u8 tmp_bw = dec_bw[i]; -+ u8 tmp_offset = dec_offset[i]; -+ -+ rtw_adjust_chbw(adapter, tmp_ch, &tmp_bw, &tmp_offset); -+ rtw_get_offset_by_chbw(tmp_ch, tmp_bw, &tmp_offset); -+ -+ rtw_warn_on(!rtw_is_chbw_grouped(u_ch, u_bw, u_offset, tmp_ch, tmp_bw, tmp_offset)); -+ rtw_sync_chbw(&tmp_ch, &tmp_bw, &tmp_offset, &u_ch, &u_bw, &u_offset); -+ } -+ } -+ -+ #ifdef CONFIG_RTW_MESH -+ /* if ifbmp are all mesh, apply bw restriction */ -+ if (ifbmp_all_mesh) -+ rtw_mesh_adjust_chbw(u_ch, &u_bw, &u_offset); -+ #endif -+ -+ RTW_INFO("%s ifbmp:0x%02x tmp union:%u,%u,%u\n", __func__, ifbmp, u_ch, u_bw, u_offset); -+ -+ /* check if tmp dec union is usable */ -+ if (rtw_ap_ch_specific_chk(adapter, u_ch, &u_bw, &u_offset, __func__) == _FAIL) { -+ /* channel can't be used */ -+ if (req_ch > 0) { -+ /* specific channel and not from IE => don't change channel setting */ -+ goto exit; -+ } -+ goto choose_chbw; -+ } else if (rtw_chset_is_chbw_non_ocp(chset, u_ch, u_bw, u_offset)) { -+ RTW_WARN("%s DFS channel %u,%u under non ocp\n", __func__, u_ch, u_bw); -+ if (req_ch > 0 && req_bw > REQ_BW_NONE) { -+ /* change_chbw with specific channel and specific bw, goto update_bss_chbw directly */ -+ goto update_bss_chbw; -+ } -+ } else -+ goto update_bss_chbw; -+ -+choose_chbw: -+ by_int_info = req_ch == REQ_CH_INT_INFO ? 1 : 0; -+ req_ch = req_ch > 0 ? req_ch : 0; -+ max_bw = req_bw > REQ_BW_NONE ? req_bw : CHANNEL_WIDTH_20; -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) -+ continue; -+ iface = dvobj->padapters[i]; -+ mlmeext = &(iface->mlmeextpriv); -+ -+ if (req_bw <= REQ_BW_NONE) { -+ if (req_bw == REQ_BW_ORI) { -+ if (max_bw < iface->mlmepriv.ori_bw) -+ max_bw = iface->mlmepriv.ori_bw; -+ } else { -+ if (max_bw < cur_ie_bw[i]) -+ max_bw = cur_ie_bw[i]; -+ } -+ } -+ -+ if (MSTATE_AP_NUM(&mstate) || MSTATE_MESH_NUM(&mstate)) { -+ if (ori_ch == 0) -+ ori_ch = mlmeext->cur_channel; -+ else if (ori_ch != mlmeext->cur_channel) -+ rtw_warn_on(1); -+ } else { -+ if (ori_ch == 0) -+ ori_ch = cur_ie_ch[i]; -+ else if (ori_ch != cur_ie_ch[i]) -+ rtw_warn_on(1); -+ } -+ } -+ -+ ch_avail = rtw_ap_choose_chbw(adapter, req_ch, max_bw -+ , ori_ch, &u_ch, &u_bw, &u_offset, by_int_info, ifbmp_all_mesh, __func__); -+ if (ch_avail == _FALSE) -+ goto exit; -+ -+update_bss_chbw: -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) -+ continue; -+ iface = dvobj->padapters[i]; -+ -+ dec_ch[i] = u_ch; -+ if (dec_bw[i] > u_bw) -+ dec_bw[i] = u_bw; -+ if (dec_bw[i] == CHANNEL_WIDTH_20) -+ dec_offset[i] = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ else -+ dec_offset[i] = u_offset; -+ -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(iface)) -+ rtw_mesh_adjust_chbw(dec_ch[i], &dec_bw[i], &dec_offset[i]); -+ #endif -+ } -+ -+ *set_u_ch = _TRUE; -+ } -+ -+ ifbmp_ch_changed = rtw_ap_update_chbw_by_ifbmp(dvobj, ifbmp -+ , cur_ie_ch, cur_ie_bw, cur_ie_offset -+ , dec_ch, dec_bw, dec_offset -+ , __func__); -+ -+ if (u_ch != 0) -+ RTW_INFO("%s union:%u,%u,%u\n", __func__, u_ch, u_bw, u_offset); -+ -+ if (*set_u_ch == _TRUE) { -+ rtw_mi_update_union_chan_inf(adapter, u_ch, u_offset, u_bw); -+ *ch = u_ch; -+ *bw = u_bw; -+ *offset = u_offset; -+ } -+ -+ if (rtw_mi_check_fwstate(adapter, WIFI_UNDER_SURVEY)) { -+ /* scanning, leave ch setting to scan state machine */ -+ *set_u_ch = _FALSE; -+ } -+ -+exit: -+ return ifbmp_ch_changed; -+} -+ -+u8 rtw_ap_sta_states_check(_adapter *adapter) -+{ -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ _list *plist, *phead; -+ _irqL irqL; -+ u8 rst = _FALSE; -+ -+ if (!MLME_IS_AP(adapter) && !MLME_IS_MESH(adapter)) -+ return _FALSE; -+ -+ if (pstapriv->auth_list_cnt !=0) -+ return _TRUE; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) { -+ RTW_INFO(ADPT_FMT"- SoftAP/Mesh - sta under linking, its state = 0x%x\n", ADPT_ARG(adapter), psta->state); -+ rst = _TRUE; -+ break; -+ } else if (psta->state & WIFI_UNDER_KEY_HANDSHAKE) { -+ RTW_INFO(ADPT_FMT"- SoftAP/Mesh - sta under key handshaking, its state = 0x%x\n", ADPT_ARG(adapter), psta->state); -+ rst = _TRUE; -+ break; -+ } -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ return rst; -+} -+ -+/*#define DBG_SWTIMER_BASED_TXBCN*/ -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+void tx_beacon_handlder(struct dvobj_priv *pdvobj) -+{ -+#define BEACON_EARLY_TIME 20 /* unit:TU*/ -+ _irqL irqL; -+ _list *plist, *phead; -+ u32 timestamp[2]; -+ u32 bcn_interval_us; /* unit : usec */ -+ u64 time; -+ u32 cur_tick, time_offset; /* unit : usec */ -+ u32 inter_bcn_space_us; /* unit : usec */ -+ u32 txbcn_timer_ms; /* unit : ms */ -+ int nr_vap, idx, bcn_idx; -+ int i; -+ u8 val8, late = 0; -+ _adapter *padapter = NULL; -+ -+ i = 0; -+ -+ /* get first ap mode interface */ -+ _enter_critical_bh(&pdvobj->ap_if_q.lock, &irqL); -+ if (rtw_is_list_empty(&pdvobj->ap_if_q.queue) || (pdvobj->nr_ap_if == 0)) { -+ RTW_INFO("[%s] ERROR: ap_if_q is empty!or nr_ap = %d\n", __func__, pdvobj->nr_ap_if); -+ _exit_critical_bh(&pdvobj->ap_if_q.lock, &irqL); -+ return; -+ } else -+ padapter = LIST_CONTAINOR(get_next(&(pdvobj->ap_if_q.queue)), struct _ADAPTER, list); -+ _exit_critical_bh(&pdvobj->ap_if_q.lock, &irqL); -+ -+ if (NULL == padapter) { -+ RTW_INFO("[%s] ERROR: no any ap interface!\n", __func__); -+ return; -+ } -+ -+ -+ bcn_interval_us = DEFAULT_BCN_INTERVAL * NET80211_TU_TO_US; -+ if (0 == bcn_interval_us) { -+ RTW_INFO("[%s] ERROR: beacon interval = 0\n", __func__); -+ return; -+ } -+ -+ /* read TSF */ -+ timestamp[1] = rtw_read32(padapter, 0x560 + 4); -+ timestamp[0] = rtw_read32(padapter, 0x560); -+ while (timestamp[1]) { -+ time = (0xFFFFFFFF % bcn_interval_us + 1) * timestamp[1] + timestamp[0]; -+ timestamp[0] = (u32)time; -+ timestamp[1] = (u32)(time >> 32); -+ } -+ cur_tick = timestamp[0] % bcn_interval_us; -+ -+ -+ _enter_critical_bh(&pdvobj->ap_if_q.lock, &irqL); -+ -+ nr_vap = (pdvobj->nr_ap_if - 1); -+ if (nr_vap > 0) { -+ inter_bcn_space_us = pdvobj->inter_bcn_space * NET80211_TU_TO_US; /* beacon_interval / (nr_vap+1); */ -+ idx = cur_tick / inter_bcn_space_us; -+ if (idx < nr_vap) /* if (idx < (nr_vap+1))*/ -+ bcn_idx = idx + 1; /* bcn_idx = (idx + 1) % (nr_vap+1);*/ -+ else -+ bcn_idx = 0; -+ -+ /* to get padapter based on bcn_idx */ -+ padapter = NULL; -+ phead = get_list_head(&pdvobj->ap_if_q); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ padapter = LIST_CONTAINOR(plist, struct _ADAPTER, list); -+ -+ plist = get_next(plist); -+ -+ if (i == bcn_idx) -+ break; -+ -+ i++; -+ } -+ if ((NULL == padapter) || (i > pdvobj->nr_ap_if)) { -+ RTW_INFO("[%s] ERROR: nr_ap_if = %d, padapter=%p, bcn_idx=%d, index=%d\n", -+ __func__, pdvobj->nr_ap_if, padapter, bcn_idx, i); -+ _exit_critical_bh(&pdvobj->ap_if_q.lock, &irqL); -+ return; -+ } -+#ifdef DBG_SWTIMER_BASED_TXBCN -+ RTW_INFO("BCN_IDX=%d, cur_tick=%d, padapter=%p\n", bcn_idx, cur_tick, padapter); -+#endif -+ if (((idx + 2 == nr_vap + 1) && (idx < nr_vap + 1)) || (0 == bcn_idx)) { -+ time_offset = bcn_interval_us - cur_tick - BEACON_EARLY_TIME * NET80211_TU_TO_US; -+ if ((s32)time_offset < 0) -+ time_offset += inter_bcn_space_us; -+ -+ } else { -+ time_offset = (idx + 2) * inter_bcn_space_us - cur_tick - BEACON_EARLY_TIME * NET80211_TU_TO_US; -+ if (time_offset > (inter_bcn_space_us + (inter_bcn_space_us >> 1))) { -+ time_offset -= inter_bcn_space_us; -+ late = 1; -+ } -+ } -+ } else -+ /*#endif*/ { /* MBSSID */ -+ time_offset = 2 * bcn_interval_us - cur_tick - BEACON_EARLY_TIME * NET80211_TU_TO_US; -+ if (time_offset > (bcn_interval_us + (bcn_interval_us >> 1))) { -+ time_offset -= bcn_interval_us; -+ late = 1; -+ } -+ } -+ _exit_critical_bh(&pdvobj->ap_if_q.lock, &irqL); -+ -+#ifdef DBG_SWTIMER_BASED_TXBCN -+ RTW_INFO("set sw bcn timer %d us\n", time_offset); -+#endif -+ txbcn_timer_ms = time_offset / NET80211_TU_TO_US; -+ _set_timer(&pdvobj->txbcn_timer, txbcn_timer_ms); -+ -+ if (padapter) { -+#ifdef CONFIG_BCN_RECOVERY -+ rtw_ap_bcn_recovery(padapter); -+#endif /*CONFIG_BCN_RECOVERY*/ -+ -+#ifdef CONFIG_BCN_XMIT_PROTECT -+ rtw_ap_bcn_queue_empty_check(padapter, txbcn_timer_ms); -+#endif /*CONFIG_BCN_XMIT_PROTECT*/ -+ -+#ifdef DBG_SWTIMER_BASED_TXBCN -+ RTW_INFO("padapter=%p, PORT=%d\n", padapter, padapter->hw_port); -+#endif -+ /* bypass TX BCN queue if op ch is switching/waiting */ -+ if (!check_fwstate(&padapter->mlmepriv, WIFI_OP_CH_SWITCHING) -+ && !IS_CH_WAITING(adapter_to_rfctl(padapter)) -+ ) { -+ /*update_beacon(padapter, _TIM_IE_, NULL, _FALSE, 0);*/ -+ /*issue_beacon(padapter, 0);*/ -+ send_beacon(padapter); -+ } -+ } -+ -+#if 0 -+ /* handle any buffered BC/MC frames*/ -+ /* Don't dynamically change DIS_ATIM due to HW will auto send ACQ after HIQ empty.*/ -+ val8 = *((unsigned char *)priv->beaconbuf + priv->timoffset + 4); -+ if (val8 & 0x01) { -+ process_mcast_dzqueue(priv); -+ priv->pkt_in_dtimQ = 0; -+ } -+#endif -+ -+} -+ -+void tx_beacon_timer_handlder(void *ctx) -+{ -+ struct dvobj_priv *pdvobj = (struct dvobj_priv *)ctx; -+ _adapter *padapter = pdvobj->padapters[0]; -+ -+ if (padapter) -+ set_tx_beacon_cmd(padapter, 0); -+} -+#endif -+ -+void rtw_ap_parse_sta_capability(_adapter *adapter, struct sta_info *sta, u8 *cap) -+{ -+ sta->capability = RTW_GET_LE16(cap); -+ if (sta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) -+ sta->flags |= WLAN_STA_SHORT_PREAMBLE; -+ else -+ sta->flags &= ~WLAN_STA_SHORT_PREAMBLE; -+} -+ -+u16 rtw_ap_parse_sta_supported_rates(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len) -+{ -+ u8 rate_set[12]; -+ u8 rate_num; -+ int i; -+ u16 status = _STATS_SUCCESSFUL_; -+ -+ rtw_ies_get_supported_rate(tlv_ies, tlv_ies_len, rate_set, &rate_num); -+ if (rate_num == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" sta "MAC_FMT" with no supported rate\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr)); -+ status = _STATS_FAILURE_; -+ goto exit; -+ } -+ -+ _rtw_memcpy(sta->bssrateset, rate_set, rate_num); -+ sta->bssratelen = rate_num; -+ -+ if (MLME_IS_AP(adapter)) { -+ /* this function force only CCK rates to be bassic rate... */ -+ UpdateBrateTblForSoftAP(sta->bssrateset, sta->bssratelen); -+ } -+ -+ /* if (hapd->iface->current_mode->mode == HOSTAPD_MODE_IEEE80211G) */ /* ? */ -+ sta->flags |= WLAN_STA_NONERP; -+ for (i = 0; i < sta->bssratelen; i++) { -+ if ((sta->bssrateset[i] & 0x7f) > 22) { -+ sta->flags &= ~WLAN_STA_NONERP; -+ break; -+ } -+ } -+ -+exit: -+ return status; -+} -+ -+u16 rtw_ap_parse_sta_security_ie(_adapter *adapter, struct sta_info *sta, struct rtw_ieee802_11_elems *elems) -+{ -+ struct security_priv *sec = &adapter->securitypriv; -+ u8 *wpa_ie; -+ int wpa_ie_len; -+ int group_cipher = 0, pairwise_cipher = 0, gmcs = 0; -+ u32 akm = 0; -+ u8 mfp_opt = MFP_NO; -+ u16 status = _STATS_SUCCESSFUL_; -+ -+ sta->dot8021xalg = 0; -+ sta->wpa_psk = 0; -+ sta->wpa_group_cipher = 0; -+ sta->wpa2_group_cipher = 0; -+ sta->wpa_pairwise_cipher = 0; -+ sta->wpa2_pairwise_cipher = 0; -+ _rtw_memset(sta->wpa_ie, 0, sizeof(sta->wpa_ie)); -+ -+ if ((sec->wpa_psk & BIT(1)) && elems->rsn_ie) { -+ wpa_ie = elems->rsn_ie; -+ wpa_ie_len = elems->rsn_ie_len; -+ -+ if (rtw_parse_wpa2_ie(wpa_ie - 2, wpa_ie_len + 2, &group_cipher, &pairwise_cipher, &gmcs, &akm, &mfp_opt) == _SUCCESS) { -+ sta->dot8021xalg = 1;/* psk, todo:802.1x */ -+ sta->wpa_psk |= BIT(1); -+ -+ sta->wpa2_group_cipher = group_cipher & sec->wpa2_group_cipher; -+ sta->wpa2_pairwise_cipher = pairwise_cipher & sec->wpa2_pairwise_cipher; -+ -+ sta->akm_suite_type = akm; -+ if (MLME_IS_AP(adapter) && (CHECK_BIT(WLAN_AKM_TYPE_SAE, akm)) && (MFP_NO == mfp_opt)) { -+ status = WLAN_STATUS_ROBUST_MGMT_FRAME_POLICY_VIOLATION; -+ goto exit; -+ } -+ -+ if (MLME_IS_AP(adapter) && (!CHECK_BIT(sec->akmp, akm))) { -+ status = WLAN_STATUS_AKMP_NOT_VALID; -+ goto exit; -+ } -+ -+ if (!sta->wpa2_group_cipher) { -+ status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID; -+ goto exit; -+ } -+ -+ if (!sta->wpa2_pairwise_cipher) { -+ status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID; -+ goto exit; -+ } -+ -+ } else { -+ status = WLAN_STATUS_INVALID_IE; -+ goto exit; -+ } -+ -+ } -+ else if ((sec->wpa_psk & BIT(0)) && elems->wpa_ie) { -+ wpa_ie = elems->wpa_ie; -+ wpa_ie_len = elems->wpa_ie_len; -+ -+ if (rtw_parse_wpa_ie(wpa_ie - 2, wpa_ie_len + 2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { -+ sta->dot8021xalg = 1;/* psk, todo:802.1x */ -+ sta->wpa_psk |= BIT(0); -+ -+ sta->wpa_group_cipher = group_cipher & sec->wpa_group_cipher; -+ sta->wpa_pairwise_cipher = pairwise_cipher & sec->wpa_pairwise_cipher; -+ -+ if (!sta->wpa_group_cipher) { -+ status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID; -+ goto exit; -+ } -+ -+ if (!sta->wpa_pairwise_cipher) { -+ status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID; -+ goto exit; -+ } -+ } else { -+ status = WLAN_STATUS_INVALID_IE; -+ goto exit; -+ } -+ -+ } else { -+ wpa_ie = NULL; -+ wpa_ie_len = 0; -+ } -+ -+ if ((sec->mfp_opt == MFP_REQUIRED && mfp_opt < MFP_OPTIONAL) -+ || (mfp_opt == MFP_REQUIRED && sec->mfp_opt < MFP_OPTIONAL) -+ ) { -+ status = WLAN_STATUS_ROBUST_MGMT_FRAME_POLICY_VIOLATION; -+ goto exit; -+ } -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(adapter)) { -+ /* MFP is mandatory for secure mesh */ -+ if (adapter->mesh_info.mesh_auth_id) -+ sta->flags |= WLAN_STA_MFP; -+ } else -+#endif -+ if (sec->mfp_opt >= MFP_OPTIONAL && mfp_opt >= MFP_OPTIONAL) -+ sta->flags |= WLAN_STA_MFP; -+ -+#ifdef CONFIG_IEEE80211W -+ if ((sta->flags & WLAN_STA_MFP) -+ && (sec->mfp_opt >= MFP_OPTIONAL && mfp_opt >= MFP_OPTIONAL) -+ && security_type_bip_to_gmcs(sec->dot11wCipher) != gmcs -+ ) { -+ status = WLAN_STATUS_CIPHER_REJECTED_PER_POLICY; -+ goto exit; -+ } -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (MLME_IS_AP(adapter) && -+ (sec->auth_type == MLME_AUTHTYPE_SAE) && -+ (CHECK_BIT(WLAN_AKM_TYPE_SAE, sta->akm_suite_type)) && -+ (WLAN_AUTH_OPEN == sta->authalg)) { -+ /* WPA3-SAE, PMK caching */ -+ if (rtw_cached_pmkid(adapter, sta->cmn.mac_addr) == -1) { -+ RTW_INFO("SAE: No PMKSA cache entry found\n"); -+ status = WLAN_STATUS_INVALID_PMKID; -+ goto exit; -+ } else { -+ RTW_INFO("SAE: PMKSA cache entry found\n"); -+ } -+ } -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ if (!MLME_IS_AP(adapter)) -+ goto exit; -+ -+ sta->flags &= ~(WLAN_STA_WPS | WLAN_STA_MAYBE_WPS); -+ /* if (hapd->conf->wps_state && wpa_ie == NULL) { */ /* todo: to check ap if supporting WPS */ -+ if (wpa_ie == NULL) { -+ if (elems->wps_ie) { -+ RTW_INFO("STA included WPS IE in " -+ "(Re)Association Request - assume WPS is " -+ "used\n"); -+ sta->flags |= WLAN_STA_WPS; -+ /* wpabuf_free(sta->wps_ie); */ -+ /* sta->wps_ie = wpabuf_alloc_copy(elems.wps_ie + 4, */ -+ /* elems.wps_ie_len - 4); */ -+ } else { -+ RTW_INFO("STA did not include WPA/RSN IE " -+ "in (Re)Association Request - possible WPS " -+ "use\n"); -+ sta->flags |= WLAN_STA_MAYBE_WPS; -+ } -+ -+ /* AP support WPA/RSN, and sta is going to do WPS, but AP is not ready */ -+ /* that the selected registrar of AP is _FLASE */ -+ if ((sec->wpa_psk > 0) -+ && (sta->flags & (WLAN_STA_WPS | WLAN_STA_MAYBE_WPS)) -+ ) { -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ -+ if (mlme->wps_beacon_ie) { -+ u8 selected_registrar = 0; -+ -+ rtw_get_wps_attr_content(mlme->wps_beacon_ie, mlme->wps_beacon_ie_len, WPS_ATTR_SELECTED_REGISTRAR, &selected_registrar, NULL); -+ -+ if (!selected_registrar) { -+ RTW_INFO("selected_registrar is _FALSE , or AP is not ready to do WPS\n"); -+ status = _STATS_UNABLE_HANDLE_STA_; -+ goto exit; -+ } -+ } -+ } -+ -+ } else { -+ int copy_len; -+ -+ if (sec->wpa_psk == 0) { -+ RTW_INFO("STA " MAC_FMT -+ ": WPA/RSN IE in association request, but AP don't support WPA/RSN\n", -+ MAC_ARG(sta->cmn.mac_addr)); -+ status = WLAN_STATUS_INVALID_IE; -+ goto exit; -+ } -+ -+ if (elems->wps_ie) { -+ RTW_INFO("STA included WPS IE in " -+ "(Re)Association Request - WPS is " -+ "used\n"); -+ sta->flags |= WLAN_STA_WPS; -+ copy_len = 0; -+ } else -+ copy_len = ((wpa_ie_len + 2) > sizeof(sta->wpa_ie)) ? (sizeof(sta->wpa_ie)) : (wpa_ie_len + 2); -+ -+ if (copy_len > 0) -+ _rtw_memcpy(sta->wpa_ie, wpa_ie - 2, copy_len); -+ } -+ -+exit: -+ return status; -+} -+ -+void rtw_ap_parse_sta_wmm_ie(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len) -+{ -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; -+ u8 *p; -+ -+ sta->flags &= ~WLAN_STA_WME; -+ sta->qos_option = 0; -+ sta->qos_info = 0; -+ sta->has_legacy_ac = _TRUE; -+ sta->uapsd_vo = 0; -+ sta->uapsd_vi = 0; -+ sta->uapsd_be = 0; -+ sta->uapsd_bk = 0; -+ -+ if (!mlme->qospriv.qos_option) -+ goto exit; -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(adapter)) { -+ /* QoS is mandatory in mesh */ -+ sta->flags |= WLAN_STA_WME; -+ } -+#endif -+ -+ p = rtw_get_ie_ex(tlv_ies, tlv_ies_len, WLAN_EID_VENDOR_SPECIFIC, WMM_IE, 6, NULL, NULL); -+ if (!p) -+ goto exit; -+ -+ sta->flags |= WLAN_STA_WME; -+ sta->qos_option = 1; -+ sta->qos_info = *(p + 8); -+ sta->max_sp_len = (sta->qos_info >> 5) & 0x3; -+ -+ if ((sta->qos_info & 0xf) != 0xf) -+ sta->has_legacy_ac = _TRUE; -+ else -+ sta->has_legacy_ac = _FALSE; -+ -+ if (sta->qos_info & 0xf) { -+ if (sta->qos_info & BIT(0)) -+ sta->uapsd_vo = BIT(0) | BIT(1); -+ else -+ sta->uapsd_vo = 0; -+ -+ if (sta->qos_info & BIT(1)) -+ sta->uapsd_vi = BIT(0) | BIT(1); -+ else -+ sta->uapsd_vi = 0; -+ -+ if (sta->qos_info & BIT(2)) -+ sta->uapsd_bk = BIT(0) | BIT(1); -+ else -+ sta->uapsd_bk = 0; -+ -+ if (sta->qos_info & BIT(3)) -+ sta->uapsd_be = BIT(0) | BIT(1); -+ else -+ sta->uapsd_be = 0; -+ } -+ -+exit: -+ return; -+} -+ -+void rtw_ap_parse_sta_ht_ie(_adapter *adapter, struct sta_info *sta, struct rtw_ieee802_11_elems *elems) -+{ -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ -+ sta->flags &= ~WLAN_STA_HT; -+ -+#ifdef CONFIG_80211N_HT -+ if (mlme->htpriv.ht_option == _FALSE) -+ goto exit; -+ -+ /* save HT capabilities in the sta object */ -+ _rtw_memset(&sta->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); -+ if (elems->ht_capabilities && elems->ht_capabilities_len >= sizeof(struct rtw_ieee80211_ht_cap)) { -+ sta->flags |= WLAN_STA_HT; -+ sta->flags |= WLAN_STA_WME; -+ _rtw_memcpy(&sta->htpriv.ht_cap, elems->ht_capabilities, sizeof(struct rtw_ieee80211_ht_cap)); -+ -+ if (elems->ht_operation && elems->ht_operation_len == HT_OP_IE_LEN) { -+ _rtw_memcpy(sta->htpriv.ht_op, elems->ht_operation, HT_OP_IE_LEN); -+ sta->htpriv.op_present = 1; -+ } -+ } -+exit: -+#endif -+ -+ return; -+} -+ -+void rtw_ap_parse_sta_vht_ie(_adapter *adapter, struct sta_info *sta, struct rtw_ieee802_11_elems *elems) -+{ -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ -+ sta->flags &= ~WLAN_STA_VHT; -+ -+#ifdef CONFIG_80211AC_VHT -+ if (mlme->vhtpriv.vht_option == _FALSE) -+ goto exit; -+ -+ _rtw_memset(&sta->vhtpriv, 0, sizeof(struct vht_priv)); -+ if (elems->vht_capabilities && elems->vht_capabilities_len == VHT_CAP_IE_LEN) { -+ sta->flags |= WLAN_STA_VHT; -+ _rtw_memcpy(sta->vhtpriv.vht_cap, elems->vht_capabilities, VHT_CAP_IE_LEN); -+ -+ if (elems->vht_operation && elems->vht_operation_len== VHT_OP_IE_LEN) { -+ _rtw_memcpy(sta->vhtpriv.vht_op, elems->vht_operation, VHT_OP_IE_LEN); -+ sta->vhtpriv.op_present = 1; -+ } -+ -+ if (elems->vht_op_mode_notify && elems->vht_op_mode_notify_len == 1) { -+ _rtw_memcpy(&sta->vhtpriv.vht_op_mode_notify, elems->vht_op_mode_notify, 1); -+ sta->vhtpriv.notify_present = 1; -+ } -+ } -+exit: -+#endif -+ -+ return; -+} -+ -+void rtw_ap_parse_sta_multi_ap_ie(_adapter *adapter, struct sta_info *sta, u8 *ies, int ies_len) -+{ -+ sta->flags &= ~WLAN_STA_MULTI_AP; -+ -+#ifdef CONFIG_RTW_MULTI_AP -+ if (adapter->multi_ap -+ && (rtw_get_multi_ap_ie_ext(ies, ies_len) & MULTI_AP_BACKHAUL_STA) -+ ) { -+ if (adapter->multi_ap & MULTI_AP_BACKHAUL_BSS) /* with backhaul bss, enable WDS */ -+ sta->flags |= WLAN_STA_MULTI_AP | WLAN_STA_WDS; -+ else if (adapter->multi_ap & MULTI_AP_FRONTHAUL_BSS) /* fronthaul bss only */ -+ sta->flags |= WLAN_STA_MULTI_AP; -+ } -+#endif -+} -+ -+#if CONFIG_RTW_AP_DATA_BMC_TO_UC -+static bool rtw_ap_data_bmc_to_uc(_adapter *adapter -+ , const u8 *da, const u8 *sa, const u8 *ori_ta -+ , u16 os_qid, _list *b2u_list) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct xmit_priv *xmitpriv = &adapter->xmitpriv; -+ _irqL irqL; -+ _list *head, *list; -+ struct sta_info *sta; -+ char b2u_sta_id[NUM_STA]; -+ u8 b2u_sta_num = 0; -+ bool bmc_need = _FALSE; -+ int i; -+ -+ _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ head = &stapriv->asoc_list; -+ list = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ int stainfo_offset; -+ -+ sta = LIST_CONTAINOR(list, struct sta_info, asoc_list); -+ list = get_next(list); -+ -+ stainfo_offset = rtw_stainfo_offset(stapriv, sta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ b2u_sta_id[b2u_sta_num++] = stainfo_offset; -+ } -+ _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ -+ if (!b2u_sta_num) -+ goto exit; -+ -+ for (i = 0; i < b2u_sta_num; i++) { -+ struct xmit_frame *b2uframe; -+ struct pkt_attrib *attrib; -+ -+ sta = rtw_get_stainfo_by_offset(stapriv, b2u_sta_id[i]); -+ if (!(sta->state & WIFI_ASOC_STATE) -+ || _rtw_memcmp(sta->cmn.mac_addr, sa, ETH_ALEN) == _TRUE -+ || (ori_ta && _rtw_memcmp(sta->cmn.mac_addr, ori_ta, ETH_ALEN) == _TRUE) -+ || is_broadcast_mac_addr(sta->cmn.mac_addr) -+ || is_zero_mac_addr(sta->cmn.mac_addr)) -+ continue; -+ -+ b2uframe = rtw_alloc_xmitframe(xmitpriv, os_qid); -+ if (!b2uframe) { -+ bmc_need = _TRUE; -+ break; -+ } -+ -+ attrib = &b2uframe->attrib; -+ -+ _rtw_memcpy(attrib->ra, sta->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy(attrib->ta, adapter_mac_addr(adapter), ETH_ALEN); -+ #ifdef CONFIG_RTW_WDS -+ if (adapter_use_wds(adapter) && (sta->flags & WLAN_STA_WDS)) { -+ _rtw_memcpy(attrib->dst, da, ETH_ALEN); -+ attrib->wds = 1; -+ } else -+ #endif -+ _rtw_memcpy(attrib->dst, attrib->ra, ETH_ALEN); -+ _rtw_memcpy(attrib->src, sa, ETH_ALEN); -+ -+ rtw_list_insert_tail(&b2uframe->list, b2u_list); -+ } -+ -+exit: -+ return bmc_need; -+} -+ -+void dump_ap_b2u_flags(void *sel, _adapter *adapter) -+{ -+ RTW_PRINT_SEL(sel, "%4s %4s\n", "src", "fwd"); -+ RTW_PRINT_SEL(sel, "0x%02x 0x%02x\n", adapter->b2u_flags_ap_src, adapter->b2u_flags_ap_fwd); -+} -+#endif /* CONFIG_RTW_AP_DATA_BMC_TO_UC */ -+ -+static int rtw_ap_nexthop_resolve(_adapter *adapter, struct xmit_frame *xframe) -+{ -+ struct pkt_attrib *attrib = &xframe->attrib; -+ int ret = _SUCCESS; -+ -+#ifdef CONFIG_RTW_WDS -+ if (adapter_use_wds(adapter) -+ && rtw_wds_nexthop_lookup(adapter, attrib->dst, attrib->ra) == 0 -+ ) { -+ if (_rtw_memcmp(attrib->dst, attrib->ra, ETH_ALEN) == _FALSE) -+ attrib->wds = 1; -+ } else -+#endif -+ _rtw_memcpy(attrib->ra, attrib->dst, ETH_ALEN); -+ -+ return ret; -+} -+ -+int rtw_ap_addr_resolve(_adapter *adapter, u16 os_qid, struct xmit_frame *xframe, _pkt *pkt, _list *b2u_list) -+{ -+ struct pkt_file pktfile; -+ struct ethhdr etherhdr; -+ struct pkt_attrib *attrib; -+ struct rtw_mesh_path *mpath = NULL, *mppath = NULL; -+ u8 is_da_mcast; -+ u8 addr4_need; -+#if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ bool bmc_need = _TRUE; -+#endif -+ int res = _SUCCESS; -+ -+ _rtw_open_pktfile(pkt, &pktfile); -+ if (_rtw_pktfile_read(&pktfile, (u8 *)ðerhdr, ETH_HLEN) != ETH_HLEN) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ xframe->pkt = pkt; -+#if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ _rtw_init_listhead(b2u_list); -+#endif -+ -+ is_da_mcast = IS_MCAST(etherhdr.h_dest); -+ if (is_da_mcast) { -+ #if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ if (rtw_ap_src_b2u_policy_chk(adapter->b2u_flags_ap_src, etherhdr.h_dest) -+ && adapter->registrypriv.wifi_spec == 0 -+ && adapter->xmitpriv.free_xmitframe_cnt > (NR_XMITFRAME / 4) -+ ) { -+ bmc_need = rtw_ap_data_bmc_to_uc(adapter -+ , etherhdr.h_dest, etherhdr.h_source, NULL, os_qid, b2u_list); -+ if (bmc_need == _FALSE) { -+ res = RTW_BMC_NO_NEED; -+ goto exit; -+ } -+ } -+ #endif -+ } -+ -+ attrib = &xframe->attrib; -+ -+ _rtw_memcpy(attrib->dst, etherhdr.h_dest, ETH_ALEN); -+ _rtw_memcpy(attrib->src, etherhdr.h_source, ETH_ALEN); -+ _rtw_memcpy(attrib->ta, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ if (is_da_mcast) -+ _rtw_memcpy(attrib->ra, attrib->dst, ETH_ALEN); -+ else -+ res = rtw_ap_nexthop_resolve(adapter, xframe); -+ -+exit: -+ return res; -+} -+ -+int rtw_ap_rx_data_validate_hdr(_adapter *adapter, union recv_frame *rframe, struct sta_info **sta) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib; -+ u8 *whdr = get_recvframe_data(rframe); -+ u8 is_ra_bmc = 0; -+ sint ret = _FAIL; -+ -+ if (!(MLME_STATE(adapter) & WIFI_ASOC_STATE)) -+ goto exit; -+ -+ switch (rattrib->to_fr_ds) { -+ case 1: -+ if (IS_MCAST(GetAddr1Ptr(whdr))) -+ goto exit; -+ _rtw_memcpy(rattrib->ra, GetAddr1Ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->ta, get_addr2_ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->dst, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */ -+ _rtw_memcpy(rattrib->src, get_addr2_ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->bssid, GetAddr1Ptr(whdr), ETH_ALEN); -+ break; -+ case 3: -+ is_ra_bmc = IS_MCAST(GetAddr1Ptr(whdr)) ? 1 : 0; -+ _rtw_memcpy(rattrib->ra, GetAddr1Ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->ta, get_addr2_ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->dst, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */ -+ _rtw_memcpy(rattrib->src, GetAddr4Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */ -+ if (!is_ra_bmc) -+ _rtw_memcpy(rattrib->bssid, GetAddr1Ptr(whdr), ETH_ALEN); -+ break; -+ default: -+ ret = RTW_RX_HANDLED; /* don't count for drop */ -+ goto exit; -+ } -+ -+ *sta = rtw_get_stainfo(stapriv, rattrib->ta); -+ if (*sta == NULL) { -+ if (!is_ra_bmc && !IS_RADAR_DETECTED(adapter_to_rfctl(adapter))) { -+ #ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL -+ RTW_INFO(FUNC_ADPT_FMT" issue_deauth to "MAC_FMT" with reason(7), unknown TA\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(rattrib->ta)); -+ issue_deauth(adapter, rattrib->ta, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); -+ #endif -+ } -+ ret = RTW_RX_HANDLED; -+ goto exit; -+ } -+ -+#ifdef CONFIG_RTW_WDS_AUTO_EN -+ if (rattrib->to_fr_ds == 3 && !(sta->flags & WLAN_STA_WDS)) -+ sta->flags |= WLAN_STA_WDS; -+#endif -+ -+ process_pwrbit_data(adapter, rframe, *sta); -+ -+ if ((get_frame_sub_type(whdr) & WIFI_QOS_DATA_TYPE) == WIFI_QOS_DATA_TYPE) -+ process_wmmps_data(adapter, rframe, *sta); -+ -+ if (get_frame_sub_type(whdr) & BIT(6)) { -+ /* No data, will not indicate to upper layer, temporily count it here */ -+ count_rx_stats(adapter, rframe, *sta); -+ ret = RTW_RX_HANDLED; -+ goto exit; -+ } -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+int rtw_ap_rx_msdu_act_check(union recv_frame *rframe -+ , const u8 *da, const u8 *sa -+ , u8 *msdu, enum rtw_rx_llc_hdl llc_hdl -+ , struct xmit_frame **fwd_frame, _list *b2u_list) -+{ -+ _adapter *adapter = rframe->u.hdr.adapter; -+ struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib; -+ struct rtw_wds_path *wpath; -+ u8 is_da_bmc = IS_MCAST(da); -+ u8 is_da_self = !is_da_bmc && _rtw_memcmp(da, adapter_mac_addr(adapter), ETH_ALEN); -+ u8 is_da_peer = 0; -+ int in_wds_tbl = 0; -+ u16 os_qid; -+ struct xmit_frame *xframe; -+ struct pkt_attrib *xattrib; -+ u8 fwd_ra[ETH_ALEN] = {0}; -+ int act = 0; -+#if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ bool bmc_need = _TRUE; -+#endif -+ -+#ifdef CONFIG_RTW_WDS -+ /* update/create wds info for SA, RA */ -+ if (adapter_use_wds(adapter) -+ && (rframe->u.hdr.psta->state & WIFI_ASOC_STATE) -+ && _rtw_memcmp(sa, rframe->u.hdr.psta->cmn.mac_addr, ETH_ALEN) == _FALSE -+ ) { -+ rtw_rcu_read_lock(); -+ wpath = rtw_wds_path_lookup(adapter, sa); -+ if (!wpath) -+ rtw_wds_path_add(adapter, sa, rframe->u.hdr.psta); -+ else { -+ rtw_wds_path_assign_nexthop(wpath, rframe->u.hdr.psta); -+ wpath->last_update = rtw_get_current_time(); -+ } -+ rtw_rcu_read_unlock(); -+ } -+#endif -+ -+ /* SA is self, need no further process */ -+ if (_rtw_memcmp(sa, adapter_mac_addr(adapter), ETH_ALEN) == _TRUE) -+ goto exit; -+ -+ if (is_da_bmc) { -+ /* DA is bmc addr */ -+ act |= RTW_RX_MSDU_ACT_INDICATE; -+ if (adapter->mlmepriv.ap_isolate) -+ goto exit; -+ goto fwd_chk; -+ -+ } -+ -+ if (is_da_self) { -+ /* DA is self, indicate */ -+ act |= RTW_RX_MSDU_ACT_INDICATE; -+ goto exit; -+ } -+ -+ /* DA is not self */ -+#ifdef CONFIG_RTW_WDS -+ if (adapter_use_wds(adapter)) -+ in_wds_tbl = rtw_wds_nexthop_lookup(adapter, da, fwd_ra) == 0; -+#endif -+ if (!in_wds_tbl) -+ is_da_peer = rtw_get_stainfo(&adapter->stapriv, da) ? 1 : 0; -+ -+ if (in_wds_tbl || is_da_peer) { -+ /* DA is known (peer or can be forwarded by peer) */ -+ if (adapter->mlmepriv.ap_isolate) { -+ #if defined(DBG_RX_DROP_FRAME) -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DA("MAC_FMT") through peer, ap_isolate\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(da)); -+ #endif -+ goto exit; -+ } -+ goto fwd_chk; -+ } -+ -+ /* DA is unknown*/ -+ act |= RTW_RX_MSDU_ACT_INDICATE; -+ goto exit; -+ -+fwd_chk: -+ -+ if (adapter->stapriv.asoc_list_cnt <= 1) -+ goto exit; -+ -+ os_qid = rtw_os_recv_select_queue(msdu, llc_hdl); -+ -+#if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ _rtw_init_listhead(b2u_list); -+ -+ if (is_da_bmc -+ && rtw_ap_fwd_b2u_policy_chk(adapter->b2u_flags_ap_fwd, da, rattrib->to_fr_ds == 3 && !IS_MCAST(rattrib->ra)) -+ && adapter->registrypriv.wifi_spec == 0 -+ && adapter->xmitpriv.free_xmitframe_cnt > (NR_XMITFRAME / 4) -+ ) { -+ bmc_need = rtw_ap_data_bmc_to_uc(adapter -+ , da, sa, rframe->u.hdr.psta->cmn.mac_addr -+ , os_qid, b2u_list); -+ } -+ -+ if (bmc_need == _TRUE) -+#endif -+ { -+ xframe = rtw_alloc_xmitframe(&adapter->xmitpriv, os_qid); -+ if (!xframe) { -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME "FUNC_ADPT_FMT" rtw_alloc_xmitframe fail\n" -+ , FUNC_ADPT_ARG(adapter)); -+ #endif -+ goto exit; -+ } -+ -+ xattrib = &xframe->attrib; -+ -+ _rtw_memcpy(xattrib->dst, da, ETH_ALEN); -+ _rtw_memcpy(xattrib->src, sa, ETH_ALEN); -+ _rtw_memcpy(xattrib->ta, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ #ifdef CONFIG_RTW_WDS -+ if (in_wds_tbl && _rtw_memcmp(da, fwd_ra, ETH_ALEN) == _FALSE) { -+ _rtw_memcpy(xattrib->ra, fwd_ra, ETH_ALEN); -+ xattrib->wds = 1; -+ } else -+ #endif -+ _rtw_memcpy(xattrib->ra, da, ETH_ALEN); -+ -+ *fwd_frame = xframe; -+ } -+ -+ act |= RTW_RX_MSDU_ACT_FORWARD; -+ -+exit: -+ return act; -+} -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+void rtw_issue_action_token_req(_adapter *padapter, struct sta_info *pstat) -+{ -+ /* Token Request Format -+ Category code : 1 Byte -+ Action code : 1 Byte -+ Element field: 4 Bytes, the duration of data transmission requested for the station. -+ */ -+ -+ u8 val = 0x0; -+ u8 category = RTW_WLAN_CATEGORY_TBTX; -+ u32 tbtx_duration = TBTX_TX_DURATION*1000; -+ u8 *pframe; -+ unsigned short *fctrl; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); -+ -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ return; -+ -+ RTW_DBG("%s: %6ph\n", __FUNCTION__, pstat->cmn.mac_addr); -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ pattrib->rate = MGN_24M; /* issue action request using OFDM rate? 20190716 Bruce add */ -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy((void *)GetAddr1Ptr(pwlanhdr), pstat->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy((void *)get_addr2_ptr(pwlanhdr), adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy((void *)GetAddr3Ptr(pwlanhdr), get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(val), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&(tbtx_duration), &(pattrib->pktlen)); -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ padapter->stapriv.last_token_holder = pstat; -+ dump_mgntframe(padapter, pmgntframe); -+ -+} -+#endif /* CONFIG_RTW_TOKEN_BASED_XMIT */ -+#endif /* CONFIG_AP_MODE */ -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_beamforming.c b/drivers/staging/rtl8723cs/core/rtw_beamforming.c -new file mode 100644 -index 000000000000..8eda985da204 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_beamforming.c -@@ -0,0 +1,2194 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_BEAMFORMING_C_ -+ -+#include -+#include -+ -+#ifdef CONFIG_BEAMFORMING -+ -+#ifdef RTW_BEAMFORMING_VERSION_2 -+ -+struct ndpa_sta_info { -+ u16 aid:12; -+ u16 feedback_type:1; -+ u16 nc_index:3; -+}; -+ -+static void _get_txvector_parameter(PADAPTER adapter, struct sta_info *sta, u8 *g_id, u16 *p_aid) -+{ -+ struct mlme_priv *mlme; -+ u16 aid; -+ u8 *bssid; -+ u16 val16; -+ u8 i; -+ -+ -+ mlme = &adapter->mlmepriv; -+ -+ if (check_fwstate(mlme, WIFI_AP_STATE)) { -+ /* -+ * Sent by an AP and addressed to a STA associated with that AP -+ * or sent by a DLS or TDLS STA in a direct path to -+ * a DLS or TDLS peer STA -+ */ -+ -+ aid = sta->cmn.aid; -+ bssid = adapter_mac_addr(adapter); -+ RTW_INFO("%s: AID=0x%x BSSID=" MAC_FMT "\n", -+ __FUNCTION__, sta->cmn.aid, MAC_ARG(bssid)); -+ -+ /* AID[0:8] */ -+ aid &= 0x1FF; -+ /* BSSID[44:47] xor BSSID[40:43] */ -+ val16 = ((bssid[5] & 0xF0) >> 4) ^ (bssid[5] & 0xF); -+ /* (dec(AID[0:8]) + dec(BSSID)*2^5) mod 2^9 */ -+ *p_aid = (aid + (val16 << 5)) & 0x1FF; -+ *g_id = 63; -+ } else if ((check_fwstate(mlme, WIFI_ADHOC_STATE) == _TRUE) -+ || (check_fwstate(mlme, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { -+ /* -+ * Otherwise, includes -+ * 1. Sent to an IBSS STA -+ * 2. Sent by an AP to a non associated STA -+ * 3. Sent to a STA for which it is not known -+ * which condition is applicable -+ */ -+ *p_aid = 0; -+ *g_id = 63; -+ } else { -+ /* Addressed to AP */ -+ bssid = sta->cmn.mac_addr; -+ RTW_INFO("%s: BSSID=" MAC_FMT "\n", __FUNCTION__, MAC_ARG(bssid)); -+ -+ /* BSSID[39:47] */ -+ *p_aid = (bssid[5] << 1) | (bssid[4] >> 7); -+ *g_id = 0; -+ } -+ -+ RTW_INFO("%s: GROUP_ID=0x%02x PARTIAL_AID=0x%04x\n", -+ __FUNCTION__, *g_id, *p_aid); -+} -+ -+/* -+ * Parameters -+ * adapter struct _adapter* -+ * sta struct sta_info* -+ * sta_bf_cap beamforming capabe of sta -+ * sounding_dim Number of Sounding Dimensions -+ * comp_steering Compressed Steering Number of Beamformer Antennas Supported -+ */ -+static void _get_sta_beamform_cap(PADAPTER adapter, struct sta_info *sta, -+ u8 *sta_bf_cap, u8 *sounding_dim, u8 *comp_steering) -+{ -+ struct beamforming_info *info; -+ struct mlme_priv *mlme; -+ struct ht_priv *ht; -+ u16 ht_bf_cap; -+#ifdef CONFIG_80211AC_VHT -+ struct vht_priv *vht; -+ u16 vht_bf_cap; -+#endif /* CONFIG_80211AC_VHT */ -+ -+ -+ *sta_bf_cap = 0; -+ *sounding_dim = 0; -+ *comp_steering = 0; -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ ht = &adapter->mlmepriv.htpriv; -+#ifdef CONFIG_80211AC_VHT -+ vht = &adapter->mlmepriv.vhtpriv; -+#endif /* CONFIG_80211AC_VHT */ -+ mlme = &adapter->mlmepriv; -+ -+ if (is_supported_ht(sta->wireless_mode) == _FALSE) -+ return; -+ -+ /* HT */ -+ if (check_fwstate(mlme, WIFI_AP_STATE)) { -+ /* Get peer clinet's BF cap: the cap. is intersected with associated AP.*/ -+ ht_bf_cap = sta->htpriv.beamform_cap; -+ RTW_INFO("At AP state, peer sta's ht_bf_cap=0x%x\n", ht_bf_cap); -+ -+ if (TEST_FLAG(ht_bf_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) { -+ info->beamforming_cap |= BEAMFORMER_CAP_HT_EXPLICIT; -+ *sta_bf_cap |= BEAMFORMEE_CAP_HT_EXPLICIT; -+ *comp_steering = (ht_bf_cap & BEAMFORMING_HT_BEAMFORMER_STEER_NUM) >> 4; -+ RTW_INFO("%s: we support BEAMFORMER_CAP_HT_EXPLICIT\n", __func__); -+ } -+ if (TEST_FLAG(ht_bf_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { -+ info->beamforming_cap |= BEAMFORMEE_CAP_HT_EXPLICIT; -+ *sta_bf_cap |= BEAMFORMER_CAP_HT_EXPLICIT; -+ *sounding_dim = (ht_bf_cap & BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP) >> 6; -+ RTW_INFO("%s: we support BEAMFORMEE_CAP_HT_EXPLICIT\n", __func__); -+ } -+ } else { -+ /* Get adapter's BF Cap: the cap. is intersected with associated AP.*/ -+ ht_bf_cap = ht->beamform_cap; -+ RTW_INFO("At non-AP state, adapter's ht_bf_cap=0x%x\n", ht_bf_cap); -+ -+ if (TEST_FLAG(ht_bf_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) { -+ info->beamforming_cap |= BEAMFORMEE_CAP_HT_EXPLICIT; -+ *sta_bf_cap |= BEAMFORMER_CAP_HT_EXPLICIT; -+ *sounding_dim = (ht_bf_cap & BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP) >> 6; -+ RTW_INFO("%s: we support BEAMFORMEE_CAP_HT_EXPLICIT\n", __func__); -+ } -+ if (TEST_FLAG(ht_bf_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { -+ info->beamforming_cap |= BEAMFORMER_CAP_HT_EXPLICIT; -+ *sta_bf_cap |= BEAMFORMEE_CAP_HT_EXPLICIT; -+ *comp_steering = (ht_bf_cap & BEAMFORMING_HT_BEAMFORMER_STEER_NUM) >> 4; -+ RTW_INFO("%s: we support BEAMFORMER_CAP_HT_EXPLICIT\n", __func__); -+ } -+ } -+ -+#ifdef CONFIG_80211AC_VHT -+ -+ if (is_supported_vht(sta->wireless_mode) == _FALSE) -+ return; -+ -+ /* VHT */ -+ if (check_fwstate(mlme, WIFI_AP_STATE)) { -+ /* Get peer clinet's BF cap: the cap. is intersected with associated AP.*/ -+ vht_bf_cap = sta->vhtpriv.beamform_cap; -+ RTW_INFO("At AP state, peer sta's vht_bf_cap=0x%x\n", vht_bf_cap); -+ -+ /* We are SU Beamformer because the STA is SU Beamformee */ -+ if (TEST_FLAG(vht_bf_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) { -+ info->beamforming_cap |= BEAMFORMER_CAP_VHT_SU; -+ *sta_bf_cap |= BEAMFORMEE_CAP_VHT_SU; -+ RTW_INFO("%s: we support BEAMFORMER_CAP_VHT_SU\n", __func__); -+ -+ /* We are MU Beamformer because the STA is MU Beamformee */ -+ if (TEST_FLAG(vht_bf_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE)) { -+ info->beamforming_cap |= BEAMFORMER_CAP_VHT_MU; -+ *sta_bf_cap |= BEAMFORMEE_CAP_VHT_MU; -+ RTW_INFO("%s: we support BEAMFORMER_CAP_VHT_MU\n", __func__); -+ } -+ -+ *comp_steering = (vht_bf_cap & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8; -+ } -+ /* We are SU Beamformee because the STA is SU Beamformer */ -+ if (TEST_FLAG(vht_bf_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { -+ info->beamforming_cap |= BEAMFORMEE_CAP_VHT_SU; -+ *sta_bf_cap |= BEAMFORMER_CAP_VHT_SU; -+ RTW_INFO("%s: we support BEAMFORMEE_CAP_VHT_SU\n", __func__); -+ -+ /* The STA is MU Beamformer, but we(AP) should not be MU Beamformee */ -+ if (TEST_FLAG(vht_bf_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { -+ RTW_WARN("%s: Associated STA should not be a MU BFer.\n", __func__); -+ } -+ -+ *sounding_dim = (vht_bf_cap & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12; -+ } -+ } else { -+ /* Get adapter's BF Cap: the cap. is intersected with associated AP.*/ -+ vht_bf_cap = vht->beamform_cap; -+ RTW_INFO("At non-AP state, adapter's vht_bf_cap=0x%x\n", vht_bf_cap); -+ -+ /* We are SU Beamformee */ -+ if (TEST_FLAG(vht_bf_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) { -+ info->beamforming_cap |= BEAMFORMEE_CAP_VHT_SU; -+ *sta_bf_cap |= BEAMFORMER_CAP_VHT_SU; -+ RTW_INFO("%s: we support BEAMFORMEE_CAP_VHT_SU\n", __func__); -+ -+ /* We are MU Beamformee */ -+ if (TEST_FLAG(vht_bf_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE)) { -+ info->beamforming_cap |= BEAMFORMEE_CAP_VHT_MU; -+ *sta_bf_cap |= BEAMFORMER_CAP_VHT_MU; -+ RTW_INFO("%s: we support BEAMFORMEE_CAP_VHT_MU\n", __func__); -+ } -+ -+ *sounding_dim = (vht_bf_cap & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12; -+ } -+ /* We are SU Beamformer */ -+ if (TEST_FLAG(vht_bf_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { -+ info->beamforming_cap |= BEAMFORMER_CAP_VHT_SU; -+ *sta_bf_cap |= BEAMFORMEE_CAP_VHT_SU; -+ RTW_INFO("%s: we support BEAMFORMER_CAP_VHT_SU\n", __func__); -+ -+ /* We are MU Beamformer, but client should not be a MU Beamformer */ -+ if (TEST_FLAG(vht_bf_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { -+ RTW_WARN("%s: non-AP state should not support MU BFer.\n", __func__); -+ } -+ -+ *comp_steering = (vht_bf_cap & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8; -+ } -+ } -+#endif /* CONFIG_80211AC_VHT */ -+ -+} -+ -+static u8 _send_ht_ndpa_packet(PADAPTER adapter, u8 *ra, enum channel_width bw) -+{ -+ /* General */ -+ struct xmit_priv *pxmitpriv; -+ struct mlme_ext_priv *pmlmeext; -+ struct mlme_ext_info *pmlmeinfo; -+ struct xmit_frame *pmgntframe; -+ /* Beamforming */ -+ struct beamforming_info *info; -+ struct beamformee_entry *bfee; -+ struct ndpa_sta_info sta_info; -+ u8 ActionHdr[4] = {ACT_CAT_VENDOR, 0x00, 0xE0, 0x4C}; -+ /* MISC */ -+ struct pkt_attrib *attrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ enum MGN_RATE txrate; -+ u8 *pframe; -+ u16 duration = 0; -+ u8 aSifsTime = 0; -+ -+ -+ RTW_INFO("+%s: Send to " MAC_FMT "\n", __FUNCTION__, MAC_ARG(ra)); -+ -+ pxmitpriv = &adapter->xmitpriv; -+ pmlmeext = &adapter->mlmeextpriv; -+ pmlmeinfo = &pmlmeext->mlmext_info; -+ bfee = rtw_bf_bfee_get_entry_by_addr(adapter, ra); -+ if (!bfee) { -+ RTW_ERR("%s: Cann't find beamformee entry!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (!pmgntframe) { -+ RTW_ERR("%s: alloc mgnt frame fail!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ -+ txrate = beamforming_get_htndp_tx_rate(GET_PDM_ODM(adapter), bfee->comp_steering_num_of_bfer); -+ -+ /* update attribute */ -+ attrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(adapter, attrib); -+ /*attrib->type = WIFI_MGT_TYPE;*/ /* set in update_mgntframe_attrib() */ -+ attrib->subtype = WIFI_ACTION_NOACK; -+ attrib->bwmode = bw; -+ /*attrib->qsel = QSLT_MGNT;*/ /* set in update_mgntframe_attrib() */ -+ attrib->order = 1; -+ attrib->rate = (u8)txrate; -+ attrib->bf_pkt_type = 0; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ /* Frame control */ -+ pwlanhdr->frame_ctl = 0; -+ set_frame_sub_type(pframe, attrib->subtype); -+ set_order_bit(pframe); -+ -+ /* Duration */ -+ if (pmlmeext->cur_wireless_mode == WIRELESS_11B) -+ aSifsTime = 10; -+ else -+ aSifsTime = 16; -+ duration = 2 * aSifsTime + 40; -+ if (bw == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ set_duration(pframe, duration); -+ -+ /* DA */ -+ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); -+ /* SA */ -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(adapter), ETH_ALEN); -+ /* BSSID */ -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ -+ /* HT control field */ -+ SET_HT_CTRL_CSI_STEERING(pframe + 24, 3); -+ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe + 24, 1); -+ -+ /* -+ * Frame Body -+ * Category field: vender-specific value, 0x7F -+ * OUI: 0x00E04C -+ */ -+ _rtw_memcpy(pframe + 28, ActionHdr, 4); -+ -+ attrib->pktlen = 32; -+ attrib->last_txcmdsz = attrib->pktlen; -+ -+ dump_mgntframe(adapter, pmgntframe); -+ -+ return _TRUE; -+} -+ -+static u8 _send_vht_ndpa_packet(PADAPTER adapter, u8 *ra, u16 aid, enum channel_width bw) -+{ -+ /* General */ -+ struct xmit_priv *pxmitpriv; -+ struct mlme_ext_priv *pmlmeext; -+ struct xmit_frame *pmgntframe; -+ /* Beamforming */ -+ struct beamforming_info *info; -+ struct beamformee_entry *bfee; -+ struct ndpa_sta_info sta_info; -+ /* MISC */ -+ struct pkt_attrib *attrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u8 *pframe; -+ enum MGN_RATE txrate; -+ u16 duration = 0; -+ u8 sequence = 0, aSifsTime = 0; -+ -+ -+ RTW_INFO("+%s: Send to " MAC_FMT "\n", __FUNCTION__, MAC_ARG(ra)); -+ -+ pxmitpriv = &adapter->xmitpriv; -+ pmlmeext = &adapter->mlmeextpriv; -+ info = GET_BEAMFORM_INFO(adapter); -+ bfee = rtw_bf_bfee_get_entry_by_addr(adapter, ra); -+ if (!bfee) { -+ RTW_ERR("%s: Cann't find beamformee entry!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (!pmgntframe) { -+ RTW_ERR("%s: alloc mgnt frame fail!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ -+ txrate = beamforming_get_vht_ndp_tx_rate(GET_PDM_ODM(adapter), bfee->comp_steering_num_of_bfer); -+ -+ /* update attribute */ -+ attrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(adapter, attrib); -+ /*pattrib->type = WIFI_MGT_TYPE;*/ /* set in update_mgntframe_attrib() */ -+ attrib->subtype = WIFI_NDPA; -+ attrib->bwmode = bw; -+ /*attrib->qsel = QSLT_MGNT;*/ /* set in update_mgntframe_attrib() */ -+ attrib->rate = (u8)txrate; -+ attrib->bf_pkt_type = 0; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, TXDESC_OFFSET + WLANHDR_OFFSET); -+ pframe = pmgntframe->buf_addr + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ /* Frame control */ -+ pwlanhdr->frame_ctl = 0; -+ set_frame_sub_type(pframe, attrib->subtype); -+ -+ /* Duration */ -+ if (is_supported_5g(pmlmeext->cur_wireless_mode) || is_supported_ht(pmlmeext->cur_wireless_mode)) -+ aSifsTime = 16; -+ else -+ aSifsTime = 10; -+ duration = 2 * aSifsTime + 44; -+ if (bw == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if (bw == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ set_duration(pframe, duration); -+ -+ /* RA */ -+ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); -+ -+ /* TA */ -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ /* Sounding Sequence, bit0~1 is reserved */ -+ sequence = info->sounding_sequence << 2; -+ if (info->sounding_sequence >= 0x3f) -+ info->sounding_sequence = 0; -+ else -+ info->sounding_sequence++; -+ _rtw_memcpy(pframe + 16, &sequence, 1); -+ -+ /* STA Info */ -+ /* -+ * "AID12" Equal to 0 if the STA is an AP, mesh STA or -+ * STA that is a member of an IBSS -+ */ -+ if (check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _FALSE) -+ aid = 0; -+ sta_info.aid = aid; -+ /* "Feedback Type" set to 0 for SU */ -+ sta_info.feedback_type = 0; -+ /* "Nc Index" reserved if the Feedback Type field indicates SU */ -+ sta_info.nc_index = 0; -+ _rtw_memcpy(pframe + 17, (u8 *)&sta_info, 2); -+ -+ attrib->pktlen = 19; -+ attrib->last_txcmdsz = attrib->pktlen; -+ -+ dump_mgntframe(adapter, pmgntframe); -+ -+ return _TRUE; -+} -+ -+static u8 _send_vht_mu_ndpa_packet(PADAPTER adapter, enum channel_width bw) -+{ -+ /* General */ -+ struct xmit_priv *pxmitpriv; -+ struct mlme_ext_priv *pmlmeext; -+ struct xmit_frame *pmgntframe; -+ /* Beamforming */ -+ struct beamforming_info *info; -+ struct sounding_info *sounding; -+ struct beamformee_entry *bfee; -+ struct ndpa_sta_info sta_info; -+ /* MISC */ -+ struct pkt_attrib *attrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ enum MGN_RATE txrate; -+ u8 *pframe; -+ u8 *ra = NULL; -+ u16 duration = 0; -+ u8 sequence = 0, aSifsTime = 0; -+ u8 i; -+ -+ -+ RTW_INFO("+%s\n", __FUNCTION__); -+ -+ pxmitpriv = &adapter->xmitpriv; -+ pmlmeext = &adapter->mlmeextpriv; -+ info = GET_BEAMFORM_INFO(adapter); -+ sounding = &info->sounding_info; -+ -+ txrate = MGN_VHT2SS_MCS0; -+ -+ /* -+ * Fill the first MU BFee entry (STA1) MAC addr to destination address then -+ * HW will change A1 to broadcast addr. -+ * 2015.05.28. Suggested by SD1 Chunchu. -+ */ -+ bfee = &info->bfee_entry[sounding->mu_sounding_list[0]]; -+ ra = bfee->mac_addr; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (!pmgntframe) { -+ RTW_ERR("%s: alloc mgnt frame fail!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ -+ /* update attribute */ -+ attrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(adapter, attrib); -+ /*attrib->type = WIFI_MGT_TYPE;*/ /* set in update_mgntframe_attrib() */ -+ attrib->subtype = WIFI_NDPA; -+ attrib->bwmode = bw; -+ /*attrib->qsel = QSLT_MGNT;*/ /* set in update_mgntframe_attrib() */ -+ attrib->rate = (u8)txrate; -+ /* Set TxBFPktType of Tx desc to unicast type if there is only one MU STA for HW design */ -+ if (info->sounding_info.candidate_mu_bfee_cnt > 1) -+ attrib->bf_pkt_type = 1; -+ else -+ attrib->bf_pkt_type = 0; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, TXDESC_OFFSET + WLANHDR_OFFSET); -+ pframe = pmgntframe->buf_addr + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ /* Frame control */ -+ pwlanhdr->frame_ctl = 0; -+ set_frame_sub_type(pframe, attrib->subtype); -+ -+ /* Duration */ -+ if (is_supported_5g(pmlmeext->cur_wireless_mode) || is_supported_ht(pmlmeext->cur_wireless_mode)) -+ aSifsTime = 16; -+ else -+ aSifsTime = 10; -+ duration = 2 * aSifsTime + 44; -+ if (bw == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if (bw == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ set_duration(pframe, duration); -+ -+ /* RA */ -+ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); -+ -+ /* TA */ -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ /* Sounding Sequence, bit0~1 is reserved */ -+ sequence = info->sounding_sequence << 2; -+ if (info->sounding_sequence >= 0x3f) -+ info->sounding_sequence = 0; -+ else -+ info->sounding_sequence++; -+ _rtw_memcpy(pframe + 16, &sequence, 1); -+ -+ attrib->pktlen = 17; -+ -+ /* -+ * Construct STA info. for multiple STAs -+ * STA Info1, ..., STA Info n -+ */ -+ for (i = 0; i < sounding->candidate_mu_bfee_cnt; i++) { -+ bfee = &info->bfee_entry[sounding->mu_sounding_list[i]]; -+ sta_info.aid = bfee->aid; -+ sta_info.feedback_type = 1; /* 1'b1: MU */ -+ sta_info.nc_index = 0; -+ _rtw_memcpy(pframe + attrib->pktlen, (u8 *)&sta_info, 2); -+ attrib->pktlen += 2; -+ } -+ -+ attrib->last_txcmdsz = attrib->pktlen; -+ -+ dump_mgntframe(adapter, pmgntframe); -+ -+ return _TRUE; -+} -+ -+static u8 _send_bf_report_poll(PADAPTER adapter, u8 *ra, u8 bFinalPoll) -+{ -+ /* General */ -+ struct xmit_priv *pxmitpriv; -+ struct xmit_frame *pmgntframe; -+ /* MISC */ -+ struct pkt_attrib *attrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u8 *pframe; -+ -+ -+ RTW_INFO("+%s: Send to " MAC_FMT "\n", __FUNCTION__, MAC_ARG(ra)); -+ -+ pxmitpriv = &adapter->xmitpriv; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (!pmgntframe) { -+ RTW_ERR("%s: alloc mgnt frame fail!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ -+ /* update attribute */ -+ attrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(adapter, attrib); -+ /*attrib->type = WIFI_MGT_TYPE;*/ /* set in update_mgntframe_attrib() */ -+ attrib->subtype = WIFI_BF_REPORT_POLL; -+ attrib->bwmode = CHANNEL_WIDTH_20; -+ /*attrib->qsel = QSLT_MGNT;*/ /* set in update_mgntframe_attrib() */ -+ attrib->rate = MGN_6M; -+ if (bFinalPoll) -+ attrib->bf_pkt_type = 3; -+ else -+ attrib->bf_pkt_type = 2; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, TXDESC_OFFSET + WLANHDR_OFFSET); -+ pframe = pmgntframe->buf_addr + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ /* Frame control */ -+ pwlanhdr->frame_ctl = 0; -+ set_frame_sub_type(pframe, attrib->subtype); -+ -+ /* Duration */ -+ set_duration(pframe, 100); -+ -+ /* RA */ -+ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); -+ -+ /* TA */ -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ /* Feedback Segment Retransmission Bitmap */ -+ pframe[16] = 0xFF; -+ -+ attrib->pktlen = 17; -+ attrib->last_txcmdsz = attrib->pktlen; -+ -+ dump_mgntframe(adapter, pmgntframe); -+ -+ return _TRUE; -+} -+ -+static void _sounding_update_min_period(PADAPTER adapter, u16 period, u8 leave) -+{ -+ struct beamforming_info *info; -+ struct beamformee_entry *bfee; -+ u8 i = 0; -+ u16 min_val = 0xFFFF; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ if (_TRUE == leave) { -+ /* -+ * When a BFee left, -+ * we need to find the latest min sounding period -+ * from the remaining BFees -+ */ -+ for (i = 0; i < MAX_BEAMFORMEE_ENTRY_NUM; i++) { -+ bfee = &info->bfee_entry[i]; -+ if ((bfee->used == _TRUE) -+ && (bfee->sound_period < min_val)) -+ min_val = bfee->sound_period; -+ } -+ -+ if (min_val == 0xFFFF) -+ info->sounding_info.min_sounding_period = 0; -+ else -+ info->sounding_info.min_sounding_period = min_val; -+ } else { -+ if ((info->sounding_info.min_sounding_period == 0) -+ || (period < info->sounding_info.min_sounding_period)) -+ info->sounding_info.min_sounding_period = period; -+ } -+} -+ -+static void _sounding_init(struct sounding_info *sounding) -+{ -+ _rtw_memset(sounding->su_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_SU); -+ _rtw_memset(sounding->mu_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_MU); -+ sounding->state = SOUNDING_STATE_NONE; -+ sounding->su_bfee_curidx = 0xFF; -+ sounding->candidate_mu_bfee_cnt = 0; -+ sounding->min_sounding_period = 0; -+ sounding->sound_remain_cnt_per_period = 0; -+} -+ -+static void _sounding_reset_vars(PADAPTER adapter) -+{ -+ struct beamforming_info *info; -+ struct sounding_info *sounding; -+ u8 idx; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ sounding = &info->sounding_info; -+ -+ _rtw_memset(sounding->su_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_SU); -+ _rtw_memset(sounding->mu_sounding_list, 0xFF, MAX_NUM_BEAMFORMEE_MU); -+ sounding->su_bfee_curidx = 0xFF; -+ sounding->candidate_mu_bfee_cnt = 0; -+ -+ /* Clear bSound flag for the new period */ -+ for (idx = 0; idx < MAX_BEAMFORMEE_ENTRY_NUM; idx++) { -+ if ((info->bfee_entry[idx].used == _TRUE) -+ && (info->bfee_entry[idx].sounding == _TRUE)) { -+ info->bfee_entry[idx].sounding = _FALSE; -+ info->bfee_entry[idx].bCandidateSoundingPeer = _FALSE; -+ } -+ } -+} -+ -+/* -+ * Return -+ * 0 Prepare sounding list OK -+ * -1 Fail to prepare sounding list, because no beamformee need to souding -+ * -2 Fail to prepare sounding list, because beamformee state not ready -+ * -+ */ -+static int _sounding_get_list(PADAPTER adapter) -+{ -+ struct beamforming_info *info; -+ struct sounding_info *sounding; -+ struct beamformee_entry *bfee; -+ u8 i, mu_idx = 0, su_idx = 0, not_ready = 0; -+ int ret = 0; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ sounding = &info->sounding_info; -+ -+ /* Add MU BFee list first because MU priority is higher than SU */ -+ for (i = 0; i < MAX_BEAMFORMEE_ENTRY_NUM; i++) { -+ bfee = &info->bfee_entry[i]; -+ if (bfee->used == _FALSE) -+ continue; -+ -+ if (bfee->state != BEAMFORM_ENTRY_HW_STATE_ADDED) { -+ RTW_ERR("%s: Invalid BFee idx(%d) Hw state=%d\n", __FUNCTION__, i, bfee->state); -+ not_ready++; -+ continue; -+ } -+ -+ /* -+ * Decrease BFee's SoundCnt per period -+ * If the remain count is 0, -+ * then it can be sounded at this time -+ */ -+ if (bfee->SoundCnt) { -+ bfee->SoundCnt--; -+ if (bfee->SoundCnt) -+ continue; -+ } -+ -+ /* -+ * -+ * If the STA supports MU BFee capability then we add it to MUSoundingList directly -+ * because we can only sound one STA by unicast NDPA with MU cap enabled to get correct channel info. -+ * Suggested by BB team Luke Lee. 2015.11.25. -+ */ -+ if (bfee->cap & BEAMFORMEE_CAP_VHT_MU) { -+ /* MU BFee */ -+ if (mu_idx >= MAX_NUM_BEAMFORMEE_MU) { -+ RTW_ERR("%s: Too much MU bfee entry(Limit:%d)\n", __FUNCTION__, MAX_NUM_BEAMFORMEE_MU); -+ continue; -+ } -+ -+ if (bfee->bApplySounding == _TRUE) { -+ bfee->bCandidateSoundingPeer = _TRUE; -+ bfee->SoundCnt = GetInitSoundCnt(bfee->sound_period, sounding->min_sounding_period); -+ sounding->mu_sounding_list[mu_idx] = i; -+ mu_idx++; -+ } -+ } else if (bfee->cap & (BEAMFORMEE_CAP_VHT_SU|BEAMFORMEE_CAP_HT_EXPLICIT)) { -+ /* SU BFee (HT/VHT) */ -+ if (su_idx >= MAX_NUM_BEAMFORMEE_SU) { -+ RTW_ERR("%s: Too much SU bfee entry(Limit:%d)\n", __FUNCTION__, MAX_NUM_BEAMFORMEE_SU); -+ continue; -+ } -+ -+ if (bfee->bDeleteSounding == _TRUE) { -+ sounding->su_sounding_list[su_idx] = i; -+ su_idx++; -+ } else if ((bfee->bApplySounding == _TRUE) -+ && (bfee->bSuspendSUCap == _FALSE)) { -+ bfee->bCandidateSoundingPeer = _TRUE; -+ bfee->SoundCnt = GetInitSoundCnt(bfee->sound_period, sounding->min_sounding_period); -+ sounding->su_sounding_list[su_idx] = i; -+ su_idx++; -+ } -+ } -+ } -+ -+ sounding->candidate_mu_bfee_cnt = mu_idx; -+ -+ if (su_idx + mu_idx == 0) { -+ ret = -1; -+ if (not_ready) -+ ret = -2; -+ } -+ -+ RTW_INFO("-%s: There are %d SU and %d MU BFees in this sounding period\n", __FUNCTION__, su_idx, mu_idx); -+ -+ return ret; -+} -+ -+static void _sounding_handler(PADAPTER adapter) -+{ -+ struct beamforming_info *info; -+ struct sounding_info *sounding; -+ struct beamformee_entry *bfee; -+ u8 su_idx, i; -+ u32 timeout_period = 0; -+ u8 set_timer = _FALSE; -+ int ret = 0; -+ static u16 wait_cnt = 0; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ sounding = &info->sounding_info; -+ -+ RTW_DBG("+%s: state=%d\n", __FUNCTION__, sounding->state); -+ if ((sounding->state != SOUNDING_STATE_INIT) -+ && (sounding->state != SOUNDING_STATE_SU_SOUNDDOWN) -+ && (sounding->state != SOUNDING_STATE_MU_SOUNDDOWN) -+ && (sounding->state != SOUNDING_STATE_SOUNDING_TIMEOUT)) { -+ RTW_WARN("%s: Invalid State(%d) and return!\n", __FUNCTION__, sounding->state); -+ return; -+ } -+ -+ if (sounding->state == SOUNDING_STATE_INIT) { -+ RTW_INFO("%s: Sounding start\n", __FUNCTION__); -+ -+ /* Init Var */ -+ _sounding_reset_vars(adapter); -+ -+ /* Get the sounding list of this sounding period */ -+ ret = _sounding_get_list(adapter); -+ if (ret == -1) { -+ wait_cnt = 0; -+ sounding->state = SOUNDING_STATE_NONE; -+ RTW_ERR("%s: No BFees found, set to SOUNDING_STATE_NONE\n", __FUNCTION__); -+ info->sounding_running--; -+ return; -+ } -+ if (ret == -2) { -+ RTW_WARN("%s: Temporarily cann't find BFee to sounding\n", __FUNCTION__); -+ if (wait_cnt < 5) { -+ wait_cnt++; -+ } else { -+ wait_cnt = 0; -+ sounding->state = SOUNDING_STATE_NONE; -+ RTW_ERR("%s: Wait changing state timeout!! Set to SOUNDING_STATE_NONE\n", __FUNCTION__); -+ } -+ info->sounding_running--; -+ return; -+ } -+ if (ret != 0) { -+ wait_cnt = 0; -+ RTW_ERR("%s: Unkown state(%d)!\n", __FUNCTION__, ret); -+ info->sounding_running--; -+ return; -+ -+ } -+ -+ wait_cnt = 0; -+ -+ if (check_fwstate(&adapter->mlmepriv, WIFI_UNDER_SURVEY) == _TRUE) { -+ RTW_INFO("%s: Sounding abort! scanning APs...\n", __FUNCTION__); -+ info->sounding_running--; -+ return; -+ } -+ -+ rtw_ps_deny(adapter, PS_DENY_BEAMFORMING); -+ LeaveAllPowerSaveModeDirect(adapter); -+ } -+ -+ /* Get non-sound SU BFee index */ -+ for (i = 0; i < MAX_NUM_BEAMFORMEE_SU; i++) { -+ su_idx = sounding->su_sounding_list[i]; -+ if (su_idx >= MAX_BEAMFORMEE_ENTRY_NUM) -+ continue; -+ bfee = &info->bfee_entry[su_idx]; -+ if (_FALSE == bfee->sounding) -+ break; -+ } -+ if (i < MAX_NUM_BEAMFORMEE_SU) { -+ sounding->su_bfee_curidx = su_idx; -+ /* Set to sounding start state */ -+ sounding->state = SOUNDING_STATE_SU_START; -+ RTW_DBG("%s: Set to SOUNDING_STATE_SU_START\n", __FUNCTION__); -+ -+ bfee->sounding = _TRUE; -+ /* Reset sounding timeout flag for the new sounding */ -+ bfee->bSoundingTimeout = _FALSE; -+ -+ if (_TRUE == bfee->bDeleteSounding) { -+ u8 res = _FALSE; -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_END_PERIOD, &res, 1, 0); -+ return; -+ } -+ -+ /* Start SU sounding */ -+ if (bfee->cap & BEAMFORMEE_CAP_VHT_SU) -+ _send_vht_ndpa_packet(adapter, bfee->mac_addr, bfee->aid, bfee->sound_bw); -+ else if (bfee->cap & BEAMFORMEE_CAP_HT_EXPLICIT) -+ _send_ht_ndpa_packet(adapter, bfee->mac_addr, bfee->sound_bw); -+ -+ /* Set sounding timeout timer */ -+ _set_timer(&info->sounding_timeout_timer, SU_SOUNDING_TIMEOUT); -+ return; -+ } -+ -+ if (sounding->candidate_mu_bfee_cnt > 0) { -+ /* -+ * If there is no SU BFee then find MU BFee and perform MU sounding -+ * -+ * Need to check the MU starting condition. 2015.12.15. -+ */ -+ sounding->state = SOUNDING_STATE_MU_START; -+ RTW_DBG("%s: Set to SOUNDING_STATE_MU_START\n", __FUNCTION__); -+ -+ /* Update MU BFee info */ -+ for (i = 0; i < sounding->candidate_mu_bfee_cnt; i++) { -+ bfee = &info->bfee_entry[sounding->mu_sounding_list[i]]; -+ bfee->sounding = _TRUE; -+ } -+ -+ /* Send MU NDPA */ -+ bfee = &info->bfee_entry[sounding->mu_sounding_list[0]]; -+ _send_vht_mu_ndpa_packet(adapter, bfee->sound_bw); -+ -+ /* Send BF report poll if more than 1 MU STA */ -+ for (i = 1; i < sounding->candidate_mu_bfee_cnt; i++) { -+ bfee = &info->bfee_entry[sounding->mu_sounding_list[i]]; -+ -+ if (i == (sounding->candidate_mu_bfee_cnt - 1))/* The last STA*/ -+ _send_bf_report_poll(adapter, bfee->mac_addr, _TRUE); -+ else -+ _send_bf_report_poll(adapter, bfee->mac_addr, _FALSE); -+ } -+ -+ sounding->candidate_mu_bfee_cnt = 0; -+ -+ /* Set sounding timeout timer */ -+ _set_timer(&info->sounding_timeout_timer, MU_SOUNDING_TIMEOUT); -+ return; -+ } -+ -+ info->sounding_running--; -+ sounding->state = SOUNDING_STATE_INIT; -+ RTW_INFO("%s: Sounding finished!\n", __FUNCTION__); -+ rtw_ps_deny_cancel(adapter, PS_DENY_BEAMFORMING); -+} -+ -+static void _sounding_force_stop(PADAPTER adapter) -+{ -+ struct beamforming_info *info; -+ struct sounding_info *sounding; -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ sounding = &info->sounding_info; -+ -+ if ((sounding->state == SOUNDING_STATE_SU_START) -+ || (sounding->state == SOUNDING_STATE_MU_START)) { -+ u8 res = _FALSE; -+ _cancel_timer_ex(&info->sounding_timeout_timer); -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_END_PERIOD, &res, 1, 1); -+ return; -+ } -+ -+ info->sounding_running--; -+ sounding->state = SOUNDING_STATE_INIT; -+ RTW_INFO("%s: Sounding finished!\n", __FUNCTION__); -+ rtw_ps_deny_cancel(adapter, PS_DENY_BEAMFORMING); -+} -+ -+static void _sounding_timer_handler(void *FunctionContext) -+{ -+ PADAPTER adapter; -+ struct beamforming_info *info; -+ struct sounding_info *sounding; -+ static u8 delay = 0; -+ -+ -+ RTW_DBG("+%s\n", __FUNCTION__); -+ -+ adapter = (PADAPTER)FunctionContext; -+ info = GET_BEAMFORM_INFO(adapter); -+ sounding = &info->sounding_info; -+ -+ if (SOUNDING_STATE_NONE == sounding->state) { -+ RTW_INFO("%s: Stop!\n", __FUNCTION__); -+ if (info->sounding_running) -+ RTW_WARN("%s: souding_running=%d when thread stop!\n", -+ __FUNCTION__, info->sounding_running); -+ return; -+ } -+ -+ _set_timer(&info->sounding_timer, sounding->min_sounding_period); -+ -+ if (!info->sounding_running) { -+ if (SOUNDING_STATE_INIT != sounding->state) { -+ RTW_WARN("%s: state(%d) != SOUNDING_STATE_INIT!!\n", __FUNCTION__, sounding->state); -+ sounding->state = SOUNDING_STATE_INIT; -+ } -+ delay = 0; -+ info->sounding_running++; -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_START_PERIOD, NULL, 0, 1); -+ } else { -+ if (delay != 0xFF) -+ delay++; -+ RTW_WARN("%s: souding is still processing...(state:%d, running:%d, delay:%d)\n", -+ __FUNCTION__, sounding->state, info->sounding_running, delay); -+ if (delay > 3) { -+ RTW_WARN("%s: Stop sounding!!\n", __FUNCTION__); -+ _sounding_force_stop(adapter); -+ } -+ } -+} -+ -+static void _sounding_timeout_timer_handler(void *FunctionContext) -+{ -+ PADAPTER adapter; -+ struct beamforming_info *info; -+ struct sounding_info *sounding; -+ struct beamformee_entry *bfee; -+ -+ -+ RTW_WARN("+%s\n", __FUNCTION__); -+ -+ adapter = (PADAPTER)FunctionContext; -+ info = GET_BEAMFORM_INFO(adapter); -+ sounding = &info->sounding_info; -+ -+ if (SOUNDING_STATE_SU_START == sounding->state) { -+ sounding->state = SOUNDING_STATE_SOUNDING_TIMEOUT; -+ RTW_ERR("%s: Set to SU SOUNDING_STATE_SOUNDING_TIMEOUT\n", __FUNCTION__); -+ /* SU BFee */ -+ bfee = &info->bfee_entry[sounding->su_bfee_curidx]; -+ bfee->bSoundingTimeout = _TRUE; -+ RTW_WARN("%s: The BFee entry[%d] is Sounding Timeout!\n", __FUNCTION__, sounding->su_bfee_curidx); -+ } else if (SOUNDING_STATE_MU_START == sounding->state) { -+ sounding->state = SOUNDING_STATE_SOUNDING_TIMEOUT; -+ RTW_ERR("%s: Set to MU SOUNDING_STATE_SOUNDING_TIMEOUT\n", __FUNCTION__); -+ } else { -+ RTW_WARN("%s: unexpected sounding state:0x%02x\n", __FUNCTION__, sounding->state); -+ return; -+ } -+ -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_START_PERIOD, NULL, 0, 1); -+} -+ -+static struct beamformer_entry *_bfer_get_free_entry(PADAPTER adapter) -+{ -+ u8 i = 0; -+ struct beamforming_info *info; -+ struct beamformer_entry *bfer; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ for (i = 0; i < MAX_BEAMFORMER_ENTRY_NUM; i++) { -+ bfer = &info->bfer_entry[i]; -+ if (bfer->used == _FALSE) -+ return bfer; -+ } -+ -+ return NULL; -+} -+ -+static struct beamformer_entry *_bfer_get_entry_by_addr(PADAPTER adapter, u8 *ra) -+{ -+ u8 i = 0; -+ struct beamforming_info *info; -+ struct beamformer_entry *bfer; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ for (i = 0; i < MAX_BEAMFORMER_ENTRY_NUM; i++) { -+ bfer = &info->bfer_entry[i]; -+ if (bfer->used == _FALSE) -+ continue; -+ if (_rtw_memcmp(ra, bfer->mac_addr, ETH_ALEN) == _TRUE) -+ return bfer; -+ } -+ -+ return NULL; -+} -+ -+static struct beamformer_entry *_bfer_add_entry(PADAPTER adapter, -+ struct sta_info *sta, u8 bf_cap, u8 sounding_dim, u8 comp_steering) -+{ -+ struct mlme_priv *mlme; -+ struct beamforming_info *info; -+ struct beamformer_entry *bfer; -+ u8 *bssid; -+ u16 val16; -+ u8 i; -+ -+ -+ mlme = &adapter->mlmepriv; -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ bfer = _bfer_get_entry_by_addr(adapter, sta->cmn.mac_addr); -+ if (!bfer) { -+ bfer = _bfer_get_free_entry(adapter); -+ if (!bfer) -+ return NULL; -+ } -+ -+ bfer->used = _TRUE; -+ _get_txvector_parameter(adapter, sta, &bfer->g_id, &bfer->p_aid); -+ _rtw_memcpy(bfer->mac_addr, sta->cmn.mac_addr, ETH_ALEN); -+ bfer->cap = bf_cap; -+ bfer->state = BEAMFORM_ENTRY_HW_STATE_ADD_INIT; -+ bfer->NumofSoundingDim = sounding_dim; -+ -+ if (TEST_FLAG(bf_cap, BEAMFORMER_CAP_VHT_MU)) { -+ info->beamformer_mu_cnt += 1; -+ bfer->aid = sta->cmn.aid; -+ } else if (TEST_FLAG(bf_cap, BEAMFORMER_CAP_VHT_SU|BEAMFORMER_CAP_HT_EXPLICIT)) { -+ info->beamformer_su_cnt += 1; -+ -+ /* Record HW idx info */ -+ for (i = 0; i < MAX_NUM_BEAMFORMER_SU; i++) { -+ if ((info->beamformer_su_reg_maping & BIT(i)) == 0) { -+ info->beamformer_su_reg_maping |= BIT(i); -+ bfer->su_reg_index = i; -+ break; -+ } -+ } -+ RTW_INFO("%s: Add BFer entry beamformer_su_reg_maping=%#x, su_reg_index=%d\n", -+ __FUNCTION__, info->beamformer_su_reg_maping, bfer->su_reg_index); -+ } -+ -+ return bfer; -+} -+ -+static void _bfer_remove_entry(PADAPTER adapter, struct beamformer_entry *entry) -+{ -+ struct beamforming_info *info; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ entry->state = BEAMFORM_ENTRY_HW_STATE_DELETE_INIT; -+ -+ if (TEST_FLAG(entry->cap, BEAMFORMER_CAP_VHT_MU)) { -+ info->beamformer_mu_cnt -= 1; -+ _rtw_memset(entry->gid_valid, 0, 8); -+ _rtw_memset(entry->user_position, 0, 16); -+ } else if (TEST_FLAG(entry->cap, BEAMFORMER_CAP_VHT_SU|BEAMFORMER_CAP_HT_EXPLICIT)) { -+ info->beamformer_su_cnt -= 1; -+ } -+ -+ if (info->beamformer_mu_cnt == 0) -+ info->beamforming_cap &= ~BEAMFORMEE_CAP_VHT_MU; -+ if (info->beamformer_su_cnt == 0) -+ info->beamforming_cap &= ~(BEAMFORMEE_CAP_VHT_SU|BEAMFORMEE_CAP_HT_EXPLICIT); -+} -+ -+static u8 _bfer_set_entry_gid(PADAPTER adapter, u8 *addr, u8 *gid, u8 *position) -+{ -+ struct beamformer_entry bfer; -+ -+ memset(&bfer, 0, sizeof(bfer)); -+ memcpy(bfer.mac_addr, addr, ETH_ALEN); -+ -+ /* Parsing Membership Status Array */ -+ memcpy(bfer.gid_valid, gid, 8); -+ -+ /* Parsing User Position Array */ -+ memcpy(bfer.user_position, position, 16); -+ -+ /* Config HW GID table */ -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_SET_GID_TABLE, (u8 *) &bfer, -+ sizeof(bfer), 1); -+ -+ return _SUCCESS; -+} -+ -+static struct beamformee_entry *_bfee_get_free_entry(PADAPTER adapter) -+{ -+ u8 i = 0; -+ struct beamforming_info *info; -+ struct beamformee_entry *bfee; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ for (i = 0; i < MAX_BEAMFORMEE_ENTRY_NUM; i++) { -+ bfee = &info->bfee_entry[i]; -+ if (bfee->used == _FALSE) -+ return bfee; -+ } -+ -+ return NULL; -+} -+ -+static struct beamformee_entry *_bfee_get_entry_by_addr(PADAPTER adapter, u8 *ra) -+{ -+ u8 i = 0; -+ struct beamforming_info *info; -+ struct beamformee_entry *bfee; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ for (i = 0; i < MAX_BEAMFORMEE_ENTRY_NUM; i++) { -+ bfee = &info->bfee_entry[i]; -+ if (bfee->used == _FALSE) -+ continue; -+ if (_rtw_memcmp(ra, bfee->mac_addr, ETH_ALEN) == _TRUE) -+ return bfee; -+ } -+ -+ return NULL; -+} -+ -+static u8 _bfee_get_first_su_entry_idx(PADAPTER adapter, struct beamformee_entry *ignore) -+{ -+ struct beamforming_info *info; -+ struct beamformee_entry *bfee; -+ u8 i; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ for (i = 0; i < MAX_BEAMFORMEE_ENTRY_NUM; i++) { -+ bfee = &info->bfee_entry[i]; -+ if (ignore && (bfee == ignore)) -+ continue; -+ if (bfee->used == _FALSE) -+ continue; -+ if ((!TEST_FLAG(bfee->cap, BEAMFORMEE_CAP_VHT_MU)) -+ && TEST_FLAG(bfee->cap, BEAMFORMEE_CAP_VHT_SU|BEAMFORMEE_CAP_HT_EXPLICIT)) -+ return i; -+ } -+ -+ return 0xFF; -+} -+ -+/* -+ * Description: -+ * Get the first entry index of MU Beamformee. -+ * -+ * Return Value: -+ * Index of the first MU sta, or 0xFF for invalid index. -+ * -+ * 2015.05.25. Created by tynli. -+ * -+ */ -+static u8 _bfee_get_first_mu_entry_idx(PADAPTER adapter, struct beamformee_entry *ignore) -+{ -+ struct beamforming_info *info; -+ struct beamformee_entry *bfee; -+ u8 i; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ for (i = 0; i < MAX_BEAMFORMEE_ENTRY_NUM; i++) { -+ bfee = &info->bfee_entry[i]; -+ if (ignore && (bfee == ignore)) -+ continue; -+ if (bfee->used == _FALSE) -+ continue; -+ if (TEST_FLAG(bfee->cap, BEAMFORMEE_CAP_VHT_MU)) -+ return i; -+ } -+ -+ return 0xFF; -+} -+ -+static struct beamformee_entry *_bfee_add_entry(PADAPTER adapter, -+ struct sta_info *sta, u8 bf_cap, u8 sounding_dim, u8 comp_steering) -+{ -+ struct mlme_priv *mlme; -+ struct beamforming_info *info; -+ struct beamformee_entry *bfee; -+ u8 *bssid; -+ u16 val16; -+ u8 i; -+ -+ -+ mlme = &adapter->mlmepriv; -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ bfee = _bfee_get_entry_by_addr(adapter, sta->cmn.mac_addr); -+ if (!bfee) { -+ bfee = _bfee_get_free_entry(adapter); -+ if (!bfee) -+ return NULL; -+ } -+ -+ bfee->used = _TRUE; -+ bfee->aid = sta->cmn.aid; -+ bfee->mac_id = sta->cmn.mac_id; -+ bfee->sound_bw = sta->cmn.bw_mode; -+ -+ _get_txvector_parameter(adapter, sta, &bfee->g_id, &bfee->p_aid); -+ sta->cmn.bf_info.g_id = bfee->g_id; -+ sta->cmn.bf_info.p_aid = bfee->p_aid; -+ -+ _rtw_memcpy(bfee->mac_addr, sta->cmn.mac_addr, ETH_ALEN); -+ bfee->txbf = _FALSE; -+ bfee->sounding = _FALSE; -+ bfee->sound_period = 40; -+ _sounding_update_min_period(adapter, bfee->sound_period, _FALSE); -+ bfee->SoundCnt = GetInitSoundCnt(bfee->sound_period, info->sounding_info.min_sounding_period); -+ bfee->cap = bf_cap; -+ bfee->state = BEAMFORM_ENTRY_HW_STATE_ADD_INIT; -+ -+ bfee->bCandidateSoundingPeer = _FALSE; -+ bfee->bSoundingTimeout = _FALSE; -+ bfee->bDeleteSounding = _FALSE; -+ bfee->bApplySounding = _TRUE; -+ -+ bfee->tx_timestamp = 0; -+ bfee->tx_bytes = 0; -+ -+ bfee->LogStatusFailCnt = 0; -+ bfee->NumofSoundingDim = sounding_dim; -+ bfee->comp_steering_num_of_bfer = comp_steering; -+ bfee->bSuspendSUCap = _FALSE; -+ -+ if (TEST_FLAG(bf_cap, BEAMFORMEE_CAP_VHT_MU)) { -+ info->beamformee_mu_cnt += 1; -+ info->first_mu_bfee_index = _bfee_get_first_mu_entry_idx(adapter, NULL); -+ -+ if (_TRUE == info->bEnableSUTxBFWorkAround) { -+ /* When the first MU BFee added, discard SU BFee bfee's capability */ -+ if ((info->beamformee_mu_cnt == 1) && (info->beamformee_su_cnt > 0)) { -+ if (info->TargetSUBFee) { -+ info->TargetSUBFee->bSuspendSUCap = _TRUE; -+ info->TargetSUBFee->bDeleteSounding = _TRUE; -+ } else { -+ RTW_ERR("%s: UNEXPECTED!! info->TargetSUBFee is NULL!", __FUNCTION__); -+ } -+ info->TargetSUBFee = NULL; -+ _rtw_memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_SET_CSI_REPORT, (u8*)&info->TargetCSIInfo, sizeof(struct _RT_CSI_INFO), 0); -+ } -+ } -+ -+ /* Record HW idx info */ -+ for (i = 0; i < MAX_NUM_BEAMFORMEE_MU; i++) { -+ if ((info->beamformee_mu_reg_maping & BIT(i)) == 0) { -+ info->beamformee_mu_reg_maping |= BIT(i); -+ bfee->mu_reg_index = i; -+ break; -+ } -+ } -+ RTW_INFO("%s: Add BFee entry beamformee_mu_reg_maping=%#x, mu_reg_index=%d\n", -+ __FUNCTION__, info->beamformee_mu_reg_maping, bfee->mu_reg_index); -+ -+ } else if (TEST_FLAG(bf_cap, BEAMFORMEE_CAP_VHT_SU|BEAMFORMEE_CAP_HT_EXPLICIT)) { -+ info->beamformee_su_cnt += 1; -+ -+ if (_TRUE == info->bEnableSUTxBFWorkAround) { -+ /* Record the first SU BFee index. We only allow the first SU BFee to be sound */ -+ if ((info->beamformee_su_cnt == 1) && (info->beamformee_mu_cnt == 0)) { -+ info->TargetSUBFee = bfee; -+ _rtw_memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); -+ bfee->bSuspendSUCap = _FALSE; -+ } else { -+ bfee->bSuspendSUCap = _TRUE; -+ } -+ } -+ -+ /* Record HW idx info */ -+ for (i = 0; i < MAX_NUM_BEAMFORMEE_SU; i++) { -+ if ((info->beamformee_su_reg_maping & BIT(i)) == 0) { -+ info->beamformee_su_reg_maping |= BIT(i); -+ bfee->su_reg_index = i; -+ break; -+ } -+ } -+ RTW_INFO("%s: Add BFee entry beamformee_su_reg_maping=%#x, su_reg_index=%d\n", -+ __FUNCTION__, info->beamformee_su_reg_maping, bfee->su_reg_index); -+ } -+ -+ return bfee; -+} -+ -+static void _bfee_remove_entry(PADAPTER adapter, struct beamformee_entry *entry) -+{ -+ struct beamforming_info *info; -+ u8 idx; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ entry->state = BEAMFORM_ENTRY_HW_STATE_DELETE_INIT; -+ -+ if (TEST_FLAG(entry->cap, BEAMFORMEE_CAP_VHT_MU)) { -+ info->beamformee_mu_cnt -= 1; -+ info->first_mu_bfee_index = _bfee_get_first_mu_entry_idx(adapter, entry); -+ -+ if (_TRUE == info->bEnableSUTxBFWorkAround) { -+ if ((info->beamformee_mu_cnt == 0) && (info->beamformee_su_cnt > 0)) { -+ idx = _bfee_get_first_su_entry_idx(adapter, NULL); -+ info->TargetSUBFee = &info->bfee_entry[idx]; -+ _rtw_memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); -+ info->TargetSUBFee->bSuspendSUCap = _FALSE; -+ } -+ } -+ } else if (TEST_FLAG(entry->cap, BEAMFORMEE_CAP_VHT_SU|BEAMFORMEE_CAP_HT_EXPLICIT)) { -+ info->beamformee_su_cnt -= 1; -+ -+ /* When the target SU BFee leaves, disable workaround */ -+ if ((_TRUE == info->bEnableSUTxBFWorkAround) -+ && (entry == info->TargetSUBFee)) { -+ entry->bSuspendSUCap = _TRUE; -+ info->TargetSUBFee = NULL; -+ _rtw_memset(&info->TargetCSIInfo, 0, sizeof(struct _RT_CSI_INFO)); -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_SET_CSI_REPORT, (u8*)&info->TargetCSIInfo, sizeof(struct _RT_CSI_INFO), 0); -+ } -+ } -+ -+ if (info->beamformee_mu_cnt == 0) -+ info->beamforming_cap &= ~BEAMFORMER_CAP_VHT_MU; -+ if (info->beamformee_su_cnt == 0) -+ info->beamforming_cap &= ~(BEAMFORMER_CAP_VHT_SU|BEAMFORMER_CAP_HT_EXPLICIT); -+ -+ _sounding_update_min_period(adapter, 0, _TRUE); -+} -+ -+static enum beamforming_cap _bfee_get_entry_cap_by_macid(PADAPTER adapter, u8 macid) -+{ -+ struct beamforming_info *info; -+ struct beamformee_entry *bfee; -+ u8 i; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ for (i = 0; i < MAX_BEAMFORMER_ENTRY_NUM; i++) { -+ bfee = &info->bfee_entry[i]; -+ if (bfee->used == _FALSE) -+ continue; -+ if (bfee->mac_id == macid) -+ return bfee->cap; -+ } -+ -+ return BEAMFORMING_CAP_NONE; -+} -+ -+static void _beamforming_enter(PADAPTER adapter, void *p) -+{ -+ struct mlme_priv *mlme; -+ struct ht_priv *htpriv; -+#ifdef CONFIG_80211AC_VHT -+ struct vht_priv *vhtpriv; -+#endif -+ struct mlme_ext_priv *mlme_ext; -+ struct sta_info *sta, *sta_copy; -+ struct beamforming_info *info; -+ struct beamformer_entry *bfer = NULL; -+ struct beamformee_entry *bfee = NULL; -+ u8 wireless_mode; -+ u8 sta_bf_cap; -+ u8 sounding_dim = 0; /* number of sounding dimensions */ -+ u8 comp_steering_num = 0; /* compressed steering number */ -+ -+ -+ mlme = &adapter->mlmepriv; -+ htpriv = &mlme->htpriv; -+#ifdef CONFIG_80211AC_VHT -+ vhtpriv = &mlme->vhtpriv; -+#endif -+ mlme_ext = &adapter->mlmeextpriv; -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ sta_copy = (struct sta_info *)p; -+ sta = rtw_get_stainfo(&adapter->stapriv, sta_copy->cmn.mac_addr); -+ if (!sta) { -+ RTW_ERR("%s: Cann't find STA info for " MAC_FMT "\n", -+ __FUNCTION__, MAC_ARG(sta_copy->cmn.mac_addr)); -+ return; -+ } -+ -+ RTW_INFO("%s: find STA info for " MAC_FMT "\n", -+ __FUNCTION__, MAC_ARG(sta_copy->cmn.mac_addr)); -+ -+ if (sta != sta_copy) { -+ RTW_WARN("%s: Origin sta(fake)=%p realsta=%p for " MAC_FMT "\n", -+ __FUNCTION__, sta_copy, sta, MAC_ARG(sta_copy->cmn.mac_addr)); -+ } -+ -+ /* The current setting does not support Beaforming */ -+ wireless_mode = sta->wireless_mode; -+ if ((is_supported_ht(wireless_mode) == _FALSE) -+ && (is_supported_vht(wireless_mode) == _FALSE)) { -+ RTW_WARN("%s: Not support HT or VHT mode\n", __FUNCTION__); -+ return; -+ } -+ -+ if ((0 == htpriv->beamform_cap) -+#ifdef CONFIG_80211AC_VHT -+ && (0 == vhtpriv->beamform_cap) -+#endif -+ ) { -+ RTW_INFO("The configuration disabled Beamforming! Skip...\n"); -+ return; -+ } -+ -+ _get_sta_beamform_cap(adapter, sta, -+ &sta_bf_cap, &sounding_dim, &comp_steering_num); -+ RTW_INFO("STA Beamforming Capability=0x%02X\n", sta_bf_cap); -+ if (sta_bf_cap == BEAMFORMING_CAP_NONE) -+ return; -+ if ((sta_bf_cap & BEAMFORMEE_CAP_HT_EXPLICIT) -+ || (sta_bf_cap & BEAMFORMEE_CAP_VHT_SU) -+ || (sta_bf_cap & BEAMFORMEE_CAP_VHT_MU)) -+ sta_bf_cap |= BEAMFORMEE_CAP; -+ if ((sta_bf_cap & BEAMFORMER_CAP_HT_EXPLICIT) -+ || (sta_bf_cap & BEAMFORMER_CAP_VHT_SU) -+ || (sta_bf_cap & BEAMFORMER_CAP_VHT_MU)) -+ sta_bf_cap |= BEAMFORMER_CAP; -+ -+ if (sta_bf_cap & BEAMFORMER_CAP) { -+ /* The other side is beamformer */ -+ bfer = _bfer_add_entry(adapter, sta, sta_bf_cap, sounding_dim, comp_steering_num); -+ if (!bfer) -+ RTW_ERR("%s: Fail to allocate bfer entry!\n", __FUNCTION__); -+ } -+ if (sta_bf_cap & BEAMFORMEE_CAP) { -+ /* The other side is beamformee */ -+ bfee = _bfee_add_entry(adapter, sta, sta_bf_cap, sounding_dim, comp_steering_num); -+ if (!bfee) -+ RTW_ERR("%s: Fail to allocate bfee entry!\n", __FUNCTION__); -+ } -+ if (!bfer && !bfee) -+ return; -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_ENTER, (u8*)sta); -+ -+ /* Perform sounding if there is BFee */ -+ if ((info->beamformee_su_cnt != 0) -+ || (info->beamformee_mu_cnt != 0)) { -+ if (SOUNDING_STATE_NONE == info->sounding_info.state) { -+ info->sounding_info.state = SOUNDING_STATE_INIT; -+ /* Start sounding after 2 sec */ -+ _set_timer(&info->sounding_timer, 2000); -+ } -+ } -+} -+ -+static void _beamforming_reset(PADAPTER adapter) -+{ -+ RTW_ERR("%s: Not ready!!\n", __FUNCTION__); -+} -+ -+static void _beamforming_leave(PADAPTER adapter, u8 *ra) -+{ -+ struct beamforming_info *info; -+ struct beamformer_entry *bfer = NULL; -+ struct beamformee_entry *bfee = NULL; -+ u8 bHwStateAddInit = _FALSE; -+ -+ -+ RTW_INFO("+%s\n", __FUNCTION__); -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ bfer = _bfer_get_entry_by_addr(adapter, ra); -+ bfee = _bfee_get_entry_by_addr(adapter, ra); -+ -+ if (!bfer && !bfee) { -+ RTW_WARN("%s: " MAC_FMT " is neither beamforming ee or er!!\n", -+ __FUNCTION__, MAC_ARG(ra)); -+ return; -+ } -+ -+ if (bfer) -+ _bfer_remove_entry(adapter, bfer); -+ -+ if (bfee) -+ _bfee_remove_entry(adapter, bfee); -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_LEAVE, ra); -+ -+ /* Stop sounding if there is no any BFee */ -+ if ((info->beamformee_su_cnt == 0) -+ && (info->beamformee_mu_cnt == 0)) { -+ _cancel_timer_ex(&info->sounding_timer); -+ _sounding_init(&info->sounding_info); -+ } -+ -+ RTW_INFO("-%s\n", __FUNCTION__); -+} -+ -+static void _beamforming_sounding_down(PADAPTER adapter, u8 status) -+{ -+ struct beamforming_info *info; -+ struct sounding_info *sounding; -+ struct beamformee_entry *bfee; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ sounding = &info->sounding_info; -+ -+ RTW_INFO("+%s: sounding=%d, status=0x%02x\n", __FUNCTION__, sounding->state, status); -+ -+ if (sounding->state == SOUNDING_STATE_MU_START) { -+ RTW_INFO("%s: MU sounding done\n", __FUNCTION__); -+ sounding->state = SOUNDING_STATE_MU_SOUNDDOWN; -+ RTW_INFO("%s: Set to SOUNDING_STATE_MU_SOUNDDOWN\n", __FUNCTION__); -+ info->SetHalSoundownOnDemandCnt++; -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_STATUS, &status); -+ } else if (sounding->state == SOUNDING_STATE_SU_START) { -+ RTW_INFO("%s: SU entry[%d] sounding down\n", __FUNCTION__, sounding->su_bfee_curidx); -+ bfee = &info->bfee_entry[sounding->su_bfee_curidx]; -+ sounding->state = SOUNDING_STATE_SU_SOUNDDOWN; -+ RTW_INFO("%s: Set to SOUNDING_STATE_SU_SOUNDDOWN\n", __FUNCTION__); -+ -+ /* -+ * -+ * bfee->bSoundingTimeout this flag still cannot avoid -+ * old sound down event happens in the new sounding period. -+ * 2015.12.10 -+ */ -+ if (_TRUE == bfee->bSoundingTimeout) { -+ RTW_WARN("%s: The entry[%d] is bSoundingTimeout!\n", __FUNCTION__, sounding->su_bfee_curidx); -+ bfee->bSoundingTimeout = _FALSE; -+ return; -+ } -+ -+ if (_TRUE == status) { -+ /* success */ -+ bfee->LogStatusFailCnt = 0; -+ info->SetHalSoundownOnDemandCnt++; -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_STATUS, &status); -+ } else if (_TRUE == bfee->bDeleteSounding) { -+ RTW_WARN("%s: Delete entry[%d] sounding info!\n", __FUNCTION__, sounding->su_bfee_curidx); -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_STATUS, &status); -+ bfee->bDeleteSounding = _FALSE; -+ } else { -+ bfee->LogStatusFailCnt++; -+ RTW_WARN("%s: LogStatusFailCnt=%d\n", __FUNCTION__, bfee->LogStatusFailCnt); -+ if (bfee->LogStatusFailCnt > 30) { -+ RTW_ERR("%s: LogStatusFailCnt > 30, Stop SOUNDING!!\n", __FUNCTION__); -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_LEAVE, bfee->mac_addr, ETH_ALEN, 1); -+ } -+ } -+ } else { -+ RTW_WARN("%s: unexpected sounding state:0x%02x\n", __FUNCTION__, sounding->state); -+ return; -+ } -+ -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_START_PERIOD, NULL, 0, 0); -+} -+ -+static void _c2h_snd_txbf(PADAPTER adapter, u8 *buf, u8 buf_len) -+{ -+ struct beamforming_info *info; -+ u8 res; -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ -+ _cancel_timer_ex(&info->sounding_timeout_timer); -+ -+ res = C2H_SND_TXBF_GET_SND_RESULT(buf) ? _TRUE : _FALSE; -+ RTW_INFO("+%s: %s\n", __FUNCTION__, res==_TRUE?"Success":"Fail!"); -+ -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_END_PERIOD, &res, 1, 1); -+} -+ -+/* -+ * Description: -+ * This function is for phydm only -+ */ -+enum beamforming_cap rtw_bf_bfee_get_entry_cap_by_macid(void *mlme, u8 macid) -+{ -+ PADAPTER adapter; -+ enum beamforming_cap cap = BEAMFORMING_CAP_NONE; -+ -+ -+ adapter = mlme_to_adapter((struct mlme_priv *)mlme); -+ cap = _bfee_get_entry_cap_by_macid(adapter, macid); -+ -+ return cap; -+} -+ -+struct beamformer_entry *rtw_bf_bfer_get_entry_by_addr(PADAPTER adapter, u8 *ra) -+{ -+ return _bfer_get_entry_by_addr(adapter, ra); -+} -+ -+struct beamformee_entry *rtw_bf_bfee_get_entry_by_addr(PADAPTER adapter, u8 *ra) -+{ -+ return _bfee_get_entry_by_addr(adapter, ra); -+} -+ -+void rtw_bf_get_ndpa_packet(PADAPTER adapter, union recv_frame *precv_frame) -+{ -+ RTW_DBG("+%s\n", __FUNCTION__); -+} -+ -+u32 rtw_bf_get_report_packet(PADAPTER adapter, union recv_frame *precv_frame) -+{ -+ u32 ret = _SUCCESS; -+ struct beamforming_info *info; -+ struct beamformee_entry *bfee = NULL; -+ u8 *pframe; -+ u32 frame_len; -+ u8 *ta; -+ u8 *frame_body; -+ u8 category, action; -+ u8 *pMIMOCtrlField, *pCSIMatrix; -+ u8 Nc = 0, Nr = 0, CH_W = 0, Ng = 0, CodeBook = 0; -+ u16 CSIMatrixLen = 0; -+ -+ -+ RTW_INFO("+%s\n", __FUNCTION__); -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ pframe = precv_frame->u.hdr.rx_data; -+ frame_len = precv_frame->u.hdr.len; -+ -+ /* Memory comparison to see if CSI report is the same with previous one */ -+ ta = get_addr2_ptr(pframe); -+ bfee = _bfee_get_entry_by_addr(adapter, ta); -+ if (!bfee) -+ return _FAIL; -+ -+ frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ category = frame_body[0]; -+ action = frame_body[1]; -+ -+ if ((category == RTW_WLAN_CATEGORY_VHT) -+ && (action == RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING)) { -+ pMIMOCtrlField = pframe + 26; -+ Nc = (*pMIMOCtrlField) & 0x7; -+ Nr = ((*pMIMOCtrlField) & 0x38) >> 3; -+ CH_W = (((*pMIMOCtrlField) & 0xC0) >> 6); -+ Ng = (*(pMIMOCtrlField+1)) & 0x3; -+ CodeBook = ((*(pMIMOCtrlField+1)) & 0x4) >> 2; -+ /* -+ * 24+(1+1+3)+2 -+ * ==> MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2) -+ */ -+ pCSIMatrix = pMIMOCtrlField + 3 + Nc; -+ CSIMatrixLen = frame_len - 26 - 3 - Nc; -+ info->TargetCSIInfo.bVHT = _TRUE; -+ } else if ((category == RTW_WLAN_CATEGORY_HT) -+ && (action == RTW_WLAN_ACTION_HT_COMPRESS_BEAMFORMING)) { -+ pMIMOCtrlField = pframe + 26; -+ Nc = (*pMIMOCtrlField) & 0x3; -+ Nr = ((*pMIMOCtrlField) & 0xC) >> 2; -+ CH_W = ((*pMIMOCtrlField) & 0x10) >> 4; -+ Ng = ((*pMIMOCtrlField) & 0x60) >> 5; -+ CodeBook = ((*(pMIMOCtrlField+1)) & 0x6) >> 1; -+ /* -+ * 24+(1+1+6)+2 -+ * ==> MAC header+(Category+ActionCode+MIMOControlField)+SNR(Nc=2) -+ */ -+ pCSIMatrix = pMIMOCtrlField + 6 + Nr; -+ CSIMatrixLen = frame_len - 26 - 6 - Nr; -+ info->TargetCSIInfo.bVHT = _FALSE; -+ } -+ -+ /* Update current CSI report info */ -+ if ((_TRUE == info->bEnableSUTxBFWorkAround) -+ && (info->TargetSUBFee == bfee)) { -+ if ((info->TargetCSIInfo.Nc != Nc) || (info->TargetCSIInfo.Nr != Nr) || -+ (info->TargetCSIInfo.ChnlWidth != CH_W) || (info->TargetCSIInfo.Ng != Ng) || -+ (info->TargetCSIInfo.CodeBook != CodeBook)) { -+ info->TargetCSIInfo.Nc = Nc; -+ info->TargetCSIInfo.Nr = Nr; -+ info->TargetCSIInfo.ChnlWidth = CH_W; -+ info->TargetCSIInfo.Ng = Ng; -+ info->TargetCSIInfo.CodeBook = CodeBook; -+ -+ rtw_bf_cmd(adapter, BEAMFORMING_CTRL_SET_CSI_REPORT, (u8*)&info->TargetCSIInfo, sizeof(struct _RT_CSI_INFO), 1); -+ } -+ } -+ -+ RTW_INFO("%s: pkt type=%d-%d, Nc=%d, Nr=%d, CH_W=%d, Ng=%d, CodeBook=%d\n", -+ __FUNCTION__, category, action, Nc, Nr, CH_W, Ng, CodeBook); -+ -+ return ret; -+} -+ -+u8 rtw_bf_send_vht_gid_mgnt_packet(PADAPTER adapter, u8 *ra, u8 *gid, u8 *position) -+{ -+ /* General */ -+ struct xmit_priv *xmitpriv; -+ struct mlme_priv *mlmepriv; -+ struct xmit_frame *pmgntframe; -+ /* MISC */ -+ struct pkt_attrib *attrib; -+ struct rtw_ieee80211_hdr *wlanhdr; -+ u8 *pframe, *ptr; -+ -+ -+ xmitpriv = &adapter->xmitpriv; -+ mlmepriv = &adapter->mlmepriv; -+ -+ pmgntframe = alloc_mgtxmitframe(xmitpriv); -+ if (!pmgntframe) -+ return _FALSE; -+ -+ /* update attribute */ -+ attrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(adapter, attrib); -+ attrib->rate = MGN_6M; -+ attrib->bwmode = CHANNEL_WIDTH_20; -+ attrib->subtype = WIFI_ACTION; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)pmgntframe->buf_addr + TXDESC_OFFSET; -+ wlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ wlanhdr->frame_ctl = 0; -+ set_frame_sub_type(pframe, attrib->subtype); -+ set_duration(pframe, 0); -+ SetFragNum(pframe, 0); -+ SetSeqNum(pframe, 0); -+ -+ _rtw_memcpy(wlanhdr->addr1, ra, ETH_ALEN); -+ _rtw_memcpy(wlanhdr->addr2, adapter_mac_addr(adapter), ETH_ALEN); -+ _rtw_memcpy(wlanhdr->addr3, get_bssid(mlmepriv), ETH_ALEN); -+ -+ pframe[24] = RTW_WLAN_CATEGORY_VHT; -+ pframe[25] = RTW_WLAN_ACTION_VHT_GROUPID_MANAGEMENT; -+ /* Set Membership Status Array */ -+ ptr = pframe + 26; -+ _rtw_memcpy(ptr, gid, 8); -+ /* Set User Position Array */ -+ ptr = pframe + 34; -+ _rtw_memcpy(ptr, position, 16); -+ -+ attrib->pktlen = 54; -+ attrib->last_txcmdsz = attrib->pktlen; -+ -+ dump_mgntframe(adapter, pmgntframe); -+ -+ return _TRUE; -+} -+ -+/* -+ * Description: -+ * On VHT GID management frame by an MU beamformee. -+ */ -+void rtw_bf_get_vht_gid_mgnt_packet(PADAPTER adapter, union recv_frame *precv_frame) -+{ -+ u8 *pframe; -+ u8 *ta, *gid, *position; -+ -+ -+ RTW_DBG("+%s\n", __FUNCTION__); -+ -+ pframe = precv_frame->u.hdr.rx_data; -+ -+ /* Get address by Addr2 */ -+ ta = get_addr2_ptr(pframe); -+ /* Remove signaling TA */ -+ ta[0] &= 0xFE; -+ -+ /* Membership Status Array */ -+ gid = pframe + 26; -+ /* User Position Array */ -+ position= pframe + 34; -+ -+ _bfer_set_entry_gid(adapter, ta, gid, position); -+} -+ -+void rtw_bf_init(PADAPTER adapter) -+{ -+ struct beamforming_info *info; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ info->beamforming_cap = BEAMFORMING_CAP_NONE; -+ info->beamforming_state = BEAMFORMING_STATE_IDLE; -+/* -+ info->bfee_entry[MAX_BEAMFORMEE_ENTRY_NUM]; -+ info->bfer_entry[MAX_BEAMFORMER_ENTRY_NUM]; -+*/ -+ info->sounding_sequence = 0; -+ info->beamformee_su_cnt = 0; -+ info->beamformer_su_cnt = 0; -+ info->beamformee_su_reg_maping = 0; -+ info->beamformer_su_reg_maping = 0; -+ info->beamformee_mu_cnt = 0; -+ info->beamformer_mu_cnt = 0; -+ info->beamformee_mu_reg_maping = 0; -+ info->first_mu_bfee_index = 0xFF; -+ info->mu_bfer_curidx = 0xFF; -+ info->cur_csi_rpt_rate = HALMAC_OFDM24; -+ -+ _sounding_init(&info->sounding_info); -+ rtw_init_timer(&info->sounding_timer, adapter, _sounding_timer_handler, adapter); -+ rtw_init_timer(&info->sounding_timeout_timer, adapter, _sounding_timeout_timer_handler, adapter); -+ -+ info->SetHalBFEnterOnDemandCnt = 0; -+ info->SetHalBFLeaveOnDemandCnt = 0; -+ info->SetHalSoundownOnDemandCnt = 0; -+ -+ info->bEnableSUTxBFWorkAround = _TRUE; -+ info->TargetSUBFee = NULL; -+ -+ info->sounding_running = 0; -+} -+ -+void rtw_bf_cmd_hdl(PADAPTER adapter, u8 type, u8 *pbuf) -+{ -+ switch (type) { -+ case BEAMFORMING_CTRL_ENTER: -+ _beamforming_enter(adapter, pbuf); -+ break; -+ -+ case BEAMFORMING_CTRL_LEAVE: -+ if (pbuf == NULL) -+ _beamforming_reset(adapter); -+ else -+ _beamforming_leave(adapter, pbuf); -+ break; -+ -+ case BEAMFORMING_CTRL_START_PERIOD: -+ _sounding_handler(adapter); -+ break; -+ -+ case BEAMFORMING_CTRL_END_PERIOD: -+ _beamforming_sounding_down(adapter, *pbuf); -+ break; -+ -+ case BEAMFORMING_CTRL_SET_GID_TABLE: -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_SET_GID_TABLE, pbuf); -+ break; -+ -+ case BEAMFORMING_CTRL_SET_CSI_REPORT: -+ rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_CSI_REPORT, pbuf); -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+u8 rtw_bf_cmd(PADAPTER adapter, s32 type, u8 *pbuf, s32 size, u8 enqueue) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ u8 *wk_buf; -+ u8 res = _SUCCESS; -+ -+ -+ if (!enqueue) { -+ rtw_bf_cmd_hdl(adapter, type, pbuf); -+ goto exit; -+ } -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ if (pbuf != NULL) { -+ wk_buf = rtw_zmalloc(size); -+ if (wk_buf == NULL) { -+ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memcpy(wk_buf, pbuf, size); -+ } else { -+ wk_buf = NULL; -+ size = 0; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = BEAMFORMING_WK_CID; -+ pdrvextra_cmd_parm->type = type; -+ pdrvextra_cmd_parm->size = size; -+ pdrvextra_cmd_parm->pbuf = wk_buf; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ return res; -+} -+ -+void rtw_bf_update_attrib(PADAPTER adapter, struct pkt_attrib *attrib, struct sta_info *sta) -+{ -+ if (sta) { -+ attrib->txbf_g_id = sta->cmn.bf_info.g_id; -+ attrib->txbf_p_aid = sta->cmn.bf_info.p_aid; -+ } -+} -+ -+void rtw_bf_c2h_handler(PADAPTER adapter, u8 id, u8 *buf, u8 buf_len) -+{ -+ switch (id) { -+ case CMD_ID_C2H_SND_TXBF: -+ _c2h_snd_txbf(adapter, buf, buf_len); -+ break; -+ } -+} -+ -+#define toMbps(bytes, secs) (rtw_division64(bytes >> 17, secs)) -+void rtw_bf_update_traffic(PADAPTER adapter) -+{ -+ struct beamforming_info *info; -+ struct sounding_info *sounding; -+ struct beamformee_entry *bfee; -+ struct sta_info *sta; -+ u8 bfee_cnt, sounding_idx, i; -+ u16 tp[MAX_BEAMFORMEE_ENTRY_NUM] = {0}; -+ u8 tx_rate[MAX_BEAMFORMEE_ENTRY_NUM] = {0}; -+ u64 tx_bytes, last_bytes; -+ u32 time; -+ systime last_timestamp; -+ u8 set_timer = _FALSE; -+ -+ -+ info = GET_BEAMFORM_INFO(adapter); -+ sounding = &info->sounding_info; -+ -+ /* Check any bfee exist? */ -+ bfee_cnt = info->beamformee_su_cnt + info->beamformee_mu_cnt; -+ if (bfee_cnt == 0) -+ return; -+ -+ for (i = 0; i < MAX_BEAMFORMEE_ENTRY_NUM; i++) { -+ bfee = &info->bfee_entry[i]; -+ if (_FALSE == bfee->used) -+ continue; -+ -+ sta = rtw_get_stainfo(&adapter->stapriv, bfee->mac_addr); -+ if (!sta) { -+ RTW_ERR("%s: Cann't find sta_info for " MAC_FMT "!\n", __FUNCTION__, MAC_ARG(bfee->mac_addr)); -+ continue; -+ } -+ -+ last_timestamp = bfee->tx_timestamp; -+ last_bytes = bfee->tx_bytes; -+ bfee->tx_timestamp = rtw_get_current_time(); -+ bfee->tx_bytes = sta->sta_stats.tx_bytes; -+ if (last_timestamp) { -+ if (bfee->tx_bytes >= last_bytes) -+ tx_bytes = bfee->tx_bytes - last_bytes; -+ else -+ tx_bytes = bfee->tx_bytes + (~last_bytes); -+ time = rtw_get_time_interval_ms(last_timestamp, bfee->tx_timestamp); -+ time = (time > 1000) ? time/1000 : 1; -+ tp[i] = toMbps(tx_bytes, time); -+ tx_rate[i] = rtw_get_current_tx_rate(adapter, sta); -+ RTW_INFO("%s: BFee idx(%d), MadId(%d), TxTP=%lld bytes (%d Mbps), txrate=%d\n", -+ __FUNCTION__, i, bfee->mac_id, tx_bytes, tp[i], tx_rate[i]); -+ } -+ } -+ -+ sounding_idx = phydm_get_beamforming_sounding_info(GET_PDM_ODM(adapter), tp, MAX_BEAMFORMEE_ENTRY_NUM, tx_rate); -+ -+ for (i = 0; i < MAX_BEAMFORMEE_ENTRY_NUM; i++) { -+ bfee = &info->bfee_entry[i]; -+ if (_FALSE == bfee->used) { -+ if (sounding_idx & BIT(i)) -+ RTW_WARN("%s: bfee(%d) not in used but need sounding?!\n", __FUNCTION__, i); -+ continue; -+ } -+ -+ if (sounding_idx & BIT(i)) { -+ if (_FALSE == bfee->bApplySounding) { -+ bfee->bApplySounding = _TRUE; -+ bfee->SoundCnt = 0; -+ set_timer = _TRUE; -+ } -+ } else { -+ if (_TRUE == bfee->bApplySounding) { -+ bfee->bApplySounding = _FALSE; -+ bfee->bDeleteSounding = _TRUE; -+ bfee->SoundCnt = 0; -+ set_timer = _TRUE; -+ } -+ } -+ } -+ -+ if (_TRUE == set_timer) { -+ if (SOUNDING_STATE_NONE == info->sounding_info.state) { -+ info->sounding_info.state = SOUNDING_STATE_INIT; -+ _set_timer(&info->sounding_timer, 0); -+ } -+ } -+} -+ -+#else /* !RTW_BEAMFORMING_VERSION_2 */ -+ -+/*PHYDM_BF - (BEAMFORMING_SUPPORT == 1)*/ -+u32 rtw_beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame) -+{ -+ u32 ret = _SUCCESS; -+ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -+ -+ ret = beamforming_get_report_frame(pDM_Odm, precv_frame); -+ return ret; -+} -+ -+void rtw_beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -+ -+ beamforming_get_ndpa_frame(pDM_Odm, precv_frame); -+} -+ -+void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -+ -+ /*(BEAMFORMING_SUPPORT == 1)- for PHYDM beamfoming*/ -+ switch (type) { -+ case BEAMFORMING_CTRL_ENTER: { -+ struct sta_info *psta = (void *)pbuf; -+ u16 staIdx = psta->cmn.mac_id; -+ -+ beamforming_enter(pDM_Odm, staIdx, adapter_mac_addr(psta->padapter)); -+ break; -+ } -+ case BEAMFORMING_CTRL_LEAVE: -+ beamforming_leave(pDM_Odm, pbuf); -+ break; -+ default: -+ break; -+ -+ } -+} -+ -+u8 beamforming_wk_cmd(_adapter *padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 res = _SUCCESS; -+ -+ /*20170214 ad_hoc mode and mp_mode not support BF*/ -+ if ((padapter->registrypriv.mp_mode == 1) -+ || (pmlmeinfo->state == WIFI_FW_ADHOC_STATE)) -+ return res; -+ -+ if (enqueue) { -+ u8 *wk_buf; -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ if (pbuf != NULL) { -+ wk_buf = rtw_zmalloc(size); -+ if (wk_buf == NULL) { -+ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memcpy(wk_buf, pbuf, size); -+ } else { -+ wk_buf = NULL; -+ size = 0; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = BEAMFORMING_WK_CID; -+ pdrvextra_cmd_parm->type = type; -+ pdrvextra_cmd_parm->size = size; -+ pdrvextra_cmd_parm->pbuf = wk_buf; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ } else -+ beamforming_wk_hdl(padapter, type, pbuf); -+ -+exit: -+ -+ -+ return res; -+} -+ -+void update_attrib_txbf_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta) -+{ -+ if (psta) { -+ pattrib->txbf_g_id = psta->cmn.bf_info.g_id; -+ pattrib->txbf_p_aid = psta->cmn.bf_info.p_aid; -+ } -+} -+#endif /* !RTW_BEAMFORMING_VERSION_2 */ -+ -+#endif /* CONFIG_BEAMFORMING */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_br_ext.c b/drivers/staging/rtl8723cs/core/rtw_br_ext.c -new file mode 100644 -index 000000000000..9a0effd8b7ea ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_br_ext.c -@@ -0,0 +1,1581 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_BR_EXT_C_ -+ -+#ifdef __KERNEL__ -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+#endif -+ -+#if 1 /* rtw_wifi_driver */ -+ #include -+#else /* rtw_wifi_driver */ -+ #include "./8192cd_cfg.h" -+ -+ #ifndef __KERNEL__ -+ #include "./sys-support.h" -+ #endif -+ -+ #include "./8192cd.h" -+ #include "./8192cd_headers.h" -+ #include "./8192cd_br_ext.h" -+ #include "./8192cd_debug.h" -+#endif /* rtw_wifi_driver */ -+ -+#ifdef CL_IPV6_PASS -+ #ifdef __KERNEL__ -+ #include -+ #include -+ #include -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) -+ #include -+ #else -+ #include -+ #endif -+ #endif -+#endif -+ -+#ifdef CONFIG_BR_EXT -+ -+/* #define BR_EXT_DEBUG */ -+ -+#define NAT25_IPV4 01 -+#define NAT25_IPV6 02 -+#define NAT25_IPX 03 -+#define NAT25_APPLE 04 -+#define NAT25_PPPOE 05 -+ -+#define RTL_RELAY_TAG_LEN (ETH_ALEN) -+#define TAG_HDR_LEN 4 -+ -+#define MAGIC_CODE 0x8186 -+#define MAGIC_CODE_LEN 2 -+#define WAIT_TIME_PPPOE 5 /* waiting time for pppoe server in sec */ -+ -+/*----------------------------------------------------------------- -+ How database records network address: -+ 0 1 2 3 4 5 6 7 8 9 10 -+ |----|----|----|----|----|----|----|----|----|----|----| -+ IPv4 |type| | IP addr | -+ IPX |type| Net addr | Node addr | -+ IPX |type| Net addr |Sckt addr| -+ Apple |type| Network |node| -+ PPPoE |type| SID | AC MAC | -+-----------------------------------------------------------------*/ -+ -+ -+/* Find a tag in pppoe frame and return the pointer */ -+static __inline__ unsigned char *__nat25_find_pppoe_tag(struct pppoe_hdr *ph, unsigned short type) -+{ -+ unsigned char *cur_ptr, *start_ptr; -+ unsigned short tagLen, tagType; -+ -+ start_ptr = cur_ptr = (unsigned char *)ph->tag; -+ while ((cur_ptr - start_ptr) < ntohs(ph->length)) { -+ /* prevent un-alignment access */ -+ tagType = (unsigned short)((cur_ptr[0] << 8) + cur_ptr[1]); -+ tagLen = (unsigned short)((cur_ptr[2] << 8) + cur_ptr[3]); -+ if (tagType == type) -+ return cur_ptr; -+ cur_ptr = cur_ptr + TAG_HDR_LEN + tagLen; -+ } -+ return 0; -+} -+ -+ -+static __inline__ int __nat25_add_pppoe_tag(struct sk_buff *skb, struct pppoe_tag *tag) -+{ -+ struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN); -+ int data_len; -+ -+ data_len = tag->tag_len + TAG_HDR_LEN; -+ if (skb_tailroom(skb) < data_len) { -+ _DEBUG_ERR("skb_tailroom() failed in add SID tag!\n"); -+ return -1; -+ } -+ -+ skb_put(skb, data_len); -+ /* have a room for new tag */ -+ memmove(((unsigned char *)ph->tag + data_len), (unsigned char *)ph->tag, ntohs(ph->length)); -+ ph->length = htons(ntohs(ph->length) + data_len); -+ memcpy((unsigned char *)ph->tag, tag, data_len); -+ return data_len; -+} -+ -+static int skb_pull_and_merge(struct sk_buff *skb, unsigned char *src, int len) -+{ -+ int tail_len; -+ unsigned long end, tail; -+ -+ if ((src + len) > skb_tail_pointer(skb) || skb->len < len) -+ return -1; -+ -+ tail = (unsigned long)skb_tail_pointer(skb); -+ end = (unsigned long)src + len; -+ if (tail < end) -+ return -1; -+ -+ tail_len = (int)(tail - end); -+ if (tail_len > 0) -+ memmove(src, src + len, tail_len); -+ -+ skb_trim(skb, skb->len - len); -+ return 0; -+} -+ -+static __inline__ unsigned long __nat25_timeout(_adapter *priv) -+{ -+ unsigned long timeout; -+ -+ timeout = jiffies - NAT25_AGEING_TIME * HZ; -+ -+ return timeout; -+} -+ -+ -+static __inline__ int __nat25_has_expired(_adapter *priv, -+ struct nat25_network_db_entry *fdb) -+{ -+ if (time_before_eq(fdb->ageing_timer, __nat25_timeout(priv))) -+ return 1; -+ -+ return 0; -+} -+ -+ -+static __inline__ void __nat25_generate_ipv4_network_addr(unsigned char *networkAddr, -+ unsigned int *ipAddr) -+{ -+ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); -+ -+ networkAddr[0] = NAT25_IPV4; -+ memcpy(networkAddr + 7, (unsigned char *)ipAddr, 4); -+} -+ -+ -+static __inline__ void __nat25_generate_ipx_network_addr_with_node(unsigned char *networkAddr, -+ unsigned int *ipxNetAddr, unsigned char *ipxNodeAddr) -+{ -+ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); -+ -+ networkAddr[0] = NAT25_IPX; -+ memcpy(networkAddr + 1, (unsigned char *)ipxNetAddr, 4); -+ memcpy(networkAddr + 5, ipxNodeAddr, 6); -+} -+ -+ -+static __inline__ void __nat25_generate_ipx_network_addr_with_socket(unsigned char *networkAddr, -+ unsigned int *ipxNetAddr, unsigned short *ipxSocketAddr) -+{ -+ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); -+ -+ networkAddr[0] = NAT25_IPX; -+ memcpy(networkAddr + 1, (unsigned char *)ipxNetAddr, 4); -+ memcpy(networkAddr + 5, (unsigned char *)ipxSocketAddr, 2); -+} -+ -+ -+static __inline__ void __nat25_generate_apple_network_addr(unsigned char *networkAddr, -+ unsigned short *network, unsigned char *node) -+{ -+ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); -+ -+ networkAddr[0] = NAT25_APPLE; -+ memcpy(networkAddr + 1, (unsigned char *)network, 2); -+ networkAddr[3] = *node; -+} -+ -+ -+static __inline__ void __nat25_generate_pppoe_network_addr(unsigned char *networkAddr, -+ unsigned char *ac_mac, unsigned short *sid) -+{ -+ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); -+ -+ networkAddr[0] = NAT25_PPPOE; -+ memcpy(networkAddr + 1, (unsigned char *)sid, 2); -+ memcpy(networkAddr + 3, (unsigned char *)ac_mac, 6); -+} -+ -+ -+#ifdef CL_IPV6_PASS -+static void __nat25_generate_ipv6_network_addr(unsigned char *networkAddr, -+ unsigned int *ipAddr) -+{ -+ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); -+ -+ networkAddr[0] = NAT25_IPV6; -+ memcpy(networkAddr + 1, (unsigned char *)ipAddr, 16); -+} -+ -+ -+static unsigned char *scan_tlv(unsigned char *data, int len, unsigned char tag, unsigned char len8b) -+{ -+ while (len > 0) { -+ if (*data == tag && *(data + 1) == len8b && len >= len8b * 8) -+ return data + 2; -+ -+ len -= (*(data + 1)) * 8; -+ data += (*(data + 1)) * 8; -+ } -+ return NULL; -+} -+ -+ -+static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char *replace_mac) -+{ -+ struct icmp6hdr *icmphdr = (struct icmp6hdr *)data; -+ unsigned char *mac; -+ -+ if (icmphdr->icmp6_type == NDISC_ROUTER_SOLICITATION) { -+ if (len >= 8) { -+ mac = scan_tlv(&data[8], len - 8, 1, 1); -+ if (mac) { -+ RTW_INFO("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", -+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], -+ replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]); -+ memcpy(mac, replace_mac, 6); -+ return 1; -+ } -+ } -+ } else if (icmphdr->icmp6_type == NDISC_ROUTER_ADVERTISEMENT) { -+ if (len >= 16) { -+ mac = scan_tlv(&data[16], len - 16, 1, 1); -+ if (mac) { -+ RTW_INFO("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", -+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], -+ replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]); -+ memcpy(mac, replace_mac, 6); -+ return 1; -+ } -+ } -+ } else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_SOLICITATION) { -+ if (len >= 24) { -+ mac = scan_tlv(&data[24], len - 24, 1, 1); -+ if (mac) { -+ RTW_INFO("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", -+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], -+ replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]); -+ memcpy(mac, replace_mac, 6); -+ return 1; -+ } -+ } -+ } else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_ADVERTISEMENT) { -+ if (len >= 24) { -+ mac = scan_tlv(&data[24], len - 24, 2, 1); -+ if (mac) { -+ RTW_INFO("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", -+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], -+ replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]); -+ memcpy(mac, replace_mac, 6); -+ return 1; -+ } -+ } -+ } else if (icmphdr->icmp6_type == NDISC_REDIRECT) { -+ if (len >= 40) { -+ mac = scan_tlv(&data[40], len - 40, 2, 1); -+ if (mac) { -+ RTW_INFO("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", -+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], -+ replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]); -+ memcpy(mac, replace_mac, 6); -+ return 1; -+ } -+ } -+ } -+ return 0; -+} -+ -+#ifdef SUPPORT_RX_UNI2MCAST -+static void convert_ipv6_mac_to_mc(struct sk_buff *skb) -+{ -+ struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN); -+ unsigned char *dst_mac = skb->data; -+ -+ /* dst_mac[0] = 0xff; */ -+ /* dst_mac[1] = 0xff; */ -+ /*modified by qinjunjie,ipv6 multicast address ix 0x33-33-xx-xx-xx-xx*/ -+ dst_mac[0] = 0x33; -+ dst_mac[1] = 0x33; -+ memcpy(&dst_mac[2], &iph->daddr.s6_addr32[3], 4); -+#if defined(__LINUX_2_6__) -+ /*modified by qinjunjie,warning:should not remove next line*/ -+ skb->pkt_type = PACKET_MULTICAST; -+#endif -+} -+#endif /* CL_IPV6_PASS */ -+#endif /* SUPPORT_RX_UNI2MCAST */ -+ -+ -+static __inline__ int __nat25_network_hash(unsigned char *networkAddr) -+{ -+ if (networkAddr[0] == NAT25_IPV4) { -+ unsigned long x; -+ -+ x = networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; -+ -+ return x & (NAT25_HASH_SIZE - 1); -+ } else if (networkAddr[0] == NAT25_IPX) { -+ unsigned long x; -+ -+ x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ -+ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; -+ -+ return x & (NAT25_HASH_SIZE - 1); -+ } else if (networkAddr[0] == NAT25_APPLE) { -+ unsigned long x; -+ -+ x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3]; -+ -+ return x & (NAT25_HASH_SIZE - 1); -+ } else if (networkAddr[0] == NAT25_PPPOE) { -+ unsigned long x; -+ -+ x = networkAddr[0] ^ networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8]; -+ -+ return x & (NAT25_HASH_SIZE - 1); -+ } -+#ifdef CL_IPV6_PASS -+ else if (networkAddr[0] == NAT25_IPV6) { -+ unsigned long x; -+ -+ x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ -+ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10] ^ -+ networkAddr[11] ^ networkAddr[12] ^ networkAddr[13] ^ networkAddr[14] ^ networkAddr[15] ^ -+ networkAddr[16]; -+ -+ return x & (NAT25_HASH_SIZE - 1); -+ } -+#endif -+ else { -+ unsigned long x = 0; -+ int i; -+ -+ for (i = 0; i < MAX_NETWORK_ADDR_LEN; i++) -+ x ^= networkAddr[i]; -+ -+ return x & (NAT25_HASH_SIZE - 1); -+ } -+} -+ -+ -+static __inline__ void __network_hash_link(_adapter *priv, -+ struct nat25_network_db_entry *ent, int hash) -+{ -+ /* Caller must _enter_critical_bh already! */ -+ /* _irqL irqL; */ -+ /* _enter_critical_bh(&priv->br_ext_lock, &irqL); */ -+ -+ ent->next_hash = priv->nethash[hash]; -+ if (ent->next_hash != NULL) -+ ent->next_hash->pprev_hash = &ent->next_hash; -+ priv->nethash[hash] = ent; -+ ent->pprev_hash = &priv->nethash[hash]; -+ -+ /* _exit_critical_bh(&priv->br_ext_lock, &irqL); */ -+} -+ -+ -+static __inline__ void __network_hash_unlink(struct nat25_network_db_entry *ent) -+{ -+ /* Caller must _enter_critical_bh already! */ -+ /* _irqL irqL; */ -+ /* _enter_critical_bh(&priv->br_ext_lock, &irqL); */ -+ -+ *(ent->pprev_hash) = ent->next_hash; -+ if (ent->next_hash != NULL) -+ ent->next_hash->pprev_hash = ent->pprev_hash; -+ ent->next_hash = NULL; -+ ent->pprev_hash = NULL; -+ -+ /* _exit_critical_bh(&priv->br_ext_lock, &irqL); */ -+} -+ -+ -+static int __nat25_db_network_lookup_and_replace(_adapter *priv, -+ struct sk_buff *skb, unsigned char *networkAddr) -+{ -+ struct nat25_network_db_entry *db; -+ _irqL irqL; -+ _enter_critical_bh(&priv->br_ext_lock, &irqL); -+ -+ db = priv->nethash[__nat25_network_hash(networkAddr)]; -+ while (db != NULL) { -+ if (!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) { -+ if (!__nat25_has_expired(priv, db)) { -+ /* replace the destination mac address */ -+ memcpy(skb->data, db->macAddr, ETH_ALEN); -+ atomic_inc(&db->use_count); -+ -+#ifdef CL_IPV6_PASS -+ RTW_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" -+ "%02x%02x%02x%02x%02x%02x\n", -+ db->macAddr[0], -+ db->macAddr[1], -+ db->macAddr[2], -+ db->macAddr[3], -+ db->macAddr[4], -+ db->macAddr[5], -+ db->networkAddr[0], -+ db->networkAddr[1], -+ db->networkAddr[2], -+ db->networkAddr[3], -+ db->networkAddr[4], -+ db->networkAddr[5], -+ db->networkAddr[6], -+ db->networkAddr[7], -+ db->networkAddr[8], -+ db->networkAddr[9], -+ db->networkAddr[10], -+ db->networkAddr[11], -+ db->networkAddr[12], -+ db->networkAddr[13], -+ db->networkAddr[14], -+ db->networkAddr[15], -+ db->networkAddr[16]); -+#else -+ RTW_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", -+ db->macAddr[0], -+ db->macAddr[1], -+ db->macAddr[2], -+ db->macAddr[3], -+ db->macAddr[4], -+ db->macAddr[5], -+ db->networkAddr[0], -+ db->networkAddr[1], -+ db->networkAddr[2], -+ db->networkAddr[3], -+ db->networkAddr[4], -+ db->networkAddr[5], -+ db->networkAddr[6], -+ db->networkAddr[7], -+ db->networkAddr[8], -+ db->networkAddr[9], -+ db->networkAddr[10]); -+#endif -+ } -+ _exit_critical_bh(&priv->br_ext_lock, &irqL); -+ return 1; -+ } -+ -+ db = db->next_hash; -+ } -+ -+ _exit_critical_bh(&priv->br_ext_lock, &irqL); -+ return 0; -+} -+ -+ -+static void __nat25_db_network_insert(_adapter *priv, -+ unsigned char *macAddr, unsigned char *networkAddr) -+{ -+ struct nat25_network_db_entry *db; -+ int hash; -+ _irqL irqL; -+ _enter_critical_bh(&priv->br_ext_lock, &irqL); -+ -+ hash = __nat25_network_hash(networkAddr); -+ db = priv->nethash[hash]; -+ while (db != NULL) { -+ if (!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) { -+ memcpy(db->macAddr, macAddr, ETH_ALEN); -+ db->ageing_timer = jiffies; -+ _exit_critical_bh(&priv->br_ext_lock, &irqL); -+ return; -+ } -+ -+ db = db->next_hash; -+ } -+ -+ db = (struct nat25_network_db_entry *) rtw_malloc(sizeof(*db)); -+ if (db == NULL) { -+ _exit_critical_bh(&priv->br_ext_lock, &irqL); -+ return; -+ } -+ -+ memcpy(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN); -+ memcpy(db->macAddr, macAddr, ETH_ALEN); -+ atomic_set(&db->use_count, 1); -+ db->ageing_timer = jiffies; -+ -+ __network_hash_link(priv, db, hash); -+ -+ _exit_critical_bh(&priv->br_ext_lock, &irqL); -+} -+ -+ -+static void __nat25_db_print(_adapter *priv) -+{ -+ _irqL irqL; -+ _enter_critical_bh(&priv->br_ext_lock, &irqL); -+ -+#ifdef BR_EXT_DEBUG -+ static int counter = 0; -+ int i, j; -+ struct nat25_network_db_entry *db; -+ -+ counter++; -+ if ((counter % 16) != 0) -+ return; -+ -+ for (i = 0, j = 0; i < NAT25_HASH_SIZE; i++) { -+ db = priv->nethash[i]; -+ -+ while (db != NULL) { -+#ifdef CL_IPV6_PASS -+ panic_printk("NAT25: DB(%d) H(%02d) C(%d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" -+ "%02x%02x%02x%02x%02x%02x\n", -+ j, -+ i, -+ atomic_read(&db->use_count), -+ db->macAddr[0], -+ db->macAddr[1], -+ db->macAddr[2], -+ db->macAddr[3], -+ db->macAddr[4], -+ db->macAddr[5], -+ db->networkAddr[0], -+ db->networkAddr[1], -+ db->networkAddr[2], -+ db->networkAddr[3], -+ db->networkAddr[4], -+ db->networkAddr[5], -+ db->networkAddr[6], -+ db->networkAddr[7], -+ db->networkAddr[8], -+ db->networkAddr[9], -+ db->networkAddr[10], -+ db->networkAddr[11], -+ db->networkAddr[12], -+ db->networkAddr[13], -+ db->networkAddr[14], -+ db->networkAddr[15], -+ db->networkAddr[16]); -+#else -+ panic_printk("NAT25: DB(%d) H(%02d) C(%d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", -+ j, -+ i, -+ atomic_read(&db->use_count), -+ db->macAddr[0], -+ db->macAddr[1], -+ db->macAddr[2], -+ db->macAddr[3], -+ db->macAddr[4], -+ db->macAddr[5], -+ db->networkAddr[0], -+ db->networkAddr[1], -+ db->networkAddr[2], -+ db->networkAddr[3], -+ db->networkAddr[4], -+ db->networkAddr[5], -+ db->networkAddr[6], -+ db->networkAddr[7], -+ db->networkAddr[8], -+ db->networkAddr[9], -+ db->networkAddr[10]); -+#endif -+ j++; -+ -+ db = db->next_hash; -+ } -+ } -+#endif -+ -+ _exit_critical_bh(&priv->br_ext_lock, &irqL); -+} -+ -+ -+ -+ -+/* -+ * NAT2.5 interface -+ */ -+ -+void nat25_db_cleanup(_adapter *priv) -+{ -+ int i; -+ _irqL irqL; -+ _enter_critical_bh(&priv->br_ext_lock, &irqL); -+ -+ for (i = 0; i < NAT25_HASH_SIZE; i++) { -+ struct nat25_network_db_entry *f; -+ f = priv->nethash[i]; -+ while (f != NULL) { -+ struct nat25_network_db_entry *g; -+ -+ g = f->next_hash; -+ if (priv->scdb_entry == f) { -+ memset(priv->scdb_mac, 0, ETH_ALEN); -+ memset(priv->scdb_ip, 0, 4); -+ priv->scdb_entry = NULL; -+ } -+ __network_hash_unlink(f); -+ rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); -+ -+ f = g; -+ } -+ } -+ -+ _exit_critical_bh(&priv->br_ext_lock, &irqL); -+} -+ -+ -+void nat25_db_expire(_adapter *priv) -+{ -+ int i; -+ _irqL irqL; -+ _enter_critical_bh(&priv->br_ext_lock, &irqL); -+ -+ /* if(!priv->ethBrExtInfo.nat25_disable) */ -+ { -+ for (i = 0; i < NAT25_HASH_SIZE; i++) { -+ struct nat25_network_db_entry *f; -+ f = priv->nethash[i]; -+ -+ while (f != NULL) { -+ struct nat25_network_db_entry *g; -+ g = f->next_hash; -+ -+ if (__nat25_has_expired(priv, f)) { -+ if (atomic_dec_and_test(&f->use_count)) { -+#ifdef BR_EXT_DEBUG -+#ifdef CL_IPV6_PASS -+ panic_printk("NAT25 Expire H(%02d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" -+ "%02x%02x%02x%02x%02x%02x\n", -+ i, -+ f->macAddr[0], -+ f->macAddr[1], -+ f->macAddr[2], -+ f->macAddr[3], -+ f->macAddr[4], -+ f->macAddr[5], -+ f->networkAddr[0], -+ f->networkAddr[1], -+ f->networkAddr[2], -+ f->networkAddr[3], -+ f->networkAddr[4], -+ f->networkAddr[5], -+ f->networkAddr[6], -+ f->networkAddr[7], -+ f->networkAddr[8], -+ f->networkAddr[9], -+ f->networkAddr[10], -+ f->networkAddr[11], -+ f->networkAddr[12], -+ f->networkAddr[13], -+ f->networkAddr[14], -+ f->networkAddr[15], -+ f->networkAddr[16]); -+#else -+ -+ panic_printk("NAT25 Expire H(%02d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", -+ i, -+ f->macAddr[0], -+ f->macAddr[1], -+ f->macAddr[2], -+ f->macAddr[3], -+ f->macAddr[4], -+ f->macAddr[5], -+ f->networkAddr[0], -+ f->networkAddr[1], -+ f->networkAddr[2], -+ f->networkAddr[3], -+ f->networkAddr[4], -+ f->networkAddr[5], -+ f->networkAddr[6], -+ f->networkAddr[7], -+ f->networkAddr[8], -+ f->networkAddr[9], -+ f->networkAddr[10]); -+#endif -+#endif -+ if (priv->scdb_entry == f) { -+ memset(priv->scdb_mac, 0, ETH_ALEN); -+ memset(priv->scdb_ip, 0, 4); -+ priv->scdb_entry = NULL; -+ } -+ __network_hash_unlink(f); -+ rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); -+ } -+ } -+ -+ f = g; -+ } -+ } -+ } -+ -+ _exit_critical_bh(&priv->br_ext_lock, &irqL); -+} -+ -+ -+#ifdef SUPPORT_TX_MCAST2UNI -+static int checkIPMcAndReplace(_adapter *priv, struct sk_buff *skb, unsigned int *dst_ip) -+{ -+ struct stat_info *pstat; -+ struct list_head *phead, *plist; -+ int i; -+ -+ phead = &priv->asoc_list; -+ plist = phead->next; -+ -+ while (plist != phead) { -+ pstat = list_entry(plist, struct stat_info, asoc_list); -+ plist = plist->next; -+ -+ if (pstat->ipmc_num == 0) -+ continue; -+ -+ for (i = 0; i < MAX_IP_MC_ENTRY; i++) { -+ if (pstat->ipmc[i].used && !memcmp(&pstat->ipmc[i].mcmac[3], ((unsigned char *)dst_ip) + 1, 3)) { -+ memcpy(skb->data, pstat->ipmc[i].mcmac, ETH_ALEN); -+ return 1; -+ } -+ } -+ } -+ return 0; -+} -+#endif -+ -+int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method) -+{ -+ unsigned short protocol; -+ unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; -+ -+ if (skb == NULL) -+ return -1; -+ -+ if ((method <= NAT25_MIN) || (method >= NAT25_MAX)) -+ return -1; -+ -+ protocol = *((unsigned short *)(skb->data + 2 * ETH_ALEN)); -+ -+ /*---------------------------------------------------*/ -+ /* Handle IP frame */ -+ /*---------------------------------------------------*/ -+ if (protocol == __constant_htons(ETH_P_IP)) { -+ struct iphdr *iph = (struct iphdr *)(skb->data + ETH_HLEN); -+ -+ if (((unsigned char *)(iph) + (iph->ihl << 2)) >= (skb->data + ETH_HLEN + skb->len)) { -+ DEBUG_WARN("NAT25: malformed IP packet !\n"); -+ return -1; -+ } -+ -+ switch (method) { -+ case NAT25_CHECK: -+ return -1; -+ -+ case NAT25_INSERT: { -+ /* some muticast with source IP is all zero, maybe other case is illegal */ -+ /* in class A, B, C, host address is all zero or all one is illegal */ -+ if (iph->saddr == 0) -+ return 0; -+ RTW_INFO("NAT25: Insert IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr); -+ __nat25_generate_ipv4_network_addr(networkAddr, &iph->saddr); -+ /* record source IP address and , source mac address into db */ -+ __nat25_db_network_insert(priv, skb->data + ETH_ALEN, networkAddr); -+ -+ __nat25_db_print(priv); -+ } -+ return 0; -+ -+ case NAT25_LOOKUP: { -+ RTW_INFO("NAT25: Lookup IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr); -+#ifdef SUPPORT_TX_MCAST2UNI -+ if (priv->pshare->rf_ft_var.mc2u_disable || -+ ((((OPMODE & (WIFI_STATION_STATE | WIFI_ASOC_STATE)) -+ == (WIFI_STATION_STATE | WIFI_ASOC_STATE)) && -+ !checkIPMcAndReplace(priv, skb, &iph->daddr)) || -+ (OPMODE & WIFI_ADHOC_STATE))) -+#endif -+ { -+ __nat25_generate_ipv4_network_addr(networkAddr, &iph->daddr); -+ -+ if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) { -+ if (*((unsigned char *)&iph->daddr + 3) == 0xff) { -+ /* L2 is unicast but L3 is broadcast, make L2 bacome broadcast */ -+ RTW_INFO("NAT25: Set DA as boardcast\n"); -+ memset(skb->data, 0xff, ETH_ALEN); -+ } else { -+ /* forward unknow IP packet to upper TCP/IP */ -+ RTW_INFO("NAT25: Replace DA with BR's MAC\n"); -+ if ((*(u32 *)priv->br_mac) == 0 && (*(u16 *)(priv->br_mac + 4)) == 0) { -+ void netdev_br_init(struct net_device *netdev); -+ printk("Re-init netdev_br_init() due to br_mac==0!\n"); -+ netdev_br_init(priv->pnetdev); -+ } -+ memcpy(skb->data, priv->br_mac, ETH_ALEN); -+ } -+ } -+ } -+ } -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ /*---------------------------------------------------*/ -+ /* Handle ARP frame */ -+ /*---------------------------------------------------*/ -+ else if (protocol == __constant_htons(ETH_P_ARP)) { -+ struct arphdr *arp = (struct arphdr *)(skb->data + ETH_HLEN); -+ unsigned char *arp_ptr = (unsigned char *)(arp + 1); -+ unsigned int *sender, *target; -+ -+ if (arp->ar_pro != __constant_htons(ETH_P_IP)) { -+ DEBUG_WARN("NAT25: arp protocol unknown (%4x)!\n", htons(arp->ar_pro)); -+ return -1; -+ } -+ -+ switch (method) { -+ case NAT25_CHECK: -+ return 0; /* skb_copy for all ARP frame */ -+ -+ case NAT25_INSERT: { -+ RTW_INFO("NAT25: Insert ARP, MAC=%02x%02x%02x%02x%02x%02x\n", arp_ptr[0], -+ arp_ptr[1], arp_ptr[2], arp_ptr[3], arp_ptr[4], arp_ptr[5]); -+ -+ /* change to ARP sender mac address to wlan STA address */ -+ memcpy(arp_ptr, GET_MY_HWADDR(priv), ETH_ALEN); -+ -+ arp_ptr += arp->ar_hln; -+ sender = (unsigned int *)arp_ptr; -+ -+ __nat25_generate_ipv4_network_addr(networkAddr, sender); -+ -+ __nat25_db_network_insert(priv, skb->data + ETH_ALEN, networkAddr); -+ -+ __nat25_db_print(priv); -+ } -+ return 0; -+ -+ case NAT25_LOOKUP: { -+ RTW_INFO("NAT25: Lookup ARP\n"); -+ -+ arp_ptr += arp->ar_hln; -+ sender = (unsigned int *)arp_ptr; -+ arp_ptr += (arp->ar_hln + arp->ar_pln); -+ target = (unsigned int *)arp_ptr; -+ -+ __nat25_generate_ipv4_network_addr(networkAddr, target); -+ -+ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); -+ -+ /* change to ARP target mac address to Lookup result */ -+ arp_ptr = (unsigned char *)(arp + 1); -+ arp_ptr += (arp->ar_hln + arp->ar_pln); -+ memcpy(arp_ptr, skb->data, ETH_ALEN); -+ } -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ /*---------------------------------------------------*/ -+ /* Handle IPX and Apple Talk frame */ -+ /*---------------------------------------------------*/ -+ else if ((protocol == __constant_htons(ETH_P_IPX)) || -+ (protocol == __constant_htons(ETH_P_ATALK)) || -+ (protocol == __constant_htons(ETH_P_AARP))) { -+ unsigned char ipx_header[2] = {0xFF, 0xFF}; -+ struct ipxhdr *ipx = NULL; -+ struct elapaarp *ea = NULL; -+ struct ddpehdr *ddp = NULL; -+ unsigned char *framePtr = skb->data + ETH_HLEN; -+ -+ if (protocol == __constant_htons(ETH_P_IPX)) { -+ RTW_INFO("NAT25: Protocol=IPX (Ethernet II)\n"); -+ ipx = (struct ipxhdr *)framePtr; -+ } else { /* if(protocol <= __constant_htons(ETH_FRAME_LEN)) */ -+ if (!memcmp(ipx_header, framePtr, 2)) { -+ RTW_INFO("NAT25: Protocol=IPX (Ethernet 802.3)\n"); -+ ipx = (struct ipxhdr *)framePtr; -+ } else { -+ unsigned char ipx_8022_type = 0xE0; -+ unsigned char snap_8022_type = 0xAA; -+ -+ if (*framePtr == snap_8022_type) { -+ unsigned char ipx_snap_id[5] = {0x0, 0x0, 0x0, 0x81, 0x37}; /* IPX SNAP ID */ -+ unsigned char aarp_snap_id[5] = {0x00, 0x00, 0x00, 0x80, 0xF3}; /* Apple Talk AARP SNAP ID */ -+ unsigned char ddp_snap_id[5] = {0x08, 0x00, 0x07, 0x80, 0x9B}; /* Apple Talk DDP SNAP ID */ -+ -+ framePtr += 3; /* eliminate the 802.2 header */ -+ -+ if (!memcmp(ipx_snap_id, framePtr, 5)) { -+ framePtr += 5; /* eliminate the SNAP header */ -+ -+ RTW_INFO("NAT25: Protocol=IPX (Ethernet SNAP)\n"); -+ ipx = (struct ipxhdr *)framePtr; -+ } else if (!memcmp(aarp_snap_id, framePtr, 5)) { -+ framePtr += 5; /* eliminate the SNAP header */ -+ -+ ea = (struct elapaarp *)framePtr; -+ } else if (!memcmp(ddp_snap_id, framePtr, 5)) { -+ framePtr += 5; /* eliminate the SNAP header */ -+ -+ ddp = (struct ddpehdr *)framePtr; -+ } else { -+ DEBUG_WARN("NAT25: Protocol=Ethernet SNAP %02x%02x%02x%02x%02x\n", framePtr[0], -+ framePtr[1], framePtr[2], framePtr[3], framePtr[4]); -+ return -1; -+ } -+ } else if (*framePtr == ipx_8022_type) { -+ framePtr += 3; /* eliminate the 802.2 header */ -+ -+ if (!memcmp(ipx_header, framePtr, 2)) { -+ RTW_INFO("NAT25: Protocol=IPX (Ethernet 802.2)\n"); -+ ipx = (struct ipxhdr *)framePtr; -+ } else -+ return -1; -+ } -+ } -+ } -+ -+ /* IPX */ -+ if (ipx != NULL) { -+ switch (method) { -+ case NAT25_CHECK: -+ if (!memcmp(skb->data + ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) { -+ RTW_INFO("NAT25: Check IPX skb_copy\n"); -+ return 0; -+ } -+ return -1; -+ -+ case NAT25_INSERT: { -+ RTW_INFO("NAT25: Insert IPX, Dest=%08x,%02x%02x%02x%02x%02x%02x,%04x Source=%08x,%02x%02x%02x%02x%02x%02x,%04x\n", -+ ipx->ipx_dest.net, -+ ipx->ipx_dest.node[0], -+ ipx->ipx_dest.node[1], -+ ipx->ipx_dest.node[2], -+ ipx->ipx_dest.node[3], -+ ipx->ipx_dest.node[4], -+ ipx->ipx_dest.node[5], -+ ipx->ipx_dest.sock, -+ ipx->ipx_source.net, -+ ipx->ipx_source.node[0], -+ ipx->ipx_source.node[1], -+ ipx->ipx_source.node[2], -+ ipx->ipx_source.node[3], -+ ipx->ipx_source.node[4], -+ ipx->ipx_source.node[5], -+ ipx->ipx_source.sock); -+ -+ if (!memcmp(skb->data + ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) { -+ RTW_INFO("NAT25: Use IPX Net, and Socket as network addr\n"); -+ -+ __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_source.net, &ipx->ipx_source.sock); -+ -+ /* change IPX source node addr to wlan STA address */ -+ memcpy(ipx->ipx_source.node, GET_MY_HWADDR(priv), ETH_ALEN); -+ } else -+ __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_source.net, ipx->ipx_source.node); -+ -+ __nat25_db_network_insert(priv, skb->data + ETH_ALEN, networkAddr); -+ -+ __nat25_db_print(priv); -+ } -+ return 0; -+ -+ case NAT25_LOOKUP: { -+ if (!memcmp(GET_MY_HWADDR(priv), ipx->ipx_dest.node, ETH_ALEN)) { -+ RTW_INFO("NAT25: Lookup IPX, Modify Destination IPX Node addr\n"); -+ -+ __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_dest.net, &ipx->ipx_dest.sock); -+ -+ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); -+ -+ /* replace IPX destination node addr with Lookup destination MAC addr */ -+ memcpy(ipx->ipx_dest.node, skb->data, ETH_ALEN); -+ } else { -+ __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_dest.net, ipx->ipx_dest.node); -+ -+ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); -+ } -+ } -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ /* AARP */ -+ else if (ea != NULL) { -+ /* Sanity check fields. */ -+ if (ea->hw_len != ETH_ALEN || ea->pa_len != AARP_PA_ALEN) { -+ DEBUG_WARN("NAT25: Appletalk AARP Sanity check fail!\n"); -+ return -1; -+ } -+ -+ switch (method) { -+ case NAT25_CHECK: -+ return 0; -+ -+ case NAT25_INSERT: { -+ /* change to AARP source mac address to wlan STA address */ -+ memcpy(ea->hw_src, GET_MY_HWADDR(priv), ETH_ALEN); -+ -+ RTW_INFO("NAT25: Insert AARP, Source=%d,%d Destination=%d,%d\n", -+ ea->pa_src_net, -+ ea->pa_src_node, -+ ea->pa_dst_net, -+ ea->pa_dst_node); -+ -+ __nat25_generate_apple_network_addr(networkAddr, &ea->pa_src_net, &ea->pa_src_node); -+ -+ __nat25_db_network_insert(priv, skb->data + ETH_ALEN, networkAddr); -+ -+ __nat25_db_print(priv); -+ } -+ return 0; -+ -+ case NAT25_LOOKUP: { -+ RTW_INFO("NAT25: Lookup AARP, Source=%d,%d Destination=%d,%d\n", -+ ea->pa_src_net, -+ ea->pa_src_node, -+ ea->pa_dst_net, -+ ea->pa_dst_node); -+ -+ __nat25_generate_apple_network_addr(networkAddr, &ea->pa_dst_net, &ea->pa_dst_node); -+ -+ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); -+ -+ /* change to AARP destination mac address to Lookup result */ -+ memcpy(ea->hw_dst, skb->data, ETH_ALEN); -+ } -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ /* DDP */ -+ else if (ddp != NULL) { -+ switch (method) { -+ case NAT25_CHECK: -+ return -1; -+ -+ case NAT25_INSERT: { -+ RTW_INFO("NAT25: Insert DDP, Source=%d,%d Destination=%d,%d\n", -+ ddp->deh_snet, -+ ddp->deh_snode, -+ ddp->deh_dnet, -+ ddp->deh_dnode); -+ -+ __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_snet, &ddp->deh_snode); -+ -+ __nat25_db_network_insert(priv, skb->data + ETH_ALEN, networkAddr); -+ -+ __nat25_db_print(priv); -+ } -+ return 0; -+ -+ case NAT25_LOOKUP: { -+ RTW_INFO("NAT25: Lookup DDP, Source=%d,%d Destination=%d,%d\n", -+ ddp->deh_snet, -+ ddp->deh_snode, -+ ddp->deh_dnet, -+ ddp->deh_dnode); -+ -+ __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_dnet, &ddp->deh_dnode); -+ -+ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); -+ } -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ return -1; -+ } -+ -+ /*---------------------------------------------------*/ -+ /* Handle PPPoE frame */ -+ /*---------------------------------------------------*/ -+ else if ((protocol == __constant_htons(ETH_P_PPP_DISC)) || -+ (protocol == __constant_htons(ETH_P_PPP_SES))) { -+ struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN); -+ unsigned short *pMagic; -+ -+ switch (method) { -+ case NAT25_CHECK: -+ if (ph->sid == 0) -+ return 0; -+ return 1; -+ -+ case NAT25_INSERT: -+ if (ph->sid == 0) { /* Discovery phase according to tag */ -+ if (ph->code == PADI_CODE || ph->code == PADR_CODE) { -+ if (priv->ethBrExtInfo.addPPPoETag) { -+ struct pppoe_tag *tag, *pOldTag; -+ unsigned char tag_buf[40]; -+ int old_tag_len = 0; -+ -+ tag = (struct pppoe_tag *)tag_buf; -+ pOldTag = (struct pppoe_tag *)__nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID)); -+ if (pOldTag) { /* if SID existed, copy old value and delete it */ -+ old_tag_len = ntohs(pOldTag->tag_len); -+ if (old_tag_len + TAG_HDR_LEN + MAGIC_CODE_LEN + RTL_RELAY_TAG_LEN > sizeof(tag_buf)) { -+ DEBUG_ERR("SID tag length too long!\n"); -+ return -1; -+ } -+ -+ memcpy(tag->tag_data + MAGIC_CODE_LEN + RTL_RELAY_TAG_LEN, -+ pOldTag->tag_data, old_tag_len); -+ -+ if (skb_pull_and_merge(skb, (unsigned char *)pOldTag, TAG_HDR_LEN + old_tag_len) < 0) { -+ DEBUG_ERR("call skb_pull_and_merge() failed in PADI/R packet!\n"); -+ return -1; -+ } -+ ph->length = htons(ntohs(ph->length) - TAG_HDR_LEN - old_tag_len); -+ } -+ -+ tag->tag_type = PTT_RELAY_SID; -+ tag->tag_len = htons(MAGIC_CODE_LEN + RTL_RELAY_TAG_LEN + old_tag_len); -+ -+ /* insert the magic_code+client mac in relay tag */ -+ pMagic = (unsigned short *)tag->tag_data; -+ *pMagic = htons(MAGIC_CODE); -+ memcpy(tag->tag_data + MAGIC_CODE_LEN, skb->data + ETH_ALEN, ETH_ALEN); -+ -+ /* Add relay tag */ -+ if (__nat25_add_pppoe_tag(skb, tag) < 0) -+ return -1; -+ -+ RTW_INFO("NAT25: Insert PPPoE, forward %s packet\n", -+ (ph->code == PADI_CODE ? "PADI" : "PADR")); -+ } else { /* not add relay tag */ -+ if (priv->pppoe_connection_in_progress && -+ memcmp(skb->data + ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) { -+ DEBUG_ERR("Discard PPPoE packet due to another PPPoE connection is in progress!\n"); -+ return -2; -+ } -+ -+ if (priv->pppoe_connection_in_progress == 0) -+ memcpy(priv->pppoe_addr, skb->data + ETH_ALEN, ETH_ALEN); -+ -+ priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE; -+ } -+ } else -+ return -1; -+ } else { /* session phase */ -+ RTW_INFO("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name); -+ -+ __nat25_generate_pppoe_network_addr(networkAddr, skb->data, &(ph->sid)); -+ -+ __nat25_db_network_insert(priv, skb->data + ETH_ALEN, networkAddr); -+ -+ __nat25_db_print(priv); -+ -+ if (!priv->ethBrExtInfo.addPPPoETag && -+ priv->pppoe_connection_in_progress && -+ !memcmp(skb->data + ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) -+ priv->pppoe_connection_in_progress = 0; -+ } -+ return 0; -+ -+ case NAT25_LOOKUP: -+ if (ph->code == PADO_CODE || ph->code == PADS_CODE) { -+ if (priv->ethBrExtInfo.addPPPoETag) { -+ struct pppoe_tag *tag; -+ unsigned char *ptr; -+ unsigned short tagType, tagLen; -+ int offset = 0; -+ -+ ptr = __nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID)); -+ if (ptr == 0) { -+ DEBUG_ERR("Fail to find PTT_RELAY_SID in FADO!\n"); -+ return -1; -+ } -+ -+ tag = (struct pppoe_tag *)ptr; -+ tagType = (unsigned short)((ptr[0] << 8) + ptr[1]); -+ tagLen = (unsigned short)((ptr[2] << 8) + ptr[3]); -+ -+ if ((tagType != ntohs(PTT_RELAY_SID)) || (tagLen < (MAGIC_CODE_LEN + RTL_RELAY_TAG_LEN))) { -+ DEBUG_ERR("Invalid PTT_RELAY_SID tag length [%d]!\n", tagLen); -+ return -1; -+ } -+ -+ pMagic = (unsigned short *)tag->tag_data; -+ if (ntohs(*pMagic) != MAGIC_CODE) { -+ DEBUG_ERR("Can't find MAGIC_CODE in %s packet!\n", -+ (ph->code == PADO_CODE ? "PADO" : "PADS")); -+ return -1; -+ } -+ -+ memcpy(skb->data, tag->tag_data + MAGIC_CODE_LEN, ETH_ALEN); -+ -+ if (tagLen > MAGIC_CODE_LEN + RTL_RELAY_TAG_LEN) -+ offset = TAG_HDR_LEN; -+ -+ if (skb_pull_and_merge(skb, ptr + offset, TAG_HDR_LEN + MAGIC_CODE_LEN + RTL_RELAY_TAG_LEN - offset) < 0) { -+ DEBUG_ERR("call skb_pull_and_merge() failed in PADO packet!\n"); -+ return -1; -+ } -+ ph->length = htons(ntohs(ph->length) - (TAG_HDR_LEN + MAGIC_CODE_LEN + RTL_RELAY_TAG_LEN - offset)); -+ if (offset > 0) -+ tag->tag_len = htons(tagLen - MAGIC_CODE_LEN - RTL_RELAY_TAG_LEN); -+ -+ RTW_INFO("NAT25: Lookup PPPoE, forward %s Packet from %s\n", -+ (ph->code == PADO_CODE ? "PADO" : "PADS"), skb->dev->name); -+ } else { /* not add relay tag */ -+ if (!priv->pppoe_connection_in_progress) { -+ DEBUG_ERR("Discard PPPoE packet due to no connection in progresss!\n"); -+ return -1; -+ } -+ memcpy(skb->data, priv->pppoe_addr, ETH_ALEN); -+ priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE; -+ } -+ } else { -+ if (ph->sid != 0) { -+ RTW_INFO("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name); -+ __nat25_generate_pppoe_network_addr(networkAddr, skb->data + ETH_ALEN, &(ph->sid)); -+ -+ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); -+ -+ __nat25_db_print(priv); -+ } else -+ return -1; -+ -+ } -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ /*---------------------------------------------------*/ -+ /* Handle EAP frame */ -+ /*---------------------------------------------------*/ -+ else if (protocol == __constant_htons(0x888e)) { -+ switch (method) { -+ case NAT25_CHECK: -+ return -1; -+ -+ case NAT25_INSERT: -+ return 0; -+ -+ case NAT25_LOOKUP: -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ /*---------------------------------------------------*/ -+ /* Handle C-Media proprietary frame */ -+ /*---------------------------------------------------*/ -+ else if ((protocol == __constant_htons(0xe2ae)) || -+ (protocol == __constant_htons(0xe2af))) { -+ switch (method) { -+ case NAT25_CHECK: -+ return -1; -+ -+ case NAT25_INSERT: -+ return 0; -+ -+ case NAT25_LOOKUP: -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+ -+ /*---------------------------------------------------*/ -+ /* Handle IPV6 frame */ -+ /*---------------------------------------------------*/ -+#ifdef CL_IPV6_PASS -+ else if (protocol == __constant_htons(ETH_P_IPV6)) { -+ struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN); -+ -+ if (sizeof(*iph) >= (skb->len - ETH_HLEN)) { -+ DEBUG_WARN("NAT25: malformed IPv6 packet !\n"); -+ return -1; -+ } -+ -+ switch (method) { -+ case NAT25_CHECK: -+ if (skb->data[0] & 1) -+ return 0; -+ return -1; -+ -+ case NAT25_INSERT: { -+ RTW_INFO("NAT25: Insert IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x," -+ " DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n", -+ iph->saddr.s6_addr16[0], iph->saddr.s6_addr16[1], iph->saddr.s6_addr16[2], iph->saddr.s6_addr16[3], -+ iph->saddr.s6_addr16[4], iph->saddr.s6_addr16[5], iph->saddr.s6_addr16[6], iph->saddr.s6_addr16[7], -+ iph->daddr.s6_addr16[0], iph->daddr.s6_addr16[1], iph->daddr.s6_addr16[2], iph->daddr.s6_addr16[3], -+ iph->daddr.s6_addr16[4], iph->daddr.s6_addr16[5], iph->daddr.s6_addr16[6], iph->daddr.s6_addr16[7]); -+ -+ if (memcmp(&iph->saddr, "\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0", 16)) { -+ __nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->saddr); -+ __nat25_db_network_insert(priv, skb->data + ETH_ALEN, networkAddr); -+ __nat25_db_print(priv); -+ -+ if (iph->nexthdr == IPPROTO_ICMPV6 && -+ skb->len > (ETH_HLEN + sizeof(*iph) + 4)) { -+ if (update_nd_link_layer_addr(skb->data + ETH_HLEN + sizeof(*iph), -+ skb->len - ETH_HLEN - sizeof(*iph), GET_MY_HWADDR(priv))) { -+ struct icmp6hdr *hdr = (struct icmp6hdr *)(skb->data + ETH_HLEN + sizeof(*iph)); -+ hdr->icmp6_cksum = 0; -+ hdr->icmp6_cksum = csum_ipv6_magic(&iph->saddr, &iph->daddr, -+ iph->payload_len, -+ IPPROTO_ICMPV6, -+ csum_partial((__u8 *)hdr, iph->payload_len, 0)); -+ } -+ } -+ } -+ } -+ return 0; -+ -+ case NAT25_LOOKUP: -+ RTW_INFO("NAT25: Lookup IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x," -+ " DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n", -+ iph->saddr.s6_addr16[0], iph->saddr.s6_addr16[1], iph->saddr.s6_addr16[2], iph->saddr.s6_addr16[3], -+ iph->saddr.s6_addr16[4], iph->saddr.s6_addr16[5], iph->saddr.s6_addr16[6], iph->saddr.s6_addr16[7], -+ iph->daddr.s6_addr16[0], iph->daddr.s6_addr16[1], iph->daddr.s6_addr16[2], iph->daddr.s6_addr16[3], -+ iph->daddr.s6_addr16[4], iph->daddr.s6_addr16[5], iph->daddr.s6_addr16[6], iph->daddr.s6_addr16[7]); -+ -+ -+ __nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->daddr); -+ if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) { -+#ifdef SUPPORT_RX_UNI2MCAST -+ if (iph->daddr.s6_addr[0] == 0xff) -+ convert_ipv6_mac_to_mc(skb); -+#endif -+ } -+ return 0; -+ -+ default: -+ return -1; -+ } -+ } -+#endif /* CL_IPV6_PASS */ -+ -+ return -1; -+} -+ -+ -+int nat25_handle_frame(_adapter *priv, struct sk_buff *skb) -+{ -+#ifdef BR_EXT_DEBUG -+ if ((!priv->ethBrExtInfo.nat25_disable) && (!(skb->data[0] & 1))) { -+ panic_printk("NAT25: Input Frame: DA=%02x%02x%02x%02x%02x%02x SA=%02x%02x%02x%02x%02x%02x\n", -+ skb->data[0], -+ skb->data[1], -+ skb->data[2], -+ skb->data[3], -+ skb->data[4], -+ skb->data[5], -+ skb->data[6], -+ skb->data[7], -+ skb->data[8], -+ skb->data[9], -+ skb->data[10], -+ skb->data[11]); -+ } -+#endif -+ -+ if (!(skb->data[0] & 1)) { -+ int is_vlan_tag = 0, i, retval = 0; -+ unsigned short vlan_hdr = 0; -+ -+ if (*((unsigned short *)(skb->data + ETH_ALEN * 2)) == __constant_htons(ETH_P_8021Q)) { -+ is_vlan_tag = 1; -+ vlan_hdr = *((unsigned short *)(skb->data + ETH_ALEN * 2 + 2)); -+ for (i = 0; i < 6; i++) -+ *((unsigned short *)(skb->data + ETH_ALEN * 2 + 2 - i * 2)) = *((unsigned short *)(skb->data + ETH_ALEN * 2 - 2 - i * 2)); -+ skb_pull(skb, 4); -+ } -+ -+ if (!priv->ethBrExtInfo.nat25_disable) { -+ _irqL irqL; -+ _enter_critical_bh(&priv->br_ext_lock, &irqL); -+ /* -+ * This function look up the destination network address from -+ * the NAT2.5 database. Return value = -1 means that the -+ * corresponding network protocol is NOT support. -+ */ -+ if (!priv->ethBrExtInfo.nat25sc_disable && -+ (*((unsigned short *)(skb->data + ETH_ALEN * 2)) == __constant_htons(ETH_P_IP)) && -+ !memcmp(priv->scdb_ip, skb->data + ETH_HLEN + 16, 4)) { -+ memcpy(skb->data, priv->scdb_mac, ETH_ALEN); -+ -+ _exit_critical_bh(&priv->br_ext_lock, &irqL); -+ } else { -+ _exit_critical_bh(&priv->br_ext_lock, &irqL); -+ -+ retval = nat25_db_handle(priv, skb, NAT25_LOOKUP); -+ } -+ } else { -+ if (((*((unsigned short *)(skb->data + ETH_ALEN * 2)) == __constant_htons(ETH_P_IP)) && -+ !memcmp(priv->br_ip, skb->data + ETH_HLEN + 16, 4)) || -+ ((*((unsigned short *)(skb->data + ETH_ALEN * 2)) == __constant_htons(ETH_P_ARP)) && -+ !memcmp(priv->br_ip, skb->data + ETH_HLEN + 24, 4))) { -+ /* for traffic to upper TCP/IP */ -+ retval = nat25_db_handle(priv, skb, NAT25_LOOKUP); -+ } -+ } -+ -+ if (is_vlan_tag) { -+ skb_push(skb, 4); -+ for (i = 0; i < 6; i++) -+ *((unsigned short *)(skb->data + i * 2)) = *((unsigned short *)(skb->data + 4 + i * 2)); -+ *((unsigned short *)(skb->data + ETH_ALEN * 2)) = __constant_htons(ETH_P_8021Q); -+ *((unsigned short *)(skb->data + ETH_ALEN * 2 + 2)) = vlan_hdr; -+ } -+ -+ if (retval == -1) { -+ /* DEBUG_ERR("NAT25: Lookup fail!\n"); */ -+ return -1; -+ } -+ } -+ -+ return 0; -+} -+ -+#if 0 -+void mac_clone(_adapter *priv, unsigned char *addr) -+{ -+ struct sockaddr sa; -+ -+ memcpy(sa.sa_data, addr, ETH_ALEN); -+ RTW_INFO("MAC Clone: Addr=%02x%02x%02x%02x%02x%02x\n", -+ addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); -+ rtl8192cd_set_hwaddr(priv->dev, &sa); -+} -+ -+ -+int mac_clone_handle_frame(_adapter *priv, struct sk_buff *skb) -+{ -+ if (priv->ethBrExtInfo.macclone_enable && !priv->macclone_completed) { -+ if (!(skb->data[ETH_ALEN] & 1)) { /* check any other particular MAC add */ -+ if (memcmp(skb->data + ETH_ALEN, GET_MY_HWADDR(priv), ETH_ALEN) && -+ ((priv->dev->br_port) && -+ memcmp(skb->data + ETH_ALEN, priv->br_mac, ETH_ALEN))) { -+ mac_clone(priv, skb->data + ETH_ALEN); -+ priv->macclone_completed = 1; -+ } -+ } -+ } -+ -+ return 0; -+} -+#endif /* 0 */ -+ -+#define SERVER_PORT 67 -+#define CLIENT_PORT 68 -+#define DHCP_MAGIC 0x63825363 -+#define BROADCAST_FLAG 0x8000 -+ -+struct dhcpMessage { -+ u_int8_t op; -+ u_int8_t htype; -+ u_int8_t hlen; -+ u_int8_t hops; -+ u_int32_t xid; -+ u_int16_t secs; -+ u_int16_t flags; -+ u_int32_t ciaddr; -+ u_int32_t yiaddr; -+ u_int32_t siaddr; -+ u_int32_t giaddr; -+ u_int8_t chaddr[16]; -+ u_int8_t sname[64]; -+ u_int8_t file[128]; -+ u_int32_t cookie; -+ u_int8_t options[308]; /* 312 - cookie */ -+}; -+ -+void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb) -+{ -+ if (skb == NULL) -+ return; -+ -+ if (!priv->ethBrExtInfo.dhcp_bcst_disable) { -+ unsigned short protocol = *((unsigned short *)(skb->data + 2 * ETH_ALEN)); -+ -+ if (protocol == __constant_htons(ETH_P_IP)) { /* IP */ -+ struct iphdr *iph = (struct iphdr *)(skb->data + ETH_HLEN); -+ -+ if (iph->protocol == IPPROTO_UDP) { /* UDP */ -+ struct udphdr *udph = (struct udphdr *)((SIZE_PTR)iph + (iph->ihl << 2)); -+ -+ if ((udph->source == __constant_htons(CLIENT_PORT)) -+ && (udph->dest == __constant_htons(SERVER_PORT))) { /* DHCP request */ -+ struct dhcpMessage *dhcph = -+ (struct dhcpMessage *)((SIZE_PTR)udph + sizeof(struct udphdr)); -+ -+ if (dhcph->cookie == __constant_htonl(DHCP_MAGIC)) { /* match magic word */ -+ if (!(dhcph->flags & htons(BROADCAST_FLAG))) { /* if not broadcast */ -+ register int sum = 0; -+ -+ RTW_INFO("DHCP: change flag of DHCP request to broadcast.\n"); -+ /* or BROADCAST flag */ -+ dhcph->flags |= htons(BROADCAST_FLAG); -+ /* recalculate checksum */ -+ sum = ~(udph->check) & 0xffff; -+ sum += dhcph->flags; -+ while (sum >> 16) -+ sum = (sum & 0xffff) + (sum >> 16); -+ udph->check = ~sum; -+ } -+ } -+ } -+ } -+ } -+ } -+} -+ -+ -+void *scdb_findEntry(_adapter *priv, unsigned char *macAddr, -+ unsigned char *ipAddr) -+{ -+ unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; -+ struct nat25_network_db_entry *db; -+ int hash; -+ /* _irqL irqL; */ -+ /* _enter_critical_bh(&priv->br_ext_lock, &irqL); */ -+ -+ __nat25_generate_ipv4_network_addr(networkAddr, (unsigned int *)ipAddr); -+ hash = __nat25_network_hash(networkAddr); -+ db = priv->nethash[hash]; -+ while (db != NULL) { -+ if (!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) { -+ /* _exit_critical_bh(&priv->br_ext_lock, &irqL); */ -+ return (void *)db; -+ } -+ -+ db = db->next_hash; -+ } -+ -+ /* _exit_critical_bh(&priv->br_ext_lock, &irqL); */ -+ return NULL; -+} -+ -+#endif /* CONFIG_BR_EXT */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_bt_mp.c b/drivers/staging/rtl8723cs/core/rtw_bt_mp.c -new file mode 100644 -index 000000000000..ce7aa29f7d11 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_bt_mp.c -@@ -0,0 +1,1575 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+#include -+#include -+ -+#if defined(CONFIG_RTL8723B) -+ #include -+#endif -+ -+#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) -+void MPh2c_timeout_handle(void *FunctionContext) -+{ -+ PADAPTER pAdapter; -+ PMPT_CONTEXT pMptCtx; -+ -+ -+ RTW_INFO("[MPT], MPh2c_timeout_handle\n"); -+ -+ pAdapter = (PADAPTER)FunctionContext; -+ pMptCtx = &pAdapter->mppriv.mpt_ctx; -+ -+ pMptCtx->bMPh2c_timeout = _TRUE; -+ -+ if ((_FALSE == pMptCtx->MptH2cRspEvent) -+ || ((_TRUE == pMptCtx->MptH2cRspEvent) -+ && (_FALSE == pMptCtx->MptBtC2hEvent))) -+ _rtw_up_sema(&pMptCtx->MPh2c_Sema); -+} -+ -+u32 WaitC2Hevent(PADAPTER pAdapter, u8 *C2H_event, u32 delay_time) -+{ -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ pMptCtx->bMPh2c_timeout = _FALSE; -+ -+ if (pAdapter->registrypriv.mp_mode == 0) { -+ RTW_INFO("[MPT], Error!! WaitC2Hevent mp_mode == 0!!\n"); -+ return _FALSE; -+ } -+ -+ _set_timer(&pMptCtx->MPh2c_timeout_timer, delay_time); -+ -+ _rtw_down_sema(&pMptCtx->MPh2c_Sema); -+ -+ if (pMptCtx->bMPh2c_timeout == _TRUE) { -+ *C2H_event = _FALSE; -+ -+ return _FALSE; -+ } -+ -+ /* for safty, cancel timer here again */ -+ _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); -+ -+ return _TRUE; -+} -+ -+BT_CTRL_STATUS -+mptbt_CheckC2hFrame( -+ PADAPTER Adapter, -+ PBT_H2C pH2c, -+ PBT_EXT_C2H pExtC2h -+) -+{ -+ BT_CTRL_STATUS c2hStatus = BT_STATUS_C2H_SUCCESS; -+ -+ /* RTW_INFO("[MPT], MPT rsp C2H hex: %x %x %x %x %x %x\n"), pExtC2h , pExtC2h+1 ,pExtC2h+2 ,pExtC2h+3 ,pExtC2h+4 ,pExtC2h+5); */ -+ -+ RTW_INFO("[MPT], statusCode = 0x%x\n", pExtC2h->statusCode); -+ RTW_INFO("[MPT], retLen = %d\n", pExtC2h->retLen); -+ RTW_INFO("[MPT], opCodeVer : req/rsp=%d/%d\n", pH2c->opCodeVer, pExtC2h->opCodeVer); -+ RTW_INFO("[MPT], reqNum : req/rsp=%d/%d\n", pH2c->reqNum, pExtC2h->reqNum); -+ if (pExtC2h->reqNum != pH2c->reqNum) { -+ c2hStatus = BT_STATUS_C2H_REQNUM_MISMATCH; -+ RTW_INFO("[MPT], Error!! C2H reqNum Mismatch!!\n"); -+ } else if (pExtC2h->opCodeVer != pH2c->opCodeVer) { -+ c2hStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; -+ RTW_INFO("[MPT], Error!! OPCode version L mismatch!!\n"); -+ } -+ -+ return c2hStatus; -+} -+ -+BT_CTRL_STATUS -+mptbt_SendH2c( -+ PADAPTER Adapter, -+ PBT_H2C pH2c, -+ u16 h2cCmdLen -+) -+{ -+ /* KIRQL OldIrql = KeGetCurrentIrql(); */ -+ BT_CTRL_STATUS h2cStatus = BT_STATUS_H2C_SUCCESS; -+ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); -+ u8 i; -+ -+ RTW_INFO("[MPT], mptbt_SendH2c()=========>\n"); -+ -+ /* PlatformResetEvent(&pMptCtx->MptH2cRspEvent); */ -+ /* PlatformResetEvent(&pMptCtx->MptBtC2hEvent); */ -+ -+ /* if(OldIrql == PASSIVE_LEVEL) -+ * { */ -+ /* RTPRINT_DATA(FMPBT, FMPBT_H2C_CONTENT, ("[MPT], MPT H2C hex:\n"), pH2c, h2cCmdLen); */ -+ -+ for (i = 0; i < BT_H2C_MAX_RETRY; i++) { -+ RTW_INFO("[MPT], Send H2C command to wifi!!!\n"); -+ -+ pMptCtx->MptH2cRspEvent = _FALSE; -+ pMptCtx->MptBtC2hEvent = _FALSE; -+ -+#if defined(CONFIG_RTL8723B) -+ rtl8723b_set_FwBtMpOper_cmd(Adapter, pH2c->opCode, pH2c->opCodeVer, pH2c->reqNum, pH2c->buf); -+#endif -+ pMptCtx->h2cReqNum++; -+ pMptCtx->h2cReqNum %= 16; -+ -+ if (WaitC2Hevent(Adapter, &pMptCtx->MptH2cRspEvent, 100)) { -+ RTW_INFO("[MPT], Received WiFi MptH2cRspEvent!!!\n"); -+ if (WaitC2Hevent(Adapter, &pMptCtx->MptBtC2hEvent, 400)) { -+ RTW_INFO("[MPT], Received MptBtC2hEvent!!!\n"); -+ break; -+ } else { -+ RTW_INFO("[MPT], Error!!BT MptBtC2hEvent timeout!!\n"); -+ h2cStatus = BT_STATUS_H2C_BT_NO_RSP; -+ } -+ } else { -+ RTW_INFO("[MPT], Error!!WiFi MptH2cRspEvent timeout!!\n"); -+ h2cStatus = BT_STATUS_H2C_TIMTOUT; -+ } -+ } -+ /* } -+ * else -+ * { -+ * RT_ASSERT(FALSE, ("[MPT], mptbt_SendH2c() can only run under PASSIVE_LEVEL!!\n")); -+ * h2cStatus = BT_STATUS_WRONG_LEVEL; -+ * } */ -+ -+ RTW_INFO("[MPT], mptbt_SendH2c()<=========\n"); -+ return h2cStatus; -+} -+ -+ -+ -+BT_CTRL_STATUS -+mptbt_CheckBtRspStatus( -+ PADAPTER Adapter, -+ PBT_EXT_C2H pExtC2h -+) -+{ -+ BT_CTRL_STATUS retStatus = BT_OP_STATUS_SUCCESS; -+ -+ switch (pExtC2h->statusCode) { -+ case BT_OP_STATUS_SUCCESS: -+ retStatus = BT_STATUS_BT_OP_SUCCESS; -+ RTW_INFO("[MPT], BT status : BT_STATUS_SUCCESS\n"); -+ break; -+ case BT_OP_STATUS_VERSION_MISMATCH: -+ retStatus = BT_STATUS_OPCODE_L_VERSION_MISMATCH; -+ RTW_INFO("[MPT], BT status : BT_STATUS_OPCODE_L_VERSION_MISMATCH\n"); -+ break; -+ case BT_OP_STATUS_UNKNOWN_OPCODE: -+ retStatus = BT_STATUS_UNKNOWN_OPCODE_L; -+ RTW_INFO("[MPT], BT status : BT_STATUS_UNKNOWN_OPCODE_L\n"); -+ break; -+ case BT_OP_STATUS_ERROR_PARAMETER: -+ retStatus = BT_STATUS_PARAMETER_FORMAT_ERROR_L; -+ RTW_INFO("[MPT], BT status : BT_STATUS_PARAMETER_FORMAT_ERROR_L\n"); -+ break; -+ default: -+ retStatus = BT_STATUS_UNKNOWN_STATUS_L; -+ RTW_INFO("[MPT], BT status : BT_STATUS_UNKNOWN_STATUS_L\n"); -+ break; -+ } -+ -+ return retStatus; -+} -+ -+ -+ -+BT_CTRL_STATUS -+mptbt_BtFwOpCodeProcess( -+ PADAPTER Adapter, -+ u8 btFwOpCode, -+ u8 opCodeVer, -+ u8 *pH2cPar, -+ u8 h2cParaLen -+) -+{ -+ u8 H2C_Parameter[6] = {0}; -+ PBT_H2C pH2c = (PBT_H2C)&H2C_Parameter[0]; -+ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); -+ PBT_EXT_C2H pExtC2h = (PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; -+ u16 paraLen = 0, i; -+ BT_CTRL_STATUS h2cStatus = BT_STATUS_H2C_SUCCESS, c2hStatus = BT_STATUS_C2H_SUCCESS; -+ BT_CTRL_STATUS retStatus = BT_STATUS_H2C_BT_NO_RSP; -+ -+ if (Adapter->registrypriv.mp_mode == 0) { -+ RTW_INFO("[MPT], Error!! mptbt_BtFwOpCodeProces mp_mode == 0!!\n"); -+ return _FALSE; -+ } -+ -+ pH2c->opCode = btFwOpCode; -+ pH2c->opCodeVer = opCodeVer; -+ pH2c->reqNum = pMptCtx->h2cReqNum; -+ /* PlatformMoveMemory(&pH2c->buf[0], pH2cPar, h2cParaLen); */ -+ /* _rtw_memcpy(&pH2c->buf[0], pH2cPar, h2cParaLen); */ -+ _rtw_memcpy(pH2c->buf, pH2cPar, h2cParaLen); -+ -+ RTW_INFO("[MPT], pH2c->opCode=%d\n", pH2c->opCode); -+ RTW_INFO("[MPT], pH2c->opCodeVer=%d\n", pH2c->opCodeVer); -+ RTW_INFO("[MPT], pH2c->reqNum=%d\n", pH2c->reqNum); -+ RTW_INFO("[MPT], h2c parameter length=%d\n", h2cParaLen); -+ for (i = 0; i < h2cParaLen; i++) -+ RTW_INFO("[MPT], parameter[%d]=0x%02x\n", i, pH2c->buf[i]); -+ -+ h2cStatus = mptbt_SendH2c(Adapter, pH2c, h2cParaLen + 2); -+ if (BT_STATUS_H2C_SUCCESS == h2cStatus) { -+ /* if reach here, it means H2C get the correct c2h response, */ -+ c2hStatus = mptbt_CheckC2hFrame(Adapter, pH2c, pExtC2h); -+ if (BT_STATUS_C2H_SUCCESS == c2hStatus) -+ retStatus = mptbt_CheckBtRspStatus(Adapter, pExtC2h); -+ else { -+ RTW_INFO("[MPT], Error!! C2H failed for pH2c->opCode=%d\n", pH2c->opCode); -+ /* check c2h status error, return error status code to upper layer. */ -+ retStatus = c2hStatus; -+ } -+ } else { -+ RTW_INFO("[MPT], Error!! H2C failed for pH2c->opCode=%d\n", pH2c->opCode); -+ /* check h2c status error, return error status code to upper layer. */ -+ retStatus = h2cStatus; -+ } -+ -+ return retStatus; -+} -+ -+ -+ -+ -+u16 -+mptbt_BtReady( -+ PADAPTER Adapter, -+ PBT_REQ_CMD pBtReq, -+ PBT_RSP_CMD pBtRsp -+) -+{ -+ u8 h2cParaBuf[6] = {0}; -+ u8 h2cParaLen = 0; -+ u16 paraLen = 0; -+ u8 retStatus = BT_STATUS_BT_OP_SUCCESS; -+ u8 btOpcode; -+ u8 btOpcodeVer = 0; -+ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); -+ PBT_EXT_C2H pExtC2h = (PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; -+ u8 i; -+ u8 btFwVer = 0, bdAddr[6] = {0}; -+ u16 btRealFwVer = 0; -+ u16 *pu2Tmp = NULL; -+ -+ /* */ -+ /* check upper layer parameters */ -+ /* */ -+ -+ /* 1. check upper layer opcode version */ -+ if (pBtReq->opCodeVer != 1) { -+ RTW_INFO("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ -+ pBtRsp->pParamStart[0] = MP_BT_NOT_READY; -+ paraLen = 10; -+ /* */ -+ /* execute lower layer opcodes */ -+ /* */ -+ -+ /* Get BT FW version */ -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_GET_BT_VERSION; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } else { -+ pu2Tmp = (u16 *)&pExtC2h->buf[0]; -+ btRealFwVer = *pu2Tmp; -+ btFwVer = pExtC2h->buf[1]; -+ RTW_INFO("[MPT], btRealFwVer=0x%x, btFwVer=0x%x\n", btRealFwVer, btFwVer); -+ } -+ -+ /* Get BD Address */ -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_GET_BD_ADDR_L; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } else { -+ bdAddr[5] = pExtC2h->buf[0]; -+ bdAddr[4] = pExtC2h->buf[1]; -+ bdAddr[3] = pExtC2h->buf[2]; -+ } -+ -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_GET_BD_ADDR_H; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } else { -+ bdAddr[2] = pExtC2h->buf[0]; -+ bdAddr[1] = pExtC2h->buf[1]; -+ bdAddr[0] = pExtC2h->buf[2]; -+ } -+ RTW_INFO("[MPT], Local BDAddr:"); -+ for (i = 0; i < 6; i++) -+ RTW_INFO(" 0x%x ", bdAddr[i]); -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ pBtRsp->pParamStart[0] = MP_BT_READY; -+ pu2Tmp = (u16 *)&pBtRsp->pParamStart[1]; -+ *pu2Tmp = btRealFwVer; -+ pBtRsp->pParamStart[3] = btFwVer; -+ for (i = 0; i < 6; i++) -+ pBtRsp->pParamStart[4 + i] = bdAddr[5 - i]; -+ -+ return paraLen; -+} -+ -+void mptbt_close_WiFiRF(PADAPTER Adapter) -+{ -+ phy_set_bb_reg(Adapter, 0x824, 0xF, 0x0); -+ phy_set_bb_reg(Adapter, 0x824, 0x700000, 0x0); -+ phy_set_rf_reg(Adapter, RF_PATH_A, 0x0, 0xF0000, 0x0); -+} -+ -+void mptbt_open_WiFiRF(PADAPTER Adapter) -+{ -+ phy_set_bb_reg(Adapter, 0x824, 0x700000, 0x3); -+ phy_set_bb_reg(Adapter, 0x824, 0xF, 0x2); -+ phy_set_rf_reg(Adapter, RF_PATH_A, 0x0, 0xF0000, 0x3); -+} -+ -+u32 mptbt_switch_RF(PADAPTER Adapter, u8 Enter) -+{ -+ u16 tmp_2byte = 0; -+ -+ /* Enter test mode */ -+ if (Enter) { -+ /* 1>. close WiFi RF */ -+ mptbt_close_WiFiRF(Adapter); -+ -+ /* 2>. change ant switch to BT */ -+ tmp_2byte = rtw_read16(Adapter, 0x860); -+ tmp_2byte = tmp_2byte | BIT(9); -+ tmp_2byte = tmp_2byte & (~BIT(8)); -+ rtw_write16(Adapter, 0x860, tmp_2byte); -+ rtw_write16(Adapter, 0x870, 0x300); -+ } else { -+ /* 1>. Open WiFi RF */ -+ mptbt_open_WiFiRF(Adapter); -+ -+ /* 2>. change ant switch back */ -+ tmp_2byte = rtw_read16(Adapter, 0x860); -+ tmp_2byte = tmp_2byte | BIT(8); -+ tmp_2byte = tmp_2byte & (~BIT(9)); -+ rtw_write16(Adapter, 0x860, tmp_2byte); -+ rtw_write16(Adapter, 0x870, 0x300); -+ } -+ -+ return 0; -+} -+ -+u16 -+mptbt_BtSetMode( -+ PADAPTER Adapter, -+ PBT_REQ_CMD pBtReq, -+ PBT_RSP_CMD pBtRsp -+) -+{ -+ u8 h2cParaBuf[6] = {0}; -+ u8 h2cParaLen = 0; -+ u16 paraLen = 0; -+ u8 retStatus = BT_STATUS_BT_OP_SUCCESS; -+ u8 btOpcode; -+ u8 btOpcodeVer = 0; -+ u8 btModeToSet = 0; -+ -+ /* */ -+ /* check upper layer parameters */ -+ /* */ -+ /* 1. check upper layer opcode version */ -+ if (pBtReq->opCodeVer != 1) { -+ RTW_INFO("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ /* 2. check upper layer parameter length */ -+ if (1 == pBtReq->paraLength) { -+ btModeToSet = pBtReq->pParamStart[0]; -+ RTW_INFO("[MPT], BtTestMode=%d\n", btModeToSet); -+ } else { -+ RTW_INFO("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ -+ /* */ -+ /* execute lower layer opcodes */ -+ /* */ -+ -+ /* 1. fill h2c parameters */ -+ /* check bt mode */ -+ btOpcode = BT_LO_OP_SET_BT_MODE; -+ if (btModeToSet >= MP_BT_MODE_MAX) { -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } else { -+ mptbt_switch_RF(Adapter, 1); -+ -+ h2cParaBuf[0] = btModeToSet; -+ h2cParaLen = 1; -+ /* 2. execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ /* 3. construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS == retStatus) -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ else { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ } -+ -+ return paraLen; -+} -+ -+ -+void -+MPTBT_FwC2hBtMpCtrl( -+ PADAPTER Adapter, -+ u8 *tmpBuf, -+ u8 length -+) -+{ -+ u32 i; -+ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); -+ PBT_EXT_C2H pExtC2h = (PBT_EXT_C2H)tmpBuf; -+ -+ if (GET_HAL_DATA(Adapter)->bBTFWReady == _FALSE || Adapter->registrypriv.mp_mode == 0) { -+ /* RTW_INFO("Ignore C2H BT MP Info since not in MP mode\n"); */ -+ return; -+ } -+ if (length > 32 || length < 3) { -+ RTW_INFO("\n [MPT], pExtC2h->buf hex: length=%d > 32 || < 3\n", length); -+ return; -+ } -+ -+ /* cancel_timeout for h2c handle */ -+ _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); -+ -+ for (i = 0; i < length; i++) -+ RTW_INFO("[MPT], %s, buf[%d]=0x%02x ", __FUNCTION__, i, tmpBuf[i]); -+ RTW_INFO("[MPT], pExtC2h->extendId=0x%x\n", pExtC2h->extendId); -+ -+ switch (pExtC2h->extendId) { -+ case EXT_C2H_WIFI_FW_ACTIVE_RSP: -+ RTW_INFO("[MPT], EXT_C2H_WIFI_FW_ACTIVE_RSP\n"); -+#if 0 -+ RTW_INFO("[MPT], pExtC2h->buf hex:\n"); -+ for (i = 0; i < (length - 3); i++) -+ RTW_INFO(" 0x%x ", pExtC2h->buf[i]); -+#endif -+ if ((_FALSE == pMptCtx->bMPh2c_timeout) -+ && (_FALSE == pMptCtx->MptH2cRspEvent)) { -+ pMptCtx->MptH2cRspEvent = _TRUE; -+ _rtw_up_sema(&pMptCtx->MPh2c_Sema); -+ } -+ break; -+ -+ case EXT_C2H_TRIG_BY_BT_FW: -+ RTW_INFO("[MPT], EXT_C2H_TRIG_BY_BT_FW\n"); -+ _rtw_memcpy(&pMptCtx->c2hBuf[0], tmpBuf, length); -+ RTW_INFO("[MPT], pExtC2h->statusCode=0x%x\n", pExtC2h->statusCode); -+ RTW_INFO("[MPT], pExtC2h->retLen=0x%x\n", pExtC2h->retLen); -+ RTW_INFO("[MPT], pExtC2h->opCodeVer=0x%x\n", pExtC2h->opCodeVer); -+ RTW_INFO("[MPT], pExtC2h->reqNum=0x%x\n", pExtC2h->reqNum); -+ for (i = 0; i < (length - 3); i++) -+ RTW_INFO("[MPT], pExtC2h->buf[%d]=0x%02x\n", i, pExtC2h->buf[i]); -+ -+ if ((_FALSE == pMptCtx->bMPh2c_timeout) -+ && (_TRUE == pMptCtx->MptH2cRspEvent) -+ && (_FALSE == pMptCtx->MptBtC2hEvent)) { -+ pMptCtx->MptBtC2hEvent = _TRUE; -+ _rtw_up_sema(&pMptCtx->MPh2c_Sema); -+ } -+ break; -+ -+ default: -+ RTW_INFO("[MPT], EXT_C2H Target not found,pExtC2h->extendId =%d ,pExtC2h->reqNum=%d\n", pExtC2h->extendId, pExtC2h->reqNum); -+ break; -+ } -+ -+ -+ -+} -+ -+ -+u16 -+mptbt_BtGetGeneral( -+ PADAPTER Adapter, -+ PBT_REQ_CMD pBtReq, -+ PBT_RSP_CMD pBtRsp -+) -+{ -+ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); -+ PBT_EXT_C2H pExtC2h = (PBT_EXT_C2H)&pMptCtx->c2hBuf[0]; -+ u8 h2cParaBuf[6] = {0}; -+ u8 h2cParaLen = 0; -+ u16 paraLen = 0; -+ u8 retStatus = BT_STATUS_BT_OP_SUCCESS; -+ u8 btOpcode, bdAddr[6] = {0}; -+ u8 btOpcodeVer = 0; -+ u8 getType = 0, i; -+ u16 getParaLen = 0, validParaLen = 0; -+ u8 regType = 0, reportType = 0; -+ u32 regAddr = 0, regValue = 0; -+ u32 *pu4Tmp; -+ u16 *pu2Tmp; -+ u8 *pu1Tmp; -+ -+ /* */ -+ /* check upper layer parameters */ -+ /* */ -+ -+ /* check upper layer opcode version */ -+ if (pBtReq->opCodeVer != 1) { -+ RTW_INFO("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ /* check upper layer parameter length */ -+ if (pBtReq->paraLength < 1) { -+ RTW_INFO("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ getParaLen = pBtReq->paraLength - 1; -+ getType = pBtReq->pParamStart[0]; -+ -+ RTW_INFO("[MPT], getType=%d, getParaLen=%d\n", getType, getParaLen); -+ -+ /* check parameter first */ -+ switch (getType) { -+ case BT_GGET_REG: -+ RTW_INFO("[MPT], [BT_GGET_REG]\n"); -+ validParaLen = 5; -+ if (getParaLen == validParaLen) { -+ btOpcode = BT_LO_OP_READ_REG; -+ regType = pBtReq->pParamStart[1]; -+ pu4Tmp = (u32 *)&pBtReq->pParamStart[2]; -+ regAddr = *pu4Tmp; -+ RTW_INFO("[MPT], BT_GGET_REG regType=0x%02x, regAddr=0x%08x!!\n", -+ regType, regAddr); -+ if (regType >= BT_REG_MAX) { -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } else { -+ if (((BT_REG_RF == regType) && (regAddr > 0x7f)) || -+ ((BT_REG_MODEM == regType) && (regAddr > 0x1ff)) || -+ ((BT_REG_BLUEWIZE == regType) && (regAddr > 0xfff)) || -+ ((BT_REG_VENDOR == regType) && (regAddr > 0xfff)) || -+ ((BT_REG_LE == regType) && (regAddr > 0xfff))) { -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ } -+ } -+ break; -+ case BT_GGET_STATUS: -+ RTW_INFO("[MPT], [BT_GGET_STATUS]\n"); -+ validParaLen = 0; -+ break; -+ case BT_GGET_REPORT: -+ RTW_INFO("[MPT], [BT_GGET_REPORT]\n"); -+ validParaLen = 1; -+ if (getParaLen == validParaLen) { -+ reportType = pBtReq->pParamStart[1]; -+ RTW_INFO("[MPT], BT_GGET_REPORT reportType=0x%x!!\n", reportType); -+ if (reportType >= BT_REPORT_MAX) { -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ } -+ break; -+ default: { -+ RTW_INFO("[MPT], Error!! getType=%d, out of range\n", getType); -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ break; -+ } -+ if (getParaLen != validParaLen) { -+ RTW_INFO("[MPT], Error!! wrong parameter length=%d for BT_GET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", -+ getParaLen, getType, validParaLen); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ -+ /* */ -+ /* execute lower layer opcodes */ -+ /* */ -+ if (BT_GGET_REG == getType) { -+ /* fill h2c parameters */ -+ /* here we should write reg value first then write the address, adviced by Austin */ -+ btOpcode = BT_LO_OP_READ_REG; -+ h2cParaBuf[0] = regType; -+ h2cParaBuf[1] = pBtReq->pParamStart[2]; -+ h2cParaBuf[2] = pBtReq->pParamStart[3]; -+ h2cParaLen = 3; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ pu2Tmp = (u16 *)&pExtC2h->buf[0]; -+ regValue = *pu2Tmp; -+ RTW_INFO("[MPT], read reg regType=0x%02x, regAddr=0x%08x, regValue=0x%04x\n", -+ regType, regAddr, regValue); -+ -+ pu4Tmp = (u32 *)&pBtRsp->pParamStart[0]; -+ *pu4Tmp = regValue; -+ paraLen = 4; -+ } else if (BT_GGET_STATUS == getType) { -+ btOpcode = BT_LO_OP_GET_BT_STATUS; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; -+ RTW_INFO("[MPT], read bt status, testMode=0x%x, testStatus=0x%x\n", -+ pBtRsp->pParamStart[0], pBtRsp->pParamStart[1]); -+ paraLen = 2; -+ } else if (BT_GGET_REPORT == getType) { -+ switch (reportType) { -+ case BT_REPORT_RX_PACKET_CNT: { -+ RTW_INFO("[MPT], [Rx Packet Counts]\n"); -+ btOpcode = BT_LO_OP_GET_RX_PKT_CNT_L; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; -+ -+ btOpcode = BT_LO_OP_GET_RX_PKT_CNT_H; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; -+ paraLen = 4; -+ } -+ break; -+ case BT_REPORT_RX_ERROR_BITS: { -+ RTW_INFO("[MPT], [Rx Error Bits]\n"); -+ btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_L; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; -+ -+ btOpcode = BT_LO_OP_GET_RX_ERROR_BITS_H; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; -+ paraLen = 4; -+ } -+ break; -+ case BT_REPORT_RSSI: { -+ RTW_INFO("[MPT], [RSSI]\n"); -+ btOpcode = BT_LO_OP_GET_RSSI; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; -+ paraLen = 2; -+ } -+ break; -+ case BT_REPORT_CFO_HDR_QUALITY: { -+ RTW_INFO("[MPT], [CFO & Header Quality]\n"); -+ btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_L; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[0] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[1] = pExtC2h->buf[1]; -+ -+ btOpcode = BT_LO_OP_GET_CFO_HDR_QUALITY_H; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ pBtRsp->pParamStart[2] = pExtC2h->buf[0]; -+ pBtRsp->pParamStart[3] = pExtC2h->buf[1]; -+ paraLen = 4; -+ } -+ break; -+ case BT_REPORT_CONNECT_TARGET_BD_ADDR: { -+ RTW_INFO("[MPT], [Connected Target BD ADDR]\n"); -+ btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_L; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ bdAddr[5] = pExtC2h->buf[0]; -+ bdAddr[4] = pExtC2h->buf[1]; -+ bdAddr[3] = pExtC2h->buf[2]; -+ -+ btOpcode = BT_LO_OP_GET_TARGET_BD_ADDR_H; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ bdAddr[2] = pExtC2h->buf[0]; -+ bdAddr[1] = pExtC2h->buf[1]; -+ bdAddr[0] = pExtC2h->buf[2]; -+ -+ RTW_INFO("[MPT], Connected Target BDAddr:%s", bdAddr); -+ for (i = 0; i < 6; i++) -+ pBtRsp->pParamStart[i] = bdAddr[5 - i]; -+ paraLen = 6; -+ } -+ break; -+ default: -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ break; -+ } -+ } -+ -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ return paraLen; -+} -+ -+ -+ -+u16 -+mptbt_BtSetGeneral( -+ PADAPTER Adapter, -+ PBT_REQ_CMD pBtReq, -+ PBT_RSP_CMD pBtRsp -+) -+{ -+ u8 h2cParaBuf[6] = {0}; -+ u8 h2cParaLen = 0; -+ u16 paraLen = 0; -+ u8 retStatus = BT_STATUS_BT_OP_SUCCESS; -+ u8 btOpcode; -+ u8 btOpcodeVer = 0; -+ u8 setType = 0; -+ u16 setParaLen = 0, validParaLen = 0; -+ u8 regType = 0, bdAddr[6] = {0}, calVal = 0; -+ u32 regAddr = 0, regValue = 0; -+ u32 *pu4Tmp; -+ u16 *pu2Tmp; -+ u8 *pu1Tmp; -+ -+ /* */ -+ /* check upper layer parameters */ -+ /* */ -+ -+ /* check upper layer opcode version */ -+ if (pBtReq->opCodeVer != 1) { -+ RTW_INFO("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ /* check upper layer parameter length */ -+ if (pBtReq->paraLength < 1) { -+ RTW_INFO("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ setParaLen = pBtReq->paraLength - 1; -+ setType = pBtReq->pParamStart[0]; -+ -+ RTW_INFO("[MPT], setType=%d, setParaLen=%d\n", setType, setParaLen); -+ -+ /* check parameter first */ -+ switch (setType) { -+ case BT_GSET_REG: -+ RTW_INFO("[MPT], [BT_GSET_REG]\n"); -+ validParaLen = 9; -+ if (setParaLen == validParaLen) { -+ btOpcode = BT_LO_OP_WRITE_REG_VALUE; -+ regType = pBtReq->pParamStart[1]; -+ pu4Tmp = (u32 *)&pBtReq->pParamStart[2]; -+ regAddr = *pu4Tmp; -+ pu4Tmp = (u32 *)&pBtReq->pParamStart[6]; -+ regValue = *pu4Tmp; -+ RTW_INFO("[MPT], BT_GSET_REG regType=0x%x, regAddr=0x%x, regValue=0x%x!!\n", -+ regType, regAddr, regValue); -+ if (regType >= BT_REG_MAX) { -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } else { -+ if (((BT_REG_RF == regType) && (regAddr > 0x7f)) || -+ ((BT_REG_MODEM == regType) && (regAddr > 0x1ff)) || -+ ((BT_REG_BLUEWIZE == regType) && (regAddr > 0xfff)) || -+ ((BT_REG_VENDOR == regType) && (regAddr > 0xfff)) || -+ ((BT_REG_LE == regType) && (regAddr > 0xfff))) { -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ } -+ } -+ break; -+ case BT_GSET_RESET: -+ RTW_INFO("[MPT], [BT_GSET_RESET]\n"); -+ validParaLen = 0; -+ break; -+ case BT_GSET_TARGET_BD_ADDR: -+ RTW_INFO("[MPT], [BT_GSET_TARGET_BD_ADDR]\n"); -+ validParaLen = 6; -+ if (setParaLen == validParaLen) { -+ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; -+ if ((pBtReq->pParamStart[1] == 0) && -+ (pBtReq->pParamStart[2] == 0) && -+ (pBtReq->pParamStart[3] == 0) && -+ (pBtReq->pParamStart[4] == 0) && -+ (pBtReq->pParamStart[5] == 0) && -+ (pBtReq->pParamStart[6] == 0)) { -+ RTW_INFO("[MPT], Error!! targetBDAddr=all zero\n"); -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ if ((pBtReq->pParamStart[1] == 0xff) && -+ (pBtReq->pParamStart[2] == 0xff) && -+ (pBtReq->pParamStart[3] == 0xff) && -+ (pBtReq->pParamStart[4] == 0xff) && -+ (pBtReq->pParamStart[5] == 0xff) && -+ (pBtReq->pParamStart[6] == 0xff)) { -+ RTW_INFO("[MPT], Error!! targetBDAddr=all 0xf\n"); -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ bdAddr[0] = pBtReq->pParamStart[6]; -+ bdAddr[1] = pBtReq->pParamStart[5]; -+ bdAddr[2] = pBtReq->pParamStart[4]; -+ bdAddr[3] = pBtReq->pParamStart[3]; -+ bdAddr[4] = pBtReq->pParamStart[2]; -+ bdAddr[5] = pBtReq->pParamStart[1]; -+ RTW_INFO("[MPT], target BDAddr:%x,%x,%x,%x,%x,%x\n", -+ bdAddr[0], bdAddr[1], bdAddr[2], bdAddr[3], bdAddr[4], bdAddr[5]); -+ } -+ break; -+ case BT_GSET_TX_PWR_FINETUNE: -+ RTW_INFO("[MPT], [BT_GSET_TX_PWR_FINETUNE]\n"); -+ validParaLen = 1; -+ if (setParaLen == validParaLen) { -+ btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; -+ calVal = pBtReq->pParamStart[1]; -+ if ((calVal < 1) || (calVal > 9)) { -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ RTW_INFO("[MPT], calVal=%d\n", calVal); -+ } -+ break; -+ case BT_SET_TRACKING_INTERVAL: -+ RTW_INFO("[MPT], [BT_SET_TRACKING_INTERVAL] setParaLen =%d\n", setParaLen); -+ -+ validParaLen = 1; -+ if (setParaLen == validParaLen) -+ calVal = pBtReq->pParamStart[1]; -+ break; -+ case BT_SET_THERMAL_METER: -+ RTW_INFO("[MPT], [BT_SET_THERMAL_METER] setParaLen =%d\n", setParaLen); -+ validParaLen = 1; -+ if (setParaLen == validParaLen) -+ calVal = pBtReq->pParamStart[1]; -+ break; -+ case BT_ENABLE_CFO_TRACKING: -+ RTW_INFO("[MPT], [BT_ENABLE_CFO_TRACKING] setParaLen =%d\n", setParaLen); -+ validParaLen = 1; -+ if (setParaLen == validParaLen) -+ calVal = pBtReq->pParamStart[1]; -+ break; -+ case BT_GSET_UPDATE_BT_PATCH: -+ -+ break; -+ default: { -+ RTW_INFO("[MPT], Error!! setType=%d, out of range\n", setType); -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ break; -+ } -+ if (setParaLen != validParaLen) { -+ RTW_INFO("[MPT], Error!! wrong parameter length=%d for BT_SET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n", -+ setParaLen, setType, validParaLen); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ -+ /* */ -+ /* execute lower layer opcodes */ -+ /* */ -+ if (BT_GSET_REG == setType) { -+ /* fill h2c parameters */ -+ /* here we should write reg value first then write the address, adviced by Austin */ -+ btOpcode = BT_LO_OP_WRITE_REG_VALUE; -+ h2cParaBuf[0] = pBtReq->pParamStart[6]; -+ h2cParaBuf[1] = pBtReq->pParamStart[7]; -+ h2cParaBuf[2] = pBtReq->pParamStart[8]; -+ h2cParaLen = 3; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ /* write reg address */ -+ btOpcode = BT_LO_OP_WRITE_REG_ADDR; -+ h2cParaBuf[0] = regType; -+ h2cParaBuf[1] = pBtReq->pParamStart[2]; -+ h2cParaBuf[2] = pBtReq->pParamStart[3]; -+ h2cParaLen = 3; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ } else if (BT_GSET_RESET == setType) { -+ btOpcode = BT_LO_OP_RESET; -+ h2cParaLen = 0; -+ /* execute h2c and check respond c2h from bt fw is correct or not */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ } else if (BT_GSET_TARGET_BD_ADDR == setType) { -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_L; -+ h2cParaBuf[0] = pBtReq->pParamStart[1]; -+ h2cParaBuf[1] = pBtReq->pParamStart[2]; -+ h2cParaBuf[2] = pBtReq->pParamStart[3]; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H; -+ h2cParaBuf[0] = pBtReq->pParamStart[4]; -+ h2cParaBuf[1] = pBtReq->pParamStart[5]; -+ h2cParaBuf[2] = pBtReq->pParamStart[6]; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ } else if (BT_GSET_TX_PWR_FINETUNE == setType) { -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION; -+ h2cParaBuf[0] = calVal; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ } else if (BT_SET_TRACKING_INTERVAL == setType) { -+ /* BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, */ -+ /* BT_LO_OP_SET_THERMAL_METER = 0x23, */ -+ /* BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, */ -+ btOpcode = BT_LO_OP_SET_TRACKING_INTERVAL; -+ h2cParaBuf[0] = calVal; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ } else if (BT_SET_THERMAL_METER == setType) { -+ btOpcode = BT_LO_OP_SET_THERMAL_METER; -+ h2cParaBuf[0] = calVal; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ } else if (BT_ENABLE_CFO_TRACKING == setType) { -+ btOpcode = BT_LO_OP_ENABLE_CFO_TRACKING; -+ h2cParaBuf[0] = calVal; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ } -+ -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ return paraLen; -+} -+ -+ -+ -+u16 -+mptbt_BtSetTxRxPars( -+ PADAPTER Adapter, -+ PBT_REQ_CMD pBtReq, -+ PBT_RSP_CMD pBtRsp -+) -+{ -+ u8 h2cParaBuf[6] = {0}; -+ u8 h2cParaLen = 0; -+ u16 paraLen = 0; -+ u8 retStatus = BT_STATUS_BT_OP_SUCCESS; -+ u8 btOpcode; -+ u8 btOpcodeVer = 0; -+ PBT_TXRX_PARAMETERS pTxRxPars = (PBT_TXRX_PARAMETERS)&pBtReq->pParamStart[0]; -+ u16 lenTxRx = sizeof(BT_TXRX_PARAMETERS); -+ u8 i; -+ u8 bdAddr[6] = {0}; -+ -+ /* */ -+ /* check upper layer parameters */ -+ /* */ -+ -+ /* 1. check upper layer opcode version */ -+ if (pBtReq->opCodeVer != 1) { -+ RTW_INFO("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ /* 2. check upper layer parameter length */ -+ if (pBtReq->paraLength == sizeof(BT_TXRX_PARAMETERS)) { -+ RTW_INFO("[MPT], pTxRxPars->txrxChannel=0x%x\n", pTxRxPars->txrxChannel); -+ RTW_INFO("[MPT], pTxRxPars->txrxTxPktCnt=0x%8x\n", pTxRxPars->txrxTxPktCnt); -+ RTW_INFO("[MPT], pTxRxPars->txrxTxPktInterval=0x%x\n", pTxRxPars->txrxTxPktInterval); -+ RTW_INFO("[MPT], pTxRxPars->txrxPayloadType=0x%x\n", pTxRxPars->txrxPayloadType); -+ RTW_INFO("[MPT], pTxRxPars->txrxPktType=0x%x\n", pTxRxPars->txrxPktType); -+ RTW_INFO("[MPT], pTxRxPars->txrxPayloadLen=0x%x\n", pTxRxPars->txrxPayloadLen); -+ RTW_INFO("[MPT], pTxRxPars->txrxPktHeader=0x%x\n", pTxRxPars->txrxPktHeader); -+ RTW_INFO("[MPT], pTxRxPars->txrxWhitenCoeff=0x%x\n", pTxRxPars->txrxWhitenCoeff); -+ bdAddr[0] = pTxRxPars->txrxBdaddr[5]; -+ bdAddr[1] = pTxRxPars->txrxBdaddr[4]; -+ bdAddr[2] = pTxRxPars->txrxBdaddr[3]; -+ bdAddr[3] = pTxRxPars->txrxBdaddr[2]; -+ bdAddr[4] = pTxRxPars->txrxBdaddr[1]; -+ bdAddr[5] = pTxRxPars->txrxBdaddr[0]; -+ RTW_INFO("[MPT], pTxRxPars->txrxBdaddr: %s", &bdAddr[0]); -+ RTW_INFO("[MPT], pTxRxPars->txrxTxGainIndex=0x%x\n", pTxRxPars->txrxTxGainIndex); -+ } else { -+ RTW_INFO("[MPT], Error!! pBtReq->paraLength=%d, correct Len=%d\n", pBtReq->paraLength, lenTxRx); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ -+ /* */ -+ /* execute lower layer opcodes */ -+ /* */ -+ -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_SET_PKT_HEADER; -+ if (pTxRxPars->txrxPktHeader > 0x3ffff) { -+ RTW_INFO("[MPT], Error!! pTxRxPars->txrxPktHeader=0x%x is out of range, (should be between 0x0~0x3ffff)\n", pTxRxPars->txrxPktHeader); -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } else { -+ h2cParaBuf[0] = (u8)(pTxRxPars->txrxPktHeader & 0xff); -+ h2cParaBuf[1] = (u8)((pTxRxPars->txrxPktHeader & 0xff00) >> 8); -+ h2cParaBuf[2] = (u8)((pTxRxPars->txrxPktHeader & 0xff0000) >> 16); -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_SET_PKT_TYPE_LEN; -+ { -+ u16 payloadLenLimit = 0; -+ switch (pTxRxPars->txrxPktType) { -+ case MP_BT_PKT_DH1: -+ payloadLenLimit = 27 * 8; -+ break; -+ case MP_BT_PKT_DH3: -+ payloadLenLimit = 183 * 8; -+ break; -+ case MP_BT_PKT_DH5: -+ payloadLenLimit = 339 * 8; -+ break; -+ case MP_BT_PKT_2DH1: -+ payloadLenLimit = 54 * 8; -+ break; -+ case MP_BT_PKT_2DH3: -+ payloadLenLimit = 367 * 8; -+ break; -+ case MP_BT_PKT_2DH5: -+ payloadLenLimit = 679 * 8; -+ break; -+ case MP_BT_PKT_3DH1: -+ payloadLenLimit = 83 * 8; -+ break; -+ case MP_BT_PKT_3DH3: -+ payloadLenLimit = 552 * 8; -+ break; -+ case MP_BT_PKT_3DH5: -+ payloadLenLimit = 1021 * 8; -+ break; -+ case MP_BT_PKT_LE: -+ payloadLenLimit = 39 * 8; -+ break; -+ default: { -+ RTW_INFO("[MPT], Error!! Unknown pTxRxPars->txrxPktType=0x%x\n", pTxRxPars->txrxPktType); -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ break; -+ } -+ -+ if (pTxRxPars->txrxPayloadLen > payloadLenLimit) { -+ RTW_INFO("[MPT], Error!! pTxRxPars->txrxPayloadLen=0x%x, (should smaller than %d)\n", -+ pTxRxPars->txrxPayloadLen, payloadLenLimit); -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ -+ h2cParaBuf[0] = pTxRxPars->txrxPktType; -+ h2cParaBuf[1] = (u8)((pTxRxPars->txrxPayloadLen & 0xff)); -+ h2cParaBuf[2] = (u8)((pTxRxPars->txrxPayloadLen & 0xff00) >> 8); -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_SET_PKT_CNT_L_PL_TYPE; -+ if (pTxRxPars->txrxPayloadType > MP_BT_PAYLOAD_MAX) { -+ RTW_INFO("[MPT], Error!! pTxRxPars->txrxPayloadType=0x%x, (should be between 0~4)\n", pTxRxPars->txrxPayloadType); -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } else { -+ h2cParaBuf[0] = (u8)((pTxRxPars->txrxTxPktCnt & 0xff)); -+ h2cParaBuf[1] = (u8)((pTxRxPars->txrxTxPktCnt & 0xff00) >> 8); -+ h2cParaBuf[2] = pTxRxPars->txrxPayloadType; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_SET_PKT_CNT_H_PKT_INTV; -+ if (pTxRxPars->txrxTxPktInterval > 15) { -+ RTW_INFO("[MPT], Error!! pTxRxPars->txrxTxPktInterval=0x%x, (should be between 0~15)\n", pTxRxPars->txrxTxPktInterval); -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } else { -+ h2cParaBuf[0] = (u8)((pTxRxPars->txrxTxPktCnt & 0xff0000) >> 16); -+ h2cParaBuf[1] = (u8)((pTxRxPars->txrxTxPktCnt & 0xff000000) >> 24); -+ h2cParaBuf[2] = pTxRxPars->txrxTxPktInterval; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_SET_WHITENCOEFF; -+ { -+ h2cParaBuf[0] = pTxRxPars->txrxWhitenCoeff; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_SET_CHNL_TX_GAIN; -+ if ((pTxRxPars->txrxChannel > 78) || -+ (pTxRxPars->txrxTxGainIndex > 7)) { -+ RTW_INFO("[MPT], Error!! pTxRxPars->txrxChannel=0x%x, (should be between 0~78)\n", pTxRxPars->txrxChannel); -+ RTW_INFO("[MPT], Error!! pTxRxPars->txrxTxGainIndex=0x%x, (should be between 0~7)\n", pTxRxPars->txrxTxGainIndex); -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } else { -+ h2cParaBuf[0] = pTxRxPars->txrxChannel; -+ h2cParaBuf[1] = pTxRxPars->txrxTxGainIndex; -+ h2cParaLen = 2; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ /* fill h2c parameters */ -+ btOpcode = BT_LO_OP_SET_BD_ADDR_L; -+ if ((pTxRxPars->txrxBdaddr[0] == 0) && -+ (pTxRxPars->txrxBdaddr[1] == 0) && -+ (pTxRxPars->txrxBdaddr[2] == 0) && -+ (pTxRxPars->txrxBdaddr[3] == 0) && -+ (pTxRxPars->txrxBdaddr[4] == 0) && -+ (pTxRxPars->txrxBdaddr[5] == 0)) { -+ RTW_INFO("[MPT], Error!! pTxRxPars->txrxBdaddr=all zero\n"); -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ if ((pTxRxPars->txrxBdaddr[0] == 0xff) && -+ (pTxRxPars->txrxBdaddr[1] == 0xff) && -+ (pTxRxPars->txrxBdaddr[2] == 0xff) && -+ (pTxRxPars->txrxBdaddr[3] == 0xff) && -+ (pTxRxPars->txrxBdaddr[4] == 0xff) && -+ (pTxRxPars->txrxBdaddr[5] == 0xff)) { -+ RTW_INFO("[MPT], Error!! pTxRxPars->txrxBdaddr=all 0xf\n"); -+ pBtRsp->status = (btOpcode << 8) | BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } -+ -+ { -+ h2cParaBuf[0] = pTxRxPars->txrxBdaddr[0]; -+ h2cParaBuf[1] = pTxRxPars->txrxBdaddr[1]; -+ h2cParaBuf[2] = pTxRxPars->txrxBdaddr[2]; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ btOpcode = BT_LO_OP_SET_BD_ADDR_H; -+ { -+ h2cParaBuf[0] = pTxRxPars->txrxBdaddr[3]; -+ h2cParaBuf[1] = pTxRxPars->txrxBdaddr[4]; -+ h2cParaBuf[2] = pTxRxPars->txrxBdaddr[5]; -+ h2cParaLen = 3; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ /* ckeck bt return status. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ return paraLen; -+} -+ -+ -+ -+u16 -+mptbt_BtTestCtrl( -+ PADAPTER Adapter, -+ PBT_REQ_CMD pBtReq, -+ PBT_RSP_CMD pBtRsp -+) -+{ -+ u8 h2cParaBuf[6] = {0}; -+ u8 h2cParaLen = 0; -+ u16 paraLen = 0; -+ u8 retStatus = BT_STATUS_BT_OP_SUCCESS; -+ u8 btOpcode; -+ u8 btOpcodeVer = 0; -+ u8 testCtrl = 0; -+ -+ /* */ -+ /* check upper layer parameters */ -+ /* */ -+ -+ /* 1. check upper layer opcode version */ -+ if (pBtReq->opCodeVer != 1) { -+ RTW_INFO("[MPT], Error!! Upper OP code version not match!!!\n"); -+ pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH; -+ return paraLen; -+ } -+ /* 2. check upper layer parameter length */ -+ if (1 == pBtReq->paraLength) { -+ testCtrl = pBtReq->pParamStart[0]; -+ RTW_INFO("[MPT], testCtrl=%d\n", testCtrl); -+ } else { -+ RTW_INFO("[MPT], Error!! wrong parameter length=%d (should be 1)\n", pBtReq->paraLength); -+ pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U; -+ return paraLen; -+ } -+ -+ /* */ -+ /* execute lower layer opcodes */ -+ /* */ -+ -+ /* 1. fill h2c parameters */ -+ /* check bt mode */ -+ btOpcode = BT_LO_OP_TEST_CTRL; -+ if (testCtrl >= MP_BT_TEST_MAX) { -+ RTW_INFO("[MPT], Error!! testCtrl=0x%x, (should be between smaller or equal to 0x%x)\n", -+ testCtrl, MP_BT_TEST_MAX - 1); -+ pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U; -+ return paraLen; -+ } else { -+ h2cParaBuf[0] = testCtrl; -+ h2cParaLen = 1; -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); -+ } -+ -+ /* 3. construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ return paraLen; -+} -+ -+ -+u16 -+mptbt_TestBT( -+ PADAPTER Adapter, -+ PBT_REQ_CMD pBtReq, -+ PBT_RSP_CMD pBtRsp -+) -+{ -+ -+ u8 h2cParaBuf[6] = {0}; -+ u8 h2cParaLen = 0; -+ u16 paraLen = 0; -+ u8 retStatus = BT_STATUS_BT_OP_SUCCESS; -+ u8 btOpcode; -+ u8 btOpcodeVer = 0; -+ u8 testCtrl = 0; -+ -+ /* 1. fill h2c parameters */ -+ btOpcode = 0x11; -+ h2cParaBuf[0] = 0x11; -+ h2cParaBuf[1] = 0x0; -+ h2cParaBuf[2] = 0x0; -+ h2cParaBuf[3] = 0x0; -+ h2cParaBuf[4] = 0x0; -+ h2cParaLen = 1; -+ /* retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen); */ -+ retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, h2cParaBuf, h2cParaLen); -+ -+ -+ /* 3. construct respond status code and data. */ -+ if (BT_STATUS_BT_OP_SUCCESS != retStatus) { -+ pBtRsp->status = ((btOpcode << 8) | retStatus); -+ RTW_INFO("[MPT], Error!! status code=0x%x\n", pBtRsp->status); -+ return paraLen; -+ } -+ -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ return paraLen; -+} -+ -+void -+mptbt_BtControlProcess( -+ PADAPTER Adapter, -+ void *pInBuf -+) -+{ -+ u8 H2C_Parameter[6] = {0}; -+ PBT_H2C pH2c = (PBT_H2C)&H2C_Parameter[0]; -+ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); -+ PBT_REQ_CMD pBtReq = (PBT_REQ_CMD)pInBuf; -+ PBT_RSP_CMD pBtRsp; -+ u8 i; -+ -+ -+ RTW_INFO("[MPT], mptbt_BtControlProcess()=========>\n"); -+ -+ RTW_INFO("[MPT], input opCodeVer=%d\n", pBtReq->opCodeVer); -+ RTW_INFO("[MPT], input OpCode=%d\n", pBtReq->OpCode); -+ RTW_INFO("[MPT], paraLength=%d\n", pBtReq->paraLength); -+ if (pBtReq->paraLength) { -+ /* RTW_INFO("[MPT], parameters(hex):0x%x %d\n",&pBtReq->pParamStart[0], pBtReq->paraLength); */ -+ } -+ -+ _rtw_memset((void *)pMptCtx->mptOutBuf, 0, 100); -+ pMptCtx->mptOutLen = 4; /* length of (BT_RSP_CMD.status+BT_RSP_CMD.paraLength) */ -+ -+ pBtRsp = (PBT_RSP_CMD)pMptCtx->mptOutBuf; -+ pBtRsp->status = BT_STATUS_SUCCESS; -+ pBtRsp->paraLength = 0x0; -+ -+ /* The following we should maintain the User OP codes sent by upper layer */ -+ switch (pBtReq->OpCode) { -+ case BT_UP_OP_BT_READY: -+ RTW_INFO("[MPT], OPcode : [BT_READY]\n"); -+ pBtRsp->paraLength = mptbt_BtReady(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_BT_SET_MODE: -+ RTW_INFO("[MPT], OPcode : [BT_SET_MODE]\n"); -+ pBtRsp->paraLength = mptbt_BtSetMode(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_BT_SET_TX_RX_PARAMETER: -+ RTW_INFO("[MPT], OPcode : [BT_SET_TXRX_PARAMETER]\n"); -+ pBtRsp->paraLength = mptbt_BtSetTxRxPars(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_BT_SET_GENERAL: -+ RTW_INFO("[MPT], OPcode : [BT_SET_GENERAL]\n"); -+ pBtRsp->paraLength = mptbt_BtSetGeneral(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_BT_GET_GENERAL: -+ RTW_INFO("[MPT], OPcode : [BT_GET_GENERAL]\n"); -+ pBtRsp->paraLength = mptbt_BtGetGeneral(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_BT_TEST_CTRL: -+ RTW_INFO("[MPT], OPcode : [BT_TEST_CTRL]\n"); -+ pBtRsp->paraLength = mptbt_BtTestCtrl(Adapter, pBtReq, pBtRsp); -+ break; -+ case BT_UP_OP_TEST_BT: -+ RTW_INFO("[MPT], OPcode : [TEST_BT]\n"); -+ pBtRsp->paraLength = mptbt_TestBT(Adapter, pBtReq, pBtRsp); -+ break; -+ default: -+ RTW_INFO("[MPT], Error!! OPcode : UNDEFINED!!!!\n"); -+ pBtRsp->status = BT_STATUS_UNKNOWN_OPCODE_U; -+ pBtRsp->paraLength = 0x0; -+ break; -+ } -+ -+ pMptCtx->mptOutLen += pBtRsp->paraLength; -+ -+ RTW_INFO("[MPT], pMptCtx->mptOutLen=%d, pBtRsp->paraLength=%d\n", pMptCtx->mptOutLen, pBtRsp->paraLength); -+ RTW_INFO("[MPT], mptbt_BtControlProcess()<=========\n"); -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/core/rtw_btcoex.c b/drivers/staging/rtl8723cs/core/rtw_btcoex.c -new file mode 100644 -index 000000000000..5081cddfc2c7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_btcoex.c -@@ -0,0 +1,1817 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include -+#include -+#ifdef CONFIG_BT_COEXIST -+#include -+ -+void rtw_btcoex_Initialize(PADAPTER padapter) -+{ -+ hal_btcoex_Initialize(padapter); -+} -+ -+void rtw_btcoex_PowerOnSetting(PADAPTER padapter) -+{ -+ hal_btcoex_PowerOnSetting(padapter); -+} -+ -+void rtw_btcoex_AntInfoSetting(PADAPTER padapter) -+{ -+ hal_btcoex_AntInfoSetting(padapter); -+} -+ -+void rtw_btcoex_PowerOffSetting(PADAPTER padapter) -+{ -+ hal_btcoex_PowerOffSetting(padapter); -+} -+ -+void rtw_btcoex_PreLoadFirmware(PADAPTER padapter) -+{ -+ hal_btcoex_PreLoadFirmware(padapter); -+} -+ -+void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly) -+{ -+ hal_btcoex_InitHwConfig(padapter, bWifiOnly); -+} -+ -+void rtw_btcoex_IpsNotify(PADAPTER padapter, u8 type) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+ hal_btcoex_IpsNotify(padapter, type); -+} -+ -+void rtw_btcoex_LpsNotify(PADAPTER padapter, u8 type) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+ hal_btcoex_LpsNotify(padapter, type); -+} -+ -+void rtw_btcoex_ScanNotify(PADAPTER padapter, u8 type) -+{ -+ PHAL_DATA_TYPE pHalData; -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ PBT_MGNT pBtMgnt = &pcoex_info->BtMgnt; -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+ if (_FALSE == type) { -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_SURVEY)) -+ return; -+ #endif -+ -+ if (DEV_MGMT_TX_NUM(adapter_to_dvobj(padapter)) -+ || DEV_ROCH_NUM(adapter_to_dvobj(padapter))) -+ return; -+ } -+ -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ if (pBtMgnt->ExtConfig.bEnableWifiScanNotify) -+ rtw_btcoex_SendScanNotify(padapter, type); -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ -+ hal_btcoex_ScanNotify(padapter, type); -+} -+ -+static void _rtw_btcoex_connect_notify(PADAPTER padapter, u8 action) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+#ifdef DBG_CONFIG_ERROR_RESET -+ if (_TRUE == rtw_hal_sreset_inprogress(padapter)) { -+ RTW_INFO(FUNC_ADPT_FMT ": [BTCoex] under reset, skip notify!\n", -+ FUNC_ADPT_ARG(padapter)); -+ return; -+ } -+#endif /* DBG_CONFIG_ERROR_RESET */ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (_FALSE == action) { -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_LINKING)) -+ return; -+ } -+#endif -+ -+ hal_btcoex_ConnectNotify(padapter, action); -+} -+ -+void rtw_btcoex_MediaStatusNotify(PADAPTER padapter, u8 mediaStatus) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+#ifdef DBG_CONFIG_ERROR_RESET -+ if (_TRUE == rtw_hal_sreset_inprogress(padapter)) { -+ RTW_INFO(FUNC_ADPT_FMT ": [BTCoex] under reset, skip notify!\n", -+ FUNC_ADPT_ARG(padapter)); -+ return; -+ } -+#endif /* DBG_CONFIG_ERROR_RESET */ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (RT_MEDIA_DISCONNECT == mediaStatus) { -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_ASOC_STATE)) -+ return; -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ if ((RT_MEDIA_CONNECT == mediaStatus) -+ && (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)) -+ rtw_hal_set_hwreg(padapter, HW_VAR_DL_RSVD_PAGE, NULL); -+ -+ hal_btcoex_MediaStatusNotify(padapter, mediaStatus); -+} -+ -+void rtw_btcoex_SpecialPacketNotify(PADAPTER padapter, u8 pktType) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+ hal_btcoex_SpecialPacketNotify(padapter, pktType); -+} -+ -+void rtw_btcoex_IQKNotify(PADAPTER padapter, u8 state) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+ hal_btcoex_IQKNotify(padapter, state); -+} -+ -+void rtw_btcoex_WLRFKNotify(PADAPTER padapter, u8 path, u8 type, u8 state) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+ hal_btcoex_WLRFKNotify(padapter, path, type, state); -+} -+ -+void rtw_btcoex_BtInfoNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+ hal_btcoex_BtInfoNotify(padapter, length, tmpBuf); -+} -+ -+void rtw_btcoex_BtMpRptNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+ if (padapter->registrypriv.mp_mode == 1) -+ return; -+ -+ hal_btcoex_BtMpRptNotify(padapter, length, tmpBuf); -+} -+ -+void rtw_btcoex_SuspendNotify(PADAPTER padapter, u8 state) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+ hal_btcoex_SuspendNotify(padapter, state); -+} -+ -+void rtw_btcoex_HaltNotify(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ u8 do_halt = 1; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ do_halt = 0; -+ -+ if (_FALSE == padapter->bup) { -+ RTW_INFO(FUNC_ADPT_FMT ": bup=%d Skip!\n", -+ FUNC_ADPT_ARG(padapter), padapter->bup); -+ do_halt = 0; -+ } -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ RTW_INFO(FUNC_ADPT_FMT ": bSurpriseRemoved=%s Skip!\n", -+ FUNC_ADPT_ARG(padapter), rtw_is_surprise_removed(padapter) ? "True" : "False"); -+ do_halt = 0; -+ } -+ -+ hal_btcoex_HaltNotify(padapter, do_halt); -+} -+ -+void rtw_btcoex_switchband_notify(u8 under_scan, u8 band_type) -+{ -+ hal_btcoex_switchband_notify(under_scan, band_type); -+} -+ -+void rtw_btcoex_WlFwDbgInfoNotify(PADAPTER padapter, u8* tmpBuf, u8 length) -+{ -+ hal_btcoex_WlFwDbgInfoNotify(padapter, tmpBuf, length); -+} -+ -+void rtw_btcoex_rx_rate_change_notify(PADAPTER padapter, u8 is_data_frame, u8 rate_id) -+{ -+ hal_btcoex_rx_rate_change_notify(padapter, is_data_frame, rate_id); -+} -+ -+void rtw_btcoex_SwitchBtTRxMask(PADAPTER padapter) -+{ -+ hal_btcoex_SwitchBtTRxMask(padapter); -+} -+ -+void rtw_btcoex_Switch(PADAPTER padapter, u8 enable) -+{ -+ hal_btcoex_SetBTCoexist(padapter, enable); -+} -+ -+u8 rtw_btcoex_IsBtDisabled(PADAPTER padapter) -+{ -+ return hal_btcoex_IsBtDisabled(padapter); -+} -+ -+void rtw_btcoex_Handler(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ if (_FALSE == pHalData->EEPROMBluetoothCoexist) -+ return; -+ -+ hal_btcoex_Hanlder(padapter); -+} -+ -+s32 rtw_btcoex_IsBTCoexRejectAMPDU(PADAPTER padapter) -+{ -+ s32 coexctrl; -+ -+ coexctrl = hal_btcoex_IsBTCoexRejectAMPDU(padapter); -+ -+ return coexctrl; -+} -+ -+s32 rtw_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER padapter) -+{ -+ s32 coexctrl; -+ -+ coexctrl = hal_btcoex_IsBTCoexCtrlAMPDUSize(padapter); -+ -+ return coexctrl; -+} -+ -+u32 rtw_btcoex_GetAMPDUSize(PADAPTER padapter) -+{ -+ u32 size; -+ -+ size = hal_btcoex_GetAMPDUSize(padapter); -+ -+ return size; -+} -+ -+void rtw_btcoex_SetManualControl(PADAPTER padapter, u8 manual) -+{ -+ if (_TRUE == manual) -+ hal_btcoex_SetManualControl(padapter, _TRUE); -+ else -+ hal_btcoex_SetManualControl(padapter, _FALSE); -+} -+ -+void rtw_btcoex_set_policy_control(PADAPTER padapter, u8 btc_policy) -+{ -+ hal_btcoex_set_policy_control(padapter, btc_policy); -+} -+ -+u8 rtw_btcoex_1Ant(PADAPTER padapter) -+{ -+ return hal_btcoex_1Ant(padapter); -+} -+ -+u8 rtw_btcoex_IsBtControlLps(PADAPTER padapter) -+{ -+ return hal_btcoex_IsBtControlLps(padapter); -+} -+ -+u8 rtw_btcoex_IsLpsOn(PADAPTER padapter) -+{ -+ return hal_btcoex_IsLpsOn(padapter); -+} -+ -+u8 rtw_btcoex_RpwmVal(PADAPTER padapter) -+{ -+ return hal_btcoex_RpwmVal(padapter); -+} -+ -+u8 rtw_btcoex_LpsVal(PADAPTER padapter) -+{ -+ return hal_btcoex_LpsVal(padapter); -+} -+ -+u32 rtw_btcoex_GetRaMask(PADAPTER padapter) -+{ -+ return hal_btcoex_GetRaMask(padapter); -+} -+ -+u8 rtw_btcoex_query_reduced_wl_pwr_lvl(PADAPTER padapter) -+{ -+ return hal_btcoex_query_reduced_wl_pwr_lvl(padapter); -+} -+ -+void rtw_btcoex_set_reduced_wl_pwr_lvl(PADAPTER padapter, u8 val) -+{ -+ hal_btcoex_set_reduced_wl_pwr_lvl(padapter, val); -+} -+ -+void rtw_btcoex_do_reduce_wl_pwr_lvl(PADAPTER padapter) -+{ -+ hal_btcoex_do_reduce_wl_pwr_lvl(padapter); -+} -+ -+void rtw_btcoex_RecordPwrMode(PADAPTER padapter, u8 *pCmdBuf, u8 cmdLen) -+{ -+ hal_btcoex_RecordPwrMode(padapter, pCmdBuf, cmdLen); -+} -+ -+void rtw_btcoex_DisplayBtCoexInfo(PADAPTER padapter, u8 *pbuf, u32 bufsize) -+{ -+ hal_btcoex_DisplayBtCoexInfo(padapter, pbuf, bufsize); -+} -+ -+void rtw_btcoex_SetDBG(PADAPTER padapter, u32 *pDbgModule) -+{ -+ hal_btcoex_SetDBG(padapter, pDbgModule); -+} -+ -+u32 rtw_btcoex_GetDBG(PADAPTER padapter, u8 *pStrBuf, u32 bufSize) -+{ -+ return hal_btcoex_GetDBG(padapter, pStrBuf, bufSize); -+} -+ -+u8 rtw_btcoex_IncreaseScanDeviceNum(PADAPTER padapter) -+{ -+ return hal_btcoex_IncreaseScanDeviceNum(padapter); -+} -+ -+u8 rtw_btcoex_IsBtLinkExist(PADAPTER padapter) -+{ -+ return hal_btcoex_IsBtLinkExist(padapter); -+} -+ -+void rtw_btcoex_SetBtPatchVersion(PADAPTER padapter, u16 btHciVer, u16 btPatchVer) -+{ -+ hal_btcoex_SetBtPatchVersion(padapter, btHciVer, btPatchVer); -+} -+ -+void rtw_btcoex_SetHciVersion(PADAPTER padapter, u16 hciVersion) -+{ -+ hal_btcoex_SetHciVersion(padapter, hciVersion); -+} -+ -+void rtw_btcoex_StackUpdateProfileInfo(void) -+{ -+ hal_btcoex_StackUpdateProfileInfo(); -+} -+ -+void rtw_btcoex_pta_off_on_notify(PADAPTER padapter, u8 bBTON) -+{ -+ hal_btcoex_pta_off_on_notify(padapter, bBTON); -+} -+ -+#ifdef CONFIG_RF4CE_COEXIST -+void rtw_btcoex_SetRf4ceLinkState(PADAPTER padapter, u8 state) -+{ -+ hal_btcoex_set_rf4ce_link_state(state); -+} -+ -+u8 rtw_btcoex_GetRf4ceLinkState(PADAPTER padapter) -+{ -+ return hal_btcoex_get_rf4ce_link_state(); -+} -+#endif -+ -+/* ================================================== -+ * Below Functions are called by BT-Coex -+ * ================================================== */ -+void rtw_btcoex_rx_ampdu_apply(PADAPTER padapter) -+{ -+ rtw_rx_ampdu_apply(padapter); -+} -+ -+void rtw_btcoex_LPS_Enter(PADAPTER padapter) -+{ -+ struct pwrctrl_priv *pwrpriv; -+ u8 lpsVal; -+ -+ -+ pwrpriv = adapter_to_pwrctl(padapter); -+ -+ pwrpriv->bpower_saving = _TRUE; -+ lpsVal = rtw_btcoex_LpsVal(padapter); -+ rtw_set_ps_mode(padapter, PS_MODE_MIN, 0, lpsVal, "BTCOEX"); -+} -+ -+u8 rtw_btcoex_LPS_Leave(PADAPTER padapter) -+{ -+ struct pwrctrl_priv *pwrpriv; -+ -+ -+ pwrpriv = adapter_to_pwrctl(padapter); -+ -+ if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) { -+ rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "BTCOEX"); -+ pwrpriv->bpower_saving = _FALSE; -+ } -+ -+ return _TRUE; -+} -+ -+u16 rtw_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data) -+{ -+ return hal_btcoex_btreg_read(padapter, type, addr, data); -+} -+ -+u16 rtw_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val) -+{ -+ return hal_btcoex_btreg_write(padapter, type, addr, val); -+} -+ -+u16 rtw_btcoex_btset_testmode(PADAPTER padapter, u8 type) -+{ -+ return hal_btcoex_btset_testode(padapter, type); -+} -+ -+u8 rtw_btcoex_get_reduce_wl_txpwr(PADAPTER padapter) -+{ -+ return rtw_btcoex_query_reduced_wl_pwr_lvl(padapter); -+} -+ -+u8 rtw_btcoex_get_bt_coexist(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ return pHalData->EEPROMBluetoothCoexist; -+} -+ -+u8 rtw_btcoex_get_chip_type(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ return pHalData->EEPROMBluetoothType; -+} -+ -+u8 rtw_btcoex_get_pg_ant_num(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ return pHalData->EEPROMBluetoothAntNum == Ant_x2 ? 2 : 1; -+} -+ -+u8 rtw_btcoex_get_pg_single_ant_path(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ return pHalData->ant_path; -+} -+ -+u8 rtw_btcoex_get_pg_rfe_type(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ return pHalData->rfe_type; -+} -+ -+u8 rtw_btcoex_is_tfbga_package_type(PADAPTER padapter) -+{ -+#ifdef CONFIG_RTL8723B -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA80) -+ || (pHalData->PackageType == PACKAGE_TFBGA90)) -+ return _TRUE; -+#endif -+ -+ return _FALSE; -+} -+ -+u8 rtw_btcoex_get_ant_div_cfg(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ return (pHalData->AntDivCfg == 0) ? _FALSE : _TRUE; -+} -+ -+/* ================================================== -+ * Below Functions are BT-Coex socket related function -+ * ================================================== */ -+ -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+_adapter *pbtcoexadapter; /* = NULL; */ /* do not initialise globals to 0 or NULL */ -+u8 rtw_btcoex_btinfo_cmd(_adapter *adapter, u8 *buf, u16 len) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ u8 *btinfo; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ btinfo = rtw_zmalloc(len); -+ if (btinfo == NULL) { -+ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = BTINFO_WK_CID; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = len; -+ pdrvextra_cmd_parm->pbuf = btinfo; -+ -+ _rtw_memcpy(btinfo, buf, len); -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ return res; -+} -+ -+u8 rtw_btcoex_send_event_to_BT(_adapter *padapter, u8 status, u8 event_code, u8 opcode_low, u8 opcode_high, u8 *dbg_msg) -+{ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ pEvent->EventCode = event_code; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = opcode_low; -+ pEvent->Data[2] = opcode_high; -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+#if 0 -+ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length, dbg_msg); -+#endif -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ -+ return status; -+} -+ -+/* -+Ref: -+Realtek Wi-Fi Driver -+Host Controller Interface for -+Bluetooth 3.0 + HS V1.4 2013/02/07 -+ -+Window team code & BT team code -+ */ -+ -+ -+u8 rtw_btcoex_parse_BT_info_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+#define BT_INFO_LENGTH 8 -+ -+ u8 curPollEnable = pcmd[0]; -+ u8 curPollTime = pcmd[1]; -+ u8 btInfoReason = pcmd[2]; -+ u8 btInfoLen = pcmd[3]; -+ u8 btinfo[BT_INFO_LENGTH]; -+ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ rtw_HCI_event *pEvent; -+ -+ /* RTW_INFO("%s\n",__func__); -+ RTW_INFO("current Poll Enable: %d, currrent Poll Time: %d\n",curPollEnable,curPollTime); -+ RTW_INFO("BT Info reason: %d, BT Info length: %d\n",btInfoReason,btInfoLen); -+ RTW_INFO("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n" -+ ,pcmd[4],pcmd[5],pcmd[6],pcmd[7],pcmd[8],pcmd[9],pcmd[10],pcmd[11]);*/ -+ -+ _rtw_memset(btinfo, 0, BT_INFO_LENGTH); -+ -+#if 1 -+ if (BT_INFO_LENGTH != btInfoLen) { -+ status = HCI_STATUS_INVALID_HCI_CMD_PARA_VALUE; -+ RTW_INFO("Error BT Info Length: %d\n", btInfoLen); -+ /* return _FAIL; */ -+ } else -+#endif -+ { -+ if (0x1 == btInfoReason || 0x2 == btInfoReason) { -+ _rtw_memcpy(btinfo, &pcmd[4], btInfoLen); -+ btinfo[0] = btInfoReason; -+ rtw_btcoex_btinfo_cmd(padapter, btinfo, btInfoLen); -+ } else -+ RTW_INFO("Other BT info reason\n"); -+ } -+ -+ /* send complete event to BT */ -+ { -+ -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_INFO_NOTIFY, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_INFO_NOTIFY, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+#if 0 -+ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length, "BT_info_event"); -+#endif -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+} -+ -+u8 rtw_btcoex_parse_BT_patch_ver_info_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ u16 btPatchVer = 0x0, btHciVer = 0x0; -+ /* u16 *pU2tmp; */ -+ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ -+ btHciVer = pcmd[0] | pcmd[1] << 8; -+ btPatchVer = pcmd[2] | pcmd[3] << 8; -+ -+ -+ RTW_INFO("%s, cmd:%02x %02x %02x %02x\n", __func__, pcmd[0] , pcmd[1] , pcmd[2] , pcmd[3]); -+ RTW_INFO("%s, HCI Ver:%d, Patch Ver:%d\n", __func__, btHciVer, btPatchVer); -+ -+ rtw_btcoex_SetBtPatchVersion(padapter, btHciVer, btPatchVer); -+ -+ -+ /* send complete event to BT */ -+ { -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_PATCH_VERSION_NOTIFY, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_PATCH_VERSION_NOTIFY, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+#if 0 -+ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length, "BT_patch_event"); -+#endif -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+} -+ -+u8 rtw_btcoex_parse_HCI_Ver_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ u16 hciver = pcmd[0] | pcmd[1] << 8; -+ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ PBT_MGNT pBtMgnt = &pcoex_info->BtMgnt; -+ pBtMgnt->ExtConfig.HCIExtensionVer = hciver; -+ RTW_INFO("%s, HCI Version: %d\n", __func__, pBtMgnt->ExtConfig.HCIExtensionVer); -+ if (pBtMgnt->ExtConfig.HCIExtensionVer < 4) { -+ status = HCI_STATUS_INVALID_HCI_CMD_PARA_VALUE; -+ RTW_INFO("%s, Version = %d, HCI Version < 4\n", __func__, pBtMgnt->ExtConfig.HCIExtensionVer); -+ } else -+ rtw_btcoex_SetHciVersion(padapter, hciver); -+ /* send complete event to BT */ -+ { -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_EXTENSION_VERSION_NOTIFY, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_EXTENSION_VERSION_NOTIFY, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+ -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+ -+} -+ -+u8 rtw_btcoex_parse_WIFI_scan_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ PBT_MGNT pBtMgnt = &pcoex_info->BtMgnt; -+ pBtMgnt->ExtConfig.bEnableWifiScanNotify = pcmd[0]; -+ RTW_INFO("%s, bEnableWifiScanNotify: %d\n", __func__, pBtMgnt->ExtConfig.bEnableWifiScanNotify); -+ -+ /* send complete event to BT */ -+ { -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_ENABLE_WIFI_SCAN_NOTIFY, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_ENABLE_WIFI_SCAN_NOTIFY, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+ -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+} -+ -+u8 rtw_btcoex_parse_HCI_link_status_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ PBT_MGNT pBtMgnt = &pcoex_info->BtMgnt; -+ /* PBT_DBG pBtDbg=&padapter->MgntInfo.BtInfo.BtDbg; */ -+ u8 i, numOfHandle = 0, numOfAcl = 0; -+ u16 conHandle; -+ u8 btProfile, btCoreSpec, linkRole; -+ u8 *pTriple; -+ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ -+ /* pBtDbg->dbgHciInfo.hciCmdCntLinkStatusNotify++; */ -+ /* RT_DISP_DATA(FIOCTL, IOCTL_BT_HCICMD_EXT, "LinkStatusNotify, Hex Data :\n", */ -+ /* &pHciCmd->Data[0], pHciCmd->Length); */ -+ -+ RTW_INFO("BTLinkStatusNotify\n"); -+ -+ /* Current only RTL8723 support this command. */ -+ /* pBtMgnt->bSupportProfile = TRUE; */ -+ pBtMgnt->bSupportProfile = _FALSE; -+ -+ pBtMgnt->ExtConfig.NumberOfACL = 0; -+ pBtMgnt->ExtConfig.NumberOfSCO = 0; -+ -+ numOfHandle = pcmd[0]; -+ /* RT_DISP(FIOCTL, IOCTL_BT_HCICMD_EXT, ("numOfHandle = 0x%x\n", numOfHandle)); */ -+ /* RT_DISP(FIOCTL, IOCTL_BT_HCICMD_EXT, ("HCIExtensionVer = %d\n", pBtMgnt->ExtConfig.HCIExtensionVer)); */ -+ RTW_INFO("numOfHandle = 0x%x\n", numOfHandle); -+ RTW_INFO("HCIExtensionVer = %d\n", pBtMgnt->ExtConfig.HCIExtensionVer); -+ -+ pTriple = &pcmd[1]; -+ for (i = 0; i < numOfHandle; i++) { -+ if (pBtMgnt->ExtConfig.HCIExtensionVer < 1) { -+ conHandle = *((u8 *)&pTriple[0]); -+ btProfile = pTriple[2]; -+ btCoreSpec = pTriple[3]; -+ if (BT_PROFILE_SCO == btProfile) -+ pBtMgnt->ExtConfig.NumberOfSCO++; -+ else { -+ pBtMgnt->ExtConfig.NumberOfACL++; -+ pBtMgnt->ExtConfig.aclLink[i].ConnectHandle = conHandle; -+ pBtMgnt->ExtConfig.aclLink[i].BTProfile = btProfile; -+ pBtMgnt->ExtConfig.aclLink[i].BTCoreSpec = btCoreSpec; -+ } -+ /* RT_DISP(FIOCTL, IOCTL_BT_HCICMD_EXT, */ -+ /* ("Connection_Handle=0x%x, BTProfile=%d, BTSpec=%d\n", */ -+ /* conHandle, btProfile, btCoreSpec)); */ -+ RTW_INFO("Connection_Handle=0x%x, BTProfile=%d, BTSpec=%d\n", conHandle, btProfile, btCoreSpec); -+ pTriple += 4; -+ } else if (pBtMgnt->ExtConfig.HCIExtensionVer >= 1) { -+ conHandle = *((u16 *)&pTriple[0]); -+ btProfile = pTriple[2]; -+ btCoreSpec = pTriple[3]; -+ linkRole = pTriple[4]; -+ if (BT_PROFILE_SCO == btProfile) -+ pBtMgnt->ExtConfig.NumberOfSCO++; -+ else { -+ pBtMgnt->ExtConfig.NumberOfACL++; -+ pBtMgnt->ExtConfig.aclLink[i].ConnectHandle = conHandle; -+ pBtMgnt->ExtConfig.aclLink[i].BTProfile = btProfile; -+ pBtMgnt->ExtConfig.aclLink[i].BTCoreSpec = btCoreSpec; -+ pBtMgnt->ExtConfig.aclLink[i].linkRole = linkRole; -+ } -+ /* RT_DISP(FIOCTL, IOCTL_BT_HCICMD_EXT, */ -+ RTW_INFO("Connection_Handle=0x%x, BTProfile=%d, BTSpec=%d, LinkRole=%d\n", -+ conHandle, btProfile, btCoreSpec, linkRole); -+ pTriple += 5; -+ } -+ } -+ rtw_btcoex_StackUpdateProfileInfo(); -+ -+ /* send complete event to BT */ -+ { -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_LINK_STATUS_NOTIFY, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_LINK_STATUS_NOTIFY, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+ -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+ -+ -+} -+ -+u8 rtw_btcoex_parse_HCI_BT_coex_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ -+ { -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_COEX_NOTIFY, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_COEX_NOTIFY, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+ -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+} -+ -+u8 rtw_btcoex_parse_HCI_BT_operation_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ -+ RTW_INFO("%s, OP code: %d\n", __func__, pcmd[0]); -+ -+ switch (pcmd[0]) { -+ case HCI_BT_OP_NONE: -+ RTW_INFO("[bt operation] : Operation None!!\n"); -+ break; -+ case HCI_BT_OP_INQUIRY_START: -+ RTW_INFO("[bt operation] : Inquiry start!!\n"); -+ break; -+ case HCI_BT_OP_INQUIRY_FINISH: -+ RTW_INFO("[bt operation] : Inquiry finished!!\n"); -+ break; -+ case HCI_BT_OP_PAGING_START: -+ RTW_INFO("[bt operation] : Paging is started!!\n"); -+ break; -+ case HCI_BT_OP_PAGING_SUCCESS: -+ RTW_INFO("[bt operation] : Paging complete successfully!!\n"); -+ break; -+ case HCI_BT_OP_PAGING_UNSUCCESS: -+ RTW_INFO("[bt operation] : Paging complete unsuccessfully!!\n"); -+ break; -+ case HCI_BT_OP_PAIRING_START: -+ RTW_INFO("[bt operation] : Pairing start!!\n"); -+ break; -+ case HCI_BT_OP_PAIRING_FINISH: -+ RTW_INFO("[bt operation] : Pairing finished!!\n"); -+ break; -+ case HCI_BT_OP_BT_DEV_ENABLE: -+ RTW_INFO("[bt operation] : BT Device is enabled!!\n"); -+ break; -+ case HCI_BT_OP_BT_DEV_DISABLE: -+ RTW_INFO("[bt operation] : BT Device is disabled!!\n"); -+ break; -+ default: -+ RTW_INFO("[bt operation] : Unknown, error!!\n"); -+ break; -+ } -+ -+ /* send complete event to BT */ -+ { -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_OPERATION_NOTIFY, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_OPERATION_NOTIFY, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+ -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+} -+ -+u8 rtw_btcoex_parse_BT_AFH_MAP_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ -+ { -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_AFH_MAP_NOTIFY, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_AFH_MAP_NOTIFY, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+ -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+} -+ -+u8 rtw_btcoex_parse_BT_register_val_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ -+ { -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_REGISTER_VALUE_NOTIFY, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_REGISTER_VALUE_NOTIFY, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+ -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+} -+ -+u8 rtw_btcoex_parse_HCI_BT_abnormal_notify_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ -+ { -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_BT_ABNORMAL_NOTIFY, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_BT_ABNORMAL_NOTIFY, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+ -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+} -+ -+u8 rtw_btcoex_parse_HCI_query_RF_status_cmd(_adapter *padapter, u8 *pcmd, u16 cmdlen) -+{ -+ u8 localBuf[6] = ""; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ rtw_HCI_event *pEvent; -+ RTW_HCI_STATUS status = HCI_STATUS_SUCCESS; -+ -+ { -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ -+ pEvent->EventCode = HCI_EVENT_COMMAND_COMPLETE; -+ pEvent->Data[0] = 0x1; /* packet # */ -+ pEvent->Data[1] = HCIOPCODELOW(HCI_QUERY_RF_STATUS, OGF_EXTENSION); -+ pEvent->Data[2] = HCIOPCODEHIGHT(HCI_QUERY_RF_STATUS, OGF_EXTENSION); -+ len = len + 3; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ pRetPar[0] = status; /* status */ -+ -+ len++; -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+ -+ status = rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ return status; -+ /* bthci_IndicateEvent(Adapter, PPacketIrpEvent, len+2); */ -+ } -+} -+ -+/***************************************** -+* HCI cmd format : -+*| 15 - 0 | -+*| OPcode (OCF|OGF<<10) | -+*| 15 - 8 |7 - 0 | -+*|Cmd para |Cmd para Length | -+*|Cmd para...... | -+******************************************/ -+ -+/* bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 -+ * | OCF | OGF | */ -+void rtw_btcoex_parse_hci_extend_cmd(_adapter *padapter, u8 *pcmd, u16 len, const u16 hci_OCF) -+{ -+ -+ RTW_INFO("%s: OCF: %x\n", __func__, hci_OCF); -+ switch (hci_OCF) { -+ case HCI_EXTENSION_VERSION_NOTIFY: -+ RTW_INFO("HCI_EXTENSION_VERSION_NOTIFY\n"); -+ rtw_btcoex_parse_HCI_Ver_notify_cmd(padapter, pcmd, len); -+ break; -+ case HCI_LINK_STATUS_NOTIFY: -+ RTW_INFO("HCI_LINK_STATUS_NOTIFY\n"); -+ rtw_btcoex_parse_HCI_link_status_notify_cmd(padapter, pcmd, len); -+ break; -+ case HCI_BT_OPERATION_NOTIFY: -+ /* only for 8723a 2ant */ -+ RTW_INFO("HCI_BT_OPERATION_NOTIFY\n"); -+ rtw_btcoex_parse_HCI_BT_operation_notify_cmd(padapter, pcmd, len); -+ /* */ -+ break; -+ case HCI_ENABLE_WIFI_SCAN_NOTIFY: -+ RTW_INFO("HCI_ENABLE_WIFI_SCAN_NOTIFY\n"); -+ rtw_btcoex_parse_WIFI_scan_notify_cmd(padapter, pcmd, len); -+ break; -+ case HCI_QUERY_RF_STATUS: -+ /* only for 8723b 2ant */ -+ RTW_INFO("HCI_QUERY_RF_STATUS\n"); -+ rtw_btcoex_parse_HCI_query_RF_status_cmd(padapter, pcmd, len); -+ break; -+ case HCI_BT_ABNORMAL_NOTIFY: -+ RTW_INFO("HCI_BT_ABNORMAL_NOTIFY\n"); -+ rtw_btcoex_parse_HCI_BT_abnormal_notify_cmd(padapter, pcmd, len); -+ break; -+ case HCI_BT_INFO_NOTIFY: -+ RTW_INFO("HCI_BT_INFO_NOTIFY\n"); -+ rtw_btcoex_parse_BT_info_notify_cmd(padapter, pcmd, len); -+ break; -+ case HCI_BT_COEX_NOTIFY: -+ RTW_INFO("HCI_BT_COEX_NOTIFY\n"); -+ rtw_btcoex_parse_HCI_BT_coex_notify_cmd(padapter, pcmd, len); -+ break; -+ case HCI_BT_PATCH_VERSION_NOTIFY: -+ RTW_INFO("HCI_BT_PATCH_VERSION_NOTIFY\n"); -+ rtw_btcoex_parse_BT_patch_ver_info_cmd(padapter, pcmd, len); -+ break; -+ case HCI_BT_AFH_MAP_NOTIFY: -+ RTW_INFO("HCI_BT_AFH_MAP_NOTIFY\n"); -+ rtw_btcoex_parse_BT_AFH_MAP_notify_cmd(padapter, pcmd, len); -+ break; -+ case HCI_BT_REGISTER_VALUE_NOTIFY: -+ RTW_INFO("HCI_BT_REGISTER_VALUE_NOTIFY\n"); -+ rtw_btcoex_parse_BT_register_val_notify_cmd(padapter, pcmd, len); -+ break; -+ default: -+ RTW_INFO("ERROR!!! Unknown OCF: %x\n", hci_OCF); -+ break; -+ -+ } -+} -+ -+void rtw_btcoex_parse_hci_cmd(_adapter *padapter, u8 *pcmd, u16 len) -+{ -+ u16 opcode = pcmd[0] | pcmd[1] << 8; -+ u16 hci_OGF = HCI_OGF(opcode); -+ u16 hci_OCF = HCI_OCF(opcode); -+ u8 cmdlen = len - 3; -+ u8 pare_len = pcmd[2]; -+ -+ RTW_INFO("%s OGF: %x,OCF: %x\n", __func__, hci_OGF, hci_OCF); -+ switch (hci_OGF) { -+ case OGF_EXTENSION: -+ RTW_INFO("HCI_EXTENSION_CMD_OGF\n"); -+ rtw_btcoex_parse_hci_extend_cmd(padapter, &pcmd[3], cmdlen, hci_OCF); -+ break; -+ default: -+ RTW_INFO("Other OGF: %x\n", hci_OGF); -+ break; -+ } -+} -+ -+u16 rtw_btcoex_parse_recv_data(u8 *msg, u8 msg_size) -+{ -+ u8 cmp_msg1[32] = attend_ack; -+ u8 cmp_msg2[32] = leave_ack; -+ u8 cmp_msg3[32] = bt_leave; -+ u8 cmp_msg4[32] = invite_req; -+ u8 cmp_msg5[32] = attend_req; -+ u8 cmp_msg6[32] = invite_rsp; -+ u8 res = OTHER; -+ -+ if (_rtw_memcmp(cmp_msg1, msg, msg_size) == _TRUE) { -+ /*RTW_INFO("%s, msg:%s\n",__func__,msg);*/ -+ res = RX_ATTEND_ACK; -+ } else if (_rtw_memcmp(cmp_msg2, msg, msg_size) == _TRUE) { -+ /*RTW_INFO("%s, msg:%s\n",__func__,msg);*/ -+ res = RX_LEAVE_ACK; -+ } else if (_rtw_memcmp(cmp_msg3, msg, msg_size) == _TRUE) { -+ /*RTW_INFO("%s, msg:%s\n",__func__,msg);*/ -+ res = RX_BT_LEAVE; -+ } else if (_rtw_memcmp(cmp_msg4, msg, msg_size) == _TRUE) { -+ /*RTW_INFO("%s, msg:%s\n",__func__,msg);*/ -+ res = RX_INVITE_REQ; -+ } else if (_rtw_memcmp(cmp_msg5, msg, msg_size) == _TRUE) -+ res = RX_ATTEND_REQ; -+ else if (_rtw_memcmp(cmp_msg6, msg, msg_size) == _TRUE) -+ res = RX_INVITE_RSP; -+ else { -+ /*RTW_INFO("%s, %s\n", __func__, msg);*/ -+ res = OTHER; -+ } -+ -+ /*RTW_INFO("%s, res:%d\n", __func__, res);*/ -+ -+ return res; -+} -+ -+void rtw_btcoex_recvmsgbysocket(void *data) -+{ -+ u8 recv_data[255]; -+ u8 tx_msg[255] = leave_ack; -+ u32 len = 0; -+ u16 recv_length = 0; -+ u16 parse_res = 0; -+#if 0 -+ u8 para_len = 0, polling_enable = 0, poling_interval = 0, reason = 0, btinfo_len = 0; -+ u8 btinfo[BT_INFO_LEN] = {0}; -+#endif -+ -+ struct bt_coex_info *pcoex_info = NULL; -+ struct sock *sk = NULL; -+ struct sk_buff *skb = NULL; -+ -+ /*RTW_INFO("%s\n",__func__);*/ -+ -+ if (pbtcoexadapter == NULL) { -+ RTW_INFO("%s: btcoexadapter NULL!\n", __func__); -+ return; -+ } -+ -+ pcoex_info = &pbtcoexadapter->coex_info; -+ sk = pcoex_info->sk_store; -+ -+ if (sk == NULL) { -+ RTW_INFO("%s: critical error when receive socket data!\n", __func__); -+ return; -+ } -+ -+ len = skb_queue_len(&sk->sk_receive_queue); -+ while (len > 0) { -+ skb = skb_dequeue(&sk->sk_receive_queue); -+ -+ /*important: cut the udp header from skb->data! header length is 8 byte*/ -+ recv_length = skb->len - 8; -+ _rtw_memset(recv_data, 0, sizeof(recv_data)); -+ _rtw_memcpy(recv_data, skb->data + 8, recv_length); -+ -+ parse_res = rtw_btcoex_parse_recv_data(recv_data, recv_length); -+#if 0 -+ if (RX_ATTEND_ACK == parse_res) { -+ /* attend ack */ -+ pcoex_info->BT_attend = _TRUE; -+ RTW_INFO("RX_ATTEND_ACK!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ } else if (RX_ATTEND_REQ == parse_res) { -+ /* attend req from BT */ -+ pcoex_info->BT_attend = _TRUE; -+ RTW_INFO("RX_BT_ATTEND_REQ!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, attend_ack, sizeof(attend_ack), _FALSE); -+ } else if (RX_INVITE_REQ == parse_res) { -+ /* invite req from BT */ -+ pcoex_info->BT_attend = _TRUE; -+ RTW_INFO("RX_INVITE_REQ!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, invite_rsp, sizeof(invite_rsp), _FALSE); -+ } else if (RX_INVITE_RSP == parse_res) { -+ /* invite rsp */ -+ pcoex_info->BT_attend = _TRUE; -+ RTW_INFO("RX_INVITE_RSP!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ } else if (RX_LEAVE_ACK == parse_res) { -+ /* mean BT know wifi will leave */ -+ pcoex_info->BT_attend = _FALSE; -+ RTW_INFO("RX_LEAVE_ACK!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ } else if (RX_BT_LEAVE == parse_res) { -+ /* BT leave */ -+ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, leave_ack, sizeof(leave_ack), _FALSE); /* no ack */ -+ pcoex_info->BT_attend = _FALSE; -+ RTW_INFO("RX_BT_LEAVE!sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ } else { -+ /* todo: check if recv data are really hci cmds */ -+ if (_TRUE == pcoex_info->BT_attend) -+ rtw_btcoex_parse_hci_cmd(pbtcoexadapter, recv_data, recv_length); -+ } -+#endif -+ switch (parse_res) { -+ case RX_ATTEND_ACK: -+ /* attend ack */ -+ pcoex_info->BT_attend = _TRUE; -+ RTW_INFO("RX_ATTEND_ACK!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ rtw_btcoex_pta_off_on_notify(pbtcoexadapter, pcoex_info->BT_attend); -+ break; -+ -+ case RX_ATTEND_REQ: -+ pcoex_info->BT_attend = _TRUE; -+ RTW_INFO("RX_BT_ATTEND_REQ!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, attend_ack, sizeof(attend_ack), _FALSE); -+ rtw_btcoex_pta_off_on_notify(pbtcoexadapter, pcoex_info->BT_attend); -+ break; -+ -+ case RX_INVITE_REQ: -+ /* invite req from BT */ -+ pcoex_info->BT_attend = _TRUE; -+ RTW_INFO("RX_INVITE_REQ!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, invite_rsp, sizeof(invite_rsp), _FALSE); -+ rtw_btcoex_pta_off_on_notify(pbtcoexadapter, pcoex_info->BT_attend); -+ break; -+ -+ case RX_INVITE_RSP: -+ /*invite rsp*/ -+ pcoex_info->BT_attend = _TRUE; -+ RTW_INFO("RX_INVITE_RSP!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ rtw_btcoex_pta_off_on_notify(pbtcoexadapter, pcoex_info->BT_attend); -+ break; -+ -+ case RX_LEAVE_ACK: -+ /* mean BT know wifi will leave */ -+ pcoex_info->BT_attend = _FALSE; -+ RTW_INFO("RX_LEAVE_ACK!,sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ rtw_btcoex_pta_off_on_notify(pbtcoexadapter, pcoex_info->BT_attend); -+ break; -+ -+ case RX_BT_LEAVE: -+ /* BT leave */ -+ rtw_btcoex_sendmsgbysocket(pbtcoexadapter, leave_ack, sizeof(leave_ack), _FALSE); /* no ack */ -+ pcoex_info->BT_attend = _FALSE; -+ RTW_INFO("RX_BT_LEAVE!sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ rtw_btcoex_pta_off_on_notify(pbtcoexadapter, pcoex_info->BT_attend); -+ break; -+ -+ default: -+ if (_TRUE == pcoex_info->BT_attend) -+ rtw_btcoex_parse_hci_cmd(pbtcoexadapter, recv_data, recv_length); -+ else -+ RTW_INFO("ERROR!! BT is UP\n"); -+ break; -+ -+ } -+ -+ len--; -+ kfree_skb(skb); -+ } -+} -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)) -+ void rtw_btcoex_recvmsg_init(struct sock *sk_in, s32 bytes) -+#else -+ void rtw_btcoex_recvmsg_init(struct sock *sk_in) -+#endif -+{ -+ struct bt_coex_info *pcoex_info = NULL; -+ -+ if (pbtcoexadapter == NULL) { -+ RTW_INFO("%s: btcoexadapter NULL\n", __func__); -+ return; -+ } -+ pcoex_info = &pbtcoexadapter->coex_info; -+ pcoex_info->sk_store = sk_in; -+ if (pcoex_info->btcoex_wq != NULL) -+ queue_delayed_work(pcoex_info->btcoex_wq, &pcoex_info->recvmsg_work, 0); -+ else -+ RTW_INFO("%s: BTCOEX workqueue NULL\n", __func__); -+} -+ -+u8 rtw_btcoex_sendmsgbysocket(_adapter *padapter, u8 *msg, u8 msg_size, bool force) -+{ -+ u8 error; -+ struct msghdr udpmsg; -+ mm_segment_t oldfs; -+ struct iovec iov; -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ -+ /* RTW_INFO("%s: msg:%s, force:%s\n", __func__, msg, force == _TRUE?"TRUE":"FALSE"); */ -+ if (_FALSE == force) { -+ if (_FALSE == pcoex_info->BT_attend) { -+ RTW_INFO("TX Blocked: WiFi-BT disconnected\n"); -+ return _FAIL; -+ } -+ } -+ -+ iov.iov_base = (void *)msg; -+ iov.iov_len = msg_size; -+ udpmsg.msg_name = &pcoex_info->bt_sockaddr; -+ udpmsg.msg_namelen = sizeof(struct sockaddr_in); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) -+ /* referece:sock_xmit in kernel code -+ * WRITE for sock_sendmsg, READ for sock_recvmsg -+ * third parameter for msg_iovlen -+ * last parameter for iov_len -+ */ -+ iov_iter_init(&udpmsg.msg_iter, WRITE, &iov, 1, msg_size); -+#else -+ udpmsg.msg_iov = &iov; -+ udpmsg.msg_iovlen = 1; -+#endif -+ udpmsg.msg_control = NULL; -+ udpmsg.msg_controllen = 0; -+ udpmsg.msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL; -+ oldfs = get_fs(); -+ set_fs(KERNEL_DS); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ error = sock_sendmsg(pcoex_info->udpsock, &udpmsg); -+#else -+ error = sock_sendmsg(pcoex_info->udpsock, &udpmsg, msg_size); -+#endif -+ set_fs(oldfs); -+ if (error < 0) { -+ RTW_INFO("Error when sendimg msg, error:%d\n", error); -+ return _FAIL; -+ } else -+ return _SUCCESS; -+} -+ -+u8 rtw_btcoex_create_kernel_socket(_adapter *padapter) -+{ -+ s8 kernel_socket_err; -+ u8 tx_msg[255] = attend_req; -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ s32 sock_reuse = 1; -+ u8 status = _FAIL; -+ -+ RTW_INFO("%s CONNECT_PORT %d\n", __func__, CONNECT_PORT); -+ -+ if (NULL == pcoex_info) { -+ RTW_INFO("coex_info: NULL\n"); -+ status = _FAIL; -+ } -+ -+ kernel_socket_err = sock_create(PF_INET, SOCK_DGRAM, 0, &pcoex_info->udpsock); -+ -+ if (kernel_socket_err < 0) { -+ RTW_INFO("Error during creation of socket error:%d\n", kernel_socket_err); -+ status = _FAIL; -+ } else { -+ _rtw_memset(&(pcoex_info->wifi_sockaddr), 0, sizeof(pcoex_info->wifi_sockaddr)); -+ pcoex_info->wifi_sockaddr.sin_family = AF_INET; -+ pcoex_info->wifi_sockaddr.sin_port = htons(CONNECT_PORT); -+ pcoex_info->wifi_sockaddr.sin_addr.s_addr = htonl(INADDR_LOOPBACK); -+ -+ _rtw_memset(&(pcoex_info->bt_sockaddr), 0, sizeof(pcoex_info->bt_sockaddr)); -+ pcoex_info->bt_sockaddr.sin_family = AF_INET; -+ pcoex_info->bt_sockaddr.sin_port = htons(CONNECT_PORT_BT); -+ pcoex_info->bt_sockaddr.sin_addr.s_addr = htonl(INADDR_LOOPBACK); -+ -+ pcoex_info->sk_store = NULL; -+ kernel_socket_err = pcoex_info->udpsock->ops->bind(pcoex_info->udpsock, (struct sockaddr *)&pcoex_info->wifi_sockaddr, -+ sizeof(pcoex_info->wifi_sockaddr)); -+ if (kernel_socket_err == 0) { -+ RTW_INFO("binding socket success\n"); -+ pcoex_info->udpsock->sk->sk_data_ready = rtw_btcoex_recvmsg_init; -+ pcoex_info->sock_open |= KERNEL_SOCKET_OK; -+ pcoex_info->BT_attend = _FALSE; -+ RTW_INFO("WIFI sending attend_req\n"); -+ rtw_btcoex_sendmsgbysocket(padapter, attend_req, sizeof(attend_req), _TRUE); -+ status = _SUCCESS; -+ } else { -+ pcoex_info->BT_attend = _FALSE; -+ sock_release(pcoex_info->udpsock); /* bind fail release socket */ -+ RTW_INFO("Error binding socket: %d\n", kernel_socket_err); -+ status = _FAIL; -+ } -+ -+ } -+ -+ return status; -+} -+ -+void rtw_btcoex_close_kernel_socket(_adapter *padapter) -+{ -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ if (pcoex_info->sock_open & KERNEL_SOCKET_OK) { -+ RTW_INFO("release kernel socket\n"); -+ sock_release(pcoex_info->udpsock); -+ pcoex_info->sock_open &= ~(KERNEL_SOCKET_OK); -+ if (_TRUE == pcoex_info->BT_attend) -+ pcoex_info->BT_attend = _FALSE; -+ -+ RTW_INFO("sock_open:%d, BT_attend:%d\n", pcoex_info->sock_open, pcoex_info->BT_attend); -+ } -+} -+ -+void rtw_btcoex_init_socket(_adapter *padapter) -+{ -+ -+ u8 is_invite = _FALSE; -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ RTW_INFO("%s\n", __func__); -+ if (_FALSE == pcoex_info->is_exist) { -+ _rtw_memset(pcoex_info, 0, sizeof(struct bt_coex_info)); -+ pcoex_info->btcoex_wq = create_workqueue("BTCOEX"); -+ INIT_DELAYED_WORK(&pcoex_info->recvmsg_work, -+ (void *)rtw_btcoex_recvmsgbysocket); -+ pbtcoexadapter = padapter; -+ /* We expect BT is off if BT don't send ack to wifi */ -+ RTW_INFO("We expect BT is off if BT send ack to wifi\n"); -+ rtw_btcoex_pta_off_on_notify(pbtcoexadapter, _FALSE); -+ if (rtw_btcoex_create_kernel_socket(padapter) == _SUCCESS) -+ pcoex_info->is_exist = _TRUE; -+ else { -+ pcoex_info->is_exist = _FALSE; -+ pbtcoexadapter = NULL; -+ } -+ -+ RTW_INFO("%s: pbtcoexadapter:%p, coex_info->is_exist: %s\n" -+ , __func__, pbtcoexadapter, pcoex_info->is_exist == _TRUE ? "TRUE" : "FALSE"); -+ } -+} -+ -+void rtw_btcoex_close_socket(_adapter *padapter) -+{ -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ -+ RTW_INFO("%s--coex_info->is_exist: %s, pcoex_info->BT_attend:%s\n" -+ , __func__, pcoex_info->is_exist == _TRUE ? "TRUE" : "FALSE", pcoex_info->BT_attend == _TRUE ? "TRUE" : "FALSE"); -+ -+ if (_TRUE == pcoex_info->is_exist) { -+ if (_TRUE == pcoex_info->BT_attend) { -+ /*inform BT wifi leave*/ -+ rtw_btcoex_sendmsgbysocket(padapter, wifi_leave, sizeof(wifi_leave), _FALSE); -+ msleep(50); -+ } -+ -+ if (pcoex_info->btcoex_wq != NULL) { -+ flush_workqueue(pcoex_info->btcoex_wq); -+ destroy_workqueue(pcoex_info->btcoex_wq); -+ } -+ -+ rtw_btcoex_close_kernel_socket(padapter); -+ pbtcoexadapter = NULL; -+ pcoex_info->is_exist = _FALSE; -+ } -+} -+ -+void rtw_btcoex_dump_tx_msg(u8 *tx_msg, u8 len, u8 *msg_name) -+{ -+ u8 i = 0; -+ RTW_INFO("======> Msg name: %s\n", msg_name); -+ for (i = 0; i < len; i++) -+ printk("%02x ", tx_msg[i]); -+ printk("\n"); -+ RTW_INFO("Msg name: %s <======\n", msg_name); -+} -+ -+/* Porting from Windows team */ -+void rtw_btcoex_SendEventExtBtCoexControl(PADAPTER padapter, u8 bNeedDbgRsp, u8 dataLen, void *pData) -+{ -+ u8 len = 0, tx_event_length = 0; -+ u8 localBuf[32] = ""; -+ u8 *pRetPar; -+ u8 opCode = 0; -+ u8 *pInBuf = (u8 *)pData; -+ u8 *pOpCodeContent; -+ rtw_HCI_event *pEvent; -+ -+ opCode = pInBuf[0]; -+ -+ RTW_INFO("%s, OPCode:%02x\n", __func__, opCode); -+ -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ /* len += bthci_ExtensionEventHeaderRtk(&localBuf[0], */ -+ /* HCI_EVENT_EXT_BT_COEX_CONTROL); */ -+ pEvent->EventCode = HCI_EVENT_EXTENSION_RTK; -+ pEvent->Data[0] = HCI_EVENT_EXT_BT_COEX_CONTROL; /* extension event code */ -+ len++; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ _rtw_memcpy(&pRetPar[0], pData, dataLen); -+ -+ len += dataLen; -+ -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+#if 0 -+ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length, "BT COEX CONTROL", _FALSE); -+#endif -+ rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ -+} -+ -+/* Porting from Windows team */ -+void rtw_btcoex_SendEventExtBtInfoControl(PADAPTER padapter, u8 dataLen, void *pData) -+{ -+ rtw_HCI_event *pEvent; -+ u8 *pRetPar; -+ u8 len = 0, tx_event_length = 0; -+ u8 localBuf[32] = ""; -+ -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ PBT_MGNT pBtMgnt = &pcoex_info->BtMgnt; -+ -+ /* RTW_INFO("%s\n",__func__);*/ -+ if (pBtMgnt->ExtConfig.HCIExtensionVer < 4) { /* not support */ -+ RTW_INFO("ERROR: HCIExtensionVer = %d, HCIExtensionVer<4 !!!!\n", pBtMgnt->ExtConfig.HCIExtensionVer); -+ return; -+ } -+ -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ /* len += bthci_ExtensionEventHeaderRtk(&localBuf[0], */ -+ /* HCI_EVENT_EXT_BT_INFO_CONTROL); */ -+ pEvent->EventCode = HCI_EVENT_EXTENSION_RTK; -+ pEvent->Data[0] = HCI_EVENT_EXT_BT_INFO_CONTROL; /* extension event code */ -+ len++; -+ -+ /* Return parameters starts from here */ -+ pRetPar = &pEvent->Data[len]; -+ _rtw_memcpy(&pRetPar[0], pData, dataLen); -+ -+ len += dataLen; -+ -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+#if 0 -+ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length, "BT INFO CONTROL"); -+#endif -+ rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+ -+} -+ -+void rtw_btcoex_SendScanNotify(PADAPTER padapter, u8 scanType) -+{ -+ u8 len = 0, tx_event_length = 0; -+ u8 localBuf[7] = ""; -+ u8 *pRetPar; -+ u8 *pu1Temp; -+ rtw_HCI_event *pEvent; -+ struct bt_coex_info *pcoex_info = &padapter->coex_info; -+ PBT_MGNT pBtMgnt = &pcoex_info->BtMgnt; -+ -+ /* if(!pBtMgnt->BtOperationOn) -+ * return; */ -+ -+ pEvent = (rtw_HCI_event *)(&localBuf[0]); -+ -+ /* len += bthci_ExtensionEventHeaderRtk(&localBuf[0], -+ * HCI_EVENT_EXT_WIFI_SCAN_NOTIFY); */ -+ -+ pEvent->EventCode = HCI_EVENT_EXTENSION_RTK; -+ pEvent->Data[0] = HCI_EVENT_EXT_WIFI_SCAN_NOTIFY; /* extension event code */ -+ len++; -+ -+ /* Return parameters starts from here */ -+ /* pRetPar = &PPacketIrpEvent->Data[len]; */ -+ /* pu1Temp = (u8 *)&pRetPar[0]; */ -+ /* *pu1Temp = scanType; */ -+ pEvent->Data[len] = scanType; -+ len += 1; -+ -+ pEvent->Length = len; -+ -+ /* total tx event length + EventCode length + sizeof(length) */ -+ tx_event_length = pEvent->Length + 2; -+#if 0 -+ rtw_btcoex_dump_tx_msg((u8 *)pEvent, tx_event_length, "WIFI SCAN OPERATION"); -+#endif -+ rtw_btcoex_sendmsgbysocket(padapter, (u8 *)pEvent, tx_event_length, _FALSE); -+} -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+#endif /* CONFIG_BT_COEXIST */ -+ -+void rtw_btcoex_set_ant_info(PADAPTER padapter) -+{ -+#ifdef CONFIG_BT_COEXIST -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(padapter); -+ -+ if (hal->EEPROMBluetoothCoexist == _TRUE) { -+ u8 bMacPwrCtrlOn = _FALSE; -+ -+ rtw_btcoex_AntInfoSetting(padapter); -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if (bMacPwrCtrlOn == _TRUE) -+ rtw_btcoex_PowerOnSetting(padapter); -+ } -+ else -+#endif -+ rtw_btcoex_wifionly_AntInfoSetting(padapter); -+} -+ -+void rtw_btcoex_connect_notify(PADAPTER padapter, u8 join_type) -+{ -+#ifdef CONFIG_BT_COEXIST -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ if (pHalData->EEPROMBluetoothCoexist == _TRUE) -+ _rtw_btcoex_connect_notify(padapter, join_type ? _FALSE : _TRUE); -+ else -+#endif /* CONFIG_BT_COEXIST */ -+ rtw_btcoex_wifionly_connect_notify(padapter); -+} -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_btcoex_wifionly.c b/drivers/staging/rtl8723cs/core/rtw_btcoex_wifionly.c -new file mode 100644 -index 000000000000..d9872b0221e7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_btcoex_wifionly.c -@@ -0,0 +1,47 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include -+#include -+#include -+ -+void rtw_btcoex_wifionly_switchband_notify(PADAPTER padapter) -+{ -+ hal_btcoex_wifionly_switchband_notify(padapter); -+} -+ -+void rtw_btcoex_wifionly_scan_notify(PADAPTER padapter) -+{ -+ hal_btcoex_wifionly_scan_notify(padapter); -+} -+ -+void rtw_btcoex_wifionly_connect_notify(PADAPTER padapter) -+{ -+ hal_btcoex_wifionly_connect_notify(padapter); -+} -+ -+void rtw_btcoex_wifionly_hw_config(PADAPTER padapter) -+{ -+ hal_btcoex_wifionly_hw_config(padapter); -+} -+ -+void rtw_btcoex_wifionly_initialize(PADAPTER padapter) -+{ -+ hal_btcoex_wifionly_initlizevariables(padapter); -+} -+ -+void rtw_btcoex_wifionly_AntInfoSetting(PADAPTER padapter) -+{ -+ hal_btcoex_wifionly_AntInfoSetting(padapter); -+} -diff --git a/drivers/staging/rtl8723cs/core/rtw_chplan.c b/drivers/staging/rtl8723cs/core/rtw_chplan.c -new file mode 100644 -index 000000000000..2754b0a94d47 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_chplan.c -@@ -0,0 +1,2516 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2018 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_CHPLAN_C_ -+ -+#include -+ -+#define RTW_DOMAIN_MAP_VER "54" -+#define RTW_DOMAIN_MAP_M_VER "g" -+#define RTW_COUNTRY_MAP_VER "27" -+ -+struct ch_list_t { -+ u8 *len_ch_attr; -+}; -+ -+#define CLA_2G_12_14_PASSIVE BIT0 -+ -+#define CLA_5G_B1_PASSIVE BIT0 -+#define CLA_5G_B2_PASSIVE BIT1 -+#define CLA_5G_B3_PASSIVE BIT2 -+#define CLA_5G_B4_PASSIVE BIT3 -+#define CLA_5G_B2_DFS BIT4 -+#define CLA_5G_B3_DFS BIT5 -+#define CLA_5G_B4_DFS BIT6 -+ -+#define CH_LIST_ENT(_len, arg...) \ -+ {.len_ch_attr = (u8[_len + 2]) {_len, ##arg}, } -+ -+#define CH_LIST_LEN(_ch_list) (_ch_list.len_ch_attr[0]) -+#define CH_LIST_CH(_ch_list, _i) (_ch_list.len_ch_attr[_i + 1]) -+#define CH_LIST_ATTRIB(_ch_list) (_ch_list.len_ch_attr[CH_LIST_LEN(_ch_list) + 1]) -+ -+enum rtw_chd_2g { -+ RTW_CHD_2G_00 = 0, -+ RTW_CHD_2G_01 = 1, -+ RTW_CHD_2G_02 = 2, -+ RTW_CHD_2G_03 = 3, -+ RTW_CHD_2G_04 = 4, -+ RTW_CHD_2G_05 = 5, -+ RTW_CHD_2G_06 = 6, -+ -+ RTW_CHD_2G_MAX, -+ RTW_CHD_2G_NULL = RTW_CHD_2G_00, -+}; -+ -+enum rtw_chd_5g { -+ RTW_CHD_5G_00 = 0, -+ RTW_CHD_5G_01 = 1, -+ RTW_CHD_5G_02 = 2, -+ RTW_CHD_5G_03 = 3, -+ RTW_CHD_5G_04 = 4, -+ RTW_CHD_5G_05 = 5, -+ RTW_CHD_5G_06 = 6, -+ RTW_CHD_5G_07 = 7, -+ RTW_CHD_5G_08 = 8, -+ RTW_CHD_5G_09 = 9, -+ RTW_CHD_5G_10 = 10, -+ RTW_CHD_5G_11 = 11, -+ RTW_CHD_5G_12 = 12, -+ RTW_CHD_5G_13 = 13, -+ RTW_CHD_5G_14 = 14, -+ RTW_CHD_5G_15 = 15, -+ RTW_CHD_5G_16 = 16, -+ RTW_CHD_5G_17 = 17, -+ RTW_CHD_5G_18 = 18, -+ RTW_CHD_5G_19 = 19, -+ RTW_CHD_5G_20 = 20, -+ RTW_CHD_5G_21 = 21, -+ RTW_CHD_5G_22 = 22, -+ RTW_CHD_5G_23 = 23, -+ RTW_CHD_5G_24 = 24, -+ RTW_CHD_5G_25 = 25, -+ RTW_CHD_5G_26 = 26, -+ RTW_CHD_5G_27 = 27, -+ RTW_CHD_5G_28 = 28, -+ RTW_CHD_5G_29 = 29, -+ RTW_CHD_5G_30 = 30, -+ RTW_CHD_5G_31 = 31, -+ RTW_CHD_5G_32 = 32, -+ RTW_CHD_5G_33 = 33, -+ RTW_CHD_5G_34 = 34, -+ RTW_CHD_5G_35 = 35, -+ RTW_CHD_5G_36 = 36, -+ RTW_CHD_5G_37 = 37, -+ RTW_CHD_5G_38 = 38, -+ RTW_CHD_5G_39 = 39, -+ RTW_CHD_5G_40 = 40, -+ RTW_CHD_5G_41 = 41, -+ RTW_CHD_5G_42 = 42, -+ RTW_CHD_5G_43 = 43, -+ RTW_CHD_5G_44 = 44, -+ RTW_CHD_5G_45 = 45, -+ RTW_CHD_5G_46 = 46, -+ RTW_CHD_5G_47 = 47, -+ RTW_CHD_5G_48 = 48, -+ RTW_CHD_5G_49 = 49, -+ RTW_CHD_5G_50 = 50, -+ RTW_CHD_5G_51 = 51, -+ -+ RTW_CHD_5G_MAX, -+ RTW_CHD_5G_NULL = RTW_CHD_5G_00, -+}; -+ -+static const struct ch_list_t rtw_channel_def_2g[] = { -+ /* 0, RTW_CHD_2G_00 */ CH_LIST_ENT(0, 0), -+ /* 1, RTW_CHD_2G_01 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, CLA_2G_12_14_PASSIVE), -+ /* 2, RTW_CHD_2G_02 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 0), -+ /* 3, RTW_CHD_2G_03 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 0), -+ /* 4, RTW_CHD_2G_04 */ CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0), -+ /* 5, RTW_CHD_2G_05 */ CH_LIST_ENT(4, 10, 11, 12, 13, 0), -+ /* 6, RTW_CHD_2G_06 */ CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, CLA_2G_12_14_PASSIVE), -+}; -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+static const struct ch_list_t rtw_channel_def_5g[] = { -+ /* 0, RTW_CHD_5G_00 */ CH_LIST_ENT(0, 0), -+ /* 1, RTW_CHD_5G_01 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 2, RTW_CHD_5G_02 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 3, RTW_CHD_5G_03 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 4, RTW_CHD_5G_04 */ CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 5, RTW_CHD_5G_05 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 6, RTW_CHD_5G_06 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165, 0), -+ /* 7, RTW_CHD_5G_07 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165, CLA_5G_B2_DFS), -+ /* 8, RTW_CHD_5G_08 */ CH_LIST_ENT(12, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, CLA_5G_B2_DFS), -+ /* 9, RTW_CHD_5G_09 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165, 0), -+ /* 10, RTW_CHD_5G_10 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64, CLA_5G_B2_DFS), -+ /* 11, RTW_CHD_5G_11 */ CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, CLA_5G_B3_DFS), -+ /* 12, RTW_CHD_5G_12 */ CH_LIST_ENT(16, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 13, RTW_CHD_5G_13 */ CH_LIST_ENT(8, 56, 60, 64, 149, 153, 157, 161, 165, CLA_5G_B2_DFS), -+ /* 14, RTW_CHD_5G_14 */ CH_LIST_ENT(4, 36, 40, 44, 48, 0), -+ /* 15, RTW_CHD_5G_15 */ CH_LIST_ENT(4, 149, 153, 157, 161, 0), -+ /* 16, RTW_CHD_5G_16 */ CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 0), -+ /* 17, RTW_CHD_5G_17 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 18, RTW_CHD_5G_18 */ CH_LIST_ENT(17, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 19, RTW_CHD_5G_19 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 20, RTW_CHD_5G_20 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 21, RTW_CHD_5G_21 */ CH_LIST_ENT(11, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 22, RTW_CHD_5G_22 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 23, RTW_CHD_5G_23 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 24, RTW_CHD_5G_24 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B2_PASSIVE | CLA_5G_B3_PASSIVE | CLA_5G_B4_PASSIVE), -+ /* 25, RTW_CHD_5G_25 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B2_PASSIVE | CLA_5G_B3_PASSIVE), -+ /* 26, RTW_CHD_5G_26 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B2_PASSIVE | CLA_5G_B3_PASSIVE), -+ /* 27, RTW_CHD_5G_27 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B2_PASSIVE | CLA_5G_B3_PASSIVE), -+ /* 28, RTW_CHD_5G_28 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165, CLA_5G_B2_PASSIVE), -+ /* 29, RTW_CHD_5G_29 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B2_PASSIVE), -+ /* 30, RTW_CHD_5G_30 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B4_PASSIVE), -+ /* 31, RTW_CHD_5G_31 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B2_PASSIVE | CLA_5G_B3_PASSIVE | CLA_5G_B4_PASSIVE), -+ /* 32, RTW_CHD_5G_32 */ CH_LIST_ENT(9, 52, 56, 60, 64, 149, 153, 157, 161, 165, CLA_5G_B2_DFS), -+ /* 33, RTW_CHD_5G_33 */ CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 144, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 34, RTW_CHD_5G_34 */ CH_LIST_ENT(13, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B3_DFS), -+ /* 35, RTW_CHD_5G_35 */ CH_LIST_ENT(8, 100, 104, 108, 112, 116, 132, 136, 140, CLA_5G_B3_DFS), -+ /* 36, RTW_CHD_5G_36 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B2_PASSIVE | CLA_5G_B2_DFS | CLA_5G_B3_PASSIVE | CLA_5G_B3_DFS | CLA_5G_B4_PASSIVE), -+ /* 37, RTW_CHD_5G_37 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64, CLA_5G_B1_PASSIVE | CLA_5G_B2_PASSIVE), -+ /* 38, RTW_CHD_5G_38 */ CH_LIST_ENT(16, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 39, RTW_CHD_5G_39 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B2_DFS | CLA_5G_B3_DFS | CLA_5G_B4_DFS), -+ /* 40, RTW_CHD_5G_40 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 41, RTW_CHD_5G_41 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS | CLA_5G_B4_PASSIVE), -+ /* 42, RTW_CHD_5G_42 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B2_DFS | CLA_5G_B3_DFS | CLA_5G_B4_PASSIVE), -+ /* 43, RTW_CHD_5G_43 */ CH_LIST_ENT(23, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B2_PASSIVE | CLA_5G_B3_PASSIVE | CLA_5G_B4_PASSIVE), -+ /* 44, RTW_CHD_5G_44 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B2_PASSIVE | CLA_5G_B3_PASSIVE | CLA_5G_B4_PASSIVE), -+ /* 45, RTW_CHD_5G_45 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165, CLA_5G_B1_PASSIVE | CLA_5G_B2_PASSIVE | CLA_5G_B4_PASSIVE), -+ /* 46, RTW_CHD_5G_46 */ CH_LIST_ENT(12, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, CLA_5G_B2_PASSIVE), -+ /* 47, RTW_CHD_5G_47 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, CLA_5G_B2_PASSIVE | CLA_5G_B3_PASSIVE), -+ /* 48, RTW_CHD_5G_48 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 49, RTW_CHD_5G_49 */ CH_LIST_ENT(17, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 50, RTW_CHD_5G_50 */ CH_LIST_ENT(17, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 144, 149, 153, 157, 161, 165, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+ /* 51, RTW_CHD_5G_51 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, CLA_5G_B2_DFS | CLA_5G_B3_DFS), -+}; -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+ -+struct chplan_ent_t { -+ u8 regd_2g; /* value of REGULATION_TXPWR_LMT */ -+ u8 chd_2g; -+#if CONFIG_IEEE80211_BAND_5GHZ -+ u8 regd_5g; /* value of REGULATION_TXPWR_LMT */ -+ u8 chd_5g; -+#endif -+}; -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+#define CHPLAN_ENT(_regd_2g, _chd_2g, _regd_5g, _chd_5g) {.regd_2g = _regd_2g, .chd_2g = _chd_2g, .regd_5g = _regd_5g, .chd_5g = _chd_5g} -+#else -+#define CHPLAN_ENT(_regd_2g, _chd_2g, _regd_5g, _chd_5g) {.regd_2g = _regd_2g, .chd_2g = _chd_2g} -+#endif -+ -+#define CHPLAN_ENT_NOT_DEFINED CHPLAN_ENT(TXPWR_LMT_NONE, RTW_CHD_2G_NULL, TXPWR_LMT_NONE, RTW_CHD_5G_NULL) -+ -+static const struct chplan_ent_t RTW_ChannelPlanMap[] = { -+ /* 0x00 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_49), -+ /* 0x01 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_50), -+ /* 0x02 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_03, TXPWR_LMT_ETSI, RTW_CHD_5G_07), -+ /* 0x03 */ CHPLAN_ENT(TXPWR_LMT_ACMA, RTW_CHD_2G_02, TXPWR_LMT_ACMA, RTW_CHD_5G_33), -+ /* 0x04 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_51), -+ /* 0x05 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x06 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x07 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x08 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x09 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x0A */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x0B */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x0C */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x0D */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x0E */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x0F */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x10 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x11 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x12 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x13 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x14 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x15 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x16 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x17 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x18 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x19 */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x1A */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x1B */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x1C */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x1D */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x1E */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x1F */ CHPLAN_ENT_NOT_DEFINED, -+ /* 0x20 */ CHPLAN_ENT(TXPWR_LMT_WW, RTW_CHD_2G_01, TXPWR_LMT_NONE, RTW_CHD_5G_00), -+ /* 0x21 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_NONE, RTW_CHD_5G_00), -+ /* 0x22 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_NONE, RTW_CHD_5G_00), -+ /* 0x23 */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_04, TXPWR_LMT_NONE, RTW_CHD_5G_00), -+ /* 0x24 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_05, TXPWR_LMT_NONE, RTW_CHD_5G_00), -+ /* 0x25 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_03), -+ /* 0x26 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_02), -+ /* 0x27 */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_04, TXPWR_LMT_MKK, RTW_CHD_5G_02), -+ /* 0x28 */ CHPLAN_ENT(TXPWR_LMT_KCC, RTW_CHD_2G_01, TXPWR_LMT_KCC, RTW_CHD_5G_05), -+ /* 0x29 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_01, TXPWR_LMT_FCC, RTW_CHD_5G_06), -+ /* 0x2A */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_02, TXPWR_LMT_NONE, RTW_CHD_5G_00), -+ /* 0x2B */ CHPLAN_ENT(TXPWR_LMT_IC, RTW_CHD_2G_02, TXPWR_LMT_IC, RTW_CHD_5G_33), -+ /* 0x2C */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_02, TXPWR_LMT_NONE, RTW_CHD_5G_00), -+ /* 0x2D */ CHPLAN_ENT(TXPWR_LMT_CHILE, RTW_CHD_2G_01, TXPWR_LMT_CHILE, RTW_CHD_5G_22), -+ /* 0x2E */ CHPLAN_ENT(TXPWR_LMT_WW, RTW_CHD_2G_03, TXPWR_LMT_WW, RTW_CHD_5G_37), -+ /* 0x2F */ CHPLAN_ENT(TXPWR_LMT_CHILE, RTW_CHD_2G_01, TXPWR_LMT_CHILE, RTW_CHD_5G_38), -+ /* 0x30 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_01, TXPWR_LMT_FCC, RTW_CHD_5G_07), -+ /* 0x31 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_01, TXPWR_LMT_FCC, RTW_CHD_5G_08), -+ /* 0x32 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_01, TXPWR_LMT_FCC, RTW_CHD_5G_09), -+ /* 0x33 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_01, TXPWR_LMT_FCC, RTW_CHD_5G_10), -+ /* 0x34 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_01), -+ /* 0x35 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_03), -+ /* 0x36 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_04), -+ /* 0x37 */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_04, TXPWR_LMT_MKK, RTW_CHD_5G_10), -+ /* 0x38 */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_04, TXPWR_LMT_MKK, RTW_CHD_5G_11), -+ /* 0x39 */ CHPLAN_ENT(TXPWR_LMT_NCC, RTW_CHD_2G_03, TXPWR_LMT_NCC, RTW_CHD_5G_12), -+ /* 0x3A */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_02), -+ /* 0x3B */ CHPLAN_ENT(TXPWR_LMT_ACMA, RTW_CHD_2G_02, TXPWR_LMT_ACMA, RTW_CHD_5G_01), -+ /* 0x3C */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_10), -+ /* 0x3D */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_15), -+ /* 0x3E */ CHPLAN_ENT(TXPWR_LMT_KCC, RTW_CHD_2G_02, TXPWR_LMT_KCC, RTW_CHD_5G_03), -+ /* 0x3F */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_22), -+ /* 0x40 */ CHPLAN_ENT(TXPWR_LMT_NCC, RTW_CHD_2G_03, TXPWR_LMT_NCC, RTW_CHD_5G_13), -+ /* 0x41 */ CHPLAN_ENT(TXPWR_LMT_WW, RTW_CHD_2G_06, TXPWR_LMT_NONE, RTW_CHD_5G_00), -+ /* 0x42 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_14), -+ /* 0x43 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_06), -+ /* 0x44 */ CHPLAN_ENT(TXPWR_LMT_NCC, RTW_CHD_2G_03, TXPWR_LMT_NCC, RTW_CHD_5G_09), -+ /* 0x45 */ CHPLAN_ENT(TXPWR_LMT_ACMA, RTW_CHD_2G_01, TXPWR_LMT_ACMA, RTW_CHD_5G_01), -+ /* 0x46 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_15), -+ /* 0x47 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_10), -+ /* 0x48 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_07), -+ /* 0x49 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_06), -+ /* 0x4A */ CHPLAN_ENT(TXPWR_LMT_IC, RTW_CHD_2G_03, TXPWR_LMT_IC, RTW_CHD_5G_33), -+ /* 0x4B */ CHPLAN_ENT(TXPWR_LMT_KCC, RTW_CHD_2G_02, TXPWR_LMT_KCC, RTW_CHD_5G_22), -+ /* 0x4C */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_28), -+ /* 0x4D */ CHPLAN_ENT(TXPWR_LMT_MEXICO, RTW_CHD_2G_02, TXPWR_LMT_MEXICO, RTW_CHD_5G_01), -+ /* 0x4E */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_42), -+ /* 0x4F */ CHPLAN_ENT(TXPWR_LMT_NONE, RTW_CHD_2G_00, TXPWR_LMT_MKK, RTW_CHD_5G_43), -+ /* 0x50 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_16), -+ /* 0x51 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_09), -+ /* 0x52 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_17), -+ /* 0x53 */ CHPLAN_ENT(TXPWR_LMT_NCC, RTW_CHD_2G_03, TXPWR_LMT_NCC, RTW_CHD_5G_18), -+ /* 0x54 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_15), -+ /* 0x55 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_01), -+ /* 0x56 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_19), -+ /* 0x57 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_20), -+ /* 0x58 */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_02, TXPWR_LMT_MKK, RTW_CHD_5G_14), -+ /* 0x59 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_21), -+ /* 0x5A */ CHPLAN_ENT(TXPWR_LMT_NONE, RTW_CHD_2G_00, TXPWR_LMT_FCC, RTW_CHD_5G_44), -+ /* 0x5B */ CHPLAN_ENT(TXPWR_LMT_NONE, RTW_CHD_2G_00, TXPWR_LMT_FCC, RTW_CHD_5G_45), -+ /* 0x5C */ CHPLAN_ENT(TXPWR_LMT_NONE, RTW_CHD_2G_00, TXPWR_LMT_FCC, RTW_CHD_5G_43), -+ /* 0x5D */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_08), -+ /* 0x5E */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_03), -+ /* 0x5F */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_02, TXPWR_LMT_MKK, RTW_CHD_5G_47), -+ /* 0x60 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_09), -+ /* 0x61 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_02, TXPWR_LMT_FCC, RTW_CHD_5G_01), -+ /* 0x62 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_02, TXPWR_LMT_FCC, RTW_CHD_5G_03), -+ /* 0x63 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_23), -+ /* 0x64 */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_02, TXPWR_LMT_MKK, RTW_CHD_5G_24), -+ /* 0x65 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_24), -+ /* 0x66 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_27), -+ /* 0x67 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_25), -+ /* 0x68 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_02, TXPWR_LMT_FCC, RTW_CHD_5G_27), -+ /* 0x69 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_02, TXPWR_LMT_FCC, RTW_CHD_5G_25), -+ /* 0x6A */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_25), -+ /* 0x6B */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_01, TXPWR_LMT_FCC, RTW_CHD_5G_29), -+ /* 0x6C */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_01, TXPWR_LMT_FCC, RTW_CHD_5G_26), -+ /* 0x6D */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_02, TXPWR_LMT_FCC, RTW_CHD_5G_28), -+ /* 0x6E */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_01, TXPWR_LMT_FCC, RTW_CHD_5G_25), -+ /* 0x6F */ CHPLAN_ENT(TXPWR_LMT_NONE, RTW_CHD_2G_00, TXPWR_LMT_ETSI, RTW_CHD_5G_06), -+ /* 0x70 */ CHPLAN_ENT(TXPWR_LMT_NONE, RTW_CHD_2G_00, TXPWR_LMT_ETSI, RTW_CHD_5G_30), -+ /* 0x71 */ CHPLAN_ENT(TXPWR_LMT_NONE, RTW_CHD_2G_00, TXPWR_LMT_ETSI, RTW_CHD_5G_25), -+ /* 0x72 */ CHPLAN_ENT(TXPWR_LMT_NONE, RTW_CHD_2G_00, TXPWR_LMT_ETSI, RTW_CHD_5G_31), -+ /* 0x73 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_01, TXPWR_LMT_FCC, RTW_CHD_5G_01), -+ /* 0x74 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_02, TXPWR_LMT_FCC, RTW_CHD_5G_19), -+ /* 0x75 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_32), -+ /* 0x76 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_02, TXPWR_LMT_FCC, RTW_CHD_5G_22), -+ /* 0x77 */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_01, TXPWR_LMT_ETSI, RTW_CHD_5G_34), -+ /* 0x78 */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_03, TXPWR_LMT_FCC, RTW_CHD_5G_35), -+ /* 0x79 */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_02, TXPWR_LMT_MKK, RTW_CHD_5G_02), -+ /* 0x7A */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_28), -+ /* 0x7B */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_46), -+ /* 0x7C */ CHPLAN_ENT(TXPWR_LMT_ETSI, RTW_CHD_2G_02, TXPWR_LMT_ETSI, RTW_CHD_5G_47), -+ /* 0x7D */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_04, TXPWR_LMT_MKK, RTW_CHD_5G_48), -+ /* 0x7E */ CHPLAN_ENT(TXPWR_LMT_MKK, RTW_CHD_2G_02, TXPWR_LMT_MKK, RTW_CHD_5G_48), -+ /* 0x7F */ CHPLAN_ENT(TXPWR_LMT_FCC, RTW_CHD_2G_01, TXPWR_LMT_FCC, RTW_CHD_5G_03), -+}; -+ -+const int RTW_ChannelPlanMap_size = sizeof(RTW_ChannelPlanMap) / sizeof(RTW_ChannelPlanMap[0]); -+ -+u8 rtw_chplan_get_default_regd_2g(u8 id) -+{ -+ return RTW_ChannelPlanMap[id].regd_2g; -+} -+ -+u8 rtw_chplan_get_default_regd_5g(u8 id) -+{ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ return RTW_ChannelPlanMap[id].regd_5g; -+#else -+ return TXPWR_LMT_NONE; -+#endif -+} -+ -+u8 rtw_chplan_get_default_regd(u8 id) -+{ -+ u8 regd_2g = rtw_chplan_get_default_regd_2g(id); -+ u8 regd_5g = rtw_chplan_get_default_regd_5g(id); -+ -+ if (regd_2g != TXPWR_LMT_NONE && regd_5g != TXPWR_LMT_NONE) { -+ if (regd_2g != regd_5g) -+ RTW_WARN("channel_plan:0x%02x, regd_2g:%u, regd_5g:%u not the same\n", id, regd_2g, regd_5g); -+ return regd_5g; -+ } -+ return regd_2g != TXPWR_LMT_NONE ? regd_2g : regd_5g; -+} -+ -+bool rtw_chplan_is_empty(u8 id) -+{ -+ const struct chplan_ent_t *chplan_map = &RTW_ChannelPlanMap[id]; -+ -+ if (chplan_map->chd_2g == RTW_CHD_2G_NULL -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ && chplan_map->chd_5g == RTW_CHD_5G_NULL -+ #endif -+ ) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+bool rtw_is_channel_plan_valid(u8 id) -+{ -+ return id < RTW_ChannelPlanMap_size && !rtw_chplan_is_empty(id); -+} -+ -+bool rtw_regsty_is_excl_chs(struct registry_priv *regsty, u8 ch) -+{ -+ int i; -+ -+ for (i = 0; i < MAX_CHANNEL_NUM; i++) { -+ if (regsty->excl_chs[i] == 0) -+ break; -+ if (regsty->excl_chs[i] == ch) -+ return _TRUE; -+ } -+ return _FALSE; -+} -+ -+const char *_regd_src_str[] = { -+ [REGD_SRC_RTK_PRIV] = "RTK_PRIV", -+ [REGD_SRC_OS] = "OS", -+ [REGD_SRC_NUM] = "UNKNOWN", -+}; -+ -+static u8 init_channel_set_from_rtk_priv(_adapter *padapter, RT_CHANNEL_INFO *channel_set) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ struct registry_priv *regsty = adapter_to_regsty(padapter); -+ u8 ChannelPlan = rfctl->ChannelPlan; -+ u8 index, chanset_size = 0; -+ u8 b5GBand = _FALSE, b2_4GBand = _FALSE; -+ u8 ch, attrib; -+#ifdef CONFIG_DFS_MASTER -+ int i; -+#endif -+ -+ if (!rtw_is_channel_plan_valid(ChannelPlan)) { -+ RTW_ERR("ChannelPlan ID 0x%02X error !!!!!\n", ChannelPlan); -+ return chanset_size; -+ } -+ -+ _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM); -+ -+ if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_2G)) -+ b2_4GBand = _TRUE; -+ -+ if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_5G)) -+ b5GBand = _TRUE; -+ -+ if (b2_4GBand == _FALSE && b5GBand == _FALSE) { -+ RTW_WARN("HW band_cap has no intersection with SW wireless_mode setting\n"); -+ return chanset_size; -+ } -+ -+ if (b2_4GBand) { -+ u8 chd_2g = RTW_ChannelPlanMap[ChannelPlan].chd_2g; -+ -+ attrib = CH_LIST_ATTRIB(rtw_channel_def_2g[chd_2g]); -+ -+ for (index = 0; index < CH_LIST_LEN(rtw_channel_def_2g[chd_2g]); index++) { -+ ch = CH_LIST_CH(rtw_channel_def_2g[chd_2g], index); -+ if (rtw_regsty_is_excl_chs(regsty, ch) == _TRUE) -+ continue; -+ -+ if (chanset_size >= MAX_CHANNEL_NUM) { -+ RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); -+ break; -+ } -+ -+ channel_set[chanset_size].ChannelNum = ch; -+ -+ if (ch >= 12 && ch <= 14 && (attrib & CLA_2G_12_14_PASSIVE)) -+ channel_set[chanset_size].flags |= RTW_CHF_NO_IR; -+ -+ if (channel_set[chanset_size].flags & RTW_CHF_NO_IR) { -+ if (rfctl->country_ent || ch <= 11) -+ RTW_INFO("ch%u is PASSIVE\n", ch); -+ } -+ -+ chanset_size++; -+ } -+ } -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ if (b5GBand) { -+ bool dfs; -+ u8 chd_5g = RTW_ChannelPlanMap[ChannelPlan].chd_5g; -+ -+ attrib = CH_LIST_ATTRIB(rtw_channel_def_5g[chd_5g]); -+ -+ for (index = 0; index < CH_LIST_LEN(rtw_channel_def_5g[chd_5g]); index++) { -+ ch = CH_LIST_CH(rtw_channel_def_5g[chd_5g], index); -+ if (rtw_regsty_is_excl_chs(regsty, ch) == _TRUE) -+ continue; -+ dfs = (rtw_is_5g_band2(ch) && (attrib & CLA_5G_B2_DFS)) -+ || (rtw_is_5g_band3(ch) && (attrib & CLA_5G_B3_DFS)) -+ || (rtw_is_5g_band4(ch) && (attrib & CLA_5G_B4_DFS)); -+ #if !CONFIG_DFS -+ if (dfs) -+ continue; -+ #endif -+ -+ if (chanset_size >= MAX_CHANNEL_NUM) { -+ RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); -+ break; -+ } -+ -+ channel_set[chanset_size].ChannelNum = ch; -+ -+ if ((rtw_is_5g_band1(ch) && (attrib & CLA_5G_B1_PASSIVE)) /* band1 passive */ -+ || (rtw_is_5g_band2(ch) && (attrib & CLA_5G_B2_PASSIVE)) /* band2 passive */ -+ || (rtw_is_5g_band3(ch) && (attrib & CLA_5G_B3_PASSIVE)) /* band3 passive */ -+ || (rtw_is_5g_band4(ch) && (attrib & CLA_5G_B4_PASSIVE)) /* band4 passive */ -+ ) -+ channel_set[chanset_size].flags |= RTW_CHF_NO_IR; -+ -+ if (dfs) -+ channel_set[chanset_size].flags |= RTW_CHF_DFS; -+ -+ if (channel_set[chanset_size].flags & RTW_CHF_NO_IR) { -+ if (rfctl->country_ent || (channel_set[chanset_size].flags & RTW_CHF_DFS)) -+ RTW_INFO("ch%u is PASSIVE%s\n", ch, dfs ? " DFS" : ""); -+ } -+ -+ chanset_size++; -+ } -+ } -+ -+ #ifdef CONFIG_DFS_MASTER -+ for (i = 0; i < chanset_size; i++) -+ channel_set[i].non_ocp_end_time = rtw_get_current_time(); -+ #endif -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+ -+ if (chanset_size) -+ RTW_INFO(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, ch num:%d\n" -+ , FUNC_ADPT_ARG(padapter), ChannelPlan, chanset_size); -+ else -+ RTW_WARN(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, final chset has no channel\n" -+ , FUNC_ADPT_ARG(padapter), ChannelPlan); -+ -+ return chanset_size; -+} -+ -+u8 init_channel_set(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ if (rfctl->regd_src == REGD_SRC_RTK_PRIV) -+ return init_channel_set_from_rtk_priv(adapter, rfctl->channel_set); -+#ifdef CONFIG_REGD_SRC_FROM_OS -+ else if (rfctl->regd_src == REGD_SRC_OS) -+ return rtw_os_init_channel_set(adapter, rfctl->channel_set); -+#endif -+ else -+ rtw_warn_on(1); -+ -+ return 0; -+} -+ -+bool rtw_chset_is_dfs_range(struct _RT_CHANNEL_INFO *chset, u32 hi, u32 lo) -+{ -+ u8 hi_ch = rtw_freq2ch(hi); -+ u8 lo_ch = rtw_freq2ch(lo); -+ int i; -+ -+ for (i = 0; i < MAX_CHANNEL_NUM && chset[i].ChannelNum != 0; i++){ -+ if (!(chset[i].flags & RTW_CHF_DFS)) -+ continue; -+ if (hi_ch > chset[i].ChannelNum && lo_ch < chset[i].ChannelNum) -+ return 1; -+ } -+ -+ return 0; -+} -+ -+bool rtw_chset_is_dfs_ch(struct _RT_CHANNEL_INFO *chset, u8 ch) -+{ -+ int i; -+ -+ for (i = 0; i < MAX_CHANNEL_NUM && chset[i].ChannelNum != 0; i++){ -+ if (chset[i].ChannelNum == ch) -+ return chset[i].flags & RTW_CHF_DFS ? 1 : 0; -+ } -+ -+ return 0; -+} -+ -+bool rtw_chset_is_dfs_chbw(struct _RT_CHANNEL_INFO *chset, u8 ch, u8 bw, u8 offset) -+{ -+ u32 hi, lo; -+ -+ if (!rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo)) -+ return 0; -+ -+ return rtw_chset_is_dfs_range(chset, hi, lo); -+} -+ -+u8 rtw_process_beacon_hint(_adapter *adapter, WLAN_BSSID_EX *bss) -+{ -+#ifndef RTW_CHPLAN_BEACON_HINT_NON_WORLD_WIDE -+#define RTW_CHPLAN_BEACON_HINT_NON_WORLD_WIDE 0 -+#endif -+ -+#ifndef RTW_CHPLAN_BEACON_HINT_ON_2G_CH_1_11 -+#define RTW_CHPLAN_BEACON_HINT_ON_2G_CH_1_11 0 -+#endif -+ -+#ifndef RTW_CHPLAN_BEACON_HINT_ON_DFS_CH -+#define RTW_CHPLAN_BEACON_HINT_ON_DFS_CH 0 -+#endif -+ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ u8 ch = bss->Configuration.DSConfig; -+ int chset_idx = rtw_chset_search_ch(chset, ch); -+ u8 act_cnt = 0; -+ -+ if (chset_idx < 0) -+ goto exit; -+ -+ if ((chset[chset_idx].flags & RTW_CHF_NO_IR) -+ && (RTW_CHPLAN_BEACON_HINT_NON_WORLD_WIDE || !rfctl->country_ent || IS_ALPHA2_WORLDWIDE(rfctl->country_ent->alpha2)) -+ && (RTW_CHPLAN_BEACON_HINT_ON_2G_CH_1_11 || !(ch <= 11)) -+ && (RTW_CHPLAN_BEACON_HINT_ON_DFS_CH || !(chset[chset_idx].flags & RTW_CHF_DFS)) -+ ) { -+ RTW_INFO("%s: change ch:%d to active\n", __func__, ch); -+ chset[chset_idx].flags &= ~RTW_CHF_NO_IR; -+ act_cnt++; -+ } -+ -+exit: -+ return act_cnt; -+} -+ -+const char *_rtw_dfs_regd_str[] = { -+ [RTW_DFS_REGD_NONE] = "NONE", -+ [RTW_DFS_REGD_FCC] = "FCC", -+ [RTW_DFS_REGD_MKK] = "MKK", -+ [RTW_DFS_REGD_ETSI] = "ETSI", -+}; -+ -+#ifdef CONFIG_80211AC_VHT -+#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val) -+#else -+#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) -+#endif -+ -+#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _en_11ac) \ -+ {.alpha2 = (_alpha2), .chplan = (_chplan) \ -+ COUNTRY_CHPLAN_ASSIGN_EN_11AC(_en_11ac) \ -+ } -+ -+#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP -+ -+#include "../platform/custom_country_chplan.h" -+ -+#elif RTW_DEF_MODULE_REGULATORY_CERT -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2) /* 2013 certify */ -+static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AN", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BH", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("BO", 0x73, 1), -+ COUNTRY_CHPLAN_ENT("BR", 0x62, 1), -+ COUNTRY_CHPLAN_ENT("BW", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("BY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CI", 0x42, 1), -+ COUNTRY_CHPLAN_ENT("CL", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x51, 1), -+ COUNTRY_CHPLAN_ENT("CO", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CR", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DO", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("DZ", 0x00, 1), -+ COUNTRY_CHPLAN_ENT("EC", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EG", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GT", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HN", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ID", 0x3D, 0), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IL", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("IN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JM", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("KG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x28, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MA", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ME", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MX", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("MY", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), -+ COUNTRY_CHPLAN_ENT("NI", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PA", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PE", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PK", 0x51, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PR", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PY", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("RO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 1), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SV", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("TH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("TN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("TR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TT", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x39, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x36, 0), -+ COUNTRY_CHPLAN_ENT("UG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("US", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("UY", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VE", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VN", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU) /* 2014 certify */ -+static const struct country_chplan RTL8821AU_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ID", 0x3D, 0), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x28, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 0), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x39, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x36, 0), -+ COUNTRY_CHPLAN_ENT("US", 0x34, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF) /* 2014 certify */ -+static const struct country_chplan RTL8812AENF_NGFF_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x39, 1), -+ COUNTRY_CHPLAN_ENT("US", 0x34, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC) /* 2013 certify */ -+static const struct country_chplan RTL8812AEBT_HMC_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x28, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 0), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x39, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x36, 0), -+ COUNTRY_CHPLAN_ENT("US", 0x34, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2) /* 2012 certify */ -+static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AN", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("AW", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BB", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("BD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BH", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("BI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("BO", 0x73, 1), -+ COUNTRY_CHPLAN_ENT("BR", 0x62, 1), -+ COUNTRY_CHPLAN_ENT("BW", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("BY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x20, 1), -+ COUNTRY_CHPLAN_ENT("CD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CI", 0x42, 1), -+ COUNTRY_CHPLAN_ENT("CL", 0x2D, 1), -+ COUNTRY_CHPLAN_ENT("CM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("CO", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CR", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DO", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("DZ", 0x00, 1), -+ COUNTRY_CHPLAN_ENT("EC", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EG", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ET", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GD", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("GH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GQ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GT", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("GW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HN", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HT", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ID", 0x5D, 1), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IL", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("IN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JM", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("KG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x28, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MA", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ME", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ML", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MX", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("MY", 0x63, 1), -+ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), -+ COUNTRY_CHPLAN_ENT("NI", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NP", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PA", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PE", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PK", 0x51, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PR", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PY", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("RO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 1), -+ COUNTRY_CHPLAN_ENT("RW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SC", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SV", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("TD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("TN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("TR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TT", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x39, 1), -+ COUNTRY_CHPLAN_ENT("TZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("UG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("US", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("UY", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("UZ", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("VC", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("VE", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VN", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2) /* 2013 certify */ -+static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AN", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("AO", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("AW", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BH", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("BI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BO", 0x73, 1), -+ COUNTRY_CHPLAN_ENT("BR", 0x62, 1), -+ COUNTRY_CHPLAN_ENT("BS", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("BW", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("BY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x20, 1), -+ COUNTRY_CHPLAN_ENT("CD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CI", 0x42, 1), -+ COUNTRY_CHPLAN_ENT("CL", 0x2D, 1), -+ COUNTRY_CHPLAN_ENT("CM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("CO", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CR", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DO", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("DZ", 0x00, 1), -+ COUNTRY_CHPLAN_ENT("EC", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EG", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ET", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GD", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("GH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GQ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GT", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("GW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HN", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ID", 0x5D, 1), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IL", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("IN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JM", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("KG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x28, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MA", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ME", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ML", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MX", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("MY", 0x63, 1), -+ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), -+ COUNTRY_CHPLAN_ENT("NI", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NP", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PA", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PE", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PK", 0x51, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PR", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PY", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("RO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 1), -+ COUNTRY_CHPLAN_ENT("RW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SV", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("SZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("TN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("TR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TT", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x39, 1), -+ COUNTRY_CHPLAN_ENT("TZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("UG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("US", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("UY", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("UZ", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("VE", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VN", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216) /* 2014 certify */ -+static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AN", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("AO", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BB", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("BD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BH", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("BO", 0x73, 1), -+ COUNTRY_CHPLAN_ENT("BR", 0x62, 1), -+ COUNTRY_CHPLAN_ENT("BW", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("BY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x20, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CI", 0x42, 1), -+ COUNTRY_CHPLAN_ENT("CL", 0x2D, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("CO", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CR", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DO", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("DZ", 0x00, 1), -+ COUNTRY_CHPLAN_ENT("EC", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EG", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GT", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HN", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HT", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ID", 0x5D, 1), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IL", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("IN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JM", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("KG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x28, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MA", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ME", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MQ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MX", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("MY", 0x63, 1), -+ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), -+ COUNTRY_CHPLAN_ENT("NI", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NP", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PA", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PE", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PK", 0x51, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PR", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PY", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("RO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 1), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SV", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("TH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("TJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("TR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TT", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x39, 1), -+ COUNTRY_CHPLAN_ENT("TZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("UG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("US", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("UY", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("UZ", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("VE", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VN", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("YE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2) /* 2013 certify */ -+static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AN", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("AO", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("AW", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BH", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("BI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BO", 0x73, 1), -+ COUNTRY_CHPLAN_ENT("BR", 0x62, 1), -+ COUNTRY_CHPLAN_ENT("BW", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("BY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x20, 1), -+ COUNTRY_CHPLAN_ENT("CD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CI", 0x42, 1), -+ COUNTRY_CHPLAN_ENT("CL", 0x2D, 1), -+ COUNTRY_CHPLAN_ENT("CM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("CO", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CR", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("CV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DO", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("DZ", 0x00, 1), -+ COUNTRY_CHPLAN_ENT("EC", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EG", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("EH", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ET", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GD", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("GF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GQ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GT", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("GW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HN", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ID", 0x5D, 1), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IL", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("IN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JM", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("KG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x28, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MA", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ME", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ML", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MX", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("MY", 0x63, 1), -+ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), -+ COUNTRY_CHPLAN_ENT("NI", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NP", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PA", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PE", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PK", 0x51, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PR", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PY", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("RO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 1), -+ COUNTRY_CHPLAN_ENT("RW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SC", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ST", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("SV", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("TD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("TN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("TR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TT", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x39, 1), -+ COUNTRY_CHPLAN_ENT("TZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("UG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("US", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("UY", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("UZ", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("VE", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VN", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("YT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723DE_NGFF1630) /* 2016 certify */ -+static const struct country_chplan RTL8723DE_NGFF1630_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AN", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BH", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("BO", 0x73, 1), -+ COUNTRY_CHPLAN_ENT("BR", 0x62, 1), -+ COUNTRY_CHPLAN_ENT("BY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x2A, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CI", 0x42, 1), -+ COUNTRY_CHPLAN_ENT("CL", 0x2D, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("CO", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("CR", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DO", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("DZ", 0x00, 1), -+ COUNTRY_CHPLAN_ENT("EC", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EG", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GT", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HN", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ID", 0x5D, 1), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IL", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("IN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JM", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("KG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x28, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MA", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ME", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MX", 0x34, 1), -+ COUNTRY_CHPLAN_ENT("MY", 0x63, 1), -+ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), -+ COUNTRY_CHPLAN_ENT("NI", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PA", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PE", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PK", 0x51, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PR", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PY", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("RO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 1), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SV", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("TH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("TN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("TR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TT", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("US", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("UY", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VE", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VN", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8822BE) /* 2016 certify */ -+static const struct country_chplan RTL8822BE_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AN", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("AO", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BB", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("BD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BH", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("BI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BM", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("BN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("BO", 0x73, 1), -+ COUNTRY_CHPLAN_ENT("BR", 0x62, 1), -+ COUNTRY_CHPLAN_ENT("BS", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("BW", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("BY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x2B, 1), -+ COUNTRY_CHPLAN_ENT("CD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CI", 0x42, 1), -+ COUNTRY_CHPLAN_ENT("CL", 0x2D, 1), -+ COUNTRY_CHPLAN_ENT("CM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("CO", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("CR", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("CV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DO", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("DZ", 0x00, 1), -+ COUNTRY_CHPLAN_ENT("EC", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EG", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("EH", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FJ", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GP", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GQ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GT", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("GU", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("GW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HN", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HT", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ID", 0x3D, 0), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IL", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("IN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JM", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("KG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x28, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MA", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ME", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ML", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MO", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("MQ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MX", 0x4D, 1), -+ COUNTRY_CHPLAN_ENT("MY", 0x63, 1), -+ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), -+ COUNTRY_CHPLAN_ENT("NI", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NP", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PA", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PE", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PK", 0x51, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PR", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PY", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("RO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 1), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SC", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ST", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("SV", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("TD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("TJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("TR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TT", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("TZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("UG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("US", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("UY", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("UZ", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("VE", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VN", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("YT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821CE) /* 2016 certify */ -+static const struct country_chplan RTL8821CE_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AN", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("AO", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BB", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("BD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BH", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("BI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BM", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("BN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("BO", 0x73, 1), -+ COUNTRY_CHPLAN_ENT("BR", 0x62, 1), -+ COUNTRY_CHPLAN_ENT("BS", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("BW", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("BY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x2B, 1), -+ COUNTRY_CHPLAN_ENT("CD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CI", 0x42, 1), -+ COUNTRY_CHPLAN_ENT("CL", 0x2D, 1), -+ COUNTRY_CHPLAN_ENT("CM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("CO", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("CR", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("CV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DO", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("DZ", 0x00, 1), -+ COUNTRY_CHPLAN_ENT("EC", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EG", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("EH", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ET", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FJ", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GP", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GQ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GT", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("GU", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("GW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HN", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HT", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ID", 0x3D, 0), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IL", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("IN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JM", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("KG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x28, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MA", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ME", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ML", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MO", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("MQ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MX", 0x4D, 1), -+ COUNTRY_CHPLAN_ENT("MY", 0x63, 1), -+ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), -+ COUNTRY_CHPLAN_ENT("NI", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NP", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PA", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PE", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PK", 0x51, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PR", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PY", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("RO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 1), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SC", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ST", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("SV", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("TD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("TJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("TR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("TZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("UG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("US", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("UY", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("UZ", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("VE", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VN", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("YT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1), -+}; -+#endif -+ -+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8822CE) /* 2018 certify */ -+static const struct country_chplan RTL8822CE_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("AL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AN", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("AO", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("AW", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BB", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("BD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BH", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("BI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("BM", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("BN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("BO", 0x73, 1), -+ COUNTRY_CHPLAN_ENT("BR", 0x62, 1), -+ COUNTRY_CHPLAN_ENT("BS", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("BW", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("BY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CA", 0x2B, 1), -+ COUNTRY_CHPLAN_ENT("CD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CI", 0x42, 1), -+ COUNTRY_CHPLAN_ENT("CL", 0x2D, 1), -+ COUNTRY_CHPLAN_ENT("CM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("CO", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("CR", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("CV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("DO", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("DZ", 0x00, 1), -+ COUNTRY_CHPLAN_ENT("EC", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("EG", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("EH", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ET", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("FJ", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GP", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GQ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("GT", 0x61, 1), -+ COUNTRY_CHPLAN_ENT("GU", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("GW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("HN", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("HT", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IL", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("IN", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("JM", 0x32, 1), -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("KG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KH", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KR", 0x4B, 1), -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("KZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LB", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MA", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ME", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ML", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MO", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("MQ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MU", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MW", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("MX", 0x4D, 1), -+ COUNTRY_CHPLAN_ENT("MY", 0x63, 1), -+ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NA", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), -+ COUNTRY_CHPLAN_ENT("NI", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("NP", 0x48, 1), -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PA", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PE", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("PK", 0x51, 1), -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PR", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("PY", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("RO", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RS", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 1), -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SC", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SL", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("SN", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ST", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("SV", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("SZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TD", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TF", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TH", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("TJ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TN", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("TR", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("TW", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("TZ", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("UA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("UG", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("US", 0x76, 1), -+ COUNTRY_CHPLAN_ENT("UY", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("UZ", 0x47, 1), -+ COUNTRY_CHPLAN_ENT("VE", 0x30, 1), -+ COUNTRY_CHPLAN_ENT("VN", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("YT", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZA", 0x35, 1), -+ COUNTRY_CHPLAN_ENT("ZM", 0x26, 1), -+ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1), -+}; -+#endif -+ -+/** -+ * rtw_def_module_country_chplan_map - -+ * @hal_map: returned map -+ * @return: size of map -+ */ -+static u16 rtw_def_module_country_chplan_map(const struct country_chplan **hal_map) -+{ -+ u16 hal_map_sz = 0; -+ -+ /* TODO: runtime selection for multi driver */ -+#if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2) -+ *hal_map = RTL8821AE_HMC_M2_country_chplan_map; -+ hal_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU) -+ *hal_map = RTL8821AU_country_chplan_map; -+ hal_map_sz = sizeof(RTL8821AU_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF) -+ *hal_map = RTL8812AENF_NGFF_country_chplan_map; -+ hal_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC) -+ *hal_map = RTL8812AEBT_HMC_country_chplan_map; -+ hal_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2) -+ *hal_map = RTL8188EE_HMC_M2_country_chplan_map; -+ hal_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2) -+ *hal_map = RTL8723BE_HMC_M2_country_chplan_map; -+ hal_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216) -+ *hal_map = RTL8723BS_NGFF1216_country_chplan_map; -+ hal_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2) -+ *hal_map = RTL8192EEBT_HMC_M2_country_chplan_map; -+ hal_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723DE_NGFF1630) -+ *hal_map = RTL8723DE_NGFF1630_country_chplan_map; -+ hal_map_sz = sizeof(RTL8723DE_NGFF1630_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8822BE) -+ *hal_map = RTL8822BE_country_chplan_map; -+ hal_map_sz = sizeof(RTL8822BE_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821CE) -+ *hal_map = RTL8821CE_country_chplan_map; -+ hal_map_sz = sizeof(RTL8821CE_country_chplan_map) / sizeof(struct country_chplan); -+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8822CE) -+ *hal_map = RTL8822CE_country_chplan_map; -+ hal_map_sz = sizeof(RTL8822CE_country_chplan_map) / sizeof(struct country_chplan); -+#endif -+ -+ return hal_map_sz; -+} -+#else -+ -+static const struct country_chplan country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("AD", 0x26, 1), /* Andorra */ -+ COUNTRY_CHPLAN_ENT("AE", 0x35, 1), /* United Arab Emirates */ -+ COUNTRY_CHPLAN_ENT("AF", 0x42, 1), /* Afghanistan */ -+ COUNTRY_CHPLAN_ENT("AG", 0x76, 1), /* Antigua & Barbuda */ -+ COUNTRY_CHPLAN_ENT("AI", 0x26, 1), /* Anguilla(UK) */ -+ COUNTRY_CHPLAN_ENT("AL", 0x26, 1), /* Albania */ -+ COUNTRY_CHPLAN_ENT("AM", 0x26, 1), /* Armenia */ -+ COUNTRY_CHPLAN_ENT("AN", 0x76, 1), /* Netherlands Antilles */ -+ COUNTRY_CHPLAN_ENT("AO", 0x47, 1), /* Angola */ -+ COUNTRY_CHPLAN_ENT("AQ", 0x26, 1), /* Antarctica */ -+ COUNTRY_CHPLAN_ENT("AR", 0x61, 1), /* Argentina */ -+ COUNTRY_CHPLAN_ENT("AS", 0x76, 1), /* American Samoa */ -+ COUNTRY_CHPLAN_ENT("AT", 0x26, 1), /* Austria */ -+ COUNTRY_CHPLAN_ENT("AU", 0x45, 1), /* Australia */ -+ COUNTRY_CHPLAN_ENT("AW", 0x76, 1), /* Aruba */ -+ COUNTRY_CHPLAN_ENT("AZ", 0x26, 1), /* Azerbaijan */ -+ COUNTRY_CHPLAN_ENT("BA", 0x26, 1), /* Bosnia & Herzegovina */ -+ COUNTRY_CHPLAN_ENT("BB", 0x76, 1), /* Barbados */ -+ COUNTRY_CHPLAN_ENT("BD", 0x26, 1), /* Bangladesh */ -+ COUNTRY_CHPLAN_ENT("BE", 0x26, 1), /* Belgium */ -+ COUNTRY_CHPLAN_ENT("BF", 0x26, 1), /* Burkina Faso */ -+ COUNTRY_CHPLAN_ENT("BG", 0x26, 1), /* Bulgaria */ -+ COUNTRY_CHPLAN_ENT("BH", 0x48, 1), /* Bahrain */ -+ COUNTRY_CHPLAN_ENT("BI", 0x26, 1), /* Burundi */ -+ COUNTRY_CHPLAN_ENT("BJ", 0x26, 1), /* Benin */ -+ COUNTRY_CHPLAN_ENT("BM", 0x76, 1), /* Bermuda (UK) */ -+ COUNTRY_CHPLAN_ENT("BN", 0x47, 1), /* Brunei */ -+ COUNTRY_CHPLAN_ENT("BO", 0x73, 1), /* Bolivia */ -+ COUNTRY_CHPLAN_ENT("BR", 0x62, 1), /* Brazil */ -+ COUNTRY_CHPLAN_ENT("BS", 0x76, 1), /* Bahamas */ -+ COUNTRY_CHPLAN_ENT("BT", 0x26, 1), /* Bhutan */ -+ COUNTRY_CHPLAN_ENT("BV", 0x26, 1), /* Bouvet Island (Norway) */ -+ COUNTRY_CHPLAN_ENT("BW", 0x35, 1), /* Botswana */ -+ COUNTRY_CHPLAN_ENT("BY", 0x26, 1), /* Belarus */ -+ COUNTRY_CHPLAN_ENT("BZ", 0x76, 1), /* Belize */ -+ COUNTRY_CHPLAN_ENT("CA", 0x2B, 1), /* Canada */ -+ COUNTRY_CHPLAN_ENT("CC", 0x26, 1), /* Cocos (Keeling) Islands (Australia) */ -+ COUNTRY_CHPLAN_ENT("CD", 0x26, 1), /* Congo, Republic of the */ -+ COUNTRY_CHPLAN_ENT("CF", 0x26, 1), /* Central African Republic */ -+ COUNTRY_CHPLAN_ENT("CG", 0x26, 1), /* Congo, Democratic Republic of the. Zaire */ -+ COUNTRY_CHPLAN_ENT("CH", 0x26, 1), /* Switzerland */ -+ COUNTRY_CHPLAN_ENT("CI", 0x42, 1), /* Cote d'Ivoire */ -+ COUNTRY_CHPLAN_ENT("CK", 0x26, 1), /* Cook Islands */ -+ COUNTRY_CHPLAN_ENT("CL", 0x2D, 1), /* Chile */ -+ COUNTRY_CHPLAN_ENT("CM", 0x26, 1), /* Cameroon */ -+ COUNTRY_CHPLAN_ENT("CN", 0x48, 1), /* China */ -+ COUNTRY_CHPLAN_ENT("CO", 0x76, 1), /* Colombia */ -+ COUNTRY_CHPLAN_ENT("CR", 0x76, 1), /* Costa Rica */ -+ COUNTRY_CHPLAN_ENT("CV", 0x26, 1), /* Cape Verde */ -+ COUNTRY_CHPLAN_ENT("CX", 0x45, 1), /* Christmas Island (Australia) */ -+ COUNTRY_CHPLAN_ENT("CY", 0x26, 1), /* Cyprus */ -+ COUNTRY_CHPLAN_ENT("CZ", 0x26, 1), /* Czech Republic */ -+ COUNTRY_CHPLAN_ENT("DE", 0x26, 1), /* Germany */ -+ COUNTRY_CHPLAN_ENT("DJ", 0x26, 1), /* Djibouti */ -+ COUNTRY_CHPLAN_ENT("DK", 0x26, 1), /* Denmark */ -+ COUNTRY_CHPLAN_ENT("DM", 0x76, 1), /* Dominica */ -+ COUNTRY_CHPLAN_ENT("DO", 0x76, 1), /* Dominican Republic */ -+ COUNTRY_CHPLAN_ENT("DZ", 0x00, 1), /* Algeria */ -+ COUNTRY_CHPLAN_ENT("EC", 0x76, 1), /* Ecuador */ -+ COUNTRY_CHPLAN_ENT("EE", 0x26, 1), /* Estonia */ -+ COUNTRY_CHPLAN_ENT("EG", 0x47, 1), /* Egypt */ -+ COUNTRY_CHPLAN_ENT("EH", 0x47, 1), /* Western Sahara */ -+ COUNTRY_CHPLAN_ENT("ER", 0x26, 1), /* Eritrea */ -+ COUNTRY_CHPLAN_ENT("ES", 0x26, 1), /* Spain, Canary Islands, Ceuta, Melilla */ -+ COUNTRY_CHPLAN_ENT("ET", 0x26, 1), /* Ethiopia */ -+ COUNTRY_CHPLAN_ENT("FI", 0x26, 1), /* Finland */ -+ COUNTRY_CHPLAN_ENT("FJ", 0x76, 1), /* Fiji */ -+ COUNTRY_CHPLAN_ENT("FK", 0x26, 1), /* Falkland Islands (Islas Malvinas) (UK) */ -+ COUNTRY_CHPLAN_ENT("FM", 0x76, 1), /* Micronesia, Federated States of (USA) */ -+ COUNTRY_CHPLAN_ENT("FO", 0x26, 1), /* Faroe Islands (Denmark) */ -+ COUNTRY_CHPLAN_ENT("FR", 0x26, 1), /* France */ -+ COUNTRY_CHPLAN_ENT("GA", 0x26, 1), /* Gabon */ -+ COUNTRY_CHPLAN_ENT("GB", 0x26, 1), /* Great Britain (United Kingdom; England) */ -+ COUNTRY_CHPLAN_ENT("GD", 0x76, 1), /* Grenada */ -+ COUNTRY_CHPLAN_ENT("GE", 0x26, 1), /* Georgia */ -+ COUNTRY_CHPLAN_ENT("GF", 0x26, 1), /* French Guiana */ -+ COUNTRY_CHPLAN_ENT("GG", 0x26, 1), /* Guernsey (UK) */ -+ COUNTRY_CHPLAN_ENT("GH", 0x26, 1), /* Ghana */ -+ COUNTRY_CHPLAN_ENT("GI", 0x26, 1), /* Gibraltar (UK) */ -+ COUNTRY_CHPLAN_ENT("GL", 0x26, 1), /* Greenland (Denmark) */ -+ COUNTRY_CHPLAN_ENT("GM", 0x26, 1), /* Gambia */ -+ COUNTRY_CHPLAN_ENT("GN", 0x26, 1), /* Guinea */ -+ COUNTRY_CHPLAN_ENT("GP", 0x26, 1), /* Guadeloupe (France) */ -+ COUNTRY_CHPLAN_ENT("GQ", 0x26, 1), /* Equatorial Guinea */ -+ COUNTRY_CHPLAN_ENT("GR", 0x26, 1), /* Greece */ -+ COUNTRY_CHPLAN_ENT("GS", 0x26, 1), /* South Georgia and the Sandwich Islands (UK) */ -+ COUNTRY_CHPLAN_ENT("GT", 0x61, 1), /* Guatemala */ -+ COUNTRY_CHPLAN_ENT("GU", 0x76, 1), /* Guam (USA) */ -+ COUNTRY_CHPLAN_ENT("GW", 0x26, 1), /* Guinea-Bissau */ -+ COUNTRY_CHPLAN_ENT("GY", 0x44, 1), /* Guyana */ -+ COUNTRY_CHPLAN_ENT("HK", 0x35, 1), /* Hong Kong */ -+ COUNTRY_CHPLAN_ENT("HM", 0x45, 1), /* Heard and McDonald Islands (Australia) */ -+ COUNTRY_CHPLAN_ENT("HN", 0x32, 1), /* Honduras */ -+ COUNTRY_CHPLAN_ENT("HR", 0x26, 1), /* Croatia */ -+ COUNTRY_CHPLAN_ENT("HT", 0x76, 1), /* Haiti */ -+ COUNTRY_CHPLAN_ENT("HU", 0x26, 1), /* Hungary */ -+ COUNTRY_CHPLAN_ENT("ID", 0x5D, 1), /* Indonesia */ -+ COUNTRY_CHPLAN_ENT("IE", 0x26, 1), /* Ireland */ -+ COUNTRY_CHPLAN_ENT("IL", 0x47, 1), /* Israel */ -+ COUNTRY_CHPLAN_ENT("IM", 0x26, 1), /* Isle of Man (UK) */ -+ COUNTRY_CHPLAN_ENT("IN", 0x48, 1), /* India */ -+ COUNTRY_CHPLAN_ENT("IO", 0x26, 1), /* British Indian Ocean Territory (UK) */ -+ COUNTRY_CHPLAN_ENT("IQ", 0x26, 1), /* Iraq */ -+ COUNTRY_CHPLAN_ENT("IR", 0x26, 0), /* Iran */ -+ COUNTRY_CHPLAN_ENT("IS", 0x26, 1), /* Iceland */ -+ COUNTRY_CHPLAN_ENT("IT", 0x26, 1), /* Italy */ -+ COUNTRY_CHPLAN_ENT("JE", 0x26, 1), /* Jersey (UK) */ -+ COUNTRY_CHPLAN_ENT("JM", 0x32, 1), /* Jamaica */ -+ COUNTRY_CHPLAN_ENT("JO", 0x49, 1), /* Jordan */ -+ COUNTRY_CHPLAN_ENT("JP", 0x27, 1), /* Japan- Telec */ -+ COUNTRY_CHPLAN_ENT("KE", 0x47, 1), /* Kenya */ -+ COUNTRY_CHPLAN_ENT("KG", 0x26, 1), /* Kyrgyzstan */ -+ COUNTRY_CHPLAN_ENT("KH", 0x26, 1), /* Cambodia */ -+ COUNTRY_CHPLAN_ENT("KI", 0x26, 1), /* Kiribati */ -+ COUNTRY_CHPLAN_ENT("KM", 0x26, 1), /* Comoros */ -+ COUNTRY_CHPLAN_ENT("KN", 0x76, 1), /* Saint Kitts and Nevis */ -+ COUNTRY_CHPLAN_ENT("KR", 0x4B, 1), /* South Korea */ -+ COUNTRY_CHPLAN_ENT("KW", 0x26, 1), /* Kuwait */ -+ COUNTRY_CHPLAN_ENT("KY", 0x76, 1), /* Cayman Islands (UK) */ -+ COUNTRY_CHPLAN_ENT("KZ", 0x26, 1), /* Kazakhstan */ -+ COUNTRY_CHPLAN_ENT("LA", 0x26, 1), /* Laos */ -+ COUNTRY_CHPLAN_ENT("LB", 0x26, 1), /* Lebanon */ -+ COUNTRY_CHPLAN_ENT("LC", 0x76, 1), /* Saint Lucia */ -+ COUNTRY_CHPLAN_ENT("LI", 0x26, 1), /* Liechtenstein */ -+ COUNTRY_CHPLAN_ENT("LK", 0x26, 1), /* Sri Lanka */ -+ COUNTRY_CHPLAN_ENT("LR", 0x26, 1), /* Liberia */ -+ COUNTRY_CHPLAN_ENT("LS", 0x26, 1), /* Lesotho */ -+ COUNTRY_CHPLAN_ENT("LT", 0x26, 1), /* Lithuania */ -+ COUNTRY_CHPLAN_ENT("LU", 0x26, 1), /* Luxembourg */ -+ COUNTRY_CHPLAN_ENT("LV", 0x26, 1), /* Latvia */ -+ COUNTRY_CHPLAN_ENT("LY", 0x26, 1), /* Libya */ -+ COUNTRY_CHPLAN_ENT("MA", 0x47, 1), /* Morocco */ -+ COUNTRY_CHPLAN_ENT("MC", 0x26, 1), /* Monaco */ -+ COUNTRY_CHPLAN_ENT("MD", 0x26, 1), /* Moldova */ -+ COUNTRY_CHPLAN_ENT("ME", 0x26, 1), /* Montenegro */ -+ COUNTRY_CHPLAN_ENT("MF", 0x76, 1), /* Saint Martin */ -+ COUNTRY_CHPLAN_ENT("MG", 0x26, 1), /* Madagascar */ -+ COUNTRY_CHPLAN_ENT("MH", 0x76, 1), /* Marshall Islands (USA) */ -+ COUNTRY_CHPLAN_ENT("MK", 0x26, 1), /* Republic of Macedonia (FYROM) */ -+ COUNTRY_CHPLAN_ENT("ML", 0x26, 1), /* Mali */ -+ COUNTRY_CHPLAN_ENT("MM", 0x26, 1), /* Burma (Myanmar) */ -+ COUNTRY_CHPLAN_ENT("MN", 0x26, 1), /* Mongolia */ -+ COUNTRY_CHPLAN_ENT("MO", 0x35, 1), /* Macau */ -+ COUNTRY_CHPLAN_ENT("MP", 0x76, 1), /* Northern Mariana Islands (USA) */ -+ COUNTRY_CHPLAN_ENT("MQ", 0x26, 1), /* Martinique (France) */ -+ COUNTRY_CHPLAN_ENT("MR", 0x26, 1), /* Mauritania */ -+ COUNTRY_CHPLAN_ENT("MS", 0x26, 1), /* Montserrat (UK) */ -+ COUNTRY_CHPLAN_ENT("MT", 0x26, 1), /* Malta */ -+ COUNTRY_CHPLAN_ENT("MU", 0x26, 1), /* Mauritius */ -+ COUNTRY_CHPLAN_ENT("MV", 0x47, 1), /* Maldives */ -+ COUNTRY_CHPLAN_ENT("MW", 0x26, 1), /* Malawi */ -+ COUNTRY_CHPLAN_ENT("MX", 0x4D, 1), /* Mexico */ -+ COUNTRY_CHPLAN_ENT("MY", 0x63, 1), /* Malaysia */ -+ COUNTRY_CHPLAN_ENT("MZ", 0x26, 1), /* Mozambique */ -+ COUNTRY_CHPLAN_ENT("NA", 0x26, 1), /* Namibia */ -+ COUNTRY_CHPLAN_ENT("NC", 0x26, 1), /* New Caledonia */ -+ COUNTRY_CHPLAN_ENT("NE", 0x26, 1), /* Niger */ -+ COUNTRY_CHPLAN_ENT("NF", 0x45, 1), /* Norfolk Island (Australia) */ -+ COUNTRY_CHPLAN_ENT("NG", 0x75, 1), /* Nigeria */ -+ COUNTRY_CHPLAN_ENT("NI", 0x76, 1), /* Nicaragua */ -+ COUNTRY_CHPLAN_ENT("NL", 0x26, 1), /* Netherlands */ -+ COUNTRY_CHPLAN_ENT("NO", 0x26, 1), /* Norway */ -+ COUNTRY_CHPLAN_ENT("NP", 0x48, 1), /* Nepal */ -+ COUNTRY_CHPLAN_ENT("NR", 0x26, 1), /* Nauru */ -+ COUNTRY_CHPLAN_ENT("NU", 0x45, 1), /* Niue */ -+ COUNTRY_CHPLAN_ENT("NZ", 0x45, 1), /* New Zealand */ -+ COUNTRY_CHPLAN_ENT("OM", 0x26, 1), /* Oman */ -+ COUNTRY_CHPLAN_ENT("PA", 0x76, 1), /* Panama */ -+ COUNTRY_CHPLAN_ENT("PE", 0x76, 1), /* Peru */ -+ COUNTRY_CHPLAN_ENT("PF", 0x26, 1), /* French Polynesia (France) */ -+ COUNTRY_CHPLAN_ENT("PG", 0x35, 1), /* Papua New Guinea */ -+ COUNTRY_CHPLAN_ENT("PH", 0x35, 1), /* Philippines */ -+ COUNTRY_CHPLAN_ENT("PK", 0x51, 1), /* Pakistan */ -+ COUNTRY_CHPLAN_ENT("PL", 0x26, 1), /* Poland */ -+ COUNTRY_CHPLAN_ENT("PM", 0x26, 1), /* Saint Pierre and Miquelon (France) */ -+ COUNTRY_CHPLAN_ENT("PR", 0x76, 1), /* Puerto Rico */ -+ COUNTRY_CHPLAN_ENT("PT", 0x26, 1), /* Portugal */ -+ COUNTRY_CHPLAN_ENT("PW", 0x76, 1), /* Palau */ -+ COUNTRY_CHPLAN_ENT("PY", 0x76, 1), /* Paraguay */ -+ COUNTRY_CHPLAN_ENT("QA", 0x35, 1), /* Qatar */ -+ COUNTRY_CHPLAN_ENT("RE", 0x26, 1), /* Reunion (France) */ -+ COUNTRY_CHPLAN_ENT("RO", 0x26, 1), /* Romania */ -+ COUNTRY_CHPLAN_ENT("RS", 0x26, 1), /* Serbia, Kosovo */ -+ COUNTRY_CHPLAN_ENT("RU", 0x59, 1), /* Russia(fac/gost), Kaliningrad */ -+ COUNTRY_CHPLAN_ENT("RW", 0x26, 1), /* Rwanda */ -+ COUNTRY_CHPLAN_ENT("SA", 0x35, 1), /* Saudi Arabia */ -+ COUNTRY_CHPLAN_ENT("SB", 0x26, 1), /* Solomon Islands */ -+ COUNTRY_CHPLAN_ENT("SC", 0x76, 1), /* Seychelles */ -+ COUNTRY_CHPLAN_ENT("SE", 0x26, 1), /* Sweden */ -+ COUNTRY_CHPLAN_ENT("SG", 0x35, 1), /* Singapore */ -+ COUNTRY_CHPLAN_ENT("SH", 0x26, 1), /* Saint Helena (UK) */ -+ COUNTRY_CHPLAN_ENT("SI", 0x26, 1), /* Slovenia */ -+ COUNTRY_CHPLAN_ENT("SJ", 0x26, 1), /* Svalbard (Norway) */ -+ COUNTRY_CHPLAN_ENT("SK", 0x26, 1), /* Slovakia */ -+ COUNTRY_CHPLAN_ENT("SL", 0x26, 1), /* Sierra Leone */ -+ COUNTRY_CHPLAN_ENT("SM", 0x26, 1), /* San Marino */ -+ COUNTRY_CHPLAN_ENT("SN", 0x26, 1), /* Senegal */ -+ COUNTRY_CHPLAN_ENT("SO", 0x26, 1), /* Somalia */ -+ COUNTRY_CHPLAN_ENT("SR", 0x74, 1), /* Suriname */ -+ COUNTRY_CHPLAN_ENT("ST", 0x76, 1), /* Sao Tome and Principe */ -+ COUNTRY_CHPLAN_ENT("SV", 0x30, 1), /* El Salvador */ -+ COUNTRY_CHPLAN_ENT("SX", 0x76, 1), /* Sint Marteen */ -+ COUNTRY_CHPLAN_ENT("SZ", 0x26, 1), /* Swaziland */ -+ COUNTRY_CHPLAN_ENT("TC", 0x26, 1), /* Turks and Caicos Islands (UK) */ -+ COUNTRY_CHPLAN_ENT("TD", 0x26, 1), /* Chad */ -+ COUNTRY_CHPLAN_ENT("TF", 0x26, 1), /* French Southern and Antarctic Lands (FR Southern Territories) */ -+ COUNTRY_CHPLAN_ENT("TG", 0x26, 1), /* Togo */ -+ COUNTRY_CHPLAN_ENT("TH", 0x35, 1), /* Thailand */ -+ COUNTRY_CHPLAN_ENT("TJ", 0x26, 1), /* Tajikistan */ -+ COUNTRY_CHPLAN_ENT("TK", 0x45, 1), /* Tokelau */ -+ COUNTRY_CHPLAN_ENT("TM", 0x26, 1), /* Turkmenistan */ -+ COUNTRY_CHPLAN_ENT("TN", 0x47, 1), /* Tunisia */ -+ COUNTRY_CHPLAN_ENT("TO", 0x26, 1), /* Tonga */ -+ COUNTRY_CHPLAN_ENT("TR", 0x26, 1), /* Turkey, Northern Cyprus */ -+ COUNTRY_CHPLAN_ENT("TT", 0x76, 1), /* Trinidad & Tobago */ -+ COUNTRY_CHPLAN_ENT("TV", 0x21, 0), /* Tuvalu */ -+ COUNTRY_CHPLAN_ENT("TW", 0x76, 1), /* Taiwan */ -+ COUNTRY_CHPLAN_ENT("TZ", 0x26, 1), /* Tanzania */ -+ COUNTRY_CHPLAN_ENT("UA", 0x35, 1), /* Ukraine */ -+ COUNTRY_CHPLAN_ENT("UG", 0x26, 1), /* Uganda */ -+ COUNTRY_CHPLAN_ENT("US", 0x76, 1), /* United States of America (USA) */ -+ COUNTRY_CHPLAN_ENT("UY", 0x30, 1), /* Uruguay */ -+ COUNTRY_CHPLAN_ENT("UZ", 0x47, 1), /* Uzbekistan */ -+ COUNTRY_CHPLAN_ENT("VA", 0x26, 1), /* Holy See (Vatican City) */ -+ COUNTRY_CHPLAN_ENT("VC", 0x76, 1), /* Saint Vincent and the Grenadines */ -+ COUNTRY_CHPLAN_ENT("VE", 0x30, 1), /* Venezuela */ -+ COUNTRY_CHPLAN_ENT("VG", 0x76, 1), /* British Virgin Islands (UK) */ -+ COUNTRY_CHPLAN_ENT("VI", 0x76, 1), /* United States Virgin Islands (USA) */ -+ COUNTRY_CHPLAN_ENT("VN", 0x35, 1), /* Vietnam */ -+ COUNTRY_CHPLAN_ENT("VU", 0x26, 1), /* Vanuatu */ -+ COUNTRY_CHPLAN_ENT("WF", 0x26, 1), /* Wallis and Futuna (France) */ -+ COUNTRY_CHPLAN_ENT("WS", 0x76, 1), /* Samoa */ -+ COUNTRY_CHPLAN_ENT("YE", 0x26, 1), /* Yemen */ -+ COUNTRY_CHPLAN_ENT("YT", 0x26, 1), /* Mayotte (France) */ -+ COUNTRY_CHPLAN_ENT("ZA", 0x35, 1), /* South Africa */ -+ COUNTRY_CHPLAN_ENT("ZM", 0x26, 1), /* Zambia */ -+ COUNTRY_CHPLAN_ENT("ZW", 0x26, 1), /* Zimbabwe */ -+}; -+#endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT or newest */ -+ -+/* -+* rtw_get_chplan_from_country - -+* @country_code: string of country code -+* -+* Return pointer of struct country_chplan entry or NULL when unsupported country_code is given -+*/ -+const struct country_chplan *rtw_get_chplan_from_country(const char *country_code) -+{ -+ const struct country_chplan *ent = NULL; -+ const struct country_chplan *map = NULL; -+ u16 map_sz = 0; -+ char code[2]; -+ int i; -+ -+ code[0] = alpha_to_upper(country_code[0]); -+ code[1] = alpha_to_upper(country_code[1]); -+ -+#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP -+ map = CUSTOMIZED_country_chplan_map; -+ map_sz = sizeof(CUSTOMIZED_country_chplan_map) / sizeof(struct country_chplan); -+#elif RTW_DEF_MODULE_REGULATORY_CERT -+ map_sz = rtw_def_module_country_chplan_map(&map); -+#else -+ map = country_chplan_map; -+ map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan); -+#endif -+ -+ for (i = 0; i < map_sz; i++) { -+ if (strncmp(code, map[i].alpha2, 2) == 0) { -+ ent = &map[i]; -+ break; -+ } -+ } -+ -+ return ent; -+} -+ -+void dump_country_chplan(void *sel, const struct country_chplan *ent) -+{ -+ char buf[16]; -+ -+ if (ent->chplan == RTW_CHPLAN_UNSPECIFIED) -+ sprintf(buf, "NA"); -+ else -+ sprintf(buf, "0x%02X", ent->chplan); -+ -+ RTW_PRINT_SEL(sel, "\"%c%c\", %s%s\n" -+ , ent->alpha2[0], ent->alpha2[1], buf -+ , COUNTRY_CHPLAN_EN_11AC(ent) ? " ac" : "" -+ ); -+} -+ -+void dump_country_chplan_map(void *sel) -+{ -+ const struct country_chplan *ent; -+ u8 code[2]; -+ -+#if RTW_DEF_MODULE_REGULATORY_CERT -+ RTW_PRINT_SEL(sel, "RTW_DEF_MODULE_REGULATORY_CERT:0x%x\n", RTW_DEF_MODULE_REGULATORY_CERT); -+#endif -+#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP -+ RTW_PRINT_SEL(sel, "CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP\n"); -+#endif -+ -+ for (code[0] = 'A'; code[0] <= 'Z'; code[0]++) { -+ for (code[1] = 'A'; code[1] <= 'Z'; code[1]++) { -+ ent = rtw_get_chplan_from_country(code); -+ if (!ent) -+ continue; -+ -+ dump_country_chplan(sel, ent); -+ } -+ } -+} -+ -+void dump_chplan_id_list(void *sel) -+{ -+ u8 first = 1; -+ int i; -+ -+ for (i = 0; i < RTW_ChannelPlanMap_size; i++) { -+ if (!rtw_is_channel_plan_valid(i)) -+ continue; -+ -+ if (first) { -+ RTW_PRINT_SEL(sel, "0x%02X ", i); -+ first = 0; -+ } else -+ _RTW_PRINT_SEL(sel, "0x%02X ", i); -+ } -+} -+ -+#ifdef CONFIG_RTW_DEBUG -+void dump_chplan_test(void *sel) -+{ -+ int i, j; -+ -+ /* check redundent */ -+ for (i = 0; i < RTW_CHD_2G_MAX; i++) { -+ for (j = 0; j < i; j++) { -+ if (CH_LIST_LEN(rtw_channel_def_2g[i]) == CH_LIST_LEN(rtw_channel_def_2g[j]) -+ && _rtw_memcmp(&CH_LIST_CH(rtw_channel_def_2g[i], 0), &CH_LIST_CH(rtw_channel_def_2g[j], 0), CH_LIST_LEN(rtw_channel_def_2g[i]) + 1) == _TRUE) -+ RTW_PRINT_SEL(sel, "2G chd:%u and %u is the same\n", i, j); -+ } -+ } -+ -+ /* check invalid channel */ -+ for (i = 0; i < RTW_CHD_2G_MAX; i++) { -+ for (j = 0; j < CH_LIST_LEN(rtw_channel_def_2g[i]); j++) { -+ if (rtw_ch2freq(CH_LIST_CH(rtw_channel_def_2g[i], j)) == 0) -+ RTW_PRINT_SEL(sel, "2G invalid ch:%u at (%d,%d)\n", CH_LIST_CH(rtw_channel_def_2g[i], j), i, j); -+ } -+ } -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ /* check redundent */ -+ for (i = 0; i < RTW_CHD_5G_MAX; i++) { -+ for (j = 0; j < i; j++) { -+ if (CH_LIST_LEN(rtw_channel_def_5g[i]) == CH_LIST_LEN(rtw_channel_def_5g[j]) -+ && _rtw_memcmp(&CH_LIST_CH(rtw_channel_def_5g[i], 0), &CH_LIST_CH(rtw_channel_def_5g[j], 0), CH_LIST_LEN(rtw_channel_def_5g[i]) + 1) == _TRUE) -+ RTW_PRINT_SEL(sel, "5G chd:%u and %u is the same\n", i, j); -+ } -+ } -+ -+ /* check invalid channel */ -+ for (i = 0; i < RTW_CHD_5G_MAX; i++) { -+ for (j = 0; j < CH_LIST_LEN(rtw_channel_def_5g[i]); j++) { -+ if (rtw_ch2freq(CH_LIST_CH(rtw_channel_def_5g[i], j)) == 0) -+ RTW_PRINT_SEL(sel, "5G invalid ch:%u at (%d,%d)\n", CH_LIST_CH(rtw_channel_def_5g[i], j), i, j); -+ } -+ } -+#endif -+ -+ /* check redundent */ -+ for (i = 0; i < RTW_ChannelPlanMap_size; i++) { -+ if (!rtw_is_channel_plan_valid(i)) -+ continue; -+ for (j = 0; j < i; j++) { -+ if (!rtw_is_channel_plan_valid(j)) -+ continue; -+ if (_rtw_memcmp(&RTW_ChannelPlanMap[i], &RTW_ChannelPlanMap[j], sizeof(RTW_ChannelPlanMap[i])) == _TRUE) -+ RTW_PRINT_SEL(sel, "channel plan 0x%02x and 0x%02x is the same\n", i, j); -+ } -+ } -+} -+#endif /* CONFIG_RTW_DEBUG */ -+ -+void dump_chplan_ver(void *sel) -+{ -+ RTW_PRINT_SEL(sel, "%s%s-%s\n", RTW_DOMAIN_MAP_VER, RTW_DOMAIN_MAP_M_VER, RTW_COUNTRY_MAP_VER); -+} -diff --git a/drivers/staging/rtl8723cs/core/rtw_chplan.h b/drivers/staging/rtl8723cs/core/rtw_chplan.h -new file mode 100644 -index 000000000000..f7802395857a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_chplan.h -@@ -0,0 +1,95 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2018 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_CHPLAN_H__ -+#define __RTW_CHPLAN_H__ -+ -+#define RTW_CHPLAN_UNSPECIFIED 0xFF -+ -+u8 rtw_chplan_get_default_regd(u8 id); -+bool rtw_chplan_is_empty(u8 id); -+bool rtw_is_channel_plan_valid(u8 id); -+bool rtw_regsty_is_excl_chs(struct registry_priv *regsty, u8 ch); -+ -+enum regd_src_t { -+ REGD_SRC_RTK_PRIV = 0, /* Regulatory settings from Realtek framework (Realtek defined or customized) */ -+ REGD_SRC_OS = 1, /* Regulatory settings from OS */ -+ REGD_SRC_NUM, -+}; -+ -+#define regd_src_is_valid(src) ((src) < REGD_SRC_NUM) -+ -+extern const char *_regd_src_str[]; -+#define regd_src_str(src) ((src) >= REGD_SRC_NUM ? _regd_src_str[REGD_SRC_NUM] : _regd_src_str[src]) -+ -+struct _RT_CHANNEL_INFO; -+u8 init_channel_set(_adapter *adapter); -+bool rtw_chset_is_dfs_range(struct _RT_CHANNEL_INFO *chset, u32 hi, u32 lo); -+bool rtw_chset_is_dfs_ch(struct _RT_CHANNEL_INFO *chset, u8 ch); -+bool rtw_chset_is_dfs_chbw(struct _RT_CHANNEL_INFO *chset, u8 ch, u8 bw, u8 offset); -+u8 rtw_process_beacon_hint(_adapter *adapter, WLAN_BSSID_EX *bss); -+ -+#define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF) -+#define IS_ALPHA2_WORLDWIDE(_alpha2) (strncmp(_alpha2, "00", 2) == 0) -+ -+#define RTW_MODULE_RTL8821AE_HMC_M2 BIT0 /* RTL8821AE(HMC + M.2) */ -+#define RTW_MODULE_RTL8821AU BIT1 /* RTL8821AU */ -+#define RTW_MODULE_RTL8812AENF_NGFF BIT2 /* RTL8812AENF(8812AE+8761)_NGFF */ -+#define RTW_MODULE_RTL8812AEBT_HMC BIT3 /* RTL8812AEBT(8812AE+8761)_HMC */ -+#define RTW_MODULE_RTL8188EE_HMC_M2 BIT4 /* RTL8188EE(HMC + M.2) */ -+#define RTW_MODULE_RTL8723BE_HMC_M2 BIT5 /* RTL8723BE(HMC + M.2) */ -+#define RTW_MODULE_RTL8723BS_NGFF1216 BIT6 /* RTL8723BS(NGFF1216) */ -+#define RTW_MODULE_RTL8192EEBT_HMC_M2 BIT7 /* RTL8192EEBT(8192EE+8761AU)_(HMC + M.2) */ -+#define RTW_MODULE_RTL8723DE_NGFF1630 BIT8 /* RTL8723DE(NGFF1630) */ -+#define RTW_MODULE_RTL8822BE BIT9 /* RTL8822BE */ -+#define RTW_MODULE_RTL8821CE BIT10 /* RTL8821CE */ -+#define RTW_MODULE_RTL8822CE BIT11 /* RTL8822CE */ -+ -+enum rtw_dfs_regd { -+ RTW_DFS_REGD_NONE = 0, -+ RTW_DFS_REGD_FCC = 1, -+ RTW_DFS_REGD_MKK = 2, -+ RTW_DFS_REGD_ETSI = 3, -+ RTW_DFS_REGD_NUM, -+ RTW_DFS_REGD_AUTO = 0xFF, /* follow channel plan */ -+}; -+ -+extern const char *_rtw_dfs_regd_str[]; -+#define rtw_dfs_regd_str(region) (((region) >= RTW_DFS_REGD_NUM) ? _rtw_dfs_regd_str[RTW_DFS_REGD_NONE] : _rtw_dfs_regd_str[(region)]) -+ -+struct country_chplan { -+ char alpha2[2]; /* "00" means worldwide */ -+ u8 chplan; -+#ifdef CONFIG_80211AC_VHT -+ u8 en_11ac; -+#endif -+}; -+ -+#ifdef CONFIG_80211AC_VHT -+#define COUNTRY_CHPLAN_EN_11AC(_ent) ((_ent)->en_11ac) -+#else -+#define COUNTRY_CHPLAN_EN_11AC(_ent) 0 -+#endif -+ -+const struct country_chplan *rtw_get_chplan_from_country(const char *country_code); -+ -+void dump_country_chplan(void *sel, const struct country_chplan *ent); -+void dump_country_chplan_map(void *sel); -+void dump_chplan_id_list(void *sel); -+#ifdef CONFIG_RTW_DEBUG -+void dump_chplan_test(void *sel); -+#endif -+void dump_chplan_ver(void *sel); -+ -+#endif /* __RTW_CHPLAN_H__ */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_cmd.c b/drivers/staging/rtl8723cs/core/rtw_cmd.c -new file mode 100644 -index 000000000000..e43ee97793d0 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_cmd.c -@@ -0,0 +1,5675 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_CMD_C_ -+ -+#include -+#include -+ -+#ifndef DBG_CMD_EXECUTE -+ #define DBG_CMD_EXECUTE 0 -+#endif -+ -+/* -+Caller and the rtw_cmd_thread can protect cmd_q by spin_lock. -+No irqsave is necessary. -+*/ -+ -+sint _rtw_init_cmd_priv(struct cmd_priv *pcmdpriv) -+{ -+ sint res = _SUCCESS; -+ -+ -+ _rtw_init_sema(&(pcmdpriv->cmd_queue_sema), 0); -+ /* _rtw_init_sema(&(pcmdpriv->cmd_done_sema), 0); */ -+ _rtw_init_sema(&(pcmdpriv->start_cmdthread_sema), 0); -+ -+ _rtw_init_queue(&(pcmdpriv->cmd_queue)); -+ -+ /* allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf */ -+ -+ pcmdpriv->cmd_seq = 1; -+ -+ pcmdpriv->cmd_allocated_buf = rtw_zmalloc(MAX_CMDSZ + CMDBUFF_ALIGN_SZ); -+ -+ if (pcmdpriv->cmd_allocated_buf == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pcmdpriv->cmd_buf = pcmdpriv->cmd_allocated_buf + CMDBUFF_ALIGN_SZ - ((SIZE_PTR)(pcmdpriv->cmd_allocated_buf) & (CMDBUFF_ALIGN_SZ - 1)); -+ -+ pcmdpriv->rsp_allocated_buf = rtw_zmalloc(MAX_RSPSZ + 4); -+ -+ if (pcmdpriv->rsp_allocated_buf == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pcmdpriv->rsp_buf = pcmdpriv->rsp_allocated_buf + 4 - ((SIZE_PTR)(pcmdpriv->rsp_allocated_buf) & 3); -+ -+ pcmdpriv->cmd_issued_cnt = pcmdpriv->cmd_done_cnt = pcmdpriv->rsp_cnt = 0; -+ -+ _rtw_mutex_init(&pcmdpriv->sctx_mutex); -+exit: -+ -+ -+ return res; -+ -+} -+ -+#ifdef CONFIG_C2H_WK -+static void c2h_wk_callback(_workitem *work) -+{ -+ struct evt_priv *evtpriv = container_of(work, struct evt_priv, c2h_wk); -+ _adapter *adapter = container_of(evtpriv, _adapter, evtpriv); -+ u8 *c2h_evt; -+ c2h_id_filter direct_hdl_filter = rtw_hal_c2h_id_handle_directly; -+ u8 id, seq, plen; -+ u8 *payload; -+ -+ evtpriv->c2h_wk_alive = _TRUE; -+ -+ while (!rtw_cbuf_empty(evtpriv->c2h_queue)) { -+ c2h_evt = (u8 *)rtw_cbuf_pop(evtpriv->c2h_queue); -+ if (c2h_evt != NULL) { -+ /* This C2H event is read, clear it */ -+ c2h_evt_clear(adapter); -+ } else { -+ c2h_evt = (u8 *)rtw_malloc(C2H_REG_LEN); -+ if (c2h_evt == NULL) { -+ rtw_warn_on(1); -+ continue; -+ } -+ -+ /* This C2H event is not read, read & clear now */ -+ if (rtw_hal_c2h_evt_read(adapter, c2h_evt) != _SUCCESS) { -+ rtw_mfree(c2h_evt, C2H_REG_LEN); -+ continue; -+ } -+ } -+ -+ /* Special pointer to trigger c2h_evt_clear only */ -+ if ((void *)c2h_evt == (void *)evtpriv) -+ continue; -+ -+ if (!rtw_hal_c2h_valid(adapter, c2h_evt) -+ || rtw_hal_c2h_reg_hdr_parse(adapter, c2h_evt, &id, &seq, &plen, &payload) != _SUCCESS -+ ) { -+ rtw_mfree(c2h_evt, C2H_REG_LEN); -+ continue; -+ } -+ -+ if (direct_hdl_filter(adapter, id, seq, plen, payload) == _TRUE) { -+ /* Handle directly */ -+ rtw_hal_c2h_handler(adapter, id, seq, plen, payload); -+ rtw_mfree(c2h_evt, C2H_REG_LEN); -+ } else { -+ /* Enqueue into cmd_thread for others */ -+ rtw_c2h_reg_wk_cmd(adapter, c2h_evt); -+ rtw_mfree(c2h_evt, C2H_REG_LEN); -+ } -+ } -+ -+ evtpriv->c2h_wk_alive = _FALSE; -+} -+#endif /* CONFIG_C2H_WK */ -+ -+sint _rtw_init_evt_priv(struct evt_priv *pevtpriv) -+{ -+ sint res = _SUCCESS; -+ -+ -+#ifdef CONFIG_H2CLBK -+ _rtw_init_sema(&(pevtpriv->lbkevt_done), 0); -+ pevtpriv->lbkevt_limit = 0; -+ pevtpriv->lbkevt_num = 0; -+ pevtpriv->cmdevt_parm = NULL; -+#endif -+ -+ /* allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf */ -+ ATOMIC_SET(&pevtpriv->event_seq, 0); -+ pevtpriv->evt_done_cnt = 0; -+ -+#ifdef CONFIG_EVENT_THREAD_MODE -+ -+ _rtw_init_sema(&(pevtpriv->evt_notify), 0); -+ -+ pevtpriv->evt_allocated_buf = rtw_zmalloc(MAX_EVTSZ + 4); -+ if (pevtpriv->evt_allocated_buf == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ pevtpriv->evt_buf = pevtpriv->evt_allocated_buf + 4 - ((unsigned int)(pevtpriv->evt_allocated_buf) & 3); -+ -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pevtpriv->allocated_c2h_mem = rtw_zmalloc(C2H_MEM_SZ + 4); -+ -+ if (pevtpriv->allocated_c2h_mem == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4\ -+ - ((u32)(pevtpriv->allocated_c2h_mem) & 3); -+#endif /* end of CONFIG_SDIO_HCI */ -+ -+ _rtw_init_queue(&(pevtpriv->evt_queue)); -+ -+exit: -+ -+#endif /* end of CONFIG_EVENT_THREAD_MODE */ -+ -+#ifdef CONFIG_C2H_WK -+ _init_workitem(&pevtpriv->c2h_wk, c2h_wk_callback, NULL); -+ pevtpriv->c2h_wk_alive = _FALSE; -+ pevtpriv->c2h_queue = rtw_cbuf_alloc(C2H_QUEUE_MAX_LEN + 1); -+#endif -+ -+ -+ return res; -+} -+ -+void _rtw_free_evt_priv(struct evt_priv *pevtpriv) -+{ -+ -+ -+#ifdef CONFIG_EVENT_THREAD_MODE -+ _rtw_free_sema(&(pevtpriv->evt_notify)); -+ -+ if (pevtpriv->evt_allocated_buf) -+ rtw_mfree(pevtpriv->evt_allocated_buf, MAX_EVTSZ + 4); -+#endif -+ -+#ifdef CONFIG_C2H_WK -+ _cancel_workitem_sync(&pevtpriv->c2h_wk); -+ while (pevtpriv->c2h_wk_alive) -+ rtw_msleep_os(10); -+ -+ while (!rtw_cbuf_empty(pevtpriv->c2h_queue)) { -+ void *c2h; -+ c2h = rtw_cbuf_pop(pevtpriv->c2h_queue); -+ if (c2h != NULL && c2h != (void *)pevtpriv) -+ rtw_mfree(c2h, 16); -+ } -+ rtw_cbuf_free(pevtpriv->c2h_queue); -+#endif -+ -+ -+ -+} -+ -+void _rtw_free_cmd_priv(struct cmd_priv *pcmdpriv) -+{ -+ -+ if (pcmdpriv) { -+ _rtw_spinlock_free(&(pcmdpriv->cmd_queue.lock)); -+ _rtw_free_sema(&(pcmdpriv->cmd_queue_sema)); -+ /* _rtw_free_sema(&(pcmdpriv->cmd_done_sema)); */ -+ _rtw_free_sema(&(pcmdpriv->start_cmdthread_sema)); -+ -+ if (pcmdpriv->cmd_allocated_buf) -+ rtw_mfree(pcmdpriv->cmd_allocated_buf, MAX_CMDSZ + CMDBUFF_ALIGN_SZ); -+ -+ if (pcmdpriv->rsp_allocated_buf) -+ rtw_mfree(pcmdpriv->rsp_allocated_buf, MAX_RSPSZ + 4); -+ -+ _rtw_mutex_free(&pcmdpriv->sctx_mutex); -+ } -+} -+ -+/* -+Calling Context: -+ -+rtw_enqueue_cmd can only be called between kernel thread, -+since only spin_lock is used. -+ -+ISR/Call-Back functions can't call this sub-function. -+ -+*/ -+#ifdef DBG_CMD_QUEUE -+extern u8 dump_cmd_id; -+#endif -+ -+sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj, bool to_head) -+{ -+ _irqL irqL; -+ -+ -+ if (obj == NULL) -+ goto exit; -+ -+ /* _enter_critical_bh(&queue->lock, &irqL); */ -+ _enter_critical(&queue->lock, &irqL); -+ -+ if (to_head) -+ rtw_list_insert_head(&obj->list, &queue->queue); -+ else -+ rtw_list_insert_tail(&obj->list, &queue->queue); -+ -+#ifdef DBG_CMD_QUEUE -+ if (dump_cmd_id) { -+ RTW_INFO("%s===> cmdcode:0x%02x\n", __FUNCTION__, obj->cmdcode); -+ if (obj->cmdcode == CMD_SET_MLME_EVT) { -+ if (obj->parmbuf) { -+ struct rtw_evt_header *evt_hdr = (struct rtw_evt_header *)(obj->parmbuf); -+ RTW_INFO("evt_hdr->id:%d\n", evt_hdr->id); -+ } -+ } -+ if (obj->cmdcode == CMD_SET_DRV_EXTRA) { -+ if (obj->parmbuf) { -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)(obj->parmbuf); -+ RTW_INFO("pdrvextra_cmd_parm->ec_id:0x%02x\n", pdrvextra_cmd_parm->ec_id); -+ } -+ } -+ } -+ -+ if (queue->queue.prev->next != &queue->queue) { -+ RTW_INFO("[%d] head %p, tail %p, tail->prev->next %p[tail], tail->next %p[head]\n", __LINE__, -+ &queue->queue, queue->queue.prev, queue->queue.prev->prev->next, queue->queue.prev->next); -+ -+ RTW_INFO("==========%s============\n", __FUNCTION__); -+ RTW_INFO("head:%p,obj_addr:%p\n", &queue->queue, obj); -+ RTW_INFO("padapter: %p\n", obj->padapter); -+ RTW_INFO("cmdcode: 0x%02x\n", obj->cmdcode); -+ RTW_INFO("res: %d\n", obj->res); -+ RTW_INFO("parmbuf: %p\n", obj->parmbuf); -+ RTW_INFO("cmdsz: %d\n", obj->cmdsz); -+ RTW_INFO("rsp: %p\n", obj->rsp); -+ RTW_INFO("rspsz: %d\n", obj->rspsz); -+ RTW_INFO("sctx: %p\n", obj->sctx); -+ RTW_INFO("list->next: %p\n", obj->list.next); -+ RTW_INFO("list->prev: %p\n", obj->list.prev); -+ } -+#endif /* DBG_CMD_QUEUE */ -+ -+ /* _exit_critical_bh(&queue->lock, &irqL); */ -+ _exit_critical(&queue->lock, &irqL); -+ -+exit: -+ -+ -+ return _SUCCESS; -+} -+ -+struct cmd_obj *_rtw_dequeue_cmd(_queue *queue) -+{ -+ _irqL irqL; -+ struct cmd_obj *obj; -+ -+ -+ /* _enter_critical_bh(&(queue->lock), &irqL); */ -+ _enter_critical(&queue->lock, &irqL); -+ -+#ifdef DBG_CMD_QUEUE -+ if (queue->queue.prev->next != &queue->queue) { -+ RTW_INFO("[%d] head %p, tail %p, tail->prev->next %p[tail], tail->next %p[head]\n", __LINE__, -+ &queue->queue, queue->queue.prev, queue->queue.prev->prev->next, queue->queue.prev->next); -+ } -+#endif /* DBG_CMD_QUEUE */ -+ -+ -+ if (rtw_is_list_empty(&(queue->queue))) -+ obj = NULL; -+ else { -+ obj = LIST_CONTAINOR(get_next(&(queue->queue)), struct cmd_obj, list); -+ -+#ifdef DBG_CMD_QUEUE -+ if (queue->queue.prev->next != &queue->queue) { -+ RTW_INFO("==========%s============\n", __FUNCTION__); -+ RTW_INFO("head:%p,obj_addr:%p\n", &queue->queue, obj); -+ RTW_INFO("padapter: %p\n", obj->padapter); -+ RTW_INFO("cmdcode: 0x%02x\n", obj->cmdcode); -+ RTW_INFO("res: %d\n", obj->res); -+ RTW_INFO("parmbuf: %p\n", obj->parmbuf); -+ RTW_INFO("cmdsz: %d\n", obj->cmdsz); -+ RTW_INFO("rsp: %p\n", obj->rsp); -+ RTW_INFO("rspsz: %d\n", obj->rspsz); -+ RTW_INFO("sctx: %p\n", obj->sctx); -+ RTW_INFO("list->next: %p\n", obj->list.next); -+ RTW_INFO("list->prev: %p\n", obj->list.prev); -+ } -+ -+ if (dump_cmd_id) { -+ RTW_INFO("%s===> cmdcode:0x%02x\n", __FUNCTION__, obj->cmdcode); -+ if (obj->cmdcode == CMD_SET_DRV_EXTRA) { -+ if (obj->parmbuf) { -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)(obj->parmbuf); -+ printk("pdrvextra_cmd_parm->ec_id:0x%02x\n", pdrvextra_cmd_parm->ec_id); -+ } -+ } -+ -+ } -+#endif /* DBG_CMD_QUEUE */ -+ -+ rtw_list_delete(&obj->list); -+ } -+ -+ /* _exit_critical_bh(&(queue->lock), &irqL); */ -+ _exit_critical(&queue->lock, &irqL); -+ -+ -+ return obj; -+} -+ -+u32 rtw_init_cmd_priv(struct cmd_priv *pcmdpriv) -+{ -+ u32 res; -+ res = _rtw_init_cmd_priv(pcmdpriv); -+ return res; -+} -+ -+u32 rtw_init_evt_priv(struct evt_priv *pevtpriv) -+{ -+ int res; -+ res = _rtw_init_evt_priv(pevtpriv); -+ return res; -+} -+ -+void rtw_free_evt_priv(struct evt_priv *pevtpriv) -+{ -+ _rtw_free_evt_priv(pevtpriv); -+} -+ -+void rtw_free_cmd_priv(struct cmd_priv *pcmdpriv) -+{ -+ _rtw_free_cmd_priv(pcmdpriv); -+} -+ -+int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj); -+int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) -+{ -+#ifndef CONFIG_MAC_LOOPBACK_DRIVER -+ u8 bAllow = _FALSE; /* set to _TRUE to allow enqueuing cmd when hw_init_completed is _FALSE */ -+#else -+ u8 bAllow = _TRUE; /* hw_init_completed is _FALSE in the case of MAC loopback*/ -+#endif -+ -+#ifdef SUPPORT_HW_RFOFF_DETECTED -+ /* To decide allow or not */ -+ if ((adapter_to_pwrctl(pcmdpriv->padapter)->bHWPwrPindetect) -+ && (!pcmdpriv->padapter->registrypriv.usbss_enable) -+ ) { -+ if (cmd_obj->cmdcode == CMD_SET_DRV_EXTRA) { -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)cmd_obj->parmbuf; -+ if (pdrvextra_cmd_parm->ec_id == POWER_SAVING_CTRL_WK_CID) { -+ /* RTW_INFO("==>enqueue POWER_SAVING_CTRL_WK_CID\n"); */ -+ bAllow = _TRUE; -+ } -+ } -+ } -+#endif -+ -+ if (cmd_obj->cmdcode == CMD_SET_CHANPLAN) -+ bAllow = _TRUE; -+ -+ if (cmd_obj->no_io) -+ bAllow = _TRUE; -+ -+ if ((!rtw_is_hw_init_completed(pcmdpriv->padapter) && (bAllow == _FALSE)) -+ || ATOMIC_READ(&(pcmdpriv->cmdthd_running)) == _FALSE /* com_thread not running */ -+ ) { -+ if (DBG_CMD_EXECUTE) -+ RTW_INFO(ADPT_FMT" drop "CMD_FMT" hw_init_completed:%u, cmdthd_running:%u\n", ADPT_ARG(cmd_obj->padapter) -+ , CMD_ARG(cmd_obj), rtw_get_hw_init_completed(cmd_obj->padapter), ATOMIC_READ(&pcmdpriv->cmdthd_running)); -+ if (0) -+ rtw_warn_on(1); -+ -+ return _FAIL; -+ } -+ return _SUCCESS; -+} -+ -+ -+ -+u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) -+{ -+ int res = _FAIL; -+ PADAPTER padapter = pcmdpriv->padapter; -+ -+ -+ if (cmd_obj == NULL) -+ goto exit; -+ -+ cmd_obj->padapter = padapter; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ /* change pcmdpriv to primary's pcmdpriv */ -+ if (!is_primary_adapter(padapter)) -+ pcmdpriv = &(GET_PRIMARY_ADAPTER(padapter)->cmdpriv); -+#endif -+ -+ res = rtw_cmd_filter(pcmdpriv, cmd_obj); -+ if ((_FAIL == res) || (cmd_obj->cmdsz > MAX_CMDSZ)) { -+ if (cmd_obj->cmdsz > MAX_CMDSZ) { -+ RTW_INFO("%s failed due to obj->cmdsz(%d) > MAX_CMDSZ(%d)\n", __func__, cmd_obj->cmdsz, MAX_CMDSZ); -+ rtw_warn_on(1); -+ } -+ -+ if (cmd_obj->cmdcode == CMD_SET_DRV_EXTRA) { -+ struct drvextra_cmd_parm *extra_parm = (struct drvextra_cmd_parm *)cmd_obj->parmbuf; -+ -+ if (extra_parm->pbuf && extra_parm->size > 0) -+ rtw_mfree(extra_parm->pbuf, extra_parm->size); -+ } -+ rtw_free_cmd_obj(cmd_obj); -+ goto exit; -+ } -+ -+ res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj, 0); -+ -+ if (res == _SUCCESS) -+ _rtw_up_sema(&pcmdpriv->cmd_queue_sema); -+ -+exit: -+ -+ -+ return res; -+} -+ -+struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv) -+{ -+ struct cmd_obj *cmd_obj; -+ -+ -+ cmd_obj = _rtw_dequeue_cmd(&pcmdpriv->cmd_queue); -+ -+ return cmd_obj; -+} -+ -+void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv) -+{ -+ pcmdpriv->cmd_done_cnt++; -+ /* _rtw_up_sema(&(pcmdpriv->cmd_done_sema)); */ -+} -+ -+void rtw_free_cmd_obj(struct cmd_obj *pcmd) -+{ -+ if (pcmd->parmbuf != NULL) { -+ /* free parmbuf in cmd_obj */ -+ rtw_mfree((unsigned char *)pcmd->parmbuf, pcmd->cmdsz); -+ } -+ if (pcmd->rsp != NULL) { -+ if (pcmd->rspsz != 0) { -+ /* free rsp in cmd_obj */ -+ rtw_mfree((unsigned char *)pcmd->rsp, pcmd->rspsz); -+ } -+ } -+ -+ /* free cmd_obj */ -+ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); -+} -+ -+ -+void rtw_stop_cmd_thread(_adapter *adapter) -+{ -+ if (adapter->cmdThread) { -+ _rtw_up_sema(&adapter->cmdpriv.cmd_queue_sema); -+ rtw_thread_stop(adapter->cmdThread); -+ adapter->cmdThread = NULL; -+ } -+} -+ -+thread_return rtw_cmd_thread(thread_context context) -+{ -+ u8 ret; -+ struct cmd_obj *pcmd; -+ u8 *pcmdbuf, *prspbuf; -+ systime cmd_start_time; -+ u32 cmd_process_time; -+ u8(*cmd_hdl)(_adapter *padapter, u8 *pbuf); -+ void (*pcmd_callback)(_adapter *dev, struct cmd_obj *pcmd); -+ PADAPTER padapter = (PADAPTER)context; -+ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); -+ struct drvextra_cmd_parm *extra_parm = NULL; -+ _irqL irqL; -+ -+ thread_enter("RTW_CMD_THREAD"); -+ -+ pcmdbuf = pcmdpriv->cmd_buf; -+ prspbuf = pcmdpriv->rsp_buf; -+ ATOMIC_SET(&(pcmdpriv->cmdthd_running), _TRUE); -+ _rtw_up_sema(&pcmdpriv->start_cmdthread_sema); -+ -+ -+ while (1) { -+ if (_rtw_down_sema(&pcmdpriv->cmd_queue_sema) == _FAIL) { -+ RTW_PRINT(FUNC_ADPT_FMT" _rtw_down_sema(&pcmdpriv->cmd_queue_sema) return _FAIL, break\n", FUNC_ADPT_ARG(padapter)); -+ break; -+ } -+ -+ if (RTW_CANNOT_RUN(padapter)) { -+ RTW_DBG(FUNC_ADPT_FMT "- bDriverStopped(%s) bSurpriseRemoved(%s)\n", -+ FUNC_ADPT_ARG(padapter), -+ rtw_is_drv_stopped(padapter) ? "True" : "False", -+ rtw_is_surprise_removed(padapter) ? "True" : "False"); -+ break; -+ } -+ -+ _enter_critical(&pcmdpriv->cmd_queue.lock, &irqL); -+ if (rtw_is_list_empty(&(pcmdpriv->cmd_queue.queue))) { -+ /* RTW_INFO("%s: cmd queue is empty!\n", __func__); */ -+ _exit_critical(&pcmdpriv->cmd_queue.lock, &irqL); -+ continue; -+ } -+ _exit_critical(&pcmdpriv->cmd_queue.lock, &irqL); -+ -+_next: -+ if (RTW_CANNOT_RUN(padapter)) { -+ RTW_PRINT("%s: DriverStopped(%s) SurpriseRemoved(%s) break at line %d\n", -+ __func__ -+ , rtw_is_drv_stopped(padapter) ? "True" : "False" -+ , rtw_is_surprise_removed(padapter) ? "True" : "False" -+ , __LINE__); -+ break; -+ } -+ -+ pcmd = rtw_dequeue_cmd(pcmdpriv); -+ if (!pcmd) { -+#ifdef CONFIG_LPS_LCLK -+ rtw_unregister_cmd_alive(padapter); -+#endif -+ continue; -+ } -+ -+ cmd_start_time = rtw_get_current_time(); -+ pcmdpriv->cmd_issued_cnt++; -+ -+ if (pcmd->cmdsz > MAX_CMDSZ) { -+ RTW_ERR("%s cmdsz:%d > MAX_CMDSZ:%d\n", __func__, pcmd->cmdsz, MAX_CMDSZ); -+ pcmd->res = H2C_PARAMETERS_ERROR; -+ goto post_process; -+ } -+ -+ if (pcmd->cmdcode >= (sizeof(wlancmds) / sizeof(struct rtw_cmd))) { -+ RTW_ERR("%s undefined cmdcode:%d\n", __func__, pcmd->cmdcode); -+ pcmd->res = H2C_PARAMETERS_ERROR; -+ goto post_process; -+ } -+ -+ cmd_hdl = wlancmds[pcmd->cmdcode].cmd_hdl; -+ if (!cmd_hdl) { -+ RTW_ERR("%s no cmd_hdl for cmdcode:%d\n", __func__, pcmd->cmdcode); -+ pcmd->res = H2C_PARAMETERS_ERROR; -+ goto post_process; -+ } -+ -+ if (_FAIL == rtw_cmd_filter(pcmdpriv, pcmd)) { -+ pcmd->res = H2C_DROPPED; -+ if (pcmd->cmdcode == CMD_SET_DRV_EXTRA) { -+ extra_parm = (struct drvextra_cmd_parm *)pcmd->parmbuf; -+ if (extra_parm && extra_parm->pbuf && extra_parm->size > 0) -+ rtw_mfree(extra_parm->pbuf, extra_parm->size); -+ } -+ #if CONFIG_DFS -+ else if (pcmd->cmdcode == CMD_SET_CHANSWITCH) -+ adapter_to_rfctl(padapter)->csa_ch = 0; -+ #endif -+ goto post_process; -+ } -+ -+#ifdef CONFIG_LPS_LCLK -+ if (pcmd->no_io) -+ rtw_unregister_cmd_alive(padapter); -+ else { -+ if (rtw_register_cmd_alive(padapter) != _SUCCESS) { -+ if (DBG_CMD_EXECUTE) -+ RTW_PRINT("%s: wait to leave LPS_LCLK\n", __func__); -+ -+ pcmd->res = H2C_ENQ_HEAD; -+ ret = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, pcmd, 1); -+ if (ret == _SUCCESS) { -+ if (DBG_CMD_EXECUTE) -+ RTW_INFO(ADPT_FMT" "CMD_FMT" ENQ_HEAD\n", ADPT_ARG(pcmd->padapter), CMD_ARG(pcmd)); -+ continue; -+ } -+ -+ RTW_INFO(ADPT_FMT" "CMD_FMT" ENQ_HEAD_FAIL\n", ADPT_ARG(pcmd->padapter), CMD_ARG(pcmd)); -+ pcmd->res = H2C_ENQ_HEAD_FAIL; -+ rtw_warn_on(1); -+ } -+ } -+#endif /* CONFIG_LPS_LCLK */ -+ -+ if (DBG_CMD_EXECUTE) -+ RTW_INFO(ADPT_FMT" "CMD_FMT" %sexecute\n", ADPT_ARG(pcmd->padapter), CMD_ARG(pcmd) -+ , pcmd->res == H2C_ENQ_HEAD ? "ENQ_HEAD " : (pcmd->res == H2C_ENQ_HEAD_FAIL ? "ENQ_HEAD_FAIL " : "")); -+ -+ _rtw_memcpy(pcmdbuf, pcmd->parmbuf, pcmd->cmdsz); -+ ret = cmd_hdl(pcmd->padapter, pcmdbuf); -+ pcmd->res = ret; -+ -+ pcmdpriv->cmd_seq++; -+ -+post_process: -+ -+ _enter_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL); -+ if (pcmd->sctx) { -+ if (0) -+ RTW_PRINT(FUNC_ADPT_FMT" pcmd->sctx\n", FUNC_ADPT_ARG(pcmd->padapter)); -+ if (pcmd->res == H2C_SUCCESS) -+ rtw_sctx_done(&pcmd->sctx); -+ else -+ rtw_sctx_done_err(&pcmd->sctx, RTW_SCTX_DONE_CMD_ERROR); -+ } -+ _exit_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL); -+ -+ cmd_process_time = rtw_get_passing_time_ms(cmd_start_time); -+ if (cmd_process_time > 1000) { -+ RTW_INFO(ADPT_FMT" "CMD_FMT" process_time=%d\n", ADPT_ARG(pcmd->padapter), CMD_ARG(pcmd), cmd_process_time); -+ if (0) -+ rtw_warn_on(1); -+ } -+ -+ /* call callback function for post-processed */ -+ if (pcmd->cmdcode < (sizeof(wlancmds) / sizeof(struct rtw_cmd))) -+ pcmd_callback = wlancmds[pcmd->cmdcode].callback; -+ else -+ pcmd_callback = NULL; -+ -+ if (pcmd_callback == NULL) { -+ rtw_free_cmd_obj(pcmd); -+ } else { -+ /* todo: !!! fill rsp_buf to pcmd->rsp if (pcmd->rsp!=NULL) */ -+ pcmd_callback(pcmd->padapter, pcmd);/* need conider that free cmd_obj in rtw_cmd_callback */ -+ } -+ -+ flush_signals_thread(); -+ -+ goto _next; -+ -+ } -+ -+#ifdef CONFIG_LPS_LCLK -+ rtw_unregister_cmd_alive(padapter); -+#endif -+ -+ /* to avoid enqueue cmd after free all cmd_obj */ -+ ATOMIC_SET(&(pcmdpriv->cmdthd_running), _FALSE); -+ -+ /* free all cmd_obj resources */ -+ do { -+ pcmd = rtw_dequeue_cmd(pcmdpriv); -+ if (pcmd == NULL) -+ break; -+ -+ if (0) -+ RTW_INFO("%s: leaving... drop "CMD_FMT"\n", __func__, CMD_ARG(pcmd)); -+ -+ if (pcmd->cmdcode == CMD_SET_DRV_EXTRA) { -+ extra_parm = (struct drvextra_cmd_parm *)pcmd->parmbuf; -+ if (extra_parm->pbuf && extra_parm->size > 0) -+ rtw_mfree(extra_parm->pbuf, extra_parm->size); -+ } -+ #if CONFIG_DFS -+ else if (pcmd->cmdcode == CMD_SET_CHANSWITCH) -+ adapter_to_rfctl(padapter)->csa_ch = 0; -+ #endif -+ -+ _enter_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL); -+ if (pcmd->sctx) { -+ if (0) -+ RTW_PRINT(FUNC_ADPT_FMT" pcmd->sctx\n", FUNC_ADPT_ARG(pcmd->padapter)); -+ rtw_sctx_done_err(&pcmd->sctx, RTW_SCTX_DONE_CMD_DROP); -+ } -+ _exit_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL); -+ -+ rtw_free_cmd_obj(pcmd); -+ } while (1); -+ -+ RTW_INFO(FUNC_ADPT_FMT " Exit\n", FUNC_ADPT_ARG(padapter)); -+ -+ rtw_thread_wait_stop(); -+ -+ return 0; -+} -+ -+ -+#ifdef CONFIG_EVENT_THREAD_MODE -+u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj) -+{ -+ _irqL irqL; -+ int res; -+ _queue *queue = &pevtpriv->evt_queue; -+ -+ -+ res = _SUCCESS; -+ -+ if (obj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ -+ rtw_list_insert_tail(&obj->list, &queue->queue); -+ -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+ /* rtw_evt_notify_isr(pevtpriv); */ -+ -+exit: -+ -+ -+ return res; -+} -+ -+struct evt_obj *rtw_dequeue_evt(_queue *queue) -+{ -+ _irqL irqL; -+ struct evt_obj *pevtobj; -+ -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ -+ if (rtw_is_list_empty(&(queue->queue))) -+ pevtobj = NULL; -+ else { -+ pevtobj = LIST_CONTAINOR(get_next(&(queue->queue)), struct evt_obj, list); -+ rtw_list_delete(&pevtobj->list); -+ } -+ -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+ -+ return pevtobj; -+} -+ -+void rtw_free_evt_obj(struct evt_obj *pevtobj) -+{ -+ -+ if (pevtobj->parmbuf) -+ rtw_mfree((unsigned char *)pevtobj->parmbuf, pevtobj->evtsz); -+ -+ rtw_mfree((unsigned char *)pevtobj, sizeof(struct evt_obj)); -+ -+} -+ -+void rtw_evt_notify_isr(struct evt_priv *pevtpriv) -+{ -+ pevtpriv->evt_done_cnt++; -+ _rtw_up_sema(&(pevtpriv->evt_notify)); -+} -+#endif -+ -+void rtw_init_sitesurvey_parm(_adapter *padapter, struct sitesurvey_parm *pparm) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ -+ _rtw_memset(pparm, 0, sizeof(struct sitesurvey_parm)); -+ pparm->scan_mode = pmlmepriv->scan_mode; -+} -+ -+/* -+rtw_sitesurvey_cmd(~) -+ ### NOTE:#### (!!!!) -+ MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock -+*/ -+u8 rtw_sitesurvey_cmd(_adapter *padapter, struct sitesurvey_parm *pparm) -+{ -+ u8 res = _FAIL; -+ struct cmd_obj *ph2c; -+ struct sitesurvey_parm *psurveyPara; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+#ifdef CONFIG_LPS -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SCAN, 0); -+#endif -+ -+#ifdef CONFIG_P2P_PS -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ p2p_ps_wk_cmd(padapter, P2P_PS_SCAN, 1); -+#endif /* CONFIG_P2P_PS */ -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) -+ return _FAIL; -+ -+ psurveyPara = (struct sitesurvey_parm *)rtw_zmalloc(sizeof(struct sitesurvey_parm)); -+ if (psurveyPara == NULL) { -+ rtw_mfree((unsigned char *) ph2c, sizeof(struct cmd_obj)); -+ return _FAIL; -+ } -+ -+ if (pparm) -+ _rtw_memcpy(psurveyPara, pparm, sizeof(struct sitesurvey_parm)); -+ else -+ psurveyPara->scan_mode = pmlmepriv->scan_mode; -+ -+ rtw_free_network_queue(padapter, _FALSE); -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, CMD_SITE_SURVEY); -+ -+ set_fwstate(pmlmepriv, WIFI_UNDER_SURVEY); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+ if (res == _SUCCESS) { -+ u32 scan_timeout_ms; -+ -+ pmlmepriv->scan_start_time = rtw_get_current_time(); -+ scan_timeout_ms = rtw_scan_timeout_decision(padapter); -+ mlme_set_scan_to_timer(pmlmepriv,scan_timeout_ms); -+ -+ rtw_led_control(padapter, LED_CTL_SITE_SURVEY); -+ } else -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_SURVEY); -+ -+ -+ return res; -+} -+ -+void rtw_readtssi_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd) -+{ -+ -+ rtw_mfree((unsigned char *) pcmd->parmbuf, pcmd->cmdsz); -+ rtw_mfree((unsigned char *) pcmd, sizeof(struct cmd_obj)); -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->registrypriv.mp_mode == 1) -+ padapter->mppriv.workparam.bcompleted = _TRUE; -+#endif -+ -+} -+ -+#ifdef CONFIG_AP_MODE -+static u8 rtw_createbss_cmd(_adapter *adapter, int flags, bool adhoc -+ , u8 ifbmp, u8 excl_ifbmp, s16 req_ch, s8 req_bw, s8 req_offset) -+{ -+ struct cmd_obj *cmdobj; -+ struct createbss_parm *parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ if (req_ch > 0 && req_bw >= 0 && req_offset >= 0) { -+ if (!rtw_chset_is_chbw_valid(adapter_to_chset(adapter), req_ch, req_bw, req_offset, 0, 0)) { -+ res = _FAIL; -+ goto exit; -+ } -+ } -+ -+ /* prepare cmd parameter */ -+ parm = (struct createbss_parm *)rtw_zmalloc(sizeof(*parm)); -+ if (parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ if (adhoc) { -+ /* for now, adhoc doesn't support ch,bw,offset request */ -+ parm->adhoc = 1; -+ } else { -+ parm->adhoc = 0; -+ parm->ifbmp = ifbmp; -+ parm->excl_ifbmp = excl_ifbmp; -+ parm->req_ch = req_ch; -+ parm->req_bw = req_bw; -+ parm->req_offset = req_offset; -+ } -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ -+ if (H2C_SUCCESS != createbss_hdl(adapter, (u8 *)parm)) -+ res = _FAIL; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ } else { -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_CREATE_BSS); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 2000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ } -+ } -+ -+exit: -+ return res; -+} -+ -+inline u8 rtw_create_ibss_cmd(_adapter *adapter, int flags) -+{ -+ return rtw_createbss_cmd(adapter, flags -+ , 1 -+ , 0, 0 -+ , 0, REQ_BW_NONE, REQ_OFFSET_NONE /* for now, adhoc doesn't support ch,bw,offset request */ -+ ); -+} -+ -+inline u8 rtw_startbss_cmd(_adapter *adapter, int flags) -+{ -+ return rtw_createbss_cmd(adapter, flags -+ , 0 -+ , BIT(adapter->iface_id), 0 -+ , 0, REQ_BW_NONE, REQ_OFFSET_NONE /* excute entire AP setup cmd */ -+ ); -+} -+ -+inline u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags -+ , u8 ifbmp, u8 excl_ifbmp, s16 req_ch, s8 req_bw, s8 req_offset) -+{ -+ return rtw_createbss_cmd(adapter, flags -+ , 0 -+ , ifbmp, excl_ifbmp -+ , req_ch, req_bw, req_offset -+ ); -+} -+#endif /* CONFIG_AP_MODE */ -+ -+u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork) -+{ -+ u8 *auth, res = _SUCCESS; -+ uint t_len = 0; -+ WLAN_BSSID_EX *psecnetwork; -+ struct cmd_obj *pcmd; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+#ifdef CONFIG_80211N_HT -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+#endif /* CONFIG_80211N_HT */ -+#ifdef CONFIG_80211AC_VHT -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+#endif /* CONFIG_80211AC_VHT */ -+ NDIS_802_11_NETWORK_INFRASTRUCTURE ndis_network_mode = pnetwork->network.InfrastructureMode; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ u32 tmp_len; -+ u8 *ptmp = NULL; -+ -+ rtw_led_control(padapter, LED_CTL_START_TO_LINK); -+ -+ pcmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+#if 0 -+ /* for IEs is pointer */ -+ t_len = sizeof(u32) + sizeof(NDIS_802_11_MAC_ADDRESS) + 2 + -+ sizeof(NDIS_802_11_SSID) + sizeof(u32) + -+ sizeof(NDIS_802_11_RSSI) + sizeof(NDIS_802_11_NETWORK_TYPE) + -+ sizeof(NDIS_802_11_CONFIGURATION) + -+ sizeof(NDIS_802_11_NETWORK_INFRASTRUCTURE) + -+ sizeof(NDIS_802_11_RATES_EX) + sizeof(WLAN_PHY_INFO) + sizeof(u32) + MAX_IE_SZ; -+#endif -+ /* for IEs is fix buf size */ -+ t_len = sizeof(WLAN_BSSID_EX); -+ -+ -+ /* for hidden ap to set fw_state here */ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE) != _TRUE) { -+ switch (ndis_network_mode) { -+ case Ndis802_11IBSS: -+ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); -+ break; -+ -+ case Ndis802_11Infrastructure: -+ set_fwstate(pmlmepriv, WIFI_STATION_STATE); -+ break; -+ -+ default: -+ rtw_warn_on(1); -+ break; -+ } -+ } -+ -+ pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->network.IEs, pnetwork->network.IELength); -+ -+#ifdef CONFIG_80211AC_VHT -+ /* save AP beamform_cap info for BCM IOT issue */ -+ if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) -+ get_vht_bf_cap(pnetwork->network.IEs, -+ pnetwork->network.IELength, -+ &pvhtpriv->ap_bf_cap); -+#endif -+ /* -+ Modified by Arvin 2015/05/13 -+ Solution for allocating a new WLAN_BSSID_EX to avoid race condition issue between disconnect and joinbss -+ */ -+ psecnetwork = (WLAN_BSSID_EX *)rtw_zmalloc(sizeof(WLAN_BSSID_EX)); -+ if (psecnetwork == NULL) { -+ if (pcmd != NULL) -+ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); -+ -+ res = _FAIL; -+ -+ -+ goto exit; -+ } -+ -+ _rtw_memset(psecnetwork, 0, t_len); -+ -+ _rtw_memcpy(psecnetwork, &pnetwork->network, get_WLAN_BSSID_EX_sz(&pnetwork->network)); -+ -+ auth = &psecuritypriv->authenticator_ie[0]; -+ psecuritypriv->authenticator_ie[0] = (unsigned char)psecnetwork->IELength; -+ -+ if ((psecnetwork->IELength - 12) < (256 - 1)) -+ _rtw_memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->IEs[12], psecnetwork->IELength - 12); -+ else -+ _rtw_memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->IEs[12], (256 - 1)); -+ -+ psecnetwork->IELength = 0; -+ /* Added by Albert 2009/02/18 */ -+ /* If the the driver wants to use the bssid to create the connection. */ -+ /* If not, we have to copy the connecting AP's MAC address to it so that */ -+ /* the driver just has the bssid information for PMKIDList searching. */ -+ -+ if (pmlmepriv->assoc_by_bssid == _FALSE) -+ _rtw_memcpy(&pmlmepriv->assoc_bssid[0], &pnetwork->network.MacAddress[0], ETH_ALEN); -+ -+ /* copy fixed ie */ -+ _rtw_memcpy(psecnetwork->IEs, pnetwork->network.IEs, 12); -+ psecnetwork->IELength = 12; -+ -+ psecnetwork->IELength += rtw_restruct_sec_ie(padapter, psecnetwork->IEs + psecnetwork->IELength); -+ -+ -+ pqospriv->qos_option = 0; -+ -+ if (pregistrypriv->wmm_enable) { -+#ifdef CONFIG_WMMPS_STA -+ rtw_uapsd_use_default_setting(padapter); -+#endif /* CONFIG_WMMPS_STA */ -+ tmp_len = rtw_restruct_wmm_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength, psecnetwork->IELength); -+ -+ if (psecnetwork->IELength != tmp_len) { -+ psecnetwork->IELength = tmp_len; -+ pqospriv->qos_option = 1; /* There is WMM IE in this corresp. beacon */ -+ } else { -+ pqospriv->qos_option = 0;/* There is no WMM IE in this corresp. beacon */ -+ } -+ } -+ -+#ifdef CONFIG_80211N_HT -+ phtpriv->ht_option = _FALSE; -+ if (pregistrypriv->ht_enable && is_supported_ht(pregistrypriv->wireless_mode)) { -+ ptmp = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &tmp_len, pnetwork->network.IELength - 12); -+ if (ptmp && tmp_len > 0) { -+ /* Added by Albert 2010/06/23 */ -+ /* For the WEP mode, we will use the bg mode to do the connection to avoid some IOT issue. */ -+ /* Especially for Realtek 8192u SoftAP. */ -+ if ((padapter->securitypriv.dot11PrivacyAlgrthm != _WEP40_) && -+ (padapter->securitypriv.dot11PrivacyAlgrthm != _WEP104_) && -+ (padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_)) { -+ rtw_ht_use_default_setting(padapter); -+ -+ /* rtw_restructure_ht_ie */ -+ rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[12], &psecnetwork->IEs[0], -+ pnetwork->network.IELength - 12, &psecnetwork->IELength, -+ pnetwork->network.Configuration.DSConfig); -+ } -+ } -+ } -+ -+#ifdef CONFIG_80211AC_VHT -+ pvhtpriv->vht_option = _FALSE; -+ if (phtpriv->ht_option -+ && REGSTY_IS_11AC_ENABLE(pregistrypriv) -+ && is_supported_vht(pregistrypriv->wireless_mode) -+ && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) -+ ) { -+ u8 vht_enable = 0; -+ -+ if (pnetwork->network.Configuration.DSConfig > 14) -+ vht_enable = 1; -+ else if ((REGSTY_IS_11AC_24G_ENABLE(pregistrypriv)) && (padapter->registrypriv.wifi_spec == 0)) -+ vht_enable = 1; -+ -+ if (vht_enable == 1) -+ rtw_restructure_vht_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], -+ pnetwork->network.IELength, &psecnetwork->IELength); -+ } -+#endif -+#endif /* CONFIG_80211N_HT */ -+ -+ rtw_append_exented_cap(padapter, &psecnetwork->IEs[0], &psecnetwork->IELength); -+ -+#ifdef CONFIG_RTW_80211R -+ rtw_ft_validate_akm_type(padapter, pnetwork); -+#endif -+ -+#if 0 -+ psecuritypriv->supplicant_ie[0] = (u8)psecnetwork->IELength; -+ -+ if (psecnetwork->IELength < (256 - 1)) -+ _rtw_memcpy(&psecuritypriv->supplicant_ie[1], &psecnetwork->IEs[0], psecnetwork->IELength); -+ else -+ _rtw_memcpy(&psecuritypriv->supplicant_ie[1], &psecnetwork->IEs[0], (256 - 1)); -+#endif -+ -+ pcmd->cmdsz = sizeof(WLAN_BSSID_EX); -+ -+ _rtw_init_listhead(&pcmd->list); -+ pcmd->cmdcode = CMD_JOINBSS;/* _JoinBss_CMD_ */ -+ pcmd->parmbuf = (unsigned char *)psecnetwork; -+ pcmd->rsp = NULL; -+ pcmd->rspsz = 0; -+ -+ res = rtw_enqueue_cmd(pcmdpriv, pcmd); -+ -+exit: -+ -+ -+ return res; -+} -+ -+u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, int flags) /* for sta_mode */ -+{ -+ struct cmd_obj *cmdobj = NULL; -+ struct disconnect_parm *param = NULL; -+ struct cmd_priv *cmdpriv = &padapter->cmdpriv; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ /* prepare cmd parameter */ -+ param = (struct disconnect_parm *)rtw_zmalloc(sizeof(*param)); -+ if (param == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ param->deauth_timeout_ms = deauth_timeout_ms; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ -+ if (disconnect_hdl(padapter, (u8 *)param) != H2C_SUCCESS) -+ res = _FAIL; -+ rtw_mfree((u8 *)param, sizeof(*param)); -+ -+ } else { -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ rtw_mfree((u8 *)param, sizeof(*param)); -+ goto exit; -+ } -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, param, CMD_DISCONNECT); -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 2000); -+ } -+ res = rtw_enqueue_cmd(cmdpriv, cmdobj); -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ } -+ } -+ -+exit: -+ -+ -+ return res; -+} -+ -+#ifdef CONFIG_AP_MODE -+u8 rtw_stop_ap_cmd(_adapter *adapter, u8 flags) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ -+ if (H2C_SUCCESS != stop_ap_hdl(adapter)) -+ res = _FAIL; -+ } else { -+ parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ parm->ec_id = STOP_AP_WK_CID; -+ parm->type = 0; -+ parm->size = 0; -+ parm->pbuf = NULL; -+ -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_DRV_EXTRA); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 2000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ } -+ } -+exit: -+ return res; -+} -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+u8 rtw_tx_control_cmd(_adapter *adapter) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ -+ u8 res = _SUCCESS; -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL){ -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = TBTX_CONTROL_TX_WK_CID; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ return res; -+} -+#endif -+ -+u8 rtw_setopmode_cmd(_adapter *adapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, u8 flags) -+{ -+ struct cmd_obj *cmdobj; -+ struct setopmode_parm *parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ /* prepare cmd parameter */ -+ parm = (struct setopmode_parm *)rtw_zmalloc(sizeof(*parm)); -+ if (parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ parm->mode = (u8)networktype; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ -+ if (H2C_SUCCESS != setopmode_hdl(adapter, (u8 *)parm)) -+ res = _FAIL; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ } else { -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_OPMODE); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 2000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ } -+ } -+ -+exit: -+ return res; -+} -+ -+u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 key_type, bool enqueue) -+{ -+ struct cmd_obj *ph2c; -+ struct set_stakey_parm *psetstakey_para; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct set_stakey_rsp *psetstakey_rsp = NULL; -+ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ u8 key_len =16; -+ u8 res = _SUCCESS; -+ -+ -+ psetstakey_para = (struct set_stakey_parm *)rtw_zmalloc(sizeof(struct set_stakey_parm)); -+ if (psetstakey_para == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memcpy(psetstakey_para->addr, sta->cmn.mac_addr, ETH_ALEN); -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) -+ psetstakey_para->algorithm = (unsigned char) psecuritypriv->dot11PrivacyAlgrthm; -+ else -+ GET_ENCRY_ALGO(psecuritypriv, sta, psetstakey_para->algorithm, _FALSE); -+ -+ if ((psetstakey_para->algorithm == _GCMP_256_) || (psetstakey_para->algorithm == _CCMP_256_)) -+ key_len = 32; -+ -+ if (key_type == GROUP_KEY) { -+ _rtw_memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, key_len); -+ psetstakey_para->gk = 1; -+ } else if (key_type == UNICAST_KEY) -+ _rtw_memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, key_len); -+#ifdef CONFIG_TDLS -+ else if (key_type == TDLS_KEY) { -+ _rtw_memcpy(&psetstakey_para->key, sta->tpk.tk, key_len); -+ psetstakey_para->algorithm = (u8)sta->dot118021XPrivacy; -+ } -+#endif /* CONFIG_TDLS */ -+ -+ /* jeff: set this becasue at least sw key is ready */ -+ padapter->securitypriv.busetkipkey = _TRUE; -+ -+ if (enqueue) { -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ psetstakey_rsp = (struct set_stakey_rsp *)rtw_zmalloc(sizeof(struct set_stakey_rsp)); -+ if (psetstakey_rsp == NULL) { -+ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, CMD_SET_STAKEY); -+ ph2c->rsp = (u8 *) psetstakey_rsp; -+ ph2c->rspsz = sizeof(struct set_stakey_rsp); -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ } else { -+ set_stakey_hdl(padapter, (u8 *)psetstakey_para); -+ rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); -+ } -+exit: -+ -+ -+ return res; -+} -+ -+u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue) -+{ -+ struct cmd_obj *ph2c; -+ struct set_stakey_parm *psetstakey_para; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct set_stakey_rsp *psetstakey_rsp = NULL; -+ s16 cam_id = 0; -+ u8 res = _SUCCESS; -+ -+ if (!sta) { -+ RTW_ERR("%s sta == NULL\n", __func__); -+ goto exit; -+ } -+ -+ if (!enqueue) { -+ while ((cam_id = rtw_camid_search(padapter, sta->cmn.mac_addr, -1, -1)) >= 0) { -+ RTW_PRINT("clear key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(sta->cmn.mac_addr), cam_id); -+ clear_cam_entry(padapter, cam_id); -+ rtw_camid_free(padapter, cam_id); -+ } -+ } else { -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ psetstakey_para = (struct set_stakey_parm *)rtw_zmalloc(sizeof(struct set_stakey_parm)); -+ if (psetstakey_para == NULL) { -+ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ psetstakey_rsp = (struct set_stakey_rsp *)rtw_zmalloc(sizeof(struct set_stakey_rsp)); -+ if (psetstakey_rsp == NULL) { -+ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, CMD_SET_STAKEY); -+ ph2c->rsp = (u8 *) psetstakey_rsp; -+ ph2c->rspsz = sizeof(struct set_stakey_rsp); -+ -+ _rtw_memcpy(psetstakey_para->addr, sta->cmn.mac_addr, ETH_ALEN); -+ -+ psetstakey_para->algorithm = _NO_PRIVACY_; -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+ } -+ -+exit: -+ -+ -+ return res; -+} -+ -+u8 rtw_addbareq_cmd(_adapter *padapter, u8 tid, u8 *addr) -+{ -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct cmd_obj *ph2c; -+ struct addBaReq_parm *paddbareq_parm; -+ -+ u8 res = _SUCCESS; -+ -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ paddbareq_parm = (struct addBaReq_parm *)rtw_zmalloc(sizeof(struct addBaReq_parm)); -+ if (paddbareq_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ paddbareq_parm->tid = tid; -+ _rtw_memcpy(paddbareq_parm->addr, addr, ETH_ALEN); -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, paddbareq_parm, CMD_ADD_BAREQ); -+ -+ /* RTW_INFO("rtw_addbareq_cmd, tid=%d\n", tid); */ -+ -+ /* rtw_enqueue_cmd(pcmdpriv, ph2c); */ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ -+ -+ return res; -+} -+ -+u8 rtw_addbarsp_cmd(_adapter *padapter, u8 *addr, u16 tid, u8 status, u8 size, u16 start_seq) -+{ -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct cmd_obj *ph2c; -+ struct addBaRsp_parm *paddBaRsp_parm; -+ u8 res = _SUCCESS; -+ -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ paddBaRsp_parm = (struct addBaRsp_parm *)rtw_zmalloc(sizeof(struct addBaRsp_parm)); -+ -+ if (paddBaRsp_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memcpy(paddBaRsp_parm->addr, addr, ETH_ALEN); -+ paddBaRsp_parm->tid = tid; -+ paddBaRsp_parm->status = status; -+ paddBaRsp_parm->size = size; -+ paddBaRsp_parm->start_seq = start_seq; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, paddBaRsp_parm, CMD_ADD_BARSP); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ -+ -+ return res; -+} -+/* add for CONFIG_IEEE80211W, none 11w can use it */ -+u8 rtw_reset_securitypriv_cmd(_adapter *padapter) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = RESET_SECURITYPRIV; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ -+ /* rtw_enqueue_cmd(pcmdpriv, ph2c); */ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ -+ -+ return res; -+ -+} -+ -+void free_assoc_resources_hdl(_adapter *padapter, u8 lock_scanned_queue) -+{ -+ rtw_free_assoc_resources(padapter, lock_scanned_queue); -+} -+ -+u8 rtw_free_assoc_resources_cmd(_adapter *padapter, u8 lock_scanned_queue, int flags) -+{ -+ struct cmd_obj *cmd; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ free_assoc_resources_hdl(padapter, lock_scanned_queue); -+ } -+ else { -+ cmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmd == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)cmd, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = FREE_ASSOC_RESOURCES; -+ pdrvextra_cmd_parm->type = lock_scanned_queue; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(cmd, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ cmd->sctx = &sctx; -+ rtw_sctx_init(&sctx, 2000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmd); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmd->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ } -+ } -+exit: -+ return res; -+ -+} -+ -+u8 rtw_dynamic_chk_wk_cmd(_adapter *padapter) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ -+ /* only primary padapter does this cmd */ -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = DYNAMIC_CHK_WK_CID; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ -+ /* rtw_enqueue_cmd(pcmdpriv, ph2c); */ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ -+ -+ return res; -+ -+} -+ -+u8 rtw_iqk_cmd(_adapter *padapter, u8 flags) -+{ -+ struct cmd_obj *pcmdobj; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl */ -+ rtw_iqk_hdl(padapter, NULL); -+ } else { -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ pcmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_parm_rsp(pcmdobj, CMD_DO_IQK); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ pcmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 10 * 1000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ pcmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ } -+ } -+ -+exit: -+ -+ return res; -+} -+ -+u8 rtw_set_chbw_cmd(_adapter *padapter, u8 ch, u8 bw, u8 ch_offset, u8 flags) -+{ -+ struct cmd_obj *pcmdobj; -+ struct set_ch_parm *set_ch_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ -+ RTW_INFO(FUNC_NDEV_FMT" ch:%u, bw:%u, ch_offset:%u\n", -+ FUNC_NDEV_ARG(padapter->pnetdev), ch, bw, ch_offset); -+ -+ /* check input parameter */ -+ -+ /* prepare cmd parameter */ -+ set_ch_parm = (struct set_ch_parm *)rtw_zmalloc(sizeof(*set_ch_parm)); -+ if (set_ch_parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ set_ch_parm->ch = ch; -+ set_ch_parm->bw = bw; -+ set_ch_parm->ch_offset = ch_offset; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ -+ if (H2C_SUCCESS != rtw_set_chbw_hdl(padapter, (u8 *)set_ch_parm)) -+ res = _FAIL; -+ -+ rtw_mfree((u8 *)set_ch_parm, sizeof(*set_ch_parm)); -+ } else { -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ pcmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmdobj == NULL) { -+ rtw_mfree((u8 *)set_ch_parm, sizeof(*set_ch_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(pcmdobj, set_ch_parm, CMD_SET_CHANNEL); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ pcmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 10 * 1000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ pcmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ } -+ } -+ -+ /* do something based on res... */ -+ -+exit: -+ -+ RTW_INFO(FUNC_NDEV_FMT" res:%u\n", FUNC_NDEV_ARG(padapter->pnetdev), res); -+ -+ -+ return res; -+} -+ -+static u8 _rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, const struct country_chplan *country_ent, enum regd_src_t regd_src, u8 swconfig) -+{ -+ struct cmd_obj *cmdobj; -+ struct SetChannelPlan_param *parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ /* check if allow software config */ -+ if (swconfig && rtw_hal_is_disable_sw_channel_plan(adapter) == _TRUE) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ /* if country_entry is provided, replace chplan */ -+ if (country_ent) -+ chplan = country_ent->chplan; -+ -+ /* check input parameter */ -+ if (regd_src == REGD_SRC_RTK_PRIV && !rtw_is_channel_plan_valid(chplan)) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ /* prepare cmd parameter */ -+ parm = (struct SetChannelPlan_param *)rtw_zmalloc(sizeof(*parm)); -+ if (parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ parm->regd_src = regd_src; -+ parm->country_ent = country_ent; -+ parm->channel_plan = chplan; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ -+ if (H2C_SUCCESS != rtw_set_chplan_hdl(adapter, (u8 *)parm)) -+ res = _FAIL; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ } else { -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_CHANPLAN); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 2000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status != RTW_SCTX_DONE_SUCCESS) -+ res = _FAIL; -+ } -+ -+ /* allow set channel plan when cmd_thread is not running */ -+ if (res != _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ parm = (struct SetChannelPlan_param *)rtw_zmalloc(sizeof(*parm)); -+ if (parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ parm->regd_src = regd_src; -+ parm->country_ent = country_ent; -+ parm->channel_plan = chplan; -+ -+ if (H2C_SUCCESS != rtw_set_chplan_hdl(adapter, (u8 *)parm)) -+ res = _FAIL; -+ else -+ res = _SUCCESS; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ } -+ } -+ -+exit: -+ return res; -+} -+ -+inline u8 rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, u8 swconfig) -+{ -+ return _rtw_set_chplan_cmd(adapter, flags, chplan, NULL, REGD_SRC_RTK_PRIV, swconfig); -+} -+ -+inline u8 rtw_set_country_cmd(_adapter *adapter, int flags, const char *country_code, u8 swconfig) -+{ -+ const struct country_chplan *ent; -+ -+ if (is_alpha(country_code[0]) == _FALSE -+ || is_alpha(country_code[1]) == _FALSE -+ ) { -+ RTW_PRINT("%s input country_code is not alpha2\n", __func__); -+ return _FAIL; -+ } -+ -+ ent = rtw_get_chplan_from_country(country_code); -+ -+ if (ent == NULL) { -+ RTW_PRINT("%s unsupported country_code:\"%c%c\"\n", __func__, country_code[0], country_code[1]); -+ return _FAIL; -+ } -+ -+ RTW_PRINT("%s country_code:\"%c%c\" mapping to chplan:0x%02x\n", __func__, country_code[0], country_code[1], ent->chplan); -+ -+ return _rtw_set_chplan_cmd(adapter, flags, RTW_CHPLAN_UNSPECIFIED, ent, REGD_SRC_RTK_PRIV, swconfig); -+} -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+inline u8 rtw_sync_os_regd_cmd(_adapter *adapter, int flags, const char *country_code, u8 dfs_region) -+{ -+ struct country_chplan *ent; -+ const struct country_chplan *rtk_ent; -+ -+ /* allocate entry for regd source out of driver */ -+ ent = rtw_malloc(sizeof(*ent)); -+ if (ent == NULL) -+ return _FAIL; -+ -+ rtk_ent = rtw_get_chplan_from_country(country_code); -+ -+ _rtw_memcpy(ent->alpha2, country_code, 2); -+ -+ /* -+ * Regulation follows OS, the internal txpwr limit selection is searched by alpha2 -+ * "00" => WW, others use string mapping -+ * When no matching txpwr limit selection is found, use -+ * 1. txpwr lmit selection associated with alpha2 inside driver regulation database -+ * 2. WW when driver has no support of this alpha2 -+ */ -+ -+ ent->chplan = rtk_ent ? rtk_ent->chplan : RTW_CHPLAN_UNSPECIFIED; -+ #ifdef CONFIG_80211AC_VHT -+ ent->en_11ac = 1; -+ #endif -+ -+ /* TODO: dfs_region */ -+ -+ return _rtw_set_chplan_cmd(adapter, flags, RTW_CHPLAN_UNSPECIFIED, ent, REGD_SRC_OS, 1); -+} -+#endif /* CONFIG_REGD_SRC_FROM_OS */ -+ -+u8 rtw_get_chplan_cmd(_adapter *adapter, int flags, struct get_chplan_resp **resp) -+{ -+ struct cmd_obj *cmdobj; -+ struct get_channel_plan_param *parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _FAIL; -+ -+ if (!(flags & (RTW_CMDF_DIRECTLY | RTW_CMDF_WAIT_ACK))) -+ goto exit; -+ -+ /* prepare cmd parameter */ -+ parm = rtw_zmalloc(sizeof(*parm)); -+ if (parm == NULL) -+ goto exit; -+ parm->resp = resp; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ -+ if (H2C_SUCCESS == rtw_get_chplan_hdl(adapter, (u8 *)parm)) -+ res = _SUCCESS; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ } else { -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_GET_CHANPLAN); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 2000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status != RTW_SCTX_DONE_SUCCESS) -+ res = _FAIL; -+ } -+ -+ /* allow get channel plan when cmd_thread is not running */ -+ if (res != _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ parm = rtw_zmalloc(sizeof(*parm)); -+ if (parm == NULL) -+ goto exit; -+ parm->resp = resp; -+ -+ if (H2C_SUCCESS == rtw_get_chplan_hdl(adapter, (u8 *)parm)) -+ res = _SUCCESS; -+ -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ } -+ } -+ -+exit: -+ return res; -+} -+ -+u8 rtw_led_blink_cmd(_adapter *padapter, void *pLed) -+{ -+ struct cmd_obj *pcmdobj; -+ struct LedBlink_param *ledBlink_param; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ -+ u8 res = _SUCCESS; -+ -+ -+ -+ pcmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ ledBlink_param = (struct LedBlink_param *)rtw_zmalloc(sizeof(struct LedBlink_param)); -+ if (ledBlink_param == NULL) { -+ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ ledBlink_param->pLed = pLed; -+ -+ init_h2fwcmd_w_parm_no_rsp(pcmdobj, ledBlink_param, CMD_LEDBLINK); -+ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); -+ -+exit: -+ -+ -+ return res; -+} -+ -+u8 rtw_set_csa_cmd(_adapter *adapter) -+{ -+ struct cmd_obj *cmdobj; -+ struct cmd_priv *cmdpriv = &adapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ cmdobj = rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_parm_rsp(cmdobj, CMD_SET_CHANSWITCH); -+ res = rtw_enqueue_cmd(cmdpriv, cmdobj); -+ -+exit: -+ return res; -+} -+ -+u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option) -+{ -+ u8 res = _SUCCESS; -+#ifdef CONFIG_TDLS -+ struct cmd_obj *pcmdobj; -+ struct TDLSoption_param *TDLSoption; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ -+ pcmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ TDLSoption = (struct TDLSoption_param *)rtw_zmalloc(sizeof(struct TDLSoption_param)); -+ if (TDLSoption == NULL) { -+ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_spinlock(&(padapter->tdlsinfo.cmd_lock)); -+ if (addr != NULL) -+ _rtw_memcpy(TDLSoption->addr, addr, 6); -+ TDLSoption->option = option; -+ _rtw_spinunlock(&(padapter->tdlsinfo.cmd_lock)); -+ init_h2fwcmd_w_parm_no_rsp(pcmdobj, TDLSoption, CMD_TDLS); -+ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); -+ -+exit: -+#endif /* CONFIG_TDLS */ -+ -+ return res; -+} -+ -+u8 rtw_enable_hw_update_tsf_cmd(_adapter *padapter) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = EN_HW_UPDATE_TSF_WK_CID; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ return res; -+} -+ -+u8 rtw_periodic_tsf_update_end_cmd(_adapter *adapter) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *parm; -+ struct cmd_priv *cmdpriv = &adapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (parm == NULL) { -+ rtw_mfree((unsigned char *)cmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ parm->ec_id = PERIOD_TSF_UPDATE_END_WK_CID; -+ parm->type = 0; -+ parm->size = 0; -+ parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(cmdpriv, cmdobj); -+ -+exit: -+ return res; -+} -+u8 rtw_ssmps_wk_hdl(_adapter *adapter, struct ssmps_cmd_parm *ssmp_param) -+{ -+ u8 res = _SUCCESS; -+ struct sta_info *sta = ssmp_param->sta; -+ u8 smps = ssmp_param->smps; -+ -+ if (sta == NULL) -+ return _FALSE; -+ -+ if (smps) -+ rtw_ssmps_enter(adapter, sta); -+ else -+ rtw_ssmps_leave(adapter, sta); -+ return res; -+} -+ -+u8 rtw_ssmps_wk_cmd(_adapter *adapter, struct sta_info *sta, u8 smps, u8 enqueue) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *cmd_parm; -+ struct ssmps_cmd_parm *ssmp_param; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ if (enqueue) { -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)cmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ ssmp_param = (struct ssmps_cmd_parm *)rtw_zmalloc(sizeof(struct ssmps_cmd_parm)); -+ if (ssmp_param == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ ssmp_param->smps = smps; -+ ssmp_param->sta = sta; -+ -+ cmd_parm->ec_id = SSMPS_WK_CID; -+ cmd_parm->type = 0; -+ cmd_parm->size = sizeof(struct ssmps_cmd_parm); -+ cmd_parm->pbuf = (u8 *)ssmp_param; -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ } else { -+ struct ssmps_cmd_parm tmp_ssmp_param; -+ -+ tmp_ssmp_param.smps = smps; -+ tmp_ssmp_param.sta = sta; -+ rtw_ssmps_wk_hdl(adapter, &tmp_ssmp_param); -+ } -+ -+exit: -+ return res; -+} -+ -+#ifdef CONFIG_SUPPORT_STATIC_SMPS -+u8 _ssmps_chk_by_tp(_adapter *adapter, u8 from_timer) -+{ -+ u8 enter_smps = _FALSE; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *psta; -+ u32 tx_tp_mbits, rx_tp_mbits; -+ -+ if (!MLME_IS_STA(adapter) || -+ !hal_is_mimo_support(adapter) || -+ !pmlmeext->ssmps_en || -+ (pmlmeext->cur_channel > 14) -+ ) -+ return enter_smps; -+ -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) { -+ RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ return enter_smps; -+ } -+ -+ if (psta->cmn.mimo_type == RF_1T1R) -+ return enter_smps; -+ -+ tx_tp_mbits = psta->sta_stats.tx_tp_kbits >> 10; -+ rx_tp_mbits = psta->sta_stats.rx_tp_kbits >> 10; -+ -+ #ifdef DBG_STATIC_SMPS -+ if (pmlmeext->ssmps_test) { -+ enter_smps = (pmlmeext->ssmps_test_en == 1) ? _TRUE : _FALSE; -+ } -+ else -+ #endif -+ { -+ if ((tx_tp_mbits <= pmlmeext->ssmps_tx_tp_th) && -+ (rx_tp_mbits <= pmlmeext->ssmps_rx_tp_th)) -+ enter_smps = _TRUE; -+ else -+ enter_smps = _FALSE; -+ } -+ -+ if (1) { -+ RTW_INFO(FUNC_ADPT_FMT" tx_tp:%d [%d], rx_tp:%d [%d] , SSMPS enter :%s\n", -+ FUNC_ADPT_ARG(adapter), -+ tx_tp_mbits, pmlmeext->ssmps_tx_tp_th, -+ rx_tp_mbits, pmlmeext->ssmps_rx_tp_th, -+ (enter_smps == _TRUE) ? "True" : "False"); -+ #ifdef DBG_STATIC_SMPS -+ RTW_INFO(FUNC_ADPT_FMT" test:%d test_en:%d\n", -+ FUNC_ADPT_ARG(adapter), -+ pmlmeext->ssmps_test, -+ pmlmeext->ssmps_test_en); -+ #endif -+ } -+ -+ if (enter_smps) { -+ if (!from_timer && psta->cmn.sm_ps != SM_PS_STATIC) -+ rtw_ssmps_enter(adapter, psta); -+ } else { -+ if (!from_timer && psta->cmn.sm_ps != SM_PS_DISABLE) -+ rtw_ssmps_leave(adapter, psta); -+ else { -+ u8 ps_change = _FALSE; -+ -+ if (enter_smps && psta->cmn.sm_ps != SM_PS_STATIC) -+ ps_change = _TRUE; -+ else if (!enter_smps && psta->cmn.sm_ps != SM_PS_DISABLE) -+ ps_change = _TRUE; -+ -+ if (ps_change) -+ rtw_ssmps_wk_cmd(adapter, psta, enter_smps, 1); -+ } -+ } -+ -+ return enter_smps; -+} -+#endif /*CONFIG_SUPPORT_STATIC_SMPS*/ -+ -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+void rtw_ctrl_txss_update_mimo_type(_adapter *adapter, struct sta_info *sta) -+{ -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ pmlmeext->txss_momi_type_bk = sta->cmn.mimo_type; -+} -+ -+u8 rtw_ctrl_txss(_adapter *adapter, struct sta_info *sta, bool tx_1ss) -+{ -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ u8 lps_changed = _FALSE; -+ u8 rst = _SUCCESS; -+ -+ if (pmlmeext->txss_1ss == tx_1ss) -+ return _FALSE; -+ -+ if (pwrpriv->bLeisurePs && pwrpriv->pwr_mode != PS_MODE_ACTIVE) { -+ lps_changed = _TRUE; -+ LPS_Leave(adapter, "LPS_CTRL_TXSS"); -+ } -+ -+ RTW_INFO(ADPT_FMT" STA [" MAC_FMT "] set tx to %d ss\n", -+ ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr), -+ (tx_1ss) ? 1 : rtw_get_sta_tx_nss(adapter, sta)); -+ -+ /*ra re-registed*/ -+ sta->cmn.mimo_type = (tx_1ss) ? RF_1T1R : pmlmeext->txss_momi_type_bk; -+ rtw_phydm_ra_registed(adapter, sta); -+ -+ /*configure trx mode*/ -+ rtw_phydm_trx_cfg(adapter, tx_1ss); -+ pmlmeext->txss_1ss = tx_1ss; -+ -+ if (lps_changed) -+ LPS_Enter(adapter, "LPS_CTRL_TXSS"); -+ -+ return rst; -+} -+ -+u8 rtw_ctrl_txss_wk_hdl(_adapter *adapter, struct txss_cmd_parm *txss_param) -+{ -+ if (!txss_param->sta) -+ return _FALSE; -+ -+ return rtw_ctrl_txss(adapter, txss_param->sta, txss_param->tx_1ss); -+} -+ -+u8 rtw_ctrl_txss_wk_cmd(_adapter *adapter, struct sta_info *sta, bool tx_1ss, u8 flag) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *cmd_parm; -+ struct txss_cmd_parm *txss_param; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ txss_param = (struct txss_cmd_parm *)rtw_zmalloc(sizeof(struct txss_cmd_parm)); -+ if (txss_param == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ txss_param->tx_1ss = tx_1ss; -+ txss_param->sta = sta; -+ -+ if (flag & RTW_CMDF_DIRECTLY) { -+ res = rtw_ctrl_txss_wk_hdl(adapter, txss_param); -+ rtw_mfree((u8 *)txss_param, sizeof(*txss_param)); -+ } else { -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (cmd_parm == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ cmd_parm->ec_id = TXSS_WK_CID; -+ cmd_parm->type = 0; -+ cmd_parm->size = sizeof(struct txss_cmd_parm); -+ cmd_parm->pbuf = (u8 *)txss_param; -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ if (flag & RTW_CMDF_WAIT_ACK) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 10 * 1000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ if (res == _SUCCESS && (flag & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status != RTW_SCTX_DONE_SUCCESS) -+ res = _FAIL; -+ } -+ } -+ -+exit: -+ return res; -+} -+ -+void rtw_ctrl_tx_ss_by_tp(_adapter *adapter, u8 from_timer) -+{ -+ bool tx_1ss = _FALSE; /*change tx from 2ss to 1ss*/ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *psta; -+ u32 tx_tp_mbits; -+ -+ if (!MLME_IS_STA(adapter) || -+ !hal_is_mimo_support(adapter) || -+ !pmlmeext->txss_ctrl_en -+ ) -+ return; -+ -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) { -+ RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ tx_tp_mbits = psta->sta_stats.tx_tp_kbits >> 10; -+ if (tx_tp_mbits >= pmlmeext->txss_tp_th) { -+ tx_1ss = _FALSE; -+ } else { -+ if (pmlmeext->txss_tp_chk_cnt && --pmlmeext->txss_tp_chk_cnt) -+ tx_1ss = _FALSE; -+ else -+ tx_1ss = _TRUE; -+ } -+ -+ if (1) { -+ RTW_INFO(FUNC_ADPT_FMT" tx_tp:%d [%d] tx_1ss(%d):%s\n", -+ FUNC_ADPT_ARG(adapter), -+ tx_tp_mbits, pmlmeext->txss_tp_th, -+ pmlmeext->txss_tp_chk_cnt, -+ (tx_1ss == _TRUE) ? "True" : "False"); -+ } -+ -+ if (pmlmeext->txss_1ss != tx_1ss) { -+ if (from_timer) -+ rtw_ctrl_txss_wk_cmd(adapter, psta, tx_1ss, 0); -+ else -+ rtw_ctrl_txss(adapter, psta, tx_1ss); -+ } -+} -+#ifdef DBG_CTRL_TXSS -+void dbg_ctrl_txss(_adapter *adapter, bool tx_1ss) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *psta; -+ -+ if (!MLME_IS_STA(adapter) || -+ !hal_is_mimo_support(adapter) -+ ) -+ return; -+ -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) { -+ RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ rtw_ctrl_txss(adapter, psta, tx_1ss); -+} -+#endif -+#endif /*CONFIG_CTRL_TXSS_BY_TP*/ -+ -+#ifdef CONFIG_LPS -+#ifdef CONFIG_LPS_CHK_BY_TP -+#ifdef LPS_BCN_CNT_MONITOR -+static u8 _bcn_cnt_expected(struct sta_info *psta) -+{ -+ _adapter *adapter = psta->padapter; -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 dtim = rtw_get_bcn_dtim_period(adapter); -+ u8 bcn_cnt = 0; -+ -+ if ((pmlmeinfo->bcn_interval !=0) && (dtim != 0)) -+ bcn_cnt = 2000 / pmlmeinfo->bcn_interval / dtim * 4 / 5; /*2s*/ -+ if (0) -+ RTW_INFO("%s bcn_cnt:%d\n", __func__, bcn_cnt); -+ -+ if (bcn_cnt == 0) { -+ RTW_ERR(FUNC_ADPT_FMT" bcn_cnt == 0\n", FUNC_ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ } -+ -+ return bcn_cnt; -+} -+#endif -+u8 _lps_chk_by_tp(_adapter *adapter, u8 from_timer) -+{ -+ u8 enter_ps = _FALSE; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *psta; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ u32 tx_tp_mbits, rx_tp_mbits, bi_tp_mbits; -+ u8 rx_bcn_cnt; -+ -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) { -+ RTW_ERR(ADPT_FMT" sta == NULL\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ return enter_ps; -+ } -+ -+ rx_bcn_cnt = rtw_get_bcn_cnt(psta->padapter); -+ psta->sta_stats.acc_tx_bytes = psta->sta_stats.tx_bytes; -+ psta->sta_stats.acc_rx_bytes = psta->sta_stats.rx_bytes; -+ -+#if 1 -+ tx_tp_mbits = psta->sta_stats.tx_tp_kbits >> 10; -+ rx_tp_mbits = psta->sta_stats.rx_tp_kbits >> 10; -+ bi_tp_mbits = tx_tp_mbits + rx_tp_mbits; -+#else -+ tx_tp_mbits = psta->sta_stats.smooth_tx_tp_kbits >> 10; -+ rx_tp_mbits = psta->sta_stats.smooth_rx_tp_kbits >> 10; -+ bi_tp_mbits = tx_tp_mbits + rx_tp_mbits; -+#endif -+ -+ if ((bi_tp_mbits >= pwrpriv->lps_bi_tp_th) || -+ (tx_tp_mbits >= pwrpriv->lps_tx_tp_th) || -+ (rx_tp_mbits >= pwrpriv->lps_rx_tp_th)) { -+ enter_ps = _FALSE; -+ pwrpriv->lps_chk_cnt = pwrpriv->lps_chk_cnt_th; -+ } -+ else { -+#ifdef LPS_BCN_CNT_MONITOR -+ u8 bcn_cnt = _bcn_cnt_expected(psta); -+ -+ if (bcn_cnt && (rx_bcn_cnt < bcn_cnt)) { -+ pwrpriv->lps_chk_cnt = 2; -+ RTW_ERR(FUNC_ADPT_FMT" BCN_CNT:%d(%d) invalid\n", -+ FUNC_ADPT_ARG(adapter), rx_bcn_cnt, bcn_cnt); -+ } -+#endif -+ -+ if (pwrpriv->lps_chk_cnt && --pwrpriv->lps_chk_cnt) -+ enter_ps = _FALSE; -+ else -+ enter_ps = _TRUE; -+ } -+ -+ if (1) { -+ RTW_INFO(FUNC_ADPT_FMT" tx_tp:%d [%d], rx_tp:%d [%d], bi_tp:%d [%d], enter_ps(%d):%s\n", -+ FUNC_ADPT_ARG(adapter), -+ tx_tp_mbits, pwrpriv->lps_tx_tp_th, -+ rx_tp_mbits, pwrpriv->lps_rx_tp_th, -+ bi_tp_mbits, pwrpriv->lps_bi_tp_th, -+ pwrpriv->lps_chk_cnt, -+ (enter_ps == _TRUE) ? "True" : "False"); -+ RTW_INFO(FUNC_ADPT_FMT" tx_pkt_cnt :%d [%d], rx_pkt_cnt :%d [%d]\n", -+ FUNC_ADPT_ARG(adapter), -+ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, -+ pwrpriv->lps_tx_pkts, -+ pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod, -+ pwrpriv->lps_rx_pkts); -+ if (!adapter->bsta_tp_dump) -+ RTW_INFO(FUNC_ADPT_FMT" bcn_cnt:%d (per-%d second)\n", -+ FUNC_ADPT_ARG(adapter), -+ rx_bcn_cnt, -+ 2); -+ } -+ -+ if (enter_ps) { -+ if (!from_timer) -+ LPS_Enter(adapter, "TRAFFIC_IDLE"); -+ } else { -+ if (!from_timer) -+ LPS_Leave(adapter, "TRAFFIC_BUSY"); -+ else { -+ #ifdef CONFIG_CONCURRENT_MODE -+ #ifndef CONFIG_FW_MULTI_PORT_SUPPORT -+ if (adapter->hw_port == HW_PORT0) -+ #endif -+ #endif -+ rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_TRAFFIC_BUSY, 0); -+ } -+ } -+ -+ return enter_ps; -+} -+#endif -+ -+static u8 _lps_chk_by_pkt_cnts(_adapter *padapter, u8 from_timer, u8 bBusyTraffic) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bEnterPS = _FALSE; -+ -+ /* check traffic for powersaving. */ -+ if (((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > 8) || -+ #ifdef CONFIG_LPS_SLOW_TRANSITION -+ (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) -+ #else /* CONFIG_LPS_SLOW_TRANSITION */ -+ (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 4) -+ #endif /* CONFIG_LPS_SLOW_TRANSITION */ -+ ) { -+ #ifdef DBG_RX_COUNTER_DUMP -+ if (padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA) -+ RTW_INFO("(-)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); -+ #endif -+ -+ bEnterPS = _FALSE; -+ #ifdef CONFIG_LPS_SLOW_TRANSITION -+ if (bBusyTraffic == _TRUE) { -+ if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount <= 4) -+ pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 4; -+ -+ pmlmepriv->LinkDetectInfo.TrafficTransitionCount++; -+ -+ /* RTW_INFO("Set TrafficTransitionCount to %d\n", pmlmepriv->LinkDetectInfo.TrafficTransitionCount); */ -+ -+ if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount > 30/*TrafficTransitionLevel*/) -+ pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 30; -+ } -+ #endif /* CONFIG_LPS_SLOW_TRANSITION */ -+ } else { -+ #ifdef DBG_RX_COUNTER_DUMP -+ if (padapter->dump_rx_cnt_mode & DUMP_DRV_TRX_COUNTER_DATA) -+ RTW_INFO("(+)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); -+ #endif -+ -+ #ifdef CONFIG_LPS_SLOW_TRANSITION -+ if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount >= 2) -+ pmlmepriv->LinkDetectInfo.TrafficTransitionCount -= 2; -+ else -+ pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; -+ -+ if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount == 0) -+ bEnterPS = _TRUE; -+ #else /* CONFIG_LPS_SLOW_TRANSITION */ -+ bEnterPS = _TRUE; -+ #endif /* CONFIG_LPS_SLOW_TRANSITION */ -+ } -+ -+ #ifdef CONFIG_DYNAMIC_DTIM -+ if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount == 8) -+ bEnterPS = _FALSE; -+ -+ RTW_INFO("LowPowerTransitionCount=%d\n", pmlmepriv->LinkDetectInfo.LowPowerTransitionCount); -+ #endif /* CONFIG_DYNAMIC_DTIM */ -+ -+ /* LeisurePS only work in infra mode. */ -+ if (bEnterPS) { -+ if (!from_timer) { -+ #ifdef CONFIG_DYNAMIC_DTIM -+ if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount < 8) -+ adapter_to_pwrctl(padapter)->dtim = 1; -+ else -+ adapter_to_pwrctl(padapter)->dtim = 3; -+ #endif /* CONFIG_DYNAMIC_DTIM */ -+ LPS_Enter(padapter, "TRAFFIC_IDLE"); -+ } else { -+ /* do this at caller */ -+ /* rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 0); */ -+ /* rtw_hal_dm_watchdog_in_lps(padapter); */ -+ } -+ -+ #ifdef CONFIG_DYNAMIC_DTIM -+ if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE) -+ pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++; -+ #endif /* CONFIG_DYNAMIC_DTIM */ -+ } else { -+ #ifdef CONFIG_DYNAMIC_DTIM -+ if (pmlmepriv->LinkDetectInfo.LowPowerTransitionCount != 8) -+ pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; -+ else -+ pmlmepriv->LinkDetectInfo.LowPowerTransitionCount++; -+ #endif /* CONFIG_DYNAMIC_DTIM */ -+ -+ if (!from_timer) -+ LPS_Leave(padapter, "TRAFFIC_BUSY"); -+ else { -+ #ifdef CONFIG_CONCURRENT_MODE -+ #ifndef CONFIG_FW_MULTI_PORT_SUPPORT -+ if (padapter->hw_port == HW_PORT0) -+ #endif -+ #endif -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_TRAFFIC_BUSY, 0); -+ } -+ } -+ -+ return bEnterPS; -+} -+#endif /* CONFIG_LPS */ -+ -+/* from_timer == 1 means driver is in LPS */ -+u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) -+{ -+ u8 bEnterPS = _FALSE; -+ u16 BusyThresholdHigh; -+ u16 BusyThresholdLow; -+ u16 BusyThreshold; -+ u8 bBusyTraffic = _FALSE, bTxBusyTraffic = _FALSE, bRxBusyTraffic = _FALSE; -+ u8 bHigherBusyTraffic = _FALSE, bHigherBusyRxTraffic = _FALSE, bHigherBusyTxTraffic = _FALSE; -+ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+#ifdef CONFIG_TDLS -+ struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); -+ struct tdls_txmgmt txmgmt; -+ u8 baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; -+#endif /* CONFIG_TDLS */ -+#ifdef CONFIG_TRAFFIC_PROTECT -+ RT_LINK_DETECT_T *link_detect = &pmlmepriv->LinkDetectInfo; -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+ if (padapter->registrypriv.wifi_spec != 1) { -+ BusyThresholdHigh = 25; -+ BusyThresholdLow = 10; -+ } else -+#endif /* CONFIG_BT_COEXIST */ -+ { -+ BusyThresholdHigh = 100; -+ BusyThresholdLow = 75; -+ } -+ BusyThreshold = BusyThresholdHigh; -+ -+ -+ /* */ -+ /* Determine if our traffic is busy now */ -+ /* */ -+ if ((check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ /*&& !MgntInitAdapterInProgress(pMgntInfo)*/) { -+ /* if we raise bBusyTraffic in last watchdog, using lower threshold. */ -+ if (pmlmepriv->LinkDetectInfo.bBusyTraffic) -+ BusyThreshold = BusyThresholdLow; -+ -+ if (pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > BusyThreshold || -+ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > BusyThreshold) { -+ bBusyTraffic = _TRUE; -+ -+ if (pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) -+ bRxBusyTraffic = _TRUE; -+ else -+ bTxBusyTraffic = _TRUE; -+ } -+ -+ /* Higher Tx/Rx data. */ -+ if (pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 4000 || -+ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 4000) { -+ bHigherBusyTraffic = _TRUE; -+ -+ if (pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) -+ bHigherBusyRxTraffic = _TRUE; -+ else -+ bHigherBusyTxTraffic = _TRUE; -+ } -+ -+#ifdef CONFIG_TRAFFIC_PROTECT -+#define TX_ACTIVE_TH 10 -+#define RX_ACTIVE_TH 20 -+#define TRAFFIC_PROTECT_PERIOD_MS 4500 -+ -+ if (link_detect->NumTxOkInPeriod > TX_ACTIVE_TH -+ || link_detect->NumRxUnicastOkInPeriod > RX_ACTIVE_TH) { -+ -+ RTW_INFO(FUNC_ADPT_FMT" acqiure wake_lock for %u ms(tx:%d,rx_unicast:%d)\n", -+ FUNC_ADPT_ARG(padapter), -+ TRAFFIC_PROTECT_PERIOD_MS, -+ link_detect->NumTxOkInPeriod, -+ link_detect->NumRxUnicastOkInPeriod); -+ -+ rtw_lock_traffic_suspend_timeout(TRAFFIC_PROTECT_PERIOD_MS); -+ } -+#endif -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_AUTOSETUP -+ /* TDLS_WATCHDOG_PERIOD * 2sec, periodically send */ -+ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _TRUE) { -+ if ((ptdlsinfo->watchdog_count % TDLS_WATCHDOG_PERIOD) == 0) { -+ _rtw_memcpy(txmgmt.peer, baddr, ETH_ALEN); -+ issue_tdls_dis_req(padapter, &txmgmt); -+ } -+ ptdlsinfo->watchdog_count++; -+ } -+#endif /* CONFIG_TDLS_AUTOSETUP */ -+#endif /* CONFIG_TDLS */ -+ -+#ifdef CONFIG_SUPPORT_STATIC_SMPS -+ _ssmps_chk_by_tp(padapter, from_timer); -+#endif -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+ rtw_ctrl_tx_ss_by_tp(padapter, from_timer); -+#endif -+ -+#ifdef CONFIG_LPS -+ if (adapter_to_pwrctl(padapter)->bLeisurePs && MLME_IS_STA(padapter)) { -+ #ifdef CONFIG_LPS_CHK_BY_TP -+ if (adapter_to_pwrctl(padapter)->lps_chk_by_tp) -+ bEnterPS = _lps_chk_by_tp(padapter, from_timer); -+ else -+ #endif /*CONFIG_LPS_CHK_BY_TP*/ -+ bEnterPS = _lps_chk_by_pkt_cnts(padapter, from_timer, bBusyTraffic); -+ } -+#endif /* CONFIG_LPS */ -+ -+ } else { -+#ifdef CONFIG_LPS -+ if (!from_timer && rtw_mi_get_assoc_if_num(padapter) == 0) -+ LPS_Leave(padapter, "NON_LINKED"); -+#endif -+ } -+ -+ session_tracker_chk_cmd(padapter, NULL); -+ -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+ rtw_bf_update_traffic(padapter); -+#endif /* RTW_BEAMFORMING_VERSION_2 */ -+#endif /* CONFIG_BEAMFORMING */ -+ -+ pmlmepriv->LinkDetectInfo.NumRxOkInPeriod = 0; -+ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod = 0; -+ pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod = 0; -+ pmlmepriv->LinkDetectInfo.bBusyTraffic = bBusyTraffic; -+ pmlmepriv->LinkDetectInfo.bTxBusyTraffic = bTxBusyTraffic; -+ pmlmepriv->LinkDetectInfo.bRxBusyTraffic = bRxBusyTraffic; -+ pmlmepriv->LinkDetectInfo.bHigherBusyTraffic = bHigherBusyTraffic; -+ pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic = bHigherBusyRxTraffic; -+ pmlmepriv->LinkDetectInfo.bHigherBusyTxTraffic = bHigherBusyTxTraffic; -+ -+ return bEnterPS; -+ -+} -+ -+#ifdef CONFIG_AP_MODE -+/* for 11n Logo 4.2.31/4.2.32 */ -+static void dynamic_update_bcn_check(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ if (!padapter->registrypriv.wifi_spec) -+ return; -+ -+ if (!padapter->registrypriv.ht_enable || !is_supported_ht(padapter->registrypriv.wireless_mode)) -+ return; -+ -+ if (!MLME_IS_AP(padapter)) -+ return; -+ -+ if (pmlmeext->bstart_bss) { -+ /* In 10 * 2 = 20s, there are no legacy AP, update HT info */ -+ static u8 count = 1; -+ -+ if (count % 10 == 0) { -+ count = 1; -+#ifdef CONFIG_80211N_HT -+ if (_FALSE == ATOMIC_READ(&pmlmepriv->olbc) -+ && _FALSE == ATOMIC_READ(&pmlmepriv->olbc_ht)) { -+ -+ if (rtw_ht_operation_update(padapter) > 0) { -+ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE, 0); -+ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE, 0); -+ } -+ } -+#endif /* CONFIG_80211N_HT */ -+ } -+ -+#ifdef CONFIG_80211N_HT -+ /* In 2s, there are any legacy AP, update HT info, and then reset count */ -+ -+ if (_FALSE != ATOMIC_READ(&pmlmepriv->olbc) -+ && _FALSE != ATOMIC_READ(&pmlmepriv->olbc_ht)) { -+ -+ if (rtw_ht_operation_update(padapter) > 0) { -+ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE, 0); -+ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE, 0); -+ -+ } -+ ATOMIC_SET(&pmlmepriv->olbc, _FALSE); -+ ATOMIC_SET(&pmlmepriv->olbc_ht, _FALSE); -+ count = 0; -+ } -+#endif /* CONFIG_80211N_HT */ -+ count ++; -+ } -+} -+#endif /* CONFIG_AP_MODE */ -+ -+void rtw_iface_dynamic_chk_wk_hdl(_adapter *padapter) -+{ -+ #ifdef CONFIG_AP_MODE -+ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { -+ expire_timeout_chk(padapter); -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter) && MLME_IS_ASOC(padapter)) -+ rtw_mesh_peer_status_chk(padapter); -+ #endif -+ } -+ #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ -+ -+ dynamic_update_bcn_check(padapter); -+ -+ #endif /* CONFIG_AP_MODE */ -+ -+ linked_status_chk(padapter, 0); -+ traffic_status_watchdog(padapter, 0); -+ -+ /* for debug purpose */ -+ _linked_info_dump(padapter); -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RSSIMONITOR -+ rtw_cfgvendor_rssi_monitor_evt(padapter); -+#endif -+ -+ -+} -+void rtw_dynamic_chk_wk_hdl(_adapter *padapter) -+{ -+ rtw_mi_dynamic_chk_wk_hdl(padapter); -+#ifdef CONFIG_MP_INCLUDED -+ if (rtw_mp_mode_check(padapter) == _FALSE) -+#endif -+ { -+#ifdef DBG_CONFIG_ERROR_DETECT -+ rtw_hal_sreset_xmit_status_check(padapter); -+ rtw_hal_sreset_linked_status_check(padapter); -+#endif -+ } -+ -+ /* if(check_fwstate(pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_SURVEY)==_FALSE) */ -+ { -+#ifdef DBG_RX_COUNTER_DUMP -+ rtw_dump_rx_counters(padapter); -+#endif -+ dm_DynamicUsbTxAgg(padapter, 0); -+ } -+ rtw_hal_dm_watchdog(padapter); -+ -+ /* check_hw_pbc(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type); */ -+ -+#ifdef CONFIG_BT_COEXIST -+ /* BT-Coexist */ -+ rtw_btcoex_Handler(padapter); -+#endif -+ -+#ifdef CONFIG_RTW_MULTI_AP -+ rtw_ch_util_rpt(padapter); -+#endif -+ -+#ifdef CONFIG_DFS_MASTER -+ rtw_chset_chk_non_ocp_finish(adapter_to_rfctl(padapter)); -+#endif -+ -+#ifdef CONFIG_IPS_CHECK_IN_WD -+ /* always call rtw_ps_processor() at last one. */ -+ rtw_ps_processor(padapter); -+#endif -+ -+#ifdef CONFIG_MCC_MODE -+ rtw_hal_mcc_sw_status_check(padapter); -+#endif /* CONFIG_MCC_MODE */ -+ -+ rtw_hal_periodic_tsf_update_chk(padapter); -+} -+ -+#ifdef CONFIG_LPS -+struct lps_ctrl_wk_parm { -+ s8 lps_level; -+ #ifdef CONFIG_LPS_1T1R -+ s8 lps_1t1r; -+ #endif -+}; -+ -+void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type, u8 *buf) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct lps_ctrl_wk_parm *parm = (struct lps_ctrl_wk_parm *)buf; -+ u8 mstatus; -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) -+ || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) -+ return; -+ -+ switch (lps_ctrl_type) { -+ case LPS_CTRL_SCAN: -+ /* RTW_INFO("LPS_CTRL_SCAN\n"); */ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_ScanNotify(padapter, _TRUE); -+#endif /* CONFIG_BT_COEXIST */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ /* connect */ -+ LPS_Leave(padapter, "LPS_CTRL_SCAN"); -+ } -+ break; -+ case LPS_CTRL_JOINBSS: -+ /* RTW_INFO("LPS_CTRL_JOINBSS\n"); */ -+ LPS_Leave(padapter, "LPS_CTRL_JOINBSS"); -+ break; -+ case LPS_CTRL_CONNECT: -+ /* RTW_INFO("LPS_CTRL_CONNECT\n"); */ -+ mstatus = 1;/* connect */ -+ /* Reset LPS Setting */ -+ pwrpriv->LpsIdleCount = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_MediaStatusNotify(padapter, mstatus); -+#endif /* CONFIG_BT_COEXIST */ -+ break; -+ case LPS_CTRL_DISCONNECT: -+ /* RTW_INFO("LPS_CTRL_DISCONNECT\n"); */ -+ mstatus = 0;/* disconnect */ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_MediaStatusNotify(padapter, mstatus); -+#endif /* CONFIG_BT_COEXIST */ -+ LPS_Leave(padapter, "LPS_CTRL_DISCONNECT"); -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); -+ break; -+ case LPS_CTRL_SPECIAL_PACKET: -+ /* RTW_INFO("LPS_CTRL_SPECIAL_PACKET\n"); */ -+ rtw_set_lps_deny(padapter, LPS_DELAY_MS); -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_SpecialPacketNotify(padapter, PACKET_DHCP); -+#endif /* CONFIG_BT_COEXIST */ -+ LPS_Leave(padapter, "LPS_CTRL_SPECIAL_PACKET"); -+ break; -+ case LPS_CTRL_LEAVE: -+ LPS_Leave(padapter, "LPS_CTRL_LEAVE"); -+ break; -+ case LPS_CTRL_LEAVE_SET_OPTION: -+ LPS_Leave(padapter, "LPS_CTRL_LEAVE_SET_OPTION"); -+ if (parm) { -+ if (parm->lps_level >= 0) -+ pwrpriv->lps_level = parm->lps_level; -+ #ifdef CONFIG_LPS_1T1R -+ if (parm->lps_1t1r >= 0) -+ pwrpriv->lps_1t1r = parm->lps_1t1r; -+ #endif -+ } -+ break; -+ case LPS_CTRL_LEAVE_CFG80211_PWRMGMT: -+ LPS_Leave(padapter, "CFG80211_PWRMGMT"); -+ break; -+ case LPS_CTRL_TRAFFIC_BUSY: -+ LPS_Leave(padapter, "LPS_CTRL_TRAFFIC_BUSY"); -+ break; -+ case LPS_CTRL_TX_TRAFFIC_LEAVE: -+ LPS_Leave(padapter, "LPS_CTRL_TX_TRAFFIC_LEAVE"); -+ break; -+ case LPS_CTRL_RX_TRAFFIC_LEAVE: -+ LPS_Leave(padapter, "LPS_CTRL_RX_TRAFFIC_LEAVE"); -+ break; -+ case LPS_CTRL_ENTER: -+ LPS_Enter(padapter, "TRAFFIC_IDLE_1"); -+ break; -+ default: -+ break; -+ } -+ -+} -+ -+static u8 _rtw_lps_ctrl_wk_cmd(_adapter *adapter, u8 lps_ctrl_type, s8 lps_level, s8 lps_1t1r, u8 flags) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *parm; -+ struct lps_ctrl_wk_parm *wk_parm = NULL; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ if (lps_ctrl_type == LPS_CTRL_LEAVE_SET_OPTION) { -+ wk_parm = rtw_zmalloc(sizeof(*wk_parm)); -+ if (wk_parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ wk_parm->lps_level = lps_level; -+ #ifdef CONFIG_LPS_1T1R -+ wk_parm->lps_1t1r = lps_1t1r; -+ #endif -+ } -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly */ -+ lps_ctrl_wk_hdl(adapter, lps_ctrl_type, (u8 *)wk_parm); -+ if (wk_parm) -+ rtw_mfree(wk_parm, sizeof(*wk_parm)); -+ } else { -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ parm = rtw_zmalloc(sizeof(*parm)); -+ if (parm == NULL) { -+ if (wk_parm) -+ rtw_mfree(wk_parm, sizeof(*wk_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ parm->ec_id = LPS_CTRL_WK_CID; -+ parm->type = lps_ctrl_type; -+ parm->size = wk_parm ? sizeof(*wk_parm) : 0; -+ parm->pbuf = (u8 *)wk_parm; -+ -+ cmdobj = rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ rtw_mfree(parm, sizeof(*parm)); -+ if (wk_parm) -+ rtw_mfree(wk_parm, sizeof(*wk_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_DRV_EXTRA); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 2000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status != RTW_SCTX_DONE_SUCCESS) -+ res = _FAIL; -+ } -+ } -+ -+exit: -+ return res; -+} -+ -+u8 rtw_lps_ctrl_wk_cmd(_adapter *adapter, u8 lps_ctrl_type, u8 flags) -+{ -+ return _rtw_lps_ctrl_wk_cmd(adapter, lps_ctrl_type, -1, -1, flags); -+} -+ -+u8 rtw_lps_ctrl_leave_set_level_cmd(_adapter *adapter, u8 lps_level, u8 flags) -+{ -+ return _rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_LEAVE_SET_OPTION, lps_level, -1, flags); -+} -+ -+#ifdef CONFIG_LPS_1T1R -+u8 rtw_lps_ctrl_leave_set_1t1r_cmd(_adapter *adapter, u8 lps_1t1r, u8 flags) -+{ -+ return _rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_LEAVE_SET_OPTION, -1, lps_1t1r, flags); -+} -+#endif -+ -+void rtw_dm_in_lps_hdl(_adapter *padapter) -+{ -+ rtw_hal_set_hwreg(padapter, HW_VAR_DM_IN_LPS_LCLK, NULL); -+} -+ -+u8 rtw_dm_in_lps_wk_cmd(_adapter *padapter) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = DM_IN_LPS_WK_CID; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ -+ return res; -+ -+} -+ -+void rtw_lps_change_dtim_hdl(_adapter *padapter, u8 dtim) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ -+ if (dtim <= 0 || dtim > 16) -+ return; -+ -+#ifdef CONFIG_BT_COEXIST -+ if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) -+ return; -+#endif -+ -+#ifdef CONFIG_LPS_LCLK -+ _enter_pwrlock(&pwrpriv->lock); -+#endif -+ -+ if (pwrpriv->dtim != dtim) { -+ RTW_INFO("change DTIM from %d to %d, bFwCurrentInPSMode=%d, ps_mode=%d\n", pwrpriv->dtim, dtim, -+ pwrpriv->bFwCurrentInPSMode, pwrpriv->pwr_mode); -+ -+ pwrpriv->dtim = dtim; -+ } -+ -+ if ((pwrpriv->bFwCurrentInPSMode == _TRUE) && (pwrpriv->pwr_mode > PS_MODE_ACTIVE)) { -+ u8 ps_mode = pwrpriv->pwr_mode; -+ -+ /* RTW_INFO("change DTIM from %d to %d, ps_mode=%d\n", pwrpriv->dtim, dtim, ps_mode); */ -+ -+ rtw_exec_lps(padapter, ps_mode); -+ } -+ -+#ifdef CONFIG_LPS_LCLK -+ _exit_pwrlock(&pwrpriv->lock); -+#endif -+ -+} -+ -+#endif -+ -+u8 rtw_lps_change_dtim_cmd(_adapter *padapter, u8 dtim) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ /* -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (padapter->hw_port != HW_PORT0) -+ return res; -+ #endif -+ */ -+ { -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = LPS_CHANGE_DTIM_CID; -+ pdrvextra_cmd_parm->type = dtim; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ } -+ -+exit: -+ -+ return res; -+ -+} -+ -+#if (RATE_ADAPTIVE_SUPPORT == 1) -+void rpt_timer_setting_wk_hdl(_adapter *padapter, u16 minRptTime) -+{ -+ rtw_hal_set_hwreg(padapter, HW_VAR_RPT_TIMER_SETTING, (u8 *)(&minRptTime)); -+} -+ -+u8 rtw_rpt_timer_cfg_cmd(_adapter *padapter, u16 minRptTime) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ -+ u8 res = _SUCCESS; -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = RTP_TIMER_CFG_WK_CID; -+ pdrvextra_cmd_parm->type = minRptTime; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+exit: -+ -+ -+ return res; -+ -+} -+ -+#endif -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+void antenna_select_wk_hdl(_adapter *padapter, u8 antenna) -+{ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_ANTDIV_SELECT, &antenna, _TRUE); -+} -+ -+u8 rtw_antenna_select_cmd(_adapter *padapter, u8 antenna, u8 enqueue) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ u8 bSupportAntDiv = _FALSE; -+ u8 res = _SUCCESS; -+ int i; -+ -+ rtw_hal_get_def_var(padapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); -+ if (_FALSE == bSupportAntDiv) -+ return _FAIL; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (rtw_linked_check(dvobj->padapters[i])) -+ return _FAIL; -+ } -+ -+ if (_TRUE == enqueue) { -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = ANT_SELECT_WK_CID; -+ pdrvextra_cmd_parm->type = antenna; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ } else -+ antenna_select_wk_hdl(padapter, antenna); -+exit: -+ -+ -+ return res; -+ -+} -+#endif -+ -+void rtw_dm_ra_mask_hdl(_adapter *padapter, struct sta_info *psta) -+{ -+ if (psta) -+ set_sta_rate(padapter, psta); -+} -+ -+u8 rtw_dm_ra_mask_wk_cmd(_adapter *padapter, u8 *psta) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = DM_RA_MSK_WK_CID; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = psta; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ -+ return res; -+ -+} -+ -+void power_saving_wk_hdl(_adapter *padapter) -+{ -+ rtw_ps_processor(padapter); -+} -+ -+/* add for CONFIG_IEEE80211W, none 11w can use it */ -+void reset_securitypriv_hdl(_adapter *padapter) -+{ -+ rtw_reset_securitypriv(padapter); -+} -+ -+#ifdef CONFIG_P2P -+u8 p2p_protocol_wk_cmd(_adapter *padapter, int intCmdType) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ return res; -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = P2P_PROTO_WK_CID; -+ pdrvextra_cmd_parm->type = intCmdType; /* As the command tppe. */ -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; /* Must be NULL here */ -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ -+ -+ return res; -+ -+} -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+static struct rtw_roch_parm *rtw_alloc_roch_parm(_adapter *adapter -+ , u64 cookie, struct wireless_dev *wdev -+ , struct ieee80211_channel *ch, enum nl80211_channel_type ch_type -+ , unsigned int duration -+ , u8 flags -+) -+{ -+ struct rtw_roch_parm *roch_parm; -+ bool cancel = duration ? 0 : 1; -+ -+ roch_parm = (struct rtw_roch_parm *)rtw_zmalloc(sizeof(struct rtw_roch_parm)); -+ if (!roch_parm) -+ return NULL; -+ -+ roch_parm->cookie = cookie; -+ roch_parm->wdev = wdev; -+ if (!cancel) { -+ _rtw_memcpy(&roch_parm->ch, ch, sizeof(struct ieee80211_channel)); -+ roch_parm->ch_type = ch_type; -+ roch_parm->duration = duration; -+ } -+ -+ return roch_parm; -+} -+ -+inline u8 rtw_roch_cmd(_adapter *adapter -+ , u64 cookie, struct wireless_dev *wdev -+ , struct ieee80211_channel *ch, enum nl80211_channel_type ch_type -+ , unsigned int duration -+ , u8 flags -+) -+{ -+ struct rtw_roch_parm *roch_parm; -+ -+ roch_parm = rtw_alloc_roch_parm(adapter, cookie, wdev, ch, ch_type, duration, flags); -+ if (!roch_parm) -+ return _FAIL; -+ -+ return rtw_roch_wk_cmd(adapter, ROCH_RO_CH_WK, roch_parm, flags); -+} -+ -+inline u8 rtw_cancel_roch_cmd(_adapter *adapter, u64 cookie, struct wireless_dev *wdev, u8 flags) -+{ -+ struct rtw_roch_parm *roch_parm; -+ -+ roch_parm = rtw_alloc_roch_parm(adapter, cookie, wdev, NULL, 0, 0, flags); -+ if (!roch_parm) -+ return _FAIL; -+ -+ return rtw_roch_wk_cmd(adapter, ROCH_CANCEL_RO_CH_WK, roch_parm, flags); -+} -+ -+inline u8 rtw_mgnt_tx_cmd(_adapter *adapter, u8 tx_ch, u8 no_cck, const u8 *buf, size_t len, int wait_ack, u8 flags) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *parm; -+ struct mgnt_tx_parm *mgnt_parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ mgnt_parm = (struct mgnt_tx_parm *)rtw_zmalloc(sizeof(struct mgnt_tx_parm)); -+ if (mgnt_parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ mgnt_parm->tx_ch = tx_ch; -+ mgnt_parm->no_cck = no_cck; -+ mgnt_parm->buf = buf; -+ mgnt_parm->len = len; -+ mgnt_parm->wait_ack = wait_ack; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ -+ if (H2C_SUCCESS != rtw_mgnt_tx_handler(adapter, (u8 *)mgnt_parm)) -+ res = _FAIL; -+ rtw_mfree((u8 *)mgnt_parm, sizeof(*mgnt_parm)); -+ } else { -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (parm == NULL) { -+ rtw_mfree((u8 *)mgnt_parm, sizeof(*mgnt_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ parm->ec_id = MGNT_TX_WK_CID; -+ parm->type = 0; -+ parm->size = sizeof(*mgnt_parm); -+ parm->pbuf = (u8 *)mgnt_parm; -+ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ rtw_mfree((u8 *)mgnt_parm, sizeof(*mgnt_parm)); -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_DRV_EXTRA); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 10 * 1000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status != RTW_SCTX_DONE_SUCCESS) -+ res = _FAIL; -+ } -+ } -+ -+exit: -+ return res; -+} -+#endif -+ -+u8 rtw_ps_cmd(_adapter *padapter) -+{ -+ struct cmd_obj *ppscmd; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ -+ u8 res = _SUCCESS; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (!is_primary_adapter(padapter)) -+ goto exit; -+#endif -+ -+ ppscmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ppscmd == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ppscmd, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = POWER_SAVING_CTRL_WK_CID; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ init_h2fwcmd_w_parm_no_rsp(ppscmd, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ppscmd); -+ -+exit: -+ -+ -+ return res; -+ -+} -+ -+#if CONFIG_DFS -+void rtw_dfs_ch_switch_hdl(struct dvobj_priv *dvobj) -+{ -+ struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); -+ _adapter *pri_adapter = dvobj_get_primary_adapter(dvobj); -+ struct mlme_ext_priv *pmlmeext = &pri_adapter->mlmeextpriv; -+ u8 ifbmp_m = rtw_mi_get_ap_mesh_ifbmp(pri_adapter); -+ u8 ifbmp_s = rtw_mi_get_ld_sta_ifbmp(pri_adapter); -+ s16 req_ch; -+ u8 req_bw = CHANNEL_WIDTH_20, req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ -+ rtw_hal_macid_sleep_all_used(pri_adapter); -+ -+ if (rtw_chset_search_ch(rfctl->channel_set, rfctl->csa_ch) >= 0 -+ && !rtw_chset_is_ch_non_ocp(rfctl->channel_set, rfctl->csa_ch) -+ ) { -+ /* CSA channel available and valid */ -+ req_ch = rfctl->csa_ch; -+ RTW_INFO("%s valid CSA ch%u\n", __func__, rfctl->csa_ch); -+ } else if (ifbmp_m) { -+ /* no available or valid CSA channel, having AP/MESH ifaces */ -+ req_ch = REQ_CH_NONE; -+ RTW_INFO("%s ch sel by AP/MESH ifaces\n", __func__); -+ } else { -+ /* no available or valid CSA channel and no AP/MESH ifaces */ -+ if (!IsSupported24G(dvobj_to_regsty(dvobj)->wireless_mode) -+ #ifdef CONFIG_DFS_MASTER -+ || rfctl->radar_detected -+ #endif -+ ) -+ req_ch = 36; -+ else -+ req_ch = 1; -+ RTW_INFO("%s switch to ch%d\n", __func__, req_ch); -+ } -+ -+ /* only support 80 Mhz so far */ -+ if(rfctl->csa_ch_width == 1 || rfctl->csa_ch_width == 2 || rfctl->csa_ch_width == 3) { -+ if (rtw_get_offset_by_chbw(req_ch, CHANNEL_WIDTH_80, &req_offset)) { -+ req_bw = CHANNEL_WIDTH_80; -+ } else { -+ req_bw = CHANNEL_WIDTH_20; -+ req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ } else if(rfctl->csa_ch_offset == 1) { -+ req_bw = CHANNEL_WIDTH_40; -+ req_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ } else if(rfctl->csa_ch_offset == 3) { -+ req_bw = CHANNEL_WIDTH_40; -+ req_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ } else{ -+ req_bw = CHANNEL_WIDTH_20; -+ req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ -+ RTW_INFO("req_ch=%d, req_bw=%d, req_offset=%d, ifbmp_m=0x%02x, ifbmp_s=0x%02x\n" -+ , req_ch, req_bw, req_offset, ifbmp_m, ifbmp_s); -+ -+ /* update ch, bw, offset for all asoc STA ifaces */ -+ if (ifbmp_s) { -+ _adapter *iface; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface || !(ifbmp_s & BIT(iface->iface_id))) -+ continue; -+ -+ /* update STA mode ch/bw/offset */ -+ iface->mlmeextpriv.cur_channel = req_ch; -+ iface->mlmeextpriv.cur_bwmode = req_bw; -+ iface->mlmeextpriv.cur_ch_offset = req_offset; -+ /* updaet STA mode DSConfig , ap mode will update in rtw_change_bss_chbw_cmd */ -+ iface->mlmepriv.cur_network.network.Configuration.DSConfig = req_ch; -+ set_fwstate(&iface->mlmepriv, WIFI_CSA_UPDATE_BEACON); -+ -+ } -+ } -+ -+ if (rfctl->csa_ch > 0) { -+ RTW_INFO("pmlmeext->csa_timer 70 seconds\n"); -+ /* wait 70 seconds for receiving beacons */ -+ _set_timer(&pmlmeext->csa_timer, CAC_TIME_MS + 10000); -+ } -+ -+#ifdef CONFIG_AP_MODE -+ if (ifbmp_m) { -+ /* trigger channel selection with consideraton of asoc STA ifaces */ -+ rtw_change_bss_chbw_cmd(dvobj_get_primary_adapter(dvobj), RTW_CMDF_DIRECTLY -+ , ifbmp_m, 0, req_ch, REQ_BW_ORI, REQ_OFFSET_NONE); -+ } else -+#endif -+ { -+ /* no AP/MESH iface, switch DFS status and channel directly */ -+ rtw_warn_on(req_ch <= 0); -+ #ifdef CONFIG_DFS_MASTER -+ rtw_dfs_rd_en_decision(pri_adapter, MLME_OPCH_SWITCH, ifbmp_s); -+ #endif -+ LeaveAllPowerSaveModeDirect(pri_adapter); -+ set_channel_bwmode(pri_adapter, req_ch, req_offset, req_bw); -+ /* update union ch/bw/offset for STA only */ -+ rtw_mi_update_union_chan_inf(pri_adapter, req_ch, req_offset, req_bw); -+ rtw_rfctl_update_op_mode(rfctl, 0, 0); -+ } -+ -+ rfctl->csa_ch = 0; -+ rfctl->csa_switch_cnt = 0; -+ rfctl->csa_ch_offset = 0; -+ rfctl->csa_ch_width = 0; -+ rfctl->csa_ch_freq_seg0 = 0; -+ rfctl->csa_ch_freq_seg1 = 0; -+ -+ rtw_hal_macid_wakeup_all_used(pri_adapter); -+ rtw_mi_os_xmit_schedule(pri_adapter); -+} -+#endif /* CONFIG_DFS */ -+ -+#ifdef CONFIG_AP_MODE -+ -+static void rtw_chk_hi_queue_hdl(_adapter *padapter) -+{ -+ struct sta_info *psta_bmc; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ systime start = rtw_get_current_time(); -+ u8 empty = _FALSE; -+ -+ psta_bmc = rtw_get_bcmc_stainfo(padapter); -+ if (!psta_bmc) -+ return; -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); -+ -+ while (_FALSE == empty && rtw_get_passing_time_ms(start) < rtw_get_wait_hiq_empty_ms()) { -+ rtw_msleep_os(100); -+ rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty); -+ } -+ -+ if (psta_bmc->sleepq_len == 0) { -+ if (empty == _SUCCESS) { -+ bool update_tim = _FALSE; -+ -+ if (rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, 0)) -+ update_tim = _TRUE; -+ -+ rtw_tim_map_clear(padapter, pstapriv->tim_bitmap, 0); -+ rtw_tim_map_clear(padapter, pstapriv->sta_dz_bitmap, 0); -+ -+ if (update_tim == _TRUE) -+ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0,"bmc sleepq and HIQ empty"); -+ } else /* re check again */ -+ rtw_chk_hi_queue_cmd(padapter); -+ -+ } -+ -+} -+ -+u8 rtw_chk_hi_queue_cmd(_adapter *padapter) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = CHECK_HIQ_WK_CID; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ -+ return res; -+ -+} -+ -+#ifdef CONFIG_DFS_MASTER -+u8 rtw_dfs_rd_hdl(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ u8 cch; -+ -+ if (!rfctl->radar_detect_enabled) -+ goto exit; -+ -+ cch = rtw_get_center_ch(rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset); -+ -+ if (dvobj->oper_channel != rfctl->radar_detect_ch -+ || rtw_get_passing_time_ms(rtw_get_on_oper_ch_time(adapter)) < 300 -+ ) { -+ /* offchannel, bypass radar detect */ -+ goto cac_status_chk; -+ } -+ -+ if (IS_CH_WAITING(rfctl) && !IS_UNDER_CAC(rfctl)) { -+ /* non_ocp, bypass radar detect */ -+ goto cac_status_chk; -+ } -+ -+ if (!rfctl->dbg_dfs_fake_radar_detect_cnt -+ && rtw_odm_radar_detect(adapter) != _TRUE) -+ goto cac_status_chk; -+ -+ if (!rfctl->dbg_dfs_fake_radar_detect_cnt -+ && rfctl->dbg_dfs_radar_detect_trigger_non -+ ) { -+ /* radar detect debug mode, trigger no mlme flow */ -+ RTW_INFO("%s radar detected on test mode, trigger no mlme flow\n", __func__); -+ goto cac_status_chk; -+ } -+ -+ if (rfctl->dbg_dfs_fake_radar_detect_cnt != 0) { -+ RTW_INFO("%s fake radar detected, cnt:%d\n", __func__ -+ , rfctl->dbg_dfs_fake_radar_detect_cnt); -+ rfctl->dbg_dfs_fake_radar_detect_cnt--; -+ } else -+ RTW_INFO("%s radar detected\n", __func__); -+ -+ rfctl->radar_detected = 1; -+ -+ rtw_chset_update_non_ocp(rfctl->channel_set -+ , rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset); -+ -+ if (IS_UNDER_CAC(rfctl)) -+ rtw_nlrtw_cac_abort_event(adapter, cch, rfctl->radar_detect_bw); -+ rtw_nlrtw_radar_detect_event(adapter, cch, rfctl->radar_detect_bw); -+ -+ rtw_dfs_ch_switch_hdl(dvobj); -+ -+ if (rfctl->radar_detect_enabled) -+ goto set_timer; -+ goto exit; -+ -+cac_status_chk: -+ -+ if (!IS_CAC_STOPPED(rfctl) -+ && ((IS_UNDER_CAC(rfctl) && rfctl->cac_force_stop) -+ || !IS_CH_WAITING(rfctl) -+ ) -+ ) { -+ u8 pause = 0x00; -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_TXPAUSE, &pause); -+ rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED; -+ rtw_nlrtw_cac_finish_event(adapter, cch, rfctl->radar_detect_bw); -+ -+ if (rtw_mi_check_fwstate(adapter, WIFI_UNDER_LINKING|WIFI_UNDER_SURVEY) == _FALSE) { -+ u8 doiqk = _TRUE; -+ u8 u_ch, u_bw, u_offset; -+ -+ rtw_hal_set_hwreg(adapter , HW_VAR_DO_IQK , &doiqk); -+ -+ if (rtw_mi_get_ch_setting_union(adapter, &u_ch, &u_bw, &u_offset)) -+ set_channel_bwmode(adapter, u_ch, u_offset, u_bw); -+ else -+ rtw_warn_on(1); -+ -+ doiqk = _FALSE; -+ rtw_hal_set_hwreg(adapter , HW_VAR_DO_IQK , &doiqk); -+ -+ #ifdef CONFIG_AP_MODE -+ ResumeTxBeacon(adapter); -+ rtw_mi_tx_beacon_hdl(adapter); -+ #endif -+ } -+ } -+ -+set_timer: -+ _set_timer(&rfctl->radar_detect_timer -+ , rtw_odm_radar_detect_polling_int_ms(dvobj)); -+ -+exit: -+ return H2C_SUCCESS; -+} -+ -+u8 rtw_dfs_rd_cmd(_adapter *adapter, bool enqueue) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *parm; -+ struct cmd_priv *cmdpriv = &adapter->cmdpriv; -+ u8 res = _FAIL; -+ -+ if (enqueue) { -+ cmdobj = rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) -+ goto exit; -+ -+ parm = rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (parm == NULL) { -+ rtw_mfree(cmdobj, sizeof(struct cmd_obj)); -+ goto exit; -+ } -+ -+ parm->ec_id = DFS_RADAR_DETECT_WK_CID; -+ parm->type = 0; -+ parm->size = 0; -+ parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_DRV_EXTRA); -+ res = rtw_enqueue_cmd(cmdpriv, cmdobj); -+ } else { -+ rtw_dfs_rd_hdl(adapter); -+ res = _SUCCESS; -+ } -+ -+exit: -+ return res; -+} -+ -+void rtw_dfs_rd_timer_hdl(void *ctx) -+{ -+ struct rf_ctl_t *rfctl = (struct rf_ctl_t *)ctx; -+ struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); -+ -+ rtw_dfs_rd_cmd(dvobj_get_primary_adapter(dvobj), _TRUE); -+} -+ -+static void rtw_dfs_rd_enable(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, bool bypass_cac) -+{ -+ struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ -+ RTW_INFO("%s on %u,%u,%u\n", __func__, ch, bw, offset); -+ -+ if (bypass_cac) -+ rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED; -+ else if (rtw_is_cac_reset_needed(rfctl, ch, bw, offset) == _TRUE) -+ rtw_reset_cac(rfctl, ch, bw, offset); -+ -+ rfctl->radar_detect_by_others = _FALSE; -+ rfctl->radar_detect_ch = ch; -+ rfctl->radar_detect_bw = bw; -+ rfctl->radar_detect_offset = offset; -+ -+ rfctl->radar_detected = 0; -+ -+ if (IS_CH_WAITING(rfctl)) -+ StopTxBeacon(adapter); -+ -+ if (!rfctl->radar_detect_enabled) { -+ RTW_INFO("%s set radar_detect_enabled\n", __func__); -+ rfctl->radar_detect_enabled = 1; -+ #ifdef CONFIG_LPS -+ LPS_Leave(adapter, "RADAR_DETECT_EN"); -+ #endif -+ _set_timer(&rfctl->radar_detect_timer -+ , rtw_odm_radar_detect_polling_int_ms(dvobj)); -+ -+ if (rtw_rfctl_overlap_radar_detect_ch(rfctl)) { -+ if (IS_CH_WAITING(rfctl)) { -+ u8 pause = 0xFF; -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_TXPAUSE, &pause); -+ } -+ rtw_odm_radar_detect_enable(adapter); -+ } -+ } -+} -+ -+static void rtw_dfs_rd_disable(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, bool by_others) -+{ -+ _adapter *adapter = dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl)); -+ -+ rfctl->radar_detect_by_others = by_others; -+ -+ if (rfctl->radar_detect_enabled) { -+ bool overlap_radar_detect_ch = rtw_rfctl_overlap_radar_detect_ch(rfctl); -+ -+ RTW_INFO("%s clear radar_detect_enabled\n", __func__); -+ -+ rfctl->radar_detect_enabled = 0; -+ rfctl->radar_detected = 0; -+ rfctl->radar_detect_ch = 0; -+ rfctl->radar_detect_bw = 0; -+ rfctl->radar_detect_offset = 0; -+ rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED; -+ _cancel_timer_ex(&rfctl->radar_detect_timer); -+ -+ if (rtw_mi_check_fwstate(adapter, WIFI_UNDER_LINKING|WIFI_UNDER_SURVEY) == _FALSE) { -+ ResumeTxBeacon(adapter); -+ rtw_mi_tx_beacon_hdl(adapter); -+ } -+ -+ if (overlap_radar_detect_ch) { -+ u8 pause = 0x00; -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_TXPAUSE, &pause); -+ rtw_odm_radar_detect_disable(adapter); -+ } -+ } -+ -+ if (by_others) { -+ rfctl->radar_detect_ch = ch; -+ rfctl->radar_detect_bw = bw; -+ rfctl->radar_detect_offset = offset; -+ } -+} -+ -+void rtw_dfs_rd_en_decision(_adapter *adapter, u8 mlme_act, u8 excl_ifbmp) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ struct mi_state mstate; -+ u8 ifbmp; -+ u8 u_ch, u_bw, u_offset; -+ bool ld_sta_in_dfs = _FALSE; -+ bool sync_ch = _FALSE; /* _FALSE: asign channel directly */ -+ bool needed = _FALSE; -+ -+ if (mlme_act == MLME_OPCH_SWITCH -+ || mlme_act == MLME_ACTION_NONE -+ ) { -+ ifbmp = ~excl_ifbmp; -+ rtw_mi_status_by_ifbmp(dvobj, ifbmp, &mstate); -+ rtw_mi_get_ch_setting_union_by_ifbmp(dvobj, ifbmp, &u_ch, &u_bw, &u_offset); -+ } else { -+ ifbmp = ~excl_ifbmp & ~BIT(adapter->iface_id); -+ rtw_mi_status_by_ifbmp(dvobj, ifbmp, &mstate); -+ rtw_mi_get_ch_setting_union_by_ifbmp(dvobj, ifbmp, &u_ch, &u_bw, &u_offset); -+ if (u_ch != 0) -+ sync_ch = _TRUE; -+ -+ switch (mlme_act) { -+ case MLME_STA_CONNECTING: -+ MSTATE_STA_LG_NUM(&mstate)++; -+ break; -+ case MLME_STA_CONNECTED: -+ MSTATE_STA_LD_NUM(&mstate)++; -+ break; -+ case MLME_STA_DISCONNECTED: -+ break; -+#ifdef CONFIG_AP_MODE -+ case MLME_AP_STARTED: -+ MSTATE_AP_NUM(&mstate)++; -+ break; -+ case MLME_AP_STOPPED: -+ break; -+#endif -+#ifdef CONFIG_RTW_MESH -+ case MLME_MESH_STARTED: -+ MSTATE_MESH_NUM(&mstate)++; -+ break; -+ case MLME_MESH_STOPPED: -+ break; -+#endif -+ default: -+ rtw_warn_on(1); -+ break; -+ } -+ -+ if (sync_ch == _TRUE) { -+ if (!MLME_IS_OPCH_SW(adapter)) { -+ if (!rtw_is_chbw_grouped(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset)) { -+ RTW_INFO(FUNC_ADPT_FMT" can't sync %u,%u,%u with %u,%u,%u\n", FUNC_ADPT_ARG(adapter) -+ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset, u_ch, u_bw, u_offset); -+ goto apply; -+ } -+ -+ rtw_sync_chbw(&mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset -+ , &u_ch, &u_bw, &u_offset); -+ } -+ } else { -+ u_ch = mlmeext->cur_channel; -+ u_bw = mlmeext->cur_bwmode; -+ u_offset = mlmeext->cur_ch_offset; -+ } -+ } -+ -+ if (MSTATE_STA_LG_NUM(&mstate) > 0) { -+ /* STA mode is linking */ -+ goto apply; -+ } -+ -+ if (MSTATE_STA_LD_NUM(&mstate) > 0) { -+ if (rtw_chset_is_dfs_chbw(rfctl->channel_set, u_ch, u_bw, u_offset)) { -+ /* -+ * if operate as slave w/o radar detect, -+ * rely on AP on which STA mode connects -+ */ -+ if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_rfctl_dfs_domain_unknown(rfctl)) -+ needed = _TRUE; -+ ld_sta_in_dfs = _TRUE; -+ } -+ goto apply; -+ } -+ -+ if (!MSTATE_AP_NUM(&mstate) && !MSTATE_MESH_NUM(&mstate)) { -+ /* No working AP/Mesh mode */ -+ goto apply; -+ } -+ -+ if (rtw_chset_is_dfs_chbw(rfctl->channel_set, u_ch, u_bw, u_offset)) -+ needed = _TRUE; -+ -+apply: -+ -+ RTW_INFO(FUNC_ADPT_FMT" needed:%d, mlme_act:%u, excl_ifbmp:0x%02x\n" -+ , FUNC_ADPT_ARG(adapter), needed, mlme_act, excl_ifbmp); -+ RTW_INFO(FUNC_ADPT_FMT" ld_sta_num:%u, lg_sta_num:%u, ap_num:%u, mesh_num:%u, %u,%u,%u\n" -+ , FUNC_ADPT_ARG(adapter), MSTATE_STA_LD_NUM(&mstate), MSTATE_STA_LG_NUM(&mstate) -+ , MSTATE_AP_NUM(&mstate), MSTATE_MESH_NUM(&mstate) -+ , u_ch, u_bw, u_offset); -+ -+ if (needed == _TRUE) -+ rtw_dfs_rd_enable(rfctl, u_ch, u_bw, u_offset, ld_sta_in_dfs); -+ else -+ rtw_dfs_rd_disable(rfctl, u_ch, u_bw, u_offset, ld_sta_in_dfs); -+} -+ -+u8 rtw_dfs_rd_en_decision_cmd(_adapter *adapter) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *parm; -+ struct cmd_priv *cmdpriv = &adapter->cmdpriv; -+ u8 res = _FAIL; -+ -+ cmdobj = rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) -+ goto exit; -+ -+ parm = rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (parm == NULL) { -+ rtw_mfree(cmdobj, sizeof(struct cmd_obj)); -+ goto exit; -+ } -+ -+ parm->ec_id = DFS_RADAR_DETECT_EN_DEC_WK_CID; -+ parm->type = 0; -+ parm->size = 0; -+ parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_DRV_EXTRA); -+ res = rtw_enqueue_cmd(cmdpriv, cmdobj); -+ -+exit: -+ return res; -+} -+#endif /* CONFIG_DFS_MASTER */ -+ -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_BT_COEXIST -+struct btinfo { -+ u8 cid; -+ u8 len; -+ -+ u8 bConnection:1; -+ u8 bSCOeSCO:1; -+ u8 bInQPage:1; -+ u8 bACLBusy:1; -+ u8 bSCOBusy:1; -+ u8 bHID:1; -+ u8 bA2DP:1; -+ u8 bFTP:1; -+ -+ u8 retry_cnt:4; -+ u8 rsvd_34:1; -+ u8 rsvd_35:1; -+ u8 rsvd_36:1; -+ u8 rsvd_37:1; -+ -+ u8 rssi; -+ -+ u8 rsvd_50:1; -+ u8 rsvd_51:1; -+ u8 rsvd_52:1; -+ u8 rsvd_53:1; -+ u8 rsvd_54:1; -+ u8 rsvd_55:1; -+ u8 eSCO_SCO:1; -+ u8 Master_Slave:1; -+ -+ u8 rsvd_6; -+ u8 rsvd_7; -+}; -+ -+void btinfo_evt_dump(void *sel, void *buf) -+{ -+ struct btinfo *info = (struct btinfo *)buf; -+ -+ RTW_PRINT_SEL(sel, "cid:0x%02x, len:%u\n", info->cid, info->len); -+ -+ if (info->len > 2) -+ RTW_PRINT_SEL(sel, "byte2:%s%s%s%s%s%s%s%s\n" -+ , info->bConnection ? "bConnection " : "" -+ , info->bSCOeSCO ? "bSCOeSCO " : "" -+ , info->bInQPage ? "bInQPage " : "" -+ , info->bACLBusy ? "bACLBusy " : "" -+ , info->bSCOBusy ? "bSCOBusy " : "" -+ , info->bHID ? "bHID " : "" -+ , info->bA2DP ? "bA2DP " : "" -+ , info->bFTP ? "bFTP" : "" -+ ); -+ -+ if (info->len > 3) -+ RTW_PRINT_SEL(sel, "retry_cnt:%u\n", info->retry_cnt); -+ -+ if (info->len > 4) -+ RTW_PRINT_SEL(sel, "rssi:%u\n", info->rssi); -+ -+ if (info->len > 5) -+ RTW_PRINT_SEL(sel, "byte5:%s%s\n" -+ , info->eSCO_SCO ? "eSCO_SCO " : "" -+ , info->Master_Slave ? "Master_Slave " : "" -+ ); -+} -+ -+static void rtw_btinfo_hdl(_adapter *adapter, u8 *buf, u16 buf_len) -+{ -+#define BTINFO_WIFI_FETCH 0x23 -+#define BTINFO_BT_AUTO_RPT 0x27 -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ struct btinfo_8761ATV *info = (struct btinfo_8761ATV *)buf; -+#else /* !CONFIG_BT_COEXIST_SOCKET_TRX */ -+ struct btinfo *info = (struct btinfo *)buf; -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ u8 cmd_idx; -+ u8 len; -+ -+ cmd_idx = info->cid; -+ -+ if (info->len > buf_len - 2) { -+ rtw_warn_on(1); -+ len = buf_len - 2; -+ } else -+ len = info->len; -+ -+ /* #define DBG_PROC_SET_BTINFO_EVT */ -+#ifdef DBG_PROC_SET_BTINFO_EVT -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ RTW_INFO("%s: btinfo[0]=%x,btinfo[1]=%x,btinfo[2]=%x,btinfo[3]=%x btinfo[4]=%x,btinfo[5]=%x,btinfo[6]=%x,btinfo[7]=%x\n" -+ , __func__, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); -+#else/* !CONFIG_BT_COEXIST_SOCKET_TRX */ -+ btinfo_evt_dump(RTW_DBGDUMP, info); -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+#endif /* DBG_PROC_SET_BTINFO_EVT */ -+ -+ /* transform BT-FW btinfo to WiFI-FW C2H format and notify */ -+ if (cmd_idx == BTINFO_WIFI_FETCH) -+ buf[1] = 0; -+ else if (cmd_idx == BTINFO_BT_AUTO_RPT) -+ buf[1] = 2; -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ else if (0x01 == cmd_idx || 0x02 == cmd_idx) -+ buf[1] = buf[0]; -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ rtw_btcoex_BtInfoNotify(adapter , len + 1, &buf[1]); -+} -+ -+u8 rtw_btinfo_cmd(_adapter *adapter, u8 *buf, u16 len) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ u8 *btinfo; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ btinfo = rtw_zmalloc(len); -+ if (btinfo == NULL) { -+ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = BTINFO_WK_CID; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = len; -+ pdrvextra_cmd_parm->pbuf = btinfo; -+ -+ _rtw_memcpy(btinfo, buf, len); -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ return res; -+} -+ -+static void rtw_btc_reduce_wl_txpwr_hdl(_adapter *adapter, u32 pwr_lvl) -+{ -+ rtw_btcoex_set_reduced_wl_pwr_lvl(adapter, pwr_lvl); -+ rtw_btcoex_do_reduce_wl_pwr_lvl(adapter); -+ -+ RTW_INFO(FUNC_ADPT_FMT ": BTC reduce WL TxPwr %d dB!\n", -+ FUNC_ADPT_ARG(adapter), pwr_lvl); -+} -+ -+u8 rtw_btc_reduce_wl_txpwr_cmd(_adapter *adapter, u32 val) -+{ -+ struct cmd_obj *pcmdobj; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ pcmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = BTC_REDUCE_WL_TXPWR_CID; -+ pdrvextra_cmd_parm->type = val; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(pcmdobj, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); -+ -+exit: -+ return res; -+} -+#endif /* CONFIG_BT_COEXIST */ -+ -+u8 rtw_test_h2c_cmd(_adapter *adapter, u8 *buf, u8 len) -+{ -+ struct cmd_obj *pcmdobj; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ u8 *ph2c_content; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ pcmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ ph2c_content = rtw_zmalloc(len); -+ if (ph2c_content == NULL) { -+ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = TEST_H2C_CID; -+ pdrvextra_cmd_parm->type = 0; -+ pdrvextra_cmd_parm->size = len; -+ pdrvextra_cmd_parm->pbuf = ph2c_content; -+ -+ _rtw_memcpy(ph2c_content, buf, len); -+ -+ init_h2fwcmd_w_parm_no_rsp(pcmdobj, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); -+ -+exit: -+ return res; -+} -+ -+#ifdef CONFIG_MP_INCLUDED -+static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ int ret = H2C_SUCCESS; -+ uint status = _SUCCESS; -+ -+ if (mp_cmd_id == MP_START) { -+ if (padapter->registrypriv.mp_mode == 0) { -+ rtw_intf_stop(padapter); -+ rtw_hal_deinit(padapter); -+ padapter->registrypriv.mp_mode = 1; -+#ifdef CONFIG_BT_COEXIST -+ padapter->mppriv.CureFuseBTCoex = pHalData->EEPROMBluetoothCoexist; -+ pHalData->EEPROMBluetoothCoexist = _FALSE; -+#endif -+#ifdef CONFIG_RF_POWER_TRIM -+ if (!IS_HARDWARE_TYPE_8814A(padapter) && !IS_HARDWARE_TYPE_8822B(padapter) && !IS_HARDWARE_TYPE_8822C(padapter)) { -+ padapter->registrypriv.RegPwrTrimEnable = 1; -+ rtw_hal_read_chip_info(padapter); -+ } -+#endif /*CONFIG_RF_POWER_TRIM*/ -+ rtw_reset_drv_sw(padapter); -+#ifdef CONFIG_NEW_NETDEV_HDL -+ if (!rtw_is_hw_init_completed(padapter)) { -+ status = rtw_hal_init(padapter); -+ if (status == _FAIL) { -+ ret = H2C_REJECTED; -+ goto exit; -+ } -+ rtw_hal_iface_init(padapter); -+ } -+#else -+ status = rtw_hal_init(padapter); -+ if (status == _FAIL) { -+ ret = H2C_REJECTED; -+ goto exit; -+ } -+#endif /*CONFIG_NEW_NETDEV_HDL*/ -+#ifndef RTW_HALMAC -+ rtw_intf_start(padapter); -+#endif /* !RTW_HALMAC */ -+#ifdef RTW_HALMAC /*for New IC*/ -+ MPT_InitializeAdapter(padapter, 1); -+#endif /* CONFIG_MP_INCLUDED */ -+ } -+ -+ if (padapter->registrypriv.mp_mode == 0) { -+ ret = H2C_REJECTED; -+ goto exit; -+ } -+ -+ if (padapter->mppriv.mode == MP_OFF) { -+ if (mp_start_test(padapter) == _FAIL) { -+ ret = H2C_REJECTED; -+ goto exit; -+ } -+ padapter->mppriv.mode = MP_ON; -+ MPT_PwrCtlDM(padapter, 0); -+ } -+ padapter->mppriv.bmac_filter = _FALSE; -+#ifdef CONFIG_RTL8723B -+#ifdef CONFIG_USB_HCI -+ rtw_write32(padapter, 0x765, 0x0000); -+ rtw_write32(padapter, 0x948, 0x0280); -+#else -+ rtw_write32(padapter, 0x765, 0x0000); -+ rtw_write32(padapter, 0x948, 0x0000); -+#endif -+#ifdef CONFIG_FOR_RTL8723BS_VQ0 -+ rtw_write32(padapter, 0x765, 0x0000); -+ rtw_write32(padapter, 0x948, 0x0280); -+#endif -+ rtw_write8(padapter, 0x66, 0x27); /*Open BT uart Log*/ -+ rtw_write8(padapter, 0xc50, 0x20); /*for RX init Gain*/ -+#endif -+ odm_write_dig(&pHalData->odmpriv, 0x20); -+ -+ } else if (mp_cmd_id == MP_STOP) { -+ if (padapter->registrypriv.mp_mode == 1) { -+ MPT_DeInitAdapter(padapter); -+ rtw_intf_stop(padapter); -+ rtw_hal_deinit(padapter); -+ padapter->registrypriv.mp_mode = 0; -+#ifdef CONFIG_BT_COEXIST -+ pHalData->EEPROMBluetoothCoexist = padapter->mppriv.CureFuseBTCoex; -+#endif -+ rtw_reset_drv_sw(padapter); -+#ifdef CONFIG_NEW_NETDEV_HDL -+ if (!rtw_is_hw_init_completed(padapter)) { -+ status = rtw_hal_init(padapter); -+ if (status == _FAIL) { -+ ret = H2C_REJECTED; -+ goto exit; -+ } -+ rtw_hal_iface_init(padapter); -+ } -+#else -+ status = rtw_hal_init(padapter); -+ if (status == _FAIL) { -+ ret = H2C_REJECTED; -+ goto exit; -+ } -+#endif /*CONFIG_NEW_NETDEV_HDL*/ -+#ifndef RTW_HALMAC -+ rtw_intf_start(padapter); -+#endif /* !RTW_HALMAC */ -+ } -+ -+ if (padapter->mppriv.mode != MP_OFF) { -+ mp_stop_test(padapter); -+ padapter->mppriv.mode = MP_OFF; -+ } -+ -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT"invalid id:%d\n", FUNC_ADPT_ARG(padapter), mp_cmd_id); -+ ret = H2C_PARAMETERS_ERROR; -+ rtw_warn_on(1); -+ } -+ -+exit: -+ return ret; -+} -+ -+u8 rtw_mp_cmd(_adapter *adapter, u8 mp_cmd_id, u8 flags) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ parm->ec_id = MP_CMD_WK_CID; -+ parm->type = mp_cmd_id; -+ parm->size = 0; -+ parm->pbuf = NULL; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ -+ if (H2C_SUCCESS != rtw_mp_cmd_hdl(adapter, mp_cmd_id)) -+ res = _FAIL; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ } else { -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_DRV_EXTRA); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 10 * 1000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status != RTW_SCTX_DONE_SUCCESS) -+ res = _FAIL; -+ } -+ } -+ -+exit: -+ return res; -+} -+#endif /*CONFIG_MP_INCLUDED*/ -+ -+#ifdef CONFIG_RTW_CUSTOMER_STR -+static s32 rtw_customer_str_cmd_hdl(_adapter *adapter, u8 write, const u8 *cstr) -+{ -+ int ret = H2C_SUCCESS; -+ -+ if (write) -+ ret = rtw_hal_h2c_customer_str_write(adapter, cstr); -+ else -+ ret = rtw_hal_h2c_customer_str_req(adapter); -+ -+ return ret == _SUCCESS ? H2C_SUCCESS : H2C_REJECTED; -+} -+ -+static u8 rtw_customer_str_cmd(_adapter *adapter, u8 write, const u8 *cstr) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *parm; -+ u8 *str = NULL; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ if (write) { -+ str = rtw_zmalloc(RTW_CUSTOMER_STR_LEN); -+ if (str == NULL) { -+ rtw_mfree((u8 *)parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ } -+ -+ parm->ec_id = CUSTOMER_STR_WK_CID; -+ parm->type = write; -+ parm->size = write ? RTW_CUSTOMER_STR_LEN : 0; -+ parm->pbuf = write ? str : NULL; -+ -+ if (write) -+ _rtw_memcpy(str, cstr, RTW_CUSTOMER_STR_LEN); -+ -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ if (write) -+ rtw_mfree(str, RTW_CUSTOMER_STR_LEN); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_DRV_EXTRA); -+ -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, 2 * 1000); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+ if (res == _SUCCESS) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status != RTW_SCTX_DONE_SUCCESS) -+ res = _FAIL; -+ } -+ -+exit: -+ return res; -+} -+ -+inline u8 rtw_customer_str_req_cmd(_adapter *adapter) -+{ -+ return rtw_customer_str_cmd(adapter, 0, NULL); -+} -+ -+inline u8 rtw_customer_str_write_cmd(_adapter *adapter, const u8 *cstr) -+{ -+ return rtw_customer_str_cmd(adapter, 1, cstr); -+} -+#endif /* CONFIG_RTW_CUSTOMER_STR */ -+ -+u8 rtw_c2h_wk_cmd(PADAPTER padapter, u8 *pbuf, u16 length, u8 type) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 *extra_cmd_buf; -+ u8 res = _SUCCESS; -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ extra_cmd_buf = rtw_zmalloc(length); -+ if (extra_cmd_buf == NULL) { -+ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memcpy(extra_cmd_buf, pbuf, length); -+ pdrvextra_cmd_parm->ec_id = C2H_WK_CID; -+ pdrvextra_cmd_parm->type = type; -+ pdrvextra_cmd_parm->size = length; -+ pdrvextra_cmd_parm->pbuf = extra_cmd_buf; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ return res; -+} -+ -+#ifdef CONFIG_FW_C2H_REG -+inline u8 rtw_c2h_reg_wk_cmd(_adapter *adapter, u8 *c2h_evt) -+{ -+ return rtw_c2h_wk_cmd(adapter, c2h_evt, c2h_evt ? C2H_REG_LEN : 0, C2H_TYPE_REG); -+} -+#endif -+ -+#ifdef CONFIG_FW_C2H_PKT -+inline u8 rtw_c2h_packet_wk_cmd(_adapter *adapter, u8 *c2h_evt, u16 length) -+{ -+ return rtw_c2h_wk_cmd(adapter, c2h_evt, length, C2H_TYPE_PKT); -+} -+#endif -+ -+static u8 _rtw_run_in_thread_cmd(_adapter *adapter, void (*func)(void *), void *context, s32 timeout_ms) -+{ -+ struct cmd_priv *cmdpriv = &adapter->cmdpriv; -+ struct cmd_obj *cmdobj; -+ struct RunInThread_param *parm; -+ struct submit_ctx sctx; -+ s32 res = _SUCCESS; -+ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (NULL == cmdobj) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ parm = (struct RunInThread_param *)rtw_zmalloc(sizeof(struct RunInThread_param)); -+ if (NULL == parm) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ parm->func = func; -+ parm->context = context; -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_RUN_INTHREAD); -+ -+ if (timeout_ms >= 0) { -+ cmdobj->sctx = &sctx; -+ rtw_sctx_init(&sctx, timeout_ms); -+ } -+ -+ res = rtw_enqueue_cmd(cmdpriv, cmdobj); -+ -+ if (res == _SUCCESS && timeout_ms >= 0) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&cmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ cmdobj->sctx = NULL; -+ _exit_critical_mutex(&cmdpriv->sctx_mutex, NULL); -+ if (sctx.status != RTW_SCTX_DONE_SUCCESS) -+ res = _FAIL; -+ } -+ -+exit: -+ return res; -+} -+ -+u8 rtw_run_in_thread_cmd(_adapter *adapter, void (*func)(void *), void *context) -+{ -+ return _rtw_run_in_thread_cmd(adapter, func, context, -1); -+} -+ -+u8 rtw_run_in_thread_cmd_wait(_adapter *adapter, void (*func)(void *), void *context, s32 timeout_ms) -+{ -+ return _rtw_run_in_thread_cmd(adapter, func, context, timeout_ms); -+} -+ -+#ifdef CONFIG_FW_C2H_REG -+s32 c2h_evt_hdl(_adapter *adapter, u8 *c2h_evt, c2h_id_filter filter) -+{ -+ s32 ret = _FAIL; -+ u8 buf[C2H_REG_LEN] = {0}; -+ u8 id, seq, plen; -+ u8 *payload; -+ -+ if (!c2h_evt) { -+ /* No c2h event in cmd_obj, read c2h event before handling*/ -+ if (rtw_hal_c2h_evt_read(adapter, buf) != _SUCCESS) -+ goto exit; -+ c2h_evt = buf; -+ } -+ -+ rtw_hal_c2h_reg_hdr_parse(adapter, c2h_evt, &id, &seq, &plen, &payload); -+ -+ if (filter && filter(adapter, id, seq, plen, payload) == _FALSE) -+ goto exit; -+ -+ ret = rtw_hal_c2h_handler(adapter, id, seq, plen, payload); -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_FW_C2H_REG */ -+ -+u8 session_tracker_cmd(_adapter *adapter, u8 cmd, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) -+{ -+ struct cmd_priv *cmdpriv = &adapter->cmdpriv; -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *cmd_parm; -+ struct st_cmd_parm *st_parm; -+ u8 res = _SUCCESS; -+ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (cmd_parm == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ st_parm = (struct st_cmd_parm *)rtw_zmalloc(sizeof(struct st_cmd_parm)); -+ if (st_parm == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ st_parm->cmd = cmd; -+ st_parm->sta = sta; -+ if (cmd != ST_CMD_CHK) { -+ _rtw_memcpy(&st_parm->local_naddr, local_naddr, 4); -+ _rtw_memcpy(&st_parm->local_port, local_port, 2); -+ _rtw_memcpy(&st_parm->remote_naddr, remote_naddr, 4); -+ _rtw_memcpy(&st_parm->remote_port, remote_port, 2); -+ } -+ -+ cmd_parm->ec_id = SESSION_TRACKER_WK_CID; -+ cmd_parm->type = 0; -+ cmd_parm->size = sizeof(struct st_cmd_parm); -+ cmd_parm->pbuf = (u8 *)st_parm; -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, cmd_parm, CMD_SET_DRV_EXTRA); -+ cmdobj->no_io = 1; -+ -+ res = rtw_enqueue_cmd(cmdpriv, cmdobj); -+ -+exit: -+ return res; -+} -+ -+inline u8 session_tracker_chk_cmd(_adapter *adapter, struct sta_info *sta) -+{ -+ return session_tracker_cmd(adapter, ST_CMD_CHK, sta, NULL, NULL, NULL, NULL); -+} -+ -+inline u8 session_tracker_add_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) -+{ -+ return session_tracker_cmd(adapter, ST_CMD_ADD, sta, local_naddr, local_port, remote_naddr, remote_port); -+} -+ -+inline u8 session_tracker_del_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) -+{ -+ return session_tracker_cmd(adapter, ST_CMD_DEL, sta, local_naddr, local_port, remote_naddr, remote_port); -+} -+ -+void session_tracker_chk_for_sta(_adapter *adapter, struct sta_info *sta) -+{ -+ struct st_ctl_t *st_ctl = &sta->st_ctl; -+ int i; -+ _irqL irqL; -+ _list *plist, *phead, *pnext; -+ _list dlist; -+ struct session_tracker *st = NULL; -+ u8 op_wfd_mode = MIRACAST_DISABLED; -+ -+ if (DBG_SESSION_TRACKER) -+ RTW_INFO(FUNC_ADPT_FMT" sta:%p\n", FUNC_ADPT_ARG(adapter), sta); -+ -+ if (!(sta->state & WIFI_ASOC_STATE)) -+ goto exit; -+ -+ for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) { -+ if (st_ctl->reg[i].s_proto != 0) -+ break; -+ } -+ if (i >= SESSION_TRACKER_REG_ID_NUM) -+ goto chk_sta; -+ -+ _rtw_init_listhead(&dlist); -+ -+ _enter_critical_bh(&st_ctl->tracker_q.lock, &irqL); -+ -+ phead = &st_ctl->tracker_q.queue; -+ plist = get_next(phead); -+ pnext = get_next(plist); -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ st = LIST_CONTAINOR(plist, struct session_tracker, list); -+ plist = pnext; -+ pnext = get_next(pnext); -+ -+ if (st->status != ST_STATUS_ESTABLISH -+ && rtw_get_passing_time_ms(st->set_time) > ST_EXPIRE_MS -+ ) { -+ rtw_list_delete(&st->list); -+ rtw_list_insert_tail(&st->list, &dlist); -+ } -+ -+ /* TODO: check OS for status update */ -+ if (st->status == ST_STATUS_CHECK) -+ st->status = ST_STATUS_ESTABLISH; -+ -+ if (st->status != ST_STATUS_ESTABLISH) -+ continue; -+ -+ #ifdef CONFIG_WFD -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" local:%u, remote:%u, rtsp:%u, %u, %u\n", FUNC_ADPT_ARG(adapter) -+ , ntohs(st->local_port), ntohs(st->remote_port), adapter->wfd_info.rtsp_ctrlport, adapter->wfd_info.tdls_rtsp_ctrlport -+ , adapter->wfd_info.peer_rtsp_ctrlport); -+ if (ntohs(st->local_port) == adapter->wfd_info.rtsp_ctrlport) -+ op_wfd_mode |= MIRACAST_SINK; -+ if (ntohs(st->local_port) == adapter->wfd_info.tdls_rtsp_ctrlport) -+ op_wfd_mode |= MIRACAST_SINK; -+ if (ntohs(st->remote_port) == adapter->wfd_info.peer_rtsp_ctrlport) -+ op_wfd_mode |= MIRACAST_SOURCE; -+ #endif -+ } -+ -+ _exit_critical_bh(&st_ctl->tracker_q.lock, &irqL); -+ -+ plist = get_next(&dlist); -+ while (rtw_end_of_queue_search(&dlist, plist) == _FALSE) { -+ st = LIST_CONTAINOR(plist, struct session_tracker, list); -+ plist = get_next(plist); -+ rtw_mfree((u8 *)st, sizeof(struct session_tracker)); -+ } -+ -+chk_sta: -+ if (STA_OP_WFD_MODE(sta) != op_wfd_mode) { -+ STA_SET_OP_WFD_MODE(sta, op_wfd_mode); -+ rtw_sta_media_status_rpt_cmd(adapter, sta, 1); -+ } -+ -+exit: -+ return; -+} -+ -+void session_tracker_chk_for_adapter(_adapter *adapter) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct sta_info *sta; -+ int i; -+ _irqL irqL; -+ _list *plist, *phead; -+ u8 op_wfd_mode = MIRACAST_DISABLED; -+ -+ _enter_critical_bh(&stapriv->sta_hash_lock, &irqL); -+ -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(stapriv->sta_hash[i]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ sta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ -+ session_tracker_chk_for_sta(adapter, sta); -+ -+ op_wfd_mode |= STA_OP_WFD_MODE(sta); -+ } -+ } -+ -+ _exit_critical_bh(&stapriv->sta_hash_lock, &irqL); -+ -+#ifdef CONFIG_WFD -+ adapter->wfd_info.op_wfd_mode = MIRACAST_MODE_REVERSE(op_wfd_mode); -+#endif -+} -+ -+void session_tracker_cmd_hdl(_adapter *adapter, struct st_cmd_parm *parm) -+{ -+ u8 cmd = parm->cmd; -+ struct sta_info *sta = parm->sta; -+ -+ if (cmd == ST_CMD_CHK) { -+ if (sta) -+ session_tracker_chk_for_sta(adapter, sta); -+ else -+ session_tracker_chk_for_adapter(adapter); -+ -+ goto exit; -+ -+ } else if (cmd == ST_CMD_ADD || cmd == ST_CMD_DEL) { -+ struct st_ctl_t *st_ctl; -+ u32 local_naddr = parm->local_naddr; -+ u16 local_port = parm->local_port; -+ u32 remote_naddr = parm->remote_naddr; -+ u16 remote_port = parm->remote_port; -+ struct session_tracker *st = NULL; -+ _irqL irqL; -+ _list *plist, *phead; -+ u8 free_st = 0; -+ u8 alloc_st = 0; -+ -+ if (DBG_SESSION_TRACKER) -+ RTW_INFO(FUNC_ADPT_FMT" cmd:%u, sta:%p, local:"IP_FMT":"PORT_FMT", remote:"IP_FMT":"PORT_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), cmd, sta -+ , IP_ARG(&local_naddr), PORT_ARG(&local_port) -+ , IP_ARG(&remote_naddr), PORT_ARG(&remote_port) -+ ); -+ -+ if (!(sta->state & WIFI_ASOC_STATE)) -+ goto exit; -+ -+ st_ctl = &sta->st_ctl; -+ -+ _enter_critical_bh(&st_ctl->tracker_q.lock, &irqL); -+ -+ phead = &st_ctl->tracker_q.queue; -+ plist = get_next(phead); -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ st = LIST_CONTAINOR(plist, struct session_tracker, list); -+ -+ if (st->local_naddr == local_naddr -+ && st->local_port == local_port -+ && st->remote_naddr == remote_naddr -+ && st->remote_port == remote_port) -+ break; -+ -+ plist = get_next(plist); -+ } -+ -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ st = NULL; -+ -+ switch (cmd) { -+ case ST_CMD_DEL: -+ if (st) { -+ rtw_list_delete(plist); -+ free_st = 1; -+ } -+ goto unlock; -+ case ST_CMD_ADD: -+ if (!st) -+ alloc_st = 1; -+ } -+ -+unlock: -+ _exit_critical_bh(&st_ctl->tracker_q.lock, &irqL); -+ -+ if (free_st) { -+ rtw_mfree((u8 *)st, sizeof(struct session_tracker)); -+ goto exit; -+ } -+ -+ if (alloc_st) { -+ st = (struct session_tracker *)rtw_zmalloc(sizeof(struct session_tracker)); -+ if (!st) -+ goto exit; -+ -+ st->local_naddr = local_naddr; -+ st->local_port = local_port; -+ st->remote_naddr = remote_naddr; -+ st->remote_port = remote_port; -+ st->set_time = rtw_get_current_time(); -+ st->status = ST_STATUS_CHECK; -+ -+ _enter_critical_bh(&st_ctl->tracker_q.lock, &irqL); -+ rtw_list_insert_tail(&st->list, phead); -+ _exit_critical_bh(&st_ctl->tracker_q.lock, &irqL); -+ } -+ } -+ -+exit: -+ return; -+} -+ -+#if defined(CONFIG_RTW_MESH) && defined(RTW_PER_CMD_SUPPORT_FW) -+static s32 rtw_req_per_cmd_hdl(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ struct macid_bmp req_macid_bmp, *macid_bmp; -+ u8 i, ret = _FAIL; -+ -+ macid_bmp = &macid_ctl->if_g[adapter->iface_id]; -+ _rtw_memcpy(&req_macid_bmp, macid_bmp, sizeof(struct macid_bmp)); -+ -+ /* Clear none mesh's macid */ -+ for (i = 0; i < macid_ctl->num; i++) { -+ u8 role; -+ role = GET_H2CCMD_MSRRPT_PARM_ROLE(&macid_ctl->h2c_msr[i]); -+ if (role != H2C_MSR_ROLE_MESH) -+ rtw_macid_map_clr(&req_macid_bmp, i); -+ } -+ -+ /* group_macid: always be 0 in NIC, so only pass macid_bitmap.m0 -+ * rpt_type: 0 includes all info in 1, use 0 for now -+ * macid_bitmap: pass m0 only for NIC -+ */ -+ ret = rtw_hal_set_req_per_rpt_cmd(adapter, 0, 0, req_macid_bmp.m0); -+ -+ return ret; -+} -+ -+u8 rtw_req_per_cmd(_adapter *adapter) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ parm->ec_id = REQ_PER_CMD_WK_CID; -+ parm->type = 0; -+ parm->size = 0; -+ parm->pbuf = NULL; -+ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ rtw_mfree((u8 *)parm, sizeof(*parm)); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+exit: -+ return res; -+} -+#endif -+ -+ -+void rtw_ac_parm_cmd_hdl(_adapter *padapter, u8 *_ac_parm_buf, int ac_type) -+{ -+ -+ u32 ac_parm_buf; -+ -+ _rtw_memcpy(&ac_parm_buf, _ac_parm_buf, sizeof(ac_parm_buf)); -+ switch (ac_type) { -+ case XMIT_VO_QUEUE: -+ RTW_INFO(FUNC_NDEV_FMT" AC_VO = 0x%08x\n", FUNC_ADPT_ARG(padapter), (unsigned int) ac_parm_buf); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&ac_parm_buf)); -+ break; -+ -+ case XMIT_VI_QUEUE: -+ RTW_INFO(FUNC_NDEV_FMT" AC_VI = 0x%08x\n", FUNC_ADPT_ARG(padapter), (unsigned int) ac_parm_buf); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&ac_parm_buf)); -+ break; -+ -+ case XMIT_BE_QUEUE: -+ RTW_INFO(FUNC_NDEV_FMT" AC_BE = 0x%08x\n", FUNC_ADPT_ARG(padapter), (unsigned int) ac_parm_buf); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&ac_parm_buf)); -+ break; -+ -+ case XMIT_BK_QUEUE: -+ RTW_INFO(FUNC_NDEV_FMT" AC_BK = 0x%08x\n", FUNC_ADPT_ARG(padapter), (unsigned int) ac_parm_buf); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&ac_parm_buf)); -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+ -+u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+ int ret = H2C_SUCCESS; -+ struct drvextra_cmd_parm *pdrvextra_cmd; -+ -+ if (!pbuf) -+ return H2C_PARAMETERS_ERROR; -+ -+ pdrvextra_cmd = (struct drvextra_cmd_parm *)pbuf; -+ -+ switch (pdrvextra_cmd->ec_id) { -+ case STA_MSTATUS_RPT_WK_CID: -+ rtw_sta_media_status_rpt_cmd_hdl(padapter, (struct sta_media_status_rpt_cmd_parm *)pdrvextra_cmd->pbuf); -+ break; -+ -+ case DYNAMIC_CHK_WK_CID:/*only primary padapter go to this cmd, but execute dynamic_chk_wk_hdl() for two interfaces */ -+ rtw_dynamic_chk_wk_hdl(padapter); -+ break; -+ case POWER_SAVING_CTRL_WK_CID: -+ power_saving_wk_hdl(padapter); -+ break; -+#ifdef CONFIG_LPS -+ case LPS_CTRL_WK_CID: -+ lps_ctrl_wk_hdl(padapter, (u8)pdrvextra_cmd->type, pdrvextra_cmd->pbuf); -+ break; -+ case DM_IN_LPS_WK_CID: -+ rtw_dm_in_lps_hdl(padapter); -+ break; -+ case LPS_CHANGE_DTIM_CID: -+ rtw_lps_change_dtim_hdl(padapter, (u8)pdrvextra_cmd->type); -+ break; -+#endif -+#if (RATE_ADAPTIVE_SUPPORT == 1) -+ case RTP_TIMER_CFG_WK_CID: -+ rpt_timer_setting_wk_hdl(padapter, pdrvextra_cmd->type); -+ break; -+#endif -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ case ANT_SELECT_WK_CID: -+ antenna_select_wk_hdl(padapter, pdrvextra_cmd->type); -+ break; -+#endif -+#ifdef CONFIG_P2P_PS -+ case P2P_PS_WK_CID: -+ p2p_ps_wk_hdl(padapter, pdrvextra_cmd->type); -+ break; -+#endif -+#ifdef CONFIG_P2P -+ case P2P_PROTO_WK_CID: -+ /* -+ * Commented by Albert 2011/07/01 -+ * I used the type_size as the type command -+ */ -+ ret = p2p_protocol_wk_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); -+ break; -+#endif -+#ifdef CONFIG_AP_MODE -+ case CHECK_HIQ_WK_CID: -+ rtw_chk_hi_queue_hdl(padapter); -+ break; -+#endif -+ /* add for CONFIG_IEEE80211W, none 11w can use it */ -+ case RESET_SECURITYPRIV: -+ reset_securitypriv_hdl(padapter); -+ break; -+ case FREE_ASSOC_RESOURCES: -+ free_assoc_resources_hdl(padapter, (u8)pdrvextra_cmd->type); -+ break; -+ case C2H_WK_CID: -+ switch (pdrvextra_cmd->type) { -+ #ifdef CONFIG_FW_C2H_REG -+ case C2H_TYPE_REG: -+ c2h_evt_hdl(padapter, pdrvextra_cmd->pbuf, NULL); -+ break; -+ #endif -+ #ifdef CONFIG_FW_C2H_PKT -+ case C2H_TYPE_PKT: -+ rtw_hal_c2h_pkt_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->size); -+ break; -+ #endif -+ default: -+ RTW_ERR("unknown C2H type:%d\n", pdrvextra_cmd->type); -+ rtw_warn_on(1); -+ break; -+ } -+ break; -+#ifdef CONFIG_BEAMFORMING -+ case BEAMFORMING_WK_CID: -+ beamforming_wk_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); -+ break; -+#endif -+ case DM_RA_MSK_WK_CID: -+ rtw_dm_ra_mask_hdl(padapter, (struct sta_info *)pdrvextra_cmd->pbuf); -+ break; -+#ifdef CONFIG_BT_COEXIST -+ case BTINFO_WK_CID: -+ rtw_btinfo_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->size); -+ break; -+ case BTC_REDUCE_WL_TXPWR_CID: -+ rtw_btc_reduce_wl_txpwr_hdl(padapter, pdrvextra_cmd->type); -+ break; -+#endif -+#ifdef CONFIG_DFS_MASTER -+ case DFS_RADAR_DETECT_WK_CID: -+ rtw_dfs_rd_hdl(padapter); -+ break; -+ case DFS_RADAR_DETECT_EN_DEC_WK_CID: -+ rtw_dfs_rd_en_decision(padapter, MLME_ACTION_NONE, 0); -+ break; -+#endif -+ case SESSION_TRACKER_WK_CID: -+ session_tracker_cmd_hdl(padapter, (struct st_cmd_parm *)pdrvextra_cmd->pbuf); -+ break; -+ case EN_HW_UPDATE_TSF_WK_CID: -+ rtw_hal_set_hwreg(padapter, HW_VAR_EN_HW_UPDATE_TSF, NULL); -+ break; -+ case PERIOD_TSF_UPDATE_END_WK_CID: -+ rtw_hal_periodic_tsf_update_chk(padapter); -+ break; -+ case TEST_H2C_CID: -+ rtw_hal_fill_h2c_cmd(padapter, pdrvextra_cmd->pbuf[0], pdrvextra_cmd->size - 1, &pdrvextra_cmd->pbuf[1]); -+ break; -+ case MP_CMD_WK_CID: -+#ifdef CONFIG_MP_INCLUDED -+ ret = rtw_mp_cmd_hdl(padapter, pdrvextra_cmd->type); -+#endif -+ break; -+#ifdef CONFIG_RTW_CUSTOMER_STR -+ case CUSTOMER_STR_WK_CID: -+ ret = rtw_customer_str_cmd_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); -+ break; -+#endif -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ case RSON_SCAN_WK_CID: -+ rtw_rson_scan_cmd_hdl(padapter, pdrvextra_cmd->type); -+ break; -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ case MGNT_TX_WK_CID: -+ ret = rtw_mgnt_tx_handler(padapter, pdrvextra_cmd->pbuf); -+ break; -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+#if (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211) -+ case ROCH_WK_CID: -+ ret = rtw_roch_wk_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); -+ break; -+#endif /* (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211) */ -+ -+#ifdef CONFIG_MCC_MODE -+ case MCC_CMD_WK_CID: -+ ret = rtw_mcc_cmd_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf); -+ break; -+#endif /* CONFIG_MCC_MODE */ -+#if defined(CONFIG_RTW_MESH) && defined(RTW_PER_CMD_SUPPORT_FW) -+ case REQ_PER_CMD_WK_CID: -+ ret = rtw_req_per_cmd_hdl(padapter); -+ break; -+#endif -+#ifdef CONFIG_SUPPORT_STATIC_SMPS -+ case SSMPS_WK_CID : -+ rtw_ssmps_wk_hdl(padapter, (struct ssmps_cmd_parm *)pdrvextra_cmd->pbuf); -+ break; -+#endif -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+ case TXSS_WK_CID : -+ rtw_ctrl_txss_wk_hdl(padapter, (struct txss_cmd_parm *)pdrvextra_cmd->pbuf); -+ break; -+#endif -+ case AC_PARM_CMD_WK_CID: -+ rtw_ac_parm_cmd_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type); -+ break; -+#ifdef CONFIG_AP_MODE -+ case STOP_AP_WK_CID: -+ stop_ap_hdl(padapter); -+ break; -+#endif -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ case TBTX_CONTROL_TX_WK_CID: -+ tx_control_hdl(padapter); -+ break; -+#endif -+ default: -+ break; -+ } -+ -+ if (pdrvextra_cmd->pbuf && pdrvextra_cmd->size > 0) -+ rtw_mfree(pdrvextra_cmd->pbuf, pdrvextra_cmd->size); -+ -+ return ret; -+} -+ -+void rtw_survey_cmd_callback(_adapter *padapter , struct cmd_obj *pcmd) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ -+ if (pcmd->res == H2C_DROPPED) { -+ /* TODO: cancel timer and do timeout handler directly... */ -+ /* need to make timeout handlerOS independent */ -+ mlme_set_scan_to_timer(pmlmepriv, 1); -+ } else if (pcmd->res != H2C_SUCCESS) { -+ mlme_set_scan_to_timer(pmlmepriv, 1); -+ } -+ -+ /* free cmd */ -+ rtw_free_cmd_obj(pcmd); -+ -+} -+void rtw_disassoc_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ -+ if (pcmd->res != H2C_SUCCESS) { -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ set_fwstate(pmlmepriv, WIFI_ASOC_STATE); -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ goto exit; -+ } -+#ifdef CONFIG_BR_EXT -+ else /* clear bridge database */ -+ nat25_db_cleanup(padapter); -+#endif /* CONFIG_BR_EXT */ -+ -+ /* free cmd */ -+ rtw_free_cmd_obj(pcmd); -+ -+exit: -+ return; -+} -+ -+void rtw_joinbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ -+ if (pcmd->res == H2C_DROPPED) { -+ /* TODO: cancel timer and do timeout handler directly... */ -+ /* need to make timeout handlerOS independent */ -+ _set_timer(&pmlmepriv->assoc_timer, 1); -+ } else if (pcmd->res != H2C_SUCCESS) -+ _set_timer(&pmlmepriv->assoc_timer, 1); -+ -+ rtw_free_cmd_obj(pcmd); -+ -+} -+ -+void rtw_create_ibss_post_hdl(_adapter *padapter, int status) -+{ -+ _irqL irqL; -+ struct wlan_network *pwlan = NULL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ WLAN_BSSID_EX *pdev_network = &padapter->registrypriv.dev_network; -+ struct wlan_network *mlme_cur_network = &(pmlmepriv->cur_network); -+ -+ if (status != H2C_SUCCESS) -+ _set_timer(&pmlmepriv->assoc_timer, 1); -+ -+ _cancel_timer_ex(&pmlmepriv->assoc_timer); -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ { -+ _irqL irqL; -+ -+ pwlan = _rtw_alloc_network(pmlmepriv); -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ if (pwlan == NULL) { -+ pwlan = rtw_get_oldest_wlan_network(&pmlmepriv->scanned_queue); -+ if (pwlan == NULL) { -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ goto createbss_cmd_fail; -+ } -+ pwlan->last_scanned = rtw_get_current_time(); -+ } else -+ rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue); -+ -+ pdev_network->Length = get_WLAN_BSSID_EX_sz(pdev_network); -+ _rtw_memcpy(&(pwlan->network), pdev_network, pdev_network->Length); -+ /* pwlan->fixed = _TRUE; */ -+ -+ /* copy pdev_network information to pmlmepriv->cur_network */ -+ _rtw_memcpy(&mlme_cur_network->network, pdev_network, (get_WLAN_BSSID_EX_sz(pdev_network))); -+ -+#if 0 -+ /* reset DSConfig */ -+ mlme_cur_network->network.Configuration.DSConfig = (u32)rtw_ch2freq(pdev_network->Configuration.DSConfig); -+#endif -+ -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ /* we will set WIFI_ASOC_STATE when there is one more sat to join us (rtw_stassoc_event_callback) */ -+ } -+ -+createbss_cmd_fail: -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ return; -+} -+ -+ -+ -+void rtw_setstaKey_cmdrsp_callback(_adapter *padapter , struct cmd_obj *pcmd) -+{ -+ -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct set_stakey_rsp *psetstakey_rsp = (struct set_stakey_rsp *)(pcmd->rsp); -+ struct sta_info *psta = rtw_get_stainfo(pstapriv, psetstakey_rsp->addr); -+ -+ -+ if (psta == NULL) { -+ goto exit; -+ } -+ -+ /* psta->cmn.aid = psta->cmn.mac_id = psetstakey_rsp->keyid; */ /* CAM_ID(CAM_ENTRY) */ -+ -+exit: -+ -+ rtw_free_cmd_obj(pcmd); -+ -+ -+} -+ -+void rtw_getrttbl_cmd_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd) -+{ -+ -+ rtw_free_cmd_obj(pcmd); -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->registrypriv.mp_mode == 1) -+ padapter->mppriv.workparam.bcompleted = _TRUE; -+#endif -+ -+ -+} -+ -+u8 set_txq_params_cmd(_adapter *adapter, u32 ac_parm, u8 ac_type) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ u8 *ac_parm_buf = NULL; -+ u8 sz; -+ u8 res = _SUCCESS; -+ -+ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ sz = sizeof(ac_parm); -+ ac_parm_buf = rtw_zmalloc(sz); -+ if (ac_parm_buf == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = AC_PARM_CMD_WK_CID; -+ pdrvextra_cmd_parm->type = ac_type; -+ pdrvextra_cmd_parm->size = sz; -+ pdrvextra_cmd_parm->pbuf = ac_parm_buf; -+ -+ _rtw_memcpy(ac_parm_buf, &ac_parm, sz); -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+exit: -+ return res; -+} -diff --git a/drivers/staging/rtl8723cs/core/rtw_debug.c b/drivers/staging/rtl8723cs/core/rtw_debug.c -new file mode 100644 -index 000000000000..d1a41e1908dd ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_debug.c -@@ -0,0 +1,8306 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_DEBUG_C_ -+ -+#include -+#include -+ -+#ifdef CONFIG_RTW_DEBUG -+const char *rtw_log_level_str[] = { -+ "_DRV_NONE_ = 0", -+ "_DRV_ALWAYS_ = 1", -+ "_DRV_ERR_ = 2", -+ "_DRV_WARNING_ = 3", -+ "_DRV_INFO_ = 4", -+ "_DRV_DEBUG_ = 5", -+ "_DRV_MAX_ = 6", -+}; -+#endif -+ -+#ifdef CONFIG_DEBUG_RTL871X -+ u64 GlobalDebugComponents = 0; -+#endif /* CONFIG_DEBUG_RTL871X */ -+ -+#include -+ -+#ifdef CONFIG_TDLS -+ #define TDLS_DBG_INFO_SPACE_BTWN_ITEM_AND_VALUE 41 -+#endif -+ -+void dump_drv_version(void *sel) -+{ -+ RTW_PRINT_SEL(sel, "%s %s\n", DRV_NAME, DRIVERVERSION); -+ RTW_PRINT_SEL(sel, "build time: %s %s\n", __DATE__, __TIME__); -+} -+ -+#ifdef CONFIG_PROC_DEBUG -+void dump_drv_cfg(void *sel) -+{ -+extern uint rtw_recvbuf_nr; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) -+ char *kernel_version = utsname()->release; -+ -+ RTW_PRINT_SEL(sel, "\nKernel Version: %s\n", kernel_version); -+#endif -+ -+ RTW_PRINT_SEL(sel, "Driver Version: %s\n", DRIVERVERSION); -+ RTW_PRINT_SEL(sel, "------------------------------------------------\n"); -+#ifdef CONFIG_IOCTL_CFG80211 -+ RTW_PRINT_SEL(sel, "CFG80211\n"); -+#ifdef RTW_USE_CFG80211_STA_EVENT -+ RTW_PRINT_SEL(sel, "RTW_USE_CFG80211_STA_EVENT\n"); -+#endif -+ #ifdef CONFIG_RADIO_WORK -+ RTW_PRINT_SEL(sel, "CONFIG_RADIO_WORK\n"); -+ #endif -+#else -+ RTW_PRINT_SEL(sel, "WEXT\n"); -+#endif -+ -+ RTW_PRINT_SEL(sel, "DBG:%d\n", DBG); -+#ifdef CONFIG_RTW_DEBUG -+ RTW_PRINT_SEL(sel, "CONFIG_RTW_DEBUG\n"); -+#endif -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ RTW_PRINT_SEL(sel, "CONFIG_CONCURRENT_MODE\n"); -+#endif -+ -+#ifdef CONFIG_POWER_SAVING -+ RTW_PRINT_SEL(sel, "CONFIG_POWER_SAVING\n"); -+ #ifdef CONFIG_IPS -+ RTW_PRINT_SEL(sel, "CONFIG_IPS\n"); -+ #endif -+ #ifdef CONFIG_LPS -+ RTW_PRINT_SEL(sel, "CONFIG_LPS\n"); -+ #ifdef CONFIG_LPS_LCLK -+ RTW_PRINT_SEL(sel, "CONFIG_LPS_LCLK\n"); -+ #ifdef CONFIG_DETECT_CPWM_BY_POLLING -+ RTW_PRINT_SEL(sel, "CONFIG_DETECT_CPWM_BY_POLLING\n"); -+ #endif -+ #endif /*CONFIG_LPS_LCLK*/ -+ #ifdef CONFIG_LPS_CHK_BY_TP -+ RTW_PRINT_SEL(sel, "CONFIG_LPS_CHK_BY_TP\n"); -+ #endif -+ #ifdef CONFIG_LPS_ACK -+ RTW_PRINT_SEL(sel, "CONFIG_LPS_ACK\n"); -+ #endif -+ #endif/*CONFIG_LPS*/ -+#endif -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ RTW_PRINT_SEL(sel, "LOAD_PHY_PARA_FROM_FILE - REALTEK_CONFIG_PATH=%s\n", REALTEK_CONFIG_PATH); -+ #if defined(CONFIG_MULTIDRV) || defined(REALTEK_CONFIG_PATH_WITH_IC_NAME_FOLDER) -+ RTW_PRINT_SEL(sel, "LOAD_PHY_PARA_FROM_FILE - REALTEK_CONFIG_PATH_WITH_IC_NAME_FOLDER\n"); -+ #endif -+ -+/* configurations about TX power */ -+#ifdef CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY -+ RTW_PRINT_SEL(sel, "CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY\n"); -+#endif -+#ifdef CONFIG_CALIBRATE_TX_POWER_TO_MAX -+ RTW_PRINT_SEL(sel, "CONFIG_CALIBRATE_TX_POWER_TO_MAX\n"); -+#endif -+#endif -+ RTW_PRINT_SEL(sel, "RTW_DEF_MODULE_REGULATORY_CERT=0x%02x\n", RTW_DEF_MODULE_REGULATORY_CERT); -+ -+ RTW_PRINT_SEL(sel, "CONFIG_TXPWR_BY_RATE=%d\n", CONFIG_TXPWR_BY_RATE); -+ RTW_PRINT_SEL(sel, "CONFIG_TXPWR_BY_RATE_EN=%d\n", CONFIG_TXPWR_BY_RATE_EN); -+ RTW_PRINT_SEL(sel, "CONFIG_TXPWR_LIMIT=%d\n", CONFIG_TXPWR_LIMIT); -+ RTW_PRINT_SEL(sel, "CONFIG_TXPWR_LIMIT_EN=%d\n", CONFIG_TXPWR_LIMIT_EN); -+ -+ -+#ifdef CONFIG_DISABLE_ODM -+ RTW_PRINT_SEL(sel, "CONFIG_DISABLE_ODM\n"); -+#endif -+ -+#ifdef CONFIG_MINIMAL_MEMORY_USAGE -+ RTW_PRINT_SEL(sel, "CONFIG_MINIMAL_MEMORY_USAGE\n"); -+#endif -+ -+ RTW_PRINT_SEL(sel, "CONFIG_RTW_ADAPTIVITY_EN = %d\n", CONFIG_RTW_ADAPTIVITY_EN); -+#if (CONFIG_RTW_ADAPTIVITY_EN) -+ RTW_PRINT_SEL(sel, "ADAPTIVITY_MODE = %s\n", (CONFIG_RTW_ADAPTIVITY_MODE) ? "carrier_sense" : "normal"); -+#endif -+ -+#ifdef CONFIG_WOWLAN -+ RTW_PRINT_SEL(sel, "CONFIG_WOWLAN - "); -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ RTW_PRINT_SEL(sel, "CONFIG_GPIO_WAKEUP - WAKEUP_GPIO_IDX:%d\n", WAKEUP_GPIO_IDX); -+#endif -+#endif -+ -+#ifdef CONFIG_TDLS -+ RTW_PRINT_SEL(sel, "CONFIG_TDLS\n"); -+#endif -+ -+#ifdef CONFIG_RTW_80211R -+ RTW_PRINT_SEL(sel, "CONFIG_RTW_80211R\n"); -+#endif -+ -+#ifdef CONFIG_RTW_NETIF_SG -+ RTW_PRINT_SEL(sel, "CONFIG_RTW_NETIF_SG\n"); -+#endif -+ -+#ifdef CONFIG_RTW_WIFI_HAL -+ RTW_PRINT_SEL(sel, "CONFIG_RTW_WIFI_HAL\n"); -+#endif -+ -+#ifdef RTW_BUSY_DENY_SCAN -+ RTW_PRINT_SEL(sel, "RTW_BUSY_DENY_SCAN\n"); -+ RTW_PRINT_SEL(sel, "BUSY_TRAFFIC_SCAN_DENY_PERIOD = %u ms\n", \ -+ BUSY_TRAFFIC_SCAN_DENY_PERIOD); -+#endif -+ -+#ifdef CONFIG_RTW_TPT_MODE -+ RTW_PRINT_SEL(sel, "CONFIG_RTW_TPT_MODE\n"); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+#ifdef CONFIG_SUPPORT_USB_INT -+ RTW_PRINT_SEL(sel, "CONFIG_SUPPORT_USB_INT\n"); -+#endif -+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE -+ RTW_PRINT_SEL(sel, "CONFIG_USB_INTERRUPT_IN_PIPE\n"); -+#endif -+#ifdef CONFIG_USB_TX_AGGREGATION -+ RTW_PRINT_SEL(sel, "CONFIG_USB_TX_AGGREGATION\n"); -+#endif -+#ifdef CONFIG_USB_RX_AGGREGATION -+ RTW_PRINT_SEL(sel, "CONFIG_USB_RX_AGGREGATION\n"); -+#endif -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX -+ RTW_PRINT_SEL(sel, "CONFIG_USE_USB_BUFFER_ALLOC_TX\n"); -+#endif -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX -+ RTW_PRINT_SEL(sel, "CONFIG_USE_USB_BUFFER_ALLOC_RX\n"); -+#endif -+#ifdef CONFIG_PREALLOC_RECV_SKB -+ RTW_PRINT_SEL(sel, "CONFIG_PREALLOC_RECV_SKB\n"); -+#endif -+#ifdef CONFIG_FIX_NR_BULKIN_BUFFER -+ RTW_PRINT_SEL(sel, "CONFIG_FIX_NR_BULKIN_BUFFER\n"); -+#endif -+#endif /*CONFIG_USB_HCI*/ -+ -+#ifdef CONFIG_SDIO_HCI -+#ifdef CONFIG_TX_AGGREGATION -+ RTW_PRINT_SEL(sel, "CONFIG_TX_AGGREGATION\n"); -+#endif -+#ifdef CONFIG_RX_AGGREGATION -+ RTW_PRINT_SEL(sel, "CONFIG_RX_AGGREGATION\n"); -+#endif -+#ifdef RTW_XMIT_THREAD_HIGH_PRIORITY -+ RTW_PRINT_SEL(sel, "RTW_XMIT_THREAD_HIGH_PRIORITY\n"); -+#endif -+#ifdef RTW_XMIT_THREAD_HIGH_PRIORITY_AGG -+ RTW_PRINT_SEL(sel, "RTW_XMIT_THREAD_HIGH_PRIORITY_AGG\n"); -+#endif -+ -+#ifdef DBG_SDIO -+ RTW_PRINT_SEL(sel, "DBG_SDIO = %d\n", DBG_SDIO); -+#endif -+#endif /*CONFIG_SDIO_HCI*/ -+ -+#ifdef CONFIG_PCI_HCI -+#endif -+ -+ RTW_PRINT_SEL(sel, "CONFIG_IFACE_NUMBER = %d\n", CONFIG_IFACE_NUMBER); -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ RTW_PRINT_SEL(sel, "CONFIG_MI_WITH_MBSSID_CAM\n"); -+#endif -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+ RTW_PRINT_SEL(sel, "CONFIG_SWTIMER_BASED_TXBCN\n"); -+#endif -+#ifdef CONFIG_FW_HANDLE_TXBCN -+ RTW_PRINT_SEL(sel, "CONFIG_FW_HANDLE_TXBCN\n"); -+ RTW_PRINT_SEL(sel, "CONFIG_LIMITED_AP_NUM = %d\n", CONFIG_LIMITED_AP_NUM); -+#endif -+#ifdef CONFIG_CLIENT_PORT_CFG -+ RTW_PRINT_SEL(sel, "CONFIG_CLIENT_PORT_CFG\n"); -+#endif -+#ifdef CONFIG_PCI_TX_POLLING -+ RTW_PRINT_SEL(sel, "CONFIG_PCI_TX_POLLING\n"); -+#endif -+ RTW_PRINT_SEL(sel, "CONFIG_RTW_UP_MAPPING_RULE = %s\n", (CONFIG_RTW_UP_MAPPING_RULE == 1) ? "dscp" : "tos"); -+ -+ RTW_PRINT_SEL(sel, "\n=== XMIT-INFO ===\n"); -+ RTW_PRINT_SEL(sel, "NR_XMITFRAME = %d\n", NR_XMITFRAME); -+ RTW_PRINT_SEL(sel, "NR_XMITBUFF = %d\n", NR_XMITBUFF); -+ RTW_PRINT_SEL(sel, "MAX_XMITBUF_SZ = %d\n", MAX_XMITBUF_SZ); -+ RTW_PRINT_SEL(sel, "NR_XMIT_EXTBUFF = %d\n", NR_XMIT_EXTBUFF); -+ RTW_PRINT_SEL(sel, "MAX_XMIT_EXTBUF_SZ = %d\n", MAX_XMIT_EXTBUF_SZ); -+ RTW_PRINT_SEL(sel, "MAX_CMDBUF_SZ = %d\n", MAX_CMDBUF_SZ); -+ -+ RTW_PRINT_SEL(sel, "\n=== RECV-INFO ===\n"); -+ RTW_PRINT_SEL(sel, "NR_RECVFRAME = %d\n", NR_RECVFRAME); -+ RTW_PRINT_SEL(sel, "NR_RECVBUFF = %d, rtw_recvbuf_nr = %d\n", NR_RECVBUFF, rtw_recvbuf_nr); -+ RTW_PRINT_SEL(sel, "MAX_RECVBUF_SZ = %d\n", MAX_RECVBUF_SZ); -+ -+} -+#endif /* CONFIG_PROC_DEBUG */ -+ -+ -+void dump_log_level(void *sel) -+{ -+#ifdef CONFIG_RTW_DEBUG -+ int i; -+ -+ RTW_PRINT_SEL(sel, "drv_log_level:%d\n", rtw_drv_log_level); -+ for (i = 0; i <= _DRV_MAX_; i++) { -+ if (rtw_log_level_str[i]) -+ RTW_PRINT_SEL(sel, "%c %s = %d\n", -+ (rtw_drv_log_level == i) ? '+' : ' ', rtw_log_level_str[i], i); -+ } -+#else -+ RTW_PRINT_SEL(sel, "CONFIG_RTW_DEBUG is disabled\n"); -+#endif -+} -+ -+#ifdef CONFIG_SDIO_HCI -+void sd_f0_reg_dump(void *sel, _adapter *adapter) -+{ -+ int i; -+ -+ for (i = 0x0; i <= 0xff; i++) { -+ if (i % 16 == 0) -+ RTW_PRINT_SEL(sel, "0x%02x ", i); -+ -+ _RTW_PRINT_SEL(sel, "%02x ", rtw_sd_f0_read8(adapter, i)); -+ -+ if (i % 16 == 15) -+ _RTW_PRINT_SEL(sel, "\n"); -+ else if (i % 8 == 7) -+ _RTW_PRINT_SEL(sel, "\t"); -+ } -+} -+ -+void sdio_local_reg_dump(void *sel, _adapter *adapter) -+{ -+ int i, j = 1; -+ -+ for (i = 0x0; i < 0x100; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%02x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, (0x1025 << 16) | i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+} -+#endif /* CONFIG_SDIO_HCI */ -+ -+void mac_reg_dump(void *sel, _adapter *adapter) -+{ -+ int i, j = 1; -+ -+ RTW_PRINT_SEL(sel, "======= MAC REG =======\n"); -+ -+ for (i = 0x0; i < 0x800; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ -+#ifdef CONFIG_RTL8814A -+ { -+ for (i = 0x1000; i < 0x1650; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ } -+#endif /* CONFIG_RTL8814A */ -+ -+#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) -+ for (i = 0x1000; i < 0x1800; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+#endif /* CONFIG_RTL8822B or 8821c*/ -+ -+#if defined(CONFIG_RTL8192F) -+ for (i = 0x1000; i < 0x1100; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ for (i = 0x1300; i < 0x1360; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8814B) -+ for (i = 0x2000; i < 0x2800; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ -+ for (i = 0x3000; i < 0x3800; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+#endif -+ -+} -+ -+void bb_reg_dump(void *sel, _adapter *adapter) -+{ -+ int i, j = 1; -+ -+ RTW_PRINT_SEL(sel, "======= BB REG =======\n"); -+ for (i = 0x800; i < 0x1000; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ -+#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) -+ for (i = 0x1800; i < 0x2000; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+#endif /* CONFIG_RTL8822B */ -+ -+#if defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) -+ for (i = 0x2c00; i < 0x2c60; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ -+ for (i = 0x2d00; i < 0x2df0; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ -+ for (i = 0x4000; i < 0x4060; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ -+ for (i = 0x4100; i < 0x4200; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ -+#endif /* CONFIG_RTL8822C || CONFIG_RTL8814B */ -+ -+#if defined(CONFIG_RTL8814B) -+ for (i = 0x5200; i < 0x5400; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+#endif /* CONFIG_RTL8814B */ -+} -+ -+void bb_reg_dump_ex(void *sel, _adapter *adapter) -+{ -+ int i; -+ -+ RTW_PRINT_SEL(sel, "======= BB REG =======\n"); -+ for (i = 0x800; i < 0x1000; i += 4) { -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ -+#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) -+ for (i = 0x1800; i < 0x2000; i += 4) { -+ RTW_PRINT_SEL(sel, "0x%04x", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i)); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+#endif /* CONFIG_RTL8822B */ -+} -+ -+void rf_reg_dump(void *sel, _adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ int i, j = 1, path; -+ u32 value; -+ u8 path_nums = hal_spec->rf_reg_path_num; -+ -+ RTW_PRINT_SEL(sel, "======= RF REG =======\n"); -+ -+ for (path = 0; path < path_nums; path++) { -+ RTW_PRINT_SEL(sel, "RF_Path(%x)\n", path); -+ for (i = 0; i < 0x100; i++) { -+ value = rtw_hal_read_rfreg(adapter, path, i, 0xffffffff); -+ if (j % 4 == 1) -+ RTW_PRINT_SEL(sel, "0x%02x ", i); -+ _RTW_PRINT_SEL(sel, " 0x%08x ", value); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ } -+} -+ -+void rtw_sink_rtp_seq_dbg(_adapter *adapter, u8 *ehdr_pos) -+{ -+ struct recv_priv *precvpriv = &(adapter->recvpriv); -+ if (precvpriv->sink_udpport > 0) { -+ if (*((u16 *)(ehdr_pos + 0x24)) == cpu_to_be16(precvpriv->sink_udpport)) { -+ precvpriv->pre_rtp_rxseq = precvpriv->cur_rtp_rxseq; -+ precvpriv->cur_rtp_rxseq = be16_to_cpu(*((u16 *)(ehdr_pos + 0x2C))); -+ if (precvpriv->pre_rtp_rxseq + 1 != precvpriv->cur_rtp_rxseq) { -+ if(precvpriv->pre_rtp_rxseq == 65535 ) { -+ if( precvpriv->cur_rtp_rxseq != 0) { -+ RTW_INFO("%s : RTP Seq num from %d to %d\n", __FUNCTION__, precvpriv->pre_rtp_rxseq, precvpriv->cur_rtp_rxseq); -+ } -+ } else { -+ RTW_INFO("%s : RTP Seq num from %d to %d\n", __FUNCTION__, precvpriv->pre_rtp_rxseq, precvpriv->cur_rtp_rxseq); -+ } -+ } -+ } -+ } -+} -+ -+void sta_rx_reorder_ctl_dump(void *sel, struct sta_info *sta) -+{ -+ struct recv_reorder_ctrl *reorder_ctl; -+ int i; -+ -+ for (i = 0; i < 16; i++) { -+ reorder_ctl = &sta->recvreorder_ctrl[i]; -+ if (reorder_ctl->ampdu_size != RX_AMPDU_SIZE_INVALID || reorder_ctl->indicate_seq != 0xFFFF) { -+ RTW_PRINT_SEL(sel, "tid=%d, enable=%d, ampdu_size=%u, indicate_seq=%u\n" -+ , i, reorder_ctl->enable, reorder_ctl->ampdu_size, reorder_ctl->indicate_seq -+ ); -+ } -+ } -+} -+ -+void dump_tx_rate_bmp(void *sel, struct dvobj_priv *dvobj) -+{ -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); -+ u8 bw; -+ -+ RTW_PRINT_SEL(sel, "%-6s", "bw"); -+ if (hal_chk_proto_cap(adapter, PROTO_CAP_11AC)) -+ _RTW_PRINT_SEL(sel, " %-15s", "vht"); -+ -+ _RTW_PRINT_SEL(sel, " %-11s %-4s %-3s\n", "ht", "ofdm", "cck"); -+ -+ for (bw = CHANNEL_WIDTH_20; bw <= CHANNEL_WIDTH_160; bw++) { -+ if (!hal_is_bw_support(adapter, bw)) -+ continue; -+ -+ RTW_PRINT_SEL(sel, "%6s", ch_width_str(bw)); -+ if (hal_chk_proto_cap(adapter, PROTO_CAP_11AC)) { -+ _RTW_PRINT_SEL(sel, " %03x %03x %03x %03x" -+ , RATE_BMP_GET_VHT_4SS(rfctl->rate_bmp_vht_by_bw[bw]) -+ , RATE_BMP_GET_VHT_3SS(rfctl->rate_bmp_vht_by_bw[bw]) -+ , RATE_BMP_GET_VHT_2SS(rfctl->rate_bmp_vht_by_bw[bw]) -+ , RATE_BMP_GET_VHT_1SS(rfctl->rate_bmp_vht_by_bw[bw]) -+ ); -+ } -+ -+ _RTW_PRINT_SEL(sel, " %02x %02x %02x %02x" -+ , bw <= CHANNEL_WIDTH_40 ? RATE_BMP_GET_HT_4SS(rfctl->rate_bmp_ht_by_bw[bw]) : 0 -+ , bw <= CHANNEL_WIDTH_40 ? RATE_BMP_GET_HT_3SS(rfctl->rate_bmp_ht_by_bw[bw]) : 0 -+ , bw <= CHANNEL_WIDTH_40 ? RATE_BMP_GET_HT_2SS(rfctl->rate_bmp_ht_by_bw[bw]) : 0 -+ , bw <= CHANNEL_WIDTH_40 ? RATE_BMP_GET_HT_1SS(rfctl->rate_bmp_ht_by_bw[bw]) : 0 -+ ); -+ -+ _RTW_PRINT_SEL(sel, " %03x %01x\n" -+ , bw <= CHANNEL_WIDTH_20 ? RATE_BMP_GET_OFDM(rfctl->rate_bmp_cck_ofdm) : 0 -+ , bw <= CHANNEL_WIDTH_20 ? RATE_BMP_GET_CCK(rfctl->rate_bmp_cck_ofdm) : 0 -+ ); -+ } -+} -+ -+void dump_adapters_status(void *sel, struct dvobj_priv *dvobj) -+{ -+#if defined(CONFIG_RTW_DEBUG) || defined(CONFIG_PROC_DEBUG) -+ struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); -+ int i; -+ _adapter *iface; -+ u8 u_ch, u_bw, u_offset; -+#if (defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)) || defined(CONFIG_CLIENT_PORT_CFG) -+ char str_val[64] = {'\0'}; -+#endif -+ dump_mi_status(sel, dvobj); -+ -+#if defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN) -+ RTW_PRINT_SEL(sel, "[AP] LIMITED_AP_NUM:%d\n", CONFIG_LIMITED_AP_NUM); -+ RTW_PRINT_SEL(sel, "[AP] vap_map:0x%02x\n", dvobj->vap_map); -+#endif -+#ifdef CONFIG_HW_P0_TSF_SYNC -+ RTW_PRINT_SEL(sel, "[AP] p0 tsf sync port = %d\n", dvobj->p0_tsf.sync_port); -+ RTW_PRINT_SEL(sel, "[AP] p0 tsf timer offset = %d\n", dvobj->p0_tsf.offset); -+#endif -+#ifdef CONFIG_CLIENT_PORT_CFG -+ RTW_PRINT_SEL(sel, "[CLT] clt_num = %d\n", dvobj->clt_port.num); -+ RTW_PRINT_SEL(sel, "[CLT] clt_map = 0x%02x\n", dvobj->clt_port.bmp); -+#endif -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ RTW_PRINT_SEL(sel, "[MI] default port id:%d\n\n", dvobj->dft.port_id); -+#endif /* CONFIG_FW_MULTI_PORT_SUPPORT */ -+ -+ RTW_PRINT_SEL(sel, "dev status:%s%s\n\n" -+ , dev_is_surprise_removed(dvobj) ? " SR" : "" -+ , dev_is_drv_stopped(dvobj) ? " DS" : "" -+ ); -+ -+#ifdef CONFIG_P2P -+#define P2P_INFO_TITLE_FMT " %-3s %-4s" -+#define P2P_INFO_TITLE_ARG , "lch", "p2ps" -+#ifdef CONFIG_IOCTL_CFG80211 -+#define P2P_INFO_VALUE_FMT " %3u %c%3u" -+#define P2P_INFO_VALUE_ARG , iface->wdinfo.listen_channel, iface->wdev_data.p2p_enabled ? 'e' : ' ', rtw_p2p_state(&iface->wdinfo) -+#else -+#define P2P_INFO_VALUE_FMT " %3u %4u" -+#define P2P_INFO_VALUE_ARG , iface->wdinfo.listen_channel, rtw_p2p_state(&iface->wdinfo) -+#endif -+#define P2P_INFO_DASH "---------" -+#else -+#define P2P_INFO_TITLE_FMT "" -+#define P2P_INFO_TITLE_ARG -+#define P2P_INFO_VALUE_FMT "" -+#define P2P_INFO_VALUE_ARG -+#define P2P_INFO_DASH -+#endif -+ -+#ifdef DBG_TSF_UPDATE -+#define TSF_PAUSE_TIME_TITLE_FMT " %-5s" -+#define TSF_PAUSE_TIME_TITLE_ARG , "tsfup" -+#define TSF_PAUSE_TIME_VALUE_FMT " %5d" -+#define TSF_PAUSE_TIME_VALUE_ARG , ((iface->mlmeextpriv.tsf_update_required && iface->mlmeextpriv.tsf_update_pause_stime) ? (rtw_get_passing_time_ms(iface->mlmeextpriv.tsf_update_pause_stime) > 99999 ? 99999 : rtw_get_passing_time_ms(iface->mlmeextpriv.tsf_update_pause_stime)) : 0) -+#else -+#define TSF_PAUSE_TIME_TITLE_FMT "" -+#define TSF_PAUSE_TIME_TITLE_ARG -+#define TSF_PAUSE_TIME_VALUE_FMT "" -+#define TSF_PAUSE_TIME_VALUE_ARG -+#endif -+ -+#if (defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)) || defined(CONFIG_CLIENT_PORT_CFG) -+#define INFO_FMT " %-4s" -+#define INFO_ARG , "info" -+#define INFO_CNT_FMT " %-20s" -+#define INFO_CNT_ARG , str_val -+#else -+#define INFO_FMT "" -+#define INFO_ARG -+#define INFO_CNT_FMT "" -+#define INFO_CNT_ARG -+#endif -+ -+ RTW_PRINT_SEL(sel, "%-2s %-15s %c %-3s %-3s %-3s %-17s %-4s %-7s %-5s" -+ P2P_INFO_TITLE_FMT -+ TSF_PAUSE_TIME_TITLE_FMT -+ " %s"INFO_FMT"\n" -+ , "id", "ifname", ' ', "bup", "nup", "ncd", "macaddr", "port", "ch", "class" -+ P2P_INFO_TITLE_ARG -+ TSF_PAUSE_TIME_TITLE_ARG -+ , "status"INFO_ARG); -+ -+ RTW_PRINT_SEL(sel, "---------------------------------------------------------------" -+ P2P_INFO_DASH -+ "-------\n"); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface) { -+ #if (defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN)) || defined(CONFIG_CLIENT_PORT_CFG) -+ _rtw_memset(&str_val, '\0', sizeof(str_val)); -+ #endif -+ #if defined(CONFIG_AP_MODE) && defined(CONFIG_SUPPORT_MULTI_BCN) && defined(CONFIG_FW_HANDLE_TXBCN) -+ if (MLME_IS_AP(iface) || MLME_IS_MESH(iface)) { -+ u8 len; -+ char *p = str_val; -+ char tmp_str[10] = {'\0'}; -+ -+ len = snprintf(tmp_str, sizeof(tmp_str), "%s", "ap_id:"); -+ strncpy(p, tmp_str, len); -+ p += len; -+ _rtw_memset(&tmp_str, '\0', sizeof(tmp_str)); -+ #ifdef DBG_HW_PORT -+ len = snprintf(tmp_str, sizeof(tmp_str), "%d (%d,%d)", iface->vap_id, iface->hw_port, iface->client_port); -+ #else -+ len = snprintf(tmp_str, sizeof(tmp_str), "%d", iface->vap_id); -+ #endif -+ strncpy(p, tmp_str, len); -+ } -+ #endif -+ #ifdef CONFIG_CLIENT_PORT_CFG -+ if (MLME_IS_STA(iface)) { -+ u8 len; -+ char *p = str_val; -+ char tmp_str[10] = {'\0'}; -+ -+ len = snprintf(tmp_str, sizeof(tmp_str), "%s", "c_pid:"); -+ strncpy(p, tmp_str, len); -+ p += len; -+ _rtw_memset(&tmp_str, '\0', sizeof(tmp_str)); -+ #ifdef DBG_HW_PORT -+ len = snprintf(tmp_str, sizeof(tmp_str), "%d (%d,%d)", iface->client_port, iface->hw_port, iface->client_port); -+ #else -+ len = snprintf(tmp_str, sizeof(tmp_str), "%d", iface->client_port); -+ #endif -+ strncpy(p, tmp_str, len); -+ } -+ #endif -+ -+ RTW_PRINT_SEL(sel, "%2d %-15s %c %3u %3u %3u "MAC_FMT" %4hhu %3u,%u,%u %5u" -+ P2P_INFO_VALUE_FMT -+ TSF_PAUSE_TIME_VALUE_FMT -+ " "MLME_STATE_FMT" " INFO_CNT_FMT"\n" -+ , i, iface->registered ? ADPT_ARG(iface) : NULL -+ , iface->registered ? 'R' : ' ' -+ , iface->bup -+ , iface->netif_up -+ , iface->net_closed -+ , MAC_ARG(adapter_mac_addr(iface)) -+ , rtw_hal_get_port(iface) -+ , iface->mlmeextpriv.cur_channel -+ , iface->mlmeextpriv.cur_bwmode -+ , iface->mlmeextpriv.cur_ch_offset -+ , rtw_get_op_class_by_chbw(iface->mlmeextpriv.cur_channel -+ , iface->mlmeextpriv.cur_bwmode -+ , iface->mlmeextpriv.cur_ch_offset) -+ P2P_INFO_VALUE_ARG -+ TSF_PAUSE_TIME_VALUE_ARG -+ , MLME_STATE_ARG(iface) -+ INFO_CNT_ARG -+ ); -+ } -+ } -+ -+ RTW_PRINT_SEL(sel, "---------------------------------------------------------------" -+ P2P_INFO_DASH -+ "-------\n"); -+ -+ if (rtw_mi_get_ch_setting_union(dvobj_get_primary_adapter(dvobj), &u_ch, &u_bw, &u_offset)) -+ RTW_PRINT_SEL(sel, "%55s %3u,%u,%u %5u\n" -+ , "union:" -+ , u_ch, u_bw, u_offset, rtw_get_op_class_by_chbw(u_ch, u_bw, u_offset)); -+ -+ RTW_PRINT_SEL(sel, "%55s %3u,%u,%u offch_state:%d\n" -+ , "oper:" -+ , dvobj->oper_channel -+ , dvobj->oper_bwmode -+ , dvobj->oper_ch_offset -+ , rfctl->offch_state -+ ); -+ -+#ifdef CONFIG_DFS_MASTER -+ if (rfctl->radar_detect_ch != 0) { -+ RTW_PRINT_SEL(sel, "%55s %3u,%u,%u" -+ , "radar_detect:" -+ , rfctl->radar_detect_ch -+ , rfctl->radar_detect_bw -+ , rfctl->radar_detect_offset -+ ); -+ -+ if (rfctl->radar_detect_by_others) -+ _RTW_PRINT_SEL(sel, ", by AP of STA link"); -+ else { -+ u32 non_ocp_ms; -+ u32 cac_ms; -+ u8 dfs_domain = rtw_rfctl_get_dfs_domain(rfctl); -+ -+ _RTW_PRINT_SEL(sel, ", domain:%s(%u)", rtw_dfs_regd_str(dfs_domain), dfs_domain); -+ -+ rtw_get_ch_waiting_ms(rfctl -+ , rfctl->radar_detect_ch -+ , rfctl->radar_detect_bw -+ , rfctl->radar_detect_offset -+ , &non_ocp_ms -+ , &cac_ms -+ ); -+ -+ if (non_ocp_ms) -+ _RTW_PRINT_SEL(sel, ", non_ocp:%d", non_ocp_ms); -+ if (cac_ms) -+ _RTW_PRINT_SEL(sel, ", cac:%d", cac_ms); -+ } -+ -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+#endif /* CONFIG_DFS_MASTER */ -+#endif /* CONFIG_RTW_DEBUG || CONFIG_PROC_DEBUG */ -+} -+ -+#if defined(CONFIG_RTW_DEBUG) || defined(CONFIG_PROC_DEBUG) -+#define SEC_CAM_ENT_ID_TITLE_FMT "%-2s" -+#define SEC_CAM_ENT_ID_TITLE_ARG "id" -+#define SEC_CAM_ENT_ID_VALUE_FMT "%2u" -+#define SEC_CAM_ENT_ID_VALUE_ARG(id) (id) -+ -+#define SEC_CAM_ENT_TITLE_FMT "%-6s %-17s %-32s %-3s %-8s %-2s %-2s %-5s" -+#define SEC_CAM_ENT_TITLE_ARG "ctrl", "addr", "key", "kid", "type", "MK", "GK", "valid" -+#define SEC_CAM_ENT_VALUE_FMT "0x%04x "MAC_FMT" "KEY_FMT" %3u %-8s %2u %2u %5u" -+#define SEC_CAM_ENT_VALUE_ARG(ent) \ -+ (ent)->ctrl \ -+ , MAC_ARG((ent)->mac) \ -+ , KEY_ARG((ent)->key) \ -+ , ((ent)->ctrl) & 0x03 \ -+ , (((ent)->ctrl) & 0x200) ? \ -+ security_type_str((((ent)->ctrl) >> 2 & 0x7) | _SEC_TYPE_256_) : \ -+ security_type_str(((ent)->ctrl) >> 2 & 0x7) \ -+ , (((ent)->ctrl) >> 5) & 0x01 \ -+ , (((ent)->ctrl) >> 6) & 0x01 \ -+ , (((ent)->ctrl) >> 15) & 0x01 -+ -+void dump_sec_cam_ent(void *sel, struct sec_cam_ent *ent, int id) -+{ -+ if (id >= 0) { -+ RTW_PRINT_SEL(sel, SEC_CAM_ENT_ID_VALUE_FMT " " SEC_CAM_ENT_VALUE_FMT"\n" -+ , SEC_CAM_ENT_ID_VALUE_ARG(id), SEC_CAM_ENT_VALUE_ARG(ent)); -+ } else -+ RTW_PRINT_SEL(sel, SEC_CAM_ENT_VALUE_FMT"\n", SEC_CAM_ENT_VALUE_ARG(ent)); -+} -+ -+void dump_sec_cam_ent_title(void *sel, u8 has_id) -+{ -+ if (has_id) { -+ RTW_PRINT_SEL(sel, SEC_CAM_ENT_ID_TITLE_FMT " " SEC_CAM_ENT_TITLE_FMT"\n" -+ , SEC_CAM_ENT_ID_TITLE_ARG, SEC_CAM_ENT_TITLE_ARG); -+ } else -+ RTW_PRINT_SEL(sel, SEC_CAM_ENT_TITLE_FMT"\n", SEC_CAM_ENT_TITLE_ARG); -+} -+#endif -+ -+void dump_sec_cam(void *sel, _adapter *adapter) -+{ -+#if defined(CONFIG_RTW_DEBUG) || defined(CONFIG_PROC_DEBUG) -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ struct sec_cam_ent ent; -+ int i; -+ -+ RTW_PRINT_SEL(sel, "HW sec cam:\n"); -+ dump_sec_cam_ent_title(sel, 1); -+ for (i = 0; i < cam_ctl->num; i++) { -+ rtw_sec_read_cam_ent(adapter, i, (u8 *)(&ent.ctrl), ent.mac, ent.key); -+ dump_sec_cam_ent(sel , &ent, i); -+ } -+#endif -+} -+ -+void dump_sec_cam_cache(void *sel, _adapter *adapter) -+{ -+#if defined(CONFIG_RTW_DEBUG) || defined(CONFIG_PROC_DEBUG) -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ int i; -+ -+ RTW_PRINT_SEL(sel, "SW sec cam cache:\n"); -+ dump_sec_cam_ent_title(sel, 1); -+ for (i = 0; i < cam_ctl->num; i++) { -+ if (dvobj->cam_cache[i].ctrl != 0) -+ dump_sec_cam_ent(sel, &dvobj->cam_cache[i], i); -+ } -+#endif -+} -+ -+static u8 fwdl_test_chksum_fail = 0; -+static u8 fwdl_test_wintint_rdy_fail = 0; -+ -+bool rtw_fwdl_test_trigger_chksum_fail(void) -+{ -+ if (fwdl_test_chksum_fail) { -+ RTW_PRINT("fwdl test case: trigger chksum_fail\n"); -+ fwdl_test_chksum_fail--; -+ return _TRUE; -+ } -+ return _FALSE; -+} -+ -+bool rtw_fwdl_test_trigger_wintint_rdy_fail(void) -+{ -+ if (fwdl_test_wintint_rdy_fail) { -+ RTW_PRINT("fwdl test case: trigger wintint_rdy_fail\n"); -+ fwdl_test_wintint_rdy_fail--; -+ return _TRUE; -+ } -+ return _FALSE; -+} -+ -+static u8 del_rx_ampdu_test_no_tx_fail = 0; -+ -+bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void) -+{ -+ if (del_rx_ampdu_test_no_tx_fail) { -+ RTW_PRINT("del_rx_ampdu test case: trigger no_tx_fail\n"); -+ del_rx_ampdu_test_no_tx_fail--; -+ return _TRUE; -+ } -+ return _FALSE; -+} -+ -+static u32 g_wait_hiq_empty_ms = 0; -+ -+u32 rtw_get_wait_hiq_empty_ms(void) -+{ -+ return g_wait_hiq_empty_ms; -+} -+ -+static systime sta_linking_test_start_time = 0; -+static u32 sta_linking_test_wait_ms = 0; -+static u8 sta_linking_test_force_fail = 0; -+ -+void rtw_sta_linking_test_set_start(void) -+{ -+ sta_linking_test_start_time = rtw_get_current_time(); -+} -+ -+bool rtw_sta_linking_test_wait_done(void) -+{ -+ return rtw_get_passing_time_ms(sta_linking_test_start_time) >= sta_linking_test_wait_ms; -+} -+ -+bool rtw_sta_linking_test_force_fail(void) -+{ -+ return sta_linking_test_force_fail; -+} -+ -+#ifdef CONFIG_AP_MODE -+static u16 ap_linking_test_force_auth_fail = 0; -+static u16 ap_linking_test_force_asoc_fail = 0; -+ -+u16 rtw_ap_linking_test_force_auth_fail(void) -+{ -+ return ap_linking_test_force_auth_fail; -+} -+ -+u16 rtw_ap_linking_test_force_asoc_fail(void) -+{ -+ return ap_linking_test_force_asoc_fail; -+} -+#endif -+ -+#ifdef CONFIG_PROC_DEBUG -+int proc_get_defs_param(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ -+ RTW_PRINT_SEL(m, "%s %15s\n", "lmt_sta", "lmt_time"); -+ RTW_PRINT_SEL(m, "%-15u %-15u\n" -+ , mlme->defs_lmt_sta -+ , mlme->defs_lmt_time -+ ); -+ -+ return 0; -+} -+ -+ssize_t proc_set_defs_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ -+ char tmp[32]; -+ u32 defs_lmt_sta; -+ u32 defs_lmt_time; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%u %u", &defs_lmt_sta, &defs_lmt_time); -+ -+ if (num >= 1) -+ mlme->defs_lmt_sta = defs_lmt_sta; -+ if (num >= 2) -+ mlme->defs_lmt_time = defs_lmt_time; -+ } -+ -+ return count; -+ -+} -+ -+ssize_t proc_set_write_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 addr, val, len; -+ -+ if (count < 3) { -+ RTW_INFO("argument size is less than 3\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%x %x %x", &addr, &val, &len); -+ -+ if (num != 3) { -+ RTW_INFO("invalid write_reg parameter!\n"); -+ return count; -+ } -+ -+ switch (len) { -+ case 1: -+ rtw_write8(padapter, addr, (u8)val); -+ break; -+ case 2: -+ rtw_write16(padapter, addr, (u16)val); -+ break; -+ case 4: -+ rtw_write32(padapter, addr, val); -+ break; -+ default: -+ RTW_INFO("error write length=%d", len); -+ break; -+ } -+ -+ } -+ -+ return count; -+ -+} -+ -+static u32 proc_get_read_addr = 0xeeeeeeee; -+static u32 proc_get_read_len = 0x4; -+ -+int proc_get_read_reg(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (proc_get_read_addr == 0xeeeeeeee) { -+ RTW_PRINT_SEL(m, "address not initialized\n"); -+ return 0; -+ } -+ -+ switch (proc_get_read_len) { -+ case 1: -+ RTW_PRINT_SEL(m, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr)); -+ break; -+ case 2: -+ RTW_PRINT_SEL(m, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr)); -+ break; -+ case 4: -+ RTW_PRINT_SEL(m, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr)); -+ break; -+ default: -+ RTW_PRINT_SEL(m, "error read length=%d\n", proc_get_read_len); -+ break; -+ } -+ -+ return 0; -+} -+ -+ssize_t proc_set_read_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[16]; -+ u32 addr, len; -+ -+ if (count < 2) { -+ RTW_INFO("argument size is less than 2\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%x %x", &addr, &len); -+ -+ if (num != 2) { -+ RTW_INFO("invalid read_reg parameter!\n"); -+ return count; -+ } -+ -+ proc_get_read_addr = addr; -+ -+ proc_get_read_len = len; -+ } -+ -+ return count; -+ -+} -+ -+int proc_get_rx_stat(struct seq_file *m, void *v) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sta_info *psta = NULL; -+ struct stainfo_stats *pstats = NULL; -+ struct sta_priv *pstapriv = &(adapter->stapriv); -+ u32 i, j; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ pstats = &psta->sta_stats; -+ -+ if (pstats == NULL) -+ continue; -+ if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) -+ && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE) -+ && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), ETH_ALEN) != _TRUE)) { -+ RTW_PRINT_SEL(m, "MAC :\t\t"MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); -+ RTW_PRINT_SEL(m, "data_rx_cnt :\t%llu\n", sta_rx_data_uc_pkts(psta) - pstats->last_rx_data_uc_pkts); -+ pstats->last_rx_data_uc_pkts = sta_rx_data_uc_pkts(psta); -+ RTW_PRINT_SEL(m, "duplicate_cnt :\t%u\n", pstats->duplicate_cnt); -+ pstats->duplicate_cnt = 0; -+ RTW_PRINT_SEL(m, "rx_per_rate_cnt :\n"); -+ -+ for (j = 0; j < 0x60; j++) { -+ RTW_PRINT_SEL(m, "%08u ", pstats->rxratecnt[j]); -+ pstats->rxratecnt[j] = 0; -+ if ((j%8) == 7) -+ RTW_PRINT_SEL(m, "\n"); -+ } -+ RTW_PRINT_SEL(m, "\n"); -+ } -+ } -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ return 0; -+} -+ -+int proc_get_tx_stat(struct seq_file *m, void *v) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sta_info *psta = NULL; -+ u8 sta_mac[NUM_STA][ETH_ALEN] = {{0}}; -+ uint mac_id[NUM_STA]; -+ struct stainfo_stats *pstats = NULL; -+ struct sta_priv *pstapriv = &(adapter->stapriv); -+ struct sta_priv *pstapriv_primary = &(GET_PRIMARY_ADAPTER(adapter))->stapriv; -+ u32 i, macid_rec_idx = 0; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; -+ struct submit_ctx gotc2h; -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) -+ && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE) -+ && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), ETH_ALEN) != _TRUE)) { -+ _rtw_memcpy(&sta_mac[macid_rec_idx][0], psta->cmn.mac_addr, ETH_ALEN); -+ mac_id[macid_rec_idx] = psta->cmn.mac_id; -+ macid_rec_idx++; -+ } -+ } -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (i = 0; i < macid_rec_idx; i++) { -+ _rtw_memcpy(pstapriv_primary->c2h_sta_mac, &sta_mac[i][0], ETH_ALEN); -+ pstapriv_primary->c2h_adapter_id = adapter->iface_id; -+ rtw_sctx_init(&gotc2h, 60); -+ pstapriv_primary->gotc2h = &gotc2h; -+ rtw_hal_reqtxrpt(adapter, mac_id[i]); -+ if (rtw_sctx_wait(&gotc2h, __func__)) { -+ psta = rtw_get_stainfo(pstapriv, &sta_mac[i][0]); -+ if(psta) { -+ pstats = &psta->sta_stats; -+#ifndef ROKU_PRIVATE -+ RTW_PRINT_SEL(m, "data_sent_cnt :\t%u\n", pstats->tx_ok_cnt + pstats->tx_fail_cnt); -+ RTW_PRINT_SEL(m, "success_cnt :\t%u\n", pstats->tx_ok_cnt); -+ RTW_PRINT_SEL(m, "failure_cnt :\t%u\n", pstats->tx_fail_cnt); -+ RTW_PRINT_SEL(m, "retry_cnt :\t%u\n\n", pstats->tx_retry_cnt); -+#else -+ RTW_PRINT_SEL(m, "MAC: " MAC_FMT " sent: %u fail: %u retry: %u\n", -+ MAC_ARG(&sta_mac[i][0]), pstats->tx_ok_cnt, pstats->tx_fail_cnt, pstats->tx_retry_cnt); -+#endif /* ROKU_PRIVATE */ -+ -+ } else -+ RTW_PRINT_SEL(m, "STA is gone\n"); -+ } else { -+ //to avoid c2h modify counters -+ pstapriv_primary->gotc2h = NULL; -+ _rtw_memset(pstapriv_primary->c2h_sta_mac, 0, ETH_ALEN); -+ pstapriv_primary->c2h_adapter_id = CONFIG_IFACE_NUMBER; -+ RTW_PRINT_SEL(m, "Warming : Query timeout, operation abort!!\n"); -+ break; -+ } -+ pstapriv_primary->gotc2h = NULL; -+ _rtw_memset(pstapriv_primary->c2h_sta_mac, 0, ETH_ALEN); -+ pstapriv_primary->c2h_adapter_id = CONFIG_IFACE_NUMBER; -+ } -+ return 0; -+} -+ -+int proc_get_fwstate(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ RTW_PRINT_SEL(m, "fwstate=0x%x\n", get_fwstate(pmlmepriv)); -+ -+ return 0; -+} -+ -+int proc_get_sec_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct security_priv *sec = &padapter->securitypriv; -+ -+ RTW_PRINT_SEL(m, "auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", -+ sec->dot11AuthAlgrthm, sec->dot11PrivacyAlgrthm, -+ sec->ndisauthtype, sec->ndisencryptstatus); -+ -+ RTW_PRINT_SEL(m, "hw_decrypted=%d\n", sec->hw_decrypted); -+ -+#ifdef DBG_SW_SEC_CNT -+ RTW_PRINT_SEL(m, "wep_sw_enc_cnt=%llu, %llu, %llu\n" -+ , sec->wep_sw_enc_cnt_bc , sec->wep_sw_enc_cnt_mc, sec->wep_sw_enc_cnt_uc); -+ RTW_PRINT_SEL(m, "wep_sw_dec_cnt=%llu, %llu, %llu\n" -+ , sec->wep_sw_dec_cnt_bc , sec->wep_sw_dec_cnt_mc, sec->wep_sw_dec_cnt_uc); -+ -+ RTW_PRINT_SEL(m, "tkip_sw_enc_cnt=%llu, %llu, %llu\n" -+ , sec->tkip_sw_enc_cnt_bc , sec->tkip_sw_enc_cnt_mc, sec->tkip_sw_enc_cnt_uc); -+ RTW_PRINT_SEL(m, "tkip_sw_dec_cnt=%llu, %llu, %llu\n" -+ , sec->tkip_sw_dec_cnt_bc , sec->tkip_sw_dec_cnt_mc, sec->tkip_sw_dec_cnt_uc); -+ -+ RTW_PRINT_SEL(m, "aes_sw_enc_cnt=%llu, %llu, %llu\n" -+ , sec->aes_sw_enc_cnt_bc , sec->aes_sw_enc_cnt_mc, sec->aes_sw_enc_cnt_uc); -+ RTW_PRINT_SEL(m, "aes_sw_dec_cnt=%llu, %llu, %llu\n" -+ , sec->aes_sw_dec_cnt_bc , sec->aes_sw_dec_cnt_mc, sec->aes_sw_dec_cnt_uc); -+ -+ RTW_PRINT_SEL(m, "gcmp_sw_enc_cnt=%llu, %llu, %llu\n" -+ , sec->gcmp_sw_enc_cnt_bc , sec->gcmp_sw_enc_cnt_mc, sec->gcmp_sw_enc_cnt_uc); -+ RTW_PRINT_SEL(m, "gcmp_sw_dec_cnt=%llu, %llu, %llu\n" -+ , sec->gcmp_sw_dec_cnt_bc , sec->gcmp_sw_dec_cnt_mc, sec->gcmp_sw_dec_cnt_uc); -+#endif /* DBG_SW_SEC_CNT */ -+ -+ return 0; -+} -+ -+int proc_get_mlmext_state(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ RTW_PRINT_SEL(m, "pmlmeinfo->state=0x%x\n", pmlmeinfo->state); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_LAYER2_ROAMING -+int proc_get_roam_flags(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "0x%02x\n", rtw_roam_flags(adapter)); -+ -+ return 0; -+} -+ -+ssize_t proc_set_roam_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ char tmp[32]; -+ u8 flags; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx", &flags); -+ -+ if (num == 1) -+ rtw_assign_roam_flags(adapter, flags); -+ } -+ -+ return count; -+ -+} -+ -+int proc_get_roam_param(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ -+ RTW_PRINT_SEL(m, "%12s %15s %26s %16s\n", "rssi_diff_th", "scanr_exp_ms", "scan_interval(unit:2 sec)", "rssi_threshold"); -+ RTW_PRINT_SEL(m, "%-15u %-13u %-27u %-11u\n" -+ , mlme->roam_rssi_diff_th -+ , mlme->roam_scanr_exp_ms -+ , mlme->roam_scan_int -+ , mlme->roam_rssi_threshold -+ ); -+ -+ return 0; -+} -+ -+ssize_t proc_set_roam_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ -+ char tmp[32]; -+ u8 rssi_diff_th; -+ u32 scanr_exp_ms; -+ u32 scan_int; -+ u8 rssi_threshold; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu %u %u %hhu", &rssi_diff_th, &scanr_exp_ms, &scan_int, &rssi_threshold); -+ -+ if (num >= 1) -+ mlme->roam_rssi_diff_th = rssi_diff_th; -+ if (num >= 2) -+ mlme->roam_scanr_exp_ms = scanr_exp_ms; -+ if (num >= 3) -+ mlme->roam_scan_int = scan_int; -+ if (num >= 4) -+ mlme->roam_rssi_threshold = rssi_threshold; -+ } -+ -+ return count; -+ -+} -+ -+ssize_t proc_set_roam_tgt_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ char tmp[32]; -+ u8 addr[ETH_ALEN]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", addr, addr + 1, addr + 2, addr + 3, addr + 4, addr + 5); -+ if (num == 6) -+ _rtw_memcpy(adapter->mlmepriv.roam_tgt_addr, addr, ETH_ALEN); -+ -+ RTW_INFO("set roam_tgt_addr to "MAC_FMT"\n", MAC_ARG(adapter->mlmepriv.roam_tgt_addr)); -+ } -+ -+ return count; -+} -+#endif /* CONFIG_LAYER2_ROAMING */ -+ -+#ifdef CONFIG_WAR_OFFLOAD -+int proc_get_war_offload_enable(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ -+ if (_TRUE == pwrpriv->wowlan_war_offload_mode) { -+ RTW_PRINT_SEL(m, "\n[ Offload Feature Enabled ]\n"); -+ -+ if (WAR_ARP_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) { -+ RTW_PRINT_SEL(m, "\n ARP Reponse offload enabled\n"); -+ } -+#ifdef CONFIG_OFFLOAD_MDNS_V4 -+ if (WAR_MDNS_V4_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) { -+ RTW_PRINT_SEL(m, "\n MDNS v4 Reponse offload enabled\n"); -+ } -+ if (WAR_MDNS_V4_WAKEUP_EN & pwrpriv->wowlan_war_offload_ctrl) { -+ RTW_PRINT_SEL(m, "\n MDNS v4 Wakeup offload enabled\n"); -+ } -+#endif /* CONFIG_OFFLOAD_MDNS_v4 */ -+#ifdef CONFIG_OFFLOAD_MDNS_V6 -+ if (WAR_MDNS_V6_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) { -+ RTW_PRINT_SEL(m, "\n MDNS v6 Reponse offload enabled\n"); -+ } -+ if (WAR_MDNS_V6_WAKEUP_EN & pwrpriv->wowlan_war_offload_ctrl) { -+ RTW_PRINT_SEL(m, "\n MDNS v6 Wakeup offload enabled\n"); -+ } -+#endif /* CONFIG_OFFLOAD_MDNS_V6 */ -+ -+ if (WAR_ARP_WAKEUP_EN & pwrpriv->wowlan_war_offload_ctrl) { -+ RTW_PRINT_SEL(m, "\n ARP Request wakeup enabled\n"); -+ } -+ -+ } else { -+ RTW_PRINT_SEL(m, "\n[ Offload Feature Disabled ]\n"); -+ } -+ -+ return 0; -+} -+ -+ssize_t proc_set_war_offload_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ char tmp[32]; -+ u32 offload_cfg = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%x", &offload_cfg); -+ -+ if (num == 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": Set war offload cfg = %x\n", FUNC_ADPT_ARG(padapter), offload_cfg); -+ pwrpriv->wowlan_war_offload_ctrl = offload_cfg; -+ pwrpriv->wowlan_war_offload_mode = offload_cfg?_TRUE:_FALSE; -+ -+ } -+ } -+ -+ return count; -+} -+ -+ssize_t proc_set_war_offload_ipv4_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ char tmp[128]; -+ u32 ip_addr = 0, ip_subnet = 0, ip_gateway = 0, index = 0; -+ struct war_ipv4_fmt* pip_info = &pwrpriv->wowlan_war_offload_ipv4; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%d %x %x %x", &index, &ip_addr, &ip_subnet, &ip_gateway); -+ -+ if (num == 4) { -+ pip_info->ip_addr[index-1] = ip_addr; -+ pip_info->ip_subnet[index-1] = ip_subnet; -+ pip_info->ip_gateway[index-1] = ip_gateway; -+ RTW_INFO(FUNC_ADPT_FMT "Setup IPv4 address:\n", FUNC_ADPT_ARG(padapter)); -+ RTW_INFO("Index(%d) IP=%d.%d.%d.%d\n", index, (ip_addr & 0xff), ((ip_addr & 0xff00)>>8), ((ip_addr & 0xff0000)>>16), ((ip_addr & 0xff000000)>>24)); -+ } else { -+ RTW_INFO("Wrong input buffer count (%d)\n", num); -+ return -EFAULT; -+ } -+ } -+ -+ return count; -+} -+ -+ssize_t proc_set_war_offload_ipv6_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ char tmp[255]; -+ u32 ip_addr = 0, ip_subnet = 0, ip_gateway = 0; -+ struct war_ipv6_fmt* pip_info = &pwrpriv->wowlan_war_offload_ipv6; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num; -+ int i; -+ u32 index; -+ u16 val[64]; -+ u16 big_endian_val[64]; -+ -+ num = sscanf(tmp, "%d %hx:%hx:%hx:%hx:%hx:%hx:%hx:%hx", &index, &val[0], &val[1], &val[2], &val[3], &val[4], &val[5], &val[6], &val[7]); -+ for (i=0;i<8;i++) { -+ big_endian_val[i] = htons(val[i]); -+ } -+ _rtw_memcpy(pip_info->ipv6_addr[index-1], big_endian_val, RTW_IPv6_ADDR_LEN); -+ -+ if (num == 9) { -+ RTW_INFO(FUNC_ADPT_FMT "Setup IPv6 address\n", FUNC_ADPT_ARG(padapter)); -+ } else { -+ RTW_INFO("Wrong input count (%d)\n", num); -+ return -EFAULT; -+ } -+ } -+ -+ return count; -+} -+ -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+ -+int proc_get_war_offload_mdns_domain_name(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ -+ if (_TRUE == pwrpriv->wowlan_war_offload_mode) { -+ if ((WAR_MDNS_V4_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V6_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V4_WAKEUP_EN & pwrpriv->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V6_WAKEUP_EN & pwrpriv->wowlan_war_offload_ctrl)) { -+ RTW_PRINT_SEL(m, "\nDomain Name:[%s](%d)\n\n", -+ pwrpriv->wowlan_war_offload_mdns_domain_name, pwrpriv->wowlan_war_offload_mdns_domain_name_len); -+ } else { -+ RTW_PRINT_SEL(m, "\nMSND RSP Not enabled\n\n"); -+ } -+ } else { -+ RTW_PRINT_SEL(m, "\nOffload Not enabled\n\n"); -+ } -+ -+ return 0; -+} -+ -+ssize_t proc_set_war_offload_mdns_domain_name(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ char tmp[MAX_MDNS_DOMAIN_NAME_LEN+1]; -+ char domain_name[MAX_MDNS_DOMAIN_NAME_LEN+1]; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is large than MAX_MDNS_DOMAIN_NAME_LEN(%d)\n", FUNC_ADPT_ARG(padapter), MAX_MDNS_DOMAIN_NAME_LEN); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%s", domain_name); -+ if(1 == num) { -+ pwrpriv->wowlan_war_offload_mdns_domain_name_len = strlen(domain_name); -+ _rtw_memset(pwrpriv->wowlan_war_offload_mdns_domain_name, 0x00, MAX_MDNS_DOMAIN_NAME_LEN); -+ _rtw_memcpy(pwrpriv->wowlan_war_offload_mdns_domain_name, domain_name, strlen(domain_name)); -+ } -+ } -+ -+ return count; -+} -+ -+ -+int proc_get_war_offload_mdns_machine_name(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ int i=0; -+ -+ if (_TRUE == pwrpriv->wowlan_war_offload_mode) { -+ if ((WAR_MDNS_V4_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V6_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V4_WAKEUP_EN & pwrpriv->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V6_WAKEUP_EN & pwrpriv->wowlan_war_offload_ctrl)) { -+ for(i=0; iwowlan_war_offload_mdns_mnane_num; i++) -+ { -+ RTW_PRINT_SEL(m, "[%d]", i); -+ rtw_wow_war_mdns_dump_buf(m, "Machine Name", -+ pwrpriv->wowlan_war_offload_mdns_mnane[i].name, pwrpriv->wowlan_war_offload_mdns_mnane[i].name_len); -+ } -+ RTW_PRINT_SEL(m, "\n"); -+ } else { -+ RTW_PRINT_SEL(m, "\nMSND RSP Not enabled\n\n"); -+ } -+ } else { -+ RTW_PRINT_SEL(m, "\nOffload Not enabled\n\n"); -+ } -+ -+ return 0; -+} -+ -+ -+ssize_t proc_set_war_offload_mdns_machine_name(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ char tmp[MAX_MDNS_MACHINE_NAME_LEN*3-1+1]; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length, %lu, is large than MAX_MDNS_MACHINE_NAME_LEN(%d)\n", FUNC_ADPT_ARG(padapter), (count+1)/3, MAX_MDNS_MACHINE_NAME_LEN); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ if( strncmp(tmp, "clean", 5) == 0 ) -+ { -+ _rtw_memset(pwrpriv->wowlan_war_offload_mdns_mnane, 0, sizeof(pwrpriv->wowlan_war_offload_mdns_mnane)); -+ pwrpriv->wowlan_war_offload_mdns_mnane_num = 0; -+ }else{ -+ int idx = pwrpriv->wowlan_war_offload_mdns_mnane_num; -+ if(idx == MAX_MDNS_MACHINE_NAME_NUM){ -+ RTW_INFO(FUNC_ADPT_FMT ": the num of machine name is already %d(MAX_MDNS_MACHINE_NAME_NUM)!\n", FUNC_ADPT_ARG(padapter), MAX_MDNS_MACHINE_NAME_NUM); -+ return -EFAULT; -+ } -+ if(rtw_wow_war_mdns_parser_pattern(tmp, pwrpriv->wowlan_war_offload_mdns_mnane[idx].name, -+ (u32 *) &pwrpriv->wowlan_war_offload_mdns_mnane[idx].name_len, MAX_MDNS_MACHINE_NAME_LEN)) -+ pwrpriv->wowlan_war_offload_mdns_mnane_num++; -+ } -+ } -+ -+ return count; -+} -+ -+ -+int proc_get_war_offload_mdns_service_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ struct war_mdns_service_info *psinfo = pwrpriv->wowlan_war_offload_mdns_service; -+ int i=0, j=0; -+ -+ if (_TRUE == pwrpriv->wowlan_war_offload_mode) { -+ if ((WAR_MDNS_V4_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V6_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V4_WAKEUP_EN & pwrpriv->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V6_WAKEUP_EN & pwrpriv->wowlan_war_offload_ctrl)) { -+ for(i=0; iwowlan_war_offload_mdns_service_info_num; i++) -+ { -+ RTW_PRINT_SEL(m, "[%d] service info ===> \n", i+1); -+ RTW_PRINT_SEL(m, "\tservice-transport-domain : %s(%d)- %s(%d)- %s(%d)\n", -+ psinfo[i].service, psinfo[i].service_len, -+ psinfo[i].transport, psinfo[i].transport_len, -+ psinfo[i].domain, psinfo[i].domain_len); -+ RTW_PRINT_SEL(m, "\ttarget for srv rsp : %s(%d)\n", psinfo[i].target, psinfo[i].target_len); -+ RTW_PRINT_SEL(m, "\tport : %x-%x, ttl : %d \n", psinfo[i].port[0], psinfo[i].port[1], psinfo[i].ttl); -+ j = psinfo[i].txt_rsp_idx; -+ RTW_PRINT_SEL(m, "\ttype txt rsp. [%d] \n", j); -+ rtw_wow_war_mdns_dump_txt(m, "type txt rsp. (Str)", -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[j].txt, pwrpriv->wowlan_war_offload_mdns_txt_rsp[j].txt_len); -+ -+ } -+ RTW_PRINT_SEL(m, "\n"); -+ } else { -+ RTW_PRINT_SEL(m, "\nMSND RSP Not enabled\n\n"); -+ } -+ } else { -+ RTW_PRINT_SEL(m, "\nOffload Not enabled\n\n"); -+ } -+ -+ return 0; -+} -+ -+ssize_t proc_set_war_offload_mdns_service_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ struct war_mdns_service_info *psinfo = pwrpriv->wowlan_war_offload_mdns_service; -+ u8 idx = 0, port[2], i=0; -+ char *tmp=NULL; -+ char srv[MAX_MDNS_SERVICE_NAME_LEN+1], trans[MAX_MDNS_TRANS_LEN+1], domain[MAX_MDNS_DOMAIN_LEN+1]; -+ char target[MAX_MDNS_TARGET_LEN+1]; -+ u32 ttl, tmp_txt_len=0, port0 =0, port1 =0; -+ u16 max_input_size = (MAX_MDNS_SERVICE_NAME_LEN+MAX_MDNS_TRANS_LEN+MAX_MDNS_DOMAIN_LEN+MAX_MDNS_TARGET_LEN+2); -+ int txt_idx; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > (sizeof(char)*(max_input_size)) ) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ tmp = rtw_zvmalloc(sizeof(char)*(max_input_size)); -+ if (NULL == tmp) { -+ RTW_INFO(FUNC_ADPT_FMT ": tmp buffer allocate fail!!\n", FUNC_ADPT_ARG(padapter)); -+ count = -EFAULT; -+ goto exit; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%15s %4s %5s %63s %x %x %u %d", srv, trans, domain, target, &port0, &port1, &ttl, &txt_idx); -+ /* MAX_MDNS_SERVICE_NAME_LEN(15), MAX_MDNS_TRANS_LEN(4), MAX_MDNS_DOMAIN_LEN(5), MAX_MDNS_TARGET_LEN(63) */ -+ int idx = pwrpriv->wowlan_war_offload_mdns_service_info_num; -+ u16 curent_txt_total_size = 0; -+ //u16 sscanf_parameter_length = strlen(srv)+strlen(trans)+strlen(domain)+strlen(target)+2+2+4+1+num; -+ -+ if( strncmp(srv, "clean", 5) == 0 ) { -+ _rtw_memset(pwrpriv->wowlan_war_offload_mdns_service, 0, sizeof(pwrpriv->wowlan_war_offload_mdns_service)); -+ pwrpriv->wowlan_war_offload_mdns_service_info_num = 0; -+ } -+ /*else if(count != sscanf_parameter_length) -+ { -+ RTW_INFO(FUNC_ADPT_FMT ": Length of total parameters does not match the input buffer. (%d != %lu)\n", -+ FUNC_ADPT_ARG(padapter), sscanf_parameter_length, count); -+ RTW_INFO(FUNC_ADPT_FMT ": Please check the content and length of each parameter.\n", FUNC_ADPT_ARG(padapter)); -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer = (%s)(%lu)!\n\n", FUNC_ADPT_ARG(padapter), tmp, count); -+ RTW_INFO(FUNC_ADPT_FMT ": srv = %s (%lu)!\n", FUNC_ADPT_ARG(padapter), srv, strlen(srv)); -+ RTW_INFO(FUNC_ADPT_FMT ": trans = %s (%lu)!\n", FUNC_ADPT_ARG(padapter), trans, strlen(trans)); -+ RTW_INFO(FUNC_ADPT_FMT ": domain = %s (%lu)!\n", FUNC_ADPT_ARG(padapter), domain, strlen(domain)); -+ RTW_INFO(FUNC_ADPT_FMT ": target = %s (%lu)!\n", FUNC_ADPT_ARG(padapter), target, strlen(target)); -+ RTW_INFO(FUNC_ADPT_FMT ": port = %x-%x, ttl = %d!\n", FUNC_ADPT_ARG(padapter), port0, port1, ttl); -+ RTW_INFO(FUNC_ADPT_FMT ": txt idx = %d!\n", FUNC_ADPT_ARG(padapter), txt_idx); -+ count = -EFAULT; -+ goto exit; -+ }*/else -+ { -+ port[0] = (u8)port0; -+ port[1] = (u8)port1; -+ -+ if(txt_idx >= MAX_MDNS_TXT_NUM) { -+ RTW_INFO(FUNC_ADPT_FMT ": input txt idx, %d, is out of range (0~%d)!\n", FUNC_ADPT_ARG(padapter), txt_idx, MAX_MDNS_TXT_NUM-1); -+ count = -EFAULT; -+ goto exit; -+ } -+ -+ if(pwrpriv->wowlan_war_offload_mdns_txt_rsp[txt_idx].txt_len == 0) { -+ RTW_INFO(FUNC_ADPT_FMT ": wowlan_war_offload_mdns_txt_rsp[%d] is null! Please initiate it first.\n", FUNC_ADPT_ARG(padapter), txt_idx); -+ count = -EFAULT; -+ goto exit; -+ } -+ -+ // 1. set the value of members for this new service -+ psinfo[idx].service_len = strlen(srv); -+ _rtw_memcpy(psinfo[idx].service, srv, psinfo[idx].service_len ); -+ psinfo[idx].transport_len = strlen(trans); -+ _rtw_memcpy(psinfo[idx].transport, trans, psinfo[idx].transport_len ); -+ psinfo[idx].domain_len = strlen(domain); -+ _rtw_memcpy(psinfo[idx].domain, domain, psinfo[idx].domain_len ); -+ psinfo[idx].target_len = strlen(target); -+ _rtw_memcpy(psinfo[idx].target, target, psinfo[idx].target_len ); -+ _rtw_memcpy(psinfo[idx].port, port, 2 ); -+ psinfo[idx].ttl = ttl; -+ psinfo[idx].txt_rsp_idx = txt_idx; -+ pwrpriv->wowlan_war_offload_mdns_service_info_num++; -+ } -+ } -+ -+exit: -+ if(tmp) -+ rtw_vmfree(tmp, sizeof(char)*(max_input_size)); -+ return count; -+ -+} -+ -+int proc_get_war_offload_mdns_txt_rsp(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ int i=0; -+ -+ if (_TRUE == pwrpriv->wowlan_war_offload_mode) { -+ if ((WAR_MDNS_V4_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V6_RSP_EN & pwrpriv->wowlan_war_offload_ctrl) ) { -+ for(i=0; iwowlan_war_offload_mdns_txt_rsp_num; i++) { -+ RTW_PRINT_SEL(m, "[%d]", i); -+ if(pwrpriv->wowlan_war_offload_mdns_txt_rsp[i].txt_len==0){ -+ RTW_PRINT_SEL(m, " (null)\n"); -+ continue; -+ } -+ rtw_wow_war_mdns_dump_txt(m, "type txt rsp. (Str)", -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[i].txt, pwrpriv->wowlan_war_offload_mdns_txt_rsp[i].txt_len); -+ rtw_wow_war_mdns_dump_buf(m, "type txt rsp. (Hex)", -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[i].txt, pwrpriv->wowlan_war_offload_mdns_txt_rsp[i].txt_len); -+ } -+ RTW_PRINT_SEL(m, "\n"); -+ } else { -+ RTW_PRINT_SEL(m, "\nMSND RSP Not enabled\n\n"); -+ } -+ } else { -+ RTW_PRINT_SEL(m, "\nOffload Not enabled\n\n"); -+ } -+ -+ return 0; -+} -+ -+ssize_t proc_set_war_offload_mdns_txt_rsp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ u16 max_input_size = (1+6+MAX_MDNS_TXT_SINGLE_LEN+2); -+ char* tmp=NULL; -+ char op[7]={0}, txt_str[MAX_MDNS_TXT_SINGLE_LEN+1]={0}; -+ int idx; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ tmp = rtw_zvmalloc(sizeof(char)*(max_input_size)); -+ if (NULL == tmp) { -+ RTW_INFO(FUNC_ADPT_FMT ": tmp buffer allocate fail!!\n", FUNC_ADPT_ARG(padapter)); -+ count = -EFAULT; -+ goto exit; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ if( strncmp(tmp, "clean", 5) == 0 ) -+ { -+ /* clean ==> */ -+ if(pwrpriv->wowlan_war_offload_mdns_service_info_num==0){ -+ _rtw_memset(pwrpriv->wowlan_war_offload_mdns_txt_rsp, 0, sizeof(pwrpriv->wowlan_war_offload_mdns_txt_rsp)); -+ }else{ -+ RTW_INFO(FUNC_ADPT_FMT ": Txt rsp are refered! (Current service_info_num = %d)\n", FUNC_ADPT_ARG(padapter), pwrpriv->wowlan_war_offload_mdns_service_info_num); -+ count = -EFAULT; -+ goto exit; -+ } -+ -+ }else{ -+ /* set ==> */ -+ int num = sscanf(tmp, "%d %6s %256c", &idx, op, txt_str); -+ u16 sscanf_parameter_length = 0, txt_len = 0; -+ -+ txt_len = (strlen(txt_str)>MAX_MDNS_TXT_SINGLE_LEN)?MAX_MDNS_TXT_SINGLE_LEN:(strlen(txt_str)-1); -+ txt_str[txt_len]='\0'; -+ sscanf_parameter_length = 1 + strlen(op) + txt_len + num; -+ -+ if(count != sscanf_parameter_length) { -+ RTW_INFO(FUNC_ADPT_FMT ": Length of total parameters does not match the input buffer. (%d != %lu)(num=%d)\n", -+ FUNC_ADPT_ARG(padapter), sscanf_parameter_length, count, num); -+ RTW_INFO(FUNC_ADPT_FMT ": Please check the content and length of each parameter.\n", FUNC_ADPT_ARG(padapter)); -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer = (%s)(%lu)!\n\n", FUNC_ADPT_ARG(padapter), tmp, count); -+ RTW_INFO(FUNC_ADPT_FMT ": op. = %s (%lu)!\n", FUNC_ADPT_ARG(padapter), op, strlen(op)); -+ RTW_INFO(FUNC_ADPT_FMT ": txt = %s (%lu)!\n", FUNC_ADPT_ARG(padapter), txt_str, strlen(txt_str)); -+ count = -EFAULT; -+ goto exit; -+ } else { -+ -+ u16 offset; -+ -+ if(idx >= MAX_MDNS_TXT_NUM) { -+ RTW_INFO(FUNC_ADPT_FMT ": the index, %d, is over the range of txt rsp(0~%d)!\n", FUNC_ADPT_ARG(padapter), idx, MAX_MDNS_TXT_NUM-1); -+ count = -EFAULT; -+ goto exit; -+ } -+ -+ if( strncmp(op, "new", 3) == 0 ) { -+ _rtw_memset(pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt, 0, pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt_len); -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt_len = 0; -+ }else if(strncmp(op, "append", 6) == 0 ){ -+ if((pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt_len+strlen(txt_str)+1) > MAX_MDNS_TXT_LEN) { -+ RTW_INFO(FUNC_ADPT_FMT ": the txt rsp(%d) will be over the limitation(%d) if append input string(%lu)!\n", FUNC_ADPT_ARG(padapter), -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt_len, -+ MAX_MDNS_TXT_LEN, strlen(txt_str)+1); -+ count = -EFAULT; -+ goto exit; -+ } -+ }else{ -+ RTW_INFO(FUNC_ADPT_FMT ": Invaild op str %s (new/append only)!\n", FUNC_ADPT_ARG(padapter), op); -+ count = -EFAULT; -+ goto exit; -+ } -+ -+ offset = pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt_len; -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt[offset++] = strlen(txt_str); -+ _rtw_memcpy(pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt + offset, txt_str, strlen(txt_str)); -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt_len += (strlen(txt_str) + 1); /* actul len with length field */ -+ -+ /* Dump ==> */ -+ //RTW_PRINT_SEL(RTW_DBGDUMP, "[%d]", idx); -+ //rtw_wow_war_mdns_dump_txt(RTW_DBGDUMP, "type txt rsp. (Str)", -+ // pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt, pwrpriv->wowlan_war_offload_mdns_txt_rsp[idx].txt_len); -+ } -+ } -+ } -+ -+exit: -+ if(tmp) -+ rtw_vmfree(tmp, sizeof(char)*(max_input_size)); -+ return count; -+ -+} -+ -+#endif /* CONFIG_OFFLOAD_MDNS_V4 || CONFIG_OFFLOAD_MDNS_V6 */ -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+ -+ -+int proc_get_qos_option(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ RTW_PRINT_SEL(m, "qos_option=%d\n", pmlmepriv->qospriv.qos_option); -+ -+ return 0; -+} -+ -+int proc_get_ht_option(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+#ifdef CONFIG_80211N_HT -+ RTW_PRINT_SEL(m, "ht_option=%d\n", pmlmepriv->htpriv.ht_option); -+#endif /* CONFIG_80211N_HT */ -+ -+ return 0; -+} -+ -+int proc_get_rf_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ RTW_PRINT_SEL(m, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n", -+ pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); -+ -+ RTW_PRINT_SEL(m, "oper_ch=%d, oper_bw=%d, oper_ch_offet=%d\n", -+ rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter)); -+ -+ return 0; -+} -+ -+int proc_get_scan_param(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ struct ss_res *ss = &mlmeext->sitesurvey_res; -+ -+#define SCAN_PARAM_TITLE_FMT "%10s" -+#define SCAN_PARAM_VALUE_FMT "%-10u" -+#define SCAN_PARAM_TITLE_ARG , "scan_ch_ms" -+#define SCAN_PARAM_VALUE_ARG , ss->scan_ch_ms -+#ifdef CONFIG_80211N_HT -+#define SCAN_PARAM_TITLE_FMT_HT " %15s %13s" -+#define SCAN_PARAM_VALUE_FMT_HT " %-15u %-13u" -+#define SCAN_PARAM_TITLE_ARG_HT , "rx_ampdu_accept", "rx_ampdu_size" -+#define SCAN_PARAM_VALUE_ARG_HT , ss->rx_ampdu_accept, ss->rx_ampdu_size -+#else -+#define SCAN_PARAM_TITLE_FMT_HT "" -+#define SCAN_PARAM_VALUE_FMT_HT "" -+#define SCAN_PARAM_TITLE_ARG_HT -+#define SCAN_PARAM_VALUE_ARG_HT -+#endif -+#ifdef CONFIG_SCAN_BACKOP -+#define SCAN_PARAM_TITLE_FMT_BACKOP " %9s %12s" -+#define SCAN_PARAM_VALUE_FMT_BACKOP " %-9u %-12u" -+#define SCAN_PARAM_TITLE_ARG_BACKOP , "backop_ms", "scan_cnt_max" -+#define SCAN_PARAM_VALUE_ARG_BACKOP , ss->backop_ms, ss->scan_cnt_max -+#else -+#define SCAN_PARAM_TITLE_FMT_BACKOP "" -+#define SCAN_PARAM_VALUE_FMT_BACKOP "" -+#define SCAN_PARAM_TITLE_ARG_BACKOP -+#define SCAN_PARAM_VALUE_ARG_BACKOP -+#endif -+ -+ RTW_PRINT_SEL(m, -+ SCAN_PARAM_TITLE_FMT -+ SCAN_PARAM_TITLE_FMT_HT -+ SCAN_PARAM_TITLE_FMT_BACKOP -+ "\n" -+ SCAN_PARAM_TITLE_ARG -+ SCAN_PARAM_TITLE_ARG_HT -+ SCAN_PARAM_TITLE_ARG_BACKOP -+ ); -+ -+ RTW_PRINT_SEL(m, -+ SCAN_PARAM_VALUE_FMT -+ SCAN_PARAM_VALUE_FMT_HT -+ SCAN_PARAM_VALUE_FMT_BACKOP -+ "\n" -+ SCAN_PARAM_VALUE_ARG -+ SCAN_PARAM_VALUE_ARG_HT -+ SCAN_PARAM_VALUE_ARG_BACKOP -+ ); -+ -+ return 0; -+} -+ -+ssize_t proc_set_scan_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ struct ss_res *ss = &mlmeext->sitesurvey_res; -+ -+ char tmp[32] = {0}; -+ -+ u16 scan_ch_ms; -+#define SCAN_PARAM_INPUT_FMT "%hu" -+#define SCAN_PARAM_INPUT_ARG , &scan_ch_ms -+#ifdef CONFIG_80211N_HT -+ u8 rx_ampdu_accept; -+ u8 rx_ampdu_size; -+#define SCAN_PARAM_INPUT_FMT_HT " %hhu %hhu" -+#define SCAN_PARAM_INPUT_ARG_HT , &rx_ampdu_accept, &rx_ampdu_size -+#else -+#define SCAN_PARAM_INPUT_FMT_HT "" -+#define SCAN_PARAM_INPUT_ARG_HT -+#endif -+#ifdef CONFIG_SCAN_BACKOP -+ u16 backop_ms; -+ u8 scan_cnt_max; -+#define SCAN_PARAM_INPUT_FMT_BACKOP " %hu %hhu" -+#define SCAN_PARAM_INPUT_ARG_BACKOP , &backop_ms, &scan_cnt_max -+#else -+#define SCAN_PARAM_INPUT_FMT_BACKOP "" -+#define SCAN_PARAM_INPUT_ARG_BACKOP -+#endif -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, -+ SCAN_PARAM_INPUT_FMT -+ SCAN_PARAM_INPUT_FMT_HT -+ SCAN_PARAM_INPUT_FMT_BACKOP -+ SCAN_PARAM_INPUT_ARG -+ SCAN_PARAM_INPUT_ARG_HT -+ SCAN_PARAM_INPUT_ARG_BACKOP -+ ); -+ -+ if (num-- > 0) -+ ss->scan_ch_ms = scan_ch_ms; -+#ifdef CONFIG_80211N_HT -+ if (num-- > 0) -+ ss->rx_ampdu_accept = rx_ampdu_accept; -+ if (num-- > 0) -+ ss->rx_ampdu_size = rx_ampdu_size; -+#endif -+#ifdef CONFIG_SCAN_BACKOP -+ if (num-- > 0) -+ ss->backop_ms = backop_ms; -+ if (num-- > 0) -+ ss->scan_cnt_max = scan_cnt_max; -+#endif -+ } -+ -+ return count; -+} -+ -+int proc_get_scan_abort(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ u32 pass_ms; -+ -+ pass_ms = rtw_scan_abort_timeout(adapter, 10000); -+ -+ RTW_PRINT_SEL(m, "%u\n", pass_ms); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+int proc_get_rson_data(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char rson_data_str[256]; -+ -+ rtw_rson_get_property_str(padapter, rson_data_str); -+ RTW_PRINT_SEL(m, "%s\n", rson_data_str); -+ return 0; -+} -+ -+ssize_t proc_set_rson_data(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); -+ char tmp[64] = {0}; -+ int num; -+ u8 field[10], value[64]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ num = sscanf(tmp, "%s %s", field, value); -+ if (num != 2) { -+ RTW_INFO("Invalid format : echo > son_data\n"); -+ return count; -+ } -+ RTW_INFO("field=%s value=%s\n", field, value); -+ num = rtw_rson_set_property(padapter, field, value); -+ if (num != 1) { -+ RTW_INFO("Invalid field(%s) or value(%s)\n", field, value); -+ return count; -+ } -+ } -+ return count; -+} -+#endif /*CONFIG_RTW_REPEATER_SON*/ -+ -+int proc_get_survey_info(struct seq_file *m, void *v) -+{ -+ _irqL irqL; -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ _list *plist, *phead; -+ s32 notify_signal; -+ s16 notify_noise = 0; -+ u16 index = 0, ie_cap = 0; -+ unsigned char *ie_wpa = NULL, *ie_wpa2 = NULL, *ie_wps = NULL; -+ unsigned char *ie_p2p = NULL, *ssid = NULL; -+ char flag_str[64]; -+ int ielen = 0; -+ u32 wpsielen = 0; -+#ifdef CONFIG_RTW_MESH -+ const char *ssid_title_str = "ssid/mesh_id"; -+#else -+ const char *ssid_title_str = "ssid"; -+#endif -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ phead = get_list_head(queue); -+ if (!phead) -+ goto _exit; -+ plist = get_next(phead); -+ if (!plist) -+ goto _exit; -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ rtw_rson_show_survey_info(m, plist, phead); -+#else -+ -+ RTW_PRINT_SEL(m, "%5s %-17s %3s %-3s %-4s %-4s %5s %32s %32s\n", "index", "bssid", "ch", "RSSI", "SdBm", "Noise", "age", "flag", ssid_title_str); -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ if (!pnetwork) -+ break; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE && -+ is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { -+ notify_signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength);/* dbm */ -+ } else { -+ notify_signal = translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);/* dbm */ -+ } -+ -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ if (IS_NM_ENABLE(padapter)) -+ notify_noise = rtw_noise_query_by_chan_num(padapter, pnetwork->network.Configuration.DSConfig); -+#endif -+ -+ ie_wpa = rtw_get_wpa_ie(&pnetwork->network.IEs[12], &ielen, pnetwork->network.IELength - 12); -+ ie_wpa2 = rtw_get_wpa2_ie(&pnetwork->network.IEs[12], &ielen, pnetwork->network.IELength - 12); -+ ie_cap = rtw_get_capability(&pnetwork->network); -+ ie_wps = rtw_get_wps_ie(&pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &wpsielen); -+#ifdef CONFIG_P2P -+ ie_p2p = rtw_get_p2p_ie(&pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &ielen); -+#endif -+ ssid = pnetwork->network.Ssid.Ssid; -+ sprintf(flag_str, "%s%s%s%s%s%s%s", -+ (ie_wpa) ? "[WPA]" : "", -+ (ie_wpa2) ? "[WPA2]" : "", -+ (!ie_wpa && !ie_wpa && ie_cap & BIT(4)) ? "[WEP]" : "", -+ (ie_wps) ? "[WPS]" : "", -+ (pnetwork->network.InfrastructureMode == Ndis802_11IBSS) ? "[IBSS]" : -+ (pnetwork->network.InfrastructureMode == Ndis802_11_mesh) ? "[MESH]" : "", -+ (ie_cap & BIT(0)) ? "[ESS]" : "", -+ (ie_p2p) ? "[P2P]" : ""); -+ RTW_PRINT_SEL(m, "%5d "MAC_FMT" %3d %3d %4d %4d %5d %32s %32s\n", -+ ++index, -+ MAC_ARG(pnetwork->network.MacAddress), -+ pnetwork->network.Configuration.DSConfig, -+ (int)pnetwork->network.Rssi, -+ notify_signal, -+ notify_noise, -+ rtw_get_passing_time_ms(pnetwork->last_scanned), -+ flag_str, -+ pnetwork->network.InfrastructureMode == Ndis802_11_mesh ? pnetwork->network.mesh_id.Ssid : pnetwork->network.Ssid.Ssid -+ ); -+ plist = get_next(plist); -+ } -+#endif -+_exit: -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ return 0; -+} -+ -+ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 _status = _FALSE; -+ u8 ssc_chk; -+ char tmp[32] = {0}; -+ char cmd[8] = {0}; -+ bool acs = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%s", cmd); -+ -+ if (num < 1) -+ return count; -+ -+ if (strcmp("acs", cmd) == 0) -+ acs = 1; -+ } -+ -+#if 1 -+ ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); -+ if (ssc_chk != SS_ALLOW) -+ goto exit; -+ -+ rtw_ps_deny(padapter, PS_DENY_SCAN); -+ if (_FAIL == rtw_pwr_wakeup(padapter)) -+ goto cancel_ps_deny; -+ if (!rtw_is_adapter_up(padapter)) { -+ RTW_INFO("scan abort!! adapter cannot use\n"); -+ goto cancel_ps_deny; -+ } -+#else -+#ifdef CONFIG_MP_INCLUDED -+ if (rtw_mp_mode_check(padapter)) { -+ RTW_INFO("MP mode block Scan request\n"); -+ goto exit; -+ } -+#endif -+ if (rtw_is_scan_deny(padapter)) { -+ RTW_INFO(FUNC_ADPT_FMT ": scan deny\n", FUNC_ADPT_ARG(padapter)); -+ goto exit; -+ } -+ -+ rtw_ps_deny(padapter, PS_DENY_SCAN); -+ if (_FAIL == rtw_pwr_wakeup(padapter)) -+ goto cancel_ps_deny; -+ -+ if (!rtw_is_adapter_up(padapter)) { -+ RTW_INFO("scan abort!! adapter cannot use\n"); -+ goto cancel_ps_deny; -+ } -+ -+ if (rtw_mi_busy_traffic_check(padapter)) { -+ RTW_INFO("scan abort!! BusyTraffic == _TRUE\n"); -+ goto cancel_ps_deny; -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) && check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { -+ RTW_INFO("scan abort!! AP mode process WPS\n"); -+ goto cancel_ps_deny; -+ } -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING) == _TRUE) { -+ RTW_INFO("scan abort!! fwstate=0x%x\n", pmlmepriv->fw_state); -+ goto cancel_ps_deny; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, -+ WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING | WIFI_UNDER_WPS)) { -+ RTW_INFO("scan abort!! buddy_fwstate check failed\n"); -+ goto cancel_ps_deny; -+ } -+#endif -+#endif -+ -+ if (acs) { -+ #ifdef CONFIG_RTW_ACS -+ _status = rtw_set_acs_sitesurvey(padapter); -+ #endif -+ } else -+ _status = rtw_set_802_11_bssid_list_scan(padapter, NULL); -+ -+cancel_ps_deny: -+ rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); -+exit: -+ return count; -+} -+#ifdef ROKU_PRIVATE -+int proc_get_infra_ap(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ struct sta_info *psta; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct ht_priv_infra_ap *phtpriv = &pmlmepriv->htpriv_infra_ap; -+#ifdef CONFIG_80211AC_VHT -+ struct vht_priv_infra_ap *pvhtpriv = &pmlmepriv->vhtpriv_infra_ap; -+#endif -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { -+ psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); -+ if (psta) { -+ unsigned int i, j; -+ unsigned int Rx_ss = 0, Tx_ss = 0; -+ struct recv_reorder_ctrl *preorder_ctrl; -+ -+ RTW_PRINT_SEL(m, "SSID=%s\n", pmlmeinfo->network.Ssid.Ssid); -+ RTW_PRINT_SEL(m, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); -+ RTW_PRINT_SEL(m, "Supported rate="); -+ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { -+ if (pmlmeinfo->SupportedRates_infra_ap[i] == 0) -+ break; -+ RTW_PRINT_SEL(m, " 0x%x", pmlmeinfo->SupportedRates_infra_ap[i]); -+ } -+ RTW_PRINT_SEL(m, "\n"); -+#ifdef CONFIG_80211N_HT -+ if (pmlmeinfo->ht_vht_received & BIT(0)) { -+ RTW_PRINT_SEL(m, "Supported MCS set="); -+ for (i = 0; i < 16 ; i++) -+ RTW_PRINT_SEL(m, " 0x%02x", phtpriv->MCS_set_infra_ap[i]); -+ RTW_PRINT_SEL(m, "\n"); -+ RTW_PRINT_SEL(m, "highest supported data rate=0x%x\n", phtpriv->rx_highest_data_rate_infra_ap); -+ RTW_PRINT_SEL(m, "HT_supported_channel_width_set=0x%x\n", phtpriv->channel_width_infra_ap); -+ RTW_PRINT_SEL(m, "sgi_20m=%d, sgi_40m=%d\n", phtpriv->sgi_20m_infra_ap, phtpriv->sgi_40m_infra_ap); -+ RTW_PRINT_SEL(m, "ldpc_cap=0x%x, stbc_cap=0x%x\n", phtpriv->ldpc_cap_infra_ap, phtpriv->stbc_cap_infra_ap); -+ RTW_PRINT_SEL(m, "HT_number_of_stream=%d\n", phtpriv->Rx_ss_infra_ap); -+ } -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ if (pmlmeinfo->ht_vht_received & BIT(1)) { -+ RTW_PRINT_SEL(m, "VHT_supported_channel_width_set=0x%x\n", pvhtpriv->channel_width_infra_ap); -+ RTW_PRINT_SEL(m, "vht_ldpc_cap=0x%x, vht_stbc_cap=0x%x, vht_beamform_cap=0x%x\n", pvhtpriv->ldpc_cap_infra_ap, pvhtpriv->stbc_cap_infra_ap, pvhtpriv->beamform_cap_infra_ap); -+ RTW_PRINT_SEL(m, "Rx_vht_mcs_map=0x%x, Tx_vht_mcs_map=0x%x\n", *(u16 *)pvhtpriv->vht_mcs_map_infra_ap, *(u16 *)pvhtpriv->vht_mcs_map_tx_infra_ap); -+ RTW_PRINT_SEL(m, "VHT_number_of_stream=%d\n", pvhtpriv->number_of_streams_infra_ap); -+ } -+#endif -+ } else -+ RTW_PRINT_SEL(m, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); -+ } else -+ RTW_PRINT_SEL(m, "this only applies to STA mode\n"); -+ return 0; -+} -+ -+#endif /* ROKU_PRIVATE */ -+ -+static int wireless_mode_to_str(u32 mode, char *str) -+{ -+ str[0]='\0'; -+ if (mode&WIRELESS_11A) -+ sprintf(str+strlen(str),"%s","A/"); -+ if (mode&WIRELESS_11B) -+ sprintf(str+strlen(str),"%s","B/"); -+ if (mode&WIRELESS_11G) -+ sprintf(str+strlen(str),"%s","G/"); -+ if (mode&(WIRELESS_11_24N|WIRELESS_11_5N)) -+ sprintf(str+strlen(str),"%s","N/"); -+ if (mode&WIRELESS_11AC) -+ sprintf(str+strlen(str),"%s","AC/"); -+ -+ if (strlen(str)>1) -+ str[strlen(str)-1]='\0'; -+ -+ return strlen(str); -+} -+ -+int proc_get_ap_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ struct sta_info *psta; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ char wl_mode[16]; -+ -+ /* ap vendor */ -+ char vendor[VENDOR_NAME_LEN] = {0}; -+ get_assoc_AP_Vendor(vendor,pmlmeinfo->assoc_AP_vendor); -+ RTW_PRINT_SEL(m,"AP Vendor %s\n", vendor); -+ -+ psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); -+ if (psta) { -+ wireless_mode_to_str(psta->wireless_mode, wl_mode); -+ RTW_PRINT_SEL(m, "SSID=%s\n", cur_network->network.Ssid.Ssid); -+ RTW_PRINT_SEL(m, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); -+ RTW_PRINT_SEL(m, "cur_channel=%d, cur_bwmode=%d(%s), cur_ch_offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, ch_width_str(pmlmeext->cur_bwmode), pmlmeext->cur_ch_offset); -+ RTW_PRINT_SEL(m, "wireless_mode=0x%x(%s), rtsen=%d, cts2slef=%d\n", psta->wireless_mode, wl_mode, psta->rtsen, psta->cts2self); -+ RTW_PRINT_SEL(m, "state=0x%x, aid=%d, macid=%d, raid=%d\n", -+ psta->state, psta->cmn.aid, psta->cmn.mac_id, psta->cmn.ra_info.rate_id); -+#ifdef CONFIG_80211N_HT -+ RTW_PRINT_SEL(m, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); -+ RTW_PRINT_SEL(m, "bwmode=%d, ch_offset=%d, sgi_20m=%d,sgi_40m=%d\n" -+ , psta->cmn.bw_mode, psta->htpriv.ch_offset, psta->htpriv.sgi_20m, psta->htpriv.sgi_40m); -+ RTW_PRINT_SEL(m, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable); -+ RTW_PRINT_SEL(m, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); -+ RTW_PRINT_SEL(m, "ldpc_cap=0x%x, stbc_cap=0x%x, beamform_cap=0x%x\n", psta->htpriv.ldpc_cap, psta->htpriv.stbc_cap, psta->htpriv.beamform_cap); -+#endif /* CONFIG_80211N_HT */ -+#ifdef CONFIG_80211AC_VHT -+ RTW_PRINT_SEL(m, "vht_en=%d, vht_sgi_80m=%d\n", psta->vhtpriv.vht_option, psta->vhtpriv.sgi_80m); -+ RTW_PRINT_SEL(m, "vht_ldpc_cap=0x%x, vht_stbc_cap=0x%x, vht_beamform_cap=0x%x\n", psta->vhtpriv.ldpc_cap, psta->vhtpriv.stbc_cap, psta->vhtpriv.beamform_cap); -+ RTW_PRINT_SEL(m, "vht_mcs_map=0x%x, vht_highest_rate=0x%x, vht_ampdu_len=%d\n", *(u16 *)psta->vhtpriv.vht_mcs_map, psta->vhtpriv.vht_highest_rate, psta->vhtpriv.ampdu_len); -+#endif -+ sta_rx_reorder_ctl_dump(m, psta); -+ } else -+ RTW_PRINT_SEL(m, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); -+ -+ return 0; -+} -+ -+ssize_t proc_reset_trx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ char cmd[32] = {0}; -+ u8 cnt = 0; -+ -+ if (count > sizeof(cmd)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(cmd, buffer, count)) { -+ int num = sscanf(cmd, "%hhx", &cnt); -+ -+ if (num == 1 && cnt == 0) { -+ precvpriv->dbg_rx_ampdu_drop_count = 0; -+ precvpriv->dbg_rx_ampdu_forced_indicate_count = 0; -+ precvpriv->dbg_rx_ampdu_loss_count = 0; -+ precvpriv->dbg_rx_dup_mgt_frame_drop_count = 0; -+ precvpriv->dbg_rx_ampdu_window_shift_cnt = 0; -+ precvpriv->dbg_rx_conflic_mac_addr_cnt = 0; -+ precvpriv->dbg_rx_drop_count = 0; -+ } -+ } -+ -+ return count; -+} -+ -+int proc_get_trx_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ int i; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ struct hw_xmit *phwxmit; -+ u16 vo_params[4], vi_params[4], be_params[4], bk_params[4]; -+ -+ padapter->hal_func.read_wmmedca_reg(padapter, vo_params, vi_params, be_params, bk_params); -+ -+ RTW_PRINT_SEL(m, "wmm_edca_vo, aifs = %u us, cw_min = %u, cw_max = %u, txop_limit = %u us\n", vo_params[0], vo_params[1], vo_params[2], vo_params[3]); -+ RTW_PRINT_SEL(m, "wmm_edca_vi, aifs = %u us, cw_min = %u, cw_max = %u, txop_limit = %u us\n", vi_params[0], vi_params[1], vi_params[2], vi_params[3]); -+ RTW_PRINT_SEL(m, "wmm_edca_be, aifs = %u us, cw_min = %u, cw_max = %u, txop_limit = %u us\n", be_params[0], be_params[1], be_params[2], be_params[3]); -+ RTW_PRINT_SEL(m, "wmm_edca_bk, aifs = %u us, cw_min = %u, cw_max = %u, txop_limit = %u us\n", bk_params[0], bk_params[1], bk_params[2], bk_params[3]); -+ -+ dump_os_queue(m, padapter); -+ -+ RTW_PRINT_SEL(m, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d\n" -+ , pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt); -+ RTW_PRINT_SEL(m, "free_ext_xmitbuf_cnt=%d, free_xframe_ext_cnt=%d\n" -+ , pxmitpriv->free_xmit_extbuf_cnt, pxmitpriv->free_xframe_ext_cnt); -+ RTW_PRINT_SEL(m, "free_recvframe_cnt=%d\n" -+ , precvpriv->free_recvframe_cnt); -+ -+ for (i = 0; i < pxmitpriv->hwxmit_entry; i++) { -+ phwxmit = pxmitpriv->hwxmits + i; -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ if (i == pxmitpriv->hwxmit_entry - 1) -+ RTW_PRINT_SEL(m, "%d, hw_mgmt_q.accnt=%d\n", i, phwxmit->accnt); -+ else -+#endif -+ RTW_PRINT_SEL(m, "%d, hwq.accnt=%d\n", i, phwxmit->accnt); -+ } -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_DUMP_MAC_TXFIFO, (u8 *)m); -+ -+#ifdef CONFIG_USB_HCI -+ RTW_PRINT_SEL(m, "rx_urb_pending_cn=%d\n", ATOMIC_READ(&(precvpriv->rx_pending_cnt))); -+#endif -+ -+ dump_rx_bh_tk(m, &GET_PRIMARY_ADAPTER(padapter)->recvpriv); -+ -+ /* Folowing are RX info */ -+ RTW_PRINT_SEL(m, "RX: Count of Packets dropped by Driver: %llu\n", (unsigned long long)precvpriv->dbg_rx_drop_count); -+ /* Counts of packets whose seq_num is less than preorder_ctrl->indicate_seq, Ex delay, retransmission, redundant packets and so on */ -+ RTW_PRINT_SEL(m, "Rx: Counts of Packets Whose Seq_Num Less Than Reorder Control Seq_Num: %llu\n", (unsigned long long)precvpriv->dbg_rx_ampdu_drop_count); -+ /* How many times the Rx Reorder Timer is triggered. */ -+ RTW_PRINT_SEL(m, "Rx: Reorder Time-out Trigger Counts: %llu\n", (unsigned long long)precvpriv->dbg_rx_ampdu_forced_indicate_count); -+ /* Total counts of packets loss */ -+ RTW_PRINT_SEL(m, "Rx: Packet Loss Counts: %llu\n", (unsigned long long)precvpriv->dbg_rx_ampdu_loss_count); -+ RTW_PRINT_SEL(m, "Rx: Duplicate Management Frame Drop Count: %llu\n", (unsigned long long)precvpriv->dbg_rx_dup_mgt_frame_drop_count); -+ RTW_PRINT_SEL(m, "Rx: AMPDU BA window shift Count: %llu\n", (unsigned long long)precvpriv->dbg_rx_ampdu_window_shift_cnt); -+ /*The same mac addr counts*/ -+ RTW_PRINT_SEL(m, "Rx: Conflict MAC Address Frames Count: %llu\n", (unsigned long long)precvpriv->dbg_rx_conflic_mac_addr_cnt); -+ return 0; -+} -+ -+int proc_get_rate_ctl(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 data_rate = 0, sgi = 0, data_fb = 0; -+ -+ if (adapter->fix_rate != 0xff) { -+ data_rate = adapter->fix_rate & 0x7F; -+ sgi = adapter->fix_rate >> 7; -+ data_fb = adapter->data_fb ? 1 : 0; -+ RTW_PRINT_SEL(m, "FIXED %s%s%s\n" -+ , HDATA_RATE(data_rate) -+ , data_rate > DESC_RATE54M ? (sgi ? " SGI" : " LGI") : "" -+ , data_fb ? " FB" : "" -+ ); -+ RTW_PRINT_SEL(m, "0x%02x %u\n", adapter->fix_rate, adapter->data_fb); -+ } else -+ RTW_PRINT_SEL(m, "RA\n"); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PHDYM_FW_FIXRATE -+void phydm_fw_fix_rate(void *dm_void, u8 en, u8 macid, u8 bw, u8 rate); -+#endif -+ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ char tmp[32]; -+ u8 fix_rate = 0xFF; -+#ifdef CONFIG_PHDYM_FW_FIXRATE -+ u8 bw = 0; -+#else -+ u8 data_fb = 0; -+#endif -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+#ifdef CONFIG_PHDYM_FW_FIXRATE -+ struct dm_struct *dm = adapter_to_phydm(adapter); -+ u8 en = 1, macid = 255; -+ _irqL irqL; -+ _list *plist, *phead; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &(adapter->stapriv); -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; -+ uint mac_id[NUM_STA]; -+ int i, macid_rec_idx = 0; -+ int num = sscanf(tmp, "%hhx %hhu %hhu", &fix_rate, &bw, &macid); -+ -+ if (num < 1) { -+ RTW_INFO("Invalid input!! \"ex: echo > /proc/.../rate_ctl\"\n"); -+ return count; -+ } -+ -+ if ((fix_rate == 0) || (fix_rate == 0xFF)) -+ en = 0; -+ -+ if (macid != 255) { -+ RTW_INFO("Call phydm_fw_fix_rate()--en[%d] mac_id[%d] bw[%d] fix_rate[%d]\n", en, macid, bw, fix_rate); -+ phydm_fw_fix_rate(dm, en, macid, bw, fix_rate); -+ return count; -+ } -+ -+ /* no specific macid, apply to all macids except bc/mc macid */ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) -+ && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE) -+ && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(adapter), ETH_ALEN) != _TRUE)) { -+ mac_id[macid_rec_idx] = psta->cmn.mac_id; -+ macid_rec_idx++; -+ } -+ } -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (i = 0; i < macid_rec_idx; i++) { -+ RTW_INFO("Call phydm_fw_fix_rate()--en[%d] mac_id[%d] bw[%d] fix_rate[%d]\n", en, mac_id[i], bw, fix_rate); -+ phydm_fw_fix_rate(dm, en, mac_id[i], bw, fix_rate); -+ } -+#else -+ int num = sscanf(tmp, "%hhx %hhu", &fix_rate, &data_fb); -+ -+ if (num >= 1) { -+ u8 fix_rate_ori = adapter->fix_rate; -+ -+ adapter->fix_rate = fix_rate; -+ if (fix_rate == 0xFF) -+ hal_data->ForcedDataRate = 0; -+ else -+ hal_data->ForcedDataRate = hw_rate_to_m_rate(fix_rate & 0x7F); -+ -+ if (adapter->fix_bw != 0xFF && fix_rate_ori != fix_rate) -+ rtw_run_in_thread_cmd(adapter, ((void *)(rtw_update_tx_rate_bmp)), adapter_to_dvobj(adapter)); -+ } -+ if (num >= 2) -+ adapter->data_fb = data_fb ? 1 : 0; -+#endif -+ } -+ -+ return count; -+} -+ -+#ifdef CONFIG_AP_MODE -+int proc_get_bmc_tx_rate(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (!MLME_IS_AP(adapter) && !MLME_IS_MESH(adapter)) { -+ RTW_PRINT_SEL(m, "[ERROR] Not in SoftAP/Mesh mode !!\n"); -+ return 0; -+ } -+ -+ RTW_PRINT_SEL(m, " BMC Tx rate - %s\n", MGN_RATE_STR(adapter->bmc_tx_rate)); -+ return 0; -+} -+ -+ssize_t proc_set_bmc_tx_rate(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 bmc_tx_rate; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx", &bmc_tx_rate); -+ -+ if (num >= 1) -+ /*adapter->bmc_tx_rate = hw_rate_to_m_rate(bmc_tx_rate);*/ -+ adapter->bmc_tx_rate = bmc_tx_rate; -+ } -+ -+ return count; -+} -+#endif /*CONFIG_AP_MODE*/ -+ -+ -+int proc_get_tx_power_offset(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "Tx power offset - %u\n", adapter->power_offset); -+ return 0; -+} -+ -+ssize_t proc_set_tx_power_offset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 power_offset = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu", &power_offset); -+ -+ if (num >= 1) { -+ if (power_offset > 5) -+ power_offset = 0; -+ -+ adapter->power_offset = power_offset; -+ } -+ } -+ -+ return count; -+} -+ -+int proc_get_bw_ctl(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 data_bw = 0; -+ -+ if (adapter->fix_bw != 0xff) { -+ data_bw = adapter->fix_bw; -+ RTW_PRINT_SEL(m, "FIXED %s\n", ch_width_str(data_bw)); -+ } else -+ RTW_PRINT_SEL(m, "Auto\n"); -+ -+ return 0; -+} -+ -+ssize_t proc_set_bw_ctl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 fix_bw; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%hhu", &fix_bw); -+ -+ if (num >= 1) { -+ u8 fix_bw_ori = adapter->fix_bw; -+ -+ adapter->fix_bw = fix_bw; -+ -+ if (adapter->fix_rate != 0xFF && fix_bw_ori != fix_bw) -+ rtw_run_in_thread_cmd(adapter, ((void *)(rtw_update_tx_rate_bmp)), adapter_to_dvobj(adapter)); -+ } -+ } -+ -+ return count; -+} -+ -+#ifdef DBG_RX_COUNTER_DUMP -+int proc_get_rx_cnt_dump(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ int i; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "BIT0- Dump RX counters of DRV\n"); -+ RTW_PRINT_SEL(m, "BIT1- Dump RX counters of MAC\n"); -+ RTW_PRINT_SEL(m, "BIT2- Dump RX counters of PHY\n"); -+ RTW_PRINT_SEL(m, "BIT3- Dump TRX data frame of DRV\n"); -+ RTW_PRINT_SEL(m, "dump_rx_cnt_mode = 0x%02x\n", adapter->dump_rx_cnt_mode); -+ -+ return 0; -+} -+ssize_t proc_set_rx_cnt_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 dump_rx_cnt_mode; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx", &dump_rx_cnt_mode); -+ -+ if (num == 1) { -+ rtw_dump_phy_rxcnts_preprocess(adapter, dump_rx_cnt_mode); -+ adapter->dump_rx_cnt_mode = dump_rx_cnt_mode; -+ } -+ } -+ -+ return count; -+} -+#endif -+ -+ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) -+ sscanf(tmp, "%hhu %hhu", &fwdl_test_chksum_fail, &fwdl_test_wintint_rdy_fail); -+ -+ return count; -+} -+ -+ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) -+ sscanf(tmp, "%hhu", &del_rx_ampdu_test_no_tx_fail); -+ -+ return count; -+} -+ -+ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) -+ sscanf(tmp, "%u", &g_wait_hiq_empty_ms); -+ -+ return count; -+} -+ -+ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ u32 wait_ms = 0; -+ u8 force_fail = 0; -+ int num = sscanf(tmp, "%u %hhu", &wait_ms, &force_fail); -+ -+ if (num >= 1) -+ sta_linking_test_wait_ms = wait_ms; -+ if (num >= 2) -+ sta_linking_test_force_fail = force_fail; -+ } -+ -+ return count; -+} -+ -+#ifdef CONFIG_AP_MODE -+ssize_t proc_set_ap_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ u16 force_auth_fail = 0; -+ u16 force_asoc_fail = 0; -+ int num = sscanf(tmp, "%hu %hu", &force_auth_fail, &force_asoc_fail); -+ -+ if (num >= 1) -+ ap_linking_test_force_auth_fail = force_auth_fail; -+ if (num >= 2) -+ ap_linking_test_force_asoc_fail = force_asoc_fail; -+ } -+ -+ return count; -+} -+#endif /* CONFIG_AP_MODE */ -+ -+int proc_get_ps_dbg_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &dvobj->drv_dbg; -+ -+ RTW_PRINT_SEL(m, "dbg_sdio_alloc_irq_cnt=%d\n", pdbgpriv->dbg_sdio_alloc_irq_cnt); -+ RTW_PRINT_SEL(m, "dbg_sdio_free_irq_cnt=%d\n", pdbgpriv->dbg_sdio_free_irq_cnt); -+ RTW_PRINT_SEL(m, "dbg_sdio_alloc_irq_error_cnt=%d\n", pdbgpriv->dbg_sdio_alloc_irq_error_cnt); -+ RTW_PRINT_SEL(m, "dbg_sdio_free_irq_error_cnt=%d\n", pdbgpriv->dbg_sdio_free_irq_error_cnt); -+ RTW_PRINT_SEL(m, "dbg_sdio_init_error_cnt=%d\n", pdbgpriv->dbg_sdio_init_error_cnt); -+ RTW_PRINT_SEL(m, "dbg_sdio_deinit_error_cnt=%d\n", pdbgpriv->dbg_sdio_deinit_error_cnt); -+ RTW_PRINT_SEL(m, "dbg_suspend_error_cnt=%d\n", pdbgpriv->dbg_suspend_error_cnt); -+ RTW_PRINT_SEL(m, "dbg_suspend_cnt=%d\n", pdbgpriv->dbg_suspend_cnt); -+ RTW_PRINT_SEL(m, "dbg_resume_cnt=%d\n", pdbgpriv->dbg_resume_cnt); -+ RTW_PRINT_SEL(m, "dbg_resume_error_cnt=%d\n", pdbgpriv->dbg_resume_error_cnt); -+ RTW_PRINT_SEL(m, "dbg_deinit_fail_cnt=%d\n", pdbgpriv->dbg_deinit_fail_cnt); -+ RTW_PRINT_SEL(m, "dbg_carddisable_cnt=%d\n", pdbgpriv->dbg_carddisable_cnt); -+ RTW_PRINT_SEL(m, "dbg_ps_insuspend_cnt=%d\n", pdbgpriv->dbg_ps_insuspend_cnt); -+ RTW_PRINT_SEL(m, "dbg_dev_unload_inIPS_cnt=%d\n", pdbgpriv->dbg_dev_unload_inIPS_cnt); -+ RTW_PRINT_SEL(m, "dbg_scan_pwr_state_cnt=%d\n", pdbgpriv->dbg_scan_pwr_state_cnt); -+ RTW_PRINT_SEL(m, "dbg_downloadfw_pwr_state_cnt=%d\n", pdbgpriv->dbg_downloadfw_pwr_state_cnt); -+ RTW_PRINT_SEL(m, "dbg_carddisable_error_cnt=%d\n", pdbgpriv->dbg_carddisable_error_cnt); -+ RTW_PRINT_SEL(m, "dbg_fw_read_ps_state_fail_cnt=%d\n", pdbgpriv->dbg_fw_read_ps_state_fail_cnt); -+ RTW_PRINT_SEL(m, "dbg_leave_ips_fail_cnt=%d\n", pdbgpriv->dbg_leave_ips_fail_cnt); -+ RTW_PRINT_SEL(m, "dbg_leave_lps_fail_cnt=%d\n", pdbgpriv->dbg_leave_lps_fail_cnt); -+ RTW_PRINT_SEL(m, "dbg_h2c_leave32k_fail_cnt=%d\n", pdbgpriv->dbg_h2c_leave32k_fail_cnt); -+ RTW_PRINT_SEL(m, "dbg_diswow_dload_fw_fail_cnt=%d\n", pdbgpriv->dbg_diswow_dload_fw_fail_cnt); -+ RTW_PRINT_SEL(m, "dbg_enwow_dload_fw_fail_cnt=%d\n", pdbgpriv->dbg_enwow_dload_fw_fail_cnt); -+ RTW_PRINT_SEL(m, "dbg_ips_drvopen_fail_cnt=%d\n", pdbgpriv->dbg_ips_drvopen_fail_cnt); -+ RTW_PRINT_SEL(m, "dbg_poll_fail_cnt=%d\n", pdbgpriv->dbg_poll_fail_cnt); -+ RTW_PRINT_SEL(m, "dbg_rpwm_toogle_cnt=%d\n", pdbgpriv->dbg_rpwm_toogle_cnt); -+ RTW_PRINT_SEL(m, "dbg_rpwm_timeout_fail_cnt=%d\n", pdbgpriv->dbg_rpwm_timeout_fail_cnt); -+ RTW_PRINT_SEL(m, "dbg_sreset_cnt=%d\n", pdbgpriv->dbg_sreset_cnt); -+ RTW_PRINT_SEL(m, "dbg_fw_mem_dl_error_cnt=%d\n", pdbgpriv->dbg_fw_mem_dl_error_cnt); -+ -+ return 0; -+} -+ssize_t proc_set_ps_dbg_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter->dvobj; -+ struct debug_priv *pdbgpriv = &dvobj->drv_dbg; -+ char tmp[32]; -+ u8 ps_dbg_cmd_id; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx", &ps_dbg_cmd_id); -+ -+ if (num == 1 && ps_dbg_cmd_id == 1) /*Clean all*/ -+ _rtw_memset(pdbgpriv, 0, sizeof(struct debug_priv)); -+ -+ } -+ -+ return count; -+} -+ -+ -+#ifdef CONFIG_DBG_COUNTER -+ -+int proc_get_rx_logs(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rx_logs *rx_logs = &padapter->rx_logs; -+ -+ RTW_PRINT_SEL(m, -+ "intf_rx=%d\n" -+ "intf_rx_err_recvframe=%d\n" -+ "intf_rx_err_skb=%d\n" -+ "intf_rx_report=%d\n" -+ "core_rx=%d\n" -+ "core_rx_pre=%d\n" -+ "core_rx_pre_ver_err=%d\n" -+ "core_rx_pre_mgmt=%d\n" -+ "core_rx_pre_mgmt_err_80211w=%d\n" -+ "core_rx_pre_mgmt_err=%d\n" -+ "core_rx_pre_ctrl=%d\n" -+ "core_rx_pre_ctrl_err=%d\n" -+ "core_rx_pre_data=%d\n" -+ "core_rx_pre_data_wapi_seq_err=%d\n" -+ "core_rx_pre_data_wapi_key_err=%d\n" -+ "core_rx_pre_data_handled=%d\n" -+ "core_rx_pre_data_err=%d\n" -+ "core_rx_pre_data_unknown=%d\n" -+ "core_rx_pre_unknown=%d\n" -+ "core_rx_enqueue=%d\n" -+ "core_rx_dequeue=%d\n" -+ "core_rx_post=%d\n" -+ "core_rx_post_decrypt=%d\n" -+ "core_rx_post_decrypt_wep=%d\n" -+ "core_rx_post_decrypt_tkip=%d\n" -+ "core_rx_post_decrypt_aes=%d\n" -+ "core_rx_post_decrypt_wapi=%d\n" -+ "core_rx_post_decrypt_hw=%d\n" -+ "core_rx_post_decrypt_unknown=%d\n" -+ "core_rx_post_decrypt_err=%d\n" -+ "core_rx_post_defrag_err=%d\n" -+ "core_rx_post_portctrl_err=%d\n" -+ "core_rx_post_indicate=%d\n" -+ "core_rx_post_indicate_in_oder=%d\n" -+ "core_rx_post_indicate_reoder=%d\n" -+ "core_rx_post_indicate_err=%d\n" -+ "os_indicate=%d\n" -+ "os_indicate_ap_mcast=%d\n" -+ "os_indicate_ap_forward=%d\n" -+ "os_indicate_ap_self=%d\n" -+ "os_indicate_err=%d\n" -+ "os_netif_ok=%d\n" -+ "os_netif_err=%d\n", -+ rx_logs->intf_rx, -+ rx_logs->intf_rx_err_recvframe, -+ rx_logs->intf_rx_err_skb, -+ rx_logs->intf_rx_report, -+ rx_logs->core_rx, -+ rx_logs->core_rx_pre, -+ rx_logs->core_rx_pre_ver_err, -+ rx_logs->core_rx_pre_mgmt, -+ rx_logs->core_rx_pre_mgmt_err_80211w, -+ rx_logs->core_rx_pre_mgmt_err, -+ rx_logs->core_rx_pre_ctrl, -+ rx_logs->core_rx_pre_ctrl_err, -+ rx_logs->core_rx_pre_data, -+ rx_logs->core_rx_pre_data_wapi_seq_err, -+ rx_logs->core_rx_pre_data_wapi_key_err, -+ rx_logs->core_rx_pre_data_handled, -+ rx_logs->core_rx_pre_data_err, -+ rx_logs->core_rx_pre_data_unknown, -+ rx_logs->core_rx_pre_unknown, -+ rx_logs->core_rx_enqueue, -+ rx_logs->core_rx_dequeue, -+ rx_logs->core_rx_post, -+ rx_logs->core_rx_post_decrypt, -+ rx_logs->core_rx_post_decrypt_wep, -+ rx_logs->core_rx_post_decrypt_tkip, -+ rx_logs->core_rx_post_decrypt_aes, -+ rx_logs->core_rx_post_decrypt_wapi, -+ rx_logs->core_rx_post_decrypt_hw, -+ rx_logs->core_rx_post_decrypt_unknown, -+ rx_logs->core_rx_post_decrypt_err, -+ rx_logs->core_rx_post_defrag_err, -+ rx_logs->core_rx_post_portctrl_err, -+ rx_logs->core_rx_post_indicate, -+ rx_logs->core_rx_post_indicate_in_oder, -+ rx_logs->core_rx_post_indicate_reoder, -+ rx_logs->core_rx_post_indicate_err, -+ rx_logs->os_indicate, -+ rx_logs->os_indicate_ap_mcast, -+ rx_logs->os_indicate_ap_forward, -+ rx_logs->os_indicate_ap_self, -+ rx_logs->os_indicate_err, -+ rx_logs->os_netif_ok, -+ rx_logs->os_netif_err -+ ); -+ -+ return 0; -+} -+ -+int proc_get_tx_logs(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tx_logs *tx_logs = &padapter->tx_logs; -+ -+ RTW_PRINT_SEL(m, -+ "os_tx=%d\n" -+ "os_tx_err_up=%d\n" -+ "os_tx_err_xmit=%d\n" -+ "os_tx_m2u=%d\n" -+ "os_tx_m2u_ignore_fw_linked=%d\n" -+ "os_tx_m2u_ignore_self=%d\n" -+ "os_tx_m2u_entry=%d\n" -+ "os_tx_m2u_entry_err_xmit=%d\n" -+ "os_tx_m2u_entry_err_skb=%d\n" -+ "os_tx_m2u_stop=%d\n" -+ "core_tx=%d\n" -+ "core_tx_err_pxmitframe=%d\n" -+ "core_tx_err_brtx=%d\n" -+ "core_tx_upd_attrib=%d\n" -+ "core_tx_upd_attrib_adhoc=%d\n" -+ "core_tx_upd_attrib_sta=%d\n" -+ "core_tx_upd_attrib_ap=%d\n" -+ "core_tx_upd_attrib_unknown=%d\n" -+ "core_tx_upd_attrib_dhcp=%d\n" -+ "core_tx_upd_attrib_icmp=%d\n" -+ "core_tx_upd_attrib_active=%d\n" -+ "core_tx_upd_attrib_err_ucast_sta=%d\n" -+ "core_tx_upd_attrib_err_ucast_ap_link=%d\n" -+ "core_tx_upd_attrib_err_sta=%d\n" -+ "core_tx_upd_attrib_err_link=%d\n" -+ "core_tx_upd_attrib_err_sec=%d\n" -+ "core_tx_ap_enqueue_warn_fwstate=%d\n" -+ "core_tx_ap_enqueue_warn_sta=%d\n" -+ "core_tx_ap_enqueue_warn_nosta=%d\n" -+ "core_tx_ap_enqueue_warn_link=%d\n" -+ "core_tx_ap_enqueue_warn_trigger=%d\n" -+ "core_tx_ap_enqueue_mcast=%d\n" -+ "core_tx_ap_enqueue_ucast=%d\n" -+ "core_tx_ap_enqueue=%d\n" -+ "intf_tx=%d\n" -+ "intf_tx_pending_ac=%d\n" -+ "intf_tx_pending_fw_under_survey=%d\n" -+ "intf_tx_pending_fw_under_linking=%d\n" -+ "intf_tx_pending_xmitbuf=%d\n" -+ "intf_tx_enqueue=%d\n" -+ "core_tx_enqueue=%d\n" -+ "core_tx_enqueue_class=%d\n" -+ "core_tx_enqueue_class_err_sta=%d\n" -+ "core_tx_enqueue_class_err_nosta=%d\n" -+ "core_tx_enqueue_class_err_fwlink=%d\n" -+ "intf_tx_direct=%d\n" -+ "intf_tx_direct_err_coalesce=%d\n" -+ "intf_tx_dequeue=%d\n" -+ "intf_tx_dequeue_err_coalesce=%d\n" -+ "intf_tx_dump_xframe=%d\n" -+ "intf_tx_dump_xframe_err_txdesc=%d\n" -+ "intf_tx_dump_xframe_err_port=%d\n", -+ tx_logs->os_tx, -+ tx_logs->os_tx_err_up, -+ tx_logs->os_tx_err_xmit, -+ tx_logs->os_tx_m2u, -+ tx_logs->os_tx_m2u_ignore_fw_linked, -+ tx_logs->os_tx_m2u_ignore_self, -+ tx_logs->os_tx_m2u_entry, -+ tx_logs->os_tx_m2u_entry_err_xmit, -+ tx_logs->os_tx_m2u_entry_err_skb, -+ tx_logs->os_tx_m2u_stop, -+ tx_logs->core_tx, -+ tx_logs->core_tx_err_pxmitframe, -+ tx_logs->core_tx_err_brtx, -+ tx_logs->core_tx_upd_attrib, -+ tx_logs->core_tx_upd_attrib_adhoc, -+ tx_logs->core_tx_upd_attrib_sta, -+ tx_logs->core_tx_upd_attrib_ap, -+ tx_logs->core_tx_upd_attrib_unknown, -+ tx_logs->core_tx_upd_attrib_dhcp, -+ tx_logs->core_tx_upd_attrib_icmp, -+ tx_logs->core_tx_upd_attrib_active, -+ tx_logs->core_tx_upd_attrib_err_ucast_sta, -+ tx_logs->core_tx_upd_attrib_err_ucast_ap_link, -+ tx_logs->core_tx_upd_attrib_err_sta, -+ tx_logs->core_tx_upd_attrib_err_link, -+ tx_logs->core_tx_upd_attrib_err_sec, -+ tx_logs->core_tx_ap_enqueue_warn_fwstate, -+ tx_logs->core_tx_ap_enqueue_warn_sta, -+ tx_logs->core_tx_ap_enqueue_warn_nosta, -+ tx_logs->core_tx_ap_enqueue_warn_link, -+ tx_logs->core_tx_ap_enqueue_warn_trigger, -+ tx_logs->core_tx_ap_enqueue_mcast, -+ tx_logs->core_tx_ap_enqueue_ucast, -+ tx_logs->core_tx_ap_enqueue, -+ tx_logs->intf_tx, -+ tx_logs->intf_tx_pending_ac, -+ tx_logs->intf_tx_pending_fw_under_survey, -+ tx_logs->intf_tx_pending_fw_under_linking, -+ tx_logs->intf_tx_pending_xmitbuf, -+ tx_logs->intf_tx_enqueue, -+ tx_logs->core_tx_enqueue, -+ tx_logs->core_tx_enqueue_class, -+ tx_logs->core_tx_enqueue_class_err_sta, -+ tx_logs->core_tx_enqueue_class_err_nosta, -+ tx_logs->core_tx_enqueue_class_err_fwlink, -+ tx_logs->intf_tx_direct, -+ tx_logs->intf_tx_direct_err_coalesce, -+ tx_logs->intf_tx_dequeue, -+ tx_logs->intf_tx_dequeue_err_coalesce, -+ tx_logs->intf_tx_dump_xframe, -+ tx_logs->intf_tx_dump_xframe_err_txdesc, -+ tx_logs->intf_tx_dump_xframe_err_port -+ ); -+ -+ return 0; -+} -+ -+int proc_get_int_logs(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, -+ "all=%d\n" -+ "err=%d\n" -+ "tbdok=%d\n" -+ "tbder=%d\n" -+ "bcnderr=%d\n" -+ "bcndma=%d\n" -+ "bcndma_e=%d\n" -+ "rx=%d\n" -+ "rx_rdu=%d\n" -+ "rx_fovw=%d\n" -+ "txfovw=%d\n" -+ "mgntok=%d\n" -+ "highdok=%d\n" -+ "bkdok=%d\n" -+ "bedok=%d\n" -+ "vidok=%d\n" -+ "vodok=%d\n", -+ padapter->int_logs.all, -+ padapter->int_logs.err, -+ padapter->int_logs.tbdok, -+ padapter->int_logs.tbder, -+ padapter->int_logs.bcnderr, -+ padapter->int_logs.bcndma, -+ padapter->int_logs.bcndma_e, -+ padapter->int_logs.rx, -+ padapter->int_logs.rx_rdu, -+ padapter->int_logs.rx_fovw, -+ padapter->int_logs.txfovw, -+ padapter->int_logs.mgntok, -+ padapter->int_logs.highdok, -+ padapter->int_logs.bkdok, -+ padapter->int_logs.bedok, -+ padapter->int_logs.vidok, -+ padapter->int_logs.vodok -+ ); -+ -+ return 0; -+} -+ -+#endif /* CONFIG_DBG_COUNTER */ -+ -+int proc_get_hw_status(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &dvobj->drv_dbg; -+ struct registry_priv *regsty = dvobj_to_regsty(dvobj); -+ -+ if (regsty->check_hw_status == 0) -+ RTW_PRINT_SEL(m, "RX FIFO full count: not check in watch dog\n"); -+ else if (pdbgpriv->dbg_rx_fifo_last_overflow == 1 -+ && pdbgpriv->dbg_rx_fifo_curr_overflow == 1 -+ && pdbgpriv->dbg_rx_fifo_diff_overflow == 1 -+ ) -+ RTW_PRINT_SEL(m, "RX FIFO full count: no implementation\n"); -+ else { -+ RTW_PRINT_SEL(m, "RX FIFO full count: last_time=%llu, current_time=%llu, differential=%llu\n" -+ , pdbgpriv->dbg_rx_fifo_last_overflow, pdbgpriv->dbg_rx_fifo_curr_overflow, pdbgpriv->dbg_rx_fifo_diff_overflow); -+ } -+ -+ return 0; -+} -+ -+ssize_t proc_set_hw_status(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = padapter->dvobj; -+ struct registry_priv *regsty = dvobj_to_regsty(dvobj); -+ char tmp[32]; -+ u32 enable; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &enable); -+ -+ if (num == 1 && regsty && enable <= 1) { -+ regsty->check_hw_status = enable; -+ RTW_INFO("check_hw_status=%d\n", regsty->check_hw_status); -+ } -+ } -+ -+ return count; -+} -+ -+#ifdef CONFIG_HUAWEI_PROC -+int proc_get_huawei_trx_info(struct seq_file *sel, void *v) -+{ -+ struct net_device *dev = sel->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dm_struct *dm = adapter_to_phydm(padapter); -+ struct sta_info *psta; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ struct ra_sta_info *ra_info; -+ u8 curr_tx_sgi = _FALSE; -+ u8 curr_tx_rate = 0; -+ u8 mac_id; -+#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA -+ u8 isCCKrate, rf_path; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; -+#endif -+ -+ if (!dm->is_linked) { -+ RTW_PRINT_SEL(sel, "NO link\n\n"); -+ return 0; -+ } -+ -+ /*============ tx info ============ */ -+ for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) { -+ if (rtw_macid_is_used(macid_ctl, mac_id) && !rtw_macid_is_bmc(macid_ctl, mac_id)) { -+ psta = macid_ctl->sta[mac_id]; -+ if (!psta) -+ continue; -+ -+ RTW_PRINT_SEL(sel, "STA [" MAC_FMT "]\n", MAC_ARG(psta->cmn.mac_addr)); -+ -+ ra_info = &psta->cmn.ra_info; -+ curr_tx_sgi = rtw_get_current_tx_sgi(padapter, psta); -+ curr_tx_rate = rtw_get_current_tx_rate(padapter, psta); -+ RTW_PRINT_SEL(sel, "curr_tx_rate : %s (%s)\n", -+ HDATA_RATE(curr_tx_rate), (curr_tx_sgi) ? "S" : "L"); -+ RTW_PRINT_SEL(sel, "curr_tx_bw : %s\n", ch_width_str(ra_info->curr_tx_bw)); -+ } -+ } -+ -+ /*============ rx info ============ */ -+ RTW_PRINT_SEL(sel, "rx_rate : %s\n", HDATA_RATE(dm->rx_rate)); -+#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA -+ isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M) ? TRUE : FALSE; -+ -+ for (rf_path = 0; rf_path < hal_spec->rf_reg_path_num; rf_path++) { -+ if (!(GET_HAL_RX_PATH_BMP(padapter) & BIT(rf_path))) -+ continue; -+ if (!isCCKrate) -+ _RTW_PRINT_SEL(sel , "RF_PATH_%d : rx_ofdm_pwr:%d(dBm), rx_ofdm_snr:%d(dB)\n", -+ rf_path, psample_pkt_rssi->ofdm_pwr[rf_path], psample_pkt_rssi->ofdm_snr[rf_path]); -+ } -+#endif -+ RTW_PRINT_SEL(sel, "\n"); -+ return 0; -+} -+#endif /* CONFIG_HUAWEI_PROC */ -+ -+int proc_get_trx_info_debug(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ /*============ tx info ============ */ -+ rtw_hal_get_def_var(padapter, HW_DEF_RA_INFO_DUMP, m); -+ -+ /*============ rx info ============ */ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_RX_INFO_DUMP, m, _FALSE); -+ -+ return 0; -+} -+ -+int proc_get_rx_signal(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "rssi:%d\n", padapter->recvpriv.rssi); -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->registrypriv.mp_mode == 1) { -+ struct dm_struct *odm = adapter_to_phydm(padapter); -+ if (padapter->mppriv.antenna_rx == ANTENNA_A) -+ RTW_PRINT_SEL(m, "Antenna: A\n"); -+ else if (padapter->mppriv.antenna_rx == ANTENNA_B) -+ RTW_PRINT_SEL(m, "Antenna: B\n"); -+ else if (padapter->mppriv.antenna_rx == ANTENNA_C) -+ RTW_PRINT_SEL(m, "Antenna: C\n"); -+ else if (padapter->mppriv.antenna_rx == ANTENNA_D) -+ RTW_PRINT_SEL(m, "Antenna: D\n"); -+ else if (padapter->mppriv.antenna_rx == ANTENNA_AB) -+ RTW_PRINT_SEL(m, "Antenna: AB\n"); -+ else if (padapter->mppriv.antenna_rx == ANTENNA_BC) -+ RTW_PRINT_SEL(m, "Antenna: BC\n"); -+ else if (padapter->mppriv.antenna_rx == ANTENNA_CD) -+ RTW_PRINT_SEL(m, "Antenna: CD\n"); -+ else -+ RTW_PRINT_SEL(m, "Antenna: __\n"); -+ -+ RTW_PRINT_SEL(m, "rx_rate = %s\n", HDATA_RATE(odm->rx_rate)); -+ return 0; -+ } else -+#endif -+ { -+ /* RTW_PRINT_SEL(m, "rxpwdb:%d\n", padapter->recvpriv.rxpwdb); */ -+ RTW_PRINT_SEL(m, "signal_strength:%u\n", padapter->recvpriv.signal_strength); -+ RTW_PRINT_SEL(m, "signal_qual:%u\n", padapter->recvpriv.signal_qual); -+ } -+#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA -+ rtw_odm_get_perpkt_rssi(m, padapter); -+ rtw_get_raw_rssi_info(m, padapter); -+#endif -+ return 0; -+} -+ -+ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 is_signal_dbg, signal_strength; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength); -+ -+ if (num < 1) -+ return count; -+ -+ is_signal_dbg = is_signal_dbg == 0 ? 0 : 1; -+ -+ if (is_signal_dbg && num < 2) -+ return count; -+ -+ signal_strength = signal_strength > 100 ? 100 : signal_strength; -+ -+ padapter->recvpriv.is_signal_dbg = is_signal_dbg; -+ padapter->recvpriv.signal_strength_dbg = signal_strength; -+ -+ if (is_signal_dbg) -+ RTW_INFO("set %s %u\n", "DBG_SIGNAL_STRENGTH", signal_strength); -+ else -+ RTW_INFO("set %s\n", "HW_SIGNAL_STRENGTH"); -+ -+ } -+ -+ return count; -+ -+} -+ -+int proc_get_mac_rptbuf(struct seq_file *m, void *v) -+{ -+#ifdef CONFIG_RTL8814A -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u16 i; -+ u16 mac_id; -+ u32 shcut_addr = 0; -+ u32 read_addr = 0; -+ -+ RTW_PRINT_SEL(m, "TX ShortCut:\n"); -+ for (mac_id = 0; mac_id < 64; mac_id++) { -+ rtw_write16(padapter, 0x140, 0x662 | ((mac_id & BIT5) >> 5)); -+ shcut_addr = 0x8000; -+ shcut_addr = shcut_addr | ((mac_id & 0x1f) << 7); -+ RTW_PRINT_SEL(m, "mac_id=%d, 0x140=%x =>\n", mac_id, 0x662 | ((mac_id & BIT5) >> 5)); -+ for (i = 0; i < 30; i++) { -+ read_addr = 0; -+ read_addr = shcut_addr | (i << 2); -+ RTW_PRINT_SEL(m, "i=%02d: MAC_%04x= %08x ", i, read_addr, rtw_read32(padapter, read_addr)); -+ if (!((i + 1) % 4)) -+ RTW_PRINT_SEL(m, "\n"); -+ if (i == 29) -+ RTW_PRINT_SEL(m, "\n"); -+ } -+ } -+#endif /* CONFIG_RTL8814A */ -+ return 0; -+} -+ -+#ifdef CONFIG_80211N_HT -+ -+int proc_get_ht_enable(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (pregpriv) -+ RTW_PRINT_SEL(m, "%d\n", pregpriv->ht_enable); -+ -+ return 0; -+} -+ -+ssize_t proc_set_ht_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 mode; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &mode); -+ -+ if ( num == 1 && pregpriv && mode < 2) { -+ pregpriv->ht_enable = mode; -+ RTW_INFO("ht_enable=%d\n", pregpriv->ht_enable); -+ } -+ } -+ -+ return count; -+ -+} -+ -+int proc_get_bw_mode(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (pregpriv) -+ RTW_PRINT_SEL(m, "0x%02x\n", pregpriv->bw_mode); -+ -+ return 0; -+} -+ -+ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 mode; -+ u8 bw_2g; -+ u8 bw_5g; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%x ", &mode); -+ bw_5g = mode >> 4; -+ bw_2g = mode & 0x0f; -+ -+ if (num == 1 && pregpriv && bw_2g <= 4 && bw_5g <= 4) { -+ pregpriv->bw_mode = mode; -+ printk("bw_mode=0x%x\n", mode); -+ } -+ } -+ -+ return count; -+ -+} -+ -+int proc_get_ampdu_enable(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (pregpriv) -+ RTW_PRINT_SEL(m, "%d\n", pregpriv->ampdu_enable); -+ -+ return 0; -+} -+ -+ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 mode; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &mode); -+ -+ if (num == 1 && pregpriv && mode < 2) { -+ pregpriv->ampdu_enable = mode; -+ printk("ampdu_enable=%d\n", mode); -+ } -+ -+ } -+ -+ return count; -+ -+} -+ -+ -+void dump_regsty_rx_ampdu_size_limit(void *sel, _adapter *adapter) -+{ -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ int i; -+ -+ RTW_PRINT_SEL(sel, "%-3s %-3s %-3s %-3s %-4s\n" -+ , "", "20M", "40M", "80M", "160M"); -+ for (i = 0; i < 4; i++) -+ RTW_PRINT_SEL(sel, "%dSS %3u %3u %3u %4u\n", i + 1 -+ , regsty->rx_ampdu_sz_limit_by_nss_bw[i][0] -+ , regsty->rx_ampdu_sz_limit_by_nss_bw[i][1] -+ , regsty->rx_ampdu_sz_limit_by_nss_bw[i][2] -+ , regsty->rx_ampdu_sz_limit_by_nss_bw[i][3]); -+} -+ -+int proc_get_rx_ampdu(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ _RTW_PRINT_SEL(m, "accept: "); -+ if (padapter->fix_rx_ampdu_accept == RX_AMPDU_ACCEPT_INVALID) -+ RTW_PRINT_SEL(m, "%u%s\n", rtw_rx_ampdu_is_accept(padapter), "(auto)"); -+ else -+ RTW_PRINT_SEL(m, "%u%s\n", padapter->fix_rx_ampdu_accept, "(fixed)"); -+ -+ _RTW_PRINT_SEL(m, "size: "); -+ if (padapter->fix_rx_ampdu_size == RX_AMPDU_SIZE_INVALID) { -+ RTW_PRINT_SEL(m, "%u%s\n", rtw_rx_ampdu_size(padapter), "(auto) with conditional limit:"); -+ dump_regsty_rx_ampdu_size_limit(m, padapter); -+ } else -+ RTW_PRINT_SEL(m, "%u%s\n", padapter->fix_rx_ampdu_size, "(fixed)"); -+ RTW_PRINT_SEL(m, "\n"); -+ -+ RTW_PRINT_SEL(m, "%19s %17s\n", "fix_rx_ampdu_accept", "fix_rx_ampdu_size"); -+ -+ _RTW_PRINT_SEL(m, "%-19d %-17u\n" -+ , padapter->fix_rx_ampdu_accept -+ , padapter->fix_rx_ampdu_size); -+ -+ return 0; -+} -+ -+ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 accept; -+ u8 size; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu %hhu", &accept, &size); -+ -+ if (num >= 1) -+ rtw_rx_ampdu_set_accept(padapter, accept, RX_AMPDU_DRV_FIXED); -+ if (num >= 2) -+ rtw_rx_ampdu_set_size(padapter, size, RX_AMPDU_DRV_FIXED); -+ -+ rtw_rx_ampdu_apply(padapter); -+ } -+ -+ return count; -+} -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+int proc_get_tx_aval_th(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ if (padapter) { -+ -+ switch(dvobj->tx_aval_int_thr_mode) { -+ case 0: -+ RTW_PRINT_SEL(m, "tx_aval_int_thr_mode = %u (auto) \n", dvobj->tx_aval_int_thr_mode); -+ break; -+ case 1: -+ RTW_PRINT_SEL(m, "tx_aval_int_thr_mode = %u (fixed)\n", dvobj->tx_aval_int_thr_mode); -+ RTW_PRINT_SEL(m, "tx_aval_threshold = 0x%x\n", dvobj->tx_aval_int_thr_value); -+ break; -+ case 2: -+ RTW_PRINT_SEL(m, "tx_aval_int_thr_mode = %u(by sdio_tx_max_len)\n", dvobj->tx_aval_int_thr_mode); -+ break; -+ default: -+ break; -+ } -+ } -+ return 0; -+} -+ -+ssize_t proc_set_tx_aval_th(struct file *file, const char __user *buffer -+ , size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ char tmp[32]; -+ u32 mode; -+ u32 threshold; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d %d ",&mode, &threshold); -+ -+ if(num >= 1) -+ dvobj->tx_aval_int_thr_mode = mode; -+ if(num >= 2) -+ dvobj->tx_aval_int_thr_value = threshold; -+ RTW_INFO("dvobj->tx_aval_int_thr_mode= 0x%x\n", mode); -+ RTW_INFO("dvobj->tx_aval_int_thr_value= 0x%x(range need 1~255)\n", threshold); -+ } -+ -+ return count; -+} -+#endif /*CONFIG_SDIO_TX_ENABLE_AVAL_INT*/ -+ -+int proc_get_rx_ampdu_factor(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ -+ if (padapter) -+ RTW_PRINT_SEL(m, "rx ampdu factor = %x\n", padapter->driver_rx_ampdu_factor); -+ -+ return 0; -+} -+ -+ssize_t proc_set_rx_ampdu_factor(struct file *file, const char __user *buffer -+ , size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 factor; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &factor); -+ -+ if (padapter && (num == 1)) { -+ RTW_INFO("padapter->driver_rx_ampdu_factor = %x\n", factor); -+ -+ if (factor > 0x03) -+ padapter->driver_rx_ampdu_factor = 0xFF; -+ else -+ padapter->driver_rx_ampdu_factor = factor; -+ } -+ } -+ -+ return count; -+} -+ -+int proc_get_tx_max_agg_num(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ -+ if (padapter) -+ RTW_PRINT_SEL(m, "tx max AMPDU num = 0x%02x\n", padapter->driver_tx_max_agg_num); -+ -+ return 0; -+} -+ -+ssize_t proc_set_tx_max_agg_num(struct file *file, const char __user *buffer -+ , size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 agg_num; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx ", &agg_num); -+ -+ if (padapter && (num == 1)) { -+ RTW_INFO("padapter->driver_tx_max_agg_num = 0x%02x\n", agg_num); -+ -+ padapter->driver_tx_max_agg_num = agg_num; -+ } -+ } -+ -+ return count; -+} -+ -+int proc_get_rx_ampdu_density(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ -+ if (padapter) -+ RTW_PRINT_SEL(m, "rx ampdu densityg = %x\n", padapter->driver_rx_ampdu_spacing); -+ -+ return 0; -+} -+ -+ssize_t proc_set_rx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 density; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &density); -+ -+ if (padapter && (num == 1)) { -+ RTW_INFO("padapter->driver_rx_ampdu_spacing = %x\n", density); -+ -+ if (density > 0x07) -+ padapter->driver_rx_ampdu_spacing = 0xFF; -+ else -+ padapter->driver_rx_ampdu_spacing = density; -+ } -+ } -+ -+ return count; -+} -+ -+int proc_get_tx_ampdu_density(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ -+ if (padapter) -+ RTW_PRINT_SEL(m, "tx ampdu density = %x\n", padapter->driver_ampdu_spacing); -+ -+ return 0; -+} -+ -+ssize_t proc_set_tx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 density; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &density); -+ -+ if (padapter && (num == 1)) { -+ RTW_INFO("padapter->driver_ampdu_spacing = %x\n", density); -+ -+ if (density > 0x07) -+ padapter->driver_ampdu_spacing = 0xFF; -+ else -+ padapter->driver_ampdu_spacing = density; -+ } -+ } -+ -+ return count; -+} -+ -+int proc_get_tx_quick_addba_req(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (padapter) -+ RTW_PRINT_SEL(m, "tx_quick_addba_req = %x\n", pregpriv->tx_quick_addba_req); -+ -+ return 0; -+} -+ -+ssize_t proc_set_tx_quick_addba_req(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 enable; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &enable); -+ -+ if (padapter && (num == 1)) { -+ pregpriv->tx_quick_addba_req = enable; -+ RTW_INFO("tx_quick_addba_req = %d\n", pregpriv->tx_quick_addba_req); -+ } -+ } -+ -+ return count; -+} -+#ifdef CONFIG_TX_AMSDU -+int proc_get_tx_amsdu(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ if (padapter) -+ { -+ RTW_PRINT_SEL(m, "tx amsdu = %d\n", padapter->tx_amsdu); -+ RTW_PRINT_SEL(m, "amsdu set timer conut = %u\n", pxmitpriv->amsdu_debug_set_timer); -+ RTW_PRINT_SEL(m, "amsdu time out count = %u\n", pxmitpriv->amsdu_debug_timeout); -+ RTW_PRINT_SEL(m, "amsdu coalesce one count = %u\n", pxmitpriv->amsdu_debug_coalesce_one); -+ RTW_PRINT_SEL(m, "amsdu coalesce two count = %u\n", pxmitpriv->amsdu_debug_coalesce_two); -+ } -+ -+ return 0; -+} -+ -+ssize_t proc_set_tx_amsdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ char tmp[32]; -+ u32 amsdu; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &amsdu); -+ -+ if (padapter && (num == 1)) { -+ RTW_INFO("padapter->tx_amsdu = %x\n", amsdu); -+ -+ if (amsdu > 3) -+ padapter->tx_amsdu = 0; -+ else if(amsdu == 3) -+ { -+ pxmitpriv->amsdu_debug_set_timer = 0; -+ pxmitpriv->amsdu_debug_timeout = 0; -+ pxmitpriv->amsdu_debug_coalesce_one = 0; -+ pxmitpriv->amsdu_debug_coalesce_two = 0; -+ } -+ else -+ padapter->tx_amsdu = amsdu; -+ } -+ } -+ -+ return count; -+} -+ -+int proc_get_tx_amsdu_rate(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (padapter) -+ RTW_PRINT_SEL(m, "tx amsdu rate = %d Mbps\n", padapter->tx_amsdu_rate); -+ -+ return 0; -+} -+ -+ssize_t proc_set_tx_amsdu_rate(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 amsdu_rate; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &amsdu_rate); -+ -+ if (padapter && (num == 1)) { -+ RTW_INFO("padapter->tx_amsdu_rate = %x\n", amsdu_rate); -+ padapter->tx_amsdu_rate = amsdu_rate; -+ } -+ } -+ -+ return count; -+} -+#endif /* CONFIG_TX_AMSDU */ -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_80211AC_VHT -+int proc_get_vht_24g_enable(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (pregpriv) -+ RTW_PRINT_SEL(m, "%d\n", pregpriv->vht_24g_enable); -+ -+ return 0; -+} -+ -+ssize_t proc_set_vht_24g_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 mode; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &mode); -+ -+ if ((num == 1) && pregpriv && (mode < 2)) { -+ pregpriv->vht_24g_enable = mode; -+ RTW_INFO("vht_24g_enable = %d\n", pregpriv->vht_24g_enable); -+ } -+ } -+ -+ return count; -+ -+} -+#endif -+ -+ssize_t proc_set_dyn_rrsr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ char tmp[32] = {0}; -+ u32 num = 0, enable = 0, rrsr_val = 0; /* gpio_mode:0 input 1:output; */ -+ -+ if (count < 2) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ num = sscanf(tmp, "%d 0x%x", &enable, &rrsr_val); -+ RTW_INFO("num=%u enable=%d rrsr_val=0x%x\n", num, enable, rrsr_val); -+ pregpriv->en_dyn_rrsr = enable; -+ pregpriv->set_rrsr_value = rrsr_val; -+ rtw_phydm_dyn_rrsr_en(padapter, enable); -+ rtw_phydm_set_rrsr(padapter, rrsr_val, TRUE); -+ -+ } -+ return count; -+ -+} -+int proc_get_dyn_rrsr(struct seq_file *m, void *v) { -+ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ u32 init_rrsr =0xFFFFFFFF; -+ -+ if (padapter) -+ RTW_PRINT_SEL(m, "en_dyn_rrsr = %d fixed_rrsr_value =0x%x %s\n" -+ , pregpriv->en_dyn_rrsr -+ , pregpriv->set_rrsr_value -+ , (pregpriv->set_rrsr_value == init_rrsr)?"(default)":"(fixed)" -+ ); -+ -+ return 0; -+} -+int proc_get_en_fwps(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (pregpriv) -+ RTW_PRINT_SEL(m, "check_fw_ps = %d , 1:enable get FW PS state , 0: disable get FW PS state\n" -+ , pregpriv->check_fw_ps); -+ -+ return 0; -+} -+ -+ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 mode; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &mode); -+ -+ if (num == 1 && pregpriv && mode < 2) { -+ pregpriv->check_fw_ps = mode; -+ RTW_INFO("pregpriv->check_fw_ps=%d\n", pregpriv->check_fw_ps); -+ } -+ -+ } -+ -+ return count; -+} -+ -+/* -+int proc_get_two_path_rssi(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if(padapter) -+ RTW_PRINT_SEL(m, "%d %d\n", -+ padapter->recvpriv.RxRssi[0], padapter->recvpriv.RxRssi[1]); -+ -+ return 0; -+} -+*/ -+#ifdef CONFIG_80211N_HT -+void rtw_dump_dft_phy_cap(void *sel, _adapter *adapter) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ #ifdef CONFIG_80211AC_VHT -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ #endif -+ -+ #ifdef CONFIG_80211AC_VHT -+ RTW_PRINT_SEL(sel, "[DFT CAP] VHT STBC Tx : %s\n", (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DFT CAP] VHT STBC Rx : %s\n", (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX)) ? "V" : "X"); -+ #endif -+ RTW_PRINT_SEL(sel, "[DFT CAP] HT STBC Tx : %s\n", (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DFT CAP] HT STBC Rx : %s\n\n", (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX)) ? "V" : "X"); -+ -+ #ifdef CONFIG_80211AC_VHT -+ RTW_PRINT_SEL(sel, "[DFT CAP] VHT LDPC Tx : %s\n", (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DFT CAP] VHT LDPC Rx : %s\n", (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX)) ? "V" : "X"); -+ #endif -+ RTW_PRINT_SEL(sel, "[DFT CAP] HT LDPC Tx : %s\n", (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DFT CAP] HT LDPC Rx : %s\n\n", (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_RX)) ? "V" : "X"); -+ -+ #ifdef CONFIG_BEAMFORMING -+ #ifdef CONFIG_80211AC_VHT -+ RTW_PRINT_SEL(sel, "[DFT CAP] VHT MU Bfer : %s\n", (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DFT CAP] VHT MU Bfee : %s\n", (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DFT CAP] VHT SU Bfer : %s\n", (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DFT CAP] VHT SU Bfee : %s\n", (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) ? "V" : "X"); -+ #endif -+ RTW_PRINT_SEL(sel, "[DFT CAP] HT Bfer : %s\n", (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DFT CAP] HT Bfee : %s\n", (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) ? "V" : "X"); -+ #endif -+} -+ -+void rtw_get_dft_phy_cap(void *sel, _adapter *adapter) -+{ -+ RTW_PRINT_SEL(sel, "\n ======== PHY CAP protocol ========\n"); -+ rtw_ht_use_default_setting(adapter); -+ #ifdef CONFIG_80211AC_VHT -+ rtw_vht_use_default_setting(adapter); -+ #endif -+ #ifdef CONFIG_80211N_HT -+ rtw_dump_dft_phy_cap(sel, adapter); -+ #endif -+} -+ -+void rtw_dump_drv_phy_cap(void *sel, _adapter *adapter) -+{ -+ struct registry_priv *pregistry_priv = &adapter->registrypriv; -+ -+ RTW_PRINT_SEL(sel, "\n ======== DRV's configuration ========\n"); -+ #if 0 -+ RTW_PRINT_SEL(sel, "[DRV CAP] TRx Capability : 0x%08x\n", phy_spec->trx_cap); -+ RTW_PRINT_SEL(sel, "[DRV CAP] Tx Stream Num Index : %d\n", (phy_spec->trx_cap >> 24) & 0xFF); /*Tx Stream Num Index [31:24]*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] Rx Stream Num Index : %d\n", (phy_spec->trx_cap >> 16) & 0xFF); /*Rx Stream Num Index [23:16]*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] Tx Path Num Index : %d\n", (phy_spec->trx_cap >> 8) & 0xFF);/*Tx Path Num Index [15:8]*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] Rx Path Num Index : %d\n", (phy_spec->trx_cap & 0xFF));/*Rx Path Num Index [7:0]*/ -+ #endif -+ #ifdef CONFIG_80211N_HT -+ RTW_PRINT_SEL(sel, "[DRV CAP] STBC Capability : 0x%02x\n", pregistry_priv->stbc_cap); -+ RTW_PRINT_SEL(sel, "[DRV CAP] VHT STBC Tx : %s\n", (TEST_FLAG(pregistry_priv->stbc_cap, BIT1)) ? "V" : "X"); /*BIT1: Enable VHT STBC Tx*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] VHT STBC Rx : %s\n", (TEST_FLAG(pregistry_priv->stbc_cap, BIT0)) ? "V" : "X"); /*BIT0: Enable VHT STBC Rx*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] HT STBC Tx : %s\n", (TEST_FLAG(pregistry_priv->stbc_cap, BIT5)) ? "V" : "X"); /*BIT5: Enable HT STBC Tx*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] HT STBC Rx : %s\n\n", (TEST_FLAG(pregistry_priv->stbc_cap, BIT4)) ? "V" : "X"); /*BIT4: Enable HT STBC Rx*/ -+ -+ RTW_PRINT_SEL(sel, "[DRV CAP] LDPC Capability : 0x%02x\n", pregistry_priv->ldpc_cap); -+ RTW_PRINT_SEL(sel, "[DRV CAP] VHT LDPC Tx : %s\n", (TEST_FLAG(pregistry_priv->ldpc_cap, BIT1)) ? "V" : "X"); /*BIT1: Enable VHT LDPC Tx*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] VHT LDPC Rx : %s\n", (TEST_FLAG(pregistry_priv->ldpc_cap, BIT0)) ? "V" : "X"); /*BIT0: Enable VHT LDPC Rx*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] HT LDPC Tx : %s\n", (TEST_FLAG(pregistry_priv->ldpc_cap, BIT5)) ? "V" : "X"); /*BIT5: Enable HT LDPC Tx*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] HT LDPC Rx : %s\n\n", (TEST_FLAG(pregistry_priv->ldpc_cap, BIT4)) ? "V" : "X"); /*BIT4: Enable HT LDPC Rx*/ -+ #endif /* CONFIG_80211N_HT */ -+ #ifdef CONFIG_BEAMFORMING -+ #if 0 -+ RTW_PRINT_SEL(sel, "[DRV CAP] TxBF parameter : 0x%08x\n", phy_spec->txbf_param); -+ RTW_PRINT_SEL(sel, "[DRV CAP] VHT Sounding Dim : %d\n", (phy_spec->txbf_param >> 24) & 0xFF); /*VHT Sounding Dim [31:24]*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] VHT Steering Ant : %d\n", (phy_spec->txbf_param >> 16) & 0xFF); /*VHT Steering Ant [23:16]*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] HT Sounding Dim : %d\n", (phy_spec->txbf_param >> 8) & 0xFF); /*HT Sounding Dim [15:8]*/ -+ RTW_PRINT_SEL(sel, "[DRV CAP] HT Steering Ant : %d\n", phy_spec->txbf_param & 0xFF); /*HT Steering Ant [7:0]*/ -+ #endif -+ -+ /* -+ * BIT0: Enable VHT SU Beamformer -+ * BIT1: Enable VHT SU Beamformee -+ * BIT2: Enable VHT MU Beamformer, depend on VHT SU Beamformer -+ * BIT3: Enable VHT MU Beamformee, depend on VHT SU Beamformee -+ * BIT4: Enable HT Beamformer -+ * BIT5: Enable HT Beamformee -+ */ -+ RTW_PRINT_SEL(sel, "[DRV CAP] TxBF Capability : 0x%02x\n", pregistry_priv->beamform_cap); -+ RTW_PRINT_SEL(sel, "[DRV CAP] VHT MU Bfer : %s\n", (TEST_FLAG(pregistry_priv->beamform_cap, BIT2)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DRV CAP] VHT MU Bfee : %s\n", (TEST_FLAG(pregistry_priv->beamform_cap, BIT3)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DRV CAP] VHT SU Bfer : %s\n", (TEST_FLAG(pregistry_priv->beamform_cap, BIT0)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DRV CAP] VHT SU Bfee : %s\n", (TEST_FLAG(pregistry_priv->beamform_cap, BIT1)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DRV CAP] HT Bfer : %s\n", (TEST_FLAG(pregistry_priv->beamform_cap, BIT4)) ? "V" : "X"); -+ RTW_PRINT_SEL(sel, "[DRV CAP] HT Bfee : %s\n", (TEST_FLAG(pregistry_priv->beamform_cap, BIT5)) ? "V" : "X"); -+ -+ RTW_PRINT_SEL(sel, "[DRV CAP] Tx Bfer rf_num : %d\n", pregistry_priv->beamformer_rf_num); -+ RTW_PRINT_SEL(sel, "[DRV CAP] Tx Bfee rf_num : %d\n", pregistry_priv->beamformee_rf_num); -+ #endif -+} -+ -+int proc_get_stbc_cap(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (pregpriv) -+ RTW_PRINT_SEL(m, "0x%02x\n", pregpriv->stbc_cap); -+ -+ return 0; -+} -+ -+ssize_t proc_set_stbc_cap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 mode; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &mode); -+ -+ if (num == 1 && pregpriv) { -+ pregpriv->stbc_cap = mode; -+ RTW_INFO("stbc_cap = 0x%02x\n", mode); -+ } -+ } -+ -+ return count; -+} -+int proc_get_rx_stbc(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (pregpriv) -+ RTW_PRINT_SEL(m, "%d\n", pregpriv->rx_stbc); -+ -+ return 0; -+} -+ -+ssize_t proc_set_rx_stbc(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 mode; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &mode); -+ -+ if (num == 1 && pregpriv && (mode == 0 || mode == 1 || mode == 2 || mode == 3)) { -+ pregpriv->rx_stbc = mode; -+ printk("rx_stbc=%d\n", mode); -+ } -+ } -+ -+ return count; -+ -+} -+int proc_get_ldpc_cap(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (pregpriv) -+ RTW_PRINT_SEL(m, "0x%02x\n", pregpriv->ldpc_cap); -+ -+ return 0; -+} -+ -+ssize_t proc_set_ldpc_cap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 mode; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &mode); -+ -+ if (num == 1 && pregpriv) { -+ pregpriv->ldpc_cap = mode; -+ RTW_INFO("ldpc_cap = 0x%02x\n", mode); -+ } -+ } -+ -+ return count; -+} -+#ifdef CONFIG_BEAMFORMING -+int proc_get_txbf_cap(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (pregpriv) -+ RTW_PRINT_SEL(m, "0x%02x\n", pregpriv->beamform_cap); -+ -+ return 0; -+} -+ -+ssize_t proc_set_txbf_cap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 mode; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &mode); -+ -+ if (num == 1 && pregpriv) { -+ pregpriv->beamform_cap = mode; -+ RTW_INFO("beamform_cap = 0x%02x\n", mode); -+ } -+ } -+ -+ return count; -+} -+#endif -+#endif /* CONFIG_80211N_HT */ -+ -+/*int proc_get_rssi_disp(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ return 0; -+} -+*/ -+ -+/*ssize_t proc_set_rssi_disp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 enable=0; -+ -+ if (count < 1) -+ { -+ RTW_INFO("argument size is less than 1\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%x", &enable); -+ -+ if (num != 1) { -+ RTW_INFO("invalid set_rssi_disp parameter!\n"); -+ return count; -+ } -+ -+ if(enable) -+ { -+ RTW_INFO("Linked info Function Enable\n"); -+ padapter->bLinkInfoDump = enable ; -+ } -+ else -+ { -+ RTW_INFO("Linked info Function Disable\n"); -+ padapter->bLinkInfoDump = 0 ; -+ } -+ -+ } -+ -+ return count; -+ -+} -+ -+*/ -+#ifdef CONFIG_AP_MODE -+ -+int proc_get_all_sta_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _irqL irqL; -+ struct sta_info *psta; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ int i; -+ _list *plist, *phead; -+ -+ RTW_MAP_DUMP_SEL(m, "sta_dz_bitmap=", pstapriv->sta_dz_bitmap, pstapriv->aid_bmp_len); -+ RTW_MAP_DUMP_SEL(m, "tim_bitmap=", pstapriv->tim_bitmap, pstapriv->aid_bmp_len); -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ -+ plist = get_next(plist); -+ -+ /* if(extra_arg == psta->cmn.aid) */ -+ { -+ RTW_PRINT_SEL(m, "==============================\n"); -+ RTW_PRINT_SEL(m, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); -+ RTW_PRINT_SEL(m, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); -+ RTW_PRINT_SEL(m, "state=0x%x, aid=%d, macid=%d, raid=%d\n", -+ psta->state, psta->cmn.aid, psta->cmn.mac_id, psta->cmn.ra_info.rate_id); -+#ifdef CONFIG_RTS_FULL_BW -+ if(psta->vendor_8812) -+ RTW_PRINT_SEL(m,"Vendor Realtek 8812\n"); -+#endif/*CONFIG_RTS_FULL_BW*/ -+#ifdef CONFIG_80211N_HT -+ RTW_PRINT_SEL(m, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); -+ RTW_PRINT_SEL(m, "bwmode=%d, ch_offset=%d, sgi_20m=%d,sgi_40m=%d\n" -+ , psta->cmn.bw_mode, psta->htpriv.ch_offset, psta->htpriv.sgi_20m, psta->htpriv.sgi_40m); -+ RTW_PRINT_SEL(m, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable); -+ RTW_PRINT_SEL(m, "tx_amsdu_enable = %d\n", psta->htpriv.tx_amsdu_enable); -+ RTW_PRINT_SEL(m, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); -+#endif /* CONFIG_80211N_HT */ -+#ifdef CONFIG_80211AC_VHT -+ RTW_PRINT_SEL(m, "vht_en=%d, vht_sgi_80m=%d\n", psta->vhtpriv.vht_option, psta->vhtpriv.sgi_80m); -+ RTW_PRINT_SEL(m, "vht_ldpc_cap=0x%x, vht_stbc_cap=0x%x, vht_beamform_cap=0x%x\n", psta->vhtpriv.ldpc_cap, psta->vhtpriv.stbc_cap, psta->vhtpriv.beamform_cap); -+ RTW_PRINT_SEL(m, "vht_mcs_map=0x%x, vht_highest_rate=0x%x, vht_ampdu_len=%d\n", *(u16 *)psta->vhtpriv.vht_mcs_map, psta->vhtpriv.vht_highest_rate, psta->vhtpriv.ampdu_len); -+#endif -+ RTW_PRINT_SEL(m, "sleepq_len=%d\n", psta->sleepq_len); -+ RTW_PRINT_SEL(m, "sta_xmitpriv.vo_q_qcnt=%d\n", psta->sta_xmitpriv.vo_q.qcnt); -+ RTW_PRINT_SEL(m, "sta_xmitpriv.vi_q_qcnt=%d\n", psta->sta_xmitpriv.vi_q.qcnt); -+ RTW_PRINT_SEL(m, "sta_xmitpriv.be_q_qcnt=%d\n", psta->sta_xmitpriv.be_q.qcnt); -+ RTW_PRINT_SEL(m, "sta_xmitpriv.bk_q_qcnt=%d\n", psta->sta_xmitpriv.bk_q.qcnt); -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ RTW_PRINT_SEL(m, "management sleepq_len=%d\n", psta->mgmt_sleepq_len); -+ RTW_PRINT_SEL(m, "sta_xmitpriv.mgmt_q_qcnt=%d\n", psta->sta_xmitpriv.mgmt_q.qcnt); -+#endif -+ -+ RTW_PRINT_SEL(m, "capability=0x%x\n", psta->capability); -+ RTW_PRINT_SEL(m, "flags=0x%x\n", psta->flags); -+ RTW_PRINT_SEL(m, "wpa_psk=0x%x\n", psta->wpa_psk); -+ RTW_PRINT_SEL(m, "wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher); -+ RTW_PRINT_SEL(m, "wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher); -+ RTW_PRINT_SEL(m, "qos_info=0x%x\n", psta->qos_info); -+ RTW_PRINT_SEL(m, "dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy); -+ -+ sta_rx_reorder_ctl_dump(m, psta); -+ -+#ifdef CONFIG_TDLS -+ RTW_PRINT_SEL(m, "tdls_sta_state=0x%08x\n", psta->tdls_sta_state); -+ RTW_PRINT_SEL(m, "PeerKey_Lifetime=%d\n", psta->TDLS_PeerKey_Lifetime); -+#endif /* CONFIG_TDLS */ -+ RTW_PRINT_SEL(m, "rx_data_uc_pkts=%llu\n", sta_rx_data_uc_pkts(psta)); -+ RTW_PRINT_SEL(m, "rx_data_mc_pkts=%llu\n", psta->sta_stats.rx_data_mc_pkts); -+ RTW_PRINT_SEL(m, "rx_data_bc_pkts=%llu\n", psta->sta_stats.rx_data_bc_pkts); -+ RTW_PRINT_SEL(m, "rx_uc_bytes=%llu\n", sta_rx_uc_bytes(psta)); -+ RTW_PRINT_SEL(m, "rx_mc_bytes=%llu\n", psta->sta_stats.rx_mc_bytes); -+ RTW_PRINT_SEL(m, "rx_bc_bytes=%llu\n", psta->sta_stats.rx_bc_bytes); -+ if (psta->sta_stats.rx_tp_kbits >> 10) -+ RTW_PRINT_SEL(m, "rx_tp =%d (Mbps)\n", psta->sta_stats.rx_tp_kbits >> 10); -+ else -+ RTW_PRINT_SEL(m, "rx_tp =%d (Kbps)\n", psta->sta_stats.rx_tp_kbits); -+ -+ RTW_PRINT_SEL(m, "tx_data_pkts=%llu\n", psta->sta_stats.tx_pkts); -+ RTW_PRINT_SEL(m, "tx_bytes=%llu\n", psta->sta_stats.tx_bytes); -+ if (psta->sta_stats.tx_tp_kbits >> 10) -+ RTW_PRINT_SEL(m, "tx_tp =%d (Mbps)\n", psta->sta_stats.tx_tp_kbits >> 10); -+ else -+ RTW_PRINT_SEL(m, "tx_tp =%d (Kbps)\n", psta->sta_stats.tx_tp_kbits); -+#ifdef CONFIG_RTW_80211K -+ RTW_PRINT_SEL(m, "rm_en_cap="RM_CAP_FMT"\n", RM_CAP_ARG(psta->rm_en_cap)); -+#endif -+ dump_st_ctl(m, &psta->st_ctl); -+ -+ if (STA_OP_WFD_MODE(psta)) -+ RTW_PRINT_SEL(m, "op_wfd_mode:0x%02x\n", STA_OP_WFD_MODE(psta)); -+ -+ RTW_PRINT_SEL(m, "tx_bitrate_100kbps=%u\n", rtw_desc_rate_to_bitrate(psta->cmn.bw_mode, rtw_get_current_tx_rate(padapter, psta), rtw_get_current_tx_sgi(padapter, psta))); -+ RTW_PRINT_SEL(m, "rx_bitrate_100kbps=%u\n", rtw_desc_rate_to_bitrate(psta->cmn.bw_mode, psta->curr_rx_rate & 0x7f, (psta->curr_rx_rate & 0x80) >> 7)); -+ RTW_PRINT_SEL(m, "rssi=%d\n", psta->cmn.rssi_stat.rssi); -+ RTW_PRINT_SEL(m, "==============================\n"); -+ } -+ -+ } -+ -+ } -+ -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ return 0; -+} -+ -+#endif -+ -+#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+int proc_get_rtkm_info(struct seq_file *m, void *v) -+{ -+#ifdef CONFIG_USB_HCI -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ struct recv_buf *precvbuf; -+ -+ precvbuf = (struct recv_buf *)precvpriv->precv_buf; -+#endif /* CONFIG_USB_HCI */ -+ -+ RTW_PRINT_SEL(m, "============[RTKM Info]============\n"); -+ RTW_PRINT_SEL(m, "MAX_RTKM_NR_PREALLOC_RECV_SKB: %d\n", rtw_rtkm_get_nr_recv_skb()); -+ RTW_PRINT_SEL(m, "MAX_RTKM_RECVBUF_SZ: %d\n", rtw_rtkm_get_buff_size()); -+ -+ RTW_PRINT_SEL(m, "============[Driver Info]============\n"); -+ RTW_PRINT_SEL(m, "NR_PREALLOC_RECV_SKB: %d\n", NR_PREALLOC_RECV_SKB); -+#ifdef CONFIG_USB_HCI -+ RTW_PRINT_SEL(m, "MAX_RECVBUF_SZ: %d\n", precvbuf->alloc_sz); -+#else /* !CONFIG_USB_HCI */ -+ RTW_PRINT_SEL(m, "MAX_RECVBUF_SZ: %d\n", MAX_RECVBUF_SZ); -+#endif /* !CONFIG_USB_HCI */ -+ -+ return 0; -+} -+#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ -+ -+#ifdef DBG_MEMORY_LEAK -+#include -+extern atomic_t _malloc_cnt;; -+extern atomic_t _malloc_size;; -+ -+int proc_get_malloc_cnt(struct seq_file *m, void *v) -+{ -+ RTW_PRINT_SEL(m, "_malloc_cnt=%d\n", atomic_read(&_malloc_cnt)); -+ RTW_PRINT_SEL(m, "_malloc_size=%d\n", atomic_read(&_malloc_size)); -+ -+ return 0; -+} -+#endif /* DBG_MEMORY_LEAK */ -+ -+#ifdef CONFIG_FIND_BEST_CHANNEL -+int proc_get_best_channel(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0; -+ -+ for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) { -+ if (rfctl->channel_set[i].ChannelNum == 1) -+ index_24G = i; -+ if (rfctl->channel_set[i].ChannelNum == 36) -+ index_5G = i; -+ } -+ -+ for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) { -+ /* 2.4G */ -+ if (rfctl->channel_set[i].ChannelNum == 6) { -+ if (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_24G].rx_count) { -+ index_24G = i; -+ best_channel_24G = rfctl->channel_set[i].ChannelNum; -+ } -+ } -+ -+ /* 5G */ -+ if (rfctl->channel_set[i].ChannelNum >= 36 -+ && rfctl->channel_set[i].ChannelNum < 140) { -+ /* Find primary channel */ -+ if (((rfctl->channel_set[i].ChannelNum - 36) % 8 == 0) -+ && (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_5G].rx_count)) { -+ index_5G = i; -+ best_channel_5G = rfctl->channel_set[i].ChannelNum; -+ } -+ } -+ -+ if (rfctl->channel_set[i].ChannelNum >= 149 -+ && rfctl->channel_set[i].ChannelNum < 165) { -+ /* find primary channel */ -+ if (((rfctl->channel_set[i].ChannelNum - 149) % 8 == 0) -+ && (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_5G].rx_count)) { -+ index_5G = i; -+ best_channel_5G = rfctl->channel_set[i].ChannelNum; -+ } -+ } -+#if 1 /* debug */ -+ RTW_PRINT_SEL(m, "The rx cnt of channel %3d = %d\n", -+ rfctl->channel_set[i].ChannelNum, rfctl->channel_set[i].rx_count); -+#endif -+ } -+ -+ RTW_PRINT_SEL(m, "best_channel_5G = %d\n", best_channel_5G); -+ RTW_PRINT_SEL(m, "best_channel_24G = %d\n", best_channel_24G); -+ -+ return 0; -+} -+ -+ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int i; -+ for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) -+ rfctl->channel_set[i].rx_count = 0; -+ -+ RTW_INFO("set %s\n", "Clean Best Channel Count"); -+ } -+ -+ return count; -+} -+#endif /* CONFIG_FIND_BEST_CHANNEL */ -+ -+#ifdef CONFIG_BT_COEXIST -+int proc_get_btcoex_dbg(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ PADAPTER padapter; -+ char buf[512] = {0}; -+ padapter = (PADAPTER)rtw_netdev_priv(dev); -+ -+ rtw_btcoex_GetDBG(padapter, buf, 512); -+ -+ _RTW_PRINT_SEL(m, "%s", buf); -+ -+ return 0; -+} -+ -+ssize_t proc_set_btcoex_dbg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ PADAPTER padapter; -+ u8 tmp[80] = {0}; -+ u32 module[2] = {0}; -+ u32 num; -+ -+ padapter = (PADAPTER)rtw_netdev_priv(dev); -+ -+ /* RTW_INFO("+" FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(padapter)); */ -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", -+ FUNC_ADPT_ARG(padapter)); -+ -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", -+ FUNC_ADPT_ARG(padapter)); -+ -+ return -EFAULT; -+ } -+ -+ num = count; -+ if (num > (sizeof(tmp) - 1)) -+ num = (sizeof(tmp) - 1); -+ -+ if (copy_from_user(tmp, buffer, num)) { -+ RTW_INFO(FUNC_ADPT_FMT ": copy buffer from user space FAIL!\n", -+ FUNC_ADPT_ARG(padapter)); -+ -+ return -EFAULT; -+ } -+ -+ num = sscanf(tmp, "%x %x", module, module + 1); -+ if (1 == num) { -+ if (0 == module[0]) -+ _rtw_memset(module, 0, sizeof(module)); -+ else -+ _rtw_memset(module, 0xFF, sizeof(module)); -+ } else if (2 != num) { -+ RTW_INFO(FUNC_ADPT_FMT ": input(\"%s\") format incorrect!\n", -+ FUNC_ADPT_ARG(padapter), tmp); -+ -+ if (0 == num) -+ return -EFAULT; -+ } -+ -+ RTW_INFO(FUNC_ADPT_FMT ": input 0x%08X 0x%08X\n", -+ FUNC_ADPT_ARG(padapter), module[0], module[1]); -+ rtw_btcoex_SetDBG(padapter, module); -+ -+ return count; -+} -+ -+int proc_get_btcoex_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ PADAPTER padapter; -+ const u32 bufsize = 40 * 100; -+ u8 *pbuf = NULL; -+ -+ padapter = (PADAPTER)rtw_netdev_priv(dev); -+ -+ pbuf = rtw_zmalloc(bufsize); -+ if (NULL == pbuf) -+ return -ENOMEM; -+ -+ rtw_btcoex_DisplayBtCoexInfo(padapter, pbuf, bufsize); -+ -+ _RTW_PRINT_SEL(m, "%s\n", pbuf); -+ -+ rtw_mfree(pbuf, bufsize); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_RF4CE_COEXIST -+int proc_get_rf4ce_state(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 state = 0, voice = 0; -+ -+ state = rtw_btcoex_GetRf4ceLinkState(adapter); -+ -+ RTW_PRINT_SEL(m, "RF4CE %s\n", state?"Connected":"Disconnect"); -+ -+ return 0; -+} -+ -+/* This interface is designed for user space application to inform RF4CE state -+ * Initial define for DHC 1295 E387 project -+ * -+ * echo state voice > rf4ce_state -+ * state -+ * 0: RF4CE disconnected -+ * 1: RF4CE connected -+ */ -+ssize_t proc_set_rf4ce_state(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 state; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx", &state); -+ -+ if (num >= 1) -+ rtw_btcoex_SetRf4ceLinkState(adapter, state); -+ } -+ -+ return count; -+} -+#endif /* CONFIG_RF4CE_COEXIST */ -+#endif /* CONFIG_BT_COEXIST */ -+ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+int proc_get_sreset(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ -+ if (psrtpriv->dbg_sreset_ctrl == _TRUE) { -+ RTW_PRINT_SEL(m, "self_dect_tx_cnt:%llu\n", psrtpriv->self_dect_tx_cnt); -+ RTW_PRINT_SEL(m, "self_dect_rx_cnt:%llu\n", psrtpriv->self_dect_rx_cnt); -+ RTW_PRINT_SEL(m, "self_dect_fw_cnt:%llu\n", psrtpriv->self_dect_fw_cnt); -+ RTW_PRINT_SEL(m, "tx_dma_status_cnt:%llu\n", psrtpriv->tx_dma_status_cnt); -+ RTW_PRINT_SEL(m, "rx_dma_status_cnt:%llu\n", psrtpriv->rx_dma_status_cnt); -+ RTW_PRINT_SEL(m, "self_dect_case:%d\n", psrtpriv->self_dect_case); -+ RTW_PRINT_SEL(m, "dbg_sreset_cnt:%d\n", pdbgpriv->dbg_sreset_cnt); -+ } -+ return 0; -+} -+ -+ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ char tmp[32]; -+ s32 trigger_point; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d", &trigger_point); -+ -+ if (num < 1) -+ return count; -+ -+ if (trigger_point == SRESET_TGP_NULL) -+ rtw_hal_sreset_reset(padapter); -+ else if (trigger_point == SRESET_TGP_INFO) -+ psrtpriv->dbg_sreset_ctrl = _TRUE; -+ else -+ sreset_set_trigger_point(padapter, trigger_point); -+ } -+ -+ return count; -+ -+} -+#endif /* DBG_CONFIG_ERROR_DETECT */ -+ -+#ifdef CONFIG_PCI_HCI -+ -+ssize_t proc_set_pci_bridge_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct pci_dev *pdev = pdvobjpriv->ppcidev; -+ struct pci_dev *bridge_pdev = pdev->bus->self; -+ -+ char tmp[32] = { 0 }; -+ int num; -+ -+ u32 reg = 0, value = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ num = sscanf(tmp, "%x %x", ®, &value); -+ if (num != 2) { -+ RTW_INFO("invalid parameter!\n"); -+ return count; -+ } -+ -+ if (reg >= 0x1000) { -+ RTW_INFO("invalid register!\n"); -+ return count; -+ } -+ -+ if (value > 0xFF) { -+ RTW_INFO("invalid value! Only one byte\n"); -+ return count; -+ } -+ -+ RTW_INFO(FUNC_ADPT_FMT ": register 0x%x value 0x%x\n", -+ FUNC_ADPT_ARG(padapter), reg, value); -+ -+ pci_write_config_byte(bridge_pdev, reg, value); -+ } -+ return count; -+} -+ -+ -+int proc_get_pci_bridge_conf_space(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct pci_dev *pdev = pdvobjpriv->ppcidev; -+ struct pci_dev *bridge_pdev = pdev->bus->self; -+ -+ u32 tmp[4] = { 0 }; -+ u32 i, j; -+ -+ RTW_PRINT_SEL(m, "\n***** PCI Host Device Configuration Space*****\n\n"); -+ -+ for (i = 0; i < 0x1000; i += 0x10) { -+ for (j = 0 ; j < 4 ; j++) -+ pci_read_config_dword(bridge_pdev, i + j * 4, tmp+j); -+ -+ RTW_PRINT_SEL(m, "%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", -+ i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF, -+ tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF, -+ tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF, -+ tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF); -+ } -+ return 0; -+} -+ -+ -+ssize_t proc_set_pci_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct pci_dev *pdev = pdvobjpriv->ppcidev; -+ -+ char tmp[32] = { 0 }; -+ int num; -+ -+ u32 reg = 0, value = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ num = sscanf(tmp, "%x %x", ®, &value); -+ -+ if (num != 2) { -+ RTW_INFO("invalid parameter!\n"); -+ return count; -+ } -+ -+ -+ if (reg >= 0x1000) { -+ RTW_INFO("invalid register!\n"); -+ return count; -+ } -+ -+ if (value > 0xFF) { -+ RTW_INFO("invalid value! Only one byte\n"); -+ return count; -+ } -+ -+ RTW_INFO(FUNC_ADPT_FMT ": register 0x%x value 0x%x\n", -+ FUNC_ADPT_ARG(padapter), reg, value); -+ -+ pci_write_config_byte(pdev, reg, value); -+ -+ -+ } -+ return count; -+} -+ -+ -+int proc_get_pci_conf_space(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct pci_dev *pdev = pdvobjpriv->ppcidev; -+ struct pci_dev *bridge_pdev = pdev->bus->self; -+ -+ u32 tmp[4] = { 0 }; -+ u32 i, j; -+ -+ RTW_PRINT_SEL(m, "\n***** PCI Device Configuration Space *****\n\n"); -+ -+ for (i = 0; i < 0x1000; i += 0x10) { -+ for (j = 0 ; j < 4 ; j++) -+ pci_read_config_dword(pdev, i + j * 4, tmp+j); -+ -+ RTW_PRINT_SEL(m, "%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", -+ i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF, -+ tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF, -+ tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF, -+ tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF); -+ } -+ -+ return 0; -+} -+ -+ -+int proc_get_pci_aspm(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); -+ u8 tmp8 = 0; -+ u16 tmp16 = 0; -+ u32 tmp32 = 0; -+ u8 l1_idle = 0; -+ -+ -+ RTW_PRINT_SEL(m, "***** ASPM Capability *****\n"); -+ -+ pci_read_config_dword(pdvobjpriv->ppcidev, pcipriv->pciehdr_offset + PCI_EXP_LNKCAP, &tmp32); -+ -+ RTW_PRINT_SEL(m, "CLK REQ: %s\n", (tmp32&PCI_EXP_LNKCAP_CLKPM) ? "Enable" : "Disable"); -+ RTW_PRINT_SEL(m, "ASPM L0s: %s\n", (tmp32&BIT10) ? "Enable" : "Disable"); -+ RTW_PRINT_SEL(m, "ASPM L1: %s\n", (tmp32&BIT11) ? "Enable" : "Disable"); -+ -+ tmp8 = rtw_hal_pci_l1off_capability(padapter); -+ RTW_PRINT_SEL(m, "ASPM L1OFF: %s\n", tmp8 ? "Enable" : "Disable"); -+ -+ RTW_PRINT_SEL(m, "***** ASPM CTRL Reg *****\n"); -+ -+ pci_read_config_word(pdvobjpriv->ppcidev, pcipriv->pciehdr_offset + PCI_EXP_LNKCTL, &tmp16); -+ -+ RTW_PRINT_SEL(m, "CLK REQ: %s\n", (tmp16&PCI_EXP_LNKCTL_CLKREQ_EN) ? "Enable" : "Disable"); -+ RTW_PRINT_SEL(m, "ASPM L0s: %s\n", (tmp16&BIT0) ? "Enable" : "Disable"); -+ RTW_PRINT_SEL(m, "ASPM L1: %s\n", (tmp16&BIT1) ? "Enable" : "Disable"); -+ -+ tmp8 = rtw_hal_pci_l1off_nic_support(padapter); -+ RTW_PRINT_SEL(m, "ASPM L1OFF: %s\n", tmp8 ? "Enable" : "Disable"); -+ -+ RTW_PRINT_SEL(m, "***** ASPM Backdoor *****\n"); -+ -+ tmp8 = rtw_hal_pci_dbi_read(padapter, 0x719); -+ RTW_PRINT_SEL(m, "CLK REQ: %s\n", (tmp8 & BIT4) ? "Enable" : "Disable"); -+ -+ tmp8 = rtw_hal_pci_dbi_read(padapter, 0x70f); -+ l1_idle = tmp8 & 0x38; -+ RTW_PRINT_SEL(m, "ASPM L0s: %s\n", (tmp8&BIT7) ? "Enable" : "Disable"); -+ -+ tmp8 = rtw_hal_pci_dbi_read(padapter, 0x719); -+ RTW_PRINT_SEL(m, "ASPM L1: %s\n", (tmp8 & BIT3) ? "Enable" : "Disable"); -+ -+ tmp8 = rtw_hal_pci_dbi_read(padapter, 0x718); -+ RTW_PRINT_SEL(m, "ASPM L1OFF: %s\n", (tmp8 & BIT5) ? "Enable" : "Disable"); -+ -+ RTW_PRINT_SEL(m, "********* MISC **********\n"); -+ RTW_PRINT_SEL(m, "ASPM L1 Idel Time: 0x%x\n", l1_idle>>3); -+ RTW_PRINT_SEL(m, "*************************\n"); -+ -+#ifdef CONFIG_PCI_DYNAMIC_ASPM -+ RTW_PRINT_SEL(m, "Dynamic ASPM mode: %d (%s)\n", pcipriv->aspm_mode, -+ pcipriv->aspm_mode == ASPM_MODE_PERF ? "Perf" : -+ pcipriv->aspm_mode == ASPM_MODE_PS ? "PS" : "Und"); -+#endif -+ -+ return 0; -+} -+ -+int proc_get_rx_ring(struct seq_file *m, void *v) -+{ -+ _irqL irqL; -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ struct rtw_rx_ring *rx_ring = &precvpriv->rx_ring[RX_MPDU_QUEUE]; -+ int i, j; -+ -+ RTW_PRINT_SEL(m, "rx ring (%p)\n", rx_ring); -+ RTW_PRINT_SEL(m, " dma: 0x%08x\n", (int) rx_ring->dma); -+ RTW_PRINT_SEL(m, " idx: %d\n", rx_ring->idx); -+ -+ _enter_critical(&pdvobjpriv->irq_th_lock, &irqL); -+ for (i = 0; i < precvpriv->rxringcount; i++) { -+#ifdef CONFIG_TRX_BD_ARCH -+ struct rx_buf_desc *entry = &rx_ring->buf_desc[i]; -+#else -+ struct recv_stat *entry = &rx_ring->desc[i]; -+#endif -+ struct sk_buff *skb = rx_ring->rx_buf[i]; -+ -+ RTW_PRINT_SEL(m, " desc[%03d]: %p, rx_buf[%03d]: 0x%08x\n", -+ i, entry, i, cpu_to_le32(*((dma_addr_t *)skb->cb))); -+ -+ for (j = 0; j < sizeof(*entry) / 4; j++) { -+ if ((j % 4) == 0) -+ RTW_PRINT_SEL(m, " 0x%03x", j); -+ -+ RTW_PRINT_SEL(m, " 0x%08x ", ((int *) entry)[j]); -+ -+ if ((j % 4) == 3) -+ RTW_PRINT_SEL(m, "\n"); -+ } -+ } -+ _exit_critical(&pdvobjpriv->irq_th_lock, &irqL); -+ -+ return 0; -+} -+ -+int proc_get_tx_ring(struct seq_file *m, void *v) -+{ -+ _irqL irqL; -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ int i, j, k; -+ -+ _enter_critical(&pdvobjpriv->irq_th_lock, &irqL); -+ for (i = 0; i < PCI_MAX_TX_QUEUE_COUNT; i++) { -+ struct rtw_tx_ring *tx_ring = &pxmitpriv->tx_ring[i]; -+ -+ RTW_PRINT_SEL(m, "tx ring[%d] (%p)\n", i, tx_ring); -+ RTW_PRINT_SEL(m, " dma: 0x%08x\n", (int) tx_ring->dma); -+ RTW_PRINT_SEL(m, " idx: %d\n", tx_ring->idx); -+ RTW_PRINT_SEL(m, " entries: %d\n", tx_ring->entries); -+ /* RTW_PRINT_SEL(m, " queue: %d\n", tx_ring->queue); */ -+ RTW_PRINT_SEL(m, " qlen: %d\n", tx_ring->qlen); -+ -+ for (j = 0; j < pxmitpriv->txringcount[i]; j++) { -+#ifdef CONFIG_TRX_BD_ARCH -+ struct tx_buf_desc *entry = &tx_ring->buf_desc[j]; -+ RTW_PRINT_SEL(m, " buf_desc[%03d]: %p\n", j, entry); -+#else -+ struct tx_desc *entry = &tx_ring->desc[j]; -+ RTW_PRINT_SEL(m, " desc[%03d]: %p\n", j, entry); -+#endif -+ -+ for (k = 0; k < sizeof(*entry) / 4; k++) { -+ if ((k % 4) == 0) -+ RTW_PRINT_SEL(m, " 0x%03x", k); -+ -+ RTW_PRINT_SEL(m, " 0x%08x ", ((int *) entry)[k]); -+ -+ if ((k % 4) == 3) -+ RTW_PRINT_SEL(m, "\n"); -+ } -+ } -+ } -+ _exit_critical(&pdvobjpriv->irq_th_lock, &irqL); -+ -+ return 0; -+} -+ -+#ifdef DBG_TXBD_DESC_DUMP -+int proc_get_tx_ring_ext(struct seq_file *m, void *v) -+{ -+ _irqL irqL; -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct rtw_tx_desc_backup *pbuf; -+ int i, j, k, idx; -+ -+ RTW_PRINT_SEL(m, "<<<< tx ring ext dump settings >>>>\n"); -+ RTW_PRINT_SEL(m, " - backup frame num: %d\n", TX_BAK_FRMAE_CNT); -+ RTW_PRINT_SEL(m, " - backup max. desc size: %d bytes\n", TX_BAK_DESC_LEN); -+ RTW_PRINT_SEL(m, " - backup data size: %d bytes\n\n", TX_BAK_DATA_LEN); -+ -+ if (!pxmitpriv->dump_txbd_desc) { -+ RTW_PRINT_SEL(m, "Dump function is disabled.\n"); -+ return 0; -+ } -+ -+ _enter_critical(&pdvobjpriv->irq_th_lock, &irqL); -+ for (i = 0; i < HW_QUEUE_ENTRY; i++) { -+ struct rtw_tx_ring *tx_ring = &pxmitpriv->tx_ring[i]; -+ -+ idx = rtw_get_tx_desc_backup(padapter, i, &pbuf); -+ -+ RTW_PRINT_SEL(m, "Tx ring[%d]", i); -+ switch (i) { -+ case 0: -+ RTW_PRINT_SEL(m, " (VO)\n"); -+ break; -+ case 1: -+ RTW_PRINT_SEL(m, " (VI)\n"); -+ break; -+ case 2: -+ RTW_PRINT_SEL(m, " (BE)\n"); -+ break; -+ case 3: -+ RTW_PRINT_SEL(m, " (BK)\n"); -+ break; -+ case 4: -+ RTW_PRINT_SEL(m, " (BCN)\n"); -+ break; -+ case 5: -+ RTW_PRINT_SEL(m, " (MGT)\n"); -+ break; -+ case 6: -+ RTW_PRINT_SEL(m, " (HIGH)\n"); -+ break; -+ case 7: -+ RTW_PRINT_SEL(m, " (TXCMD)\n"); -+ break; -+ default: -+ RTW_PRINT_SEL(m, " (?)\n"); -+ break; -+ } -+ -+ RTW_PRINT_SEL(m, " Entries: %d\n", TX_BAK_FRMAE_CNT); -+ RTW_PRINT_SEL(m, " Last idx: %d\n", idx); -+ -+ for (j = 0; j < TX_BAK_FRMAE_CNT; j++) { -+ RTW_PRINT_SEL(m, " desc[%03d]:\n", j); -+ -+ for (k = 0; k < (pbuf->tx_desc_size) / 4; k++) { -+ if ((k % 4) == 0) -+ RTW_PRINT_SEL(m, " 0x%03x", k); -+ -+ RTW_PRINT_SEL(m, " 0x%08x ", ((int *)pbuf->tx_bak_desc)[k]); -+ -+ if ((k % 4) == 3) -+ RTW_PRINT_SEL(m, "\n"); -+ } -+ -+#if 1 /* data dump */ -+ if (pbuf->tx_desc_size) { -+ RTW_PRINT_SEL(m, " data[%03d]:\n", j); -+ -+ for (k = 0; k < (TX_BAK_DATA_LEN) / 4; k++) { -+ if ((k % 4) == 0) -+ RTW_PRINT_SEL(m, " 0x%03x", k); -+ -+ RTW_PRINT_SEL(m, " 0x%08x ", ((int *)pbuf->tx_bak_data_hdr)[k]); -+ -+ if ((k % 4) == 3) -+ RTW_PRINT_SEL(m, "\n"); -+ } -+ RTW_PRINT_SEL(m, "\n"); -+ } -+#endif -+ -+ RTW_PRINT_SEL(m, " R/W pointer: %d/%d\n", pbuf->tx_bak_rp, pbuf->tx_bak_wp); -+ -+ pbuf = pbuf + 1; -+ } -+ RTW_PRINT_SEL(m, "\n"); -+ } -+ _exit_critical(&pdvobjpriv->irq_th_lock, &irqL); -+ -+ return 0; -+} -+ -+ssize_t proc_set_tx_ring_ext(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ _irqL irqL; -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ char tmp[32]; -+ u32 reset = 0; -+ u32 dump = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%u %u", &dump, &reset); -+ -+ if (num != 2) { -+ RTW_INFO("invalid parameter!\n"); -+ return count; -+ } -+ -+ _enter_critical(&pdvobjpriv->irq_th_lock, &irqL); -+ pxmitpriv->dump_txbd_desc = (BOOLEAN) dump; -+ -+ if (reset == 1) -+ rtw_tx_desc_backup_reset(); -+ -+ _exit_critical(&pdvobjpriv->irq_th_lock, &irqL); -+ -+ } -+ -+ return count; -+} -+ -+#endif -+ -+#endif -+ -+#ifdef CONFIG_WOWLAN -+int proc_get_wow_enable(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *registry_pair = &padapter->registrypriv; -+ -+ RTW_PRINT_SEL(m, "wow - %s\n", (registry_pair->wowlan_enable)? "enable" : "disable"); -+ return 0; -+} -+ -+ssize_t proc_set_wow_enable(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *registry_pair = &padapter->registrypriv; -+ char tmp[8]; -+ int num = 0; -+ int mode = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) -+ num = sscanf(tmp, "%d", &mode); -+ else -+ return -EFAULT; -+ -+ if (num != 1) { -+ RTW_ERR("%s: %s - invalid parameter!\n", __func__, tmp); -+ return -EINVAL; -+ } -+ -+ if (mode == 1) { -+ RTW_PRINT("%s: wowlan - enable\n", __func__); -+ } else if (mode == 0) { -+ RTW_PRINT("%s: wowlan - disable\n", __func__); -+ } else { -+ RTW_ERR("%s: %s - invalid parameter!, mode=%d\n", -+ __func__, tmp, mode); -+ return -EINVAL; -+ } -+ -+ registry_pair->wowlan_enable = mode; -+ -+ return count; -+} -+ -+int proc_get_pattern_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ u8 val8; -+ char str_1[128]; -+ char *p_str; -+ int i = 0 , j = 0, k = 0; -+ int len = 0, max_len = 0, total = 0; -+ -+ p_str = str_1; -+ max_len = sizeof(str_1); -+ -+ total = pwrpriv->wowlan_pattern_idx; -+ -+ rtw_set_default_pattern(padapter); -+ -+ /*show pattern*/ -+ RTW_PRINT_SEL(m, "\n======[Pattern Info.]======\n"); -+ RTW_PRINT_SEL(m, "pattern number: %d\n", total); -+ RTW_PRINT_SEL(m, "support default patterns: %c\n", -+ (pwrpriv->default_patterns_en) ? 'Y' : 'N'); -+ -+ for (k = 0; k < total ; k++) { -+ RTW_PRINT_SEL(m, "\npattern idx: %d\n", k); -+ RTW_PRINT_SEL(m, "pattern content:\n"); -+ -+ p_str = str_1; -+ max_len = sizeof(str_1); -+ for (i = 0 ; i < MAX_WKFM_PATTERN_SIZE / 8 ; i++) { -+ _rtw_memset(p_str, 0, max_len); -+ len = 0; -+ for (j = 0 ; j < 8 ; j++) { -+ val8 = pwrpriv->patterns[k].content[i * 8 + j]; -+ len += snprintf(p_str + len, max_len - len, -+ "%02x ", val8); -+ } -+ RTW_PRINT_SEL(m, "%s\n", p_str); -+ } -+ RTW_PRINT_SEL(m, "\npattern mask:\n"); -+ for (i = 0 ; i < MAX_WKFM_SIZE / 8 ; i++) { -+ _rtw_memset(p_str, 0, max_len); -+ len = 0; -+ for (j = 0 ; j < 8 ; j++) { -+ val8 = pwrpriv->patterns[k].mask[i * 8 + j]; -+ len += snprintf(p_str + len, max_len - len, -+ "%02x ", val8); -+ } -+ RTW_PRINT_SEL(m, "%s\n", p_str); -+ } -+ -+ RTW_PRINT_SEL(m, "\npriv_pattern_len:\n"); -+ RTW_PRINT_SEL(m, "pattern_len: %d\n", pwrpriv->patterns[k].len); -+ RTW_PRINT_SEL(m, "*****************\n"); -+ } -+ -+ return 0; -+} -+ -+ssize_t proc_set_pattern_info(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct wowlan_ioctl_param poidparam; -+ u8 tmp[MAX_WKFM_PATTERN_STR_LEN + 1] = {0}; -+ int ret = 0; -+ u8 index = 0; -+ -+ poidparam.subcode = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count >= sizeof(tmp)) { -+ RTW_ERR("%s: pattern string is too long, count=%zu\n", -+ __func__, count); -+ return -EFAULT; -+ } -+ -+ if (pwrpriv->wowlan_pattern_idx >= MAX_WKFM_CAM_NUM) { -+ RTW_ERR("priv-pattern is full(idx: %d)\n", -+ pwrpriv->wowlan_pattern_idx); -+ RTW_ERR("please clean priv-pattern first\n"); -+ return -ENOMEM; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ if (strncmp(tmp, "clean", 5) == 0) { -+ poidparam.subcode = WOWLAN_PATTERN_CLEAN; -+ rtw_hal_set_hwreg(padapter, -+ HW_VAR_WOWLAN, (u8 *)&poidparam); -+ } else { -+ index = pwrpriv->wowlan_pattern_idx; -+ ret = rtw_wowlan_parser_pattern_cmd(tmp, -+ pwrpriv->patterns[index].content, -+ &pwrpriv->patterns[index].len, -+ pwrpriv->patterns[index].mask); -+ if (ret == _TRUE) -+ pwrpriv->wowlan_pattern_idx++; -+ } -+ } else { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ return count; -+} -+ -+int proc_get_wakeup_event(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ -+ RTW_PRINT_SEL(m, "wakeup event: %#02x\n", registry_par->wakeup_event); -+ return 0; -+} -+ -+ssize_t proc_set_wakeup_event(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ u32 wakeup_event = 0; -+ -+ u8 tmp[8] = {0}; -+ int num = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) -+ num = sscanf(tmp, "%u", &wakeup_event); -+ else -+ return -EFAULT; -+ -+ if (num == 1 && wakeup_event <= 0x0f) { -+ registry_par->wakeup_event = wakeup_event; -+ -+ if (wakeup_event & BIT(1)) -+ pwrctrlpriv->default_patterns_en = _TRUE; -+ else -+ pwrctrlpriv->default_patterns_en = _FALSE; -+ -+ rtw_wow_pattern_sw_reset(padapter); -+ -+ RTW_INFO("%s: wakeup_event: %#2x, default pattern: %d\n", -+ __func__, registry_par->wakeup_event, -+ pwrctrlpriv->default_patterns_en); -+ } else { -+ return -EINVAL; -+ } -+ -+ return count; -+} -+ -+int proc_get_wakeup_reason(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ u8 val = pwrpriv->wowlan_last_wake_reason; -+ -+ RTW_PRINT_SEL(m, "last wake reason: %#02x\n", val); -+ return 0; -+} -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+int proc_dump_wow_keep_alive_info(struct seq_file *m, void *v) { -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ int i; -+ -+ RTW_PRINT_SEL(m, "wowlan_keep_alive_mode: %d\n", pwrpriv->wowlan_keep_alive_mode); -+ RTW_PRINT_SEL(m,"LocKeepAlive: %d\n", pwrpriv->keep_alive_pattern_loc ); -+ RTW_PRINT_SEL(m, "keep_alive_pattern_len: %d\n", pwrpriv->keep_alive_pattern_len); -+ RTW_PRINT_SEL(m,"keep_alive_pattern= \n" ); -+ for (i=0 ; i < pwrpriv->keep_alive_pattern_len ; i++) { -+ RTW_PRINT_SEL(m,"[0x%x] ",pwrpriv->keep_alive_pattern[i]); -+ if(i%8 == 7) -+ RTW_PRINT_SEL(m,"\n"); -+ } -+ RTW_PRINT_SEL(m,"\n"); -+ RTW_PRINT_SEL(m," wowlan_keep_alive_period= %d ms\n", pwrpriv->wowlan_keep_alive_period*100); -+ RTW_PRINT_SEL(m," wowlan_keep_alive_retry_counter= %d\n", pwrpriv->wowlan_keep_alive_retry_counter); -+ RTW_PRINT_SEL(m," wowlan_keep_alive_retry_interval= %d ms\n", pwrpriv->wowlan_keep_alive_retry_interval*100); -+ return 0; -+} -+#endif /* CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ -+#endif /*CONFIG_WOWLAN*/ -+ -+#ifdef CONFIG_GPIO_WAKEUP -+int proc_get_wowlan_gpio_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ u8 gpio_index = pwrpriv->wowlan_gpio_index; -+ u8 gpio_output_state = pwrpriv->wowlan_gpio_output_state; -+ u8 val = pwrpriv->is_high_active; -+ -+ RTW_PRINT_SEL(m, "wakeup_gpio_idx: %d\n", gpio_index); -+#if (!defined(CONFIG_WAKEUP_GPIO_INPUT_MODE) && !defined(CONFIG_RTW_ONE_PIN_GPIO)) -+ RTW_PRINT_SEL(m, "current_gpio_output_state: %d\n", gpio_output_state); -+#endif -+ RTW_PRINT_SEL(m, "high_active: %d\n", val); -+ -+ return 0; -+} -+ -+ssize_t proc_set_wowlan_gpio_info(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ char tmp[32] = {0}; -+ int num = 0; -+ u32 is_high_active = 0; -+ u8 val8 = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ num = sscanf(tmp, "%u", &is_high_active); -+ -+ if (num != 1) { -+ RTW_INFO("Invalid format\n"); -+ return count; -+ } -+ -+ is_high_active = is_high_active == 0 ? 0 : 1; -+ -+ pwrpriv->is_high_active = is_high_active; -+ -+ rtw_ps_deny(padapter, PS_DENY_IOCTL); -+ LeaveAllPowerSaveModeDirect(padapter); -+ -+#ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE -+ if (pwrpriv->is_high_active == 0) -+ rtw_hal_set_input_gpio(padapter, pwrpriv->wowlan_gpio_index); -+ else -+ rtw_hal_set_output_gpio(padapter, pwrpriv->wowlan_gpio_index, -+ GPIO_OUTPUT_LOW); -+#else -+ val8 = (pwrpriv->is_high_active == 0) ? 1 : 0; -+ rtw_hal_switch_gpio_wl_ctrl(padapter, pwrpriv->wowlan_gpio_index, _TRUE); -+ rtw_hal_set_output_gpio(padapter, pwrpriv->wowlan_gpio_index, val8); -+#endif -+ rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); -+ -+ RTW_INFO("%s set GPIO_%d to %s_ACTIVE\n", __func__, -+ pwrpriv->wowlan_gpio_index, -+ pwrpriv->is_high_active ? "HIGH" : "LOW"); -+ } -+ -+ return count; -+} -+#endif /* CONFIG_GPIO_WAKEUP */ -+ -+#ifdef CONFIG_P2P_WOWLAN -+int proc_get_p2p_wowlan_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ struct p2p_wowlan_info peerinfo = pwdinfo->p2p_wow_info; -+ if (_TRUE == peerinfo.is_trigger) { -+ RTW_PRINT_SEL(m, "is_trigger: TRUE\n"); -+ switch (peerinfo.wowlan_recv_frame_type) { -+ case P2P_WOWLAN_RECV_NEGO_REQ: -+ RTW_PRINT_SEL(m, "Frame Type: Nego Request\n"); -+ break; -+ case P2P_WOWLAN_RECV_INVITE_REQ: -+ RTW_PRINT_SEL(m, "Frame Type: Invitation Request\n"); -+ break; -+ case P2P_WOWLAN_RECV_PROVISION_REQ: -+ RTW_PRINT_SEL(m, "Frame Type: Provision Request\n"); -+ break; -+ default: -+ break; -+ } -+ RTW_PRINT_SEL(m, "Peer Addr: "MAC_FMT"\n", MAC_ARG(peerinfo.wowlan_peer_addr)); -+ RTW_PRINT_SEL(m, "Peer WPS Config: %x\n", peerinfo.wowlan_peer_wpsconfig); -+ RTW_PRINT_SEL(m, "Persistent Group: %d\n", peerinfo.wowlan_peer_is_persistent); -+ RTW_PRINT_SEL(m, "Intivation Type: %d\n", peerinfo.wowlan_peer_invitation_type); -+ } else -+ RTW_PRINT_SEL(m, "is_trigger: False\n"); -+ return 0; -+} -+#endif /* CONFIG_P2P_WOWLAN */ -+#ifdef CONFIG_BCN_CNT_CONFIRM_HDL -+int proc_get_new_bcn_max(struct seq_file *m, void *v) -+{ -+ extern int new_bcn_max; -+ -+ RTW_PRINT_SEL(m, "%d", new_bcn_max); -+ return 0; -+} -+ -+ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[32]; -+ extern int new_bcn_max; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) -+ sscanf(tmp, "%d ", &new_bcn_max); -+ -+ return count; -+} -+#endif -+#ifdef CONFIG_POWER_SAVING -+int proc_get_ps_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ u8 ips_mode = pwrpriv->ips_mode_req; -+ u8 lps_mode = pwrpriv->power_mgnt; -+ u8 lps_level = pwrpriv->lps_level; -+#ifdef CONFIG_LPS_1T1R -+ u8 lps_1t1r = pwrpriv->lps_1t1r; -+#endif -+#ifdef CONFIG_WOWLAN -+ u8 wow_lps_mode = pwrpriv->wowlan_power_mgmt; -+ u8 wow_lps_level = pwrpriv->wowlan_lps_level; -+ #ifdef CONFIG_LPS_1T1R -+ u8 wow_lps_1t1r = pwrpriv->wowlan_lps_1t1r; -+ #endif -+#endif /* CONFIG_WOWLAN */ -+ char *str = ""; -+ -+ RTW_PRINT_SEL(m, "======Power Saving Info:======\n"); -+ RTW_PRINT_SEL(m, "*IPS:\n"); -+ -+ if (ips_mode == IPS_NORMAL) { -+#ifdef CONFIG_FWLPS_IN_IPS -+ str = "FW_LPS_IN_IPS"; -+#else -+ str = "Card Disable"; -+#endif -+ } else if (ips_mode == IPS_NONE) -+ str = "NO IPS"; -+ else if (ips_mode == IPS_LEVEL_2) -+ str = "IPS_LEVEL_2"; -+ else -+ str = "invalid ips_mode"; -+ -+ RTW_PRINT_SEL(m, " IPS mode: %s\n", str); -+ RTW_PRINT_SEL(m, " IPS enter count:%d, IPS leave count:%d\n", -+ pwrpriv->ips_enter_cnts, pwrpriv->ips_leave_cnts); -+ RTW_PRINT_SEL(m, "------------------------------\n"); -+ RTW_PRINT_SEL(m, "*LPS:\n"); -+ -+ if (lps_mode == PS_MODE_ACTIVE) -+ str = "NO LPS"; -+ else if (lps_mode == PS_MODE_MIN) -+ str = "MIN"; -+ else if (lps_mode == PS_MODE_MAX) -+ str = "MAX"; -+ else if (lps_mode == PS_MODE_DTIM) -+ str = "DTIM"; -+ else -+ sprintf(str, "%d", lps_mode); -+ -+ RTW_PRINT_SEL(m, " LPS mode: %s\n", str); -+ -+ if (pwrpriv->dtim != 0) -+ RTW_PRINT_SEL(m, " DTIM: %d\n", pwrpriv->dtim); -+ RTW_PRINT_SEL(m, " LPS enter count:%d, LPS leave count:%d\n", -+ pwrpriv->lps_enter_cnts, pwrpriv->lps_leave_cnts); -+ -+ if (lps_level == LPS_LCLK) -+ str = "LPS_LCLK"; -+ else if (lps_level == LPS_PG) -+ str = "LPS_PG"; -+ else -+ str = "LPS_NORMAL"; -+ RTW_PRINT_SEL(m, " LPS level: %s\n", str); -+ -+#ifdef CONFIG_LPS_1T1R -+ RTW_PRINT_SEL(m, " LPS 1T1R: %d\n", lps_1t1r); -+#endif -+ -+#ifdef CONFIG_WOWLAN -+ RTW_PRINT_SEL(m, "------------------------------\n"); -+ RTW_PRINT_SEL(m, "*WOW LPS:\n"); -+ -+ if (wow_lps_mode == PS_MODE_ACTIVE) -+ str = "NO LPS"; -+ else if (wow_lps_mode == PS_MODE_MIN) -+ str = "MIN"; -+ else if (wow_lps_mode == PS_MODE_MAX) -+ str = "MAX"; -+ else if (wow_lps_mode == PS_MODE_DTIM) -+ str = "DTIM"; -+ else -+ sprintf(str, "%d", wow_lps_mode); -+ -+ RTW_PRINT_SEL(m, " WOW LPS mode: %s\n", str); -+ -+ if (wow_lps_level == LPS_LCLK) -+ str = "LPS_LCLK"; -+ else if (wow_lps_level == LPS_PG) -+ str = "LPS_PG"; -+ else -+ str = "LPS_NORMAL"; -+ RTW_PRINT_SEL(m, " WOW LPS level: %s\n", str); -+ -+ #ifdef CONFIG_LPS_1T1R -+ RTW_PRINT_SEL(m, " WOW LPS 1T1R: %d\n", wow_lps_1t1r); -+ #endif -+#endif /* CONFIG_WOWLAN */ -+ -+ RTW_PRINT_SEL(m, "=============================\n"); -+ return 0; -+} -+ -+ssize_t proc_set_ps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[8]; -+ int num = 0; -+ int mode = 0; -+ int en = 0; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%d %d", &mode, &en); -+ if (num > 2) { -+ RTW_ERR("%s: invalid parameter!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ if (num == 1 && mode == 0) { -+ /* back to original LPS/IPS Mode */ -+ RTW_INFO("%s: back to original LPS/IPS Mode\n", __FUNCTION__); -+ -+ rtw_pm_set_lps(adapter, adapter->registrypriv.power_mgnt); -+ -+ rtw_pm_set_ips(adapter, adapter->registrypriv.ips_mode); -+ -+#ifdef CONFIG_WOWLAN -+ RTW_INFO("%s: back to original WOW LPS Mode\n", __FUNCTION__); -+ -+ rtw_pm_set_wow_lps(adapter, adapter->registrypriv.wow_power_mgnt); -+#endif /* CONFIG_WOWLAN */ -+ -+ goto exit; -+ } -+ -+ if (mode == 1) { -+ /* LPS */ -+ RTW_INFO("%s: LPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en); -+ if (rtw_pm_set_lps(adapter, en) != 0 ) -+ RTW_ERR("%s: invalid parameter, mode=%d, level=%d\n", __FUNCTION__, mode, en); -+ -+ } else if (mode == 2) { -+ /* IPS */ -+ RTW_INFO("%s: IPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en); -+ if (rtw_pm_set_ips(adapter, en) != 0 ) -+ RTW_ERR("%s: invalid parameter, mode=%d, level=%d\n", __FUNCTION__, mode, en); -+ } -+#ifdef CONFIG_WOWLAN -+ else if (mode == 3) { -+ /* WOW LPS */ -+ RTW_INFO("%s: WOW LPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en); -+ if (rtw_pm_set_wow_lps(adapter, en) != 0 ) -+ RTW_ERR("%s: invalid parameter, mode=%d, level=%d\n", __FUNCTION__, mode, en); -+ } -+#endif /* CONFIG_WOWLAN */ -+ else -+ RTW_ERR("%s: invalid parameter, mode = %d!\n", __FUNCTION__, mode); -+ -+exit: -+ return count; -+} -+ -+#ifdef CONFIG_WMMPS_STA -+int proc_get_wmmps_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char *uapsd_max_sp_str=""; -+ -+ if (pregpriv){ -+ switch(pregpriv->uapsd_max_sp_len) { -+ case 0: -+ uapsd_max_sp_str = "NO_LIMIT"; -+ break; -+ case 1: -+ uapsd_max_sp_str = "TWO_MSDU"; -+ break; -+ case 2: -+ uapsd_max_sp_str = "FOUR_MSDU"; -+ break; -+ case 3: -+ uapsd_max_sp_str = "SIX_MSDU"; -+ break; -+ default: -+ uapsd_max_sp_str = "UNSPECIFIED"; -+ break; -+ } -+ -+ RTW_PRINT_SEL(m, "====== WMMPS_STA Info:======\n"); -+ RTW_PRINT_SEL(m, "uapsd_max_sp_len=0x%02x (%s)\n", pregpriv->uapsd_max_sp_len, uapsd_max_sp_str); -+ RTW_PRINT_SEL(m, "uapsd_ac_enable=0x%02x\n", pregpriv->uapsd_ac_enable); -+ RTW_PRINT_SEL(m, "BIT0 - AC_VO UAPSD: %s\n", (pregpriv->uapsd_ac_enable & DRV_CFG_UAPSD_VO) ? "Enabled" : "Disabled"); -+ RTW_PRINT_SEL(m, "BIT1 - AC_VI UAPSD: %s\n", (pregpriv->uapsd_ac_enable & DRV_CFG_UAPSD_VI) ? "Enabled" : "Disabled"); -+ RTW_PRINT_SEL(m, "BIT2 - AC_BK UAPSD: %s\n", (pregpriv->uapsd_ac_enable & DRV_CFG_UAPSD_BK) ? "Enabled" : "Disabled"); -+ RTW_PRINT_SEL(m, "BIT3 - AC_BE UAPSD: %s\n", (pregpriv->uapsd_ac_enable & DRV_CFG_UAPSD_BE) ? "Enabled" : "Disabled"); -+ RTW_PRINT_SEL(m, "============================\n"); -+ } -+ -+ return 0; -+} -+ -+ssize_t proc_set_wmmps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u8 uapsd_ac_setting; -+ u8 uapsd_max_sp_len_setting; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu %hhx", &uapsd_max_sp_len_setting, &uapsd_ac_setting); -+ -+ if (pregpriv) { -+ if (num >= 1) { -+ pregpriv->uapsd_max_sp_len = uapsd_max_sp_len_setting; -+ RTW_INFO("uapsd_max_sp_len = %d\n", pregpriv->uapsd_max_sp_len); -+ } -+ -+ if (num >= 2) { -+ pregpriv->uapsd_ac_enable = uapsd_ac_setting; -+ RTW_INFO("uapsd_ac_enable = 0x%02x\n", pregpriv->uapsd_ac_enable); -+ } -+ } -+ } -+ -+ return count; -+} -+#endif /* CONFIG_WMMPS_STA */ -+#endif /* CONFIG_POWER_SAVING */ -+ -+#ifdef CONFIG_TDLS -+int proc_get_tdls_enable(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (pregpriv) -+ RTW_PRINT_SEL(m, "TDLS is %s !\n", (rtw_is_tdls_enabled(padapter) == _TRUE) ? "enabled" : "disabled"); -+ -+ return 0; -+} -+ -+ssize_t proc_set_tdls_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ char tmp[32]; -+ u32 en_tdls = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &en_tdls); -+ -+ if (num == 1 && pregpriv) { -+ if (en_tdls > 0) -+ rtw_enable_tdls_func(padapter); -+ else -+ rtw_disable_tdls_func(padapter, _TRUE); -+ } -+ } -+ -+ return count; -+} -+ -+static int proc_tdls_display_tdls_function_info(struct seq_file *m) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ u8 SpaceBtwnItemAndValue = TDLS_DBG_INFO_SPACE_BTWN_ITEM_AND_VALUE; -+ u8 SpaceBtwnItemAndValueTmp = 0; -+ BOOLEAN FirstMatchFound = _FALSE; -+ int j = 0; -+ -+ RTW_PRINT_SEL(m, "============[TDLS Function Info]============\n"); -+ RTW_PRINT_SEL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Enable", (rtw_is_tdls_enabled(padapter) == _TRUE) ? "_TRUE" : "_FALSE"); -+ RTW_PRINT_SEL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Driver Setup", (ptdlsinfo->driver_setup == _TRUE) ? "_TRUE" : "_FALSE"); -+ RTW_PRINT_SEL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Prohibited", (ptdlsinfo->ap_prohibited == _TRUE) ? "_TRUE" : "_FALSE"); -+ RTW_PRINT_SEL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Channel Switch Prohibited", (ptdlsinfo->ch_switch_prohibited == _TRUE) ? "_TRUE" : "_FALSE"); -+ RTW_PRINT_SEL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Link Established", (ptdlsinfo->link_established == _TRUE) ? "_TRUE" : "_FALSE"); -+ RTW_PRINT_SEL(m, "%-*s = %d/%d\n", SpaceBtwnItemAndValue, "TDLS STA Num (Linked/Allowed)", ptdlsinfo->sta_cnt, MAX_ALLOWED_TDLS_STA_NUM); -+ RTW_PRINT_SEL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Allowed STA Num Reached", (ptdlsinfo->sta_maximum == _TRUE) ? "_TRUE" : "_FALSE"); -+ -+#ifdef CONFIG_TDLS_CH_SW -+ RTW_PRINT_SEL(m, "%-*s =", SpaceBtwnItemAndValue, "TDLS CH SW State"); -+ if (ptdlsinfo->chsw_info.ch_sw_state == TDLS_STATE_NONE) -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_STATE_NONE"); -+ else { -+ for (j = 0; j < 32; j++) { -+ if (ptdlsinfo->chsw_info.ch_sw_state & BIT(j)) { -+ if (FirstMatchFound == _FALSE) { -+ SpaceBtwnItemAndValueTmp = 1; -+ FirstMatchFound = _TRUE; -+ } else -+ SpaceBtwnItemAndValueTmp = SpaceBtwnItemAndValue + 3; -+ switch (BIT(j)) { -+ case TDLS_INITIATOR_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_INITIATOR_STATE"); -+ break; -+ case TDLS_RESPONDER_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_RESPONDER_STATE"); -+ break; -+ case TDLS_LINKED_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_LINKED_STATE"); -+ break; -+ case TDLS_WAIT_PTR_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_WAIT_PTR_STATE"); -+ break; -+ case TDLS_ALIVE_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_ALIVE_STATE"); -+ break; -+ case TDLS_CH_SWITCH_ON_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_CH_SWITCH_ON_STATE"); -+ break; -+ case TDLS_PEER_AT_OFF_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_PEER_AT_OFF_STATE"); -+ break; -+ case TDLS_CH_SW_INITIATOR_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_CH_SW_INITIATOR_STATE"); -+ break; -+ case TDLS_WAIT_CH_RSP_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValue, " ", "TDLS_WAIT_CH_RSP_STATE"); -+ break; -+ default: -+ RTW_PRINT_SEL(m, "%-*sBIT(%d)\n", SpaceBtwnItemAndValueTmp, " ", j); -+ break; -+ } -+ } -+ } -+ } -+ -+ RTW_PRINT_SEL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS CH SW On", (ATOMIC_READ(&ptdlsinfo->chsw_info.chsw_on) == _TRUE) ? "_TRUE" : "_FALSE"); -+ RTW_PRINT_SEL(m, "%-*s = %d\n", SpaceBtwnItemAndValue, "TDLS CH SW Off-Channel Num", ptdlsinfo->chsw_info.off_ch_num); -+ RTW_PRINT_SEL(m, "%-*s = %d\n", SpaceBtwnItemAndValue, "TDLS CH SW Channel Offset", ptdlsinfo->chsw_info.ch_offset); -+ RTW_PRINT_SEL(m, "%-*s = %d\n", SpaceBtwnItemAndValue, "TDLS CH SW Current Time", ptdlsinfo->chsw_info.cur_time); -+ RTW_PRINT_SEL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS CH SW Delay Switch Back", (ptdlsinfo->chsw_info.delay_switch_back == _TRUE) ? "_TRUE" : "_FALSE"); -+ RTW_PRINT_SEL(m, "%-*s = %d\n", SpaceBtwnItemAndValue, "TDLS CH SW Dump Back", ptdlsinfo->chsw_info.dump_stack); -+#endif -+ -+ RTW_PRINT_SEL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "TDLS Device Discovered", (ptdlsinfo->dev_discovered == _TRUE) ? "_TRUE" : "_FALSE"); -+ -+ return 0; -+} -+ -+static int proc_tdls_display_network_info(struct seq_file *m) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ int i = 0; -+ u8 SpaceBtwnItemAndValue = TDLS_DBG_INFO_SPACE_BTWN_ITEM_AND_VALUE; -+ -+ /* Display the linked AP/GO info */ -+ RTW_PRINT_SEL(m, "============[Associated AP/GO Info]============\n"); -+ -+ if ((pmlmepriv->fw_state & WIFI_STATION_STATE) && (pmlmepriv->fw_state & WIFI_ASOC_STATE)) { -+ RTW_PRINT_SEL(m, "%-*s = %s\n", SpaceBtwnItemAndValue, "BSSID", cur_network->network.Ssid.Ssid); -+ RTW_PRINT_SEL(m, "%-*s = "MAC_FMT"\n", SpaceBtwnItemAndValue, "Mac Address", MAC_ARG(cur_network->network.MacAddress)); -+ -+ RTW_PRINT_SEL(m, "%-*s = ", SpaceBtwnItemAndValue, "Wireless Mode"); -+ for (i = 0; i < 8; i++) { -+ if (pmlmeext->cur_wireless_mode & BIT(i)) { -+ switch (BIT(i)) { -+ case WIRELESS_11B: -+ RTW_PRINT_SEL(m, "%4s", "11B "); -+ break; -+ case WIRELESS_11G: -+ RTW_PRINT_SEL(m, "%4s", "11G "); -+ break; -+ case WIRELESS_11A: -+ RTW_PRINT_SEL(m, "%4s", "11A "); -+ break; -+ case WIRELESS_11_24N: -+ RTW_PRINT_SEL(m, "%7s", "11_24N "); -+ break; -+ case WIRELESS_11_5N: -+ RTW_PRINT_SEL(m, "%6s", "11_5N "); -+ break; -+ case WIRELESS_AUTO: -+ RTW_PRINT_SEL(m, "%5s", "AUTO "); -+ break; -+ case WIRELESS_11AC: -+ RTW_PRINT_SEL(m, "%5s", "11AC "); -+ break; -+ } -+ } -+ } -+ RTW_PRINT_SEL(m, "\n"); -+ -+ RTW_PRINT_SEL(m, "%-*s = ", SpaceBtwnItemAndValue, "Privacy"); -+ switch (padapter->securitypriv.dot11PrivacyAlgrthm) { -+ case _NO_PRIVACY_: -+ RTW_PRINT_SEL(m, "%s\n", "NO PRIVACY"); -+ break; -+ case _WEP40_: -+ RTW_PRINT_SEL(m, "%s\n", "WEP 40"); -+ break; -+ case _TKIP_: -+ RTW_PRINT_SEL(m, "%s\n", "TKIP"); -+ break; -+ case _TKIP_WTMIC_: -+ RTW_PRINT_SEL(m, "%s\n", "TKIP WTMIC"); -+ break; -+ case _AES_: -+ RTW_PRINT_SEL(m, "%s\n", "AES"); -+ break; -+ case _WEP104_: -+ RTW_PRINT_SEL(m, "%s\n", "WEP 104"); -+ break; -+#if 0 /* no this setting */ -+ case _WEP_WPA_MIXED_: -+ RTW_PRINT_SEL(m, "%s\n", "WEP/WPA Mixed"); -+ break; -+#endif -+ case _SMS4_: -+ RTW_PRINT_SEL(m, "%s\n", "SMS4"); -+ break; -+#ifdef CONFIG_IEEE80211W -+ case _BIP_CMAC_128_: -+ RTW_PRINT_SEL(m, "%s\n", "BIP"); -+ break; -+#endif /* CONFIG_IEEE80211W */ -+ } -+ -+ RTW_PRINT_SEL(m, "%-*s = %d\n", SpaceBtwnItemAndValue, "Channel", pmlmeext->cur_channel); -+ RTW_PRINT_SEL(m, "%-*s = ", SpaceBtwnItemAndValue, "Channel Offset"); -+ switch (pmlmeext->cur_ch_offset) { -+ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: -+ RTW_PRINT_SEL(m, "%s\n", "N/A"); -+ break; -+ case HAL_PRIME_CHNL_OFFSET_LOWER: -+ RTW_PRINT_SEL(m, "%s\n", "Lower"); -+ break; -+ case HAL_PRIME_CHNL_OFFSET_UPPER: -+ RTW_PRINT_SEL(m, "%s\n", "Upper"); -+ break; -+ } -+ -+ RTW_PRINT_SEL(m, "%-*s = ", SpaceBtwnItemAndValue, "Bandwidth Mode"); -+ switch (pmlmeext->cur_bwmode) { -+ case CHANNEL_WIDTH_20: -+ RTW_PRINT_SEL(m, "%s\n", "20MHz"); -+ break; -+ case CHANNEL_WIDTH_40: -+ RTW_PRINT_SEL(m, "%s\n", "40MHz"); -+ break; -+ case CHANNEL_WIDTH_80: -+ RTW_PRINT_SEL(m, "%s\n", "80MHz"); -+ break; -+ case CHANNEL_WIDTH_160: -+ RTW_PRINT_SEL(m, "%s\n", "160MHz"); -+ break; -+ case CHANNEL_WIDTH_80_80: -+ RTW_PRINT_SEL(m, "%s\n", "80MHz + 80MHz"); -+ break; -+ } -+ } else -+ RTW_PRINT_SEL(m, "No association with AP/GO exists!\n"); -+ -+ return 0; -+} -+ -+static int proc_tdls_display_tdls_sta_info(struct seq_file *m) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct sta_info *psta; -+ int i = 0, j = 0; -+ _irqL irqL; -+ _list *plist, *phead; -+ u8 SpaceBtwnItemAndValue = TDLS_DBG_INFO_SPACE_BTWN_ITEM_AND_VALUE; -+ u8 SpaceBtwnItemAndValueTmp = 0; -+ u8 NumOfTdlsStaToShow = 0; -+ BOOLEAN FirstMatchFound = _FALSE; -+ -+ /* Search for TDLS sta info to display */ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ if (psta->tdls_sta_state != TDLS_STATE_NONE) { -+ /* We got one TDLS sta info to show */ -+ RTW_PRINT_SEL(m, "============[TDLS Peer STA Info: STA %d]============\n", ++NumOfTdlsStaToShow); -+ RTW_PRINT_SEL(m, "%-*s = "MAC_FMT"\n", SpaceBtwnItemAndValue, "Mac Address", MAC_ARG(psta->cmn.mac_addr)); -+ RTW_PRINT_SEL(m, "%-*s =", SpaceBtwnItemAndValue, "TDLS STA State"); -+ SpaceBtwnItemAndValueTmp = 0; -+ FirstMatchFound = _FALSE; -+ for (j = 0; j < 32; j++) { -+ if (psta->tdls_sta_state & BIT(j)) { -+ if (FirstMatchFound == _FALSE) { -+ SpaceBtwnItemAndValueTmp = 1; -+ FirstMatchFound = _TRUE; -+ } else -+ SpaceBtwnItemAndValueTmp = SpaceBtwnItemAndValue + 3; -+ switch (BIT(j)) { -+ case TDLS_INITIATOR_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_INITIATOR_STATE"); -+ break; -+ case TDLS_RESPONDER_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_RESPONDER_STATE"); -+ break; -+ case TDLS_LINKED_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_LINKED_STATE"); -+ break; -+ case TDLS_WAIT_PTR_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_WAIT_PTR_STATE"); -+ break; -+ case TDLS_ALIVE_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_ALIVE_STATE"); -+ break; -+ case TDLS_CH_SWITCH_ON_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_CH_SWITCH_ON_STATE"); -+ break; -+ case TDLS_PEER_AT_OFF_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_PEER_AT_OFF_STATE"); -+ break; -+ case TDLS_CH_SW_INITIATOR_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValueTmp, " ", "TDLS_CH_SW_INITIATOR_STATE"); -+ break; -+ case TDLS_WAIT_CH_RSP_STATE: -+ RTW_PRINT_SEL(m, "%-*s%s\n", SpaceBtwnItemAndValue, " ", "TDLS_WAIT_CH_RSP_STATE"); -+ break; -+ default: -+ RTW_PRINT_SEL(m, "%-*sBIT(%d)\n", SpaceBtwnItemAndValueTmp, " ", j); -+ break; -+ } -+ } -+ } -+ -+ RTW_PRINT_SEL(m, "%-*s = ", SpaceBtwnItemAndValue, "Wireless Mode"); -+ for (j = 0; j < 8; j++) { -+ if (psta->wireless_mode & BIT(j)) { -+ switch (BIT(j)) { -+ case WIRELESS_11B: -+ RTW_PRINT_SEL(m, "%4s", "11B "); -+ break; -+ case WIRELESS_11G: -+ RTW_PRINT_SEL(m, "%4s", "11G "); -+ break; -+ case WIRELESS_11A: -+ RTW_PRINT_SEL(m, "%4s", "11A "); -+ break; -+ case WIRELESS_11_24N: -+ RTW_PRINT_SEL(m, "%7s", "11_24N "); -+ break; -+ case WIRELESS_11_5N: -+ RTW_PRINT_SEL(m, "%6s", "11_5N "); -+ break; -+ case WIRELESS_AUTO: -+ RTW_PRINT_SEL(m, "%5s", "AUTO "); -+ break; -+ case WIRELESS_11AC: -+ RTW_PRINT_SEL(m, "%5s", "11AC "); -+ break; -+ } -+ } -+ } -+ RTW_PRINT_SEL(m, "\n"); -+ -+ RTW_PRINT_SEL(m, "%-*s = ", SpaceBtwnItemAndValue, "Bandwidth Mode"); -+ switch (psta->cmn.bw_mode) { -+ case CHANNEL_WIDTH_20: -+ RTW_PRINT_SEL(m, "%s\n", "20MHz"); -+ break; -+ case CHANNEL_WIDTH_40: -+ RTW_PRINT_SEL(m, "%s\n", "40MHz"); -+ break; -+ case CHANNEL_WIDTH_80: -+ RTW_PRINT_SEL(m, "%s\n", "80MHz"); -+ break; -+ case CHANNEL_WIDTH_160: -+ RTW_PRINT_SEL(m, "%s\n", "160MHz"); -+ break; -+ case CHANNEL_WIDTH_80_80: -+ RTW_PRINT_SEL(m, "%s\n", "80MHz + 80MHz"); -+ break; -+ case CHANNEL_WIDTH_5: -+ RTW_PRINT_SEL(m, "%s\n", "5MHz"); -+ break; -+ case CHANNEL_WIDTH_10: -+ RTW_PRINT_SEL(m, "%s\n", "10MHz"); -+ break; -+ default: -+ RTW_PRINT_SEL(m, "(%d)%s\n", psta->cmn.bw_mode, "invalid"); -+ break; -+ } -+ -+ RTW_PRINT_SEL(m, "%-*s = ", SpaceBtwnItemAndValue, "Privacy"); -+ switch (psta->dot118021XPrivacy) { -+ case _NO_PRIVACY_: -+ RTW_PRINT_SEL(m, "%s\n", "NO PRIVACY"); -+ break; -+ case _WEP40_: -+ RTW_PRINT_SEL(m, "%s\n", "WEP 40"); -+ break; -+ case _TKIP_: -+ RTW_PRINT_SEL(m, "%s\n", "TKIP"); -+ break; -+ case _TKIP_WTMIC_: -+ RTW_PRINT_SEL(m, "%s\n", "TKIP WTMIC"); -+ break; -+ case _AES_: -+ RTW_PRINT_SEL(m, "%s\n", "AES"); -+ break; -+ case _WEP104_: -+ RTW_PRINT_SEL(m, "%s\n", "WEP 104"); -+ break; -+#if 0 /* no this setting */ -+ case _WEP_WPA_MIXED_: -+ RTW_PRINT_SEL(m, "%s\n", "WEP/WPA Mixed"); -+ break; -+#endif -+ case _SMS4_: -+ RTW_PRINT_SEL(m, "%s\n", "SMS4"); -+ break; -+#ifdef CONFIG_IEEE80211W -+ case _BIP_CMAC_128_: -+ RTW_PRINT_SEL(m, "%s\n", "BIP"); -+ break; -+#endif /* CONFIG_IEEE80211W */ -+ } -+ -+ RTW_PRINT_SEL(m, "%-*s = %d sec/%d sec\n", SpaceBtwnItemAndValue, "TPK Lifetime (Current/Expire)", psta->TPK_count, psta->TDLS_PeerKey_Lifetime); -+ RTW_PRINT_SEL(m, "%-*s = %llu\n", SpaceBtwnItemAndValue, "Tx Packets Over Direct Link", psta->sta_stats.tx_pkts); -+ RTW_PRINT_SEL(m, "%-*s = %llu\n", SpaceBtwnItemAndValue, "Rx Packets Over Direct Link", psta->sta_stats.rx_data_pkts); -+ } -+ } -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ if (NumOfTdlsStaToShow == 0) { -+ RTW_PRINT_SEL(m, "============[TDLS Peer STA Info]============\n"); -+ RTW_PRINT_SEL(m, "No TDLS direct link exists!\n"); -+ } -+ -+ return 0; -+} -+ -+int proc_get_tdls_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct sta_info *psta; -+ int i = 0, j = 0; -+ _irqL irqL; -+ _list *plist, *phead; -+ u8 SpaceBtwnItemAndValue = 41; -+ u8 SpaceBtwnItemAndValueTmp = 0; -+ u8 NumOfTdlsStaToShow = 0; -+ BOOLEAN FirstMatchFound = _FALSE; -+ -+ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { -+ RTW_PRINT_SEL(m, "No tdls info can be shown since hal doesn't support tdls\n"); -+ return 0; -+ } -+ -+ proc_tdls_display_tdls_function_info(m); -+ proc_tdls_display_network_info(m); -+ proc_tdls_display_tdls_sta_info(m); -+ -+ return 0; -+} -+#endif -+ -+int proc_get_monitor(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ if (MLME_IS_MONITOR(padapter)) { -+ RTW_PRINT_SEL(m, "Monitor mode : Enable\n"); -+ RTW_PRINT_SEL(m, "Device type : %u\n", dev->type); -+ -+ RTW_PRINT_SEL(m, "ch=%d, ch_offset=%d, bw=%d\n", -+ rtw_get_oper_ch(padapter), -+ rtw_get_oper_choffset(padapter), -+ rtw_get_oper_bw(padapter)); -+ } else -+ RTW_PRINT_SEL(m, "Monitor mode : Disable\n"); -+ -+ return 0; -+} -+ -+ssize_t proc_set_monitor(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[32]; -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u16 target_type; -+ u8 target_ch, target_offset, target_bw; -+ -+ if (count < 3) { -+ RTW_INFO("argument size is less than 3\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = 0; -+ -+ num = sscanf(tmp, "type %hu", &target_type); -+ if ((num == 1) && -+ ((target_type != ARPHRD_IEEE80211) && -+ (target_type != ARPHRD_IEEE80211_RADIOTAP))) { -+ dev->type = ARPHRD_IEEE80211_RADIOTAP; -+ return count; -+ } -+ -+ num = sscanf(tmp, "%hhu %hhu %hhu", &target_ch, &target_offset, &target_bw); -+ if (num != 3) { -+ RTW_INFO("invalid write_reg parameter!\n"); -+ return count; -+ } -+ -+ padapter->mlmeextpriv.cur_channel = target_ch; -+ set_channel_bwmode(padapter, target_ch, target_offset, target_bw); -+ } -+ -+ return count; -+} -+ -+#ifdef RTW_SIMPLE_CONFIG -+/* For RtwSimleConfig */ -+int proc_get_simple_config(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "RTW Simple Config : %s\n", padapter->rtw_simple_config ? "Enable" : "Disable"); -+ -+ return 0; -+} -+ -+ssize_t proc_set_simple_config(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[32]; -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 ret; -+ -+ if (count < 1) { -+ RTW_INFO("argument size is less than 1\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%hhd", &ret); -+ -+ padapter->rtw_simple_config = ret ? _TRUE : _FALSE; -+ } -+ -+ return count; -+} -+#endif -+ -+#ifdef DBG_XMIT_BLOCK -+int proc_get_xmit_block(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_xmit_block(m, padapter); -+ -+ return 0; -+} -+ -+ssize_t proc_set_xmit_block(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 xb_mode, xb_reason; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx %hhx", &xb_mode, &xb_reason); -+ -+ if (num != 2) { -+ RTW_INFO("invalid parameter!\n"); -+ return count; -+ } -+ -+ if (xb_mode == 0)/*set*/ -+ rtw_set_xmit_block(padapter, xb_reason); -+ else if (xb_mode == 1)/*clear*/ -+ rtw_clr_xmit_block(padapter, xb_reason); -+ else -+ RTW_INFO("invalid parameter!\n"); -+ } -+ -+ return count; -+} -+#endif -+ -+#include -+int proc_get_efuse_map(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; -+ int i, j; -+ u8 ips_mode = IPS_NUM; -+ u16 mapLen; -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); -+ if (mapLen > EFUSE_MAX_MAP_LEN) -+ mapLen = EFUSE_MAX_MAP_LEN; -+ -+ ips_mode = pwrctrlpriv->ips_mode; -+ rtw_pm_set_ips(padapter, IPS_NONE); -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+ if (pHalData->efuse_file_status == EFUSE_FILE_LOADED) { -+ RTW_PRINT_SEL(m, "File eFuse Map loaded! file path:%s\nDriver eFuse Map From File\n", EFUSE_MAP_PATH); -+ if (pHalData->bautoload_fail_flag) -+ RTW_PRINT_SEL(m, "File Autoload fail!!!\n"); -+ } else if (pHalData->efuse_file_status == EFUSE_FILE_FAILED) { -+ RTW_PRINT_SEL(m, "Open File eFuse Map Fail ! file path:%s\nDriver eFuse Map From Default\n", EFUSE_MAP_PATH); -+ if (pHalData->bautoload_fail_flag) -+ RTW_PRINT_SEL(m, "HW Autoload fail!!!\n"); -+ } else -+#endif -+ -+ { -+ RTW_PRINT_SEL(m, "Driver eFuse Map From HW\n"); -+ if (pHalData->bautoload_fail_flag) -+ RTW_PRINT_SEL(m, "HW Autoload fail!!!\n"); -+ } -+ for (i = 0; i < mapLen; i += 16) { -+ RTW_PRINT_SEL(m, "0x%02x\t", i); -+ for (j = 0; j < 8; j++) -+ RTW_PRINT_SEL(m, "%02X ", pHalData->efuse_eeprom_data[i + j]); -+ RTW_PRINT_SEL(m, "\t"); -+ for (; j < 16; j++) -+ RTW_PRINT_SEL(m, "%02X ", pHalData->efuse_eeprom_data[i + j]); -+ RTW_PRINT_SEL(m, "\n"); -+ } -+ -+ if (rtw_efuse_map_read(padapter, 0, mapLen, pEfuseHal->fakeEfuseInitMap) == _FAIL) { -+ RTW_PRINT_SEL(m, "WARN - Read Realmap Failed\n"); -+ return 0; -+ } -+ -+ RTW_PRINT_SEL(m, "\n"); -+ RTW_PRINT_SEL(m, "HW eFuse Map\n"); -+ for (i = 0; i < mapLen; i += 16) { -+ RTW_PRINT_SEL(m, "0x%02x\t", i); -+ for (j = 0; j < 8; j++) -+ RTW_PRINT_SEL(m, "%02X ", pEfuseHal->fakeEfuseInitMap[i + j]); -+ RTW_PRINT_SEL(m, "\t"); -+ for (; j < 16; j++) -+ RTW_PRINT_SEL(m, "%02X ", pEfuseHal->fakeEfuseInitMap[i + j]); -+ RTW_PRINT_SEL(m, "\n"); -+ } -+ -+ rtw_pm_set_ips(padapter, ips_mode); -+ -+ return 0; -+} -+ -+ssize_t proc_set_efuse_map(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+#if 0 -+ char tmp[256] = {0}; -+ u32 addr, cnts; -+ u8 efuse_data; -+ -+ int jj, kk; -+ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ u8 ips_mode = IPS_NUM; -+ -+ if (count < 3) { -+ RTW_INFO("argument size is less than 3\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%x %d %x", &addr, &cnts, &efuse_data); -+ -+ if (num != 3) { -+ RTW_INFO("invalid write_reg parameter!\n"); -+ return count; -+ } -+ } -+ ips_mode = pwrctrlpriv->ips_mode; -+ rtw_pm_set_ips(padapter, IPS_NONE); -+ if (rtw_efuse_map_write(padapter, addr, cnts, &efuse_data) == _FAIL) -+ RTW_INFO("WARN - rtw_efuse_map_write error!!\n"); -+ rtw_pm_set_ips(padapter, ips_mode); -+#endif -+ return count; -+} -+ -+#ifdef CONFIG_IEEE80211W -+ssize_t proc_set_tx_sa_query(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ struct sta_info *psta; -+ _list *plist, *phead; -+ _irqL irqL; -+ char tmp[16]; -+ u8 mac_addr[NUM_STA][ETH_ALEN]; -+ u32 key_type; -+ u8 index; -+ -+ if (count > 2) { -+ RTW_INFO("argument size is more than 2\n"); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { -+ -+ int num = sscanf(tmp, "%x", &key_type); -+ -+ if (num != 1) { -+ RTW_INFO("invalid read_reg parameter!\n"); -+ return count; -+ } -+ RTW_INFO("0: set sa query request , key_type=%d\n", key_type); -+ } -+ -+ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) -+ && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) && SEC_IS_BIP_KEY_INSTALLED(&padapter->securitypriv) == _TRUE) { -+ RTW_INFO("STA:"MAC_FMT"\n", MAC_ARG(get_my_bssid(&(pmlmeinfo->network)))); -+ /* TX unicast sa_query to AP */ -+ issue_action_SA_Query(padapter, get_my_bssid(&(pmlmeinfo->network)), 0, 0, (u8)key_type); -+ } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE && SEC_IS_BIP_KEY_INSTALLED(&padapter->securitypriv) == _TRUE) { -+ /* TX unicast sa_query to every client STA */ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (index = 0; index < NUM_STA; index++) { -+ psta = NULL; -+ -+ phead = &(pstapriv->sta_hash[index]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ _rtw_memcpy(&mac_addr[psta->cmn.mac_id][0], psta->cmn.mac_addr, ETH_ALEN); -+ } -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (index = 0; index < macid_ctl->num && index < NUM_STA; index++) { -+ if (rtw_macid_is_used(macid_ctl, index) && !rtw_macid_is_bmc(macid_ctl, index)) { -+ if (!_rtw_memcmp(get_my_bssid(&(pmlmeinfo->network)), &mac_addr[index][0], ETH_ALEN) -+ && !IS_MCAST(&mac_addr[index][0])) { -+ issue_action_SA_Query(padapter, &mac_addr[index][0], 0, 0, (u8)key_type); -+ RTW_INFO("STA[%u]:"MAC_FMT"\n", index , MAC_ARG(&mac_addr[index][0])); -+ } -+ } -+ } -+ } -+ -+ return count; -+} -+ -+int proc_get_tx_sa_query(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "%s\n", __func__); -+ return 0; -+} -+ -+ssize_t proc_set_tx_deauth(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ struct sta_info *psta; -+ _list *plist, *phead; -+ _irqL irqL; -+ char tmp[16]; -+ u8 mac_addr[NUM_STA][ETH_ALEN]; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u32 key_type; -+ u8 index; -+ -+ -+ if (count > 2) { -+ RTW_INFO("argument size is more than 2\n"); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { -+ -+ int num = sscanf(tmp, "%x", &key_type); -+ -+ if (num != 1) { -+ RTW_INFO("invalid read_reg parameter!\n"); -+ return count; -+ } -+ RTW_INFO("key_type=%d\n", key_type); -+ } -+ if (key_type < 0 || key_type > 4) -+ return count; -+ -+ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) -+ && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) { -+ if (key_type == 3) /* key_type 3 only for AP mode */ -+ return count; -+ /* TX unicast deauth to AP */ -+ issue_deauth_11w(padapter, get_my_bssid(&(pmlmeinfo->network)), 0, (u8)key_type); -+#ifdef CONFIG_AP_MODE -+ } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { -+ u8 updated = _FALSE; -+ -+ if (key_type == 3) -+ issue_deauth_11w(padapter, bc_addr, 0, IEEE80211W_RIGHT_KEY); -+ -+ /* TX unicast deauth to every client STA */ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (index = 0; index < NUM_STA; index++) { -+ psta = NULL; -+ -+ phead = &(pstapriv->sta_hash[index]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ _rtw_memcpy(&mac_addr[psta->cmn.mac_id][0], psta->cmn.mac_addr, ETH_ALEN); -+ } -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (index = 0; index < macid_ctl->num && index < NUM_STA; index++) { -+ if (rtw_macid_is_used(macid_ctl, index) && !rtw_macid_is_bmc(macid_ctl, index)) { -+ if (!_rtw_memcmp(get_my_bssid(&(pmlmeinfo->network)), &mac_addr[index][0], ETH_ALEN)) { -+ if (key_type != 3) -+ issue_deauth_11w(padapter, &mac_addr[index][0], 0, (u8)key_type); -+ -+ psta = rtw_get_stainfo(pstapriv, &mac_addr[index][0]); -+ if (psta && key_type != IEEE80211W_WRONG_KEY && key_type != IEEE80211W_NO_KEY) { -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) { -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (psta->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt--; -+ #endif -+ updated |= ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE); -+ -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ } -+ -+ RTW_INFO("STA[%u]:"MAC_FMT"\n", index , MAC_ARG(&mac_addr[index][0])); -+ } -+ } -+ } -+ -+ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); -+#endif /* CONFIG_AP_MODE */ -+ } -+ -+ return count; -+} -+ -+int proc_get_tx_deauth(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "%s\n", __func__); -+ return 0; -+} -+ -+ssize_t proc_set_tx_auth(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ struct sta_info *psta; -+ _list *plist, *phead; -+ _irqL irqL; -+ char tmp[16]; -+ u8 mac_addr[NUM_STA][ETH_ALEN]; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u32 tx_auth; -+ u8 index; -+ -+ -+ if (count > 2) { -+ RTW_INFO("argument size is more than 2\n"); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { -+ -+ int num = sscanf(tmp, "%x", &tx_auth); -+ -+ if (num != 1) { -+ RTW_INFO("invalid read_reg parameter!\n"); -+ return count; -+ } -+ RTW_INFO("1: setnd auth, 2: send assoc request. tx_auth=%d\n", tx_auth); -+ } -+ -+ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) -+ && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) { -+ if (tx_auth == 1) { -+ /* TX unicast auth to AP */ -+ issue_auth(padapter, NULL, 0); -+ } else if (tx_auth == 2) { -+ /* TX unicast auth to AP */ -+ issue_assocreq(padapter); -+ } -+ } -+ -+ return count; -+} -+ -+int proc_get_tx_auth(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "%s\n", __func__); -+ return 0; -+} -+#endif /* CONFIG_IEEE80211W */ -+ -+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA -+static u32 phase_idx; -+int proc_get_pathb_phase(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "PathB phase index =%d\n", phase_idx); -+ return 0; -+} -+ -+ssize_t proc_set_pathb_phase(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ int num; -+ u32 tmp_idx; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ num = sscanf(tmp, "%u", &tmp_idx); -+ if ((tmp_idx < 0) || (tmp_idx > 11)) { -+ RTW_INFO(FUNC_ADPT_FMT "Invalid input value\n", FUNC_ADPT_ARG(padapter)); -+ return count; -+ } -+ phase_idx = tmp_idx; -+ rtw_hal_set_pathb_phase(padapter, phase_idx); -+ } -+ return count; -+} -+#endif -+ -+#ifdef CONFIG_MCC_MODE -+int proc_get_mcc_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_adapters_status(m, adapter_to_dvobj(adapter)); -+ rtw_hal_dump_mcc_info(m, adapter_to_dvobj(adapter)); -+ return 0; -+} -+ -+int proc_get_mcc_policy_table(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_hal_dump_mcc_policy_table(m); -+ return 0; -+} -+ -+ssize_t proc_set_mcc_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ u32 en_mcc = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ _adapter *iface = NULL; -+ u8 i = 0; -+ int num = sscanf(tmp, "%u", &en_mcc); -+ -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ RTW_INFO("%s: en_mcc = %d\n", __func__, en_mcc); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ iface->registrypriv.en_mcc = en_mcc; -+ } -+ } -+ -+ return count; -+} -+ -+ssize_t proc_set_mcc_duration(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ u32 enable_runtime_duration = 0, mcc_duration = 0, type = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u %u %u", &enable_runtime_duration, &type, &mcc_duration); -+ -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ if (num > 3) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters > 2\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ if (num == 2) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters > 2\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ if (num >= 1) { -+ SET_MCC_RUNTIME_DURATION(padapter, enable_runtime_duration); -+ RTW_INFO("runtime duration:%s\n", enable_runtime_duration ? "enable":"disable"); -+ } -+ -+ if (num == 3) { -+ RTW_INFO("type:%d, mcc duration:%d\n", type, mcc_duration); -+ rtw_set_mcc_duration_cmd(padapter, type, mcc_duration); -+ } -+ } -+ -+ return count; -+} -+ -+#ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ssize_t proc_set_mcc_phydm_offload_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ u32 mcc_phydm_enable = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ u8 i = 0; -+ int num = sscanf(tmp, "%u", &mcc_phydm_enable); -+ -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ RTW_INFO("%s: mcc phydm enable = %d\n", __func__, mcc_phydm_enable); -+ rtw_set_mcc_phydm_offload_enable_cmd(padapter, mcc_phydm_enable, _TRUE); -+ } -+ -+ return count; -+} -+#endif -+ -+ssize_t proc_set_mcc_single_tx_criteria(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ u32 mcc_single_tx_criteria = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ _adapter *iface = NULL; -+ u8 i = 0; -+ int num = sscanf(tmp, "%u", &mcc_single_tx_criteria); -+ -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ RTW_INFO("%s: mcc_single_tx_criteria = %d\n", __func__, mcc_single_tx_criteria); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ iface->registrypriv.rtw_mcc_single_tx_cri = mcc_single_tx_criteria; -+ } -+ -+ -+ } -+ -+ return count; -+} -+ -+ -+ssize_t proc_set_mcc_ap_bw20_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ u32 mcc_ap_bw20_target_tp = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u", &mcc_ap_bw20_target_tp); -+ -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ RTW_INFO("%s: mcc_ap_bw20_target_tp = %d\n", __func__, mcc_ap_bw20_target_tp); -+ -+ padapter->registrypriv.rtw_mcc_ap_bw20_target_tx_tp = mcc_ap_bw20_target_tp; -+ -+ -+ } -+ -+ return count; -+} -+ -+ssize_t proc_set_mcc_ap_bw40_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ u32 mcc_ap_bw40_target_tp = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u", &mcc_ap_bw40_target_tp); -+ -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ RTW_INFO("%s: mcc_ap_bw40_target_tp = %d\n", __func__, mcc_ap_bw40_target_tp); -+ -+ padapter->registrypriv.rtw_mcc_ap_bw40_target_tx_tp = mcc_ap_bw40_target_tp; -+ -+ -+ } -+ -+ return count; -+} -+ -+ssize_t proc_set_mcc_ap_bw80_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ u32 mcc_ap_bw80_target_tp = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u", &mcc_ap_bw80_target_tp); -+ -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ RTW_INFO("%s: mcc_ap_bw80_target_tp = %d\n", __func__, mcc_ap_bw80_target_tp); -+ -+ padapter->registrypriv.rtw_mcc_ap_bw80_target_tx_tp = mcc_ap_bw80_target_tp; -+ -+ -+ } -+ -+ return count; -+} -+ -+ssize_t proc_set_mcc_sta_bw20_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ u32 mcc_sta_bw20_target_tp = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u", &mcc_sta_bw20_target_tp); -+ -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ RTW_INFO("%s: mcc_sta_bw20_target_tp = %d\n", __func__, mcc_sta_bw20_target_tp); -+ -+ padapter->registrypriv.rtw_mcc_sta_bw20_target_tx_tp = mcc_sta_bw20_target_tp; -+ -+ -+ } -+ -+ return count; -+} -+ -+ssize_t proc_set_mcc_sta_bw40_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ u32 mcc_sta_bw40_target_tp = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u", &mcc_sta_bw40_target_tp); -+ -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ RTW_INFO("%s: mcc_sta_bw40_target_tp = %d\n", __func__, mcc_sta_bw40_target_tp); -+ -+ padapter->registrypriv.rtw_mcc_sta_bw40_target_tx_tp = mcc_sta_bw40_target_tp; -+ -+ -+ } -+ -+ return count; -+} -+ -+ssize_t proc_set_mcc_sta_bw80_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[255]; -+ u32 mcc_sta_bw80_target_tp = 0; -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter)); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u", &mcc_sta_bw80_target_tp); -+ -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+ -+ RTW_INFO("%s: mcc_sta_bw80_target_tp = %d\n", __func__, mcc_sta_bw80_target_tp); -+ -+ padapter->registrypriv.rtw_mcc_sta_bw80_target_tx_tp = mcc_sta_bw80_target_tp; -+ -+ -+ } -+ -+ return count; -+} -+#endif /* CONFIG_MCC_MODE */ -+ -+int proc_get_ack_timeout(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 ack_timeout_val; -+#ifdef CONFIG_RTL8821C -+ u8 ack_timeout_val_cck; -+#endif -+ -+ ack_timeout_val = rtw_read8(padapter, REG_ACKTO); -+ -+#ifdef CONFIG_RTL8821C -+ ack_timeout_val_cck = rtw_read8(padapter, REG_ACKTO_CCK_8821C); -+ RTW_PRINT_SEL(m, "Current CCK packet ACK Timeout = %d us (0x%x).\n", ack_timeout_val_cck, ack_timeout_val_cck); -+ RTW_PRINT_SEL(m, "Current non-CCK packet ACK Timeout = %d us (0x%x).\n", ack_timeout_val, ack_timeout_val); -+#else -+ RTW_PRINT_SEL(m, "Current ACK Timeout = %d us (0x%x).\n", ack_timeout_val, ack_timeout_val); -+#endif -+ -+ return 0; -+} -+ -+ssize_t proc_set_ack_timeout(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 ack_timeout_ms, ack_timeout_ms_cck; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u %u", &ack_timeout_ms, &ack_timeout_ms_cck); -+ -+#ifdef CONFIG_RTL8821C -+ if (num < 2) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 2\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+#else -+ if (num < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter)); -+ return -EINVAL; -+ } -+#endif -+ /* This register sets the Ack time out value after Tx unicast packet. It is in units of us. */ -+ rtw_write8(padapter, REG_ACKTO, (u8)ack_timeout_ms); -+ -+#ifdef CONFIG_RTL8821C -+ /* This register sets the Ack time out value after Tx unicast CCK packet. It is in units of us. */ -+ rtw_write8(padapter, REG_ACKTO_CCK_8821C, (u8)ack_timeout_ms_cck); -+ RTW_INFO("Set CCK packet ACK Timeout to %d us.\n", ack_timeout_ms_cck); -+ RTW_INFO("Set non-CCK packet ACK Timeout to %d us.\n", ack_timeout_ms); -+#else -+ RTW_INFO("Set ACK Timeout to %d us.\n", ack_timeout_ms); -+#endif -+ } -+ -+ return count; -+} -+ -+ssize_t proc_set_fw_offload(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ _adapter *pri_adapter = GET_PRIMARY_ADAPTER(adapter); -+ HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter); -+ char tmp[32]; -+ u32 iqk_offload_enable = 0, ch_switch_offload_enable = 0; -+ -+ if (buffer == NULL) { -+ RTW_INFO("input buffer is NULL!\n"); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO("input length is 0!\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO("input length is too large\n"); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%d %d", &iqk_offload_enable, &ch_switch_offload_enable); -+ -+ if (num < 2) { -+ RTW_INFO("input parameters < 1\n"); -+ return -EINVAL; -+ } -+ -+ if (hal->RegIQKFWOffload != iqk_offload_enable) { -+ hal->RegIQKFWOffload = iqk_offload_enable; -+ rtw_run_in_thread_cmd(pri_adapter, ((void *)(rtw_hal_update_iqk_fw_offload_cap)), pri_adapter); -+ } -+ -+ if (hal->ch_switch_offload != ch_switch_offload_enable) -+ hal->ch_switch_offload = ch_switch_offload_enable; -+ } -+ -+ return count; -+} -+ -+int proc_get_fw_offload(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter); -+ -+ -+ RTW_PRINT_SEL(m, "IQK FW offload:%s\n", hal->RegIQKFWOffload?"enable":"disable"); -+ RTW_PRINT_SEL(m, "Channel switch FW offload:%s\n", hal->ch_switch_offload?"enable":"disable"); -+ return 0; -+} -+#ifdef CONFIG_FW_HANDLE_TXBCN -+extern void rtw_hal_set_fw_ap_bcn_offload_cmd(_adapter *adapter, bool fw_bcn_en, u8 tbtt_rpt_map); -+ssize_t proc_set_fw_tbtt_rpt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 fw_tbtt_rpt, fw_bcn_offload; -+ -+ -+ if (buffer == NULL) { -+ RTW_INFO("input buffer is NULL!\n"); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO("input length is 0!\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO("input length is too large\n"); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%d %x",&fw_bcn_offload, &fw_tbtt_rpt); -+ -+ if (num < 2) { -+ RTW_INFO("input parameters < 2\n"); -+ return -EINVAL; -+ } -+ rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, fw_bcn_offload, fw_tbtt_rpt); -+ } -+ -+ return count; -+} -+ -+int proc_get_fw_tbtt_rpt(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ RTW_PRINT_SEL(m, "FW BCN offload:%s\n", dvobj->fw_bcn_offload ? "enable" : "disable"); -+ RTW_PRINT_SEL(m, "FW TBTT RPT:%x\n", dvobj->vap_tbtt_rpt_map); -+ return 0; -+} -+ -+#endif -+ -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+ssize_t proc_set_txss_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ char tmp[32]; -+ u32 enable = 0; -+ u32 txss_tx_tp = 0; -+ int txss_chk_cnt = 0; -+ -+ if (buffer == NULL) { -+ RTW_INFO("input buffer is NULL!\n"); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO("input length is 0!\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO("input length is too large\n"); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u %u %d", -+ &enable, &txss_tx_tp, &txss_chk_cnt); -+ -+ if (num < 1) { -+ RTW_INFO("input parameters < 1\n"); -+ return -EINVAL; -+ } -+ pmlmeext->txss_ctrl_en = enable; -+ -+ if (txss_tx_tp) -+ pmlmeext->txss_tp_th = txss_tx_tp; -+ if (txss_chk_cnt) -+ pmlmeext->txss_tp_chk_cnt = txss_chk_cnt; -+ -+ RTW_INFO("%s txss_ctl_en :%s , txss_tp_th:%d, tp_chk_cnt:%d\n", -+ __func__, pmlmeext->txss_tp_th ? "Y" : "N", -+ pmlmeext->txss_tp_th, pmlmeext->txss_tp_chk_cnt); -+ -+ } -+ -+ return count; -+} -+ -+int proc_get_txss_tp(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ RTW_PRINT_SEL(m, "TXSS Control - %s\n", pmlmeext->txss_ctrl_en ? "enable" : "disable"); -+ RTW_PRINT_SEL(m, "TXSS Tx TP TH - %d\n", pmlmeext->txss_tp_th); -+ RTW_PRINT_SEL(m, "TXSS check cnt - %d\n", pmlmeext->txss_tp_chk_cnt); -+ -+ return 0; -+} -+#ifdef DBG_CTRL_TXSS -+ssize_t proc_set_txss_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ char tmp[32]; -+ u32 tx_1ss = 0; -+ -+ if (buffer == NULL) { -+ RTW_INFO("input buffer is NULL!\n"); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO("input length is 0!\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO("input length is too large\n"); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u", &tx_1ss); -+ -+ if (num < 1) { -+ RTW_INFO("input parameters < 1\n"); -+ return -EINVAL; -+ } -+ -+ pmlmeext->txss_ctrl_en = _FALSE; -+ -+ dbg_ctrl_txss(adapter, tx_1ss); -+ -+ RTW_INFO("%s set tx to 1ss :%s\n", __func__, tx_1ss ? "Y" : "N"); -+ } -+ -+ return count; -+} -+ -+int proc_get_txss_ctrl(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ RTW_PRINT_SEL(m, "TXSS 1ss - %s\n", pmlmeext->txss_1ss ? "Y" : "N"); -+ -+ return 0; -+} -+#endif -+#endif -+ -+#ifdef CONFIG_DBG_RF_CAL -+int proc_get_iqk_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ return 0; -+} -+ -+ssize_t proc_set_iqk(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 recovery, clear, segment; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d %d %d", &recovery, &clear, &segment); -+ -+ if (num != 3) { -+ RTW_INFO("Invalid format\n"); -+ return count; -+ } -+ -+ rtw_hal_iqk_test(padapter, recovery, clear, segment); -+ } -+ -+ return count; -+ -+} -+ -+int proc_get_lck_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ return 0; -+} -+ -+ssize_t proc_set_lck(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 trigger; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d", &trigger); -+ -+ if (num != 1) { -+ RTW_INFO("Invalid format\n"); -+ return count; -+ } -+ -+ rtw_hal_lck_test(padapter); -+ } -+ -+ return count; -+} -+#endif /* CONFIG_DBG_RF_CAL */ -+ -+#ifdef CONFIG_LPS_CHK_BY_TP -+ssize_t proc_set_lps_chk_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ char tmp[32]; -+ u32 enable = 0; -+ u32 lps_tx_tp = 0, lps_rx_tp = 0, lps_bi_tp = 0; -+ int lps_chk_cnt_th = 0; -+ u32 lps_tx_pkts = 0, lps_rx_pkts = 0; -+ -+ if (buffer == NULL) { -+ RTW_INFO("input buffer is NULL!\n"); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO("input length is 0!\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO("input length is too large\n"); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u %u %u %u %d %u %u", -+ &enable, &lps_tx_tp, &lps_rx_tp, &lps_bi_tp, -+ &lps_chk_cnt_th, &lps_tx_pkts, &lps_rx_pkts); -+ -+ if (num < 1) { -+ RTW_INFO("input parameters < 1\n"); -+ return -EINVAL; -+ } -+ pwrpriv->lps_chk_by_tp = enable; -+ -+ if (lps_tx_tp) { -+ pwrpriv->lps_tx_tp_th = lps_tx_tp; -+ pwrpriv->lps_rx_tp_th = lps_tx_tp; -+ pwrpriv->lps_bi_tp_th = lps_tx_tp; -+ } -+ if (lps_rx_tp) -+ pwrpriv->lps_rx_tp_th = lps_rx_tp; -+ if (lps_bi_tp) -+ pwrpriv->lps_bi_tp_th = lps_bi_tp; -+ -+ if (lps_chk_cnt_th) -+ pwrpriv->lps_chk_cnt_th = lps_chk_cnt_th; -+ -+ if (lps_tx_pkts) -+ pwrpriv->lps_tx_pkts = lps_tx_pkts; -+ -+ if (lps_rx_pkts) -+ pwrpriv->lps_rx_pkts = lps_rx_pkts; -+ -+ RTW_INFO("%s lps_chk_by_tp:%s , lps_tx_tp_th:%d, lps_tx_tp_th:%d, lps_bi_tp:%d\n", -+ __func__, pwrpriv->lps_chk_by_tp ? "Y" : "N", -+ pwrpriv->lps_tx_tp_th, pwrpriv->lps_tx_tp_th, pwrpriv->lps_bi_tp_th); -+ RTW_INFO("%s lps_chk_cnt_th:%d , lps_tx_pkts:%d, lps_rx_pkts:%d\n", -+ __func__, pwrpriv->lps_chk_cnt_th, pwrpriv->lps_tx_pkts, pwrpriv->lps_rx_pkts); -+ } -+ -+ return count; -+} -+ -+int proc_get_lps_chk_tp(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ -+ RTW_PRINT_SEL(m, "LPS chk by tp - %s\n", pwrpriv->lps_chk_by_tp ? "enable" : "disable"); -+ RTW_PRINT_SEL(m, "LPS Tx TP TH - %d(Mbps)\n", pwrpriv->lps_tx_tp_th); -+ RTW_PRINT_SEL(m, "LPS Rx TP TH - %d(Mbps)\n", pwrpriv->lps_rx_tp_th); -+ RTW_PRINT_SEL(m, "LPS BI TP TH - %d(Mbps)\n", pwrpriv->lps_bi_tp_th); -+ -+ RTW_PRINT_SEL(m, "LPS CHK CNT - %d\n", pwrpriv->lps_chk_cnt_th); -+ RTW_PRINT_SEL(m, "LPS Tx PKTs - %d\n", pwrpriv->lps_tx_pkts); -+ RTW_PRINT_SEL(m, "LPS Rx PKTs - %d\n", pwrpriv->lps_rx_pkts); -+ return 0; -+} -+#endif /*CONFIG_LPS_CHK_BY_TP*/ -+#ifdef CONFIG_SUPPORT_STATIC_SMPS -+ssize_t proc_set_smps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ char tmp[32]; -+ u32 enable = 0; -+ u32 smps_en, smps_tx_tp = 0, smps_rx_tp = 0; -+ u32 smps_test = 0, smps_test_en = 0; -+ -+ if (buffer == NULL) { -+ RTW_INFO("input buffer is NULL!\n"); -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO("input length is 0!\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ RTW_INFO("input length is too large\n"); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%u %u %u %u %u", &smps_en, &smps_tx_tp, &smps_rx_tp, -+ &smps_test, &smps_test_en); -+ -+ if (num < 1) { -+ RTW_INFO("input parameters < 1\n"); -+ return -EINVAL; -+ } -+ -+ pmlmeext->ssmps_en = smps_en; -+ if (smps_tx_tp) { -+ pmlmeext->ssmps_tx_tp_th= smps_tx_tp; -+ pmlmeext->ssmps_rx_tp_th= smps_tx_tp; -+ } -+ if (smps_rx_tp) -+ pmlmeext->ssmps_rx_tp_th = smps_rx_tp; -+ -+ #ifdef DBG_STATIC_SMPS -+ if (num > 3) { -+ pmlmeext->ssmps_test = smps_test; -+ pmlmeext->ssmps_test_en = smps_test_en; -+ } -+ #endif -+ RTW_INFO("SM PS : %s tx_tp_th:%d, rx_tp_th:%d\n", -+ (smps_en) ? "Enable" : "Disable", -+ pmlmeext->ssmps_tx_tp_th, -+ pmlmeext->ssmps_rx_tp_th); -+ #ifdef DBG_STATIC_SMPS -+ RTW_INFO("SM PS : %s ssmps_test_en:%d\n", -+ (smps_test) ? "Enable" : "Disable", -+ pmlmeext->ssmps_test_en); -+ #endif -+ } -+ -+ return count; -+} -+ -+int proc_get_smps(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ RTW_PRINT_SEL(m, "Static SMPS %s\n", pmlmeext->ssmps_en ? "enable" : "disable"); -+ RTW_PRINT_SEL(m, "Tx TP TH %d\n", pmlmeext->ssmps_tx_tp_th); -+ RTW_PRINT_SEL(m, "Rx TP TH %d\n", pmlmeext->ssmps_rx_tp_th); -+ #ifdef DBG_STATIC_SMPS -+ RTW_PRINT_SEL(m, "test %d, test_en:%d\n", pmlmeext->ssmps_test, pmlmeext->ssmps_test_en); -+ #endif -+ return 0; -+} -+#endif /*CONFIG_SUPPORT_STATIC_SMPS*/ -+ -+#endif /* CONFIG_PROC_DEBUG */ -+#define RTW_BUFDUMP_BSIZE 16 -+#if 1 -+inline void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring, -+ bool _idx_show, const u8 *_hexdata, int _hexdatalen) -+{ -+#ifdef CONFIG_RTW_DEBUG -+ int __i; -+ u8 *ptr = (u8 *)_hexdata; -+ -+ if (_loglevel <= rtw_drv_log_level) { -+ if (_titlestring) { -+ if (sel == RTW_DBGDUMP) -+ RTW_PRINT(""); -+ _RTW_PRINT_SEL(sel, "%s", _titlestring); -+ if (_hexdatalen >= RTW_BUFDUMP_BSIZE) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ -+ for (__i = 0; __i < _hexdatalen; __i++) { -+ if (((__i % RTW_BUFDUMP_BSIZE) == 0) && (_hexdatalen >= RTW_BUFDUMP_BSIZE)) { -+ if (sel == RTW_DBGDUMP) -+ RTW_PRINT(""); -+ if (_idx_show) -+ _RTW_PRINT_SEL(sel, "0x%03X: ", __i); -+ } -+ _RTW_PRINT_SEL(sel, "%02X%s", ptr[__i], (((__i + 1) % 4) == 0) ? " " : " "); -+ if ((__i + 1 < _hexdatalen) && ((__i + 1) % RTW_BUFDUMP_BSIZE) == 0) -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+#endif -+} -+#else -+inline void _RTW_STR_DUMP_SEL(void *sel, char *str_out) -+{ -+ if (sel == RTW_DBGDUMP) -+ _dbgdump("%s\n", str_out); -+ #if defined(_seqdump) -+ else -+ _seqdump(sel, "%s\n", str_out); -+ #endif /*_seqdump*/ -+} -+inline void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring, -+ bool _idx_show, u8 *_hexdata, int _hexdatalen) -+{ -+ int __i, len; -+ int __j, idx; -+ int block_num, remain_byte; -+ char str_out[128] = {'\0'}; -+ char str_val[32] = {'\0'}; -+ char *p = NULL; -+ u8 *ptr = (u8 *)_hexdata; -+ -+ if (_loglevel <= rtw_drv_log_level) { -+ /*dump title*/ -+ p = &str_out[0]; -+ if (_titlestring) { -+ if (sel == RTW_DBGDUMP) { -+ len = snprintf(str_val, sizeof(str_val), "%s", DRIVER_PREFIX); -+ strncpy(p, str_val, len); -+ p += len; -+ } -+ len = snprintf(str_val, sizeof(str_val), "%s", _titlestring); -+ strncpy(p, str_val, len); -+ p += len; -+ } -+ if (p != &str_out[0]) { -+ _RTW_STR_DUMP_SEL(sel, str_out); -+ _rtw_memset(&str_out, '\0', sizeof(str_out)); -+ } -+ -+ /*dump buffer*/ -+ block_num = _hexdatalen / RTW_BUFDUMP_BSIZE; -+ remain_byte = _hexdatalen % RTW_BUFDUMP_BSIZE; -+ for (__i = 0; __i < block_num; __i++) { -+ p = &str_out[0]; -+ if (sel == RTW_DBGDUMP) { -+ len = snprintf(str_val, sizeof(str_val), "%s", DRIVER_PREFIX); -+ strncpy(p, str_val, len); -+ p += len; -+ } -+ if (_idx_show) { -+ len = snprintf(str_val, sizeof(str_val), "0x%03X: ", __i * RTW_BUFDUMP_BSIZE); -+ strncpy(p, str_val, len); -+ p += len; -+ } -+ for (__j =0; __j < RTW_BUFDUMP_BSIZE; __j++) { -+ idx = __i * RTW_BUFDUMP_BSIZE + __j; -+ len = snprintf(str_val, sizeof(str_val), "%02X%s", ptr[idx], (((__j + 1) % 4) == 0) ? " " : " "); -+ strncpy(p, str_val, len); -+ p += len; -+ } -+ _RTW_STR_DUMP_SEL(sel, str_out); -+ _rtw_memset(&str_out, '\0', sizeof(str_out)); -+ } -+ -+ p = &str_out[0]; -+ if ((sel == RTW_DBGDUMP) && remain_byte) { -+ len = snprintf(str_val, sizeof(str_val), "%s", DRIVER_PREFIX); -+ strncpy(p, str_val, len); -+ p += len; -+ } -+ if (_idx_show && remain_byte) { -+ len = snprintf(str_val, sizeof(str_val), "0x%03X: ", block_num * RTW_BUFDUMP_BSIZE); -+ strncpy(p, str_val, len); -+ p += len; -+ } -+ for (__i = 0; __i < remain_byte; __i++) { -+ idx = block_num * RTW_BUFDUMP_BSIZE + __i; -+ len = snprintf(str_val, sizeof(str_val), "%02X%s", ptr[idx], (((__i + 1) % 4) == 0) ? " " : " "); -+ strncpy(p, str_val, len); -+ p += len; -+ } -+ _RTW_STR_DUMP_SEL(sel, str_out); -+ } -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/core/rtw_eeprom.c b/drivers/staging/rtl8723cs/core/rtw_eeprom.c -new file mode 100644 -index 000000000000..62c0be06ce3a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_eeprom.c -@@ -0,0 +1,329 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_EEPROM_C_ -+ -+#include -+#include -+#include -+ -+void up_clk(_adapter *padapter, u16 *x) -+{ -+ *x = *x | _EESK; -+ rtw_write8(padapter, EE_9346CR, (u8)*x); -+ rtw_udelay_os(CLOCK_RATE); -+ -+ -+} -+ -+void down_clk(_adapter *padapter, u16 *x) -+{ -+ *x = *x & ~_EESK; -+ rtw_write8(padapter, EE_9346CR, (u8)*x); -+ rtw_udelay_os(CLOCK_RATE); -+} -+ -+void shift_out_bits(_adapter *padapter, u16 data, u16 count) -+{ -+ u16 x, mask; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ mask = 0x01 << (count - 1); -+ x = rtw_read8(padapter, EE_9346CR); -+ -+ x &= ~(_EEDO | _EEDI); -+ -+ do { -+ x &= ~_EEDI; -+ if (data & mask) -+ x |= _EEDI; -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ rtw_write8(padapter, EE_9346CR, (u8)x); -+ rtw_udelay_os(CLOCK_RATE); -+ up_clk(padapter, &x); -+ down_clk(padapter, &x); -+ mask = mask >> 1; -+ } while (mask); -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ x &= ~_EEDI; -+ rtw_write8(padapter, EE_9346CR, (u8)x); -+out: -+ return; -+} -+ -+u16 shift_in_bits(_adapter *padapter) -+{ -+ u16 x, d = 0, i; -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ x = rtw_read8(padapter, EE_9346CR); -+ -+ x &= ~(_EEDO | _EEDI); -+ d = 0; -+ -+ for (i = 0; i < 16; i++) { -+ d = d << 1; -+ up_clk(padapter, &x); -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ x = rtw_read8(padapter, EE_9346CR); -+ -+ x &= ~(_EEDI); -+ if (x & _EEDO) -+ d |= 1; -+ -+ down_clk(padapter, &x); -+ } -+out: -+ -+ return d; -+} -+ -+void standby(_adapter *padapter) -+{ -+ u8 x; -+ x = rtw_read8(padapter, EE_9346CR); -+ -+ x &= ~(_EECS | _EESK); -+ rtw_write8(padapter, EE_9346CR, x); -+ -+ rtw_udelay_os(CLOCK_RATE); -+ x |= _EECS; -+ rtw_write8(padapter, EE_9346CR, x); -+ rtw_udelay_os(CLOCK_RATE); -+} -+ -+u16 wait_eeprom_cmd_done(_adapter *padapter) -+{ -+ u8 x; -+ u16 i, res = _FALSE; -+ standby(padapter); -+ for (i = 0; i < 200; i++) { -+ x = rtw_read8(padapter, EE_9346CR); -+ if (x & _EEDO) { -+ res = _TRUE; -+ goto exit; -+ } -+ rtw_udelay_os(CLOCK_RATE); -+ } -+exit: -+ return res; -+} -+ -+void eeprom_clean(_adapter *padapter) -+{ -+ u16 x; -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ x = rtw_read8(padapter, EE_9346CR); -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ x &= ~(_EECS | _EEDI); -+ rtw_write8(padapter, EE_9346CR, (u8)x); -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ up_clk(padapter, &x); -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ down_clk(padapter, &x); -+out: -+ return; -+} -+ -+void eeprom_write16(_adapter *padapter, u16 reg, u16 data) -+{ -+ u8 x; -+ x = rtw_read8(padapter, EE_9346CR); -+ -+ x &= ~(_EEDI | _EEDO | _EESK | _EEM0); -+ x |= _EEM1 | _EECS; -+ rtw_write8(padapter, EE_9346CR, x); -+ -+ shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5); -+ -+ if (padapter->EepromAddressSize == 8) /* CF+ and SDIO */ -+ shift_out_bits(padapter, 0, 6); -+ else /* USB */ -+ shift_out_bits(padapter, 0, 4); -+ -+ standby(padapter); -+ -+ /* Commented out by rcnjko, 2004.0 -+ * Erase this particular word. Write the erase opcode and register -+ * number in that order. The opcode is 3bits in length; reg is 6 bits long. */ -+/* shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3); -+ * shift_out_bits(Adapter, reg, Adapter->EepromAddressSize); -+ * -+ * if (wait_eeprom_cmd_done(Adapter ) == FALSE) -+ * { -+ * return; -+ * } */ -+ -+ -+ standby(padapter); -+ -+ /* write the new word to the EEPROM */ -+ -+ /* send the write opcode the EEPORM */ -+ shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3); -+ -+ /* select which word in the EEPROM that we are writing to. */ -+ shift_out_bits(padapter, reg, padapter->EepromAddressSize); -+ -+ /* write the data to the selected EEPROM word. */ -+ shift_out_bits(padapter, data, 16); -+ -+ if (wait_eeprom_cmd_done(padapter) == _FALSE) -+ -+ goto exit; -+ -+ standby(padapter); -+ -+ shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5); -+ shift_out_bits(padapter, reg, 4); -+ -+ eeprom_clean(padapter); -+exit: -+ return; -+} -+ -+u16 eeprom_read16(_adapter *padapter, u16 reg) /* ReadEEprom */ -+{ -+ -+ u16 x; -+ u16 data = 0; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ /* select EEPROM, reset bits, set _EECS */ -+ x = rtw_read8(padapter, EE_9346CR); -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ -+ x &= ~(_EEDI | _EEDO | _EESK | _EEM0); -+ x |= _EEM1 | _EECS; -+ rtw_write8(padapter, EE_9346CR, (unsigned char)x); -+ -+ /* write the read opcode and register number in that order */ -+ /* The opcode is 3bits in length, reg is 6 bits long */ -+ shift_out_bits(padapter, EEPROM_READ_OPCODE, 3); -+ shift_out_bits(padapter, reg, padapter->EepromAddressSize); -+ -+ /* Now read the data (16 bits) in from the selected EEPROM word */ -+ data = shift_in_bits(padapter); -+ -+ eeprom_clean(padapter); -+out: -+ -+ return data; -+ -+ -+} -+ -+ -+ -+ -+/* From even offset */ -+void eeprom_read_sz(_adapter *padapter, u16 reg, u8 *data, u32 sz) -+{ -+ -+ u16 x, data16; -+ u32 i; -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ /* select EEPROM, reset bits, set _EECS */ -+ x = rtw_read8(padapter, EE_9346CR); -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ goto out; -+ } -+ -+ x &= ~(_EEDI | _EEDO | _EESK | _EEM0); -+ x |= _EEM1 | _EECS; -+ rtw_write8(padapter, EE_9346CR, (unsigned char)x); -+ -+ /* write the read opcode and register number in that order */ -+ /* The opcode is 3bits in length, reg is 6 bits long */ -+ shift_out_bits(padapter, EEPROM_READ_OPCODE, 3); -+ shift_out_bits(padapter, reg, padapter->EepromAddressSize); -+ -+ -+ for (i = 0; i < sz; i += 2) { -+ data16 = shift_in_bits(padapter); -+ data[i] = data16 & 0xff; -+ data[i + 1] = data16 >> 8; -+ } -+ -+ eeprom_clean(padapter); -+out: -+ return; -+} -+ -+ -+/* addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg) */ -+u8 eeprom_read(_adapter *padapter, u32 addr_off, u8 sz, u8 *rbuf) -+{ -+ u8 quotient, remainder, addr_2align_odd; -+ u16 reg, stmp , i = 0, idx = 0; -+ reg = (u16)(addr_off >> 1); -+ addr_2align_odd = (u8)(addr_off & 0x1); -+ -+ if (addr_2align_odd) { /* read that start at high part: e.g 1,3,5,7,9,... */ -+ stmp = eeprom_read16(padapter, reg); -+ rbuf[idx++] = (u8)((stmp >> 8) & 0xff); /* return hogh-part of the short */ -+ reg++; -+ sz--; -+ } -+ -+ quotient = sz >> 1; -+ remainder = sz & 0x1; -+ -+ for (i = 0 ; i < quotient; i++) { -+ stmp = eeprom_read16(padapter, reg + i); -+ rbuf[idx++] = (u8)(stmp & 0xff); -+ rbuf[idx++] = (u8)((stmp >> 8) & 0xff); -+ } -+ -+ reg = reg + i; -+ if (remainder) { /* end of read at lower part of short : 0,2,4,6,... */ -+ stmp = eeprom_read16(padapter, reg); -+ rbuf[idx] = (u8)(stmp & 0xff); -+ } -+ return _TRUE; -+} -+ -+ -+ -+void read_eeprom_content(_adapter *padapter) -+{ -+ -+ -+ -+} -diff --git a/drivers/staging/rtl8723cs/core/rtw_ft.c b/drivers/staging/rtl8723cs/core/rtw_ft.c -new file mode 100644 -index 000000000000..1ba55ce74a9d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_ft.c -@@ -0,0 +1,668 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+ -+#ifdef CONFIG_RTW_80211R -+ -+#ifndef RTW_FT_DBG -+ #define RTW_FT_DBG 0 -+#endif -+#if RTW_FT_DBG -+ #define RTW_FT_INFO(fmt, arg...) \ -+ RTW_INFO(fmt, arg) -+ #define RTW_FT_DUMP(str, data, len) \ -+ RTW_INFO_DUMP(str, data, len) -+#else -+ #define RTW_FT_INFO(fmt, arg...) do {} while (0) -+ #define RTW_FT_DUMP(str, data, len) do {} while (0) -+#endif -+ -+void rtw_ft_info_init(struct ft_roam_info *pft) -+{ -+ _rtw_memset(pft, 0, sizeof(struct ft_roam_info)); -+ pft->ft_flags = 0 -+ | RTW_FT_EN -+ /* | RTW_FT_OTD_EN */ -+#ifdef CONFIG_RTW_BTM_ROAM -+ | RTW_FT_BTM_ROAM -+#endif -+ ; -+ pft->ft_updated_bcn = _FALSE; -+ RTW_FT_INFO("%s : ft_flags=0x%02x\n", __func__, pft->ft_flags); -+} -+ -+ssize_t rtw_ft_proc_flags_set(struct file *file, -+ const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ char tmp[32]; -+ u8 flags; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%hhx", &flags); -+ if (num == 1) -+ adapter->mlmepriv.ft_roam.ft_flags = flags; -+ } -+ -+ return count; -+ -+} -+ -+int rtw_ft_proc_flags_get(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "0x%02x\n", adapter->mlmepriv.ft_roam.ft_flags); -+ -+ return 0; -+} -+ -+u8 rtw_ft_chk_roaming_candidate( -+ _adapter *padapter, struct wlan_network *competitor) -+{ -+ u8 *pmdie; -+ u32 mdie_len = 0; -+ struct ft_roam_info *pft_roam = &(padapter->mlmepriv.ft_roam); -+ -+ if (!(pmdie = rtw_get_ie(&competitor->network.IEs[12], -+ _MDIE_, &mdie_len, competitor->network.IELength-12))) { -+ RTW_INFO("FT : MDIE not foud in competitor!\n"); -+ return _FALSE; -+ } -+ -+ if (!_rtw_memcmp(&pft_roam->mdid, (pmdie+2), 2)) { -+ RTW_INFO("FT : unmatched MDIE!\n"); -+ return _FALSE; -+ } -+ -+ /*The candidate don't support over-the-DS*/ -+ if (rtw_ft_valid_otd_candidate(padapter, pmdie)) { -+ RTW_INFO("FT: ignore the candidate(" -+ MAC_FMT ") for over-the-DS\n", -+ MAC_ARG(competitor->network.MacAddress)); -+ /* rtw_ft_clr_flags(padapter, RTW_FT_PEER_OTD_EN); */ -+ return _FALSE; -+ } -+ -+ if (rtw_ft_chk_flags(padapter, RTW_FT_TEST_RSSI_ROAM)) { -+ if (!_rtw_memcmp(padapter->mlmepriv.cur_network.network.MacAddress, -+ competitor->network.MacAddress, ETH_ALEN) ) { -+ competitor->network.Rssi +=20; -+ RTW_FT_INFO("%s : update "MAC_FMT" RSSI to %d for RTW_FT_TEST_RSSI_ROAM\n", -+ __func__, MAC_ARG(competitor->network.MacAddress), -+ (int)competitor->network.Rssi); -+ rtw_ft_clr_flags(padapter, RTW_FT_TEST_RSSI_ROAM); -+ } -+ } -+ -+ return _TRUE; -+} -+ -+void rtw_ft_update_stainfo(_adapter *padapter, WLAN_BSSID_EX *pnetwork) -+{ -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta = NULL; -+ -+ psta = rtw_get_stainfo(pstapriv, pnetwork->MacAddress); -+ if (psta == NULL) -+ psta = rtw_alloc_stainfo(pstapriv, pnetwork->MacAddress); -+ -+ if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { -+ -+ padapter->securitypriv.binstallGrpkey = _FALSE; -+ padapter->securitypriv.busetkipkey = _FALSE; -+ padapter->securitypriv.bgrpkey_handshake = _FALSE; -+ -+ psta->ieee8021x_blocked = _TRUE; -+ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; -+ -+ _rtw_memset((u8 *)&psta->dot118021x_UncstKey, 0, sizeof(union Keytype)); -+ _rtw_memset((u8 *)&psta->dot11tkiprxmickey, 0, sizeof(union Keytype)); -+ _rtw_memset((u8 *)&psta->dot11tkiptxmickey, 0, sizeof(union Keytype)); -+ } -+ -+} -+ -+void rtw_ft_reassoc_event_callback(_adapter *padapter, u8 *pbuf) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct stassoc_event *pstassoc = (struct stassoc_event *)pbuf; -+ struct ft_roam_info *pft_roam = &(pmlmepriv->ft_roam); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&(pmlmeinfo->network); -+ struct cfg80211_ft_event_params ft_evt_parms; -+ _irqL irqL; -+ -+ _rtw_memset(&ft_evt_parms, 0, sizeof(ft_evt_parms)); -+ rtw_ft_update_stainfo(padapter, pnetwork); -+ ft_evt_parms.ies_len = pft_roam->ft_event.ies_len; -+ ft_evt_parms.ies = rtw_zmalloc(ft_evt_parms.ies_len); -+ if (ft_evt_parms.ies) -+ _rtw_memcpy((void *)ft_evt_parms.ies, pft_roam->ft_event.ies, ft_evt_parms.ies_len); -+ else -+ goto err_2; -+ -+ ft_evt_parms.target_ap = rtw_zmalloc(ETH_ALEN); -+ if (ft_evt_parms.target_ap) -+ _rtw_memcpy((void *)ft_evt_parms.target_ap, pstassoc->macaddr, ETH_ALEN); -+ else -+ goto err_1; -+ -+ ft_evt_parms.ric_ies = pft_roam->ft_event.ric_ies; -+ ft_evt_parms.ric_ies_len = pft_roam->ft_event.ric_ies_len; -+ -+ /* It's a KERNEL issue between v4.11 ~ v4.16, -+ * <= v4.10, NLMSG_DEFAULT_SIZE is used for nlmsg_new(). -+ * v4.11 ~ v4.16, only used "100 + >ric_ies_len" for nlmsg_new() -+ * even then DRIVER don't support RIC. -+ * >= v4.17, issue should correct as "100 + ies_len + ric_ies_len". -+ */ -+ #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)) && \ -+ (LINUX_VERSION_CODE < KERNEL_VERSION(4, 17, 0))) -+ if (!ft_evt_parms.ric_ies_len) -+ ft_evt_parms.ric_ies_len = ft_evt_parms.ies_len; -+ else -+ ft_evt_parms.ric_ies_len += ft_evt_parms.ies_len; -+ #endif -+ -+ rtw_ft_lock_set_status(padapter, RTW_FT_AUTHENTICATED_STA, &irqL); -+ rtw_cfg80211_ft_event(padapter, &ft_evt_parms); -+ RTW_INFO("%s: to "MAC_FMT"\n", __func__, MAC_ARG(ft_evt_parms.target_ap)); -+ -+ rtw_mfree((u8 *)pft_roam->ft_event.target_ap, ETH_ALEN); -+err_1: -+ rtw_mfree((u8 *)ft_evt_parms.ies, ft_evt_parms.ies_len); -+err_2: -+ return; -+} -+ -+void rtw_ft_validate_akm_type(_adapter *padapter, -+ struct wlan_network *pnetwork) -+{ -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ struct ft_roam_info *pft_roam = &(padapter->mlmepriv.ft_roam); -+ u32 tmp_len; -+ u8 *ptmp; -+ -+ /*IEEE802.11-2012 Std. Table 8-101-AKM suite selectors*/ -+ if (rtw_ft_valid_akm(padapter, psecuritypriv->rsn_akm_suite_type)) { -+ ptmp = rtw_get_ie(&pnetwork->network.IEs[12], -+ _MDIE_, &tmp_len, (pnetwork->network.IELength-12)); -+ if (ptmp) { -+ pft_roam->mdid = *(u16 *)(ptmp+2); -+ pft_roam->ft_cap = *(ptmp+4); -+ -+ RTW_INFO("FT: target " MAC_FMT " mdid=(0x%2x), capacity=(0x%2x)\n", -+ MAC_ARG(pnetwork->network.MacAddress), pft_roam->mdid, pft_roam->ft_cap); -+ rtw_ft_set_flags(padapter, RTW_FT_PEER_EN); -+ RTW_FT_INFO("%s : peer support FTOTA(0x%02x)\n", __func__, pft_roam->ft_flags); -+ -+ if (rtw_ft_otd_roam_en(padapter)) { -+ rtw_ft_set_flags(padapter, RTW_FT_PEER_OTD_EN); -+ RTW_FT_INFO("%s : peer support FTOTD(0x%02x)\n", __func__, pft_roam->ft_flags); -+ } -+ } else { -+ /* Don't use FT roaming if target AP cannot support FT */ -+ rtw_ft_clr_flags(padapter, (RTW_FT_PEER_EN|RTW_FT_PEER_OTD_EN)); -+ rtw_ft_reset_status(padapter); -+ } -+ } else { -+ /* It could be a non-FT connection */ -+ rtw_ft_clr_flags(padapter, (RTW_FT_PEER_EN|RTW_FT_PEER_OTD_EN)); -+ rtw_ft_reset_status(padapter); -+ } -+ -+ RTW_FT_INFO("%s : ft_flags=0x%02x\n", __func__, pft_roam->ft_flags); -+} -+ -+void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint len = precv_frame->u.hdr.len; -+ WLAN_BSSID_EX *pbss; -+ -+ if (rtw_ft_chk_status(padapter,RTW_FT_ASSOCIATED_STA) -+ && (pmlmepriv->ft_roam.ft_updated_bcn == _FALSE)) { -+ pbss = (WLAN_BSSID_EX*)rtw_malloc(sizeof(WLAN_BSSID_EX)); -+ if (pbss) { -+ if (collect_bss_info(padapter, precv_frame, pbss) == _SUCCESS) { -+ struct beacon_keys recv_beacon; -+ -+ update_network(&(pmlmepriv->cur_network.network), pbss, padapter, _TRUE); -+ /* Move into rtw_get_bcn_keys */ -+ /* rtw_get_bcn_info(&(pmlmepriv->cur_network)); */ -+ -+ /* update bcn keys */ -+ if (rtw_get_bcn_keys(padapter, pframe, len, &recv_beacon) == _TRUE) { -+ RTW_FT_INFO("%s: beacon keys ready\n", __func__); -+ _rtw_memcpy(&pmlmepriv->cur_beacon_keys, -+ &recv_beacon, sizeof(recv_beacon)); -+ if (is_hidden_ssid(recv_beacon.ssid, recv_beacon.ssid_len)) { -+ _rtw_memcpy(pmlmepriv->cur_beacon_keys.ssid, pmlmeinfo->network.Ssid.Ssid, IW_ESSID_MAX_SIZE); -+ pmlmepriv->cur_beacon_keys.ssid_len = pmlmeinfo->network.Ssid.SsidLength; -+ } -+ } else { -+ RTW_ERR("%s: get beacon keys failed\n", __func__); -+ _rtw_memset(&pmlmepriv->cur_beacon_keys, 0, sizeof(recv_beacon)); -+ } -+ #ifdef CONFIG_BCN_CNT_CONFIRM_HDL -+ pmlmepriv->new_beacon_cnts = 0; -+ #endif -+ } -+ rtw_mfree((u8*)pbss, sizeof(WLAN_BSSID_EX)); -+ } -+ -+ /* check the vendor of the assoc AP */ -+ pmlmeinfo->assoc_AP_vendor = -+ check_assoc_AP(pframe+sizeof(struct rtw_ieee80211_hdr_3addr), -+ (len - sizeof(struct rtw_ieee80211_hdr_3addr))); -+ -+ /* update TSF Value */ -+ update_TSF(pmlmeext, pframe, len); -+ pmlmeext->bcn_cnt = 0; -+ pmlmeext->last_bcn_cnt = 0; -+ pmlmepriv->ft_roam.ft_updated_bcn = _TRUE; -+ } -+} -+ -+void rtw_ft_start_clnt_join(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct ft_roam_info *pft_roam = &(pmlmepriv->ft_roam); -+ -+ if (rtw_ft_otd_roam(padapter)) { -+ pmlmeinfo->state = WIFI_FW_AUTH_SUCCESS | WIFI_FW_STATION_STATE; -+ pft_roam->ft_event.ies = -+ (pft_roam->ft_action + sizeof(struct rtw_ieee80211_hdr_3addr) + 16); -+ pft_roam->ft_event.ies_len = -+ (pft_roam->ft_action_len - sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+ /*Not support RIC*/ -+ pft_roam->ft_event.ric_ies = NULL; -+ pft_roam->ft_event.ric_ies_len = 0; -+ rtw_ft_report_evt(padapter); -+ return; -+ } -+ -+ pmlmeinfo->state = WIFI_FW_AUTH_NULL | WIFI_FW_STATION_STATE; -+ start_clnt_auth(padapter); -+} -+ -+u8 rtw_ft_update_rsnie( -+ _adapter *padapter, u8 bwrite, -+ struct pkt_attrib *pattrib, u8 **pframe) -+{ -+ struct ft_roam_info *pft_roam = &(padapter->mlmepriv.ft_roam); -+ u8 *pie; -+ u32 len; -+ -+ pie = rtw_get_ie(pft_roam->updated_ft_ies, EID_WPA2, &len, -+ pft_roam->updated_ft_ies_len); -+ -+ if (!bwrite) -+ return (pie)?_SUCCESS:_FAIL; -+ -+ if (pie) { -+ *pframe = rtw_set_ie(((u8 *)*pframe), EID_WPA2, len, -+ pie+2, &(pattrib->pktlen)); -+ } else -+ return _FAIL; -+ -+ return _SUCCESS; -+} -+ -+static u8 rtw_ft_update_mdie( -+ _adapter *padapter, struct pkt_attrib *pattrib, u8 **pframe) -+{ -+ struct ft_roam_info *pft_roam = &(padapter->mlmepriv.ft_roam); -+ u8 *pie, mdie[3]; -+ u32 len = 3; -+ -+ if (rtw_ft_roam(padapter)) { -+ if ((pie = rtw_get_ie(pft_roam->updated_ft_ies, _MDIE_, -+ &len, pft_roam->updated_ft_ies_len))) { -+ pie = (pie + 2); /* ignore md-id & length */ -+ } else -+ return _FAIL; -+ } else { -+ *((u16 *)&mdie[0]) = pft_roam->mdid; -+ mdie[2] = pft_roam->ft_cap; -+ pie = &mdie[0]; -+ } -+ -+ *pframe = rtw_set_ie(((u8 *)*pframe), _MDIE_, len , pie, &(pattrib->pktlen)); -+ return _SUCCESS; -+} -+ -+static u8 rtw_ft_update_ftie( -+ _adapter *padapter, struct pkt_attrib *pattrib, u8 **pframe) -+{ -+ struct ft_roam_info *pft_roam = &(padapter->mlmepriv.ft_roam); -+ u8 *pie; -+ u32 len; -+ -+ if ((pie = rtw_get_ie(pft_roam->updated_ft_ies, _FTIE_, &len, -+ pft_roam->updated_ft_ies_len)) != NULL) { -+ *pframe = rtw_set_ie(*pframe, _FTIE_, len , -+ (pie+2), &(pattrib->pktlen)); -+ } else -+ return _FAIL; -+ -+ return _SUCCESS; -+} -+ -+void rtw_ft_build_auth_req_ies(_adapter *padapter, -+ struct pkt_attrib *pattrib, u8 **pframe) -+{ -+ u8 ftie_append = _TRUE; -+ -+ if (!pattrib || !(*pframe)) -+ return; -+ -+ if (!rtw_ft_roam(padapter)) -+ return; -+ -+ ftie_append = rtw_ft_update_rsnie(padapter, _TRUE, pattrib, pframe); -+ rtw_ft_update_mdie(padapter, pattrib, pframe); -+ if (ftie_append) -+ rtw_ft_update_ftie(padapter, pattrib, pframe); -+} -+ -+void rtw_ft_build_assoc_req_ies(_adapter *padapter, -+ u8 is_reassoc, struct pkt_attrib *pattrib, u8 **pframe) -+{ -+ if (!pattrib || !(*pframe)) -+ return; -+ -+ if (rtw_ft_chk_flags(padapter, RTW_FT_PEER_EN)) -+ rtw_ft_update_mdie(padapter, pattrib, pframe); -+ -+ if ((!is_reassoc) || (!rtw_ft_roam(padapter))) -+ return; -+ -+ if (rtw_ft_update_rsnie(padapter, _FALSE, pattrib, pframe)) -+ rtw_ft_update_ftie(padapter, pattrib, pframe); -+} -+ -+u8 rtw_ft_update_auth_rsp_ies(_adapter *padapter, u8 *pframe, u32 len) -+{ -+ u8 ret = _SUCCESS; -+ u8 target_ap_addr[ETH_ALEN] = {0}; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct ft_roam_info *pft_roam = &(pmlmepriv->ft_roam); -+ -+ if (!rtw_ft_roam(padapter)) -+ return _FAIL; -+ -+ /*rtw_ft_report_reassoc_evt already, -+ * and waiting for cfg80211_rtw_update_ft_ies */ -+ if (rtw_ft_authed_sta(padapter)) -+ return ret; -+ -+ if (!pframe || !len) -+ return _FAIL; -+ -+ rtw_buf_update(&pmlmepriv->auth_rsp, -+ &pmlmepriv->auth_rsp_len, pframe, len); -+ pft_roam->ft_event.ies = -+ (pmlmepriv->auth_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6); -+ pft_roam->ft_event.ies_len = -+ (pmlmepriv->auth_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6); -+ -+ /*Not support RIC*/ -+ pft_roam->ft_event.ric_ies = NULL; -+ pft_roam->ft_event.ric_ies_len = 0; -+ _rtw_memcpy(target_ap_addr, pmlmepriv->assoc_bssid, ETH_ALEN); -+ rtw_ft_report_reassoc_evt(padapter, target_ap_addr); -+ -+ return ret; -+} -+ -+static void rtw_ft_start_clnt_action(_adapter *padapter, u8 *pTargetAddr) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ rtw_ft_set_status(padapter, RTW_FT_REQUESTING_STA); -+ rtw_ft_issue_action_req(padapter, pTargetAddr); -+ _set_timer(&pmlmeext->ft_link_timer, REASSOC_TO); -+} -+ -+void rtw_ft_start_roam(_adapter *padapter, u8 *pTargetAddr) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ if (rtw_ft_otd_roam(padapter)) { -+ RTW_FT_INFO("%s : try OTD roaming\n", __func__); -+ rtw_ft_start_clnt_action(padapter, pTargetAddr); -+ } else { -+ /*wait a little time to retrieve packets buffered in the current ap while scan*/ -+ RTW_FT_INFO("%s : start roaming timer\n", __func__); -+ _set_timer(&pmlmeext->ft_roam_timer, 30); -+ } -+} -+ -+void rtw_ft_issue_action_req(_adapter *padapter, u8 *pTargetAddr) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct xmit_frame *pmgntframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct pkt_attrib *pattrib; -+ u8 *pframe; -+ u8 category = RTW_WLAN_CATEGORY_FT; -+ u8 action = RTW_WLAN_ACTION_FT_REQ; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ pwlanhdr->frame_ctl = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ -+ _rtw_memcpy(pframe, adapter_mac_addr(padapter), ETH_ALEN); -+ pframe += ETH_ALEN; -+ pattrib->pktlen += ETH_ALEN; -+ -+ _rtw_memcpy(pframe, pTargetAddr, ETH_ALEN); -+ pframe += ETH_ALEN; -+ pattrib->pktlen += ETH_ALEN; -+ -+ rtw_ft_update_mdie(padapter, pattrib, &pframe); -+ if (rtw_ft_update_rsnie(padapter, _TRUE, pattrib, &pframe)) -+ rtw_ft_update_ftie(padapter, pattrib, &pframe); -+ -+ RTW_INFO("FT : issue RTW_WLAN_ACTION_FT_REQ\n"); -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+} -+ -+void rtw_ft_report_evt(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct ft_roam_info *pft_roam = &(pmlmepriv->ft_roam); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&(pmlmeinfo->network); -+ struct cfg80211_ft_event_params ft_evt_parms; -+ _irqL irqL; -+ -+ _rtw_memset(&ft_evt_parms, 0, sizeof(ft_evt_parms)); -+ rtw_ft_update_stainfo(padapter, pnetwork); -+ -+ if (!pnetwork) -+ goto err_2; -+ -+ ft_evt_parms.ies_len = pft_roam->ft_event.ies_len; -+ ft_evt_parms.ies = rtw_zmalloc(ft_evt_parms.ies_len); -+ if (ft_evt_parms.ies) -+ _rtw_memcpy((void *)ft_evt_parms.ies, pft_roam->ft_event.ies, ft_evt_parms.ies_len); -+ else -+ goto err_2; -+ -+ ft_evt_parms.target_ap = rtw_zmalloc(ETH_ALEN); -+ if (ft_evt_parms.target_ap) -+ _rtw_memcpy((void *)ft_evt_parms.target_ap, pnetwork->MacAddress, ETH_ALEN); -+ else -+ goto err_1; -+ -+ ft_evt_parms.ric_ies = pft_roam->ft_event.ric_ies; -+ ft_evt_parms.ric_ies_len = pft_roam->ft_event.ric_ies_len; -+ -+ /* It's a KERNEL issue between v4.11 ~ v4.16, -+ * <= v4.10, NLMSG_DEFAULT_SIZE is used for nlmsg_new(). -+ * v4.11 ~ v4.16, only used "100 + >ric_ies_len" for nlmsg_new() -+ * even then DRIVER don't support RIC. -+ * >= v4.17, issue should correct as "100 + ies_len + ric_ies_len". -+ */ -+ #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)) && \ -+ (LINUX_VERSION_CODE < KERNEL_VERSION(4, 17, 0))) -+ ft_evt_parms.ric_ies_len = (ft_evt_parms.ies_len <= 100 )? -+ (0):(ft_evt_parms.ies_len - 100); -+ #endif -+ -+ rtw_ft_lock_set_status(padapter, RTW_FT_AUTHENTICATED_STA, &irqL); -+ rtw_cfg80211_ft_event(padapter, &ft_evt_parms); -+ RTW_INFO("FT: rtw_ft_report_evt\n"); -+ rtw_mfree((u8 *)pft_roam->ft_event.target_ap, ETH_ALEN); -+err_1: -+ rtw_mfree((u8 *)ft_evt_parms.ies, ft_evt_parms.ies_len); -+err_2: -+ return; -+} -+ -+void rtw_ft_report_reassoc_evt(_adapter *padapter, u8 *pMacAddr) -+{ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); -+ struct cmd_obj *pcmd_obj = NULL; -+ struct stassoc_event *passoc_sta_evt = NULL; -+ struct rtw_evt_header *evt_hdr = NULL; -+ u8 *pevtcmd = NULL; -+ u32 cmdsz = 0; -+ -+ pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd_obj == NULL) -+ return; -+ -+ cmdsz = (sizeof(struct stassoc_event) + sizeof(struct rtw_evt_header)); -+ pevtcmd = (u8 *)rtw_zmalloc(cmdsz); -+ if (pevtcmd == NULL) { -+ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); -+ return; -+ } -+ -+ _rtw_init_listhead(&pcmd_obj->list); -+ pcmd_obj->cmdcode = CMD_SET_MLME_EVT; -+ pcmd_obj->cmdsz = cmdsz; -+ pcmd_obj->parmbuf = pevtcmd; -+ pcmd_obj->rsp = NULL; -+ pcmd_obj->rspsz = 0; -+ -+ evt_hdr = (struct rtw_evt_header *)(pevtcmd); -+ evt_hdr->len = sizeof(struct stassoc_event); -+ evt_hdr->id = EVT_FT_REASSOC; -+ evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); -+ -+ passoc_sta_evt = (struct stassoc_event *)(pevtcmd + sizeof(struct rtw_evt_header)); -+ _rtw_memcpy((unsigned char *)(&(passoc_sta_evt->macaddr)), pMacAddr, ETH_ALEN); -+ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); -+} -+ -+void rtw_ft_link_timer_hdl(void *ctx) -+{ -+ _adapter *padapter = (_adapter *)ctx; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct ft_roam_info *pft_roam = &(pmlmepriv->ft_roam); -+ -+ if (rtw_ft_chk_status(padapter, RTW_FT_REQUESTING_STA)) { -+ if (pft_roam->ft_req_retry_cnt < RTW_FT_ACTION_REQ_LMT) { -+ pft_roam->ft_req_retry_cnt++; -+ rtw_ft_issue_action_req(padapter, (u8 *)pmlmepriv->roam_network->network.MacAddress); -+ _set_timer(&pmlmeext->ft_link_timer, REASSOC_TO); -+ } else { -+ pft_roam->ft_req_retry_cnt = 0; -+ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) -+ rtw_ft_set_status(padapter, RTW_FT_ASSOCIATED_STA); -+ else -+ rtw_ft_reset_status(padapter); -+ } -+ } -+} -+ -+void rtw_ft_roam_timer_hdl(void *ctx) -+{ -+ _adapter *padapter = (_adapter *)ctx; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ RTW_FT_INFO("%s : try roaming\n", __func__); -+ receive_disconnect(padapter, pmlmepriv->cur_network.network.MacAddress -+ , WLAN_REASON_ACTIVE_ROAM, _FALSE); -+} -+ -+void rtw_ft_roam_status_reset(_adapter *padapter) -+{ -+ struct ft_roam_info *pft_roam = &(padapter->mlmepriv.ft_roam); -+ -+ if ((rtw_to_roam(padapter) > 0) && -+ (!rtw_ft_chk_status(padapter, RTW_FT_REQUESTED_STA))) { -+ rtw_ft_reset_status(padapter); -+ } -+ -+ padapter->mlmepriv.ft_roam.ft_updated_bcn = _FALSE; -+} -+ -+#endif /* CONFIG_RTW_80211R */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_ieee80211.c b/drivers/staging/rtl8723cs/core/rtw_ieee80211.c -new file mode 100644 -index 000000000000..d37273216a31 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_ieee80211.c -@@ -0,0 +1,3166 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _IEEE80211_C -+ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ #include -+#endif -+#include -+#include -+ -+u8 RTW_WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 }; -+u16 RTW_WPA_VERSION = 1; -+u8 WPA_AUTH_KEY_MGMT_NONE[] = { 0x00, 0x50, 0xf2, 0 }; -+u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x50, 0xf2, 1 }; -+u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x50, 0xf2, 2 }; -+u8 WPA_CIPHER_SUITE_NONE[] = { 0x00, 0x50, 0xf2, 0 }; -+u8 WPA_CIPHER_SUITE_WEP40[] = { 0x00, 0x50, 0xf2, 1 }; -+u8 WPA_CIPHER_SUITE_TKIP[] = { 0x00, 0x50, 0xf2, 2 }; -+u8 WPA_CIPHER_SUITE_WRAP[] = { 0x00, 0x50, 0xf2, 3 }; -+u8 WPA_CIPHER_SUITE_CCMP[] = { 0x00, 0x50, 0xf2, 4 }; -+u8 WPA_CIPHER_SUITE_WEP104[] = { 0x00, 0x50, 0xf2, 5 }; -+ -+u16 RSN_VERSION_BSD = 1; -+u8 RSN_CIPHER_SUITE_NONE[] = { 0x00, 0x0f, 0xac, 0 }; -+u8 RSN_CIPHER_SUITE_WEP40[] = { 0x00, 0x0f, 0xac, 1 }; -+u8 RSN_CIPHER_SUITE_TKIP[] = { 0x00, 0x0f, 0xac, 2 }; -+u8 RSN_CIPHER_SUITE_WRAP[] = { 0x00, 0x0f, 0xac, 3 }; -+u8 RSN_CIPHER_SUITE_CCMP[] = { 0x00, 0x0f, 0xac, 4 }; -+u8 RSN_CIPHER_SUITE_AES_128_CMAC[] = { 0x00, 0x0f, 0xac, 6 }; -+u8 RSN_CIPHER_SUITE_GCMP[] = { 0x00, 0x0f, 0xac, 8 }; -+u8 RSN_CIPHER_SUITE_GCMP_256[] = { 0x00, 0x0f, 0xac, 9 }; -+u8 RSN_CIPHER_SUITE_CCMP_256[] = { 0x00, 0x0f, 0xac, 10 }; -+u8 RSN_CIPHER_SUITE_BIP_GMAC_128[] = { 0x00, 0x0f, 0xac, 11 }; -+u8 RSN_CIPHER_SUITE_BIP_GMAC_256[] = { 0x00, 0x0f, 0xac, 12 }; -+u8 RSN_CIPHER_SUITE_BIP_CMAC_256[] = { 0x00, 0x0f, 0xac, 13 }; -+u8 RSN_CIPHER_SUITE_WEP104[] = { 0x00, 0x0f, 0xac, 5 }; -+ -+u8 WLAN_AKM_8021X[] = {0x00, 0x0f, 0xac, 1}; -+u8 WLAN_AKM_PSK[] = {0x00, 0x0f, 0xac, 2}; -+u8 WLAN_AKM_FT_8021X[] = {0x00, 0x0f, 0xac, 3}; -+u8 WLAN_AKM_FT_PSK[] = {0x00, 0x0f, 0xac, 4}; -+u8 WLAN_AKM_8021X_SHA256[] = {0x00, 0x0f, 0xac, 5}; -+u8 WLAN_AKM_PSK_SHA256[] = {0x00, 0x0f, 0xac, 6}; -+u8 WLAN_AKM_TDLS[] = {0x00, 0x0f, 0xac, 7}; -+u8 WLAN_AKM_SAE[] = {0x00, 0x0f, 0xac, 8}; -+u8 WLAN_AKM_FT_OVER_SAE[] = {0x00, 0x0f, 0xac, 9}; -+u8 WLAN_AKM_8021X_SUITE_B[] = {0x00, 0x0f, 0xac, 11}; -+u8 WLAN_AKM_8021X_SUITE_B_192[] = {0x00, 0x0f, 0xac, 12}; -+u8 WLAN_AKM_FILS_SHA256[] = {0x00, 0x0f, 0xac, 14}; -+u8 WLAN_AKM_FILS_SHA384[] = {0x00, 0x0f, 0xac, 15}; -+u8 WLAN_AKM_FT_FILS_SHA256[] = {0x00, 0x0f, 0xac, 16}; -+u8 WLAN_AKM_FT_FILS_SHA384[] = {0x00, 0x0f, 0xac, 17}; -+/* ----------------------------------------------------------- -+ * for adhoc-master to generate ie and provide supported-rate to fw -+ * ----------------------------------------------------------- */ -+ -+u8 WIFI_CCKRATES[] = { -+ (IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK), -+ (IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK), -+ (IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK), -+ (IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK) -+}; -+ -+u8 WIFI_OFDMRATES[] = { -+ (IEEE80211_OFDM_RATE_6MB), -+ (IEEE80211_OFDM_RATE_9MB), -+ (IEEE80211_OFDM_RATE_12MB), -+ (IEEE80211_OFDM_RATE_18MB), -+ (IEEE80211_OFDM_RATE_24MB), -+ IEEE80211_OFDM_RATE_36MB, -+ IEEE80211_OFDM_RATE_48MB, -+ IEEE80211_OFDM_RATE_54MB -+}; -+ -+const char *MGN_RATE_STR(enum MGN_RATE rate) -+{ -+ u8 hw_rate; -+ -+ if (rate == MGN_MCS32) -+ return "MCS32"; -+ -+ hw_rate = MRateToHwRate(rate); -+ if (hw_rate == DESC_RATE1M && rate != MGN_1M) -+ hw_rate = DESC_RATE_NUM; /* invalid case */ -+ -+ return HDATA_RATE(hw_rate); -+} -+ -+u8 mgn_rates_cck[4] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; -+u8 mgn_rates_ofdm[8] = {MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M}; -+u8 mgn_rates_mcs0_7[8] = {MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7}; -+u8 mgn_rates_mcs8_15[8] = {MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15}; -+u8 mgn_rates_mcs16_23[8] = {MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23}; -+u8 mgn_rates_mcs24_31[8] = {MGN_MCS24, MGN_MCS25, MGN_MCS26, MGN_MCS27, MGN_MCS28, MGN_MCS29, MGN_MCS30, MGN_MCS31}; -+u8 mgn_rates_vht1ss[10] = {MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4 -+ , MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9 -+ }; -+u8 mgn_rates_vht2ss[10] = {MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4 -+ , MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9 -+ }; -+u8 mgn_rates_vht3ss[10] = {MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4 -+ , MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9 -+ }; -+u8 mgn_rates_vht4ss[10] = {MGN_VHT4SS_MCS0, MGN_VHT4SS_MCS1, MGN_VHT4SS_MCS2, MGN_VHT4SS_MCS3, MGN_VHT4SS_MCS4 -+ , MGN_VHT4SS_MCS5, MGN_VHT4SS_MCS6, MGN_VHT4SS_MCS7, MGN_VHT4SS_MCS8, MGN_VHT4SS_MCS9 -+ }; -+ -+RATE_SECTION mgn_rate_to_rs(enum MGN_RATE rate) -+{ -+ RATE_SECTION rs = RATE_SECTION_NUM; -+ -+ if (IS_CCK_RATE(rate)) -+ rs = CCK; -+ else if (IS_OFDM_RATE(rate)) -+ rs = OFDM; -+ else if (IS_HT1SS_RATE(rate)) -+ rs = HT_1SS; -+ else if (IS_HT2SS_RATE(rate)) -+ rs = HT_2SS; -+ else if (IS_HT3SS_RATE(rate)) -+ rs = HT_3SS; -+ else if (IS_HT4SS_RATE(rate)) -+ rs = HT_4SS; -+ else if (IS_VHT1SS_RATE(rate)) -+ rs = VHT_1SS; -+ else if (IS_VHT2SS_RATE(rate)) -+ rs = VHT_2SS; -+ else if (IS_VHT3SS_RATE(rate)) -+ rs = VHT_3SS; -+ else if (IS_VHT4SS_RATE(rate)) -+ rs = VHT_4SS; -+ -+ return rs; -+} -+ -+static const char *const _rate_section_str[] = { -+ "CCK", -+ "OFDM", -+ "HT_1SS", -+ "HT_2SS", -+ "HT_3SS", -+ "HT_4SS", -+ "VHT_1SS", -+ "VHT_2SS", -+ "VHT_3SS", -+ "VHT_4SS", -+ "RATE_SECTION_UNKNOWN", -+}; -+ -+const char *rate_section_str(u8 section) -+{ -+ section = (section >= RATE_SECTION_NUM) ? RATE_SECTION_NUM : section; -+ return _rate_section_str[section]; -+} -+ -+struct rate_section_ent rates_by_sections[RATE_SECTION_NUM] = { -+ {RF_1TX, 4, mgn_rates_cck}, -+ {RF_1TX, 8, mgn_rates_ofdm}, -+ {RF_1TX, 8, mgn_rates_mcs0_7}, -+ {RF_2TX, 8, mgn_rates_mcs8_15}, -+ {RF_3TX, 8, mgn_rates_mcs16_23}, -+ {RF_4TX, 8, mgn_rates_mcs24_31}, -+ {RF_1TX, 10, mgn_rates_vht1ss}, -+ {RF_2TX, 10, mgn_rates_vht2ss}, -+ {RF_3TX, 10, mgn_rates_vht3ss}, -+ {RF_4TX, 10, mgn_rates_vht4ss}, -+}; -+ -+int rtw_get_bit_value_from_ieee_value(u8 val) -+{ -+ unsigned char dot11_rate_table[] = {2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108, 0}; /* last element must be zero!! */ -+ -+ int i = 0; -+ while (dot11_rate_table[i] != 0) { -+ if (dot11_rate_table[i] == val) -+ return BIT(i); -+ i++; -+ } -+ return 0; -+} -+uint rtw_get_cckrate_size(u8 *rate, u32 rate_length) -+{ -+ int i = 0; -+ while(i < rate_length){ -+ RTW_DBG("%s, rate[%d]=%u\n", __FUNCTION__, i, rate[i]); -+ if (((rate[i] & 0x7f) == 2) || ((rate[i] & 0x7f) == 4) || -+ ((rate[i] & 0x7f) == 11) || ((rate[i] & 0x7f) == 22)) -+ i++; -+ else -+ break; -+ } -+ return i; -+} -+ -+uint rtw_is_cckrates_included(u8 *rate) -+{ -+ u32 i = 0; -+ -+ while (rate[i] != 0) { -+ if ((((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || -+ (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22)) -+ return _TRUE; -+ i++; -+ } -+ -+ return _FALSE; -+} -+ -+uint rtw_is_cckratesonly_included(u8 *rate) -+{ -+ u32 i = 0; -+ -+ -+ while (rate[i] != 0) { -+ if ((((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && -+ (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22)) -+ return _FALSE; -+ -+ i++; -+ } -+ -+ return _TRUE; -+ -+} -+ -+int rtw_check_network_type(unsigned char *rate, int ratelen, int channel) -+{ -+ if (channel > 14) { -+ if ((rtw_is_cckrates_included(rate)) == _TRUE) -+ return WIRELESS_INVALID; -+ else -+ return WIRELESS_11A; -+ } else { /* could be pure B, pure G, or B/G */ -+ if ((rtw_is_cckratesonly_included(rate)) == _TRUE) -+ return WIRELESS_11B; -+ else if ((rtw_is_cckrates_included(rate)) == _TRUE) -+ return WIRELESS_11BG; -+ else -+ return WIRELESS_11G; -+ } -+ -+} -+ -+u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source, -+ unsigned int *frlen) -+{ -+ _rtw_memcpy((void *)pbuf, (void *)source, len); -+ *frlen = *frlen + len; -+ return pbuf + len; -+} -+ -+/* rtw_set_ie will update frame length */ -+u8 *rtw_set_ie -+( -+ u8 *pbuf, -+ sint index, -+ uint len, -+ const u8 *source, -+ uint *frlen /* frame length */ -+) -+{ -+ *pbuf = (u8)index; -+ -+ *(pbuf + 1) = (u8)len; -+ -+ if (len > 0) -+ _rtw_memcpy((void *)(pbuf + 2), (void *)source, len); -+ -+ if (frlen) -+ *frlen = *frlen + (len + 2); -+ -+ return pbuf + len + 2; -+} -+ -+inline u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode, -+ u8 new_ch, u8 ch_switch_cnt) -+{ -+ u8 ie_data[3]; -+ -+ ie_data[0] = ch_switch_mode; -+ ie_data[1] = new_ch; -+ ie_data[2] = ch_switch_cnt; -+ return rtw_set_ie(buf, WLAN_EID_CHANNEL_SWITCH, 3, ie_data, buf_len); -+} -+ -+inline u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset) -+{ -+ if (ch_offset == SCN) -+ return HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ else if (ch_offset == SCA) -+ return HAL_PRIME_CHNL_OFFSET_LOWER; -+ else if (ch_offset == SCB) -+ return HAL_PRIME_CHNL_OFFSET_UPPER; -+ -+ return HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+} -+ -+inline u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset) -+{ -+ if (ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) -+ return SCN; -+ else if (ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) -+ return SCA; -+ else if (ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) -+ return SCB; -+ -+ return SCN; -+} -+ -+inline u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset) -+{ -+ return rtw_set_ie(buf, WLAN_EID_SECONDARY_CHANNEL_OFFSET, 1, &secondary_ch_offset, buf_len); -+} -+ -+inline u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl, -+ u8 flags, u16 reason, u16 precedence) -+{ -+ u8 ie_data[6]; -+ -+ ie_data[0] = ttl; -+ ie_data[1] = flags; -+ RTW_PUT_LE16((u8 *)&ie_data[2], reason); -+ RTW_PUT_LE16((u8 *)&ie_data[4], precedence); -+ -+ return rtw_set_ie(buf, 0x118, 6, ie_data, buf_len); -+} -+ -+/*---------------------------------------------------------------------------- -+index: the information element id index, limit is the limit for search -+-----------------------------------------------------------------------------*/ -+u8 *rtw_get_ie(const u8 *pbuf, sint index, sint *len, sint limit) -+{ -+ sint tmp, i; -+ const u8 *p; -+ if (limit < 1) { -+ return NULL; -+ } -+ -+ p = pbuf; -+ i = 0; -+ *len = 0; -+ while (1) { -+ if (*p == index) { -+ *len = *(p + 1); -+ return (u8 *)p; -+ } else { -+ tmp = *(p + 1); -+ p += (tmp + 2); -+ i += (tmp + 2); -+ } -+ if (i >= limit) -+ break; -+ } -+ return NULL; -+} -+ -+/** -+ * rtw_get_ie_ex - Search specific IE from a series of IEs -+ * @in_ie: Address of IEs to search -+ * @in_len: Length limit from in_ie -+ * @eid: Element ID to match -+ * @oui: OUI to match -+ * @oui_len: OUI length -+ * @ie: If not NULL and the specific IE is found, the IE will be copied to the buf starting from the specific IE -+ * @ielen: If not NULL and the specific IE is found, will set to the length of the entire IE -+ * -+ * Returns: The address of the specific IE found, or NULL -+ */ -+u8 *rtw_get_ie_ex(const u8 *in_ie, uint in_len, u8 eid, const u8 *oui, u8 oui_len, u8 *ie, uint *ielen) -+{ -+ uint cnt; -+ const u8 *target_ie = NULL; -+ -+ -+ if (ielen) -+ *ielen = 0; -+ -+ if (!in_ie || in_len <= 0) -+ return (u8 *)target_ie; -+ -+ cnt = 0; -+ -+ while (cnt < in_len) { -+ if (eid == in_ie[cnt] -+ && (!oui || _rtw_memcmp(&in_ie[cnt + 2], oui, oui_len) == _TRUE)) { -+ target_ie = &in_ie[cnt]; -+ -+ if (ie) -+ _rtw_memcpy(ie, &in_ie[cnt], in_ie[cnt + 1] + 2); -+ -+ if (ielen) -+ *ielen = in_ie[cnt + 1] + 2; -+ -+ break; -+ } else { -+ cnt += in_ie[cnt + 1] + 2; /* goto next */ -+ } -+ -+ } -+ -+ return (u8 *)target_ie; -+} -+ -+/** -+ * rtw_ies_remove_ie - Find matching IEs and remove -+ * @ies: Address of IEs to search -+ * @ies_len: Pointer of length of ies, will update to new length -+ * @offset: The offset to start scarch -+ * @eid: Element ID to match -+ * @oui: OUI to match -+ * @oui_len: OUI length -+ * -+ * Returns: _SUCCESS: ies is updated, _FAIL: not updated -+ */ -+int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset, u8 eid, u8 *oui, u8 oui_len) -+{ -+ int ret = _FAIL; -+ u8 *target_ie; -+ u32 target_ielen; -+ u8 *start; -+ uint search_len; -+ -+ if (!ies || !ies_len || *ies_len <= offset) -+ goto exit; -+ -+ start = ies + offset; -+ search_len = *ies_len - offset; -+ -+ while (1) { -+ target_ie = rtw_get_ie_ex(start, search_len, eid, oui, oui_len, NULL, &target_ielen); -+ if (target_ie && target_ielen) { -+ u8 *remain_ies = target_ie + target_ielen; -+ uint remain_len = search_len - (remain_ies - start); -+ -+ _rtw_memmove(target_ie, remain_ies, remain_len); -+ *ies_len = *ies_len - target_ielen; -+ ret = _SUCCESS; -+ -+ start = target_ie; -+ search_len = remain_len; -+ } else -+ break; -+ } -+exit: -+ return ret; -+} -+ -+void rtw_set_supported_rate(u8 *SupportedRates, uint mode) -+{ -+ -+ _rtw_memset(SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX); -+ -+ switch (mode) { -+ case WIRELESS_11B: -+ _rtw_memcpy(SupportedRates, WIFI_CCKRATES, IEEE80211_CCK_RATE_LEN); -+ break; -+ -+ case WIRELESS_11G: -+ case WIRELESS_11A: -+ case WIRELESS_11_5N: -+ case WIRELESS_11A_5N: /* Todo: no basic rate for ofdm ? */ -+ case WIRELESS_11_5AC: -+ _rtw_memcpy(SupportedRates, WIFI_OFDMRATES, IEEE80211_NUM_OFDM_RATESLEN); -+ break; -+ -+ case WIRELESS_11BG: -+ case WIRELESS_11G_24N: -+ case WIRELESS_11_24N: -+ case WIRELESS_11BG_24N: -+ _rtw_memcpy(SupportedRates, WIFI_CCKRATES, IEEE80211_CCK_RATE_LEN); -+ _rtw_memcpy(SupportedRates + IEEE80211_CCK_RATE_LEN, WIFI_OFDMRATES, IEEE80211_NUM_OFDM_RATESLEN); -+ break; -+ -+ } -+} -+ -+void rtw_filter_suppport_rateie(WLAN_BSSID_EX *pbss_network, u8 keep) -+{ -+ u8 i, idx = 0, new_rate[NDIS_802_11_LENGTH_RATES_EX], *p; -+ uint iscck, isofdm, ie_orilen = 0, remain_len; -+ u8 *remain_ies; -+ -+ p = rtw_get_ie(pbss_network->IEs + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_orilen, (pbss_network->IELength - _BEACON_IE_OFFSET_)); -+ if (!p) -+ return; -+ -+ _rtw_memset(new_rate, 0, NDIS_802_11_LENGTH_RATES_EX); -+ for (i=0; i < ie_orilen; i++) { -+ iscck = rtw_is_cck_rate(p[i+2]); -+ isofdm= rtw_is_ofdm_rate(p[i+2]); -+ if (((keep == CCK) && iscck) -+ || ((keep == OFDM) && isofdm)) -+ new_rate[idx++]= rtw_is_basic_rate_ofdm(p[i+2]) ? p[i+2]|IEEE80211_BASIC_RATE_MASK : p[i+2]; -+ } -+ /* update rate ie */ -+ p[1] = idx; -+ _rtw_memcpy(p+2, new_rate, idx); -+ /* update remain ie & IELength*/ -+ remain_ies = p + 2 + ie_orilen; -+ remain_len = pbss_network->IELength - (remain_ies - pbss_network->IEs); -+ _rtw_memmove(p+2+idx, remain_ies, remain_len); -+ pbss_network->IELength -= (ie_orilen - idx); -+} -+ -+ -+/* -+ Adjust those items by given wireless_mode -+ 1. pbss_network->IELength -+ 2. pbss_network->IE (SUPPORTRATE & EXT_SUPPORTRATE) -+ 3. pbss_network->SupportedRates -+*/ -+ -+u8 rtw_update_rate_bymode(WLAN_BSSID_EX *pbss_network, u32 mode) -+{ -+ u8 network_type, *p, *ie = pbss_network->IEs; -+ sint ie_len; -+ uint network_ielen = pbss_network->IELength; -+ -+ if (mode == WIRELESS_11B) { -+ /*only keep CCK in support_rate IE and remove whole ext_support_rate IE*/ -+ rtw_filter_suppport_rateie(pbss_network, CCK); -+ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); -+ if (p) { -+ rtw_ies_remove_ie(ie , &network_ielen, _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, NULL, 0); -+ pbss_network->IELength -= ie_len; -+ } -+ network_type = WIRELESS_11B; -+ } else { -+ if (pbss_network->Configuration.DSConfig > 14) { -+ /* Remove CCK in support_rate IE */ -+ rtw_filter_suppport_rateie(pbss_network, OFDM); -+ network_type = WIRELESS_11A; -+ } else { -+ if ((mode & WIRELESS_11B) == 0) { -+ /* Remove CCK in support_rate IE */ -+ rtw_filter_suppport_rateie(pbss_network, OFDM); -+ network_type = WIRELESS_11G; -+ } else { -+ network_type = WIRELESS_11BG; -+ } -+ } -+ } -+ -+ rtw_set_supported_rate(pbss_network->SupportedRates, network_type); -+ -+ return network_type; -+} -+ -+uint rtw_get_rateset_len(u8 *rateset) -+{ -+ uint i = 0; -+ while (1) { -+ if ((rateset[i]) == 0) -+ break; -+ -+ if (i > 12) -+ break; -+ -+ i++; -+ } -+ return i; -+} -+ -+int rtw_generate_ie(struct registry_priv *pregistrypriv) -+{ -+ u8 wireless_mode; -+ int sz = 0, rateLen; -+ WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network; -+ u8 *ie = pdev_network->IEs; -+ -+ -+ /* timestamp will be inserted by hardware */ -+ sz += 8; -+ ie += sz; -+ -+ /* beacon interval : 2bytes */ -+ *(u16 *)ie = cpu_to_le16((u16)pdev_network->Configuration.BeaconPeriod); /* BCN_INTERVAL; */ -+ sz += 2; -+ ie += 2; -+ -+ /* capability info */ -+ *(u16 *)ie = 0; -+ -+ *(u16 *)ie |= cpu_to_le16(cap_IBSS); -+ -+ if (pregistrypriv->preamble == PREAMBLE_SHORT) -+ *(u16 *)ie |= cpu_to_le16(cap_ShortPremble); -+ -+ if (pdev_network->Privacy) -+ *(u16 *)ie |= cpu_to_le16(cap_Privacy); -+ -+ sz += 2; -+ ie += 2; -+ -+ /* SSID */ -+ ie = rtw_set_ie(ie, _SSID_IE_, pdev_network->Ssid.SsidLength, pdev_network->Ssid.Ssid, &sz); -+ -+ /* supported rates */ -+ if (pregistrypriv->wireless_mode == WIRELESS_11ABGN) { -+ if (pdev_network->Configuration.DSConfig > 14) -+ wireless_mode = WIRELESS_11A_5N; -+ else -+ wireless_mode = WIRELESS_11BG_24N; -+ } else if (pregistrypriv->wireless_mode == WIRELESS_MODE_MAX) { /* WIRELESS_11ABGN | WIRELESS_11AC */ -+ if (pdev_network->Configuration.DSConfig > 14) -+ wireless_mode = WIRELESS_11_5AC; -+ else -+ wireless_mode = WIRELESS_11BG_24N; -+ } else -+ wireless_mode = pregistrypriv->wireless_mode; -+ -+ rtw_set_supported_rate(pdev_network->SupportedRates, wireless_mode) ; -+ -+ rateLen = rtw_get_rateset_len(pdev_network->SupportedRates); -+ -+ if (rateLen > 8) { -+ ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, pdev_network->SupportedRates, &sz); -+ /* ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz); */ -+ } else -+ ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, rateLen, pdev_network->SupportedRates, &sz); -+ -+ /* DS parameter set */ -+ ie = rtw_set_ie(ie, _DSSET_IE_, 1, (u8 *)&(pdev_network->Configuration.DSConfig), &sz); -+ -+ -+ /* IBSS Parameter Set */ -+ -+ ie = rtw_set_ie(ie, _IBSS_PARA_IE_, 2, (u8 *)&(pdev_network->Configuration.ATIMWindow), &sz); -+ -+ if (rateLen > 8) -+ ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz); -+ -+#ifdef CONFIG_80211N_HT -+ /* HT Cap. */ -+ if (is_supported_ht(pregistrypriv->wireless_mode) -+ && (pregistrypriv->ht_enable == _TRUE)) { -+ /* todo: */ -+ } -+#endif /* CONFIG_80211N_HT */ -+ -+ /* pdev_network->IELength = sz; */ /* update IELength */ -+ -+ -+ /* return _SUCCESS; */ -+ -+ return sz; -+ -+} -+ -+unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit) -+{ -+ int len; -+ u16 val16; -+ unsigned char wpa_oui_type[] = {0x00, 0x50, 0xf2, 0x01}; -+ u8 *pbuf = pie; -+ int limit_new = limit; -+ -+ while (1) { -+ pbuf = rtw_get_ie(pbuf, _WPA_IE_ID_, &len, limit_new); -+ -+ if (pbuf) { -+ -+ /* check if oui matches... */ -+ if (_rtw_memcmp((pbuf + 2), wpa_oui_type, sizeof(wpa_oui_type)) == _FALSE) -+ -+ goto check_next_ie; -+ -+ /* check version... */ -+ _rtw_memcpy((u8 *)&val16, (pbuf + 6), sizeof(val16)); -+ -+ val16 = le16_to_cpu(val16); -+ if (val16 != 0x0001) -+ goto check_next_ie; -+ -+ *wpa_ie_len = *(pbuf + 1); -+ -+ return pbuf; -+ -+ } else { -+ -+ *wpa_ie_len = 0; -+ return NULL; -+ } -+ -+check_next_ie: -+ -+ limit_new = limit - (pbuf - pie) - 2 - len; -+ -+ if (limit_new <= 0) -+ break; -+ -+ pbuf += (2 + len); -+ -+ } -+ -+ *wpa_ie_len = 0; -+ -+ return NULL; -+ -+} -+ -+unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit) -+{ -+ -+ return rtw_get_ie(pie, _WPA2_IE_ID_, rsn_ie_len, limit); -+ -+} -+ -+int rtw_get_wpa_cipher_suite(u8 *s) -+{ -+ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_NONE, WPA_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_NONE; -+ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP40, WPA_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_WEP40; -+ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_TKIP, WPA_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_TKIP; -+ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_CCMP, WPA_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_CCMP; -+ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP104, WPA_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_WEP104; -+ -+ return 0; -+} -+ -+int rtw_get_rsn_cipher_suite(u8 *s) -+{ -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_NONE, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_NONE; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP40, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_WEP40; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_TKIP, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_TKIP; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_CCMP, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_CCMP; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_GCMP, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_GCMP; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_GCMP_256, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_GCMP_256; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_CCMP_256, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_CCMP_256; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP104, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_WEP104; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_AES_128_CMAC, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_BIP_CMAC_128; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_BIP_GMAC_128, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_BIP_GMAC_128; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_BIP_GMAC_256, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_BIP_GMAC_256; -+ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_BIP_CMAC_256, RSN_SELECTOR_LEN) == _TRUE) -+ return WPA_CIPHER_BIP_CMAC_256; -+ return 0; -+} -+ -+u32 rtw_get_akm_suite_bitmap(u8 *s) -+{ -+ if (_rtw_memcmp(s, WLAN_AKM_8021X, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_8021X; -+ if (_rtw_memcmp(s, WLAN_AKM_PSK, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_PSK; -+ if (_rtw_memcmp(s, WLAN_AKM_FT_8021X, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_FT_8021X; -+ if (_rtw_memcmp(s, WLAN_AKM_FT_PSK, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_FT_PSK; -+ if (_rtw_memcmp(s, WLAN_AKM_8021X_SHA256, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_8021X_SHA256; -+ if (_rtw_memcmp(s, WLAN_AKM_PSK_SHA256, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_PSK_SHA256; -+ if (_rtw_memcmp(s, WLAN_AKM_TDLS, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_TDLS; -+ if (_rtw_memcmp(s, WLAN_AKM_SAE, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_SAE; -+ if (_rtw_memcmp(s, WLAN_AKM_FT_OVER_SAE, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_FT_OVER_SAE; -+ if (_rtw_memcmp(s, WLAN_AKM_8021X_SUITE_B, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_8021X_SUITE_B; -+ if (_rtw_memcmp(s, WLAN_AKM_8021X_SUITE_B_192, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_8021X_SUITE_B_192; -+ if (_rtw_memcmp(s, WLAN_AKM_FILS_SHA256, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_FILS_SHA256; -+ if (_rtw_memcmp(s, WLAN_AKM_FILS_SHA384, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_FILS_SHA384; -+ if (_rtw_memcmp(s, WLAN_AKM_FT_FILS_SHA256, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_FT_FILS_SHA256; -+ if (_rtw_memcmp(s, WLAN_AKM_FT_FILS_SHA384, RSN_SELECTOR_LEN) == _TRUE) -+ return WLAN_AKM_TYPE_FT_FILS_SHA384; -+ -+ return 0; -+} -+ -+int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, -+ int *pairwise_cipher, u32 *akm) -+{ -+ int i, ret = _SUCCESS; -+ int left, count; -+ u8 *pos; -+ u8 SUITE_1X[4] = {0x00, 0x50, 0xf2, 1}; -+ -+ if (wpa_ie_len <= 0) { -+ /* No WPA IE - fail silently */ -+ return _FAIL; -+ } -+ -+ -+ if ((*wpa_ie != _WPA_IE_ID_) || (*(wpa_ie + 1) != (u8)(wpa_ie_len - 2)) || -+ (_rtw_memcmp(wpa_ie + 2, RTW_WPA_OUI_TYPE, WPA_SELECTOR_LEN) != _TRUE)) -+ return _FAIL; -+ -+ pos = wpa_ie; -+ -+ pos += 8; -+ left = wpa_ie_len - 8; -+ -+ -+ /* group_cipher */ -+ if (left >= WPA_SELECTOR_LEN) { -+ -+ *group_cipher = rtw_get_wpa_cipher_suite(pos); -+ -+ pos += WPA_SELECTOR_LEN; -+ left -= WPA_SELECTOR_LEN; -+ -+ } else if (left > 0) { -+ -+ return _FAIL; -+ } -+ -+ -+ /* pairwise_cipher */ -+ if (left >= 2) { -+ /* count = le16_to_cpu(*(u16*)pos); */ -+ count = RTW_GET_LE16(pos); -+ pos += 2; -+ left -= 2; -+ -+ if (count == 0 || left < count * WPA_SELECTOR_LEN) { -+ return _FAIL; -+ } -+ -+ for (i = 0; i < count; i++) { -+ *pairwise_cipher |= rtw_get_wpa_cipher_suite(pos); -+ -+ pos += WPA_SELECTOR_LEN; -+ left -= WPA_SELECTOR_LEN; -+ } -+ -+ } else if (left == 1) { -+ return _FAIL; -+ } -+ -+ if (akm) { -+ if (left >= 6) { -+ pos += 2; -+ if (_rtw_memcmp(pos, SUITE_1X, 4) == 1) { -+ *akm = WLAN_AKM_TYPE_8021X; -+ } -+ } -+ } -+ -+ return ret; -+ -+} -+ -+int rtw_rsne_info_parse(const u8 *ie, uint ie_len, struct rsne_info *info) -+{ -+ const u8 *pos = ie; -+ u16 ver; -+ u16 cnt; -+ -+ _rtw_memset(info, 0, sizeof(struct rsne_info)); -+ -+ if (ie + ie_len < pos + 4) -+ goto err; -+ -+ if (*ie != WLAN_EID_RSN || *(ie + 1) != ie_len - 2) -+ goto err; -+ pos += 2; -+ -+ /* Version */ -+ ver = RTW_GET_LE16(pos); -+ if(1 != ver) -+ goto err; -+ pos += 2; -+ -+ /* Group CS */ -+ if (ie + ie_len < pos + 4) { -+ if (ie + ie_len != pos) -+ goto err; -+ goto exit; -+ } -+ info->gcs = (u8 *)pos; -+ pos += 4; -+ -+ /* Pairwise CS */ -+ if (ie + ie_len < pos + 2) { -+ if (ie + ie_len != pos) -+ goto err; -+ goto exit; -+ } -+ cnt = RTW_GET_LE16(pos); -+ pos += 2; -+ if (ie + ie_len < pos + 4 * cnt) { -+ if (ie + ie_len != pos) -+ goto err; -+ goto exit; -+ } -+ info->pcs_cnt = cnt; -+ info->pcs_list = (u8 *)pos; -+ pos += 4 * cnt; -+ -+ /* AKM */ -+ if (ie + ie_len < pos + 2) { -+ if (ie + ie_len != pos) -+ goto err; -+ goto exit; -+ } -+ cnt = RTW_GET_LE16(pos); -+ pos += 2; -+ if (ie + ie_len < pos + 4 * cnt) { -+ if (ie + ie_len != pos) -+ goto err; -+ goto exit; -+ } -+ info->akm_cnt = cnt; -+ info->akm_list = (u8 *)pos; -+ pos += 4 * cnt; -+ -+ /* RSN cap */ -+ if (ie + ie_len < pos + 2) { -+ if (ie + ie_len != pos) -+ goto err; -+ goto exit; -+ } -+ info->cap = (u8 *)pos; -+ pos += 2; -+ -+ /* PMKID */ -+ if (ie + ie_len < pos + 2) { -+ if (ie + ie_len != pos) -+ goto err; -+ goto exit; -+ } -+ cnt = RTW_GET_LE16(pos); -+ pos += 2; -+ if (ie + ie_len < pos + 16 * cnt) -+ goto err; -+ info->pmkid_cnt = cnt; -+ info->pmkid_list = (u8 *)pos; -+ pos += 16 * cnt; -+ -+ /* Group Mgmt CS */ -+ if (ie + ie_len < pos + 4) { -+ if (ie + ie_len != pos) -+ goto err; -+ goto exit; -+ } -+ info->gmcs = (u8 *)pos; -+ -+exit: -+ return _SUCCESS; -+ -+err: -+ info->err = 1; -+ return _FAIL; -+} -+ -+int rtw_parse_wpa2_ie(u8 *rsn_ie, int rsn_ie_len, int *group_cipher, -+ int *pairwise_cipher, int *gmcs, u32 *akm, u8 *mfp_opt) -+{ -+ struct rsne_info info; -+ int i, ret = _SUCCESS; -+ -+ ret = rtw_rsne_info_parse(rsn_ie, rsn_ie_len, &info); -+ if (ret != _SUCCESS) -+ goto exit; -+ -+ if (group_cipher) { -+ if (info.gcs) -+ *group_cipher = rtw_get_rsn_cipher_suite(info.gcs); -+ else -+ *group_cipher = 0; -+ } -+ -+ if (pairwise_cipher) { -+ *pairwise_cipher = 0; -+ if (info.pcs_list) { -+ for (i = 0; i < info.pcs_cnt; i++) -+ *pairwise_cipher |= rtw_get_rsn_cipher_suite(info.pcs_list + 4 * i); -+ } -+ } -+ -+ if (gmcs) { -+ if (info.gmcs) -+ *gmcs = rtw_get_rsn_cipher_suite(info.gmcs); -+ else -+ *gmcs = WPA_CIPHER_BIP_CMAC_128; /* default value when absent */ -+ } -+ -+ if (akm) { -+ *akm = 0; -+ if (info.akm_list) { -+ for (i = 0; i < info.akm_cnt; i++) -+ *akm |= rtw_get_akm_suite_bitmap(info.akm_list + 4 * i); -+ } -+ } -+ -+ if (mfp_opt) { -+ *mfp_opt = MFP_NO; -+ if (info.cap) -+ *mfp_opt = GET_RSN_CAP_MFP_OPTION(info.cap); -+ } -+ -+exit: -+ return ret; -+} -+ -+/* #ifdef CONFIG_WAPI_SUPPORT */ -+int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len) -+{ -+ int len = 0; -+ u8 authmode; -+ uint cnt; -+ u8 wapi_oui1[4] = {0x0, 0x14, 0x72, 0x01}; -+ u8 wapi_oui2[4] = {0x0, 0x14, 0x72, 0x02}; -+ -+ -+ if (wapi_len) -+ *wapi_len = 0; -+ -+ if (!in_ie || in_len <= 0) -+ return len; -+ -+ cnt = (_TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_); -+ -+ while (cnt < in_len) { -+ authmode = in_ie[cnt]; -+ -+ /* if(authmode==_WAPI_IE_) */ -+ if (authmode == _WAPI_IE_ && (_rtw_memcmp(&in_ie[cnt + 6], wapi_oui1, 4) == _TRUE || -+ _rtw_memcmp(&in_ie[cnt + 6], wapi_oui2, 4) == _TRUE)) { -+ if (wapi_ie) -+ _rtw_memcpy(wapi_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); -+ -+ if (wapi_len) -+ *wapi_len = in_ie[cnt + 1] + 2; -+ -+ cnt += in_ie[cnt + 1] + 2; /* get next */ -+ } else { -+ cnt += in_ie[cnt + 1] + 2; /* get next */ -+ } -+ } -+ -+ if (wapi_len) -+ len = *wapi_len; -+ -+ -+ return len; -+ -+} -+/* #endif */ -+ -+int rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len, u8 *wpa_ie, u16 *wpa_len) -+{ -+ u8 authmode, sec_idx; -+ u8 wpa_oui[4] = {0x0, 0x50, 0xf2, 0x01}; -+ uint cnt; -+ -+ -+ /* Search required WPA or WPA2 IE and copy to sec_ie[ ] */ -+ -+ cnt = (_TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_); -+ -+ sec_idx = 0; -+ -+ while (cnt < in_len) { -+ authmode = in_ie[cnt]; -+ -+ if ((authmode == _WPA_IE_ID_) && (_rtw_memcmp(&in_ie[cnt + 2], &wpa_oui[0], 4) == _TRUE)) { -+ -+ if (wpa_ie) -+ _rtw_memcpy(wpa_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); -+ -+ *wpa_len = in_ie[cnt + 1] + 2; -+ cnt += in_ie[cnt + 1] + 2; /* get next */ -+ } else { -+ if (authmode == _WPA2_IE_ID_) { -+ -+ if (rsn_ie) -+ _rtw_memcpy(rsn_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); -+ -+ *rsn_len = in_ie[cnt + 1] + 2; -+ cnt += in_ie[cnt + 1] + 2; /* get next */ -+ } else { -+ cnt += in_ie[cnt + 1] + 2; /* get next */ -+ } -+ } -+ -+ } -+ -+ -+ return *rsn_len + *wpa_len; -+ -+} -+ -+u8 rtw_is_wps_ie(u8 *ie_ptr, uint *wps_ielen) -+{ -+ u8 match = _FALSE; -+ u8 eid, wps_oui[4] = {0x0, 0x50, 0xf2, 0x04}; -+ -+ if (ie_ptr == NULL) -+ return match; -+ -+ eid = ie_ptr[0]; -+ -+ if ((eid == _WPA_IE_ID_) && (_rtw_memcmp(&ie_ptr[2], wps_oui, 4) == _TRUE)) { -+ /* RTW_INFO("==> found WPS_IE.....\n"); */ -+ *wps_ielen = ie_ptr[1] + 2; -+ match = _TRUE; -+ } -+ return match; -+} -+ -+u8 *rtw_get_wps_ie_from_scan_queue(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen, enum bss_type frame_type) -+{ -+ u8 *wps = NULL; -+ -+ RTW_INFO("[%s] frame_type = %d\n", __FUNCTION__, frame_type); -+ switch (frame_type) { -+ case BSS_TYPE_BCN: -+ case BSS_TYPE_PROB_RSP: { -+ /* Beacon or Probe Response */ -+ wps = rtw_get_wps_ie(in_ie + _PROBERSP_IE_OFFSET_, in_len - _PROBERSP_IE_OFFSET_, wps_ie, wps_ielen); -+ break; -+ } -+ case BSS_TYPE_PROB_REQ: { -+ /* Probe Request */ -+ wps = rtw_get_wps_ie(in_ie + _PROBEREQ_IE_OFFSET_ , in_len - _PROBEREQ_IE_OFFSET_ , wps_ie, wps_ielen); -+ break; -+ } -+ default: -+ case BSS_TYPE_UNDEF: -+ break; -+ } -+ return wps; -+} -+ -+/** -+ * rtw_get_wps_ie - Search WPS IE from a series of IEs -+ * @in_ie: Address of IEs to search -+ * @in_len: Length limit from in_ie -+ * @wps_ie: If not NULL and WPS IE is found, WPS IE will be copied to the buf starting from wps_ie -+ * @wps_ielen: If not NULL and WPS IE is found, will set to the length of the entire WPS IE -+ * -+ * Returns: The address of the WPS IE found, or NULL -+ */ -+u8 *rtw_get_wps_ie(const u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen) -+{ -+ uint cnt; -+ const u8 *wpsie_ptr = NULL; -+ u8 eid, wps_oui[4] = {0x00, 0x50, 0xf2, 0x04}; -+ -+ if (wps_ielen) -+ *wps_ielen = 0; -+ -+ if (!in_ie) { -+ rtw_warn_on(1); -+ return (u8 *)wpsie_ptr; -+ } -+ -+ if (in_len <= 0) -+ return (u8 *)wpsie_ptr; -+ -+ cnt = 0; -+ -+ while (cnt + 1 + 4 < in_len) { -+ eid = in_ie[cnt]; -+ -+ if (cnt + 1 + 4 >= MAX_IE_SZ) { -+ rtw_warn_on(1); -+ return NULL; -+ } -+ -+ if (eid == WLAN_EID_VENDOR_SPECIFIC && _rtw_memcmp(&in_ie[cnt + 2], wps_oui, 4) == _TRUE) { -+ wpsie_ptr = in_ie + cnt; -+ -+ if (wps_ie) -+ _rtw_memcpy(wps_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); -+ -+ if (wps_ielen) -+ *wps_ielen = in_ie[cnt + 1] + 2; -+ -+ break; -+ } else -+ cnt += in_ie[cnt + 1] + 2; -+ -+ } -+ -+ return (u8 *)wpsie_ptr; -+} -+ -+/** -+ * rtw_get_wps_attr - Search a specific WPS attribute from a given WPS IE -+ * @wps_ie: Address of WPS IE to search -+ * @wps_ielen: Length limit from wps_ie -+ * @target_attr_id: The attribute ID of WPS attribute to search -+ * @buf_attr: If not NULL and the WPS attribute is found, WPS attribute will be copied to the buf starting from buf_attr -+ * @len_attr: If not NULL and the WPS attribute is found, will set to the length of the entire WPS attribute -+ * -+ * Returns: the address of the specific WPS attribute found, or NULL -+ */ -+u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id , u8 *buf_attr, u32 *len_attr) -+{ -+ u8 *attr_ptr = NULL; -+ u8 *target_attr_ptr = NULL; -+ u8 wps_oui[4] = {0x00, 0x50, 0xF2, 0x04}; -+ -+ if (len_attr) -+ *len_attr = 0; -+ -+ if ((wps_ie[0] != _VENDOR_SPECIFIC_IE_) || -+ (_rtw_memcmp(wps_ie + 2, wps_oui , 4) != _TRUE)) -+ return attr_ptr; -+ -+ /* 6 = 1(Element ID) + 1(Length) + 4(WPS OUI) */ -+ attr_ptr = wps_ie + 6; /* goto first attr */ -+ -+ while (attr_ptr - wps_ie < wps_ielen) { -+ /* 4 = 2(Attribute ID) + 2(Length) */ -+ u16 attr_id = RTW_GET_BE16(attr_ptr); -+ u16 attr_data_len = RTW_GET_BE16(attr_ptr + 2); -+ u16 attr_len = attr_data_len + 4; -+ -+ /* RTW_INFO("%s attr_ptr:%p, id:%u, length:%u\n", __FUNCTION__, attr_ptr, attr_id, attr_data_len); */ -+ if (attr_id == target_attr_id) { -+ target_attr_ptr = attr_ptr; -+ -+ if (buf_attr) -+ _rtw_memcpy(buf_attr, attr_ptr, attr_len); -+ -+ if (len_attr) -+ *len_attr = attr_len; -+ -+ break; -+ } else { -+ attr_ptr += attr_len; /* goto next */ -+ } -+ -+ } -+ -+ return target_attr_ptr; -+} -+ -+/** -+ * rtw_get_wps_attr_content - Search a specific WPS attribute content from a given WPS IE -+ * @wps_ie: Address of WPS IE to search -+ * @wps_ielen: Length limit from wps_ie -+ * @target_attr_id: The attribute ID of WPS attribute to search -+ * @buf_content: If not NULL and the WPS attribute is found, WPS attribute content will be copied to the buf starting from buf_content -+ * @len_content: If not NULL and the WPS attribute is found, will set to the length of the WPS attribute content -+ * -+ * Returns: the address of the specific WPS attribute content found, or NULL -+ */ -+u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id , u8 *buf_content, uint *len_content) -+{ -+ u8 *attr_ptr; -+ u32 attr_len; -+ -+ if (len_content) -+ *len_content = 0; -+ -+ attr_ptr = rtw_get_wps_attr(wps_ie, wps_ielen, target_attr_id, NULL, &attr_len); -+ -+ if (attr_ptr && attr_len) { -+ if (buf_content) -+ _rtw_memcpy(buf_content, attr_ptr + 4, attr_len - 4); -+ -+ if (len_content) -+ *len_content = attr_len - 4; -+ -+ return attr_ptr + 4; -+ } -+ -+ return NULL; -+} -+ -+/* OWE */ -+ -+/** -+ * rtw_get_OWE_ie - Search OWE IE from a series of IEs -+ * @in_ie: Address of IEs to search -+ * @in_len: Length limit from in_ie -+ * @wps_ie: If not NULL and OWE IE is found, OWE IE will be copied to the buf starting from owe_ie -+ * @wps_ielen: If not NULL and OWE IE is found, will set to the length of the entire OWE IE -+ * -+ * Returns: The address of the OWE IE found, or NULL -+ */ -+u8 *rtw_get_owe_ie(const u8 *in_ie, uint in_len, u8 *owe_ie, uint *owe_ielen) -+{ -+ uint cnt; -+ const u8 *oweie_ptr = NULL; -+ u8 eid; -+ -+ if (owe_ielen) -+ *owe_ielen = 0; -+ -+ if (!in_ie) { -+ rtw_warn_on(1); -+ return (u8 *)oweie_ptr; -+ } -+ -+ if (in_len <= 0) -+ return (u8 *)oweie_ptr; -+ -+ cnt = 0; -+ -+ while (cnt + 1 + 4 < in_len) { -+ eid = in_ie[cnt]; -+ -+ if (cnt + 1 + 4 >= MAX_IE_SZ) { -+ rtw_warn_on(1); -+ return NULL; -+ } -+ -+ if ((eid == WLAN_EID_EXTENSION) && (in_ie[cnt + 2] == WLAN_EID_EXT_OWE_DH_PARAM)) { -+ oweie_ptr = in_ie + cnt; -+ -+ if (owe_ie) -+ _rtw_memcpy(owe_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); -+ -+ if (owe_ielen) -+ *owe_ielen = in_ie[cnt + 1] + 2; -+ -+ break; -+ } else -+ cnt += in_ie[cnt + 1] + 2; -+ -+ } -+ -+ return (u8 *)oweie_ptr; -+} -+ -+static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen, -+ struct rtw_ieee802_11_elems *elems, -+ int show_errors) -+{ -+ unsigned int oui; -+ -+ /* first 3 bytes in vendor specific information element are the IEEE -+ * OUI of the vendor. The following byte is used a vendor specific -+ * sub-type. */ -+ if (elen < 4) { -+ if (show_errors) { -+ RTW_INFO("short vendor specific " -+ "information element ignored (len=%lu)\n", -+ (unsigned long) elen); -+ } -+ return -1; -+ } -+ -+ oui = RTW_GET_BE24(pos); -+ switch (oui) { -+ case OUI_MICROSOFT: -+ /* Microsoft/Wi-Fi information elements are further typed and -+ * subtyped */ -+ switch (pos[3]) { -+ case 1: -+ /* Microsoft OUI (00:50:F2) with OUI Type 1: -+ * real WPA information element */ -+ elems->wpa_ie = pos; -+ elems->wpa_ie_len = elen; -+ break; -+ case WME_OUI_TYPE: /* this is a Wi-Fi WME info. element */ -+ if (elen < 5) { -+ RTW_DBG("short WME " -+ "information element ignored " -+ "(len=%lu)\n", -+ (unsigned long) elen); -+ return -1; -+ } -+ switch (pos[4]) { -+ case WME_OUI_SUBTYPE_INFORMATION_ELEMENT: -+ case WME_OUI_SUBTYPE_PARAMETER_ELEMENT: -+ elems->wme = pos; -+ elems->wme_len = elen; -+ break; -+ case WME_OUI_SUBTYPE_TSPEC_ELEMENT: -+ elems->wme_tspec = pos; -+ elems->wme_tspec_len = elen; -+ break; -+ default: -+ RTW_DBG("unknown WME " -+ "information element ignored " -+ "(subtype=%d len=%lu)\n", -+ pos[4], (unsigned long) elen); -+ return -1; -+ } -+ break; -+ case 4: -+ /* Wi-Fi Protected Setup (WPS) IE */ -+ elems->wps_ie = pos; -+ elems->wps_ie_len = elen; -+ break; -+ default: -+ RTW_DBG("Unknown Microsoft " -+ "information element ignored " -+ "(type=%d len=%lu)\n", -+ pos[3], (unsigned long) elen); -+ return -1; -+ } -+ break; -+ -+ case OUI_BROADCOM: -+ switch (pos[3]) { -+ case VENDOR_HT_CAPAB_OUI_TYPE: -+ elems->vendor_ht_cap = pos; -+ elems->vendor_ht_cap_len = elen; -+ break; -+ default: -+ RTW_DBG("Unknown Broadcom " -+ "information element ignored " -+ "(type=%d len=%lu)\n", -+ pos[3], (unsigned long) elen); -+ return -1; -+ } -+ break; -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ case OUI_REALTEK: -+ if (elen == 8) { // TBTX capable IE length is 8 -+ elems->tbtx_cap = pos; -+ elems->tbtx_cap_len = elen; -+ } -+ break; -+#endif -+ default: -+ RTW_DBG("unknown vendor specific information " -+ "element ignored (vendor OUI %02x:%02x:%02x " -+ "len=%lu)\n", -+ pos[0], pos[1], pos[2], (unsigned long) elen); -+ return -1; -+ } -+ -+ return 0; -+ -+} -+ -+/** -+ * ieee802_11_parse_elems - Parse information elements in management frames -+ * @start: Pointer to the start of IEs -+ * @len: Length of IE buffer in octets -+ * @elems: Data structure for parsed elements -+ * @show_errors: Whether to show parsing errors in debug log -+ * Returns: Parsing result -+ */ -+ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len, -+ struct rtw_ieee802_11_elems *elems, -+ int show_errors) -+{ -+ uint left = len; -+ u8 *pos = start; -+ int unknown = 0; -+ -+ _rtw_memset(elems, 0, sizeof(*elems)); -+ -+ while (left >= 2) { -+ u8 id, elen; -+ -+ id = *pos++; -+ elen = *pos++; -+ left -= 2; -+ -+ if (elen > left) { -+ if (show_errors) { -+ RTW_INFO("IEEE 802.11 element " -+ "parse failed (id=%d elen=%d " -+ "left=%lu)\n", -+ id, elen, (unsigned long) left); -+ } -+ return ParseFailed; -+ } -+ -+ switch (id) { -+ case WLAN_EID_SSID: -+ elems->ssid = pos; -+ elems->ssid_len = elen; -+ break; -+ case WLAN_EID_SUPP_RATES: -+ elems->supp_rates = pos; -+ elems->supp_rates_len = elen; -+ break; -+ case WLAN_EID_FH_PARAMS: -+ elems->fh_params = pos; -+ elems->fh_params_len = elen; -+ break; -+ case WLAN_EID_DS_PARAMS: -+ elems->ds_params = pos; -+ elems->ds_params_len = elen; -+ break; -+ case WLAN_EID_CF_PARAMS: -+ elems->cf_params = pos; -+ elems->cf_params_len = elen; -+ break; -+ case WLAN_EID_TIM: -+ elems->tim = pos; -+ elems->tim_len = elen; -+ break; -+ case WLAN_EID_IBSS_PARAMS: -+ elems->ibss_params = pos; -+ elems->ibss_params_len = elen; -+ break; -+ case WLAN_EID_CHALLENGE: -+ elems->challenge = pos; -+ elems->challenge_len = elen; -+ break; -+ case WLAN_EID_ERP_INFO: -+ elems->erp_info = pos; -+ elems->erp_info_len = elen; -+ break; -+ case WLAN_EID_EXT_SUPP_RATES: -+ elems->ext_supp_rates = pos; -+ elems->ext_supp_rates_len = elen; -+ break; -+ case WLAN_EID_VENDOR_SPECIFIC: -+ if (rtw_ieee802_11_parse_vendor_specific(pos, elen, -+ elems, -+ show_errors)) -+ unknown++; -+ break; -+ case WLAN_EID_RSN: -+ elems->rsn_ie = pos; -+ elems->rsn_ie_len = elen; -+ break; -+ case WLAN_EID_PWR_CAPABILITY: -+ elems->power_cap = pos; -+ elems->power_cap_len = elen; -+ break; -+ case WLAN_EID_SUPPORTED_CHANNELS: -+ elems->supp_channels = pos; -+ elems->supp_channels_len = elen; -+ break; -+ case WLAN_EID_MOBILITY_DOMAIN: -+ elems->mdie = pos; -+ elems->mdie_len = elen; -+ break; -+ case WLAN_EID_FAST_BSS_TRANSITION: -+ elems->ftie = pos; -+ elems->ftie_len = elen; -+ break; -+ case WLAN_EID_TIMEOUT_INTERVAL: -+ elems->timeout_int = pos; -+ elems->timeout_int_len = elen; -+ break; -+ case WLAN_EID_HT_CAP: -+ elems->ht_capabilities = pos; -+ elems->ht_capabilities_len = elen; -+ break; -+ case WLAN_EID_HT_OPERATION: -+ elems->ht_operation = pos; -+ elems->ht_operation_len = elen; -+ break; -+ case WLAN_EID_VHT_CAPABILITY: -+ elems->vht_capabilities = pos; -+ elems->vht_capabilities_len = elen; -+ break; -+ case WLAN_EID_VHT_OPERATION: -+ elems->vht_operation = pos; -+ elems->vht_operation_len = elen; -+ break; -+ case WLAN_EID_VHT_OP_MODE_NOTIFY: -+ elems->vht_op_mode_notify = pos; -+ elems->vht_op_mode_notify_len = elen; -+ break; -+ case _EID_RRM_EN_CAP_IE_: -+ elems->rm_en_cap = pos; -+ elems->rm_en_cap_len = elen; -+ break; -+#ifdef CONFIG_RTW_MESH -+ case WLAN_EID_PREQ: -+ elems->preq = pos; -+ elems->preq_len = elen; -+ break; -+ case WLAN_EID_PREP: -+ elems->prep = pos; -+ elems->prep_len = elen; -+ break; -+ case WLAN_EID_PERR: -+ elems->perr = pos; -+ elems->perr_len = elen; -+ break; -+ case WLAN_EID_RANN: -+ elems->rann = pos; -+ elems->rann_len = elen; -+ break; -+#endif -+ default: -+ unknown++; -+ if (!show_errors) -+ break; -+ RTW_DBG("IEEE 802.11 element parse " -+ "ignored unknown element (id=%d elen=%d)\n", -+ id, elen); -+ break; -+ } -+ -+ left -= elen; -+ pos += elen; -+ } -+ -+ if (left) -+ return ParseFailed; -+ -+ return unknown ? ParseUnknown : ParseOK; -+ -+} -+ -+static u8 key_char2num(u8 ch); -+static u8 key_char2num(u8 ch) -+{ -+ if ((ch >= '0') && (ch <= '9')) -+ return ch - '0'; -+ else if ((ch >= 'a') && (ch <= 'f')) -+ return ch - 'a' + 10; -+ else if ((ch >= 'A') && (ch <= 'F')) -+ return ch - 'A' + 10; -+ else -+ return 0xff; -+} -+ -+u8 str_2char2num(u8 hch, u8 lch); -+u8 str_2char2num(u8 hch, u8 lch) -+{ -+ return (key_char2num(hch) * 10) + key_char2num(lch); -+} -+ -+u8 key_2char2num(u8 hch, u8 lch); -+u8 key_2char2num(u8 hch, u8 lch) -+{ -+ return (key_char2num(hch) << 4) | key_char2num(lch); -+} -+ -+void macstr2num(u8 *dst, u8 *src); -+void macstr2num(u8 *dst, u8 *src) -+{ -+ int jj, kk; -+ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) -+ dst[jj] = key_2char2num(src[kk], src[kk + 1]); -+} -+ -+u8 convert_ip_addr(u8 hch, u8 mch, u8 lch) -+{ -+ return (key_char2num(hch) * 100) + (key_char2num(mch) * 10) + key_char2num(lch); -+} -+ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+#define MAC_ADDRESS_LEN 12 -+ -+int rtw_get_mac_addr_intel(unsigned char *buf) -+{ -+ int ret = 0; -+ int i; -+ struct file *fp = NULL; -+ mm_segment_t oldfs; -+ unsigned char c_mac[MAC_ADDRESS_LEN]; -+ char fname[] = "/config/wifi/mac.txt"; -+ int jj, kk; -+ -+ RTW_INFO("%s Enter\n", __FUNCTION__); -+ -+ ret = rtw_retrieve_from_file(fname, c_mac, MAC_ADDRESS_LEN); -+ if (ret < MAC_ADDRESS_LEN) -+ return -1; -+ -+ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 2) -+ buf[jj] = key_2char2num(c_mac[kk], c_mac[kk + 1]); -+ -+ RTW_INFO("%s: read from file mac address: "MAC_FMT"\n", -+ __FUNCTION__, MAC_ARG(buf)); -+ -+ return 0; -+} -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ -+/* -+ * Description: -+ * rtw_check_invalid_mac_address: -+ * This is only used for checking mac address valid or not. -+ * -+ * Input: -+ * adapter: mac_address pointer. -+ * check_local_bit: check locally bit or not. -+ * -+ * Output: -+ * _TRUE: The mac address is invalid. -+ * _FALSE: The mac address is valid. -+ * -+ * Auther: Isaac.Li -+ */ -+u8 rtw_check_invalid_mac_address(u8 *mac_addr, u8 check_local_bit) -+{ -+ u8 null_mac_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; -+ u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 res = _FALSE; -+ -+ if (_rtw_memcmp(mac_addr, null_mac_addr, ETH_ALEN)) { -+ res = _TRUE; -+ goto func_exit; -+ } -+ -+ if (_rtw_memcmp(mac_addr, multi_mac_addr, ETH_ALEN)) { -+ res = _TRUE; -+ goto func_exit; -+ } -+ -+ if (mac_addr[0] & BIT0) { -+ res = _TRUE; -+ goto func_exit; -+ } -+ -+ if (check_local_bit == _TRUE) { -+ if (mac_addr[0] & BIT1) { -+ res = _TRUE; -+ goto func_exit; -+ } -+ } -+ -+func_exit: -+ return res; -+} -+ -+extern char *rtw_initmac; -+/** -+ * rtw_macaddr_cfg - Decide the mac address used -+ * @out: buf to store mac address decided -+ * @hw_mac_addr: mac address from efuse/epprom -+ */ -+void rtw_macaddr_cfg(u8 *out, const u8 *hw_mac_addr) -+{ -+#define DEFAULT_RANDOM_MACADDR 1 -+ u8 mac[ETH_ALEN]; -+ -+ if (out == NULL) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ /* Users specify the mac address */ -+ if (rtw_initmac) { -+ int jj, kk; -+ -+ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) -+ mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk + 1]); -+ -+ goto err_chk; -+ } -+ -+ /* platform specified */ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ if (rtw_get_mac_addr_intel(mac) == 0) -+ goto err_chk; -+#endif -+ -+ /* Use the mac address stored in the Efuse */ -+ if (hw_mac_addr) { -+ _rtw_memcpy(mac, hw_mac_addr, ETH_ALEN); -+ } -+ -+ /* -+ if (!rockchip_wifi_mac_addr(mac)) { -+ printk("get mac address from flash=[%02x:%02x:%02x:%02x:%02x:%02x]\n", mac[0], mac[1], -+ mac[2], mac[3], mac[4], mac[5]); -+ } -+ */ -+err_chk: -+ if (rtw_check_invalid_mac_address(mac, _TRUE) == _TRUE) { -+#if DEFAULT_RANDOM_MACADDR -+ RTW_ERR("invalid mac addr:"MAC_FMT", assign random MAC\n", MAC_ARG(mac)); -+ *((u32 *)(&mac[2])) = rtw_random32(); -+ mac[0] = 0x00; -+ mac[1] = 0xe0; -+ mac[2] = 0x4c; -+#else -+ RTW_ERR("invalid mac addr:"MAC_FMT", assign default one\n", MAC_ARG(mac)); -+ mac[0] = 0x00; -+ mac[1] = 0xe0; -+ mac[2] = 0x4c; -+ mac[3] = 0x87; -+ mac[4] = 0x00; -+ mac[5] = 0x00; -+#endif -+ } -+ -+ _rtw_memcpy(out, mac, ETH_ALEN); -+ RTW_INFO("%s mac addr:"MAC_FMT"\n", __func__, MAC_ARG(out)); -+} -+ -+#ifdef CONFIG_RTW_DEBUG -+#ifdef CONFIG_80211N_HT -+void dump_ht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len) -+{ -+ if (buf_len != HT_CAP_IE_LEN) { -+ RTW_PRINT_SEL(sel, "Invalid HT capability IE len:%d != %d\n", buf_len, HT_CAP_IE_LEN); -+ return; -+ } -+ -+ RTW_PRINT_SEL(sel, "cap_info:%02x%02x:%s\n", *(buf), *(buf + 1) -+ , GET_HT_CAP_ELE_CHL_WIDTH(buf) ? " 40MHz" : " 20MHz"); -+ RTW_PRINT_SEL(sel, "A-MPDU Parameters:"HT_AMPDU_PARA_FMT"\n" -+ , HT_AMPDU_PARA_ARG(HT_CAP_ELE_AMPDU_PARA(buf))); -+ RTW_PRINT_SEL(sel, "Supported MCS Set:"HT_SUP_MCS_SET_FMT"\n" -+ , HT_SUP_MCS_SET_ARG(HT_CAP_ELE_SUP_MCS_SET(buf))); -+} -+ -+void dump_ht_cap_ie(void *sel, const u8 *ie, u32 ie_len) -+{ -+ const u8 *ht_cap_ie; -+ sint ht_cap_ielen; -+ -+ ht_cap_ie = rtw_get_ie(ie, WLAN_EID_HT_CAP, &ht_cap_ielen, ie_len); -+ if (!ie || ht_cap_ie != ie) -+ return; -+ -+ dump_ht_cap_ie_content(sel, ht_cap_ie + 2, ht_cap_ielen); -+} -+ -+const char *const _ht_sc_offset_str[] = { -+ "SCN", -+ "SCA", -+ "SC-RSVD", -+ "SCB", -+}; -+ -+void dump_ht_op_ie_content(void *sel, const u8 *buf, u32 buf_len) -+{ -+ if (buf_len != HT_OP_IE_LEN) { -+ RTW_PRINT_SEL(sel, "Invalid HT operation IE len:%d != %d\n", buf_len, HT_OP_IE_LEN); -+ return; -+ } -+ -+ RTW_PRINT_SEL(sel, "ch:%u%s %s\n" -+ , GET_HT_OP_ELE_PRI_CHL(buf) -+ , GET_HT_OP_ELE_STA_CHL_WIDTH(buf) ? "" : " 20MHz only" -+ , ht_sc_offset_str(GET_HT_OP_ELE_2ND_CHL_OFFSET(buf)) -+ ); -+} -+ -+void dump_ht_op_ie(void *sel, const u8 *ie, u32 ie_len) -+{ -+ const u8 *ht_op_ie; -+ sint ht_op_ielen; -+ -+ ht_op_ie = rtw_get_ie(ie, WLAN_EID_HT_OPERATION, &ht_op_ielen, ie_len); -+ if (!ie || ht_op_ie != ie) -+ return; -+ -+ dump_ht_op_ie_content(sel, ht_op_ie + 2, ht_op_ielen); -+} -+#endif /* CONFIG_80211N_HT */ -+ -+void dump_wps_ie(void *sel, const u8 *ie, u32 ie_len) -+{ -+ const u8 *pos = ie; -+ u16 id; -+ u16 len; -+ -+ const u8 *wps_ie; -+ uint wps_ielen; -+ -+ wps_ie = rtw_get_wps_ie(ie, ie_len, NULL, &wps_ielen); -+ if (wps_ie != ie || wps_ielen == 0) -+ return; -+ -+ pos += 6; -+ while (pos - ie + 4 <= ie_len) { -+ id = RTW_GET_BE16(pos); -+ len = RTW_GET_BE16(pos + 2); -+ -+ RTW_PRINT_SEL(sel, "%s ID:0x%04x, LEN:%u%s\n", __func__, id, len -+ , ((pos - ie + 4 + len) <= ie_len) ? "" : "(exceed ie_len)"); -+ -+ pos += (4 + len); -+ } -+} -+#endif /* CONFIG_RTW_DEBUG */ -+void dump_ies(void *sel, const u8 *buf, u32 buf_len) -+{ -+#ifdef CONFIG_RTW_DEBUG -+ const u8 *pos = buf; -+ u8 id, len; -+ -+ while (pos - buf + 1 < buf_len) { -+ id = *pos; -+ len = *(pos + 1); -+ -+ RTW_PRINT_SEL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len); -+#ifdef CONFIG_80211N_HT -+ dump_ht_cap_ie(sel, pos, len + 2); -+ dump_ht_op_ie(sel, pos, len + 2); -+#endif -+#ifdef CONFIG_80211AC_VHT -+ dump_vht_cap_ie(sel, pos, len + 2); -+ dump_vht_op_ie(sel, pos, len + 2); -+#endif -+ dump_wps_ie(sel, pos, len + 2); -+#ifdef CONFIG_P2P -+ dump_p2p_ie(sel, pos, len + 2); -+#ifdef CONFIG_WFD -+ dump_wfd_ie(sel, pos, len + 2); -+#endif -+#endif -+#ifdef CONFIG_RTW_MULTI_AP -+ dump_multi_ap_ie(sel, pos, len + 2); -+#endif -+ -+ pos += (2 + len); -+ } -+#endif /* CONFIG_RTW_DEBUG */ -+} -+ -+/** -+ * rtw_ies_get_chbw - get operation ch, bw, offset from IEs of BSS. -+ * @ies: pointer of the first tlv IE -+ * @ies_len: length of @ies -+ * @ch: pointer of ch, used as output -+ * @bw: pointer of bw, used as output -+ * @offset: pointer of offset, used as output -+ * @ht: check HT IEs -+ * @vht: check VHT IEs, if true imply ht is true -+ */ -+void rtw_ies_get_chbw(u8 *ies, int ies_len, u8 *ch, u8 *bw, u8 *offset, u8 ht, u8 vht) -+{ -+ u8 *p; -+ int ie_len; -+ -+ *ch = 0; -+ *bw = CHANNEL_WIDTH_20; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ -+ p = rtw_get_ie(ies, _DSSET_IE_, &ie_len, ies_len); -+ if (p && ie_len > 0) -+ *ch = *(p + 2); -+ -+#ifdef CONFIG_80211N_HT -+ if (ht || vht) { -+ u8 *ht_cap_ie, *ht_op_ie; -+ int ht_cap_ielen, ht_op_ielen; -+ -+ ht_cap_ie = rtw_get_ie(ies, EID_HTCapability, &ht_cap_ielen, ies_len); -+ if (ht_cap_ie && ht_cap_ielen) { -+ if (GET_HT_CAP_ELE_CHL_WIDTH(ht_cap_ie + 2)) -+ *bw = CHANNEL_WIDTH_40; -+ } -+ -+ ht_op_ie = rtw_get_ie(ies, EID_HTInfo, &ht_op_ielen, ies_len); -+ if (ht_op_ie && ht_op_ielen) { -+ if (*ch == 0) -+ *ch = GET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2); -+ else if (*ch != 0 && *ch != GET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2)) { -+ RTW_INFO("%s ch inconsistent, DSSS:%u, HT primary:%u\n" -+ , __func__, *ch, GET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2)); -+ } -+ -+ if (!GET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2)) -+ *bw = CHANNEL_WIDTH_20; -+ -+ if (*bw == CHANNEL_WIDTH_40) { -+ switch (GET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2)) { -+ case SCA: -+ *offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ case SCB: -+ *offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ } -+ } -+ } -+ -+#ifdef CONFIG_80211AC_VHT -+ if (vht) { -+ u8 *vht_op_ie; -+ int vht_op_ielen; -+ -+ vht_op_ie = rtw_get_ie(ies, EID_VHTOperation, &vht_op_ielen, ies_len); -+ if (vht_op_ie && vht_op_ielen) { -+ if (GET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2) >= 1) -+ *bw = CHANNEL_WIDTH_80; -+ } -+ } -+#endif /* CONFIG_80211AC_VHT */ -+ -+ } -+#endif /* CONFIG_80211N_HT */ -+} -+ -+void rtw_bss_get_chbw(WLAN_BSSID_EX *bss, u8 *ch, u8 *bw, u8 *offset, u8 ht, u8 vht) -+{ -+ rtw_ies_get_chbw(bss->IEs + sizeof(NDIS_802_11_FIXED_IEs) -+ , bss->IELength - sizeof(NDIS_802_11_FIXED_IEs) -+ , ch, bw, offset, ht, vht); -+ -+ if (*ch == 0) -+ *ch = bss->Configuration.DSConfig; -+ else if (*ch != bss->Configuration.DSConfig) { -+ RTW_INFO("inconsistent ch - ies:%u bss->Configuration.DSConfig:%u\n" -+ , *ch, bss->Configuration.DSConfig); -+ *ch = bss->Configuration.DSConfig; -+ rtw_warn_on(1); -+ } -+} -+ -+/** -+ * rtw_is_chbw_grouped - test if the two ch settings can be grouped together -+ * @ch_a: ch of set a -+ * @bw_a: bw of set a -+ * @offset_a: offset of set a -+ * @ch_b: ch of set b -+ * @bw_b: bw of set b -+ * @offset_b: offset of set b -+ */ -+bool rtw_is_chbw_grouped(u8 ch_a, u8 bw_a, u8 offset_a -+ , u8 ch_b, u8 bw_b, u8 offset_b) -+{ -+ bool is_grouped = _FALSE; -+ -+ if (ch_a != ch_b) { -+ /* ch is different */ -+ goto exit; -+ } else if ((bw_a == CHANNEL_WIDTH_40 || bw_a == CHANNEL_WIDTH_80) -+ && (bw_b == CHANNEL_WIDTH_40 || bw_b == CHANNEL_WIDTH_80) -+ ) { -+ if (offset_a != offset_b) -+ goto exit; -+ } -+ -+ is_grouped = _TRUE; -+ -+exit: -+ return is_grouped; -+} -+ -+/** -+ * rtw_sync_chbw - obey g_ch, adjust g_bw, g_offset, bw, offset -+ * @req_ch: pointer of the request ch, may be modified further -+ * @req_bw: pointer of the request bw, may be modified further -+ * @req_offset: pointer of the request offset, may be modified further -+ * @g_ch: pointer of the ongoing group ch -+ * @g_bw: pointer of the ongoing group bw, may be modified further -+ * @g_offset: pointer of the ongoing group offset, may be modified further -+ */ -+void rtw_sync_chbw(u8 *req_ch, u8 *req_bw, u8 *req_offset -+ , u8 *g_ch, u8 *g_bw, u8 *g_offset) -+{ -+ -+ *req_ch = *g_ch; -+ -+ if (*req_bw == CHANNEL_WIDTH_80 && *g_ch <= 14) { -+ /*2.4G ch, downgrade to 40Mhz */ -+ *req_bw = CHANNEL_WIDTH_40; -+ } -+ -+ switch (*req_bw) { -+ case CHANNEL_WIDTH_80: -+ if (*g_bw == CHANNEL_WIDTH_40 || *g_bw == CHANNEL_WIDTH_80) -+ *req_offset = *g_offset; -+ else if (*g_bw == CHANNEL_WIDTH_20) -+ rtw_get_offset_by_chbw(*req_ch, *req_bw, req_offset); -+ -+ if (*req_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) { -+ RTW_ERR("%s req 80MHz BW without offset, down to 20MHz\n", __func__); -+ rtw_warn_on(1); -+ *req_bw = CHANNEL_WIDTH_20; -+ } -+ break; -+ case CHANNEL_WIDTH_40: -+ if (*g_bw == CHANNEL_WIDTH_40 || *g_bw == CHANNEL_WIDTH_80) -+ *req_offset = *g_offset; -+ else if (*g_bw == CHANNEL_WIDTH_20) -+ rtw_get_offset_by_chbw(*req_ch, *req_bw, req_offset); -+ -+ if (*req_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) { -+ RTW_ERR("%s req 40MHz BW without offset, down to 20MHz\n", __func__); -+ rtw_warn_on(1); -+ *req_bw = CHANNEL_WIDTH_20; -+ } -+ break; -+ case CHANNEL_WIDTH_20: -+ *req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ default: -+ RTW_ERR("%s req unsupported BW:%u\n", __func__, *req_bw); -+ rtw_warn_on(1); -+ } -+ -+ if (*req_bw > *g_bw) { -+ *g_bw = *req_bw; -+ *g_offset = *req_offset; -+ } -+} -+ -+#ifdef CONFIG_P2P -+/** -+ * rtw_get_p2p_merged_len - Get merged ie length from muitiple p2p ies. -+ * @in_ie: Pointer of the first p2p ie -+ * @in_len: Total len of muiltiple p2p ies -+ * Returns: Length of merged p2p ie length -+ */ -+u32 rtw_get_p2p_merged_ies_len(u8 *in_ie, u32 in_len) -+{ -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 OUI[4] = { 0x50, 0x6f, 0x9a, 0x09 }; -+ int i = 0; -+ int len = 0; -+ -+ while (i < in_len) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(in_ie + i); -+ -+ if (pIE->ElementID == _VENDOR_SPECIFIC_IE_ && _rtw_memcmp(pIE->data, OUI, 4)) { -+ len += pIE->Length - 4; /* 4 is P2P OUI length, don't count it in this loop */ -+ } -+ -+ i += (pIE->Length + 2); -+ } -+ -+ return len + 4; /* Append P2P OUI length at last. */ -+} -+ -+/** -+ * rtw_p2p_merge_ies - Merge muitiple p2p ies into one -+ * @in_ie: Pointer of the first p2p ie -+ * @in_len: Total len of muiltiple p2p ies -+ * @merge_ie: Pointer of merged ie -+ * Returns: Length of merged p2p ie -+ */ -+int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie) -+{ -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 len = 0; -+ u8 OUI[4] = { 0x50, 0x6f, 0x9a, 0x09 }; -+ u8 ELOUI[6] = { 0xDD, 0x00, 0x50, 0x6f, 0x9a, 0x09 }; /* EID;Len;OUI, Len would copy at the end of function */ -+ int i = 0; -+ -+ if (merge_ie != NULL) { -+ /* Set first P2P OUI */ -+ _rtw_memcpy(merge_ie, ELOUI, 6); -+ merge_ie += 6; -+ -+ while (i < in_len) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(in_ie + i); -+ -+ /* Take out the rest of P2P OUIs */ -+ if (pIE->ElementID == _VENDOR_SPECIFIC_IE_ && _rtw_memcmp(pIE->data, OUI, 4)) { -+ _rtw_memcpy(merge_ie, pIE->data + 4, pIE->Length - 4); -+ len += pIE->Length - 4; -+ merge_ie += pIE->Length - 4; -+ } -+ -+ i += (pIE->Length + 2); -+ } -+ -+ return len + 4; /* 4 is for P2P OUI */ -+ -+ } -+ -+ return 0; -+} -+ -+void dump_p2p_ie(void *sel, const u8 *ie, u32 ie_len) -+{ -+ const u8 *pos = ie; -+ u8 id; -+ u16 len; -+ -+ const u8 *p2p_ie; -+ uint p2p_ielen; -+ -+ p2p_ie = rtw_get_p2p_ie(ie, ie_len, NULL, &p2p_ielen); -+ if (p2p_ie != ie || p2p_ielen == 0) -+ return; -+ -+ pos += 6; -+ while (pos - ie + 3 <= ie_len) { -+ id = *pos; -+ len = RTW_GET_LE16(pos + 1); -+ -+ RTW_PRINT_SEL(sel, "%s ID:%u, LEN:%u%s\n", __func__, id, len -+ , ((pos - ie + 3 + len) <= ie_len) ? "" : "(exceed ie_len)"); -+ -+ pos += (3 + len); -+ } -+} -+ -+/** -+ * rtw_get_p2p_ie - Search P2P IE from a series of IEs -+ * @in_ie: Address of IEs to search -+ * @in_len: Length limit from in_ie -+ * @p2p_ie: If not NULL and P2P IE is found, P2P IE will be copied to the buf starting from p2p_ie -+ * @p2p_ielen: If not NULL and P2P IE is found, will set to the length of the entire P2P IE -+ * -+ * Returns: The address of the P2P IE found, or NULL -+ */ -+u8 *rtw_get_p2p_ie(const u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen) -+{ -+ uint cnt; -+ const u8 *p2p_ie_ptr = NULL; -+ u8 eid, p2p_oui[4] = {0x50, 0x6F, 0x9A, 0x09}; -+ -+ if (p2p_ielen) -+ *p2p_ielen = 0; -+ -+ if (!in_ie || in_len < 0) { -+ rtw_warn_on(1); -+ return (u8 *)p2p_ie_ptr; -+ } -+ -+ if (in_len <= 0) -+ return (u8 *)p2p_ie_ptr; -+ -+ cnt = 0; -+ -+ while (cnt + 1 + 4 < in_len) { -+ eid = in_ie[cnt]; -+ -+ if (cnt + 1 + 4 >= MAX_IE_SZ) { -+ rtw_warn_on(1); -+ return NULL; -+ } -+ -+ if (eid == WLAN_EID_VENDOR_SPECIFIC && _rtw_memcmp(&in_ie[cnt + 2], p2p_oui, 4) == _TRUE) { -+ p2p_ie_ptr = in_ie + cnt; -+ -+ if (p2p_ie) -+ _rtw_memcpy(p2p_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); -+ -+ if (p2p_ielen) -+ *p2p_ielen = in_ie[cnt + 1] + 2; -+ -+ break; -+ } else -+ cnt += in_ie[cnt + 1] + 2; -+ -+ } -+ -+ return (u8 *)p2p_ie_ptr; -+} -+ -+/** -+ * rtw_get_p2p_attr - Search a specific P2P attribute from a given P2P IE -+ * @p2p_ie: Address of P2P IE to search -+ * @p2p_ielen: Length limit from p2p_ie -+ * @target_attr_id: The attribute ID of P2P attribute to search -+ * @buf_attr: If not NULL and the P2P attribute is found, P2P attribute will be copied to the buf starting from buf_attr -+ * @len_attr: If not NULL and the P2P attribute is found, will set to the length of the entire P2P attribute -+ * -+ * Returns: the address of the specific WPS attribute found, or NULL -+ */ -+u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id , u8 *buf_attr, u32 *len_attr) -+{ -+ u8 *attr_ptr = NULL; -+ u8 *target_attr_ptr = NULL; -+ u8 p2p_oui[4] = {0x50, 0x6F, 0x9A, 0x09}; -+ -+ if (len_attr) -+ *len_attr = 0; -+ -+ if (!p2p_ie -+ || p2p_ielen <= 6 -+ || (p2p_ie[0] != WLAN_EID_VENDOR_SPECIFIC) -+ || (_rtw_memcmp(p2p_ie + 2, p2p_oui, 4) != _TRUE)) -+ return attr_ptr; -+ -+ /* 6 = 1(Element ID) + 1(Length) + 3 (OUI) + 1(OUI Type) */ -+ attr_ptr = p2p_ie + 6; /* goto first attr */ -+ -+ while ((attr_ptr - p2p_ie + 3) <= p2p_ielen) { -+ /* 3 = 1(Attribute ID) + 2(Length) */ -+ u8 attr_id = *attr_ptr; -+ u16 attr_data_len = RTW_GET_LE16(attr_ptr + 1); -+ u16 attr_len = attr_data_len + 3; -+ -+ if (0) -+ RTW_INFO("%s attr_ptr:%p, id:%u, length:%u\n", __func__, attr_ptr, attr_id, attr_data_len); -+ -+ if ((attr_ptr - p2p_ie + attr_len) > p2p_ielen) -+ break; -+ -+ if (attr_id == target_attr_id) { -+ target_attr_ptr = attr_ptr; -+ -+ if (buf_attr) -+ _rtw_memcpy(buf_attr, attr_ptr, attr_len); -+ -+ if (len_attr) -+ *len_attr = attr_len; -+ -+ break; -+ } else -+ attr_ptr += attr_len; -+ } -+ -+ return target_attr_ptr; -+} -+ -+/** -+ * rtw_get_p2p_attr_content - Search a specific P2P attribute content from a given P2P IE -+ * @p2p_ie: Address of P2P IE to search -+ * @p2p_ielen: Length limit from p2p_ie -+ * @target_attr_id: The attribute ID of P2P attribute to search -+ * @buf_content: If not NULL and the P2P attribute is found, P2P attribute content will be copied to the buf starting from buf_content -+ * @len_content: If not NULL and the P2P attribute is found, will set to the length of the P2P attribute content -+ * -+ * Returns: the address of the specific P2P attribute content found, or NULL -+ */ -+u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id , u8 *buf_content, uint *len_content) -+{ -+ u8 *attr_ptr; -+ u32 attr_len; -+ -+ if (len_content) -+ *len_content = 0; -+ -+ attr_ptr = rtw_get_p2p_attr(p2p_ie, p2p_ielen, target_attr_id, NULL, &attr_len); -+ -+ if (attr_ptr && attr_len) { -+ if (buf_content) -+ _rtw_memcpy(buf_content, attr_ptr + 3, attr_len - 3); -+ -+ if (len_content) -+ *len_content = attr_len - 3; -+ -+ return attr_ptr + 3; -+ } -+ -+ return NULL; -+} -+ -+u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr) -+{ -+ u32 a_len; -+ -+ *pbuf = attr_id; -+ -+ /* *(u16*)(pbuf + 1) = cpu_to_le16(attr_len); */ -+ RTW_PUT_LE16(pbuf + 1, attr_len); -+ -+ if (pdata_attr) -+ _rtw_memcpy(pbuf + 3, pdata_attr, attr_len); -+ -+ a_len = attr_len + 3; -+ -+ return a_len; -+} -+ -+uint rtw_del_p2p_ie(u8 *ies, uint ies_len_ori, const char *msg) -+{ -+#define DBG_DEL_P2P_IE 0 -+ -+ u8 *target_ie; -+ u32 target_ie_len; -+ uint ies_len = ies_len_ori; -+ int index = 0; -+ -+ while (1) { -+ target_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &target_ie_len); -+ if (target_ie && target_ie_len) { -+ u8 *next_ie = target_ie + target_ie_len; -+ uint remain_len = ies_len - (next_ie - ies); -+ -+ if (DBG_DEL_P2P_IE && msg) { -+ RTW_INFO("%s %d before\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, ies, ies_len); -+ -+ RTW_INFO("ies:%p, ies_len:%u\n", ies, ies_len); -+ RTW_INFO("target_ie:%p, target_ie_len:%u\n", target_ie, target_ie_len); -+ RTW_INFO("next_ie:%p, remain_len:%u\n", next_ie, remain_len); -+ } -+ -+ _rtw_memmove(target_ie, next_ie, remain_len); -+ _rtw_memset(target_ie + remain_len, 0, target_ie_len); -+ ies_len -= target_ie_len; -+ -+ if (DBG_DEL_P2P_IE && msg) { -+ RTW_INFO("%s %d after\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, ies, ies_len); -+ } -+ -+ index++; -+ } else -+ break; -+ } -+ -+ return ies_len; -+} -+ -+uint rtw_del_p2p_attr(u8 *ie, uint ielen_ori, u8 attr_id) -+{ -+#define DBG_DEL_P2P_ATTR 0 -+ -+ u8 *target_attr; -+ u32 target_attr_len; -+ uint ielen = ielen_ori; -+ int index = 0; -+ -+ while (1) { -+ target_attr = rtw_get_p2p_attr(ie, ielen, attr_id, NULL, &target_attr_len); -+ if (target_attr && target_attr_len) { -+ u8 *next_attr = target_attr + target_attr_len; -+ uint remain_len = ielen - (next_attr - ie); -+ -+ if (DBG_DEL_P2P_ATTR) { -+ RTW_INFO("%s %d before\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, ie, ielen); -+ -+ RTW_INFO("ie:%p, ielen:%u\n", ie, ielen); -+ RTW_INFO("target_attr:%p, target_attr_len:%u\n", target_attr, target_attr_len); -+ RTW_INFO("next_attr:%p, remain_len:%u\n", next_attr, remain_len); -+ } -+ -+ _rtw_memmove(target_attr, next_attr, remain_len); -+ _rtw_memset(target_attr + remain_len, 0, target_attr_len); -+ *(ie + 1) -= target_attr_len; -+ ielen -= target_attr_len; -+ -+ if (DBG_DEL_P2P_ATTR) { -+ RTW_INFO("%s %d after\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, ie, ielen); -+ } -+ -+ index++; -+ } else -+ break; -+ } -+ -+ return ielen; -+} -+ -+inline u8 *rtw_bss_ex_get_p2p_ie(WLAN_BSSID_EX *bss_ex, u8 *p2p_ie, uint *p2p_ielen) -+{ -+ return rtw_get_p2p_ie(BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex), p2p_ie, p2p_ielen); -+} -+ -+void rtw_bss_ex_del_p2p_ie(WLAN_BSSID_EX *bss_ex) -+{ -+#define DBG_BSS_EX_DEL_P2P_IE 0 -+ -+ u8 *ies = BSS_EX_TLV_IES(bss_ex); -+ uint ies_len_ori = BSS_EX_TLV_IES_LEN(bss_ex); -+ uint ies_len; -+ -+ ies_len = rtw_del_p2p_ie(ies, ies_len_ori, DBG_BSS_EX_DEL_P2P_IE ? __func__ : NULL); -+ bss_ex->IELength -= ies_len_ori - ies_len; -+} -+ -+void rtw_bss_ex_del_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id) -+{ -+#define DBG_BSS_EX_DEL_P2P_ATTR 0 -+ -+ u8 *ies = BSS_EX_TLV_IES(bss_ex); -+ uint ies_len = BSS_EX_TLV_IES_LEN(bss_ex); -+ -+ u8 *ie; -+ uint ie_len, ie_len_ori; -+ -+ int index = 0; -+ -+ while (1) { -+ ie = rtw_get_p2p_ie(ies, ies_len, NULL, &ie_len_ori); -+ if (ie) { -+ u8 *next_ie_ori = ie + ie_len_ori; -+ uint remain_len = bss_ex->IELength - (next_ie_ori - bss_ex->IEs); -+ u8 has_target_attr = 0; -+ -+ if (DBG_BSS_EX_DEL_P2P_ATTR) { -+ if (rtw_get_p2p_attr(ie, ie_len_ori, attr_id, NULL, NULL)) { -+ RTW_INFO("%s %d before\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex)); -+ -+ RTW_INFO("ies:%p, ies_len:%u\n", ies, ies_len); -+ RTW_INFO("ie:%p, ie_len_ori:%u\n", ie, ie_len_ori); -+ RTW_INFO("next_ie_ori:%p, remain_len:%u\n", next_ie_ori, remain_len); -+ has_target_attr = 1; -+ } -+ } -+ -+ ie_len = rtw_del_p2p_attr(ie, ie_len_ori, attr_id); -+ if (ie_len != ie_len_ori) { -+ u8 *next_ie = ie + ie_len; -+ -+ _rtw_memmove(next_ie, next_ie_ori, remain_len); -+ _rtw_memset(next_ie + remain_len, 0, ie_len_ori - ie_len); -+ bss_ex->IELength -= ie_len_ori - ie_len; -+ -+ ies = next_ie; -+ } else -+ ies = next_ie_ori; -+ -+ if (DBG_BSS_EX_DEL_P2P_ATTR) { -+ if (has_target_attr) { -+ RTW_INFO("%s %d after\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex)); -+ } -+ } -+ -+ ies_len = remain_len; -+ -+ index++; -+ } else -+ break; -+ } -+} -+#endif /* CONFIG_P2P */ -+ -+/** -+ * rtw_get_wfd_ie - Search WFD IE from a series of IEs -+ * @in_ie: Address of IEs to search -+ * @in_len: Length limit from in_ie -+ * @wfd_ie: If not NULL and WFD IE is found, WFD IE will be copied to the buf starting from wfd_ie -+ * @wfd_ielen: If not NULL and WFD IE is found, will set to the length of the entire WFD IE -+ * -+ * Returns: The address of the P2P IE found, or NULL -+ */ -+u8 *rtw_get_wfd_ie(const u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen) -+{ -+ uint cnt; -+ const u8 *wfd_ie_ptr = NULL; -+ u8 eid, wfd_oui[4] = {0x50, 0x6F, 0x9A, 0x0A}; -+ -+ if (wfd_ielen) -+ *wfd_ielen = 0; -+ -+ if (!in_ie || in_len < 0) { -+ rtw_warn_on(1); -+ return (u8 *)wfd_ie_ptr; -+ } -+ -+ if (in_len <= 0) -+ return (u8 *)wfd_ie_ptr; -+ -+ cnt = 0; -+ -+ while (cnt + 1 + 4 < in_len) { -+ eid = in_ie[cnt]; -+ -+ if (cnt + 1 + 4 >= MAX_IE_SZ) { -+ rtw_warn_on(1); -+ return NULL; -+ } -+ -+ if (eid == WLAN_EID_VENDOR_SPECIFIC && _rtw_memcmp(&in_ie[cnt + 2], wfd_oui, 4) == _TRUE) { -+ wfd_ie_ptr = in_ie + cnt; -+ -+ if (wfd_ie) -+ _rtw_memcpy(wfd_ie, &in_ie[cnt], in_ie[cnt + 1] + 2); -+ -+ if (wfd_ielen) -+ *wfd_ielen = in_ie[cnt + 1] + 2; -+ -+ break; -+ } else -+ cnt += in_ie[cnt + 1] + 2; -+ -+ } -+ -+ return (u8 *)wfd_ie_ptr; -+} -+ -+uint rtw_del_wfd_ie(u8 *ies, uint ies_len_ori, const char *msg) -+{ -+#define DBG_DEL_WFD_IE 0 -+ -+ u8 *target_ie; -+ u32 target_ie_len; -+ uint ies_len = ies_len_ori; -+ int index = 0; -+ -+ while (1) { -+ target_ie = rtw_get_wfd_ie(ies, ies_len, NULL, &target_ie_len); -+ if (target_ie && target_ie_len) { -+ u8 *next_ie = target_ie + target_ie_len; -+ uint remain_len = ies_len - (next_ie - ies); -+ -+ if (DBG_DEL_WFD_IE && msg) { -+ RTW_INFO("%s %d before\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, ies, ies_len); -+ -+ RTW_INFO("ies:%p, ies_len:%u\n", ies, ies_len); -+ RTW_INFO("target_ie:%p, target_ie_len:%u\n", target_ie, target_ie_len); -+ RTW_INFO("next_ie:%p, remain_len:%u\n", next_ie, remain_len); -+ } -+ -+ _rtw_memmove(target_ie, next_ie, remain_len); -+ _rtw_memset(target_ie + remain_len, 0, target_ie_len); -+ ies_len -= target_ie_len; -+ -+ if (DBG_DEL_WFD_IE && msg) { -+ RTW_INFO("%s %d after\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, ies, ies_len); -+ } -+ -+ index++; -+ } else -+ break; -+ } -+ -+ return ies_len; -+} -+ -+void rtw_bss_ex_del_wfd_ie(WLAN_BSSID_EX *bss_ex) -+{ -+#define DBG_BSS_EX_DEL_WFD_IE 0 -+ u8 *ies = BSS_EX_TLV_IES(bss_ex); -+ uint ies_len_ori = BSS_EX_TLV_IES_LEN(bss_ex); -+ uint ies_len; -+ -+ ies_len = rtw_del_wfd_ie(ies, ies_len_ori, DBG_BSS_EX_DEL_WFD_IE ? __func__ : NULL); -+ bss_ex->IELength -= ies_len_ori - ies_len; -+} -+ -+#ifdef CONFIG_WFD -+void dump_wfd_ie(void *sel, const u8 *ie, u32 ie_len) -+{ -+ const u8 *pos = ie; -+ u8 id; -+ u16 len; -+ -+ const u8 *wfd_ie; -+ uint wfd_ielen; -+ -+ wfd_ie = rtw_get_wfd_ie(ie, ie_len, NULL, &wfd_ielen); -+ if (wfd_ie != ie || wfd_ielen == 0) -+ return; -+ -+ pos += 6; -+ while (pos - ie + 3 <= ie_len) { -+ id = *pos; -+ len = RTW_GET_BE16(pos + 1); -+ -+ RTW_PRINT_SEL(sel, "%s ID:%u, LEN:%u%s\n", __func__, id, len -+ , ((pos - ie + 3 + len) <= ie_len) ? "" : "(exceed ie_len)"); -+ -+ pos += (3 + len); -+ } -+} -+ -+/** -+ * rtw_get_wfd_attr - Search a specific WFD attribute from a given WFD IE -+ * @wfd_ie: Address of WFD IE to search -+ * @wfd_ielen: Length limit from wfd_ie -+ * @target_attr_id: The attribute ID of WFD attribute to search -+ * @buf_attr: If not NULL and the WFD attribute is found, WFD attribute will be copied to the buf starting from buf_attr -+ * @len_attr: If not NULL and the WFD attribute is found, will set to the length of the entire WFD attribute -+ * -+ * Returns: the address of the specific WPS attribute found, or NULL -+ */ -+u8 *rtw_get_wfd_attr(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id, u8 *buf_attr, u32 *len_attr) -+{ -+ u8 *attr_ptr = NULL; -+ u8 *target_attr_ptr = NULL; -+ u8 wfd_oui[4] = {0x50, 0x6F, 0x9A, 0x0A}; -+ -+ if (len_attr) -+ *len_attr = 0; -+ -+ if (!wfd_ie -+ || wfd_ielen <= 6 -+ || (wfd_ie[0] != WLAN_EID_VENDOR_SPECIFIC) -+ || (_rtw_memcmp(wfd_ie + 2, wfd_oui, 4) != _TRUE)) -+ return attr_ptr; -+ -+ /* 6 = 1(Element ID) + 1(Length) + 3 (OUI) + 1(OUI Type) */ -+ attr_ptr = wfd_ie + 6; /* goto first attr */ -+ -+ while ((attr_ptr - wfd_ie + 3) <= wfd_ielen) { -+ /* 3 = 1(Attribute ID) + 2(Length) */ -+ u8 attr_id = *attr_ptr; -+ u16 attr_data_len = RTW_GET_BE16(attr_ptr + 1); -+ u16 attr_len = attr_data_len + 3; -+ -+ if (0) -+ RTW_INFO("%s attr_ptr:%p, id:%u, length:%u\n", __func__, attr_ptr, attr_id, attr_data_len); -+ -+ if ((attr_ptr - wfd_ie + attr_len) > wfd_ielen) -+ break; -+ -+ if (attr_id == target_attr_id) { -+ target_attr_ptr = attr_ptr; -+ -+ if (buf_attr) -+ _rtw_memcpy(buf_attr, attr_ptr, attr_len); -+ -+ if (len_attr) -+ *len_attr = attr_len; -+ -+ break; -+ } else -+ attr_ptr += attr_len; -+ } -+ -+ return target_attr_ptr; -+} -+ -+/** -+ * rtw_get_wfd_attr_content - Search a specific WFD attribute content from a given WFD IE -+ * @wfd_ie: Address of WFD IE to search -+ * @wfd_ielen: Length limit from wfd_ie -+ * @target_attr_id: The attribute ID of WFD attribute to search -+ * @buf_content: If not NULL and the WFD attribute is found, WFD attribute content will be copied to the buf starting from buf_content -+ * @len_content: If not NULL and the WFD attribute is found, will set to the length of the WFD attribute content -+ * -+ * Returns: the address of the specific WFD attribute content found, or NULL -+ */ -+u8 *rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id, u8 *buf_content, uint *len_content) -+{ -+ u8 *attr_ptr; -+ u32 attr_len; -+ -+ if (len_content) -+ *len_content = 0; -+ -+ attr_ptr = rtw_get_wfd_attr(wfd_ie, wfd_ielen, target_attr_id, NULL, &attr_len); -+ -+ if (attr_ptr && attr_len) { -+ if (buf_content) -+ _rtw_memcpy(buf_content, attr_ptr + 3, attr_len - 3); -+ -+ if (len_content) -+ *len_content = attr_len - 3; -+ -+ return attr_ptr + 3; -+ } -+ -+ return NULL; -+} -+ -+uint rtw_del_wfd_attr(u8 *ie, uint ielen_ori, u8 attr_id) -+{ -+#define DBG_DEL_WFD_ATTR 0 -+ -+ u8 *target_attr; -+ u32 target_attr_len; -+ uint ielen = ielen_ori; -+ int index = 0; -+ -+ while (1) { -+ target_attr = rtw_get_wfd_attr(ie, ielen, attr_id, NULL, &target_attr_len); -+ if (target_attr && target_attr_len) { -+ u8 *next_attr = target_attr + target_attr_len; -+ uint remain_len = ielen - (next_attr - ie); -+ -+ if (DBG_DEL_WFD_ATTR) { -+ RTW_INFO("%s %d before\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, ie, ielen); -+ -+ RTW_INFO("ie:%p, ielen:%u\n", ie, ielen); -+ RTW_INFO("target_attr:%p, target_attr_len:%u\n", target_attr, target_attr_len); -+ RTW_INFO("next_attr:%p, remain_len:%u\n", next_attr, remain_len); -+ } -+ -+ _rtw_memmove(target_attr, next_attr, remain_len); -+ _rtw_memset(target_attr + remain_len, 0, target_attr_len); -+ *(ie + 1) -= target_attr_len; -+ ielen -= target_attr_len; -+ -+ if (DBG_DEL_WFD_ATTR) { -+ RTW_INFO("%s %d after\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, ie, ielen); -+ } -+ -+ index++; -+ } else -+ break; -+ } -+ -+ return ielen; -+} -+ -+inline u8 *rtw_bss_ex_get_wfd_ie(WLAN_BSSID_EX *bss_ex, u8 *wfd_ie, uint *wfd_ielen) -+{ -+ return rtw_get_wfd_ie(BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex), wfd_ie, wfd_ielen); -+} -+ -+void rtw_bss_ex_del_wfd_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id) -+{ -+#define DBG_BSS_EX_DEL_WFD_ATTR 0 -+ -+ u8 *ies = BSS_EX_TLV_IES(bss_ex); -+ uint ies_len = BSS_EX_TLV_IES_LEN(bss_ex); -+ -+ u8 *ie; -+ uint ie_len, ie_len_ori; -+ -+ int index = 0; -+ -+ while (1) { -+ ie = rtw_get_wfd_ie(ies, ies_len, NULL, &ie_len_ori); -+ if (ie) { -+ u8 *next_ie_ori = ie + ie_len_ori; -+ uint remain_len = bss_ex->IELength - (next_ie_ori - bss_ex->IEs); -+ u8 has_target_attr = 0; -+ -+ if (DBG_BSS_EX_DEL_WFD_ATTR) { -+ if (rtw_get_wfd_attr(ie, ie_len_ori, attr_id, NULL, NULL)) { -+ RTW_INFO("%s %d before\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex)); -+ -+ RTW_INFO("ies:%p, ies_len:%u\n", ies, ies_len); -+ RTW_INFO("ie:%p, ie_len_ori:%u\n", ie, ie_len_ori); -+ RTW_INFO("next_ie_ori:%p, remain_len:%u\n", next_ie_ori, remain_len); -+ has_target_attr = 1; -+ } -+ } -+ -+ ie_len = rtw_del_wfd_attr(ie, ie_len_ori, attr_id); -+ if (ie_len != ie_len_ori) { -+ u8 *next_ie = ie + ie_len; -+ -+ _rtw_memmove(next_ie, next_ie_ori, remain_len); -+ _rtw_memset(next_ie + remain_len, 0, ie_len_ori - ie_len); -+ bss_ex->IELength -= ie_len_ori - ie_len; -+ -+ ies = next_ie; -+ } else -+ ies = next_ie_ori; -+ -+ if (DBG_BSS_EX_DEL_WFD_ATTR) { -+ if (has_target_attr) { -+ RTW_INFO("%s %d after\n", __func__, index); -+ dump_ies(RTW_DBGDUMP, BSS_EX_TLV_IES(bss_ex), BSS_EX_TLV_IES_LEN(bss_ex)); -+ } -+ } -+ -+ ies_len = remain_len; -+ -+ index++; -+ } else -+ break; -+ } -+} -+#endif /* CONFIG_WFD */ -+ -+#ifdef CONFIG_RTW_MULTI_AP -+void dump_multi_ap_ie(void *sel, const u8 *ie, u32 ie_len) -+{ -+ const u8 *pos = ie; -+ u8 id; -+ u8 len; -+ -+ const u8 *multi_ap_ie; -+ uint multi_ap_ielen; -+ -+ multi_ap_ie = rtw_get_ie_ex(ie, ie_len, WLAN_EID_VENDOR_SPECIFIC, MULTI_AP_OUI, 4, NULL, &multi_ap_ielen); -+ if (multi_ap_ie != ie || multi_ap_ielen == 0) -+ return; -+ -+ pos += 6; -+ while (pos - ie + 2 <= ie_len) { -+ id = *pos; -+ len = *(pos + 1); -+ -+ RTW_PRINT_SEL(sel, "%s ID:%u, LEN:%u%s\n", __func__, id, len -+ , ((pos - ie + 2 + len) <= ie_len) ? "" : "(exceed ie_len)"); -+ RTW_DUMP_SEL(sel, pos + 2, len); -+ -+ pos += (2 + len); -+ } -+} -+ -+/** -+ * rtw_get_multi_ap_ext - Search Multi-AP IE from a series of IEs and return extension subelement value -+ * @ies: Address of IEs to search -+ * @ies_len: Length limit from in_ie -+ * -+ * Returns: The address of the target IE found, or NULL -+ */ -+u8 rtw_get_multi_ap_ie_ext(const u8 *ies, int ies_len) -+{ -+ u8 *ie; -+ uint ielen; -+ u8 val = 0; -+ -+ ie = rtw_get_ie_ex(ies, ies_len, WLAN_EID_VENDOR_SPECIFIC, MULTI_AP_OUI, 4, NULL, &ielen); -+ if (ielen < 9) -+ goto exit; -+ -+ if (ie[6] != MULTI_AP_SUB_ELEM_TYPE) -+ goto exit; -+ -+ val = ie[8]; -+ -+exit: -+ return val; -+} -+ -+u8 *rtw_set_multi_ap_ie_ext(u8 *pbuf, uint *frlen, u8 val) -+{ -+ u8 cont_len = 7; -+ -+ *pbuf++ = WLAN_EID_VENDOR_SPECIFIC; -+ *pbuf++ = cont_len; -+ _rtw_memcpy(pbuf, MULTI_AP_OUI, 4); -+ pbuf += 4; -+ *pbuf++ = MULTI_AP_SUB_ELEM_TYPE; -+ *pbuf++ = 1; /* len */ -+ *pbuf++ = val; -+ -+ if (frlen) -+ *frlen = *frlen + (cont_len + 2); -+ -+ return pbuf; -+} -+#endif /* CONFIG_RTW_MULTI_AP */ -+ -+/* Baron adds to avoid FreeBSD warning */ -+int ieee80211_is_empty_essid(const char *essid, int essid_len) -+{ -+ /* Single white space is for Linksys APs */ -+ if (essid_len == 1 && essid[0] == ' ') -+ return 1; -+ -+ /* Otherwise, if the entire essid is 0, we assume it is hidden */ -+ while (essid_len) { -+ essid_len--; -+ if (essid[essid_len] != '\0') -+ return 0; -+ } -+ -+ return 1; -+} -+ -+int ieee80211_get_hdrlen(u16 fc) -+{ -+ int hdrlen = 24; -+ -+ switch (WLAN_FC_GET_TYPE(fc)) { -+ case RTW_IEEE80211_FTYPE_DATA: -+ if (fc & RTW_IEEE80211_STYPE_QOS_DATA) -+ hdrlen += 2; -+ if ((fc & RTW_IEEE80211_FCTL_FROMDS) && (fc & RTW_IEEE80211_FCTL_TODS)) -+ hdrlen += 6; /* Addr4 */ -+ break; -+ case RTW_IEEE80211_FTYPE_CTL: -+ switch (WLAN_FC_GET_STYPE(fc)) { -+ case RTW_IEEE80211_STYPE_CTS: -+ case RTW_IEEE80211_STYPE_ACK: -+ hdrlen = 10; -+ break; -+ default: -+ hdrlen = 16; -+ break; -+ } -+ break; -+ } -+ -+ return hdrlen; -+} -+ -+u8 rtw_ht_mcsset_to_nss(u8 *supp_mcs_set) -+{ -+ u8 nss = 1; -+ -+ if (supp_mcs_set[3]) -+ nss = 4; -+ else if (supp_mcs_set[2]) -+ nss = 3; -+ else if (supp_mcs_set[1]) -+ nss = 2; -+ else if (supp_mcs_set[0]) -+ nss = 1; -+ else -+ RTW_INFO("%s,%d, warning! supp_mcs_set is zero\n", __func__, __LINE__); -+ /* RTW_INFO("%s HT: %dSS\n", __FUNCTION__, nss); */ -+ return nss; -+} -+ -+u32 rtw_ht_mcs_set_to_bitmap(u8 *mcs_set, u8 nss) -+{ -+ u8 i; -+ u32 bitmap = 0; -+ -+ for (i = 0; i < nss; i++) -+ bitmap |= mcs_set[i] << (i * 8); -+ -+ RTW_INFO("ht_mcs_set=%02x %02x %02x %02x, nss=%u, bitmap=%08x\n" -+ , mcs_set[0], mcs_set[1], mcs_set[2], mcs_set[3], nss, bitmap); -+ -+ return bitmap; -+} -+ -+/* show MCS rate, unit: 100Kbps */ -+u16 rtw_ht_mcs_rate(u8 bw_40MHz, u8 short_GI, unsigned char *MCS_rate) -+{ -+ u16 max_rate = 0; -+ -+ if (MCS_rate[3]) { -+ if (MCS_rate[3] & BIT(7)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 6000 : 5400) : ((short_GI) ? 2889 : 2600); -+ else if (MCS_rate[3] & BIT(6)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 5400 : 4860) : ((short_GI) ? 2600 : 2340); -+ else if (MCS_rate[3] & BIT(5)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 4800 : 4320) : ((short_GI) ? 2311 : 2080); -+ else if (MCS_rate[3] & BIT(4)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 3600 : 3240) : ((short_GI) ? 1733 : 1560); -+ else if (MCS_rate[3] & BIT(3)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 2400 : 2160) : ((short_GI) ? 1156 : 1040); -+ else if (MCS_rate[3] & BIT(2)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 1800 : 1620) : ((short_GI) ? 867 : 780); -+ else if (MCS_rate[3] & BIT(1)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 1200 : 1080) : ((short_GI) ? 578 : 520); -+ else if (MCS_rate[3] & BIT(0)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 600 : 540) : ((short_GI) ? 289 : 260); -+ } else if (MCS_rate[2]) { -+ if (MCS_rate[2] & BIT(7)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 4500 : 4050) : ((short_GI) ? 2167 : 1950); -+ else if (MCS_rate[2] & BIT(6)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 4050 : 3645) : ((short_GI) ? 1950 : 1750); -+ else if (MCS_rate[2] & BIT(5)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 3600 : 3240) : ((short_GI) ? 1733 : 1560); -+ else if (MCS_rate[2] & BIT(4)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 2700 : 2430) : ((short_GI) ? 1300 : 1170); -+ else if (MCS_rate[2] & BIT(3)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 1800 : 1620) : ((short_GI) ? 867 : 780); -+ else if (MCS_rate[2] & BIT(2)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 1350 : 1215) : ((short_GI) ? 650 : 585); -+ else if (MCS_rate[2] & BIT(1)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 900 : 810) : ((short_GI) ? 433 : 390); -+ else if (MCS_rate[2] & BIT(0)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 450 : 405) : ((short_GI) ? 217 : 195); -+ } else if (MCS_rate[1]) { -+ if (MCS_rate[1] & BIT(7)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 3000 : 2700) : ((short_GI) ? 1444 : 1300); -+ else if (MCS_rate[1] & BIT(6)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 2700 : 2430) : ((short_GI) ? 1300 : 1170); -+ else if (MCS_rate[1] & BIT(5)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 2400 : 2160) : ((short_GI) ? 1156 : 1040); -+ else if (MCS_rate[1] & BIT(4)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 1800 : 1620) : ((short_GI) ? 867 : 780); -+ else if (MCS_rate[1] & BIT(3)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 1200 : 1080) : ((short_GI) ? 578 : 520); -+ else if (MCS_rate[1] & BIT(2)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 900 : 810) : ((short_GI) ? 433 : 390); -+ else if (MCS_rate[1] & BIT(1)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 600 : 540) : ((short_GI) ? 289 : 260); -+ else if (MCS_rate[1] & BIT(0)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 300 : 270) : ((short_GI) ? 144 : 130); -+ } else { -+ if (MCS_rate[0] & BIT(7)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 1500 : 1350) : ((short_GI) ? 722 : 650); -+ else if (MCS_rate[0] & BIT(6)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 1350 : 1215) : ((short_GI) ? 650 : 585); -+ else if (MCS_rate[0] & BIT(5)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 1200 : 1080) : ((short_GI) ? 578 : 520); -+ else if (MCS_rate[0] & BIT(4)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 900 : 810) : ((short_GI) ? 433 : 390); -+ else if (MCS_rate[0] & BIT(3)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 600 : 540) : ((short_GI) ? 289 : 260); -+ else if (MCS_rate[0] & BIT(2)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 450 : 405) : ((short_GI) ? 217 : 195); -+ else if (MCS_rate[0] & BIT(1)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 300 : 270) : ((short_GI) ? 144 : 130); -+ else if (MCS_rate[0] & BIT(0)) -+ max_rate = (bw_40MHz) ? ((short_GI) ? 150 : 135) : ((short_GI) ? 72 : 65); -+ } -+ -+ return max_rate; -+} -+ -+u8 rtw_ht_cap_get_rx_nss(u8 *ht_cap) -+{ -+ u8 *ht_mcs_set = HT_CAP_ELE_SUP_MCS_SET(ht_cap); -+ -+ return rtw_ht_mcsset_to_nss(ht_mcs_set); -+} -+ -+u8 rtw_ht_cap_get_tx_nss(u8 *ht_cap) -+{ -+ u8 *ht_mcs_set = HT_CAP_ELE_SUP_MCS_SET(ht_cap); -+ -+ if (GET_HT_CAP_ELE_TX_MCS_DEF(ht_cap) && GET_HT_CAP_ELE_TRX_MCS_NEQ(ht_cap)) -+ return GET_HT_CAP_ELE_TX_MAX_SS(ht_cap) + 1; -+ -+ return rtw_ht_cap_get_rx_nss(ht_cap); -+} -+ -+int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8 *category, u8 *action) -+{ -+ const u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr); -+ u16 fc; -+ u8 c; -+ u8 a = ACT_PUBLIC_MAX; -+ -+ fc = le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)frame)->frame_ctl); -+ -+ if ((fc & (RTW_IEEE80211_FCTL_FTYPE | RTW_IEEE80211_FCTL_STYPE)) -+ != (RTW_IEEE80211_FTYPE_MGMT | RTW_IEEE80211_STYPE_ACTION) -+ ) -+ return _FALSE; -+ -+ c = frame_body[0]; -+ -+ switch (c) { -+ case RTW_WLAN_CATEGORY_P2P: /* vendor-specific */ -+ break; -+ default: -+ a = frame_body[1]; -+ } -+ -+ if (category) -+ *category = c; -+ if (action) -+ *action = a; -+ -+ return _TRUE; -+} -+ -+static const char *_action_public_str[] = { -+ [ACT_PUBLIC_BSSCOEXIST] = "ACT_PUB_BSSCOEXIST", -+ [ACT_PUBLIC_DSE_ENABLE] = "ACT_PUB_DSE_ENABLE", -+ [ACT_PUBLIC_DSE_DEENABLE] = "ACT_PUB_DSE_DEENABLE", -+ [ACT_PUBLIC_DSE_REG_LOCATION] = "ACT_PUB_DSE_REG_LOCATION", -+ [ACT_PUBLIC_EXT_CHL_SWITCH] = "ACT_PUB_EXT_CHL_SWITCH", -+ [ACT_PUBLIC_DSE_MSR_REQ] = "ACT_PUB_DSE_MSR_REQ", -+ [ACT_PUBLIC_DSE_MSR_RPRT] = "ACT_PUB_DSE_MSR_RPRT", -+ [ACT_PUBLIC_MP] = "ACT_PUB_MP", -+ [ACT_PUBLIC_DSE_PWR_CONSTRAINT] = "ACT_PUB_DSE_PWR_CONSTRAINT", -+ [ACT_PUBLIC_VENDOR] = "ACT_PUB_VENDOR", -+ [ACT_PUBLIC_GAS_INITIAL_REQ] = "ACT_PUB_GAS_INITIAL_REQ", -+ [ACT_PUBLIC_GAS_INITIAL_RSP] = "ACT_PUB_GAS_INITIAL_RSP", -+ [ACT_PUBLIC_GAS_COMEBACK_REQ] = "ACT_PUB_GAS_COMEBACK_REQ", -+ [ACT_PUBLIC_GAS_COMEBACK_RSP] = "ACT_PUB_GAS_COMEBACK_RSP", -+ [ACT_PUBLIC_TDLS_DISCOVERY_RSP] = "ACT_PUB_TDLS_DISCOVERY_RSP", -+ [ACT_PUBLIC_LOCATION_TRACK] = "ACT_PUB_LOCATION_TRACK", -+ [ACT_PUBLIC_QAB_REQ] = "ACT_PUB_QAB_REQ", -+ [ACT_PUBLIC_QAB_RSP] = "ACT_PUB_QAB_RSP", -+ [ACT_PUBLIC_QMF_POLICY] = "ACT_PUB_QMF_POLICY", -+ [ACT_PUBLIC_QMF_POLICY_CHANGE] = "ACT_PUB_QMF_POLICY_CHANGE", -+ [ACT_PUBLIC_QLOAD_REQ] = "ACT_PUB_QLOAD_REQ", -+ [ACT_PUBLIC_QLOAD_REPORT] = "ACT_PUB_QLOAD_REPORT", -+ [ACT_PUBLIC_HCCA_TXOP_ADV] = "ACT_PUB_HCCA_TXOP_ADV", -+ [ACT_PUBLIC_HCCA_TXOP_RSP] = "ACT_PUB_HCCA_TXOP_RSP", -+ [ACT_PUBLIC_PUBLIC_KEY] = "ACT_PUB_PUBLIC_KEY", -+ [ACT_PUBLIC_CH_AVAILABILITY_QUERY] = "ACT_PUB_CH_AVAILABILITY_QUERY", -+ [ACT_PUBLIC_CH_SCHEDULE_MGMT] = "ACT_PUB_CH_SCHEDULE_MGMT", -+ [ACT_PUBLIC_CONTACT_VERI_SIGNAL] = "ACT_PUB_CONTACT_VERI_SIGNAL", -+ [ACT_PUBLIC_GDD_ENABLE_REQ] = "ACT_PUB_GDD_ENABLE_REQ", -+ [ACT_PUBLIC_GDD_ENABLE_RSP] = "ACT_PUB_GDD_ENABLE_RSP", -+ [ACT_PUBLIC_NETWORK_CH_CONTROL] = "ACT_PUB_NETWORK_CH_CONTROL", -+ [ACT_PUBLIC_WHITE_SPACE_MAP_ANN] = "ACT_PUB_WHITE_SPACE_MAP_ANN", -+ [ACT_PUBLIC_FTM_REQ] = "ACT_PUB_FTM_REQ", -+ [ACT_PUBLIC_FTM] = "ACT_PUB_FTM", -+ [ACT_PUBLIC_MAX] = "ACT_PUB_RSVD", -+}; -+ -+const char *action_public_str(u8 action) -+{ -+ action = (action >= ACT_PUBLIC_MAX) ? ACT_PUBLIC_MAX : action; -+ return _action_public_str[action]; -+} -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_io.c b/drivers/staging/rtl8723cs/core/rtw_io.c -new file mode 100644 -index 000000000000..734d3e591e0d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_io.c -@@ -0,0 +1,952 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/* -+ -+The purpose of rtw_io.c -+ -+a. provides the API -+ -+b. provides the protocol engine -+ -+c. provides the software interface between caller and the hardware interface -+ -+ -+Compiler Flag Option: -+ -+1. CONFIG_SDIO_HCI: -+ a. USE_SYNC_IRP: Only sync operations are provided. -+ b. USE_ASYNC_IRP:Both sync/async operations are provided. -+ -+2. CONFIG_USB_HCI: -+ a. USE_ASYNC_IRP: Both sync/async operations are provided. -+ -+3. CONFIG_CFIO_HCI: -+ b. USE_SYNC_IRP: Only sync operations are provided. -+ -+ -+Only sync read/rtw_write_mem operations are provided. -+ -+jackson@realtek.com.tw -+ -+*/ -+ -+#define _RTW_IO_C_ -+ -+#include -+#include -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_PLATFORM_RTL8197D) -+ #define rtw_le16_to_cpu(val) val -+ #define rtw_le32_to_cpu(val) val -+ #define rtw_cpu_to_le16(val) val -+ #define rtw_cpu_to_le32(val) val -+#else -+ #define rtw_le16_to_cpu(val) le16_to_cpu(val) -+ #define rtw_le32_to_cpu(val) le32_to_cpu(val) -+ #define rtw_cpu_to_le16(val) cpu_to_le16(val) -+ #define rtw_cpu_to_le32(val) cpu_to_le32(val) -+#endif -+ -+ -+u8 _rtw_read8(_adapter *adapter, u32 addr) -+{ -+ u8 r_val; -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ u8(*_read8)(struct intf_hdl *pintfhdl, u32 addr); -+ _read8 = pintfhdl->io_ops._read8; -+ -+ r_val = _read8(pintfhdl, addr); -+ return r_val; -+} -+ -+u16 _rtw_read16(_adapter *adapter, u32 addr) -+{ -+ u16 r_val; -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ u16(*_read16)(struct intf_hdl *pintfhdl, u32 addr); -+ _read16 = pintfhdl->io_ops._read16; -+ -+ r_val = _read16(pintfhdl, addr); -+ return rtw_le16_to_cpu(r_val); -+} -+ -+u32 _rtw_read32(_adapter *adapter, u32 addr) -+{ -+ u32 r_val; -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ u32(*_read32)(struct intf_hdl *pintfhdl, u32 addr); -+ _read32 = pintfhdl->io_ops._read32; -+ -+ r_val = _read32(pintfhdl, addr); -+ return rtw_le32_to_cpu(r_val); -+ -+} -+ -+int _rtw_write8(_adapter *adapter, u32 addr, u8 val) -+{ -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); -+ int ret; -+ _write8 = pintfhdl->io_ops._write8; -+ -+ ret = _write8(pintfhdl, addr, val); -+ -+ return RTW_STATUS_CODE(ret); -+} -+int _rtw_write16(_adapter *adapter, u32 addr, u16 val) -+{ -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); -+ int ret; -+ _write16 = pintfhdl->io_ops._write16; -+ -+ val = rtw_cpu_to_le16(val); -+ ret = _write16(pintfhdl, addr, val); -+ -+ return RTW_STATUS_CODE(ret); -+} -+int _rtw_write32(_adapter *adapter, u32 addr, u32 val) -+{ -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); -+ int ret; -+ _write32 = pintfhdl->io_ops._write32; -+ -+ val = rtw_cpu_to_le32(val); -+ ret = _write32(pintfhdl, addr, val); -+ -+ return RTW_STATUS_CODE(ret); -+} -+ -+int _rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *pdata) -+{ -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = (struct intf_hdl *)(&(pio_priv->intf)); -+ int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); -+ int ret; -+ _writeN = pintfhdl->io_ops._writeN; -+ -+ ret = _writeN(pintfhdl, addr, length, pdata); -+ -+ return RTW_STATUS_CODE(ret); -+} -+ -+#ifdef CONFIG_SDIO_HCI -+u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr) -+{ -+ u8 r_val = 0x00; -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ u8(*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr); -+ -+ _sd_f0_read8 = pintfhdl->io_ops._sd_f0_read8; -+ -+ if (_sd_f0_read8) -+ r_val = _sd_f0_read8(pintfhdl, addr); -+ else -+ RTW_WARN(FUNC_ADPT_FMT" _sd_f0_read8 callback is NULL\n", FUNC_ADPT_ARG(adapter)); -+ -+ return r_val; -+} -+ -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+u8 _rtw_sd_iread8(_adapter *adapter, u32 addr) -+{ -+ u8 r_val = 0x00; -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ u8(*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr); -+ -+ _sd_iread8 = pintfhdl->io_ops._sd_iread8; -+ -+ if (_sd_iread8) -+ r_val = _sd_iread8(pintfhdl, addr); -+ else -+ RTW_ERR(FUNC_ADPT_FMT" _sd_iread8 callback is NULL\n", FUNC_ADPT_ARG(adapter)); -+ -+ return r_val; -+} -+ -+u16 _rtw_sd_iread16(_adapter *adapter, u32 addr) -+{ -+ u16 r_val = 0x00; -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ u16(*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr); -+ -+ _sd_iread16 = pintfhdl->io_ops._sd_iread16; -+ -+ if (_sd_iread16) -+ r_val = _sd_iread16(pintfhdl, addr); -+ else -+ RTW_ERR(FUNC_ADPT_FMT" _sd_iread16 callback is NULL\n", FUNC_ADPT_ARG(adapter)); -+ -+ return r_val; -+} -+ -+u32 _rtw_sd_iread32(_adapter *adapter, u32 addr) -+{ -+ u32 r_val = 0x00; -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ u32(*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr); -+ -+ _sd_iread32 = pintfhdl->io_ops._sd_iread32; -+ -+ if (_sd_iread32) -+ r_val = _sd_iread32(pintfhdl, addr); -+ else -+ RTW_ERR(FUNC_ADPT_FMT" _sd_iread32 callback is NULL\n", FUNC_ADPT_ARG(adapter)); -+ -+ return r_val; -+} -+ -+int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val) -+{ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); -+ int ret = -1; -+ -+ _sd_iwrite8 = pintfhdl->io_ops._sd_iwrite8; -+ -+ if (_sd_iwrite8) -+ ret = _sd_iwrite8(pintfhdl, addr, val); -+ else -+ RTW_ERR(FUNC_ADPT_FMT" _sd_iwrite8 callback is NULL\n", FUNC_ADPT_ARG(adapter)); -+ -+ return RTW_STATUS_CODE(ret); -+} -+ -+int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val) -+{ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); -+ int ret = -1; -+ -+ _sd_iwrite16 = pintfhdl->io_ops._sd_iwrite16; -+ -+ if (_sd_iwrite16) -+ ret = _sd_iwrite16(pintfhdl, addr, val); -+ else -+ RTW_ERR(FUNC_ADPT_FMT" _sd_iwrite16 callback is NULL\n", FUNC_ADPT_ARG(adapter)); -+ -+ return RTW_STATUS_CODE(ret); -+} -+int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val) -+{ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); -+ int ret = -1; -+ -+ _sd_iwrite32 = pintfhdl->io_ops._sd_iwrite32; -+ -+ if (_sd_iwrite32) -+ ret = _sd_iwrite32(pintfhdl, addr, val); -+ else -+ RTW_ERR(FUNC_ADPT_FMT" _sd_iwrite32 callback is NULL\n", FUNC_ADPT_ARG(adapter)); -+ -+ return RTW_STATUS_CODE(ret); -+} -+ -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+ -+#endif /* CONFIG_SDIO_HCI */ -+ -+int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val) -+{ -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); -+ int ret; -+ _write8_async = pintfhdl->io_ops._write8_async; -+ -+ ret = _write8_async(pintfhdl, addr, val); -+ -+ return RTW_STATUS_CODE(ret); -+} -+int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val) -+{ -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); -+ int ret; -+ _write16_async = pintfhdl->io_ops._write16_async; -+ val = rtw_cpu_to_le16(val); -+ ret = _write16_async(pintfhdl, addr, val); -+ -+ return RTW_STATUS_CODE(ret); -+} -+int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val) -+{ -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); -+ int ret; -+ _write32_async = pintfhdl->io_ops._write32_async; -+ val = rtw_cpu_to_le32(val); -+ ret = _write32_async(pintfhdl, addr, val); -+ -+ return RTW_STATUS_CODE(ret); -+} -+ -+void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) -+{ -+ void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ -+ -+ if (RTW_CANNOT_RUN(adapter)) { -+ return; -+ } -+ -+ _read_mem = pintfhdl->io_ops._read_mem; -+ -+ _read_mem(pintfhdl, addr, cnt, pmem); -+ -+ -+} -+ -+void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) -+{ -+ void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ -+ -+ _write_mem = pintfhdl->io_ops._write_mem; -+ -+ _write_mem(pintfhdl, addr, cnt, pmem); -+ -+ -+} -+ -+void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) -+{ -+ u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ -+ -+ if (RTW_CANNOT_RUN(adapter)) { -+ return; -+ } -+ -+ _read_port = pintfhdl->io_ops._read_port; -+ -+ _read_port(pintfhdl, addr, cnt, pmem); -+ -+ -+} -+ -+void _rtw_read_port_cancel(_adapter *adapter) -+{ -+ void (*_read_port_cancel)(struct intf_hdl *pintfhdl); -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ -+ _read_port_cancel = pintfhdl->io_ops._read_port_cancel; -+ -+ RTW_DISABLE_FUNC(adapter, DF_RX_BIT); -+ -+ if (_read_port_cancel) -+ _read_port_cancel(pintfhdl); -+} -+ -+u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) -+{ -+ u32(*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -+ /* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */ -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ u32 ret = _SUCCESS; -+ -+ -+ _write_port = pintfhdl->io_ops._write_port; -+ -+ ret = _write_port(pintfhdl, addr, cnt, pmem); -+ -+ -+ return ret; -+} -+ -+u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms) -+{ -+ int ret = _SUCCESS; -+ struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem; -+ struct submit_ctx sctx; -+ -+ rtw_sctx_init(&sctx, timeout_ms); -+ pxmitbuf->sctx = &sctx; -+ -+ ret = _rtw_write_port(adapter, addr, cnt, pmem); -+ -+ if (ret == _SUCCESS) { -+ ret = rtw_sctx_wait(&sctx, __func__); -+ -+ if (ret != _SUCCESS) -+ pxmitbuf->sctx = NULL; -+ } -+ -+ return ret; -+} -+ -+void _rtw_write_port_cancel(_adapter *adapter) -+{ -+ void (*_write_port_cancel)(struct intf_hdl *pintfhdl); -+ struct io_priv *pio_priv = &adapter->iopriv; -+ struct intf_hdl *pintfhdl = &(pio_priv->intf); -+ -+ _write_port_cancel = pintfhdl->io_ops._write_port_cancel; -+ -+ RTW_DISABLE_FUNC(adapter, DF_TX_BIT); -+ -+ if (_write_port_cancel) -+ _write_port_cancel(pintfhdl); -+} -+int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter, struct _io_ops *pops)) -+{ -+ struct io_priv *piopriv = &padapter->iopriv; -+ struct intf_hdl *pintf = &piopriv->intf; -+ -+ if (set_intf_ops == NULL) -+ return _FAIL; -+ -+ piopriv->padapter = padapter; -+ pintf->padapter = padapter; -+ pintf->pintf_dev = adapter_to_dvobj(padapter); -+ -+ set_intf_ops(padapter, &pintf->io_ops); -+ -+ return _SUCCESS; -+} -+ -+/* -+* Increase and check if the continual_io_error of this @param dvobjprive is larger than MAX_CONTINUAL_IO_ERR -+* @return _TRUE: -+* @return _FALSE: -+*/ -+int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj) -+{ -+ int ret = _FALSE; -+ int value; -+ -+ value = ATOMIC_INC_RETURN(&dvobj->continual_io_error); -+ if (value > MAX_CONTINUAL_IO_ERR) { -+ RTW_INFO("[dvobj:%p][ERROR] continual_io_error:%d > %d\n", dvobj, value, MAX_CONTINUAL_IO_ERR); -+ ret = _TRUE; -+ } else { -+ /* RTW_INFO("[dvobj:%p] continual_io_error:%d\n", dvobj, value); */ -+ } -+ return ret; -+} -+ -+/* -+* Set the continual_io_error of this @param dvobjprive to 0 -+*/ -+void rtw_reset_continual_io_error(struct dvobj_priv *dvobj) -+{ -+ ATOMIC_SET(&dvobj->continual_io_error, 0); -+} -+ -+#ifdef DBG_IO -+#define RTW_IO_SNIFF_TYPE_RANGE 0 /* specific address range is accessed */ -+#define RTW_IO_SNIFF_TYPE_VALUE 1 /* value match for sniffed range */ -+ -+struct rtw_io_sniff_ent { -+ u8 chip; -+ u8 hci; -+ u32 addr; -+ u8 type; -+ union { -+ u32 end_addr; -+ struct { -+ u32 mask; -+ u32 val; -+ bool equal; -+ } vm; /* value match */ -+ } u; -+ bool trace; -+ char *tag; -+ bool (*assert_protsel)(_adapter *adapter, u32 addr, u8 len); -+}; -+ -+#define RTW_IO_SNIFF_RANGE_ENT(_chip, _hci, _addr, _end_addr, _trace, _tag) \ -+ {.chip = _chip, .hci = _hci, .addr = _addr, .u.end_addr = _end_addr, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_RANGE,} -+ -+#define RTW_IO_SNIFF_RANGE_PROT_ENT(_chip, _hci, _addr, _end_addr, _assert_protsel, _tag) \ -+ {.chip = _chip, .hci = _hci, .addr = _addr, .u.end_addr = _end_addr, .trace = 1, .assert_protsel = _assert_protsel, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_RANGE,} -+ -+#define RTW_IO_SNIFF_VALUE_ENT(_chip, _hci, _addr, _mask, _val, _equal, _trace, _tag) \ -+ {.chip = _chip, .hci = _hci, .addr = _addr, .u.vm.mask = _mask, .u.vm.val = _val, .u.vm.equal = _equal, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_VALUE,} -+ -+/* part or all sniffed range is enabled (not all 0) */ -+#define RTW_IO_SNIFF_EN_ENT(_chip, _hci, _addr, _mask, _trace, _tag) \ -+ {.chip = _chip, .hci = _hci, .addr = _addr, .u.vm.mask = _mask, .u.vm.val = 0, .u.vm.equal = 0, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_VALUE,} -+ -+/* part or all sniffed range is disabled (not all 1) */ -+#define RTW_IO_SNIFF_DIS_ENT(_chip, _hci, _addr, _mask, _trace, _tag) \ -+ {.chip = _chip, .hci = _hci, .addr = _addr, .u.vm.mask = _mask, .u.vm.val = 0xFFFFFFFF, .u.vm.equal = 0, .trace = _trace, .tag = _tag, .type = RTW_IO_SNIFF_TYPE_VALUE,} -+ -+const struct rtw_io_sniff_ent read_sniff[] = { -+#ifdef DBG_IO_HCI_EN_CHK -+ RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_SDIO, 0x02, 0x1FC, 1, "SDIO 0x02[8:2] not all 0"), -+ RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_USB, 0x02, 0x1E0, 1, "USB 0x02[8:5] not all 0"), -+ RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_PCIE, 0x02, 0x01C, 1, "PCI 0x02[4:2] not all 0"), -+#endif -+#ifdef DBG_IO_SNIFF_EXAMPLE -+ RTW_IO_SNIFF_RANGE_ENT(MAX_CHIP_TYPE, 0, 0x522, 0x522, 0, "read TXPAUSE"), -+ RTW_IO_SNIFF_DIS_ENT(MAX_CHIP_TYPE, 0, 0x02, 0x3, 0, "0x02[1:0] not all 1"), -+#endif -+#ifdef DBG_IO_PROT_SEL -+ RTW_IO_SNIFF_RANGE_PROT_ENT(MAX_CHIP_TYPE, 0, 0x1501, 0x1513, rtw_assert_protsel_port, "protsel port"), -+ RTW_IO_SNIFF_RANGE_PROT_ENT(MAX_CHIP_TYPE, 0, 0x153a, 0x153b, rtw_assert_protsel_atimdtim, "protsel atimdtim"), -+#endif -+}; -+ -+const int read_sniff_num = sizeof(read_sniff) / sizeof(struct rtw_io_sniff_ent); -+ -+const struct rtw_io_sniff_ent write_sniff[] = { -+#ifdef DBG_IO_HCI_EN_CHK -+ RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_SDIO, 0x02, 0x1FC, 1, "SDIO 0x02[8:2] not all 0"), -+ RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_USB, 0x02, 0x1E0, 1, "USB 0x02[8:5] not all 0"), -+ RTW_IO_SNIFF_EN_ENT(MAX_CHIP_TYPE, RTW_PCIE, 0x02, 0x01C, 1, "PCI 0x02[4:2] not all 0"), -+#endif -+#ifdef DBG_IO_8822C_1TX_PATH_EN -+ RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x1a04, 0xc0000000, 0x02, 1, 0, "write tx_path_en_cck A enabled"), -+ RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x1a04, 0xc0000000, 0x01, 1, 0, "write tx_path_en_cck B enabled"), -+ RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x1a04, 0xc0000000, 0x03, 1, 1, "write tx_path_en_cck AB enabled"), -+ RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x03, 0x01, 1, 0, "write tx_path_en_ofdm_1sts A enabled"), -+ RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x03, 0x02, 1, 0, "write tx_path_en_ofdm_1sts B enabled"), -+ RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x03, 0x03, 1, 1, "write tx_path_en_ofdm_1sts AB enabled"), -+ RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x30, 0x01, 1, 0, "write tx_path_en_ofdm_2sts A enabled"), -+ RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x30, 0x02, 1, 0, "write tx_path_en_ofdm_2sts B enabled"), -+ RTW_IO_SNIFF_VALUE_ENT(RTL8822C, 0, 0x820, 0x30, 0x03, 1, 1, "write tx_path_en_ofdm_2sts AB enabled"), -+#endif -+#ifdef DBG_IO_SNIFF_EXAMPLE -+ RTW_IO_SNIFF_RANGE_ENT(MAX_CHIP_TYPE, 0, 0x522, 0x522, 0, "write TXPAUSE"), -+ RTW_IO_SNIFF_DIS_ENT(MAX_CHIP_TYPE, 0, 0x02, 0x3, 0, "0x02[1:0] not all 1"), -+#endif -+}; -+ -+const int write_sniff_num = sizeof(write_sniff) / sizeof(struct rtw_io_sniff_ent); -+ -+static bool match_io_sniff_ranges(_adapter *adapter -+ , const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u16 len) -+{ -+ -+ /* check if IO range after sniff end address */ -+ if (addr > sniff->u.end_addr) -+ return 0; -+ -+ if (sniff->assert_protsel && -+ sniff->assert_protsel(adapter, addr, len)) -+ return 0; -+ -+ return 1; -+} -+ -+static bool match_io_sniff_value(_adapter *adapter -+ , const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u8 len, u32 val) -+{ -+ u8 sniff_len; -+ s8 mask_shift; -+ u32 mask; -+ s8 value_shift; -+ u32 value; -+ bool ret = 0; -+ -+ /* check if IO range after sniff end address */ -+ sniff_len = 4; -+ while (!(sniff->u.vm.mask & (0xFF << ((sniff_len - 1) * 8)))) { -+ sniff_len--; -+ if (sniff_len == 0) -+ goto exit; -+ } -+ if (sniff->addr + sniff_len <= addr) -+ goto exit; -+ -+ /* align to IO addr */ -+ mask_shift = (sniff->addr - addr) * 8; -+ value_shift = mask_shift + bitshift(sniff->u.vm.mask); -+ if (mask_shift > 0) -+ mask = sniff->u.vm.mask << mask_shift; -+ else if (mask_shift < 0) -+ mask = sniff->u.vm.mask >> -mask_shift; -+ else -+ mask = sniff->u.vm.mask; -+ -+ if (value_shift > 0) -+ value = sniff->u.vm.val << value_shift; -+ else if (mask_shift < 0) -+ value = sniff->u.vm.val >> -value_shift; -+ else -+ value = sniff->u.vm.val; -+ -+ if ((sniff->u.vm.equal && (mask & val) == (mask & value)) -+ || (!sniff->u.vm.equal && (mask & val) != (mask & value)) -+ ) { -+ ret = 1; -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" addr:0x%x len:%u val:0x%x (i:%d sniff_len:%u m_shift:%d mask:0x%x v_shifd:%d value:0x%x equal:%d)\n" -+ , FUNC_ADPT_ARG(adapter), addr, len, val, i, sniff_len, mask_shift, mask, value_shift, value, sniff->u.vm.equal); -+ } -+ -+exit: -+ return ret; -+} -+ -+static bool match_io_sniff(_adapter *adapter -+ , const struct rtw_io_sniff_ent *sniff, int i, u32 addr, u8 len, u32 val) -+{ -+ bool ret = 0; -+ -+ if (sniff->chip != MAX_CHIP_TYPE -+ && sniff->chip != rtw_get_chip_type(adapter)) -+ goto exit; -+ if (sniff->hci -+ && !(sniff->hci & rtw_get_intf_type(adapter))) -+ goto exit; -+ if (sniff->addr >= addr + len) /* IO range below sniff start address */ -+ goto exit; -+ -+ switch (sniff->type) { -+ case RTW_IO_SNIFF_TYPE_RANGE: -+ ret = match_io_sniff_ranges(adapter, sniff, i, addr, len); -+ break; -+ case RTW_IO_SNIFF_TYPE_VALUE: -+ if (len == 1 || len == 2 || len == 4) -+ ret = match_io_sniff_value(adapter, sniff, i, addr, len, val); -+ break; -+ default: -+ rtw_warn_on(1); -+ break; -+ } -+ -+exit: -+ return ret; -+} -+ -+u32 match_read_sniff(_adapter *adapter, u32 addr, u16 len, u32 val) -+{ -+ int i; -+ bool trace = 0; -+ u32 match = 0; -+ -+ for (i = 0; i < read_sniff_num; i++) { -+ if (match_io_sniff(adapter, &read_sniff[i], i, addr, len, val)) { -+ match++; -+ trace |= read_sniff[i].trace; -+ if (read_sniff[i].tag) -+ RTW_INFO("DBG_IO TAG %s\n", read_sniff[i].tag); -+ } -+ } -+ -+ rtw_warn_on(trace); -+ -+ return match; -+} -+ -+u32 match_write_sniff(_adapter *adapter, u32 addr, u16 len, u32 val) -+{ -+ int i; -+ bool trace = 0; -+ u32 match = 0; -+ -+ for (i = 0; i < write_sniff_num; i++) { -+ if (match_io_sniff(adapter, &write_sniff[i], i, addr, len, val)) { -+ match++; -+ trace |= write_sniff[i].trace; -+ if (write_sniff[i].tag) -+ RTW_INFO("DBG_IO TAG %s\n", write_sniff[i].tag); -+ } -+ } -+ -+ rtw_warn_on(trace); -+ -+ return match; -+} -+ -+struct rf_sniff_ent { -+ u8 path; -+ u16 reg; -+ u32 mask; -+}; -+ -+struct rf_sniff_ent rf_read_sniff_ranges[] = { -+ /* example for all path addr 0x55 with all RF Reg mask */ -+ /* {MAX_RF_PATH, 0x55, bRFRegOffsetMask}, */ -+}; -+ -+struct rf_sniff_ent rf_write_sniff_ranges[] = { -+ /* example for all path addr 0x55 with all RF Reg mask */ -+ /* {MAX_RF_PATH, 0x55, bRFRegOffsetMask}, */ -+}; -+ -+int rf_read_sniff_num = sizeof(rf_read_sniff_ranges) / sizeof(struct rf_sniff_ent); -+int rf_write_sniff_num = sizeof(rf_write_sniff_ranges) / sizeof(struct rf_sniff_ent); -+ -+bool match_rf_read_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask) -+{ -+ int i; -+ -+ for (i = 0; i < rf_read_sniff_num; i++) { -+ if (rf_read_sniff_ranges[i].path == MAX_RF_PATH || rf_read_sniff_ranges[i].path == path) -+ if (addr == rf_read_sniff_ranges[i].reg && (mask & rf_read_sniff_ranges[i].mask)) -+ return _TRUE; -+ } -+ -+ return _FALSE; -+} -+ -+bool match_rf_write_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask) -+{ -+ int i; -+ -+ for (i = 0; i < rf_write_sniff_num; i++) { -+ if (rf_write_sniff_ranges[i].path == MAX_RF_PATH || rf_write_sniff_ranges[i].path == path) -+ if (addr == rf_write_sniff_ranges[i].reg && (mask & rf_write_sniff_ranges[i].mask)) -+ return _TRUE; -+ } -+ -+ return _FALSE; -+} -+ -+void dbg_rtw_reg_read_monitor(_adapter *adapter, u32 addr, u32 len, u32 val, const char *caller, const int line) -+{ -+ if (match_read_sniff(adapter, addr, len, val)) { -+ switch (len) { -+ case 1: -+ RTW_INFO("DBG_IO %s:%d read8(0x%04x) return 0x%02x\n" -+ , caller, line, addr, val); -+ break; -+ case 2: -+ RTW_INFO("DBG_IO %s:%d read16(0x%04x) return 0x%04x\n" -+ , caller, line, addr, val); -+ break; -+ case 4: -+ RTW_INFO("DBG_IO %s:%d read32(0x%04x) return 0x%08x\n" -+ , caller, line, addr, val); -+ break; -+ default: -+ RTW_INFO("DBG_IO %s:%d readN(0x%04x, %u)\n" -+ , caller, line, addr, len); -+ } -+ } -+} -+ -+void dbg_rtw_reg_write_monitor(_adapter *adapter, u32 addr, u32 len, u32 val, const char *caller, const int line) -+{ -+ if (match_write_sniff(adapter, addr, len, val)) { -+ switch (len) { -+ case 1: -+ RTW_INFO("DBG_IO %s:%d write8(0x%04x, 0x%02x)\n" -+ , caller, line, addr, val); -+ break; -+ case 2: -+ RTW_INFO("DBG_IO %s:%d write16(0x%04x, 0x%04x)\n" -+ , caller, line, addr, val); -+ break; -+ case 4: -+ RTW_INFO("DBG_IO %s:%d write32(0x%04x, 0x%08x)\n" -+ , caller, line, addr, val); -+ break; -+ default: -+ RTW_INFO("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n" -+ , caller, line, addr, len); -+ } -+ } -+} -+ -+u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line) -+{ -+ u8 val = _rtw_read8(adapter, addr); -+ -+ if (match_read_sniff(adapter, addr, 1, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n" -+ , caller, line, addr, val); -+ } -+ -+ return val; -+} -+ -+u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line) -+{ -+ u16 val = _rtw_read16(adapter, addr); -+ -+ if (match_read_sniff(adapter, addr, 2, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n" -+ , caller, line, addr, val); -+ } -+ -+ return val; -+} -+ -+u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line) -+{ -+ u32 val = _rtw_read32(adapter, addr); -+ -+ if (match_read_sniff(adapter, addr, 4, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n" -+ , caller, line, addr, val); -+ } -+ -+ return val; -+} -+ -+int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line) -+{ -+ if (match_write_sniff(adapter, addr, 1, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n" -+ , caller, line, addr, val); -+ } -+ -+ return _rtw_write8(adapter, addr, val); -+} -+int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line) -+{ -+ if (match_write_sniff(adapter, addr, 2, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n" -+ , caller, line, addr, val); -+ } -+ -+ return _rtw_write16(adapter, addr, val); -+} -+int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line) -+{ -+ if (match_write_sniff(adapter, addr, 4, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n" -+ , caller, line, addr, val); -+ } -+ -+ return _rtw_write32(adapter, addr, val); -+} -+int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line) -+{ -+ if (match_write_sniff(adapter, addr, length, 0)) { -+ RTW_INFO("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n" -+ , caller, line, addr, length); -+ } -+ -+ return _rtw_writeN(adapter, addr, length, data); -+} -+ -+#ifdef CONFIG_SDIO_HCI -+u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line) -+{ -+ u8 val = _rtw_sd_f0_read8(adapter, addr); -+ -+#if 0 -+ if (match_read_sniff(adapter, addr, 1, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_sd_f0_read8(0x%04x) return 0x%02x\n" -+ , caller, line, addr, val); -+ } -+#endif -+ -+ return val; -+} -+ -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line) -+{ -+ u8 val = rtw_sd_iread8(adapter, addr); -+ -+ if (match_read_sniff(adapter, addr, 1, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_sd_iread8(0x%04x) return 0x%02x\n" -+ , caller, line, addr, val); -+ } -+ -+ return val; -+} -+ -+u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line) -+{ -+ u16 val = _rtw_sd_iread16(adapter, addr); -+ -+ if (match_read_sniff(adapter, addr, 2, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_sd_iread16(0x%04x) return 0x%04x\n" -+ , caller, line, addr, val); -+ } -+ -+ return val; -+} -+ -+u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line) -+{ -+ u32 val = _rtw_sd_iread32(adapter, addr); -+ -+ if (match_read_sniff(adapter, addr, 4, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_sd_iread32(0x%04x) return 0x%08x\n" -+ , caller, line, addr, val); -+ } -+ -+ return val; -+} -+ -+int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line) -+{ -+ if (match_write_sniff(adapter, addr, 1, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite8(0x%04x, 0x%02x)\n" -+ , caller, line, addr, val); -+ } -+ -+ return _rtw_sd_iwrite8(adapter, addr, val); -+} -+int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line) -+{ -+ if (match_write_sniff(adapter, addr, 2, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite16(0x%04x, 0x%04x)\n" -+ , caller, line, addr, val); -+ } -+ -+ return _rtw_sd_iwrite16(adapter, addr, val); -+} -+int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line) -+{ -+ if (match_write_sniff(adapter, addr, 4, val)) { -+ RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite32(0x%04x, 0x%08x)\n" -+ , caller, line, addr, val); -+ } -+ -+ return _rtw_sd_iwrite32(adapter, addr, val); -+} -+ -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+ -+#endif /* CONFIG_SDIO_HCI */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/core/rtw_ioctl_query.c b/drivers/staging/rtl8723cs/core/rtw_ioctl_query.c -new file mode 100644 -index 000000000000..939213843584 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_ioctl_query.c -@@ -0,0 +1,19 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_IOCTL_QUERY_C_ -+ -+#include -+ -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_ioctl_set.c b/drivers/staging/rtl8723cs/core/rtw_ioctl_set.c -new file mode 100644 -index 000000000000..060546ce99b6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_ioctl_set.c -@@ -0,0 +1,929 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_IOCTL_SET_C_ -+ -+#include -+#include -+ -+ -+extern void indicate_wx_scan_complete_event(_adapter *padapter); -+ -+#define IS_MAC_ADDRESS_BROADCAST(addr) \ -+ (\ -+ ((addr[0] == 0xff) && (addr[1] == 0xff) && \ -+ (addr[2] == 0xff) && (addr[3] == 0xff) && \ -+ (addr[4] == 0xff) && (addr[5] == 0xff)) ? _TRUE : _FALSE \ -+ ) -+ -+u8 rtw_validate_bssid(u8 *bssid) -+{ -+ u8 ret = _TRUE; -+ -+ if (is_zero_mac_addr(bssid) -+ || is_broadcast_mac_addr(bssid) -+ || is_multicast_mac_addr(bssid) -+ ) -+ ret = _FALSE; -+ -+ return ret; -+} -+ -+u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid) -+{ -+#ifdef CONFIG_VALIDATE_SSID -+ u8 i; -+#endif -+ u8 ret = _TRUE; -+ -+ -+ if (ssid->SsidLength > 32) { -+ ret = _FALSE; -+ goto exit; -+ } -+ -+#ifdef CONFIG_VALIDATE_SSID -+ for (i = 0; i < ssid->SsidLength; i++) { -+ /* wifi, printable ascii code must be supported */ -+ if (!((ssid->Ssid[i] >= 0x20) && (ssid->Ssid[i] <= 0x7e))) { -+ ret = _FALSE; -+ break; -+ } -+ } -+#endif /* CONFIG_VALIDATE_SSID */ -+ -+exit: -+ -+ -+ return ret; -+} -+ -+u8 rtw_do_join(_adapter *padapter); -+u8 rtw_do_join(_adapter *padapter) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ u8 *pibss = NULL; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sitesurvey_parm parm; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ u8 ret = _SUCCESS; -+ -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ -+ pmlmepriv->cur_network.join_res = -2; -+ -+ set_fwstate(pmlmepriv, WIFI_UNDER_LINKING); -+ -+ pmlmepriv->pscanned = plist; -+ -+ pmlmepriv->to_join = _TRUE; -+ -+ rtw_init_sitesurvey_parm(padapter, &parm); -+ _rtw_memcpy(&parm.ssid[0], &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); -+ parm.ssid_num = 1; -+ -+ if (pmlmepriv->assoc_ch) { -+ parm.ch_num = 1; -+ parm.ch[0].hw_value = pmlmepriv->assoc_ch; -+ parm.ch[0].flags = 0; -+ } -+ -+ if (_rtw_queue_empty(queue) == _TRUE) { -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ -+ /* when set_ssid/set_bssid for rtw_do_join(), but scanning queue is empty */ -+ /* we try to issue sitesurvey firstly */ -+ -+ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE -+ || rtw_to_roam(padapter) > 0 -+ ) { -+ u8 ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); -+ -+ if ((ssc_chk == SS_ALLOW) || (ssc_chk == SS_DENY_BUSY_TRAFFIC) ){ -+ /* submit site_survey_cmd */ -+ ret = rtw_sitesurvey_cmd(padapter, &parm); -+ if (_SUCCESS != ret) -+ pmlmepriv->to_join = _FALSE; -+ } else { -+ /*if (ssc_chk == SS_DENY_BUDDY_UNDER_SURVEY)*/ -+ pmlmepriv->to_join = _FALSE; -+ ret = _FAIL; -+ } -+ } else { -+ pmlmepriv->to_join = _FALSE; -+ ret = _FAIL; -+ } -+ -+ goto exit; -+ } else { -+ int select_ret; -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ select_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv); -+ if (select_ret == _SUCCESS) { -+ pmlmepriv->to_join = _FALSE; -+ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); -+ } else { -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) { -+ #ifdef CONFIG_AP_MODE -+ /* submit createbss_cmd to change to a ADHOC_MASTER */ -+ -+ /* pmlmepriv->lock has been acquired by caller... */ -+ WLAN_BSSID_EX *pdev_network = &(padapter->registrypriv.dev_network); -+ -+ /*pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE;*/ -+ init_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+ -+ pibss = padapter->registrypriv.dev_network.MacAddress; -+ -+ _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); -+ _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); -+ -+ rtw_update_registrypriv_dev_network(padapter); -+ -+ rtw_generate_random_ibss(pibss); -+ -+ if (rtw_create_ibss_cmd(padapter, 0) != _SUCCESS) { -+ ret = _FALSE; -+ goto exit; -+ } -+ -+ pmlmepriv->to_join = _FALSE; -+ #endif /* CONFIG_AP_MODE */ -+ } else { -+ /* can't associate ; reset under-linking */ -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ -+ /* when set_ssid/set_bssid for rtw_do_join(), but there are no desired bss in scanning queue */ -+ /* we try to issue sitesurvey firstly */ -+ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE -+ || rtw_to_roam(padapter) > 0 -+ ) { -+ u8 ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); -+ -+ if ((ssc_chk == SS_ALLOW) || (ssc_chk == SS_DENY_BUSY_TRAFFIC)){ -+ /* RTW_INFO(("rtw_do_join() when no desired bss in scanning queue\n"); */ -+ ret = rtw_sitesurvey_cmd(padapter, &parm); -+ if (_SUCCESS != ret) -+ pmlmepriv->to_join = _FALSE; -+ } else { -+ /*if (ssc_chk == SS_DENY_BUDDY_UNDER_SURVEY) { -+ } else {*/ -+ ret = _FAIL; -+ pmlmepriv->to_join = _FALSE; -+ } -+ } else { -+ ret = _FAIL; -+ pmlmepriv->to_join = _FALSE; -+ } -+ } -+ -+ } -+ -+ } -+ -+exit: -+ -+ return ret; -+} -+ -+u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid) -+{ -+ _irqL irqL; -+ u8 status = _SUCCESS; -+ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ -+ RTW_PRINT("set bssid:%pM\n", bssid); -+ -+ if ((bssid[0] == 0x00 && bssid[1] == 0x00 && bssid[2] == 0x00 && bssid[3] == 0x00 && bssid[4] == 0x00 && bssid[5] == 0x00) || -+ (bssid[0] == 0xFF && bssid[1] == 0xFF && bssid[2] == 0xFF && bssid[3] == 0xFF && bssid[4] == 0xFF && bssid[5] == 0xFF)) { -+ status = _FAIL; -+ goto exit; -+ } -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ -+ RTW_INFO("Set BSSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv)); -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE) -+ goto handle_tkip_countermeasure; -+ else if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) == _TRUE) -+ goto release_mlme_lock; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE | WIFI_ADHOC_MASTER_STATE) == _TRUE) { -+ -+ if (_rtw_memcmp(&pmlmepriv->cur_network.network.MacAddress, bssid, ETH_ALEN) == _TRUE) { -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE) -+ goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */ -+ } else { -+ -+ rtw_disassoc_cmd(padapter, 0, 0); -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ -+ rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { -+ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); -+ } -+ } -+ } -+ -+handle_tkip_countermeasure: -+ if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) { -+ status = _FAIL; -+ goto release_mlme_lock; -+ } -+ -+ _rtw_memset(&pmlmepriv->assoc_ssid, 0, sizeof(NDIS_802_11_SSID)); -+ _rtw_memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN); -+ pmlmepriv->assoc_ch = 0; -+ pmlmepriv->assoc_by_bssid = _TRUE; -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE) -+ pmlmepriv->to_join = _TRUE; -+ else -+ status = rtw_do_join(padapter); -+ -+release_mlme_lock: -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+exit: -+ -+ -+ return status; -+} -+ -+u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid) -+{ -+ _irqL irqL; -+ u8 status = _SUCCESS; -+ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *pnetwork = &pmlmepriv->cur_network; -+ -+ -+ RTW_PRINT("set ssid [%s] fw_state=0x%08x\n", -+ ssid->Ssid, get_fwstate(pmlmepriv)); -+ -+ if (!rtw_is_hw_init_completed(padapter)) { -+ status = _FAIL; -+ goto exit; -+ } -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ RTW_INFO("Set SSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv)); -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE) -+ goto handle_tkip_countermeasure; -+ else if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) == _TRUE) -+ goto release_mlme_lock; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE | WIFI_ADHOC_MASTER_STATE) == _TRUE) { -+ -+ if ((pmlmepriv->assoc_ssid.SsidLength == ssid->SsidLength) && -+ (_rtw_memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength) == _TRUE)) { -+ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE)) { -+ -+ if (rtw_is_same_ibss(padapter, pnetwork) == _FALSE) { -+ /* if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again */ -+ rtw_disassoc_cmd(padapter, 0, 0); -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ -+ rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); -+ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { -+ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); -+ } -+ } else { -+ goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */ -+ } -+ } -+#ifdef CONFIG_LPS -+ else -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_JOINBSS, 0); -+#endif -+ } else { -+ -+ rtw_disassoc_cmd(padapter, 0, 0); -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ -+ rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); -+ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { -+ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); -+ } -+ } -+ } -+ -+handle_tkip_countermeasure: -+ if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) { -+ status = _FAIL; -+ goto release_mlme_lock; -+ } -+ -+ if (rtw_validate_ssid(ssid) == _FALSE) { -+ status = _FAIL; -+ goto release_mlme_lock; -+ } -+ -+ _rtw_memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(NDIS_802_11_SSID)); -+ pmlmepriv->assoc_ch = 0; -+ pmlmepriv->assoc_by_bssid = _FALSE; -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE) -+ pmlmepriv->to_join = _TRUE; -+ else -+ status = rtw_do_join(padapter); -+ -+release_mlme_lock: -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+exit: -+ -+ -+ return status; -+ -+} -+ -+u8 rtw_set_802_11_connect(_adapter *padapter, -+ u8 *bssid, NDIS_802_11_SSID *ssid, u16 ch) -+{ -+ _irqL irqL; -+ u8 status = _SUCCESS; -+ bool bssid_valid = _TRUE; -+ bool ssid_valid = _TRUE; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ -+ if (!ssid || rtw_validate_ssid(ssid) == _FALSE) -+ ssid_valid = _FALSE; -+ -+ if (!bssid || rtw_validate_bssid(bssid) == _FALSE) -+ bssid_valid = _FALSE; -+ -+ if (ssid_valid == _FALSE && bssid_valid == _FALSE) { -+ RTW_INFO(FUNC_ADPT_FMT" ssid:%p, ssid_valid:%d, bssid:%p, bssid_valid:%d\n", -+ FUNC_ADPT_ARG(padapter), ssid, ssid_valid, bssid, bssid_valid); -+ status = _FAIL; -+ goto exit; -+ } -+ -+ if (!rtw_is_hw_init_completed(padapter)) { -+ status = _FAIL; -+ goto exit; -+ } -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ RTW_PRINT(FUNC_ADPT_FMT" fw_state=0x%08x\n", -+ FUNC_ADPT_ARG(padapter), get_fwstate(pmlmepriv)); -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE) -+ goto handle_tkip_countermeasure; -+ else if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) == _TRUE) -+ goto release_mlme_lock; -+ -+handle_tkip_countermeasure: -+ if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) { -+ status = _FAIL; -+ goto release_mlme_lock; -+ } -+ -+ if (ssid && ssid_valid) -+ _rtw_memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(NDIS_802_11_SSID)); -+ else -+ _rtw_memset(&pmlmepriv->assoc_ssid, 0, sizeof(NDIS_802_11_SSID)); -+ -+ if (bssid && bssid_valid) { -+ _rtw_memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN); -+ pmlmepriv->assoc_by_bssid = _TRUE; -+ } else -+ pmlmepriv->assoc_by_bssid = _FALSE; -+ -+ pmlmepriv->assoc_ch = ch; -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE) -+ pmlmepriv->to_join = _TRUE; -+ else -+ status = rtw_do_join(padapter); -+ -+release_mlme_lock: -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+exit: -+ return status; -+} -+ -+u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter, -+ NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, u8 flags) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &pmlmepriv->cur_network; -+ NDIS_802_11_NETWORK_INFRASTRUCTURE *pold_state = &(cur_network->network.InfrastructureMode); -+ u8 ap2sta_mode = _FALSE; -+ u8 ret = _TRUE; -+ u8 is_linked = _FALSE, is_adhoc_master = _FALSE; -+ -+ if (*pold_state != networktype) { -+ /* RTW_INFO("change mode, old_mode=%d, new_mode=%d, fw_state=0x%x\n", *pold_state, networktype, get_fwstate(pmlmepriv)); */ -+ -+ if (*pold_state == Ndis802_11APMode -+ || *pold_state == Ndis802_11_mesh -+ ) { -+ /* change to other mode from Ndis802_11APMode/Ndis802_11_mesh */ -+ cur_network->join_res = -1; -+ ap2sta_mode = _TRUE; -+#ifdef CONFIG_NATIVEAP_MLME -+ stop_ap_mode(padapter); -+#endif -+ } -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ is_linked = check_fwstate(pmlmepriv, WIFI_ASOC_STATE); -+ is_adhoc_master = check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+ -+ /* flags = 0, means enqueue cmd and no wait */ -+ if (flags != 0) -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ if ((is_linked == _TRUE) || (*pold_state == Ndis802_11IBSS)) -+ rtw_disassoc_cmd(padapter, 0, flags); -+ -+ if ((is_linked == _TRUE) || -+ (is_adhoc_master == _TRUE)) -+ rtw_free_assoc_resources_cmd(padapter, _TRUE, flags); -+ -+ if ((*pold_state == Ndis802_11Infrastructure) || (*pold_state == Ndis802_11IBSS)) { -+ if (is_linked == _TRUE) { -+ rtw_indicate_disconnect(padapter, 0, _FALSE); /*will clr Linked_state; before this function, we must have checked whether issue dis-assoc_cmd or not*/ -+ } -+ } -+ -+ /* flags = 0, means enqueue cmd and no wait */ -+ if (flags != 0) -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ *pold_state = networktype; -+ -+ _clr_fwstate_(pmlmepriv, ~WIFI_NULL_STATE); -+ -+ switch (networktype) { -+ case Ndis802_11IBSS: -+ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); -+ break; -+ -+ case Ndis802_11Infrastructure: -+ set_fwstate(pmlmepriv, WIFI_STATION_STATE); -+ -+ if (ap2sta_mode) -+ rtw_init_bcmc_stainfo(padapter); -+ break; -+ -+ case Ndis802_11APMode: -+ set_fwstate(pmlmepriv, WIFI_AP_STATE); -+#ifdef CONFIG_NATIVEAP_MLME -+ start_ap_mode(padapter); -+ /* rtw_indicate_connect(padapter); */ -+#endif -+ -+ break; -+ -+#ifdef CONFIG_RTW_MESH -+ case Ndis802_11_mesh: -+ set_fwstate(pmlmepriv, WIFI_MESH_STATE); -+ start_ap_mode(padapter); -+ break; -+#endif -+ -+ case Ndis802_11AutoUnknown: -+ case Ndis802_11InfrastructureMax: -+ break; -+#ifdef CONFIG_WIFI_MONITOR -+ case Ndis802_11Monitor: -+ set_fwstate(pmlmepriv, WIFI_MONITOR_STATE); -+ break; -+#endif /* CONFIG_WIFI_MONITOR */ -+ default: -+ ret = _FALSE; -+ rtw_warn_on(1); -+ } -+ -+ /* SecClearAllKeys(adapter); */ -+ -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ } -+ -+ return ret; -+} -+ -+ -+u8 rtw_set_802_11_disassociate(_adapter *padapter) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ -+ rtw_disassoc_cmd(padapter, 0, 0); -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ /* modify for CONFIG_IEEE80211W, none 11w can use it */ -+ rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); -+ if (_FAIL == rtw_pwr_wakeup(padapter)) -+ RTW_INFO("%s(): rtw_pwr_wakeup fail !!!\n", __FUNCTION__); -+ } -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ -+ return _TRUE; -+} -+ -+#if 1 -+u8 rtw_set_802_11_bssid_list_scan(_adapter *padapter, struct sitesurvey_parm *pparm) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ u8 res = _TRUE; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ res = rtw_sitesurvey_cmd(padapter, pparm); -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ return res; -+} -+ -+#else -+u8 rtw_set_802_11_bssid_list_scan(_adapter *padapter, struct sitesurvey_parm *pparm) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ u8 res = _TRUE; -+ -+ -+ -+ if (padapter == NULL) { -+ res = _FALSE; -+ goto exit; -+ } -+ if (!rtw_is_hw_init_completed(padapter)) { -+ res = _FALSE; -+ goto exit; -+ } -+ -+ if ((check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING) == _TRUE) || -+ (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) { -+ /* Scan or linking is in progress, do nothing. */ -+ res = _TRUE; -+ -+ -+ } else { -+ if (rtw_is_scan_deny(padapter)) { -+ RTW_INFO(FUNC_ADPT_FMT": scan deny\n", FUNC_ADPT_ARG(padapter)); -+ indicate_wx_scan_complete_event(padapter); -+ return _SUCCESS; -+ } -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ res = rtw_sitesurvey_cmd(padapter, pparm); -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ } -+exit: -+ -+ -+ return res; -+} -+#endif -+ -+#ifdef CONFIG_RTW_ACS -+u8 rtw_set_acs_sitesurvey(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ struct sitesurvey_parm parm; -+ u8 uch; -+ u8 ch_num = 0; -+ int i; -+ BAND_TYPE band; -+ u8 (*center_chs_num)(u8) = NULL; -+ u8 (*center_chs)(u8, u8) = NULL; -+ u8 ret = _FAIL; -+ -+ if (!rtw_mi_get_ch_setting_union(adapter, &uch, NULL, NULL)) -+ goto exit; -+ -+ _rtw_memset(&parm, 0, sizeof(struct sitesurvey_parm)); -+ parm.scan_mode = SCAN_PASSIVE; -+ parm.bw = CHANNEL_WIDTH_20; -+ parm.acs = 1; -+ -+ for (band = BAND_ON_2_4G; band < BAND_MAX; band++) { -+ if (band == BAND_ON_2_4G) { -+ center_chs_num = center_chs_2g_num; -+ center_chs = center_chs_2g; -+ } else -+ #ifdef CONFIG_IEEE80211_BAND_5GHZ -+ if (band == BAND_ON_5G) { -+ center_chs_num = center_chs_5g_num; -+ center_chs = center_chs_5g; -+ } else -+ #endif -+ { -+ center_chs_num = NULL; -+ center_chs = NULL; -+ } -+ -+ if (!center_chs_num || !center_chs) -+ continue; -+ -+ if (rfctl->ch_sel_within_same_band) { -+ if (rtw_is_2g_ch(uch) && band != BAND_ON_2_4G) -+ continue; -+ #ifdef CONFIG_IEEE80211_BAND_5GHZ -+ if (rtw_is_5g_ch(uch) && band != BAND_ON_5G) -+ continue; -+ #endif -+ } -+ -+ ch_num = center_chs_num(CHANNEL_WIDTH_20); -+ for (i = 0; i < ch_num && parm.ch_num < RTW_CHANNEL_SCAN_AMOUNT; i++) { -+ parm.ch[parm.ch_num].hw_value = center_chs(CHANNEL_WIDTH_20, i); -+ parm.ch[parm.ch_num].flags = RTW_IEEE80211_CHAN_PASSIVE_SCAN; -+ parm.ch_num++; -+ } -+ } -+ -+ ret = rtw_set_802_11_bssid_list_scan(adapter, &parm); -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_RTW_ACS */ -+ -+u8 rtw_set_802_11_authentication_mode(_adapter *padapter, NDIS_802_11_AUTHENTICATION_MODE authmode) -+{ -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ int res; -+ u8 ret; -+ -+ -+ -+ psecuritypriv->ndisauthtype = authmode; -+ -+ -+ if (psecuritypriv->ndisauthtype > 3) -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (psecuritypriv->ndisauthtype == 6) -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; -+#endif -+ -+ res = rtw_set_auth(padapter, psecuritypriv); -+ -+ if (res == _SUCCESS) -+ ret = _TRUE; -+ else -+ ret = _FALSE; -+ -+ -+ return ret; -+} -+ -+u8 rtw_set_802_11_add_wep(_adapter *padapter, NDIS_802_11_WEP *wep) -+{ -+ -+ u8 bdefaultkey; -+ u8 btransmitkey; -+ sint keyid, res; -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ u8 ret = _SUCCESS; -+ -+ -+ bdefaultkey = (wep->KeyIndex & 0x40000000) > 0 ? _FALSE : _TRUE; /* for ??? */ -+ btransmitkey = (wep->KeyIndex & 0x80000000) > 0 ? _TRUE : _FALSE; /* for ??? */ -+ keyid = wep->KeyIndex & 0x3fffffff; -+ -+ if (keyid >= 4) { -+ ret = _FALSE; -+ goto exit; -+ } -+ -+ switch (wep->KeyLength) { -+ case 5: -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; -+ break; -+ case 13: -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; -+ break; -+ default: -+ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ break; -+ } -+ -+ -+ _rtw_memcpy(&(psecuritypriv->dot11DefKey[keyid].skey[0]), &(wep->KeyMaterial), wep->KeyLength); -+ -+ psecuritypriv->dot11DefKeylen[keyid] = wep->KeyLength; -+ -+ psecuritypriv->dot11PrivacyKeyIndex = keyid; -+ -+ -+ res = rtw_set_key(padapter, psecuritypriv, keyid, 1, _TRUE); -+ -+ if (res == _FAIL) -+ ret = _FALSE; -+exit: -+ -+ -+ return ret; -+ -+} -+ -+/* -+* rtw_get_cur_max_rate - -+* @adapter: pointer to _adapter structure -+* -+* Return 0 or 100Kbps -+*/ -+u16 rtw_get_cur_max_rate(_adapter *adapter) -+{ -+ int j; -+ int i = 0; -+ u16 rate = 0, max_rate = 0; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; -+ int sta_bssrate_len = 0; -+ unsigned char sta_bssrate[NumRates]; -+ struct sta_info *psta = NULL; -+ u8 short_GI = 0; -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (adapter->registrypriv.mp_mode == 1) { -+ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) -+ return 0; -+ } -+#endif -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ASOC_STATE) != _TRUE) -+ && (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE)) -+ return 0; -+ -+ psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) -+ return 0; -+ -+ short_GI = query_ra_short_GI(psta, rtw_get_tx_bw_mode(adapter, psta)); -+ -+#ifdef CONFIG_80211N_HT -+ if (is_supported_ht(psta->wireless_mode)) { -+ max_rate = rtw_ht_mcs_rate((psta->cmn.bw_mode == CHANNEL_WIDTH_40) ? 1 : 0 -+ , short_GI -+ , psta->htpriv.ht_cap.supp_mcs_set -+ ); -+ } -+#ifdef CONFIG_80211AC_VHT -+ else if (is_supported_vht(psta->wireless_mode)) -+ max_rate = ((rtw_vht_mcs_to_data_rate(psta->cmn.bw_mode, short_GI, pmlmepriv->vhtpriv.vht_highest_rate) + 1) >> 1) * 10; -+#endif /* CONFIG_80211AC_VHT */ -+ else -+#endif /* CONFIG_80211N_HT */ -+ { -+ /*station mode show :station && ap support rate; softap :show ap support rate*/ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) -+ get_rate_set(adapter, sta_bssrate, &sta_bssrate_len);/*get sta rate and length*/ -+ -+ -+ while ((pcur_bss->SupportedRates[i] != 0) && (pcur_bss->SupportedRates[i] != 0xFF)) { -+ rate = pcur_bss->SupportedRates[i] & 0x7F;/*AP support rates*/ -+ /*RTW_INFO("%s rate=%02X \n", __func__, rate);*/ -+ -+ /*check STA support rate or not */ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { -+ for (j = 0; j < sta_bssrate_len; j++) { -+ /* Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP */ -+ if ((rate | IEEE80211_BASIC_RATE_MASK) -+ == (sta_bssrate[j] | IEEE80211_BASIC_RATE_MASK)) { -+ if (rate > max_rate) { -+ max_rate = rate; -+ } -+ break; -+ } -+ } -+ } else { -+ -+ if (rate > max_rate) -+ max_rate = rate; -+ -+ } -+ i++; -+ } -+ -+ max_rate = max_rate * 10 / 2; -+ } -+ return max_rate; -+} -+ -+/* -+* rtw_set_scan_mode - -+* @adapter: pointer to _adapter structure -+* @scan_mode: -+* -+* Return _SUCCESS or _FAIL -+*/ -+int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode) -+{ -+ if (scan_mode != SCAN_ACTIVE && scan_mode != SCAN_PASSIVE) -+ return _FAIL; -+ -+ adapter->mlmepriv.scan_mode = scan_mode; -+ -+ return _SUCCESS; -+} -+ -+/* -+* rtw_set_channel_plan - -+* @adapter: pointer to _adapter structure -+* @channel_plan: -+* -+* Return _SUCCESS or _FAIL -+*/ -+int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan) -+{ -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ -+ if (!REGSTY_REGD_SRC_FROM_OS(regsty)) -+ return rtw_set_chplan_cmd(adapter, RTW_CMDF_WAIT_ACK, channel_plan, 1); -+ RTW_WARN("%s(): not applied\n", __func__); -+ return _SUCCESS; -+} -+ -+/* -+* rtw_set_country - -+* @adapter: pointer to _adapter structure -+* @country_code: string of country code -+* -+* Return _SUCCESS or _FAIL -+*/ -+int rtw_set_country(_adapter *adapter, const char *country_code) -+{ -+#ifdef CONFIG_RTW_IOCTL_SET_COUNTRY -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ -+ if (!REGSTY_REGD_SRC_FROM_OS(regsty)) -+ return rtw_set_country_cmd(adapter, RTW_CMDF_WAIT_ACK, country_code, 1); -+#endif -+ RTW_WARN("%s(): not applied\n", __func__); -+ return _SUCCESS; -+} -+ -+/* -+* rtw_set_band - -+* @adapter: pointer to _adapter structure -+* @band: band to set -+* -+* Return _SUCCESS or _FAIL -+*/ -+int rtw_set_band(_adapter *adapter, u8 band) -+{ -+ if (rtw_band_valid(band)) { -+ RTW_INFO(FUNC_ADPT_FMT" band:%d\n", FUNC_ADPT_ARG(adapter), band); -+ adapter->setband = band; -+ return _SUCCESS; -+ } -+ -+ RTW_PRINT(FUNC_ADPT_FMT" band:%d fail\n", FUNC_ADPT_ARG(adapter), band); -+ return _FAIL; -+} -diff --git a/drivers/staging/rtl8723cs/core/rtw_iol.c b/drivers/staging/rtl8723cs/core/rtw_iol.c -new file mode 100644 -index 000000000000..714a3f44ede9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_iol.c -@@ -0,0 +1,388 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+ -+#ifdef CONFIG_IOL -+struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter) -+{ -+ struct xmit_frame *xmit_frame; -+ struct xmit_buf *xmitbuf; -+ struct pkt_attrib *pattrib; -+ struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); -+ -+#if 1 -+ xmit_frame = rtw_alloc_xmitframe(pxmitpriv, 0); -+ if (xmit_frame == NULL) { -+ RTW_INFO("%s rtw_alloc_xmitframe return null\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ xmitbuf = rtw_alloc_xmitbuf(pxmitpriv); -+ if (xmitbuf == NULL) { -+ RTW_INFO("%s rtw_alloc_xmitbuf return null\n", __FUNCTION__); -+ rtw_free_xmitframe(pxmitpriv, xmit_frame); -+ xmit_frame = NULL; -+ goto exit; -+ } -+ -+ xmit_frame->frame_tag = MGNT_FRAMETAG; -+ xmit_frame->pxmitbuf = xmitbuf; -+ xmit_frame->buf_addr = xmitbuf->pbuf; -+ xmitbuf->priv_data = xmit_frame; -+ -+ pattrib = &xmit_frame->attrib; -+ update_mgntframe_attrib(adapter, pattrib); -+ pattrib->qsel = QSLT_BEACON;/* Beacon */ -+ pattrib->subtype = WIFI_BEACON; -+ pattrib->pktlen = pattrib->last_txcmdsz = 0; -+ -+#else -+ xmit_frame = alloc_mgtxmitframe(pxmitpriv); -+ if (xmit_frame == NULL) -+ RTW_INFO("%s alloc_mgtxmitframe return null\n", __FUNCTION__); -+ else { -+ pattrib = &xmit_frame->attrib; -+ update_mgntframe_attrib(adapter, pattrib); -+ pattrib->qsel = QSLT_BEACON; -+ pattrib->pktlen = pattrib->last_txcmdsz = 0; -+ } -+#endif -+ -+exit: -+ return xmit_frame; -+} -+ -+ -+int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len) -+{ -+ struct pkt_attrib *pattrib = &xmit_frame->attrib; -+ u16 buf_offset; -+ u32 ori_len; -+ -+ buf_offset = TXDESC_OFFSET; -+ ori_len = buf_offset + pattrib->pktlen; -+ -+ /* check if the io_buf can accommodate new cmds */ -+ if (ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) { -+ RTW_INFO("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n", __FUNCTION__ -+ , ori_len + cmd_len + 8, MAX_XMITBUF_SZ); -+ return _FAIL; -+ } -+ -+ _rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len); -+ pattrib->pktlen += cmd_len; -+ pattrib->last_txcmdsz += cmd_len; -+ -+ /* RTW_INFO("%s ori:%u + cmd_len:%u = %u\n", __FUNCTION__, ori_len, cmd_len, buf_offset+pattrib->pktlen); */ -+ -+ return _SUCCESS; -+} -+ -+bool rtw_IOL_applied(ADAPTER *adapter) -+{ -+ if (1 == adapter->registrypriv.fw_iol) -+ return _TRUE; -+ -+#ifdef CONFIG_USB_HCI -+ if ((2 == adapter->registrypriv.fw_iol) && (IS_FULL_SPEED_USB(adapter))) -+ return _TRUE; -+#endif -+ -+ return _FALSE; -+} -+ -+int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt) -+{ -+ return rtw_hal_iol_cmd(adapter, xmit_frame, max_wating_ms, bndy_cnt); -+} -+ -+#ifdef CONFIG_IOL_NEW_GENERATION -+int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary) -+{ -+ return _SUCCESS; -+} -+int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask) -+{ -+ struct ioreg_cfg cmd = {8, IOREG_CMD_WB_REG, 0x0, 0x0, 0x0}; -+ -+ /* RTW_PUT_LE16((u8*)&cmd.address, addr); */ -+ /* RTW_PUT_LE32((u8*)&cmd.value, (u32)value); */ -+ cmd.address = cpu_to_le16(addr); -+ cmd.data = cpu_to_le32(value); -+ -+ if (mask != 0xFF) { -+ cmd.length = 12; -+ /* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); */ -+ cmd.mask = cpu_to_le32(mask); -+ } -+ -+ /* RTW_INFO("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FUNCTION__, addr,value,mask); */ -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length); -+ -+} -+int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask) -+{ -+ struct ioreg_cfg cmd = {8, IOREG_CMD_WW_REG, 0x0, 0x0, 0x0}; -+ -+ /* RTW_PUT_LE16((u8*)&cmd.address, addr); */ -+ /* RTW_PUT_LE32((u8*)&cmd.value, (u32)value); */ -+ cmd.address = cpu_to_le16(addr); -+ cmd.data = cpu_to_le32(value); -+ -+ if (mask != 0xFFFF) { -+ cmd.length = 12; -+ /* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); */ -+ cmd.mask = cpu_to_le32(mask); -+ } -+ -+ /* RTW_INFO("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FUNCTION__, addr,value,mask); */ -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length); -+ -+} -+int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask) -+{ -+ struct ioreg_cfg cmd = {8, IOREG_CMD_WD_REG, 0x0, 0x0, 0x0}; -+ -+ /* RTW_PUT_LE16((u8*)&cmd.address, addr); */ -+ /* RTW_PUT_LE32((u8*)&cmd.value, (u32)value); */ -+ cmd.address = cpu_to_le16(addr); -+ cmd.data = cpu_to_le32(value); -+ -+ if (mask != 0xFFFFFFFF) { -+ cmd.length = 12; -+ /* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); */ -+ cmd.mask = cpu_to_le32(mask); -+ } -+ -+ /* RTW_INFO("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FU2NCTION__, addr,value,mask); */ -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length); -+ -+} -+ -+int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask) -+{ -+ struct ioreg_cfg cmd = {8, IOREG_CMD_W_RF, 0x0, 0x0, 0x0}; -+ -+ /* RTW_PUT_LE16((u8*)&cmd.address, addr); */ -+ /* RTW_PUT_LE32((u8*)&cmd.value, (u32)value); */ -+ cmd.address = (rf_path << 8) | ((addr) & 0xFF); -+ cmd.data = cpu_to_le32(value); -+ -+ if (mask != 0x000FFFFF) { -+ cmd.length = 12; -+ /* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask); */ -+ cmd.mask = cpu_to_le32(mask); -+ } -+ -+ /* RTW_INFO("%s rf_path:0x%02x addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FU2NCTION__,rf_path, addr,value,mask); */ -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length); -+ -+} -+ -+ -+ -+int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us) -+{ -+ struct ioreg_cfg cmd = {4, IOREG_CMD_DELAY_US, 0x0, 0x0, 0x0}; -+ /* RTW_PUT_LE16((u8*)&cmd.address, us); */ -+ cmd.address = cpu_to_le16(us); -+ -+ /* RTW_INFO("%s %u\n", __FUNCTION__, us); */ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4); -+} -+ -+int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms) -+{ -+ struct ioreg_cfg cmd = {4, IOREG_CMD_DELAY_US, 0x0, 0x0, 0x0}; -+ -+ /* RTW_PUT_LE16((u8*)&cmd.address, ms); */ -+ cmd.address = cpu_to_le16(ms); -+ -+ /* RTW_INFO("%s %u\n", __FUNCTION__, ms); */ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4); -+} -+int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame) -+{ -+ struct ioreg_cfg cmd = {4, IOREG_CMD_END, 0xFFFF, 0xFF, 0x0}; -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4); -+ -+} -+ -+u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame) -+{ -+ u8 is_cmd_bndy = _FALSE; -+ if (((pxmit_frame->attrib.pktlen + 32) % 256) + 8 >= 256) { -+ rtw_IOL_append_END_cmd(pxmit_frame); -+ pxmit_frame->attrib.pktlen = ((((pxmit_frame->attrib.pktlen + 32) / 256) + 1) * 256); -+ -+ /* printk("==> %s, pktlen(%d)\n",__FUNCTION__,pxmit_frame->attrib.pktlen); */ -+ pxmit_frame->attrib.last_txcmdsz = pxmit_frame->attrib.pktlen; -+ is_cmd_bndy = _TRUE; -+ } -+ return is_cmd_bndy; -+} -+ -+void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter, int buf_len, u8 *pbuf) -+{ -+ int i; -+ int j = 1; -+ -+ printk("###### %s ######\n", __FUNCTION__); -+ for (i = 0; i < buf_len; i++) { -+ printk("%02x-", *(pbuf + i)); -+ -+ if (j % 32 == 0) -+ printk("\n"); -+ j++; -+ } -+ printk("\n"); -+ printk("============= ioreg_cmd len = %d ===============\n", buf_len); -+} -+ -+ -+#else /* CONFIG_IOL_NEW_GENERATION */ -+int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary) -+{ -+ IOL_CMD cmd = {0x0, IOL_CMD_LLT, 0x0, 0x0}; -+ -+ RTW_PUT_BE32((u8 *)&cmd.value, (u32)page_boundary); -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8); -+} -+ -+int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value) -+{ -+ IOL_CMD cmd = {0x0, IOL_CMD_WB_REG, 0x0, 0x0}; -+ -+ RTW_PUT_BE16((u8 *)&cmd.address, (u16)addr); -+ RTW_PUT_BE32((u8 *)&cmd.value, (u32)value); -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8); -+} -+ -+int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value) -+{ -+ IOL_CMD cmd = {0x0, IOL_CMD_WW_REG, 0x0, 0x0}; -+ -+ RTW_PUT_BE16((u8 *)&cmd.address, (u16)addr); -+ RTW_PUT_BE32((u8 *)&cmd.value, (u32)value); -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8); -+} -+ -+int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value) -+{ -+ IOL_CMD cmd = {0x0, IOL_CMD_WD_REG, 0x0, 0x0}; -+ u8 *pos = (u8 *)&cmd; -+ -+ RTW_PUT_BE16((u8 *)&cmd.address, (u16)addr); -+ RTW_PUT_BE32((u8 *)&cmd.value, (u32)value); -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8); -+} -+ -+#ifdef DBG_IO -+int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line) -+{ -+ if (match_write_sniff(xmit_frame->padapter, addr, 1, value)) { -+ RTW_INFO("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n" -+ , caller, line, addr, value); -+ } -+ -+ return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value); -+} -+ -+int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line) -+{ -+ if (match_write_sniff(xmit_frame->padapter, addr, 2, value)) { -+ RTW_INFO("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n" -+ , caller, line, addr, value); -+ } -+ -+ return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value); -+} -+ -+int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line) -+{ -+ if (match_write_sniff(xmit_frame->padapter, addr, 4, value)) { -+ RTW_INFO("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n" -+ , caller, line, addr, value); -+ } -+ -+ return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value); -+} -+#endif -+ -+int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us) -+{ -+ IOL_CMD cmd = {0x0, IOL_CMD_DELAY_US, 0x0, 0x0}; -+ -+ RTW_PUT_BE32((u8 *)&cmd.value, (u32)us); -+ -+ /* RTW_INFO("%s %u\n", __FUNCTION__, us); */ -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8); -+} -+ -+int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms) -+{ -+ IOL_CMD cmd = {0x0, IOL_CMD_DELAY_MS, 0x0, 0x0}; -+ -+ RTW_PUT_BE32((u8 *)&cmd.value, (u32)ms); -+ -+ /* RTW_INFO("%s %u\n", __FUNCTION__, ms); */ -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8); -+} -+ -+int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame) -+{ -+ IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; -+ -+ -+ return rtw_IOL_append_cmds(xmit_frame, (u8 *)&end_cmd, 8); -+ -+} -+ -+int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms) -+{ -+ struct xmit_frame *xmit_frame; -+ -+ xmit_frame = rtw_IOL_accquire_xmit_frame(adapter); -+ if (xmit_frame == NULL) -+ return _FAIL; -+ -+ if (rtw_IOL_append_cmds(xmit_frame, IOL_cmds, cmd_num << 3) == _FAIL) -+ return _FAIL; -+ -+ return rtw_IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms, 0); -+} -+ -+int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms) -+{ -+ IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; -+ return rtw_IOL_exec_cmd_array_sync(adapter, (u8 *)&end_cmd, 1, max_wating_ms); -+} -+#endif /* CONFIG_IOL_NEW_GENERATION */ -+ -+ -+ -+ -+#endif /* CONFIG_IOL */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_mbo.c b/drivers/staging/rtl8723cs/core/rtw_mbo.c -new file mode 100644 -index 000000000000..44f93ad6ce75 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_mbo.c -@@ -0,0 +1,803 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+ -+#ifdef CONFIG_RTW_MBO -+ -+#ifndef RTW_MBO_DBG -+#define RTW_MBO_DBG 0 -+#endif -+#if RTW_MBO_DBG -+ #define RTW_MBO_INFO(fmt, arg...) \ -+ RTW_INFO(fmt, arg) -+ #define RTW_MBO_DUMP(str, data, len) \ -+ RTW_INFO_DUMP(str, data, len) -+#else -+ #define RTW_MBO_INFO(fmt, arg...) do {} while (0) -+ #define RTW_MBO_DUMP(str, data, len) do {} while (0) -+#endif -+ -+/* Cellular Data Connectivity field -+ * 1 : Cellular data connection available -+ * 2 : Cellular data connection not available -+ * 3 : Not Cellular data capable -+ * otherwise : Reserved -+*/ -+int rtw_mbo_cell_data_conn = 2; -+module_param(rtw_mbo_cell_data_conn, int, 0644); -+ -+static u8 wfa_mbo_oui[] = {0x50, 0x6F, 0x9A, 0x16}; -+ -+#define rtw_mbo_get_oui(p) ((u8 *)(p) + 2) -+ -+#define rtw_mbo_get_attr_id(p) ((u8 *)(p)) -+ -+#define rtw_mbo_get_disallow_res(p) ((u8 *)(p) + 3) -+ -+#define rtw_mbo_set_1byte_ie(p, v, l) \ -+ rtw_set_fixed_ie((p), 1, (v), (l)) -+ -+#define rtw_mbo_set_4byte_ie(p, v, l) \ -+ rtw_set_fixed_ie((p), 4, (v), (l)) -+ -+#define rtw_mbo_set_nbyte_ie(p, sz, v, l) \ -+ rtw_set_fixed_ie((p), (sz), (v), (l)) -+ -+#define rtw_mbo_subfield_set(p, offset, val) (*(p + offset) = val) -+ -+#define rtw_mbo_subfields_set(p, offset, buf, len) \ -+ do { \ -+ u32 _offset = 0; \ -+ u8 *_p = p + offset; \ -+ while(_offset < len) { \ -+ *(_p + _offset) = *(buf + _offset); \ -+ _offset++; \ -+ } \ -+ } while(0) -+ -+static u8 *rtw_mbo_ie_get(u8 *pie, u32 *plen, u32 limit) -+{ -+ const u8 *p = pie; -+ u32 tmp, i; -+ -+ if (limit <= 1) -+ return NULL; -+ -+ i = 0; -+ *plen = 0; -+ while (1) { -+ if ((*p == _VENDOR_SPECIFIC_IE_) && -+ (_rtw_memcmp(rtw_mbo_get_oui(p), wfa_mbo_oui, 4))) { -+ *plen = *(p + 1); -+ RTW_MBO_DUMP("VENDOR_SPECIFIC_IE MBO: ", p, *(p + 1)); -+ return (u8 *)p; -+ } else { -+ tmp = *(p + 1); -+ p += (tmp + 2); -+ i += (tmp + 2); -+ } -+ -+ if (i >= limit) -+ break; -+ } -+ -+ return NULL; -+} -+ -+static u8 *rtw_mbo_attrs_get(u8 *pie, u32 limit, u8 attr_id, u32 *attr_len) -+{ -+ u8 *p = NULL; -+ u32 offset, plen = 0; -+ -+ if ((pie == NULL) || (limit <= 1)) -+ goto exit; -+ -+ if ((p = rtw_mbo_ie_get(pie, &plen, limit)) == NULL) -+ goto exit; -+ -+ /* shift 2 + OUI size and move to attributes content */ -+ p = p + 2 + sizeof(wfa_mbo_oui); -+ plen = plen - 4; -+ RTW_MBO_DUMP("Attributes contents: ", p, plen); -+ -+ if ((p = rtw_get_ie(p, attr_id, attr_len, plen)) == NULL) -+ goto exit; -+ -+ RTW_MBO_INFO("%s : id=%u(len=%u)\n", __func__, attr_id, *attr_len); -+ RTW_MBO_DUMP("contents : ", p, *attr_len); -+ -+exit: -+ return p; -+ -+} -+ -+static u32 rtw_mbo_attr_sz_get( -+ _adapter *padapter, u8 id) -+{ -+ u32 len = 0; -+ -+ switch (id) { -+ case RTW_MBO_ATTR_NPREF_CH_RPT_ID: -+ { -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ struct npref_ch_rtp *prpt = &(prfctl->ch_rtp); -+ struct npref_ch* pch; -+ u32 i, attr_len, offset; -+ -+ for (i=0; i < prpt->nm_of_rpt; i++) { -+ pch = &prpt->ch_rpt[i]; -+ /*attr_len = ch list + op class + preference + reason */ -+ attr_len = pch->nm_of_ch + 3; -+ /* offset = id + len field + attr_len */ -+ offset = attr_len + 2; -+ len += offset; -+ } -+ } -+ break; -+ case RTW_MBO_ATTR_CELL_DATA_CAP_ID: -+ case RTW_MBO_ATTR_TRANS_REJ_ID: -+ len = 3; -+ break; -+ default: -+ break; -+ } -+ -+ return len; -+} -+ -+static void rtw_mbo_build_mbo_ie_hdr( -+ u8 **pframe, struct pkt_attrib *pattrib, u8 payload_len) -+{ -+ u8 eid = RTW_MBO_EID; -+ u8 len = payload_len + 4; -+ -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &eid, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &len, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_4byte_ie(*pframe, wfa_mbo_oui, &(pattrib->pktlen)); -+} -+ -+void rtw_mbo_build_cell_data_cap_attr( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 attr_id = RTW_MBO_ATTR_CELL_DATA_CAP_ID; -+ u8 attr_len = 1; -+ u8 cell_data_con = rtw_mbo_cell_data_conn; -+ -+ /* used Cellular Data Capabilities from supplicant */ -+ if (!rtw_mbo_wifi_logo_test(padapter) && -+ pmlmepriv->pcell_data_cap_ie && pmlmepriv->cell_data_cap_len == 1) { -+ cell_data_con = *pmlmepriv->pcell_data_cap_ie; -+ RTW_MBO_INFO("%s : used Cellular Data Capabilities(%u) from supplicant!\n", -+ __func__, *pmlmepriv->pcell_data_cap_ie); -+ } -+ -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &attr_id, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &attr_len, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &cell_data_con, &(pattrib->pktlen)); -+} -+ -+static void rtw_mbo_update_cell_data_cap( -+ _adapter *padapter, u8 *pie, u32 ie_len) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 *mbo_attr; -+ u32 mbo_attrlen; -+ -+ if ((pie == NULL) || (ie_len == 0)) -+ return; -+ -+ mbo_attr = rtw_mbo_attrs_get(pie, ie_len, -+ RTW_MBO_ATTR_CELL_DATA_CAP_ID, &mbo_attrlen); -+ -+ if ((mbo_attr == NULL) || (mbo_attrlen == 0) ) { -+ RTW_INFO("MBO : Cellular Data Capabilities not found!\n"); -+ return; -+ } -+ -+ rtw_buf_update(&pmlmepriv->pcell_data_cap_ie, -+ &pmlmepriv->cell_data_cap_len, (mbo_attr + 2), mbo_attrlen); -+ RTW_MBO_DUMP("rtw_mbo_update_cell_data_cap : ", -+ pmlmepriv->pcell_data_cap_ie, pmlmepriv->cell_data_cap_len); -+} -+ -+void rtw_mbo_update_ie_data( -+ _adapter *padapter, u8 *pie, u32 ie_len) -+{ -+ rtw_mbo_update_cell_data_cap(padapter, pie, ie_len); -+} -+ -+static u8 rtw_mbo_current_op_class_get(_adapter *padapter) -+{ -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ struct p2p_channels *pch_list = &(prfctl->channel_list); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct p2p_reg_class *preg_class; -+ int class_idx, ch_idx; -+ u8 cur_op_class = 0; -+ -+ for(class_idx =0; class_idx < pch_list->reg_classes; class_idx++) { -+ preg_class = &pch_list->reg_class[class_idx]; -+ for (ch_idx = 0; ch_idx <= preg_class->channels; ch_idx++) { -+ if (pmlmeext->cur_channel == preg_class->channel[ch_idx]) { -+ cur_op_class = preg_class->reg_class; -+ RTW_MBO_INFO("%s : current ch : %d, op class : %d\n", -+ __func__, pmlmeext->cur_channel, cur_op_class); -+ break; -+ } -+ } -+ } -+ -+ return cur_op_class; -+} -+ -+static void rtw_mbo_supp_op_classes_get(_adapter *padapter, u8 *pclasses) -+{ -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ struct p2p_channels *pch_list = &(prfctl->channel_list); -+ int class_idx; -+ -+ if (pclasses == NULL) -+ return; -+ -+ RTW_MBO_INFO("%s : support op class \n", __func__); -+ for(class_idx = 0; class_idx < pch_list->reg_classes; class_idx++) { -+ *(pclasses + class_idx) = pch_list->reg_class[class_idx].reg_class; -+ RTW_MBO_INFO("%u ,", *(pclasses + class_idx)); -+ } -+ -+ RTW_MBO_INFO("%s : \n", __func__); -+} -+ -+void rtw_mbo_build_supp_op_class_elem( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib) -+{ -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ u8 payload[32] = {0}; -+ u8 delimiter_130 = 130; /*0x82*/ -+ u8 reg_class_nm, len; -+ -+ if ((reg_class_nm = prfctl->channel_list.reg_classes) == 0) -+ return; -+ -+ payload[0] = rtw_mbo_current_op_class_get(padapter); -+ rtw_mbo_supp_op_classes_get(padapter, &payload[1]); -+ -+ /* IEEE 802.11 Std Current Operating Class Extension Sequence */ -+ payload[reg_class_nm + 1] = delimiter_130; -+ payload[reg_class_nm + 2] = 0x00; -+ -+ RTW_MBO_DUMP("op class :", payload, reg_class_nm); -+ -+ /* Current Operating Class field + Operating Class field -+ + OneHundredAndThirty Delimiter field */ -+ len = reg_class_nm + 3; -+ *pframe = rtw_set_ie(*pframe, EID_SupRegulatory, len , -+ payload, &(pattrib->pktlen)); -+} -+ -+static u8 rtw_mbo_construct_npref_ch_rpt_attr( -+ _adapter *padapter, u8 *pbuf, u32 buf_len, u32 *plen) -+{ -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ struct npref_ch_rtp *prpt = &(prfctl->ch_rtp); -+ struct npref_ch* pch; -+ u32 attr_len, offset; -+ int i; -+ u8 *p = pbuf; -+ -+ if (prpt->nm_of_rpt == 0) { -+ *plen = 0; -+ return _FALSE; -+ } -+ -+ for (i=0; i < prpt->nm_of_rpt; i++) { -+ pch = &prpt->ch_rpt[i]; -+ /* attr_len = ch list + op class + preference + reason */ -+ attr_len = pch->nm_of_ch + 3; -+ /* offset = id + len field + attr_len */ -+ offset = attr_len + 2; -+ rtw_mbo_subfield_set(p, 0, RTW_MBO_ATTR_NPREF_CH_RPT_ID); -+ rtw_mbo_subfield_set(p, 1, attr_len); -+ rtw_mbo_subfield_set(p, 2, pch->op_class); -+ rtw_mbo_subfields_set(p, 3, pch->chs, pch->nm_of_ch); -+ rtw_mbo_subfield_set(p, (offset - 2), pch->preference); -+ rtw_mbo_subfield_set(p, (offset - 1), pch->reason); -+ p += offset; -+ *plen += offset; -+ -+ if (*plen >= buf_len) { -+ RTW_ERR("MBO : construct non-preferred channel report fail!\n"); -+ return _FALSE; -+ } -+ } -+ -+ return _TRUE; -+} -+ -+void rtw_mbo_build_npref_ch_rpt_attr( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib) -+{ -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ struct npref_ch_rtp *prpt = &(prfctl->ch_rtp); -+ u32 tmp_sz = 0, body_len = 0; -+ u8 *ptmp; -+ -+ tmp_sz = prpt->nm_of_rpt * sizeof(struct npref_ch); -+ ptmp = rtw_zmalloc(tmp_sz); -+ if (ptmp == NULL) -+ return; -+ -+ if (rtw_mbo_construct_npref_ch_rpt_attr(padapter, ptmp, tmp_sz, &body_len) == _FALSE) { -+ rtw_mfree(ptmp, tmp_sz); -+ return; -+ } -+ -+ RTW_MBO_DUMP("Non-preferred Channel Report :", ptmp, body_len); -+ *pframe = rtw_mbo_set_nbyte_ie(*pframe, body_len, ptmp, &(pattrib->pktlen)); -+ -+ rtw_mfree(ptmp, tmp_sz); -+} -+ -+void rtw_mbo_build_trans_reject_reason_attr( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib, u8 *pres) -+{ -+ u8 attr_id = RTW_MBO_ATTR_TRANS_REJ_ID; -+ u8 attr_len = 1; -+ u32 len = 0; -+ -+ len = rtw_mbo_attr_sz_get(padapter, RTW_MBO_ATTR_TRANS_REJ_ID); -+ if ((len == 0) || (len > 3)) { -+ RTW_ERR("MBO : build Transition Rejection Reason attribute fail(len=%u)\n", len); -+ return; -+ } -+ -+ rtw_mbo_build_mbo_ie_hdr(pframe, pattrib, len); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &attr_id, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &attr_len, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, pres, &(pattrib->pktlen)); -+} -+ -+u8 rtw_mbo_disallowed_network(struct wlan_network *pnetwork) -+{ -+ u8 *p, *attr_id, *res; -+ u32 attr_len = 0; -+ u8 disallow = _FALSE; -+ -+ if (pnetwork == NULL) -+ goto exit; -+ -+ p = rtw_mbo_attrs_get(pnetwork->network.IEs, -+ pnetwork->network.IELength, -+ RTW_MBO_ATTR_ASSOC_DISABLED_ID, -+ &attr_len); -+ -+ if (p == NULL) { -+ RTW_MBO_INFO("%s :Assoc Disallowed attribute not found!\n",__func__); -+ goto exit; -+ } -+ -+ RTW_MBO_DUMP("Association Disallowed attribute :",p , attr_len + 2); -+ RTW_INFO("MBO : block "MAC_FMT" assoc disallowed reason %d\n", -+ MAC_ARG(pnetwork->network.MacAddress), *(rtw_mbo_get_disallow_res(p))); -+ -+ disallow = _TRUE; -+exit: -+ return disallow; -+} -+ -+void rtw_mbo_build_exented_cap( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib) -+{ -+ u8 content[8] = { 0 }; -+ -+ rtw_wnm_set_ext_cap_btm(content, 1); -+ rtw_mbo_set_ext_cap_internw(content, 1); -+ *pframe = rtw_set_ie(*pframe, -+ EID_EXTCapability, -+ 8, -+ content, -+ &(pattrib->pktlen)); -+} -+ -+static void rtw_mbo_non_pref_chans_dump(struct npref_ch* pch) -+{ -+ int i; -+ u8 buf[128] = {0}; -+ -+ for (i=0; i < pch->nm_of_ch; i++) -+ rtw_sprintf(buf, 128, "%s,%d", buf, pch->chs[i]); -+ -+ RTW_MBO_INFO("%s : op_class=%01x, ch=%s, preference=%d, reason=%d\n", -+ __func__, pch->op_class, buf, pch->preference, pch->reason); -+} -+ -+static u8 rtw_mbo_non_pref_chan_exist(struct npref_ch* pch, u8 ch) -+{ -+ u32 i; -+ u8 found = _FALSE; -+ -+ for (i=0; i < pch->nm_of_ch; i++) { -+ if (pch->chs[i] == ch) { -+ found = _TRUE; -+ break; -+ } -+ } -+ -+ return found; -+} -+ -+static struct npref_ch* rtw_mbo_non_pref_chan_get( -+ _adapter *padapter, u8 op_class, u8 prefe, u8 res) -+{ -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ struct npref_ch_rtp *prpt = &(prfctl->ch_rtp); -+ struct npref_ch* pch = NULL; -+ int i; -+ -+ if (prpt->nm_of_rpt == 0) -+ return pch; -+ -+ for (i=0; i < prpt->nm_of_rpt; i++) { -+ if ((prpt->ch_rpt[i].op_class == op_class) && -+ (prpt->ch_rpt[i].preference == prefe) && -+ (prpt->ch_rpt[i].reason == res)) { -+ pch = &prpt->ch_rpt[i]; -+ break; -+ } -+ } -+ -+ return pch; -+} -+ -+static void rtw_mbo_non_pref_chan_set( -+ struct npref_ch* pch, u8 op_class, u8 ch, u8 prefe, u8 res, u8 update) -+{ -+ u32 offset = pch->nm_of_ch; -+ -+ if (update) { -+ if (rtw_mbo_non_pref_chan_exist(pch, ch) == _FALSE) { -+ pch->chs[offset] = ch; -+ pch->nm_of_ch++; -+ } -+ } else { -+ pch->op_class = op_class; -+ pch->chs[0] = ch; -+ pch->preference = prefe; -+ pch->reason = res; -+ pch->nm_of_ch = 1; -+ } -+} -+ -+static void rtw_mbo_non_pref_chans_update( -+ _adapter *padapter, u8 op_class, u8 ch, u8 prefe, u8 res) -+{ -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ struct npref_ch_rtp *pch_rpt = &(prfctl->ch_rtp); -+ struct npref_ch* pch; -+ -+ if (pch_rpt->nm_of_rpt >= RTW_MBO_MAX_CH_RPT_NUM) { -+ RTW_ERR("MBO : %d non_pref_chan entries supported!", -+ RTW_MBO_MAX_CH_RPT_NUM); -+ return; -+ } -+ -+ if (pch_rpt->nm_of_rpt == 0) { -+ pch = &pch_rpt->ch_rpt[0]; -+ rtw_mbo_non_pref_chan_set(pch, op_class, ch, prefe, res, _FALSE); -+ pch_rpt->nm_of_rpt = 1; -+ return; -+ } -+ -+ pch = rtw_mbo_non_pref_chan_get(padapter, op_class, prefe, res); -+ if (pch == NULL) { -+ pch = &pch_rpt->ch_rpt[pch_rpt->nm_of_rpt]; -+ rtw_mbo_non_pref_chan_set(pch, op_class, ch, prefe, res, _FALSE); -+ pch_rpt->nm_of_rpt++; -+ } else -+ rtw_mbo_non_pref_chan_set(pch, op_class, ch, prefe, res, _TRUE); -+ -+ rtw_mbo_non_pref_chans_dump(pch); -+} -+ -+static void rtw_mbo_non_pref_chans_set( -+ _adapter *padapter, char *param, ssize_t sz) -+{ -+ char *pnext; -+ u32 op_class, ch, prefe, res; -+ int i = 0; -+ -+ do { -+ pnext = strsep(¶m, " "); -+ if (pnext == NULL) -+ break; -+ -+ sscanf(pnext, "%d:%d:%d:%d", &op_class, &ch, &prefe, &res); -+ rtw_mbo_non_pref_chans_update(padapter, op_class, ch, prefe, res); -+ -+ if ((i++) > 10) { -+ RTW_ERR("MBO : overflow %d \n", i); -+ break; -+ } -+ -+ } while(param != '\0'); -+ -+} -+ -+static void rtw_mbo_non_pref_chans_del( -+ _adapter *padapter, char *param, ssize_t sz) -+{ -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ struct npref_ch_rtp *prpt = &(prfctl->ch_rtp); -+ -+ RTW_INFO("%s : delete non_pref_chan %s\n", __func__, param); -+ _rtw_memset(prpt, 0, sizeof(struct npref_ch_rtp)); -+} -+ -+ssize_t rtw_mbo_proc_non_pref_chans_set( -+ struct file *pfile, const char __user *buffer, -+ size_t count, loff_t *pos, void *pdata) -+{ -+ struct net_device *dev = pdata; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ u8 tmp[128] = {0}; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ if (strncmp(tmp, "add", 3) == 0) -+ rtw_mbo_non_pref_chans_set(padapter, &tmp[4], (count - 4)); -+ else if (strncmp(tmp, "delete", 6) == 0) -+ rtw_mbo_non_pref_chans_del(padapter, &tmp[7], (count - 7)); -+ else { -+ RTW_ERR("MBO : Invalid format : echo [add|delete] :::\n"); -+ return -EFAULT; -+ } -+ } -+ -+#ifdef CONFIG_RTW_WNM -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) && -+ check_fwstate(pmlmepriv, WIFI_STATION_STATE)) -+ rtw_wnm_issue_action(padapter, RTW_WLAN_ACTION_WNM_NOTIF_REQ, 0, 0); -+#endif -+ -+ return count; -+} -+ -+int rtw_mbo_proc_non_pref_chans_get( -+ struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ struct npref_ch_rtp *prpt = &(prfctl->ch_rtp); -+ struct npref_ch* pch; -+ int i,j; -+ u8 buf[32] = {0}; -+ -+ RTW_PRINT_SEL(m, "op_class ch preference reason \n"); -+ RTW_PRINT_SEL(m, "=======================================================\n"); -+ -+ -+ if (prpt->nm_of_rpt == 0) { -+ RTW_PRINT_SEL(m, " empty table \n"); -+ return 0; -+ } -+ -+ for (i=0; i < prpt->nm_of_rpt; i++) { -+ pch = &prpt->ch_rpt[i]; -+ buf[0]='\0'; -+ for (j=0; j < pch->nm_of_ch; j++) { -+ if (j == 0) -+ rtw_sprintf(buf, 32, "%02u", pch->chs[j]); -+ else -+ rtw_sprintf(buf, 32, "%s,%02u", buf, pch->chs[j]); -+ } -+ -+ RTW_PRINT_SEL(m, " %04u %20s %02u %02u\n", -+ pch->op_class, buf, pch->preference, pch->reason); -+ } -+ -+ return 0; -+} -+ -+ssize_t rtw_mbo_proc_cell_data_set( -+ struct file *pfile, const char __user *buffer, -+ size_t count, loff_t *pos, void *pdata) -+{ -+ struct net_device *dev = pdata; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ int mbo_cell_data = 0; -+ u8 tmp[8] = {0}; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) -+ return -EFAULT; -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%d", &mbo_cell_data); -+ if (num == 1) { -+ rtw_mbo_cell_data_conn = mbo_cell_data; -+ #ifdef CONFIG_RTW_WNM -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) && -+ check_fwstate(pmlmepriv, WIFI_STATION_STATE)) -+ rtw_wnm_issue_action(padapter, RTW_WLAN_ACTION_WNM_NOTIF_REQ, 0, 0); -+ #endif -+ } -+ } -+ -+ -+ return count; -+} -+ -+int rtw_mbo_proc_cell_data_get( -+ struct seq_file *m, void *v) -+{ -+#if 0 -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+#endif -+ -+ RTW_PRINT_SEL(m, "Cellular Data Connectivity : %d\n", rtw_mbo_cell_data_conn); -+ return 0; -+} -+ -+static void rtw_mbo_non_pref_chan_subelem_parsing( -+ _adapter *padapter, u8 *subelem, size_t subelem_len) -+{ -+ u8 *pnon_pref_chans; -+ u32 non_pref_chan_offset, op_subelem_len; -+ u32 oui_offset = 3; -+ /* wpa_supplicant don't apped OUI Type */ -+ u32 oui_type_offset = 0; -+ -+ RTW_MBO_DUMP("Non-preferred Channel subelem : ", subelem , subelem_len); -+ -+ /* Subelem : -+ Vendor Specific | Length | WFA OUI | OUI Type | MBO Attributes */ -+ non_pref_chan_offset = 2 + oui_offset + oui_type_offset; -+ pnon_pref_chans = subelem + non_pref_chan_offset; -+ op_subelem_len = subelem_len - non_pref_chan_offset; -+ -+ /* wpa_supplicant don't indicate non_pref_chan length, -+ so we cannot get how many non_pref_chan in a wnm notification */ -+ RTW_MBO_DUMP("Non-preferred Channel : ", pnon_pref_chans, op_subelem_len); -+} -+ -+void rtw_mbo_wnm_notification_parsing( -+ _adapter *padapter, const u8 *pdata, size_t data_len) -+{ -+ u8 *paction; -+ u8 category, action, dialog, type; -+ u32 len; -+ -+ if ((pdata == NULL) || (data_len == 0)) -+ return; -+ -+ RTW_MBO_DUMP("WNM notification data : ", pdata, data_len); -+ paction = (u8 *)pdata + sizeof(struct rtw_ieee80211_hdr_3addr); -+ category = paction[0]; -+ action = paction[1]; -+ dialog = paction[2]; -+ type = paction[3]; -+ -+ if ((action == RTW_WLAN_ACTION_WNM_NOTIF_REQ) && -+ (type == WLAN_EID_VENDOR_SPECIFIC)) { -+ rtw_mbo_non_pref_chan_subelem_parsing(padapter, &paction[4], -+ (data_len - sizeof(struct rtw_ieee80211_hdr_3addr))); -+ } -+ -+} -+ -+void rtw_mbo_build_wnm_notification( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib) -+{ -+ struct rf_ctl_t *prfctl = adapter_to_rfctl(padapter); -+ struct npref_ch_rtp *prpt = &(prfctl->ch_rtp); -+ struct npref_ch* pch; -+ u8 subelem_id = WLAN_EID_VENDOR_SPECIFIC; -+ u8 non_pref_ch_oui[] = {0x50, 0x6F, 0x9A, 0x2}; -+ u8 cell_data_cap_oui[] = {0x50, 0x6F, 0x9A, 0x3}; -+ u8 cell_data_con = rtw_mbo_cell_data_conn; -+ u8 len, cell_data_con_len = 0, *pcont = *pframe; -+ int i; -+ -+ if (rtw_mbo_cell_data_conn > 0) { -+ len = 0x5; -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &subelem_id, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &len, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_4byte_ie(*pframe, cell_data_cap_oui, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &cell_data_con, &(pattrib->pktlen)); -+ RTW_MBO_INFO("%s : Cellular Data Capabilities subelemen\n", __func__); -+ RTW_MBO_DUMP(":", pcont, len + 2); -+ pcont += len + 2 ; -+ } -+ -+ if (prpt->nm_of_rpt == 0) { -+ len = 0x4; -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &subelem_id, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &len, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_4byte_ie(*pframe, non_pref_ch_oui, &(pattrib->pktlen)); -+ RTW_MBO_INFO("%s :Non-preferred Channel Report subelement without data\n", __func__); -+ return; -+ } -+ -+ for (i=0; i < prpt->nm_of_rpt; i++) { -+ pch = &prpt->ch_rpt[i]; -+ /* OUI(3B) + OUT-type(1B) + op-class(1B) + ch list(nB) -+ + Preference(1B) + reason(1B) */ -+ len = pch->nm_of_ch + 7; -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &subelem_id, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &len, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_4byte_ie(*pframe, non_pref_ch_oui, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &pch->op_class, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_nbyte_ie(*pframe, pch->nm_of_ch, pch->chs, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &pch->preference, &(pattrib->pktlen)); -+ *pframe = rtw_mbo_set_1byte_ie(*pframe, &pch->reason, &(pattrib->pktlen)); -+ RTW_MBO_INFO("%s :Non-preferred Channel Report subelement\n", __func__); -+ RTW_MBO_DUMP(":", pcont, len); -+ pcont = *pframe; -+ } -+} -+ -+void rtw_mbo_build_probe_req_ies( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib) -+{ -+ u32 len =0; -+ -+ rtw_mbo_build_exented_cap(padapter, pframe, pattrib); -+ -+ len = rtw_mbo_attr_sz_get(padapter, RTW_MBO_ATTR_CELL_DATA_CAP_ID); -+ if ((len == 0) || (len > 3)) { -+ RTW_ERR("MBO : build Cellular Data Capabilities attribute fail(len=%u)\n", len); -+ return; -+ } -+ -+ rtw_mbo_build_mbo_ie_hdr(pframe, pattrib, len); -+ rtw_mbo_build_cell_data_cap_attr(padapter, pframe, pattrib); -+} -+ -+void rtw_mbo_build_assoc_req_ies( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib) -+{ -+ u32 len = 0; -+ -+ rtw_mbo_build_supp_op_class_elem(padapter, pframe, pattrib); -+ -+ len += rtw_mbo_attr_sz_get(padapter, RTW_MBO_ATTR_CELL_DATA_CAP_ID); -+ len += rtw_mbo_attr_sz_get(padapter, RTW_MBO_ATTR_NPREF_CH_RPT_ID); -+ if ((len == 0)|| (len < 3)) { -+ RTW_ERR("MBO : build assoc MBO IE fail(len=%u)\n", len); -+ return; -+ } -+ -+ rtw_mbo_build_mbo_ie_hdr(pframe, pattrib, len); -+ rtw_mbo_build_cell_data_cap_attr(padapter, pframe, pattrib); -+ rtw_mbo_build_npref_ch_rpt_attr(padapter, pframe, pattrib); -+} -+ -+#endif /* CONFIG_RTW_MBO */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_mem.c b/drivers/staging/rtl8723cs/core/rtw_mem.c -new file mode 100644 -index 000000000000..d42a4fb038c6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_mem.c -@@ -0,0 +1,171 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); -+MODULE_AUTHOR("Realtek Semiconductor Corp."); -+MODULE_VERSION("DRIVERVERSION"); -+ -+/* for MAX_RECVBUF_SZ */ -+#if defined(CONFIG_RTL8188E) -+#include -+#elif defined(CONFIG_RTL8188F) -+#include -+#elif defined(CONFIG_RTL8188GTV) -+#include -+#elif defined(CONFIG_RTL8710B) -+#include -+#elif defined(CONFIG_RTL8192E) -+#include -+#elif defined(CONFIG_RTL8192F) -+#include -+#elif defined(CONFIG_RTL8723B) -+#include -+#elif defined(CONFIG_RTL8703B) -+#include -+#elif defined(CONFIG_RTL8723D) -+#include -+#elif defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+#include -+#elif defined(CONFIG_RTL8822B) -+#include -+#elif defined(CONFIG_RTL8822C) -+#include -+#elif defined(CONFIG_RTL8814A) -+#include -+#elif defined(CONFIG_RTL8814B) -+#include -+#endif -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+#define MAX_RTKM_RECVBUF_SZ MAX_RECVBUF_SZ -+#define MAX_RTKM_NR_PREALLOC_RECV_SKB NR_RECVBUFF -+#else /* !CONFIG_SDIO_HCI */ -+#ifdef CONFIG_PLATFORM_MSTAR_HIGH -+ #define MAX_RTKM_RECVBUF_SZ (31744) /* 31k */ -+#else -+ #define MAX_RTKM_RECVBUF_SZ (15360) /* 15k */ -+#endif /* CONFIG_PLATFORM_MSTAR_HIGH */ -+#define MAX_RTKM_NR_PREALLOC_RECV_SKB 16 -+#endif /* !CONFIG_SDIO_HCI */ -+ -+struct sk_buff_head rtk_skb_mem_q; -+struct u8 *rtk_buf_mem[NR_RECVBUFF]; -+ -+struct u8 *rtw_get_buf_premem(int index) -+{ -+ printk("%s, rtk_buf_mem index : %d\n", __func__, index); -+ return rtk_buf_mem[index]; -+} -+ -+u16 rtw_rtkm_get_buff_size(void) -+{ -+ return MAX_RTKM_RECVBUF_SZ; -+} -+EXPORT_SYMBOL(rtw_rtkm_get_buff_size); -+ -+u8 rtw_rtkm_get_nr_recv_skb(void) -+{ -+ return MAX_RTKM_NR_PREALLOC_RECV_SKB; -+} -+EXPORT_SYMBOL(rtw_rtkm_get_nr_recv_skb); -+ -+struct sk_buff *rtw_alloc_skb_premem(u16 in_size) -+{ -+ struct sk_buff *skb = NULL; -+ -+ if (in_size > MAX_RTKM_RECVBUF_SZ) { -+ pr_info("warning %s: driver buffer size(%d) > rtkm buffer size(%d)\n", __func__, in_size, MAX_RTKM_RECVBUF_SZ); -+ WARN_ON(1); -+ return skb; -+ } -+ -+ skb = skb_dequeue(&rtk_skb_mem_q); -+ -+ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); -+ -+ return skb; -+} -+EXPORT_SYMBOL(rtw_alloc_skb_premem); -+ -+int rtw_free_skb_premem(struct sk_buff *pskb) -+{ -+ if (!pskb) -+ return -1; -+ -+ if (skb_queue_len(&rtk_skb_mem_q) >= MAX_RTKM_NR_PREALLOC_RECV_SKB) -+ return -1; -+ -+ skb_queue_tail(&rtk_skb_mem_q, pskb); -+ -+ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); -+ -+ return 0; -+} -+EXPORT_SYMBOL(rtw_free_skb_premem); -+ -+static int __init rtw_mem_init(void) -+{ -+ int i; -+ SIZE_PTR tmpaddr = 0; -+ SIZE_PTR alignment = 0; -+ struct sk_buff *pskb = NULL; -+ -+ printk("%s\n", __func__); -+ pr_info("MAX_RTKM_NR_PREALLOC_RECV_SKB: %d\n", MAX_RTKM_NR_PREALLOC_RECV_SKB); -+ pr_info("MAX_RTKM_RECVBUF_SZ: %d\n", MAX_RTKM_RECVBUF_SZ); -+ -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX -+ for (i = 0; i < NR_RECVBUFF; i++) -+ rtk_buf_mem[i] = usb_buffer_alloc(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma); -+#endif /* CONFIG_USE_USB_BUFFER_ALLOC_RX */ -+ -+ skb_queue_head_init(&rtk_skb_mem_q); -+ -+ for (i = 0; i < MAX_RTKM_NR_PREALLOC_RECV_SKB; i++) { -+ pskb = __dev_alloc_skb(MAX_RTKM_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); -+ if (pskb) { -+ tmpaddr = (SIZE_PTR)pskb->data; -+ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1); -+ skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); -+ -+ skb_queue_tail(&rtk_skb_mem_q, pskb); -+ } else -+ printk("%s, alloc skb memory fail!\n", __func__); -+ -+ pskb = NULL; -+ } -+ -+ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); -+ -+ return 0; -+ -+} -+ -+static void __exit rtw_mem_exit(void) -+{ -+ if (skb_queue_len(&rtk_skb_mem_q)) -+ printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); -+ -+ skb_queue_purge(&rtk_skb_mem_q); -+ -+ printk("%s\n", __func__); -+} -+ -+module_init(rtw_mem_init); -+module_exit(rtw_mem_exit); -diff --git a/drivers/staging/rtl8723cs/core/rtw_mi.c b/drivers/staging/rtl8723cs/core/rtw_mi.c -new file mode 100644 -index 000000000000..099cd368b330 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_mi.c -@@ -0,0 +1,1546 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_MI_C_ -+ -+#include -+#include -+ -+void rtw_mi_update_union_chan_inf(_adapter *adapter, u8 ch, u8 offset , u8 bw) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ if (!ch) { -+ dvobj->union_ch_bak = dvobj->union_ch; -+ dvobj->union_bw_bak = dvobj->union_bw; -+ dvobj->union_offset_bak = dvobj->union_offset; -+ } -+ dvobj->union_ch = ch; -+ dvobj->union_bw = bw; -+ dvobj->union_offset = offset; -+} -+ -+#ifdef DBG_IFACE_STATUS -+#ifdef CONFIG_P2P -+static u8 _rtw_mi_p2p_listen_scan_chk(_adapter *adapter) -+{ -+ int i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 p2p_listen_scan_state = _FALSE; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (rtw_p2p_chk_state(&iface->wdinfo, P2P_STATE_LISTEN) || -+ rtw_p2p_chk_state(&iface->wdinfo, P2P_STATE_SCAN)) { -+ p2p_listen_scan_state = _TRUE; -+ break; -+ } -+ } -+ return p2p_listen_scan_state; -+} -+#endif -+#endif -+ -+u8 rtw_mi_stayin_union_ch_chk(_adapter *adapter) -+{ -+ u8 rst = _TRUE; -+ u8 u_ch, u_bw, u_offset; -+ u8 o_ch, o_bw, o_offset; -+ -+ u_ch = rtw_mi_get_union_chan(adapter); -+ u_bw = rtw_mi_get_union_bw(adapter); -+ u_offset = rtw_mi_get_union_offset(adapter); -+ -+ o_ch = rtw_get_oper_ch(adapter); -+ o_bw = rtw_get_oper_bw(adapter); -+ o_offset = rtw_get_oper_choffset(adapter); -+ -+ if ((u_ch != o_ch) || (u_bw != o_bw) || (u_offset != o_offset)) -+ rst = _FALSE; -+ -+ #ifdef DBG_IFACE_STATUS -+ if (rst == _FALSE) { -+ RTW_ERR("%s Not stay in union channel\n", __func__); -+ if (GET_HAL_DATA(adapter)->bScanInProcess == _TRUE) -+ RTW_ERR("ScanInProcess\n"); -+ #ifdef CONFIG_P2P -+ if (_rtw_mi_p2p_listen_scan_chk(adapter)) -+ RTW_ERR("P2P in listen or scan state\n"); -+ #endif -+ RTW_ERR("union ch, bw, offset: %u,%u,%u\n", u_ch, u_bw, u_offset); -+ RTW_ERR("oper ch, bw, offset: %u,%u,%u\n", o_ch, o_bw, o_offset); -+ RTW_ERR("=========================\n"); -+ } -+ #endif -+ return rst; -+} -+ -+u8 rtw_mi_stayin_union_band_chk(_adapter *adapter) -+{ -+ u8 rst = _TRUE; -+ u8 u_ch, o_ch; -+ u8 u_band, o_band; -+ -+ u_ch = rtw_mi_get_union_chan(adapter); -+ o_ch = rtw_get_oper_ch(adapter); -+ u_band = (u_ch > 14) ? BAND_ON_5G : BAND_ON_2_4G; -+ o_band = (o_ch > 14) ? BAND_ON_5G : BAND_ON_2_4G; -+ -+ if (u_ch != o_ch) -+ if(u_band != o_band) -+ rst = _FALSE; -+ -+ #ifdef DBG_IFACE_STATUS -+ if (rst == _FALSE) -+ RTW_ERR("%s Not stay in union band\n", __func__); -+ #endif -+ -+ return rst; -+} -+ -+/* Find union about ch, bw, ch_offset of all linked/linking interfaces */ -+int rtw_mi_get_ch_setting_union_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, u8 *ch, u8 *bw, u8 *offset) -+{ -+ _adapter *iface; -+ struct mlme_ext_priv *mlmeext; -+ int i; -+ u8 ch_ret = 0; -+ u8 bw_ret = CHANNEL_WIDTH_20; -+ u8 offset_ret = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ int num = 0; -+ -+ if (ch) -+ *ch = 0; -+ if (bw) -+ *bw = CHANNEL_WIDTH_20; -+ if (offset) -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface || !(ifbmp & BIT(iface->iface_id))) -+ continue; -+ -+ mlmeext = &iface->mlmeextpriv; -+ -+ if (!check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE | WIFI_UNDER_LINKING)) -+ continue; -+ -+ if (check_fwstate(&iface->mlmepriv, WIFI_OP_CH_SWITCHING)) -+ continue; -+ -+ if (num == 0) { -+ ch_ret = mlmeext->cur_channel; -+ bw_ret = mlmeext->cur_bwmode; -+ offset_ret = mlmeext->cur_ch_offset; -+ num++; -+ continue; -+ } -+ -+ if (ch_ret != mlmeext->cur_channel) { -+ num = 0; -+ break; -+ } -+ -+ if (bw_ret < mlmeext->cur_bwmode) { -+ bw_ret = mlmeext->cur_bwmode; -+ offset_ret = mlmeext->cur_ch_offset; -+ } else if (bw_ret == mlmeext->cur_bwmode && offset_ret != mlmeext->cur_ch_offset) { -+ num = 0; -+ break; -+ } -+ -+ num++; -+ } -+ -+ if (num) { -+ if (ch) -+ *ch = ch_ret; -+ if (bw) -+ *bw = bw_ret; -+ if (offset) -+ *offset = offset_ret; -+ } -+ -+ return num; -+} -+ -+inline int rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) -+{ -+ return rtw_mi_get_ch_setting_union_by_ifbmp(adapter_to_dvobj(adapter), 0xFF, ch, bw, offset); -+} -+ -+inline int rtw_mi_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) -+{ -+ return rtw_mi_get_ch_setting_union_by_ifbmp(adapter_to_dvobj(adapter), 0xFF & ~BIT(adapter->iface_id), ch, bw, offset); -+} -+ -+void rtw_mi_status_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, struct mi_state *mstate) -+{ -+ _adapter *iface; -+ int i; -+ -+ _rtw_memset(mstate, 0, sizeof(struct mi_state)); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface || !(ifbmp & BIT(iface->iface_id))) -+ continue; -+ -+ if (check_fwstate(&iface->mlmepriv, WIFI_STATION_STATE) == _TRUE) { -+ MSTATE_STA_NUM(mstate)++; -+ if (check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ MSTATE_STA_LD_NUM(mstate)++; -+ -+ #ifdef CONFIG_TDLS -+ if (iface->tdlsinfo.link_established == _TRUE) -+ MSTATE_TDLS_LD_NUM(mstate)++; -+ #endif -+ #ifdef CONFIG_P2P -+ if (MLME_IS_GC(iface)) -+ MSTATE_P2P_GC_NUM(mstate)++; -+ #endif -+ } -+ if (check_fwstate(&iface->mlmepriv, WIFI_UNDER_LINKING) == _TRUE) -+ MSTATE_STA_LG_NUM(mstate)++; -+ -+#ifdef CONFIG_AP_MODE -+ } else if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE ) { -+ if (check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ MSTATE_AP_NUM(mstate)++; -+ if (iface->stapriv.asoc_sta_count > 2) -+ MSTATE_AP_LD_NUM(mstate)++; -+ #ifdef CONFIG_P2P -+ if (MLME_IS_GO(iface)) -+ MSTATE_P2P_GO_NUM(mstate)++; -+ #endif -+ } else -+ MSTATE_AP_STARTING_NUM(mstate)++; -+#endif -+ -+ } else if (check_fwstate(&iface->mlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE) == _TRUE -+ && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE -+ ) { -+ MSTATE_ADHOC_NUM(mstate)++; -+ if (iface->stapriv.asoc_sta_count > 2) -+ MSTATE_ADHOC_LD_NUM(mstate)++; -+ -+#ifdef CONFIG_RTW_MESH -+ } else if (check_fwstate(&iface->mlmepriv, WIFI_MESH_STATE) == _TRUE -+ && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE -+ ) { -+ MSTATE_MESH_NUM(mstate)++; -+ if (iface->stapriv.asoc_sta_count > 2) -+ MSTATE_MESH_LD_NUM(mstate)++; -+#endif -+ -+ } -+ -+ if (check_fwstate(&iface->mlmepriv, WIFI_UNDER_WPS) == _TRUE) -+ MSTATE_WPS_NUM(mstate)++; -+ -+ if (check_fwstate(&iface->mlmepriv, WIFI_UNDER_SURVEY) == _TRUE) { -+ MSTATE_SCAN_NUM(mstate)++; -+ -+ if (mlmeext_scan_state(&iface->mlmeextpriv) != SCAN_DISABLE -+ && mlmeext_scan_state(&iface->mlmeextpriv) != SCAN_BACK_OP) -+ MSTATE_SCAN_ENTER_NUM(mstate)++; -+ } -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (rtw_cfg80211_get_is_mgmt_tx(iface)) -+ MSTATE_MGMT_TX_NUM(mstate)++; -+ -+ if (rtw_cfg80211_get_is_roch(iface) == _TRUE) -+ MSTATE_ROCH_NUM(mstate)++; -+ -+#endif /* CONFIG_IOCTL_CFG80211 */ -+#ifdef CONFIG_P2P -+ if (MLME_IS_PD(iface)) -+ MSTATE_P2P_DV_NUM(mstate)++; -+#endif -+ } -+} -+ -+inline void rtw_mi_status(_adapter *adapter, struct mi_state *mstate) -+{ -+ return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), 0xFF, mstate); -+} -+ -+inline void rtw_mi_status_no_self(_adapter *adapter, struct mi_state *mstate) -+{ -+ return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), 0xFF & ~BIT(adapter->iface_id), mstate); -+} -+ -+inline void rtw_mi_status_no_others(_adapter *adapter, struct mi_state *mstate) -+{ -+ return rtw_mi_status_by_ifbmp(adapter_to_dvobj(adapter), BIT(adapter->iface_id), mstate); -+} -+ -+inline void rtw_mi_status_merge(struct mi_state *d, struct mi_state *a) -+{ -+ d->sta_num += a->sta_num; -+ d->ld_sta_num += a->ld_sta_num; -+ d->lg_sta_num += a->lg_sta_num; -+#ifdef CONFIG_TDLS -+ d->ld_tdls_num += a->ld_tdls_num; -+#endif -+#ifdef CONFIG_AP_MODE -+ d->ap_num += a->ap_num; -+ d->ld_ap_num += a->ld_ap_num; -+#endif -+ d->adhoc_num += a->adhoc_num; -+ d->ld_adhoc_num += a->ld_adhoc_num; -+#ifdef CONFIG_RTW_MESH -+ d->mesh_num += a->mesh_num; -+ d->ld_mesh_num += a->ld_mesh_num; -+#endif -+ d->scan_num += a->scan_num; -+ d->scan_enter_num += a->scan_enter_num; -+ d->uwps_num += a->uwps_num; -+#ifdef CONFIG_IOCTL_CFG80211 -+ #ifdef CONFIG_P2P -+ d->roch_num += a->roch_num; -+ #endif -+ d->mgmt_tx_num += a->mgmt_tx_num; -+#endif -+} -+ -+void dump_mi_status(void *sel, struct dvobj_priv *dvobj) -+{ -+ RTW_PRINT_SEL(sel, "== dvobj-iface_state ==\n"); -+ RTW_PRINT_SEL(sel, "sta_num:%d\n", DEV_STA_NUM(dvobj)); -+ RTW_PRINT_SEL(sel, "linking_sta_num:%d\n", DEV_STA_LG_NUM(dvobj)); -+ RTW_PRINT_SEL(sel, "linked_sta_num:%d\n", DEV_STA_LD_NUM(dvobj)); -+#ifdef CONFIG_TDLS -+ RTW_PRINT_SEL(sel, "linked_tdls_num:%d\n", DEV_TDLS_LD_NUM(dvobj)); -+#endif -+#ifdef CONFIG_AP_MODE -+ RTW_PRINT_SEL(sel, "ap_num:%d\n", DEV_AP_NUM(dvobj)); -+ RTW_PRINT_SEL(sel, "starting_ap_num:%d\n", DEV_AP_STARTING_NUM(dvobj)); -+ RTW_PRINT_SEL(sel, "linked_ap_num:%d\n", DEV_AP_LD_NUM(dvobj)); -+#endif -+ RTW_PRINT_SEL(sel, "adhoc_num:%d\n", DEV_ADHOC_NUM(dvobj)); -+ RTW_PRINT_SEL(sel, "linked_adhoc_num:%d\n", DEV_ADHOC_LD_NUM(dvobj)); -+#ifdef CONFIG_RTW_MESH -+ RTW_PRINT_SEL(sel, "mesh_num:%d\n", DEV_MESH_NUM(dvobj)); -+ RTW_PRINT_SEL(sel, "linked_mesh_num:%d\n", DEV_MESH_LD_NUM(dvobj)); -+#endif -+#ifdef CONFIG_P2P -+ RTW_PRINT_SEL(sel, "p2p_device_num:%d\n", DEV_P2P_DV_NUM(dvobj)); -+ RTW_PRINT_SEL(sel, "p2p_gc_num:%d\n", DEV_P2P_GC_NUM(dvobj)); -+ RTW_PRINT_SEL(sel, "p2p_go_num:%d\n", DEV_P2P_GO_NUM(dvobj)); -+#endif -+ RTW_PRINT_SEL(sel, "scan_num:%d\n", DEV_SCAN_NUM(dvobj)); -+ RTW_PRINT_SEL(sel, "under_wps_num:%d\n", DEV_WPS_NUM(dvobj)); -+#if defined(CONFIG_IOCTL_CFG80211) -+ #if defined(CONFIG_P2P) -+ RTW_PRINT_SEL(sel, "roch_num:%d\n", DEV_ROCH_NUM(dvobj)); -+ #endif -+ RTW_PRINT_SEL(sel, "mgmt_tx_num:%d\n", DEV_MGMT_TX_NUM(dvobj)); -+#endif -+ RTW_PRINT_SEL(sel, "union_ch:%d\n", DEV_U_CH(dvobj)); -+ RTW_PRINT_SEL(sel, "union_bw:%d\n", DEV_U_BW(dvobj)); -+ RTW_PRINT_SEL(sel, "union_offset:%d\n", DEV_U_OFFSET(dvobj)); -+ RTW_PRINT_SEL(sel, "================\n\n"); -+} -+ -+void dump_dvobj_mi_status(void *sel, const char *fun_name, _adapter *adapter) -+{ -+ RTW_INFO("\n[ %s ] call %s\n", fun_name, __func__); -+ dump_mi_status(sel, adapter_to_dvobj(adapter)); -+} -+ -+inline void rtw_mi_update_iface_status(struct mlme_priv *pmlmepriv, sint state) -+{ -+ _adapter *adapter = container_of(pmlmepriv, _adapter, mlmepriv); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mi_state *iface_state = &dvobj->iface_state; -+ struct mi_state tmp_mstate; -+ -+ if (state == WIFI_MONITOR_STATE -+ || state == 0xFFFFFFFF -+ ) -+ return; -+ -+ if (0) -+ RTW_INFO("%s => will change or clean state to 0x%08x\n", __func__, state); -+ -+ rtw_mi_status(adapter, &tmp_mstate); -+ _rtw_memcpy(iface_state, &tmp_mstate, sizeof(struct mi_state)); -+ -+#ifdef DBG_IFACE_STATUS -+ DBG_IFACE_STATUS_DUMP(adapter); -+#endif -+} -+u8 rtw_mi_check_status(_adapter *adapter, u8 type) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mi_state *iface_state = &dvobj->iface_state; -+ u8 ret = _FALSE; -+ -+#ifdef DBG_IFACE_STATUS -+ DBG_IFACE_STATUS_DUMP(adapter); -+ RTW_INFO("%s-"ADPT_FMT" check type:%d\n", __func__, ADPT_ARG(adapter), type); -+#endif -+ -+ switch (type) { -+ case MI_LINKED: -+ if (MSTATE_STA_LD_NUM(iface_state) || MSTATE_AP_NUM(iface_state) || MSTATE_ADHOC_NUM(iface_state) || MSTATE_MESH_NUM(iface_state)) /*check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE)*/ -+ ret = _TRUE; -+ break; -+ case MI_ASSOC: -+ if (MSTATE_STA_LD_NUM(iface_state) || MSTATE_AP_LD_NUM(iface_state) || MSTATE_ADHOC_LD_NUM(iface_state) || MSTATE_MESH_LD_NUM(iface_state)) -+ ret = _TRUE; -+ break; -+ case MI_UNDER_WPS: -+ if (MSTATE_WPS_NUM(iface_state)) -+ ret = _TRUE; -+ break; -+ -+ case MI_AP_MODE: -+ if (MSTATE_AP_NUM(iface_state)) -+ ret = _TRUE; -+ break; -+ case MI_AP_ASSOC: -+ if (MSTATE_AP_LD_NUM(iface_state)) -+ ret = _TRUE; -+ break; -+ -+ case MI_ADHOC: -+ if (MSTATE_ADHOC_NUM(iface_state)) -+ ret = _TRUE; -+ break; -+ case MI_ADHOC_ASSOC: -+ if (MSTATE_ADHOC_LD_NUM(iface_state)) -+ ret = _TRUE; -+ break; -+ -+#ifdef CONFIG_RTW_MESH -+ case MI_MESH: -+ if (MSTATE_MESH_NUM(iface_state)) -+ ret = _TRUE; -+ break; -+ case MI_MESH_ASSOC: -+ if (MSTATE_MESH_LD_NUM(iface_state)) -+ ret = _TRUE; -+ break; -+#endif -+ -+ case MI_STA_NOLINK: /* this is misleading, but not used now */ -+ if (MSTATE_STA_NUM(iface_state) && (!(MSTATE_STA_LD_NUM(iface_state) || MSTATE_STA_LG_NUM(iface_state)))) -+ ret = _TRUE; -+ break; -+ case MI_STA_LINKED: -+ if (MSTATE_STA_LD_NUM(iface_state)) -+ ret = _TRUE; -+ break; -+ case MI_STA_LINKING: -+ if (MSTATE_STA_LG_NUM(iface_state)) -+ ret = _TRUE; -+ break; -+ -+ default: -+ break; -+ } -+ return ret; -+} -+ -+/* -+* return value : 0 is failed or have not interface meet condition -+* return value : !0 is success or interface numbers which meet condition -+* return value of ops_func must be _TRUE or _FALSE -+*/ -+static u8 _rtw_mi_process(_adapter *padapter, bool exclude_self, -+ void *data, u8(*ops_func)(_adapter *padapter, void *data)) -+{ -+ int i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ u8 ret = 0; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ -+ if ((exclude_self) && (iface == padapter)) -+ continue; -+ -+ if (ops_func) -+ if (_TRUE == ops_func(iface, data)) -+ ret++; -+ } -+ } -+ return ret; -+} -+static u8 _rtw_mi_process_without_schk(_adapter *padapter, bool exclude_self, -+ void *data, u8(*ops_func)(_adapter *padapter, void *data)) -+{ -+ int i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ u8 ret = 0; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface) { -+ if ((exclude_self) && (iface == padapter)) -+ continue; -+ -+ if (ops_func) -+ if (ops_func(iface, data) == _TRUE) -+ ret++; -+ } -+ } -+ return ret; -+} -+ -+static u8 _rtw_mi_netif_caroff_qstop(_adapter *padapter, void *data) -+{ -+ struct net_device *pnetdev = padapter->pnetdev; -+ -+ rtw_netif_carrier_off(pnetdev); -+ rtw_netif_stop_queue(pnetdev); -+ return _TRUE; -+} -+u8 rtw_mi_netif_caroff_qstop(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_netif_caroff_qstop); -+} -+u8 rtw_mi_buddy_netif_caroff_qstop(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_netif_caroff_qstop); -+} -+ -+static u8 _rtw_mi_netif_caron_qstart(_adapter *padapter, void *data) -+{ -+ struct net_device *pnetdev = padapter->pnetdev; -+ -+ rtw_netif_carrier_on(pnetdev); -+ rtw_netif_start_queue(pnetdev); -+ return _TRUE; -+} -+u8 rtw_mi_netif_caron_qstart(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_netif_caron_qstart); -+} -+u8 rtw_mi_buddy_netif_caron_qstart(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_netif_caron_qstart); -+} -+ -+static u8 _rtw_mi_netif_stop_queue(_adapter *padapter, void *data) -+{ -+ struct net_device *pnetdev = padapter->pnetdev; -+ -+ rtw_netif_stop_queue(pnetdev); -+ return _TRUE; -+} -+u8 rtw_mi_netif_stop_queue(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_netif_stop_queue); -+} -+u8 rtw_mi_buddy_netif_stop_queue(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_netif_stop_queue); -+} -+ -+static u8 _rtw_mi_netif_wake_queue(_adapter *padapter, void *data) -+{ -+ struct net_device *pnetdev = padapter->pnetdev; -+ -+ if (pnetdev) -+ rtw_netif_wake_queue(pnetdev); -+ return _TRUE; -+} -+u8 rtw_mi_netif_wake_queue(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_netif_wake_queue); -+} -+u8 rtw_mi_buddy_netif_wake_queue(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_netif_wake_queue); -+} -+ -+static u8 _rtw_mi_netif_carrier_on(_adapter *padapter, void *data) -+{ -+ struct net_device *pnetdev = padapter->pnetdev; -+ -+ if (pnetdev) -+ rtw_netif_carrier_on(pnetdev); -+ return _TRUE; -+} -+u8 rtw_mi_netif_carrier_on(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_netif_carrier_on); -+} -+u8 rtw_mi_buddy_netif_carrier_on(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_netif_carrier_on); -+} -+ -+static u8 _rtw_mi_netif_carrier_off(_adapter *padapter, void *data) -+{ -+ struct net_device *pnetdev = padapter->pnetdev; -+ -+ if (pnetdev) -+ rtw_netif_carrier_off(pnetdev); -+ return _TRUE; -+} -+u8 rtw_mi_netif_carrier_off(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_netif_carrier_off); -+} -+u8 rtw_mi_buddy_netif_carrier_off(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_netif_carrier_off); -+} -+ -+static u8 _rtw_mi_scan_abort(_adapter *adapter, void *data) -+{ -+ bool bwait = *(bool *)data; -+ -+ if (bwait) -+ rtw_scan_abort(adapter); -+ else -+ rtw_scan_abort_no_wait(adapter); -+ -+ return _TRUE; -+} -+void rtw_mi_scan_abort(_adapter *adapter, bool bwait) -+{ -+ bool in_data = bwait; -+ -+ _rtw_mi_process(adapter, _FALSE, &in_data, _rtw_mi_scan_abort); -+ -+} -+void rtw_mi_buddy_scan_abort(_adapter *adapter, bool bwait) -+{ -+ bool in_data = bwait; -+ -+ _rtw_mi_process(adapter, _TRUE, &in_data, _rtw_mi_scan_abort); -+} -+ -+static u32 _rtw_mi_start_drv_threads(_adapter *adapter, bool exclude_self) -+{ -+ int i; -+ _adapter *iface = NULL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u32 _status = _SUCCESS; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface) { -+ if ((exclude_self) && (iface == adapter)) -+ continue; -+ if (rtw_start_drv_threads(iface) == _FAIL) { -+ _status = _FAIL; -+ break; -+ } -+ } -+ } -+ return _status; -+} -+u32 rtw_mi_start_drv_threads(_adapter *adapter) -+{ -+ return _rtw_mi_start_drv_threads(adapter, _FALSE); -+} -+u32 rtw_mi_buddy_start_drv_threads(_adapter *adapter) -+{ -+ return _rtw_mi_start_drv_threads(adapter, _TRUE); -+} -+ -+static void _rtw_mi_stop_drv_threads(_adapter *adapter, bool exclude_self) -+{ -+ int i; -+ _adapter *iface = NULL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface) { -+ if ((exclude_self) && (iface == adapter)) -+ continue; -+ rtw_stop_drv_threads(iface); -+ } -+ } -+} -+void rtw_mi_stop_drv_threads(_adapter *adapter) -+{ -+ _rtw_mi_stop_drv_threads(adapter, _FALSE); -+} -+void rtw_mi_buddy_stop_drv_threads(_adapter *adapter) -+{ -+ _rtw_mi_stop_drv_threads(adapter, _TRUE); -+} -+ -+static u8 _rtw_mi_cancel_all_timer(_adapter *adapter, void *data) -+{ -+ rtw_cancel_all_timer(adapter); -+ return _TRUE; -+} -+void rtw_mi_cancel_all_timer(_adapter *adapter) -+{ -+ _rtw_mi_process(adapter, _FALSE, NULL, _rtw_mi_cancel_all_timer); -+} -+void rtw_mi_buddy_cancel_all_timer(_adapter *adapter) -+{ -+ _rtw_mi_process(adapter, _TRUE, NULL, _rtw_mi_cancel_all_timer); -+} -+ -+static u8 _rtw_mi_reset_drv_sw(_adapter *adapter, void *data) -+{ -+ rtw_reset_drv_sw(adapter); -+ return _TRUE; -+} -+void rtw_mi_reset_drv_sw(_adapter *adapter) -+{ -+ _rtw_mi_process_without_schk(adapter, _FALSE, NULL, _rtw_mi_reset_drv_sw); -+} -+void rtw_mi_buddy_reset_drv_sw(_adapter *adapter) -+{ -+ _rtw_mi_process_without_schk(adapter, _TRUE, NULL, _rtw_mi_reset_drv_sw); -+} -+ -+static u8 _rtw_mi_intf_start(_adapter *adapter, void *data) -+{ -+ rtw_intf_start(adapter); -+ return _TRUE; -+} -+void rtw_mi_intf_start(_adapter *adapter) -+{ -+ _rtw_mi_process(adapter, _FALSE, NULL, _rtw_mi_intf_start); -+} -+void rtw_mi_buddy_intf_start(_adapter *adapter) -+{ -+ _rtw_mi_process(adapter, _TRUE, NULL, _rtw_mi_intf_start); -+} -+ -+static u8 _rtw_mi_intf_stop(_adapter *adapter, void *data) -+{ -+ rtw_intf_stop(adapter); -+ return _TRUE; -+} -+void rtw_mi_intf_stop(_adapter *adapter) -+{ -+ _rtw_mi_process(adapter, _FALSE, NULL, _rtw_mi_intf_stop); -+} -+void rtw_mi_buddy_intf_stop(_adapter *adapter) -+{ -+ _rtw_mi_process(adapter, _TRUE, NULL, _rtw_mi_intf_stop); -+} -+ -+#ifdef CONFIG_NEW_NETDEV_HDL -+u8 rtw_mi_hal_iface_init(_adapter *padapter) -+{ -+ int i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ u8 ret = _TRUE; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface && iface->netif_up) -+ rtw_hal_iface_init(padapter); -+ } -+ return ret; -+} -+#endif -+ -+static u8 _rtw_mi_suspend_free_assoc_resource(_adapter *padapter, void *data) -+{ -+ return rtw_suspend_free_assoc_resource(padapter); -+} -+void rtw_mi_suspend_free_assoc_resource(_adapter *adapter) -+{ -+ _rtw_mi_process(adapter, _FALSE, NULL, _rtw_mi_suspend_free_assoc_resource); -+} -+void rtw_mi_buddy_suspend_free_assoc_resource(_adapter *adapter) -+{ -+ _rtw_mi_process(adapter, _TRUE, NULL, _rtw_mi_suspend_free_assoc_resource); -+} -+ -+static u8 _rtw_mi_is_scan_deny(_adapter *adapter, void *data) -+{ -+ return rtw_is_scan_deny(adapter); -+} -+ -+u8 rtw_mi_is_scan_deny(_adapter *adapter) -+{ -+ return _rtw_mi_process(adapter, _FALSE, NULL, _rtw_mi_is_scan_deny); -+ -+} -+u8 rtw_mi_buddy_is_scan_deny(_adapter *adapter) -+{ -+ return _rtw_mi_process(adapter, _TRUE, NULL, _rtw_mi_is_scan_deny); -+} -+ -+#ifdef CONFIG_SET_SCAN_DENY_TIMER -+static u8 _rtw_mi_set_scan_deny(_adapter *adapter, void *data) -+{ -+ u32 ms = *(u32 *)data; -+ -+ rtw_set_scan_deny(adapter, ms); -+ return _TRUE; -+} -+void rtw_mi_set_scan_deny(_adapter *adapter, u32 ms) -+{ -+ u32 in_data = ms; -+ -+ _rtw_mi_process(adapter, _FALSE, &in_data, _rtw_mi_set_scan_deny); -+} -+void rtw_mi_buddy_set_scan_deny(_adapter *adapter, u32 ms) -+{ -+ u32 in_data = ms; -+ -+ _rtw_mi_process(adapter, _TRUE, &in_data, _rtw_mi_set_scan_deny); -+} -+#endif /*CONFIG_SET_SCAN_DENY_TIMER*/ -+ -+#ifdef CONFIG_AP_MODE -+static u8 _rtw_mi_beacon_update(_adapter *padapter, void *data) -+{ -+ if (!MLME_IS_STA(padapter) -+ && check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ RTW_INFO(ADPT_FMT" - update_beacon\n", ADPT_ARG(padapter)); -+ update_beacon(padapter, 0xFF, NULL, _TRUE, 0); -+ } -+ return _TRUE; -+} -+ -+void rtw_mi_beacon_update(_adapter *padapter) -+{ -+ _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_beacon_update); -+} -+ -+void rtw_mi_buddy_beacon_update(_adapter *padapter) -+{ -+ _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_beacon_update); -+} -+#endif /* CONFIG_AP_MODE */ -+ -+#ifndef CONFIG_MI_WITH_MBSSID_CAM -+static u8 _rtw_mi_hal_dump_macaddr(_adapter *padapter, void *sel) -+{ -+ u8 mac_addr[ETH_ALEN] = {0}; -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_MAC_ADDR, mac_addr); -+ RTW_PRINT_SEL(sel, ADPT_FMT"- hw port(%d) mac_addr ="MAC_FMT"\n", -+ ADPT_ARG(padapter), padapter->hw_port, MAC_ARG(mac_addr)); -+ -+ return _TRUE; -+} -+void rtw_mi_hal_dump_macaddr(void *sel, _adapter *padapter) -+{ -+ _rtw_mi_process(padapter, _FALSE, sel, _rtw_mi_hal_dump_macaddr); -+} -+void rtw_mi_buddy_hal_dump_macaddr(void *sel, _adapter *padapter) -+{ -+ _rtw_mi_process(padapter, _TRUE, sel, _rtw_mi_hal_dump_macaddr); -+} -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+static u8 _rtw_mi_xmit_tasklet_schedule(_adapter *padapter, void *data) -+{ -+ if (rtw_txframes_pending(padapter)) { -+ /* try to deal with the pending packets */ -+ tasklet_hi_schedule(&(padapter->xmitpriv.xmit_tasklet)); -+ } -+ return _TRUE; -+} -+void rtw_mi_xmit_tasklet_schedule(_adapter *padapter) -+{ -+ _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_xmit_tasklet_schedule); -+} -+void rtw_mi_buddy_xmit_tasklet_schedule(_adapter *padapter) -+{ -+ _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_xmit_tasklet_schedule); -+} -+#endif -+ -+u8 _rtw_mi_busy_traffic_check(_adapter *padapter, void *data) -+{ -+ return padapter->mlmepriv.LinkDetectInfo.bBusyTraffic; -+} -+ -+u8 rtw_mi_busy_traffic_check(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_busy_traffic_check); -+} -+u8 rtw_mi_buddy_busy_traffic_check(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_busy_traffic_check); -+} -+static u8 _rtw_mi_check_mlmeinfo_state(_adapter *padapter, void *data) -+{ -+ u32 state = *(u32 *)data; -+ struct mlme_ext_priv *mlmeext = &padapter->mlmeextpriv; -+ -+ /*if (mlmeext_msr(mlmeext) == state)*/ -+ if (check_mlmeinfo_state(mlmeext, state)) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+u8 rtw_mi_check_mlmeinfo_state(_adapter *padapter, u32 state) -+{ -+ u32 in_data = state; -+ -+ return _rtw_mi_process(padapter, _FALSE, &in_data, _rtw_mi_check_mlmeinfo_state); -+} -+ -+u8 rtw_mi_buddy_check_mlmeinfo_state(_adapter *padapter, u32 state) -+{ -+ u32 in_data = state; -+ -+ return _rtw_mi_process(padapter, _TRUE, &in_data, _rtw_mi_check_mlmeinfo_state); -+} -+ -+/*#define DBG_DUMP_FW_STATE*/ -+#ifdef DBG_DUMP_FW_STATE -+static void rtw_dbg_dump_fwstate(_adapter *padapter, sint state) -+{ -+ u8 buf[32] = {0}; -+ -+ if (state & WIFI_FW_NULL_STATE) { -+ _rtw_memset(buf, 0, 32); -+ sprintf(buf, "WIFI_FW_NULL_STATE"); -+ RTW_INFO(FUNC_ADPT_FMT"fwstate-%s\n", FUNC_ADPT_ARG(padapter), buf); -+ } -+ -+ if (state & WIFI_ASOC_STATE) { -+ _rtw_memset(buf, 0, 32); -+ sprintf(buf, "WIFI_ASOC_STATE"); -+ RTW_INFO(FUNC_ADPT_FMT"fwstate-%s\n", FUNC_ADPT_ARG(padapter), buf); -+ } -+ -+ if (state & WIFI_UNDER_LINKING) { -+ _rtw_memset(buf, 0, 32); -+ sprintf(buf, "WIFI_UNDER_LINKING"); -+ RTW_INFO(FUNC_ADPT_FMT"fwstate-%s\n", FUNC_ADPT_ARG(padapter), buf); -+ } -+ -+ if (state & WIFI_UNDER_SURVEY) { -+ _rtw_memset(buf, 0, 32); -+ sprintf(buf, "WIFI_UNDER_SURVEY"); -+ RTW_INFO(FUNC_ADPT_FMT"fwstate-%s\n", FUNC_ADPT_ARG(padapter), buf); -+ } -+} -+#endif -+ -+static u8 _rtw_mi_check_fwstate(_adapter *padapter, void *data) -+{ -+ u8 ret = _FALSE; -+ -+ sint state = *(sint *)data; -+ -+ if ((state == WIFI_FW_NULL_STATE) && -+ (padapter->mlmepriv.fw_state == WIFI_FW_NULL_STATE)) -+ ret = _TRUE; -+ else if (_TRUE == check_fwstate(&padapter->mlmepriv, state)) -+ ret = _TRUE; -+#ifdef DBG_DUMP_FW_STATE -+ if (ret) -+ rtw_dbg_dump_fwstate(padapter, state); -+#endif -+ return ret; -+} -+u8 rtw_mi_check_fwstate(_adapter *padapter, sint state) -+{ -+ sint in_data = state; -+ -+ return _rtw_mi_process(padapter, _FALSE, &in_data, _rtw_mi_check_fwstate); -+} -+u8 rtw_mi_buddy_check_fwstate(_adapter *padapter, sint state) -+{ -+ sint in_data = state; -+ -+ return _rtw_mi_process(padapter, _TRUE, &in_data, _rtw_mi_check_fwstate); -+} -+ -+static u8 _rtw_mi_traffic_statistics(_adapter *padapter , void *data) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ -+ /* Tx */ -+ pdvobjpriv->traffic_stat.tx_bytes += padapter->xmitpriv.tx_bytes; -+ pdvobjpriv->traffic_stat.tx_pkts += padapter->xmitpriv.tx_pkts; -+ pdvobjpriv->traffic_stat.tx_drop += padapter->xmitpriv.tx_drop; -+ -+ /* Rx */ -+ pdvobjpriv->traffic_stat.rx_bytes += padapter->recvpriv.rx_bytes; -+ pdvobjpriv->traffic_stat.rx_pkts += padapter->recvpriv.rx_pkts; -+ pdvobjpriv->traffic_stat.rx_drop += padapter->recvpriv.rx_drop; -+ return _TRUE; -+} -+u8 rtw_mi_traffic_statistics(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_traffic_statistics); -+} -+ -+static u8 _rtw_mi_check_miracast_enabled(_adapter *padapter , void *data) -+{ -+ return is_miracast_enabled(padapter); -+} -+u8 rtw_mi_check_miracast_enabled(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_check_miracast_enabled); -+} -+ -+#ifdef CONFIG_XMIT_THREAD_MODE -+static u8 _rtw_mi_check_pending_xmitbuf(_adapter *padapter , void *data) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ return check_pending_xmitbuf(pxmitpriv); -+} -+u8 rtw_mi_check_pending_xmitbuf(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_check_pending_xmitbuf); -+} -+u8 rtw_mi_buddy_check_pending_xmitbuf(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_check_pending_xmitbuf); -+} -+#endif -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+static u8 _rtw_mi_dequeue_writeport(_adapter *padapter , bool exclude_self) -+{ -+ int i; -+ u8 queue_empty = _TRUE; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ -+ if ((exclude_self) && (iface == padapter)) -+ continue; -+ -+ queue_empty &= _dequeue_writeport(iface); -+ } -+ } -+ return queue_empty; -+} -+u8 rtw_mi_dequeue_writeport(_adapter *padapter) -+{ -+ return _rtw_mi_dequeue_writeport(padapter, _FALSE); -+} -+u8 rtw_mi_buddy_dequeue_writeport(_adapter *padapter) -+{ -+ return _rtw_mi_dequeue_writeport(padapter, _TRUE); -+} -+#endif -+static void _rtw_mi_adapter_reset(_adapter *padapter , u8 exclude_self) -+{ -+ int i; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (dvobj->padapters[i]) { -+ if ((exclude_self) && (dvobj->padapters[i] == padapter)) -+ continue; -+ dvobj->padapters[i] = NULL; -+ } -+ } -+} -+ -+void rtw_mi_adapter_reset(_adapter *padapter) -+{ -+ _rtw_mi_adapter_reset(padapter, _FALSE); -+} -+ -+void rtw_mi_buddy_adapter_reset(_adapter *padapter) -+{ -+ _rtw_mi_adapter_reset(padapter, _TRUE); -+} -+ -+static u8 _rtw_mi_dynamic_check_timer_handlder(_adapter *adapter, void *data) -+{ -+ rtw_iface_dynamic_check_timer_handlder(adapter); -+ return _TRUE; -+} -+u8 rtw_mi_dynamic_check_timer_handlder(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_dynamic_check_timer_handlder); -+} -+u8 rtw_mi_buddy_dynamic_check_timer_handlder(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_dynamic_check_timer_handlder); -+} -+ -+static u8 _rtw_mi_dynamic_chk_wk_hdl(_adapter *adapter, void *data) -+{ -+ rtw_iface_dynamic_chk_wk_hdl(adapter); -+ return _TRUE; -+} -+u8 rtw_mi_dynamic_chk_wk_hdl(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_dynamic_chk_wk_hdl); -+} -+u8 rtw_mi_buddy_dynamic_chk_wk_hdl(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_dynamic_chk_wk_hdl); -+} -+ -+static u8 _rtw_mi_os_xmit_schedule(_adapter *adapter, void *data) -+{ -+ rtw_os_xmit_schedule(adapter); -+ return _TRUE; -+} -+u8 rtw_mi_os_xmit_schedule(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_os_xmit_schedule); -+} -+u8 rtw_mi_buddy_os_xmit_schedule(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_os_xmit_schedule); -+} -+ -+static u8 _rtw_mi_report_survey_event(_adapter *adapter, void *data) -+{ -+ union recv_frame *precv_frame = (union recv_frame *)data; -+ -+ report_survey_event(adapter, precv_frame); -+ return _TRUE; -+} -+u8 rtw_mi_report_survey_event(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ return _rtw_mi_process(padapter, _FALSE, precv_frame, _rtw_mi_report_survey_event); -+} -+u8 rtw_mi_buddy_report_survey_event(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ return _rtw_mi_process(padapter, _TRUE, precv_frame, _rtw_mi_report_survey_event); -+} -+ -+static u8 _rtw_mi_sreset_adapter_hdl(_adapter *adapter, void *data) -+{ -+ u8 bstart = *(u8 *)data; -+ -+ if (bstart) -+ sreset_start_adapter(adapter); -+ else -+ sreset_stop_adapter(adapter); -+ return _TRUE; -+} -+u8 rtw_mi_sreset_adapter_hdl(_adapter *padapter, u8 bstart) -+{ -+ u8 in_data = bstart; -+ -+ return _rtw_mi_process(padapter, _FALSE, &in_data, _rtw_mi_sreset_adapter_hdl); -+} -+ -+#if defined(CONFIG_AP_MODE) && defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE) -+void rtw_mi_ap_info_restore(_adapter *adapter) -+{ -+ int i; -+ _adapter *iface; -+ struct mlme_priv *pmlmepriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface) { -+ pmlmepriv = &iface->mlmepriv; -+ -+ if (MLME_IS_AP(iface) || MLME_IS_MESH(iface)) { -+ RTW_INFO(FUNC_ADPT_FMT" %s\n", FUNC_ADPT_ARG(iface), MLME_IS_AP(iface) ? "AP" : "MESH"); -+ rtw_iface_bcmc_sec_cam_map_restore(iface); -+ } -+ } -+ } -+} -+#endif /*#if defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE)*/ -+ -+u8 rtw_mi_buddy_sreset_adapter_hdl(_adapter *padapter, u8 bstart) -+{ -+ u8 in_data = bstart; -+ -+ return _rtw_mi_process(padapter, _TRUE, &in_data, _rtw_mi_sreset_adapter_hdl); -+} -+ -+#ifdef CONFIG_AP_MODE -+static u8 _rtw_mi_tx_beacon_hdl(_adapter *adapter, void *data) -+{ -+ if ((MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) -+ && check_fwstate(&adapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE -+ ) { -+ adapter->mlmepriv.update_bcn = _TRUE; -+#ifndef CONFIG_INTERRUPT_BASED_TXBCN -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_PCI_BCN_POLLING) -+ tx_beacon_hdl(adapter, NULL); -+#endif -+#endif -+ } -+ return _TRUE; -+} -+u8 rtw_mi_tx_beacon_hdl(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_tx_beacon_hdl); -+} -+u8 rtw_mi_buddy_tx_beacon_hdl(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_sreset_adapter_hdl); -+} -+ -+static u8 _rtw_mi_set_tx_beacon_cmd(_adapter *adapter, void *data) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ -+ if (MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) { -+ if (pmlmepriv->update_bcn == _TRUE) -+ set_tx_beacon_cmd(adapter, 0); -+ } -+ return _TRUE; -+} -+u8 rtw_mi_set_tx_beacon_cmd(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_set_tx_beacon_cmd); -+} -+u8 rtw_mi_buddy_set_tx_beacon_cmd(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_set_tx_beacon_cmd); -+} -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_P2P -+static u8 _rtw_mi_p2p_chk_state(_adapter *adapter, void *data) -+{ -+ struct wifidirect_info *pwdinfo = &(adapter->wdinfo); -+ enum P2P_STATE state = *(enum P2P_STATE *)data; -+ -+ return rtw_p2p_chk_state(pwdinfo, state); -+} -+u8 rtw_mi_p2p_chk_state(_adapter *padapter, enum P2P_STATE p2p_state) -+{ -+ u8 in_data = p2p_state; -+ -+ return _rtw_mi_process(padapter, _FALSE, &in_data, _rtw_mi_p2p_chk_state); -+} -+u8 rtw_mi_buddy_p2p_chk_state(_adapter *padapter, enum P2P_STATE p2p_state) -+{ -+ u8 in_data = p2p_state; -+ -+ return _rtw_mi_process(padapter, _TRUE, &in_data, _rtw_mi_p2p_chk_state); -+} -+static u8 _rtw_mi_stay_in_p2p_mode(_adapter *adapter, void *data) -+{ -+ struct wifidirect_info *pwdinfo = &(adapter->wdinfo); -+ -+ if (rtw_p2p_role(pwdinfo) != P2P_ROLE_DISABLE) -+ return _TRUE; -+ return _FALSE; -+} -+u8 rtw_mi_stay_in_p2p_mode(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _FALSE, NULL, _rtw_mi_stay_in_p2p_mode); -+} -+u8 rtw_mi_buddy_stay_in_p2p_mode(_adapter *padapter) -+{ -+ return _rtw_mi_process(padapter, _TRUE, NULL, _rtw_mi_stay_in_p2p_mode); -+} -+#endif /*CONFIG_P2P*/ -+ -+_adapter *rtw_get_iface_by_id(_adapter *padapter, u8 iface_id) -+{ -+ _adapter *iface = NULL; -+ struct dvobj_priv *dvobj; -+ -+ if ((padapter == NULL) || (iface_id >= CONFIG_IFACE_NUMBER)) { -+ rtw_warn_on(1); -+ return iface; -+ } -+ -+ dvobj = adapter_to_dvobj(padapter); -+ return dvobj->padapters[iface_id]; -+} -+ -+_adapter *rtw_get_iface_by_macddr(_adapter *padapter, const u8 *mac_addr) -+{ -+ int i; -+ _adapter *iface = NULL; -+ u8 bmatch = _FALSE; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && (_rtw_memcmp(mac_addr, adapter_mac_addr(iface), ETH_ALEN))) { -+ bmatch = _TRUE; -+ break; -+ } -+ } -+ if (bmatch) -+ return iface; -+ else -+ return NULL; -+} -+ -+_adapter *rtw_get_iface_by_hwport(_adapter *padapter, u8 hw_port) -+{ -+ int i; -+ _adapter *iface = NULL; -+ u8 bmatch = _FALSE; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && (hw_port == iface->hw_port)) { -+ bmatch = _TRUE; -+ break; -+ } -+ } -+ if (bmatch) -+ return iface; -+ else -+ return NULL; -+} -+ -+/*#define CONFIG_SKB_ALLOCATED*/ -+#define DBG_SKB_PROCESS -+#ifdef DBG_SKB_PROCESS -+void rtw_dbg_skb_process(_adapter *padapter, union recv_frame *precvframe, union recv_frame *pcloneframe) -+{ -+ _pkt *pkt_copy, *pkt_org; -+ -+ pkt_org = precvframe->u.hdr.pkt; -+ pkt_copy = pcloneframe->u.hdr.pkt; -+ /* -+ RTW_INFO("%s ===== ORG SKB =====\n", __func__); -+ RTW_INFO(" SKB head(%p)\n", pkt_org->head); -+ RTW_INFO(" SKB data(%p)\n", pkt_org->data); -+ RTW_INFO(" SKB tail(%p)\n", pkt_org->tail); -+ RTW_INFO(" SKB end(%p)\n", pkt_org->end); -+ -+ RTW_INFO(" recv frame head(%p)\n", precvframe->u.hdr.rx_head); -+ RTW_INFO(" recv frame data(%p)\n", precvframe->u.hdr.rx_data); -+ RTW_INFO(" recv frame tail(%p)\n", precvframe->u.hdr.rx_tail); -+ RTW_INFO(" recv frame end(%p)\n", precvframe->u.hdr.rx_end); -+ -+ RTW_INFO("%s ===== COPY SKB =====\n", __func__); -+ RTW_INFO(" SKB head(%p)\n", pkt_copy->head); -+ RTW_INFO(" SKB data(%p)\n", pkt_copy->data); -+ RTW_INFO(" SKB tail(%p)\n", pkt_copy->tail); -+ RTW_INFO(" SKB end(%p)\n", pkt_copy->end); -+ -+ RTW_INFO(" recv frame head(%p)\n", pcloneframe->u.hdr.rx_head); -+ RTW_INFO(" recv frame data(%p)\n", pcloneframe->u.hdr.rx_data); -+ RTW_INFO(" recv frame tail(%p)\n", pcloneframe->u.hdr.rx_tail); -+ RTW_INFO(" recv frame end(%p)\n", pcloneframe->u.hdr.rx_end); -+ */ -+ /* -+ RTW_INFO("%s => recv_frame adapter(%p,%p)\n", __func__, precvframe->u.hdr.adapter, pcloneframe->u.hdr.adapter); -+ RTW_INFO("%s => recv_frame dev(%p,%p)\n", __func__, pkt_org->dev , pkt_copy->dev); -+ RTW_INFO("%s => recv_frame len(%d,%d)\n", __func__, precvframe->u.hdr.len, pcloneframe->u.hdr.len); -+ */ -+ if (precvframe->u.hdr.len != pcloneframe->u.hdr.len) -+ RTW_INFO("%s [WARN] recv_frame length(%d:%d) compare failed\n", __func__, precvframe->u.hdr.len, pcloneframe->u.hdr.len); -+ -+ if (_rtw_memcmp(&precvframe->u.hdr.attrib, &pcloneframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)) == _FALSE) -+ RTW_INFO("%s [WARN] recv_frame attrib compare failed\n", __func__); -+ -+ if (_rtw_memcmp(precvframe->u.hdr.rx_data, pcloneframe->u.hdr.rx_data, precvframe->u.hdr.len) == _FALSE) -+ RTW_INFO("%s [WARN] recv_frame rx_data compare failed\n", __func__); -+ -+} -+#endif -+ -+static s32 _rtw_mi_buddy_clone_bcmc_packet(_adapter *adapter, union recv_frame *precvframe, u8 *pphy_status, union recv_frame *pcloneframe) -+{ -+ s32 ret = _SUCCESS; -+#ifdef CONFIG_SKB_ALLOCATED -+ u8 *pbuf = precvframe->u.hdr.rx_data; -+#endif -+ struct rx_pkt_attrib *pattrib = NULL; -+ -+ if (pcloneframe) { -+ pcloneframe->u.hdr.adapter = adapter; -+ -+ _rtw_init_listhead(&pcloneframe->u.hdr.list); -+ pcloneframe->u.hdr.precvbuf = NULL; /*can't access the precvbuf for new arch.*/ -+ pcloneframe->u.hdr.len = 0; -+ -+ _rtw_memcpy(&pcloneframe->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); -+ -+ pattrib = &pcloneframe->u.hdr.attrib; -+#ifdef CONFIG_SKB_ALLOCATED -+ if (rtw_os_alloc_recvframe(adapter, pcloneframe, pbuf, NULL) == _SUCCESS) -+#else -+ if (rtw_os_recvframe_duplicate_skb(adapter, pcloneframe, precvframe->u.hdr.pkt) == _SUCCESS) -+#endif -+ { -+#ifdef CONFIG_SKB_ALLOCATED -+ recvframe_put(pcloneframe, pattrib->pkt_len); -+#endif -+ -+#ifdef DBG_SKB_PROCESS -+ rtw_dbg_skb_process(adapter, precvframe, pcloneframe); -+#endif -+ -+ if (pphy_status) -+ rx_query_phy_status(pcloneframe, pphy_status); -+ -+ ret = rtw_recv_entry(pcloneframe); -+ } else { -+ ret = -1; -+ RTW_INFO("%s()-%d: rtw_os_alloc_recvframe() failed!\n", __func__, __LINE__); -+ } -+ -+ } -+ return ret; -+} -+ -+void rtw_mi_buddy_clone_bcmc_packet(_adapter *padapter, union recv_frame *precvframe, u8 *pphy_status) -+{ -+ int i; -+ s32 ret = _SUCCESS; -+ _adapter *iface = NULL; -+ union recv_frame *pcloneframe = NULL; -+ struct recv_priv *precvpriv = &padapter->recvpriv;/*primary_padapter*/ -+ _queue *pfree_recv_queue = &precvpriv->free_recv_queue; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ u8 *fhead = get_recvframe_data(precvframe); -+ u8 type = GetFrameType(fhead); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface || iface == padapter) -+ continue; -+ if (rtw_is_adapter_up(iface) == _FALSE || iface->registered == 0) -+ continue; -+ if (type == WIFI_DATA_TYPE && !adapter_allow_bmc_data_rx(iface)) -+ continue; -+ -+ pcloneframe = rtw_alloc_recvframe(pfree_recv_queue); -+ if (pcloneframe) { -+ ret = _rtw_mi_buddy_clone_bcmc_packet(iface, precvframe, pphy_status, pcloneframe); -+ if (_SUCCESS != ret) { -+ if (ret == -1) -+ rtw_free_recvframe(pcloneframe, pfree_recv_queue); -+ /*RTW_INFO(ADPT_FMT"-clone BC/MC frame failed\n", ADPT_ARG(iface));*/ -+ } -+ } -+ } -+ -+} -+ -+#ifdef CONFIG_PCI_HCI -+/*API be created temporary for MI, caller is interrupt-handler, PCIE's interrupt handler cannot apply to multi-AP*/ -+_adapter *rtw_mi_get_ap_adapter(_adapter *padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ int i; -+ _adapter *iface = NULL; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE -+ && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ break; -+ -+ } -+ return iface; -+} -+#endif -+ -+u8 rtw_mi_get_ld_sta_ifbmp(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ int i; -+ _adapter *iface = NULL; -+ u8 ifbmp = 0; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ if (MLME_IS_STA(iface) && MLME_IS_ASOC(iface)) -+ ifbmp |= BIT(i); -+ } -+ -+ return ifbmp; -+} -+ -+u8 rtw_mi_get_ap_mesh_ifbmp(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ int i; -+ _adapter *iface = NULL; -+ u8 ifbmp = 0; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ if (CHK_MLME_STATE(iface, WIFI_AP_STATE | WIFI_MESH_STATE) -+ && MLME_IS_ASOC(iface)) -+ ifbmp |= BIT(i); -+ } -+ -+ return ifbmp; -+} -+ -+void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b) -+{ -+#ifdef CONFIG_CONCURRENT_MODE -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ -+ int i; -+ _adapter *iface = NULL; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ if (macid_ctl->iface_bmc[iface->iface_id] != INVALID_SEC_MAC_CAM_ID) { -+ if (macid_ctl->iface_bmc[iface->iface_id] == camid_a) -+ macid_ctl->iface_bmc[iface->iface_id] = camid_b; -+ else if (macid_ctl->iface_bmc[iface->iface_id] == camid_b) -+ macid_ctl->iface_bmc[iface->iface_id] = camid_a; -+ iface->securitypriv.dot118021x_bmc_cam_id = macid_ctl->iface_bmc[iface->iface_id]; -+ } -+ } -+#endif -+} -+ -+u8 rtw_mi_get_assoc_if_num(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 n_assoc_iface = 0; -+#if 1 -+ u8 i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (check_fwstate(&(dvobj->padapters[i]->mlmepriv), WIFI_ASOC_STATE)) -+ n_assoc_iface++; -+ } -+#else -+ n_assoc_iface = DEV_STA_LD_NUM(dvobj) + DEV_AP_NUM(dvobj) + DEV_ADHOC_NUM(dvobj) + DEV_MESH_NUM(dvobj); -+#endif -+ return n_assoc_iface; -+} -diff --git a/drivers/staging/rtl8723cs/core/rtw_mlme.c b/drivers/staging/rtl8723cs/core/rtw_mlme.c -new file mode 100644 -index 000000000000..3ab2fb5251eb ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_mlme.c -@@ -0,0 +1,5955 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_MLME_C_ -+ -+#include -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+#include "../os_dep/linux/custom_multiap_intfs/custom_multiap_intfs.h" -+#endif -+ -+extern void indicate_wx_scan_complete_event(_adapter *padapter); -+extern u8 rtw_do_join(_adapter *padapter); -+ -+ -+void rtw_init_mlme_timer(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ rtw_init_timer(&(pmlmepriv->assoc_timer), padapter, rtw_join_timeout_handler, padapter); -+ rtw_init_timer(&(pmlmepriv->scan_to_timer), padapter, rtw_scan_timeout_handler, padapter); -+ -+#ifdef CONFIG_SET_SCAN_DENY_TIMER -+ rtw_init_timer(&(pmlmepriv->set_scan_deny_timer), padapter, rtw_set_scan_deny_timer_hdl, padapter); -+#endif -+ -+#ifdef RTK_DMP_PLATFORM -+ _init_workitem(&(pmlmepriv->Linkup_workitem), Linkup_workitem_callback, padapter); -+ _init_workitem(&(pmlmepriv->Linkdown_workitem), Linkdown_workitem_callback, padapter); -+#endif -+} -+ -+sint _rtw_init_mlme_priv(_adapter *padapter) -+{ -+ sint i; -+ u8 *pbuf; -+ struct wlan_network *pnetwork; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ sint res = _SUCCESS; -+#ifdef CONFIG_RTW_MULTI_AP -+ struct unassoc_sta_info *unassoc_sta; -+#endif -+ -+ -+ /* We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). */ -+ /* _rtw_memset((u8 *)pmlmepriv, 0, sizeof(struct mlme_priv)); */ -+ -+ -+ /*qos_priv*/ -+ /*pmlmepriv->qospriv.qos_option = pregistrypriv->wmm_enable;*/ -+ -+ /*ht_priv*/ -+#ifdef CONFIG_80211N_HT -+ pmlmepriv->htpriv.ampdu_enable = _FALSE;/*set to disabled*/ -+#endif -+ -+ pmlmepriv->nic_hdl = (u8 *)padapter; -+ -+ pmlmepriv->pscanned = NULL; -+ init_fwstate(pmlmepriv, WIFI_STATION_STATE); -+ pmlmepriv->cur_network.network.InfrastructureMode = Ndis802_11AutoUnknown; -+ pmlmepriv->scan_mode = SCAN_ACTIVE; /* 1: active, 0: pasive. Maybe someday we should rename this varable to "active_mode" (Jeff) */ -+ -+ _rtw_spinlock_init(&(pmlmepriv->lock)); -+ _rtw_init_queue(&(pmlmepriv->free_bss_pool)); -+ _rtw_init_queue(&(pmlmepriv->scanned_queue)); -+ -+ set_scanned_network_val(pmlmepriv, 0); -+ -+ _rtw_memset(&pmlmepriv->assoc_ssid, 0, sizeof(NDIS_802_11_SSID)); -+ -+ if (padapter->registrypriv.max_bss_cnt != 0) -+ pmlmepriv->max_bss_cnt = padapter->registrypriv.max_bss_cnt; -+ else if (rfctl->max_chan_nums <= MAX_CHANNEL_NUM_2G) -+ pmlmepriv->max_bss_cnt = MAX_BSS_CNT; -+ else -+ pmlmepriv->max_bss_cnt = MAX_BSS_CNT + MAX_BSS_CNT; -+ -+ -+ pbuf = rtw_zvmalloc(pmlmepriv->max_bss_cnt * (sizeof(struct wlan_network))); -+ -+ if (pbuf == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ pmlmepriv->free_bss_buf = pbuf; -+ -+ pnetwork = (struct wlan_network *)pbuf; -+ -+ for (i = 0; i < pmlmepriv->max_bss_cnt; i++) { -+ _rtw_init_listhead(&(pnetwork->list)); -+ -+ rtw_list_insert_tail(&(pnetwork->list), &(pmlmepriv->free_bss_pool.queue)); -+ -+ pnetwork++; -+ } -+ -+#ifdef CONFIG_RTW_MULTI_AP -+ if (is_primary_adapter(padapter)) { -+ _rtw_init_queue(&(pmlmepriv->free_unassoc_sta_queue)); -+ _rtw_init_queue(&(pmlmepriv->unassoc_sta_queue)); -+ for (i = 0; i < UNASOC_STA_SRC_NUM; i++) -+ pmlmepriv->unassoc_sta_mode_of_stype[i] = padapter->registrypriv.unassoc_sta_mode_of_stype[i]; -+ if (padapter->registrypriv.max_unassoc_sta_cnt != 0) -+ pmlmepriv->max_unassoc_sta_cnt = padapter->registrypriv.max_unassoc_sta_cnt; -+ else if (rfctl->max_chan_nums <= MAX_CHANNEL_NUM_2G) -+ pmlmepriv->max_unassoc_sta_cnt = MAX_UNASSOC_STA_CNT; -+ else -+ pmlmepriv->max_unassoc_sta_cnt = MAX_UNASSOC_STA_CNT * 2; -+ pbuf = rtw_zvmalloc(pmlmepriv->max_unassoc_sta_cnt * (sizeof(struct unassoc_sta_info))); -+ if (pbuf == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ pmlmepriv->free_unassoc_sta_buf = pbuf; -+ unassoc_sta = (struct unassoc_sta_info *) pbuf; -+ for (i = 0; i < pmlmepriv->max_unassoc_sta_cnt; i++) { -+ _rtw_init_listhead(&(unassoc_sta->list)); -+ rtw_list_insert_tail(&(unassoc_sta->list), &(pmlmepriv->free_unassoc_sta_queue.queue)); -+ unassoc_sta++; -+ } -+ } -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ rtw_init_timer(&pmlmepriv->cmap_unassoc_sta_timer, padapter, cmap_unassoc_sta_report_info_timer, padapter); -+#endif -+#endif -+ /* allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf */ -+ -+ rtw_clear_scan_deny(padapter); -+#ifdef CONFIG_ARP_KEEP_ALIVE -+ pmlmepriv->bGetGateway = 0; -+ pmlmepriv->GetGatewayTryCnt = 0; -+#endif -+ -+#ifdef CONFIG_LAYER2_ROAMING -+#define RTW_ROAM_SCAN_RESULT_EXP_MS (5*1000) -+#define RTW_ROAM_RSSI_DIFF_TH 10 -+#define RTW_ROAM_SCAN_INTERVAL (5) /* 5*(2 second)*/ -+#define RTW_ROAM_RSSI_THRESHOLD 70 -+ pmlmepriv->roam_flags = CONFIG_ROAMING_FLAG; -+ -+ pmlmepriv->roam_scanr_exp_ms = RTW_ROAM_SCAN_RESULT_EXP_MS; -+ pmlmepriv->roam_rssi_diff_th = RTW_ROAM_RSSI_DIFF_TH; -+ pmlmepriv->roam_scan_int = RTW_ROAM_SCAN_INTERVAL; -+ pmlmepriv->roam_rssi_threshold = RTW_ROAM_RSSI_THRESHOLD; -+ pmlmepriv->need_to_roam = _FALSE; -+ pmlmepriv->last_roaming = rtw_get_current_time(); -+#endif /* CONFIG_LAYER2_ROAMING */ -+ -+#ifdef CONFIG_RTW_80211R -+ rtw_ft_info_init(&pmlmepriv->ft_roam); -+#endif -+#ifdef CONFIG_LAYER2_ROAMING -+#if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K) -+ rtw_roam_nb_info_init(padapter); -+ pmlmepriv->ch_cnt = 0; -+#endif -+#endif -+ -+ pmlmepriv->defs_lmt_sta = 2; -+ pmlmepriv->defs_lmt_time = 5; -+ -+ rtw_init_mlme_timer(padapter); -+ -+exit: -+ -+ -+ return res; -+} -+ -+void rtw_mfree_mlme_priv_lock(struct mlme_priv *pmlmepriv); -+void rtw_mfree_mlme_priv_lock(struct mlme_priv *pmlmepriv) -+{ -+ _rtw_spinlock_free(&pmlmepriv->lock); -+ _rtw_spinlock_free(&(pmlmepriv->free_bss_pool.lock)); -+ _rtw_spinlock_free(&(pmlmepriv->scanned_queue.lock)); -+#ifdef CONFIG_RTW_MULTI_AP -+ if (is_primary_adapter(mlme_to_adapter(pmlmepriv))) { -+ _rtw_spinlock_free(&(pmlmepriv->unassoc_sta_queue.lock)); -+ _rtw_spinlock_free(&(pmlmepriv->free_unassoc_sta_queue.lock)); -+ } -+#endif -+} -+ -+void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv) -+{ -+ rtw_buf_free(&pmlmepriv->assoc_req, &pmlmepriv->assoc_req_len); -+ rtw_buf_free(&pmlmepriv->assoc_rsp, &pmlmepriv->assoc_rsp_len); -+#if defined(CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) -+ rtw_buf_free(&pmlmepriv->wps_beacon_ie, &pmlmepriv->wps_beacon_ie_len); -+ rtw_buf_free(&pmlmepriv->wps_probe_req_ie, &pmlmepriv->wps_probe_req_ie_len); -+ rtw_buf_free(&pmlmepriv->wps_probe_resp_ie, &pmlmepriv->wps_probe_resp_ie_len); -+ rtw_buf_free(&pmlmepriv->wps_assoc_resp_ie, &pmlmepriv->wps_assoc_resp_ie_len); -+ -+ rtw_buf_free(&pmlmepriv->p2p_beacon_ie, &pmlmepriv->p2p_beacon_ie_len); -+ rtw_buf_free(&pmlmepriv->p2p_probe_req_ie, &pmlmepriv->p2p_probe_req_ie_len); -+ rtw_buf_free(&pmlmepriv->p2p_probe_resp_ie, &pmlmepriv->p2p_probe_resp_ie_len); -+ rtw_buf_free(&pmlmepriv->p2p_go_probe_resp_ie, &pmlmepriv->p2p_go_probe_resp_ie_len); -+ rtw_buf_free(&pmlmepriv->p2p_assoc_req_ie, &pmlmepriv->p2p_assoc_req_ie_len); -+ rtw_buf_free(&pmlmepriv->p2p_assoc_resp_ie, &pmlmepriv->p2p_assoc_resp_ie_len); -+#endif -+ -+#if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) -+ rtw_buf_free(&pmlmepriv->wfd_beacon_ie, &pmlmepriv->wfd_beacon_ie_len); -+ rtw_buf_free(&pmlmepriv->wfd_probe_req_ie, &pmlmepriv->wfd_probe_req_ie_len); -+ rtw_buf_free(&pmlmepriv->wfd_probe_resp_ie, &pmlmepriv->wfd_probe_resp_ie_len); -+ rtw_buf_free(&pmlmepriv->wfd_go_probe_resp_ie, &pmlmepriv->wfd_go_probe_resp_ie_len); -+ rtw_buf_free(&pmlmepriv->wfd_assoc_req_ie, &pmlmepriv->wfd_assoc_req_ie_len); -+ rtw_buf_free(&pmlmepriv->wfd_assoc_resp_ie, &pmlmepriv->wfd_assoc_resp_ie_len); -+#endif -+ -+#ifdef CONFIG_RTW_80211R -+ rtw_buf_free(&pmlmepriv->auth_rsp, &pmlmepriv->auth_rsp_len); -+#endif -+#ifdef CONFIG_RTW_MBO -+ rtw_buf_free(&pmlmepriv->pcell_data_cap_ie, &pmlmepriv->cell_data_cap_len); -+#endif -+} -+ -+#if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) -+int rtw_mlme_update_wfd_ie_data(struct mlme_priv *mlme, u8 type, u8 *ie, u32 ie_len) -+{ -+ _adapter *adapter = mlme_to_adapter(mlme); -+ struct wifi_display_info *wfd_info = &adapter->wfd_info; -+ u8 clear = 0; -+ u8 **t_ie = NULL; -+ u32 *t_ie_len = NULL; -+ int ret = _FAIL; -+ -+ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) -+ goto success; -+ -+ if (wfd_info->wfd_enable == _TRUE) -+ goto success; /* WFD IE is build by self */ -+ -+ if (!ie && !ie_len) -+ clear = 1; -+ else if (!ie || !ie_len) { -+ RTW_PRINT(FUNC_ADPT_FMT" type:%u, ie:%p, ie_len:%u" -+ , FUNC_ADPT_ARG(adapter), type, ie, ie_len); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ switch (type) { -+ case MLME_BEACON_IE: -+ t_ie = &mlme->wfd_beacon_ie; -+ t_ie_len = &mlme->wfd_beacon_ie_len; -+ break; -+ case MLME_PROBE_REQ_IE: -+ t_ie = &mlme->wfd_probe_req_ie; -+ t_ie_len = &mlme->wfd_probe_req_ie_len; -+ break; -+ case MLME_PROBE_RESP_IE: -+ t_ie = &mlme->wfd_probe_resp_ie; -+ t_ie_len = &mlme->wfd_probe_resp_ie_len; -+ break; -+ case MLME_GO_PROBE_RESP_IE: -+ t_ie = &mlme->wfd_go_probe_resp_ie; -+ t_ie_len = &mlme->wfd_go_probe_resp_ie_len; -+ break; -+ case MLME_ASSOC_REQ_IE: -+ t_ie = &mlme->wfd_assoc_req_ie; -+ t_ie_len = &mlme->wfd_assoc_req_ie_len; -+ break; -+ case MLME_ASSOC_RESP_IE: -+ t_ie = &mlme->wfd_assoc_resp_ie; -+ t_ie_len = &mlme->wfd_assoc_resp_ie_len; -+ break; -+ default: -+ RTW_PRINT(FUNC_ADPT_FMT" unsupported type:%u" -+ , FUNC_ADPT_ARG(adapter), type); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (*t_ie) { -+ u32 free_len = *t_ie_len; -+ *t_ie_len = 0; -+ rtw_mfree(*t_ie, free_len); -+ *t_ie = NULL; -+ } -+ -+ if (!clear) { -+ *t_ie = rtw_malloc(ie_len); -+ if (*t_ie == NULL) { -+ RTW_ERR(FUNC_ADPT_FMT" type:%u, rtw_malloc() fail\n" -+ , FUNC_ADPT_ARG(adapter), type); -+ goto exit; -+ } -+ _rtw_memcpy(*t_ie, ie, ie_len); -+ *t_ie_len = ie_len; -+ } -+ -+ if (*t_ie && *t_ie_len) { -+ u8 *attr_content; -+ u32 attr_contentlen = 0; -+ -+ attr_content = rtw_get_wfd_attr_content(*t_ie, *t_ie_len, WFD_ATTR_DEVICE_INFO, NULL, &attr_contentlen); -+ if (attr_content && attr_contentlen) { -+ if (RTW_GET_BE16(attr_content + 2) != wfd_info->rtsp_ctrlport) { -+ wfd_info->rtsp_ctrlport = RTW_GET_BE16(attr_content + 2); -+ RTW_INFO(FUNC_ADPT_FMT" type:%u, RTSP CTRL port = %u\n" -+ , FUNC_ADPT_ARG(adapter), type, wfd_info->rtsp_ctrlport); -+ } -+ } -+ } -+ -+success: -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+#endif /* defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) */ -+ -+void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv) -+{ -+ _adapter *adapter = mlme_to_adapter(pmlmepriv); -+ if (NULL == pmlmepriv) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ rtw_free_mlme_priv_ie_data(pmlmepriv); -+ -+ if (pmlmepriv) { -+ rtw_mfree_mlme_priv_lock(pmlmepriv); -+ -+ if (pmlmepriv->free_bss_buf) -+ rtw_vmfree(pmlmepriv->free_bss_buf, pmlmepriv->max_bss_cnt * sizeof(struct wlan_network)); -+#ifdef CONFIG_RTW_MULTI_AP -+ if (is_primary_adapter(adapter)) { -+ if (pmlmepriv->free_unassoc_sta_buf) -+ rtw_vmfree(pmlmepriv->free_unassoc_sta_buf, pmlmepriv->max_unassoc_sta_cnt * sizeof(struct unassoc_sta_info)); -+ } -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ _cancel_timer_ex(&pmlmepriv->cmap_unassoc_sta_timer); -+#endif -+#endif -+ } -+exit: -+ return; -+} -+ -+sint _rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork) -+{ -+ _irqL irqL; -+ -+ -+ if (pnetwork == NULL) -+ goto exit; -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ -+ rtw_list_insert_tail(&pnetwork->list, &queue->queue); -+ -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+exit: -+ -+ -+ return _SUCCESS; -+} -+ -+/* -+struct wlan_network *_rtw_dequeue_network(_queue *queue) -+{ -+ _irqL irqL; -+ -+ struct wlan_network *pnetwork; -+ -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ -+ if (_rtw_queue_empty(queue) == _TRUE) -+ -+ pnetwork = NULL; -+ -+ else -+ { -+ pnetwork = LIST_CONTAINOR(get_next(&queue->queue), struct wlan_network, list); -+ -+ rtw_list_delete(&(pnetwork->list)); -+ } -+ -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+ -+ return pnetwork; -+} -+*/ -+ -+struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv) /* (_queue *free_queue) */ -+{ -+ _irqL irqL; -+ struct wlan_network *pnetwork; -+ _queue *free_queue = &pmlmepriv->free_bss_pool; -+ _list *plist = NULL; -+ -+ -+ _enter_critical_bh(&free_queue->lock, &irqL); -+ -+ if (_rtw_queue_empty(free_queue) == _TRUE) { -+ pnetwork = NULL; -+ goto exit; -+ } -+ plist = get_next(&(free_queue->queue)); -+ -+ pnetwork = LIST_CONTAINOR(plist , struct wlan_network, list); -+ -+ rtw_list_delete(&pnetwork->list); -+ -+ pnetwork->network_type = 0; -+ pnetwork->fixed = _FALSE; -+ pnetwork->last_scanned = rtw_get_current_time(); -+ pnetwork->last_non_hidden_ssid_ap = pnetwork->last_scanned; -+#if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT -+ pnetwork->acnode_stime = 0; -+ pnetwork->acnode_notify_etime = 0; -+#endif -+ -+ pnetwork->aid = 0; -+ pnetwork->join_res = 0; -+ -+ pmlmepriv->num_of_scanned++; -+ -+exit: -+ _exit_critical_bh(&free_queue->lock, &irqL); -+ -+ -+ return pnetwork; -+} -+ -+void _rtw_free_network(struct mlme_priv *pmlmepriv , struct wlan_network *pnetwork, u8 isfreeall) -+{ -+ u32 delta_time; -+ u32 lifetime = SCANQUEUE_LIFETIME; -+ _irqL irqL; -+ _queue *free_queue = &(pmlmepriv->free_bss_pool); -+ -+ -+ if (pnetwork == NULL) -+ goto exit; -+ -+ if (pnetwork->fixed == _TRUE) -+ goto exit; -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || -+ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) -+ lifetime = 1; -+ -+ if (!isfreeall) { -+ delta_time = (u32) rtw_get_passing_time_ms(pnetwork->last_scanned); -+ if (delta_time < lifetime) /* unit:msec */ -+ goto exit; -+ } -+ -+ _enter_critical_bh(&free_queue->lock, &irqL); -+ -+ rtw_list_delete(&(pnetwork->list)); -+ -+ rtw_list_insert_tail(&(pnetwork->list), &(free_queue->queue)); -+ -+ pmlmepriv->num_of_scanned--; -+ -+ -+ /* RTW_INFO("_rtw_free_network:SSID=%s\n", pnetwork->network.Ssid.Ssid); */ -+ -+ _exit_critical_bh(&free_queue->lock, &irqL); -+ -+exit: -+ return; -+} -+ -+void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork) -+{ -+ -+ _queue *free_queue = &(pmlmepriv->free_bss_pool); -+ -+ -+ if (pnetwork == NULL) -+ goto exit; -+ -+ if (pnetwork->fixed == _TRUE) -+ goto exit; -+ -+ /* _enter_critical(&free_queue->lock, &irqL); */ -+ -+ rtw_list_delete(&(pnetwork->list)); -+ -+ rtw_list_insert_tail(&(pnetwork->list), get_list_head(free_queue)); -+ -+ pmlmepriv->num_of_scanned--; -+ -+ /* _exit_critical(&free_queue->lock, &irqL); */ -+ -+exit: -+ return; -+} -+ -+void _rtw_free_network_queue(_adapter *padapter, u8 isfreeall) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ struct wlan_network *pnetwork; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _queue *scanned_queue = &pmlmepriv->scanned_queue; -+ -+ -+ -+ _enter_critical_bh(&scanned_queue->lock, &irqL); -+ -+ phead = get_list_head(scanned_queue); -+ plist = get_next(phead); -+ -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ plist = get_next(plist); -+ -+ _rtw_free_network(pmlmepriv, pnetwork, isfreeall); -+ -+ } -+ -+ _exit_critical_bh(&scanned_queue->lock, &irqL); -+ -+ -+} -+ -+ -+ -+ -+sint rtw_if_up(_adapter *padapter) -+{ -+ -+ sint res; -+ -+ if (RTW_CANNOT_RUN(padapter) || -+ (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _FALSE)) { -+ res = _FALSE; -+ } else -+ res = _TRUE; -+ -+ return res; -+} -+ -+ -+void rtw_generate_random_ibss(u8 *pibss) -+{ -+ *((u32 *)(&pibss[2])) = rtw_random32(); -+ pibss[0] = 0x02; /* in ad-hoc mode local bit must set to 1 */ -+ pibss[1] = 0x11; -+ pibss[2] = 0x87; -+} -+ -+u8 *rtw_get_capability_from_ie(u8 *ie) -+{ -+ return ie + 8 + 2; -+} -+ -+ -+u16 rtw_get_capability(WLAN_BSSID_EX *bss) -+{ -+ u16 val; -+ -+ _rtw_memcpy((u8 *)&val, rtw_get_capability_from_ie(bss->IEs), 2); -+ -+ return le16_to_cpu(val); -+} -+ -+u8 *rtw_get_timestampe_from_ie(u8 *ie) -+{ -+ return ie + 0; -+} -+ -+u8 *rtw_get_beacon_interval_from_ie(u8 *ie) -+{ -+ return ie + 8; -+} -+ -+ -+int rtw_init_mlme_priv(_adapter *padapter) /* (struct mlme_priv *pmlmepriv) */ -+{ -+ int res; -+ res = _rtw_init_mlme_priv(padapter);/* (pmlmepriv); */ -+ return res; -+} -+ -+void rtw_free_mlme_priv(struct mlme_priv *pmlmepriv) -+{ -+ _rtw_free_mlme_priv(pmlmepriv); -+} -+ -+int rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork); -+int rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork) -+{ -+ int res; -+ res = _rtw_enqueue_network(queue, pnetwork); -+ return res; -+} -+ -+/* -+static struct wlan_network *rtw_dequeue_network(_queue *queue) -+{ -+ struct wlan_network *pnetwork; -+ pnetwork = _rtw_dequeue_network(queue); -+ return pnetwork; -+} -+*/ -+ -+struct wlan_network *rtw_alloc_network(struct mlme_priv *pmlmepriv); -+struct wlan_network *rtw_alloc_network(struct mlme_priv *pmlmepriv) /* (_queue *free_queue) */ -+{ -+ struct wlan_network *pnetwork; -+ pnetwork = _rtw_alloc_network(pmlmepriv); -+ return pnetwork; -+} -+ -+void rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 is_freeall); -+void rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 is_freeall)/* (struct wlan_network *pnetwork, _queue *free_queue) */ -+{ -+ _rtw_free_network(pmlmepriv, pnetwork, is_freeall); -+} -+ -+void rtw_free_network_nolock(_adapter *padapter, struct wlan_network *pnetwork); -+void rtw_free_network_nolock(_adapter *padapter, struct wlan_network *pnetwork) -+{ -+ _rtw_free_network_nolock(&(padapter->mlmepriv), pnetwork); -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_unlink_bss(padapter, pnetwork); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+} -+ -+ -+void rtw_free_network_queue(_adapter *dev, u8 isfreeall) -+{ -+ _rtw_free_network_queue(dev, isfreeall); -+} -+ -+struct wlan_network *_rtw_find_network(_queue *scanned_queue, const u8 *addr) -+{ -+ _list *phead, *plist; -+ struct wlan_network *pnetwork = NULL; -+ u8 zero_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; -+ -+ if (_rtw_memcmp(zero_addr, addr, ETH_ALEN)) { -+ pnetwork = NULL; -+ goto exit; -+ } -+ -+ phead = get_list_head(scanned_queue); -+ plist = get_next(phead); -+ -+ while (plist != phead) { -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network , list); -+ -+ if (_rtw_memcmp(addr, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE) -+ break; -+ -+ plist = get_next(plist); -+ } -+ -+ if (plist == phead) -+ pnetwork = NULL; -+ -+exit: -+ return pnetwork; -+} -+ -+struct wlan_network *rtw_find_network(_queue *scanned_queue, const u8 *addr) -+{ -+ struct wlan_network *pnetwork; -+ _irqL irqL; -+ -+ _enter_critical_bh(&scanned_queue->lock, &irqL); -+ pnetwork = _rtw_find_network(scanned_queue, addr); -+ _exit_critical_bh(&scanned_queue->lock, &irqL); -+ -+ return pnetwork; -+} -+ -+int rtw_is_same_ibss(_adapter *adapter, struct wlan_network *pnetwork) -+{ -+ int ret = _TRUE; -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ -+ if ((psecuritypriv->dot11PrivacyAlgrthm != _NO_PRIVACY_) && -+ (pnetwork->network.Privacy == 0)) -+ ret = _FALSE; -+ else if ((psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_) && -+ (pnetwork->network.Privacy == 1)) -+ ret = _FALSE; -+ else -+ ret = _TRUE; -+ -+ return ret; -+ -+} -+ -+inline int is_same_ess(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b) -+{ -+ return (a->Ssid.SsidLength == b->Ssid.SsidLength) -+ && _rtw_memcmp(a->Ssid.Ssid, b->Ssid.Ssid, a->Ssid.SsidLength) == _TRUE; -+} -+ -+int is_same_network(WLAN_BSSID_EX *src, WLAN_BSSID_EX *dst, u8 feature) -+{ -+ u16 s_cap, d_cap; -+ -+ -+ if (rtw_bug_check(dst, src, &s_cap, &d_cap) == _FALSE) -+ return _FALSE; -+ -+ _rtw_memcpy((u8 *)&s_cap, rtw_get_capability_from_ie(src->IEs), 2); -+ _rtw_memcpy((u8 *)&d_cap, rtw_get_capability_from_ie(dst->IEs), 2); -+ -+ -+ s_cap = le16_to_cpu(s_cap); -+ d_cap = le16_to_cpu(d_cap); -+ -+ -+#ifdef CONFIG_P2P -+ if ((feature == 1) && /* 1: P2P supported */ -+ (_rtw_memcmp(src->MacAddress, dst->MacAddress, ETH_ALEN) == _TRUE) -+ ) -+ return _TRUE; -+#endif -+ -+ /* Wi-Fi driver doesn't consider the situation of BCN and ProbRsp sent from the same hidden AP, -+ * it considers these two packets are sent from different AP. -+ * Therefore, the scan queue may store two scan results of the same hidden AP, likes below. -+ * -+ * index bssid ch RSSI SdBm Noise age flag ssid -+ * 1 00:e0:4c:55:50:01 153 -73 -73 0 7044 [WPS][ESS] RTK5G -+ * 3 00:e0:4c:55:50:01 153 -73 -73 0 7044 [WPS][ESS] -+ * -+ * Original rules will compare Ssid, SsidLength, MacAddress, s_cap, d_cap at the same time. -+ * Wi-Fi driver will assume that the BCN and ProbRsp sent from the same hidden AP are the same network -+ * after we add an additional rule to compare SsidLength and Ssid. -+ * It means the scan queue will not store two scan results of the same hidden AP, it only store ProbRsp. -+ * For customer request. -+ */ -+ -+ if (((_rtw_memcmp(src->MacAddress, dst->MacAddress, ETH_ALEN)) == _TRUE) && -+ ((s_cap & WLAN_CAPABILITY_IBSS) == (d_cap & WLAN_CAPABILITY_IBSS)) && -+ ((s_cap & WLAN_CAPABILITY_BSS) == (d_cap & WLAN_CAPABILITY_BSS))) { -+ if ((src->Ssid.SsidLength == dst->Ssid.SsidLength) && -+ (((_rtw_memcmp(src->Ssid.Ssid, dst->Ssid.Ssid, src->Ssid.SsidLength)) == _TRUE) || //Case of normal AP -+ (is_all_null(src->Ssid.Ssid, src->Ssid.SsidLength) == _TRUE || is_all_null(dst->Ssid.Ssid, dst->Ssid.SsidLength) == _TRUE))) //Case of hidden AP -+ return _TRUE; -+ else if ((src->Ssid.SsidLength == 0 || dst->Ssid.SsidLength == 0)) //Case of hidden AP -+ return _TRUE; -+ else -+ return _FALSE; -+ } else { -+ return _FALSE; -+ } -+} -+ -+struct wlan_network *_rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network) -+{ -+ _list *phead, *plist; -+ struct wlan_network *found = NULL; -+ -+ phead = get_list_head(scanned_queue); -+ plist = get_next(phead); -+ -+ while (plist != phead) { -+ found = LIST_CONTAINOR(plist, struct wlan_network , list); -+ -+ if (is_same_network(&network->network, &found->network, 0)) -+ break; -+ -+ plist = get_next(plist); -+ } -+ -+ if (plist == phead) -+ found = NULL; -+ -+ return found; -+} -+ -+struct wlan_network *rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network) -+{ -+ _irqL irqL; -+ struct wlan_network *found = NULL; -+ -+ if (scanned_queue == NULL || network == NULL) -+ goto exit; -+ -+ _enter_critical_bh(&scanned_queue->lock, &irqL); -+ found = _rtw_find_same_network(scanned_queue, network); -+ _exit_critical_bh(&scanned_queue->lock, &irqL); -+ -+exit: -+ return found; -+} -+ -+struct wlan_network *rtw_get_oldest_wlan_network(_queue *scanned_queue) -+{ -+ _list *plist, *phead; -+ -+ -+ struct wlan_network *pwlan = NULL; -+ struct wlan_network *oldest = NULL; -+ phead = get_list_head(scanned_queue); -+ -+ plist = get_next(phead); -+ -+ while (1) { -+ -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pwlan = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ if (pwlan->fixed != _TRUE) { -+ if (oldest == NULL || rtw_time_after(oldest->last_scanned, pwlan->last_scanned)) -+ oldest = pwlan; -+ } -+ -+ plist = get_next(plist); -+ } -+ return oldest; -+ -+} -+ -+void update_network(WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src, -+ _adapter *padapter, bool update_ie) -+{ -+#if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) && 1 -+ u8 ss_ori = dst->PhyInfo.SignalStrength; -+ u8 sq_ori = dst->PhyInfo.SignalQuality; -+ u8 ss_smp = src->PhyInfo.SignalStrength; -+ long rssi_smp = src->Rssi; -+#endif -+ long rssi_ori = dst->Rssi; -+ -+ u8 sq_smp = src->PhyInfo.SignalQuality; -+ u8 ss_final; -+ u8 sq_final; -+ long rssi_final; -+ -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ rtw_hal_antdiv_rssi_compared(padapter, dst, src); /* this will update src.Rssi, need consider again */ -+#endif -+ -+#if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) && 1 -+ if (strcmp(dst->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" %s("MAC_FMT", ch%u) ss_ori:%3u, sq_ori:%3u, rssi_ori:%3ld, ss_smp:%3u, sq_smp:%3u, rssi_smp:%3ld\n" -+ , FUNC_ADPT_ARG(padapter) -+ , src->Ssid.Ssid, MAC_ARG(src->MacAddress), src->Configuration.DSConfig -+ , ss_ori, sq_ori, rssi_ori -+ , ss_smp, sq_smp, rssi_smp -+ ); -+ } -+#endif -+ -+ /* The rule below is 1/5 for sample value, 4/5 for history value */ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) && is_same_network(&(padapter->mlmepriv.cur_network.network), src, 0)) { -+ /* Take the recvpriv's value for the connected AP*/ -+ ss_final = padapter->recvpriv.signal_strength; -+ sq_final = padapter->recvpriv.signal_qual; -+ /* the rssi value here is undecorated, and will be used for antenna diversity */ -+ if (sq_smp != 101) /* from the right channel */ -+ rssi_final = (src->Rssi + dst->Rssi * 4) / 5; -+ else -+ rssi_final = rssi_ori; -+ } else { -+ if (sq_smp != 101) { /* from the right channel */ -+ ss_final = ((u32)(src->PhyInfo.SignalStrength) + (u32)(dst->PhyInfo.SignalStrength) * 4) / 5; -+ sq_final = ((u32)(src->PhyInfo.SignalQuality) + (u32)(dst->PhyInfo.SignalQuality) * 4) / 5; -+ rssi_final = (src->Rssi + dst->Rssi * 4) / 5; -+ } else { -+ /* bss info not receving from the right channel, use the original RX signal infos */ -+ ss_final = dst->PhyInfo.SignalStrength; -+ sq_final = dst->PhyInfo.SignalQuality; -+ rssi_final = dst->Rssi; -+ } -+ -+ } -+ -+ if (update_ie) { -+ dst->Reserved[0] = src->Reserved[0]; -+ dst->Reserved[1] = src->Reserved[1]; -+ _rtw_memcpy((u8 *)dst, (u8 *)src, get_WLAN_BSSID_EX_sz(src)); -+ } -+ -+ dst->PhyInfo.SignalStrength = ss_final; -+ dst->PhyInfo.SignalQuality = sq_final; -+ dst->Rssi = rssi_final; -+ -+#if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) && 1 -+ if (strcmp(dst->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" %s("MAC_FMT"), SignalStrength:%u, SignalQuality:%u, RawRSSI:%ld\n" -+ , FUNC_ADPT_ARG(padapter) -+ , dst->Ssid.Ssid, MAC_ARG(dst->MacAddress), dst->PhyInfo.SignalStrength, dst->PhyInfo.SignalQuality, dst->Rssi); -+ } -+#endif -+ -+#if 0 /* old codes, may be useful one day... -+ * RTW_INFO("update_network: rssi=0x%lx dst->Rssi=%d ,dst->Rssi=0x%lx , src->Rssi=0x%lx",(dst->Rssi+src->Rssi)/2,dst->Rssi,dst->Rssi,src->Rssi); */ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) && is_same_network(&(padapter->mlmepriv.cur_network.network), src)) { -+ -+ /* RTW_INFO("b:ssid=%s update_network: src->rssi=0x%d padapter->recvpriv.ui_rssi=%d\n",src->Ssid.Ssid,src->Rssi,padapter->recvpriv.signal); */ -+ if (padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) { -+ padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; -+ last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; -+ padapter->recvpriv.signal_qual_data.total_val -= last_evm; -+ } -+ padapter->recvpriv.signal_qual_data.total_val += query_rx_pwr_percentage(src->Rssi); -+ -+ padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = query_rx_pwr_percentage(src->Rssi); -+ if (padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) -+ padapter->recvpriv.signal_qual_data.index = 0; -+ -+ /* RTW_INFO("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, src->Rssi); */ -+ -+ /* <1> Showed on UI for user,in percentage. */ -+ tmpVal = padapter->recvpriv.signal_qual_data.total_val / padapter->recvpriv.signal_qual_data.total_num; -+ padapter->recvpriv.signal = (u8)tmpVal; /* Link quality */ -+ -+ src->Rssi = translate_percentage_to_dbm(padapter->recvpriv.signal) ; -+ } else { -+ /* RTW_INFO("ELSE:ssid=%s update_network: src->rssi=0x%d dst->rssi=%d\n",src->Ssid.Ssid,src->Rssi,dst->Rssi); */ -+ src->Rssi = (src->Rssi + dst->Rssi) / 2; /* dBM */ -+ } -+ -+ /* RTW_INFO("a:update_network: src->rssi=0x%d padapter->recvpriv.ui_rssi=%d\n",src->Rssi,padapter->recvpriv.signal); */ -+ -+#endif -+ -+} -+ -+static void update_current_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork) -+{ -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ -+ -+ rtw_bug_check(&(pmlmepriv->cur_network.network), -+ &(pmlmepriv->cur_network.network), -+ &(pmlmepriv->cur_network.network), -+ &(pmlmepriv->cur_network.network)); -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) && (is_same_network(&(pmlmepriv->cur_network.network), pnetwork, 0))) { -+ -+ /* if(pmlmepriv->cur_network.network.IELength<= pnetwork->IELength) */ -+ { -+ update_network(&(pmlmepriv->cur_network.network), pnetwork, adapter, _TRUE); -+ rtw_update_protection(adapter, (pmlmepriv->cur_network.network.IEs) + sizeof(NDIS_802_11_FIXED_IEs), -+ pmlmepriv->cur_network.network.IELength); -+ } -+ } -+ -+ -+} -+ -+ -+/* -+ -+Caller must hold pmlmepriv->lock first. -+ -+ -+*/ -+bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ u32 bssid_ex_sz; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(adapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ struct wlan_network *choice = NULL; -+ int target_find = 0; -+ u8 feature = 0; -+ bool update_ie = _FALSE; -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+#if 0 -+ RTW_INFO("%s => ssid:%s , rssi:%ld , ss:%d\n", -+ __func__, target->Ssid.Ssid, target->Rssi, target->PhyInfo.SignalStrength); -+#endif -+ -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ feature = 1; /* p2p enable */ -+#endif -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ rtw_bug_check(pnetwork, pnetwork, pnetwork, pnetwork); -+ -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && -+ (_rtw_memcmp(pnetwork->network.MacAddress, target->MacAddress, ETH_ALEN) == _TRUE)) { -+ target_find = 1; -+ break; -+ } -+#endif -+ -+ if (is_same_network(&(pnetwork->network), target, feature)) { -+ target_find = 1; -+ break; -+ } -+ -+ if (rtw_roam_flags(adapter)) { -+ /* TODO: don't select netowrk in the same ess as choice if it's new enough*/ -+ } -+ if (pnetwork->fixed) { -+ plist = get_next(plist); -+ continue; -+ } -+ -+#ifdef CONFIG_RSSI_PRIORITY -+ if ((choice == NULL) || (pnetwork->network.PhyInfo.SignalStrength < choice->network.PhyInfo.SignalStrength)) -+ #ifdef CONFIG_RTW_MESH -+ if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter) -+ || !rtw_bss_is_same_mbss(&pmlmepriv->cur_network.network, &pnetwork->network)) -+ #endif -+ choice = pnetwork; -+#else -+ if (choice == NULL || rtw_time_after(choice->last_scanned, pnetwork->last_scanned)) -+ #ifdef CONFIG_RTW_MESH -+ if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter) -+ || !rtw_bss_is_same_mbss(&pmlmepriv->cur_network.network, &pnetwork->network)) -+ #endif -+ choice = pnetwork; -+#endif -+ plist = get_next(plist); -+ -+ } -+ -+ -+ /* If we didn't find a match, then get a new network slot to initialize -+ * with this beacon's information */ -+ /* if (rtw_end_of_queue_search(phead,plist)== _TRUE) { */ -+ if (!target_find) { -+ if (_rtw_queue_empty(&(pmlmepriv->free_bss_pool)) == _TRUE) { -+ /* If there are no more slots, expire the choice */ -+ /* list_del_init(&choice->list); */ -+ pnetwork = choice; -+ if (pnetwork == NULL) -+ goto unlock_scan_queue; -+ -+#ifdef CONFIG_RSSI_PRIORITY -+ RTW_DBG("%s => ssid:%s ,bssid:"MAC_FMT" will be deleted from scanned_queue (rssi:%ld , ss:%d)\n", -+ __func__, pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Rssi, pnetwork->network.PhyInfo.SignalStrength); -+#else -+ RTW_DBG("%s => ssid:%s ,bssid:"MAC_FMT" will be deleted from scanned_queue\n", -+ __func__, pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress)); -+#endif -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ rtw_hal_get_odm_var(adapter, HAL_ODM_ANTDIV_SELECT, &(target->PhyInfo.Optimum_antenna), NULL); -+#endif -+ _rtw_memcpy(&(pnetwork->network), target, get_WLAN_BSSID_EX_sz(target)); -+ pnetwork->bcn_keys_valid = 0; -+ if (target->Reserved[0] == BSS_TYPE_BCN || target->Reserved[0] == BSS_TYPE_PROB_RSP) -+ rtw_update_bcn_keys_of_network(pnetwork); -+ /* variable initialize */ -+ pnetwork->fixed = _FALSE; -+ pnetwork->last_scanned = rtw_get_current_time(); -+ pnetwork->last_non_hidden_ssid_ap = pnetwork->last_scanned; -+ #if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT -+ pnetwork->acnode_stime = 0; -+ pnetwork->acnode_notify_etime = 0; -+ #endif -+ -+ pnetwork->network_type = 0; -+ pnetwork->aid = 0; -+ pnetwork->join_res = 0; -+ -+ /* bss info not receving from the right channel */ -+ if (pnetwork->network.PhyInfo.SignalQuality == 101) -+ pnetwork->network.PhyInfo.SignalQuality = 0; -+ } else { -+ /* Otherwise just pull from the free list */ -+ -+ pnetwork = rtw_alloc_network(pmlmepriv); /* will update scan_time */ -+ if (pnetwork == NULL) -+ goto unlock_scan_queue; -+ -+ bssid_ex_sz = get_WLAN_BSSID_EX_sz(target); -+ target->Length = bssid_ex_sz; -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ rtw_hal_get_odm_var(adapter, HAL_ODM_ANTDIV_SELECT, &(target->PhyInfo.Optimum_antenna), NULL); -+#endif -+ _rtw_memcpy(&(pnetwork->network), target, bssid_ex_sz); -+ pnetwork->bcn_keys_valid = 0; -+ if (target->Reserved[0] == BSS_TYPE_BCN || target->Reserved[0] == BSS_TYPE_PROB_RSP) -+ rtw_update_bcn_keys_of_network(pnetwork); -+ -+ /* bss info not receving from the right channel */ -+ if (pnetwork->network.PhyInfo.SignalQuality == 101) -+ pnetwork->network.PhyInfo.SignalQuality = 0; -+ -+ rtw_list_insert_tail(&(pnetwork->list), &(queue->queue)); -+ -+ } -+ } else { -+ /* we have an entry and we are going to update it. But this entry may -+ * be already expired. In this case we do the same as we found a new -+ * net and call the new_net handler -+ */ -+ #if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT -+ systime last_scanned = pnetwork->last_scanned; -+ #endif -+ struct beacon_keys bcn_keys; -+ bool bcn_keys_valid = 0; -+ bool is_hidden_ssid_ap = 0; -+ -+ pnetwork->last_scanned = rtw_get_current_time(); -+ -+ if (target->Reserved[0] == BSS_TYPE_BCN || target->Reserved[0] == BSS_TYPE_PROB_RSP) { -+ if (target->InfrastructureMode == Ndis802_11Infrastructure) { -+ is_hidden_ssid_ap = hidden_ssid_ap(target); -+ if (!is_hidden_ssid_ap) /* update last time it's non hidden ssid AP */ -+ pnetwork->last_non_hidden_ssid_ap = rtw_get_current_time(); -+ } -+ bcn_keys_valid = rtw_get_bcn_keys_from_bss(target, &bcn_keys); -+ } -+ -+ if (target->InfrastructureMode == Ndis802_11_mesh -+ || target->Reserved[0] >= pnetwork->network.Reserved[0]) -+ update_ie = _TRUE; -+ else if (target->InfrastructureMode == Ndis802_11Infrastructure && !pnetwork->fixed -+ && rtw_get_passing_time_ms(pnetwork->last_non_hidden_ssid_ap) > SCANQUEUE_LIFETIME) -+ update_ie = _TRUE; -+ else if (bcn_keys_valid) { -+ if (is_hidden_ssid(bcn_keys.ssid, bcn_keys.ssid_len)) { -+ /* hidden ssid, replace with current beacon ssid directly */ -+ _rtw_memcpy(bcn_keys.ssid, pnetwork->bcn_keys.ssid, pnetwork->bcn_keys.ssid_len); -+ bcn_keys.ssid_len = pnetwork->bcn_keys.ssid_len; -+ } -+ if (rtw_bcn_key_compare(&pnetwork->bcn_keys, &bcn_keys) == _FALSE) -+ update_ie = _TRUE; -+ } -+ -+ #if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT -+ if (!MLME_IS_MESH(adapter) || !MLME_IS_ASOC(adapter) -+ || pnetwork->network.Configuration.DSConfig != target->Configuration.DSConfig -+ || rtw_get_passing_time_ms(last_scanned) > adapter->mesh_cfg.peer_sel_policy.scanr_exp_ms -+ || !rtw_bss_is_same_mbss(&pnetwork->network, target) -+ ) { -+ pnetwork->acnode_stime = 0; -+ pnetwork->acnode_notify_etime = 0; -+ } -+ #endif -+ -+ if (bcn_keys_valid) { -+ _rtw_memcpy(&pnetwork->bcn_keys, &bcn_keys, sizeof(bcn_keys)); -+ pnetwork->bcn_keys_valid = 1; -+ } else if (update_ie) -+ pnetwork->bcn_keys_valid = 0; -+ -+ update_network(&(pnetwork->network), target, adapter, update_ie); -+ } -+ -+ #if defined(CONFIG_RTW_MESH) && CONFIG_RTW_MESH_ACNODE_PREVENT -+ if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)) -+ rtw_mesh_update_scanned_acnode_status(adapter, pnetwork); -+ #endif -+ -+unlock_scan_queue: -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+#ifdef CONFIG_RTW_MESH -+ if (pnetwork && MLME_IS_MESH(adapter) -+ && check_fwstate(pmlmepriv, WIFI_ASOC_STATE) -+ && !check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) -+ ) -+ rtw_chk_candidate_peer_notify(adapter, pnetwork); -+#endif -+ -+ return update_ie; -+} -+ -+void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork); -+void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork) -+{ -+ bool update_ie; -+ /* _queue *queue = &(pmlmepriv->scanned_queue); */ -+ -+ /* _enter_critical_bh(&queue->lock, &irqL); */ -+ -+#if defined(CONFIG_P2P) && defined(CONFIG_P2P_REMOVE_GROUP_INFO) -+ if (adapter->registrypriv.wifi_spec == 0) -+ rtw_bss_ex_del_p2p_attr(pnetwork, P2P_ATTR_GROUP_INFO); -+#endif -+ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) -+ rtw_bss_ex_del_wfd_ie(pnetwork); -+ /* Wi-Fi driver will update the current network if the scan result of the connected AP be updated by scan. */ -+ update_ie = rtw_update_scanned_network(adapter, pnetwork); -+ -+ if (update_ie) -+ update_current_network(adapter, pnetwork); -+ -+ /* _exit_critical_bh(&queue->lock, &irqL); */ -+ -+} -+ -+#ifdef CONFIG_RTW_MULTI_AP -+void rtw_unassoc_sta_set_mode(_adapter *adapter, u8 stype, u8 mode) -+{ -+ if (stype >= UNASOC_STA_SRC_NUM -+ || mode >= UNASOC_STA_MODE_NUM) -+ return; -+ -+ adapter = GET_PRIMARY_ADAPTER(adapter); -+ -+ if (adapter->mlmepriv.unassoc_sta_mode_of_stype[stype] == mode) -+ return; -+ -+ adapter->mlmepriv.unassoc_sta_mode_of_stype[stype] = mode; -+ -+ rtw_run_in_thread_cmd_wait(adapter, ((void *)(rtw_hal_rcr_set_chk_bssid_act_non)), adapter, 2000); -+} -+ -+bool rtw_unassoc_sta_src_chk(_adapter *adapter, u8 stype) -+{ -+ if (stype >= UNASOC_STA_SRC_NUM) -+ return 0; -+ -+ adapter = GET_PRIMARY_ADAPTER(adapter); -+ -+ return adapter->mlmepriv.unassoc_sta_mode_of_stype[stype] == UNASOC_STA_MODE_ALL -+ || (adapter->mlmepriv.unassoc_sta_mode_of_stype[stype] == UNASOC_STA_MODE_INTERESTED -+ && adapter->mlmepriv.interested_unassoc_sta_cnt) -+ ; -+} -+ -+const char *unasoc_sta_src_str[] = { -+ "BMC", -+ "NMY_UC", -+}; -+ -+const char *unasoc_sta_mode_str[] = { -+ "DISABLED", -+ "INTERESTED", -+ "ALL", -+}; -+ -+void dump_unassoc_sta(void *sel, _adapter *adapter) -+{ -+ struct mlme_priv *mlmepriv; -+ _queue *queue; -+ _list *list, *head; -+ struct unassoc_sta_info **unassoc_sta_arr; -+ struct unassoc_sta_info *unassoc_sta; -+ u16 i, unassoc_sta_cnt = 0; -+ -+ adapter = GET_PRIMARY_ADAPTER(adapter); -+ mlmepriv = &(adapter->mlmepriv); -+ queue = &(mlmepriv->unassoc_sta_queue); -+ -+ for (i = 0; i < UNASOC_STA_SRC_NUM; i++) { -+ RTW_PRINT_SEL(sel, "[%u]%-6s:%u(%s)\n", i, unasoc_sta_src_str[i] -+ , mlmepriv->unassoc_sta_mode_of_stype[i], unasoc_sta_mode_str[mlmepriv->unassoc_sta_mode_of_stype[i]]); -+ } -+ RTW_PRINT_SEL(sel, "interested_unassoc_sta_cnt:%u\n", mlmepriv->interested_unassoc_sta_cnt); -+ -+ unassoc_sta_arr = rtw_zvmalloc(mlmepriv->max_unassoc_sta_cnt * sizeof(struct unassoc_sta_info *)); -+ if (!unassoc_sta_arr) -+ return; -+ -+ enter_critical_bh(&queue->lock); -+ head = get_list_head(queue); -+ list = get_next(head); -+ -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ unassoc_sta = LIST_CONTAINOR(list, struct unassoc_sta_info, list); -+ list = get_next(list); -+ -+ unassoc_sta_arr[unassoc_sta_cnt++] = unassoc_sta; -+ } -+ -+ exit_critical_bh(&queue->lock); -+ -+ RTW_PRINT_SEL(sel, " %17s %18s %6s\n", "mac_addr", "measure_delta_time", "rssi"); -+ -+ for (i = 0; i < unassoc_sta_cnt; i++) { -+ u8 rcpi; -+ s8 rx_power; -+ u32 measure_delta_time; -+ -+ unassoc_sta = unassoc_sta_arr[i]; -+ -+ measure_delta_time = rtw_systime_to_ms(rtw_get_current_time() - unassoc_sta->time); -+ -+ RTW_PRINT_SEL(sel, "%c "MAC_FMT" %18u %6d\n" -+ , unassoc_sta->interested ? '*' : ' ' -+ , MAC_ARG(unassoc_sta->addr), measure_delta_time, unassoc_sta->recv_signal_power); -+ } -+ -+ rtw_vmfree(unassoc_sta_arr, mlmepriv->max_unassoc_sta_cnt * sizeof(struct unassoc_sta_info *)); -+} -+ -+static void del_unassoc_sta(struct mlme_priv *mlmepriv, struct unassoc_sta_info *unassoc_sta) -+{ -+ _irqL irqL; -+ _queue *free_queue = &(mlmepriv->free_unassoc_sta_queue); -+ -+ if (unassoc_sta->interested) -+ mlmepriv->interested_unassoc_sta_cnt--; -+ if (mlmepriv->interested_unassoc_sta_cnt == 0) { -+ rtw_run_in_thread_cmd(mlme_to_adapter(mlmepriv) -+ , ((void *)(rtw_hal_rcr_set_chk_bssid_act_non)), mlme_to_adapter(mlmepriv)); -+ } -+ -+ _enter_critical_bh(&free_queue->lock, &irqL); -+ rtw_list_delete(&(unassoc_sta->list)); -+ rtw_list_insert_tail(&(unassoc_sta->list), &(free_queue->queue)); -+ _exit_critical_bh(&free_queue->lock, &irqL); -+} -+ -+static u8 del_unassoc_sta_chk(struct mlme_priv *mlmepriv, struct unassoc_sta_info *unassoc_sta) -+{ -+ systime cur, lifetime; -+ -+ if (unassoc_sta == NULL) -+ return UNASOC_STA_DEL_CHK_SKIP; -+ -+ if (unassoc_sta->interested) -+ return UNASOC_STA_DEL_CHK_SKIP; -+ -+ cur = rtw_get_current_time(); -+ lifetime = unassoc_sta->time + rtw_ms_to_systime(UNASSOC_STA_LIFETIME_MS); -+ if (rtw_time_before(cur, lifetime)) -+ return UNASOC_STA_DEL_CHK_ALIVE; -+ -+ del_unassoc_sta(mlmepriv, unassoc_sta); -+ -+ return UNASOC_STA_DEL_CHK_DELETED; -+} -+ -+static struct unassoc_sta_info *alloc_unassoc_sta(struct mlme_priv *mlmepriv) -+{ -+ _irqL irqL; -+ struct unassoc_sta_info *unassoc_sta; -+ _queue *free_queue = &mlmepriv->free_unassoc_sta_queue; -+ _list *list = NULL; -+ -+ -+ _enter_critical_bh(&free_queue->lock, &irqL); -+ -+ if (_rtw_queue_empty(free_queue) == _TRUE) { -+ unassoc_sta = NULL; -+ goto exit; -+ } -+ list = get_next(&(free_queue->queue)); -+ -+ unassoc_sta = LIST_CONTAINOR(list, struct unassoc_sta_info, list); -+ -+ rtw_list_delete(&unassoc_sta->list); -+ -+ _rtw_memset(unassoc_sta->addr, 0, ETH_ALEN); -+ unassoc_sta->recv_signal_power = 0; -+ unassoc_sta->time = 0; -+ unassoc_sta->interested = 0; -+exit: -+ _exit_critical_bh(&free_queue->lock, &irqL); -+ -+ return unassoc_sta; -+ -+} -+ -+void rtw_del_unassoc_sta_queue(_adapter *adapter) -+{ -+ struct unassoc_sta_info *unassoc_sta; -+ struct mlme_priv *mlmepriv; -+ _queue *queue; -+ _irqL irqL; -+ _list *head, *list; -+ -+ adapter = GET_PRIMARY_ADAPTER(adapter); -+ mlmepriv = &(adapter->mlmepriv); -+ queue = &(mlmepriv->unassoc_sta_queue); -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ head = get_list_head(queue); -+ list = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ unassoc_sta = LIST_CONTAINOR(list , struct unassoc_sta_info, list); -+ list = get_next(list); -+ -+ del_unassoc_sta(mlmepriv, unassoc_sta); -+ } -+ -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+} -+ -+void rtw_del_unassoc_sta(_adapter *adapter, u8 *addr) -+{ -+ struct unassoc_sta_info *unassoc_sta; -+ struct mlme_priv *mlmepriv; -+ _queue *queue; -+ _irqL irqL; -+ _list *head, *list; -+ -+ adapter = GET_PRIMARY_ADAPTER(adapter); -+ mlmepriv = &(adapter->mlmepriv); -+ queue = &(mlmepriv->unassoc_sta_queue); -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ head = get_list_head(queue); -+ list = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ unassoc_sta = LIST_CONTAINOR(list , struct unassoc_sta_info, list); -+ list = get_next(list); -+ -+ if (_rtw_memcmp(addr, unassoc_sta->addr, ETH_ALEN) == _TRUE) { -+ del_unassoc_sta(mlmepriv, unassoc_sta); -+ goto unlock_unassoc_sta_queue; -+ } -+ } -+ -+unlock_unassoc_sta_queue: -+ _exit_critical_bh(&queue->lock, &irqL); -+} -+ -+void rtw_rx_add_unassoc_sta(_adapter *adapter, u8 stype, u8 *addr, s8 recv_signal_power) -+{ -+ struct unassoc_sta_info *unassoc_sta; -+ struct unassoc_sta_info *oldest_unassoc_sta = NULL; -+ struct mlme_priv *mlmepriv; -+ _queue *queue; -+ _irqL irqL; -+ _list *head, *list; -+ -+ adapter = GET_PRIMARY_ADAPTER(adapter); -+ mlmepriv = &(adapter->mlmepriv); -+ queue = &(mlmepriv->unassoc_sta_queue); -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ head = get_list_head(queue); -+ list = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ unassoc_sta = LIST_CONTAINOR(list , struct unassoc_sta_info, list); -+ list = get_next(list); -+ -+ if (_rtw_memcmp(addr, unassoc_sta->addr, ETH_ALEN) == _TRUE) { -+ if (unassoc_sta->interested -+ || mlmepriv->unassoc_sta_mode_of_stype[stype] >= UNASOC_STA_MODE_ALL -+ ) { -+ unassoc_sta->recv_signal_power = recv_signal_power; -+ unassoc_sta->time = rtw_get_current_time(); -+ goto unlock_unassoc_sta_queue; -+ } -+ } -+ -+ if (del_unassoc_sta_chk(mlmepriv, unassoc_sta) == UNASOC_STA_DEL_CHK_ALIVE) { -+ if (oldest_unassoc_sta == NULL) -+ oldest_unassoc_sta = unassoc_sta; -+ else if (rtw_time_before(unassoc_sta->time, oldest_unassoc_sta->time)) -+ oldest_unassoc_sta = unassoc_sta; -+ } -+ } -+ -+ if (mlmepriv->unassoc_sta_mode_of_stype[stype] <= UNASOC_STA_MODE_INTERESTED) -+ goto unlock_unassoc_sta_queue; -+ -+ unassoc_sta = alloc_unassoc_sta(mlmepriv); -+ if (unassoc_sta == NULL) { -+ if (oldest_unassoc_sta) { -+ del_unassoc_sta(mlmepriv, oldest_unassoc_sta); -+ unassoc_sta = alloc_unassoc_sta(mlmepriv); -+ } else -+ goto unlock_unassoc_sta_queue; -+ } -+ _rtw_memcpy(unassoc_sta->addr, addr, ETH_ALEN); -+ unassoc_sta->recv_signal_power = recv_signal_power; -+ unassoc_sta->time = rtw_get_current_time(); -+ rtw_list_insert_tail(&(unassoc_sta->list), &(queue->queue)); -+ -+unlock_unassoc_sta_queue: -+ _exit_critical_bh(&queue->lock, &irqL); -+} -+ -+void rtw_add_interested_unassoc_sta(_adapter *adapter, u8 *addr) -+{ -+ struct unassoc_sta_info *unassoc_sta; -+ struct unassoc_sta_info *oldest_unassoc_sta = NULL; -+ struct mlme_priv *mlmepriv; -+ _queue *queue; -+ _irqL irqL; -+ _list *head, *list; -+ -+ adapter = GET_PRIMARY_ADAPTER(adapter); -+ mlmepriv = &(adapter->mlmepriv); -+ queue = &(mlmepriv->unassoc_sta_queue); -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ head = get_list_head(queue); -+ list = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ unassoc_sta = LIST_CONTAINOR(list , struct unassoc_sta_info, list); -+ list = get_next(list); -+ -+ if (_rtw_memcmp(addr, unassoc_sta->addr, ETH_ALEN) == _TRUE) { -+ if (!unassoc_sta->interested) { -+ unassoc_sta->interested = 1; -+ mlmepriv->interested_unassoc_sta_cnt++; -+ if (mlmepriv->interested_unassoc_sta_cnt == 1) { -+ rtw_run_in_thread_cmd(mlme_to_adapter(mlmepriv) -+ , ((void *)(rtw_hal_rcr_set_chk_bssid_act_non)), mlme_to_adapter(mlmepriv)); -+ } -+ } -+ goto unlock_unassoc_sta_queue; -+ } -+ -+ if (del_unassoc_sta_chk(mlmepriv, unassoc_sta) == UNASOC_STA_DEL_CHK_ALIVE) { -+ if (oldest_unassoc_sta == NULL) -+ oldest_unassoc_sta = unassoc_sta; -+ else if (rtw_time_after(unassoc_sta->time, oldest_unassoc_sta->time)) -+ oldest_unassoc_sta = unassoc_sta; -+ } -+ } -+ unassoc_sta = alloc_unassoc_sta(mlmepriv); -+ if (unassoc_sta == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT": Allocate fail\n", FUNC_ADPT_ARG(adapter)); -+ if (oldest_unassoc_sta) { -+ RTW_INFO(FUNC_ADPT_FMT": Delete oldest entry and try again.\n", FUNC_ADPT_ARG(adapter)); -+ del_unassoc_sta(mlmepriv, oldest_unassoc_sta); -+ unassoc_sta = alloc_unassoc_sta(mlmepriv); -+ } else -+ goto unlock_unassoc_sta_queue; -+ } -+ _rtw_memcpy(unassoc_sta->addr, addr, ETH_ALEN); -+ unassoc_sta->interested = 1; -+ unassoc_sta->recv_signal_power = 0; -+ unassoc_sta->time = rtw_get_current_time() - rtw_ms_to_systime(UNASSOC_STA_LIFETIME_MS); -+ rtw_list_insert_tail(&(unassoc_sta->list), &(queue->queue)); -+ mlmepriv->interested_unassoc_sta_cnt++; -+ if (mlmepriv->interested_unassoc_sta_cnt == 1) { -+ rtw_run_in_thread_cmd(mlme_to_adapter(mlmepriv) -+ , ((void *)(rtw_hal_rcr_set_chk_bssid_act_non)), mlme_to_adapter(mlmepriv)); -+ } -+ -+unlock_unassoc_sta_queue: -+ _exit_critical_bh(&queue->lock, &irqL); -+} -+ -+void rtw_undo_interested_unassoc_sta(_adapter *adapter, u8 *addr) -+{ -+ struct unassoc_sta_info *unassoc_sta; -+ struct mlme_priv *mlmepriv; -+ _queue *queue; -+ _irqL irqL; -+ _list *head, *list; -+ -+ adapter = GET_PRIMARY_ADAPTER(adapter); -+ mlmepriv = &(adapter->mlmepriv); -+ queue = &(mlmepriv->unassoc_sta_queue); -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ head = get_list_head(queue); -+ list = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ unassoc_sta = LIST_CONTAINOR(list , struct unassoc_sta_info, list); -+ list = get_next(list); -+ -+ if (_rtw_memcmp(addr, unassoc_sta->addr, ETH_ALEN) == _TRUE) { -+ if (unassoc_sta->interested) { -+ unassoc_sta->interested = 0; -+ mlmepriv->interested_unassoc_sta_cnt--; -+ if (mlmepriv->interested_unassoc_sta_cnt == 0) { -+ rtw_run_in_thread_cmd(mlme_to_adapter(mlmepriv) -+ , ((void *)(rtw_hal_rcr_set_chk_bssid_act_non)), mlme_to_adapter(mlmepriv)); -+ } -+ } -+ goto unlock_unassoc_sta_queue; -+ } -+ } -+unlock_unassoc_sta_queue: -+ _exit_critical_bh(&queue->lock, &irqL); -+} -+ -+void rtw_undo_all_interested_unassoc_sta(_adapter *adapter) -+{ -+ struct unassoc_sta_info *unassoc_sta; -+ struct mlme_priv *mlmepriv; -+ _queue *queue; -+ _irqL irqL; -+ _list *head, *list; -+ -+ adapter = GET_PRIMARY_ADAPTER(adapter); -+ mlmepriv = &(adapter->mlmepriv); -+ queue = &(mlmepriv->unassoc_sta_queue); -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ head = get_list_head(queue); -+ list = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ unassoc_sta = LIST_CONTAINOR(list , struct unassoc_sta_info, list); -+ list = get_next(list); -+ -+ if (unassoc_sta->interested) { -+ unassoc_sta->interested = 0; -+ mlmepriv->interested_unassoc_sta_cnt--; -+ if (mlmepriv->interested_unassoc_sta_cnt == 0) { -+ rtw_run_in_thread_cmd(mlme_to_adapter(mlmepriv) -+ , ((void *)(rtw_hal_rcr_set_chk_bssid_act_non)), mlme_to_adapter(mlmepriv)); -+ goto unlock_unassoc_sta_queue; -+ } -+ } -+ } -+unlock_unassoc_sta_queue: -+ _exit_critical_bh(&queue->lock, &irqL); -+} -+ -+u8 rtw_search_unassoc_sta(_adapter *adapter, u8 *addr, struct unassoc_sta_info *ret_sta) -+{ -+ struct unassoc_sta_info *unassoc_sta = NULL; -+ struct mlme_priv *mlmepriv; -+ _queue *queue; -+ _irqL irqL; -+ _list *head, *list; -+ u8 searched = 0; -+ -+ adapter = GET_PRIMARY_ADAPTER(adapter); -+ mlmepriv = &(adapter->mlmepriv); -+ queue = &(mlmepriv->unassoc_sta_queue); -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ head = get_list_head(queue); -+ list = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ unassoc_sta = LIST_CONTAINOR(list , struct unassoc_sta_info, list); -+ list = get_next(list); -+ -+ if (_rtw_memcmp(addr, unassoc_sta->addr, ETH_ALEN) == _TRUE) { -+ memcpy(ret_sta, unassoc_sta, sizeof(struct unassoc_sta_info)); -+ searched = 1; -+ break; -+ } -+ } -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+ return searched; -+} -+#endif /* CONFIG_RTW_MULTI_AP */ -+ -+/* select the desired network based on the capability of the (i)bss. -+ * check items: (1) security -+ * (2) network_type -+ * (3) WMM -+ * (4) HT -+ * (5) others */ -+int rtw_is_desired_network(_adapter *adapter, struct wlan_network *pnetwork); -+int rtw_is_desired_network(_adapter *adapter, struct wlan_network *pnetwork) -+{ -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ u32 desired_encmode; -+ u32 privacy; -+ -+ /* u8 wps_ie[512]; */ -+ uint wps_ielen; -+ -+ int bselected = _TRUE; -+ -+ desired_encmode = psecuritypriv->ndisencryptstatus; -+ privacy = pnetwork->network.Privacy; -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { -+ if (rtw_get_wps_ie(pnetwork->network.IEs + _FIXED_IE_LENGTH_, pnetwork->network.IELength - _FIXED_IE_LENGTH_, NULL, &wps_ielen) != NULL) -+ return _TRUE; -+ else -+ return _FALSE; -+ } -+ if (adapter->registrypriv.wifi_spec == 1) { /* for correct flow of 8021X to do.... */ -+ u8 *p = NULL; -+ uint ie_len = 0; -+ -+ if ((desired_encmode == Ndis802_11EncryptionDisabled) && (privacy != 0)) -+ bselected = _FALSE; -+ -+ if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) { -+ p = rtw_get_ie(pnetwork->network.IEs + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pnetwork->network.IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) -+ bselected = _TRUE; -+ else -+ bselected = _FALSE; -+ } -+ } -+ -+ -+ if ((desired_encmode != Ndis802_11EncryptionDisabled) && (privacy == 0)) { -+ RTW_INFO("desired_encmode: %d, privacy: %d\n", desired_encmode, privacy); -+ bselected = _FALSE; -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) { -+ if (pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode) -+ bselected = _FALSE; -+ } -+ -+#ifdef CONFIG_RTW_MBO -+ if (rtw_mbo_disallowed_network(pnetwork) == _TRUE) -+ bselected = _FALSE; -+#endif -+ -+ return bselected; -+} -+ -+#ifdef CONFIG_80211D -+static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ struct registry_priv *pregistrypriv; -+ struct mlme_ext_priv *pmlmeext; -+ RT_CHANNEL_INFO *chplan_new; -+ u8 channel; -+ u8 i; -+ -+ -+ pregistrypriv = &padapter->registrypriv; -+ pmlmeext = &padapter->mlmeextpriv; -+ -+ /* Adjust channel plan by AP Country IE */ -+ if (pregistrypriv->enable80211d -+ && (!pmlmeext->update_channel_plan_by_ap_done)) { -+ u8 *ie, *p; -+ u32 len; -+ RT_CHANNEL_PLAN chplan_ap; -+ RT_CHANNEL_INFO *chplan_sta = NULL; -+ u8 country[4]; -+ u8 fcn; /* first channel number */ -+ u8 noc; /* number of channel */ -+ u8 j, k; -+ -+ ie = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _COUNTRY_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); -+ if (!ie) -+ return; -+ if (len < 6) -+ return; -+ -+ ie += 2; -+ p = ie; -+ ie += len; -+ -+ _rtw_memset(country, 0, 4); -+ _rtw_memcpy(country, p, 3); -+ p += 3; -+ RTW_INFO("%s: 802.11d country=%s\n", __FUNCTION__, country); -+ -+ i = 0; -+ while ((ie - p) >= 3) { -+ fcn = *(p++); -+ noc = *(p++); -+ p++; -+ -+ for (j = 0; j < noc; j++) { -+ if (fcn <= 14) -+ channel = fcn + j; /* 2.4 GHz */ -+ else -+ channel = fcn + j * 4; /* 5 GHz */ -+ -+ chplan_ap.Channel[i++] = channel; -+ } -+ } -+ chplan_ap.Len = i; -+ -+#ifdef CONFIG_RTW_DEBUG -+ i = 0; -+ RTW_INFO("%s: AP[%s] channel plan {", __FUNCTION__, bssid->Ssid.Ssid); -+ while ((i < chplan_ap.Len) && (chplan_ap.Channel[i] != 0)) { -+ _RTW_INFO("%02d,", chplan_ap.Channel[i]); -+ i++; -+ } -+ _RTW_INFO("}\n"); -+#endif -+ -+ chplan_sta = rtw_malloc(sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM); -+ if (!chplan_sta) -+ goto done_update_chplan_from_ap; -+ -+ _rtw_memcpy(chplan_sta, rfctl->channel_set, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM); -+#ifdef CONFIG_RTW_DEBUG -+ i = 0; -+ RTW_INFO("%s: STA channel plan {", __FUNCTION__); -+ while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) { -+ _RTW_INFO("%02d(%c),", chplan_sta[i].ChannelNum, chplan_sta[i].flags & RTW_CHF_NO_IR ? 'p' : 'a'); -+ i++; -+ } -+ _RTW_INFO("}\n"); -+#endif -+ -+ _rtw_memset(rfctl->channel_set, 0, sizeof(rfctl->channel_set)); -+ chplan_new = rfctl->channel_set; -+ -+ i = j = k = 0; -+ if (pregistrypriv->wireless_mode & WIRELESS_11G) { -+ do { -+ if ((i == MAX_CHANNEL_NUM) -+ || (chplan_sta[i].ChannelNum == 0) -+ || (chplan_sta[i].ChannelNum > 14)) -+ break; -+ -+ if ((j == chplan_ap.Len) || (chplan_ap.Channel[j] > 14)) -+ break; -+ -+ if (chplan_sta[i].ChannelNum == chplan_ap.Channel[j]) { -+ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; -+ i++; -+ j++; -+ k++; -+ } else if (chplan_sta[i].ChannelNum < chplan_ap.Channel[j]) { -+ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; -+#if 0 -+ if (chplan_sta[i].flags & RTW_CHF_NO_IR) -+ chplan_new[k].flags |= RTW_CHF_NO_IR; -+#else -+ chplan_new[k].flags |= RTW_CHF_NO_IR; -+#endif -+ i++; -+ k++; -+ } else if (chplan_sta[i].ChannelNum > chplan_ap.Channel[j]) { -+ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; -+ j++; -+ k++; -+ } -+ } while (1); -+ -+ /* change AP not support channel to Passive scan */ -+ while ((i < MAX_CHANNEL_NUM) -+ && (chplan_sta[i].ChannelNum != 0) -+ && (chplan_sta[i].ChannelNum <= 14)) { -+ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; -+#if 0 -+ if (chplan_sta[i].flags & RTW_CHF_NO_IR) -+ chplan_new[k].flags |= RTW_CHF_NO_IR; -+#else -+ chplan_new[k].flags |= RTW_CHF_NO_IR; -+#endif -+ i++; -+ k++; -+ } -+ -+ /* add channel AP supported */ -+ while ((j < chplan_ap.Len) && (chplan_ap.Channel[j] <= 14)) { -+ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; -+ j++; -+ k++; -+ } -+ } else { -+ /* keep original STA 2.4G channel plan */ -+ while ((i < MAX_CHANNEL_NUM) -+ && (chplan_sta[i].ChannelNum != 0) -+ && (chplan_sta[i].ChannelNum <= 14)) { -+ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; -+ if (chplan_sta[i].flags & RTW_CHF_NO_IR) -+ chplan_new[k].flags |= RTW_CHF_NO_IR; -+ i++; -+ k++; -+ } -+ -+ /* skip AP 2.4G channel plan */ -+ while ((j < chplan_ap.Len) && (chplan_ap.Channel[j] <= 14)) -+ j++; -+ } -+ -+ if (pregistrypriv->wireless_mode & WIRELESS_11A) { -+ do { -+ if ((i >= MAX_CHANNEL_NUM) -+ || (chplan_sta[i].ChannelNum == 0)) -+ break; -+ -+ if ((j == chplan_ap.Len) || (chplan_ap.Channel[j] == 0)) -+ break; -+ -+ if (chplan_sta[i].ChannelNum == chplan_ap.Channel[j]) { -+ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; -+ i++; -+ j++; -+ k++; -+ } else if (chplan_sta[i].ChannelNum < chplan_ap.Channel[j]) { -+ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; -+#if 0 -+ if (chplan_sta[i].flags & RTW_CHF_NO_IR) -+ chplan_new[k].flags |= RTW_CHF_NO_IR; -+#else -+ chplan_new[k].flags |= RTW_CHF_NO_IR; -+#endif -+ i++; -+ k++; -+ } else if (chplan_sta[i].ChannelNum > chplan_ap.Channel[j]) { -+ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; -+ j++; -+ k++; -+ } -+ } while (1); -+ -+ /* change AP not support channel to Passive scan */ -+ while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) { -+ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; -+#if 0 -+ if (chplan_sta[i].flags & RTW_CHF_NO_IR) -+ chplan_new[k].flags |= RTW_CHF_NO_IR; -+#else -+ chplan_new[k].flags |= RTW_CHF_NO_IR; -+#endif -+ i++; -+ k++; -+ } -+ -+ /* add channel AP supported */ -+ while ((j < chplan_ap.Len) && (chplan_ap.Channel[j] != 0)) { -+ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; -+ j++; -+ k++; -+ } -+ } else { -+ /* keep original STA 5G channel plan */ -+ while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) { -+ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; -+ if (chplan_sta[i].flags & RTW_CHF_NO_IR) -+ chplan_new[k].flags |= RTW_CHF_NO_IR; -+ i++; -+ k++; -+ } -+ } -+ -+ pmlmeext->update_channel_plan_by_ap_done = 1; -+ rtw_nlrtw_reg_change_event(padapter); -+ -+#ifdef CONFIG_RTW_DEBUG -+ k = 0; -+ RTW_INFO("%s: new STA channel plan {", __FUNCTION__); -+ while ((k < MAX_CHANNEL_NUM) && (chplan_new[k].ChannelNum != 0)) { -+ _RTW_INFO("%02d(%c),", chplan_new[k].ChannelNum, chplan_new[k].flags & RTW_CHF_NO_IR ? 'p' : 'c'); -+ k++; -+ } -+ _RTW_INFO("}\n"); -+#endif -+ -+#if 0 -+ /* recover the right channel index */ -+ channel = chplan_sta[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; -+ k = 0; -+ while ((k < MAX_CHANNEL_NUM) && (chplan_new[k].ChannelNum != 0)) { -+ if (chplan_new[k].ChannelNum == channel) { -+ RTW_INFO("%s: change mlme_ext sitesurvey channel index from %d to %d\n", -+ __FUNCTION__, pmlmeext->sitesurvey_res.channel_idx, k); -+ pmlmeext->sitesurvey_res.channel_idx = k; -+ break; -+ } -+ k++; -+ } -+#endif -+ -+done_update_chplan_from_ap: -+ if (chplan_sta) -+ rtw_mfree(chplan_sta, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM); -+ } -+} -+#endif -+ -+void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf) -+{ -+ _irqL irqL; -+ u32 len; -+ u8 val8; -+ WLAN_BSSID_EX *pnetwork; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ -+ pnetwork = (WLAN_BSSID_EX *)pbuf; -+ -+ len = get_WLAN_BSSID_EX_sz(pnetwork); -+ if (len > (sizeof(WLAN_BSSID_EX))) { -+ return; -+ } -+ -+#ifdef CONFIG_RTW_80211K -+ val8 = 0; -+ rtw_hal_get_hwreg(adapter, HW_VAR_FREECNT, &val8); -+ -+ /* use TSF if no free run counter */ -+ if (val8==0) -+ pnetwork->PhyInfo.free_cnt = (u32)rtw_hal_get_tsftr_by_port( -+ adapter, rtw_hal_get_port(adapter)); -+#endif -+ -+ if (pnetwork->InfrastructureMode == Ndis802_11Infrastructure) { -+ #ifdef CONFIG_80211D -+ process_80211d(adapter, pnetwork); -+ #endif -+ if (MLME_IS_SCAN(adapter)) { -+ adapter->mlmeextpriv.sitesurvey_res.activate_ch_cnt -+ += rtw_process_beacon_hint(adapter, pnetwork); -+ } -+ } -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ /* update IBSS_network 's timestamp */ -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE) { -+ if (_rtw_memcmp(&(pmlmepriv->cur_network.network.MacAddress), pnetwork->MacAddress, ETH_ALEN)) { -+ struct wlan_network *ibss_wlan = NULL; -+ _irqL irqL; -+ -+ _rtw_memcpy(pmlmepriv->cur_network.network.IEs, pnetwork->IEs, 8); -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ ibss_wlan = _rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->MacAddress); -+ if (ibss_wlan) { -+ _rtw_memcpy(ibss_wlan->network.IEs , pnetwork->IEs, 8); -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ goto exit; -+ } -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ } -+ } -+ -+ /* lock pmlmepriv->lock when you accessing network_q */ -+ if ((check_fwstate(pmlmepriv, WIFI_UNDER_LINKING)) == _FALSE) { -+ if (pnetwork->Ssid.Ssid[0] == 0) -+ pnetwork->Ssid.SsidLength = 0; -+ rtw_add_network(adapter, pnetwork); -+ } -+ -+exit: -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ -+ return; -+} -+ -+void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf) -+{ -+ _irqL irqL; -+ struct surveydone_event *parm = (struct surveydone_event *)pbuf; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ -+#ifdef CONFIG_MLME_EXT -+ mlmeext_surveydone_event_callback(adapter); -+#endif -+ -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ if (pmlmepriv->wps_probe_req_ie) { -+ u32 free_len = pmlmepriv->wps_probe_req_ie_len; -+ pmlmepriv->wps_probe_req_ie_len = 0; -+ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); -+ pmlmepriv->wps_probe_req_ie = NULL; -+ } -+ -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _FALSE) { -+ RTW_INFO(FUNC_ADPT_FMT" fw_state:0x%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv)); -+ /* rtw_warn_on(1); */ -+ } -+ -+ if (pmlmeext->scan_abort == _TRUE) -+ pmlmeext->scan_abort = _FALSE; -+ -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_SURVEY); -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ _cancel_timer_ex(&pmlmepriv->scan_to_timer); -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ rtw_set_signal_stat_timer(&adapter->recvpriv); -+#endif -+ -+ if (pmlmepriv->to_join == _TRUE) { -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) { -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { -+ set_fwstate(pmlmepriv, WIFI_UNDER_LINKING); -+ -+ if (rtw_select_and_join_from_scanned_queue(pmlmepriv) == _SUCCESS) -+ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); -+ #ifdef CONFIG_AP_MODE -+ else { -+ WLAN_BSSID_EX *pdev_network = &(adapter->registrypriv.dev_network); -+ u8 *pibss = adapter->registrypriv.dev_network.MacAddress; -+ -+ /* pmlmepriv->fw_state ^= WIFI_UNDER_SURVEY; */ /* because don't set assoc_timer */ -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_SURVEY); -+ -+ -+ _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); -+ _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); -+ -+ rtw_update_registrypriv_dev_network(adapter); -+ rtw_generate_random_ibss(pibss); -+ -+ /*pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE;*/ -+ init_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+ -+ if (rtw_create_ibss_cmd(adapter, 0) != _SUCCESS) -+ RTW_ERR("rtw_create_ibss_cmd FAIL\n"); -+ -+ pmlmepriv->to_join = _FALSE; -+ } -+ #endif /* CONFIG_AP_MODE */ -+ } -+ } else { -+ int s_ret; -+ set_fwstate(pmlmepriv, WIFI_UNDER_LINKING); -+ pmlmepriv->to_join = _FALSE; -+ s_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv); -+ if (_SUCCESS == s_ret) -+ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); -+ else if (s_ret == 2) { /* there is no need to wait for join */ -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ rtw_indicate_connect(adapter); -+ } else { -+ RTW_INFO("try_to_join, but select scanning queue fail, to_roam:%d\n", rtw_to_roam(adapter)); -+ -+ if (rtw_to_roam(adapter) != 0) { -+ struct sitesurvey_parm scan_parm; -+ u8 ssc_chk = rtw_sitesurvey_condition_check(adapter, _FALSE); -+ -+ rtw_init_sitesurvey_parm(adapter, &scan_parm); -+ _rtw_memcpy(&scan_parm.ssid[0], &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); -+ scan_parm.ssid_num = 1; -+ -+ if (rtw_dec_to_roam(adapter) == 0 -+ || (ssc_chk != SS_ALLOW && ssc_chk != SS_DENY_BUSY_TRAFFIC) -+ || _SUCCESS != rtw_sitesurvey_cmd(adapter, &scan_parm) -+ ) { -+ rtw_set_to_roam(adapter, 0); -+ rtw_free_assoc_resources(adapter, _TRUE); -+ rtw_indicate_disconnect(adapter, 0, _FALSE); -+ } else -+ pmlmepriv->to_join = _TRUE; -+ } else -+ rtw_indicate_disconnect(adapter, 0, _FALSE); -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ } -+ } -+ } else { -+ if (rtw_chk_roam_flags(adapter, RTW_ROAM_ACTIVE) -+ #if (defined(CONFIG_RTW_WNM) && defined(CONFIG_RTW_80211R)) -+ || rtw_wnm_btm_roam_triggered(adapter) -+ #endif -+ ) { -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) -+ && check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) { -+ if (rtw_select_roaming_candidate(pmlmepriv) == _SUCCESS) { -+ #ifdef CONFIG_RTW_80211R -+ rtw_ft_start_roam(adapter, -+ (u8 *)pmlmepriv->roam_network->network.MacAddress); -+ #else -+ receive_disconnect(adapter, pmlmepriv->cur_network.network.MacAddress -+ , WLAN_REASON_ACTIVE_ROAM, _FALSE); -+ #endif -+ } -+ } -+ } -+ } -+ -+ /* RTW_INFO("scan complete in %dms\n",rtw_get_passing_time_ms(pmlmepriv->scan_start_time)); */ -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+#ifdef CONFIG_P2P_PS -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ p2p_ps_wk_cmd(adapter, P2P_PS_SCAN_DONE, 0); -+#endif /* CONFIG_P2P_PS */ -+ -+ rtw_mi_os_xmit_schedule(adapter); -+ -+#ifdef CONFIG_DRVEXT_MODULE_WSC -+ drvext_surveydone_callback(&adapter->drvextpriv); -+#endif -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ { -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ if (pmlmeext->sitesurvey_res.bss_cnt == 0) { -+ /* rtw_hal_sreset_reset(adapter); */ -+ } -+ } -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_surveydone_event_callback(adapter); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ rtw_indicate_scan_done(adapter, _FALSE); -+ -+#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_IOCTL_CFG80211) -+ rtw_cfg80211_indicate_scan_done_for_buddy(adapter, _FALSE); -+#endif -+ -+ if (parm->activate_ch_cnt) { -+ op_class_pref_apply_regulatory(adapter, REG_BEACON_HINT); -+ rtw_nlrtw_reg_beacon_hint_event(adapter); -+ } -+ -+#ifdef CONFIG_RTW_MESH -+ #if CONFIG_RTW_MESH_OFFCH_CAND -+ if (rtw_mesh_offch_candidate_accepted(adapter)) { -+ u8 ch; -+ -+ ch = rtw_mesh_select_operating_ch(adapter); -+ if (ch && pmlmepriv->cur_network.network.Configuration.DSConfig != ch) { -+ u8 ifbmp = rtw_mi_get_ap_mesh_ifbmp(adapter); -+ -+ if (ifbmp) { -+ /* switch to selected channel */ -+ rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_DIRECTLY, ifbmp, 0, ch, REQ_BW_ORI, REQ_OFFSET_NONE); -+ issue_probereq_ex(adapter, &pmlmepriv->cur_network.network.mesh_id, NULL, 0, 0, 0, 0); -+ } else -+ rtw_warn_on(1); -+ } -+ } -+ #endif -+#endif /* CONFIG_RTW_MESH */ -+ -+#ifdef CONFIG_RTW_ACS -+ if (parm->acs) { -+ u8 ifbmp = rtw_mi_get_ap_mesh_ifbmp(adapter); -+ -+ if (ifbmp) -+ rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_DIRECTLY, ifbmp, 0, REQ_CH_INT_INFO, REQ_BW_ORI, REQ_OFFSET_NONE); -+ } -+#endif -+} -+ -+u8 _rtw_sitesurvey_condition_check(const char *caller, _adapter *adapter, bool check_sc_interval) -+{ -+ u8 ss_condition = SS_ALLOW; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct registry_priv *registry_par = &adapter->registrypriv; -+ -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (rtw_mp_mode_check(adapter)) { -+ RTW_INFO("%s ("ADPT_FMT") MP mode block Scan request\n", caller, ADPT_ARG(adapter)); -+ ss_condition = SS_DENY_MP_MODE; -+ goto _exit; -+ } -+#endif -+ -+#ifdef DBG_LA_MODE -+ if(registry_par->la_mode_en == 1 && MLME_IS_ASOC(adapter)) { -+ RTW_INFO("%s ("ADPT_FMT") LA debug mode block Scan request\n", caller, ADPT_ARG(adapter)); -+ ss_condition = SS_DENY_LA_MODE; -+ goto _exit; -+ } -+#endif -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ if (adapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) { -+ RTW_INFO("%s ("ADPT_FMT") blocking scan for under rson scanning process\n", caller, ADPT_ARG(adapter)); -+ ss_condition = SS_DENY_RSON_SCANING; -+ goto _exit; -+ } -+#endif -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (adapter_wdev_data(adapter)->block_scan == _TRUE) { -+ RTW_INFO("%s ("ADPT_FMT") wdev_priv.block_scan is set\n", caller, ADPT_ARG(adapter)); -+ ss_condition = SS_DENY_BLOCK_SCAN; -+ goto _exit; -+ } -+#endif -+ -+ if (adapter_to_dvobj(adapter)->scan_deny == _TRUE) { -+ RTW_INFO("%s ("ADPT_FMT") tpt mode, scan deny!\n", caller, ADPT_ARG(adapter)); -+ ss_condition = SS_DENY_BLOCK_SCAN; -+ goto _exit; -+ } -+ -+ if (rtw_is_scan_deny(adapter)) { -+ RTW_INFO("%s ("ADPT_FMT") : scan deny\n", caller, ADPT_ARG(adapter)); -+ ss_condition = SS_DENY_BY_DRV; -+ goto _exit; -+ } -+ -+#ifdef CONFIG_ADAPTIVITY_DENY_SCAN -+ if (registry_par->adaptivity_en -+ && rtw_phydm_get_edcca_flag(adapter) -+ && rtw_is_2g_ch(GET_HAL_DATA(adapter)->current_channel)) { -+ RTW_WARN(FUNC_ADPT_FMT": Adaptivity block scan! (ch=%u)\n", -+ FUNC_ADPT_ARG(adapter), -+ GET_HAL_DATA(adapter)->current_channel); -+ ss_condition = SS_DENY_ADAPTIVITY; -+ goto _exit; -+ } -+#endif /* CONFIG_ADAPTIVITY_DENY_SCAN */ -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE)){ -+ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { -+ RTW_INFO("%s ("ADPT_FMT") : scan abort!! AP mode process WPS\n", caller, ADPT_ARG(adapter)); -+ ss_condition = SS_DENY_SELF_AP_UNDER_WPS; -+ goto _exit; -+ } else if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) == _TRUE) { -+ RTW_INFO("%s ("ADPT_FMT") : scan abort!!AP mode under linking (fwstate=0x%x)\n", -+ caller, ADPT_ARG(adapter), pmlmepriv->fw_state); -+ ss_condition = SS_DENY_SELF_AP_UNDER_LINKING; -+ goto _exit; -+ } else if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE) { -+ RTW_INFO("%s ("ADPT_FMT") : scan abort!!AP mode under survey (fwstate=0x%x)\n", -+ caller, ADPT_ARG(adapter), pmlmepriv->fw_state); -+ ss_condition = SS_DENY_SELF_AP_UNDER_SURVEY; -+ goto _exit; -+ } -+ } else { -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) == _TRUE) { -+ RTW_INFO("%s ("ADPT_FMT") : scan abort!!STA mode under linking (fwstate=0x%x)\n", -+ caller, ADPT_ARG(adapter), pmlmepriv->fw_state); -+ ss_condition = SS_DENY_SELF_STA_UNDER_LINKING; -+ goto _exit; -+ } else if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE) { -+ RTW_INFO("%s ("ADPT_FMT") : scan abort!!STA mode under survey (fwstate=0x%x)\n", -+ caller, ADPT_ARG(adapter), pmlmepriv->fw_state); -+ ss_condition = SS_DENY_SELF_STA_UNDER_SURVEY; -+ goto _exit; -+ } -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(adapter, WIFI_UNDER_LINKING | WIFI_UNDER_WPS)) { -+ RTW_INFO("%s ("ADPT_FMT") : scan abort!! buddy_intf under linking or wps\n", caller, ADPT_ARG(adapter)); -+ ss_condition = SS_DENY_BUDDY_UNDER_LINK_WPS; -+ goto _exit; -+ -+ } else if (rtw_mi_buddy_check_fwstate(adapter, WIFI_UNDER_SURVEY)) { -+ RTW_INFO("%s ("ADPT_FMT") : scan abort!! buddy_intf under survey\n", caller, ADPT_ARG(adapter)); -+ ss_condition = SS_DENY_BUDDY_UNDER_SURVEY; -+ goto _exit; -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+#ifdef RTW_BUSY_DENY_SCAN -+ /* -+ * busy traffic check -+ * Rules: -+ * 1. If (scan interval <= BUSY_TRAFFIC_SCAN_DENY_PERIOD) always allow -+ * scan, otherwise goto rule 2. -+ * 2. Deny scan if any interface is busy, otherwise allow scan. -+ */ -+ if (pmlmepriv->lastscantime -+ && (rtw_get_passing_time_ms(pmlmepriv->lastscantime) > -+ registry_par->scan_interval_thr) -+ && rtw_mi_busy_traffic_check(adapter)) { -+ RTW_WARN("%s ("ADPT_FMT") : scan abort!! BusyTraffic\n", -+ caller, ADPT_ARG(adapter)); -+ ss_condition = SS_DENY_BUSY_TRAFFIC; -+ goto _exit; -+ } -+#endif /* RTW_BUSY_DENY_SCAN */ -+ -+_exit: -+ return ss_condition; -+} -+ -+static void free_scanqueue(struct mlme_priv *pmlmepriv) -+{ -+ _irqL irqL, irqL0; -+ _queue *free_queue = &pmlmepriv->free_bss_pool; -+ _queue *scan_queue = &pmlmepriv->scanned_queue; -+ _list *plist, *phead, *ptemp; -+ -+ -+ _enter_critical_bh(&scan_queue->lock, &irqL0); -+ _enter_critical_bh(&free_queue->lock, &irqL); -+ -+ phead = get_list_head(scan_queue); -+ plist = get_next(phead); -+ -+ while (plist != phead) { -+ ptemp = get_next(plist); -+ rtw_list_delete(plist); -+ rtw_list_insert_tail(plist, &free_queue->queue); -+ plist = ptemp; -+ pmlmepriv->num_of_scanned--; -+ } -+ -+ _exit_critical_bh(&free_queue->lock, &irqL); -+ _exit_critical_bh(&scan_queue->lock, &irqL0); -+ -+} -+ -+void rtw_reset_rx_info(_adapter *adapter) -+{ -+ struct recv_priv *precvpriv = &adapter->recvpriv; -+ -+ precvpriv->dbg_rx_ampdu_drop_count = 0; -+ precvpriv->dbg_rx_ampdu_forced_indicate_count = 0; -+ precvpriv->dbg_rx_ampdu_loss_count = 0; -+ precvpriv->dbg_rx_dup_mgt_frame_drop_count = 0; -+ precvpriv->dbg_rx_ampdu_window_shift_cnt = 0; -+ precvpriv->dbg_rx_drop_count = 0; -+ precvpriv->dbg_rx_conflic_mac_addr_cnt = 0; -+} -+ -+/* -+*rtw_free_assoc_resources: the caller has to lock pmlmepriv->lock -+*/ -+void rtw_free_assoc_resources(_adapter *adapter, u8 lock_scanned_queue) -+{ -+ _irqL irqL; -+ struct wlan_network *pwlan = NULL; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct wlan_network *tgt_network = &pmlmepriv->cur_network; -+ -+ -+#ifdef CONFIG_TDLS -+ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; -+#endif /* CONFIG_TDLS */ -+ -+ -+ RTW_INFO("%s-"ADPT_FMT" tgt_network MacAddress=" MAC_FMT" ssid=%s\n", -+ __func__, ADPT_ARG(adapter), MAC_ARG(tgt_network->network.MacAddress), tgt_network->network.Ssid.Ssid); -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { -+ struct sta_info *psta; -+ -+ psta = rtw_get_stainfo(&adapter->stapriv, tgt_network->network.MacAddress); -+ -+#ifdef CONFIG_TDLS -+ rtw_free_all_tdls_sta(adapter, _TRUE); -+ rtw_reset_tdls_info(adapter); -+ -+ if (ptdlsinfo->link_established == _TRUE) -+ rtw_tdls_cmd(adapter, NULL, TDLS_RS_RCR); -+#endif /* CONFIG_TDLS */ -+ -+ /* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ rtw_free_stainfo(adapter, psta); -+ /* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) { -+ struct sta_info *psta; -+ -+ rtw_free_all_stainfo(adapter); -+ -+ psta = rtw_get_bcmc_stainfo(adapter); -+ /* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ rtw_free_stainfo(adapter, psta); -+ /* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ -+ rtw_init_bcmc_stainfo(adapter); -+ } -+ -+ if (lock_scanned_queue) -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS) || (pmlmepriv->wpa_phase == _TRUE)){ -+ RTW_INFO("Dont free disconnecting network of scanned_queue due to uner %s %s phase\n\n", -+ check_fwstate(pmlmepriv, WIFI_UNDER_WPS) ? "WPS" : "", -+ (pmlmepriv->wpa_phase == _TRUE) ? "WPA" : ""); -+ } else { -+ pwlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, tgt_network); -+ if (pwlan) { -+ pwlan->fixed = _FALSE; -+ -+ RTW_INFO("Free disconnecting network of scanned_queue\n"); -+ rtw_free_network_nolock(adapter, pwlan); -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) { -+ rtw_set_scan_deny(adapter, 2000); -+ /* rtw_clear_scan_deny(adapter); */ -+ } -+#endif /* CONFIG_P2P */ -+ } else -+ RTW_ERR("Free disconnecting network of scanned_queue failed due to pwlan == NULL\n\n"); -+ } -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) && (adapter->stapriv.asoc_sta_count == 1)) -+ /*||check_fwstate(pmlmepriv, WIFI_STATION_STATE)*/) { -+ if (pwlan) -+ rtw_free_network_nolock(adapter, pwlan); -+ } -+ -+ if (lock_scanned_queue) -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ adapter->securitypriv.key_mask = 0; -+ -+ rtw_reset_rx_info(adapter); -+ -+ -+} -+ -+/* -+*rtw_indicate_connect: the caller has to lock pmlmepriv->lock -+*/ -+void rtw_indicate_connect(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ pmlmepriv->to_join = _FALSE; -+ -+ if (!check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) { -+ -+ set_fwstate(pmlmepriv, WIFI_ASOC_STATE); -+ -+ rtw_led_control(padapter, LED_CTL_LINK); -+ -+ rtw_os_indicate_connect(padapter); -+ -+ #ifdef CONFIG_RTW_WDS -+ if (MLME_IS_STA(padapter)) -+ rtw_wds_gptr_tbl_init(padapter); -+ #endif -+ } -+ -+ rtw_set_to_roam(padapter, 0); -+ if (!MLME_IS_AP(padapter) && !MLME_IS_MESH(padapter)) -+ rtw_mi_set_scan_deny(padapter, 3000); -+ -+ -+} -+ -+ -+/* -+*rtw_indicate_disconnect: the caller has to lock pmlmepriv->lock -+*/ -+void rtw_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+#ifdef CONFIG_WAPI_SUPPORT -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+#endif -+ u8 *wps_ie = NULL; -+ uint wpsie_len = 0; -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) -+ pmlmepriv->wpa_phase = _TRUE; -+ -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING | WIFI_UNDER_WPS | WIFI_OP_CH_SWITCHING | WIFI_UNDER_KEY_HANDSHAKE); -+ -+ /* force to clear cur_network_scanned's SELECTED REGISTRAR */ -+ if (pmlmepriv->cur_network_scanned) { -+ WLAN_BSSID_EX *current_joined_bss = &(pmlmepriv->cur_network_scanned->network); -+ if (current_joined_bss) { -+ wps_ie = rtw_get_wps_ie(current_joined_bss->IEs + _FIXED_IE_LENGTH_, -+ current_joined_bss->IELength - _FIXED_IE_LENGTH_, NULL, &wpsie_len); -+ if (wps_ie && wpsie_len > 0) { -+ u8 *attr = NULL; -+ u32 attr_len; -+ attr = rtw_get_wps_attr(wps_ie, wpsie_len, WPS_ATTR_SELECTED_REGISTRAR, -+ NULL, &attr_len); -+ if (attr) -+ *(attr + 4) = 0; -+ } -+ } -+ } -+ /* RTW_INFO("clear wps when %s\n", __func__); */ -+ -+ if (rtw_to_roam(padapter) > 0) -+ _clr_fwstate_(pmlmepriv, WIFI_ASOC_STATE); -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) -+ rtw_wapi_return_one_sta_info(padapter, psta->cmn.mac_addr); -+ else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || -+ check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) -+ rtw_wapi_return_all_sta_info(padapter); -+#endif -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) -+ || (rtw_to_roam(padapter) <= 0) -+ ) { -+ #ifdef CONFIG_RTW_WDS -+ adapter_set_use_wds(padapter, 0); -+ rtw_wds_gptr_tbl_unregister(padapter); -+ #endif -+ #ifdef CONFIG_RTW_MULTI_AP -+ padapter->multi_ap = 0; -+ #endif -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (ATOMIC_READ(&padapter->tbtx_tx_pause) == _TRUE) { -+ ATOMIC_SET(&padapter->tbtx_tx_pause, _FALSE); -+ rtw_tx_control_cmd(padapter); -+ } -+#endif -+ -+ rtw_os_indicate_disconnect(padapter, reason, locally_generated); -+ -+ /* set ips_deny_time to avoid enter IPS before LPS leave */ -+ rtw_set_ips_deny(padapter, 3000); -+ -+ _clr_fwstate_(pmlmepriv, WIFI_ASOC_STATE); -+ -+ rtw_led_control(padapter, LED_CTL_NO_LINK); -+ -+ rtw_clear_scan_deny(padapter); -+ } -+ -+#ifdef CONFIG_P2P_PS -+ p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); -+#endif /* CONFIG_P2P_PS */ -+ -+#ifdef CONFIG_LPS -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0); -+#endif -+ -+#ifdef CONFIG_BEAMFORMING -+ beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_LEAVE, cur_network->MacAddress, ETH_ALEN, 1); -+#endif /*CONFIG_BEAMFORMING*/ -+ -+} -+ -+inline void rtw_indicate_scan_done(_adapter *padapter, bool aborted) -+{ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ rtw_os_indicate_scan_done(padapter, aborted); -+ -+#ifdef CONFIG_IPS -+ if (is_primary_adapter(padapter) -+ && (_FALSE == adapter_to_pwrctl(padapter)->bInSuspend) -+ && (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE | WIFI_UNDER_LINKING) == _FALSE)) { -+ struct pwrctrl_priv *pwrpriv; -+ -+ pwrpriv = adapter_to_pwrctl(padapter); -+ rtw_set_ips_deny(padapter, 0); -+#ifdef CONFIG_IPS_CHECK_IN_WD -+ _set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 1); -+#else /* !CONFIG_IPS_CHECK_IN_WD */ -+ _rtw_set_pwr_state_check_timer(pwrpriv, 1); -+#endif /* !CONFIG_IPS_CHECK_IN_WD */ -+ } -+#endif /* CONFIG_IPS */ -+} -+ -+static u32 _rtw_wait_scan_done(_adapter *adapter, u8 abort, u32 timeout_ms) -+{ -+ systime start; -+ u32 pass_ms; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ start = rtw_get_current_time(); -+ -+ pmlmeext->scan_abort = abort; -+ -+ while (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) -+ && rtw_get_passing_time_ms(start) <= timeout_ms) { -+ -+ if (RTW_CANNOT_RUN(adapter)) -+ break; -+ -+ RTW_INFO(FUNC_NDEV_FMT"fw_state=WIFI_UNDER_SURVEY!\n", FUNC_NDEV_ARG(adapter->pnetdev)); -+ rtw_msleep_os(20); -+ } -+ -+ if (_TRUE == abort) { -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY)) { -+ if (!RTW_CANNOT_RUN(adapter)) -+ RTW_INFO(FUNC_NDEV_FMT"waiting for scan_abort time out!\n", FUNC_NDEV_ARG(adapter->pnetdev)); -+#ifdef CONFIG_PLATFORM_MSTAR -+ /*_clr_fwstate_(pmlmepriv, WIFI_UNDER_SURVEY);*/ -+ set_survey_timer(pmlmeext, 0); -+ mlme_set_scan_to_timer(pmlmepriv, 50); -+#endif -+ rtw_indicate_scan_done(adapter, _TRUE); -+ } -+ } -+ -+ pmlmeext->scan_abort = _FALSE; -+ pass_ms = rtw_get_passing_time_ms(start); -+ -+ return pass_ms; -+ -+} -+ -+void rtw_scan_wait_completed(_adapter *adapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct ss_res *ss = &pmlmeext->sitesurvey_res; -+ -+ _rtw_wait_scan_done(adapter, _FALSE, ss->scan_timeout_ms); -+} -+ -+u32 rtw_scan_abort_timeout(_adapter *adapter, u32 timeout_ms) -+{ -+ return _rtw_wait_scan_done(adapter, _TRUE, timeout_ms); -+} -+ -+void rtw_scan_abort_no_wait(_adapter *adapter) -+{ -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY)) -+ pmlmeext->scan_abort = _TRUE; -+} -+ -+void rtw_scan_abort(_adapter *adapter) -+{ -+ rtw_scan_abort_timeout(adapter, 200); -+} -+ -+static u32 _rtw_wait_join_done(_adapter *adapter, u8 abort, u32 timeout_ms) -+{ -+ systime start; -+ u32 pass_ms; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ start = rtw_get_current_time(); -+ -+ pmlmeext->join_abort = abort; -+ if (abort) -+ set_link_timer(pmlmeext, 1); -+ -+ while (rtw_get_passing_time_ms(start) <= timeout_ms -+ && (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) -+ #ifdef CONFIG_IOCTL_CFG80211 -+ || rtw_cfg80211_is_connect_requested(adapter) -+ #endif -+ ) -+ ) { -+ if (RTW_CANNOT_RUN(adapter)) -+ break; -+ -+ RTW_INFO(FUNC_ADPT_FMT" linking...\n", FUNC_ADPT_ARG(adapter)); -+ rtw_msleep_os(20); -+ } -+ -+ if (abort) { -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) -+ #ifdef CONFIG_IOCTL_CFG80211 -+ || rtw_cfg80211_is_connect_requested(adapter) -+ #endif -+ ) { -+ if (!RTW_CANNOT_RUN(adapter)) -+ RTW_INFO(FUNC_ADPT_FMT" waiting for join_abort time out!\n", FUNC_ADPT_ARG(adapter)); -+ } -+ } -+ -+ pmlmeext->join_abort = 0; -+ pass_ms = rtw_get_passing_time_ms(start); -+ -+ return pass_ms; -+} -+ -+u32 rtw_join_abort_timeout(_adapter *adapter, u32 timeout_ms) -+{ -+ return _rtw_wait_join_done(adapter, _TRUE, timeout_ms); -+} -+ -+static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wlan_network *pnetwork) -+{ -+ int i; -+ struct sta_info *psta = NULL; -+ struct recv_reorder_ctrl *preorder_ctrl; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+#ifdef CONFIG_RTS_FULL_BW -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+#endif/*CONFIG_RTS_FULL_BW*/ -+ -+ psta = rtw_get_stainfo(pstapriv, pnetwork->network.MacAddress); -+ if (psta == NULL) -+ psta = rtw_alloc_stainfo(pstapriv, pnetwork->network.MacAddress); -+ -+ if (psta) { /* update ptarget_sta */ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ psta->cmn.aid = pnetwork->join_res; -+ -+ update_sta_info(padapter, psta); -+ -+ /* update station supportRate */ -+ psta->bssratelen = rtw_get_rateset_len(pnetwork->network.SupportedRates); -+ _rtw_memcpy(psta->bssrateset, pnetwork->network.SupportedRates, psta->bssratelen); -+ rtw_hal_update_sta_ra_info(padapter, psta); -+ -+ psta->wireless_mode = pmlmeext->cur_wireless_mode; -+ rtw_hal_update_sta_wset(padapter, psta); -+ -+ /* sta mode */ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); -+ -+ /* security related */ -+#ifdef CONFIG_RTW_80211R -+ if ((padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) -+ && (psta->ft_pairwise_key_installed == _FALSE)) { -+#else -+ if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { -+#endif -+ u8 *ie; -+ sint ie_len; -+ u8 mfp_opt = MFP_NO; -+ -+ padapter->securitypriv.binstallGrpkey = _FALSE; -+ padapter->securitypriv.busetkipkey = _FALSE; -+ padapter->securitypriv.bgrpkey_handshake = _FALSE; -+ -+ ie = rtw_get_ie(pnetwork->network.IEs + _BEACON_IE_OFFSET_, WLAN_EID_RSN -+ , &ie_len, (pnetwork->network.IELength - _BEACON_IE_OFFSET_)); -+ if (ie && ie_len > 0 -+ && rtw_parse_wpa2_ie(ie, ie_len + 2, NULL, NULL, NULL, NULL, &mfp_opt) == _SUCCESS -+ ) { -+ if (padapter->securitypriv.mfp_opt >= MFP_OPTIONAL && mfp_opt >= MFP_OPTIONAL) -+ psta->flags |= WLAN_STA_MFP; -+ } -+ -+ psta->ieee8021x_blocked = _TRUE; -+ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; -+ -+ _rtw_memset((u8 *)&psta->dot118021x_UncstKey, 0, sizeof(union Keytype)); -+ _rtw_memset((u8 *)&psta->dot11tkiprxmickey, 0, sizeof(union Keytype)); -+ _rtw_memset((u8 *)&psta->dot11tkiptxmickey, 0, sizeof(union Keytype)); -+ } -+ -+ /* Commented by Albert 2012/07/21 */ -+ /* When doing the WPS, the wps_ie_len won't equal to 0 */ -+ /* And the Wi-Fi driver shouldn't allow the data packet to be tramsmitted. */ -+ if (padapter->securitypriv.wps_ie_len != 0) { -+ psta->ieee8021x_blocked = _TRUE; -+ padapter->securitypriv.wps_ie_len = 0; -+ } -+ -+ -+ /* for A-MPDU Rx reordering buffer control for sta_info */ -+ /* if A-MPDU Rx is enabled, reseting rx_ordering_ctrl wstart_b(indicate_seq) to default value=0xffff */ -+ /* todo: check if AP can send A-MPDU packets */ -+ for (i = 0; i < 16 ; i++) { -+ /* preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; */ -+ preorder_ctrl = &psta->recvreorder_ctrl[i]; -+ preorder_ctrl->enable = _FALSE; -+ preorder_ctrl->indicate_seq = 0xffff; -+ rtw_clear_bit(RTW_RECV_ACK_OR_TIMEOUT, &preorder_ctrl->rec_abba_rsp_ack); -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" tid:%u SN_CLEAR indicate_seq:%u preorder_ctrl->rec_abba_rsp_ack:%lu\n" -+ , FUNC_ADPT_ARG(padapter) -+ , i -+ , preorder_ctrl->indicate_seq -+ ,preorder_ctrl->rec_abba_rsp_ack -+ ); -+ #endif -+ preorder_ctrl->wend_b = 0xffff; -+ preorder_ctrl->wsize_b = 64;/* max_ampdu_sz; */ /* ex. 32(kbytes) -> wsize_b=32 */ -+ preorder_ctrl->ampdu_size = RX_AMPDU_SIZE_INVALID; -+ } -+ } -+ -+#ifdef CONFIG_RTW_80211K -+ _rtw_memcpy(&psta->rm_en_cap, pnetwork->network.PhyInfo.rm_en_cap, 5); -+#endif -+#ifdef CONFIG_RTW_MULTI_AP -+ if (padapter->multi_ap & MULTI_AP_BACKHAUL_STA) { -+ u8 multi_ap = rtw_get_multi_ap_ie_ext(pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6 -+ , pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6); -+ -+ if (multi_ap & MULTI_AP_BACKHAUL_BSS) /* backhaul bss, enable WDS */ -+ psta->flags |= WLAN_STA_MULTI_AP | WLAN_STA_WDS; -+ else if (multi_ap & MULTI_AP_FRONTHAUL_BSS) /* fronthaul bss only */ -+ psta->flags |= WLAN_STA_MULTI_AP; -+ } -+#endif -+#ifdef CONFIG_RTS_FULL_BW -+ rtw_parse_sta_vendor_ie_8812(padapter, psta, BSS_EX_TLV_IES(&cur_network->network), BSS_EX_TLV_IES_LEN(&cur_network->network)); -+#endif -+ return psta; -+ -+} -+ -+/* pnetwork : returns from rtw_joinbss_event_callback -+ * ptarget_wlan: found from scanned_queue */ -+static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *ptarget_wlan, struct wlan_network *pnetwork) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ sint tmp_fw_state = 0x0; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ /* why not use ptarget_wlan?? */ -+ _rtw_memcpy(&cur_network->network, &pnetwork->network, pnetwork->network.Length); -+ /* some IEs in pnetwork is wrong, so we should use ptarget_wlan IEs */ -+ cur_network->network.IELength = ptarget_wlan->network.IELength; -+ _rtw_memcpy(&cur_network->network.IEs[0], &ptarget_wlan->network.IEs[0], MAX_IE_SZ); -+ -+ cur_network->aid = pnetwork->join_res; -+ -+ -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ rtw_set_signal_stat_timer(&padapter->recvpriv); -+#endif -+ padapter->recvpriv.signal_strength = ptarget_wlan->network.PhyInfo.SignalStrength; -+ padapter->recvpriv.signal_qual = ptarget_wlan->network.PhyInfo.SignalQuality; -+ /* the ptarget_wlan->network.Rssi is raw data, we use ptarget_wlan->network.PhyInfo.SignalStrength instead (has scaled) */ -+ padapter->recvpriv.rssi = translate_percentage_to_dbm(ptarget_wlan->network.PhyInfo.SignalStrength); -+#if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1 -+ RTW_INFO(FUNC_ADPT_FMT" signal_strength:%3u, rssi:%3d, signal_qual:%3u" -+ "\n" -+ , FUNC_ADPT_ARG(padapter) -+ , padapter->recvpriv.signal_strength -+ , padapter->recvpriv.rssi -+ , padapter->recvpriv.signal_qual -+ ); -+#endif -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ rtw_set_signal_stat_timer(&padapter->recvpriv); -+#endif -+ -+ /* update fw_state */ /* will clr WIFI_UNDER_LINKING here indirectly */ -+ -+ switch (pnetwork->network.InfrastructureMode) { -+ case Ndis802_11Infrastructure: -+ /* Check encryption */ -+ if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) -+ tmp_fw_state = tmp_fw_state | WIFI_UNDER_KEY_HANDSHAKE; -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) -+ tmp_fw_state = tmp_fw_state | WIFI_UNDER_WPS; -+ -+ init_fwstate(pmlmepriv, WIFI_STATION_STATE | tmp_fw_state); -+ -+ break; -+ case Ndis802_11IBSS: -+ /*pmlmepriv->fw_state = WIFI_ADHOC_STATE;*/ -+ init_fwstate(pmlmepriv, WIFI_ADHOC_STATE); -+ break; -+ default: -+ /*pmlmepriv->fw_state = WIFI_NULL_STATE;*/ -+ init_fwstate(pmlmepriv, WIFI_NULL_STATE); -+ break; -+ } -+ -+ rtw_update_protection(padapter, (cur_network->network.IEs) + sizeof(NDIS_802_11_FIXED_IEs), -+ (cur_network->network.IELength)); -+ -+#ifdef CONFIG_80211N_HT -+ rtw_update_ht_cap(padapter, cur_network->network.IEs, cur_network->network.IELength, (u8) cur_network->network.Configuration.DSConfig); -+#endif -+} -+ -+/* Notes: the fucntion could be > passive_level (the same context as Rx tasklet) -+ * pnetwork : returns from rtw_joinbss_event_callback -+ * ptarget_wlan: found from scanned_queue -+ * if join_res > 0, for (fw_state==WIFI_STATION_STATE), we check if "ptarget_sta" & "ptarget_wlan" exist. -+ * if join_res > 0, for (fw_state==WIFI_ADHOC_STATE), we only check if "ptarget_wlan" exist. -+ * if join_res > 0, update "cur_network->network" from "pnetwork->network" if (ptarget_wlan !=NULL). -+ */ -+/* #define REJOIN */ -+void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf, u16 status) -+{ -+ _irqL irqL; -+ static u8 retry = 0; -+ struct sta_info *ptarget_sta = NULL, *pcur_sta = NULL; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct wlan_network *pnetwork = (struct wlan_network *)pbuf; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct wlan_network *pcur_wlan = NULL, *ptarget_wlan = NULL; -+ unsigned int the_same_macaddr = _FALSE; -+ -+ rtw_get_encrypt_decrypt_from_registrypriv(adapter); -+ -+ the_same_macaddr = _rtw_memcmp(pnetwork->network.MacAddress, cur_network->network.MacAddress, ETH_ALEN); -+ -+ pnetwork->network.Length = get_WLAN_BSSID_EX_sz(&pnetwork->network); -+ if (pnetwork->network.Length > sizeof(WLAN_BSSID_EX)) -+ goto exit; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; -+ pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; -+ -+ -+ if (pnetwork->join_res > 0) { -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ retry = 0; -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING)) { -+ /* s1. find ptarget_wlan */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) { -+ if (the_same_macaddr == _TRUE) -+ ptarget_wlan = _rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); -+ else { -+ pcur_wlan = _rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); -+ if (pcur_wlan) -+ pcur_wlan->fixed = _FALSE; -+ -+ pcur_sta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); -+ if (pcur_sta) { -+ /* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); */ -+ rtw_free_stainfo(adapter, pcur_sta); -+ /* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); */ -+ } -+ -+ ptarget_wlan = _rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress); -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { -+ if (ptarget_wlan) -+ ptarget_wlan->fixed = _TRUE; -+ } -+ } -+ -+ } else { -+ ptarget_wlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, pnetwork); -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { -+ if (ptarget_wlan) -+ ptarget_wlan->fixed = _TRUE; -+ } -+ } -+ -+ /* s2. update cur_network */ -+ if (ptarget_wlan) -+ rtw_joinbss_update_network(adapter, ptarget_wlan, pnetwork); -+ else { -+ RTW_PRINT("Can't find ptarget_wlan when joinbss_event callback\n"); -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ goto ignore_joinbss_callback; -+ } -+ -+ -+ /* s3. find ptarget_sta & update ptarget_sta after update cur_network only for station mode */ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { -+ ptarget_sta = rtw_joinbss_update_stainfo(adapter, pnetwork); -+ if (ptarget_sta == NULL) { -+ RTW_ERR("Can't update stainfo when joinbss_event callback\n"); -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ goto ignore_joinbss_callback; -+ } -+ -+ /* Queue TX packets before FW/HW ready */ -+ /* clear in mlmeext_joinbss_event_callback() */ -+ rtw_xmit_queue_set(ptarget_sta); -+ } -+ -+ /* s4. indicate connect */ -+ if (MLME_IS_STA(adapter) || MLME_IS_ADHOC(adapter)) { -+ pmlmepriv->cur_network_scanned = ptarget_wlan; -+ rtw_indicate_connect(adapter); -+ } -+ -+ /* s5. Cancle assoc_timer */ -+ _cancel_timer_ex(&pmlmepriv->assoc_timer); -+ -+ -+ } else { -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ goto ignore_joinbss_callback; -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ } else if (pnetwork->join_res == -4) { -+ rtw_reset_securitypriv(adapter); -+ pmlmepriv->join_status = status; -+ _set_timer(&pmlmepriv->assoc_timer, 1); -+ -+ /* rtw_free_assoc_resources(adapter, _TRUE); */ -+ -+ if ((check_fwstate(pmlmepriv, WIFI_UNDER_LINKING)) == _TRUE) { -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ } -+ -+ } else { /* if join_res < 0 (join fails), then try again */ -+ -+#ifdef REJOIN -+ res = _FAIL; -+ if (retry < 2) { -+ res = rtw_select_and_join_from_scanned_queue(pmlmepriv); -+ } -+ -+ if (res == _SUCCESS) { -+ /* extend time of assoc_timer */ -+ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); -+ retry++; -+ } else if (res == 2) { /* there is no need to wait for join */ -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ rtw_indicate_connect(adapter); -+ } else { -+#endif -+ pmlmepriv->join_status = status; -+ _set_timer(&pmlmepriv->assoc_timer, 1); -+ /* rtw_free_assoc_resources(adapter, _TRUE); */ -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ -+#ifdef REJOIN -+ retry = 0; -+ } -+#endif -+ } -+ -+ignore_joinbss_callback: -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+exit: -+ return; -+} -+ -+void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf) -+{ -+ struct wlan_network *pnetwork = (struct wlan_network *)pbuf; -+ -+ -+ mlmeext_joinbss_event_callback(adapter, pnetwork->join_res); -+ -+ rtw_mi_os_xmit_schedule(adapter); -+ -+} -+ -+void rtw_sta_media_status_rpt(_adapter *adapter, struct sta_info *sta, bool connected) -+{ -+ struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; -+ bool miracast_enabled = 0; -+ bool miracast_sink = 0; -+ u8 role = H2C_MSR_ROLE_RSVD; -+ -+ if (sta == NULL) { -+ RTW_PRINT(FUNC_ADPT_FMT" sta is NULL\n" -+ , FUNC_ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ if (sta->cmn.mac_id >= macid_ctl->num) { -+ RTW_PRINT(FUNC_ADPT_FMT" invalid macid:%u\n" -+ , FUNC_ADPT_ARG(adapter), sta->cmn.mac_id); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ if (!rtw_macid_is_used(macid_ctl, sta->cmn.mac_id)) { -+ RTW_PRINT(FUNC_ADPT_FMT" macid:%u not is used, set connected to 0\n" -+ , FUNC_ADPT_ARG(adapter), sta->cmn.mac_id); -+ connected = 0; -+ rtw_warn_on(1); -+ } -+ -+ if (connected && !rtw_macid_is_bmc(macid_ctl, sta->cmn.mac_id)) { -+ miracast_enabled = STA_OP_WFD_MODE(sta) != 0 && is_miracast_enabled(adapter); -+ miracast_sink = miracast_enabled && (STA_OP_WFD_MODE(sta) & MIRACAST_SINK); -+ -+#ifdef CONFIG_TDLS -+ if (sta->tdls_sta_state & TDLS_LINKED_STATE) -+ role = H2C_MSR_ROLE_TDLS; -+ else -+#endif -+ if (MLME_IS_STA(adapter)) { -+ if (MLME_IS_GC(adapter)) -+ role = H2C_MSR_ROLE_GO; -+ else -+ role = H2C_MSR_ROLE_AP; -+ } else if (MLME_IS_AP(adapter)) { -+ if (MLME_IS_GO(adapter)) -+ role = H2C_MSR_ROLE_GC; -+ else -+ role = H2C_MSR_ROLE_STA; -+ } else if (MLME_IS_ADHOC(adapter) || MLME_IS_ADHOC_MASTER(adapter)) -+ role = H2C_MSR_ROLE_ADHOC; -+ else if (MLME_IS_MESH(adapter)) -+ role = H2C_MSR_ROLE_MESH; -+ -+#ifdef CONFIG_WFD -+ if (role == H2C_MSR_ROLE_GC -+ || role == H2C_MSR_ROLE_GO -+ || role == H2C_MSR_ROLE_TDLS -+ ) { -+ if (adapter->wfd_info.rtsp_ctrlport -+ || adapter->wfd_info.tdls_rtsp_ctrlport -+ || adapter->wfd_info.peer_rtsp_ctrlport) -+ rtw_wfd_st_switch(sta, 1); -+ } -+#endif -+ } -+ -+ rtw_hal_set_FwMediaStatusRpt_single_cmd(adapter -+ , connected -+ , miracast_enabled -+ , miracast_sink -+ , role -+ , sta->cmn.mac_id -+ ); -+} -+ -+u8 rtw_sta_media_status_rpt_cmd(_adapter *adapter, struct sta_info *sta, bool connected) -+{ -+ struct cmd_priv *cmdpriv = &adapter->cmdpriv; -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *cmd_parm; -+ struct sta_media_status_rpt_cmd_parm *rpt_parm; -+ u8 res = _SUCCESS; -+ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (cmd_parm == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ rpt_parm = (struct sta_media_status_rpt_cmd_parm *)rtw_zmalloc(sizeof(struct sta_media_status_rpt_cmd_parm)); -+ if (rpt_parm == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ rpt_parm->sta = sta; -+ rpt_parm->connected = connected; -+ -+ cmd_parm->ec_id = STA_MSTATUS_RPT_WK_CID; -+ cmd_parm->type = 0; -+ cmd_parm->size = sizeof(struct sta_media_status_rpt_cmd_parm); -+ cmd_parm->pbuf = (u8 *)rpt_parm; -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(cmdpriv, cmdobj); -+ -+exit: -+ return res; -+} -+ -+inline void rtw_sta_media_status_rpt_cmd_hdl(_adapter *adapter, struct sta_media_status_rpt_cmd_parm *parm) -+{ -+ rtw_sta_media_status_rpt(adapter, parm->sta, parm->connected); -+} -+ -+void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf) -+{ -+ _irqL irqL; -+ struct sta_info *psta; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct stassoc_event *pstassoc = (struct stassoc_event *)pbuf; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct wlan_network *ptarget_wlan = NULL; -+ -+ -+#if CONFIG_RTW_MACADDR_ACL -+ if (rtw_access_ctrl(adapter, pstassoc->macaddr) == _FALSE) -+ return; -+#endif -+ -+#if defined(CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) -+ if (MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) { -+ psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); -+ if (psta) { -+ u8 *passoc_req = NULL; -+ u32 assoc_req_len = 0; -+ -+ rtw_sta_media_status_rpt(adapter, psta, 1); -+ -+#ifdef CONFIG_MCC_MODE -+ rtw_hal_mcc_update_macid_bitmap(adapter, psta->cmn.mac_id, _TRUE); -+#endif /* CONFIG_MCC_MODE */ -+ -+#ifndef CONFIG_AUTO_AP_MODE -+ ap_sta_info_defer_update(adapter, psta); -+ -+ if (!MLME_IS_MESH(adapter)) { -+ /* report to upper layer */ -+ RTW_INFO("indicate_sta_assoc_event to upper layer - hostapd\n"); -+ #ifdef CONFIG_IOCTL_CFG80211 -+ _enter_critical_bh(&psta->lock, &irqL); -+ if (psta->passoc_req && psta->assoc_req_len > 0) { -+ passoc_req = rtw_zmalloc(psta->assoc_req_len); -+ if (passoc_req) { -+ assoc_req_len = psta->assoc_req_len; -+ _rtw_memcpy(passoc_req, psta->passoc_req, assoc_req_len); -+ } -+ } -+ _exit_critical_bh(&psta->lock, &irqL); -+ -+ if (passoc_req && assoc_req_len > 0) { -+ rtw_cfg80211_indicate_sta_assoc(adapter, passoc_req, assoc_req_len); -+ rtw_mfree(passoc_req, assoc_req_len); -+ } -+ #else /* !CONFIG_IOCTL_CFG80211 */ -+ rtw_indicate_sta_assoc_event(adapter, psta); -+ #endif /* !CONFIG_IOCTL_CFG80211 */ -+ } -+#endif /* !CONFIG_AUTO_AP_MODE */ -+ -+#ifdef CONFIG_BEAMFORMING -+ beamforming_wk_cmd(adapter, BEAMFORMING_CTRL_ENTER, (u8 *)psta, sizeof(struct sta_info), 0); -+#endif/*CONFIG_BEAMFORMING*/ -+ if (is_wep_enc(adapter->securitypriv.dot11PrivacyAlgrthm)) -+ rtw_ap_wep_pk_setting(adapter, psta); -+ -+ #ifdef CONFIG_PLATFORM_CMAP_INTFS -+ if (MLME_IS_AP(adapter)) { -+ cmap_intfs_nl_sta_event(psta->cmn.mac_addr, adapter_mac_addr(adapter), 1 -+ , psta->passoc_req + IEEE80211_3ADDR_LEN, psta->assoc_req_len - IEEE80211_3ADDR_LEN); -+ } -+ #endif -+ } -+ goto exit; -+ } -+#endif /* defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ -+ /* for AD-HOC mode */ -+ psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); -+ if (psta == NULL) { -+ RTW_ERR(FUNC_ADPT_FMT" get no sta_info with "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(pstassoc->macaddr)); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ rtw_sta_media_status_rpt(adapter, psta, 1); -+ -+ if (adapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) -+ psta->dot118021XPrivacy = adapter->securitypriv.dot11PrivacyAlgrthm; -+ -+ -+ psta->ieee8021x_blocked = _FALSE; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || -+ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) { -+ if (adapter->stapriv.asoc_sta_count == 2) { -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ ptarget_wlan = _rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); -+ pmlmepriv->cur_network_scanned = ptarget_wlan; -+ if (ptarget_wlan) -+ ptarget_wlan->fixed = _TRUE; -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ /* a sta + bc/mc_stainfo (not Ibss_stainfo) */ -+ rtw_indicate_connect(adapter); -+ } -+ } -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ -+ mlmeext_sta_add_event_callback(adapter, psta); -+ -+#ifdef CONFIG_RTL8711 -+ /* submit SetStaKey_cmd to tell fw, fw will allocate an CAM entry for this sta */ -+ rtw_setstakey_cmd(adapter, psta, GROUP_KEY, _TRUE); -+#endif -+ -+exit: -+#ifdef CONFIG_RTS_FULL_BW -+ rtw_set_rts_bw(adapter); -+#endif/*CONFIG_RTS_FULL_BW*/ -+ return; -+} -+ -+#ifdef CONFIG_IEEE80211W -+void rtw_sta_timeout_event_callback(_adapter *adapter, u8 *pbuf) -+{ -+#ifdef CONFIG_AP_MODE -+ _irqL irqL; -+ struct sta_info *psta; -+ struct stadel_event *pstadel = (struct stadel_event *)pbuf; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ -+ psta = rtw_get_stainfo(&adapter->stapriv, pstadel->macaddr); -+ -+ if (psta) { -+ u8 updated = _FALSE; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) { -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (psta->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt--; -+ #endif -+ updated = ap_free_sta(adapter, psta, _TRUE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE); -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ associated_clients_update(adapter, updated, STA_INFO_UPDATE_ALL); -+ } -+#endif /* CONFIG_AP_MODE */ -+} -+#endif /* CONFIG_IEEE80211W */ -+ -+void rtw_sta_mstatus_disc_rpt(_adapter *adapter, u8 mac_id) -+{ -+ struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; -+ -+ if (mac_id < macid_ctl->num) { -+ u8 id_is_shared = mac_id == RTW_DEFAULT_MGMT_MACID; /* TODO: real shared macid judgment */ -+ -+ RTW_INFO(FUNC_ADPT_FMT" - mac_id=%d%s\n", FUNC_ADPT_ARG(adapter) -+ , mac_id, id_is_shared ? " shared" : ""); -+ -+ if (!id_is_shared) { -+ rtw_hal_macid_drop(adapter, mac_id); -+ rtw_hal_set_FwMediaStatusRpt_single_cmd(adapter, 0, 0, 0, 0, mac_id); -+ /* -+ * For safety, prevent from keeping macid sleep. -+ * If we can sure all power mode enter/leave are paired, -+ * this check can be removed. -+ * Lucas@20131113 -+ */ -+ /* wakeup macid after disconnect. */ -+ /*if (MLME_IS_STA(adapter))*/ -+ rtw_hal_macid_wakeup(adapter, mac_id); -+ } -+ } else { -+ RTW_PRINT(FUNC_ADPT_FMT" invalid macid:%u\n" -+ , FUNC_ADPT_ARG(adapter), mac_id); -+ rtw_warn_on(1); -+ } -+} -+void rtw_sta_mstatus_report(_adapter *adapter) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct wlan_network *tgt_network = &pmlmepriv->cur_network; -+ struct sta_info *psta = NULL; -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) { -+ psta = rtw_get_stainfo(&adapter->stapriv, tgt_network->network.MacAddress); -+ if (psta) -+ rtw_sta_mstatus_disc_rpt(adapter, psta->cmn.mac_id); -+ else { -+ RTW_INFO("%s "ADPT_FMT" - mac_addr: "MAC_FMT" psta == NULL\n", __func__, ADPT_ARG(adapter), MAC_ARG(tgt_network->network.MacAddress)); -+ rtw_warn_on(1); -+ } -+ } -+} -+ -+void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) -+{ -+ _irqL irqL, irqL2; -+ -+ struct sta_info *psta; -+ struct wlan_network *pwlan = NULL; -+ WLAN_BSSID_EX *pdev_network = NULL; -+ u8 *pibss = NULL; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct stadel_event *pstadel = (struct stadel_event *)pbuf; -+ struct wlan_network *tgt_network = &(pmlmepriv->cur_network); -+ -+ RTW_INFO("%s(mac_id=%d)=" MAC_FMT "\n", __func__, pstadel->mac_id, MAC_ARG(pstadel->macaddr)); -+ rtw_sta_mstatus_disc_rpt(adapter, pstadel->mac_id); -+ -+#ifdef CONFIG_MCC_MODE -+ rtw_hal_mcc_update_macid_bitmap(adapter, pstadel->mac_id, _FALSE); -+#endif /* CONFIG_MCC_MODE */ -+ -+ psta = rtw_get_stainfo(&adapter->stapriv, pstadel->macaddr); -+ -+ if (psta == NULL) { -+ RTW_INFO("%s(mac_id=%d)=" MAC_FMT " psta == NULL\n", __func__, pstadel->mac_id, MAC_ARG(pstadel->macaddr)); -+ /*rtw_warn_on(1);*/ -+ } -+ -+ if (psta) -+ rtw_wfd_st_switch(psta, 0); -+ -+ if (MLME_IS_MESH(adapter)) { -+ rtw_free_stainfo(adapter, psta); -+ goto exit; -+ } -+ -+#ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(adapter)) { -+#ifdef CONFIG_IOCTL_CFG80211 -+#ifdef COMPAT_KERNEL_RELEASE -+ -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) -+ rtw_cfg80211_indicate_sta_disassoc(adapter, pstadel->macaddr, *(u16 *)pstadel->rsvd); -+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) */ -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ #ifdef CONFIG_PLATFORM_CMAP_INTFS -+ cmap_intfs_nl_sta_event(pstadel->macaddr, adapter_mac_addr(adapter), 0, NULL, 0); -+ #endif -+ -+ rtw_free_stainfo(adapter, psta); -+ -+ goto exit; -+ } -+#endif /* CONFIG_AP_MODE */ -+ -+ mlmeext_sta_del_event_callback(adapter); -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL2); -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { -+ u16 reason = *((unsigned short *)(pstadel->rsvd)); -+ bool roam = _FALSE; -+ struct wlan_network *roam_target = NULL; -+ -+#ifdef CONFIG_LAYER2_ROAMING -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_roam_expired(adapter, reason)) -+ pmlmepriv->ft_roam.ft_roam_on_expired = _TRUE; -+ else -+ pmlmepriv->ft_roam.ft_roam_on_expired = _FALSE; -+#endif -+ if (adapter->registrypriv.wifi_spec == 1) -+ roam = _FALSE; -+ else if (reason == WLAN_REASON_EXPIRATION_CHK && rtw_chk_roam_flags(adapter, RTW_ROAM_ON_EXPIRED)) -+ roam = _TRUE; -+ else if (reason == WLAN_REASON_ACTIVE_ROAM && rtw_chk_roam_flags(adapter, RTW_ROAM_ACTIVE)) { -+ roam = _TRUE; -+ roam_target = pmlmepriv->roam_network; -+ } -+ -+#ifdef CONFIG_RTW_80211R -+ if (reason == WLAN_REASON_ACTIVE_ROAM && rtw_ft_chk_flags(adapter, RTW_FT_BTM_ROAM)) { -+ roam = _TRUE; -+ roam_target = pmlmepriv->roam_network; -+ } -+#endif -+ -+ if (roam == _TRUE) { -+ if (rtw_to_roam(adapter) > 0) -+ rtw_dec_to_roam(adapter); /* this stadel_event is caused by roaming, decrease to_roam */ -+ else if (rtw_to_roam(adapter) == 0) -+ rtw_set_to_roam(adapter, adapter->registrypriv.max_roaming_times); -+ } else -+ rtw_set_to_roam(adapter, 0); -+#endif /* CONFIG_LAYER2_ROAMING */ -+ -+ rtw_free_uc_swdec_pending_queue(adapter); -+ -+ rtw_free_assoc_resources(adapter, _TRUE); -+ rtw_free_mlme_priv_ie_data(pmlmepriv); -+ -+ rtw_indicate_disconnect(adapter, *(u16 *)pstadel->rsvd, pstadel->locally_generated); -+ -+ _rtw_roaming(adapter, roam_target); -+ } -+ -+#ifdef CONFIG_AP_MODE -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) || -+ check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { -+ -+ /* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ rtw_free_stainfo(adapter, psta); -+ /* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ -+ if (adapter->stapriv.asoc_sta_count == 1) { /* a sta + bc/mc_stainfo (not Ibss_stainfo) */ -+ /* rtw_indicate_disconnect(adapter); */ /* removed@20091105 */ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ /* free old ibss network */ -+ /* pwlan = _rtw_find_network(&pmlmepriv->scanned_queue, pstadel->macaddr); */ -+ pwlan = _rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); -+ if (pwlan) { -+ pwlan->fixed = _FALSE; -+ rtw_free_network_nolock(adapter, pwlan); -+ } -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ /* re-create ibss */ -+ pdev_network = &(adapter->registrypriv.dev_network); -+ pibss = adapter->registrypriv.dev_network.MacAddress; -+ -+ _rtw_memcpy(pdev_network, &tgt_network->network, get_WLAN_BSSID_EX_sz(&tgt_network->network)); -+ -+ _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); -+ _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); -+ -+ rtw_update_registrypriv_dev_network(adapter); -+ -+ rtw_generate_random_ibss(pibss); -+ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { -+ set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_STATE); -+ } -+ -+ if (rtw_create_ibss_cmd(adapter, 0) != _SUCCESS) -+ RTW_ERR("rtw_create_ibss_cmd FAIL\n"); -+ -+ } -+ -+ } -+#endif /* CONFIG_AP_MODE */ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL2); -+exit: -+ #ifdef CONFIG_RTS_FULL_BW -+ rtw_set_rts_bw(adapter); -+ #endif/*CONFIG_RTS_FULL_BW*/ -+ return; -+} -+ -+void rtw_wmm_event_callback(PADAPTER padapter, u8 *pbuf) -+{ -+ -+ WMMOnAssocRsp(padapter); -+ -+ -+} -+ -+/* -+* rtw_join_timeout_handler - Timeout/failure handler for CMD JoinBss -+*/ -+void rtw_join_timeout_handler(void *ctx) -+{ -+ _adapter *adapter = (_adapter *)ctx; -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ -+#if 0 -+ if (rtw_is_drv_stopped(adapter)) { -+ _rtw_up_sema(&pmlmepriv->assoc_terminate); -+ return; -+ } -+#endif -+ -+ -+ -+ RTW_INFO("%s, fw_state=%x\n", __FUNCTION__, get_fwstate(pmlmepriv)); -+ -+ if (RTW_CANNOT_RUN(adapter)) -+ return; -+ -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+#ifdef CONFIG_LAYER2_ROAMING -+ if (rtw_to_roam(adapter) > 0) { /* join timeout caused by roaming */ -+ while (1) { -+ rtw_dec_to_roam(adapter); -+ if (rtw_to_roam(adapter) != 0) { /* try another */ -+ int do_join_r; -+ RTW_INFO("%s try another roaming\n", __FUNCTION__); -+ do_join_r = rtw_do_join(adapter); -+ if (_SUCCESS != do_join_r) { -+ RTW_INFO("%s roaming do_join return %d\n", __FUNCTION__ , do_join_r); -+ continue; -+ } -+ break; -+ } else { -+ RTW_INFO("%s We've try roaming but fail\n", __FUNCTION__); -+#ifdef CONFIG_RTW_80211R -+ rtw_ft_clr_flags(adapter, RTW_FT_PEER_EN|RTW_FT_PEER_OTD_EN); -+ rtw_ft_reset_status(adapter); -+#endif -+ rtw_indicate_disconnect(adapter, pmlmepriv->join_status, _FALSE); -+ break; -+ } -+ } -+ -+ } else -+#endif -+ { -+ rtw_indicate_disconnect(adapter, pmlmepriv->join_status, _FALSE); -+ free_scanqueue(pmlmepriv);/* ??? */ -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ /* indicate disconnect for the case that join_timeout and check_fwstate != FW_LINKED */ -+ rtw_cfg80211_indicate_disconnect(adapter, pmlmepriv->join_status, _FALSE); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ } -+ -+ pmlmepriv->join_status = 0; /* reset */ -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ -+#ifdef CONFIG_DRVEXT_MODULE_WSC -+ drvext_assoc_fail_indicate(&adapter->drvextpriv); -+#endif -+ -+ -+ -+} -+ -+/* -+* rtw_scan_timeout_handler - Timeout/Faliure handler for CMD SiteSurvey -+* @adapter: pointer to _adapter structure -+*/ -+void rtw_scan_timeout_handler(void *ctx) -+{ -+ _adapter *adapter = (_adapter *)ctx; -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ RTW_INFO(FUNC_ADPT_FMT" fw_state=%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv)); -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_SURVEY); -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_surveydone_event_callback(adapter); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ rtw_indicate_scan_done(adapter, _TRUE); -+ -+#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_IOCTL_CFG80211) -+ rtw_cfg80211_indicate_scan_done_for_buddy(adapter, _TRUE); -+#endif -+} -+ -+void rtw_mlme_reset_auto_scan_int(_adapter *adapter, u8 *reason) -+{ -+#if defined(CONFIG_RTW_MESH) && defined(CONFIG_DFS_MASTER) -+#if CONFIG_RTW_MESH_OFFCH_CAND -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+#endif -+#endif -+ u8 u_ch; -+ u32 interval_ms = 0xffffffff; /* 0xffffffff: special value to make min() works well, also means no auto scan */ -+ -+ *reason = RTW_AUTO_SCAN_REASON_UNSPECIFIED; -+ rtw_mi_get_ch_setting_union(adapter, &u_ch, NULL, NULL); -+ -+ if (hal_chk_bw_cap(adapter, BW_CAP_40M) -+ && is_client_associated_to_ap(adapter) == _TRUE -+ && u_ch >= 1 && u_ch <= 14 -+ && adapter->registrypriv.wifi_spec -+ /* TODO: AP Connected is 40MHz capability? */ -+ ) { -+ interval_ms = rtw_min(interval_ms, 60 * 1000); -+ *reason |= RTW_AUTO_SCAN_REASON_2040_BSS; -+ } -+ -+#ifdef CONFIG_RTW_MESH -+ #if CONFIG_RTW_MESH_OFFCH_CAND -+ if (adapter->mesh_cfg.peer_sel_policy.offch_find_int_ms -+ && rtw_mesh_offch_candidate_accepted(adapter) -+ #ifdef CONFIG_DFS_MASTER -+ && (!rfctl->radar_detect_ch || (IS_CH_WAITING(rfctl) && !IS_UNDER_CAC(rfctl))) -+ #endif -+ ) { -+ interval_ms = rtw_min(interval_ms, adapter->mesh_cfg.peer_sel_policy.offch_find_int_ms); -+ *reason |= RTW_AUTO_SCAN_REASON_MESH_OFFCH_CAND; -+ } -+ #endif -+#endif /* CONFIG_RTW_MESH */ -+ -+ if (interval_ms == 0xffffffff) -+ interval_ms = 0; -+ -+ rtw_mlme_set_auto_scan_int(adapter, interval_ms); -+ return; -+} -+ -+void rtw_drv_scan_by_self(_adapter *padapter, u8 reason) -+{ -+ struct sitesurvey_parm parm; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ int i; -+#if 1 -+ u8 ssc_chk; -+ -+ ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); -+ if( ssc_chk == SS_DENY_BUSY_TRAFFIC) { -+ #ifdef CONFIG_LAYER2_ROAMING -+ if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE) && pmlmepriv->need_to_roam == _TRUE) -+ RTW_INFO(FUNC_ADPT_FMT" need to roam, don't care BusyTraffic\n", FUNC_ADPT_ARG(padapter)); -+ else -+ #endif -+ { -+ RTW_INFO(FUNC_ADPT_FMT" exit BusyTraffic\n", FUNC_ADPT_ARG(padapter)); -+ goto exit; -+ } -+ } -+ else if (ssc_chk != SS_ALLOW) -+ goto exit; -+ -+ if (!rtw_is_adapter_up(padapter)) -+ goto exit; -+#else -+ if (rtw_is_scan_deny(padapter)) -+ goto exit; -+ -+ if (!rtw_is_adapter_up(padapter)) -+ goto exit; -+ -+ if (rtw_mi_busy_traffic_check(padapter)) { -+#ifdef CONFIG_LAYER2_ROAMING -+ if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE) && pmlmepriv->need_to_roam == _TRUE) { -+ RTW_INFO("need to roam, don't care BusyTraffic\n"); -+ } else -+#endif -+ { -+ RTW_INFO(FUNC_ADPT_FMT" exit BusyTraffic\n", FUNC_ADPT_ARG(padapter)); -+ goto exit; -+ } -+ } -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) && check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { -+ RTW_INFO(FUNC_ADPT_FMT" WIFI_AP_STATE && WIFI_UNDER_WPS\n", FUNC_ADPT_ARG(padapter)); -+ goto exit; -+ } -+ if (check_fwstate(pmlmepriv, (WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING)) == _TRUE) { -+ RTW_INFO(FUNC_ADPT_FMT" WIFI_UNDER_SURVEY|WIFI_UNDER_LINKING\n", FUNC_ADPT_ARG(padapter)); -+ goto exit; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, (WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING | WIFI_UNDER_WPS))) { -+ RTW_INFO(FUNC_ADPT_FMT", but buddy_intf is under scanning or linking or wps_phase\n", FUNC_ADPT_ARG(padapter)); -+ goto exit; -+ } -+#endif -+#endif -+ -+ RTW_INFO(FUNC_ADPT_FMT" reason:0x%02x\n", FUNC_ADPT_ARG(padapter), reason); -+ -+ /* only for 20/40 BSS */ -+ if (reason == RTW_AUTO_SCAN_REASON_2040_BSS) { -+ rtw_init_sitesurvey_parm(padapter, &parm); -+ for (i=0;i<14;i++) { -+ parm.ch[i].hw_value = i + 1; -+ parm.ch[i].flags = RTW_IEEE80211_CHAN_PASSIVE_SCAN; -+ } -+ parm.ch_num = 14; -+ rtw_set_802_11_bssid_list_scan(padapter, &parm); -+ goto exit; -+ } -+ -+#if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K) -+ if ((reason == RTW_AUTO_SCAN_REASON_ROAM) -+ && (rtw_roam_nb_scan_list_set(padapter, &parm))) -+ goto exit; -+#endif -+ -+ rtw_set_802_11_bssid_list_scan(padapter, NULL); -+exit: -+ return; -+} -+ -+static void rtw_auto_scan_handler(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ u8 reason = RTW_AUTO_SCAN_REASON_UNSPECIFIED; -+ -+ rtw_mlme_reset_auto_scan_int(padapter, &reason); -+ -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) -+ goto exit; -+#endif -+ -+#ifdef CONFIG_TDLS -+ if (padapter->tdlsinfo.link_established == _TRUE) -+ goto exit; -+#endif -+ -+ if (pmlmepriv->auto_scan_int_ms == 0 -+ || rtw_get_passing_time_ms(pmlmepriv->scan_start_time) < pmlmepriv->auto_scan_int_ms) -+ goto exit; -+ -+ rtw_drv_scan_by_self(padapter, reason); -+ -+exit: -+ return; -+} -+static u8 is_drv_in_lps(_adapter *adapter) -+{ -+ u8 is_in_lps = _FALSE; -+ -+ #ifdef CONFIG_LPS_LCLK_WD_TIMER /* to avoid leaving lps 32k frequently*/ -+ if ((adapter_to_pwrctl(adapter)->bFwCurrentInPSMode == _TRUE) -+ #ifdef CONFIG_BT_COEXIST -+ && (rtw_btcoex_IsBtControlLps(adapter) == _FALSE) -+ #endif -+ ) -+ is_in_lps = _TRUE; -+ #endif /* CONFIG_LPS_LCLK_WD_TIMER*/ -+ return is_in_lps; -+} -+void rtw_iface_dynamic_check_timer_handlder(_adapter *adapter) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ -+ if (adapter->net_closed == _TRUE) -+ return; -+ #ifdef CONFIG_LPS_LCLK_WD_TIMER /* to avoid leaving lps 32k frequently*/ -+ if (is_drv_in_lps(adapter)) { -+ u8 bEnterPS; -+ -+ linked_status_chk(adapter, 1); -+ -+ bEnterPS = traffic_status_watchdog(adapter, 1); -+ if (bEnterPS) { -+ /* rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 0); */ -+ rtw_hal_dm_watchdog_in_lps(adapter); -+ } else { -+ /* call rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 0) in traffic_status_watchdog() */ -+ } -+ } -+ #endif /* CONFIG_LPS_LCLK_WD_TIMER */ -+ -+ /* auto site survey */ -+ rtw_auto_scan_handler(adapter); -+ -+#ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(adapter)|| MLME_IS_MESH(adapter)) { -+ #ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ expire_timeout_chk(adapter); -+ #endif /* !CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ -+ -+ #ifdef CONFIG_BMC_TX_RATE_SELECT -+ rtw_update_bmc_sta_tx_rate(adapter); -+ #endif /*CONFIG_BMC_TX_RATE_SELECT*/ -+ } -+#endif /*CONFIG_AP_MODE*/ -+ -+ -+#ifdef CONFIG_BR_EXT -+if (!adapter_use_wds(adapter)) { -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) -+ rcu_read_lock(); -+#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) */ -+ -+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) -+ if (adapter->pnetdev->br_port -+#else /* (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) */ -+ if (rcu_dereference(adapter->pnetdev->rx_handler_data) -+#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) */ -+ && (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE) == _TRUE)) { -+ /* expire NAT2.5 entry */ -+ void nat25_db_expire(_adapter *priv); -+ nat25_db_expire(adapter); -+ -+ if (adapter->pppoe_connection_in_progress > 0) -+ adapter->pppoe_connection_in_progress--; -+ /* due to rtw_dynamic_check_timer_handlder() is called every 2 seconds */ -+ if (adapter->pppoe_connection_in_progress > 0) -+ adapter->pppoe_connection_in_progress--; -+ } -+ -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) -+ rcu_read_unlock(); -+#endif /* (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) */ -+} -+#endif /* CONFIG_BR_EXT */ -+ -+} -+ -+/*TP_avg(t) = (1/10) * TP_avg(t-1) + (9/10) * TP(t) MBps*/ -+static void collect_sta_traffic_statistics(_adapter *adapter) -+{ -+ struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; -+ struct sta_info *sta; -+ u64 curr_tx_bytes = 0, curr_rx_bytes = 0; -+ u32 curr_tx_mbytes = 0, curr_rx_mbytes = 0; -+ int i; -+ -+ for (i = 0; i < MACID_NUM_SW_LIMIT; i++) { -+ sta = macid_ctl->sta[i]; -+ if (sta && !is_broadcast_mac_addr(sta->cmn.mac_addr)) { -+ if (sta->sta_stats.last_tx_bytes > sta->sta_stats.tx_bytes) -+ sta->sta_stats.last_tx_bytes = sta->sta_stats.tx_bytes; -+ if (sta->sta_stats.last_rx_bytes > sta->sta_stats.rx_bytes) -+ sta->sta_stats.last_rx_bytes = sta->sta_stats.rx_bytes; -+ if (sta->sta_stats.last_rx_bc_bytes > sta->sta_stats.rx_bc_bytes) -+ sta->sta_stats.last_rx_bc_bytes = sta->sta_stats.rx_bc_bytes; -+ if (sta->sta_stats.last_rx_mc_bytes > sta->sta_stats.rx_mc_bytes) -+ sta->sta_stats.last_rx_mc_bytes = sta->sta_stats.rx_mc_bytes; -+ -+ curr_tx_bytes = sta->sta_stats.tx_bytes - sta->sta_stats.last_tx_bytes; -+ curr_rx_bytes = sta->sta_stats.rx_bytes - sta->sta_stats.last_rx_bytes; -+ sta->sta_stats.tx_tp_kbits = (curr_tx_bytes * 8 / 2) >> 10;/*Kbps*/ -+ sta->sta_stats.rx_tp_kbits = (curr_rx_bytes * 8 / 2) >> 10;/*Kbps*/ -+ -+ sta->sta_stats.smooth_tx_tp_kbits = (sta->sta_stats.smooth_tx_tp_kbits * 6 / 10) + (sta->sta_stats.tx_tp_kbits * 4 / 10);/*Kbps*/ -+ sta->sta_stats.smooth_rx_tp_kbits = (sta->sta_stats.smooth_rx_tp_kbits * 6 / 10) + (sta->sta_stats.rx_tp_kbits * 4 / 10);/*Kbps*/ -+ -+ curr_tx_mbytes = (curr_tx_bytes / 2) >> 20;/*MBps*/ -+ curr_rx_mbytes = (curr_rx_bytes / 2) >> 20;/*MBps*/ -+ -+ sta->cmn.tx_moving_average_tp = -+ (sta->cmn.tx_moving_average_tp / 10) + (curr_tx_mbytes * 9 / 10); /*MBps*/ -+ -+ sta->cmn.rx_moving_average_tp = -+ (sta->cmn.rx_moving_average_tp / 10) + (curr_rx_mbytes * 9 /10); /*MBps*/ -+ -+ rtw_collect_bcn_info(sta->padapter); -+ -+ if (adapter->bsta_tp_dump) -+ dump_sta_traffic(RTW_DBGDUMP, adapter, sta); -+ -+ sta->sta_stats.last_tx_bytes = sta->sta_stats.tx_bytes; -+ sta->sta_stats.last_rx_bytes = sta->sta_stats.rx_bytes; -+ sta->sta_stats.last_rx_bc_bytes = sta->sta_stats.rx_bc_bytes; -+ sta->sta_stats.last_rx_mc_bytes = sta->sta_stats.rx_mc_bytes; -+ } -+ } -+} -+ -+void rtw_sta_traffic_info(void *sel, _adapter *adapter) -+{ -+ struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; -+ struct sta_info *sta; -+ int i; -+ -+ for (i = 0; i < MACID_NUM_SW_LIMIT; i++) { -+ sta = macid_ctl->sta[i]; -+ if (sta && !is_broadcast_mac_addr(sta->cmn.mac_addr)) -+ dump_sta_traffic(sel, adapter, sta); -+ } -+} -+ -+/*#define DBG_TRAFFIC_STATISTIC*/ -+static void collect_traffic_statistics(_adapter *padapter) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ -+ /*_rtw_memset(&pdvobjpriv->traffic_stat, 0, sizeof(struct rtw_traffic_statistics));*/ -+ -+ /* Tx bytes reset*/ -+ pdvobjpriv->traffic_stat.tx_bytes = 0; -+ pdvobjpriv->traffic_stat.tx_pkts = 0; -+ pdvobjpriv->traffic_stat.tx_drop = 0; -+ -+ /* Rx bytes reset*/ -+ pdvobjpriv->traffic_stat.rx_bytes = 0; -+ pdvobjpriv->traffic_stat.rx_pkts = 0; -+ pdvobjpriv->traffic_stat.rx_drop = 0; -+ -+ rtw_mi_traffic_statistics(padapter); -+ -+ /* Calculate throughput in last interval */ -+ pdvobjpriv->traffic_stat.cur_tx_bytes = pdvobjpriv->traffic_stat.tx_bytes - pdvobjpriv->traffic_stat.last_tx_bytes; -+ pdvobjpriv->traffic_stat.cur_rx_bytes = pdvobjpriv->traffic_stat.rx_bytes - pdvobjpriv->traffic_stat.last_rx_bytes; -+ pdvobjpriv->traffic_stat.last_tx_bytes = pdvobjpriv->traffic_stat.tx_bytes; -+ pdvobjpriv->traffic_stat.last_rx_bytes = pdvobjpriv->traffic_stat.rx_bytes; -+ -+ pdvobjpriv->traffic_stat.cur_tx_tp = (u32)(pdvobjpriv->traffic_stat.cur_tx_bytes * 8 / 2 / 1024 / 1024);/*Mbps*/ -+ pdvobjpriv->traffic_stat.cur_rx_tp = (u32)(pdvobjpriv->traffic_stat.cur_rx_bytes * 8 / 2 / 1024 / 1024);/*Mbps*/ -+ -+ #ifdef DBG_TRAFFIC_STATISTIC -+ RTW_INFO("\n========================\n"); -+ RTW_INFO("cur_tx_bytes:%lld\n", pdvobjpriv->traffic_stat.cur_tx_bytes); -+ RTW_INFO("cur_rx_bytes:%lld\n", pdvobjpriv->traffic_stat.cur_rx_bytes); -+ -+ RTW_INFO("last_tx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_tx_bytes); -+ RTW_INFO("last_rx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_rx_bytes); -+ -+ RTW_INFO("cur_tx_tp:%d (Mbps)\n", pdvobjpriv->traffic_stat.cur_tx_tp); -+ RTW_INFO("cur_rx_tp:%d (Mbps)\n", pdvobjpriv->traffic_stat.cur_rx_tp); -+ #endif -+ -+#ifdef CONFIG_RTW_NAPI -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+ dynamic_napi_th_chk (padapter); -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+#endif -+ -+} -+ -+void rtw_dynamic_check_timer_handlder(void *ctx) -+{ -+ struct dvobj_priv *pdvobj = (struct dvobj_priv *)ctx; -+ _adapter *adapter = dvobj_get_primary_adapter(pdvobj); -+ -+ if (!adapter) -+ goto exit; -+ -+#if (MP_DRIVER == 1) -+ if (adapter->registrypriv.mp_mode == 1 && adapter->mppriv.mp_dm == 0) { /* for MP ODM dynamic Tx power tracking */ -+ /* RTW_INFO("%s mp_dm =0 return\n", __func__); */ -+ goto exit; -+ } -+#endif -+ -+ if (!rtw_is_hw_init_completed(adapter)) -+ goto exit; -+ -+ if (RTW_CANNOT_RUN(adapter)) -+ goto exit; -+ -+ collect_traffic_statistics(adapter); -+ collect_sta_traffic_statistics(adapter); -+ rtw_mi_dynamic_check_timer_handlder(adapter); -+ -+ if (!is_drv_in_lps(adapter)) -+ rtw_dynamic_chk_wk_cmd(adapter); -+ -+exit: -+ _set_timer(&pdvobj->dynamic_chk_timer, 2000); -+} -+ -+ -+#ifdef CONFIG_SET_SCAN_DENY_TIMER -+inline bool rtw_is_scan_deny(_adapter *adapter) -+{ -+ struct mlme_priv *mlmepriv = &adapter->mlmepriv; -+ return (ATOMIC_READ(&mlmepriv->set_scan_deny) != 0) ? _TRUE : _FALSE; -+} -+ -+inline void rtw_clear_scan_deny(_adapter *adapter) -+{ -+ struct mlme_priv *mlmepriv = &adapter->mlmepriv; -+ ATOMIC_SET(&mlmepriv->set_scan_deny, 0); -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); -+} -+ -+void rtw_set_scan_deny_timer_hdl(void *ctx) -+{ -+ _adapter *adapter = (_adapter *)ctx; -+ -+ rtw_clear_scan_deny(adapter); -+} -+void rtw_set_scan_deny(_adapter *adapter, u32 ms) -+{ -+ struct mlme_priv *mlmepriv = &adapter->mlmepriv; -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); -+ ATOMIC_SET(&mlmepriv->set_scan_deny, 1); -+ _set_timer(&mlmepriv->set_scan_deny_timer, ms); -+} -+#endif -+ -+#ifdef CONFIG_LAYER2_ROAMING -+/* -+* Select a new roaming candidate from the original @param candidate and @param competitor -+* @return _TRUE: candidate is updated -+* @return _FALSE: candidate is not updated -+*/ -+static int rtw_check_roaming_candidate(struct mlme_priv *mlme -+ , struct wlan_network **candidate, struct wlan_network *competitor) -+{ -+ int updated = _FALSE; -+ _adapter *adapter = container_of(mlme, _adapter, mlmepriv); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ u8 ch = competitor->network.Configuration.DSConfig; -+ -+ if (rtw_chset_search_ch(chset, ch) < 0) -+ goto exit; -+ if (IS_DFS_SLAVE_WITH_RD(rfctl) -+ && !rtw_rfctl_dfs_domain_unknown(rfctl) -+ && rtw_chset_is_ch_non_ocp(chset, ch)) -+ goto exit; -+ -+#if defined(CONFIG_RTW_REPEATER_SON) && (!defined(CONFIG_RTW_REPEATER_SON_ROOT)) -+ if (rtw_rson_isupdate_roamcan(mlme, candidate, competitor)) -+ goto update; -+ goto exit; -+#endif -+ -+ if (is_same_ess(&competitor->network, &mlme->cur_network.network) == _FALSE) -+ goto exit; -+ -+ if (rtw_is_desired_network(adapter, competitor) == _FALSE) -+ goto exit; -+ -+#ifdef CONFIG_LAYER2_ROAMING -+ if (mlme->need_to_roam == _FALSE) -+ goto exit; -+#endif -+ -+ RTW_INFO("roam candidate:%s %s("MAC_FMT", ch%3u) rssi:%d dBm, age:%5d\n", -+ (competitor == mlme->cur_network_scanned) ? "*" : " " , -+ competitor->network.Ssid.Ssid, -+ MAC_ARG(competitor->network.MacAddress), -+ competitor->network.Configuration.DSConfig, -+ (int)competitor->network.Rssi, -+ rtw_get_passing_time_ms(competitor->last_scanned) -+ ); -+ -+ /* got specific addr to roam */ -+ if (!is_zero_mac_addr(mlme->roam_tgt_addr)) { -+ if (_rtw_memcmp(mlme->roam_tgt_addr, competitor->network.MacAddress, ETH_ALEN) == _TRUE) -+ goto update; -+ else -+ goto exit; -+ } -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_chk_flags(adapter, RTW_FT_PEER_EN)) { -+ if (rtw_ft_chk_roaming_candidate(adapter, competitor) == _FALSE) -+ goto exit; -+ } -+ -+#ifdef CONFIG_RTW_WNM -+ if (rtw_wnm_btm_diff_bss(adapter) && -+ rtw_wnm_btm_roam_candidate(adapter, competitor)) { -+ goto update; -+ } -+#endif -+#endif -+ -+#if 1 -+ if (rtw_get_passing_time_ms(competitor->last_scanned) >= mlme->roam_scanr_exp_ms) -+ goto exit; -+ -+ if (competitor->network.Rssi - mlme->cur_network_scanned->network.Rssi < mlme->roam_rssi_diff_th) -+ goto exit; -+ -+ if (*candidate != NULL && (*candidate)->network.Rssi >= competitor->network.Rssi) -+ goto exit; -+#else -+ goto exit; -+#endif -+ -+update: -+ *candidate = competitor; -+ updated = _TRUE; -+ -+exit: -+ return updated; -+} -+ -+int rtw_select_roaming_candidate(struct mlme_priv *mlme) -+{ -+ _irqL irqL; -+ int ret = _FAIL; -+ _list *phead; -+ _adapter *adapter; -+ _queue *queue = &(mlme->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ struct wlan_network *candidate = NULL; -+ -+ if (mlme->cur_network_scanned == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ _enter_critical_bh(&(mlme->scanned_queue.lock), &irqL); -+ phead = get_list_head(queue); -+ adapter = (_adapter *)mlme->nic_hdl; -+ -+ mlme->pscanned = get_next(phead); -+ -+ while (!rtw_end_of_queue_search(phead, mlme->pscanned)) { -+ -+ pnetwork = LIST_CONTAINOR(mlme->pscanned, struct wlan_network, list); -+ if (pnetwork == NULL) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ mlme->pscanned = get_next(mlme->pscanned); -+ -+ if (0) -+ RTW_INFO("%s("MAC_FMT", ch%u) rssi:%d\n" -+ , pnetwork->network.Ssid.Ssid -+ , MAC_ARG(pnetwork->network.MacAddress) -+ , pnetwork->network.Configuration.DSConfig -+ , (int)pnetwork->network.Rssi); -+ -+ rtw_check_roaming_candidate(mlme, &candidate, pnetwork); -+ -+ } -+ -+ if (candidate == NULL) { -+ /* if parent note lost the path to root and there is no other cadidate, report disconnection */ -+#if defined(CONFIG_RTW_REPEATER_SON) && (!defined(CONFIG_RTW_REPEATER_SON_ROOT)) -+ struct rtw_rson_struct rson_curr; -+ u8 rson_score; -+ -+ rtw_get_rson_struct(&(mlme->cur_network_scanned->network), &rson_curr); -+ rson_score = rtw_cal_rson_score(&rson_curr, mlme->cur_network_scanned->network.Rssi); -+ if (check_fwstate(mlme, WIFI_ASOC_STATE) -+ && ((rson_score == RTW_RSON_SCORE_NOTCNNT) -+ || (rson_score == RTW_RSON_SCORE_NOTSUP))) -+ receive_disconnect(adapter, mlme->cur_network_scanned->network.MacAddress -+ , WLAN_REASON_EXPIRATION_CHK, _FALSE); -+#endif -+ RTW_INFO("%s: return _FAIL(candidate == NULL)\n", __FUNCTION__); -+ ret = _FAIL; -+ goto exit; -+ } else { -+#if defined(CONFIG_RTW_REPEATER_SON) && (!defined(CONFIG_RTW_REPEATER_SON_ROOT)) -+ struct rtw_rson_struct rson_curr; -+ u8 rson_score; -+ -+ rtw_get_rson_struct(&(candidate->network), &rson_curr); -+ rson_score = rtw_cal_rson_score(&rson_curr, candidate->network.Rssi); -+ RTW_INFO("%s: candidate: %s("MAC_FMT", ch:%u) rson_score:%d\n", __FUNCTION__, -+ candidate->network.Ssid.Ssid, MAC_ARG(candidate->network.MacAddress), -+ candidate->network.Configuration.DSConfig, rson_score); -+#else -+ RTW_INFO("%s: candidate: %s("MAC_FMT", ch:%u)\n", __FUNCTION__, -+ candidate->network.Ssid.Ssid, MAC_ARG(candidate->network.MacAddress), -+ candidate->network.Configuration.DSConfig); -+#endif -+ mlme->roam_network = candidate; -+ -+ if (_rtw_memcmp(candidate->network.MacAddress, mlme->roam_tgt_addr, ETH_ALEN) == _TRUE) -+ _rtw_memset(mlme->roam_tgt_addr, 0, ETH_ALEN); -+ } -+ -+ ret = _SUCCESS; -+exit: -+ _exit_critical_bh(&(mlme->scanned_queue.lock), &irqL); -+ -+ return ret; -+} -+#endif /* CONFIG_LAYER2_ROAMING */ -+ -+/* -+* Select a new join candidate from the original @param candidate and @param competitor -+* @return _TRUE: candidate is updated -+* @return _FALSE: candidate is not updated -+*/ -+static int rtw_check_join_candidate(struct mlme_priv *mlme -+ , struct wlan_network **candidate, struct wlan_network *competitor) -+{ -+ int updated = _FALSE; -+ _adapter *adapter = container_of(mlme, _adapter, mlmepriv); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ u8 ch = competitor->network.Configuration.DSConfig; -+ -+ if (rtw_chset_search_ch(chset, ch) < 0) -+ goto exit; -+ if (IS_DFS_SLAVE_WITH_RD(rfctl) -+ && !rtw_rfctl_dfs_domain_unknown(rfctl) -+ && rtw_chset_is_ch_non_ocp(chset, ch)) -+ goto exit; -+ -+#if defined(CONFIG_RTW_REPEATER_SON) && (!defined(CONFIG_RTW_REPEATER_SON_ROOT)) -+ s16 rson_score; -+ struct rtw_rson_struct rson_data; -+ -+ if (rtw_rson_choose(candidate, competitor)) { -+ *candidate = competitor; -+ rtw_get_rson_struct(&((*candidate)->network), &rson_data); -+ rson_score = rtw_cal_rson_score(&rson_data, (*candidate)->network.Rssi); -+ RTW_INFO("[assoc_ssid:%s] new candidate: %s("MAC_FMT", ch%u) rson_score:%d\n", -+ mlme->assoc_ssid.Ssid, -+ (*candidate)->network.Ssid.Ssid, -+ MAC_ARG((*candidate)->network.MacAddress), -+ (*candidate)->network.Configuration.DSConfig, -+ rson_score); -+ return _TRUE; -+ } -+ return _FALSE; -+#endif -+ -+ /* check bssid, if needed */ -+ if (mlme->assoc_by_bssid == _TRUE) { -+ if (_rtw_memcmp(competitor->network.MacAddress, mlme->assoc_bssid, ETH_ALEN) == _FALSE) -+ goto exit; -+ } -+ -+ /* check ssid, if needed */ -+ if (mlme->assoc_ssid.Ssid[0] && mlme->assoc_ssid.SsidLength) { -+ if (competitor->network.Ssid.SsidLength != mlme->assoc_ssid.SsidLength -+ || _rtw_memcmp(competitor->network.Ssid.Ssid, mlme->assoc_ssid.Ssid, mlme->assoc_ssid.SsidLength) == _FALSE -+ ) -+ goto exit; -+ } -+ -+ if (rtw_is_desired_network(adapter, competitor) == _FALSE) -+ goto exit; -+ -+#ifdef CONFIG_LAYER2_ROAMING -+ if (rtw_to_roam(adapter) > 0) { -+ if (rtw_get_passing_time_ms(competitor->last_scanned) >= mlme->roam_scanr_exp_ms -+ || is_same_ess(&competitor->network, &mlme->cur_network.network) == _FALSE -+ ) -+ goto exit; -+ } -+#endif -+ -+ if (*candidate == NULL || (*candidate)->network.Rssi < competitor->network.Rssi) { -+ *candidate = competitor; -+ updated = _TRUE; -+ } -+ -+ if (updated) { -+ RTW_INFO("[by_bssid:%u][assoc_ssid:%s][to_roam:%u] " -+ "new candidate: %s("MAC_FMT", ch%u) rssi:%d dBm\n", -+ mlme->assoc_by_bssid, -+ mlme->assoc_ssid.Ssid, -+ rtw_to_roam(adapter), -+ (*candidate)->network.Ssid.Ssid, -+ MAC_ARG((*candidate)->network.MacAddress), -+ (*candidate)->network.Configuration.DSConfig, -+ (int)(*candidate)->network.Rssi -+ ); -+ } -+ -+exit: -+ return updated; -+} -+ -+/* -+Calling context: -+The caller of the sub-routine will be in critical section... -+ -+The caller must hold the following spinlock -+ -+pmlmepriv->lock -+ -+ -+*/ -+ -+int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv) -+{ -+ _irqL irqL; -+ int ret; -+ _list *phead; -+ _adapter *adapter; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ struct wlan_network *candidate = NULL; -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ u8 bSupportAntDiv = _FALSE; -+#endif -+ -+ adapter = (_adapter *)pmlmepriv->nic_hdl; -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+#ifdef CONFIG_LAYER2_ROAMING -+ if (pmlmepriv->roam_network) { -+ candidate = pmlmepriv->roam_network; -+ pmlmepriv->roam_network = NULL; -+ goto candidate_exist; -+ } -+#endif -+ -+ phead = get_list_head(queue); -+ pmlmepriv->pscanned = get_next(phead); -+ -+ while (!rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) { -+ -+ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); -+ if (pnetwork == NULL) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); -+ -+ if (0) -+ RTW_INFO("%s("MAC_FMT", ch%u) rssi:%d\n" -+ , pnetwork->network.Ssid.Ssid -+ , MAC_ARG(pnetwork->network.MacAddress) -+ , pnetwork->network.Configuration.DSConfig -+ , (int)pnetwork->network.Rssi); -+ -+ rtw_check_join_candidate(pmlmepriv, &candidate, pnetwork); -+ -+ } -+ -+ if (candidate == NULL) { -+ RTW_INFO("%s: return _FAIL(candidate == NULL)\n", __FUNCTION__); -+#ifdef CONFIG_WOWLAN -+ _clr_fwstate_(pmlmepriv, WIFI_ASOC_STATE | WIFI_UNDER_LINKING); -+#endif -+ ret = _FAIL; -+ goto exit; -+ } else { -+ RTW_INFO("%s: candidate: %s("MAC_FMT", ch:%u)\n", __FUNCTION__, -+ candidate->network.Ssid.Ssid, MAC_ARG(candidate->network.MacAddress), -+ candidate->network.Configuration.DSConfig); -+ goto candidate_exist; -+ } -+ -+candidate_exist: -+ -+ /* check for situation of WIFI_ASOC_STATE */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ RTW_INFO("%s: WIFI_ASOC_STATE while ask_for_joinbss!!!\n", __FUNCTION__); -+ -+#if 0 /* for WPA/WPA2 authentication, wpa_supplicant will expect authentication from AP, it is needed to reconnect AP... */ -+ if (is_same_network(&pmlmepriv->cur_network.network, &candidate->network)) { -+ RTW_INFO("%s: WIFI_ASOC_STATE and is same network, it needn't join again\n", __FUNCTION__); -+ -+ rtw_indicate_connect(adapter);/* rtw_indicate_connect again */ -+ -+ ret = 2; -+ goto exit; -+ } else -+#endif -+ { -+ rtw_disassoc_cmd(adapter, 0, 0); -+ rtw_indicate_disconnect(adapter, 0, _FALSE); -+ rtw_free_assoc_resources_cmd(adapter, _TRUE, 0); -+ } -+ } -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ rtw_hal_get_def_var(adapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); -+ if (_TRUE == bSupportAntDiv) { -+ u8 CurrentAntenna; -+ rtw_hal_get_odm_var(adapter, HAL_ODM_ANTDIV_SELECT, &(CurrentAntenna), NULL); -+ RTW_INFO("#### Opt_Ant_(%s) , cur_Ant(%s)\n", -+ (MAIN_ANT == candidate->network.PhyInfo.Optimum_antenna) ? "MAIN_ANT" : "AUX_ANT", -+ (MAIN_ANT == CurrentAntenna) ? "MAIN_ANT" : "AUX_ANT" -+ ); -+ } -+#endif -+ set_fwstate(pmlmepriv, WIFI_UNDER_LINKING); -+ ret = rtw_joinbss_cmd(adapter, candidate); -+ -+exit: -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ -+ return ret; -+} -+ -+sint rtw_set_auth(_adapter *adapter, struct security_priv *psecuritypriv) -+{ -+ struct cmd_obj *pcmd; -+ struct setauth_parm *psetauthparm; -+ struct cmd_priv *pcmdpriv = &(adapter->cmdpriv); -+ sint res = _SUCCESS; -+ -+ -+ pcmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd == NULL) { -+ res = _FAIL; /* try again */ -+ goto exit; -+ } -+ -+ psetauthparm = (struct setauth_parm *)rtw_zmalloc(sizeof(struct setauth_parm)); -+ if (psetauthparm == NULL) { -+ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memset(psetauthparm, 0, sizeof(struct setauth_parm)); -+ psetauthparm->mode = (unsigned char)psecuritypriv->dot11AuthAlgrthm; -+ -+ pcmd->cmdcode = CMD_SET_AUTH; -+ pcmd->parmbuf = (unsigned char *)psetauthparm; -+ pcmd->cmdsz = (sizeof(struct setauth_parm)); -+ pcmd->rsp = NULL; -+ pcmd->rspsz = 0; -+ -+ -+ _rtw_init_listhead(&pcmd->list); -+ -+ -+ res = rtw_enqueue_cmd(pcmdpriv, pcmd); -+ -+exit: -+ -+ -+ return res; -+ -+} -+ -+ -+sint rtw_set_key(_adapter *adapter, struct security_priv *psecuritypriv, sint keyid, u8 set_tx, bool enqueue) -+{ -+ u8 keylen; -+ struct cmd_obj *pcmd; -+ struct setkey_parm *psetkeyparm; -+ struct cmd_priv *pcmdpriv = &(adapter->cmdpriv); -+ sint res = _SUCCESS; -+ -+ -+ psetkeyparm = (struct setkey_parm *)rtw_zmalloc(sizeof(struct setkey_parm)); -+ if (psetkeyparm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); -+ -+ if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { -+ psetkeyparm->algorithm = (unsigned char)psecuritypriv->dot118021XGrpPrivacy; -+ } else { -+ psetkeyparm->algorithm = (u8)psecuritypriv->dot11PrivacyAlgrthm; -+ -+ } -+ psetkeyparm->keyid = (u8)keyid;/* 0~3 */ -+ psetkeyparm->set_tx = set_tx; -+ if (is_wep_enc(psetkeyparm->algorithm)) -+ adapter->securitypriv.key_mask |= BIT(psetkeyparm->keyid); -+ -+ RTW_INFO("==> rtw_set_key algorithm(%x),keyid(%x),key_mask(%x)\n", psetkeyparm->algorithm, psetkeyparm->keyid, adapter->securitypriv.key_mask); -+ -+ switch (psetkeyparm->algorithm) { -+ -+ case _WEP40_: -+ keylen = 5; -+ _rtw_memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen); -+ break; -+ case _WEP104_: -+ keylen = 13; -+ _rtw_memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen); -+ break; -+ case _TKIP_: -+ keylen = 16; -+ _rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen); -+ break; -+ case _AES_: -+ case _GCMP_: -+ keylen = 16; -+ _rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen); -+ break; -+ case _GCMP_256_: -+ case _CCMP_256_: -+ keylen = 32; -+ _rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen); -+ break; -+ default: -+ res = _FAIL; -+ rtw_mfree((unsigned char *)psetkeyparm, sizeof(struct setkey_parm)); -+ goto exit; -+ } -+ -+ -+ if (enqueue) { -+ pcmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd == NULL) { -+ rtw_mfree((unsigned char *)psetkeyparm, sizeof(struct setkey_parm)); -+ res = _FAIL; /* try again */ -+ goto exit; -+ } -+ -+ pcmd->cmdcode =CMD_SET_KEY; -+ pcmd->parmbuf = (u8 *)psetkeyparm; -+ pcmd->cmdsz = (sizeof(struct setkey_parm)); -+ pcmd->rsp = NULL; -+ pcmd->rspsz = 0; -+ -+ _rtw_init_listhead(&pcmd->list); -+ -+ /* _rtw_init_sema(&(pcmd->cmd_sem), 0); */ -+ -+ res = rtw_enqueue_cmd(pcmdpriv, pcmd); -+ } else { -+ setkey_hdl(adapter, (u8 *)psetkeyparm); -+ rtw_mfree((u8 *) psetkeyparm, sizeof(struct setkey_parm)); -+ } -+exit: -+ return res; -+ -+} -+ -+#ifdef CONFIG_WMMPS_STA -+/* -+ * rtw_uapsd_use_default_setting -+ * This function is used for setting default uapsd max sp length to uapsd_max_sp_len -+ * in qos_priv data structure from registry. In additional, it will also map default uapsd -+ * ac to each uapsd TID, delivery-enabled and trigger-enabled of corresponding TID. -+ * -+ * Arguments: -+ * @padapter: _adapter pointer. -+ * -+ * Auther: Arvin Liu -+ * Date: 2017/05/03 -+ */ -+void rtw_uapsd_use_default_setting(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ -+ if (pregistrypriv->uapsd_ac_enable != 0) { -+ pqospriv->uapsd_max_sp_len = pregistrypriv->uapsd_max_sp_len; -+ -+ CLEAR_FLAGS(pqospriv->uapsd_tid); -+ CLEAR_FLAGS(pqospriv->uapsd_tid_delivery_enabled); -+ CLEAR_FLAGS(pqospriv->uapsd_tid_trigger_enabled); -+ -+ /* check the uapsd setting of AC_VO from registry then map these setting to each TID if necessary */ -+ if(TEST_FLAG(pregistrypriv->uapsd_ac_enable, DRV_CFG_UAPSD_VO)) { -+ SET_FLAG(pqospriv->uapsd_tid, WMM_TID7); -+ SET_FLAG(pqospriv->uapsd_tid_delivery_enabled, WMM_TID7); -+ SET_FLAG(pqospriv->uapsd_tid_trigger_enabled, WMM_TID7); -+ SET_FLAG(pqospriv->uapsd_tid, WMM_TID6); -+ SET_FLAG(pqospriv->uapsd_tid_delivery_enabled, WMM_TID6); -+ SET_FLAG(pqospriv->uapsd_tid_trigger_enabled, WMM_TID6); -+ } -+ -+ /* check the uapsd setting of AC_VI from registry then map these setting to each TID if necessary */ -+ if(TEST_FLAG(pregistrypriv->uapsd_ac_enable, DRV_CFG_UAPSD_VI)) { -+ SET_FLAG(pqospriv->uapsd_tid, WMM_TID5); -+ SET_FLAG(pqospriv->uapsd_tid_delivery_enabled, WMM_TID5); -+ SET_FLAG(pqospriv->uapsd_tid_trigger_enabled, WMM_TID5); -+ SET_FLAG(pqospriv->uapsd_tid, WMM_TID4); -+ SET_FLAG(pqospriv->uapsd_tid_delivery_enabled, WMM_TID4); -+ SET_FLAG(pqospriv->uapsd_tid_trigger_enabled, WMM_TID4); -+ } -+ -+ /* check the uapsd setting of AC_BK from registry then map these setting to each TID if necessary */ -+ if(TEST_FLAG(pregistrypriv->uapsd_ac_enable, DRV_CFG_UAPSD_BK)) { -+ SET_FLAG(pqospriv->uapsd_tid, WMM_TID2); -+ SET_FLAG(pqospriv->uapsd_tid_delivery_enabled, WMM_TID2); -+ SET_FLAG(pqospriv->uapsd_tid_trigger_enabled, WMM_TID2); -+ SET_FLAG(pqospriv->uapsd_tid, WMM_TID1); -+ SET_FLAG(pqospriv->uapsd_tid_delivery_enabled, WMM_TID1); -+ SET_FLAG(pqospriv->uapsd_tid_trigger_enabled, WMM_TID1); -+ } -+ -+ /* check the uapsd setting of AC_BE from registry then map these setting to each TID if necessary */ -+ if(TEST_FLAG(pregistrypriv->uapsd_ac_enable, DRV_CFG_UAPSD_BE)) { -+ SET_FLAG(pqospriv->uapsd_tid, WMM_TID3); -+ SET_FLAG(pqospriv->uapsd_tid_delivery_enabled, WMM_TID3); -+ SET_FLAG(pqospriv->uapsd_tid_trigger_enabled, WMM_TID3); -+ SET_FLAG(pqospriv->uapsd_tid, WMM_TID0); -+ SET_FLAG(pqospriv->uapsd_tid_delivery_enabled, WMM_TID0); -+ SET_FLAG(pqospriv->uapsd_tid_trigger_enabled, WMM_TID0); -+ } -+ -+ RTW_INFO("[WMMPS] UAPSD MAX SP Len = 0x%02x, UAPSD TID enabled = 0x%02x\n", -+ pqospriv->uapsd_max_sp_len, (u8)pqospriv->uapsd_tid); -+ } -+ -+} -+ -+/* -+ * rtw_is_wmmps_mode -+ * This function is used for checking whether Driver and an AP support uapsd function or not. -+ * If both of them support uapsd function, it will return true. Otherwise returns false. -+ * -+ * Arguments: -+ * @padapter: _adapter pointer. -+ * -+ * Auther: Arvin Liu -+ * Date: 2017/06/12 -+ */ -+bool rtw_is_wmmps_mode(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+ -+ if ((pqospriv->uapsd_ap_supported) && ((pqospriv->uapsd_tid & BIT_MASK_TID_TC) != 0)) -+ return _TRUE; -+ -+ return _FALSE; -+} -+#endif /* CONFIG_WMMPS_STA */ -+ -+/* adjust IEs for rtw_joinbss_cmd in WMM */ -+int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len) -+{ -+#ifdef CONFIG_WMMPS_STA -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+#endif /* CONFIG_WMMPS_STA */ -+ unsigned int ielength = 0; -+ unsigned int i, j; -+ u8 qos_info = 0; -+ -+ i = 12; /* after the fixed IE */ -+ while (i < in_len) { -+ ielength = initial_out_len; -+ -+ if (in_ie[i] == 0xDD && in_ie[i + 2] == 0x00 && in_ie[i + 3] == 0x50 && in_ie[i + 4] == 0xF2 && in_ie[i + 5] == 0x02 && i + 5 < in_len) { /* WMM element ID and OUI */ -+ -+ /* Append WMM IE to the last index of out_ie */ -+#if 0 -+ for (j = i; j < i + (in_ie[i + 1] + 2); j++) { -+ out_ie[ielength] = in_ie[j]; -+ ielength++; -+ } -+ out_ie[initial_out_len + 8] = 0x00; /* force the QoS Info Field to be zero */ -+#endif -+ -+ for (j = i; j < i + 9; j++) { -+ out_ie[ielength] = in_ie[j]; -+ ielength++; -+ } -+ out_ie[initial_out_len + 1] = 0x07; -+ out_ie[initial_out_len + 6] = 0x00; -+ -+#ifdef CONFIG_WMMPS_STA -+ switch(pqospriv->uapsd_max_sp_len) { -+ case NO_LIMIT: -+ /* do nothing */ -+ break; -+ case TWO_MSDU: -+ SET_FLAG(qos_info, BIT5); -+ break; -+ case FOUR_MSDU: -+ SET_FLAG(qos_info, BIT6); -+ break; -+ case SIX_MSDU: -+ SET_FLAG(qos_info, BIT5); -+ SET_FLAG(qos_info, BIT6); -+ break; -+ default: -+ /* do nothing */ -+ break; -+ }; -+ -+ /* check TID7 and TID6 for AC_VO to set corresponding Qos_info bit in WMM IE */ -+ if((TEST_FLAG(pqospriv->uapsd_tid, WMM_TID7)) && (TEST_FLAG(pqospriv->uapsd_tid, WMM_TID6))) -+ SET_FLAG(qos_info, WMM_IE_UAPSD_VO); -+ /* check TID5 and TID4 for AC_VI to set corresponding Qos_info bit in WMM IE */ -+ if((TEST_FLAG(pqospriv->uapsd_tid, WMM_TID5)) && (TEST_FLAG(pqospriv->uapsd_tid, WMM_TID4))) -+ SET_FLAG(qos_info, WMM_IE_UAPSD_VI); -+ /* check TID2 and TID1 for AC_BK to set corresponding Qos_info bit in WMM IE */ -+ if((TEST_FLAG(pqospriv->uapsd_tid, WMM_TID2)) && (TEST_FLAG(pqospriv->uapsd_tid, WMM_TID1))) -+ SET_FLAG(qos_info, WMM_IE_UAPSD_BK); -+ /* check TID3 and TID0 for AC_BE to set corresponding Qos_info bit in WMM IE */ -+ if((TEST_FLAG(pqospriv->uapsd_tid, WMM_TID3)) && (TEST_FLAG(pqospriv->uapsd_tid, WMM_TID0))) -+ SET_FLAG(qos_info, WMM_IE_UAPSD_BE); -+#endif /* CONFIG_WMMPS_STA */ -+ -+ out_ie[initial_out_len + 8] = qos_info; -+ -+ break; -+ } -+ -+ i += (in_ie[i + 1] + 2); /* to the next IE element */ -+ } -+ -+ return ielength; -+ -+} -+ -+ -+/* -+ * Ported from 8185: IsInPreAuthKeyList(). (Renamed from SecIsInPreAuthKeyList(), 2006-10-13.) -+ * Added by Annie, 2006-05-07. -+ * -+ * Search by BSSID, -+ * Return Value: -+ * -1 :if there is no pre-auth key in the table -+ * >=0 :if there is pre-auth key, and return the entry id -+ * -+ * */ -+ -+static int SecIsInPMKIDList(_adapter *Adapter, u8 *bssid) -+{ -+ struct security_priv *psecuritypriv = &Adapter->securitypriv; -+ int i = 0; -+ -+ do { -+ if ((psecuritypriv->PMKIDList[i].bUsed) && -+ (_rtw_memcmp(psecuritypriv->PMKIDList[i].Bssid, bssid, ETH_ALEN) == _TRUE)) -+ break; -+ else { -+ i++; -+ /* continue; */ -+ } -+ -+ } while (i < NUM_PMKID_CACHE); -+ -+ if (i == NUM_PMKID_CACHE) { -+ i = -1;/* Could not find. */ -+ } else { -+ /* There is one Pre-Authentication Key for the specific BSSID. */ -+ } -+ -+ return i; -+ -+} -+ -+int rtw_cached_pmkid(_adapter *Adapter, u8 *bssid) -+{ -+ return SecIsInPMKIDList(Adapter, bssid); -+} -+ -+int rtw_rsn_sync_pmkid(_adapter *adapter, u8 *ie, uint ie_len, int i_ent) -+{ -+ struct security_priv *sec = &adapter->securitypriv; -+ struct rsne_info info; -+ u8 gm_cs[4]; -+ int i; -+ -+ rtw_rsne_info_parse(ie, ie_len, &info); -+ -+ if (info.err) { -+ RTW_WARN(FUNC_ADPT_FMT" rtw_rsne_info_parse error\n" -+ , FUNC_ADPT_ARG(adapter)); -+ return 0; -+ } -+ -+ if (i_ent < 0 && info.pmkid_cnt == 0) -+ goto exit; -+ -+ if (info.pmkid_list == NULL) -+ goto exit; -+ -+ if (i_ent >= 0 && info.pmkid_cnt == 1 && _rtw_memcmp(info.pmkid_list, sec->PMKIDList[i_ent].PMKID, 16)) { -+ RTW_INFO(FUNC_ADPT_FMT" has carried the same PMKID:"KEY_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), KEY_ARG(&sec->PMKIDList[i_ent].PMKID)); -+ goto exit; -+ } -+ -+ /* bakcup group mgmt cs */ -+ if (info.gmcs) -+ _rtw_memcpy(gm_cs, info.gmcs, 4); -+ -+ if (info.pmkid_cnt) { -+ RTW_INFO(FUNC_ADPT_FMT" remove original PMKID, count:%u\n" -+ , FUNC_ADPT_ARG(adapter), info.pmkid_cnt); -+ for (i = 0; i < info.pmkid_cnt; i++) -+ RTW_INFO(" "KEY_FMT"\n", KEY_ARG(info.pmkid_list + i * 16)); -+ } -+ -+ if (i_ent >= 0) { -+ RTW_INFO(FUNC_ADPT_FMT" append PMKID:"KEY_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), KEY_ARG(sec->PMKIDList[i_ent].PMKID)); -+ -+ info.pmkid_cnt = 1; /* update new pmkid_cnt */ -+ _rtw_memcpy(info.pmkid_list, sec->PMKIDList[i_ent].PMKID, 16); -+ } else -+ info.pmkid_cnt = 0; /* update new pmkid_cnt */ -+ -+ RTW_PUT_LE16(info.pmkid_list - 2, info.pmkid_cnt); -+ if (info.gmcs) -+ _rtw_memcpy(info.pmkid_list + 16 * info.pmkid_cnt, gm_cs, 4); -+ -+ ie_len = 1 + 1 + 2 + 4 -+ + 2 + 4 * info.pcs_cnt -+ + 2 + 4 * info.akm_cnt -+ + 2 -+ + 2 + 16 * info.pmkid_cnt -+ + (info.gmcs ? 4 : 0) -+ ; -+ -+ ie[1] = (u8)(ie_len - 2); -+ -+exit: -+ return ie_len; -+} -+ -+sint rtw_restruct_sec_ie(_adapter *adapter, u8 *out_ie) -+{ -+ u8 authmode = 0x0; -+ uint ielength = 0; -+ int iEntry; -+ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ uint ndisauthmode = psecuritypriv->ndisauthtype; -+ -+ if ((ndisauthmode == Ndis802_11AuthModeWPA) || (ndisauthmode == Ndis802_11AuthModeWPAPSK)) -+ authmode = _WPA_IE_ID_; -+ if ((ndisauthmode == Ndis802_11AuthModeWPA2) || (ndisauthmode == Ndis802_11AuthModeWPA2PSK)) -+ authmode = _WPA2_IE_ID_; -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { -+ _rtw_memcpy(out_ie, psecuritypriv->wps_ie, psecuritypriv->wps_ie_len); -+ ielength = psecuritypriv->wps_ie_len; -+ -+ } else if ((authmode == _WPA_IE_ID_) || (authmode == _WPA2_IE_ID_)) { -+ /* copy RSN or SSN */ -+ _rtw_memcpy(out_ie, psecuritypriv->supplicant_ie, psecuritypriv->supplicant_ie[1] + 2); -+ /* debug for CONFIG_IEEE80211W -+ { -+ int jj; -+ printk("supplicant_ie_length=%d &&&&&&&&&&&&&&&&&&&\n", psecuritypriv->supplicant_ie[1]+2); -+ for(jj=0; jj < psecuritypriv->supplicant_ie[1]+2; jj++) -+ printk(" %02x ", psecuritypriv->supplicant_ie[jj]); -+ printk("\n"); -+ }*/ -+ ielength = psecuritypriv->supplicant_ie[1] + 2; -+ rtw_report_sec_ie(adapter, authmode, psecuritypriv->supplicant_ie); -+ } -+ -+ if (authmode == WLAN_EID_RSN) { -+ iEntry = SecIsInPMKIDList(adapter, pmlmepriv->assoc_bssid); -+ ielength = rtw_rsn_sync_pmkid(adapter, out_ie, ielength, iEntry); -+ } -+ -+ return ielength; -+} -+ -+void rtw_init_registrypriv_dev_network(_adapter *adapter) -+{ -+ struct registry_priv *pregistrypriv = &adapter->registrypriv; -+ WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network; -+ u8 *myhwaddr = adapter_mac_addr(adapter); -+ -+ -+ _rtw_memcpy(pdev_network->MacAddress, myhwaddr, ETH_ALEN); -+ -+ _rtw_memcpy(&pdev_network->Ssid, &pregistrypriv->ssid, sizeof(NDIS_802_11_SSID)); -+ -+ pdev_network->Configuration.Length = sizeof(NDIS_802_11_CONFIGURATION); -+ pdev_network->Configuration.BeaconPeriod = 100; -+} -+ -+void rtw_update_registrypriv_dev_network(_adapter *adapter) -+{ -+ int sz = 0; -+ struct registry_priv *pregistrypriv = &adapter->registrypriv; -+ WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network; -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ struct wlan_network *cur_network = &adapter->mlmepriv.cur_network; -+ /* struct xmit_priv *pxmitpriv = &adapter->xmitpriv; */ -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ -+ -+#if 0 -+ pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense; -+ pxmitpriv->vcs = pregistrypriv->vcs_type; -+ pxmitpriv->vcs_type = pregistrypriv->vcs_type; -+ /* pxmitpriv->rts_thresh = pregistrypriv->rts_thresh; */ -+ pxmitpriv->frag_len = pregistrypriv->frag_thresh; -+ -+ adapter->qospriv.qos_option = pregistrypriv->wmm_enable; -+#endif -+ -+ pdev_network->Privacy = (psecuritypriv->dot11PrivacyAlgrthm > 0 ? 1 : 0) ; /* adhoc no 802.1x */ -+ -+ pdev_network->Rssi = 0; -+ -+ pdev_network->Configuration.DSConfig = (pregistrypriv->channel); -+ -+ if (cur_network->network.InfrastructureMode == Ndis802_11IBSS) { -+ pdev_network->Configuration.ATIMWindow = (0); -+ -+ if (pmlmeext->cur_channel != 0) -+ pdev_network->Configuration.DSConfig = pmlmeext->cur_channel; -+ else -+ pdev_network->Configuration.DSConfig = 1; -+ } -+ -+ pdev_network->InfrastructureMode = (cur_network->network.InfrastructureMode); -+ -+ /* 1. Supported rates */ -+ /* 2. IE */ -+ -+ /* rtw_set_supported_rate(pdev_network->SupportedRates, pregistrypriv->wireless_mode) ; */ /* will be called in rtw_generate_ie */ -+ sz = rtw_generate_ie(pregistrypriv); -+ -+ pdev_network->IELength = sz; -+ -+ pdev_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pdev_network); -+ -+ /* notes: translate IELength & Length after assign the Length to cmdsz in createbss_cmd(); */ -+ /* pdev_network->IELength = cpu_to_le32(sz); */ -+ -+ -+} -+ -+void rtw_get_encrypt_decrypt_from_registrypriv(_adapter *adapter) -+{ -+ -+ -+ -+} -+ -+/* the fucntion is at passive_level */ -+void rtw_joinbss_reset(_adapter *padapter) -+{ -+ u8 threshold; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ /* todo: if you want to do something io/reg/hw setting before join_bss, please add code here */ -+ -+#ifdef CONFIG_80211N_HT -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ -+ pmlmepriv->num_FortyMHzIntolerant = 0; -+ -+ pmlmepriv->num_sta_no_ht = 0; -+ -+ phtpriv->ampdu_enable = _FALSE;/* reset to disabled */ -+ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) -+ /* TH=1 => means that invalidate usb rx aggregation */ -+ /* TH=0 => means that validate usb rx aggregation, use init value. */ -+ if (phtpriv->ht_option) { -+ if (padapter->registrypriv.wifi_spec == 1) -+ threshold = 1; -+ else -+ threshold = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); -+ } else { -+ threshold = 1; -+ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); -+ } -+#endif/* #if defined( CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) */ -+ -+#endif/* #ifdef CONFIG_80211N_HT */ -+ -+} -+ -+ -+#ifdef CONFIG_80211N_HT -+void rtw_ht_use_default_setting(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ BOOLEAN bHwLDPCSupport = _FALSE, bHwSTBCSupport = _FALSE; -+#ifdef CONFIG_BEAMFORMING -+ BOOLEAN bHwSupportBeamformer = _FALSE, bHwSupportBeamformee = _FALSE; -+#endif /* CONFIG_BEAMFORMING */ -+ -+ if (pregistrypriv->wifi_spec) -+ phtpriv->bss_coexist = 1; -+ else -+ phtpriv->bss_coexist = 0; -+ -+ phtpriv->sgi_40m = TEST_FLAG(pregistrypriv->short_gi, BIT1) ? _TRUE : _FALSE; -+ phtpriv->sgi_20m = TEST_FLAG(pregistrypriv->short_gi, BIT0) ? _TRUE : _FALSE; -+ -+ /* LDPC support */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_LDPC, (u8 *)&bHwLDPCSupport); -+ CLEAR_FLAGS(phtpriv->ldpc_cap); -+ if (bHwLDPCSupport) { -+ if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT4)) -+ SET_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_RX); -+ } -+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_LDPC, (u8 *)&bHwLDPCSupport); -+ if (bHwLDPCSupport) { -+ if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT5)) -+ SET_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX); -+ } -+ if (phtpriv->ldpc_cap) -+ RTW_INFO("[HT] HAL Support LDPC = 0x%02X\n", phtpriv->ldpc_cap); -+ -+ /* STBC */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_STBC, (u8 *)&bHwSTBCSupport); -+ CLEAR_FLAGS(phtpriv->stbc_cap); -+ if (bHwSTBCSupport) { -+ if (TEST_FLAG(pregistrypriv->stbc_cap, BIT5)) -+ SET_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX); -+ } -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)&bHwSTBCSupport); -+ if (bHwSTBCSupport) { -+ if (TEST_FLAG(pregistrypriv->stbc_cap, BIT4)) -+ SET_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX); -+ } -+ if (phtpriv->stbc_cap) -+ RTW_INFO("[HT] HAL Support STBC = 0x%02X\n", phtpriv->stbc_cap); -+ -+ /* Beamforming setting */ -+ CLEAR_FLAGS(phtpriv->beamform_cap); -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+#ifdef CONFIG_CONCURRENT_MODE -+ /* only enable beamforming in STA client mode */ -+ if (MLME_IS_STA(padapter) && !MLME_IS_GC(padapter)) -+#else -+ if ((MLME_IS_AP(padapter) && !MLME_IS_GO(padapter)) || -+ (MLME_IS_STA(padapter) && !MLME_IS_GC(padapter))) -+#endif -+#endif -+ { -+ rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&bHwSupportBeamformer); -+ rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, (u8 *)&bHwSupportBeamformee); -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT4) && bHwSupportBeamformer) { -+ SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); -+ RTW_INFO("[HT] HAL Support Beamformer\n"); -+ } -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT5) && bHwSupportBeamformee) { -+ SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); -+ RTW_INFO("[HT] HAL Support Beamformee\n"); -+ } -+ } -+#endif /* CONFIG_BEAMFORMING */ -+} -+void rtw_build_wmm_ie_ht(_adapter *padapter, u8 *out_ie, uint *pout_len) -+{ -+ unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; -+ int out_len; -+ u8 *pframe; -+ -+ if (padapter->mlmepriv.qospriv.qos_option == 0) { -+ out_len = *pout_len; -+ pframe = rtw_set_ie(out_ie + out_len, _VENDOR_SPECIFIC_IE_, -+ _WMM_IE_Length_, WMM_IE, pout_len); -+ -+ padapter->mlmepriv.qospriv.qos_option = 1; -+ } -+} -+#if defined(CONFIG_80211N_HT) -+/* the fucntion is >= passive_level */ -+unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len, u8 channel) -+{ -+ u32 ielen, out_len; -+ u32 rx_packet_offset, max_recvbuf_sz; -+ HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor; -+ HT_CAP_AMPDU_DENSITY best_ampdu_density; -+ unsigned char *p, *pframe; -+ struct rtw_ieee80211_ht_cap ht_capie; -+ u8 cbw40_enable = 0, rf_num = 0, rx_stbc_nss = 0, rx_nss = 0; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+#ifdef CONFIG_80211AC_VHT -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+#endif /* CONFIG_80211AC_VHT */ -+ -+ phtpriv->ht_option = _FALSE; -+ -+ out_len = *pout_len; -+ -+ _rtw_memset(&ht_capie, 0, sizeof(struct rtw_ieee80211_ht_cap)); -+ -+ ht_capie.cap_info = IEEE80211_HT_CAP_DSSSCCK40; -+ -+ if (phtpriv->sgi_20m) -+ ht_capie.cap_info |= IEEE80211_HT_CAP_SGI_20; -+ -+ /* check if 40MHz is allowed according to hal cap and registry */ -+ if (hal_chk_bw_cap(padapter, BW_CAP_40M)) { -+ if (channel > 14) { -+ if (REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) -+ cbw40_enable = 1; -+ } else { -+ if (REGSTY_IS_BW_2G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) -+ cbw40_enable = 1; -+ } -+ } -+ -+ if (cbw40_enable) { -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ u8 oper_bw = CHANNEL_WIDTH_20, oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ -+ if (in_ie == NULL) { -+ /* TDLS: TODO 20/40 issue */ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { -+ oper_bw = padapter->mlmeextpriv.cur_bwmode; -+ if (oper_bw > CHANNEL_WIDTH_40) -+ oper_bw = CHANNEL_WIDTH_40; -+ } else -+ /* TDLS: TODO 40? */ -+ oper_bw = CHANNEL_WIDTH_40; -+ } else { -+ p = rtw_get_ie(in_ie, WLAN_EID_HT_OPERATION, &ielen, in_len); -+ if (p && ielen == HT_OP_IE_LEN) { -+ if (GET_HT_OP_ELE_STA_CHL_WIDTH(p + 2)) { -+ switch (GET_HT_OP_ELE_2ND_CHL_OFFSET(p + 2)) { -+ case SCA: -+ oper_bw = CHANNEL_WIDTH_40; -+ oper_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ case SCB: -+ oper_bw = CHANNEL_WIDTH_40; -+ oper_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ } -+ } -+ } -+ // IOT issue : AP TP-Link WDR6500 -+ if(oper_bw == CHANNEL_WIDTH_40){ -+ p = rtw_get_ie(in_ie, WLAN_EID_HT_CAP, &ielen, in_len); -+ if (p && ielen == HT_CAP_IE_LEN) { -+ oper_bw = GET_HT_CAP_ELE_CHL_WIDTH(p + 2) ? CHANNEL_WIDTH_40 : CHANNEL_WIDTH_20; -+ if(oper_bw == CHANNEL_WIDTH_20) -+ oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ } -+ } -+ -+ /* adjust bw to fit in channel plan setting */ -+ if (oper_bw == CHANNEL_WIDTH_40 -+ && oper_offset != HAL_PRIME_CHNL_OFFSET_DONT_CARE /* check this because TDLS has no info to set offset */ -+ && (!rtw_chset_is_chbw_valid(chset, channel, oper_bw, oper_offset, 1, 1) -+ || (IS_DFS_SLAVE_WITH_RD(rfctl) -+ && !rtw_rfctl_dfs_domain_unknown(rfctl) -+ && rtw_chset_is_chbw_non_ocp(chset, channel, oper_bw, oper_offset)) -+ ) -+ ) { -+ oper_bw = CHANNEL_WIDTH_20; -+ oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ rtw_warn_on(!rtw_chset_is_chbw_valid(chset, channel, oper_bw, oper_offset, 1, 1)); -+ if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_rfctl_dfs_domain_unknown(rfctl)) -+ rtw_warn_on(rtw_chset_is_chbw_non_ocp(chset, channel, oper_bw, oper_offset)); -+ } -+ -+ if (oper_bw == CHANNEL_WIDTH_40) { -+ ht_capie.cap_info |= IEEE80211_HT_CAP_SUP_WIDTH; -+ if (phtpriv->sgi_40m) -+ ht_capie.cap_info |= IEEE80211_HT_CAP_SGI_40; -+ } -+ -+ cbw40_enable = oper_bw == CHANNEL_WIDTH_40 ? 1 : 0; -+ } -+ -+ /* todo: disable SM power save mode */ -+ ht_capie.cap_info |= IEEE80211_HT_CAP_SM_PS; -+ -+ /* RX LDPC */ -+ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_RX)) { -+ ht_capie.cap_info |= IEEE80211_HT_CAP_LDPC_CODING; -+ RTW_INFO("[HT] Declare supporting RX LDPC\n"); -+ } -+ -+ /* TX STBC */ -+ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX)) { -+ ht_capie.cap_info |= IEEE80211_HT_CAP_TX_STBC; -+ RTW_INFO("[HT] Declare supporting TX STBC\n"); -+ } -+ -+ /* RX STBC */ -+ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX)) { -+ if ((pregistrypriv->rx_stbc == 0x3) || /* enable for 2.4/5 GHz */ -+ ((channel <= 14) && (pregistrypriv->rx_stbc == 0x1)) || /* enable for 2.4GHz */ -+ ((channel > 14) && (pregistrypriv->rx_stbc == 0x2)) || /* enable for 5GHz */ -+ (pregistrypriv->wifi_spec == 1)) { -+ /* HAL_DEF_RX_STBC means STBC RX spatial stream, todo: VHT 4 streams */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)(&rx_stbc_nss)); -+ SET_HT_CAP_ELE_RX_STBC(&ht_capie, rx_stbc_nss); -+ RTW_INFO("[HT] Declare supporting RX STBC = %d\n", rx_stbc_nss); -+ } -+ } -+ -+ /* fill default supported_mcs_set */ -+ _rtw_memcpy(ht_capie.supp_mcs_set, pmlmeext->default_supported_mcs_set, 16); -+ -+ /* update default supported_mcs_set */ -+ rx_nss = GET_HAL_RX_NSS(padapter); -+ -+ switch (rx_nss) { -+ case 1: -+ set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_1R); -+ break; -+ case 2: -+ #ifdef CONFIG_DISABLE_MCS13TO15 -+ if (cbw40_enable && pregistrypriv->wifi_spec != 1) -+ set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R_13TO15_OFF); -+ else -+ #endif -+ set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R); -+ break; -+ case 3: -+ set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_3R); -+ break; -+ case 4: -+ set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_4R); -+ break; -+ default: -+ RTW_WARN("rf_type:%d or rx_nss:%u is not expected\n", GET_HAL_RFPATH(padapter), rx_nss); -+ } -+ -+ { -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); -+ rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); -+ if (max_recvbuf_sz - rx_packet_offset >= (8191 - 256)) { -+ RTW_INFO("%s IEEE80211_HT_CAP_MAX_AMSDU is set\n", __FUNCTION__); -+ ht_capie.cap_info = ht_capie.cap_info | IEEE80211_HT_CAP_MAX_AMSDU; -+ } -+ } -+ /* -+ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k -+ AMPDU_para [4:2]:Min MPDU Start Spacing -+ */ -+ -+ /* -+ #if defined(CONFIG_RTL8188E) && defined(CONFIG_SDIO_HCI) -+ ht_capie.ampdu_params_info = 2; -+ #else -+ ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03); -+ #endif -+ */ -+ -+ if (padapter->driver_rx_ampdu_factor != 0xFF) -+ max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)padapter->driver_rx_ampdu_factor; -+ else -+ rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); -+ -+ /* rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); */ -+ ht_capie.ampdu_params_info = (max_rx_ampdu_factor & 0x03); -+ -+ if (padapter->driver_rx_ampdu_spacing != 0xFF) -+ ht_capie.ampdu_params_info |= ((padapter->driver_rx_ampdu_spacing & 0x07) << 2); -+ else { -+ if (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) { -+ /* -+ * Todo : Each chip must to ask DD , this chip best ampdu_density setting -+ * By yiwei.sun -+ */ -+ rtw_hal_get_def_var(padapter, HW_VAR_BEST_AMPDU_DENSITY, &best_ampdu_density); -+ -+ ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & (best_ampdu_density << 2)); -+ -+ } else -+ ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY & 0x00); -+ } -+#ifdef CONFIG_BEAMFORMING -+ ht_capie.tx_BF_cap_info = 0; -+ -+ /* HT Beamformer*/ -+ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { -+ /* Transmit NDP Capable */ -+ SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(&ht_capie, 1); -+ /* Explicit Compressed Steering Capable */ -+ SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(&ht_capie, 1); -+ /* Compressed Steering Number Antennas */ -+ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(&ht_capie, 1); -+ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); -+ SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(&ht_capie, rf_num); -+ } -+ -+ /* HT Beamformee */ -+ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) { -+ /* Receive NDP Capable */ -+ SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(&ht_capie, 1); -+ /* Explicit Compressed Beamforming Feedback Capable */ -+ SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(&ht_capie, 2); -+ -+ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); -+#ifdef CONFIG_80211AC_VHT -+ /* IOT action suggested by Yu Chen 2017/3/3 */ -+ if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) && -+ !pvhtpriv->ap_bf_cap.is_mu_bfer && -+ pvhtpriv->ap_bf_cap.su_sound_dim == 2) -+ rf_num = (rf_num >= 2 ? 2 : rf_num); -+#endif -+ SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(&ht_capie, rf_num); -+ } -+#endif/*CONFIG_BEAMFORMING*/ -+ -+ pframe = rtw_set_ie(out_ie + out_len, _HT_CAPABILITY_IE_, -+ sizeof(struct rtw_ieee80211_ht_cap), (unsigned char *)&ht_capie, pout_len); -+ -+ phtpriv->ht_option = _TRUE; -+ -+ if (in_ie != NULL) { -+ p = rtw_get_ie(in_ie, _HT_ADD_INFO_IE_, &ielen, in_len); -+ if (p && (ielen == sizeof(struct ieee80211_ht_addt_info))) { -+ out_len = *pout_len; -+ pframe = rtw_set_ie(out_ie + out_len, _HT_ADD_INFO_IE_, ielen, p + 2 , pout_len); -+ } -+ } -+ -+ return phtpriv->ht_option; -+ -+} -+ -+/* the fucntion is > passive_level (in critical_section) */ -+void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) -+{ -+ u8 *p, max_ampdu_sz; -+ int len; -+ /* struct sta_info *bmc_sta, *psta; */ -+ struct rtw_ieee80211_ht_cap *pht_capie; -+ struct ieee80211_ht_addt_info *pht_addtinfo; -+ /* struct recv_reorder_ctrl *preorder_ctrl; */ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ /* struct recv_priv *precvpriv = &padapter->recvpriv; */ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ /* struct wlan_network *pcur_network = &(pmlmepriv->cur_network);; */ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 cbw40_enable = 0; -+ -+ -+ if (!phtpriv->ht_option) -+ return; -+ -+ if ((!pmlmeinfo->HT_info_enable) || (!pmlmeinfo->HT_caps_enable)) -+ return; -+ -+ RTW_INFO("+rtw_update_ht_cap()\n"); -+ -+ /* maybe needs check if ap supports rx ampdu. */ -+ if ((phtpriv->ampdu_enable == _FALSE) && (pregistrypriv->ampdu_enable == 1)) { -+ if (pregistrypriv->wifi_spec == 1) { -+ /* remove this part because testbed AP should disable RX AMPDU */ -+ /* phtpriv->ampdu_enable = _FALSE; */ -+ phtpriv->ampdu_enable = _TRUE; -+ } else -+ phtpriv->ampdu_enable = _TRUE; -+ } -+ -+ -+ /* check Max Rx A-MPDU Size */ -+ len = 0; -+ p = rtw_get_ie(pie + sizeof(NDIS_802_11_FIXED_IEs), _HT_CAPABILITY_IE_, &len, ie_len - sizeof(NDIS_802_11_FIXED_IEs)); -+ if (p && len > 0) { -+ pht_capie = (struct rtw_ieee80211_ht_cap *)(p + 2); -+ max_ampdu_sz = (pht_capie->ampdu_params_info & IEEE80211_HT_CAP_AMPDU_FACTOR); -+ max_ampdu_sz = 1 << (max_ampdu_sz + 3); /* max_ampdu_sz (kbytes); */ -+ -+ /* RTW_INFO("rtw_update_ht_cap(): max_ampdu_sz=%d\n", max_ampdu_sz); */ -+ phtpriv->rx_ampdu_maxlen = max_ampdu_sz; -+ -+ } -+ -+ -+ len = 0; -+ p = rtw_get_ie(pie + sizeof(NDIS_802_11_FIXED_IEs), _HT_ADD_INFO_IE_, &len, ie_len - sizeof(NDIS_802_11_FIXED_IEs)); -+ if (p && len > 0) { -+ pht_addtinfo = (struct ieee80211_ht_addt_info *)(p + 2); -+ /* todo: */ -+ } -+ -+ if (hal_chk_bw_cap(padapter, BW_CAP_40M)) { -+ if (channel > 14) { -+ if (REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) -+ cbw40_enable = 1; -+ } else { -+ if (REGSTY_IS_BW_2G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) -+ cbw40_enable = 1; -+ } -+ } -+ -+ /* update cur_bwmode & cur_ch_offset */ -+ if ((cbw40_enable) && -+ (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & BIT(1)) && -+ (pmlmeinfo->HT_info.infos[0] & BIT(2))) { -+ int i; -+ u8 rx_nss = 0; -+ -+ rx_nss = GET_HAL_RX_NSS(padapter); -+ -+ /* update the MCS set */ -+ for (i = 0; i < 16; i++) -+ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= pmlmeext->default_supported_mcs_set[i]; -+ -+ /* update the MCS rates */ -+ switch (rx_nss) { -+ case 1: -+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R); -+ break; -+ case 2: -+ #ifdef CONFIG_DISABLE_MCS13TO15 -+ if (pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1) -+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R_13TO15_OFF); -+ else -+ #endif -+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); -+ break; -+ case 3: -+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_3R); -+ break; -+ case 4: -+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_4R); -+ break; -+ default: -+ RTW_WARN("rx_nss:%u is not expected\n", rx_nss); -+ } -+ -+ /* switch to the 40M Hz mode accoring to the AP */ -+ /* pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; */ -+ switch ((pmlmeinfo->HT_info.infos[0] & 0x3)) { -+ case EXTCHNL_OFFSET_UPPER: -+ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ -+ case EXTCHNL_OFFSET_LOWER: -+ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ -+ default: -+ pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; -+ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ RTW_INFO("%s : ch offset is not assigned for HT40 mod , update cur_bwmode=%u, cur_ch_offset=%u\n", -+ __func__, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); -+ break; -+ } -+ } -+ -+ /* */ -+ /* Config SM Power Save setting */ -+ /* */ -+ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; -+ if (pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) { -+#if 0 -+ u8 i; -+ /* update the MCS rates */ -+ for (i = 0; i < 16; i++) -+ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; -+#endif -+ RTW_INFO("%s(): WLAN_HT_CAP_SM_PS_STATIC\n", __FUNCTION__); -+ } -+ -+ /* */ -+ /* Config current HT Protection mode. */ -+ /* */ -+ pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; -+} -+#endif -+ -+#ifdef CONFIG_TDLS -+void rtw_issue_addbareq_cmd_tdls(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_info *ptdls_sta = NULL; -+ u8 issued; -+ int priority; -+ struct ht_priv *phtpriv; -+ -+ priority = pattrib->priority; -+ -+ if (pattrib->direct_link == _TRUE) { -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); -+ if ((ptdls_sta != NULL) && (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) { -+ phtpriv = &ptdls_sta->htpriv; -+ -+ if ((phtpriv->ht_option == _TRUE) && (phtpriv->ampdu_enable == _TRUE)) { -+ issued = (phtpriv->agg_enable_bitmap >> priority) & 0x1; -+ issued |= (phtpriv->candidate_tid_bitmap >> priority) & 0x1; -+ -+ if (0 == issued) { -+ RTW_INFO("[%s], p=%d\n", __FUNCTION__, priority); -+ ptdls_sta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); -+ rtw_addbareq_cmd(padapter, (u8)priority, pattrib->dst); -+ } -+ } -+ } -+ } -+} -+#endif /* CONFIG_TDLS */ -+ -+#ifdef CONFIG_80211N_HT -+static u8 rtw_issue_addbareq_check(_adapter *padapter, struct xmit_frame *pxmitframe, u8 issue_when_busy) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct registry_priv *pregistry = &padapter->registrypriv; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ s32 bmcst = IS_MCAST(pattrib->ra); -+ -+ if (bmcst) -+ return _FALSE; -+ -+ if (pregistry->tx_quick_addba_req == 0) { -+ if ((issue_when_busy == _TRUE) && (pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE)) -+ return _FALSE; -+ -+ if (pmlmepriv->LinkDetectInfo.NumTxOkInPeriod < 100) -+ return _FALSE; -+ } -+ -+ return _TRUE; -+} -+ -+void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe, u8 issue_when_busy) -+{ -+ u8 issued; -+ int priority; -+ struct sta_info *psta = NULL; -+ struct ht_priv *phtpriv; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ -+ if (rtw_issue_addbareq_check(padapter,pxmitframe, issue_when_busy) == _FALSE) -+ return; -+ -+ priority = pattrib->priority; -+ -+#ifdef CONFIG_TDLS -+ rtw_issue_addbareq_cmd_tdls(padapter, pxmitframe); -+#endif /* CONFIG_TDLS */ -+ -+ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ if (pattrib->psta != psta) { -+ RTW_INFO("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); -+ return; -+ } -+ -+ if (psta == NULL) { -+ RTW_INFO("%s, psta==NUL\n", __func__); -+ return; -+ } -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) { -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); -+ return; -+ } -+ -+ -+ phtpriv = &psta->htpriv; -+ -+ if ((phtpriv->ht_option == _TRUE) && (phtpriv->ampdu_enable == _TRUE)) { -+ issued = (phtpriv->agg_enable_bitmap >> priority) & 0x1; -+ issued |= (phtpriv->candidate_tid_bitmap >> priority) & 0x1; -+ -+ if (0 == issued) { -+ RTW_INFO("rtw_issue_addbareq_cmd, p=%d\n", priority); -+ psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); -+ rtw_addbareq_cmd(padapter, (u8) priority, pattrib->ra); -+ } -+ } -+ -+} -+#endif /* CONFIG_80211N_HT */ -+void rtw_append_exented_cap(_adapter *padapter, u8 *out_ie, uint *pout_len) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+#ifdef CONFIG_80211AC_VHT -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+#endif /* CONFIG_80211AC_VHT */ -+ u8 cap_content[8] = { 0 }; -+ u8 *pframe; -+ u8 null_content[8] = {0}; -+ -+ if (phtpriv->bss_coexist) -+ SET_EXT_CAPABILITY_ELE_BSS_COEXIST(cap_content, 1); -+ -+#ifdef CONFIG_80211AC_VHT -+ if (pvhtpriv->vht_option) -+ SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(cap_content, 1); -+#endif /* CONFIG_80211AC_VHT */ -+#ifdef CONFIG_RTW_WNM -+ rtw_wnm_set_ext_cap_btm(cap_content, 1); -+#endif -+ -+#ifdef CONFIG_RTW_MBO -+ rtw_mbo_set_ext_cap_internw(cap_content, 1); -+#endif -+ /* -+ From 802.11 specification,if a STA does not support any of capabilities defined -+ in the Extended Capabilities element, then the STA is not required to -+ transmit the Extended Capabilities element. -+ */ -+ if (_FALSE == _rtw_memcmp(cap_content, null_content, 8)) -+ pframe = rtw_set_ie(out_ie + *pout_len, EID_EXTCapability, 8, cap_content , pout_len); -+} -+#endif -+ -+#ifdef CONFIG_LAYER2_ROAMING -+inline void rtw_set_to_roam(_adapter *adapter, u8 to_roam) -+{ -+ if (to_roam == 0) -+ adapter->mlmepriv.to_join = _FALSE; -+ adapter->mlmepriv.to_roam = to_roam; -+} -+ -+inline u8 rtw_dec_to_roam(_adapter *adapter) -+{ -+ adapter->mlmepriv.to_roam--; -+ return adapter->mlmepriv.to_roam; -+} -+ -+inline u8 rtw_to_roam(_adapter *adapter) -+{ -+ return adapter->mlmepriv.to_roam; -+} -+ -+void rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ _rtw_roaming(padapter, tgt_network); -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+} -+void _rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &pmlmepriv->cur_network; -+ int do_join_r; -+ -+ if (0 < rtw_to_roam(padapter)) { -+ RTW_INFO("roaming from %s("MAC_FMT"), length:%d\n", -+ cur_network->network.Ssid.Ssid, MAC_ARG(cur_network->network.MacAddress), -+ cur_network->network.Ssid.SsidLength); -+ _rtw_memcpy(&pmlmepriv->assoc_ssid, &cur_network->network.Ssid, sizeof(NDIS_802_11_SSID)); -+ pmlmepriv->assoc_ch = 0; -+ pmlmepriv->assoc_by_bssid = _FALSE; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ rtw_wapi_return_all_sta_info(padapter); -+#endif -+ -+ while (1) { -+ do_join_r = rtw_do_join(padapter); -+ if (_SUCCESS == do_join_r) -+ break; -+ else { -+ RTW_INFO("roaming do_join return %d\n", do_join_r); -+ rtw_dec_to_roam(padapter); -+ -+ if (rtw_to_roam(padapter) > 0) -+ continue; -+ else { -+ RTW_INFO("%s(%d) -to roaming fail, indicate_disconnect\n", __FUNCTION__, __LINE__); -+#ifdef CONFIG_RTW_80211R -+ rtw_ft_clr_flags(padapter, RTW_FT_PEER_EN|RTW_FT_PEER_OTD_EN); -+ rtw_ft_reset_status(padapter); -+#endif -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ break; -+ } -+ } -+ } -+ } -+ -+} -+#endif /* CONFIG_LAYER2_ROAMING */ -+ -+bool rtw_adjust_chbw(_adapter *adapter, u8 req_ch, u8 *req_bw, u8 *req_offset) -+{ -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ u8 allowed_bw; -+ -+ if (req_ch < 14) -+ allowed_bw = REGSTY_BW_2G(regsty); -+ else if (req_ch == 14) -+ allowed_bw = CHANNEL_WIDTH_20; -+ else -+ allowed_bw = REGSTY_BW_5G(regsty); -+ -+ allowed_bw = hal_largest_bw(adapter, allowed_bw); -+ -+ if (allowed_bw == CHANNEL_WIDTH_80 && *req_bw > CHANNEL_WIDTH_80) -+ *req_bw = CHANNEL_WIDTH_80; -+ else if (allowed_bw == CHANNEL_WIDTH_40 && *req_bw > CHANNEL_WIDTH_40) -+ *req_bw = CHANNEL_WIDTH_40; -+ else if (allowed_bw == CHANNEL_WIDTH_20 && *req_bw > CHANNEL_WIDTH_20) { -+ *req_bw = CHANNEL_WIDTH_20; -+ *req_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } else -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+sint rtw_linked_check(_adapter *padapter) -+{ -+ if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter) -+ || MLME_IS_ADHOC(padapter) || MLME_IS_ADHOC_MASTER(padapter) -+ ) { -+ if (padapter->stapriv.asoc_sta_count > 2) -+ return _TRUE; -+ } else { -+ /* Station mode */ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ return _TRUE; -+ } -+ return _FALSE; -+} -+/*#define DBG_ADAPTER_STATE_CHK*/ -+u8 rtw_is_adapter_up(_adapter *padapter) -+{ -+ if (padapter == NULL) -+ return _FALSE; -+ -+ if (RTW_CANNOT_RUN(padapter)) { -+ #ifdef DBG_ADAPTER_STATE_CHK -+ RTW_INFO(FUNC_ADPT_FMT " FALSE -bDriverStopped(%s) bSurpriseRemoved(%s)\n" -+ , FUNC_ADPT_ARG(padapter) -+ , rtw_is_drv_stopped(padapter) ? "True" : "False" -+ , rtw_is_surprise_removed(padapter) ? "True" : "False"); -+ #endif -+ return _FALSE; -+ } -+ -+ if (!rtw_is_hw_init_completed(padapter)) { -+ #ifdef DBG_ADAPTER_STATE_CHK -+ RTW_INFO(FUNC_ADPT_FMT " FALSE -(hw_init_completed == _FALSE)\n", FUNC_ADPT_ARG(padapter)); -+ #endif -+ return _FALSE; -+ } -+ -+ if (padapter->bup == _FALSE) { -+ #ifdef DBG_ADAPTER_STATE_CHK -+ RTW_INFO(FUNC_ADPT_FMT " FALSE -(bup == _FALSE)\n", FUNC_ADPT_ARG(padapter)); -+ #endif -+ return _FALSE; -+ } -+ -+ return _TRUE; -+} -+ -+bool is_miracast_enabled(_adapter *adapter) -+{ -+ bool enabled = 0; -+#ifdef CONFIG_WFD -+ struct wifi_display_info *wfdinfo = &adapter->wfd_info; -+ -+ enabled = (wfdinfo->stack_wfd_mode & (MIRACAST_SOURCE | MIRACAST_SINK)) -+ || (wfdinfo->op_wfd_mode & (MIRACAST_SOURCE | MIRACAST_SINK)); -+#endif -+ -+ return enabled; -+} -+ -+bool rtw_chk_miracast_mode(_adapter *adapter, u8 mode) -+{ -+ bool ret = 0; -+#ifdef CONFIG_WFD -+ struct wifi_display_info *wfdinfo = &adapter->wfd_info; -+ -+ ret = (wfdinfo->stack_wfd_mode & mode) || (wfdinfo->op_wfd_mode & mode); -+#endif -+ -+ return ret; -+} -+ -+const char *get_miracast_mode_str(int mode) -+{ -+ if (mode == MIRACAST_SOURCE) -+ return "SOURCE"; -+ else if (mode == MIRACAST_SINK) -+ return "SINK"; -+ else if (mode == (MIRACAST_SOURCE | MIRACAST_SINK)) -+ return "SOURCE&SINK"; -+ else if (mode == MIRACAST_DISABLED) -+ return "DISABLED"; -+ else -+ return "INVALID"; -+} -+ -+#ifdef CONFIG_WFD -+static bool wfd_st_match_rule(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) -+{ -+ struct wifi_display_info *wfdinfo = &adapter->wfd_info; -+ -+ if (ntohs(*((u16 *)local_port)) == wfdinfo->rtsp_ctrlport -+ || ntohs(*((u16 *)local_port)) == wfdinfo->tdls_rtsp_ctrlport -+ || ntohs(*((u16 *)remote_port)) == wfdinfo->peer_rtsp_ctrlport) -+ return _TRUE; -+ return _FALSE; -+} -+ -+static struct st_register wfd_st_reg = { -+ .s_proto = 0x06, -+ .rule = wfd_st_match_rule, -+}; -+#endif /* CONFIG_WFD */ -+ -+inline void rtw_wfd_st_switch(struct sta_info *sta, bool on) -+{ -+#ifdef CONFIG_WFD -+ if (on) -+ rtw_st_ctl_register(&sta->st_ctl, SESSION_TRACKER_REG_ID_WFD, &wfd_st_reg); -+ else -+ rtw_st_ctl_unregister(&sta->st_ctl, SESSION_TRACKER_REG_ID_WFD); -+#endif -+} -+ -+void dump_arp_pkt(void *sel, u8 *da, u8 *sa, u8 *arp, bool tx) -+{ -+ RTW_PRINT_SEL(sel, "%s ARP da="MAC_FMT", sa="MAC_FMT"\n" -+ , tx ? "send" : "recv", MAC_ARG(da), MAC_ARG(sa)); -+ RTW_PRINT_SEL(sel, "htype=%u, ptype=0x%04x, hlen=%u, plen=%u, oper=%u\n" -+ , GET_ARP_HTYPE(arp), GET_ARP_PTYPE(arp), GET_ARP_HLEN(arp) -+ , GET_ARP_PLEN(arp), GET_ARP_OPER(arp)); -+ RTW_PRINT_SEL(sel, "sha="MAC_FMT", spa="IP_FMT"\n" -+ , MAC_ARG(ARP_SENDER_MAC_ADDR(arp)), IP_ARG(ARP_SENDER_IP_ADDR(arp))); -+ RTW_PRINT_SEL(sel, "tha="MAC_FMT", tpa="IP_FMT"\n" -+ , MAC_ARG(ARP_TARGET_MAC_ADDR(arp)), IP_ARG(ARP_TARGET_IP_ADDR(arp))); -+} -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_mlme_ext.c b/drivers/staging/rtl8723cs/core/rtw_mlme_ext.c -new file mode 100644 -index 000000000000..07aab079179b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_mlme_ext.c -@@ -0,0 +1,16603 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_MLME_EXT_C_ -+ -+#include -+#include -+ -+struct mlme_handler mlme_sta_tbl[] = { -+ {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, -+ {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, -+ {WIFI_REASSOCREQ, "OnReAssocReq", &OnAssocReq}, -+ {WIFI_REASSOCRSP, "OnReAssocRsp", &OnAssocRsp}, -+ {WIFI_PROBEREQ, "OnProbeReq", &OnProbeReq}, -+ {WIFI_PROBERSP, "OnProbeRsp", &OnProbeRsp}, -+ -+ /*---------------------------------------------------------- -+ below 2 are reserved -+ -----------------------------------------------------------*/ -+ {0, "DoReserved", &DoReserved}, -+ {0, "DoReserved", &DoReserved}, -+ {WIFI_BEACON, "OnBeacon", &OnBeacon}, -+ {WIFI_ATIM, "OnATIM", &OnAtim}, -+ {WIFI_DISASSOC, "OnDisassoc", &OnDisassoc}, -+ {WIFI_AUTH, "OnAuth", &OnAuthClient}, -+ {WIFI_DEAUTH, "OnDeAuth", &OnDeAuth}, -+ {WIFI_ACTION, "OnAction", &OnAction}, -+ {WIFI_ACTION_NOACK, "OnActionNoAck", &OnAction}, -+}; -+ -+#ifdef _CONFIG_NATIVEAP_MLME_ -+struct mlme_handler mlme_ap_tbl[] = { -+ {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, -+ {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, -+ {WIFI_REASSOCREQ, "OnReAssocReq", &OnAssocReq}, -+ {WIFI_REASSOCRSP, "OnReAssocRsp", &OnAssocRsp}, -+ {WIFI_PROBEREQ, "OnProbeReq", &OnProbeReq}, -+ {WIFI_PROBERSP, "OnProbeRsp", &OnProbeRsp}, -+ -+ /*---------------------------------------------------------- -+ below 2 are reserved -+ -----------------------------------------------------------*/ -+ {0, "DoReserved", &DoReserved}, -+ {0, "DoReserved", &DoReserved}, -+ {WIFI_BEACON, "OnBeacon", &OnBeacon}, -+ {WIFI_ATIM, "OnATIM", &OnAtim}, -+ {WIFI_DISASSOC, "OnDisassoc", &OnDisassoc}, -+ {WIFI_AUTH, "OnAuth", &OnAuth}, -+ {WIFI_DEAUTH, "OnDeAuth", &OnDeAuth}, -+ {WIFI_ACTION, "OnAction", &OnAction}, -+ {WIFI_ACTION_NOACK, "OnActionNoAck", &OnAction}, -+}; -+#endif -+ -+struct action_handler OnAction_tbl[] = { -+ {RTW_WLAN_CATEGORY_SPECTRUM_MGMT, "ACTION_SPECTRUM_MGMT", on_action_spct}, -+ {RTW_WLAN_CATEGORY_QOS, "ACTION_QOS", &OnAction_qos}, -+ {RTW_WLAN_CATEGORY_DLS, "ACTION_DLS", &OnAction_dls}, -+ {RTW_WLAN_CATEGORY_BACK, "ACTION_BACK", &OnAction_back}, -+ {RTW_WLAN_CATEGORY_PUBLIC, "ACTION_PUBLIC", on_action_public}, -+ {RTW_WLAN_CATEGORY_RADIO_MEAS, "ACTION_RADIO_MEAS", &on_action_rm}, -+ {RTW_WLAN_CATEGORY_FT, "ACTION_FT", &OnAction_ft}, -+ {RTW_WLAN_CATEGORY_HT, "ACTION_HT", &OnAction_ht}, -+#ifdef CONFIG_IEEE80211W -+ {RTW_WLAN_CATEGORY_SA_QUERY, "ACTION_SA_QUERY", &OnAction_sa_query}, -+#else -+ {RTW_WLAN_CATEGORY_SA_QUERY, "ACTION_SA_QUERY", &DoReserved}, -+#endif /* CONFIG_IEEE80211W */ -+#ifdef CONFIG_RTW_WNM -+ {RTW_WLAN_CATEGORY_WNM, "ACTION_WNM", &on_action_wnm}, -+#endif -+ {RTW_WLAN_CATEGORY_UNPROTECTED_WNM, "ACTION_UNPROTECTED_WNM", &DoReserved}, -+#ifdef CONFIG_RTW_MESH -+ {RTW_WLAN_CATEGORY_MESH, "ACTION_MESH", &on_action_mesh}, -+ {RTW_WLAN_CATEGORY_SELF_PROTECTED, "ACTION_SELF_PROTECTED", &on_action_self_protected}, -+#endif -+ {RTW_WLAN_CATEGORY_WMM, "ACTION_WMM", &OnAction_wmm}, -+ {RTW_WLAN_CATEGORY_VHT, "ACTION_VHT", &OnAction_vht}, -+ {RTW_WLAN_CATEGORY_P2P, "ACTION_P2P", &OnAction_p2p}, -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ {RTW_WLAN_CATEGORY_TBTX, "ACTION_TBTX_TOKEN", &OnAction_tbtx_token} -+#endif -+}; -+ -+ -+u8 null_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; -+ -+/************************************************** -+OUI definitions for the vendor specific IE -+***************************************************/ -+unsigned char RTW_WPA_OUI[] = {0x00, 0x50, 0xf2, 0x01}; -+unsigned char WMM_OUI[] = {0x00, 0x50, 0xf2, 0x02}; -+unsigned char WPS_OUI[] = {0x00, 0x50, 0xf2, 0x04}; -+unsigned char P2P_OUI[] = {0x50, 0x6F, 0x9A, 0x09}; -+unsigned char WFD_OUI[] = {0x50, 0x6F, 0x9A, 0x0A}; -+unsigned char DPP_OUI[] = {0x50, 0x6F, 0x9A, 0x1A}; -+unsigned char MULTI_AP_OUI[] = {0x50, 0x6F, 0x9A, 0x1B}; -+ -+unsigned char WMM_INFO_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; -+unsigned char WMM_PARA_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; -+ -+unsigned char WPA_TKIP_CIPHER[4] = {0x00, 0x50, 0xf2, 0x02}; -+unsigned char RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02}; -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+unsigned char REALTEK_TBTX_IE[] = {0x00, 0xe0, 0x4c, 0x01, 0x00, 0x00, 0x00, 0x00}; -+#endif -+extern unsigned char REALTEK_96B_IE[]; -+ -+static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set -+ , struct p2p_channels *channel_list) -+{ -+ struct registry_priv *regsty = adapter_to_regsty(padapter); -+ -+ struct p2p_oper_class_map op_class[] = { -+ { IEEE80211G, 81, 1, 13, 1, BW20 }, -+ { IEEE80211G, 82, 14, 14, 1, BW20 }, -+#if 0 /* Do not enable HT40 on 2 GHz */ -+ { IEEE80211G, 83, 1, 9, 1, BW40PLUS }, -+ { IEEE80211G, 84, 5, 13, 1, BW40MINUS }, -+#endif -+ { IEEE80211A, 115, 36, 48, 4, BW20 }, -+ { IEEE80211A, 116, 36, 44, 8, BW40PLUS }, -+ { IEEE80211A, 117, 40, 48, 8, BW40MINUS }, -+ { IEEE80211A, 124, 149, 161, 4, BW20 }, -+ { IEEE80211A, 125, 149, 169, 4, BW20 }, -+ { IEEE80211A, 126, 149, 157, 8, BW40PLUS }, -+ { IEEE80211A, 127, 153, 161, 8, BW40MINUS }, -+ { -1, 0, 0, 0, 0, BW20 } -+ }; -+ -+ int cla, op; -+ -+ cla = 0; -+ -+ for (op = 0; op_class[op].op_class; op++) { -+ u8 ch; -+ struct p2p_oper_class_map *o = &op_class[op]; -+ struct p2p_reg_class *reg = NULL; -+ -+ for (ch = o->min_chan; ch <= o->max_chan; ch += o->inc) { -+ if (rtw_chset_search_ch(channel_set, ch) == -1) -+ continue; -+#if defined(CONFIG_80211N_HT) || defined(CONFIG_80211AC_VHT) -+ if ((padapter->registrypriv.ht_enable == 0) && (o->inc == 8)) -+ continue; -+ -+ if ((REGSTY_IS_BW_5G_SUPPORT(regsty, CHANNEL_WIDTH_40)) && -+ ((o->bw == BW40MINUS) || (o->bw == BW40PLUS))) -+ continue; -+#endif -+ if (reg == NULL) { -+ reg = &channel_list->reg_class[cla]; -+ cla++; -+ reg->reg_class = o->op_class; -+ reg->channels = 0; -+ } -+ reg->channel[reg->channels] = ch; -+ reg->channels++; -+ } -+ } -+ channel_list->reg_classes = cla; -+ -+} -+ -+#if CONFIG_TXPWR_LIMIT -+void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl) -+{ -+ u8 regd; -+ struct regd_exc_ent *exc; -+ struct txpwr_lmt_ent *ent; -+ _irqL irqL; -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ rfctl->regd_name = NULL; -+ -+ if (rfctl->txpwr_regd_num == 0) { -+ RTW_PRINT("there is no any txpwr_regd\n"); -+ goto release_lock; -+ } -+ -+ /* search from exception mapping */ -+ exc = _rtw_regd_exc_search(rfctl -+ , rfctl->country_ent ? rfctl->country_ent->alpha2 : NULL -+ , rfctl->ChannelPlan); -+ if (exc) { -+ u8 has_country = (exc->country[0] == '\0' && exc->country[1] == '\0') ? 0 : 1; -+ -+ if (strcmp(exc->regd_name, regd_str(TXPWR_LMT_NONE)) == 0) -+ rfctl->regd_name = regd_str(TXPWR_LMT_NONE); -+ else if (strcmp(exc->regd_name, regd_str(TXPWR_LMT_WW)) == 0) -+ rfctl->regd_name = regd_str(TXPWR_LMT_WW); -+ else { -+ ent = _rtw_txpwr_lmt_get_by_name(rfctl, exc->regd_name); -+ if (ent) -+ rfctl->regd_name = ent->regd_name; -+ } -+ -+ RTW_PRINT("exception mapping country:%c%c domain:0x%02x to%s regd_name:%s\n" -+ , has_country ? exc->country[0] : '0' -+ , has_country ? exc->country[1] : '0' -+ , exc->domain -+ , rfctl->regd_name ? "" : " unknown" -+ , exc->regd_name -+ ); -+ if (rfctl->regd_name) -+ goto release_lock; -+ } -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+ if (rfctl->regd_src == REGD_SRC_OS) { -+ if (IS_ALPHA2_WORLDWIDE(rfctl->country_ent->alpha2)) -+ rfctl->regd_name = regd_str(TXPWR_LMT_WW); -+ else { -+ char alpha2[3] = { -+ rfctl->country_ent->alpha2[0], rfctl->country_ent->alpha2[1], 0}; -+ -+ ent = _rtw_txpwr_lmt_get_by_name(rfctl, alpha2); -+ if (ent) -+ rfctl->regd_name = ent->regd_name; -+ } -+ -+ if (rfctl->regd_name) { -+ RTW_PRINT("mapping country:%c%c to regd_name:%s\n" -+ , rfctl->country_ent->alpha2[0] -+ , rfctl->country_ent->alpha2[1] -+ , rfctl->regd_name -+ ); -+ goto release_lock; -+ } -+ -+ if (rfctl->ChannelPlan == RTW_CHPLAN_UNSPECIFIED) { -+ rfctl->regd_name = regd_str(TXPWR_LMT_WW); -+ RTW_PRINT("mapping unsupported country:%c%c to regd_name:%s\n" -+ , rfctl->country_ent->alpha2[0] -+ , rfctl->country_ent->alpha2[1] -+ , rfctl->regd_name -+ ); -+ goto release_lock; -+ } -+ } -+#endif -+ -+ /* follow default channel plan mapping */ -+ regd = rtw_chplan_get_default_regd(rfctl->ChannelPlan); -+ if (regd == TXPWR_LMT_NONE) -+ rfctl->regd_name = regd_str(TXPWR_LMT_NONE); -+ else if (regd == TXPWR_LMT_WW) -+ rfctl->regd_name = regd_str(TXPWR_LMT_WW); -+ else { -+ ent = _rtw_txpwr_lmt_get_by_name(rfctl, regd_str(regd)); -+ if (ent) -+ rfctl->regd_name = ent->regd_name; -+ } -+ -+ RTW_PRINT("default mapping domain:0x%02x to%s regd_name:%s\n" -+ , rfctl->ChannelPlan -+ , rfctl->regd_name ? "" : " unknown" -+ , regd_str(regd) -+ ); -+ if (rfctl->regd_name) -+ goto release_lock; -+ -+ switch (regd) { -+ /* -+ * To support older chips without new predefined regd: -+ * - use FCC if IC or CHILE or MEXICO not found -+ * - use ETSI if KCC or ACMA not found -+ */ -+ case TXPWR_LMT_IC: -+ case TXPWR_LMT_KCC: -+ case TXPWR_LMT_NCC: -+ case TXPWR_LMT_ACMA: -+ case TXPWR_LMT_CHILE: -+ case TXPWR_LMT_MEXICO: -+ if (regd == TXPWR_LMT_IC || regd == TXPWR_LMT_NCC || regd == TXPWR_LMT_CHILE || regd == TXPWR_LMT_MEXICO) -+ regd = TXPWR_LMT_FCC; -+ else if (regd == TXPWR_LMT_KCC || regd == TXPWR_LMT_ACMA) -+ regd = TXPWR_LMT_ETSI; -+ ent = _rtw_txpwr_lmt_get_by_name(rfctl, regd_str(regd)); -+ if (ent) -+ rfctl->regd_name = ent->regd_name; -+ RTW_PRINT("alternate regd_name:%s %s\n" -+ , regd_str(regd) -+ , rfctl->regd_name ? "is used" : "not found" -+ ); -+ if (rfctl->regd_name) -+ break; -+ /* fall through */ -+ default: -+ rfctl->regd_name = regd_str(TXPWR_LMT_WW); -+ RTW_PRINT("assign %s for default case\n", regd_str(TXPWR_LMT_WW)); -+ break; -+ }; -+ -+release_lock: -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+} -+#endif /* CONFIG_TXPWR_LIMIT */ -+ -+int rtw_rfctl_init(_adapter *adapter) -+{ -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ int ret; -+ -+ _rtw_mutex_init(&rfctl->offch_mutex); -+ -+#if CONFIG_TXPWR_LIMIT -+ _rtw_mutex_init(&rfctl->txpwr_lmt_mutex); -+ _rtw_init_listhead(&rfctl->reg_exc_list); -+ _rtw_init_listhead(&rfctl->txpwr_lmt_list); -+#endif -+ -+ rfctl->ch_sel_within_same_band = 1; -+ -+#ifdef CONFIG_DFS_MASTER -+ rfctl->dfs_region_domain = regsty->dfs_region_domain; -+ rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED; -+ rtw_init_timer(&(rfctl->radar_detect_timer), adapter, rtw_dfs_rd_timer_hdl, rfctl); -+#endif -+#if CONFIG_DFS_SLAVE_WITH_RADAR_DETECT -+ rfctl->dfs_slave_with_rd = 1; -+#endif -+ -+ if (regsty->antenna_gain != UNSPECIFIED_MBM) -+ rfctl->antenna_gain = regsty->antenna_gain; -+ -+ ret = op_class_pref_init(adapter); -+ if (ret != _SUCCESS) -+ op_class_pref_deinit(adapter); -+ -+ return ret; -+} -+ -+void rtw_rfctl_deinit(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ _rtw_mutex_free(&rfctl->offch_mutex); -+ -+#if CONFIG_TXPWR_LIMIT -+ rtw_regd_exc_list_free(rfctl); -+ rtw_txpwr_lmt_list_free(rfctl); -+ _rtw_mutex_free(&rfctl->txpwr_lmt_mutex); -+#endif -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+ if (rfctl->regd_src == REGD_SRC_OS) -+ rtw_mfree((void *)rfctl->country_ent, sizeof(struct country_chplan)); -+#endif -+ -+ op_class_pref_deinit(adapter); -+} -+ -+void rtw_rfctl_chplan_init(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ rfctl->max_chan_nums = init_channel_set(adapter); -+ op_class_pref_apply_regulatory(adapter, REG_CHANGE); -+ init_channel_list(adapter, rfctl->channel_set, &rfctl->channel_list); -+} -+ -+void rtw_rfctl_update_op_mode(struct rf_ctl_t *rfctl, u8 ifbmp_mod, u8 if_op) -+{ -+ struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); -+ _adapter *iface; -+ struct mlme_ext_priv *mlmeext; -+ u8 op_class = 0; -+ u8 op_ch = 0; -+ s16 op_txpwr_max; -+ u8 if_op_class[CONFIG_IFACE_NUMBER] = {0}; -+ u8 if_op_ch[CONFIG_IFACE_NUMBER] = {0}; -+ u8 ch, bw, offset; -+ u8 u_ch = 0, u_bw, u_offset; -+ bool notify = 0; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ mlmeext = &iface->mlmeextpriv; -+ -+ if (ifbmp_mod & BIT(i)) { -+ if (!if_op) -+ continue; -+ } else if (!MLME_IS_ASOC(iface) || MLME_IS_OPCH_SW(iface)) -+ continue; -+ -+ ch = mlmeext->cur_channel; -+ bw = mlmeext->cur_bwmode; -+ offset = mlmeext->cur_ch_offset; -+ if_op_class[i] = rtw_get_op_class_by_chbw(ch, bw, offset); -+ if_op_ch[i] = if_op_class[i] ? ch : 0; -+ -+ if (!u_ch) { -+ u_ch = ch; -+ u_bw = bw; -+ u_offset = offset; -+ } else { -+ rtw_warn_on(!rtw_is_chbw_grouped(u_ch, u_bw, u_offset, ch, bw, offset)); -+ rtw_sync_chbw(&ch, &bw, &offset, &u_ch, &u_bw, &u_offset); -+ } -+ } -+ -+ op_class = rtw_get_op_class_by_chbw(u_ch, u_bw, u_offset); -+ op_ch = op_class ? u_ch : 0; -+ op_txpwr_max = rtw_rfctl_get_oper_txpwr_max_mbm(rfctl, u_ch, u_bw, u_offset, ifbmp_mod, if_op, 1); -+ -+ if (op_class != rfctl->op_class -+ || op_ch != rfctl->op_ch -+ || op_txpwr_max != rfctl->op_txpwr_max -+ || _rtw_memcmp(if_op_class, rfctl->if_op_class, sizeof(u8) * CONFIG_IFACE_NUMBER) == _FALSE -+ || _rtw_memcmp(if_op_ch, rfctl->if_op_ch, sizeof(u8) * CONFIG_IFACE_NUMBER) == _FALSE) -+ notify = 1; -+ -+ rfctl->op_class = op_class; -+ rfctl->op_ch = op_ch; -+ rfctl->op_txpwr_max = op_txpwr_max; -+ _rtw_memcpy(rfctl->if_op_class, if_op_class, sizeof(u8) * CONFIG_IFACE_NUMBER); -+ _rtw_memcpy(rfctl->if_op_ch, if_op_ch, sizeof(u8) * CONFIG_IFACE_NUMBER); -+ -+ if (0) -+ RTW_INFO("radio: %u,%u,%u %d notify:%d\n", u_ch, u_bw, u_offset, op_txpwr_max, notify); -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ mlmeext = &iface->mlmeextpriv; -+ -+ if (ifbmp_mod & BIT(i)) { -+ if (!if_op) -+ continue; -+ } else if (!MLME_IS_ASOC(iface)) -+ continue; -+ if (0) -+ RTW_INFO(ADPT_FMT": %u,%u,%u\n", ADPT_ARG(iface) -+ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); -+ } -+ -+ if (notify) -+ rtw_nlrtw_radio_opmode_notify(rfctl); -+ -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ cmap_intfs_nl_bss_status_event(iface, 0); -+ } -+#endif -+} -+ -+inline u8 rtw_rfctl_get_dfs_domain(struct rf_ctl_t *rfctl) -+{ -+#ifdef CONFIG_DFS_MASTER -+ return rfctl->dfs_region_domain; -+#else -+ return RTW_DFS_REGD_NONE; -+#endif -+} -+ -+inline u8 rtw_rfctl_dfs_domain_unknown(struct rf_ctl_t *rfctl) -+{ -+#ifdef CONFIG_DFS_MASTER -+ return rtw_rfctl_get_dfs_domain(rfctl) == RTW_DFS_REGD_NONE; -+#else -+ return 1; -+#endif -+} -+ -+#ifdef CONFIG_DFS_MASTER -+/* -+* called in rtw_dfs_rd_enable() -+* assume the request channel coverage is DFS range -+* base on the current status and the request channel coverage to check if need to reset complete CAC time -+*/ -+bool rtw_is_cac_reset_needed(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset) -+{ -+ bool needed = _FALSE; -+ u32 cur_hi, cur_lo, hi, lo; -+ -+ if (rfctl->radar_detected == 1) { -+ needed = _TRUE; -+ goto exit; -+ } -+ -+ if (rfctl->radar_detect_ch == 0) { -+ needed = _TRUE; -+ goto exit; -+ } -+ -+ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) { -+ RTW_ERR("request detection range ch:%u, bw:%u, offset:%u\n", ch, bw, offset); -+ rtw_warn_on(1); -+ } -+ -+ if (rtw_chbw_to_freq_range(rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset, &cur_hi, &cur_lo) == _FALSE) { -+ RTW_ERR("cur detection range ch:%u, bw:%u, offset:%u\n", rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset); -+ rtw_warn_on(1); -+ } -+ -+ if (hi <= lo || cur_hi <= cur_lo) { -+ RTW_ERR("hi:%u, lo:%u, cur_hi:%u, cur_lo:%u\n", hi, lo, cur_hi, cur_lo); -+ rtw_warn_on(1); -+ } -+ -+ if (rtw_is_range_a_in_b(hi, lo, cur_hi, cur_lo)) { -+ /* request is in current detect range */ -+ goto exit; -+ } -+ -+ /* check if request channel coverage has new range and the new range is in DFS range */ -+ if (!rtw_is_range_overlap(hi, lo, cur_hi, cur_lo)) { -+ /* request has no overlap with current */ -+ needed = _TRUE; -+ } else if (rtw_is_range_a_in_b(cur_hi, cur_lo, hi, lo)) { -+ /* request is supper set of current */ -+ if ((hi != cur_hi && rtw_chset_is_dfs_range(rfctl->channel_set, hi, cur_hi)) -+ || (lo != cur_lo && rtw_chset_is_dfs_range(rfctl->channel_set, cur_lo, lo))) -+ needed = _TRUE; -+ } else { -+ /* request is not supper set of current, but has overlap */ -+ if ((lo < cur_lo && rtw_chset_is_dfs_range(rfctl->channel_set, cur_lo, lo)) -+ || (hi > cur_hi && rtw_chset_is_dfs_range(rfctl->channel_set, hi, cur_hi))) -+ needed = _TRUE; -+ } -+ -+exit: -+ return needed; -+} -+ -+bool _rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset) -+{ -+ bool ret = _FALSE; -+ u32 hi = 0, lo = 0; -+ u32 r_hi = 0, r_lo = 0; -+ int i; -+ -+ if (rfctl->radar_detect_by_others) -+ goto exit; -+ -+ if (rfctl->radar_detect_ch == 0) -+ goto exit; -+ -+ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (rtw_chbw_to_freq_range(rfctl->radar_detect_ch -+ , rfctl->radar_detect_bw, rfctl->radar_detect_offset -+ , &r_hi, &r_lo) == _FALSE) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (rtw_is_range_overlap(hi, lo, r_hi, r_lo)) -+ ret = _TRUE; -+ -+exit: -+ return ret; -+} -+ -+bool rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl) -+{ -+ return _rtw_rfctl_overlap_radar_detect_ch(rfctl -+ , rfctl_to_dvobj(rfctl)->oper_channel -+ , rfctl_to_dvobj(rfctl)->oper_bwmode -+ , rfctl_to_dvobj(rfctl)->oper_ch_offset); -+} -+ -+bool rtw_rfctl_is_tx_blocked_by_ch_waiting(struct rf_ctl_t *rfctl) -+{ -+ return rtw_rfctl_overlap_radar_detect_ch(rfctl) && IS_CH_WAITING(rfctl); -+} -+ -+bool rtw_chset_is_chbw_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset) -+{ -+ bool ret = _FALSE; -+ u32 hi = 0, lo = 0; -+ int i; -+ -+ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) -+ goto exit; -+ -+ for (i = 0; i < MAX_CHANNEL_NUM && ch_set[i].ChannelNum != 0; i++) { -+ if (!rtw_ch2freq(ch_set[i].ChannelNum)) { -+ rtw_warn_on(1); -+ continue; -+ } -+ -+ if (!CH_IS_NON_OCP(&ch_set[i])) -+ continue; -+ -+ if (lo <= rtw_ch2freq(ch_set[i].ChannelNum) -+ && rtw_ch2freq(ch_set[i].ChannelNum) <= hi -+ ) { -+ ret = _TRUE; -+ break; -+ } -+ } -+ -+exit: -+ return ret; -+} -+ -+bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch) -+{ -+ return rtw_chset_is_chbw_non_ocp(ch_set, ch, CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE); -+} -+ -+u32 rtw_chset_get_ch_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset) -+{ -+ int ms = 0; -+ systime current_time; -+ u32 hi = 0, lo = 0; -+ int i; -+ -+ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) -+ goto exit; -+ -+ current_time = rtw_get_current_time(); -+ -+ for (i = 0; i < MAX_CHANNEL_NUM && ch_set[i].ChannelNum != 0; i++) { -+ if (!rtw_ch2freq(ch_set[i].ChannelNum)) { -+ rtw_warn_on(1); -+ continue; -+ } -+ -+ if (!CH_IS_NON_OCP(&ch_set[i])) -+ continue; -+ -+ if (lo <= rtw_ch2freq(ch_set[i].ChannelNum) -+ && rtw_ch2freq(ch_set[i].ChannelNum) <= hi -+ ) { -+ if (rtw_systime_to_ms(ch_set[i].non_ocp_end_time - current_time) > ms) -+ ms = rtw_systime_to_ms(ch_set[i].non_ocp_end_time - current_time); -+ } -+ } -+ -+exit: -+ return ms; -+} -+ -+/** -+ * rtw_chset_update_non_ocp - update non_ocp_end_time according to the given @ch, @bw, @offset into @ch_set -+ * @ch_set: the given channel set -+ * @ch: channel number on which radar is detected -+ * @bw: bandwidth on which radar is detected -+ * @offset: bandwidth offset on which radar is detected -+ * @ms: ms to add from now to update non_ocp_end_time, ms < 0 means use NON_OCP_TIME_MS -+ */ -+static bool _rtw_chset_update_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset, int ms) -+{ -+ u32 hi = 0, lo = 0; -+ int i; -+ bool updated = 0; -+ -+ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) -+ goto exit; -+ -+ for (i = 0; i < MAX_CHANNEL_NUM && ch_set[i].ChannelNum != 0; i++) { -+ if (!rtw_ch2freq(ch_set[i].ChannelNum)) { -+ rtw_warn_on(1); -+ continue; -+ } -+ -+ if (lo <= rtw_ch2freq(ch_set[i].ChannelNum) -+ && rtw_ch2freq(ch_set[i].ChannelNum) <= hi -+ ) { -+ if (ms >= 0) -+ ch_set[i].non_ocp_end_time = rtw_get_current_time() + rtw_ms_to_systime(ms); -+ else -+ ch_set[i].non_ocp_end_time = rtw_get_current_time() + rtw_ms_to_systime(NON_OCP_TIME_MS); -+ ch_set[i].flags |= RTW_CHF_NON_OCP; -+ updated = 1; -+ } -+ } -+ -+exit: -+ return updated; -+} -+ -+inline bool rtw_chset_update_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset) -+{ -+ return _rtw_chset_update_non_ocp(ch_set, ch, bw, offset, -1); -+} -+ -+inline bool rtw_chset_update_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset, int ms) -+{ -+ return _rtw_chset_update_non_ocp(ch_set, ch, bw, offset, ms); -+} -+ -+static bool rtw_chset_chk_non_ocp_finish_for_chbw(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset) -+{ -+ RT_CHANNEL_INFO *ch_set = rfctl->channel_set; -+ u8 cch; -+ u8 *op_chs; -+ u8 op_ch_num; -+ int i; -+ int ch_idx; -+ bool ret = 0; -+ -+ cch = rtw_get_center_ch(ch, bw, offset); -+ -+ if (!rtw_get_op_chs_by_cch_bw(cch, bw, &op_chs, &op_ch_num)) -+ goto exit; -+ -+ for (i = 0; i < op_ch_num; i++) { -+ if (0) -+ RTW_INFO("%u,%u,%u - cch:%u, bw:%u, op_ch:%u\n", ch, bw, offset, cch, bw, *(op_chs + i)); -+ ch_idx = rtw_chset_search_ch(ch_set, *(op_chs + i)); -+ if (ch_idx == -1) -+ break; -+ if (!(ch_set[ch_idx].flags & RTW_CHF_NON_OCP) || CH_IS_NON_OCP(&ch_set[ch_idx])) -+ break; -+ } -+ -+ if (op_ch_num != 0 && i == op_ch_num) { -+ ret = 1; -+ /* clear RTTW_CHF_NON_OCP flag */ -+ for (i = 0; i < op_ch_num; i++) { -+ ch_idx = rtw_chset_search_ch(ch_set, *(op_chs + i)); -+ ch_set[ch_idx].flags &= ~RTW_CHF_NON_OCP; -+ } -+ rtw_nlrtw_nop_finish_event(dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl)), cch, bw); -+ } -+ -+exit: -+ return ret; -+} -+ -+/* called by watchdog to clear RTW_CHF_NON_OCP and generate NON_OCP finish event */ -+void rtw_chset_chk_non_ocp_finish(struct rf_ctl_t *rfctl) -+{ -+ u8 ch, bw, offset; -+ int i; -+ -+ bw = CHANNEL_WIDTH_160; -+ while (1) { -+ for (i = 0; i < rfctl->max_chan_nums; i++) { -+ ch = rfctl->channel_set[i].ChannelNum; -+ if (!(rfctl->channel_set[i].flags & RTW_CHF_NON_OCP)) -+ continue; -+ if (!rtw_get_offset_by_chbw(ch, bw, &offset)) -+ continue; -+ -+ rtw_chset_chk_non_ocp_finish_for_chbw(rfctl, ch, bw, offset); -+ } -+ if (bw-- == CHANNEL_WIDTH_20) -+ break; -+ } -+} -+ -+u32 rtw_get_ch_waiting_ms(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms) -+{ -+ struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); -+ u32 non_ocp_ms; -+ u32 cac_ms; -+ u8 in_rd_range = 0; /* if in current radar detection range*/ -+ -+ if (rtw_chset_is_chbw_non_ocp(rfctl->channel_set, ch, bw, offset)) -+ non_ocp_ms = rtw_chset_get_ch_non_ocp_ms(rfctl->channel_set, ch, bw, offset); -+ else -+ non_ocp_ms = 0; -+ -+ if (rfctl->radar_detect_enabled) { -+ u32 cur_hi, cur_lo, hi, lo; -+ -+ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) { -+ RTW_ERR("input range ch:%u, bw:%u, offset:%u\n", ch, bw, offset); -+ rtw_warn_on(1); -+ } -+ -+ if (rtw_chbw_to_freq_range(rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset, &cur_hi, &cur_lo) == _FALSE) { -+ RTW_ERR("cur detection range ch:%u, bw:%u, offset:%u\n", rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset); -+ rtw_warn_on(1); -+ } -+ -+ if (rtw_is_range_a_in_b(hi, lo, cur_hi, cur_lo)) -+ in_rd_range = 1; -+ } -+ -+ if (!rtw_chset_is_dfs_chbw(rfctl->channel_set, ch, bw, offset)) -+ cac_ms = 0; -+ else if (in_rd_range && !non_ocp_ms) { -+ if (IS_CH_WAITING(rfctl)) -+ cac_ms = rtw_systime_to_ms(rfctl->cac_end_time - rtw_get_current_time()); -+ else -+ cac_ms = 0; -+ } else if (rtw_is_long_cac_ch(ch, bw, offset, rtw_rfctl_get_dfs_domain(rfctl))) -+ cac_ms = CAC_TIME_CE_MS; -+ else -+ cac_ms = CAC_TIME_MS; -+ -+ if (r_non_ocp_ms) -+ *r_non_ocp_ms = non_ocp_ms; -+ if (r_cac_ms) -+ *r_cac_ms = cac_ms; -+ -+ return non_ocp_ms + cac_ms; -+} -+ -+void rtw_reset_cac(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset) -+{ -+ u32 non_ocp_ms; -+ u32 cac_ms; -+ -+ rtw_get_ch_waiting_ms(rfctl -+ , ch -+ , bw -+ , offset -+ , &non_ocp_ms -+ , &cac_ms -+ ); -+ -+ rfctl->cac_start_time = rtw_get_current_time() + rtw_ms_to_systime(non_ocp_ms); -+ rfctl->cac_end_time = rfctl->cac_start_time + rtw_ms_to_systime(cac_ms); -+ -+ /* skip special value */ -+ if (rfctl->cac_start_time == RTW_CAC_STOPPED) { -+ rfctl->cac_start_time++; -+ rfctl->cac_end_time++; -+ } -+ if (rfctl->cac_end_time == RTW_CAC_STOPPED) -+ rfctl->cac_end_time++; -+} -+ -+u32 rtw_force_stop_cac(struct rf_ctl_t *rfctl, u32 timeout_ms) -+{ -+ struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); -+ systime start; -+ u32 pass_ms; -+ -+ start = rtw_get_current_time(); -+ -+ rfctl->cac_force_stop = 1; -+ -+ while (rtw_get_passing_time_ms(start) <= timeout_ms -+ && IS_UNDER_CAC(rfctl) -+ ) { -+ if (dev_is_surprise_removed(dvobj) || dev_is_drv_stopped(dvobj)) -+ break; -+ rtw_msleep_os(20); -+ } -+ -+ if (IS_UNDER_CAC(rfctl)) { -+ if (!dev_is_surprise_removed(dvobj) && !dev_is_drv_stopped(dvobj)) -+ RTW_INFO("%s waiting for cac stop timeout!\n", __func__); -+ } -+ -+ rfctl->cac_force_stop = 0; -+ -+ pass_ms = rtw_get_passing_time_ms(start); -+ -+ return pass_ms; -+} -+#endif /* CONFIG_DFS_MASTER */ -+ -+/* choose channel with shortest waiting (non ocp + cac) time */ -+bool rtw_choose_shortest_waiting_ch(struct rf_ctl_t *rfctl, u8 sel_ch, u8 max_bw -+ , u8 *dec_ch, u8 *dec_bw, u8 *dec_offset -+ , u8 e_flags, u8 d_flags, u8 cur_ch, bool by_int_info, u8 mesh_only) -+{ -+#ifndef DBG_CHOOSE_SHORTEST_WAITING_CH -+#define DBG_CHOOSE_SHORTEST_WAITING_CH 0 -+#endif -+ struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); -+#ifdef CONFIG_RTW_ACS -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(dvobj_get_primary_adapter(dvobj)); -+#endif -+ struct registry_priv *regsty = dvobj_to_regsty(dvobj); -+ u8 ch, bw, offset; -+ u8 ch_c = 0, bw_c = 0, offset_c = 0; -+ int i; -+ u32 min_waiting_ms = 0; -+ u16 int_factor_c = 0; -+ -+ if (!dec_ch || !dec_bw || !dec_offset) { -+ rtw_warn_on(1); -+ return _FALSE; -+ } -+ -+ RTW_INFO("%s: sel_ch:%u max_bw:%u e_flags:0x%02x d_flags:0x%02x cur_ch:%u within_sb:%d%s%s\n" -+ , __func__, sel_ch, max_bw, e_flags, d_flags, cur_ch, rfctl->ch_sel_within_same_band -+ , by_int_info ? " int" : "", mesh_only ? " mesh_only" : ""); -+ -+ /* full search and narrow bw judegement first to avoid potetial judegement timing issue */ -+ for (bw = CHANNEL_WIDTH_20; bw <= max_bw; bw++) { -+ if (!hal_is_bw_support(dvobj_get_primary_adapter(dvobj), bw)) -+ continue; -+ -+ for (i = 0; i < rfctl->max_chan_nums; i++) { -+ u32 non_ocp_ms = 0; -+ u32 cac_ms = 0; -+ u32 waiting_ms = 0; -+ u16 int_factor = 0; -+ bool dfs_ch; -+ bool non_ocp; -+ bool long_cac; -+ -+ ch = rfctl->channel_set[i].ChannelNum; -+ if (sel_ch) { -+ if (ch != sel_ch) -+ continue; -+ } else if (rfctl->ch_sel_within_same_band && !rtw_is_same_band(cur_ch, ch)) -+ continue; -+ -+ if (ch > 14) { -+ if (bw > REGSTY_BW_5G(regsty)) -+ continue; -+ } else { -+ if (bw > REGSTY_BW_2G(regsty)) -+ continue; -+ } -+ -+ if (mesh_only && ch >= 5 && ch <= 9 && bw > CHANNEL_WIDTH_20) -+ continue; -+ -+ if (!rtw_get_offset_by_chbw(ch, bw, &offset)) -+ continue; -+ -+ if (!rtw_chset_is_chbw_valid(rfctl->channel_set, ch, bw, offset, 0, 0)) -+ continue; -+ -+ if ((e_flags & RTW_CHF_DFS) || (d_flags & RTW_CHF_DFS)) { -+ dfs_ch = rtw_chset_is_dfs_chbw(rfctl->channel_set, ch, bw, offset); -+ if (((e_flags & RTW_CHF_DFS) && !dfs_ch) -+ || ((d_flags & RTW_CHF_DFS) && dfs_ch)) -+ continue; -+ } -+ -+ if ((e_flags & RTW_CHF_LONG_CAC) || (d_flags & RTW_CHF_LONG_CAC)) { -+ long_cac = rtw_is_long_cac_ch(ch, bw, offset, rtw_rfctl_get_dfs_domain(rfctl)); -+ if (((e_flags & RTW_CHF_LONG_CAC) && !long_cac) -+ || ((d_flags & RTW_CHF_LONG_CAC) && long_cac)) -+ continue; -+ } -+ -+ if ((e_flags & RTW_CHF_NON_OCP) || (d_flags & RTW_CHF_NON_OCP)) { -+ non_ocp = rtw_chset_is_chbw_non_ocp(rfctl->channel_set, ch, bw, offset); -+ if (((e_flags & RTW_CHF_NON_OCP) && !non_ocp) -+ || ((d_flags & RTW_CHF_NON_OCP) && non_ocp)) -+ continue; -+ } -+ -+ #ifdef CONFIG_DFS_MASTER -+ waiting_ms = rtw_get_ch_waiting_ms(rfctl, ch, bw, offset, &non_ocp_ms, &cac_ms); -+ #endif -+ -+ #ifdef CONFIG_RTW_ACS -+ if (by_int_info) { -+ /* for now, consider only primary channel */ -+ int_factor = hal_data->acs.interference_time[i]; -+ } -+ #endif -+ -+ if (DBG_CHOOSE_SHORTEST_WAITING_CH) -+ RTW_INFO("%s:%u,%u,%u %u(non_ocp:%u, cac:%u), int:%u\n" -+ , __func__, ch, bw, offset, waiting_ms, non_ocp_ms, cac_ms, int_factor); -+ -+ if (ch_c == 0 -+ /* first: smaller wating time */ -+ || min_waiting_ms > waiting_ms -+ /* then: less interference */ -+ || (min_waiting_ms == waiting_ms && int_factor_c > int_factor) -+ /* then: wider bw */ -+ || (min_waiting_ms == waiting_ms && int_factor_c == int_factor && bw > bw_c) -+ /* if all condition equal, same channel -> same band prefer */ -+ || (min_waiting_ms == waiting_ms && int_factor_c == int_factor && bw == bw_c -+ && ((cur_ch != ch_c && cur_ch == ch) -+ || (!rtw_is_same_band(cur_ch, ch_c) && rtw_is_same_band(cur_ch, ch))) -+ ) -+ ) { -+ ch_c = ch; -+ bw_c = bw; -+ offset_c = offset; -+ min_waiting_ms = waiting_ms; -+ int_factor_c = int_factor; -+ } -+ } -+ } -+ -+ if (ch_c != 0) { -+ RTW_INFO("%s: select %u,%u,%u waiting_ms:%u\n" -+ , __func__, ch_c, bw_c, offset_c, min_waiting_ms); -+ *dec_ch = ch_c; -+ *dec_bw = bw_c; -+ *dec_offset = offset_c; -+ return _TRUE; -+ } else { -+ RTW_INFO("%s: not found\n", __func__); -+ if (d_flags == 0) -+ rtw_warn_on(1); -+ } -+ -+ return _FALSE; -+} -+ -+#ifdef CONFIG_PROC_DEBUG -+#define RTW_CHF_FMT "%s%s%s%s%s%s" -+ -+#define RTW_CHF_ARG_NO_IR(flags) (flags & RTW_CHF_NO_IR) ? " NO_IR" : "" -+#define RTW_CHF_ARG_DFS(flags) , (flags & RTW_CHF_DFS) ? " DFS" : "" -+#define RTW_CHF_ARG_NO_HT40U(flags) , (flags & RTW_CHF_NO_HT40U) ? " NO_40M+" : "" -+#define RTW_CHF_ARG_NO_HT40L(flags) , (flags & RTW_CHF_NO_HT40L) ? " NO_40M-" : "" -+#define RTW_CHF_ARG_NO_80MHZ(flags) , (flags & RTW_CHF_NO_80MHZ) ? " NO_80M" : "" -+#define RTW_CHF_ARG_NO_160MHZ(flags) , (flags & RTW_CHF_NO_160MHZ) ? " NO_160M" : "" -+ -+#define RTW_CHF_ARG(flags) \ -+ RTW_CHF_ARG_NO_IR(flags) \ -+ RTW_CHF_ARG_DFS(flags) \ -+ RTW_CHF_ARG_NO_HT40U(flags) \ -+ RTW_CHF_ARG_NO_HT40L(flags) \ -+ RTW_CHF_ARG_NO_80MHZ(flags) \ -+ RTW_CHF_ARG_NO_160MHZ(flags) -+ -+void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set, u8 chset_num) -+{ -+ char buf[8]; -+ u8 i; -+ -+ RTW_PRINT_SEL(sel, "%-3s %-4s %-4s flags\n", "ch", "freq", "nocp"); -+ -+ for (i = 0; i < MAX_CHANNEL_NUM && i < chset_num && ch_set[i].ChannelNum != 0; i++) { -+ #ifdef CONFIG_DFS_MASTER -+ if ((ch_set[i].flags & RTW_CHF_DFS) && CH_IS_NON_OCP(&ch_set[i])) -+ snprintf(buf, 8, "%d", rtw_systime_to_ms(ch_set[i].non_ocp_end_time - rtw_get_current_time()) / 1000); -+ else -+ #endif -+ snprintf(buf, 8, "0"); -+ -+ RTW_PRINT_SEL(sel, "%3u %4u %4s"RTW_CHF_FMT"\n" -+ , ch_set[i].ChannelNum, rtw_ch2freq(ch_set[i].ChannelNum), buf -+ , RTW_CHF_ARG(ch_set[i].flags) -+ ); -+ } -+ -+ RTW_PRINT_SEL(sel, "total ch number:%d\n", i); -+} -+ -+void dump_cur_chset(void *sel, struct rf_ctl_t *rfctl) -+{ -+ struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); -+ struct registry_priv *regsty = dvobj_to_regsty(dvobj); -+ struct get_chplan_resp *chplan; -+ int i; -+ -+ if (rtw_get_chplan_cmd(dvobj_get_primary_adapter(dvobj), RTW_CMDF_WAIT_ACK, &chplan) == _FAIL) -+ return; -+ -+ RTW_PRINT_SEL(sel, "regd_src:%s(%d)\n", regd_src_str(chplan->regd_src), chplan->regd_src); -+ -+ if (chplan->has_country) -+ dump_country_chplan(sel, &chplan->country_ent); -+ else -+ RTW_PRINT_SEL(sel, "chplan:0x%02X\n", chplan->channel_plan); -+ -+#if CONFIG_TXPWR_LIMIT -+ RTW_PRINT_SEL(sel, "PLS regd:%s\n", chplan->regd_name); -+#endif -+ -+#ifdef CONFIG_DFS_MASTER -+ RTW_PRINT_SEL(sel, "dfs_domain:%s(%u)\n", rtw_dfs_regd_str(chplan->dfs_domain), chplan->dfs_domain); -+#endif -+ -+ for (i = 0; i < MAX_CHANNEL_NUM; i++) -+ if (regsty->excl_chs[i] != 0) -+ break; -+ -+ if (i < MAX_CHANNEL_NUM) { -+ RTW_PRINT_SEL(sel, "excl_chs:"); -+ for (i = 0; i < MAX_CHANNEL_NUM; i++) { -+ if (regsty->excl_chs[i] == 0) -+ break; -+ _RTW_PRINT_SEL(sel, "%u ", regsty->excl_chs[i]); -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ -+ dump_chset(sel, chplan->chset, chplan->chset_num); -+ -+ rtw_vmfree(chplan, sizeof(struct get_chplan_resp) + sizeof(RT_CHANNEL_INFO) * chplan->chset_num); -+} -+#endif -+ -+/* -+ * Search the @param ch in given @param ch_set -+ * @ch_set: the given channel set -+ * @ch: the given channel number -+ * -+ * return the index of channel_num in channel_set, -1 if not found -+ */ -+int rtw_chset_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch) -+{ -+ int i; -+ -+ if (ch == 0) -+ return -1; -+ -+ for (i = 0; i < MAX_CHANNEL_NUM && ch_set[i].ChannelNum != 0; i++) { -+ if (ch == ch_set[i].ChannelNum) -+ return i; -+ } -+ -+ return -1; -+} -+ -+/* -+ * Check if the @param ch, bw, offset is valid for the given @param ch_set -+ * @ch_set: the given channel set -+ * @ch: the given channel number -+ * @bw: the given bandwidth -+ * @offset: the given channel offset -+ * -+ * return valid (1) or not (0) -+ */ -+u8 rtw_chset_is_chbw_valid(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset -+ , bool allow_primary_passive, bool allow_passive) -+{ -+ u8 cch; -+ u8 *op_chs; -+ u8 op_ch_num; -+ u8 valid = 0; -+ int i; -+ int ch_idx; -+ -+ cch = rtw_get_center_ch(ch, bw, offset); -+ -+ if (!rtw_get_op_chs_by_cch_bw(cch, bw, &op_chs, &op_ch_num)) -+ goto exit; -+ -+ for (i = 0; i < op_ch_num; i++) { -+ if (0) -+ RTW_INFO("%u,%u,%u - cch:%u, bw:%u, op_ch:%u\n", ch, bw, offset, cch, bw, *(op_chs + i)); -+ ch_idx = rtw_chset_search_ch(ch_set, *(op_chs + i)); -+ if (ch_idx == -1) -+ break; -+ if (ch_set[ch_idx].flags & RTW_CHF_NO_IR) { -+ if ((!allow_primary_passive && ch_set[ch_idx].ChannelNum == ch) -+ || (!allow_passive && ch_set[ch_idx].ChannelNum != ch)) -+ break; -+ } -+ if (bw >= CHANNEL_WIDTH_40) { -+ if ((ch_set[ch_idx].flags & RTW_CHF_NO_HT40U) && i % 2 == 0) -+ break; -+ if ((ch_set[ch_idx].flags & RTW_CHF_NO_HT40L) && i % 2 == 1) -+ break; -+ } -+ if (bw >= CHANNEL_WIDTH_80 && (ch_set[ch_idx].flags & RTW_CHF_NO_80MHZ)) -+ break; -+ if (bw >= CHANNEL_WIDTH_160 && (ch_set[ch_idx].flags & RTW_CHF_NO_160MHZ)) -+ break; -+ } -+ -+ if (op_ch_num != 0 && i == op_ch_num) -+ valid = 1; -+ -+exit: -+ return valid; -+} -+ -+/** -+ * rtw_chset_sync_chbw - obey g_ch, adjust g_bw, g_offset, bw, offset to fit in channel plan -+ * @ch_set: channel plan to check -+ * @req_ch: pointer of the request ch, may be modified further -+ * @req_bw: pointer of the request bw, may be modified further -+ * @req_offset: pointer of the request offset, may be modified further -+ * @g_ch: pointer of the ongoing group ch -+ * @g_bw: pointer of the ongoing group bw, may be modified further -+ * @g_offset: pointer of the ongoing group offset, may be modified further -+ * @allow_primary_passive: if allow passive primary ch when deciding chbw -+ * @allow_passive: if allow passive ch (not primary) when deciding chbw -+ */ -+void rtw_chset_sync_chbw(RT_CHANNEL_INFO *ch_set, u8 *req_ch, u8 *req_bw, u8 *req_offset -+ , u8 *g_ch, u8 *g_bw, u8 *g_offset, bool allow_primary_passive, bool allow_passive) -+{ -+ u8 r_ch, r_bw, r_offset; -+ u8 u_ch, u_bw, u_offset; -+ u8 cur_bw = *req_bw; -+ -+ while (1) { -+ r_ch = *req_ch; -+ r_bw = cur_bw; -+ r_offset = *req_offset; -+ u_ch = *g_ch; -+ u_bw = *g_bw; -+ u_offset = *g_offset; -+ -+ rtw_sync_chbw(&r_ch, &r_bw, &r_offset, &u_ch, &u_bw, &u_offset); -+ -+ if (rtw_chset_is_chbw_valid(ch_set, r_ch, r_bw, r_offset, allow_primary_passive, allow_passive)) -+ break; -+ if (cur_bw == CHANNEL_WIDTH_20) { -+ rtw_warn_on(1); -+ break; -+ } -+ cur_bw--; -+ }; -+ -+ *req_ch = r_ch; -+ *req_bw = r_bw; -+ *req_offset = r_offset; -+ *g_ch = u_ch; -+ *g_bw = u_bw; -+ *g_offset = u_offset; -+} -+ -+/* -+ * Check the @param ch is fit with setband setting of @param adapter -+ * @adapter: the given adapter -+ * @ch: the given channel number -+ * -+ * return _TRUE when check valid, _FALSE not valid -+ */ -+bool rtw_mlme_band_check(_adapter *adapter, const u32 ch) -+{ -+ if (adapter->setband == WIFI_FREQUENCY_BAND_AUTO /* 2.4G and 5G */ -+ || (adapter->setband == WIFI_FREQUENCY_BAND_2GHZ && ch < 35) /* 2.4G only */ -+ || (adapter->setband == WIFI_FREQUENCY_BAND_5GHZ && ch > 35) /* 5G only */ -+ ) -+ return _TRUE; -+ return _FALSE; -+} -+inline void RTW_SET_SCAN_BAND_SKIP(_adapter *padapter, int skip_band) -+{ -+ int bs = ATOMIC_READ(&padapter->bandskip); -+ -+ bs |= skip_band; -+ ATOMIC_SET(&padapter->bandskip, bs); -+} -+ -+inline void RTW_CLR_SCAN_BAND_SKIP(_adapter *padapter, int skip_band) -+{ -+ int bs = ATOMIC_READ(&padapter->bandskip); -+ -+ bs &= ~(skip_band); -+ ATOMIC_SET(&padapter->bandskip, bs); -+} -+inline int RTW_GET_SCAN_BAND_SKIP(_adapter *padapter) -+{ -+ return ATOMIC_READ(&padapter->bandskip); -+} -+ -+#define RTW_IS_SCAN_BAND_SKIP(padapter, skip_band) (ATOMIC_READ(&padapter->bandskip) & (skip_band)) -+ -+bool rtw_mlme_ignore_chan(_adapter *adapter, const u32 ch) -+{ -+ if (RTW_IS_SCAN_BAND_SKIP(adapter, BAND_24G) && ch < 35) /* SKIP 2.4G Band channel */ -+ return _TRUE; -+ if (RTW_IS_SCAN_BAND_SKIP(adapter, BAND_5G) && ch > 35) /* SKIP 5G Band channel */ -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+ -+/**************************************************************************** -+ -+Following are the initialization functions for WiFi MLME -+ -+*****************************************************************************/ -+ -+int init_hw_mlme_ext(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 rx_bar_enble = _TRUE; -+ -+ /* -+ * Sync driver status and hardware setting -+ */ -+ -+ /* Modify to make sure first time change channel(band) would be done properly */ -+ pHalData->current_channel = 0; -+ pHalData->current_channel_bw = CHANNEL_WIDTH_MAX; -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ pHalData->current_band_type = BAND_MAX; -+ #else -+ pHalData->current_band_type = BAND_ON_2_4G; -+ #endif -+ -+ /* set_opmode_cmd(padapter, infra_client_with_mlme); */ /* removed */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_ENABLE_RX_BAR, &rx_bar_enble); -+ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); -+ -+ return _SUCCESS; -+} -+ -+void init_mlme_default_rate_set(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ unsigned char end_set[1] = {0xff}; -+ u8 offset_datarate = 0; -+ u8 offset_basicrate = 0; -+#ifdef CONFIG_80211N_HT -+ unsigned char supported_mcs_set[16] = {0xff, 0xff, 0xff, 0xff, 0x00, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; -+#endif -+ -+ if (IsSupportedTxCCK(padapter->registrypriv.wireless_mode)) { -+ -+ unsigned char datarate_b[B_MODE_RATE_NUM] ={_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_}; -+ _rtw_memcpy(pmlmeext->datarate, datarate_b, B_MODE_RATE_NUM); -+ _rtw_memcpy(pmlmeext->basicrate, datarate_b, B_MODE_RATE_NUM); -+ offset_datarate += B_MODE_RATE_NUM; -+ offset_basicrate += B_MODE_RATE_NUM; -+ RTW_INFO("%s: support CCK\n", __func__); -+ } -+ if(IsSupportedTxOFDM(padapter->registrypriv.wireless_mode)) { -+ unsigned char datarate_g[G_MODE_RATE_NUM] ={_6M_RATE_, _9M_RATE_, _12M_RATE_, _18M_RATE_,_24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_}; -+ unsigned char basicrate_g[G_MODE_BASIC_RATE_NUM] = {_6M_RATE_, _12M_RATE_, _24M_RATE_}; -+ _rtw_memcpy(pmlmeext->datarate + offset_datarate, datarate_g, G_MODE_RATE_NUM); -+ _rtw_memcpy(pmlmeext->basicrate + offset_basicrate,basicrate_g, G_MODE_BASIC_RATE_NUM); -+ offset_datarate += G_MODE_RATE_NUM; -+ offset_basicrate += G_MODE_BASIC_RATE_NUM; -+ RTW_INFO("%s: support OFDM\n", __func__); -+ -+ } -+ _rtw_memcpy(pmlmeext->datarate + offset_datarate, end_set, 1); -+ _rtw_memcpy(pmlmeext->basicrate + offset_basicrate, end_set, 1); -+ -+#ifdef CONFIG_80211N_HT -+ if( padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode)) -+ _rtw_memcpy(pmlmeext->default_supported_mcs_set, supported_mcs_set, sizeof(pmlmeext->default_supported_mcs_set)); -+#endif -+} -+ -+static void init_mlme_ext_priv_value(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ ATOMIC_SET(&pmlmeext->event_seq, 0); -+ pmlmeext->mgnt_seq = 0;/* reset to zero when disconnect at client mode */ -+#ifdef CONFIG_IEEE80211W -+ pmlmeext->sa_query_seq = 0; -+#endif -+ pmlmeext->cur_channel = padapter->registrypriv.channel; -+ pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; -+ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ -+ pmlmeext->retry = 0; -+ -+ pmlmeext->cur_wireless_mode = padapter->registrypriv.wireless_mode; -+ init_mlme_default_rate_set(padapter); -+ -+ if ((pmlmeext->cur_channel > 14) || ((padapter->registrypriv.wireless_mode & WIRELESS_11B) == 0)) -+ pmlmeext->tx_rate = IEEE80211_OFDM_RATE_6MB; -+ else -+ pmlmeext->tx_rate = IEEE80211_CCK_RATE_1MB; -+ -+ mlmeext_set_scan_state(pmlmeext, SCAN_DISABLE); -+ pmlmeext->sitesurvey_res.channel_idx = 0; -+ pmlmeext->sitesurvey_res.bss_cnt = 0; -+ pmlmeext->sitesurvey_res.scan_ch_ms = SURVEY_TO; -+ pmlmeext->sitesurvey_res.rx_ampdu_accept = RX_AMPDU_ACCEPT_INVALID; -+ pmlmeext->sitesurvey_res.rx_ampdu_size = RX_AMPDU_SIZE_INVALID; -+#ifdef CONFIG_SCAN_BACKOP -+ mlmeext_assign_scan_backop_flags_sta(pmlmeext, /*SS_BACKOP_EN|*/SS_BACKOP_PS_ANNC | SS_BACKOP_TX_RESUME); -+ #ifdef CONFIG_AP_MODE -+ #ifdef CONFIG_CUSTOMER_EZVIZ_CHIME2 -+ mlmeext_assign_scan_backop_flags_ap(pmlmeext, SS_BACKOP_EN | SS_BACKOP_PS_ANNC | SS_BACKOP_TX_RESUME | SS_BACKOP_EN_NL); -+ #else -+ mlmeext_assign_scan_backop_flags_ap(pmlmeext, SS_BACKOP_EN | SS_BACKOP_PS_ANNC | SS_BACKOP_TX_RESUME); -+ #endif -+ #endif -+ #ifdef CONFIG_RTW_MESH -+ mlmeext_assign_scan_backop_flags_mesh(pmlmeext, /*SS_BACKOP_EN | */SS_BACKOP_PS_ANNC | SS_BACKOP_TX_RESUME); -+ #endif -+ pmlmeext->sitesurvey_res.scan_cnt = 0; -+ pmlmeext->sitesurvey_res.scan_cnt_max = RTW_SCAN_NUM_OF_CH; -+ pmlmeext->sitesurvey_res.backop_ms = RTW_BACK_OP_CH_MS; -+#endif -+#if defined(CONFIG_ANTENNA_DIVERSITY) || defined(DBG_SCAN_SW_ANTDIV_BL) -+ pmlmeext->sitesurvey_res.is_sw_antdiv_bl_scan = 0; -+#endif -+ pmlmeext->scan_abort = _FALSE; -+ -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ pmlmeinfo->reauth_count = 0; -+ pmlmeinfo->reassoc_count = 0; -+ pmlmeinfo->link_count = 0; -+ pmlmeinfo->auth_seq = 0; -+ pmlmeinfo->auth_algo = dot11AuthAlgrthm_Open; -+ pmlmeinfo->key_index = 0; -+ pmlmeinfo->iv = 0; -+ -+ pmlmeinfo->enc_algo = _NO_PRIVACY_; -+ pmlmeinfo->authModeToggle = 0; -+ -+ _rtw_memset(pmlmeinfo->chg_txt, 0, 128); -+ -+ pmlmeinfo->slotTime = SHORT_SLOT_TIME; -+ pmlmeinfo->preamble_mode = PREAMBLE_AUTO; -+ -+ pmlmeinfo->dialogToken = 0; -+ -+ pmlmeext->action_public_rxseq = 0xffff; -+ pmlmeext->action_public_dialog_token = 0xff; -+#ifdef ROKU_PRIVATE -+/*infra mode, used to store AP's info*/ -+ _rtw_memset(pmlmeinfo->SupportedRates_infra_ap, 0, NDIS_802_11_LENGTH_RATES_EX); -+ pmlmeinfo->ht_vht_received = 0; -+#endif /* ROKU_PRIVATE */ -+} -+ -+void init_mlme_ext_timer(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ rtw_init_timer(&pmlmeext->survey_timer, padapter, survey_timer_hdl, padapter); -+ rtw_init_timer(&pmlmeext->link_timer, padapter, link_timer_hdl, padapter); -+#ifdef CONFIG_RTW_80211R -+ rtw_init_timer(&pmlmeext->ft_link_timer, padapter, rtw_ft_link_timer_hdl, padapter); -+ rtw_init_timer(&pmlmeext->ft_roam_timer, padapter, rtw_ft_roam_timer_hdl, padapter); -+#endif -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ rtw_init_timer(&pmlmeext->rson_scan_timer, padapter, rson_timer_hdl, padapter); -+#endif -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ rtw_init_timer(&pmlmeext->tbtx_xmit_timer, padapter, rtw_tbtx_xmit_timer_hdl, padapter); -+ rtw_init_timer(&pmlmeext->tbtx_token_dispatch_timer, padapter, rtw_tbtx_token_dispatch_timer_hdl, padapter); -+#endif -+#ifdef CONFIG_DFS -+ rtw_init_timer(&pmlmeext->csa_timer, padapter->pnetdev, csa_timer_hdl, padapter); -+#endif -+} -+ -+int init_mlme_ext_priv(_adapter *padapter) -+{ -+ int res = _SUCCESS; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ /* We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). */ -+ /* _rtw_memset((u8 *)pmlmeext, 0, sizeof(struct mlme_ext_priv)); */ -+ -+ pmlmeext->padapter = padapter; -+ -+ /* fill_fwpriv(padapter, &(pmlmeext->fwpriv)); */ -+ -+ init_mlme_ext_priv_value(padapter); -+ pmlmeinfo->bAcceptAddbaReq = pregistrypriv->bAcceptAddbaReq; -+ -+ init_mlme_ext_timer(padapter); -+ -+#ifdef CONFIG_AP_MODE -+ init_mlme_ap_info(padapter); -+#endif -+ -+ pmlmeext->last_scan_time = 0; -+ pmlmeext->mlmeext_init = _TRUE; -+ -+ -+#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ pmlmeext->active_keep_alive_check = _TRUE; -+#else -+ pmlmeext->active_keep_alive_check = _FALSE; -+#endif -+ -+#ifdef DBG_FIXED_CHAN -+ pmlmeext->fixed_chan = 0xFF; -+#endif -+ -+ pmlmeext->tsf_update_pause_factor = pregistrypriv->tsf_update_pause_factor; -+ pmlmeext->tsf_update_restore_factor = pregistrypriv->tsf_update_restore_factor; -+ -+#ifdef CONFIG_SUPPORT_STATIC_SMPS -+ pmlmeext->ssmps_en = _FALSE; -+ pmlmeext->ssmps_tx_tp_th = SSMPS_TX_TP_TH;/*Mbps*/ -+ pmlmeext->ssmps_rx_tp_th = SSMPS_RX_TP_TH;/*Mbps*/ -+ #ifdef DBG_STATIC_SMPS -+ pmlmeext->ssmps_test = _FALSE; -+ #endif -+#endif -+ -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+ pmlmeext->txss_ctrl_en = _TRUE; -+ pmlmeext->txss_tp_th = TXSS_TP_TH; -+ pmlmeext->txss_tp_chk_cnt = TXSS_TP_CHK_CNT; -+#endif -+ -+ return res; -+ -+} -+ -+void free_mlme_ext_priv(struct mlme_ext_priv *pmlmeext) -+{ -+ _adapter *padapter = pmlmeext->padapter; -+ -+ if (!padapter) -+ return; -+ -+ if (rtw_is_drv_stopped(padapter)) { -+ _cancel_timer_ex(&pmlmeext->survey_timer); -+ _cancel_timer_ex(&pmlmeext->link_timer); -+#ifdef CONFIG_DFS -+ _cancel_timer_ex(&pmlmeext->csa_timer); -+#endif /* CONFIG_DFS */ -+ } -+} -+ -+#ifdef CONFIG_PATCH_JOIN_WRONG_CHANNEL -+static u8 cmp_pkt_chnl_diff(_adapter *padapter, u8 *pframe, uint packet_len) -+{ -+ /* if the channel is same, return 0. else return channel differential */ -+ uint len; -+ u8 channel; -+ u8 *p; -+ -+ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_, _DSSET_IE_, &len, packet_len - _BEACON_IE_OFFSET_); -+ if (p) { -+ channel = *(p + 2); -+ if (padapter->mlmeextpriv.cur_channel >= channel) -+ return padapter->mlmeextpriv.cur_channel - channel; -+ else -+ return channel - padapter->mlmeextpriv.cur_channel; -+ } else -+ return 0; -+} -+#endif /* CONFIG_PATCH_JOIN_WRONG_CHANNEL */ -+ -+static void _mgt_dispatcher(_adapter *padapter, struct mlme_handler *ptable, union recv_frame *precv_frame) -+{ -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ -+ if (ptable->func) { -+ /* receive the frames that ra(a1) is my address or ra(a1) is bc address. */ -+ if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_mac_addr(padapter), ETH_ALEN) && -+ !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ { -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) != _TRUE) -+ return; -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ return; -+ -+ if ( pwdev_priv->pno_mac_addr[0] == 0xFF) -+ return; -+ -+ if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_pno_mac_addr(padapter), ETH_ALEN)) -+ return; -+ } -+#else -+ return; -+#endif -+ -+ ptable->func(padapter, precv_frame); -+ } -+ -+} -+ -+void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ int index; -+ struct mlme_handler *ptable; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, get_addr2_ptr(pframe)); -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ -+ -+#if 0 -+ { -+ u8 *pbuf; -+ pbuf = GetAddr1Ptr(pframe); -+ RTW_INFO("A1-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf + 1), *(pbuf + 2), *(pbuf + 3), *(pbuf + 4), *(pbuf + 5)); -+ pbuf = get_addr2_ptr(pframe); -+ RTW_INFO("A2-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf + 1), *(pbuf + 2), *(pbuf + 3), *(pbuf + 4), *(pbuf + 5)); -+ pbuf = GetAddr3Ptr(pframe); -+ RTW_INFO("A3-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf + 1), *(pbuf + 2), *(pbuf + 3), *(pbuf + 4), *(pbuf + 5)); -+ } -+#endif -+ -+ if (GetFrameType(pframe) != WIFI_MGT_TYPE) { -+ return; -+ } -+ -+ /* receive the frames that ra(a1) is my address or ra(a1) is bc address. */ -+ if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_mac_addr(padapter), ETH_ALEN) && -+ !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ { -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) != _TRUE) -+ return; -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ return; -+ -+ if ( pwdev_priv->pno_mac_addr[0] == 0xFF) -+ return; -+ -+ if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_pno_mac_addr(padapter), ETH_ALEN)) -+ return; -+ } -+#else -+ return; -+#endif -+ -+ ptable = mlme_sta_tbl; -+ -+ index = get_frame_sub_type(pframe) >> 4; -+ -+#ifdef CONFIG_TDLS -+ if ((index << 4) == WIFI_ACTION) { -+ /* category==public (4), action==TDLS_DISCOVERY_RESPONSE */ -+ if (*(pframe + 24) == RTW_WLAN_CATEGORY_PUBLIC && *(pframe + 25) == TDLS_DISCOVERY_RESPONSE) { -+ RTW_INFO("[TDLS] Recv %s from "MAC_FMT"\n", rtw_tdls_action_txt(TDLS_DISCOVERY_RESPONSE), MAC_ARG(get_addr2_ptr(pframe))); -+ On_TDLS_Dis_Rsp(padapter, precv_frame); -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ -+ if (index >= (sizeof(mlme_sta_tbl) / sizeof(struct mlme_handler))) { -+ return; -+ } -+ ptable += index; -+ -+#if 1 -+ if (psta != NULL) { -+ if (GetRetry(pframe)) { -+ if (precv_frame->u.hdr.attrib.seq_num == psta->RxMgmtFrameSeqNum) { -+ /* drop the duplicate management frame */ -+ precvpriv->dbg_rx_dup_mgt_frame_drop_count++; -+ RTW_INFO("Drop duplicate management frame with seq_num = %d.\n", precv_frame->u.hdr.attrib.seq_num); -+ return; -+ } -+ } -+ psta->RxMgmtFrameSeqNum = precv_frame->u.hdr.attrib.seq_num; -+ } -+#else -+ -+ if (GetRetry(pframe)) { -+ /* return; */ -+ } -+#endif -+ -+#ifdef CONFIG_AP_MODE -+ switch (get_frame_sub_type(pframe)) { -+ case WIFI_AUTH: -+ if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) -+ ptable->func = &OnAuth; -+ else -+ ptable->func = &OnAuthClient; -+ /* fall through */ -+ case WIFI_ASSOCREQ: -+ case WIFI_REASSOCREQ: -+ _mgt_dispatcher(padapter, ptable, precv_frame); -+ #ifdef CONFIG_HOSTAPD_MLME -+ if (MLME_IS_AP(padapter)) -+ rtw_hostapd_mlme_rx(padapter, precv_frame); -+ #endif -+ break; -+ case WIFI_PROBEREQ: -+ _mgt_dispatcher(padapter, ptable, precv_frame); -+ #ifdef CONFIG_HOSTAPD_MLME -+ if (MLME_IS_AP(padapter)) -+ rtw_hostapd_mlme_rx(padapter, precv_frame); -+ #endif -+ break; -+ case WIFI_BEACON: -+ _mgt_dispatcher(padapter, ptable, precv_frame); -+ break; -+ case WIFI_ACTION: -+ _mgt_dispatcher(padapter, ptable, precv_frame); -+ break; -+ default: -+ _mgt_dispatcher(padapter, ptable, precv_frame); -+ #ifdef CONFIG_HOSTAPD_MLME -+ if (MLME_IS_AP(padapter)) -+ rtw_hostapd_mlme_rx(padapter, precv_frame); -+ #endif -+ break; -+ } -+#else -+ -+ _mgt_dispatcher(padapter, ptable, precv_frame); -+ -+#endif -+ -+} -+ -+#ifdef CONFIG_P2P -+u32 p2p_listen_state_process(_adapter *padapter, unsigned char *da) -+{ -+ bool response = _TRUE; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) { -+ if (rtw_cfg80211_get_is_roch(padapter) == _FALSE -+ || rtw_get_oper_ch(padapter) != padapter->wdinfo.listen_channel -+ || adapter_wdev_data(padapter)->p2p_enabled == _FALSE -+ || padapter->mlmepriv.wps_probe_resp_ie == NULL -+ || padapter->mlmepriv.p2p_probe_resp_ie == NULL -+ ) { -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO(ADPT_FMT" DON'T issue_probersp_p2p: p2p_enabled:%d, wps_probe_resp_ie:%p, p2p_probe_resp_ie:%p\n" -+ , ADPT_ARG(padapter) -+ , adapter_wdev_data(padapter)->p2p_enabled -+ , padapter->mlmepriv.wps_probe_resp_ie -+ , padapter->mlmepriv.p2p_probe_resp_ie); -+ RTW_INFO(ADPT_FMT" DON'T issue_probersp_p2p: is_ro_ch:%d, op_ch:%d, p2p_listen_channel:%d\n" -+ , ADPT_ARG(padapter) -+ , rtw_cfg80211_get_is_roch(padapter) -+ , rtw_get_oper_ch(padapter) -+ , padapter->wdinfo.listen_channel); -+#endif -+ response = _FALSE; -+ } -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ if (padapter->wdinfo.driver_interface == DRIVER_WEXT) { -+ /* do nothing if the device name is empty */ -+ if (!padapter->wdinfo.device_name_len) -+ response = _FALSE; -+ } -+ -+ if (response == _TRUE) -+ issue_probersp_p2p(padapter, da); -+ -+ return _SUCCESS; -+} -+#endif /* CONFIG_P2P */ -+ -+ -+/**************************************************************************** -+ -+Following are the callback functions for each subtype of the management frames -+ -+*****************************************************************************/ -+ -+unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ unsigned int ielen; -+ unsigned char *p; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur = &(pmlmeinfo->network); -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint len = precv_frame->u.hdr.len; -+ u8 is_valid_p2p_probereq = _FALSE; -+ -+#ifdef CONFIG_ATMEL_RC_PATCH -+ u8 *target_ie = NULL, *wps_ie = NULL; -+ u8 *start; -+ uint search_len = 0, wps_ielen = 0, target_ielen = 0; -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+#endif -+ -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ u8 wifi_test_chk_rate = 1; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if ((pwdinfo->driver_interface == DRIVER_CFG80211) -+ && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) -+ && (GET_CFG80211_REPORT_MGMT(adapter_wdev_data(padapter), IEEE80211_STYPE_PROBE_REQ) == _TRUE) -+ ) { -+ rtw_cfg80211_rx_probe_request(padapter, precv_frame); -+ return _SUCCESS; -+ } -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && -+ !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE) && -+ !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && -+ !rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) && -+ !rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) -+ ) { -+ /* Commented by Albert 2011/03/17 */ -+ /* mcs_rate = 0->CCK 1M rate */ -+ /* mcs_rate = 1->CCK 2M rate */ -+ /* mcs_rate = 2->CCK 5.5M rate */ -+ /* mcs_rate = 3->CCK 11M rate */ -+ /* In the P2P mode, the driver should not support the CCK rate */ -+ -+ /* Commented by Kurt 2012/10/16 */ -+ /* IOT issue: Google Nexus7 use 1M rate to send p2p_probe_req after GO nego completed and Nexus7 is client */ -+ if (padapter->registrypriv.wifi_spec == 1) { -+ if (pattrib->data_rate <= DESC_RATE11M) -+ wifi_test_chk_rate = 0; -+ } -+ -+ if (wifi_test_chk_rate == 1) { -+ is_valid_p2p_probereq = process_probe_req_p2p_ie(pwdinfo, pframe, len); -+ if (is_valid_p2p_probereq == _TRUE) { -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) { -+ /* FIXME */ -+ if (padapter->wdinfo.driver_interface == DRIVER_WEXT) -+ report_survey_event(padapter, precv_frame); -+ -+ p2p_listen_state_process(padapter, get_sa(pframe)); -+ -+ return _SUCCESS; -+ } -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) -+ goto _continue; -+ } -+ } -+ } -+ -+_continue: -+#endif /* CONFIG_P2P */ -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) -+ return _SUCCESS; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE && -+ check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_AP_STATE | WIFI_MESH_STATE) == _FALSE) -+ return _SUCCESS; -+ -+ -+ /* RTW_INFO("+OnProbeReq\n"); */ -+ -+ -+#ifdef CONFIG_ATMEL_RC_PATCH -+ wps_ie = rtw_get_wps_ie( -+ pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, -+ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_, -+ NULL, &wps_ielen); -+ if (wps_ie) -+ target_ie = rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_MANUFACTURER, NULL, &target_ielen); -+ if ((target_ie && (target_ielen == 4)) && (_TRUE == _rtw_memcmp((void *)target_ie, "Ozmo", 4))) { -+ /* psta->flag_atmel_rc = 1; */ -+ unsigned char *sa_addr = get_sa(pframe); -+ printk("%s: Find Ozmo RC -- %02x:%02x:%02x:%02x:%02x:%02x \n\n", -+ __func__, *sa_addr, *(sa_addr + 1), *(sa_addr + 2), *(sa_addr + 3), *(sa_addr + 4), *(sa_addr + 5)); -+ _rtw_memcpy(pstapriv->atmel_rc_pattern, get_sa(pframe), ETH_ALEN); -+ } -+#endif -+ -+ -+#ifdef CONFIG_AUTO_AP_MODE -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE && -+ pmlmepriv->cur_network.join_res == _TRUE) { -+ _irqL irqL; -+ struct sta_info *psta; -+ u8 *mac_addr, *peer_addr; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 RC_OUI[4] = {0x00, 0xE0, 0x4C, 0x0A}; -+ /* EID[1] + EID_LEN[1] + RC_OUI[4] + MAC[6] + PairingID[2] + ChannelNum[2] */ -+ -+ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, (int *)&ielen, -+ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); -+ -+ if (!p || ielen != 14) -+ goto _non_rc_device; -+ -+ if (!_rtw_memcmp(p + 2, RC_OUI, sizeof(RC_OUI))) -+ goto _non_rc_device; -+ -+ if (!_rtw_memcmp(p + 6, get_sa(pframe), ETH_ALEN)) { -+ RTW_INFO("%s, do rc pairing ("MAC_FMT"), but mac addr mismatch!("MAC_FMT")\n", __FUNCTION__, -+ MAC_ARG(get_sa(pframe)), MAC_ARG(p + 6)); -+ -+ goto _non_rc_device; -+ } -+ -+ RTW_INFO("%s, got the pairing device("MAC_FMT")\n", __FUNCTION__, MAC_ARG(get_sa(pframe))); -+ -+ /* new a station */ -+ psta = rtw_get_stainfo(pstapriv, get_sa(pframe)); -+ if (psta == NULL) { -+ /* allocate a new one */ -+ RTW_INFO("going to alloc stainfo for rc="MAC_FMT"\n", MAC_ARG(get_sa(pframe))); -+ psta = rtw_alloc_stainfo(pstapriv, get_sa(pframe)); -+ if (psta == NULL) { -+ /* TODO: */ -+ RTW_INFO(" Exceed the upper limit of supported clients...\n"); -+ return _SUCCESS; -+ } -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&psta->asoc_list)) { -+ psta->expire_to = pstapriv->expire_to; -+ rtw_list_insert_tail(&psta->asoc_list, &pstapriv->asoc_list); -+ pstapriv->asoc_list_cnt++; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (psta->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt++; -+ #endif -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ /* generate pairing ID */ -+ mac_addr = adapter_mac_addr(padapter); -+ peer_addr = psta->cmn.mac_addr; -+ psta->pid = (u16)(((mac_addr[4] << 8) + mac_addr[5]) + ((peer_addr[4] << 8) + peer_addr[5])); -+ -+ /* update peer stainfo */ -+ psta->isrc = _TRUE; -+ -+ /* AID assignment */ -+ if (psta->cmn.aid > 0) -+ RTW_INFO(FUNC_ADPT_FMT" old AID=%d\n", FUNC_ADPT_ARG(padapter), psta->cmn.aid); -+ else { -+ if (!rtw_aid_alloc(padapter, psta)) { -+ RTW_INFO(FUNC_ADPT_FMT" no room for more AIDs\n", FUNC_ADPT_ARG(padapter)); -+ return _SUCCESS; -+ } -+ RTW_INFO(FUNC_ADPT_FMT" allocate new AID=%d\n", FUNC_ADPT_ARG(padapter), psta->cmn.aid); -+ } -+ -+ psta->qos_option = 1; -+ psta->cmn.bw_mode = CHANNEL_WIDTH_20; -+ psta->ieee8021x_blocked = _FALSE; -+#ifdef CONFIG_80211N_HT -+ if(padapter->registrypriv.ht_enable && -+ is_supported_ht(padapter->registrypriv.wireless_mode)) { -+ psta->htpriv.ht_option = _TRUE; -+ psta->htpriv.ampdu_enable = _FALSE; -+ psta->htpriv.sgi_20m = _FALSE; -+ psta->htpriv.sgi_40m = _FALSE; -+ psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ psta->htpriv.agg_enable_bitmap = 0x0;/* reset */ -+ psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */ -+ } -+#endif -+ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); -+ -+ _rtw_memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); -+ -+ _enter_critical_bh(&psta->lock, &irqL); -+ psta->state |= WIFI_ASOC_STATE; -+ _exit_critical_bh(&psta->lock, &irqL); -+ -+ report_add_sta_event(padapter, psta->cmn.mac_addr); -+ -+ } -+ -+ issue_probersp(padapter, get_sa(pframe), _FALSE); -+ -+ return _SUCCESS; -+ -+ } -+ -+_non_rc_device: -+ -+ return _SUCCESS; -+ -+#endif /* CONFIG_AUTO_AP_MODE */ -+ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) && -+ rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_LINKING | WIFI_UNDER_SURVEY)) { -+ /* don't process probe req */ -+ return _SUCCESS; -+ } -+#endif -+ -+ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ielen, -+ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); -+ -+ -+ /* check (wildcard) SSID */ -+ if (p != NULL) { -+ if (is_valid_p2p_probereq == _TRUE) -+ goto _issue_probersp; -+ -+ if ((ielen != 0 && _FALSE == _rtw_memcmp((void *)(p + 2), (void *)cur->Ssid.Ssid, cur->Ssid.SsidLength)) -+ || (ielen == 0 && pmlmeinfo->hidden_ssid_mode)) -+ goto exit; -+ -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, WLAN_EID_MESH_ID, (int *)&ielen, -+ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); -+ -+ if (!p) -+ goto exit; -+ if (ielen != 0 && _rtw_memcmp((void *)(p + 2), (void *)cur->mesh_id.Ssid, cur->mesh_id.SsidLength) == _FALSE) -+ goto exit; -+ } -+ #endif -+ -+_issue_probersp: -+ if (((check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE && -+ pmlmepriv->cur_network.join_res == _TRUE)) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { -+ /* RTW_INFO("+issue_probersp during ap mode\n"); */ -+ issue_probersp(padapter, get_sa(pframe), is_valid_p2p_probereq); -+ } -+ -+ } -+ -+exit: -+ return _SUCCESS; -+ -+} -+ -+unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif -+ -+ -+#ifdef CONFIG_P2P -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) { -+ if (_TRUE == pwdinfo->tx_prov_disc_info.benable) { -+ if (_rtw_memcmp(pwdinfo->tx_prov_disc_info.peerIFAddr, get_addr2_ptr(pframe), ETH_ALEN)) { -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) { -+ pwdinfo->tx_prov_disc_info.benable = _FALSE; -+ issue_p2p_provision_request(padapter, -+ pwdinfo->tx_prov_disc_info.ssid.Ssid, -+ pwdinfo->tx_prov_disc_info.ssid.SsidLength, -+ pwdinfo->tx_prov_disc_info.peerDevAddr); -+ } else if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ pwdinfo->tx_prov_disc_info.benable = _FALSE; -+ issue_p2p_provision_request(padapter, -+ NULL, -+ 0, -+ pwdinfo->tx_prov_disc_info.peerDevAddr); -+ } -+ } -+ } -+ return _SUCCESS; -+ } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) { -+ if (_TRUE == pwdinfo->nego_req_info.benable) { -+ RTW_INFO("[%s] P2P State is GONEGO ING!\n", __FUNCTION__); -+ if (_rtw_memcmp(pwdinfo->nego_req_info.peerDevAddr, get_addr2_ptr(pframe), ETH_ALEN)) { -+ pwdinfo->nego_req_info.benable = _FALSE; -+ issue_p2p_GO_request(padapter, pwdinfo->nego_req_info.peerDevAddr); -+ } -+ } -+ } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ)) { -+ if (_TRUE == pwdinfo->invitereq_info.benable) { -+ RTW_INFO("[%s] P2P_STATE_TX_INVITE_REQ!\n", __FUNCTION__); -+ if (_rtw_memcmp(pwdinfo->invitereq_info.peer_macaddr, get_addr2_ptr(pframe), ETH_ALEN)) { -+ pwdinfo->invitereq_info.benable = _FALSE; -+ issue_p2p_invitation_request(padapter, pwdinfo->invitereq_info.peer_macaddr); -+ } -+ } -+ } -+#endif -+ -+ -+ if ((mlmeext_chk_scan_state(pmlmeext, SCAN_PROCESS)) -+ || (MLME_IS_MESH(padapter) && check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) -+ #ifdef CONFIG_RTW_REPEATER_SON -+ || (padapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) -+ #endif -+ ) { -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN) -+ && (pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE && (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) -+ ) { -+ if (!rtw_check_bcn_info(padapter, pframe, precv_frame->u.hdr.len)) { -+ RTW_PRINT(FUNC_ADPT_FMT" ap has changed, disconnect now\n", FUNC_ADPT_ARG(padapter)); -+ receive_disconnect(padapter, pmlmeinfo->network.MacAddress , 0, _FALSE); -+ } -+ } -+ -+ rtw_mi_report_survey_event(padapter, precv_frame); -+ return _SUCCESS; -+ } -+ -+#if 0 /* move to validate_recv_mgnt_frame */ -+ if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)) { -+ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) { -+ psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (psta != NULL) -+ psta->sta_stats.rx_mgnt_pkts++; -+ } -+ } -+#endif -+ -+ return _SUCCESS; -+ -+} -+ -+/* for 11n Logo 4.2.31/4.2.32 */ -+#ifdef CONFIG_AP_MODE -+static void rtw_check_legacy_ap(_adapter *padapter, u8 *pframe, u32 len) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ if (!padapter->registrypriv.wifi_spec) -+ return; -+ -+ if(!MLME_IS_AP(padapter)) -+ return; -+ -+ if (pmlmeext->bstart_bss == _TRUE) { -+ int left; -+ unsigned char *pos; -+ struct rtw_ieee802_11_elems elems; -+#ifdef CONFIG_80211N_HT -+ u16 cur_op_mode; -+#endif -+ /* checking IEs */ -+ left = len - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_; -+ pos = pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_; -+ if (rtw_ieee802_11_parse_elems(pos, left, &elems, 1) == ParseFailed) { -+ RTW_INFO("%s: parse fail for "MAC_FMT"\n", __func__, MAC_ARG(GetAddr3Ptr(pframe))); -+ return; -+ } -+#ifdef CONFIG_80211N_HT -+ cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; -+#endif -+ /* for legacy ap */ -+ if (elems.ht_capabilities == NULL && elems.ht_capabilities_len == 0) { -+ -+ if (0) -+ RTW_INFO("%s: "MAC_FMT" is legacy ap\n", __func__, MAC_ARG(GetAddr3Ptr(pframe))); -+ -+ ATOMIC_SET(&pmlmepriv->olbc, _TRUE); -+ ATOMIC_SET(&pmlmepriv->olbc_ht, _TRUE); -+ } -+ } -+} -+#endif /* CONFIG_AP_MODE */ -+ -+unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct sta_info *psta; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint len = precv_frame->u.hdr.len; -+ WLAN_BSSID_EX *pbss; -+ int ret = _SUCCESS; -+#ifdef CONFIG_TDLS -+ struct sta_info *ptdls_sta; -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+#ifdef CONFIG_TDLS_CH_SW -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+#endif -+#endif /* CONFIG_TDLS */ -+ -+ if (validate_beacon_len(pframe, len) == _FALSE) -+ return _SUCCESS; -+ -+ if (mlmeext_chk_scan_state(pmlmeext, SCAN_PROCESS) -+ || (MLME_IS_MESH(padapter) && check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) -+ ) { -+ if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN) -+ && (pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE && (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) -+ ) { -+ if (!rtw_check_bcn_info(padapter, pframe, len)) { -+ RTW_PRINT(FUNC_ADPT_FMT" ap has changed, disconnect now\n", FUNC_ADPT_ARG(padapter)); -+ receive_disconnect(padapter, pmlmeinfo->network.MacAddress , 0, _FALSE); -+ } -+ } -+ -+ rtw_mi_report_survey_event(padapter, precv_frame); -+ return _SUCCESS; -+ } -+#ifdef CONFIG_RTW_REPEATER_SON -+ if (padapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) -+ rtw_mi_report_survey_event(padapter, precv_frame); -+#endif -+ -+#ifdef CONFIG_AP_MODE -+ rtw_check_legacy_ap(padapter, pframe, len); -+#endif -+ -+ if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)) { -+ if ((pmlmeinfo->state & WIFI_FW_AUTH_NULL) -+ && (rtw_sta_linking_test_wait_done() || pmlmeext->join_abort) -+ ) { -+ if (rtw_sta_linking_test_force_fail() || pmlmeext->join_abort) { -+ set_link_timer(pmlmeext, 1); -+ return _SUCCESS; -+ } -+ -+ /* we should update current network before auth, or some IE is wrong */ -+ pbss = (WLAN_BSSID_EX *)rtw_malloc(sizeof(WLAN_BSSID_EX)); -+ if (pbss) { -+ if (collect_bss_info(padapter, precv_frame, pbss) == _SUCCESS) { -+ struct beacon_keys recv_beacon; -+ -+ update_network(&(pmlmepriv->cur_network.network), pbss, padapter, _TRUE); -+ -+ /* update bcn keys */ -+ if (rtw_get_bcn_keys(padapter, pframe, len, &recv_beacon) == _TRUE) { -+ RTW_INFO("%s: beacon keys ready\n", __func__); -+ _rtw_memcpy(&pmlmepriv->cur_beacon_keys, -+ &recv_beacon, sizeof(recv_beacon)); -+ if (is_hidden_ssid(recv_beacon.ssid, recv_beacon.ssid_len)) { -+ _rtw_memcpy(pmlmepriv->cur_beacon_keys.ssid, pmlmeinfo->network.Ssid.Ssid, IW_ESSID_MAX_SIZE); -+ pmlmepriv->cur_beacon_keys.ssid_len = pmlmeinfo->network.Ssid.SsidLength; -+ } -+ } else { -+ RTW_ERR("%s: get beacon keys failed\n", __func__); -+ _rtw_memset(&pmlmepriv->cur_beacon_keys, 0, sizeof(recv_beacon)); -+ } -+ #ifdef CONFIG_BCN_CNT_CONFIRM_HDL -+ pmlmepriv->new_beacon_cnts = 0; -+ #endif -+ } -+ rtw_mfree((u8 *)pbss, sizeof(WLAN_BSSID_EX)); -+ } -+ -+ /* check the vendor of the assoc AP */ -+ pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pframe + sizeof(struct rtw_ieee80211_hdr_3addr), len - sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+ /* update TSF Value */ -+ update_TSF(pmlmeext, pframe, len); -+ pmlmeext->bcn_cnt = 0; -+ pmlmeext->last_bcn_cnt = 0; -+ -+#ifdef CONFIG_P2P_PS -+ /* Comment by YiWei , in wifi p2p spec the "3.3 P2P Power Management" , "These mechanisms are available in a P2P Group in which only P2P Devices are associated." */ -+ /* process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); */ -+#endif /* CONFIG_P2P_PS */ -+ -+#if defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE) -+ if (padapter->registrypriv.wifi_spec) { -+ if (process_p2p_cross_connect_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)) == _FALSE) { -+ if (rtw_mi_buddy_check_mlmeinfo_state(padapter, WIFI_FW_AP_STATE)) { -+ RTW_PRINT("no issue auth, P2P cross-connect does not permit\n "); -+ return _SUCCESS; -+ } -+ } -+ } -+#endif /* CONFIG_P2P CONFIG_P2P and CONFIG_CONCURRENT_MODE */ -+ -+ /* start auth */ -+ start_clnt_auth(padapter); -+ -+ return _SUCCESS; -+ } -+ -+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) && (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { -+ psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (psta != NULL) { -+#ifdef CONFIG_PATCH_JOIN_WRONG_CHANNEL -+ /* Merge from 8712 FW code */ -+ if (cmp_pkt_chnl_diff(padapter, pframe, len) != 0) { -+ /* join wrong channel, deauth and reconnect */ -+ issue_deauth(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_DEAUTH_LEAVING); -+ -+ report_del_sta_event(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_JOIN_WRONG_CHANNEL, _TRUE, _FALSE); -+ pmlmeinfo->state &= (~WIFI_FW_ASSOC_SUCCESS); -+ return _SUCCESS; -+ } -+#endif /* CONFIG_PATCH_JOIN_WRONG_CHANNEL */ -+#ifdef CONFIG_RTW_80211R -+ rtw_ft_update_bcn(padapter, precv_frame); -+#endif -+ ret = rtw_check_bcn_info(padapter, pframe, len); -+ if (!ret) { -+ RTW_PRINT(FUNC_ADPT_FMT" ap has changed, disconnect now\n", FUNC_ADPT_ARG(padapter)); -+ receive_disconnect(padapter, pmlmeinfo->network.MacAddress , 0, _FALSE); -+ return _SUCCESS; -+ } -+ /* update WMM, ERP in the beacon */ -+ /* todo: the timer is used instead of the number of the beacon received */ -+ if ((sta_rx_pkts(psta) & 0xf) == 0) { -+ /* RTW_INFO("update_bcn_info\n"); */ -+ update_beacon_info(padapter, pframe, len, psta); -+ } -+ -+ pmlmepriv->cur_network_scanned->network.Rssi = precv_frame->u.hdr.attrib.phy_info.recv_signal_power; -+ pmlmeext->bcn_cnt++; -+#ifdef CONFIG_BCN_RECV_TIME -+ rtw_rx_bcn_time_update(padapter, len, precv_frame->u.hdr.attrib.data_rate); -+#endif -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_CH_SW -+ if (rtw_tdls_is_chsw_allowed(padapter) == _TRUE) { -+ /* Send TDLS Channel Switch Request when receiving Beacon */ -+ if ((padapter->tdlsinfo.chsw_info.ch_sw_state & TDLS_CH_SW_INITIATOR_STATE) && (ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) -+ && (pmlmeext->cur_channel == rtw_get_oper_ch(padapter))) { -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, padapter->tdlsinfo.chsw_info.addr); -+ if (ptdls_sta != NULL) { -+ if (ptdls_sta->tdls_sta_state | TDLS_LINKED_STATE) -+ _set_timer(&ptdls_sta->stay_on_base_chnl_timer, TDLS_CH_SW_STAY_ON_BASE_CHNL_TIMEOUT); -+ } -+ } -+ } -+#endif -+#endif /* CONFIG_TDLS */ -+ -+ #if CONFIG_DFS -+ process_csa_ie(padapter -+ , pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_ -+ , len - (WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_)); -+ #endif -+ -+#ifdef CONFIG_P2P_PS -+ process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); -+#endif /* CONFIG_P2P_PS */ -+ -+ if (pmlmeext->tsf_update_required && pmlmeext->en_hw_update_tsf) -+ rtw_enable_hw_update_tsf_cmd(padapter); -+ -+#if 0 /* move to validate_recv_mgnt_frame */ -+ psta->sta_stats.rx_mgnt_pkts++; -+#endif -+ } -+ -+ } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { -+ u8 rate_set[16]; -+ u8 rate_num = 0; -+ -+ psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (psta != NULL) { -+ /* -+ * update WMM, ERP in the beacon -+ * todo: the timer is used instead of the number of the beacon received -+ */ -+ if ((sta_rx_pkts(psta) & 0xf) == 0) -+ update_beacon_info(padapter, pframe, len, psta); -+ -+ if (pmlmeext->tsf_update_required && pmlmeext->en_hw_update_tsf) -+ rtw_enable_hw_update_tsf_cmd(padapter); -+ } else { -+ rtw_ies_get_supported_rate(pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_, len - WLAN_HDR_A3_LEN - _BEACON_IE_OFFSET_, rate_set, &rate_num); -+ if (rate_num == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" RX beacon with no supported rate\n", FUNC_ADPT_ARG(padapter)); -+ goto _END_ONBEACON_; -+ } -+ -+ psta = rtw_alloc_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (psta == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT" Exceed the upper limit of supported clients\n", FUNC_ADPT_ARG(padapter)); -+ goto _END_ONBEACON_; -+ } -+ -+ psta->expire_to = pstapriv->adhoc_expire_to; -+ -+ _rtw_memcpy(psta->bssrateset, rate_set, rate_num); -+ psta->bssratelen = rate_num; -+ -+ /* update TSF Value */ -+ update_TSF(pmlmeext, pframe, len); -+ -+ /* report sta add event */ -+ report_add_sta_event(padapter, get_addr2_ptr(pframe)); -+ } -+ } -+ } -+ -+_END_ONBEACON_: -+ -+ return _SUCCESS; -+ -+} -+ -+#ifdef CONFIG_AP_MODE -+static u32 rtw_get_sta_num_by_state(_adapter *padapter, u32 state) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ u32 index, sta_num = 0; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &(padapter->stapriv); -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (index = 0; index < NUM_STA; index++) { -+ phead = &(pstapriv->sta_hash[index]); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info , hash_list); -+ if ((psta->state & (state))) -+ sta_num++; -+ plist = get_next(plist); -+ } -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ /* RTW_INFO("%s : waiting for %u sta under linking \n", __func__, sta_num); */ -+ return sta_num; -+} -+ -+static u8 rtw_defs_attack_chk(_adapter *padapter) -+{ -+ struct mlme_priv *mlme = &(padapter->mlmepriv); -+ u8 is_reject = _FALSE; -+ u32 sta_limit = 0; -+ u32 stime = rtw_systime_to_ms(rtw_get_current_time()); -+ static u32 ptime = 0; -+ -+ /* RTW_INFO("%s : ptime=%u, stime=%u, diff=%u\n", __func__, ptime, stime, (stime - ptime)); */ -+ if ((ptime > 0) && ((stime - ptime) < mlme->defs_lmt_time)) { -+ sta_limit = rtw_get_sta_num_by_state(padapter, WIFI_FW_LINKING_STATE); -+ if (sta_limit >= mlme->defs_lmt_sta) -+ is_reject = _TRUE; -+ } -+ -+ ptime = stime; -+ /* RTW_INFO("%s : current linking num=%u\n", __func__, sta_limit); */ -+ return is_reject; -+} -+#endif -+ -+unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) -+{ -+#ifdef CONFIG_AP_MODE -+ _irqL irqL; -+ unsigned int auth_mode, seq, ie_len; -+ unsigned char *sa, *p; -+ u16 algorithm; -+ int status; -+ static struct sta_info stat; -+ struct sta_info *pstat = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint len = precv_frame->u.hdr.len; -+ u8 offset = 0; -+ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) && -+ rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_LINKING | WIFI_UNDER_SURVEY)) { -+ /* don't process auth request; */ -+ return _SUCCESS; -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) -+ return _FAIL; -+ -+ if (!MLME_IS_ASOC(padapter)) -+ return _SUCCESS; -+ -+#if defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_RTW_MESH) -+ if (MLME_IS_MESH(padapter)) -+ return rtw_mesh_on_auth(padapter, precv_frame); -+#endif -+ -+ RTW_INFO("+OnAuth\n"); -+ -+ sa = get_addr2_ptr(pframe); -+ -+ auth_mode = psecuritypriv->dot11AuthAlgrthm; -+ -+ if (GetPrivacy(pframe)) { -+ u8 *iv; -+ struct rx_pkt_attrib *prxattrib = &(precv_frame->u.hdr.attrib); -+ -+ prxattrib->hdrlen = WLAN_HDR_A3_LEN; -+ prxattrib->encrypt = _WEP40_; -+ -+ iv = pframe + prxattrib->hdrlen; -+ prxattrib->key_index = ((iv[3] >> 6) & 0x3); -+ -+ prxattrib->iv_len = 4; -+ prxattrib->icv_len = 4; -+ -+ rtw_wep_decrypt(padapter, (u8 *)precv_frame); -+ -+ offset = 4; -+ } -+ -+ algorithm = le16_to_cpu(*(u16 *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset)); -+ seq = le16_to_cpu(*(u16 *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 2)); -+ -+ RTW_INFO("auth alg=%x, seq=%X\n", algorithm, seq); -+ -+ if (rtw_check_invalid_mac_address(sa, _FALSE)){ -+ RTW_INFO("%s : reject invalid AUTH-req "MAC_FMT"\n", -+ __func__, MAC_ARG(get_addr2_ptr(pframe))); -+ return _FAIL; -+ } -+ -+ if(rtw_defs_attack_chk(padapter)) { -+ struct sta_info *_psta; -+ _psta = rtw_get_stainfo(pstapriv, sa); -+ if ((_psta == NULL) || !(_psta->state & WIFI_FW_ASSOC_SUCCESS)) { -+ status = _STATS_REFUSED_TEMPORARILY_; -+ RTW_ERR("%s : refused temporarily for sa "MAC_FMT" !\n", __func__, MAC_ARG(sa)); -+ goto auth_fail; -+ } -+ } -+ -+ if (rtw_ap_linking_test_force_auth_fail()) { -+ status = rtw_ap_linking_test_force_auth_fail(); -+ RTW_INFO(FUNC_ADPT_FMT" force auth fail with status:%u\n" -+ , FUNC_ADPT_ARG(padapter), status); -+ goto auth_fail; -+ } -+ -+ if ((auth_mode == 2) && (algorithm != WLAN_AUTH_SAE) && -+ (psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && -+ (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)) -+ auth_mode = 0; -+ -+ if ((algorithm > 0 && auth_mode == 0) || /* rx a shared-key auth but shared not enabled */ -+ (algorithm == 0 && auth_mode == 1)) { /* rx a open-system auth but shared-key is enabled */ -+ RTW_INFO("auth rejected due to bad alg [alg=%d, auth_mib=%d] %02X%02X%02X%02X%02X%02X\n", -+ algorithm, auth_mode, sa[0], sa[1], sa[2], sa[3], sa[4], sa[5]); -+ -+ status = _STATS_NO_SUPP_ALG_; -+ -+ goto auth_fail; -+ } -+ -+#if CONFIG_RTW_MACADDR_ACL -+ if (rtw_access_ctrl(padapter, sa) == _FALSE) { -+ status = _STATS_UNABLE_HANDLE_STA_; -+ goto auth_fail; -+ } -+#endif -+ -+ pstat = rtw_get_stainfo(pstapriv, sa); -+ if (pstat == NULL) { -+ -+ /* allocate a new one */ -+ RTW_INFO("going to alloc stainfo for sa="MAC_FMT"\n", MAC_ARG(sa)); -+ pstat = rtw_alloc_stainfo(pstapriv, sa); -+ if (pstat == NULL) { -+ RTW_INFO(" Exceed the upper limit of supported clients...\n"); -+ status = _STATS_UNABLE_HANDLE_STA_; -+ goto auth_fail; -+ } -+ -+ pstat->state = WIFI_FW_AUTH_NULL; -+ pstat->auth_seq = 0; -+ -+ /* pstat->flags = 0; */ -+ /* pstat->capability = 0; */ -+ } else { -+#ifdef CONFIG_IEEE80211W -+ if ((pstat->bpairwise_key_installed != _TRUE && (pstat->flags & WLAN_STA_MFP)) -+ || !(pstat->flags & WLAN_STA_MFP)) -+#endif /* CONFIG_IEEE80211W */ -+ { -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&pstat->asoc_list) == _FALSE) { -+ rtw_list_delete(&pstat->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (pstat->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt--; -+ #endif -+ if (pstat->expire_to > 0) -+ ;/* TODO: STA re_auth within expire_to */ -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ if (seq == 1) -+ ; /* TODO: STA re_auth and auth timeout */ -+ -+ } -+ } -+ -+#ifdef CONFIG_IEEE80211W -+ if ((pstat->bpairwise_key_installed != _TRUE && (pstat->flags & WLAN_STA_MFP)) -+ || !(pstat->flags & WLAN_STA_MFP)) -+#endif /* CONFIG_IEEE80211W */ -+ { -+ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); -+ if (rtw_is_list_empty(&pstat->auth_list)) { -+ -+ rtw_list_insert_tail(&pstat->auth_list, &pstapriv->auth_list); -+ pstapriv->auth_list_cnt++; -+ } -+ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); -+ } -+ -+ if (pstat->auth_seq == 0) -+ pstat->expire_to = pstapriv->auth_to; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (GET_CFG80211_REPORT_MGMT(adapter_wdev_data(padapter), IEEE80211_STYPE_AUTH) == _TRUE) { -+ if ((algorithm == WLAN_AUTH_SAE) && -+ (auth_mode == dot11AuthAlgrthm_8021X)) { -+ pstat->authalg = algorithm; -+ -+ rtw_cfg80211_rx_mframe(padapter, precv_frame, NULL); -+ return _SUCCESS; -+ } -+ } -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ if ((pstat->auth_seq + 1) != seq) { -+ RTW_INFO("(1)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", -+ seq, pstat->auth_seq + 1); -+ status = _STATS_OUT_OF_AUTH_SEQ_; -+ goto auth_fail; -+ } -+ -+ if (algorithm == 0 && (auth_mode == 0 || auth_mode == 2 || auth_mode == 3)) { -+ if (seq == 1) { -+#ifdef CONFIG_IEEE80211W -+ if ((pstat->bpairwise_key_installed != _TRUE && (pstat->flags & WLAN_STA_MFP)) -+ || !(pstat->flags & WLAN_STA_MFP)) -+#endif /* CONFIG_IEEE80211W */ -+ { -+ pstat->state &= ~WIFI_FW_AUTH_NULL; -+ pstat->state |= WIFI_FW_AUTH_SUCCESS; -+ pstat->expire_to = pstapriv->assoc_to; -+ } -+ pstat->authalg = algorithm; -+ } else { -+ RTW_INFO("(2)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", -+ seq, pstat->auth_seq + 1); -+ status = _STATS_OUT_OF_AUTH_SEQ_; -+ goto auth_fail; -+ } -+ } else { /* shared system or auto authentication */ -+ if (seq == 1) { -+ /* prepare for the challenging txt... */ -+ -+ /* get_random_bytes((void *)pstat->chg_txt, 128); */ /* TODO: */ -+ _rtw_memset((void *)pstat->chg_txt, 78, 128); -+#ifdef CONFIG_IEEE80211W -+ if ((pstat->bpairwise_key_installed != _TRUE && (pstat->flags & WLAN_STA_MFP)) -+ || !(pstat->flags & WLAN_STA_MFP)) -+#endif /* CONFIG_IEEE80211W */ -+ { -+ pstat->state &= ~WIFI_FW_AUTH_NULL; -+ pstat->state |= WIFI_FW_AUTH_STATE; -+ } -+ pstat->authalg = algorithm; -+ pstat->auth_seq = 2; -+ } else if (seq == 3) { -+ /* checking for challenging txt... */ -+ RTW_INFO("checking for challenging txt...\n"); -+ -+ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + 4 + _AUTH_IE_OFFSET_ , _CHLGETXT_IE_, (int *)&ie_len, -+ len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_ - 4); -+ -+ if ((p == NULL) || (ie_len <= 0)) { -+ RTW_INFO("auth rejected because challenge failure!(1)\n"); -+ status = _STATS_CHALLENGE_FAIL_; -+ goto auth_fail; -+ } -+ -+ if (_rtw_memcmp((void *)(p + 2), pstat->chg_txt, 128)) { -+#ifdef CONFIG_IEEE80211W -+ if ((pstat->bpairwise_key_installed != _TRUE && (pstat->flags & WLAN_STA_MFP)) -+ || !(pstat->flags & WLAN_STA_MFP)) -+#endif /* CONFIG_IEEE80211W */ -+ { -+ pstat->state &= (~WIFI_FW_AUTH_STATE); -+ pstat->state |= WIFI_FW_AUTH_SUCCESS; -+ /* challenging txt is correct... */ -+ pstat->expire_to = pstapriv->assoc_to; -+ } -+ } else { -+ RTW_INFO("auth rejected because challenge failure!\n"); -+ status = _STATS_CHALLENGE_FAIL_; -+ goto auth_fail; -+ } -+ } else { -+ RTW_INFO("(3)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", -+ seq, pstat->auth_seq + 1); -+ status = _STATS_OUT_OF_AUTH_SEQ_; -+ goto auth_fail; -+ } -+ } -+ -+ -+ /* Now, we are going to issue_auth... */ -+ pstat->auth_seq = seq + 1; -+ -+#ifdef CONFIG_NATIVEAP_MLME -+ issue_auth(padapter, pstat, (unsigned short)(_STATS_SUCCESSFUL_)); -+#endif -+ -+ if ((pstat->state & WIFI_FW_AUTH_SUCCESS) || (pstat->state & WIFI_FW_ASSOC_SUCCESS)) -+ pstat->auth_seq = 0; -+ -+ -+ return _SUCCESS; -+ -+auth_fail: -+ -+ if (pstat) -+ rtw_free_stainfo(padapter , pstat); -+ -+ pstat = &stat; -+ _rtw_memset((char *)pstat, '\0', sizeof(stat)); -+ pstat->auth_seq = 2; -+ _rtw_memcpy(pstat->cmn.mac_addr, sa, ETH_ALEN); -+ -+#ifdef CONFIG_NATIVEAP_MLME -+ issue_auth(padapter, pstat, (unsigned short)status); -+#endif -+ -+#endif /* CONFIG_AP_MODE */ -+ return _FAIL; -+ -+} -+ -+unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ unsigned int seq, len, status, algthm, offset; -+ unsigned char *p; -+ unsigned int go2asoc = 0; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint pkt_len = precv_frame->u.hdr.len; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (GET_CFG80211_REPORT_MGMT(adapter_wdev_data(padapter), IEEE80211_STYPE_AUTH) == _TRUE) { -+ if (rtw_sec_chk_auth_type(padapter, MLME_AUTHTYPE_SAE)) { -+ if (rtw_cached_pmkid(padapter, get_my_bssid(&pmlmeinfo->network)) != -1) { -+ RTW_INFO("SAE: PMKSA cache entry found\n"); -+ goto normal; -+ } -+ rtw_cfg80211_rx_mframe(padapter, precv_frame, NULL); -+ return _SUCCESS; -+ } -+ } -+ -+normal: -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ /* check A1 matches or not */ -+ if (!_rtw_memcmp(adapter_mac_addr(padapter), get_da(pframe), ETH_ALEN)) -+ return _SUCCESS; -+ -+ if (!(pmlmeinfo->state & WIFI_FW_AUTH_STATE) || pmlmeext->join_abort) -+ return _SUCCESS; -+ -+ offset = (GetPrivacy(pframe)) ? 4 : 0; -+ -+ algthm = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset)); -+ seq = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 2)); -+ status = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 4)); -+ -+ if (status != 0) { -+ RTW_INFO("clnt auth fail, status: %d\n", status); -+ if (status == 13) { /* && pmlmeinfo->auth_algo == dot11AuthAlgrthm_Auto) */ -+ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) -+ pmlmeinfo->auth_algo = dot11AuthAlgrthm_Open; -+ else -+ pmlmeinfo->auth_algo = dot11AuthAlgrthm_Shared; -+ /* pmlmeinfo->reauth_count = 0; */ -+ } -+ -+ pmlmeinfo->auth_status = status; -+ set_link_timer(pmlmeext, 1); -+ goto authclnt_fail; -+ } -+ -+ if (seq == 2) { -+ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) { -+ /* legendary shared system */ -+ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _AUTH_IE_OFFSET_, _CHLGETXT_IE_, (int *)&len, -+ pkt_len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_); -+ -+ if (p == NULL) { -+ /* RTW_INFO("marc: no challenge text?\n"); */ -+ goto authclnt_fail; -+ } -+ -+ _rtw_memcpy((void *)(pmlmeinfo->chg_txt), (void *)(p + 2), len); -+ pmlmeinfo->auth_seq = 3; -+ issue_auth(padapter, NULL, 0); -+ set_link_timer(pmlmeext, REAUTH_TO); -+ -+ return _SUCCESS; -+ } else { -+ /* open, or 802.11r FTAA system */ -+ go2asoc = 1; -+ } -+ } else if (seq == 4) { -+ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) -+ go2asoc = 1; -+ else -+ goto authclnt_fail; -+ } else { -+ /* this is also illegal */ -+ /* RTW_INFO("marc: clnt auth failed due to illegal seq=%x\n", seq); */ -+ goto authclnt_fail; -+ } -+ -+ if (go2asoc) { -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_update_auth_rsp_ies(padapter, pframe, pkt_len)) -+ return _SUCCESS; -+#endif -+ RTW_PRINT("auth success, start assoc\n"); -+ start_clnt_assoc(padapter); -+ return _SUCCESS; -+ } -+ -+authclnt_fail: -+ -+ /* pmlmeinfo->state &= ~(WIFI_FW_AUTH_STATE); */ -+ -+ return _FAIL; -+ -+} -+ -+unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) -+{ -+#ifdef CONFIG_AP_MODE -+ _irqL irqL; -+ u16 listen_interval; -+ struct rtw_ieee802_11_elems elems; -+ struct sta_info *pstat; -+ unsigned char reassoc, *pos; -+ int left; -+ unsigned short status = _STATS_SUCCESSFUL_; -+ unsigned short frame_type, ie_offset = 0; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur = &(pmlmeinfo->network); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint pkt_len = precv_frame->u.hdr.len; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 p2p_status_code = P2P_STATUS_SUCCESS; -+ u8 *p2pie; -+ u32 p2pielen = 0; -+#endif /* CONFIG_P2P */ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ u8 sta_tbtx_enable = _FALSE; -+#endif -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) && -+ rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_LINKING | WIFI_UNDER_SURVEY)) { -+ /* don't process assoc request; */ -+ return _SUCCESS; -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) -+ return _FAIL; -+ -+ if (rtw_check_invalid_mac_address(get_addr2_ptr(pframe), _FALSE)) { -+ RTW_INFO("%s : reject invalid ASSOC-req "MAC_FMT"\n", -+ __func__, MAC_ARG(get_addr2_ptr(pframe))); -+ return _FAIL; -+ } -+ -+ frame_type = get_frame_sub_type(pframe); -+ if (frame_type == WIFI_ASSOCREQ) { -+ reassoc = 0; -+ ie_offset = _ASOCREQ_IE_OFFSET_; -+ } else { /* WIFI_REASSOCREQ */ -+ reassoc = 1; -+ ie_offset = _REASOCREQ_IE_OFFSET_; -+ } -+ -+ -+ if (pkt_len < IEEE80211_3ADDR_LEN + ie_offset) { -+ RTW_INFO("handle_assoc(reassoc=%d) - too short payload (len=%lu)" -+ "\n", reassoc, (unsigned long)pkt_len); -+ return _FAIL; -+ } -+ -+ pstat = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (pstat == (struct sta_info *)NULL) { -+ status = _RSON_CLS2_; -+ goto asoc_class2_error; -+ } -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ if (pstat->authalg == WLAN_AUTH_SAE) { -+ /* WPA3-SAE */ -+ if (((pstat->state) & WIFI_FW_AUTH_NULL)) { -+ /* TODO: -+ Queue AssocReq and Proccess -+ by external auth trigger. */ -+ RTW_INFO("%s: wait external auth trigger\n", __func__); -+ return _SUCCESS; -+ } -+ } -+ -+ /* check if this stat has been successfully authenticated/assocated */ -+ if (!((pstat->state) & WIFI_FW_AUTH_SUCCESS)) { -+ if (!((pstat->state) & WIFI_FW_ASSOC_SUCCESS)) { -+ status = _RSON_CLS2_; -+ goto asoc_class2_error; -+ } else { -+ pstat->state &= (~WIFI_FW_ASSOC_SUCCESS); -+ pstat->state |= WIFI_FW_ASSOC_STATE; -+ } -+ } else { -+ pstat->state &= (~WIFI_FW_AUTH_SUCCESS); -+ pstat->state |= WIFI_FW_ASSOC_STATE; -+ } -+ -+#if 0/* todo:tkip_countermeasures */ -+ if (hapd->tkip_countermeasures) { -+ resp = WLAN_REASON_MICHAEL_MIC_FAILURE; -+ goto fail; -+ } -+#endif -+ -+ if (rtw_ap_linking_test_force_asoc_fail()) { -+ status = rtw_ap_linking_test_force_asoc_fail(); -+ RTW_INFO(FUNC_ADPT_FMT" force asoc fail with status:%u\n" -+ , FUNC_ADPT_ARG(padapter), status); -+ goto OnAssocReqFail; -+ } -+ -+ /* now parse all ieee802_11 ie to point to elems */ -+ left = pkt_len - (IEEE80211_3ADDR_LEN + ie_offset); -+ pos = pframe + (IEEE80211_3ADDR_LEN + ie_offset); -+ if (rtw_ieee802_11_parse_elems(pos, left, &elems, 1) == ParseFailed) { -+ RTW_INFO("STA " MAC_FMT " sent invalid association request\n", -+ MAC_ARG(pstat->cmn.mac_addr)); -+ status = _STATS_FAILURE_; -+ goto OnAssocReqFail; -+ } -+ -+ rtw_ap_parse_sta_capability(padapter, pstat, pframe + WLAN_HDR_A3_LEN); -+ -+ listen_interval = RTW_GET_LE16(pframe + WLAN_HDR_A3_LEN + 2); -+#if 0/* todo: */ -+ /* check listen_interval */ -+ if (listen_interval > hapd->conf->max_listen_interval) { -+ hostapd_logger(hapd, mgmt->sa, HOSTAPD_MODULE_IEEE80211, -+ HOSTAPD_LEVEL_DEBUG, -+ "Too large Listen Interval (%d)", -+ listen_interval); -+ resp = WLAN_STATUS_ASSOC_DENIED_LISTEN_INT_TOO_LARGE; -+ goto fail; -+ } -+ -+ pstat->listen_interval = listen_interval; -+#endif -+ -+ /* now we should check all the fields... */ -+ /* checking SSID */ -+ if (elems.ssid == NULL -+ || elems.ssid_len == 0 -+ || elems.ssid_len != cur->Ssid.SsidLength -+ || _rtw_memcmp(elems.ssid, cur->Ssid.Ssid, cur->Ssid.SsidLength) == _FALSE -+ ) { -+ status = _STATS_FAILURE_; -+ goto OnAssocReqFail; -+ } -+ -+ /* (Extended) Supported rates */ -+ status = rtw_ap_parse_sta_supported_rates(padapter, pstat -+ , pframe + WLAN_HDR_A3_LEN + ie_offset, pkt_len - WLAN_HDR_A3_LEN - ie_offset); -+ if (status != _STATS_SUCCESSFUL_) -+ goto OnAssocReqFail; -+ -+ /* check RSN/WPA/WPS */ -+ status = rtw_ap_parse_sta_security_ie(padapter, pstat, &elems); -+ if (status != _STATS_SUCCESSFUL_) -+ goto OnAssocReqFail; -+ -+ /* check if there is WMM IE & support WWM-PS */ -+ rtw_ap_parse_sta_wmm_ie(padapter, pstat -+ , pframe + WLAN_HDR_A3_LEN + ie_offset, pkt_len - WLAN_HDR_A3_LEN - ie_offset); -+ -+#ifdef CONFIG_RTS_FULL_BW -+ /*check vendor IE*/ -+ rtw_parse_sta_vendor_ie_8812(padapter, pstat -+ , pframe + WLAN_HDR_A3_LEN + ie_offset, pkt_len - WLAN_HDR_A3_LEN - ie_offset); -+#endif/*CONFIG_RTS_FULL_BW*/ -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (elems.tbtx_cap && elems.tbtx_cap_len != 0) { -+ if(rtw_is_tbtx_capabilty(elems.tbtx_cap, elems.tbtx_cap_len)) { -+ sta_tbtx_enable = _TRUE; -+ } -+ } -+ -+#endif -+ -+ rtw_ap_parse_sta_ht_ie(padapter, pstat, &elems); -+ rtw_ap_parse_sta_vht_ie(padapter, pstat, &elems); -+ -+ if (((pstat->flags & WLAN_STA_HT) || (pstat->flags & WLAN_STA_VHT)) && -+ ((pstat->wpa2_pairwise_cipher & WPA_CIPHER_TKIP) || -+ (pstat->wpa_pairwise_cipher & WPA_CIPHER_TKIP))) { -+ -+ RTW_INFO("(V)HT: " MAC_FMT " tried to use TKIP with (V)HT association\n", MAC_ARG(pstat->cmn.mac_addr)); -+ -+ pstat->flags &= ~WLAN_STA_HT; -+ pstat->flags &= ~WLAN_STA_VHT; -+ /*status = WLAN_STATUS_CIPHER_REJECTED_PER_POLICY; -+ * goto OnAssocReqFail; -+ */ -+ } -+ -+#ifdef CONFIG_P2P -+ pstat->is_p2p_device = _FALSE; -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ p2pie = rtw_get_p2p_ie(pframe + WLAN_HDR_A3_LEN + ie_offset , pkt_len - WLAN_HDR_A3_LEN - ie_offset , NULL, &p2pielen); -+ if (p2pie) { -+ pstat->is_p2p_device = _TRUE; -+ p2p_status_code = (u8)process_assoc_req_p2p_ie(pwdinfo, pframe, pkt_len, pstat); -+ if (p2p_status_code > 0) { -+ pstat->p2p_status_code = p2p_status_code; -+ status = _STATS_CAP_FAIL_; -+ goto OnAssocReqFail; -+ } -+ } -+#ifdef CONFIG_WFD -+ rtw_process_wfd_ies(padapter, pframe + WLAN_HDR_A3_LEN + ie_offset, pkt_len - WLAN_HDR_A3_LEN - ie_offset, __func__); -+#endif -+ } -+ pstat->p2p_status_code = p2p_status_code; -+#endif /* CONFIG_P2P */ -+ -+ rtw_ap_parse_sta_multi_ap_ie(padapter, pstat, pos, left); -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ if (rtw_rson_ap_check_sta(padapter, pframe, pkt_len, ie_offset)) -+ goto OnAssocReqFail; -+#endif -+ -+ /* TODO: identify_proprietary_vendor_ie(); */ -+ /* Realtek proprietary IE */ -+ /* identify if this is Broadcom sta */ -+ /* identify if this is ralink sta */ -+ /* Customer proprietary IE */ -+ -+#ifdef CONFIG_RTW_80211K -+ rtw_ap_parse_sta_rm_en_cap(padapter, pstat, &elems); -+#endif -+ -+ /* AID assignment */ -+ if (pstat->cmn.aid > 0) -+ RTW_INFO(FUNC_ADPT_FMT" old AID=%d\n", FUNC_ADPT_ARG(padapter), pstat->cmn.aid); -+ else { -+ if (!rtw_aid_alloc(padapter, pstat)) { -+ RTW_INFO(FUNC_ADPT_FMT" no room for more AIDs\n", FUNC_ADPT_ARG(padapter)); -+ status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA; -+ goto OnAssocReqFail; -+ } -+ RTW_INFO(FUNC_ADPT_FMT" allocate new AID=%d\n", FUNC_ADPT_ARG(padapter), pstat->cmn.aid); -+ } -+ -+ pstat->state &= (~WIFI_FW_ASSOC_STATE); -+ pstat->state |= WIFI_FW_ASSOC_SUCCESS; -+ /* RTW_INFO("==================%s, %d, (%x), bpairwise_key_installed=%d, MAC:"MAC_FMT"\n" -+ , __func__, __LINE__, pstat->state, pstat->bpairwise_key_installed, MAC_ARG(pstat->cmn.mac_addr)); */ -+#ifdef CONFIG_IEEE80211W -+ if ((pstat->bpairwise_key_installed != _TRUE && (pstat->flags & WLAN_STA_MFP)) -+ || !(pstat->flags & WLAN_STA_MFP)) -+#endif /* CONFIG_IEEE80211W */ -+ { -+ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); -+ if (!rtw_is_list_empty(&pstat->auth_list)) { -+ rtw_list_delete(&pstat->auth_list); -+ pstapriv->auth_list_cnt--; -+ } -+ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&pstat->asoc_list)) { -+ pstat->expire_to = pstapriv->expire_to; -+ rtw_list_insert_tail(&pstat->asoc_list, &pstapriv->asoc_list); -+ pstapriv->asoc_list_cnt++; -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (sta_tbtx_enable) { -+ pstat->tbtx_enable = _TRUE; -+ pstapriv->tbtx_asoc_list_cnt++; -+ } -+#endif -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ } -+ -+ /* now the station is qualified to join our BSS... */ -+ if (pstat && (pstat->state & WIFI_FW_ASSOC_SUCCESS) && (_STATS_SUCCESSFUL_ == status)) { -+#ifdef CONFIG_NATIVEAP_MLME -+#ifdef CONFIG_IEEE80211W -+ if ((pstat->bpairwise_key_installed != _TRUE && (pstat->flags & WLAN_STA_MFP)) -+ || !(pstat->flags & WLAN_STA_MFP)) -+#endif /* CONFIG_IEEE80211W */ -+ { -+ /* .1 bss_cap_update & sta_info_update */ -+ bss_cap_update_on_sta_join(padapter, pstat); -+ sta_info_update(padapter, pstat); -+ } -+#ifdef CONFIG_IEEE80211W -+ if (pstat->bpairwise_key_installed == _TRUE && (pstat->flags & WLAN_STA_MFP)) -+ status = _STATS_REFUSED_TEMPORARILY_; -+#endif /* CONFIG_IEEE80211W */ -+ /* .2 issue assoc rsp before notify station join event. */ -+ if (frame_type == WIFI_ASSOCREQ) -+ issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP); -+ else -+ issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ _enter_critical_bh(&pstat->lock, &irqL); -+ if (pstat->passoc_req) { -+ rtw_mfree(pstat->passoc_req, pstat->assoc_req_len); -+ pstat->passoc_req = NULL; -+ pstat->assoc_req_len = 0; -+ } -+ -+ pstat->passoc_req = rtw_zmalloc(pkt_len); -+ if (pstat->passoc_req) { -+ _rtw_memcpy(pstat->passoc_req, pframe, pkt_len); -+ pstat->assoc_req_len = pkt_len; -+ } -+ _exit_critical_bh(&pstat->lock, &irqL); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+#ifdef CONFIG_IEEE80211W -+ if ((pstat->bpairwise_key_installed != _TRUE && (pstat->flags & WLAN_STA_MFP)) -+ || !(pstat->flags & WLAN_STA_MFP)) -+#endif /* CONFIG_IEEE80211W */ -+ { -+ /* .3-(1) report sta add event */ -+ report_add_sta_event(padapter, pstat->cmn.mac_addr); -+ } -+#ifdef CONFIG_IEEE80211W -+ if (pstat->bpairwise_key_installed == _TRUE && (pstat->flags & WLAN_STA_MFP)) { -+ RTW_INFO(MAC_FMT"\n", MAC_ARG(pstat->cmn.mac_addr)); -+ issue_action_SA_Query(padapter, pstat->cmn.mac_addr, 0, 0, IEEE80211W_RIGHT_KEY); -+ } -+#endif /* CONFIG_IEEE80211W */ -+#endif /* CONFIG_NATIVEAP_MLME */ -+ } -+ -+ return _SUCCESS; -+ -+asoc_class2_error: -+ -+#ifdef CONFIG_NATIVEAP_MLME -+ issue_deauth(padapter, (void *)get_addr2_ptr(pframe), status); -+#endif -+ -+ return _FAIL; -+ -+OnAssocReqFail: -+ -+ -+#ifdef CONFIG_NATIVEAP_MLME -+ /* pstat->cmn.aid = 0; */ -+ if (frame_type == WIFI_ASSOCREQ) -+ issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP); -+ else -+ issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP); -+#endif -+ -+ -+#endif /* CONFIG_AP_MODE */ -+ -+ return _FAIL; -+ -+} -+ -+#if defined(CONFIG_LAYER2_ROAMING) && defined(CONFIG_RTW_80211K) -+void rtw_roam_nb_discover(_adapter *padapter, u8 bfroce) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ u8 nb_req_issue = _FALSE; -+ -+ if (!check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) -+ return; -+ -+ if (!rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE)) -+ return; -+ -+ psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); -+ if (!psta) -+ return; -+ -+ if (bfroce || (!pmlmepriv->nb_info.nb_rpt_is_same)) -+ nb_req_issue = _TRUE; -+ -+ if (nb_req_issue && (psta->rm_en_cap[0] & RTW_RRM_NB_RPT_EN)) -+ rm_add_nb_req(padapter, psta); -+} -+#endif -+ -+unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ uint i; -+ int res; -+ unsigned short status; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ /* WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); */ -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint pkt_len = precv_frame->u.hdr.len; -+#ifdef CONFIG_WAPI_SUPPORT -+ PNDIS_802_11_VARIABLE_IEs pWapiIE = NULL; -+#endif -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ /* check A1 matches or not */ -+ if (!_rtw_memcmp(adapter_mac_addr(padapter), get_da(pframe), ETH_ALEN)) -+ return _SUCCESS; -+ -+ if (!(pmlmeinfo->state & (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE)) || pmlmeext->join_abort) -+ return _SUCCESS; -+ -+ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) -+ return _SUCCESS; -+ -+ _cancel_timer_ex(&pmlmeext->link_timer); -+ -+ /* status */ -+ status = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 2)); -+ if (status > 0) { -+ RTW_INFO("assoc reject, status code: %d\n", status); -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ res = -4; -+ goto report_assoc_result; -+ } -+ -+ /* get capabilities */ -+ pmlmeinfo->capability = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); -+ -+ /* set slot time */ -+ pmlmeinfo->slotTime = (pmlmeinfo->capability & BIT(10)) ? 9 : 20; -+ -+ /* AID */ -+ res = pmlmeinfo->aid = (int)(le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 4)) & 0x3fff); -+ -+ /* check aid value */ -+ if (res < 1 || res > 2007) { -+ RTW_INFO("assoc reject, aid: %d\n", res); -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ res = -4; -+ goto report_assoc_result; -+ } -+ -+ /* following are moved to join event callback function */ -+ /* to handle HT, WMM, rate adaptive, update MAC reg */ -+ /* for not to handle the synchronous IO in the tasklet */ -+ for (i = (6 + WLAN_HDR_A3_LEN); i < pkt_len;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i); -+ -+ switch (pIE->ElementID) { -+ case _VENDOR_SPECIFIC_IE_: -+ if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6)) /* WMM */ -+ WMM_param_handler(padapter, pIE); -+#if defined(CONFIG_P2P) && defined(CONFIG_WFD) -+ else if (_rtw_memcmp(pIE->data, WFD_OUI, 4)) /* WFD */ -+ rtw_process_wfd_ie(padapter, (u8 *)pIE, pIE->Length, __func__); -+#endif -+ break; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ case _WAPI_IE_: -+ pWapiIE = pIE; -+ break; -+#endif -+ -+ case _HT_CAPABILITY_IE_: /* HT caps */ -+ HT_caps_handler(padapter, pIE); -+#ifdef ROKU_PRIVATE -+ HT_caps_handler_infra_ap(padapter, pIE); -+#endif /* ROKU_PRIVATE */ -+ break; -+ -+ case _HT_EXTRA_INFO_IE_: /* HT info */ -+ HT_info_handler(padapter, pIE); -+ break; -+ -+#ifdef CONFIG_80211AC_VHT -+ case EID_VHTCapability: -+ VHT_caps_handler(padapter, pIE); -+#ifdef ROKU_PRIVATE -+ VHT_caps_handler_infra_ap(padapter, pIE); -+#endif /* ROKU_PRIVATE */ -+ break; -+ -+ case EID_VHTOperation: -+ VHT_operation_handler(padapter, pIE); -+ break; -+#endif -+ -+ case _ERPINFO_IE_: -+ ERP_IE_handler(padapter, pIE); -+ break; -+#ifdef CONFIG_TDLS -+ case _EXT_CAP_IE_: -+ if (check_ap_tdls_prohibited(pIE->data, pIE->Length) == _TRUE) -+ padapter->tdlsinfo.ap_prohibited = _TRUE; -+ if (check_ap_tdls_ch_switching_prohibited(pIE->data, pIE->Length) == _TRUE) -+ padapter->tdlsinfo.ch_switch_prohibited = _TRUE; -+ break; -+#endif /* CONFIG_TDLS */ -+ -+#ifdef CONFIG_RTW_80211K -+ case _EID_RRM_EN_CAP_IE_: -+ RM_IE_handler(padapter, pIE); -+ break; -+#endif -+ -+#ifdef ROKU_PRIVATE -+ /* Infra mode, used to store AP's info , Parse the supported rates from AssocRsp */ -+ case _SUPPORTEDRATES_IE_: -+ Supported_rate_infra_ap(padapter, pIE); -+ break; -+ -+ case _EXT_SUPPORTEDRATES_IE_: -+ Extended_Supported_rate_infra_ap(padapter, pIE); -+ break; -+#endif /* ROKU_PRIVATE */ -+ default: -+ break; -+ } -+ -+ i += (pIE->Length + 2); -+ } -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ rtw_wapi_on_assoc_ok(padapter, pIE); -+#endif -+ -+ pmlmeinfo->state &= (~WIFI_FW_ASSOC_STATE); -+ pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; -+ -+ /* Update Basic Rate Table for spec, 2010-12-28 , by thomas */ -+ UpdateBrateTbl(padapter, pmlmeinfo->network.SupportedRates); -+ -+report_assoc_result: -+ if (res > 0) -+ rtw_buf_update(&pmlmepriv->assoc_rsp, &pmlmepriv->assoc_rsp_len, pframe, pkt_len); -+ else -+ rtw_buf_free(&pmlmepriv->assoc_rsp, &pmlmepriv->assoc_rsp_len); -+ -+ report_join_res(padapter, res, status); -+ -+#if defined(CONFIG_LAYER2_ROAMING) && defined(CONFIG_RTW_80211K) -+ rtw_roam_nb_discover(padapter, _TRUE); -+#endif -+ return _SUCCESS; -+} -+ -+unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ unsigned short reason; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ -+ /* check A3 */ -+ if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) -+ return _SUCCESS; -+ -+ RTW_INFO(FUNC_ADPT_FMT" - Start to Disconnect\n", FUNC_ADPT_ARG(padapter)); -+ -+#ifdef CONFIG_P2P -+ if (pwdinfo->rx_invitereq_info.scan_op_ch_only) { -+ _cancel_timer_ex(&pwdinfo->reset_ch_sitesurvey); -+ _set_timer(&pwdinfo->reset_ch_sitesurvey, 10); -+ } -+#endif /* CONFIG_P2P */ -+ -+ reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); -+ -+#ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(padapter)) { -+ _irqL irqL; -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ /* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ /* rtw_free_stainfo(padapter, psta); */ -+ /* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ -+ RTW_PRINT(FUNC_ADPT_FMT" reason=%u, ta=%pM\n" -+ , FUNC_ADPT_ARG(padapter), reason, get_addr2_ptr(pframe)); -+ -+ psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (psta) { -+ u8 updated = _FALSE; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) { -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (psta->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt--; -+ #endif -+ updated = ap_free_sta(padapter, psta, _FALSE, reason, _TRUE); -+ -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); -+ } -+ -+ -+ return _SUCCESS; -+ } else -+#endif -+ if (!MLME_IS_MESH(padapter)) { -+ int ignore_received_deauth = 0; -+ -+ /* Commented by Albert 20130604 */ -+ /* Before sending the auth frame to start the STA/GC mode connection with AP/GO, */ -+ /* we will send the deauth first. */ -+ /* However, the Win8.1 with BRCM Wi-Fi will send the deauth with reason code 6 to us after receieving our deauth. */ -+ /* Added the following code to avoid this case. */ -+ if ((pmlmeinfo->state & WIFI_FW_AUTH_STATE) || -+ (pmlmeinfo->state & WIFI_FW_ASSOC_STATE)) { -+ if (reason == WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA) -+ ignore_received_deauth = 1; -+ else if (WLAN_REASON_PREV_AUTH_NOT_VALID == reason) { -+ /* TODO: 802.11r */ -+ ignore_received_deauth = 1; -+ } -+ } -+ -+ RTW_PRINT(FUNC_ADPT_FMT" reason=%u, ta=%pM, ignore=%d\n" -+ , FUNC_ADPT_ARG(padapter), reason, get_addr2_ptr(pframe), ignore_received_deauth); -+ -+ if (0 == ignore_received_deauth) -+ receive_disconnect(padapter, get_addr2_ptr(pframe), reason, _FALSE); -+ } -+ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; -+ return _SUCCESS; -+ -+} -+ -+unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ unsigned short reason; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ -+ /* check A3 */ -+ if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) -+ return _SUCCESS; -+ -+ RTW_INFO(FUNC_ADPT_FMT" - Start to Disconnect\n", FUNC_ADPT_ARG(padapter)); -+ -+#ifdef CONFIG_P2P -+ if (pwdinfo->rx_invitereq_info.scan_op_ch_only) { -+ _cancel_timer_ex(&pwdinfo->reset_ch_sitesurvey); -+ _set_timer(&pwdinfo->reset_ch_sitesurvey, 10); -+ } -+#endif /* CONFIG_P2P */ -+ -+ reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); -+ -+#ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(padapter)) { -+ _irqL irqL; -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ /* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ /* rtw_free_stainfo(padapter, psta); */ -+ /* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ -+ RTW_PRINT(FUNC_ADPT_FMT" reason=%u, ta=%pM\n" -+ , FUNC_ADPT_ARG(padapter), reason, get_addr2_ptr(pframe)); -+ -+ psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (psta) { -+ u8 updated = _FALSE; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) { -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (psta->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt--; -+ #endif -+ updated = ap_free_sta(padapter, psta, _FALSE, reason, _TRUE); -+ -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); -+ } -+ -+ return _SUCCESS; -+ } else -+#endif -+ if (!MLME_IS_MESH(padapter)) { -+ RTW_PRINT(FUNC_ADPT_FMT" reason=%u, ta=%pM\n" -+ , FUNC_ADPT_ARG(padapter), reason, get_addr2_ptr(pframe)); -+ -+ #ifdef CONFIG_RTW_WNM -+ if (rtw_wnm_try_btm_roam_imnt(padapter) > 0) -+ #endif -+ receive_disconnect(padapter, get_addr2_ptr(pframe), reason, _FALSE); -+ } -+ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; -+ return _SUCCESS; -+ -+} -+ -+unsigned int OnAtim(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ return _SUCCESS; -+} -+ -+unsigned int on_action_spct_ch_switch(_adapter *padapter, struct sta_info *psta, u8 *ies, uint ies_len) -+{ -+ unsigned int ret = _FAIL; -+ struct mlme_ext_priv *mlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(mlmeext->mlmext_info); -+ -+ if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { -+ ret = _SUCCESS; -+ goto exit; -+ } -+ -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { -+ -+ int ch_switch_mode = -1, ch = -1, ch_switch_cnt = -1; -+ int ch_offset = -1; -+ u8 bwmode; -+ struct ieee80211_info_element *ie; -+ -+ RTW_INFO(FUNC_NDEV_FMT" from "MAC_FMT"\n", -+ FUNC_NDEV_ARG(padapter->pnetdev), MAC_ARG(psta->cmn.mac_addr)); -+ -+ for_each_ie(ie, ies, ies_len) { -+ if (ie->id == WLAN_EID_CHANNEL_SWITCH) { -+ ch_switch_mode = ie->data[0]; -+ ch = ie->data[1]; -+ ch_switch_cnt = ie->data[2]; -+ RTW_INFO("ch_switch_mode:%d, ch:%d, ch_switch_cnt:%d\n", -+ ch_switch_mode, ch, ch_switch_cnt); -+ } else if (ie->id == WLAN_EID_SECONDARY_CHANNEL_OFFSET) { -+ ch_offset = secondary_ch_offset_to_hal_ch_offset(ie->data[0]); -+ RTW_INFO("ch_offset:%d\n", ch_offset); -+ } -+ } -+ -+ if (ch == -1) -+ return _SUCCESS; -+ -+ if (ch_offset == -1) -+ bwmode = mlmeext->cur_bwmode; -+ else -+ bwmode = (ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) ? -+ CHANNEL_WIDTH_20 : CHANNEL_WIDTH_40; -+ -+ ch_offset = (ch_offset == -1) ? mlmeext->cur_ch_offset : ch_offset; -+ -+ /* todo: -+ * 1. the decision of channel switching -+ * 2. things after channel switching -+ */ -+ -+ ret = rtw_set_chbw_cmd(padapter, ch, bwmode, ch_offset, 0); -+ } -+ -+exit: -+ return ret; -+} -+ -+unsigned int on_action_spct(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ unsigned int ret = _FAIL; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint frame_len = precv_frame->u.hdr.len; -+ u8 *frame_body = (u8 *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ u8 category; -+ u8 action; -+ -+ psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ -+ if (!psta) -+ goto exit; -+ -+ category = frame_body[0]; -+ if (category != RTW_WLAN_CATEGORY_SPECTRUM_MGMT) -+ goto exit; -+ -+ action = frame_body[1]; -+ -+ RTW_INFO(FUNC_ADPT_FMT" action:%u\n", FUNC_ADPT_ARG(padapter), action); -+ -+ switch (action) { -+ case RTW_WLAN_ACTION_SPCT_MSR_REQ: -+ case RTW_WLAN_ACTION_SPCT_MSR_RPRT: -+ case RTW_WLAN_ACTION_SPCT_TPC_REQ: -+ case RTW_WLAN_ACTION_SPCT_TPC_RPRT: -+ break; -+ case RTW_WLAN_ACTION_SPCT_CHL_SWITCH: -+#ifdef CONFIG_SPCT_CH_SWITCH -+ ret = on_action_spct_ch_switch(padapter, psta -+ , frame_body + 2, frame_len - (frame_body - pframe) - 2); -+#elif CONFIG_DFS -+ if (MLME_IS_STA(padapter) && MLME_IS_ASOC(padapter)) { -+ process_csa_ie(padapter -+ , frame_body + 2, frame_len - (frame_body - pframe) - 2); -+ } -+#endif -+ break; -+ default: -+ break; -+ } -+ -+exit: -+ return ret; -+} -+ -+unsigned int OnAction_qos(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ return _SUCCESS; -+} -+ -+unsigned int OnAction_dls(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ return _SUCCESS; -+} -+ -+#ifdef CONFIG_RTW_WNM -+unsigned int on_action_wnm(_adapter *adapter, union recv_frame *rframe) -+{ -+ unsigned int ret = _FAIL; -+ struct sta_info *sta = NULL; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct sta_priv *stapriv = &(adapter->stapriv); -+ u8 *frame = rframe->u.hdr.rx_data; -+ u32 frame_len = rframe->u.hdr.len; -+ u8 *frame_body = (u8 *)(frame + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ u32 frame_body_len = frame_len - sizeof(struct rtw_ieee80211_hdr_3addr); -+ u8 category, action; -+ int cnt = 0; -+ char msg[16]; -+ -+ sta = rtw_get_stainfo(stapriv, get_addr2_ptr(frame)); -+ if (!sta) -+ goto exit; -+ -+ category = frame_body[0]; -+ if (category != RTW_WLAN_CATEGORY_WNM) -+ goto exit; -+ -+ action = frame_body[1]; -+ -+ switch (action) { -+#ifdef CONFIG_RTW_80211R -+ case RTW_WLAN_ACTION_WNM_BTM_REQ: -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { -+ RTW_INFO("WNM: BSS Transition Management Request recv.\n"); -+ rtw_wnm_process_btm_req(adapter, frame_body, frame_body_len); -+ } -+ ret = _SUCCESS; -+ break; -+#endif -+ case RTW_WLAN_ACTION_WNM_BTM_RSP: -+ if ((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) && -+ (pmlmepriv->nb_info.features & RTW_WNM_FEATURE_BTM_REQ_EN)) { -+ struct btm_rsp_hdr rsp; -+ u32 sz; -+ -+ RTW_INFO("WNM: BSS Transition Management Response recv.\n"); -+ sz = rtw_wnm_btm_rsp_candidates_sz_get(adapter, -+ frame_body, frame_body_len); -+ _rtw_memset(&rsp, 0, sizeof(rsp)); -+ -+ if (sz > 0) -+ rsp.pcandidates = rtw_zmalloc(sz); -+ -+ rtw_wnm_process_btm_rsp(adapter, frame_body, frame_body_len, &rsp); -+ /* TODO : handle candidates info in rsp.pcandidates for upper-layer services */ -+ #ifdef CONFIG_PLATFORM_CMAP_INTFS -+ cmap_intfs_nl_btm_resp_event(adapter, sta->cmn.mac_addr, -+ adapter_mac_addr(adapter), -+ rsp.status, rsp.bssid, -+ rsp.pcandidates, -+ rsp.candidates_num); -+ #endif -+ if (0 && rsp.pcandidates && (rsp.candidates_num > 0)) -+ RTW_INFO_DUMP("pcandidates : ", rsp.pcandidates, sz); -+ -+ if ((sz > 0) && (rsp.pcandidates != NULL)) -+ rtw_mfree(rsp.pcandidates, sz); -+ } -+ /* fall through */ -+ default: -+ #ifdef CONFIG_IOCTL_CFG80211 -+ cnt += sprintf((msg + cnt), "ACT_WNM %u", action); -+ rtw_cfg80211_rx_action(adapter, rframe, msg); -+ #endif -+ ret = _SUCCESS; -+ break; -+ } -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_RTW_WNM */ -+ -+/** -+ * rtw_rx_ampdu_size - Get the target RX AMPDU buffer size for the specific @adapter -+ * @adapter: the adapter to get target RX AMPDU buffer size -+ * -+ * Returns: the target RX AMPDU buffer size -+ */ -+u8 rtw_rx_ampdu_size(_adapter *adapter) -+{ -+ u8 size; -+ HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor; -+ -+#ifdef CONFIG_BT_COEXIST -+ if (rtw_btcoex_IsBTCoexCtrlAMPDUSize(adapter) == _TRUE) { -+ size = rtw_btcoex_GetAMPDUSize(adapter); -+ goto exit; -+ } -+#endif -+ -+ /* for scan */ -+ if (!mlmeext_chk_scan_state(&adapter->mlmeextpriv, SCAN_DISABLE) -+ && !mlmeext_chk_scan_state(&adapter->mlmeextpriv, SCAN_COMPLETE) -+ && adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_size != RX_AMPDU_SIZE_INVALID -+ ) { -+ size = adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_size; -+ goto exit; -+ } -+ -+ /* default value based on max_rx_ampdu_factor */ -+ if (adapter->driver_rx_ampdu_factor != 0xFF) -+ max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)adapter->driver_rx_ampdu_factor; -+ else -+ rtw_hal_get_def_var(adapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); -+ -+ /* In Maximum A-MPDU Length Exponent subfield of A-MPDU Parameters field of HT Capabilities element, -+ the unit of max_rx_ampdu_factor are octets. 8K, 16K, 32K, 64K is right. -+ But the buffer size subfield of Block Ack Parameter Set field in ADDBA action frame indicates -+ the number of buffers available for this particular TID. Each buffer is equal to max. size of -+ MSDU or AMSDU. -+ The size variable means how many MSDUs or AMSDUs, it's not Kbytes. -+ */ -+ if (MAX_AMPDU_FACTOR_64K == max_rx_ampdu_factor) -+ size = 64; -+ else if (MAX_AMPDU_FACTOR_32K == max_rx_ampdu_factor) -+ size = 32; -+ else if (MAX_AMPDU_FACTOR_16K == max_rx_ampdu_factor) -+ size = 16; -+ else if (MAX_AMPDU_FACTOR_8K == max_rx_ampdu_factor) -+ size = 8; -+ else -+ size = 64; -+ -+exit: -+ -+ if (size > 127) -+ size = 127; -+ -+ return size; -+} -+ -+/** -+ * rtw_rx_ampdu_is_accept - Get the permission if RX AMPDU should be set up for the specific @adapter -+ * @adapter: the adapter to get the permission if RX AMPDU should be set up -+ * -+ * Returns: accept or not -+ */ -+bool rtw_rx_ampdu_is_accept(_adapter *adapter) -+{ -+ bool accept; -+ -+ if (adapter->fix_rx_ampdu_accept != RX_AMPDU_ACCEPT_INVALID) { -+ accept = adapter->fix_rx_ampdu_accept; -+ goto exit; -+ } -+ -+#ifdef CONFIG_BT_COEXIST -+ if (rtw_btcoex_IsBTCoexRejectAMPDU(adapter) == _TRUE) { -+ accept = _FALSE; -+ goto exit; -+ } -+#endif -+ -+ /* for scan */ -+ if (!mlmeext_chk_scan_state(&adapter->mlmeextpriv, SCAN_DISABLE) -+ && !mlmeext_chk_scan_state(&adapter->mlmeextpriv, SCAN_COMPLETE) -+ && adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_accept != RX_AMPDU_ACCEPT_INVALID -+ ) { -+ accept = adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_accept; -+ goto exit; -+ } -+ -+ /* default value for other cases */ -+ accept = adapter->mlmeextpriv.mlmext_info.bAcceptAddbaReq; -+ -+exit: -+ return accept; -+} -+ -+/** -+ * rtw_rx_ampdu_set_size - Set the target RX AMPDU buffer size for the specific @adapter and specific @reason -+ * @adapter: the adapter to set target RX AMPDU buffer size -+ * @size: the target RX AMPDU buffer size to set -+ * @reason: reason for the target RX AMPDU buffer size setting -+ * -+ * Returns: whether the target RX AMPDU buffer size is changed -+ */ -+bool rtw_rx_ampdu_set_size(_adapter *adapter, u8 size, u8 reason) -+{ -+ bool is_adj = _FALSE; -+ struct mlme_ext_priv *mlmeext; -+ struct mlme_ext_info *mlmeinfo; -+ -+ mlmeext = &adapter->mlmeextpriv; -+ mlmeinfo = &mlmeext->mlmext_info; -+ -+ if (reason == RX_AMPDU_DRV_FIXED) { -+ if (adapter->fix_rx_ampdu_size != size) { -+ adapter->fix_rx_ampdu_size = size; -+ is_adj = _TRUE; -+ RTW_INFO(FUNC_ADPT_FMT" fix_rx_ampdu_size:%u\n", FUNC_ADPT_ARG(adapter), size); -+ } -+ } else if (reason == RX_AMPDU_DRV_SCAN) { -+ struct ss_res *ss = &adapter->mlmeextpriv.sitesurvey_res; -+ -+ if (ss->rx_ampdu_size != size) { -+ ss->rx_ampdu_size = size; -+ is_adj = _TRUE; -+ RTW_INFO(FUNC_ADPT_FMT" ss.rx_ampdu_size:%u\n", FUNC_ADPT_ARG(adapter), size); -+ } -+ } -+ -+ return is_adj; -+} -+ -+/** -+ * rtw_rx_ampdu_set_accept - Set the permission if RX AMPDU should be set up for the specific @adapter and specific @reason -+ * @adapter: the adapter to set if RX AMPDU should be set up -+ * @accept: if RX AMPDU should be set up -+ * @reason: reason for the permission if RX AMPDU should be set up -+ * -+ * Returns: whether the permission if RX AMPDU should be set up is changed -+ */ -+bool rtw_rx_ampdu_set_accept(_adapter *adapter, u8 accept, u8 reason) -+{ -+ bool is_adj = _FALSE; -+ struct mlme_ext_priv *mlmeext; -+ struct mlme_ext_info *mlmeinfo; -+ -+ mlmeext = &adapter->mlmeextpriv; -+ mlmeinfo = &mlmeext->mlmext_info; -+ -+ if (reason == RX_AMPDU_DRV_FIXED) { -+ if (adapter->fix_rx_ampdu_accept != accept) { -+ adapter->fix_rx_ampdu_accept = accept; -+ is_adj = _TRUE; -+ RTW_INFO(FUNC_ADPT_FMT" fix_rx_ampdu_accept:%u\n", FUNC_ADPT_ARG(adapter), accept); -+ } -+ } else if (reason == RX_AMPDU_DRV_SCAN) { -+ if (adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_accept != accept) { -+ adapter->mlmeextpriv.sitesurvey_res.rx_ampdu_accept = accept; -+ is_adj = _TRUE; -+ RTW_INFO(FUNC_ADPT_FMT" ss.rx_ampdu_accept:%u\n", FUNC_ADPT_ARG(adapter), accept); -+ } -+ } -+ -+ return is_adj; -+} -+ -+/** -+ * rx_ampdu_apply_sta_tid - Apply RX AMPDU setting to the specific @sta and @tid -+ * @adapter: the adapter to which @sta belongs -+ * @sta: the sta to be checked -+ * @tid: the tid to be checked -+ * @accept: the target permission if RX AMPDU should be set up -+ * @size: the target RX AMPDU buffer size -+ * -+ * Returns: -+ * 0: no canceled -+ * 1: canceled by no permission -+ * 2: canceled by different buffer size -+ * 3: canceled by potential mismatched status -+ * -+ * Blocking function, may sleep -+ */ -+u8 rx_ampdu_apply_sta_tid(_adapter *adapter, struct sta_info *sta, u8 tid, u8 accept, u8 size) -+{ -+ u8 ret = 0; -+ struct recv_reorder_ctrl *reorder_ctl = &sta->recvreorder_ctrl[tid]; -+ -+ if (reorder_ctl->enable == _FALSE) { -+ if (reorder_ctl->ampdu_size != RX_AMPDU_SIZE_INVALID) { -+ send_delba_sta_tid_wait_ack(adapter, 0, sta, tid, 1); -+ ret = 3; -+ } -+ goto exit; -+ } -+ -+ if (accept == _FALSE) { -+ send_delba_sta_tid_wait_ack(adapter, 0, sta, tid, 0); -+ ret = 1; -+ } else if (reorder_ctl->ampdu_size != size) { -+ send_delba_sta_tid_wait_ack(adapter, 0, sta, tid, 0); -+ ret = 2; -+ } -+ -+exit: -+ return ret; -+} -+ -+u8 rx_ampdu_size_sta_limit(_adapter *adapter, struct sta_info *sta) -+{ -+ u8 sz_limit = 0xFF; -+ -+#ifdef CONFIG_80211N_HT -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ struct mlme_ext_info *mlmeinfo = &adapter->mlmeextpriv.mlmext_info; -+ s8 nss = -1; -+ u8 bw = rtw_min(sta->cmn.bw_mode, adapter->mlmeextpriv.cur_bwmode); -+ -+ #ifdef CONFIG_80211AC_VHT -+ if (is_supported_vht(sta->wireless_mode)) { -+ nss = rtw_min(rtw_vht_mcsmap_to_nss(mlme->vhtpriv.vht_mcs_map) -+ , rtw_vht_mcsmap_to_nss(sta->vhtpriv.vht_mcs_map)); -+ } else -+ #endif -+ if (is_supported_ht(sta->wireless_mode)) { -+ nss = rtw_min(rtw_ht_mcsset_to_nss(mlmeinfo->HT_caps.u.HT_cap_element.MCS_rate) -+ , rtw_ht_mcsset_to_nss(sta->htpriv.ht_cap.supp_mcs_set)); -+ } -+ -+ if (nss >= 1) -+ sz_limit = regsty->rx_ampdu_sz_limit_by_nss_bw[nss - 1][bw]; -+#endif /* CONFIG_80211N_HT */ -+ -+ return sz_limit; -+} -+ -+/** -+ * rx_ampdu_apply_sta - Apply RX AMPDU setting to the specific @sta -+ * @adapter: the adapter to which @sta belongs -+ * @sta: the sta to be checked -+ * @accept: the target permission if RX AMPDU should be set up -+ * @size: the target RX AMPDU buffer size -+ * -+ * Returns: number of the RX AMPDU assciation canceled for applying current target setting -+ * -+ * Blocking function, may sleep -+ */ -+u8 rx_ampdu_apply_sta(_adapter *adapter, struct sta_info *sta, u8 accept, u8 size) -+{ -+ u8 change_cnt = 0; -+ int i; -+ -+ for (i = 0; i < TID_NUM; i++) { -+ if (rx_ampdu_apply_sta_tid(adapter, sta, i, accept, size) != 0) -+ change_cnt++; -+ } -+ -+ return change_cnt; -+} -+ -+/** -+ * rtw_rx_ampdu_apply - Apply the current target RX AMPDU setting for the specific @adapter -+ * @adapter: the adapter to be applied -+ * -+ * Returns: number of the RX AMPDU assciation canceled for applying current target setting -+ */ -+u16 rtw_rx_ampdu_apply(_adapter *adapter) -+{ -+ u16 adj_cnt = 0; -+ struct sta_info *sta; -+ u8 accept = rtw_rx_ampdu_is_accept(adapter); -+ u8 size; -+ -+ if (adapter->fix_rx_ampdu_size != RX_AMPDU_SIZE_INVALID) -+ size = adapter->fix_rx_ampdu_size; -+ else -+ size = rtw_rx_ampdu_size(adapter); -+ -+ if (MLME_IS_STA(adapter)) { -+ sta = rtw_get_stainfo(&adapter->stapriv, get_bssid(&adapter->mlmepriv)); -+ if (sta) { -+ u8 sta_size = size; -+ -+ if (adapter->fix_rx_ampdu_size == RX_AMPDU_SIZE_INVALID) -+ sta_size = rtw_min(size, rx_ampdu_size_sta_limit(adapter, sta)); -+ adj_cnt += rx_ampdu_apply_sta(adapter, sta, accept, sta_size); -+ } -+ /* TODO: TDLS peer */ -+#ifdef CONFIG_AP_MODE -+ } else if (MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) { -+ _irqL irqL; -+ _list *phead, *plist; -+ u8 peer_num = 0; -+ char peers[NUM_STA]; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ int i; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ int stainfo_offset; -+ -+ sta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ -+ stainfo_offset = rtw_stainfo_offset(pstapriv, sta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ peers[peer_num++] = stainfo_offset; -+ } -+ -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ for (i = 0; i < peer_num; i++) { -+ sta = rtw_get_stainfo_by_offset(pstapriv, peers[i]); -+ if (sta) { -+ u8 sta_size = size; -+ -+ if (adapter->fix_rx_ampdu_size == RX_AMPDU_SIZE_INVALID) -+ sta_size = rtw_min(size, rx_ampdu_size_sta_limit(adapter, sta)); -+ adj_cnt += rx_ampdu_apply_sta(adapter, sta, accept, sta_size); -+ } -+ } -+#endif /* CONFIG_AP_MODE */ -+ } -+ -+ /* TODO: ADHOC */ -+ -+ return adj_cnt; -+} -+ -+unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ u8 *addr; -+ struct sta_info *psta = NULL; -+ struct recv_reorder_ctrl *preorder_ctrl; -+ unsigned char *frame_body; -+ unsigned char category, action; -+ unsigned short tid, status, reason_code = 0; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+#ifdef CONFIG_80211N_HT -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ /* check RA matches or not */ -+ if (!_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(pframe), ETH_ALEN)) -+ return _SUCCESS; -+ -+#if 0 -+ /* check A1 matches or not */ -+ if (!_rtw_memcmp(adapter_mac_addr(padapter), get_da(pframe), ETH_ALEN)) -+ return _SUCCESS; -+#endif -+ -+ if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) -+ if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) -+ return _SUCCESS; -+ -+ addr = get_addr2_ptr(pframe); -+ psta = rtw_get_stainfo(pstapriv, addr); -+ -+ if (psta == NULL) -+ return _SUCCESS; -+ -+ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+ category = frame_body[0]; -+ if (category == RTW_WLAN_CATEGORY_BACK) { /* representing Block Ack */ -+#ifdef CONFIG_TDLS -+ if ((psta->tdls_sta_state & TDLS_LINKED_STATE) && -+ (psta->htpriv.ht_option == _TRUE) && -+ (psta->htpriv.ampdu_enable == _TRUE)) -+ RTW_INFO("Recv [%s] from direc link\n", __FUNCTION__); -+ else -+#endif /* CONFIG_TDLS */ -+ if (!pmlmeinfo->HT_enable) -+ return _SUCCESS; -+ -+ action = frame_body[1]; -+ RTW_INFO("%s, action=%d\n", __FUNCTION__, action); -+ switch (action) { -+ case RTW_WLAN_ACTION_ADDBA_REQ: /* ADDBA request */ -+ -+ _rtw_memcpy(&(pmlmeinfo->ADDBA_req), &(frame_body[2]), sizeof(struct ADDBA_request)); -+ /* process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), GetAddr3Ptr(pframe)); */ -+ process_addba_req(padapter, (u8 *)&(pmlmeinfo->ADDBA_req), addr); -+ -+ break; -+ -+ case RTW_WLAN_ACTION_ADDBA_RESP: /* ADDBA response */ -+ -+ /* status = frame_body[3] | (frame_body[4] << 8); */ /* endian issue */ -+ status = RTW_GET_LE16(&frame_body[3]); -+ tid = ((frame_body[5] >> 2) & 0x7); -+ if (status == 0) { -+ /* successful */ -+ RTW_INFO("agg_enable for TID=%d\n", tid); -+ psta->htpriv.agg_enable_bitmap |= 1 << tid; -+ psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); -+ /* amsdu in ampdu */ -+ if (pregpriv->tx_ampdu_amsdu == 0) -+ psta->htpriv.tx_amsdu_enable = _FALSE; -+ else if (pregpriv->tx_ampdu_amsdu == 1) -+ psta->htpriv.tx_amsdu_enable = _TRUE; -+ else { -+ if (frame_body[5] & 1) -+ psta->htpriv.tx_amsdu_enable = _TRUE; -+ } -+ } else -+ psta->htpriv.agg_enable_bitmap &= ~BIT(tid); -+ -+ #ifdef CONFIG_AP_MODE -+ if (psta->state & WIFI_STA_ALIVE_CHK_STATE) { -+ RTW_INFO("%s alive check - rx ADDBA response\n", __func__); -+ psta->htpriv.agg_enable_bitmap &= ~BIT(tid); -+ psta->expire_to = pstapriv->expire_to; -+ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; -+ } -+ #endif -+ -+ /* RTW_INFO("marc: ADDBA RSP: %x\n", pmlmeinfo->agg_enable_bitmap); */ -+ break; -+ -+ case RTW_WLAN_ACTION_DELBA: /* DELBA */ -+ if ((frame_body[3] & BIT(3)) == 0) { -+ psta->htpriv.agg_enable_bitmap &= ~(1 << ((frame_body[3] >> 4) & 0xf)); -+ psta->htpriv.candidate_tid_bitmap &= ~(1 << ((frame_body[3] >> 4) & 0xf)); -+ -+ /* reason_code = frame_body[4] | (frame_body[5] << 8); */ -+ reason_code = RTW_GET_LE16(&frame_body[4]); -+ } else if ((frame_body[3] & BIT(3)) == BIT(3)) { -+ tid = (frame_body[3] >> 4) & 0x0F; -+ -+ preorder_ctrl = &psta->recvreorder_ctrl[tid]; -+ preorder_ctrl->enable = _FALSE; -+ preorder_ctrl->ampdu_size = RX_AMPDU_SIZE_INVALID; -+ } -+ -+ RTW_INFO("%s(): DELBA: %x(%x)\n", __FUNCTION__, pmlmeinfo->agg_enable_bitmap, reason_code); -+ /* todo: how to notify the host while receiving DELETE BA */ -+ break; -+ -+ default: -+ break; -+ } -+ } -+#endif /* CONFIG_80211N_HT */ -+ return _SUCCESS; -+} -+ -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+u32 rtw_build_vendor_ie(_adapter *padapter , unsigned char **pframe , u8 mgmt_frame_tyte) -+{ -+ int vendor_ie_num = 0; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u32 len = 0; -+ -+ for (vendor_ie_num = 0 ; vendor_ie_num < WLAN_MAX_VENDOR_IE_NUM ; vendor_ie_num++) { -+ if (pmlmepriv->vendor_ielen[vendor_ie_num] > 0 && pmlmepriv->vendor_ie_mask[vendor_ie_num] & mgmt_frame_tyte) { -+ _rtw_memcpy(*pframe , pmlmepriv->vendor_ie[vendor_ie_num] , pmlmepriv->vendor_ielen[vendor_ie_num]); -+ *pframe += pmlmepriv->vendor_ielen[vendor_ie_num]; -+ len += pmlmepriv->vendor_ielen[vendor_ie_num]; -+ } -+ } -+ -+ return len; -+} -+#endif -+ -+#ifdef CONFIG_P2P -+int get_reg_classes_full_count(struct p2p_channels *channel_list) -+{ -+ int cnt = 0; -+ int i; -+ -+ for (i = 0; i < channel_list->reg_classes; i++) -+ cnt += channel_list->reg_class[i].channels; -+ -+ return cnt; -+} -+ -+void issue_p2p_GO_request(_adapter *padapter, u8 *raddr) -+{ -+ struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list); -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_GO_NEGO_REQ; -+ u8 wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 }; -+ u8 wpsielen = 0, p2pielen = 0; -+ u16 len_channellist_attr = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ RTW_INFO("[%s] In\n", __FUNCTION__); -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pwdinfo->negotiation_dialog_token = 1; /* Initialize the dialog value */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &pwdinfo->negotiation_dialog_token, &(pattrib->pktlen)); -+ -+ -+ -+ /* WPS Section */ -+ wpsielen = 0; -+ /* WPS OUI */ -+ *(u32 *)(wpsie) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* WPS version */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -+ -+ /* Device Password ID */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_DEVICE_PWID); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0002); -+ wpsielen += 2; -+ -+ /* Value: */ -+ -+ if (pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PEER_DISPLAY_PIN) -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_DPID_USER_SPEC); -+ else if (pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_SELF_DISPLAY_PIN) -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_DPID_REGISTRAR_SPEC); -+ else if (pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC) -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_DPID_PBC); -+ -+ wpsielen += 2; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen); -+ -+ -+ /* P2P IE Section. */ -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20110306 */ -+ /* According to the P2P Specification, the group negoitation request frame should contain 9 P2P attributes */ -+ /* 1. P2P Capability */ -+ /* 2. Group Owner Intent */ -+ /* 3. Configuration Timeout */ -+ /* 4. Listen Channel */ -+ /* 5. Extended Listen Timing */ -+ /* 6. Intended P2P Interface Address */ -+ /* 7. Channel List */ -+ /* 8. P2P Device Info */ -+ /* 9. Operating Channel */ -+ -+ -+ /* P2P Capability */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CAPABILITY; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Device Capability Bitmap, 1 byte */ -+ p2pie[p2pielen++] = DMP_P2P_DEVCAP_SUPPORT; -+ -+ /* Group Capability Bitmap, 1 byte */ -+ if (pwdinfo->persistent_supported) -+ p2pie[p2pielen++] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP; -+ else -+ p2pie[p2pielen++] = P2P_GRPCAP_CROSS_CONN; -+ -+ -+ /* Group Owner Intent */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GO_INTENT; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0001); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Todo the tie breaker bit. */ -+ p2pie[p2pielen++] = ((pwdinfo->intent << 1) & 0xFE); -+ -+ /* Configuration Timeout */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CONF_TIMEOUT; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P GO */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P Client */ -+ -+ -+ /* Listen Channel */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_LISTEN_CH; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; /* Copy from SD7 */ -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = pwdinfo->listen_channel; /* listening channel number */ -+ -+ -+ /* Extended Listen Timing ATTR */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_EX_LISTEN_TIMING; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0004); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Availability Period */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0xFFFF); -+ p2pielen += 2; -+ -+ /* Availability Interval */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0xFFFF); -+ p2pielen += 2; -+ -+ -+ /* Intended P2P Interface Address */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_INTENDED_IF_ADDR; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ -+ /* Channel List */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CH_LIST; -+ -+ /* Length: */ -+ /* Country String(3) */ -+ /* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */ -+ /* + number of channels in all classes */ -+ len_channellist_attr = 3 -+ + (1 + 1) * (u16)(ch_list->reg_classes) -+ + get_reg_classes_full_count(ch_list); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(5 + 1); -+ else -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+#else -+ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+ -+#endif -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Channel Entry List */ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ -+ /* Operating Class */ -+ if (union_ch > 14) { -+ if (union_ch >= 149) -+ p2pie[p2pielen++] = 0x7c; -+ else -+ p2pie[p2pielen++] = 0x73; -+ } else -+ p2pie[p2pielen++] = 0x51; -+ -+ -+ /* Number of Channels */ -+ /* Just support 1 channel and this channel is AP's channel */ -+ p2pie[p2pielen++] = 1; -+ -+ /* Channel List */ -+ p2pie[p2pielen++] = union_ch; -+ } else -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ int i, j; -+ for (j = 0; j < ch_list->reg_classes; j++) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].reg_class; -+ -+ /* Number of Channels */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].channels; -+ -+ /* Channel List */ -+ for (i = 0; i < ch_list->reg_class[j].channels; i++) -+ p2pie[p2pielen++] = ch_list->reg_class[j].channel[i]; -+ } -+ } -+ -+ /* Device Info */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* 21->P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) */ -+ /* + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(21 + pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address */ -+ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* Config Method */ -+ /* This field should be big endian. Noted by P2P specification. */ -+ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(pwdinfo->supported_wps_cm); -+ -+ p2pielen += 2; -+ -+ /* Primary Device Type */ -+ /* Category ID */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_PDT_CID_MULIT_MEDIA); -+ p2pielen += 2; -+ -+ /* OUI */ -+ *(u32 *)(p2pie + p2pielen) = cpu_to_be32(WPSOUI); -+ p2pielen += 4; -+ -+ /* Sub Category ID */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_PDT_SCID_MEDIA_SERVER); -+ p2pielen += 2; -+ -+ /* Number of Secondary Device Types */ -+ p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */ -+ -+ /* Device Name */ -+ /* Type: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); -+ p2pielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len); -+ p2pielen += pwdinfo->device_name_len; -+ -+ -+ /* Operating Channel */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_OPERATING_CH; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Operating Class */ -+ if (pwdinfo->operating_channel <= 14) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; -+ } else if ((pwdinfo->operating_channel >= 36) && (pwdinfo->operating_channel <= 48)) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x73; -+ } else { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x7c; -+ } -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = pwdinfo->operating_channel; /* operating channel number */ -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen); -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_nego_req_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return; -+ -+} -+ -+ -+void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint len, u8 result) -+{ -+ struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list); -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_GO_NEGO_RESP; -+ u8 wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 }; -+ u8 p2pielen = 0; -+ uint wpsielen = 0; -+ u16 wps_devicepassword_id = 0x0000; -+ uint wps_devicepassword_id_len = 0; -+ u16 len_channellist_attr = 0; -+ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ RTW_INFO("[%s] In, result = %d\n", __FUNCTION__, result); -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pwdinfo->negotiation_dialog_token = frame_body[7]; /* The Dialog Token of provisioning discovery request frame. */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(pwdinfo->negotiation_dialog_token), &(pattrib->pktlen)); -+ -+ /* Commented by Albert 20110328 */ -+ /* Try to get the device password ID from the WPS IE of group negotiation request frame */ -+ /* WiFi Direct test plan 5.1.15 */ -+ rtw_get_wps_ie(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); -+ rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8 *) &wps_devicepassword_id, &wps_devicepassword_id_len); -+ wps_devicepassword_id = be16_to_cpu(wps_devicepassword_id); -+ -+ _rtw_memset(wpsie, 0x00, 255); -+ wpsielen = 0; -+ -+ /* WPS Section */ -+ wpsielen = 0; -+ /* WPS OUI */ -+ *(u32 *)(wpsie) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* WPS version */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -+ -+ /* Device Password ID */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_DEVICE_PWID); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0002); -+ wpsielen += 2; -+ -+ /* Value: */ -+ if (wps_devicepassword_id == WPS_DPID_USER_SPEC) -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_DPID_REGISTRAR_SPEC); -+ else if (wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_DPID_USER_SPEC); -+ else -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_DPID_PBC); -+ wpsielen += 2; -+ -+ /* Commented by Kurt 20120113 */ -+ /* If some device wants to do p2p handshake without sending prov_disc_req */ -+ /* We have to get peer_req_cm from here. */ -+ if (_rtw_memcmp(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "000", 3)) { -+ if (wps_devicepassword_id == WPS_DPID_USER_SPEC) -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3); -+ else if (wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3); -+ else -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3); -+ } -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen); -+ -+ -+ /* P2P IE Section. */ -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20100908 */ -+ /* According to the P2P Specification, the group negoitation response frame should contain 9 P2P attributes */ -+ /* 1. Status */ -+ /* 2. P2P Capability */ -+ /* 3. Group Owner Intent */ -+ /* 4. Configuration Timeout */ -+ /* 5. Operating Channel */ -+ /* 6. Intended P2P Interface Address */ -+ /* 7. Channel List */ -+ /* 8. Device Info */ -+ /* 9. Group ID ( Only GO ) */ -+ -+ -+ /* ToDo: */ -+ -+ /* P2P Status */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_STATUS; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0001); -+ p2pielen += 2; -+ -+ /* Value: */ -+ p2pie[p2pielen++] = result; -+ -+ /* P2P Capability */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CAPABILITY; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Device Capability Bitmap, 1 byte */ -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) { -+ /* Commented by Albert 2011/03/08 */ -+ /* According to the P2P specification */ -+ /* if the sending device will be client, the P2P Capability should be reserved of group negotation response frame */ -+ p2pie[p2pielen++] = 0; -+ } else { -+ /* Be group owner or meet the error case */ -+ p2pie[p2pielen++] = DMP_P2P_DEVCAP_SUPPORT; -+ } -+ -+ /* Group Capability Bitmap, 1 byte */ -+ if (pwdinfo->persistent_supported) -+ p2pie[p2pielen++] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP; -+ else -+ p2pie[p2pielen++] = P2P_GRPCAP_CROSS_CONN; -+ -+ /* Group Owner Intent */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GO_INTENT; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0001); -+ p2pielen += 2; -+ -+ /* Value: */ -+ if (pwdinfo->peer_intent & 0x01) { -+ /* Peer's tie breaker bit is 1, our tie breaker bit should be 0 */ -+ p2pie[p2pielen++] = (pwdinfo->intent << 1); -+ } else { -+ /* Peer's tie breaker bit is 0, our tie breaker bit should be 1 */ -+ p2pie[p2pielen++] = ((pwdinfo->intent << 1) | BIT(0)); -+ } -+ -+ -+ /* Configuration Timeout */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CONF_TIMEOUT; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P GO */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P Client */ -+ -+ /* Operating Channel */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_OPERATING_CH; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Operating Class */ -+ if (pwdinfo->operating_channel <= 14) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; -+ } else if ((pwdinfo->operating_channel >= 36) && (pwdinfo->operating_channel <= 48)) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x73; -+ } else { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x7c; -+ } -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = pwdinfo->operating_channel; /* operating channel number */ -+ -+ /* Intended P2P Interface Address */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_INTENDED_IF_ADDR; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* Channel List */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CH_LIST; -+ -+ /* Country String(3) */ -+ /* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */ -+ /* + number of channels in all classes */ -+ len_channellist_attr = 3 -+ + (1 + 1) * (u16)ch_list->reg_classes -+ + get_reg_classes_full_count(ch_list); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(5 + 1); -+ else -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+#else -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+ -+#endif -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Channel Entry List */ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { -+ -+ u8 union_chan = rtw_mi_get_union_chan(padapter); -+ -+ /*Operating Class*/ -+ if (union_chan > 14) { -+ if (union_chan >= 149) -+ p2pie[p2pielen++] = 0x7c; -+ else -+ p2pie[p2pielen++] = 0x73; -+ -+ } else -+ p2pie[p2pielen++] = 0x51; -+ -+ /* Number of Channels -+ Just support 1 channel and this channel is AP's channel*/ -+ p2pie[p2pielen++] = 1; -+ -+ /*Channel List*/ -+ p2pie[p2pielen++] = union_chan; -+ } else -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ int i, j; -+ for (j = 0; j < ch_list->reg_classes; j++) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].reg_class; -+ -+ /* Number of Channels */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].channels; -+ -+ /* Channel List */ -+ for (i = 0; i < ch_list->reg_class[j].channels; i++) -+ p2pie[p2pielen++] = ch_list->reg_class[j].channel[i]; -+ } -+ } -+ -+ /* Device Info */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* 21->P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) */ -+ /* + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(21 + pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address */ -+ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* Config Method */ -+ /* This field should be big endian. Noted by P2P specification. */ -+ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(pwdinfo->supported_wps_cm); -+ -+ p2pielen += 2; -+ -+ /* Primary Device Type */ -+ /* Category ID */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_PDT_CID_MULIT_MEDIA); -+ p2pielen += 2; -+ -+ /* OUI */ -+ *(u32 *)(p2pie + p2pielen) = cpu_to_be32(WPSOUI); -+ p2pielen += 4; -+ -+ /* Sub Category ID */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_PDT_SCID_MEDIA_SERVER); -+ p2pielen += 2; -+ -+ /* Number of Secondary Device Types */ -+ p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */ -+ -+ /* Device Name */ -+ /* Type: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); -+ p2pielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len); -+ p2pielen += pwdinfo->device_name_len; -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ /* Group ID Attribute */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GROUP_ID; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN + pwdinfo->nego_ssidlen); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* p2P Device Address */ -+ _rtw_memcpy(p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* SSID */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen); -+ p2pielen += pwdinfo->nego_ssidlen; -+ -+ } -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen); -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_nego_resp_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return; -+ -+} -+ -+void issue_p2p_GO_confirm(_adapter *padapter, u8 *raddr, u8 result) -+{ -+ -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_GO_NEGO_CONF; -+ u8 p2pie[255] = { 0x00 }; -+ u8 p2pielen = 0; -+ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ RTW_INFO("[%s] In\n", __FUNCTION__); -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(pwdinfo->negotiation_dialog_token), &(pattrib->pktlen)); -+ -+ -+ -+ /* P2P IE Section. */ -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20110306 */ -+ /* According to the P2P Specification, the group negoitation request frame should contain 5 P2P attributes */ -+ /* 1. Status */ -+ /* 2. P2P Capability */ -+ /* 3. Operating Channel */ -+ /* 4. Channel List */ -+ /* 5. Group ID ( if this WiFi is GO ) */ -+ -+ /* P2P Status */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_STATUS; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0001); -+ p2pielen += 2; -+ -+ /* Value: */ -+ p2pie[p2pielen++] = result; -+ -+ /* P2P Capability */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CAPABILITY; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Device Capability Bitmap, 1 byte */ -+ p2pie[p2pielen++] = DMP_P2P_DEVCAP_SUPPORT; -+ -+ /* Group Capability Bitmap, 1 byte */ -+ if (pwdinfo->persistent_supported) -+ p2pie[p2pielen++] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP; -+ else -+ p2pie[p2pielen++] = P2P_GRPCAP_CROSS_CONN; -+ -+ -+ /* Operating Channel */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_OPERATING_CH; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) { -+ if (pwdinfo->peer_operating_ch <= 14) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; -+ } else if ((pwdinfo->peer_operating_ch >= 36) && (pwdinfo->peer_operating_ch <= 48)) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x73; -+ } else { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x7c; -+ } -+ -+ p2pie[p2pielen++] = pwdinfo->peer_operating_ch; -+ } else { -+ if (pwdinfo->operating_channel <= 14) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; -+ } else if ((pwdinfo->operating_channel >= 36) && (pwdinfo->operating_channel <= 48)) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x73; -+ } else { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x7c; -+ } -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = pwdinfo->operating_channel; /* Use the listen channel as the operating channel */ -+ } -+ -+ -+ /* Channel List */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CH_LIST; -+ -+ *(u16 *)(p2pie + p2pielen) = 6; -+ p2pielen += 2; -+ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Value: */ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) { -+ if (pwdinfo->peer_operating_ch <= 14) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; -+ } else if ((pwdinfo->peer_operating_ch >= 36) && (pwdinfo->peer_operating_ch <= 48)) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x73; -+ } else { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x7c; -+ } -+ p2pie[p2pielen++] = 1; -+ p2pie[p2pielen++] = pwdinfo->peer_operating_ch; -+ } else { -+ if (pwdinfo->operating_channel <= 14) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; -+ } else if ((pwdinfo->operating_channel >= 36) && (pwdinfo->operating_channel <= 48)) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x73; -+ } else { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x7c; -+ } -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = 1; -+ p2pie[p2pielen++] = pwdinfo->operating_channel; /* Use the listen channel as the operating channel */ -+ } -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ /* Group ID Attribute */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GROUP_ID; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN + pwdinfo->nego_ssidlen); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* p2P Device Address */ -+ _rtw_memcpy(p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* SSID */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen); -+ p2pielen += pwdinfo->nego_ssidlen; -+ } -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen); -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_nego_confirm_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return; -+ -+} -+ -+void issue_p2p_invitation_request(_adapter *padapter, u8 *raddr) -+{ -+ struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list); -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_INVIT_REQ; -+ u8 p2pie[255] = { 0x00 }; -+ u8 p2pielen = 0; -+ u8 dialogToken = 3; -+ u16 len_channellist_attr = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, raddr, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); -+ -+ /* P2P IE Section. */ -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20101011 */ -+ /* According to the P2P Specification, the P2P Invitation request frame should contain 7 P2P attributes */ -+ /* 1. Configuration Timeout */ -+ /* 2. Invitation Flags */ -+ /* 3. Operating Channel ( Only GO ) */ -+ /* 4. P2P Group BSSID ( Should be included if I am the GO ) */ -+ /* 5. Channel List */ -+ /* 6. P2P Group ID */ -+ /* 7. P2P Device Info */ -+ -+ /* Configuration Timeout */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CONF_TIMEOUT; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P GO */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P Client */ -+ -+ /* Invitation Flags */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_INVITATION_FLAGS; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0001); -+ p2pielen += 2; -+ -+ /* Value: */ -+ p2pie[p2pielen++] = P2P_INVITATION_FLAGS_PERSISTENT; -+ -+ -+ /* Operating Channel */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_OPERATING_CH; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Operating Class */ -+ if (pwdinfo->invitereq_info.operating_ch <= 14) -+ p2pie[p2pielen++] = 0x51; -+ else if ((pwdinfo->invitereq_info.operating_ch >= 36) && (pwdinfo->invitereq_info.operating_ch <= 48)) -+ p2pie[p2pielen++] = 0x73; -+ else -+ p2pie[p2pielen++] = 0x7c; -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = pwdinfo->invitereq_info.operating_ch; /* operating channel number */ -+ -+ if (_rtw_memcmp(adapter_mac_addr(padapter), pwdinfo->invitereq_info.go_bssid, ETH_ALEN)) { -+ /* P2P Group BSSID */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GROUP_BSSID; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address for GO */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->invitereq_info.go_bssid, ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ } -+ -+ /* Channel List */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CH_LIST; -+ -+ -+ /* Length: */ -+ /* Country String(3) */ -+ /* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */ -+ /* + number of channels in all classes */ -+ len_channellist_attr = 3 -+ + (1 + 1) * (u16)ch_list->reg_classes -+ + get_reg_classes_full_count(ch_list); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(5 + 1); -+ else -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+#else -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+#endif -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Channel Entry List */ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ -+ /* Operating Class */ -+ if (union_ch > 14) { -+ if (union_ch >= 149) -+ p2pie[p2pielen++] = 0x7c; -+ else -+ p2pie[p2pielen++] = 0x73; -+ } else -+ p2pie[p2pielen++] = 0x51; -+ -+ -+ /* Number of Channels */ -+ /* Just support 1 channel and this channel is AP's channel */ -+ p2pie[p2pielen++] = 1; -+ -+ /* Channel List */ -+ p2pie[p2pielen++] = union_ch; -+ } else -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ int i, j; -+ for (j = 0; j < ch_list->reg_classes; j++) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].reg_class; -+ -+ /* Number of Channels */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].channels; -+ -+ /* Channel List */ -+ for (i = 0; i < ch_list->reg_class[j].channels; i++) -+ p2pie[p2pielen++] = ch_list->reg_class[j].channel[i]; -+ } -+ } -+ -+ -+ /* P2P Group ID */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GROUP_ID; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(6 + pwdinfo->invitereq_info.ssidlen); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address for GO */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->invitereq_info.go_bssid, ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* SSID */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->invitereq_info.go_ssid, pwdinfo->invitereq_info.ssidlen); -+ p2pielen += pwdinfo->invitereq_info.ssidlen; -+ -+ -+ /* Device Info */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* 21->P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) */ -+ /* + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(21 + pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address */ -+ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* Config Method */ -+ /* This field should be big endian. Noted by P2P specification. */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_CONFIG_METHOD_DISPLAY); -+ p2pielen += 2; -+ -+ /* Primary Device Type */ -+ /* Category ID */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_PDT_CID_MULIT_MEDIA); -+ p2pielen += 2; -+ -+ /* OUI */ -+ *(u32 *)(p2pie + p2pielen) = cpu_to_be32(WPSOUI); -+ p2pielen += 4; -+ -+ /* Sub Category ID */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_PDT_SCID_MEDIA_SERVER); -+ p2pielen += 2; -+ -+ /* Number of Secondary Device Types */ -+ p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */ -+ -+ /* Device Name */ -+ /* Type: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); -+ p2pielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len); -+ p2pielen += pwdinfo->device_name_len; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen); -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_invitation_req_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return; -+ -+} -+ -+void issue_p2p_invitation_response(_adapter *padapter, u8 *raddr, u8 dialogToken, u8 status_code) -+{ -+ struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list); -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_INVIT_RESP; -+ u8 p2pie[255] = { 0x00 }; -+ u8 p2pielen = 0; -+ u16 len_channellist_attr = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, raddr, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); -+ -+ /* P2P IE Section. */ -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20101005 */ -+ /* According to the P2P Specification, the P2P Invitation response frame should contain 5 P2P attributes */ -+ /* 1. Status */ -+ /* 2. Configuration Timeout */ -+ /* 3. Operating Channel ( Only GO ) */ -+ /* 4. P2P Group BSSID ( Only GO ) */ -+ /* 5. Channel List */ -+ -+ /* P2P Status */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_STATUS; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0001); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* When status code is P2P_STATUS_FAIL_INFO_UNAVAILABLE. */ -+ /* Sent the event receiving the P2P Invitation Req frame to DMP UI. */ -+ /* DMP had to compare the MAC address to find out the profile. */ -+ /* So, the WiFi driver will send the P2P_STATUS_FAIL_INFO_UNAVAILABLE to NB. */ -+ /* If the UI found the corresponding profile, the WiFi driver sends the P2P Invitation Req */ -+ /* to NB to rebuild the persistent group. */ -+ p2pie[p2pielen++] = status_code; -+ -+ /* Configuration Timeout */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CONF_TIMEOUT; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P GO */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P Client */ -+ -+ if (status_code == P2P_STATUS_SUCCESS) { -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ /* The P2P Invitation request frame asks this Wi-Fi device to be the P2P GO */ -+ /* In this case, the P2P Invitation response frame should carry the two more P2P attributes. */ -+ /* First one is operating channel attribute. */ -+ /* Second one is P2P Group BSSID attribute. */ -+ -+ /* Operating Channel */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_OPERATING_CH; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; /* Copy from SD7 */ -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = pwdinfo->operating_channel; /* operating channel number */ -+ -+ -+ /* P2P Group BSSID */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GROUP_BSSID; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address for GO */ -+ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ } -+ -+ /* Channel List */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CH_LIST; -+ -+ /* Length: */ -+ /* Country String(3) */ -+ /* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */ -+ /* + number of channels in all classes */ -+ len_channellist_attr = 3 -+ + (1 + 1) * (u16)ch_list->reg_classes -+ + get_reg_classes_full_count(ch_list); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(5 + 1); -+ else -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+#else -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+#endif -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Channel Entry List */ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ -+ /* Operating Class */ -+ if (union_ch > 14) { -+ if (union_ch >= 149) -+ p2pie[p2pielen++] = 0x7c; -+ else -+ p2pie[p2pielen++] = 0x73; -+ } else -+ p2pie[p2pielen++] = 0x51; -+ -+ -+ /* Number of Channels */ -+ /* Just support 1 channel and this channel is AP's channel */ -+ p2pie[p2pielen++] = 1; -+ -+ /* Channel List */ -+ p2pie[p2pielen++] = union_ch; -+ } else -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ int i, j; -+ for (j = 0; j < ch_list->reg_classes; j++) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].reg_class; -+ -+ /* Number of Channels */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].channels; -+ -+ /* Channel List */ -+ for (i = 0; i < ch_list->reg_class[j].channels; i++) -+ p2pie[p2pielen++] = ch_list->reg_class[j].channel[i]; -+ } -+ } -+ } -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen); -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_invitation_resp_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return; -+ -+} -+ -+void issue_p2p_provision_request(_adapter *padapter, u8 *pssid, u8 ussidlen, u8 *pdev_raddr) -+{ -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u8 dialogToken = 1; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_PROVISION_DISC_REQ; -+ u8 wpsie[100] = { 0x00 }; -+ u8 wpsielen = 0; -+ u32 p2pielen = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ RTW_INFO("[%s] In\n", __FUNCTION__); -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, pdev_raddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pdev_raddr, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); -+ -+ p2pielen = build_prov_disc_request_p2p_ie(pwdinfo, pframe, pssid, ussidlen, pdev_raddr); -+ -+ pframe += p2pielen; -+ pattrib->pktlen += p2pielen; -+ -+ wpsielen = 0; -+ /* WPS OUI */ -+ *(u32 *)(wpsie) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* WPS version */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -+ -+ /* Config Method */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_CONF_METHOD); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0002); -+ wpsielen += 2; -+ -+ /* Value: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(pwdinfo->tx_prov_disc_info.wps_config_method_request); -+ wpsielen += 2; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen); -+ -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return; -+ -+} -+ -+ -+u8 is_matched_in_profilelist(u8 *peermacaddr, struct profile_info *profileinfo) -+{ -+ u8 i, match_result = 0; -+ -+ RTW_INFO("[%s] peermac = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, -+ peermacaddr[0], peermacaddr[1], peermacaddr[2], peermacaddr[3], peermacaddr[4], peermacaddr[5]); -+ -+ for (i = 0; i < P2P_MAX_PERSISTENT_GROUP_NUM; i++, profileinfo++) { -+ RTW_INFO("[%s] profileinfo_mac = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, -+ profileinfo->peermac[0], profileinfo->peermac[1], profileinfo->peermac[2], profileinfo->peermac[3], profileinfo->peermac[4], profileinfo->peermac[5]); -+ if (_rtw_memcmp(peermacaddr, profileinfo->peermac, ETH_ALEN)) { -+ match_result = 1; -+ RTW_INFO("[%s] Match!\n", __FUNCTION__); -+ break; -+ } -+ } -+ -+ return match_result ; -+} -+ -+void issue_probersp_p2p(_adapter *padapter, unsigned char *da) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ unsigned char *mac; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ /* WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); */ -+ u16 beacon_interval = 100; -+ u16 capInfo = 0; -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 wpsie[255] = { 0x00 }; -+ u32 wpsielen = 0, p2pielen = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ if (IS_CCK_RATE(pattrib->rate)) { -+ /* force OFDM 6M rate */ -+ pattrib->rate = MGN_6M; -+ pattrib->raid = rtw_get_mgntframe_raid(padapter, WIRELESS_11G); -+ } -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ mac = adapter_mac_addr(padapter); -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); -+ -+ /* Use the device address for BSSID field. */ -+ _rtw_memcpy(pwlanhdr->addr3, mac, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(fctrl, WIFI_PROBERSP); -+ -+ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = pattrib->hdrlen; -+ pframe += pattrib->hdrlen; -+ -+ /* timestamp will be inserted by hardware */ -+ pframe += 8; -+ pattrib->pktlen += 8; -+ -+ /* beacon interval: 2 bytes */ -+ _rtw_memcpy(pframe, (unsigned char *) &beacon_interval, 2); -+ pframe += 2; -+ pattrib->pktlen += 2; -+ -+ /* capability info: 2 bytes */ -+ /* ESS and IBSS bits must be 0 (defined in the 3.1.2.1.1 of WiFi Direct Spec) */ -+ capInfo |= cap_ShortPremble; -+ capInfo |= cap_ShortSlot; -+ -+ _rtw_memcpy(pframe, (unsigned char *) &capInfo, 2); -+ pframe += 2; -+ pattrib->pktlen += 2; -+ -+ -+ /* SSID */ -+ pframe = rtw_set_ie(pframe, _SSID_IE_, 7, pwdinfo->p2p_wildcard_ssid, &pattrib->pktlen); -+ -+ /* supported rates... */ -+ /* Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) */ -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pattrib->pktlen); -+ -+ /* DS parameter set */ -+ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&pwdinfo->listen_channel, &pattrib->pktlen); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (pmlmepriv->wps_probe_resp_ie != NULL && pmlmepriv->p2p_probe_resp_ie != NULL) { -+ /* WPS IE */ -+ _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len); -+ pattrib->pktlen += pmlmepriv->wps_probe_resp_ie_len; -+ pframe += pmlmepriv->wps_probe_resp_ie_len; -+ -+ /* P2P IE */ -+ _rtw_memcpy(pframe, pmlmepriv->p2p_probe_resp_ie, pmlmepriv->p2p_probe_resp_ie_len); -+ pattrib->pktlen += pmlmepriv->p2p_probe_resp_ie_len; -+ pframe += pmlmepriv->p2p_probe_resp_ie_len; -+ } -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ -+ /* Todo: WPS IE */ -+ /* Noted by Albert 20100907 */ -+ /* According to the WPS specification, all the WPS attribute is presented by Big Endian. */ -+ -+ wpsielen = 0; -+ /* WPS OUI */ -+ *(u32 *)(wpsie) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* WPS version */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -+ -+ /* WiFi Simple Config State */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_SIMPLE_CONF_STATE); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_WSC_STATE_NOT_CONFIG; /* Not Configured. */ -+ -+ /* Response Type */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_RESP_TYPE); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_RESPONSE_TYPE_8021X; -+ -+ /* UUID-E */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_UUID_E); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0010); -+ wpsielen += 2; -+ -+ /* Value: */ -+ if (pwdinfo->external_uuid == 0) { -+ _rtw_memset(wpsie + wpsielen, 0x0, 16); -+ _rtw_memcpy(wpsie + wpsielen, mac, ETH_ALEN); -+ } else -+ _rtw_memcpy(wpsie + wpsielen, pwdinfo->uuid, 0x10); -+ wpsielen += 0x10; -+ -+ /* Manufacturer */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_MANUFACTURER); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0007); -+ wpsielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(wpsie + wpsielen, "Realtek", 7); -+ wpsielen += 7; -+ -+ /* Model Name */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_MODEL_NAME); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0006); -+ wpsielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(wpsie + wpsielen, "8192CU", 6); -+ wpsielen += 6; -+ -+ /* Model Number */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_MODEL_NUMBER); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = 0x31; /* character 1 */ -+ -+ /* Serial Number */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_SERIAL_NUMBER); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(ETH_ALEN); -+ wpsielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(wpsie + wpsielen, "123456" , ETH_ALEN); -+ wpsielen += ETH_ALEN; -+ -+ /* Primary Device Type */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_PRIMARY_DEV_TYPE); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0008); -+ wpsielen += 2; -+ -+ /* Value: */ -+ /* Category ID */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_CID_MULIT_MEDIA); -+ wpsielen += 2; -+ -+ /* OUI */ -+ *(u32 *)(wpsie + wpsielen) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* Sub Category ID */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_SCID_MEDIA_SERVER); -+ wpsielen += 2; -+ -+ /* Device Name */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(pwdinfo->device_name_len); -+ wpsielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len); -+ wpsielen += pwdinfo->device_name_len; -+ -+ /* Config Method */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_CONF_METHOD); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0002); -+ wpsielen += 2; -+ -+ /* Value: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(pwdinfo->supported_wps_cm); -+ wpsielen += 2; -+ -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen); -+ -+ -+ p2pielen = build_probe_resp_p2p_ie(pwdinfo, pframe); -+ pframe += p2pielen; -+ pattrib->pktlen += p2pielen; -+ } -+ -+#ifdef CONFIG_WFD -+ wfdielen = rtw_append_probe_resp_wfd_ie(padapter, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+/* Vendor Specific IE */ -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_P2P_PROBERESP_VENDOR_IE_BIT); -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return; -+ -+} -+ -+int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack) -+{ -+ int ret = _FAIL; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ unsigned char *mac; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 }; -+ u16 wpsielen = 0, p2pielen = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ if (IS_CCK_RATE(pattrib->rate)) { -+ /* force OFDM 6M rate */ -+ pattrib->rate = MGN_6M; -+ pattrib->raid = rtw_get_mgntframe_raid(padapter, WIRELESS_11G); -+ } -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ mac = adapter_mac_addr(padapter); -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ if (da) { -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, da, ETH_ALEN); -+ } else { -+ if ((pwdinfo->p2p_info.scan_op_ch_only) || (pwdinfo->rx_invitereq_info.scan_op_ch_only)) { -+ /* This two flags will be set when this is only the P2P client mode. */ -+ _rtw_memcpy(pwlanhdr->addr1, pwdinfo->p2p_peer_interface_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->p2p_peer_interface_addr, ETH_ALEN); -+ } else { -+ /* broadcast probe request frame */ -+ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); -+ } -+ } -+ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_PROBEREQ); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) -+ pframe = rtw_set_ie(pframe, _SSID_IE_, pwdinfo->tx_prov_disc_info.ssid.SsidLength, pwdinfo->tx_prov_disc_info.ssid.Ssid, &(pattrib->pktlen)); -+ else -+ pframe = rtw_set_ie(pframe, _SSID_IE_, P2P_WILDCARD_SSID_LEN, pwdinfo->p2p_wildcard_ssid, &(pattrib->pktlen)); -+ /* Use the OFDM rate in the P2P probe request frame. ( 6(B), 9(B), 12(B), 24(B), 36, 48, 54 ) */ -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pattrib->pktlen); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (pmlmepriv->wps_probe_req_ie != NULL && pmlmepriv->p2p_probe_req_ie != NULL) { -+ /* WPS IE */ -+ _rtw_memcpy(pframe, pmlmepriv->wps_probe_req_ie, pmlmepriv->wps_probe_req_ie_len); -+ pattrib->pktlen += pmlmepriv->wps_probe_req_ie_len; -+ pframe += pmlmepriv->wps_probe_req_ie_len; -+ -+ /* P2P IE */ -+ _rtw_memcpy(pframe, pmlmepriv->p2p_probe_req_ie, pmlmepriv->p2p_probe_req_ie_len); -+ pattrib->pktlen += pmlmepriv->p2p_probe_req_ie_len; -+ pframe += pmlmepriv->p2p_probe_req_ie_len; -+ } -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ -+ /* WPS IE */ -+ /* Noted by Albert 20110221 */ -+ /* According to the WPS specification, all the WPS attribute is presented by Big Endian. */ -+ -+ wpsielen = 0; -+ /* WPS OUI */ -+ *(u32 *)(wpsie) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* WPS version */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -+ -+ if (pmlmepriv->wps_probe_req_ie == NULL) { -+ /* UUID-E */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_UUID_E); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0010); -+ wpsielen += 2; -+ -+ /* Value: */ -+ if (pwdinfo->external_uuid == 0) { -+ _rtw_memset(wpsie + wpsielen, 0x0, 16); -+ _rtw_memcpy(wpsie + wpsielen, mac, ETH_ALEN); -+ } else -+ _rtw_memcpy(wpsie + wpsielen, pwdinfo->uuid, 0x10); -+ wpsielen += 0x10; -+ -+ /* Config Method */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_CONF_METHOD); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0002); -+ wpsielen += 2; -+ -+ /* Value: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(pwdinfo->supported_wps_cm); -+ wpsielen += 2; -+ } -+ -+ /* Device Name */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(pwdinfo->device_name_len); -+ wpsielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len); -+ wpsielen += pwdinfo->device_name_len; -+ -+ /* Primary Device Type */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_PRIMARY_DEV_TYPE); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0008); -+ wpsielen += 2; -+ -+ /* Value: */ -+ /* Category ID */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_CID_RTK_WIDI); -+ wpsielen += 2; -+ -+ /* OUI */ -+ *(u32 *)(wpsie + wpsielen) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* Sub Category ID */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_SCID_RTK_DMP); -+ wpsielen += 2; -+ -+ /* Device Password ID */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_DEVICE_PWID); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0002); -+ wpsielen += 2; -+ -+ /* Value: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_DPID_REGISTRAR_SPEC); /* Registrar-specified */ -+ wpsielen += 2; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen); -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20110221 */ -+ /* According to the P2P Specification, the probe request frame should contain 5 P2P attributes */ -+ /* 1. P2P Capability */ -+ /* 2. P2P Device ID if this probe request wants to find the specific P2P device */ -+ /* 3. Listen Channel */ -+ /* 4. Extended Listen Timing */ -+ /* 5. Operating Channel if this WiFi is working as the group owner now */ -+ -+ /* P2P Capability */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CAPABILITY; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Device Capability Bitmap, 1 byte */ -+ p2pie[p2pielen++] = DMP_P2P_DEVCAP_SUPPORT; -+ -+ /* Group Capability Bitmap, 1 byte */ -+ if (pwdinfo->persistent_supported) -+ p2pie[p2pielen++] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; -+ else -+ p2pie[p2pielen++] = DMP_P2P_GRPCAP_SUPPORT; -+ -+ /* Listen Channel */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_LISTEN_CH; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; /* Copy from SD7 */ -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = pwdinfo->listen_channel; /* listen channel */ -+ -+ -+ /* Extended Listen Timing */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_EX_LISTEN_TIMING; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0004); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Availability Period */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0xFFFF); -+ p2pielen += 2; -+ -+ /* Availability Interval */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0xFFFF); -+ p2pielen += 2; -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ /* Operating Channel (if this WiFi is working as the group owner now) */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_OPERATING_CH; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; /* Copy from SD7 */ -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = pwdinfo->operating_channel; /* operating channel number */ -+ -+ } -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen); -+ -+ } -+ -+#ifdef CONFIG_WFD -+ wfdielen = rtw_append_probe_req_wfd_ie(padapter, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+/* Vendor Specific IE */ -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_P2P_PROBEREQ_VENDOR_IE_BIT); -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ return ret; -+} -+ -+inline void issue_probereq_p2p(_adapter *adapter, u8 *da) -+{ -+ _issue_probereq_p2p(adapter, da, _FALSE); -+} -+ -+/* -+ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT -+ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX -+ * try_cnt means the maximal TX count to try -+ */ -+int issue_probereq_p2p_ex(_adapter *adapter, u8 *da, int try_cnt, int wait_ms) -+{ -+ int ret; -+ int i = 0; -+ systime start = rtw_get_current_time(); -+ -+ do { -+ ret = _issue_probereq_p2p(adapter, da, wait_ms > 0 ? _TRUE : _FALSE); -+ -+ i++; -+ -+ if (RTW_CANNOT_RUN(adapter)) -+ break; -+ -+ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) -+ rtw_msleep_os(wait_ms); -+ -+ } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); -+ -+ if (ret != _FAIL) { -+ ret = _SUCCESS; -+#ifndef DBG_XMIT_ACK -+ goto exit; -+#endif -+ } -+ -+ if (try_cnt && wait_ms) { -+ if (da) -+ RTW_INFO(FUNC_ADPT_FMT" to "MAC_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(adapter), MAC_ARG(da), rtw_get_oper_ch(adapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(adapter), rtw_get_oper_ch(adapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ } -+exit: -+ return ret; -+} -+ -+#endif /* CONFIG_P2P */ -+ -+s32 rtw_action_public_decache(union recv_frame *rframe, u8 token_offset) -+{ -+ _adapter *adapter = rframe->u.hdr.adapter; -+ struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); -+ u8 *frame = rframe->u.hdr.rx_data; -+ u16 seq_ctrl = ((rframe->u.hdr.attrib.seq_num & 0xffff) << 4) | (rframe->u.hdr.attrib.frag_num & 0xf); -+ u8 token = *(rframe->u.hdr.rx_data + sizeof(struct rtw_ieee80211_hdr_3addr) + token_offset); -+ -+ if (GetRetry(frame)) { -+ if ((seq_ctrl == mlmeext->action_public_rxseq) -+ && (token == mlmeext->action_public_dialog_token) -+ ) { -+ RTW_INFO(FUNC_ADPT_FMT" seq_ctrl=0x%x, rxseq=0x%x, token:%d\n", -+ FUNC_ADPT_ARG(adapter), seq_ctrl, mlmeext->action_public_rxseq, token); -+ return _FAIL; -+ } -+ } -+ -+ /* TODO: per sta seq & token */ -+ mlmeext->action_public_rxseq = seq_ctrl; -+ mlmeext->action_public_dialog_token = token; -+ -+ return _SUCCESS; -+} -+ -+unsigned int on_action_public_p2p(union recv_frame *precv_frame) -+{ -+ _adapter *padapter = precv_frame->u.hdr.adapter; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint len = precv_frame->u.hdr.len; -+ u8 *frame_body; -+#ifdef CONFIG_P2P -+ u8 *p2p_ie; -+ u32 p2p_ielen; -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 result = P2P_STATUS_SUCCESS; -+ u8 empty_addr[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; -+ u8 *merged_p2pie = NULL; -+ u32 merged_p2p_ielen = 0; -+#ifdef CONFIG_CONCURRENT_MODE -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#endif -+#endif /* CONFIG_P2P */ -+ -+ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+#ifdef CONFIG_P2P -+ _cancel_timer_ex(&pwdinfo->reset_ch_sitesurvey); -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211) -+ rtw_cfg80211_rx_p2p_action_public(padapter, precv_frame); -+ else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ /* Do nothing if the driver doesn't enable the P2P function. */ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) -+ return _SUCCESS; -+ -+ len -= sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ switch (frame_body[6]) { /* OUI Subtype */ -+ case P2P_GO_NEGO_REQ: { -+ RTW_INFO("[%s] Got GO Nego Req Frame\n", __FUNCTION__); -+ _rtw_memset(&pwdinfo->groupid_info, 0x00, sizeof(struct group_id_info)); -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ)) -+ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) { -+ /* Commented by Albert 20110526 */ -+ /* In this case, this means the previous nego fail doesn't be reset yet. */ -+ _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); -+ /* Restore the previous p2p state */ -+ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -+ RTW_INFO("[%s] Restore the previous p2p state to %d\n", __FUNCTION__, rtw_p2p_state(pwdinfo)); -+ } -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_ASOC_STATE)) -+ _cancel_timer_ex(&prochinfo->ap_roch_ch_switch_timer); -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ /* Commented by Kurt 20110902 */ -+ /* Add if statement to avoid receiving duplicate prov disc req. such that pre_p2p_state would be covered. */ -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ -+ /* Commented by Kurt 20120113 */ -+ /* Get peer_dev_addr here if peer doesn't issue prov_disc frame. */ -+ if (_rtw_memcmp(pwdinfo->rx_prov_disc_info.peerDevAddr, empty_addr, ETH_ALEN)) -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.peerDevAddr, get_addr2_ptr(pframe), ETH_ALEN); -+ -+ result = process_p2p_group_negotation_req(pwdinfo, frame_body, len); -+ issue_p2p_GO_response(padapter, get_addr2_ptr(pframe), frame_body, len, result); -+ -+ /* Commented by Albert 20110718 */ -+ /* No matter negotiating or negotiation failure, the driver should set up the restore P2P state timer. */ -+#ifdef CONFIG_CONCURRENT_MODE -+ /* Commented by Albert 20120107 */ -+ _set_timer(&pwdinfo->restore_p2p_state_timer, 3000); -+#else /* CONFIG_CONCURRENT_MODE */ -+ _set_timer(&pwdinfo->restore_p2p_state_timer, 5000); -+#endif /* CONFIG_CONCURRENT_MODE */ -+ break; -+ } -+ case P2P_GO_NEGO_RESP: { -+ RTW_INFO("[%s] Got GO Nego Resp Frame\n", __FUNCTION__); -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) { -+ /* Commented by Albert 20110425 */ -+ /* The restore timer is enabled when issuing the nego request frame of rtw_p2p_connect function. */ -+ _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); -+ pwdinfo->nego_req_info.benable = _FALSE; -+ result = process_p2p_group_negotation_resp(pwdinfo, frame_body, len); -+ issue_p2p_GO_confirm(pwdinfo->padapter, get_addr2_ptr(pframe), result); -+ if (P2P_STATUS_SUCCESS == result) { -+ if (rtw_p2p_role(pwdinfo) == P2P_ROLE_CLIENT) { -+ pwdinfo->p2p_info.operation_ch[0] = pwdinfo->peer_operating_ch; -+#ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH -+ pwdinfo->p2p_info.operation_ch[1] = 1; /* Check whether GO is operating in channel 1; */ -+ pwdinfo->p2p_info.operation_ch[2] = 6; /* Check whether GO is operating in channel 6; */ -+ pwdinfo->p2p_info.operation_ch[3] = 11; /* Check whether GO is operating in channel 11; */ -+#endif /* CONFIG_P2P_OP_CHK_SOCIAL_CH */ -+ pwdinfo->p2p_info.scan_op_ch_only = 1; -+ _set_timer(&pwdinfo->reset_ch_sitesurvey2, P2P_RESET_SCAN_CH); -+ } -+ } -+ -+ /* Reset the dialog token for group negotiation frames. */ -+ pwdinfo->negotiation_dialog_token = 1; -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) -+ _set_timer(&pwdinfo->restore_p2p_state_timer, 5000); -+ } else -+ RTW_INFO("[%s] Skipped GO Nego Resp Frame (p2p_state != P2P_STATE_GONEGO_ING)\n", __FUNCTION__); -+ -+ break; -+ } -+ case P2P_GO_NEGO_CONF: { -+ RTW_INFO("[%s] Got GO Nego Confirm Frame\n", __FUNCTION__); -+ result = process_p2p_group_negotation_confirm(pwdinfo, frame_body, len); -+ if (P2P_STATUS_SUCCESS == result) { -+ if (rtw_p2p_role(pwdinfo) == P2P_ROLE_CLIENT) { -+ pwdinfo->p2p_info.operation_ch[0] = pwdinfo->peer_operating_ch; -+#ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH -+ pwdinfo->p2p_info.operation_ch[1] = 1; /* Check whether GO is operating in channel 1; */ -+ pwdinfo->p2p_info.operation_ch[2] = 6; /* Check whether GO is operating in channel 6; */ -+ pwdinfo->p2p_info.operation_ch[3] = 11; /* Check whether GO is operating in channel 11; */ -+#endif /* CONFIG_P2P_OP_CHK_SOCIAL_CH */ -+ pwdinfo->p2p_info.scan_op_ch_only = 1; -+ _set_timer(&pwdinfo->reset_ch_sitesurvey2, P2P_RESET_SCAN_CH); -+ } -+ } -+ break; -+ } -+ case P2P_INVIT_REQ: { -+ /* Added by Albert 2010/10/05 */ -+ /* Received the P2P Invite Request frame. */ -+ -+ RTW_INFO("[%s] Got invite request frame!\n", __FUNCTION__); -+ p2p_ie = rtw_get_p2p_ie(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen); -+ if (p2p_ie) { -+ /* Parse the necessary information from the P2P Invitation Request frame. */ -+ /* For example: The MAC address of sending this P2P Invitation Request frame. */ -+ u32 attr_contentlen = 0; -+ u8 status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; -+ struct group_id_info group_id; -+ u8 invitation_flag = 0; -+ -+ merged_p2p_ielen = rtw_get_p2p_merged_ies_len(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_); -+ -+ merged_p2pie = rtw_zmalloc(merged_p2p_ielen + 2); /* 2 is for EID and Length */ -+ if (merged_p2pie == NULL) { -+ RTW_INFO("[%s] Malloc p2p ie fail\n", __FUNCTION__); -+ goto exit; -+ } -+ _rtw_memset(merged_p2pie, 0x00, merged_p2p_ielen); -+ -+ merged_p2p_ielen = rtw_p2p_merge_ies(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, merged_p2pie); -+ -+ rtw_get_p2p_attr_content(merged_p2pie, merged_p2p_ielen, P2P_ATTR_INVITATION_FLAGS, &invitation_flag, &attr_contentlen); -+ if (attr_contentlen) { -+ -+ rtw_get_p2p_attr_content(merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_BSSID, pwdinfo->p2p_peer_interface_addr, &attr_contentlen); -+ /* Commented by Albert 20120510 */ -+ /* Copy to the pwdinfo->p2p_peer_interface_addr. */ -+ /* So that the WFD UI ( or Sigma ) can get the peer interface address by using the following command. */ -+ /* #> iwpriv wlan0 p2p_get peer_ifa */ -+ /* After having the peer interface address, the sigma can find the correct conf file for wpa_supplicant. */ -+ -+ if (attr_contentlen) { -+ RTW_INFO("[%s] GO's BSSID = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, -+ pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], -+ pwdinfo->p2p_peer_interface_addr[2], pwdinfo->p2p_peer_interface_addr[3], -+ pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5]); -+ } -+ -+ if (invitation_flag & P2P_INVITATION_FLAGS_PERSISTENT) { -+ /* Re-invoke the persistent group. */ -+ -+ _rtw_memset(&group_id, 0x00, sizeof(struct group_id_info)); -+ rtw_get_p2p_attr_content(merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_ID, (u8 *) &group_id, &attr_contentlen); -+ if (attr_contentlen) { -+ if (_rtw_memcmp(group_id.go_device_addr, adapter_mac_addr(padapter), ETH_ALEN)) { -+ /* The p2p device sending this p2p invitation request wants this Wi-Fi device to be the persistent GO. */ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_GO); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ status_code = P2P_STATUS_SUCCESS; -+ } else { -+ /* The p2p device sending this p2p invitation request wants to be the persistent GO. */ -+ if (is_matched_in_profilelist(pwdinfo->p2p_peer_interface_addr, &pwdinfo->profileinfo[0])) { -+ u8 operatingch_info[5] = { 0x00 }; -+ if (rtw_get_p2p_attr_content(merged_p2pie, merged_p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, -+ &attr_contentlen)) { -+ if (rtw_chset_search_ch(adapter_to_chset(padapter), (u32)operatingch_info[4]) >= 0) { -+ /* The operating channel is acceptable for this device. */ -+ pwdinfo->rx_invitereq_info.operation_ch[0] = operatingch_info[4]; -+#ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH -+ pwdinfo->rx_invitereq_info.operation_ch[1] = 1; /* Check whether GO is operating in channel 1; */ -+ pwdinfo->rx_invitereq_info.operation_ch[2] = 6; /* Check whether GO is operating in channel 6; */ -+ pwdinfo->rx_invitereq_info.operation_ch[3] = 11; /* Check whether GO is operating in channel 11; */ -+#endif /* CONFIG_P2P_OP_CHK_SOCIAL_CH */ -+ pwdinfo->rx_invitereq_info.scan_op_ch_only = 1; -+ _set_timer(&pwdinfo->reset_ch_sitesurvey, P2P_RESET_SCAN_CH); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_MATCH); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ status_code = P2P_STATUS_SUCCESS; -+ } else { -+ /* The operating channel isn't supported by this device. */ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ status_code = P2P_STATUS_FAIL_NO_COMMON_CH; -+ _set_timer(&pwdinfo->restore_p2p_state_timer, 3000); -+ } -+ } else { -+ /* Commented by Albert 20121130 */ -+ /* Intel will use the different P2P IE to store the operating channel information */ -+ /* Workaround for Intel WiDi 3.5 */ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_MATCH); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ status_code = P2P_STATUS_SUCCESS; -+ } -+ } else { -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH); -+ status_code = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP; -+ } -+ } -+ } else { -+ RTW_INFO("[%s] P2P Group ID Attribute NOT FOUND!\n", __FUNCTION__); -+ status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; -+ } -+ } else { -+ /* Received the invitation to join a P2P group. */ -+ -+ _rtw_memset(&group_id, 0x00, sizeof(struct group_id_info)); -+ rtw_get_p2p_attr_content(merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_ID, (u8 *) &group_id, &attr_contentlen); -+ if (attr_contentlen) { -+ if (_rtw_memcmp(group_id.go_device_addr, adapter_mac_addr(padapter), ETH_ALEN)) { -+ /* In this case, the GO can't be myself. */ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH); -+ status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; -+ } else { -+ /* The p2p device sending this p2p invitation request wants to join an existing P2P group */ -+ /* Commented by Albert 2012/06/28 */ -+ /* In this case, this Wi-Fi device should use the iwpriv command to get the peer device address. */ -+ /* The peer device address should be the destination address for the provisioning discovery request. */ -+ /* Then, this Wi-Fi device should use the iwpriv command to get the peer interface address. */ -+ /* The peer interface address should be the address for WPS mac address */ -+ _rtw_memcpy(pwdinfo->p2p_peer_device_addr, group_id.go_device_addr , ETH_ALEN); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_JOIN); -+ status_code = P2P_STATUS_SUCCESS; -+ } -+ } else { -+ RTW_INFO("[%s] P2P Group ID Attribute NOT FOUND!\n", __FUNCTION__); -+ status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; -+ } -+ } -+ } else { -+ RTW_INFO("[%s] P2P Invitation Flags Attribute NOT FOUND!\n", __FUNCTION__); -+ status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; -+ } -+ -+ RTW_INFO("[%s] status_code = %d\n", __FUNCTION__, status_code); -+ -+ pwdinfo->inviteresp_info.token = frame_body[7]; -+ issue_p2p_invitation_response(padapter, get_addr2_ptr(pframe), pwdinfo->inviteresp_info.token, status_code); -+ _set_timer(&pwdinfo->restore_p2p_state_timer, 3000); -+ } -+ break; -+ } -+ case P2P_INVIT_RESP: { -+ u8 attr_content = 0x00; -+ u32 attr_contentlen = 0; -+ -+ RTW_INFO("[%s] Got invite response frame!\n", __FUNCTION__); -+ _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); -+ p2p_ie = rtw_get_p2p_ie(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen); -+ if (p2p_ie) { -+ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); -+ -+ if (attr_contentlen == 1) { -+ RTW_INFO("[%s] Status = %d\n", __FUNCTION__, attr_content); -+ pwdinfo->invitereq_info.benable = _FALSE; -+ -+ if (attr_content == P2P_STATUS_SUCCESS) { -+ if (_rtw_memcmp(pwdinfo->invitereq_info.go_bssid, adapter_mac_addr(padapter), ETH_ALEN)) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ else -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_INVITE_RESP_OK); -+ } else { -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL); -+ } -+ } else { -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL); -+ } -+ } else { -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL); -+ } -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL)) -+ _set_timer(&pwdinfo->restore_p2p_state_timer, 5000); -+ break; -+ } -+ case P2P_DEVDISC_REQ: -+ -+ process_p2p_devdisc_req(pwdinfo, pframe, len); -+ -+ break; -+ -+ case P2P_DEVDISC_RESP: -+ -+ process_p2p_devdisc_resp(pwdinfo, pframe, len); -+ -+ break; -+ -+ case P2P_PROVISION_DISC_REQ: -+ RTW_INFO("[%s] Got Provisioning Discovery Request Frame\n", __FUNCTION__); -+ process_p2p_provdisc_req(pwdinfo, pframe, len); -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.peerDevAddr, get_addr2_ptr(pframe), ETH_ALEN); -+ -+ /* 20110902 Kurt */ -+ /* Add the following statement to avoid receiving duplicate prov disc req. such that pre_p2p_state would be covered. */ -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ)) -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ); -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT); -+ break; -+ -+ case P2P_PROVISION_DISC_RESP: -+ /* Commented by Albert 20110707 */ -+ /* Should we check the pwdinfo->tx_prov_disc_info.bsent flag here?? */ -+ RTW_INFO("[%s] Got Provisioning Discovery Response Frame\n", __FUNCTION__); -+ /* Commented by Albert 20110426 */ -+ /* The restore timer is enabled when issuing the provisioing request frame in rtw_p2p_prov_disc function. */ -+ _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_RSP); -+ process_p2p_provdisc_resp(pwdinfo, pframe); -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT); -+ break; -+ -+ } -+ } -+ -+ -+exit: -+ -+ if (merged_p2pie) -+ rtw_mfree(merged_p2pie, merged_p2p_ielen + 2); -+#endif /* CONFIG_P2P */ -+ return _SUCCESS; -+} -+ -+unsigned int on_action_public_vendor(union recv_frame *precv_frame) -+{ -+ unsigned int ret = _FAIL; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ _adapter *adapter = precv_frame->u.hdr.adapter; -+ int cnt = 0; -+ char msg[64]; -+ -+ if (_rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE) { -+ if (rtw_action_public_decache(precv_frame, 7) == _FAIL) -+ goto exit; -+ -+ if (!hal_chk_wl_func(precv_frame->u.hdr.adapter, WL_FUNC_MIRACAST)) -+ rtw_rframe_del_wfd_ie(precv_frame, 8); -+ -+ ret = on_action_public_p2p(precv_frame); -+ } else if (_rtw_memcmp(frame_body + 2, DPP_OUI, 4) == _TRUE) { -+ u8 dpp_type = frame_body[7]; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ cnt += sprintf((msg + cnt), "DPP(type:%u)", dpp_type); -+ rtw_cfg80211_rx_action(adapter, precv_frame, msg); -+#endif -+ } -+ -+exit: -+ return ret; -+} -+ -+unsigned int on_action_public_default(union recv_frame *precv_frame, u8 action) -+{ -+ unsigned int ret = _FAIL; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ u8 token; -+ _adapter *adapter = precv_frame->u.hdr.adapter; -+ int cnt = 0; -+ char msg[64]; -+ -+ token = frame_body[2]; -+ -+ if (rtw_action_public_decache(precv_frame, 2) == _FAIL) -+ goto exit; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ cnt += sprintf((msg + cnt), "%s(token:%u)", action_public_str(action), token); -+ rtw_cfg80211_rx_action(adapter, precv_frame, msg); -+#endif -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+unsigned int on_action_public(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ unsigned int ret = _FAIL; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint frame_len = precv_frame->u.hdr.len; -+ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ u8 category, action; -+ -+ /* check RA matches or broadcast */ -+ if (!(_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(pframe), ETH_ALEN) || -+ is_broadcast_mac_addr(GetAddr1Ptr(pframe)))) -+ goto exit; -+ -+ category = frame_body[0]; -+ if (category != RTW_WLAN_CATEGORY_PUBLIC) -+ goto exit; -+ -+ action = frame_body[1]; -+ switch (action) { -+ case ACT_PUBLIC_BSSCOEXIST: -+#ifdef CONFIG_80211N_HT -+#ifdef CONFIG_AP_MODE -+ /*20/40 BSS Coexistence Management frame is a Public Action frame*/ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) -+ rtw_process_public_act_bsscoex(padapter, pframe, frame_len); -+#endif /*CONFIG_AP_MODE*/ -+#endif /*CONFIG_80211N_HT*/ -+ break; -+ case ACT_PUBLIC_VENDOR: -+ ret = on_action_public_vendor(precv_frame); -+ break; -+ default: -+ ret = on_action_public_default(precv_frame, action); -+ break; -+ } -+ -+exit: -+ return ret; -+} -+ -+unsigned int OnAction_ft(_adapter *padapter, union recv_frame *precv_frame) -+{ -+#ifdef CONFIG_RTW_80211R -+ u32 ret = _FAIL; -+ u32 frame_len = 0; -+ u8 action_code = 0; -+ u8 category = 0; -+ u8 *pframe = NULL; -+ u8 *pframe_body = NULL; -+ u8 tgt_addr[ETH_ALEN]; -+ u8 *pie = NULL; -+ u32 ft_ie_len = 0; -+ u32 status_code = 0; -+ struct mlme_ext_priv *pmlmeext = NULL; -+ struct mlme_ext_info *pmlmeinfo = NULL; -+ struct mlme_priv *pmlmepriv = NULL; -+ struct wlan_network *proam_target = NULL; -+ struct ft_roam_info *pft_roam = NULL; -+ _irqL irqL; -+ -+ pmlmeext = &(padapter->mlmeextpriv); -+ pmlmeinfo = &(pmlmeext->mlmext_info); -+ pmlmepriv = &(padapter->mlmepriv); -+ pft_roam = &(pmlmepriv->ft_roam); -+ pframe = precv_frame->u.hdr.rx_data; -+ frame_len = precv_frame->u.hdr.len; -+ pframe_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ category = pframe_body[0]; -+ -+ if (category != RTW_WLAN_CATEGORY_FT) -+ goto exit; -+ -+ action_code = pframe_body[1]; -+ switch (action_code) { -+ case RTW_WLAN_ACTION_FT_RSP: -+ RTW_INFO("FT: RTW_WLAN_ACTION_FT_RSP recv.\n"); -+ if (!_rtw_memcmp(adapter_mac_addr(padapter), &pframe_body[2], ETH_ALEN)) { -+ RTW_ERR("FT: Unmatched STA MAC Address "MAC_FMT"\n", MAC_ARG(&pframe_body[2])); -+ goto exit; -+ } -+ -+ status_code = le16_to_cpu(*(u16 *)((SIZE_PTR)pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + 14)); -+ if (status_code != 0) { -+ RTW_ERR("FT: WLAN ACTION FT RESPONSE fail, status: %d\n", status_code); -+ goto exit; -+ } -+ -+ _rtw_memcpy(tgt_addr, &pframe_body[8], ETH_ALEN); -+ if (is_zero_mac_addr(tgt_addr) || is_broadcast_mac_addr(tgt_addr)) { -+ RTW_ERR("FT: Invalid Target MAC Address "MAC_FMT"\n", MAC_ARG(tgt_addr)); -+ goto exit; -+ } -+ -+ pie = rtw_get_ie(pframe_body, _MDIE_, &ft_ie_len, frame_len); -+ if (pie) { -+ if (!_rtw_memcmp(&pft_roam->mdid, pie+2, 2)) { -+ RTW_ERR("FT: Invalid MDID\n"); -+ goto exit; -+ } -+ } -+ -+ rtw_ft_set_status(padapter, RTW_FT_REQUESTED_STA); -+ _cancel_timer_ex(&pmlmeext->ft_link_timer); -+ -+ /*Disconnect current AP*/ -+ receive_disconnect(padapter, pmlmepriv->cur_network.network.MacAddress, WLAN_REASON_ACTIVE_ROAM, _FALSE); -+ -+ pft_roam->ft_action_len = frame_len; -+ _rtw_memcpy(pft_roam->ft_action, pframe, rtw_min(frame_len, RTW_FT_MAX_IE_SZ)); -+ ret = _SUCCESS; -+ break; -+ case RTW_WLAN_ACTION_FT_REQ: -+ case RTW_WLAN_ACTION_FT_CONF: -+ case RTW_WLAN_ACTION_FT_ACK: -+ default: -+ RTW_ERR("FT: Unsupported FT Action!\n"); -+ break; -+ } -+ -+exit: -+ return ret; -+#else -+ return _SUCCESS; -+#endif -+} -+ -+unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ u8 category, action; -+ -+ /* check RA matches or not */ -+ if (!_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(pframe), ETH_ALEN)) -+ goto exit; -+ -+ category = frame_body[0]; -+ if (category != RTW_WLAN_CATEGORY_HT) -+ goto exit; -+ -+ action = frame_body[1]; -+ switch (action) { -+ case RTW_WLAN_ACTION_HT_SM_PS: -+#ifdef CONFIG_80211N_HT -+#ifdef CONFIG_AP_MODE -+ if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) -+ rtw_process_ht_action_smps(padapter, get_addr2_ptr(pframe), frame_body[2]); -+#endif /*CONFIG_AP_MODE*/ -+#endif /*CONFIG_80211N_HT*/ -+ break; -+ case RTW_WLAN_ACTION_HT_COMPRESS_BEAMFORMING: -+#ifdef CONFIG_BEAMFORMING -+ /*RTW_INFO("RTW_WLAN_ACTION_HT_COMPRESS_BEAMFORMING\n");*/ -+ rtw_beamforming_get_report_frame(padapter, precv_frame); -+#endif /*CONFIG_BEAMFORMING*/ -+ break; -+ default: -+ break; -+ } -+ -+exit: -+ -+ return _SUCCESS; -+} -+ -+#ifdef CONFIG_IEEE80211W -+unsigned int OnAction_sa_query(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u16 tid; -+ /* Baron */ -+ -+ RTW_INFO("OnAction_sa_query\n"); -+ -+ switch (pframe[WLAN_HDR_A3_LEN + 1]) { -+ case 0: /* SA Query req */ -+ _rtw_memcpy(&tid, &pframe[WLAN_HDR_A3_LEN + 2], sizeof(u16)); -+ RTW_INFO("OnAction_sa_query request,action=%d, tid=%04x, pframe=%02x-%02x\n" -+ , pframe[WLAN_HDR_A3_LEN + 1], tid, pframe[WLAN_HDR_A3_LEN + 2], pframe[WLAN_HDR_A3_LEN + 3]); -+ issue_action_SA_Query(padapter, get_addr2_ptr(pframe), 1, tid, IEEE80211W_RIGHT_KEY); -+ break; -+ -+ case 1: /* SA Query rsp */ -+ psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (psta != NULL) -+ _cancel_timer_ex(&psta->dot11w_expire_timer); -+ -+ _rtw_memcpy(&tid, &pframe[WLAN_HDR_A3_LEN + 2], sizeof(u16)); -+ RTW_INFO("OnAction_sa_query response,action=%d, tid=%04x, cancel timer\n", pframe[WLAN_HDR_A3_LEN + 1], tid); -+ break; -+ default: -+ break; -+ } -+ if (0) { -+ int pp; -+ printk("pattrib->pktlen = %d =>", pattrib->pkt_len); -+ for (pp = 0; pp < pattrib->pkt_len; pp++) -+ printk(" %02x ", pframe[pp]); -+ printk("\n"); -+ } -+ -+ return _SUCCESS; -+} -+#endif /* CONFIG_IEEE80211W */ -+ -+unsigned int on_action_rm(_adapter *padapter, union recv_frame *precv_frame) -+{ -+#ifdef CONFIG_RTW_80211K -+ return rm_on_action(padapter, precv_frame); -+#else -+ return _SUCCESS; -+#endif /* CONFIG_RTW_80211K */ -+} -+ -+unsigned int OnAction_wmm(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ return _SUCCESS; -+} -+ -+unsigned int OnAction_vht(_adapter *padapter, union recv_frame *precv_frame) -+{ -+#ifdef CONFIG_80211AC_VHT -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ struct rtw_ieee80211_hdr_3addr *whdr = (struct rtw_ieee80211_hdr_3addr *)pframe; -+ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ u8 category, action; -+ struct sta_info *psta = NULL; -+ -+ /* check RA matches or not */ -+ if (!_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(pframe), ETH_ALEN)) -+ goto exit; -+ -+ category = frame_body[0]; -+ if (category != RTW_WLAN_CATEGORY_VHT) -+ goto exit; -+ -+ action = frame_body[1]; -+ switch (action) { -+ case RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING: -+#ifdef CONFIG_BEAMFORMING -+ /*RTW_INFO("RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING\n");*/ -+ rtw_beamforming_get_report_frame(padapter, precv_frame); -+#endif /*CONFIG_BEAMFORMING*/ -+ break; -+ case RTW_WLAN_ACTION_VHT_OPMODE_NOTIFICATION: -+ /* CategoryCode(1) + ActionCode(1) + OpModeNotification(1) */ -+ /* RTW_INFO("RTW_WLAN_ACTION_VHT_OPMODE_NOTIFICATION\n"); */ -+ psta = rtw_get_stainfo(&padapter->stapriv, whdr->addr2); -+ if (psta) -+ rtw_process_vht_op_mode_notify(padapter, &frame_body[2], psta); -+ break; -+ case RTW_WLAN_ACTION_VHT_GROUPID_MANAGEMENT: -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+ rtw_beamforming_get_vht_gid_mgnt_frame(padapter, precv_frame); -+#endif /* RTW_BEAMFORMING_VERSION_2 */ -+#endif /* CONFIG_BEAMFORMING */ -+ break; -+ default: -+ break; -+ } -+ -+exit: -+#endif /* CONFIG_80211AC_VHT */ -+ -+ return _SUCCESS; -+} -+ -+unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame) -+{ -+#ifdef CONFIG_P2P -+ u8 *frame_body; -+ u8 category, OUI_Subtype, dialogToken = 0; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ uint len = precv_frame->u.hdr.len; -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ /* check RA matches or not */ -+ if (!_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(pframe), ETH_ALEN)) -+ return _SUCCESS; -+ -+ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+ category = frame_body[0]; -+ if (category != RTW_WLAN_CATEGORY_P2P) -+ return _SUCCESS; -+ -+ if (cpu_to_be32(*((u32 *)(frame_body + 1))) != P2POUI) -+ return _SUCCESS; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (adapter_wdev_data(padapter)->p2p_enabled -+ && pwdinfo->driver_interface == DRIVER_CFG80211 -+ ) { -+ rtw_cfg80211_rx_action_p2p(padapter, precv_frame); -+ return _SUCCESS; -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ len -= sizeof(struct rtw_ieee80211_hdr_3addr); -+ OUI_Subtype = frame_body[5]; -+ dialogToken = frame_body[6]; -+ -+ switch (OUI_Subtype) { -+ case P2P_NOTICE_OF_ABSENCE: -+ -+ break; -+ -+ case P2P_PRESENCE_REQUEST: -+ -+ process_p2p_presence_req(pwdinfo, pframe, len); -+ -+ break; -+ -+ case P2P_PRESENCE_RESPONSE: -+ -+ break; -+ -+ case P2P_GO_DISC_REQUEST: -+ -+ break; -+ -+ default: -+ break; -+ -+ } -+ } -+#endif /* CONFIG_P2P */ -+ -+ return _SUCCESS; -+ -+} -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+unsigned int OnAction_tbtx_token(_adapter *padapter, union recv_frame *precv_frame) -+{ -+#define TOKEN_REQ 0x00 -+#define TOKEN_REL 0x01 -+ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ u32 xmit_time; -+ u8 *src=NULL, *pframe = precv_frame->u.hdr.rx_data; -+ u8 tbtx_action_code; -+ u8 i, nr_send; -+ uint tx_duration = 0; -+ -+ if (padapter->tbtx_capability == _FALSE) -+ goto exit; -+ -+ tbtx_action_code = *(pframe + WLAN_HDR_A3_LEN + 1); -+ -+ -+ switch (tbtx_action_code) -+ { -+ case TOKEN_REQ: -+ // parse duration -+ tx_duration = le32_to_cpu(*(uint *)(pframe + WLAN_HDR_A3_LEN + 2)); -+ padapter->tbtx_duration = tx_duration/1000; // Mirocsecond to Millisecond -+ ATOMIC_SET(&padapter->tbtx_tx_pause, _FALSE); -+ rtw_tx_control_cmd(padapter); -+ _set_timer(&pmlmeext->tbtx_xmit_timer, padapter->tbtx_duration); -+ ATOMIC_SET(&padapter->tbtx_remove_tx_pause, _FALSE); -+#if defined(CONFIG_SDIO_HCI) && !defined(CONFIG_SDIO_TX_TASKLET) -+ _rtw_up_sema(&pxmitpriv->SdioXmitSema); -+#else -+ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); -+#endif -+ break; -+#ifdef CONFIG_AP_MODE -+ case TOKEN_REL: -+ src = get_addr2_ptr(pframe); -+ if (!src) -+ goto exit; -+ psta = rtw_get_stainfo(&padapter->stapriv, src); -+ if (!psta) -+ goto exit; -+ -+ if (ATOMIC_READ(&pstapriv->nr_token_keeper) < 1) -+ goto exit; -+ -+ for (i=0; i< NR_MAXSTA_INSLOT; i++) { -+ if (pstapriv->token_holder[i] == psta) { -+ pstapriv->token_holder[i] = NULL; -+ //RTW_INFO("macaddr1:" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); -+ ATOMIC_DEC(&pstapriv->nr_token_keeper); -+ break; -+ } -+ } -+ -+ if (ATOMIC_READ(&pstapriv->nr_token_keeper) == 0) -+ _set_timer(&pmlmeext->tbtx_token_dispatch_timer, 1); -+ -+ break; -+#endif -+ default: -+ RTW_INFO("Undefined Action Code\n"); -+ goto exit; -+ break; -+ } -+ -+exit: -+ return _SUCCESS; -+} -+ -+void rtw_issue_action_token_rel(_adapter *padapter) -+{ -+ -+ // Todo: -+ // gen token -+ /* Token Release Format -+ Category code : 1 Byte -+ Action code : 1 Byte */ -+ int ret = _FAIL; -+ //u16 *fctrl; -+ u8 val = 0x01; -+ u8 category = RTW_WLAN_CATEGORY_TBTX; -+ u8 *pframe; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ //struct sta_info *psta; -+ //struct sta_priv *pstapriv = &padapter->stapriv; -+ //struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ return; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /*update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ pattrib->rate = MGN_24M; /* issue action release using OFDM rate? 20190716 Bruce add */ -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ //fctrl = &(pwlanhdr->frame_ctl); -+ //*(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ // SetSeqNum?? -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(val), &(pattrib->pktlen)); -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ //RTW_INFO("%s\n", __func__); -+ -+} -+#endif -+ -+unsigned int OnAction(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ int i; -+ unsigned char category; -+ struct action_handler *ptable; -+ unsigned char *frame_body; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ -+ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+ category = frame_body[0]; -+ -+ for (i = 0; i < sizeof(OnAction_tbl) / sizeof(struct action_handler); i++) { -+ ptable = &OnAction_tbl[i]; -+ -+ if (category == ptable->num) -+ ptable->func(padapter, precv_frame); -+ -+ } -+ -+ return _SUCCESS; -+ -+} -+ -+unsigned int DoReserved(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ -+ /* RTW_INFO("rcvd mgt frame(%x, %x)\n", (get_frame_sub_type(pframe) >> 4), *(unsigned int *)GetAddr1Ptr(pframe)); */ -+ return _SUCCESS; -+} -+ -+struct xmit_frame *_alloc_mgtxmitframe(struct xmit_priv *pxmitpriv, bool once) -+{ -+ struct xmit_frame *pmgntframe; -+ struct xmit_buf *pxmitbuf; -+ -+ if (once) -+ pmgntframe = rtw_alloc_xmitframe_once(pxmitpriv); -+ else -+ pmgntframe = rtw_alloc_xmitframe_ext(pxmitpriv); -+ -+ if (pmgntframe == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT" alloc xmitframe fail, once:%d\n", FUNC_ADPT_ARG(pxmitpriv->adapter), once); -+ goto exit; -+ } -+ -+ pxmitbuf = rtw_alloc_xmitbuf_ext(pxmitpriv); -+ if (pxmitbuf == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT" alloc xmitbuf fail\n", FUNC_ADPT_ARG(pxmitpriv->adapter)); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ pmgntframe = NULL; -+ goto exit; -+ } -+ -+ pmgntframe->frame_tag = MGNT_FRAMETAG; -+ pmgntframe->pxmitbuf = pxmitbuf; -+ pmgntframe->buf_addr = pxmitbuf->pbuf; -+ pxmitbuf->priv_data = pmgntframe; -+ -+exit: -+ return pmgntframe; -+ -+} -+ -+inline struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv) -+{ -+ return _alloc_mgtxmitframe(pxmitpriv, _FALSE); -+} -+ -+inline struct xmit_frame *alloc_mgtxmitframe_once(struct xmit_priv *pxmitpriv) -+{ -+ return _alloc_mgtxmitframe(pxmitpriv, _TRUE); -+} -+ -+ -+/**************************************************************************** -+ -+Following are some TX fuctions for WiFi MLME -+ -+*****************************************************************************/ -+ -+void update_mgnt_tx_rate(_adapter *padapter, u8 rate) -+{ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ -+ pmlmeext->tx_rate = rate; -+ /* RTW_INFO("%s(): rate = %x\n",__FUNCTION__, rate); */ -+} -+ -+ -+void update_monitor_frame_attrib(_adapter *padapter, struct pkt_attrib *pattrib) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 wireless_mode; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ psta = rtw_get_stainfo(pstapriv, pattrib->ra); -+ -+ pattrib->hdrlen = 24; -+ pattrib->nr_frags = 1; -+ pattrib->priority = 7; -+ pattrib->mac_id = RTW_DEFAULT_MGMT_MACID; -+ pattrib->qsel = QSLT_MGNT; -+ -+ pattrib->pktlen = 0; -+ -+ if (pmlmeext->tx_rate == IEEE80211_CCK_RATE_1MB) -+ wireless_mode = WIRELESS_11B; -+ else -+ wireless_mode = WIRELESS_11G; -+ -+ pattrib->raid = rtw_get_mgntframe_raid(padapter, wireless_mode); -+#ifdef CONFIG_80211AC_VHT -+ if (pHalData->rf_type == RF_1T1R) -+ pattrib->raid = RATEID_IDX_VHT_1SS; -+ else if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_2T4R) -+ pattrib->raid = RATEID_IDX_VHT_2SS; -+ else if (pHalData->rf_type == RF_3T3R) -+ pattrib->raid = RATEID_IDX_VHT_3SS; -+ else -+ pattrib->raid = RATEID_IDX_BGN_40M_1SS; -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ pattrib->rate = MGN_VHT1SS_MCS9; -+#else -+ pattrib->rate = MGN_MCS7; -+#endif -+ -+ pattrib->encrypt = _NO_PRIVACY_; -+ pattrib->bswenc = _FALSE; -+ -+ pattrib->qos_en = _FALSE; -+ pattrib->ht_en = 1; -+ pattrib->bwmode = CHANNEL_WIDTH_20; -+ pattrib->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ pattrib->sgi = _FALSE; -+ -+ pattrib->seqnum = pmlmeext->mgnt_seq; -+ -+ pattrib->retry_ctrl = _TRUE; -+ -+ pattrib->mbssid = 0; -+ pattrib->hw_ssn_sel = pxmitpriv->hw_ssn_seq_no; -+ -+} -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+void update_mgntframe_subtype(_adapter *padapter, struct xmit_frame *pmgntframe) -+{ -+ struct pkt_attrib *pattrib = &pmgntframe->attrib; -+ u8 *pframe; -+ u8 subtype, category ,action; -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ subtype = get_frame_sub_type(pframe); /* bit(7)~bit(2) */ -+ pattrib->subtype = subtype; -+ -+ rtw_action_frame_parse(pframe, pattrib->pktlen, &category, &action); -+ -+ if ((subtype == WIFI_ACTION && !(action == ACT_PUBLIC_FTM_REQ || action == ACT_PUBLIC_FTM)) || -+ subtype == WIFI_DISASSOC || subtype == WIFI_DEAUTH || -+ (subtype == WIFI_PROBERSP && MLME_IS_ADHOC(padapter))) -+ pattrib->ps_dontq = 0; -+ else -+ pattrib->ps_dontq = 1; -+} -+#endif -+ -+void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) -+{ -+ u8 wireless_mode; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ -+#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */ -+ -+ /* _rtw_memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib)); */ -+ -+ pattrib->hdrlen = 24; -+ pattrib->nr_frags = 1; -+ pattrib->priority = 7; -+ pattrib->mac_id = RTW_DEFAULT_MGMT_MACID; -+ pattrib->qsel = QSLT_MGNT; -+ -+#ifdef CONFIG_MCC_MODE -+ update_mcc_mgntframe_attrib(padapter, pattrib); -+#endif -+ -+ -+#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_ASOC_STATE)) -+#endif /* CONFIG_CONCURRENT_MODE */ -+ if (MLME_IS_GC(padapter)) { -+ if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) { -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ -+ psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); -+ if (psta) { -+ /* use macid sleep during NoA, mgmt frame use ac queue & ap macid */ -+ pattrib->mac_id = psta->cmn.mac_id; -+ pattrib->qsel = QSLT_VO; -+ } else { -+ if (pwdinfo->p2p_ps_state != P2P_PS_DISABLE) -+ RTW_ERR("%s , psta was NULL\n", __func__); -+ } -+ } -+ } -+#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */ -+ -+ pattrib->pktlen = 0; -+ -+ if (IS_CCK_RATE(pmlmeext->tx_rate)) -+ wireless_mode = WIRELESS_11B; -+ else -+ wireless_mode = WIRELESS_11G; -+ pattrib->raid = rtw_get_mgntframe_raid(padapter, wireless_mode); -+ pattrib->rate = pmlmeext->tx_rate; -+ -+ pattrib->encrypt = _NO_PRIVACY_; -+ pattrib->bswenc = _FALSE; -+ -+ pattrib->qos_en = _FALSE; -+ pattrib->ht_en = _FALSE; -+ pattrib->bwmode = CHANNEL_WIDTH_20; -+ pattrib->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ pattrib->sgi = _FALSE; -+ -+ pattrib->seqnum = pmlmeext->mgnt_seq; -+ -+ pattrib->retry_ctrl = _TRUE; -+ -+ pattrib->mbssid = 0; -+ pattrib->hw_ssn_sel = pxmitpriv->hw_ssn_seq_no; -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ pattrib->ps_dontq = 1; -+#endif -+} -+ -+void update_mgntframe_attrib_addr(_adapter *padapter, struct xmit_frame *pmgntframe) -+{ -+ u8 *pframe; -+ struct pkt_attrib *pattrib = &pmgntframe->attrib; -+#if defined(CONFIG_BEAMFORMING) || defined(CONFIG_ANTENNA_DIVERSITY) || defined(CONFIG_RTW_MGMT_QUEUE) -+ struct sta_info *sta = NULL; -+#endif -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(pframe), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, get_addr2_ptr(pframe), ETH_ALEN); -+ -+#if defined(CONFIG_BEAMFORMING) || defined(CONFIG_ANTENNA_DIVERSITY) || defined(CONFIG_RTW_MGMT_QUEUE) -+ sta = pattrib->psta; -+ if (!sta) { -+ sta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ pattrib->psta = sta; -+ } -+ -+ #ifdef CONFIG_BEAMFORMING -+ if (sta) -+ update_attrib_txbf_info(padapter, pattrib, sta); -+ #endif -+#endif /* defined(CONFIG_BEAMFORMING) || defined(CONFIG_ANTENNA_DIVERSITY) || defined(CONFIG_RTW_MGMT_QUEUE) */ -+} -+ -+void dump_mgntframe(_adapter *padapter, struct xmit_frame *pmgntframe) -+{ -+ if (RTW_CANNOT_RUN(padapter)) { -+ rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); -+ return; -+ } -+ -+ rtw_hal_mgnt_xmit(padapter, pmgntframe); -+} -+ -+s32 dump_mgntframe_and_wait(_adapter *padapter, struct xmit_frame *pmgntframe, int timeout_ms) -+{ -+ s32 ret = _FAIL; -+ _irqL irqL; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct xmit_buf *pxmitbuf = pmgntframe->pxmitbuf; -+ struct submit_ctx sctx; -+ -+ if (RTW_CANNOT_RUN(padapter)) { -+ rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); -+ return ret; -+ } -+ -+ rtw_sctx_init(&sctx, timeout_ms); -+ pxmitbuf->sctx = &sctx; -+ -+ ret = rtw_hal_mgnt_xmit(padapter, pmgntframe); -+ -+ if (ret == _SUCCESS -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ || ret == RTW_QUEUE_MGMT -+#endif -+ ) -+ ret = rtw_sctx_wait(&sctx, __func__); -+ -+ _enter_critical(&pxmitpriv->lock_sctx, &irqL); -+ pxmitbuf->sctx = NULL; -+ _exit_critical(&pxmitpriv->lock_sctx, &irqL); -+ -+ return ret; -+} -+ -+s32 dump_mgntframe_and_wait_ack_timeout(_adapter *padapter, struct xmit_frame *pmgntframe, int timeout_ms) -+{ -+#ifdef CONFIG_XMIT_ACK -+ static u8 seq_no = 0; -+ s32 ret = _FAIL; -+ struct xmit_priv *pxmitpriv = &(GET_PRIMARY_ADAPTER(padapter))->xmitpriv; -+ -+ if (RTW_CANNOT_RUN(padapter)) { -+ rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); -+ return -1; -+ } -+ -+ _enter_critical_mutex(&pxmitpriv->ack_tx_mutex, NULL); -+ pxmitpriv->ack_tx = _TRUE; -+ pxmitpriv->seq_no = seq_no++; -+ pmgntframe->ack_report = 1; -+ rtw_sctx_init(&(pxmitpriv->ack_tx_ops), timeout_ms); -+ -+ ret = rtw_hal_mgnt_xmit(padapter, pmgntframe); -+ -+ if (ret == _SUCCESS -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ || ret == RTW_QUEUE_MGMT -+#endif -+ ) -+ ret = rtw_sctx_wait(&(pxmitpriv->ack_tx_ops), __func__); -+ -+ pxmitpriv->ack_tx = _FALSE; -+ _exit_critical_mutex(&pxmitpriv->ack_tx_mutex, NULL); -+ -+ return ret; -+#else /* !CONFIG_XMIT_ACK */ -+ dump_mgntframe(padapter, pmgntframe); -+ rtw_msleep_os(50); -+ return _SUCCESS; -+#endif /* !CONFIG_XMIT_ACK */ -+} -+ -+s32 dump_mgntframe_and_wait_ack(_adapter *padapter, struct xmit_frame *pmgntframe) -+{ -+ /* In this case, use 500 ms as the default wait_ack timeout */ -+ return dump_mgntframe_and_wait_ack_timeout(padapter, pmgntframe, 500); -+} -+ -+ -+int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode) -+{ -+ u8 *ssid_ie; -+ sint ssid_len_ori; -+ int len_diff = 0; -+ -+ ssid_ie = rtw_get_ie(ies, WLAN_EID_SSID, &ssid_len_ori, ies_len); -+ -+ /* RTW_INFO("%s hidden_ssid_mode:%u, ssid_ie:%p, ssid_len_ori:%d\n", __FUNCTION__, hidden_ssid_mode, ssid_ie, ssid_len_ori); */ -+ -+ if (ssid_ie && ssid_len_ori > 0) { -+ switch (hidden_ssid_mode) { -+ case 1: { -+ u8 *next_ie = ssid_ie + 2 + ssid_len_ori; -+ u32 remain_len = 0; -+ -+ remain_len = ies_len - (next_ie - ies); -+ -+ ssid_ie[1] = 0; -+ _rtw_memcpy(ssid_ie + 2, next_ie, remain_len); -+ len_diff -= ssid_len_ori; -+ -+ break; -+ } -+ case 2: -+ _rtw_memset(&ssid_ie[2], 0, ssid_len_ori); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ return len_diff; -+} -+ -+#ifdef CONFIG_AP_MODE -+void issue_beacon(_adapter *padapter, int timeout_ms) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ unsigned int rate_len; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+#if defined(CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+#endif /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+#ifdef CONFIG_BCN_ICF -+ pmgntframe = rtw_alloc_bcnxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+#else -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+#endif -+ { -+ RTW_INFO("%s, alloc mgnt frame fail\n", __FUNCTION__); -+ return; -+ } -+#if defined(CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) -+ _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); -+#endif /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ pattrib->qsel = QSLT_BEACON; -+ -+#if defined(CONFIG_CONCURRENT_MODE) && (!defined(CONFIG_SWTIMER_BASED_TXBCN)) -+ if (padapter->hw_port == HW_PORT1) -+ pattrib->mbssid = 1; -+#endif -+#ifdef CONFIG_FW_HANDLE_TXBCN -+ if (padapter->vap_id != CONFIG_LIMITED_AP_NUM) -+ pattrib->mbssid = padapter->vap_id; -+#endif -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); -+ /* pmlmeext->mgnt_seq++; */ -+ set_frame_sub_type(pframe, WIFI_BEACON); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { -+ /* RTW_INFO("ie len=%d\n", cur_network->IELength); */ -+#ifdef CONFIG_P2P -+ /* for P2P : Primary Device Type & Device Name */ -+ u32 wpsielen = 0, insert_len = 0; -+ u8 *wpsie = NULL; -+ wpsie = rtw_get_wps_ie(cur_network->IEs + _FIXED_IE_LENGTH_, cur_network->IELength - _FIXED_IE_LENGTH_, NULL, &wpsielen); -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && wpsie && wpsielen > 0) { -+ uint wps_offset, remainder_ielen; -+ u8 *premainder_ie, *pframe_wscie; -+ -+ wps_offset = (uint)(wpsie - cur_network->IEs); -+ -+ premainder_ie = wpsie + wpsielen; -+ -+ remainder_ielen = cur_network->IELength - wps_offset - wpsielen; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (pmlmepriv->wps_beacon_ie && pmlmepriv->wps_beacon_ie_len > 0) { -+ _rtw_memcpy(pframe, cur_network->IEs, wps_offset); -+ pframe += wps_offset; -+ pattrib->pktlen += wps_offset; -+ -+ _rtw_memcpy(pframe, pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len); -+ pframe += pmlmepriv->wps_beacon_ie_len; -+ pattrib->pktlen += pmlmepriv->wps_beacon_ie_len; -+ -+ /* copy remainder_ie to pframe */ -+ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); -+ pframe += remainder_ielen; -+ pattrib->pktlen += remainder_ielen; -+ } else { -+ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); -+ pframe += cur_network->IELength; -+ pattrib->pktlen += cur_network->IELength; -+ } -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ pframe_wscie = pframe + wps_offset; -+ _rtw_memcpy(pframe, cur_network->IEs, wps_offset + wpsielen); -+ pframe += (wps_offset + wpsielen); -+ pattrib->pktlen += (wps_offset + wpsielen); -+ -+ /* now pframe is end of wsc ie, insert Primary Device Type & Device Name */ -+ /* Primary Device Type */ -+ /* Type: */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(WPS_ATTR_PRIMARY_DEV_TYPE); -+ insert_len += 2; -+ -+ /* Length: */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(0x0008); -+ insert_len += 2; -+ -+ /* Value: */ -+ /* Category ID */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(WPS_PDT_CID_MULIT_MEDIA); -+ insert_len += 2; -+ -+ /* OUI */ -+ *(u32 *)(pframe + insert_len) = cpu_to_be32(WPSOUI); -+ insert_len += 4; -+ -+ /* Sub Category ID */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(WPS_PDT_SCID_MEDIA_SERVER); -+ insert_len += 2; -+ -+ -+ /* Device Name */ -+ /* Type: */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); -+ insert_len += 2; -+ -+ /* Length: */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(pwdinfo->device_name_len); -+ insert_len += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(pframe + insert_len, pwdinfo->device_name, pwdinfo->device_name_len); -+ insert_len += pwdinfo->device_name_len; -+ -+ -+ /* update wsc ie length */ -+ *(pframe_wscie + 1) = (wpsielen - 2) + insert_len; -+ -+ /* pframe move to end */ -+ pframe += insert_len; -+ pattrib->pktlen += insert_len; -+ -+ /* copy remainder_ie to pframe */ -+ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); -+ pframe += remainder_ielen; -+ pattrib->pktlen += remainder_ielen; -+ } -+ } else -+#endif /* CONFIG_P2P */ -+ { -+ int len_diff; -+ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); -+ len_diff = update_hidden_ssid( -+ pframe + _BEACON_IE_OFFSET_ -+ , cur_network->IELength - _BEACON_IE_OFFSET_ -+ , pmlmeinfo->hidden_ssid_mode -+ ); -+ pframe += (cur_network->IELength + len_diff); -+ pattrib->pktlen += (cur_network->IELength + len_diff); -+ } -+ -+ { -+ u8 *wps_ie; -+ uint wps_ielen; -+ u8 sr = 0; -+ wps_ie = rtw_get_wps_ie(pmgntframe->buf_addr + TXDESC_OFFSET + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_, -+ pattrib->pktlen - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_, NULL, &wps_ielen); -+ if (wps_ie && wps_ielen > 0) -+ rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8 *)(&sr), NULL); -+ if (sr != 0) -+ set_fwstate(pmlmepriv, WIFI_UNDER_WPS); -+ else -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_WPS); -+ } -+ -+#ifdef CONFIG_P2P -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ u32 len; -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211) { -+ len = pmlmepriv->p2p_beacon_ie_len; -+ if (pmlmepriv->p2p_beacon_ie && len > 0) -+ _rtw_memcpy(pframe, pmlmepriv->p2p_beacon_ie, len); -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ len = build_beacon_p2p_ie(pwdinfo, pframe); -+ } -+ -+ pframe += len; -+ pattrib->pktlen += len; -+ -+#ifdef CONFIG_MCC_MODE -+ pframe = rtw_hal_mcc_append_go_p2p_ie(padapter, pframe, &pattrib->pktlen); -+#endif /* CONFIG_MCC_MODE*/ -+ -+#ifdef CONFIG_WFD -+ len = rtw_append_beacon_wfd_ie(padapter, pframe); -+ pframe += len; -+ pattrib->pktlen += len; -+#endif -+ } -+#endif /* CONFIG_P2P */ -+#ifdef CONFIG_RTW_REPEATER_SON -+ rtw_rson_append_ie(padapter, pframe, &pattrib->pktlen); -+#endif -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_BEACON_VENDOR_IE_BIT); -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); -+#endif/*CONFIG_RTL8812A*/ -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (padapter->tbtx_capability == _TRUE) -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 8, REALTEK_TBTX_IE, &pattrib->pktlen); -+#endif -+ -+ goto _issue_bcn; -+ -+ } -+ -+ /* below for ad-hoc mode */ -+ -+ /* timestamp will be inserted by hardware */ -+ pframe += 8; -+ pattrib->pktlen += 8; -+ -+ /* beacon interval: 2 bytes */ -+ -+ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); -+ -+ pframe += 2; -+ pattrib->pktlen += 2; -+ -+ /* capability info: 2 bytes */ -+ -+ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); -+ -+ pframe += 2; -+ pattrib->pktlen += 2; -+ -+ /* SSID */ -+ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen); -+ -+ /* supported rates... */ -+ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &pattrib->pktlen); -+ -+ /* DS parameter set */ -+ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); -+ -+ /* if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) */ -+ { -+ u8 erpinfo = 0; -+ u32 ATIMWindow; -+ /* IBSS Parameter Set... */ -+ /* ATIMWindow = cur->Configuration.ATIMWindow; */ -+ ATIMWindow = 0; -+ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pattrib->pktlen); -+ -+ /* ERP IE */ -+ pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pattrib->pktlen); -+ } -+ -+ -+ /* EXTERNDED SUPPORTED RATE */ -+ if (rate_len > 8) -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pattrib->pktlen); -+ -+ -+ /* todo:HT for adhoc */ -+ -+_issue_bcn: -+ -+#if defined(CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) -+ pmlmepriv->update_bcn = _FALSE; -+ -+ _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); -+#endif /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ -+ if ((pattrib->pktlen + TXDESC_SIZE) > MAX_BEACON_LEN) { -+ RTW_ERR("beacon frame too large ,len(%d,%d)\n", -+ (pattrib->pktlen + TXDESC_SIZE), MAX_BEACON_LEN); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ /* RTW_INFO("issue bcn_sz=%d\n", pattrib->last_txcmdsz); */ -+ if (timeout_ms > 0) -+ dump_mgntframe_and_wait(padapter, pmgntframe, timeout_ms); -+ else -+ dump_mgntframe(padapter, pmgntframe); -+ -+} -+#endif /* CONFIG_AP_MODE */ -+ -+void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probereq) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ unsigned char *mac, *bssid; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+#if defined(CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) -+ u8 *pwps_ie; -+ uint wps_ielen; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+#endif /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ unsigned int rate_len; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ if (da == NULL) -+ return; -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ return; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ RTW_INFO("%s, alloc mgnt frame fail\n", __FUNCTION__); -+ return; -+ } -+ -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ mac = adapter_mac_addr(padapter); -+ bssid = cur_network->MacAddress; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(fctrl, WIFI_PROBERSP); -+ -+ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = pattrib->hdrlen; -+ pframe += pattrib->hdrlen; -+ -+ -+ if (cur_network->IELength > MAX_IE_SZ) -+ return; -+ -+#if defined(CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { -+ pwps_ie = rtw_get_wps_ie(cur_network->IEs + _FIXED_IE_LENGTH_, cur_network->IELength - _FIXED_IE_LENGTH_, NULL, &wps_ielen); -+ -+ /* inerset & update wps_probe_resp_ie */ -+ if ((pmlmepriv->wps_probe_resp_ie != NULL) && pwps_ie && (wps_ielen > 0)) { -+ uint wps_offset, remainder_ielen; -+ u8 *premainder_ie; -+ -+ wps_offset = (uint)(pwps_ie - cur_network->IEs); -+ -+ premainder_ie = pwps_ie + wps_ielen; -+ -+ remainder_ielen = cur_network->IELength - wps_offset - wps_ielen; -+ -+ _rtw_memcpy(pframe, cur_network->IEs, wps_offset); -+ pframe += wps_offset; -+ pattrib->pktlen += wps_offset; -+ -+ wps_ielen = (uint)pmlmepriv->wps_probe_resp_ie[1];/* to get ie data len */ -+ if ((wps_offset + wps_ielen + 2) <= MAX_IE_SZ) { -+ _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, wps_ielen + 2); -+ pframe += wps_ielen + 2; -+ pattrib->pktlen += wps_ielen + 2; -+ } -+ -+ if ((wps_offset + wps_ielen + 2 + remainder_ielen) <= MAX_IE_SZ) { -+ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); -+ pframe += remainder_ielen; -+ pattrib->pktlen += remainder_ielen; -+ } -+ } else { -+ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); -+ pframe += cur_network->IELength; -+ pattrib->pktlen += cur_network->IELength; -+ } -+ -+ /* retrieve SSID IE from cur_network->Ssid */ -+ { -+ u8 *ssid_ie; -+ sint ssid_ielen; -+ sint ssid_ielen_diff; -+ u8 buf[MAX_IE_SZ]; -+ u8 *ies = pmgntframe->buf_addr + TXDESC_OFFSET + sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ ssid_ie = rtw_get_ie(ies + _FIXED_IE_LENGTH_, _SSID_IE_, &ssid_ielen, -+ (pframe - ies) - _FIXED_IE_LENGTH_); -+ -+ ssid_ielen_diff = cur_network->Ssid.SsidLength - ssid_ielen; -+ -+ if (ssid_ie && cur_network->Ssid.SsidLength) { -+ uint remainder_ielen; -+ u8 *remainder_ie; -+ remainder_ie = ssid_ie + 2; -+ remainder_ielen = (pframe - remainder_ie); -+ -+ if (remainder_ielen > MAX_IE_SZ) { -+ RTW_WARN(FUNC_ADPT_FMT" remainder_ielen > MAX_IE_SZ\n", FUNC_ADPT_ARG(padapter)); -+ remainder_ielen = MAX_IE_SZ; -+ } -+ -+ _rtw_memcpy(buf, remainder_ie, remainder_ielen); -+ _rtw_memcpy(remainder_ie + ssid_ielen_diff, buf, remainder_ielen); -+ *(ssid_ie + 1) = cur_network->Ssid.SsidLength; -+ _rtw_memcpy(ssid_ie + 2, cur_network->Ssid.Ssid, cur_network->Ssid.SsidLength); -+ -+ pframe += ssid_ielen_diff; -+ pattrib->pktlen += ssid_ielen_diff; -+ } -+ } -+#ifdef CONFIG_RTW_REPEATER_SON -+ rtw_rson_append_ie(padapter, pframe, &pattrib->pktlen); -+#endif -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_PROBERESP_VENDOR_IE_BIT); -+#endif -+ } else -+#endif -+ { -+ -+ /* timestamp will be inserted by hardware */ -+ pframe += 8; -+ pattrib->pktlen += 8; -+ -+ /* beacon interval: 2 bytes */ -+ -+ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); -+ -+ pframe += 2; -+ pattrib->pktlen += 2; -+ -+ /* capability info: 2 bytes */ -+ -+ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); -+ -+ pframe += 2; -+ pattrib->pktlen += 2; -+ -+ /* below for ad-hoc mode */ -+ -+ /* SSID */ -+ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen); -+ -+ /* supported rates... */ -+ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &pattrib->pktlen); -+ -+ /* DS parameter set */ -+ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); -+ -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { -+ u8 erpinfo = 0; -+ u32 ATIMWindow; -+ /* IBSS Parameter Set... */ -+ /* ATIMWindow = cur->Configuration.ATIMWindow; */ -+ ATIMWindow = 0; -+ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pattrib->pktlen); -+ -+ /* ERP IE */ -+ pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pattrib->pktlen); -+ } -+ -+ -+ /* EXTERNDED SUPPORTED RATE */ -+ if (rate_len > 8) -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pattrib->pktlen); -+ -+ -+ /* todo:HT for adhoc */ -+ -+ } -+ -+#ifdef CONFIG_P2P -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) -+ /* IOT issue, When wifi_spec is not set, send probe_resp with P2P IE even if probe_req has no P2P IE */ -+ && (is_valid_p2p_probereq || !padapter->registrypriv.wifi_spec)) { -+ u32 len; -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211) { -+ /* if pwdinfo->role == P2P_ROLE_DEVICE will call issue_probersp_p2p() */ -+ len = pmlmepriv->p2p_go_probe_resp_ie_len; -+ if (pmlmepriv->p2p_go_probe_resp_ie && len > 0) -+ _rtw_memcpy(pframe, pmlmepriv->p2p_go_probe_resp_ie, len); -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ len = build_probe_resp_p2p_ie(pwdinfo, pframe); -+ } -+ -+ pframe += len; -+ pattrib->pktlen += len; -+ -+#ifdef CONFIG_MCC_MODE -+ pframe = rtw_hal_mcc_append_go_p2p_ie(padapter, pframe, &pattrib->pktlen); -+#endif /* CONFIG_MCC_MODE*/ -+ -+#ifdef CONFIG_WFD -+ len = rtw_append_probe_resp_wfd_ie(padapter, pframe); -+ pframe += len; -+ pattrib->pktlen += len; -+#endif -+ } -+#endif /* CONFIG_P2P */ -+ -+ -+#ifdef CONFIG_AUTO_AP_MODE -+ { -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ RTW_INFO("(%s)\n", __FUNCTION__); -+ -+ /* check rc station */ -+ psta = rtw_get_stainfo(pstapriv, da); -+ if (psta && psta->isrc && psta->pid > 0) { -+ u8 RC_OUI[4] = {0x00, 0xE0, 0x4C, 0x0A}; -+ u8 RC_INFO[14] = {0}; -+ /* EID[1] + EID_LEN[1] + RC_OUI[4] + MAC[6] + PairingID[2] + ChannelNum[2] */ -+ u16 cu_ch = (u16)cur_network->Configuration.DSConfig; -+ -+ RTW_INFO("%s, reply rc(pid=0x%x) device "MAC_FMT" in ch=%d\n", __FUNCTION__, -+ psta->pid, MAC_ARG(psta->cmn.mac_addr), cu_ch); -+ -+ /* append vendor specific ie */ -+ _rtw_memcpy(RC_INFO, RC_OUI, sizeof(RC_OUI)); -+ _rtw_memcpy(&RC_INFO[4], mac, ETH_ALEN); -+ _rtw_memcpy(&RC_INFO[10], (u8 *)&psta->pid, 2); -+ _rtw_memcpy(&RC_INFO[12], (u8 *)&cu_ch, 2); -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(RC_INFO), RC_INFO, &pattrib->pktlen); -+ } -+ } -+#endif /* CONFIG_AUTO_AP_MODE */ -+ -+#ifdef CONFIG_RTL8812A -+ pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen); -+#endif/*CONFIG_RTL8812A*/ -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return; -+ -+} -+ -+int _issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 *da, u8 ch, bool append_wps, int wait_ack) -+{ -+ int ret = _FAIL; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ unsigned char *mac; -+ unsigned char bssrate[NumRates]; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ int bssrate_len = 0; -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+#endif -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ if ((pwdev_priv->pno_mac_addr[0] != 0xFF) -+ && (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) -+ && (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _FALSE)) -+ mac = pwdev_priv->pno_mac_addr; -+ else -+#endif -+ mac = adapter_mac_addr(padapter); -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ if (da) { -+ /* unicast probe request frame */ -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, da, ETH_ALEN); -+ } else { -+ /* broadcast probe request frame */ -+ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); -+ } -+ -+ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ if ((pwdev_priv->pno_mac_addr[0] != 0xFF) -+ && (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) -+ && (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _FALSE)) { -+#ifdef CONFIG_RTW_DEBUG -+ RTW_DBG("%s pno_scan_seq_num: %d\n", __func__, -+ pwdev_priv->pno_scan_seq_num); -+#endif -+ SetSeqNum(pwlanhdr, pwdev_priv->pno_scan_seq_num); -+ pattrib->seqnum = pwdev_priv->pno_scan_seq_num; -+ pattrib->qos_en = 1; -+ pwdev_priv->pno_scan_seq_num++; -+ } else -+#endif -+ { -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ } -+ set_frame_sub_type(pframe, WIFI_PROBEREQ); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ if (pssid && !MLME_IS_MESH(padapter)) -+ pframe = rtw_set_ie(pframe, _SSID_IE_, pssid->SsidLength, pssid->Ssid, &(pattrib->pktlen)); -+ else -+ pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &(pattrib->pktlen)); -+ -+ get_rate_set(padapter, bssrate, &bssrate_len); -+ -+ if (bssrate_len > 8) { -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); -+ } else -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); -+ -+ if (ch) -+ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, &ch, &pattrib->pktlen); -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ if (pssid) -+ pframe = rtw_set_ie_mesh_id(pframe, &pattrib->pktlen, pssid->Ssid, pssid->SsidLength); -+ else -+ pframe = rtw_set_ie_mesh_id(pframe, &pattrib->pktlen, NULL, 0); -+ } -+#endif -+ -+ if (append_wps) { -+ /* add wps_ie for wps2.0 */ -+ if (pmlmepriv->wps_probe_req_ie_len > 0 && pmlmepriv->wps_probe_req_ie) { -+ _rtw_memcpy(pframe, pmlmepriv->wps_probe_req_ie, pmlmepriv->wps_probe_req_ie_len); -+ pframe += pmlmepriv->wps_probe_req_ie_len; -+ pattrib->pktlen += pmlmepriv->wps_probe_req_ie_len; -+ /* pmlmepriv->wps_probe_req_ie_len = 0 ; */ /* reset to zero */ -+ } -+ } -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_PROBEREQ_VENDOR_IE_BIT); -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); -+#endif/*CONFIG_RTL8812A*/ -+ -+ -+#ifdef CONFIG_RTW_MBO -+ rtw_mbo_build_probe_req_ies( padapter, &pframe, pattrib); -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ return ret; -+} -+ -+inline void issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 *da) -+{ -+ _issue_probereq(padapter, pssid, da, 0, 1, _FALSE); -+} -+ -+/* -+ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT -+ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX -+ * try_cnt means the maximal TX count to try -+ */ -+int issue_probereq_ex(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 *da, u8 ch, bool append_wps, -+ int try_cnt, int wait_ms) -+{ -+ int ret = _FAIL; -+ int i = 0; -+ systime start = rtw_get_current_time(); -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ do { -+ ret = _issue_probereq(padapter, pssid, da, ch, append_wps, wait_ms > 0 ? _TRUE : _FALSE); -+ -+ i++; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ break; -+ -+ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) -+ rtw_msleep_os(wait_ms); -+ -+ } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); -+ -+ if (ret != _FAIL) { -+ ret = _SUCCESS; -+#ifndef DBG_XMIT_ACK -+ goto exit; -+#endif -+ } -+ -+ if (try_cnt && wait_ms) { -+ if (da) -+ RTW_INFO(FUNC_ADPT_FMT" to "MAC_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), MAC_ARG(da), rtw_get_oper_ch(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), rtw_get_oper_ch(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ } -+exit: -+ return ret; -+} -+ -+/* if psta == NULL, indiate we are station(client) now... */ -+void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ unsigned int val32; -+ unsigned short val16; -+ int use_shared_key = 0; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ return; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_AUTH); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ -+ if (psta) { /* for AP mode */ -+#ifdef CONFIG_NATIVEAP_MLME -+ -+ _rtw_memcpy(pwlanhdr->addr1, psta->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ -+ /* setting auth algo number */ -+ val16 = (u16)psta->authalg; -+ -+ if (status != _STATS_SUCCESSFUL_) -+ val16 = 0; -+ -+ if (val16) { -+ val16 = cpu_to_le16(val16); -+ use_shared_key = 1; -+ } -+ -+ pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); -+ -+ /* setting auth seq number */ -+ val16 = (u16)psta->auth_seq; -+ val16 = cpu_to_le16(val16); -+ pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); -+ -+ /* setting status code... */ -+ val16 = status; -+ val16 = cpu_to_le16(val16); -+ pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&val16, &(pattrib->pktlen)); -+ -+ /* added challenging text... */ -+ if ((psta->auth_seq == 2) && (psta->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) -+ pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, psta->chg_txt, &(pattrib->pktlen)); -+#endif -+ } else { -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_roam(padapter)) { -+ /* 2: 802.11R FTAA */ -+ val16 = cpu_to_le16(2); -+ } else -+#endif -+ { -+ /* setting auth algo number */ -+ val16 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) ? 1 : 0; /* 0:OPEN System, 1:Shared key */ -+ if (val16) { -+ val16 = cpu_to_le16(val16); -+ use_shared_key = 1; -+ } -+ } -+ -+ /* RTW_INFO("%s auth_algo= %s auth_seq=%d\n",__FUNCTION__,(pmlmeinfo->auth_algo==0)?"OPEN":"SHARED",pmlmeinfo->auth_seq); */ -+ -+ /* setting IV for auth seq #3 */ -+ if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) { -+ /* RTW_INFO("==> iv(%d),key_index(%d)\n",pmlmeinfo->iv,pmlmeinfo->key_index); */ -+ val32 = ((pmlmeinfo->iv++) | (pmlmeinfo->key_index << 30)); -+ val32 = cpu_to_le32(val32); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&val32, &(pattrib->pktlen)); -+ -+ pattrib->iv_len = 4; -+ } -+ -+ pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); -+ -+ /* setting auth seq number */ -+ val16 = pmlmeinfo->auth_seq; -+ val16 = cpu_to_le16(val16); -+ pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); -+ -+ -+ /* setting status code... */ -+ val16 = status; -+ val16 = cpu_to_le16(val16); -+ pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&val16, &(pattrib->pktlen)); -+ -+#ifdef CONFIG_RTW_80211R -+ rtw_ft_build_auth_req_ies(padapter, pattrib, &pframe); -+#endif -+ -+ /* then checking to see if sending challenging text... */ -+ if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) { -+ pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, pmlmeinfo->chg_txt, &(pattrib->pktlen)); -+ -+ SetPrivacy(fctrl); -+ -+ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pattrib->encrypt = _WEP40_; -+ -+ pattrib->icv_len = 4; -+ -+ pattrib->pktlen += pattrib->icv_len; -+ -+ } -+ -+ } -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ rtw_wep_encrypt(padapter, (u8 *)pmgntframe); -+ RTW_INFO("%s\n", __FUNCTION__); -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return; -+} -+ -+ -+void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *pstat, int pkt_type) -+{ -+#ifdef CONFIG_AP_MODE -+ struct xmit_frame *pmgntframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct pkt_attrib *pattrib; -+ unsigned char *pbuf, *pframe; -+ unsigned short val, ie_status; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); -+ u8 *ie = pnetwork->IEs, cap[5], i; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+#endif /* CONFIG_P2P */ -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ return; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy((void *)GetAddr1Ptr(pwlanhdr), pstat->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy((void *)get_addr2_ptr(pwlanhdr), adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy((void *)GetAddr3Ptr(pwlanhdr), get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ if ((pkt_type == WIFI_ASSOCRSP) || (pkt_type == WIFI_REASSOCRSP)) -+ set_frame_sub_type(pwlanhdr, pkt_type); -+ else -+ return; -+ -+ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen += pattrib->hdrlen; -+ pframe += pattrib->hdrlen; -+ -+ /* capability */ -+ val = *(unsigned short *)rtw_get_capability_from_ie(ie); -+#ifdef CONFIG_RTW_80211K -+ val |= cap_RM; -+#endif -+ pframe = rtw_set_fixed_ie(pframe, _CAPABILITY_ , (unsigned char *)&val, &(pattrib->pktlen)); -+ -+ ie_status = cpu_to_le16(status); -+ pframe = rtw_set_fixed_ie(pframe , _STATUS_CODE_ , (unsigned char *)&ie_status, &(pattrib->pktlen)); -+ -+ val = cpu_to_le16(pstat->cmn.aid | BIT(14) | BIT(15)); -+ pframe = rtw_set_fixed_ie(pframe, _ASOC_ID_ , (unsigned char *)&val, &(pattrib->pktlen)); -+ -+ if (pstat->bssratelen <= 8) -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, pstat->bssratelen, pstat->bssrateset, &(pattrib->pktlen)); -+ else { -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pstat->bssrateset, &(pattrib->pktlen)); -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (pstat->bssratelen - 8), pstat->bssrateset + 8, &(pattrib->pktlen)); -+ } -+ -+#ifdef CONFIG_IEEE80211W -+ if (status == _STATS_REFUSED_TEMPORARILY_) { -+ u8 timeout_itvl[5]; -+ u32 timeout_interval = 3000; -+ /* Association Comeback time */ -+ timeout_itvl[0] = 0x03; -+ timeout_interval = cpu_to_le32(timeout_interval); -+ _rtw_memcpy(timeout_itvl + 1, &timeout_interval, 4); -+ pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); -+ } -+#endif /* CONFIG_IEEE80211W */ -+ -+#ifdef CONFIG_80211N_HT -+ if ((pstat->flags & WLAN_STA_HT) && (pmlmepriv->htpriv.ht_option)) { -+ uint ie_len = 0; -+ -+ /* FILL HT CAP INFO IE */ -+ /* p = hostapd_eid_ht_capabilities_info(hapd, p); */ -+ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (pbuf && ie_len > 0) { -+ _rtw_memcpy(pframe, pbuf, ie_len + 2); -+ pframe += (ie_len + 2); -+ pattrib->pktlen += (ie_len + 2); -+ } -+ -+ /* FILL HT ADD INFO IE */ -+ /* p = hostapd_eid_ht_operation(hapd, p); */ -+ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (pbuf && ie_len > 0) { -+ _rtw_memcpy(pframe, pbuf, ie_len + 2); -+ pframe += (ie_len + 2); -+ pattrib->pktlen += (ie_len + 2); -+ } -+ -+ } -+#endif -+ -+ /*adding EXT_CAPAB_IE */ -+ if (pmlmepriv->ext_capab_ie_len > 0) { -+ uint ie_len = 0; -+ -+ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_CAP_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (pbuf && ie_len > 0) { -+ _rtw_memcpy(pframe, pbuf, ie_len + 2); -+ pframe += (ie_len + 2); -+ pattrib->pktlen += (ie_len + 2); -+ } -+ } -+ -+#ifdef CONFIG_80211AC_VHT -+ if ((pstat->flags & WLAN_STA_VHT) && (pmlmepriv->vhtpriv.vht_option) -+ && (pstat->wpa_pairwise_cipher != WPA_CIPHER_TKIP) -+ && (pstat->wpa2_pairwise_cipher != WPA_CIPHER_TKIP)) { -+ u32 ie_len = 0; -+ -+ /* FILL VHT CAP IE */ -+ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (pbuf && ie_len > 0) { -+ _rtw_memcpy(pframe, pbuf, ie_len + 2); -+ pframe += (ie_len + 2); -+ pattrib->pktlen += (ie_len + 2); -+ } -+ -+ /* FILL VHT OPERATION IE */ -+ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, EID_VHTOperation, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (pbuf && ie_len > 0) { -+ _rtw_memcpy(pframe, pbuf, ie_len + 2); -+ pframe += (ie_len + 2); -+ pattrib->pktlen += (ie_len + 2); -+ } -+ } -+#endif /* CONFIG_80211AC_VHT */ -+ -+#ifdef CONFIG_RTW_80211K -+ /* FILL RM Enabled Capabilities with joint capabilities */ -+ for (i = 0; i < 5; i++) { -+ cap[i] = padapter->rmpriv.rm_en_cap_def[i] -+ & pstat->rm_en_cap[i]; -+ } -+ if (pstat->capability & cap_RM) -+ pframe = rtw_set_ie(pframe, _EID_RRM_EN_CAP_IE_, 5, -+ (u8 *)cap, &(pattrib->pktlen)); -+#endif /* CONFIG_RTW_80211K */ -+ -+ /* FILL WMM IE */ -+ if ((pstat->flags & WLAN_STA_WME) && (pmlmepriv->qospriv.qos_option)) { -+ uint ie_len = 0; -+ unsigned char WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; -+ -+ for (pbuf = ie + _BEACON_IE_OFFSET_; ; pbuf += (ie_len + 2)) { -+ pbuf = rtw_get_ie(pbuf, _VENDOR_SPECIFIC_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); -+ if (pbuf && _rtw_memcmp(pbuf + 2, WMM_PARA_IE, 6)) { -+ _rtw_memcpy(pframe, pbuf, ie_len + 2); -+ pframe += (ie_len + 2); -+ pattrib->pktlen += (ie_len + 2); -+ -+ break; -+ } -+ -+ if ((pbuf == NULL) || (ie_len == 0)) -+ break; -+ } -+ -+ } -+ -+ -+ if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK) -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6 , REALTEK_96B_IE, &(pattrib->pktlen)); -+ -+ /* add WPS IE ie for wps 2.0 */ -+ if (pmlmepriv->wps_assoc_resp_ie && pmlmepriv->wps_assoc_resp_ie_len > 0) { -+ _rtw_memcpy(pframe, pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len); -+ -+ pframe += pmlmepriv->wps_assoc_resp_ie_len; -+ pattrib->pktlen += pmlmepriv->wps_assoc_resp_ie_len; -+ } -+ -+#ifdef CONFIG_P2P -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && (pstat->is_p2p_device == _TRUE)) { -+ u32 len; -+ -+ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) { -+ len = 0; -+ if (pmlmepriv->p2p_assoc_resp_ie && pmlmepriv->p2p_assoc_resp_ie_len > 0) { -+ len = pmlmepriv->p2p_assoc_resp_ie_len; -+ _rtw_memcpy(pframe, pmlmepriv->p2p_assoc_resp_ie, len); -+ } -+ } else -+ len = build_assoc_resp_p2p_ie(pwdinfo, pframe, pstat->p2p_status_code); -+ pframe += len; -+ pattrib->pktlen += len; -+ } -+ -+#ifdef CONFIG_WFD -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ wfdielen = rtw_append_assoc_resp_wfd_ie(padapter, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+ } -+#endif -+ -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_RTW_MULTI_AP -+ if (padapter->multi_ap && (pstat->flags & WLAN_STA_MULTI_AP)) -+ pframe = rtw_set_multi_ap_ie_ext(pframe, &pattrib->pktlen, padapter->multi_ap); -+#endif -+ -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_ASSOCRESP_VENDOR_IE_BIT); -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); -+#endif/*CONFIG_RTL8812A*/ -+ -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (padapter->tbtx_capability == _TRUE) -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 8, REALTEK_TBTX_IE, &pattrib->pktlen); -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+#endif -+} -+ -+static u32 rtw_append_assoc_req_owe_ie(_adapter *adapter, u8 *pbuf) -+{ -+ struct security_priv *sec = &adapter->securitypriv; -+ u32 len = 0; -+ -+ if (sec == NULL) -+ goto exit; -+ -+ if (sec->owe_ie_len > 0) { -+ len = sec->owe_ie_len; -+ _rtw_memcpy(pbuf, sec->owe_ie, len); -+ } -+ -+exit: -+ return len; -+} -+ -+void _issue_assocreq(_adapter *padapter, u8 is_reassoc) -+{ -+ int ret = _FAIL; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ unsigned short val16; -+ unsigned int i, j, index = 0; -+ unsigned char bssrate[NumRates], sta_bssrate[NumRates]; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ int bssrate_len = 0, sta_bssrate_len = 0; -+ u8 vs_ie_length = 0; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 p2pie[255] = { 0x00 }; -+ u16 p2pielen = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+#endif /* CONFIG_P2P */ -+ -+#if CONFIG_DFS -+ u16 cap; -+#endif -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ if (is_reassoc == _TRUE) -+ set_frame_sub_type(pframe, WIFI_REASSOCREQ); -+ else -+ set_frame_sub_type(pframe, WIFI_ASSOCREQ); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ /* caps */ -+ -+#if CONFIG_DFS -+ _rtw_memcpy(&cap, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); -+ cap |= cap_SpecMgmt; -+#ifdef CONFIG_RTW_80211K -+ cap |= cap_RM; -+#endif -+ _rtw_memcpy(pframe, &cap, 2); -+#else -+ _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); -+#endif -+ -+ pframe += 2; -+ pattrib->pktlen += 2; -+ -+ /* listen interval */ -+ /* todo: listen interval for power saving */ -+ val16 = cpu_to_le16(3); -+ _rtw_memcpy(pframe , (unsigned char *)&val16, 2); -+ pframe += 2; -+ pattrib->pktlen += 2; -+ -+ /*Construct Current AP Field for Reassoc-Req only*/ -+ if (is_reassoc == _TRUE) { -+ _rtw_memcpy(pframe, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ pframe += ETH_ALEN; -+ pattrib->pktlen += ETH_ALEN; -+ } -+ -+ /* SSID */ -+ pframe = rtw_set_ie(pframe, _SSID_IE_, pmlmeinfo->network.Ssid.SsidLength, pmlmeinfo->network.Ssid.Ssid, &(pattrib->pktlen)); -+ -+#if CONFIG_IEEE80211_BAND_5GHZ && CONFIG_DFS -+ /* Dot H */ -+ if (pmlmeext->cur_channel > 14) { -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ u8 pow_cap_ele[2] = { 0x00 }; -+ u8 sup_ch[30 * 2] = {0x00 }, sup_ch_idx = 0, idx_5g = 2; /* For supported channel */ -+ -+ pow_cap_ele[0] = 13; /* Minimum transmit power capability */ -+ pow_cap_ele[1] = 21; /* Maximum transmit power capability */ -+ pframe = rtw_set_ie(pframe, EID_PowerCap, 2, pow_cap_ele, &(pattrib->pktlen)); -+ -+ /* supported channels */ -+ while (sup_ch_idx < rfctl->max_chan_nums && rfctl->channel_set[sup_ch_idx].ChannelNum != 0) { -+ if (rfctl->channel_set[sup_ch_idx].ChannelNum <= 14) { -+ /* TODO: fix 2.4G supported channel when channel doesn't start from 1 and continuous */ -+ sup_ch[0] = 1; /* First channel number */ -+ sup_ch[1] = rfctl->channel_set[sup_ch_idx].ChannelNum; /* Number of channel */ -+ } else { -+ sup_ch[idx_5g++] = rfctl->channel_set[sup_ch_idx].ChannelNum; -+ sup_ch[idx_5g++] = 1; -+ } -+ sup_ch_idx++; -+ } -+ pframe = rtw_set_ie(pframe, EID_SupportedChannels, idx_5g, sup_ch, &(pattrib->pktlen)); -+ } -+#endif /* CONFIG_IEEE80211_BAND_5GHZ && CONFIG_DFS */ -+ -+ /* supported rate & extended supported rate */ -+ -+#if 1 /* Check if the AP's supported rates are also supported by STA. */ -+ get_rate_set(padapter, sta_bssrate, &sta_bssrate_len); -+ /* RTW_INFO("sta_bssrate_len=%d\n", sta_bssrate_len); */ -+ -+ if (pmlmeext->cur_channel == 14) /* for JAPAN, channel 14 can only uses B Mode(CCK) */ -+ sta_bssrate_len = 4; -+ -+ -+ /* for (i = 0; i < sta_bssrate_len; i++) { */ -+ /* RTW_INFO("sta_bssrate[%d]=%02X\n", i, sta_bssrate[i]); */ -+ /* } */ -+ -+ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { -+ if (pmlmeinfo->network.SupportedRates[i] == 0) -+ break; -+ RTW_INFO("network.SupportedRates[%d]=%02X\n", i, pmlmeinfo->network.SupportedRates[i]); -+ } -+ -+ -+ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { -+ if (pmlmeinfo->network.SupportedRates[i] == 0) -+ break; -+ -+ -+ /* Check if the AP's supported rates are also supported by STA. */ -+ for (j = 0; j < sta_bssrate_len; j++) { -+ /* Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP */ -+ if ((pmlmeinfo->network.SupportedRates[i] | IEEE80211_BASIC_RATE_MASK) -+ == (sta_bssrate[j] | IEEE80211_BASIC_RATE_MASK)) { -+ /* RTW_INFO("match i = %d, j=%d\n", i, j); */ -+ break; -+ } else { -+ /* RTW_INFO("not match: %02X != %02X\n", (pmlmeinfo->network.SupportedRates[i]|IEEE80211_BASIC_RATE_MASK), (sta_bssrate[j]|IEEE80211_BASIC_RATE_MASK)); */ -+ } -+ } -+ -+ if (j == sta_bssrate_len) { -+ /* the rate is not supported by STA */ -+ RTW_INFO("%s(): the rate[%d]=%02X is not supported by STA!\n", __FUNCTION__, i, pmlmeinfo->network.SupportedRates[i]); -+ } else { -+ /* the rate is supported by STA */ -+ bssrate[index++] = pmlmeinfo->network.SupportedRates[i]; -+ } -+ } -+ -+ bssrate_len = index; -+ RTW_INFO("bssrate_len = %d\n", bssrate_len); -+ -+#else /* Check if the AP's supported rates are also supported by STA. */ -+#if 0 -+ get_rate_set(padapter, bssrate, &bssrate_len); -+#else -+ for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) { -+ if (pmlmeinfo->network.SupportedRates[bssrate_len] == 0) -+ break; -+ -+ if (pmlmeinfo->network.SupportedRates[bssrate_len] == 0x2C) /* Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP */ -+ break; -+ -+ bssrate[bssrate_len] = pmlmeinfo->network.SupportedRates[bssrate_len]; -+ } -+#endif -+#endif /* Check if the AP's supported rates are also supported by STA. */ -+ -+ if ((bssrate_len == 0) && (pmlmeinfo->network.SupportedRates[0] != 0)) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; /* don't connect to AP if no joint supported rate */ -+ } -+ -+ -+ if (bssrate_len > 8) { -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); -+ } else if (bssrate_len > 0) -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); -+ else -+ RTW_INFO("%s: Connect to AP without 11b and 11g data rate!\n", __FUNCTION__); -+ -+#ifdef CONFIG_RTW_MBO -+ rtw_mbo_build_assoc_req_ies(padapter, &pframe, pattrib); -+#endif -+#ifdef CONFIG_RTW_80211R -+ rtw_ft_build_assoc_req_ies(padapter, is_reassoc, pattrib, &pframe); -+#endif -+#ifdef CONFIG_RTW_80211K -+ pframe = rtw_set_ie(pframe, _EID_RRM_EN_CAP_IE_, 5, -+ (u8 *)padapter->rmpriv.rm_en_cap_def, -+ &(pattrib->pktlen)); -+#endif /* CONFIG_RTW_80211K */ -+ -+ /* vendor specific IE, such as WPA, WMM, WPS */ -+ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i); -+ -+ switch (pIE->ElementID) { -+ case _VENDOR_SPECIFIC_IE_: -+ if ((_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4)) || -+ (_rtw_memcmp(pIE->data, WMM_OUI, 4)) || -+ (_rtw_memcmp(pIE->data, WPS_OUI, 4))) { -+ vs_ie_length = pIE->Length; -+ if ((!padapter->registrypriv.wifi_spec) && (_rtw_memcmp(pIE->data, WPS_OUI, 4))) { -+ /* Commented by Kurt 20110629 */ -+ /* In some older APs, WPS handshake */ -+ /* would be fail if we append vender extensions informations to AP */ -+ -+ vs_ie_length = 14; -+ } -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, vs_ie_length, pIE->data, &(pattrib->pktlen)); -+ } -+ break; -+ -+ case EID_WPA2: -+#ifdef CONFIG_RTW_80211R -+ if ((is_reassoc) && (rtw_ft_roam(padapter))) { -+ rtw_ft_update_rsnie(padapter, _TRUE, pattrib, &pframe); -+ } else -+#endif -+ { -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (rtw_sec_chk_auth_alg(padapter, WLAN_AUTH_OPEN) && -+ rtw_sec_chk_auth_type(padapter, MLME_AUTHTYPE_SAE)) { -+ s32 entry = rtw_cached_pmkid(padapter, pmlmepriv->assoc_bssid); -+ -+ rtw_rsn_sync_pmkid(padapter, (u8 *)pIE, (pIE->Length + 2), entry); -+ } -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ pframe = rtw_set_ie(pframe, EID_WPA2, pIE->Length, pIE->data, &(pattrib->pktlen)); -+ } -+ break; -+#ifdef CONFIG_80211N_HT -+ case EID_HTCapability: -+ if (padapter->mlmepriv.htpriv.ht_option == _TRUE) { -+ if (!(is_ap_in_tkip(padapter))) { -+ _rtw_memcpy(&(pmlmeinfo->HT_caps), pIE->data, sizeof(struct HT_caps_element)); -+ -+ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info = cpu_to_le16(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info); -+ -+ pframe = rtw_set_ie(pframe, EID_HTCapability, pIE->Length , (u8 *)(&(pmlmeinfo->HT_caps)), &(pattrib->pktlen)); -+ } -+ } -+ break; -+ -+ case EID_EXTCapability: -+ if (padapter->mlmepriv.htpriv.ht_option == _TRUE) -+ pframe = rtw_set_ie(pframe, EID_EXTCapability, pIE->Length, pIE->data, &(pattrib->pktlen)); -+ break; -+#endif /* CONFIG_80211N_HT */ -+#ifdef CONFIG_80211AC_VHT -+ case EID_VHTCapability: -+ if (padapter->mlmepriv.vhtpriv.vht_option == _TRUE) -+ pframe = rtw_set_ie(pframe, EID_VHTCapability, pIE->Length, pIE->data, &(pattrib->pktlen)); -+ break; -+ -+ case EID_OpModeNotification: -+ if (padapter->mlmepriv.vhtpriv.vht_option == _TRUE) -+ pframe = rtw_set_ie(pframe, EID_OpModeNotification, pIE->Length, pIE->data, &(pattrib->pktlen)); -+ break; -+#endif /* CONFIG_80211AC_VHT */ -+ default: -+ break; -+ } -+ -+ i += (pIE->Length + 2); -+ } -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (padapter->tbtx_capability == _TRUE) -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 8 , REALTEK_TBTX_IE, &(pattrib->pktlen)); -+#endif -+ -+ if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK) -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6 , REALTEK_96B_IE, &(pattrib->pktlen)); -+ -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ rtw_build_assoc_req_wapi_ie(padapter, pframe, pattrib); -+#endif -+ -+ -+#ifdef CONFIG_P2P -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (pmlmepriv->p2p_assoc_req_ie && pmlmepriv->p2p_assoc_req_ie_len > 0) { -+ _rtw_memcpy(pframe, pmlmepriv->p2p_assoc_req_ie, pmlmepriv->p2p_assoc_req_ie_len); -+ pframe += pmlmepriv->p2p_assoc_req_ie_len; -+ pattrib->pktlen += pmlmepriv->p2p_assoc_req_ie_len; -+ } -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { -+ /* Should add the P2P IE in the association request frame. */ -+ /* P2P OUI */ -+ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20101109 */ -+ /* According to the P2P Specification, the association request frame should contain 3 P2P attributes */ -+ /* 1. P2P Capability */ -+ /* 2. Extended Listen Timing */ -+ /* 3. Device Info */ -+ /* Commented by Albert 20110516 */ -+ /* 4. P2P Interface */ -+ -+ /* P2P Capability */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CAPABILITY; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Device Capability Bitmap, 1 byte */ -+ p2pie[p2pielen++] = DMP_P2P_DEVCAP_SUPPORT; -+ -+ /* Group Capability Bitmap, 1 byte */ -+ if (pwdinfo->persistent_supported) -+ p2pie[p2pielen++] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; -+ else -+ p2pie[p2pielen++] = DMP_P2P_GRPCAP_SUPPORT; -+ -+ /* Extended Listen Timing */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_EX_LISTEN_TIMING; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0004); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Availability Period */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0xFFFF); -+ p2pielen += 2; -+ -+ /* Availability Interval */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0xFFFF); -+ p2pielen += 2; -+ -+ /* Device Info */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* 21->P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) */ -+ /* + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(21 + pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address */ -+ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* Config Method */ -+ /* This field should be big endian. Noted by P2P specification. */ -+ if ((pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PEER_DISPLAY_PIN) || -+ (pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_SELF_DISPLAY_PIN)) -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_CONFIG_METHOD_DISPLAY); -+ else -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_CONFIG_METHOD_PBC); -+ -+ p2pielen += 2; -+ -+ /* Primary Device Type */ -+ /* Category ID */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_PDT_CID_MULIT_MEDIA); -+ p2pielen += 2; -+ -+ /* OUI */ -+ *(u32 *)(p2pie + p2pielen) = cpu_to_be32(WPSOUI); -+ p2pielen += 4; -+ -+ /* Sub Category ID */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_PDT_SCID_MEDIA_SERVER); -+ p2pielen += 2; -+ -+ /* Number of Secondary Device Types */ -+ p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */ -+ -+ /* Device Name */ -+ /* Type: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); -+ p2pielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len); -+ p2pielen += pwdinfo->device_name_len; -+ -+ /* P2P Interface */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_INTERFACE; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x000D); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN); /* P2P Device Address */ -+ p2pielen += ETH_ALEN; -+ -+ p2pie[p2pielen++] = 1; /* P2P Interface Address Count */ -+ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN); /* P2P Interface Address List */ -+ p2pielen += ETH_ALEN; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen); -+ } -+ } -+ -+#ifdef CONFIG_WFD -+ wfdielen = rtw_append_assoc_req_wfd_ie(padapter, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_RTW_MULTI_AP -+ if (padapter->multi_ap) -+ pframe = rtw_set_multi_ap_ie_ext(pframe, &pattrib->pktlen, padapter->multi_ap); -+#endif -+ -+ /* OWE */ -+ { -+ u32 owe_ie_len; -+ -+ owe_ie_len = rtw_append_assoc_req_owe_ie(padapter, pframe); -+ pframe += owe_ie_len; -+ pattrib->pktlen += owe_ie_len; -+ } -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ rtw_rson_append_ie(padapter, pframe, &pattrib->pktlen); -+#endif -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_ASSOCREQ_VENDOR_IE_BIT); -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); -+#endif/*CONFIG_RTL8812A*/ -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ -+ ret = _SUCCESS; -+ -+exit: -+ if (ret == _SUCCESS) { -+ rtw_buf_update(&pmlmepriv->assoc_req, &pmlmepriv->assoc_req_len, (u8 *)pwlanhdr, pattrib->pktlen); -+ #ifdef CONFIG_RTW_WNM -+ if (is_reassoc == _TRUE) -+ rtw_wnm_update_reassoc_req_ie(padapter); -+ #endif -+ } else -+ rtw_buf_free(&pmlmepriv->assoc_req, &pmlmepriv->assoc_req_len); -+ -+ return; -+} -+ -+void issue_assocreq(_adapter *padapter) -+{ -+ _issue_assocreq(padapter, _FALSE); -+} -+ -+void issue_reassocreq(_adapter *padapter) -+{ -+ _issue_assocreq(padapter, _TRUE); -+} -+ -+/* when wait_ack is ture, this function shoule be called at process context */ -+static int _issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mode, int wait_ack) -+{ -+ int ret = _FAIL; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv; -+ struct mlme_ext_priv *pmlmeext; -+ struct mlme_ext_info *pmlmeinfo; -+ u8 a4_shift; -+ -+ /* RTW_INFO("%s:%d\n", __FUNCTION__, power_mode); */ -+ -+ if (!padapter) -+ goto exit; -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ pxmitpriv = &(padapter->xmitpriv); -+ pmlmeext = &(padapter->mlmeextpriv); -+ pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ pattrib->retry_ctrl = _FALSE; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ if (MLME_IS_AP(padapter)) -+ SetFrDs(fctrl); -+ else if (MLME_IS_STA(padapter)) -+ SetToDs(fctrl); -+ else if (MLME_IS_MESH(padapter)) { -+ SetToDs(fctrl); -+ SetFrDs(fctrl); -+ } -+ -+ if (power_mode) -+ SetPwrMgt(fctrl); -+ -+ if (get_tofr_ds(fctrl) == 3) { -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr4, adapter_mac_addr(padapter), ETH_ALEN); -+ a4_shift = ETH_ALEN; -+ pattrib->hdrlen += ETH_ALEN; -+ } else { -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ a4_shift = 0; -+ } -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_DATA_NULL); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr) + a4_shift; -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr) + a4_shift; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ return ret; -+} -+ -+/* -+ * When wait_ms > 0, this function should be called at process context -+ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT -+ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX -+ * try_cnt means the maximal TX count to try -+ * da == NULL for station mode -+ */ -+int issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms) -+{ -+ int ret = _FAIL; -+ int i = 0; -+ systime start = rtw_get_current_time(); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ /* da == NULL, assum it's null data for sta to ap */ -+ if (da == NULL) -+ da = get_my_bssid(&(pmlmeinfo->network)); -+ -+ do { -+ ret = _issue_nulldata(padapter, da, power_mode, wait_ms > 0 ? _TRUE : _FALSE); -+ -+ i++; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ break; -+ -+ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) -+ rtw_msleep_os(wait_ms); -+ -+ } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); -+ -+ if (ret != _FAIL) { -+ ret = _SUCCESS; -+#ifndef DBG_XMIT_ACK -+ goto exit; -+#endif -+ } -+ -+ if (try_cnt && wait_ms) { -+ if (da) -+ RTW_INFO(FUNC_ADPT_FMT" to "MAC_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), MAC_ARG(da), rtw_get_oper_ch(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), rtw_get_oper_ch(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ } -+exit: -+ return ret; -+} -+ -+/* when wait_ack is ture, this function shoule be called at process context */ -+static int _issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, u8 ps, int wait_ack) -+{ -+ int ret = _FAIL; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl, *qc; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 a4_shift; -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ pattrib->hdrlen += 2; -+ pattrib->qos_en = _TRUE; -+ pattrib->eosp = 1; -+ pattrib->ack_policy = 0; -+ pattrib->mdata = 0; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ if (MLME_IS_AP(padapter)) -+ SetFrDs(fctrl); -+ else if (MLME_IS_STA(padapter)) -+ SetToDs(fctrl); -+ else if (MLME_IS_MESH(padapter)) { -+ SetToDs(fctrl); -+ SetFrDs(fctrl); -+ } -+ -+ if (ps) -+ SetPwrMgt(fctrl); -+ -+ if (pattrib->mdata) -+ SetMData(fctrl); -+ -+ if (get_tofr_ds(fctrl) == 3) { -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr4, adapter_mac_addr(padapter), ETH_ALEN); -+ a4_shift = ETH_ALEN; -+ pattrib->hdrlen += ETH_ALEN; -+ } else { -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ a4_shift = 0; -+ } -+ -+ qc = (unsigned short *)(pframe + pattrib->hdrlen - 2); -+ -+ SetPriority(qc, tid); -+ -+ SetEOSP(qc, pattrib->eosp); -+ -+ SetAckpolicy(qc, pattrib->ack_policy); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_QOS_DATA_NULL); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr_qos) + a4_shift; -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos) + a4_shift; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ return ret; -+} -+ -+/* -+ * when wait_ms >0 , this function should be called at process context -+ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT -+ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX -+ * try_cnt means the maximal TX count to try -+ * da == NULL for station mode -+ */ -+int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, u8 ps, int try_cnt, int wait_ms) -+{ -+ int ret = _FAIL; -+ int i = 0; -+ systime start = rtw_get_current_time(); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ /* da == NULL, assum it's null data for sta to ap*/ -+ if (da == NULL) -+ da = get_my_bssid(&(pmlmeinfo->network)); -+ -+ do { -+ ret = _issue_qos_nulldata(padapter, da, tid, ps, wait_ms > 0 ? _TRUE : _FALSE); -+ -+ i++; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ break; -+ -+ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) -+ rtw_msleep_os(wait_ms); -+ -+ } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); -+ -+ if (ret != _FAIL) { -+ ret = _SUCCESS; -+#ifndef DBG_XMIT_ACK -+ goto exit; -+#endif -+ } -+ -+ if (try_cnt && wait_ms) { -+ if (da) -+ RTW_INFO(FUNC_ADPT_FMT" to "MAC_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), MAC_ARG(da), rtw_get_oper_ch(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), rtw_get_oper_ch(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ } -+exit: -+ return ret; -+} -+ -+static int _issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason, u8 wait_ack, u8 key_type) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ int ret = _FAIL; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ -+ /* RTW_INFO("%s to "MAC_FMT"\n", __func__, MAC_ARG(da)); */ -+ -+#ifdef CONFIG_P2P -+ if (!(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) && (pwdinfo->rx_invitereq_info.scan_op_ch_only)) { -+ _cancel_timer_ex(&pwdinfo->reset_ch_sitesurvey); -+ _set_timer(&pwdinfo->reset_ch_sitesurvey, 10); -+ } -+#endif /* CONFIG_P2P */ -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ pattrib->retry_ctrl = _FALSE; -+ pattrib->key_type = key_type; -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_DEAUTH); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ reason = cpu_to_le16(reason); -+ pframe = rtw_set_fixed_ie(pframe, _RSON_CODE_ , (unsigned char *)&reason, &(pattrib->pktlen)); -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ return ret; -+} -+ -+int issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason) -+{ -+ RTW_INFO("%s reason(%u) to "MAC_FMT"\n", __func__, reason, MAC_ARG(da)); -+ return _issue_deauth(padapter, da, reason, _FALSE, IEEE80211W_RIGHT_KEY); -+} -+ -+#ifdef CONFIG_IEEE80211W -+int issue_deauth_11w(_adapter *padapter, unsigned char *da, unsigned short reason, u8 key_type) -+{ -+ RTW_INFO("%s to "MAC_FMT"\n", __func__, MAC_ARG(da)); -+ return _issue_deauth(padapter, da, reason, _FALSE, key_type); -+} -+#endif /* CONFIG_IEEE80211W */ -+ -+/* -+ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT -+ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX -+ * try_cnt means the maximal TX count to try -+ */ -+int issue_deauth_ex(_adapter *padapter, u8 *da, unsigned short reason, int try_cnt, -+ int wait_ms) -+{ -+ int ret = _FAIL; -+ int i = 0; -+ systime start = rtw_get_current_time(); -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ do { -+ ret = _issue_deauth(padapter, da, reason, wait_ms > 0 ? _TRUE : _FALSE, IEEE80211W_RIGHT_KEY); -+ -+ i++; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ break; -+ -+ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) -+ rtw_msleep_os(wait_ms); -+ -+ } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); -+ -+ if (ret != _FAIL) { -+ ret = _SUCCESS; -+#ifndef DBG_XMIT_ACK -+ goto exit; -+#endif -+ } -+ -+ if (try_cnt && wait_ms) { -+ if (da) -+ RTW_INFO(FUNC_ADPT_FMT" to "MAC_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), MAC_ARG(da), rtw_get_oper_ch(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), rtw_get_oper_ch(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ } -+exit: -+ return ret; -+} -+ -+void issue_action_spct_ch_switch(_adapter *padapter, u8 *ra, u8 new_ch, u8 ch_offset) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ return; -+ -+ RTW_INFO(FUNC_NDEV_FMT" ra="MAC_FMT", ch:%u, offset:%u\n", -+ FUNC_NDEV_ARG(padapter->pnetdev), MAC_ARG(ra), new_ch, ch_offset); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); /* RA */ -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); /* TA */ -+ _rtw_memcpy(pwlanhdr->addr3, ra, ETH_ALEN); /* DA = RA */ -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ /* category, action */ -+ { -+ u8 category, action; -+ category = RTW_WLAN_CATEGORY_SPECTRUM_MGMT; -+ action = RTW_WLAN_ACTION_SPCT_CHL_SWITCH; -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ } -+ -+ pframe = rtw_set_ie_ch_switch(pframe, &(pattrib->pktlen), 0, new_ch, 0); -+ pframe = rtw_set_ie_secondary_ch_offset(pframe, &(pattrib->pktlen), -+ hal_ch_offset_to_secondary_ch_offset(ch_offset)); -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+} -+ -+#ifdef CONFIG_IEEE80211W -+void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short tid, u8 key_type) -+{ -+ u8 category = RTW_WLAN_CATEGORY_SA_QUERY; -+ u16 reason_code; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ u8 *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ return; -+ -+ RTW_INFO("%s, %04x\n", __FUNCTION__, tid); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ RTW_INFO("%s: alloc_mgtxmitframe fail\n", __FUNCTION__); -+ return; -+ } -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ pattrib->key_type = key_type; -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ if (raddr) -+ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); -+ else -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &category, &pattrib->pktlen); -+ pframe = rtw_set_fixed_ie(pframe, 1, &action, &pattrib->pktlen); -+ -+ switch (action) { -+ case 0: /* SA Query req */ -+ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&pmlmeext->sa_query_seq, &pattrib->pktlen); -+ pmlmeext->sa_query_seq++; -+ /* send sa query request to AP, AP should reply sa query response in 1 second */ -+ if (pattrib->key_type == IEEE80211W_RIGHT_KEY) { -+ psta = rtw_get_stainfo(pstapriv, pwlanhdr->addr1); -+ if (psta != NULL) { -+ /* RTW_INFO("%s, %d, set dot11w_expire_timer\n", __func__, __LINE__); */ -+ _set_timer(&psta->dot11w_expire_timer, 1000); -+ } -+ } -+ break; -+ -+ case 1: /* SA Query rsp */ -+ tid = cpu_to_le16(tid); -+ /* RTW_INFO("rtw_set_fixed_ie, %04x\n", tid); */ -+ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&tid, &pattrib->pktlen); -+ break; -+ default: -+ break; -+ } -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+} -+#endif /* CONFIG_IEEE80211W */ -+ -+/** -+ * issue_action_ba - internal function to TX Block Ack action frame -+ * @padapter: the adapter to TX -+ * @raddr: receiver address -+ * @action: Block Ack Action -+ * @tid: tid -+ * @size: the announced AMPDU buffer size. used by ADDBA_RESP -+ * @status: status/reason code. used by ADDBA_RESP, DELBA -+ * @initiator: if we are the initiator of AMPDU association. used by DELBA -+ * @wait_ack: used xmit ack -+ * -+ * Returns: -+ * _SUCCESS: No xmit ack is used or acked -+ * _FAIL: not acked when using xmit ack -+ */ -+static int issue_action_ba(_adapter *padapter, unsigned char *raddr, unsigned char action -+ , u8 tid, u8 size, u16 status, u8 initiator, int wait_ack) -+{ -+ int ret = _FAIL; -+ u8 category = RTW_WLAN_CATEGORY_BACK; -+ u16 start_seq; -+ u16 BA_para_set; -+ u16 BA_timeout_value; -+ u16 BA_starting_seqctrl; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ u8 *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+#ifdef CONFIG_80211N_HT -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ /* _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); */ -+ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ -+ if (category == 3) { -+ switch (action) { -+ case RTW_WLAN_ACTION_ADDBA_REQ: -+ do { -+ pmlmeinfo->dialogToken++; -+ } while (pmlmeinfo->dialogToken == 0); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen)); -+ -+#if defined(CONFIG_RTL8188E) && defined(CONFIG_SDIO_HCI) -+ BA_para_set = (0x0802 | ((tid & 0xf) << 2)); /* immediate ack & 16 buffer size */ -+#else -+ BA_para_set = (0x1002 | ((tid & 0xf) << 2)); /* immediate ack & 64 buffer size */ -+#endif -+ -+#ifdef CONFIG_TX_AMSDU -+ if (padapter->tx_amsdu >= 1) /* TX AMSDU enabled */ -+ BA_para_set |= BIT(0); -+ else /* TX AMSDU disabled */ -+ BA_para_set &= ~BIT(0); -+#endif -+ BA_para_set = cpu_to_le16(BA_para_set); -+ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); -+ -+ /* BA_timeout_value = 0xffff; */ /* max: 65535 TUs(~ 65 ms) */ -+ BA_timeout_value = 5000;/* ~ 5ms */ -+ BA_timeout_value = cpu_to_le16(BA_timeout_value); -+ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_timeout_value)), &(pattrib->pktlen)); -+ -+ /* if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) */ -+ psta = rtw_get_stainfo(pstapriv, raddr); -+ if (psta != NULL) { -+ start_seq = (psta->sta_xmitpriv.txseq_tid[tid & 0x07] & 0xfff) + 1; -+ -+ RTW_INFO("BA_starting_seqctrl = %d for TID=%d\n", start_seq, tid & 0x07); -+ -+ psta->BA_starting_seqctrl[tid & 0x07] = start_seq; -+ -+ BA_starting_seqctrl = start_seq << 4; -+ } -+ -+ BA_starting_seqctrl = cpu_to_le16(BA_starting_seqctrl); -+ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_starting_seqctrl)), &(pattrib->pktlen)); -+ break; -+ -+ case RTW_WLAN_ACTION_ADDBA_RESP: -+ pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->ADDBA_req.dialog_token), &(pattrib->pktlen)); -+ status = cpu_to_le16(status); -+ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&status), &(pattrib->pktlen)); -+ -+ BA_para_set = le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set); -+ -+ BA_para_set &= ~IEEE80211_ADDBA_PARAM_TID_MASK; -+ BA_para_set |= (tid << 2) & IEEE80211_ADDBA_PARAM_TID_MASK; -+ -+ BA_para_set &= ~RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; -+ BA_para_set |= (size << 6) & RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; -+ -+ if (!padapter->registrypriv.wifi_spec) { -+ if (pregpriv->rx_ampdu_amsdu == 0) /* disabled */ -+ BA_para_set &= ~BIT(0); -+ else if (pregpriv->rx_ampdu_amsdu == 1) /* enabled */ -+ BA_para_set |= BIT(0); -+ } -+ -+ BA_para_set = cpu_to_le16(BA_para_set); -+ -+ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(pmlmeinfo->ADDBA_req.BA_timeout_value)), &(pattrib->pktlen)); -+ break; -+ -+ case RTW_WLAN_ACTION_DELBA: -+ BA_para_set = 0; -+ BA_para_set |= (tid << 12) & IEEE80211_DELBA_PARAM_TID_MASK; -+ BA_para_set |= (initiator << 11) & IEEE80211_DELBA_PARAM_INITIATOR_MASK; -+ -+ BA_para_set = cpu_to_le16(BA_para_set); -+ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); -+ status = cpu_to_le16(status); -+ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(status)), &(pattrib->pktlen)); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+#endif /* CONFIG_80211N_HT */ -+ return ret; -+} -+ -+/** -+ * issue_addba_req - TX ADDBA_REQ -+ * @adapter: the adapter to TX -+ * @ra: receiver address -+ * @tid: tid -+ */ -+inline void issue_addba_req(_adapter *adapter, unsigned char *ra, u8 tid) -+{ -+ issue_action_ba(adapter, ra, RTW_WLAN_ACTION_ADDBA_REQ -+ , tid -+ , 0 /* unused */ -+ , 0 /* unused */ -+ , 0 /* unused */ -+ , _FALSE -+ ); -+ RTW_INFO(FUNC_ADPT_FMT" ra="MAC_FMT" tid=%u\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(ra), tid); -+ -+} -+ -+/** -+ * issue_addba_rsp - TX ADDBA_RESP -+ * @adapter: the adapter to TX -+ * @ra: receiver address -+ * @tid: tid -+ * @status: status code -+ * @size: the announced AMPDU buffer size -+ */ -+inline void issue_addba_rsp(_adapter *adapter, unsigned char *ra, u8 tid, u16 status, u8 size) -+{ -+ issue_action_ba(adapter, ra, RTW_WLAN_ACTION_ADDBA_RESP -+ , tid -+ , size -+ , status -+ , 0 /* unused */ -+ , _FALSE -+ ); -+ RTW_INFO(FUNC_ADPT_FMT" ra="MAC_FMT" status=%u, tid=%u, size=%u\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(ra), status, tid, size); -+} -+ -+/** -+ * issue_addba_rsp_wait_ack - TX ADDBA_RESP and wait ack -+ * @adapter: the adapter to TX -+ * @ra: receiver address -+ * @tid: tid -+ * @status: status code -+ * @size: the announced AMPDU buffer size -+ * @try_cnt: the maximal TX count to try -+ * @wait_ms: == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT -+ * > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX -+ */ -+inline u8 issue_addba_rsp_wait_ack(_adapter *adapter, unsigned char *ra, u8 tid, u16 status, u8 size, int try_cnt, int wait_ms) -+{ -+ int ret = _FAIL; -+ int i = 0; -+ systime start = rtw_get_current_time(); -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(adapter))) -+ goto exit; -+ -+ do { -+ ret = issue_action_ba(adapter, ra, RTW_WLAN_ACTION_ADDBA_RESP -+ , tid -+ , size -+ , status -+ , 0 /* unused */ -+ , _TRUE -+ ); -+ -+ i++; -+ -+ if (RTW_CANNOT_RUN(adapter)) -+ break; -+ -+ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) -+ rtw_msleep_os(wait_ms); -+ -+ } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); -+ -+ if (ret != _FAIL) { -+ ret = _SUCCESS; -+#ifndef DBG_XMIT_ACK -+ /* goto exit; */ -+#endif -+ } -+ -+ if (try_cnt && wait_ms) { -+ RTW_INFO(FUNC_ADPT_FMT" ra="MAC_FMT" status:=%u tid=%u size:%u%s, %d/%d in %u ms\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(ra), status, tid, size -+ , ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ } -+ -+exit: -+ return ret; -+} -+ -+/** -+ * issue_del_ba - TX DELBA -+ * @adapter: the adapter to TX -+ * @ra: receiver address -+ * @tid: tid -+ * @reason: reason code -+ * @initiator: if we are the initiator of AMPDU association. used by DELBA -+ */ -+inline void issue_del_ba(_adapter *adapter, unsigned char *ra, u8 tid, u16 reason, u8 initiator) -+{ -+ issue_action_ba(adapter, ra, RTW_WLAN_ACTION_DELBA -+ , tid -+ , 0 /* unused */ -+ , reason -+ , initiator -+ , _FALSE -+ ); -+ RTW_INFO(FUNC_ADPT_FMT" ra="MAC_FMT" reason=%u, tid=%u, initiator=%u\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(ra), reason, tid, initiator); -+} -+ -+/** -+ * issue_del_ba_ex - TX DELBA with xmit ack options -+ * @adapter: the adapter to TX -+ * @ra: receiver address -+ * @tid: tid -+ * @reason: reason code -+ * @initiator: if we are the initiator of AMPDU association. used by DELBA -+ * @try_cnt: the maximal TX count to try -+ * @wait_ms: == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT -+ * > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX -+ */ -+int issue_del_ba_ex(_adapter *adapter, unsigned char *ra, u8 tid, u16 reason, u8 initiator -+ , int try_cnt, int wait_ms) -+{ -+ int ret = _FAIL; -+ int i = 0; -+ systime start = rtw_get_current_time(); -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(adapter))) -+ goto exit; -+ -+ do { -+ ret = issue_action_ba(adapter, ra, RTW_WLAN_ACTION_DELBA -+ , tid -+ , 0 /* unused */ -+ , reason -+ , initiator -+ , wait_ms > 0 ? _TRUE : _FALSE -+ ); -+ -+ i++; -+ -+ if (RTW_CANNOT_RUN(adapter)) -+ break; -+ -+ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) -+ rtw_msleep_os(wait_ms); -+ -+ } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); -+ -+ if (ret != _FAIL) { -+ ret = _SUCCESS; -+#ifndef DBG_XMIT_ACK -+ /* goto exit; */ -+#endif -+ } -+ -+ if (try_cnt && wait_ms) { -+ RTW_INFO(FUNC_ADPT_FMT" ra="MAC_FMT" reason=%u, tid=%u, initiator=%u%s, %d/%d in %u ms\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(ra), reason, tid, initiator -+ , ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ } -+exit: -+ return ret; -+} -+ -+void issue_action_BSSCoexistPacket(_adapter *padapter) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ unsigned char category, action; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct wlan_network *pnetwork = NULL; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ u8 InfoContent[16] = {0}; -+ u8 ICS[8][15]; -+#ifdef CONFIG_80211N_HT -+ if ((pmlmepriv->num_FortyMHzIntolerant == 0) && (pmlmepriv->num_sta_no_ht == 0)) -+ return; -+ -+ if (_TRUE == pmlmeinfo->bwmode_updated) -+ return; -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ return; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ -+ category = RTW_WLAN_CATEGORY_PUBLIC; -+ action = ACT_PUBLIC_BSSCOEXIST; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ -+ /* TODO calculate 40Mhz intolerant via ch and ch offset */ -+ /* if (pmlmepriv->num_FortyMHzIntolerant > 0) */ -+ { -+ u8 iedata = 0; -+ -+ iedata |= BIT(2);/* 20 MHz BSS Width Request */ -+ pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); -+ } -+ -+ /* */ -+ _rtw_memset(ICS, 0, sizeof(ICS)); -+ if (pmlmepriv->num_sta_no_ht > 0) { -+ int i; -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ int len; -+ u8 *p; -+ WLAN_BSSID_EX *pbss_network; -+ -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ plist = get_next(plist); -+ -+ pbss_network = (WLAN_BSSID_EX *)&pnetwork->network; -+ -+ p = rtw_get_ie(pbss_network->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, pbss_network->IELength - _FIXED_IE_LENGTH_); -+ if ((p == NULL) || (len == 0)) { /* non-HT */ -+ if ((pbss_network->Configuration.DSConfig <= 0) || (pbss_network->Configuration.DSConfig > 14)) -+ continue; -+ -+ ICS[0][pbss_network->Configuration.DSConfig] = 1; -+ -+ if (ICS[0][0] == 0) -+ ICS[0][0] = 1; -+ } -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ -+ for (i = 0; i < 8; i++) { -+ if (ICS[i][0] == 1) { -+ int j, k = 0; -+ -+ InfoContent[k] = i; -+ /* SET_BSS_INTOLERANT_ELE_REG_CLASS(InfoContent,i); */ -+ k++; -+ -+ for (j = 1; j <= 14; j++) { -+ if (ICS[i][j] == 1) { -+ if (k < 16) { -+ InfoContent[k] = j; /* channel number */ -+ /* SET_BSS_INTOLERANT_ELE_CHANNEL(InfoContent+k, j); */ -+ k++; -+ } -+ } -+ } -+ -+ pframe = rtw_set_ie(pframe, EID_BSSIntolerantChlReport, k, InfoContent, &(pattrib->pktlen)); -+ -+ } -+ -+ } -+ -+ -+ } -+ -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+#endif /* CONFIG_80211N_HT */ -+} -+ -+/* Spatial Multiplexing Powersave (SMPS) action frame */ -+int _issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoPsMode , u8 wait_ack) -+{ -+ -+ int ret = _FAIL; -+ unsigned char category = RTW_WLAN_CATEGORY_HT; -+ u8 action = RTW_WLAN_ACTION_HT_SM_PS; -+ u8 sm_power_control = 0; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ -+ if (NewMimoPsMode == WLAN_HT_CAP_SM_PS_DISABLED) { -+ sm_power_control = sm_power_control & ~(BIT(0)); /* SM Power Save Enable = 0 SM Power Save Disable */ -+ } else if (NewMimoPsMode == WLAN_HT_CAP_SM_PS_STATIC) { -+ sm_power_control = sm_power_control | BIT(0); /* SM Power Save Enable = 1 SM Power Save Enable */ -+ sm_power_control = sm_power_control & ~(BIT(1)); /* SM Mode = 0 Static Mode */ -+ } else if (NewMimoPsMode == WLAN_HT_CAP_SM_PS_DYNAMIC) { -+ sm_power_control = sm_power_control | BIT(0); /* SM Power Save Enable = 1 SM Power Save Enable */ -+ sm_power_control = sm_power_control | BIT(1); /* SM Mode = 1 Dynamic Mode */ -+ } else -+ return ret; -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ return ret; -+ -+ RTW_INFO("%s, sm_power_control=%u, NewMimoPsMode=%u\n", __FUNCTION__ , sm_power_control , NewMimoPsMode); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return ret; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); /* RA */ -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); /* TA */ -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); /* DA = RA */ -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ /* category, action */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(sm_power_control), &(pattrib->pktlen)); -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+ if (ret != _SUCCESS) -+ RTW_INFO("%s, ack to\n", __func__); -+ -+ return ret; -+} -+ -+/* -+ * wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT -+ * wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX -+ * try_cnt means the maximal TX count to try -+ */ -+int issue_action_SM_PS_wait_ack(_adapter *padapter, unsigned char *raddr, u8 NewMimoPsMode, int try_cnt, int wait_ms) -+{ -+ int ret = _FAIL; -+ int i = 0; -+ systime start = rtw_get_current_time(); -+ -+ if (rtw_rfctl_is_tx_blocked_by_ch_waiting(adapter_to_rfctl(padapter))) -+ goto exit; -+ -+ do { -+ ret = _issue_action_SM_PS(padapter, raddr, NewMimoPsMode , wait_ms > 0 ? _TRUE : _FALSE); -+ -+ i++; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ break; -+ -+ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) -+ rtw_msleep_os(wait_ms); -+ -+ } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); -+ -+ if (ret != _FAIL) { -+ ret = _SUCCESS; -+#ifndef DBG_XMIT_ACK -+ goto exit; -+#endif -+ } -+ -+ if (try_cnt && wait_ms) { -+ if (raddr) -+ RTW_INFO(FUNC_ADPT_FMT" to "MAC_FMT", %s , %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), MAC_ARG(raddr), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT", %s , %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ } -+exit: -+ -+ return ret; -+} -+ -+int issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoPsMode) -+{ -+ RTW_INFO("%s to "MAC_FMT"\n", __func__, MAC_ARG(raddr)); -+ return _issue_action_SM_PS(padapter, raddr, NewMimoPsMode , _FALSE); -+} -+ -+/** -+ * _send_delba_sta_tid - Cancel the AMPDU association for the specific @sta, @tid -+ * @adapter: the adapter to which @sta belongs -+ * @initiator: if we are the initiator of AMPDU association -+ * @sta: the sta to be checked -+ * @tid: the tid to be checked -+ * @force: cancel and send DELBA even when no AMPDU association is setup -+ * @wait_ack: send delba with xmit ack (valid when initiator == 0) -+ * -+ * Returns: -+ * _FAIL if sta is NULL -+ * when initiator is 1, always _SUCCESS -+ * when initiator is 0, _SUCCESS if DELBA is acked -+ */ -+static unsigned int _send_delba_sta_tid(_adapter *adapter, u8 initiator, struct sta_info *sta, u8 tid -+ , u8 force, int wait_ack) -+{ -+ int ret = _SUCCESS; -+ -+ if (sta == NULL) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ if (initiator == 0) { -+ /* recipient */ -+ if (force || sta->recvreorder_ctrl[tid].enable == _TRUE) { -+ u8 ampdu_size_bak = sta->recvreorder_ctrl[tid].ampdu_size; -+ -+ sta->recvreorder_ctrl[tid].enable = _FALSE; -+ sta->recvreorder_ctrl[tid].ampdu_size = RX_AMPDU_SIZE_INVALID; -+ -+ if (rtw_del_rx_ampdu_test_trigger_no_tx_fail()) -+ ret = _FAIL; -+ else if (wait_ack) -+ ret = issue_del_ba_ex(adapter, sta->cmn.mac_addr, tid, 37, initiator, 3, 1); -+ else -+ issue_del_ba(adapter, sta->cmn.mac_addr, tid, 37, initiator); -+ -+ if (ret == _FAIL && sta->recvreorder_ctrl[tid].enable == _FALSE) -+ sta->recvreorder_ctrl[tid].ampdu_size = ampdu_size_bak; -+ } -+ } else if (initiator == 1) { -+ /* originator */ -+#ifdef CONFIG_80211N_HT -+ if (force || sta->htpriv.agg_enable_bitmap & BIT(tid)) { -+ sta->htpriv.agg_enable_bitmap &= ~BIT(tid); -+ sta->htpriv.candidate_tid_bitmap &= ~BIT(tid); -+ issue_del_ba(adapter, sta->cmn.mac_addr, tid, 37, initiator); -+ } -+#endif -+ } -+ -+exit: -+ return ret; -+} -+ -+inline unsigned int send_delba_sta_tid(_adapter *adapter, u8 initiator, struct sta_info *sta, u8 tid -+ , u8 force) -+{ -+ return _send_delba_sta_tid(adapter, initiator, sta, tid, force, 0); -+} -+ -+inline unsigned int send_delba_sta_tid_wait_ack(_adapter *adapter, u8 initiator, struct sta_info *sta, u8 tid -+ , u8 force) -+{ -+ return _send_delba_sta_tid(adapter, initiator, sta, tid, force, 1); -+} -+ -+unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr) -+{ -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta = NULL; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u16 tid; -+ -+ if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) -+ if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) -+ return _SUCCESS; -+ -+ psta = rtw_get_stainfo(pstapriv, addr); -+ if (psta == NULL) -+ return _SUCCESS; -+ -+#if 0 -+ RTW_INFO("%s:%s\n", __func__, (initiator == 0) ? "RX_DIR" : "TX_DIR"); -+ if (initiator == 1) /* originator */ -+ RTW_INFO("tx agg_enable_bitmap(0x%08x)\n", psta->htpriv.agg_enable_bitmap); -+#endif -+ -+ for (tid = 0; tid < TID_NUM; tid++) -+ send_delba_sta_tid(padapter, initiator, psta, tid, 0); -+ -+ return _SUCCESS; -+} -+ -+#ifdef CONFIG_AP_MODE -+unsigned int send_beacon(_adapter *padapter) -+{ -+#if defined(CONFIG_PCI_HCI) && !defined(CONFIG_PCI_BCN_POLLING) -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ u8 vap_id = padapter->vap_id; -+ -+ /* bypass TX BCN because vap_id is invalid*/ -+ if (vap_id == CONFIG_LIMITED_AP_NUM) -+ return _SUCCESS; -+ #endif -+ -+ /* bypass TX BCN queue because op ch is switching/waiting */ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_OP_CH_SWITCHING) -+ || IS_CH_WAITING(adapter_to_rfctl(padapter)) -+ ) -+ return _SUCCESS; -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); -+ -+ /* 8192EE Port select for Beacon DL */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL); -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id); -+ #endif -+ -+ issue_beacon(padapter, 0); -+ -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ vap_id = 0xFF; -+ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id); -+ #endif -+ -+ #ifdef RTL8814AE_SW_BCN -+ if (GET_HAL_DATA(padapter)->bCorrectBCN != 0) -+ RTW_INFO("%s, line%d, Warnning, pHalData->bCorrectBCN != 0\n", __func__, __LINE__); -+ GET_HAL_DATA(padapter)->bCorrectBCN = 1; -+ #endif -+ -+ return _SUCCESS; -+#endif -+ -+/* CONFIG_PCI_BCN_POLLING is for pci interface beacon polling mode */ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)|| defined(CONFIG_PCI_BCN_POLLING) -+ u8 bxmitok = _FALSE; -+ int issue = 0; -+ int poll = 0; -+ systime start = rtw_get_current_time(); -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ u8 vap_id = padapter->vap_id; -+ -+ /* bypass TX BCN because vap_id is invalid*/ -+ if (vap_id == CONFIG_LIMITED_AP_NUM) -+ return _SUCCESS; -+ #endif -+ -+ /* bypass TX BCN queue because op ch is switching/waiting */ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_OP_CH_SWITCHING) -+ || IS_CH_WAITING(adapter_to_rfctl(padapter)) -+ ) -+ return _SUCCESS; -+ -+ #if defined(CONFIG_USB_HCI) -+ #if defined(CONFIG_RTL8812A) -+ if (IS_FULL_SPEED_USB(padapter)) { -+ issue_beacon(padapter, 300); -+ bxmitok = _TRUE; -+ } else -+ #endif -+ #endif -+ { -+ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); -+ rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL); -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id); -+ #endif -+ do { -+ #if defined(CONFIG_PCI_BCN_POLLING) -+ issue_beacon(padapter, 0); -+ #else -+ issue_beacon(padapter, 100); -+ #endif -+ issue++; -+ do { -+ #if defined(CONFIG_PCI_BCN_POLLING) -+ rtw_msleep_os(1); -+ #else -+ rtw_yield_os(); -+ #endif -+ rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bxmitok)); -+ poll++; -+ } while ((poll % 10) != 0 && _FALSE == bxmitok && !RTW_CANNOT_RUN(padapter)); -+ #if defined(CONFIG_PCI_BCN_POLLING) -+ rtw_hal_unmap_beacon_icf(padapter); -+ #endif -+ } while (bxmitok == _FALSE && (issue < 100) && !RTW_CANNOT_RUN(padapter)); -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ vap_id = 0xFF; -+ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id); -+ #endif -+ } -+ if (RTW_CANNOT_RUN(padapter)) -+ return _FAIL; -+ -+ -+ if (_FALSE == bxmitok) { -+ RTW_INFO("%s fail! %u ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); -+ #ifdef CONFIG_BCN_RECOVERY -+ GET_HAL_DATA(padapter)->issue_bcn_fail++; -+ #endif /*CONFIG_BCN_RECOVERY*/ -+ return _FAIL; -+ } else { -+ u32 passing_time = rtw_get_passing_time_ms(start); -+ -+ if (passing_time > 100 || issue > 3) -+ RTW_INFO("%s success, issue:%d, poll:%d, %u ms\n", __FUNCTION__, issue, poll, rtw_get_passing_time_ms(start)); -+ else if (0) -+ RTW_INFO("%s success, issue:%d, poll:%d, %u ms\n", __FUNCTION__, issue, poll, rtw_get_passing_time_ms(start)); -+ -+ #ifdef CONFIG_FW_CORRECT_BCN -+ rtw_hal_fw_correct_bcn(padapter); -+ #endif -+ return _SUCCESS; -+ } -+ -+#endif /*defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)*/ -+ -+} -+#endif /* CONFIG_AP_MODE */ -+ -+/**************************************************************************** -+ -+Following are some utitity fuctions for WiFi MLME -+ -+*****************************************************************************/ -+ -+BOOLEAN IsLegal5GChannel( -+ PADAPTER Adapter, -+ u8 channel) -+{ -+ -+ int i = 0; -+ u8 Channel_5G[45] = {36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, -+ 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, -+ 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, -+ 161, 163, 165 -+ }; -+ for (i = 0; i < sizeof(Channel_5G); i++) -+ if (channel == Channel_5G[i]) -+ return _TRUE; -+ return _FALSE; -+} -+ -+/* collect bss info from Beacon and Probe request/response frames. */ -+u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid) -+{ -+ int i; -+ sint len; -+ u8 *p; -+ u8 rf_path; -+ u16 val16, subtype; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ u32 packet_len = precv_frame->u.hdr.len; -+ u8 ie_offset; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ -+ len = packet_len - sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ if (len > MAX_IE_SZ) { -+ /* RTW_INFO("IE too long for survey event\n"); */ -+ return _FAIL; -+ } -+ -+ _rtw_memset(bssid, 0, sizeof(WLAN_BSSID_EX)); -+ -+ subtype = get_frame_sub_type(pframe); -+ -+ if (subtype == WIFI_BEACON) { -+ bssid->Reserved[0] = BSS_TYPE_BCN; -+ ie_offset = _BEACON_IE_OFFSET_; -+ } else { -+ /* FIXME : more type */ -+ if (subtype == WIFI_PROBERSP) { -+ ie_offset = _PROBERSP_IE_OFFSET_; -+ bssid->Reserved[0] = BSS_TYPE_PROB_RSP; -+ } else if (subtype == WIFI_PROBEREQ) { -+ ie_offset = _PROBEREQ_IE_OFFSET_; -+ bssid->Reserved[0] = BSS_TYPE_PROB_REQ; -+ } else { -+ bssid->Reserved[0] = BSS_TYPE_UNDEF; -+ ie_offset = _FIXED_IE_LENGTH_; -+ } -+ } -+ -+ bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len; -+ -+ /* below is to copy the information element */ -+ bssid->IELength = len; -+ _rtw_memcpy(bssid->IEs, (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)), bssid->IELength); -+ -+ /* get the signal strength */ -+ /* bssid->Rssi = precv_frame->u.hdr.attrib.SignalStrength; */ /* 0-100 index. */ -+ bssid->Rssi = precv_frame->u.hdr.attrib.phy_info.recv_signal_power; /* in dBM.raw data */ -+ bssid->PhyInfo.SignalQuality = precv_frame->u.hdr.attrib.phy_info.signal_quality;/* in percentage */ -+ bssid->PhyInfo.SignalStrength = precv_frame->u.hdr.attrib.phy_info.signal_strength;/* in percentage */ -+ -+ /* get rx_snr */ -+ if (precv_frame->u.hdr.attrib.data_rate >= DESC_RATE11M) { -+ bssid->PhyInfo.is_cck_rate = 0; -+ for (rf_path = 0; rf_path < hal_spec->rf_reg_path_num; rf_path++) -+ bssid->PhyInfo.rx_snr[rf_path] = -+ precv_frame->u.hdr.attrib.phy_info.rx_snr[rf_path]; -+ } else -+ bssid->PhyInfo.is_cck_rate = 1; -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ rtw_hal_get_odm_var(padapter, HAL_ODM_ANTDIV_SELECT, &(bssid->PhyInfo.Optimum_antenna), NULL); -+#endif -+ -+ /* checking SSID */ -+ p = rtw_get_ie(bssid->IEs + ie_offset, _SSID_IE_, &len, bssid->IELength - ie_offset); -+ if (p == NULL) { -+ RTW_INFO("marc: cannot find SSID for survey event\n"); -+ return _FAIL; -+ } -+ -+ if (*(p + 1)) { -+ if (len > NDIS_802_11_LENGTH_SSID) { -+ RTW_INFO("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); -+ return _FAIL; -+ } -+ _rtw_memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1)); -+ bssid->Ssid.SsidLength = *(p + 1); -+ } else -+ bssid->Ssid.SsidLength = 0; -+ -+ _rtw_memset(bssid->SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX); -+ -+ /* checking rate info... */ -+ i = 0; -+ p = rtw_get_ie(bssid->IEs + ie_offset, _SUPPORTEDRATES_IE_, &len, bssid->IELength - ie_offset); -+ if (p != NULL) { -+ if (len > NDIS_802_11_LENGTH_RATES_EX) { -+ RTW_INFO("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); -+ return _FAIL; -+ } -+#ifdef CONFIG_CHECK_SPECIFIC_IE_CONTENT -+ if (rtw_validate_value(_SUPPORTEDRATES_IE_, p+2, len) == _FALSE) { -+ rtw_absorb_ssid_ifneed(padapter, bssid, pframe); -+ RTW_DBG_DUMP("Invalidated Support Rate IE --", p, len+2); -+ return _FAIL; -+ } -+#endif /* #ifdef CONFIG_CHECK_SPECIFIC_IE_CONTENT */ -+ _rtw_memcpy(bssid->SupportedRates, (p + 2), len); -+ i = len; -+ } -+ -+ p = rtw_get_ie(bssid->IEs + ie_offset, _EXT_SUPPORTEDRATES_IE_, &len, bssid->IELength - ie_offset); -+ if (p != NULL) { -+ if (len > (NDIS_802_11_LENGTH_RATES_EX - i)) { -+ RTW_INFO("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); -+ return _FAIL; -+ } -+#ifdef CONFIG_CHECK_SPECIFIC_IE_CONTENT -+ if (rtw_validate_value(_EXT_SUPPORTEDRATES_IE_, p+2, len) == _FALSE) { -+ rtw_absorb_ssid_ifneed(padapter, bssid, pframe); -+ RTW_DBG_DUMP("Invalidated EXT Support Rate IE --", p, len+2); -+ return _FAIL; -+ } -+#endif /* #ifdef CONFIG_CHECK_SPECIFIC_IE_CONTENT */ -+ _rtw_memcpy(bssid->SupportedRates + i, (p + 2), len); -+ } -+ -+#ifdef CONFIG_P2P -+ if (subtype == WIFI_PROBEREQ) { -+ u8 *p2p_ie; -+ u32 p2p_ielen; -+ /* Set Listion Channel */ -+ p2p_ie = rtw_get_p2p_ie(bssid->IEs, bssid->IELength, NULL, &p2p_ielen); -+ if (p2p_ie) { -+ u32 attr_contentlen = 0; -+ u8 listen_ch[5] = { 0x00 }; -+ -+ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, listen_ch, &attr_contentlen); -+ bssid->Configuration.DSConfig = listen_ch[4]; -+ } else { -+ /* use current channel */ -+ bssid->Configuration.DSConfig = padapter->mlmeextpriv.cur_channel; -+ RTW_INFO("%s()-%d: Cannot get p2p_ie. set DSconfig to op_ch(%d)\n", __FUNCTION__, __LINE__, bssid->Configuration.DSConfig); -+ } -+ -+ /* FIXME */ -+ bssid->InfrastructureMode = Ndis802_11Infrastructure; -+ _rtw_memcpy(bssid->MacAddress, get_addr2_ptr(pframe), ETH_ALEN); -+ bssid->Privacy = 1; -+ return _SUCCESS; -+ } -+#endif /* CONFIG_P2P */ -+ -+ if (bssid->IELength < 12) -+ return _FAIL; -+ -+ /* Checking for DSConfig */ -+ p = rtw_get_ie(bssid->IEs + ie_offset, _DSSET_IE_, &len, bssid->IELength - ie_offset); -+ -+ bssid->Configuration.DSConfig = 0; -+ bssid->Configuration.Length = 0; -+ -+ if (p) -+ bssid->Configuration.DSConfig = *(p + 2); -+ else { -+ /* In 5G, some ap do not have DSSET IE */ -+ /* checking HT info for channel */ -+ p = rtw_get_ie(bssid->IEs + ie_offset, _HT_ADD_INFO_IE_, &len, bssid->IELength - ie_offset); -+ if (p) { -+ struct HT_info_element *HT_info = (struct HT_info_element *)(p + 2); -+ bssid->Configuration.DSConfig = HT_info->primary_channel; -+ } else { -+ /* use current channel */ -+ bssid->Configuration.DSConfig = rtw_get_oper_ch(padapter); -+ } -+ } -+ -+ _rtw_memcpy(&bssid->Configuration.BeaconPeriod, rtw_get_beacon_interval_from_ie(bssid->IEs), 2); -+ bssid->Configuration.BeaconPeriod = le32_to_cpu(bssid->Configuration.BeaconPeriod); -+ -+ val16 = rtw_get_capability((WLAN_BSSID_EX *)bssid); -+ -+ if ((val16 & 0x03) == cap_ESS) { -+ bssid->InfrastructureMode = Ndis802_11Infrastructure; -+ _rtw_memcpy(bssid->MacAddress, get_addr2_ptr(pframe), ETH_ALEN); -+ } else if ((val16 & 0x03) == cap_IBSS){ -+ bssid->InfrastructureMode = Ndis802_11IBSS; -+ _rtw_memcpy(bssid->MacAddress, GetAddr3Ptr(pframe), ETH_ALEN); -+ } else if ((val16 & 0x03) == 0x00){ -+ u8 *mesh_id_ie, *mesh_conf_ie; -+ sint mesh_id_ie_len, mesh_conf_ie_len; -+ -+ mesh_id_ie = rtw_get_ie(bssid->IEs + ie_offset, WLAN_EID_MESH_ID, &mesh_id_ie_len, bssid->IELength - ie_offset); -+ mesh_conf_ie = rtw_get_ie(bssid->IEs + ie_offset, WLAN_EID_MESH_CONFIG, &mesh_conf_ie_len, bssid->IELength - ie_offset); -+ if (mesh_id_ie || mesh_conf_ie) { -+ if (!mesh_id_ie) { -+ RTW_INFO("cannot find Mesh ID for survey event\n"); -+ return _FAIL; -+ } -+ if (mesh_id_ie_len) { -+ if (mesh_id_ie_len > NDIS_802_11_LENGTH_SSID) { -+ RTW_INFO("Mesh ID too long (%d) for survey event\n", mesh_id_ie_len); -+ return _FAIL; -+ } -+ _rtw_memcpy(bssid->mesh_id.Ssid, (mesh_id_ie + 2), mesh_id_ie_len); -+ bssid->mesh_id.SsidLength = mesh_id_ie_len; -+ } else -+ bssid->mesh_id.SsidLength = 0; -+ -+ if (!mesh_conf_ie) { -+ RTW_INFO("cannot find Mesh config for survey event\n"); -+ return _FAIL; -+ } -+ if (mesh_conf_ie_len != 7) { -+ RTW_INFO("invalid Mesh conf IE len (%d) for survey event\n", mesh_conf_ie_len); -+ return _FAIL; -+ } -+ -+ bssid->InfrastructureMode = Ndis802_11_mesh; -+ _rtw_memcpy(bssid->MacAddress, GetAddr3Ptr(pframe), ETH_ALEN); -+ } else { -+ /* default cases */ -+ bssid->InfrastructureMode = Ndis802_11IBSS; -+ _rtw_memcpy(bssid->MacAddress, GetAddr3Ptr(pframe), ETH_ALEN); -+ } -+ } -+ -+ if (val16 & BIT(4)) -+ bssid->Privacy = 1; -+ else -+ bssid->Privacy = 0; -+ -+ bssid->Configuration.ATIMWindow = 0; -+ -+ /* 20/40 BSS Coexistence check */ -+ if ((pregistrypriv->wifi_spec == 1) && (_FALSE == pmlmeinfo->bwmode_updated)) { -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+#ifdef CONFIG_80211N_HT -+ p = rtw_get_ie(bssid->IEs + ie_offset, _HT_CAPABILITY_IE_, &len, bssid->IELength - ie_offset); -+ if (p && len > 0) { -+ struct HT_caps_element *pHT_caps; -+ pHT_caps = (struct HT_caps_element *)(p + 2); -+ -+ if (pHT_caps->u.HT_cap_element.HT_caps_info & BIT(14)) -+ pmlmepriv->num_FortyMHzIntolerant++; -+ } else -+ pmlmepriv->num_sta_no_ht++; -+#endif /* CONFIG_80211N_HT */ -+ -+ } -+ -+#if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) & 1 -+ if (strcmp(bssid->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { -+ RTW_INFO("Receiving %s("MAC_FMT", DSConfig:%u) from ch%u with ss:%3u, sq:%3u, RawRSSI:%3ld\n" -+ , bssid->Ssid.Ssid, MAC_ARG(bssid->MacAddress), bssid->Configuration.DSConfig -+ , rtw_get_oper_ch(padapter) -+ , bssid->PhyInfo.SignalStrength, bssid->PhyInfo.SignalQuality, bssid->Rssi -+ ); -+ } -+#endif -+ -+ /* mark bss info receving from nearby channel as SignalQuality 101 */ -+ if (bssid->Configuration.DSConfig != rtw_get_oper_ch(padapter)) -+ bssid->PhyInfo.SignalQuality = 101; -+ -+#ifdef CONFIG_RTW_80211K -+ p = rtw_get_ie(bssid->IEs + ie_offset, _EID_RRM_EN_CAP_IE_, &len, bssid->IELength - ie_offset); -+ if (p) -+ _rtw_memcpy(bssid->PhyInfo.rm_en_cap, (p + 2), *(p + 1)); -+ -+ /* save freerun counter */ -+ bssid->PhyInfo.free_cnt = precv_frame->u.hdr.attrib.free_cnt; -+#endif -+ return _SUCCESS; -+} -+ -+#ifdef CONFIG_AP_MODE -+void start_create_ibss(_adapter *padapter) -+{ -+ unsigned short caps; -+ u8 val8; -+ u8 join_type; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); -+ u8 doiqk = _FALSE; -+ pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; -+ pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); -+ -+ /* update wireless mode */ -+ update_wireless_mode(padapter); -+ -+ /* udpate capability */ -+ caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork); -+ update_capinfo(padapter, caps); -+ if (caps & cap_IBSS) { /* adhoc master */ -+ /* set_opmode_cmd(padapter, adhoc); */ /* removed */ -+ -+ val8 = 0xcf; -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); -+ -+ doiqk = _TRUE; -+ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); -+ -+ /* switch channel */ -+ set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ -+ doiqk = _FALSE; -+ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); -+ -+ beacon_timing_control(padapter); -+ -+ /* set msr to WIFI_FW_ADHOC_STATE */ -+ pmlmeinfo->state = WIFI_FW_ADHOC_STATE; -+ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); -+ -+ /* issue beacon */ -+ if (send_beacon(padapter) == _FAIL) { -+ -+ report_join_res(padapter, -1, WLAN_STATUS_UNSPECIFIED_FAILURE); -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ } else { -+ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress); -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED); -+ join_type = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); -+ -+ rtw_btcoex_connect_notify(padapter, join_type); -+ -+ report_join_res(padapter, 1, WLAN_STATUS_SUCCESS); -+ pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; -+ rtw_indicate_connect(padapter); -+ } -+ } else { -+ RTW_INFO("start_create_ibss, invalid cap:%x\n", caps); -+ return; -+ } -+ /* update bc/mc sta_info */ -+ update_bmc_sta(padapter); -+ -+} -+#endif /* CONFIG_AP_MODE */ -+ -+void start_clnt_join(_adapter *padapter) -+{ -+ unsigned short caps; -+ u8 val8; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); -+ int beacon_timeout; -+ u8 ASIX_ID[] = {0x00, 0x0E, 0xC6}; -+ -+ /* update wireless mode */ -+ update_wireless_mode(padapter); -+ -+ /* udpate capability */ -+ caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork); -+ update_capinfo(padapter, caps); -+ -+ /* check if sta is ASIX peer and fix IOT issue if it is. */ -+ if (_rtw_memcmp(get_my_bssid(&pmlmeinfo->network) , ASIX_ID , 3)) { -+ u8 iot_flag = _TRUE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_ASIX_IOT, (u8 *)(&iot_flag)); -+ } -+ -+ if (caps & cap_ESS) { -+ Set_MSR(padapter, WIFI_FW_STATION_STATE); -+ -+ val8 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) ? 0xcc : 0xcf; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) { -+ /* Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. */ -+ val8 = 0x4c; -+ } -+#endif -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); -+ -+#ifdef CONFIG_DEAUTH_BEFORE_CONNECT -+ /* Because of AP's not receiving deauth before */ -+ /* AP may: 1)not response auth or 2)deauth us after link is complete */ -+ /* issue deauth before issuing auth to deal with the situation */ -+ -+ /* Commented by Albert 2012/07/21 */ -+ /* For the Win8 P2P connection, it will be hard to have a successful connection if this Wi-Fi doesn't connect to it. */ -+ { -+#ifdef CONFIG_P2P -+ _queue *queue = &(padapter->mlmepriv.scanned_queue); -+ _list *head = get_list_head(queue); -+ _list *pos = get_next(head); -+ struct wlan_network *scanned = NULL; -+ u8 ie_offset = 0; -+ _irqL irqL; -+ bool has_p2p_ie = _FALSE; -+ -+ _enter_critical_bh(&(padapter->mlmepriv.scanned_queue.lock), &irqL); -+ -+ for (pos = get_next(head); !rtw_end_of_queue_search(head, pos); pos = get_next(pos)) { -+ -+ scanned = LIST_CONTAINOR(pos, struct wlan_network, list); -+ -+ if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE -+ && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE -+ ) { -+ ie_offset = (scanned->network.Reserved[0] == BSS_TYPE_PROB_REQ ? 0 : 12); -+ if (rtw_get_p2p_ie(scanned->network.IEs + ie_offset, scanned->network.IELength - ie_offset, NULL, NULL)) -+ has_p2p_ie = _TRUE; -+ break; -+ } -+ } -+ -+ _exit_critical_bh(&(padapter->mlmepriv.scanned_queue.lock), &irqL); -+ -+ if (scanned == NULL || rtw_end_of_queue_search(head, pos) || has_p2p_ie == _FALSE) -+#endif /* CONFIG_P2P */ -+ /* To avoid connecting to AP fail during resume process, change retry count from 5 to 1 */ -+ issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 1, 100); -+ } -+#endif /* CONFIG_DEAUTH_BEFORE_CONNECT */ -+ -+ /* here wait for receiving the beacon to start auth */ -+ /* and enable a timer */ -+ beacon_timeout = decide_wait_for_beacon_timeout(pmlmeinfo->bcn_interval); -+ set_link_timer(pmlmeext, beacon_timeout); -+ _set_timer(&padapter->mlmepriv.assoc_timer, -+ (REAUTH_TO * REAUTH_LIMIT) + (REASSOC_TO * REASSOC_LIMIT) + beacon_timeout); -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_roam(padapter)) { -+ rtw_ft_start_clnt_join(padapter); -+ } else -+#endif -+ { -+ rtw_sta_linking_test_set_start(); -+ pmlmeinfo->state = WIFI_FW_AUTH_NULL | WIFI_FW_STATION_STATE; -+ } -+ } else if (caps & cap_IBSS) { /* adhoc client */ -+ Set_MSR(padapter, WIFI_FW_ADHOC_STATE); -+ -+ val8 = 0xcf; -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); -+ -+ beacon_timing_control(padapter); -+ -+ pmlmeinfo->state = WIFI_FW_ADHOC_STATE; -+ -+ report_join_res(padapter, 1, WLAN_STATUS_SUCCESS); -+ } else { -+ /* RTW_INFO("marc: invalid cap:%x\n", caps); */ -+ return; -+ } -+ -+} -+ -+void start_clnt_auth(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ _cancel_timer_ex(&pmlmeext->link_timer); -+ -+ pmlmeinfo->state &= (~WIFI_FW_AUTH_NULL); -+ pmlmeinfo->state |= WIFI_FW_AUTH_STATE; -+ -+ pmlmeinfo->auth_seq = 1; -+ pmlmeinfo->reauth_count = 0; -+ pmlmeinfo->reassoc_count = 0; -+ pmlmeinfo->link_count = 0; -+ pmlmeext->retry = 0; -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_roam(padapter)) { -+ rtw_ft_set_status(padapter, RTW_FT_AUTHENTICATING_STA); -+ RTW_PRINT("start ft auth\n"); -+ } else -+#endif -+ RTW_PRINT("start auth\n"); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (rtw_sec_chk_auth_type(padapter, MLME_AUTHTYPE_SAE)) { -+ if (rtw_cached_pmkid(padapter, get_my_bssid(&pmlmeinfo->network)) != -1) { -+ RTW_INFO("SAE: PMKSA cache entry found\n"); -+ padapter->securitypriv.auth_alg = WLAN_AUTH_OPEN; -+ goto no_external_auth; -+ } -+ -+ RTW_PRINT("SAE: start external auth\n"); -+ rtw_cfg80211_external_auth_request(padapter, NULL); -+ return; -+ } -+no_external_auth: -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ issue_auth(padapter, NULL, 0); -+ -+ set_link_timer(pmlmeext, REAUTH_TO); -+ -+} -+ -+ -+void start_clnt_assoc(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ _cancel_timer_ex(&pmlmeext->link_timer); -+ -+ pmlmeinfo->state &= (~(WIFI_FW_AUTH_NULL | WIFI_FW_AUTH_STATE)); -+ pmlmeinfo->state |= (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE); -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_roam(padapter) -+ #ifdef CONFIG_RTW_WNM -+ || rtw_wnm_btm_reassoc_req(padapter) -+ #endif -+ ) -+ issue_reassocreq(padapter); -+ else -+#endif -+ issue_assocreq(padapter); -+ -+ set_link_timer(pmlmeext, REASSOC_TO); -+} -+ -+unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason, u8 locally_generated) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (!(_rtw_memcmp(MacAddr, get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) -+ return _SUCCESS; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ rtw_rson_do_disconnect(padapter); -+#endif -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { -+ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) { -+ if (report_del_sta_event(padapter, MacAddr, reason, _TRUE, locally_generated) != _FAIL) -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ } else if (pmlmeinfo->state & WIFI_FW_LINKING_STATE) { -+ if (report_join_res(padapter, -2, reason) != _FAIL) -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ } else -+ RTW_INFO(FUNC_ADPT_FMT" - End to Disconnect\n", FUNC_ADPT_ARG(padapter)); -+#ifdef CONFIG_RTW_80211R -+ rtw_ft_roam_status_reset(padapter); -+#endif -+#ifdef CONFIG_RTW_WNM -+ rtw_wnm_reset_btm_state(padapter); -+#endif -+ } -+ -+ return _SUCCESS; -+} -+ -+static void rtw_hidden_ssid_bss_count(_adapter *adapter, WLAN_BSSID_EX *bss) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ int chset_idx; -+ -+ if (bss->InfrastructureMode != Ndis802_11Infrastructure) -+ return; -+ -+ if (!hidden_ssid_ap(bss)) -+ return; -+ -+ chset_idx = rtw_chset_search_ch(chset, bss->Configuration.DSConfig); -+ if (chset_idx < 0) -+ return; -+ -+ chset[chset_idx].hidden_bss_cnt++; -+} -+ -+/**************************************************************************** -+ -+Following are the functions to report events -+ -+*****************************************************************************/ -+ -+void report_survey_event(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct cmd_obj *pcmd_obj; -+ u8 *pevtcmd; -+ u32 cmdsz; -+ struct survey_event *psurvey_evt; -+ struct rtw_evt_header *evt_hdr; -+ struct mlme_ext_priv *pmlmeext; -+ struct cmd_priv *pcmdpriv; -+ /* u8 *pframe = precv_frame->u.hdr.rx_data; */ -+ /* uint len = precv_frame->u.hdr.len; */ -+ -+ if (!padapter) -+ return; -+ -+ pmlmeext = &padapter->mlmeextpriv; -+ pcmdpriv = &padapter->cmdpriv; -+ -+ pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd_obj == NULL) -+ return; -+ -+ cmdsz = (sizeof(struct survey_event) + sizeof(struct rtw_evt_header)); -+ pevtcmd = (u8 *)rtw_zmalloc(cmdsz); -+ if (pevtcmd == NULL) { -+ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); -+ return; -+ } -+ -+ _rtw_init_listhead(&pcmd_obj->list); -+ -+ pcmd_obj->cmdcode = CMD_SET_MLME_EVT; -+ pcmd_obj->cmdsz = cmdsz; -+ pcmd_obj->parmbuf = pevtcmd; -+ -+ pcmd_obj->rsp = NULL; -+ pcmd_obj->rspsz = 0; -+ -+ evt_hdr = (struct rtw_evt_header *)(pevtcmd); -+ evt_hdr->len = sizeof(struct survey_event); -+ evt_hdr->id = EVT_SURVEY; -+ evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); -+ -+ psurvey_evt = (struct survey_event *)(pevtcmd + sizeof(struct rtw_evt_header)); -+ -+ if (collect_bss_info(padapter, precv_frame, (WLAN_BSSID_EX *)&psurvey_evt->bss) == _FAIL) { -+ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pevtcmd, cmdsz); -+ return; -+ } -+ -+ rtw_hidden_ssid_bss_count(padapter, &psurvey_evt->bss); -+ -+ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); -+ -+ pmlmeext->sitesurvey_res.bss_cnt++; -+ -+ return; -+ -+} -+ -+/* -+* @acs: aim to trigger channel selection -+*/ -+void report_surveydone_event(_adapter *padapter, bool acs) -+{ -+ struct cmd_obj *pcmd_obj; -+ u8 *pevtcmd; -+ u32 cmdsz; -+ struct surveydone_event *psurveydone_evt; -+ struct rtw_evt_header *evt_hdr; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ -+ pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd_obj == NULL) -+ return; -+ -+ cmdsz = (sizeof(struct surveydone_event) + sizeof(struct rtw_evt_header)); -+ pevtcmd = (u8 *)rtw_zmalloc(cmdsz); -+ if (pevtcmd == NULL) { -+ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); -+ return; -+ } -+ -+ _rtw_init_listhead(&pcmd_obj->list); -+ -+ pcmd_obj->cmdcode = CMD_SET_MLME_EVT; -+ pcmd_obj->cmdsz = cmdsz; -+ pcmd_obj->parmbuf = pevtcmd; -+ -+ pcmd_obj->rsp = NULL; -+ pcmd_obj->rspsz = 0; -+ -+ evt_hdr = (struct rtw_evt_header *)(pevtcmd); -+ evt_hdr->len = sizeof(struct surveydone_event); -+ evt_hdr->id = EVT_SURVEY_DONE; -+ evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); -+ -+ psurveydone_evt = (struct surveydone_event *)(pevtcmd + sizeof(struct rtw_evt_header)); -+ psurveydone_evt->bss_cnt = pmlmeext->sitesurvey_res.bss_cnt; -+ psurveydone_evt->activate_ch_cnt = pmlmeext->sitesurvey_res.activate_ch_cnt; -+ psurveydone_evt->acs = acs; -+ -+ RTW_INFO("survey done event(%x) band:%d for "ADPT_FMT"\n", psurveydone_evt->bss_cnt, padapter->setband, ADPT_ARG(padapter)); -+ -+ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); -+ -+ return; -+ -+} -+ -+u32 report_join_res(_adapter *padapter, int aid_res, u16 status) -+{ -+ struct cmd_obj *pcmd_obj; -+ u8 *pevtcmd; -+ u32 cmdsz; -+ struct joinbss_event *pjoinbss_evt; -+ struct rtw_evt_header *evt_hdr; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u32 ret = _FAIL; -+ -+ pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd_obj == NULL) -+ goto exit; -+ -+ cmdsz = (sizeof(struct joinbss_event) + sizeof(struct rtw_evt_header)); -+ pevtcmd = (u8 *)rtw_zmalloc(cmdsz); -+ if (pevtcmd == NULL) { -+ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); -+ goto exit; -+ } -+ -+ _rtw_init_listhead(&pcmd_obj->list); -+ -+ pcmd_obj->cmdcode = CMD_SET_MLME_EVT; -+ pcmd_obj->cmdsz = cmdsz; -+ pcmd_obj->parmbuf = pevtcmd; -+ -+ pcmd_obj->rsp = NULL; -+ pcmd_obj->rspsz = 0; -+ -+ evt_hdr = (struct rtw_evt_header *)(pevtcmd); -+ evt_hdr->len = sizeof(struct joinbss_event); -+ evt_hdr->id = EVT_JOINBSS; -+ evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); -+ -+ pjoinbss_evt = (struct joinbss_event *)(pevtcmd + sizeof(struct rtw_evt_header)); -+ _rtw_memcpy((unsigned char *)(&(pjoinbss_evt->network.network)), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX)); -+ pjoinbss_evt->network.join_res = pjoinbss_evt->network.aid = aid_res; -+ -+ RTW_INFO("report_join_res(%d, %u)\n", aid_res, status); -+ -+ -+ rtw_joinbss_event_prehandle(padapter, (u8 *)&pjoinbss_evt->network, status); -+ -+ -+ ret = rtw_enqueue_cmd(pcmdpriv, pcmd_obj); -+ -+exit: -+ return ret; -+} -+ -+void report_wmm_edca_update(_adapter *padapter) -+{ -+ struct cmd_obj *pcmd_obj; -+ u8 *pevtcmd; -+ u32 cmdsz; -+ struct wmm_event *pwmm_event; -+ struct rtw_evt_header *evt_hdr; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ -+ pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd_obj == NULL) -+ return; -+ -+ cmdsz = (sizeof(struct wmm_event) + sizeof(struct rtw_evt_header)); -+ pevtcmd = (u8 *)rtw_zmalloc(cmdsz); -+ if (pevtcmd == NULL) { -+ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); -+ return; -+ } -+ -+ _rtw_init_listhead(&pcmd_obj->list); -+ -+ pcmd_obj->cmdcode = CMD_SET_MLME_EVT; -+ pcmd_obj->cmdsz = cmdsz; -+ pcmd_obj->parmbuf = pevtcmd; -+ -+ pcmd_obj->rsp = NULL; -+ pcmd_obj->rspsz = 0; -+ -+ evt_hdr = (struct rtw_evt_header *)(pevtcmd); -+ evt_hdr->len = sizeof(struct wmm_event); -+ evt_hdr->id = EVT_WMM_UPDATE; -+ evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); -+ -+ pwmm_event = (struct wmm_event *)(pevtcmd + sizeof(struct rtw_evt_header)); -+ pwmm_event->wmm = 0; -+ -+ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); -+ -+ return; -+ -+} -+ -+u32 report_del_sta_event(_adapter *padapter, unsigned char *MacAddr, unsigned short reason, bool enqueue, u8 locally_generated) -+{ -+ struct cmd_obj *pcmd_obj; -+ u8 *pevtcmd; -+ u32 cmdsz; -+ struct sta_info *psta; -+ int mac_id = -1; -+ struct stadel_event *pdel_sta_evt; -+ struct rtw_evt_header *evt_hdr; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ /* prepare cmd parameter */ -+ cmdsz = (sizeof(struct stadel_event) + sizeof(struct rtw_evt_header)); -+ pevtcmd = (u8 *)rtw_zmalloc(cmdsz); -+ if (pevtcmd == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ evt_hdr = (struct rtw_evt_header *)(pevtcmd); -+ evt_hdr->len = sizeof(struct stadel_event); -+ evt_hdr->id = EVT_DEL_STA; -+ evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); -+ -+ pdel_sta_evt = (struct stadel_event *)(pevtcmd + sizeof(struct rtw_evt_header)); -+ _rtw_memcpy((unsigned char *)(&(pdel_sta_evt->macaddr)), MacAddr, ETH_ALEN); -+ _rtw_memcpy((unsigned char *)(pdel_sta_evt->rsvd), (unsigned char *)(&reason), 2); -+ psta = rtw_get_stainfo(&padapter->stapriv, MacAddr); -+ if (psta) -+ mac_id = (int)psta->cmn.mac_id; -+ else -+ mac_id = (-1); -+ pdel_sta_evt->mac_id = mac_id; -+ pdel_sta_evt->locally_generated = locally_generated; -+ -+ if (!enqueue) { -+ /* do directly */ -+ rtw_stadel_event_callback(padapter, (u8 *)pdel_sta_evt); -+ rtw_mfree(pevtcmd, cmdsz); -+ } else { -+ pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd_obj == NULL) { -+ rtw_mfree(pevtcmd, cmdsz); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_init_listhead(&pcmd_obj->list); -+ pcmd_obj->cmdcode = CMD_SET_MLME_EVT; -+ pcmd_obj->cmdsz = cmdsz; -+ pcmd_obj->parmbuf = pevtcmd; -+ -+ pcmd_obj->rsp = NULL; -+ pcmd_obj->rspsz = 0; -+ -+ res = rtw_enqueue_cmd(pcmdpriv, pcmd_obj); -+ } -+ -+exit: -+ -+ RTW_INFO(FUNC_ADPT_FMT" "MAC_FMT" mac_id=%d, enqueue:%d, res:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(MacAddr), mac_id, enqueue, res); -+ -+ return res; -+} -+ -+void report_add_sta_event(_adapter *padapter, unsigned char *MacAddr) -+{ -+ struct cmd_obj *pcmd_obj; -+ u8 *pevtcmd; -+ u32 cmdsz; -+ struct stassoc_event *padd_sta_evt; -+ struct rtw_evt_header *evt_hdr; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ -+ pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd_obj == NULL) -+ return; -+ -+ cmdsz = (sizeof(struct stassoc_event) + sizeof(struct rtw_evt_header)); -+ pevtcmd = (u8 *)rtw_zmalloc(cmdsz); -+ if (pevtcmd == NULL) { -+ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); -+ return; -+ } -+ -+ _rtw_init_listhead(&pcmd_obj->list); -+ -+ pcmd_obj->cmdcode = CMD_SET_MLME_EVT; -+ pcmd_obj->cmdsz = cmdsz; -+ pcmd_obj->parmbuf = pevtcmd; -+ -+ pcmd_obj->rsp = NULL; -+ pcmd_obj->rspsz = 0; -+ -+ evt_hdr = (struct rtw_evt_header *)(pevtcmd); -+ evt_hdr->len = sizeof(struct stassoc_event); -+ evt_hdr->id = EVT_ADD_STA; -+ evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); -+ -+ padd_sta_evt = (struct stassoc_event *)(pevtcmd + sizeof(struct rtw_evt_header)); -+ _rtw_memcpy((unsigned char *)(&(padd_sta_evt->macaddr)), MacAddr, ETH_ALEN); -+ -+ RTW_INFO("report_add_sta_event: add STA\n"); -+ -+ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); -+ -+ return; -+} -+ -+ -+bool rtw_port_switch_chk(_adapter *adapter) -+{ -+ bool switch_needed = _FALSE; -+#ifdef CONFIG_CONCURRENT_MODE -+#ifdef CONFIG_RUNTIME_PORT_SWITCH -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(dvobj); -+ _adapter *if_port0 = NULL; -+ _adapter *if_port1 = NULL; -+ struct mlme_ext_info *if_port0_mlmeinfo = NULL; -+ struct mlme_ext_info *if_port1_mlmeinfo = NULL; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (get_hw_port(dvobj->padapters[i]) == HW_PORT0) { -+ if_port0 = dvobj->padapters[i]; -+ if_port0_mlmeinfo = &(if_port0->mlmeextpriv.mlmext_info); -+ } else if (get_hw_port(dvobj->padapters[i]) == HW_PORT1) { -+ if_port1 = dvobj->padapters[i]; -+ if_port1_mlmeinfo = &(if_port1->mlmeextpriv.mlmext_info); -+ } -+ } -+ -+ if (if_port0 == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (if_port1 == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+#ifdef DBG_RUNTIME_PORT_SWITCH -+ RTW_INFO(FUNC_ADPT_FMT" wowlan_mode:%u\n" -+ ADPT_FMT", port0, mlmeinfo->state:0x%08x, p2p_state:%d, %d\n" -+ ADPT_FMT", port1, mlmeinfo->state:0x%08x, p2p_state:%d, %d\n", -+ FUNC_ADPT_ARG(adapter), pwrctl->wowlan_mode, -+ ADPT_ARG(if_port0), if_port0_mlmeinfo->state, rtw_p2p_state(&if_port0->wdinfo), rtw_p2p_chk_state(&if_port0->wdinfo, P2P_STATE_NONE), -+ ADPT_ARG(if_port1), if_port1_mlmeinfo->state, rtw_p2p_state(&if_port1->wdinfo), rtw_p2p_chk_state(&if_port1->wdinfo, P2P_STATE_NONE)); -+#endif /* DBG_RUNTIME_PORT_SWITCH */ -+ -+#ifdef CONFIG_WOWLAN -+ /* WOWLAN interface(primary, for now) should be port0 */ -+ if (pwrctl->wowlan_mode == _TRUE) { -+ if (!is_primary_adapter(if_port0)) { -+ RTW_INFO("%s "ADPT_FMT" enable WOWLAN\n", __func__, ADPT_ARG(if_port1)); -+ switch_needed = _TRUE; -+ } -+ goto exit; -+ } -+#endif /* CONFIG_WOWLAN */ -+ -+ /* AP/Mesh should use port0 for ctl frame's ack */ -+ if ((if_port1_mlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { -+ RTW_INFO("%s "ADPT_FMT" is AP/GO/Mesh\n", __func__, ADPT_ARG(if_port1)); -+ switch_needed = _TRUE; -+ goto exit; -+ } -+ -+ /* GC should use port0 for p2p ps */ -+ if (((if_port1_mlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) -+ && (if_port1_mlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) -+#ifdef CONFIG_P2P -+ && !rtw_p2p_chk_state(&if_port1->wdinfo, P2P_STATE_NONE) -+#endif -+ && !check_fwstate(&if_port1->mlmepriv, WIFI_UNDER_WPS) -+ ) { -+ RTW_INFO("%s "ADPT_FMT" is GC\n", __func__, ADPT_ARG(if_port1)); -+ switch_needed = _TRUE; -+ goto exit; -+ } -+ -+ /* port1 linked, but port0 not linked */ -+ if ((if_port1_mlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) -+ && !(if_port0_mlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) -+ && ((if_port0_mlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) -+ ) { -+ RTW_INFO("%s "ADPT_FMT" is SINGLE_LINK\n", __func__, ADPT_ARG(if_port1)); -+ switch_needed = _TRUE; -+ goto exit; -+ } -+ -+exit: -+#ifdef DBG_RUNTIME_PORT_SWITCH -+ RTW_INFO(FUNC_ADPT_FMT" ret:%d\n", FUNC_ADPT_ARG(adapter), switch_needed); -+#endif /* DBG_RUNTIME_PORT_SWITCH */ -+#endif /* CONFIG_RUNTIME_PORT_SWITCH */ -+#endif /* CONFIG_CONCURRENT_MODE */ -+ return switch_needed; -+} -+ -+/**************************************************************************** -+ -+Following are the event callback functions -+ -+*****************************************************************************/ -+ -+/* for sta/adhoc mode */ -+void update_sta_info(_adapter *padapter, struct sta_info *psta) -+{ -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ /* ERP */ -+ VCS_update(padapter, psta); -+ -+#ifdef CONFIG_80211N_HT -+ /* HT */ -+ if (pmlmepriv->htpriv.ht_option) { -+ psta->htpriv.ht_option = _TRUE; -+ -+ psta->htpriv.ampdu_enable = pmlmepriv->htpriv.ampdu_enable; -+ -+ psta->htpriv.rx_ampdu_min_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & IEEE80211_HT_CAP_AMPDU_DENSITY) >> 2; -+ -+ if (support_short_GI(padapter, &(pmlmeinfo->HT_caps), CHANNEL_WIDTH_20)) -+ psta->htpriv.sgi_20m = _TRUE; -+ -+ if (support_short_GI(padapter, &(pmlmeinfo->HT_caps), CHANNEL_WIDTH_40)) -+ psta->htpriv.sgi_40m = _TRUE; -+ -+ psta->qos_option = _TRUE; -+ -+ psta->htpriv.ldpc_cap = pmlmepriv->htpriv.ldpc_cap; -+ psta->htpriv.stbc_cap = pmlmepriv->htpriv.stbc_cap; -+ psta->htpriv.beamform_cap = pmlmepriv->htpriv.beamform_cap; -+ -+ _rtw_memcpy(&psta->htpriv.ht_cap, &pmlmeinfo->HT_caps, sizeof(struct rtw_ieee80211_ht_cap)); -+ #ifdef CONFIG_BEAMFORMING -+ psta->htpriv.beamform_cap = pmlmepriv->htpriv.beamform_cap; -+ psta->cmn.bf_info.ht_beamform_cap = pmlmepriv->htpriv.beamform_cap; -+ #endif -+ } else -+#endif /* CONFIG_80211N_HT */ -+ { -+#ifdef CONFIG_80211N_HT -+ psta->htpriv.ht_option = _FALSE; -+ psta->htpriv.ampdu_enable = _FALSE; -+ psta->htpriv.tx_amsdu_enable = _FALSE; -+ psta->htpriv.sgi_20m = _FALSE; -+ psta->htpriv.sgi_40m = _FALSE; -+#endif /* CONFIG_80211N_HT */ -+ psta->qos_option = _FALSE; -+ -+ } -+ -+#ifdef CONFIG_80211N_HT -+ psta->htpriv.ch_offset = pmlmeext->cur_ch_offset; -+ -+ psta->htpriv.agg_enable_bitmap = 0x0;/* reset */ -+ psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */ -+#endif /* CONFIG_80211N_HT */ -+ -+ psta->cmn.bw_mode = pmlmeext->cur_bwmode; -+ -+ /* QoS */ -+ if (pmlmepriv->qospriv.qos_option) -+ psta->qos_option = _TRUE; -+ -+#ifdef CONFIG_80211AC_VHT -+ _rtw_memcpy(&psta->vhtpriv, &pmlmepriv->vhtpriv, sizeof(struct vht_priv)); -+ if (psta->vhtpriv.vht_option) { -+ psta->cmn.ra_info.is_vht_enable = _TRUE; -+ #ifdef CONFIG_BEAMFORMING -+ psta->vhtpriv.beamform_cap = pmlmepriv->vhtpriv.beamform_cap; -+ psta->cmn.bf_info.vht_beamform_cap = pmlmepriv->vhtpriv.beamform_cap; -+ #endif /*CONFIG_BEAMFORMING*/ -+ } -+#endif /* CONFIG_80211AC_VHT */ -+ psta->cmn.ra_info.is_support_sgi = query_ra_short_GI(psta, rtw_get_tx_bw_mode(padapter, psta)); -+ update_ldpc_stbc_cap(psta); -+ -+ _enter_critical_bh(&psta->lock, &irqL); -+ psta->state = WIFI_ASOC_STATE; -+ _exit_critical_bh(&psta->lock, &irqL); -+ -+} -+ -+static void rtw_mlmeext_disconnect(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 self_action = MLME_ACTION_UNKNOWN; -+ u8 state_backup = (pmlmeinfo->state & 0x03); -+ u8 ASIX_ID[] = {0x00, 0x0E, 0xC6}; -+ -+ if (MLME_IS_AP(padapter)) -+ self_action = MLME_AP_STOPPED; -+ else if (MLME_IS_MESH(padapter)) -+ self_action = MLME_MESH_STOPPED; -+ else if (MLME_IS_STA(padapter)) -+ self_action = MLME_STA_DISCONNECTED; -+ else if (MLME_IS_ADHOC(padapter) || MLME_IS_ADHOC_MASTER(padapter)) -+ self_action = MLME_ADHOC_STOPPED; -+ else { -+ RTW_INFO("state:0x%x\n", MLME_STATE(padapter)); -+ rtw_warn_on(1); -+ } -+ -+ /* set_opmode_cmd(padapter, infra_client_with_mlme); */ -+#ifdef CONFIG_HW_P0_TSF_SYNC -+ if (self_action == MLME_STA_DISCONNECTED) -+ correct_TSF(padapter, self_action); -+#endif -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); -+ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); -+ if (self_action == MLME_STA_DISCONNECTED) -+ rtw_hal_rcr_set_chk_bssid(padapter, self_action); -+ -+ /* set MSR to no link state->infra. mode */ -+ Set_MSR(padapter, _HW_STATE_STATION_); -+ -+ /* check if sta is ASIX peer and fix IOT issue if it is. */ -+ if (_rtw_memcmp(get_my_bssid(&pmlmeinfo->network) , ASIX_ID , 3)) { -+ u8 iot_flag = _FALSE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_ASIX_IOT, (u8 *)(&iot_flag)); -+ } -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ -+#ifdef CONFIG_MCC_MODE -+ /* mcc disconnect setting before download LPS rsvd page */ -+ rtw_hal_set_mcc_setting_disconnect(padapter); -+#endif /* CONFIG_MCC_MODE */ -+ -+ if (state_backup == WIFI_FW_STATION_STATE) { -+ if (rtw_port_switch_chk(padapter) == _TRUE) { -+ rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); -+#ifdef CONFIG_LPS -+ { -+ _adapter *port0_iface = dvobj_get_port0_adapter(adapter_to_dvobj(padapter)); -+ if (port0_iface) -+ rtw_lps_ctrl_wk_cmd(port0_iface, LPS_CTRL_CONNECT, RTW_CMDF_DIRECTLY); -+ } -+#endif -+ } -+ } -+ -+ /* switch to the 20M Hz mode after disconnect */ -+ pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; -+ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+ pmlmeext->txss_1ss = _FALSE; -+#endif -+ -+#ifdef CONFIG_FCS_MODE -+ if (EN_FCS(padapter)) -+ rtw_hal_set_hwreg(padapter, HW_VAR_STOP_FCS_MODE, NULL); -+#endif -+ -+ if (!(MLME_IS_STA(padapter) && MLME_IS_OPCH_SW(padapter))) { -+ /* DFS and channel status no need to check here for STA under OPCH_SW */ -+ u8 ch, bw, offset; -+ -+ #ifdef CONFIG_DFS_MASTER -+ rtw_dfs_rd_en_decision(padapter, self_action, 0); -+ #endif -+ -+ if (rtw_mi_get_ch_setting_union_no_self(padapter, &ch, &bw, &offset) != 0) -+ set_channel_bwmode(padapter, ch, offset, bw); -+ rtw_mi_update_union_chan_inf(padapter, ch, offset, bw); -+ rtw_rfctl_update_op_mode(adapter_to_rfctl(padapter), BIT(padapter->iface_id), 0); -+ } -+ -+ flush_all_cam_entry(padapter); -+ -+ _cancel_timer_ex(&pmlmeext->link_timer); -+ -+ /* pmlmepriv->LinkDetectInfo.TrafficBusyState = _FALSE; */ -+ pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; -+ pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; -+ -+#ifdef CONFIG_TDLS -+ padapter->tdlsinfo.ap_prohibited = _FALSE; -+ -+ /* For TDLS channel switch, currently we only allow it to work in wifi logo test mode */ -+ if (padapter->registrypriv.wifi_spec == 1) -+ padapter->tdlsinfo.ch_switch_prohibited = _FALSE; -+#endif /* CONFIG_TDLS */ -+ -+#ifdef CONFIG_WMMPS_STA -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { -+ /* reset currently related uapsd setting when the connection has broken */ -+ pmlmepriv->qospriv.uapsd_max_sp_len = 0; -+ pmlmepriv->qospriv.uapsd_tid = 0; -+ pmlmepriv->qospriv.uapsd_tid_delivery_enabled = 0; -+ pmlmepriv->qospriv.uapsd_tid_trigger_enabled = 0; -+ pmlmepriv->qospriv.uapsd_ap_supported = 0; -+ } -+#endif /* CONFIG_WMMPS_STA */ -+#ifdef CONFIG_RTS_FULL_BW -+ rtw_set_rts_bw(padapter); -+#endif/*CONFIG_RTS_FULL_BW*/ -+ -+} -+ -+void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) -+{ -+ struct sta_info *psta; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 join_type; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+#ifndef CONFIG_IOCTL_CFG80211 -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+#endif -+ -+ if (pmlmepriv->wpa_phase == _TRUE) -+ pmlmepriv->wpa_phase = _FALSE; -+ -+ if (join_res < 0) { -+ join_type = 1; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); -+ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_DISCONNECTED); -+ -+ rtw_btcoex_connect_notify(padapter, join_type); -+ -+ goto exit_mlmeext_joinbss_event_callback; -+ } -+ -+#ifdef CONFIG_ARP_KEEP_ALIVE -+ pmlmepriv->bGetGateway = 1; -+ pmlmepriv->GetGatewayTryCnt = 0; -+#endif -+ -+#ifdef CONFIG_AP_MODE -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { -+ /* update bc/mc sta_info */ -+ update_bmc_sta(padapter); -+ } -+#endif -+ -+ /* turn on dynamic functions */ -+ /* Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE); */ -+ -+ /* update IOT-releated issue */ -+ update_IOT_info(padapter); -+ -+ #ifdef CONFIG_RTS_FULL_BW -+ rtw_set_rts_bw(padapter); -+ #endif/*CONFIG_RTS_FULL_BW*/ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, cur_network->SupportedRates); -+ -+ /* BCN interval */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pmlmeinfo->bcn_interval)); -+ -+ /* udpate capability */ -+ update_capinfo(padapter, pmlmeinfo->capability); -+ -+ /* WMM, Update EDCA param */ -+ WMMOnAssocRsp(padapter); -+#ifdef CONFIG_80211N_HT -+ /* HT */ -+ HTOnAssocRsp(padapter); -+#endif /* CONFIG_80211N_HT */ -+#ifdef CONFIG_80211AC_VHT -+ /* VHT */ -+ VHTOnAssocRsp(padapter); -+#endif -+ -+ psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); -+ if (psta) { /* only for infra. mode */ -+ psta->wireless_mode = pmlmeext->cur_wireless_mode; -+ -+ /* set per sta rate after updating HT cap. */ -+ set_sta_rate(padapter, psta); -+ -+ rtw_sta_media_status_rpt(padapter, psta, 1); -+ -+ /* wakeup macid after join bss successfully to ensure -+ the subsequent data frames can be sent out normally */ -+ rtw_hal_macid_wakeup(padapter, psta->cmn.mac_id); -+ -+ rtw_xmit_queue_clear(psta); -+ } -+ -+#ifndef CONFIG_IOCTL_CFG80211 -+ if (is_wep_enc(psecuritypriv->dot11PrivacyAlgrthm)) -+ rtw_sec_restore_wep_key(padapter); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ if (rtw_port_switch_chk(padapter) == _TRUE) -+ rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); -+ -+ join_type = 2; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); -+ -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTED); -+ -+ /* correcting TSF */ -+ correct_TSF(padapter, MLME_STA_CONNECTED); -+ -+ /* set_link_timer(pmlmeext, DISCONNECT_TO); */ -+ } -+ -+#ifdef CONFIG_LPS -+ #ifndef CONFIG_FW_MULTI_PORT_SUPPORT -+ if (get_hw_port(padapter) == HW_PORT0) -+ #endif -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_CONNECT, RTW_CMDF_DIRECTLY); -+#endif -+ -+ rtw_btcoex_connect_notify(padapter, join_type); -+ -+#ifdef CONFIG_BEAMFORMING -+ if (psta) -+ beamforming_wk_cmd(padapter, BEAMFORMING_CTRL_ENTER, (u8 *)psta, sizeof(struct sta_info), 0); -+#endif/*CONFIG_BEAMFORMING*/ -+ -+exit_mlmeext_joinbss_event_callback: -+ -+ rtw_join_done_chk_ch(padapter, join_res); -+#ifdef CONFIG_RTW_REPEATER_SON -+ rtw_rson_join_done(padapter); -+#endif -+ -+ RTW_INFO("=>%s - End to Connection without 4-way\n", __FUNCTION__); -+} -+ -+/* currently only adhoc mode will go here */ -+void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta) -+{ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 join_type; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { -+ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) { /* adhoc master or sta_count>1 */ -+ /* nothing to do */ -+ } else { /* adhoc client */ -+ #ifdef CONFIG_AP_MODE -+ /* update TSF Value */ -+ /* update_TSF(pmlmeext, pframe, len); */ -+ -+ /* correcting TSF */ -+ correct_TSF(padapter, MLME_ADHOC_STARTED); -+ -+ /* start beacon */ -+ if (send_beacon(padapter) == _FAIL) -+ rtw_warn_on(1); -+ -+ pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; -+ #endif -+ } -+ -+ join_type = 2; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); -+ -+ rtw_btcoex_connect_notify(padapter, join_type); -+ } -+ -+ /* update adhoc sta_info */ -+ update_sta_info(padapter, psta); -+ -+ rtw_hal_update_sta_ra_info(padapter, psta); -+ -+ /* ToDo: HT for Ad-hoc */ -+ psta->wireless_mode = rtw_check_network_type(psta->bssrateset, psta->bssratelen, pmlmeext->cur_channel); -+ rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); -+ -+ /* rate radaptive */ -+ Update_RA_Entry(padapter, psta); -+} -+ -+void mlmeext_sta_del_event_callback(_adapter *padapter) -+{ -+ if (is_client_associated_to_ap(padapter) || is_IBSS_empty(padapter)) -+ rtw_mlmeext_disconnect(padapter); -+} -+ -+/**************************************************************************** -+ -+Following are the functions for the timer handlers -+ -+*****************************************************************************/ -+void _linked_info_dump(_adapter *padapter) -+{ -+ if (padapter->bLinkInfoDump) { -+ rtw_hal_get_def_var(padapter, HW_DEF_RA_INFO_DUMP, RTW_DBGDUMP); -+ rtw_hal_set_odm_var(padapter, HAL_ODM_RX_INFO_DUMP, RTW_DBGDUMP, _FALSE); -+ } -+} -+/******************************************************************** -+ -+When station does not receive any packet in MAX_CONTINUAL_NORXPACKET_COUNT*2 seconds, -+recipient station will teardown the block ack by issuing DELBA frame. -+ -+*********************************************************************/ -+void rtw_delba_check(_adapter *padapter, struct sta_info *psta, u8 from_timer) -+{ -+ int i = 0; -+ int ret = _SUCCESS; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ /* -+ IOT issue,occur Broadcom ap(Buffalo WZR-D1800H,Netgear R6300). -+ AP is originator.AP does not transmit unicast packets when STA response its BAR. -+ This case probably occur ap issue BAR after AP builds BA. -+ -+ Follow 802.11 spec, STA shall maintain an inactivity timer for every negotiated Block Ack setup. -+ The inactivity timer is not reset when MPDUs corresponding to other TIDs are received. -+ */ -+ if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) { -+ for (i = 0; i < TID_NUM ; i++) { -+ if ((psta->recvreorder_ctrl[i].enable) && -+ (sta_rx_data_qos_pkts(psta, i) == sta_last_rx_data_qos_pkts(psta, i)) ) { -+ if (_TRUE == rtw_inc_and_chk_continual_no_rx_packet(psta, i)) { -+ /* send a DELBA frame to the peer STA with the Reason Code field set to TIMEOUT */ -+ if (!from_timer) -+ ret = issue_del_ba_ex(padapter, psta->cmn.mac_addr, i, 39, 0, 3, 1); -+ else -+ issue_del_ba(padapter, psta->cmn.mac_addr, i, 39, 0); -+ psta->recvreorder_ctrl[i].enable = _FALSE; -+ if (ret != _FAIL) -+ psta->recvreorder_ctrl[i].ampdu_size = RX_AMPDU_SIZE_INVALID; -+ rtw_reset_continual_no_rx_packet(psta, i); -+ } -+ } else { -+ /* The inactivity timer is reset when MPDUs to the TID is received. */ -+ rtw_reset_continual_no_rx_packet(psta, i); -+ } -+ } -+ } -+} -+ -+ -+u8 chk_ap_is_alive(_adapter *padapter, struct sta_info *psta) -+{ -+ u8 ret = _FALSE; -+#ifdef DBG_EXPIRATION_CHK -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ RTW_INFO(FUNC_ADPT_FMT" rx:"STA_PKTS_FMT", beacon:%llu, probersp_to_self:%llu" -+ /*", probersp_bm:%llu, probersp_uo:%llu, probereq:%llu, BI:%u"*/ -+ ", retry:%u\n" -+ , FUNC_ADPT_ARG(padapter) -+ , STA_RX_PKTS_DIFF_ARG(psta) -+ , psta->sta_stats.rx_beacon_pkts - psta->sta_stats.last_rx_beacon_pkts -+ , psta->sta_stats.rx_probersp_pkts - psta->sta_stats.last_rx_probersp_pkts -+ /*, psta->sta_stats.rx_probersp_bm_pkts - psta->sta_stats.last_rx_probersp_bm_pkts -+ , psta->sta_stats.rx_probersp_uo_pkts - psta->sta_stats.last_rx_probersp_uo_pkts -+ , psta->sta_stats.rx_probereq_pkts - psta->sta_stats.last_rx_probereq_pkts -+ , pmlmeinfo->bcn_interval*/ -+ , pmlmeext->retry -+ ); -+ -+ RTW_INFO(FUNC_ADPT_FMT" tx_pkts:%llu, link_count:%u\n", FUNC_ADPT_ARG(padapter) -+ , sta_tx_pkts(psta) -+ , pmlmeinfo->link_count -+ ); -+#endif -+ -+ if ((sta_rx_data_pkts(psta) == sta_last_rx_data_pkts(psta)) -+ && sta_rx_beacon_pkts(psta) == sta_last_rx_beacon_pkts(psta) -+ && sta_rx_probersp_pkts(psta) == sta_last_rx_probersp_pkts(psta) -+ ) -+ ret = _FALSE; -+ else -+ ret = _TRUE; -+ -+ sta_update_last_rx_pkts(psta); -+ -+ return ret; -+} -+ -+u8 chk_adhoc_peer_is_alive(struct sta_info *psta) -+{ -+ u8 ret = _TRUE; -+ -+#ifdef DBG_EXPIRATION_CHK -+ RTW_INFO("sta:"MAC_FMT", rssi:%d, rx:"STA_PKTS_FMT", beacon:%llu, probersp_to_self:%llu" -+ /*", probersp_bm:%llu, probersp_uo:%llu, probereq:%llu, BI:%u"*/ -+ ", expire_to:%u\n" -+ , MAC_ARG(psta->cmn.mac_addr) -+ , psta->cmn.rssi_stat.rssi -+ , STA_RX_PKTS_DIFF_ARG(psta) -+ , psta->sta_stats.rx_beacon_pkts - psta->sta_stats.last_rx_beacon_pkts -+ , psta->sta_stats.rx_probersp_pkts - psta->sta_stats.last_rx_probersp_pkts -+ /*, psta->sta_stats.rx_probersp_bm_pkts - psta->sta_stats.last_rx_probersp_bm_pkts -+ , psta->sta_stats.rx_probersp_uo_pkts - psta->sta_stats.last_rx_probersp_uo_pkts -+ , psta->sta_stats.rx_probereq_pkts - psta->sta_stats.last_rx_probereq_pkts -+ , pmlmeinfo->bcn_interval*/ -+ , psta->expire_to -+ ); -+#endif -+ -+ if (sta_rx_data_pkts(psta) == sta_last_rx_data_pkts(psta) -+ && sta_rx_beacon_pkts(psta) == sta_last_rx_beacon_pkts(psta) -+ && sta_rx_probersp_pkts(psta) == sta_last_rx_probersp_pkts(psta)) -+ ret = _FALSE; -+ -+ sta_update_last_rx_pkts(psta); -+ -+ return ret; -+} -+ -+#ifdef CONFIG_TDLS -+u8 chk_tdls_peer_sta_is_alive(_adapter *padapter, struct sta_info *psta) -+{ -+ if ((psta->sta_stats.rx_data_pkts == psta->sta_stats.last_rx_data_pkts) -+ && (psta->sta_stats.rx_tdls_disc_rsp_pkts == psta->sta_stats.last_rx_tdls_disc_rsp_pkts)) -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+void linked_status_chk_tdls(_adapter *padapter) -+{ -+ struct candidate_pool { -+ struct sta_info *psta; -+ u8 addr[ETH_ALEN]; -+ }; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ _irqL irqL; -+ u8 ack_chk; -+ struct sta_info *psta; -+ int i, num_teardown = 0, num_checkalive = 0; -+ _list *plist, *phead; -+ struct tdls_txmgmt txmgmt; -+ struct candidate_pool checkalive[MAX_ALLOWED_TDLS_STA_NUM]; -+ struct candidate_pool teardown[MAX_ALLOWED_TDLS_STA_NUM]; -+ u8 tdls_sta_max = _FALSE; -+ -+#define ALIVE_MIN 2 -+#define ALIVE_MAX 5 -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ _rtw_memset(checkalive, 0x00, sizeof(checkalive)); -+ _rtw_memset(teardown, 0x00, sizeof(teardown)); -+ -+ if ((padapter->tdlsinfo.link_established == _TRUE)) { -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ -+ if (psta->tdls_sta_state & TDLS_LINKED_STATE) { -+ psta->alive_count++; -+ if (psta->alive_count >= ALIVE_MIN) { -+ if (chk_tdls_peer_sta_is_alive(padapter, psta) == _FALSE) { -+ if (psta->alive_count < ALIVE_MAX) { -+ _rtw_memcpy(checkalive[num_checkalive].addr, psta->cmn.mac_addr, ETH_ALEN); -+ checkalive[num_checkalive].psta = psta; -+ num_checkalive++; -+ } else { -+ _rtw_memcpy(teardown[num_teardown].addr, psta->cmn.mac_addr, ETH_ALEN); -+ teardown[num_teardown].psta = psta; -+ num_teardown++; -+ } -+ } else -+ psta->alive_count = 0; -+ } -+ psta->sta_stats.last_rx_data_pkts = psta->sta_stats.rx_data_pkts; -+ psta->sta_stats.last_rx_tdls_disc_rsp_pkts = psta->sta_stats.rx_tdls_disc_rsp_pkts; -+ -+ if ((num_checkalive >= MAX_ALLOWED_TDLS_STA_NUM) || (num_teardown >= MAX_ALLOWED_TDLS_STA_NUM)) { -+ tdls_sta_max = _TRUE; -+ break; -+ } -+ } -+ } -+ -+ if (tdls_sta_max == _TRUE) -+ break; -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ if (num_checkalive > 0) { -+ for (i = 0; i < num_checkalive; i++) { -+ _rtw_memcpy(txmgmt.peer, checkalive[i].addr, ETH_ALEN); -+ issue_tdls_dis_req(padapter, &txmgmt); -+ issue_tdls_dis_req(padapter, &txmgmt); -+ issue_tdls_dis_req(padapter, &txmgmt); -+ } -+ } -+ -+ if (num_teardown > 0) { -+ for (i = 0; i < num_teardown; i++) { -+ RTW_INFO("[%s %d] Send teardown to "MAC_FMT"\n", __FUNCTION__, __LINE__, MAC_ARG(teardown[i].addr)); -+ txmgmt.status_code = _RSON_TDLS_TEAR_TOOFAR_; -+ _rtw_memcpy(txmgmt.peer, teardown[i].addr, ETH_ALEN); -+ issue_tdls_teardown(padapter, &txmgmt, _FALSE); -+ } -+ } -+ } -+ -+} -+#endif /* CONFIG_TDLS */ -+ -+inline int rtw_get_rx_chk_limit(_adapter *adapter) -+{ -+ return adapter->stapriv.rx_chk_limit; -+} -+ -+inline void rtw_set_rx_chk_limit(_adapter *adapter, int limit) -+{ -+ adapter->stapriv.rx_chk_limit = limit; -+} -+ -+/* from_timer == 1 means driver is in LPS */ -+void linked_status_chk(_adapter *padapter, u8 from_timer) -+{ -+ u32 i; -+ struct sta_info *psta; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+#ifdef CONFIG_LAYER2_ROAMING -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+#endif -+ -+#ifdef CONFIG_RTW_WDS -+ rtw_wds_gptr_expire(padapter); -+#endif -+ -+ if (padapter->registrypriv.mp_mode == _TRUE) -+ return; -+ -+ if (check_fwstate(pmlmepriv, WIFI_CSA_UPDATE_BEACON)) -+ return; -+ -+ if (is_client_associated_to_ap(padapter)) { -+ /* linked infrastructure client mode */ -+ -+ int tx_chk = _SUCCESS, rx_chk = _SUCCESS; -+ int rx_chk_limit; -+ int link_count_limit; -+ -+#if defined(CONFIG_RTW_REPEATER_SON) -+ rtw_rson_scan_wk_cmd(padapter, RSON_SCAN_PROCESS); -+#elif defined(CONFIG_LAYER2_ROAMING) -+ if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE)) { -+ RTW_INFO("signal_strength_data.avg_val = %d\n", precvpriv->signal_strength_data.avg_val); -+ if ((precvpriv->signal_strength_data.avg_val < pmlmepriv->roam_rssi_threshold) -+ && (rtw_get_passing_time_ms(pmlmepriv->last_roaming) >= pmlmepriv->roam_scan_int*2000)) { -+#ifdef CONFIG_RTW_80211K -+ rtw_roam_nb_discover(padapter, _FALSE); -+#endif -+ pmlmepriv->need_to_roam = _TRUE; -+ rtw_drv_scan_by_self(padapter, RTW_AUTO_SCAN_REASON_ROAM); -+ pmlmepriv->last_roaming = rtw_get_current_time(); -+ } else -+ pmlmepriv->need_to_roam = _FALSE; -+ } -+#endif -+#ifdef CONFIG_MCC_MODE -+ /* -+ * due to tx ps null date to ao, so ap doest not tx pkt to driver -+ * we may check chk_ap_is_alive fail, and may issue_probereq to wrong channel under sitesurvey -+ * don't keep alive check under MCC -+ */ -+ if (rtw_hal_mcc_link_status_chk(padapter, __func__) == _FALSE) -+ return; -+#endif -+ -+ rx_chk_limit = rtw_get_rx_chk_limit(padapter); -+ -+#ifdef CONFIG_ARP_KEEP_ALIVE -+ if (!from_timer && pmlmepriv->bGetGateway == 1 && pmlmepriv->GetGatewayTryCnt < 3) { -+ RTW_INFO("do rtw_gw_addr_query() : %d\n", pmlmepriv->GetGatewayTryCnt); -+ pmlmepriv->GetGatewayTryCnt++; -+ if (rtw_gw_addr_query(padapter) == 0) -+ pmlmepriv->bGetGateway = 0; -+ else { -+ _rtw_memset(pmlmepriv->gw_ip, 0, 4); -+ _rtw_memset(pmlmepriv->gw_mac_addr, 0, ETH_ALEN); -+ } -+ } -+#endif -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) { -+ if (!from_timer) -+ link_count_limit = 3; /* 8 sec */ -+ else -+ link_count_limit = 15; /* 32 sec */ -+ } else -+#endif /* CONFIG_P2P */ -+ { -+ if (!from_timer) -+ link_count_limit = 7; /* 16 sec */ -+ else -+ link_count_limit = 29; /* 60 sec */ -+ } -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_CH_SW -+ if (ATOMIC_READ(&padapter->tdlsinfo.chsw_info.chsw_on) == _TRUE) -+ return; -+#endif /* CONFIG_TDLS_CH_SW */ -+ -+#ifdef CONFIG_TDLS_AUTOCHECKALIVE -+ linked_status_chk_tdls(padapter); -+#endif /* CONFIG_TDLS_AUTOCHECKALIVE */ -+#endif /* CONFIG_TDLS */ -+ -+ psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); -+ if (psta != NULL) { -+ bool is_p2p_enable = _FALSE; -+#ifdef CONFIG_P2P -+ is_p2p_enable = !rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE); -+#endif -+ -+#ifdef CONFIG_ISSUE_DELBA_WHEN_NO_TRAFFIC -+ /*issue delba when ap does not tx data packet that is Broadcom ap */ -+ rtw_delba_check(padapter, psta, from_timer); -+#endif -+ if (chk_ap_is_alive(padapter, psta) == _FALSE) -+ rx_chk = _FAIL; -+ -+ if (sta_last_tx_pkts(psta) == sta_tx_pkts(psta)) -+ tx_chk = _FAIL; -+ -+#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ if (!from_timer && pmlmeext->active_keep_alive_check && (rx_chk == _FAIL || tx_chk == _FAIL) -+ ) { -+ u8 backup_ch = 0, backup_bw = 0, backup_offset = 0; -+ u8 union_ch = 0, union_bw = 0, union_offset = 0; -+ u8 switch_channel_by_drv = _TRUE; -+ -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) { -+ /* driver doesn't switch channel under MCC */ -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) -+ switch_channel_by_drv = _FALSE; -+ } -+#endif -+ if (switch_channel_by_drv) { -+ if (!rtw_mi_get_ch_setting_union(padapter, &union_ch, &union_bw, &union_offset) -+ || pmlmeext->cur_channel != union_ch) -+ goto bypass_active_keep_alive; -+ -+ /* switch to correct channel of current network before issue keep-alive frames */ -+ if (rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { -+ backup_ch = rtw_get_oper_ch(padapter); -+ backup_bw = rtw_get_oper_bw(padapter); -+ backup_offset = rtw_get_oper_choffset(padapter); -+ set_channel_bwmode(padapter, union_ch, union_offset, union_bw); -+ } -+ } -+ -+ if (rx_chk != _SUCCESS) -+ issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, psta->cmn.mac_addr, 0, 0, 3, 1); -+ -+ if ((tx_chk != _SUCCESS && pmlmeinfo->link_count++ == link_count_limit) || rx_chk != _SUCCESS) { -+ if (rtw_mi_check_fwstate(padapter, WIFI_UNDER_SURVEY)) -+ tx_chk = issue_nulldata(padapter, psta->cmn.mac_addr, 1, 3, 1); -+ else -+ tx_chk = issue_nulldata(padapter, psta->cmn.mac_addr, 0, 3, 1); -+ /* if tx acked and p2p disabled, set rx_chk _SUCCESS to reset retry count */ -+ if (tx_chk == _SUCCESS && !is_p2p_enable) -+ rx_chk = _SUCCESS; -+ } -+ -+ /* back to the original operation channel */ -+ if (backup_ch > 0 && switch_channel_by_drv) -+ set_channel_bwmode(padapter, backup_ch, backup_offset, backup_bw); -+ -+bypass_active_keep_alive: -+ ; -+ } else -+#endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ -+ { -+ if (rx_chk != _SUCCESS) { -+ if (pmlmeext->retry == 0) { -+#ifdef DBG_EXPIRATION_CHK -+ RTW_INFO("issue_probereq to trigger probersp, retry=%d\n", pmlmeext->retry); -+#endif -+ issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, pmlmeinfo->network.MacAddress, 0, 0, 0, (from_timer ? 0 : 1)); -+ issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, pmlmeinfo->network.MacAddress, 0, 0, 0, (from_timer ? 0 : 1)); -+ issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, pmlmeinfo->network.MacAddress, 0, 0, 0, (from_timer ? 0 : 1)); -+ } -+ } -+ -+ if (tx_chk != _SUCCESS && pmlmeinfo->link_count++ == link_count_limit -+#ifdef CONFIG_MCC_MODE -+ /* FW tx nulldata under MCC mode, we just check ap is alive */ -+ && (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) -+#endif /* CONFIG_MCC_MODE */ -+ ) { -+ #ifdef DBG_EXPIRATION_CHK -+ RTW_INFO("%s issue_nulldata(%d)\n", __FUNCTION__, from_timer ? 1 : 0); -+ #endif -+ if (from_timer || rtw_mi_check_fwstate(padapter, WIFI_UNDER_SURVEY)) -+ tx_chk = issue_nulldata(padapter, NULL, 1, 0, 0); -+ else -+ tx_chk = issue_nulldata(padapter, NULL, 0, 1, 1); -+ } -+ } -+ -+ if (rx_chk == _FAIL) { -+ pmlmeext->retry++; -+ if (pmlmeext->retry > rx_chk_limit) { -+ RTW_PRINT(FUNC_ADPT_FMT" disconnect or roaming\n", -+ FUNC_ADPT_ARG(padapter)); -+ receive_disconnect(padapter, pmlmeinfo->network.MacAddress -+ , WLAN_REASON_EXPIRATION_CHK, _FALSE); -+ return; -+ } -+ } else -+ pmlmeext->retry = 0; -+ -+ if (tx_chk == _FAIL) -+ pmlmeinfo->link_count %= (link_count_limit + 1); -+ else { -+ psta->sta_stats.last_tx_pkts = psta->sta_stats.tx_pkts; -+ pmlmeinfo->link_count = 0; -+ } -+ -+ } /* end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL) */ -+ -+ } else if (is_client_associated_to_ibss(padapter)) { -+ _irqL irqL; -+ _list *phead, *plist, dlist; -+ -+ _rtw_init_listhead(&dlist); -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (i = 0; i < NUM_STA; i++) { -+ -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ -+ if (is_broadcast_mac_addr(psta->cmn.mac_addr)) -+ continue; -+ -+ if (chk_adhoc_peer_is_alive(psta) || !psta->expire_to) -+ psta->expire_to = pstapriv->adhoc_expire_to; -+ else -+ psta->expire_to--; -+ -+ if (psta->expire_to <= 0) { -+ rtw_list_delete(&psta->list); -+ rtw_list_insert_tail(&psta->list, &dlist); -+ } -+ } -+ } -+ -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ plist = get_next(&dlist); -+ while (rtw_end_of_queue_search(&dlist, plist) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, list); -+ plist = get_next(plist); -+ rtw_list_delete(&psta->list); -+ RTW_INFO(FUNC_ADPT_FMT" ibss expire "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)); -+ report_del_sta_event(padapter, psta->cmn.mac_addr, WLAN_REASON_EXPIRATION_CHK, from_timer ? _TRUE : _FALSE, _FALSE); -+ } -+ } -+ -+} -+ -+void survey_timer_hdl(void *ctx) -+{ -+ _adapter *padapter = (_adapter *)ctx; -+ struct cmd_obj *cmd; -+ struct sitesurvey_parm *psurveyPara; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ if (mlmeext_scan_state(pmlmeext) > SCAN_DISABLE) { -+ cmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmd == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ psurveyPara = (struct sitesurvey_parm *)rtw_zmalloc(sizeof(struct sitesurvey_parm)); -+ if (psurveyPara == NULL) { -+ rtw_warn_on(1); -+ rtw_mfree((unsigned char *)cmd, sizeof(struct cmd_obj)); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(cmd, psurveyPara, CMD_SITE_SURVEY); -+ rtw_enqueue_cmd(pcmdpriv, cmd); -+ } -+ -+exit: -+ return; -+} -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+/* 100ms pass, stop rson_scan */ -+void rson_timer_hdl(void *ctx) -+{ -+ _adapter *padapter = (_adapter *)ctx; -+ -+ rtw_rson_scan_wk_cmd(padapter, RSON_SCAN_DISABLE); -+} -+ -+#endif -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+void rtw_tbtx_xmit_timer_hdl(void *ctx) -+{ -+ _adapter *padapter = (_adapter *)ctx; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ if (ATOMIC_READ(&padapter->tbtx_remove_tx_pause) == _TRUE){ -+ ATOMIC_SET(&padapter->tbtx_tx_pause, _FALSE); -+ rtw_tx_control_cmd(padapter); -+ }else { -+ rtw_issue_action_token_rel(padapter); -+ ATOMIC_SET(&padapter->tbtx_tx_pause, _TRUE); -+ rtw_tx_control_cmd(padapter); -+ _set_timer(&pmlmeext->tbtx_xmit_timer, MAX_TXPAUSE_DURATION); -+ ATOMIC_SET(&padapter->tbtx_remove_tx_pause, _TRUE); -+ } -+} -+ -+#ifdef CONFIG_AP_MODE -+void rtw_tbtx_token_dispatch_timer_hdl(void *ctx) -+{ -+ _adapter *padapter = (_adapter *)ctx; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ _irqL irqL; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ _list *phead, *plist; -+ int i, found = _FALSE; -+ u8 nr_send, th_idx = 0; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ RTW_DBG("%s:asoc_cnt: %d\n",__func__, pstapriv->tbtx_asoc_list_cnt); -+ -+ // check number of TBTX sta -+ if (padapter->stapriv.tbtx_asoc_list_cnt < 2) -+ goto exit; -+ -+ // dispatch token -+ -+ nr_send = RTW_DIV_ROUND_UP(pstapriv->tbtx_asoc_list_cnt, NR_TBTX_SLOT); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ /* psta is supporting TBTX */ -+ if ((!psta) || (!psta->tbtx_enable)) -+ RTW_DBG("sta tbtx_enable is false\n"); -+ else { -+ for (i = 0; i < nr_send; i++) { -+ if (pstapriv->last_token_holder == psta) { -+ found = _TRUE; -+ goto outof_loop; -+ } -+ } -+ } -+ plist = get_next(plist); -+ } -+outof_loop: -+ -+ RTW_DBG("rtw_tbtx_token_dispatch_timer_hdl() th_idx=%d, nr_send=%d, phead=%p, plist=%p, found=%d\n ", th_idx , nr_send, phead, plist, found); -+ if (!found) { -+ plist = get_next(phead); -+ while(rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ if ((!psta) || (!psta->tbtx_enable)) -+ RTW_DBG("sta tbtx_enable is false\n"); -+ else { -+ pstapriv->token_holder[th_idx] = psta; -+ rtw_issue_action_token_req(padapter, pstapriv->token_holder[th_idx++]); -+ break; -+ } -+ plist = get_next(plist); -+ } -+ } -+ -+ for (i=th_idx; itbtx_enable)) -+ RTW_DBG("sta tbtx_enable is false\n"); -+ else { -+ pstapriv->token_holder[th_idx] = psta; -+ rtw_issue_action_token_req(padapter, pstapriv->token_holder[th_idx++]); -+ i++; -+ } -+ } -+ ATOMIC_SET(&pstapriv->nr_token_keeper, nr_send); -+ -+ -+exit: -+ // set_timer -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ _set_timer(&pmlmeext->tbtx_token_dispatch_timer, TBTX_TX_DURATION); -+} -+#endif /* CONFIG_AP_MODE */ -+#endif /* CONFIG_RTW_TOKEN_BASED_XMIT */ -+ -+void link_timer_hdl(void *ctx) -+{ -+ _adapter *padapter = (_adapter *)ctx; -+ /* static unsigned int rx_pkt = 0; */ -+ /* static u64 tx_cnt = 0; */ -+ /* struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); */ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ /* struct sta_priv *pstapriv = &padapter->stapriv; */ -+#ifdef CONFIG_RTW_80211R -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta = NULL; -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); -+#endif -+ -+ if (rtw_sta_linking_test_force_fail()) -+ RTW_INFO("rtw_sta_linking_test_force_fail\n"); -+ -+ if (pmlmeext->join_abort && pmlmeinfo->state != WIFI_FW_NULL_STATE) { -+ RTW_INFO(FUNC_ADPT_FMT" join abort\n", FUNC_ADPT_ARG(padapter)); -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ report_join_res(padapter, -4, WLAN_STATUS_UNSPECIFIED_FAILURE); -+ goto exit; -+ } -+ -+ if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) { -+ RTW_INFO("link_timer_hdl:no beacon while connecting\n"); -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ report_join_res(padapter, -3, WLAN_STATUS_UNSPECIFIED_FAILURE); -+ } else if (pmlmeinfo->state & WIFI_FW_AUTH_STATE) { -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (rtw_sec_chk_auth_type(padapter, MLME_AUTHTYPE_SAE)) -+ return; -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ /* re-auth timer */ -+ if (++pmlmeinfo->reauth_count > REAUTH_LIMIT) { -+ /* if (pmlmeinfo->auth_algo != dot11AuthAlgrthm_Auto) */ -+ /* { */ -+ pmlmeinfo->state = 0; -+ if (pmlmeinfo->auth_status) { -+ report_join_res(padapter, -1, pmlmeinfo->auth_status); -+ pmlmeinfo->auth_status = 0; /* reset */ -+ } else -+ report_join_res(padapter, -1, WLAN_STATUS_UNSPECIFIED_FAILURE); -+ return; -+ /* } */ -+ /* else */ -+ /* { */ -+ /* pmlmeinfo->auth_algo = dot11AuthAlgrthm_Shared; */ -+ /* pmlmeinfo->reauth_count = 0; */ -+ /* } */ -+ } -+ -+ RTW_INFO("link_timer_hdl: auth timeout and try again\n"); -+ pmlmeinfo->auth_seq = 1; -+ issue_auth(padapter, NULL, 0); -+ set_link_timer(pmlmeext, REAUTH_TO); -+ } else if (pmlmeinfo->state & WIFI_FW_ASSOC_STATE) { -+ /* re-assoc timer */ -+ if (++pmlmeinfo->reassoc_count > REASSOC_LIMIT) { -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_roam(padapter)) { -+ psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); -+ if (psta) -+ rtw_free_stainfo(padapter, psta); -+ } -+#endif -+ report_join_res(padapter, -2, WLAN_STATUS_UNSPECIFIED_FAILURE); -+ return; -+ } -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_roam(padapter)) { -+ RTW_INFO("link_timer_hdl: reassoc timeout and try again\n"); -+ issue_reassocreq(padapter); -+ } else -+#endif -+ { -+ RTW_INFO("link_timer_hdl: assoc timeout and try again\n"); -+ issue_assocreq(padapter); -+ } -+ -+ set_link_timer(pmlmeext, REASSOC_TO); -+ } -+ -+exit: -+ return; -+} -+ -+void addba_timer_hdl(void *ctx) -+{ -+ struct sta_info *psta = (struct sta_info *)ctx; -+ -+#ifdef CONFIG_80211N_HT -+ struct ht_priv *phtpriv; -+ -+ if (!psta) -+ return; -+ -+ phtpriv = &psta->htpriv; -+ -+ if ((phtpriv->ht_option == _TRUE) && (phtpriv->ampdu_enable == _TRUE)) { -+ if (phtpriv->candidate_tid_bitmap) -+ phtpriv->candidate_tid_bitmap = 0x0; -+ -+ } -+#endif /* CONFIG_80211N_HT */ -+} -+ -+#ifdef CONFIG_IEEE80211W -+void report_sta_timeout_event(_adapter *padapter, u8 *MacAddr, unsigned short reason) -+{ -+ struct cmd_obj *pcmd_obj; -+ u8 *pevtcmd; -+ u32 cmdsz; -+ struct sta_info *psta; -+ int mac_id; -+ struct stadel_event *pdel_sta_evt; -+ struct rtw_evt_header *evt_hdr; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ -+ pcmd_obj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd_obj == NULL) -+ return; -+ -+ cmdsz = (sizeof(struct stadel_event) + sizeof(struct rtw_evt_header)); -+ pevtcmd = (u8 *)rtw_zmalloc(cmdsz); -+ if (pevtcmd == NULL) { -+ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); -+ return; -+ } -+ -+ _rtw_init_listhead(&pcmd_obj->list); -+ -+ pcmd_obj->cmdcode = CMD_SET_MLME_EVT; -+ pcmd_obj->cmdsz = cmdsz; -+ pcmd_obj->parmbuf = pevtcmd; -+ -+ pcmd_obj->rsp = NULL; -+ pcmd_obj->rspsz = 0; -+ -+ evt_hdr = (struct rtw_evt_header *)(pevtcmd); -+ evt_hdr->len = sizeof(struct stadel_event); -+ evt_hdr->id = EVT_TIMEOUT_STA; -+ evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); -+ -+ pdel_sta_evt = (struct stadel_event *)(pevtcmd + sizeof(struct rtw_evt_header)); -+ _rtw_memcpy((unsigned char *)(&(pdel_sta_evt->macaddr)), MacAddr, ETH_ALEN); -+ _rtw_memcpy((unsigned char *)(pdel_sta_evt->rsvd), (unsigned char *)(&reason), 2); -+ -+ -+ psta = rtw_get_stainfo(&padapter->stapriv, MacAddr); -+ if (psta) -+ mac_id = (int)psta->cmn.mac_id; -+ else -+ mac_id = (-1); -+ -+ pdel_sta_evt->mac_id = mac_id; -+ -+ RTW_INFO("report_del_sta_event: delete STA, mac_id=%d\n", mac_id); -+ -+ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); -+ -+ return; -+} -+ -+void clnt_sa_query_timeout(_adapter *padapter) -+{ -+ struct mlme_ext_priv *mlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *mlmeinfo = &(mlmeext->mlmext_info); -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ receive_disconnect(padapter, get_my_bssid(&(mlmeinfo->network)), WLAN_REASON_SA_QUERY_TIMEOUT, _FALSE); -+} -+ -+void sa_query_timer_hdl(void *ctx) -+{ -+ struct sta_info *psta = (struct sta_info *)ctx; -+ _adapter *padapter = psta->padapter; -+ _irqL irqL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE && -+ check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ clnt_sa_query_timeout(padapter); -+ else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) -+ report_sta_timeout_event(padapter, psta->cmn.mac_addr, WLAN_REASON_PREV_AUTH_NOT_VALID); -+} -+ -+#endif /* CONFIG_IEEE80211W */ -+ -+#ifdef CONFIG_AUTO_AP_MODE -+void rtw_auto_ap_rx_msg_dump(_adapter *padapter, union recv_frame *precv_frame, u8 *ehdr_pos) -+{ -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct sta_info *psta = precv_frame->u.hdr.psta; -+ struct ethhdr *ehdr = (struct ethhdr *)ehdr_pos; -+ -+ RTW_INFO("eth rx: got eth_type=0x%x\n", ntohs(ehdr->h_proto)); -+ -+ if (psta && psta->isrc && psta->pid > 0) { -+ u16 rx_pid; -+ -+ rx_pid = *(u16 *)(ehdr_pos + ETH_HLEN); -+ -+ RTW_INFO("eth rx(pid=0x%x): sta("MAC_FMT") pid=0x%x\n", -+ rx_pid, MAC_ARG(psta->cmn.mac_addr), psta->pid); -+ -+ if (rx_pid == psta->pid) { -+ int i; -+ u16 len = *(u16 *)(ehdr_pos + ETH_HLEN + 2); -+ /* u16 ctrl_type = *(u16 *)(ehdr_pos + ETH_HLEN + 4); */ -+ -+ /* RTW_INFO("eth, RC: len=0x%x, ctrl_type=0x%x\n", len, ctrl_type); */ -+ RTW_INFO("eth, RC: len=0x%x\n", len); -+ -+ for (i = 0; i < len; i++) -+ RTW_INFO("0x%x\n", *(ehdr_pos + ETH_HLEN + 4 + i)); -+ /* RTW_INFO("0x%x\n", *(ehdr_pos + ETH_HLEN + 6 + i)); */ -+ -+ RTW_INFO("eth, RC-end\n"); -+ } -+ } -+ -+} -+ -+void rtw_start_auto_ap(_adapter *adapter) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ rtw_set_802_11_infrastructure_mode(adapter, Ndis802_11APMode, 0); -+ -+ rtw_setopmode_cmd(adapter, Ndis802_11APMode, RTW_CMDF_WAIT_ACK); -+} -+ -+static int rtw_auto_ap_start_beacon(_adapter *adapter) -+{ -+ int ret = 0; -+ u8 *pbuf = NULL; -+ uint len; -+ u8 supportRate[16]; -+ int sz = 0, rateLen; -+ u8 *ie; -+ u8 wireless_mode, oper_channel; -+ u8 ssid[3] = {0}; /* hidden ssid */ -+ u32 ssid_len = sizeof(ssid); -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EINVAL; -+ -+ -+ len = 128; -+ pbuf = rtw_zmalloc(len); -+ if (!pbuf) -+ return -ENOMEM; -+ -+ -+ /* generate beacon */ -+ ie = pbuf; -+ -+ /* timestamp will be inserted by hardware */ -+ sz += 8; -+ ie += sz; -+ -+ /* beacon interval : 2bytes */ -+ *(u16 *)ie = cpu_to_le16((u16)100); /* BCN_INTERVAL=100; */ -+ sz += 2; -+ ie += 2; -+ -+ /* capability info */ -+ *(u16 *)ie = 0; -+ *(u16 *)ie |= cpu_to_le16(cap_ESS); -+ *(u16 *)ie |= cpu_to_le16(cap_ShortPremble); -+ /* *(u16*)ie |= cpu_to_le16(cap_Privacy); */ -+ sz += 2; -+ ie += 2; -+ -+ /* SSID */ -+ ie = rtw_set_ie(ie, _SSID_IE_, ssid_len, ssid, &sz); -+ -+ /* supported rates */ -+ wireless_mode = (WIRELESS_11BG_24N & padapter->registrypriv.wireless_mode); -+ rtw_set_supported_rate(supportRate, wireless_mode); -+ rateLen = rtw_get_rateset_len(supportRate); -+ if (rateLen > 8) -+ ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, supportRate, &sz); -+ else -+ ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, rateLen, supportRate, &sz); -+ -+ -+ /* DS parameter set */ -+ if (rtw_mi_check_status(adapter, MI_LINKED)) -+ oper_channel = rtw_mi_get_union_chan(adapter); -+ else -+ oper_channel = adapter_to_dvobj(adapter)->oper_channel; -+ -+ ie = rtw_set_ie(ie, _DSSET_IE_, 1, &oper_channel, &sz); -+ -+ /* ext supported rates */ -+ if (rateLen > 8) -+ ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (supportRate + 8), &sz); -+ -+ RTW_INFO("%s, start auto ap beacon sz=%d\n", __FUNCTION__, sz); -+ -+ /* lunch ap mode & start to issue beacon */ -+ if (rtw_check_beacon_data(adapter, pbuf, sz) == _SUCCESS) { -+ -+ } else -+ ret = -EINVAL; -+ -+ -+ rtw_mfree(pbuf, len); -+ -+ return ret; -+ -+} -+#endif/* CONFIG_AUTO_AP_MODE */ -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+u8 tx_control_hdl(_adapter *adapter) -+{ -+ u8 val; -+ -+ if(ATOMIC_READ(&adapter->tbtx_tx_pause)) -+ val = 0xff; -+ else -+ val = 0x00; -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_TXPAUSE, &val); -+ -+ return H2C_SUCCESS; -+} -+#endif -+ -+#ifdef CONFIG_AP_MODE -+u8 stop_ap_hdl(_adapter *adapter) -+{ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); -+ -+ rtw_set_802_11_infrastructure_mode(adapter, Ndis802_11Infrastructure, RTW_CMDF_DIRECTLY); -+ rtw_setopmode_cmd(adapter, Ndis802_11Infrastructure, RTW_CMDF_DIRECTLY); -+ -+ return H2C_SUCCESS; -+} -+#endif -+ -+u8 setopmode_hdl(_adapter *padapter, u8 *pbuf) -+{ -+ u8 type; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct setopmode_parm *psetop = (struct setopmode_parm *)pbuf; -+ -+ if (psetop->mode == Ndis802_11APMode -+ || psetop->mode == Ndis802_11_mesh -+ ) { -+ pmlmeinfo->state = WIFI_FW_AP_STATE; -+ type = _HW_STATE_AP_; -+ } else if (psetop->mode == Ndis802_11Infrastructure) { -+ pmlmeinfo->state &= ~(BIT(0) | BIT(1)); /* clear state */ -+ pmlmeinfo->state |= WIFI_FW_STATION_STATE;/* set to STATION_STATE */ -+ type = _HW_STATE_STATION_; -+ } else if (psetop->mode == Ndis802_11IBSS) -+ type = _HW_STATE_ADHOC_; -+ else if (psetop->mode == Ndis802_11Monitor) -+ type = _HW_STATE_MONITOR_; -+ else -+ type = _HW_STATE_NOLINK_; -+ -+#ifdef CONFIG_AP_PORT_SWAP -+ rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, (u8 *)(&type)); -+#endif -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_SET_OPMODE, (u8 *)(&type)); -+ -+#ifdef CONFIG_AUTO_AP_MODE -+ if (psetop->mode == Ndis802_11APMode) -+ rtw_auto_ap_start_beacon(padapter); -+#endif -+ -+ if (rtw_port_switch_chk(padapter) == _TRUE) { -+ rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); -+ -+ if (psetop->mode == Ndis802_11APMode) -+ adapter_to_pwrctl(padapter)->fw_psmode_iface_id = 0xff; /* ap mode won't dowload rsvd pages */ -+ else if (psetop->mode == Ndis802_11Infrastructure) { -+#ifdef CONFIG_LPS -+ _adapter *port0_iface = dvobj_get_port0_adapter(adapter_to_dvobj(padapter)); -+ if (port0_iface) -+ rtw_lps_ctrl_wk_cmd(port0_iface, LPS_CTRL_CONNECT, RTW_CMDF_DIRECTLY); -+#endif -+ } -+ } -+ -+#ifdef CONFIG_BT_COEXIST -+ if (psetop->mode == Ndis802_11APMode -+ || psetop->mode == Ndis802_11_mesh -+ || psetop->mode == Ndis802_11Monitor -+ ) { -+ /* Do this after port switch to */ -+ /* prevent from downloading rsvd page to wrong port */ -+ rtw_btcoex_MediaStatusNotify(padapter, 1); /* connect */ -+ } -+#endif /* CONFIG_BT_COEXIST */ -+ -+ return H2C_SUCCESS; -+ -+} -+ -+u8 createbss_hdl(_adapter *padapter, u8 *pbuf) -+{ -+#ifdef CONFIG_AP_MODE -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); -+ WLAN_BSSID_EX *pdev_network = &padapter->registrypriv.dev_network; -+ struct createbss_parm *parm = (struct createbss_parm *)pbuf; -+ u8 ret = H2C_SUCCESS; -+ /* u8 initialgain; */ -+ -+ if ((parm->req_ch == 0 && pmlmeinfo->state == WIFI_FW_AP_STATE) -+ || parm->req_ch != 0 -+ ) { -+ start_bss_network(padapter, parm); -+ goto exit; -+ } -+ -+ /* below is for ad-hoc master */ -+ if (parm->adhoc) { -+ rtw_warn_on(pdev_network->InfrastructureMode != Ndis802_11IBSS); -+ rtw_joinbss_reset(padapter); -+ -+ pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; -+ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ pmlmeinfo->ERP_enable = 0; -+ pmlmeinfo->WMM_enable = 0; -+ pmlmeinfo->HT_enable = 0; -+ pmlmeinfo->HT_caps_enable = 0; -+ pmlmeinfo->HT_info_enable = 0; -+ pmlmeinfo->agg_enable_bitmap = 0; -+ pmlmeinfo->candidate_tid_bitmap = 0; -+ -+ /* cancel link timer */ -+ _cancel_timer_ex(&pmlmeext->link_timer); -+ -+ /* clear CAM */ -+ flush_all_cam_entry(padapter); -+ -+ pdev_network->Length = get_WLAN_BSSID_EX_sz(pdev_network); -+ _rtw_memcpy(pnetwork, pdev_network, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); -+ pnetwork->IELength = pdev_network->IELength; -+ -+ if (pnetwork->IELength > MAX_IE_SZ) { -+ ret = H2C_PARAMETERS_ERROR; -+ goto ibss_post_hdl; -+ } -+ -+ _rtw_memcpy(pnetwork->IEs, pdev_network->IEs, pnetwork->IELength); -+ start_create_ibss(padapter); -+ } else { -+ rtw_warn_on(1); -+ ret = H2C_PARAMETERS_ERROR; -+ } -+ -+ibss_post_hdl: -+ rtw_create_ibss_post_hdl(padapter, ret); -+ -+exit: -+ return ret; -+#else -+ return H2C_SUCCESS; -+#endif /* CONFIG_AP_MODE */ -+} -+ -+u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) -+{ -+ u8 join_type; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ struct joinbss_parm *pparm = (struct joinbss_parm *)pbuf; -+#endif /* CONFIG_ANTENNA_DIVERSITY */ -+ u32 i; -+ /* u8 initialgain; */ -+ /* u32 acparm; */ -+ u8 u_ch, u_bw, u_offset; -+ u8 doiqk = _FALSE; -+ -+ /* check already connecting to AP or not */ -+ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) { -+ if (pmlmeinfo->state & WIFI_FW_STATION_STATE) -+ issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 1, 100); -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ -+ /* clear CAM */ -+ flush_all_cam_entry(padapter); -+ -+ _cancel_timer_ex(&pmlmeext->link_timer); -+ -+ /* set MSR to nolink->infra. mode */ -+ /* Set_MSR(padapter, _HW_STATE_NOLINK_); */ -+ Set_MSR(padapter, _HW_STATE_STATION_); -+ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); -+ if (pmlmeinfo->state & WIFI_FW_STATION_STATE) -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_DISCONNECTED); -+ } -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ rtw_antenna_select_cmd(padapter, pparm->network.PhyInfo.Optimum_antenna, _FALSE); -+#endif -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ rtw_wapi_clear_all_cam_entry(padapter); -+#endif -+ -+ rtw_joinbss_reset(padapter); -+ -+ pmlmeinfo->ERP_enable = 0; -+ pmlmeinfo->WMM_enable = 0; -+ pmlmeinfo->HT_enable = 0; -+ pmlmeinfo->HT_caps_enable = 0; -+ pmlmeinfo->HT_info_enable = 0; -+ pmlmeinfo->agg_enable_bitmap = 0; -+ pmlmeinfo->candidate_tid_bitmap = 0; -+ pmlmeinfo->bwmode_updated = _FALSE; -+ /* pmlmeinfo->assoc_AP_vendor = HT_IOT_PEER_MAX; */ -+ pmlmeinfo->VHT_enable = 0; -+#ifdef ROKU_PRIVATE -+ pmlmeinfo->ht_vht_received = 0; -+ _rtw_memset(pmlmeinfo->SupportedRates_infra_ap, 0, NDIS_802_11_LENGTH_RATES_EX); -+#endif /* ROKU_PRIVATE */ -+ _rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); -+ pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength; -+ -+ if (pnetwork->IELength > MAX_IE_SZ) /* Check pbuf->IELength */ -+ return H2C_PARAMETERS_ERROR; -+ -+ if (pnetwork->IELength < 2) { -+ report_join_res(padapter, (-4), WLAN_STATUS_UNSPECIFIED_FAILURE); -+ return H2C_SUCCESS; -+ } -+ _rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength); -+ -+ pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); -+ -+ /* Check AP vendor to move rtw_joinbss_cmd() */ -+ /* pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->IEs, pnetwork->IELength); */ -+ -+ /* sizeof(NDIS_802_11_FIXED_IEs) */ -+ for (i = _FIXED_IE_LENGTH_ ; i < pnetwork->IELength - 2 ;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); -+ -+ switch (pIE->ElementID) { -+ case _VENDOR_SPECIFIC_IE_: /* Get WMM IE. */ -+ if (_rtw_memcmp(pIE->data, WMM_OUI, 4)) -+ WMM_param_handler(padapter, pIE); -+ break; -+ -+#ifdef CONFIG_80211N_HT -+ case _HT_CAPABILITY_IE_: /* Get HT Cap IE. */ -+ pmlmeinfo->HT_caps_enable = 1; -+ break; -+ -+ case _HT_EXTRA_INFO_IE_: /* Get HT Info IE. */ -+ pmlmeinfo->HT_info_enable = 1; -+ break; -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_80211AC_VHT -+ case EID_VHTCapability: /* Get VHT Cap IE. */ -+ pmlmeinfo->VHT_enable = 1; -+ break; -+ -+ case EID_VHTOperation: /* Get VHT Operation IE. */ -+ break; -+#endif /* CONFIG_80211AC_VHT */ -+ default: -+ break; -+ } -+ -+ i += (pIE->Length + 2); -+ } -+ -+ rtw_bss_get_chbw(pnetwork -+ , &pmlmeext->cur_channel, &pmlmeext->cur_bwmode, &pmlmeext->cur_ch_offset, 1, 1); -+ -+ rtw_adjust_chbw(padapter, pmlmeext->cur_channel, &pmlmeext->cur_bwmode, &pmlmeext->cur_ch_offset); -+ -+#if 0 -+ if (padapter->registrypriv.wifi_spec) { -+ /* for WiFi test, follow WMM test plan spec */ -+ acparm = 0x002F431C; /* VO */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); -+ acparm = 0x005E541C; /* VI */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); -+ acparm = 0x0000A525; /* BE */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); -+ acparm = 0x0000A549; /* BK */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); -+ -+ /* for WiFi test, mixed mode with intel STA under bg mode throughput issue */ -+ if (padapter->mlmepriv.htpriv.ht_option == _FALSE) { -+ acparm = 0x00004320; -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); -+ } -+ } else { -+ acparm = 0x002F3217; /* VO */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); -+ acparm = 0x005E4317; /* VI */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); -+ acparm = 0x00105320; /* BE */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); -+ acparm = 0x0000A444; /* BK */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); -+ } -+#endif -+ -+ /* check channel, bandwidth, offset and switch */ -+ if (rtw_chk_start_clnt_join(padapter, &u_ch, &u_bw, &u_offset) == _FAIL) { -+ report_join_res(padapter, (-4), WLAN_STATUS_UNSPECIFIED_FAILURE); -+ return H2C_SUCCESS; -+ } -+ -+ /* disable dynamic functions, such as high power, DIG */ -+ /*rtw_phydm_func_disable_all(padapter);*/ -+ -+ /* config the initial gain under linking, need to write the BB registers */ -+ /* initialgain = 0x1E; */ -+ /*rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);*/ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); -+ if (MLME_IS_STA(padapter)) -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTING); -+ else -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED); -+ -+ join_type = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); -+ -+ rtw_btcoex_connect_notify(padapter, join_type); -+ -+ doiqk = _TRUE; -+ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); -+ -+ set_channel_bwmode(padapter, u_ch, u_offset, u_bw); -+ -+ doiqk = _FALSE; -+ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); -+ -+ /* cancel link timer */ -+ _cancel_timer_ex(&pmlmeext->link_timer); -+ -+ start_clnt_join(padapter); -+ -+ return H2C_SUCCESS; -+ -+} -+ -+u8 disconnect_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+#if CONFIG_DFS -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+#endif -+ struct disconnect_parm *param = (struct disconnect_parm *)pbuf; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); -+ u8 val8; -+ -+ if (is_client_associated_to_ap(padapter) -+ #if CONFIG_DFS -+ && !IS_RADAR_DETECTED(rfctl) && !rfctl->csa_ch -+ #endif -+ ) { -+ #ifdef CONFIG_PLATFORM_ROCKCHIPS -+ /* To avoid connecting to AP fail during resume process, change retry count from 5 to 1 */ -+ issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 1, 100); -+ #else -+ issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, param->deauth_timeout_ms / 100, 100); -+ #endif /* CONFIG_PLATFORM_ROCKCHIPS */ -+ } -+ -+#ifndef CONFIG_SUPPORT_MULTI_BCN -+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) { -+ /* Stop BCN */ -+ val8 = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_FUNC, (u8 *)(&val8)); -+ } -+#endif -+ -+ rtw_sta_mstatus_report(padapter); -+ -+ rtw_mlmeext_disconnect(padapter); -+ -+ rtw_free_uc_swdec_pending_queue(padapter); -+ -+ return H2C_SUCCESS; -+} -+ -+static const char *const _scan_state_str[] = { -+ "SCAN_DISABLE", -+ "SCAN_START", -+ "SCAN_PS_ANNC_WAIT", -+ "SCAN_ENTER", -+ "SCAN_PROCESS", -+ "SCAN_BACKING_OP", -+ "SCAN_BACK_OP", -+ "SCAN_LEAVING_OP", -+ "SCAN_LEAVE_OP", -+ "SCAN_SW_ANTDIV_BL", -+ "SCAN_TO_P2P_LISTEN", -+ "SCAN_P2P_LISTEN", -+ "SCAN_COMPLETE", -+ "SCAN_STATE_MAX", -+}; -+ -+const char *scan_state_str(u8 state) -+{ -+ state = (state >= SCAN_STATE_MAX) ? SCAN_STATE_MAX : state; -+ return _scan_state_str[state]; -+} -+ -+static bool scan_abort_hdl(_adapter *adapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct ss_res *ss = &pmlmeext->sitesurvey_res; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &adapter->wdinfo; -+#endif -+ bool ret = _FALSE; -+ -+ if (pmlmeext->scan_abort == _TRUE) { -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) { -+ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_MAX); -+ ss->channel_idx = 3; -+ RTW_INFO("%s idx:%d, cnt:%u\n", __FUNCTION__ -+ , ss->channel_idx -+ , pwdinfo->find_phase_state_exchange_cnt -+ ); -+ } else -+#endif -+ { -+ ss->channel_idx = ss->ch_num; -+ RTW_INFO("%s idx:%d\n", __FUNCTION__ -+ , ss->channel_idx -+ ); -+ } -+ ret = _TRUE; -+ } -+ -+ return ret; -+} -+ -+u8 rtw_scan_sparse(_adapter *adapter, struct rtw_ieee80211_channel *ch, u8 ch_num) -+{ -+ /* interval larger than this is treated as backgroud scan */ -+#ifndef RTW_SCAN_SPARSE_BG_INTERVAL_MS -+#define RTW_SCAN_SPARSE_BG_INTERVAL_MS 12000 -+#endif -+ -+#ifndef RTW_SCAN_SPARSE_CH_NUM_MIRACAST -+#define RTW_SCAN_SPARSE_CH_NUM_MIRACAST 1 -+#endif -+#ifndef RTW_SCAN_SPARSE_CH_NUM_BG -+#define RTW_SCAN_SPARSE_CH_NUM_BG 4 -+#endif -+#ifdef CONFIG_LAYER2_ROAMING -+#ifndef RTW_SCAN_SPARSE_CH_NUM_ROAMING_ACTIVE -+#define RTW_SCAN_SPARSE_CH_NUM_ROAMING_ACTIVE 1 -+#endif -+#endif -+ -+#define SCAN_SPARSE_CH_NUM_INVALID 255 -+ -+ static u8 token = 255; -+ u32 interval; -+ bool busy_traffic = _FALSE; -+ bool miracast_enabled = _FALSE; -+ bool bg_scan = _FALSE; -+ u8 max_allow_ch = SCAN_SPARSE_CH_NUM_INVALID; -+ u8 scan_division_num; -+ u8 ret_num = ch_num; -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ -+ if (mlmeext->last_scan_time == 0) -+ mlmeext->last_scan_time = rtw_get_current_time(); -+ -+ interval = rtw_get_passing_time_ms(mlmeext->last_scan_time); -+ -+ -+ if (rtw_mi_busy_traffic_check(adapter)) -+ busy_traffic = _TRUE; -+ -+ if (rtw_mi_check_miracast_enabled(adapter)) -+ miracast_enabled = _TRUE; -+ -+ if (interval > RTW_SCAN_SPARSE_BG_INTERVAL_MS) -+ bg_scan = _TRUE; -+ -+ /* max_allow_ch by conditions*/ -+ -+#if RTW_SCAN_SPARSE_MIRACAST -+ if (miracast_enabled == _TRUE && busy_traffic == _TRUE) -+ max_allow_ch = rtw_min(max_allow_ch, RTW_SCAN_SPARSE_CH_NUM_MIRACAST); -+#endif -+ -+#if RTW_SCAN_SPARSE_BG -+ if (bg_scan == _TRUE) -+ max_allow_ch = rtw_min(max_allow_ch, RTW_SCAN_SPARSE_CH_NUM_BG); -+#endif -+ -+#if defined(CONFIG_LAYER2_ROAMING) && defined(RTW_SCAN_SPARSE_ROAMING_ACTIVE) -+ if (rtw_chk_roam_flags(adapter, RTW_ROAM_ACTIVE)) { -+ if (busy_traffic == _TRUE && adapter->mlmepriv.need_to_roam == _TRUE) -+ max_allow_ch = rtw_min(max_allow_ch, RTW_SCAN_SPARSE_CH_NUM_ROAMING_ACTIVE); -+ } -+#endif -+ -+ -+ if (max_allow_ch != SCAN_SPARSE_CH_NUM_INVALID) { -+ int i; -+ int k = 0; -+ -+ scan_division_num = (ch_num / max_allow_ch) + ((ch_num % max_allow_ch) ? 1 : 0); -+ token = (token + 1) % scan_division_num; -+ -+ if (0) -+ RTW_INFO("scan_division_num:%u, token:%u\n", scan_division_num, token); -+ -+ for (i = 0; i < ch_num; i++) { -+ if (ch[i].hw_value && (i % scan_division_num) == token -+ ) { -+ if (i != k) -+ _rtw_memcpy(&ch[k], &ch[i], sizeof(struct rtw_ieee80211_channel)); -+ k++; -+ } -+ } -+ -+ _rtw_memset(&ch[k], 0, sizeof(struct rtw_ieee80211_channel)); -+ -+ ret_num = k; -+ mlmeext->last_scan_time = rtw_get_current_time(); -+ } -+ -+ return ret_num; -+} -+ -+#ifdef CONFIG_SCAN_BACKOP -+u8 rtw_scan_backop_decision(_adapter *adapter) -+{ -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ struct mi_state mstate; -+ u8 backop_flags = 0; -+ -+ rtw_mi_status(adapter, &mstate); -+ -+ if ((MSTATE_STA_LD_NUM(&mstate) && mlmeext_chk_scan_backop_flags_sta(mlmeext, SS_BACKOP_EN)) -+ || (MSTATE_STA_NUM(&mstate) && mlmeext_chk_scan_backop_flags_sta(mlmeext, SS_BACKOP_EN_NL))) -+ backop_flags |= mlmeext_scan_backop_flags_sta(mlmeext); -+ -+#ifdef CONFIG_AP_MODE -+ if ((MSTATE_AP_LD_NUM(&mstate) && mlmeext_chk_scan_backop_flags_ap(mlmeext, SS_BACKOP_EN)) -+ || (MSTATE_AP_NUM(&mstate) && mlmeext_chk_scan_backop_flags_ap(mlmeext, SS_BACKOP_EN_NL))) -+ backop_flags |= mlmeext_scan_backop_flags_ap(mlmeext); -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+ if ((MSTATE_MESH_LD_NUM(&mstate) && mlmeext_chk_scan_backop_flags_mesh(mlmeext, SS_BACKOP_EN)) -+ || (MSTATE_MESH_NUM(&mstate) && mlmeext_chk_scan_backop_flags_mesh(mlmeext, SS_BACKOP_EN_NL))) -+ backop_flags |= mlmeext_scan_backop_flags_mesh(mlmeext); -+#endif -+ -+ return backop_flags; -+} -+#endif -+ -+#define SCANNING_TIMEOUT_EX 2000 -+u32 rtw_scan_timeout_decision(_adapter *padapter) -+{ -+ u32 back_op_times= 0; -+ u8 max_chan_num; -+ u16 scan_ms; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct ss_res *ss = &pmlmeext->sitesurvey_res; -+ -+ if (is_supported_5g(padapter->registrypriv.wireless_mode) -+ && IsSupported24G(padapter->registrypriv.wireless_mode)) -+ max_chan_num = MAX_CHANNEL_NUM;/* dual band */ -+ else -+ max_chan_num = MAX_CHANNEL_NUM_2G;/*single band*/ -+ -+ #ifdef CONFIG_SCAN_BACKOP -+ if (rtw_scan_backop_decision(padapter)) -+ back_op_times = (max_chan_num / ss->scan_cnt_max) * ss->backop_ms; -+ #endif -+ -+ if (ss->duration) -+ scan_ms = ss->duration; -+ else -+ #if defined(CONFIG_RTW_ACS) && defined(CONFIG_RTW_ACS_DBG) -+ if (IS_ACS_ENABLE(padapter) && rtw_is_acs_st_valid(padapter)) -+ scan_ms = rtw_acs_get_adv_st(padapter); -+ else -+ #endif /*CONFIG_RTW_ACS*/ -+ scan_ms = ss->scan_ch_ms; -+ -+ ss->scan_timeout_ms = (scan_ms * max_chan_num) + back_op_times + SCANNING_TIMEOUT_EX; -+ #ifdef DBG_SITESURVEY -+ RTW_INFO("%s , scan_timeout_ms = %d (ms)\n", __func__, ss->scan_timeout_ms); -+ #endif /*DBG_SITESURVEY*/ -+ return ss->scan_timeout_ms; -+} -+ -+static int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel *out, -+ u32 out_num, struct rtw_ieee80211_channel *in, u32 in_num, bool no_sparse) -+{ -+ int i, j; -+ int set_idx; -+ u8 chan; -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(padapter)); -+ -+ /* clear first */ -+ _rtw_memset(out, 0, sizeof(struct rtw_ieee80211_channel) * out_num); -+ -+ /* acquire channels from in */ -+ j = 0; -+ for (i = 0; i < in_num; i++) { -+ -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" "CHAN_FMT"\n", FUNC_ADPT_ARG(padapter), CHAN_ARG(&in[i])); -+ -+ if (!in[i].hw_value || (in[i].flags & RTW_IEEE80211_CHAN_DISABLED)) -+ continue; -+ if (rtw_mlme_band_check(padapter, in[i].hw_value) == _FALSE) -+ continue; -+ -+ set_idx = rtw_chset_search_ch(rfctl->channel_set, in[i].hw_value); -+ if (set_idx >= 0) { -+ if (j >= out_num) { -+ RTW_PRINT(FUNC_ADPT_FMT" out_num:%u not enough\n", -+ FUNC_ADPT_ARG(padapter), out_num); -+ break; -+ } -+ -+ _rtw_memcpy(&out[j], &in[i], sizeof(struct rtw_ieee80211_channel)); -+ -+ if (rfctl->channel_set[set_idx].flags & (RTW_CHF_NO_IR | RTW_CHF_DFS)) -+ out[j].flags |= RTW_IEEE80211_CHAN_PASSIVE_SCAN; -+ -+ j++; -+ } -+ if (j >= out_num) -+ break; -+ } -+ -+ /* if out is empty, use channel_set as default */ -+ if (j == 0) { -+ for (i = 0; i < rfctl->max_chan_nums; i++) { -+ chan = rfctl->channel_set[i].ChannelNum; -+ if (rtw_mlme_band_check(padapter, chan) == _TRUE) { -+ if (rtw_mlme_ignore_chan(padapter, chan) == _TRUE) -+ continue; -+ -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" ch:%u\n", FUNC_ADPT_ARG(padapter), chan); -+ -+ if (j >= out_num) { -+ RTW_PRINT(FUNC_ADPT_FMT" out_num:%u not enough\n", -+ FUNC_ADPT_ARG(padapter), out_num); -+ break; -+ } -+ -+ out[j].hw_value = chan; -+ -+ if (rfctl->channel_set[i].flags & (RTW_CHF_NO_IR | RTW_CHF_DFS)) -+ out[j].flags |= RTW_IEEE80211_CHAN_PASSIVE_SCAN; -+ -+ j++; -+ } -+ } -+ } -+ -+ if (!no_sparse -+ && !regsty->wifi_spec -+ && j > 6 /* assume ch_num > 6 is normal scan */ -+ ) { -+ /* scan_sparse */ -+ j = rtw_scan_sparse(padapter, out, j); -+ } -+ -+ return j; -+} -+ -+static void sitesurvey_res_reset(_adapter *adapter, struct sitesurvey_parm *parm) -+{ -+ struct ss_res *ss = &adapter->mlmeextpriv.sitesurvey_res; -+ RT_CHANNEL_INFO *chset = adapter_to_chset(adapter); -+ int i; -+ -+ ss->bss_cnt = 0; -+ ss->activate_ch_cnt = 0; -+ ss->channel_idx = 0; -+ ss->force_ssid_scan = 0; -+ ss->igi_scan = 0; -+ ss->igi_before_scan = 0; -+#ifdef CONFIG_SCAN_BACKOP -+ ss->scan_cnt = 0; -+#endif -+#if defined(CONFIG_ANTENNA_DIVERSITY) || defined(DBG_SCAN_SW_ANTDIV_BL) -+ ss->is_sw_antdiv_bl_scan = 0; -+#endif -+ ss->ssid_num = 0; -+ for (i = 0; i < RTW_SSID_SCAN_AMOUNT; i++) { -+ if (parm->ssid[i].SsidLength) { -+ _rtw_memcpy(ss->ssid[i].Ssid, parm->ssid[i].Ssid, IW_ESSID_MAX_SIZE); -+ ss->ssid[i].SsidLength = parm->ssid[i].SsidLength; -+ ss->ssid_num++; -+ } else -+ ss->ssid[i].SsidLength = 0; -+ } -+ -+ ss->ch_num = rtw_scan_ch_decision(adapter -+ , ss->ch, RTW_CHANNEL_SCAN_AMOUNT -+ , parm->ch, parm->ch_num -+ , parm->acs -+ ); -+ -+ for (i = 0; i < MAX_CHANNEL_NUM; i++) -+ chset[i].hidden_bss_cnt = 0; -+ -+ ss->bw = parm->bw; -+ ss->igi = parm->igi; -+ ss->token = parm->token; -+ ss->duration = parm->duration; -+ ss->scan_mode = parm->scan_mode; -+ ss->token = parm->token; -+ ss->acs = parm->acs; -+} -+ -+static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE *type) -+{ -+ u8 next_state; -+ u8 scan_ch = 0; -+ RT_SCAN_TYPE scan_type = SCAN_PASSIVE; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct ss_res *ss = &pmlmeext->sitesurvey_res; -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ int ch_set_idx; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif -+#ifdef CONFIG_SCAN_BACKOP -+ u8 backop_flags = 0; -+#endif -+ -+ /* handle scan abort request */ -+ scan_abort_hdl(padapter); -+ -+#ifdef CONFIG_P2P -+ if (pwdinfo->rx_invitereq_info.scan_op_ch_only || pwdinfo->p2p_info.scan_op_ch_only) { -+ if (pwdinfo->rx_invitereq_info.scan_op_ch_only) -+ scan_ch = pwdinfo->rx_invitereq_info.operation_ch[ss->channel_idx]; -+ else -+ scan_ch = pwdinfo->p2p_info.operation_ch[ss->channel_idx]; -+ scan_type = SCAN_ACTIVE; -+ } else if (rtw_p2p_findphase_ex_is_social(pwdinfo)) { -+ /* -+ * Commented by Albert 2011/06/03 -+ * The driver is in the find phase, it should go through the social channel. -+ */ -+ scan_ch = pwdinfo->social_chan[ss->channel_idx]; -+ ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, scan_ch); -+ if (ch_set_idx >= 0) -+ scan_type = rfctl->channel_set[ch_set_idx].flags & RTW_CHF_NO_IR ? SCAN_PASSIVE : SCAN_ACTIVE; -+ else -+ scan_type = SCAN_ACTIVE; -+ } else -+#endif /* CONFIG_P2P */ -+ { -+ struct rtw_ieee80211_channel *ch; -+ -+ #ifdef CONFIG_SCAN_BACKOP -+ backop_flags = rtw_scan_backop_decision(padapter); -+ #endif -+ -+ #ifdef CONFIG_SCAN_BACKOP -+ if (!(backop_flags && ss->scan_cnt >= ss->scan_cnt_max)) -+ #endif -+ { -+ #ifdef CONFIG_RTW_WIFI_HAL -+ if (adapter_to_dvobj(padapter)->nodfs) { -+ while (ss->channel_idx < ss->ch_num && rtw_chset_is_dfs_ch(rfctl->channel_set, ss->ch[ss->channel_idx].hw_value)) -+ ss->channel_idx++; -+ } else -+ #endif -+ if (ss->channel_idx != 0 && ss->force_ssid_scan == 0 -+ && pmlmeext->sitesurvey_res.ssid_num -+ && (ss->ch[ss->channel_idx - 1].flags & RTW_IEEE80211_CHAN_PASSIVE_SCAN) -+ ) { -+ ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, ss->ch[ss->channel_idx - 1].hw_value); -+ if (ch_set_idx != -1 && rfctl->channel_set[ch_set_idx].hidden_bss_cnt -+ && (!IS_DFS_SLAVE_WITH_RD(rfctl) -+ || rtw_rfctl_dfs_domain_unknown(rfctl) -+ || !CH_IS_NON_OCP(&rfctl->channel_set[ch_set_idx])) -+ ) { -+ ss->channel_idx--; -+ ss->force_ssid_scan = 1; -+ } -+ } else -+ ss->force_ssid_scan = 0; -+ } -+ -+ if (ss->channel_idx < ss->ch_num) { -+ ch = &ss->ch[ss->channel_idx]; -+ scan_ch = ch->hw_value; -+ -+ #if defined(CONFIG_RTW_ACS) && defined(CONFIG_RTW_ACS_DBG) -+ if (IS_ACS_ENABLE(padapter) && rtw_is_acs_passiv_scan(padapter)) -+ scan_type = SCAN_PASSIVE; -+ else -+ #endif /*CONFIG_RTW_ACS*/ -+ scan_type = (ch->flags & RTW_IEEE80211_CHAN_PASSIVE_SCAN) ? SCAN_PASSIVE : SCAN_ACTIVE; -+ } -+ } -+ -+ if (scan_ch != 0) { -+ next_state = SCAN_PROCESS; -+ -+ #ifdef CONFIG_SCAN_BACKOP -+ if (backop_flags) { -+ if (ss->scan_cnt < ss->scan_cnt_max) -+ ss->scan_cnt++; -+ else { -+ mlmeext_assign_scan_backop_flags(pmlmeext, backop_flags); -+ next_state = SCAN_BACKING_OP; -+ } -+ } -+ #endif -+ -+ } else if (rtw_p2p_findphase_ex_is_needed(pwdinfo)) { -+ /* go p2p listen */ -+ next_state = SCAN_TO_P2P_LISTEN; -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ } else if (rtw_hal_antdiv_before_linked(padapter)) { -+ /* go sw antdiv before link */ -+ next_state = SCAN_SW_ANTDIV_BL; -+#endif -+ } else { -+ next_state = SCAN_COMPLETE; -+ -+#if defined(DBG_SCAN_SW_ANTDIV_BL) -+ { -+ /* for SCAN_SW_ANTDIV_BL state testing */ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ int i; -+ bool is_linked = _FALSE; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (rtw_linked_check(dvobj->padapters[i])) -+ is_linked = _TRUE; -+ } -+ -+ if (!is_linked) { -+ static bool fake_sw_antdiv_bl_state = 0; -+ -+ if (fake_sw_antdiv_bl_state == 0) { -+ next_state = SCAN_SW_ANTDIV_BL; -+ fake_sw_antdiv_bl_state = 1; -+ } else -+ fake_sw_antdiv_bl_state = 0; -+ } -+ } -+#endif /* defined(DBG_SCAN_SW_ANTDIV_BL) */ -+ } -+ -+#ifdef CONFIG_SCAN_BACKOP -+ if (next_state != SCAN_PROCESS) -+ ss->scan_cnt = 0; -+#endif -+ -+ -+#ifdef DBG_FIXED_CHAN -+ if (pmlmeext->fixed_chan != 0xff && next_state == SCAN_PROCESS) -+ scan_ch = pmlmeext->fixed_chan; -+#endif -+ -+ if (ch) -+ *ch = scan_ch; -+ if (type) -+ *type = scan_type; -+ -+ return next_state; -+} -+ -+void site_survey(_adapter *padapter, u8 survey_channel, RT_SCAN_TYPE ScanType) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct ss_res *ss = &pmlmeext->sitesurvey_res; -+ u8 ssid_scan = 0; -+ -+#ifdef CONFIG_P2P -+#ifndef CONFIG_IOCTL_CFG80211 -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif -+#endif -+ -+ if (survey_channel != 0) { -+ set_channel_bwmode(padapter, survey_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ -+ if (ScanType == SCAN_PASSIVE && ss->force_ssid_scan) -+ ssid_scan = 1; -+ else if (ScanType == SCAN_ACTIVE) { -+#ifdef CONFIG_P2P -+ #ifdef CONFIG_IOCTL_CFG80211 -+ if (rtw_cfg80211_is_p2p_scan(padapter)) -+ #else -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) -+ || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)) -+ #endif -+ { -+ issue_probereq_p2p(padapter, NULL); -+ issue_probereq_p2p(padapter, NULL); -+ issue_probereq_p2p(padapter, NULL); -+ } else -+#endif /* CONFIG_P2P */ -+ { -+ if (pmlmeext->sitesurvey_res.scan_mode == SCAN_ACTIVE) { -+ /* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */ -+ if (padapter->registrypriv.wifi_spec) -+ issue_probereq(padapter, NULL, NULL); -+ else -+ issue_probereq_ex(padapter, NULL, NULL, 0, 0, 0, 0); -+ issue_probereq(padapter, NULL, NULL); -+ } -+ -+ ssid_scan = 1; -+ } -+ } -+ -+ if (ssid_scan) { -+ int i; -+ -+ for (i = 0; i < RTW_SSID_SCAN_AMOUNT; i++) { -+ if (pmlmeext->sitesurvey_res.ssid[i].SsidLength) { -+ /* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */ -+ if (padapter->registrypriv.wifi_spec) -+ issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL); -+ else -+ issue_probereq_ex(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL, 0, 0, 0, 0); -+ issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL); -+ } -+ } -+ } -+ } else { -+ /* channel number is 0 or this channel is not valid. */ -+ rtw_warn_on(1); -+ } -+ -+ return; -+} -+ -+void survey_done_set_ch_bw(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ u8 cur_channel = 0; -+ u8 cur_bwmode; -+ u8 cur_ch_offset; -+ -+#ifdef CONFIG_MCC_MODE -+ if (!rtw_hal_mcc_change_scan_flag(padapter, &cur_channel, &cur_bwmode, &cur_ch_offset)) { -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" back to AP channel - ch:%u, bw:%u, offset:%u\n", -+ FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); -+ goto exit; -+ } -+#endif -+ -+ if (rtw_mi_get_ch_setting_union(padapter, &cur_channel, &cur_bwmode, &cur_ch_offset) != 0) { -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", -+ FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); -+ } else { -+#ifdef CONFIG_P2P -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ _adapter *iface; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (iface->wdinfo.driver_interface == DRIVER_CFG80211 && !adapter_wdev_data(iface)->p2p_enabled) -+ continue; -+#endif -+ -+ if (rtw_p2p_chk_state(&iface->wdinfo, P2P_STATE_LISTEN)) { -+ cur_channel = iface->wdinfo.listen_channel; -+ cur_bwmode = CHANNEL_WIDTH_20; -+ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" back to "ADPT_FMT"'s listen ch - ch:%u, bw:%u, offset:%u\n", -+ FUNC_ADPT_ARG(padapter), ADPT_ARG(iface), cur_channel, cur_bwmode, cur_ch_offset); -+ break; -+ } -+ } -+#endif /* CONFIG_P2P */ -+ -+ if (cur_channel == 0) { -+ cur_channel = pmlmeext->cur_channel; -+ cur_bwmode = pmlmeext->cur_bwmode; -+ cur_ch_offset = pmlmeext->cur_ch_offset; -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" back to ch:%u, bw:%u, offset:%u\n", -+ FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); -+ } -+ } -+#ifdef CONFIG_MCC_MODE -+exit: -+#endif -+ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); -+} -+ -+/** -+ * rtw_ps_annc - check and doing ps announcement for all the adapters -+ * @adapter: the requesting adapter -+ * @ps: power saving or not -+ * -+ * Returns: 0: no ps announcement is doing. 1: ps announcement is doing -+ */ -+u8 rtw_ps_annc(_adapter *adapter, bool ps) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface; -+ int i; -+ u8 ps_anc = 0; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ if (MLME_IS_STA(iface)) { -+ if (is_client_associated_to_ap(iface) == _TRUE) { -+ /* TODO: TDLS peers */ -+ #ifdef CONFIG_MCC_MODE -+ /* for two station case */ -+ if (MCC_EN(adapter) && rtw_hal_check_mcc_status(adapter, MCC_STATUS_NEED_MCC)) { -+ u8 ch = iface->mlmeextpriv.cur_channel; -+ u8 offset = iface->mlmeextpriv.cur_ch_offset; -+ u8 bw = iface->mlmeextpriv.cur_bwmode; -+ -+ set_channel_bwmode(iface, ch, offset, bw); -+ } -+ #endif /* CONFIG_MCC_MODE */ -+ issue_nulldata(iface, NULL, ps, 3, 500); -+ ps_anc = 1; -+ } -+ #ifdef CONFIG_RTW_MESH -+ } else if (MLME_IS_MESH(iface)) { -+ if (rtw_mesh_ps_annc(iface, ps)) -+ ps_anc = 1; -+ #endif -+ } -+ } -+ return ps_anc; -+} -+ -+void rtw_leave_opch(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(adapter) && rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) -+ return; -+#endif -+ -+ _enter_critical_mutex(&rfctl->offch_mutex, NULL); -+ -+ if (rfctl->offch_state == OFFCHS_NONE) { -+ /* prepare to leave operating channel */ -+ rfctl->offch_state = OFFCHS_LEAVING_OP; -+ -+ /* clear HW TX queue */ -+ rtw_hal_set_hwreg(adapter, HW_VAR_CHECK_TXBUF, 0); -+ -+ rtw_hal_macid_sleep_all_used(adapter); -+ -+ rtw_ps_annc(adapter, 1); -+ -+ rfctl->offch_state = OFFCHS_LEAVE_OP; -+ } -+ -+ _exit_critical_mutex(&rfctl->offch_mutex, NULL); -+} -+ -+void rtw_back_opch(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(adapter) && rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) -+ return; -+#endif -+ -+ _enter_critical_mutex(&rfctl->offch_mutex, NULL); -+ -+ if (rfctl->offch_state != OFFCHS_NONE) { -+ rfctl->offch_state = OFFCHS_BACKING_OP; -+ rtw_hal_macid_wakeup_all_used(adapter); -+ rtw_ps_annc(adapter, 0); -+ -+ rfctl->offch_state = OFFCHS_NONE; -+ rtw_mi_os_xmit_schedule(adapter); -+ } -+ -+ _exit_critical_mutex(&rfctl->offch_mutex, NULL); -+} -+ -+void sitesurvey_set_igi(_adapter *adapter) -+{ -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ struct ss_res *ss = &mlmeext->sitesurvey_res; -+ u8 igi; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &adapter->wdinfo; -+#endif -+ -+ switch (mlmeext_scan_state(mlmeext)) { -+ case SCAN_ENTER: -+ #ifdef CONFIG_P2P -+ #ifdef CONFIG_IOCTL_CFG80211 -+ if (pwdinfo->driver_interface == DRIVER_CFG80211 && rtw_cfg80211_is_p2p_scan(adapter)) -+ igi = 0x30; -+ else -+ #endif /* CONFIG_IOCTL_CFG80211 */ -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ igi = 0x28; -+ else -+ #endif /* CONFIG_P2P */ -+ -+ if (ss->igi) -+ igi = ss->igi; -+ else -+ #if defined(CONFIG_RTW_ACS) && defined(CONFIG_RTW_ACS_DBG) -+ if (IS_ACS_ENABLE(adapter) && rtw_is_acs_igi_valid(adapter)) -+ igi = rtw_acs_get_adv_igi(adapter); -+ else -+ #endif /*CONFIG_RTW_ACS*/ -+ igi = 0x1e; -+ -+ /* record IGI status */ -+ ss->igi_scan = igi; -+ rtw_hal_get_odm_var(adapter, HAL_ODM_INITIAL_GAIN, &ss->igi_before_scan, NULL); -+ -+ /* disable DIG and set IGI for scan */ -+ rtw_hal_set_odm_var(adapter, HAL_ODM_INITIAL_GAIN, &igi, _FALSE); -+ break; -+ case SCAN_COMPLETE: -+ case SCAN_TO_P2P_LISTEN: -+ /* enable DIG and restore IGI */ -+ igi = 0xff; -+ rtw_hal_set_odm_var(adapter, HAL_ODM_INITIAL_GAIN, &igi, _FALSE); -+ break; -+#ifdef CONFIG_SCAN_BACKOP -+ case SCAN_BACKING_OP: -+ /* write IGI for op channel when DIG is not enabled */ -+ odm_write_dig(adapter_to_phydm(adapter), ss->igi_before_scan); -+ break; -+ case SCAN_LEAVE_OP: -+ /* write IGI for scan when DIG is not enabled */ -+ odm_write_dig(adapter_to_phydm(adapter), ss->igi_scan); -+ break; -+#endif /* CONFIG_SCAN_BACKOP */ -+ default: -+ rtw_warn_on(1); -+ break; -+ } -+} -+void sitesurvey_set_msr(_adapter *adapter, bool enter) -+{ -+ u8 network_type; -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (enter) { -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_hal_get_hwreg(adapter, HW_VAR_MEDIA_STATUS, (u8 *)(&pmlmeinfo->hw_media_state)); -+#endif -+ /* set MSR to no link state */ -+ network_type = _HW_STATE_NOLINK_; -+ } else { -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ network_type = pmlmeinfo->hw_media_state; -+#else -+ network_type = pmlmeinfo->state & 0x3; -+#endif -+ } -+ Set_MSR(adapter, network_type); -+} -+ -+void sitesurvey_set_offch_state(_adapter *adapter, u8 scan_state) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ _enter_critical_mutex(&rfctl->offch_mutex, NULL); -+ -+ switch (scan_state) { -+ case SCAN_DISABLE: -+ case SCAN_BACK_OP: -+ rfctl->offch_state = OFFCHS_NONE; -+ break; -+ case SCAN_START: -+ case SCAN_LEAVING_OP: -+ rfctl->offch_state = OFFCHS_LEAVING_OP; -+ break; -+ case SCAN_ENTER: -+ case SCAN_LEAVE_OP: -+ rfctl->offch_state = OFFCHS_LEAVE_OP; -+ break; -+ case SCAN_COMPLETE: -+ case SCAN_BACKING_OP: -+ rfctl->offch_state = OFFCHS_BACKING_OP; -+ break; -+ default: -+ break; -+ } -+ -+ _exit_critical_mutex(&rfctl->offch_mutex, NULL); -+} -+ -+u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf) -+{ -+ struct sitesurvey_parm *pparm = (struct sitesurvey_parm *)pbuf; -+#ifdef DBG_CHECK_FW_PS_STATE -+ struct dvobj_priv *dvobj = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &dvobj->drv_dbg; -+#endif -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct ss_res *ss = &pmlmeext->sitesurvey_res; -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+#endif -+ u8 val8; -+ -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#ifdef CONFIG_CONCURRENT_MODE -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#endif -+#endif -+ -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ RTW_INFO("scan without leave 32k\n"); -+ pdbgpriv->dbg_scan_pwr_state_cnt++; -+ } -+#endif /* DBG_CHECK_FW_PS_STATE */ -+ -+ /* increase channel idx */ -+ if (mlmeext_chk_scan_state(pmlmeext, SCAN_PROCESS)) -+ ss->channel_idx++; -+ -+ /* update scan state to next state (assigned by previous cmd hdl) */ -+ if (mlmeext_scan_state(pmlmeext) != mlmeext_scan_next_state(pmlmeext)) -+ mlmeext_set_scan_state(pmlmeext, mlmeext_scan_next_state(pmlmeext)); -+ -+operation_by_state: -+ switch (mlmeext_scan_state(pmlmeext)) { -+ -+ case SCAN_DISABLE: -+ /* -+ * SW parameter initialization -+ */ -+ -+ sitesurvey_res_reset(padapter, pparm); -+ mlmeext_set_scan_state(pmlmeext, SCAN_START); -+ goto operation_by_state; -+ -+ case SCAN_START: -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ if ((pwdev_priv->pno_mac_addr[0] != 0xFF) -+ && (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) -+ && (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _FALSE)) { -+ u16 seq_num; -+ -+ rtw_hal_pno_random_gen_mac_addr(padapter); -+ rtw_hal_set_hw_mac_addr(padapter, pwdev_priv->pno_mac_addr); -+ get_random_bytes(&seq_num, 2); -+ pwdev_priv->pno_scan_seq_num = seq_num & 0xFFF; -+ RTW_INFO("%s pno_scan_seq_num %d\n", __func__, -+ pwdev_priv->pno_scan_seq_num); -+ } -+#endif -+ -+ /* -+ * prepare to leave operating channel -+ */ -+ -+#ifdef CONFIG_MCC_MODE -+ rtw_hal_set_mcc_setting_scan_start(padapter); -+#endif /* CONFIG_MCC_MODE */ -+ -+ /* apply rx ampdu setting */ -+ if (ss->rx_ampdu_accept != RX_AMPDU_ACCEPT_INVALID -+ || ss->rx_ampdu_size != RX_AMPDU_SIZE_INVALID) -+ rtw_rx_ampdu_apply(padapter); -+ -+ /* clear HW TX queue before scan */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); -+ -+ rtw_hal_macid_sleep_all_used(padapter); -+ -+ /* power save state announcement */ -+ if (rtw_ps_annc(padapter, 1)) { -+ mlmeext_set_scan_state(pmlmeext, SCAN_PS_ANNC_WAIT); -+ mlmeext_set_scan_next_state(pmlmeext, SCAN_ENTER); -+ set_survey_timer(pmlmeext, 50); /* delay 50ms to protect nulldata(1) */ -+ } else { -+ mlmeext_set_scan_state(pmlmeext, SCAN_ENTER); -+ goto operation_by_state; -+ } -+ -+ break; -+ -+ case SCAN_ENTER: -+ /* -+ * HW register and DM setting for enter scan -+ */ -+ -+ rtw_phydm_ability_backup(padapter); -+ -+ sitesurvey_set_igi(padapter); -+ -+ /* config dynamic functions for off channel */ -+ rtw_phydm_func_for_offchannel(padapter); -+ /* set MSR to no link state */ -+ sitesurvey_set_msr(padapter, _TRUE); -+ -+ val8 = 1; /* under site survey */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ -+ mlmeext_set_scan_state(pmlmeext, SCAN_PROCESS); -+ goto operation_by_state; -+ -+ case SCAN_PROCESS: { -+ u8 scan_ch; -+ RT_SCAN_TYPE scan_type; -+ u8 next_state; -+ u32 scan_ms; -+ -+#ifdef CONFIG_RTW_ACS -+ if (IS_ACS_ENABLE(padapter)) -+ rtw_acs_get_rst(padapter); -+#endif -+ -+ next_state = sitesurvey_pick_ch_behavior(padapter, &scan_ch, &scan_type); -+ -+ if (next_state != SCAN_PROCESS) { -+ mlmeext_set_scan_state(pmlmeext, next_state); -+ goto operation_by_state; -+ } -+ -+ /* still SCAN_PROCESS state */ -+ #ifdef DBG_SITESURVEY -+ #ifdef CONFIG_P2P -+ RTW_INFO(FUNC_ADPT_FMT" %s ch:%u (cnt:%u,idx:%d) at %dms, %c%c%c%c\n" -+ , FUNC_ADPT_ARG(padapter) -+ , mlmeext_scan_state_str(pmlmeext) -+ , scan_ch -+ , pwdinfo->find_phase_state_exchange_cnt, ss->channel_idx -+ , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) -+ , scan_type ? 'A' : 'P', ss->scan_mode ? 'A' : 'P' -+ , ss->ssid[0].SsidLength ? 'S' : ' ' -+ , ss->force_ssid_scan ? 'F' : ' ' -+ ); -+ #else -+ RTW_INFO(FUNC_ADPT_FMT" %s ch:%u (idx:%d) at %dms, %c%c%c%c\n" -+ , FUNC_ADPT_ARG(padapter) -+ , mlmeext_scan_state_str(pmlmeext) -+ , scan_ch -+ , ss->channel_idx -+ , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) -+ , scan_type ? 'A' : 'P', ss->scan_mode ? 'A' : 'P' -+ , ss->ssid[0].SsidLength ? 'S' : ' ' -+ , ss->force_ssid_scan ? 'F' : ' ' -+ ); -+ #endif /* CONFIG_P2P */ -+ #endif /*DBG_SITESURVEY*/ -+#ifdef DBG_FIXED_CHAN -+ if (pmlmeext->fixed_chan != 0xff) -+ RTW_INFO(FUNC_ADPT_FMT" fixed_chan:%u\n", pmlmeext->fixed_chan); -+#endif -+ -+ site_survey(padapter, scan_ch, scan_type); -+ -+#if defined(CONFIG_ATMEL_RC_PATCH) -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ scan_ms = 20; -+ else -+ scan_ms = 40; -+#else -+ #if defined(CONFIG_RTW_ACS) && defined(CONFIG_RTW_ACS_DBG) -+ if (IS_ACS_ENABLE(padapter) && rtw_is_acs_st_valid(padapter)) -+ scan_ms = rtw_acs_get_adv_st(padapter); -+ else -+ #endif /*CONFIG_RTW_ACS*/ -+ scan_ms = ss->scan_ch_ms; -+#endif -+ -+#if defined(CONFIG_ANTENNA_DIVERSITY) || defined(DBG_SCAN_SW_ANTDIV_BL) -+ if (ss->is_sw_antdiv_bl_scan) -+ scan_ms = scan_ms / 2; -+#endif -+ -+#ifdef CONFIG_RTW_ACS -+ if (IS_ACS_ENABLE(padapter)) { -+ if (pparm->token) -+ rtw_acs_trigger(padapter, scan_ms, scan_ch, NHM_PID_IEEE_11K_HIGH); -+ else -+ rtw_acs_trigger(padapter, scan_ms, scan_ch, NHM_PID_ACS); -+ } -+#endif -+ -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ if (IS_NM_ENABLE(padapter)) -+ rtw_noise_measure(padapter, scan_ch, _FALSE, 0, scan_ms / 2); -+#endif -+ set_survey_timer(pmlmeext, scan_ms); -+ break; -+ } -+ -+#ifdef CONFIG_SCAN_BACKOP -+ case SCAN_BACKING_OP: { -+ u8 back_ch, back_bw, back_ch_offset; -+ u8 need_ch_setting_union = _TRUE; -+ -+#ifdef CONFIG_MCC_MODE -+ need_ch_setting_union = rtw_hal_mcc_change_scan_flag(padapter, -+ &back_ch, &back_bw, &back_ch_offset); -+#endif /* CONFIG_MCC_MODE */ -+ -+ if (need_ch_setting_union) { -+ if (rtw_mi_get_ch_setting_union(padapter, &back_ch, &back_bw, &back_ch_offset) == 0) { -+ rtw_warn_on(1); -+ back_ch = pmlmeext->cur_channel; -+ back_bw = pmlmeext->cur_bwmode; -+ back_ch_offset = pmlmeext->cur_ch_offset; -+ } -+ } -+ -+ #ifdef DBG_SITESURVEY -+ RTW_INFO(FUNC_ADPT_FMT" %s ch:%u, bw:%u, offset:%u at %dms\n" -+ , FUNC_ADPT_ARG(padapter) -+ , mlmeext_scan_state_str(pmlmeext) -+ , back_ch, back_bw, back_ch_offset -+ , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) -+ ); -+ #endif /*DBG_SITESURVEY*/ -+ set_channel_bwmode(padapter, back_ch, back_ch_offset, back_bw); -+ -+ sitesurvey_set_msr(padapter, _FALSE); -+ -+ val8 = 0; /* survey done */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ -+ if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC)) { -+ sitesurvey_set_igi(padapter); -+ rtw_hal_macid_wakeup_all_used(padapter); -+ rtw_ps_annc(padapter, 0); -+ } -+ -+ mlmeext_set_scan_state(pmlmeext, SCAN_BACK_OP); -+ ss->backop_time = rtw_get_current_time(); -+ -+ if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_TX_RESUME)) -+ rtw_mi_os_xmit_schedule(padapter); -+ -+ -+ goto operation_by_state; -+ } -+ -+ case SCAN_BACK_OP: -+ if (rtw_get_passing_time_ms(ss->backop_time) >= ss->backop_ms -+ || pmlmeext->scan_abort -+ ) { -+ mlmeext_set_scan_state(pmlmeext, SCAN_LEAVING_OP); -+ goto operation_by_state; -+ } -+ set_survey_timer(pmlmeext, 50); -+ break; -+ -+ case SCAN_LEAVING_OP: -+ /* -+ * prepare to leave operating channel -+ */ -+ -+ /* clear HW TX queue before scan */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); -+ -+ rtw_hal_macid_sleep_all_used(padapter); -+ if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC) -+ && rtw_ps_annc(padapter, 1) -+ ) { -+ mlmeext_set_scan_state(pmlmeext, SCAN_PS_ANNC_WAIT); -+ mlmeext_set_scan_next_state(pmlmeext, SCAN_LEAVE_OP); -+ set_survey_timer(pmlmeext, 50); /* delay 50ms to protect nulldata(1) */ -+ } else { -+ mlmeext_set_scan_state(pmlmeext, SCAN_LEAVE_OP); -+ goto operation_by_state; -+ } -+ -+ break; -+ -+ case SCAN_LEAVE_OP: -+ /* -+ * HW register and DM setting for enter scan -+ */ -+ -+ if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC)) -+ sitesurvey_set_igi(padapter); -+ -+ sitesurvey_set_msr(padapter, _TRUE); -+ -+ val8 = 1; /* under site survey */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ -+ mlmeext_set_scan_state(pmlmeext, SCAN_PROCESS); -+ goto operation_by_state; -+ -+#endif /* CONFIG_SCAN_BACKOP */ -+ -+#if defined(CONFIG_ANTENNA_DIVERSITY) || defined(DBG_SCAN_SW_ANTDIV_BL) -+ case SCAN_SW_ANTDIV_BL: -+ /* -+ * 20100721 -+ * For SW antenna diversity before link, it needs to switch to another antenna and scan again. -+ * It compares the scan result and select better one to do connection. -+ */ -+ ss->bss_cnt = 0; -+ ss->channel_idx = 0; -+ ss->is_sw_antdiv_bl_scan = 1; -+ -+ mlmeext_set_scan_next_state(pmlmeext, SCAN_PROCESS); -+ set_survey_timer(pmlmeext, ss->scan_ch_ms); -+ break; -+#endif -+ -+#ifdef CONFIG_P2P -+ case SCAN_TO_P2P_LISTEN: -+ /* -+ * Set the P2P State to the listen state of find phase -+ * and set the current channel to the listen channel -+ */ -+ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_LISTEN); -+ -+ /* turn on phy-dynamic functions */ -+ rtw_phydm_ability_restore(padapter); -+ -+ sitesurvey_set_igi(padapter); -+ -+ mlmeext_set_scan_state(pmlmeext, SCAN_P2P_LISTEN); -+ _set_timer(&pwdinfo->find_phase_timer, (u32)((u32)pwdinfo->listen_dwell * 100)); -+ break; -+ -+ case SCAN_P2P_LISTEN: -+ mlmeext_set_scan_state(pmlmeext, SCAN_PROCESS); -+ ss->channel_idx = 0; -+ goto operation_by_state; -+#endif /* CONFIG_P2P */ -+ -+ case SCAN_COMPLETE: -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ rtw_hal_set_hw_mac_addr(padapter, adapter_mac_addr(padapter)); -+#endif -+#ifdef CONFIG_P2P -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) -+ || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) -+ ) { -+#ifdef CONFIG_CONCURRENT_MODE -+ if (pwdinfo->driver_interface == DRIVER_WEXT) { -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ _set_timer(&prochinfo->ap_roch_ch_switch_timer, 500); -+ } -+#endif -+ -+ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -+ } -+ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); -+#endif /* CONFIG_P2P */ -+ -+ /* switch channel */ -+ survey_done_set_ch_bw(padapter); -+ -+ sitesurvey_set_msr(padapter, _FALSE); -+ -+ val8 = 0; /* survey done */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ -+ /* turn on phy-dynamic functions */ -+ rtw_phydm_ability_restore(padapter); -+ -+ sitesurvey_set_igi(padapter); -+ -+#ifdef CONFIG_MCC_MODE -+ /* start MCC fail, then tx null data */ -+ if (!rtw_hal_set_mcc_setting_scan_complete(padapter)) -+#endif -+ { -+ rtw_hal_macid_wakeup_all_used(padapter); -+ rtw_ps_annc(padapter, 0); -+ } -+ -+ /* apply rx ampdu setting */ -+ rtw_rx_ampdu_apply(padapter); -+ -+ mlmeext_set_scan_state(pmlmeext, SCAN_DISABLE); -+ -+ report_surveydone_event(padapter, ss->acs); -+#ifdef CONFIG_RTW_ACS -+ if (IS_ACS_ENABLE(padapter)) -+ rtw_acs_select_best_chan(padapter); -+#endif -+ -+#if defined(CONFIG_BACKGROUND_NOISE_MONITOR) && defined(DBG_NOISE_MONITOR) -+ if (IS_NM_ENABLE(padapter)) -+ rtw_noise_info_dump(RTW_DBGDUMP, padapter); -+#endif -+ issue_action_BSSCoexistPacket(padapter); -+ issue_action_BSSCoexistPacket(padapter); -+ issue_action_BSSCoexistPacket(padapter); -+ -+#ifdef CONFIG_RTW_80211K -+ if (ss->token) -+ rm_post_event(padapter, ss->token, RM_EV_survey_done); -+#endif /* CONFIG_RTW_80211K */ -+ -+ break; -+ } -+ -+ return H2C_SUCCESS; -+} -+ -+u8 setauth_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+ struct setauth_parm *pparm = (struct setauth_parm *)pbuf; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (pparm->mode < 4) -+ pmlmeinfo->auth_algo = pparm->mode; -+ -+ return H2C_SUCCESS; -+} -+ -+/* -+SEC CAM Entry format (32 bytes) -+DW0 - MAC_ADDR[15:0] | Valid[15] | MFB[14:8] | RSVD[7] | GK[6] | MIC_KEY[5] | SEC_TYPE[4:2] | KID[1:0] -+DW0 - MAC_ADDR[15:0] | Valid[15] |RSVD[14:9] | RPT_MODE[8] | SPP_MODE[7] | GK[6] | MIC_KEY[5] | SEC_TYPE[4:2] | KID[1:0] (92E/8812A/8814A) -+DW1 - MAC_ADDR[47:16] -+DW2 - KEY[31:0] -+DW3 - KEY[63:32] -+DW4 - KEY[95:64] -+DW5 - KEY[127:96] -+DW6 - RSVD -+DW7 - RSVD -+*/ -+ -+/*Set WEP key or Group Key*/ -+u8 setkey_hdl(_adapter *padapter, u8 *pbuf) -+{ -+ u16 ctrl = 0; -+ s16 cam_id = 0; -+ struct setkey_parm *pparm = (struct setkey_parm *)pbuf; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ unsigned char null_addr[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; -+ u8 *addr; -+ bool used = _FALSE; -+ -+ /* main tx key for wep. */ -+ if (pparm->set_tx) -+ pmlmeinfo->key_index = pparm->keyid; -+ -+#ifndef SEC_DEFAULT_KEY_SEARCH -+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) -+ cam_id = rtw_iface_bcmc_id_get(padapter); -+ else -+#endif -+ cam_id = rtw_camid_alloc(padapter, NULL, pparm->keyid, 1, -+ !!(pparm->algorithm & _SEC_TYPE_256_), &used); -+ -+ if (cam_id < 0) -+ goto enable_mc; -+ -+#ifdef SEC_DEFAULT_KEY_SEARCH -+ if (cam_id >= 0 && cam_id <= 3) { -+ /* default key camid */ -+ addr = null_addr; -+ } else -+#endif -+ { -+ /* not default key camid */ -+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) { -+ /* group TX, force sec cam entry_id */ -+ addr = adapter_mac_addr(padapter); -+ } else { -+ /* group RX, searched by A2 (TA) */ -+ addr = get_bssid(&padapter->mlmepriv); -+ } -+ } -+ -+#ifdef CONFIG_LPS_PG -+ if (adapter_to_pwrctl(padapter)->lps_level == LPS_PG) -+ LPS_Leave(padapter, "SET_KEY"); -+#endif -+ -+ /* cam entry searched is pairwise key */ -+ if (used == _TRUE && rtw_camid_is_gk(padapter, cam_id) == _FALSE) { -+ s16 camid_clr; -+ -+ RTW_PRINT(FUNC_ADPT_FMT" group key with "MAC_FMT" id:%u the same key id as pairwise key\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(addr), pparm->keyid); -+ -+ /* HW has problem to distinguish this group key with existing pairwise key, stop HW enc and dec for BMC */ -+ rtw_camctl_set_flags(padapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH); -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, NULL); -+ -+ /* clear group key */ -+ while ((camid_clr = rtw_camid_search(padapter, addr, -1, 1)) >= 0) { -+ RTW_PRINT("clear group key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(addr), camid_clr); -+ clear_cam_entry(padapter, camid_clr); -+ rtw_camid_free(padapter, camid_clr); -+ } -+ -+ goto enable_mc; -+ } -+ -+ ctrl = BIT(15) | BIT(6) | ((pparm->algorithm & 0x07) << 2) | pparm->keyid; -+ -+ RTW_PRINT("set group key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n" -+ , cam_id, MAC_ARG(addr), pparm->keyid, security_type_str(pparm->algorithm)); -+ -+ if (pparm->algorithm & _SEC_TYPE_256_) { -+ RTW_INFO_DUMP("GTK : ", pparm->key, sizeof(pparm->key)); -+ ctrl |= BIT(9); -+ } -+ -+ write_cam(padapter, cam_id, ctrl, addr, pparm->key); -+ -+ /* if ((cam_id > 3) && (((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)))*/ -+#ifndef SEC_DEFAULT_KEY_SEARCH -+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) { -+ if (is_wep_enc(pparm->algorithm)) { -+ padapter->securitypriv.dot11Def_camid[pparm->keyid] = cam_id; -+ padapter->securitypriv.dot118021x_bmc_cam_id = -+ padapter->securitypriv.dot11Def_camid[padapter->securitypriv.dot11PrivacyKeyIndex]; -+ RTW_PRINT("wep group key - force camid:%d\n", padapter->securitypriv.dot118021x_bmc_cam_id); -+ } else { -+ /*u8 org_cam_id = padapter->securitypriv.dot118021x_bmc_cam_id;*/ -+ -+ /*force GK's cam id*/ -+ padapter->securitypriv.dot118021x_bmc_cam_id = cam_id; -+ -+ /* for GTK rekey -+ if ((org_cam_id != INVALID_SEC_MAC_CAM_ID) && -+ (org_cam_id != cam_id)) { -+ RTW_PRINT("clear group key for addr:"MAC_FMT", org_camid:%d new_camid:%d\n", MAC_ARG(addr), org_cam_id, cam_id); -+ clear_cam_entry(padapter, org_cam_id); -+ rtw_camid_free(padapter, org_cam_id); -+ }*/ -+ } -+ } -+#else -+ if (cam_id >= 0 && cam_id <= 3) -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8 *)_TRUE); -+#endif -+ -+ /* 8814au should set both broadcast and unicast CAM entry for WEP key in STA mode */ -+ if (is_wep_enc(pparm->algorithm) && check_mlmeinfo_state(pmlmeext, WIFI_FW_STATION_STATE) && -+ _rtw_camctl_chk_cap(padapter, SEC_CAP_CHK_BMC)) { -+ struct set_stakey_parm sta_pparm; -+ -+ _rtw_memset(&sta_pparm, 0, sizeof(struct set_stakey_parm)); -+ sta_pparm.algorithm = pparm->algorithm; -+ sta_pparm.keyid = pparm->keyid; -+ _rtw_memcpy(sta_pparm.key, pparm->key, 16); -+ _rtw_memcpy(sta_pparm.addr, get_bssid(&padapter->mlmepriv), ETH_ALEN); -+ set_stakey_hdl(padapter, (u8 *)&sta_pparm); -+ } -+ -+enable_mc: -+ /* allow multicast packets to driver */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_ON_RCR_AM, null_addr); -+ -+ return H2C_SUCCESS; -+} -+ -+void rtw_ap_wep_pk_setting(_adapter *adapter, struct sta_info *psta) -+{ -+ struct security_priv *psecuritypriv = &(adapter->securitypriv); -+ struct set_stakey_parm sta_pparm; -+ sint keyid; -+ -+ if (!is_wep_enc(psecuritypriv->dot11PrivacyAlgrthm)) -+ return; -+ -+ for (keyid = 0; keyid < 4; keyid++) { -+ if ((psecuritypriv->key_mask & BIT(keyid)) && (keyid == psecuritypriv->dot11PrivacyKeyIndex)) { -+ sta_pparm.algorithm = psecuritypriv->dot11PrivacyAlgrthm; -+ sta_pparm.keyid = keyid; -+ sta_pparm.gk = 0; -+ _rtw_memcpy(sta_pparm.key, &(psecuritypriv->dot11DefKey[keyid].skey[0]), 16); -+ _rtw_memcpy(sta_pparm.addr, psta->cmn.mac_addr, ETH_ALEN); -+ -+ RTW_PRINT(FUNC_ADPT_FMT"set WEP - PK with "MAC_FMT" keyid:%u\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(psta->cmn.mac_addr), keyid); -+ -+ set_stakey_hdl(adapter, (u8 *)&sta_pparm); -+ } -+ } -+} -+ -+u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf) -+{ -+ u16 ctrl = 0; -+ s16 cam_id = 0; -+ bool used; -+ u8 ret = H2C_SUCCESS; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct set_stakey_parm *pparm = (struct set_stakey_parm *)pbuf; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ -+ if (pparm->algorithm == _NO_PRIVACY_) -+ goto write_to_cam; -+ -+ psta = rtw_get_stainfo(pstapriv, pparm->addr); -+ if (!psta) { -+ RTW_PRINT("%s sta:"MAC_FMT" not found\n", __func__, MAC_ARG(pparm->addr)); -+ ret = H2C_REJECTED; -+ goto exit; -+ } -+ -+ pmlmeinfo->enc_algo = pparm->algorithm; -+ -+ cam_id = rtw_camid_alloc(padapter, psta, pparm->keyid, pparm->gk, -+ !!(pparm->algorithm & _SEC_TYPE_256_), &used); -+ if (cam_id < 0) -+ goto exit; -+ -+#ifdef CONFIG_LPS_PG -+ if (adapter_to_pwrctl(padapter)->lps_level == LPS_PG) -+ LPS_Leave(padapter, "SET_KEY"); -+#endif -+ -+ /* cam entry searched is group key when setting pariwise key */ -+ if (!pparm->gk && used == _TRUE && rtw_camid_is_gk(padapter, cam_id) == _TRUE) { -+ s16 camid_clr; -+ -+ RTW_PRINT(FUNC_ADPT_FMT" pairwise key with "MAC_FMT" id:%u the same key id as group key\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(pparm->addr), pparm->keyid); -+ -+ /* HW has problem to distinguish this pairwise key with existing group key, stop HW enc and dec for BMC */ -+ rtw_camctl_set_flags(padapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH); -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, NULL); -+ -+ /* clear group key */ -+ while ((camid_clr = rtw_camid_search(padapter, pparm->addr, -1, 1)) >= 0) { -+ RTW_PRINT("clear group key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(pparm->addr), camid_clr); -+ clear_cam_entry(padapter, camid_clr); -+ rtw_camid_free(padapter, camid_clr); -+ } -+ } -+ -+write_to_cam: -+ if (pparm->algorithm == _NO_PRIVACY_) { -+ while ((cam_id = rtw_camid_search(padapter, pparm->addr, -1, -1)) >= 0) { -+ RTW_PRINT("clear key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(pparm->addr), cam_id); -+ clear_cam_entry(padapter, cam_id); -+ rtw_camid_free(padapter, cam_id); -+ } -+ } else { -+ RTW_PRINT("set %s key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n" -+ , pparm->gk ? "group" : "pairwise" -+ , cam_id, MAC_ARG(pparm->addr), pparm->keyid, security_type_str(pparm->algorithm)); -+ ctrl = BIT(15) | ((pparm->algorithm & 0x07) << 2) | pparm->keyid; -+ if (pparm->gk) -+ ctrl |= BIT(6); -+ if (pparm->algorithm & _SEC_TYPE_256_) { -+ RTW_INFO_DUMP("PTK : ", pparm->key, sizeof(pparm->key)); -+ ctrl |= BIT(9); -+ } -+ -+ write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); -+ } -+ ret = H2C_SUCCESS_RSP; -+ -+exit: -+ return ret; -+} -+ -+u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+ struct addBaReq_parm *pparm = (struct addBaReq_parm *)pbuf; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, pparm->addr); -+ -+ if (!psta) -+ return H2C_SUCCESS; -+ -+#ifdef CONFIG_80211N_HT -+ if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) || -+ ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) { -+ /* pmlmeinfo->ADDBA_retry_count = 0; */ -+ /* pmlmeinfo->candidate_tid_bitmap |= (0x1 << pparm->tid); */ -+ /* psta->htpriv.candidate_tid_bitmap |= BIT(pparm->tid); */ -+ issue_addba_req(padapter, pparm->addr, (u8)pparm->tid); -+ _set_timer(&psta->addba_retry_timer, ADDBA_TO); -+ } -+#ifdef CONFIG_TDLS -+ else if ((psta->tdls_sta_state & TDLS_LINKED_STATE) && -+ (psta->htpriv.ht_option == _TRUE) && -+ (psta->htpriv.ampdu_enable == _TRUE)) { -+ issue_addba_req(padapter, pparm->addr, (u8)pparm->tid); -+ _set_timer(&psta->addba_retry_timer, ADDBA_TO); -+ } -+#endif /* CONFIG */ -+ else -+ psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid); -+#endif /* CONFIG_80211N_HT */ -+ return H2C_SUCCESS; -+} -+ -+ -+u8 add_ba_rsp_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+ struct addBaRsp_parm *pparm = (struct addBaRsp_parm *)pbuf; -+ struct recv_reorder_ctrl *preorder_ctrl; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ u8 ret = _TRUE; -+ -+ psta = rtw_get_stainfo(pstapriv, pparm->addr); -+ if (!psta) -+ goto exit; -+ -+ preorder_ctrl = &psta->recvreorder_ctrl[pparm->tid]; -+ ret = issue_addba_rsp_wait_ack(padapter, pparm->addr, pparm->tid, pparm->status, pparm->size, 3, 50); -+ -+#ifdef CONFIG_UPDATE_INDICATE_SEQ_WHILE_PROCESS_ADDBA_REQ -+ /* status = 0 means accept this addba req, so update indicate seq = start_seq under this compile flag */ -+ if (pparm->status == 0) { -+ preorder_ctrl->indicate_seq = pparm->start_seq; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" tid:%u SN_UPDATE indicate_seq:%d, start_seq:%d\n" -+ , FUNC_ADPT_ARG(padapter), preorder_ctrl->tid, preorder_ctrl->indicate_seq, pparm->start_seq); -+ #endif -+ } -+#else -+ rtw_set_bit(RTW_RECV_ACK_OR_TIMEOUT, &preorder_ctrl->rec_abba_rsp_ack); -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" tid:%u SN_CLEAR indicate_seq:%d, start_seq:%d preorder_ctrl->rec_abba_rsp_ack =%lu \n" -+ , FUNC_ADPT_ARG(padapter) -+ , preorder_ctrl->tid -+ , preorder_ctrl->indicate_seq -+ , pparm->start_seq -+ ,preorder_ctrl->rec_abba_rsp_ack -+ ); -+ #endif -+#endif -+ -+ /* -+ * status = 0 means accept this addba req -+ * status = 37 means reject this addba req -+ */ -+ if (pparm->status == 0) { -+ preorder_ctrl->enable = _TRUE; -+ preorder_ctrl->ampdu_size = pparm->size; -+ } else if (pparm->status == 37) -+ preorder_ctrl->enable = _FALSE; -+ -+exit: -+ return H2C_SUCCESS; -+} -+ -+u8 chk_bmc_sleepq_cmd(_adapter *padapter) -+{ -+ struct cmd_obj *ph2c; -+ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); -+ u8 res = _SUCCESS; -+ -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_parm_rsp(ph2c, CMD_CHK_BMCSLEEPQ); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ -+ -+ return res; -+} -+ -+u8 set_tx_beacon_cmd(_adapter *padapter, u8 flags) -+{ -+ struct cmd_obj *ph2c; -+ struct Tx_Beacon_param *ptxBeacon_parm; -+ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ int len_diff = 0; -+ -+ /*prepare cmd parameter*/ -+ ptxBeacon_parm = (struct Tx_Beacon_param *)rtw_zmalloc(sizeof(struct Tx_Beacon_param)); -+ if (ptxBeacon_parm == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_memcpy(&(ptxBeacon_parm->network), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX)); -+ -+ len_diff = update_hidden_ssid( -+ ptxBeacon_parm->network.IEs + _BEACON_IE_OFFSET_ -+ , ptxBeacon_parm->network.IELength - _BEACON_IE_OFFSET_ -+ , pmlmeinfo->hidden_ssid_mode -+ ); -+ ptxBeacon_parm->network.IELength += len_diff; -+ -+ -+ /* need enqueue, prepare cmd_obj and enqueue */ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ rtw_mfree((u8 *)ptxBeacon_parm, sizeof(*ptxBeacon_parm)); -+ goto exit; -+ } -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, ptxBeacon_parm, CMD_TX_BEACON); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ ph2c->sctx = &sctx; -+ rtw_sctx_init(&sctx, 10 * 1000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ ph2c->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ } -+ -+ -+exit: -+ -+ -+ return res; -+} -+ -+ -+u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+ struct rtw_evt_header *evt_hdr; -+ u8 *peventbuf; -+ void (*event_callback)(_adapter *dev, u8 *pbuf); -+ struct evt_priv *pevt_priv = &(padapter->evtpriv); -+ -+ if (pbuf == NULL) -+ goto _abort_event_; -+ -+ evt_hdr = (struct rtw_evt_header *)pbuf; -+ peventbuf = pbuf + sizeof(struct rtw_evt_header); -+ -+#ifdef CHECK_EVENT_SEQ -+ /* checking event sequence... */ -+ if (evt_hdr->seq != (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f)) { -+ pevt_priv->event_seq = (evt_hdr->seq + 1) & 0x7f; -+ goto _abort_event_; -+ } -+#endif -+ -+ /* checking if event code is valid */ -+ if (evt_hdr->id >= EVT_ID_MAX) { -+ goto _abort_event_; -+ } -+ -+ /* checking if event size match the event parm size */ -+ if ((wlanevents[evt_hdr->id].parmsize != 0) && -+ (wlanevents[evt_hdr->id].parmsize != evt_hdr->len)) { -+ -+ goto _abort_event_; -+ -+ } -+ -+ ATOMIC_INC(&pevt_priv->event_seq); -+ -+ if (peventbuf) { -+ event_callback = wlanevents[evt_hdr->id].event_callback; -+ event_callback(padapter, (u8 *)peventbuf); -+ pevt_priv->evt_done_cnt++; -+ } -+ -+_abort_event_: -+ return H2C_SUCCESS; -+ -+} -+ -+u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+#ifdef CONFIG_AP_MODE -+ _irqL irqL; -+ struct sta_info *psta_bmc; -+ _list *xmitframe_plist, *xmitframe_phead; -+ struct xmit_frame *pxmitframe = NULL; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ /* for BC/MC Frames */ -+ psta_bmc = rtw_get_bcmc_stainfo(padapter); -+ if (!psta_bmc) -+ return H2C_SUCCESS; -+ -+ if ((rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, 0)) && (psta_bmc->sleepq_len > 0)) { -+#ifndef CONFIG_PCI_HCI -+ rtw_msleep_os(10);/* 10ms, ATIM(HIQ) Windows */ -+#endif -+ /* _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); */ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ -+ xmitframe_plist = get_next(xmitframe_plist); -+ -+ rtw_list_delete(&pxmitframe->list); -+ -+ psta_bmc->sleepq_len--; -+ if (psta_bmc->sleepq_len > 0) -+ pxmitframe->attrib.mdata = 1; -+ else -+ pxmitframe->attrib.mdata = 0; -+ -+ pxmitframe->attrib.triggered = 1; -+ -+ if (xmitframe_hiq_filter(pxmitframe) == _TRUE) -+ pxmitframe->attrib.qsel = QSLT_HIGH;/* HIQ */ -+ -+#if 0 -+ _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); -+ if (rtw_hal_xmit(padapter, pxmitframe) == _TRUE) -+ rtw_os_xmit_complete(padapter, pxmitframe); -+ _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); -+#endif -+ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); -+ } -+ -+ /* _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); */ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ if (rtw_get_intf_type(padapter) != RTW_PCIE) { -+ /* check hi queue and bmc_sleepq */ -+ rtw_chk_hi_queue_cmd(padapter); -+ } -+ } -+#endif -+ -+ return H2C_SUCCESS; -+} -+ -+u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+#ifdef CONFIG_AP_MODE -+ /*RTW_INFO(FUNC_ADPT_FMT, FUNC_ADPT_ARG(padapter));*/ -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+ -+ tx_beacon_handlder(padapter->dvobj); -+ -+#else -+ -+ if (send_beacon(padapter) == _FAIL) { -+ RTW_INFO("issue_beacon, fail!\n"); -+ return H2C_PARAMETERS_ERROR; -+ } -+ -+ /* tx bc/mc frames after update TIM */ -+ chk_bmc_sleepq_hdl(padapter, NULL); -+#endif -+#endif /* CONFIG_AP_MODE */ -+ return H2C_SUCCESS; -+} -+ -+/* -+* according to channel -+* add/remove WLAN_BSSID_EX.IEs's ERP ie -+* set WLAN_BSSID_EX.SupportedRates -+* update WLAN_BSSID_EX.IEs's Supported Rate and Extended Supported Rate ie -+*/ -+#ifdef CONFIG_AP_MODE -+void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 ch) -+{ -+ u8 network_type, rate_len, total_rate_len, remainder_rate_len; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ u8 erpinfo = 0x4; -+ -+ if (ch >= 36) { -+ network_type = WIRELESS_11A; -+ total_rate_len = IEEE80211_NUM_OFDM_RATESLEN; -+ rtw_remove_bcn_ie(padapter, pnetwork, _ERPINFO_IE_); -+ #ifdef CONFIG_80211AC_VHT -+ /* if channel in 5G band, then add vht ie . */ -+ if ((pmlmepriv->htpriv.ht_option == _TRUE) -+ && REGSTY_IS_11AC_ENABLE(&padapter->registrypriv) -+ && is_supported_vht(padapter->registrypriv.wireless_mode) -+ && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) -+ ) { -+ if (REGSTY_IS_11AC_AUTO(&padapter->registrypriv) -+ || pmlmepriv->ori_vht_en) -+ rtw_vht_ies_attach(padapter, pnetwork); -+ } -+ #endif -+ } else { -+ network_type = 0; -+ total_rate_len = 0; -+ if (padapter->registrypriv.wireless_mode & WIRELESS_11B) { -+ network_type |= WIRELESS_11B; -+ total_rate_len += IEEE80211_CCK_RATE_LEN; -+ } -+ if (padapter->registrypriv.wireless_mode & WIRELESS_11G) { -+ network_type |= WIRELESS_11G; -+ total_rate_len += IEEE80211_NUM_OFDM_RATESLEN; -+ } -+ rtw_add_bcn_ie(padapter, pnetwork, _ERPINFO_IE_, &erpinfo, 1); -+ #ifdef CONFIG_80211AC_VHT -+ rtw_vht_ies_detach(padapter, pnetwork); -+ #endif -+ } -+ -+ rtw_set_supported_rate(pnetwork->SupportedRates, network_type); -+ -+ UpdateBrateTbl(padapter, pnetwork->SupportedRates); -+ -+ if (total_rate_len > 8) { -+ rate_len = 8; -+ remainder_rate_len = total_rate_len - 8; -+ } else { -+ rate_len = total_rate_len; -+ remainder_rate_len = 0; -+ } -+ -+ rtw_add_bcn_ie(padapter, pnetwork, _SUPPORTEDRATES_IE_, pnetwork->SupportedRates, rate_len); -+ -+ if (remainder_rate_len) -+ rtw_add_bcn_ie(padapter, pnetwork, _EXT_SUPPORTEDRATES_IE_, (pnetwork->SupportedRates + 8), remainder_rate_len); -+ else -+ rtw_remove_bcn_ie(padapter, pnetwork, _EXT_SUPPORTEDRATES_IE_); -+ -+ pnetwork->Length = get_WLAN_BSSID_EX_sz(pnetwork); -+} -+#endif /* CONFIG_AP_MODE */ -+ -+void rtw_join_done_chk_ch(_adapter *adapter, int join_res) -+{ -+#define DUMP_ADAPTERS_STATUS 0 -+ -+ struct dvobj_priv *dvobj; -+ _adapter *iface; -+ struct mlme_priv *mlme; -+ struct mlme_ext_priv *mlmeext; -+ u8 u_ch, u_offset, u_bw; -+ int i, ret; -+ -+ dvobj = adapter_to_dvobj(adapter); -+ -+ if (DUMP_ADAPTERS_STATUS) { -+ RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(adapter)); -+ dump_adapters_status(RTW_DBGDUMP , dvobj); -+ } -+ -+ ret = rtw_mi_get_ch_setting_union(adapter, &u_ch, &u_bw, &u_offset); -+ if (join_res >= 0 && ret <= 0) { -+ join_res = -1; -+ dump_adapters_status(RTW_DBGDUMP , dvobj); -+ rtw_warn_on(1); -+ } -+ -+ if (join_res >= 0) { -+#ifdef CONFIG_MCC_MODE -+ /* MCC setting success, don't go to ch union process */ -+ if (rtw_hal_set_mcc_setting_join_done_chk_ch(adapter)) -+ return; -+#endif /* CONFIG_MCC_MODE */ -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ mlme = &iface->mlmepriv; -+ mlmeext = &iface->mlmeextpriv; -+ -+ if (!iface || iface == adapter) -+ continue; -+ -+#ifdef CONFIG_AP_MODE -+ if ((MLME_IS_AP(iface) || MLME_IS_MESH(iface)) -+ && check_fwstate(mlme, WIFI_ASOC_STATE) -+ ) { -+ u8 ori_ch, ori_bw, ori_offset; -+ bool is_grouped = rtw_is_chbw_grouped(u_ch, u_bw, u_offset -+ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); -+ -+ if (is_grouped == _FALSE) { -+ /* handle AP which need to switch ch setting */ -+ -+ ori_ch = mlmeext->cur_channel; -+ ori_bw = mlmeext->cur_bwmode; -+ ori_offset = mlmeext->cur_ch_offset; -+ -+ /* restore original bw, adjust bw by registry setting on target ch */ -+ mlmeext->cur_bwmode = mlme->ori_bw; -+ mlmeext->cur_channel = u_ch; -+ rtw_adjust_chbw(iface, mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset); -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(iface)) -+ rtw_mesh_adjust_chbw(mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset); -+ #endif -+ -+ rtw_chset_sync_chbw(adapter_to_chset(adapter) -+ , &mlmeext->cur_channel, &mlmeext->cur_bwmode, &mlmeext->cur_ch_offset -+ , &u_ch, &u_bw, &u_offset, 1, 0); -+ -+ RTW_INFO(FUNC_ADPT_FMT" %u,%u,%u => %u,%u,%u\n", FUNC_ADPT_ARG(iface) -+ , ori_ch, ori_bw, ori_offset -+ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); -+ -+ rtw_ap_update_bss_chbw(iface, &(mlmeext->mlmext_info.network) -+ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); -+ -+ _rtw_memcpy(&(mlme->cur_network.network), &(mlmeext->mlmext_info.network), sizeof(WLAN_BSSID_EX)); -+ -+ rtw_start_bss_hdl_after_chbw_decided(iface); -+ -+ { -+ #if defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ u8 ht_option = 0; -+ -+ #ifdef CONFIG_80211N_HT -+ ht_option = mlme->htpriv.ht_option; -+ #endif -+ -+ rtw_cfg80211_ch_switch_notify(iface -+ , mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset -+ , ht_option, 0); -+ #endif -+ } -+ } -+ -+ clr_fwstate(mlme, WIFI_OP_CH_SWITCHING); -+ update_beacon(iface, 0xFF, NULL, _TRUE, 0); -+ } -+#endif /* CONFIG_AP_MODE */ -+ } -+ -+#ifdef CONFIG_DFS_MASTER -+ rtw_dfs_rd_en_decision(adapter, MLME_STA_CONNECTED, 0); -+#endif -+ } else { -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ mlme = &iface->mlmepriv; -+ mlmeext = &iface->mlmeextpriv; -+ -+ if (!iface || iface == adapter) -+ continue; -+#ifdef CONFIG_AP_MODE -+ if ((MLME_IS_AP(iface) || MLME_IS_MESH(iface)) -+ && check_fwstate(mlme, WIFI_ASOC_STATE) -+ ) { -+ clr_fwstate(mlme, WIFI_OP_CH_SWITCHING); -+ update_beacon(iface, 0xFF, NULL, _TRUE, 0); -+ } -+#endif -+ } -+#ifdef CONFIG_DFS_MASTER -+ rtw_dfs_rd_en_decision(adapter, MLME_STA_DISCONNECTED, 0); -+#endif -+ } -+ -+ if (rtw_mi_get_ch_setting_union(adapter, &u_ch, &u_bw, &u_offset)) { -+ RTW_INFO(FUNC_ADPT_FMT" union:%u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); -+ set_channel_bwmode(adapter, u_ch, u_offset, u_bw); -+ } -+ -+ rtw_mi_update_union_chan_inf(adapter, u_ch, u_offset, u_bw); -+ -+ if (join_res >= 0) -+ rtw_rfctl_update_op_mode(adapter_to_rfctl(adapter), BIT(adapter->iface_id), 1); -+ -+ if (DUMP_ADAPTERS_STATUS) { -+ RTW_INFO(FUNC_ADPT_FMT" exit\n", FUNC_ADPT_ARG(adapter)); -+ dump_adapters_status(RTW_DBGDUMP , dvobj); -+ } -+} -+ -+int rtw_chk_start_clnt_join(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) -+{ -+#ifdef CONFIG_CONCURRENT_MODE -+ bool chbw_allow = _TRUE; -+#endif -+ bool connect_allow = _TRUE; -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ u8 cur_ch, cur_bw, cur_ch_offset; -+ u8 u_ch, u_offset, u_bw; -+ -+ u_ch = cur_ch = pmlmeext->cur_channel; -+ u_bw = cur_bw = pmlmeext->cur_bwmode; -+ u_offset = cur_ch_offset = pmlmeext->cur_ch_offset; -+ -+ if (!ch || !bw || !offset) { -+ connect_allow = _FALSE; -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (cur_ch == 0) { -+ connect_allow = _FALSE; -+ RTW_ERR(FUNC_ADPT_FMT" cur_ch:%u\n" -+ , FUNC_ADPT_ARG(adapter), cur_ch); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ RTW_INFO(FUNC_ADPT_FMT" req: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ { -+ struct dvobj_priv *dvobj; -+ _adapter *iface; -+ struct mlme_priv *mlme; -+ struct mlme_ext_priv *mlmeext; -+ struct mi_state mstate; -+ int i; -+ -+ dvobj = adapter_to_dvobj(adapter); -+ -+ rtw_mi_status_no_self(adapter, &mstate); -+ RTW_INFO(FUNC_ADPT_FMT" others ld_sta_num:%u, ap_num:%u, mesh_num:%u\n" -+ , FUNC_ADPT_ARG(adapter), MSTATE_STA_LD_NUM(&mstate) -+ , MSTATE_AP_NUM(&mstate), MSTATE_MESH_NUM(&mstate)); -+ -+ if (!MSTATE_STA_LD_NUM(&mstate) && !MSTATE_AP_NUM(&mstate) && !MSTATE_MESH_NUM(&mstate)) { -+ /* consider linking STA? */ -+ goto connect_allow_hdl; -+ } -+ -+ if (rtw_mi_get_ch_setting_union_no_self(adapter, &u_ch, &u_bw, &u_offset) <= 0) { -+ dump_adapters_status(RTW_DBGDUMP , dvobj); -+ rtw_warn_on(1); -+ } -+ RTW_INFO(FUNC_ADPT_FMT" others union:%u,%u,%u\n" -+ , FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); -+ -+ /* chbw_allow? */ -+ chbw_allow = rtw_is_chbw_grouped(pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset -+ , u_ch, u_bw, u_offset); -+ -+ RTW_INFO(FUNC_ADPT_FMT" chbw_allow:%d\n" -+ , FUNC_ADPT_ARG(adapter), chbw_allow); -+ -+#ifdef CONFIG_MCC_MODE -+ /* check setting success, don't go to ch union process */ -+ if (rtw_hal_set_mcc_setting_chk_start_clnt_join(adapter, &u_ch, &u_bw, &u_offset, chbw_allow)) -+ goto exit; -+#endif -+ -+ if (chbw_allow == _TRUE) { -+ rtw_sync_chbw(&cur_ch, &cur_bw, &cur_ch_offset, &u_ch, &u_bw, &u_offset); -+ rtw_warn_on(cur_ch != pmlmeext->cur_channel); -+ rtw_warn_on(cur_bw != pmlmeext->cur_bwmode); -+ rtw_warn_on(cur_ch_offset != pmlmeext->cur_ch_offset); -+ goto connect_allow_hdl; -+ } -+ -+#ifdef CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT -+ /* chbw_allow is _FALSE, connect allow? */ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ mlme = &iface->mlmepriv; -+ mlmeext = &iface->mlmeextpriv; -+ -+ if (check_fwstate(mlme, WIFI_STATION_STATE) -+ && check_fwstate(mlme, WIFI_ASOC_STATE) -+#if defined(CONFIG_P2P) -+ && rtw_p2p_chk_state(&(iface->wdinfo), P2P_STATE_NONE) -+#endif -+ ) { -+ connect_allow = _FALSE; -+ break; -+ } -+ } -+#endif /* CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT */ -+ -+ if (MSTATE_STA_LD_NUM(&mstate) + MSTATE_AP_LD_NUM(&mstate) + MSTATE_MESH_LD_NUM(&mstate) >= 4) -+ connect_allow = _FALSE; -+ -+ RTW_INFO(FUNC_ADPT_FMT" connect_allow:%d\n" -+ , FUNC_ADPT_ARG(adapter), connect_allow); -+ -+ if (connect_allow == _FALSE) -+ goto exit; -+ -+connect_allow_hdl: -+ /* connect_allow == _TRUE */ -+ -+ if (chbw_allow == _FALSE) { -+ u_ch = cur_ch; -+ u_bw = cur_bw; -+ u_offset = cur_ch_offset; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ mlme = &iface->mlmepriv; -+ mlmeext = &iface->mlmeextpriv; -+ -+ if (!iface || iface == adapter) -+ continue; -+ -+ #ifdef CONFIG_AP_MODE -+ if ((MLME_IS_AP(iface) || MLME_IS_MESH(iface)) -+ && check_fwstate(mlme, WIFI_ASOC_STATE) -+ ) { -+ #ifdef CONFIG_SPCT_CH_SWITCH -+ if (1) -+ rtw_ap_inform_ch_switch(iface, pmlmeext->cur_channel , pmlmeext->cur_ch_offset); -+ else -+ #endif -+ rtw_sta_flush(iface, _FALSE); -+ -+ rtw_hal_set_hwreg(iface, HW_VAR_CHECK_TXBUF, 0); -+ set_fwstate(mlme, WIFI_OP_CH_SWITCHING); -+ } else -+ #endif /* CONFIG_AP_MODE */ -+ if (check_fwstate(mlme, WIFI_STATION_STATE) -+ && check_fwstate(mlme, WIFI_ASOC_STATE) -+ ) { -+ rtw_disassoc_cmd(iface, 500, RTW_CMDF_DIRECTLY); -+ rtw_indicate_disconnect(iface, 0, _FALSE); -+ rtw_free_assoc_resources(iface, _TRUE); -+ } -+ } -+ } -+ -+ #ifdef CONFIG_DFS_MASTER -+ rtw_dfs_rd_en_decision(adapter, MLME_STA_CONNECTING, 0); -+ #endif -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+exit: -+ -+ if (connect_allow == _TRUE) { -+ RTW_INFO(FUNC_ADPT_FMT" union: %u,%u,%u\n", FUNC_ADPT_ARG(adapter), u_ch, u_bw, u_offset); -+ rtw_mi_update_union_chan_inf(adapter, u_ch, u_offset, u_bw); -+ *ch = u_ch; -+ *bw = u_bw; -+ *offset = u_offset; -+ -+#if defined(CONFIG_IOCTL_CFG80211) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ { -+ u8 ht_option = 0; -+ -+#ifdef CONFIG_80211N_HT -+ ht_option = adapter->mlmepriv.htpriv.ht_option; -+#endif /* CONFIG_80211N_HT */ -+ -+ /* -+ when supplicant send the mlme frame, -+ the bss freq is updated by channel switch event. -+ */ -+ rtw_cfg80211_ch_switch_notify(adapter, -+ cur_ch, cur_bw, cur_ch_offset, ht_option, 1); -+ } -+#endif -+ } -+ -+ return connect_allow == _TRUE ? _SUCCESS : _FAIL; -+} -+ -+void rtw_set_external_auth_status(_adapter *padapter, -+ const void *data, int len) -+{ -+#ifdef CONFIG_IOCTL_CFG80211 -+ struct net_device *dev = padapter->pnetdev; -+ struct wiphy *wiphy = adapter_to_wiphy(padapter); -+ struct rtw_external_auth_params params; -+ -+ /* convert data to external_auth_params */ -+ params.action = RTW_GET_BE32((u8 *)data); -+ _rtw_memcpy(¶ms.bssid, (u8 *)data + 4, ETH_ALEN); -+ _rtw_memcpy(¶ms.ssid.ssid, (u8 *)data + 10, WLAN_SSID_MAXLEN); -+ params.ssid.ssid_len = RTW_GET_BE64((u8 *)data + 42); -+ params.key_mgmt_suite = RTW_GET_BE32((u8 *)data + 58); -+ params.status = RTW_GET_BE16((u8 *)data + 62); -+ _rtw_memcpy(¶ms.pmkid, (u8 *)data + 64, PMKID_LEN); -+ -+ rtw_cfg80211_external_auth_status(wiphy, dev, ¶ms); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+} -+ -+u8 rtw_iqk_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+ rtw_hal_phydm_cal_trigger(padapter); -+ return H2C_SUCCESS; -+} -+ -+u8 rtw_set_chbw_hdl(_adapter *padapter, u8 *pbuf) -+{ -+ struct set_ch_parm *set_ch_parm; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ u8 ifbmp_s = rtw_mi_get_ld_sta_ifbmp(padapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ u8 u_ch, u_bw, u_offset; -+ -+ if (!pbuf) -+ return H2C_PARAMETERS_ERROR; -+ -+ set_ch_parm = (struct set_ch_parm *)pbuf; -+ -+ RTW_INFO(FUNC_NDEV_FMT" ch:%u, bw:%u, ch_offset:%u\n", -+ FUNC_NDEV_ARG(padapter->pnetdev), -+ set_ch_parm->ch, set_ch_parm->bw, set_ch_parm->ch_offset); -+ -+ /* update ch, bw, offset for all asoc STA ifaces */ -+ if (ifbmp_s) { -+ _adapter *iface; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface || !(ifbmp_s & BIT(iface->iface_id))) -+ continue; -+ -+ /* update STA mode ch/bw/offset */ -+ iface->mlmeextpriv.cur_channel = set_ch_parm->ch; -+ iface->mlmeextpriv.cur_bwmode = set_ch_parm->bw; -+ iface->mlmeextpriv.cur_ch_offset = set_ch_parm->ch_offset; -+ /* updaet STA mode DSConfig , ap mode will update in rtw_change_bss_chbw_cmd */ -+ iface->mlmepriv.cur_network.network.Configuration.DSConfig = set_ch_parm->ch; -+ } -+ } -+ -+ LeaveAllPowerSaveModeDirect(padapter); -+ -+ set_channel_bwmode(padapter, set_ch_parm->ch, set_ch_parm->ch_offset, set_ch_parm->bw); -+ -+ rtw_mi_get_ch_setting_union(padapter, &u_ch, &u_bw, &u_offset); -+ rtw_mi_update_union_chan_inf(padapter, u_ch, u_offset, u_bw); -+ rtw_rfctl_update_op_mode(dvobj_to_rfctl(dvobj), 0, 0); -+ -+ return H2C_SUCCESS; -+} -+ -+u8 rtw_set_chplan_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+ struct SetChannelPlan_param *param; -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ -+ if (!pbuf) -+ return H2C_PARAMETERS_ERROR; -+ -+ param = (struct SetChannelPlan_param *)pbuf; -+ -+ if (param->regd_src == REGD_SRC_RTK_PRIV -+ && !rtw_is_channel_plan_valid(param->channel_plan)) -+ return H2C_PARAMETERS_ERROR; -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+ if (rfctl->regd_src == REGD_SRC_OS) -+ rtw_mfree((void *)rfctl->country_ent, sizeof(struct country_chplan)); -+#endif -+ -+ rfctl->regd_src = param->regd_src; -+ rfctl->country_ent = param->country_ent; -+ rfctl->ChannelPlan = param->channel_plan; -+ -+#if CONFIG_TXPWR_LIMIT -+ rtw_txpwr_init_regd(rfctl); -+#endif -+ -+ rtw_rfctl_chplan_init(padapter); -+ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_REGULATION, NULL, _TRUE); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_regd_apply_flags(adapter_to_wiphy(padapter)); -+#endif -+ -+ rtw_nlrtw_reg_change_event(padapter); -+ -+ if (GET_HAL_DATA(padapter)->txpwr_limit_loaded -+ && rtw_get_hw_init_completed(padapter)) -+ rtw_hal_update_txpwr_level(padapter); -+ -+ return H2C_SUCCESS; -+} -+ -+u8 rtw_get_chplan_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+ struct get_channel_plan_param *param; -+ struct get_chplan_resp *resp; -+ struct rf_ctl_t *rfctl; -+ -+ if (!pbuf) -+ return H2C_PARAMETERS_ERROR; -+ -+ rfctl = adapter_to_rfctl(padapter); -+ param = (struct get_channel_plan_param *)pbuf; -+ -+ resp = rtw_vmalloc(sizeof(struct get_chplan_resp) + sizeof(RT_CHANNEL_INFO) * rfctl->max_chan_nums); -+ if (!resp) -+ return H2C_CMD_FAIL; -+ -+ resp->regd_src = rfctl->regd_src; -+ -+ if (rfctl->country_ent) { -+ _rtw_memcpy(&resp->country_ent, rfctl->country_ent, sizeof(struct country_chplan)); -+ resp->has_country = 1; -+ } else -+ resp->has_country = 0; -+ -+ resp->channel_plan = rfctl->ChannelPlan; -+#if CONFIG_TXPWR_LIMIT -+ resp->regd_name = rfctl->regd_name; -+#endif -+#ifdef CONFIG_DFS_MASTER -+ resp->dfs_domain = rtw_rfctl_get_dfs_domain(rfctl); -+#endif -+ resp->chset_num = rfctl->max_chan_nums; -+ -+ _rtw_memcpy(resp->chset, rfctl->channel_set, sizeof(RT_CHANNEL_INFO) * rfctl->max_chan_nums); -+ *param->resp = resp; -+ -+ return H2C_SUCCESS; -+} -+ -+u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+ struct LedBlink_param *ledBlink_param; -+ -+ if (!pbuf) -+ return H2C_PARAMETERS_ERROR; -+ -+ ledBlink_param = (struct LedBlink_param *)pbuf; -+ -+#ifdef CONFIG_RTW_LED_HANDLED_BY_CMD_THREAD -+ BlinkHandler((PLED_DATA)ledBlink_param->pLed); -+#endif -+ -+ return H2C_SUCCESS; -+} -+ -+void csa_timer_hdl(void *FunctionContext) -+{ -+ _adapter *padapter = (_adapter *)FunctionContext; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 i, update_beacon = _FALSE; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ _adapter *iface; -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ if (check_fwstate(pmlmepriv, WIFI_CSA_UPDATE_BEACON)) { -+ clr_fwstate(pmlmepriv, WIFI_CSA_UPDATE_BEACON); -+ update_beacon = _TRUE; -+ } -+ } -+ -+ /* wait beacons more than 70 seconds */ -+ if(update_beacon == _TRUE) { -+ RTW_INFO("wait beacons more than 70 seconds\n"); -+ return ; -+ } -+ -+ if(rfctl->csa_ch == 0) { -+ RTW_INFO("channel switch done\n"); -+ return ; -+ } -+ -+ /* channel switch */ -+ if (rtw_set_csa_cmd(padapter) != _SUCCESS) { -+ rfctl->csa_ch = 0; -+ rfctl->csa_switch_cnt = 0; -+ rfctl->csa_ch_offset = 0; -+ rfctl->csa_ch_width = 0; -+ rfctl->csa_ch_freq_seg0 = 0; -+ rfctl->csa_ch_freq_seg1 = 0; -+ } -+} -+ -+u8 set_csa_hdl(_adapter *adapter, unsigned char *pbuf) -+{ -+#if CONFIG_DFS -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ if (rfctl->csa_ch) -+ rtw_dfs_ch_switch_hdl(adapter_to_dvobj(adapter)); -+#endif -+ return H2C_SUCCESS; -+} -+ -+u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf) -+{ -+#ifdef CONFIG_TDLS -+ _irqL irqL; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+#ifdef CONFIG_TDLS_CH_SW -+ struct tdls_ch_switch *pchsw_info = &ptdlsinfo->chsw_info; -+#endif -+ struct TDLSoption_param *TDLSoption; -+ struct sta_info *ptdls_sta = NULL; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ struct sta_info *ap_sta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(&(pmlmeinfo->network))); -+ u8 survey_channel, i, min, option; -+ struct tdls_txmgmt txmgmt; -+ u32 setchtime, resp_sleep = 0, wait_time; -+ u8 zaddr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; -+ u8 ret; -+ u8 doiqk; -+ u64 tx_ra_bitmap = 0; -+ -+ if (!pbuf) -+ return H2C_PARAMETERS_ERROR; -+ -+ TDLSoption = (struct TDLSoption_param *)pbuf; -+ option = TDLSoption->option; -+ -+ if (!_rtw_memcmp(TDLSoption->addr, zaddr, ETH_ALEN)) { -+ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), TDLSoption->addr); -+ if (ptdls_sta == NULL) -+ return H2C_REJECTED; -+ } else { -+ if (!(option == TDLS_RS_RCR)) -+ return H2C_REJECTED; -+ } -+ -+ /* _enter_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); */ -+ /* RTW_INFO("[%s] option:%d\n", __FUNCTION__, option); */ -+ -+ switch (option) { -+ case TDLS_ESTABLISHED: { -+ /* As long as TDLS handshake success, we should set RCR_CBSSID_DATA bit to 0 */ -+ /* So we can receive all kinds of data frames. */ -+ u8 sta_band = 0; -+ -+ /* leave ALL PS when TDLS is established */ -+ rtw_pwr_wakeup(padapter); -+ -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_TDLS_LINKED); -+ RTW_INFO("Created Direct Link with "MAC_FMT"\n", MAC_ARG(ptdls_sta->cmn.mac_addr)); -+ -+ /* Set TDLS sta rate. */ -+ /* Update station supportRate */ -+ rtw_hal_update_sta_ra_info(padapter, ptdls_sta); -+ tx_ra_bitmap = ptdls_sta->cmn.ra_info.ramask; -+ -+ if (pmlmeext->cur_channel > 14) { -+ if (tx_ra_bitmap & 0xffff000) -+ sta_band |= WIRELESS_11_5N ; -+ -+ if (tx_ra_bitmap & 0xff0) -+ sta_band |= WIRELESS_11A; -+ -+ /* 5G band */ -+#ifdef CONFIG_80211AC_VHT -+ if (ptdls_sta->vhtpriv.vht_option) -+ sta_band = WIRELESS_11_5AC; -+#endif -+ -+ } else { -+ if (tx_ra_bitmap & 0xffff000) -+ sta_band |= WIRELESS_11_24N; -+ -+ if (tx_ra_bitmap & 0xff0) -+ sta_band |= WIRELESS_11G; -+ -+ if (tx_ra_bitmap & 0x0f) -+ sta_band |= WIRELESS_11B; -+ } -+ ptdls_sta->wireless_mode = sta_band; -+ rtw_hal_update_sta_wset(padapter, ptdls_sta); -+ /* Sta mode */ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, ptdls_sta, _TRUE); -+ -+ set_sta_rate(padapter, ptdls_sta); -+ rtw_sta_media_status_rpt(padapter, ptdls_sta, 1); -+ break; -+ } -+ case TDLS_ISSUE_PTI: -+ ptdls_sta->tdls_sta_state |= TDLS_WAIT_PTR_STATE; -+ issue_tdls_peer_traffic_indication(padapter, ptdls_sta); -+ _set_timer(&ptdls_sta->pti_timer, TDLS_PTI_TIME); -+ break; -+#ifdef CONFIG_TDLS_CH_SW -+ case TDLS_CH_SW_RESP: -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.status_code = 0; -+ _rtw_memcpy(txmgmt.peer, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ -+ if (ap_sta) -+ rtw_hal_macid_sleep(padapter, ap_sta->cmn.mac_id); -+ issue_nulldata(padapter, NULL, 1, 3, 3); -+ -+ RTW_INFO("[TDLS ] issue tdls channel switch response\n"); -+ ret = issue_tdls_ch_switch_rsp(padapter, &txmgmt, _TRUE); -+ -+ /* If we receive TDLS_CH_SW_REQ at off channel which it's target is AP's channel */ -+ /* then we just switch to AP's channel*/ -+ if (padapter->mlmeextpriv.cur_channel == pchsw_info->off_ch_num) { -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_END_TO_BASE_CHNL); -+ break; -+ } -+ -+ if (ret == _SUCCESS) -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_TO_OFF_CHNL); -+ else -+ RTW_INFO("[TDLS] issue_tdls_ch_switch_rsp wait ack fail !!!!!!!!!!\n"); -+ -+ break; -+ case TDLS_CH_SW_PREPARE: -+ pchsw_info->ch_sw_state |= TDLS_CH_SWITCH_PREPARE_STATE; -+ -+ /* to collect IQK info of off-chnl */ -+ doiqk = _TRUE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, &doiqk); -+ set_channel_bwmode(padapter, pchsw_info->off_ch_num, pchsw_info->ch_offset, (pchsw_info->ch_offset) ? CHANNEL_WIDTH_40 : CHANNEL_WIDTH_20); -+ doiqk = _FALSE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, &doiqk); -+ -+ /* switch back to base-chnl */ -+ doiqk = _TRUE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, &doiqk); -+ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); -+ doiqk = _FALSE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, &doiqk); -+ -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_START); -+ -+ pchsw_info->ch_sw_state &= ~(TDLS_CH_SWITCH_PREPARE_STATE); -+ -+ break; -+ case TDLS_CH_SW_START: -+ rtw_tdls_set_ch_sw_oper_control(padapter, _TRUE); -+ break; -+ case TDLS_CH_SW_TO_OFF_CHNL: -+ if (ap_sta) -+ rtw_hal_macid_sleep(padapter, ap_sta->cmn.mac_id); -+ issue_nulldata(padapter, NULL, 1, 3, 3); -+ -+ if (padapter->registrypriv.wifi_spec == 0) { -+ if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)) -+ _set_timer(&ptdls_sta->ch_sw_timer, (u32)(ptdls_sta->ch_switch_timeout) / 1000); -+ } -+ -+ if (rtw_tdls_do_ch_sw(padapter, ptdls_sta, TDLS_CH_SW_OFF_CHNL, pchsw_info->off_ch_num, -+ pchsw_info->ch_offset, (pchsw_info->ch_offset) ? CHANNEL_WIDTH_40 : CHANNEL_WIDTH_20, ptdls_sta->ch_switch_time) == _SUCCESS) { -+ pchsw_info->ch_sw_state &= ~(TDLS_PEER_AT_OFF_STATE); -+ if (pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE) { -+ if (issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta->cmn.mac_addr, 0, 1, -+ (padapter->registrypriv.wifi_spec == 0) ? 3 : 0) == _FAIL) -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_TO_BASE_CHNL); -+ } -+ } else { -+ if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)) -+ _cancel_timer_ex(&ptdls_sta->ch_sw_timer); -+ } -+ -+ -+ break; -+ case TDLS_CH_SW_END: -+ case TDLS_CH_SW_END_TO_BASE_CHNL: -+ rtw_tdls_set_ch_sw_oper_control(padapter, _FALSE); -+ _cancel_timer_ex(&ptdls_sta->ch_sw_timer); -+ _cancel_timer_ex(&ptdls_sta->stay_on_base_chnl_timer); -+ _cancel_timer_ex(&ptdls_sta->ch_sw_monitor_timer); -+#if 0 -+ _rtw_memset(pHalData->tdls_ch_sw_iqk_info_base_chnl, 0x00, sizeof(pHalData->tdls_ch_sw_iqk_info_base_chnl)); -+ _rtw_memset(pHalData->tdls_ch_sw_iqk_info_off_chnl, 0x00, sizeof(pHalData->tdls_ch_sw_iqk_info_off_chnl)); -+#endif -+ -+ if (option == TDLS_CH_SW_END_TO_BASE_CHNL) -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_TO_BASE_CHNL); -+ -+ break; -+ case TDLS_CH_SW_TO_BASE_CHNL_UNSOLICITED: -+ case TDLS_CH_SW_TO_BASE_CHNL: -+ pchsw_info->ch_sw_state &= ~(TDLS_PEER_AT_OFF_STATE | TDLS_WAIT_CH_RSP_STATE); -+ -+ if (option == TDLS_CH_SW_TO_BASE_CHNL_UNSOLICITED) { -+ if (ptdls_sta != NULL) { -+ /* Send unsolicited channel switch rsp. to peer */ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.status_code = 0; -+ _rtw_memcpy(txmgmt.peer, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ issue_tdls_ch_switch_rsp(padapter, &txmgmt, _FALSE); -+ } -+ } -+ -+ if (rtw_tdls_do_ch_sw(padapter, ptdls_sta, TDLS_CH_SW_BASE_CHNL, pmlmeext->cur_channel, -+ pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode, ptdls_sta->ch_switch_time) == _SUCCESS) { -+ if (ap_sta) -+ rtw_hal_macid_wakeup(padapter, ap_sta->cmn.mac_id); -+ issue_nulldata(padapter, NULL, 0, 3, 3); -+ /* set ch sw monitor timer for responder */ -+ if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)) -+ _set_timer(&ptdls_sta->ch_sw_monitor_timer, TDLS_CH_SW_MONITOR_TIMEOUT); -+ } -+ -+ break; -+#endif -+ case TDLS_RS_RCR: -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_TDLS_NOLINK); -+ break; -+ case TDLS_TEARDOWN_STA: -+ case TDLS_TEARDOWN_STA_NO_WAIT: -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; -+ _rtw_memcpy(txmgmt.peer, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ -+ issue_tdls_teardown(padapter, &txmgmt, (option == TDLS_TEARDOWN_STA) ? _TRUE : _FALSE); -+ -+ break; -+ case TDLS_TEARDOWN_STA_LOCALLY: -+ case TDLS_TEARDOWN_STA_LOCALLY_POST: -+#ifdef CONFIG_TDLS_CH_SW -+ if (_rtw_memcmp(TDLSoption->addr, pchsw_info->addr, ETH_ALEN) == _TRUE) { -+ pchsw_info->ch_sw_state &= ~(TDLS_CH_SW_INITIATOR_STATE | -+ TDLS_CH_SWITCH_ON_STATE | -+ TDLS_PEER_AT_OFF_STATE); -+ rtw_tdls_set_ch_sw_oper_control(padapter, _FALSE); -+ _rtw_memset(pchsw_info->addr, 0x00, ETH_ALEN); -+ } -+#endif -+ -+ if (option == TDLS_TEARDOWN_STA_LOCALLY) -+ rtw_tdls_teardown_pre_hdl(padapter, ptdls_sta); -+ -+ rtw_tdls_teardown_post_hdl(padapter, ptdls_sta, _FALSE); -+ -+ if (ptdlsinfo->tdls_sctx != NULL) -+ rtw_sctx_done(&(ptdlsinfo->tdls_sctx)); -+ -+ break; -+ } -+ -+ /* _exit_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); */ -+ -+ return H2C_SUCCESS; -+#else -+ return H2C_REJECTED; -+#endif /* CONFIG_TDLS */ -+ -+} -+ -+u8 run_in_thread_hdl(_adapter *padapter, u8 *pbuf) -+{ -+ struct RunInThread_param *p; -+ -+ -+ if (NULL == pbuf) -+ return H2C_PARAMETERS_ERROR; -+ p = (struct RunInThread_param *)pbuf; -+ -+ if (p->func) -+ p->func(p->context); -+ -+ return H2C_SUCCESS; -+} -+ -+int rtw_sae_preprocess(_adapter *adapter, const u8 *buf, u32 len, u8 tx) -+{ -+#ifdef CONFIG_IOCTL_CFG80211 -+ const u8 *frame_body = buf + sizeof(struct rtw_ieee80211_hdr_3addr); -+ u16 alg; -+ u16 seq; -+ u16 status; -+ int ret = _FAIL; -+ -+ alg = RTW_GET_LE16(frame_body); -+ if (alg != WLAN_AUTH_SAE) -+ goto exit; -+ -+ seq = RTW_GET_LE16(frame_body + 2); -+ status = RTW_GET_LE16(frame_body + 4); -+ -+ RTW_INFO("RTW_%s:AUTH alg:0x%04x, seq:0x%04x, status:0x%04x, mesg:%s\n", -+ (tx == _TRUE) ? "Tx" : "Rx", alg, seq, status, -+ (seq == 1) ? "Commit" : "Confirm"); -+ -+ ret = _SUCCESS; -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(adapter)) { -+ rtw_mesh_sae_check_frames(adapter, buf, len, tx, alg, seq, status); -+ goto exit; -+ } -+#endif -+ -+ if (tx && (seq == 2) && (status == 0)) { -+ /* quere commit frame until external auth statue update */ -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *psta = NULL; -+ _irqL irqL; -+ -+ psta = rtw_get_stainfo(pstapriv, GetAddr1Ptr(buf)); -+ if (psta) { -+ _enter_critical_bh(&psta->lock, &irqL); -+ if (psta->pauth_frame) { -+ rtw_mfree(psta->pauth_frame, psta->auth_len); -+ psta->pauth_frame = NULL; -+ psta->auth_len = 0; -+ } -+ -+ psta->pauth_frame = rtw_zmalloc(len); -+ if (psta->pauth_frame) { -+ _rtw_memcpy(psta->pauth_frame, buf, len); -+ psta->auth_len = len; -+ } -+ _exit_critical_bh(&psta->lock, &irqL); -+ -+ ret = 2; -+ } -+ } -+exit: -+ return ret; -+#else -+ return _SUCCESS; -+#endif /* CONFIG_IOCTL_CFG80211 */ -+} -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_mp.c b/drivers/staging/rtl8723cs/core/rtw_mp.c -new file mode 100644 -index 000000000000..65ae02f61b28 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_mp.c -@@ -0,0 +1,3991 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_MP_C_ -+#include -+#ifdef PLATFORM_FREEBSD -+ #include /* for RFHIGHPID */ -+#endif -+ -+#include "../hal/phydm/phydm_precomp.h" -+#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A) -+ #include -+#endif -+ -+#ifdef CONFIG_MP_VHT_HW_TX_MODE -+#define CEILING_POS(X) ((X - (int)(X)) > 0 ? (int)(X + 1) : (int)(X)) -+#define CEILING_NEG(X) ((X - (int)(X)) < 0 ? (int)(X - 1) : (int)(X)) -+#define ceil(X) (((X) > 0) ? CEILING_POS(X) : CEILING_NEG(X)) -+ -+int rtfloor(float x) -+{ -+ int i = x - 2; -+ while -+ (++i <= x - 1) -+ ; -+ return i; -+} -+#endif -+ -+#ifdef CONFIG_MP_INCLUDED -+u32 read_macreg(_adapter *padapter, u32 addr, u32 sz) -+{ -+ u32 val = 0; -+ -+ switch (sz) { -+ case 1: -+ val = rtw_read8(padapter, addr); -+ break; -+ case 2: -+ val = rtw_read16(padapter, addr); -+ break; -+ case 4: -+ val = rtw_read32(padapter, addr); -+ break; -+ default: -+ val = 0xffffffff; -+ break; -+ } -+ -+ return val; -+ -+} -+ -+void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz) -+{ -+ switch (sz) { -+ case 1: -+ rtw_write8(padapter, addr, (u8)val); -+ break; -+ case 2: -+ rtw_write16(padapter, addr, (u16)val); -+ break; -+ case 4: -+ rtw_write32(padapter, addr, val); -+ break; -+ default: -+ break; -+ } -+ -+} -+ -+u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask) -+{ -+ return rtw_hal_read_bbreg(padapter, addr, bitmask); -+} -+ -+void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val) -+{ -+ rtw_hal_write_bbreg(padapter, addr, bitmask, val); -+} -+ -+u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask) -+{ -+ return rtw_hal_read_rfreg(padapter, rfpath, addr, bitmask); -+} -+ -+void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val) -+{ -+ rtw_hal_write_rfreg(padapter, rfpath, addr, bitmask, val); -+} -+ -+u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr) -+{ -+ return _read_rfreg(padapter, rfpath, addr, bRFRegOffsetMask); -+} -+ -+void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val) -+{ -+ _write_rfreg(padapter, rfpath, addr, bRFRegOffsetMask, val); -+} -+ -+static void _init_mp_priv_(struct mp_priv *pmp_priv) -+{ -+ WLAN_BSSID_EX *pnetwork; -+ -+ _rtw_memset(pmp_priv, 0, sizeof(struct mp_priv)); -+ -+ pmp_priv->mode = MP_OFF; -+ -+ pmp_priv->channel = 1; -+ pmp_priv->bandwidth = CHANNEL_WIDTH_20; -+ pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ pmp_priv->rateidx = RATE_1M; -+ pmp_priv->txpoweridx = 0x2A; -+ -+ pmp_priv->antenna_tx = ANTENNA_A; -+ pmp_priv->antenna_rx = ANTENNA_AB; -+ -+ pmp_priv->check_mp_pkt = 0; -+ -+ pmp_priv->tx_pktcount = 0; -+ -+ pmp_priv->rx_bssidpktcount = 0; -+ pmp_priv->rx_pktcount = 0; -+ pmp_priv->rx_crcerrpktcount = 0; -+ -+ pmp_priv->network_macaddr[0] = 0x00; -+ pmp_priv->network_macaddr[1] = 0xE0; -+ pmp_priv->network_macaddr[2] = 0x4C; -+ pmp_priv->network_macaddr[3] = 0x87; -+ pmp_priv->network_macaddr[4] = 0x66; -+ pmp_priv->network_macaddr[5] = 0x55; -+ -+ pmp_priv->bSetRxBssid = _FALSE; -+ pmp_priv->bRTWSmbCfg = _FALSE; -+ pmp_priv->bloopback = _FALSE; -+ -+ pmp_priv->bloadefusemap = _FALSE; -+ pmp_priv->brx_filter_beacon = _FALSE; -+ pmp_priv->mplink_brx = _FALSE; -+ -+ pnetwork = &pmp_priv->mp_network.network; -+ _rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN); -+ -+ pnetwork->Ssid.SsidLength = 8; -+ _rtw_memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength); -+ -+ pmp_priv->tx.payload = MP_TX_Payload_default_random; -+#ifdef CONFIG_80211N_HT -+ pmp_priv->tx.attrib.ht_en = 1; -+#endif -+ -+ pmp_priv->mpt_ctx.mpt_rate_index = 1; -+ -+} -+ -+ -+static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ struct pkt_attrib *pattrib; -+ -+ /* init xmitframe attribute */ -+ pattrib = &pmptx->attrib; -+ _rtw_memset(pattrib, 0, sizeof(struct pkt_attrib)); -+ _rtw_memset(pmptx->desc, 0, TXDESC_SIZE); -+ -+ pattrib->ether_type = 0x8712; -+#if 0 -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+#endif -+ _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); -+ -+ /* pattrib->dhcp_pkt = 0; -+ * pattrib->pktlen = 0; */ -+ pattrib->ack_policy = 0; -+ /* pattrib->pkt_hdrlen = ETH_HLEN; */ -+ pattrib->hdrlen = WLAN_HDR_A3_LEN; -+ pattrib->subtype = WIFI_DATA; -+ pattrib->priority = 0; -+ pattrib->qsel = pattrib->priority; -+ /* do_queue_select(padapter, pattrib); */ -+ pattrib->nr_frags = 1; -+ pattrib->encrypt = 0; -+ pattrib->bswenc = _FALSE; -+ pattrib->qos_en = _FALSE; -+ -+ pattrib->pktlen = 1500; -+ -+ if (pHalData->rf_type == RF_2T2R) -+ pattrib->raid = RATEID_IDX_BGN_40M_2SS; -+ else -+ pattrib->raid = RATEID_IDX_BGN_40M_1SS; -+ -+#ifdef CONFIG_80211AC_VHT -+ if (pHalData->rf_type == RF_1T1R) -+ pattrib->raid = RATEID_IDX_VHT_1SS; -+ else if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_2T4R) -+ pattrib->raid = RATEID_IDX_VHT_2SS; -+ else if (pHalData->rf_type == RF_3T3R) -+ pattrib->raid = RATEID_IDX_VHT_3SS; -+ else -+ pattrib->raid = RATEID_IDX_BGN_40M_1SS; -+#endif -+} -+ -+s32 init_mp_priv(PADAPTER padapter) -+{ -+ struct mp_priv *pmppriv = &padapter->mppriv; -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ _init_mp_priv_(pmppriv); -+ pmppriv->papdater = padapter; -+ if (IS_HARDWARE_TYPE_8822C(padapter)) -+ pmppriv->mp_dm = 1;/* default enable dpk tracking */ -+ else -+ pmppriv->mp_dm = 0; -+ -+ pmppriv->tx.stop = 1; -+ pmppriv->bSetTxPower = 0; /*for manually set tx power*/ -+ pmppriv->bTxBufCkFail = _FALSE; -+ pmppriv->pktInterval = 0; -+ pmppriv->pktLength = 1000; -+ pmppriv->bprocess_mp_mode = _FALSE; -+ pmppriv->efuse_update_file= _FALSE; -+ -+ mp_init_xmit_attrib(&pmppriv->tx, padapter); -+ -+ switch (GET_HAL_RFPATH(padapter)) { -+ case RF_1T1R: -+ pmppriv->antenna_tx = ANTENNA_A; -+ pmppriv->antenna_rx = ANTENNA_A; -+ break; -+ case RF_1T2R: -+ default: -+ pmppriv->antenna_tx = ANTENNA_A; -+ pmppriv->antenna_rx = ANTENNA_AB; -+ break; -+ case RF_2T2R: -+ pmppriv->antenna_tx = ANTENNA_AB; -+ pmppriv->antenna_rx = ANTENNA_AB; -+ break; -+ case RF_2T4R: -+ pmppriv->antenna_tx = ANTENNA_BC; -+ pmppriv->antenna_rx = ANTENNA_ABCD; -+ break; -+ } -+ -+ pHalData->AntennaRxPath = pmppriv->antenna_rx; -+ pHalData->antenna_tx_path = pmppriv->antenna_tx; -+ -+ return _SUCCESS; -+} -+ -+void free_mp_priv(struct mp_priv *pmp_priv) -+{ -+ if (pmp_priv->pallocated_mp_xmitframe_buf) { -+ rtw_mfree(pmp_priv->pallocated_mp_xmitframe_buf, 0); -+ pmp_priv->pallocated_mp_xmitframe_buf = NULL; -+ } -+ pmp_priv->pmp_xmtframe_buf = NULL; -+} -+ -+#if 0 -+static void PHY_IQCalibrate_default( -+ PADAPTER pAdapter, -+ BOOLEAN bReCovery -+) -+{ -+ RTW_INFO("%s\n", __func__); -+} -+ -+static void PHY_LCCalibrate_default( -+ PADAPTER pAdapter -+) -+{ -+ RTW_INFO("%s\n", __func__); -+} -+ -+static void PHY_SetRFPathSwitch_default( -+ PADAPTER pAdapter, -+ BOOLEAN bMain -+) -+{ -+ RTW_INFO("%s\n", __func__); -+} -+#endif -+ -+void mpt_InitHWConfig(PADAPTER Adapter) -+{ -+ PHAL_DATA_TYPE hal; -+ -+ hal = GET_HAL_DATA(Adapter); -+ -+ if (IS_HARDWARE_TYPE_8723B(Adapter)) { -+ /* TODO: <20130114, Kordan> The following setting is only for DPDT and Fixed board type. */ -+ /* TODO: A better solution is configure it according EFUSE during the run-time. */ -+ -+ phy_set_mac_reg(Adapter, 0x64, BIT20, 0x0); /* 0x66[4]=0 */ -+ phy_set_mac_reg(Adapter, 0x64, BIT24, 0x0); /* 0x66[8]=0 */ -+ phy_set_mac_reg(Adapter, 0x40, BIT4, 0x0); /* 0x40[4]=0 */ -+ phy_set_mac_reg(Adapter, 0x40, BIT3, 0x1); /* 0x40[3]=1 */ -+ phy_set_mac_reg(Adapter, 0x4C, BIT24, 0x1); /* 0x4C[24:23]=10 */ -+ phy_set_mac_reg(Adapter, 0x4C, BIT23, 0x0); /* 0x4C[24:23]=10 */ -+ phy_set_bb_reg(Adapter, 0x944, BIT1 | BIT0, 0x3); /* 0x944[1:0]=11 */ -+ phy_set_bb_reg(Adapter, 0x930, bMaskByte0, 0x77);/* 0x930[7:0]=77 */ -+ phy_set_mac_reg(Adapter, 0x38, BIT11, 0x1);/* 0x38[11]=1 */ -+ -+ /* TODO: <20130206, Kordan> The default setting is wrong, hard-coded here. */ -+ phy_set_mac_reg(Adapter, 0x778, 0x3, 0x3); /* Turn off hardware PTA control (Asked by Scott) */ -+ phy_set_mac_reg(Adapter, 0x64, bMaskDWord, 0x36000000);/* Fix BT S0/S1 */ -+ phy_set_mac_reg(Adapter, 0x948, bMaskDWord, 0x0); /* Fix BT can't Tx */ -+ -+ /* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou) */ -+ phy_set_bb_reg(Adapter, 0xA00, BIT8, 0x0); /*0xA01[0] = 0*/ -+ } else if (IS_HARDWARE_TYPE_8821(Adapter)) { -+ /* <20131121, VincentL> Add for 8821AU DPDT setting and fix switching antenna issue (Asked by Rock) -+ <20131122, VincentL> Enable for all 8821A/8811AU (Asked by Alex)*/ -+ phy_set_mac_reg(Adapter, 0x4C, BIT23, 0x0); /*0x4C[23:22]=01*/ -+ phy_set_mac_reg(Adapter, 0x4C, BIT22, 0x1); /*0x4C[23:22]=01*/ -+ } else if (IS_HARDWARE_TYPE_8188ES(Adapter)) -+ phy_set_mac_reg(Adapter, 0x4C , BIT23, 0); /*select DPDT_P and DPDT_N as output pin*/ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(Adapter)) -+ PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8814A, 0x2000); -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(Adapter)) { -+ rtw_write32(Adapter, 0x520, rtw_read32(Adapter, 0x520) | 0x8000); -+ rtw_write32(Adapter, 0x524, rtw_read32(Adapter, 0x524) & (~0x800)); -+ } -+#endif -+ -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(Adapter)) { -+ u32 tmp_reg = 0; -+ -+ PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8822B, 0x2000); -+ /* fixed wifi can't 2.4g tx suggest by Szuyitasi 20160504 */ -+ phy_set_bb_reg(Adapter, 0x70, bMaskByte3, 0x0e); -+ RTW_INFO(" 0x73 = 0x%x\n", phy_query_bb_reg(Adapter, 0x70, bMaskByte3)); -+ phy_set_bb_reg(Adapter, 0x1704, bMaskDWord, 0x0000ff00); -+ RTW_INFO(" 0x1704 = 0x%x\n", phy_query_bb_reg(Adapter, 0x1704, bMaskDWord)); -+ phy_set_bb_reg(Adapter, 0x1700, bMaskDWord, 0xc00f0038); -+ RTW_INFO(" 0x1700 = 0x%x\n", phy_query_bb_reg(Adapter, 0x1700, bMaskDWord)); -+ } -+#endif /* CONFIG_RTL8822B */ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(Adapter)) -+ PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8821C, 0x2000); -+#endif /* CONFIG_RTL8821C */ -+#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) -+ else if (IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8188GTV(Adapter)) { -+ if (IS_A_CUT(hal->version_id) || IS_B_CUT(hal->version_id)) { -+ RTW_INFO("%s() Active large power detection\n", __func__); -+ phy_active_large_power_detection_8188f(&(GET_HAL_DATA(Adapter)->odmpriv)); -+ } -+ } -+#endif -+#if defined(CONFIG_RTL8822C) -+ else if( IS_HARDWARE_TYPE_8822C(Adapter)) { -+ rtw_write16(Adapter, REG_RXFLTMAP1_8822C, 0x2000); -+ /* 0x7D8[31] : time out enable when cca is not assert -+ 0x60D[7:0] : time out value (Unit : us)*/ -+ rtw_write8(Adapter, 0x7db, 0xc0); -+ RTW_INFO(" 0x7d8 = 0x%x\n", rtw_read8(Adapter, 0x7d8)); -+ rtw_write8(Adapter, 0x60d, 0x0c); -+ RTW_INFO(" 0x60d = 0x%x\n", rtw_read8(Adapter, 0x60d)); -+ phy_set_bb_reg(Adapter, 0x1c44, BIT10, 0x1); -+ RTW_INFO(" 0x1c44 = 0x%x\n", phy_query_bb_reg(Adapter, 0x1c44, bMaskDWord)); -+ } -+#endif -+#if defined(CONFIG_RTL8814B) -+ else if(IS_HARDWARE_TYPE_8814B(Adapter)) -+ { -+ PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8814B, 0x2000); -+ } -+#endif -+#if defined(CONFIG_RTL8723F) -+ /* todo: 8723F not verify yet */ -+ else if (IS_HARDWARE_TYPE_8723F(Adapter)) { -+ /* 8723F mac is similar with 8723D, -+ * but can't find 8723D here. -+ */ -+ } -+#endif -+} -+ -+static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery) -+{ -+ halrf_iqk_trigger(&(GET_HAL_DATA(padapter)->odmpriv), bReCovery); -+} -+ -+static void PHY_LCCalibrate(PADAPTER padapter) -+{ -+ halrf_lck_trigger(&(GET_HAL_DATA(padapter)->odmpriv)); -+} -+ -+static u8 PHY_QueryRFPathSwitch(PADAPTER padapter) -+{ -+ u8 bmain = 0; -+/* -+ if (IS_HARDWARE_TYPE_8723B(padapter)) { -+#ifdef CONFIG_RTL8723B -+ bmain = PHY_QueryRFPathSwitch_8723B(padapter); -+#endif -+ } else if (IS_HARDWARE_TYPE_8188E(padapter)) { -+#ifdef CONFIG_RTL8188E -+ bmain = PHY_QueryRFPathSwitch_8188E(padapter); -+#endif -+ } else if (IS_HARDWARE_TYPE_8814A(padapter)) { -+#ifdef CONFIG_RTL8814A -+ bmain = PHY_QueryRFPathSwitch_8814A(padapter); -+#endif -+ } else if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) { -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ bmain = PHY_QueryRFPathSwitch_8812A(padapter); -+#endif -+ } else if (IS_HARDWARE_TYPE_8192E(padapter)) { -+#ifdef CONFIG_RTL8192E -+ bmain = PHY_QueryRFPathSwitch_8192E(padapter); -+#endif -+ } else if (IS_HARDWARE_TYPE_8703B(padapter)) { -+#ifdef CONFIG_RTL8703B -+ bmain = PHY_QueryRFPathSwitch_8703B(padapter); -+#endif -+ } else if (IS_HARDWARE_TYPE_8188F(padapter)) { -+#ifdef CONFIG_RTL8188F -+ bmain = PHY_QueryRFPathSwitch_8188F(padapter); -+#endif -+ } else if (IS_HARDWARE_TYPE_8188GTV(padapter)) { -+#ifdef CONFIG_RTL8188GTV -+ bmain = PHY_QueryRFPathSwitch_8188GTV(padapter); -+#endif -+ } else if (IS_HARDWARE_TYPE_8822B(padapter)) { -+#ifdef CONFIG_RTL8822B -+ bmain = PHY_QueryRFPathSwitch_8822B(padapter); -+#endif -+ } else if (IS_HARDWARE_TYPE_8723D(padapter)) { -+#ifdef CONFIG_RTL8723D -+ bmain = PHY_QueryRFPathSwitch_8723D(padapter); -+#endif -+ } else -+*/ -+ -+ if (IS_HARDWARE_TYPE_8821C(padapter)) { -+#ifdef CONFIG_RTL8821C -+ bmain = phy_query_rf_path_switch_8821c(padapter); -+#endif -+ } -+ -+ return bmain; -+} -+ -+static void PHY_SetRFPathSwitch(PADAPTER padapter , BOOLEAN bMain) { -+ -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(padapter); -+ struct dm_struct *phydm = &hal->odmpriv; -+ -+ if (IS_HARDWARE_TYPE_8723B(padapter)) { -+#ifdef CONFIG_RTL8723B -+ phy_set_rf_path_switch_8723b(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8188E(padapter)) { -+#ifdef CONFIG_RTL8188E -+ phy_set_rf_path_switch_8188e(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8814A(padapter)) { -+#ifdef CONFIG_RTL8814A -+ phy_set_rf_path_switch_8814a(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) { -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ phy_set_rf_path_switch_8812a(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8192E(padapter)) { -+#ifdef CONFIG_RTL8192E -+ phy_set_rf_path_switch_8192e(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8703B(padapter)) { -+#ifdef CONFIG_RTL8703B -+ phy_set_rf_path_switch_8703b(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8188F(padapter) || IS_HARDWARE_TYPE_8188GTV(padapter)) { -+#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) -+ phy_set_rf_path_switch_8188f(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8192F(padapter)) { -+#ifdef CONFIG_RTL8192F -+ phy_set_rf_path_switch_8192f(padapter, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8822B(padapter)) { -+#ifdef CONFIG_RTL8822B -+ phy_set_rf_path_switch_8822b(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8723D(padapter)) { -+#ifdef CONFIG_RTL8723D -+ phy_set_rf_path_switch_8723d(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8821C(padapter)) { -+#ifdef CONFIG_RTL8821C -+ phy_set_rf_path_switch_8821c(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8822C(padapter)) { -+#ifdef CONFIG_RTL8822C -+ phy_set_rf_path_switch_8822c(phydm, bMain); -+#endif -+ } else if (IS_HARDWARE_TYPE_8814B(padapter)) { -+#ifdef CONFIG_RTL8814B -+ /* phy_set_rf_path_switch_8814b(phydm, bMain); */ -+#endif -+ } else if (IS_HARDWARE_TYPE_8723F(padapter)) { -+#ifdef CONFIG_RTL8723F -+ phy_set_rf_path_switch_8723f(phydm, bMain); -+#endif -+ } -+} -+ -+ -+static void phy_switch_rf_path_set(PADAPTER padapter , u8 *prf_set_State) { -+#ifdef CONFIG_RTL8821C -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *p_dm = &pHalData->odmpriv; -+ -+ if (IS_HARDWARE_TYPE_8821C(padapter)) { -+ config_phydm_set_ant_path(p_dm, *prf_set_State, p_dm->current_ant_num_8821c); -+ /* Do IQK when switching to BTG/WLG, requested by RF Binson */ -+ if (*prf_set_State == SWITCH_TO_BTG || *prf_set_State == SWITCH_TO_WLG) -+ PHY_IQCalibrate(padapter, FALSE); -+ } -+#endif -+ -+} -+ -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+u8 rtw_mp_set_antdiv(PADAPTER padapter, BOOLEAN bMain) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 cur_ant, change_ant; -+ -+ if (!pHalData->AntDivCfg) -+ return _FALSE; -+ /*rtw_hal_get_odm_var(padapter, HAL_ODM_ANTDIV_SELECT, &cur_ant, NULL);*/ -+ change_ant = (bMain == MAIN_ANT) ? MAIN_ANT : AUX_ANT; -+ -+ RTW_INFO("%s: config %s\n", __func__, (bMain == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ rtw_antenna_select_cmd(padapter, change_ant, _FALSE); -+ -+ return _TRUE; -+} -+#endif -+ -+s32 -+MPT_InitializeAdapter( -+ PADAPTER pAdapter, -+ u8 Channel -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ s32 rtStatus = _SUCCESS; -+ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx; -+ u32 ledsetting; -+ -+ pMptCtx->bMptDrvUnload = _FALSE; -+ pMptCtx->bMassProdTest = _FALSE; -+ pMptCtx->bMptIndexEven = _TRUE; /* default gain index is -6.0db */ -+ pMptCtx->h2cReqNum = 0x0; -+ /* init for BT MP */ -+#if defined(CONFIG_RTL8723B) -+ pMptCtx->bMPh2c_timeout = _FALSE; -+ pMptCtx->MptH2cRspEvent = _FALSE; -+ pMptCtx->MptBtC2hEvent = _FALSE; -+ _rtw_init_sema(&pMptCtx->MPh2c_Sema, 0); -+ rtw_init_timer(&pMptCtx->MPh2c_timeout_timer, pAdapter, MPh2c_timeout_handle, pAdapter); -+#endif -+ -+ mpt_InitHWConfig(pAdapter); -+ -+#ifdef CONFIG_RTL8723B -+ rtl8723b_InitAntenna_Selection(pAdapter); -+ if (IS_HARDWARE_TYPE_8723B(pAdapter)) { -+ -+ /* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou)*/ -+ phy_set_bb_reg(pAdapter, 0xA00, BIT8, 0x0); -+ PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /*default use Main*/ -+ -+ if (pHalData->PackageType == PACKAGE_DEFAULT) -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); -+ else -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6F10E); -+ -+ } -+ /*set ant to wifi side in mp mode*/ -+ rtw_write16(pAdapter, 0x870, 0x300); -+ rtw_write16(pAdapter, 0x860, 0x110); -+#endif -+ -+ pMptCtx->bMptWorkItemInProgress = _FALSE; -+ pMptCtx->CurrMptAct = NULL; -+ pMptCtx->mpt_rf_path = RF_PATH_A; -+ /* ------------------------------------------------------------------------- */ -+ /* Don't accept any packets */ -+ rtw_write32(pAdapter, REG_RCR, 0); -+ -+ /* ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); */ -+ /* rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS); */ -+ -+ /* rtw_write32(pAdapter, REG_LEDCFG0, 0x08080); */ -+ ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); -+ -+ -+ PHY_LCCalibrate(pAdapter); -+ PHY_IQCalibrate(pAdapter, _FALSE); -+ /* dm_check_txpowertracking(&pHalData->odmpriv); */ /* trigger thermal meter */ -+ -+ PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /* default use Main */ -+ -+ pMptCtx->backup0xc50 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); -+ pMptCtx->backup0xc58 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); -+ pMptCtx->backup0xc30 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); -+ pMptCtx->backup0x52_RF_A = (u8)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); -+ pMptCtx->backup0x52_RF_B = (u8)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); -+#ifdef CONFIG_RTL8188E -+ rtw_write32(pAdapter, REG_MACID_NO_LINK_0, 0x0); -+ rtw_write32(pAdapter, REG_MACID_NO_LINK_1, 0x0); -+#endif -+#ifdef CONFIG_RTL8814A -+ if (IS_HARDWARE_TYPE_8814A(pAdapter)) { -+ pHalData->BackUp_IG_REG_4_Chnl_Section[0] = (u8)phy_query_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0); -+ pHalData->BackUp_IG_REG_4_Chnl_Section[1] = (u8)phy_query_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0); -+ pHalData->BackUp_IG_REG_4_Chnl_Section[2] = (u8)phy_query_bb_reg(pAdapter, rC_IGI_Jaguar2, bMaskByte0); -+ pHalData->BackUp_IG_REG_4_Chnl_Section[3] = (u8)phy_query_bb_reg(pAdapter, rD_IGI_Jaguar2, bMaskByte0); -+ } -+#endif -+ return rtStatus; -+} -+ -+/*----------------------------------------------------------------------------- -+ * Function: MPT_DeInitAdapter() -+ * -+ * Overview: Extra DeInitialization for Mass Production Test. -+ * -+ * Input: PADAPTER pAdapter -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 05/08/2007 MHC Create Version 0. -+ * 05/18/2007 MHC Add normal driver MPHalt code. -+ * -+ *---------------------------------------------------------------------------*/ -+void -+MPT_DeInitAdapter( -+ PADAPTER pAdapter -+) -+{ -+ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx; -+ -+ pMptCtx->bMptDrvUnload = _TRUE; -+#if defined(CONFIG_RTL8723B) -+ _rtw_free_sema(&(pMptCtx->MPh2c_Sema)); -+ _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer); -+#endif -+#if defined(CONFIG_RTL8723B) -+ phy_set_bb_reg(pAdapter, 0xA01, BIT0, 1); /* /suggestion by jerry for MP Rx. */ -+#endif -+#if 0 /* for Windows */ -+ PlatformFreeWorkItem(&(pMptCtx->MptWorkItem)); -+ -+ while (pMptCtx->bMptWorkItemInProgress) { -+ if (NdisWaitEvent(&(pMptCtx->MptWorkItemEvent), 50)) -+ break; -+ } -+ NdisFreeSpinLock(&(pMptCtx->MptWorkItemSpinLock)); -+#endif -+} -+ -+static u8 mpt_ProStartTest(PADAPTER padapter) -+{ -+ PMPT_CONTEXT pMptCtx = &padapter->mppriv.mpt_ctx; -+ -+ pMptCtx->bMassProdTest = _TRUE; -+ pMptCtx->is_start_cont_tx = _FALSE; -+ pMptCtx->bCckContTx = _FALSE; -+ pMptCtx->bOfdmContTx = _FALSE; -+ pMptCtx->bSingleCarrier = _FALSE; -+ pMptCtx->is_carrier_suppression = _FALSE; -+ pMptCtx->is_single_tone = _FALSE; -+ pMptCtx->HWTxmode = PACKETS_TX; -+ -+ return _SUCCESS; -+} -+ -+/* -+ * General use -+ */ -+s32 SetPowerTracking(PADAPTER padapter, u8 enable) -+{ -+ -+ hal_mpt_SetPowerTracking(padapter, enable); -+ return 0; -+} -+ -+void GetPowerTracking(PADAPTER padapter, u8 *enable) -+{ -+ hal_mpt_GetPowerTracking(padapter, enable); -+} -+ -+void rtw_mp_trigger_iqk(PADAPTER padapter) -+{ -+ PHY_IQCalibrate(padapter, _FALSE); -+} -+ -+void rtw_mp_trigger_lck(PADAPTER padapter) -+{ -+ PHY_LCCalibrate(padapter); -+} -+ -+void rtw_mp_trigger_dpk(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ -+ halrf_dpk_trigger(pDM_Odm); -+} -+ -+static void init_mp_data(PADAPTER padapter) -+{ -+ u8 v8; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ -+ /*disable BCN*/ -+#ifdef CONFIG_PROTSEL_PORT -+ rtw_hal_hw_port_disable(padapter); -+#else -+ v8 = rtw_read8(padapter, REG_BCN_CTRL); -+ v8 &= ~EN_BCN_FUNCTION; -+ rtw_write8(padapter, REG_BCN_CTRL, v8); -+#endif -+ -+ pDM_Odm->rf_calibrate_info.txpowertrack_control = _FALSE; -+} -+ -+ -+void MPT_PwrCtlDM(PADAPTER padapter, u32 trk_type) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ u32 rf_ability; -+ -+ padapter->mppriv.tssitrk_on = trk_type == 3; -+ -+ if (trk_type == 0) { /* thermal PwrTrk off*/ -+ struct txpwrtrack_cfg c; -+ u8 chnl = 0 ; -+ -+ RTW_INFO("in Thermal tracking off\n"); -+ rf_ability = ((u32)halrf_cmn_info_get(pDM_Odm, HALRF_CMNINFO_ABILITY)) & ~HAL_RF_TX_PWR_TRACK; -+ halrf_cmn_info_set(pDM_Odm, HALRF_CMNINFO_ABILITY, rf_ability); -+ halrf_cmn_info_set(pDM_Odm, HALRF_CMNINFO_POWER_TRACK_CONTROL, trk_type); -+ halrf_set_pwr_track(pDM_Odm, FALSE); -+ pDM_Odm->rf_calibrate_info.txpowertrack_control = trk_type; -+ if (IS_HARDWARE_TYPE_8822C(padapter)) -+ padapter->mppriv.mp_dm = 1; /* default enable dpk tracking */ -+ else -+ padapter->mppriv.mp_dm = 0; -+ -+ _rtw_memset(&c, 0, sizeof(struct txpwrtrack_cfg)); -+ configure_txpower_track(pDM_Odm, &c); -+ odm_clear_txpowertracking_state(pDM_Odm); -+ if (*c.odm_tx_pwr_track_set_pwr) { -+ if (pDM_Odm->support_ic_type == ODM_RTL8188F) -+ (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_A, chnl); -+ else if (pDM_Odm->support_ic_type == ODM_RTL8723D) { -+ (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_A, chnl); -+ SetTxPower(padapter); -+ } else if (pDM_Odm->support_ic_type == ODM_RTL8192F) { -+ (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_A, chnl); -+ (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_B, chnl); -+ } else { -+ (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_A, chnl); -+ (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_B, chnl); -+ } -+ } -+ return ; -+ } -+ -+ rf_ability = ((u32)halrf_cmn_info_get(pDM_Odm, HALRF_CMNINFO_ABILITY)) | HAL_RF_TX_PWR_TRACK; -+ halrf_cmn_info_set(pDM_Odm, HALRF_CMNINFO_ABILITY, rf_ability); -+ halrf_cmn_info_set(pDM_Odm, HALRF_CMNINFO_POWER_TRACK_CONTROL, trk_type); -+ if (trk_type == 1 || trk_type == 3) /* Thermal PwrTrk ON , TSSI PwrTrk ON */ -+ halrf_set_pwr_track(pDM_Odm, TRUE); -+ else -+ halrf_set_pwr_track(pDM_Odm, false);/* TSSI K */ -+ pDM_Odm->rf_calibrate_info.txpowertrack_control = trk_type; -+ padapter->mppriv.mp_dm = 1; -+ -+} -+ -+ -+u32 mp_join(PADAPTER padapter, u8 mode) -+{ -+ WLAN_BSSID_EX bssid; -+ struct sta_info *psta; -+ u32 length; -+ _irqL irqL; -+ s32 res = _SUCCESS; -+ -+ struct mp_priv *pmppriv = &padapter->mppriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *tgt_network = &pmlmepriv->cur_network; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); -+ -+ /* 1. initialize a new WLAN_BSSID_EX */ -+ _rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX)); -+ RTW_INFO("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x\n", __func__, -+ pmppriv->network_macaddr[0], pmppriv->network_macaddr[1], pmppriv->network_macaddr[2], pmppriv->network_macaddr[3], pmppriv->network_macaddr[4], -+ pmppriv->network_macaddr[5]); -+ _rtw_memcpy(bssid.MacAddress, pmppriv->network_macaddr, ETH_ALEN); -+ -+ if (mode == WIFI_FW_ADHOC_STATE) { -+ bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc"); -+ _rtw_memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_adhoc", bssid.Ssid.SsidLength); -+ bssid.InfrastructureMode = Ndis802_11IBSS; -+ bssid.IELength = 0; -+ bssid.Configuration.DSConfig = pmppriv->channel; -+ -+ } else if (mode == WIFI_FW_STATION_STATE) { -+ bssid.Ssid.SsidLength = strlen("mp_pseudo_STATION"); -+ _rtw_memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_STATION", bssid.Ssid.SsidLength); -+ bssid.InfrastructureMode = Ndis802_11Infrastructure; -+ bssid.IELength = 0; -+ } -+ -+ length = get_WLAN_BSSID_EX_sz(&bssid); -+ if (length % 4) -+ bssid.Length = ((length >> 2) + 1) << 2; /* round up to multiple of 4 bytes. */ -+ else -+ bssid.Length = length; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) -+ goto end_of_mp_start_test; -+ -+ /* init mp_start_test status */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ rtw_disassoc_cmd(padapter, 500, 0); -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ rtw_free_assoc_resources_cmd(padapter, _TRUE, 0); -+ } -+ pmppriv->prev_fw_state = get_fwstate(pmlmepriv); -+ /*pmlmepriv->fw_state = WIFI_MP_STATE;*/ -+ init_fwstate(pmlmepriv, WIFI_MP_STATE); -+ -+ set_fwstate(pmlmepriv, WIFI_UNDER_LINKING); -+ -+ /* 3 2. create a new psta for mp driver */ -+ /* clear psta in the cur_network, if any */ -+ psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress); -+ if (psta) -+ rtw_free_stainfo(padapter, psta); -+ -+ psta = rtw_alloc_stainfo(&padapter->stapriv, bssid.MacAddress); -+ if (psta == NULL) { -+ /*pmlmepriv->fw_state = pmppriv->prev_fw_state;*/ -+ init_fwstate(pmlmepriv, pmppriv->prev_fw_state); -+ res = _FAIL; -+ goto end_of_mp_start_test; -+ } -+ if (mode == WIFI_FW_ADHOC_STATE) -+ set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+ else -+ set_fwstate(pmlmepriv, WIFI_STATION_STATE); -+ /* 3 3. join psudo AdHoc */ -+ tgt_network->join_res = 1; -+ tgt_network->aid = psta->cmn.aid = 1; -+ -+ _rtw_memcpy(&padapter->registrypriv.dev_network, &bssid, length); -+ rtw_update_registrypriv_dev_network(padapter); -+ _rtw_memcpy(&tgt_network->network, &padapter->registrypriv.dev_network, padapter->registrypriv.dev_network.Length); -+ _rtw_memcpy(pnetwork, &padapter->registrypriv.dev_network, padapter->registrypriv.dev_network.Length); -+ -+ rtw_indicate_connect(padapter); -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ set_fwstate(pmlmepriv, WIFI_ASOC_STATE); -+ -+end_of_mp_start_test: -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ if (1) { /* (res == _SUCCESS) */ -+ /* set MSR to WIFI_FW_ADHOC_STATE */ -+ if (mode == WIFI_FW_ADHOC_STATE) { -+ /* set msr to WIFI_FW_ADHOC_STATE */ -+ pmlmeinfo->state = WIFI_FW_ADHOC_STATE; -+ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); -+ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress); -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED); -+ pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; -+ } else { -+ Set_MSR(padapter, WIFI_FW_STATION_STATE); -+ -+ RTW_INFO("%s , pmppriv->network_macaddr =%x %x %x %x %x %x\n", __func__, -+ pmppriv->network_macaddr[0], pmppriv->network_macaddr[1], pmppriv->network_macaddr[2], pmppriv->network_macaddr[3], pmppriv->network_macaddr[4], -+ pmppriv->network_macaddr[5]); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmppriv->network_macaddr); -+ } -+ } -+ -+ return res; -+} -+/* This function initializes the DUT to the MP test mode */ -+s32 mp_start_test(PADAPTER padapter) -+{ -+ struct mp_priv *pmppriv = &padapter->mppriv; -+#ifdef CONFIG_PCI_HCI -+ PHAL_DATA_TYPE hal; -+#endif -+ s32 res = _SUCCESS; -+ -+ padapter->registrypriv.mp_mode = 1; -+ -+ init_mp_data(padapter); -+#ifdef CONFIG_RTL8814A -+ rtl8814_InitHalDm(padapter); -+#endif /* CONFIG_RTL8814A */ -+#ifdef CONFIG_RTL8812A -+ rtl8812_InitHalDm(padapter); -+#endif /* CONFIG_RTL8812A */ -+#ifdef CONFIG_RTL8723B -+ rtl8723b_InitHalDm(padapter); -+#endif /* CONFIG_RTL8723B */ -+#ifdef CONFIG_RTL8703B -+ rtl8703b_InitHalDm(padapter); -+#endif /* CONFIG_RTL8703B */ -+#ifdef CONFIG_RTL8192E -+ rtl8192e_InitHalDm(padapter); -+#endif -+#ifdef CONFIG_RTL8188F -+ rtl8188f_InitHalDm(padapter); -+#endif -+#ifdef CONFIG_RTL8188GTV -+ rtl8188gtv_InitHalDm(padapter); -+#endif -+#ifdef CONFIG_RTL8188E -+ rtl8188e_InitHalDm(padapter); -+#endif -+#ifdef CONFIG_RTL8723D -+ rtl8723d_InitHalDm(padapter); -+#endif /* CONFIG_RTL8723D */ -+ -+#ifdef CONFIG_PCI_HCI -+ hal = GET_HAL_DATA(padapter); -+ hal->pci_backdoor_ctrl = 0; -+ rtw_pci_aspm_config(padapter); -+#endif -+ -+ -+ /* 3 0. update mp_priv */ -+ switch (GET_HAL_RFPATH(padapter)) { -+ case RF_1T1R: -+ pmppriv->antenna_tx = ANTENNA_A; -+ pmppriv->antenna_rx = ANTENNA_A; -+ break; -+ case RF_1T2R: -+ default: -+ pmppriv->antenna_tx = ANTENNA_A; -+ pmppriv->antenna_rx = ANTENNA_AB; -+ break; -+ case RF_2T2R: -+ pmppriv->antenna_tx = ANTENNA_AB; -+ pmppriv->antenna_rx = ANTENNA_AB; -+ break; -+ case RF_2T4R: -+ pmppriv->antenna_tx = ANTENNA_AB; -+ pmppriv->antenna_rx = ANTENNA_ABCD; -+ break; -+ } -+ -+ mpt_ProStartTest(padapter); -+ -+ mp_join(padapter, WIFI_FW_ADHOC_STATE); -+ -+ return res; -+} -+/* ------------------------------------------------------------------------------ -+ * This function change the DUT from the MP test mode into normal mode */ -+void mp_stop_test(PADAPTER padapter) -+{ -+ struct mp_priv *pmppriv = &padapter->mppriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *tgt_network = &pmlmepriv->cur_network; -+ struct sta_info *psta; -+#ifdef CONFIG_PCI_HCI -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ PHAL_DATA_TYPE hal; -+#endif -+ -+ _irqL irqL; -+ -+ if (pmppriv->mode == MP_ON) { -+ pmppriv->bSetTxPower = 0; -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE) -+ goto end_of_mp_stop_test; -+ -+ /* 3 1. disconnect psudo AdHoc */ -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ -+ /* 3 2. clear psta used in mp test mode. -+ * rtw_free_assoc_resources(padapter, _TRUE); */ -+ psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress); -+ if (psta) -+ rtw_free_stainfo(padapter, psta); -+ -+ /* 3 3. return to normal state (default:station mode) */ -+ /*pmlmepriv->fw_state = pmppriv->prev_fw_state; */ /* WIFI_STATION_STATE;*/ -+ init_fwstate(pmlmepriv, pmppriv->prev_fw_state); -+ -+ /* flush the cur_network */ -+ _rtw_memset(tgt_network, 0, sizeof(struct wlan_network)); -+ -+ _clr_fwstate_(pmlmepriv, WIFI_MP_STATE); -+ -+end_of_mp_stop_test: -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+#ifdef CONFIG_PCI_HCI -+ hal = GET_HAL_DATA(padapter); -+ hal->pci_backdoor_ctrl = registry_par->pci_aspm_config; -+ rtw_pci_aspm_config(padapter); -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ rtl8812_InitHalDm(padapter); -+#endif -+#ifdef CONFIG_RTL8723B -+ rtl8723b_InitHalDm(padapter); -+#endif -+#ifdef CONFIG_RTL8703B -+ rtl8703b_InitHalDm(padapter); -+#endif -+#ifdef CONFIG_RTL8192E -+ rtl8192e_InitHalDm(padapter); -+#endif -+#ifdef CONFIG_RTL8188F -+ rtl8188f_InitHalDm(padapter); -+#endif -+#ifdef CONFIG_RTL8188GTV -+ rtl8188gtv_InitHalDm(padapter); -+#endif -+#ifdef CONFIG_RTL8723D -+ rtl8723d_InitHalDm(padapter); -+#endif -+ } -+} -+/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ -+#if 0 -+/* #ifdef CONFIG_USB_HCI */ -+static void mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Channel, u8 BandWidthID) -+{ -+ u8 eRFPath; -+ u32 rfReg0x26; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter); -+ -+ -+ if (RateIdx < MPT_RATE_6M) /* CCK rate,for 88cu */ -+ rfReg0x26 = 0xf400; -+ else if ((RateIdx >= MPT_RATE_6M) && (RateIdx <= MPT_RATE_54M)) {/* OFDM rate,for 88cu */ -+ if ((4 == Channel) || (8 == Channel) || (12 == Channel)) -+ rfReg0x26 = 0xf000; -+ else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel)) -+ rfReg0x26 = 0xf400; -+ else -+ rfReg0x26 = 0x4f200; -+ } else if ((RateIdx >= MPT_RATE_MCS0) && (RateIdx <= MPT_RATE_MCS15)) { -+ /* MCS 20M ,for 88cu */ /* MCS40M rate,for 88cu */ -+ -+ if (CHANNEL_WIDTH_20 == BandWidthID) { -+ if ((4 == Channel) || (8 == Channel)) -+ rfReg0x26 = 0xf000; -+ else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel)) -+ rfReg0x26 = 0xf400; -+ else -+ rfReg0x26 = 0x4f200; -+ } else { -+ if ((4 == Channel) || (8 == Channel)) -+ rfReg0x26 = 0xf000; -+ else if ((5 == Channel) || (7 == Channel)) -+ rfReg0x26 = 0xf400; -+ else -+ rfReg0x26 = 0x4f200; -+ } -+ } -+ -+ for (eRFPath = 0; eRFPath < hal_spec->rf_reg_path_num; eRFPath++) -+ write_rfreg(pAdapter, eRFPath, RF_SYN_G2, rfReg0x26); -+} -+#endif -+/*----------------------------------------------------------------------------- -+ * Function: mpt_SwitchRfSetting -+ * -+ * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. -+ * -+ * Input: PADAPTER pAdapter -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. -+ * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. -+ * -+ *---------------------------------------------------------------------------*/ -+#if 0 -+static void mpt_SwitchRfSetting(PADAPTER pAdapter) -+{ -+ hal_mpt_SwitchRfSetting(pAdapter); -+} -+ -+/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ -+/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ -+static void MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) -+{ -+ hal_mpt_CCKTxPowerAdjust(Adapter, bInCH14); -+} -+#endif -+ -+/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ -+ -+/* -+ * SetChannel -+ * Description -+ * Use H2C command to change channel, -+ * not only modify rf register, but also other setting need to be done. -+ */ -+void SetChannel(PADAPTER pAdapter) -+{ -+ hal_mpt_SetChannel(pAdapter); -+} -+ -+/* -+ * Notice -+ * Switch bandwitdth may change center frequency(channel) -+ */ -+void SetBandwidth(PADAPTER pAdapter) -+{ -+ hal_mpt_SetBandwidth(pAdapter); -+ -+} -+ -+void SetAntenna(PADAPTER pAdapter) -+{ -+ hal_mpt_SetAntenna(pAdapter); -+} -+ -+int SetTxPower(PADAPTER pAdapter) -+{ -+ -+ hal_mpt_SetTxPower(pAdapter); -+ return _TRUE; -+} -+ -+void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) -+{ -+ u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D, tmpAGC; -+ -+ TxAGCOffset_B = (ulTxAGCOffset & 0x000000ff); -+ TxAGCOffset_C = ((ulTxAGCOffset & 0x0000ff00) >> 8); -+ TxAGCOffset_D = ((ulTxAGCOffset & 0x00ff0000) >> 16); -+ -+ tmpAGC = (TxAGCOffset_D << 8 | TxAGCOffset_C << 4 | TxAGCOffset_B); -+ write_bbreg(pAdapter, rFPGA0_TxGainStage, -+ (bXBTxAGC | bXCTxAGC | bXDTxAGC), tmpAGC); -+} -+ -+void SetDataRate(PADAPTER pAdapter) -+{ -+ hal_mpt_SetDataRate(pAdapter); -+} -+ -+void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter , BOOLEAN bMain) -+{ -+ -+ PHY_SetRFPathSwitch(pAdapter, bMain); -+ -+} -+ -+void mp_phy_switch_rf_path_set(PADAPTER pAdapter , u8 *pstate) -+{ -+ -+ phy_switch_rf_path_set(pAdapter, pstate); -+ -+} -+ -+u8 MP_PHY_QueryRFPathSwitch(PADAPTER pAdapter) -+{ -+ return PHY_QueryRFPathSwitch(pAdapter); -+} -+ -+s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther) -+{ -+ return hal_mpt_SetThermalMeter(pAdapter, target_ther); -+} -+ -+#if 0 -+static void TriggerRFThermalMeter(PADAPTER pAdapter) -+{ -+ hal_mpt_TriggerRFThermalMeter(pAdapter); -+} -+ -+static u8 ReadRFThermalMeter(PADAPTER pAdapter) -+{ -+ return hal_mpt_ReadRFThermalMeter(pAdapter); -+} -+#endif -+ -+void GetThermalMeter(PADAPTER pAdapter, u8 rfpath ,u8 *value) -+{ -+ hal_mpt_GetThermalMeter(pAdapter, rfpath, value); -+} -+ -+void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) -+{ -+ PhySetTxPowerLevel(pAdapter); -+ hal_mpt_SetSingleCarrierTx(pAdapter, bStart); -+} -+ -+void SetSingleToneTx(PADAPTER pAdapter, u8 bStart) -+{ -+ PhySetTxPowerLevel(pAdapter); -+ hal_mpt_SetSingleToneTx(pAdapter, bStart); -+} -+ -+void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) -+{ -+ PhySetTxPowerLevel(pAdapter); -+ hal_mpt_SetCarrierSuppressionTx(pAdapter, bStart); -+} -+ -+void SetContinuousTx(PADAPTER pAdapter, u8 bStart) -+{ -+ PhySetTxPowerLevel(pAdapter); -+ hal_mpt_SetContinuousTx(pAdapter, bStart); -+} -+ -+ -+void PhySetTxPowerLevel(PADAPTER pAdapter) -+{ -+ struct mp_priv *pmp_priv = &pAdapter->mppriv; -+ -+ -+ if (pmp_priv->bSetTxPower == 0) /* for NO manually set power index */ -+ rtw_hal_set_tx_power_level(pAdapter, pmp_priv->channel); -+} -+ -+/* ------------------------------------------------------------------------------ */ -+static void dump_mpframe(PADAPTER padapter, struct xmit_frame *pmpframe) -+{ -+ rtw_hal_mgnt_xmit(padapter, pmpframe); -+} -+ -+static struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv) -+{ -+ struct xmit_frame *pmpframe; -+ struct xmit_buf *pxmitbuf; -+ -+ pmpframe = rtw_alloc_xmitframe(pxmitpriv, 0); -+ if (pmpframe == NULL) -+ return NULL; -+ -+ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); -+ if (pxmitbuf == NULL) { -+ rtw_free_xmitframe(pxmitpriv, pmpframe); -+ return NULL; -+ } -+ -+ pmpframe->frame_tag = MP_FRAMETAG; -+ -+ pmpframe->pxmitbuf = pxmitbuf; -+ -+ pmpframe->buf_addr = pxmitbuf->pbuf; -+ -+ pxmitbuf->priv_data = pmpframe; -+ -+ return pmpframe; -+ -+} -+ -+#ifdef CONFIG_PCI_HCI -+static u8 check_nic_enough_desc(_adapter *padapter, struct pkt_attrib *pattrib) -+{ -+ u32 prio; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct rtw_tx_ring *ring; -+ -+ switch (pattrib->qsel) { -+ case 0: -+ case 3: -+ prio = BE_QUEUE_INX; -+ break; -+ case 1: -+ case 2: -+ prio = BK_QUEUE_INX; -+ break; -+ case 4: -+ case 5: -+ prio = VI_QUEUE_INX; -+ break; -+ case 6: -+ case 7: -+ prio = VO_QUEUE_INX; -+ break; -+ default: -+ prio = BE_QUEUE_INX; -+ break; -+ } -+ -+ ring = &pxmitpriv->tx_ring[prio]; -+ -+ /* -+ * for now we reserve two free descriptor as a safety boundary -+ * between the tail and the head -+ */ -+ if ((ring->entries - ring->qlen) >= 2) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+#endif -+ -+static thread_return mp_xmit_packet_thread(thread_context context) -+{ -+ struct xmit_frame *pxmitframe; -+ struct mp_tx *pmptx; -+ struct mp_priv *pmp_priv; -+ struct xmit_priv *pxmitpriv; -+ PADAPTER padapter; -+ -+ pmp_priv = (struct mp_priv *)context; -+ pmptx = &pmp_priv->tx; -+ padapter = pmp_priv->papdater; -+ pxmitpriv = &(padapter->xmitpriv); -+ -+ thread_enter("RTW_MP_THREAD"); -+ -+ RTW_INFO("%s:pkTx Start\n", __func__); -+ while (1) { -+ pxmitframe = alloc_mp_xmitframe(pxmitpriv); -+#ifdef CONFIG_PCI_HCI -+ if(check_nic_enough_desc(padapter, &pmptx->attrib) == _FALSE) { -+ rtw_usleep_os(1000); -+ continue; -+ } -+#endif -+ if (pxmitframe == NULL) { -+ if (pmptx->stop || -+ RTW_CANNOT_RUN(padapter)) -+ goto exit; -+ else { -+ rtw_usleep_os(10); -+ continue; -+ } -+ } -+ _rtw_memcpy((u8 *)(pxmitframe->buf_addr + TXDESC_OFFSET), pmptx->buf, pmptx->write_size); -+ _rtw_memcpy(&(pxmitframe->attrib), &(pmptx->attrib), sizeof(struct pkt_attrib)); -+ -+ -+ rtw_usleep_os(padapter->mppriv.pktInterval); -+ dump_mpframe(padapter, pxmitframe); -+ -+ pmptx->sended++; -+ pmp_priv->tx_pktcount++; -+ -+ if (pmptx->stop || -+ RTW_CANNOT_RUN(padapter)) -+ goto exit; -+ if ((pmptx->count != 0) && -+ (pmptx->count == pmptx->sended)) -+ goto exit; -+ -+ flush_signals_thread(); -+ } -+ -+exit: -+ /* RTW_INFO("%s:pkTx Exit\n", __func__); */ -+ rtw_mfree(pmptx->pallocated_buf, pmptx->buf_size); -+ pmptx->pallocated_buf = NULL; -+ pmptx->stop = 1; -+ -+ thread_exit(NULL); -+ return 0; -+} -+ -+void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ _rtw_memcpy(ptxdesc, pmp_priv->tx.desc, TXDESC_SIZE); -+} -+ -+#if defined(CONFIG_RTL8188E) -+void fill_tx_desc_8188e(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ struct tx_desc *desc = (struct tx_desc *)&(pmp_priv->tx.desc); -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ u32 pkt_size = pattrib->last_txcmdsz; -+ s32 bmcast = IS_MCAST(pattrib->ra); -+ /* offset 0 */ -+#if !defined(CONFIG_RTL8188E_SDIO) && !defined(CONFIG_PCI_HCI) -+ desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); -+ desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); /* packet size */ -+ desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); /* 32 bytes for TX Desc */ -+ if (bmcast) -+ desc->txdw0 |= cpu_to_le32(BMC); /* broadcast packet */ -+ -+ desc->txdw1 |= cpu_to_le32((0x01 << 26) & 0xff000000); -+#endif -+ -+ desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x3F); /* CAM_ID(MAC_ID) */ -+ desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); /* Queue Select, TID */ -+ desc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000); /* Rate Adaptive ID */ -+ /* offset 8 */ -+ /* desc->txdw2 |= cpu_to_le32(AGG_BK); */ /* AGG BK */ -+ -+ desc->txdw3 |= cpu_to_le32((pattrib->seqnum << 16) & 0x0fff0000); -+ desc->txdw4 |= cpu_to_le32(HW_SSN); -+ -+ desc->txdw4 |= cpu_to_le32(USERATE); -+ desc->txdw4 |= cpu_to_le32(DISDATAFB); -+ -+ if (pmp_priv->preamble) { -+ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) -+ desc->txdw4 |= cpu_to_le32(DATA_SHORT); /* CCK Short Preamble */ -+ } -+ -+ if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) -+ desc->txdw4 |= cpu_to_le32(DATA_BW); -+ -+ /* offset 20 */ -+ desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F); -+ -+ if (pmp_priv->preamble) { -+ if (HwRateToMPTRate(pmp_priv->rateidx) > MPT_RATE_54M) -+ desc->txdw5 |= cpu_to_le32(SGI); /* MCS Short Guard Interval */ -+ } -+ -+ desc->txdw5 |= cpu_to_le32(RTY_LMT_EN); /* retry limit enable */ -+ desc->txdw5 |= cpu_to_le32(0x00180000); /* DATA/RTS Rate Fallback Limit */ -+ -+ -+} -+#endif -+ -+#if defined(CONFIG_RTL8814A) -+void fill_tx_desc_8814a(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ u8 *pDesc = (u8 *)&(pmp_priv->tx.desc); -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ -+ u32 pkt_size = pattrib->last_txcmdsz; -+ s32 bmcast = IS_MCAST(pattrib->ra); -+ u8 offset; -+ -+ /* SET_TX_DESC_FIRST_SEG_8814A(pDesc, 1); */ -+ SET_TX_DESC_LAST_SEG_8814A(pDesc, 1); -+ /* SET_TX_DESC_OWN_(pDesc, 1); */ -+ -+ SET_TX_DESC_PKT_SIZE_8814A(pDesc, pkt_size); -+ -+ offset = TXDESC_SIZE + OFFSET_SZ; -+ -+ SET_TX_DESC_OFFSET_8814A(pDesc, offset); -+#if defined(CONFIG_PCI_HCI) -+ SET_TX_DESC_PKT_OFFSET_8814A(pDesc, 0); /* 8814AE pkt_offset is 0 */ -+#else -+ SET_TX_DESC_PKT_OFFSET_8814A(pDesc, 1); -+#endif -+ -+ if (bmcast) -+ SET_TX_DESC_BMC_8814A(pDesc, 1); -+ -+ SET_TX_DESC_MACID_8814A(pDesc, pattrib->mac_id); -+ SET_TX_DESC_RATE_ID_8814A(pDesc, pattrib->raid); -+ -+ /* SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_G); */ -+ SET_TX_DESC_QUEUE_SEL_8814A(pDesc, pattrib->qsel); -+ /* SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT); */ -+ -+ if (pmp_priv->preamble) -+ SET_TX_DESC_DATA_SHORT_8814A(pDesc, 1); -+ -+ if (!pattrib->qos_en) { -+ SET_TX_DESC_HWSEQ_EN_8814A(pDesc, 1); /* Hw set sequence number */ -+ } else -+ SET_TX_DESC_SEQ_8814A(pDesc, pattrib->seqnum); -+ -+ if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160) -+ SET_TX_DESC_DATA_BW_8814A(pDesc, pmp_priv->bandwidth); -+ else { -+ RTW_INFO("%s:Err: unknown bandwidth %d, use 20M\n", __func__, pmp_priv->bandwidth); -+ SET_TX_DESC_DATA_BW_8814A(pDesc, CHANNEL_WIDTH_20); -+ } -+ -+ SET_TX_DESC_DISABLE_FB_8814A(pDesc, 1); -+ SET_TX_DESC_USE_RATE_8814A(pDesc, 1); -+ SET_TX_DESC_TX_RATE_8814A(pDesc, pmp_priv->rateidx); -+ -+} -+#endif -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+void fill_tx_desc_8812a(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ u8 *pDesc = (u8 *)&(pmp_priv->tx.desc); -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ -+ u32 pkt_size = pattrib->last_txcmdsz; -+ s32 bmcast = IS_MCAST(pattrib->ra); -+ u8 data_rate, pwr_status, offset; -+ -+ SET_TX_DESC_FIRST_SEG_8812(pDesc, 1); -+ SET_TX_DESC_LAST_SEG_8812(pDesc, 1); -+ SET_TX_DESC_OWN_8812(pDesc, 1); -+ -+ SET_TX_DESC_PKT_SIZE_8812(pDesc, pkt_size); -+ -+ offset = TXDESC_SIZE + OFFSET_SZ; -+ -+ SET_TX_DESC_OFFSET_8812(pDesc, offset); -+ -+#if defined(CONFIG_PCI_HCI) -+ SET_TX_DESC_PKT_OFFSET_8812(pDesc, 0); -+#else -+ SET_TX_DESC_PKT_OFFSET_8812(pDesc, 1); -+#endif -+ if (bmcast) -+ SET_TX_DESC_BMC_8812(pDesc, 1); -+ -+ SET_TX_DESC_MACID_8812(pDesc, pattrib->mac_id); -+ SET_TX_DESC_RATE_ID_8812(pDesc, pattrib->raid); -+ -+ /* SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_G); */ -+ SET_TX_DESC_QUEUE_SEL_8812(pDesc, pattrib->qsel); -+ /* SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT); */ -+ -+ if (!pattrib->qos_en) { -+ SET_TX_DESC_HWSEQ_EN_8812(pDesc, 1); /* Hw set sequence number */ -+ } else -+ SET_TX_DESC_SEQ_8812(pDesc, pattrib->seqnum); -+ -+ if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160) -+ SET_TX_DESC_DATA_BW_8812(pDesc, pmp_priv->bandwidth); -+ else { -+ RTW_INFO("%s:Err: unknown bandwidth %d, use 20M\n", __func__, pmp_priv->bandwidth); -+ SET_TX_DESC_DATA_BW_8812(pDesc, CHANNEL_WIDTH_20); -+ } -+ -+ SET_TX_DESC_DISABLE_FB_8812(pDesc, 1); -+ SET_TX_DESC_USE_RATE_8812(pDesc, 1); -+ SET_TX_DESC_TX_RATE_8812(pDesc, pmp_priv->rateidx); -+ -+} -+#endif -+#if defined(CONFIG_RTL8192E) -+void fill_tx_desc_8192e(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ u8 *pDesc = (u8 *)&(pmp_priv->tx.desc); -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ -+ u32 pkt_size = pattrib->last_txcmdsz; -+ s32 bmcast = IS_MCAST(pattrib->ra); -+ u8 data_rate, pwr_status, offset; -+ -+ -+ SET_TX_DESC_PKT_SIZE_92E(pDesc, pkt_size); -+ -+ offset = TXDESC_SIZE + OFFSET_SZ; -+ -+ SET_TX_DESC_OFFSET_92E(pDesc, offset); -+#if defined(CONFIG_PCI_HCI) /* 8192EE */ -+ -+ SET_TX_DESC_PKT_OFFSET_92E(pDesc, 0); /* 8192EE pkt_offset is 0 */ -+#else /* 8192EU 8192ES */ -+ SET_TX_DESC_PKT_OFFSET_92E(pDesc, 1); -+#endif -+ -+ if (bmcast) -+ SET_TX_DESC_BMC_92E(pDesc, 1); -+ -+ SET_TX_DESC_MACID_92E(pDesc, pattrib->mac_id); -+ SET_TX_DESC_RATE_ID_92E(pDesc, pattrib->raid); -+ -+ -+ SET_TX_DESC_QUEUE_SEL_92E(pDesc, pattrib->qsel); -+ /* SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT); */ -+ -+ if (!pattrib->qos_en) { -+ SET_TX_DESC_EN_HWSEQ_92E(pDesc, 1);/* Hw set sequence number */ -+ SET_TX_DESC_HWSEQ_SEL_92E(pDesc, pattrib->hw_ssn_sel); -+ } else -+ SET_TX_DESC_SEQ_92E(pDesc, pattrib->seqnum); -+ -+ if ((pmp_priv->bandwidth == CHANNEL_WIDTH_20) || (pmp_priv->bandwidth == CHANNEL_WIDTH_40)) -+ SET_TX_DESC_DATA_BW_92E(pDesc, pmp_priv->bandwidth); -+ else { -+ RTW_INFO("%s:Err: unknown bandwidth %d, use 20M\n", __func__, pmp_priv->bandwidth); -+ SET_TX_DESC_DATA_BW_92E(pDesc, CHANNEL_WIDTH_20); -+ } -+ -+ /* SET_TX_DESC_DATA_SC_92E(pDesc, SCMapping_92E(padapter,pattrib)); */ -+ -+ SET_TX_DESC_DISABLE_FB_92E(pDesc, 1); -+ SET_TX_DESC_USE_RATE_92E(pDesc, 1); -+ SET_TX_DESC_TX_RATE_92E(pDesc, pmp_priv->rateidx); -+ -+} -+#endif -+ -+#if defined(CONFIG_RTL8723B) -+void fill_tx_desc_8723b(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ u8 *ptxdesc = pmp_priv->tx.desc; -+ -+ SET_TX_DESC_AGG_BREAK_8723B(ptxdesc, 1); -+ SET_TX_DESC_MACID_8723B(ptxdesc, pattrib->mac_id); -+ SET_TX_DESC_QUEUE_SEL_8723B(ptxdesc, pattrib->qsel); -+ -+ SET_TX_DESC_RATE_ID_8723B(ptxdesc, pattrib->raid); -+ SET_TX_DESC_SEQ_8723B(ptxdesc, pattrib->seqnum); -+ SET_TX_DESC_HWSEQ_EN_8723B(ptxdesc, 1); -+ SET_TX_DESC_USE_RATE_8723B(ptxdesc, 1); -+ SET_TX_DESC_DISABLE_FB_8723B(ptxdesc, 1); -+ -+ if (pmp_priv->preamble) { -+ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) -+ SET_TX_DESC_DATA_SHORT_8723B(ptxdesc, 1); -+ } -+ -+ if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) -+ SET_TX_DESC_DATA_BW_8723B(ptxdesc, 1); -+ -+ SET_TX_DESC_TX_RATE_8723B(ptxdesc, pmp_priv->rateidx); -+ -+ SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(ptxdesc, 0x1F); -+ SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(ptxdesc, 0xF); -+} -+#endif -+ -+#if defined(CONFIG_RTL8703B) -+void fill_tx_desc_8703b(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ u8 *ptxdesc = pmp_priv->tx.desc; -+ -+ SET_TX_DESC_AGG_BREAK_8703B(ptxdesc, 1); -+ SET_TX_DESC_MACID_8703B(ptxdesc, pattrib->mac_id); -+ SET_TX_DESC_QUEUE_SEL_8703B(ptxdesc, pattrib->qsel); -+ -+ SET_TX_DESC_RATE_ID_8703B(ptxdesc, pattrib->raid); -+ SET_TX_DESC_SEQ_8703B(ptxdesc, pattrib->seqnum); -+ SET_TX_DESC_HWSEQ_EN_8703B(ptxdesc, 1); -+ SET_TX_DESC_USE_RATE_8703B(ptxdesc, 1); -+ SET_TX_DESC_DISABLE_FB_8703B(ptxdesc, 1); -+ -+ if (pmp_priv->preamble) { -+ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) -+ SET_TX_DESC_DATA_SHORT_8703B(ptxdesc, 1); -+ } -+ -+ if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) -+ SET_TX_DESC_DATA_BW_8703B(ptxdesc, 1); -+ -+ SET_TX_DESC_TX_RATE_8703B(ptxdesc, pmp_priv->rateidx); -+ -+ SET_TX_DESC_DATA_RATE_FB_LIMIT_8703B(ptxdesc, 0x1F); -+ SET_TX_DESC_RTS_RATE_FB_LIMIT_8703B(ptxdesc, 0xF); -+} -+#endif -+ -+#if defined(CONFIG_RTL8188F) -+void fill_tx_desc_8188f(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ u8 *ptxdesc = pmp_priv->tx.desc; -+ -+ SET_TX_DESC_AGG_BREAK_8188F(ptxdesc, 1); -+ SET_TX_DESC_MACID_8188F(ptxdesc, pattrib->mac_id); -+ SET_TX_DESC_QUEUE_SEL_8188F(ptxdesc, pattrib->qsel); -+ -+ SET_TX_DESC_RATE_ID_8188F(ptxdesc, pattrib->raid); -+ SET_TX_DESC_SEQ_8188F(ptxdesc, pattrib->seqnum); -+ SET_TX_DESC_HWSEQ_EN_8188F(ptxdesc, 1); -+ SET_TX_DESC_USE_RATE_8188F(ptxdesc, 1); -+ SET_TX_DESC_DISABLE_FB_8188F(ptxdesc, 1); -+ -+ if (pmp_priv->preamble) -+ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) -+ SET_TX_DESC_DATA_SHORT_8188F(ptxdesc, 1); -+ -+ if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) -+ SET_TX_DESC_DATA_BW_8188F(ptxdesc, 1); -+ -+ SET_TX_DESC_TX_RATE_8188F(ptxdesc, pmp_priv->rateidx); -+ -+ SET_TX_DESC_DATA_RATE_FB_LIMIT_8188F(ptxdesc, 0x1F); -+ SET_TX_DESC_RTS_RATE_FB_LIMIT_8188F(ptxdesc, 0xF); -+} -+#endif -+ -+#if defined(CONFIG_RTL8188GTV) -+void fill_tx_desc_8188gtv(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ u8 *ptxdesc = pmp_priv->tx.desc; -+ -+ SET_TX_DESC_AGG_BREAK_8188GTV(ptxdesc, 1); -+ SET_TX_DESC_MACID_8188GTV(ptxdesc, pattrib->mac_id); -+ SET_TX_DESC_QUEUE_SEL_8188GTV(ptxdesc, pattrib->qsel); -+ -+ SET_TX_DESC_RATE_ID_8188GTV(ptxdesc, pattrib->raid); -+ SET_TX_DESC_SEQ_8188GTV(ptxdesc, pattrib->seqnum); -+ SET_TX_DESC_HWSEQ_EN_8188GTV(ptxdesc, 1); -+ SET_TX_DESC_USE_RATE_8188GTV(ptxdesc, 1); -+ SET_TX_DESC_DISABLE_FB_8188GTV(ptxdesc, 1); -+ -+ if (pmp_priv->preamble) -+ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) -+ SET_TX_DESC_DATA_SHORT_8188GTV(ptxdesc, 1); -+ -+ if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) -+ SET_TX_DESC_DATA_BW_8188GTV(ptxdesc, 1); -+ -+ SET_TX_DESC_TX_RATE_8188GTV(ptxdesc, pmp_priv->rateidx); -+ -+ SET_TX_DESC_DATA_RATE_FB_LIMIT_8188GTV(ptxdesc, 0x1F); -+ SET_TX_DESC_RTS_RATE_FB_LIMIT_8188GTV(ptxdesc, 0xF); -+} -+#endif -+ -+#if defined(CONFIG_RTL8723D) -+void fill_tx_desc_8723d(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ u8 *ptxdesc = pmp_priv->tx.desc; -+ -+ SET_TX_DESC_BK_8723D(ptxdesc, 1); -+ SET_TX_DESC_MACID_8723D(ptxdesc, pattrib->mac_id); -+ SET_TX_DESC_QUEUE_SEL_8723D(ptxdesc, pattrib->qsel); -+ -+ SET_TX_DESC_RATE_ID_8723D(ptxdesc, pattrib->raid); -+ SET_TX_DESC_SEQ_8723D(ptxdesc, pattrib->seqnum); -+ SET_TX_DESC_HWSEQ_EN_8723D(ptxdesc, 1); -+ SET_TX_DESC_USE_RATE_8723D(ptxdesc, 1); -+ SET_TX_DESC_DISABLE_FB_8723D(ptxdesc, 1); -+ -+ if (pmp_priv->preamble) { -+ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) -+ SET_TX_DESC_DATA_SHORT_8723D(ptxdesc, 1); -+ } -+ -+ if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) -+ SET_TX_DESC_DATA_BW_8723D(ptxdesc, 1); -+ -+ SET_TX_DESC_TX_RATE_8723D(ptxdesc, pmp_priv->rateidx); -+ -+ SET_TX_DESC_DATA_RATE_FB_LIMIT_8723D(ptxdesc, 0x1F); -+ SET_TX_DESC_RTS_RATE_FB_LIMIT_8723D(ptxdesc, 0xF); -+} -+#endif -+ -+#if defined(CONFIG_RTL8710B) -+void fill_tx_desc_8710b(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ u8 *ptxdesc = pmp_priv->tx.desc; -+ -+ SET_TX_DESC_BK_8710B(ptxdesc, 1); -+ SET_TX_DESC_MACID_8710B(ptxdesc, pattrib->mac_id); -+ SET_TX_DESC_QUEUE_SEL_8710B(ptxdesc, pattrib->qsel); -+ -+ SET_TX_DESC_RATE_ID_8710B(ptxdesc, pattrib->raid); -+ SET_TX_DESC_SEQ_8710B(ptxdesc, pattrib->seqnum); -+ SET_TX_DESC_HWSEQ_EN_8710B(ptxdesc, 1); -+ SET_TX_DESC_USE_RATE_8710B(ptxdesc, 1); -+ SET_TX_DESC_DISABLE_FB_8710B(ptxdesc, 1); -+ -+ if (pmp_priv->preamble) { -+ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) -+ SET_TX_DESC_DATA_SHORT_8710B(ptxdesc, 1); -+ } -+ -+ if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) -+ SET_TX_DESC_DATA_BW_8710B(ptxdesc, 1); -+ -+ SET_TX_DESC_TX_RATE_8710B(ptxdesc, pmp_priv->rateidx); -+ -+ SET_TX_DESC_DATA_RATE_FB_LIMIT_8710B(ptxdesc, 0x1F); -+ SET_TX_DESC_RTS_RATE_FB_LIMIT_8710B(ptxdesc, 0xF); -+} -+#endif -+ -+#if defined(CONFIG_RTL8192F) -+void fill_tx_desc_8192f(PADAPTER padapter) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); -+ u8 *ptxdesc = pmp_priv->tx.desc; -+ -+ SET_TX_DESC_BK_8192F(ptxdesc, 1); -+ SET_TX_DESC_MACID_8192F(ptxdesc, pattrib->mac_id); -+ SET_TX_DESC_QUEUE_SEL_8192F(ptxdesc, pattrib->qsel); -+ -+ SET_TX_DESC_RATE_ID_8192F(ptxdesc, pattrib->raid); -+ SET_TX_DESC_SEQ_8192F(ptxdesc, pattrib->seqnum); -+ SET_TX_DESC_HWSEQ_EN_8192F(ptxdesc, 1); -+ SET_TX_DESC_USE_RATE_8192F(ptxdesc, 1); -+ SET_TX_DESC_DISABLE_FB_8192F(ptxdesc, 1); -+ -+ if (pmp_priv->preamble) { -+ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M) -+ SET_TX_DESC_DATA_SHORT_8192F(ptxdesc, 1); -+ } -+ -+ if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) -+ SET_TX_DESC_DATA_BW_8192F(ptxdesc, 1); -+ -+ SET_TX_DESC_TX_RATE_8192F(ptxdesc, pmp_priv->rateidx); -+ -+ SET_TX_DESC_DATA_RATE_FB_LIMIT_8192F(ptxdesc, 0x1F); -+ SET_TX_DESC_RTS_RATE_FB_LIMIT_8192F(ptxdesc, 0xF); -+} -+ -+#endif -+static void Rtw_MPSetMacTxEDCA(PADAPTER padapter) -+{ -+ -+ rtw_write32(padapter, 0x508 , 0x00a422); /* Disable EDCA BE Txop for MP pkt tx adjust Packet interval */ -+ /* RTW_INFO("%s:write 0x508~~~~~~ 0x%x\n", __func__,rtw_read32(padapter, 0x508)); */ -+ phy_set_mac_reg(padapter, 0x458 , bMaskDWord , 0x0); -+ /*RTW_INFO("%s()!!!!! 0x460 = 0x%x\n" ,__func__, phy_query_bb_reg(padapter, 0x460, bMaskDWord));*/ -+ phy_set_mac_reg(padapter, 0x460 , bMaskLWord , 0x0); /* fast EDCA queue packet interval & time out value*/ -+ /*phy_set_mac_reg(padapter, ODM_EDCA_VO_PARAM ,bMaskLWord , 0x431C);*/ -+ /*phy_set_mac_reg(padapter, ODM_EDCA_BE_PARAM ,bMaskLWord , 0x431C);*/ -+ /*phy_set_mac_reg(padapter, ODM_EDCA_BK_PARAM ,bMaskLWord , 0x431C);*/ -+ RTW_INFO("%s()!!!!! 0x460 = 0x%x\n" , __func__, phy_query_bb_reg(padapter, 0x460, bMaskDWord)); -+ -+} -+ -+void SetPacketTx(PADAPTER padapter) -+{ -+ u8 *ptr, *pkt_start, *pkt_end; -+ u32 pkt_size = 0, i = 0, idx = 0, tmp_idx = 0; -+ struct rtw_ieee80211_hdr *hdr; -+ u8 payload; -+ s32 bmcast; -+ struct pkt_attrib *pattrib; -+ struct mp_priv *pmp_priv; -+ -+ pmp_priv = &padapter->mppriv; -+ -+ if (pmp_priv->tx.stop) -+ return; -+ pmp_priv->tx.sended = 0; -+ pmp_priv->tx.stop = 0; -+ pmp_priv->tx_pktcount = 0; -+ -+ /* 3 1. update_attrib() */ -+ pattrib = &pmp_priv->tx.attrib; -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); -+ bmcast = IS_MCAST(pattrib->ra); -+ if (bmcast) -+ pattrib->psta = rtw_get_bcmc_stainfo(padapter); -+ else -+ pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); -+ -+ if (pattrib->psta == NULL) { -+ RTW_INFO("%s:psta = NULL !!\n", __func__); -+ return; -+ } -+ -+ pattrib->mac_id = pattrib->psta->cmn.mac_id; -+ pattrib->mbssid = 0; -+ -+ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen; -+ -+ /* 3 2. allocate xmit buffer */ -+ pkt_size = pattrib->last_txcmdsz; -+ -+ if (pmp_priv->tx.pallocated_buf) -+ rtw_mfree(pmp_priv->tx.pallocated_buf, pmp_priv->tx.buf_size); -+ pmp_priv->tx.write_size = pkt_size; -+ pmp_priv->tx.buf_size = pkt_size + XMITBUF_ALIGN_SZ; -+ pmp_priv->tx.pallocated_buf = rtw_zmalloc(pmp_priv->tx.buf_size); -+ if (pmp_priv->tx.pallocated_buf == NULL) { -+ RTW_INFO("%s: malloc(%d) fail!!\n", __func__, pmp_priv->tx.buf_size); -+ return; -+ } -+ pmp_priv->tx.buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pmp_priv->tx.pallocated_buf), XMITBUF_ALIGN_SZ); -+ ptr = pmp_priv->tx.buf; -+ -+ _rtw_memset(pmp_priv->tx.desc, 0, TXDESC_SIZE); -+ pkt_start = ptr; -+ pkt_end = pkt_start + pkt_size; -+ -+ /* 3 3. init TX descriptor */ -+#if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(padapter)) -+ fill_tx_desc_8188e(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8814A) -+ if (IS_HARDWARE_TYPE_8814A(padapter)) -+ fill_tx_desc_8814a(padapter); -+#endif /* defined(CONFIG_RTL8814A) */ -+ -+#if defined(CONFIG_RTL8822B) -+ if (IS_HARDWARE_TYPE_8822B(padapter)) -+ rtl8822b_prepare_mp_txdesc(padapter, pmp_priv); -+#endif /* CONFIG_RTL8822B */ -+ -+#if defined(CONFIG_RTL8822C) -+ if (IS_HARDWARE_TYPE_8822C(padapter)) -+ rtl8822c_prepare_mp_txdesc(padapter, pmp_priv); -+#endif /* CONFIG_RTL8822C */ -+ -+#if defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_8821C(padapter)) -+ rtl8821c_prepare_mp_txdesc(padapter, pmp_priv); -+#endif /* CONFIG_RTL8821C */ -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) -+ fill_tx_desc_8812a(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8192E) -+ if (IS_HARDWARE_TYPE_8192E(padapter)) -+ fill_tx_desc_8192e(padapter); -+#endif -+#if defined(CONFIG_RTL8723B) -+ if (IS_HARDWARE_TYPE_8723B(padapter)) -+ fill_tx_desc_8723b(padapter); -+#endif -+#if defined(CONFIG_RTL8703B) -+ if (IS_HARDWARE_TYPE_8703B(padapter)) -+ fill_tx_desc_8703b(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8188F) -+ if (IS_HARDWARE_TYPE_8188F(padapter)) -+ fill_tx_desc_8188f(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8188GTV) -+ if (IS_HARDWARE_TYPE_8188GTV(padapter)) -+ fill_tx_desc_8188gtv(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8723D) -+ if (IS_HARDWARE_TYPE_8723D(padapter)) -+ fill_tx_desc_8723d(padapter); -+#endif -+#if defined(CONFIG_RTL8192F) -+ if (IS_HARDWARE_TYPE_8192F(padapter)) -+ fill_tx_desc_8192f(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8710B) -+ if (IS_HARDWARE_TYPE_8710B(padapter)) -+ fill_tx_desc_8710b(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8814B) -+ if (IS_HARDWARE_TYPE_8814B(padapter)) -+ rtl8814b_prepare_mp_txdesc(padapter, pmp_priv); -+#endif /* CONFIG_RTL8814B */ -+ -+#if defined(CONFIG_RTL8723F) -+ if (IS_HARDWARE_TYPE_8723F(padapter)) -+ rtl8723f_prepare_mp_txdesc(padapter, pmp_priv); -+#endif /* CONFIG_RTL8723F */ -+ -+ /* 3 4. make wlan header, make_wlanhdr() */ -+ hdr = (struct rtw_ieee80211_hdr *)pkt_start; -+ set_frame_sub_type(&hdr->frame_ctl, pattrib->subtype); -+ -+ _rtw_memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); /* DA */ -+ _rtw_memcpy(hdr->addr2, pattrib->src, ETH_ALEN); /* SA */ -+ _rtw_memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); /* RA, BSSID */ -+ -+ /* 3 5. make payload */ -+ ptr = pkt_start + pattrib->hdrlen; -+ -+ if (pmp_priv->mplink_btx == _TRUE) { -+ _rtw_memcpy(ptr, pmp_priv->mplink_buf, pkt_end - ptr); -+ } else { -+ switch (pmp_priv->tx.payload) { -+ case MP_TX_Payload_00: -+ RTW_INFO("MP packet tx 0x00 payload!\n"); -+ payload = 0x00; -+ _rtw_memset(ptr, 0x00, pkt_end - ptr); -+ break; -+ case MP_TX_Payload_5a: -+ RTW_INFO("MP packet tx 0x5a payload!\n"); -+ payload = 0x5a; -+ _rtw_memset(ptr, 0x5a, pkt_end - ptr); -+ break; -+ case MP_TX_Payload_a5: -+ RTW_INFO("MP packet tx 0xa5 payload!\n"); -+ payload = 0xa5; -+ _rtw_memset(ptr, 0xa5, pkt_end - ptr); -+ break; -+ case MP_TX_Payload_ff: -+ RTW_INFO("MP packet tx 0xff payload!\n"); -+ payload = 0xff; -+ _rtw_memset(ptr, 0xff, pkt_end - ptr); -+ break; -+ case MP_TX_Payload_prbs9: -+ RTW_INFO("MP packet tx PRBS9 payload!\n"); -+ while (idx <= pkt_end - ptr) { -+ int start = 0x02; -+ int a = start; -+ -+ for (i = 0;; i++) { -+ int newbit = (((a >> 8) ^ (a >> 4)) & 1); -+ a = ((a << 1) | newbit) & 0x1ff; -+ RTW_DBG("%x ", a); -+ ptr[idx + i] = a; -+ -+ if (a == start) { -+ RTW_INFO("payload repetition period is %d , end %d\n", i , idx); -+ tmp_idx += i; -+ break; -+ } -+ if (idx + i >= (pkt_end - ptr)) { -+ tmp_idx += (idx + i); -+ RTW_INFO(" repetition period payload end curr ptr %d\n", idx + i); -+ break; -+ } -+ } -+ idx = tmp_idx; -+ } -+ break; -+ case MP_TX_Payload_default_random: -+ RTW_INFO("MP packet tx default random payload!\n"); -+ for (i = 0; i < pkt_end - ptr; i++) -+ ptr[i] = rtw_random32() % 0xFF; -+ break; -+ default: -+ RTW_INFO("Config payload type default use 0x%x\n!", pmp_priv->tx.payload); -+ _rtw_memset(ptr, pmp_priv->tx.payload, pkt_end - ptr); -+ break; -+ } -+ } -+ /* 3 6. start thread */ -+#ifdef PLATFORM_LINUX -+ pmp_priv->tx.PktTxThread = kthread_run(mp_xmit_packet_thread, pmp_priv, "RTW_MP_THREAD"); -+ if (IS_ERR(pmp_priv->tx.PktTxThread)) { -+ RTW_ERR("Create PktTx Thread Fail !!!!!\n"); -+ pmp_priv->tx.PktTxThread = NULL; -+ } -+#endif -+#ifdef PLATFORM_FREEBSD -+ { -+ struct proc *p; -+ struct thread *td; -+ pmp_priv->tx.PktTxThread = kproc_kthread_add(mp_xmit_packet_thread, pmp_priv, -+ &p, &td, RFHIGHPID, 0, "MPXmitThread", "MPXmitThread"); -+ -+ if (pmp_priv->tx.PktTxThread < 0) -+ RTW_INFO("Create PktTx Thread Fail !!!!!\n"); -+ } -+#endif -+ -+ Rtw_MPSetMacTxEDCA(padapter); -+ return; -+} -+ -+void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ struct mp_priv *pmppriv = &pAdapter->mppriv; -+ -+ -+ if (bStartRx) { -+#ifdef CONFIG_RTL8723B -+ phy_set_mac_reg(pAdapter, 0xe70, BIT23 | BIT22, 0x3); /* Power on adc (in RX_WAIT_CCA state) */ -+ write_bbreg(pAdapter, 0xa01, BIT0, bDisable);/* improve Rx performance by jerry */ -+#endif -+ pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AMF | RCR_HTC_LOC_CTRL; -+ pHalData->ReceiveConfig |= RCR_ACRC32; -+ pHalData->ReceiveConfig |= RCR_APP_PHYST_RXFF | RCR_APP_ICV | RCR_APP_MIC; -+ -+ if (pmppriv->bSetRxBssid == _TRUE) { -+ RTW_INFO("%s: pmppriv->network_macaddr=" MAC_FMT "\n", __func__, -+ MAC_ARG(pmppriv->network_macaddr)); -+ pHalData->ReceiveConfig = 0; -+ pHalData->ReceiveConfig |= RCR_CBSSID_DATA | RCR_CBSSID_BCN |RCR_APM | RCR_AM | RCR_AB |RCR_AMF; -+ pHalData->ReceiveConfig |= RCR_APP_PHYST_RXFF; -+ -+#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) -+/* todo: 8723F */ -+ write_bbreg(pAdapter, 0x550, BIT3, bEnable); -+#endif -+ rtw_write16(pAdapter, REG_RXFLTMAP0, 0xFFEF); /* REG_RXFLTMAP0 (RX Filter Map Group 0) */ -+ pmppriv->brx_filter_beacon = _TRUE; -+ -+ } else { -+ pHalData->ReceiveConfig |= RCR_ADF; -+ /* Accept all data frames */ -+ rtw_write16(pAdapter, REG_RXFLTMAP2, 0xFFFF); -+ } -+ -+ if (bAB) -+ pHalData->ReceiveConfig |= RCR_AB; -+ } else { -+#ifdef CONFIG_RTL8723B -+ phy_set_mac_reg(pAdapter, 0xe70, BIT23 | BIT22, 0x00); /* Power off adc (in RX_WAIT_CCA state)*/ -+ write_bbreg(pAdapter, 0xa01, BIT0, bEnable);/* improve Rx performance by jerry */ -+#endif -+ pHalData->ReceiveConfig = 0; -+ rtw_write16(pAdapter, REG_RXFLTMAP0, 0xFFFF); /* REG_RXFLTMAP0 (RX Filter Map Group 0) */ -+ } -+ -+ rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); -+} -+ -+void ResetPhyRxPktCount(PADAPTER pAdapter) -+{ -+ u32 i, phyrx_set = 0; -+ -+ for (i = 0; i <= 0xF; i++) { -+ phyrx_set = 0; -+ phyrx_set |= _RXERR_RPT_SEL(i); /* select */ -+ phyrx_set |= RXERR_RPT_RST; /* set counter to zero */ -+ rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set); -+ } -+} -+ -+static u32 GetPhyRxPktCounts(PADAPTER pAdapter, u32 selbit) -+{ -+ /* selection */ -+ u32 phyrx_set = 0, count = 0; -+ -+ phyrx_set = _RXERR_RPT_SEL(selbit & 0xF); -+ rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set); -+ -+ /* Read packet count */ -+ count = rtw_read32(pAdapter, REG_RXERR_RPT) & RXERR_COUNTER_MASK; -+ -+ return count; -+} -+ -+u32 GetPhyRxPktReceived(PADAPTER pAdapter) -+{ -+ u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0; -+ -+ OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_OK); -+ CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_OK); -+ HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_OK); -+ -+ return OFDM_cnt + CCK_cnt + HT_cnt; -+} -+ -+u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter) -+{ -+ u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0; -+ -+ OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_FAIL); -+ CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_FAIL); -+ HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_FAIL); -+ -+ return OFDM_cnt + CCK_cnt + HT_cnt; -+} -+ -+struct psd_init_regs { -+ /* 3 wire */ -+ int reg_88c; -+ int reg_c00; -+ int reg_e00; -+ int reg_1800; -+ int reg_1a00; -+ /* cck */ -+ int reg_800; -+ int reg_808; -+}; -+ -+static int rtw_mp_psd_init(PADAPTER padapter, struct psd_init_regs *regs) -+{ -+ HAL_DATA_TYPE *phal_data = GET_HAL_DATA(padapter); -+ -+ switch (phal_data->rf_type) { -+ /* 1R */ -+ case RF_1T1R: -+ if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) { -+ /* 11AC 1R PSD Setting 3wire & cck off */ -+ regs->reg_c00 = rtw_read32(padapter, 0xC00); -+ phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00); -+ regs->reg_808 = rtw_read32(padapter, 0x808); -+ phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0); -+ } else { -+ /* 11N 3-wire off 1 */ -+ regs->reg_88c = rtw_read32(padapter, 0x88C); -+ phy_set_bb_reg(padapter, 0x88C, 0x300000, 0x3); -+ /* 11N CCK off */ -+ regs->reg_800 = rtw_read32(padapter, 0x800); -+ phy_set_bb_reg(padapter, 0x800, 0x1000000, 0x0); -+ } -+ break; -+ -+ /* 2R */ -+ case RF_1T2R: -+ case RF_2T2R: -+ if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) { -+ /* 11AC 2R PSD Setting 3wire & cck off */ -+ regs->reg_c00 = rtw_read32(padapter, 0xC00); -+ regs->reg_e00 = rtw_read32(padapter, 0xE00); -+ phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00); -+ phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00); -+ regs->reg_808 = rtw_read32(padapter, 0x808); -+ phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0); -+ } else { -+ /* 11N 3-wire off 2 */ -+ regs->reg_88c = rtw_read32(padapter, 0x88C); -+ phy_set_bb_reg(padapter, 0x88C, 0xF00000, 0xF); -+ /* 11N CCK off */ -+ regs->reg_800 = rtw_read32(padapter, 0x800); -+ phy_set_bb_reg(padapter, 0x800, 0x1000000, 0x0); -+ } -+ break; -+ -+ /* 3R */ -+ case RF_2T3R: -+ case RF_3T3R: -+ if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) { -+ /* 11AC 3R PSD Setting 3wire & cck off */ -+ regs->reg_c00 = rtw_read32(padapter, 0xC00); -+ regs->reg_e00 = rtw_read32(padapter, 0xE00); -+ regs->reg_1800 = rtw_read32(padapter, 0x1800); -+ phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00); -+ phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00); -+ phy_set_bb_reg(padapter, 0x1800, 0x3, 0x00); -+ regs->reg_808 = rtw_read32(padapter, 0x808); -+ phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0); -+ } else { -+ RTW_ERR("%s: 11n don't support 3R\n", __func__); -+ return -1; -+ } -+ break; -+ -+ /* 4R */ -+ case RF_2T4R: -+ case RF_3T4R: -+ case RF_4T4R: -+ if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) { -+ /* 11AC 4R PSD Setting 3wire & cck off */ -+ regs->reg_c00 = rtw_read32(padapter, 0xC00); -+ regs->reg_e00 = rtw_read32(padapter, 0xE00); -+ regs->reg_1800 = rtw_read32(padapter, 0x1800); -+ regs->reg_1a00 = rtw_read32(padapter, 0x1A00); -+ phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00); -+ phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00); -+ phy_set_bb_reg(padapter, 0x1800, 0x3, 0x00); -+ phy_set_bb_reg(padapter, 0x1A00, 0x3, 0x00); -+ regs->reg_808 = rtw_read32(padapter, 0x808); -+ phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0); -+ } else { -+ RTW_ERR("%s: 11n don't support 4R\n", __func__); -+ return -1; -+ } -+ break; -+ -+ default: -+ RTW_ERR("%s: unknown %d rf type\n", __func__, phal_data->rf_type); -+ return -1; -+ } -+ -+ /* Set PSD points, 0=128, 1=256, 2=512, 3=1024 */ -+ if (hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) -+ phy_set_bb_reg(padapter, 0x910, 0xC000, 3); -+ else -+ phy_set_bb_reg(padapter, 0x808, 0xC000, 3); -+ -+ RTW_INFO("%s: set %d rf type done\n", __func__, phal_data->rf_type); -+ return 0; -+} -+ -+static int rtw_mp_psd_close(PADAPTER padapter, struct psd_init_regs *regs) -+{ -+ HAL_DATA_TYPE *phal_data = GET_HAL_DATA(padapter); -+ -+ -+ if (!hal_chk_proto_cap(padapter, PROTO_CAP_11AC)) { -+ /* 11n 3wire restore */ -+ rtw_write32(padapter, 0x88C, regs->reg_88c); -+ /* 11n cck restore */ -+ rtw_write32(padapter, 0x800, regs->reg_800); -+ RTW_INFO("%s: restore %d rf type\n", __func__, phal_data->rf_type); -+ return 0; -+ } -+ -+ /* 11ac 3wire restore */ -+ switch (phal_data->rf_type) { -+ case RF_1T1R: -+ rtw_write32(padapter, 0xC00, regs->reg_c00); -+ break; -+ case RF_1T2R: -+ case RF_2T2R: -+ rtw_write32(padapter, 0xC00, regs->reg_c00); -+ rtw_write32(padapter, 0xE00, regs->reg_e00); -+ break; -+ case RF_2T3R: -+ case RF_3T3R: -+ rtw_write32(padapter, 0xC00, regs->reg_c00); -+ rtw_write32(padapter, 0xE00, regs->reg_e00); -+ rtw_write32(padapter, 0x1800, regs->reg_1800); -+ break; -+ case RF_2T4R: -+ case RF_3T4R: -+ case RF_4T4R: -+ rtw_write32(padapter, 0xC00, regs->reg_c00); -+ rtw_write32(padapter, 0xE00, regs->reg_e00); -+ rtw_write32(padapter, 0x1800, regs->reg_1800); -+ rtw_write32(padapter, 0x1A00, regs->reg_1a00); -+ break; -+ default: -+ RTW_WARN("%s: unknown %d rf type\n", __func__, phal_data->rf_type); -+ break; -+ } -+ -+ /* 11ac cck restore */ -+ rtw_write32(padapter, 0x808, regs->reg_808); -+ RTW_INFO("%s: restore %d rf type done\n", __func__, phal_data->rf_type); -+ return 0; -+} -+ -+/* reg 0x808[9:0]: FFT data x -+ * reg 0x808[22]: 0 --> 1 to get 1 FFT data y -+ * reg 0x8B4[15:0]: FFT data y report */ -+static u32 rtw_GetPSDData(PADAPTER pAdapter, u32 point) -+{ -+ u32 psd_val = 0; -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) \ -+ || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) -+ -+ u16 psd_reg = 0x910; -+ u16 psd_regL = 0xF44; -+#else -+ u16 psd_reg = 0x808; -+ u16 psd_regL = 0x8B4; -+#endif -+ -+ psd_val = rtw_read32(pAdapter, psd_reg); -+ -+ psd_val &= 0xFFBFFC00; -+ psd_val |= point; -+ -+ rtw_write32(pAdapter, psd_reg, psd_val); -+ rtw_mdelay_os(1); -+ psd_val |= 0x00400000; -+ -+ rtw_write32(pAdapter, psd_reg, psd_val); -+ rtw_mdelay_os(1); -+ -+ psd_val = rtw_read32(pAdapter, psd_regL); -+#if defined(CONFIG_RTL8821C) -+ psd_val = (psd_val & 0x00FFFFFF) / 32; -+#else -+ psd_val &= 0x0000FFFF; -+#endif -+ -+ return psd_val; -+} -+ -+/* -+ * pts start_point_min stop_point_max -+ * 128 64 64 + 128 = 192 -+ * 256 128 128 + 256 = 384 -+ * 512 256 256 + 512 = 768 -+ * 1024 512 512 + 1024 = 1536 -+ * -+ */ -+u32 mp_query_psd(PADAPTER pAdapter, u8 *data) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ struct dm_struct *p_dm = adapter_to_phydm(pAdapter); -+ -+ u32 i, psd_pts = 0, psd_start = 0, psd_stop = 0; -+ u32 psd_data = 0; -+ struct psd_init_regs regs = {}; -+ int psd_analysis = 0; -+ char *pdata = NULL; -+ -+ -+#ifdef PLATFORM_LINUX -+ if (!netif_running(pAdapter->pnetdev)) { -+ return 0; -+ } -+#endif -+ -+ if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { -+ return 0; -+ } -+ -+ if (strlen(data) == 0) { /* default value */ -+ psd_pts = 128; -+ psd_start = 64; -+ psd_stop = 128; -+ } else if (strncmp(data, "analysis,", 9) == 0) { -+ if (rtw_mp_psd_init(pAdapter, ®s) != 0) -+ return 0; -+ psd_analysis = 1; -+ sscanf(data + 9, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop); -+ } else -+ sscanf(data, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop); -+ -+ data[0] = '\0'; -+ pdata = data; -+ -+ if (psd_stop > 1792 || psd_stop < 1) { -+ rtw_warn_on(1); -+ psd_stop = 1792; -+ } -+ -+ if (IS_HARDWARE_TYPE_8822C(pAdapter) || IS_HARDWARE_TYPE_8723F(pAdapter)) { -+ u32 *psdbuf = rtw_zmalloc(sizeof(u32)*256); -+ -+ if (psdbuf == NULL) { -+ RTW_INFO("%s: psd buf malloc fail!!\n", __func__); -+ return 0; -+ } -+ -+ halrf_cmn_info_set(p_dm, HALRF_CMNINFO_MP_PSD_POINT, psd_pts); -+ halrf_cmn_info_set(p_dm, HALRF_CMNINFO_MP_PSD_START_POINT, psd_start); -+ halrf_cmn_info_set(p_dm, HALRF_CMNINFO_MP_PSD_STOP_POINT, psd_stop); -+ halrf_cmn_info_set(p_dm, HALRF_CMNINFO_MP_PSD_AVERAGE, 0x20000); -+ -+ halrf_psd_init(p_dm); -+#ifdef CONFIG_LONG_DELAY_ISSUE -+ rtw_msleep_os(100); -+#else -+ rtw_mdelay_os(10); -+#endif -+ halrf_psd_query(p_dm, psdbuf, 256); -+ -+ i = 0; -+ while (i < 256) { -+ pdata += sprintf(pdata, "%x ", (psdbuf[i])); -+ i++; -+ } -+ -+ if (psdbuf) -+ rtw_mfree(psdbuf, sizeof(u32)*256); -+ -+ } else { -+ i = psd_start; -+ -+ while (i < psd_stop) { -+ if (i >= psd_pts) -+ psd_data = rtw_GetPSDData(pAdapter, i - psd_pts); -+ else -+ psd_data = rtw_GetPSDData(pAdapter, i); -+ -+ pdata += sprintf(pdata, "%x ", psd_data); -+ i++; -+ } -+ -+ } -+ -+#ifdef CONFIG_LONG_DELAY_ISSUE -+ rtw_msleep_os(100); -+#else -+ rtw_mdelay_os(100); -+#endif -+ -+ if (psd_analysis) -+ rtw_mp_psd_close(pAdapter, ®s); -+ -+ return strlen(data) + 1; -+} -+ -+ -+#if 0 -+void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv) -+{ -+ int i, res; -+ _adapter *padapter = pxmitpriv->adapter; -+ struct xmit_frame *pxmitframe = (struct xmit_frame *) pxmitpriv->pxmit_frame_buf; -+ struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; -+ -+ u32 max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ; -+ u32 num_xmit_extbuf = NR_XMIT_EXTBUFF; -+ if (padapter->registrypriv.mp_mode == 0) { -+ max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ; -+ num_xmit_extbuf = NR_XMIT_EXTBUFF; -+ } else { -+ max_xmit_extbuf_size = 6000; -+ num_xmit_extbuf = 8; -+ } -+ -+ pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; -+ for (i = 0; i < num_xmit_extbuf; i++) { -+ rtw_os_xmit_resource_free(padapter, pxmitbuf, (max_xmit_extbuf_size + XMITBUF_ALIGN_SZ), _FALSE); -+ -+ pxmitbuf++; -+ } -+ -+ if (pxmitpriv->pallocated_xmit_extbuf) -+ rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, num_xmit_extbuf * sizeof(struct xmit_buf) + 4); -+ -+ if (padapter->registrypriv.mp_mode == 0) { -+ max_xmit_extbuf_size = 6000; -+ num_xmit_extbuf = 8; -+ } else { -+ max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ; -+ num_xmit_extbuf = NR_XMIT_EXTBUFF; -+ } -+ -+ /* Init xmit extension buff */ -+ _rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue); -+ -+ pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(num_xmit_extbuf * sizeof(struct xmit_buf) + 4); -+ -+ if (pxmitpriv->pallocated_xmit_extbuf == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmit_extbuf), 4); -+ -+ pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; -+ -+ for (i = 0; i < num_xmit_extbuf; i++) { -+ _rtw_init_listhead(&pxmitbuf->list); -+ -+ pxmitbuf->priv_data = NULL; -+ pxmitbuf->padapter = padapter; -+ pxmitbuf->buf_tag = XMITBUF_MGNT; -+ -+ res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, max_xmit_extbuf_size + XMITBUF_ALIGN_SZ, _TRUE); -+ if (res == _FAIL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pxmitbuf->phead = pxmitbuf->pbuf; -+ pxmitbuf->pend = pxmitbuf->pbuf + max_xmit_extbuf_size; -+ pxmitbuf->len = 0; -+ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; -+#endif -+ -+ rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue)); -+#ifdef DBG_XMIT_BUF_EXT -+ pxmitbuf->no = i; -+#endif -+ pxmitbuf++; -+ -+ } -+ -+ pxmitpriv->free_xmit_extbuf_cnt = num_xmit_extbuf; -+ -+exit: -+ ; -+} -+#endif -+ -+u8 -+mpt_to_mgnt_rate( -+ u32 MptRateIdx -+) -+{ -+ /* Mapped to MGN_XXX defined in MgntGen.h */ -+ switch (MptRateIdx) { -+ /* CCK rate. */ -+ case MPT_RATE_1M: -+ return MGN_1M; -+ case MPT_RATE_2M: -+ return MGN_2M; -+ case MPT_RATE_55M: -+ return MGN_5_5M; -+ case MPT_RATE_11M: -+ return MGN_11M; -+ -+ /* OFDM rate. */ -+ case MPT_RATE_6M: -+ return MGN_6M; -+ case MPT_RATE_9M: -+ return MGN_9M; -+ case MPT_RATE_12M: -+ return MGN_12M; -+ case MPT_RATE_18M: -+ return MGN_18M; -+ case MPT_RATE_24M: -+ return MGN_24M; -+ case MPT_RATE_36M: -+ return MGN_36M; -+ case MPT_RATE_48M: -+ return MGN_48M; -+ case MPT_RATE_54M: -+ return MGN_54M; -+ -+ /* HT rate. */ -+ case MPT_RATE_MCS0: -+ return MGN_MCS0; -+ case MPT_RATE_MCS1: -+ return MGN_MCS1; -+ case MPT_RATE_MCS2: -+ return MGN_MCS2; -+ case MPT_RATE_MCS3: -+ return MGN_MCS3; -+ case MPT_RATE_MCS4: -+ return MGN_MCS4; -+ case MPT_RATE_MCS5: -+ return MGN_MCS5; -+ case MPT_RATE_MCS6: -+ return MGN_MCS6; -+ case MPT_RATE_MCS7: -+ return MGN_MCS7; -+ case MPT_RATE_MCS8: -+ return MGN_MCS8; -+ case MPT_RATE_MCS9: -+ return MGN_MCS9; -+ case MPT_RATE_MCS10: -+ return MGN_MCS10; -+ case MPT_RATE_MCS11: -+ return MGN_MCS11; -+ case MPT_RATE_MCS12: -+ return MGN_MCS12; -+ case MPT_RATE_MCS13: -+ return MGN_MCS13; -+ case MPT_RATE_MCS14: -+ return MGN_MCS14; -+ case MPT_RATE_MCS15: -+ return MGN_MCS15; -+ case MPT_RATE_MCS16: -+ return MGN_MCS16; -+ case MPT_RATE_MCS17: -+ return MGN_MCS17; -+ case MPT_RATE_MCS18: -+ return MGN_MCS18; -+ case MPT_RATE_MCS19: -+ return MGN_MCS19; -+ case MPT_RATE_MCS20: -+ return MGN_MCS20; -+ case MPT_RATE_MCS21: -+ return MGN_MCS21; -+ case MPT_RATE_MCS22: -+ return MGN_MCS22; -+ case MPT_RATE_MCS23: -+ return MGN_MCS23; -+ case MPT_RATE_MCS24: -+ return MGN_MCS24; -+ case MPT_RATE_MCS25: -+ return MGN_MCS25; -+ case MPT_RATE_MCS26: -+ return MGN_MCS26; -+ case MPT_RATE_MCS27: -+ return MGN_MCS27; -+ case MPT_RATE_MCS28: -+ return MGN_MCS28; -+ case MPT_RATE_MCS29: -+ return MGN_MCS29; -+ case MPT_RATE_MCS30: -+ return MGN_MCS30; -+ case MPT_RATE_MCS31: -+ return MGN_MCS31; -+ -+ /* VHT rate. */ -+ case MPT_RATE_VHT1SS_MCS0: -+ return MGN_VHT1SS_MCS0; -+ case MPT_RATE_VHT1SS_MCS1: -+ return MGN_VHT1SS_MCS1; -+ case MPT_RATE_VHT1SS_MCS2: -+ return MGN_VHT1SS_MCS2; -+ case MPT_RATE_VHT1SS_MCS3: -+ return MGN_VHT1SS_MCS3; -+ case MPT_RATE_VHT1SS_MCS4: -+ return MGN_VHT1SS_MCS4; -+ case MPT_RATE_VHT1SS_MCS5: -+ return MGN_VHT1SS_MCS5; -+ case MPT_RATE_VHT1SS_MCS6: -+ return MGN_VHT1SS_MCS6; -+ case MPT_RATE_VHT1SS_MCS7: -+ return MGN_VHT1SS_MCS7; -+ case MPT_RATE_VHT1SS_MCS8: -+ return MGN_VHT1SS_MCS8; -+ case MPT_RATE_VHT1SS_MCS9: -+ return MGN_VHT1SS_MCS9; -+ case MPT_RATE_VHT2SS_MCS0: -+ return MGN_VHT2SS_MCS0; -+ case MPT_RATE_VHT2SS_MCS1: -+ return MGN_VHT2SS_MCS1; -+ case MPT_RATE_VHT2SS_MCS2: -+ return MGN_VHT2SS_MCS2; -+ case MPT_RATE_VHT2SS_MCS3: -+ return MGN_VHT2SS_MCS3; -+ case MPT_RATE_VHT2SS_MCS4: -+ return MGN_VHT2SS_MCS4; -+ case MPT_RATE_VHT2SS_MCS5: -+ return MGN_VHT2SS_MCS5; -+ case MPT_RATE_VHT2SS_MCS6: -+ return MGN_VHT2SS_MCS6; -+ case MPT_RATE_VHT2SS_MCS7: -+ return MGN_VHT2SS_MCS7; -+ case MPT_RATE_VHT2SS_MCS8: -+ return MGN_VHT2SS_MCS8; -+ case MPT_RATE_VHT2SS_MCS9: -+ return MGN_VHT2SS_MCS9; -+ case MPT_RATE_VHT3SS_MCS0: -+ return MGN_VHT3SS_MCS0; -+ case MPT_RATE_VHT3SS_MCS1: -+ return MGN_VHT3SS_MCS1; -+ case MPT_RATE_VHT3SS_MCS2: -+ return MGN_VHT3SS_MCS2; -+ case MPT_RATE_VHT3SS_MCS3: -+ return MGN_VHT3SS_MCS3; -+ case MPT_RATE_VHT3SS_MCS4: -+ return MGN_VHT3SS_MCS4; -+ case MPT_RATE_VHT3SS_MCS5: -+ return MGN_VHT3SS_MCS5; -+ case MPT_RATE_VHT3SS_MCS6: -+ return MGN_VHT3SS_MCS6; -+ case MPT_RATE_VHT3SS_MCS7: -+ return MGN_VHT3SS_MCS7; -+ case MPT_RATE_VHT3SS_MCS8: -+ return MGN_VHT3SS_MCS8; -+ case MPT_RATE_VHT3SS_MCS9: -+ return MGN_VHT3SS_MCS9; -+ case MPT_RATE_VHT4SS_MCS0: -+ return MGN_VHT4SS_MCS0; -+ case MPT_RATE_VHT4SS_MCS1: -+ return MGN_VHT4SS_MCS1; -+ case MPT_RATE_VHT4SS_MCS2: -+ return MGN_VHT4SS_MCS2; -+ case MPT_RATE_VHT4SS_MCS3: -+ return MGN_VHT4SS_MCS3; -+ case MPT_RATE_VHT4SS_MCS4: -+ return MGN_VHT4SS_MCS4; -+ case MPT_RATE_VHT4SS_MCS5: -+ return MGN_VHT4SS_MCS5; -+ case MPT_RATE_VHT4SS_MCS6: -+ return MGN_VHT4SS_MCS6; -+ case MPT_RATE_VHT4SS_MCS7: -+ return MGN_VHT4SS_MCS7; -+ case MPT_RATE_VHT4SS_MCS8: -+ return MGN_VHT4SS_MCS8; -+ case MPT_RATE_VHT4SS_MCS9: -+ return MGN_VHT4SS_MCS9; -+ -+ case MPT_RATE_LAST: /* fully automatiMGN_VHT2SS_MCS1; */ -+ default: -+ RTW_INFO("<===mpt_to_mgnt_rate(), Invalid Rate: %d!!\n", MptRateIdx); -+ return 0x0; -+ } -+} -+ -+ -+u8 HwRateToMPTRate(u8 rate) -+{ -+ u8 ret_rate = MGN_1M; -+ -+ switch (rate) { -+ case DESC_RATE1M: -+ ret_rate = MPT_RATE_1M; -+ break; -+ case DESC_RATE2M: -+ ret_rate = MPT_RATE_2M; -+ break; -+ case DESC_RATE5_5M: -+ ret_rate = MPT_RATE_55M; -+ break; -+ case DESC_RATE11M: -+ ret_rate = MPT_RATE_11M; -+ break; -+ case DESC_RATE6M: -+ ret_rate = MPT_RATE_6M; -+ break; -+ case DESC_RATE9M: -+ ret_rate = MPT_RATE_9M; -+ break; -+ case DESC_RATE12M: -+ ret_rate = MPT_RATE_12M; -+ break; -+ case DESC_RATE18M: -+ ret_rate = MPT_RATE_18M; -+ break; -+ case DESC_RATE24M: -+ ret_rate = MPT_RATE_24M; -+ break; -+ case DESC_RATE36M: -+ ret_rate = MPT_RATE_36M; -+ break; -+ case DESC_RATE48M: -+ ret_rate = MPT_RATE_48M; -+ break; -+ case DESC_RATE54M: -+ ret_rate = MPT_RATE_54M; -+ break; -+ case DESC_RATEMCS0: -+ ret_rate = MPT_RATE_MCS0; -+ break; -+ case DESC_RATEMCS1: -+ ret_rate = MPT_RATE_MCS1; -+ break; -+ case DESC_RATEMCS2: -+ ret_rate = MPT_RATE_MCS2; -+ break; -+ case DESC_RATEMCS3: -+ ret_rate = MPT_RATE_MCS3; -+ break; -+ case DESC_RATEMCS4: -+ ret_rate = MPT_RATE_MCS4; -+ break; -+ case DESC_RATEMCS5: -+ ret_rate = MPT_RATE_MCS5; -+ break; -+ case DESC_RATEMCS6: -+ ret_rate = MPT_RATE_MCS6; -+ break; -+ case DESC_RATEMCS7: -+ ret_rate = MPT_RATE_MCS7; -+ break; -+ case DESC_RATEMCS8: -+ ret_rate = MPT_RATE_MCS8; -+ break; -+ case DESC_RATEMCS9: -+ ret_rate = MPT_RATE_MCS9; -+ break; -+ case DESC_RATEMCS10: -+ ret_rate = MPT_RATE_MCS10; -+ break; -+ case DESC_RATEMCS11: -+ ret_rate = MPT_RATE_MCS11; -+ break; -+ case DESC_RATEMCS12: -+ ret_rate = MPT_RATE_MCS12; -+ break; -+ case DESC_RATEMCS13: -+ ret_rate = MPT_RATE_MCS13; -+ break; -+ case DESC_RATEMCS14: -+ ret_rate = MPT_RATE_MCS14; -+ break; -+ case DESC_RATEMCS15: -+ ret_rate = MPT_RATE_MCS15; -+ break; -+ case DESC_RATEMCS16: -+ ret_rate = MPT_RATE_MCS16; -+ break; -+ case DESC_RATEMCS17: -+ ret_rate = MPT_RATE_MCS17; -+ break; -+ case DESC_RATEMCS18: -+ ret_rate = MPT_RATE_MCS18; -+ break; -+ case DESC_RATEMCS19: -+ ret_rate = MPT_RATE_MCS19; -+ break; -+ case DESC_RATEMCS20: -+ ret_rate = MPT_RATE_MCS20; -+ break; -+ case DESC_RATEMCS21: -+ ret_rate = MPT_RATE_MCS21; -+ break; -+ case DESC_RATEMCS22: -+ ret_rate = MPT_RATE_MCS22; -+ break; -+ case DESC_RATEMCS23: -+ ret_rate = MPT_RATE_MCS23; -+ break; -+ case DESC_RATEMCS24: -+ ret_rate = MPT_RATE_MCS24; -+ break; -+ case DESC_RATEMCS25: -+ ret_rate = MPT_RATE_MCS25; -+ break; -+ case DESC_RATEMCS26: -+ ret_rate = MPT_RATE_MCS26; -+ break; -+ case DESC_RATEMCS27: -+ ret_rate = MPT_RATE_MCS27; -+ break; -+ case DESC_RATEMCS28: -+ ret_rate = MPT_RATE_MCS28; -+ break; -+ case DESC_RATEMCS29: -+ ret_rate = MPT_RATE_MCS29; -+ break; -+ case DESC_RATEMCS30: -+ ret_rate = MPT_RATE_MCS30; -+ break; -+ case DESC_RATEMCS31: -+ ret_rate = MPT_RATE_MCS31; -+ break; -+ case DESC_RATEVHTSS1MCS0: -+ ret_rate = MPT_RATE_VHT1SS_MCS0; -+ break; -+ case DESC_RATEVHTSS1MCS1: -+ ret_rate = MPT_RATE_VHT1SS_MCS1; -+ break; -+ case DESC_RATEVHTSS1MCS2: -+ ret_rate = MPT_RATE_VHT1SS_MCS2; -+ break; -+ case DESC_RATEVHTSS1MCS3: -+ ret_rate = MPT_RATE_VHT1SS_MCS3; -+ break; -+ case DESC_RATEVHTSS1MCS4: -+ ret_rate = MPT_RATE_VHT1SS_MCS4; -+ break; -+ case DESC_RATEVHTSS1MCS5: -+ ret_rate = MPT_RATE_VHT1SS_MCS5; -+ break; -+ case DESC_RATEVHTSS1MCS6: -+ ret_rate = MPT_RATE_VHT1SS_MCS6; -+ break; -+ case DESC_RATEVHTSS1MCS7: -+ ret_rate = MPT_RATE_VHT1SS_MCS7; -+ break; -+ case DESC_RATEVHTSS1MCS8: -+ ret_rate = MPT_RATE_VHT1SS_MCS8; -+ break; -+ case DESC_RATEVHTSS1MCS9: -+ ret_rate = MPT_RATE_VHT1SS_MCS9; -+ break; -+ case DESC_RATEVHTSS2MCS0: -+ ret_rate = MPT_RATE_VHT2SS_MCS0; -+ break; -+ case DESC_RATEVHTSS2MCS1: -+ ret_rate = MPT_RATE_VHT2SS_MCS1; -+ break; -+ case DESC_RATEVHTSS2MCS2: -+ ret_rate = MPT_RATE_VHT2SS_MCS2; -+ break; -+ case DESC_RATEVHTSS2MCS3: -+ ret_rate = MPT_RATE_VHT2SS_MCS3; -+ break; -+ case DESC_RATEVHTSS2MCS4: -+ ret_rate = MPT_RATE_VHT2SS_MCS4; -+ break; -+ case DESC_RATEVHTSS2MCS5: -+ ret_rate = MPT_RATE_VHT2SS_MCS5; -+ break; -+ case DESC_RATEVHTSS2MCS6: -+ ret_rate = MPT_RATE_VHT2SS_MCS6; -+ break; -+ case DESC_RATEVHTSS2MCS7: -+ ret_rate = MPT_RATE_VHT2SS_MCS7; -+ break; -+ case DESC_RATEVHTSS2MCS8: -+ ret_rate = MPT_RATE_VHT2SS_MCS8; -+ break; -+ case DESC_RATEVHTSS2MCS9: -+ ret_rate = MPT_RATE_VHT2SS_MCS9; -+ break; -+ case DESC_RATEVHTSS3MCS0: -+ ret_rate = MPT_RATE_VHT3SS_MCS0; -+ break; -+ case DESC_RATEVHTSS3MCS1: -+ ret_rate = MPT_RATE_VHT3SS_MCS1; -+ break; -+ case DESC_RATEVHTSS3MCS2: -+ ret_rate = MPT_RATE_VHT3SS_MCS2; -+ break; -+ case DESC_RATEVHTSS3MCS3: -+ ret_rate = MPT_RATE_VHT3SS_MCS3; -+ break; -+ case DESC_RATEVHTSS3MCS4: -+ ret_rate = MPT_RATE_VHT3SS_MCS4; -+ break; -+ case DESC_RATEVHTSS3MCS5: -+ ret_rate = MPT_RATE_VHT3SS_MCS5; -+ break; -+ case DESC_RATEVHTSS3MCS6: -+ ret_rate = MPT_RATE_VHT3SS_MCS6; -+ break; -+ case DESC_RATEVHTSS3MCS7: -+ ret_rate = MPT_RATE_VHT3SS_MCS7; -+ break; -+ case DESC_RATEVHTSS3MCS8: -+ ret_rate = MPT_RATE_VHT3SS_MCS8; -+ break; -+ case DESC_RATEVHTSS3MCS9: -+ ret_rate = MPT_RATE_VHT3SS_MCS9; -+ break; -+ case DESC_RATEVHTSS4MCS0: -+ ret_rate = MPT_RATE_VHT4SS_MCS0; -+ break; -+ case DESC_RATEVHTSS4MCS1: -+ ret_rate = MPT_RATE_VHT4SS_MCS1; -+ break; -+ case DESC_RATEVHTSS4MCS2: -+ ret_rate = MPT_RATE_VHT4SS_MCS2; -+ break; -+ case DESC_RATEVHTSS4MCS3: -+ ret_rate = MPT_RATE_VHT4SS_MCS3; -+ break; -+ case DESC_RATEVHTSS4MCS4: -+ ret_rate = MPT_RATE_VHT4SS_MCS4; -+ break; -+ case DESC_RATEVHTSS4MCS5: -+ ret_rate = MPT_RATE_VHT4SS_MCS5; -+ break; -+ case DESC_RATEVHTSS4MCS6: -+ ret_rate = MPT_RATE_VHT4SS_MCS6; -+ break; -+ case DESC_RATEVHTSS4MCS7: -+ ret_rate = MPT_RATE_VHT4SS_MCS7; -+ break; -+ case DESC_RATEVHTSS4MCS8: -+ ret_rate = MPT_RATE_VHT4SS_MCS8; -+ break; -+ case DESC_RATEVHTSS4MCS9: -+ ret_rate = MPT_RATE_VHT4SS_MCS9; -+ break; -+ -+ default: -+ RTW_INFO("hw_rate_to_m_rate(): Non supported Rate [%x]!!!\n", rate); -+ break; -+ } -+ return ret_rate; -+} -+ -+u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr) -+{ -+ u16 i = 0; -+ u8 *rateindex_Array[] = { "1M", "2M", "5.5M", "11M", "6M", "9M", "12M", "18M", "24M", "36M", "48M", "54M", -+ "HTMCS0", "HTMCS1", "HTMCS2", "HTMCS3", "HTMCS4", "HTMCS5", "HTMCS6", "HTMCS7", -+ "HTMCS8", "HTMCS9", "HTMCS10", "HTMCS11", "HTMCS12", "HTMCS13", "HTMCS14", "HTMCS15", -+ "HTMCS16", "HTMCS17", "HTMCS18", "HTMCS19", "HTMCS20", "HTMCS21", "HTMCS22", "HTMCS23", -+ "HTMCS24", "HTMCS25", "HTMCS26", "HTMCS27", "HTMCS28", "HTMCS29", "HTMCS30", "HTMCS31", -+ "VHT1MCS0", "VHT1MCS1", "VHT1MCS2", "VHT1MCS3", "VHT1MCS4", "VHT1MCS5", "VHT1MCS6", "VHT1MCS7", "VHT1MCS8", "VHT1MCS9", -+ "VHT2MCS0", "VHT2MCS1", "VHT2MCS2", "VHT2MCS3", "VHT2MCS4", "VHT2MCS5", "VHT2MCS6", "VHT2MCS7", "VHT2MCS8", "VHT2MCS9", -+ "VHT3MCS0", "VHT3MCS1", "VHT3MCS2", "VHT3MCS3", "VHT3MCS4", "VHT3MCS5", "VHT3MCS6", "VHT3MCS7", "VHT3MCS8", "VHT3MCS9", -+ "VHT4MCS0", "VHT4MCS1", "VHT4MCS2", "VHT4MCS3", "VHT4MCS4", "VHT4MCS5", "VHT4MCS6", "VHT4MCS7", "VHT4MCS8", "VHT4MCS9" -+ }; -+ -+ for (i = 0; i <= 83; i++) { -+ if (strcmp(targetStr, rateindex_Array[i]) == 0) { -+ RTW_INFO("%s , index = %d\n", __func__ , i); -+ return i; -+ } -+ } -+ -+ printk("%s ,please input a Data RATE String as:", __func__); -+ for (i = 0; i <= 83; i++) { -+ printk("%s ", rateindex_Array[i]); -+ if (i % 10 == 0) -+ printk("\n"); -+ } -+ return _FAIL; -+} -+ -+u8 rtw_mp_mode_check(PADAPTER pAdapter) -+{ -+ PADAPTER primary_adapter = GET_PRIMARY_ADAPTER(pAdapter); -+ -+ if (primary_adapter->registrypriv.mp_mode == 1 || primary_adapter->mppriv.bprocess_mp_mode == _TRUE) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+bool rtw_is_mp_tssitrk_on(_adapter *adapter) -+{ -+ _adapter *primary_adapter = GET_PRIMARY_ADAPTER(adapter); -+ -+ return primary_adapter->mppriv.tssitrk_on; -+} -+ -+u32 mpt_ProQueryCalTxPower( -+ PADAPTER pAdapter, -+ u8 RfPath -+) -+{ -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ -+ u32 TxPower = 1; -+ struct txpwr_idx_comp tic; -+ u8 mgn_rate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); -+ RATE_SECTION rs = mgn_rate_to_rs(mgn_rate); -+ -+ TxPower = rtw_hal_get_tx_power_index(pAdapter, RfPath, rs, mgn_rate -+ , pHalData->current_channel_bw, pHalData->current_band_type, pHalData->current_channel, 0, &tic); -+ -+ dump_tx_power_index_inline(RTW_DBGDUMP, pAdapter, RfPath -+ , pHalData->current_channel_bw, pHalData->current_channel -+ , mgn_rate, TxPower, &tic); -+ -+ pAdapter->mppriv.txpoweridx = (u8)TxPower; -+ if (RfPath == RF_PATH_A) -+ pMptCtx->TxPwrLevel[RF_PATH_A] = (u8)TxPower; -+ else if (RfPath == RF_PATH_B) -+ pMptCtx->TxPwrLevel[RF_PATH_B] = (u8)TxPower; -+ else if (RfPath == RF_PATH_C) -+ pMptCtx->TxPwrLevel[RF_PATH_C] = (u8)TxPower; -+ else if (RfPath == RF_PATH_D) -+ pMptCtx->TxPwrLevel[RF_PATH_D] = (u8)TxPower; -+ hal_mpt_SetTxPower(pAdapter); -+ -+ return TxPower; -+} -+ -+u32 mpt_get_tx_power_finalabs_val(PADAPTER padapter, u8 rf_path) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); -+ -+ u8 mgn_rate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); -+ u32 powerdbm = 0; -+ -+ powerdbm = phy_get_tx_power_final_absolute_value(padapter, rf_path, mgn_rate, pHalData->current_channel_bw, pHalData->current_channel); -+ -+ RTW_INFO("bw=%d, ch=%d, rateid=%d, TSSI Power(dBm):%d\n", -+ pHalData->current_channel_bw, pHalData->current_channel, mgn_rate ,powerdbm); -+ -+ return powerdbm; -+} -+ -+#ifdef CONFIG_MP_VHT_HW_TX_MODE -+static inline void dump_buf(u8 *buf, u32 len) -+{ -+ u32 i; -+ -+ RTW_INFO("-----------------Len %d----------------\n", len); -+ for (i = 0; i < len; i++) -+ RTW_INFO("%2.2x-", *(buf + i)); -+ RTW_INFO("\n"); -+} -+ -+void ByteToBit( -+ u8 *out, -+ bool *in, -+ u8 in_size) -+{ -+ u8 i = 0, j = 0; -+ -+ for (i = 0; i < in_size; i++) { -+ for (j = 0; j < 8; j++) { -+ if (in[8 * i + j]) -+ out[i] |= (1 << j); -+ } -+ } -+} -+ -+ -+void CRC16_generator( -+ bool *out, -+ bool *in, -+ u8 in_size -+) -+{ -+ u8 i = 0; -+ bool temp = 0, reg[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; -+ -+ for (i = 0; i < in_size; i++) {/* take one's complement and bit reverse*/ -+ temp = in[i] ^ reg[15]; -+ reg[15] = reg[14]; -+ reg[14] = reg[13]; -+ reg[13] = reg[12]; -+ reg[12] = reg[11]; -+ reg[11] = reg[10]; -+ reg[10] = reg[9]; -+ reg[9] = reg[8]; -+ reg[8] = reg[7]; -+ -+ reg[7] = reg[6]; -+ reg[6] = reg[5]; -+ reg[5] = reg[4]; -+ reg[4] = reg[3]; -+ reg[3] = reg[2]; -+ reg[2] = reg[1]; -+ reg[1] = reg[0]; -+ reg[12] = reg[12] ^ temp; -+ reg[5] = reg[5] ^ temp; -+ reg[0] = temp; -+ } -+ for (i = 0; i < 16; i++) /* take one's complement and bit reverse*/ -+ out[i] = 1 - reg[15 - i]; -+} -+ -+ -+ -+/*======================================== -+ SFD SIGNAL SERVICE LENGTH CRC -+ 16 bit 8 bit 8 bit 16 bit 16 bit -+========================================*/ -+void CCK_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo -+) -+{ -+ double ratio = 0; -+ bool crc16_in[32] = {0}, crc16_out[16] = {0}; -+ bool LengthExtBit; -+ double LengthExact; -+ double LengthPSDU; -+ u8 i; -+ u32 PacketLength = pPMacTxInfo->PacketLength; -+ -+ if (pPMacTxInfo->bSPreamble) -+ pPMacTxInfo->SFD = 0x05CF; -+ else -+ pPMacTxInfo->SFD = 0xF3A0; -+ -+ switch (pPMacPktInfo->MCS) { -+ case 0: -+ pPMacTxInfo->SignalField = 0xA; -+ ratio = 8; -+ /*CRC16_in(1,0:7)=[0 1 0 1 0 0 0 0]*/ -+ crc16_in[1] = crc16_in[3] = 1; -+ break; -+ case 1: -+ pPMacTxInfo->SignalField = 0x14; -+ ratio = 4; -+ /*CRC16_in(1,0:7)=[0 0 1 0 1 0 0 0];*/ -+ crc16_in[2] = crc16_in[4] = 1; -+ break; -+ case 2: -+ pPMacTxInfo->SignalField = 0x37; -+ ratio = 8.0 / 5.5; -+ /*CRC16_in(1,0:7)=[1 1 1 0 1 1 0 0];*/ -+ crc16_in[0] = crc16_in[1] = crc16_in[2] = crc16_in[4] = crc16_in[5] = 1; -+ break; -+ case 3: -+ pPMacTxInfo->SignalField = 0x6E; -+ ratio = 8.0 / 11.0; -+ /*CRC16_in(1,0:7)=[0 1 1 1 0 1 1 0];*/ -+ crc16_in[1] = crc16_in[2] = crc16_in[3] = crc16_in[5] = crc16_in[6] = 1; -+ break; -+ } -+ -+ LengthExact = PacketLength * ratio; -+ LengthPSDU = ceil(LengthExact); -+ -+ if ((pPMacPktInfo->MCS == 3) && -+ ((LengthPSDU - LengthExact) >= 0.727 || (LengthPSDU - LengthExact) <= -0.727)) -+ LengthExtBit = 1; -+ else -+ LengthExtBit = 0; -+ -+ -+ pPMacTxInfo->LENGTH = (u32)LengthPSDU; -+ /* CRC16_in(1,16:31) = LengthPSDU[0:15]*/ -+ for (i = 0; i < 16; i++) -+ crc16_in[i + 16] = (pPMacTxInfo->LENGTH >> i) & 0x1; -+ -+ if (LengthExtBit == 0) { -+ pPMacTxInfo->ServiceField = 0x0; -+ /* CRC16_in(1,8:15) = [0 0 0 0 0 0 0 0];*/ -+ } else { -+ pPMacTxInfo->ServiceField = 0x80; -+ /*CRC16_in(1,8:15)=[0 0 0 0 0 0 0 1];*/ -+ crc16_in[15] = 1; -+ } -+ -+ CRC16_generator(crc16_out, crc16_in, 32); -+ -+ _rtw_memset(pPMacTxInfo->CRC16, 0, 2); -+ ByteToBit(pPMacTxInfo->CRC16, crc16_out, 2); -+ -+} -+ -+ -+void PMAC_Get_Pkt_Param( -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo) -+{ -+ -+ u8 TX_RATE_HEX = 0, MCS = 0; -+ u8 TX_RATE = pPMacTxInfo->TX_RATE; -+ -+ /* TX_RATE & Nss */ -+ if (MPT_IS_2SS_RATE(TX_RATE)) -+ pPMacPktInfo->Nss = 2; -+ else if (MPT_IS_3SS_RATE(TX_RATE)) -+ pPMacPktInfo->Nss = 3; -+ else if (MPT_IS_4SS_RATE(TX_RATE)) -+ pPMacPktInfo->Nss = 4; -+ else -+ pPMacPktInfo->Nss = 1; -+ -+ RTW_INFO("PMacTxInfo.Nss =%d\n", pPMacPktInfo->Nss); -+ -+ /* MCS & TX_RATE_HEX*/ -+ if (MPT_IS_CCK_RATE(TX_RATE)) { -+ switch (TX_RATE) { -+ case MPT_RATE_1M: -+ TX_RATE_HEX = MCS = 0; -+ break; -+ case MPT_RATE_2M: -+ TX_RATE_HEX = MCS = 1; -+ break; -+ case MPT_RATE_55M: -+ TX_RATE_HEX = MCS = 2; -+ break; -+ case MPT_RATE_11M: -+ TX_RATE_HEX = MCS = 3; -+ break; -+ } -+ } else if (MPT_IS_OFDM_RATE(TX_RATE)) { -+ MCS = TX_RATE - MPT_RATE_6M; -+ TX_RATE_HEX = MCS + 4; -+ } else if (MPT_IS_HT_RATE(TX_RATE)) { -+ MCS = TX_RATE - MPT_RATE_MCS0; -+ TX_RATE_HEX = MCS + 12; -+ } else if (MPT_IS_VHT_RATE(TX_RATE)) { -+ TX_RATE_HEX = TX_RATE - MPT_RATE_VHT1SS_MCS0 + 44; -+ -+ if (MPT_IS_VHT_2S_RATE(TX_RATE)) -+ MCS = TX_RATE - MPT_RATE_VHT2SS_MCS0; -+ else if (MPT_IS_VHT_3S_RATE(TX_RATE)) -+ MCS = TX_RATE - MPT_RATE_VHT3SS_MCS0; -+ else if (MPT_IS_VHT_4S_RATE(TX_RATE)) -+ MCS = TX_RATE - MPT_RATE_VHT4SS_MCS0; -+ else -+ MCS = TX_RATE - MPT_RATE_VHT1SS_MCS0; -+ } -+ -+ pPMacPktInfo->MCS = MCS; -+ pPMacTxInfo->TX_RATE_HEX = TX_RATE_HEX; -+ -+ RTW_INFO(" MCS=%d, TX_RATE_HEX =0x%x\n", MCS, pPMacTxInfo->TX_RATE_HEX); -+ /* mSTBC & Nsts*/ -+ pPMacPktInfo->Nsts = pPMacPktInfo->Nss; -+ if (pPMacTxInfo->bSTBC) { -+ if (pPMacPktInfo->Nss == 1) { -+ pPMacTxInfo->m_STBC = 2; -+ pPMacPktInfo->Nsts = pPMacPktInfo->Nss * 2; -+ } else -+ pPMacTxInfo->m_STBC = 1; -+ } else -+ pPMacTxInfo->m_STBC = 1; -+} -+ -+ -+u32 LDPC_parameter_generator( -+ u32 N_pld_int, -+ u32 N_CBPSS, -+ u32 N_SS, -+ u32 R, -+ u32 m_STBC, -+ u32 N_TCB_int -+) -+{ -+ double CR = 0.; -+ double N_pld = (double)N_pld_int; -+ double N_TCB = (double)N_TCB_int; -+ double N_CW = 0., N_shrt = 0., N_spcw = 0., N_fshrt = 0.; -+ double L_LDPC = 0., K_LDPC = 0., L_LDPC_info = 0.; -+ double N_punc = 0., N_ppcw = 0., N_fpunc = 0., N_rep = 0., N_rpcw = 0., N_frep = 0.; -+ double R_eff = 0.; -+ u32 VHTSIGA2B3 = 0;/* extra symbol from VHT-SIG-A2 Bit 3*/ -+ -+ if (R == 0) -+ CR = 0.5; -+ else if (R == 1) -+ CR = 2. / 3.; -+ else if (R == 2) -+ CR = 3. / 4.; -+ else if (R == 3) -+ CR = 5. / 6.; -+ -+ if (N_TCB <= 648.) { -+ N_CW = 1.; -+ if (N_TCB >= N_pld + 912.*(1. - CR)) -+ L_LDPC = 1296.; -+ else -+ L_LDPC = 648.; -+ } else if (N_TCB <= 1296.) { -+ N_CW = 1.; -+ if (N_TCB >= (double)N_pld + 1464.*(1. - CR)) -+ L_LDPC = 1944.; -+ else -+ L_LDPC = 1296.; -+ } else if (N_TCB <= 1944.) { -+ N_CW = 1.; -+ L_LDPC = 1944.; -+ } else if (N_TCB <= 2592.) { -+ N_CW = 2.; -+ if (N_TCB >= N_pld + 2916.*(1. - CR)) -+ L_LDPC = 1944.; -+ else -+ L_LDPC = 1296.; -+ } else { -+ N_CW = ceil(N_pld / 1944. / CR); -+ L_LDPC = 1944.; -+ } -+ /* Number of information bits per CW*/ -+ K_LDPC = L_LDPC * CR; -+ /* Number of shortening bits max(0, (N_CW * L_LDPC * R) - N_pld)*/ -+ N_shrt = (N_CW * K_LDPC - N_pld) > 0. ? (N_CW * K_LDPC - N_pld) : 0.; -+ /* Number of shortening bits per CW N_spcw = rtfloor(N_shrt/N_CW)*/ -+ N_spcw = rtfloor(N_shrt / N_CW); -+ /* The first N_fshrt CWs shorten 1 bit more*/ -+ N_fshrt = (double)((int)N_shrt % (int)N_CW); -+ /* Number of data bits for the last N_CW-N_fshrt CWs*/ -+ L_LDPC_info = K_LDPC - N_spcw; -+ /* Number of puncturing bits*/ -+ N_punc = (N_CW * L_LDPC - N_TCB - N_shrt) > 0. ? (N_CW * L_LDPC - N_TCB - N_shrt) : 0.; -+ if (((N_punc > .1 * N_CW * L_LDPC * (1. - CR)) && (N_shrt < 1.2 * N_punc * CR / (1. - CR))) || -+ (N_punc > 0.3 * N_CW * L_LDPC * (1. - CR))) { -+ /*cout << "*** N_TCB and N_punc are Recomputed ***" << endl;*/ -+ VHTSIGA2B3 = 1; -+ N_TCB += (double)N_CBPSS * N_SS * m_STBC; -+ N_punc = (N_CW * L_LDPC - N_TCB - N_shrt) > 0. ? (N_CW * L_LDPC - N_TCB - N_shrt) : 0.; -+ } else -+ VHTSIGA2B3 = 0; -+ -+ return VHTSIGA2B3; -+} /* function end of LDPC_parameter_generator */ -+ -+/*======================================== -+ Data field of PPDU -+ Get N_sym and SIGA2BB3 -+========================================*/ -+void PMAC_Nsym_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo) -+{ -+ u32 SIGA2B3 = 0; -+ u8 TX_RATE = pPMacTxInfo->TX_RATE; -+ -+ u32 R, R_list[10] = {0, 0, 2, 0, 2, 1, 2, 3, 2, 3}; -+ double CR = 0; -+ u32 N_SD, N_BPSC_list[10] = {1, 2, 2, 4, 4, 6, 6, 6, 8, 8}; -+ u32 N_BPSC = 0, N_CBPS = 0, N_DBPS = 0, N_ES = 0, N_SYM = 0, N_pld = 0, N_TCB = 0; -+ int D_R = 0; -+ -+ RTW_INFO("TX_RATE = %d\n", TX_RATE); -+ /* N_SD*/ -+ if (pPMacTxInfo->BandWidth == 0) -+ N_SD = 52; -+ else if (pPMacTxInfo->BandWidth == 1) -+ N_SD = 108; -+ else -+ N_SD = 234; -+ -+ if (MPT_IS_HT_RATE(TX_RATE)) { -+ u8 MCS_temp; -+ -+ if (pPMacPktInfo->MCS > 23) -+ MCS_temp = pPMacPktInfo->MCS - 24; -+ else if (pPMacPktInfo->MCS > 15) -+ MCS_temp = pPMacPktInfo->MCS - 16; -+ else if (pPMacPktInfo->MCS > 7) -+ MCS_temp = pPMacPktInfo->MCS - 8; -+ else -+ MCS_temp = pPMacPktInfo->MCS; -+ -+ R = R_list[MCS_temp]; -+ -+ switch (R) { -+ case 0: -+ CR = .5; -+ break; -+ case 1: -+ CR = 2. / 3.; -+ break; -+ case 2: -+ CR = 3. / 4.; -+ break; -+ case 3: -+ CR = 5. / 6.; -+ break; -+ } -+ -+ N_BPSC = N_BPSC_list[MCS_temp]; -+ N_CBPS = N_BPSC * N_SD * pPMacPktInfo->Nss; -+ N_DBPS = (u32)((double)N_CBPS * CR); -+ -+ if (pPMacTxInfo->bLDPC == FALSE) { -+ N_ES = (u32)ceil((double)(N_DBPS * pPMacPktInfo->Nss) / 4. / 300.); -+ RTW_INFO("N_ES = %d\n", N_ES); -+ -+ /* N_SYM = m_STBC* (8*length+16+6*N_ES) / (m_STBC*N_DBPS)*/ -+ N_SYM = pPMacTxInfo->m_STBC * (u32)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16 + N_ES * 6) / -+ (double)(N_DBPS * pPMacTxInfo->m_STBC)); -+ -+ } else { -+ N_ES = 1; -+ /* N_pld = length * 8 + 16*/ -+ N_pld = pPMacTxInfo->PacketLength * 8 + 16; -+ RTW_INFO("N_pld = %d\n", N_pld); -+ N_SYM = pPMacTxInfo->m_STBC * (u32)ceil((double)(N_pld) / -+ (double)(N_DBPS * pPMacTxInfo->m_STBC)); -+ RTW_INFO("N_SYM = %d\n", N_SYM); -+ /* N_avbits = N_CBPS *m_STBC *(N_pld/N_CBPS*R*m_STBC)*/ -+ N_TCB = N_CBPS * N_SYM; -+ RTW_INFO("N_TCB = %d\n", N_TCB); -+ SIGA2B3 = LDPC_parameter_generator(N_pld, N_CBPS, pPMacPktInfo->Nss, R, pPMacTxInfo->m_STBC, N_TCB); -+ RTW_INFO("SIGA2B3 = %d\n", SIGA2B3); -+ N_SYM = N_SYM + SIGA2B3 * pPMacTxInfo->m_STBC; -+ RTW_INFO("N_SYM = %d\n", N_SYM); -+ } -+ } else if (MPT_IS_VHT_RATE(TX_RATE)) { -+ R = R_list[pPMacPktInfo->MCS]; -+ -+ switch (R) { -+ case 0: -+ CR = .5; -+ break; -+ case 1: -+ CR = 2. / 3.; -+ break; -+ case 2: -+ CR = 3. / 4.; -+ break; -+ case 3: -+ CR = 5. / 6.; -+ break; -+ } -+ N_BPSC = N_BPSC_list[pPMacPktInfo->MCS]; -+ N_CBPS = N_BPSC * N_SD * pPMacPktInfo->Nss; -+ N_DBPS = (u32)((double)N_CBPS * CR); -+ if (pPMacTxInfo->bLDPC == FALSE) { -+ if (pPMacTxInfo->bSGI) -+ N_ES = (u32)ceil((double)(N_DBPS) / 3.6 / 600.); -+ else -+ N_ES = (u32)ceil((double)(N_DBPS) / 4. / 600.); -+ /* N_SYM = m_STBC* (8*length+16+6*N_ES) / (m_STBC*N_DBPS)*/ -+ N_SYM = pPMacTxInfo->m_STBC * (u32)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16 + N_ES * 6) / (double)(N_DBPS * pPMacTxInfo->m_STBC)); -+ SIGA2B3 = 0; -+ } else { -+ N_ES = 1; -+ /* N_SYM = m_STBC* (8*length+N_service) / (m_STBC*N_DBPS)*/ -+ N_SYM = pPMacTxInfo->m_STBC * (u32)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16) / (double)(N_DBPS * pPMacTxInfo->m_STBC)); -+ /* N_avbits = N_sys_init * N_CBPS*/ -+ N_TCB = N_CBPS * N_SYM; -+ /* N_pld = N_sys_init * N_DBPS*/ -+ N_pld = N_SYM * N_DBPS; -+ SIGA2B3 = LDPC_parameter_generator(N_pld, N_CBPS, pPMacPktInfo->Nss, R, pPMacTxInfo->m_STBC, N_TCB); -+ N_SYM = N_SYM + SIGA2B3 * pPMacTxInfo->m_STBC; -+ } -+ -+ switch (R) { -+ case 0: -+ D_R = 2; -+ break; -+ case 1: -+ D_R = 3; -+ break; -+ case 2: -+ D_R = 4; -+ break; -+ case 3: -+ D_R = 6; -+ break; -+ } -+ -+ if (((N_CBPS / N_ES) % D_R) != 0) { -+ RTW_INFO("MCS= %d is not supported when Nss=%d and BW= %d !!\n", pPMacPktInfo->MCS, pPMacPktInfo->Nss, pPMacTxInfo->BandWidth); -+ return; -+ } -+ -+ RTW_INFO("MCS= %d Nss=%d and BW= %d !!\n", pPMacPktInfo->MCS, pPMacPktInfo->Nss, pPMacTxInfo->BandWidth); -+ } -+ -+ pPMacPktInfo->N_sym = N_SYM; -+ pPMacPktInfo->SIGA2B3 = SIGA2B3; -+} -+ -+/*======================================== -+ L-SIG Rate R Length P Tail -+ 4b 1b 12b 1b 6b -+========================================*/ -+ -+void L_SIG_generator( -+ u32 N_SYM, /* Max: 750*/ -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo) -+{ -+ u8 sig_bi[24] = {0}; /* 24 BIT*/ -+ u32 mode, LENGTH; -+ int i; -+ -+ if (MPT_IS_OFDM_RATE(pPMacTxInfo->TX_RATE)) { -+ mode = pPMacPktInfo->MCS; -+ LENGTH = pPMacTxInfo->PacketLength; -+ } else { -+ u8 N_LTF; -+ double T_data; -+ u32 OFDM_symbol; -+ -+ mode = 0; -+ -+ /* Table 20-13 Num of HT-DLTFs request*/ -+ if (pPMacPktInfo->Nsts <= 2) -+ N_LTF = pPMacPktInfo->Nsts; -+ else -+ N_LTF = 4; -+ -+ if (pPMacTxInfo->bSGI) -+ T_data = 3.6; -+ else -+ T_data = 4.0; -+ -+ /*(L-SIG, HT-SIG, HT-STF, HT-LTF....HT-LTF, Data)*/ -+ if (MPT_IS_VHT_RATE(pPMacTxInfo->TX_RATE)) -+ OFDM_symbol = (u32)ceil((double)(8 + 4 + N_LTF * 4 + N_SYM * T_data + 4) / 4.); -+ else -+ OFDM_symbol = (u32)ceil((double)(8 + 4 + N_LTF * 4 + N_SYM * T_data) / 4.); -+ -+ RTW_INFO("%s , OFDM_symbol =%d\n", __func__, OFDM_symbol); -+ LENGTH = OFDM_symbol * 3 - 3; -+ RTW_INFO("%s , LENGTH =%d\n", __func__, LENGTH); -+ -+ } -+ /* Rate Field*/ -+ switch (mode) { -+ case 0: -+ sig_bi[0] = 1; -+ sig_bi[1] = 1; -+ sig_bi[2] = 0; -+ sig_bi[3] = 1; -+ break; -+ case 1: -+ sig_bi[0] = 1; -+ sig_bi[1] = 1; -+ sig_bi[2] = 1; -+ sig_bi[3] = 1; -+ break; -+ case 2: -+ sig_bi[0] = 0; -+ sig_bi[1] = 1; -+ sig_bi[2] = 0; -+ sig_bi[3] = 1; -+ break; -+ case 3: -+ sig_bi[0] = 0; -+ sig_bi[1] = 1; -+ sig_bi[2] = 1; -+ sig_bi[3] = 1; -+ break; -+ case 4: -+ sig_bi[0] = 1; -+ sig_bi[1] = 0; -+ sig_bi[2] = 0; -+ sig_bi[3] = 1; -+ break; -+ case 5: -+ sig_bi[0] = 1; -+ sig_bi[1] = 0; -+ sig_bi[2] = 1; -+ sig_bi[3] = 1; -+ break; -+ case 6: -+ sig_bi[0] = 0; -+ sig_bi[1] = 0; -+ sig_bi[2] = 0; -+ sig_bi[3] = 1; -+ break; -+ case 7: -+ sig_bi[0] = 0; -+ sig_bi[1] = 0; -+ sig_bi[2] = 1; -+ sig_bi[3] = 1; -+ break; -+ } -+ /*Reserved bit*/ -+ sig_bi[4] = 0; -+ -+ /* Length Field*/ -+ for (i = 0; i < 12; i++) -+ sig_bi[i + 5] = (LENGTH >> i) & 1; -+ -+ /* Parity Bit*/ -+ sig_bi[17] = 0; -+ for (i = 0; i < 17; i++) -+ sig_bi[17] = sig_bi[17] + sig_bi[i]; -+ -+ sig_bi[17] %= 2; -+ -+ /* Tail Field*/ -+ for (i = 18; i < 24; i++) -+ sig_bi[i] = 0; -+ -+ /* dump_buf(sig_bi,24);*/ -+ _rtw_memset(pPMacTxInfo->LSIG, 0, 3); -+ ByteToBit(pPMacTxInfo->LSIG, (bool *)sig_bi, 3); -+} -+ -+ -+void CRC8_generator( -+ bool *out, -+ bool *in, -+ u8 in_size -+) -+{ -+ u8 i = 0; -+ bool temp = 0, reg[] = {1, 1, 1, 1, 1, 1, 1, 1}; -+ -+ for (i = 0; i < in_size; i++) { /* take one's complement and bit reverse*/ -+ temp = in[i] ^ reg[7]; -+ reg[7] = reg[6]; -+ reg[6] = reg[5]; -+ reg[5] = reg[4]; -+ reg[4] = reg[3]; -+ reg[3] = reg[2]; -+ reg[2] = reg[1] ^ temp; -+ reg[1] = reg[0] ^ temp; -+ reg[0] = temp; -+ } -+ for (i = 0; i < 8; i++)/* take one's complement and bit reverse*/ -+ out[i] = reg[7 - i] ^ 1; -+} -+ -+/*/================================================================================ -+ HT-SIG1 MCS CW Length 24BIT + 24BIT -+ 7b 1b 16b -+ HT-SIG2 Smoothing Not sounding Rsvd AGG STBC FEC SGI N_ELTF CRC Tail -+ 1b 1b 1b 1b 2b 1b 1b 2b 8b 6b -+================================================================================*/ -+void HT_SIG_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo -+) -+{ -+ u32 i; -+ bool sig_bi[48] = {0}, crc8[8] = {0}; -+ /* MCS Field*/ -+ for (i = 0; i < 7; i++) -+ sig_bi[i] = (pPMacPktInfo->MCS >> i) & 0x1; -+ /* Packet BW Setting*/ -+ sig_bi[7] = pPMacTxInfo->BandWidth; -+ /* HT-Length Field*/ -+ for (i = 0; i < 16; i++) -+ sig_bi[i + 8] = (pPMacTxInfo->PacketLength >> i) & 0x1; -+ /* Smoothing; 1->allow smoothing*/ -+ sig_bi[24] = 1; -+ /*Not Sounding*/ -+ sig_bi[25] = 1 - pPMacTxInfo->NDP_sound; -+ /*Reserved bit*/ -+ sig_bi[26] = 1; -+ /*/Aggregate*/ -+ sig_bi[27] = 0; -+ /*STBC Field*/ -+ if (pPMacTxInfo->bSTBC) { -+ sig_bi[28] = 1; -+ sig_bi[29] = 0; -+ } else { -+ sig_bi[28] = 0; -+ sig_bi[29] = 0; -+ } -+ /*Advance Coding, 0: BCC, 1: LDPC*/ -+ sig_bi[30] = pPMacTxInfo->bLDPC; -+ /* Short GI*/ -+ sig_bi[31] = pPMacTxInfo->bSGI; -+ /* N_ELTFs*/ -+ if (pPMacTxInfo->NDP_sound == FALSE) { -+ sig_bi[32] = 0; -+ sig_bi[33] = 0; -+ } else { -+ int N_ELTF = pPMacTxInfo->Ntx - pPMacPktInfo->Nss; -+ -+ for (i = 0; i < 2; i++) -+ sig_bi[32 + i] = (N_ELTF >> i) % 2; -+ } -+ /* CRC-8*/ -+ CRC8_generator(crc8, sig_bi, 34); -+ -+ for (i = 0; i < 8; i++) -+ sig_bi[34 + i] = crc8[i]; -+ -+ /*Tail*/ -+ for (i = 42; i < 48; i++) -+ sig_bi[i] = 0; -+ -+ _rtw_memset(pPMacTxInfo->HT_SIG, 0, 6); -+ ByteToBit(pPMacTxInfo->HT_SIG, sig_bi, 6); -+} -+ -+ -+/*====================================================================================== -+ VHT-SIG-A1 -+ BW Reserved STBC G_ID SU_Nsts P_AID TXOP_PS_NOT_ALLOW Reserved -+ 2b 1b 1b 6b 3b 9b 1b 2b 1b -+ VHT-SIG-A2 -+ SGI SGI_Nsym SU/MU coding LDPC_Extra SU_NCS Beamformed Reserved CRC Tail -+ 1b 1b 1b 1b 4b 1b 1b 8b 6b -+======================================================================================*/ -+void VHT_SIG_A_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo) -+{ -+ u32 i; -+ bool sig_bi[48], crc8[8]; -+ -+ _rtw_memset(sig_bi, 0, 48); -+ _rtw_memset(crc8, 0, 8); -+ -+ /* BW Setting*/ -+ for (i = 0; i < 2; i++) -+ sig_bi[i] = (pPMacTxInfo->BandWidth >> i) & 0x1; -+ /* Reserved Bit*/ -+ sig_bi[2] = 1; -+ /*STBC Field*/ -+ sig_bi[3] = pPMacTxInfo->bSTBC; -+ /*Group ID: Single User->A value of 0 or 63 indicates an SU PPDU. */ -+ for (i = 0; i < 6; i++) -+ sig_bi[4 + i] = 0; -+ /* N_STS/Partial AID*/ -+ for (i = 0; i < 12; i++) { -+ if (i < 3) -+ sig_bi[10 + i] = ((pPMacPktInfo->Nsts - 1) >> i) & 0x1; -+ else -+ sig_bi[10 + i] = 0; -+ } -+ /*TXOP_PS_NOT_ALLPWED*/ -+ sig_bi[22] = 0; -+ /*Reserved Bits*/ -+ sig_bi[23] = 1; -+ /*Short GI*/ -+ sig_bi[24] = pPMacTxInfo->bSGI; -+ if (pPMacTxInfo->bSGI > 0 && (pPMacPktInfo->N_sym % 10) == 9) -+ sig_bi[25] = 1; -+ else -+ sig_bi[25] = 0; -+ /* SU/MU[0] Coding*/ -+ sig_bi[26] = pPMacTxInfo->bLDPC; /* 0:BCC, 1:LDPC */ -+ sig_bi[27] = pPMacPktInfo->SIGA2B3; /*/ Record Extra OFDM Symols is added or not when LDPC is used*/ -+ /*SU MCS/MU[1-3] Coding*/ -+ for (i = 0; i < 4; i++) -+ sig_bi[28 + i] = (pPMacPktInfo->MCS >> i) & 0x1; -+ /*SU Beamform */ -+ sig_bi[32] = 0; /*packet.TXBF_en;*/ -+ /*Reserved Bit*/ -+ sig_bi[33] = 1; -+ /*CRC-8*/ -+ CRC8_generator(crc8, sig_bi, 34); -+ for (i = 0; i < 8; i++) -+ sig_bi[34 + i] = crc8[i]; -+ /*Tail*/ -+ for (i = 42; i < 48; i++) -+ sig_bi[i] = 0; -+ -+ _rtw_memset(pPMacTxInfo->VHT_SIG_A, 0, 6); -+ ByteToBit(pPMacTxInfo->VHT_SIG_A, sig_bi, 6); -+} -+ -+/*====================================================================================== -+ VHT-SIG-B -+ Length Resesrved Trail -+ 17/19/21 BIT 3/2/2 BIT 6b -+======================================================================================*/ -+void VHT_SIG_B_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo) -+{ -+ bool sig_bi[32], crc8_bi[8]; -+ u32 i, len, res, tail = 6, total_len, crc8_in_len; -+ u32 sigb_len; -+ -+ _rtw_memset(sig_bi, 0, 32); -+ _rtw_memset(crc8_bi, 0, 8); -+ -+ /*Sounding Packet*/ -+ if (pPMacTxInfo->NDP_sound == 1) { -+ if (pPMacTxInfo->BandWidth == 0) { -+ bool sigb_temp[26] = {0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0}; -+ -+ _rtw_memcpy(sig_bi, sigb_temp, 26); -+ } else if (pPMacTxInfo->BandWidth == 1) { -+ bool sigb_temp[27] = {1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0}; -+ -+ _rtw_memcpy(sig_bi, sigb_temp, 27); -+ } else if (pPMacTxInfo->BandWidth == 2) { -+ bool sigb_temp[29] = {0, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0}; -+ -+ _rtw_memcpy(sig_bi, sigb_temp, 29); -+ } -+ } else { /* Not NDP Sounding*/ -+ bool *sigb_temp[29] = {0}; -+ -+ if (pPMacTxInfo->BandWidth == 0) { -+ len = 17; -+ res = 3; -+ } else if (pPMacTxInfo->BandWidth == 1) { -+ len = 19; -+ res = 2; -+ } else if (pPMacTxInfo->BandWidth == 2) { -+ len = 21; -+ res = 2; -+ } else { -+ len = 21; -+ res = 2; -+ } -+ total_len = len + res + tail; -+ crc8_in_len = len + res; -+ -+ /*Length Field*/ -+ sigb_len = (pPMacTxInfo->PacketLength + 3) >> 2; -+ -+ for (i = 0; i < len; i++) -+ sig_bi[i] = (sigb_len >> i) & 0x1; -+ /*Reserved Field*/ -+ for (i = 0; i < res; i++) -+ sig_bi[len + i] = 1; -+ /* CRC-8*/ -+ CRC8_generator(crc8_bi, sig_bi, crc8_in_len); -+ -+ /* Tail */ -+ for (i = 0; i < tail; i++) -+ sig_bi[len + res + i] = 0; -+ } -+ -+ _rtw_memset(pPMacTxInfo->VHT_SIG_B, 0, 4); -+ ByteToBit(pPMacTxInfo->VHT_SIG_B, sig_bi, 4); -+ -+ pPMacTxInfo->VHT_SIG_B_CRC = 0; -+ ByteToBit(&(pPMacTxInfo->VHT_SIG_B_CRC), crc8_bi, 1); -+} -+ -+/*======================= -+ VHT Delimiter -+=======================*/ -+void VHT_Delimiter_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo -+) -+{ -+ bool sig_bi[32] = {0}, crc8[8] = {0}; -+ u32 crc8_in_len = 16; -+ u32 PacketLength = pPMacTxInfo->PacketLength; -+ int j; -+ -+ /* Delimiter[0]: EOF*/ -+ sig_bi[0] = 1; -+ /* Delimiter[1]: Reserved*/ -+ sig_bi[1] = 0; -+ /* Delimiter[3:2]: MPDU Length High*/ -+ sig_bi[2] = ((PacketLength - 4) >> 12) % 2; -+ sig_bi[3] = ((PacketLength - 4) >> 13) % 2; -+ /* Delimiter[15:4]: MPDU Length Low*/ -+ for (j = 4; j < 16; j++) -+ sig_bi[j] = ((PacketLength - 4) >> (j - 4)) % 2; -+ CRC8_generator(crc8, sig_bi, crc8_in_len); -+ for (j = 16; j < 24; j++) /* Delimiter[23:16]: CRC 8*/ -+ sig_bi[j] = crc8[j - 16]; -+ for (j = 24; j < 32; j++) /* Delimiter[31:24]: Signature ('4E' in Hex, 78 in Dec)*/ -+ sig_bi[j] = (78 >> (j - 24)) % 2; -+ -+ _rtw_memset(pPMacTxInfo->VHT_Delimiter, 0, 4); -+ ByteToBit(pPMacTxInfo->VHT_Delimiter, sig_bi, 4); -+} -+ -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/core/rtw_odm.c b/drivers/staging/rtl8723cs/core/rtw_odm.c -new file mode 100644 -index 000000000000..9651d4fdd045 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_odm.c -@@ -0,0 +1,600 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+ -+u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); -+ struct dm_struct *podmpriv = &pHalData->odmpriv; -+ u32 result = 0; -+ -+ switch (ops) { -+ case HAL_PHYDM_DIS_ALL_FUNC: -+ podmpriv->support_ability = DYNAMIC_FUNC_DISABLE; -+ halrf_cmn_info_set(podmpriv, HALRF_CMNINFO_ABILITY, DYNAMIC_FUNC_DISABLE); -+ break; -+ case HAL_PHYDM_FUNC_SET: -+ podmpriv->support_ability |= ability; -+ break; -+ case HAL_PHYDM_FUNC_CLR: -+ podmpriv->support_ability &= ~(ability); -+ break; -+ case HAL_PHYDM_ABILITY_BK: -+ /* dm flag backup*/ -+ podmpriv->bk_support_ability = podmpriv->support_ability; -+ pHalData->bk_rf_ability = halrf_cmn_info_get(podmpriv, HALRF_CMNINFO_ABILITY); -+ break; -+ case HAL_PHYDM_ABILITY_RESTORE: -+ /* restore dm flag */ -+ podmpriv->support_ability = podmpriv->bk_support_ability; -+ halrf_cmn_info_set(podmpriv, HALRF_CMNINFO_ABILITY, pHalData->bk_rf_ability); -+ break; -+ case HAL_PHYDM_ABILITY_SET: -+ podmpriv->support_ability = ability; -+ break; -+ case HAL_PHYDM_ABILITY_GET: -+ result = podmpriv->support_ability; -+ break; -+ } -+ return result; -+} -+ -+/* set ODM_CMNINFO_IC_TYPE based on chip_type */ -+void rtw_odm_init_ic_type(_adapter *adapter) -+{ -+ struct dm_struct *odm = adapter_to_phydm(adapter); -+ u32 ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter)); -+ -+ rtw_warn_on(!ic_type); -+ -+ odm_cmn_info_init(odm, ODM_CMNINFO_IC_TYPE, ic_type); -+} -+ -+void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter) -+{ -+ RTW_PRINT_SEL(sel, "ADAPTIVITY_VERSION "ADAPTIVITY_VERSION"\n"); -+} -+ -+#define RTW_ADAPTIVITY_EN_DISABLE 0 -+#define RTW_ADAPTIVITY_EN_ENABLE 1 -+ -+void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter) -+{ -+ struct registry_priv *regsty = &adapter->registrypriv; -+ -+ RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_EN_"); -+ -+ if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE) -+ _RTW_PRINT_SEL(sel, "DISABLE\n"); -+ else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) -+ _RTW_PRINT_SEL(sel, "ENABLE\n"); -+ else -+ _RTW_PRINT_SEL(sel, "INVALID\n"); -+} -+ -+#define RTW_ADAPTIVITY_MODE_NORMAL 0 -+#define RTW_ADAPTIVITY_MODE_CARRIER_SENSE 1 -+ -+void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter) -+{ -+ struct registry_priv *regsty = &adapter->registrypriv; -+ -+ RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_MODE_"); -+ -+ if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL) -+ _RTW_PRINT_SEL(sel, "NORMAL\n"); -+ else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE) -+ _RTW_PRINT_SEL(sel, "CARRIER_SENSE\n"); -+ else -+ _RTW_PRINT_SEL(sel, "INVALID\n"); -+} -+ -+void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter) -+{ -+ rtw_odm_adaptivity_ver_msg(sel, adapter); -+ rtw_odm_adaptivity_en_msg(sel, adapter); -+ rtw_odm_adaptivity_mode_msg(sel, adapter); -+} -+ -+bool rtw_odm_adaptivity_needed(_adapter *adapter) -+{ -+ struct registry_priv *regsty = &adapter->registrypriv; -+ bool ret = _FALSE; -+ -+ if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) -+ ret = _TRUE; -+ -+ return ret; -+} -+ -+void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter) -+{ -+ struct dm_struct *odm = adapter_to_phydm(adapter); -+ -+ rtw_odm_adaptivity_config_msg(sel, adapter); -+ -+ RTW_PRINT_SEL(sel, "%10s %16s\n" -+ , "th_l2h_ini", "th_edcca_hl_diff"); -+ RTW_PRINT_SEL(sel, "0x%-8x %-16d\n" -+ , (u8)odm->th_l2h_ini -+ , odm->th_edcca_hl_diff -+ ); -+} -+ -+void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff) -+{ -+ struct dm_struct *odm = adapter_to_phydm(adapter); -+ -+ odm->th_l2h_ini = th_l2h_ini; -+ odm->th_edcca_hl_diff = th_edcca_hl_diff; -+} -+ -+void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter) -+{ -+ struct dm_struct *odm = adapter_to_phydm(adapter); -+ -+ RTW_PRINT_SEL(sel, "rx_rate = %s, rssi_a = %d(%%), rssi_b = %d(%%)\n", -+ HDATA_RATE(odm->rx_rate), odm->rssi_a, odm->rssi_b); -+} -+ -+ -+void rtw_odm_acquirespinlock(_adapter *adapter, enum rt_spinlock_type type) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); -+ _irqL irqL; -+ -+ switch (type) { -+ case RT_IQK_SPINLOCK: -+ _enter_critical_bh(&pHalData->IQKSpinLock, &irqL); -+ default: -+ break; -+ } -+} -+ -+void rtw_odm_releasespinlock(_adapter *adapter, enum rt_spinlock_type type) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); -+ _irqL irqL; -+ -+ switch (type) { -+ case RT_IQK_SPINLOCK: -+ _exit_critical_bh(&pHalData->IQKSpinLock, &irqL); -+ default: -+ break; -+ } -+} -+ -+s16 rtw_odm_get_tx_power_mbm(struct dm_struct *dm, u8 rfpath, u8 rate, u8 bw, u8 cch) -+{ -+ return phy_get_txpwr_single_mbm(dm->adapter, rfpath, mgn_rate_to_rs(rate), rate, bw, cch, 0, 0, 0, NULL); -+} -+ -+#ifdef CONFIG_DFS_MASTER -+inline void rtw_odm_radar_detect_reset(_adapter *adapter) -+{ -+ phydm_radar_detect_reset(adapter_to_phydm(adapter)); -+} -+ -+inline void rtw_odm_radar_detect_disable(_adapter *adapter) -+{ -+ phydm_radar_detect_disable(adapter_to_phydm(adapter)); -+} -+ -+/* called after ch, bw is set */ -+inline void rtw_odm_radar_detect_enable(_adapter *adapter) -+{ -+ phydm_radar_detect_enable(adapter_to_phydm(adapter)); -+} -+ -+inline BOOLEAN rtw_odm_radar_detect(_adapter *adapter) -+{ -+ return phydm_radar_detect(adapter_to_phydm(adapter)); -+} -+ -+static enum phydm_dfs_region_domain _rtw_dfs_regd_to_phydm[] = { -+ [RTW_DFS_REGD_NONE] = PHYDM_DFS_DOMAIN_UNKNOWN, -+ [RTW_DFS_REGD_FCC] = PHYDM_DFS_DOMAIN_FCC, -+ [RTW_DFS_REGD_MKK] = PHYDM_DFS_DOMAIN_MKK, -+ [RTW_DFS_REGD_ETSI] = PHYDM_DFS_DOMAIN_ETSI, -+}; -+ -+#define rtw_dfs_regd_to_phydm(region) (((region) >= RTW_DFS_REGD_NUM) ? _rtw_dfs_regd_to_phydm[RTW_DFS_REGD_NONE] : _rtw_dfs_regd_to_phydm[(region)]) -+ -+void rtw_odm_update_dfs_region(struct dvobj_priv *dvobj) -+{ -+ odm_cmn_info_init(dvobj_to_phydm(dvobj), ODM_CMNINFO_DFS_REGION_DOMAIN, rtw_dfs_regd_to_phydm(rtw_rfctl_get_dfs_domain(dvobj_to_rfctl(dvobj)))); -+} -+ -+inline u8 rtw_odm_radar_detect_polling_int_ms(struct dvobj_priv *dvobj) -+{ -+ return phydm_dfs_polling_time(dvobj_to_phydm(dvobj)); -+} -+#endif /* CONFIG_DFS_MASTER */ -+ -+void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys) -+{ -+#ifndef DBG_RX_PHYSTATUS_CHINFO -+#define DBG_RX_PHYSTATUS_CHINFO 0 -+#endif -+ -+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) -+ _adapter *adapter = rframe->u.hdr.adapter; -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ struct rx_pkt_attrib *attrib = &rframe->u.hdr.attrib; -+ u8 *wlanhdr = get_recvframe_data(rframe); -+ -+ if (phydm->support_ic_type & PHYSTS_2ND_TYPE_IC) { -+ /* -+ * 8723D: -+ * type_0(CCK) -+ * l_rxsc -+ * is filled with primary channel SC, not real rxsc. -+ * 0:LSC, 1:USC -+ * type_1(OFDM) -+ * rf_mode -+ * RF bandwidth when RX -+ * l_rxsc(legacy), ht_rxsc -+ * see below RXSC N-series -+ * type_2(Not used) -+ */ -+ /* -+ * 8821C, 8822B: -+ * type_0(CCK) -+ * l_rxsc -+ * is filled with primary channel SC, not real rxsc. -+ * 0:LSC, 1:USC -+ * type_1(OFDM) -+ * rf_mode -+ * RF bandwidth when RX -+ * l_rxsc(legacy), ht_rxsc -+ * see below RXSC AC-series -+ * type_2(Not used) -+ */ -+ -+ if ((*phys & 0xf) == 0) { -+ struct phy_sts_rpt_jgr2_type0 *phys_t0 = (struct phy_sts_rpt_jgr2_type0 *)phys; -+ -+ if (DBG_RX_PHYSTATUS_CHINFO) { -+ RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u)\n" -+ , *phys & 0xf -+ , MAC_ARG(get_ta(wlanhdr)) -+ , is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC" -+ , HDATA_RATE(attrib->data_rate) -+ , phys_t0->band, phys_t0->channel, phys_t0->rxsc -+ ); -+ } -+ -+ } else if ((*phys & 0xf) == 1) { -+ struct phy_sts_rpt_jgr2_type1 *phys_t1 = (struct phy_sts_rpt_jgr2_type1 *)phys; -+ u8 rxsc = (attrib->data_rate > DESC_RATE11M && attrib->data_rate < DESC_RATEMCS0) ? phys_t1->l_rxsc : phys_t1->ht_rxsc; -+ u8 pkt_cch = 0; -+ u8 pkt_bw = CHANNEL_WIDTH_20; -+ -+ #if ODM_IC_11N_SERIES_SUPPORT -+ if (phydm->support_ic_type & ODM_IC_11N_SERIES) { -+ /* RXSC N-series */ -+ #define RXSC_DUP 0 -+ #define RXSC_LSC 1 -+ #define RXSC_USC 2 -+ #define RXSC_40M 3 -+ -+ static const s8 cch_offset_by_rxsc[4] = {0, -2, 2, 0}; -+ -+ if (phys_t1->rf_mode == 0) { -+ pkt_cch = phys_t1->channel; -+ pkt_bw = CHANNEL_WIDTH_20; -+ } else if (phys_t1->rf_mode == 1) { -+ if (rxsc == RXSC_LSC || rxsc == RXSC_USC) { -+ pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc]; -+ pkt_bw = CHANNEL_WIDTH_20; -+ } else if (rxsc == RXSC_40M) { -+ pkt_cch = phys_t1->channel; -+ pkt_bw = CHANNEL_WIDTH_40; -+ } -+ } else -+ rtw_warn_on(1); -+ -+ goto type1_end; -+ } -+ #endif /* ODM_IC_11N_SERIES_SUPPORT */ -+ -+ #if ODM_IC_11AC_SERIES_SUPPORT -+ if (phydm->support_ic_type & ODM_IC_11AC_SERIES) { -+ /* RXSC AC-series */ -+ #define RXSC_DUP 0 /* 0: RX from all SC of current rf_mode */ -+ -+ #define RXSC_LL20M_OF_160M 8 /* 1~8: RX from 20MHz SC */ -+ #define RXSC_L20M_OF_160M 6 -+ #define RXSC_L20M_OF_80M 4 -+ #define RXSC_L20M_OF_40M 2 -+ #define RXSC_U20M_OF_40M 1 -+ #define RXSC_U20M_OF_80M 3 -+ #define RXSC_U20M_OF_160M 5 -+ #define RXSC_UU20M_OF_160M 7 -+ -+ #define RXSC_L40M_OF_160M 12 /* 9~12: RX from 40MHz SC */ -+ #define RXSC_L40M_OF_80M 10 -+ #define RXSC_U40M_OF_80M 9 -+ #define RXSC_U40M_OF_160M 11 -+ -+ #define RXSC_L80M_OF_160M 14 /* 13~14: RX from 80MHz SC */ -+ #define RXSC_U80M_OF_160M 13 -+ -+ static const s8 cch_offset_by_rxsc[15] = {0, 2, -2, 6, -6, 10, -10, 14, -14, 4, -4, 12, -12, 8, -8}; -+ -+ if (phys_t1->rf_mode == 0) { -+ /* RF 20MHz */ -+ pkt_cch = phys_t1->channel; -+ pkt_bw = CHANNEL_WIDTH_20; -+ goto type1_end; -+ } -+ -+ if (rxsc == 0) { -+ /* RF and RX with same BW */ -+ if (attrib->data_rate >= DESC_RATEMCS0) { -+ pkt_cch = phys_t1->channel; -+ pkt_bw = phys_t1->rf_mode; -+ } -+ goto type1_end; -+ } -+ -+ if ((phys_t1->rf_mode == 1 && rxsc >= 1 && rxsc <= 2) /* RF 40MHz, RX 20MHz */ -+ || (phys_t1->rf_mode == 2 && rxsc >= 1 && rxsc <= 4) /* RF 80MHz, RX 20MHz */ -+ || (phys_t1->rf_mode == 3 && rxsc >= 1 && rxsc <= 8) /* RF 160MHz, RX 20MHz */ -+ ) { -+ pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc]; -+ pkt_bw = CHANNEL_WIDTH_20; -+ } else if ((phys_t1->rf_mode == 2 && rxsc >= 9 && rxsc <= 10) /* RF 80MHz, RX 40MHz */ -+ || (phys_t1->rf_mode == 3 && rxsc >= 9 && rxsc <= 12) /* RF 160MHz, RX 40MHz */ -+ ) { -+ if (attrib->data_rate >= DESC_RATEMCS0) { -+ pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc]; -+ pkt_bw = CHANNEL_WIDTH_40; -+ } -+ } else if ((phys_t1->rf_mode == 3 && rxsc >= 13 && rxsc <= 14) /* RF 160MHz, RX 80MHz */ -+ ) { -+ if (attrib->data_rate >= DESC_RATEMCS0) { -+ pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc]; -+ pkt_bw = CHANNEL_WIDTH_80; -+ } -+ } else -+ rtw_warn_on(1); -+ -+ } -+ #endif /* ODM_IC_11AC_SERIES_SUPPORT */ -+ -+type1_end: -+ if (DBG_RX_PHYSTATUS_CHINFO) { -+ RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, rf_mode:%u, l_rxsc:%u, ht_rxsc:%u) => %u,%u\n" -+ , *phys & 0xf -+ , MAC_ARG(get_ta(wlanhdr)) -+ , is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC" -+ , HDATA_RATE(attrib->data_rate) -+ , phys_t1->band, phys_t1->channel, phys_t1->rf_mode, phys_t1->l_rxsc, phys_t1->ht_rxsc -+ , pkt_cch, pkt_bw -+ ); -+ } -+ -+ /* for now, only return cneter channel of 20MHz packet */ -+ if (pkt_cch && pkt_bw == CHANNEL_WIDTH_20) -+ attrib->ch = pkt_cch; -+ -+ } else { -+ struct phy_sts_rpt_jgr2_type2 *phys_t2 = (struct phy_sts_rpt_jgr2_type2 *)phys; -+ -+ if (DBG_RX_PHYSTATUS_CHINFO) { -+ RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u, ht_rxsc:%u)\n" -+ , *phys & 0xf -+ , MAC_ARG(get_ta(wlanhdr)) -+ , is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC" -+ , HDATA_RATE(attrib->data_rate) -+ , phys_t2->band, phys_t2->channel, phys_t2->l_rxsc, phys_t2->ht_rxsc -+ ); -+ } -+ } -+ } -+#endif /* (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) */ -+ -+} -+ -+#if defined(CONFIG_RTL8822C) && defined(CONFIG_LPS_PG) -+void -+debug_DACK( -+ struct dm_struct *dm -+) -+{ -+ //P_PHYDM_FUNC dm; -+ //dm = &(SysMib.ODM.Phydm); -+ //PIQK_OFFLOAD_PARM pIQK_info; -+ //pIQK_info= &(SysMib.ODM.IQKParm); -+ u8 i; -+ u32 temp1, temp2, temp3; -+ -+ temp1 = odm_get_bb_reg(dm, 0x1860, bMaskDWord); -+ temp2 = odm_get_bb_reg(dm, 0x4160, bMaskDWord); -+ temp3 = odm_get_bb_reg(dm, 0x9b4, bMaskDWord); -+ -+ odm_set_bb_reg(dm, 0x9b4, bMaskDWord, 0xdb66db00); -+ -+ //pathA -+ odm_set_bb_reg(dm, 0x1830, BIT(30), 0x0); -+ odm_set_bb_reg(dm, 0x1860, 0xfc000000, 0x3c); -+ -+ RTW_INFO("path A i\n"); -+ //i -+ for (i = 0; i < 0xf; i++) { -+ odm_set_bb_reg(dm, 0x18b0, 0xf0000000, i); -+ RTW_INFO("[0][0][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x2810,0x7fc0000)); -+ //pIQK_info->msbk_d[0][0][i] = (u16)odm_get_bb_reg(dm,0x2810,0x7fc0000); -+ } -+ RTW_INFO("path A q\n"); -+ //q -+ for (i = 0; i < 0xf; i++) { -+ odm_set_bb_reg(dm, 0x18cc, 0xf0000000, i); -+ RTW_INFO("[0][1][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x283c,0x7fc0000)); -+ //pIQK_info->msbk_d[0][1][i] = (u16)odm_get_bb_reg(dm,0x283c,0x7fc0000); -+ } -+ //pathB -+ odm_set_bb_reg(dm, 0x4130, BIT(30), 0x0); -+ odm_set_bb_reg(dm, 0x4160, 0xfc000000, 0x3c); -+ -+ RTW_INFO("\npath B i\n"); -+ //i -+ for (i = 0; i < 0xf; i++) { -+ odm_set_bb_reg(dm, 0x41b0, 0xf0000000, i); -+ RTW_INFO("[1][0][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x4510,0x7fc0000)); -+ //pIQK_info->msbk_d[1][0][i] = (u16)odm_get_bb_reg(dm,0x2810,0x7fc0000); -+ } -+ RTW_INFO("path B q\n"); -+ //q -+ for (i = 0; i < 0xf; i++) { -+ odm_set_bb_reg(dm, 0x41cc, 0xf0000000, i); -+ RTW_INFO("[1][1][%d] = 0x%08x\n", i, (u16)odm_get_bb_reg(dm,0x453c,0x7fc0000)); -+ //pIQK_info->msbk_d[1][1][i] = (u16)odm_get_bb_reg(dm,0x283c,0x7fc0000); -+ } -+ -+ //restore to normal -+ odm_set_bb_reg(dm, 0x1830, BIT(30), 0x1); -+ odm_set_bb_reg(dm, 0x4130, BIT(30), 0x1); -+ odm_set_bb_reg(dm, 0x1860, bMaskDWord, temp1); -+ odm_set_bb_reg(dm, 0x4160, bMaskDWord, temp2); -+ odm_set_bb_reg(dm, 0x9b4, bMaskDWord, temp3); -+ -+ -+} -+ -+void -+debug_IQK( -+ struct dm_struct *dm, -+ IN u8 idx, -+ IN u8 path -+) -+{ -+ u8 i, ch; -+ u32 tmp; -+ u32 bit_mask_20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16); -+ -+ RTW_INFO("idx = %d, path = %d\n", idx, path); -+ -+ odm_set_bb_reg(dm, 0x1b00, MASKDWORD, 0x8 | path << 1); -+ -+ if (idx == TX_IQK) {//TXCFIR -+ odm_set_bb_reg(dm, R_0x1b20, BIT(31) | BIT(30), 0x3); -+ } else {//RXCFIR -+ odm_set_bb_reg(dm, R_0x1b20, BIT(31) | BIT(30), 0x1); -+ } -+ odm_set_bb_reg(dm, R_0x1bd4, BIT(21), 0x1); -+ odm_set_bb_reg(dm, R_0x1bd4, bit_mask_20_16, 0x10); -+ for (i = 0; i <= 16; i++) { -+ odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0xe0000001 | i << 2); -+ tmp = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); -+ RTW_INFO("iqk_cfir_real[%d][%d][%d] = 0x%x\n", path, idx, i, ((tmp & 0x0fff0000) >> 16)); -+ //iqk_info->iqk_cfir_real[ch][path][idx][i] = -+ // (tmp & 0x0fff0000) >> 16; -+ RTW_INFO("iqk_cfir_imag[%d][%d][%d] = 0x%x\n", path, idx, i, (tmp & 0x0fff)); -+ //iqk_info->iqk_cfir_imag[ch][path][idx][i] = tmp & 0x0fff; -+ } -+ odm_set_bb_reg(dm, R_0x1b20, BIT(31) | BIT(30), 0x0); -+ //odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x0); -+} -+ -+__odm_func__ void -+debug_information_8822c( -+ struct dm_struct *dm) -+{ -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ -+ u32 reg_rf18; -+ -+ if (odm_get_bb_reg(dm, R_0x1e7c, BIT(30))) -+ dpk_info->is_tssi_mode = true; -+ else -+ dpk_info->is_tssi_mode = false; -+ -+ reg_rf18 = odm_get_rf_reg(dm, RF_PATH_A, RF_0x18, RFREG_MASK); -+ -+ dpk_info->dpk_band = (u8)((reg_rf18 & BIT(16)) >> 16); /*0/1:G/A*/ -+ dpk_info->dpk_ch = (u8)reg_rf18 & 0xff; -+ dpk_info->dpk_bw = (u8)((reg_rf18 & 0x3000) >> 12); /*3/2/1:20/40/80*/ -+ -+ RTW_INFO("[DPK] TSSI/ Band/ CH/ BW = %d / %s / %d / %s\n", -+ dpk_info->is_tssi_mode, dpk_info->dpk_band == 0 ? "2G" : "5G", -+ dpk_info->dpk_ch, -+ dpk_info->dpk_bw == 3 ? "20M" : (dpk_info->dpk_bw == 2 ? "40M" : "80M")); -+} -+ -+extern void _dpk_get_coef_8822c(void *dm_void, u8 path); -+ -+__odm_func__ void -+debug_reload_data_8822c( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ -+ u8 path; -+ u32 u32tmp; -+ -+ debug_information_8822c(dm); -+ -+ for (path = 0; path < DPK_RF_PATH_NUM_8822C; path++) { -+ -+ RTW_INFO("[DPK] Reload path: 0x%x\n", path); -+ -+ odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0x8 | (path << 1)); -+ -+ /*txagc bnd*/ -+ if (dpk_info->dpk_band == 0x0) -+ u32tmp = odm_get_bb_reg(dm, R_0x1b60, MASKDWORD); -+ else -+ u32tmp = odm_get_bb_reg(dm, R_0x1b60, MASKDWORD); -+ -+ RTW_INFO("[DPK] txagc bnd = 0x%08x\n", u32tmp); -+ -+ u32tmp = odm_get_bb_reg(dm, R_0x1b64, MASKBYTE3); -+ RTW_INFO("[DPK] dpk_txagc = 0x%08x\n", u32tmp); -+ -+ //debug_coef_write_8822c(dm, path, dpk_info->dpk_path_ok & BIT(path) >> path); -+ _dpk_get_coef_8822c(dm, path); -+ -+ //debug_one_shot_8822c(dm, path, DPK_ON); -+ -+ odm_set_bb_reg(dm, R_0x1b00, 0x0000000f, 0xc); -+ -+ if (path == RF_PATH_A) -+ u32tmp = odm_get_bb_reg(dm, R_0x1b04, 0x0fffffff); -+ else -+ u32tmp = odm_get_bb_reg(dm, R_0x1b5c, 0x0fffffff); -+ -+ RTW_INFO("[DPK] dpk_gs = 0x%08x\n", u32tmp); -+ -+ } -+} -+ -+void odm_lps_pg_debug_8822c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ debug_DACK(dm); -+ debug_IQK(dm, TX_IQK, RF_PATH_A); -+ debug_IQK(dm, RX_IQK, RF_PATH_A); -+ debug_IQK(dm, TX_IQK, RF_PATH_B); -+ debug_IQK(dm, RX_IQK, RF_PATH_B); -+ debug_reload_data_8822c(dm); -+} -+#endif /* defined(CONFIG_RTL8822C) && defined(CONFIG_LPS_PG) */ -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_p2p.c b/drivers/staging/rtl8723cs/core/rtw_p2p.c -new file mode 100644 -index 000000000000..24372de57a85 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_p2p.c -@@ -0,0 +1,5017 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_P2P_C_ -+ -+#include -+ -+#ifdef CONFIG_P2P -+ -+int rtw_p2p_is_channel_list_ok(u8 desired_ch, u8 *ch_list, u8 ch_cnt) -+{ -+ int found = 0, i = 0; -+ -+ for (i = 0; i < ch_cnt; i++) { -+ if (ch_list[i] == desired_ch) { -+ found = 1; -+ break; -+ } -+ } -+ return found ; -+} -+ -+int is_any_client_associated(_adapter *padapter) -+{ -+ return padapter->stapriv.asoc_list_cnt ? _TRUE : _FALSE; -+} -+ -+static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ u32 len = 0; -+ u16 attr_len = 0; -+ u8 tmplen, *pdata_attr, *pstart, *pcur; -+ struct sta_info *psta = NULL; -+ _adapter *padapter = pwdinfo->padapter; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN); -+ -+ if (NULL == pdata_attr) { -+ RTW_INFO("%s pdata_attr malloc failed\n", __FUNCTION__); -+ goto _exit; -+ } -+ -+ pstart = pdata_attr; -+ pcur = pdata_attr; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ /* look up sta asoc_queue */ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ -+ plist = get_next(plist); -+ -+ -+ if (psta->is_p2p_device) { -+ tmplen = 0; -+ -+ pcur++; -+ -+ /* P2P device address */ -+ _rtw_memcpy(pcur, psta->dev_addr, ETH_ALEN); -+ pcur += ETH_ALEN; -+ -+ /* P2P interface address */ -+ _rtw_memcpy(pcur, psta->cmn.mac_addr, ETH_ALEN); -+ pcur += ETH_ALEN; -+ -+ *pcur = psta->dev_cap; -+ pcur++; -+ -+ /* *(u16*)(pcur) = cpu_to_be16(psta->config_methods); */ -+ RTW_PUT_BE16(pcur, psta->config_methods); -+ pcur += 2; -+ -+ _rtw_memcpy(pcur, psta->primary_dev_type, 8); -+ pcur += 8; -+ -+ *pcur = psta->num_of_secdev_type; -+ pcur++; -+ -+ _rtw_memcpy(pcur, psta->secdev_types_list, psta->num_of_secdev_type * 8); -+ pcur += psta->num_of_secdev_type * 8; -+ -+ if (psta->dev_name_len > 0) { -+ /* *(u16*)(pcur) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); */ -+ RTW_PUT_BE16(pcur, WPS_ATTR_DEVICE_NAME); -+ pcur += 2; -+ -+ /* *(u16*)(pcur) = cpu_to_be16( psta->dev_name_len ); */ -+ RTW_PUT_BE16(pcur, psta->dev_name_len); -+ pcur += 2; -+ -+ _rtw_memcpy(pcur, psta->dev_name, psta->dev_name_len); -+ pcur += psta->dev_name_len; -+ } -+ -+ -+ tmplen = (u8)(pcur - pstart); -+ -+ *pstart = (tmplen - 1); -+ -+ attr_len += tmplen; -+ -+ /* pstart += tmplen; */ -+ pstart = pcur; -+ -+ } -+ -+ -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ if (attr_len > 0) -+ len = rtw_set_p2p_attr_content(pbuf, P2P_ATTR_GROUP_INFO, attr_len, pdata_attr); -+ -+ rtw_mfree(pdata_attr, MAX_P2P_IE_LEN); -+ -+_exit: -+ return len; -+ -+} -+ -+static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ _adapter *padapter = pwdinfo->padapter; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ unsigned char category = RTW_WLAN_CATEGORY_P2P;/* P2P action frame */ -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_GO_DISC_REQUEST; -+ u8 dialogToken = 0; -+ -+ RTW_INFO("[%s]\n", __FUNCTION__); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ /* Build P2P action frame header */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); -+ -+ /* there is no IE in this P2P action frame */ -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+} -+ -+static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ _adapter *padapter = pwdinfo->padapter; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_DEVDISC_RESP; -+ u8 p2pie[8] = { 0x00 }; -+ u32 p2pielen = 0; -+ -+ RTW_INFO("[%s]\n", __FUNCTION__); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pwdinfo->device_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->device_addr, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ /* Build P2P public action frame header */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); -+ -+ -+ /* Build P2P IE */ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* P2P_ATTR_STATUS */ -+ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &pattrib->pktlen); -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+} -+ -+static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8 *raddr, u8 *frame_body, u16 config_method) -+{ -+ _adapter *padapter = pwdinfo->padapter; -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u8 dialogToken = frame_body[7]; /* The Dialog Token of provisioning discovery request frame. */ -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_PROVISION_DISC_RESP; -+ u8 wpsie[100] = { 0x00 }; -+ u8 wpsielen = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); -+ -+ wpsielen = 0; -+ /* WPS OUI */ -+ /* *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); */ -+ RTW_PUT_BE32(wpsie, WPSOUI); -+ wpsielen += 4; -+ -+#if 0 -+ /* WPS version */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -+#endif -+ -+ /* Config Method */ -+ /* Type: */ -+ /* *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); */ -+ RTW_PUT_BE16(wpsie + wpsielen, WPS_ATTR_CONF_METHOD); -+ wpsielen += 2; -+ -+ /* Length: */ -+ /* *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); */ -+ RTW_PUT_BE16(wpsie + wpsielen, 0x0002); -+ wpsielen += 2; -+ -+ /* Value: */ -+ /* *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( config_method ); */ -+ RTW_PUT_BE16(wpsie + wpsielen, config_method); -+ wpsielen += 2; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen); -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return; -+ -+} -+ -+static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ _adapter *padapter = pwdinfo->padapter; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ unsigned char category = RTW_WLAN_CATEGORY_P2P;/* P2P action frame */ -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_PRESENCE_RESPONSE; -+ u8 p2pie[MAX_P2P_IE_LEN] = { 0x00 }; -+ u8 noa_attr_content[32] = { 0x00 }; -+ u32 p2pielen = 0; -+ -+ RTW_INFO("[%s]\n", __FUNCTION__); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ /* Build P2P action frame header */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); -+ -+ -+ /* Add P2P IE header */ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Add Status attribute in P2P IE */ -+ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); -+ -+ /* Add NoA attribute in P2P IE */ -+ noa_attr_content[0] = 0x1;/* index */ -+ noa_attr_content[1] = 0x0;/* CTWindow and OppPS Parameters */ -+ -+ /* todo: Notice of Absence Descriptor(s) */ -+ -+ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_NOA, 2, noa_attr_content); -+ -+ -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &(pattrib->pktlen)); -+ -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+} -+ -+u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 p2pie[MAX_P2P_IE_LEN] = { 0x00 }; -+ u16 capability = 0; -+ u32 len = 0, p2pielen = 0; -+ -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ -+ /* According to the P2P Specification, the beacon frame should contain 3 P2P attributes */ -+ /* 1. P2P Capability */ -+ /* 2. P2P Device ID */ -+ /* 3. Notice of Absence ( NOA ) */ -+ -+ /* P2P Capability ATTR */ -+ /* Type: */ -+ /* Length: */ -+ /* Value: */ -+ /* Device Capability Bitmap, 1 byte */ -+ /* Be able to participate in additional P2P Groups and */ -+ /* support the P2P Invitation Procedure */ -+ /* Group Capability Bitmap, 1 byte */ -+ capability = P2P_DEVCAP_INVITATION_PROC | P2P_DEVCAP_CLIENT_DISCOVERABILITY; -+ capability |= ((P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS) << 8); -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) -+ capability |= (P2P_GRPCAP_GROUP_FORMATION << 8); -+ -+ capability = cpu_to_le16(capability); -+ -+ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_CAPABILITY, 2, (u8 *)&capability); -+ -+ -+ /* P2P Device ID ATTR */ -+ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_DEVICE_ID, ETH_ALEN, pwdinfo->device_addr); -+ -+ -+ /* Notice of Absence ATTR */ -+ /* Type: */ -+ /* Length: */ -+ /* Value: */ -+ -+ /* go_add_noa_attr(pwdinfo); */ -+ -+ -+ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); -+ -+ -+ return len; -+ -+} -+ -+#ifdef CONFIG_WFD -+u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u16 val16 = 0; -+ u32 len = 0, wfdielen = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110812 */ -+ /* According to the WFD Specification, the beacon frame should contain 4 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID */ -+ /* 3. Coupled Sink Information */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ -+ if (P2P_ROLE_GO == pwdinfo->role) { -+ if (is_any_client_associated(pwdinfo->padapter)) { -+ /* WFD primary sink + WiFi Direct mode + WSD (WFD Service Discovery) */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ } else { -+ /* WFD primary sink + available for WFD session + WiFi Direct mode + WSD (WFD Service Discovery) */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ } -+ -+ } else { -+ /* WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ } -+ -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u16 val16 = 0; -+ u32 len = 0, wfdielen = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110812 */ -+ /* According to the WFD Specification, the probe request frame should contain 4 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID */ -+ /* 3. Coupled Sink Information */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ -+ if (1 == pwdinfo->wfd_tdls_enable) { -+ /* WFD primary sink + available for WFD session + WiFi TDLS mode + WSC ( WFD Service Discovery ) */ -+ val16 = pwfd_info->wfd_device_type | -+ WFD_DEVINFO_SESSION_AVAIL | -+ WFD_DEVINFO_WSD | -+ WFD_DEVINFO_PC_TDLS; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ } else { -+ /* WFD primary sink + available for WFD session + WiFi Direct mode + WSC ( WFD Service Discovery ) */ -+ val16 = pwfd_info->wfd_device_type | -+ WFD_DEVINFO_SESSION_AVAIL | -+ WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ } -+ -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunneled) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u32 len = 0, wfdielen = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ u16 v16 = 0; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110812 */ -+ /* According to the WFD Specification, the probe response frame should contain 4 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID */ -+ /* 3. Coupled Sink Information */ -+ /* 4. WFD Session Information */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* WFD primary sink + available for WFD session + WiFi Direct mode */ -+ -+ if (_TRUE == pwdinfo->session_available) { -+ if (P2P_ROLE_GO == pwdinfo->role) { -+ if (is_any_client_associated(pwdinfo->padapter)) { -+ if (pwdinfo->wfd_tdls_enable) { -+ /* TDLS mode + WSD ( WFD Service Discovery ) */ -+ v16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT; -+ RTW_PUT_BE16(wfdie + wfdielen, v16); -+ } else { -+ /* WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ v16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT; -+ RTW_PUT_BE16(wfdie + wfdielen, v16); -+ } -+ } else { -+ if (pwdinfo->wfd_tdls_enable) { -+ /* available for WFD session + TDLS mode + WSD ( WFD Service Discovery ) */ -+ v16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT; -+ RTW_PUT_BE16(wfdie + wfdielen, v16); -+ } else { -+ /* available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ v16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT; -+ RTW_PUT_BE16(wfdie + wfdielen, v16); -+ } -+ } -+ } else { -+ if (pwdinfo->wfd_tdls_enable) { -+ /* available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ v16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT; -+ RTW_PUT_BE16(wfdie + wfdielen, v16); -+ } else { -+ /* available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ v16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT; -+ RTW_PUT_BE16(wfdie + wfdielen, v16); -+ } -+ } -+ } else { -+ if (pwdinfo->wfd_tdls_enable) { -+ v16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT; -+ RTW_PUT_BE16(wfdie + wfdielen, v16); -+ } else { -+ v16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT; -+ RTW_PUT_BE16(wfdie + wfdielen, v16); -+ } -+ } -+ -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ /* WFD Session Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_SESSION_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0000); -+ wfdielen += 2; -+ -+ /* Todo: to add the list of WFD device info descriptor in WFD group. */ -+ -+ } -+#ifdef CONFIG_CONCURRENT_MODE -+#ifdef CONFIG_TDLS -+ { -+ int i; -+ _adapter *iface = NULL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ if (iface == padapter) -+ continue; -+ -+ if ((tunneled == 0) && (iface->wdinfo.wfd_tdls_enable == 1)) { -+ /* Alternative MAC Address ATTR -+ Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ALTER_MAC; -+ -+ /* Length: -+ Note: In the WFD specification, the size of length field is 2.*/ -+ RTW_PUT_BE16(wfdie + wfdielen, ETH_ALEN); -+ wfdielen += 2; -+ -+ /* Value: -+ Alternative MAC Address*/ -+ _rtw_memcpy(wfdie + wfdielen, adapter_mac_addr(iface), ETH_ALEN); -+ wfdielen += ETH_ALEN; -+ } -+ } -+ } -+ } -+ -+#endif /* CONFIG_TDLS*/ -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u16 val16 = 0; -+ u32 len = 0, wfdielen = 0; -+ _adapter *padapter = NULL; -+ struct mlme_priv *pmlmepriv = NULL; -+ struct wifi_display_info *pwfd_info = NULL; -+ -+ padapter = pwdinfo->padapter; -+ pmlmepriv = &padapter->mlmepriv; -+ pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110812 */ -+ /* According to the WFD Specification, the probe request frame should contain 4 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID */ -+ /* 3. Coupled Sink Information */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u32 len = 0, wfdielen = 0; -+ u16 val16 = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110812 */ -+ /* According to the WFD Specification, the probe request frame should contain 4 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID */ -+ /* 3. Coupled Sink Information */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u32 len = 0, wfdielen = 0; -+ u16 val16 = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110825 */ -+ /* According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID ( Optional ) */ -+ /* 3. Local IP Adress ( Optional ) */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* WFD primary sink + WiFi Direct mode + WSD ( WFD Service Discovery ) + WFD Session Available */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_SESSION_AVAIL; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u32 len = 0, wfdielen = 0; -+ u16 val16 = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110825 */ -+ /* According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID ( Optional ) */ -+ /* 3. Local IP Adress ( Optional ) */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* WFD primary sink + WiFi Direct mode + WSD ( WFD Service Discovery ) + WFD Session Available */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_SESSION_AVAIL; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ -+ rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u32 len = 0, wfdielen = 0; -+ u16 val16 = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110825 */ -+ /* According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID ( Optional ) */ -+ /* 3. Local IP Adress ( Optional ) */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* WFD primary sink + WiFi Direct mode + WSD ( WFD Service Discovery ) + WFD Session Available */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_SESSION_AVAIL; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ -+ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u32 len = 0, wfdielen = 0; -+ u16 val16 = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110825 */ -+ /* According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID ( Optional ) */ -+ /* 3. Local IP Adress ( Optional ) */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ if (P2P_ROLE_GO == pwdinfo->role) { -+ /* WFD Session Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_SESSION_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0000); -+ wfdielen += 2; -+ -+ /* Todo: to add the list of WFD device info descriptor in WFD group. */ -+ -+ } -+ -+ rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u16 val16 = 0; -+ u32 len = 0, wfdielen = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110825 */ -+ /* According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID ( Optional ) */ -+ /* 3. Local IP Adress ( Optional ) */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ if (P2P_ROLE_GO == pwdinfo->role) { -+ /* WFD Session Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_SESSION_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0000); -+ wfdielen += 2; -+ -+ /* Todo: to add the list of WFD device info descriptor in WFD group. */ -+ -+ } -+ -+ rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u32 len = 0, wfdielen = 0; -+ u16 val16 = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110825 */ -+ /* According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID ( Optional ) */ -+ /* 3. Local IP Adress ( Optional ) */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ -+ rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+ -+u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u32 len = 0, wfdielen = 0; -+ u16 val16 = 0; -+ _adapter *padapter = pwdinfo->padapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->wdinfo.wfd_info; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* Commented by Albert 20110825 */ -+ /* According to the WFD Specification, the provision discovery response frame should contain 3 WFD attributes */ -+ /* 1. WFD Device Information */ -+ /* 2. Associated BSSID ( Optional ) */ -+ /* 3. Local IP Adress ( Optional ) */ -+ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) */ -+ val16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, val16); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ wfdielen += ETH_ALEN; -+ -+ /* Coupled Sink Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_COUPLED_SINK_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Coupled Sink Status bitmap */ -+ /* Not coupled/available for Coupling */ -+ wfdie[wfdielen++] = 0; -+ /* MAC Addr. */ -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ wfdie[wfdielen++] = 0; -+ -+ rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); -+ -+exit: -+ return len; -+} -+#endif /* CONFIG_WFD */ -+ -+u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u8 p2pie[MAX_P2P_IE_LEN] = { 0x00 }; -+ u32 len = 0, p2pielen = 0; -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20100907 */ -+ /* According to the P2P Specification, the probe response frame should contain 5 P2P attributes */ -+ /* 1. P2P Capability */ -+ /* 2. Extended Listen Timing */ -+ /* 3. Notice of Absence ( NOA ) ( Only GO needs this ) */ -+ /* 4. Device Info */ -+ /* 5. Group Info ( Only GO need this ) */ -+ -+ /* P2P Capability ATTR */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CAPABILITY; -+ -+ /* Length: */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); */ -+ RTW_PUT_LE16(p2pie + p2pielen, 0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Device Capability Bitmap, 1 byte */ -+ p2pie[p2pielen++] = DMP_P2P_DEVCAP_SUPPORT; -+ -+ /* Group Capability Bitmap, 1 byte */ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ p2pie[p2pielen] = (P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS); -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) -+ p2pie[p2pielen] |= P2P_GRPCAP_GROUP_FORMATION; -+ -+ p2pielen++; -+ } else if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) { -+ /* Group Capability Bitmap, 1 byte */ -+ if (pwdinfo->persistent_supported) -+ p2pie[p2pielen++] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; -+ else -+ p2pie[p2pielen++] = DMP_P2P_GRPCAP_SUPPORT; -+ } -+ -+ /* Extended Listen Timing ATTR */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_EX_LISTEN_TIMING; -+ -+ /* Length: */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); */ -+ RTW_PUT_LE16(p2pie + p2pielen, 0x0004); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Availability Period */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); */ -+ RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); -+ p2pielen += 2; -+ -+ /* Availability Interval */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); */ -+ RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); -+ p2pielen += 2; -+ -+ -+ /* Notice of Absence ATTR */ -+ /* Type: */ -+ /* Length: */ -+ /* Value: */ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ /* go_add_noa_attr(pwdinfo); */ -+ } -+ -+ /* Device Info ATTR */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* 21->P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) */ -+ /* + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); */ -+ RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* Config Method */ -+ /* This field should be big endian. Noted by P2P specification. */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->supported_wps_cm); -+ p2pielen += 2; -+ -+ { -+ /* Primary Device Type */ -+ /* Category ID */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_MULIT_MEDIA); -+ p2pielen += 2; -+ -+ /* OUI */ -+ /* *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); */ -+ RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); -+ p2pielen += 4; -+ -+ /* Sub Category ID */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_MEDIA_SERVER); -+ p2pielen += 2; -+ } -+ -+ /* Number of Secondary Device Types */ -+ p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */ -+ -+ /* Device Name */ -+ /* Type: */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); -+ p2pielen += 2; -+ -+ /* Length: */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len); -+ p2pielen += pwdinfo->device_name_len; -+ -+ /* Group Info ATTR */ -+ /* Type: */ -+ /* Length: */ -+ /* Value: */ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) -+ p2pielen += go_add_group_info_attr(pwdinfo, p2pie + p2pielen); -+ -+ -+ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); -+ -+ -+ return len; -+ -+} -+ -+u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 *pssid, u8 ussidlen, u8 *pdev_raddr) -+{ -+ u8 p2pie[MAX_P2P_IE_LEN] = { 0x00 }; -+ u32 len = 0, p2pielen = 0; -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20110301 */ -+ /* According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes */ -+ /* 1. P2P Capability */ -+ /* 2. Device Info */ -+ /* 3. Group ID ( When joining an operating P2P Group ) */ -+ -+ /* P2P Capability ATTR */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CAPABILITY; -+ -+ /* Length: */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); */ -+ RTW_PUT_LE16(p2pie + p2pielen, 0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Device Capability Bitmap, 1 byte */ -+ p2pie[p2pielen++] = DMP_P2P_DEVCAP_SUPPORT; -+ -+ /* Group Capability Bitmap, 1 byte */ -+ if (pwdinfo->persistent_supported) -+ p2pie[p2pielen++] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; -+ else -+ p2pie[p2pielen++] = DMP_P2P_GRPCAP_SUPPORT; -+ -+ -+ /* Device Info ATTR */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* 21->P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) */ -+ /* + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); */ -+ RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* Config Method */ -+ /* This field should be big endian. Noted by P2P specification. */ -+ if (pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC) { -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_PBC); -+ } else { -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_DISPLAY); -+ } -+ -+ p2pielen += 2; -+ -+ /* Primary Device Type */ -+ /* Category ID */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_MULIT_MEDIA); -+ p2pielen += 2; -+ -+ /* OUI */ -+ /* *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); */ -+ RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); -+ p2pielen += 4; -+ -+ /* Sub Category ID */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_MEDIA_SERVER); -+ p2pielen += 2; -+ -+ /* Number of Secondary Device Types */ -+ p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */ -+ -+ /* Device Name */ -+ /* Type: */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); -+ p2pielen += 2; -+ -+ /* Length: */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); */ -+ RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len); -+ p2pielen += pwdinfo->device_name_len; -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) { -+ /* Added by Albert 2011/05/19 */ -+ /* In this case, the pdev_raddr is the device address of the group owner. */ -+ -+ /* P2P Group ID ATTR */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GROUP_ID; -+ -+ /* Length: */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + ussidlen ); */ -+ RTW_PUT_LE16(p2pie + p2pielen, ETH_ALEN + ussidlen); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, pdev_raddr, ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ _rtw_memcpy(p2pie + p2pielen, pssid, ussidlen); -+ p2pielen += ussidlen; -+ -+ } -+ -+ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); -+ -+ -+ return len; -+ -+} -+ -+ -+u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code) -+{ -+ u8 p2pie[MAX_P2P_IE_LEN] = { 0x00 }; -+ u32 len = 0, p2pielen = 0; -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* According to the P2P Specification, the Association response frame should contain 2 P2P attributes */ -+ /* 1. Status */ -+ /* 2. Extended Listen Timing (optional) */ -+ -+ -+ /* Status ATTR */ -+ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status_code); -+ -+ -+ /* Extended Listen Timing ATTR */ -+ /* Type: */ -+ /* Length: */ -+ /* Value: */ -+ -+ -+ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); -+ -+ return len; -+ -+} -+ -+u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -+{ -+ u32 len = 0; -+ -+ return len; -+} -+ -+u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -+{ -+ u8 *p; -+ u32 ret = _FALSE; -+ u8 *p2pie; -+ u32 p2pielen = 0; -+ int ssid_len = 0, rate_cnt = 0; -+ -+ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SUPPORTEDRATES_IE_, (int *)&rate_cnt, -+ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); -+ -+ if (rate_cnt <= 4) { -+ int i, g_rate = 0; -+ -+ for (i = 0; i < rate_cnt; i++) { -+ if (((*(p + 2 + i) & 0xff) != 0x02) && -+ ((*(p + 2 + i) & 0xff) != 0x04) && -+ ((*(p + 2 + i) & 0xff) != 0x0B) && -+ ((*(p + 2 + i) & 0xff) != 0x16)) -+ g_rate = 1; -+ } -+ -+ if (g_rate == 0) { -+ /* There is no OFDM rate included in SupportedRates IE of this probe request frame */ -+ /* The driver should response this probe request. */ -+ return ret; -+ } -+ } else { -+ /* rate_cnt > 4 means the SupportRates IE contains the OFDM rate because the count of CCK rates are 4. */ -+ /* We should proceed the following check for this probe request. */ -+ } -+ -+ /* Added comments by Albert 20100906 */ -+ /* There are several items we should check here. */ -+ /* 1. This probe request frame must contain the P2P IE. (Done) */ -+ /* 2. This probe request frame must contain the wildcard SSID. (Done) */ -+ /* 3. Wildcard BSSID. (Todo) */ -+ /* 4. Destination Address. ( Done in mgt_dispatcher function ) */ -+ /* 5. Requested Device Type in WSC IE. (Todo) */ -+ /* 6. Device ID attribute in P2P IE. (Todo) */ -+ -+ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ssid_len, -+ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); -+ -+ ssid_len &= 0xff; /* Just last 1 byte is valid for ssid len of the probe request */ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ p2pie = rtw_get_p2p_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_ , len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_ , NULL, &p2pielen); -+ if (p2pie) { -+ if ((p != NULL) && _rtw_memcmp((void *)(p + 2), (void *) pwdinfo->p2p_wildcard_ssid , 7)) { -+ /* todo: */ -+ /* Check Requested Device Type attributes in WSC IE. */ -+ /* Check Device ID attribute in P2P IE */ -+ -+ ret = _TRUE; -+ } else if ((p != NULL) && (ssid_len == 0)) -+ ret = _TRUE; -+ } else { -+ /* non -p2p device */ -+ } -+ -+ } -+ -+ -+ return ret; -+ -+} -+ -+u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta) -+{ -+ u8 status_code = P2P_STATUS_SUCCESS; -+ u8 *pbuf, *pattr_content = NULL; -+ u32 attr_contentlen = 0; -+ u16 cap_attr = 0; -+ unsigned short frame_type, ie_offset = 0; -+ u8 *ies; -+ u32 ies_len; -+ u8 *p2p_ie; -+ u32 p2p_ielen = 0; -+ -+ if (!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) -+ return P2P_STATUS_FAIL_REQUEST_UNABLE; -+ -+ frame_type = get_frame_sub_type(pframe); -+ if (frame_type == WIFI_ASSOCREQ) -+ ie_offset = _ASOCREQ_IE_OFFSET_; -+ else /* WIFI_REASSOCREQ */ -+ ie_offset = _REASOCREQ_IE_OFFSET_; -+ -+ ies = pframe + WLAN_HDR_A3_LEN + ie_offset; -+ ies_len = len - WLAN_HDR_A3_LEN - ie_offset; -+ -+ p2p_ie = rtw_get_p2p_ie(ies , ies_len , NULL, &p2p_ielen); -+ -+ if (!p2p_ie) { -+ RTW_INFO("[%s] P2P IE not Found!!\n", __FUNCTION__); -+ status_code = P2P_STATUS_FAIL_INVALID_PARAM; -+ } else -+ RTW_INFO("[%s] P2P IE Found!!\n", __FUNCTION__); -+ -+ while (p2p_ie) { -+ /* Check P2P Capability ATTR */ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8 *)&cap_attr, (uint *) &attr_contentlen)) { -+ RTW_INFO("[%s] Got P2P Capability Attr!!\n", __FUNCTION__); -+ cap_attr = le16_to_cpu(cap_attr); -+ psta->dev_cap = cap_attr & 0xff; -+ } -+ -+ /* Check Extended Listen Timing ATTR */ -+ -+ -+ /* Check P2P Device Info ATTR */ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, NULL, (uint *)&attr_contentlen)) { -+ RTW_INFO("[%s] Got P2P DEVICE INFO Attr!!\n", __FUNCTION__); -+ pattr_content = pbuf = rtw_zmalloc(attr_contentlen); -+ if (pattr_content) { -+ u8 num_of_secdev_type; -+ u16 dev_name_len; -+ -+ -+ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO , pattr_content, (uint *)&attr_contentlen); -+ -+ _rtw_memcpy(psta->dev_addr, pattr_content, ETH_ALEN);/* P2P Device Address */ -+ -+ pattr_content += ETH_ALEN; -+ -+ _rtw_memcpy(&psta->config_methods, pattr_content, 2);/* Config Methods */ -+ psta->config_methods = be16_to_cpu(psta->config_methods); -+ -+ pattr_content += 2; -+ -+ _rtw_memcpy(psta->primary_dev_type, pattr_content, 8); -+ -+ pattr_content += 8; -+ -+ num_of_secdev_type = *pattr_content; -+ pattr_content += 1; -+ -+ if (num_of_secdev_type == 0) -+ psta->num_of_secdev_type = 0; -+ else { -+ u32 len; -+ -+ psta->num_of_secdev_type = num_of_secdev_type; -+ -+ len = (sizeof(psta->secdev_types_list) < (num_of_secdev_type * 8)) ? (sizeof(psta->secdev_types_list)) : (num_of_secdev_type * 8); -+ -+ _rtw_memcpy(psta->secdev_types_list, pattr_content, len); -+ -+ pattr_content += (num_of_secdev_type * 8); -+ } -+ -+ -+ /* dev_name_len = attr_contentlen - ETH_ALEN - 2 - 8 - 1 - (num_of_secdev_type*8); */ -+ psta->dev_name_len = 0; -+ if (WPS_ATTR_DEVICE_NAME == be16_to_cpu(*(u16 *)pattr_content)) { -+ dev_name_len = be16_to_cpu(*(u16 *)(pattr_content + 2)); -+ -+ psta->dev_name_len = (sizeof(psta->dev_name) < dev_name_len) ? sizeof(psta->dev_name) : dev_name_len; -+ -+ _rtw_memcpy(psta->dev_name, pattr_content + 4, psta->dev_name_len); -+ } -+ -+ rtw_mfree(pbuf, attr_contentlen); -+ -+ } -+ -+ } -+ -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ -+ } -+ -+ return status_code; -+ -+} -+ -+u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -+{ -+ u8 *frame_body; -+ u8 status, dialogToken; -+ struct sta_info *psta = NULL; -+ _adapter *padapter = pwdinfo->padapter; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *p2p_ie; -+ u32 p2p_ielen = 0; -+ -+ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+ dialogToken = frame_body[7]; -+ status = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP; -+ -+ p2p_ie = rtw_get_p2p_ie(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen); -+ if (p2p_ie) { -+ u8 groupid[38] = { 0x00 }; -+ u8 dev_addr[ETH_ALEN] = { 0x00 }; -+ u32 attr_contentlen = 0; -+ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) { -+ if (_rtw_memcmp(pwdinfo->device_addr, groupid, ETH_ALEN) && -+ _rtw_memcmp(pwdinfo->p2p_group_ssid, groupid + ETH_ALEN, pwdinfo->p2p_group_ssid_len)) { -+ attr_contentlen = 0; -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_ID, dev_addr, &attr_contentlen)) { -+ _irqL irqL; -+ _list *phead, *plist; -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ /* look up sta asoc_queue */ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ -+ plist = get_next(plist); -+ -+ if (psta->is_p2p_device && (psta->dev_cap & P2P_DEVCAP_CLIENT_DISCOVERABILITY) && -+ _rtw_memcmp(psta->dev_addr, dev_addr, ETH_ALEN)) { -+ -+ /* _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); */ -+ /* issue GO Discoverability Request */ -+ issue_group_disc_req(pwdinfo, psta->cmn.mac_addr); -+ /* _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); */ -+ -+ status = P2P_STATUS_SUCCESS; -+ -+ break; -+ } else -+ status = P2P_STATUS_FAIL_INFO_UNAVAILABLE; -+ -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ } else -+ status = P2P_STATUS_FAIL_INVALID_PARAM; -+ -+ } else -+ status = P2P_STATUS_FAIL_INVALID_PARAM; -+ -+ } -+ -+ } -+ -+ -+ /* issue Device Discoverability Response */ -+ issue_p2p_devdisc_resp(pwdinfo, get_addr2_ptr(pframe), status, dialogToken); -+ -+ -+ return (status == P2P_STATUS_SUCCESS) ? _TRUE : _FALSE; -+ -+} -+ -+u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -+{ -+ return _TRUE; -+} -+ -+u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -+{ -+ u8 *frame_body; -+ u8 *wpsie; -+ uint wps_ielen = 0, attr_contentlen = 0; -+ u16 uconfig_method = 0; -+ -+ -+ frame_body = (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+ wpsie = rtw_get_wps_ie(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen); -+ if (wpsie) { -+ if (rtw_get_wps_attr_content(wpsie, wps_ielen, WPS_ATTR_CONF_METHOD , (u8 *) &uconfig_method, &attr_contentlen)) { -+ uconfig_method = be16_to_cpu(uconfig_method); -+ switch (uconfig_method) { -+ case WPS_CM_DISPLYA: { -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3); -+ break; -+ } -+ case WPS_CM_LABEL: { -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "lab", 3); -+ break; -+ } -+ case WPS_CM_PUSH_BUTTON: { -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3); -+ break; -+ } -+ case WPS_CM_KEYPAD: { -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3); -+ break; -+ } -+ } -+ issue_p2p_provision_resp(pwdinfo, get_addr2_ptr(pframe), frame_body, uconfig_method); -+ } -+ } -+ RTW_INFO("[%s] config method = %s\n", __FUNCTION__, pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req); -+ return _TRUE; -+ -+} -+ -+u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe) -+{ -+ -+ return _TRUE; -+} -+ -+u8 rtw_p2p_get_peer_ch_list(struct wifidirect_info *pwdinfo, u8 *ch_content, u8 ch_cnt, u8 *peer_ch_list) -+{ -+ u8 i = 0, j = 0; -+ u8 temp = 0; -+ u8 ch_no = 0; -+ ch_content += 3; -+ ch_cnt -= 3; -+ -+ while (ch_cnt > 0) { -+ ch_content += 1; -+ ch_cnt -= 1; -+ temp = *ch_content; -+ for (i = 0 ; i < temp ; i++, j++) -+ peer_ch_list[j] = *(ch_content + 1 + i); -+ ch_content += (temp + 1); -+ ch_cnt -= (temp + 1); -+ ch_no += temp ; -+ } -+ -+ return ch_no; -+} -+ -+u8 rtw_p2p_ch_inclusion(_adapter *adapter, u8 *peer_ch_list, u8 peer_ch_num, u8 *ch_list_inclusioned) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ int i = 0, j = 0, temp = 0; -+ u8 ch_no = 0; -+ -+ for (i = 0; i < peer_ch_num; i++) { -+ for (j = temp; j < rfctl->max_chan_nums; j++) { -+ if (*(peer_ch_list + i) == rfctl->channel_set[j].ChannelNum) { -+ ch_list_inclusioned[ch_no++] = *(peer_ch_list + i); -+ temp = j; -+ break; -+ } -+ } -+ } -+ -+ return ch_no; -+} -+ -+u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -+{ -+ _adapter *padapter = pwdinfo->padapter; -+ u8 result = P2P_STATUS_SUCCESS; -+ u32 p2p_ielen = 0, wps_ielen = 0; -+ u8 *ies; -+ u32 ies_len; -+ u8 *p2p_ie; -+ u8 *wpsie; -+ u16 wps_devicepassword_id = 0x0000; -+ uint wps_devicepassword_id_len = 0; -+#ifdef CONFIG_WFD -+#ifdef CONFIG_TDLS -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+#endif /* CONFIG_TDLS */ -+#endif /* CONFIG_WFD */ -+ wpsie = rtw_get_wps_ie(pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen); -+ if (wpsie) { -+ /* Commented by Kurt 20120113 */ -+ /* If some device wants to do p2p handshake without sending prov_disc_req */ -+ /* We have to get peer_req_cm from here. */ -+ if (_rtw_memcmp(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "000", 3)) { -+ rtw_get_wps_attr_content(wpsie, wps_ielen, WPS_ATTR_DEVICE_PWID, (u8 *) &wps_devicepassword_id, &wps_devicepassword_id_len); -+ wps_devicepassword_id = be16_to_cpu(wps_devicepassword_id); -+ -+ if (wps_devicepassword_id == WPS_DPID_USER_SPEC) -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3); -+ else if (wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3); -+ else -+ _rtw_memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3); -+ } -+ } else { -+ RTW_INFO("[%s] WPS IE not Found!!\n", __FUNCTION__); -+ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ return result ; -+ } -+ -+ ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; -+ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; -+ -+ p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen); -+ -+ if (!p2p_ie) { -+ RTW_INFO("[%s] P2P IE not Found!!\n", __FUNCTION__); -+ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ } -+ -+ while (p2p_ie) { -+ u8 attr_content = 0x00; -+ u32 attr_contentlen = 0; -+ u8 ch_content[100] = { 0x00 }; -+ uint ch_cnt = 0; -+ u8 peer_ch_list[100] = { 0x00 }; -+ u8 peer_ch_num = 0; -+ u8 ch_list_inclusioned[100] = { 0x00 }; -+ u8 ch_num_inclusioned = 0; -+ u16 cap_attr; -+ u8 listen_ch_attr[5] = { 0x00 }; -+ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); -+ -+ /* Check P2P Capability ATTR */ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8 *)&cap_attr, (uint *)&attr_contentlen)) { -+ cap_attr = le16_to_cpu(cap_attr); -+ -+#if defined(CONFIG_WFD) && defined(CONFIG_TDLS) -+ if (!(cap_attr & P2P_GRPCAP_INTRABSS)) -+ ptdlsinfo->ap_prohibited = _TRUE; -+#endif /* defined(CONFIG_WFD) && defined(CONFIG_TDLS) */ -+ } -+ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen)) { -+ RTW_INFO("[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01); -+ pwdinfo->peer_intent = attr_content; /* include both intent and tie breaker values. */ -+ -+ if (pwdinfo->intent == (pwdinfo->peer_intent >> 1)) { -+ /* Try to match the tie breaker value */ -+ if (pwdinfo->intent == P2P_MAX_INTENT) { -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; -+ } else { -+ if (attr_content & 0x01) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ else -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ } -+ } else if (pwdinfo->intent > (pwdinfo->peer_intent >> 1)) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ else -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ /* Store the group id information. */ -+ _rtw_memcpy(pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN); -+ _rtw_memcpy(pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen); -+ } -+ } -+ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, (u8 *)listen_ch_attr, (uint *) &attr_contentlen) && attr_contentlen == 5) -+ pwdinfo->nego_req_info.peer_ch = listen_ch_attr[4]; -+ -+ RTW_INFO(FUNC_ADPT_FMT" listen channel :%u\n", FUNC_ADPT_ARG(padapter), pwdinfo->nego_req_info.peer_ch); -+ -+ attr_contentlen = 0; -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INTENDED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen)) { -+ if (attr_contentlen != ETH_ALEN) -+ _rtw_memset(pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN); -+ } -+ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, ch_content, &ch_cnt)) { -+ peer_ch_num = rtw_p2p_get_peer_ch_list(pwdinfo, ch_content, ch_cnt, peer_ch_list); -+ ch_num_inclusioned = rtw_p2p_ch_inclusion(padapter, peer_ch_list, peer_ch_num, ch_list_inclusioned); -+ -+ if (ch_num_inclusioned == 0) { -+ RTW_INFO("[%s] No common channel in channel list!\n", __FUNCTION__); -+ result = P2P_STATUS_FAIL_NO_COMMON_CH; -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ break; -+ } -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ if (!rtw_p2p_is_channel_list_ok(pwdinfo->operating_channel, -+ ch_list_inclusioned, ch_num_inclusioned)) { -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) -+ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { -+ RTW_INFO("[%s] desired channel NOT Found!\n", __FUNCTION__); -+ result = P2P_STATUS_FAIL_NO_COMMON_CH; -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ break; -+ } else -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ u8 operatingch_info[5] = { 0x00 }, peer_operating_ch = 0; -+ attr_contentlen = 0; -+ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) -+ peer_operating_ch = operatingch_info[4]; -+ -+ if (rtw_p2p_is_channel_list_ok(peer_operating_ch, -+ ch_list_inclusioned, ch_num_inclusioned)) { -+ /** -+ * Change our operating channel as peer's for compatibility. -+ */ -+ pwdinfo->operating_channel = peer_operating_ch; -+ RTW_INFO("[%s] Change op ch to %02x as peer's\n", __FUNCTION__, pwdinfo->operating_channel); -+ } else { -+ /* Take first channel of ch_list_inclusioned as operating channel */ -+ pwdinfo->operating_channel = ch_list_inclusioned[0]; -+ RTW_INFO("[%s] Change op ch to %02x\n", __FUNCTION__, pwdinfo->operating_channel); -+ } -+ } -+ -+ } -+ } -+ } -+ -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ } -+ -+ if (pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO) { -+ result = P2P_STATUS_FAIL_INFO_UNAVAILABLE; -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_INFOR_NOREADY); -+ return result; -+ } -+ -+#ifdef CONFIG_WFD -+ rtw_process_wfd_ies(padapter, pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, __func__); -+#endif -+ -+ return result ; -+} -+ -+u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -+{ -+ _adapter *padapter = pwdinfo->padapter; -+ u8 result = P2P_STATUS_SUCCESS; -+ u32 p2p_ielen, wps_ielen; -+ u8 *ies; -+ u32 ies_len; -+ u8 *p2p_ie; -+#ifdef CONFIG_WFD -+#ifdef CONFIG_TDLS -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+#endif /* CONFIG_TDLS */ -+#endif /* CONFIG_WFD */ -+ -+ ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; -+ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; -+ -+ /* Be able to know which one is the P2P GO and which one is P2P client. */ -+ -+ if (rtw_get_wps_ie(ies, ies_len, NULL, &wps_ielen)) { -+ -+ } else { -+ RTW_INFO("[%s] WPS IE not Found!!\n", __FUNCTION__); -+ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ } -+ -+ p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen); -+ if (!p2p_ie) { -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; -+ } else { -+ -+ u8 attr_content = 0x00; -+ u32 attr_contentlen = 0; -+ u8 operatingch_info[5] = { 0x00 }; -+ u8 groupid[38]; -+ u16 cap_attr; -+ u8 peer_ch_list[100] = { 0x00 }; -+ u8 peer_ch_num = 0; -+ u8 ch_list_inclusioned[100] = { 0x00 }; -+ u8 ch_num_inclusioned = 0; -+ -+ while (p2p_ie) { /* Found the P2P IE. */ -+ -+ /* Check P2P Capability ATTR */ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8 *)&cap_attr, (uint *)&attr_contentlen)) { -+ cap_attr = le16_to_cpu(cap_attr); -+#ifdef CONFIG_TDLS -+ if (!(cap_attr & P2P_GRPCAP_INTRABSS)) -+ ptdlsinfo->ap_prohibited = _TRUE; -+#endif /* CONFIG_TDLS */ -+ } -+ -+ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); -+ if (attr_contentlen == 1) { -+ RTW_INFO("[%s] Status = %d\n", __FUNCTION__, attr_content); -+ if (attr_content == P2P_STATUS_SUCCESS) { -+ /* Do nothing. */ -+ } else { -+ if (P2P_STATUS_FAIL_INFO_UNAVAILABLE == attr_content) -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_INFOR_NOREADY); -+ else -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ result = attr_content; -+ break; -+ } -+ } -+ -+ /* Try to get the peer's interface address */ -+ attr_contentlen = 0; -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INTENDED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen)) { -+ if (attr_contentlen != ETH_ALEN) -+ _rtw_memset(pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN); -+ } -+ -+ /* Try to get the peer's intent and tie breaker value. */ -+ attr_content = 0x00; -+ attr_contentlen = 0; -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen)) { -+ RTW_INFO("[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01); -+ pwdinfo->peer_intent = attr_content; /* include both intent and tie breaker values. */ -+ -+ if (pwdinfo->intent == (pwdinfo->peer_intent >> 1)) { -+ /* Try to match the tie breaker value */ -+ if (pwdinfo->intent == P2P_MAX_INTENT) { -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ } else { -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ if (attr_content & 0x01) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ else -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ } -+ } else if (pwdinfo->intent > (pwdinfo->peer_intent >> 1)) { -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ } else { -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ } -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ /* Store the group id information. */ -+ _rtw_memcpy(pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN); -+ _rtw_memcpy(pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen); -+ -+ } -+ } -+ -+ /* Try to get the operation channel information */ -+ -+ attr_contentlen = 0; -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) { -+ RTW_INFO("[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4]); -+ pwdinfo->peer_operating_ch = operatingch_info[4]; -+ } -+ -+ /* Try to get the channel list information */ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, pwdinfo->channel_list_attr, &pwdinfo->channel_list_attr_len)) { -+ RTW_INFO("[%s] channel list attribute found, len = %d\n", __FUNCTION__, pwdinfo->channel_list_attr_len); -+ -+ peer_ch_num = rtw_p2p_get_peer_ch_list(pwdinfo, pwdinfo->channel_list_attr, pwdinfo->channel_list_attr_len, peer_ch_list); -+ ch_num_inclusioned = rtw_p2p_ch_inclusion(padapter, peer_ch_list, peer_ch_num, ch_list_inclusioned); -+ -+ if (ch_num_inclusioned == 0) { -+ RTW_INFO("[%s] No common channel in channel list!\n", __FUNCTION__); -+ result = P2P_STATUS_FAIL_NO_COMMON_CH; -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ break; -+ } -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ if (!rtw_p2p_is_channel_list_ok(pwdinfo->operating_channel, -+ ch_list_inclusioned, ch_num_inclusioned)) { -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) -+ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { -+ RTW_INFO("[%s] desired channel NOT Found!\n", __FUNCTION__); -+ result = P2P_STATUS_FAIL_NO_COMMON_CH; -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ break; -+ } else -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ u8 operatingch_info[5] = { 0x00 }, peer_operating_ch = 0; -+ attr_contentlen = 0; -+ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) -+ peer_operating_ch = operatingch_info[4]; -+ -+ if (rtw_p2p_is_channel_list_ok(peer_operating_ch, -+ ch_list_inclusioned, ch_num_inclusioned)) { -+ /** -+ * Change our operating channel as peer's for compatibility. -+ */ -+ pwdinfo->operating_channel = peer_operating_ch; -+ RTW_INFO("[%s] Change op ch to %02x as peer's\n", __FUNCTION__, pwdinfo->operating_channel); -+ } else { -+ /* Take first channel of ch_list_inclusioned as operating channel */ -+ pwdinfo->operating_channel = ch_list_inclusioned[0]; -+ RTW_INFO("[%s] Change op ch to %02x\n", __FUNCTION__, pwdinfo->operating_channel); -+ } -+ } -+ -+ } -+ } -+ -+ } else -+ RTW_INFO("[%s] channel list attribute not found!\n", __FUNCTION__); -+ -+ /* Try to get the group id information if peer is GO */ -+ attr_contentlen = 0; -+ _rtw_memset(groupid, 0x00, 38); -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) { -+ _rtw_memcpy(pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN); -+ _rtw_memcpy(pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN); -+ } -+ -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ } -+ -+ } -+ -+#ifdef CONFIG_WFD -+ rtw_process_wfd_ies(padapter, pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, __func__); -+#endif -+ -+ return result ; -+ -+} -+ -+u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -+{ -+#ifdef CONFIG_CONCURRENT_MODE -+ _adapter *padapter = pwdinfo->padapter; -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#endif -+ u8 *ies; -+ u32 ies_len; -+ u8 *p2p_ie; -+ u32 p2p_ielen = 0; -+ u8 result = P2P_STATUS_SUCCESS; -+ ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; -+ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; -+ -+ p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen); -+ while (p2p_ie) { /* Found the P2P IE. */ -+ u8 attr_content = 0x00, operatingch_info[5] = { 0x00 }; -+ u8 groupid[38] = { 0x00 }; -+ u32 attr_contentlen = 0; -+ -+ pwdinfo->negotiation_dialog_token = 1; -+ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); -+ if (attr_contentlen == 1) { -+ RTW_INFO("[%s] Status = %d\n", __FUNCTION__, attr_content); -+ result = attr_content; -+ -+ if (attr_content == P2P_STATUS_SUCCESS) { -+ -+ _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); -+ -+ /* Commented by Albert 20100911 */ -+ /* Todo: Need to handle the case which both Intents are the same. */ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ if ((pwdinfo->intent) > (pwdinfo->peer_intent >> 1)) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ else if ((pwdinfo->intent) < (pwdinfo->peer_intent >> 1)) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ else { -+ /* Have to compare the Tie Breaker */ -+ if (pwdinfo->peer_intent & 0x01) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ else -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED) -+ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { -+ /* Switch back to the AP channel soon. */ -+ _set_timer(&prochinfo->ap_roch_ch_switch_timer, 100); -+ } -+#endif -+ } else { -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); -+ break; -+ } -+ } -+ -+ /* Try to get the group id information */ -+ attr_contentlen = 0; -+ _rtw_memset(groupid, 0x00, 38); -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) { -+ RTW_INFO("[%s] Ssid = %s, ssidlen = %zu\n", __FUNCTION__, &groupid[ETH_ALEN], strlen(&groupid[ETH_ALEN])); -+ _rtw_memcpy(pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN); -+ _rtw_memcpy(pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN); -+ } -+ -+ attr_contentlen = 0; -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) { -+ RTW_INFO("[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4]); -+ pwdinfo->peer_operating_ch = operatingch_info[4]; -+ } -+ -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ -+ } -+ -+ return result ; -+} -+ -+u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -+{ -+ u8 *frame_body; -+ u8 dialogToken = 0; -+ u8 status = P2P_STATUS_SUCCESS; -+ -+ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+ dialogToken = frame_body[6]; -+ -+ /* todo: check NoA attribute */ -+ -+ issue_p2p_presence_resp(pwdinfo, get_addr2_ptr(pframe), status, dialogToken); -+ -+ return _TRUE; -+} -+ -+void find_phase_handler(_adapter *padapter) -+{ -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct sitesurvey_parm parm; -+ _irqL irqL; -+ u8 _status = 0; -+ -+ -+ rtw_init_sitesurvey_parm(padapter, &parm); -+ _rtw_memcpy(&parm.ssid[0].Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN); -+ parm.ssid[0].SsidLength = P2P_WILDCARD_SSID_LEN; -+ parm.ssid_num = 1; -+ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ _status = rtw_sitesurvey_cmd(padapter, &parm); -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ -+} -+ -+void restore_p2p_state_handler(_adapter *padapter) -+{ -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ u8 union_bw = rtw_mi_get_union_bw(padapter); -+ u8 union_offset = rtw_mi_get_union_offset(padapter); -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_RSP)) { -+ set_channel_bwmode(padapter, union_ch, union_offset, union_bw); -+ rtw_back_opch(padapter); -+ } -+ } -+#endif -+ -+ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) { -+#ifdef CONFIG_CONCURRENT_MODE -+ rtw_concurrent_handler(padapter); -+#else -+ /* In the P2P client mode, the driver should not switch back to its listen channel */ -+ /* because this P2P client should stay at the operating channel of P2P GO. */ -+ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+#endif -+ } -+} -+ -+void pre_tx_invitereq_handler(_adapter *padapter) -+{ -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ u8 val8 = 1; -+ -+ set_channel_bwmode(padapter, pwdinfo->invitereq_info.peer_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ issue_probereq_p2p(padapter, NULL); -+ _set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT); -+ -+} -+ -+void pre_tx_provdisc_handler(_adapter *padapter) -+{ -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ u8 val8 = 1; -+ -+ set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ issue_probereq_p2p(padapter, NULL); -+ _set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT); -+ -+} -+ -+void pre_tx_negoreq_handler(_adapter *padapter) -+{ -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ u8 val8 = 1; -+ -+ set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ issue_probereq_p2p(padapter , NULL); -+ /* WIN Phone only accept unicast probe request when nego back */ -+ issue_probereq_p2p(padapter , pwdinfo->nego_req_info.peerDevAddr); -+ _set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT); -+ -+} -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ -+#if 0 -+static void rtw_change_p2pie_op_ch(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch) -+{ -+ u8 *ies, *p2p_ie; -+ u32 ies_len, p2p_ielen; -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) -+ return; -+#endif /* CONFIG_MCC_MODE */ -+ -+ ies = (u8 *)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); -+ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; -+ -+ p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen); -+ -+ while (p2p_ie) { -+ u32 attr_contentlen = 0; -+ u8 *pattr = NULL; -+ -+ /* Check P2P_ATTR_OPERATING_CH */ -+ attr_contentlen = 0; -+ pattr = NULL; -+ pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, (uint *)&attr_contentlen); -+ if (pattr != NULL) -+ *(pattr + 4) = ch; -+ -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ } -+} -+#endif -+ -+#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) -+static void rtw_change_p2pie_ch_list(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch) -+{ -+ u8 *ies, *p2p_ie; -+ u32 ies_len, p2p_ielen; -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) -+ return; -+#endif /* CONFIG_MCC_MODE */ -+ -+ ies = (u8 *)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); -+ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; -+ -+ p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen); -+ -+ while (p2p_ie) { -+ u32 attr_contentlen = 0; -+ u8 *pattr = NULL; -+ -+ /* Check P2P_ATTR_CH_LIST */ -+ pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, (uint *)&attr_contentlen); -+ if (pattr != NULL) { -+ int i; -+ u32 num_of_ch; -+ u8 *pattr_temp = pattr + 3 ; -+ -+ attr_contentlen -= 3; -+ -+ while (attr_contentlen > 0) { -+ num_of_ch = *(pattr_temp + 1); -+ -+ for (i = 0; i < num_of_ch; i++) -+ *(pattr_temp + 2 + i) = ch; -+ -+ pattr_temp += (2 + num_of_ch); -+ attr_contentlen -= (2 + num_of_ch); -+ } -+ } -+ -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ } -+} -+#endif -+ -+#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) -+static bool rtw_chk_p2pie_ch_list_with_buddy(_adapter *padapter, const u8 *frame_body, u32 len) -+{ -+ bool fit = _FALSE; -+ u8 *ies, *p2p_ie; -+ u32 ies_len, p2p_ielen; -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ -+ ies = (u8 *)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); -+ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; -+ -+ p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen); -+ -+ while (p2p_ie) { -+ u32 attr_contentlen = 0; -+ u8 *pattr = NULL; -+ -+ /* Check P2P_ATTR_CH_LIST */ -+ pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, (uint *)&attr_contentlen); -+ if (pattr != NULL) { -+ int i; -+ u32 num_of_ch; -+ u8 *pattr_temp = pattr + 3 ; -+ -+ attr_contentlen -= 3; -+ -+ while (attr_contentlen > 0) { -+ num_of_ch = *(pattr_temp + 1); -+ -+ for (i = 0; i < num_of_ch; i++) { -+ if (*(pattr_temp + 2 + i) == union_ch) { -+ RTW_INFO(FUNC_ADPT_FMT" ch_list fit buddy_ch:%u\n", FUNC_ADPT_ARG(padapter), union_ch); -+ fit = _TRUE; -+ break; -+ } -+ } -+ -+ pattr_temp += (2 + num_of_ch); -+ attr_contentlen -= (2 + num_of_ch); -+ } -+ } -+ -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ } -+ -+ return fit; -+} -+ -+#if defined(CONFIG_P2P_INVITE_IOT) -+static bool rtw_chk_p2pie_op_ch_with_buddy(_adapter *padapter, const u8 *frame_body, u32 len) -+{ -+ bool fit = _FALSE; -+ u8 *ies, *p2p_ie; -+ u32 ies_len, p2p_ielen; -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ -+ ies = (u8 *)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); -+ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; -+ -+ p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen); -+ -+ while (p2p_ie) { -+ u32 attr_contentlen = 0; -+ u8 *pattr = NULL; -+ -+ /* Check P2P_ATTR_OPERATING_CH */ -+ attr_contentlen = 0; -+ pattr = NULL; -+ pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, (uint *)&attr_contentlen); -+ if (pattr != NULL) { -+ if (*(pattr + 4) == union_ch) { -+ RTW_INFO(FUNC_ADPT_FMT" op_ch fit buddy_ch:%u\n", FUNC_ADPT_ARG(padapter), union_ch); -+ fit = _TRUE; -+ break; -+ } -+ } -+ -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ } -+ -+ return fit; -+} -+#endif -+ -+static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *frame_body, u32 len) -+{ -+ u8 *ies, *p2p_ie; -+ u32 ies_len, p2p_ielen; -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) -+ return; -+#endif /* CONFIG_MCC_MODE */ -+ -+ ies = (u8 *)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); -+ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; -+ -+ p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen); -+ -+ while (p2p_ie) { -+ u32 attr_contentlen = 0; -+ u8 *pattr = NULL; -+ -+ /* Check P2P_ATTR_CH_LIST */ -+ pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, (uint *)&attr_contentlen); -+ if (pattr != NULL) { -+ int i; -+ u32 num_of_ch; -+ u8 *pattr_temp = pattr + 3 ; -+ -+ attr_contentlen -= 3; -+ -+ while (attr_contentlen > 0) { -+ num_of_ch = *(pattr_temp + 1); -+ -+ for (i = 0; i < num_of_ch; i++) { -+ if (*(pattr_temp + 2 + i) && *(pattr_temp + 2 + i) != union_ch) { -+ #ifdef RTW_SINGLE_WIPHY -+ RTW_ERR("replace ch_list:%u with:%u\n", *(pattr_temp + 2 + i), union_ch); -+ #endif -+ *(pattr_temp + 2 + i) = union_ch; /*forcing to the same channel*/ -+ } -+ } -+ -+ pattr_temp += (2 + num_of_ch); -+ attr_contentlen -= (2 + num_of_ch); -+ } -+ } -+ -+ /* Check P2P_ATTR_OPERATING_CH */ -+ attr_contentlen = 0; -+ pattr = NULL; -+ pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, (uint *)&attr_contentlen); -+ if (pattr != NULL) { -+ if (*(pattr + 4) && *(pattr + 4) != union_ch) { -+ #ifdef RTW_SINGLE_WIPHY -+ RTW_ERR("replace op_ch:%u with:%u\n", *(pattr + 4), union_ch); -+ #endif -+ *(pattr + 4) = union_ch; /*forcing to the same channel */ -+ } -+ } -+ -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ -+ } -+ -+} -+#endif -+ -+#ifdef CONFIG_WFD -+u32 rtw_xframe_build_wfd_ie(struct xmit_frame *xframe) -+{ -+ _adapter *adapter = xframe->padapter; -+ struct wifidirect_info *wdinfo = &adapter->wdinfo; -+ u8 *frame = xframe->buf_addr + TXDESC_OFFSET; -+ u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr); -+ u8 *frame_tail = frame + xframe->attrib.pktlen; -+ u8 category, action, OUI_Subtype, dialogToken = 0; -+ u32 wfdielen = 0; -+ -+ category = frame_body[0]; -+ if (category == RTW_WLAN_CATEGORY_PUBLIC) { -+ action = frame_body[1]; -+ if (action == ACT_PUBLIC_VENDOR -+ && _rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE -+ ) { -+ OUI_Subtype = frame_body[6]; -+ dialogToken = frame_body[7]; -+ -+ switch (OUI_Subtype) { -+ case P2P_GO_NEGO_REQ: -+ wfdielen = build_nego_req_wfd_ie(wdinfo, frame_tail); -+ break; -+ case P2P_GO_NEGO_RESP: -+ wfdielen = build_nego_resp_wfd_ie(wdinfo, frame_tail); -+ break; -+ case P2P_GO_NEGO_CONF: -+ wfdielen = build_nego_confirm_wfd_ie(wdinfo, frame_tail); -+ break; -+ case P2P_INVIT_REQ: -+ wfdielen = build_invitation_req_wfd_ie(wdinfo, frame_tail); -+ break; -+ case P2P_INVIT_RESP: -+ wfdielen = build_invitation_resp_wfd_ie(wdinfo, frame_tail); -+ break; -+ case P2P_PROVISION_DISC_REQ: -+ wfdielen = build_provdisc_req_wfd_ie(wdinfo, frame_tail); -+ break; -+ case P2P_PROVISION_DISC_RESP: -+ wfdielen = build_provdisc_resp_wfd_ie(wdinfo, frame_tail); -+ break; -+ case P2P_DEVDISC_REQ: -+ case P2P_DEVDISC_RESP: -+ default: -+ break; -+ } -+ -+ } -+ } else if (category == RTW_WLAN_CATEGORY_P2P) { -+ OUI_Subtype = frame_body[5]; -+ dialogToken = frame_body[6]; -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n" -+ , cpu_to_be32(*((u32 *)(frame_body + 1))), OUI_Subtype, dialogToken); -+#endif -+ -+ switch (OUI_Subtype) { -+ case P2P_NOTICE_OF_ABSENCE: -+ break; -+ case P2P_PRESENCE_REQUEST: -+ break; -+ case P2P_PRESENCE_RESPONSE: -+ break; -+ case P2P_GO_DISC_REQUEST: -+ break; -+ default: -+ break; -+ } -+ } else -+ RTW_INFO("%s, action frame category=%d\n", __func__, category); -+ -+ xframe->attrib.pktlen += wfdielen; -+ -+ return wfdielen; -+} -+#endif /* CONFIG_WFD */ -+ -+bool rtw_xframe_del_wfd_ie(struct xmit_frame *xframe) -+{ -+#define DBG_XFRAME_DEL_WFD_IE 0 -+ u8 *frame = xframe->buf_addr + TXDESC_OFFSET; -+ u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr); -+ u8 *frame_tail = frame + xframe->attrib.pktlen; -+ u8 category, action, OUI_Subtype; -+ u8 *ies = NULL; -+ uint ies_len_ori = 0; -+ uint ies_len = 0; -+ -+ category = frame_body[0]; -+ if (category == RTW_WLAN_CATEGORY_PUBLIC) { -+ action = frame_body[1]; -+ if (action == ACT_PUBLIC_VENDOR -+ && _rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE -+ ) { -+ OUI_Subtype = frame_body[6]; -+ -+ switch (OUI_Subtype) { -+ case P2P_GO_NEGO_REQ: -+ case P2P_GO_NEGO_RESP: -+ case P2P_GO_NEGO_CONF: -+ case P2P_INVIT_REQ: -+ case P2P_INVIT_RESP: -+ case P2P_PROVISION_DISC_REQ: -+ case P2P_PROVISION_DISC_RESP: -+ ies = frame_body + 8; -+ ies_len_ori = frame_tail - (frame_body + 8); -+ break; -+ } -+ } -+ } -+ -+ if (ies && ies_len_ori) { -+ ies_len = rtw_del_wfd_ie(ies, ies_len_ori, DBG_XFRAME_DEL_WFD_IE ? __func__ : NULL); -+ xframe->attrib.pktlen -= (ies_len_ori - ies_len); -+ } -+ -+ return ies_len_ori != ies_len; -+} -+ -+/* -+* rtw_xframe_chk_wfd_ie - -+* -+*/ -+void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe) -+{ -+ _adapter *adapter = xframe->padapter; -+#ifdef CONFIG_IOCTL_CFG80211 -+ struct wifidirect_info *wdinfo = &adapter->wdinfo; -+#endif -+ u8 build = 0; -+ u8 del = 0; -+ -+ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) -+ del = 1; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (wdinfo->wfd_info->wfd_enable == _TRUE) -+#endif -+ del = build = 1; -+ -+ if (del) -+ rtw_xframe_del_wfd_ie(xframe); -+ -+#ifdef CONFIG_WFD -+ if (build) -+ rtw_xframe_build_wfd_ie(xframe); -+#endif -+} -+ -+u8 *dump_p2p_attr_ch_list(u8 *p2p_ie, uint p2p_ielen, u8 *buf, u32 buf_len) -+{ -+ uint attr_contentlen = 0; -+ u8 *pattr = NULL; -+ int w_sz = 0; -+ u8 ch_cnt = 0; -+ u8 ch_list[40]; -+ -+ pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, &attr_contentlen); -+ if (pattr != NULL) { -+ int i, j; -+ u32 num_of_ch; -+ u8 *pattr_temp = pattr + 3 ; -+ -+ attr_contentlen -= 3; -+ -+ _rtw_memset(ch_list, 0, 40); -+ -+ while (attr_contentlen > 0) { -+ num_of_ch = *(pattr_temp + 1); -+ -+ for (i = 0; i < num_of_ch; i++) { -+ for (j = 0; j < ch_cnt; j++) { -+ if (ch_list[j] == *(pattr_temp + 2 + i)) -+ break; -+ } -+ if (j >= ch_cnt) -+ ch_list[ch_cnt++] = *(pattr_temp + 2 + i); -+ -+ } -+ -+ pattr_temp += (2 + num_of_ch); -+ attr_contentlen -= (2 + num_of_ch); -+ } -+ -+ for (j = 0; j < ch_cnt; j++) { -+ if (j == 0) -+ w_sz += snprintf(buf + w_sz, buf_len - w_sz, "%u", ch_list[j]); -+ else if (ch_list[j] - ch_list[j - 1] != 1) -+ w_sz += snprintf(buf + w_sz, buf_len - w_sz, ", %u", ch_list[j]); -+ else if (j != ch_cnt - 1 && ch_list[j + 1] - ch_list[j] == 1) { -+ /* empty */ -+ } else -+ w_sz += snprintf(buf + w_sz, buf_len - w_sz, "-%u", ch_list[j]); -+ } -+ } -+ return buf; -+} -+ -+/* -+ * return _TRUE if requester is GO, _FALSE if responder is GO -+ */ -+bool rtw_p2p_nego_intent_compare(u8 req, u8 resp) -+{ -+ if (req >> 1 == resp >> 1) -+ return req & 0x01 ? _TRUE : _FALSE; -+ else if (req >> 1 > resp >> 1) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) -+{ -+ int is_p2p_frame = (-1); -+ unsigned char *frame_body; -+ u8 category, action, OUI_Subtype, dialogToken = 0; -+ u8 *p2p_ie = NULL; -+ uint p2p_ielen = 0; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ int status = -1; -+ u8 ch_list_buf[128] = {'\0'}; -+ int op_ch = -1; -+ int listen_ch = -1; -+ u8 intent = 0; -+ u8 *iaddr = NULL; -+ u8 *gbssid = NULL; -+ -+ frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ category = frame_body[0]; -+ /* just for check */ -+ if (category == RTW_WLAN_CATEGORY_PUBLIC) { -+ action = frame_body[1]; -+ if (action == ACT_PUBLIC_VENDOR -+ && _rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE -+ ) { -+ OUI_Subtype = frame_body[6]; -+ dialogToken = frame_body[7]; -+ is_p2p_frame = OUI_Subtype; -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_VENDOR, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", -+ cpu_to_be32(*((u32 *)(frame_body + 2))), OUI_Subtype, dialogToken); -+ #endif -+ -+ p2p_ie = rtw_get_p2p_ie( -+ (u8 *)buf + sizeof(struct rtw_ieee80211_hdr_3addr) + _PUBLIC_ACTION_IE_OFFSET_ -+ , len - sizeof(struct rtw_ieee80211_hdr_3addr) - _PUBLIC_ACTION_IE_OFFSET_ -+ , NULL, &p2p_ielen); -+ -+ switch (OUI_Subtype) { /* OUI Subtype */ -+ u8 *cont; -+ uint cont_len; -+ case P2P_GO_NEGO_REQ: { -+ struct rtw_wdev_nego_info *nego_info = &pwdev_priv->nego_info; -+ -+ if (tx) { -+ #ifdef CONFIG_DRV_ISSUE_PROV_REQ /* IOT FOR S2 */ -+ if (pwdev_priv->provdisc_req_issued == _FALSE) -+ rtw_cfg80211_issue_p2p_provision_request(padapter, buf, len); -+ #endif /* CONFIG_DRV_ISSUE_PROV_REQ */ -+ -+ /* pwdev_priv->provdisc_req_issued = _FALSE; */ -+ -+ #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) -+ rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)); -+ #endif -+ } -+ -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len); -+ if (cont) -+ op_ch = *(cont + 4); -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, NULL, &cont_len); -+ if (cont) -+ listen_ch = *(cont + 4); -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, NULL, &cont_len); -+ if (cont) -+ intent = *cont; -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INTENDED_IF_ADDR, NULL, &cont_len); -+ if (cont && cont_len == 6) -+ iaddr = cont; -+ -+ if (nego_info->token != dialogToken) -+ rtw_wdev_nego_info_init(nego_info); -+ -+ _rtw_memcpy(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : get_addr2_ptr(buf), ETH_ALEN); -+ if (iaddr) -+ _rtw_memcpy(tx ? nego_info->iface_addr : nego_info->peer_iface_addr, iaddr, ETH_ALEN); -+ nego_info->active = tx ? 1 : 0; -+ nego_info->token = dialogToken; -+ nego_info->req_op_ch = op_ch; -+ nego_info->req_listen_ch = listen_ch; -+ nego_info->req_intent = intent; -+ nego_info->state = 0; -+ -+ dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); -+ RTW_INFO("RTW_%s:P2P_GO_NEGO_REQ, dialogToken=%d, intent:%u%s, listen_ch:%d, op_ch:%d, ch_list:%s" -+ , (tx == _TRUE) ? "Tx" : "Rx" , dialogToken , (intent >> 1) , intent & 0x1 ? "+" : "-" , listen_ch , op_ch , ch_list_buf); -+ if (iaddr) -+ _RTW_INFO(", iaddr:"MAC_FMT, MAC_ARG(iaddr)); -+ _RTW_INFO("\n"); -+ -+ if (!tx) { -+ #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) -+ if (rtw_mi_check_status(padapter, MI_LINKED) -+ && rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE -+ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); -+ rtw_change_p2pie_ch_list(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr), 0); -+ } -+ #endif -+ } -+ -+ break; -+ } -+ case P2P_GO_NEGO_RESP: { -+ struct rtw_wdev_nego_info *nego_info = &pwdev_priv->nego_info; -+ -+ if (tx) { -+ #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) -+ rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)); -+ #endif -+ } -+ -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len); -+ if (cont) -+ op_ch = *(cont + 4); -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, NULL, &cont_len); -+ if (cont) -+ intent = *cont; -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len); -+ if (cont) -+ status = *cont; -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INTENDED_IF_ADDR, NULL, &cont_len); -+ if (cont && cont_len == 6) -+ iaddr = cont; -+ -+ if (nego_info->token == dialogToken && nego_info->state == 0 -+ && _rtw_memcmp(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : get_addr2_ptr(buf), ETH_ALEN) == _TRUE -+ ) { -+ if (iaddr) -+ _rtw_memcpy(tx ? nego_info->iface_addr : nego_info->peer_iface_addr, iaddr, ETH_ALEN); -+ nego_info->status = (status == -1) ? 0xff : status; -+ nego_info->rsp_op_ch = op_ch; -+ nego_info->rsp_intent = intent; -+ nego_info->state = 1; -+ if (status != 0) -+ nego_info->token = 0; /* init */ -+ } -+ -+ dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); -+ RTW_INFO("RTW_%s:P2P_GO_NEGO_RESP, dialogToken=%d, intent:%u%s, status:%d, op_ch:%d, ch_list:%s" -+ , (tx == _TRUE) ? "Tx" : "Rx", dialogToken, (intent >> 1), intent & 0x1 ? "+" : "-", status, op_ch, ch_list_buf); -+ if (iaddr) -+ _RTW_INFO(", iaddr:"MAC_FMT, MAC_ARG(iaddr)); -+ _RTW_INFO("\n"); -+ -+ if (!tx) { -+ pwdev_priv->provdisc_req_issued = _FALSE; -+ #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) -+ if (rtw_mi_check_status(padapter, MI_LINKED) -+ && rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE -+ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); -+ rtw_change_p2pie_ch_list(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr), 0); -+ } -+ #endif -+ } -+ -+ break; -+ } -+ case P2P_GO_NEGO_CONF: { -+ struct rtw_wdev_nego_info *nego_info = &pwdev_priv->nego_info; -+ bool is_go = _FALSE; -+ -+ if (tx) { -+ #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) -+ rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)); -+ #endif -+ } -+ -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len); -+ if (cont) -+ op_ch = *(cont + 4); -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len); -+ if (cont) -+ status = *cont; -+ -+ if (nego_info->token == dialogToken && nego_info->state == 1 -+ && _rtw_memcmp(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : get_addr2_ptr(buf), ETH_ALEN) == _TRUE -+ ) { -+ nego_info->status = (status == -1) ? 0xff : status; -+ nego_info->conf_op_ch = (op_ch == -1) ? 0 : op_ch; -+ nego_info->state = 2; -+ -+ if (status == 0) { -+ if (rtw_p2p_nego_intent_compare(nego_info->req_intent, nego_info->rsp_intent) ^ !tx) -+ is_go = _TRUE; -+ } -+ -+ nego_info->token = 0; /* init */ -+ } -+ -+ dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); -+ RTW_INFO("RTW_%s:P2P_GO_NEGO_CONF, dialogToken=%d, status:%d, op_ch:%d, ch_list:%s\n" -+ , (tx == _TRUE) ? "Tx" : "Rx", dialogToken, status, op_ch, ch_list_buf); -+ -+ if (!tx) { -+ } -+ -+ break; -+ } -+ case P2P_INVIT_REQ: { -+ struct rtw_wdev_invit_info *invit_info = &pwdev_priv->invit_info; -+ int flags = -1; -+ -+ if (tx) { -+ #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) -+ if (rtw_mi_check_status(padapter, MI_LINKED) -+ && padapter->registrypriv.full_ch_in_p2p_handshake == 0) -+ rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)); -+ #endif -+ } -+ -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INVITATION_FLAGS, NULL, &cont_len); -+ if (cont) -+ flags = *cont; -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len); -+ if (cont) -+ op_ch = *(cont + 4); -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_BSSID, NULL, &cont_len); -+ if (cont && cont_len == 6) -+ gbssid = cont; -+ -+ if (invit_info->token != dialogToken) -+ rtw_wdev_invit_info_init(invit_info); -+ -+ _rtw_memcpy(invit_info->peer_mac, tx ? GetAddr1Ptr(buf) : get_addr2_ptr(buf), ETH_ALEN); -+ if (gbssid) -+ _rtw_memcpy(invit_info->group_bssid, gbssid, ETH_ALEN); -+ invit_info->active = tx ? 1 : 0; -+ invit_info->token = dialogToken; -+ invit_info->flags = (flags == -1) ? 0x0 : flags; -+ invit_info->req_op_ch = op_ch; -+ invit_info->state = 0; -+ -+ dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); -+ RTW_INFO("RTW_%s:P2P_INVIT_REQ, dialogToken=%d, flags:0x%02x, op_ch:%d, ch_list:%s" -+ , (tx == _TRUE) ? "Tx" : "Rx", dialogToken, flags, op_ch, ch_list_buf); -+ if (gbssid) -+ _RTW_INFO(", gbssid:"MAC_FMT, MAC_ARG(gbssid)); -+ _RTW_INFO("\n"); -+ -+ if (!tx) { -+ #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) { -+ #if defined(CONFIG_P2P_INVITE_IOT) -+ if (op_ch != -1 && rtw_chk_p2pie_op_ch_with_buddy(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) { -+ RTW_INFO(FUNC_ADPT_FMT" op_ch:%u has no intersect with buddy\n", FUNC_ADPT_ARG(padapter), op_ch); -+ rtw_change_p2pie_ch_list(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr), 0); -+ } else -+ #endif -+ if (rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) { -+ RTW_INFO(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); -+ rtw_change_p2pie_ch_list(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr), 0); -+ } -+ } -+ #endif -+ } -+ -+ break; -+ } -+ case P2P_INVIT_RESP: { -+ struct rtw_wdev_invit_info *invit_info = &pwdev_priv->invit_info; -+ -+ if (tx) { -+ #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT) -+ if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) -+ rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)); -+ #endif -+ } -+ -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len); -+ if (cont) { -+ #ifdef CONFIG_P2P_INVITE_IOT -+ if (tx && *cont == 7) { -+ RTW_INFO("TX_P2P_INVITE_RESP, status is no common channel, change to unknown group\n"); -+ *cont = 8; /* unknow group status */ -+ } -+ #endif /* CONFIG_P2P_INVITE_IOT */ -+ status = *cont; -+ } -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len); -+ if (cont) -+ op_ch = *(cont + 4); -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_BSSID, NULL, &cont_len); -+ if (cont && cont_len == 6) -+ gbssid = cont; -+ -+ if (invit_info->token == dialogToken && invit_info->state == 0 -+ && _rtw_memcmp(invit_info->peer_mac, tx ? GetAddr1Ptr(buf) : get_addr2_ptr(buf), ETH_ALEN) == _TRUE -+ ) { -+ invit_info->status = (status == -1) ? 0xff : status; -+ invit_info->rsp_op_ch = op_ch; -+ invit_info->state = 1; -+ invit_info->token = 0; /* init */ -+ } -+ -+ dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); -+ RTW_INFO("RTW_%s:P2P_INVIT_RESP, dialogToken=%d, status:%d, op_ch:%d, ch_list:%s" -+ , (tx == _TRUE) ? "Tx" : "Rx", dialogToken, status, op_ch, ch_list_buf); -+ if (gbssid) -+ _RTW_INFO(", gbssid:"MAC_FMT, MAC_ARG(gbssid)); -+ _RTW_INFO("\n"); -+ -+ if (!tx) { -+ } -+ -+ break; -+ } -+ case P2P_DEVDISC_REQ: -+ RTW_INFO("RTW_%s:P2P_DEVDISC_REQ, dialogToken=%d\n", (tx == _TRUE) ? "Tx" : "Rx", dialogToken); -+ break; -+ case P2P_DEVDISC_RESP: -+ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len); -+ RTW_INFO("RTW_%s:P2P_DEVDISC_RESP, dialogToken=%d, status:%d\n", (tx == _TRUE) ? "Tx" : "Rx", dialogToken, cont ? *cont : -1); -+ break; -+ case P2P_PROVISION_DISC_REQ: { -+ size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); -+ u8 *p2p_ie; -+ uint p2p_ielen = 0; -+ uint contentlen = 0; -+ -+ RTW_INFO("RTW_%s:P2P_PROVISION_DISC_REQ, dialogToken=%d\n", (tx == _TRUE) ? "Tx" : "Rx", dialogToken); -+ -+ /* if(tx) */ -+ { -+ pwdev_priv->provdisc_req_issued = _FALSE; -+ -+ p2p_ie = rtw_get_p2p_ie(frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen); -+ if (p2p_ie) { -+ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, NULL, &contentlen)) { -+ pwdev_priv->provdisc_req_issued = _FALSE;/* case: p2p_client join p2p GO */ -+ } else { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("provdisc_req_issued is _TRUE\n"); -+ #endif /*CONFIG_DEBUG_CFG80211*/ -+ pwdev_priv->provdisc_req_issued = _TRUE;/* case: p2p_devices connection before Nego req. */ -+ } -+ -+ } -+ } -+ } -+ break; -+ case P2P_PROVISION_DISC_RESP: -+ RTW_INFO("RTW_%s:P2P_PROVISION_DISC_RESP, dialogToken=%d\n", (tx == _TRUE) ? "Tx" : "Rx", dialogToken); -+ break; -+ default: -+ RTW_INFO("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx == _TRUE) ? "Tx" : "Rx", OUI_Subtype, dialogToken); -+ break; -+ } -+ -+ } -+ -+ } else if (category == RTW_WLAN_CATEGORY_P2P) { -+ OUI_Subtype = frame_body[5]; -+ dialogToken = frame_body[6]; -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", -+ cpu_to_be32(*((u32 *)(frame_body + 1))), OUI_Subtype, dialogToken); -+ #endif -+ -+ is_p2p_frame = OUI_Subtype; -+ -+ switch (OUI_Subtype) { -+ case P2P_NOTICE_OF_ABSENCE: -+ RTW_INFO("RTW_%s:P2P_NOTICE_OF_ABSENCE, dialogToken=%d\n", (tx == _TRUE) ? "Tx" : "Rx", dialogToken); -+ break; -+ case P2P_PRESENCE_REQUEST: -+ RTW_INFO("RTW_%s:P2P_PRESENCE_REQUEST, dialogToken=%d\n", (tx == _TRUE) ? "Tx" : "Rx", dialogToken); -+ break; -+ case P2P_PRESENCE_RESPONSE: -+ RTW_INFO("RTW_%s:P2P_PRESENCE_RESPONSE, dialogToken=%d\n", (tx == _TRUE) ? "Tx" : "Rx", dialogToken); -+ break; -+ case P2P_GO_DISC_REQUEST: -+ RTW_INFO("RTW_%s:P2P_GO_DISC_REQUEST, dialogToken=%d\n", (tx == _TRUE) ? "Tx" : "Rx", dialogToken); -+ break; -+ default: -+ RTW_INFO("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx == _TRUE) ? "Tx" : "Rx", OUI_Subtype, dialogToken); -+ break; -+ } -+ -+ } -+ -+ return is_p2p_frame; -+} -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+s32 p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf) -+{ -+ int ret = H2C_SUCCESS; -+ -+ switch (intCmdType) { -+ case P2P_FIND_PHASE_WK: -+ find_phase_handler(padapter); -+ break; -+ -+ case P2P_RESTORE_STATE_WK: -+ restore_p2p_state_handler(padapter); -+ break; -+ -+ case P2P_PRE_TX_PROVDISC_PROCESS_WK: -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ rtw_concurrent_handler(padapter); -+ else -+ pre_tx_provdisc_handler(padapter); -+#else -+ pre_tx_provdisc_handler(padapter); -+#endif -+ break; -+ -+ case P2P_PRE_TX_INVITEREQ_PROCESS_WK: -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ rtw_concurrent_handler(padapter); -+ else -+ pre_tx_invitereq_handler(padapter); -+#else -+ pre_tx_invitereq_handler(padapter); -+#endif -+ break; -+ -+ case P2P_PRE_TX_NEGOREQ_PROCESS_WK: -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ rtw_concurrent_handler(padapter); -+ else -+ pre_tx_negoreq_handler(padapter); -+#else -+ pre_tx_negoreq_handler(padapter); -+#endif -+ break; -+ -+ default: -+ rtw_warn_on(1); -+ break; -+ } -+ -+ return ret; -+} -+ -+int process_p2p_cross_connect_ie(PADAPTER padapter, u8 *IEs, u32 IELength) -+{ -+ int ret = _TRUE; -+ u8 *ies; -+ u32 ies_len; -+ u8 *p2p_ie; -+ u32 p2p_ielen = 0; -+ u8 p2p_attr[MAX_P2P_IE_LEN] = { 0x00 };/* NoA length should be n*(13) + 2 */ -+ u32 attr_contentlen = 0; -+ -+ -+ -+ if (IELength <= _BEACON_IE_OFFSET_) -+ return ret; -+ -+ ies = IEs + _BEACON_IE_OFFSET_; -+ ies_len = IELength - _BEACON_IE_OFFSET_; -+ -+ p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen); -+ -+ while (p2p_ie) { -+ /* Get P2P Manageability IE. */ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_MANAGEABILITY, p2p_attr, &attr_contentlen)) { -+ if ((p2p_attr[0] & (BIT(0) | BIT(1))) == 0x01) -+ ret = _FALSE; -+ break; -+ } -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ } -+ -+ return ret; -+} -+ -+#ifdef CONFIG_P2P_PS -+void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength) -+{ -+ u8 *ies; -+ u32 ies_len; -+ u8 *p2p_ie; -+ u32 p2p_ielen = 0; -+ u8 *noa_attr; /* NoA length should be n*(13) + 2 */ -+ u32 attr_contentlen = 0; -+ -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 find_p2p = _FALSE, find_p2p_ps = _FALSE; -+ u8 noa_offset, noa_num, noa_index; -+ -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ return; -+#ifdef CONFIG_CONCURRENT_MODE -+#ifndef CONFIG_FW_MULTI_PORT_SUPPORT -+ if (padapter->hw_port != HW_PORT0) -+ return; -+#endif -+#endif -+ if (IELength <= _BEACON_IE_OFFSET_) -+ return; -+ -+ ies = IEs + _BEACON_IE_OFFSET_; -+ ies_len = IELength - _BEACON_IE_OFFSET_; -+ -+ p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen); -+ -+ while (p2p_ie) { -+ find_p2p = _TRUE; -+ /* Get Notice of Absence IE. */ -+ noa_attr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_NOA, NULL, &attr_contentlen); -+ if (noa_attr) { -+ find_p2p_ps = _TRUE; -+ noa_index = noa_attr[0]; -+ -+ if ((pwdinfo->p2p_ps_mode == P2P_PS_NONE) || -+ (noa_index != pwdinfo->noa_index)) { /* if index change, driver should reconfigure related setting. */ -+ pwdinfo->noa_index = noa_index; -+ pwdinfo->opp_ps = noa_attr[1] >> 7; -+ if (pwdinfo->opp_ps != 1) -+ pwdinfo->ctwindow = 0; -+ else -+ pwdinfo->ctwindow = noa_attr[1] & 0x7F; -+ noa_offset = 2; -+ noa_num = 0; -+ /* NoA length should be n*(13) + 2 */ -+ if (attr_contentlen > 2 && (attr_contentlen - 2) % 13 == 0) { -+ while (noa_offset < attr_contentlen && noa_num < P2P_MAX_NOA_NUM) { -+ /* _rtw_memcpy(&wifidirect_info->noa_count[noa_num], &noa_attr[noa_offset], 1); */ -+ pwdinfo->noa_count[noa_num] = noa_attr[noa_offset]; -+ noa_offset += 1; -+ -+ _rtw_memcpy(&pwdinfo->noa_duration[noa_num], &noa_attr[noa_offset], 4); -+ noa_offset += 4; -+ -+ _rtw_memcpy(&pwdinfo->noa_interval[noa_num], &noa_attr[noa_offset], 4); -+ noa_offset += 4; -+ -+ _rtw_memcpy(&pwdinfo->noa_start_time[noa_num], &noa_attr[noa_offset], 4); -+ noa_offset += 4; -+ -+ noa_num++; -+ } -+ } -+ pwdinfo->noa_num = noa_num; -+ -+ if (pwdinfo->opp_ps == 1) { -+ pwdinfo->p2p_ps_mode = P2P_PS_CTWINDOW; -+ /* driver should wait LPS for entering CTWindow */ -+ if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE) -+ p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); -+ } else if (pwdinfo->noa_num > 0) { -+ pwdinfo->p2p_ps_mode = P2P_PS_NOA; -+ p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); -+ } else if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) -+ p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); -+ } -+ -+ break; /* find target, just break. */ -+ } -+ -+ /* Get the next P2P IE */ -+ p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen); -+ -+ } -+ -+ if (find_p2p == _TRUE) { -+ if ((pwdinfo->p2p_ps_mode > P2P_PS_NONE) && (find_p2p_ps == _FALSE)) -+ p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); -+ } -+ -+} -+ -+void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u32 ps_deny = 0; -+ -+ /* Pre action for p2p state */ -+ switch (p2p_ps_state) { -+ case P2P_PS_DISABLE: -+ pwdinfo->p2p_ps_state = p2p_ps_state; -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); -+ -+#ifdef CONFIG_LPS -+ if (pwdinfo->opp_ps == 1) { -+ if (pwrpriv->smart_ps == 0) { -+ pwrpriv->smart_ps = 2; -+ if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) -+ rtw_exec_lps(padapter, pwrpriv->pwr_mode); -+ } -+ } -+#endif /* CONFIG_LPS */ -+ -+ pwdinfo->noa_index = 0; -+ pwdinfo->ctwindow = 0; -+ pwdinfo->opp_ps = 0; -+ pwdinfo->noa_num = 0; -+ pwdinfo->p2p_ps_mode = P2P_PS_NONE; -+ -+ break; -+ case P2P_PS_ENABLE: -+ _enter_pwrlock(&adapter_to_pwrctl(padapter)->lock); -+ ps_deny = rtw_ps_deny_get(padapter); -+ _exit_pwrlock(&adapter_to_pwrctl(padapter)->lock); -+ -+ if ((ps_deny & (PS_DENY_SCAN | PS_DENY_JOIN)) -+ || rtw_mi_check_fwstate(padapter, (WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING))) { -+ pwdinfo->p2p_ps_mode = P2P_PS_NONE; -+ RTW_DBG(FUNC_ADPT_FMT" Block P2P PS under site survey or LINKING\n", FUNC_ADPT_ARG(padapter)); -+ return; -+ } -+ if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) { -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) { -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) { -+ RTW_INFO("P2P PS enble under MCC\n"); -+ rtw_warn_on(1); -+ } -+ -+ } -+#endif /* CONFIG_MCC_MODE */ -+ pwdinfo->p2p_ps_state = p2p_ps_state; -+ -+#ifdef CONFIG_LPS -+ if (pwdinfo->ctwindow > 0) { -+ if (pwrpriv->smart_ps != 0) { -+ pwrpriv->smart_ps = 0; -+ RTW_INFO("%s(): Enter CTW, change SmartPS\n", __FUNCTION__); -+ if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) -+ rtw_exec_lps(padapter, pwrpriv->pwr_mode); -+ } -+ } -+#endif /* CONFIG_LPS */ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); -+ } -+ break; -+ case P2P_PS_SCAN: -+ case P2P_PS_SCAN_DONE: -+ case P2P_PS_ALLSTASLEEP: -+ if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) { -+ pwdinfo->p2p_ps_state = p2p_ps_state; -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); -+ } -+ break; -+ default: -+ break; -+ } -+ -+#ifdef CONFIG_MCC_MODE -+ rtw_hal_mcc_process_noa(padapter); -+#endif /* CONFIG_MCC_MODE */ -+} -+ -+u8 p2p_ps_wk_cmd(_adapter *padapter, u8 p2p_ps_state, u8 enqueue) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) -+#ifdef CONFIG_CONCURRENT_MODE -+#ifndef CONFIG_FW_MULTI_PORT_SUPPORT -+ || (padapter->hw_port != HW_PORT0) -+#endif -+#endif -+ ) -+ return res; -+ -+ if (enqueue) { -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = P2P_PS_WK_CID; -+ pdrvextra_cmd_parm->type = p2p_ps_state; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ } else -+ p2p_ps_wk_hdl(padapter, p2p_ps_state); -+ -+exit: -+ -+ -+ return res; -+ -+} -+#endif /* CONFIG_P2P_PS */ -+ -+static void reset_ch_sitesurvey_timer_process(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *)FunctionContext; -+ struct wifidirect_info *pwdinfo = &adapter->wdinfo; -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ return; -+ -+ RTW_INFO("[%s] In\n", __FUNCTION__); -+ /* Reset the operation channel information */ -+ pwdinfo->rx_invitereq_info.operation_ch[0] = 0; -+#ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH -+ pwdinfo->rx_invitereq_info.operation_ch[1] = 0; -+ pwdinfo->rx_invitereq_info.operation_ch[2] = 0; -+ pwdinfo->rx_invitereq_info.operation_ch[3] = 0; -+#endif /* CONFIG_P2P_OP_CHK_SOCIAL_CH */ -+ pwdinfo->rx_invitereq_info.scan_op_ch_only = 0; -+} -+ -+static void reset_ch_sitesurvey_timer_process2(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *)FunctionContext; -+ struct wifidirect_info *pwdinfo = &adapter->wdinfo; -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ return; -+ -+ RTW_INFO("[%s] In\n", __FUNCTION__); -+ /* Reset the operation channel information */ -+ pwdinfo->p2p_info.operation_ch[0] = 0; -+#ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH -+ pwdinfo->p2p_info.operation_ch[1] = 0; -+ pwdinfo->p2p_info.operation_ch[2] = 0; -+ pwdinfo->p2p_info.operation_ch[3] = 0; -+#endif /* CONFIG_P2P_OP_CHK_SOCIAL_CH */ -+ pwdinfo->p2p_info.scan_op_ch_only = 0; -+} -+ -+static void restore_p2p_state_timer_process(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *)FunctionContext; -+ struct wifidirect_info *pwdinfo = &adapter->wdinfo; -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ return; -+ -+ p2p_protocol_wk_cmd(adapter, P2P_RESTORE_STATE_WK); -+} -+ -+static void pre_tx_scan_timer_process(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *) FunctionContext; -+ struct wifidirect_info *pwdinfo = &adapter->wdinfo; -+ _irqL irqL; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ return; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) { -+ if (_TRUE == pwdinfo->tx_prov_disc_info.benable) { /* the provision discovery request frame is trigger to send or not */ -+ p2p_protocol_wk_cmd(adapter, P2P_PRE_TX_PROVDISC_PROCESS_WK); -+ /* issue_probereq_p2p(adapter, NULL); */ -+ /* _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); */ -+ } -+ } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) { -+ if (_TRUE == pwdinfo->nego_req_info.benable) -+ p2p_protocol_wk_cmd(adapter, P2P_PRE_TX_NEGOREQ_PROCESS_WK); -+ } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ)) { -+ if (_TRUE == pwdinfo->invitereq_info.benable) -+ p2p_protocol_wk_cmd(adapter, P2P_PRE_TX_INVITEREQ_PROCESS_WK); -+ } else -+ RTW_INFO("[%s] p2p_state is %d, ignore!!\n", __FUNCTION__, rtw_p2p_state(pwdinfo)); -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+} -+ -+static void find_phase_timer_process(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *)FunctionContext; -+ struct wifidirect_info *pwdinfo = &adapter->wdinfo; -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ return; -+ -+ adapter->wdinfo.find_phase_state_exchange_cnt++; -+ -+ p2p_protocol_wk_cmd(adapter, P2P_FIND_PHASE_WK); -+} -+ -+void reset_global_wifidirect_info(_adapter *padapter) -+{ -+ struct wifidirect_info *pwdinfo; -+ -+ pwdinfo = &padapter->wdinfo; -+ pwdinfo->persistent_supported = 0; -+ pwdinfo->session_available = _TRUE; -+ rtw_tdls_wfd_enable(padapter, 0); -+ pwdinfo->wfd_tdls_weaksec = _TRUE; -+} -+ -+#ifdef CONFIG_WFD -+int rtw_init_wifi_display_info(_adapter *padapter) -+{ -+ int res = _SUCCESS; -+ struct wifi_display_info *pwfd_info = &padapter->wfd_info; -+ -+ /* Used in P2P and TDLS */ -+ pwfd_info->init_rtsp_ctrlport = 554; -+#ifdef CONFIG_IOCTL_CFG80211 -+ pwfd_info->rtsp_ctrlport = 0; -+#else -+ pwfd_info->rtsp_ctrlport = pwfd_info->init_rtsp_ctrlport; /* set non-zero value for legacy wfd */ -+#endif -+ pwfd_info->tdls_rtsp_ctrlport = 0; -+ pwfd_info->peer_rtsp_ctrlport = 0; /* Reset to 0 */ -+ pwfd_info->wfd_enable = _FALSE; -+ pwfd_info->wfd_device_type = WFD_DEVINFO_PSINK; -+ pwfd_info->scan_result_type = SCAN_RESULT_P2P_ONLY; -+ -+ /* Used in P2P */ -+ pwfd_info->peer_session_avail = _TRUE; -+ pwfd_info->wfd_pc = _FALSE; -+ -+ /* Used in TDLS */ -+ _rtw_memset(pwfd_info->ip_address, 0x00, 4); -+ _rtw_memset(pwfd_info->peer_ip_address, 0x00, 4); -+ return res; -+ -+} -+ -+inline void rtw_wfd_enable(_adapter *adapter, bool on) -+{ -+ struct wifi_display_info *wfdinfo = &adapter->wfd_info; -+ -+ if (on) { -+ wfdinfo->rtsp_ctrlport = wfdinfo->init_rtsp_ctrlport; -+ wfdinfo->wfd_enable = _TRUE; -+ -+ } else { -+ wfdinfo->wfd_enable = _FALSE; -+ wfdinfo->rtsp_ctrlport = 0; -+ } -+} -+ -+inline void rtw_wfd_set_ctrl_port(_adapter *adapter, u16 port) -+{ -+ struct wifi_display_info *wfdinfo = &adapter->wfd_info; -+ -+ wfdinfo->init_rtsp_ctrlport = port; -+ if (wfdinfo->wfd_enable == _TRUE) -+ wfdinfo->rtsp_ctrlport = port; -+ if (adapter->wdinfo.wfd_tdls_enable == 1) -+ wfdinfo->tdls_rtsp_ctrlport = port; -+} -+ -+inline void rtw_tdls_wfd_enable(_adapter *adapter, bool on) -+{ -+ struct wifi_display_info *wfdinfo = &adapter->wfd_info; -+ -+ if (on) { -+ wfdinfo->tdls_rtsp_ctrlport = wfdinfo->init_rtsp_ctrlport; -+ adapter->wdinfo.wfd_tdls_enable = 1; -+ -+ } else { -+ adapter->wdinfo.wfd_tdls_enable = 0; -+ wfdinfo->tdls_rtsp_ctrlport = 0; -+ } -+} -+ -+u32 rtw_append_beacon_wfd_ie(_adapter *adapter, u8 *pbuf) -+{ -+ struct wifidirect_info *wdinfo = &adapter->wdinfo; -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ u8 build_ie_by_self = 0; -+ u32 len = 0; -+ -+ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (_TRUE == wdinfo->wfd_info->wfd_enable) -+#endif -+ build_ie_by_self = 1; -+ -+ if (build_ie_by_self) -+ len = build_beacon_wfd_ie(wdinfo, pbuf); -+#ifdef CONFIG_IOCTL_CFG80211 -+ else if (mlme->wfd_beacon_ie && mlme->wfd_beacon_ie_len > 0) { -+ len = mlme->wfd_beacon_ie_len; -+ _rtw_memcpy(pbuf, mlme->wfd_beacon_ie, len); -+ } -+#endif -+ -+exit: -+ return len; -+} -+ -+u32 rtw_append_probe_req_wfd_ie(_adapter *adapter, u8 *pbuf) -+{ -+ struct wifidirect_info *wdinfo = &adapter->wdinfo; -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ u8 build_ie_by_self = 0; -+ u32 len = 0; -+ -+ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (_TRUE == wdinfo->wfd_info->wfd_enable) -+#endif -+ build_ie_by_self = 1; -+ -+ if (build_ie_by_self) -+ len = build_probe_req_wfd_ie(wdinfo, pbuf); -+#ifdef CONFIG_IOCTL_CFG80211 -+ else if (mlme->wfd_probe_req_ie && mlme->wfd_probe_req_ie_len > 0) { -+ len = mlme->wfd_probe_req_ie_len; -+ _rtw_memcpy(pbuf, mlme->wfd_probe_req_ie, len); -+ } -+#endif -+ -+exit: -+ return len; -+} -+ -+u32 rtw_append_probe_resp_wfd_ie(_adapter *adapter, u8 *pbuf) -+{ -+ struct wifidirect_info *wdinfo = &adapter->wdinfo; -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ u8 build_ie_by_self = 0; -+ u32 len = 0; -+ -+ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (_TRUE == wdinfo->wfd_info->wfd_enable) -+#endif -+ build_ie_by_self = 1; -+ -+ if (build_ie_by_self) -+ len = build_probe_resp_wfd_ie(wdinfo, pbuf, 0); -+#ifdef CONFIG_IOCTL_CFG80211 -+ else if (mlme->wfd_probe_resp_ie && mlme->wfd_probe_resp_ie_len > 0) { -+ len = mlme->wfd_probe_resp_ie_len; -+ _rtw_memcpy(pbuf, mlme->wfd_probe_resp_ie, len); -+ } -+#endif -+ -+exit: -+ return len; -+} -+ -+u32 rtw_append_assoc_req_wfd_ie(_adapter *adapter, u8 *pbuf) -+{ -+ struct wifidirect_info *wdinfo = &adapter->wdinfo; -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ u8 build_ie_by_self = 0; -+ u32 len = 0; -+ -+ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (_TRUE == wdinfo->wfd_info->wfd_enable) -+#endif -+ build_ie_by_self = 1; -+ -+ if (build_ie_by_self) -+ len = build_assoc_req_wfd_ie(wdinfo, pbuf); -+#ifdef CONFIG_IOCTL_CFG80211 -+ else if (mlme->wfd_assoc_req_ie && mlme->wfd_assoc_req_ie_len > 0) { -+ len = mlme->wfd_assoc_req_ie_len; -+ _rtw_memcpy(pbuf, mlme->wfd_assoc_req_ie, len); -+ } -+#endif -+ -+exit: -+ return len; -+} -+ -+u32 rtw_append_assoc_resp_wfd_ie(_adapter *adapter, u8 *pbuf) -+{ -+ struct wifidirect_info *wdinfo = &adapter->wdinfo; -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ u8 build_ie_by_self = 0; -+ u32 len = 0; -+ -+ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) -+ goto exit; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (_TRUE == wdinfo->wfd_info->wfd_enable) -+#endif -+ build_ie_by_self = 1; -+ -+ if (build_ie_by_self) -+ len = build_assoc_resp_wfd_ie(wdinfo, pbuf); -+#ifdef CONFIG_IOCTL_CFG80211 -+ else if (mlme->wfd_assoc_resp_ie && mlme->wfd_assoc_resp_ie_len > 0) { -+ len = mlme->wfd_assoc_resp_ie_len; -+ _rtw_memcpy(pbuf, mlme->wfd_assoc_resp_ie, len); -+ } -+#endif -+ -+exit: -+ return len; -+} -+ -+#endif /* CONFIG_WFD */ -+ -+void rtw_init_wifidirect_timers(_adapter *padapter) -+{ -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ -+ rtw_init_timer(&pwdinfo->find_phase_timer, padapter, find_phase_timer_process, padapter); -+ rtw_init_timer(&pwdinfo->restore_p2p_state_timer, padapter, restore_p2p_state_timer_process, padapter); -+ rtw_init_timer(&pwdinfo->pre_tx_scan_timer, padapter, pre_tx_scan_timer_process, padapter); -+ rtw_init_timer(&pwdinfo->reset_ch_sitesurvey, padapter, reset_ch_sitesurvey_timer_process, padapter); -+ rtw_init_timer(&pwdinfo->reset_ch_sitesurvey2, padapter, reset_ch_sitesurvey_timer_process2, padapter); -+} -+ -+void rtw_init_wifidirect_addrs(_adapter *padapter, u8 *dev_addr, u8 *iface_addr) -+{ -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ -+ /*init device&interface address */ -+ if (dev_addr) -+ _rtw_memcpy(pwdinfo->device_addr, dev_addr, ETH_ALEN); -+ if (iface_addr) -+ _rtw_memcpy(pwdinfo->interface_addr, iface_addr, ETH_ALEN); -+#endif -+} -+ -+void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role) -+{ -+ struct wifidirect_info *pwdinfo; -+#ifdef CONFIG_WFD -+ struct wifi_display_info *pwfd_info = &padapter->wfd_info; -+#endif -+ pwdinfo = &padapter->wdinfo; -+ -+ pwdinfo->padapter = padapter; -+ -+ /* 1, 6, 11 are the social channel defined in the WiFi Direct specification. */ -+ pwdinfo->social_chan[0] = 1; -+ pwdinfo->social_chan[1] = 6; -+ pwdinfo->social_chan[2] = 11; -+ pwdinfo->social_chan[3] = 0; /* channel 0 for scanning ending in site survey function. */ -+ -+ if (role != P2P_ROLE_DISABLE -+ && pwdinfo->driver_interface != DRIVER_CFG80211 -+ ) { -+ #ifdef CONFIG_CONCURRENT_MODE -+ u8 union_ch = 0; -+ -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ union_ch = rtw_mi_get_union_chan(padapter); -+ -+ if (union_ch != 0 && -+ (union_ch == 1 || union_ch == 6 || union_ch == 11) -+ ) { -+ /* Use the AP's channel as the listen channel */ -+ /* This will avoid the channel switch between AP's channel and listen channel */ -+ pwdinfo->listen_channel = union_ch; -+ } else -+ #endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ /* Use the channel 11 as the listen channel */ -+ pwdinfo->listen_channel = 11; -+ } -+ } -+ -+ if (role == P2P_ROLE_DEVICE) { -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_IDLE); -+ else -+#endif -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); -+ -+ pwdinfo->intent = 1; -+ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_LISTEN); -+ } else if (role == P2P_ROLE_CLIENT) { -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ pwdinfo->intent = 1; -+ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ } else if (role == P2P_ROLE_GO) { -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ pwdinfo->intent = 15; -+ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ } -+ -+ /* Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) */ -+ pwdinfo->support_rate[0] = 0x8c; /* 6(B) */ -+ pwdinfo->support_rate[1] = 0x92; /* 9(B) */ -+ pwdinfo->support_rate[2] = 0x18; /* 12 */ -+ pwdinfo->support_rate[3] = 0x24; /* 18 */ -+ pwdinfo->support_rate[4] = 0x30; /* 24 */ -+ pwdinfo->support_rate[5] = 0x48; /* 36 */ -+ pwdinfo->support_rate[6] = 0x60; /* 48 */ -+ pwdinfo->support_rate[7] = 0x6c; /* 54 */ -+ -+ _rtw_memcpy((void *) pwdinfo->p2p_wildcard_ssid, "DIRECT-", 7); -+ -+ _rtw_memset(pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN); -+ pwdinfo->device_name_len = 0; -+ -+ _rtw_memset(&pwdinfo->invitereq_info, 0x00, sizeof(struct tx_invite_req_info)); -+ pwdinfo->invitereq_info.token = 3; /* Token used for P2P invitation request frame. */ -+ -+ _rtw_memset(&pwdinfo->inviteresp_info, 0x00, sizeof(struct tx_invite_resp_info)); -+ pwdinfo->inviteresp_info.token = 0; -+ -+ pwdinfo->profileindex = 0; -+ _rtw_memset(&pwdinfo->profileinfo[0], 0x00, sizeof(struct profile_info) * P2P_MAX_PERSISTENT_GROUP_NUM); -+ -+ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); -+ -+ pwdinfo->listen_dwell = (u8)((rtw_get_current_time() % 3) + 1); -+ /* RTW_INFO( "[%s] listen_dwell time is %d00ms\n", __FUNCTION__, pwdinfo->listen_dwell ); */ -+ -+ _rtw_memset(&pwdinfo->tx_prov_disc_info, 0x00, sizeof(struct tx_provdisc_req_info)); -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_NONE; -+ -+ _rtw_memset(&pwdinfo->nego_req_info, 0x00, sizeof(struct tx_nego_req_info)); -+ -+ pwdinfo->device_password_id_for_nego = WPS_DPID_PBC; -+ pwdinfo->negotiation_dialog_token = 1; -+ -+ _rtw_memset(pwdinfo->nego_ssid, 0x00, WLAN_SSID_MAXLEN); -+ pwdinfo->nego_ssidlen = 0; -+ -+ pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; -+#ifdef CONFIG_WFD -+ pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY | WPS_CONFIG_METHOD_PBC; -+ pwdinfo->wfd_info = pwfd_info; -+#else -+ pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY | WPS_CONFIG_METHOD_PBC | WPS_CONFIG_METHOD_KEYPAD; -+#endif /* CONFIG_WFD */ -+ pwdinfo->channel_list_attr_len = 0; -+ _rtw_memset(pwdinfo->channel_list_attr, 0x00, 100); -+ -+ _rtw_memset(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, 0x00, 4); -+ _rtw_memset(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, '0', 3); -+ _rtw_memset(&pwdinfo->groupid_info, 0x00, sizeof(struct group_id_info)); -+#ifdef CONFIG_CONCURRENT_MODE -+#ifdef CONFIG_IOCTL_CFG80211 -+ pwdinfo->ext_listen_interval = 1000; /* The interval to be available with legacy AP during p2p0-find/scan */ -+ pwdinfo->ext_listen_period = 3000; /* The time period to be available for P2P during nego */ -+#else /* !CONFIG_IOCTL_CFG80211 */ -+ /* pwdinfo->ext_listen_interval = 3000; */ -+ /* pwdinfo->ext_listen_period = 400; */ -+ pwdinfo->ext_listen_interval = 1000; -+ pwdinfo->ext_listen_period = 1000; -+#endif /* !CONFIG_IOCTL_CFG80211 */ -+#endif -+ -+ /* Commented by Kurt 20130319 -+ * For WiDi purpose: Use CFG80211 interface but controled WFD/RDS frame by driver itself. */ -+#ifdef CONFIG_IOCTL_CFG80211 -+ pwdinfo->driver_interface = DRIVER_CFG80211; -+#else -+ pwdinfo->driver_interface = DRIVER_WEXT; -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ pwdinfo->wfd_tdls_enable = 0; -+ _rtw_memset(pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN); -+ _rtw_memset(pwdinfo->p2p_peer_device_addr, 0x00, ETH_ALEN); -+ -+ pwdinfo->rx_invitereq_info.operation_ch[0] = 0; -+ pwdinfo->rx_invitereq_info.operation_ch[1] = 0; /* Used to indicate the scan end in site survey function */ -+#ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH -+ pwdinfo->rx_invitereq_info.operation_ch[2] = 0; -+ pwdinfo->rx_invitereq_info.operation_ch[3] = 0; -+ pwdinfo->rx_invitereq_info.operation_ch[4] = 0; -+#endif /* CONFIG_P2P_OP_CHK_SOCIAL_CH */ -+ pwdinfo->rx_invitereq_info.scan_op_ch_only = 0; -+ pwdinfo->p2p_info.operation_ch[0] = 0; -+ pwdinfo->p2p_info.operation_ch[1] = 0; /* Used to indicate the scan end in site survey function */ -+#ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH -+ pwdinfo->p2p_info.operation_ch[2] = 0; -+ pwdinfo->p2p_info.operation_ch[3] = 0; -+ pwdinfo->p2p_info.operation_ch[4] = 0; -+#endif /* CONFIG_P2P_OP_CHK_SOCIAL_CH */ -+ pwdinfo->p2p_info.scan_op_ch_only = 0; -+} -+ -+void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) -+{ -+ if (wdinfo->role != role) { -+ wdinfo->role = role; -+ rtw_mi_update_iface_status(&(wdinfo->padapter->mlmepriv), 0); -+ } -+} -+ -+#ifdef CONFIG_DBG_P2P -+ -+/** -+ * rtw_p2p_role_txt - Get the p2p role name as a text string -+ * @role: P2P role -+ * Returns: The state name as a printable text string -+ */ -+const char *rtw_p2p_role_txt(enum P2P_ROLE role) -+{ -+ switch (role) { -+ case P2P_ROLE_DISABLE: -+ return "P2P_ROLE_DISABLE"; -+ case P2P_ROLE_DEVICE: -+ return "P2P_ROLE_DEVICE"; -+ case P2P_ROLE_CLIENT: -+ return "P2P_ROLE_CLIENT"; -+ case P2P_ROLE_GO: -+ return "P2P_ROLE_GO"; -+ default: -+ return "UNKNOWN"; -+ } -+} -+ -+/** -+ * rtw_p2p_state_txt - Get the p2p state name as a text string -+ * @state: P2P state -+ * Returns: The state name as a printable text string -+ */ -+const char *rtw_p2p_state_txt(enum P2P_STATE state) -+{ -+ switch (state) { -+ case P2P_STATE_NONE: -+ return "P2P_STATE_NONE"; -+ case P2P_STATE_IDLE: -+ return "P2P_STATE_IDLE"; -+ case P2P_STATE_LISTEN: -+ return "P2P_STATE_LISTEN"; -+ case P2P_STATE_SCAN: -+ return "P2P_STATE_SCAN"; -+ case P2P_STATE_FIND_PHASE_LISTEN: -+ return "P2P_STATE_FIND_PHASE_LISTEN"; -+ case P2P_STATE_FIND_PHASE_SEARCH: -+ return "P2P_STATE_FIND_PHASE_SEARCH"; -+ case P2P_STATE_TX_PROVISION_DIS_REQ: -+ return "P2P_STATE_TX_PROVISION_DIS_REQ"; -+ case P2P_STATE_RX_PROVISION_DIS_RSP: -+ return "P2P_STATE_RX_PROVISION_DIS_RSP"; -+ case P2P_STATE_RX_PROVISION_DIS_REQ: -+ return "P2P_STATE_RX_PROVISION_DIS_REQ"; -+ case P2P_STATE_GONEGO_ING: -+ return "P2P_STATE_GONEGO_ING"; -+ case P2P_STATE_GONEGO_OK: -+ return "P2P_STATE_GONEGO_OK"; -+ case P2P_STATE_GONEGO_FAIL: -+ return "P2P_STATE_GONEGO_FAIL"; -+ case P2P_STATE_RECV_INVITE_REQ_MATCH: -+ return "P2P_STATE_RECV_INVITE_REQ_MATCH"; -+ case P2P_STATE_PROVISIONING_ING: -+ return "P2P_STATE_PROVISIONING_ING"; -+ case P2P_STATE_PROVISIONING_DONE: -+ return "P2P_STATE_PROVISIONING_DONE"; -+ case P2P_STATE_TX_INVITE_REQ: -+ return "P2P_STATE_TX_INVITE_REQ"; -+ case P2P_STATE_RX_INVITE_RESP_OK: -+ return "P2P_STATE_RX_INVITE_RESP_OK"; -+ case P2P_STATE_RECV_INVITE_REQ_DISMATCH: -+ return "P2P_STATE_RECV_INVITE_REQ_DISMATCH"; -+ case P2P_STATE_RECV_INVITE_REQ_GO: -+ return "P2P_STATE_RECV_INVITE_REQ_GO"; -+ case P2P_STATE_RECV_INVITE_REQ_JOIN: -+ return "P2P_STATE_RECV_INVITE_REQ_JOIN"; -+ case P2P_STATE_RX_INVITE_RESP_FAIL: -+ return "P2P_STATE_RX_INVITE_RESP_FAIL"; -+ case P2P_STATE_RX_INFOR_NOREADY: -+ return "P2P_STATE_RX_INFOR_NOREADY"; -+ case P2P_STATE_TX_INFOR_NOREADY: -+ return "P2P_STATE_TX_INFOR_NOREADY"; -+ default: -+ return "UNKNOWN"; -+ } -+} -+ -+void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) -+{ -+ if (!_rtw_p2p_chk_state(wdinfo, state)) { -+ enum P2P_STATE old_state = _rtw_p2p_state(wdinfo); -+ _rtw_p2p_set_state(wdinfo, state); -+ RTW_INFO("[CONFIG_DBG_P2P]%s:%d set_state from %s to %s\n", caller, line -+ , rtw_p2p_state_txt(old_state), rtw_p2p_state_txt(_rtw_p2p_state(wdinfo)) -+ ); -+ } else { -+ RTW_INFO("[CONFIG_DBG_P2P]%s:%d set_state to same state %s\n", caller, line -+ , rtw_p2p_state_txt(_rtw_p2p_state(wdinfo)) -+ ); -+ } -+} -+void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) -+{ -+ if (_rtw_p2p_pre_state(wdinfo) != state) { -+ enum P2P_STATE old_state = _rtw_p2p_pre_state(wdinfo); -+ _rtw_p2p_set_pre_state(wdinfo, state); -+ RTW_INFO("[CONFIG_DBG_P2P]%s:%d set_pre_state from %s to %s\n", caller, line -+ , rtw_p2p_state_txt(old_state), rtw_p2p_state_txt(_rtw_p2p_pre_state(wdinfo)) -+ ); -+ } else { -+ RTW_INFO("[CONFIG_DBG_P2P]%s:%d set_pre_state to same state %s\n", caller, line -+ , rtw_p2p_state_txt(_rtw_p2p_pre_state(wdinfo)) -+ ); -+ } -+} -+#if 0 -+void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line) -+{ -+ if (wdinfo->pre_p2p_state != -1) { -+ RTW_INFO("[CONFIG_DBG_P2P]%s:%d restore from %s to %s\n", caller, line -+ , p2p_state_str[wdinfo->p2p_state], p2p_state_str[wdinfo->pre_p2p_state] -+ ); -+ _rtw_p2p_restore_state(wdinfo); -+ } else { -+ RTW_INFO("[CONFIG_DBG_P2P]%s:%d restore no pre state, cur state %s\n", caller, line -+ , p2p_state_str[wdinfo->p2p_state] -+ ); -+ } -+} -+#endif -+void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line) -+{ -+ if (wdinfo->role != role) { -+ enum P2P_ROLE old_role = wdinfo->role; -+ _rtw_p2p_set_role(wdinfo, role); -+ RTW_INFO("[CONFIG_DBG_P2P]%s:%d set_role from %s to %s\n", caller, line -+ , rtw_p2p_role_txt(old_role), rtw_p2p_role_txt(wdinfo->role) -+ ); -+ } else { -+ RTW_INFO("[CONFIG_DBG_P2P]%s:%d set_role to same role %s\n", caller, line -+ , rtw_p2p_role_txt(wdinfo->role) -+ ); -+ } -+} -+#endif /* CONFIG_DBG_P2P */ -+ -+ -+int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) -+{ -+ int ret = _SUCCESS; -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#ifdef CONFIG_CONCURRENT_MODE -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#endif -+ -+ if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT || role == P2P_ROLE_GO) { -+#if defined(CONFIG_CONCURRENT_MODE) && (!defined(RTW_P2P_GROUP_INTERFACE) || !RTW_P2P_GROUP_INTERFACE) -+ /* Commented by Albert 2011/12/30 */ -+ /* The driver just supports 1 P2P group operation. */ -+ /* So, this function will do nothing if the buddy adapter had enabled the P2P function. */ -+ /*if(!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) -+ return ret;*/ -+ /* Only selected interface can be P2P interface */ -+ if (padapter->iface_id != padapter->registrypriv.sel_p2p_iface) { -+ RTW_ERR("%s, iface_id:%d is not P2P interface!\n", __func__, padapter->iface_id); -+ ret = _FAIL; -+ return ret; -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ /* leave IPS/Autosuspend */ -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ /* Added by Albert 2011/03/22 */ -+ /* In the P2P mode, the driver should not support the b mode. */ -+ /* So, the Tx packet shouldn't use the CCK rate */ -+ #ifdef CONFIG_IOCTL_CFG80211 -+ if (rtw_cfg80211_iface_has_p2p_group_cap(padapter)) -+ #endif -+ update_tx_basic_rate(padapter, WIRELESS_11AGN); -+ -+ /* Enable P2P function */ -+ init_wifidirect_info(padapter, role); -+ -+ #ifdef CONFIG_IOCTL_CFG80211 -+ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) -+ adapter_wdev_data(padapter)->p2p_enabled = _TRUE; -+ #endif -+ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_P2P_STATE, NULL, _TRUE); -+#ifdef CONFIG_WFD -+ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ rtw_hal_set_odm_var(padapter, HAL_ODM_WIFI_DISPLAY_STATE, NULL, _TRUE); -+#endif -+ -+ } else if (role == P2P_ROLE_DISABLE) { -+ -+ #ifdef CONFIG_IOCTL_CFG80211 -+ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) -+ adapter_wdev_data(padapter)->p2p_enabled = _FALSE; -+ #endif -+ -+ pwdinfo->listen_channel = 0; -+ -+ /* Disable P2P function */ -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ _cancel_timer_ex(&pwdinfo->find_phase_timer); -+ _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); -+ _cancel_timer_ex(&pwdinfo->pre_tx_scan_timer); -+ _cancel_timer_ex(&pwdinfo->reset_ch_sitesurvey); -+ _cancel_timer_ex(&pwdinfo->reset_ch_sitesurvey2); -+ reset_ch_sitesurvey_timer_process(padapter); -+ reset_ch_sitesurvey_timer_process2(padapter); -+#ifdef CONFIG_CONCURRENT_MODE -+ _cancel_timer_ex(&prochinfo->ap_roch_ch_switch_timer); -+#endif -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); -+ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_NONE); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DISABLE); -+ _rtw_memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info)); -+ -+ /* Remove profiles in wifidirect_info structure. */ -+ _rtw_memset(&pwdinfo->profileinfo[0], 0x00, sizeof(struct profile_info) * P2P_MAX_PERSISTENT_GROUP_NUM); -+ pwdinfo->profileindex = 0; -+ } -+ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_P2P_STATE, NULL, _FALSE); -+#ifdef CONFIG_WFD -+ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ rtw_hal_set_odm_var(padapter, HAL_ODM_WIFI_DISPLAY_STATE, NULL, _FALSE); -+#endif -+ -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ /* Restore to initial setting. */ -+ update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode); -+ -+ /* For WiDi purpose. */ -+#ifdef CONFIG_IOCTL_CFG80211 -+ pwdinfo->driver_interface = DRIVER_CFG80211; -+#else -+ pwdinfo->driver_interface = DRIVER_WEXT; -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ } -+ -+exit: -+ return ret; -+} -+ -+#endif /* CONFIG_P2P */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_pwrctrl.c b/drivers/staging/rtl8723cs/core/rtw_pwrctrl.c -new file mode 100644 -index 000000000000..5c519a5d39bb ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_pwrctrl.c -@@ -0,0 +1,2958 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_PWRCTRL_C_ -+ -+#include -+#include -+#include -+ -+#ifdef DBG_CHECK_FW_PS_STATE -+int rtw_fw_ps_state(PADAPTER padapter) -+{ -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ int ret = _FAIL, dont_care = 0; -+ u16 fw_ps_state = 0; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ -+ if (registry_par->check_fw_ps != 1) -+ return _SUCCESS; -+ -+ _enter_pwrlock(&pwrpriv->check_32k_lock); -+ -+ if (RTW_CANNOT_RUN(padapter)) { -+ RTW_INFO("%s: bSurpriseRemoved=%s , hw_init_completed=%d, bDriverStopped=%s\n", __func__ -+ , rtw_is_surprise_removed(padapter) ? "True" : "False" -+ , rtw_get_hw_init_completed(padapter) -+ , rtw_is_drv_stopped(padapter) ? "True" : "False"); -+ goto exit_fw_ps_state; -+ } -+ #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) -+ rtw_hal_get_hwreg(padapter, HW_VAR_FW_PS_STATE, (u8 *)&fw_ps_state); -+ if ((fw_ps_state & BIT_LPS_STATUS) == 0) -+ ret = _SUCCESS; -+ else { -+ pdbgpriv->dbg_poll_fail_cnt++; -+ RTW_INFO("%s: fw_ps_state=%04x\n", __FUNCTION__, fw_ps_state); -+ } -+ #else -+ rtw_hal_set_hwreg(padapter, HW_VAR_SET_REQ_FW_PS, (u8 *)&dont_care); -+ { -+ /* 4. if 0x88[7]=1, driver set cmd to leave LPS/IPS. */ -+ /* Else, hw will keep in active mode. */ -+ /* debug info: */ -+ /* 0x88[7] = 32kpermission, */ -+ /* 0x88[6:0] = current_ps_state */ -+ /* 0x89[7:0] = last_rpwm */ -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_FW_PS_STATE, (u8 *)&fw_ps_state); -+ -+ if ((fw_ps_state & 0x80) == 0) -+ ret = _SUCCESS; -+ else { -+ pdbgpriv->dbg_poll_fail_cnt++; -+ RTW_INFO("%s: fw_ps_state=%04x\n", __FUNCTION__, fw_ps_state); -+ } -+ } -+ #endif -+ -+exit_fw_ps_state: -+ _exit_pwrlock(&pwrpriv->check_32k_lock); -+ return ret; -+} -+#endif /*DBG_CHECK_FW_PS_STATE*/ -+#ifdef CONFIG_IPS -+void _ips_enter(_adapter *padapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ -+ pwrpriv->bips_processing = _TRUE; -+ -+ /* syn ips_mode with request */ -+ pwrpriv->ips_mode = pwrpriv->ips_mode_req; -+ -+ pwrpriv->ips_enter_cnts++; -+ RTW_INFO("==>ips_enter cnts:%d\n", pwrpriv->ips_enter_cnts); -+ -+ if (rf_off == pwrpriv->change_rfpwrstate) { -+ pwrpriv->bpower_saving = _TRUE; -+ RTW_PRINT("nolinked power save enter\n"); -+ -+ if (pwrpriv->ips_mode == IPS_LEVEL_2) -+ pwrpriv->bkeepfwalive = _TRUE; -+ -+#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS -+ pwrpriv->pwr_saving_start_time = rtw_get_current_time(); -+#endif /* CONFIG_RTW_CFGVENDOR_LLSTATS */ -+ -+ rtw_ips_pwr_down(padapter); -+ pwrpriv->rf_pwrstate = rf_off; -+ } -+ pwrpriv->bips_processing = _FALSE; -+ -+} -+ -+void ips_enter(_adapter *padapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_IpsNotify(padapter, pwrpriv->ips_mode_req); -+#endif /* CONFIG_BT_COEXIST */ -+ -+ _enter_pwrlock(&pwrpriv->lock); -+ _ips_enter(padapter); -+ _exit_pwrlock(&pwrpriv->lock); -+ -+#ifdef CONFIG_PCI_DYNAMIC_ASPM -+ rtw_pci_dynamic_aspm_set_mode(padapter, ASPM_MODE_PS); -+#endif -+} -+ -+int _ips_leave(_adapter *padapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ int result = _SUCCESS; -+ -+ if ((pwrpriv->rf_pwrstate == rf_off) && (!pwrpriv->bips_processing)) { -+ pwrpriv->bips_processing = _TRUE; -+ pwrpriv->change_rfpwrstate = rf_on; -+ pwrpriv->ips_leave_cnts++; -+ RTW_INFO("==>ips_leave cnts:%d\n", pwrpriv->ips_leave_cnts); -+ -+ result = rtw_ips_pwr_up(padapter); -+ if (result == _SUCCESS) -+ pwrpriv->rf_pwrstate = rf_on; -+ -+#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS -+ pwrpriv->pwr_saving_time += rtw_get_passing_time_ms(pwrpriv->pwr_saving_start_time); -+#endif /* CONFIG_RTW_CFGVENDOR_LLSTATS */ -+ -+ RTW_PRINT("nolinked power save leave\n"); -+ -+ RTW_INFO("==> ips_leave.....LED(0x%08x)...\n", rtw_read32(padapter, 0x4c)); -+ pwrpriv->bips_processing = _FALSE; -+ -+ pwrpriv->bkeepfwalive = _FALSE; -+ pwrpriv->bpower_saving = _FALSE; -+ } -+ -+ return result; -+} -+ -+int ips_leave(_adapter *padapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+#ifdef DBG_CHECK_FW_PS_STATE -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+#endif -+ int ret; -+ -+ if (!is_primary_adapter(padapter)) -+ return _SUCCESS; -+ -+ _enter_pwrlock(&pwrpriv->lock); -+ ret = _ips_leave(padapter); -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ RTW_INFO("ips leave doesn't leave 32k\n"); -+ pdbgpriv->dbg_leave_ips_fail_cnt++; -+ } -+#endif /* DBG_CHECK_FW_PS_STATE */ -+ _exit_pwrlock(&pwrpriv->lock); -+ -+#ifdef CONFIG_PCI_DYNAMIC_ASPM -+ rtw_pci_dynamic_aspm_set_mode(padapter, ASPM_MODE_PERF); -+#endif -+ -+ if (_SUCCESS == ret) -+ odm_dm_reset(&GET_HAL_DATA(padapter)->odmpriv); -+ -+#ifdef CONFIG_BT_COEXIST -+ if (_SUCCESS == ret) -+ rtw_btcoex_IpsNotify(padapter, IPS_NONE); -+#endif /* CONFIG_BT_COEXIST */ -+ -+ return ret; -+} -+#endif /* CONFIG_IPS */ -+ -+#ifdef SUPPORT_HW_RFOFF_DETECTED -+ int rtw_hw_suspend(_adapter *padapter); -+ int rtw_hw_resume(_adapter *padapter); -+#endif -+ -+bool rtw_pwr_unassociated_idle(_adapter *adapter) -+{ -+ u8 i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct xmit_priv *pxmit_priv = &adapter->xmitpriv; -+ struct mlme_priv *pmlmepriv; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo; -+#endif -+ -+ bool ret = _FALSE; -+ -+ if (adapter_to_pwrctl(adapter)->bpower_saving == _TRUE) { -+ /* RTW_INFO("%s: already in LPS or IPS mode\n", __func__); */ -+ goto exit; -+ } -+ -+ if (rtw_time_after(adapter_to_pwrctl(adapter)->ips_deny_time, rtw_get_current_time())) { -+ /* RTW_INFO("%s ips_deny_time\n", __func__); */ -+ goto exit; -+ } -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ pmlmepriv = &(iface->mlmepriv); -+#ifdef CONFIG_P2P -+ pwdinfo = &(iface->wdinfo); -+#endif -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE | WIFI_UNDER_SURVEY) -+ || check_fwstate(pmlmepriv, WIFI_UNDER_LINKING | WIFI_UNDER_WPS) -+ || MLME_IS_AP(iface) -+ || MLME_IS_MESH(iface) -+ || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE) -+ #if defined(CONFIG_IOCTL_CFG80211) -+ || rtw_cfg80211_get_is_roch(iface) == _TRUE -+ || (rtw_cfg80211_is_ro_ch_once(adapter) -+ && rtw_cfg80211_get_last_ro_ch_passing_ms(adapter) < 3000) -+ #elif defined(CONFIG_P2P) -+ || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE) -+ || rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN) -+ #endif -+ ) -+ goto exit; -+ -+ } -+ } -+ -+#if (MP_DRIVER == 1) -+ if (adapter->registrypriv.mp_mode == 1) -+ goto exit; -+#endif -+ -+ if (pxmit_priv->free_xmitbuf_cnt != NR_XMITBUFF || -+ pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF) { -+ RTW_PRINT("There are some pkts to transmit\n"); -+ RTW_PRINT("free_xmitbuf_cnt: %d, free_xmit_extbuf_cnt: %d\n", -+ pxmit_priv->free_xmitbuf_cnt, pxmit_priv->free_xmit_extbuf_cnt); -+ goto exit; -+ } -+ -+ ret = _TRUE; -+ -+exit: -+ return ret; -+} -+ -+ -+/* -+ * ATTENTION: -+ * rtw_ps_processor() doesn't handle LPS. -+ */ -+void rtw_ps_processor(_adapter *padapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+#ifdef SUPPORT_HW_RFOFF_DETECTED -+ rt_rf_power_state rfpwrstate; -+#endif /* SUPPORT_HW_RFOFF_DETECTED */ -+ u32 ps_deny = 0; -+ -+ _enter_pwrlock(&adapter_to_pwrctl(padapter)->lock); -+ ps_deny = rtw_ps_deny_get(padapter); -+ _exit_pwrlock(&adapter_to_pwrctl(padapter)->lock); -+ if (ps_deny != 0) { -+ if (!MLME_IS_MONITOR(padapter)) { -+ RTW_INFO(FUNC_ADPT_FMT ": ps_deny=0x%08X, skip power save!\n", -+ FUNC_ADPT_ARG(padapter), ps_deny); -+ } -+ goto exit; -+ } -+ -+ if (pwrpriv->bInSuspend == _TRUE) { /* system suspend or autosuspend */ -+ pdbgpriv->dbg_ps_insuspend_cnt++; -+ RTW_INFO("%s, pwrpriv->bInSuspend == _TRUE ignore this process\n", __FUNCTION__); -+ return; -+ } -+ -+ pwrpriv->ps_processing = _TRUE; -+ -+#ifdef SUPPORT_HW_RFOFF_DETECTED -+ if (pwrpriv->bips_processing == _TRUE) -+ goto exit; -+ -+ /* RTW_INFO("==> fw report state(0x%x)\n",rtw_read8(padapter,0x1ca)); */ -+ if (pwrpriv->bHWPwrPindetect) { -+ -+ rfpwrstate = RfOnOffDetect(padapter); -+ RTW_INFO("@@@@- #2 %s==> rfstate:%s\n", __FUNCTION__, (rfpwrstate == rf_on) ? "rf_on" : "rf_off"); -+ -+ if (rfpwrstate != pwrpriv->rf_pwrstate) { -+ if (rfpwrstate == rf_off) { -+ pwrpriv->change_rfpwrstate = rf_off; -+ pwrpriv->brfoffbyhw = _TRUE; -+ rtw_hw_suspend(padapter); -+ } else { -+ pwrpriv->change_rfpwrstate = rf_on; -+ rtw_hw_resume(padapter); -+ } -+ RTW_INFO("current rf_pwrstate(%s)\n", (pwrpriv->rf_pwrstate == rf_off) ? "rf_off" : "rf_on"); -+ } -+ -+ pwrpriv->pwr_state_check_cnts++; -+ } -+#endif /* SUPPORT_HW_RFOFF_DETECTED */ -+ -+ if (pwrpriv->ips_mode_req == IPS_NONE) -+ goto exit; -+ -+ if (rtw_pwr_unassociated_idle(padapter) == _FALSE) -+ goto exit; -+ -+ if ((pwrpriv->rf_pwrstate == rf_on) && ((pwrpriv->pwr_state_check_cnts % 4) == 0)) { -+ RTW_INFO("==>%s .fw_state(%x)\n", __FUNCTION__, get_fwstate(pmlmepriv)); -+ pwrpriv->change_rfpwrstate = rf_off; -+ -+#ifdef CONFIG_IPS -+ ips_enter(padapter); -+#endif -+ -+ } -+exit: -+#ifndef CONFIG_IPS_CHECK_IN_WD -+ rtw_set_pwr_state_check_timer(pwrpriv); -+#endif -+ pwrpriv->ps_processing = _FALSE; -+ return; -+} -+ -+void pwr_state_check_handler(void *ctx) -+{ -+ _adapter *padapter = (_adapter *)ctx; -+ rtw_ps_cmd(padapter); -+} -+ -+#ifdef CONFIG_LPS -+#ifdef CONFIG_CHECK_LEAVE_LPS -+#ifdef CONFIG_LPS_CHK_BY_TP -+void traffic_check_for_leave_lps_by_tp(PADAPTER padapter, u8 tx, struct sta_info *sta) -+{ -+ struct stainfo_stats *pstats = &sta->sta_stats; -+ u64 cur_acc_tx_bytes = 0, cur_acc_rx_bytes = 0; -+ u32 tx_tp_kbyte = 0, rx_tp_kbyte = 0; -+ u32 tx_tp_th = 0, rx_tp_th = 0; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ u8 leave_lps = _FALSE; -+ -+ if (tx) { /* from tx */ -+ cur_acc_tx_bytes = pstats->tx_bytes - pstats->acc_tx_bytes; -+ tx_tp_kbyte = cur_acc_tx_bytes >> 10; -+ tx_tp_th = pwrpriv->lps_tx_tp_th * 1024 / 8 * 2; /*KBytes @2s*/ -+ -+ if (tx_tp_kbyte >= tx_tp_th || -+ padapter->mlmepriv.LinkDetectInfo.NumTxOkInPeriod >= pwrpriv->lps_tx_pkts){ -+ if (pwrpriv->bLeisurePs -+ && (pwrpriv->pwr_mode != PS_MODE_ACTIVE) -+ #ifdef CONFIG_BT_COEXIST -+ && (rtw_btcoex_IsBtControlLps(padapter) == _FALSE) -+ #endif -+ ) { -+ leave_lps = _TRUE; -+ } -+ } -+ -+ } else { /* from rx path */ -+ cur_acc_rx_bytes = pstats->rx_bytes - pstats->acc_rx_bytes; -+ rx_tp_kbyte = cur_acc_rx_bytes >> 10; -+ rx_tp_th = pwrpriv->lps_rx_tp_th * 1024 / 8 * 2; -+ -+ if (rx_tp_kbyte>= rx_tp_th || -+ padapter->mlmepriv.LinkDetectInfo.NumRxUnicastOkInPeriod >= pwrpriv->lps_rx_pkts) { -+ if (pwrpriv->bLeisurePs -+ && (pwrpriv->pwr_mode != PS_MODE_ACTIVE) -+ #ifdef CONFIG_BT_COEXIST -+ && (rtw_btcoex_IsBtControlLps(padapter) == _FALSE) -+ #endif -+ ) { -+ leave_lps = _TRUE; -+ } -+ } -+ } -+ -+ if (leave_lps) { -+ #ifdef DBG_LPS_CHK_BY_TP -+ RTW_INFO("leave lps via %s, ", tx ? "Tx" : "Rx"); -+ if (tx) -+ RTW_INFO("Tx = %d [%d] (KB)\n", tx_tp_kbyte, tx_tp_th); -+ else -+ RTW_INFO("Rx = %d [%d] (KB)\n", rx_tp_kbyte, rx_tp_th); -+ #endif -+ pwrpriv->lps_chk_cnt = pwrpriv->lps_chk_cnt_th; -+ /* rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 0); */ -+ rtw_lps_ctrl_wk_cmd(padapter, tx ? LPS_CTRL_TX_TRAFFIC_LEAVE : LPS_CTRL_RX_TRAFFIC_LEAVE, 0); -+ } -+} -+#endif /*CONFIG_LPS_CHK_BY_TP*/ -+ -+void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets) -+{ -+ static systime start_time = 0; -+ static u32 xmit_cnt = 0; -+ u8 bLeaveLPS = _FALSE; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ -+ -+ if (tx) { /* from tx */ -+ xmit_cnt += tx_packets; -+ -+ if (start_time == 0) -+ start_time = rtw_get_current_time(); -+ -+ if (rtw_get_passing_time_ms(start_time) > 2000) { /* 2 sec == watch dog timer */ -+ if (xmit_cnt > 8) { -+ if ((adapter_to_pwrctl(padapter)->bLeisurePs) -+ && (adapter_to_pwrctl(padapter)->pwr_mode != PS_MODE_ACTIVE) -+#ifdef CONFIG_BT_COEXIST -+ && (rtw_btcoex_IsBtControlLps(padapter) == _FALSE) -+#endif -+ ) { -+ /* RTW_INFO("leave lps via Tx = %d\n", xmit_cnt); */ -+ bLeaveLPS = _TRUE; -+ } -+ } -+ -+ start_time = rtw_get_current_time(); -+ xmit_cnt = 0; -+ } -+ -+ } else { /* from rx path */ -+ if (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 4/*2*/) { -+ if ((adapter_to_pwrctl(padapter)->bLeisurePs) -+ && (adapter_to_pwrctl(padapter)->pwr_mode != PS_MODE_ACTIVE) -+#ifdef CONFIG_BT_COEXIST -+ && (rtw_btcoex_IsBtControlLps(padapter) == _FALSE) -+#endif -+ ) { -+ /* RTW_INFO("leave lps via Rx = %d\n", pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); */ -+ bLeaveLPS = _TRUE; -+ } -+ } -+ } -+ -+ if (bLeaveLPS) { -+ /* RTW_INFO("leave lps via %s, Tx = %d, Rx = %d\n", tx?"Tx":"Rx", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); */ -+ /* rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 0); */ -+ rtw_lps_ctrl_wk_cmd(padapter, tx ? LPS_CTRL_TX_TRAFFIC_LEAVE : LPS_CTRL_RX_TRAFFIC_LEAVE, tx ? RTW_CMDF_DIRECTLY : 0); -+ } -+} -+#endif /* CONFIG_CHECK_LEAVE_LPS */ -+ -+#ifdef CONFIG_LPS_LCLK -+#define LPS_CPWM_TIMEOUT_MS 10 /*ms*/ -+#define LPS_RPWM_RETRY_CNT 3 -+ -+u8 rtw_cpwm_polling(_adapter *adapter, u8 rpwm, u8 cpwm_orig) -+{ -+ u8 rst = _FAIL; -+ u8 cpwm_now = 0; -+ systime start_time; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ #ifdef DBG_CHECK_FW_PS_STATE -+ struct debug_priv *pdbgpriv = &(adapter_to_dvobj(adapter)->drv_dbg); -+ #endif -+ -+ pwrpriv->rpwm_retry = 0; -+ -+ do { -+ start_time = rtw_get_current_time(); -+ do { -+ rtw_msleep_os(1); -+ rtw_hal_get_hwreg(adapter, HW_VAR_CPWM, &cpwm_now); -+ -+ if ((cpwm_orig ^ cpwm_now) & 0x80) { -+ pwrpriv->cpwm = PS_STATE_S4; -+ pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE; -+ rst = _SUCCESS; -+ break; -+ } -+ } while (rtw_get_passing_time_ms(start_time) < LPS_CPWM_TIMEOUT_MS && !RTW_CANNOT_RUN(adapter)); -+ -+ if (rst == _SUCCESS) -+ break; -+ else { -+ /* rpwm retry */ -+ cpwm_orig = cpwm_now; -+ rpwm &= ~PS_TOGGLE; -+ rpwm |= pwrpriv->tog; -+ rtw_hal_set_hwreg(adapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm)); -+ pwrpriv->tog += 0x80; -+ } -+ } while (pwrpriv->rpwm_retry++ < LPS_RPWM_RETRY_CNT && !RTW_CANNOT_RUN(adapter)); -+ -+ if (rst == _SUCCESS) { -+ #ifdef DBG_CHECK_FW_PS_STATE -+ RTW_INFO("%s: polling cpwm OK! rpwm_retry=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n" -+ , __func__, pwrpriv->rpwm_retry, cpwm_orig, cpwm_now, rtw_read8(adapter, REG_CR)); -+ if (rtw_fw_ps_state(adapter) == _FAIL) { -+ RTW_INFO("leave 32k but fw state in 32k\n"); -+ pdbgpriv->dbg_rpwm_toogle_cnt++; -+ } -+ #endif /* DBG_CHECK_FW_PS_STATE */ -+ } else { -+ RTW_ERR("%s: polling cpwm timeout! rpwm_retry=%d, cpwm_orig=%02x, cpwm_now=%02x\n" -+ , __func__, pwrpriv->rpwm_retry, cpwm_orig, cpwm_now); -+ #ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(adapter) == _FAIL) { -+ RTW_INFO("rpwm timeout and fw ps state in 32k\n"); -+ pdbgpriv->dbg_rpwm_timeout_fail_cnt++; -+ } -+ #endif /* DBG_CHECK_FW_PS_STATE */ -+ -+ #ifdef CONFIG_LPS_RPWM_TIMER -+ _set_timer(&pwrpriv->pwr_rpwm_timer, 1); -+ #endif /* CONFIG_LPS_RPWM_TIMER */ -+ } -+ -+ return rst; -+} -+#endif -+/* -+ * Description: -+ * This function MUST be called under power lock protect -+ * -+ * Parameters -+ * padapter -+ * pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4 -+ * -+ */ -+u8 rtw_set_rpwm(PADAPTER padapter, u8 pslv) -+{ -+ u8 rpwm = 0xFF; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+#ifdef CONFIG_LPS_LCLK -+ u8 cpwm_orig; -+#endif -+ -+ pslv = PS_STATE(pslv); -+ -+#ifdef CONFIG_LPS_RPWM_TIMER -+ if (pwrpriv->brpwmtimeout == _TRUE) -+ RTW_INFO("%s: RPWM timeout, force to set RPWM(0x%02X) again!\n", __FUNCTION__, pslv); -+ else -+#endif /* CONFIG_LPS_RPWM_TIMER */ -+ { -+ if ((pwrpriv->rpwm == pslv) -+#ifdef CONFIG_LPS_LCLK -+ || ((pwrpriv->rpwm >= PS_STATE_S2) && (pslv >= PS_STATE_S2)) -+#endif -+ || (pwrpriv->lps_level == LPS_NORMAL) -+ ) { -+ return rpwm; -+ } -+ } -+ -+ if (rtw_is_surprise_removed(padapter) || -+ (!rtw_is_hw_init_completed(padapter))) { -+ -+ pwrpriv->cpwm = PS_STATE_S4; -+ -+ return rpwm; -+ } -+ -+ if (rtw_is_drv_stopped(padapter)) -+ if (pslv < PS_STATE_S2) -+ return rpwm; -+ -+ rpwm = pslv | pwrpriv->tog; -+#ifdef CONFIG_LPS_LCLK -+ /* only when from PS_STATE S0/S1 to S2 and higher needs ACK */ -+ if ((pwrpriv->cpwm < PS_STATE_S2) && (pslv >= PS_STATE_S2)) -+ rpwm |= PS_ACK; -+#endif -+ -+ pwrpriv->rpwm = pslv; -+ -+#ifdef CONFIG_LPS_LCLK -+ cpwm_orig = 0; -+ if (rpwm & PS_ACK) -+ rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig); -+#endif -+ -+#if defined(CONFIG_LPS_RPWM_TIMER) && !defined(CONFIG_DETECT_CPWM_BY_POLLING) -+ if (rpwm & PS_ACK) { -+ #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN) -+ if (pwrpriv->wowlan_mode != _TRUE && -+ pwrpriv->wowlan_ap_mode != _TRUE && -+ pwrpriv->wowlan_p2p_mode != _TRUE) -+ #endif -+ _set_timer(&pwrpriv->pwr_rpwm_timer, LPS_CPWM_TIMEOUT_MS); -+ } -+#endif /* CONFIG_LPS_RPWM_TIMER & !CONFIG_DETECT_CPWM_BY_POLLING */ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm)); -+ -+ pwrpriv->tog += 0x80; -+ -+#ifdef CONFIG_LPS_LCLK -+ /* No LPS 32K, No Ack */ -+ if (rpwm & PS_ACK) { -+ #ifdef CONFIG_DETECT_CPWM_BY_POLLING -+ rtw_cpwm_polling(padapter, rpwm, cpwm_orig); -+ #else -+ #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN) -+ if (pwrpriv->wowlan_mode == _TRUE || -+ pwrpriv->wowlan_ap_mode == _TRUE || -+ pwrpriv->wowlan_p2p_mode == _TRUE) -+ rtw_cpwm_polling(padapter, rpwm, cpwm_orig); -+ #endif /*#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)*/ -+ #endif /*#ifdef CONFIG_DETECT_CPWM_BY_POLLING*/ -+ } else -+#endif /* CONFIG_LPS_LCLK */ -+ { -+ pwrpriv->cpwm = pslv; -+ } -+ -+ return rpwm; -+} -+ -+u8 PS_RDY_CHECK(_adapter *padapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ if (_TRUE == pwrpriv->bInSuspend && pwrpriv->wowlan_mode) -+ return _TRUE; -+ else if (_TRUE == pwrpriv->bInSuspend && pwrpriv->wowlan_ap_mode) -+ return _TRUE; -+ else if (_TRUE == pwrpriv->bInSuspend) -+ return _FALSE; -+#else -+ if (_TRUE == pwrpriv->bInSuspend) -+ return _FALSE; -+#endif -+ -+ if (rtw_time_after(pwrpriv->lps_deny_time, rtw_get_current_time())) -+ return _FALSE; -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) -+ || check_fwstate(pmlmepriv, WIFI_UNDER_LINKING | WIFI_UNDER_WPS) -+ || MLME_IS_AP(padapter) -+ || MLME_IS_MESH(padapter) -+ || MLME_IS_MONITOR(padapter) -+ || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE) -+ #if defined(CONFIG_IOCTL_CFG80211) -+ || rtw_cfg80211_get_is_roch(padapter) == _TRUE -+ #endif -+ || rtw_is_scan_deny(padapter) -+ #ifdef CONFIG_TDLS -+ /* TDLS link is established. */ -+ || (padapter->tdlsinfo.link_established == _TRUE) -+ #endif /* CONFIG_TDLS */ -+ #ifdef CONFIG_DFS_MASTER -+ || adapter_to_rfctl(padapter)->radar_detect_enabled -+ #endif -+ ) -+ return _FALSE; -+ -+ if ((padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) && (padapter->securitypriv.binstallGrpkey == _FALSE)) { -+ RTW_INFO("Group handshake still in progress !!!\n"); -+ return _FALSE; -+ } -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (!rtw_cfg80211_pwr_mgmt(padapter)) -+ return _FALSE; -+#endif -+ -+ return _TRUE; -+} -+ -+#if defined(CONFIG_FWLPS_IN_IPS) -+void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ int cnt = 0; -+ systime start_time; -+ u8 val8 = 0; -+ u8 cpwm_orig = 0, cpwm_now = 0; -+ u8 parm[H2C_INACTIVE_PS_LEN] = {0}; -+ -+ if (padapter->netif_up == _FALSE) { -+ RTW_INFO("%s: ERROR, netif is down\n", __func__); -+ return; -+ } -+ -+ /* u8 cmd_param; */ /* BIT0:enable, BIT1:NoConnect32k */ -+ if (enable) { -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_IpsNotify(padapter, pwrpriv->ips_mode_req); -+#endif -+ /* Enter IPS */ -+ RTW_INFO("%s: issue H2C to FW when entering IPS\n", __func__); -+ -+ parm[0] = 0x1;/* suggest by Isaac.Hsu*/ -+#ifdef CONFIG_PNO_SUPPORT -+ if (pwrpriv->pno_inited) { -+ parm[1] = pwrpriv->pnlo_info->fast_scan_iterations; -+ parm[2] = pwrpriv->pnlo_info->slow_scan_period; -+ } -+#endif -+ -+ rtw_hal_fill_h2c_cmd(padapter, /* H2C_FWLPS_IN_IPS_, */ -+ H2C_INACTIVE_PS_, -+ H2C_INACTIVE_PS_LEN, parm); -+ /* poll 0x1cc to make sure H2C command already finished by FW; MAC_0x1cc=0 means H2C done by FW. */ -+ do { -+ val8 = rtw_read8(padapter, REG_HMETFR); -+ cnt++; -+ RTW_INFO("%s polling REG_HMETFR=0x%x, cnt=%d\n", -+ __func__, val8, cnt); -+ rtw_mdelay_os(10); -+ } while (cnt < 100 && (val8 != 0)); -+ -+#ifdef CONFIG_LPS_LCLK -+ /* H2C done, enter 32k */ -+ if (val8 == 0) { -+ /* ser rpwm to enter 32k */ -+ rtw_hal_get_hwreg(padapter, HW_VAR_RPWM_TOG, &val8); -+ RTW_INFO("%s: read rpwm=%02x\n", __FUNCTION__, val8); -+ val8 += 0x80; -+ val8 |= BIT(0); -+ rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&val8)); -+ RTW_INFO("%s: write rpwm=%02x\n", __FUNCTION__, val8); -+ adapter_to_pwrctl(padapter)->tog = (val8 + 0x80) & 0x80; -+ cnt = val8 = 0; -+ if (parm[1] == 0 || parm[2] == 0) { -+ do { -+ val8 = rtw_read8(padapter, REG_CR); -+ cnt++; -+ RTW_INFO("%s polling 0x100=0x%x, cnt=%d\n", -+ __func__, val8, cnt); -+ RTW_INFO("%s 0x08:%02x, 0x03:%02x\n", -+ __func__, -+ rtw_read8(padapter, 0x08), -+ rtw_read8(padapter, 0x03)); -+ rtw_mdelay_os(10); -+ } while (cnt < 20 && (val8 != 0xEA)); -+ } -+ } -+#endif -+ } else { -+ /* Leave IPS */ -+ RTW_INFO("%s: Leaving IPS in FWLPS state\n", __func__); -+ -+#ifdef CONFIG_LPS_LCLK -+ /* for polling cpwm */ -+ cpwm_orig = 0; -+ rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig); -+ -+ /* ser rpwm */ -+ rtw_hal_get_hwreg(padapter, HW_VAR_RPWM_TOG, &val8); -+ val8 += 0x80; -+ val8 |= BIT(6); -+ rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&val8)); -+ RTW_INFO("%s: write rpwm=%02x\n", __FUNCTION__, val8); -+ adapter_to_pwrctl(padapter)->tog = (val8 + 0x80) & 0x80; -+ -+ /* do polling cpwm */ -+ start_time = rtw_get_current_time(); -+ do { -+ -+ rtw_mdelay_os(1); -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now); -+ if ((cpwm_orig ^ cpwm_now) & 0x80) -+ break; -+ -+ if (rtw_get_passing_time_ms(start_time) > 100) { -+ RTW_INFO("%s: polling cpwm timeout when leaving IPS in FWLPS state\n", __FUNCTION__); -+ break; -+ } -+ } while (1); -+ -+#endif -+ parm[0] = 0x0; -+ parm[1] = 0x0; -+ parm[2] = 0x0; -+ rtw_hal_fill_h2c_cmd(padapter, H2C_INACTIVE_PS_, -+ H2C_INACTIVE_PS_LEN, parm); -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_IpsNotify(padapter, IPS_NONE); -+#endif -+ } -+} -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+void rtw_exec_lps(_adapter *padapter, u8 ps_mode) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ -+ if (ps_mode == PS_MODE_ACTIVE) { -+#ifdef CONFIG_LPS_ACK -+ _enter_critical_mutex(&pwrpriv->lps_ack_mutex, NULL); -+ rtw_sctx_init(&pwrpriv->lps_ack_sctx, 100); -+#endif /* CONFIG_LPS_ACK */ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); -+ rtw_hal_set_hwreg(padapter, HW_VAR_LPS_STATE_CHK, (u8 *)(&ps_mode)); -+ -+#ifdef CONFIG_LPS_ACK -+ _exit_critical_mutex(&pwrpriv->lps_ack_mutex, NULL); -+#endif /* CONFIG_LPS_ACK */ -+ } else { -+ if (MLME_IS_ASOC(padapter)) -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT": It can't execute LPS without Wi-Fi connection!\n", -+ FUNC_ADPT_ARG(padapter)); -+ } -+} -+ -+void rtw_lps_rfon_ctrl(_adapter *padapter, u8 rfon_ctrl) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ u8 rpwm = 0; -+ -+ if (pwrpriv->bFwCurrentInPSMode && pwrpriv->pwr_mode != PS_MODE_ACTIVE) { -+ if (rfon_ctrl == rf_on) { -+#ifdef CONFIG_LPS_LCLK -+ if (pwrpriv->lps_level >= LPS_LCLK) { -+ s32 ready = _FAIL; -+ systime stime; -+ s32 utime; -+ u32 timeout; /* unit: ms */ -+ -+#ifdef LPS_RPWM_WAIT_MS -+ timeout = LPS_RPWM_WAIT_MS; -+#else -+ timeout = 30; -+#endif /* !LPS_RPWM_WAIT_MS */ -+ -+ stime = rtw_get_current_time(); -+ do { -+ ready = rtw_register_task_alive(padapter, LPS_ALIVE); -+ if (ready == _SUCCESS) -+ break; -+ -+ utime = rtw_get_passing_time_ms(stime); -+ if (utime > timeout) -+ break; -+ -+ rtw_msleep_os(1); -+ } while (1); -+ -+ if (ready == _FAIL) -+ RTW_INFO(FUNC_ADPT_FMT": It is not ready to leave 32K !!!\n", -+ FUNC_ADPT_ARG(padapter)); -+ } -+#endif /* CONFIG_LPS_LCLK */ -+ -+#ifdef CONFIG_LPS_ACK -+ _enter_critical_mutex(&pwrpriv->lps_ack_mutex, NULL); -+ rtw_sctx_init(&pwrpriv->lps_ack_sctx, 100); -+#endif /* CONFIG_LPS_ACK */ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE_RFON_CTRL, (u8 *)(&rfon_ctrl)); -+ rtw_hal_set_hwreg(padapter, HW_VAR_LPS_RFON_CHK, (u8 *)(&rfon_ctrl)); -+ -+#ifdef CONFIG_LPS_ACK -+ _exit_critical_mutex(&pwrpriv->lps_ack_mutex, NULL); -+#endif /* CONFIG_LPS_ACK */ -+ } else { -+ if (MLME_IS_ASOC(padapter)) { -+#ifdef CONFIG_LPS_PG -+ if (pwrpriv->lps_level == LPS_PG) { -+ if (rtw_hal_set_lps_pg_info_cmd(padapter) == _FAIL) -+ RTW_INFO(FUNC_ADPT_FMT": Send PG H2C command Fail! \n", -+ FUNC_ADPT_ARG(padapter)); -+ } -+#endif /* CONFIG_LPS_PG */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE_RFON_CTRL, (u8 *)(&rfon_ctrl)); -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT": It can't execute RFON without Wi-Fi connection!\n", -+ FUNC_ADPT_ARG(padapter)); -+ } -+ -+#ifdef CONFIG_LPS_LCLK -+ if (pwrpriv->lps_level >= LPS_LCLK) { -+ rtw_unregister_task_alive(padapter, LPS_ALIVE); -+ -+ if (pwrpriv->alives == 0) { -+ u8 polling_cnt = 0; -+ u8 reg_val8 = 0; -+ u8 result = _FAIL; -+ -+ do { -+ rtw_msleep_os(1); -+ reg_val8 = rtw_read8(padapter, REG_CR); -+ if (reg_val8 == 0xEA) { -+ result= _SUCCESS; -+ break; -+ } -+ polling_cnt++; -+ } while (polling_cnt < 100); -+ -+ if (result == _FAIL ) -+ RTW_INFO(FUNC_ADPT_FMT": It is not finished to enter 32K !!!\n", -+ FUNC_ADPT_ARG(padapter)); -+ } -+ } -+#endif /* CONFIG_LPS_LCLK */ -+ } -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT": RFON can't work due to ps state is not in LPS !\n", -+ FUNC_ADPT_ARG(padapter)); -+ } -+} -+ -+void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN) -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+#endif -+#ifdef CONFIG_WMMPS_STA -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+#endif -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+#ifdef CONFIG_TDLS -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ _irqL irqL; -+ int i, j; -+ _list *plist, *phead; -+ struct sta_info *ptdls_sta; -+#endif /* CONFIG_TDLS */ -+#ifdef CONFIG_LPS_PG -+ u8 lps_pg_hdl_id = 0; -+#endif -+ -+ -+ -+ if (ps_mode > PM_Card_Disable) { -+ return; -+ } -+ -+ if (pwrpriv->pwr_mode == ps_mode) { -+ if (PS_MODE_ACTIVE == ps_mode) -+ return; -+ -+#ifndef CONFIG_BT_COEXIST -+#ifdef CONFIG_WMMPS_STA -+ if (!rtw_is_wmmps_mode(padapter)) -+#endif /* CONFIG_WMMPS_STA */ -+ if ((pwrpriv->smart_ps == smart_ps) && -+ (pwrpriv->bcn_ant_mode == bcn_ant_mode)) -+ return; -+#endif /* !CONFIG_BT_COEXIST */ -+ } -+ -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ if (PS_MODE_ACTIVE != ps_mode) { -+ rtw_set_ps_rsvd_page(padapter); -+ rtw_set_default_port_id(padapter); -+ } -+#endif -+ -+#ifdef CONFIG_LPS_PG -+ if ((PS_MODE_ACTIVE != ps_mode) && (pwrpriv->lps_level == LPS_PG)) { -+ if (pwrpriv->wowlan_mode != _TRUE) { -+ /*rtw_hal_set_lps_pg_info(padapter);*/ -+ lps_pg_hdl_id = LPS_PG_INFO_CFG; -+ rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); -+ } -+ } -+#endif -+ -+#ifdef CONFIG_LPS_LCLK -+ _enter_pwrlock(&pwrpriv->lock); -+#endif -+ -+ /* if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) */ -+ if (ps_mode == PS_MODE_ACTIVE) { -+ if (1 -+#ifdef CONFIG_BT_COEXIST -+ && (((rtw_btcoex_IsBtControlLps(padapter) == _FALSE) -+#ifdef CONFIG_P2P_PS -+ && (pwdinfo->opp_ps == 0) -+#endif /* CONFIG_P2P_PS */ -+ ) -+ || ((rtw_btcoex_IsBtControlLps(padapter) == _TRUE) -+ && (rtw_btcoex_IsLpsOn(padapter) == _FALSE)) -+ ) -+#else /* !CONFIG_BT_COEXIST */ -+#ifdef CONFIG_P2P_PS -+ && (pwdinfo->opp_ps == 0) -+#endif /* CONFIG_P2P_PS */ -+#endif /* !CONFIG_BT_COEXIST */ -+ ) { -+ RTW_INFO(FUNC_ADPT_FMT" Leave 802.11 power save - %s\n", -+ FUNC_ADPT_ARG(padapter), msg); -+ -+ if (pwrpriv->lps_leave_cnts < UINT_MAX) -+ pwrpriv->lps_leave_cnts++; -+ else -+ pwrpriv->lps_leave_cnts = 0; -+#ifdef CONFIG_TDLS -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ ptdls_sta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) -+ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->cmn.mac_addr, 0, 0, 0); -+ plist = get_next(plist); -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ -+ pwrpriv->pwr_mode = ps_mode; -+ rtw_set_rpwm(padapter, PS_STATE_S4); -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN) -+ if (pwrpriv->wowlan_mode == _TRUE || -+ pwrpriv->wowlan_ap_mode == _TRUE || -+ pwrpriv->wowlan_p2p_mode == _TRUE) { -+ systime start_time; -+ u32 delay_ms; -+ u8 val8; -+ delay_ms = 20; -+ start_time = rtw_get_current_time(); -+ do { -+ rtw_hal_get_hwreg(padapter, HW_VAR_SYS_CLKR, &val8); -+ if (!(val8 & BIT(4))) { /* 0x08 bit4 =1 --> in 32k, bit4 = 0 --> leave 32k */ -+ pwrpriv->cpwm = PS_STATE_S4; -+ break; -+ } -+ if (rtw_get_passing_time_ms(start_time) > delay_ms) { -+ RTW_INFO("%s: Wait for FW 32K leave more than %u ms!!!\n", -+ __FUNCTION__, delay_ms); -+ pdbgpriv->dbg_wow_leave_ps_fail_cnt++; -+ break; -+ } -+ rtw_usleep_os(100); -+ } while (1); -+ } -+#endif -+#ifdef CONFIG_LPS_PG -+ if (pwrpriv->lps_level == LPS_PG) { -+ lps_pg_hdl_id = LPS_PG_REDLEMEM; -+ rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); -+ } -+#endif -+#ifdef CONFIG_WOWLAN -+ if (pwrpriv->wowlan_mode == _TRUE) -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_INACTIVE_IPS, (u8 *)(&ps_mode)); -+#endif /* CONFIG_WOWLAN */ -+ -+ rtw_exec_lps(padapter, ps_mode); -+ -+#ifdef CONFIG_LPS_PG -+ if (pwrpriv->lps_level == LPS_PG) { -+ lps_pg_hdl_id = LPS_PG_PHYDM_EN; -+ rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); -+ } -+#endif -+ -+#ifdef CONFIG_LPS_POFF -+ rtw_hal_set_hwreg(padapter, HW_VAR_LPS_POFF_SET_MODE, -+ (u8 *)(&ps_mode)); -+#endif /*CONFIG_LPS_POFF*/ -+ -+ pwrpriv->bFwCurrentInPSMode = _FALSE; -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_LpsNotify(padapter, ps_mode); -+#endif /* CONFIG_BT_COEXIST */ -+ } -+ } else { -+ if ((PS_RDY_CHECK(padapter) && check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) -+#ifdef CONFIG_BT_COEXIST -+ || ((rtw_btcoex_IsBtControlLps(padapter) == _TRUE) -+ && (rtw_btcoex_IsLpsOn(padapter) == _TRUE)) -+#endif -+#ifdef CONFIG_P2P_WOWLAN -+ || (_TRUE == pwrpriv->wowlan_p2p_mode) -+#endif /* CONFIG_P2P_WOWLAN */ -+#ifdef CONFIG_WOWLAN -+ || WOWLAN_IS_STA_MIX_MODE(padapter) -+#endif /* CONFIG_WOWLAN */ -+ ) { -+ u8 pslv; -+ -+ RTW_INFO(FUNC_ADPT_FMT" Enter 802.11 power save - %s\n", -+ FUNC_ADPT_ARG(padapter), msg); -+ -+ if (pwrpriv->lps_enter_cnts < UINT_MAX) -+ pwrpriv->lps_enter_cnts++; -+ else -+ pwrpriv->lps_enter_cnts = 0; -+#ifdef CONFIG_TDLS -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ ptdls_sta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) -+ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->cmn.mac_addr, 1, 0, 0); -+ plist = get_next(plist); -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_LpsNotify(padapter, ps_mode); -+#endif /* CONFIG_BT_COEXIST */ -+ -+#ifdef CONFIG_LPS_POFF -+ rtw_hal_set_hwreg(padapter, HW_VAR_LPS_POFF_SET_MODE, -+ (u8 *)(&ps_mode)); -+#endif /*CONFIG_LPS_POFF*/ -+ -+ pwrpriv->bFwCurrentInPSMode = _TRUE; -+ pwrpriv->pwr_mode = ps_mode; -+ pwrpriv->smart_ps = smart_ps; -+ pwrpriv->bcn_ant_mode = bcn_ant_mode; -+#ifdef CONFIG_LPS_PG -+ if (pwrpriv->lps_level == LPS_PG) { -+ lps_pg_hdl_id = LPS_PG_PHYDM_DIS; -+ rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); -+ } -+#endif -+ -+#ifdef CONFIG_WMMPS_STA -+ pwrpriv->wmm_smart_ps = pregistrypriv->wmm_smart_ps; -+#endif /* CONFIG_WMMPS_STA */ -+ -+ rtw_exec_lps(padapter, ps_mode); -+ -+#ifdef CONFIG_WOWLAN -+ if (pwrpriv->wowlan_mode == _TRUE) -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_INACTIVE_IPS, (u8 *)(&ps_mode)); -+#endif /* CONFIG_WOWLAN */ -+ -+#ifdef CONFIG_P2P_PS -+ /* Set CTWindow after LPS */ -+ if (pwdinfo->opp_ps == 1) -+ p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 0); -+#endif /* CONFIG_P2P_PS */ -+ -+ pslv = PS_STATE_S2; -+#ifdef CONFIG_LPS_LCLK -+ if (pwrpriv->alives == 0) -+ pslv = PS_STATE_S0; -+#endif /* CONFIG_LPS_LCLK */ -+ -+#ifdef CONFIG_BT_COEXIST -+ if ((rtw_btcoex_IsBtDisabled(padapter) == _FALSE) -+ && (rtw_btcoex_IsBtControlLps(padapter) == _TRUE)) { -+ u8 val8; -+ -+ val8 = rtw_btcoex_LpsVal(padapter); -+ if (val8 & BIT(4)) -+ pslv = PS_STATE_S2; -+ -+ } -+#endif /* CONFIG_BT_COEXIST */ -+ -+ rtw_set_rpwm(padapter, pslv); -+ } -+ } -+ -+#ifdef CONFIG_LPS_LCLK -+ _exit_pwrlock(&pwrpriv->lock); -+#endif -+ -+} -+ -+const char * const LPS_CTRL_PHYDM = "LPS_CTRL_PHYDM"; -+ -+/* -+ * Description: -+ * Enter the leisure power save mode. -+ * */ -+void LPS_Enter(PADAPTER padapter, const char *msg) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ int i; -+ char buf[32] = {0}; -+#ifdef DBG_LA_MODE -+ struct registry_priv *registry_par = &(padapter->registrypriv); -+#endif -+ -+ /* RTW_INFO("+LeisurePSEnter\n"); */ -+ if (GET_HAL_DATA(padapter)->bFWReady == _FALSE) -+ return; -+ -+#ifdef CONFIG_BT_COEXIST -+ if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) -+ return; -+#endif -+ -+#ifdef DBG_LA_MODE -+ if(registry_par->la_mode_en == 1) { -+ RTW_INFO("%s LA debug mode lps_leave \n", __func__); -+ return; -+ } -+#endif -+ /* Skip lps enter request if number of assocated adapters is not 1 */ -+ if (rtw_mi_get_assoc_if_num(padapter) != 1) -+ return; -+ -+#ifndef CONFIG_FW_MULTI_PORT_SUPPORT -+ /* Skip lps enter request for adapter not port0 */ -+ if (get_hw_port(padapter) != HW_PORT0) -+ return; -+#endif -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (PS_RDY_CHECK(dvobj->padapters[i]) == _FALSE) -+ return; -+ } -+ -+#ifdef CONFIG_CLIENT_PORT_CFG -+ if ((rtw_hal_get_port(padapter) == CLT_PORT_INVALID) || -+ get_clt_num(padapter) > MAX_CLIENT_PORT_NUM){ -+ RTW_ERR(ADPT_FMT" cannot get client port or clt num(%d) over than 4\n", ADPT_ARG(padapter), get_clt_num(padapter)); -+ return; -+ } -+#endif -+ -+#ifdef CONFIG_P2P_PS -+ if (padapter->wdinfo.p2p_ps_mode == P2P_PS_NOA) { -+ return;/* supporting p2p client ps NOA via H2C_8723B_P2P_PS_OFFLOAD */ -+ } -+#endif /* CONFIG_P2P_PS */ -+ -+ if (pwrpriv->bLeisurePs) { -+ /* Idle for a while if we connect to AP a while ago. */ -+ if (pwrpriv->LpsIdleCount >= 2) { /* 4 Sec */ -+ if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) { -+ -+#ifdef CONFIG_WMMPS_STA -+ if (rtw_is_wmmps_mode(padapter)) -+ msg = "WMMPS_IDLE"; -+#endif /* CONFIG_WMMPS_STA */ -+ -+ sprintf(buf, "WIFI-%s", msg); -+ pwrpriv->bpower_saving = _TRUE; -+ -+#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS -+ pwrpriv->pwr_saving_start_time = rtw_get_current_time(); -+#endif /* CONFIG_RTW_CFGVENDOR_LLSTATS */ -+ -+ rtw_set_ps_mode(padapter, pwrpriv->power_mgnt, padapter->registrypriv.smart_ps, 0, buf); -+ -+#ifdef CONFIG_PCI_DYNAMIC_ASPM -+ if (msg != LPS_CTRL_PHYDM) -+ rtw_pci_dynamic_aspm_set_mode(padapter, ASPM_MODE_PS); -+#endif -+ } -+ } else -+ pwrpriv->LpsIdleCount++; -+ } -+ -+ /* RTW_INFO("-LeisurePSEnter\n"); */ -+ -+} -+ -+/* -+ * Description: -+ * Leave the leisure power save mode. -+ * */ -+void LPS_Leave(PADAPTER padapter, const char *msg) -+{ -+#define LPS_LEAVE_TIMEOUT_MS 100 -+ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ char buf[32] = {0}; -+#ifdef DBG_CHECK_FW_PS_STATE -+ struct debug_priv *pdbgpriv = &dvobj->drv_dbg; -+#endif -+ -+ -+ /* RTW_INFO("+LeisurePSLeave\n"); */ -+ -+#ifdef CONFIG_BT_COEXIST -+ if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) -+ return; -+#endif -+ -+ if (pwrpriv->bLeisurePs) { -+ if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) { -+#ifdef CONFIG_PCI_DYNAMIC_ASPM -+ if (msg != LPS_CTRL_PHYDM) -+ rtw_pci_dynamic_aspm_set_mode(padapter, ASPM_MODE_PERF); -+#endif -+#ifdef CONFIG_WMMPS_STA -+ if (rtw_is_wmmps_mode(padapter)) -+ msg = "WMMPS_BUSY"; -+#endif /* CONFIG_WMMPS_STA */ -+ -+ sprintf(buf, "WIFI-%s", msg); -+ rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, buf); -+ -+#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS -+ pwrpriv->pwr_saving_time += rtw_get_passing_time_ms(pwrpriv->pwr_saving_start_time); -+#endif /* CONFIG_RTW_CFGVENDOR_LLSTATS */ -+ } -+ } -+ -+ pwrpriv->bpower_saving = _FALSE; -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ RTW_INFO("leave lps, fw in 32k\n"); -+ pdbgpriv->dbg_leave_lps_fail_cnt++; -+ } -+#endif /* DBG_CHECK_FW_PS_STATE -+ * RTW_INFO("-LeisurePSLeave\n"); */ -+ -+} -+ -+#ifdef CONFIG_WOWLAN -+void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ -+ if (wow_en) { -+ pwrpriv->lps_level_bk = pwrpriv->lps_level; -+ pwrpriv->lps_level = pwrpriv->wowlan_lps_level; -+ #ifdef CONFIG_LPS_1T1R -+ pwrpriv->lps_1t1r_bk = pwrpriv->lps_1t1r; -+ pwrpriv->lps_1t1r = pwrpriv->wowlan_lps_1t1r; -+ #endif -+ } else { -+ pwrpriv->lps_level = pwrpriv->lps_level_bk; -+ #ifdef CONFIG_LPS_1T1R -+ pwrpriv->lps_1t1r = pwrpriv->lps_1t1r_bk; -+ #endif -+ } -+} -+#endif /* CONFIG_WOWLAN */ -+#endif /* CONFIG_LPS */ -+ -+void LeaveAllPowerSaveModeDirect(PADAPTER Adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter); -+ PADAPTER pri_padapter = GET_PRIMARY_ADAPTER(Adapter); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); -+#ifdef CONFIG_LPS_LCLK -+#ifndef CONFIG_DETECT_CPWM_BY_POLLING -+ u8 cpwm_orig; -+#endif /* CONFIG_DETECT_CPWM_BY_POLLING */ -+ u8 rpwm; -+#endif -+ int i; -+ -+ RTW_INFO("%s.....\n", __FUNCTION__); -+ -+ if (rtw_is_surprise_removed(Adapter)) { -+ RTW_INFO(FUNC_ADPT_FMT ": bSurpriseRemoved=_TRUE Skip!\n", FUNC_ADPT_ARG(Adapter)); -+ return; -+ } -+ -+ if (rtw_mi_check_status(Adapter, MI_LINKED)) { /*connect*/ -+ -+ if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) { -+ RTW_INFO("%s: Driver Already Leave LPS\n", __FUNCTION__); -+ return; -+ } -+ -+#ifdef CONFIG_LPS_LCLK -+ _enter_pwrlock(&pwrpriv->lock); -+ -+#ifndef CONFIG_DETECT_CPWM_BY_POLLING -+ cpwm_orig = 0; -+ rtw_hal_get_hwreg(Adapter, HW_VAR_CPWM, &cpwm_orig); -+#endif /* CONFIG_DETECT_CPWM_BY_POLLING */ -+ rpwm = rtw_set_rpwm(Adapter, PS_STATE_S4); -+ -+#ifndef CONFIG_DETECT_CPWM_BY_POLLING -+ if (rpwm != 0xFF && rpwm & PS_ACK) -+ rtw_cpwm_polling(Adapter, rpwm, cpwm_orig); -+#endif /* CONFIG_DETECT_CPWM_BY_POLLING */ -+ -+ _exit_pwrlock(&pwrpriv->lock); -+#endif/*CONFIG_LPS_LCLK*/ -+ -+#ifdef CONFIG_P2P_PS -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ _adapter *iface = dvobj->padapters[i]; -+ struct wifidirect_info *pwdinfo = &(iface->wdinfo); -+ -+ if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) -+ p2p_ps_wk_cmd(iface, P2P_PS_DISABLE, 0); -+ } -+#endif /* CONFIG_P2P_PS */ -+ -+#ifdef CONFIG_LPS -+ rtw_lps_ctrl_wk_cmd(pri_padapter, LPS_CTRL_LEAVE, RTW_CMDF_DIRECTLY); -+#endif -+ } else { -+ if (pwrpriv->rf_pwrstate == rf_off) { -+ -+#if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_RTL8188E) -+#ifdef CONFIG_IPS -+ if (_FALSE == ips_leave(pri_padapter)) -+ RTW_INFO("======> ips_leave fail.............\n"); -+#endif -+#endif /* CONFIG_SWLPS_IN_IPS || (CONFIG_PLATFORM_SPRD && CONFIG_RTL8188E) */ -+ -+ } -+ } -+ -+} -+ -+/* -+ * Description: Leave all power save mode: LPS, FwLPS, IPS if needed. -+ * Move code to function by tynli. 2010.03.26. -+ * */ -+void LeaveAllPowerSaveMode(PADAPTER Adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter); -+ u8 enqueue = 0; -+ int i; -+ -+ #ifndef CONFIG_NEW_NETDEV_HDL -+ if (_FALSE == Adapter->bup) { -+ RTW_INFO(FUNC_ADPT_FMT ": bup=%d Skip!\n", -+ FUNC_ADPT_ARG(Adapter), Adapter->bup); -+ return; -+ } -+ #endif -+ -+/* RTW_INFO(FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(Adapter));*/ -+ -+ if (rtw_is_surprise_removed(Adapter)) { -+ RTW_INFO(FUNC_ADPT_FMT ": bSurpriseRemoved=_TRUE Skip!\n", FUNC_ADPT_ARG(Adapter)); -+ return; -+ } -+ -+ if (rtw_mi_get_assoc_if_num(Adapter)) { -+ /* connect */ -+#ifdef CONFIG_LPS_LCLK -+ enqueue = 1; -+#endif -+ -+#ifdef CONFIG_P2P_PS -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ _adapter *iface = dvobj->padapters[i]; -+ struct wifidirect_info *pwdinfo = &(iface->wdinfo); -+ -+ if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) -+ p2p_ps_wk_cmd(iface, P2P_PS_DISABLE, enqueue); -+ } -+#endif /* CONFIG_P2P_PS */ -+ -+#ifdef CONFIG_LPS -+ rtw_lps_ctrl_wk_cmd(Adapter, LPS_CTRL_LEAVE, enqueue ? 0 : RTW_CMDF_DIRECTLY); -+#endif -+ -+#ifdef CONFIG_LPS_LCLK -+ LPS_Leave_check(Adapter); -+#endif -+ } else { -+ if (adapter_to_pwrctl(Adapter)->rf_pwrstate == rf_off) { -+ -+#if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || (defined(CONFIG_PLATFORM_SPRD) && defined(CONFIG_RTL8188E)) -+#ifdef CONFIG_IPS -+ if (_FALSE == ips_leave(Adapter)) -+ RTW_INFO("======> ips_leave fail.............\n"); -+#endif -+#endif /* CONFIG_SWLPS_IN_IPS || (CONFIG_PLATFORM_SPRD && CONFIG_RTL8188E) */ -+ -+ } -+ } -+ -+} -+ -+#ifdef CONFIG_LPS_LCLK -+void LPS_Leave_check( -+ PADAPTER padapter) -+{ -+ struct pwrctrl_priv *pwrpriv; -+ systime start_time; -+ u8 bReady; -+ -+ -+ pwrpriv = adapter_to_pwrctl(padapter); -+ -+ bReady = _FALSE; -+ start_time = rtw_get_current_time(); -+ -+ rtw_yield_os(); -+ -+ while (1) { -+ _enter_pwrlock(&pwrpriv->lock); -+ -+ if (rtw_is_surprise_removed(padapter) -+ || (!rtw_is_hw_init_completed(padapter)) -+#ifdef CONFIG_USB_HCI -+ || rtw_is_drv_stopped(padapter) -+#endif -+ || (pwrpriv->pwr_mode == PS_MODE_ACTIVE) -+ ) -+ bReady = _TRUE; -+ -+ _exit_pwrlock(&pwrpriv->lock); -+ -+ if (_TRUE == bReady) -+ break; -+ -+ if (rtw_get_passing_time_ms(start_time) > 100) { -+ RTW_ERR("Wait for cpwm event than 100 ms!!!\n"); -+ break; -+ } -+ rtw_msleep_os(1); -+ } -+ -+} -+ -+/* -+ * Caller:ISR handler... -+ * -+ * This will be called when CPWM interrupt is up. -+ * -+ * using to update cpwn of drv; and drv willl make a decision to up or down pwr level -+ */ -+void cpwm_int_hdl( -+ PADAPTER padapter, -+ struct reportpwrstate_parm *preportpwrstate) -+{ -+ struct pwrctrl_priv *pwrpriv; -+ -+ if (!padapter) -+ goto exit; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ goto exit; -+ -+ pwrpriv = adapter_to_pwrctl(padapter); -+#if 0 -+ if (pwrpriv->cpwm_tog == (preportpwrstate->state & PS_TOGGLE)) { -+ goto exit; -+ } -+#endif -+ -+ _enter_pwrlock(&pwrpriv->lock); -+ -+#ifdef CONFIG_LPS_RPWM_TIMER -+ if (pwrpriv->rpwm < PS_STATE_S2) { -+ RTW_INFO("%s: Redundant CPWM Int. RPWM=0x%02X CPWM=0x%02x\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); -+ _exit_pwrlock(&pwrpriv->lock); -+ goto exit; -+ } -+#endif /* CONFIG_LPS_RPWM_TIMER */ -+ -+ pwrpriv->cpwm = PS_STATE(preportpwrstate->state); -+ pwrpriv->cpwm_tog = preportpwrstate->state & PS_TOGGLE; -+ -+ if (pwrpriv->cpwm >= PS_STATE_S2) { -+ if (pwrpriv->alives & CMD_ALIVE) -+ _rtw_up_sema(&padapter->cmdpriv.cmd_queue_sema); -+ -+ if (pwrpriv->alives & XMIT_ALIVE) -+ _rtw_up_sema(&padapter->xmitpriv.xmit_sema); -+ } -+ -+ _exit_pwrlock(&pwrpriv->lock); -+ -+exit: -+ return; -+} -+ -+static void cpwm_event_callback(struct work_struct *work) -+{ -+ struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, cpwm_event); -+ struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ struct reportpwrstate_parm report; -+ -+ /* RTW_INFO("%s\n",__FUNCTION__); */ -+ -+ report.state = PS_STATE_S2; -+ cpwm_int_hdl(adapter, &report); -+} -+ -+static void dma_event_callback(struct work_struct *work) -+{ -+ struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, dma_event); -+ struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ -+ rtw_unregister_tx_alive(adapter); -+} -+ -+#ifdef CONFIG_LPS_RPWM_TIMER -+ -+#define DBG_CPWM_CHK_FAIL -+#if defined(DBG_CPWM_CHK_FAIL) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) \ -+ || defined(CONFIG_RTL8723F)) -+#define CPU_EXCEPTION_CODE 0xFAFAFAFA -+static void rtw_cpwm_chk_fail_debug(_adapter *padapter) -+{ -+ u32 cpu_state; -+ -+ cpu_state = rtw_read32(padapter, 0x10FC); -+ -+ RTW_INFO("[PS-DBG] Reg_10FC =0x%08x\n", cpu_state); -+ RTW_INFO("[PS-DBG] Reg_10F8 =0x%08x\n", rtw_read32(padapter, 0x10F8)); -+ RTW_INFO("[PS-DBG] Reg_11F8 =0x%08x\n", rtw_read32(padapter, 0x11F8)); -+ RTW_INFO("[PS-DBG] Reg_4A4 =0x%08x\n", rtw_read32(padapter, 0x4A4)); -+ RTW_INFO("[PS-DBG] Reg_4A8 =0x%08x\n", rtw_read32(padapter, 0x4A8)); -+ -+ if (cpu_state == CPU_EXCEPTION_CODE) { -+ RTW_INFO("[PS-DBG] Reg_48C =0x%08x\n", rtw_read32(padapter, 0x48C)); -+ RTW_INFO("[PS-DBG] Reg_490 =0x%08x\n", rtw_read32(padapter, 0x490)); -+ RTW_INFO("[PS-DBG] Reg_494 =0x%08x\n", rtw_read32(padapter, 0x494)); -+ RTW_INFO("[PS-DBG] Reg_498 =0x%08x\n", rtw_read32(padapter, 0x498)); -+ RTW_INFO("[PS-DBG] Reg_49C =0x%08x\n", rtw_read32(padapter, 0x49C)); -+ RTW_INFO("[PS-DBG] Reg_4A0 =0x%08x\n", rtw_read32(padapter, 0x4A0)); -+ RTW_INFO("[PS-DBG] Reg_1BC =0x%08x\n", rtw_read32(padapter, 0x1BC)); -+ -+ RTW_INFO("[PS-DBG] Reg_008 =0x%08x\n", rtw_read32(padapter, 0x08)); -+ RTW_INFO("[PS-DBG] Reg_2F0 =0x%08x\n", rtw_read32(padapter, 0x2F0)); -+ RTW_INFO("[PS-DBG] Reg_2F4 =0x%08x\n", rtw_read32(padapter, 0x2F4)); -+ RTW_INFO("[PS-DBG] Reg_2F8 =0x%08x\n", rtw_read32(padapter, 0x2F8)); -+ RTW_INFO("[PS-DBG] Reg_2FC =0x%08x\n", rtw_read32(padapter, 0x2FC)); -+ -+ rtw_dump_fifo(RTW_DBGDUMP, padapter, 5, 0, 3072); -+ } -+} -+#endif -+static void rpwmtimeout_workitem_callback(struct work_struct *work) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *dvobj; -+ struct pwrctrl_priv *pwrpriv; -+ -+ -+ pwrpriv = container_of(work, struct pwrctrl_priv, rpwmtimeoutwi); -+ dvobj = pwrctl_to_dvobj(pwrpriv); -+ padapter = dvobj_get_primary_adapter(dvobj); -+ -+ if (!padapter) -+ return; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ return; -+ -+ _enter_pwrlock(&pwrpriv->lock); -+ if ((pwrpriv->rpwm == pwrpriv->cpwm) || (pwrpriv->cpwm >= PS_STATE_S2)) { -+ RTW_INFO("%s: rpwm=0x%02X cpwm=0x%02X CPWM done!\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); -+ goto exit; -+ } -+ -+ if (pwrpriv->rpwm_retry++ < LPS_RPWM_RETRY_CNT) { -+ u8 rpwm = (pwrpriv->rpwm | pwrpriv->tog | PS_ACK); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm)); -+ -+ pwrpriv->tog += 0x80; -+ _set_timer(&pwrpriv->pwr_rpwm_timer, LPS_CPWM_TIMEOUT_MS); -+ goto exit; -+ } -+ -+ pwrpriv->rpwm_retry = 0; -+ _exit_pwrlock(&pwrpriv->lock); -+ -+#if defined(DBG_CPWM_CHK_FAIL) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) \ -+ || defined(CONFIG_RTL8723F)) -+ RTW_INFO("+%s: rpwm=0x%02X cpwm=0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); -+ rtw_cpwm_chk_fail_debug(padapter); -+#endif -+ -+ if (rtw_read8(padapter, 0x100) != 0xEA) { -+#if 1 -+ struct reportpwrstate_parm report; -+ -+ report.state = PS_STATE_S2; -+ RTW_INFO("\n%s: FW already leave 32K!\n\n", __func__); -+ cpwm_int_hdl(padapter, &report); -+#else -+ RTW_INFO("\n%s: FW already leave 32K!\n\n", __func__); -+ cpwm_event_callback(&pwrpriv->cpwm_event); -+#endif -+ return; -+ } -+ -+ _enter_pwrlock(&pwrpriv->lock); -+ -+ if ((pwrpriv->rpwm == pwrpriv->cpwm) || (pwrpriv->cpwm >= PS_STATE_S2)) { -+ RTW_INFO("%s: cpwm=%d, nothing to do!\n", __func__, pwrpriv->cpwm); -+ goto exit; -+ } -+ pwrpriv->brpwmtimeout = _TRUE; -+ rtw_set_rpwm(padapter, pwrpriv->rpwm); -+ pwrpriv->brpwmtimeout = _FALSE; -+ -+exit: -+ _exit_pwrlock(&pwrpriv->lock); -+} -+ -+/* -+ * This function is a timer handler, can't do any IO in it. -+ */ -+static void pwr_rpwm_timeout_handler(void *FunctionContext) -+{ -+ PADAPTER padapter; -+ struct pwrctrl_priv *pwrpriv; -+ -+ -+ padapter = (PADAPTER)FunctionContext; -+ pwrpriv = adapter_to_pwrctl(padapter); -+ if (!padapter) -+ return; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ return; -+ -+ RTW_INFO("+%s: rpwm=0x%02X cpwm=0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); -+ -+ if ((pwrpriv->rpwm == pwrpriv->cpwm) || (pwrpriv->cpwm >= PS_STATE_S2)) { -+ RTW_INFO("+%s: cpwm=%d, nothing to do!\n", __func__, pwrpriv->cpwm); -+ return; -+ } -+ -+ _set_workitem(&pwrpriv->rpwmtimeoutwi); -+} -+#endif /* CONFIG_LPS_RPWM_TIMER */ -+ -+__inline static void register_task_alive(struct pwrctrl_priv *pwrctrl, u32 tag) -+{ -+ pwrctrl->alives |= tag; -+} -+ -+__inline static void unregister_task_alive(struct pwrctrl_priv *pwrctrl, u32 tag) -+{ -+ pwrctrl->alives &= ~tag; -+} -+ -+ -+/* -+ * Description: -+ * Check if the fw_pwrstate is okay for I/O. -+ * If not (cpwm is less than S2), then the sub-routine -+ * will raise the cpwm to be greater than or equal to S2. -+ * -+ * Calling Context: Passive -+ * -+ * Constraint: -+ * 1. this function will request pwrctrl->lock -+ * -+ * Return Value: -+ * _SUCCESS hardware is ready for I/O -+ * _FAIL can't I/O right now -+ */ -+s32 rtw_register_task_alive(PADAPTER padapter, u32 task) -+{ -+ s32 res; -+ struct pwrctrl_priv *pwrctrl; -+ u8 pslv; -+ -+ -+ res = _SUCCESS; -+ pwrctrl = adapter_to_pwrctl(padapter); -+ pslv = PS_STATE_S2; -+ -+ _enter_pwrlock(&pwrctrl->lock); -+ -+ register_task_alive(pwrctrl, task); -+ -+ if (pwrctrl->bFwCurrentInPSMode == _TRUE) { -+ -+ if (pwrctrl->cpwm < pslv) { -+ if (pwrctrl->cpwm < PS_STATE_S2) -+ res = _FAIL; -+ if (pwrctrl->rpwm < pslv) -+ rtw_set_rpwm(padapter, pslv); -+ } -+ } -+ -+ _exit_pwrlock(&pwrctrl->lock); -+ -+#ifdef CONFIG_DETECT_CPWM_BY_POLLING -+ if (_FAIL == res) { -+ if (pwrctrl->cpwm >= PS_STATE_S2) -+ res = _SUCCESS; -+ } -+#endif /* CONFIG_DETECT_CPWM_BY_POLLING */ -+ -+ -+ return res; -+} -+ -+/* -+ * Description: -+ * If task is done, call this func. to power down firmware again. -+ * -+ * Constraint: -+ * 1. this function will request pwrctrl->lock -+ * -+ * Return Value: -+ * none -+ */ -+void rtw_unregister_task_alive(PADAPTER padapter, u32 task) -+{ -+ struct pwrctrl_priv *pwrctrl; -+ u8 pslv; -+ -+ -+ pwrctrl = adapter_to_pwrctl(padapter); -+ pslv = PS_STATE_S0; -+ -+#ifdef CONFIG_BT_COEXIST -+ if ((rtw_btcoex_IsBtDisabled(padapter) == _FALSE) -+ && (rtw_btcoex_IsBtControlLps(padapter) == _TRUE)) { -+ u8 val8; -+ -+ val8 = rtw_btcoex_LpsVal(padapter); -+ if (val8 & BIT(4)) -+ pslv = PS_STATE_S2; -+ -+ } -+#endif /* CONFIG_BT_COEXIST */ -+ -+ _enter_pwrlock(&pwrctrl->lock); -+ -+ unregister_task_alive(pwrctrl, task); -+ -+ if ((pwrctrl->pwr_mode != PS_MODE_ACTIVE) -+ && (pwrctrl->bFwCurrentInPSMode == _TRUE)) { -+ -+ if (pwrctrl->cpwm > pslv) { -+ if ((pslv >= PS_STATE_S2) || (pwrctrl->alives == 0)) -+ rtw_set_rpwm(padapter, pslv); -+ } -+ } -+ -+ _exit_pwrlock(&pwrctrl->lock); -+ -+} -+ -+/* -+ * Caller: rtw_xmit_thread -+ * -+ * Check if the fw_pwrstate is okay for xmit. -+ * If not (cpwm is less than S3), then the sub-routine -+ * will raise the cpwm to be greater than or equal to S3. -+ * -+ * Calling Context: Passive -+ * -+ * Return Value: -+ * _SUCCESS rtw_xmit_thread can write fifo/txcmd afterwards. -+ * _FAIL rtw_xmit_thread can not do anything. -+ */ -+s32 rtw_register_tx_alive(PADAPTER padapter) -+{ -+ s32 res; -+ struct pwrctrl_priv *pwrctrl; -+ u8 pslv; -+ -+ -+ res = _SUCCESS; -+ pwrctrl = adapter_to_pwrctl(padapter); -+ pslv = PS_STATE_S2; -+ -+ _enter_pwrlock(&pwrctrl->lock); -+ -+ register_task_alive(pwrctrl, XMIT_ALIVE); -+ -+ if (pwrctrl->bFwCurrentInPSMode == _TRUE) { -+ -+ if (pwrctrl->cpwm < pslv) { -+ if (pwrctrl->cpwm < PS_STATE_S2) -+ res = _FAIL; -+ if (pwrctrl->rpwm < pslv) -+ rtw_set_rpwm(padapter, pslv); -+ } -+ } -+ -+ _exit_pwrlock(&pwrctrl->lock); -+ -+#ifdef CONFIG_DETECT_CPWM_BY_POLLING -+ if (_FAIL == res) { -+ if (pwrctrl->cpwm >= PS_STATE_S2) -+ res = _SUCCESS; -+ } -+#endif /* CONFIG_DETECT_CPWM_BY_POLLING */ -+ -+ -+ return res; -+} -+ -+/* -+ * Caller: rtw_cmd_thread -+ * -+ * Check if the fw_pwrstate is okay for issuing cmd. -+ * If not (cpwm should be is less than S2), then the sub-routine -+ * will raise the cpwm to be greater than or equal to S2. -+ * -+ * Calling Context: Passive -+ * -+ * Return Value: -+ * _SUCCESS rtw_cmd_thread can issue cmds to firmware afterwards. -+ * _FAIL rtw_cmd_thread can not do anything. -+ */ -+s32 rtw_register_cmd_alive(PADAPTER padapter) -+{ -+ s32 res; -+ struct pwrctrl_priv *pwrctrl; -+ u8 pslv; -+ -+ -+ res = _SUCCESS; -+ pwrctrl = adapter_to_pwrctl(padapter); -+ pslv = PS_STATE_S2; -+ -+ _enter_pwrlock(&pwrctrl->lock); -+ -+ register_task_alive(pwrctrl, CMD_ALIVE); -+ -+ if (pwrctrl->bFwCurrentInPSMode == _TRUE) { -+ -+ if (pwrctrl->cpwm < pslv) { -+ if (pwrctrl->cpwm < PS_STATE_S2) -+ res = _FAIL; -+ if (pwrctrl->rpwm < pslv) -+ rtw_set_rpwm(padapter, pslv); -+ } -+ } -+ -+ _exit_pwrlock(&pwrctrl->lock); -+ -+#ifdef CONFIG_DETECT_CPWM_BY_POLLING -+ if (_FAIL == res) { -+ if (pwrctrl->cpwm >= PS_STATE_S2) -+ res = _SUCCESS; -+ } -+#endif /* CONFIG_DETECT_CPWM_BY_POLLING */ -+ -+ -+ return res; -+} -+ -+/* -+ * Caller: rx_isr -+ * -+ * Calling Context: Dispatch/ISR -+ * -+ * Return Value: -+ * _SUCCESS -+ * _FAIL -+ */ -+s32 rtw_register_rx_alive(PADAPTER padapter) -+{ -+ struct pwrctrl_priv *pwrctrl; -+ -+ -+ pwrctrl = adapter_to_pwrctl(padapter); -+ -+ _enter_pwrlock(&pwrctrl->lock); -+ -+ register_task_alive(pwrctrl, RECV_ALIVE); -+ -+ _exit_pwrlock(&pwrctrl->lock); -+ -+ -+ return _SUCCESS; -+} -+ -+/* -+ * Caller: evt_isr or evt_thread -+ * -+ * Calling Context: Dispatch/ISR or Passive -+ * -+ * Return Value: -+ * _SUCCESS -+ * _FAIL -+ */ -+s32 rtw_register_evt_alive(PADAPTER padapter) -+{ -+ struct pwrctrl_priv *pwrctrl; -+ -+ -+ pwrctrl = adapter_to_pwrctl(padapter); -+ -+ _enter_pwrlock(&pwrctrl->lock); -+ -+ register_task_alive(pwrctrl, EVT_ALIVE); -+ -+ _exit_pwrlock(&pwrctrl->lock); -+ -+ -+ return _SUCCESS; -+} -+ -+/* -+ * Caller: ISR -+ * -+ * If ISR's txdone, -+ * No more pkts for TX, -+ * Then driver shall call this fun. to power down firmware again. -+ */ -+void rtw_unregister_tx_alive(PADAPTER padapter) -+{ -+ struct pwrctrl_priv *pwrctrl; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ u8 pslv, i; -+ -+ -+ pwrctrl = adapter_to_pwrctl(padapter); -+ pslv = PS_STATE_S0; -+ -+#ifdef CONFIG_BT_COEXIST -+ if ((rtw_btcoex_IsBtDisabled(padapter) == _FALSE) -+ && (rtw_btcoex_IsBtControlLps(padapter) == _TRUE)) { -+ u8 val8; -+ -+ val8 = rtw_btcoex_LpsVal(padapter); -+ if (val8 & BIT(4)) -+ pslv = PS_STATE_S2; -+ -+ } -+#endif /* CONFIG_BT_COEXIST */ -+ -+#ifdef CONFIG_P2P_PS -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ if (iface->wdinfo.p2p_ps_mode > P2P_PS_NONE) { -+ pslv = PS_STATE_S2; -+ break; -+ } -+ } -+ } -+#endif -+ _enter_pwrlock(&pwrctrl->lock); -+ -+ unregister_task_alive(pwrctrl, XMIT_ALIVE); -+ -+ if ((pwrctrl->pwr_mode != PS_MODE_ACTIVE) -+ && (pwrctrl->bFwCurrentInPSMode == _TRUE)) { -+ -+ if (pwrctrl->cpwm > pslv) { -+ if ((pslv >= PS_STATE_S2) || (pwrctrl->alives == 0)) -+ rtw_set_rpwm(padapter, pslv); -+ } -+ } -+ -+ _exit_pwrlock(&pwrctrl->lock); -+ -+} -+ -+/* -+ * Caller: ISR -+ * -+ * If all commands have been done, -+ * and no more command to do, -+ * then driver shall call this fun. to power down firmware again. -+ */ -+void rtw_unregister_cmd_alive(PADAPTER padapter) -+{ -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrctrl; -+ u8 pslv, i; -+ -+ -+ pwrctrl = adapter_to_pwrctl(padapter); -+ pslv = PS_STATE_S0; -+ -+#ifdef CONFIG_BT_COEXIST -+ if ((rtw_btcoex_IsBtDisabled(padapter) == _FALSE) -+ && (rtw_btcoex_IsBtControlLps(padapter) == _TRUE)) { -+ u8 val8; -+ -+ val8 = rtw_btcoex_LpsVal(padapter); -+ if (val8 & BIT(4)) -+ pslv = PS_STATE_S2; -+ -+ } -+#endif /* CONFIG_BT_COEXIST */ -+ -+#ifdef CONFIG_P2P_PS -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ if (iface->wdinfo.p2p_ps_mode > P2P_PS_NONE) { -+ pslv = PS_STATE_S2; -+ break; -+ } -+ } -+ } -+#endif -+ -+ _enter_pwrlock(&pwrctrl->lock); -+ -+ unregister_task_alive(pwrctrl, CMD_ALIVE); -+ -+ if ((pwrctrl->pwr_mode != PS_MODE_ACTIVE) -+ && (pwrctrl->bFwCurrentInPSMode == _TRUE)) { -+ -+ if (pwrctrl->cpwm > pslv) { -+ if ((pslv >= PS_STATE_S2) || (pwrctrl->alives == 0)) -+ rtw_set_rpwm(padapter, pslv); -+ } -+ } -+ -+ _exit_pwrlock(&pwrctrl->lock); -+ -+} -+ -+/* -+ * Caller: ISR -+ */ -+void rtw_unregister_rx_alive(PADAPTER padapter) -+{ -+ struct pwrctrl_priv *pwrctrl; -+ -+ -+ pwrctrl = adapter_to_pwrctl(padapter); -+ -+ _enter_pwrlock(&pwrctrl->lock); -+ -+ unregister_task_alive(pwrctrl, RECV_ALIVE); -+ -+ -+ _exit_pwrlock(&pwrctrl->lock); -+ -+} -+ -+void rtw_unregister_evt_alive(PADAPTER padapter) -+{ -+ struct pwrctrl_priv *pwrctrl; -+ -+ -+ pwrctrl = adapter_to_pwrctl(padapter); -+ -+ unregister_task_alive(pwrctrl, EVT_ALIVE); -+ -+ -+ _exit_pwrlock(&pwrctrl->lock); -+ -+} -+#endif /* CONFIG_LPS_LCLK */ -+ -+#ifdef CONFIG_RESUME_IN_WORKQUEUE -+ static void resume_workitem_callback(struct work_struct *work); -+#endif /* CONFIG_RESUME_IN_WORKQUEUE */ -+ -+void rtw_init_pwrctrl_priv(PADAPTER padapter) -+{ -+#ifdef CONFIG_LPS_1T1R -+#define LPS_1T1R_FMT ", LPS_1T1R=%d" -+#define LPS_1T1R_ARG , pwrctrlpriv->lps_1t1r -+#else -+#define LPS_1T1R_FMT "" -+#define LPS_1T1R_ARG -+#endif -+ -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+#ifdef CONFIG_WOWLAN -+ struct registry_priv *registry_par = &padapter->registrypriv; -+#endif -+#ifdef CONFIG_GPIO_WAKEUP -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+#endif -+ -+#if defined(CONFIG_CONCURRENT_MODE) -+ if (!is_primary_adapter(padapter)) -+ return; -+#endif -+ -+ _init_pwrlock(&pwrctrlpriv->lock); -+ _init_pwrlock(&pwrctrlpriv->check_32k_lock); -+ pwrctrlpriv->rf_pwrstate = rf_on; -+ pwrctrlpriv->ips_enter_cnts = 0; -+ pwrctrlpriv->ips_leave_cnts = 0; -+ pwrctrlpriv->lps_enter_cnts = 0; -+ pwrctrlpriv->lps_leave_cnts = 0; -+ pwrctrlpriv->bips_processing = _FALSE; -+#ifdef CONFIG_LPS_CHK_BY_TP -+ pwrctrlpriv->lps_chk_by_tp = padapter->registrypriv.lps_chk_by_tp; -+ pwrctrlpriv->lps_tx_tp_th = LPS_TX_TP_TH; -+ pwrctrlpriv->lps_rx_tp_th = LPS_RX_TP_TH; -+ pwrctrlpriv->lps_bi_tp_th = LPS_BI_TP_TH; -+ pwrctrlpriv->lps_chk_cnt = pwrctrlpriv->lps_chk_cnt_th = LPS_TP_CHK_CNT; -+ pwrctrlpriv->lps_tx_pkts = LPS_CHK_PKTS_TX; -+ pwrctrlpriv->lps_rx_pkts = LPS_CHK_PKTS_RX; -+#endif -+ -+ pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode; -+ pwrctrlpriv->ips_mode_req = padapter->registrypriv.ips_mode; -+ pwrctrlpriv->ips_deny_time = rtw_get_current_time(); -+ pwrctrlpriv->lps_level = padapter->registrypriv.lps_level; -+#ifdef CONFIG_LPS_1T1R -+ pwrctrlpriv->lps_1t1r = padapter->registrypriv.lps_1t1r; -+#endif -+ -+ pwrctrlpriv->pwr_state_check_interval = RTW_PWR_STATE_CHK_INTERVAL; -+ pwrctrlpriv->pwr_state_check_cnts = 0; -+ pwrctrlpriv->bInSuspend = _FALSE; -+ pwrctrlpriv->bkeepfwalive = _FALSE; -+ pwrctrlpriv->LpsIdleCount = 0; -+ -+ /* pwrctrlpriv->FWCtrlPSMode =padapter->registrypriv.power_mgnt; */ /* PS_MODE_MIN; */ -+ if (padapter->registrypriv.mp_mode == 1) -+ pwrctrlpriv->power_mgnt = PS_MODE_ACTIVE ; -+ else -+ pwrctrlpriv->power_mgnt = padapter->registrypriv.power_mgnt; /* PS_MODE_MIN; */ -+ pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt) ? _TRUE : _FALSE; -+ -+ pwrctrlpriv->bFwCurrentInPSMode = _FALSE; -+ pwrctrlpriv->lps_deny_time = rtw_get_current_time(); -+ -+ pwrctrlpriv->rpwm = 0; -+ pwrctrlpriv->cpwm = PS_STATE_S4; -+ -+ pwrctrlpriv->pwr_mode = PS_MODE_ACTIVE; -+ pwrctrlpriv->smart_ps = padapter->registrypriv.smart_ps; -+ pwrctrlpriv->bcn_ant_mode = 0; -+ pwrctrlpriv->dtim = 0; -+ -+ pwrctrlpriv->tog = 0x80; -+ pwrctrlpriv->rpwm_retry = 0; -+ -+ RTW_INFO("%s: IPS_mode=%d, LPS_mode=%d, LPS_level=%d"LPS_1T1R_FMT"\n", -+ __func__, pwrctrlpriv->ips_mode, pwrctrlpriv->power_mgnt, pwrctrlpriv->lps_level -+ LPS_1T1R_ARG -+ ); -+ -+#ifdef CONFIG_LPS_LCLK -+ rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&pwrctrlpriv->rpwm)); -+ -+ _init_workitem(&pwrctrlpriv->cpwm_event, cpwm_event_callback, NULL); -+ -+ _init_workitem(&pwrctrlpriv->dma_event, dma_event_callback, NULL); -+ -+#ifdef CONFIG_LPS_RPWM_TIMER -+ pwrctrlpriv->brpwmtimeout = _FALSE; -+ _init_workitem(&pwrctrlpriv->rpwmtimeoutwi, rpwmtimeout_workitem_callback, NULL); -+ rtw_init_timer(&pwrctrlpriv->pwr_rpwm_timer, padapter, pwr_rpwm_timeout_handler, padapter); -+#endif /* CONFIG_LPS_RPWM_TIMER */ -+#endif /* CONFIG_LPS_LCLK */ -+ -+#ifdef CONFIG_LPS_PG -+ pwrctrlpriv->lpspg_info.name = "LPSPG_INFO"; -+ #ifdef CONFIG_RTL8822C -+ pwrctrlpriv->lpspg_dpk_info.name = "LPSPG_DPK_INFO"; -+ pwrctrlpriv->lpspg_iqk_info.name = "LPSPG_IQK_INFO"; -+ #endif -+#endif -+ -+ rtw_init_timer(&pwrctrlpriv->pwr_state_check_timer, padapter, pwr_state_check_handler, padapter); -+ -+ pwrctrlpriv->wowlan_mode = _FALSE; -+ pwrctrlpriv->wowlan_ap_mode = _FALSE; -+ pwrctrlpriv->wowlan_p2p_mode = _FALSE; -+ pwrctrlpriv->wowlan_in_resume = _FALSE; -+ pwrctrlpriv->wowlan_last_wake_reason = 0; -+ -+#ifdef CONFIG_RESUME_IN_WORKQUEUE -+ _init_workitem(&pwrctrlpriv->resume_work, resume_workitem_callback, NULL); -+ pwrctrlpriv->rtw_workqueue = create_singlethread_workqueue("rtw_workqueue"); -+#endif /* CONFIG_RESUME_IN_WORKQUEUE */ -+ -+#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) -+ pwrctrlpriv->early_suspend.suspend = NULL; -+ rtw_register_early_suspend(pwrctrlpriv); -+#endif /* CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER */ -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ pwrctrlpriv->wowlan_gpio_index = WAKEUP_GPIO_IDX; -+ /* set output low state in initial */ -+ pwrctrlpriv->wowlan_gpio_output_state = GPIO_OUTPUT_LOW; -+ /*default low active*/ -+ pwrctrlpriv->is_high_active = HIGH_ACTIVE_DEV2HST; -+ pwrctrlpriv->hst2dev_high_active = HIGH_ACTIVE_HST2DEV; -+ -+#if (defined(CONFIG_RTL8192F) && defined(CONFIG_USB_HCI) && defined(CONFIG_BT_COEXIST)) -+ if (pHalData->EEPROMBluetoothCoexist == _TRUE) { -+ /* for 8725AU case */ -+ pwrctrlpriv->wowlan_gpio_index = WAKEUP_GPIO_IDX_8725AU; -+ pwrctrlpriv->is_high_active = HIGH_ACTIVE_DEV2HST_8725AU; -+ } -+#endif -+#ifdef CONFIG_RTW_ONE_PIN_GPIO -+ rtw_hal_switch_gpio_wl_ctrl(padapter, pwrctrlpriv->wowlan_gpio_index, _TRUE); -+ rtw_hal_set_input_gpio(padapter, pwrctrlpriv->wowlan_gpio_index); -+#else -+ #ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE -+ if (pwrctrlpriv->is_high_active == 0) -+ rtw_hal_set_input_gpio(padapter, pwrctrlpriv->wowlan_gpio_index); -+ else -+ rtw_hal_set_output_gpio(padapter, pwrctrlpriv->wowlan_gpio_index, -+ GPIO_OUTPUT_LOW); -+ #else -+ rtw_hal_set_output_gpio(padapter, pwrctrlpriv->wowlan_gpio_index -+ , pwrctrlpriv->wowlan_gpio_output_state); -+ rtw_hal_switch_gpio_wl_ctrl(padapter, pwrctrlpriv->wowlan_gpio_index, _TRUE); -+ RTW_INFO("%s: set GPIO_%d to OUTPUT %s state in initial and %s_ACTIVE.\n", -+ __func__, pwrctrlpriv->wowlan_gpio_index, -+ pwrctrlpriv->wowlan_gpio_output_state ? "HIGH" : "LOW", -+ pwrctrlpriv->is_high_active ? "HIGI" : "LOW"); -+ #endif /*CONFIG_WAKEUP_GPIO_INPUT_MODE*/ -+#endif /* CONFIG_RTW_ONE_PIN_GPIO */ -+#endif /* CONFIG_GPIO_WAKEUP */ -+ -+#ifdef CONFIG_WOWLAN -+#ifdef CONFIG_LPS_1T1R -+#define WOW_LPS_1T1R_FMT ", WOW_LPS_1T1R=%d" -+#define WOW_LPS_1T1R_ARG , pwrctrlpriv->wowlan_lps_1t1r -+#else -+#define WOW_LPS_1T1R_FMT "" -+#define WOW_LPS_1T1R_ARG -+#endif -+ -+ pwrctrlpriv->wowlan_power_mgmt = padapter->registrypriv.wow_power_mgnt; -+ pwrctrlpriv->wowlan_lps_level = padapter->registrypriv.wow_lps_level; -+#ifdef CONFIG_LPS_1T1R -+ pwrctrlpriv->wowlan_lps_1t1r = padapter->registrypriv.wow_lps_1t1r; -+#endif -+ -+ RTW_INFO("%s: WOW_LPS_mode=%d, WOW_LPS_level=%d"WOW_LPS_1T1R_FMT"\n", -+ __func__, pwrctrlpriv->wowlan_power_mgmt, pwrctrlpriv->wowlan_lps_level -+ WOW_LPS_1T1R_ARG -+ ); -+ -+ if (registry_par->wakeup_event & BIT(1)) -+ pwrctrlpriv->default_patterns_en = _TRUE; -+ else -+ pwrctrlpriv->default_patterns_en = _FALSE; -+ -+ rtw_wow_pattern_sw_reset(padapter); -+#ifdef CONFIG_PNO_SUPPORT -+ pwrctrlpriv->pno_inited = _FALSE; -+ pwrctrlpriv->pnlo_info = NULL; -+ pwrctrlpriv->pscan_info = NULL; -+ pwrctrlpriv->pno_ssid_list = NULL; -+#endif /* CONFIG_PNO_SUPPORT */ -+#ifdef CONFIG_WOW_PATTERN_HW_CAM -+ _rtw_mutex_init(&pwrctrlpriv->wowlan_pattern_cam_mutex); -+#endif -+ -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ pwrctrlpriv->wowlan_keep_alive_ack_index = 0xFF; -+ pwrctrlpriv->wowlan_wake_pattern_index = 0xFF; -+#endif/*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ pwrctrlpriv->wowlan_aoac_rpt_loc = 0; -+#ifdef CONFIG_WAR_OFFLOAD -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+ rtw_wow_war_mdns_parms_reset(padapter, _TRUE); -+#endif /* defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) */ -+#endif /* CONFIG_WAR_OFFLOAD */ -+#endif /* CONFIG_WOWLAN */ -+ -+#ifdef CONFIG_LPS_POFF -+ rtw_hal_set_hwreg(padapter, HW_VAR_LPS_POFF_INIT, 0); -+#endif -+ -+#ifdef CONFIG_LPS_ACK -+ _rtw_mutex_init(&pwrctrlpriv->lps_ack_mutex); -+ pwrctrlpriv->lps_ack_status = -1; -+#endif /* CONFIG_LPS_ACK */ -+} -+ -+ -+void rtw_free_pwrctrl_priv(PADAPTER adapter) -+{ -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(adapter); -+ -+#if defined(CONFIG_CONCURRENT_MODE) -+ if (!is_primary_adapter(adapter)) -+ return; -+#endif -+ -+ -+ /* _rtw_memset((unsigned char *)pwrctrlpriv, 0, sizeof(struct pwrctrl_priv)); */ -+ -+ -+#ifdef CONFIG_RESUME_IN_WORKQUEUE -+ if (pwrctrlpriv->rtw_workqueue) { -+ flush_workqueue(pwrctrlpriv->rtw_workqueue); -+ destroy_workqueue(pwrctrlpriv->rtw_workqueue); -+ } -+#endif -+ -+#ifdef CONFIG_LPS_POFF -+ rtw_hal_set_hwreg(adapter, HW_VAR_LPS_POFF_DEINIT, 0); -+#endif -+ -+#ifdef CONFIG_LPS_LCLK -+ _cancel_workitem_sync(&pwrctrlpriv->cpwm_event); -+ _cancel_workitem_sync(&pwrctrlpriv->dma_event); -+ #ifdef CONFIG_LPS_RPWM_TIMER -+ _cancel_workitem_sync(&pwrctrlpriv->rpwmtimeoutwi); -+ #endif -+#endif /* CONFIG_LPS_LCLK */ -+ -+#ifdef CONFIG_LPS_PG -+ rsvd_page_cache_free(&pwrctrlpriv->lpspg_info); -+ #ifdef CONFIG_RTL8822C -+ rsvd_page_cache_free(&pwrctrlpriv->lpspg_dpk_info); -+ rsvd_page_cache_free(&pwrctrlpriv->lpspg_iqk_info); -+ #endif -+#endif -+ -+#ifdef CONFIG_WOWLAN -+#ifdef CONFIG_PNO_SUPPORT -+ if (pwrctrlpriv->pnlo_info != NULL) -+ printk("****** pnlo_info memory leak********\n"); -+ -+ if (pwrctrlpriv->pscan_info != NULL) -+ printk("****** pscan_info memory leak********\n"); -+ -+ if (pwrctrlpriv->pno_ssid_list != NULL) -+ printk("****** pno_ssid_list memory leak********\n"); -+#endif -+#ifdef CONFIG_WOW_PATTERN_HW_CAM -+ _rtw_mutex_free(&pwrctrlpriv->wowlan_pattern_cam_mutex); -+#endif -+ -+#endif /* CONFIG_WOWLAN */ -+ -+#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) -+ rtw_unregister_early_suspend(pwrctrlpriv); -+#endif /* CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER */ -+ -+ _free_pwrlock(&pwrctrlpriv->lock); -+ _free_pwrlock(&pwrctrlpriv->check_32k_lock); -+ -+#ifdef CONFIG_LPS_ACK -+ _rtw_mutex_free(&pwrctrlpriv->lps_ack_mutex); -+#endif /* CONFIG_LPS_ACK */ -+} -+ -+#ifdef CONFIG_RESUME_IN_WORKQUEUE -+extern int rtw_resume_process(_adapter *padapter); -+ -+static void resume_workitem_callback(struct work_struct *work) -+{ -+ struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, resume_work); -+ struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ PSDIO_DATA psdio = &dvobj->intf_data; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ rtw_resume_process(adapter); -+ -+ pm_relax(&psdio->func->dev); -+} -+ -+void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv) -+{ -+ /* accquire system's suspend lock preventing from falliing asleep while resume in workqueue */ -+ /* rtw_lock_suspend(); */ -+ struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); -+ PSDIO_DATA psdio = &dvobj->intf_data; -+ -+ pm_stay_awake(&psdio->func->dev); -+ -+#if 1 -+ queue_work(pwrpriv->rtw_workqueue, &pwrpriv->resume_work); -+#else -+ _set_workitem(&pwrpriv->resume_work); -+#endif -+} -+#endif /* CONFIG_RESUME_IN_WORKQUEUE */ -+ -+#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) -+inline bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv) -+{ -+ return (pwrpriv->early_suspend.suspend) ? _TRUE : _FALSE; -+} -+ -+inline bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv) -+{ -+ return (pwrpriv->do_late_resume) ? _TRUE : _FALSE; -+} -+ -+inline void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable) -+{ -+ pwrpriv->do_late_resume = enable; -+} -+#endif -+ -+#ifdef CONFIG_HAS_EARLYSUSPEND -+extern int rtw_resume_process(_adapter *padapter); -+static void rtw_early_suspend(struct early_suspend *h) -+{ -+ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ rtw_set_do_late_resume(pwrpriv, _FALSE); -+} -+ -+static void rtw_late_resume(struct early_suspend *h) -+{ -+ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); -+ struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ if (pwrpriv->do_late_resume) { -+ rtw_set_do_late_resume(pwrpriv, _FALSE); -+ rtw_resume_process(adapter); -+ } -+} -+ -+void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ /* jeff: set the early suspend level before blank screen, so we wll do late resume after scree is lit */ -+ pwrpriv->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN - 20; -+ pwrpriv->early_suspend.suspend = rtw_early_suspend; -+ pwrpriv->early_suspend.resume = rtw_late_resume; -+ register_early_suspend(&pwrpriv->early_suspend); -+ -+ -+} -+ -+void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ rtw_set_do_late_resume(pwrpriv, _FALSE); -+ -+ if (pwrpriv->early_suspend.suspend) -+ unregister_early_suspend(&pwrpriv->early_suspend); -+ -+ pwrpriv->early_suspend.suspend = NULL; -+ pwrpriv->early_suspend.resume = NULL; -+} -+#endif /* CONFIG_HAS_EARLYSUSPEND */ -+ -+#ifdef CONFIG_ANDROID_POWER -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ extern int rtw_resume_process(PADAPTER padapter); -+#endif -+static void rtw_early_suspend(android_early_suspend_t *h) -+{ -+ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ rtw_set_do_late_resume(pwrpriv, _FALSE); -+} -+ -+static void rtw_late_resume(android_early_suspend_t *h) -+{ -+ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); -+ struct dvobj_priv *dvobj = pwrctl_to_dvobj(pwrpriv); -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ if (pwrpriv->do_late_resume) { -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ rtw_set_do_late_resume(pwrpriv, _FALSE); -+ rtw_resume_process(adapter); -+#endif -+ } -+} -+ -+void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ /* jeff: set the early suspend level before blank screen, so we wll do late resume after scree is lit */ -+ pwrpriv->early_suspend.level = ANDROID_EARLY_SUSPEND_LEVEL_BLANK_SCREEN - 20; -+ pwrpriv->early_suspend.suspend = rtw_early_suspend; -+ pwrpriv->early_suspend.resume = rtw_late_resume; -+ android_register_early_suspend(&pwrpriv->early_suspend); -+} -+ -+void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ rtw_set_do_late_resume(pwrpriv, _FALSE); -+ -+ if (pwrpriv->early_suspend.suspend) -+ android_unregister_early_suspend(&pwrpriv->early_suspend); -+ -+ pwrpriv->early_suspend.suspend = NULL; -+ pwrpriv->early_suspend.resume = NULL; -+} -+#endif /* CONFIG_ANDROID_POWER */ -+ -+u8 rtw_interface_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val) -+{ -+ u8 bResult = _TRUE; -+ rtw_hal_intf_ps_func(padapter, efunc_id, val); -+ -+ return bResult; -+} -+ -+ -+inline void rtw_set_ips_deny(_adapter *padapter, u32 ms) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ms); -+} -+ -+/* -+* rtw_pwr_wakeup - Wake the NIC up from: 1)IPS. 2)USB autosuspend -+* @adapter: pointer to _adapter structure -+* @ips_deffer_ms: the ms wiil prevent from falling into IPS after wakeup -+* Return _SUCCESS or _FAIL -+*/ -+ -+int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ struct mlme_priv *pmlmepriv; -+ int ret = _SUCCESS; -+ systime start = rtw_get_current_time(); -+ -+ /*RTW_INFO(FUNC_ADPT_FMT "===>\n", FUNC_ADPT_ARG(padapter));*/ -+ /* for LPS */ -+ LeaveAllPowerSaveMode(padapter); -+ -+ /* IPS still bound with primary adapter */ -+ padapter = GET_PRIMARY_ADAPTER(padapter); -+ pmlmepriv = &padapter->mlmepriv; -+ -+ if (rtw_time_after(rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms), pwrpriv->ips_deny_time)) -+ pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms); -+ -+ -+ if (pwrpriv->ps_processing) { -+ RTW_INFO("%s wait ps_processing...\n", __func__); -+ while (pwrpriv->ps_processing && rtw_get_passing_time_ms(start) <= 3000) -+ rtw_msleep_os(10); -+ if (pwrpriv->ps_processing) -+ RTW_INFO("%s wait ps_processing timeout\n", __func__); -+ else -+ RTW_INFO("%s wait ps_processing done\n", __func__); -+ } -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ if (rtw_hal_sreset_inprogress(padapter)) { -+ RTW_INFO("%s wait sreset_inprogress...\n", __func__); -+ while (rtw_hal_sreset_inprogress(padapter) && rtw_get_passing_time_ms(start) <= 4000) -+ rtw_msleep_os(10); -+ if (rtw_hal_sreset_inprogress(padapter)) -+ RTW_INFO("%s wait sreset_inprogress timeout\n", __func__); -+ else -+ RTW_INFO("%s wait sreset_inprogress done\n", __func__); -+ } -+#endif -+ -+ if (pwrpriv->bInSuspend) { -+ RTW_INFO("%s wait bInSuspend...\n", __func__); -+ while (pwrpriv->bInSuspend -+ && ((rtw_get_passing_time_ms(start) <= 3000 && !rtw_is_do_late_resume(pwrpriv)) -+ || (rtw_get_passing_time_ms(start) <= 500 && rtw_is_do_late_resume(pwrpriv))) -+ ) -+ rtw_msleep_os(10); -+ if (pwrpriv->bInSuspend) -+ RTW_INFO("%s wait bInSuspend timeout\n", __func__); -+ else -+ RTW_INFO("%s wait bInSuspend done\n", __func__); -+ } -+ -+ /* System suspend is not allowed to wakeup */ -+ if (_TRUE == pwrpriv->bInSuspend) { -+ ret = _FAIL; -+ goto exit; -+ } -+ /* I think this should be check in IPS, LPS, autosuspend functions... */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ ret = _SUCCESS; -+ goto exit; -+ } -+ -+ if (rf_off == pwrpriv->rf_pwrstate) { -+ -+#ifdef CONFIG_IPS -+ RTW_INFO("%s call ips_leave....\n", __FUNCTION__); -+ if (_FAIL == ips_leave(padapter)) { -+ RTW_INFO("======> ips_leave fail.............\n"); -+ ret = _FAIL; -+ goto exit; -+ } -+#endif -+ -+ } -+ -+ /* TODO: the following checking need to be merged... */ -+ if (rtw_is_drv_stopped(padapter) -+ || !padapter->bup -+ || !rtw_is_hw_init_completed(padapter) -+ ) { -+ RTW_INFO("%s: bDriverStopped=%s, bup=%d, hw_init_completed=%u\n" -+ , caller -+ , rtw_is_drv_stopped(padapter) ? "True" : "False" -+ , padapter->bup -+ , rtw_get_hw_init_completed(padapter)); -+ ret = _FALSE; -+ goto exit; -+ } -+ -+exit: -+ if (rtw_time_after(rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms), pwrpriv->ips_deny_time)) -+ pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms); -+ /*RTW_INFO(FUNC_ADPT_FMT "<===\n", FUNC_ADPT_ARG(padapter));*/ -+ return ret; -+ -+} -+ -+int rtw_pm_set_lps(_adapter *padapter, u8 mode) -+{ -+ int ret = 0; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ if (mode < PS_MODE_NUM) { -+ if (pwrctrlpriv->power_mgnt != mode) { -+ if (PS_MODE_ACTIVE == mode) -+ LeaveAllPowerSaveMode(padapter); -+ else -+ pwrctrlpriv->LpsIdleCount = 2; -+ pwrctrlpriv->power_mgnt = mode; -+ pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt) ? _TRUE : _FALSE; -+ } -+ } else -+ ret = -EINVAL; -+ -+ return ret; -+} -+ -+int rtw_pm_set_lps_level(_adapter *padapter, u8 level) -+{ -+ int ret = 0; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ if (level < LPS_LEVEL_MAX) { -+ if (pwrctrlpriv->lps_level != level) { -+ #ifdef CONFIG_LPS -+ if (rtw_lps_ctrl_leave_set_level_cmd(padapter, level, RTW_CMDF_WAIT_ACK) != _SUCCESS) -+ #endif -+ pwrctrlpriv->lps_level = level; -+ } -+ } else -+ ret = -EINVAL; -+ -+ return ret; -+} -+ -+#ifdef CONFIG_LPS_1T1R -+int rtw_pm_set_lps_1t1r(_adapter *padapter, u8 en) -+{ -+ int ret = 0; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ en = en ? 1 : 0; -+ if (pwrctrlpriv->lps_1t1r != en) { -+ if (rtw_lps_ctrl_leave_set_1t1r_cmd(padapter, en, RTW_CMDF_WAIT_ACK) != _SUCCESS) -+ pwrctrlpriv->lps_1t1r = en; -+ } -+ -+ return ret; -+} -+#endif -+ -+inline void rtw_set_lps_deny(_adapter *adapter, u32 ms) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ pwrpriv->lps_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ms); -+} -+ -+#ifdef CONFIG_WOWLAN -+int rtw_pm_set_wow_lps(_adapter *padapter, u8 mode) -+{ -+ int ret = 0; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ if (mode < PS_MODE_NUM) { -+ if (pwrctrlpriv->wowlan_power_mgmt != mode) -+ pwrctrlpriv->wowlan_power_mgmt = mode; -+ } else -+ ret = -EINVAL; -+ -+ return ret; -+} -+int rtw_pm_set_wow_lps_level(_adapter *padapter, u8 level) -+{ -+ int ret = 0; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ if (level < LPS_LEVEL_MAX) -+ pwrctrlpriv->wowlan_lps_level = level; -+ else -+ ret = -EINVAL; -+ -+ return ret; -+} -+ -+#ifdef CONFIG_LPS_1T1R -+int rtw_pm_set_wow_lps_1t1r(_adapter *padapter, u8 en) -+{ -+ int ret = 0; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ en = en ? 1 : 0; -+ pwrctrlpriv->wowlan_lps_1t1r = en; -+ -+ return ret; -+} -+#endif /* CONFIG_LPS_1T1R */ -+#endif /* CONFIG_WOWLAN */ -+ -+int rtw_pm_set_ips(_adapter *padapter, u8 mode) -+{ -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ if (mode == IPS_NORMAL || mode == IPS_LEVEL_2) { -+ rtw_ips_mode_req(pwrctrlpriv, mode); -+ RTW_INFO("%s %s\n", __FUNCTION__, mode == IPS_NORMAL ? "IPS_NORMAL" : "IPS_LEVEL_2"); -+ return 0; -+ } else if (mode == IPS_NONE) { -+ rtw_ips_mode_req(pwrctrlpriv, mode); -+ RTW_INFO("%s %s\n", __FUNCTION__, "IPS_NONE"); -+ if (!rtw_is_surprise_removed(padapter) && (_FAIL == rtw_pwr_wakeup(padapter))) -+ return -EFAULT; -+ } else -+ return -EINVAL; -+ return 0; -+} -+ -+/* -+ * ATTENTION: -+ * This function will request pwrctrl LOCK! -+ */ -+void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason) -+{ -+ struct pwrctrl_priv *pwrpriv; -+ -+ /* RTW_INFO("+" FUNC_ADPT_FMT ": Request PS deny for %d (0x%08X)\n", -+ * FUNC_ADPT_ARG(padapter), reason, BIT(reason)); */ -+ -+ pwrpriv = adapter_to_pwrctl(padapter); -+ -+ _enter_pwrlock(&pwrpriv->lock); -+ if (pwrpriv->ps_deny & BIT(reason)) { -+ RTW_INFO(FUNC_ADPT_FMT ": [WARNING] Reason %d had been set before!!\n", -+ FUNC_ADPT_ARG(padapter), reason); -+ } -+ pwrpriv->ps_deny |= BIT(reason); -+ _exit_pwrlock(&pwrpriv->lock); -+ -+ /* RTW_INFO("-" FUNC_ADPT_FMT ": Now PS deny for 0x%08X\n", -+ * FUNC_ADPT_ARG(padapter), pwrpriv->ps_deny); */ -+} -+ -+/* -+ * ATTENTION: -+ * This function will request pwrctrl LOCK! -+ */ -+void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason) -+{ -+ struct pwrctrl_priv *pwrpriv; -+ -+ -+ /* RTW_INFO("+" FUNC_ADPT_FMT ": Cancel PS deny for %d(0x%08X)\n", -+ * FUNC_ADPT_ARG(padapter), reason, BIT(reason)); */ -+ -+ pwrpriv = adapter_to_pwrctl(padapter); -+ -+ _enter_pwrlock(&pwrpriv->lock); -+ if ((pwrpriv->ps_deny & BIT(reason)) == 0) { -+ RTW_INFO(FUNC_ADPT_FMT ": [ERROR] Reason %d had been canceled before!!\n", -+ FUNC_ADPT_ARG(padapter), reason); -+ } -+ pwrpriv->ps_deny &= ~BIT(reason); -+ _exit_pwrlock(&pwrpriv->lock); -+ -+ /* RTW_INFO("-" FUNC_ADPT_FMT ": Now PS deny for 0x%08X\n", -+ * FUNC_ADPT_ARG(padapter), pwrpriv->ps_deny); */ -+} -+ -+/* -+ * ATTENTION: -+ * Before calling this function pwrctrl lock should be occupied already, -+ * otherwise it may return incorrect value. -+ */ -+u32 rtw_ps_deny_get(PADAPTER padapter) -+{ -+ u32 deny; -+ -+ -+ deny = adapter_to_pwrctl(padapter)->ps_deny; -+ -+ return deny; -+} -+ -+static void _rtw_ssmps(_adapter *adapter, struct sta_info *sta) -+{ -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (MLME_IS_STA(adapter)) { -+ issue_action_SM_PS_wait_ack(adapter , get_my_bssid(&(pmlmeinfo->network)), -+ sta->cmn.sm_ps, 3 , 1); -+ } -+ else if (MLME_IS_AP(adapter)) { -+ -+ } -+ rtw_phydm_ra_registed(adapter, sta); -+} -+void rtw_ssmps_enter(_adapter *adapter, struct sta_info *sta) -+{ -+ if (sta->cmn.sm_ps == SM_PS_STATIC) -+ return; -+ -+ RTW_INFO(ADPT_FMT" STA [" MAC_FMT "]\n", ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr)); -+ -+ sta->cmn.sm_ps = SM_PS_STATIC; -+ _rtw_ssmps(adapter, sta); -+} -+void rtw_ssmps_leave(_adapter *adapter, struct sta_info *sta) -+{ -+ if (sta->cmn.sm_ps == SM_PS_DISABLE) -+ return; -+ -+ RTW_INFO(ADPT_FMT" STA [" MAC_FMT "] \n", ADPT_ARG(adapter), MAC_ARG(sta->cmn.mac_addr)); -+ sta->cmn.sm_ps = SM_PS_DISABLE; -+ _rtw_ssmps(adapter, sta); -+} -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_recv.c b/drivers/staging/rtl8723cs/core/rtw_recv.c -new file mode 100644 -index 000000000000..fa416896e0c6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_recv.c -@@ -0,0 +1,4763 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_RECV_C_ -+ -+#include -+#include -+ -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+static void rtw_signal_stat_timer_hdl(void *ctx); -+ -+enum { -+ SIGNAL_STAT_CALC_PROFILE_0 = 0, -+ SIGNAL_STAT_CALC_PROFILE_1, -+ SIGNAL_STAT_CALC_PROFILE_2, -+ SIGNAL_STAT_CALC_PROFILE_MAX -+}; -+ -+u8 signal_stat_calc_profile[SIGNAL_STAT_CALC_PROFILE_MAX][3] = { -+ {4, 1}, /* Profile 0 => pre_stat : curr_stat = 4 : 1 */ -+ {3, 7}, /* Profile 1 => pre_stat : curr_stat = 3 : 7 */ -+ {0, 10} /* Profile 2 => pre_stat : curr_stat = 0 : 10 */ -+}; -+ -+#ifndef RTW_SIGNAL_STATE_CALC_PROFILE -+ #define RTW_SIGNAL_STATE_CALC_PROFILE SIGNAL_STAT_CALC_PROFILE_1 -+#endif -+ -+#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ -+u8 rtw_bridge_tunnel_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 }; -+u8 rtw_rfc1042_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 }; -+static u8 SNAP_ETH_TYPE_IPX[2] = {0x81, 0x37}; -+static u8 SNAP_ETH_TYPE_APPLETALK_AARP[2] = {0x80, 0xf3}; -+#ifdef CONFIG_TDLS -+static u8 SNAP_ETH_TYPE_TDLS[2] = {0x89, 0x0d}; -+#endif -+ -+void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv) -+{ -+ -+ -+ -+ _rtw_memset((u8 *)psta_recvpriv, 0, sizeof(struct sta_recv_priv)); -+ -+ _rtw_spinlock_init(&psta_recvpriv->lock); -+ -+ /* for(i=0; iblk_strms[i]); */ -+ -+ _rtw_init_queue(&psta_recvpriv->defrag_q); -+ -+ -+} -+ -+sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter) -+{ -+ sint i; -+ -+ union recv_frame *precvframe; -+ sint res = _SUCCESS; -+ -+ -+ /* We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). */ -+ /* _rtw_memset((unsigned char *)precvpriv, 0, sizeof (struct recv_priv)); */ -+ -+ _rtw_spinlock_init(&precvpriv->lock); -+ -+#ifdef CONFIG_RECV_THREAD_MODE -+ _rtw_init_sema(&precvpriv->recv_sema, 0); -+ -+#endif -+ -+ _rtw_init_queue(&precvpriv->free_recv_queue); -+ _rtw_init_queue(&precvpriv->recv_pending_queue); -+ _rtw_init_queue(&precvpriv->uc_swdec_pending_queue); -+ -+ precvpriv->adapter = padapter; -+ -+ precvpriv->free_recvframe_cnt = NR_RECVFRAME; -+ -+ precvpriv->sink_udpport = 0; -+ precvpriv->pre_rtp_rxseq = 0; -+ precvpriv->cur_rtp_rxseq = 0; -+ -+#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA -+ precvpriv->store_law_data_flag = 1; -+#else -+ precvpriv->store_law_data_flag = 0; -+#endif -+ -+ rtw_os_recv_resource_init(precvpriv, padapter); -+ -+ precvpriv->pallocated_frame_buf = rtw_zvmalloc(NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); -+ -+ if (precvpriv->pallocated_frame_buf == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ /* _rtw_memset(precvpriv->pallocated_frame_buf, 0, NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); */ -+ -+ precvpriv->precv_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_frame_buf), RXFRAME_ALIGN_SZ); -+ /* precvpriv->precv_frame_buf = precvpriv->pallocated_frame_buf + RXFRAME_ALIGN_SZ - */ -+ /* ((SIZE_PTR) (precvpriv->pallocated_frame_buf) &(RXFRAME_ALIGN_SZ-1)); */ -+ -+ precvframe = (union recv_frame *) precvpriv->precv_frame_buf; -+ -+ -+ for (i = 0; i < NR_RECVFRAME ; i++) { -+ _rtw_init_listhead(&(precvframe->u.list)); -+ -+ rtw_list_insert_tail(&(precvframe->u.list), &(precvpriv->free_recv_queue.queue)); -+ -+ rtw_os_recv_resource_alloc(padapter, precvframe); -+ -+ precvframe->u.hdr.len = 0; -+ -+ precvframe->u.hdr.adapter = padapter; -+ precvframe++; -+ -+ } -+ -+#ifdef CONFIG_USB_HCI -+ -+ ATOMIC_SET(&(precvpriv->rx_pending_cnt), 1); -+ -+ _rtw_init_sema(&precvpriv->allrxreturnevt, 0); -+ -+#endif -+ -+ res = rtw_hal_init_recv_priv(padapter); -+ -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ rtw_init_timer(&precvpriv->signal_stat_timer, padapter, rtw_signal_stat_timer_hdl, padapter); -+ -+ precvpriv->signal_stat_sampling_interval = 2000; /* ms */ -+ /* precvpriv->signal_stat_converging_constant = 5000; */ /* ms */ -+ -+ rtw_set_signal_stat_timer(precvpriv); -+#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ -+exit: -+ -+ -+ return res; -+ -+} -+ -+void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv); -+void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv) -+{ -+ _rtw_spinlock_free(&precvpriv->lock); -+#ifdef CONFIG_RECV_THREAD_MODE -+ _rtw_free_sema(&precvpriv->recv_sema); -+#endif -+ -+ _rtw_spinlock_free(&precvpriv->free_recv_queue.lock); -+ _rtw_spinlock_free(&precvpriv->recv_pending_queue.lock); -+ -+ _rtw_spinlock_free(&precvpriv->free_recv_buf_queue.lock); -+ -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX -+ _rtw_spinlock_free(&precvpriv->recv_buf_pending_queue.lock); -+#endif /* CONFIG_USE_USB_BUFFER_ALLOC_RX */ -+} -+ -+void _rtw_free_recv_priv(struct recv_priv *precvpriv) -+{ -+ _adapter *padapter = precvpriv->adapter; -+ -+ -+ rtw_free_uc_swdec_pending_queue(padapter); -+ -+ rtw_mfree_recv_priv_lock(precvpriv); -+ -+ rtw_os_recv_resource_free(precvpriv); -+ -+ if (precvpriv->pallocated_frame_buf) -+ rtw_vmfree(precvpriv->pallocated_frame_buf, NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); -+ -+ rtw_hal_free_recv_priv(padapter); -+ -+ -+} -+ -+bool rtw_rframe_del_wfd_ie(union recv_frame *rframe, u8 ies_offset) -+{ -+#define DBG_RFRAME_DEL_WFD_IE 0 -+ u8 *ies = rframe->u.hdr.rx_data + sizeof(struct rtw_ieee80211_hdr_3addr) + ies_offset; -+ uint ies_len_ori = rframe->u.hdr.len - (ies - rframe->u.hdr.rx_data); -+ uint ies_len; -+ -+ ies_len = rtw_del_wfd_ie(ies, ies_len_ori, DBG_RFRAME_DEL_WFD_IE ? __func__ : NULL); -+ rframe->u.hdr.len -= ies_len_ori - ies_len; -+ -+ return ies_len_ori != ies_len; -+} -+ -+union recv_frame *_rtw_alloc_recvframe(_queue *pfree_recv_queue) -+{ -+ -+ union recv_frame *precvframe; -+ _list *plist, *phead; -+ _adapter *padapter; -+ struct recv_priv *precvpriv; -+ -+ if (_rtw_queue_empty(pfree_recv_queue) == _TRUE) -+ precvframe = NULL; -+ else { -+ phead = get_list_head(pfree_recv_queue); -+ -+ plist = get_next(phead); -+ -+ precvframe = LIST_CONTAINOR(plist, union recv_frame, u); -+ -+ rtw_list_delete(&precvframe->u.hdr.list); -+ padapter = precvframe->u.hdr.adapter; -+ if (padapter != NULL) { -+ precvpriv = &padapter->recvpriv; -+ if (pfree_recv_queue == &precvpriv->free_recv_queue) -+ precvpriv->free_recvframe_cnt--; -+ } -+ } -+ -+ -+ return precvframe; -+ -+} -+ -+union recv_frame *rtw_alloc_recvframe(_queue *pfree_recv_queue) -+{ -+ _irqL irqL; -+ union recv_frame *precvframe; -+ -+ _enter_critical_bh(&pfree_recv_queue->lock, &irqL); -+ -+ precvframe = _rtw_alloc_recvframe(pfree_recv_queue); -+ -+ _exit_critical_bh(&pfree_recv_queue->lock, &irqL); -+ -+ return precvframe; -+} -+ -+void rtw_init_recvframe(union recv_frame *precvframe, struct recv_priv *precvpriv) -+{ -+ /* Perry: This can be removed */ -+ _rtw_init_listhead(&precvframe->u.hdr.list); -+ -+ precvframe->u.hdr.len = 0; -+} -+ -+int rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue) -+{ -+ _irqL irqL; -+ _adapter *padapter = precvframe->u.hdr.adapter; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ padapter = GET_PRIMARY_ADAPTER(padapter); -+ precvpriv = &padapter->recvpriv; -+ pfree_recv_queue = &precvpriv->free_recv_queue; -+ precvframe->u.hdr.adapter = padapter; -+#endif -+ -+ -+ rtw_os_free_recvframe(precvframe); -+ -+ -+ _enter_critical_bh(&pfree_recv_queue->lock, &irqL); -+ -+ rtw_list_delete(&(precvframe->u.hdr.list)); -+ -+ precvframe->u.hdr.len = 0; -+ precvframe->u.hdr.attrib.phy_info.physts_rpt_valid = _FALSE; -+ -+ rtw_list_insert_tail(&(precvframe->u.hdr.list), get_list_head(pfree_recv_queue)); -+ -+ if (padapter != NULL) { -+ if (pfree_recv_queue == &precvpriv->free_recv_queue) -+ precvpriv->free_recvframe_cnt++; -+ } -+ -+ _exit_critical_bh(&pfree_recv_queue->lock, &irqL); -+ -+ -+ return _SUCCESS; -+ -+} -+ -+ -+ -+ -+sint _rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) -+{ -+ -+ _adapter *padapter = precvframe->u.hdr.adapter; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ -+ -+ /* _rtw_init_listhead(&(precvframe->u.hdr.list)); */ -+ rtw_list_delete(&(precvframe->u.hdr.list)); -+ -+ -+ rtw_list_insert_tail(&(precvframe->u.hdr.list), get_list_head(queue)); -+ -+ if (padapter != NULL) { -+ if (queue == &precvpriv->free_recv_queue) -+ precvpriv->free_recvframe_cnt++; -+ } -+ -+ -+ return _SUCCESS; -+} -+ -+sint rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) -+{ -+ sint ret; -+ _irqL irqL; -+ -+ /* _spinlock(&pfree_recv_queue->lock); */ -+ _enter_critical_bh(&queue->lock, &irqL); -+ ret = _rtw_enqueue_recvframe(precvframe, queue); -+ /* _rtw_spinunlock(&pfree_recv_queue->lock); */ -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+ return ret; -+} -+ -+/* -+sint rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) -+{ -+ return rtw_free_recvframe(precvframe, queue); -+} -+*/ -+ -+ -+ -+ -+/* -+caller : defrag ; recvframe_chk_defrag in recv_thread (passive) -+pframequeue: defrag_queue : will be accessed in recv_thread (passive) -+ -+using spinlock to protect -+ -+*/ -+ -+void rtw_free_recvframe_queue(_queue *pframequeue, _queue *pfree_recv_queue) -+{ -+ union recv_frame *precvframe; -+ _list *plist, *phead; -+ -+ _rtw_spinlock(&pframequeue->lock); -+ -+ phead = get_list_head(pframequeue); -+ plist = get_next(phead); -+ -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ precvframe = LIST_CONTAINOR(plist, union recv_frame, u); -+ -+ plist = get_next(plist); -+ -+ /* rtw_list_delete(&precvframe->u.hdr.list); */ /* will do this in rtw_free_recvframe() */ -+ -+ rtw_free_recvframe(precvframe, pfree_recv_queue); -+ } -+ -+ _rtw_spinunlock(&pframequeue->lock); -+ -+ -+} -+ -+u32 rtw_free_uc_swdec_pending_queue(_adapter *adapter) -+{ -+ u32 cnt = 0; -+ union recv_frame *pending_frame; -+ while ((pending_frame = rtw_alloc_recvframe(&adapter->recvpriv.uc_swdec_pending_queue))) { -+ rtw_free_recvframe(pending_frame, &adapter->recvpriv.free_recv_queue); -+ cnt++; -+ } -+ -+ if (cnt) -+ RTW_INFO(FUNC_ADPT_FMT" dequeue %d\n", FUNC_ADPT_ARG(adapter), cnt); -+ -+ return cnt; -+} -+ -+ -+sint rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, _queue *queue) -+{ -+ _irqL irqL; -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ -+ rtw_list_delete(&precvbuf->list); -+ rtw_list_insert_head(&precvbuf->list, get_list_head(queue)); -+ -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+ return _SUCCESS; -+} -+ -+sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue) -+{ -+ _irqL irqL; -+#ifdef CONFIG_SDIO_HCI -+ _enter_critical_bh(&queue->lock, &irqL); -+#else -+ _enter_critical_ex(&queue->lock, &irqL); -+#endif/*#ifdef CONFIG_SDIO_HCI*/ -+ -+ rtw_list_delete(&precvbuf->list); -+ -+ rtw_list_insert_tail(&precvbuf->list, get_list_head(queue)); -+#ifdef CONFIG_SDIO_HCI -+ _exit_critical_bh(&queue->lock, &irqL); -+#else -+ _exit_critical_ex(&queue->lock, &irqL); -+#endif/*#ifdef CONFIG_SDIO_HCI*/ -+ return _SUCCESS; -+ -+} -+ -+struct recv_buf *rtw_dequeue_recvbuf(_queue *queue) -+{ -+ _irqL irqL; -+ struct recv_buf *precvbuf; -+ _list *plist, *phead; -+ -+#ifdef CONFIG_SDIO_HCI -+ _enter_critical_bh(&queue->lock, &irqL); -+#else -+ _enter_critical_ex(&queue->lock, &irqL); -+#endif/*#ifdef CONFIG_SDIO_HCI*/ -+ -+ if (_rtw_queue_empty(queue) == _TRUE) -+ precvbuf = NULL; -+ else { -+ phead = get_list_head(queue); -+ -+ plist = get_next(phead); -+ -+ precvbuf = LIST_CONTAINOR(plist, struct recv_buf, list); -+ -+ rtw_list_delete(&precvbuf->list); -+ -+ } -+ -+#ifdef CONFIG_SDIO_HCI -+ _exit_critical_bh(&queue->lock, &irqL); -+#else -+ _exit_critical_ex(&queue->lock, &irqL); -+#endif/*#ifdef CONFIG_SDIO_HCI*/ -+ -+ return precvbuf; -+ -+} -+ -+sint recvframe_chkmic(_adapter *adapter, union recv_frame *precvframe); -+sint recvframe_chkmic(_adapter *adapter, union recv_frame *precvframe) -+{ -+ -+ sint i, res = _SUCCESS; -+ u32 datalen; -+ u8 miccode[8]; -+ u8 bmic_err = _FALSE, brpt_micerror = _TRUE; -+ u8 *pframe, *payload, *pframemic; -+ u8 *mickey; -+ /* u8 *iv,rxdata_key_idx=0; */ -+ struct sta_info *stainfo; -+ struct rx_pkt_attrib *prxattrib = &precvframe->u.hdr.attrib; -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ stainfo = rtw_get_stainfo(&adapter->stapriv , &prxattrib->ta[0]); -+ -+ if (prxattrib->encrypt == _TKIP_) { -+ -+ /* calculate mic code */ -+ if (stainfo != NULL) { -+ if (IS_MCAST(prxattrib->ra)) { -+ /* mickey=&psecuritypriv->dot118021XGrprxmickey.skey[0]; */ -+ /* iv = precvframe->u.hdr.rx_data+prxattrib->hdrlen; */ -+ /* rxdata_key_idx =( ((iv[3])>>6)&0x3) ; */ -+ mickey = &psecuritypriv->dot118021XGrprxmickey[prxattrib->key_index].skey[0]; -+ -+ /* RTW_INFO("\n recvframe_chkmic: bcmc key psecuritypriv->dot118021XGrpKeyid(%d),pmlmeinfo->key_index(%d) ,recv key_id(%d)\n", */ -+ /* psecuritypriv->dot118021XGrpKeyid,pmlmeinfo->key_index,rxdata_key_idx); */ -+ -+ if (psecuritypriv->binstallGrpkey == _FALSE) { -+ res = _FAIL; -+ RTW_INFO("\n recvframe_chkmic:didn't install group key!!!!!!!!!!\n"); -+ goto exit; -+ } -+ } else { -+ mickey = &stainfo->dot11tkiprxmickey.skey[0]; -+ } -+ -+ datalen = precvframe->u.hdr.len - prxattrib->hdrlen - prxattrib->iv_len - prxattrib->icv_len - 8; /* icv_len included the mic code */ -+ pframe = precvframe->u.hdr.rx_data; -+ payload = pframe + prxattrib->hdrlen + prxattrib->iv_len; -+ -+ -+ /* rtw_seccalctkipmic(&stainfo->dot11tkiprxmickey.skey[0],pframe,payload, datalen ,&miccode[0],(unsigned char)prxattrib->priority); */ /* care the length of the data */ -+ -+ rtw_seccalctkipmic(mickey, pframe, payload, datalen , &miccode[0], (unsigned char)prxattrib->priority); /* care the length of the data */ -+ -+ pframemic = payload + datalen; -+ -+ bmic_err = _FALSE; -+ -+ for (i = 0; i < 8; i++) { -+ if (miccode[i] != *(pframemic + i)) { -+ bmic_err = _TRUE; -+ } -+ } -+ -+ -+ if (bmic_err == _TRUE) { -+ -+ -+ -+ /* double check key_index for some timing issue , */ -+ /* cannot compare with psecuritypriv->dot118021XGrpKeyid also cause timing issue */ -+ if ((IS_MCAST(prxattrib->ra) == _TRUE) && (prxattrib->key_index != pmlmeinfo->key_index)) -+ brpt_micerror = _FALSE; -+ -+ if ((prxattrib->bdecrypted == _TRUE) && (brpt_micerror == _TRUE)) { -+ rtw_handle_tkip_mic_err(adapter, stainfo, (u8)IS_MCAST(prxattrib->ra)); -+ RTW_INFO(" mic error :prxattrib->bdecrypted=%d\n", prxattrib->bdecrypted); -+ } else { -+ RTW_INFO(" mic error :prxattrib->bdecrypted=%d\n", prxattrib->bdecrypted); -+ } -+ -+ res = _FAIL; -+ -+ } else { -+ /* mic checked ok */ -+ if ((psecuritypriv->bcheck_grpkey == _FALSE) && (IS_MCAST(prxattrib->ra) == _TRUE)) { -+ psecuritypriv->bcheck_grpkey = _TRUE; -+ } -+ } -+ -+ } -+ -+ recvframe_pull_tail(precvframe, 8); -+ -+ } -+ -+exit: -+ -+ -+ return res; -+ -+} -+ -+/*#define DBG_RX_SW_DECRYPTOR*/ -+ -+/* decrypt and set the ivlen,icvlen of the recv_frame */ -+union recv_frame *decryptor(_adapter *padapter, union recv_frame *precv_frame); -+union recv_frame *decryptor(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ -+ struct rx_pkt_attrib *prxattrib = &precv_frame->u.hdr.attrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ union recv_frame *return_packet = precv_frame; -+ u32 res = _SUCCESS; -+ -+ -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt); -+ -+ -+ if (prxattrib->encrypt > 0) { -+ u8 *iv = precv_frame->u.hdr.rx_data + prxattrib->hdrlen; -+ prxattrib->key_index = (((iv[3]) >> 6) & 0x3) ; -+ -+ if (prxattrib->key_index > WEP_KEYS) { -+ RTW_INFO("prxattrib->key_index(%d) > WEP_KEYS\n", prxattrib->key_index); -+ -+ switch (prxattrib->encrypt) { -+ case _WEP40_: -+ case _WEP104_: -+ prxattrib->key_index = psecuritypriv->dot11PrivacyKeyIndex; -+ break; -+ case _TKIP_: -+ case _AES_: -+ case _GCMP_: -+ case _GCMP_256_: -+ case _CCMP_256_: -+ default: -+ prxattrib->key_index = psecuritypriv->dot118021XGrpKeyid; -+ break; -+ } -+ } -+ } -+ -+ if (prxattrib->encrypt && !prxattrib->bdecrypted) { -+ if (GetFrameType(get_recvframe_data(precv_frame)) == WIFI_DATA -+ #ifdef CONFIG_CONCURRENT_MODE -+ && !IS_MCAST(prxattrib->ra) /* bc/mc packets may use sw decryption for concurrent mode */ -+ #endif -+ ) -+ psecuritypriv->hw_decrypted = _FALSE; -+ -+#ifdef DBG_RX_SW_DECRYPTOR -+ RTW_INFO(ADPT_FMT" - sec_type:%s DO SW decryption\n", -+ ADPT_ARG(padapter), security_type_str(prxattrib->encrypt)); -+#endif -+ -+#ifdef DBG_RX_DECRYPTOR -+ RTW_INFO("[%s] %d:prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n", -+ __FUNCTION__, -+ __LINE__, -+ prxattrib->bdecrypted, -+ prxattrib->encrypt, -+ psecuritypriv->hw_decrypted); -+#endif -+ -+ switch (prxattrib->encrypt) { -+ case _WEP40_: -+ case _WEP104_: -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_wep); -+ rtw_wep_decrypt(padapter, (u8 *)precv_frame); -+ break; -+ case _TKIP_: -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_tkip); -+ res = rtw_tkip_decrypt(padapter, (u8 *)precv_frame); -+ break; -+ case _AES_: -+ case _CCMP_256_: -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_aes); -+ res = rtw_aes_decrypt(padapter, (u8 *)precv_frame); -+ break; -+ case _GCMP_: -+ case _GCMP_256_: -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_gcmp); -+ res = rtw_gcmp_decrypt(padapter, (u8 *)precv_frame); -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_wapi); -+ rtw_sms4_decrypt(padapter, (u8 *)precv_frame); -+ break; -+#endif -+ default: -+ break; -+ } -+ } else if (prxattrib->bdecrypted == 1 -+ && prxattrib->encrypt > 0 -+ && (psecuritypriv->busetkipkey == 1 || prxattrib->encrypt != _TKIP_) -+ ) { -+#if 0 -+ if ((prxstat->icv == 1) && (prxattrib->encrypt != _AES_)) { -+ psecuritypriv->hw_decrypted = _FALSE; -+ -+ -+ rtw_free_recvframe(precv_frame, &padapter->recvpriv.free_recv_queue); -+ -+ return_packet = NULL; -+ -+ } else -+#endif -+ { -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_hw); -+ -+ psecuritypriv->hw_decrypted = _TRUE; -+#ifdef DBG_RX_DECRYPTOR -+ RTW_INFO("[%s] %d:prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n", -+ __FUNCTION__, -+ __LINE__, -+ prxattrib->bdecrypted, -+ prxattrib->encrypt, -+ psecuritypriv->hw_decrypted); -+ -+#endif -+ } -+ } else { -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_unknown); -+#ifdef DBG_RX_DECRYPTOR -+ RTW_INFO("[%s] %d:prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n", -+ __FUNCTION__, -+ __LINE__, -+ prxattrib->bdecrypted, -+ prxattrib->encrypt, -+ psecuritypriv->hw_decrypted); -+#endif -+ } -+ -+ #ifdef CONFIG_RTW_MESH -+ if (res != _FAIL -+ && !prxattrib->amsdu -+ && prxattrib->mesh_ctrl_present) -+ res = rtw_mesh_rx_validate_mctrl_non_amsdu(padapter, precv_frame); -+ #endif -+ -+ if (res == _FAIL) { -+ rtw_free_recvframe(return_packet, &padapter->recvpriv.free_recv_queue); -+ return_packet = NULL; -+ } else -+ prxattrib->bdecrypted = _TRUE; -+ /* recvframe_chkmic(adapter, precv_frame); */ /* move to recvframme_defrag function */ -+ -+ -+ return return_packet; -+ -+} -+/* ###set the security information in the recv_frame */ -+union recv_frame *portctrl(_adapter *adapter, union recv_frame *precv_frame); -+union recv_frame *portctrl(_adapter *adapter, union recv_frame *precv_frame) -+{ -+ u8 *psta_addr = NULL; -+ u8 *ptr; -+ uint auth_alg; -+ struct recv_frame_hdr *pfhdr; -+ struct sta_info *psta; -+ struct sta_priv *pstapriv ; -+ union recv_frame *prtnframe; -+ u16 ether_type = 0; -+ u16 eapol_type = 0x888e;/* for Funia BD's WPA issue */ -+ struct rx_pkt_attrib *pattrib; -+ -+ -+ pstapriv = &adapter->stapriv; -+ -+ auth_alg = adapter->securitypriv.dot11AuthAlgrthm; -+ -+ ptr = get_recvframe_data(precv_frame); -+ pfhdr = &precv_frame->u.hdr; -+ pattrib = &pfhdr->attrib; -+ psta_addr = pattrib->ta; -+ -+ prtnframe = NULL; -+ -+ psta = rtw_get_stainfo(pstapriv, psta_addr); -+ -+ -+ if (auth_alg == dot11AuthAlgrthm_8021X) { -+ if ((psta != NULL) && (psta->ieee8021x_blocked)) { -+ /* blocked */ -+ /* only accept EAPOL frame */ -+ -+ prtnframe = precv_frame; -+ -+ /* get ether_type */ -+ ptr = ptr + pfhdr->attrib.hdrlen + pfhdr->attrib.iv_len + LLC_HEADER_SIZE; -+ _rtw_memcpy(ðer_type, ptr, 2); -+ ether_type = ntohs((unsigned short)ether_type); -+ -+ if (ether_type == eapol_type) -+ prtnframe = precv_frame; -+ else { -+ /* free this frame */ -+ rtw_free_recvframe(precv_frame, &adapter->recvpriv.free_recv_queue); -+ prtnframe = NULL; -+ } -+ } else { -+ /* allowed */ -+ /* check decryption status, and decrypt the frame if needed */ -+ -+ -+ prtnframe = precv_frame; -+ /* check is the EAPOL frame or not (Rekey) */ -+ /* if(ether_type == eapol_type){ */ -+ /* check Rekey */ -+ -+ /* prtnframe=precv_frame; */ -+ /* } */ -+ } -+ } else -+ prtnframe = precv_frame; -+ -+ -+ return prtnframe; -+ -+} -+ -+/* VALID_PN_CHK -+ * Return true when PN is legal, otherwise false. -+ * Legal PN: -+ * 1. If old PN is 0, any PN is legal -+ * 2. PN > old PN -+ */ -+#define PN_LESS_CHK(a, b) (((a-b) & 0x800000000000) != 0) -+#define VALID_PN_CHK(new, old) (((old) == 0) || PN_LESS_CHK(old, new)) -+#define CCMPH_2_KEYID(ch) (((ch) & 0x00000000c0000000) >> 30) -+sint recv_ucast_pn_decache(union recv_frame *precv_frame); -+sint recv_ucast_pn_decache(union recv_frame *precv_frame) -+{ -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct sta_info *sta = precv_frame->u.hdr.psta; -+ struct stainfo_rxcache *prxcache = &sta->sta_recvpriv.rxcache; -+ u8 *pdata = precv_frame->u.hdr.rx_data; -+ sint tid = precv_frame->u.hdr.attrib.priority; -+ u64 tmp_iv_hdr = 0; -+ u64 curr_pn = 0, pkt_pn = 0; -+ -+ if (tid > 15) -+ return _FAIL; -+ -+ if (pattrib->encrypt == _AES_) { -+ tmp_iv_hdr = le64_to_cpu(*(u64*)(pdata + pattrib->hdrlen)); -+ pkt_pn = CCMPH_2_PN(tmp_iv_hdr); -+ tmp_iv_hdr = le64_to_cpu(*(u64*)prxcache->iv[tid]); -+ curr_pn = CCMPH_2_PN(tmp_iv_hdr); -+ -+ if (!VALID_PN_CHK(pkt_pn, curr_pn)) { -+ /* return _FAIL; */ -+ } else { -+ prxcache->last_tid = tid; -+ _rtw_memcpy(prxcache->iv[tid], -+ (pdata + pattrib->hdrlen), -+ sizeof(prxcache->iv[tid])); -+ } -+ } -+ -+ return _SUCCESS; -+} -+ -+sint recv_bcast_pn_decache(union recv_frame *precv_frame); -+sint recv_bcast_pn_decache(union recv_frame *precv_frame) -+{ -+ _adapter *padapter = precv_frame->u.hdr.adapter; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ u8 *pdata = precv_frame->u.hdr.rx_data; -+ u64 tmp_iv_hdr = 0; -+ u64 curr_pn = 0, pkt_pn = 0; -+ u8 key_id; -+ -+ if ((pattrib->encrypt == _AES_) && -+ (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) { -+ -+ tmp_iv_hdr = le64_to_cpu(*(u64*)(pdata + pattrib->hdrlen)); -+ key_id = CCMPH_2_KEYID(tmp_iv_hdr); -+ pkt_pn = CCMPH_2_PN(tmp_iv_hdr); -+ -+ curr_pn = le64_to_cpu(*(u64*)psecuritypriv->iv_seq[key_id]); -+ curr_pn &= 0x0000ffffffffffff; -+ -+ if (!VALID_PN_CHK(pkt_pn, curr_pn)) -+ return _FAIL; -+ -+ *(u64*)psecuritypriv->iv_seq[key_id] = cpu_to_le64(pkt_pn); -+ } -+ -+ return _SUCCESS; -+} -+ -+sint recv_decache(union recv_frame *precv_frame) -+{ -+ struct sta_info *psta = precv_frame->u.hdr.psta; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ _adapter *adapter = psta->padapter; -+ sint tid = pattrib->priority; -+ u16 seq_ctrl = ((precv_frame->u.hdr.attrib.seq_num & 0xffff) << 4) | -+ (precv_frame->u.hdr.attrib.frag_num & 0xf); -+ u16 *prxseq; -+ -+ if (tid > 15) -+ return _FAIL; -+ -+ if (pattrib->qos) { -+ if (IS_MCAST(pattrib->ra)) -+ prxseq = &psta->sta_recvpriv.bmc_tid_rxseq[tid]; -+ else -+ prxseq = &psta->sta_recvpriv.rxcache.tid_rxseq[tid]; -+ } else { -+ if (IS_MCAST(pattrib->ra)) { -+ prxseq = &psta->sta_recvpriv.nonqos_bmc_rxseq; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" nonqos bmc seq_num:%d\n" -+ , FUNC_ADPT_ARG(adapter), pattrib->seq_num); -+ #endif -+ -+ } else { -+ prxseq = &psta->sta_recvpriv.nonqos_rxseq; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" nonqos seq_num:%d\n" -+ , FUNC_ADPT_ARG(adapter), pattrib->seq_num); -+ #endif -+ } -+ } -+ -+ if (seq_ctrl == *prxseq) { -+ /* for non-AMPDU case */ -+ psta->sta_stats.duplicate_cnt++; -+ -+ if (psta->sta_stats.duplicate_cnt % 100 == 0) -+ RTW_INFO("%s: tid=%u seq=%d frag=%d\n", __func__ -+ , tid, precv_frame->u.hdr.attrib.seq_num -+ , precv_frame->u.hdr.attrib.frag_num); -+ -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_decache _FAIL for sta="MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(psta->cmn.mac_addr)); -+ #endif -+ return _FAIL; -+ } -+ *prxseq = seq_ctrl; -+ -+ return _SUCCESS; -+} -+ -+void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta) -+{ -+#ifdef CONFIG_AP_MODE -+ unsigned char pwrbit; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ -+ pwrbit = GetPwrMgt(ptr); -+ -+ if (pwrbit) { -+ if (!(psta->state & WIFI_SLEEP_STATE)) { -+ /* psta->state |= WIFI_SLEEP_STATE; */ -+ /* rtw_tim_map_set(padapter, pstapriv->sta_dz_bitmap, BIT(psta->cmn.aid)); */ -+ -+ stop_sta_xmit(padapter, psta); -+ /* RTW_INFO_DUMP("to sleep, sta_dz_bitmap=", pstapriv->sta_dz_bitmap, pstapriv->aid_bmp_len); */ -+ } -+ } else { -+ if (psta->state & WIFI_SLEEP_STATE) { -+ /* psta->state ^= WIFI_SLEEP_STATE; */ -+ /* rtw_tim_map_clear(padapter, pstapriv->sta_dz_bitmap, BIT(psta->cmn.aid)); */ -+ -+ wakeup_sta_to_xmit(padapter, psta); -+ /* RTW_INFO_DUMP("to wakeup, sta_dz_bitmap=", pstapriv->sta_dz_bitmap, pstapriv->aid_bmp_len); */ -+ } -+ } -+#endif -+} -+ -+void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta) -+{ -+#ifdef CONFIG_AP_MODE -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ -+#ifdef CONFIG_TDLS -+ if (!(psta->tdls_sta_state & TDLS_LINKED_STATE)) { -+#endif /* CONFIG_TDLS */ -+ -+ if (!psta->qos_option) -+ return; -+ -+ if (!(psta->qos_info & 0xf)) -+ return; -+ -+#ifdef CONFIG_TDLS -+ } -+#endif /* CONFIG_TDLS */ -+ -+ if (psta->state & WIFI_SLEEP_STATE) { -+ u8 wmmps_ac = 0; -+ -+ switch (pattrib->priority) { -+ case 1: -+ case 2: -+ wmmps_ac = psta->uapsd_bk & BIT(1); -+ break; -+ case 4: -+ case 5: -+ wmmps_ac = psta->uapsd_vi & BIT(1); -+ break; -+ case 6: -+ case 7: -+ wmmps_ac = psta->uapsd_vo & BIT(1); -+ break; -+ case 0: -+ case 3: -+ default: -+ wmmps_ac = psta->uapsd_be & BIT(1); -+ break; -+ } -+ -+ if (wmmps_ac) { -+ if (psta->sleepq_ac_len > 0) { -+ /* process received triggered frame */ -+ xmit_delivery_enabled_frames(padapter, psta); -+ } else { -+ /* issue one qos null frame with More data bit = 0 and the EOSP bit set (=1) */ -+ issue_qos_nulldata(padapter, psta->cmn.mac_addr, (u16)pattrib->priority, 0, 0, 0); -+ } -+ } -+ -+ } -+ -+ -+#endif -+ -+} -+ -+#ifdef CONFIG_TDLS -+sint OnTDLS(_adapter *adapter, union recv_frame *precv_frame) -+{ -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ sint ret = _SUCCESS; -+ u8 *paction = get_recvframe_data(precv_frame); -+ u8 category_field = 1; -+#ifdef CONFIG_WFD -+ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a }; -+#endif /* CONFIG_WFD */ -+ struct tdls_info *ptdlsinfo = &(adapter->tdlsinfo); -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct sta_priv *pstapriv = &(adapter->stapriv); -+ struct sta_info *ptdls_sta = NULL; -+ -+ /* point to action field */ -+ paction += pattrib->hdrlen -+ + pattrib->iv_len -+ + SNAP_SIZE -+ + ETH_TYPE_LEN -+ + PAYLOAD_TYPE_LEN -+ + category_field; -+ -+ RTW_INFO("[TDLS] Recv %s from "MAC_FMT" with SeqNum = %d\n", rtw_tdls_action_txt(*paction), MAC_ARG(pattrib->src), GetSequence(get_recvframe_data(precv_frame))); -+ -+ if (hal_chk_wl_func(adapter, WL_FUNC_TDLS) == _FALSE) { -+ RTW_INFO("Ignore tdls frame since hal doesn't support tdls\n"); -+ ret = _FAIL; -+ return ret; -+ } -+ -+ if (rtw_is_tdls_enabled(adapter) == _FALSE) { -+ RTW_INFO("recv tdls frame, " -+ "but tdls haven't enabled\n"); -+ ret = _FAIL; -+ return ret; -+ } -+ -+ ptdls_sta = rtw_get_stainfo(pstapriv, get_sa(ptr)); -+ if (ptdls_sta == NULL) { -+ switch (*paction) { -+ case TDLS_SETUP_REQUEST: -+ case TDLS_DISCOVERY_REQUEST: -+ break; -+ default: -+ RTW_INFO("[TDLS] %s - Direct Link Peer = "MAC_FMT" not found for action = %d\n", __func__, MAC_ARG(get_sa(ptr)), *paction); -+ ret = _FAIL; -+ goto exit; -+ } -+ } -+ -+ switch (*paction) { -+ case TDLS_SETUP_REQUEST: -+ ret = On_TDLS_Setup_Req(adapter, precv_frame, ptdls_sta); -+ break; -+ case TDLS_SETUP_RESPONSE: -+ ret = On_TDLS_Setup_Rsp(adapter, precv_frame, ptdls_sta); -+ break; -+ case TDLS_SETUP_CONFIRM: -+ ret = On_TDLS_Setup_Cfm(adapter, precv_frame, ptdls_sta); -+ break; -+ case TDLS_TEARDOWN: -+ ret = On_TDLS_Teardown(adapter, precv_frame, ptdls_sta); -+ break; -+ case TDLS_DISCOVERY_REQUEST: -+ ret = On_TDLS_Dis_Req(adapter, precv_frame); -+ break; -+ case TDLS_PEER_TRAFFIC_INDICATION: -+ ret = On_TDLS_Peer_Traffic_Indication(adapter, precv_frame, ptdls_sta); -+ break; -+ case TDLS_PEER_TRAFFIC_RESPONSE: -+ ret = On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame, ptdls_sta); -+ break; -+#ifdef CONFIG_TDLS_CH_SW -+ case TDLS_CHANNEL_SWITCH_REQUEST: -+ ret = On_TDLS_Ch_Switch_Req(adapter, precv_frame, ptdls_sta); -+ break; -+ case TDLS_CHANNEL_SWITCH_RESPONSE: -+ ret = On_TDLS_Ch_Switch_Rsp(adapter, precv_frame, ptdls_sta); -+ break; -+#endif -+#ifdef CONFIG_WFD -+ /* First byte of WFA OUI */ -+ case 0x50: -+ if (_rtw_memcmp(WFA_OUI, paction, 3)) { -+ /* Probe request frame */ -+ if (*(paction + 3) == 0x04) { -+ /* WFDTDLS: for sigma test, do not setup direct link automatically */ -+ ptdlsinfo->dev_discovered = _TRUE; -+ RTW_INFO("recv tunneled probe request frame\n"); -+ issue_tunneled_probe_rsp(adapter, precv_frame); -+ } -+ /* Probe response frame */ -+ if (*(paction + 3) == 0x05) { -+ /* WFDTDLS: for sigma test, do not setup direct link automatically */ -+ ptdlsinfo->dev_discovered = _TRUE; -+ RTW_INFO("recv tunneled probe response frame\n"); -+ } -+ } -+ break; -+#endif /* CONFIG_WFD */ -+ default: -+ RTW_INFO("receive TDLS frame %d but not support\n", *paction); -+ ret = _FAIL; -+ break; -+ } -+ -+exit: -+ return ret; -+ -+} -+ -+sint rtw_tdls_rx_data_validate_hdr( -+ _adapter *adapter, -+ union recv_frame *precv_frame, -+ struct sta_info **psta -+) -+{ -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ sint ret = _SUCCESS; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ u8 *mybssid = get_bssid(pmlmepriv); -+ u8 *myhwaddr = adapter_mac_addr(adapter); -+ u8 *sta_addr = pattrib->ta; -+ sint bmcast = IS_MCAST(pattrib->dst); -+ -+ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; -+#ifdef CONFIG_TDLS_CH_SW -+ struct tdls_ch_switch *pchsw_info = &ptdlsinfo->chsw_info; -+#endif -+ struct sta_info *ptdls_sta = NULL; -+ u8 *psnap_type = ptr + pattrib->hdrlen + pattrib->iv_len + SNAP_SIZE; -+ /* frame body located after [+2]: ether-type, [+1]: payload type */ -+ u8 *pframe_body = psnap_type + 2 + 1; -+ -+ *psta = ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->ta); -+ if (ptdls_sta == NULL) { -+ ret = _FAIL; -+ goto exit; -+ } else if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { -+ /* filter packets that SA is myself or multicast or broadcast */ -+ if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)) { -+ ret = _FAIL; -+ goto exit; -+ } -+ /* da should be for me */ -+ if ((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN)) && (!bmcast)) { -+ ret = _FAIL; -+ goto exit; -+ } -+ /* check BSSID */ -+ if (_rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || -+ _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || -+ (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN))) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+#ifdef CONFIG_TDLS_CH_SW -+ if (ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) { -+ if (adapter->mlmeextpriv.cur_channel != rtw_get_oper_ch(adapter)) { -+ pchsw_info->ch_sw_state |= TDLS_PEER_AT_OFF_STATE; -+ if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)) -+ _cancel_timer_ex(&ptdls_sta->ch_sw_timer); -+ /* On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); */ -+ } -+ } -+#endif -+ -+ /* process UAPSD tdls sta */ -+ process_pwrbit_data(adapter, precv_frame, ptdls_sta); -+ -+ /* if NULL-frame, check pwrbit */ -+ if ((get_frame_sub_type(ptr) & WIFI_DATA_NULL) == WIFI_DATA_NULL) { -+ /* NULL-frame with pwrbit=1, buffer_STA should buffer frames for sleep_STA */ -+ if (GetPwrMgt(ptr)) { -+ /* it would be triggered when we are off channel and receiving NULL DATA */ -+ /* we can confirm that peer STA is at off channel */ -+ RTW_INFO("TDLS: recv peer null frame with pwr bit 1\n"); -+ /* ptdls_sta->tdls_sta_state|=TDLS_PEER_SLEEP_STATE; */ -+ } -+ -+ /* TODO: Updated BSSID's seq. */ -+ /* RTW_INFO("drop Null Data\n"); */ -+ ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ /* receive some of all TDLS management frames, process it at ON_TDLS */ -+ if (_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, 2)) { -+ ret = OnTDLS(adapter, precv_frame); -+ goto exit; -+ } -+ -+ if ((get_frame_sub_type(ptr) & WIFI_QOS_DATA_TYPE) == WIFI_QOS_DATA_TYPE) -+ process_wmmps_data(adapter, precv_frame, ptdls_sta); -+ -+ ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); -+ -+ } -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_TDLS */ -+ -+void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info *sta) -+{ -+ int sz; -+ struct sta_info *psta = NULL; -+ struct stainfo_stats *pstats = NULL; -+ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ -+ sz = get_recvframe_len(prframe); -+ precvpriv->rx_bytes += sz; -+ -+ padapter->mlmepriv.LinkDetectInfo.NumRxOkInPeriod++; -+ -+ if ((!MacAddr_isBcst(pattrib->dst)) && (!IS_MCAST(pattrib->dst))) -+ padapter->mlmepriv.LinkDetectInfo.NumRxUnicastOkInPeriod++; -+ -+ if (sta) -+ psta = sta; -+ else -+ psta = prframe->u.hdr.psta; -+ -+ if (psta) { -+ u8 is_ra_bmc = IS_MCAST(pattrib->ra); -+ -+ pstats = &psta->sta_stats; -+ -+ pstats->last_rx_time = rtw_get_current_time(); -+ pstats->rx_data_pkts++; -+ pstats->rx_bytes += sz; -+ if (is_broadcast_mac_addr(pattrib->ra)) { -+ pstats->rx_data_bc_pkts++; -+ pstats->rx_bc_bytes += sz; -+ } else if (is_ra_bmc) { -+ pstats->rx_data_mc_pkts++; -+ pstats->rx_mc_bytes += sz; -+ } -+ -+ if (!is_ra_bmc) { -+ pstats->rxratecnt[pattrib->data_rate]++; -+ /*record rx packets for every tid*/ -+ pstats->rx_data_qos_pkts[pattrib->priority]++; -+ } -+#ifdef CONFIG_DYNAMIC_SOML -+ rtw_dyn_soml_byte_update(padapter, pattrib->data_rate, sz); -+#endif -+#if defined(CONFIG_CHECK_LEAVE_LPS) && defined(CONFIG_LPS_CHK_BY_TP) -+ if (adapter_to_pwrctl(padapter)->lps_chk_by_tp) -+ traffic_check_for_leave_lps_by_tp(padapter, _FALSE, psta); -+#endif /* CONFIG_LPS */ -+ -+ } -+ -+#ifdef CONFIG_CHECK_LEAVE_LPS -+#ifdef CONFIG_LPS_CHK_BY_TP -+ if (!adapter_to_pwrctl(padapter)->lps_chk_by_tp) -+#endif -+ traffic_check_for_leave_lps(padapter, _FALSE, 0); -+#endif /* CONFIG_CHECK_LEAVE_LPS */ -+ -+} -+ -+int rtw_sta_rx_data_validate_hdr(_adapter *adapter, union recv_frame *rframe, struct sta_info **sta) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ u8 *mybssid = get_bssid(&adapter->mlmepriv); -+ u8 *myhwaddr = adapter_mac_addr(adapter); -+ struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib; -+ u8 *whdr = get_recvframe_data(rframe); -+ u8 is_ra_bmc = IS_MCAST(GetAddr1Ptr(whdr)) ? 1 : 0; -+ sint ret = _FAIL; -+ -+ if (rattrib->to_fr_ds == 0) { -+ _rtw_memcpy(rattrib->ra, GetAddr1Ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->ta, get_addr2_ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->dst, GetAddr1Ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->src, get_addr2_ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->bssid, GetAddr3Ptr(whdr), ETH_ALEN); -+ -+ #ifdef CONFIG_TDLS -+ if (adapter->tdlsinfo.link_established == _TRUE) -+ ret = rtw_tdls_rx_data_validate_hdr(adapter, rframe, sta); -+ else -+ #endif -+ { -+ /* For Station mode, sa and bssid should always be BSSID, and DA is my mac-address */ -+ if (!_rtw_memcmp(rattrib->bssid, rattrib->src, ETH_ALEN)) -+ goto exit; -+ -+ *sta = rtw_get_stainfo(stapriv, get_addr2_ptr(whdr)); -+ if (*sta) -+ ret = _SUCCESS; -+ } -+ goto exit; -+ } -+ -+ if (!(MLME_STATE(adapter) & (WIFI_ASOC_STATE | WIFI_UNDER_LINKING))) { -+ if (!is_ra_bmc) { -+ /* for AP multicast issue , modify by yiwei */ -+ static systime send_issue_deauth_time = 0; -+ -+ /* RTW_INFO("After send deauth , %u ms has elapsed.\n", rtw_get_passing_time_ms(send_issue_deauth_time)); */ -+ if (rtw_get_passing_time_ms(send_issue_deauth_time) > 10000 || send_issue_deauth_time == 0) { -+ send_issue_deauth_time = rtw_get_current_time(); -+ RTW_INFO(FUNC_ADPT_FMT" issue_deauth to "MAC_FMT" with reason(7), mlme_state:0x%x\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(get_addr2_ptr(whdr)), MLME_STATE(adapter)); -+ issue_deauth(adapter, get_addr2_ptr(whdr), WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); -+ } -+ } -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" fw_state:0x%x\n" -+ , FUNC_ADPT_ARG(adapter), MLME_STATE(adapter)); -+ #endif -+ goto exit; -+ } -+ -+ _rtw_memcpy(rattrib->ra, GetAddr1Ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->ta, get_addr2_ptr(whdr), ETH_ALEN); -+ -+ switch (rattrib->to_fr_ds) { -+ case 2: -+ _rtw_memcpy(rattrib->dst, GetAddr1Ptr(whdr), ETH_ALEN); -+ _rtw_memcpy(rattrib->src, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */ -+ _rtw_memcpy(rattrib->bssid, get_addr2_ptr(whdr), ETH_ALEN); -+ break; -+ case 3: -+ _rtw_memcpy(rattrib->dst, GetAddr3Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */ -+ _rtw_memcpy(rattrib->src, GetAddr4Ptr(whdr), ETH_ALEN); /* may change after checking AMSDU subframe header */ -+ _rtw_memcpy(rattrib->bssid, get_addr2_ptr(whdr), ETH_ALEN); -+ break; -+ default: -+ ret = RTW_RX_HANDLED; /* don't count for drop */ -+ goto exit; -+ } -+ -+ /* filter packets that SA is myself */ -+ if (!rattrib->amsdu && _rtw_memcmp(myhwaddr, rattrib->src, ETH_ALEN)) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" SA="MAC_FMT", myhwaddr="MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(rattrib->src), MAC_ARG(myhwaddr)); -+ #endif -+ goto exit; -+ } -+ -+ *sta = rtw_get_stainfo(stapriv, rattrib->ta); -+ if (*sta == NULL) { -+ #ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL -+ if (!is_ra_bmc && !IS_RADAR_DETECTED(adapter_to_rfctl(adapter))) { -+ RTW_INFO(FUNC_ADPT_FMT" issue_deauth to "MAC_FMT" with reason(7), unknown TA\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(rattrib->ta)); -+ issue_deauth(adapter, rattrib->ta, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); -+ } -+ #endif -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" can't get psta under STATION_MODE ; drop pkt\n" -+ , FUNC_ADPT_ARG(adapter)); -+ #endif -+ goto exit; -+ } -+ -+#ifdef CONFIG_RTW_WDS_AUTO_EN -+ if (rattrib->to_fr_ds == 3 && !(sta->flags & WLAN_STA_WDS)) -+ sta->flags |= WLAN_STA_WDS; -+#endif -+ -+ /*if ((get_frame_sub_type(whdr) & WIFI_QOS_DATA_TYPE) == WIFI_QOS_DATA_TYPE) { -+ } -+ */ -+ -+ if (get_frame_sub_type(whdr) & BIT(6)) { -+ /* No data, will not indicate to upper layer, temporily count it here */ -+ count_rx_stats(adapter, rframe, *sta); -+ ret = RTW_RX_HANDLED; -+ goto exit; -+ } -+ -+#ifdef CONFIG_RTW_WDS -+ if (adapter_use_wds(adapter) -+ && !rattrib->amsdu && IS_MCAST(rattrib->dst) -+ && rtw_rx_wds_gptr_check(adapter, rattrib->src) -+ ) { -+ /* will not indicate to upper layer, temporily count it here */ -+ count_rx_stats(adapter, rframe, *sta); -+ ret = RTW_RX_HANDLED; -+ goto exit; -+ } -+#endif -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+int rtw_sta_rx_amsdu_act_check(union recv_frame *rframe -+ , const u8 *da, const u8 *sa) -+{ -+ int act = RTW_RX_MSDU_ACT_INDICATE; -+ -+#ifdef CONFIG_RTW_WDS -+ _adapter *adapter = rframe->u.hdr.adapter; -+ -+ if (adapter_use_wds(adapter) -+ && IS_MCAST(da) -+ && rtw_rx_wds_gptr_check(adapter, sa) -+ ) { -+ act = 0; -+ } -+#endif -+ -+ return act; -+} -+ -+sint sta2sta_data_frame( -+ _adapter *adapter, -+ union recv_frame *precv_frame, -+ struct sta_info **psta -+) -+{ -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ sint ret = _SUCCESS; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ u8 *mybssid = get_bssid(pmlmepriv); -+ u8 *myhwaddr = adapter_mac_addr(adapter); -+ u8 *sta_addr = pattrib->ta; -+ sint bmcast = IS_MCAST(pattrib->dst); -+ -+ /* RTW_INFO("[%s] %d, seqnum:%d\n", __FUNCTION__, __LINE__, pattrib->seq_num); */ -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || -+ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { -+ -+ /* filter packets that SA is myself or multicast or broadcast */ -+ if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ if ((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN)) && (!bmcast)) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ if (_rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || -+ _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || -+ (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN))) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ } else if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) { -+ _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->src, get_addr2_ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ sta_addr = mybssid; -+ } else -+ ret = _FAIL; -+ -+ *psta = rtw_get_stainfo(pstapriv, sta_addr); -+ if (*psta == NULL) { -+#ifdef CONFIG_MP_INCLUDED -+ if (adapter->registrypriv.mp_mode == 1) { -+ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) -+ adapter->mppriv.rx_pktloss++; -+ } -+#endif -+ ret = _FAIL; -+ goto exit; -+ } -+ -+exit: -+ return ret; -+} -+ -+sint ap2sta_data_frame( -+ _adapter *adapter, -+ union recv_frame *precv_frame, -+ struct sta_info **psta) -+{ -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ sint ret = _SUCCESS; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ u8 *myhwaddr = adapter_mac_addr(adapter); -+ sint bmcast = IS_MCAST(pattrib->dst); -+ -+ if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && -+ (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) { -+ _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->src, get_addr2_ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ -+ *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); /* get sta_info */ -+ if (*psta == NULL) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" can't get psta under WIFI_MP_STATE ; drop pkt\n" -+ , FUNC_ADPT_ARG(adapter)); -+ #endif -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ } else { -+ if (_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN) && (!bmcast)) { -+ *psta = rtw_get_stainfo(pstapriv, pattrib->ta); -+ if (*psta == NULL) { -+ -+ /* for AP multicast issue , modify by yiwei */ -+ static systime send_issue_deauth_time = 0; -+ -+ /* RTW_INFO("After send deauth , %u ms has elapsed.\n", rtw_get_passing_time_ms(send_issue_deauth_time)); */ -+ -+ if (rtw_get_passing_time_ms(send_issue_deauth_time) > 10000 || send_issue_deauth_time == 0) { -+ send_issue_deauth_time = rtw_get_current_time(); -+ -+ RTW_INFO("issue_deauth to the ap=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->bssid)); -+ -+ issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); -+ } -+ } -+ } -+ -+ ret = _FAIL; -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" fw_state:0x%x\n" -+ , FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv)); -+ #endif -+ } -+ -+exit: -+ return ret; -+ -+} -+ -+sint sta2ap_data_frame( -+ _adapter *adapter, -+ union recv_frame *precv_frame, -+ struct sta_info **psta) -+{ -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ unsigned char *mybssid = get_bssid(pmlmepriv); -+ sint ret = _SUCCESS; -+ -+ if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && -+ (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) { -+ /* RTW_INFO("%s ,in WIFI_MP_STATE\n",__func__); */ -+ _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->src, get_addr2_ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ -+ *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); /* get sta_info */ -+ if (*psta == NULL) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" can't get psta under WIFI_MP_STATE ; drop pkt\n" -+ , FUNC_ADPT_ARG(adapter)); -+ #endif -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ } else { -+ u8 *myhwaddr = adapter_mac_addr(adapter); -+ if (!_rtw_memcmp(pattrib->ra, myhwaddr, ETH_ALEN)) { -+ ret = RTW_RX_HANDLED; -+ goto exit; -+ } -+#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL -+ RTW_INFO("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src)); -+ issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); -+#endif -+ ret = RTW_RX_HANDLED; -+ goto exit; -+ } -+ -+exit: -+ -+ -+ return ret; -+ -+} -+ -+sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame); -+sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ struct sta_info *psta = NULL; -+ /* uint len = precv_frame->u.hdr.len; */ -+ -+ /* RTW_INFO("+validate_recv_ctrl_frame\n"); */ -+ -+ if (GetFrameType(pframe) != WIFI_CTRL_TYPE) -+ return _FAIL; -+ -+ /* receive the frames that ra(a1) is my address */ -+ if (!_rtw_memcmp(GetAddr1Ptr(pframe), adapter_mac_addr(padapter), ETH_ALEN)) -+ return _FAIL; -+ -+ psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (psta == NULL) -+ return _FAIL; -+ -+ /* for rx pkt statistics */ -+ psta->sta_stats.last_rx_time = rtw_get_current_time(); -+ psta->sta_stats.rx_ctrl_pkts++; -+ -+ /* only handle ps-poll */ -+ if (get_frame_sub_type(pframe) == WIFI_PSPOLL) { -+#ifdef CONFIG_AP_MODE -+ u16 aid; -+ u8 wmmps_ac = 0; -+ -+ aid = GetAid(pframe); -+ if (psta->cmn.aid != aid) -+ return _FAIL; -+ -+ switch (pattrib->priority) { -+ case 1: -+ case 2: -+ wmmps_ac = psta->uapsd_bk & BIT(0); -+ break; -+ case 4: -+ case 5: -+ wmmps_ac = psta->uapsd_vi & BIT(0); -+ break; -+ case 6: -+ case 7: -+ wmmps_ac = psta->uapsd_vo & BIT(0); -+ break; -+ case 0: -+ case 3: -+ default: -+ wmmps_ac = psta->uapsd_be & BIT(0); -+ break; -+ } -+ -+ if (wmmps_ac) -+ return _FAIL; -+ -+ #ifdef CONFIG_AP_MODE -+ if (psta->state & WIFI_STA_ALIVE_CHK_STATE) { -+ RTW_INFO("%s alive check-rx ps-poll\n", __func__); -+ psta->expire_to = pstapriv->expire_to; -+ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; -+ } -+ #endif -+ -+ if ((psta->state & WIFI_SLEEP_STATE) && (rtw_tim_map_is_set(padapter, pstapriv->sta_dz_bitmap, psta->cmn.aid))) { -+ _irqL irqL; -+ _list *xmitframe_plist, *xmitframe_phead; -+ struct xmit_frame *pxmitframe = NULL; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ /* _enter_critical_bh(&psta->sleep_q.lock, &irqL); */ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ xmitframe_phead = get_list_head(&psta->sleep_q); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ if ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ -+ xmitframe_plist = get_next(xmitframe_plist); -+ -+ rtw_list_delete(&pxmitframe->list); -+ -+ psta->sleepq_len--; -+ -+ if (psta->sleepq_len > 0) -+ pxmitframe->attrib.mdata = 1; -+ else -+ pxmitframe->attrib.mdata = 0; -+ -+ pxmitframe->attrib.triggered = 1; -+ -+ /* RTW_INFO("handling ps-poll, q_len=%d\n", psta->sleepq_len); */ -+ /* RTW_INFO_DUMP("handling, tim=", pstapriv->tim_bitmap, pstapriv->aid_bmp_len); */ -+ -+#if 0 -+ _exit_critical_bh(&psta->sleep_q.lock, &irqL); -+ if (rtw_hal_xmit(padapter, pxmitframe) == _TRUE) -+ rtw_os_xmit_complete(padapter, pxmitframe); -+ _enter_critical_bh(&psta->sleep_q.lock, &irqL); -+#endif -+ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); -+ -+ if (psta->sleepq_len == 0) { -+ rtw_tim_map_clear(padapter, pstapriv->tim_bitmap, psta->cmn.aid); -+ -+ /* RTW_INFO("after handling ps-poll\n"); */ -+ /* RTW_INFO_DUMP("after handling, tim=", pstapriv->tim_bitmap, pstapriv->aid_bmp_len); */ -+ -+ /* upate BCN for TIM IE */ -+ /* update_BCNTIM(padapter); */ -+ update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0); -+ } -+ -+ /* _exit_critical_bh(&psta->sleep_q.lock, &irqL); */ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ } else { -+ /* _exit_critical_bh(&psta->sleep_q.lock, &irqL); */ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ /* RTW_INFO("no buffered packets to xmit\n"); */ -+ if (rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, psta->cmn.aid)) { -+ if (psta->sleepq_len == 0) { -+ RTW_INFO("no buffered packets to xmit\n"); -+ -+ /* issue nulldata with More data bit = 0 to indicate we have no buffered packets */ -+ issue_nulldata(padapter, psta->cmn.mac_addr, 0, 0, 0); -+ } else { -+ RTW_INFO("error!psta->sleepq_len=%d\n", psta->sleepq_len); -+ psta->sleepq_len = 0; -+ } -+ -+ rtw_tim_map_clear(padapter, pstapriv->tim_bitmap, psta->cmn.aid); -+ -+ /* upate BCN for TIM IE */ -+ /* update_BCNTIM(padapter); */ -+ update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0); -+ } -+ } -+ } -+#endif /* CONFIG_AP_MODE */ -+ } else if (get_frame_sub_type(pframe) == WIFI_NDPA) { -+#ifdef CONFIG_BEAMFORMING -+ rtw_beamforming_get_ndpa_frame(padapter, precv_frame); -+#endif/*CONFIG_BEAMFORMING*/ -+ } else if (get_frame_sub_type(pframe) == WIFI_BAR) { -+ rtw_process_bar_frame(padapter, precv_frame); -+ } -+ -+ return _FAIL; -+ -+} -+ -+#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) -+static sint validate_mgmt_protect(_adapter *adapter, union recv_frame *precv_frame) -+{ -+#define DBG_VALIDATE_MGMT_PROTECT 0 -+#define DBG_VALIDATE_MGMT_DEC 0 -+ -+ struct security_priv *sec = &adapter->securitypriv; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct sta_info *psta = precv_frame->u.hdr.psta; -+ u8 *ptr; -+ u8 type; -+ u8 subtype; -+ u8 is_bmc; -+ u8 category = 0xFF; -+ -+#ifdef CONFIG_IEEE80211W -+ const u8 *igtk; -+ u16 igtk_id; -+ u64* ipn; -+ enum security_type bip_cipher; -+#endif -+ -+ u8 *mgmt_DATA; -+ u32 data_len = 0; -+ -+ sint ret; -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(adapter)) { -+ if (!adapter->mesh_info.mesh_auth_id) -+ return pattrib->privacy ? _FAIL : _SUCCESS; -+ } else -+#endif -+ if (SEC_IS_BIP_KEY_INSTALLED(sec) == _FALSE) -+ return _SUCCESS; -+ -+ ptr = precv_frame->u.hdr.rx_data; -+ type = GetFrameType(ptr); -+ subtype = get_frame_sub_type(ptr); /* bit(7)~bit(2) */ -+ is_bmc = IS_MCAST(GetAddr1Ptr(ptr)); -+ -+#if DBG_VALIDATE_MGMT_PROTECT -+ if (subtype == WIFI_DEAUTH) { -+ RTW_INFO(FUNC_ADPT_FMT" bmc:%u, deauth, privacy:%u, encrypt:%u, bdecrypted:%u\n" -+ , FUNC_ADPT_ARG(adapter) -+ , is_bmc, pattrib->privacy, pattrib->encrypt, pattrib->bdecrypted); -+ } else if (subtype == WIFI_DISASSOC) { -+ RTW_INFO(FUNC_ADPT_FMT" bmc:%u, disassoc, privacy:%u, encrypt:%u, bdecrypted:%u\n" -+ , FUNC_ADPT_ARG(adapter) -+ , is_bmc, pattrib->privacy, pattrib->encrypt, pattrib->bdecrypted); -+ } if (subtype == WIFI_ACTION) { -+ if (pattrib->privacy) { -+ RTW_INFO(FUNC_ADPT_FMT" bmc:%u, action(?), privacy:%u, encrypt:%u, bdecrypted:%u\n" -+ , FUNC_ADPT_ARG(adapter) -+ , is_bmc, pattrib->privacy, pattrib->encrypt, pattrib->bdecrypted); -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT" bmc:%u, action(%u), privacy:%u, encrypt:%u, bdecrypted:%u\n" -+ , FUNC_ADPT_ARG(adapter), is_bmc -+ , *(ptr + sizeof(struct rtw_ieee80211_hdr_3addr)) -+ , pattrib->privacy, pattrib->encrypt, pattrib->bdecrypted); -+ } -+ } -+#endif -+ -+ if (!pattrib->privacy) { -+ if (!psta || !(psta->flags & WLAN_STA_MFP)) { -+ /* peer is not MFP capable, no need to check */ -+ goto exit; -+ } -+ -+ if (subtype == WIFI_ACTION) -+ category = *(ptr + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+ if (is_bmc) { -+ /* broadcast cases */ -+ if (subtype == WIFI_ACTION) { -+ if (CATEGORY_IS_GROUP_PRIVACY(category)) { -+ /* drop broadcast group privacy action frame without encryption */ -+ #if DBG_VALIDATE_MGMT_PROTECT -+ RTW_INFO(FUNC_ADPT_FMT" broadcast gp action(%u) w/o encrypt\n" -+ , FUNC_ADPT_ARG(adapter), category); -+ #endif -+ goto fail; -+ } -+ if (CATEGORY_IS_ROBUST(category)) { -+ /* broadcast robust action frame need BIP check */ -+ goto bip_verify; -+ } -+ } -+ if (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC) { -+ /* broadcast deauth or disassoc frame need BIP check */ -+ goto bip_verify; -+ } -+ goto exit; -+ -+ } else { -+ /* unicast cases */ -+ #ifdef CONFIG_IEEE80211W -+ if (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC) { -+ if (!MLME_IS_MESH(adapter)) { -+ unsigned short reason = le16_to_cpu(*(unsigned short *)(ptr + WLAN_HDR_A3_LEN)); -+ -+ #if DBG_VALIDATE_MGMT_PROTECT -+ RTW_INFO(FUNC_ADPT_FMT" unicast %s, reason=%d w/o encrypt\n" -+ , FUNC_ADPT_ARG(adapter), subtype == WIFI_DEAUTH ? "deauth" : "disassoc", reason); -+ #endif -+ if (reason == 6 || reason == 7) { -+ /* issue sa query request */ -+ issue_action_SA_Query(adapter, psta->cmn.mac_addr, 0, 0, IEEE80211W_RIGHT_KEY); -+ } -+ } -+ goto fail; -+ } -+ #endif -+ -+ if (subtype == WIFI_ACTION && CATEGORY_IS_ROBUST(category)) { -+ if (psta->bpairwise_key_installed == _TRUE) { -+ #if DBG_VALIDATE_MGMT_PROTECT -+ RTW_INFO(FUNC_ADPT_FMT" unicast robust action(%d) w/o encrypt\n" -+ , FUNC_ADPT_ARG(adapter), category); -+ #endif -+ goto fail; -+ } -+ } -+ goto exit; -+ } -+ -+bip_verify: -+#ifdef CONFIG_IEEE80211W -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(adapter)) { -+ if (psta->igtk_bmp) { -+ bip_cipher = psta->dot11wCipher; -+ igtk = psta->igtk.skey; -+ igtk_id = psta->igtk_id; -+ ipn = &psta->igtk_pn.val; -+ } else { -+ /* mesh MFP without IGTK */ -+ goto exit; -+ } -+ } else -+ #endif -+ { -+ bip_cipher = sec->dot11wCipher; -+ igtk = sec->dot11wBIPKey[sec->dot11wBIPKeyid].skey; -+ igtk_id = sec->dot11wBIPKeyid; -+ ipn = &sec->dot11wBIPrxpn.val; -+ } -+ -+ /* verify BIP MME IE */ -+ ret = rtw_bip_verify(bip_cipher, pattrib->pkt_len, -+ get_recvframe_data(precv_frame), -+ get_recvframe_len(precv_frame), -+ igtk, igtk_id, ipn); -+ -+ if (ret == _FAIL) { -+ /* RTW_INFO("802.11w BIP verify fail\n"); */ -+ goto fail; -+ -+ } else if (ret == RTW_RX_HANDLED) { -+ #if DBG_VALIDATE_MGMT_PROTECT -+ RTW_INFO(FUNC_ADPT_FMT" none protected packet\n", FUNC_ADPT_ARG(adapter)); -+ #endif -+ goto fail; -+ } -+#endif /* CONFIG_IEEE80211W */ -+ goto exit; -+ } -+ -+ if (!psta || !(psta->flags & WLAN_STA_MFP)) { -+ /* not peer or peer is not MFP capable, drop it */ -+ goto fail; -+ } -+ -+ /* cases to decrypt mgmt frame */ -+ pattrib->bdecrypted = 0; -+#ifdef CONFIG_RTW_MESH -+ if (is_bmc) -+ pattrib->encrypt = psta->group_privacy; -+ else -+#endif -+ pattrib->encrypt = psta->dot118021XPrivacy; -+ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ /* set iv and icv length */ -+ SET_ICE_IV_LEN(pattrib->iv_len, pattrib->icv_len, pattrib->encrypt); -+ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, get_addr2_ptr(ptr), ETH_ALEN); -+ -+ /* actual management data frame body */ -+ data_len = pattrib->pkt_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len; -+ mgmt_DATA = rtw_zmalloc(data_len); -+ if (mgmt_DATA == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT" mgmt allocate fail !!!!!!!!!\n", FUNC_ADPT_ARG(adapter)); -+ goto fail; -+ } -+ -+#if DBG_VALIDATE_MGMT_DEC -+ /* dump the packet content before decrypt */ -+ { -+ int pp; -+ -+ printk("pattrib->pktlen = %d =>", pattrib->pkt_len); -+ for (pp = 0; pp < pattrib->pkt_len; pp++) -+ printk(" %02x ", ptr[pp]); -+ printk("\n"); -+ } -+#endif -+ -+ precv_frame = decryptor(adapter, precv_frame); -+ /* save actual management data frame body */ -+ _rtw_memcpy(mgmt_DATA, ptr + pattrib->hdrlen + pattrib->iv_len, data_len); -+ /* overwrite the iv field */ -+ _rtw_memcpy(ptr + pattrib->hdrlen, mgmt_DATA, data_len); -+ /* remove the iv and icv length */ -+ pattrib->pkt_len = pattrib->pkt_len - pattrib->iv_len - pattrib->icv_len; -+ rtw_mfree(mgmt_DATA, data_len); -+ -+#if DBG_VALIDATE_MGMT_DEC -+ /* print packet content after decryption */ -+ { -+ int pp; -+ -+ printk("after decryption pattrib->pktlen = %d @@=>", pattrib->pkt_len); -+ for (pp = 0; pp < pattrib->pkt_len; pp++) -+ printk(" %02x ", ptr[pp]); -+ printk("\n"); -+ } -+#endif -+ -+ if (!precv_frame) { -+ #if DBG_VALIDATE_MGMT_PROTECT -+ RTW_INFO(FUNC_ADPT_FMT" mgmt descrypt fail !!!!!!!!!\n", FUNC_ADPT_ARG(adapter)); -+ #endif -+ goto fail; -+ } -+ -+exit: -+ return _SUCCESS; -+ -+fail: -+ return _FAIL; -+ -+} -+#endif /* defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) */ -+ -+union recv_frame *recvframe_chk_defrag(PADAPTER padapter, union recv_frame *precv_frame); -+ -+sint validate_recv_mgnt_frame(PADAPTER padapter, union recv_frame *precv_frame) -+{ -+ struct sta_info *psta = precv_frame->u.hdr.psta -+ = rtw_get_stainfo(&padapter->stapriv, get_addr2_ptr(precv_frame->u.hdr.rx_data)); -+ -+#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) -+ if (validate_mgmt_protect(padapter, precv_frame) == _FAIL) { -+ DBG_COUNTER(padapter->rx_logs.core_rx_pre_mgmt_err_80211w); -+ goto exit; -+ } -+#endif -+ -+ precv_frame = recvframe_chk_defrag(padapter, precv_frame); -+ if (precv_frame == NULL) -+ return _SUCCESS; -+ -+ /* for rx pkt statistics */ -+ if (psta) { -+ psta->sta_stats.last_rx_time = rtw_get_current_time(); -+ psta->sta_stats.rx_mgnt_pkts++; -+ if (get_frame_sub_type(precv_frame->u.hdr.rx_data) == WIFI_BEACON) -+ psta->sta_stats.rx_beacon_pkts++; -+ else if (get_frame_sub_type(precv_frame->u.hdr.rx_data) == WIFI_PROBEREQ) -+ psta->sta_stats.rx_probereq_pkts++; -+ else if (get_frame_sub_type(precv_frame->u.hdr.rx_data) == WIFI_PROBERSP) { -+ if (_rtw_memcmp(adapter_mac_addr(padapter), GetAddr1Ptr(precv_frame->u.hdr.rx_data), ETH_ALEN) == _TRUE) -+ psta->sta_stats.rx_probersp_pkts++; -+ else if (is_broadcast_mac_addr(GetAddr1Ptr(precv_frame->u.hdr.rx_data)) -+ || is_multicast_mac_addr(GetAddr1Ptr(precv_frame->u.hdr.rx_data))) -+ psta->sta_stats.rx_probersp_bm_pkts++; -+ else -+ psta->sta_stats.rx_probersp_uo_pkts++; -+ } -+ } -+ -+ mgt_dispatcher(padapter, precv_frame); -+ -+#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) -+exit: -+#endif -+ return _SUCCESS; -+ -+} -+ -+sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame) -+{ -+ u8 bretry, a4_shift; -+ struct sta_info *psta = NULL; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ sint ret = _SUCCESS; -+ -+ bretry = GetRetry(ptr); -+ a4_shift = (pattrib->to_fr_ds == 3) ? ETH_ALEN : 0; -+ -+ /* some address fields are different when using AMSDU */ -+ if (pattrib->qos) -+ pattrib->amsdu = GetAMsdu(ptr + WLAN_HDR_A3_LEN + a4_shift); -+ else -+ pattrib->amsdu = 0; -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(adapter)) { -+ ret = rtw_mesh_rx_data_validate_hdr(adapter, precv_frame, &psta); -+ goto pre_validate_status_chk; -+ } else -+#endif -+#ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(adapter)) { -+ ret = rtw_ap_rx_data_validate_hdr(adapter, precv_frame, &psta); -+ goto pre_validate_status_chk; -+ } else -+#endif -+ if (MLME_IS_STA(adapter)) { -+ ret = rtw_sta_rx_data_validate_hdr(adapter, precv_frame, &psta); -+ goto pre_validate_status_chk; -+ } -+ -+ switch (pattrib->to_fr_ds) { -+ case 0: -+ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, get_addr2_ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->src, get_addr2_ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); -+ ret = sta2sta_data_frame(adapter, precv_frame, &psta); -+ break; -+ -+ case 1: -+ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, get_addr2_ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->dst, GetAddr3Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->src, get_addr2_ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->bssid, GetAddr1Ptr(ptr), ETH_ALEN); -+ ret = sta2ap_data_frame(adapter, precv_frame, &psta); -+ break; -+ -+ case 2: -+ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, get_addr2_ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->src, GetAddr3Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->bssid, get_addr2_ptr(ptr), ETH_ALEN); -+ ret = ap2sta_data_frame(adapter, precv_frame, &psta); -+ break; -+ -+ case 3: -+ default: -+ /* WDS is not supported */ -+ ret = _FAIL; -+ break; -+ } -+ -+pre_validate_status_chk: -+ -+ if (ret == _FAIL) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" case:%d, res:%d, ra="MAC_FMT", ta="MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), pattrib->to_fr_ds, ret, MAC_ARG(GetAddr1Ptr(ptr)), MAC_ARG(get_addr2_ptr(ptr))); -+ #endif -+ goto exit; -+ } else if (ret == RTW_RX_HANDLED) -+ goto exit; -+ -+ -+ if (psta == NULL) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" psta == NULL, ra="MAC_FMT", ta="MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(GetAddr1Ptr(ptr)), MAC_ARG(get_addr2_ptr(ptr))); -+ #endif -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ precv_frame->u.hdr.psta = psta; -+ precv_frame->u.hdr.preorder_ctrl = NULL; -+ pattrib->ack_policy = 0; -+ -+ /* parsing QC field */ -+ if (pattrib->qos == 1) { -+ pattrib->priority = GetPriority((ptr + WLAN_HDR_A3_LEN + a4_shift)); /* point to Qos field*/ -+ pattrib->ack_policy = GetAckpolicy((ptr + WLAN_HDR_A3_LEN + a4_shift)); -+ pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN + a4_shift; -+ if (pattrib->priority != 0 && pattrib->priority != 3) -+ adapter->recvpriv.is_any_non_be_pkts = _TRUE; -+ else -+ adapter->recvpriv.is_any_non_be_pkts = _FALSE; -+ } else { -+ pattrib->priority = 0; -+ pattrib->hdrlen = WLAN_HDR_A3_LEN + a4_shift; -+ } -+ -+ if (pattrib->order) /* HT-CTRL 11n */ -+ pattrib->hdrlen += 4; -+ -+ /* decache, drop duplicate recv packets */ -+ ret = recv_decache(precv_frame); -+ if (ret == _FAIL) -+ goto exit; -+ -+ if (!IS_MCAST(pattrib->ra)) { -+ -+ if (pattrib->qos) -+ precv_frame->u.hdr.preorder_ctrl = &psta->recvreorder_ctrl[pattrib->priority]; -+ -+ if (recv_ucast_pn_decache(precv_frame) == _FAIL) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_ucast_pn_decache return _FAIL for sta="MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(psta->cmn.mac_addr)); -+ #endif -+ ret = _FAIL; -+ goto exit; -+ } -+ } else { -+ if (recv_bcast_pn_decache(precv_frame) == _FAIL) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recv_bcast_pn_decache return _FAIL for sta="MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(psta->cmn.mac_addr)); -+ #endif -+ ret = _FAIL; -+ goto exit; -+ } -+ } -+ -+ if (pattrib->privacy) { -+#ifdef CONFIG_TDLS -+ if ((psta->tdls_sta_state & TDLS_LINKED_STATE) && (psta->dot118021XPrivacy == _AES_)) -+ pattrib->encrypt = psta->dot118021XPrivacy; -+ else -+#endif /* CONFIG_TDLS */ -+ GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, IS_MCAST(pattrib->ra)); -+ -+ -+ SET_ICE_IV_LEN(pattrib->iv_len, pattrib->icv_len, pattrib->encrypt); -+ } else { -+ pattrib->encrypt = 0; -+ pattrib->iv_len = pattrib->icv_len = 0; -+ } -+ -+#ifdef CONFIG_RTW_MESH -+ if (!pattrib->amsdu -+ && pattrib->mesh_ctrl_present -+ && (!pattrib->encrypt || pattrib->bdecrypted)) -+ ret = rtw_mesh_rx_validate_mctrl_non_amsdu(adapter, precv_frame); -+#endif -+ -+exit: -+ return ret; -+} -+ -+static inline void dump_rx_packet(u8 *ptr) -+{ -+ int i; -+ -+ RTW_INFO("#############################\n"); -+ for (i = 0; i < 64; i = i + 8) -+ RTW_INFO("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr + i), -+ *(ptr + i + 1), *(ptr + i + 2) , *(ptr + i + 3) , *(ptr + i + 4), *(ptr + i + 5), *(ptr + i + 6), *(ptr + i + 7)); -+ RTW_INFO("#############################\n"); -+} -+ -+sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame); -+sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame) -+{ -+ /* shall check frame subtype, to / from ds, da, bssid */ -+ -+ /* then call check if rx seq/frag. duplicated. */ -+ -+ u8 type; -+ u8 subtype; -+ sint retval = _SUCCESS; -+ -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct recv_priv *precvpriv = &adapter->recvpriv; -+ -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ u8 ver = (unsigned char)(*ptr) & 0x3 ; -+#ifdef CONFIG_FIND_BEST_CHANNEL -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+#endif -+ -+#ifdef CONFIG_TDLS -+ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; -+#endif /* CONFIG_TDLS */ -+#ifdef CONFIG_WAPI_SUPPORT -+ PRT_WAPI_T pWapiInfo = &adapter->wapiInfo; -+ struct recv_frame_hdr *phdr = &precv_frame->u.hdr; -+ u8 wai_pkt = 0; -+ u16 sc; -+ u8 external_len = 0; -+#endif -+ -+ -+#ifdef CONFIG_FIND_BEST_CHANNEL -+ if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { -+ int ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, rtw_get_oper_ch(adapter)); -+ if (ch_set_idx >= 0) -+ rfctl->channel_set[ch_set_idx].rx_count++; -+ } -+#endif -+ -+#ifdef CONFIG_TDLS -+ if (ptdlsinfo->ch_sensing == 1 && ptdlsinfo->cur_channel != 0) -+ ptdlsinfo->collect_pkt_num[ptdlsinfo->cur_channel - 1]++; -+#endif /* CONFIG_TDLS */ -+ -+#ifdef RTK_DMP_PLATFORM -+ if (0) { -+ RTW_INFO("++\n"); -+ { -+ int i; -+ for (i = 0; i < 64; i = i + 8) -+ RTW_INFO("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:", *(ptr + i), -+ *(ptr + i + 1), *(ptr + i + 2) , *(ptr + i + 3) , *(ptr + i + 4), *(ptr + i + 5), *(ptr + i + 6), *(ptr + i + 7)); -+ -+ } -+ RTW_INFO("--\n"); -+ } -+#endif /* RTK_DMP_PLATFORM */ -+ -+ /* add version chk */ -+ if (ver != 0) { -+ retval = _FAIL; -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_ver_err); -+ goto exit; -+ } -+ -+ type = GetFrameType(ptr); -+ subtype = get_frame_sub_type(ptr); /* bit(7)~bit(2) */ -+ -+ pattrib->to_fr_ds = get_tofr_ds(ptr); -+ -+ pattrib->frag_num = GetFragNum(ptr); -+ pattrib->seq_num = GetSequence(ptr); -+ -+ pattrib->pw_save = GetPwrMgt(ptr); -+ pattrib->mfrag = GetMFrag(ptr); -+ pattrib->mdata = GetMData(ptr); -+ pattrib->privacy = GetPrivacy(ptr); -+ pattrib->order = GetOrder(ptr); -+#ifdef CONFIG_WAPI_SUPPORT -+ sc = (pattrib->seq_num << 4) | pattrib->frag_num; -+#endif -+ -+#if 1 /* Dump rx packets */ -+ { -+ u8 bDumpRxPkt = 0; -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt)); -+ if (bDumpRxPkt == 1) /* dump all rx packets */ -+ dump_rx_packet(ptr); -+ else if ((bDumpRxPkt == 2) && (type == WIFI_MGT_TYPE)) -+ dump_rx_packet(ptr); -+ else if ((bDumpRxPkt == 3) && (type == WIFI_DATA_TYPE)) -+ dump_rx_packet(ptr); -+ } -+#endif -+ switch (type) { -+ case WIFI_MGT_TYPE: /* mgnt */ -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_mgmt); -+ retval = validate_recv_mgnt_frame(adapter, precv_frame); -+ if (retval == _FAIL) { -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_mgmt_err); -+ } -+ retval = _FAIL; /* only data frame return _SUCCESS */ -+ break; -+ case WIFI_CTRL_TYPE: /* ctrl */ -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_ctrl); -+ retval = validate_recv_ctrl_frame(adapter, precv_frame); -+ if (retval == _FAIL) { -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_ctrl_err); -+ } -+ retval = _FAIL; /* only data frame return _SUCCESS */ -+ break; -+ case WIFI_DATA_TYPE: /* data */ -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_data); -+#ifdef CONFIG_WAPI_SUPPORT -+ if (pattrib->qos) -+ external_len = 2; -+ else -+ external_len = 0; -+ -+ wai_pkt = rtw_wapi_is_wai_packet(adapter, ptr); -+ -+ phdr->bIsWaiPacket = wai_pkt; -+ -+ if (wai_pkt != 0) { -+ if (sc != adapter->wapiInfo.wapiSeqnumAndFragNum) -+ adapter->wapiInfo.wapiSeqnumAndFragNum = sc; -+ else { -+ retval = _FAIL; -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_wapi_seq_err); -+ break; -+ } -+ } else { -+ -+ if (rtw_wapi_drop_for_key_absent(adapter, get_addr2_ptr(ptr))) { -+ retval = _FAIL; -+ WAPI_TRACE(WAPI_RX, "drop for key absent for rx\n"); -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_wapi_key_err); -+ break; -+ } -+ } -+ -+#endif -+ -+ pattrib->qos = (subtype & BIT(7)) ? 1 : 0; -+ retval = validate_recv_data_frame(adapter, precv_frame); -+ if (retval == _FAIL) { -+ precvpriv->dbg_rx_drop_count++; -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_err); -+ } else if (retval == _SUCCESS) { -+ #ifdef DBG_RX_DUMP_EAP -+ if (!pattrib->encrypt || pattrib->bdecrypted) { -+ u8 bDumpRxPkt; -+ u16 eth_type; -+ -+ /* dump eapol */ -+ rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt)); -+ /* get ether_type */ -+ _rtw_memcpy(ð_type, ptr + pattrib->hdrlen + pattrib->iv_len + RATTRIB_GET_MCTRL_LEN(pattrib) + LLC_HEADER_SIZE, 2); -+ eth_type = ntohs((unsigned short) eth_type); -+ if ((bDumpRxPkt == 4) && (eth_type == 0x888e)) -+ dump_rx_packet(ptr); -+ } -+ #endif -+ } else -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_handled); -+ break; -+ default: -+ DBG_COUNTER(adapter->rx_logs.core_rx_pre_unknown); -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" fail! type=0x%x\n" -+ , FUNC_ADPT_ARG(adapter), type); -+ #endif -+ retval = _FAIL; -+ break; -+ } -+ -+exit: -+ -+ -+ return retval; -+} -+ -+/* Reture expected handling for LLC */ -+enum rtw_rx_llc_hdl rtw_recv_llc_parse(u8 *msdu, u16 msdu_len) -+{ -+ u16 eth_type; -+ -+ if (msdu_len < 8) -+ return RTW_RX_LLC_KEEP; -+ -+ eth_type = RTW_GET_BE16(msdu + SNAP_SIZE); -+ -+ if ((_rtw_memcmp(msdu, rtw_rfc1042_header, SNAP_SIZE) -+ && eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) -+ || _rtw_memcmp(msdu, rtw_bridge_tunnel_header, SNAP_SIZE)) { -+ /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ -+ return RTW_RX_LLC_REMOVE; -+ } else { -+ /* Leave Ethernet header part of hdr and full payload */ -+ return RTW_RX_LLC_KEEP; -+ } -+ -+ /* TODO: VLAN tagged */ -+} -+ -+/* remove the wlanhdr and add the eth_hdr */ -+sint wlanhdr_to_ethhdr(union recv_frame *precvframe, enum rtw_rx_llc_hdl llc_hdl) -+{ -+ u8 *ptr = get_recvframe_data(precvframe) ; /* point to frame_ctrl field */ -+ struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; -+ sint rmv_len; -+ u16 eth_type, len; -+ sint ret = _SUCCESS; -+ -+ if (pattrib->encrypt) -+ recvframe_pull_tail(precvframe, pattrib->icv_len); -+ -+ rmv_len = pattrib->hdrlen + pattrib->iv_len + RATTRIB_GET_MCTRL_LEN(pattrib) + (llc_hdl ? SNAP_SIZE : 0); -+ len = precvframe->u.hdr.len - rmv_len; -+ -+ ptr = recvframe_pull(precvframe, (rmv_len - sizeof(struct ethhdr) + (llc_hdl ? 2 : 0))); -+ if (!ptr) { -+ ret = _FAIL; -+ goto exiting; -+ } -+ -+ _rtw_memcpy(ptr, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(ptr + ETH_ALEN, pattrib->src, ETH_ALEN); -+ -+ if (!llc_hdl) { -+ len = htons(len); -+ _rtw_memcpy(ptr + 12, &len, 2); -+ } -+ -+ rtw_rframe_set_os_pkt(precvframe); -+ -+exiting: -+ return ret; -+} -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+#ifndef CONFIG_SDIO_RX_COPY -+#ifdef PLATFORM_LINUX -+static void recvframe_expand_pkt( -+ PADAPTER padapter, -+ union recv_frame *prframe) -+{ -+ struct recv_frame_hdr *pfhdr; -+ _pkt *ppkt; -+ u8 shift_sz; -+ u32 alloc_sz; -+ u8 *ptr; -+ -+ -+ pfhdr = &prframe->u.hdr; -+ -+ /* 6 is for IP header 8 bytes alignment in QoS packet case. */ -+ if (pfhdr->attrib.qos) -+ shift_sz = 6; -+ else -+ shift_sz = 0; -+ -+ /* for first fragment packet, need to allocate */ -+ /* (1536 + RXDESC_SIZE + drvinfo_sz) to reassemble packet */ -+ /* 8 is for skb->data 8 bytes alignment. -+ * alloc_sz = _RND(1536 + RXDESC_SIZE + pfhdr->attrib.drvinfosize + shift_sz + 8, 128); */ -+ alloc_sz = 1664; /* round (1536 + 24 + 32 + shift_sz + 8) to 128 bytes alignment */ -+ -+ /* 3 1. alloc new skb */ -+ /* prepare extra space for 4 bytes alignment */ -+ ppkt = rtw_skb_alloc(alloc_sz); -+ -+ if (!ppkt) -+ return; /* no way to expand */ -+ -+ /* 3 2. Prepare new skb to replace & release old skb */ -+ /* force ppkt->data at 8-byte alignment address */ -+ skb_reserve(ppkt, 8 - ((SIZE_PTR)ppkt->data & 7)); -+ /* force ip_hdr at 8-byte alignment address according to shift_sz */ -+ skb_reserve(ppkt, shift_sz); -+ -+ /* copy data to new pkt */ -+ ptr = skb_put(ppkt, pfhdr->len); -+ if (ptr) -+ _rtw_memcpy(ptr, pfhdr->rx_data, pfhdr->len); -+ -+ rtw_skb_free(pfhdr->pkt); -+ -+ /* attach new pkt to recvframe */ -+ pfhdr->pkt = ppkt; -+ pfhdr->rx_head = ppkt->head; -+ pfhdr->rx_data = ppkt->data; -+ pfhdr->rx_tail = skb_tail_pointer(ppkt); -+ pfhdr->rx_end = skb_end_pointer(ppkt); -+} -+#else /*!= PLATFORM_LINUX*/ -+#warning "recvframe_expand_pkt not implement, defrag may crash system" -+#endif -+#endif /*#ifndef CONFIG_SDIO_RX_COPY*/ -+#endif -+ -+/* perform defrag */ -+union recv_frame *recvframe_defrag(_adapter *adapter, _queue *defrag_q); -+union recv_frame *recvframe_defrag(_adapter *adapter, _queue *defrag_q) -+{ -+ _list *plist, *phead; -+ u8 *data, wlanhdr_offset; -+ u8 curfragnum; -+ struct recv_frame_hdr *pfhdr, *pnfhdr; -+ union recv_frame *prframe, *pnextrframe; -+ _queue *pfree_recv_queue; -+ -+ -+ curfragnum = 0; -+ pfree_recv_queue = &adapter->recvpriv.free_recv_queue; -+ -+ phead = get_list_head(defrag_q); -+ plist = get_next(phead); -+ prframe = LIST_CONTAINOR(plist, union recv_frame, u); -+ pfhdr = &prframe->u.hdr; -+ rtw_list_delete(&(prframe->u.list)); -+ -+ if (curfragnum != pfhdr->attrib.frag_num) { -+ /* the first fragment number must be 0 */ -+ /* free the whole queue */ -+ rtw_free_recvframe(prframe, pfree_recv_queue); -+ rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); -+ -+ return NULL; -+ } -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+#ifndef CONFIG_SDIO_RX_COPY -+ recvframe_expand_pkt(adapter, prframe); -+#endif -+#endif -+ -+ curfragnum++; -+ -+ plist = get_list_head(defrag_q); -+ -+ plist = get_next(plist); -+ -+ data = get_recvframe_data(prframe); -+ -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ pnextrframe = LIST_CONTAINOR(plist, union recv_frame , u); -+ pnfhdr = &pnextrframe->u.hdr; -+ -+ -+ /* check the fragment sequence (2nd ~n fragment frame) */ -+ -+ if (curfragnum != pnfhdr->attrib.frag_num) { -+ /* the fragment number must be increasing (after decache) */ -+ /* release the defrag_q & prframe */ -+ rtw_free_recvframe(prframe, pfree_recv_queue); -+ rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); -+ return NULL; -+ } -+ -+ curfragnum++; -+ -+ /* copy the 2nd~n fragment frame's payload to the first fragment */ -+ /* get the 2nd~last fragment frame's payload */ -+ -+ wlanhdr_offset = pnfhdr->attrib.hdrlen + pnfhdr->attrib.iv_len; -+ -+ recvframe_pull(pnextrframe, wlanhdr_offset); -+ -+ /* append to first fragment frame's tail (if privacy frame, pull the ICV) */ -+ recvframe_pull_tail(prframe, pfhdr->attrib.icv_len); -+ -+ /* memcpy */ -+ _rtw_memcpy(pfhdr->rx_tail, pnfhdr->rx_data, pnfhdr->len); -+ -+ recvframe_put(prframe, pnfhdr->len); -+ -+ pfhdr->attrib.icv_len = pnfhdr->attrib.icv_len; -+ plist = get_next(plist); -+ -+ }; -+ -+ /* free the defrag_q queue and return the prframe */ -+ rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); -+ -+ -+ -+ return prframe; -+} -+ -+/* check if need to defrag, if needed queue the frame to defrag_q */ -+union recv_frame *recvframe_chk_defrag(PADAPTER padapter, union recv_frame *precv_frame) -+{ -+ u8 ismfrag; -+ u8 fragnum; -+ u8 *psta_addr; -+ struct recv_frame_hdr *pfhdr; -+ struct sta_info *psta; -+ struct sta_priv *pstapriv; -+ _list *phead; -+ union recv_frame *prtnframe = NULL; -+ _queue *pfree_recv_queue, *pdefrag_q = NULL; -+ -+ -+ pstapriv = &padapter->stapriv; -+ -+ pfhdr = &precv_frame->u.hdr; -+ -+ pfree_recv_queue = &padapter->recvpriv.free_recv_queue; -+ -+ /* need to define struct of wlan header frame ctrl */ -+ ismfrag = pfhdr->attrib.mfrag; -+ fragnum = pfhdr->attrib.frag_num; -+ -+ psta_addr = pfhdr->attrib.ta; -+ psta = rtw_get_stainfo(pstapriv, psta_addr); -+ if (psta == NULL) { -+ u8 type = GetFrameType(pfhdr->rx_data); -+ if (type != WIFI_DATA_TYPE) { -+ psta = rtw_get_bcmc_stainfo(padapter); -+ if (psta) -+ pdefrag_q = &psta->sta_recvpriv.defrag_q; -+ } else -+ pdefrag_q = NULL; -+ } else -+ pdefrag_q = &psta->sta_recvpriv.defrag_q; -+ -+ if ((ismfrag == 0) && (fragnum == 0)) { -+ prtnframe = precv_frame;/* isn't a fragment frame */ -+ } -+ -+ if (ismfrag == 1) { -+ /* 0~(n-1) fragment frame */ -+ /* enqueue to defraf_g */ -+ if (pdefrag_q != NULL) { -+ if (fragnum == 0) { -+ /* the first fragment */ -+ if (_rtw_queue_empty(pdefrag_q) == _FALSE) { -+ /* free current defrag_q */ -+ rtw_free_recvframe_queue(pdefrag_q, pfree_recv_queue); -+ } -+ } -+ -+ -+ /* Then enqueue the 0~(n-1) fragment into the defrag_q */ -+ -+ /* _rtw_spinlock(&pdefrag_q->lock); */ -+ phead = get_list_head(pdefrag_q); -+ rtw_list_insert_tail(&pfhdr->list, phead); -+ /* _rtw_spinunlock(&pdefrag_q->lock); */ -+ -+ -+ prtnframe = NULL; -+ -+ } else { -+ /* can't find this ta's defrag_queue, so free this recv_frame */ -+ rtw_free_recvframe(precv_frame, pfree_recv_queue); -+ prtnframe = NULL; -+ } -+ -+ } -+ -+ if ((ismfrag == 0) && (fragnum != 0)) { -+ /* the last fragment frame */ -+ /* enqueue the last fragment */ -+ if (pdefrag_q != NULL) { -+ /* _rtw_spinlock(&pdefrag_q->lock); */ -+ phead = get_list_head(pdefrag_q); -+ rtw_list_insert_tail(&pfhdr->list, phead); -+ /* _rtw_spinunlock(&pdefrag_q->lock); */ -+ -+ /* call recvframe_defrag to defrag */ -+ precv_frame = recvframe_defrag(padapter, pdefrag_q); -+ prtnframe = precv_frame; -+ -+ } else { -+ /* can't find this ta's defrag_queue, so free this recv_frame */ -+ rtw_free_recvframe(precv_frame, pfree_recv_queue); -+ prtnframe = NULL; -+ } -+ -+ } -+ -+ -+ if ((prtnframe != NULL) && (prtnframe->u.hdr.attrib.privacy)) { -+ /* after defrag we must check tkip mic code */ -+ if (recvframe_chkmic(padapter, prtnframe) == _FAIL) { -+ rtw_free_recvframe(prtnframe, pfree_recv_queue); -+ prtnframe = NULL; -+ } -+ } -+ -+ -+ return prtnframe; -+ -+} -+ -+static int rtw_recv_indicatepkt_check(union recv_frame *rframe, u8 *ehdr_pos, u32 pkt_len) -+{ -+ _adapter *adapter = rframe->u.hdr.adapter; -+ struct recv_priv *recvpriv = &adapter->recvpriv; -+ struct ethhdr *ehdr = (struct ethhdr *)ehdr_pos; -+ struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; -+#ifdef DBG_IP_R_MONITOR -+ int i; -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+#endif/*DBG_IP_R_MONITOR*/ -+ enum eap_type eapol_type; -+ int ret = _FAIL; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (rtw_wapi_check_for_drop(adapter, rframe, ehdr_pos)) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" rtw_wapi_check_for_drop\n" -+ , FUNC_ADPT_ARG(adapter)); -+ #endif -+ goto exit; -+ } -+#endif -+ -+ if (rframe->u.hdr.psta) -+ rtw_st_ctl_rx(rframe->u.hdr.psta, ehdr_pos); -+ -+ if (ntohs(ehdr->h_proto) == 0x888e) { -+ eapol_type = parsing_eapol_packet(adapter, ehdr_pos + ETH_HLEN, rframe->u.hdr.psta, 0); -+ if ((eapol_type == EAPOL_1_4 || eapol_type == EAPOL_3_4) && pattrib->encrypt == 0) { -+ rframe->u.hdr.psta->resp_nonenc_eapol_key_starttime = rtw_get_current_time(); -+ RTW_INFO("Receive unencrypted eapol key\n"); -+ } -+ } -+#ifdef DBG_ARP_DUMP -+ else if (ntohs(ehdr->h_proto) == ETH_P_ARP) -+ dump_arp_pkt(RTW_DBGDUMP, ehdr->h_dest, ehdr->h_source, ehdr_pos + ETH_HLEN, 0); -+#endif -+ -+ if (recvpriv->sink_udpport > 0) -+ rtw_sink_rtp_seq_dbg(adapter, ehdr_pos); -+ -+#ifdef DBG_UDP_PKT_LOSE_11AC -+ #define PAYLOAD_LEN_LOC_OF_IP_HDR 0x10 /*ethernet payload length location of ip header (DA + SA+eth_type+(version&hdr_len)) */ -+ -+ if (ntohs(ehdr->h_proto) == ETH_P_ARP) { -+ /* ARP Payload length will be 42bytes or 42+18(tailer)=60bytes*/ -+ if (pkt_len != 42 && pkt_len != 60) -+ RTW_INFO("Error !!%s,ARP Payload length %u not correct\n" , __func__ , pkt_len); -+ } else if (ntohs(ehdr->h_proto) == ETH_P_IP) { -+ if (be16_to_cpu(*((u16 *)(ehdr_pos + PAYLOAD_LEN_LOC_OF_IP_HDR))) != (pkt_len) - ETH_HLEN) { -+ RTW_INFO("Error !!%s,Payload length not correct\n" , __func__); -+ RTW_INFO("%s, IP header describe Total length=%u\n" , __func__ , be16_to_cpu(*((u16 *)(ehdr_pos + PAYLOAD_LEN_LOC_OF_IP_HDR)))); -+ RTW_INFO("%s, Pkt real length=%u\n" , __func__ , (pkt_len) - ETH_HLEN); -+ } -+ } -+#endif -+ -+#ifdef DBG_IP_R_MONITOR -+ #define LEN_ARP_OP_HDR 7 /*ARP OERATION */ -+ if (ntohs(ehdr->h_proto) == ETH_P_ARP) { -+ -+ if(check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE){ -+ if(ehdr_pos[ETHERNET_HEADER_SIZE+LEN_ARP_OP_HDR] == 2) { -+ -+ RTW_INFO("%s,[DBG_ARP] Rx ARP RSP Packet;SeqNum = %d !\n", -+ __FUNCTION__, pattrib->seq_num); -+ -+ dump_arp_pkt(RTW_DBGDUMP, ehdr->h_dest, ehdr->h_source, ehdr_pos + ETH_HLEN, 0); -+ -+ } -+ } -+ } -+#endif/*DBG_IP_R_MONITOR*/ -+ -+#ifdef CONFIG_AUTO_AP_MODE -+ if (ntohs(ehdr->h_proto) == 0x8899) -+ rtw_auto_ap_rx_msg_dump(adapter, rframe, ehdr_pos); -+#endif -+ -+ ret = _SUCCESS; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+exit: -+#endif -+ return ret; -+} -+ -+#if defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) -+static void recv_free_fwd_resource(_adapter *adapter, struct xmit_frame *fwd_frame, _list *b2u_list) -+{ -+ struct xmit_priv *xmitpriv = &adapter->xmitpriv; -+ -+ if (fwd_frame) -+ rtw_free_xmitframe(xmitpriv, fwd_frame); -+ -+#if CONFIG_RTW_DATA_BMC_TO_UC -+ if (!rtw_is_list_empty(b2u_list)) { -+ struct xmit_frame *b2uframe; -+ _list *list; -+ -+ list = get_next(b2u_list); -+ while (rtw_end_of_queue_search(b2u_list, list) == _FALSE) { -+ b2uframe = LIST_CONTAINOR(list, struct xmit_frame, list); -+ list = get_next(list); -+ rtw_list_delete(&b2uframe->list); -+ rtw_free_xmitframe(xmitpriv, b2uframe); -+ } -+ } -+#endif -+} -+ -+static void recv_fwd_pkt_hdl(_adapter *adapter, _pkt *pkt -+ , u8 act, struct xmit_frame *fwd_frame, _list *b2u_list) -+{ -+ struct xmit_priv *xmitpriv = &adapter->xmitpriv; -+ _pkt *fwd_pkt = pkt; -+ -+ if (act & RTW_RX_MSDU_ACT_INDICATE) { -+ fwd_pkt = rtw_os_pkt_copy(pkt); -+ if (!fwd_pkt) { -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s rtw_os_pkt_copy fail\n", __func__); -+ #endif -+ recv_free_fwd_resource(adapter, fwd_frame, b2u_list); -+ goto exit; -+ } -+ } -+ -+#if CONFIG_RTW_DATA_BMC_TO_UC -+ if (!rtw_is_list_empty(b2u_list)) { -+ _list *list = get_next(b2u_list); -+ struct xmit_frame *b2uframe; -+ -+ while (rtw_end_of_queue_search(b2u_list, list) == _FALSE) { -+ b2uframe = LIST_CONTAINOR(list, struct xmit_frame, list); -+ list = get_next(list); -+ rtw_list_delete(&b2uframe->list); -+ -+ if (!fwd_frame && rtw_is_list_empty(b2u_list)) /* the last fwd_pkt */ -+ b2uframe->pkt = fwd_pkt; -+ else -+ b2uframe->pkt = rtw_os_pkt_copy(fwd_pkt); -+ if (!b2uframe->pkt) { -+ rtw_free_xmitframe(xmitpriv, b2uframe); -+ continue; -+ } -+ -+ rtw_xmit_posthandle(adapter, b2uframe, b2uframe->pkt); -+ } -+ } -+#endif -+ -+ if (fwd_frame) { -+ fwd_frame->pkt = fwd_pkt; -+ if (rtw_xmit_posthandle(adapter, fwd_frame, fwd_pkt) < 0) { -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s rtw_xmit_posthandle fail\n", __func__); -+ #endif -+ xmitpriv->tx_drop++; -+ } -+ } -+ -+exit: -+ return; -+} -+#endif /* defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) */ -+ -+int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe) -+{ -+ struct rx_pkt_attrib *rattrib = &prframe->u.hdr.attrib; -+ int a_len, padding_len; -+ u16 nSubframe_Length; -+ u8 nr_subframes, i; -+ u8 *pdata; -+ _pkt *sub_pkt, *subframes[MAX_SUBFRAME_COUNT]; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ _queue *pfree_recv_queue = &(precvpriv->free_recv_queue); -+ const u8 *da, *sa; -+ int act; -+#if defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) -+ struct xmit_frame *fwd_frame; -+ _list b2u_list; -+#endif -+ enum rtw_rx_llc_hdl llc_hdl; -+ u8 mctrl_len = 0; -+ int ret = _SUCCESS; -+ -+ nr_subframes = 0; -+ -+ recvframe_pull(prframe, rattrib->hdrlen); -+ -+ if (rattrib->iv_len > 0) -+ recvframe_pull(prframe, rattrib->iv_len); -+ if (rattrib->encrypt) -+ recvframe_pull_tail(prframe, rattrib->icv_len); -+ -+ a_len = prframe->u.hdr.len; -+ pdata = prframe->u.hdr.rx_data; -+ -+ while (a_len > ETH_HLEN) { -+ /* Offset 12 denote 2 mac address */ -+ nSubframe_Length = RTW_GET_BE16(pdata + 12); -+ if (a_len < (ETHERNET_HEADER_SIZE + nSubframe_Length)) { -+ RTW_INFO("nRemain_Length is %d and nSubframe_Length is : %d\n", a_len, nSubframe_Length); -+ break; -+ } -+ -+ act = RTW_RX_MSDU_ACT_INDICATE; -+ #if defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) -+ fwd_frame = NULL; -+ #endif -+ -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ u8 *mda = pdata, *msa = pdata + ETH_ALEN; -+ struct rtw_ieee80211s_hdr *mctrl = (struct rtw_ieee80211s_hdr *)(pdata + ETH_HLEN); -+ int v_ret; -+ -+ v_ret = rtw_mesh_rx_data_validate_mctrl(padapter, prframe -+ , mctrl, mda, msa, &mctrl_len, &da, &sa); -+ if (v_ret != _SUCCESS) -+ goto move_to_next; -+ -+ llc_hdl = rtw_recv_llc_parse(pdata + ETH_HLEN + mctrl_len, nSubframe_Length - mctrl_len); -+ act = rtw_mesh_rx_msdu_act_check(prframe -+ , mda, msa, da, sa, mctrl -+ , pdata + ETH_HLEN + mctrl_len, llc_hdl -+ , &fwd_frame, &b2u_list); -+ } else -+ #endif -+ { -+ da = pdata; -+ sa = pdata + ETH_ALEN; -+ llc_hdl = rtw_recv_llc_parse(pdata + ETH_HLEN, nSubframe_Length); -+ #ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(padapter)) { -+ act = rtw_ap_rx_msdu_act_check(prframe, da, sa -+ , pdata + ETH_HLEN, llc_hdl, &fwd_frame, &b2u_list); -+ } else -+ #endif -+ if (MLME_IS_STA(padapter)) -+ act = rtw_sta_rx_amsdu_act_check(prframe, da, sa); -+ } -+ -+ if (!act) -+ goto move_to_next; -+ -+ rtw_led_rx_control(padapter, da); -+ -+ sub_pkt = rtw_os_alloc_msdu_pkt(prframe, da, sa -+ , pdata + ETH_HLEN + mctrl_len, nSubframe_Length - mctrl_len, llc_hdl); -+ if (sub_pkt == NULL) { -+ if (act & RTW_RX_MSDU_ACT_INDICATE) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME %s rtw_os_alloc_msdu_pkt fail\n", __func__); -+ #endif -+ } -+ #if defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) -+ if (act & RTW_RX_MSDU_ACT_FORWARD) { -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s rtw_os_alloc_msdu_pkt fail\n", __func__); -+ #endif -+ recv_free_fwd_resource(padapter, fwd_frame, &b2u_list); -+ } -+ #endif -+ break; -+ } -+ -+ #if defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) -+ if (act & RTW_RX_MSDU_ACT_FORWARD) { -+ recv_fwd_pkt_hdl(padapter, sub_pkt, act, fwd_frame, &b2u_list); -+ if (!(act & RTW_RX_MSDU_ACT_INDICATE)) -+ goto move_to_next; -+ } -+ #endif -+ -+ if (rtw_recv_indicatepkt_check(prframe, rtw_os_pkt_data(sub_pkt), rtw_os_pkt_len(sub_pkt)) == _SUCCESS) -+ subframes[nr_subframes++] = sub_pkt; -+ else -+ rtw_os_pkt_free(sub_pkt); -+ -+move_to_next: -+ /* move the data point to data content */ -+ pdata += ETH_HLEN; -+ a_len -= ETH_HLEN; -+ -+ if (nr_subframes >= MAX_SUBFRAME_COUNT) { -+ RTW_WARN("ParseSubframe(): Too many Subframes! Packets dropped!\n"); -+ break; -+ } -+ -+ pdata += nSubframe_Length; -+ a_len -= nSubframe_Length; -+ if (a_len != 0) { -+ padding_len = 4 - ((nSubframe_Length + ETH_HLEN) & (4 - 1)); -+ if (padding_len == 4) -+ padding_len = 0; -+ -+ if (a_len < padding_len) { -+ RTW_INFO("ParseSubframe(): a_len < padding_len !\n"); -+ break; -+ } -+ pdata += padding_len; -+ a_len -= padding_len; -+ } -+ } -+ -+ for (i = 0; i < nr_subframes; i++) { -+ sub_pkt = subframes[i]; -+ -+ /* Indicat the packets to upper layer */ -+ if (sub_pkt) -+ rtw_os_recv_indicate_pkt(padapter, sub_pkt, prframe); -+ } -+ -+ prframe->u.hdr.len = 0; -+ rtw_free_recvframe(prframe, pfree_recv_queue);/* free this recv_frame */ -+ -+ return ret; -+} -+ -+static int recv_process_mpdu(_adapter *padapter, union recv_frame *prframe) -+{ -+ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; -+ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; -+ int ret; -+ -+ if (pattrib->amsdu) { -+ ret = amsdu_to_msdu(padapter, prframe); -+ if (ret != _SUCCESS) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" amsdu_to_msdu fail\n" -+ , FUNC_ADPT_ARG(padapter)); -+ #endif -+ rtw_free_recvframe(prframe, pfree_recv_queue); -+ goto exit; -+ } -+ } else { -+ u8 *msdu = get_recvframe_data(prframe) -+ + pattrib->hdrlen + pattrib->iv_len + RATTRIB_GET_MCTRL_LEN(pattrib); -+ u16 msdu_len = prframe->u.hdr.len -+ - pattrib->hdrlen - pattrib->iv_len - RATTRIB_GET_MCTRL_LEN(pattrib) -+ - (pattrib->encrypt ? pattrib->icv_len : 0); -+ enum rtw_rx_llc_hdl llc_hdl = rtw_recv_llc_parse(msdu, msdu_len); -+ int act = RTW_RX_MSDU_ACT_INDICATE; -+ -+ #if defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) -+ struct xmit_frame *fwd_frame = NULL; -+ _list b2u_list; -+ -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ if (pattrib->mesh_ctrl_present) -+ act = rtw_mesh_rx_msdu_act_check(prframe -+ , pattrib->mda, pattrib->msa -+ , pattrib->dst, pattrib->src -+ , (struct rtw_ieee80211s_hdr *)(msdu - RATTRIB_GET_MCTRL_LEN(pattrib)) -+ , msdu, llc_hdl -+ , &fwd_frame, &b2u_list); -+ } else -+ #endif -+ if (MLME_IS_AP(padapter)) -+ act = rtw_ap_rx_msdu_act_check(prframe, pattrib->dst, pattrib->src -+ , msdu, llc_hdl, &fwd_frame, &b2u_list); -+ #endif -+ -+ #if defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) -+ if (!act) { -+ rtw_free_recvframe(prframe, pfree_recv_queue); -+ ret = _FAIL; -+ goto exit; -+ } -+ #endif -+ -+ rtw_led_rx_control(padapter, pattrib->dst); -+ -+ ret = wlanhdr_to_ethhdr(prframe, llc_hdl); -+ if (ret != _SUCCESS) { -+ if (act & RTW_RX_MSDU_ACT_INDICATE) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" wlanhdr_to_ethhdr: drop pkt\n" -+ , FUNC_ADPT_ARG(padapter)); -+ #endif -+ } -+ #if defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) -+ if (act & RTW_RX_MSDU_ACT_FORWARD) { -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s wlanhdr_to_ethhdr fail\n", __func__); -+ #endif -+ recv_free_fwd_resource(padapter, fwd_frame, &b2u_list); -+ } -+ #endif -+ rtw_free_recvframe(prframe, pfree_recv_queue); -+ goto exit; -+ } -+ -+ #if defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) -+ if (act & RTW_RX_MSDU_ACT_FORWARD) { -+ recv_fwd_pkt_hdl(padapter, prframe->u.hdr.pkt, act, fwd_frame, &b2u_list); -+ if (!(act & RTW_RX_MSDU_ACT_INDICATE)) { -+ prframe->u.hdr.pkt = NULL; -+ rtw_free_recvframe(prframe, pfree_recv_queue); -+ goto exit; -+ } -+ } -+ #endif -+ -+ if (!RTW_CANNOT_RUN(padapter)) { -+ ret = rtw_recv_indicatepkt_check(prframe -+ , get_recvframe_data(prframe), get_recvframe_len(prframe)); -+ if (ret != _SUCCESS) { -+ rtw_free_recvframe(prframe, pfree_recv_queue); -+ goto exit; -+ } -+ -+ /* indicate this recv_frame */ -+ ret = rtw_recv_indicatepkt(padapter, prframe); -+ if (ret != _SUCCESS) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" rtw_recv_indicatepkt fail!\n" -+ , FUNC_ADPT_ARG(padapter)); -+ #endif -+ goto exit; -+ } -+ } else { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" DS:%u SR:%u\n" -+ , FUNC_ADPT_ARG(padapter) -+ , rtw_is_drv_stopped(padapter) -+ , rtw_is_surprise_removed(padapter)); -+ #endif -+ ret = _SUCCESS; /* don't count as packet drop */ -+ rtw_free_recvframe(prframe, pfree_recv_queue); -+ } -+ } -+ -+exit: -+ return ret; -+} -+ -+#if defined(CONFIG_80211N_HT) && defined(CONFIG_RECV_REORDERING_CTRL) -+static int check_indicate_seq(struct recv_reorder_ctrl *preorder_ctrl, u16 seq_num) -+{ -+ PADAPTER padapter = preorder_ctrl->padapter; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ u8 wsize = preorder_ctrl->wsize_b; -+ u16 wend; -+ -+ /* Rx Reorder initialize condition. */ -+ if (preorder_ctrl->indicate_seq == 0xFFFF) { -+ preorder_ctrl->indicate_seq = seq_num; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" tid:%u SN_INIT indicate_seq:%d, seq_num:%d\n" -+ , FUNC_ADPT_ARG(padapter), preorder_ctrl->tid, preorder_ctrl->indicate_seq, seq_num); -+ #endif -+ } -+ wend = (preorder_ctrl->indicate_seq + wsize - 1) & 0xFFF; /* % 4096; */ -+ -+ /* Drop out the packet which SeqNum is smaller than WinStart */ -+ if (SN_LESS(seq_num, preorder_ctrl->indicate_seq)) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO(FUNC_ADPT_FMT" tid:%u indicate_seq:%d > seq_num:%d\n" -+ , FUNC_ADPT_ARG(padapter), preorder_ctrl->tid, preorder_ctrl->indicate_seq, seq_num); -+ #endif -+ return _FALSE; -+ } -+ -+ /* -+ * Sliding window manipulation. Conditions includes: -+ * 1. Incoming SeqNum is equal to WinStart =>Window shift 1 -+ * 2. Incoming SeqNum is larger than the WinEnd => Window shift N -+ */ -+ if (SN_EQUAL(seq_num, preorder_ctrl->indicate_seq)) { -+ preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1) & 0xFFF; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" tid:%u SN_EQUAL indicate_seq:%d, seq_num:%d\n" -+ , FUNC_ADPT_ARG(padapter), preorder_ctrl->tid, preorder_ctrl->indicate_seq, seq_num); -+ #endif -+ -+ } else if (SN_LESS(wend, seq_num)) { -+ /* boundary situation, when seq_num cross 0xFFF */ -+ if (seq_num >= (wsize - 1)) -+ preorder_ctrl->indicate_seq = seq_num + 1 - wsize; -+ else -+ preorder_ctrl->indicate_seq = 0xFFF - (wsize - (seq_num + 1)) + 1; -+ -+ precvpriv->dbg_rx_ampdu_window_shift_cnt++; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" tid:%u SN_LESS(wend, seq_num) indicate_seq:%d, seq_num:%d\n" -+ , FUNC_ADPT_ARG(padapter), preorder_ctrl->tid, preorder_ctrl->indicate_seq, seq_num); -+ #endif -+ } -+ -+ return _TRUE; -+} -+ -+static int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, union recv_frame *prframe) -+{ -+ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; -+ _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; -+ _list *phead, *plist; -+ union recv_frame *pnextrframe; -+ struct rx_pkt_attrib *pnextattrib; -+ -+ /* DbgPrint("+enqueue_reorder_recvframe()\n"); */ -+ -+ /* _enter_critical_ex(&ppending_recvframe_queue->lock, &irql); */ -+ /* _rtw_spinlock_ex(&ppending_recvframe_queue->lock); */ -+ -+ -+ phead = get_list_head(ppending_recvframe_queue); -+ plist = get_next(phead); -+ -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ pnextrframe = LIST_CONTAINOR(plist, union recv_frame, u); -+ pnextattrib = &pnextrframe->u.hdr.attrib; -+ -+ if (SN_LESS(pnextattrib->seq_num, pattrib->seq_num)) -+ plist = get_next(plist); -+ else if (SN_EQUAL(pnextattrib->seq_num, pattrib->seq_num)) { -+ /* Duplicate entry is found!! Do not insert current entry. */ -+ -+ /* _exit_critical_ex(&ppending_recvframe_queue->lock, &irql); */ -+ -+ return _FALSE; -+ } else -+ break; -+ -+ /* DbgPrint("enqueue_reorder_recvframe():while\n"); */ -+ -+ } -+ -+ -+ /* _enter_critical_ex(&ppending_recvframe_queue->lock, &irql); */ -+ /* _rtw_spinlock_ex(&ppending_recvframe_queue->lock); */ -+ -+ rtw_list_delete(&(prframe->u.hdr.list)); -+ -+ rtw_list_insert_tail(&(prframe->u.hdr.list), plist); -+ -+ /* _rtw_spinunlock_ex(&ppending_recvframe_queue->lock); */ -+ /* _exit_critical_ex(&ppending_recvframe_queue->lock, &irql); */ -+ -+ -+ return _TRUE; -+ -+} -+ -+static void recv_indicatepkts_pkt_loss_cnt(_adapter *padapter, u64 prev_seq, u64 current_seq) -+{ -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ -+ if (current_seq < prev_seq) { -+ precvpriv->dbg_rx_ampdu_loss_count += (4096 + current_seq - prev_seq); -+ precvpriv->rx_drop += (4096 + current_seq - prev_seq); -+ } else { -+ precvpriv->dbg_rx_ampdu_loss_count += (current_seq - prev_seq); -+ precvpriv->rx_drop += (current_seq - prev_seq); -+ } -+} -+ -+static int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *preorder_ctrl, int bforced) -+{ -+ /* _irqL irql; */ -+ _list *phead, *plist; -+ union recv_frame *prframe; -+ struct rx_pkt_attrib *pattrib; -+ /* u8 index = 0; */ -+ int bPktInBuf = _FALSE; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; -+ -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_indicate_in_oder); -+ -+ /* DbgPrint("+recv_indicatepkts_in_order\n"); */ -+ -+ /* _enter_critical_ex(&ppending_recvframe_queue->lock, &irql); */ -+ /* _rtw_spinlock_ex(&ppending_recvframe_queue->lock); */ -+ -+ phead = get_list_head(ppending_recvframe_queue); -+ plist = get_next(phead); -+ -+#if 0 -+ /* Check if there is any other indication thread running. */ -+ if (pTS->RxIndicateState == RXTS_INDICATE_PROCESSING) -+ return; -+#endif -+ -+ /* Handling some condition for forced indicate case. */ -+ if (bforced == _TRUE) { -+ precvpriv->dbg_rx_ampdu_forced_indicate_count++; -+ if (rtw_is_list_empty(phead)) { -+ /* _exit_critical_ex(&ppending_recvframe_queue->lock, &irql); */ -+ /* _rtw_spinunlock_ex(&ppending_recvframe_queue->lock); */ -+ return _TRUE; -+ } -+ -+ prframe = LIST_CONTAINOR(plist, union recv_frame, u); -+ pattrib = &prframe->u.hdr.attrib; -+ -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" tid:%u FORCE indicate_seq:%d, seq_num:%d\n" -+ , FUNC_ADPT_ARG(padapter), preorder_ctrl->tid, preorder_ctrl->indicate_seq, pattrib->seq_num); -+ #endif -+ recv_indicatepkts_pkt_loss_cnt(padapter, preorder_ctrl->indicate_seq, pattrib->seq_num); -+ preorder_ctrl->indicate_seq = pattrib->seq_num; -+ } -+ -+ /* Prepare indication list and indication. */ -+ /* Check if there is any packet need indicate. */ -+ while (!rtw_is_list_empty(phead)) { -+ -+ prframe = LIST_CONTAINOR(plist, union recv_frame, u); -+ pattrib = &prframe->u.hdr.attrib; -+ -+ if (!SN_LESS(preorder_ctrl->indicate_seq, pattrib->seq_num)) { -+ -+#if 0 -+ /* This protect buffer from overflow. */ -+ if (index >= REORDER_WIN_SIZE) { -+ RT_ASSERT(FALSE, ("IndicateRxReorderList(): Buffer overflow!!\n")); -+ bPktInBuf = TRUE; -+ break; -+ } -+#endif -+ -+ plist = get_next(plist); -+ rtw_list_delete(&(prframe->u.hdr.list)); -+ -+ if (SN_EQUAL(preorder_ctrl->indicate_seq, pattrib->seq_num)) { -+ preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1) & 0xFFF; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" tid:%u SN_EQUAL indicate_seq:%d, seq_num:%d\n" -+ , FUNC_ADPT_ARG(padapter), preorder_ctrl->tid, preorder_ctrl->indicate_seq, pattrib->seq_num); -+ #endif -+ } -+ -+#if 0 -+ index++; -+ if (index == 1) { -+ /* Cancel previous pending timer. */ -+ /* PlatformCancelTimer(Adapter, &pTS->RxPktPendingTimer); */ -+ if (bforced != _TRUE) { -+ /* RTW_INFO("_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);\n"); */ -+ _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); -+ } -+ } -+#endif -+ -+ /* Set this as a lock to make sure that only one thread is indicating packet. */ -+ /* pTS->RxIndicateState = RXTS_INDICATE_PROCESSING; */ -+ -+ /* Indicate packets */ -+ /* RT_ASSERT((index<=REORDER_WIN_SIZE), ("RxReorderIndicatePacket(): Rx Reorder buffer full!!\n")); */ -+ -+ -+ /* indicate this recv_frame */ -+ /* DbgPrint("recv_indicatepkts_in_order, indicate_seq=%d, seq_num=%d\n", precvpriv->indicate_seq, pattrib->seq_num); */ -+ if (recv_process_mpdu(padapter, prframe) != _SUCCESS) -+ precvpriv->dbg_rx_drop_count++; -+ -+ /* Update local variables. */ -+ bPktInBuf = _FALSE; -+ -+ } else { -+ bPktInBuf = _TRUE; -+ break; -+ } -+ -+ /* DbgPrint("recv_indicatepkts_in_order():while\n"); */ -+ -+ } -+ -+ /* _rtw_spinunlock_ex(&ppending_recvframe_queue->lock); */ -+ /* _exit_critical_ex(&ppending_recvframe_queue->lock, &irql); */ -+ -+#if 0 -+ /* Release the indication lock and set to new indication step. */ -+ if (bPktInBuf) { -+ /* Set new pending timer. */ -+ /* pTS->RxIndicateState = RXTS_INDICATE_REORDER; */ -+ /* PlatformSetTimer(Adapter, &pTS->RxPktPendingTimer, pHTInfo->RxReorderPendingTime); */ -+ -+ _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); -+ } else { -+ /* pTS->RxIndicateState = RXTS_INDICATE_IDLE; */ -+ } -+#endif -+ /* _exit_critical_ex(&ppending_recvframe_queue->lock, &irql); */ -+ -+ /* return _TRUE; */ -+ return bPktInBuf; -+ -+} -+ -+static int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe) -+{ -+ _irqL irql; -+ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; -+ struct recv_reorder_ctrl *preorder_ctrl = prframe->u.hdr.preorder_ctrl; -+ _queue *ppending_recvframe_queue = preorder_ctrl ? &preorder_ctrl->pending_recvframe_queue : NULL; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ -+ if (!pattrib->qos || !preorder_ctrl || preorder_ctrl->enable == _FALSE) -+ goto _success_exit; -+ -+ -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_indicate_reoder); -+ -+ _enter_critical_bh(&ppending_recvframe_queue->lock, &irql); -+ -+ -+ if(rtw_test_and_clear_bit(RTW_RECV_ACK_OR_TIMEOUT, &preorder_ctrl->rec_abba_rsp_ack)) -+ preorder_ctrl->indicate_seq = 0xFFFF; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ %s:preorder_ctrl->rec_abba_rsp_ack = %u,indicate_seq = %d\n" -+ , __func__ -+ , preorder_ctrl->rec_abba_rsp_ack -+ , preorder_ctrl->indicate_seq); -+ #endif -+ -+ /* s2. check if winstart_b(indicate_seq) needs to been updated */ -+ if (!check_indicate_seq(preorder_ctrl, pattrib->seq_num)) { -+ precvpriv->dbg_rx_ampdu_drop_count++; -+ /* pHTInfo->RxReorderDropCounter++; */ -+ /* ReturnRFDList(Adapter, pRfd); */ -+ /* _exit_critical_ex(&ppending_recvframe_queue->lock, &irql); */ -+ /* return _FAIL; */ -+ -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" check_indicate_seq fail\n" -+ , FUNC_ADPT_ARG(padapter)); -+ #endif -+#if 0 -+ rtw_recv_indicatepkt(padapter, prframe); -+ -+ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); -+ -+ goto _success_exit; -+#else -+ goto _err_exit; -+#endif -+ } -+ -+ -+ /* s3. Insert all packet into Reorder Queue to maintain its ordering. */ -+ if (!enqueue_reorder_recvframe(preorder_ctrl, prframe)) { -+ /* DbgPrint("recv_indicatepkt_reorder, enqueue_reorder_recvframe fail!\n"); */ -+ /* _exit_critical_ex(&ppending_recvframe_queue->lock, &irql); */ -+ /* return _FAIL; */ -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" enqueue_reorder_recvframe fail\n" -+ , FUNC_ADPT_ARG(padapter)); -+ #endif -+ goto _err_exit; -+ } -+ -+ -+ /* s4. */ -+ /* Indication process. */ -+ /* After Packet dropping and Sliding Window shifting as above, we can now just indicate the packets */ -+ /* with the SeqNum smaller than latest WinStart and buffer other packets. */ -+ /* */ -+ /* For Rx Reorder condition: */ -+ /* 1. All packets with SeqNum smaller than WinStart => Indicate */ -+ /* 2. All packets with SeqNum larger than or equal to WinStart => Buffer it. */ -+ /* */ -+ -+ /* recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE); */ -+ if (recv_indicatepkts_in_order(padapter, preorder_ctrl, _FALSE) == _TRUE) { -+ if (!preorder_ctrl->bReorderWaiting) { -+ preorder_ctrl->bReorderWaiting = _TRUE; -+ _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); -+ } -+ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); -+ } else { -+ preorder_ctrl->bReorderWaiting = _FALSE; -+ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); -+ _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); -+ } -+ -+ return RTW_RX_HANDLED; -+ -+_success_exit: -+ -+ return _SUCCESS; -+ -+_err_exit: -+ -+ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); -+ -+ return _FAIL; -+} -+ -+ -+void rtw_reordering_ctrl_timeout_handler(void *pcontext) -+{ -+ _irqL irql; -+ struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)pcontext; -+ _adapter *padapter = NULL; -+ _queue *ppending_recvframe_queue = NULL; -+ -+ -+ if (preorder_ctrl == NULL) -+ return; -+ -+ padapter = preorder_ctrl->padapter; -+ if (RTW_CANNOT_RUN(padapter)) -+ return; -+ -+ ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; -+ -+ /* RTW_INFO("+rtw_reordering_ctrl_timeout_handler()=>\n"); */ -+ -+ _enter_critical_bh(&ppending_recvframe_queue->lock, &irql); -+ -+ preorder_ctrl->bReorderWaiting = _FALSE; -+ -+ if (recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE) == _TRUE) -+ _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); -+ -+ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); -+ -+} -+#endif /* defined(CONFIG_80211N_HT) && defined(CONFIG_RECV_REORDERING_CTRL) */ -+ -+static void recv_set_iseq_before_mpdu_process(union recv_frame *rframe, u16 seq_num, const char *caller) -+{ -+#if defined(CONFIG_80211N_HT) && defined(CONFIG_RECV_REORDERING_CTRL) -+ struct recv_reorder_ctrl *reorder_ctrl = rframe->u.hdr.preorder_ctrl; -+ -+ if (reorder_ctrl) { -+ reorder_ctrl->indicate_seq = seq_num; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ %s("ADPT_FMT")-B tid:%u indicate_seq:%d, seq_num:%d\n" -+ , caller, ADPT_ARG(reorder_ctrl->padapter) -+ , reorder_ctrl->tid, reorder_ctrl->indicate_seq, seq_num); -+ #endif -+ } -+#endif -+} -+ -+static void recv_set_iseq_after_mpdu_process(union recv_frame *rframe, u16 seq_num, const char *caller) -+{ -+#if defined(CONFIG_80211N_HT) && defined(CONFIG_RECV_REORDERING_CTRL) -+ struct recv_reorder_ctrl *reorder_ctrl = rframe->u.hdr.preorder_ctrl; -+ -+ if (reorder_ctrl) { -+ reorder_ctrl->indicate_seq = (reorder_ctrl->indicate_seq + 1) % 4096; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ %s("ADPT_FMT")-A tid:%u indicate_seq:%d, seq_num:%d\n" -+ , caller, ADPT_ARG(reorder_ctrl->padapter) -+ , reorder_ctrl->tid, reorder_ctrl->indicate_seq, seq_num); -+ #endif -+ } -+#endif -+} -+ -+#ifdef CONFIG_MP_INCLUDED -+int validate_mp_recv_frame(_adapter *adapter, union recv_frame *precv_frame) -+{ -+ int ret = _SUCCESS; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ u8 type, subtype; -+ struct mp_priv *pmppriv = &adapter->mppriv; -+ struct mp_tx *pmptx; -+ unsigned char *sa , *da, *bs; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ u32 i = 0; -+ u8 rtk_prefix[]={0x52, 0x65, 0x61, 0x6C, 0x4C, 0x6F, 0x76, 0x65, 0x54, 0x65, 0x6B}; -+ u8 *prx_data; -+ pmptx = &pmppriv->tx; -+ -+ -+ if (pmppriv->mplink_brx == _FALSE) { -+ -+ u8 bDumpRxPkt = 0; -+ type = GetFrameType(ptr); -+ subtype = get_frame_sub_type(ptr); /* bit(7)~bit(2) */ -+ -+ RTW_DBG("hdr len = %d iv_len=%d \n", pattrib->hdrlen , pattrib->iv_len); -+ prx_data = ptr + pattrib->hdrlen + pattrib->iv_len; -+ -+ for (i = 0; i < precv_frame->u.hdr.len; i++) { -+ if (precv_frame->u.hdr.len < (11 + i)) -+ break; -+ -+ if (_rtw_memcmp(prx_data + i, (void *)&rtk_prefix, 11) == _FALSE) { -+ bDumpRxPkt = 0; -+ RTW_DBG("prx_data = %02X != rtk_prefix[%d] = %02X \n", *(prx_data + i), i , rtk_prefix[i]); -+ } else { -+ bDumpRxPkt = 1; -+ RTW_DBG("prx_data = %02X = rtk_prefix[%d] = %02X \n", *(prx_data + i), i , rtk_prefix[i]); -+ break; -+ } -+ } -+ -+ if (bDumpRxPkt == 1) { /* dump all rx packets */ -+ int i; -+ RTW_INFO("############ type:0x%02x subtype:0x%02x #################\n", type, subtype); -+ -+ for (i = 0; i < precv_frame->u.hdr.len; i = i + 8) -+ RTW_INFO("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr + i), -+ *(ptr + i + 1), *(ptr + i + 2) , *(ptr + i + 3) , *(ptr + i + 4), *(ptr + i + 5), *(ptr + i + 6), *(ptr + i + 7)); -+ RTW_INFO("#############################\n"); -+ _rtw_memset(pmppriv->mplink_buf, '\0' , sizeof(pmppriv->mplink_buf)); -+ _rtw_memcpy(pmppriv->mplink_buf, ptr, precv_frame->u.hdr.len); -+ pmppriv->mplink_rx_len = precv_frame->u.hdr.len; -+ pmppriv->mplink_brx =_TRUE; -+ } -+ } -+ if (pmppriv->bloopback) { -+ if (_rtw_memcmp(ptr + 24, pmptx->buf + 24, precv_frame->u.hdr.len - 24) == _FALSE) { -+ RTW_INFO("Compare payload content Fail !!!\n"); -+ ret = _FAIL; -+ } -+ } -+ if (pmppriv->bSetRxBssid == _TRUE) { -+ -+ sa = get_addr2_ptr(ptr); -+ da = GetAddr1Ptr(ptr); -+ bs = GetAddr3Ptr(ptr); -+ type = GetFrameType(ptr); -+ subtype = get_frame_sub_type(ptr); /* bit(7)~bit(2) */ -+ -+ if (_rtw_memcmp(bs, adapter->mppriv.network_macaddr, ETH_ALEN) == _FALSE) -+ ret = _FAIL; -+ -+ RTW_DBG("############ type:0x%02x subtype:0x%02x #################\n", type, subtype); -+ RTW_DBG("A2 sa %02X:%02X:%02X:%02X:%02X:%02X \n", *(sa) , *(sa + 1), *(sa+ 2), *(sa + 3), *(sa + 4), *(sa + 5)); -+ RTW_DBG("A1 da %02X:%02X:%02X:%02X:%02X:%02X \n", *(da) , *(da + 1), *(da+ 2), *(da + 3), *(da + 4), *(da + 5)); -+ RTW_DBG("A3 bs %02X:%02X:%02X:%02X:%02X:%02X \n --------------------------\n", *(bs) , *(bs + 1), *(bs+ 2), *(bs + 3), *(bs + 4), *(bs + 5)); -+ } -+ -+ if (!adapter->mppriv.bmac_filter) -+ return ret; -+ -+ if (_rtw_memcmp(get_addr2_ptr(ptr), adapter->mppriv.mac_filter, ETH_ALEN) == _FALSE) -+ ret = _FAIL; -+ -+ return ret; -+} -+ -+static sint MPwlanhdr_to_ethhdr(union recv_frame *precvframe) -+{ -+ sint rmv_len; -+ u16 len; -+ u8 mcastheadermac[] = {0x01, 0x00, 0x5e}; -+ sint ret = _SUCCESS; -+ _adapter *adapter = precvframe->u.hdr.adapter; -+ -+ u8 *ptr = get_recvframe_data(precvframe) ; /* point to frame_ctrl field */ -+ struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; -+ enum rtw_rx_llc_hdl llc_hdl; -+ -+ -+ if (pattrib->encrypt) -+ recvframe_pull_tail(precvframe, pattrib->icv_len); -+ -+ llc_hdl = rtw_recv_llc_parse(ptr + pattrib->hdrlen + pattrib->iv_len -+ , precvframe->u.hdr.len - pattrib->hdrlen - pattrib->iv_len); -+ -+ rmv_len = pattrib->hdrlen + pattrib->iv_len + (llc_hdl ? SNAP_SIZE : 0); -+ len = precvframe->u.hdr.len - rmv_len; -+ -+ ptr = recvframe_pull(precvframe, (rmv_len - sizeof(struct ethhdr) + (llc_hdl ? 2 : 0))); -+ -+ _rtw_memcpy(ptr, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(ptr + ETH_ALEN, pattrib->src, ETH_ALEN); -+ -+ if (!llc_hdl) { -+ len = htons(len); -+ _rtw_memcpy(ptr + 12, &len, 2); -+ } -+ -+ -+ len = htons(pattrib->seq_num); -+ /* RTW_INFO("wlan seq = %d ,seq_num =%x\n",len,pattrib->seq_num); */ -+ _rtw_memcpy(ptr + 12, &len, 2); -+ if (adapter->mppriv.bRTWSmbCfg == _TRUE) { -+ /* if(_rtw_memcmp(mcastheadermac, pattrib->dst, 3) == _TRUE) */ /* SimpleConfig Dest. */ -+ /* _rtw_memcpy(ptr+ETH_ALEN, pattrib->bssid, ETH_ALEN); */ -+ -+ if (_rtw_memcmp(mcastheadermac, pattrib->bssid, 3) == _TRUE) /* SimpleConfig Dest. */ -+ _rtw_memcpy(ptr, pattrib->bssid, ETH_ALEN); -+ -+ } -+ -+ -+ return ret; -+ -+} -+ -+ -+int mp_recv_frame(_adapter *padapter, union recv_frame *rframe) -+{ -+ int ret = _SUCCESS; -+ struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; -+ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; -+#ifdef CONFIG_MP_INCLUDED -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mp_priv *pmppriv = &padapter->mppriv; -+#endif /* CONFIG_MP_INCLUDED */ -+ u8 type; -+ u8 *ptr = rframe->u.hdr.rx_data; -+ u8 *psa, *pda, *pbssid; -+ struct sta_info *psta = NULL; -+ DBG_COUNTER(padapter->rx_logs.core_rx_pre); -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) { /* &&(padapter->mppriv.check_mp_pkt == 0)) */ -+ if (pattrib->crc_err == 1) -+ padapter->mppriv.rx_crcerrpktcount++; -+ else { -+ if (_SUCCESS == validate_mp_recv_frame(padapter, rframe)) -+ padapter->mppriv.rx_pktcount++; -+ else -+ padapter->mppriv.rx_pktcount_filter_out++; -+ } -+ -+ if (pmppriv->rx_bindicatePkt == _FALSE) { -+ ret = _FAIL; -+ rtw_free_recvframe(rframe, pfree_recv_queue);/* free this recv_frame */ -+ goto exit; -+ } else { -+ type = GetFrameType(ptr); -+ pattrib->to_fr_ds = get_tofr_ds(ptr); -+ pattrib->frag_num = GetFragNum(ptr); -+ pattrib->seq_num = GetSequence(ptr); -+ pattrib->pw_save = GetPwrMgt(ptr); -+ pattrib->mfrag = GetMFrag(ptr); -+ pattrib->mdata = GetMData(ptr); -+ pattrib->privacy = GetPrivacy(ptr); -+ pattrib->order = GetOrder(ptr); -+ -+ if (type == WIFI_DATA_TYPE) { -+ pda = get_da(ptr); -+ psa = get_sa(ptr); -+ pbssid = get_hdr_bssid(ptr); -+ -+ _rtw_memcpy(pattrib->dst, pda, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, psa, ETH_ALEN); -+ _rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN); -+ -+ switch (pattrib->to_fr_ds) { -+ case 0: -+ _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); -+ ret = sta2sta_data_frame(padapter, rframe, &psta); -+ break; -+ case 1: -+ _rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); -+ ret = sta2ap_data_frame(padapter, rframe, &psta); -+ break; -+ case 2: -+ _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN); -+ ret = ap2sta_data_frame(padapter, rframe, &psta); -+ break; -+ case 3: -+ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, get_addr2_ptr(ptr), ETH_ALEN); -+ ret = _FAIL; -+ break; -+ default: -+ ret = _FAIL; -+ break; -+ } -+ -+ if (ret != _SUCCESS) { -+#ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" 2_data_frame fail: drop pkt\n" -+ , FUNC_ADPT_ARG(padapter)); -+#endif -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ ret = MPwlanhdr_to_ethhdr(rframe); -+ -+ if (ret != _SUCCESS) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" wlanhdr_to_ethhdr: drop pkt\n" -+ , FUNC_ADPT_ARG(padapter)); -+ #endif -+ ret = _FAIL; -+ goto exit; -+ } -+ if (!RTW_CANNOT_RUN(padapter)) { -+ /* indicate this recv_frame */ -+ ret = rtw_recv_indicatepkt(padapter, rframe); -+ if (ret != _SUCCESS) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" rtw_recv_indicatepkt fail!\n" -+ , FUNC_ADPT_ARG(padapter)); -+ #endif -+ ret = _FAIL; -+ goto exit; -+ } -+ } else { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" bDriverStopped(%s) OR bSurpriseRemoved(%s)\n" -+ , FUNC_ADPT_ARG(padapter) -+ , rtw_is_drv_stopped(padapter) ? "True" : "False" -+ , rtw_is_surprise_removed(padapter) ? "True" : "False"); -+ #endif -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ } -+ } -+ } -+exit: -+ rtw_free_recvframe(rframe, pfree_recv_queue);/* free this recv_frame */ -+ ret = _FAIL; -+ return ret; -+ -+} -+#endif -+ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) -+int recv_frame_monitor(_adapter *padapter, union recv_frame *rframe) -+{ -+ int ret = _SUCCESS; -+ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; -+ -+#ifdef CONFIG_WIFI_MONITOR -+ struct net_device *ndev = padapter->pnetdev; -+ _pkt *pskb = NULL; -+ -+ if (rframe == NULL) -+ goto exit; -+ -+ /* read skb information from recv frame */ -+ pskb = rframe->u.hdr.pkt; -+ pskb->len = rframe->u.hdr.len; -+ pskb->data = rframe->u.hdr.rx_data; -+ skb_set_tail_pointer(pskb, rframe->u.hdr.len); -+ -+ if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) { -+ /* fill radiotap header */ -+ if (rtw_fill_radiotap_hdr(padapter, &rframe->u.hdr.attrib, (u8 *)pskb) == _FAIL) { -+ ret = _FAIL; -+ goto exit; -+ } -+ } -+ -+ /* write skb information to recv frame */ -+ skb_reset_mac_header(pskb); -+ rframe->u.hdr.len = pskb->len; -+ rframe->u.hdr.rx_data = pskb->data; -+ rframe->u.hdr.rx_head = pskb->head; -+ rframe->u.hdr.rx_tail = skb_tail_pointer(pskb); -+ rframe->u.hdr.rx_end = skb_end_pointer(pskb); -+ -+ if (!RTW_CANNOT_RUN(padapter)) { -+ /* indicate this recv_frame */ -+ ret = rtw_recv_monitor(padapter, rframe); -+ } else -+ ret = _FAIL; -+ -+exit: -+#endif /* CONFIG_WIFI_MONITOR */ -+ -+ if (rframe) /* free this recv_frame */ -+ rtw_free_recvframe(rframe, pfree_recv_queue); -+ -+ return ret; -+} -+#endif -+int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) -+{ -+ int ret = _SUCCESS; -+#ifdef DBG_RX_COUNTER_DUMP -+ struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; -+#endif -+ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; -+ -+#ifdef DBG_RX_COUNTER_DUMP -+ if (padapter->dump_rx_cnt_mode & DUMP_DRV_RX_COUNTER) { -+ if (pattrib->crc_err == 1) -+ padapter->drv_rx_cnt_crcerror++; -+ else -+ padapter->drv_rx_cnt_ok++; -+ } -+#endif -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->registrypriv.mp_mode == 1 || padapter->mppriv.bRTWSmbCfg == _TRUE) { -+ mp_recv_frame(padapter, rframe); -+ ret = _FAIL; -+ goto exit; -+ } else -+#endif -+ { -+ /* check the frame crtl field and decache */ -+ ret = validate_recv_frame(padapter, rframe); -+ if (ret != _SUCCESS) { -+ rtw_free_recvframe(rframe, pfree_recv_queue);/* free this recv_frame */ -+ goto exit; -+ } -+ } -+exit: -+ return ret; -+} -+ -+/*#define DBG_RX_BMC_FRAME*/ -+int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) -+{ -+ int ret = _SUCCESS; -+ union recv_frame *orig_prframe = prframe; -+ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; -+#ifdef CONFIG_TDLS -+ u8 *psnap_type, *pcategory; -+#endif /* CONFIG_TDLS */ -+ -+ DBG_COUNTER(padapter->rx_logs.core_rx_post); -+ -+ prframe = decryptor(padapter, prframe); -+ if (prframe == NULL) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" decryptor: drop pkt\n" -+ , FUNC_ADPT_ARG(padapter)); -+ #endif -+ ret = _FAIL; -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_err); -+ goto _recv_data_drop; -+ } -+ -+#ifdef DBG_RX_BMC_FRAME -+ if (IS_MCAST(pattrib->ra)) -+ RTW_INFO("%s =>"ADPT_FMT" Rx BC/MC from "MAC_FMT"\n", __func__, ADPT_ARG(padapter), MAC_ARG(pattrib->ta)); -+#endif -+ -+#if 0 -+ if (is_primary_adapter(padapter)) { -+ RTW_INFO("+++\n"); -+ { -+ int i; -+ u8 *ptr = get_recvframe_data(prframe); -+ for (i = 0; i < 140; i = i + 8) -+ RTW_INFO("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:", *(ptr + i), -+ *(ptr + i + 1), *(ptr + i + 2) , *(ptr + i + 3) , *(ptr + i + 4), *(ptr + i + 5), *(ptr + i + 6), *(ptr + i + 7)); -+ -+ } -+ RTW_INFO("---\n"); -+ } -+#endif -+ -+#ifdef CONFIG_TDLS -+ /* check TDLS frame */ -+ psnap_type = get_recvframe_data(orig_prframe) + pattrib->hdrlen + pattrib->iv_len + SNAP_SIZE; -+ pcategory = psnap_type + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; -+ -+ if ((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, ETH_TYPE_LEN)) && -+ ((*pcategory == RTW_WLAN_CATEGORY_TDLS) || (*pcategory == RTW_WLAN_CATEGORY_P2P))) { -+ ret = OnTDLS(padapter, prframe); -+ if (ret == _FAIL) -+ goto _exit_recv_func; -+ } -+#endif /* CONFIG_TDLS */ -+ -+ prframe = recvframe_chk_defrag(padapter, prframe); -+ if (prframe == NULL) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" recvframe_chk_defrag: drop pkt\n" -+ , FUNC_ADPT_ARG(padapter)); -+ #endif -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_defrag_err); -+ goto _recv_data_drop; -+ } -+ -+ prframe = portctrl(padapter, prframe); -+ if (prframe == NULL) { -+ #ifdef DBG_RX_DROP_FRAME -+ RTW_INFO("DBG_RX_DROP_FRAME "FUNC_ADPT_FMT" portctrl: drop pkt\n" -+ , FUNC_ADPT_ARG(padapter)); -+ #endif -+ ret = _FAIL; -+ DBG_COUNTER(padapter->rx_logs.core_rx_post_portctrl_err); -+ goto _recv_data_drop; -+ } -+ -+ count_rx_stats(padapter, prframe, NULL); -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ rtw_wapi_update_info(padapter, prframe); -+#endif -+ -+#if defined(CONFIG_80211N_HT) && defined(CONFIG_RECV_REORDERING_CTRL) -+ /* including perform A-MPDU Rx Ordering Buffer Control */ -+ ret = recv_indicatepkt_reorder(padapter, prframe); -+ if (ret == _FAIL) { -+ rtw_free_recvframe(orig_prframe, pfree_recv_queue); -+ goto _recv_data_drop; -+ } else if (ret == RTW_RX_HANDLED) /* queued OR indicated in order */ -+ goto _exit_recv_func; -+#endif -+ -+ recv_set_iseq_before_mpdu_process(prframe, pattrib->seq_num, __func__); -+ ret = recv_process_mpdu(padapter, prframe); -+ recv_set_iseq_after_mpdu_process(prframe, pattrib->seq_num, __func__); -+ if (ret == _FAIL) -+ goto _recv_data_drop; -+ -+_exit_recv_func: -+ return ret; -+ -+_recv_data_drop: -+ precvpriv->dbg_rx_drop_count++; -+ return ret; -+} -+ -+int recv_func(_adapter *padapter, union recv_frame *rframe) -+{ -+ int ret; -+ struct rx_pkt_attrib *prxattrib = &rframe->u.hdr.attrib; -+ struct recv_priv *recvpriv = &padapter->recvpriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_priv *mlmepriv = &padapter->mlmepriv; -+ u8 *ptr = rframe->u.hdr.rx_data; -+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL -+ u8 type; -+#endif -+ -+ if (check_fwstate(mlmepriv, WIFI_MONITOR_STATE) -+#ifdef RTW_SIMPLE_CONFIG -+ || (check_fwstate(mlmepriv, WIFI_AP_STATE) && padapter->rtw_simple_config == _TRUE && IS_MCAST(get_ra(ptr))) -+#endif -+ ) { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) -+ recv_frame_monitor(padapter, rframe); -+#endif -+ ret = _SUCCESS; -+ goto exit; -+ } -+ -+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL -+ type = GetFrameType(ptr); -+ if ((type == WIFI_DATA_TYPE)&& check_fwstate(mlmepriv, WIFI_STATION_STATE)) { -+ struct wlan_network *cur_network = &(mlmepriv->cur_network); -+ if ( _rtw_memcmp(get_addr2_ptr(ptr), cur_network->network.MacAddress, ETH_ALEN)==0) { -+ recv_frame_monitor(padapter, rframe); -+ ret = _SUCCESS; -+ goto exit; -+ } -+ } -+#endif -+ /* check if need to handle uc_swdec_pending_queue*/ -+ if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && psecuritypriv->busetkipkey) { -+ union recv_frame *pending_frame; -+ int cnt = 0; -+ -+ while ((pending_frame = rtw_alloc_recvframe(&padapter->recvpriv.uc_swdec_pending_queue))) { -+ cnt++; -+ DBG_COUNTER(padapter->rx_logs.core_rx_dequeue); -+ recv_func_posthandle(padapter, pending_frame); -+ } -+ -+ if (cnt) -+ RTW_INFO(FUNC_ADPT_FMT" dequeue %d from uc_swdec_pending_queue\n", -+ FUNC_ADPT_ARG(padapter), cnt); -+ } -+ -+ DBG_COUNTER(padapter->rx_logs.core_rx); -+ ret = recv_func_prehandle(padapter, rframe); -+ -+ if (ret == _SUCCESS) { -+ -+ /* check if need to enqueue into uc_swdec_pending_queue*/ -+ if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && -+ !IS_MCAST(prxattrib->ra) && prxattrib->encrypt > 0 && -+ (prxattrib->bdecrypted == 0 || psecuritypriv->sw_decrypt == _TRUE) && -+ psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPAPSK && -+ !psecuritypriv->busetkipkey) { -+ DBG_COUNTER(padapter->rx_logs.core_rx_enqueue); -+ rtw_enqueue_recvframe(rframe, &padapter->recvpriv.uc_swdec_pending_queue); -+ /* RTW_INFO("%s: no key, enqueue uc_swdec_pending_queue\n", __func__); */ -+ -+ if (recvpriv->free_recvframe_cnt < NR_RECVFRAME / 4) { -+ /* to prevent from recvframe starvation, get recvframe from uc_swdec_pending_queue to free_recvframe_cnt */ -+ rframe = rtw_alloc_recvframe(&padapter->recvpriv.uc_swdec_pending_queue); -+ if (rframe) -+ goto do_posthandle; -+ } -+ goto exit; -+ } -+ -+do_posthandle: -+ ret = recv_func_posthandle(padapter, rframe); -+ } -+ -+exit: -+ return ret; -+} -+ -+ -+s32 rtw_recv_entry(union recv_frame *precvframe) -+{ -+ _adapter *padapter; -+ struct recv_priv *precvpriv; -+ s32 ret = _SUCCESS; -+ -+ -+ -+ padapter = precvframe->u.hdr.adapter; -+ -+ precvpriv = &padapter->recvpriv; -+ -+ -+ ret = recv_func(padapter, precvframe); -+ if (ret == _FAIL) { -+ goto _recv_entry_drop; -+ } -+ -+ -+ precvpriv->rx_pkts++; -+ -+ -+ return ret; -+ -+_recv_entry_drop: -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->registrypriv.mp_mode == 1) -+ padapter->mppriv.rx_pktloss = precvpriv->rx_drop; -+#endif -+ -+ -+ -+ return ret; -+} -+ -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+static void rtw_signal_stat_timer_hdl(void *ctx) -+{ -+ _adapter *adapter = (_adapter *)ctx; -+ struct recv_priv *recvpriv = &adapter->recvpriv; -+ -+ u32 tmp_s, tmp_q; -+ u8 avg_signal_strength = 0; -+ u8 avg_signal_qual = 0; -+ u32 num_signal_strength = 0; -+ u32 num_signal_qual = 0; -+ u8 ratio_pre_stat = 0, ratio_curr_stat = 0, ratio_total = 0, ratio_profile = SIGNAL_STAT_CALC_PROFILE_0; -+ -+ if (adapter->recvpriv.is_signal_dbg) { -+ /* update the user specific value, signal_strength_dbg, to signal_strength, rssi */ -+ adapter->recvpriv.signal_strength = adapter->recvpriv.signal_strength_dbg; -+ adapter->recvpriv.rssi = (s8)translate_percentage_to_dbm((u8)adapter->recvpriv.signal_strength_dbg); -+ } else { -+ -+ if (recvpriv->signal_strength_data.update_req == 0) { /* update_req is clear, means we got rx */ -+ avg_signal_strength = recvpriv->signal_strength_data.avg_val; -+ num_signal_strength = recvpriv->signal_strength_data.total_num; -+ /* after avg_vals are accquired, we can re-stat the signal values */ -+ recvpriv->signal_strength_data.update_req = 1; -+ } -+ -+ if (recvpriv->signal_qual_data.update_req == 0) { /* update_req is clear, means we got rx */ -+ avg_signal_qual = recvpriv->signal_qual_data.avg_val; -+ num_signal_qual = recvpriv->signal_qual_data.total_num; -+ /* after avg_vals are accquired, we can re-stat the signal values */ -+ recvpriv->signal_qual_data.update_req = 1; -+ } -+ -+ if (num_signal_strength == 0) { -+ if (rtw_get_on_cur_ch_time(adapter) == 0 -+ || rtw_get_passing_time_ms(rtw_get_on_cur_ch_time(adapter)) < 2 * adapter->mlmeextpriv.mlmext_info.bcn_interval -+ ) -+ goto set_timer; -+ } -+ -+ if (check_fwstate(&adapter->mlmepriv, WIFI_UNDER_SURVEY) == _TRUE -+ || check_fwstate(&adapter->mlmepriv, WIFI_ASOC_STATE) == _FALSE -+ ) -+ goto set_timer; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(adapter, WIFI_UNDER_SURVEY) == _TRUE) -+ goto set_timer; -+#endif -+ if (adapter->registrypriv.mp_mode == 1) -+ ratio_profile = SIGNAL_STAT_CALC_PROFILE_2; -+ else if (RTW_SIGNAL_STATE_CALC_PROFILE < SIGNAL_STAT_CALC_PROFILE_MAX) -+ ratio_profile = RTW_SIGNAL_STATE_CALC_PROFILE; -+ -+ ratio_pre_stat = signal_stat_calc_profile[ratio_profile][0]; -+ ratio_curr_stat = signal_stat_calc_profile[ratio_profile][1]; -+ ratio_total = ratio_pre_stat + ratio_curr_stat; -+ -+ /* update value of signal_strength, rssi, signal_qual */ -+ tmp_s = (ratio_curr_stat * avg_signal_strength + ratio_pre_stat * recvpriv->signal_strength); -+ if (tmp_s % ratio_total) -+ tmp_s = tmp_s / ratio_total + 1; -+ else -+ tmp_s = tmp_s / ratio_total; -+ if (tmp_s > 100) -+ tmp_s = 100; -+ -+ tmp_q = (ratio_curr_stat * avg_signal_qual + ratio_pre_stat * recvpriv->signal_qual); -+ if (tmp_q % ratio_total) -+ tmp_q = tmp_q / ratio_total + 1; -+ else -+ tmp_q = tmp_q / ratio_total; -+ if (tmp_q > 100) -+ tmp_q = 100; -+ -+ recvpriv->signal_strength = tmp_s; -+ recvpriv->rssi = (s8)translate_percentage_to_dbm(tmp_s); -+ recvpriv->signal_qual = tmp_q; -+ -+#if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1 -+ RTW_INFO(FUNC_ADPT_FMT" signal_strength:%3u, rssi:%3d, signal_qual:%3u" -+ ", num_signal_strength:%u, num_signal_qual:%u" -+ ", on_cur_ch_ms:%d" -+ "\n" -+ , FUNC_ADPT_ARG(adapter) -+ , recvpriv->signal_strength -+ , recvpriv->rssi -+ , recvpriv->signal_qual -+ , num_signal_strength, num_signal_qual -+ , rtw_get_on_cur_ch_time(adapter) ? rtw_get_passing_time_ms(rtw_get_on_cur_ch_time(adapter)) : 0 -+ ); -+#endif -+ } -+ -+set_timer: -+ rtw_set_signal_stat_timer(recvpriv); -+ -+} -+#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ -+static void rx_process_rssi(_adapter *padapter, union recv_frame *prframe) -+{ -+ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ struct signal_stat *signal_stat = &padapter->recvpriv.signal_strength_data; -+#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ u32 last_rssi, tmp_val; -+#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ -+ /* RTW_INFO("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->recv_signal_power,pattrib->signal_strength); */ -+ /* if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) */ -+ { -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ if (signal_stat->update_req) { -+ signal_stat->total_num = 0; -+ signal_stat->total_val = 0; -+ signal_stat->update_req = 0; -+ } -+ -+ signal_stat->total_num++; -+ signal_stat->total_val += pattrib->phy_info.signal_strength; -+ signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; -+#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ -+ /* Adapter->RxStats.RssiCalculateCnt++; */ /* For antenna Test */ -+ if (padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX) { -+ padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX; -+ last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index]; -+ padapter->recvpriv.signal_strength_data.total_val -= last_rssi; -+ } -+ padapter->recvpriv.signal_strength_data.total_val += pattrib->phy_info.signal_strength; -+ -+ padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->phy_info.signal_strength; -+ if (padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX) -+ padapter->recvpriv.signal_strength_data.index = 0; -+ -+ -+ tmp_val = padapter->recvpriv.signal_strength_data.total_val / padapter->recvpriv.signal_strength_data.total_num; -+ -+ if (padapter->recvpriv.is_signal_dbg) { -+ padapter->recvpriv.signal_strength = padapter->recvpriv.signal_strength_dbg; -+ padapter->recvpriv.rssi = (s8)translate_percentage_to_dbm(padapter->recvpriv.signal_strength_dbg); -+ } else { -+ padapter->recvpriv.signal_strength = tmp_val; -+ padapter->recvpriv.rssi = (s8)translate_percentage_to_dbm(tmp_val); -+ } -+ -+#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ } -+} -+ -+static void rx_process_link_qual(_adapter *padapter, union recv_frame *prframe) -+{ -+ struct rx_pkt_attrib *pattrib; -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ struct signal_stat *signal_stat; -+#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ u32 last_evm = 0, tmpVal; -+#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ -+ if (prframe == NULL || padapter == NULL) -+ return; -+ -+ pattrib = &prframe->u.hdr.attrib; -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ signal_stat = &padapter->recvpriv.signal_qual_data; -+#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ -+ /* RTW_INFO("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual); */ -+ -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ if (signal_stat->update_req) { -+ signal_stat->total_num = 0; -+ signal_stat->total_val = 0; -+ signal_stat->update_req = 0; -+ } -+ -+ signal_stat->total_num++; -+ signal_stat->total_val += pattrib->phy_info.signal_quality; -+ signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; -+ -+#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ if (pattrib->phy_info.signal_quality != 0) { -+ /* */ -+ /* 1. Record the general EVM to the sliding window. */ -+ /* */ -+ if (padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) { -+ padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; -+ last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; -+ padapter->recvpriv.signal_qual_data.total_val -= last_evm; -+ } -+ padapter->recvpriv.signal_qual_data.total_val += pattrib->phy_info.signal_quality; -+ -+ padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->phy_info.signal_quality; -+ if (padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) -+ padapter->recvpriv.signal_qual_data.index = 0; -+ -+ -+ /* <1> Showed on UI for user, in percentage. */ -+ tmpVal = padapter->recvpriv.signal_qual_data.total_val / padapter->recvpriv.signal_qual_data.total_num; -+ padapter->recvpriv.signal_qual = (u8)tmpVal; -+ -+ } -+#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+} -+ -+void rx_process_phy_info(_adapter *padapter, union recv_frame *rframe) -+{ -+ /* Check RSSI */ -+ rx_process_rssi(padapter, rframe); -+ -+ /* Check PWDB */ -+ /* process_PWDB(padapter, rframe); */ -+ -+ /* UpdateRxSignalStatistics8192C(Adapter, pRfd); */ -+ -+ /* Check EVM */ -+ rx_process_link_qual(padapter, rframe); -+ rtw_store_phy_info(padapter, rframe); -+} -+ -+void rx_query_phy_status( -+ union recv_frame *precvframe, -+ u8 *pphy_status) -+{ -+ PADAPTER padapter = precvframe->u.hdr.adapter; -+ struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct phydm_phyinfo_struct *p_phy_info = &pattrib->phy_info; -+ u8 *wlanhdr; -+ struct phydm_perpkt_info_struct pkt_info; -+ u8 *ta, *ra; -+ u8 is_ra_bmc; -+ struct sta_priv *pstapriv; -+ struct sta_info *psta = NULL; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ /* _irqL irqL; */ -+ -+ pkt_info.is_packet_match_bssid = _FALSE; -+ pkt_info.is_packet_to_self = _FALSE; -+ pkt_info.is_packet_beacon = _FALSE; -+ pkt_info.ppdu_cnt = pattrib->ppdu_cnt; -+ pkt_info.station_id = 0xFF; -+ -+ wlanhdr = get_recvframe_data(precvframe); -+ -+ ta = get_ta(wlanhdr); -+ ra = get_ra(wlanhdr); -+ is_ra_bmc = IS_MCAST(ra); -+ -+ if (_rtw_memcmp(adapter_mac_addr(padapter), ta, ETH_ALEN) == _TRUE) { -+ static systime start_time = 0; -+ -+#if 0 /*For debug */ -+ if (IsFrameTypeCtrl(wlanhdr)) { -+ RTW_INFO("-->Control frame: Y\n"); -+ RTW_INFO("-->pkt_len: %d\n", pattrib->pkt_len); -+ RTW_INFO("-->Sub Type = 0x%X\n", get_frame_sub_type(wlanhdr)); -+ } -+ -+ /* Dump first 40 bytes of header */ -+ int i = 0; -+ -+ for (i = 0; i < 40; i++) -+ RTW_INFO("%d: %X\n", i, *((u8 *)wlanhdr + i)); -+ -+ RTW_INFO("\n"); -+#endif -+ -+ if ((start_time == 0) || (rtw_get_passing_time_ms(start_time) > 5000)) { -+ RTW_PRINT("Warning!!! %s: Confilc mac addr!!\n", __func__); -+ start_time = rtw_get_current_time(); -+ } -+ precvpriv->dbg_rx_conflic_mac_addr_cnt++; -+ } else { -+ pstapriv = &padapter->stapriv; -+ psta = rtw_get_stainfo(pstapriv, ta); -+ if (psta) -+ pkt_info.station_id = psta->cmn.mac_id; -+ } -+ -+ pkt_info.is_packet_match_bssid = (!IsFrameTypeCtrl(wlanhdr)) -+ && (!pattrib->icv_err) && (!pattrib->crc_err) -+ && ((!MLME_IS_MESH(padapter) && _rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN)) -+ || (MLME_IS_MESH(padapter) && psta)); -+ -+ pkt_info.is_to_self = (!pattrib->icv_err) && (!pattrib->crc_err) -+ && _rtw_memcmp(ra, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ pkt_info.is_packet_to_self = pkt_info.is_packet_match_bssid -+ && _rtw_memcmp(ra, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ pkt_info.is_packet_beacon = pkt_info.is_packet_match_bssid -+ && (get_frame_sub_type(wlanhdr) == WIFI_BEACON); -+ -+ if (psta && IsFrameTypeData(wlanhdr) -+ && !(get_frame_sub_type(wlanhdr) & BIT(6)) /* don't count NULL data */ -+ ) { -+ if (is_ra_bmc) -+ psta->curr_rx_rate_bmc = pattrib->data_rate; -+ else -+ psta->curr_rx_rate = pattrib->data_rate; -+ } -+ pkt_info.data_rate = pattrib->data_rate; -+ -+ odm_phy_status_query(&pHalData->odmpriv, p_phy_info, pphy_status, &pkt_info); -+ -+ /* If bw is initial value, get from phy status */ -+ if (pattrib->bw == CHANNEL_WIDTH_MAX) -+ pattrib->bw = p_phy_info->band_width; -+ -+ if (p_phy_info->physts_rpt_valid == _TRUE) { -+ precvframe->u.hdr.psta = NULL; -+ if (padapter->registrypriv.mp_mode != 1) { -+ if ((!MLME_IS_MESH(padapter) && pkt_info.is_packet_match_bssid) -+ || (MLME_IS_MESH(padapter) && psta)) { -+ if (psta) { -+ precvframe->u.hdr.psta = psta; -+ rx_process_phy_info(padapter, precvframe); -+ } -+ } else if (pkt_info.is_packet_to_self || pkt_info.is_packet_beacon) { -+ if (psta) -+ precvframe->u.hdr.psta = psta; -+ rx_process_phy_info(padapter, precvframe); -+ } -+ } else { -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->mppriv.brx_filter_beacon == _TRUE) { -+ if (pkt_info.is_packet_beacon) { -+ RTW_INFO("in MP Rx is_packet_beacon\n"); -+ if (psta) -+ precvframe->u.hdr.psta = psta; -+ rx_process_phy_info(padapter, precvframe); -+ } -+ } else -+#endif -+ { -+ if (psta) -+ precvframe->u.hdr.psta = psta; -+ rx_process_phy_info(padapter, precvframe); -+ } -+ } -+ } -+ -+ rtw_odm_parse_rx_phy_status_chinfo(precvframe, pphy_status); -+} -+/* -+* Increase and check if the continual_no_rx_packet of this @param pmlmepriv is larger than MAX_CONTINUAL_NORXPACKET_COUNT -+* @return _TRUE: -+* @return _FALSE: -+*/ -+int rtw_inc_and_chk_continual_no_rx_packet(struct sta_info *sta, int tid_index) -+{ -+ -+ int ret = _FALSE; -+ int value = ATOMIC_INC_RETURN(&sta->continual_no_rx_packet[tid_index]); -+ -+ if (value >= MAX_CONTINUAL_NORXPACKET_COUNT) -+ ret = _TRUE; -+ -+ return ret; -+} -+ -+/* -+* Set the continual_no_rx_packet of this @param pmlmepriv to 0 -+*/ -+void rtw_reset_continual_no_rx_packet(struct sta_info *sta, int tid_index) -+{ -+ ATOMIC_SET(&sta->continual_no_rx_packet[tid_index], 0); -+} -+ -+u8 adapter_allow_bmc_data_rx(_adapter *adapter) -+{ -+ if (check_fwstate(&adapter->mlmepriv, WIFI_MONITOR_STATE | WIFI_MP_STATE) == _TRUE) -+ return 1; -+ -+#ifdef RTW_SIMPLE_CONFIG -+ /* allow AP to receive multicast packet for RtwSimpleConfigV4 */ -+ if (MLME_IS_AP(adapter) && adapter->rtw_simple_config) -+ return 1; -+#endif -+ -+ if (MLME_IS_AP(adapter)) -+ return 0; -+ -+ if (rtw_linked_check(adapter) == _FALSE) -+ return 0; -+ -+ return 1; -+} -+ -+s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status) -+{ -+ s32 ret = _SUCCESS; -+ u8 *pbuf = precvframe->u.hdr.rx_data; -+ u8 *ra = get_ra(pbuf); -+ u8 ra_is_bmc = IS_MCAST(ra); -+ bool phy_queried = 0; -+ _adapter *primary_padapter = precvframe->u.hdr.adapter; -+ _adapter *iface = NULL; -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (rtw_mp_mode_check(primary_padapter)) -+ goto query_phy_status; -+#endif -+#ifdef CONFIG_WIFI_MONITOR -+ if (MLME_IS_MONITOR(primary_padapter)) -+ goto query_phy_status; -+#endif -+ -+ if (ra_is_bmc == _FALSE) { -+ /* UC frame */ -+ iface = rtw_get_iface_by_macddr(primary_padapter , ra); -+ if (!iface) { -+ #ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ if (_rtw_memcmp(ra, adapter_pno_mac_addr(primary_padapter), ETH_ALEN)) -+ goto query_phy_status; -+ #endif -+ -+ #ifdef CONFIG_RTW_MULTI_AP -+ /* unasoc STA RCPI */ -+ if (rtw_unassoc_sta_src_chk(primary_padapter, UNASOC_STA_SRC_RX_NMY_UC)) { -+ if (pphy_status) { -+ rx_query_phy_status(precvframe, pphy_status); -+ rtw_rx_add_unassoc_sta(primary_padapter, UNASOC_STA_SRC_RX_NMY_UC, get_ta(pbuf) -+ , precvframe->u.hdr.attrib.phy_info.recv_signal_power); -+ } -+ } else -+ #endif -+ RTW_INFO("%s [WARN] Cannot find appropriate adapter - mac_addr : "MAC_FMT"\n" -+ , __func__, MAC_ARG(ra)); -+ -+ rtw_free_recvframe(precvframe, &precvframe->u.hdr.adapter->recvpriv.free_recv_queue); -+ goto exit; -+ } -+ #ifdef CONFIG_CONCURRENT_MODE -+ else -+ precvframe->u.hdr.adapter = iface; -+ #endif -+ -+ } else { -+ /* BMC frame */ -+ #ifdef CONFIG_CONCURRENT_MODE -+ rtw_mi_buddy_clone_bcmc_packet(primary_padapter, precvframe, pphy_status); -+ #endif -+ -+ #ifdef CONFIG_RTW_MULTI_AP -+ /* unasoc STA RCPI */ -+ if (pphy_status -+ && rtw_unassoc_sta_src_chk(primary_padapter, UNASOC_STA_SRC_RX_BMC) -+ ) { -+ phy_queried = 1; -+ rx_query_phy_status(precvframe, pphy_status); -+ rtw_rx_add_unassoc_sta(primary_padapter, UNASOC_STA_SRC_RX_BMC, get_ta(pbuf) -+ , precvframe->u.hdr.attrib.phy_info.recv_signal_power); -+ } -+ #endif -+ -+ /* skip unnecessary BMC data frame for primary adapter */ -+ if (GetFrameType(pbuf) == WIFI_DATA_TYPE -+ && !adapter_allow_bmc_data_rx(precvframe->u.hdr.adapter) -+ ) { -+ rtw_free_recvframe(precvframe, &precvframe->u.hdr.adapter->recvpriv.free_recv_queue); -+ goto exit; -+ } -+ } -+#if defined(CONFIG_MP_INCLUDED) || defined(CONFIG_WIFI_MONITOR) || defined(CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI) -+query_phy_status: -+#endif -+ if (pphy_status) { -+ if (!phy_queried) -+ rx_query_phy_status(precvframe, pphy_status); -+ #ifdef CONFIG_WIFI_MONITOR -+ if (MLME_IS_MONITOR(primary_padapter)) -+ rx_query_moinfo(&precvframe->u.hdr.attrib, pphy_status); -+ #endif -+ } -+ -+ ret = rtw_recv_entry(precvframe); -+ -+exit: -+ return ret; -+} -+ -+#ifdef CONFIG_RECV_THREAD_MODE -+thread_return rtw_recv_thread(thread_context context) -+{ -+ _adapter *adapter = (_adapter *)context; -+ struct recv_priv *recvpriv = &adapter->recvpriv; -+ s32 err = _SUCCESS; -+#ifdef RTW_RECV_THREAD_HIGH_PRIORITY -+#ifdef PLATFORM_LINUX -+ struct sched_param param = { .sched_priority = 1 }; -+ -+ sched_setscheduler(current, SCHED_FIFO, ¶m); -+#endif /* PLATFORM_LINUX */ -+#endif /*RTW_RECV_THREAD_HIGH_PRIORITY*/ -+ thread_enter("RTW_RECV_THREAD"); -+ -+ RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(adapter)); -+ -+ do { -+ err = _rtw_down_sema(&recvpriv->recv_sema); -+ if (_FAIL == err) { -+ RTW_ERR(FUNC_ADPT_FMT" down recv_sema fail!\n", FUNC_ADPT_ARG(adapter)); -+ goto exit; -+ } -+ -+ if (RTW_CANNOT_RUN(adapter)) { -+ RTW_DBG(FUNC_ADPT_FMT "- bDriverStopped(%s) bSurpriseRemoved(%s)\n", -+ FUNC_ADPT_ARG(adapter), -+ rtw_is_drv_stopped(adapter) ? "True" : "False", -+ rtw_is_surprise_removed(adapter) ? "True" : "False"); -+ goto exit; -+ } -+ -+ err = rtw_hal_recv_hdl(adapter); -+ -+ if (err == RTW_RFRAME_UNAVAIL -+ || err == RTW_RFRAME_PKT_UNAVAIL -+ ) { -+ rtw_msleep_os(1); -+ _rtw_up_sema(&recvpriv->recv_sema); -+ } -+ -+ flush_signals_thread(); -+ -+ } while (err != _FAIL); -+ -+exit: -+ -+ RTW_INFO(FUNC_ADPT_FMT " Exit\n", FUNC_ADPT_ARG(adapter)); -+ -+ rtw_thread_wait_stop(); -+ -+ return 0; -+} -+#endif /* CONFIG_RECV_THREAD_MODE */ -+ -+#if DBG_RX_BH_TRACKING -+void rx_bh_tk_set_stage(struct recv_priv *recv, u32 s) -+{ -+ recv->rx_bh_stage = s; -+} -+ -+void rx_bh_tk_set_buf(struct recv_priv *recv, void *buf, void *data, u32 dlen) -+{ -+ if (recv->rx_bh_cbuf) -+ recv->rx_bh_lbuf = recv->rx_bh_cbuf; -+ recv->rx_bh_cbuf = buf; -+ if (buf) { -+ recv->rx_bh_cbuf_data = data; -+ recv->rx_bh_cbuf_dlen = dlen; -+ recv->rx_bh_buf_dq_cnt++; -+ } else { -+ recv->rx_bh_cbuf_data = NULL; -+ recv->rx_bh_cbuf_dlen = 0; -+ } -+} -+ -+void rx_bh_tk_set_buf_pos(struct recv_priv *recv, void *pos) -+{ -+ if (recv->rx_bh_cbuf) { -+ recv->rx_bh_cbuf_pos = pos - recv->rx_bh_cbuf_data; -+ } else { -+ rtw_warn_on(1); -+ recv->rx_bh_cbuf_pos = 0; -+ } -+} -+ -+void rx_bh_tk_set_frame(struct recv_priv *recv, void *frame) -+{ -+ recv->rx_bh_cframe = frame; -+} -+ -+void dump_rx_bh_tk(void *sel, struct recv_priv *recv) -+{ -+ RTW_PRINT_SEL(sel, "[RXBHTK]s:%u, buf_dqc:%u, lbuf:%p, cbuf:%p, dlen:%u, pos:%u, cframe:%p\n" -+ , recv->rx_bh_stage -+ , recv->rx_bh_buf_dq_cnt -+ , recv->rx_bh_lbuf -+ , recv->rx_bh_cbuf -+ , recv->rx_bh_cbuf_dlen -+ , recv->rx_bh_cbuf_pos -+ , recv->rx_bh_cframe -+ ); -+} -+#endif /* DBG_RX_BH_TRACKING */ -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_rf.c b/drivers/staging/rtl8723cs/core/rtw_rf.c -new file mode 100644 -index 000000000000..60c95c7f1f89 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_rf.c -@@ -0,0 +1,2437 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_RF_C_ -+ -+#include -+#include -+ -+u8 center_ch_2g[CENTER_CH_2G_NUM] = { -+/* G00 */1, 2, -+/* G01 */3, 4, 5, -+/* G02 */6, 7, 8, -+/* G03 */9, 10, 11, -+/* G04 */12, 13, -+/* G05 */14 -+}; -+ -+#define ch_to_cch_2g_idx(ch) ((ch) - 1) -+ -+u8 center_ch_2g_40m[CENTER_CH_2G_40M_NUM] = { -+ 3, -+ 4, -+ 5, -+ 6, -+ 7, -+ 8, -+ 9, -+ 10, -+ 11, -+}; -+ -+u8 op_chs_of_cch_2g_40m[CENTER_CH_2G_40M_NUM][2] = { -+ {1, 5}, /* 3 */ -+ {2, 6}, /* 4 */ -+ {3, 7}, /* 5 */ -+ {4, 8}, /* 6 */ -+ {5, 9}, /* 7 */ -+ {6, 10}, /* 8 */ -+ {7, 11}, /* 9 */ -+ {8, 12}, /* 10 */ -+ {9, 13}, /* 11 */ -+}; -+ -+u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM] = { -+/* G00 */36, 38, 40, -+ 42, -+/* G01 */44, 46, 48, -+ /* 50, */ -+/* G02 */52, 54, 56, -+ 58, -+/* G03 */60, 62, 64, -+/* G04 */100, 102, 104, -+ 106, -+/* G05 */108, 110, 112, -+ /* 114, */ -+/* G06 */116, 118, 120, -+ 122, -+/* G07 */124, 126, 128, -+/* G08 */132, 134, 136, -+ 138, -+/* G09 */140, 142, 144, -+/* G10 */149, 151, 153, -+ 155, -+/* G11 */157, 159, 161, -+ /* 163, */ -+/* G12 */165, 167, 169, -+ 171, -+/* G13 */173, 175, 177 -+}; -+ -+u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM] = { -+/* G00 */36, 40, -+/* G01 */44, 48, -+/* G02 */52, 56, -+/* G03 */60, 64, -+/* G04 */100, 104, -+/* G05 */108, 112, -+/* G06 */116, 120, -+/* G07 */124, 128, -+/* G08 */132, 136, -+/* G09 */140, 144, -+/* G10 */149, 153, -+/* G11 */157, 161, -+/* G12 */165, 169, -+/* G13 */173, 177 -+}; -+ -+#define ch_to_cch_5g_20m_idx(ch) \ -+ ( \ -+ ((ch) >= 36 && (ch) <= 64) ? (((ch) - 36) >> 2) : \ -+ ((ch) >= 100 && (ch) <= 144) ? 8 + (((ch) - 100) >> 2) : \ -+ ((ch) >= 149 && (ch) <= 177) ? 20 + (((ch) - 149) >> 2) : 255 \ -+ ) -+ -+u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM] = { -+/* G00 */38, -+/* G01 */46, -+/* G02 */54, -+/* G03 */62, -+/* G04 */102, -+/* G05 */110, -+/* G06 */118, -+/* G07 */126, -+/* G08 */134, -+/* G09 */142, -+/* G10 */151, -+/* G11 */159, -+/* G12 */167, -+/* G13 */175 -+}; -+ -+u8 center_ch_5g_20m_40m[CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM] = { -+/* G00 */36, 38, 40, -+/* G01 */44, 46, 48, -+/* G02 */52, 54, 56, -+/* G03 */60, 62, 64, -+/* G04 */100, 102, 104, -+/* G05 */108, 110, 112, -+/* G06 */116, 118, 120, -+/* G07 */124, 126, 128, -+/* G08 */132, 134, 136, -+/* G09 */140, 142, 144, -+/* G10 */149, 151, 153, -+/* G11 */157, 159, 161, -+/* G12 */165, 167, 169, -+/* G13 */173, 175, 177 -+}; -+ -+u8 op_chs_of_cch_5g_40m[CENTER_CH_5G_40M_NUM][2] = { -+ {36, 40}, /* 38 */ -+ {44, 48}, /* 46 */ -+ {52, 56}, /* 54 */ -+ {60, 64}, /* 62 */ -+ {100, 104}, /* 102 */ -+ {108, 112}, /* 110 */ -+ {116, 120}, /* 118 */ -+ {124, 128}, /* 126 */ -+ {132, 136}, /* 134 */ -+ {140, 144}, /* 142 */ -+ {149, 153}, /* 151 */ -+ {157, 161}, /* 159 */ -+ {165, 169}, /* 167 */ -+ {173, 177}, /* 175 */ -+}; -+ -+u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM] = { -+/* G00 ~ G01*/42, -+/* G02 ~ G03*/58, -+/* G04 ~ G05*/106, -+/* G06 ~ G07*/122, -+/* G08 ~ G09*/138, -+/* G10 ~ G11*/155, -+/* G12 ~ G13*/171 -+}; -+ -+u8 op_chs_of_cch_5g_80m[CENTER_CH_5G_80M_NUM][4] = { -+ {36, 40, 44, 48}, /* 42 */ -+ {52, 56, 60, 64}, /* 58 */ -+ {100, 104, 108, 112}, /* 106 */ -+ {116, 120, 124, 128}, /* 122 */ -+ {132, 136, 140, 144}, /* 138 */ -+ {149, 153, 157, 161}, /* 155 */ -+ {165, 169, 173, 177}, /* 171 */ -+}; -+ -+u8 center_ch_5g_160m[CENTER_CH_5G_160M_NUM] = { -+/* G00 ~ G03*/50, -+/* G04 ~ G07*/114, -+/* G10 ~ G13*/163 -+}; -+ -+u8 op_chs_of_cch_5g_160m[CENTER_CH_5G_160M_NUM][8] = { -+ {36, 40, 44, 48, 52, 56, 60, 64}, /* 50 */ -+ {100, 104, 108, 112, 116, 120, 124, 128}, /* 114 */ -+ {149, 153, 157, 161, 165, 169, 173, 177}, /* 163 */ -+}; -+ -+struct center_chs_ent_t { -+ u8 ch_num; -+ u8 *chs; -+}; -+ -+struct center_chs_ent_t center_chs_2g_by_bw[] = { -+ {CENTER_CH_2G_NUM, center_ch_2g}, -+ {CENTER_CH_2G_40M_NUM, center_ch_2g_40m}, -+}; -+ -+struct center_chs_ent_t center_chs_5g_by_bw[] = { -+ {CENTER_CH_5G_20M_NUM, center_ch_5g_20m}, -+ {CENTER_CH_5G_40M_NUM, center_ch_5g_40m}, -+ {CENTER_CH_5G_80M_NUM, center_ch_5g_80m}, -+ {CENTER_CH_5G_160M_NUM, center_ch_5g_160m}, -+}; -+ -+/* -+ * Get center channel of smaller bandwidth by @param cch, @param bw, @param offset -+ * @cch: the given center channel -+ * @bw: the given bandwidth -+ * @offset: the given primary SC offset of the given bandwidth -+ * -+ * return center channel of smaller bandiwdth if valid, or 0 -+ */ -+u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset) -+{ -+ u8 t_cch = 0; -+ -+ if (bw == CHANNEL_WIDTH_20) { -+ t_cch = cch; -+ goto exit; -+ } -+ -+ if (offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ /* 2.4G, 40MHz */ -+ if (cch >= 3 && cch <= 11 && bw == CHANNEL_WIDTH_40) { -+ t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 2 : cch - 2; -+ goto exit; -+ } -+ -+ /* 5G, 160MHz */ -+ if (cch >= 50 && cch <= 163 && bw == CHANNEL_WIDTH_160) { -+ t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 8 : cch - 8; -+ goto exit; -+ -+ /* 5G, 80MHz */ -+ } else if (cch >= 42 && cch <= 171 && bw == CHANNEL_WIDTH_80) { -+ t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 4 : cch - 4; -+ goto exit; -+ -+ /* 5G, 40MHz */ -+ } else if (cch >= 38 && cch <= 175 && bw == CHANNEL_WIDTH_40) { -+ t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 2 : cch - 2; -+ goto exit; -+ -+ } else { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+exit: -+ return t_cch; -+} -+ -+/* -+ * Get center channel of smaller bandwidth by @param cch, @param bw, @param opch -+ * @cch: the given center channel -+ * @bw: the given bandwidth -+ * @opch: the given operating channel -+ * -+ * return center channel of smaller bandiwdth if valid, or 0 -+ */ -+u8 rtw_get_scch_by_cch_opch(u8 cch, u8 bw, u8 opch) -+{ -+ u8 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ -+ if (opch > cch) -+ offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ else if (opch < cch) -+ offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ -+ return rtw_get_scch_by_cch_offset(cch, bw, offset); -+} -+ -+struct op_chs_ent_t { -+ u8 ch_num; -+ u8 *chs; -+}; -+ -+struct op_chs_ent_t op_chs_of_cch_2g_by_bw[] = { -+ {1, center_ch_2g}, -+ {2, (u8 *)op_chs_of_cch_2g_40m}, -+}; -+ -+struct op_chs_ent_t op_chs_of_cch_5g_by_bw[] = { -+ {1, center_ch_5g_20m}, -+ {2, (u8 *)op_chs_of_cch_5g_40m}, -+ {4, (u8 *)op_chs_of_cch_5g_80m}, -+ {8, (u8 *)op_chs_of_cch_5g_160m}, -+}; -+ -+inline u8 center_chs_2g_num(u8 bw) -+{ -+ if (bw > CHANNEL_WIDTH_40) -+ return 0; -+ -+ return center_chs_2g_by_bw[bw].ch_num; -+} -+ -+inline u8 center_chs_2g(u8 bw, u8 id) -+{ -+ if (bw > CHANNEL_WIDTH_40) -+ return 0; -+ -+ if (id >= center_chs_2g_num(bw)) -+ return 0; -+ -+ return center_chs_2g_by_bw[bw].chs[id]; -+} -+ -+inline u8 center_chs_5g_num(u8 bw) -+{ -+ if (bw > CHANNEL_WIDTH_160) -+ return 0; -+ -+ return center_chs_5g_by_bw[bw].ch_num; -+} -+ -+inline u8 center_chs_5g(u8 bw, u8 id) -+{ -+ if (bw > CHANNEL_WIDTH_160) -+ return 0; -+ -+ if (id >= center_chs_5g_num(bw)) -+ return 0; -+ -+ return center_chs_5g_by_bw[bw].chs[id]; -+} -+ -+/* -+ * Get available op channels by @param cch, @param bw -+ * @cch: the given center channel -+ * @bw: the given bandwidth -+ * @op_chs: the pointer to return pointer of op channel array -+ * @op_ch_num: the pointer to return pointer of op channel number -+ * -+ * return valid (1) or not (0) -+ */ -+u8 rtw_get_op_chs_by_cch_bw(u8 cch, u8 bw, u8 **op_chs, u8 *op_ch_num) -+{ -+ int i; -+ struct center_chs_ent_t *c_chs_ent = NULL; -+ struct op_chs_ent_t *op_chs_ent = NULL; -+ u8 valid = 1; -+ -+ if (cch <= 14 -+ && bw <= CHANNEL_WIDTH_40 -+ ) { -+ c_chs_ent = ¢er_chs_2g_by_bw[bw]; -+ op_chs_ent = &op_chs_of_cch_2g_by_bw[bw]; -+ } else if (cch >= 36 && cch <= 177 -+ && bw <= CHANNEL_WIDTH_160 -+ ) { -+ c_chs_ent = ¢er_chs_5g_by_bw[bw]; -+ op_chs_ent = &op_chs_of_cch_5g_by_bw[bw]; -+ } else { -+ valid = 0; -+ goto exit; -+ } -+ -+ for (i = 0; i < c_chs_ent->ch_num; i++) -+ if (cch == *(c_chs_ent->chs + i)) -+ break; -+ -+ if (i == c_chs_ent->ch_num) { -+ valid = 0; -+ goto exit; -+ } -+ -+ *op_chs = op_chs_ent->chs + op_chs_ent->ch_num * i; -+ *op_ch_num = op_chs_ent->ch_num; -+ -+exit: -+ return valid; -+} -+ -+u8 rtw_get_offset_by_chbw(u8 ch, u8 bw, u8 *r_offset) -+{ -+ u8 valid = 1; -+ u8 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ -+ if (bw == CHANNEL_WIDTH_20) -+ goto exit; -+ -+ if (bw >= CHANNEL_WIDTH_80 && ch <= 14) { -+ valid = 0; -+ goto exit; -+ } -+ -+ if (ch >= 1 && ch <= 4) -+ offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ else if (ch >= 5 && ch <= 9) { -+ if (*r_offset == HAL_PRIME_CHNL_OFFSET_LOWER || *r_offset == HAL_PRIME_CHNL_OFFSET_UPPER) -+ offset = *r_offset; /* both lower and upper is valid, obey input value */ -+ else -+ offset = HAL_PRIME_CHNL_OFFSET_UPPER; /* default use upper */ -+ } else if (ch >= 10 && ch <= 13) -+ offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ else if (ch == 14) { -+ valid = 0; /* ch14 doesn't support 40MHz bandwidth */ -+ goto exit; -+ } else if (ch >= 36 && ch <= 177) { -+ switch (ch) { -+ case 36: -+ case 44: -+ case 52: -+ case 60: -+ case 100: -+ case 108: -+ case 116: -+ case 124: -+ case 132: -+ case 140: -+ case 149: -+ case 157: -+ case 165: -+ case 173: -+ offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ case 40: -+ case 48: -+ case 56: -+ case 64: -+ case 104: -+ case 112: -+ case 120: -+ case 128: -+ case 136: -+ case 144: -+ case 153: -+ case 161: -+ case 169: -+ case 177: -+ offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ default: -+ valid = 0; -+ break; -+ } -+ } else -+ valid = 0; -+ -+exit: -+ if (valid && r_offset) -+ *r_offset = offset; -+ return valid; -+} -+ -+u8 rtw_get_center_ch(u8 ch, u8 bw, u8 offset) -+{ -+ u8 cch = ch; -+ -+ if (bw == CHANNEL_WIDTH_160) { -+ if (ch % 4 == 0) { -+ if (ch >= 36 && ch <= 64) -+ cch = 50; -+ else if (ch >= 100 && ch <= 128) -+ cch = 114; -+ } else if (ch % 4 == 1) { -+ if (ch >= 149 && ch <= 177) -+ cch = 163; -+ } -+ -+ } else if (bw == CHANNEL_WIDTH_80) { -+ if (ch <= 14) -+ cch = 7; /* special case for 2.4G */ -+ else if (ch % 4 == 0) { -+ if (ch >= 36 && ch <= 48) -+ cch = 42; -+ else if (ch >= 52 && ch <= 64) -+ cch = 58; -+ else if (ch >= 100 && ch <= 112) -+ cch = 106; -+ else if (ch >= 116 && ch <= 128) -+ cch = 122; -+ else if (ch >= 132 && ch <= 144) -+ cch = 138; -+ } else if (ch % 4 == 1) { -+ if (ch >= 149 && ch <= 161) -+ cch = 155; -+ else if (ch >= 165 && ch <= 177) -+ cch = 171; -+ } -+ -+ } else if (bw == CHANNEL_WIDTH_40) { -+ if (offset == HAL_PRIME_CHNL_OFFSET_LOWER) -+ cch = ch + 2; -+ else if (offset == HAL_PRIME_CHNL_OFFSET_UPPER) -+ cch = ch - 2; -+ -+ } else if (bw == CHANNEL_WIDTH_20 -+ || bw == CHANNEL_WIDTH_10 -+ || bw == CHANNEL_WIDTH_5 -+ ) -+ ; /* same as ch */ -+ else -+ rtw_warn_on(1); -+ -+ return cch; -+} -+ -+u8 rtw_get_ch_group(u8 ch, u8 *group, u8 *cck_group) -+{ -+ BAND_TYPE band = BAND_MAX; -+ s8 gp = -1, cck_gp = -1; -+ -+ if (ch <= 14) { -+ band = BAND_ON_2_4G; -+ -+ if (1 <= ch && ch <= 2) -+ gp = 0; -+ else if (3 <= ch && ch <= 5) -+ gp = 1; -+ else if (6 <= ch && ch <= 8) -+ gp = 2; -+ else if (9 <= ch && ch <= 11) -+ gp = 3; -+ else if (12 <= ch && ch <= 14) -+ gp = 4; -+ else -+ band = BAND_MAX; -+ -+ if (ch == 14) -+ cck_gp = 5; -+ else -+ cck_gp = gp; -+ } else { -+ band = BAND_ON_5G; -+ -+ if (36 <= ch && ch <= 42) -+ gp = 0; -+ else if (44 <= ch && ch <= 48) -+ gp = 1; -+ else if (50 <= ch && ch <= 58) -+ gp = 2; -+ else if (60 <= ch && ch <= 64) -+ gp = 3; -+ else if (100 <= ch && ch <= 106) -+ gp = 4; -+ else if (108 <= ch && ch <= 114) -+ gp = 5; -+ else if (116 <= ch && ch <= 122) -+ gp = 6; -+ else if (124 <= ch && ch <= 130) -+ gp = 7; -+ else if (132 <= ch && ch <= 138) -+ gp = 8; -+ else if (140 <= ch && ch <= 144) -+ gp = 9; -+ else if (149 <= ch && ch <= 155) -+ gp = 10; -+ else if (157 <= ch && ch <= 161) -+ gp = 11; -+ else if (165 <= ch && ch <= 171) -+ gp = 12; -+ else if (173 <= ch && ch <= 177) -+ gp = 13; -+ else -+ band = BAND_MAX; -+ } -+ -+ if (band == BAND_MAX -+ || (band == BAND_ON_2_4G && cck_gp == -1) -+ || gp == -1 -+ ) { -+ RTW_WARN("%s invalid channel:%u", __func__, ch); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (group) -+ *group = gp; -+ if (cck_group && band == BAND_ON_2_4G) -+ *cck_group = cck_gp; -+ -+exit: -+ return band; -+} -+ -+int rtw_ch2freq(int chan) -+{ -+ /* see 802.11 17.3.8.3.2 and Annex J -+ * there are overlapping channel numbers in 5GHz and 2GHz bands */ -+ -+ /* -+ * RTK: don't consider the overlapping channel numbers: 5G channel <= 14, -+ * because we don't support it. simply judge from channel number -+ */ -+ -+ if (chan >= 1 && chan <= 14) { -+ if (chan == 14) -+ return 2484; -+ else if (chan < 14) -+ return 2407 + chan * 5; -+ } else if (chan >= 36 && chan <= 177) -+ return 5000 + chan * 5; -+ -+ return 0; /* not supported */ -+} -+ -+int rtw_freq2ch(int freq) -+{ -+ /* see 802.11 17.3.8.3.2 and Annex J */ -+ if (freq == 2484) -+ return 14; -+ else if (freq < 2484) -+ return (freq - 2407) / 5; -+ else if (freq >= 4910 && freq <= 4980) -+ return (freq - 4000) / 5; -+ else if (freq <= 45000) /* DMG band lower limit */ -+ return (freq - 5000) / 5; -+ else if (freq >= 58320 && freq <= 64800) -+ return (freq - 56160) / 2160; -+ else -+ return 0; -+} -+ -+bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo) -+{ -+ u8 c_ch; -+ u32 freq; -+ u32 hi_ret = 0, lo_ret = 0; -+ bool valid = _FALSE; -+ -+ if (hi) -+ *hi = 0; -+ if (lo) -+ *lo = 0; -+ -+ c_ch = rtw_get_center_ch(ch, bw, offset); -+ freq = rtw_ch2freq(c_ch); -+ -+ if (!freq) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (bw == CHANNEL_WIDTH_160) { -+ hi_ret = freq + 80; -+ lo_ret = freq - 80; -+ } else if (bw == CHANNEL_WIDTH_80) { -+ hi_ret = freq + 40; -+ lo_ret = freq - 40; -+ } else if (bw == CHANNEL_WIDTH_40) { -+ hi_ret = freq + 20; -+ lo_ret = freq - 20; -+ } else if (bw == CHANNEL_WIDTH_20) { -+ hi_ret = freq + 10; -+ lo_ret = freq - 10; -+ } else -+ rtw_warn_on(1); -+ -+ if (hi) -+ *hi = hi_ret; -+ if (lo) -+ *lo = lo_ret; -+ -+ valid = _TRUE; -+ -+exit: -+ return valid; -+} -+ -+const char *const _ch_width_str[CHANNEL_WIDTH_MAX] = { -+ [CHANNEL_WIDTH_20] = "20MHz", -+ [CHANNEL_WIDTH_40] = "40MHz", -+ [CHANNEL_WIDTH_80] = "80MHz", -+ [CHANNEL_WIDTH_160] = "160MHz", -+ [CHANNEL_WIDTH_80_80] = "80_80MHz", -+ [CHANNEL_WIDTH_5] = "5MHz", -+ [CHANNEL_WIDTH_10] = "10MHz", -+}; -+ -+const u8 _ch_width_to_bw_cap[CHANNEL_WIDTH_MAX] = { -+ [CHANNEL_WIDTH_20] = BW_CAP_20M, -+ [CHANNEL_WIDTH_40] = BW_CAP_40M, -+ [CHANNEL_WIDTH_80] = BW_CAP_80M, -+ [CHANNEL_WIDTH_160] = BW_CAP_160M, -+ [CHANNEL_WIDTH_80_80] = BW_CAP_80_80M, -+ [CHANNEL_WIDTH_5] = BW_CAP_5M, -+ [CHANNEL_WIDTH_10] = BW_CAP_10M, -+}; -+ -+const char *const _band_str[] = { -+ "2.4G", -+ "5G", -+ "BAND_MAX", -+}; -+ -+const u8 _band_to_band_cap[] = { -+ BAND_CAP_2G, -+ BAND_CAP_5G, -+ 0, -+}; -+ -+const char *const _opc_bw_str[OPC_BW_NUM] = { -+ "20M ", /* OPC_BW20 */ -+ "40M+", /* OPC_BW40PLUS */ -+ "40M-", /* OPC_BW40MINUS */ -+ "80M ", /* OPC_BW80 */ -+ "160M ", /* OPC_BW160 */ -+ "80+80M ", /* OPC_BW80P80 */ -+}; -+ -+const u8 _opc_bw_to_ch_width[OPC_BW_NUM] = { -+ CHANNEL_WIDTH_20, /* OPC_BW20 */ -+ CHANNEL_WIDTH_40, /* OPC_BW40PLUS */ -+ CHANNEL_WIDTH_40, /* OPC_BW40MINUS */ -+ CHANNEL_WIDTH_80, /* OPC_BW80 */ -+ CHANNEL_WIDTH_160, /* OPC_BW160 */ -+ CHANNEL_WIDTH_80_80, /* OPC_BW80P80 */ -+}; -+ -+/* global operating class database */ -+ -+struct op_class_t { -+ u8 class_id; -+ BAND_TYPE band; -+ enum opc_bw bw; -+ u8 *len_ch_attr; -+}; -+ -+#define OPC_CH_LIST_LEN(_opc) (_opc.len_ch_attr[0]) -+#define OPC_CH_LIST_CH(_opc, _i) (_opc.len_ch_attr[_i + 1]) -+ -+#define OP_CLASS_ENT(_class, _band, _bw, _len, arg...) \ -+ {.class_id = _class, .band = _band, .bw = _bw, .len_ch_attr = (uint8_t[_len + 1]) {_len, ##arg},} -+ -+/* 802.11-2016 Table E-4, partial */ -+static const struct op_class_t global_op_class[] = { -+ /* 2G ch1~13, 20M */ -+ OP_CLASS_ENT(81, BAND_ON_2_4G, OPC_BW20, 13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), -+ /* 2G ch14, 20M */ -+ OP_CLASS_ENT(82, BAND_ON_2_4G, OPC_BW20, 1, 14), -+ /* 2G, 40M */ -+ OP_CLASS_ENT(83, BAND_ON_2_4G, OPC_BW40PLUS, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9), -+ OP_CLASS_ENT(84, BAND_ON_2_4G, OPC_BW40MINUS, 9, 5, 6, 7, 8, 9, 10, 11, 12, 13), -+ /* 5G band 1, 20M & 40M */ -+ OP_CLASS_ENT(115, BAND_ON_5G, OPC_BW20, 4, 36, 40, 44, 48), -+ OP_CLASS_ENT(116, BAND_ON_5G, OPC_BW40PLUS, 2, 36, 44), -+ OP_CLASS_ENT(117, BAND_ON_5G, OPC_BW40MINUS, 2, 40, 48), -+ /* 5G band 2, 20M & 40M */ -+ OP_CLASS_ENT(118, BAND_ON_5G, OPC_BW20, 4, 52, 56, 60, 64), -+ OP_CLASS_ENT(119, BAND_ON_5G, OPC_BW40PLUS, 2, 52, 60), -+ OP_CLASS_ENT(120, BAND_ON_5G, OPC_BW40MINUS, 2, 56, 64), -+ /* 5G band 3, 20M & 40M */ -+ OP_CLASS_ENT(121, BAND_ON_5G, OPC_BW20, 12, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144), -+ OP_CLASS_ENT(122, BAND_ON_5G, OPC_BW40PLUS, 6, 100, 108, 116, 124, 132, 140), -+ OP_CLASS_ENT(123, BAND_ON_5G, OPC_BW40MINUS, 6, 104, 112, 120, 128, 136, 144), -+ /* 5G band 4, 20M & 40M */ -+ OP_CLASS_ENT(124, BAND_ON_5G, OPC_BW20, 4, 149, 153, 157, 161), -+ OP_CLASS_ENT(125, BAND_ON_5G, OPC_BW20, 6, 149, 153, 157, 161, 165, 169), -+ OP_CLASS_ENT(126, BAND_ON_5G, OPC_BW40PLUS, 2, 149, 157), -+ OP_CLASS_ENT(127, BAND_ON_5G, OPC_BW40MINUS, 2, 153, 161), -+ /* 5G, 80M & 160M */ -+ OP_CLASS_ENT(128, BAND_ON_5G, OPC_BW80, 24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161), -+ OP_CLASS_ENT(129, BAND_ON_5G, OPC_BW160, 16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128), -+ #if 0 /* TODO */ -+ /* 5G, 80+80M */ -+ {130, BAND_ON_5G, OPC_BW80P80, 0x0FFFFFF}, -+ #endif -+}; -+ -+static const int global_op_class_num = sizeof(global_op_class) / sizeof(struct op_class_t); -+ -+static const struct op_class_t *get_global_op_class_by_id(u8 gid) -+{ -+ int i; -+ -+ for (i = 0; i < global_op_class_num; i++) -+ if (global_op_class[i].class_id == gid) -+ break; -+ -+ return i < global_op_class_num ? &global_op_class[i] : NULL; -+} -+ -+bool is_valid_global_op_class_id(u8 gid) -+{ -+ return get_global_op_class_by_id(gid) ? 1 : 0; -+} -+ -+static bool is_valid_global_op_class_ch(const struct op_class_t *opc, u8 ch) -+{ -+ int array_idx; -+ int i; -+ -+ if (opc < global_op_class -+ || (((u8 *)opc) - ((u8 *)global_op_class)) % sizeof(struct op_class_t) -+ ) { -+ RTW_ERR("Invalid opc pointer:%p (global_op_class:%p, sizeof(struct op_class_t):%zu, %zu)\n" -+ , opc, global_op_class, sizeof(struct op_class_t), (((u8 *)opc) - ((u8 *)global_op_class)) % sizeof(struct op_class_t)); -+ return 0; -+ } -+ -+ array_idx = (((u8 *)opc) - ((u8 *)global_op_class)) / sizeof(struct op_class_t); -+ -+ for (i = 0; i < OPC_CH_LIST_LEN(global_op_class[array_idx]); i++) -+ if (OPC_CH_LIST_CH(global_op_class[array_idx], i) == ch) -+ break; -+ -+ return i < OPC_CH_LIST_LEN(global_op_class[array_idx]); -+} -+ -+static enum opc_bw get_global_opc_bw_by_id(u8 gid) -+{ -+ int i; -+ -+ for (i = 0; i < global_op_class_num; i++) -+ if (global_op_class[i].class_id == gid) -+ break; -+ -+ return i < global_op_class_num ? global_op_class[i].bw : OPC_BW_NUM; -+} -+ -+/* -2: logic error, -1: error, 0: is already BW20 */ -+s16 get_sub_op_class(u8 gid, u8 ch) -+{ -+ const struct op_class_t *opc = get_global_op_class_by_id(gid); -+ int i; -+ enum channel_width bw; -+ -+ if (!opc) -+ return -1; -+ -+ if (!is_valid_global_op_class_ch(opc, ch)) { -+ return -1; -+ } -+ -+ if (opc->bw == OPC_BW20) -+ return 0; -+ -+ bw = opc_bw_to_ch_width(opc->bw); -+ -+ for (i = 0; i < global_op_class_num; i++) { -+ if (bw != opc_bw_to_ch_width(global_op_class[i].bw) + 1) -+ continue; -+ if (is_valid_global_op_class_ch(&global_op_class[i], ch)) -+ break; -+ } -+ -+ return i < global_op_class_num ? global_op_class[i].class_id : -2; -+} -+ -+static void dump_op_class_ch_title(void *sel) -+{ -+ RTW_PRINT_SEL(sel, "%-5s %-4s %-7s ch_list\n" -+ , "class", "band", "bw"); -+} -+ -+static void dump_global_op_class_ch_single(void *sel, u8 gid) -+{ -+ u8 i; -+ char buf[100]; -+ char *pos = buf; -+ -+ for (i = 0; i < OPC_CH_LIST_LEN(global_op_class[gid]); i++) -+ pos += snprintf(pos, 100 - (pos - buf), " %u", OPC_CH_LIST_CH(global_op_class[gid], i)); -+ -+ RTW_PRINT_SEL(sel, "%5u %4s %7s%s\n" -+ , global_op_class[gid].class_id -+ , band_str(global_op_class[gid].band) -+ , opc_bw_str(global_op_class[gid].bw), buf); -+} -+ -+#ifdef CONFIG_RTW_DEBUG -+static bool dbg_global_op_class_validate(u8 gid) -+{ -+ u8 i; -+ u8 ch, bw, offset, cch; -+ bool ret = 1; -+ -+ switch (global_op_class[gid].bw) { -+ case OPC_BW20: -+ bw = CHANNEL_WIDTH_20; -+ offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case OPC_BW40PLUS: -+ bw = CHANNEL_WIDTH_40; -+ offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ case OPC_BW40MINUS: -+ bw = CHANNEL_WIDTH_40; -+ offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ case OPC_BW80: -+ bw = CHANNEL_WIDTH_80; -+ offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case OPC_BW160: -+ bw = CHANNEL_WIDTH_160; -+ offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case OPC_BW80P80: /* TODO */ -+ default: -+ RTW_ERR("%s class:%u unsupported opc_bw:%u\n" -+ , __func__, global_op_class[gid].class_id, global_op_class[gid].bw); -+ ret = 0; -+ goto exit; -+ } -+ -+ for (i = 0; i < OPC_CH_LIST_LEN(global_op_class[gid]); i++) { -+ u8 *op_chs; -+ u8 op_ch_num; -+ u8 k; -+ -+ ch = OPC_CH_LIST_CH(global_op_class[gid], i); -+ cch = rtw_get_center_ch(ch ,bw, offset); -+ if (!cch) { -+ RTW_ERR("%s can't get cch from class:%u ch:%u\n" -+ , __func__, global_op_class[gid].class_id, ch); -+ ret = 0; -+ continue; -+ } -+ -+ if (!rtw_get_op_chs_by_cch_bw(cch, bw, &op_chs, &op_ch_num)) { -+ RTW_ERR("%s can't get op chs from class:%u cch:%u\n" -+ , __func__, global_op_class[gid].class_id, cch); -+ ret = 0; -+ continue; -+ } -+ -+ for (k = 0; k < op_ch_num; k++) { -+ if (*(op_chs + k) == ch) -+ break; -+ } -+ if (k >= op_ch_num) { -+ RTW_ERR("%s can't get ch:%u from op_chs class:%u cch:%u\n" -+ , __func__, ch, global_op_class[i].class_id, cch); -+ ret = 0; -+ } -+ } -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_RTW_DEBUG */ -+ -+void dump_global_op_class(void *sel) -+{ -+ u8 i; -+ -+ dump_op_class_ch_title(sel); -+ -+ for (i = 0; i < global_op_class_num; i++) -+ dump_global_op_class_ch_single(sel, i); -+} -+ -+u8 rtw_get_op_class_by_chbw(u8 ch, u8 bw, u8 offset) -+{ -+ BAND_TYPE band = BAND_MAX; -+ int i; -+ u8 gid = 0; /* invalid */ -+ -+ if (rtw_is_2g_ch(ch)) -+ band = BAND_ON_2_4G; -+ else if (rtw_is_5g_ch(ch)) -+ band = BAND_ON_5G; -+ else -+ goto exit; -+ -+ switch (bw) { -+ case CHANNEL_WIDTH_20: -+ case CHANNEL_WIDTH_40: -+ case CHANNEL_WIDTH_80: -+ case CHANNEL_WIDTH_160: -+ #if 0 /* TODO */ -+ case CHANNEL_WIDTH_80_80: -+ #endif -+ break; -+ default: -+ goto exit; -+ } -+ -+ for (i = 0; i < global_op_class_num; i++) { -+ if (band != global_op_class[i].band) -+ continue; -+ -+ if (opc_bw_to_ch_width(global_op_class[i].bw) != bw) -+ continue; -+ -+ if ((global_op_class[i].bw == OPC_BW40PLUS -+ && offset != HAL_PRIME_CHNL_OFFSET_LOWER) -+ || (global_op_class[i].bw == OPC_BW40MINUS -+ && offset != HAL_PRIME_CHNL_OFFSET_UPPER) -+ ) -+ continue; -+ -+ if (is_valid_global_op_class_ch(&global_op_class[i], ch)) -+ goto get; -+ } -+ -+get: -+ if (i < global_op_class_num) { -+ #if 0 /* TODO */ -+ if (bw == CHANNEL_WIDTH_80_80) { -+ /* search another ch */ -+ if (!is_valid_global_op_class_ch(&global_op_class[i], ch2)) -+ goto exit; -+ } -+ #endif -+ -+ gid = global_op_class[i].class_id; -+ } -+ -+exit: -+ return gid; -+} -+ -+u8 rtw_get_bw_offset_by_op_class_ch(u8 gid, u8 ch, u8 *bw, u8 *offset) -+{ -+ enum opc_bw opc_bw; -+ u8 valid = 0; -+ int i; -+ -+ opc_bw = get_global_opc_bw_by_id(gid); -+ if (opc_bw == OPC_BW_NUM) -+ goto exit; -+ -+ *bw = opc_bw_to_ch_width(opc_bw); -+ -+ if (opc_bw == OPC_BW40PLUS) -+ *offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ else if (opc_bw == OPC_BW40MINUS) -+ *offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ -+ if (rtw_get_offset_by_chbw(ch, *bw, offset)) -+ valid = 1; -+ -+exit: -+ return valid; -+} -+ -+static struct op_class_pref_t *opc_pref_alloc(u8 class_id) -+{ -+ int i, j; -+ struct op_class_pref_t *opc_pref = NULL; -+ -+ for (i = 0; i < global_op_class_num; i++) -+ if (global_op_class[i].class_id == class_id) -+ break; -+ -+ if (i >= global_op_class_num) -+ goto exit; -+ -+ opc_pref = rtw_zmalloc(sizeof(*opc_pref)); -+ if (!opc_pref) -+ goto exit; -+ -+ opc_pref->class_id = global_op_class[i].class_id; -+ opc_pref->band = global_op_class[i].band; -+ opc_pref->bw = global_op_class[i].bw; -+ -+ for (j = 0; j < OPC_CH_LIST_LEN(global_op_class[i]); j++) { -+ opc_pref->chs[j].ch = OPC_CH_LIST_CH(global_op_class[i], j); -+ opc_pref->chs[j].static_non_op = 1; -+ opc_pref->chs[j].no_ir = 1; -+ opc_pref->chs[j].max_txpwr = UNSPECIFIED_MBM; -+ } -+ opc_pref->ch_num = OPC_CH_LIST_LEN(global_op_class[i]); -+ -+exit: -+ return opc_pref; -+} -+ -+static void opc_pref_free(struct op_class_pref_t *opc_pref) -+{ -+ rtw_mfree(opc_pref, sizeof(*opc_pref)); -+} -+ -+int op_class_pref_init(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ u8 bw; -+ struct op_class_pref_t *opc_pref; -+ int i; -+ u8 op_class_num = 0; -+ u8 band_bmp = 0; -+ u8 bw_bmp[BAND_MAX] = {0}; -+ int ret = _FAIL; -+ -+ rfctl->spt_op_class_ch = rtw_zmalloc(sizeof(struct op_class_pref_t *) * global_op_class_num); -+ if (!rfctl->spt_op_class_ch) { -+ RTW_ERR("%s alloc rfctl->spt_op_class_ch fail\n", __func__); -+ goto exit; -+ } -+ -+ if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(adapter, BAND_CAP_2G)) -+ band_bmp |= BAND_CAP_2G; -+ if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(adapter, BAND_CAP_5G)) -+ band_bmp |= BAND_CAP_5G; -+ -+ bw_bmp[BAND_ON_2_4G] = (ch_width_to_bw_cap(REGSTY_BW_2G(regsty) + 1) - 1) & (GET_HAL_SPEC(adapter)->bw_cap); -+ bw_bmp[BAND_ON_5G] = (ch_width_to_bw_cap(REGSTY_BW_5G(regsty) + 1) - 1) & (GET_HAL_SPEC(adapter)->bw_cap); -+ if (!REGSTY_IS_11AC_ENABLE(regsty) -+ || !is_supported_vht(regsty->wireless_mode) -+ ) -+ bw_bmp[BAND_ON_5G] &= ~(BW_CAP_80M | BW_CAP_160M); -+ -+ if (0) { -+ RTW_INFO("REGSTY_BW_2G(regsty):%u\n", REGSTY_BW_2G(regsty)); -+ RTW_INFO("REGSTY_BW_5G(regsty):%u\n", REGSTY_BW_5G(regsty)); -+ RTW_INFO("GET_HAL_SPEC(adapter)->bw_cap:0x%x\n", GET_HAL_SPEC(adapter)->bw_cap); -+ RTW_INFO("band_bmp:0x%x\n", band_bmp); -+ RTW_INFO("bw_bmp[2G]:0x%x\n", bw_bmp[BAND_ON_2_4G]); -+ RTW_INFO("bw_bmp[5G]:0x%x\n", bw_bmp[BAND_ON_5G]); -+ } -+ -+ for (i = 0; i < global_op_class_num; i++) { -+ #ifdef CONFIG_RTW_DEBUG -+ rtw_warn_on(!dbg_global_op_class_validate(i)); -+ #endif -+ -+ if (!(band_bmp & band_to_band_cap(global_op_class[i].band))) -+ continue; -+ -+ bw = opc_bw_to_ch_width(global_op_class[i].bw); -+ if (bw == CHANNEL_WIDTH_MAX -+ || bw == CHANNEL_WIDTH_80_80 /* TODO */ -+ ) -+ continue; -+ -+ if (!(bw_bmp[global_op_class[i].band] & ch_width_to_bw_cap(bw))) -+ continue; -+ -+ opc_pref = opc_pref_alloc(global_op_class[i].class_id); -+ if (!opc_pref) { -+ RTW_ERR("%s opc_pref_alloc(%u) fail\n", __func__, global_op_class[i].class_id); -+ goto exit; -+ } -+ -+ if (opc_pref->ch_num) { -+ rfctl->spt_op_class_ch[i] = opc_pref; -+ op_class_num++; -+ } else -+ opc_pref_free(opc_pref); -+ } -+ -+ rfctl->cap_spt_op_class_num = op_class_num; -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+void op_class_pref_deinit(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ int i; -+ -+ if (!rfctl->spt_op_class_ch) -+ return; -+ -+ for (i = 0; i < global_op_class_num; i++) { -+ if (rfctl->spt_op_class_ch[i]) { -+ opc_pref_free(rfctl->spt_op_class_ch[i]); -+ rfctl->spt_op_class_ch[i] = NULL; -+ } -+ } -+ -+ rtw_mfree(rfctl->spt_op_class_ch, sizeof(struct op_class_pref_t *) * global_op_class_num); -+ rfctl->spt_op_class_ch = NULL; -+} -+ -+void op_class_pref_apply_regulatory(_adapter *adapter, u8 reason) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ u8 ch, bw, offset, cch; -+ struct op_class_pref_t *opc_pref; -+ int i, j; -+ u8 reg_op_class_num = 0; -+ u8 op_class_num = 0; -+ -+ for (i = 0; i < global_op_class_num; i++) { -+ if (!rfctl->spt_op_class_ch[i]) -+ continue; -+ opc_pref = rfctl->spt_op_class_ch[i]; -+ -+ /* reset all channel */ -+ for (j = 0; opc_pref->chs[j].ch != 0; j++) { -+ if (reason >= REG_CHANGE) -+ opc_pref->chs[j].static_non_op = 1; -+ if (reason != REG_TXPWR_CHANGE) -+ opc_pref->chs[j].no_ir = 1; -+ if (reason >= REG_TXPWR_CHANGE) -+ opc_pref->chs[j].max_txpwr = UNSPECIFIED_MBM; -+ } -+ if (reason >= REG_CHANGE) -+ opc_pref->op_ch_num = 0; -+ if (reason != REG_TXPWR_CHANGE) -+ opc_pref->ir_ch_num = 0; -+ -+ switch (opc_pref->bw) { -+ case OPC_BW20: -+ bw = CHANNEL_WIDTH_20; -+ offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case OPC_BW40PLUS: -+ bw = CHANNEL_WIDTH_40; -+ offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ case OPC_BW40MINUS: -+ bw = CHANNEL_WIDTH_40; -+ offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ case OPC_BW80: -+ bw = CHANNEL_WIDTH_80; -+ offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case OPC_BW160: -+ bw = CHANNEL_WIDTH_160; -+ offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case OPC_BW80P80: /* TODO */ -+ default: -+ continue; -+ } -+ -+ if (rfctl->country_ent && !COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent) -+ && (bw == CHANNEL_WIDTH_80 || bw == CHANNEL_WIDTH_160)) -+ continue; -+ -+ for (j = 0; opc_pref->chs[j].ch != 0; j++) { -+ u8 *op_chs; -+ u8 op_ch_num; -+ u8 k, l; -+ int chset_idx; -+ -+ ch = opc_pref->chs[j].ch; -+ -+ if (reason >= REG_TXPWR_CHANGE) -+ opc_pref->chs[j].max_txpwr = rtw_rfctl_get_reg_max_txpwr_mbm(rfctl, ch, bw, offset, 1); -+ -+ if (reason == REG_TXPWR_CHANGE) -+ continue; -+ -+ cch = rtw_get_center_ch(ch ,bw, offset); -+ if (!cch) -+ continue; -+ -+ if (!rtw_get_op_chs_by_cch_bw(cch, bw, &op_chs, &op_ch_num)) -+ continue; -+ -+ for (k = 0, l = 0; k < op_ch_num; k++) { -+ chset_idx = rtw_chset_search_ch(chset, *(op_chs + k)); -+ if (chset_idx == -1) -+ break; -+ if (bw >= CHANNEL_WIDTH_40) { -+ if ((chset[chset_idx].flags & RTW_CHF_NO_HT40U) && k % 2 == 0) -+ break; -+ if ((chset[chset_idx].flags & RTW_CHF_NO_HT40L) && k % 2 == 1) -+ break; -+ } -+ if (bw >= CHANNEL_WIDTH_80 && (chset[chset_idx].flags & RTW_CHF_NO_80MHZ)) -+ break; -+ if (bw >= CHANNEL_WIDTH_160 && (chset[chset_idx].flags & RTW_CHF_NO_160MHZ)) -+ break; -+ if ((chset[chset_idx].flags & RTW_CHF_DFS) && rtw_rfctl_dfs_domain_unknown(rfctl)) -+ continue; -+ if (chset[chset_idx].flags & RTW_CHF_NO_IR) -+ continue; -+ l++; -+ } -+ if (k < op_ch_num) -+ continue; -+ -+ if (reason >= REG_CHANGE) { -+ opc_pref->chs[j].static_non_op = 0; -+ opc_pref->op_ch_num++; -+ } -+ -+ if (l >= op_ch_num) { -+ opc_pref->chs[j].no_ir = 0; -+ opc_pref->ir_ch_num++; -+ } -+ } -+ -+ if (opc_pref->op_ch_num) -+ reg_op_class_num++; -+ if (opc_pref->ir_ch_num) -+ op_class_num++; -+ } -+ -+ rfctl->reg_spt_op_class_num = reg_op_class_num; -+ rfctl->cur_spt_op_class_num = op_class_num; -+} -+ -+static void dump_opc_pref_single(void *sel, struct op_class_pref_t *opc_pref, bool show_snon_ocp, bool show_no_ir, bool detail) -+{ -+ u8 i; -+ u8 ch_num = 0; -+ char buf[256]; -+ char *pos = buf; -+ -+ if (!show_snon_ocp && !opc_pref->op_ch_num) -+ return; -+ if (!show_no_ir && !opc_pref->ir_ch_num) -+ return; -+ -+ for (i = 0; opc_pref->chs[i].ch != 0; i++) { -+ if ((show_snon_ocp || !opc_pref->chs[i].static_non_op) -+ && (show_no_ir || !opc_pref->chs[i].no_ir) -+ ) { -+ if (detail) -+ pos += snprintf(pos, 256 - (pos - buf), " %4u", opc_pref->chs[i].ch); -+ else -+ pos += snprintf(pos, 256 - (pos - buf), " %u", opc_pref->chs[i].ch); -+ } -+ } -+ -+ RTW_PRINT_SEL(sel, "%5u %4s %7s%s\n" -+ , opc_pref->class_id -+ , band_str(opc_pref->band) -+ , opc_bw_str(opc_pref->bw), buf); -+ -+ if (!detail) -+ return; -+ -+ pos = buf; -+ for (i = 0; opc_pref->chs[i].ch != 0; i++) { -+ if ((show_snon_ocp || !opc_pref->chs[i].static_non_op) -+ && (show_no_ir || !opc_pref->chs[i].no_ir) -+ ) { -+ pos += snprintf(pos, 256 - (pos - buf), " %c%c" -+ , opc_pref->chs[i].no_ir ? ' ' : 'I' -+ , opc_pref->chs[i].static_non_op ? ' ' : 'E' -+ ); -+ } -+ } -+ RTW_PRINT_SEL(sel, " %s\n", buf); -+ -+ pos = buf; -+ for (i = 0; opc_pref->chs[i].ch != 0; i++) { -+ if ((show_snon_ocp || !opc_pref->chs[i].static_non_op) -+ && (show_no_ir || !opc_pref->chs[i].no_ir) -+ ) { -+ if (opc_pref->chs[i].max_txpwr == UNSPECIFIED_MBM) -+ pos += snprintf(pos, 256 - (pos - buf), " "); -+ else -+ pos += snprintf(pos, 256 - (pos - buf), " %4d", opc_pref->chs[i].max_txpwr); -+ } -+ } -+ RTW_PRINT_SEL(sel, " %s\n", buf); -+} -+ -+void dump_cap_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail) -+{ -+ u8 i; -+ -+ dump_op_class_ch_title(sel); -+ -+ for (i = 0; i < global_op_class_num; i++) { -+ if (!rfctl->spt_op_class_ch[i]) -+ continue; -+ dump_opc_pref_single(sel, rfctl->spt_op_class_ch[i], 1, 1, detail); -+ } -+ -+ RTW_PRINT_SEL(sel, "op_class number:%d\n", rfctl->cap_spt_op_class_num); -+} -+ -+void dump_reg_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail) -+{ -+ u8 i; -+ -+ dump_op_class_ch_title(sel); -+ -+ for (i = 0; i < global_op_class_num; i++) { -+ if (!rfctl->spt_op_class_ch[i]) -+ continue; -+ dump_opc_pref_single(sel, rfctl->spt_op_class_ch[i], 0, 1, detail); -+ } -+ -+ RTW_PRINT_SEL(sel, "op_class number:%d\n", rfctl->reg_spt_op_class_num); -+} -+ -+void dump_cur_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail) -+{ -+ u8 i; -+ -+ dump_op_class_ch_title(sel); -+ -+ for (i = 0; i < global_op_class_num; i++) { -+ if (!rfctl->spt_op_class_ch[i]) -+ continue; -+ dump_opc_pref_single(sel, rfctl->spt_op_class_ch[i], 0, 0, detail); -+ } -+ -+ RTW_PRINT_SEL(sel, "op_class number:%d\n", rfctl->cur_spt_op_class_num); -+} -+ -+const u8 _rf_type_to_rf_tx_cnt[RF_TYPE_MAX] = { -+ [RF_1T1R] = 1, -+ [RF_1T2R] = 1, -+ [RF_1T3R] = 1, -+ [RF_1T4R] = 1, -+ [RF_2T1R] = 2, -+ [RF_2T2R] = 2, -+ [RF_2T3R] = 2, -+ [RF_2T4R] = 2, -+ [RF_3T1R] = 3, -+ [RF_3T2R] = 3, -+ [RF_3T3R] = 3, -+ [RF_3T4R] = 3, -+ [RF_4T1R] = 4, -+ [RF_4T2R] = 4, -+ [RF_4T3R] = 4, -+ [RF_4T4R] = 4, -+}; -+ -+const u8 _rf_type_to_rf_rx_cnt[RF_TYPE_MAX] = { -+ [RF_1T1R] = 1, -+ [RF_1T2R] = 2, -+ [RF_1T3R] = 3, -+ [RF_1T4R] = 4, -+ [RF_2T1R] = 1, -+ [RF_2T2R] = 2, -+ [RF_2T3R] = 3, -+ [RF_2T4R] = 4, -+ [RF_3T1R] = 1, -+ [RF_3T2R] = 2, -+ [RF_3T3R] = 3, -+ [RF_3T4R] = 4, -+ [RF_4T1R] = 1, -+ [RF_4T2R] = 2, -+ [RF_4T3R] = 3, -+ [RF_4T4R] = 4, -+}; -+ -+const char *const _rf_type_to_rfpath_str[RF_TYPE_MAX] = { -+ [RF_1T1R] = "RF_1T1R", -+ [RF_1T2R] = "RF_1T2R", -+ [RF_1T3R] = "RF_1T3R", -+ [RF_1T4R] = "RF_1T4R", -+ [RF_2T1R] = "RF_2T1R", -+ [RF_2T2R] = "RF_2T2R", -+ [RF_2T3R] = "RF_2T3R", -+ [RF_2T4R] = "RF_2T4R", -+ [RF_3T1R] = "RF_3T1R", -+ [RF_3T2R] = "RF_3T2R", -+ [RF_3T3R] = "RF_3T3R", -+ [RF_3T4R] = "RF_3T4R", -+ [RF_4T1R] = "RF_4T1R", -+ [RF_4T2R] = "RF_4T2R", -+ [RF_4T3R] = "RF_4T3R", -+ [RF_4T4R] = "RF_4T4R", -+}; -+ -+void rf_type_to_default_trx_bmp(enum rf_type rf, enum bb_path *tx, enum bb_path *rx) -+{ -+ u8 tx_num = rf_type_to_rf_tx_cnt(rf); -+ u8 rx_num = rf_type_to_rf_rx_cnt(rf); -+ int i; -+ -+ *tx = *rx = 0; -+ -+ for (i = 0; i < tx_num; i++) -+ *tx |= BIT(i); -+ for (i = 0; i < rx_num; i++) -+ *rx |= BIT(i); -+} -+ -+static const u8 _trx_num_to_rf_type[RF_PATH_MAX][RF_PATH_MAX] = { -+ {RF_1T1R, RF_1T2R, RF_1T3R, RF_1T4R}, -+ {RF_2T1R, RF_2T2R, RF_2T3R, RF_2T4R}, -+ {RF_3T1R, RF_3T2R, RF_3T3R, RF_3T4R}, -+ {RF_4T1R, RF_4T2R, RF_4T3R, RF_4T4R}, -+}; -+ -+enum rf_type trx_num_to_rf_type(u8 tx_num, u8 rx_num) -+{ -+ if (tx_num > 0 && tx_num <= RF_PATH_MAX && rx_num > 0 && rx_num <= RF_PATH_MAX) -+ return _trx_num_to_rf_type[tx_num - 1][rx_num - 1]; -+ return RF_TYPE_MAX; -+} -+ -+enum rf_type trx_bmp_to_rf_type(u8 tx_bmp, u8 rx_bmp) -+{ -+ u8 tx_num = 0; -+ u8 rx_num = 0; -+ int i; -+ -+ for (i = 0; i < RF_PATH_MAX; i++) { -+ if (tx_bmp >> i & BIT0) -+ tx_num++; -+ if (rx_bmp >> i & BIT0) -+ rx_num++; -+ } -+ -+ return trx_num_to_rf_type(tx_num, rx_num); -+} -+ -+bool rf_type_is_a_in_b(enum rf_type a, enum rf_type b) -+{ -+ return rf_type_to_rf_tx_cnt(a) <= rf_type_to_rf_tx_cnt(b) -+ && rf_type_to_rf_rx_cnt(a) <= rf_type_to_rf_rx_cnt(b); -+} -+ -+static void rtw_path_bmp_limit_from_higher(u8 *bmp, u8 *bmp_bit_cnt, u8 bit_cnt_lmt) -+{ -+ int i; -+ -+ for (i = RF_PATH_MAX - 1; *bmp_bit_cnt > bit_cnt_lmt && i >= 0; i--) { -+ if (*bmp & BIT(i)) { -+ *bmp &= ~BIT(i); -+ (*bmp_bit_cnt)--; -+ } -+ } -+} -+ -+u8 rtw_restrict_trx_path_bmp_by_trx_num_lmt(u8 trx_path_bmp, u8 tx_num_lmt, u8 rx_num_lmt, u8 *tx_num, u8 *rx_num) -+{ -+ u8 bmp_tx = (trx_path_bmp & 0xF0) >> 4; -+ u8 bmp_rx = trx_path_bmp & 0x0F; -+ u8 bmp_tx_num = 0, bmp_rx_num = 0; -+ enum rf_type ret_type = RF_TYPE_MAX; -+ int i, j; -+ -+ for (i = 0; i < RF_PATH_MAX; i++) { -+ if (bmp_tx & BIT(i)) -+ bmp_tx_num++; -+ if (bmp_rx & BIT(i)) -+ bmp_rx_num++; -+ } -+ -+ /* limit higher bit first according to input type */ -+ if (tx_num_lmt) -+ rtw_path_bmp_limit_from_higher(&bmp_tx, &bmp_tx_num, tx_num_lmt); -+ if (rx_num_lmt) -+ rtw_path_bmp_limit_from_higher(&bmp_rx, &bmp_rx_num, rx_num_lmt); -+ -+ /* search for valid rf_type (larger RX prefer) */ -+ for (j = bmp_rx_num; j > 0; j--) { -+ for (i = bmp_tx_num; i > 0; i--) { -+ ret_type = trx_num_to_rf_type(i, j); -+ if (RF_TYPE_VALID(ret_type)) { -+ rtw_path_bmp_limit_from_higher(&bmp_tx, &bmp_tx_num, i); -+ rtw_path_bmp_limit_from_higher(&bmp_rx, &bmp_rx_num, j); -+ if (tx_num) -+ *tx_num = bmp_tx_num; -+ if (rx_num) -+ *rx_num = bmp_rx_num; -+ goto exit; -+ } -+ } -+ } -+ -+exit: -+ return RF_TYPE_VALID(ret_type) ? ((bmp_tx << 4) | bmp_rx) : 0x00; -+} -+ -+u8 rtw_restrict_trx_path_bmp_by_rftype(u8 trx_path_bmp, enum rf_type type, u8 *tx_num, u8 *rx_num) -+{ -+ return rtw_restrict_trx_path_bmp_by_trx_num_lmt(trx_path_bmp -+ , rf_type_to_rf_tx_cnt(type), rf_type_to_rf_rx_cnt(type), tx_num, rx_num); -+} -+ -+/* config to non N-TX value, path with lower index prefer */ -+void tx_path_nss_set_default(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath) -+{ -+ int i, j; -+ u8 cnt; -+ -+ for (i = 4; i > 0; i--) { -+ cnt = 0; -+ txpath_nss[i - 1] = 0; -+ for (j = 0; j < RF_PATH_MAX; j++) { -+ if (txpath & BIT(j)) { -+ txpath_nss[i - 1] |= BIT(j); -+ if (++cnt == i) -+ break; -+ } -+ } -+ txpath_num_nss[i - 1] = i; -+ } -+} -+ -+/* config to full N-TX value */ -+void tx_path_nss_set_full_tx(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath) -+{ -+ u8 tx_num = 0; -+ int i; -+ -+ for (i = 0; i < RF_PATH_MAX; i++) -+ if (txpath & BIT(i)) -+ tx_num++; -+ -+ for (i = 4; i > 0; i--) { -+ txpath_nss[i - 1] = txpath; -+ txpath_num_nss[i - 1] = tx_num; -+ } -+} -+ -+const char *const _regd_str[] = { -+ "NONE", -+ "FCC", -+ "MKK", -+ "ETSI", -+ "IC", -+ "KCC", -+ "NCC", -+ "ACMA", -+ "CHILE", -+ "UKRAINE", -+ "MEXICO", -+ "CN", -+ "WW", -+}; -+ -+/* -+* input with txpwr value in unit of txpwr index -+* return string in length 6 at least (for -xx.xx) -+*/ -+void txpwr_idx_get_dbm_str(s8 idx, u8 txgi_max, u8 txgi_pdbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len) -+{ -+ char fmt[16]; -+ -+ if (idx == txgi_max) { -+ snprintf(fmt, 16, "%%%zus", cwidth >= 6 ? cwidth + 1 : 6); -+ snprintf(dbm_str, dbm_str_len, fmt, "NA"); -+ } else if (idx > -txgi_pdbm && idx < 0) { /* -0.xx */ -+ snprintf(fmt, 16, "%%%zus-0.%%02d", cwidth >= 6 ? cwidth - 4 : 1); -+ snprintf(dbm_str, dbm_str_len, fmt, "", (rtw_abs(idx) % txgi_pdbm) * 100 / txgi_pdbm); -+ } else if (idx % txgi_pdbm) { /* d.xx */ -+ snprintf(fmt, 16, "%%%zud.%%02d", cwidth >= 6 ? cwidth - 2 : 3); -+ snprintf(dbm_str, dbm_str_len, fmt, idx / txgi_pdbm, (rtw_abs(idx) % txgi_pdbm) * 100 / txgi_pdbm); -+ } else { /* d */ -+ snprintf(fmt, 16, "%%%zud", cwidth >= 6 ? cwidth + 1 : 6); -+ snprintf(dbm_str, dbm_str_len, fmt, idx / txgi_pdbm); -+ } -+} -+ -+/* -+* input with txpwr value in unit of mbm -+* return string in length 6 at least (for -xx.xx) -+*/ -+void txpwr_mbm_get_dbm_str(s16 mbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len) -+{ -+ char fmt[16]; -+ -+ if (mbm == UNSPECIFIED_MBM) { -+ snprintf(fmt, 16, "%%%zus", cwidth >= 6 ? cwidth + 1 : 6); -+ snprintf(dbm_str, dbm_str_len, fmt, "NA"); -+ } else if (mbm > -MBM_PDBM && mbm < 0) { /* -0.xx */ -+ snprintf(fmt, 16, "%%%zus-0.%%02d", cwidth >= 6 ? cwidth - 4 : 1); -+ snprintf(dbm_str, dbm_str_len, fmt, "", (rtw_abs(mbm) % MBM_PDBM) * 100 / MBM_PDBM); -+ } else if (mbm % MBM_PDBM) { /* d.xx */ -+ snprintf(fmt, 16, "%%%zud.%%02d", cwidth >= 6 ? cwidth - 2 : 3); -+ snprintf(dbm_str, dbm_str_len, fmt, mbm / MBM_PDBM, (rtw_abs(mbm) % MBM_PDBM) * 100 / MBM_PDBM); -+ } else { /* d */ -+ snprintf(fmt, 16, "%%%zud", cwidth >= 6 ? cwidth + 1 : 6); -+ snprintf(dbm_str, dbm_str_len, fmt, mbm / MBM_PDBM); -+ } -+} -+ -+static const s16 _mb_of_ntx[] = { -+ 0, /* 1TX */ -+ 301, /* 2TX */ -+ 477, /* 3TX */ -+ 602, /* 4TX */ -+ 699, /* 5TX */ -+ 778, /* 6TX */ -+ 845, /* 7TX */ -+ 903, /* 8TX */ -+}; -+ -+/* get mB(100 *dB) for specifc TX count relative to 1TX */ -+s16 mb_of_ntx(u8 ntx) -+{ -+ if (ntx == 0 || ntx > 8) { -+ RTW_ERR("ntx=%u, out of range\n", ntx); -+ rtw_warn_on(1); -+ } -+ -+ return _mb_of_ntx[ntx - 1]; -+} -+ -+#if CONFIG_TXPWR_LIMIT -+void _dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl) -+{ -+ struct regd_exc_ent *ent; -+ _list *cur, *head; -+ -+ RTW_PRINT_SEL(sel, "regd_exc_num:%u\n", rfctl->regd_exc_num); -+ -+ if (!rfctl->regd_exc_num) -+ goto exit; -+ -+ RTW_PRINT_SEL(sel, "%-7s %-6s %-9s\n", "country", "domain", "regd_name"); -+ -+ head = &rfctl->reg_exc_list; -+ cur = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ u8 has_country; -+ -+ ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list); -+ cur = get_next(cur); -+ has_country = (ent->country[0] == '\0' && ent->country[1] == '\0') ? 0 : 1; -+ -+ RTW_PRINT_SEL(sel, " %c%c 0x%02x %s\n" -+ , has_country ? ent->country[0] : '0' -+ , has_country ? ent->country[1] : '0' -+ , ent->domain -+ , ent->regd_name -+ ); -+ } -+ -+exit: -+ return; -+} -+ -+inline void dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl) -+{ -+ _irqL irqL; -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ _dump_regd_exc_list(sel, rfctl); -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+} -+ -+void rtw_regd_exc_add_with_nlen(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name, u32 nlen) -+{ -+ struct regd_exc_ent *ent; -+ _irqL irqL; -+ -+ if (!regd_name || !nlen) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ ent = (struct regd_exc_ent *)rtw_zmalloc(sizeof(struct regd_exc_ent) + nlen + 1); -+ if (!ent) -+ goto exit; -+ -+ _rtw_init_listhead(&ent->list); -+ if (country) -+ _rtw_memcpy(ent->country, country, 2); -+ ent->domain = domain; -+ _rtw_memcpy(ent->regd_name, regd_name, nlen); -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ rtw_list_insert_tail(&ent->list, &rfctl->reg_exc_list); -+ rfctl->regd_exc_num++; -+ -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+exit: -+ return; -+} -+ -+inline void rtw_regd_exc_add(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name) -+{ -+ rtw_regd_exc_add_with_nlen(rfctl, country, domain, regd_name, strlen(regd_name)); -+} -+ -+struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain) -+{ -+ struct regd_exc_ent *ent; -+ _list *cur, *head; -+ u8 match = 0; -+ -+ head = &rfctl->reg_exc_list; -+ cur = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ u8 has_country; -+ -+ ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list); -+ cur = get_next(cur); -+ has_country = (ent->country[0] == '\0' && ent->country[1] == '\0') ? 0 : 1; -+ -+ /* entry has country condition to match */ -+ if (has_country) { -+ if (!country) -+ continue; -+ if (ent->country[0] != country[0] -+ || ent->country[1] != country[1]) -+ continue; -+ } -+ -+ /* entry has domain condition to match */ -+ if (ent->domain != 0xFF) { -+ if (domain == 0xFF) -+ continue; -+ if (ent->domain != domain) -+ continue; -+ } -+ -+ match = 1; -+ break; -+ } -+ -+ if (match) -+ return ent; -+ else -+ return NULL; -+} -+ -+inline struct regd_exc_ent *rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain) -+{ -+ struct regd_exc_ent *ent; -+ _irqL irqL; -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ ent = _rtw_regd_exc_search(rfctl, country, domain); -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ return ent; -+} -+ -+void rtw_regd_exc_list_free(struct rf_ctl_t *rfctl) -+{ -+ struct regd_exc_ent *ent; -+ _irqL irqL; -+ _list *cur, *head; -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ head = &rfctl->reg_exc_list; -+ cur = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list); -+ cur = get_next(cur); -+ rtw_list_delete(&ent->list); -+ rtw_mfree((u8 *)ent, sizeof(struct regd_exc_ent) + strlen(ent->regd_name) + 1); -+ } -+ rfctl->regd_exc_num = 0; -+ -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+} -+ -+void dump_txpwr_lmt(void *sel, _adapter *adapter) -+{ -+#define TMP_STR_LEN 16 -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ _irqL irqL; -+ char fmt[16]; -+ char tmp_str[TMP_STR_LEN]; -+ s8 *lmt_idx = NULL; -+ int bw, band, ch_num, tlrs, ntx_idx, rs, i, path; -+ u8 ch, n, rfpath_num; -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ _dump_regd_exc_list(sel, rfctl); -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ if (!rfctl->txpwr_regd_num) -+ goto release_lock; -+ -+ lmt_idx = rtw_malloc(sizeof(s8) * RF_PATH_MAX * rfctl->txpwr_regd_num); -+ if (!lmt_idx) { -+ RTW_ERR("%s alloc fail\n", __func__); -+ goto release_lock; -+ } -+ -+ RTW_PRINT_SEL(sel, "txpwr_lmt_2g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_2g_cck_ofdm_state); -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ if (IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) { -+ RTW_PRINT_SEL(sel, "txpwr_lmt_5g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_5g_cck_ofdm_state); -+ RTW_PRINT_SEL(sel, "txpwr_lmt_5g_20_40_ref:0x%02x\n", rfctl->txpwr_lmt_5g_20_40_ref); -+ } -+ #endif -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { -+ if (!hal_is_band_support(adapter, band)) -+ continue; -+ -+ rfpath_num = (band == BAND_ON_2_4G ? hal_spec->rfpath_num_2g : hal_spec->rfpath_num_5g); -+ -+ for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; bw++) { -+ -+ if (bw >= CHANNEL_WIDTH_160) -+ break; -+ if (band == BAND_ON_2_4G && bw >= CHANNEL_WIDTH_80) -+ break; -+ -+ if (band == BAND_ON_2_4G) -+ ch_num = CENTER_CH_2G_NUM; -+ else -+ ch_num = center_chs_5g_num(bw); -+ -+ if (ch_num == 0) { -+ rtw_warn_on(1); -+ break; -+ } -+ -+ for (tlrs = TXPWR_LMT_RS_CCK; tlrs < TXPWR_LMT_RS_NUM; tlrs++) { -+ -+ if (band == BAND_ON_2_4G && tlrs == TXPWR_LMT_RS_VHT) -+ continue; -+ if (band == BAND_ON_5G && tlrs == TXPWR_LMT_RS_CCK) -+ continue; -+ if (bw > CHANNEL_WIDTH_20 && (tlrs == TXPWR_LMT_RS_CCK || tlrs == TXPWR_LMT_RS_OFDM)) -+ continue; -+ if (bw > CHANNEL_WIDTH_40 && tlrs == TXPWR_LMT_RS_HT) -+ continue; -+ if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ continue; -+ -+ for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { -+ struct txpwr_lmt_ent *ent; -+ _list *cur, *head; -+ -+ if (ntx_idx + 1 > hal_data->max_tx_cnt) -+ continue; -+ -+ /* bypass CCK multi-TX is not defined */ -+ if (tlrs == TXPWR_LMT_RS_CCK && ntx_idx > RF_1TX) { -+ if (band == BAND_ON_2_4G -+ && !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_CCK_1T << ntx_idx))) -+ continue; -+ } -+ -+ /* bypass OFDM multi-TX is not defined */ -+ if (tlrs == TXPWR_LMT_RS_OFDM && ntx_idx > RF_1TX) { -+ if (band == BAND_ON_2_4G -+ && !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx))) -+ continue; -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ if (band == BAND_ON_5G -+ && !(rfctl->txpwr_lmt_5g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx))) -+ continue; -+ #endif -+ } -+ -+ /* bypass 5G 20M, 40M pure reference */ -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ if (band == BAND_ON_5G && (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)) { -+ if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_HT_FROM_VHT) { -+ if (tlrs == TXPWR_LMT_RS_HT) -+ continue; -+ } else if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_VHT_FROM_HT) { -+ if (tlrs == TXPWR_LMT_RS_VHT && bw <= CHANNEL_WIDTH_40) -+ continue; -+ } -+ } -+ #endif -+ -+ /* choose n-SS mapping rate section to get lmt diff value */ -+ if (tlrs == TXPWR_LMT_RS_CCK) -+ rs = CCK; -+ else if (tlrs == TXPWR_LMT_RS_OFDM) -+ rs = OFDM; -+ else if (tlrs == TXPWR_LMT_RS_HT) -+ rs = HT_1SS + ntx_idx; -+ else if (tlrs == TXPWR_LMT_RS_VHT) -+ rs = VHT_1SS + ntx_idx; -+ else { -+ RTW_ERR("%s invalid tlrs %u\n", __func__, tlrs); -+ continue; -+ } -+ -+ RTW_PRINT_SEL(sel, "[%s][%s][%s][%uT]\n" -+ , band_str(band) -+ , ch_width_str(bw) -+ , txpwr_lmt_rs_str(tlrs) -+ , ntx_idx + 1 -+ ); -+ -+ /* header for limit in db */ -+ RTW_PRINT_SEL(sel, "%3s ", "ch"); -+ -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ -+ sprintf(fmt, "%%%zus%%s ", strlen(ent->regd_name) >= 6 ? 1 : 6 - strlen(ent->regd_name)); -+ snprintf(tmp_str, TMP_STR_LEN, fmt -+ , strcmp(ent->regd_name, rfctl->regd_name) == 0 ? "*" : "" -+ , ent->regd_name); -+ _RTW_PRINT_SEL(sel, "%s", tmp_str); -+ } -+ sprintf(fmt, "%%%zus%%s ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? 1 : 6 - strlen(regd_str(TXPWR_LMT_WW))); -+ snprintf(tmp_str, TMP_STR_LEN, fmt -+ , strcmp(rfctl->regd_name, regd_str(TXPWR_LMT_WW)) == 0 ? "*" : "" -+ , regd_str(TXPWR_LMT_WW)); -+ _RTW_PRINT_SEL(sel, "%s", tmp_str); -+ -+ /* header for limit offset */ -+ for (path = 0; path < RF_PATH_MAX; path++) { -+ if (path >= rfpath_num) -+ break; -+ _RTW_PRINT_SEL(sel, "|"); -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ _RTW_PRINT_SEL(sel, "%3c " -+ , strcmp(ent->regd_name, rfctl->regd_name) == 0 ? rf_path_char(path) : ' '); -+ } -+ _RTW_PRINT_SEL(sel, "%3c " -+ , strcmp(rfctl->regd_name, regd_str(TXPWR_LMT_WW)) == 0 ? rf_path_char(path) : ' '); -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ -+ for (n = 0; n < ch_num; n++) { -+ s8 lmt; -+ s8 lmt_offset; -+ u8 base; -+ -+ if (band == BAND_ON_2_4G) -+ ch = n + 1; -+ else -+ ch = center_chs_5g(bw, n); -+ -+ if (ch == 0) { -+ rtw_warn_on(1); -+ break; -+ } -+ -+ /* dump limit in dBm */ -+ RTW_PRINT_SEL(sel, "%3u ", ch); -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ lmt = phy_get_txpwr_lmt(adapter, ent->regd_name, band, bw, tlrs, ntx_idx, ch, 0); -+ txpwr_idx_get_dbm_str(lmt, hal_spec->txgi_max, hal_spec->txgi_pdbm, strlen(ent->regd_name), tmp_str, TMP_STR_LEN); -+ _RTW_PRINT_SEL(sel, "%s ", tmp_str); -+ } -+ lmt = phy_get_txpwr_lmt(adapter, regd_str(TXPWR_LMT_WW), band, bw, tlrs, ntx_idx, ch, 0); -+ txpwr_idx_get_dbm_str(lmt, hal_spec->txgi_max, hal_spec->txgi_pdbm, strlen(regd_str(TXPWR_LMT_WW)), tmp_str, TMP_STR_LEN); -+ _RTW_PRINT_SEL(sel, "%s ", tmp_str); -+ -+ /* dump limit offset of each path */ -+ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) { -+ if (path >= rfpath_num) -+ break; -+ -+ base = phy_get_target_txpwr(adapter, band, path, rs); -+ -+ _RTW_PRINT_SEL(sel, "|"); -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ i = 0; -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ lmt_offset = phy_get_txpwr_lmt_diff(adapter, ent->regd_name, band, bw, path, rs, tlrs, ntx_idx, ch, 0); -+ if (lmt_offset == hal_spec->txgi_max) { -+ *(lmt_idx + i * RF_PATH_MAX + path) = hal_spec->txgi_max; -+ _RTW_PRINT_SEL(sel, "%3s ", "NA"); -+ } else { -+ *(lmt_idx + i * RF_PATH_MAX + path) = lmt_offset + base; -+ _RTW_PRINT_SEL(sel, "%3d ", lmt_offset); -+ } -+ i++; -+ } -+ lmt_offset = phy_get_txpwr_lmt_diff(adapter, regd_str(TXPWR_LMT_WW), band, bw, path, rs, tlrs, ntx_idx, ch, 0); -+ if (lmt_offset == hal_spec->txgi_max) -+ _RTW_PRINT_SEL(sel, "%3s ", "NA"); -+ else -+ _RTW_PRINT_SEL(sel, "%3d ", lmt_offset); -+ -+ } -+ -+ /* compare limit_idx of each path, print 'x' when mismatch */ -+ if (rfpath_num > 1) { -+ for (i = 0; i < rfctl->txpwr_regd_num; i++) { -+ for (path = 0; path < RF_PATH_MAX; path++) { -+ if (path >= rfpath_num) -+ break; -+ if (*(lmt_idx + i * RF_PATH_MAX + path) != *(lmt_idx + i * RF_PATH_MAX + ((path + 1) % rfpath_num))) -+ break; -+ } -+ if (path >= rfpath_num) -+ _RTW_PRINT_SEL(sel, " "); -+ else -+ _RTW_PRINT_SEL(sel, "x"); -+ } -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ } -+ } /* loop for rate sections */ -+ } /* loop for bandwidths */ -+ } /* loop for bands */ -+ -+ if (lmt_idx) -+ rtw_mfree(lmt_idx, sizeof(s8) * RF_PATH_MAX * rfctl->txpwr_regd_num); -+ -+release_lock: -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+} -+ -+/* search matcing first, if not found, alloc one */ -+void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, u32 nlen -+ , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl))); -+ struct txpwr_lmt_ent *ent; -+ _irqL irqL; -+ _list *cur, *head; -+ s8 pre_lmt; -+ -+ if (!regd_name || !nlen) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ /* search for existed entry */ -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ -+ if (strlen(ent->regd_name) == nlen -+ && _rtw_memcmp(ent->regd_name, regd_name, nlen) == _TRUE) -+ goto chk_lmt_val; -+ } -+ -+ /* alloc new one */ -+ ent = (struct txpwr_lmt_ent *)rtw_zvmalloc(sizeof(struct txpwr_lmt_ent) + nlen + 1); -+ if (!ent) -+ goto release_lock; -+ -+ _rtw_init_listhead(&ent->list); -+ _rtw_memcpy(ent->regd_name, regd_name, nlen); -+ { -+ u8 j, k, l, m; -+ -+ for (j = 0; j < MAX_2_4G_BANDWIDTH_NUM; ++j) -+ for (k = 0; k < TXPWR_LMT_RS_NUM_2G; ++k) -+ for (m = 0; m < CENTER_CH_2G_NUM; ++m) -+ for (l = 0; l < MAX_TX_COUNT; ++l) -+ ent->lmt_2g[j][k][m][l] = hal_spec->txgi_max; -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j) -+ for (k = 0; k < TXPWR_LMT_RS_NUM_5G; ++k) -+ for (m = 0; m < CENTER_CH_5G_ALL_NUM; ++m) -+ for (l = 0; l < MAX_TX_COUNT; ++l) -+ ent->lmt_5g[j][k][m][l] = hal_spec->txgi_max; -+ #endif -+ } -+ -+ rtw_list_insert_tail(&ent->list, &rfctl->txpwr_lmt_list); -+ rfctl->txpwr_regd_num++; -+ -+chk_lmt_val: -+ if (band == BAND_ON_2_4G) -+ pre_lmt = ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx]; -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ else if (band == BAND_ON_5G) -+ pre_lmt = ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx]; -+ #endif -+ else -+ goto release_lock; -+ -+ if (pre_lmt != hal_spec->txgi_max) -+ RTW_PRINT("duplicate txpwr_lmt for [%s][%s][%s][%s][%uT][%d]\n" -+ , regd_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1 -+ , band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]); -+ -+ lmt = rtw_min(pre_lmt, lmt); -+ if (band == BAND_ON_2_4G) -+ ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx] = lmt; -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ else if (band == BAND_ON_5G) -+ ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx] = lmt; -+ #endif -+ -+ if (0) -+ RTW_PRINT("%s, %4s, %6s, %7s, %uT, ch%3d = %d\n" -+ , regd_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1 -+ , band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx] -+ , lmt); -+ -+release_lock: -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+exit: -+ return; -+} -+ -+inline void rtw_txpwr_lmt_add(struct rf_ctl_t *rfctl, const char *regd_name -+ , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt) -+{ -+ rtw_txpwr_lmt_add_with_nlen(rfctl, regd_name, strlen(regd_name) -+ , band, bw, tlrs, ntx_idx, ch_idx, lmt); -+} -+ -+struct txpwr_lmt_ent *_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name) -+{ -+ struct txpwr_lmt_ent *ent; -+ _list *cur, *head; -+ u8 found = 0; -+ -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ -+ if (strcmp(ent->regd_name, regd_name) == 0) { -+ found = 1; -+ break; -+ } -+ } -+ -+ if (found) -+ return ent; -+ return NULL; -+} -+ -+inline struct txpwr_lmt_ent *rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name) -+{ -+ struct txpwr_lmt_ent *ent; -+ _irqL irqL; -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ ent = _rtw_txpwr_lmt_get_by_name(rfctl, regd_name); -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ return ent; -+} -+ -+void rtw_txpwr_lmt_list_free(struct rf_ctl_t *rfctl) -+{ -+ struct txpwr_lmt_ent *ent; -+ _irqL irqL; -+ _list *cur, *head; -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ if (ent->regd_name == rfctl->regd_name) -+ rfctl->regd_name = regd_str(TXPWR_LMT_NONE); -+ rtw_list_delete(&ent->list); -+ rtw_vmfree((u8 *)ent, sizeof(struct txpwr_lmt_ent) + strlen(ent->regd_name) + 1); -+ } -+ rfctl->txpwr_regd_num = 0; -+ -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+} -+#endif /* CONFIG_TXPWR_LIMIT */ -+ -+int rtw_ch_to_bb_gain_sel(int ch) -+{ -+ int sel = -1; -+ -+ if (ch >= 1 && ch <= 14) -+ sel = BB_GAIN_2G; -+#if CONFIG_IEEE80211_BAND_5GHZ -+ else if (ch >= 36 && ch < 48) -+ sel = BB_GAIN_5GLB1; -+ else if (ch >= 52 && ch <= 64) -+ sel = BB_GAIN_5GLB2; -+ else if (ch >= 100 && ch <= 120) -+ sel = BB_GAIN_5GMB1; -+ else if (ch >= 124 && ch <= 144) -+ sel = BB_GAIN_5GMB2; -+ else if (ch >= 149 && ch <= 177) -+ sel = BB_GAIN_5GHB; -+#endif -+ -+ return sel; -+} -+ -+s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch) -+{ -+ s8 kfree_offset = 0; -+ -+#ifdef CONFIG_RF_POWER_TRIM -+ struct kfree_data_t *kfree_data = GET_KFREE_DATA(padapter); -+ s8 bb_gain_sel = rtw_ch_to_bb_gain_sel(ch); -+ -+ if (bb_gain_sel < BB_GAIN_2G || bb_gain_sel >= BB_GAIN_NUM) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (kfree_data->flag & KFREE_FLAG_ON) { -+ kfree_offset = kfree_data->bb_gain[bb_gain_sel][path]; -+ if (IS_HARDWARE_TYPE_8723D(padapter)) -+ RTW_INFO("%s path:%s, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n" -+ , __func__, (path == 0)?"S1":"S0", -+ ch, bb_gain_sel, kfree_offset); -+ else -+ RTW_INFO("%s path:%u, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n" -+ , __func__, path, ch, bb_gain_sel, kfree_offset); -+ } -+exit: -+#endif /* CONFIG_RF_POWER_TRIM */ -+ return kfree_offset; -+} -+ -+void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset) -+{ -+#if !defined(CONFIG_RTL8814A) && !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8821C) && !defined(CONFIG_RTL8822C) \ -+ && !defined(CONFIG_RTL8723F) -+ u8 write_value; -+#endif -+ u8 target_path = 0; -+ u32 val32 = 0; -+ -+ if (IS_HARDWARE_TYPE_8723D(adapter)) { -+ target_path = RF_PATH_A; /*in 8723D case path means S0/S1*/ -+ if (path == PPG_8723D_S1) -+ RTW_INFO("kfree gain_offset 0x55:0x%x ", -+ rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff)); -+ else if (path == PPG_8723D_S0) -+ RTW_INFO("kfree gain_offset 0x65:0x%x ", -+ rtw_hal_read_rfreg(adapter, target_path, 0x65, 0xffffffff)); -+ } else { -+ target_path = path; -+ RTW_INFO("kfree gain_offset 0x55:0x%x ", rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff)); -+ } -+ -+ switch (rtw_get_chip_type(adapter)) { -+#ifdef CONFIG_RTL8723D -+ case RTL8723D: -+ write_value = RF_TX_GAIN_OFFSET_8723D(offset); -+ if (path == PPG_8723D_S1) -+ rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value); -+ else if (path == PPG_8723D_S0) -+ rtw_hal_write_rfreg(adapter, target_path, 0x65, 0x0f8000, write_value); -+ break; -+#endif /* CONFIG_RTL8723D */ -+#ifdef CONFIG_RTL8703B -+ case RTL8703B: -+ write_value = RF_TX_GAIN_OFFSET_8703B(offset); -+ rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value); -+ break; -+#endif /* CONFIG_RTL8703B */ -+#ifdef CONFIG_RTL8188F -+ case RTL8188F: -+ write_value = RF_TX_GAIN_OFFSET_8188F(offset); -+ rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value); -+ break; -+#endif /* CONFIG_RTL8188F */ -+#ifdef CONFIG_RTL8188GTV -+ case RTL8188GTV: -+ write_value = RF_TX_GAIN_OFFSET_8188GTV(offset); -+ rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value); -+ break; -+#endif /* CONFIG_RTL8188GTV */ -+#ifdef CONFIG_RTL8192E -+ case RTL8192E: -+ write_value = RF_TX_GAIN_OFFSET_8192E(offset); -+ rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value); -+ break; -+#endif /* CONFIG_RTL8188F */ -+ -+#ifdef CONFIG_RTL8821A -+ case RTL8821: -+ write_value = RF_TX_GAIN_OFFSET_8821A(offset); -+ rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value); -+ break; -+#endif /* CONFIG_RTL8821A */ -+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8822C) \ -+ || defined(CONFIG_RTL8723F) -+ case RTL8814A: -+ case RTL8822B: -+ case RTL8822C: -+ case RTL8821C: -+ case RTL8192F: -+ case RTL8723F: -+ RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path); -+ break; -+#endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C || CONFIG_RTL8723F */ -+ -+ default: -+ rtw_warn_on(1); -+ break; -+ } -+ -+ if (IS_HARDWARE_TYPE_8723D(adapter)) { -+ if (path == PPG_8723D_S1) -+ val32 = rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff); -+ else if (path == PPG_8723D_S0) -+ val32 = rtw_hal_read_rfreg(adapter, target_path, 0x65, 0xffffffff); -+ } else { -+ val32 = rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff); -+ } -+ RTW_INFO(" after :0x%x\n", val32); -+} -+ -+void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ s8 kfree_offset = 0; -+ s8 tx_pwr_track_offset = 0; /* TODO: 8814A should consider tx pwr track when setting tx gain offset */ -+ s8 total_offset; -+ int i, total = 0; -+ -+ if (IS_HARDWARE_TYPE_8723D(adapter)) -+ total = 2; /* S1 and S0 */ -+ else -+ total = hal_spec->rf_reg_path_num; -+ -+ for (i = 0; i < total; i++) { -+ kfree_offset = rtw_rf_get_kfree_tx_gain_offset(adapter, i, ch); -+ total_offset = kfree_offset + tx_pwr_track_offset; -+ rtw_rf_set_tx_gain_offset(adapter, i, total_offset); -+ } -+} -+ -+bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region) -+{ -+ return (dfs_region == RTW_DFS_REGD_ETSI && rtw_is_range_overlap(hi, lo, 5650, 5600)) ? _TRUE : _FALSE; -+} -+ -+bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region) -+{ -+ u32 hi, lo; -+ -+ if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE) -+ return _FALSE; -+ -+ return rtw_is_long_cac_range(hi, lo, dfs_region) ? _TRUE : _FALSE; -+} -diff --git a/drivers/staging/rtl8723cs/core/rtw_rm.c b/drivers/staging/rtl8723cs/core/rtw_rm.c -new file mode 100644 -index 000000000000..38ceb2e265fe ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_rm.c -@@ -0,0 +1,2825 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+#ifdef CONFIG_RTW_80211K -+#include "rtw_rm_fsm.h" -+#include "rtw_rm_util.h" -+#endif -+ -+#define pstr(s) s+strlen(s) -+#ifndef MIN -+#define MIN(x, y) (((x) < (y)) ? (x) : (y)) -+#endif -+ -+u8 rm_post_event_hdl(_adapter *padapter, u8 *pbuf) -+{ -+#ifdef CONFIG_RTW_80211K -+ struct rm_event *pev = (struct rm_event *)pbuf; -+ -+ _rm_post_event(padapter, pev->rmid, pev->evid); -+ rm_handler(padapter, pev); -+#endif -+ return H2C_SUCCESS; -+} -+ -+#ifdef CONFIG_RTW_80211K -+struct cmd_meas_type_ { -+ u8 id; -+ char *name; -+}; -+ -+char *rm_type_req_name(u8 meas_type) { -+ -+ switch (meas_type) { -+ case basic_req: -+ return "basic_req"; -+ case cca_req: -+ return "cca_req"; -+ case rpi_histo_req: -+ return "rpi_histo_req"; -+ case ch_load_req: -+ return "ch_load_req"; -+ case noise_histo_req: -+ return "noise_histo_req"; -+ case bcn_req: -+ return "bcn_req"; -+ case frame_req: -+ return "frame_req"; -+ case sta_statis_req: -+ return "sta_statis_req"; -+ } -+ return "unknown_req"; -+}; -+ -+char *rm_type_rep_name(u8 meas_type) { -+ -+ switch (meas_type) { -+ case basic_rep: -+ return "basic_rep"; -+ case cca_rep: -+ return "cca_rep"; -+ case rpi_histo_rep: -+ return "rpi_histo_rep"; -+ case ch_load_rep: -+ return "ch_load_rep"; -+ case noise_histo_rep: -+ return "noise_histo_rep"; -+ case bcn_rep: -+ return "bcn_rep"; -+ case frame_rep: -+ return "frame_rep"; -+ case sta_statis_rep: -+ return "sta_statis_rep"; -+ } -+ return "unknown_rep"; -+}; -+ -+char *rm_en_cap_name(enum rm_cap_en en) -+{ -+ switch (en) { -+ case RM_LINK_MEAS_CAP_EN: -+ return "RM_LINK_MEAS_CAP_EN"; -+ case RM_NB_REP_CAP_EN: -+ return "RM_NB_REP_CAP_EN"; -+ case RM_PARAL_MEAS_CAP_EN: -+ return "RM_PARAL_MEAS_CAP_EN"; -+ case RM_REPEAT_MEAS_CAP_EN: -+ return "RM_REPEAT_MEAS_CAP_EN"; -+ case RM_BCN_PASSIVE_MEAS_CAP_EN: -+ return "RM_BCN_PASSIVE_MEAS_CAP_EN"; -+ case RM_BCN_ACTIVE_MEAS_CAP_EN: -+ return "RM_BCN_ACTIVE_MEAS_CAP_EN"; -+ case RM_BCN_TABLE_MEAS_CAP_EN: -+ return "RM_BCN_TABLE_MEAS_CAP_EN"; -+ case RM_BCN_MEAS_REP_COND_CAP_EN: -+ return "RM_BCN_MEAS_REP_COND_CAP_EN"; -+ -+ case RM_FRAME_MEAS_CAP_EN: -+ return "RM_FRAME_MEAS_CAP_EN"; -+ case RM_CH_LOAD_CAP_EN: -+ return "RM_CH_LOAD_CAP_EN"; -+ case RM_NOISE_HISTO_CAP_EN: -+ return "RM_NOISE_HISTO_CAP_EN"; -+ case RM_STATIS_MEAS_CAP_EN: -+ return "RM_STATIS_MEAS_CAP_EN"; -+ case RM_LCI_MEAS_CAP_EN: -+ return "RM_LCI_MEAS_CAP_EN"; -+ case RM_LCI_AMIMUTH_CAP_EN: -+ return "RM_LCI_AMIMUTH_CAP_EN"; -+ case RM_TRANS_STREAM_CAT_MEAS_CAP_EN: -+ return "RM_TRANS_STREAM_CAT_MEAS_CAP_EN"; -+ case RM_TRIG_TRANS_STREAM_CAT_MEAS_CAP_EN: -+ return "RM_TRIG_TRANS_STREAM_CAT_MEAS_CAP_EN"; -+ -+ case RM_AP_CH_REP_CAP_EN: -+ return "RM_AP_CH_REP_CAP_EN"; -+ case RM_RM_MIB_CAP_EN: -+ return "RM_RM_MIB_CAP_EN"; -+ case RM_OP_CH_MAX_MEAS_DUR0: -+ return "RM_OP_CH_MAX_MEAS_DUR0"; -+ case RM_OP_CH_MAX_MEAS_DUR1: -+ return "RM_OP_CH_MAX_MEAS_DUR1"; -+ case RM_OP_CH_MAX_MEAS_DUR2: -+ return "RM_OP_CH_MAX_MEAS_DUR2"; -+ case RM_NONOP_CH_MAX_MEAS_DUR0: -+ return "RM_NONOP_CH_MAX_MEAS_DUR0"; -+ case RM_NONOP_CH_MAX_MEAS_DUR1: -+ return "RM_NONOP_CH_MAX_MEAS_DUR1"; -+ case RM_NONOP_CH_MAX_MEAS_DUR2: -+ return "RM_NONOP_CH_MAX_MEAS_DUR2"; -+ -+ case RM_MEAS_PILOT_CAP0: -+ return "RM_MEAS_PILOT_CAP0"; /* 24-26 */ -+ case RM_MEAS_PILOT_CAP1: -+ return "RM_MEAS_PILOT_CAP1"; -+ case RM_MEAS_PILOT_CAP2: -+ return "RM_MEAS_PILOT_CAP2"; -+ case RM_MEAS_PILOT_TRANS_INFO_CAP_EN: -+ return "RM_MEAS_PILOT_TRANS_INFO_CAP_EN"; -+ case RM_NB_REP_TSF_OFFSET_CAP_EN: -+ return "RM_NB_REP_TSF_OFFSET_CAP_EN"; -+ case RM_RCPI_MEAS_CAP_EN: -+ return "RM_RCPI_MEAS_CAP_EN"; /* 29 */ -+ case RM_RSNI_MEAS_CAP_EN: -+ return "RM_RSNI_MEAS_CAP_EN"; -+ case RM_BSS_AVG_ACCESS_DELAY_CAP_EN: -+ return "RM_BSS_AVG_ACCESS_DELAY_CAP_EN"; -+ -+ case RM_AVALB_ADMIS_CAPACITY_CAP_EN: -+ return "RM_AVALB_ADMIS_CAPACITY_CAP_EN"; -+ case RM_ANT_CAP_EN: -+ return "RM_ANT_CAP_EN"; -+ case RM_RSVD: -+ case RM_MAX: -+ default: -+ break; -+ } -+ return "unknown"; -+} -+ -+int rm_en_cap_chk_and_set(struct rm_obj *prm, enum rm_cap_en en) -+{ -+ int idx; -+ u8 cap; -+ -+ -+ if (en >= RM_MAX) -+ return _FALSE; -+ -+ idx = en / 8; -+ cap = prm->psta->padapter->rmpriv.rm_en_cap_def[idx]; -+ -+ if (!(cap & BIT(en - (idx*8)))) { -+ RTW_INFO("RM: %s incapable\n",rm_en_cap_name(en)); -+ rm_set_rep_mode(prm, MEAS_REP_MOD_INCAP); -+ return _FALSE; -+ } -+ return _SUCCESS; -+} -+ -+/* for caller outside rm */ -+u8 rm_add_nb_req(_adapter *padapter, struct sta_info *psta) -+{ -+ struct rm_obj *prm; -+ -+ -+ prm = rm_alloc_rmobj(padapter); -+ -+ if (prm == NULL) { -+ RTW_ERR("RM: unable to alloc rm obj for requeset\n"); -+ return _FALSE; -+ } -+ -+ prm->psta = psta; -+ prm->q.category = RTW_WLAN_CATEGORY_RADIO_MEAS; -+ prm->q.diag_token = rm_gen_dialog_token(padapter); -+ prm->q.m_token = rm_gen_meas_token(padapter); -+ prm->rmid = rm_gen_rmid(padapter, prm, RM_MASTER); -+ -+ prm->q.action_code = RM_ACT_NB_REP_REQ; -+ -+ #if 0 -+ if (pmac) { /* find sta_info according to bssid */ -+ pmac += 4; /* skip mac= */ -+ if (hwaddr_parse(pmac, bssid) == NULL) { -+ sprintf(pstr(s), "Err: \nincorrect mac format\n"); -+ return _FAIL; -+ } -+ psta = rm_get_sta(padapter, 0xff, bssid); -+ } -+ #endif -+ -+ /* enquee rmobj */ -+ rm_enqueue_rmobj(padapter, prm, _FALSE); -+ -+ RTW_INFO("RM: rmid=%x add req to " MAC_FMT "\n", -+ prm->rmid, MAC_ARG(psta->cmn.mac_addr)); -+ -+ return _SUCCESS; -+} -+ -+static u8 *build_wlan_hdr(_adapter *padapter, struct xmit_frame *pmgntframe, -+ struct sta_info *psta, u16 frame_type) -+{ -+ u8 *pframe; -+ u16 *fctrl; -+ struct pkt_attrib *pattr; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ -+ -+ /* update attribute */ -+ pattr = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattr); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, psta->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, -+ get_my_bssid(&(pmlmeinfo->network)),ETH_ALEN); -+ -+ RTW_INFO("RM: dst = " MAC_FMT "\n", MAC_ARG(pwlanhdr->addr1)); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ SetFragNum(pframe, 0); -+ -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattr->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ return pframe; -+} -+ -+void rm_set_rep_mode(struct rm_obj *prm, u8 mode) -+{ -+ -+ RTW_INFO("RM: rmid=%x set %s\n", -+ prm->rmid, -+ mode|MEAS_REP_MOD_INCAP?"INCAP": -+ mode|MEAS_REP_MOD_REFUSE?"REFUSE": -+ mode|MEAS_REP_MOD_LATE?"LATE":""); -+ -+ prm->p.m_mode |= mode; -+} -+ -+int issue_null_reply(struct rm_obj *prm) -+{ -+ int len=0, my_len; -+ u8 *pframe, m_mode; -+ _adapter *padapter = prm->psta->padapter; -+ struct pkt_attrib *pattr; -+ struct xmit_frame *pmgntframe; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ -+ -+ m_mode = prm->p.m_mode; -+ if (m_mode || prm->p.rpt == 0) { -+ RTW_INFO("RM: rmid=%x reply (%s repeat=%d)\n", -+ prm->rmid, -+ m_mode&MEAS_REP_MOD_INCAP?"INCAP": -+ m_mode&MEAS_REP_MOD_REFUSE?"REFUSE": -+ m_mode&MEAS_REP_MOD_LATE?"LATE":"no content", -+ prm->p.rpt); -+ } -+ -+ switch (prm->p.action_code) { -+ case RM_ACT_RADIO_MEAS_REQ: -+ len = 8; -+ break; -+ case RM_ACT_NB_REP_REQ: -+ len = 3; -+ break; -+ case RM_ACT_LINK_MEAS_REQ: -+ len = 3; -+ break; -+ default: -+ break; -+ } -+ -+ if (len==0) -+ return _FALSE; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ RTW_ERR("RM: %s alloc xmit_frame fail\n",__func__); -+ return _FALSE; -+ } -+ pattr = &pmgntframe->attrib; -+ pframe = build_wlan_hdr(padapter, pmgntframe, prm->psta, WIFI_ACTION); -+ pframe = rtw_set_fixed_ie(pframe, 3, &prm->p.category, &pattr->pktlen); -+ -+ my_len = 0; -+ if (len>5) { -+ prm->p.len = len - 3 - 2; -+ pframe = rtw_set_fixed_ie(pframe, len - 3, -+ &prm->p.e_id, &my_len); -+ } -+ -+ pattr->pktlen += my_len; -+ pattr->last_txcmdsz = pattr->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return _SUCCESS; -+} -+ -+int ready_for_scan(struct rm_obj *prm) -+{ -+ _adapter *padapter = prm->psta->padapter; -+ u8 ssc_chk; -+ -+ if (!rtw_is_adapter_up(padapter)) -+ return _FALSE; -+ -+ ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); -+ -+ if (ssc_chk == SS_ALLOW) -+ return _SUCCESS; -+ -+ return _FALSE; -+} -+ -+int rm_sitesurvey(struct rm_obj *prm) -+{ -+ int meas_ch_amount=0; -+ u8 op_class=0, val8; -+ struct rtw_ieee80211_channel *pch_set; -+ struct sitesurvey_parm parm; -+ -+ -+ RTW_INFO("RM: rmid=%x %s\n",prm->rmid, __func__); -+ -+ pch_set = &prm->q.ch_set[0]; -+ -+ _rtw_memset(pch_set, 0, -+ sizeof(struct rtw_ieee80211_channel) * RTW_CHANNEL_SCAN_AMOUNT); -+ -+ op_class = prm->q.op_class; -+ if (prm->q.ch_num == 0) { -+ /* ch_num=0 : scan all ch in operating class */ -+ meas_ch_amount = rm_get_ch_set(pch_set, -+ op_class, prm->q.ch_num); -+ -+ } else if (prm->q.ch_num == 255) { -+ /* 802.11 p.1066 */ -+ /* ch_num=255 : If the Channel Number is 255 and includes -+ * AP Channel Report subelements -+ */ -+ meas_ch_amount = rm_get_ch_set_from_bcn_req_opt(pch_set, &prm->q.opt.bcn); -+ } else -+ meas_ch_amount = rm_get_ch_set(pch_set, op_class, prm->q.ch_num); -+ -+ /* get means channel */ -+ prm->q.ch_set_ch_amount = meas_ch_amount; -+ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("survey (%d) chaannels\n", meas_ch_amount); -+#endif -+ -+ _rtw_memset(&parm, 0, sizeof(struct sitesurvey_parm)); -+ _rtw_memcpy(parm.ch, pch_set, -+ sizeof(struct rtw_ieee80211_channel) * -+ MIN(meas_ch_amount, RTW_CHANNEL_SCAN_AMOUNT)); -+ -+ _rtw_memcpy(&parm.ssid[0], &prm->q.opt.bcn.ssid, IW_ESSID_MAX_SIZE); -+ -+ parm.ssid_num = 1; -+ parm.scan_mode = prm->q.m_mode; -+ parm.ch_num = meas_ch_amount; -+ parm.igi = 0; -+ parm.token = prm->rmid; -+ parm.duration = prm->q.meas_dur; -+ /* parm.bw = BW_20M; */ -+ -+ rtw_sitesurvey_cmd(prm->psta->padapter, &parm); -+ -+ return _SUCCESS; -+} -+ -+static int rm_parse_ch_load_s_elem(struct rm_obj *prm, u8 *pbody, int req_len) -+{ -+ u8 *popt_id; -+ int i, p=0; /* position */ -+ int len = req_len; -+ -+ -+ prm->q.opt_s_elem_len = len; -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: opt_s_elem_len=%d\n", len); -+#endif -+ while (len) { -+ -+ switch (pbody[p]) { -+ case ch_load_rep_info: -+ /* check RM_EN */ -+ rm_en_cap_chk_and_set(prm, RM_CH_LOAD_CAP_EN); -+ -+ _rtw_memcpy(&(prm->q.opt.clm.rep_cond), -+ &pbody[p+2], sizeof(prm->q.opt.clm.rep_cond)); -+ -+ RTW_INFO("RM: ch_load_rep_info=%u:%u\n", -+ prm->q.opt.clm.rep_cond.cond, -+ prm->q.opt.clm.rep_cond.threshold); -+ break; -+ default: -+ break; -+ -+ } -+ len = len - (int)pbody[p+1] - 2; -+ p = p + (int)pbody[p+1] + 2; -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: opt_s_elem_len=%d\n",len); -+#endif -+ } -+ return _SUCCESS; -+} -+ -+static int rm_parse_noise_histo_s_elem(struct rm_obj *prm, -+ u8 *pbody, int req_len) -+{ -+ u8 *popt_id; -+ int i, p=0; /* position */ -+ int len = req_len; -+ -+ -+ prm->q.opt_s_elem_len = len; -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: opt_s_elem_len=%d\n", len); -+#endif -+ -+ while (len) { -+ -+ switch (pbody[p]) { -+ case noise_histo_rep_info: -+ /* check RM_EN */ -+ rm_en_cap_chk_and_set(prm, RM_NOISE_HISTO_CAP_EN); -+ -+ _rtw_memcpy(&(prm->q.opt.nhm.rep_cond), -+ &pbody[p+2], sizeof(prm->q.opt.nhm.rep_cond)); -+ -+ RTW_INFO("RM: noise_histo_rep_info=%u:%u\n", -+ prm->q.opt.nhm.rep_cond.cond, -+ prm->q.opt.nhm.rep_cond.threshold); -+ break; -+ default: -+ break; -+ -+ } -+ len = len - (int)pbody[p+1] - 2; -+ p = p + (int)pbody[p+1] + 2; -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: opt_s_elem_len=%d\n",len); -+#endif -+ } -+ return _SUCCESS; -+} -+ -+static int rm_parse_bcn_req_s_elem(struct rm_obj *prm, u8 *pbody, int req_len) -+{ -+ u8 *popt_id; -+ int i, p=0; /* position */ -+ int len = req_len; -+ int ap_ch_rpt_idx = 0; -+ struct _RT_OPERATING_CLASS *op; -+ -+ -+ /* opt length,2:pbody[0]+ pbody[1] */ -+ /* first opt id : pbody[18] */ -+ -+ prm->q.opt_s_elem_len = len; -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: opt_s_elem_len=%d\n", len); -+#endif -+ -+ popt_id = prm->q.opt.bcn.opt_id; -+ while (len && prm->q.opt.bcn.opt_id_num < BCN_REQ_OPT_MAX_NUM) { -+ -+ switch (pbody[p]) { -+ case bcn_req_ssid: -+ RTW_INFO("bcn_req_ssid\n"); -+ -+#if (DBG_BCN_REQ_WILDCARD) -+ RTW_INFO("DBG set ssid to WILDCARD\n"); -+#else -+#if (DBG_BCN_REQ_SSID) -+ RTW_INFO("DBG set ssid to %s\n",DBG_BCN_REQ_SSID_NAME); -+ i = strlen(DBG_BCN_REQ_SSID_NAME); -+ prm->q.opt.bcn.ssid.SsidLength = i; -+ _rtw_memcpy(&(prm->q.opt.bcn.ssid.Ssid), -+ DBG_BCN_REQ_SSID_NAME, i); -+ -+#else /* original */ -+ prm->q.opt.bcn.ssid.SsidLength = pbody[p+1]; -+ _rtw_memcpy(&(prm->q.opt.bcn.ssid.Ssid), -+ &pbody[p+2], pbody[p+1]); -+#endif -+#endif -+ RTW_INFO("RM: bcn_req_ssid=%s\n", -+ prm->q.opt.bcn.ssid.Ssid); -+ -+ popt_id[prm->q.opt.bcn.opt_id_num++] = pbody[p]; -+ break; -+ -+ case bcn_req_rep_info: -+ /* check RM_EN */ -+ rm_en_cap_chk_and_set(prm, RM_BCN_MEAS_REP_COND_CAP_EN); -+ -+ _rtw_memcpy(&(prm->q.opt.bcn.rep_cond), -+ &pbody[p+2], sizeof(prm->q.opt.bcn.rep_cond)); -+ -+ RTW_INFO("bcn_req_rep_info=%u:%u\n", -+ prm->q.opt.bcn.rep_cond.cond, -+ prm->q.opt.bcn.rep_cond.threshold); -+ -+ /*popt_id[prm->q.opt.bcn.opt_id_num++] = pbody[p];*/ -+ break; -+ -+ case bcn_req_rep_detail: -+#if DBG_BCN_REQ_DETAIL -+ prm->q.opt.bcn.rep_detail = 2; /* all IE in beacon */ -+#else -+ prm->q.opt.bcn.rep_detail = pbody[p+2]; -+#endif -+ popt_id[prm->q.opt.bcn.opt_id_num++] = pbody[p]; -+ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: report_detail=%d\n", -+ prm->q.opt.bcn.rep_detail); -+#endif -+ break; -+ -+ case bcn_req_req: -+ RTW_INFO("RM: bcn_req_req\n"); -+ -+ prm->q.opt.bcn.req_start = rtw_malloc(pbody[p+1]); -+ -+ if (prm->q.opt.bcn.req_start == NULL) { -+ RTW_ERR("RM: req_start malloc fail!!\n"); -+ break; -+ } -+ -+ for (i = 0; i < pbody[p+1]; i++) -+ *((prm->q.opt.bcn.req_start)+i) = -+ pbody[p+2+i]; -+ -+ prm->q.opt.bcn.req_len = pbody[p+1]; -+ popt_id[prm->q.opt.bcn.opt_id_num++] = pbody[p]; -+ break; -+ -+ case bcn_req_ap_ch_rep: -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: bcn_req_ap_ch_rep\n"); -+#endif -+ if (ap_ch_rpt_idx > BCN_REQ_OPT_AP_CH_RPT_MAX_NUM) { -+ RTW_ERR("RM: bcn_req_ap_ch_rep over size\n"); -+ break; -+ } -+ -+ popt_id[prm->q.opt.bcn.opt_id_num++] = pbody[p]; -+ /* get channel list -+ * EID:len:op-class:ch-list -+ */ -+ op = rtw_malloc(sizeof (*op)); -+ op->global_op_class = pbody[p + 2]; -+ i = pbody[p + 1] - 1; /* ch list len; (-1) is op class */ -+ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("%d op class %d has %d ch\n", -+ ap_ch_rpt_idx,op->global_op_class,i); -+#endif -+ op->Len = i; -+ memcpy(op->Channel, &pbody[p + 3], -+ MIN(i, MAX_CH_NUM_IN_OP_CLASS)); -+ prm->q.opt.bcn.ap_ch_rpt[ap_ch_rpt_idx++] = op; -+ prm->q.opt.bcn.ap_ch_rpt_num = ap_ch_rpt_idx; -+ break; -+ -+ default: -+ break; -+ -+ } -+ len = len - (int)pbody[p+1] - 2; -+ p = p + (int)pbody[p+1] + 2; -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: opt_s_elem_len=%d\n",len); -+#endif -+ } -+ -+ return _SUCCESS; -+} -+ -+static int rm_parse_meas_req(struct rm_obj *prm, u8 *pbody) -+{ -+ int p; /* position */ -+ int req_len; -+ -+ -+ req_len = (int)pbody[1]; -+ p = 5; -+ -+ prm->q.op_class = pbody[p++]; -+ prm->q.ch_num = pbody[p++]; -+ prm->q.rand_intvl = le16_to_cpu(*(u16*)(&pbody[p])); -+ p+=2; -+ prm->q.meas_dur = le16_to_cpu(*(u16*)(&pbody[p])); -+ p+=2; -+ -+ if (prm->q.m_type == bcn_req) { -+ /* -+ * 0: passive -+ * 1: active -+ * 2: bcn_table -+ */ -+ prm->q.m_mode = pbody[p++]; -+ -+ /* BSSID */ -+ _rtw_memcpy(&(prm->q.bssid), &pbody[p], 6); -+ p+=6; -+ -+ /* -+ * default, used when Reporting detail subelement -+ * is not included in Beacon Request -+ */ -+ prm->q.opt.bcn.rep_detail = 2; -+ } -+ -+ if (req_len-(p-2) <= 0) /* without sub-element */ -+ return _SUCCESS; -+ -+ switch (prm->q.m_type) { -+ case bcn_req: -+ rm_parse_bcn_req_s_elem(prm, &pbody[p], req_len-(p-2)); -+ break; -+ case ch_load_req: -+ rm_parse_ch_load_s_elem(prm, &pbody[p], req_len-(p-2)); -+ break; -+ case noise_histo_req: -+ rm_parse_noise_histo_s_elem(prm, &pbody[p], req_len-(p-2)); -+ break; -+ default: -+ break; -+ } -+ -+ return _SUCCESS; -+} -+ -+/* receive measurement request */ -+int rm_recv_radio_mens_req(_adapter *padapter, -+ union recv_frame *precv_frame, struct sta_info *psta) -+{ -+ struct rm_obj *prm; -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ u8 *pdiag_body = (u8 *)(precv_frame->u.hdr.rx_data + -+ sizeof(struct rtw_ieee80211_hdr_3addr)); -+ u8 *pmeas_body = &pdiag_body[5]; -+ u8 rmid, update = 0; -+ -+ -+#if 0 -+ /* search existing rm_obj */ -+ rmid = psta->cmn.aid << 16 -+ | pdiag_body[2] << 8 -+ | RM_SLAVE; -+ -+ prm = rm_get_rmobj(padapter, rmid); -+ if (prm) { -+ RTW_INFO("RM: Found an exist meas rmid=%u\n", rmid); -+ update = 1; -+ } else -+#endif -+ prm = rm_alloc_rmobj(padapter); -+ -+ if (prm == NULL) { -+ RTW_ERR("RM: unable to alloc rm obj for requeset\n"); -+ return _FALSE; -+ } -+ -+ prm->psta = psta; -+ prm->q.diag_token = pdiag_body[2]; -+ prm->q.rpt = le16_to_cpu(*(u16*)(&pdiag_body[3])); -+ -+ /* Figure 8-104 Measurement Requested format */ -+ prm->q.e_id = pmeas_body[0]; -+ prm->q.m_token = pmeas_body[2]; -+ prm->q.m_mode = pmeas_body[3]; -+ prm->q.m_type = pmeas_body[4]; -+ prm->rmid = rm_gen_rmid(padapter, prm, RM_SLAVE); -+ -+ RTW_INFO("RM: rmid=%x, bssid " MAC_FMT "\n", prm->rmid, -+ MAC_ARG(prm->psta->cmn.mac_addr)); -+ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: element_id = %d\n", prm->q.e_id); -+ RTW_INFO("RM: length = %d\n", (int)pmeas_body[1]); -+ RTW_INFO("RM: meas_token = %d\n", prm->q.m_token); -+ RTW_INFO("RM: meas_mode = %d\n", prm->q.m_mode); -+ RTW_INFO("RM: meas_type = %d\n", prm->q.m_type); -+#endif -+ -+ if (prm->q.e_id != _MEAS_REQ_IE_) /* 38 */ -+ return _FALSE; -+ -+ switch (prm->q.m_type) { -+ case bcn_req: -+ RTW_INFO("RM: recv beacon_request\n"); -+ switch (prm->q.m_mode) { -+ case bcn_req_passive: -+ rm_en_cap_chk_and_set(prm, RM_BCN_PASSIVE_MEAS_CAP_EN); -+ break; -+ case bcn_req_active: -+ rm_en_cap_chk_and_set(prm, RM_BCN_ACTIVE_MEAS_CAP_EN); -+ break; -+ case bcn_req_bcn_table: -+ rm_en_cap_chk_and_set(prm, RM_BCN_TABLE_MEAS_CAP_EN); -+ break; -+ default: -+ rm_set_rep_mode(prm, MEAS_REP_MOD_INCAP); -+ break; -+ } -+ break; -+ case ch_load_req: -+ RTW_INFO("RM: recv ch_load_request\n"); -+ rm_en_cap_chk_and_set(prm, RM_CH_LOAD_CAP_EN); -+ break; -+ case noise_histo_req: -+ RTW_INFO("RM: recv noise_histogram_request\n"); -+ rm_en_cap_chk_and_set(prm, RM_NOISE_HISTO_CAP_EN); -+ break; -+ default: -+ RTW_INFO("RM: recv unknown request type 0x%02x\n", -+ prm->q.m_type); -+ rm_set_rep_mode(prm, MEAS_REP_MOD_INCAP); -+ goto done; -+ } -+ rm_parse_meas_req(prm, pmeas_body); -+done: -+ if (!update) -+ rm_enqueue_rmobj(padapter, prm, _FALSE); -+ -+ return _SUCCESS; -+} -+ -+/* receive measurement report */ -+int rm_recv_radio_mens_rep(_adapter *padapter, -+ union recv_frame *precv_frame, struct sta_info *psta) -+{ -+ int len, ret = _FALSE; -+ struct rm_obj *prm; -+ u32 rmid; -+ u8 *pdiag_body = (u8 *)(precv_frame->u.hdr.rx_data + -+ sizeof(struct rtw_ieee80211_hdr_3addr)); -+ u8 *pmeas_body = &pdiag_body[3]; -+ -+ -+ rmid = psta->cmn.aid << 16 -+ | pdiag_body[2] << 8 -+ | RM_MASTER; -+ -+ prm = rm_get_rmobj(padapter, rmid); -+ if (prm == NULL) { -+ /* not belong to us, report to upper */ -+ rtw_cfg80211_rx_rrm_action(psta->padapter, precv_frame); -+ return _TRUE; -+ } -+ -+ prm->p.action_code = pdiag_body[1]; -+ prm->p.diag_token = pdiag_body[2]; -+ -+ /* Figure 8-140 Measuremnt Report format */ -+ prm->p.e_id = pmeas_body[0]; -+ prm->p.m_token = pmeas_body[2]; -+ prm->p.m_mode = pmeas_body[3]; -+ prm->p.m_type = pmeas_body[4]; -+ -+ RTW_INFO("RM: rmid=%x, bssid " MAC_FMT "\n", prm->rmid, -+ MAC_ARG(prm->psta->cmn.mac_addr)); -+ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: element_id = %d\n", prm->p.e_id); -+ RTW_INFO("RM: length = %d\n", (int)pmeas_body[1]); -+ RTW_INFO("RM: meas_token = %d\n", prm->p.m_token); -+ RTW_INFO("RM: meas_mode = %d\n", prm->p.m_mode); -+ RTW_INFO("RM: meas_type = %d\n", prm->p.m_type); -+#endif -+ if (prm->p.e_id != _MEAS_RSP_IE_) /* 39 */ -+ return _FALSE; -+ -+ RTW_INFO("RM: recv %s\n", rm_type_rep_name(prm->p.m_type)); -+ rm_post_event(padapter, prm->rmid, RM_EV_recv_rep); -+ -+ /* report to upper via ioctl */ -+ if ((prm->from_ioctl == true) && -+ prm->q.m_type == bcn_req) { -+ len = pmeas_body[1] + 2; /* 2 : EID(1B) length(1B) */ -+ indicate_beacon_report(prm->psta->cmn.mac_addr, -+ 1, len, pmeas_body); -+ } -+ return ret; -+} -+ -+/* receive link measurement request */ -+int rm_recv_link_mens_req(_adapter *padapter, -+ union recv_frame *precv_frame, struct sta_info *psta) -+{ -+ struct rm_obj *prm; -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ u8 *pdiag_body = (u8 *)(precv_frame->u.hdr.rx_data + -+ sizeof(struct rtw_ieee80211_hdr_3addr)); -+ u8 *pmeas_body = &pdiag_body[3]; -+ u8 rmid, update = 0; -+ int i; -+ -+ -+ prm = rm_alloc_rmobj(padapter); -+ -+ if (prm == NULL) { -+ RTW_ERR("RM: unable to alloc rm obj for requeset\n"); -+ return _FALSE; -+ } -+ -+ prm->psta = psta; -+ prm->q.action_code = pdiag_body[1]; -+ prm->q.diag_token = pdiag_body[2]; -+ -+ prm->q.tx_pwr_used = pmeas_body[0]; -+ prm->q.tx_pwr_max = pmeas_body[1]; -+ prm->q.rx_pwr = precv_frame->u.hdr.attrib.phy_info.rx_power; -+ prm->q.rx_rate = hw_rate_to_m_rate(precv_frame->u.hdr.attrib.data_rate); -+ prm->q.rx_bw = precv_frame->u.hdr.attrib.bw; -+ prm->q.rx_rsni = rm_get_frame_rsni(prm, precv_frame); -+ prm->rmid = rm_gen_rmid(padapter, prm, RM_SLAVE); -+ -+ RTW_INFO("RM: rmid=%x, bssid" MAC_FMT " rx_pwr=%ddBm, rate=%s\n", -+ prm->rmid, MAC_ARG(prm->psta->cmn.mac_addr), prm->q.rx_pwr, -+ MGN_RATE_STR(prm->q.rx_rate)); -+ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: tx_pwr_used =%d dBm\n", prm->q.tx_pwr_used); -+ RTW_INFO("RM: tx_pwr_max =%d dBm\n", prm->q.tx_pwr_max); -+#endif -+ -+ if (!update) -+ rm_enqueue_rmobj(padapter, prm, _FALSE); -+ -+ return _SUCCESS; -+} -+ -+/* receive link measurement report */ -+int rm_recv_link_mens_rep(_adapter *padapter, -+ union recv_frame *precv_frame, struct sta_info *psta) -+{ -+ int ret = _FALSE; -+ struct rm_obj *prm; -+ u32 rmid; -+ u8 *pdiag_body = (u8 *)(precv_frame->u.hdr.rx_data + -+ sizeof(struct rtw_ieee80211_hdr_3addr)); -+ u8 *pmeas_body = pdiag_body + 3; -+ s8 val; -+ -+ -+ rmid = psta->cmn.aid << 16 -+ | pdiag_body[2] << 8 -+ | RM_MASTER; -+ -+ prm = rm_get_rmobj(padapter, rmid); -+ if (prm == NULL) { -+ /* not belong to us, report to upper */ -+ rtw_cfg80211_rx_rrm_action(psta->padapter, precv_frame); -+ return _TRUE; -+ } -+ -+ RTW_INFO("RM: rmid=%x, bssid " MAC_FMT "\n", prm->rmid, -+ MAC_ARG(prm->psta->cmn.mac_addr)); -+ -+ prm->p.action_code = pdiag_body[1]; -+ prm->p.diag_token = pdiag_body[2]; -+ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: action_code = %d\n", prm->p.action_code); -+ RTW_INFO("RM: diag_token = %d\n", prm->p.diag_token); -+ RTW_INFO("RM: xmit_power = %d dBm\n", pmeas_body[2]); -+ RTW_INFO("RM: link_margin = %d dBm\n", pmeas_body[3]); -+ RTW_INFO("RM: xmit_ant = %d\n", pmeas_body[4]); -+ RTW_INFO("RM: recv_ant = %d\n", pmeas_body[5]); -+ RTW_INFO("RM: RCPI = %d\n", pmeas_body[6]); -+ RTW_INFO("RM: RSNI = %d\n", pmeas_body[7]); -+#endif -+ RTW_INFO("RM: recv link meas report ...\n"); -+ ret = rm_post_event(padapter, prm->rmid, RM_EV_recv_rep); -+ -+ return ret; -+} -+ -+ -+int rm_radio_mens_nb_rep(_adapter *padapter, -+ union recv_frame *precv_frame, struct sta_info *psta) -+{ -+ u8 *pdiag_body = (u8 *)(precv_frame->u.hdr.rx_data + -+ sizeof(struct rtw_ieee80211_hdr_3addr)); -+ u8 *pmeas_body = &pdiag_body[3]; -+ u32 len = precv_frame->u.hdr.len; -+ u32 rmid; -+ struct rm_obj *prm; -+ -+ -+ rmid = psta->cmn.aid << 16 -+ | pdiag_body[2] << 8 -+ | RM_MASTER; -+ -+ prm = rm_get_rmobj(padapter, rmid); -+ -+ if (prm == NULL) { -+ /* not belong to us, report to upper */ -+ rtw_cfg80211_rx_rrm_action(psta->padapter, precv_frame); -+ return _TRUE; -+ } -+ -+ prm->p.action_code = pdiag_body[1]; -+ prm->p.diag_token = pdiag_body[2]; -+ prm->p.e_id = pmeas_body[0]; -+ -+ RTW_INFO("RM: rmid=%x, bssid " MAC_FMT "\n", prm->rmid, -+ MAC_ARG(prm->psta->cmn.mac_addr)); -+ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: element_id = %d\n", prm->p.e_id); -+ RTW_INFO("RM: length = %d\n", (int)pmeas_body[1]); -+#endif -+ rm_post_event(padapter, prm->rmid, RM_EV_recv_rep); -+ -+#ifdef CONFIG_LAYER2_ROAMING -+ if (rtw_wnm_btm_candidates_survey(padapter -+ ,(pdiag_body + 3) -+ ,(len - sizeof(struct rtw_ieee80211_hdr_3addr)) -+ ,_FALSE) == _FAIL) -+ return _FALSE; -+#endif -+ rtw_cfg80211_rx_rrm_action(padapter, precv_frame); -+ -+ return _TRUE; -+} -+ -+unsigned int rm_on_action(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ u32 ret = _FAIL; -+ u8 *pframe = NULL; -+ u8 *pframe_body = NULL; -+ u8 action_code = 0; -+ u8 diag_token = 0; -+ struct rtw_ieee80211_hdr_3addr *whdr; -+ struct sta_info *psta; -+ -+ -+ pframe = precv_frame->u.hdr.rx_data; -+ -+ /* check RA matches or not */ -+ if (!_rtw_memcmp(adapter_mac_addr(padapter), -+ GetAddr1Ptr(pframe), ETH_ALEN)) -+ goto exit; -+ -+ whdr = (struct rtw_ieee80211_hdr_3addr *)pframe; -+ RTW_INFO("RM: %s bssid = " MAC_FMT "\n", -+ __func__, MAC_ARG(whdr->addr2)); -+ -+ psta = rtw_get_stainfo(&padapter->stapriv, whdr->addr2); -+ -+ if (!psta) { -+ RTW_ERR("RM: psta not found\n"); -+ goto exit; -+ } -+ -+ pframe_body = (unsigned char *)(pframe + -+ sizeof(struct rtw_ieee80211_hdr_3addr)); -+ -+ /* Figure 8-438 radio measurement request frame Action field format */ -+ /* Category = pframe_body[0] = 5 (Radio Measurement) */ -+ action_code = pframe_body[1]; -+ diag_token = pframe_body[2]; -+ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: %s radio_action=%x, diag_token=%x\n", __func__, -+ action_code, diag_token); -+#endif -+ -+ switch (action_code) { -+ -+ case RM_ACT_RADIO_MEAS_REQ: -+ RTW_INFO("RM: RM_ACT_RADIO_MEAS_REQ\n"); -+ ret = rm_recv_radio_mens_req(padapter, precv_frame, psta); -+ break; -+ -+ case RM_ACT_RADIO_MEAS_REP: -+ RTW_INFO("RM: RM_ACT_RADIO_MEAS_REP\n"); -+ ret = rm_recv_radio_mens_rep(padapter, precv_frame, psta); -+ break; -+ -+ case RM_ACT_LINK_MEAS_REQ: -+ RTW_INFO("RM: RM_ACT_LINK_MEAS_REQ\n"); -+ ret = rm_recv_link_mens_req(padapter, precv_frame, psta); -+ break; -+ -+ case RM_ACT_LINK_MEAS_REP: -+ RTW_INFO("RM: RM_ACT_LINK_MEAS_REP\n"); -+ ret = rm_recv_link_mens_rep(padapter, precv_frame, psta); -+ break; -+ -+ case RM_ACT_NB_REP_REQ: -+ RTW_INFO("RM: RM_ACT_NB_REP_REQ\n"); -+ break; -+ -+ case RM_ACT_NB_REP_RESP: -+ RTW_INFO("RM: RM_ACT_NB_REP_RESP\n"); -+ ret = rm_radio_mens_nb_rep(padapter, precv_frame, psta); -+ break; -+ -+ default: -+ /* TODO reply incabable */ -+ RTW_ERR("RM: unknown specturm management action %2x\n", -+ action_code); -+ break; -+ } -+exit: -+ return ret; -+} -+ -+static u8 *rm_gen_bcn_detail_elem(_adapter *padapter, u8 *pframe, -+ struct rm_obj *prm, struct wlan_network *pnetwork, -+ unsigned int *fr_len) -+{ -+ WLAN_BSSID_EX *pbss = &pnetwork->network; -+ unsigned int my_len; -+ int j, k, len; -+ u8 *plen; -+ u8 *ptr; -+ u8 val8, eid; -+ -+ -+ my_len = 0; -+ /* Reporting Detail values -+ * 0: No fixed length fields or elements -+ * 1: All fixed length fields and any requested elements -+ * in the Request info element if present -+ * 2: All fixed length fields and elements -+ * 3-255: Reserved -+ */ -+ -+ /* report_detail = 0 */ -+ if (prm->q.opt.bcn.rep_detail == 0 -+ || prm->q.opt.bcn.rep_detail > 2) { -+ return pframe; -+ } -+ -+ /* ID */ -+ val8 = 1; /* 1:reported frame body */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ plen = pframe; -+ val8 = 0; -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* report_detail = 2 */ -+ if (prm->q.opt.bcn.rep_detail == 2) { -+ pframe = rtw_set_fixed_ie(pframe, pbss->IELength - 4, -+ pbss->IEs, &my_len); /* -4 remove FCS */ -+ goto done; -+ } -+ -+ /* report_detail = 1 */ -+ /* all fixed lenght fields */ -+ pframe = rtw_set_fixed_ie(pframe, -+ _FIXED_IE_LENGTH_, pbss->IEs, &my_len); -+ -+ for (j = 0; j < prm->q.opt.bcn.opt_id_num; j++) { -+ switch (prm->q.opt.bcn.opt_id[j]) { -+ case bcn_req_ssid: -+ /* SSID */ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: bcn_req_ssid\n"); -+#endif -+ pframe = rtw_set_ie(pframe, _SSID_IE_, -+ pbss->Ssid.SsidLength, -+ pbss->Ssid.Ssid, &my_len); -+ break; -+ case bcn_req_req: -+ if (prm->q.opt.bcn.req_start == NULL) -+ break; -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: bcn_req_req"); -+#endif -+ for (k=0; kq.opt.bcn.req_len; k++) { -+ eid = prm->q.opt.bcn.req_start[k]; -+ -+ val8 = pbss->IELength - _FIXED_IE_LENGTH_; -+ ptr = rtw_get_ie(pbss->IEs + _FIXED_IE_LENGTH_, -+ eid, &len, val8); -+ -+ if (!ptr) -+ continue; -+#if (RM_MORE_DBG_MSG) -+ switch (eid) { -+ case EID_SsId: -+ RTW_INFO("RM: EID_SSID\n"); -+ break; -+ case EID_QBSSLoad: -+ RTW_INFO("RM: EID_QBSSLoad\n"); -+ break; -+ case EID_HTCapability: -+ RTW_INFO("RM: EID_HTCapability\n"); -+ break; -+ case _MDIE_: -+ RTW_INFO("RM: EID_MobilityDomain\n"); -+ break; -+ case EID_Vendor: -+ RTW_INFO("RM: EID_Vendor\n"); -+ break; -+ default: -+ RTW_INFO("RM: EID %d todo\n",eid); -+ break; -+ } -+#endif -+ pframe = rtw_set_ie(pframe, eid, -+ len, ptr+2, &my_len); -+ } /* for() */ -+ break; -+ case bcn_req_rep_detail: -+ RTW_INFO("RM: bcn_req_rep_detail\n"); -+ break; -+ case bcn_req_ap_ch_rep: -+ RTW_INFO("RM: bcn_req_ap_ch_rep\n"); -+ break; -+ default: -+ RTW_INFO("RM: OPT %d TODO\n",prm->q.opt.bcn.opt_id[j]); -+ break; -+ } -+ } -+done: -+ /* -+ * update my length -+ * content length does NOT include ID and LEN -+ */ -+ val8 = my_len - 2; -+ rtw_set_fixed_ie(plen, 1, &val8, &j); -+ -+ /* update length to caller */ -+ *fr_len += my_len; -+ -+ return pframe; -+} -+ -+u8 rm_bcn_req_cond_mach(struct rm_obj *prm, struct wlan_network *pnetwork) -+{ -+ u8 val8; -+ -+ -+ switch(prm->q.opt.bcn.rep_cond.cond) { -+ case bcn_rep_cond_immediately: -+ return _SUCCESS; -+ case bcn_req_cond_rcpi_greater: -+ val8 = rm_get_bcn_rcpi(prm, pnetwork); -+ if (val8 > prm->q.opt.bcn.rep_cond.threshold) -+ return _SUCCESS; -+ break; -+ case bcn_req_cond_rcpi_less: -+ val8 = rm_get_bcn_rcpi(prm, pnetwork); -+ if (val8 < prm->q.opt.bcn.rep_cond.threshold) -+ return _SUCCESS; -+ break; -+ case bcn_req_cond_rsni_greater: -+ val8 = rm_get_bcn_rsni(prm, pnetwork); -+ if (val8 != 255 && val8 > prm->q.opt.bcn.rep_cond.threshold) -+ return _SUCCESS; -+ break; -+ case bcn_req_cond_rsni_less: -+ val8 = rm_get_bcn_rsni(prm, pnetwork); -+ if (val8 != 255 && val8 < prm->q.opt.bcn.rep_cond.threshold) -+ return _SUCCESS; -+ break; -+ default: -+ RTW_ERR("RM: bcn_req cond %u not support\n", -+ prm->q.opt.bcn.rep_cond.cond); -+ break; -+ } -+ return _FALSE; -+} -+ -+static u8 *rm_gen_bcn_rep_ie (struct rm_obj *prm, -+ u8 *pframe, struct wlan_network *pnetwork, unsigned int *fr_len) -+{ -+ int snr, i; -+ u8 val8, *plen; -+ u16 val16; -+ u32 val32; -+ u64 val64; -+ unsigned int my_len; -+ _adapter *padapter = prm->psta->padapter; -+ -+ -+ my_len = 0; -+ plen = pframe + 1; -+ pframe = rtw_set_fixed_ie(pframe, 7, &prm->p.e_id, &my_len); -+ -+ /* Actual Measurement StartTime */ -+ val64 = cpu_to_le64(prm->meas_start_time); -+ pframe = rtw_set_fixed_ie(pframe, 8, (u8 *)&val64, &my_len); -+ -+ /* Measurement Duration */ -+ val16 = prm->meas_end_time - prm->meas_start_time; -+ val16 = cpu_to_le16(val16); -+ pframe = rtw_set_fixed_ie(pframe, 2, (u8*)&val16, &my_len); -+ -+ /* TODO -+ * ReportedFrameInformation: -+ * 0 :beacon or probe rsp -+ * 1 :pilot frame -+ */ -+ val8 = 0; /* report frame info */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* RCPI */ -+ val8 = rm_get_bcn_rcpi(prm, pnetwork); -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* RSNI */ -+ val8 = rm_get_bcn_rsni(prm, pnetwork); -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* BSSID */ -+ pframe = rtw_set_fixed_ie(pframe, 6, -+ (u8 *)&pnetwork->network.MacAddress, &my_len); -+ -+ /* -+ * AntennaID -+ * 0: unknown -+ * 255: multiple antenna (Diversity) -+ */ -+ val8 = 0; -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* ParentTSF */ -+ val32 = pnetwork->network.PhyInfo.free_cnt; -+ if (prm->free_run_counter_valid) -+ val32 += prm->meas_start_time; -+ -+ pframe = rtw_set_fixed_ie(pframe, 4, (u8 *)&val32, &my_len); -+ -+ /* Generate Beacon detail */ -+ pframe = rm_gen_bcn_detail_elem(padapter, pframe, -+ prm, pnetwork, &my_len); -+ /* -+ * update my length -+ * content length does NOT include ID and LEN -+ */ -+ val8 = my_len - 2; -+ rtw_set_fixed_ie(plen, 1, &val8, &i); -+ -+ /* update length to caller */ -+ *fr_len += my_len; -+ -+ return pframe; -+} -+ -+#if 0 /* check MBO logo */ -+static int rm_match_sub_elem(_adapter *padapter, -+ struct rm_obj *prm, struct wlan_network *pnetwork) -+{ -+ WLAN_BSSID_EX *pbss = &pnetwork->network; -+ unsigned int my_len; -+ int j, k, len; -+ u8 *plen; -+ u8 *ptr; -+ u8 val8, eid; -+ -+ -+ my_len = 0; -+ /* Reporting Detail values -+ * 0: No fixed length fields or elements -+ * 1: All fixed length fields and any requested elements -+ * in the Request info element if present -+ * 2: All fixed length fields and elements -+ * 3-255: Reserved -+ */ -+ -+ /* report_detail != 1 */ -+ if (prm->q.opt.bcn.rep_detail != 1) -+ return _TRUE; -+ -+ /* report_detail = 1 */ -+ -+ for (j = 0; j < prm->q.opt.bcn.opt_id_num; j++) { -+ switch (prm->q.opt.bcn.opt_id[j]) { -+ case bcn_req_ssid: -+ /* SSID */ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: bcn_req_ssid\n"); -+#endif -+ if (pbss->Ssid.SsidLength == 0) -+ return _FALSE; -+ break; -+ case bcn_req_req: -+ if (prm->q.opt.bcn.req_start == NULL) -+ break; -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: bcn_req_req"); -+#endif -+ for (k=0; kq.opt.bcn.req_len; k++) { -+ eid = prm->q.opt.bcn.req_start[k]; -+ -+ val8 = pbss->IELength - _FIXED_IE_LENGTH_; -+ ptr = rtw_get_ie(pbss->IEs + _FIXED_IE_LENGTH_, -+ eid, &len, val8); -+ -+#if (RM_MORE_DBG_MSG) -+ switch (eid) { -+ case EID_SsId: -+ RTW_INFO("RM: EID_SSID\n"); -+ break; -+ case EID_QBSSLoad: -+ RTW_INFO("RM: EID_QBSSLoad\n"); -+ break; -+ case EID_HTCapability: -+ RTW_INFO("RM: EID_HTCapability\n"); -+ break; -+ case _MDIE_: -+ RTW_INFO("RM: EID_MobilityDomain\n"); -+ break; -+ case EID_Vendor: -+ RTW_INFO("RM: EID_Vendor\n"); -+ break; -+ default: -+ RTW_INFO("RM: EID %d todo\n",eid); -+ break; -+ } -+#endif -+ if (!ptr) { -+ RTW_INFO("RM: EID %d not found\n",eid); -+ return _FALSE; -+ } -+ } /* for() */ -+ break; -+ case bcn_req_rep_detail: -+ RTW_INFO("RM: bcn_req_rep_detail\n"); -+ break; -+ case bcn_req_ap_ch_rep: -+ RTW_INFO("RM: bcn_req_ap_ch_rep\n"); -+ break; -+ default: -+ RTW_INFO("RM: OPT %d TODO\n",prm->q.opt.bcn.opt_id[j]); -+ break; -+ } -+ } -+ return _TRUE; -+} -+#endif -+ -+static int retrieve_scan_result(struct rm_obj *prm) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ _queue *queue; -+ _adapter *padapter = prm->psta->padapter; -+ struct rtw_ieee80211_channel *pch_set; -+ struct wlan_network *pnetwork = NULL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ int i; -+ PWLAN_BSSID_EX pbss; -+ unsigned int matched_network; -+ int len, my_len; -+ u8 buf_idx, *pbuf = NULL, *tmp_buf = NULL; -+ -+ -+ tmp_buf = rtw_malloc(MAX_XMIT_EXTBUF_SZ); -+ if (tmp_buf == NULL) -+ return 0; -+ -+ my_len = 0; -+ buf_idx = 0; -+ matched_network = 0; -+ queue = &(pmlmepriv->scanned_queue); -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ /* get requested measurement channel set */ -+ pch_set = prm->q.ch_set; -+ -+ /* search scan queue to find requested SSID */ -+ while (1) { -+ -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ pbss = &pnetwork->network; -+ -+#if 0 -+ RTW_INFO("RM: ooo ch %u ssid %s bssid "MAC_FMT"\n", -+ pbss->Configuration.DSConfig, pbss->Ssid.Ssid, -+ MAC_ARG(pbss->MacAddress)); -+ /* -+ * report network if requested channel set contains -+ * the channel matchs selected network -+ */ -+ if (rtw_chset_search_ch(adapter_to_chset(padapter), -+ pbss->Configuration.DSConfig) < 0) /* not match */ -+ goto next; -+ -+ if (rtw_mlme_band_check(padapter, pbss->Configuration.DSConfig) -+ == _FALSE) -+ goto next; -+#endif -+ if (rtw_validate_ssid(&(pbss->Ssid)) == _FALSE) -+ goto next; -+ -+ /* match bssid */ -+ if (is_wildcard_bssid(prm->q.bssid) == FALSE) -+ if (_rtw_memcmp(prm->q.bssid, -+ pbss->MacAddress, 6) == _FALSE) -+ //continue; -+ goto next; -+ /* -+ * default wildcard SSID. wildcard SSID: -+ * A SSID value (null) used to represent all SSIDs -+ */ -+ -+ /* match ssid */ -+ if ((prm->q.opt.bcn.ssid.SsidLength > 0) && -+ _rtw_memcmp(prm->q.opt.bcn.ssid.Ssid, -+ pbss->Ssid.Ssid, -+ prm->q.opt.bcn.ssid.SsidLength) == _FALSE) -+ goto next; -+ -+ /* go through measurement requested channels */ -+ for (i = 0; i < prm->q.ch_set_ch_amount; i++) { -+ if ((pch_set[i].hw_value) == -+ (pbss->Configuration.DSConfig)) /* match ch */ -+ break; -+ } -+ if (i >= prm->q.ch_set_ch_amount) /* channel mismatch */ -+ goto next; -+ -+ /* match condition */ -+ if (rm_bcn_req_cond_mach(prm, pnetwork) == _FALSE) { -+ RTW_INFO("RM: condition mismatch ch %u ssid %s bssid "MAC_FMT"\n", -+ pbss->Configuration.DSConfig, pbss->Ssid.Ssid, -+ MAC_ARG(pbss->MacAddress)); -+ RTW_INFO("RM: condition %u:%u\n", -+ prm->q.opt.bcn.rep_cond.cond, -+ prm->q.opt.bcn.rep_cond.threshold); -+ goto next; -+ //continue; -+ } -+#if 0 /* check MBO logo */ -+ /* match subelement */ -+ if (rm_match_sub_elem(padapter, prm, pnetwork) == _FALSE) -+ goto next; -+#endif -+ /* Found a matched SSID */ -+ matched_network++; -+ -+ RTW_INFO("RM: ch %u Found %s bssid "MAC_FMT"\n", -+ pbss->Configuration.DSConfig, pbss->Ssid.Ssid, -+ MAC_ARG(pbss->MacAddress)); -+ -+ len = 0; -+ _rtw_memset(tmp_buf, 0, MAX_XMIT_EXTBUF_SZ); -+ rm_gen_bcn_rep_ie(prm, tmp_buf, pnetwork, &len); -+new_packet: -+ if (my_len == 0) { -+ pbuf = rtw_malloc(MAX_XMIT_EXTBUF_SZ); -+ if (pbuf == NULL) -+ goto fail; -+ prm->buf[buf_idx].pbuf = pbuf; -+ } -+ -+ if ((MAX_XMIT_EXTBUF_SZ - (my_len+len+24+4)) > 0) { -+ pbuf = rtw_set_fixed_ie(pbuf, -+ len, tmp_buf, &my_len); -+ prm->buf[buf_idx].len = my_len; -+ } else { -+ if (my_len == 0) /* not enough space */ -+ goto fail; -+ -+ my_len = 0; -+ buf_idx++; -+ goto new_packet; -+ } -+next: -+ plist = get_next(plist); -+ } /* while() */ -+fail: -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ if (tmp_buf) -+ rtw_mfree(tmp_buf, MAX_XMIT_EXTBUF_SZ); -+ -+ RTW_INFO("RM: Found %d matched %s\n", matched_network, -+ prm->q.opt.bcn.ssid.Ssid); -+ -+ if (prm->buf[buf_idx].pbuf) -+ return buf_idx+1; -+ -+ return 0; -+} -+ -+int issue_beacon_rep(struct rm_obj *prm) -+{ -+ int i, my_len; -+ u8 *pframe; -+ _adapter *padapter = prm->psta->padapter; -+ struct pkt_attrib *pattr; -+ struct xmit_frame *pmgntframe; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int pkt_num; -+ -+ -+ pkt_num = retrieve_scan_result(prm); -+ -+ if (pkt_num == 0) { -+ issue_null_reply(prm); -+ return _SUCCESS; -+ } -+ -+ for (i=0;iattrib; -+ pframe = build_wlan_hdr(padapter, -+ pmgntframe, prm->psta, WIFI_ACTION); -+ pframe = rtw_set_fixed_ie(pframe, -+ 3, &prm->p.category, &pattr->pktlen); -+ -+ my_len = 0; -+ pframe = rtw_set_fixed_ie(pframe, -+ prm->buf[i].len, prm->buf[i].pbuf, &my_len); -+ -+ pattr->pktlen += my_len; -+ pattr->last_txcmdsz = pattr->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ } -+fail: -+ for (i=0;ibuf[i].pbuf) { -+ rtw_mfree(prm->buf[i].pbuf, MAX_XMIT_EXTBUF_SZ); -+ prm->buf[i].pbuf = NULL; -+ prm->buf[i].len = 0; -+ } -+ } -+ return _SUCCESS; -+} -+ -+/* neighbor request */ -+int issue_nb_req(struct rm_obj *prm) -+{ -+ _adapter *padapter = prm->psta->padapter; -+ struct sta_info *psta = prm->psta; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct xmit_frame *pmgntframe = NULL; -+ struct pkt_attrib *pattr = NULL; -+ u8 val8; -+ u8 *pframe = NULL; -+ -+ -+ RTW_INFO("RM: %s\n", __func__); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ RTW_ERR("RM: %s alloc xmit_frame fail\n",__func__); -+ return _FALSE; -+ } -+ pattr = &pmgntframe->attrib; -+ pframe = build_wlan_hdr(padapter, pmgntframe, psta, WIFI_ACTION); -+ pframe = rtw_set_fixed_ie(pframe, -+ 3, &prm->q.category, &pattr->pktlen); -+ -+ if (prm->q.pssid) { -+ -+ u8 sub_ie[64] = {0}; -+ u8 *pie = &sub_ie[2]; -+ -+ RTW_INFO("RM: Send NB Req to "MAC_FMT" for(SSID) %s searching\n", -+ MAC_ARG(pmlmepriv->cur_network.network.MacAddress), -+ pmlmepriv->cur_network.network.Ssid.Ssid); -+ -+ val8 = strlen(prm->q.pssid); -+ sub_ie[0] = 0; /*SSID*/ -+ sub_ie[1] = val8; -+ -+ _rtw_memcpy(pie, prm->q.pssid, val8); -+ -+ pframe = rtw_set_fixed_ie(pframe, val8 + 2, -+ sub_ie, &pattr->pktlen); -+ } else { -+ -+ if (!pmlmepriv->cur_network.network.Ssid.SsidLength) -+ RTW_INFO("RM: Send NB Req to "MAC_FMT"\n", -+ MAC_ARG(pmlmepriv->cur_network.network.MacAddress)); -+ else { -+ u8 sub_ie[64] = {0}; -+ u8 *pie = &sub_ie[2]; -+ -+ RTW_INFO("RM: Send NB Req to "MAC_FMT" for(SSID) %s searching\n", -+ MAC_ARG(pmlmepriv->cur_network.network.MacAddress), -+ pmlmepriv->cur_network.network.Ssid.Ssid); -+ -+ sub_ie[0] = 0; /*SSID*/ -+ sub_ie[1] = pmlmepriv->cur_network.network.Ssid.SsidLength; -+ -+ _rtw_memcpy(pie, pmlmepriv->cur_network.network.Ssid.Ssid, -+ pmlmepriv->cur_network.network.Ssid.SsidLength); -+ -+ pframe = rtw_set_fixed_ie(pframe, -+ pmlmepriv->cur_network.network.Ssid.SsidLength + 2, -+ sub_ie, &pattr->pktlen); -+ } -+ } -+ -+ pattr->last_txcmdsz = pattr->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return _SUCCESS; -+} -+ -+/* issue link measurement request */ -+int issue_link_meas_req(struct rm_obj *prm) -+{ -+ _adapter *padapter = prm->psta->padapter; -+ struct sta_info *psta = prm->psta; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct xmit_frame *pmgntframe = NULL; -+ struct pkt_attrib *pattr = NULL; -+ u8 *pframe = NULL; -+ s8 pwr_used, path_a_pwr; -+ -+ -+ RTW_INFO("RM: %s\n", __func__); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ RTW_ERR("RM: %s alloc xmit_frame fail\n",__func__); -+ return _FALSE; -+ } -+ pattr = &pmgntframe->attrib; -+ pframe = build_wlan_hdr(padapter, pmgntframe, psta, WIFI_ACTION); -+ -+ /* Category, Action code, Dialog token */ -+ pframe = rtw_set_fixed_ie(pframe, -+ 3, &prm->q.category, &pattr->pktlen); -+ -+ /* xmit power used */ -+ /* we don't know actual TX power due to RA may change TX rate; -+ * But if we fix TX rate then we can get specific tx power -+ */ -+ pattr->rate = MGN_6M; -+ rm_get_tx_power(padapter, RF_PATH_A, MGN_6M, &pwr_used); -+ pframe = rtw_set_fixed_ie(pframe, -+ 1, &pwr_used, &pattr->pktlen); -+ -+ /* Max xmit power */ -+ rm_get_path_a_max_tx_power(padapter, &path_a_pwr); -+ pframe = rtw_set_fixed_ie(pframe, -+ 1, &path_a_pwr, &pattr->pktlen); -+ -+ pattr->last_txcmdsz = pattr->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return _SUCCESS; -+} -+ -+/* issue link measurement report */ -+int issue_link_meas_rep(struct rm_obj *prm) -+{ -+ u8 val8; -+ u8 *pframe; -+ unsigned int my_len; -+ _adapter *padapter = prm->psta->padapter; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattr; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct sta_info *psta = prm->psta; -+ int i; -+ u8 tpc[4]; -+ s8 pwr_used; -+ -+ -+ RTW_INFO("RM: %s\n", __func__); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ RTW_ERR("RM: ERR %s alloc xmit_frame fail\n",__func__); -+ return _FALSE; -+ } -+ pattr = &pmgntframe->attrib; -+ pframe = build_wlan_hdr(padapter, pmgntframe, psta, WIFI_ACTION); -+ /* Category, action code, Dialog token */ -+ pframe = rtw_set_fixed_ie(pframe, 3, -+ &prm->p.category, &pattr->pktlen); -+ -+ my_len = 0; -+ -+ /* TPC report */ -+ rm_get_tx_power(padapter, RF_PATH_A, MGN_6M, &pwr_used); -+ tpc[0] = EID_TPC; -+ tpc[1] = 2; /* length */ -+ -+ /* TX power */ -+ tpc[2] = pwr_used; -+ -+ /* link margin */ -+ rm_get_rx_sensitivity(padapter, prm->q.rx_bw, prm->q.rx_rate, &pwr_used); -+ tpc[3] = prm->q.rx_pwr - pwr_used; /* RX sensitivity */ -+ pattr->rate = MGN_6M; /* use fix rate to get fixed RX sensitivity */ -+ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: rx_pwr=%ddBm - rx_sensitivity=%ddBm = link_margin=%ddB\n", -+ prm->q.rx_pwr, pwr_used, tpc[3]); -+#endif -+ pframe = rtw_set_fixed_ie(pframe, 4, tpc, &my_len); -+ -+ /* RECV antenna ID */ -+ val8 = 0; /* unknown antenna */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* XMIT antenna ID */ -+ /* Fix rate 6M(1T) always use main antenna to TX */ -+ val8 = 1; /* main antenna */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* RCPI */ -+ val8 = translate_dbm_to_rcpi(prm->q.rx_pwr); -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* RSNI */ -+ val8 = prm->q.rx_rsni; -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* length */ -+ //val8 = (u8)my_len-2; -+ //rtw_set_fixed_ie(plen, 1, &val8, &i); /* use variable i to ignore it */ -+ -+ pattr->pktlen += my_len; -+ pattr->last_txcmdsz = pattr->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return _SUCCESS; -+} -+ -+static u8 *rm_gen_bcn_req_s_elem(_adapter *padapter, -+ struct rm_obj *prm, u8 *pframe, unsigned int *fr_len) -+{ -+ u8 val8, l; -+ int i; -+ unsigned int my_len = 0; -+ struct _RT_OPERATING_CLASS *op; -+ -+ /* meas mode */ -+ val8 = bcn_req_active; /* measurement mode T8-64 */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* bssid */ -+ pframe = rtw_set_fixed_ie(pframe, 6, prm->q.bssid, &my_len); -+ -+ /* -+ * opt ssid (0) -+ */ -+ l = MIN(32, (int)prm->q.opt.bcn.ssid.SsidLength); -+ -+ l = (int)prm->q.opt.bcn.ssid.SsidLength; -+ -+ if (l > 32) -+ RTW_ERR("RM: %s SSID len over size %d! skip it!\n",__func__, l); -+ -+ if (l > 0 && l <= 32) { -+ /* Type */ -+ val8 = bcn_req_ssid; -+ pframe = rtw_set_fixed_ie(pframe, 1, -+ &val8, &my_len); -+ /* Len */ -+ pframe = rtw_set_fixed_ie(pframe, 1, -+ &l, &my_len); -+ /* Value */ -+ pframe = rtw_set_fixed_ie(pframe, l, -+ prm->q.opt.bcn.ssid.Ssid, &my_len); -+ } -+ -+ /* -+ * opt reporting detail (2) -+ */ -+ /* Type */ -+ val8 = bcn_req_rep_detail; -+ pframe = rtw_set_fixed_ie(pframe, 1, -+ &val8, &my_len); -+ /* Len */ -+ l = 1; -+ pframe = rtw_set_fixed_ie(pframe, 1, -+ &l, &my_len); -+ /* Value */ -+ pframe = rtw_set_fixed_ie(pframe, l, -+ &prm->q.opt.bcn.rep_detail, &my_len); -+ -+ /* -+ * opt request (10) -+ */ -+ -+ if (prm->q.opt.bcn.req_id_num > 0) { -+ /* Type */ -+ val8 = bcn_req_req; -+ pframe = rtw_set_fixed_ie(pframe, 1, -+ &val8, &my_len); -+ /* Len */ -+ l = prm->q.opt.bcn.req_id_num; -+ pframe = rtw_set_fixed_ie(pframe, 1, -+ &l, &my_len); -+ /* Value */ -+ pframe = rtw_set_fixed_ie(pframe, l, -+ prm->q.opt.bcn.req_id, &my_len); -+ } -+ -+ /* -+ * opt ap channel report (51) -+ */ -+ for (i = 0; i < prm->q.opt.bcn.ap_ch_rpt_num; i++) { -+ op = prm->q.opt.bcn.ap_ch_rpt[i]; -+ if (op == NULL) -+ break; -+ /* Type */ -+ val8 = bcn_req_ap_ch_rep; -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ l = (u8)op->Len + 1; -+ /* length */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &l, &my_len); -+ -+ /* op class */ -+ val8 = op->global_op_class; -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ /* channel */ -+ pframe = rtw_set_fixed_ie(pframe, op->Len, op->Channel, &my_len); -+ } -+ -+ /* update length to caller */ -+ *fr_len += my_len; -+ -+ /* optional subelements */ -+ return pframe; -+} -+ -+static u8 *rm_gen_ch_load_req_s_elem(_adapter *padapter, -+ u8 *pframe, unsigned int *fr_len) -+{ -+ u8 val8; -+ unsigned int my_len = 0; -+ -+ -+ val8 = 1; /* 1: channel load T8-60 */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ val8 = 2; /* channel load length = 2 (extensible) */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ val8 = 0; /* channel load condition : 0 (issue when meas done) T8-61 */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ val8 = 0; /* channel load reference value : 0 */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* update length to caller */ -+ *fr_len += my_len; -+ -+ return pframe; -+} -+ -+static u8 *rm_gen_noise_histo_req_s_elem(_adapter *padapter, -+ u8 *pframe, unsigned int *fr_len) -+{ -+ u8 val8; -+ unsigned int my_len = 0; -+ -+ -+ val8 = 1; /* 1: noise histogram T8-62 */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ val8 = 2; /* noise histogram length = 2 (extensible) */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ val8 = 0; /* noise histogram condition : 0 (issue when meas done) T8-63 */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ val8 = 0; /* noise histogram reference value : 0 */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ -+ /* update length to caller */ -+ *fr_len += my_len; -+ -+ return pframe; -+} -+ -+int issue_radio_meas_req(struct rm_obj *prm) -+{ -+ u8 val8; -+ u8 *pframe; -+ u8 *plen; -+ u16 val16; -+ int my_len, i; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattr; -+ _adapter *padapter = prm->psta->padapter; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ -+ RTW_INFO("RM: %s - %s\n", __func__, rm_type_req_name(prm->q.m_type)); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ RTW_ERR("RM: %s alloc xmit_frame fail\n",__func__); -+ return _FALSE; -+ } -+ pattr = &pmgntframe->attrib; -+ pframe = build_wlan_hdr(padapter, pmgntframe, prm->psta, WIFI_ACTION); -+ -+ /* Category, Action code, Dialog token */ -+ pframe = rtw_set_fixed_ie(pframe, 3, &prm->q.category, &pattr->pktlen); -+ -+ /* repeat */ -+ val16 = cpu_to_le16(prm->q.rpt); -+ pframe = rtw_set_fixed_ie(pframe, 2, -+ (unsigned char *)&(val16), &pattr->pktlen); -+ -+ my_len = 0; -+ plen = pframe + 1; -+ /* Element ID, Length, Meas token, Meas Mode, Meas type, op class, ch */ -+ pframe = rtw_set_fixed_ie(pframe, 7, &prm->q.e_id, &my_len); -+ -+ /* random interval */ -+ val16 = cpu_to_le16(prm->q.rand_intvl); /* TU */ -+ pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&val16, &my_len); -+ -+ /* measurement duration */ -+ val16 = cpu_to_le16(prm->q.meas_dur); -+ pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&val16, &my_len); -+ -+ /* optional subelement */ -+ switch (prm->q.m_type) { -+ case bcn_req: -+ pframe = rm_gen_bcn_req_s_elem(padapter, prm, pframe, &my_len); -+ break; -+ case ch_load_req: -+ pframe = rm_gen_ch_load_req_s_elem(padapter, pframe, &my_len); -+ break; -+ case noise_histo_req: -+ pframe = rm_gen_noise_histo_req_s_elem(padapter, -+ pframe, &my_len); -+ break; -+ case basic_req: -+ default: -+ break; -+ } -+ -+ /* length */ -+ val8 = (u8)my_len - 2; -+ rtw_set_fixed_ie(plen, 1, &val8, &i); -+ -+ pattr->pktlen += my_len; -+ -+ pattr->last_txcmdsz = pattr->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return _SUCCESS; -+} -+ -+int rm_radio_meas_report_cond(struct rm_obj *prm) -+{ -+ u8 val8; -+ int i; -+ -+ -+ switch (prm->q.m_type) { -+ case ch_load_req: -+ -+ val8 = prm->p.ch_load; -+ switch (prm->q.opt.clm.rep_cond.cond) { -+ case ch_load_cond_immediately: -+ return _SUCCESS; -+ case ch_load_cond_anpi_equal_greater: -+ if (val8 >= prm->q.opt.clm.rep_cond.threshold) -+ return _SUCCESS; -+ break; -+ case ch_load_cond_anpi_equal_less: -+ if (val8 <= prm->q.opt.clm.rep_cond.threshold) -+ return _SUCCESS; -+ break; -+ default: -+ break; -+ } -+ break; -+ case noise_histo_req: -+ val8 = prm->p.anpi; -+ switch (prm->q.opt.nhm.rep_cond.cond) { -+ case noise_histo_cond_immediately: -+ return _SUCCESS; -+ case noise_histo_cond_anpi_equal_greater: -+ if (val8 >= prm->q.opt.nhm.rep_cond.threshold) -+ return _SUCCESS; -+ break; -+ case noise_histo_cond_anpi_equal_less: -+ if (val8 <= prm->q.opt.nhm.rep_cond.threshold) -+ return _SUCCESS; -+ break; -+ default: -+ break; -+ } -+ break; -+ default: -+ break; -+ } -+ return _FAIL; -+} -+ -+int retrieve_radio_meas_result(struct rm_obj *prm) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(prm->psta->padapter); -+ int i, ch = -1; -+ u8 val8; -+ -+ -+ ch = rtw_chset_search_ch(adapter_to_chset(prm->psta->padapter), -+ prm->q.ch_num); -+ -+ if ((ch == -1) || (ch >= MAX_CHANNEL_NUM)) { -+ RTW_ERR("RM: get ch(CH:%d) fail\n", prm->q.ch_num); -+ ch = 0; -+ } -+ -+ switch (prm->q.m_type) { -+ case ch_load_req: -+#ifdef CONFIG_RTW_ACS -+ val8 = hal_data->acs.clm_ratio[ch]; -+#else -+ val8 = 0; -+#endif -+ prm->p.ch_load = val8; -+ break; -+ case noise_histo_req: -+#ifdef CONFIG_RTW_ACS -+ /* ANPI */ -+ prm->p.anpi = hal_data->acs.nhm_ratio[ch]; -+ -+ /* IPI 0~10 */ -+ for (i=0;i<11;i++) -+ prm->p.ipi[i] = hal_data->acs.nhm[ch][i]; -+ -+#else -+ val8 = 0; -+ prm->p.anpi = val8; -+ for (i=0;i<11;i++) -+ prm->p.ipi[i] = val8; -+#endif -+ break; -+ default: -+ break; -+ } -+ return _SUCCESS; -+} -+ -+int issue_radio_meas_rep(struct rm_obj *prm) -+{ -+ u8 val8; -+ u8 *pframe; -+ u8 *plen; -+ u16 val16; -+ u64 val64; -+ unsigned int my_len; -+ _adapter *padapter = prm->psta->padapter; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattr; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct sta_info *psta = prm->psta; -+ int i; -+ -+ -+ RTW_INFO("RM: %s\n", __func__); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ RTW_ERR("RM: ERR %s alloc xmit_frame fail\n",__func__); -+ return _FALSE; -+ } -+ pattr = &pmgntframe->attrib; -+ pframe = build_wlan_hdr(padapter, pmgntframe, psta, WIFI_ACTION); -+ pframe = rtw_set_fixed_ie(pframe, 3, -+ &prm->p.category, &pattr->pktlen); -+ -+ my_len = 0; -+ plen = pframe + 1; -+ pframe = rtw_set_fixed_ie(pframe, 7, &prm->p.e_id, &my_len); -+ -+ /* Actual Meas start time - 8 bytes */ -+ val64 = cpu_to_le64(prm->meas_start_time); -+ pframe = rtw_set_fixed_ie(pframe, 8, (u8 *)&val64, &my_len); -+ -+ /* measurement duration */ -+ val16 = prm->meas_end_time - prm->meas_start_time; -+ val16 = cpu_to_le16(val16); -+ pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&val16, &my_len); -+ -+ /* optional subelement */ -+ switch (prm->q.m_type) { -+ case ch_load_req: -+ val8 = prm->p.ch_load; -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ break; -+ case noise_histo_req: -+ /* -+ * AntennaID -+ * 0: unknown -+ * 255: multiple antenna (Diversity) -+ */ -+ val8 = 0; -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ /* ANPI */ -+ val8 = prm->p.anpi; -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ /* IPI 0~10 */ -+ for (i=0;i<11;i++) { -+ val8 = prm->p.ipi[i]; -+ pframe = rtw_set_fixed_ie(pframe, 1, &val8, &my_len); -+ } -+ break; -+ default: -+ break; -+ } -+ /* length */ -+ val8 = (u8)my_len-2; -+ rtw_set_fixed_ie(plen, 1, &val8, &i); /* use variable i to ignore it */ -+ -+ pattr->pktlen += my_len; -+ pattr->last_txcmdsz = pattr->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ -+ return _SUCCESS; -+} -+ -+void rtw_ap_parse_sta_rm_en_cap(_adapter *padapter, -+ struct sta_info *psta, struct rtw_ieee802_11_elems *elem) -+{ -+ if (elem->rm_en_cap) { -+ RTW_INFO("assoc.rm_en_cap="RM_CAP_FMT"\n", -+ RM_CAP_ARG(elem->rm_en_cap)); -+ _rtw_memcpy(psta->rm_en_cap, -+ (elem->rm_en_cap), elem->rm_en_cap_len); -+ } -+} -+ -+void RM_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ int i; -+ -+ _rtw_memcpy(&padapter->rmpriv.rm_en_cap_assoc, pIE->data, pIE->Length); -+ RTW_INFO("assoc.rm_en_cap="RM_CAP_FMT"\n", RM_CAP_ARG(pIE->data)); -+} -+ -+/* Debug command */ -+ -+#if (RM_SUPPORT_IWPRIV_DBG) -+static int hex2num(char c) -+{ -+ if (c >= '0' && c <= '9') -+ return c - '0'; -+ if (c >= 'a' && c <= 'f') -+ return c - 'a' + 10; -+ if (c >= 'A' && c <= 'F') -+ return c - 'A' + 10; -+ return -1; -+} -+ -+int hex2byte(const char *hex) -+{ -+ int a, b; -+ a = hex2num(*hex++); -+ if (a < 0) -+ return -1; -+ b = hex2num(*hex++); -+ if (b < 0) -+ return -1; -+ return (a << 4) | b; -+} -+ -+static char * hwaddr_parse(char *txt, u8 *addr) -+{ -+ size_t i; -+ -+ for (i = 0; i < ETH_ALEN; i++) { -+ int a; -+ -+ a = hex2byte(txt); -+ if (a < 0) -+ return NULL; -+ txt += 2; -+ addr[i] = a; -+ if (i < ETH_ALEN - 1 && *txt++ != ':') -+ return NULL; -+ } -+ return txt; -+} -+ -+void rm_dbg_list_sta(_adapter *padapter, char *s) -+{ -+ int i; -+ _irqL irqL; -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ _list *plist, *phead; -+ -+ -+ sprintf(pstr(s), "\n"); -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, -+ struct sta_info, hash_list); -+ -+ plist = get_next(plist); -+ -+ sprintf(pstr(s), "=========================================\n"); -+ sprintf(pstr(s), "mac=" MAC_FMT "\n", -+ MAC_ARG(psta->cmn.mac_addr)); -+ sprintf(pstr(s), "state=0x%x, aid=%d, macid=%d\n", -+ psta->state, psta->cmn.aid, psta->cmn.mac_id); -+ sprintf(pstr(s), "rm_cap="RM_CAP_FMT"\n", -+ RM_CAP_ARG(psta->rm_en_cap)); -+ } -+ -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ sprintf(pstr(s), "=========================================\n"); -+} -+ -+void rm_dbg_help(_adapter *padapter, char *s) -+{ -+ int i; -+ -+ -+ sprintf(pstr(s), "\n"); -+ sprintf(pstr(s), "rrm list_sta\n"); -+ sprintf(pstr(s), "rrm list_meas\n"); -+ -+ sprintf(pstr(s), "rrm add_meas ,m=,rpt=\n"); -+ sprintf(pstr(s), "rrm run_meas \n"); -+ sprintf(pstr(s), "rrm del_meas\n"); -+ -+ sprintf(pstr(s), "rrm run_meas rmid=xxxx,ev=xx\n"); -+ sprintf(pstr(s), "rrm activate\n"); -+ -+ for (i=0;istapriv; -+ _list *plist, *phead; -+ -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, -+ struct sta_info, hash_list); -+ -+ plist = get_next(plist); -+ -+ if (psta->cmn.aid == aid) -+ goto done; -+ -+ if (pbssid && _rtw_memcmp(psta->cmn.mac_addr, -+ pbssid, 6)) -+ goto done; -+ } -+ -+ } -+ psta = NULL; -+done: -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ return psta; -+} -+ -+static int rm_dbg_modify_meas(_adapter *padapter, char *s) -+{ -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ struct rm_obj *prm; -+ struct sta_info *psta; -+ char *pmac, *ptr, *paid, *prpt, *pnbp, *pclm, *pnhm, *pbcn, *plnk; -+ unsigned val; -+ u8 bssid[ETH_ALEN]; -+ -+ -+ /* example : -+ * rrm add_meas ,m=, -+ * rrm run_meas -+ */ -+ paid = strstr(s, "aid="); -+ pmac = strstr(s, "mac="); -+ pbcn = strstr(s, "m=bcn"); -+ pclm = strstr(s, "m=clm"); -+ pnhm = strstr(s, "m=nhm"); -+ pnbp = strstr(s, "m=nb"); -+ plnk = strstr(s, "m=link"); -+ prpt = strstr(s, "rpt="); -+ -+ /* set all ',' to NULL (end of line) */ -+ ptr = s; -+ while (ptr) { -+ ptr = strchr(ptr, ','); -+ if (ptr) { -+ *(ptr) = 0x0; -+ ptr++; -+ } -+ } -+ prm = (struct rm_obj *)prmpriv->prm_sel; -+ prm->q.m_token = rm_gen_meas_token(padapter); -+ psta = prm->psta; -+ -+ if (paid) { /* find sta_info according to aid */ -+ paid += 4; /* skip aid= */ -+ sscanf(paid, "%u", &val); /* aid=x */ -+ psta = rm_get_sta(padapter, val, NULL); -+ -+ } else if (pmac) { /* find sta_info according to bssid */ -+ pmac += 4; /* skip mac= */ -+ if (hwaddr_parse(pmac, bssid) == NULL) { -+ sprintf(pstr(s), "Err: \nincorrect mac format\n"); -+ return _FAIL; -+ } -+ psta = rm_get_sta(padapter, 0xff, bssid); -+ } -+ -+ if (psta) { -+ prm->psta = psta; -+ prm->q.diag_token = rm_gen_dialog_token(padapter); -+ prm->rmid = rm_gen_rmid(padapter, prm, RM_MASTER); -+ } else -+ return _FAIL; -+ -+ prm->q.action_code = RM_ACT_RADIO_MEAS_REQ; -+ if (pbcn) { -+ prm->q.m_type = bcn_req; -+ prm->q.rand_intvl = le16_to_cpu(100); -+ prm->q.meas_dur = le16_to_cpu(100); -+ } else if (pnhm) { -+ prm->q.m_type = noise_histo_req; -+ } else if (pclm) { -+ prm->q.m_type = ch_load_req; -+ } else if (pnbp) { -+ prm->q.action_code = RM_ACT_NB_REP_REQ; -+ } else if (plnk) { -+ prm->q.action_code = RM_ACT_LINK_MEAS_REQ; -+ } else -+ return _FAIL; -+ -+ if (prpt) { -+ prpt += 4; /* skip rpt= */ -+ sscanf(prpt, "%u", &val); -+ prm->q.rpt = (u8)val; -+ } -+ -+ return _SUCCESS; -+} -+ -+static void rm_dbg_activate_meas(_adapter *padapter, char *s) -+{ -+ struct rm_priv *prmpriv = &(padapter->rmpriv); -+ struct rm_obj *prm; -+ -+ -+ if (prmpriv->prm_sel == NULL) { -+ sprintf(pstr(s), "\nErr: No inActivate measurement\n"); -+ return; -+ } -+ prm = (struct rm_obj *)prmpriv->prm_sel; -+ -+ /* verify attributes */ -+ if (prm->psta == NULL) { -+ sprintf(pstr(s), "\nErr: inActivate meas has no psta\n"); -+ return; -+ } -+ -+ /* measure current channel */ -+ prm->q.ch_num = padapter->mlmeextpriv.cur_channel; -+ prm->q.op_class = rm_get_oper_class_via_ch(prm->q.ch_num); -+ -+ /* enquee rmobj */ -+ rm_enqueue_rmobj(padapter, prm, _FALSE); -+ -+ sprintf(pstr(s), "\nActivate rmid=%x, state=%s, meas_type=%s\n", -+ prm->rmid, rm_state_name(prm->state), -+ rm_type_req_name(prm->q.m_type)); -+ -+ sprintf(pstr(s), "aid=%d, mac=" MAC_FMT "\n", -+ prm->psta->cmn.aid, MAC_ARG(prm->psta->cmn.mac_addr)); -+ -+ /* clearn inActivate prm info */ -+ prmpriv->prm_sel = NULL; -+} -+ -+/* for ioctl */ -+int rm_send_bcn_reqs(_adapter *padapter, u8 *sta_addr, u8 op_class, u8 ch, -+ u16 measure_duration, u8 measure_mode, u8 *bssid, u8 *ssid, -+ u8 reporting_detail, -+ u8 n_ap_ch_rpt, struct _RT_OPERATING_CLASS *rpt, -+ u8 n_elem_id, u8 *elem_id_list) -+ -+{ -+ struct rm_obj *prm; -+ char *pact; -+ struct sta_info *psta; -+ struct _RT_OPERATING_CLASS *prpt; -+ void *ptr; -+ int i,j,sz; -+ u8 bcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ -+ if (n_ap_ch_rpt > BCN_REQ_OPT_AP_CH_RPT_MAX_NUM) { -+ RTW_ERR("RM: chset num %d > %d\n", -+ n_ap_ch_rpt, BCN_REQ_OPT_AP_CH_RPT_MAX_NUM); -+ return -1; -+ } -+ /* dest sta */ -+ psta = rtw_get_stainfo(&padapter->stapriv, sta_addr); -+ if (!psta) { -+ RTW_ERR("RM: psta not found\n"); -+ return -2; -+ } -+ prm = rm_alloc_rmobj(padapter); -+ if (prm == NULL) { -+ RTW_ERR("RM: unable to alloc rm obj for requeset\n"); -+ return -3; -+ } -+ -+ prm->psta = psta; -+ prm->q.meas_dur = measure_duration; -+ -+ /* Figure 8-104 Measurement Requested format */ -+ prm->q.category = RTW_WLAN_CATEGORY_RADIO_MEAS; -+ prm->q.action_code = RM_ACT_RADIO_MEAS_REQ; -+ prm->q.m_mode = measure_mode; -+ prm->q.m_type = bcn_req; -+ prm->q.diag_token = rm_gen_dialog_token(padapter); -+ prm->q.m_token = rm_gen_meas_token(padapter); -+ prm->rmid = rm_gen_rmid(padapter, prm, RM_MASTER); -+ -+ prm->q.e_id = _MEAS_REQ_IE_; /* 38 */ -+ prm->q.ch_num = ch; -+ prm->q.op_class = op_class; -+ prm->from_ioctl = true; -+ -+ if (bssid != NULL) -+ memcpy(prm->q.bssid, bssid, ETH_ALEN); -+ else -+ memcpy(prm->q.bssid, bcast, ETH_ALEN); -+ -+ if (ssid != NULL) { -+ i = MIN(32, strlen(ssid)); -+ prm->q.opt.bcn.ssid.SsidLength = i; -+ memcpy(prm->q.opt.bcn.ssid.Ssid, ssid, i); -+ } -+ -+ if (n_ap_ch_rpt > 0) { -+ prm->q.opt.bcn.ap_ch_rpt_num = n_ap_ch_rpt; -+ j = 0; -+ for (i = 0; i < n_ap_ch_rpt; i++) { -+ prpt = rpt++; -+ if (prpt == NULL) -+ break; -+ -+ sz = sizeof(struct _RT_OPERATING_CLASS) * prpt->Len; -+ ptr = rtw_malloc(sz); -+ _rtw_memcpy(ptr, prpt, sz); -+ prm->q.opt.bcn.ap_ch_rpt[i] = (struct _RT_OPERATING_CLASS *)ptr; -+ } -+ } -+ prm->q.opt.bcn.rep_detail = reporting_detail; -+ -+ if ((n_elem_id > 0) && (n_elem_id < BCN_REQ_REQ_OPT_MAX_NUM)) { -+ prm->q.opt.bcn.req_id_num = n_elem_id; -+ _rtw_memcpy(prm->q.opt.bcn.req_id, elem_id_list, n_elem_id); -+ } -+ /* enquee rmobj */ -+ rm_enqueue_rmobj(padapter, prm, _FALSE); -+ -+ RTW_INFO("\nAdd rmid=%x, meas_type=%s ok\n", -+ prm->rmid, rm_type_req_name(prm->q.m_type)); -+ -+ if (prm->psta) -+ RTW_INFO("mac="MAC_FMT"\n", MAC_ARG(prm->psta->cmn.mac_addr)); -+ return 0; -+} -+ -+void indicate_beacon_report(u8 *sta_addr, -+ u8 n_measure_rpt, u32 elem_len, u8 *elem) -+{ -+ RTW_INFO("RM: recv bcn reprot from mac="MAC_FMT"\n", MAC_ARG(sta_addr)); -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ cmap_intfs_nl_beacon_report_event(sta_addr, n_measure_rpt, elem_len, elem); -+#endif -+} -+ -+static void rm_dbg_add_meas(_adapter *padapter, char *s) -+{ -+ struct rm_priv *prmpriv = &(padapter->rmpriv); -+ struct rm_obj *prm; -+ char *pact; -+ -+ -+ /* example : -+ * rrm add_meas ,m= -+ * rrm run_meas -+ */ -+ prm = (struct rm_obj *)prmpriv->prm_sel; -+ if (prm == NULL) -+ prm = rm_alloc_rmobj(padapter); -+ -+ if (prm == NULL) { -+ sprintf(pstr(s), "\nErr: alloc meas fail\n"); -+ return; -+ } -+ -+ prmpriv->prm_sel = prm; -+ -+ pact = strstr(s, "act"); -+ if (rm_dbg_modify_meas(padapter, s) == _FAIL) { -+ -+ sprintf(pstr(s), "\nErr: add meas fail\n"); -+ rm_free_rmobj(prm); -+ prmpriv->prm_sel = NULL; -+ return; -+ } -+ prm->q.category = RTW_WLAN_CATEGORY_RADIO_MEAS; -+ prm->q.e_id = _MEAS_REQ_IE_; /* 38 */ -+ -+ sprintf(pstr(s), "\nAdd rmid=%x, meas_type=%s ok\n", -+ prm->rmid, rm_type_req_name(prm->q.m_type)); -+ -+ if (prm->psta) -+ sprintf(pstr(s), "mac="MAC_FMT"\n", -+ MAC_ARG(prm->psta->cmn.mac_addr)); -+ -+ if (pact) -+ rm_dbg_activate_meas(padapter, pstr(s)); -+} -+ -+static void rm_dbg_del_meas(_adapter *padapter, char *s) -+{ -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ struct rm_obj *prm = (struct rm_obj *)prmpriv->prm_sel; -+ -+ -+ if (prm) { -+ sprintf(pstr(s), "\ndelete rmid=%x\n",prm->rmid); -+ -+ /* free inActivate meas - enqueue yet */ -+ prmpriv->prm_sel = NULL; -+ rtw_mfree(prmpriv->prm_sel, sizeof(struct rm_obj)); -+ } else -+ sprintf(pstr(s), "Err: no inActivate measurement\n"); -+} -+ -+static void rm_dbg_run_meas(_adapter *padapter, char *s) -+{ -+ struct rm_obj *prm; -+ char *pevid, *prmid; -+ u32 rmid, evid; -+ -+ -+ prmid = strstr(s, "rmid="); /* hex */ -+ pevid = strstr(s, "evid="); /* dec */ -+ -+ if (prmid && pevid) { -+ prmid += 5; /* rmid= */ -+ sscanf(prmid, "%x", &rmid); -+ -+ pevid += 5; /* evid= */ -+ sscanf(pevid, "%u", &evid); -+ } else { -+ sprintf(pstr(s), "\nErr: incorrect attribute\n"); -+ return; -+ } -+ -+ prm = rm_get_rmobj(padapter, rmid); -+ -+ if (!prm) { -+ sprintf(pstr(s), "\nErr: measurement not found\n"); -+ return; -+ } -+ -+ if (evid >= RM_EV_max) { -+ sprintf(pstr(s), "\nErr: wrong event id\n"); -+ return; -+ } -+ -+ rm_post_event(padapter, prm->rmid, evid); -+ sprintf(pstr(s), "\npost %s to rmid=%x\n",rm_event_name(evid), rmid); -+} -+ -+static void rm_dbg_show_meas(struct rm_obj *prm, char *s) -+{ -+ struct sta_info *psta; -+ -+ psta = prm->psta; -+ -+ if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) { -+ -+ sprintf(pstr(s), "\nrmid=%x, meas_type=%s\n", -+ prm->rmid, rm_type_req_name(prm->q.m_type)); -+ -+ } else if (prm->q.action_code == RM_ACT_NB_REP_REQ) { -+ -+ sprintf(pstr(s), "\nrmid=%x, action=neighbor_req\n", -+ prm->rmid); -+ } else -+ sprintf(pstr(s), "\nrmid=%x, action=unknown\n", -+ prm->rmid); -+ -+ if (psta) -+ sprintf(pstr(s), "aid=%d, mac="MAC_FMT"\n", -+ psta->cmn.aid, MAC_ARG(psta->cmn.mac_addr)); -+ -+ sprintf(pstr(s), "clock=%d, state=%s, rpt=%u/%u\n", -+ (int)ATOMIC_READ(&prm->pclock->counter), -+ rm_state_name(prm->state), prm->p.rpt, prm->q.rpt); -+} -+ -+static void rm_dbg_list_meas(_adapter *padapter, char *s) -+{ -+ int meas_amount; -+ _irqL irqL; -+ struct rm_obj *prm; -+ struct sta_info *psta; -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ _queue *queue = &prmpriv->rm_queue; -+ _list *plist, *phead; -+ -+ -+ sprintf(pstr(s), "\n"); -+ _enter_critical(&queue->lock, &irqL); -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ meas_amount = 0; -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ prm = LIST_CONTAINOR(plist, struct rm_obj, list); -+ meas_amount++; -+ plist = get_next(plist); -+ psta = prm->psta; -+ sprintf(pstr(s), "=========================================\n"); -+ -+ rm_dbg_show_meas(prm, s); -+ } -+ _exit_critical(&queue->lock, &irqL); -+ -+ sprintf(pstr(s), "=========================================\n"); -+ -+ if (meas_amount==0) { -+ sprintf(pstr(s), "No Activate measurement\n"); -+ sprintf(pstr(s), "=========================================\n"); -+ } -+ -+ if (prmpriv->prm_sel == NULL) -+ sprintf(pstr(s), "\nNo inActivate measurement\n"); -+ else { -+ sprintf(pstr(s), "\ninActivate measurement\n"); -+ rm_dbg_show_meas((struct rm_obj *)prmpriv->prm_sel, s); -+ } -+} -+#endif /* RM_SUPPORT_IWPRIV_DBG */ -+ -+int verify_bcn_req(_adapter *padapter, struct sta_info *psta) -+{ -+ char *bssid = NULL; -+ char ssid[] = "RealKungFu"; -+ u8 op_class = 0; -+ u8 ch = 255; -+ u16 measure_duration = 100; -+ u8 reporting_detaial = 0; -+ u8 n_ap_ch_rpt = 6; -+ u8 measure_mode = bcn_req_active; -+ u8 req[] = {1,2,3}; -+ u8 req_len = sizeof(req); -+ -+ -+ static RT_OPERATING_CLASS US[] = { -+ /* 0, OP_CLASS_NULL */ //{ 0, 0, {}}, -+ /* 1, OP_CLASS_1 */ {115, 4, {36, 40, 44, 48}}, -+ /* 2, OP_CLASS_2 */ {118, 4, {52, 56, 60, 64}}, -+ /* 3, OP_CLASS_3 */ {124, 4, {149, 153, 157, 161}}, -+ /* 4, OP_CLASS_4 */ {121, 11, {100, 104, 108, 112, 116, 120, 124, -+ 128, 132, 136, 140}}, -+ /* 5, OP_CLASS_5 */ {125, 5, {149, 153, 157, 161, 165}}, -+ /* 6, OP_CLASS_12 */ { 81, 11, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}} -+ }; -+ -+ rm_send_bcn_reqs(padapter, psta->cmn.mac_addr, op_class, ch, -+ measure_duration, measure_mode, bssid, ssid, -+ reporting_detaial, n_ap_ch_rpt, US, req_len, req); -+ return 0; -+} -+ -+void rm_dbg_cmd(_adapter *padapter, char *s) -+{ -+ unsigned val; -+ char *paid; -+ struct sta_info *psta=NULL; -+ -+#if (RM_SUPPORT_IWPRIV_DBG) -+ if (_rtw_memcmp(s, "help", 4)) { -+ rm_dbg_help(padapter, s); -+ -+ } else if (_rtw_memcmp(s, "send_bcn_req", 12)) { -+ -+ /* rtwpriv wls1 rrm send_bcn_req aid=1 */ -+ paid = strstr(s, "aid="); -+ if (paid) { /* find sta_info according to aid */ -+ paid += 4; /* skip aid= */ -+ sscanf(paid, "%u", &val); /* aid=x */ -+ psta = rm_get_sta(padapter, val, NULL); -+ -+ if (psta) -+ verify_bcn_req(padapter, psta); -+ } -+ -+ } else if (_rtw_memcmp(s, "list_sta", 8)) { -+ rm_dbg_list_sta(padapter, s); -+ -+ } else if (_rtw_memcmp(s, "list_meas", 9)) { -+ rm_dbg_list_meas(padapter, s); -+ -+ } else if (_rtw_memcmp(s, "add_meas", 8)) { -+ rm_dbg_add_meas(padapter, s); -+ -+ } else if (_rtw_memcmp(s, "del_meas", 8)) { -+ rm_dbg_del_meas(padapter, s); -+ -+ } else if (_rtw_memcmp(s, "activate", 8)) { -+ rm_dbg_activate_meas(padapter, s); -+ -+ } else if (_rtw_memcmp(s, "run_meas", 8)) { -+ rm_dbg_run_meas(padapter, s); -+ -+ } else if (_rtw_memcmp(s, "nb", 2)) { -+ -+ paid = strstr(s, "aid="); -+ -+ if (paid) { /* find sta_info according to aid */ -+ paid += 4; /* skip aid= */ -+ sscanf(paid, "%u", &val); /* aid=x */ -+ psta = rm_get_sta(padapter, val, NULL); -+ -+ if (psta) -+ rm_add_nb_req(padapter, psta); -+ } -+ } -+#else -+ sprintf(pstr(s), "\n"); -+ sprintf(pstr(s), "rrm debug command was disabled\n"); -+#endif -+} -+#endif /* CONFIG_RTW_80211K */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_rm_fsm.c b/drivers/staging/rtl8723cs/core/rtw_rm_fsm.c -new file mode 100644 -index 000000000000..244b799a2f1a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_rm_fsm.c -@@ -0,0 +1,1017 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+#ifdef CONFIG_RTW_80211K -+#include "rtw_rm_fsm.h" -+#include "rtw_rm_util.h" -+ -+struct fsm_state { -+ u8 *name; -+ int(*fsm_func)(struct rm_obj *prm, enum RM_EV_ID evid); -+}; -+ -+static void rm_state_initial(struct rm_obj *prm); -+static void rm_state_goto(struct rm_obj *prm, enum RM_STATE rm_state); -+static void rm_state_run(struct rm_obj *prm, enum RM_EV_ID evid); -+static struct rm_event *rm_dequeue_ev(_queue *queue); -+static struct rm_obj *rm_dequeue_rm(_queue *queue); -+ -+void rm_timer_callback(void *data) -+{ -+ int i; -+ _adapter *padapter = (_adapter *)data; -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ struct rm_clock *pclock; -+ -+ -+ /* deal with clock */ -+ for (i=0;iclock[i]; -+ if (pclock->prm == NULL -+ ||(ATOMIC_READ(&(pclock->counter)) == 0)) -+ continue; -+ -+ ATOMIC_DEC(&(pclock->counter)); -+ -+ if (ATOMIC_READ(&(pclock->counter)) == 0) -+ rm_post_event(pclock->prm->psta->padapter, -+ pclock->prm->rmid, prmpriv->clock[i].evid); -+ } -+ _set_timer(&prmpriv->rm_timer, CLOCK_UNIT); -+} -+ -+int rtw_init_rm(_adapter *padapter) -+{ -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ -+ -+ RTW_INFO("RM: %s\n",__func__); -+ _rtw_init_queue(&(prmpriv->rm_queue)); -+ _rtw_init_queue(&(prmpriv->ev_queue)); -+ -+ /* bit 0-7 */ -+ prmpriv->rm_en_cap_def[0] = 0 -+ | BIT(RM_LINK_MEAS_CAP_EN) -+ | BIT(RM_NB_REP_CAP_EN) -+ /*| BIT(RM_PARAL_MEAS_CAP_EN)*/ -+ | BIT(RM_REPEAT_MEAS_CAP_EN) -+ | BIT(RM_BCN_PASSIVE_MEAS_CAP_EN) -+ | BIT(RM_BCN_ACTIVE_MEAS_CAP_EN) -+ | BIT(RM_BCN_TABLE_MEAS_CAP_EN) -+ /*| BIT(RM_BCN_MEAS_REP_COND_CAP_EN)*/; -+ -+ /* bit 8-15 */ -+ prmpriv->rm_en_cap_def[1] = 0 -+ /*| BIT(RM_FRAME_MEAS_CAP_EN - 8)*/ -+#ifdef CONFIG_RTW_ACS -+ | BIT(RM_CH_LOAD_CAP_EN - 8) -+ | BIT(RM_NOISE_HISTO_CAP_EN - 8) -+#endif -+ /*| BIT(RM_STATIS_MEAS_CAP_EN - 8)*/ -+ /*| BIT(RM_LCI_MEAS_CAP_EN - 8)*/ -+ /*| BIT(RM_LCI_AMIMUTH_CAP_EN - 8)*/ -+ /*| BIT(RM_TRANS_STREAM_CAT_MEAS_CAP_EN - 8)*/ -+ /*| BIT(RM_TRIG_TRANS_STREAM_CAT_MEAS_CAP_EN - 8)*/; -+ -+ /* bit 16-23 */ -+ prmpriv->rm_en_cap_def[2] = 0 -+ /*| BIT(RM_AP_CH_REP_CAP_EN - 16)*/ -+ /*| BIT(RM_RM_MIB_CAP_EN - 16)*/ -+ /*| BIT(RM_OP_CH_MAX_MEAS_DUR0 - 16)*/ -+ /*| BIT(RM_OP_CH_MAX_MEAS_DUR1 - 16)*/ -+ /*| BIT(RM_OP_CH_MAX_MEAS_DUR2 - 16)*/ -+ /*| BIT(RM_NONOP_CH_MAX_MEAS_DUR0 - 16)*/ -+ /*| BIT(RM_NONOP_CH_MAX_MEAS_DUR1 - 16)*/ -+ /*| BIT(RM_NONOP_CH_MAX_MEAS_DUR2 - 16)*/; -+ -+ /* bit 24-31 */ -+ prmpriv->rm_en_cap_def[3] = 0 -+ /*| BIT(RM_MEAS_PILOT_CAP0 - 24)*/ -+ /*| BIT(RM_MEAS_PILOT_CAP1 - 24)*/ -+ /*| BIT(RM_MEAS_PILOT_CAP2 - 24)*/ -+ /*| BIT(RM_MEAS_PILOT_TRANS_INFO_CAP_EN - 24)*/ -+ /*| BIT(RM_NB_REP_TSF_OFFSET_CAP_EN - 24)*/ -+ | BIT(RM_RCPI_MEAS_CAP_EN - 24) -+ | BIT(RM_RSNI_MEAS_CAP_EN - 24) -+ /*| BIT(RM_BSS_AVG_ACCESS_DELAY_CAP_EN - 24)*/; -+ -+ /* bit 32-39 */ -+ prmpriv->rm_en_cap_def[4] = 0 -+ /*| BIT(RM_BSS_AVG_ACCESS_DELAY_CAP_EN - 32)*/ -+ /*| BIT(RM_AVALB_ADMIS_CAPACITY_CAP_EN - 32)*/ -+ /*| BIT(RM_ANT_CAP_EN - 32)*/; -+ -+ prmpriv->enable = _TRUE; -+ -+ /* clock timer */ -+ rtw_init_timer(&prmpriv->rm_timer, -+ padapter, rm_timer_callback, padapter); -+ _set_timer(&prmpriv->rm_timer, CLOCK_UNIT); -+ -+ prmpriv->meas_token = 1; -+ return _SUCCESS; -+} -+ -+int rtw_deinit_rm(_adapter *padapter) -+{ -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ struct rm_obj *prm; -+ struct rm_event *pev; -+ -+ -+ RTW_INFO("RM: %s\n",__func__); -+ prmpriv->enable = _FALSE; -+ _cancel_timer_ex(&prmpriv->rm_timer); -+ -+ /* free all events and measurements */ -+ while((pev = rm_dequeue_ev(&prmpriv->ev_queue)) != NULL) -+ rtw_mfree((void *)pev, sizeof(struct rm_event)); -+ -+ while((prm = rm_dequeue_rm(&prmpriv->rm_queue)) != NULL) -+ rm_state_run(prm, RM_EV_cancel); -+ -+ _rtw_deinit_queue(&(prmpriv->rm_queue)); -+ _rtw_deinit_queue(&(prmpriv->ev_queue)); -+ -+ return _SUCCESS; -+} -+ -+int rtw_free_rm_priv(_adapter *padapter) -+{ -+ return rtw_deinit_rm(padapter); -+} -+ -+static int rm_enqueue_ev(_queue *queue, struct rm_event *obj, bool to_head) -+{ -+ _irqL irqL; -+ -+ -+ if (obj == NULL) -+ return _FAIL; -+ -+ _enter_critical(&queue->lock, &irqL); -+ -+ if (to_head) -+ rtw_list_insert_head(&obj->list, &queue->queue); -+ else -+ rtw_list_insert_tail(&obj->list, &queue->queue); -+ -+ _exit_critical(&queue->lock, &irqL); -+ -+ return _SUCCESS; -+} -+ -+static void rm_set_clock(struct rm_obj *prm, u32 ms, enum RM_EV_ID evid) -+{ -+ ATOMIC_SET(&(prm->pclock->counter), (ms/CLOCK_UNIT)); -+ prm->pclock->evid = evid; -+} -+ -+static struct rm_clock *rm_alloc_clock(_adapter *padapter, struct rm_obj *prm) -+{ -+ int i; -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ struct rm_clock *pclock = NULL; -+ -+ -+ for (i=0;iclock[i]; -+ -+ if (pclock->prm == NULL) { -+ pclock->prm = prm; -+ ATOMIC_SET(&(pclock->counter), 0); -+ pclock->evid = RM_EV_max; -+ break; -+ } -+ } -+ return pclock; -+} -+ -+static void rm_cancel_clock(struct rm_obj *prm) -+{ -+ ATOMIC_SET(&(prm->pclock->counter), 0); -+ prm->pclock->evid = RM_EV_max; -+} -+ -+static void rm_free_clock(struct rm_clock *pclock) -+{ -+ pclock->prm = NULL; -+ ATOMIC_SET(&(pclock->counter), 0); -+ pclock->evid = RM_EV_max; -+} -+ -+static int is_list_linked(const struct list_head *head) -+{ -+ return head->prev != NULL; -+} -+ -+void rm_free_rmobj(struct rm_obj *prm) -+{ -+ if (is_list_linked(&prm->list)) -+ rtw_list_delete(&prm->list); -+ -+ if (prm->q.pssid) -+ rtw_mfree(prm->q.pssid, strlen(prm->q.pssid)+1); -+ -+ if (prm->q.opt.bcn.req_start) -+ rtw_mfree(prm->q.opt.bcn.req_start, -+ prm->q.opt.bcn.req_len); -+ -+ if (prm->pclock) -+ rm_free_clock(prm->pclock); -+ -+ rtw_mfree((void *)prm, sizeof(struct rm_obj)); -+} -+ -+struct rm_obj *rm_alloc_rmobj(_adapter *padapter) -+{ -+ struct rm_obj *prm; -+ -+ -+ prm = (struct rm_obj *)rtw_malloc(sizeof(struct rm_obj)); -+ if (prm == NULL) -+ return NULL; -+ -+ _rtw_memset(prm, 0, sizeof(struct rm_obj)); -+ -+ /* alloc timer */ -+ if ((prm->pclock = rm_alloc_clock(padapter, prm)) == NULL) { -+ rm_free_rmobj(prm); -+ return NULL; -+ } -+ return prm; -+} -+ -+int rm_enqueue_rmobj(_adapter *padapter, struct rm_obj *prm, bool to_head) -+{ -+ _irqL irqL; -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ _queue *queue = &prmpriv->rm_queue; -+ -+ -+ if (prm == NULL) -+ return _FAIL; -+ -+ _enter_critical(&queue->lock, &irqL); -+ if (to_head) -+ rtw_list_insert_head(&prm->list, &queue->queue); -+ else -+ rtw_list_insert_tail(&prm->list, &queue->queue); -+ _exit_critical(&queue->lock, &irqL); -+ -+ rm_state_initial(prm); -+ -+ return _SUCCESS; -+} -+ -+static struct rm_obj *rm_dequeue_rm(_queue *queue) -+{ -+ _irqL irqL; -+ struct rm_obj *prm; -+ -+ -+ _enter_critical(&queue->lock, &irqL); -+ if (rtw_is_list_empty(&(queue->queue))) -+ prm = NULL; -+ else { -+ prm = LIST_CONTAINOR(get_next(&(queue->queue)), -+ struct rm_obj, list); -+ /* rtw_list_delete(&prm->list); */ -+ } -+ _exit_critical(&queue->lock, &irqL); -+ -+ return prm; -+} -+ -+static struct rm_event *rm_dequeue_ev(_queue *queue) -+{ -+ _irqL irqL; -+ struct rm_event *ev; -+ -+ -+ _enter_critical(&queue->lock, &irqL); -+ if (rtw_is_list_empty(&(queue->queue))) -+ ev = NULL; -+ else { -+ ev = LIST_CONTAINOR(get_next(&(queue->queue)), -+ struct rm_event, list); -+ rtw_list_delete(&ev->list); -+ } -+ _exit_critical(&queue->lock, &irqL); -+ -+ return ev; -+} -+ -+static struct rm_obj *_rm_get_rmobj(_queue *queue, u32 rmid) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ struct rm_obj *prm = NULL; -+ -+ -+ if (rmid == 0) -+ return NULL; -+ -+ _enter_critical(&queue->lock, &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ -+ prm = LIST_CONTAINOR(plist, struct rm_obj, list); -+ if (rmid == (prm->rmid)) { -+ _exit_critical(&queue->lock, &irqL); -+ return prm; -+ } -+ plist = get_next(plist); -+ } -+ _exit_critical(&queue->lock, &irqL); -+ -+ return NULL; -+} -+ -+struct sta_info *rm_get_psta(_adapter *padapter, u32 rmid) -+{ -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ struct rm_obj *prm; -+ -+ -+ prm = _rm_get_rmobj(&prmpriv->rm_queue, rmid); -+ -+ if (prm) -+ return prm->psta; -+ -+ return NULL; -+} -+ -+struct rm_obj *rm_get_rmobj(_adapter *padapter, u32 rmid) -+{ -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ -+ return _rm_get_rmobj(&prmpriv->rm_queue, rmid); -+} -+ -+u8 rtw_rm_post_envent_cmd(_adapter *padapter, u32 rmid, u8 evid) -+{ -+ struct cmd_obj *pcmd; -+ struct rm_event *pev; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 res = _SUCCESS; -+ -+ -+ pcmd = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (pcmd == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ pev = (struct rm_event*)rtw_zmalloc(sizeof(struct rm_event)); -+ -+ if (pev == NULL) { -+ rtw_mfree((u8 *) pcmd, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ pev->rmid = rmid; -+ pev->evid = evid; -+ -+ init_h2fwcmd_w_parm_no_rsp(pcmd, pev, CMD_RM_POST_EVENT); -+ res = rtw_enqueue_cmd(pcmdpriv, pcmd); -+exit: -+ return res; -+} -+ -+int rm_post_event(_adapter *padapter, u32 rmid, enum RM_EV_ID evid) -+{ -+ if (padapter->rmpriv.enable == _FALSE) -+ return _FALSE; -+ -+ RTW_INFO("RM: post asyn %s to rmid=%x\n", rm_event_name(evid), rmid); -+ rtw_rm_post_envent_cmd(padapter, rmid, evid); -+ return _SUCCESS; -+} -+ -+int _rm_post_event(_adapter *padapter, u32 rmid, enum RM_EV_ID evid) -+{ -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ struct rm_event *pev; -+ -+ if (evid >= RM_EV_max || rmid == 0) -+ return _FALSE; -+ -+ pev = (struct rm_event *)rtw_malloc(sizeof(struct rm_event)); -+ if (pev == NULL) -+ return _FALSE; -+ -+ pev->rmid = rmid; -+ pev->evid = evid; -+ -+ RTW_INFO("RM: post sync %s to rmid=%x\n", rm_event_name(evid), rmid); -+ rm_enqueue_ev(&prmpriv->ev_queue, pev, FALSE); -+ -+ return _SUCCESS; -+} -+ -+static void rm_bcast_aid_handler(_adapter *padapter, struct rm_event *pev) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ _queue *queue = &padapter->rmpriv.rm_queue; -+ struct rm_obj *prm; -+ -+ -+ _enter_critical(&queue->lock, &irqL); -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ -+ prm = LIST_CONTAINOR(plist, struct rm_obj, list); -+ plist = get_next(plist); -+ if (RM_GET_AID(pev->rmid) == RM_GET_AID(prm->rmid)) { -+ _exit_critical(&queue->lock, &irqL); -+ rm_state_run(prm, pev->evid); -+ _enter_critical(&queue->lock, &irqL); -+ } -+ } -+ _exit_critical(&queue->lock, &irqL); -+ return; -+} -+ -+/* main handler of RM (Resource Management) */ -+void rm_handler(_adapter *padapter, struct rm_event *pe) -+{ -+ int i; -+ struct rm_priv *prmpriv = &padapter->rmpriv; -+ struct rm_obj *prm; -+ struct rm_event *pev; -+ -+ -+ /* dequeue event */ -+ while((pev = rm_dequeue_ev(&prmpriv->ev_queue)) != NULL) -+ { -+ if (RM_IS_ID_FOR_ALL(pev->rmid)) { -+ /* apply to all aid mateched measurement */ -+ rm_bcast_aid_handler(padapter, pev); -+ rtw_mfree((void *)pev, sizeof(struct rm_event)); -+ continue; -+ } -+ -+ /* retrieve rmobj */ -+ prm = _rm_get_rmobj(&prmpriv->rm_queue, pev->rmid); -+ if (prm == NULL) { -+ RTW_ERR("RM: rmid=%x event=%s doesn't find rm obj\n", -+ pev->rmid, rm_event_name(pev->evid)); -+ rtw_mfree((void *)pev, sizeof(struct rm_event)); -+ return; -+ } -+ /* run state machine */ -+ rm_state_run(prm, pev->evid); -+ rtw_mfree((void *)pev, sizeof(struct rm_event)); -+ } -+} -+ -+static int rm_issue_meas_req(struct rm_obj *prm) -+{ -+ switch (prm->q.action_code) { -+ case RM_ACT_RADIO_MEAS_REQ: -+ switch (prm->q.m_type) { -+ case bcn_req: -+ case ch_load_req: -+ case noise_histo_req: -+ issue_radio_meas_req(prm); -+ break; -+ default: -+ break; -+ } /* meas_type */ -+ break; -+ case RM_ACT_NB_REP_REQ: -+ /* issue neighbor request */ -+ issue_nb_req(prm); -+ break; -+ case RM_ACT_LINK_MEAS_REQ: -+ issue_link_meas_req(prm); -+ break; -+ default: -+ return _FALSE; -+ } /* action_code */ -+ -+ return _SUCCESS; -+} -+ -+/* -+* RM state machine -+*/ -+ -+static int rm_state_idle(struct rm_obj *prm, enum RM_EV_ID evid) -+{ -+ _adapter *padapter = prm->psta->padapter; -+ u8 val8; -+ u32 val32; -+ -+ -+ prm->p.category = RTW_WLAN_CATEGORY_RADIO_MEAS; -+ -+ switch (evid) { -+ case RM_EV_state_in: -+ switch (prm->q.action_code) { -+ case RM_ACT_RADIO_MEAS_REQ: -+ /* copy attrib from meas_req to meas_rep */ -+ prm->p.action_code = RM_ACT_RADIO_MEAS_REP; -+ prm->p.diag_token = prm->q.diag_token; -+ prm->p.e_id = _MEAS_RSP_IE_; -+ prm->p.m_token = prm->q.m_token; -+ prm->p.m_type = prm->q.m_type; -+ prm->p.rpt = prm->q.rpt; -+ prm->p.ch_num = prm->q.ch_num; -+ prm->p.op_class = prm->q.op_class; -+ -+ if (prm->q.m_type == ch_load_req -+ || prm->q.m_type == noise_histo_req) { -+ /* -+ * phydm measure current ch periodically -+ * scan current ch is not necessary -+ */ -+ val8 = padapter->mlmeextpriv.cur_channel; -+ if (prm->q.ch_num == val8) -+ prm->poll_mode = 1; -+ } -+ RTW_INFO("RM: rmid=%x %s switch in repeat=%u\n", -+ prm->rmid, rm_type_req_name(prm->q.m_type), -+ prm->q.rpt); -+ break; -+ case RM_ACT_NB_REP_REQ: -+ prm->p.action_code = RM_ACT_NB_REP_RESP; -+ RTW_INFO("RM: rmid=%x Neighbor request switch in\n", -+ prm->rmid); -+ break; -+ case RM_ACT_LINK_MEAS_REQ: -+ prm->p.diag_token = prm->q.diag_token; -+ prm->p.action_code = RM_ACT_LINK_MEAS_REP; -+ RTW_INFO("RM: rmid=%x Link meas switch in\n", -+ prm->rmid); -+ break; -+ default: -+ prm->p.action_code = prm->q.action_code; -+ rm_set_rep_mode(prm, MEAS_REP_MOD_INCAP); -+ RTW_INFO("RM: rmid=%x recv unknown action %d\n", -+ prm->rmid,prm->p.action_code); -+ break; -+ } /* switch() */ -+ -+ if (prm->rmid & RM_MASTER) { -+ if (rm_issue_meas_req(prm) == _SUCCESS) -+ rm_state_goto(prm, RM_ST_WAIT_MEAS); -+ else -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ } else { -+ rm_state_goto(prm, RM_ST_DO_MEAS); -+ return _SUCCESS; -+ } -+ -+ if (prm->p.m_mode) { -+ issue_null_reply(prm); -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ } -+ if (prm->q.rand_intvl) { -+ /* get low tsf to generate random interval */ -+ val32 = rtw_read32(padapter, REG_TSFTR); -+ val32 = val32 % prm->q.rand_intvl; -+ RTW_INFO("RM: rmid=%x rand_intval=%d, rand=%d\n", -+ prm->rmid, (int)prm->q.rand_intvl,val32); -+ rm_set_clock(prm, prm->q.rand_intvl, -+ RM_EV_delay_timer_expire); -+ return _SUCCESS; -+ } -+ break; -+ case RM_EV_delay_timer_expire: -+ rm_state_goto(prm, RM_ST_DO_MEAS); -+ break; -+ case RM_EV_cancel: -+ rm_state_goto(prm, RM_ST_END); -+ break; -+ case RM_EV_state_out: -+ rm_cancel_clock(prm); -+ break; -+ default: -+ break; -+ } -+ return _SUCCESS; -+} -+ -+/* we do the measuring */ -+static int rm_state_do_meas(struct rm_obj *prm, enum RM_EV_ID evid) -+{ -+ _adapter *padapter = prm->psta->padapter; -+ u8 val8; -+ u64 val64; -+ -+ -+ switch (evid) { -+ case RM_EV_state_in: -+ if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) { -+ switch (prm->q.m_type) { -+ case bcn_req: -+ if (prm->q.m_mode == bcn_req_bcn_table) { -+ RTW_INFO("RM: rmid=%x Beacon table\n", -+ prm->rmid); -+ _rm_post_event(padapter, prm->rmid, -+ RM_EV_survey_done); -+ return _SUCCESS; -+ } -+ break; -+ case ch_load_req: -+ case noise_histo_req: -+ if (prm->poll_mode) -+ _rm_post_event(padapter, prm->rmid, -+ RM_EV_survey_done); -+ return _SUCCESS; -+ default: -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ } -+ -+ if (!ready_for_scan(prm)) { -+ prm->wait_busy = RM_BUSY_TRAFFIC_TIMES; -+ RTW_INFO("RM: wait busy traffic - %d\n", -+ prm->wait_busy); -+ rm_set_clock(prm, RM_WAIT_BUSY_TIMEOUT, -+ RM_EV_busy_timer_expire); -+ return _SUCCESS; -+ } -+ } else if (prm->q.action_code == RM_ACT_LINK_MEAS_REQ) { -+ ; /* do nothing */ -+ rm_state_goto(prm, RM_ST_SEND_REPORT); -+ return _SUCCESS; -+ } -+ _rm_post_event(padapter, prm->rmid, RM_EV_start_meas); -+ break; -+ case RM_EV_start_meas: -+ if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) { -+ /* resotre measurement start time */ -+ prm->meas_start_time = rtw_hal_get_tsftr_by_port(padapter -+ , rtw_hal_get_port(padapter)); -+ -+ switch (prm->q.m_type) { -+ case bcn_req: -+ val8 = 1; /* Enable free run counter */ -+ prm->free_run_counter_valid = rtw_hal_set_hwreg( -+ padapter, HW_VAR_FREECNT, &val8); -+ -+ rm_sitesurvey(prm); -+ break; -+ case ch_load_req: -+ case noise_histo_req: -+ rm_sitesurvey(prm); -+ break; -+ default: -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ break; -+ } -+ } -+ /* handle measurement timeout */ -+ rm_set_clock(prm, RM_MEAS_TIMEOUT, RM_EV_meas_timer_expire); -+ break; -+ case RM_EV_survey_done: -+ if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) { -+ switch (prm->q.m_type) { -+ case bcn_req: -+ rm_cancel_clock(prm); -+ rm_state_goto(prm, RM_ST_SEND_REPORT); -+ return _SUCCESS; -+ case ch_load_req: -+ case noise_histo_req: -+ retrieve_radio_meas_result(prm); -+ -+ if (rm_radio_meas_report_cond(prm) == _SUCCESS) -+ rm_state_goto(prm, RM_ST_SEND_REPORT); -+ else -+ rm_set_clock(prm, RM_COND_INTVL, -+ RM_EV_retry_timer_expire); -+ break; -+ default: -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ } -+ } -+ break; -+ case RM_EV_meas_timer_expire: -+ RTW_INFO("RM: rmid=%x measurement timeount\n",prm->rmid); -+ rm_set_rep_mode(prm, MEAS_REP_MOD_REFUSE); -+ issue_null_reply(prm); -+ rm_state_goto(prm, RM_ST_END); -+ break; -+ case RM_EV_busy_timer_expire: -+ if (!ready_for_scan(prm) && prm->wait_busy--) { -+ RTW_INFO("RM: wait busy - %d\n",prm->wait_busy); -+ rm_set_clock(prm, RM_WAIT_BUSY_TIMEOUT, -+ RM_EV_busy_timer_expire); -+ break; -+ } -+ else if (prm->wait_busy <= 0) { -+ RTW_INFO("RM: wait busy timeout\n"); -+ rm_set_rep_mode(prm, MEAS_REP_MOD_REFUSE); -+ issue_null_reply(prm); -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ } -+ _rm_post_event(padapter, prm->rmid, RM_EV_start_meas); -+ break; -+ case RM_EV_request_timer_expire: -+ rm_set_rep_mode(prm, MEAS_REP_MOD_REFUSE); -+ issue_null_reply(prm); -+ rm_state_goto(prm, RM_ST_END); -+ break; -+ case RM_EV_retry_timer_expire: -+ /* expired due to meas condition mismatch, meas again */ -+ _rm_post_event(padapter, prm->rmid, RM_EV_start_meas); -+ break; -+ case RM_EV_cancel: -+ rm_set_rep_mode(prm, MEAS_REP_MOD_REFUSE); -+ issue_null_reply(prm); -+ rm_state_goto(prm, RM_ST_END); -+ break; -+ case RM_EV_state_out: -+ rm_cancel_clock(prm); -+ /* resotre measurement end time */ -+ prm->meas_end_time = rtw_hal_get_tsftr_by_port(padapter -+ , rtw_hal_get_port(padapter)); -+ -+ val8 = 0; /* Disable free run counter */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_FREECNT, &val8); -+ break; -+ default: -+ break; -+ } -+ -+ return _SUCCESS; -+} -+ -+static int rm_state_wait_meas(struct rm_obj *prm, enum RM_EV_ID evid) -+{ -+ u8 val8; -+ u64 val64; -+ -+ -+ switch (evid) { -+ case RM_EV_state_in: -+ /* we create meas_req, waiting for peer report */ -+ rm_set_clock(prm, RM_REQ_TIMEOUT, -+ RM_EV_request_timer_expire); -+ break; -+ case RM_EV_recv_rep: -+ rm_state_goto(prm, RM_ST_RECV_REPORT); -+ break; -+ case RM_EV_request_timer_expire: -+ case RM_EV_cancel: -+ rm_state_goto(prm, RM_ST_END); -+ break; -+ case RM_EV_state_out: -+ rm_cancel_clock(prm); -+ break; -+ default: -+ break; -+ } -+ return _SUCCESS; -+} -+ -+static int rm_state_send_report(struct rm_obj *prm, enum RM_EV_ID evid) -+{ -+ u8 val8; -+ -+ -+ switch (evid) { -+ case RM_EV_state_in: -+ /* we have to issue report */ -+ if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) { -+ switch (prm->q.m_type) { -+ case bcn_req: -+ issue_beacon_rep(prm); -+ break; -+ case ch_load_req: -+ case noise_histo_req: -+ issue_radio_meas_rep(prm); -+ break; -+ default: -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ } -+ -+ } else if (prm->q.action_code == RM_ACT_LINK_MEAS_REQ) { -+ issue_link_meas_rep(prm); -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ -+ } else { -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ } -+ -+ /* check repeat */ -+ if (prm->p.rpt) { -+ RTW_INFO("RM: rmid=%x repeat=%u/%u\n", -+ prm->rmid, prm->p.rpt, -+ prm->q.rpt); -+ prm->p.rpt--; -+ /* -+ * we recv meas_req, -+ * delay for a wihile and than meas again -+ */ -+ if (prm->poll_mode) -+ rm_set_clock(prm, RM_REPT_POLL_INTVL, -+ RM_EV_repeat_delay_expire); -+ else -+ rm_set_clock(prm, RM_REPT_SCAN_INTVL, -+ RM_EV_repeat_delay_expire); -+ return _SUCCESS; -+ } -+ /* we are done */ -+ rm_state_goto(prm, RM_ST_END); -+ break; -+ case RM_EV_repeat_delay_expire: -+ rm_state_goto(prm, RM_ST_DO_MEAS); -+ break; -+ case RM_EV_cancel: -+ rm_state_goto(prm, RM_ST_END); -+ break; -+ case RM_EV_state_out: -+ rm_cancel_clock(prm); -+ break; -+ default: -+ break; -+ } -+ return _SUCCESS; -+} -+ -+static int rm_state_recv_report(struct rm_obj *prm, enum RM_EV_ID evid) -+{ -+ u8 val8; -+ -+ -+ switch (evid) { -+ case RM_EV_state_in: -+ /* we issue meas_req, got peer's meas report */ -+ switch (prm->p.action_code) { -+ case RM_ACT_RADIO_MEAS_REP: -+ /* check refuse, incapable and repeat */ -+ val8 = prm->p.m_mode; -+ if (val8) { -+ RTW_INFO("RM: rmid=%x peer reject (%s repeat=%d)\n", -+ prm->rmid, -+ val8|MEAS_REP_MOD_INCAP?"INCAP": -+ val8|MEAS_REP_MOD_REFUSE?"REFUSE": -+ val8|MEAS_REP_MOD_LATE?"LATE":"", -+ prm->p.rpt); -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ } -+ break; -+ case RM_ACT_NB_REP_RESP: -+ /* report to upper layer if needing */ -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ default: -+ rm_state_goto(prm, RM_ST_END); -+ return _SUCCESS; -+ } -+ /* check repeat */ -+ if (prm->p.rpt) { -+ RTW_INFO("RM: rmid=%x repeat=%u/%u\n", -+ prm->rmid, prm->p.rpt, -+ prm->q.rpt); -+ prm->p.rpt--; -+ /* waitting more report */ -+ rm_state_goto(prm, RM_ST_WAIT_MEAS); -+ break; -+ } -+ /* we are done */ -+ rm_state_goto(prm, RM_ST_END); -+ break; -+ case RM_EV_cancel: -+ rm_state_goto(prm, RM_ST_END); -+ break; -+ case RM_EV_state_out: -+ rm_cancel_clock(prm); -+ break; -+ default: -+ break; -+ } -+ return _SUCCESS; -+} -+ -+static int rm_state_end(struct rm_obj *prm, enum RM_EV_ID evid) -+{ -+ switch (evid) { -+ case RM_EV_state_in: -+ _rm_post_event(prm->psta->padapter, prm->rmid, RM_EV_state_out); -+ break; -+ -+ case RM_EV_cancel: -+ case RM_EV_state_out: -+ default: -+ rm_free_rmobj(prm); -+ break; -+ } -+ return _SUCCESS; -+} -+ -+struct fsm_state rm_fsm[] = { -+ {"RM_ST_IDLE", rm_state_idle}, -+ {"RM_ST_DO_MEAS", rm_state_do_meas}, -+ {"RM_ST_WAIT_MEAS", rm_state_wait_meas}, -+ {"RM_ST_SEND_REPORT", rm_state_send_report}, -+ {"RM_ST_RECV_REPORT", rm_state_recv_report}, -+ {"RM_ST_END", rm_state_end} -+}; -+ -+char *rm_state_name(enum RM_STATE state) -+{ -+ return rm_fsm[state].name; -+} -+ -+char *rm_event_name(enum RM_EV_ID evid) -+{ -+ switch(evid) { -+ case RM_EV_state_in: -+ return "RM_EV_state_in"; -+ case RM_EV_busy_timer_expire: -+ return "RM_EV_busy_timer_expire"; -+ case RM_EV_delay_timer_expire: -+ return "RM_EV_delay_timer_expire"; -+ case RM_EV_meas_timer_expire: -+ return "RM_EV_meas_timer_expire"; -+ case RM_EV_repeat_delay_expire: -+ return "RM_EV_repeat_delay_expire"; -+ case RM_EV_retry_timer_expire: -+ return "RM_EV_retry_timer_expire"; -+ case RM_EV_request_timer_expire: -+ return "RM_EV_request_timer_expire"; -+ case RM_EV_wait_report: -+ return "RM_EV_wait_report"; -+ case RM_EV_start_meas: -+ return "RM_EV_start_meas"; -+ case RM_EV_survey_done: -+ return "RM_EV_survey_done"; -+ case RM_EV_recv_rep: -+ return "RM_EV_recv_report"; -+ case RM_EV_cancel: -+ return "RM_EV_cancel"; -+ case RM_EV_state_out: -+ return "RM_EV_state_out"; -+ case RM_EV_max: -+ return "RM_EV_max"; -+ default: -+ return "RM_EV_unknown"; -+ } -+ return "UNKNOWN"; -+} -+ -+static void rm_state_initial(struct rm_obj *prm) -+{ -+ prm->state = RM_ST_IDLE; -+ -+ RTW_INFO("\n"); -+ RTW_INFO("RM: rmid=%x %-18s -> %s\n",prm->rmid, -+ "new measurement", rm_fsm[prm->state].name); -+ -+ rm_post_event(prm->psta->padapter, prm->rmid, RM_EV_state_in); -+} -+ -+static void rm_state_run(struct rm_obj *prm, enum RM_EV_ID evid) -+{ -+ RTW_INFO("RM: rmid=%x %-18s %s\n",prm->rmid, -+ rm_fsm[prm->state].name,rm_event_name(evid)); -+ -+ rm_fsm[prm->state].fsm_func(prm, evid); -+} -+ -+static void rm_state_goto(struct rm_obj *prm, enum RM_STATE rm_state) -+{ -+ if (prm->state == rm_state) -+ return; -+ -+ rm_state_run(prm, RM_EV_state_out); -+ -+ RTW_INFO("\n"); -+ RTW_INFO("RM: rmid=%x %-18s -> %s\n",prm->rmid, -+ rm_fsm[prm->state].name, rm_fsm[rm_state].name); -+ -+ prm->state = rm_state; -+ rm_state_run(prm, RM_EV_state_in); -+} -+#endif /* CONFIG_RTW_80211K */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_rm_util.c b/drivers/staging/rtl8723cs/core/rtw_rm_util.c -new file mode 100644 -index 000000000000..b0c24287bb08 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_rm_util.c -@@ -0,0 +1,501 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+#ifdef CONFIG_RTW_80211K -+#include "rtw_rm_fsm.h" -+#include "rtw_rm_util.h" -+ -+/* 802.11-2012 Table E-1 Operationg classes in United States */ -+static RT_OPERATING_CLASS RTW_OP_CLASS_US[] = { -+ /* 0, OP_CLASS_NULL */ { 0, 0, {}}, -+ /* 1, OP_CLASS_1 */ {115, 4, {36, 40, 44, 48}}, -+ /* 2, OP_CLASS_2 */ {118, 4, {52, 56, 60, 64}}, -+ /* 3, OP_CLASS_3 */ {124, 4, {149, 153, 157, 161}}, -+ /* 4, OP_CLASS_4 */ {121, 11, {100, 104, 108, 112, 116, 120, 124, -+ 128, 132, 136, 140}}, -+ /* 5, OP_CLASS_5 */ {125, 5, {149, 153, 157, 161, 165}}, -+ /* 6, OP_CLASS_12 */ { 81, 11, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}} -+}; -+ -+u8 rm_get_ch_set( -+ struct rtw_ieee80211_channel *pch_set, u8 op_class, u8 ch_num) -+{ -+ int i,j,sz; -+ u8 ch_amount = 0; -+ -+ -+ sz = sizeof(RTW_OP_CLASS_US)/sizeof(struct _RT_OPERATING_CLASS); -+ -+ if (ch_num != 0) { -+ pch_set[0].hw_value = ch_num; -+ ch_amount = 1; -+ RTW_INFO("RM: meas_ch->hw_value = %u\n", pch_set->hw_value); -+ goto done; -+ } -+ -+ for (i = 0; i < sz; i++) { -+ -+ if (RTW_OP_CLASS_US[i].global_op_class == op_class) { -+ -+ for (j = 0; j < RTW_OP_CLASS_US[i].Len; j++) { -+ pch_set[j].hw_value = -+ RTW_OP_CLASS_US[i].Channel[j]; -+ RTW_INFO("RM: meas_ch[%d].hw_value = %u\n", -+ j, pch_set[j].hw_value); -+ } -+ ch_amount = RTW_OP_CLASS_US[i].Len; -+ break; -+ } -+ } -+done: -+ return ch_amount; -+} -+ -+u8 rm_get_ch_set_from_bcn_req_opt( -+ struct rtw_ieee80211_channel *pch_set, struct bcn_req_opt *opt) -+{ -+ int i,j,k,sz; -+ struct _RT_OPERATING_CLASS *ap_ch_rpt; -+ u8 ch_amount = 0; -+ -+ k = 0; -+ for (i = 0; i < opt->ap_ch_rpt_num; i++) { -+ if (opt->ap_ch_rpt[i] == NULL) -+ break; -+ ap_ch_rpt = opt->ap_ch_rpt[i]; -+ for (j = 0; j < ap_ch_rpt->Len; j++) { -+ pch_set[k].hw_value = -+ ap_ch_rpt->Channel[j]; -+ RTW_INFO("RM: meas_ch[%d].hw_value = %u\n", -+ j, pch_set[k].hw_value); -+ k++; -+ } -+ } -+ return k; -+} -+ -+u8 rm_get_oper_class_via_ch(u8 ch) -+{ -+ int i,j,sz; -+ -+ -+ sz = sizeof(RTW_OP_CLASS_US)/sizeof(struct _RT_OPERATING_CLASS); -+ -+ for (i = 0; i < sz; i++) { -+ for (j = 0; j < RTW_OP_CLASS_US[i].Len; j++) { -+ if ( ch == RTW_OP_CLASS_US[i].Channel[j]) { -+ RTW_INFO("RM: ch %u in oper_calss %u\n", -+ ch, RTW_OP_CLASS_US[i].global_op_class); -+ return RTW_OP_CLASS_US[i].global_op_class; -+ break; -+ } -+ } -+ } -+ return 0; -+} -+ -+int is_wildcard_bssid(u8 *bssid) -+{ -+ int i; -+ u8 val8 = 0xff; -+ -+ -+ for (i=0;i<6;i++) -+ val8 &= bssid[i]; -+ -+ if (val8 == 0xff) -+ return _SUCCESS; -+ return _FALSE; -+} -+ -+u8 translate_dbm_to_rcpi(s8 SignalPower) -+{ -+ /* RCPI = Int{(Power in dBm + 110)*2} for 0dBm > Power > -110dBm -+ * 0 : power <= -110.0 dBm -+ * 1 : power = -109.5 dBm -+ * 2 : power = -109.0 dBm -+ */ -+ return (SignalPower + 110)*2; -+} -+ -+u8 translate_percentage_to_rcpi(u32 SignalStrengthIndex) -+{ -+ /* Translate to dBm (x=y-100) */ -+ return translate_dbm_to_rcpi(SignalStrengthIndex - 100); -+} -+ -+u8 rm_get_bcn_rcpi(struct rm_obj *prm, struct wlan_network *pnetwork) -+{ -+ return translate_percentage_to_rcpi( -+ pnetwork->network.PhyInfo.SignalStrength); -+} -+ -+u8 rm_get_frame_rsni(struct rm_obj *prm, union recv_frame *pframe) -+{ -+ int i; -+ u8 val8, snr, rx_num; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(prm->psta->padapter); -+ -+ if (IS_CCK_RATE((hw_rate_to_m_rate(pframe->u.hdr.attrib.data_rate)))) -+ val8 = 255; -+ else { -+ snr = rx_num = 0; -+ for (i = 0; i < hal_spec->rf_reg_path_num; i++) { -+ if (GET_HAL_RX_PATH_BMP(prm->psta->padapter) & BIT(i)) { -+ snr += pframe->u.hdr.attrib.phy_info.rx_snr[i]; -+ rx_num++; -+ } -+ } -+ snr = snr / rx_num; -+ val8 = (u8)(snr + 10)*2; -+ } -+ return val8; -+} -+ -+u8 rm_get_bcn_rsni(struct rm_obj *prm, struct wlan_network *pnetwork) -+{ -+ int i; -+ u8 val8, snr, rx_num; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(prm->psta->padapter); -+ -+ if (pnetwork->network.PhyInfo.is_cck_rate) { -+ /* current HW doesn't have CCK RSNI */ -+ /* 255 indicates RSNI is unavailable */ -+ val8 = 255; -+ } else { -+ snr = rx_num = 0; -+ for (i = 0; i < hal_spec->rf_reg_path_num; i++) { -+ if (GET_HAL_RX_PATH_BMP(prm->psta->padapter) & BIT(i)) { -+ snr += pnetwork->network.PhyInfo.rx_snr[i]; -+ rx_num++; -+ } -+ } -+ snr = snr / rx_num; -+ val8 = (u8)(snr + 10)*2; -+ } -+ return val8; -+} -+ -+/* output: pwr (unit dBm) */ -+int rm_get_tx_power(PADAPTER adapter, enum rf_path path, enum MGN_RATE rate, s8 *pwr) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ int tx_num, band, bw, ch, n, rs; -+ u8 base; -+ s8 limt_offset = 127; /* max value of s8 */ -+ s8 rate_offset; -+ s8 powr_offset; -+ int rate_pos; -+ -+ -+ band = hal_data->current_band_type; -+ bw = hal_data->current_channel_bw; -+ ch = hal_data->current_channel; -+ -+ if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path)) -+ return -1; -+ -+ if (HAL_IsLegalChannel(adapter, ch) == _FALSE) { -+ RTW_INFO("Illegal channel!!\n"); -+ return -2; -+ } -+ -+ *pwr = phy_get_tx_power_final_absolute_value(adapter, path, rate, bw, ch); -+ -+ return 0; -+} -+ -+int rm_get_rx_sensitivity(PADAPTER adapter, enum channel_width bw, enum MGN_RATE rate, s8 *pwr) -+{ -+ s8 rx_sensitivity = -110; -+ -+ switch(rate) { -+ case MGN_1M: -+ rx_sensitivity= -101; -+ break; -+ case MGN_2M: -+ rx_sensitivity= -98; -+ break; -+ case MGN_5_5M: -+ rx_sensitivity= -92; -+ break; -+ case MGN_11M: -+ rx_sensitivity= -89; -+ break; -+ case MGN_6M: -+ case MGN_9M: -+ case MGN_12M: -+ rx_sensitivity = -92; -+ break; -+ case MGN_18M: -+ rx_sensitivity = -90; -+ break; -+ case MGN_24M: -+ rx_sensitivity = -88; -+ break; -+ case MGN_36M: -+ rx_sensitivity = -84; -+ break; -+ case MGN_48M: -+ rx_sensitivity = -79; -+ break; -+ case MGN_54M: -+ rx_sensitivity = -78; -+ break; -+ -+ case MGN_MCS0: -+ case MGN_MCS8: -+ case MGN_MCS16: -+ case MGN_MCS24: -+ case MGN_VHT1SS_MCS0: -+ case MGN_VHT2SS_MCS0: -+ case MGN_VHT3SS_MCS0: -+ case MGN_VHT4SS_MCS0: -+ /* BW20 BPSK 1/2 */ -+ rx_sensitivity = -82; -+ break; -+ -+ case MGN_MCS1: -+ case MGN_MCS9: -+ case MGN_MCS17: -+ case MGN_MCS25: -+ case MGN_VHT1SS_MCS1: -+ case MGN_VHT2SS_MCS1: -+ case MGN_VHT3SS_MCS1: -+ case MGN_VHT4SS_MCS1: -+ /* BW20 QPSK 1/2 */ -+ rx_sensitivity = -79; -+ break; -+ -+ case MGN_MCS2: -+ case MGN_MCS10: -+ case MGN_MCS18: -+ case MGN_MCS26: -+ case MGN_VHT1SS_MCS2: -+ case MGN_VHT2SS_MCS2: -+ case MGN_VHT3SS_MCS2: -+ case MGN_VHT4SS_MCS2: -+ /* BW20 QPSK 3/4 */ -+ rx_sensitivity = -77; -+ break; -+ -+ case MGN_MCS3: -+ case MGN_MCS11: -+ case MGN_MCS19: -+ case MGN_MCS27: -+ case MGN_VHT1SS_MCS3: -+ case MGN_VHT2SS_MCS3: -+ case MGN_VHT3SS_MCS3: -+ case MGN_VHT4SS_MCS3: -+ /* BW20 16-QAM 1/2 */ -+ rx_sensitivity = -74; -+ break; -+ -+ case MGN_MCS4: -+ case MGN_MCS12: -+ case MGN_MCS20: -+ case MGN_MCS28: -+ case MGN_VHT1SS_MCS4: -+ case MGN_VHT2SS_MCS4: -+ case MGN_VHT3SS_MCS4: -+ case MGN_VHT4SS_MCS4: -+ /* BW20 16-QAM 3/4 */ -+ rx_sensitivity = -70; -+ break; -+ -+ case MGN_MCS5: -+ case MGN_MCS13: -+ case MGN_MCS21: -+ case MGN_MCS29: -+ case MGN_VHT1SS_MCS5: -+ case MGN_VHT2SS_MCS5: -+ case MGN_VHT3SS_MCS5: -+ case MGN_VHT4SS_MCS5: -+ /* BW20 64-QAM 2/3 */ -+ rx_sensitivity = -66; -+ break; -+ -+ case MGN_MCS6: -+ case MGN_MCS14: -+ case MGN_MCS22: -+ case MGN_MCS30: -+ case MGN_VHT1SS_MCS6: -+ case MGN_VHT2SS_MCS6: -+ case MGN_VHT3SS_MCS6: -+ case MGN_VHT4SS_MCS6: -+ /* BW20 64-QAM 3/4 */ -+ rx_sensitivity = -65; -+ break; -+ -+ case MGN_MCS7: -+ case MGN_MCS15: -+ case MGN_MCS23: -+ case MGN_MCS31: -+ case MGN_VHT1SS_MCS7: -+ case MGN_VHT2SS_MCS7: -+ case MGN_VHT3SS_MCS7: -+ case MGN_VHT4SS_MCS7: -+ /* BW20 64-QAM 5/6 */ -+ rx_sensitivity = -64; -+ break; -+ -+ case MGN_VHT1SS_MCS8: -+ case MGN_VHT2SS_MCS8: -+ case MGN_VHT3SS_MCS8: -+ case MGN_VHT4SS_MCS8: -+ /* BW20 256-QAM 3/4 */ -+ rx_sensitivity = -59; -+ break; -+ -+ case MGN_VHT1SS_MCS9: -+ case MGN_VHT2SS_MCS9: -+ case MGN_VHT3SS_MCS9: -+ case MGN_VHT4SS_MCS9: -+ /* BW20 256-QAM 5/6 */ -+ rx_sensitivity = -57; -+ break; -+ -+ default: -+ return -1; -+ break; -+ -+ } -+ -+ switch(bw) { -+ case CHANNEL_WIDTH_20: -+ break; -+ case CHANNEL_WIDTH_40: -+ rx_sensitivity -= 3; -+ break; -+ case CHANNEL_WIDTH_80: -+ rx_sensitivity -= 6; -+ break; -+ case CHANNEL_WIDTH_160: -+ rx_sensitivity -= 9; -+ break; -+ case CHANNEL_WIDTH_5: -+ case CHANNEL_WIDTH_10: -+ case CHANNEL_WIDTH_80_80: -+ default: -+ return -1; -+ break; -+ } -+ *pwr = rx_sensitivity; -+ -+ return 0; -+} -+ -+/* output: path_a max tx power in dBm */ -+int rm_get_path_a_max_tx_power(_adapter *adapter, s8 *path_a) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ int path, tx_num, band, bw, ch, n, rs; -+ u8 rate_num; -+ s8 max_pwr[RF_PATH_MAX], pwr; -+ -+ -+ band = hal_data->current_band_type; -+ bw = hal_data->current_channel_bw; -+ ch = hal_data->current_channel; -+ -+ for (path = 0; path < RF_PATH_MAX; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path)) -+ break; -+ -+ max_pwr[path] = -127; /* min value of s8 */ -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: [%s][%c]\n", band_str(band), rf_path_char(path)); -+#endif -+ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { -+ tx_num = rate_section_to_tx_num(rs); -+ -+ if (tx_num >= hal_spec->tx_nss_num) -+ continue; -+ -+ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) -+ continue; -+ -+ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ continue; -+ -+ rate_num = rate_section_rate_num(rs); -+ -+ /* get power by rate in db */ -+ for (n = rate_num - 1; n >= 0; n--) { -+ pwr = phy_get_tx_power_final_absolute_value(adapter, path, rates_by_sections[rs].rates[n], bw, ch); -+ max_pwr[path] = MAX(max_pwr[path], pwr); -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: %9s = %2d\n", -+ MGN_RATE_STR(rates_by_sections[rs].rates[n]), pwr); -+#endif -+ } -+ } -+ } -+#if (RM_MORE_DBG_MSG) -+ RTW_INFO("RM: path_a max_pwr=%ddBm\n", max_pwr[0]); -+#endif -+ *path_a = max_pwr[0]; -+ return 0; -+} -+ -+u8 rm_gen_dialog_token(_adapter *padapter) -+{ -+ struct rm_priv *prmpriv = &(padapter->rmpriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ -+ do { -+ pmlmeinfo->dialogToken++; -+ } while (pmlmeinfo->dialogToken == 0); -+ -+ return pmlmeinfo->dialogToken; -+} -+ -+u8 rm_gen_meas_token(_adapter *padapter) -+{ -+ struct rm_priv *prmpriv = &(padapter->rmpriv); -+ -+ do { -+ prmpriv->meas_token++; -+ } while (prmpriv->meas_token == 0); -+ -+ return prmpriv->meas_token; -+} -+ -+u32 rm_gen_rmid(_adapter *padapter, struct rm_obj *prm, u8 role) -+{ -+ u32 rmid; -+ -+ if (prm->psta == NULL) -+ goto err; -+ -+ if (prm->q.diag_token == 0) -+ goto err; -+ -+ rmid = prm->psta->cmn.aid << 16 -+ | prm->q.diag_token << 8 -+ | role; -+ -+ return rmid; -+err: -+ RTW_ERR("RM: unable to gen rmid\n"); -+ return 0; -+} -+ -+#endif /* CONFIG_RTW_80211K */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_roch.c b/drivers/staging/rtl8723cs/core/rtw_roch.c -new file mode 100644 -index 000000000000..4be863192a65 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_roch.c -@@ -0,0 +1,591 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2020 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+u8 rtw_roch_stay_in_cur_chan(_adapter *padapter) -+{ -+ int i; -+ _adapter *iface; -+ struct mlme_priv *pmlmepriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ u8 rst = _FALSE; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface) { -+ pmlmepriv = &iface->mlmepriv; -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING | WIFI_UNDER_WPS | WIFI_UNDER_KEY_HANDSHAKE) == _TRUE) { -+ RTW_INFO(ADPT_FMT"- WIFI_UNDER_LINKING |WIFI_UNDER_WPS | WIFI_UNDER_KEY_HANDSHAKE (mlme state:0x%x)\n", -+ ADPT_ARG(iface), get_fwstate(&iface->mlmepriv)); -+ rst = _TRUE; -+ break; -+ } -+ #ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(iface) || MLME_IS_MESH(iface)) { -+ if (rtw_ap_sta_states_check(iface) == _TRUE) { -+ rst = _TRUE; -+ break; -+ } -+ } -+ #endif -+ } -+ } -+ -+ return rst; -+} -+ -+static int rtw_ro_ch_handler(_adapter *adapter, u8 *buf) -+{ -+ int ret = H2C_SUCCESS; -+ struct rtw_roch_parm *roch_parm = (struct rtw_roch_parm *)buf; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); -+ struct roch_info *prochinfo = &adapter->rochinfo; -+#ifdef CONFIG_CONCURRENT_MODE -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+#endif -+ u8 ready_on_channel = _FALSE; -+ u8 remain_ch; -+ unsigned int duration; -+ -+ _enter_critical_mutex(&pwdev_priv->roch_mutex, NULL); -+ -+ if (rtw_cfg80211_get_is_roch(adapter) != _TRUE) -+ goto exit; -+ -+ remain_ch = (u8)ieee80211_frequency_to_channel(roch_parm->ch.center_freq); -+ duration = roch_parm->duration; -+ -+ RTW_INFO(FUNC_ADPT_FMT" ch:%u duration:%d, cookie:0x%llx\n" -+ , FUNC_ADPT_ARG(adapter), remain_ch, roch_parm->duration, roch_parm->cookie); -+ -+ if (roch_parm->wdev && roch_parm->cookie) { -+ if (prochinfo->ro_ch_wdev != roch_parm->wdev) { -+ RTW_WARN(FUNC_ADPT_FMT" ongoing wdev:%p, wdev:%p\n" -+ , FUNC_ADPT_ARG(adapter), prochinfo->ro_ch_wdev, roch_parm->wdev); -+ rtw_warn_on(1); -+ } -+ -+ if (prochinfo->remain_on_ch_cookie != roch_parm->cookie) { -+ RTW_WARN(FUNC_ADPT_FMT" ongoing cookie:0x%llx, cookie:0x%llx\n" -+ , FUNC_ADPT_ARG(adapter), prochinfo->remain_on_ch_cookie, roch_parm->cookie); -+ rtw_warn_on(1); -+ } -+ } -+ -+ if (rtw_roch_stay_in_cur_chan(adapter) == _TRUE) { -+ remain_ch = rtw_mi_get_union_chan(adapter); -+ RTW_INFO(FUNC_ADPT_FMT" stay in union ch:%d\n", FUNC_ADPT_ARG(adapter), remain_ch); -+ } -+ -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(adapter, MI_LINKED) && (0 != rtw_mi_get_union_chan(adapter))) { -+ if ((remain_ch != rtw_mi_get_union_chan(adapter)) && !check_fwstate(&adapter->mlmepriv, WIFI_ASOC_STATE)) { -+ if (remain_ch != pmlmeext->cur_channel -+ #ifdef RTW_ROCH_BACK_OP -+ || ATOMIC_READ(&pwdev_priv->switch_ch_to) == 1 -+ #endif -+ ) { -+ rtw_leave_opch(adapter); -+ -+ #ifdef RTW_ROCH_BACK_OP -+ RTW_INFO("%s, set switch ch timer, duration=%d\n", __func__, prochinfo->max_away_dur); -+ ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); -+ /* remain_ch is not same as union channel. duration is max_away_dur to -+ * back to AP's channel. -+ */ -+ _set_timer(&prochinfo->ap_roch_ch_switch_timer, prochinfo->max_away_dur); -+ #endif -+ } -+ } -+ ready_on_channel = _TRUE; -+ } else -+ #endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ if (remain_ch != rtw_get_oper_ch(adapter)) -+ ready_on_channel = _TRUE; -+ } -+ -+ if (ready_on_channel == _TRUE) { -+ #ifndef RTW_SINGLE_WIPHY -+ if (!check_fwstate(&adapter->mlmepriv, WIFI_ASOC_STATE)) -+ #endif -+ { -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_get_oper_ch(adapter) != remain_ch) -+ #endif -+ { -+ /* if (!padapter->mlmepriv.LinkDetectInfo.bBusyTraffic) */ -+ set_channel_bwmode(adapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ } -+ } -+ } -+ -+ #ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_ScanNotify(adapter, _TRUE); -+ #endif -+ -+ RTW_INFO("%s, set ro ch timer, duration=%d\n", __func__, duration); -+ _set_timer(&prochinfo->remain_on_ch_timer, duration); -+ -+exit: -+ _exit_critical_mutex(&pwdev_priv->roch_mutex, NULL); -+ -+ return ret; -+} -+ -+static int rtw_cancel_ro_ch_handler(_adapter *padapter, u8 *buf) -+{ -+ int ret = H2C_SUCCESS; -+ struct rtw_roch_parm *roch_parm = (struct rtw_roch_parm *)buf; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ struct roch_info *prochinfo = &padapter->rochinfo; -+ struct wireless_dev *wdev; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif -+ u8 ch, bw, offset; -+ -+ _enter_critical_mutex(&pwdev_priv->roch_mutex, NULL); -+ -+ if (rtw_cfg80211_get_is_roch(padapter) != _TRUE) -+ goto exit; -+ -+ if (roch_parm->wdev && roch_parm->cookie) { -+ if (prochinfo->ro_ch_wdev != roch_parm->wdev) { -+ RTW_WARN(FUNC_ADPT_FMT" ongoing wdev:%p, wdev:%p\n" -+ , FUNC_ADPT_ARG(padapter), prochinfo->ro_ch_wdev, roch_parm->wdev); -+ rtw_warn_on(1); -+ } -+ -+ if (prochinfo->remain_on_ch_cookie != roch_parm->cookie) { -+ RTW_WARN(FUNC_ADPT_FMT" ongoing cookie:0x%llx, cookie:0x%llx\n" -+ , FUNC_ADPT_ARG(padapter), prochinfo->remain_on_ch_cookie, roch_parm->cookie); -+ rtw_warn_on(1); -+ } -+ } -+ -+#if defined(RTW_ROCH_BACK_OP) && defined(CONFIG_CONCURRENT_MODE) -+ _cancel_timer_ex(&prochinfo->ap_roch_ch_switch_timer); -+ ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); -+#endif -+ -+ if (rtw_mi_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) { -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", -+ FUNC_ADPT_ARG(padapter), ch, bw, offset); -+#ifdef CONFIG_P2P -+ } else if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->listen_channel) { -+ ch = pwdinfo->listen_channel; -+ bw = CHANNEL_WIDTH_20; -+ offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" back to listen ch - ch:%u, bw:%u, offset:%u\n", -+ FUNC_ADPT_ARG(padapter), ch, bw, offset); -+#endif -+ } else { -+ ch = prochinfo->restore_channel; -+ bw = CHANNEL_WIDTH_20; -+ offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" back to restore ch - ch:%u, bw:%u, offset:%u\n", -+ FUNC_ADPT_ARG(padapter), ch, bw, offset); -+ } -+ -+ set_channel_bwmode(padapter, ch, offset, bw); -+ rtw_back_opch(padapter); -+#ifdef CONFIG_P2P -+ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -+#endif -+#endif -+ -+ wdev = prochinfo->ro_ch_wdev; -+ -+ rtw_cfg80211_set_is_roch(padapter, _FALSE); -+ prochinfo->ro_ch_wdev = NULL; -+ rtw_cfg80211_set_last_ro_ch_time(padapter); -+ -+ rtw_cfg80211_remain_on_channel_expired(wdev -+ , prochinfo->remain_on_ch_cookie -+ , &prochinfo->remain_on_ch_channel -+ , prochinfo->remain_on_ch_type, GFP_KERNEL); -+ -+ RTW_INFO("cfg80211_remain_on_channel_expired cookie:0x%llx\n" -+ , prochinfo->remain_on_ch_cookie); -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_ScanNotify(padapter, _FALSE); -+#endif -+ -+exit: -+ _exit_critical_mutex(&pwdev_priv->roch_mutex, NULL); -+ -+ return ret; -+} -+ -+static void rtw_ro_ch_timer_process(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *)FunctionContext; -+ -+ rtw_cancel_roch_cmd(adapter, 0, NULL, 0); -+} -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+#if (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211) -+s32 rtw_roch_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf) -+{ -+ int ret = H2C_SUCCESS; -+ -+ switch (intCmdType) { -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ case ROCH_RO_CH_WK: -+ ret = rtw_ro_ch_handler(padapter, buf); -+ break; -+ case ROCH_CANCEL_RO_CH_WK: -+ ret = rtw_cancel_ro_ch_handler(padapter, buf); -+ break; -+#endif -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ case ROCH_AP_ROCH_CH_SWITCH_PROCESS_WK: -+ rtw_concurrent_handler(padapter); -+ break; -+#endif -+ -+ default: -+ rtw_warn_on(1); -+ break; -+ } -+ -+ return ret; -+} -+ -+static int get_roch_parm_size(struct rtw_roch_parm *roch_parm) -+{ -+#ifdef CONFIG_IOCTL_CFG80211 -+ return (roch_parm ? sizeof(*roch_parm) : 0); -+#else -+ rtw_warn_on(roch_parm); -+ return 0; -+#endif -+} -+ -+u8 rtw_roch_wk_cmd(_adapter *padapter, int intCmdType, struct rtw_roch_parm *roch_parm, u8 flags) -+{ -+ struct cmd_obj *ph2c = NULL; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm = NULL; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct submit_ctx sctx; -+ u8 res = _SUCCESS; -+ -+ if (flags & RTW_CMDF_DIRECTLY) { -+ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ -+ if (H2C_SUCCESS != rtw_roch_wk_hdl(padapter, intCmdType, (u8 *)roch_parm)) -+ res = _FAIL; -+ goto free_parm; -+ } else { -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (!ph2c) { -+ res = _FAIL; -+ goto free_parm; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (!pdrvextra_cmd_parm) { -+ res = _FAIL; -+ goto free_parm; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = ROCH_WK_CID; -+ pdrvextra_cmd_parm->type = intCmdType; -+ pdrvextra_cmd_parm->size = get_roch_parm_size(roch_parm); -+ pdrvextra_cmd_parm->pbuf = (u8 *)roch_parm; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ if (flags & RTW_CMDF_WAIT_ACK) { -+ ph2c->sctx = &sctx; -+ rtw_sctx_init(&sctx, 10 * 1000); -+ } -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+ if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) { -+ rtw_sctx_wait(&sctx, __func__); -+ _enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status == RTW_SCTX_SUBMITTED) -+ ph2c->sctx = NULL; -+ _exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL); -+ if (sctx.status != RTW_SCTX_DONE_SUCCESS) -+ res = _FAIL; -+ } -+ } -+ -+ return res; -+ -+free_parm: -+ if (roch_parm) -+ rtw_mfree((u8 *)roch_parm, get_roch_parm_size(roch_parm)); -+ if (ph2c) -+ rtw_mfree((u8 *)ph2c, sizeof(*ph2c)); -+ -+ return res; -+} -+ -+#ifdef CONFIG_CONCURRENT_MODE -+void rtw_ap_roch_ch_switch_timer_process(void *ctx) -+{ -+ _adapter *adapter = (_adapter *)ctx; -+#ifdef CONFIG_IOCTL_CFG80211 -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); -+#endif -+ -+ rtw_roch_wk_cmd(adapter, ROCH_AP_ROCH_CH_SWITCH_PROCESS_WK, NULL, 0); -+} -+ -+static bool chk_need_stay_in_cur_chan(_adapter *padapter) -+{ -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ -+ /* When CONFIG_FULL_CH_IN_P2P_HANDSHAKE is defined and the -+ * interface is in the P2P_STATE_GONEGO_OK state, do not let the -+ * interface switch to the listen channel, because the interface will -+ * switch to the OP channel after the GO negotiation is successful. -+ */ -+ if (padapter->registrypriv.full_ch_in_p2p_handshake == 1 && rtw_p2p_chk_state(pwdinfo , P2P_STATE_GONEGO_OK)) { -+ RTW_INFO("%s, No linked interface now, but go nego ok, do not back to listen channel\n", __func__); -+ return _TRUE; -+ } -+#endif -+ -+ return _FALSE; -+} -+ -+static bool chk_driver_interface(_adapter *padapter, u8 driver_interface) -+{ -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ -+ if (pwdinfo->driver_interface == driver_interface) -+ return _TRUE; -+#elif defined(CONFIG_IOCTL_CFG80211) -+ if (driver_interface == DRIVER_CFG80211) -+ return _TRUE; -+#endif -+ -+ return _FALSE; -+} -+ -+static u8 get_remain_ch(_adapter *padapter) -+{ -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif -+ u8 remain_ch; -+ -+#ifdef CONFIG_P2P -+ remain_ch = pwdinfo->listen_channel; -+#elif defined(CONFIG_IOCTL_CFG80211) -+ if (chk_driver_interface(padapter, DRIVER_CFG80211)) -+ remain_ch = ieee80211_frequency_to_channel(prochinfo->remain_on_ch_channel.center_freq); -+ else -+ rtw_warn_on(1); -+#endif -+ -+ return remain_ch; -+} -+ -+void rtw_concurrent_handler(_adapter *padapter) -+{ -+#ifdef CONFIG_IOCTL_CFG80211 -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+#endif -+ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ u8 val8; -+#endif -+ u8 remain_ch = get_remain_ch(padapter); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (chk_driver_interface(padapter, DRIVER_CFG80211) -+ && !rtw_cfg80211_get_is_roch(padapter)) -+ return; -+#endif -+ -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ u8 union_bw = rtw_mi_get_union_bw(padapter); -+ u8 union_offset = rtw_mi_get_union_offset(padapter); -+ unsigned int duration; -+ -+ #ifdef CONFIG_P2P -+ pwdinfo->operating_channel = union_ch; -+ #endif -+ -+ if (chk_driver_interface(padapter, DRIVER_CFG80211)) { -+ #ifdef CONFIG_IOCTL_CFG80211 -+ _enter_critical_mutex(&pwdev_priv->roch_mutex, NULL); -+ -+ if (rtw_get_oper_ch(padapter) != union_ch) { -+ /* Current channel is not AP's channel - switching to AP's channel */ -+ RTW_INFO("%s, switch ch back to union=%u,%u, %u\n" -+ , __func__, union_ch, union_bw, union_offset); -+ set_channel_bwmode(padapter, union_ch, union_offset, union_bw); -+ rtw_back_opch(padapter); -+ -+ /* Now, the driver stays on AP's channel. We should stay on AP's -+ * channel for min_home_dur (duration) and next switch channel is -+ * listen channel. -+ */ -+ duration = prochinfo->min_home_dur; -+ } else { -+ /* Current channel is AP's channel - switching to listen channel */ -+ RTW_INFO("%s, switch ch to roch=%u\n" -+ , __func__, remain_ch); -+ rtw_leave_opch(padapter); -+ set_channel_bwmode(padapter, -+ remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ -+ /* Now, the driver stays on listen channel. We should stay on listen -+ * channel for max_away_dur (duration) and next switch channel is AP's -+ * channel. -+ */ -+ duration = prochinfo->max_away_dur; -+ } -+ -+ /* set channel switch timer */ -+ ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); -+ _set_timer(&prochinfo->ap_roch_ch_switch_timer, duration); -+ RTW_INFO("%s, set switch ch timer, duration=%d\n", __func__, duration); -+ -+ _exit_critical_mutex(&pwdev_priv->roch_mutex, NULL); -+ #endif -+ } -+ #ifdef CONFIG_P2P -+ else if (chk_driver_interface(padapter, DRIVER_WEXT)) { -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { -+ /* Now, the driver stays on the AP's channel. */ -+ /* If the pwdinfo->ext_listen_period = 0, that means the P2P listen state is not available on listen channel. */ -+ if (pwdinfo->ext_listen_period > 0) { -+ RTW_INFO("[%s] P2P_STATE_IDLE, ext_listen_period = %d\n", __FUNCTION__, pwdinfo->ext_listen_period); -+ -+ if (union_ch != pwdinfo->listen_channel) { -+ rtw_leave_opch(padapter); -+ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ } -+ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); -+ -+ if (!rtw_mi_check_mlmeinfo_state(padapter, WIFI_FW_AP_STATE)) { -+ val8 = 1; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ } -+ /* Todo: To check the value of pwdinfo->ext_listen_period is equal to 0 or not. */ -+ _set_timer(&prochinfo->ap_roch_ch_switch_timer, pwdinfo->ext_listen_period); -+ } -+ -+ } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN) || -+ rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL) || -+ (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) && pwdinfo->nego_req_info.benable == _FALSE) || -+ rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ)) { -+ /* Now, the driver is in the listen state of P2P mode. */ -+ RTW_INFO("[%s] P2P_STATE_IDLE, ext_listen_interval = %d\n", __FUNCTION__, pwdinfo->ext_listen_interval); -+ -+ /* Commented by Albert 2012/11/01 */ -+ /* If the AP's channel is the same as the listen channel, we should still be in the listen state */ -+ /* Other P2P device is still able to find this device out even this device is in the AP's channel. */ -+ /* So, configure this device to be able to receive the probe request frame and set it to listen state. */ -+ if (union_ch != pwdinfo->listen_channel) { -+ -+ set_channel_bwmode(padapter, union_ch, union_offset, union_bw); -+ if (!rtw_mi_check_status(padapter, MI_AP_MODE)) { -+ val8 = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ } -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_IDLE); -+ rtw_back_opch(padapter); -+ } -+ -+ /* Todo: To check the value of pwdinfo->ext_listen_interval is equal to 0 or not. */ -+ _set_timer(&prochinfo->ap_roch_ch_switch_timer, pwdinfo->ext_listen_interval); -+ -+ } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK)) { -+ /* The driver had finished the P2P handshake successfully. */ -+ val8 = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ set_channel_bwmode(padapter, union_ch, union_offset, union_bw); -+ rtw_back_opch(padapter); -+ -+ } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) { -+ val8 = 1; -+ set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ issue_probereq_p2p(padapter, NULL); -+ _set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT); -+ } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) && pwdinfo->nego_req_info.benable == _TRUE) { -+ val8 = 1; -+ set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ issue_probereq_p2p(padapter, NULL); -+ _set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT); -+ } else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ) && pwdinfo->invitereq_info.benable == _TRUE) { -+ /* -+ val8 = 1; -+ set_channel_bwmode(padapter, , HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ issue_probereq_p2p(padapter, NULL); -+ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); -+ */ -+ } -+ } -+ #endif /* CONFIG_P2P */ -+ } else if (!chk_need_stay_in_cur_chan(padapter)) { -+ set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ } -+} -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+void rtw_init_roch_info(_adapter *padapter) -+{ -+ struct roch_info *prochinfo = &padapter->rochinfo; -+ -+ _rtw_memset(prochinfo, 0x00, sizeof(struct roch_info)); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ rtw_init_timer(&prochinfo->ap_roch_ch_switch_timer, padapter, rtw_ap_roch_ch_switch_timer_process, padapter); -+#ifdef CONFIG_IOCTL_CFG80211 -+ prochinfo->min_home_dur = 1500; /* min duration for traffic, home_time */ -+ prochinfo->max_away_dur = 250; /* max acceptable away duration, home_away_time */ -+#endif -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_init_timer(&prochinfo->remain_on_ch_timer, padapter, rtw_ro_ch_timer_process, padapter); -+#endif -+} -+#endif /* (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211) */ -\ No newline at end of file -diff --git a/drivers/staging/rtl8723cs/core/rtw_rson.c b/drivers/staging/rtl8723cs/core/rtw_rson.c -new file mode 100644 -index 000000000000..dba8fb73bdbc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_rson.c -@@ -0,0 +1,592 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#define _RTW_RSON_C_ -+ -+#include -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ -+/******** Custommize Part ***********************/ -+ -+unsigned char RTW_RSON_OUI[] = {0xFA, 0xFA, 0xFA}; -+#define RSON_SCORE_DIFF_TH 8 -+ -+/* -+ Calculate the corresponding score. -+*/ -+inline u8 rtw_cal_rson_score(struct rtw_rson_struct *cand_rson_data, NDIS_802_11_RSSI Rssi) -+{ -+ if ((cand_rson_data->hopcnt == RTW_RSON_HC_NOTREADY) -+ || (cand_rson_data->connectible == RTW_RSON_DENYCONNECT)) -+ return RTW_RSON_SCORE_NOTCNNT; -+ -+ return RTW_RSON_SCORE_MAX - (cand_rson_data->hopcnt * 10) + (Rssi/10); -+} -+ -+/*************************************************/ -+ -+ -+static u8 rtw_rson_block_bssid_idx = 0; -+u8 rtw_rson_block_bssid[10][6] = { -+ /*{0x02, 0xE0, 0x4C, 0x07, 0xC3, 0xF6}*/ -+}; -+ -+/* fake root, regard a real AP as a SO root */ -+static u8 rtw_rson_root_bssid_idx = 0; -+u8 rtw_rson_root_bssid[10][6] = { -+ /*{0x1c, 0x5f, 0x2b, 0x5a, 0x60, 0x24}*/ -+}; -+ -+int is_match_bssid(u8 *mac, u8 bssid_array[][6], int num) -+{ -+ int i; -+ -+ for (i = 0; i < num; i++) -+ if (_rtw_memcmp(mac, bssid_array[i], 6) == _TRUE) -+ return _TRUE; -+ return _FALSE; -+} -+ -+void init_rtw_rson_data(struct dvobj_priv *dvobj) -+{ -+ /*Aries todo. if pdvobj->rson_data.ver == 1 */ -+ dvobj->rson_data.ver = RTW_RSON_VER; -+ dvobj->rson_data.id = CONFIG_RTW_REPEATER_SON_ID; -+#ifdef CONFIG_RTW_REPEATER_SON_ROOT -+ dvobj->rson_data.hopcnt = RTW_RSON_HC_ROOT; -+ dvobj->rson_data.connectible = RTW_RSON_ALLOWCONNECT; -+#else -+ dvobj->rson_data.hopcnt = RTW_RSON_HC_NOTREADY; -+ dvobj->rson_data.connectible = RTW_RSON_DENYCONNECT; -+#endif -+ dvobj->rson_data.loading = 0; -+ _rtw_memset(dvobj->rson_data.res, 0xAA, sizeof(dvobj->rson_data.res)); -+} -+ -+void rtw_rson_get_property_str(_adapter *padapter, char *rson_data_str) -+{ -+ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); -+ -+ sprintf(rson_data_str, "version : \t%d\nid : \t\t%08x\nhop count : \t%d\nconnectible : \t%s\nloading : \t%d\nreserve : \t%16ph\n", -+ pdvobj->rson_data.ver, -+ pdvobj->rson_data.id, -+ pdvobj->rson_data.hopcnt, -+ pdvobj->rson_data.connectible ? "connectable":"unconnectable", -+ pdvobj->rson_data.loading, -+ pdvobj->rson_data.res); -+} -+ -+int str2hexbuf(char *str, u8 *hexbuf, int len) -+{ -+ u8 *p; -+ int i, slen, idx = 0; -+ -+ p = (unsigned char *)str; -+ if ((*p != '0') || (*(p+1) != 'x')) -+ return _FALSE; -+ slen = strlen(str); -+ if (slen > (len*2) + 2) -+ return _FALSE; -+ p += 2; -+ for (i = 0 ; i < len; i++, idx = idx+2) { -+ hexbuf[i] = key_2char2num(p[idx], p[idx + 1]); -+ if (slen <= idx+2) -+ break; -+ } -+ return _TRUE; -+} -+ -+int rtw_rson_set_property(_adapter *padapter, char *field, char *value) -+{ -+ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); -+ int num = 0; -+ -+ if (_rtw_memcmp(field, (u8 *)"ver", 3) == _TRUE) -+ pdvobj->rson_data.ver = rtw_atoi(value); -+ else if (_rtw_memcmp(field, (u8 *)"id", 2) == _TRUE) -+ num = sscanf(value, "%08x", &(pdvobj->rson_data.id)); -+ else if (_rtw_memcmp(field, (u8 *)"hc", 2) == _TRUE) -+ num = sscanf(value, "%hhu", &(pdvobj->rson_data.hopcnt)); -+ else if (_rtw_memcmp(field, (u8 *)"cnt", 3) == _TRUE) -+ num = sscanf(value, "%hhu", &(pdvobj->rson_data.connectible)); -+ else if (_rtw_memcmp(field, (u8 *)"loading", 2) == _TRUE) -+ num = sscanf(value, "%hhu", &(pdvobj->rson_data.loading)); -+ else if (_rtw_memcmp(field, (u8 *)"res", 2) == _TRUE) { -+ str2hexbuf(value, pdvobj->rson_data.res, 16); -+ return 1; -+ } else -+ return _FALSE; -+ return num; -+} -+ -+/* -+ return : TRUE -- competitor is taking advantage than condidate -+ FALSE -- we should continue keeping candidate -+*/ -+int rtw_rson_choose(struct wlan_network **candidate, struct wlan_network *competitor) -+{ -+ s16 comp_score = 0, cand_score = 0; -+ struct rtw_rson_struct rson_cand, rson_comp; -+ -+ if (is_match_bssid(competitor->network.MacAddress, rtw_rson_block_bssid, rtw_rson_block_bssid_idx) == _TRUE) -+ return _FALSE; -+ -+ if ((competitor == NULL) -+ || (rtw_get_rson_struct(&(competitor->network), &rson_comp) != _TRUE) -+ || (rson_comp.id != CONFIG_RTW_REPEATER_SON_ID)) -+ return _FALSE; -+ -+ comp_score = rtw_cal_rson_score(&rson_comp, competitor->network.Rssi); -+ if (comp_score == RTW_RSON_SCORE_NOTCNNT) -+ return _FALSE; -+ -+ if (*candidate == NULL) -+ return _TRUE; -+ if (rtw_get_rson_struct(&((*candidate)->network), &rson_cand) != _TRUE) -+ return _FALSE; -+ -+ cand_score = rtw_cal_rson_score(&rson_cand, (*candidate)->network.Rssi); -+ RTW_INFO("%s: competitor_score=%d, candidate_score=%d\n", __func__, comp_score, cand_score); -+ if (comp_score - cand_score > RSON_SCORE_DIFF_TH) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+inline u8 rtw_rson_varify_ie(u8 *p) -+{ -+ u8 *ptr = NULL; -+ u8 ver; -+ u32 id; -+ u8 hopcnt; -+ u8 allcnnt; -+ -+ ptr = p + 2 + sizeof(RTW_RSON_OUI); -+ ver = *ptr; -+ -+ /* for (ver == 1) */ -+ if (ver != 1) -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+/* -+ Parsing RTK self-organization vendor IE -+*/ -+int rtw_get_rson_struct(WLAN_BSSID_EX *bssid, struct rtw_rson_struct *rson_data) -+{ -+ sint limit = 0; -+ u32 len; -+ u8 *p; -+ -+ if ((rson_data == NULL) || (bssid == NULL)) -+ return -EINVAL; -+ -+ /* Default */ -+ rson_data->id = 0; -+ rson_data->ver = 0; -+ rson_data->hopcnt = 0; -+ rson_data->connectible = 0; -+ rson_data->loading = 0; -+ /* fake root */ -+ if (is_match_bssid(bssid->MacAddress, rtw_rson_root_bssid, rtw_rson_root_bssid_idx) == _TRUE) { -+ rson_data->id = CONFIG_RTW_REPEATER_SON_ID; -+ rson_data->ver = RTW_RSON_VER; -+ rson_data->hopcnt = RTW_RSON_HC_ROOT; -+ rson_data->connectible = RTW_RSON_ALLOWCONNECT; -+ rson_data->loading = 0; -+ return _TRUE; -+ } -+ limit = bssid->IELength - _BEACON_IE_OFFSET_; -+ -+ for (p = bssid->IEs + _BEACON_IE_OFFSET_; ; p += (len + 2)) { -+ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &len, limit); -+ limit -= len; -+ if ((p == NULL) || (len == 0)) -+ break; -+ if (p && (_rtw_memcmp(p + 2, RTW_RSON_OUI, sizeof(RTW_RSON_OUI)) == _TRUE) -+ && rtw_rson_varify_ie(p)) { -+ p = p + 2 + sizeof(RTW_RSON_OUI); -+ rson_data->ver = *p; -+ /* for (ver == 1) */ -+ p = p + 1; -+ rson_data->id = le32_to_cpup((__le32 *)p); -+ p = p + 4; -+ rson_data->hopcnt = *p; -+ p = p + 1; -+ rson_data->connectible = *p; -+ p = p + 1; -+ rson_data->loading = *p; -+ -+ return _TRUE; -+ } -+ } -+ return -EBADMSG; -+} -+ -+u32 rtw_rson_append_ie(_adapter *padapter, unsigned char *pframe, u32 *len) -+{ -+ u8 *ptr, *ori, ie_len = 0; -+ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+/* static int iii = 0;*/ -+ -+ if ((!pdvobj) || (!pframe)) -+ return 0; -+ ptr = ori = pframe; -+ *ptr++ = _VENDOR_SPECIFIC_IE_; -+ *ptr++ = ie_len = sizeof(RTW_RSON_OUI)+sizeof(pdvobj->rson_data); -+ _rtw_memcpy(ptr, RTW_RSON_OUI, sizeof(RTW_RSON_OUI)); -+ ptr = ptr + sizeof(RTW_RSON_OUI); -+ *ptr++ = pdvobj->rson_data.ver; -+ *(s32 *)ptr = cpu_to_le32(pdvobj->rson_data.id); -+ ptr = ptr + sizeof(pdvobj->rson_data.id); -+ *ptr++ = pdvobj->rson_data.hopcnt; -+ *ptr++ = pdvobj->rson_data.connectible; -+ *ptr++ = pdvobj->rson_data.loading; -+ _rtw_memcpy(ptr, pdvobj->rson_data.res, sizeof(pdvobj->rson_data.res)); -+ pframe = ptr; -+/* -+ iii = iii % 20; -+ if (iii++ == 0) -+ RTW_INFO("%s : RTW RSON IE : %20ph\n", __func__, ori); -+*/ -+ *len += (ie_len+2); -+ return ie_len; -+ -+} -+ -+void rtw_rson_do_disconnect(_adapter *padapter) -+{ -+ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+#ifndef CONFIG_RTW_REPEATER_SON_ROOT -+ pdvobj->rson_data.ver = RTW_RSON_VER; -+ pdvobj->rson_data.id = CONFIG_RTW_REPEATER_SON_ID; -+ pdvobj->rson_data.hopcnt = RTW_RSON_HC_NOTREADY; -+ pdvobj->rson_data.connectible = RTW_RSON_DENYCONNECT; -+ pdvobj->rson_data.loading = 0; -+ #ifdef CONFIG_AP_MODE -+ rtw_mi_tx_beacon_hdl(padapter); -+ #endif -+#endif -+} -+ -+void rtw_rson_join_done(_adapter *padapter) -+{ -+ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); -+ WLAN_BSSID_EX *cur_network = NULL; -+ struct rtw_rson_struct rson_data; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ if (!padapter->mlmepriv.cur_network_scanned) -+ return; -+ cur_network = &(padapter->mlmepriv.cur_network_scanned->network); -+ if (rtw_get_rson_struct(cur_network, &rson_data) != _TRUE) { -+ RTW_ERR("%s: try to join a improper network(%s)\n", __func__, cur_network->Ssid.Ssid); -+ return; -+ } -+ -+#ifndef CONFIG_RTW_REPEATER_SON_ROOT -+ /* update rson_data */ -+ pdvobj->rson_data.ver = RTW_RSON_VER; -+ pdvobj->rson_data.id = rson_data.id; -+ pdvobj->rson_data.hopcnt = rson_data.hopcnt + 1; -+ pdvobj->rson_data.connectible = RTW_RSON_ALLOWCONNECT; -+ pdvobj->rson_data.loading = 0; -+ #ifdef CONFIG_AP_MODE -+ rtw_mi_tx_beacon_hdl(padapter); -+ #endif -+#endif -+} -+ -+int rtw_rson_isupdate_roamcan(struct mlme_priv *mlme -+ , struct wlan_network **candidate, struct wlan_network *competitor) -+{ -+ struct rtw_rson_struct rson_cand, rson_comp, rson_curr; -+ s16 comp_score, cand_score, curr_score; -+ -+ if ((competitor == NULL) -+ || (rtw_get_rson_struct(&(competitor->network), &rson_comp) != _TRUE) -+ || (rson_comp.id != CONFIG_RTW_REPEATER_SON_ID)) -+ return _FALSE; -+ -+ if (is_match_bssid(competitor->network.MacAddress, rtw_rson_block_bssid, rtw_rson_block_bssid_idx) == _TRUE) -+ return _FALSE; -+ -+ if ((!mlme->cur_network_scanned) -+ || (mlme->cur_network_scanned == competitor) -+ || (rtw_get_rson_struct(&(mlme->cur_network_scanned->network), &rson_curr)) != _TRUE) -+ return _FALSE; -+ -+ if (rtw_get_passing_time_ms((u32)competitor->last_scanned) >= mlme->roam_scanr_exp_ms) -+ return _FALSE; -+ -+ comp_score = rtw_cal_rson_score(&rson_comp, competitor->network.Rssi); -+ curr_score = rtw_cal_rson_score(&rson_curr, mlme->cur_network_scanned->network.Rssi); -+ if (comp_score - curr_score < RSON_SCORE_DIFF_TH) -+ return _FALSE; -+ -+ if (*candidate == NULL) -+ return _TRUE; -+ -+ if (rtw_get_rson_struct(&((*candidate)->network), &rson_cand) != _TRUE) { -+ RTW_ERR("%s : Unable to get rson_struct from candidate(%s -- " MAC_FMT")\n", -+ __func__, (*candidate)->network.Ssid.Ssid, MAC_ARG((*candidate)->network.MacAddress)); -+ return _FALSE; -+ } -+ cand_score = rtw_cal_rson_score(&rson_cand, (*candidate)->network.Rssi); -+ RTW_DBG("comp_score=%d , cand_score=%d , curr_score=%d\n", comp_score, cand_score, curr_score); -+ if (cand_score < comp_score) -+ return _TRUE; -+ -+#if 0 /* Handle 11R protocol */ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_chk_ft_flags(adapter, RTW_FT_SUPPORTED)) { -+ ptmp = rtw_get_ie(&competitor->network.IEs[12], _MDIE_, &mdie_len, competitor->network.IELength-12); -+ if (ptmp) { -+ if (!_rtw_memcmp(&pftpriv->mdid, ptmp+2, 2)) -+ goto exit; -+ -+ /*The candidate don't support over-the-DS*/ -+ if (rtw_chk_ft_flags(adapter, RTW_FT_STA_OVER_DS_SUPPORTED)) { -+ if ((rtw_chk_ft_flags(adapter, RTW_FT_OVER_DS_SUPPORTED) && !(*(ptmp+4) & 0x01)) || -+ (!rtw_chk_ft_flags(adapter, RTW_FT_OVER_DS_SUPPORTED) && (*(ptmp+4) & 0x01))) { -+ RTW_INFO("FT: ignore the candidate(" MAC_FMT ") for over-the-DS\n", MAC_ARG(competitor->network.MacAddress)); -+ rtw_clr_ft_flags(adapter, RTW_FT_OVER_DS_SUPPORTED); -+ goto exit; -+ } -+ } -+ } else -+ goto exit; -+ } -+#endif -+#endif -+ return _FALSE; -+} -+ -+void rtw_rson_show_survey_info(struct seq_file *m, _list *plist, _list *phead) -+{ -+ struct wlan_network *pnetwork = NULL; -+ struct rtw_rson_struct rson_data; -+ s16 rson_score; -+ u16 index = 0; -+ -+ RTW_PRINT_SEL(m, "%5s %-17s %3s %5s %14s %10s %-3s %5s %32s\n", "index", "bssid", "ch", "id", "hop_cnt", "loading", "RSSI", "score", "ssid"); -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ if (!pnetwork) -+ break; -+ -+ _rtw_memset(&rson_data, 0, sizeof(rson_data)); -+ rson_score = 0; -+ if (rtw_get_rson_struct(&(pnetwork->network), &rson_data) == _TRUE) -+ rson_score = rtw_cal_rson_score(&rson_data, pnetwork->network.Rssi); -+ RTW_PRINT_SEL(m, "%5d "MAC_FMT" %3d 0x%08x %6d %10d %6d %6d %32s\n", -+ ++index, -+ MAC_ARG(pnetwork->network.MacAddress), -+ pnetwork->network.Configuration.DSConfig, -+ rson_data.id, -+ rson_data.hopcnt, -+ rson_data.loading, -+ (int)pnetwork->network.Rssi, -+ rson_score, -+ pnetwork->network.Ssid.Ssid); -+ plist = get_next(plist); -+ } -+ -+} -+ -+/* -+ Description : As a AP role, We need to check the qualify of associating STA. -+ We also need to check if we are ready to be associated. -+ -+ return : TRUE -- AP REJECT this STA -+ FALSE -- AP ACCEPT this STA -+*/ -+u8 rtw_rson_ap_check_sta(_adapter *padapter, u8 *pframe, uint pkt_len, unsigned short ie_offset) -+{ -+ struct wlan_network *pnetwork = NULL; -+ struct rtw_rson_struct rson_target; -+ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); -+ int len = 0; -+ u8 ret = _FALSE; -+ u8 *p; -+ -+#ifndef CONFIG_RTW_REPEATER_SON_ROOT -+ _rtw_memset(&rson_target, 0, sizeof(rson_target)); -+ for (p = pframe + WLAN_HDR_A3_LEN + ie_offset; ; p += (len + 2)) { -+ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); -+ -+ if ((p == NULL) || (len == 0)) -+ break; -+ -+ if (p && (_rtw_memcmp(p + 2, RTW_RSON_OUI, sizeof(RTW_RSON_OUI)) == _TRUE) -+ && rtw_rson_varify_ie(p)) { -+ p = p + 2 + sizeof(RTW_RSON_OUI); -+ rson_target.ver = *p; -+ /* for (ver == 1) */ -+ p = p + 1; -+ rson_target.id = le32_to_cpup((__le32 *)p); -+ p = p + 4; -+ rson_target.hopcnt = *p; -+ p = p + 1; -+ rson_target.connectible = *p; -+ p = p + 1; -+ rson_target.loading = *p; -+ break; -+ } -+ } -+ -+ if (rson_target.id == 0) /* Normal STA, not a RSON STA */ -+ ret = _FALSE; -+ else if (rson_target.id != pdvobj->rson_data.id) { -+ ret = _TRUE; -+ RTW_INFO("%s : Reject AssoReq because RSON ID not match, STA=%08x, our=%08x\n", -+ __func__, rson_target.id, pdvobj->rson_data.id); -+ } else if ((pdvobj->rson_data.hopcnt == RTW_RSON_HC_NOTREADY) -+ || (pdvobj->rson_data.connectible == RTW_RSON_DENYCONNECT)) { -+ ret = _TRUE; -+ RTW_INFO("%s : Reject AssoReq becuase our hopcnt=%d or connectbile=%d\n", -+ __func__, pdvobj->rson_data.hopcnt, pdvobj->rson_data.connectible); -+ } -+#endif -+ return ret; -+} -+ -+u8 rtw_rson_scan_wk_cmd(_adapter *padapter, int op) -+{ -+ struct cmd_obj *ph2c; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ u8 *extra_cmd_buf; -+ u8 res = _SUCCESS; -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((u8 *)ph2c, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ pdrvextra_cmd_parm->ec_id = RSON_SCAN_WK_CID; -+ pdrvextra_cmd_parm->type = op; -+ pdrvextra_cmd_parm->size = 0; -+ pdrvextra_cmd_parm->pbuf = NULL; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ -+ res = rtw_enqueue_cmd(pcmdpriv, ph2c); -+ -+exit: -+ return res; -+ -+} -+ -+void rtw_rson_scan_cmd_hdl(_adapter *padapter, int op) -+{ -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ u8 val8; -+ -+ if (mlmeext_chk_scan_state(pmlmeext, SCAN_DISABLE) != _TRUE) -+ return; -+ if (op == RSON_SCAN_PROCESS) { -+ padapter->rtw_rson_scanstage = RSON_SCAN_PROCESS; -+ val8 = 0x1e; -+ rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &val8, _FALSE); -+ val8 = 1; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ issue_probereq(padapter, NULL, NULL); -+ /* stop rson_scan after 100ms */ -+ _set_timer(&(pmlmeext->rson_scan_timer), 100); -+ } else if (op == RSON_SCAN_DISABLE) { -+ padapter->rtw_rson_scanstage = RSON_SCAN_DISABLE; -+ val8 = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); -+ val8 = 0xff; -+ rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &val8, _FALSE); -+ /* report_surveydone_event(padapter);*/ -+ if (pmlmepriv->to_join == _TRUE) { -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) != _TRUE) { -+ int s_ret; -+ -+ set_fwstate(pmlmepriv, WIFI_UNDER_LINKING); -+ pmlmepriv->to_join = _FALSE; -+ s_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv); -+ if (s_ret == _SUCCESS) -+ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); -+ else if (s_ret == 2) { -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ rtw_indicate_connect(padapter); -+ } else { -+ RTW_INFO("try_to_join, but select scanning queue fail, to_roam:%d\n", rtw_to_roam(padapter)); -+ if (rtw_to_roam(padapter) != 0) { -+ if (rtw_dec_to_roam(padapter) == 0) { -+ rtw_set_to_roam(padapter, 0); -+ rtw_free_assoc_resources(padapter, _TRUE); -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ } else -+ pmlmepriv->to_join = _TRUE; -+ } else -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING); -+ } -+ } -+ } else { -+ if (rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE)) { -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) -+ && check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) { -+ if (rtw_select_roaming_candidate(pmlmepriv) == _SUCCESS) { -+#ifdef CONFIG_RTW_80211R -+ if (rtw_chk_ft_flags(padapter, RTW_FT_OVER_DS_SUPPORTED)) { -+ start_clnt_ft_action(adapter, (u8 *)pmlmepriv->roam_network->network.MacAddress); -+ } else { -+ /*wait a little time to retrieve packets buffered in the current ap while scan*/ -+ _set_timer(&pmlmeext->ft_roam_timer, 30); -+ } -+#else -+ receive_disconnect(padapter, pmlmepriv->cur_network.network.MacAddress -+ , WLAN_REASON_ACTIVE_ROAM, _FALSE); -+#endif -+ } -+ } -+ } -+ issue_action_BSSCoexistPacket(padapter); -+ issue_action_BSSCoexistPacket(padapter); -+ issue_action_BSSCoexistPacket(padapter); -+ } -+ } else { -+ RTW_ERR("%s : improper parameter -- op = %d\n", __func__, op); -+ } -+} -+ -+#endif /* CONFIG_RTW_REPEATER_SON */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_sdio.c b/drivers/staging/rtl8723cs/core/rtw_sdio.c -new file mode 100644 -index 000000000000..cdadbaff7465 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_sdio.c -@@ -0,0 +1,157 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_SDIO_C_ -+ -+#include /* struct dvobj_priv and etc. */ -+#include /* RTW_SDIO_ADDR_CMD52_GEN */ -+ -+/* -+ * Description: -+ * Use SDIO cmd52 or cmd53 to read/write data -+ * -+ * Parameters: -+ * d pointer of device object(struct dvobj_priv) -+ * addr SDIO address, 17 bits -+ * buf buffer for I/O -+ * len length -+ * write 0:read, 1:write -+ * cmd52 0:cmd52, 1:cmd53 -+ * -+ * Return: -+ * _SUCCESS I/O ok. -+ * _FAIL I/O fail. -+ */ -+static u8 sdio_io(struct dvobj_priv *d, u32 addr, void *buf, size_t len, u8 write, u8 cmd52) -+{ -+#ifdef DBG_SDIO -+#if (DBG_SDIO >= 3) -+ struct sdio_data *sdio; -+#endif /* DBG_SDIO >= 3 */ -+#endif /* DBG_SDIO */ -+ u32 addr_drv; /* address with driver defined bit */ -+ int err; -+ u8 retry = 0; -+ u8 stop_retry = _FALSE; /* flag for stopping retry or not */ -+ -+ -+#ifdef DBG_SDIO -+#if (DBG_SDIO >= 3) -+ sdio = &d->intf_data; -+#endif /* DBG_SDIO >= 3 */ -+#endif /* DBG_SDIO */ -+ -+ if (rtw_is_surprise_removed(dvobj_get_primary_adapter(d))) { -+ RTW_ERR("%s: bSurpriseRemoved, skip %s 0x%05x, %zu bytes\n", -+ __FUNCTION__, write?"write":"read", addr, len); -+ return _FAIL; -+ } -+ -+ addr_drv = addr; -+ if (cmd52) -+ addr_drv = RTW_SDIO_ADDR_CMD52_GEN(addr_drv); -+ -+ do { -+ if (write) -+ err = d->intf_ops->write(d, addr_drv, buf, len, 0); -+ else -+ err = d->intf_ops->read(d, addr_drv, buf, len, 0); -+ if (!err) { -+ if (retry) { -+ RTW_INFO("%s: Retry %s OK! addr=0x%05x %zu bytes, retry=%u,%u\n", -+ __FUNCTION__, write?"write":"read", -+ addr, len, retry, ATOMIC_READ(&d->continual_io_error)); -+ RTW_INFO_DUMP("Data: ", buf, len); -+ } -+ rtw_reset_continual_io_error(d); -+ break; -+ } -+ RTW_ERR("%s: %s FAIL! error(%d) addr=0x%05x %zu bytes, retry=%u,%u\n", -+ __FUNCTION__, write?"write":"read", err, addr, len, -+ retry, ATOMIC_READ(&d->continual_io_error)); -+ -+#ifdef DBG_SDIO -+#if (DBG_SDIO >= 3) -+ if (sdio->dbg_enable) { -+ if (sdio->err_test && sdio->err_test_triggered) -+ sdio->err_test = 0; -+ -+ if (sdio->err_stop) { -+ RTW_ERR("%s: I/O error! Set surprise remove flag ON!\n", -+ __FUNCTION__); -+ rtw_set_surprise_removed(dvobj_get_primary_adapter(d)); -+ return _FAIL; -+ } -+ } -+#endif /* DBG_SDIO >= 3 */ -+#endif /* DBG_SDIO */ -+ -+ retry++; -+ stop_retry = rtw_inc_and_chk_continual_io_error(d); -+ if ((err == -1) || (stop_retry == _TRUE) || (retry > SD_IO_TRY_CNT)) { -+ /* critical error, unrecoverable */ -+ RTW_ERR("%s: Fatal error! Set surprise remove flag ON! (retry=%u,%u)\n", -+ __FUNCTION__, retry, ATOMIC_READ(&d->continual_io_error)); -+ rtw_set_surprise_removed(dvobj_get_primary_adapter(d)); -+ return _FAIL; -+ } -+ -+ /* WLAN IOREG or SDIO Local */ -+ if ((addr & 0x10000) || !(addr & 0xE000)) { -+ RTW_WARN("%s: Retry %s addr=0x%05x %zu bytes, retry=%u,%u\n", -+ __FUNCTION__, write?"write":"read", addr, len, -+ retry, ATOMIC_READ(&d->continual_io_error)); -+ continue; -+ } -+ return _FAIL; -+ } while (1); -+ -+ return _SUCCESS; -+} -+ -+u8 rtw_sdio_read_cmd52(struct dvobj_priv *d, u32 addr, void *buf, size_t len) -+{ -+ return sdio_io(d, addr, buf, len, 0, 1); -+} -+ -+u8 rtw_sdio_read_cmd53(struct dvobj_priv *d, u32 addr, void *buf, size_t len) -+{ -+ return sdio_io(d, addr, buf, len, 0, 0); -+} -+ -+u8 rtw_sdio_write_cmd52(struct dvobj_priv *d, u32 addr, void *buf, size_t len) -+{ -+ return sdio_io(d, addr, buf, len, 1, 1); -+} -+ -+u8 rtw_sdio_write_cmd53(struct dvobj_priv *d, u32 addr, void *buf, size_t len) -+{ -+ return sdio_io(d, addr, buf, len, 1, 0); -+} -+ -+u8 rtw_sdio_f0_read(struct dvobj_priv *d, u32 addr, void *buf, size_t len) -+{ -+ int err; -+ u8 ret; -+ -+ -+ ret = _SUCCESS; -+ addr = RTW_SDIO_ADDR_F0_GEN(addr); -+ -+ err = d->intf_ops->read(d, addr, buf, len, 0); -+ if (err) -+ ret = _FAIL; -+ -+ return ret; -+} -diff --git a/drivers/staging/rtl8723cs/core/rtw_security.c b/drivers/staging/rtl8723cs/core/rtw_security.c -new file mode 100644 -index 000000000000..c7c013789d82 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_security.c -@@ -0,0 +1,2872 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_SECURITY_C_ -+ -+#include -+#include -+ -+static const char *_security_type_str[] = { -+ "N/A", -+ "WEP40", -+ "TKIP", -+ "TKIP_WM", -+ "AES", -+ "WEP104", -+ "SMS4", -+ "GCMP", -+}; -+ -+static const char *_security_type_bip_str[] = { -+ "BIP_CMAC_128", -+ "BIP_GMAC_128", -+ "BIP_GMAC_256", -+ "BIP_CMAC_256", -+}; -+ -+const char *security_type_str(u8 value) -+{ -+#ifdef CONFIG_IEEE80211W -+ if ((_BIP_MAX_ > value) && (value >= _BIP_CMAC_128_)) -+ return _security_type_bip_str[value & ~_SEC_TYPE_BIT_]; -+#endif -+ -+ if (_CCMP_256_ == value) -+ return "CCMP_256"; -+ if (_GCMP_256_ == value) -+ return "GCMP_256"; -+ -+ if (_SEC_TYPE_MAX_ > value) -+ return _security_type_str[value]; -+ -+ return NULL; -+} -+ -+#ifdef CONFIG_IEEE80211W -+u32 security_type_bip_to_gmcs(enum security_type type) -+{ -+ switch (type) { -+ case _BIP_CMAC_128_: -+ return WPA_CIPHER_BIP_CMAC_128; -+ case _BIP_GMAC_128_: -+ return WPA_CIPHER_BIP_GMAC_128; -+ case _BIP_GMAC_256_: -+ return WPA_CIPHER_BIP_GMAC_256; -+ case _BIP_CMAC_256_: -+ return WPA_CIPHER_BIP_CMAC_256; -+ default: -+ return 0; -+ } -+} -+#endif -+ -+#ifdef DBG_SW_SEC_CNT -+#define WEP_SW_ENC_CNT_INC(sec, ra) do {\ -+ if (is_broadcast_mac_addr(ra)) \ -+ sec->wep_sw_enc_cnt_bc++; \ -+ else if (is_multicast_mac_addr(ra)) \ -+ sec->wep_sw_enc_cnt_mc++; \ -+ else \ -+ sec->wep_sw_enc_cnt_uc++; \ -+ } while (0) -+ -+#define WEP_SW_DEC_CNT_INC(sec, ra) do {\ -+ if (is_broadcast_mac_addr(ra)) \ -+ sec->wep_sw_dec_cnt_bc++; \ -+ else if (is_multicast_mac_addr(ra)) \ -+ sec->wep_sw_dec_cnt_mc++; \ -+ else \ -+ sec->wep_sw_dec_cnt_uc++; \ -+ } while (0) -+ -+#define TKIP_SW_ENC_CNT_INC(sec, ra) do {\ -+ if (is_broadcast_mac_addr(ra)) \ -+ sec->tkip_sw_enc_cnt_bc++; \ -+ else if (is_multicast_mac_addr(ra)) \ -+ sec->tkip_sw_enc_cnt_mc++; \ -+ else \ -+ sec->tkip_sw_enc_cnt_uc++; \ -+ } while (0) -+ -+#define TKIP_SW_DEC_CNT_INC(sec, ra) do {\ -+ if (is_broadcast_mac_addr(ra)) \ -+ sec->tkip_sw_dec_cnt_bc++; \ -+ else if (is_multicast_mac_addr(ra)) \ -+ sec->tkip_sw_dec_cnt_mc++; \ -+ else \ -+ sec->tkip_sw_dec_cnt_uc++; \ -+ } while (0) -+ -+#define AES_SW_ENC_CNT_INC(sec, ra) do {\ -+ if (is_broadcast_mac_addr(ra)) \ -+ sec->aes_sw_enc_cnt_bc++; \ -+ else if (is_multicast_mac_addr(ra)) \ -+ sec->aes_sw_enc_cnt_mc++; \ -+ else \ -+ sec->aes_sw_enc_cnt_uc++; \ -+ } while (0) -+ -+#define AES_SW_DEC_CNT_INC(sec, ra) do {\ -+ if (is_broadcast_mac_addr(ra)) \ -+ sec->aes_sw_dec_cnt_bc++; \ -+ else if (is_multicast_mac_addr(ra)) \ -+ sec->aes_sw_dec_cnt_mc++; \ -+ else \ -+ sec->aes_sw_dec_cnt_uc++; \ -+ } while (0) -+ -+#define GCMP_SW_ENC_CNT_INC(sec, ra) do {\ -+ if (is_broadcast_mac_addr(ra)) \ -+ sec->gcmp_sw_enc_cnt_bc++; \ -+ else if (is_multicast_mac_addr(ra)) \ -+ sec->gcmp_sw_enc_cnt_mc++; \ -+ else \ -+ sec->gcmp_sw_enc_cnt_uc++; \ -+ } while (0) -+ -+#define GCMP_SW_DEC_CNT_INC(sec, ra) do {\ -+ if (is_broadcast_mac_addr(ra)) \ -+ sec->gcmp_sw_dec_cnt_bc++; \ -+ else if (is_multicast_mac_addr(ra)) \ -+ sec->gcmp_sw_dec_cnt_mc++; \ -+ else \ -+ sec->gcmp_sw_dec_cnt_uc++; \ -+ } while (0) -+#else -+#define WEP_SW_ENC_CNT_INC(sec, ra) -+#define WEP_SW_DEC_CNT_INC(sec, ra) -+#define TKIP_SW_ENC_CNT_INC(sec, ra) -+#define TKIP_SW_DEC_CNT_INC(sec, ra) -+#define AES_SW_ENC_CNT_INC(sec, ra) -+#define AES_SW_DEC_CNT_INC(sec, ra) -+#define GCMP_SW_ENC_CNT_INC(sec, ra) -+#define GCMP_SW_DEC_CNT_INC(sec, ra) -+#endif /* DBG_SW_SEC_CNT */ -+ -+/* *****WEP related***** */ -+ -+#define CRC32_POLY 0x04c11db7 -+ -+struct arc4context { -+ u32 x; -+ u32 y; -+ u8 state[256]; -+}; -+ -+ -+static void arcfour_init(struct arc4context *parc4ctx, u8 *key, u32 key_len) -+{ -+ u32 t, u; -+ u32 keyindex; -+ u32 stateindex; -+ u8 *state; -+ u32 counter; -+ state = parc4ctx->state; -+ parc4ctx->x = 0; -+ parc4ctx->y = 0; -+ for (counter = 0; counter < 256; counter++) -+ state[counter] = (u8)counter; -+ keyindex = 0; -+ stateindex = 0; -+ for (counter = 0; counter < 256; counter++) { -+ t = state[counter]; -+ stateindex = (stateindex + key[keyindex] + t) & 0xff; -+ u = state[stateindex]; -+ state[stateindex] = (u8)t; -+ state[counter] = (u8)u; -+ if (++keyindex >= key_len) -+ keyindex = 0; -+ } -+} -+static u32 arcfour_byte(struct arc4context *parc4ctx) -+{ -+ u32 x; -+ u32 y; -+ u32 sx, sy; -+ u8 *state; -+ state = parc4ctx->state; -+ x = (parc4ctx->x + 1) & 0xff; -+ sx = state[x]; -+ y = (sx + parc4ctx->y) & 0xff; -+ sy = state[y]; -+ parc4ctx->x = x; -+ parc4ctx->y = y; -+ state[y] = (u8)sx; -+ state[x] = (u8)sy; -+ return state[(sx + sy) & 0xff]; -+} -+ -+ -+static void arcfour_encrypt(struct arc4context *parc4ctx, -+ u8 *dest, -+ u8 *src, -+ u32 len) -+{ -+ u32 i; -+ for (i = 0; i < len; i++) -+ dest[i] = src[i] ^ (unsigned char)arcfour_byte(parc4ctx); -+} -+ -+static sint bcrc32initialized = 0; -+static u32 crc32_table[256]; -+ -+ -+static u8 crc32_reverseBit(u8 data) -+{ -+ return (u8)((data << 7) & 0x80) | ((data << 5) & 0x40) | ((data << 3) & 0x20) | ((data << 1) & 0x10) | ((data >> 1) & 0x08) | ((data >> 3) & 0x04) | ((data >> 5) & 0x02) | (( -+ data >> 7) & 0x01) ; -+} -+ -+static void crc32_init(void) -+{ -+ if (bcrc32initialized == 1) -+ goto exit; -+ else { -+ sint i, j; -+ u32 c; -+ u8 *p = (u8 *)&c, *p1; -+ u8 k; -+ -+ c = 0x12340000; -+ -+ for (i = 0; i < 256; ++i) { -+ k = crc32_reverseBit((u8)i); -+ for (c = ((u32)k) << 24, j = 8; j > 0; --j) -+ c = c & 0x80000000 ? (c << 1) ^ CRC32_POLY : (c << 1); -+ p1 = (u8 *)&crc32_table[i]; -+ -+ p1[0] = crc32_reverseBit(p[3]); -+ p1[1] = crc32_reverseBit(p[2]); -+ p1[2] = crc32_reverseBit(p[1]); -+ p1[3] = crc32_reverseBit(p[0]); -+ } -+ bcrc32initialized = 1; -+ } -+exit: -+ return; -+} -+ -+static u32 getcrc32(u8 *buf, sint len) -+{ -+ u8 *p; -+ u32 crc; -+ if (bcrc32initialized == 0) -+ crc32_init(); -+ -+ crc = 0xffffffff; /* preload shift register, per CRC-32 spec */ -+ -+ for (p = buf; len > 0; ++p, --len) -+ crc = crc32_table[(crc ^ *p) & 0xff] ^ (crc >> 8); -+ return ~crc; /* transmit complement, per CRC-32 spec */ -+} -+ -+ -+/* -+ Need to consider the fragment situation -+*/ -+void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe) -+{ -+ /* exclude ICV */ -+ -+ unsigned char crc[4]; -+ struct arc4context mycontext; -+ -+ sint curfragnum, length; -+ u32 keylength; -+ -+ u8 *pframe, *payload, *iv; /* ,*wepkey */ -+ u8 wepkey[16]; -+ u8 hw_hdr_offset = 0; -+ struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ -+ -+ if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL) -+ return; -+ -+#ifdef CONFIG_USB_TX_AGGREGATION -+ hw_hdr_offset = TXDESC_SIZE + -+ (((struct xmit_frame *)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); -+#else -+#ifdef CONFIG_TX_EARLY_MODE -+ hw_hdr_offset = TXDESC_OFFSET + EARLY_MODE_INFO_SIZE; -+#else -+ hw_hdr_offset = TXDESC_OFFSET; -+#endif -+#endif -+ -+ pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset; -+ -+ /* start to encrypt each fragment */ -+ if ((pattrib->encrypt == _WEP40_) || (pattrib->encrypt == _WEP104_)) { -+ keylength = psecuritypriv->dot11DefKeylen[psecuritypriv->dot11PrivacyKeyIndex]; -+ -+ for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) { -+ iv = pframe + pattrib->hdrlen; -+ _rtw_memcpy(&wepkey[0], iv, 3); -+ _rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[psecuritypriv->dot11PrivacyKeyIndex].skey[0], keylength); -+ payload = pframe + pattrib->iv_len + pattrib->hdrlen; -+ -+ if ((curfragnum + 1) == pattrib->nr_frags) { -+ /* the last fragment */ -+ -+ length = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len; -+ -+ *((u32 *)crc) = cpu_to_le32(getcrc32(payload, length)); -+ -+ arcfour_init(&mycontext, wepkey, 3 + keylength); -+ arcfour_encrypt(&mycontext, payload, payload, length); -+ arcfour_encrypt(&mycontext, payload + length, crc, 4); -+ -+ } else { -+ length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len ; -+ *((u32 *)crc) = cpu_to_le32(getcrc32(payload, length)); -+ arcfour_init(&mycontext, wepkey, 3 + keylength); -+ arcfour_encrypt(&mycontext, payload, payload, length); -+ arcfour_encrypt(&mycontext, payload + length, crc, 4); -+ -+ pframe += pxmitpriv->frag_len; -+ pframe = (u8 *)RND4((SIZE_PTR)(pframe)); -+ -+ } -+ -+ } -+ -+ WEP_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra); -+ } -+ -+ -+} -+ -+void rtw_wep_decrypt(_adapter *padapter, u8 *precvframe) -+{ -+ /* exclude ICV */ -+ u8 crc[4]; -+ struct arc4context mycontext; -+ sint length; -+ u32 keylength; -+ u8 *pframe, *payload, *iv, wepkey[16]; -+ u8 keyindex; -+ struct rx_pkt_attrib *prxattrib = &(((union recv_frame *)precvframe)->u.hdr.attrib); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ -+ pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data; -+ -+ /* start to decrypt recvframe */ -+ if ((prxattrib->encrypt == _WEP40_) || (prxattrib->encrypt == _WEP104_)) { -+ iv = pframe + prxattrib->hdrlen; -+ /* keyindex=(iv[3]&0x3); */ -+ keyindex = prxattrib->key_index; -+ keylength = psecuritypriv->dot11DefKeylen[keyindex]; -+ _rtw_memcpy(&wepkey[0], iv, 3); -+ /* _rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[psecuritypriv->dot11PrivacyKeyIndex].skey[0],keylength); */ -+ _rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[keyindex].skey[0], keylength); -+ length = ((union recv_frame *)precvframe)->u.hdr.len - prxattrib->hdrlen - prxattrib->iv_len; -+ -+ payload = pframe + prxattrib->iv_len + prxattrib->hdrlen; -+ -+ /* decrypt payload include icv */ -+ arcfour_init(&mycontext, wepkey, 3 + keylength); -+ arcfour_encrypt(&mycontext, payload, payload, length); -+ -+ /* calculate icv and compare the icv */ -+ *((u32 *)crc) = le32_to_cpu(getcrc32(payload, length - 4)); -+ -+ -+ WEP_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); -+ } -+ -+ -+ return; -+ -+} -+ -+/* 3 =====TKIP related===== */ -+ -+static u32 secmicgetuint32(u8 *p) -+/* Convert from Byte[] to Us4Byte32 in a portable way */ -+{ -+ s32 i; -+ u32 res = 0; -+ for (i = 0; i < 4; i++) -+ res |= ((u32)(*p++)) << (8 * i); -+ return res; -+} -+ -+static void secmicputuint32(u8 *p, u32 val) -+/* Convert from Us4Byte32 to Byte[] in a portable way */ -+{ -+ long i; -+ for (i = 0; i < 4; i++) { -+ *p++ = (u8)(val & 0xff); -+ val >>= 8; -+ } -+} -+ -+static void secmicclear(struct mic_data *pmicdata) -+{ -+ /* Reset the state to the empty message. */ -+ pmicdata->L = pmicdata->K0; -+ pmicdata->R = pmicdata->K1; -+ pmicdata->nBytesInM = 0; -+ pmicdata->M = 0; -+} -+ -+void rtw_secmicsetkey(struct mic_data *pmicdata, u8 *key) -+{ -+ /* Set the key */ -+ pmicdata->K0 = secmicgetuint32(key); -+ pmicdata->K1 = secmicgetuint32(key + 4); -+ /* and reset the message */ -+ secmicclear(pmicdata); -+} -+ -+void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b) -+{ -+ /* Append the byte to our word-sized buffer */ -+ pmicdata->M |= ((unsigned long)b) << (8 * pmicdata->nBytesInM); -+ pmicdata->nBytesInM++; -+ /* Process the word if it is full. */ -+ if (pmicdata->nBytesInM >= 4) { -+ pmicdata->L ^= pmicdata->M; -+ pmicdata->R ^= ROL32(pmicdata->L, 17); -+ pmicdata->L += pmicdata->R; -+ pmicdata->R ^= ((pmicdata->L & 0xff00ff00) >> 8) | ((pmicdata->L & 0x00ff00ff) << 8); -+ pmicdata->L += pmicdata->R; -+ pmicdata->R ^= ROL32(pmicdata->L, 3); -+ pmicdata->L += pmicdata->R; -+ pmicdata->R ^= ROR32(pmicdata->L, 2); -+ pmicdata->L += pmicdata->R; -+ /* Clear the buffer */ -+ pmicdata->M = 0; -+ pmicdata->nBytesInM = 0; -+ } -+} -+ -+void rtw_secmicappend(struct mic_data *pmicdata, u8 *src, u32 nbytes) -+{ -+ /* This is simple */ -+ while (nbytes > 0) { -+ rtw_secmicappendbyte(pmicdata, *src++); -+ nbytes--; -+ } -+} -+ -+void rtw_secgetmic(struct mic_data *pmicdata, u8 *dst) -+{ -+ /* Append the minimum padding */ -+ rtw_secmicappendbyte(pmicdata, 0x5a); -+ rtw_secmicappendbyte(pmicdata, 0); -+ rtw_secmicappendbyte(pmicdata, 0); -+ rtw_secmicappendbyte(pmicdata, 0); -+ rtw_secmicappendbyte(pmicdata, 0); -+ /* and then zeroes until the length is a multiple of 4 */ -+ while (pmicdata->nBytesInM != 0) -+ rtw_secmicappendbyte(pmicdata, 0); -+ /* The appendByte function has already computed the result. */ -+ secmicputuint32(dst, pmicdata->L); -+ secmicputuint32(dst + 4, pmicdata->R); -+ /* Reset to the empty message. */ -+ secmicclear(pmicdata); -+} -+ -+ -+void rtw_seccalctkipmic(u8 *key, u8 *header, u8 *data, u32 data_len, u8 *mic_code, u8 pri) -+{ -+ -+ struct mic_data micdata; -+ u8 priority[4] = {0x0, 0x0, 0x0, 0x0}; -+ rtw_secmicsetkey(&micdata, key); -+ priority[0] = pri; -+ -+ /* Michael MIC pseudo header: DA, SA, 3 x 0, Priority */ -+ if (header[1] & 1) { /* ToDS==1 */ -+ rtw_secmicappend(&micdata, &header[16], 6); /* DA */ -+ if (header[1] & 2) /* From Ds==1 */ -+ rtw_secmicappend(&micdata, &header[24], 6); -+ else -+ rtw_secmicappend(&micdata, &header[10], 6); -+ } else { /* ToDS==0 */ -+ rtw_secmicappend(&micdata, &header[4], 6); /* DA */ -+ if (header[1] & 2) /* From Ds==1 */ -+ rtw_secmicappend(&micdata, &header[16], 6); -+ else -+ rtw_secmicappend(&micdata, &header[10], 6); -+ -+ } -+ rtw_secmicappend(&micdata, &priority[0], 4); -+ -+ -+ rtw_secmicappend(&micdata, data, data_len); -+ -+ rtw_secgetmic(&micdata, mic_code); -+} -+ -+ -+ -+ -+/* macros for extraction/creation of unsigned char/unsigned short values */ -+#define RotR1(v16) ((((v16) >> 1) & 0x7FFF) ^ (((v16) & 1) << 15)) -+#define Lo8(v16) ((u8)((v16) & 0x00FF)) -+#define Hi8(v16) ((u8)(((v16) >> 8) & 0x00FF)) -+#define Lo16(v32) ((u16)((v32) & 0xFFFF)) -+#define Hi16(v32) ((u16)(((v32) >> 16) & 0xFFFF)) -+#define Mk16(hi, lo) ((lo) ^ (((u16)(hi)) << 8)) -+ -+/* select the Nth 16-bit word of the temporal key unsigned char array TK[] */ -+#define TK16(N) Mk16(tk[2*(N)+1], tk[2*(N)]) -+ -+/* S-box lookup: 16 bits --> 16 bits */ -+#define _S_(v16) (Sbox1[0][Lo8(v16)] ^ Sbox1[1][Hi8(v16)]) -+ -+/* fixed algorithm "parameters" */ -+#define PHASE1_LOOP_CNT 8 /* this needs to be "big enough" */ -+#define TA_SIZE 6 /* 48-bit transmitter address */ -+#define TK_SIZE 16 /* 128-bit temporal key */ -+#define P1K_SIZE 10 /* 80-bit Phase1 key */ -+#define RC4_KEY_SIZE 16 /* 128-bit RC4KEY (104 bits unknown) */ -+ -+ -+/* 2-unsigned char by 2-unsigned char subset of the full AES S-box table */ -+static const unsigned short Sbox1[2][256] = /* Sbox for hash (can be in ROM) */ -+{ { -+ 0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154, -+ 0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A, -+ 0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B, -+ 0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B, -+ 0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F, -+ 0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F, -+ 0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5, -+ 0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F, -+ 0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB, -+ 0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397, -+ 0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED, -+ 0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A, -+ 0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194, -+ 0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3, -+ 0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104, -+ 0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D, -+ 0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39, -+ 0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695, -+ 0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83, -+ 0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76, -+ 0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4, -+ 0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B, -+ 0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0, -+ 0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018, -+ 0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751, -+ 0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85, -+ 0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12, -+ 0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9, -+ 0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7, -+ 0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A, -+ 0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8, -+ 0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A, -+ }, -+ -+ -+ { /* second half of table is unsigned char-reversed version of first! */ -+ 0xA5C6, 0x84F8, 0x99EE, 0x8DF6, 0x0DFF, 0xBDD6, 0xB1DE, 0x5491, -+ 0x5060, 0x0302, 0xA9CE, 0x7D56, 0x19E7, 0x62B5, 0xE64D, 0x9AEC, -+ 0x458F, 0x9D1F, 0x4089, 0x87FA, 0x15EF, 0xEBB2, 0xC98E, 0x0BFB, -+ 0xEC41, 0x67B3, 0xFD5F, 0xEA45, 0xBF23, 0xF753, 0x96E4, 0x5B9B, -+ 0xC275, 0x1CE1, 0xAE3D, 0x6A4C, 0x5A6C, 0x417E, 0x02F5, 0x4F83, -+ 0x5C68, 0xF451, 0x34D1, 0x08F9, 0x93E2, 0x73AB, 0x5362, 0x3F2A, -+ 0x0C08, 0x5295, 0x6546, 0x5E9D, 0x2830, 0xA137, 0x0F0A, 0xB52F, -+ 0x090E, 0x3624, 0x9B1B, 0x3DDF, 0x26CD, 0x694E, 0xCD7F, 0x9FEA, -+ 0x1B12, 0x9E1D, 0x7458, 0x2E34, 0x2D36, 0xB2DC, 0xEEB4, 0xFB5B, -+ 0xF6A4, 0x4D76, 0x61B7, 0xCE7D, 0x7B52, 0x3EDD, 0x715E, 0x9713, -+ 0xF5A6, 0x68B9, 0x0000, 0x2CC1, 0x6040, 0x1FE3, 0xC879, 0xEDB6, -+ 0xBED4, 0x468D, 0xD967, 0x4B72, 0xDE94, 0xD498, 0xE8B0, 0x4A85, -+ 0x6BBB, 0x2AC5, 0xE54F, 0x16ED, 0xC586, 0xD79A, 0x5566, 0x9411, -+ 0xCF8A, 0x10E9, 0x0604, 0x81FE, 0xF0A0, 0x4478, 0xBA25, 0xE34B, -+ 0xF3A2, 0xFE5D, 0xC080, 0x8A05, 0xAD3F, 0xBC21, 0x4870, 0x04F1, -+ 0xDF63, 0xC177, 0x75AF, 0x6342, 0x3020, 0x1AE5, 0x0EFD, 0x6DBF, -+ 0x4C81, 0x1418, 0x3526, 0x2FC3, 0xE1BE, 0xA235, 0xCC88, 0x392E, -+ 0x5793, 0xF255, 0x82FC, 0x477A, 0xACC8, 0xE7BA, 0x2B32, 0x95E6, -+ 0xA0C0, 0x9819, 0xD19E, 0x7FA3, 0x6644, 0x7E54, 0xAB3B, 0x830B, -+ 0xCA8C, 0x29C7, 0xD36B, 0x3C28, 0x79A7, 0xE2BC, 0x1D16, 0x76AD, -+ 0x3BDB, 0x5664, 0x4E74, 0x1E14, 0xDB92, 0x0A0C, 0x6C48, 0xE4B8, -+ 0x5D9F, 0x6EBD, 0xEF43, 0xA6C4, 0xA839, 0xA431, 0x37D3, 0x8BF2, -+ 0x32D5, 0x438B, 0x596E, 0xB7DA, 0x8C01, 0x64B1, 0xD29C, 0xE049, -+ 0xB4D8, 0xFAAC, 0x07F3, 0x25CF, 0xAFCA, 0x8EF4, 0xE947, 0x1810, -+ 0xD56F, 0x88F0, 0x6F4A, 0x725C, 0x2438, 0xF157, 0xC773, 0x5197, -+ 0x23CB, 0x7CA1, 0x9CE8, 0x213E, 0xDD96, 0xDC61, 0x860D, 0x850F, -+ 0x90E0, 0x427C, 0xC471, 0xAACC, 0xD890, 0x0506, 0x01F7, 0x121C, -+ 0xA3C2, 0x5F6A, 0xF9AE, 0xD069, 0x9117, 0x5899, 0x273A, 0xB927, -+ 0x38D9, 0x13EB, 0xB32B, 0x3322, 0xBBD2, 0x70A9, 0x8907, 0xA733, -+ 0xB62D, 0x223C, 0x9215, 0x20C9, 0x4987, 0xFFAA, 0x7850, 0x7AA5, -+ 0x8F03, 0xF859, 0x8009, 0x171A, 0xDA65, 0x31D7, 0xC684, 0xB8D0, -+ 0xC382, 0xB029, 0x775A, 0x111E, 0xCB7B, 0xFCA8, 0xD66D, 0x3A2C, -+ } -+}; -+ -+/* -+********************************************************************** -+* Routine: Phase 1 -- generate P1K, given TA, TK, IV32 -+* -+* Inputs: -+* tk[] = temporal key [128 bits] -+* ta[] = transmitter's MAC address [ 48 bits] -+* iv32 = upper 32 bits of IV [ 32 bits] -+* Output: -+* p1k[] = Phase 1 key [ 80 bits] -+* -+* Note: -+* This function only needs to be called every 2**16 packets, -+* although in theory it could be called every packet. -+* -+********************************************************************** -+*/ -+static void phase1(u16 *p1k, const u8 *tk, const u8 *ta, u32 iv32) -+{ -+ sint i; -+ /* Initialize the 80 bits of P1K[] from IV32 and TA[0..5] */ -+ p1k[0] = Lo16(iv32); -+ p1k[1] = Hi16(iv32); -+ p1k[2] = Mk16(ta[1], ta[0]); /* use TA[] as little-endian */ -+ p1k[3] = Mk16(ta[3], ta[2]); -+ p1k[4] = Mk16(ta[5], ta[4]); -+ -+ /* Now compute an unbalanced Feistel cipher with 80-bit block */ -+ /* size on the 80-bit block P1K[], using the 128-bit key TK[] */ -+ for (i = 0; i < PHASE1_LOOP_CNT ; i++) { -+ /* Each add operation here is mod 2**16 */ -+ p1k[0] += _S_(p1k[4] ^ TK16((i & 1) + 0)); -+ p1k[1] += _S_(p1k[0] ^ TK16((i & 1) + 2)); -+ p1k[2] += _S_(p1k[1] ^ TK16((i & 1) + 4)); -+ p1k[3] += _S_(p1k[2] ^ TK16((i & 1) + 6)); -+ p1k[4] += _S_(p1k[3] ^ TK16((i & 1) + 0)); -+ p1k[4] += (unsigned short)i; /* avoid "slide attacks" */ -+ } -+} -+ -+ -+/* -+********************************************************************** -+* Routine: Phase 2 -- generate RC4KEY, given TK, P1K, IV16 -+* -+* Inputs: -+* tk[] = Temporal key [128 bits] -+* p1k[] = Phase 1 output key [ 80 bits] -+* iv16 = low 16 bits of IV counter [ 16 bits] -+* Output: -+* rc4key[] = the key used to encrypt the packet [128 bits] -+* -+* Note: -+* The value {TA,IV32,IV16} for Phase1/Phase2 must be unique -+* across all packets using the same key TK value. Then, for a -+* given value of TK[], this TKIP48 construction guarantees that -+* the final RC4KEY value is unique across all packets. -+* -+* Suggested implementation optimization: if PPK[] is "overlaid" -+* appropriately on RC4KEY[], there is no need for the final -+* for loop below that copies the PPK[] result into RC4KEY[]. -+* -+********************************************************************** -+*/ -+static void phase2(u8 *rc4key, const u8 *tk, const u16 *p1k, u16 iv16) -+{ -+ sint i; -+ u16 PPK[6]; /* temporary key for mixing */ -+ /* Note: all adds in the PPK[] equations below are mod 2**16 */ -+ for (i = 0; i < 5; i++) -+ PPK[i] = p1k[i]; /* first, copy P1K to PPK */ -+ PPK[5] = p1k[4] + iv16; /* next, add in IV16 */ -+ -+ /* Bijective non-linear mixing of the 96 bits of PPK[0..5] */ -+ PPK[0] += _S_(PPK[5] ^ TK16(0)); /* Mix key in each "round" */ -+ PPK[1] += _S_(PPK[0] ^ TK16(1)); -+ PPK[2] += _S_(PPK[1] ^ TK16(2)); -+ PPK[3] += _S_(PPK[2] ^ TK16(3)); -+ PPK[4] += _S_(PPK[3] ^ TK16(4)); -+ PPK[5] += _S_(PPK[4] ^ TK16(5)); /* Total # S-box lookups == 6 */ -+ -+ /* Final sweep: bijective, "linear". Rotates kill LSB correlations */ -+ PPK[0] += RotR1(PPK[5] ^ TK16(6)); -+ PPK[1] += RotR1(PPK[0] ^ TK16(7)); /* Use all of TK[] in Phase2 */ -+ PPK[2] += RotR1(PPK[1]); -+ PPK[3] += RotR1(PPK[2]); -+ PPK[4] += RotR1(PPK[3]); -+ PPK[5] += RotR1(PPK[4]); -+ /* Note: At this point, for a given key TK[0..15], the 96-bit output */ -+ /* value PPK[0..5] is guaranteed to be unique, as a function */ -+ /* of the 96-bit "input" value {TA,IV32,IV16}. That is, P1K */ -+ /* is now a keyed permutation of {TA,IV32,IV16}. */ -+ -+ /* Set RC4KEY[0..3], which includes "cleartext" portion of RC4 key */ -+ rc4key[0] = Hi8(iv16); /* RC4KEY[0..2] is the WEP IV */ -+ rc4key[1] = (Hi8(iv16) | 0x20) & 0x7F; /* Help avoid weak (FMS) keys */ -+ rc4key[2] = Lo8(iv16); -+ rc4key[3] = Lo8((PPK[5] ^ TK16(0)) >> 1); -+ -+ -+ /* Copy 96 bits of PPK[0..5] to RC4KEY[4..15] (little-endian) */ -+ for (i = 0; i < 6; i++) { -+ rc4key[4 + 2 * i] = Lo8(PPK[i]); -+ rc4key[5 + 2 * i] = Hi8(PPK[i]); -+ } -+} -+ -+ -+/* The hlen isn't include the IV */ -+u32 rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe) -+{ -+ /* exclude ICV */ -+ u16 pnl; -+ u32 pnh; -+ u8 rc4key[16]; -+ u8 ttkey[16]; -+ u8 crc[4]; -+ u8 hw_hdr_offset = 0; -+ struct arc4context mycontext; -+ sint curfragnum, length; -+ u32 prwskeylen; -+ -+ u8 *pframe, *payload, *iv, *prwskey; -+ union pn48 dot11txpn; -+ /* struct sta_info *stainfo; */ -+ struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ u32 res = _SUCCESS; -+ -+ if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL) -+ return _FAIL; -+ -+#ifdef CONFIG_USB_TX_AGGREGATION -+ hw_hdr_offset = TXDESC_SIZE + -+ (((struct xmit_frame *)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); -+#else -+#ifdef CONFIG_TX_EARLY_MODE -+ hw_hdr_offset = TXDESC_OFFSET + EARLY_MODE_INFO_SIZE; -+#else -+ hw_hdr_offset = TXDESC_OFFSET; -+#endif -+#endif -+ -+ pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset; -+ /* 4 start to encrypt each fragment */ -+ if (pattrib->encrypt == _TKIP_) { -+ -+ /* -+ if(pattrib->psta) -+ { -+ stainfo = pattrib->psta; -+ } -+ else -+ { -+ RTW_INFO("%s, call rtw_get_stainfo()\n", __func__); -+ stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); -+ } -+ */ -+ /* if (stainfo!=NULL) */ -+ { -+ /* -+ if(!(stainfo->state &WIFI_ASOC_STATE)) -+ { -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, stainfo->state); -+ return _FAIL; -+ } -+ */ -+ -+ if (IS_MCAST(pattrib->ra)) -+ prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; -+ else { -+ /* prwskey=&stainfo->dot118021x_UncstKey.skey[0]; */ -+ prwskey = pattrib->dot118021x_UncstKey.skey; -+ } -+ -+ prwskeylen = 16; -+ -+ for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) { -+ iv = pframe + pattrib->hdrlen; -+ payload = pframe + pattrib->iv_len + pattrib->hdrlen; -+ -+ GET_TKIP_PN(iv, dot11txpn); -+ -+ pnl = (u16)(dot11txpn.val); -+ pnh = (u32)(dot11txpn.val >> 16); -+ -+ phase1((u16 *)&ttkey[0], prwskey, &pattrib->ta[0], pnh); -+ -+ phase2(&rc4key[0], prwskey, (u16 *)&ttkey[0], pnl); -+ -+ if ((curfragnum + 1) == pattrib->nr_frags) { /* 4 the last fragment */ -+ length = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len; -+ *((u32 *)crc) = cpu_to_le32(getcrc32(payload, length)); /* modified by Amy*/ -+ -+ arcfour_init(&mycontext, rc4key, 16); -+ arcfour_encrypt(&mycontext, payload, payload, length); -+ arcfour_encrypt(&mycontext, payload + length, crc, 4); -+ -+ } else { -+ length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len ; -+ *((u32 *)crc) = cpu_to_le32(getcrc32(payload, length)); /* modified by Amy*/ -+ arcfour_init(&mycontext, rc4key, 16); -+ arcfour_encrypt(&mycontext, payload, payload, length); -+ arcfour_encrypt(&mycontext, payload + length, crc, 4); -+ -+ pframe += pxmitpriv->frag_len; -+ pframe = (u8 *)RND4((SIZE_PTR)(pframe)); -+ -+ } -+ } -+ -+ TKIP_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra); -+ } -+ /* -+ else{ -+ RTW_INFO("%s, psta==NUL\n", __func__); -+ res=_FAIL; -+ } -+ */ -+ -+ } -+ return res; -+ -+} -+ -+ -+/* The hlen isn't include the IV */ -+u32 rtw_tkip_decrypt(_adapter *padapter, u8 *precvframe) -+{ -+ /* exclude ICV */ -+ u16 pnl; -+ u32 pnh; -+ u8 rc4key[16]; -+ u8 ttkey[16]; -+ u8 crc[4]; -+ struct arc4context mycontext; -+ sint length; -+ u32 prwskeylen; -+ -+ u8 *pframe, *payload, *iv, *prwskey; -+ union pn48 dot11txpn; -+ struct sta_info *stainfo; -+ struct rx_pkt_attrib *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ /* struct recv_priv *precvpriv=&padapter->recvpriv; */ -+ u32 res = _SUCCESS; -+ -+ -+ pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data; -+ -+ /* 4 start to decrypt recvframe */ -+ if (prxattrib->encrypt == _TKIP_) { -+ -+ stainfo = rtw_get_stainfo(&padapter->stapriv , &prxattrib->ta[0]); -+ if (stainfo != NULL) { -+ -+ if (IS_MCAST(prxattrib->ra)) { -+ static systime start = 0; -+ static u32 no_gkey_bc_cnt = 0; -+ static u32 no_gkey_mc_cnt = 0; -+ -+ if (psecuritypriv->binstallGrpkey == _FALSE) { -+ res = _FAIL; -+ -+ if (start == 0) -+ start = rtw_get_current_time(); -+ -+ if (is_broadcast_mac_addr(prxattrib->ra)) -+ no_gkey_bc_cnt++; -+ else -+ no_gkey_mc_cnt++; -+ -+ if (rtw_get_passing_time_ms(start) > 1000) { -+ if (no_gkey_bc_cnt || no_gkey_mc_cnt) { -+ RTW_PRINT(FUNC_ADPT_FMT" no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", -+ FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); -+ } -+ start = rtw_get_current_time(); -+ no_gkey_bc_cnt = 0; -+ no_gkey_mc_cnt = 0; -+ } -+ goto exit; -+ } -+ -+ if (no_gkey_bc_cnt || no_gkey_mc_cnt) { -+ RTW_PRINT(FUNC_ADPT_FMT" gkey installed. no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", -+ FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); -+ } -+ start = 0; -+ no_gkey_bc_cnt = 0; -+ no_gkey_mc_cnt = 0; -+ -+ /* RTW_INFO("rx bc/mc packets, to perform sw rtw_tkip_decrypt\n"); */ -+ /* prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; */ -+ prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; -+ prwskeylen = 16; -+ } else { -+ prwskey = &stainfo->dot118021x_UncstKey.skey[0]; -+ prwskeylen = 16; -+ } -+ -+ iv = pframe + prxattrib->hdrlen; -+ payload = pframe + prxattrib->iv_len + prxattrib->hdrlen; -+ length = ((union recv_frame *)precvframe)->u.hdr.len - prxattrib->hdrlen - prxattrib->iv_len; -+ -+ GET_TKIP_PN(iv, dot11txpn); -+ -+ pnl = (u16)(dot11txpn.val); -+ pnh = (u32)(dot11txpn.val >> 16); -+ -+ phase1((u16 *)&ttkey[0], prwskey, &prxattrib->ta[0], pnh); -+ phase2(&rc4key[0], prwskey, (unsigned short *)&ttkey[0], pnl); -+ -+ /* 4 decrypt payload include icv */ -+ -+ arcfour_init(&mycontext, rc4key, 16); -+ arcfour_encrypt(&mycontext, payload, payload, length); -+ -+ *((u32 *)crc) = le32_to_cpu(getcrc32(payload, length - 4)); -+ -+ if (crc[3] != payload[length - 1] || crc[2] != payload[length - 2] || crc[1] != payload[length - 3] || crc[0] != payload[length - 4]) { -+ res = _FAIL; -+ } -+ -+ TKIP_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); -+ } else { -+ res = _FAIL; -+ } -+ -+ } -+exit: -+ return res; -+ -+} -+ -+ -+/* 3 =====AES related===== */ -+#if (NEW_CRYPTO == 0) -+ -+#define MAX_MSG_SIZE 2048 -+/*****************************/ -+/******** SBOX Table *********/ -+/*****************************/ -+ -+static u8 sbox_table[256] = { -+ 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, -+ 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76, -+ 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, -+ 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, -+ 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, -+ 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, -+ 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, -+ 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75, -+ 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, -+ 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, -+ 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, -+ 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, -+ 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, -+ 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8, -+ 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, -+ 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, -+ 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, -+ 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, -+ 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, -+ 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb, -+ 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, -+ 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, -+ 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, -+ 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, -+ 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, -+ 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a, -+ 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, -+ 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, -+ 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, -+ 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, -+ 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, -+ 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16 -+}; -+ -+/*****************************/ -+/**** Function Prototypes ****/ -+/*****************************/ -+ -+static void bitwise_xor(u8 *ina, u8 *inb, u8 *out); -+static void construct_mic_iv( -+ u8 *mic_header1, -+ sint qc_exists, -+ sint a4_exists, -+ u8 *mpdu, -+ uint payload_length, -+ u8 *pn_vector, -+ uint frtype);/* add for CONFIG_IEEE80211W, none 11w also can use */ -+static void construct_mic_header1( -+ u8 *mic_header1, -+ sint header_length, -+ u8 *mpdu, -+ uint frtype);/* add for CONFIG_IEEE80211W, none 11w also can use */ -+static void construct_mic_header2( -+ u8 *mic_header2, -+ u8 *mpdu, -+ sint a4_exists, -+ sint qc_exists); -+static void construct_ctr_preload( -+ u8 *ctr_preload, -+ sint a4_exists, -+ sint qc_exists, -+ u8 *mpdu, -+ u8 *pn_vector, -+ sint c, -+ uint frtype);/* add for CONFIG_IEEE80211W, none 11w also can use */ -+static void xor_128(u8 *a, u8 *b, u8 *out); -+static void xor_32(u8 *a, u8 *b, u8 *out); -+static u8 sbox(u8 a); -+static void next_key(u8 *key, sint round); -+static void byte_sub(u8 *in, u8 *out); -+static void shift_row(u8 *in, u8 *out); -+static void mix_column(u8 *in, u8 *out); -+static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext); -+ -+ -+/****************************************/ -+/* aes128k128d() */ -+/* Performs a 128 bit AES encrypt with */ -+/* 128 bit data. */ -+/****************************************/ -+static void xor_128(u8 *a, u8 *b, u8 *out) -+{ -+ sint i; -+ for (i = 0; i < 16; i++) -+ out[i] = a[i] ^ b[i]; -+} -+ -+ -+static void xor_32(u8 *a, u8 *b, u8 *out) -+{ -+ sint i; -+ for (i = 0; i < 4; i++) -+ out[i] = a[i] ^ b[i]; -+} -+ -+ -+static u8 sbox(u8 a) -+{ -+ return sbox_table[(sint)a]; -+} -+ -+ -+static void next_key(u8 *key, sint round) -+{ -+ u8 rcon; -+ u8 sbox_key[4]; -+ u8 rcon_table[12] = { -+ 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, -+ 0x1b, 0x36, 0x36, 0x36 -+ }; -+ sbox_key[0] = sbox(key[13]); -+ sbox_key[1] = sbox(key[14]); -+ sbox_key[2] = sbox(key[15]); -+ sbox_key[3] = sbox(key[12]); -+ -+ rcon = rcon_table[round]; -+ -+ xor_32(&key[0], sbox_key, &key[0]); -+ key[0] = key[0] ^ rcon; -+ -+ xor_32(&key[4], &key[0], &key[4]); -+ xor_32(&key[8], &key[4], &key[8]); -+ xor_32(&key[12], &key[8], &key[12]); -+} -+ -+ -+static void byte_sub(u8 *in, u8 *out) -+{ -+ sint i; -+ for (i = 0; i < 16; i++) -+ out[i] = sbox(in[i]); -+} -+ -+ -+static void shift_row(u8 *in, u8 *out) -+{ -+ out[0] = in[0]; -+ out[1] = in[5]; -+ out[2] = in[10]; -+ out[3] = in[15]; -+ out[4] = in[4]; -+ out[5] = in[9]; -+ out[6] = in[14]; -+ out[7] = in[3]; -+ out[8] = in[8]; -+ out[9] = in[13]; -+ out[10] = in[2]; -+ out[11] = in[7]; -+ out[12] = in[12]; -+ out[13] = in[1]; -+ out[14] = in[6]; -+ out[15] = in[11]; -+} -+ -+ -+static void mix_column(u8 *in, u8 *out) -+{ -+ sint i; -+ u8 add1b[4]; -+ u8 add1bf7[4]; -+ u8 rotl[4]; -+ u8 swap_halfs[4]; -+ u8 andf7[4]; -+ u8 rotr[4]; -+ u8 temp[4]; -+ u8 tempb[4]; -+ for (i = 0 ; i < 4; i++) { -+ if ((in[i] & 0x80) == 0x80) -+ add1b[i] = 0x1b; -+ else -+ add1b[i] = 0x00; -+ } -+ -+ swap_halfs[0] = in[2]; /* Swap halfs */ -+ swap_halfs[1] = in[3]; -+ swap_halfs[2] = in[0]; -+ swap_halfs[3] = in[1]; -+ -+ rotl[0] = in[3]; /* Rotate left 8 bits */ -+ rotl[1] = in[0]; -+ rotl[2] = in[1]; -+ rotl[3] = in[2]; -+ -+ andf7[0] = in[0] & 0x7f; -+ andf7[1] = in[1] & 0x7f; -+ andf7[2] = in[2] & 0x7f; -+ andf7[3] = in[3] & 0x7f; -+ -+ for (i = 3; i > 0; i--) { /* logical shift left 1 bit */ -+ andf7[i] = andf7[i] << 1; -+ if ((andf7[i - 1] & 0x80) == 0x80) -+ andf7[i] = (andf7[i] | 0x01); -+ } -+ andf7[0] = andf7[0] << 1; -+ andf7[0] = andf7[0] & 0xfe; -+ -+ xor_32(add1b, andf7, add1bf7); -+ -+ xor_32(in, add1bf7, rotr); -+ -+ temp[0] = rotr[0]; /* Rotate right 8 bits */ -+ rotr[0] = rotr[1]; -+ rotr[1] = rotr[2]; -+ rotr[2] = rotr[3]; -+ rotr[3] = temp[0]; -+ -+ xor_32(add1bf7, rotr, temp); -+ xor_32(swap_halfs, rotl, tempb); -+ xor_32(temp, tempb, out); -+} -+ -+ -+static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext) -+{ -+ sint round; -+ sint i; -+ u8 intermediatea[16]; -+ u8 intermediateb[16]; -+ u8 round_key[16]; -+ for (i = 0; i < 16; i++) -+ round_key[i] = key[i]; -+ -+ for (round = 0; round < 11; round++) { -+ if (round == 0) { -+ xor_128(round_key, data, ciphertext); -+ next_key(round_key, round); -+ } else if (round == 10) { -+ byte_sub(ciphertext, intermediatea); -+ shift_row(intermediatea, intermediateb); -+ xor_128(intermediateb, round_key, ciphertext); -+ } else { /* 1 - 9 */ -+ byte_sub(ciphertext, intermediatea); -+ shift_row(intermediatea, intermediateb); -+ mix_column(&intermediateb[0], &intermediatea[0]); -+ mix_column(&intermediateb[4], &intermediatea[4]); -+ mix_column(&intermediateb[8], &intermediatea[8]); -+ mix_column(&intermediateb[12], &intermediatea[12]); -+ xor_128(intermediatea, round_key, ciphertext); -+ next_key(round_key, round); -+ } -+ } -+} -+ -+ -+/************************************************/ -+/* construct_mic_iv() */ -+/* Builds the MIC IV from header fields and PN */ -+/* Baron think the function is construct CCM */ -+/* nonce */ -+/************************************************/ -+static void construct_mic_iv( -+ u8 *mic_iv, -+ sint qc_exists, -+ sint a4_exists, -+ u8 *mpdu, -+ uint payload_length, -+ u8 *pn_vector, -+ uint frtype/* add for CONFIG_IEEE80211W, none 11w also can use */ -+) -+{ -+ sint i; -+ mic_iv[0] = 0x59; -+ if (qc_exists && a4_exists) -+ mic_iv[1] = mpdu[30] & 0x0f; /* QoS_TC */ -+ if (qc_exists && !a4_exists) -+ mic_iv[1] = mpdu[24] & 0x0f; /* mute bits 7-4 */ -+ if (!qc_exists) -+ mic_iv[1] = 0x00; -+#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) -+ /* 802.11w management frame should set management bit(4) */ -+ if (frtype == WIFI_MGT_TYPE) -+ mic_iv[1] |= BIT(4); -+#endif -+ for (i = 2; i < 8; i++) -+ mic_iv[i] = mpdu[i + 8]; /* mic_iv[2:7] = A2[0:5] = mpdu[10:15] */ -+#ifdef CONSISTENT_PN_ORDER -+ for (i = 8; i < 14; i++) -+ mic_iv[i] = pn_vector[i - 8]; /* mic_iv[8:13] = PN[0:5] */ -+#else -+ for (i = 8; i < 14; i++) -+ mic_iv[i] = pn_vector[13 - i]; /* mic_iv[8:13] = PN[5:0] */ -+#endif -+ mic_iv[14] = (unsigned char)(payload_length / 256); -+ mic_iv[15] = (unsigned char)(payload_length % 256); -+} -+ -+ -+/************************************************/ -+/* construct_mic_header1() */ -+/* Builds the first MIC header block from */ -+/* header fields. */ -+/* Build AAD SC,A1,A2 */ -+/************************************************/ -+static void construct_mic_header1( -+ u8 *mic_header1, -+ sint header_length, -+ u8 *mpdu, -+ uint frtype/* add for CONFIG_IEEE80211W, none 11w also can use */ -+) -+{ -+ mic_header1[0] = (u8)((header_length - 2) / 256); -+ mic_header1[1] = (u8)((header_length - 2) % 256); -+#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) -+ /* 802.11w management frame don't AND subtype bits 4,5,6 of frame control field */ -+ if (frtype == WIFI_MGT_TYPE) -+ mic_header1[2] = mpdu[0]; -+ else -+#endif -+ mic_header1[2] = mpdu[0] & 0xcf; /* Mute CF poll & CF ack bits */ -+ -+ mic_header1[3] = mpdu[1] & 0xc7; /* Mute retry, more data and pwr mgt bits */ -+ mic_header1[4] = mpdu[4]; /* A1 */ -+ mic_header1[5] = mpdu[5]; -+ mic_header1[6] = mpdu[6]; -+ mic_header1[7] = mpdu[7]; -+ mic_header1[8] = mpdu[8]; -+ mic_header1[9] = mpdu[9]; -+ mic_header1[10] = mpdu[10]; /* A2 */ -+ mic_header1[11] = mpdu[11]; -+ mic_header1[12] = mpdu[12]; -+ mic_header1[13] = mpdu[13]; -+ mic_header1[14] = mpdu[14]; -+ mic_header1[15] = mpdu[15]; -+} -+ -+ -+/************************************************/ -+/* construct_mic_header2() */ -+/* Builds the last MIC header block from */ -+/* header fields. */ -+/************************************************/ -+static void construct_mic_header2( -+ u8 *mic_header2, -+ u8 *mpdu, -+ sint a4_exists, -+ sint qc_exists -+) -+{ -+ sint i; -+ for (i = 0; i < 16; i++) -+ mic_header2[i] = 0x00; -+ -+ mic_header2[0] = mpdu[16]; /* A3 */ -+ mic_header2[1] = mpdu[17]; -+ mic_header2[2] = mpdu[18]; -+ mic_header2[3] = mpdu[19]; -+ mic_header2[4] = mpdu[20]; -+ mic_header2[5] = mpdu[21]; -+ -+ /* mic_header2[6] = mpdu[22] & 0xf0; SC */ -+ mic_header2[6] = 0x00; -+ mic_header2[7] = 0x00; /* mpdu[23]; */ -+ -+ -+ if (!qc_exists && a4_exists) { -+ for (i = 0; i < 6; i++) -+ mic_header2[8 + i] = mpdu[24 + i]; /* A4 */ -+ -+ } -+ -+ if (qc_exists && !a4_exists) { -+ mic_header2[8] = mpdu[24] & 0x0f; /* mute bits 15 - 4 */ -+ mic_header2[9] = mpdu[25] & 0x00; -+ } -+ -+ if (qc_exists && a4_exists) { -+ for (i = 0; i < 6; i++) -+ mic_header2[8 + i] = mpdu[24 + i]; /* A4 */ -+ -+ mic_header2[14] = mpdu[30] & 0x0f; -+ mic_header2[15] = mpdu[31] & 0x00; -+ } -+ -+} -+ -+ -+/************************************************/ -+/* construct_mic_header2() */ -+/* Builds the last MIC header block from */ -+/* header fields. */ -+/* Baron think the function is construct CCM */ -+/* nonce */ -+/************************************************/ -+static void construct_ctr_preload( -+ u8 *ctr_preload, -+ sint a4_exists, -+ sint qc_exists, -+ u8 *mpdu, -+ u8 *pn_vector, -+ sint c, -+ uint frtype /* add for CONFIG_IEEE80211W, none 11w also can use */ -+) -+{ -+ sint i = 0; -+ for (i = 0; i < 16; i++) -+ ctr_preload[i] = 0x00; -+ i = 0; -+ -+ ctr_preload[0] = 0x01; /* flag */ -+ if (qc_exists && a4_exists) -+ ctr_preload[1] = mpdu[30] & 0x0f; /* QoC_Control */ -+ if (qc_exists && !a4_exists) -+ ctr_preload[1] = mpdu[24] & 0x0f; -+#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) -+ /* 802.11w management frame should set management bit(4) */ -+ if (frtype == WIFI_MGT_TYPE) -+ ctr_preload[1] |= BIT(4); -+#endif -+ for (i = 2; i < 8; i++) -+ ctr_preload[i] = mpdu[i + 8]; /* ctr_preload[2:7] = A2[0:5] = mpdu[10:15] */ -+#ifdef CONSISTENT_PN_ORDER -+ for (i = 8; i < 14; i++) -+ ctr_preload[i] = pn_vector[i - 8]; /* ctr_preload[8:13] = PN[0:5] */ -+#else -+ for (i = 8; i < 14; i++) -+ ctr_preload[i] = pn_vector[13 - i]; /* ctr_preload[8:13] = PN[5:0] */ -+#endif -+ ctr_preload[14] = (unsigned char)(c / 256); /* Ctr */ -+ ctr_preload[15] = (unsigned char)(c % 256); -+} -+ -+ -+/************************************/ -+/* bitwise_xor() */ -+/* A 128 bit, bitwise exclusive or */ -+/************************************/ -+static void bitwise_xor(u8 *ina, u8 *inb, u8 *out) -+{ -+ sint i; -+ for (i = 0; i < 16; i++) -+ out[i] = ina[i] ^ inb[i]; -+} -+ -+ -+static sint aes_cipher(u8 *key, uint hdrlen, -+ u8 *pframe, uint plen) -+{ -+ /* static unsigned char message[MAX_MSG_SIZE]; */ -+ uint qc_exists, a4_exists, i, j, payload_remainder, -+ num_blocks, payload_index; -+ -+ u8 pn_vector[6]; -+ u8 mic_iv[16]; -+ u8 mic_header1[16]; -+ u8 mic_header2[16]; -+ u8 ctr_preload[16]; -+ -+ /* Intermediate Buffers */ -+ u8 chain_buffer[16]; -+ u8 aes_out[16]; -+ u8 padded_buffer[16]; -+ u8 mic[8]; -+ /* uint offset = 0; */ -+ uint frtype = GetFrameType(pframe); -+ uint frsubtype = get_frame_sub_type(pframe); -+ -+ frsubtype = frsubtype >> 4; -+ -+ -+ _rtw_memset((void *)mic_iv, 0, 16); -+ _rtw_memset((void *)mic_header1, 0, 16); -+ _rtw_memset((void *)mic_header2, 0, 16); -+ _rtw_memset((void *)ctr_preload, 0, 16); -+ _rtw_memset((void *)chain_buffer, 0, 16); -+ _rtw_memset((void *)aes_out, 0, 16); -+ _rtw_memset((void *)padded_buffer, 0, 16); -+ -+ if ((hdrlen == WLAN_HDR_A3_LEN) || (hdrlen == WLAN_HDR_A3_QOS_LEN)) -+ a4_exists = 0; -+ else -+ a4_exists = 1; -+ -+ if ( -+ ((frtype | frsubtype) == WIFI_DATA_CFACK) || -+ ((frtype | frsubtype) == WIFI_DATA_CFPOLL) || -+ ((frtype | frsubtype) == WIFI_DATA_CFACKPOLL)) { -+ qc_exists = 1; -+ if (hdrlen != WLAN_HDR_A3_QOS_LEN && hdrlen != WLAN_HDR_A4_QOS_LEN) -+ hdrlen += 2; -+ } -+ /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ else if ((frtype == WIFI_DATA) && -+ ((frsubtype == 0x08) || -+ (frsubtype == 0x09) || -+ (frsubtype == 0x0a) || -+ (frsubtype == 0x0b))) { -+ if (hdrlen != WLAN_HDR_A3_QOS_LEN && hdrlen != WLAN_HDR_A4_QOS_LEN) -+ hdrlen += 2; -+ qc_exists = 1; -+ } else -+ qc_exists = 0; -+ -+ pn_vector[0] = pframe[hdrlen]; -+ pn_vector[1] = pframe[hdrlen + 1]; -+ pn_vector[2] = pframe[hdrlen + 4]; -+ pn_vector[3] = pframe[hdrlen + 5]; -+ pn_vector[4] = pframe[hdrlen + 6]; -+ pn_vector[5] = pframe[hdrlen + 7]; -+ -+ construct_mic_iv( -+ mic_iv, -+ qc_exists, -+ a4_exists, -+ pframe, /* message, */ -+ plen, -+ pn_vector, -+ frtype /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ ); -+ -+ construct_mic_header1( -+ mic_header1, -+ hdrlen, -+ pframe, /* message */ -+ frtype /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ ); -+ construct_mic_header2( -+ mic_header2, -+ pframe, /* message, */ -+ a4_exists, -+ qc_exists -+ ); -+ -+ -+ payload_remainder = plen % 16; -+ num_blocks = plen / 16; -+ -+ /* Find start of payload */ -+ payload_index = (hdrlen + 8); -+ -+ /* Calculate MIC */ -+ aes128k128d(key, mic_iv, aes_out); -+ bitwise_xor(aes_out, mic_header1, chain_buffer); -+ aes128k128d(key, chain_buffer, aes_out); -+ bitwise_xor(aes_out, mic_header2, chain_buffer); -+ aes128k128d(key, chain_buffer, aes_out); -+ -+ for (i = 0; i < num_blocks; i++) { -+ bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);/* bitwise_xor(aes_out, &message[payload_index], chain_buffer); */ -+ -+ payload_index += 16; -+ aes128k128d(key, chain_buffer, aes_out); -+ } -+ -+ /* Add on the final payload block if it needs padding */ -+ if (payload_remainder > 0) { -+ for (j = 0; j < 16; j++) -+ padded_buffer[j] = 0x00; -+ for (j = 0; j < payload_remainder; j++) { -+ padded_buffer[j] = pframe[payload_index++];/* padded_buffer[j] = message[payload_index++]; */ -+ } -+ bitwise_xor(aes_out, padded_buffer, chain_buffer); -+ aes128k128d(key, chain_buffer, aes_out); -+ -+ } -+ -+ for (j = 0 ; j < 8; j++) -+ mic[j] = aes_out[j]; -+ -+ /* Insert MIC into payload */ -+ for (j = 0; j < 8; j++) -+ pframe[payload_index + j] = mic[j]; /* message[payload_index+j] = mic[j]; */ -+ -+ payload_index = hdrlen + 8; -+ for (i = 0; i < num_blocks; i++) { -+ construct_ctr_preload( -+ ctr_preload, -+ a4_exists, -+ qc_exists, -+ pframe, /* message, */ -+ pn_vector, -+ i + 1, -+ frtype); /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ aes128k128d(key, ctr_preload, aes_out); -+ bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);/* bitwise_xor(aes_out, &message[payload_index], chain_buffer); */ -+ for (j = 0; j < 16; j++) -+ pframe[payload_index++] = chain_buffer[j];/* for (j=0; j<16;j++) message[payload_index++] = chain_buffer[j]; */ -+ } -+ -+ if (payload_remainder > 0) { /* If there is a short final block, then pad it,*/ -+ /* encrypt it and copy the unpadded part back */ -+ construct_ctr_preload( -+ ctr_preload, -+ a4_exists, -+ qc_exists, -+ pframe, /* message, */ -+ pn_vector, -+ num_blocks + 1, -+ frtype); /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ -+ for (j = 0; j < 16; j++) -+ padded_buffer[j] = 0x00; -+ for (j = 0; j < payload_remainder; j++) { -+ padded_buffer[j] = pframe[payload_index + j]; /* padded_buffer[j] = message[payload_index+j]; */ -+ } -+ aes128k128d(key, ctr_preload, aes_out); -+ bitwise_xor(aes_out, padded_buffer, chain_buffer); -+ for (j = 0; j < payload_remainder; j++) -+ pframe[payload_index++] = chain_buffer[j];/* for (j=0; jattrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ sint curfragnum, plen; -+ u32 prwskeylen; -+ u8 *pframe; -+ u8 *prwskey; -+ u8 hw_hdr_offset = 0; -+ -+ u32 res = _SUCCESS; -+ -+ if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL) -+ return _FAIL; -+ -+#ifdef CONFIG_USB_TX_AGGREGATION -+ hw_hdr_offset = TXDESC_SIZE + -+ (((struct xmit_frame *)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); -+#else -+#ifdef CONFIG_TX_EARLY_MODE -+ hw_hdr_offset = TXDESC_OFFSET + EARLY_MODE_INFO_SIZE; -+#else -+ hw_hdr_offset = TXDESC_OFFSET; -+#endif -+#endif -+ -+ pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset; -+ -+ /* start to encrypt each fragment */ -+ if ((pattrib->encrypt == _AES_) || -+ (pattrib->encrypt == _CCMP_256_)) { -+ -+ if (IS_MCAST(pattrib->ra)) -+ prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; -+ else { -+ prwskey = pattrib->dot118021x_UncstKey.skey; -+ } -+ -+#ifdef CONFIG_TDLS -+ { -+ /* Swencryption */ -+ struct sta_info *ptdls_sta; -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, &pattrib->dst[0]); -+ if ((ptdls_sta != NULL) && (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) { -+ RTW_INFO("[%s] for tdls link\n", __FUNCTION__); -+ prwskey = &ptdls_sta->tpk.tk[0]; -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ -+ prwskeylen = (pattrib->encrypt == _CCMP_256_) ? 32 : 16; -+ -+ for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) { -+ -+ if ((curfragnum + 1) == pattrib->nr_frags) { /* the last fragment */ -+ plen = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len; -+ -+ _rtw_ccmp_encrypt(prwskey, prwskeylen, pattrib->hdrlen, pframe, plen); -+ } else { -+ plen = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len; -+ -+ _rtw_ccmp_encrypt(prwskey, prwskeylen, pattrib->hdrlen, pframe, plen); -+ pframe += pxmitpriv->frag_len; -+ pframe = (u8 *)RND4((SIZE_PTR)(pframe)); -+ -+ } -+ } -+ -+ AES_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra); -+ -+ } -+ -+ -+ -+ return res; -+} -+#else -+u32 rtw_aes_encrypt(_adapter *padapter, u8 *pxmitframe) -+{ -+ /* exclude ICV */ -+ -+ -+ /*static*/ -+ /* unsigned char message[MAX_MSG_SIZE]; */ -+ -+ /* Intermediate Buffers */ -+ sint curfragnum, length; -+ u32 prwskeylen; -+ u8 *pframe, *prwskey; /* , *payload,*iv */ -+ u8 hw_hdr_offset = 0; -+ /* struct sta_info *stainfo=NULL; */ -+ struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ /* uint offset = 0; */ -+ u32 res = _SUCCESS; -+ -+ if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL) -+ return _FAIL; -+ -+#ifdef CONFIG_USB_TX_AGGREGATION -+ hw_hdr_offset = TXDESC_SIZE + -+ (((struct xmit_frame *)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); -+#else -+#ifdef CONFIG_TX_EARLY_MODE -+ hw_hdr_offset = TXDESC_OFFSET + EARLY_MODE_INFO_SIZE; -+#else -+ hw_hdr_offset = TXDESC_OFFSET; -+#endif -+#endif -+ -+ pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset; -+ -+ /* 4 start to encrypt each fragment */ -+ if ((pattrib->encrypt == _AES_)) { -+ /* -+ if(pattrib->psta) -+ { -+ stainfo = pattrib->psta; -+ } -+ else -+ { -+ RTW_INFO("%s, call rtw_get_stainfo()\n", __func__); -+ stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); -+ } -+ */ -+ /* if (stainfo!=NULL) */ -+ { -+ /* -+ if(!(stainfo->state &WIFI_ASOC_STATE)) -+ { -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, stainfo->state); -+ return _FAIL; -+ } -+ */ -+ -+ if (IS_MCAST(pattrib->ra)) -+ prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; -+ else { -+ /* prwskey=&stainfo->dot118021x_UncstKey.skey[0]; */ -+ prwskey = pattrib->dot118021x_UncstKey.skey; -+ } -+ -+#ifdef CONFIG_TDLS -+ { -+ /* Swencryption */ -+ struct sta_info *ptdls_sta; -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv , &pattrib->dst[0]); -+ if ((ptdls_sta != NULL) && (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) { -+ RTW_INFO("[%s] for tdls link\n", __FUNCTION__); -+ prwskey = &ptdls_sta->tpk.tk[0]; -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ -+ prwskeylen = 16; -+ -+ for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) { -+ -+ if ((curfragnum + 1) == pattrib->nr_frags) { /* 4 the last fragment */ -+ length = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len; -+ -+ aes_cipher(prwskey, pattrib->hdrlen, pframe, length); -+ } else { -+ length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len ; -+ -+ aes_cipher(prwskey, pattrib->hdrlen, pframe, length); -+ pframe += pxmitpriv->frag_len; -+ pframe = (u8 *)RND4((SIZE_PTR)(pframe)); -+ -+ } -+ } -+ -+ AES_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra); -+ } -+ /* -+ else{ -+ RTW_INFO("%s, psta==NUL\n", __func__); -+ res=_FAIL; -+ } -+ */ -+ } -+ -+ -+ -+ return res; -+} -+#endif -+ -+#if (NEW_CRYPTO == 0) -+static sint aes_decipher(u8 *key, uint hdrlen, -+ u8 *pframe, uint plen) -+{ -+ static u8 message[MAX_MSG_SIZE]; -+ uint qc_exists, a4_exists, i, j, payload_remainder, -+ num_blocks, payload_index; -+ sint res = _SUCCESS; -+ u8 pn_vector[6]; -+ u8 mic_iv[16]; -+ u8 mic_header1[16]; -+ u8 mic_header2[16]; -+ u8 ctr_preload[16]; -+ -+ /* Intermediate Buffers */ -+ u8 chain_buffer[16]; -+ u8 aes_out[16]; -+ u8 padded_buffer[16]; -+ u8 mic[8]; -+ -+ -+ /* uint offset = 0; */ -+ uint frtype = GetFrameType(pframe); -+ uint frsubtype = get_frame_sub_type(pframe); -+ frsubtype = frsubtype >> 4; -+ -+ -+ _rtw_memset((void *)mic_iv, 0, 16); -+ _rtw_memset((void *)mic_header1, 0, 16); -+ _rtw_memset((void *)mic_header2, 0, 16); -+ _rtw_memset((void *)ctr_preload, 0, 16); -+ _rtw_memset((void *)chain_buffer, 0, 16); -+ _rtw_memset((void *)aes_out, 0, 16); -+ _rtw_memset((void *)padded_buffer, 0, 16); -+ -+ /* start to decrypt the payload */ -+ -+ num_blocks = (plen - 8) / 16; /* (plen including LLC, payload_length and mic ) */ -+ -+ payload_remainder = (plen - 8) % 16; -+ -+ pn_vector[0] = pframe[hdrlen]; -+ pn_vector[1] = pframe[hdrlen + 1]; -+ pn_vector[2] = pframe[hdrlen + 4]; -+ pn_vector[3] = pframe[hdrlen + 5]; -+ pn_vector[4] = pframe[hdrlen + 6]; -+ pn_vector[5] = pframe[hdrlen + 7]; -+ -+ if ((hdrlen == WLAN_HDR_A3_LEN) || (hdrlen == WLAN_HDR_A3_QOS_LEN)) -+ a4_exists = 0; -+ else -+ a4_exists = 1; -+ -+ if ( -+ ((frtype | frsubtype) == WIFI_DATA_CFACK) || -+ ((frtype | frsubtype) == WIFI_DATA_CFPOLL) || -+ ((frtype | frsubtype) == WIFI_DATA_CFACKPOLL)) { -+ qc_exists = 1; -+ if (hdrlen != WLAN_HDR_A3_QOS_LEN && hdrlen != WLAN_HDR_A4_QOS_LEN) -+ hdrlen += 2; -+ } /* only for data packet . add for CONFIG_IEEE80211W, none 11w also can use */ -+ else if ((frtype == WIFI_DATA) && -+ ((frsubtype == 0x08) || -+ (frsubtype == 0x09) || -+ (frsubtype == 0x0a) || -+ (frsubtype == 0x0b))) { -+ if (hdrlen != WLAN_HDR_A3_QOS_LEN && hdrlen != WLAN_HDR_A4_QOS_LEN) -+ hdrlen += 2; -+ qc_exists = 1; -+ } else -+ qc_exists = 0; -+ -+ -+ /* now, decrypt pframe with hdrlen offset and plen long */ -+ -+ payload_index = hdrlen + 8; /* 8 is for extiv */ -+ -+ for (i = 0; i < num_blocks; i++) { -+ construct_ctr_preload( -+ ctr_preload, -+ a4_exists, -+ qc_exists, -+ pframe, -+ pn_vector, -+ i + 1, -+ frtype /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ ); -+ -+ aes128k128d(key, ctr_preload, aes_out); -+ bitwise_xor(aes_out, &pframe[payload_index], chain_buffer); -+ -+ for (j = 0; j < 16; j++) -+ pframe[payload_index++] = chain_buffer[j]; -+ } -+ -+ if (payload_remainder > 0) { /* If there is a short final block, then pad it,*/ -+ /* encrypt it and copy the unpadded part back */ -+ construct_ctr_preload( -+ ctr_preload, -+ a4_exists, -+ qc_exists, -+ pframe, -+ pn_vector, -+ num_blocks + 1, -+ frtype /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ ); -+ -+ for (j = 0; j < 16; j++) -+ padded_buffer[j] = 0x00; -+ for (j = 0; j < payload_remainder; j++) -+ padded_buffer[j] = pframe[payload_index + j]; -+ aes128k128d(key, ctr_preload, aes_out); -+ bitwise_xor(aes_out, padded_buffer, chain_buffer); -+ for (j = 0; j < payload_remainder; j++) -+ pframe[payload_index++] = chain_buffer[j]; -+ } -+ -+ /* start to calculate the mic */ -+ if ((hdrlen + plen + 8) <= MAX_MSG_SIZE) -+ _rtw_memcpy((void *)message, pframe, (hdrlen + plen + 8)); /* 8 is for ext iv len */ -+ -+ -+ pn_vector[0] = pframe[hdrlen]; -+ pn_vector[1] = pframe[hdrlen + 1]; -+ pn_vector[2] = pframe[hdrlen + 4]; -+ pn_vector[3] = pframe[hdrlen + 5]; -+ pn_vector[4] = pframe[hdrlen + 6]; -+ pn_vector[5] = pframe[hdrlen + 7]; -+ -+ -+ -+ construct_mic_iv( -+ mic_iv, -+ qc_exists, -+ a4_exists, -+ message, -+ plen - 8, -+ pn_vector, -+ frtype /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ ); -+ -+ construct_mic_header1( -+ mic_header1, -+ hdrlen, -+ message, -+ frtype /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ ); -+ construct_mic_header2( -+ mic_header2, -+ message, -+ a4_exists, -+ qc_exists -+ ); -+ -+ -+ payload_remainder = (plen - 8) % 16; -+ num_blocks = (plen - 8) / 16; -+ -+ /* Find start of payload */ -+ payload_index = (hdrlen + 8); -+ -+ /* Calculate MIC */ -+ aes128k128d(key, mic_iv, aes_out); -+ bitwise_xor(aes_out, mic_header1, chain_buffer); -+ aes128k128d(key, chain_buffer, aes_out); -+ bitwise_xor(aes_out, mic_header2, chain_buffer); -+ aes128k128d(key, chain_buffer, aes_out); -+ -+ for (i = 0; i < num_blocks; i++) { -+ bitwise_xor(aes_out, &message[payload_index], chain_buffer); -+ -+ payload_index += 16; -+ aes128k128d(key, chain_buffer, aes_out); -+ } -+ -+ /* Add on the final payload block if it needs padding */ -+ if (payload_remainder > 0) { -+ for (j = 0; j < 16; j++) -+ padded_buffer[j] = 0x00; -+ for (j = 0; j < payload_remainder; j++) -+ padded_buffer[j] = message[payload_index++]; -+ bitwise_xor(aes_out, padded_buffer, chain_buffer); -+ aes128k128d(key, chain_buffer, aes_out); -+ -+ } -+ -+ for (j = 0 ; j < 8; j++) -+ mic[j] = aes_out[j]; -+ -+ /* Insert MIC into payload */ -+ for (j = 0; j < 8; j++) -+ message[payload_index + j] = mic[j]; -+ -+ payload_index = hdrlen + 8; -+ for (i = 0; i < num_blocks; i++) { -+ construct_ctr_preload( -+ ctr_preload, -+ a4_exists, -+ qc_exists, -+ message, -+ pn_vector, -+ i + 1, -+ frtype); /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ aes128k128d(key, ctr_preload, aes_out); -+ bitwise_xor(aes_out, &message[payload_index], chain_buffer); -+ for (j = 0; j < 16; j++) -+ message[payload_index++] = chain_buffer[j]; -+ } -+ -+ if (payload_remainder > 0) { /* If there is a short final block, then pad it,*/ -+ /* encrypt it and copy the unpadded part back */ -+ construct_ctr_preload( -+ ctr_preload, -+ a4_exists, -+ qc_exists, -+ message, -+ pn_vector, -+ num_blocks + 1, -+ frtype); /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ -+ for (j = 0; j < 16; j++) -+ padded_buffer[j] = 0x00; -+ for (j = 0; j < payload_remainder; j++) -+ padded_buffer[j] = message[payload_index + j]; -+ aes128k128d(key, ctr_preload, aes_out); -+ bitwise_xor(aes_out, padded_buffer, chain_buffer); -+ for (j = 0; j < payload_remainder; j++) -+ message[payload_index++] = chain_buffer[j]; -+ } -+ -+ /* Encrypt the MIC */ -+ construct_ctr_preload( -+ ctr_preload, -+ a4_exists, -+ qc_exists, -+ message, -+ pn_vector, -+ 0, -+ frtype); /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ -+ for (j = 0; j < 16; j++) -+ padded_buffer[j] = 0x00; -+ for (j = 0; j < 8; j++) -+ padded_buffer[j] = message[j + hdrlen + 8 + plen - 8]; -+ -+ aes128k128d(key, ctr_preload, aes_out); -+ bitwise_xor(aes_out, padded_buffer, chain_buffer); -+ for (j = 0; j < 8; j++) -+ message[payload_index++] = chain_buffer[j]; -+ -+ /* compare the mic */ -+ for (i = 0; i < 8; i++) { -+ if (pframe[hdrlen + 8 + plen - 8 + i] != message[hdrlen + 8 + plen - 8 + i]) { -+ RTW_INFO("aes_decipher:mic check error mic[%d]: pframe(%x) != message(%x)\n", -+ i, pframe[hdrlen + 8 + plen - 8 + i], message[hdrlen + 8 + plen - 8 + i]); -+ res = _FAIL; -+ } -+ } -+ return res; -+} -+#endif /* (NEW_CRYPTO == 0) */ -+ -+#if NEW_CRYPTO -+u32 rtw_aes_decrypt(_adapter *padapter, u8 *precvframe) -+{ -+ struct sta_info *stainfo; -+ struct rx_pkt_attrib *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ u8 *pframe; -+ u8 *prwskey; -+ u32 res = _SUCCESS; -+ -+ pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data; -+ /* start to encrypt each fragment */ -+ if ((prxattrib->encrypt == _AES_) || -+ (prxattrib->encrypt == _CCMP_256_)) { -+ -+ stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]); -+ if (stainfo != NULL) { -+ -+ if (IS_MCAST(prxattrib->ra)) { -+ static systime start = 0; -+ static u32 no_gkey_bc_cnt = 0; -+ static u32 no_gkey_mc_cnt = 0; -+ -+ if ((!MLME_IS_MESH(padapter) && psecuritypriv->binstallGrpkey == _FALSE) -+ #ifdef CONFIG_RTW_MESH -+ || !(stainfo->gtk_bmp | BIT(prxattrib->key_index)) -+ #endif -+ ) { -+ res = _FAIL; -+ -+ if (start == 0) -+ start = rtw_get_current_time(); -+ -+ if (is_broadcast_mac_addr(prxattrib->ra)) -+ no_gkey_bc_cnt++; -+ else -+ no_gkey_mc_cnt++; -+ -+ if (rtw_get_passing_time_ms(start) > 1000) { -+ if (no_gkey_bc_cnt || no_gkey_mc_cnt) { -+ RTW_PRINT(FUNC_ADPT_FMT" no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", -+ FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); -+ } -+ start = rtw_get_current_time(); -+ no_gkey_bc_cnt = 0; -+ no_gkey_mc_cnt = 0; -+ } -+ -+ goto exit; -+ } -+ -+ if (no_gkey_bc_cnt || no_gkey_mc_cnt) { -+ RTW_PRINT(FUNC_ADPT_FMT" gkey installed. no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", -+ FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); -+ } -+ start = 0; -+ no_gkey_bc_cnt = 0; -+ no_gkey_mc_cnt = 0; -+ -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ /* TODO: multiple GK? */ -+ prwskey = &stainfo->gtk.skey[0]; -+ } else -+ #endif -+ { -+ prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; -+ if (psecuritypriv->dot118021XGrpKeyid != prxattrib->key_index) { -+ RTW_DBG("not match packet_index=%d, install_index=%d\n" -+ , prxattrib->key_index, psecuritypriv->dot118021XGrpKeyid); -+ res = _FAIL; -+ goto exit; -+ } -+ } -+ } else -+ prwskey = &stainfo->dot118021x_UncstKey.skey[0]; -+ -+ res = _rtw_ccmp_decrypt(prwskey, -+ prxattrib->encrypt == _CCMP_256_ ? 32 : 16, -+ prxattrib->hdrlen, pframe, -+ ((union recv_frame *)precvframe)->u.hdr.len); -+ -+ AES_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); -+ } else { -+ res = _FAIL; -+ } -+ -+ } -+exit: -+ return res; -+} -+#else -+u32 rtw_aes_decrypt(_adapter *padapter, u8 *precvframe) -+{ -+ /* exclude ICV */ -+ -+ -+ /*static*/ -+ /* unsigned char message[MAX_MSG_SIZE]; */ -+ -+ -+ /* Intermediate Buffers */ -+ -+ -+ sint length; -+ u8 *pframe, *prwskey; /* , *payload,*iv */ -+ struct sta_info *stainfo; -+ struct rx_pkt_attrib *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ /* struct recv_priv *precvpriv=&padapter->recvpriv; */ -+ u32 res = _SUCCESS; -+ pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data; -+ /* 4 start to encrypt each fragment */ -+ if ((prxattrib->encrypt == _AES_)) { -+ -+ stainfo = rtw_get_stainfo(&padapter->stapriv , &prxattrib->ta[0]); -+ if (stainfo != NULL) { -+ -+ if (IS_MCAST(prxattrib->ra)) { -+ static systime start = 0; -+ static u32 no_gkey_bc_cnt = 0; -+ static u32 no_gkey_mc_cnt = 0; -+ -+ /* RTW_INFO("rx bc/mc packets, to perform sw rtw_aes_decrypt\n"); */ -+ /* prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; */ -+ if ((!MLME_IS_MESH(padapter) && psecuritypriv->binstallGrpkey == _FALSE) -+ #ifdef CONFIG_RTW_MESH -+ || !(stainfo->gtk_bmp | BIT(prxattrib->key_index)) -+ #endif -+ ) { -+ res = _FAIL; -+ -+ if (start == 0) -+ start = rtw_get_current_time(); -+ -+ if (is_broadcast_mac_addr(prxattrib->ra)) -+ no_gkey_bc_cnt++; -+ else -+ no_gkey_mc_cnt++; -+ -+ if (rtw_get_passing_time_ms(start) > 1000) { -+ if (no_gkey_bc_cnt || no_gkey_mc_cnt) { -+ RTW_PRINT(FUNC_ADPT_FMT" no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", -+ FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); -+ } -+ start = rtw_get_current_time(); -+ no_gkey_bc_cnt = 0; -+ no_gkey_mc_cnt = 0; -+ } -+ -+ goto exit; -+ } -+ -+ if (no_gkey_bc_cnt || no_gkey_mc_cnt) { -+ RTW_PRINT(FUNC_ADPT_FMT" gkey installed. no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", -+ FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); -+ } -+ start = 0; -+ no_gkey_bc_cnt = 0; -+ no_gkey_mc_cnt = 0; -+ -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ /* TODO: multiple GK? */ -+ prwskey = &stainfo->gtk.skey[0]; -+ } else -+ #endif -+ { -+ prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; -+ if (psecuritypriv->dot118021XGrpKeyid != prxattrib->key_index) { -+ RTW_DBG("not match packet_index=%d, install_index=%d\n" -+ , prxattrib->key_index, psecuritypriv->dot118021XGrpKeyid); -+ res = _FAIL; -+ goto exit; -+ } -+ } -+ } else -+ prwskey = &stainfo->dot118021x_UncstKey.skey[0]; -+ -+ length = ((union recv_frame *)precvframe)->u.hdr.len - prxattrib->hdrlen - prxattrib->iv_len; -+#if 0 -+ /* add for CONFIG_IEEE80211W, debug */ -+ if (0) -+ printk("@@@@@@@@@@@@@@@@@@ length=%d, prxattrib->hdrlen=%d, prxattrib->pkt_len=%d\n" -+ , length, prxattrib->hdrlen, prxattrib->pkt_len); -+ if (0) { -+ int no; -+ /* test print PSK */ -+ printk("PSK key below:\n"); -+ for (no = 0; no < 16; no++) -+ printk(" %02x ", prwskey[no]); -+ printk("\n"); -+ } -+ if (0) { -+ int no; -+ /* test print PSK */ -+ printk("frame:\n"); -+ for (no = 0; no < prxattrib->pkt_len; no++) -+ printk(" %02x ", pframe[no]); -+ printk("\n"); -+ } -+#endif -+ -+ res = aes_decipher(prwskey, prxattrib->hdrlen, pframe, length); -+ -+ AES_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); -+ } else { -+ res = _FAIL; -+ } -+ -+ } -+exit: -+ return res; -+} -+#endif -+ -+#ifdef CONFIG_RTW_MESH_AEK -+/* for AES-SIV, wrapper to ase_siv_encrypt and aes_siv_decrypt */ -+int rtw_aes_siv_encrypt(const u8 *key, size_t key_len, const u8 *pw, -+ size_t pwlen, size_t num_elem, -+ const u8 *addr[], const size_t *len, u8 *out) -+{ -+ return _aes_siv_encrypt(key, key_len, pw, pwlen, -+ num_elem, addr, len, out); -+} -+ -+int rtw_aes_siv_decrypt(const u8 *key, size_t key_len, const u8 *iv_crypt, size_t iv_c_len, -+ size_t num_elem, const u8 *addr[], const size_t *len, u8 *out) -+{ -+ return _aes_siv_decrypt(key, key_len, iv_crypt, -+ iv_c_len, num_elem, addr, len, out); -+} -+#endif /* CONFIG_RTW_MESH_AEK */ -+ -+#ifdef CONFIG_TDLS -+void wpa_tdls_generate_tpk(_adapter *padapter, void *sta) -+{ -+ struct sta_info *psta = (struct sta_info *)sta; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ _tdls_generate_tpk(psta, adapter_mac_addr(padapter), get_bssid(pmlmepriv)); -+} -+ -+/** -+ * wpa_tdls_ftie_mic - Calculate TDLS FTIE MIC -+ * @kck: TPK-KCK -+ * @lnkid: Pointer to the beginning of Link Identifier IE -+ * @rsnie: Pointer to the beginning of RSN IE used for handshake -+ * @timeoutie: Pointer to the beginning of Timeout IE used for handshake -+ * @ftie: Pointer to the beginning of FT IE -+ * @mic: Pointer for writing MIC -+ * -+ * Calculate MIC for TDLS frame. -+ */ -+int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, -+ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie, -+ u8 *mic) -+{ -+ u8 *buf, *pos; -+ struct wpa_tdls_ftie *_ftie; -+ struct wpa_tdls_lnkid *_lnkid; -+ int ret; -+ int len = 2 * ETH_ALEN + 1 + 2 + lnkid[1] + 2 + rsnie[1] + -+ 2 + timeoutie[1] + 2 + ftie[1]; -+ buf = rtw_zmalloc(len); -+ if (!buf) { -+ RTW_INFO("TDLS: No memory for MIC calculation\n"); -+ return -1; -+ } -+ -+ pos = buf; -+ _lnkid = (struct wpa_tdls_lnkid *) lnkid; -+ /* 1) TDLS initiator STA MAC address */ -+ _rtw_memcpy(pos, _lnkid->init_sta, ETH_ALEN); -+ pos += ETH_ALEN; -+ /* 2) TDLS responder STA MAC address */ -+ _rtw_memcpy(pos, _lnkid->resp_sta, ETH_ALEN); -+ pos += ETH_ALEN; -+ /* 3) Transaction Sequence number */ -+ *pos++ = trans_seq; -+ /* 4) Link Identifier IE */ -+ _rtw_memcpy(pos, lnkid, 2 + lnkid[1]); -+ pos += 2 + lnkid[1]; -+ /* 5) RSN IE */ -+ _rtw_memcpy(pos, rsnie, 2 + rsnie[1]); -+ pos += 2 + rsnie[1]; -+ /* 6) Timeout Interval IE */ -+ _rtw_memcpy(pos, timeoutie, 2 + timeoutie[1]); -+ pos += 2 + timeoutie[1]; -+ /* 7) FTIE, with the MIC field of the FTIE set to 0 */ -+ _rtw_memcpy(pos, ftie, 2 + ftie[1]); -+ _ftie = (struct wpa_tdls_ftie *) pos; -+ _rtw_memset(_ftie->mic, 0, TDLS_MIC_LEN); -+ pos += 2 + ftie[1]; -+ -+ /* ret = omac1_aes_128(kck, buf, pos - buf, mic); */ -+ ret = _bip_ccmp_protect(kck, 16, buf, pos - buf, mic); -+ rtw_mfree(buf, len); -+ return ret; -+ -+} -+ -+/** -+ * wpa_tdls_teardown_ftie_mic - Calculate TDLS TEARDOWN FTIE MIC -+ * @kck: TPK-KCK -+ * @lnkid: Pointer to the beginning of Link Identifier IE -+ * @reason: Reason code of TDLS Teardown -+ * @dialog_token: Dialog token that was used in the MIC calculation for TPK Handshake Message 3 -+ * @trans_seq: Transaction Sequence number (1 octet) which shall be set to the value 4 -+ * @ftie: Pointer to the beginning of FT IE -+ * @mic: Pointer for writing MIC -+ * -+ * Calculate MIC for TDLS TEARDOWN frame according to Section 10.22.5 in IEEE 802.11 - 2012. -+ */ -+int wpa_tdls_teardown_ftie_mic(u8 *kck, u8 *lnkid, u16 reason, -+ u8 dialog_token, u8 trans_seq, u8 *ftie, u8 *mic) -+{ -+ u8 *buf, *pos; -+ struct wpa_tdls_ftie *_ftie; -+ int ret; -+ int len = 2 + lnkid[1] + 2 + 1 + 1 + 2 + ftie[1]; -+ -+ buf = rtw_zmalloc(len); -+ if (!buf) { -+ RTW_INFO("TDLS: No memory for MIC calculation\n"); -+ return -1; -+ } -+ -+ pos = buf; -+ /* 1) Link Identifier IE */ -+ _rtw_memcpy(pos, lnkid, 2 + lnkid[1]); -+ pos += 2 + lnkid[1]; -+ /* 2) Reason Code */ -+ _rtw_memcpy(pos, (u8 *)&reason, 2); -+ pos += 2; -+ /* 3) Dialog Token */ -+ *pos++ = dialog_token; -+ /* 4) Transaction Sequence number */ -+ *pos++ = trans_seq; -+ /* 5) FTIE, with the MIC field of the FTIE set to 0 */ -+ _rtw_memcpy(pos, ftie, 2 + ftie[1]); -+ _ftie = (struct wpa_tdls_ftie *) pos; -+ _rtw_memset(_ftie->mic, 0, TDLS_MIC_LEN); -+ pos += 2 + ftie[1]; -+ -+ /* ret = omac1_aes_128(kck, buf, pos - buf, mic); */ -+ ret = _bip_ccmp_protect(kck, 16, buf, pos - buf, mic); -+ rtw_mfree(buf, len); -+ return ret; -+ -+} -+ -+int tdls_verify_mic(u8 *kck, u8 trans_seq, -+ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie) -+{ -+ u8 *buf, *pos; -+ int len; -+ u8 mic[16]; -+ int ret; -+ u8 *rx_ftie, *tmp_ftie; -+ -+ if (lnkid == NULL || rsnie == NULL || -+ timeoutie == NULL || ftie == NULL) -+ return _FAIL; -+ -+ len = 2 * ETH_ALEN + 1 + 2 + 18 + 2 + *(rsnie + 1) + 2 + *(timeoutie + 1) + 2 + *(ftie + 1); -+ -+ buf = rtw_zmalloc(len); -+ if (buf == NULL) -+ return _FAIL; -+ -+ pos = buf; -+ /* 1) TDLS initiator STA MAC address */ -+ _rtw_memcpy(pos, lnkid + ETH_ALEN + 2, ETH_ALEN); -+ pos += ETH_ALEN; -+ /* 2) TDLS responder STA MAC address */ -+ _rtw_memcpy(pos, lnkid + 2 * ETH_ALEN + 2, ETH_ALEN); -+ pos += ETH_ALEN; -+ /* 3) Transaction Sequence number */ -+ *pos++ = trans_seq; -+ /* 4) Link Identifier IE */ -+ _rtw_memcpy(pos, lnkid, 2 + 18); -+ pos += 2 + 18; -+ /* 5) RSN IE */ -+ _rtw_memcpy(pos, rsnie, 2 + *(rsnie + 1)); -+ pos += 2 + *(rsnie + 1); -+ /* 6) Timeout Interval IE */ -+ _rtw_memcpy(pos, timeoutie, 2 + *(timeoutie + 1)); -+ pos += 2 + *(timeoutie + 1); -+ /* 7) FTIE, with the MIC field of the FTIE set to 0 */ -+ _rtw_memcpy(pos, ftie, 2 + *(ftie + 1)); -+ pos += 2; -+ tmp_ftie = (u8 *)(pos + 2); -+ _rtw_memset(tmp_ftie, 0, 16); -+ pos += *(ftie + 1); -+ -+ /* ret = omac1_aes_128(kck, buf, pos - buf, mic); */ -+ ret = _bip_ccmp_protect(kck, 16, buf, pos - buf, mic); -+ rtw_mfree(buf, len); -+ if (ret == _FAIL) -+ return _FAIL; -+ rx_ftie = ftie + 4; -+ -+ if (_rtw_memcmp2(mic, rx_ftie, 16) == 0) { -+ /* Valid MIC */ -+ return _SUCCESS; -+ } -+ -+ /* Invalid MIC */ -+ RTW_INFO("[%s] Invalid MIC\n", __FUNCTION__); -+ return _FAIL; -+ -+} -+#endif /* CONFIG_TDLS */ -+ -+/* Restore HW wep key setting according to key_mask */ -+void rtw_sec_restore_wep_key(_adapter *adapter) -+{ -+ struct security_priv *securitypriv = &(adapter->securitypriv); -+ sint keyid; -+ -+ if ((_WEP40_ == securitypriv->dot11PrivacyAlgrthm) || (_WEP104_ == securitypriv->dot11PrivacyAlgrthm)) { -+ for (keyid = 0; keyid < 4; keyid++) { -+ if (securitypriv->key_mask & BIT(keyid)) { -+ if (keyid == securitypriv->dot11PrivacyKeyIndex) -+ rtw_set_key(adapter, securitypriv, keyid, 1, _FALSE); -+ else -+ rtw_set_key(adapter, securitypriv, keyid, 0, _FALSE); -+ } -+ } -+ } -+} -+ -+u8 rtw_handle_tkip_countermeasure(_adapter *adapter, const char *caller) -+{ -+ struct security_priv *securitypriv = &(adapter->securitypriv); -+ u8 status = _SUCCESS; -+ -+ if (securitypriv->btkip_countermeasure == _TRUE) { -+ u32 passing_ms = rtw_get_passing_time_ms(securitypriv->btkip_countermeasure_time); -+ if (passing_ms > 60 * 1000) { -+ RTW_PRINT("%s("ADPT_FMT") countermeasure time:%ds > 60s\n", -+ caller, ADPT_ARG(adapter), passing_ms / 1000); -+ securitypriv->btkip_countermeasure = _FALSE; -+ securitypriv->btkip_countermeasure_time = 0; -+ } else { -+ RTW_PRINT("%s("ADPT_FMT") countermeasure time:%ds < 60s\n", -+ caller, ADPT_ARG(adapter), passing_ms / 1000); -+ status = _FAIL; -+ } -+ } -+ -+ return status; -+} -+ -+#ifdef CONFIG_WOWLAN -+u16 rtw_cal_crc16(u8 data, u16 crc) -+{ -+ u8 shift_in, data_bit; -+ u8 crc_bit4, crc_bit11, crc_bit15; -+ u16 crc_result; -+ int index; -+ -+ for (index = 0; index < 8; index++) { -+ crc_bit15 = ((crc & BIT15) ? 1 : 0); -+ data_bit = (data & (BIT0 << index) ? 1 : 0); -+ shift_in = crc_bit15 ^ data_bit; -+ /*printf("crc_bit15=%d, DataBit=%d, shift_in=%d\n", -+ * crc_bit15, data_bit, shift_in);*/ -+ -+ crc_result = crc << 1; -+ -+ if (shift_in == 0) -+ crc_result &= (~BIT0); -+ else -+ crc_result |= BIT0; -+ /*printf("CRC =%x\n",CRC_Result);*/ -+ -+ crc_bit11 = ((crc & BIT11) ? 1 : 0) ^ shift_in; -+ -+ if (crc_bit11 == 0) -+ crc_result &= (~BIT12); -+ else -+ crc_result |= BIT12; -+ -+ /*printf("bit12 CRC =%x\n",CRC_Result);*/ -+ -+ crc_bit4 = ((crc & BIT4) ? 1 : 0) ^ shift_in; -+ -+ if (crc_bit4 == 0) -+ crc_result &= (~BIT5); -+ else -+ crc_result |= BIT5; -+ -+ /* printf("bit5 CRC =%x\n",CRC_Result); */ -+ /* repeat using the last result*/ -+ crc = crc_result; -+ } -+ return crc; -+} -+ -+/* -+ * function name :rtw_calc_crc -+ * -+ * input: char* pattern , pattern size -+ * -+ */ -+u16 rtw_calc_crc(u8 *pdata, int length) -+{ -+ u16 crc = 0xffff; -+ int i; -+ -+ for (i = 0; i < length; i++) -+ crc = rtw_cal_crc16(pdata[i], crc); -+ /* get 1' complement */ -+ crc = ~crc; -+ -+ return crc; -+} -+#endif /*CONFIG_WOWLAN*/ -+ -+u32 rtw_calc_crc32(u8 *data, size_t len) -+{ -+ size_t i; -+ u32 crc = 0xFFFFFFFF; -+ -+ if (bcrc32initialized == 0) -+ crc32_init(); -+ -+ for (i = 0; i < len; i++) -+ crc = crc32_table[(crc ^ data[i]) & 0xff] ^ (crc >> 8); -+ -+ /* return 1' complement */ -+ return ~crc; -+} -+ -+ -+/** -+ * rtw_gcmp_encrypt - -+ * @padapter: -+ * @pxmitframe: -+ * -+ */ -+u32 rtw_gcmp_encrypt(_adapter *padapter, u8 *pxmitframe) -+{ -+ struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ /* Intermediate Buffers */ -+ sint curfragnum, plen; -+ u32 prwskeylen; -+ u8 *pframe = NULL; -+ u8 *prwskey = NULL; -+ u8 hw_hdr_offset = 0; -+ u32 res = _SUCCESS; -+ -+ if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL) -+ return _FAIL; -+ -+#ifdef CONFIG_USB_TX_AGGREGATION -+ hw_hdr_offset = TXDESC_SIZE + -+ (((struct xmit_frame *)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); -+#else -+#ifdef CONFIG_TX_EARLY_MODE -+ hw_hdr_offset = TXDESC_OFFSET + EARLY_MODE_INFO_SIZE; -+#else -+ hw_hdr_offset = TXDESC_OFFSET; -+#endif -+#endif -+ -+ pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset; -+ -+ /* start to encrypt each fragment */ -+ if ((pattrib->encrypt == _GCMP_) || -+ (pattrib->encrypt == _GCMP_256_)) { -+ -+ if (IS_MCAST(pattrib->ra)) -+ prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; -+ else -+ prwskey = pattrib->dot118021x_UncstKey.skey; -+ -+ prwskeylen = (pattrib->encrypt == _GCMP_256_) ? 32 : 16; -+ -+ for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) { -+ if ((curfragnum + 1) == pattrib->nr_frags) { -+ /* the last fragment */ -+ plen = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len; -+ -+ _rtw_gcmp_encrypt(prwskey, prwskeylen, pattrib->hdrlen, pframe, plen); -+ } else { -+ plen = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len; -+ -+ _rtw_gcmp_encrypt(prwskey, prwskeylen, pattrib->hdrlen, pframe, plen); -+ pframe += pxmitpriv->frag_len; -+ pframe = (u8 *)RND4((SIZE_PTR)(pframe)); -+ } -+ } -+ -+ GCMP_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra); -+ } -+ -+ return res; -+} -+ -+u32 rtw_gcmp_decrypt(_adapter *padapter, u8 *precvframe) -+{ -+ u32 prwskeylen; -+ u8 * pframe,*prwskey; -+ struct sta_info *stainfo; -+ struct rx_pkt_attrib *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ u32 res = _SUCCESS; -+ pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data; -+ -+ if ((prxattrib->encrypt == _GCMP_) || -+ (prxattrib->encrypt == _GCMP_256_)) { -+ stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]); -+ if (stainfo != NULL) { -+ if (IS_MCAST(prxattrib->ra)) { -+ static systime start = 0; -+ static u32 no_gkey_bc_cnt = 0; -+ static u32 no_gkey_mc_cnt = 0; -+ -+ if ((!MLME_IS_MESH(padapter) && psecuritypriv->binstallGrpkey == _FALSE) -+ #ifdef CONFIG_RTW_MESH -+ || !(stainfo->gtk_bmp | BIT(prxattrib->key_index)) -+ #endif -+ ) { -+ res = _FAIL; -+ -+ if (start == 0) -+ start = rtw_get_current_time(); -+ -+ if (is_broadcast_mac_addr(prxattrib->ra)) -+ no_gkey_bc_cnt++; -+ else -+ no_gkey_mc_cnt++; -+ -+ if (rtw_get_passing_time_ms(start) > 1000) { -+ if (no_gkey_bc_cnt || no_gkey_mc_cnt) { -+ RTW_PRINT(FUNC_ADPT_FMT" no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", -+ FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); -+ } -+ start = rtw_get_current_time(); -+ no_gkey_bc_cnt = 0; -+ no_gkey_mc_cnt = 0; -+ } -+ -+ goto exit; -+ } -+ -+ if (no_gkey_bc_cnt || no_gkey_mc_cnt) { -+ RTW_PRINT(FUNC_ADPT_FMT" gkey installed. no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", -+ FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); -+ } -+ start = 0; -+ no_gkey_bc_cnt = 0; -+ no_gkey_mc_cnt = 0; -+ -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ /* TODO: multiple GK? */ -+ prwskey = &stainfo->gtk.skey[0]; -+ } else -+ #endif -+ { -+ prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; -+ if (psecuritypriv->dot118021XGrpKeyid != prxattrib->key_index) { -+ RTW_DBG("not match packet_index=%d, install_index=%d\n" -+ , prxattrib->key_index, psecuritypriv->dot118021XGrpKeyid); -+ res = _FAIL; -+ goto exit; -+ } -+ } -+ } else -+ prwskey = &stainfo->dot118021x_UncstKey.skey[0]; -+ -+ res = _rtw_gcmp_decrypt(prwskey, -+ prxattrib->encrypt == _GCMP_256_ ? 32 : 16, -+ prxattrib->hdrlen, pframe, -+ ((union recv_frame *)precvframe)->u.hdr.len); -+ -+ GCMP_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); -+ } else { -+ res = _FAIL; -+ } -+ -+ } -+exit: -+ return res; -+} -+ -+ -+#ifdef CONFIG_IEEE80211W -+u8 rtw_calculate_bip_mic(enum security_type gmcs, u8 *whdr_pos, s32 len, -+ const u8 *key, const u8 *data, size_t data_len, u8 *mic) -+{ -+ u8 res = _SUCCESS; -+ -+ if (gmcs == _BIP_CMAC_128_) { -+ if (_bip_ccmp_protect(key, 16, data, data_len, mic) == _FALSE) { -+ res = _FAIL; -+ RTW_ERR("%s : _bip_ccmp_protect(128) fail!", __func__); -+ } -+ } else if (gmcs == _BIP_CMAC_256_) { -+ if (_bip_ccmp_protect(key, 32, data, data_len, mic) == _FALSE) { -+ res = _FAIL; -+ RTW_ERR("%s : _bip_ccmp_protect(256) fail!", __func__); -+ } -+ } else if (gmcs == _BIP_GMAC_128_) { -+ if (_bip_gcmp_protect(whdr_pos, len, key, 16, -+ data, data_len, mic) == _FALSE) { -+ res = _FAIL; -+ RTW_ERR("%s : _bip_gcmp_protect(128) fail!", __func__); -+ } -+ } else if (gmcs == _BIP_GMAC_256_) { -+ if (_bip_gcmp_protect(whdr_pos, len, key, 32, -+ data, data_len, mic) == _FALSE) { -+ res = _FAIL; -+ RTW_ERR("%s : _bip_gcmp_protect(256) fail!", __func__); -+ } -+ } else { -+ res = _FAIL; -+ RTW_ERR("%s : unsupport dot11wCipher !\n", __func__); -+ } -+ -+ return res; -+} -+ -+ -+u32 rtw_bip_verify(enum security_type gmcs, u16 pkt_len, -+ u8 *whdr_pos, sint flen, const u8 *key, u16 keyid, u64 *ipn) -+{ -+ u8 * BIP_AAD,*mme; -+ u32 res = _FAIL; -+ uint len, ori_len; -+ u16 pkt_keyid = 0; -+ u64 pkt_ipn = 0; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u8 mic[16]; -+ u8 mic_len, mme_offset; -+ -+ mic_len = (gmcs == _BIP_CMAC_128_) ? 8 : 16; -+ -+ if (flen < WLAN_HDR_A3_LEN || flen - WLAN_HDR_A3_LEN < mic_len) -+ return RTW_RX_HANDLED; -+ -+ mme_offset = (mic_len == 8) ? 18 : 26; -+ mme = whdr_pos + flen - mme_offset; -+ if (*mme != _MME_IE_) -+ return RTW_RX_HANDLED; -+ -+ /* copy key index */ -+ _rtw_memcpy(&pkt_keyid, mme + 2, 2); -+ pkt_keyid = le16_to_cpu(pkt_keyid); -+ if (pkt_keyid != keyid) { -+ RTW_INFO("BIP key index error!\n"); -+ return _FAIL; -+ } -+ -+ /* save packet number */ -+ _rtw_memcpy(&pkt_ipn, mme + 4, 6); -+ pkt_ipn = le64_to_cpu(pkt_ipn); -+ /* BIP packet number should bigger than previous BIP packet */ -+ if (pkt_ipn <= *ipn) { /* wrap around? */ -+ RTW_INFO("replay BIP packet\n"); -+ return _FAIL; -+ } -+ -+ ori_len = flen - WLAN_HDR_A3_LEN + BIP_AAD_SIZE; -+ BIP_AAD = rtw_zmalloc(ori_len); -+ if (BIP_AAD == NULL) { -+ RTW_INFO("BIP AAD allocate fail\n"); -+ return _FAIL; -+ } -+ -+ /* mapping to wlan header */ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)whdr_pos; -+ -+ /* save the frame body + MME (w/o mic) */ -+ _rtw_memcpy(BIP_AAD + BIP_AAD_SIZE, -+ whdr_pos + WLAN_HDR_A3_LEN, -+ flen - WLAN_HDR_A3_LEN - mic_len); -+ -+ /* conscruct AAD, copy frame control field */ -+ _rtw_memcpy(BIP_AAD, &pwlanhdr->frame_ctl, 2); -+ ClearRetry(BIP_AAD); -+ ClearPwrMgt(BIP_AAD); -+ ClearMData(BIP_AAD); -+ /* conscruct AAD, copy address 1 to address 3 */ -+ _rtw_memcpy(BIP_AAD + 2, GetAddr1Ptr((u8 *)pwlanhdr), 18); -+ -+ if (rtw_calculate_bip_mic(gmcs, whdr_pos, -+ pkt_len, key, BIP_AAD, ori_len, mic) == _FAIL) -+ goto BIP_exit; -+ -+ /* MIC field should be last 8 bytes of packet (packet without FCS) */ -+ if (_rtw_memcmp(mic, whdr_pos + flen - mic_len, mic_len)) { -+ *ipn = pkt_ipn; -+ res = _SUCCESS; -+ } else -+ RTW_INFO("BIP MIC error!\n"); -+ -+#if 0 -+ /* management packet content */ -+ { -+ int pp; -+ RTW_INFO("pkt: "); -+ RTW_INFO_DUMP("", whdr_pos, flen); -+ RTW_INFO("\n"); -+ /* BIP AAD + management frame body + MME(MIC is zero) */ -+ RTW_INFO("AAD+PKT: "); -+ RTW_INFO_DUMP("", BIP_AAD, ori_len); -+ RTW_INFO("\n"); -+ /* show the MIC result */ -+ RTW_INFO("mic: "); -+ RTW_INFO_DUMP("", mic, mic_len); -+ RTW_INFO("\n"); -+ } -+#endif -+ -+BIP_exit: -+ -+ rtw_mfree(BIP_AAD, ori_len); -+ return res; -+} -+ -+#endif /* CONFIG_IEEE80211W */ -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_sreset.c b/drivers/staging/rtl8723cs/core/rtw_sreset.c -new file mode 100644 -index 000000000000..21cc18bc4f5d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_sreset.c -@@ -0,0 +1,320 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+#include -+ -+void sreset_init_value(_adapter *padapter) -+{ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ -+ _rtw_mutex_init(&psrtpriv->silentreset_mutex); -+ psrtpriv->silent_reset_inprogress = _FALSE; -+ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; -+ psrtpriv->last_tx_time = 0; -+ psrtpriv->last_tx_complete_time = 0; -+#endif -+} -+void sreset_reset_value(_adapter *padapter) -+{ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ -+ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; -+ psrtpriv->last_tx_time = 0; -+ psrtpriv->last_tx_complete_time = 0; -+#endif -+} -+ -+u8 sreset_get_wifi_status(_adapter *padapter) -+{ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ u8 status = WIFI_STATUS_SUCCESS; -+ u32 val32 = 0; -+ -+ if (psrtpriv->silent_reset_inprogress == _TRUE) -+ return status; -+ val32 = rtw_read32(padapter, REG_TXDMA_STATUS); -+ if (val32 == 0xeaeaeaea) -+ psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; -+ else if (val32 != 0) { -+ RTW_INFO("txdmastatu(%x)\n", val32); -+ psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR; -+ } -+ -+ if (WIFI_STATUS_SUCCESS != psrtpriv->Wifi_Error_Status) { -+ RTW_INFO("==>%s error_status(0x%x)\n", __FUNCTION__, psrtpriv->Wifi_Error_Status); -+ status = (psrtpriv->Wifi_Error_Status & (~(USB_READ_PORT_FAIL | USB_WRITE_PORT_FAIL))); -+ } -+ RTW_INFO("==> %s wifi_status(0x%x)\n", __FUNCTION__, status); -+ -+ /* status restore */ -+ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; -+ -+ return status; -+#else -+ return WIFI_STATUS_SUCCESS; -+#endif -+} -+ -+void sreset_set_wifi_error_status(_adapter *padapter, u32 status) -+{ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ pHalData->srestpriv.Wifi_Error_Status = status; -+#endif -+} -+ -+void sreset_set_trigger_point(_adapter *padapter, s32 tgp) -+{ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ pHalData->srestpriv.dbg_trigger_point = tgp; -+#endif -+} -+ -+bool sreset_inprogress(_adapter *padapter) -+{ -+#if defined(DBG_CONFIG_ERROR_RESET) -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ return pHalData->srestpriv.silent_reset_inprogress; -+#else -+ return _FALSE; -+#endif -+} -+ -+void sreset_restore_security_station(_adapter *padapter) -+{ -+ struct mlme_priv *mlmepriv = &padapter->mlmepriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; -+ -+ { -+ u8 val8; -+ -+ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) { -+ val8 = 0xcc; -+#ifdef CONFIG_WAPI_SUPPORT -+ } else if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) { -+ /* Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. */ -+ val8 = 0x4c; -+#endif -+ } else -+ val8 = 0xcf; -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); -+ } -+ -+ if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || -+ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) { -+ psta = rtw_get_stainfo(pstapriv, get_bssid(mlmepriv)); -+ if (psta == NULL) { -+ /* DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail\n")); */ -+ } else { -+ /* pairwise key */ -+ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY, _FALSE); -+ /* group key */ -+ rtw_set_key(padapter, &padapter->securitypriv, padapter->securitypriv.dot118021XGrpKeyid, 0, _FALSE); -+ } -+ } -+} -+ -+void sreset_restore_network_station(_adapter *padapter) -+{ -+ struct mlme_priv *mlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 doiqk = _FALSE; -+ -+ rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure, RTW_CMDF_DIRECTLY); -+ -+ { -+ u8 threshold; -+#ifdef CONFIG_USB_HCI -+ /* TH=1 => means that invalidate usb rx aggregation */ -+ /* TH=0 => means that validate usb rx aggregation, use init value. */ -+#ifdef CONFIG_80211N_HT -+ if (mlmepriv->htpriv.ht_option) { -+ if (padapter->registrypriv.wifi_spec == 1) -+ threshold = 1; -+ else -+ threshold = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); -+ } else { -+ threshold = 1; -+ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); -+ } -+#endif /* CONFIG_80211N_HT */ -+#endif -+ } -+ -+ doiqk = _TRUE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK , &doiqk); -+ -+ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); -+ -+ doiqk = _FALSE; -+ rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk); -+ /* disable dynamic functions, such as high power, DIG */ -+ /*rtw_phydm_func_disable_all(padapter);*/ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); -+ -+ { -+ u8 join_type = 0; -+ -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_STA_CONNECTING); -+ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); -+ -+ rtw_btcoex_connect_notify(padapter, join_type); -+ } -+ -+ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); -+ -+ mlmeext_joinbss_event_callback(padapter, 1); -+ /* restore Sequence No. */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_RESTORE_HW_SEQ, 0); -+ -+ sreset_restore_security_station(padapter); -+} -+ -+ -+void sreset_restore_network_status(_adapter *padapter) -+{ -+ struct mlme_priv *mlmepriv = &padapter->mlmepriv; -+ -+ if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) { -+ RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); -+ sreset_restore_network_station(padapter); -+ } -+#ifdef CONFIG_AP_MODE -+ else if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { -+ RTW_INFO(FUNC_ADPT_FMT" %s\n", FUNC_ADPT_ARG(padapter), MLME_IS_AP(padapter) ? "AP" : "MESH"); -+ rtw_ap_restore_network(padapter); -+ } -+#endif -+ else if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE)) -+ RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); -+} -+ -+void sreset_stop_adapter(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ if (padapter == NULL) -+ return; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ rtw_netif_stop_queue(padapter->pnetdev); -+ -+ rtw_cancel_all_timer(padapter); -+ -+ /* TODO: OS and HCI independent */ -+#if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) -+ tasklet_kill(&pxmitpriv->xmit_tasklet); -+#endif -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY)) -+ rtw_scan_abort(padapter); -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING)) { -+ rtw_set_to_roam(padapter, 0); -+ rtw_join_timeout_handler(padapter); -+ } -+ -+} -+ -+void sreset_start_adapter(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ if (padapter == NULL) -+ return; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) -+ sreset_restore_network_status(padapter); -+ -+ /* TODO: OS and HCI independent */ -+#if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) -+ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); -+#endif -+ -+ if (is_primary_adapter(padapter)) -+ _set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000); -+ -+ rtw_netif_wake_queue(padapter->pnetdev); -+} -+ -+void sreset_reset(_adapter *padapter) -+{ -+#ifdef DBG_CONFIG_ERROR_RESET -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ _irqL irqL; -+ systime start = rtw_get_current_time(); -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; -+ -+ -+#ifdef CONFIG_LPS -+ rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "SRESET"); -+#endif/* #ifdef CONFIG_LPS */ -+ -+ _enter_pwrlock(&pwrpriv->lock); -+ -+ psrtpriv->silent_reset_inprogress = _TRUE; -+ pwrpriv->change_rfpwrstate = rf_off; -+ -+ rtw_mi_sreset_adapter_hdl(padapter, _FALSE);/*sreset_stop_adapter*/ -+#ifdef CONFIG_IPS -+ _ips_enter(padapter); -+ _ips_leave(padapter); -+#endif -+#if defined(CONFIG_AP_MODE) && defined(CONFIG_CONCURRENT_MODE) -+ rtw_mi_ap_info_restore(padapter); -+#endif -+ rtw_mi_sreset_adapter_hdl(padapter, _TRUE);/*sreset_start_adapter*/ -+ -+ psrtpriv->silent_reset_inprogress = _FALSE; -+ -+ _exit_pwrlock(&pwrpriv->lock); -+ -+ RTW_INFO("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); -+ pdbgpriv->dbg_sreset_cnt++; -+ -+ psrtpriv->self_dect_fw = _FALSE; -+ psrtpriv->rx_cnt = 0; -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/core/rtw_sta_mgt.c b/drivers/staging/rtl8723cs/core/rtw_sta_mgt.c -new file mode 100644 -index 000000000000..28a76fd9749a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_sta_mgt.c -@@ -0,0 +1,1369 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_STA_MGT_C_ -+ -+#include -+ -+bool test_st_match_rule(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) -+{ -+ if (ntohs(*((u16 *)local_port)) == 5001 || ntohs(*((u16 *)remote_port)) == 5001) -+ return _TRUE; -+ return _FALSE; -+} -+ -+struct st_register test_st_reg = { -+ .s_proto = 0x06, -+ .rule = test_st_match_rule, -+}; -+ -+inline void rtw_st_ctl_init(struct st_ctl_t *st_ctl) -+{ -+ _rtw_memset(st_ctl->reg, 0 , sizeof(struct st_register) * SESSION_TRACKER_REG_ID_NUM); -+ _rtw_init_queue(&st_ctl->tracker_q); -+} -+ -+inline void rtw_st_ctl_clear_tracker_q(struct st_ctl_t *st_ctl) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ struct session_tracker *st; -+ -+ _enter_critical_bh(&st_ctl->tracker_q.lock, &irqL); -+ phead = &st_ctl->tracker_q.queue; -+ plist = get_next(phead); -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ st = LIST_CONTAINOR(plist, struct session_tracker, list); -+ plist = get_next(plist); -+ rtw_list_delete(&st->list); -+ rtw_mfree((u8 *)st, sizeof(struct session_tracker)); -+ } -+ _exit_critical_bh(&st_ctl->tracker_q.lock, &irqL); -+} -+ -+inline void rtw_st_ctl_deinit(struct st_ctl_t *st_ctl) -+{ -+ rtw_st_ctl_clear_tracker_q(st_ctl); -+ _rtw_deinit_queue(&st_ctl->tracker_q); -+} -+ -+inline void rtw_st_ctl_register(struct st_ctl_t *st_ctl, u8 st_reg_id, struct st_register *reg) -+{ -+ if (st_reg_id >= SESSION_TRACKER_REG_ID_NUM) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ st_ctl->reg[st_reg_id].s_proto = reg->s_proto; -+ st_ctl->reg[st_reg_id].rule = reg->rule; -+} -+ -+inline void rtw_st_ctl_unregister(struct st_ctl_t *st_ctl, u8 st_reg_id) -+{ -+ int i; -+ -+ if (st_reg_id >= SESSION_TRACKER_REG_ID_NUM) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ st_ctl->reg[st_reg_id].s_proto = 0; -+ st_ctl->reg[st_reg_id].rule = NULL; -+ -+ /* clear tracker queue if no session trecker registered */ -+ for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) -+ if (st_ctl->reg[i].s_proto != 0) -+ break; -+ if (i >= SESSION_TRACKER_REG_ID_NUM) -+ rtw_st_ctl_clear_tracker_q(st_ctl); -+} -+ -+inline bool rtw_st_ctl_chk_reg_s_proto(struct st_ctl_t *st_ctl, u8 s_proto) -+{ -+ bool ret = _FALSE; -+ int i; -+ -+ for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) { -+ if (st_ctl->reg[i].s_proto == s_proto) { -+ ret = _TRUE; -+ break; -+ } -+ } -+ -+ return ret; -+} -+ -+inline bool rtw_st_ctl_chk_reg_rule(struct st_ctl_t *st_ctl, _adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) -+{ -+ bool ret = _FALSE; -+ int i; -+ st_match_rule rule; -+ -+ for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) { -+ rule = st_ctl->reg[i].rule; -+ if (rule && rule(adapter, local_naddr, local_port, remote_naddr, remote_port) == _TRUE) { -+ ret = _TRUE; -+ break; -+ } -+ } -+ -+ return ret; -+} -+ -+void rtw_st_ctl_rx(struct sta_info *sta, u8 *ehdr_pos) -+{ -+ _adapter *adapter = sta->padapter; -+ struct ethhdr *etherhdr = (struct ethhdr *)ehdr_pos; -+ -+ if (ntohs(etherhdr->h_proto) == ETH_P_IP) { -+ u8 *ip = ehdr_pos + ETH_HLEN; -+ -+ if (GET_IPV4_PROTOCOL(ip) == 0x06 /* TCP */ -+ && rtw_st_ctl_chk_reg_s_proto(&sta->st_ctl, 0x06) == _TRUE -+ ) { -+ u8 *tcp = ip + GET_IPV4_IHL(ip) * 4; -+ -+ if (rtw_st_ctl_chk_reg_rule(&sta->st_ctl, adapter, IPV4_DST(ip), TCP_DST(tcp), IPV4_SRC(ip), TCP_SRC(tcp)) == _TRUE) { -+ if (GET_TCP_SYN(tcp) && GET_TCP_ACK(tcp)) { -+ session_tracker_add_cmd(adapter, sta -+ , IPV4_DST(ip), TCP_DST(tcp) -+ , IPV4_SRC(ip), TCP_SRC(tcp)); -+ if (DBG_SESSION_TRACKER) -+ RTW_INFO(FUNC_ADPT_FMT" local:"IP_FMT":"PORT_FMT", remote:"IP_FMT":"PORT_FMT" SYN-ACK\n" -+ , FUNC_ADPT_ARG(adapter) -+ , IP_ARG(IPV4_DST(ip)), PORT_ARG(TCP_DST(tcp)) -+ , IP_ARG(IPV4_SRC(ip)), PORT_ARG(TCP_SRC(tcp))); -+ } -+ if (GET_TCP_FIN(tcp)) { -+ session_tracker_del_cmd(adapter, sta -+ , IPV4_DST(ip), TCP_DST(tcp) -+ , IPV4_SRC(ip), TCP_SRC(tcp)); -+ if (DBG_SESSION_TRACKER) -+ RTW_INFO(FUNC_ADPT_FMT" local:"IP_FMT":"PORT_FMT", remote:"IP_FMT":"PORT_FMT" FIN\n" -+ , FUNC_ADPT_ARG(adapter) -+ , IP_ARG(IPV4_DST(ip)), PORT_ARG(TCP_DST(tcp)) -+ , IP_ARG(IPV4_SRC(ip)), PORT_ARG(TCP_SRC(tcp))); -+ } -+ } -+ -+ } -+ } -+} -+ -+#define SESSION_TRACKER_FMT IP_FMT":"PORT_FMT" "IP_FMT":"PORT_FMT" %u %d" -+#define SESSION_TRACKER_ARG(st) IP_ARG(&(st)->local_naddr), PORT_ARG(&(st)->local_port), IP_ARG(&(st)->remote_naddr), PORT_ARG(&(st)->remote_port), (st)->status, rtw_get_passing_time_ms((st)->set_time) -+ -+void dump_st_ctl(void *sel, struct st_ctl_t *st_ctl) -+{ -+ int i; -+ _irqL irqL; -+ _list *plist, *phead; -+ struct session_tracker *st; -+ -+ if (!DBG_SESSION_TRACKER) -+ return; -+ -+ for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) -+ RTW_PRINT_SEL(sel, "reg%d: %u %p\n", i, st_ctl->reg[i].s_proto, st_ctl->reg[i].rule); -+ -+ _enter_critical_bh(&st_ctl->tracker_q.lock, &irqL); -+ phead = &st_ctl->tracker_q.queue; -+ plist = get_next(phead); -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ st = LIST_CONTAINOR(plist, struct session_tracker, list); -+ plist = get_next(plist); -+ -+ RTW_PRINT_SEL(sel, SESSION_TRACKER_FMT"\n", SESSION_TRACKER_ARG(st)); -+ } -+ _exit_critical_bh(&st_ctl->tracker_q.lock, &irqL); -+ -+} -+ -+void _rtw_init_stainfo(struct sta_info *psta); -+void _rtw_init_stainfo(struct sta_info *psta) -+{ -+ _rtw_memset((u8 *)psta, 0, sizeof(struct sta_info)); -+ -+ _rtw_spinlock_init(&psta->lock); -+ _rtw_init_listhead(&psta->list); -+ _rtw_init_listhead(&psta->hash_list); -+ /* _rtw_init_listhead(&psta->asoc_list); */ -+ /* _rtw_init_listhead(&psta->sleep_list); */ -+ /* _rtw_init_listhead(&psta->wakeup_list); */ -+ -+ _rtw_init_queue(&psta->sleep_q); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ _rtw_init_queue(&psta->mgmt_sleep_q); -+#endif -+ _rtw_init_sta_xmit_priv(&psta->sta_xmitpriv); -+ _rtw_init_sta_recv_priv(&psta->sta_recvpriv); -+ -+#ifdef CONFIG_AP_MODE -+ _rtw_init_listhead(&psta->asoc_list); -+ _rtw_init_listhead(&psta->auth_list); -+ psta->bpairwise_key_installed = _FALSE; -+ -+#ifdef CONFIG_RTW_80211R -+ psta->ft_pairwise_key_installed = _FALSE; -+#endif -+#endif /* CONFIG_AP_MODE */ -+ -+ rtw_st_ctl_init(&psta->st_ctl); -+} -+ -+u32 _rtw_init_sta_priv(struct sta_priv *pstapriv) -+{ -+ _adapter *adapter = container_of(pstapriv, _adapter, stapriv); -+ struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); -+ struct sta_info *psta; -+ s32 i; -+ u32 ret = _FAIL; -+ -+ pstapriv->padapter = adapter; -+ -+ pstapriv->pallocated_stainfo_buf = rtw_zvmalloc( -+ sizeof(struct sta_info) * NUM_STA + MEM_ALIGNMENT_OFFSET); -+ if (!pstapriv->pallocated_stainfo_buf) -+ goto exit; -+ -+ pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf; -+ if ((SIZE_PTR)pstapriv->pstainfo_buf & MEM_ALIGNMENT_PADDING) -+ pstapriv->pstainfo_buf += MEM_ALIGNMENT_OFFSET - -+ ((SIZE_PTR)pstapriv->pstainfo_buf & MEM_ALIGNMENT_PADDING); -+ -+ _rtw_init_queue(&pstapriv->free_sta_queue); -+ -+ _rtw_spinlock_init(&pstapriv->sta_hash_lock); -+ -+ /* _rtw_init_queue(&pstapriv->asoc_q); */ -+ pstapriv->asoc_sta_count = 0; -+ _rtw_init_queue(&pstapriv->sleep_q); -+ _rtw_init_queue(&pstapriv->wakeup_q); -+ -+ psta = (struct sta_info *)(pstapriv->pstainfo_buf); -+ -+ -+ for (i = 0; i < NUM_STA; i++) { -+ _rtw_init_stainfo(psta); -+ -+ _rtw_init_listhead(&(pstapriv->sta_hash[i])); -+ -+ rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue)); -+ -+ psta++; -+ } -+ -+ pstapriv->adhoc_expire_to = 4; /* 4 * 2 = 8 sec */ -+ -+#ifdef CONFIG_AP_MODE -+ pstapriv->max_aid = macid_ctl->num; -+ pstapriv->rr_aid = 0; -+ pstapriv->started_aid = 1; -+ pstapriv->sta_aid = rtw_zmalloc(pstapriv->max_aid * sizeof(struct sta_info *)); -+ if (!pstapriv->sta_aid) -+ goto exit; -+ pstapriv->aid_bmp_len = AID_BMP_LEN(pstapriv->max_aid); -+ pstapriv->sta_dz_bitmap = rtw_zmalloc(pstapriv->aid_bmp_len); -+ if (!pstapriv->sta_dz_bitmap) -+ goto exit; -+ pstapriv->tim_bitmap = rtw_zmalloc(pstapriv->aid_bmp_len); -+ if (!pstapriv->tim_bitmap) -+ goto exit; -+ -+ _rtw_init_listhead(&pstapriv->asoc_list); -+ _rtw_init_listhead(&pstapriv->auth_list); -+ _rtw_spinlock_init(&pstapriv->asoc_list_lock); -+ _rtw_spinlock_init(&pstapriv->auth_list_lock); -+ pstapriv->asoc_list_cnt = 0; -+ pstapriv->auth_list_cnt = 0; -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ pstapriv->tbtx_asoc_list_cnt = 0; -+#endif -+ -+ pstapriv->auth_to = 3; /* 3*2 = 6 sec */ -+ pstapriv->assoc_to = 3; -+ /* pstapriv->expire_to = 900; */ /* 900*2 = 1800 sec = 30 min, expire after no any traffic. */ -+ /* pstapriv->expire_to = 30; */ /* 30*2 = 60 sec = 1 min, expire after no any traffic. */ -+#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ pstapriv->expire_to = 3; /* 3*2 = 6 sec */ -+#else -+ pstapriv->expire_to = 60;/* 60*2 = 120 sec = 2 min, expire after no any traffic. */ -+#endif -+#ifdef CONFIG_ATMEL_RC_PATCH -+ _rtw_memset(pstapriv->atmel_rc_pattern, 0, ETH_ALEN); -+#endif -+ pstapriv->max_num_sta = NUM_STA; -+ -+#if CONFIG_RTW_MACADDR_ACL -+ for (i = 0; i < RTW_ACL_PERIOD_NUM; i++) -+ rtw_macaddr_acl_init(adapter, i); -+#endif -+#endif /* CONFIG_AP_MODE */ -+ -+#if CONFIG_RTW_PRE_LINK_STA -+ rtw_pre_link_sta_ctl_init(pstapriv); -+#endif -+ -+#if defined(DBG_ROAMING_TEST) || defined(CONFIG_RTW_REPEATER_SON) -+ rtw_set_rx_chk_limit(adapter,1); -+#elif defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && !defined(CONFIG_LPS_LCLK_WD_TIMER) -+ rtw_set_rx_chk_limit(adapter,4); -+#else -+ rtw_set_rx_chk_limit(adapter,8); -+#endif -+ -+ ret = _SUCCESS; -+ -+exit: -+ if (ret != _SUCCESS) { -+ if (pstapriv->pallocated_stainfo_buf) -+ rtw_vmfree(pstapriv->pallocated_stainfo_buf, -+ sizeof(struct sta_info) * NUM_STA + MEM_ALIGNMENT_OFFSET); -+ #ifdef CONFIG_AP_MODE -+ if (pstapriv->sta_aid) -+ rtw_mfree(pstapriv->sta_aid, pstapriv->max_aid * sizeof(struct sta_info *)); -+ if (pstapriv->sta_dz_bitmap) -+ rtw_mfree(pstapriv->sta_dz_bitmap, pstapriv->aid_bmp_len); -+ #endif -+ } -+ -+ return ret; -+} -+ -+inline int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta) -+{ -+ int offset = (((u8 *)sta) - stapriv->pstainfo_buf) / sizeof(struct sta_info); -+ -+ if (!stainfo_offset_valid(offset)) -+ RTW_INFO("%s invalid offset(%d), out of range!!!", __func__, offset); -+ -+ return offset; -+} -+ -+inline struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset) -+{ -+ if (!stainfo_offset_valid(offset)) -+ RTW_INFO("%s invalid offset(%d), out of range!!!", __func__, offset); -+ -+ return (struct sta_info *)(stapriv->pstainfo_buf + offset * sizeof(struct sta_info)); -+} -+ -+void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv); -+void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv) -+{ -+ -+ _rtw_spinlock_free(&psta_xmitpriv->lock); -+ -+ _rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock)); -+ _rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock)); -+ _rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock)); -+ _rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock)); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ _rtw_spinlock_free(&(psta_xmitpriv->mgmt_q.sta_pending.lock)); -+#endif -+} -+ -+static void _rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv) -+{ -+ -+ _rtw_spinlock_free(&psta_recvpriv->lock); -+ -+ _rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock)); -+ -+ -+} -+ -+void rtw_mfree_stainfo(struct sta_info *psta); -+void rtw_mfree_stainfo(struct sta_info *psta) -+{ -+ -+ if (&psta->lock != NULL) -+ _rtw_spinlock_free(&psta->lock); -+ -+ _rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv); -+ _rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv); -+ -+} -+ -+ -+/* this function is used to free the memory of lock || sema for all stainfos */ -+void rtw_mfree_all_stainfo(struct sta_priv *pstapriv); -+void rtw_mfree_all_stainfo(struct sta_priv *pstapriv) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ struct sta_info *psta = NULL; -+ -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ phead = get_list_head(&pstapriv->free_sta_queue); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info , list); -+ plist = get_next(plist); -+ -+ rtw_mfree_stainfo(psta); -+ } -+ -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ -+} -+ -+void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv); -+void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv) -+{ -+ rtw_mfree_all_stainfo(pstapriv); /* be done before free sta_hash_lock */ -+ -+ _rtw_spinlock_free(&pstapriv->free_sta_queue.lock); -+ -+ _rtw_spinlock_free(&pstapriv->sta_hash_lock); -+ _rtw_spinlock_free(&pstapriv->wakeup_q.lock); -+ _rtw_spinlock_free(&pstapriv->sleep_q.lock); -+ -+#ifdef CONFIG_AP_MODE -+ _rtw_spinlock_free(&pstapriv->asoc_list_lock); -+ _rtw_spinlock_free(&pstapriv->auth_list_lock); -+#endif -+ -+} -+ -+u32 _rtw_free_sta_priv(struct sta_priv *pstapriv) -+{ -+ _irqL irqL; -+ _list *phead, *plist; -+ struct sta_info *psta = NULL; -+ struct recv_reorder_ctrl *preorder_ctrl; -+ int index; -+ -+ if (pstapriv) { -+ -+ /* delete all reordering_ctrl_timer */ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (index = 0; index < NUM_STA; index++) { -+ phead = &(pstapriv->sta_hash[index]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ int i; -+ psta = LIST_CONTAINOR(plist, struct sta_info , hash_list); -+ plist = get_next(plist); -+ -+ for (i = 0; i < 16 ; i++) { -+ preorder_ctrl = &psta->recvreorder_ctrl[i]; -+ _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); -+ } -+ } -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ /*===============================*/ -+ -+ rtw_mfree_sta_priv_lock(pstapriv); -+ -+#if CONFIG_RTW_MACADDR_ACL -+ for (index = 0; index < RTW_ACL_PERIOD_NUM; index++) -+ rtw_macaddr_acl_deinit(pstapriv->padapter, index); -+#endif -+ -+#if CONFIG_RTW_PRE_LINK_STA -+ rtw_pre_link_sta_ctl_deinit(pstapriv); -+#endif -+ -+ if (pstapriv->pallocated_stainfo_buf) -+ rtw_vmfree(pstapriv->pallocated_stainfo_buf, -+ sizeof(struct sta_info) * NUM_STA + MEM_ALIGNMENT_OFFSET); -+ #ifdef CONFIG_AP_MODE -+ if (pstapriv->sta_aid) -+ rtw_mfree(pstapriv->sta_aid, pstapriv->max_aid * sizeof(struct sta_info *)); -+ if (pstapriv->sta_dz_bitmap) -+ rtw_mfree(pstapriv->sta_dz_bitmap, pstapriv->aid_bmp_len); -+ if (pstapriv->tim_bitmap) -+ rtw_mfree(pstapriv->tim_bitmap, pstapriv->aid_bmp_len); -+ #endif -+ } -+ -+ return _SUCCESS; -+} -+ -+ -+static void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl) -+{ -+ _adapter *padapter = preorder_ctrl->padapter; -+ -+#if defined(CONFIG_80211N_HT) && defined(CONFIG_RECV_REORDERING_CTRL) -+ rtw_init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter, rtw_reordering_ctrl_timeout_handler, preorder_ctrl); -+#endif -+} -+ -+/* struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr) */ -+struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr) -+{ -+ _irqL irqL2; -+ s32 index; -+ _list *phash_list; -+ struct sta_info *psta; -+ _queue *pfree_sta_queue; -+ struct recv_reorder_ctrl *preorder_ctrl; -+ int i = 0; -+ u16 wRxSeqInitialValue = 0xffff; -+ -+ -+ pfree_sta_queue = &pstapriv->free_sta_queue; -+ -+ /* _enter_critical_bh(&(pfree_sta_queue->lock), &irqL); */ -+ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); -+ if (_rtw_queue_empty(pfree_sta_queue) == _TRUE) { -+ /* _exit_critical_bh(&(pfree_sta_queue->lock), &irqL); */ -+ /* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); */ -+ psta = NULL; -+ } else { -+ psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list); -+ -+ rtw_list_delete(&(psta->list)); -+ -+ /* _exit_critical_bh(&(pfree_sta_queue->lock), &irqL); */ -+ _rtw_init_stainfo(psta); -+ -+ psta->padapter = pstapriv->padapter; -+ -+ _rtw_memcpy(psta->cmn.mac_addr, hwaddr, ETH_ALEN); -+ -+ index = wifi_mac_hash(hwaddr); -+ -+ -+ if (index >= NUM_STA) { -+ psta = NULL; -+ goto exit; -+ } -+ phash_list = &(pstapriv->sta_hash[index]); -+ -+ /* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); */ -+ -+ rtw_list_insert_tail(&psta->hash_list, phash_list); -+ -+ pstapriv->asoc_sta_count++; -+ -+ /* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); */ -+ -+ /* Commented by Albert 2009/08/13 -+ * For the SMC router, the sequence number of first packet of WPS handshake will be 0. -+ * In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable. -+ * So, we initialize the tid_rxseq variable as the 0xffff. */ -+ -+ for (i = 0; i < 16; i++) { -+ _rtw_memcpy(&psta->sta_recvpriv.rxcache.tid_rxseq[i], &wRxSeqInitialValue, 2); -+ _rtw_memcpy(&psta->sta_recvpriv.bmc_tid_rxseq[i], &wRxSeqInitialValue, 2); -+ _rtw_memset(&psta->sta_recvpriv.rxcache.iv[i], 0, sizeof(psta->sta_recvpriv.rxcache.iv[i])); -+ } -+ _rtw_memcpy(&psta->sta_recvpriv.nonqos_bmc_rxseq,&wRxSeqInitialValue,2); -+ _rtw_memcpy(&psta->sta_recvpriv.nonqos_rxseq,&wRxSeqInitialValue,2); -+ -+ rtw_init_timer(&psta->addba_retry_timer, psta->padapter, addba_timer_hdl, psta); -+#ifdef CONFIG_IEEE80211W -+ rtw_init_timer(&psta->dot11w_expire_timer, psta->padapter, sa_query_timer_hdl, psta); -+#endif /* CONFIG_IEEE80211W */ -+#ifdef CONFIG_TDLS -+ rtw_init_tdls_timer(pstapriv->padapter, psta); -+#endif /* CONFIG_TDLS */ -+ -+ /* for A-MPDU Rx reordering buffer control */ -+ for (i = 0; i < 16 ; i++) { -+ preorder_ctrl = &psta->recvreorder_ctrl[i]; -+ preorder_ctrl->padapter = pstapriv->padapter; -+ preorder_ctrl->tid = i; -+ preorder_ctrl->enable = _FALSE; -+ preorder_ctrl->indicate_seq = 0xffff; -+ #ifdef DBG_RX_SEQ -+ RTW_INFO("DBG_RX_SEQ "FUNC_ADPT_FMT" tid:%u SN_CLEAR indicate_seq:%d\n" -+ , FUNC_ADPT_ARG(pstapriv->padapter), i, preorder_ctrl->indicate_seq); -+ #endif -+ preorder_ctrl->wend_b = 0xffff; -+ preorder_ctrl->wsize_b = 64;/* 64; */ -+ preorder_ctrl->ampdu_size = RX_AMPDU_SIZE_INVALID; -+ -+ _rtw_init_queue(&preorder_ctrl->pending_recvframe_queue); -+ -+ rtw_init_recv_timer(preorder_ctrl); -+ rtw_clear_bit(RTW_RECV_ACK_OR_TIMEOUT, &preorder_ctrl->rec_abba_rsp_ack); -+ -+ } -+ -+ -+ /* init for DM */ -+ psta->cmn.rssi_stat.rssi = (-1); -+ psta->cmn.rssi_stat.rssi_cck = (-1); -+ psta->cmn.rssi_stat.rssi_ofdm = (-1); -+#ifdef CONFIG_ATMEL_RC_PATCH -+ psta->flag_atmel_rc = 0; -+#endif -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ psta->tbtx_enable = _FALSE; -+#endif -+ /* init for the sequence number of received management frame */ -+ psta->RxMgmtFrameSeqNum = 0xffff; -+ _rtw_memset(&psta->sta_stats, 0, sizeof(struct stainfo_stats)); -+ -+ rtw_alloc_macid(pstapriv->padapter, psta); -+ -+ psta->tx_q_enable = 0; -+ _rtw_init_queue(&psta->tx_queue); -+ _init_workitem(&psta->tx_q_work, rtw_xmit_dequeue_callback, NULL); -+ } -+ -+exit: -+ -+ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); -+ -+ -+ if (psta) -+ rtw_mi_update_iface_status(&(pstapriv->padapter->mlmepriv), 0); -+ -+ return psta; -+} -+ -+ -+/* using pstapriv->sta_hash_lock to protect */ -+u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta) -+{ -+ int i; -+ _irqL irqL0; -+ _queue *pfree_sta_queue; -+ struct recv_reorder_ctrl *preorder_ctrl; -+ struct sta_xmit_priv *pstaxmitpriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct hw_xmit *phwxmit; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ int pending_qcnt[4]; -+ u8 is_pre_link_sta = _FALSE; -+ -+ if (psta == NULL) -+ goto exit; -+ -+#ifdef CONFIG_RTW_80211K -+ rm_post_event(padapter, RM_ID_FOR_ALL(psta->cmn.aid), RM_EV_cancel); -+#endif -+ -+ is_pre_link_sta = rtw_is_pre_link_sta(pstapriv, psta->cmn.mac_addr); -+ -+ if (is_pre_link_sta == _FALSE) { -+ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0); -+ rtw_list_delete(&psta->hash_list); -+ pstapriv->asoc_sta_count--; -+ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL0); -+ rtw_mi_update_iface_status(&(padapter->mlmepriv), 0); -+ } else { -+ _enter_critical_bh(&psta->lock, &irqL0); -+ psta->state = WIFI_FW_PRE_LINK; -+ _exit_critical_bh(&psta->lock, &irqL0); -+ } -+ -+ _enter_critical_bh(&psta->lock, &irqL0); -+ psta->state &= ~WIFI_ASOC_STATE; -+ _exit_critical_bh(&psta->lock, &irqL0); -+ -+ pfree_sta_queue = &pstapriv->free_sta_queue; -+ -+ -+ pstaxmitpriv = &psta->sta_xmitpriv; -+ -+ /* rtw_list_delete(&psta->sleep_list); */ -+ -+ /* rtw_list_delete(&psta->wakeup_list); */ -+ -+ rtw_free_xmitframe_queue(pxmitpriv, &psta->tx_queue); -+ _rtw_deinit_queue(&psta->tx_queue); -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL0); -+ -+ rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q); -+ psta->sleepq_len = 0; -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ rtw_free_mgmt_xmitframe_queue(pxmitpriv, &psta->mgmt_sleep_q); -+ psta->mgmt_sleepq_len = 0; -+#endif -+ -+ /* vo */ -+ /* _enter_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0); */ -+ rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vo_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending)); -+ phwxmit = pxmitpriv->hwxmits; -+ phwxmit->accnt -= pstaxmitpriv->vo_q.qcnt; -+ pending_qcnt[0] = pstaxmitpriv->vo_q.qcnt; -+ pstaxmitpriv->vo_q.qcnt = 0; -+ /* _exit_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0); */ -+ -+ /* vi */ -+ /* _enter_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0); */ -+ rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vi_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending)); -+ phwxmit = pxmitpriv->hwxmits + 1; -+ phwxmit->accnt -= pstaxmitpriv->vi_q.qcnt; -+ pending_qcnt[1] = pstaxmitpriv->vi_q.qcnt; -+ pstaxmitpriv->vi_q.qcnt = 0; -+ /* _exit_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0); */ -+ -+ /* be */ -+ /* _enter_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0); */ -+ rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->be_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); -+ phwxmit = pxmitpriv->hwxmits + 2; -+ phwxmit->accnt -= pstaxmitpriv->be_q.qcnt; -+ pending_qcnt[2] = pstaxmitpriv->be_q.qcnt; -+ pstaxmitpriv->be_q.qcnt = 0; -+ /* _exit_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0); */ -+ -+ /* bk */ -+ /* _enter_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0); */ -+ rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->bk_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending)); -+ phwxmit = pxmitpriv->hwxmits + 3; -+ phwxmit->accnt -= pstaxmitpriv->bk_q.qcnt; -+ pending_qcnt[3] = pstaxmitpriv->bk_q.qcnt; -+ pstaxmitpriv->bk_q.qcnt = 0; -+ /* _exit_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0); */ -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ /* mgmt */ -+ rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->mgmt_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->mgmt_q.tx_pending)); -+ phwxmit = pxmitpriv->hwxmits + 4; -+ phwxmit->accnt -= pstaxmitpriv->mgmt_q.qcnt; -+ pstaxmitpriv->mgmt_q.qcnt = 0; -+#endif -+ -+ rtw_os_wake_queue_at_free_stainfo(padapter, pending_qcnt); -+ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL0); -+ -+ -+ /* re-init sta_info; 20061114 */ /* will be init in alloc_stainfo */ -+ /* _rtw_init_sta_xmit_priv(&psta->sta_xmitpriv); */ -+ /* _rtw_init_sta_recv_priv(&psta->sta_recvpriv); */ -+#ifdef CONFIG_IEEE80211W -+ _cancel_timer_ex(&psta->dot11w_expire_timer); -+#endif /* CONFIG_IEEE80211W */ -+ _cancel_timer_ex(&psta->addba_retry_timer); -+ -+#ifdef CONFIG_TDLS -+ psta->tdls_sta_state = TDLS_STATE_NONE; -+#endif /* CONFIG_TDLS */ -+ -+ /* for A-MPDU Rx reordering buffer control, cancel reordering_ctrl_timer */ -+ for (i = 0; i < 16 ; i++) { -+ _irqL irqL; -+ _list *phead, *plist; -+ union recv_frame *prframe; -+ _queue *ppending_recvframe_queue; -+ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; -+ -+ preorder_ctrl = &psta->recvreorder_ctrl[i]; -+ rtw_clear_bit(RTW_RECV_ACK_OR_TIMEOUT, &preorder_ctrl->rec_abba_rsp_ack); -+ -+ _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); -+ -+ -+ ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; -+ -+ _enter_critical_bh(&ppending_recvframe_queue->lock, &irqL); -+ -+ phead = get_list_head(ppending_recvframe_queue); -+ plist = get_next(phead); -+ -+ while (!rtw_is_list_empty(phead)) { -+ prframe = LIST_CONTAINOR(plist, union recv_frame, u); -+ -+ plist = get_next(plist); -+ -+ rtw_list_delete(&(prframe->u.hdr.list)); -+ -+ rtw_free_recvframe(prframe, pfree_recv_queue); -+ } -+ -+ _exit_critical_bh(&ppending_recvframe_queue->lock, &irqL); -+ -+ } -+ -+ if (!((psta->state & WIFI_AP_STATE) || MacAddr_isBcst(psta->cmn.mac_addr)) && is_pre_link_sta == _FALSE) -+ rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _FALSE); -+ -+ -+ /* release mac id for non-bc/mc station, */ -+ if (is_pre_link_sta == _FALSE) -+ rtw_release_macid(pstapriv->padapter, psta); -+ -+#ifdef CONFIG_AP_MODE -+ -+ /* -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL0); -+ rtw_list_delete(&psta->asoc_list); -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL0); -+ */ -+ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL0); -+ if (!rtw_is_list_empty(&psta->auth_list)) { -+ rtw_list_delete(&psta->auth_list); -+ pstapriv->auth_list_cnt--; -+ } -+ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL0); -+ -+ psta->expire_to = 0; -+#ifdef CONFIG_ATMEL_RC_PATCH -+ psta->flag_atmel_rc = 0; -+#endif -+ psta->sleepq_ac_len = 0; -+ psta->qos_info = 0; -+ -+ psta->max_sp_len = 0; -+ psta->uapsd_bk = 0; -+ psta->uapsd_be = 0; -+ psta->uapsd_vi = 0; -+ psta->uapsd_vo = 0; -+ -+ psta->has_legacy_ac = 0; -+ -+#ifdef CONFIG_NATIVEAP_MLME -+ -+ if (pmlmeinfo->state == _HW_STATE_AP_) { -+ rtw_tim_map_clear(padapter, pstapriv->sta_dz_bitmap, psta->cmn.aid); -+ rtw_tim_map_clear(padapter, pstapriv->tim_bitmap, psta->cmn.aid); -+ -+ /* rtw_indicate_sta_disassoc_event(padapter, psta); */ -+ -+ if ((psta->cmn.aid > 0) && (pstapriv->sta_aid[psta->cmn.aid - 1] == psta)) { -+ pstapriv->sta_aid[psta->cmn.aid - 1] = NULL; -+ psta->cmn.aid = 0; -+ } -+ } -+ -+#endif /* CONFIG_NATIVEAP_MLME */ -+ -+#if !defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && defined(CONFIG_80211N_HT) -+ psta->under_exist_checking = 0; -+#endif -+ -+#endif /* CONFIG_AP_MODE */ -+ -+ rtw_st_ctl_deinit(&psta->st_ctl); -+ -+ if (is_pre_link_sta == _FALSE) { -+ _rtw_spinlock_free(&psta->lock); -+ -+ /* _enter_critical_bh(&(pfree_sta_queue->lock), &irqL0); */ -+ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0); -+ rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue)); -+ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL0); -+ /* _exit_critical_bh(&(pfree_sta_queue->lock), &irqL0); */ -+ } -+ -+exit: -+ return _SUCCESS; -+} -+ -+/* free all stainfo which in sta_hash[all] */ -+void rtw_free_all_stainfo(_adapter *padapter) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ s32 index; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *pbcmc_stainfo = rtw_get_bcmc_stainfo(padapter); -+ u8 free_sta_num = 0; -+ char free_sta_list[NUM_STA]; -+ int stainfo_offset; -+ -+ -+ if (pstapriv->asoc_sta_count == 1) -+ goto exit; -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (index = 0; index < NUM_STA; index++) { -+ phead = &(pstapriv->sta_hash[index]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info , hash_list); -+ -+ plist = get_next(plist); -+ -+ if (pbcmc_stainfo != psta) { -+ if (rtw_is_pre_link_sta(pstapriv, psta->cmn.mac_addr) == _FALSE) -+ rtw_list_delete(&psta->hash_list); -+ -+ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); -+ if (stainfo_offset_valid(stainfo_offset)) -+ free_sta_list[free_sta_num++] = stainfo_offset; -+ } -+ -+ } -+ } -+ -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ -+ for (index = 0; index < free_sta_num; index++) { -+ psta = rtw_get_stainfo_by_offset(pstapriv, free_sta_list[index]); -+ rtw_free_stainfo(padapter , psta); -+ } -+ -+exit: -+ return; -+} -+ -+/* any station allocated can be searched by hash list */ -+struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr) -+{ -+ -+ _irqL irqL; -+ -+ _list *plist, *phead; -+ -+ struct sta_info *psta = NULL; -+ -+ u32 index; -+ -+ const u8 *addr; -+ -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ -+ if (hwaddr == NULL) -+ return NULL; -+ -+ if (IS_MCAST(hwaddr)) -+ addr = bc_addr; -+ else -+ addr = hwaddr; -+ -+ index = wifi_mac_hash(addr); -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ phead = &(pstapriv->sta_hash[index]); -+ plist = get_next(phead); -+ -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ -+ if ((_rtw_memcmp(psta->cmn.mac_addr, addr, ETH_ALEN)) == _TRUE) { -+ /* if found the matched address */ -+ break; -+ } -+ psta = NULL; -+ plist = get_next(plist); -+ } -+ -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ return psta; -+ -+} -+ -+u32 rtw_init_bcmc_stainfo(_adapter *padapter) -+{ -+ -+ struct sta_info *psta; -+ struct tx_servq *ptxservq; -+ u32 res = _SUCCESS; -+ NDIS_802_11_MAC_ADDRESS bcast_addr = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ -+ psta = rtw_alloc_stainfo(pstapriv, bcast_addr); -+ -+ if (psta == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+#ifdef CONFIG_BEAMFORMING -+ psta->cmn.bf_info.g_id = 63; -+ psta->cmn.bf_info.p_aid = 0; -+#endif -+ -+ ptxservq = &(psta->sta_xmitpriv.be_q); -+ -+ /* -+ _enter_critical(&pstapending->lock, &irqL0); -+ -+ if (rtw_is_list_empty(&ptxservq->tx_pending)) -+ rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(pstapending)); -+ -+ _exit_critical(&pstapending->lock, &irqL0); -+ */ -+ -+exit: -+ return _SUCCESS; -+ -+} -+ -+ -+struct sta_info *rtw_get_bcmc_stainfo(_adapter *padapter) -+{ -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ psta = rtw_get_stainfo(pstapriv, bc_addr); -+ return psta; -+ -+} -+ -+#ifdef CONFIG_AP_MODE -+u16 rtw_aid_alloc(_adapter *adapter, struct sta_info *sta) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ u16 aid, i, used_cnt = 0; -+ -+ for (i = 0; i < stapriv->max_aid; i++) { -+ aid = ((i + stapriv->started_aid - 1) % stapriv->max_aid) + 1; -+ if (stapriv->sta_aid[aid - 1] == NULL) -+ break; -+ if (++used_cnt >= stapriv->max_num_sta) -+ break; -+ } -+ -+ /* check for aid limit and assoc limit */ -+ if (i >= stapriv->max_aid || used_cnt >= stapriv->max_num_sta) -+ aid = 0; -+ -+ sta->cmn.aid = aid; -+ if (aid) { -+ stapriv->sta_aid[aid - 1] = sta; -+ if (stapriv->rr_aid) -+ stapriv->started_aid = (aid % stapriv->max_aid) + 1; -+ } -+ -+ return aid; -+} -+ -+void dump_aid_status(void *sel, _adapter *adapter) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ u8 *aid_bmp; -+ u16 i, used_cnt = 0; -+ -+ aid_bmp = rtw_zmalloc(stapriv->aid_bmp_len); -+ if (!aid_bmp) -+ return; -+ -+ for (i = 1; i <= stapriv->max_aid; i++) { -+ if (stapriv->sta_aid[i - 1]) { -+ aid_bmp[i / 8] |= BIT(i % 8); -+ ++used_cnt; -+ } -+ } -+ -+ RTW_PRINT_SEL(sel, "used_cnt:%u/%u\n", used_cnt, stapriv->max_aid); -+ RTW_MAP_DUMP_SEL(sel, "aid_map:", aid_bmp, stapriv->aid_bmp_len); -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "%-2s %-11s\n", "rr", "started_aid"); -+ RTW_PRINT_SEL(sel, "%2d %11d\n", stapriv->rr_aid, stapriv->started_aid); -+ -+ rtw_mfree(aid_bmp, stapriv->aid_bmp_len); -+} -+#endif /* CONFIG_AP_MODE */ -+ -+#if CONFIG_RTW_MACADDR_ACL -+const char *const _acl_period_str[RTW_ACL_PERIOD_NUM] = { -+ "DEV", -+ "BSS", -+}; -+ -+const char *const _acl_mode_str[RTW_ACL_MODE_MAX] = { -+ "DISABLED", -+ "ACCEPT_UNLESS_LISTED", -+ "DENY_UNLESS_LISTED", -+}; -+ -+u8 _rtw_access_ctrl(_adapter *adapter, u8 period, const u8 *mac_addr) -+{ -+ u8 res = _TRUE; -+ _irqL irqL; -+ _list *list, *head; -+ struct rtw_wlan_acl_node *acl_node; -+ u8 match = _FALSE; -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct wlan_acl_pool *acl; -+ _queue *acl_node_q; -+ -+ if (period >= RTW_ACL_PERIOD_NUM) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ acl = &stapriv->acl_list[period]; -+ acl_node_q = &acl->acl_node_q; -+ -+ if (acl->mode != RTW_ACL_MODE_ACCEPT_UNLESS_LISTED -+ && acl->mode != RTW_ACL_MODE_DENY_UNLESS_LISTED) -+ goto exit; -+ -+ _enter_critical_bh(&(acl_node_q->lock), &irqL); -+ head = get_list_head(acl_node_q); -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ acl_node = LIST_CONTAINOR(list, struct rtw_wlan_acl_node, list); -+ list = get_next(list); -+ -+ if (_rtw_memcmp(acl_node->addr, mac_addr, ETH_ALEN)) { -+ if (acl_node->valid == _TRUE) { -+ match = _TRUE; -+ break; -+ } -+ } -+ } -+ _exit_critical_bh(&(acl_node_q->lock), &irqL); -+ -+ if (acl->mode == RTW_ACL_MODE_ACCEPT_UNLESS_LISTED) -+ res = (match == _TRUE) ? _FALSE : _TRUE; -+ else /* RTW_ACL_MODE_DENY_UNLESS_LISTED */ -+ res = (match == _TRUE) ? _TRUE : _FALSE; -+ -+exit: -+ return res; -+} -+ -+u8 rtw_access_ctrl(_adapter *adapter, const u8 *mac_addr) -+{ -+ int i; -+ -+ for (i = 0; i < RTW_ACL_PERIOD_NUM; i++) -+ if (_rtw_access_ctrl(adapter, i, mac_addr) == _FALSE) -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+void dump_macaddr_acl(void *sel, _adapter *adapter) -+{ -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct wlan_acl_pool *acl; -+ int i, j; -+ -+ for (j = 0; j < RTW_ACL_PERIOD_NUM; j++) { -+ RTW_PRINT_SEL(sel, "period:%s(%d)\n", acl_period_str(j), j); -+ -+ acl = &stapriv->acl_list[j]; -+ RTW_PRINT_SEL(sel, "mode:%s(%d)\n", acl_mode_str(acl->mode), acl->mode); -+ RTW_PRINT_SEL(sel, "num:%d/%d\n", acl->num, NUM_ACL); -+ for (i = 0; i < NUM_ACL; i++) { -+ if (acl->aclnode[i].valid == _FALSE) -+ continue; -+ RTW_PRINT_SEL(sel, MAC_FMT"\n", MAC_ARG(acl->aclnode[i].addr)); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ } -+} -+#endif /* CONFIG_RTW_MACADDR_ACL */ -+ -+bool rtw_is_pre_link_sta(struct sta_priv *stapriv, u8 *addr) -+{ -+#if CONFIG_RTW_PRE_LINK_STA -+ struct pre_link_sta_ctl_t *pre_link_sta_ctl = &stapriv->pre_link_sta_ctl; -+ struct sta_info *sta = NULL; -+ u8 exist = _FALSE; -+ int i; -+ _irqL irqL; -+ -+ _enter_critical_bh(&(pre_link_sta_ctl->lock), &irqL); -+ for (i = 0; i < RTW_PRE_LINK_STA_NUM; i++) { -+ if (pre_link_sta_ctl->node[i].valid == _TRUE -+ && _rtw_memcmp(pre_link_sta_ctl->node[i].addr, addr, ETH_ALEN) == _TRUE -+ ) { -+ exist = _TRUE; -+ break; -+ } -+ } -+ _exit_critical_bh(&(pre_link_sta_ctl->lock), &irqL); -+ -+ return exist; -+#else -+ return _FALSE; -+#endif -+} -+ -+#if CONFIG_RTW_PRE_LINK_STA -+struct sta_info *rtw_pre_link_sta_add(struct sta_priv *stapriv, u8 *hwaddr) -+{ -+ struct pre_link_sta_ctl_t *pre_link_sta_ctl = &stapriv->pre_link_sta_ctl; -+ struct pre_link_sta_node_t *node = NULL; -+ struct sta_info *sta = NULL; -+ u8 exist = _FALSE; -+ int i; -+ _irqL irqL; -+ -+ if (rtw_check_invalid_mac_address(hwaddr, _FALSE) == _TRUE) -+ goto exit; -+ -+ _enter_critical_bh(&(pre_link_sta_ctl->lock), &irqL); -+ for (i = 0; i < RTW_PRE_LINK_STA_NUM; i++) { -+ if (pre_link_sta_ctl->node[i].valid == _TRUE -+ && _rtw_memcmp(pre_link_sta_ctl->node[i].addr, hwaddr, ETH_ALEN) == _TRUE -+ ) { -+ node = &pre_link_sta_ctl->node[i]; -+ exist = _TRUE; -+ break; -+ } -+ -+ if (node == NULL && pre_link_sta_ctl->node[i].valid == _FALSE) -+ node = &pre_link_sta_ctl->node[i]; -+ } -+ -+ if (exist == _FALSE && node) { -+ _rtw_memcpy(node->addr, hwaddr, ETH_ALEN); -+ node->valid = _TRUE; -+ pre_link_sta_ctl->num++; -+ } -+ _exit_critical_bh(&(pre_link_sta_ctl->lock), &irqL); -+ -+ if (node == NULL) -+ goto exit; -+ -+ sta = rtw_get_stainfo(stapriv, hwaddr); -+ if (sta) -+ goto odm_hook; -+ -+ sta = rtw_alloc_stainfo(stapriv, hwaddr); -+ if (!sta) -+ goto exit; -+ -+ sta->state = WIFI_FW_PRE_LINK; -+ -+odm_hook: -+ rtw_hal_set_odm_var(stapriv->padapter, HAL_ODM_STA_INFO, sta, _TRUE); -+ -+exit: -+ return sta; -+} -+ -+void rtw_pre_link_sta_del(struct sta_priv *stapriv, u8 *hwaddr) -+{ -+ struct pre_link_sta_ctl_t *pre_link_sta_ctl = &stapriv->pre_link_sta_ctl; -+ struct pre_link_sta_node_t *node = NULL; -+ struct sta_info *sta = NULL; -+ u8 exist = _FALSE; -+ int i; -+ _irqL irqL; -+ -+ if (rtw_check_invalid_mac_address(hwaddr, _FALSE) == _TRUE) -+ goto exit; -+ -+ _enter_critical_bh(&(pre_link_sta_ctl->lock), &irqL); -+ for (i = 0; i < RTW_PRE_LINK_STA_NUM; i++) { -+ if (pre_link_sta_ctl->node[i].valid == _TRUE -+ && _rtw_memcmp(pre_link_sta_ctl->node[i].addr, hwaddr, ETH_ALEN) == _TRUE -+ ) { -+ node = &pre_link_sta_ctl->node[i]; -+ exist = _TRUE; -+ break; -+ } -+ } -+ -+ if (exist == _TRUE && node) { -+ node->valid = _FALSE; -+ pre_link_sta_ctl->num--; -+ } -+ _exit_critical_bh(&(pre_link_sta_ctl->lock), &irqL); -+ -+ if (exist == _FALSE) -+ goto exit; -+ -+ sta = rtw_get_stainfo(stapriv, hwaddr); -+ if (!sta) -+ goto exit; -+ -+ if (sta->state == WIFI_FW_PRE_LINK) -+ rtw_free_stainfo(stapriv->padapter, sta); -+ -+exit: -+ return; -+} -+ -+void rtw_pre_link_sta_ctl_reset(struct sta_priv *stapriv) -+{ -+ struct pre_link_sta_ctl_t *pre_link_sta_ctl = &stapriv->pre_link_sta_ctl; -+ struct pre_link_sta_node_t *node = NULL; -+ struct sta_info *sta = NULL; -+ int i, j = 0; -+ _irqL irqL; -+ -+ u8 addrs[RTW_PRE_LINK_STA_NUM][ETH_ALEN]; -+ -+ _rtw_memset(addrs, 0, RTW_PRE_LINK_STA_NUM * ETH_ALEN); -+ -+ _enter_critical_bh(&(pre_link_sta_ctl->lock), &irqL); -+ for (i = 0; i < RTW_PRE_LINK_STA_NUM; i++) { -+ if (pre_link_sta_ctl->node[i].valid == _FALSE) -+ continue; -+ _rtw_memcpy(&(addrs[j][0]), pre_link_sta_ctl->node[i].addr, ETH_ALEN); -+ pre_link_sta_ctl->node[i].valid = _FALSE; -+ pre_link_sta_ctl->num--; -+ j++; -+ } -+ _exit_critical_bh(&(pre_link_sta_ctl->lock), &irqL); -+ -+ for (i = 0; i < j; i++) { -+ sta = rtw_get_stainfo(stapriv, &(addrs[i][0])); -+ if (!sta) -+ continue; -+ -+ if (sta->state == WIFI_FW_PRE_LINK) -+ rtw_free_stainfo(stapriv->padapter, sta); -+ } -+} -+ -+void rtw_pre_link_sta_ctl_init(struct sta_priv *stapriv) -+{ -+ struct pre_link_sta_ctl_t *pre_link_sta_ctl = &stapriv->pre_link_sta_ctl; -+ int i; -+ -+ _rtw_spinlock_init(&pre_link_sta_ctl->lock); -+ pre_link_sta_ctl->num = 0; -+ for (i = 0; i < RTW_PRE_LINK_STA_NUM; i++) -+ pre_link_sta_ctl->node[i].valid = _FALSE; -+} -+ -+void rtw_pre_link_sta_ctl_deinit(struct sta_priv *stapriv) -+{ -+ struct pre_link_sta_ctl_t *pre_link_sta_ctl = &stapriv->pre_link_sta_ctl; -+ int i; -+ -+ rtw_pre_link_sta_ctl_reset(stapriv); -+ -+ _rtw_spinlock_free(&pre_link_sta_ctl->lock); -+} -+ -+void dump_pre_link_sta_ctl(void *sel, struct sta_priv *stapriv) -+{ -+ struct pre_link_sta_ctl_t *pre_link_sta_ctl = &stapriv->pre_link_sta_ctl; -+ int i; -+ -+ RTW_PRINT_SEL(sel, "num:%d/%d\n", pre_link_sta_ctl->num, RTW_PRE_LINK_STA_NUM); -+ -+ for (i = 0; i < RTW_PRE_LINK_STA_NUM; i++) { -+ if (pre_link_sta_ctl->node[i].valid == _FALSE) -+ continue; -+ RTW_PRINT_SEL(sel, MAC_FMT"\n", MAC_ARG(pre_link_sta_ctl->node[i].addr)); -+ } -+} -+#endif /* CONFIG_RTW_PRE_LINK_STA */ -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_swcrypto.c b/drivers/staging/rtl8723cs/core/rtw_swcrypto.c -new file mode 100644 -index 000000000000..3659b35768c6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_swcrypto.c -@@ -0,0 +1,296 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/** -+ * rtw_ccmp_encrypt - -+ * @key: the temporal key -+ * @hdrlen: mac header length -+ * @frame: the frame including the mac header, pn and payload -+ * @plen: payload length, i.e., length of the plain text, without PN and MIC -+ */ -+int _rtw_ccmp_encrypt(u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen) -+{ -+ u8 *enc = NULL; -+ size_t enc_len = 0; -+ -+ if (key_len == 16) { /* 128 bits */ -+ enc = ccmp_encrypt(key, -+ frame, -+ hdrlen + plen, -+ hdrlen, -+ (hdrlen == 26) ? (frame + hdrlen - 2) : NULL, -+ NULL, 0, &enc_len); -+ } else if (key_len == 32) { /* 256 bits */ -+ enc = ccmp_256_encrypt(key, -+ frame, -+ hdrlen + plen, -+ hdrlen, -+ (hdrlen == 26) ? (frame + hdrlen - 2) : NULL, -+ NULL, 0, &enc_len); -+ } -+ -+ if (enc == NULL) { -+ RTW_INFO("Failed to encrypt CCMP(%u) frame", key_len); -+ return _FAIL; -+ } -+ -+ /* Copy @enc back to @frame and free @enc */ -+ _rtw_memcpy(frame, enc, enc_len); -+ rtw_mfree(enc, enc_len + AES_BLOCK_SIZE); -+ -+ return _SUCCESS; -+} -+ -+ -+/** -+ * rtw_ccmp_decrypt - -+ * @key: the temporal key -+ * @hdrlen: length of the mac header -+ * @frame: the raw frame (@hdrlen + PN + enc_data + MIC) -+ * @plen: length of the frame (@hdrlen + PN + enc_data + MIC) -+ */ -+int _rtw_ccmp_decrypt(u8 *key, u32 key_len, uint hdrlen, u8 *frame, -+ uint plen) -+{ -+ u8 *plain = NULL; -+ size_t plain_len = 0; -+ const struct ieee80211_hdr *hdr; -+ -+ hdr = (const struct ieee80211_hdr *)frame; -+ -+ if (key_len == 16) { /* 128 bits */ -+ plain = ccmp_decrypt(key, -+ hdr, -+ frame + hdrlen, /* PN + enc_data + MIC */ -+ plen - hdrlen, /* PN + enc_data + MIC */ -+ &plain_len); -+ } else if (key_len == 32) { /* 256 bits */ -+ plain = ccmp_256_decrypt(key, -+ hdr, -+ frame + hdrlen, /* PN + enc_data + MIC */ -+ plen - hdrlen, /* PN + enc_data + MIC */ -+ &plain_len); -+ } -+ -+ if (plain == NULL) { -+ RTW_INFO("Failed to decrypt CCMP(%u) frame", key_len); -+ return _FAIL; -+ } -+ -+ /* Copy @plain back to @frame and free @plain */ -+ _rtw_memcpy(frame + hdrlen + 8, plain, plain_len); -+ rtw_mfree(plain, plen - hdrlen + AES_BLOCK_SIZE); -+ -+ RTW_DBG_DUMP("ccmp_decrypt(): decrypted frame\n", -+ frame, hdrlen + 8 + plen); -+ -+ return _SUCCESS; -+} -+ -+ -+#ifdef CONFIG_RTW_MESH_AEK -+/* wrapper to ase_siv_encrypt and aes_siv_decrypt */ -+int _aes_siv_encrypt(const u8 *key, size_t key_len, -+ const u8 *pw, size_t pwlen, -+ size_t num_elem, const u8 *addr[], const size_t *len, u8 *out) -+{ -+ return aes_siv_encrypt(key, key_len, pw, pwlen, num_elem, addr, len, out); -+} -+int _aes_siv_decrypt(const u8 *key, size_t key_len, -+ const u8 *iv_crypt, size_t iv_c_len, -+ size_t num_elem, const u8 *addr[], const size_t *len, u8 *out) -+{ -+ return aes_siv_decrypt(key, key_len, iv_crypt, iv_c_len, num_elem, addr, len, out); -+} -+#endif -+ -+ -+/** -+ * _rtw_gcmp_encrypt - -+ * @key: the temporal key -+ * @hdrlen: mac header length -+ * @frame: the frame including the mac header, pn and payload -+ * @plen: payload length, i.e., length of the plain text, without PN and MIC -+ */ -+int _rtw_gcmp_encrypt(u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen) -+{ -+ u8 *enc = NULL; -+ size_t enc_len = 0; -+ -+ enc = gcmp_encrypt(key, key_len, -+ frame, -+ hdrlen + plen, -+ hdrlen, -+ (hdrlen == 26) ? (frame + hdrlen - 2) : NULL, -+ NULL, 0, &enc_len); -+ if (enc == NULL) { -+ RTW_INFO("Failed to encrypt GCMP frame"); -+ return _FAIL; -+ } -+ -+ /* Copy @enc back to @frame and free @enc */ -+ _rtw_memcpy(frame, enc, enc_len); -+ rtw_mfree(enc, enc_len + AES_BLOCK_SIZE); -+ -+ return _SUCCESS; -+} -+ -+ -+/** -+ * _rtw_gcmp_decrypt - -+ * @key: the temporal key -+ * @hdrlen: length of the mac header -+ * @frame: the raw frame (@hdrlen + PN + enc_data + MIC) -+ * @plen: length of the frame (@hdrlen + PN + enc_data + MIC) -+ */ -+int _rtw_gcmp_decrypt(u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen) -+{ -+ u8 *plain = NULL; -+ size_t plain_len = 0; -+ const struct ieee80211_hdr *hdr; -+ -+ hdr = (const struct ieee80211_hdr *)frame; -+ -+ plain = gcmp_decrypt(key, key_len, -+ hdr, -+ frame + hdrlen, /* PN + enc_data + MIC */ -+ plen - hdrlen, /* PN + enc_data + MIC */ -+ &plain_len); -+ -+ if (plain == NULL) { -+ RTW_INFO("Failed to decrypt GCMP(%u) frame", key_len); -+ return _FAIL; -+ } -+ -+ /* Copy @plain back to @frame and free @plain */ -+ _rtw_memcpy(frame + hdrlen + 8, plain, plain_len); -+ rtw_mfree(plain, plen - hdrlen + AES_BLOCK_SIZE); -+ -+ RTW_DBG_DUMP("gcmp_decipher(): decrypted frame\n", -+ frame, hdrlen + 8 + plen); -+ -+ return _SUCCESS; -+} -+ -+ -+#if defined(CONFIG_IEEE80211W) | defined(CONFIG_TDLS) -+u8 _bip_ccmp_protect(const u8 *key, size_t key_len, -+ const u8 *data, size_t data_len, u8 *mic) -+{ -+ u8 res = _SUCCESS; -+ -+ if (key_len == 16) { -+ if (omac1_aes_128(key, data, data_len, mic)) { -+ res = _FAIL; -+ RTW_ERR("%s : omac1_aes_128 fail!", __func__); -+ } -+ } else if (key_len == 32) { -+ if (omac1_aes_256(key, data, data_len, mic)) { -+ res = _FAIL; -+ RTW_ERR("%s : omac1_aes_256 fail!", __func__); -+ } -+ } else { -+ RTW_ERR("%s : key_len not match!", __func__); -+ res = _FAIL; -+ } -+ -+ return res; -+} -+ -+ -+u8 _bip_gcmp_protect(u8 *whdr_pos, size_t len, -+ const u8 *key, size_t key_len, -+ const u8 *data, size_t data_len, u8 *mic) -+{ -+ u8 res = _SUCCESS; -+ u32 mic_len = 16; -+ u8 nonce[12], *npos; -+ const u8 *gcmp_ipn; -+ -+ gcmp_ipn = whdr_pos + len - mic_len - 6; -+ -+ /* Nonce: A2 | IPN */ -+ _rtw_memcpy(nonce, get_addr2_ptr(whdr_pos), ETH_ALEN); -+ npos = nonce + ETH_ALEN; -+ *npos++ = gcmp_ipn[5]; -+ *npos++ = gcmp_ipn[4]; -+ *npos++ = gcmp_ipn[3]; -+ *npos++ = gcmp_ipn[2]; -+ *npos++ = gcmp_ipn[1]; -+ *npos++ = gcmp_ipn[0]; -+ -+ if (aes_gmac(key, key_len, nonce, sizeof(nonce), -+ data, data_len, mic)) { -+ res = _FAIL; -+ RTW_ERR("%s : aes_gmac fail!", __func__); -+ } -+ -+ return res; -+} -+#endif /* CONFIG_IEEE80211W */ -+ -+ -+#ifdef CONFIG_TDLS -+void _tdls_generate_tpk(void *sta, const u8 *own_addr, const u8 *bssid) -+{ -+ struct sta_info *psta = (struct sta_info *)sta; -+ u8 *SNonce = psta->SNonce; -+ u8 *ANonce = psta->ANonce; -+ -+ u8 key_input[SHA256_MAC_LEN]; -+ const u8 *nonce[2]; -+ size_t len[2]; -+ u8 data[3 * ETH_ALEN]; -+ -+ /* IEEE Std 802.11z-2010 8.5.9.1: -+ * TPK-Key-Input = SHA-256(min(SNonce, ANonce) || max(SNonce, ANonce)) -+ */ -+ len[0] = 32; -+ len[1] = 32; -+ if (_rtw_memcmp2(SNonce, ANonce, 32) < 0) { -+ nonce[0] = SNonce; -+ nonce[1] = ANonce; -+ } else { -+ nonce[0] = ANonce; -+ nonce[1] = SNonce; -+ } -+ -+ sha256_vector(2, nonce, len, key_input); -+ -+ /* -+ * TPK = KDF-Hash-Length(TPK-Key-Input, "TDLS PMK", -+ * min(MAC_I, MAC_R) || max(MAC_I, MAC_R) || BSSID) -+ */ -+ -+ if (_rtw_memcmp2(own_addr, psta->cmn.mac_addr, ETH_ALEN) < 0) { -+ _rtw_memcpy(data, own_addr, ETH_ALEN); -+ _rtw_memcpy(data + ETH_ALEN, psta->cmn.mac_addr, ETH_ALEN); -+ } else { -+ _rtw_memcpy(data, psta->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy(data + ETH_ALEN, own_addr, ETH_ALEN); -+ } -+ -+ _rtw_memcpy(data + 2 * ETH_ALEN, bssid, ETH_ALEN); -+ -+ sha256_prf(key_input, SHA256_MAC_LEN, "TDLS PMK", data, sizeof(data), (u8 *)&psta->tpk, sizeof(psta->tpk)); -+} -+#endif /* CONFIG_TDLS */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_tdls.c b/drivers/staging/rtl8723cs/core/rtw_tdls.c -new file mode 100644 -index 000000000000..d557234109be ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_tdls.c -@@ -0,0 +1,3516 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_TDLS_C_ -+ -+#include -+#include -+ -+#ifdef CONFIG_TDLS -+#define ONE_SEC 1000 /* 1000 ms */ -+ -+extern unsigned char MCS_rate_2R[16]; -+extern unsigned char MCS_rate_1R[16]; -+ -+inline void rtw_tdls_set_link_established(_adapter *adapter, bool en) -+{ -+ adapter->tdlsinfo.link_established = en; -+ rtw_mi_update_iface_status(&(adapter->mlmepriv), 0); -+} -+ -+void rtw_reset_tdls_info(_adapter *padapter) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ ptdlsinfo->ap_prohibited = _FALSE; -+ -+ /* For TDLS channel switch, currently we only allow it to work in wifi logo test mode */ -+ if (padapter->registrypriv.wifi_spec == 1) -+ ptdlsinfo->ch_switch_prohibited = _FALSE; -+ else -+ ptdlsinfo->ch_switch_prohibited = _TRUE; -+ -+ rtw_tdls_set_link_established(padapter, _FALSE); -+ ptdlsinfo->sta_cnt = 0; -+ ptdlsinfo->sta_maximum = _FALSE; -+ -+#ifdef CONFIG_TDLS_CH_SW -+ ptdlsinfo->chsw_info.ch_sw_state = TDLS_STATE_NONE; -+ ATOMIC_SET(&ptdlsinfo->chsw_info.chsw_on, _FALSE); -+ ptdlsinfo->chsw_info.off_ch_num = 0; -+ ptdlsinfo->chsw_info.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ ptdlsinfo->chsw_info.cur_time = 0; -+ ptdlsinfo->chsw_info.delay_switch_back = _FALSE; -+ ptdlsinfo->chsw_info.dump_stack = _FALSE; -+#endif -+ -+ ptdlsinfo->ch_sensing = 0; -+ ptdlsinfo->watchdog_count = 0; -+ ptdlsinfo->dev_discovered = _FALSE; -+ -+#ifdef CONFIG_WFD -+ ptdlsinfo->wfd_info = &padapter->wfd_info; -+#endif -+ -+ ptdlsinfo->tdls_sctx = NULL; -+} -+ -+int rtw_init_tdls_info(_adapter *padapter) -+{ -+ int res = _SUCCESS; -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ rtw_reset_tdls_info(padapter); -+ -+#ifdef CONFIG_TDLS_DRIVER_SETUP -+ ptdlsinfo->driver_setup = _TRUE; -+#else -+ ptdlsinfo->driver_setup = _FALSE; -+#endif /* CONFIG_TDLS_DRIVER_SETUP */ -+ -+ _rtw_spinlock_init(&ptdlsinfo->cmd_lock); -+ _rtw_spinlock_init(&ptdlsinfo->hdl_lock); -+ -+ return res; -+ -+} -+ -+void rtw_free_tdls_info(struct tdls_info *ptdlsinfo) -+{ -+ _rtw_spinlock_free(&ptdlsinfo->cmd_lock); -+ _rtw_spinlock_free(&ptdlsinfo->hdl_lock); -+ -+ _rtw_memset(ptdlsinfo, 0, sizeof(struct tdls_info)); -+ -+} -+ -+void rtw_free_all_tdls_sta(_adapter *padapter, u8 enqueue_cmd) -+{ -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ _irqL irqL; -+ _list *plist, *phead; -+ s32 index; -+ struct sta_info *psta = NULL; -+ struct sta_info *ptdls_sta[NUM_STA]; -+ u8 empty_hwaddr[ETH_ALEN] = { 0x00 }; -+ -+ _rtw_memset(ptdls_sta, 0x00, sizeof(ptdls_sta)); -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ for (index = 0; index < NUM_STA; index++) { -+ phead = &(pstapriv->sta_hash[index]); -+ plist = get_next(phead); -+ -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ -+ plist = get_next(plist); -+ -+ if (psta->tdls_sta_state != TDLS_STATE_NONE) -+ ptdls_sta[index] = psta; -+ } -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (index = 0; index < NUM_STA; index++) { -+ if (ptdls_sta[index]) { -+ struct TDLSoption_param tdls_param; -+ -+ psta = ptdls_sta[index]; -+ -+ RTW_INFO("Do tear down to "MAC_FMT" by enqueue_cmd = %d\n", MAC_ARG(psta->cmn.mac_addr), enqueue_cmd); -+ -+ _rtw_memcpy(&(tdls_param.addr), psta->cmn.mac_addr, ETH_ALEN); -+ tdls_param.option = TDLS_TEARDOWN_STA_NO_WAIT; -+ tdls_hdl(padapter, (unsigned char *)&(tdls_param)); -+ -+ rtw_tdls_teardown_pre_hdl(padapter, psta); -+ -+ if (enqueue_cmd == _TRUE) -+ rtw_tdls_cmd(padapter, psta->cmn.mac_addr, TDLS_TEARDOWN_STA_LOCALLY_POST); -+ else -+ { -+ tdls_param.option = TDLS_TEARDOWN_STA_LOCALLY_POST; -+ tdls_hdl(padapter, (unsigned char *)&(tdls_param)); -+ } -+ } -+ } -+} -+ -+int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len) -+{ -+ u8 tdls_prohibited_bit = 0x40; /* bit(38); TDLS_prohibited */ -+ -+ if (pkt_len < 5) -+ return _FALSE; -+ -+ pframe += 4; -+ if ((*pframe) & tdls_prohibited_bit) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+int check_ap_tdls_ch_switching_prohibited(u8 *pframe, u8 pkt_len) -+{ -+ u8 tdls_ch_swithcing_prohibited_bit = 0x80; /* bit(39); TDLS_channel_switching prohibited */ -+ -+ if (pkt_len < 5) -+ return _FALSE; -+ -+ pframe += 4; -+ if ((*pframe) & tdls_ch_swithcing_prohibited_bit) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+u8 rtw_is_tdls_enabled(_adapter *padapter) -+{ -+ return padapter->registrypriv.en_tdls; -+} -+ -+void rtw_set_tdls_enable(_adapter *padapter, u8 enable) -+{ -+ padapter->registrypriv.en_tdls = enable; -+ RTW_INFO("%s: en_tdls = %d\n", __func__, rtw_is_tdls_enabled(padapter)); -+} -+ -+void rtw_enable_tdls_func(_adapter *padapter) -+{ -+ if (rtw_is_tdls_enabled(padapter) == _TRUE) -+ return; -+ -+#if 0 -+#ifdef CONFIG_MCC_MODE -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC) == _TRUE) { -+ RTW_INFO("[TDLS] MCC is running, can't enable TDLS !\n"); -+ return; -+ } -+#endif -+#endif -+ rtw_set_tdls_enable(padapter, _TRUE); -+} -+ -+void rtw_disable_tdls_func(_adapter *padapter, u8 enqueue_cmd) -+{ -+ if (rtw_is_tdls_enabled(padapter) == _FALSE) -+ return; -+ -+ rtw_free_all_tdls_sta(padapter, enqueue_cmd); -+ rtw_tdls_cmd(padapter, NULL, TDLS_RS_RCR); -+ rtw_reset_tdls_info(padapter); -+ -+ rtw_set_tdls_enable(padapter, _FALSE); -+} -+ -+u8 rtw_is_tdls_sta_existed(_adapter *padapter) -+{ -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ int i = 0; -+ _irqL irqL; -+ _list *plist, *phead; -+ u8 ret = _FALSE; -+ -+ if (rtw_is_tdls_enabled(padapter) == _FALSE) -+ return _FALSE; -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ if (psta->tdls_sta_state != TDLS_STATE_NONE) { -+ ret = _TRUE; -+ goto Exit; -+ } -+ } -+ } -+ -+Exit: -+ -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ return ret; -+} -+ -+u8 rtw_tdls_is_setup_allowed(_adapter *padapter) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ if (is_client_associated_to_ap(padapter) == _FALSE) -+ return _FALSE; -+ -+ if (ptdlsinfo->ap_prohibited == _TRUE) -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+#ifdef CONFIG_TDLS_CH_SW -+u8 rtw_tdls_is_chsw_allowed(_adapter *padapter) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ if (ptdlsinfo->ch_switch_prohibited == _TRUE) -+ return _FALSE; -+ -+ if (padapter->registrypriv.wifi_spec == 0) -+ return _FALSE; -+ -+ return _TRUE; -+} -+#endif -+ -+int _issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int wait_ms) -+{ -+ int ret = _FAIL; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl, *qc; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ pattrib->hdrlen += 2; -+ pattrib->qos_en = _TRUE; -+ pattrib->eosp = 1; -+ pattrib->ack_policy = 0; -+ pattrib->mdata = 0; -+ pattrib->retry_ctrl = _FALSE; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ if (power_mode) -+ SetPwrMgt(fctrl); -+ -+ qc = (unsigned short *)(pframe + pattrib->hdrlen - 2); -+ -+ SetPriority(qc, 7); /* Set priority to VO */ -+ -+ SetEOSP(qc, pattrib->eosp); -+ -+ SetAckpolicy(qc, pattrib->ack_policy); -+ -+ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_QOS_DATA_NULL); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr_qos); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ if (wait_ms) -+ ret = dump_mgntframe_and_wait_ack_timeout(padapter, pmgntframe, wait_ms); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ return ret; -+ -+} -+ -+/* -+ *wait_ms == 0 means that there is no need to wait ack through C2H_CCX_TX_RPT -+ *wait_ms > 0 means you want to wait ack through C2H_CCX_TX_RPT, and the value of wait_ms means the interval between each TX -+ *try_cnt means the maximal TX count to try -+ */ -+int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms) -+{ -+ int ret; -+ int i = 0; -+ systime start = rtw_get_current_time(); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+#if 0 -+ psta = rtw_get_stainfo(&padapter->stapriv, da); -+ if (psta) { -+ if (power_mode) -+ rtw_hal_macid_sleep(padapter, psta->cmn.mac_id); -+ else -+ rtw_hal_macid_wakeup(padapter, psta->cmn.mac_id); -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT ": Can't find sta info for " MAC_FMT ", skip macid %s!!\n", -+ FUNC_ADPT_ARG(padapter), MAC_ARG(da), power_mode ? "sleep" : "wakeup"); -+ rtw_warn_on(1); -+ } -+#endif -+ -+ do { -+ ret = _issue_nulldata_to_TDLS_peer_STA(padapter, da, power_mode, wait_ms); -+ -+ i++; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ break; -+ -+ if (i < try_cnt && wait_ms > 0 && ret == _FAIL) -+ rtw_msleep_os(wait_ms); -+ -+ } while ((i < try_cnt) && (ret == _FAIL || wait_ms == 0)); -+ -+ if (ret != _FAIL) { -+ ret = _SUCCESS; -+#ifndef DBG_XMIT_ACK -+ goto exit; -+#endif -+ } -+ -+ if (try_cnt && wait_ms) { -+ if (da) -+ RTW_INFO(FUNC_ADPT_FMT" to "MAC_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), MAC_ARG(da), rtw_get_oper_ch(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT", ch:%u%s, %d/%d in %u ms\n", -+ FUNC_ADPT_ARG(padapter), rtw_get_oper_ch(padapter), -+ ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start)); -+ } -+exit: -+ return ret; -+} -+ -+/* TDLS encryption(if needed) will always be CCMP */ -+void rtw_tdls_set_key(_adapter *padapter, struct sta_info *ptdls_sta) -+{ -+ ptdls_sta->dot118021XPrivacy = _AES_; -+ rtw_setstakey_cmd(padapter, ptdls_sta, TDLS_KEY, _TRUE); -+} -+ -+#ifdef CONFIG_80211N_HT -+void rtw_tdls_process_ht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ u8 max_AMPDU_len, min_MPDU_spacing; -+ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0; -+ -+ /* Save HT capabilities in the sta object */ -+ _rtw_memset(&ptdls_sta->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); -+ if (data && Length >= sizeof(struct rtw_ieee80211_ht_cap)) { -+ ptdls_sta->flags |= WLAN_STA_HT; -+ ptdls_sta->flags |= WLAN_STA_WME; -+ -+ _rtw_memcpy(&ptdls_sta->htpriv.ht_cap, data, sizeof(struct rtw_ieee80211_ht_cap)); -+ } else { -+ ptdls_sta->flags &= ~WLAN_STA_HT; -+ return; -+ } -+ -+ if (ptdls_sta->flags & WLAN_STA_HT) { -+ if (padapter->registrypriv.ht_enable == _TRUE && is_supported_ht(padapter->registrypriv.wireless_mode) ) { -+ ptdls_sta->htpriv.ht_option = _TRUE; -+ ptdls_sta->qos_option = _TRUE; -+ } else { -+ ptdls_sta->htpriv.ht_option = _FALSE; -+ ptdls_sta->qos_option = _FALSE; -+ } -+ } -+ -+ /* HT related cap */ -+ if (ptdls_sta->htpriv.ht_option) { -+ /* Check if sta supports rx ampdu */ -+ if (padapter->registrypriv.ampdu_enable == 1) -+ ptdls_sta->htpriv.ampdu_enable = _TRUE; -+ -+ /* AMPDU Parameters field */ -+ /* Get MIN of MAX AMPDU Length Exp */ -+ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (data[2] & 0x3)) -+ max_AMPDU_len = (data[2] & 0x3); -+ else -+ max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3); -+ /* Get MAX of MIN MPDU Start Spacing */ -+ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (data[2] & 0x1c)) -+ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c); -+ else -+ min_MPDU_spacing = (data[2] & 0x1c); -+ ptdls_sta->htpriv.rx_ampdu_min_spacing = max_AMPDU_len | min_MPDU_spacing; -+ -+ /* Check if sta support s Short GI 20M */ -+ if ((phtpriv->sgi_20m == _TRUE) && (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_20))) -+ ptdls_sta->htpriv.sgi_20m = _TRUE; -+ -+ /* Check if sta support s Short GI 40M */ -+ if ((phtpriv->sgi_40m == _TRUE) && (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_40))) -+ ptdls_sta->htpriv.sgi_40m = _TRUE; -+ -+ /* Bwmode would still followed AP's setting */ -+ if (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) { -+ if (padapter->mlmeextpriv.cur_bwmode >= CHANNEL_WIDTH_40) -+ ptdls_sta->cmn.bw_mode = CHANNEL_WIDTH_40; -+ ptdls_sta->htpriv.ch_offset = padapter->mlmeextpriv.cur_ch_offset; -+ } -+ -+ /* Config LDPC Coding Capability */ -+ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAP_ELE_LDPC_CAP(data)) { -+ SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); -+ RTW_INFO("Enable HT Tx LDPC!\n"); -+ } -+ ptdls_sta->htpriv.ldpc_cap = cur_ldpc_cap; -+ -+ /* Config STBC setting */ -+ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_RX_STBC(data)) { -+ SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX)); -+ RTW_INFO("Enable HT Tx STBC!\n"); -+ } -+ ptdls_sta->htpriv.stbc_cap = cur_stbc_cap; -+ -+#ifdef CONFIG_BEAMFORMING -+ /* Config Tx beamforming setting */ -+ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(data)) -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); -+ -+ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(data)) -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); -+ ptdls_sta->htpriv.beamform_cap = cur_beamform_cap; -+ if (cur_beamform_cap) -+ RTW_INFO("Client HT Beamforming Cap = 0x%02X\n", cur_beamform_cap); -+#endif /* CONFIG_BEAMFORMING */ -+ } -+ -+} -+ -+u8 *rtw_tdls_set_ht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ rtw_ht_use_default_setting(padapter); -+ -+ if (padapter->registrypriv.wifi_spec == 1) { -+ padapter->mlmepriv.htpriv.sgi_20m = _FALSE; -+ padapter->mlmepriv.htpriv.sgi_40m = _FALSE; -+ } -+ -+ rtw_restructure_ht_ie(padapter, NULL, pframe, 0, &(pattrib->pktlen), padapter->mlmeextpriv.cur_channel); -+ -+ return pframe + pattrib->pktlen; -+} -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, tx_nss = 0; -+ u16 cur_beamform_cap = 0; -+ u8 *pcap_mcs; -+ -+ _rtw_memset(&ptdls_sta->vhtpriv, 0, sizeof(struct vht_priv)); -+ if (data && Length == 12) { -+ ptdls_sta->flags |= WLAN_STA_VHT; -+ -+ _rtw_memcpy(ptdls_sta->vhtpriv.vht_cap, data, 12); -+ -+#if 0 -+ if (elems.vht_op_mode_notify && elems.vht_op_mode_notify_len == 1) -+ _rtw_memcpy(&pstat->vhtpriv.vht_op_mode_notify, elems.vht_op_mode_notify, 1); -+ else /* for Frame without Operating Mode notify ie; default: 80M */ -+ pstat->vhtpriv.vht_op_mode_notify = CHANNEL_WIDTH_80; -+#else -+ ptdls_sta->vhtpriv.vht_op_mode_notify = CHANNEL_WIDTH_80; -+#endif -+ } else { -+ ptdls_sta->flags &= ~WLAN_STA_VHT; -+ return; -+ } -+ -+ if (ptdls_sta->flags & WLAN_STA_VHT) { -+ if (REGSTY_IS_11AC_ENABLE(&padapter->registrypriv) -+ && is_supported_vht(padapter->registrypriv.wireless_mode) -+ && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))) { -+ ptdls_sta->vhtpriv.vht_option = _TRUE; -+ ptdls_sta->cmn.ra_info.is_vht_enable = _TRUE; -+ } -+ else -+ ptdls_sta->vhtpriv.vht_option = _FALSE; -+ } -+ -+ /* B4 Rx LDPC */ -+ if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_LDPC(data)) { -+ SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); -+ RTW_INFO("Current VHT LDPC Setting = %02X\n", cur_ldpc_cap); -+ } -+ ptdls_sta->vhtpriv.ldpc_cap = cur_ldpc_cap; -+ -+ /* B5 Short GI for 80 MHz */ -+ ptdls_sta->vhtpriv.sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(data) & pvhtpriv->sgi_80m) ? _TRUE : _FALSE; -+ -+ /* B8 B9 B10 Rx STBC */ -+ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_STBC(data)) { -+ SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); -+ RTW_INFO("Current VHT STBC Setting = %02X\n", cur_stbc_cap); -+ } -+ ptdls_sta->vhtpriv.stbc_cap = cur_stbc_cap; -+ -+ #ifdef CONFIG_BEAMFORMING -+ /* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFEE(data)) -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ -+ /* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFER(data)) -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ ptdls_sta->vhtpriv.beamform_cap = cur_beamform_cap; -+ ptdls_sta->cmn.bf_info.vht_beamform_cap = cur_beamform_cap; -+ if (cur_beamform_cap) -+ RTW_INFO("Current VHT Beamforming Setting = %02X\n", cur_beamform_cap); -+ #endif /*CONFIG_BEAMFORMING*/ -+ -+ /* B23 B24 B25 Maximum A-MPDU Length Exponent */ -+ ptdls_sta->vhtpriv.ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(data); -+ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(data); -+ tx_nss = GET_HAL_TX_NSS(padapter); -+ rtw_vht_nss_to_mcsmap(tx_nss, ptdls_sta->vhtpriv.vht_mcs_map, pcap_mcs); -+ ptdls_sta->vhtpriv.vht_highest_rate = rtw_get_vht_highest_rate(ptdls_sta->vhtpriv.vht_mcs_map); -+} -+ -+void rtw_tdls_process_vht_operation(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct registry_priv *regsty = adapter_to_regsty(padapter); -+ u8 operation_bw = 0; -+ -+ if (GET_VHT_OPERATION_ELE_CHL_WIDTH(data) >= 1) { -+ -+ operation_bw = CHANNEL_WIDTH_80; -+ -+ if (hal_is_bw_support(padapter, operation_bw) && REGSTY_IS_BW_5G_SUPPORT(regsty, operation_bw) -+ && (operation_bw <= pmlmeext->cur_bwmode)) -+ ptdls_sta->cmn.bw_mode = operation_bw; -+ else -+ ptdls_sta->cmn.bw_mode = pmlmeext->cur_bwmode; -+ } else -+ ptdls_sta->cmn.bw_mode = pmlmeext->cur_bwmode; -+} -+ -+void rtw_tdls_process_vht_op_mode_notify(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct registry_priv *regsty = adapter_to_regsty(padapter); -+ u8 target_bw; -+ u8 target_rxss, current_rxss; -+ -+ if (pvhtpriv->vht_option == _FALSE) -+ return; -+ -+ target_bw = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(data); -+ target_rxss = (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(data) + 1); -+ -+ if (hal_is_bw_support(padapter, target_bw) && REGSTY_IS_BW_5G_SUPPORT(regsty, target_bw) -+ && (target_bw <= pmlmeext->cur_bwmode)) -+ ptdls_sta->cmn.bw_mode = target_bw; -+ else -+ ptdls_sta->cmn.bw_mode = pmlmeext->cur_bwmode; -+ -+ current_rxss = rtw_vht_mcsmap_to_nss(ptdls_sta->vhtpriv.vht_mcs_map); -+ if (target_rxss != current_rxss) { -+ u8 vht_mcs_map[2] = {}; -+ -+ rtw_vht_nss_to_mcsmap(target_rxss, vht_mcs_map, ptdls_sta->vhtpriv.vht_mcs_map); -+ _rtw_memcpy(ptdls_sta->vhtpriv.vht_mcs_map, vht_mcs_map, 2); -+ } -+} -+ -+u8 *rtw_tdls_set_aid(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ return rtw_set_ie(pframe, EID_AID, 2, (u8 *)&(padapter->mlmepriv.cur_network.aid), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_vht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u32 ie_len = 0; -+ -+ rtw_vht_use_default_setting(padapter); -+ -+ ie_len = rtw_build_vht_cap_ie(padapter, pframe); -+ pattrib->pktlen += ie_len; -+ -+ return pframe + ie_len; -+} -+ -+u8 *rtw_tdls_set_vht_operation(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib, u8 channel) -+{ -+ u32 ie_len = 0; -+ -+ ie_len = rtw_build_vht_operation_ie(padapter, pframe, channel); -+ pattrib->pktlen += ie_len; -+ -+ return pframe + ie_len; -+} -+ -+u8 *rtw_tdls_set_vht_op_mode_notify(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib, u8 bw) -+{ -+ u32 ie_len = 0; -+ -+ ie_len = rtw_build_vht_op_mode_notify_ie(padapter, pframe, bw); -+ pattrib->pktlen += ie_len; -+ -+ return pframe + ie_len; -+} -+#endif -+ -+ -+u8 *rtw_tdls_set_sup_ch(_adapter *adapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ u8 sup_ch[30 * 2] = {0x00}, ch_set_idx = 0, sup_ch_idx = 2; -+ -+ while (ch_set_idx < rfctl->max_chan_nums && rfctl->channel_set[ch_set_idx].ChannelNum != 0) { -+ if (rfctl->channel_set[ch_set_idx].ChannelNum <= 14) { -+ /* TODO: fix 2.4G supported channel when channel doesn't start from 1 and continuous */ -+ sup_ch[0] = 1; /* First channel number */ -+ sup_ch[1] = rfctl->channel_set[ch_set_idx].ChannelNum; /* Number of channel */ -+ } else { -+ sup_ch[sup_ch_idx++] = rfctl->channel_set[ch_set_idx].ChannelNum; -+ sup_ch[sup_ch_idx++] = 1; -+ } -+ ch_set_idx++; -+ } -+ -+ return rtw_set_ie(pframe, _SUPPORTED_CH_IE_, sup_ch_idx, sup_ch, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_rsnie(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, int init, struct sta_info *ptdls_sta) -+{ -+ u8 *p = NULL; -+ int len = 0; -+ -+ if (ptxmgmt->len > 0) -+ p = rtw_get_ie(ptxmgmt->buf, _RSN_IE_2_, &len, ptxmgmt->len); -+ -+ if (p != NULL) -+ return rtw_set_ie(pframe, _RSN_IE_2_, len, p + 2, &(pattrib->pktlen)); -+ else if (init == _TRUE) -+ return rtw_set_ie(pframe, _RSN_IE_2_, sizeof(TDLS_RSNIE), TDLS_RSNIE, &(pattrib->pktlen)); -+ else -+ return rtw_set_ie(pframe, _RSN_IE_2_, sizeof(ptdls_sta->TDLS_RSNIE), ptdls_sta->TDLS_RSNIE, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_ext_cap(u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ return rtw_set_ie(pframe, _EXT_CAP_IE_ , sizeof(TDLS_EXT_CAPIE), TDLS_EXT_CAPIE, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_qos_cap(u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ return rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(TDLS_WMMIE), TDLS_WMMIE, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_ftie(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, u8 *ANonce, u8 *SNonce) -+{ -+ struct wpa_tdls_ftie FTIE = {0}; -+ u8 *p = NULL; -+ int len = 0; -+ -+ if (ptxmgmt->len > 0) -+ p = rtw_get_ie(ptxmgmt->buf, _FTIE_, &len, ptxmgmt->len); -+ -+ if (p != NULL) -+ return rtw_set_ie(pframe, _FTIE_, len, p + 2, &(pattrib->pktlen)); -+ else { -+ if (ANonce != NULL) -+ _rtw_memcpy(FTIE.Anonce, ANonce, WPA_NONCE_LEN); -+ if (SNonce != NULL) -+ _rtw_memcpy(FTIE.Snonce, SNonce, WPA_NONCE_LEN); -+ -+ return rtw_set_ie(pframe, _FTIE_, TDLS_FTIE_DATA_LEN, -+ (u8 *)FTIE.data, &(pattrib->pktlen)); -+ } -+} -+ -+u8 *rtw_tdls_set_timeout_interval(struct tdls_txmgmt *ptxmgmt, u8 *pframe, struct pkt_attrib *pattrib, int init, struct sta_info *ptdls_sta) -+{ -+ u8 timeout_itvl[5]; /* set timeout interval to maximum value */ -+ u32 timeout_interval = TDLS_TPK_RESEND_COUNT; -+ u8 *p = NULL; -+ int len = 0; -+ -+ if (ptxmgmt->len > 0) -+ p = rtw_get_ie(ptxmgmt->buf, _TIMEOUT_ITVL_IE_, &len, ptxmgmt->len); -+ -+ if (p != NULL) -+ return rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, len, p + 2, &(pattrib->pktlen)); -+ else { -+ /* Timeout interval */ -+ timeout_itvl[0] = 0x02; -+ if (init == _TRUE) -+ _rtw_memcpy(timeout_itvl + 1, &timeout_interval, 4); -+ else -+ _rtw_memcpy(timeout_itvl + 1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); -+ -+ return rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); -+ } -+} -+ -+u8 *rtw_tdls_set_bss_coexist(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u8 iedata = 0; -+ -+ if (padapter->mlmepriv.num_FortyMHzIntolerant > 0) -+ iedata |= BIT(2); /* 20 MHz BSS Width Request */ -+ -+ /* Information Bit should be set by TDLS test plan 5.9 */ -+ iedata |= BIT(0); -+ return rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_payload_type(u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u8 payload_type = 0x02; -+ return rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_category(u8 *pframe, struct pkt_attrib *pattrib, u8 category) -+{ -+ return rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_action(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) -+{ -+ return rtw_set_fixed_ie(pframe, 1, &(ptxmgmt->action_code), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_status_code(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) -+{ -+ return rtw_set_fixed_ie(pframe, 2, (u8 *)&(ptxmgmt->status_code), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_dialog(u8 *pframe, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) -+{ -+ u8 dialogtoken = 1; -+ if (ptxmgmt->dialog_token) -+ return rtw_set_fixed_ie(pframe, 1, &(ptxmgmt->dialog_token), &(pattrib->pktlen)); -+ else -+ return rtw_set_fixed_ie(pframe, 1, &(dialogtoken), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_reg_class(u8 *pframe, struct pkt_attrib *pattrib, struct sta_info *ptdls_sta) -+{ -+ u8 reg_class = 22; -+ return rtw_set_fixed_ie(pframe, 1, &(reg_class), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_second_channel_offset(u8 *pframe, struct pkt_attrib *pattrib, u8 ch_offset) -+{ -+ return rtw_set_ie(pframe, EID_SecondaryChnlOffset , 1, &ch_offset, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_capability(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ u8 cap_from_ie[2] = {0}; -+ -+ _rtw_memcpy(cap_from_ie, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); -+ -+ return rtw_set_fixed_ie(pframe, 2, cap_from_ie, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_supported_rate(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; -+ int bssrate_len = 0; -+ u8 more_supportedrates = 0; -+ -+ rtw_set_supported_rate(bssrate, (padapter->registrypriv.wireless_mode == WIRELESS_MODE_MAX) ? padapter->mlmeextpriv.cur_wireless_mode : padapter->registrypriv.wireless_mode); -+ bssrate_len = rtw_get_rateset_len(bssrate); -+ -+ if (bssrate_len > 8) { -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); -+ more_supportedrates = 1; -+ } else -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); -+ -+ /* extended supported rates */ -+ if (more_supportedrates == 1) -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); -+ -+ return pframe; -+} -+ -+u8 *rtw_tdls_set_sup_reg_class(u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ return rtw_set_ie(pframe, _SRC_IE_ , sizeof(TDLS_SRC), TDLS_SRC, &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_linkid(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib, u8 init) -+{ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ u8 link_id_addr[18] = {0}; -+ -+ _rtw_memcpy(link_id_addr, get_my_bssid(&(pmlmeinfo->network)), 6); -+ -+ if (init == _TRUE) { -+ _rtw_memcpy((link_id_addr + 6), pattrib->src, 6); -+ _rtw_memcpy((link_id_addr + 12), pattrib->dst, 6); -+ } else { -+ _rtw_memcpy((link_id_addr + 6), pattrib->dst, 6); -+ _rtw_memcpy((link_id_addr + 12), pattrib->src, 6); -+ } -+ return rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); -+} -+ -+#ifdef CONFIG_TDLS_CH_SW -+u8 *rtw_tdls_set_target_ch(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ u8 target_ch = 1; -+ if (padapter->tdlsinfo.chsw_info.off_ch_num) -+ return rtw_set_fixed_ie(pframe, 1, &(padapter->tdlsinfo.chsw_info.off_ch_num), &(pattrib->pktlen)); -+ else -+ return rtw_set_fixed_ie(pframe, 1, &(target_ch), &(pattrib->pktlen)); -+} -+ -+u8 *rtw_tdls_set_ch_sw(u8 *pframe, struct pkt_attrib *pattrib, struct sta_info *ptdls_sta) -+{ -+ u8 ch_switch_timing[4] = {0}; -+ u16 switch_time = (ptdls_sta->ch_switch_time >= TDLS_CH_SWITCH_TIME * 1000) ? -+ ptdls_sta->ch_switch_time : TDLS_CH_SWITCH_TIME; -+ u16 switch_timeout = (ptdls_sta->ch_switch_timeout >= TDLS_CH_SWITCH_TIMEOUT * 1000) ? -+ ptdls_sta->ch_switch_timeout : TDLS_CH_SWITCH_TIMEOUT; -+ -+ _rtw_memcpy(ch_switch_timing, &switch_time, 2); -+ _rtw_memcpy(ch_switch_timing + 2, &switch_timeout, 2); -+ -+ return rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); -+} -+ -+void rtw_tdls_set_ch_sw_oper_control(_adapter *padapter, u8 enable) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 bcn_early_case; -+ -+ if (enable == _TRUE) { -+#ifdef CONFIG_TDLS_CH_SW_V2 -+ pHalData->ch_switch_offload = _TRUE; -+#endif -+ -+#ifdef CONFIG_TDLS_CH_SW_BY_DRV -+ pHalData->ch_switch_offload = _FALSE; -+#endif -+ bcn_early_case = TDLS_BCN_ERLY_ON; -+ } -+ else { -+ pHalData->ch_switch_offload = _FALSE; -+ bcn_early_case = TDLS_BCN_ERLY_OFF; -+ } -+ -+ if (ATOMIC_READ(&padapter->tdlsinfo.chsw_info.chsw_on) != enable) -+ ATOMIC_SET(&padapter->tdlsinfo.chsw_info.chsw_on, enable); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_EARLY_C2H_RPT, &enable); -+ rtw_hal_set_hwreg(padapter, HW_VAR_SET_DRV_ERLY_INT, &bcn_early_case); -+ RTW_INFO("[TDLS] %s Bcn Early C2H Report\n", (enable == _TRUE) ? "Start" : "Stop"); -+} -+ -+void rtw_tdls_ch_sw_back_to_base_chnl(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv; -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ -+ pmlmepriv = &padapter->mlmepriv; -+ -+ if ((ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) && -+ (padapter->mlmeextpriv.cur_channel != rtw_get_oper_ch(padapter))) -+ rtw_tdls_cmd(padapter, pchsw_info->addr, TDLS_CH_SW_TO_BASE_CHNL_UNSOLICITED); -+} -+ -+#ifndef CONFIG_TDLS_CH_SW_V2 -+static void rtw_tdls_chsw_oper_init(_adapter *padapter, u32 timeout_ms) -+{ -+ struct submit_ctx *chsw_sctx = &padapter->tdlsinfo.chsw_info.chsw_sctx; -+ -+ rtw_sctx_init(chsw_sctx, timeout_ms); -+} -+ -+static int rtw_tdls_chsw_oper_wait(_adapter *padapter) -+{ -+ struct submit_ctx *chsw_sctx = &padapter->tdlsinfo.chsw_info.chsw_sctx; -+ -+ return rtw_sctx_wait(chsw_sctx, __func__); -+} -+ -+void rtw_tdls_chsw_oper_done(_adapter *padapter) -+{ -+ struct submit_ctx *chsw_sctx = &padapter->tdlsinfo.chsw_info.chsw_sctx; -+ -+ rtw_sctx_done(&chsw_sctx); -+} -+#endif -+ -+s32 rtw_tdls_do_ch_sw(_adapter *padapter, struct sta_info *ptdls_sta, u8 chnl_type, u8 channel, u8 channel_offset, u16 bwmode, u16 ch_switch_time) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 center_ch, chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ u32 ch_sw_time_start, ch_sw_time_spent, wait_time; -+ u8 take_care_iqk; -+ s32 ret = _FAIL; -+ -+ ch_sw_time_start = rtw_systime_to_ms(rtw_get_current_time()); -+ -+ /* set mac_id sleep before channel switch */ -+ rtw_hal_macid_sleep(padapter, ptdls_sta->cmn.mac_id); -+ -+#if defined(CONFIG_TDLS_CH_SW_BY_DRV) || defined(CONFIG_TDLS_CH_SW_V2) -+ set_channel_bwmode(padapter, channel, channel_offset, bwmode); -+ ret = _SUCCESS; -+#else -+ rtw_tdls_chsw_oper_init(padapter, TDLS_CH_SWITCH_OPER_OFFLOAD_TIMEOUT); -+ -+ /* channel switch IOs offload to FW */ -+ if (rtw_hal_ch_sw_oper_offload(padapter, channel, channel_offset, bwmode) == _SUCCESS) { -+ if (rtw_tdls_chsw_oper_wait(padapter) == _SUCCESS) { -+ /* set channel and bw related variables in driver */ -+ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); -+ -+ rtw_set_oper_ch(padapter, channel); -+ rtw_set_oper_choffset(padapter, channel_offset); -+ rtw_set_oper_bw(padapter, bwmode); -+ -+ center_ch = rtw_get_center_ch(channel, bwmode, channel_offset); -+ pHalData->current_channel = center_ch; -+ pHalData->CurrentCenterFrequencyIndex1 = center_ch; -+ pHalData->current_channel_bw = bwmode; -+ pHalData->nCur40MhzPrimeSC = channel_offset; -+ -+ if (bwmode == CHANNEL_WIDTH_80) { -+ if (center_ch > channel) -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_LOWER; -+ else if (center_ch < channel) -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_UPPER; -+ else -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ pHalData->nCur80MhzPrimeSC = chnl_offset80; -+ -+ pHalData->CurrentCenterFrequencyIndex1 = center_ch; -+ -+ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk); -+ if (take_care_iqk == _TRUE) -+ rtw_hal_ch_sw_iqk_info_restore(padapter, CH_SW_USE_CASE_TDLS); -+ -+ ret = _SUCCESS; -+ } else -+ RTW_INFO("[TDLS] chsw oper wait fail !!\n"); -+ } -+#endif -+ -+ if (ret == _SUCCESS) { -+ ch_sw_time_spent = rtw_systime_to_ms(rtw_get_current_time()) - ch_sw_time_start; -+ if (chnl_type == TDLS_CH_SW_OFF_CHNL) { -+ if ((u32)ch_switch_time / 1000 > ch_sw_time_spent) -+ wait_time = (u32)ch_switch_time / 1000 - ch_sw_time_spent; -+ else -+ wait_time = 0; -+ -+ if (wait_time > 0) -+ rtw_msleep_os(wait_time); -+ } -+ } -+ -+ /* set mac_id wakeup after channel switch */ -+ rtw_hal_macid_wakeup(padapter, ptdls_sta->cmn.mac_id); -+ -+ return ret; -+} -+#endif -+ -+u8 *rtw_tdls_set_wmm_params(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) -+{ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 wmm_param_ele[24] = {0}; -+ -+ if (&pmlmeinfo->WMM_param) { -+ _rtw_memcpy(wmm_param_ele, WMM_PARA_OUI, 6); -+ if (_rtw_memcmp(&pmlmeinfo->WMM_param, &wmm_param_ele[6], 18) == _TRUE) -+ /* Use default WMM Param */ -+ _rtw_memcpy(wmm_param_ele + 6, (u8 *)&TDLS_WMM_PARAM_IE, sizeof(TDLS_WMM_PARAM_IE)); -+ else -+ _rtw_memcpy(wmm_param_ele + 6, (u8 *)&pmlmeinfo->WMM_param, sizeof(pmlmeinfo->WMM_param)); -+ return rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 24, wmm_param_ele, &(pattrib->pktlen)); -+ } else -+ return pframe; -+} -+ -+#ifdef CONFIG_WFD -+void rtw_tdls_process_wfd_ie(struct tdls_info *ptdlsinfo, u8 *ptr, u8 length) -+{ -+ u8 *wfd_ie; -+ u32 wfd_ielen = 0; -+ -+ if (!hal_chk_wl_func(tdls_info_to_adapter(ptdlsinfo), WL_FUNC_MIRACAST)) -+ return; -+ -+ /* Try to get the TCP port information when receiving the negotiation response. */ -+ -+ wfd_ie = rtw_get_wfd_ie(ptr, length, NULL, &wfd_ielen); -+ while (wfd_ie) { -+ u8 *attr_content; -+ u32 attr_contentlen = 0; -+ int i; -+ -+ RTW_INFO("[%s] WFD IE Found!!\n", __FUNCTION__); -+ attr_content = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &attr_contentlen); -+ if (attr_content && attr_contentlen) { -+ ptdlsinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16(attr_content + 2); -+ RTW_INFO("[%s] Peer PORT NUM = %d\n", __FUNCTION__, ptdlsinfo->wfd_info->peer_rtsp_ctrlport); -+ } -+ -+ attr_content = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_LOCAL_IP_ADDR, NULL, &attr_contentlen); -+ if (attr_content && attr_contentlen) { -+ _rtw_memcpy(ptdlsinfo->wfd_info->peer_ip_address, (attr_content + 1), 4); -+ RTW_INFO("[%s] Peer IP = %02u.%02u.%02u.%02u\n", __FUNCTION__, -+ ptdlsinfo->wfd_info->peer_ip_address[0], ptdlsinfo->wfd_info->peer_ip_address[1], -+ ptdlsinfo->wfd_info->peer_ip_address[2], ptdlsinfo->wfd_info->peer_ip_address[3]); -+ } -+ -+ wfd_ie = rtw_get_wfd_ie(wfd_ie + wfd_ielen, (ptr + length) - (wfd_ie + wfd_ielen), NULL, &wfd_ielen); -+ } -+} -+ -+int issue_tunneled_probe_req(_adapter *padapter) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ u8 baddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ struct tdls_txmgmt txmgmt; -+ int ret = _FAIL; -+ -+ RTW_INFO("[%s]\n", __FUNCTION__); -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.action_code = TUNNELED_PROBE_REQ; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, baddr, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+} -+ -+int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct tdls_txmgmt txmgmt; -+ int ret = _FAIL; -+ -+ RTW_INFO("[%s]\n", __FUNCTION__); -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.action_code = TUNNELED_PROBE_RSP; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, precv_frame->u.hdr.attrib.src, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+} -+#endif /* CONFIG_WFD */ -+ -+int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *ptdls_sta = NULL; -+ _irqL irqL; -+ int ret = _FAIL; -+ /* Retry timer should be set at least 301 sec, using TPK_count counting 301 times. */ -+ u32 timeout_interval = TDLS_TPK_RESEND_COUNT; -+ -+ RTW_INFO("[TDLS] %s\n", __FUNCTION__); -+ -+ if (rtw_tdls_is_setup_allowed(padapter) == _FALSE) -+ goto exit; -+ -+ if (IS_MCAST(ptxmgmt->peer)) -+ goto exit; -+ -+ ptdls_sta = rtw_get_stainfo(pstapriv, ptxmgmt->peer); -+ if (ptdlsinfo->sta_maximum == _TRUE) { -+ if (ptdls_sta == NULL) -+ goto exit; -+ else if (!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) -+ goto exit; -+ } -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ if (ptdls_sta == NULL) { -+ ptdls_sta = rtw_alloc_stainfo(pstapriv, ptxmgmt->peer); -+ if (ptdls_sta == NULL) { -+ RTW_INFO("[%s] rtw_alloc_stainfo fail\n", __FUNCTION__); -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ ptdlsinfo->sta_cnt++; -+ } -+ -+ ptxmgmt->action_code = TDLS_SETUP_REQUEST; -+ -+ pattrib = &pmgntframe->attrib; -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ -+ if (ptdlsinfo->sta_cnt == MAX_ALLOWED_TDLS_STA_NUM) -+ ptdlsinfo->sta_maximum = _TRUE; -+ -+ ptdls_sta->tdls_sta_state |= TDLS_RESPONDER_STATE; -+ -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { -+ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; -+ _set_timer(&ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); -+ } -+ -+ pattrib->qsel = pattrib->priority; -+ -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ -+ return ret; -+} -+ -+int _issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta, u8 wait_ack) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ _irqL irqL; -+ int ret = _FAIL; -+ -+ RTW_INFO("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_TEARDOWN; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ rtw_mi_set_scan_deny(padapter, 550); -+ rtw_mi_scan_abort(padapter, _TRUE); -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ if (ptxmgmt->status_code == _RSON_TDLS_TEAR_UN_RSN_) -+ _rtw_memcpy(pattrib->ra, ptxmgmt->peer, ETH_ALEN); -+ else -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) -+ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) -+ if (pattrib->encrypt) -+ _cancel_timer_ex(&ptdls_sta->TPK_timer); -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ -+ return ret; -+} -+ -+int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack) -+{ -+ struct sta_info *ptdls_sta = NULL; -+ int ret = _FAIL; -+ -+ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), ptxmgmt->peer); -+ if (ptdls_sta == NULL) { -+ RTW_INFO("No tdls_sta for tearing down\n"); -+ goto exit; -+ } -+ -+ ret = _issue_tdls_teardown(padapter, ptxmgmt, ptdls_sta, wait_ack); -+ if ((ptxmgmt->status_code == _RSON_TDLS_TEAR_UN_RSN_) && (ret == _FAIL)) { -+ /* Change status code and send teardown again via AP */ -+ ptxmgmt->status_code = _RSON_TDLS_TEAR_TOOFAR_; -+ ret = _issue_tdls_teardown(padapter, ptxmgmt, ptdls_sta, wait_ack); -+ } -+ -+ if (rtw_tdls_is_driver_setup(padapter)) { -+ rtw_tdls_teardown_pre_hdl(padapter, ptdls_sta); -+ rtw_tdls_cmd(padapter, ptxmgmt->peer, TDLS_TEARDOWN_STA_LOCALLY_POST); -+ } -+ -+exit: -+ return ret; -+} -+ -+int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int ret = _FAIL; -+ -+ RTW_INFO("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_DISCOVERY_REQUEST; -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ dump_mgntframe(padapter, pmgntframe); -+ RTW_INFO("issue tdls dis req\n"); -+ -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+} -+ -+int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int ret = _FAIL; -+ -+ RTW_INFO("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_SETUP_RESPONSE; -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(&(padapter->mlmepriv)), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+ -+} -+ -+int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int ret = _FAIL; -+ -+ RTW_INFO("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_SETUP_CONFIRM; -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(&padapter->mlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+ -+} -+ -+/* TDLS Discovery Response frame is a management action frame */ -+int issue_tdls_dis_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ int ret = _FAIL; -+ -+ RTW_INFO("[TDLS] %s\n", __FUNCTION__); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ /* unicast probe request frame */ -+ _rtw_memcpy(pwlanhdr->addr1, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->dst, pwlanhdr->addr1, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->src, pwlanhdr->addr2, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, pwlanhdr->addr3, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ rtw_build_tdls_dis_rsp_ies(padapter, pmgntframe, pframe, ptxmgmt, privacy); -+ -+ pattrib->nr_frags = 1; -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *ptdls_sta, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int ret = _FAIL; -+ -+ RTW_INFO("[TDLS] %s\n", __FUNCTION__); -+ -+ ptxmgmt->action_code = TDLS_PEER_TRAFFIC_RESPONSE; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ -+exit: -+ -+ return ret; -+} -+ -+int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *ptdls_sta) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct tdls_txmgmt txmgmt; -+ int ret = _FAIL; -+ -+ RTW_INFO("[TDLS] %s\n", __FUNCTION__); -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.action_code = TDLS_PEER_TRAFFIC_INDICATION; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ /* PTI frame's priority should be AC_VO */ -+ pattrib->priority = 7; -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ -+exit: -+ -+ return ret; -+} -+ -+#ifdef CONFIG_TDLS_CH_SW -+int issue_tdls_ch_switch_req(_adapter *padapter, struct sta_info *ptdls_sta) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct tdls_txmgmt txmgmt; -+ int ret = _FAIL; -+ -+ RTW_INFO("[TDLS] %s\n", __FUNCTION__); -+ -+ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) { -+ RTW_INFO("[TDLS] Ignore %s since channel switch is not allowed\n", __func__); -+ goto exit; -+ } -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ txmgmt.action_code = TDLS_CHANNEL_SWITCH_REQUEST; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, &txmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+exit: -+ -+ return ret; -+} -+ -+int issue_tdls_ch_switch_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ int ret = _FAIL; -+ -+ RTW_INFO("[TDLS] %s\n", __FUNCTION__); -+ -+ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) { -+ RTW_INFO("[TDLS] Ignore %s since channel switch is not allowed\n", __func__); -+ goto exit; -+ } -+ -+ ptxmgmt->action_code = TDLS_CHANNEL_SWITCH_RESPONSE; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto exit; -+ -+ pattrib = &pmgntframe->attrib; -+ -+ pmgntframe->frame_tag = DATA_FRAMETAG; -+ pattrib->ether_type = 0x890d; -+ -+ _rtw_memcpy(pattrib->dst, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, ptxmgmt->peer, ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ -+ update_tdls_attrib(padapter, pattrib); -+ pattrib->qsel = pattrib->priority; -+ /* -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ if(xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pmgntframe)==_TRUE){ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ return _FALSE; -+ } -+ */ -+ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, ptxmgmt) != _SUCCESS) { -+ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ goto exit; -+ } -+ -+ if (wait_ack) -+ ret = dump_mgntframe_and_wait_ack_timeout(padapter, pmgntframe, 10); -+ else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+exit: -+ -+ return ret; -+} -+#endif -+ -+int On_TDLS_Dis_Rsp(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct sta_info *ptdls_sta = NULL, *psta = rtw_get_stainfo(&(padapter->stapriv), get_bssid(&(padapter->mlmepriv))); -+ struct recv_priv *precvpriv = &(padapter->recvpriv); -+ u8 *ptr = precv_frame->u.hdr.rx_data, *psa; -+ struct rx_pkt_attrib *pattrib = &(precv_frame->u.hdr.attrib); -+ struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); -+ u8 empty_addr[ETH_ALEN] = { 0x00 }; -+ int rssi = 0; -+ struct tdls_txmgmt txmgmt; -+ int ret = _SUCCESS; -+ -+ if (psta) -+ rssi = psta->cmn.rssi_stat.rssi; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ /* WFDTDLS: for sigma test, not to setup direct link automatically */ -+ ptdlsinfo->dev_discovered = _TRUE; -+ -+ psa = get_sa(ptr); -+ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), psa); -+ if (ptdls_sta != NULL) -+ ptdls_sta->sta_stats.rx_tdls_disc_rsp_pkts++; -+ -+#ifdef CONFIG_TDLS_AUTOSETUP -+ if (ptdls_sta != NULL) { -+ /* Record the tdls sta with lowest signal strength */ -+ if (ptdlsinfo->sta_maximum == _TRUE && ptdls_sta->alive_count >= 1) { -+ if (_rtw_memcmp(ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN)) { -+ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); -+ ptdlsinfo->ss_record.RxPWDBAll = pattrib->phy_info.rx_pwdb_all; -+ } else { -+ if (ptdlsinfo->ss_record.RxPWDBAll < pattrib->phy_info.rx_pwdb_all) { -+ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); -+ ptdlsinfo->ss_record.RxPWDBAll = pattrib->phy_info.rx_pwdb_all; -+ } -+ } -+ } -+ } else { -+ if (ptdlsinfo->sta_maximum == _TRUE) { -+ if (_rtw_memcmp(ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN)) { -+ /* All traffics are busy, do not set up another direct link. */ -+ ret = _FAIL; -+ goto exit; -+ } else { -+ if (pattrib->phy_info.rx_pwdb_all > ptdlsinfo->ss_record.RxPWDBAll) { -+ _rtw_memcpy(txmgmt.peer, ptdlsinfo->ss_record.macaddr, ETH_ALEN); -+ /* issue_tdls_teardown(padapter, ptdlsinfo->ss_record.macaddr, _FALSE); */ -+ } else { -+ ret = _FAIL; -+ goto exit; -+ } -+ } -+ } -+ -+ -+ if (pattrib->phy_info.rx_pwdb_all + TDLS_SIGNAL_THRESH >= rssi) { -+ RTW_INFO("pattrib->RxPWDBAll=%d, pdmpriv->undecorated_smoothed_pwdb=%d\n", pattrib->phy_info.rx_pwdb_all, rssi); -+ _rtw_memcpy(txmgmt.peer, psa, ETH_ALEN); -+ issue_tdls_setup_req(padapter, &txmgmt, _FALSE); -+ } -+ } -+exit: -+#endif /* CONFIG_TDLS_AUTOSETUP */ -+ -+ return ret; -+ -+} -+ -+sint On_TDLS_Setup_Req(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ u8 *psa, *pmyid; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ _irqL irqL; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ u8 *prsnie, *ppairwise_cipher; -+ u8 i, k; -+ u8 ccmp_included = 0, rsnie_included = 0; -+ u16 j, pairwise_count; -+ u8 SNonce[32]; -+ u32 timeout_interval = TDLS_TPK_RESEND_COUNT; -+ sint parsing_length; /* Frame body length, without icv_len */ -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE = 5; -+ unsigned char supportRate[16]; -+ int supportRateNum = 0; -+ struct tdls_txmgmt txmgmt; -+ -+ if (rtw_tdls_is_setup_allowed(padapter) == _FALSE) -+ goto exit; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ psa = get_sa(ptr); -+ -+ if (ptdlsinfo->sta_maximum == _TRUE) { -+ if (ptdls_sta == NULL) -+ goto exit; -+ else if (!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) -+ goto exit; -+ } -+ -+ pmyid = adapter_mac_addr(padapter); -+ ptr += prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; -+ parsing_length = ((union recv_frame *)precv_frame)->u.hdr.len -+ - prx_pkt_attrib->hdrlen -+ - prx_pkt_attrib->iv_len -+ - prx_pkt_attrib->icv_len -+ - LLC_HEADER_SIZE -+ - ETH_TYPE_LEN -+ - PAYLOAD_TYPE_LEN; -+ -+ if (ptdls_sta == NULL) { -+ ptdls_sta = rtw_alloc_stainfo(pstapriv, psa); -+ if (ptdls_sta == NULL) -+ goto exit; -+ -+ ptdlsinfo->sta_cnt++; -+ } -+ else { -+ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { -+ /* If the direct link is already set up */ -+ /* Process as re-setup after tear down */ -+ RTW_INFO("re-setup a direct link\n"); -+ } -+ /* Already receiving TDLS setup request */ -+ else if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) { -+ RTW_INFO("receive duplicated TDLS setup request frame in handshaking\n"); -+ goto exit; -+ } -+ /* When receiving and sending setup_req to the same link at the same time */ -+ /* STA with higher MAC_addr would be initiator */ -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) { -+ RTW_INFO("receive setup_req after sending setup_req\n"); -+ for (i = 0; i < 6; i++) { -+ if (*(pmyid + i) == *(psa + i)) { -+ } else if (*(pmyid + i) > *(psa + i)) { -+ ptdls_sta->tdls_sta_state = TDLS_INITIATOR_STATE; -+ break; -+ } else if (*(pmyid + i) < *(psa + i)) -+ goto exit; -+ } -+ } -+ } -+ -+ if (ptdls_sta) { -+ txmgmt.dialog_token = *(ptr + 2); /* Copy dialog token */ -+ txmgmt.status_code = _STATS_SUCCESSFUL_; -+ -+ /* Parsing information element */ -+ for (j = FIXED_IE; j < parsing_length;) { -+ -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr + j); -+ -+ switch (pIE->ElementID) { -+ case _SUPPORTEDRATES_IE_: -+ _rtw_memcpy(supportRate, pIE->data, pIE->Length); -+ supportRateNum = pIE->Length; -+ break; -+ case _COUNTRY_IE_: -+ break; -+ case _EXT_SUPPORTEDRATES_IE_: -+ if (supportRateNum < sizeof(supportRate)) { -+ _rtw_memcpy(supportRate + supportRateNum, pIE->data, pIE->Length); -+ supportRateNum += pIE->Length; -+ } -+ break; -+ case _SUPPORTED_CH_IE_: -+ break; -+ case _RSN_IE_2_: -+ rsnie_included = 1; -+ if (prx_pkt_attrib->encrypt) { -+ prsnie = (u8 *)pIE; -+ /* Check CCMP pairwise_cipher presence. */ -+ ppairwise_cipher = prsnie + 10; -+ _rtw_memcpy(ptdls_sta->TDLS_RSNIE, pIE->data, pIE->Length); -+ pairwise_count = *(u16 *)(ppairwise_cipher - 2); -+ for (k = 0; k < pairwise_count; k++) { -+ if (_rtw_memcmp(ppairwise_cipher + 4 * k, RSN_CIPHER_SUITE_CCMP, 4) == _TRUE) -+ ccmp_included = 1; -+ } -+ -+ if (ccmp_included == 0) -+ txmgmt.status_code = _STATS_INVALID_RSNIE_; -+ } -+ break; -+ case _EXT_CAP_IE_: -+ break; -+ case _VENDOR_SPECIFIC_IE_: -+ break; -+ case _FTIE_: -+ if (prx_pkt_attrib->encrypt) -+ _rtw_memcpy(SNonce, (ptr + j + 52), 32); -+ break; -+ case _TIMEOUT_ITVL_IE_: -+ if (prx_pkt_attrib->encrypt) -+ timeout_interval = cpu_to_le32(*(u32 *)(ptr + j + 3)); -+ break; -+ case _RIC_Descriptor_IE_: -+ break; -+#ifdef CONFIG_80211N_HT -+ case _HT_CAPABILITY_IE_: -+ rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+#endif -+#ifdef CONFIG_80211AC_VHT -+ case EID_AID: -+ break; -+ case EID_VHTCapability: -+ rtw_tdls_process_vht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+#endif -+ case EID_BSSCoexistence: -+ break; -+ case _LINK_ID_IE_: -+ if (_rtw_memcmp(get_bssid(pmlmepriv), pIE->data, 6) == _FALSE) -+ txmgmt.status_code = _STATS_NOT_IN_SAME_BSS_; -+ break; -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ -+ } -+ -+ /* Check status code */ -+ /* If responder STA has/hasn't security on AP, but request hasn't/has RSNIE, it should reject */ -+ if (txmgmt.status_code == _STATS_SUCCESSFUL_) { -+ if (rsnie_included && prx_pkt_attrib->encrypt == 0) -+ txmgmt.status_code = _STATS_SEC_DISABLED_; -+ else if (rsnie_included == 0 && prx_pkt_attrib->encrypt) -+ txmgmt.status_code = _STATS_INVALID_PARAMETERS_; -+ -+#ifdef CONFIG_WFD -+ /* WFD test plan version 0.18.2 test item 5.1.5 */ -+ /* SoUT does not use TDLS if AP uses weak security */ -+ if (padapter->wdinfo.wfd_tdls_enable && (rsnie_included && prx_pkt_attrib->encrypt != _AES_)) -+ txmgmt.status_code = _STATS_SEC_DISABLED_; -+#endif /* CONFIG_WFD */ -+ } -+ -+ ptdls_sta->tdls_sta_state |= TDLS_INITIATOR_STATE; -+ if (prx_pkt_attrib->encrypt) { -+ _rtw_memcpy(ptdls_sta->SNonce, SNonce, 32); -+ -+ if (timeout_interval <= 300) -+ ptdls_sta->TDLS_PeerKey_Lifetime = TDLS_TPK_RESEND_COUNT; -+ else -+ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; -+ } -+ -+ /* Update station supportRate */ -+ ptdls_sta->bssratelen = supportRateNum; -+ _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); -+ -+ /* -2: AP + BC/MC sta, -4: default key */ -+ if (ptdlsinfo->sta_cnt == MAX_ALLOWED_TDLS_STA_NUM) -+ ptdlsinfo->sta_maximum = _TRUE; -+ -+#ifdef CONFIG_WFD -+ rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length); -+#endif -+ -+ } else -+ goto exit; -+ -+ _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); -+ -+ if (rtw_tdls_is_driver_setup(padapter)) { -+ issue_tdls_setup_rsp(padapter, &txmgmt); -+ -+ if (txmgmt.status_code == _STATS_SUCCESSFUL_) -+ _set_timer(&ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); -+ else { -+ rtw_tdls_teardown_pre_hdl(padapter, ptdls_sta); -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_TEARDOWN_STA_LOCALLY_POST); -+ } -+ } -+ -+exit: -+ -+ return _SUCCESS; -+} -+ -+int On_TDLS_Setup_Rsp(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ _irqL irqL; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ u8 *psa; -+ u16 status_code = 0; -+ sint parsing_length; /* Frame body length, without icv_len */ -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE = 7; -+ u8 ANonce[32]; -+ u8 *pftie = NULL, *ptimeout_ie = NULL, *plinkid_ie = NULL, *prsnie = NULL, *pftie_mic = NULL, *ppairwise_cipher = NULL; -+ u16 pairwise_count, j, k; -+ u8 verify_ccmp = 0; -+ unsigned char supportRate[16]; -+ int supportRateNum = 0; -+ struct tdls_txmgmt txmgmt; -+ int ret = _SUCCESS; -+ u32 timeout_interval = TDLS_TPK_RESEND_COUNT; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ psa = get_sa(ptr); -+ -+ ptr += prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; -+ parsing_length = ((union recv_frame *)precv_frame)->u.hdr.len -+ - prx_pkt_attrib->hdrlen -+ - prx_pkt_attrib->iv_len -+ - prx_pkt_attrib->icv_len -+ - LLC_HEADER_SIZE -+ - ETH_TYPE_LEN -+ - PAYLOAD_TYPE_LEN; -+ -+ _rtw_memcpy(&status_code, ptr + 2, 2); -+ -+ if (status_code != 0) { -+ RTW_INFO("[TDLS] %s status_code = %d, free_tdls_sta\n", __FUNCTION__, status_code); -+ rtw_tdls_teardown_pre_hdl(padapter, ptdls_sta); -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_TEARDOWN_STA_LOCALLY_POST); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ status_code = 0; -+ -+ /* parsing information element */ -+ for (j = FIXED_IE; j < parsing_length;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr + j); -+ -+ switch (pIE->ElementID) { -+ case _SUPPORTEDRATES_IE_: -+ _rtw_memcpy(supportRate, pIE->data, pIE->Length); -+ supportRateNum = pIE->Length; -+ break; -+ case _COUNTRY_IE_: -+ break; -+ case _EXT_SUPPORTEDRATES_IE_: -+ if (supportRateNum < sizeof(supportRate)) { -+ _rtw_memcpy(supportRate + supportRateNum, pIE->data, pIE->Length); -+ supportRateNum += pIE->Length; -+ } -+ break; -+ case _SUPPORTED_CH_IE_: -+ break; -+ case _RSN_IE_2_: -+ prsnie = (u8 *)pIE; -+ /* Check CCMP pairwise_cipher presence. */ -+ ppairwise_cipher = prsnie + 10; -+ _rtw_memcpy(&pairwise_count, (u16 *)(ppairwise_cipher - 2), 2); -+ for (k = 0; k < pairwise_count; k++) { -+ if (_rtw_memcmp(ppairwise_cipher + 4 * k, RSN_CIPHER_SUITE_CCMP, 4) == _TRUE) -+ verify_ccmp = 1; -+ } -+ case _EXT_CAP_IE_: -+ break; -+ case _VENDOR_SPECIFIC_IE_: -+ if (_rtw_memcmp((u8 *)pIE + 2, WMM_INFO_OUI, 6) == _TRUE) { -+ /* WMM Info ID and OUI */ -+ if ((pregistrypriv->wmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) -+ ptdls_sta->qos_option = _TRUE; -+ } -+ break; -+ case _FTIE_: -+ pftie = (u8 *)pIE; -+ _rtw_memcpy(ANonce, (ptr + j + 20), 32); -+ break; -+ case _TIMEOUT_ITVL_IE_: -+ ptimeout_ie = (u8 *)pIE; -+ timeout_interval = cpu_to_le32(*(u32 *)(ptimeout_ie + 3)); -+ break; -+ case _RIC_Descriptor_IE_: -+ break; -+#ifdef CONFIG_80211N_HT -+ case _HT_CAPABILITY_IE_: -+ rtw_tdls_process_ht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+#endif -+#ifdef CONFIG_80211AC_VHT -+ case EID_AID: -+ /* todo in the future if necessary */ -+ break; -+ case EID_VHTCapability: -+ rtw_tdls_process_vht_cap(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+ case EID_OpModeNotification: -+ rtw_tdls_process_vht_op_mode_notify(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+#endif -+ case EID_BSSCoexistence: -+ break; -+ case _LINK_ID_IE_: -+ plinkid_ie = (u8 *)pIE; -+ break; -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ -+ } -+ -+ ptdls_sta->bssratelen = supportRateNum; -+ _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); -+ _rtw_memcpy(ptdls_sta->ANonce, ANonce, 32); -+ -+#ifdef CONFIG_WFD -+ rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length); -+#endif -+ -+ if (prx_pkt_attrib->encrypt) { -+ if (verify_ccmp == 1) { -+ txmgmt.status_code = _STATS_SUCCESSFUL_; -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { -+ wpa_tdls_generate_tpk(padapter, ptdls_sta); -+ if (tdls_verify_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie) == _FAIL) { -+ RTW_INFO("[TDLS] %s tdls_verify_mic fail, free_tdls_sta\n", __FUNCTION__); -+ rtw_tdls_teardown_pre_hdl(padapter, ptdls_sta); -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_TEARDOWN_STA_LOCALLY_POST); -+ ret = _FAIL; -+ goto exit; -+ } -+ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; -+ } -+ } else -+ txmgmt.status_code = _STATS_INVALID_RSNIE_; -+ } else -+ txmgmt.status_code = _STATS_SUCCESSFUL_; -+ -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { -+ _rtw_memcpy(txmgmt.peer, prx_pkt_attrib->src, ETH_ALEN); -+ issue_tdls_setup_cfm(padapter, &txmgmt); -+ -+ if (txmgmt.status_code == _STATS_SUCCESSFUL_) { -+ rtw_tdls_set_link_established(padapter, _TRUE); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) { -+ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; -+ ptdls_sta->state |= WIFI_ASOC_STATE; -+ _cancel_timer_ex(&ptdls_sta->handshake_timer); -+ } -+ -+ if (prx_pkt_attrib->encrypt) -+ rtw_tdls_set_key(padapter, ptdls_sta); -+ -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_ESTABLISHED); -+ -+ } -+ } -+ -+exit: -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) -+ return ret; -+ else -+ return _SUCCESS; -+ -+} -+ -+int On_TDLS_Setup_Cfm(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ _irqL irqL; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ u8 *psa; -+ u16 status_code = 0; -+ sint parsing_length; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE = 5; -+ u8 *pftie = NULL, *ptimeout_ie = NULL, *plinkid_ie = NULL, *prsnie = NULL, *pftie_mic = NULL, *ppairwise_cipher = NULL; -+ u16 j, pairwise_count; -+ int ret = _SUCCESS; -+ -+ psa = get_sa(ptr); -+ -+ ptr += prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; -+ parsing_length = ((union recv_frame *)precv_frame)->u.hdr.len -+ - prx_pkt_attrib->hdrlen -+ - prx_pkt_attrib->iv_len -+ - prx_pkt_attrib->icv_len -+ - LLC_HEADER_SIZE -+ - ETH_TYPE_LEN -+ - PAYLOAD_TYPE_LEN; -+ -+ _rtw_memcpy(&status_code, ptr + 2, 2); -+ -+ if (status_code != 0) { -+ RTW_INFO("[%s] status_code = %d\n, free_tdls_sta", __FUNCTION__, status_code); -+ rtw_tdls_teardown_pre_hdl(padapter, ptdls_sta); -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_TEARDOWN_STA_LOCALLY_POST); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ /* Parsing information element */ -+ for (j = FIXED_IE; j < parsing_length;) { -+ -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr + j); -+ -+ switch (pIE->ElementID) { -+ case _RSN_IE_2_: -+ prsnie = (u8 *)pIE; -+ break; -+ case _VENDOR_SPECIFIC_IE_: -+ if (_rtw_memcmp((u8 *)pIE + 2, WMM_PARA_OUI, 6) == _TRUE) { -+ /* WMM Parameter ID and OUI */ -+ ptdls_sta->qos_option = _TRUE; -+ } -+ break; -+ case _FTIE_: -+ pftie = (u8 *)pIE; -+ break; -+ case _TIMEOUT_ITVL_IE_: -+ ptimeout_ie = (u8 *)pIE; -+ break; -+#ifdef CONFIG_80211N_HT -+ case _HT_EXTRA_INFO_IE_: -+ break; -+#endif -+#ifdef CONFIG_80211AC_VHT -+ case EID_VHTOperation: -+ rtw_tdls_process_vht_operation(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+ case EID_OpModeNotification: -+ rtw_tdls_process_vht_op_mode_notify(padapter, ptdls_sta, pIE->data, pIE->Length); -+ break; -+#endif -+ case _LINK_ID_IE_: -+ plinkid_ie = (u8 *)pIE; -+ break; -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ -+ } -+ -+ if (prx_pkt_attrib->encrypt) { -+ /* Verify mic in FTIE MIC field */ -+ if (rtw_tdls_is_driver_setup(padapter) && -+ (tdls_verify_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie) == _FAIL)) { -+ rtw_tdls_teardown_pre_hdl(padapter, ptdls_sta); -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_TEARDOWN_STA_LOCALLY_POST); -+ ret = _FAIL; -+ goto exit; -+ } -+ } -+ -+ if (rtw_tdls_is_driver_setup(padapter)) { -+ rtw_tdls_set_link_established(padapter, _TRUE); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) { -+ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; -+ ptdls_sta->state |= WIFI_ASOC_STATE; -+ _cancel_timer_ex(&ptdls_sta->handshake_timer); -+ } -+ -+ if (prx_pkt_attrib->encrypt) { -+ rtw_tdls_set_key(padapter, ptdls_sta); -+ -+ /* Start TPK timer */ -+ ptdls_sta->TPK_count = 0; -+ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); -+ } -+ -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_ESTABLISHED); -+ } -+ -+exit: -+ return ret; -+ -+} -+ -+int On_TDLS_Dis_Req(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta_ap; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ sint parsing_length; /* Frame body length, without icv_len */ -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE = 3, *dst; -+ u16 j; -+ struct tdls_txmgmt txmgmt; -+ int ret = _SUCCESS; -+ -+ if (rtw_tdls_is_driver_setup(padapter) == _FALSE) -+ goto exit; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ ptr += prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; -+ txmgmt.dialog_token = *(ptr + 2); -+ _rtw_memcpy(&txmgmt.peer, precv_frame->u.hdr.attrib.src, ETH_ALEN); -+ txmgmt.action_code = TDLS_DISCOVERY_RESPONSE; -+ parsing_length = ((union recv_frame *)precv_frame)->u.hdr.len -+ - prx_pkt_attrib->hdrlen -+ - prx_pkt_attrib->iv_len -+ - prx_pkt_attrib->icv_len -+ - LLC_HEADER_SIZE -+ - ETH_TYPE_LEN -+ - PAYLOAD_TYPE_LEN; -+ -+ /* Parsing information element */ -+ for (j = FIXED_IE; j < parsing_length;) { -+ -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr + j); -+ -+ switch (pIE->ElementID) { -+ case _LINK_ID_IE_: -+ psta_ap = rtw_get_stainfo(pstapriv, pIE->data); -+ if (psta_ap == NULL) -+ goto exit; -+ dst = pIE->data + 12; -+ if (MacAddr_isBcst(dst) == _FALSE && (_rtw_memcmp(adapter_mac_addr(padapter), dst, ETH_ALEN) == _FALSE)) -+ goto exit; -+ break; -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ -+ } -+ -+ issue_tdls_dis_rsp(padapter, &txmgmt, prx_pkt_attrib->privacy); -+ -+exit: -+ return ret; -+ -+} -+ -+int On_TDLS_Teardown(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta) -+{ -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ _irqL irqL; -+ u8 reason; -+ -+ reason = *(ptr + prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN + 2); -+ RTW_INFO("[TDLS] %s Reason code(%d)\n", __FUNCTION__, reason); -+ -+ if (rtw_tdls_is_driver_setup(padapter)) { -+ rtw_tdls_teardown_pre_hdl(padapter, ptdls_sta); -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_TEARDOWN_STA_LOCALLY_POST); -+ } -+ -+ return _SUCCESS; -+ -+} -+ -+#if 0 -+u8 TDLS_check_ch_state(uint state) -+{ -+ if (state & TDLS_CH_SWITCH_ON_STATE && -+ state & TDLS_PEER_AT_OFF_STATE) { -+ if (state & TDLS_PEER_SLEEP_STATE) -+ return 2; /* U-APSD + ch. switch */ -+ else -+ return 1; /* ch. switch */ -+ } else -+ return 0; -+} -+#endif -+ -+int On_TDLS_Peer_Traffic_Indication(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta) -+{ -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct tdls_txmgmt txmgmt; -+ -+ ptr += pattrib->hdrlen + pattrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ -+ txmgmt.dialog_token = *(ptr + 2); -+ issue_tdls_peer_traffic_rsp(padapter, ptdls_sta, &txmgmt); -+ /* issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->cmn.mac_addr, 0, 0, 0); */ -+ -+ return _SUCCESS; -+} -+ -+/* We process buffered data for 1. U-APSD, 2. ch. switch, 3. U-APSD + ch. switch here */ -+int On_TDLS_Peer_Traffic_Rsp(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 wmmps_ac = 0; -+ /* u8 state=TDLS_check_ch_state(ptdls_sta->tdls_sta_state); */ -+ int i; -+ -+ ptdls_sta->sta_stats.rx_data_pkts++; -+ -+ ptdls_sta->tdls_sta_state &= ~(TDLS_WAIT_PTR_STATE); -+ -+ /* Check 4-AC queue bit */ -+ if (ptdls_sta->uapsd_vo || ptdls_sta->uapsd_vi || ptdls_sta->uapsd_be || ptdls_sta->uapsd_bk) -+ wmmps_ac = 1; -+ -+ /* If it's a direct link and have buffered frame */ -+ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { -+ if (wmmps_ac) { -+ _irqL irqL; -+ _list *xmitframe_plist, *xmitframe_phead; -+ struct xmit_frame *pxmitframe = NULL; -+ -+ _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); -+ -+ xmitframe_phead = get_list_head(&ptdls_sta->sleep_q); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ /* transmit buffered frames */ -+ while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ xmitframe_plist = get_next(xmitframe_plist); -+ rtw_list_delete(&pxmitframe->list); -+ -+ ptdls_sta->sleepq_len--; -+ ptdls_sta->sleepq_ac_len--; -+ if (ptdls_sta->sleepq_len > 0) { -+ pxmitframe->attrib.mdata = 1; -+ pxmitframe->attrib.eosp = 0; -+ } else { -+ pxmitframe->attrib.mdata = 0; -+ pxmitframe->attrib.eosp = 1; -+ } -+ pxmitframe->attrib.triggered = 1; -+ -+ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); -+ } -+ -+ if (ptdls_sta->sleepq_len == 0) -+ RTW_INFO("no buffered packets for tdls to xmit\n"); -+ else { -+ RTW_INFO("error!psta->sleepq_len=%d\n", ptdls_sta->sleepq_len); -+ ptdls_sta->sleepq_len = 0; -+ } -+ -+ _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); -+ -+ } -+ -+ } -+ -+ return _SUCCESS; -+} -+ -+#ifdef CONFIG_TDLS_CH_SW -+sint On_TDLS_Ch_Switch_Req(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta) -+{ -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ sint parsing_length; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE = 4; -+ u16 j; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ u8 zaddr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; -+ u16 switch_time = TDLS_CH_SWITCH_TIME * 1000, switch_timeout = TDLS_CH_SWITCH_TIMEOUT * 1000; -+ u8 take_care_iqk; -+ -+ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) { -+ RTW_INFO("[TDLS] Ignore %s since channel switch is not allowed\n", __func__); -+ return _FAIL; -+ } -+ -+ ptdls_sta->ch_switch_time = switch_time; -+ ptdls_sta->ch_switch_timeout = switch_timeout; -+ -+ ptr += prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; -+ parsing_length = ((union recv_frame *)precv_frame)->u.hdr.len -+ - prx_pkt_attrib->hdrlen -+ - prx_pkt_attrib->iv_len -+ - prx_pkt_attrib->icv_len -+ - LLC_HEADER_SIZE -+ - ETH_TYPE_LEN -+ - PAYLOAD_TYPE_LEN; -+ -+ pchsw_info->off_ch_num = *(ptr + 2); -+ -+ if ((*(ptr + 2) == 2) && (hal_is_band_support(padapter, BAND_ON_5G))) -+ pchsw_info->off_ch_num = 44; -+ -+ if (pchsw_info->off_ch_num != pmlmeext->cur_channel) -+ pchsw_info->delay_switch_back = _FALSE; -+ -+ /* Parsing information element */ -+ for (j = FIXED_IE; j < parsing_length;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr + j); -+ -+ switch (pIE->ElementID) { -+ case EID_SecondaryChnlOffset: -+ switch (*(pIE->data)) { -+ case EXTCHNL_OFFSET_UPPER: -+ pchsw_info->ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ -+ case EXTCHNL_OFFSET_LOWER: -+ pchsw_info->ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ -+ default: -+ pchsw_info->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+ break; -+ case _LINK_ID_IE_: -+ break; -+ case _CH_SWITCH_TIMING_: -+ ptdls_sta->ch_switch_time = (RTW_GET_LE16(pIE->data) >= TDLS_CH_SWITCH_TIME * 1000) ? -+ RTW_GET_LE16(pIE->data) : TDLS_CH_SWITCH_TIME * 1000; -+ ptdls_sta->ch_switch_timeout = (RTW_GET_LE16(pIE->data + 2) >= TDLS_CH_SWITCH_TIMEOUT * 1000) ? -+ RTW_GET_LE16(pIE->data + 2) : TDLS_CH_SWITCH_TIMEOUT * 1000; -+ RTW_INFO("[TDLS] %s ch_switch_time:%d, ch_switch_timeout:%d\n" -+ , __FUNCTION__, RTW_GET_LE16(pIE->data), RTW_GET_LE16(pIE->data + 2)); -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ } -+ -+#ifndef CONFIG_TDLS_CH_SW_V2 -+ rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk); -+ if (take_care_iqk == _TRUE) { -+ u8 central_chnl; -+ u8 bw_mode; -+ -+ bw_mode = (pchsw_info->ch_offset) ? CHANNEL_WIDTH_40 : CHANNEL_WIDTH_20; -+ central_chnl = rtw_get_center_ch(pchsw_info->off_ch_num, bw_mode, pchsw_info->ch_offset); -+ if (rtw_hal_ch_sw_iqk_info_search(padapter, central_chnl, bw_mode) < 0) { -+ if (!(pchsw_info->ch_sw_state & TDLS_CH_SWITCH_PREPARE_STATE)) -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_PREPARE); -+ -+ return _FAIL; -+ } -+ } -+#endif -+ -+ /* cancel ch sw monitor timer for responder */ -+ if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE)) -+ _cancel_timer_ex(&ptdls_sta->ch_sw_monitor_timer); -+ -+ if (_rtw_memcmp(pchsw_info->addr, zaddr, ETH_ALEN) == _TRUE) -+ _rtw_memcpy(pchsw_info->addr, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ -+ if (ATOMIC_READ(&pchsw_info->chsw_on) == _FALSE) -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_START); -+ -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_RESP); -+ -+ return _SUCCESS; -+} -+ -+sint On_TDLS_Ch_Switch_Rsp(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta) -+{ -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *ptr = precv_frame->u.hdr.rx_data; -+ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; -+ sint parsing_length; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ u8 FIXED_IE = 4; -+ u16 status_code, j, switch_time, switch_timeout; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ int ret = _SUCCESS; -+ -+ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) { -+ RTW_INFO("[TDLS] Ignore %s since channel switch is not allowed\n", __func__); -+ return _SUCCESS; -+ } -+ -+ /* If we receive Unsolicited TDLS Channel Switch Response when channel switch is running, */ -+ /* we will go back to base channel and terminate this channel switch procedure */ -+ if (ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) { -+ if (pmlmeext->cur_channel != rtw_get_oper_ch(padapter)) { -+ RTW_INFO("[TDLS] Rx unsolicited channel switch response\n"); -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_TO_BASE_CHNL); -+ goto exit; -+ } -+ } -+ -+ ptr += prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; -+ parsing_length = ((union recv_frame *)precv_frame)->u.hdr.len -+ - prx_pkt_attrib->hdrlen -+ - prx_pkt_attrib->iv_len -+ - prx_pkt_attrib->icv_len -+ - LLC_HEADER_SIZE -+ - ETH_TYPE_LEN -+ - PAYLOAD_TYPE_LEN; -+ -+ _rtw_memcpy(&status_code, ptr + 2, 2); -+ -+ if (status_code != 0) { -+ RTW_INFO("[TDLS] %s status_code:%d\n", __func__, status_code); -+ pchsw_info->ch_sw_state &= ~(TDLS_CH_SW_INITIATOR_STATE); -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_END); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ /* Parsing information element */ -+ for (j = FIXED_IE; j < parsing_length;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(ptr + j); -+ -+ switch (pIE->ElementID) { -+ case _LINK_ID_IE_: -+ break; -+ case _CH_SWITCH_TIMING_: -+ _rtw_memcpy(&switch_time, pIE->data, 2); -+ if (switch_time > ptdls_sta->ch_switch_time) -+ _rtw_memcpy(&ptdls_sta->ch_switch_time, &switch_time, 2); -+ -+ _rtw_memcpy(&switch_timeout, pIE->data + 2, 2); -+ if (switch_timeout > ptdls_sta->ch_switch_timeout) -+ _rtw_memcpy(&ptdls_sta->ch_switch_timeout, &switch_timeout, 2); -+ break; -+ default: -+ break; -+ } -+ -+ j += (pIE->Length + 2); -+ } -+ -+ if ((pmlmeext->cur_channel == rtw_get_oper_ch(padapter)) && -+ (pchsw_info->ch_sw_state & TDLS_WAIT_CH_RSP_STATE)) { -+ if (ATOMIC_READ(&pchsw_info->chsw_on) == _TRUE) -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_TO_OFF_CHNL); -+ } -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_TDLS_CH_SW */ -+ -+#ifdef CONFIG_WFD -+void wfd_ie_tdls(_adapter *padapter, u8 *pframe, u32 *pktlen) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wifi_display_info *pwfd_info = padapter->tdlsinfo.wfd_info; -+ u8 wfdie[MAX_WFD_IE_LEN] = { 0x00 }; -+ u32 wfdielen = 0; -+ u16 v16 = 0; -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) -+ return; -+ -+ /* WFD OUI */ -+ wfdielen = 0; -+ wfdie[wfdielen++] = 0x50; -+ wfdie[wfdielen++] = 0x6F; -+ wfdie[wfdielen++] = 0x9A; -+ wfdie[wfdielen++] = 0x0A; /* WFA WFD v1.0 */ -+ -+ /* -+ * Commented by Albert 20110825 -+ * According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes -+ * 1. WFD Device Information -+ * 2. Associated BSSID ( Optional ) -+ * 3. Local IP Adress ( Optional ) -+ */ -+ -+ /* WFD Device Information ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value1: */ -+ /* WFD device information */ -+ /* available for WFD session + Preferred TDLS + WSD ( WFD Service Discovery ) */ -+ v16 = pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL -+ | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_WSD; -+ RTW_PUT_BE16(wfdie + wfdielen, v16); -+ wfdielen += 2; -+ -+ /* Value2: */ -+ /* Session Management Control Port */ -+ /* Default TCP port for RTSP messages is 554 */ -+ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->tdls_rtsp_ctrlport); -+ wfdielen += 2; -+ -+ /* Value3: */ -+ /* WFD Device Maximum Throughput */ -+ /* 300Mbps is the maximum throughput */ -+ RTW_PUT_BE16(wfdie + wfdielen, 300); -+ wfdielen += 2; -+ -+ /* Associated BSSID ATTR */ -+ /* Type: */ -+ wfdie[wfdielen++] = WFD_ATTR_ASSOC_BSSID; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); -+ wfdielen += 2; -+ -+ /* Value: */ -+ /* Associated BSSID */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ _rtw_memcpy(wfdie + wfdielen, &pmlmepriv->assoc_bssid[0], ETH_ALEN); -+ else -+ _rtw_memset(wfdie + wfdielen, 0x00, ETH_ALEN); -+ -+ /* Local IP Address ATTR */ -+ wfdie[wfdielen++] = WFD_ATTR_LOCAL_IP_ADDR; -+ -+ /* Length: */ -+ /* Note: In the WFD specification, the size of length field is 2. */ -+ RTW_PUT_BE16(wfdie + wfdielen, 0x0005); -+ wfdielen += 2; -+ -+ /* Version: */ -+ /* 0x01: Version1;IPv4 */ -+ wfdie[wfdielen++] = 0x01; -+ -+ /* IPv4 Address */ -+ _rtw_memcpy(wfdie + wfdielen, pwfd_info->ip_address, 4); -+ wfdielen += 4; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, pktlen); -+ -+} -+#endif /* CONFIG_WFD */ -+ -+void rtw_build_tdls_setup_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ int i = 0 ; -+ u32 time; -+ u8 *pframe_head; -+ -+ /* SNonce */ -+ if (pattrib->encrypt) { -+ for (i = 0; i < 8; i++) { -+ time = rtw_get_current_time(); -+ _rtw_memcpy(&ptdls_sta->SNonce[4 * i], (u8 *)&time, 4); -+ } -+ } -+ -+ pframe_head = pframe; /* For rtw_tdls_set_ht_cap() */ -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ -+ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_sup_ch(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_sup_reg_class(pframe, pattrib); -+ -+ if (pattrib->encrypt) -+ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); -+ -+ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); -+ -+ if (pattrib->encrypt) { -+ pframe = rtw_tdls_set_ftie(ptxmgmt -+ , pframe -+ , pattrib -+ , NULL -+ , ptdls_sta->SNonce); -+ -+ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); -+ } -+ -+#ifdef CONFIG_80211N_HT -+ /* Sup_reg_classes(optional) */ -+ if (pregistrypriv->ht_enable == _TRUE) -+ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); -+#endif -+ -+ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); -+ -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _TRUE); -+ -+ if ((pregistrypriv->wmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) -+ pframe = rtw_tdls_set_qos_cap(pframe, pattrib); -+ -+#ifdef CONFIG_80211AC_VHT -+ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14) -+ && REGSTY_IS_11AC_ENABLE(pregistrypriv) -+ && is_supported_vht(pregistrypriv->wireless_mode) -+ && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) -+ ) { -+ pframe = rtw_tdls_set_aid(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_vht_cap(padapter, pframe, pattrib); -+ } -+#endif -+ -+#ifdef CONFIG_WFD -+ if (padapter->wdinfo.wfd_tdls_enable == 1) -+ wfd_ie_tdls(padapter, pframe, &(pattrib->pktlen)); -+#endif -+ -+} -+ -+void rtw_build_tdls_setup_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ u8 k; /* for random ANonce */ -+ u8 *pftie = NULL, *ptimeout_ie = NULL, *plinkid_ie = NULL, *prsnie = NULL, *pftie_mic = NULL; -+ u32 time; -+ u8 *pframe_head; -+ -+ if (pattrib->encrypt) { -+ for (k = 0; k < 8; k++) { -+ time = rtw_get_current_time(); -+ _rtw_memcpy(&ptdls_sta->ANonce[4 * k], (u8 *)&time, 4); -+ } -+ } -+ -+ pframe_head = pframe; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); -+ -+ if (ptxmgmt->status_code != 0) { -+ RTW_INFO("[%s] status_code:%04x\n", __FUNCTION__, ptxmgmt->status_code); -+ return; -+ } -+ -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_sup_ch(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_sup_reg_class(pframe, pattrib); -+ -+ if (pattrib->encrypt) { -+ prsnie = pframe; -+ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _FALSE, ptdls_sta); -+ } -+ -+ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); -+ -+ if (pattrib->encrypt) { -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) -+ wpa_tdls_generate_tpk(padapter, ptdls_sta); -+ -+ pftie = pframe; -+ pftie_mic = pframe + 4; -+ pframe = rtw_tdls_set_ftie(ptxmgmt -+ , pframe -+ , pattrib -+ , ptdls_sta->ANonce -+ , ptdls_sta->SNonce); -+ -+ ptimeout_ie = pframe; -+ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _FALSE, ptdls_sta); -+ } -+ -+#ifdef CONFIG_80211N_HT -+ /* Sup_reg_classes(optional) */ -+ if (pregistrypriv->ht_enable == _TRUE) -+ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head, pattrib); -+#endif -+ -+ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); -+ -+ plinkid_ie = pframe; -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _FALSE); -+ -+ /* Fill FTIE mic */ -+ if (pattrib->encrypt && rtw_tdls_is_driver_setup(padapter) == _TRUE) -+ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); -+ -+ if ((pregistrypriv->wmm_enable == _TRUE) || (padapter->mlmepriv.htpriv.ht_option == _TRUE)) -+ pframe = rtw_tdls_set_qos_cap(pframe, pattrib); -+ -+#ifdef CONFIG_80211AC_VHT -+ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14) -+ && REGSTY_IS_11AC_ENABLE(pregistrypriv) -+ && is_supported_vht(pregistrypriv->wireless_mode) -+ && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) -+ ) { -+ pframe = rtw_tdls_set_aid(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_vht_cap(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_vht_op_mode_notify(padapter, pframe, pattrib, pmlmeext->cur_bwmode); -+ } -+#endif -+ -+#ifdef CONFIG_WFD -+ if (padapter->wdinfo.wfd_tdls_enable) -+ wfd_ie_tdls(padapter, pframe, &(pattrib->pktlen)); -+#endif -+ -+} -+ -+void rtw_build_tdls_setup_cfm_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ -+ unsigned int ie_len; -+ unsigned char *p; -+ u8 wmm_param_ele[24] = {0}; -+ u8 *pftie = NULL, *ptimeout_ie = NULL, *plinkid_ie = NULL, *prsnie = NULL, *pftie_mic = NULL; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ -+ if (ptxmgmt->status_code != 0) -+ return; -+ -+ if (pattrib->encrypt) { -+ prsnie = pframe; -+ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); -+ } -+ -+ if (pattrib->encrypt) { -+ pftie = pframe; -+ pftie_mic = pframe + 4; -+ pframe = rtw_tdls_set_ftie(ptxmgmt -+ , pframe -+ , pattrib -+ , ptdls_sta->ANonce -+ , ptdls_sta->SNonce); -+ -+ ptimeout_ie = pframe; -+ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, ptdls_sta); -+ -+ if (rtw_tdls_is_driver_setup(padapter) == _TRUE) { -+ /* Start TPK timer */ -+ ptdls_sta->TPK_count = 0; -+ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); -+ } -+ } -+ -+ /* HT operation; todo */ -+ -+ plinkid_ie = pframe; -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _TRUE); -+ -+ if (pattrib->encrypt && (rtw_tdls_is_driver_setup(padapter) == _TRUE)) -+ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); -+ -+ if (ptdls_sta->qos_option == _TRUE) -+ pframe = rtw_tdls_set_wmm_params(padapter, pframe, pattrib); -+ -+#ifdef CONFIG_80211AC_VHT -+ if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) -+ && (ptdls_sta->vhtpriv.vht_option == _TRUE) && (pmlmeext->cur_channel > 14) -+ && REGSTY_IS_11AC_ENABLE(pregistrypriv) -+ && is_supported_vht(pregistrypriv->wireless_mode) -+ && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) -+ ) { -+ pframe = rtw_tdls_set_vht_operation(padapter, pframe, pattrib, pmlmeext->cur_channel); -+ pframe = rtw_tdls_set_vht_op_mode_notify(padapter, pframe, pattrib, pmlmeext->cur_bwmode); -+ } -+#endif -+} -+ -+void rtw_build_tdls_teardown_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta) -+{ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ u8 *pftie = NULL, *pftie_mic = NULL, *plinkid_ie = NULL; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); -+ -+ if (pattrib->encrypt) { -+ pftie = pframe; -+ pftie_mic = pframe + 4; -+ pframe = rtw_tdls_set_ftie(ptxmgmt -+ , pframe -+ , pattrib -+ , ptdls_sta->ANonce -+ , ptdls_sta->SNonce); -+ } -+ -+ plinkid_ie = pframe; -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _FALSE); -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _TRUE); -+ -+ if (pattrib->encrypt && (rtw_tdls_is_driver_setup(padapter) == _TRUE)) -+ wpa_tdls_teardown_ftie_mic(ptdls_sta->tpk.kck, plinkid_ie, ptxmgmt->status_code, 1, 4, pftie, pftie_mic); -+} -+ -+void rtw_build_tdls_dis_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _TRUE); -+ -+} -+ -+void rtw_build_tdls_dis_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, u8 privacy) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ u8 *pframe_head, pktlen_index; -+ -+ pktlen_index = pattrib->pktlen; -+ pframe_head = pframe; -+ -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_PUBLIC); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_capability(padapter, pframe, pattrib); -+ -+ pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib); -+ -+ pframe = rtw_tdls_set_sup_ch(padapter, pframe, pattrib); -+ -+ if (privacy) -+ pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, NULL); -+ -+ pframe = rtw_tdls_set_ext_cap(pframe, pattrib); -+ -+ if (privacy) { -+ pframe = rtw_tdls_set_ftie(ptxmgmt, pframe, pattrib, NULL, NULL); -+ pframe = rtw_tdls_set_timeout_interval(ptxmgmt, pframe, pattrib, _TRUE, NULL); -+ } -+ -+#ifdef CONFIG_80211N_HT -+ if (pregistrypriv->ht_enable == _TRUE) -+ pframe = rtw_tdls_set_ht_cap(padapter, pframe_head - pktlen_index, pattrib); -+#endif -+ -+ pframe = rtw_tdls_set_bss_coexist(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _FALSE); -+ -+} -+ -+ -+void rtw_build_tdls_peer_traffic_indication_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta) -+{ -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ u8 AC_queue = 0; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _FALSE); -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _TRUE); -+ -+ /* PTI control */ -+ /* PU buffer status */ -+ if (ptdls_sta->uapsd_bk & BIT(1)) -+ AC_queue = BIT(0); -+ if (ptdls_sta->uapsd_be & BIT(1)) -+ AC_queue = BIT(1); -+ if (ptdls_sta->uapsd_vi & BIT(1)) -+ AC_queue = BIT(2); -+ if (ptdls_sta->uapsd_vo & BIT(1)) -+ AC_queue = BIT(3); -+ pframe = rtw_set_ie(pframe, _PTI_BUFFER_STATUS_, 1, &AC_queue, &(pattrib->pktlen)); -+ -+} -+ -+void rtw_build_tdls_peer_traffic_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta) -+{ -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _FALSE); -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _TRUE); -+} -+ -+#ifdef CONFIG_TDLS_CH_SW -+void rtw_build_tdls_ch_switch_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u16 switch_time = TDLS_CH_SWITCH_TIME * 1000, switch_timeout = TDLS_CH_SWITCH_TIMEOUT * 1000; -+ -+ ptdls_sta->ch_switch_time = switch_time; -+ ptdls_sta->ch_switch_timeout = switch_timeout; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_target_ch(padapter, pframe, pattrib); -+ pframe = rtw_tdls_set_reg_class(pframe, pattrib, ptdls_sta); -+ -+ if (ptdlsinfo->chsw_info.ch_offset != HAL_PRIME_CHNL_OFFSET_DONT_CARE) { -+ switch (ptdlsinfo->chsw_info.ch_offset) { -+ case HAL_PRIME_CHNL_OFFSET_LOWER: -+ pframe = rtw_tdls_set_second_channel_offset(pframe, pattrib, SCA); -+ break; -+ case HAL_PRIME_CHNL_OFFSET_UPPER: -+ pframe = rtw_tdls_set_second_channel_offset(pframe, pattrib, SCB); -+ break; -+ } -+ } -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _FALSE); -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _TRUE); -+ -+ pframe = rtw_tdls_set_ch_sw(pframe, pattrib, ptdls_sta); -+ -+} -+ -+void rtw_build_tdls_ch_switch_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta) -+{ -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_tdls_set_category(pframe, pattrib, RTW_WLAN_CATEGORY_TDLS); -+ pframe = rtw_tdls_set_action(pframe, pattrib, ptxmgmt); -+ pframe = rtw_tdls_set_status_code(pframe, pattrib, ptxmgmt); -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE) -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _FALSE); -+ else if (ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE) -+ pframe = rtw_tdls_set_linkid(padapter, pframe, pattrib, _TRUE); -+ -+ pframe = rtw_tdls_set_ch_sw(pframe, pattrib, ptdls_sta); -+} -+#endif -+ -+#ifdef CONFIG_WFD -+void rtw_build_tunneled_probe_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe) -+{ -+ u8 i; -+ _adapter *iface = NULL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct wifidirect_info *pwdinfo; -+ -+ u8 category = RTW_WLAN_CATEGORY_P2P; -+ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; -+ u8 probe_req = 4; -+ u8 wfdielen = 0; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(probe_req), &(pattrib->pktlen)); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ pwdinfo = &iface->wdinfo; -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+ } -+ } -+ } -+} -+ -+void rtw_build_tunneled_probe_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe) -+{ -+ u8 i; -+ _adapter *iface = NULL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct wifidirect_info *pwdinfo; -+ u8 category = RTW_WLAN_CATEGORY_P2P; -+ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; -+ u8 probe_rsp = 5; -+ u8 wfdielen = 0; -+ -+ pframe = rtw_tdls_set_payload_type(pframe, pattrib); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(probe_rsp), &(pattrib->pktlen)); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ pwdinfo = &iface->wdinfo; -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 1); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+ } -+ } -+ } -+} -+#endif /* CONFIG_WFD */ -+ -+void _tdls_tpk_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ struct tdls_txmgmt txmgmt; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ ptdls_sta->TPK_count++; -+ /* TPK_timer expired in a second */ -+ /* Retry timer should set at least 301 sec. */ -+ if (ptdls_sta->TPK_count >= (ptdls_sta->TDLS_PeerKey_Lifetime - 3)) { -+ RTW_INFO("[TDLS] %s, Re-Setup TDLS link with "MAC_FMT" since TPK lifetime expires!\n", -+ __FUNCTION__, MAC_ARG(ptdls_sta->cmn.mac_addr)); -+ ptdls_sta->TPK_count = 0; -+ _rtw_memcpy(txmgmt.peer, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ issue_tdls_setup_req(ptdls_sta->padapter, &txmgmt, _FALSE); -+ } -+ -+ _set_timer(&ptdls_sta->TPK_timer, ONE_SEC); -+} -+ -+#ifdef CONFIG_TDLS_CH_SW -+void _tdls_ch_switch_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ _adapter *padapter = ptdls_sta->padapter; -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_END_TO_BASE_CHNL); -+ RTW_INFO("[TDLS] %s, can't get traffic from op_ch:%d\n", __func__, rtw_get_oper_ch(padapter)); -+} -+ -+void _tdls_delay_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ _adapter *padapter = ptdls_sta->padapter; -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ -+ RTW_INFO("[TDLS] %s, op_ch:%d, tdls_state:0x%08x\n", __func__, rtw_get_oper_ch(padapter), ptdls_sta->tdls_sta_state); -+ pchsw_info->delay_switch_back = _TRUE; -+} -+ -+void _tdls_stay_on_base_chnl_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ _adapter *padapter = ptdls_sta->padapter; -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ -+ if (ptdls_sta != NULL) { -+ issue_tdls_ch_switch_req(padapter, ptdls_sta); -+ pchsw_info->ch_sw_state |= TDLS_WAIT_CH_RSP_STATE; -+ } -+} -+ -+void _tdls_ch_switch_monitor_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ _adapter *padapter = ptdls_sta->padapter; -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_END); -+ RTW_INFO("[TDLS] %s, does not receive ch sw req\n", __func__); -+} -+ -+#endif -+ -+void _tdls_handshake_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ _adapter *padapter = NULL; -+ struct tdls_txmgmt txmgmt; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ _rtw_memcpy(txmgmt.peer, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; -+ -+ if (ptdls_sta != NULL) { -+ padapter = ptdls_sta->padapter; -+ -+ RTW_INFO("[TDLS] Handshake time out\n"); -+ if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_TEARDOWN_STA); -+ else -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_TEARDOWN_STA_LOCALLY); -+ } -+} -+ -+void _tdls_pti_timer_hdl(void *FunctionContext) -+{ -+ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; -+ _adapter *padapter = NULL; -+ struct tdls_txmgmt txmgmt; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ _rtw_memcpy(txmgmt.peer, ptdls_sta->cmn.mac_addr, ETH_ALEN); -+ txmgmt.status_code = _RSON_TDLS_TEAR_TOOFAR_; -+ -+ if (ptdls_sta != NULL) { -+ padapter = ptdls_sta->padapter; -+ -+ if (ptdls_sta->tdls_sta_state & TDLS_WAIT_PTR_STATE) { -+ RTW_INFO("[TDLS] Doesn't receive PTR from peer dev:"MAC_FMT"; " -+ "Send TDLS Tear Down\n", MAC_ARG(ptdls_sta->cmn.mac_addr)); -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_TEARDOWN_STA); -+ } -+ } -+} -+ -+void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta) -+{ -+ psta->padapter = padapter; -+ rtw_init_timer(&psta->TPK_timer, padapter, _tdls_tpk_timer_hdl, psta); -+#ifdef CONFIG_TDLS_CH_SW -+ rtw_init_timer(&psta->ch_sw_timer, padapter, _tdls_ch_switch_timer_hdl, psta); -+ rtw_init_timer(&psta->delay_timer, padapter, _tdls_delay_timer_hdl, psta); -+ rtw_init_timer(&psta->stay_on_base_chnl_timer, padapter, _tdls_stay_on_base_chnl_timer_hdl, psta); -+ rtw_init_timer(&psta->ch_sw_monitor_timer, padapter, _tdls_ch_switch_monitor_timer_hdl, psta); -+#endif -+ rtw_init_timer(&psta->handshake_timer, padapter, _tdls_handshake_timer_hdl, psta); -+ rtw_init_timer(&psta->pti_timer, padapter, _tdls_pti_timer_hdl, psta); -+} -+ -+void rtw_cancel_tdls_timer(struct sta_info *psta) -+{ -+ _cancel_timer_ex(&psta->TPK_timer); -+#ifdef CONFIG_TDLS_CH_SW -+ _cancel_timer_ex(&psta->ch_sw_timer); -+ _cancel_timer_ex(&psta->delay_timer); -+ _cancel_timer_ex(&psta->stay_on_base_chnl_timer); -+ _cancel_timer_ex(&psta->ch_sw_monitor_timer); -+#endif -+ _cancel_timer_ex(&psta->handshake_timer); -+ _cancel_timer_ex(&psta->pti_timer); -+} -+ -+void rtw_tdls_teardown_pre_hdl(_adapter *padapter, struct sta_info *psta) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ _irqL irqL; -+ -+ rtw_cancel_tdls_timer(psta); -+ -+ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ if (ptdlsinfo->sta_cnt != 0) -+ ptdlsinfo->sta_cnt--; -+ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); -+ -+ if (ptdlsinfo->sta_cnt < MAX_ALLOWED_TDLS_STA_NUM) { -+ ptdlsinfo->sta_maximum = _FALSE; -+ _rtw_memset(&ptdlsinfo->ss_record, 0x00, sizeof(struct tdls_ss_record)); -+ } -+ -+ if (ptdlsinfo->sta_cnt == 0) -+ rtw_tdls_set_link_established(padapter, _FALSE); -+ else -+ RTW_INFO("Remain tdls sta:%02x\n", ptdlsinfo->sta_cnt); -+} -+ -+void rtw_tdls_teardown_post_hdl(_adapter *padapter, struct sta_info *psta, u8 enqueue_cmd) -+{ -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ /* Clear cam */ -+ rtw_clearstakey_cmd(padapter, psta, enqueue_cmd); -+ -+ /* Update sta media status */ -+ if (enqueue_cmd) -+ rtw_sta_media_status_rpt_cmd(padapter, psta, 0); -+ else -+ rtw_sta_media_status_rpt(padapter, psta, 0); -+ -+ /* Set RCR if necessary */ -+ if (ptdlsinfo->sta_cnt == 0) { -+ if (enqueue_cmd) -+ rtw_tdls_cmd(padapter, NULL, TDLS_RS_RCR); -+ else -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_TDLS_NOLINK); -+ } -+ -+ /* Free tdls sta info */ -+ rtw_free_stainfo(padapter, psta); -+} -+ -+int rtw_tdls_is_driver_setup(_adapter *padapter) -+{ -+ return padapter->tdlsinfo.driver_setup; -+} -+ -+const char *rtw_tdls_action_txt(enum TDLS_ACTION_FIELD action) -+{ -+ switch (action) { -+ case TDLS_SETUP_REQUEST: -+ return "TDLS_SETUP_REQUEST"; -+ case TDLS_SETUP_RESPONSE: -+ return "TDLS_SETUP_RESPONSE"; -+ case TDLS_SETUP_CONFIRM: -+ return "TDLS_SETUP_CONFIRM"; -+ case TDLS_TEARDOWN: -+ return "TDLS_TEARDOWN"; -+ case TDLS_PEER_TRAFFIC_INDICATION: -+ return "TDLS_PEER_TRAFFIC_INDICATION"; -+ case TDLS_CHANNEL_SWITCH_REQUEST: -+ return "TDLS_CHANNEL_SWITCH_REQUEST"; -+ case TDLS_CHANNEL_SWITCH_RESPONSE: -+ return "TDLS_CHANNEL_SWITCH_RESPONSE"; -+ case TDLS_PEER_PSM_REQUEST: -+ return "TDLS_PEER_PSM_REQUEST"; -+ case TDLS_PEER_PSM_RESPONSE: -+ return "TDLS_PEER_PSM_RESPONSE"; -+ case TDLS_PEER_TRAFFIC_RESPONSE: -+ return "TDLS_PEER_TRAFFIC_RESPONSE"; -+ case TDLS_DISCOVERY_REQUEST: -+ return "TDLS_DISCOVERY_REQUEST"; -+ case TDLS_DISCOVERY_RESPONSE: -+ return "TDLS_DISCOVERY_RESPONSE"; -+ default: -+ return "UNKNOWN"; -+ } -+} -+ -+#endif /* CONFIG_TDLS */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_vht.c b/drivers/staging/rtl8723cs/core/rtw_vht.c -new file mode 100644 -index 000000000000..55b170962458 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_vht.c -@@ -0,0 +1,1141 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_VHT_C -+ -+#include -+#include -+ -+#ifdef CONFIG_80211AC_VHT -+const u16 _vht_max_mpdu_len[] = { -+ 3895, -+ 7991, -+ 11454, -+ 0, -+}; -+ -+const u8 _vht_sup_ch_width_set_to_bw_cap[] = { -+ BW_CAP_80M, -+ BW_CAP_80M | BW_CAP_160M, -+ BW_CAP_80M | BW_CAP_160M | BW_CAP_80_80M, -+ 0, -+}; -+ -+#ifdef CONFIG_RTW_DEBUG -+const char *const _vht_sup_ch_width_set_str[] = { -+ "80MHz", -+ "160MHz", -+ "160MHz & 80+80MHz", -+ "BW-RSVD", -+}; -+ -+void dump_vht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len) -+{ -+ if (buf_len != VHT_CAP_IE_LEN) { -+ RTW_PRINT_SEL(sel, "Invalid VHT capability IE len:%d != %d\n", buf_len, VHT_CAP_IE_LEN); -+ return; -+ } -+ -+ RTW_PRINT_SEL(sel, "cap_info:%02x %02x %02x %02x: MAX_MPDU_LEN:%u %s%s%s%s%s RX-STBC:%u MAX_AMPDU_LEN:%u\n" -+ , *(buf), *(buf + 1), *(buf + 2), *(buf + 3) -+ , vht_max_mpdu_len(GET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(buf)) -+ , vht_sup_ch_width_set_str(GET_VHT_CAPABILITY_ELE_CHL_WIDTH(buf)) -+ , GET_VHT_CAPABILITY_ELE_RX_LDPC(buf) ? " RX-LDPC" : "" -+ , GET_VHT_CAPABILITY_ELE_SHORT_GI80M(buf) ? " SGI-80" : "" -+ , GET_VHT_CAPABILITY_ELE_SHORT_GI160M(buf) ? " SGI-160" : "" -+ , GET_VHT_CAPABILITY_ELE_TX_STBC(buf) ? " TX-STBC" : "" -+ , GET_VHT_CAPABILITY_ELE_RX_STBC(buf) -+ , VHT_MAX_AMPDU_LEN(GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(buf)) -+ ); -+} -+ -+void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len) -+{ -+ const u8 *vht_cap_ie; -+ sint vht_cap_ielen; -+ -+ vht_cap_ie = rtw_get_ie(ie, WLAN_EID_VHT_CAPABILITY, &vht_cap_ielen, ie_len); -+ if (!ie || vht_cap_ie != ie) -+ return; -+ -+ dump_vht_cap_ie_content(sel, vht_cap_ie + 2, vht_cap_ielen); -+} -+ -+const char *const _vht_op_ch_width_str[] = { -+ "20 or 40MHz", -+ "80MHz", -+ "160MHz", -+ "80+80MHz", -+ "BW-RSVD", -+}; -+ -+void dump_vht_op_ie_content(void *sel, const u8 *buf, u32 buf_len) -+{ -+ if (buf_len != VHT_OP_IE_LEN) { -+ RTW_PRINT_SEL(sel, "Invalid VHT operation IE len:%d != %d\n", buf_len, VHT_OP_IE_LEN); -+ return; -+ } -+ -+ RTW_PRINT_SEL(sel, "%s, ch0:%u, ch1:%u\n" -+ , vht_op_ch_width_str(GET_VHT_OPERATION_ELE_CHL_WIDTH(buf)) -+ , GET_VHT_OPERATION_ELE_CENTER_FREQ1(buf) -+ , GET_VHT_OPERATION_ELE_CENTER_FREQ2(buf) -+ ); -+} -+ -+void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len) -+{ -+ const u8 *vht_op_ie; -+ sint vht_op_ielen; -+ -+ vht_op_ie = rtw_get_ie(ie, WLAN_EID_VHT_OPERATION, &vht_op_ielen, ie_len); -+ if (!ie || vht_op_ie != ie) -+ return; -+ -+ dump_vht_op_ie_content(sel, vht_op_ie + 2, vht_op_ielen); -+} -+#endif -+ -+/* 20/40/80, ShortGI, MCS Rate */ -+const u16 VHT_MCS_DATA_RATE[3][2][40] = { /* unit: 0.5M */ -+ { { -+ 13, 26, 39, 52, 78, 104, 117, 130, 156, 156, -+ 26, 52, 78, 104, 156, 208, 234, 260, 312, 312, -+ 39, 78, 117, 156, 234, 312, 351, 390, 468, 520, -+ 52, 104, 156, 208, 312, 416, 468, 520, 624, 624, -+ }, /* Long GI, 20MHz */ -+ { -+ 14, 29, 43, 58, 87, 116, 130, 144, 173, 173, -+ 29, 58, 87, 116, 173, 231, 260, 289, 347, 347, -+ 43, 87, 130, 173, 260, 347, 390, 433, 520, 578, -+ 58, 116, 173, 231, 347, 462, 520, 578, 693, 693, -+ } -+ }, /* Short GI, 20MHz */ -+ { { -+ 27, 54, 81, 108, 162, 216, 243, 270, 324, 360, -+ 54, 108, 162, 216, 324, 432, 486, 540, 648, 720, -+ 81, 162, 243, 324, 486, 648, 729, 810, 972, 1080, -+ 108, 216, 324, 432, 648, 864, 972, 1080, 1296, 1440, -+ }, /* Long GI, 40MHz */ -+ { -+ 30, 60, 90, 120, 180, 240, 270, 300, 360, 400, -+ 60, 120, 180, 240, 360, 480, 540, 600, 720, 800, -+ 90, 180, 270, 360, 540, 720, 810, 900, 1080, 1200, -+ 120, 240, 360, 480, 720, 960, 1080, 1200, 1440, 1600, -+ } -+ }, /* Short GI, 40MHz */ -+ { { -+ 59, 117, 176, 234, 351, 468, 527, 585, 702, 780, -+ 117, 234, 351, 468, 702, 936, 1053, 1170, 1404, 1560, -+ 176, 351, 527, 702, 1053, 1404, 1580, 1755, 2106, 2340, -+ 234, 468, 702, 936, 1404, 1872, 2106, 2340, 2808, 3120, -+ }, /* Long GI, 80MHz */ -+ { -+ 65, 130, 195, 260, 390, 520, 585, 650, 780, 867, -+ 130, 260, 390, 520, 780, 1040, 1170, 1300, 1560, 1734, -+ 195, 390, 585, 780, 1170, 1560, 1755, 1950, 2340, 2600, -+ 260, 520, 780, 1040, 1560, 2080, 2340, 2600, 3120, 3467, -+ } -+ } /* Short GI, 80MHz */ -+}; -+ -+u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map) -+{ -+ u8 i, j; -+ u8 bit_map; -+ u8 vht_mcs_rate = 0; -+ -+ for (i = 0; i < 2; i++) { -+ if (pvht_mcs_map[i] != 0xff) { -+ for (j = 0; j < 8; j += 2) { -+ bit_map = (pvht_mcs_map[i] >> j) & 3; -+ -+ if (bit_map != 3) -+ vht_mcs_rate = MGN_VHT1SS_MCS7 + 10 * j / 2 + i * 40 + bit_map; /* VHT rate indications begin from 0x90 */ -+ } -+ } -+ } -+ -+ /* RTW_INFO("HighestVHTMCSRate is %x\n", vht_mcs_rate); */ -+ return vht_mcs_rate; -+} -+ -+u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map) -+{ -+ u8 i, j; -+ u8 bit_map; -+ u8 nss = 0; -+ -+ for (i = 0; i < 2; i++) { -+ if (pvht_mcs_map[i] != 0xff) { -+ for (j = 0; j < 8; j += 2) { -+ bit_map = (pvht_mcs_map[i] >> j) & 3; -+ -+ if (bit_map != 3) -+ nss++; -+ } -+ } -+ } -+ -+ /* RTW_INFO("%s : %dSS\n", __FUNCTION__, nss); */ -+ return nss; -+} -+ -+void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map) -+{ -+ u8 i, j; -+ u8 cur_rate, target_rate; -+ -+ for (i = 0; i < 2; i++) { -+ target_mcs_map[i] = 0; -+ for (j = 0; j < 8; j += 2) { -+ cur_rate = (cur_mcs_map[i] >> j) & 3; -+ if (cur_rate == 3) /* 0x3 indicates not supported that num of SS */ -+ target_rate = 3; -+ else if (nss <= ((j / 2) + i * 4)) -+ target_rate = 3; -+ else -+ target_rate = cur_rate; -+ -+ target_mcs_map[i] |= (target_rate << j); -+ } -+ } -+ -+ /* RTW_INFO("%s : %dSS\n", __FUNCTION__, nss); */ -+} -+ -+u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate) -+{ -+ if (vht_mcs_rate > MGN_VHT4SS_MCS9) -+ vht_mcs_rate = MGN_VHT4SS_MCS9; -+ /* RTW_INFO("bw=%d, short_GI=%d, ((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)=%d\n", bw, short_GI, ((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)); */ -+ return VHT_MCS_DATA_RATE[bw][short_GI][((vht_mcs_rate - MGN_VHT1SS_MCS0) & 0x3f)]; -+} -+ -+void rtw_vht_use_default_setting(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ BOOLEAN bHwLDPCSupport = _FALSE, bHwSTBCSupport = _FALSE; -+#ifdef CONFIG_BEAMFORMING -+ BOOLEAN bHwSupportBeamformer = _FALSE, bHwSupportBeamformee = _FALSE; -+ u8 mu_bfer, mu_bfee; -+#endif /* CONFIG_BEAMFORMING */ -+ u8 tx_nss, rx_nss; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ pvhtpriv->sgi_80m = TEST_FLAG(pregistrypriv->short_gi, BIT2) ? _TRUE : _FALSE; -+ -+ /* LDPC support */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_LDPC, (u8 *)&bHwLDPCSupport); -+ CLEAR_FLAGS(pvhtpriv->ldpc_cap); -+ if (bHwLDPCSupport) { -+ if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT0)) -+ SET_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX); -+ } -+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_LDPC, (u8 *)&bHwLDPCSupport); -+ if (bHwLDPCSupport) { -+ if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT1)) -+ SET_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX); -+ } -+ if (pvhtpriv->ldpc_cap) -+ RTW_INFO("[VHT] Support LDPC = 0x%02X\n", pvhtpriv->ldpc_cap); -+ -+ /* STBC */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_STBC, (u8 *)&bHwSTBCSupport); -+ CLEAR_FLAGS(pvhtpriv->stbc_cap); -+ if (bHwSTBCSupport) { -+ if (TEST_FLAG(pregistrypriv->stbc_cap, BIT1)) -+ SET_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX); -+ } -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)&bHwSTBCSupport); -+ if (bHwSTBCSupport) { -+ if (TEST_FLAG(pregistrypriv->stbc_cap, BIT0)) -+ SET_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX); -+ } -+ if (pvhtpriv->stbc_cap) -+ RTW_INFO("[VHT] Support STBC = 0x%02X\n", pvhtpriv->stbc_cap); -+ -+ /* Beamforming setting */ -+ CLEAR_FLAGS(pvhtpriv->beamform_cap); -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+#ifdef CONFIG_CONCURRENT_MODE -+ /* only enable beamforming in STA client mode */ -+ if (MLME_IS_STA(padapter) && !MLME_IS_GC(padapter)) -+#else -+ if ((MLME_IS_AP(padapter) && !MLME_IS_GO(padapter)) || -+ (MLME_IS_STA(padapter) && !MLME_IS_GC(padapter))) -+#endif -+#endif -+ { -+ rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, -+ (u8 *)&bHwSupportBeamformer); -+ rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, -+ (u8 *)&bHwSupportBeamformee); -+ mu_bfer = _FALSE; -+ mu_bfee = _FALSE; -+ rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMER, &mu_bfer); -+ rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMEE, &mu_bfee); -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT0) && bHwSupportBeamformer) { -+#ifdef CONFIG_CONCURRENT_MODE -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ RTW_INFO("[VHT] CONCURRENT AP Support Beamformer\n"); -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2)) -+ && (_TRUE == mu_bfer)) { -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); -+ RTW_INFO("[VHT] Support MU-MIMO AP\n"); -+ } -+ } else -+ RTW_INFO("[VHT] CONCURRENT not AP ;not allow Support Beamformer\n"); -+#else -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ RTW_INFO("[VHT] Support Beamformer\n"); -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2)) -+ && (_TRUE == mu_bfer) -+ && ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) { -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); -+ RTW_INFO("[VHT] Support MU-MIMO AP\n"); -+ } -+#endif -+ } -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT1) && bHwSupportBeamformee) { -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ RTW_INFO("[VHT] Support Beamformee\n"); -+ if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(3)) -+ && (_TRUE == mu_bfee) -+ && ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE)) { -+ SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE); -+ RTW_INFO("[VHT] Support MU-MIMO STA\n"); -+ } -+ } -+ } -+#endif /* CONFIG_BEAMFORMING */ -+ -+ pvhtpriv->ampdu_len = pregistrypriv->ampdu_factor; -+ -+ tx_nss = GET_HAL_TX_NSS(padapter); -+ rx_nss = GET_HAL_RX_NSS(padapter); -+ -+ /* for now, vhtpriv.vht_mcs_map comes from RX NSS */ -+ rtw_vht_nss_to_mcsmap(rx_nss, pvhtpriv->vht_mcs_map, pregistrypriv->vht_rx_mcs_map); -+ pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map); -+} -+ -+u64 rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss) -+{ -+ u8 i, j, tmp; -+ u64 bitmap = 0; -+ u8 bits_nss = nss * 2; -+ -+ for (i = j = 0; i < bits_nss; i += 2, j += 10) { -+ /* every two bits means single sptial stream */ -+ tmp = (mcs_map[i / 8] >> i) & 3; -+ -+ switch (tmp) { -+ case 2: -+ bitmap = bitmap | ((u64)0x03ff << j); -+ break; -+ case 1: -+ bitmap = bitmap | ((u64)0x01ff << j); -+ break; -+ case 0: -+ bitmap = bitmap | ((u64)0x00ff << j); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ RTW_INFO("vht_mcs_map=%02x %02x, nss=%u => bitmap=%016llx\n" -+ , mcs_map[0], mcs_map[1], nss, bitmap); -+ -+ return bitmap; -+} -+ -+#ifdef CONFIG_BEAMFORMING -+void update_sta_vht_info_apmode_bf_cap(_adapter *padapter, struct sta_info *psta) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct vht_priv *pvhtpriv_ap = &pmlmepriv->vhtpriv; -+ struct vht_priv *pvhtpriv_sta = &psta->vhtpriv; -+ u16 cur_beamform_cap = 0; -+ -+ /* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */ -+ if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFEE(pvhtpriv_sta->vht_cap)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ /*Shift to BEAMFORMING_VHT_BEAMFORMER_STS_CAP*/ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pvhtpriv_sta->vht_cap) << 8); -+ } -+ -+ /* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */ -+ if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFER(pvhtpriv_sta->vht_cap)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ /*Shit to BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM*/ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pvhtpriv_sta->vht_cap) << 12); -+ } -+ -+ if (cur_beamform_cap) -+ RTW_INFO("Current STA(%d) VHT Beamforming Setting = %02X\n", psta->cmn.aid, cur_beamform_cap); -+ -+ pvhtpriv_sta->beamform_cap = cur_beamform_cap; -+ psta->cmn.bf_info.vht_beamform_cap = cur_beamform_cap; -+} -+#endif -+ -+void update_sta_vht_info_apmode(_adapter *padapter, void *sta) -+{ -+ struct sta_info *psta = (struct sta_info *)sta; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct vht_priv *pvhtpriv_ap = &pmlmepriv->vhtpriv; -+ struct vht_priv *pvhtpriv_sta = &psta->vhtpriv; -+ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0; -+ s8 bw_mode = -1; -+ u8 *pcap_mcs; -+ -+ if (pvhtpriv_sta->vht_option == _FALSE) -+ return; -+ -+ if (pvhtpriv_sta->op_present) { -+ switch (GET_VHT_OPERATION_ELE_CHL_WIDTH(pvhtpriv_sta->vht_op)) { -+ case 1: /* 80MHz */ -+ case 2: /* 160MHz */ -+ case 3: /* 80+80 */ -+ bw_mode = CHANNEL_WIDTH_80; /* only support up to 80MHz for now */ -+ break; -+ } -+ } -+ -+ if (pvhtpriv_sta->notify_present) -+ bw_mode = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&pvhtpriv_sta->vht_op_mode_notify); -+ else if (MLME_IS_AP(padapter)) { -+ /* for VHT client without Operating Mode Notify IE; minimal 80MHz */ -+ if (bw_mode < CHANNEL_WIDTH_80) -+ bw_mode = CHANNEL_WIDTH_80; -+ } -+ -+ if (bw_mode != -1) -+ psta->cmn.bw_mode = bw_mode; /* update bw_mode only if get value from VHT IEs */ -+ -+ psta->cmn.ra_info.is_vht_enable = _TRUE; -+ -+ /* B4 Rx LDPC */ -+ if (TEST_FLAG(pvhtpriv_ap->ldpc_cap, LDPC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_LDPC(pvhtpriv_sta->vht_cap)) { -+ SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); -+ RTW_INFO("Current STA(%d) VHT LDPC = %02X\n", psta->cmn.aid, cur_ldpc_cap); -+ } -+ pvhtpriv_sta->ldpc_cap = cur_ldpc_cap; -+ -+ if (psta->cmn.bw_mode > pmlmeext->cur_bwmode) -+ psta->cmn.bw_mode = pmlmeext->cur_bwmode; -+ -+ if (psta->cmn.bw_mode == CHANNEL_WIDTH_80) { -+ /* B5 Short GI for 80 MHz */ -+ pvhtpriv_sta->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(pvhtpriv_sta->vht_cap) & pvhtpriv_ap->sgi_80m) ? _TRUE : _FALSE; -+ /* RTW_INFO("Current STA ShortGI80MHz = %d\n", pvhtpriv_sta->sgi_80m); */ -+ } else if (psta->cmn.bw_mode >= CHANNEL_WIDTH_160) { -+ /* B5 Short GI for 80 MHz */ -+ pvhtpriv_sta->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI160M(pvhtpriv_sta->vht_cap) & pvhtpriv_ap->sgi_80m) ? _TRUE : _FALSE; -+ /* RTW_INFO("Current STA ShortGI160MHz = %d\n", pvhtpriv_sta->sgi_80m); */ -+ } -+ -+ /* B8 B9 B10 Rx STBC */ -+ if (TEST_FLAG(pvhtpriv_ap->stbc_cap, STBC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_STBC(pvhtpriv_sta->vht_cap)) { -+ SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); -+ RTW_INFO("Current STA(%d) VHT STBC = %02X\n", psta->cmn.aid, cur_stbc_cap); -+ } -+ pvhtpriv_sta->stbc_cap = cur_stbc_cap; -+ -+#ifdef CONFIG_BEAMFORMING -+ update_sta_vht_info_apmode_bf_cap(padapter, psta); -+#endif -+ -+ /* B23 B24 B25 Maximum A-MPDU Length Exponent */ -+ pvhtpriv_sta->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pvhtpriv_sta->vht_cap); -+ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pvhtpriv_sta->vht_cap); -+ _rtw_memcpy(pvhtpriv_sta->vht_mcs_map, pcap_mcs, 2); -+ pvhtpriv_sta->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv_sta->vht_mcs_map); -+} -+ -+void update_hw_vht_param(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 ht_AMPDU_len; -+ -+ ht_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; -+ -+ if (pvhtpriv->ampdu_len > ht_AMPDU_len) -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len)); -+} -+ -+#ifdef ROKU_PRIVATE -+u8 VHT_get_ss_from_map(u8 *vht_mcs_map) -+{ -+ u8 i, j; -+ u8 ss = 0; -+ -+ for (i = 0; i < 2; i++) { -+ if (vht_mcs_map[i] != 0xff) { -+ for (j = 0; j < 8; j += 2) { -+ if (((vht_mcs_map[i] >> j) & 0x03) == 0x03) -+ break; -+ ss++; -+ } -+ } -+ -+ } -+ -+return ss; -+} -+ -+void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv_infra_ap *pvhtpriv = &pmlmepriv->vhtpriv_infra_ap; -+ u8 cur_stbc_cap_infra_ap = 0; -+ u16 cur_beamform_cap_infra_ap = 0; -+ u8 *pcap_mcs; -+ u8 *pcap_mcs_tx; -+ u8 Rx_ss = 0, Tx_ss = 0; -+ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (pIE == NULL) -+ return; -+ -+ pmlmeinfo->ht_vht_received |= BIT(1); -+ -+ pvhtpriv->ldpc_cap_infra_ap = GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data); -+ -+ if (GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data)) -+ SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_RX); -+ if (GET_VHT_CAPABILITY_ELE_TX_STBC(pIE->data)) -+ SET_FLAG(cur_stbc_cap_infra_ap, STBC_VHT_ENABLE_TX); -+ pvhtpriv->stbc_cap_infra_ap = cur_stbc_cap_infra_ap; -+ -+ /*store ap info for channel bandwidth*/ -+ pvhtpriv->channel_width_infra_ap = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(pIE->data); -+ -+ /*check B11: SU Beamformer Capable and B12: SU Beamformee B19: MU Beamformer B20:MU Beamformee*/ -+ if (GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) -+ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ if (GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) -+ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ if (GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data)) -+ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); -+ if (GET_VHT_CAPABILITY_ELE_MU_BFEE(pIE->data)) -+ SET_FLAG(cur_beamform_cap_infra_ap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE); -+ pvhtpriv->beamform_cap_infra_ap = cur_beamform_cap_infra_ap; -+ -+ /*store information about vht_mcs_set*/ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data); -+ pcap_mcs_tx = GET_VHT_CAPABILITY_ELE_TX_MCS(pIE->data); -+ _rtw_memcpy(pvhtpriv->vht_mcs_map_infra_ap, pcap_mcs, 2); -+ _rtw_memcpy(pvhtpriv->vht_mcs_map_tx_infra_ap, pcap_mcs_tx, 2); -+ -+ Rx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_infra_ap); -+ Tx_ss = VHT_get_ss_from_map(pvhtpriv->vht_mcs_map_tx_infra_ap); -+ if (Rx_ss >= Tx_ss) { -+ pvhtpriv->number_of_streams_infra_ap = Rx_ss; -+ } else{ -+ pvhtpriv->number_of_streams_infra_ap = Tx_ss; -+ } -+ -+} -+#endif /* ROKU_PRIVATE */ -+ -+void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, rx_nss = 0; -+ u16 cur_beamform_cap = 0; -+ u8 *pcap_mcs; -+ -+ if (pIE == NULL) -+ return; -+ -+ if (pvhtpriv->vht_option == _FALSE) -+ return; -+ -+ pmlmeinfo->VHT_enable = 1; -+ -+ /* B4 Rx LDPC */ -+ if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data)) { -+ SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX)); -+ RTW_INFO("Current VHT LDPC Setting = %02X\n", cur_ldpc_cap); -+ } -+ pvhtpriv->ldpc_cap = cur_ldpc_cap; -+ -+ /* B5 Short GI for 80 MHz */ -+ pvhtpriv->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(pIE->data) & pvhtpriv->sgi_80m) ? _TRUE : _FALSE; -+ /* RTW_INFO("Current ShortGI80MHz = %d\n", pvhtpriv->sgi_80m); */ -+ -+ /* B8 B9 B10 Rx STBC */ -+ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX) && -+ GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data)) { -+ SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX)); -+ RTW_INFO("Current VHT STBC Setting = %02X\n", cur_stbc_cap); -+ } -+ pvhtpriv->stbc_cap = cur_stbc_cap; -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+ /* -+ * B11 SU Beamformer Capable, -+ * the target supports Beamformer and we are Beamformee -+ */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) -+ && GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ -+ /* Shift to BEAMFORMING_VHT_BEAMFORMEE_STS_CAP */ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pIE->data) << 8); -+ -+ /* -+ * B19 MU Beamformer Capable, -+ * the target supports Beamformer and we are Beamformee -+ */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) -+ && GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data)) -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE); -+ } -+ -+ /* -+ * B12 SU Beamformee Capable, -+ * the target supports Beamformee and we are Beamformer -+ */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) -+ && GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ -+ /* Shit to BEAMFORMING_VHT_BEAMFORMER_SOUND_DIM */ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pIE->data) << 12); -+ -+ /* -+ * B20 MU Beamformee Capable, -+ * the target supports Beamformee and we are Beamformer -+ */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE) -+ && GET_VHT_CAPABILITY_ELE_MU_BFEE(pIE->data)) -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE); -+ } -+ -+ pvhtpriv->beamform_cap = cur_beamform_cap; -+ RTW_INFO("Current VHT Beamforming Setting=0x%04X\n", cur_beamform_cap); -+#else /* !RTW_BEAMFORMING_VERSION_2 */ -+ /* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE); -+ /*Shift to BEAMFORMING_VHT_BEAMFORMER_STS_CAP*/ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pIE->data) << 8); -+ } -+ -+ /* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) && -+ GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE); -+ /*Shit to BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM*/ -+ SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pIE->data) << 12); -+ -+ } -+ pvhtpriv->beamform_cap = cur_beamform_cap; -+ if (cur_beamform_cap) -+ RTW_INFO("Current VHT Beamforming Setting = %02X\n", cur_beamform_cap); -+#endif /* !RTW_BEAMFORMING_VERSION_2 */ -+#endif /* CONFIG_BEAMFORMING */ -+ /* B23 B24 B25 Maximum A-MPDU Length Exponent */ -+ pvhtpriv->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pIE->data); -+ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data); -+ rx_nss = GET_HAL_RX_NSS(padapter); -+ rtw_vht_nss_to_mcsmap(rx_nss, pvhtpriv->vht_mcs_map, pcap_mcs); -+ pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map); -+} -+ -+void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ -+ if (pIE == NULL) -+ return; -+ -+ if (pvhtpriv->vht_option == _FALSE) -+ return; -+} -+ -+void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, void *sta) -+{ -+ struct sta_info *psta = (struct sta_info *)sta; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct registry_priv *regsty = adapter_to_regsty(padapter); -+ u8 target_bw; -+ u8 target_rxss, current_rxss; -+ u8 update_ra = _FALSE; -+ u8 tx_nss = 0; -+ -+ if (pvhtpriv->vht_option == _FALSE) -+ return; -+ -+ target_bw = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(pframe); -+ tx_nss = GET_HAL_TX_NSS(padapter); -+ target_rxss = rtw_min(tx_nss, (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe) + 1)); -+ -+ if (target_bw != psta->cmn.bw_mode) { -+ if (hal_is_bw_support(padapter, target_bw) -+ && REGSTY_IS_BW_5G_SUPPORT(regsty, target_bw) -+ ) { -+ update_ra = _TRUE; -+ psta->cmn.bw_mode = target_bw; -+ } -+ } -+ -+ current_rxss = rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map); -+ if (target_rxss != current_rxss) { -+ u8 vht_mcs_map[2] = {}; -+ -+ update_ra = _TRUE; -+ -+ rtw_vht_nss_to_mcsmap(target_rxss, vht_mcs_map, psta->vhtpriv.vht_mcs_map); -+ _rtw_memcpy(psta->vhtpriv.vht_mcs_map, vht_mcs_map, 2); -+ -+ rtw_hal_update_sta_ra_info(padapter, psta); -+ } -+ -+ if (update_ra) -+ rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta); -+} -+ -+u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ /* struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; */ -+ u8 ChnlWidth, center_freq, bw_mode; -+ u32 len = 0; -+ u8 operation[5]; -+ -+ _rtw_memset(operation, 0, 5); -+ -+ bw_mode = REGSTY_BW_5G(pregistrypriv); /* TODO: control op bw with other info */ -+ -+ if (hal_chk_bw_cap(padapter, BW_CAP_80M | BW_CAP_160M) -+ && REGSTY_BW_5G(pregistrypriv) >= CHANNEL_WIDTH_80 -+ ) { -+ center_freq = rtw_get_center_ch(channel, bw_mode, HAL_PRIME_CHNL_OFFSET_LOWER); -+ ChnlWidth = 1; -+ } else { -+ center_freq = 0; -+ ChnlWidth = 0; -+ } -+ -+ -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(operation, ChnlWidth); -+ /* center frequency */ -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(operation, center_freq);/* Todo: need to set correct center channel */ -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(operation, 0); -+ -+ _rtw_memcpy(operation + 3, pvhtpriv->vht_mcs_map, 2); -+ -+ rtw_set_ie(pbuf, EID_VHTOperation, 5, operation, &len); -+ -+ return len; -+} -+ -+u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw) -+{ -+ /* struct registry_priv *pregistrypriv = &padapter->registrypriv; */ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ u32 len = 0; -+ u8 opmode = 0; -+ u8 chnl_width, rx_nss; -+ -+ chnl_width = bw; -+ rx_nss = rtw_vht_mcsmap_to_nss(pvhtpriv->vht_mcs_map); -+ -+ SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&opmode, chnl_width); -+ SET_VHT_OPERATING_MODE_FIELD_RX_NSS(&opmode, (rx_nss - 1)); -+ SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(&opmode, 0); /* Todo */ -+ -+ pvhtpriv->vht_op_mode_notify = opmode; -+ -+ pbuf = rtw_set_ie(pbuf, EID_OpModeNotification, 1, &opmode, &len); -+ -+ return len; -+} -+ -+u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf) -+{ -+ u8 bw, rf_num, rx_stbc_nss = 0; -+ u16 HighestRate; -+ u8 *pcap, *pcap_mcs; -+ u32 len = 0; -+ u32 rx_packet_offset, max_recvbuf_sz; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ pcap = pvhtpriv->vht_cap; -+ _rtw_memset(pcap, 0, 32); -+ -+ /* B0 B1 Maximum MPDU Length */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); -+ rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); -+ -+ RTW_DBG("%s, line%d, Available RX buf size = %d bytes\n", __FUNCTION__, __LINE__, max_recvbuf_sz - rx_packet_offset); -+ -+ if ((max_recvbuf_sz - rx_packet_offset) >= 11454) { -+ SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 2); -+ RTW_INFO("%s, line%d, Set MAX MPDU len = 11454 bytes\n", __FUNCTION__, __LINE__); -+ } else if ((max_recvbuf_sz - rx_packet_offset) >= 7991) { -+ SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 1); -+ RTW_INFO("%s, line%d, Set MAX MPDU len = 7991 bytes\n", __FUNCTION__, __LINE__); -+ } else if ((max_recvbuf_sz - rx_packet_offset) >= 3895) { -+ SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 0); -+ RTW_INFO("%s, line%d, Set MAX MPDU len = 3895 bytes\n", __FUNCTION__, __LINE__); -+ } else -+ RTW_ERR("%s, line%d, Error!! Available RX buf size < 3895 bytes\n", __FUNCTION__, __LINE__); -+ -+ /* B2 B3 Supported Channel Width Set */ -+ if (hal_chk_bw_cap(padapter, BW_CAP_160M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_160)) { -+ if (hal_chk_bw_cap(padapter, BW_CAP_80_80M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_80_80)) -+ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 2); -+ else -+ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 1); -+ } else -+ SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 0); -+ -+ /* B4 Rx LDPC */ -+ if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX)) { -+ SET_VHT_CAPABILITY_ELE_RX_LDPC(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting RX LDPC\n"); -+ } -+ -+ /* B5 ShortGI for 80MHz */ -+ SET_VHT_CAPABILITY_ELE_SHORT_GI80M(pcap, pvhtpriv->sgi_80m ? 1 : 0); /* We can receive Short GI of 80M */ -+ if (pvhtpriv->sgi_80m) -+ RTW_INFO("[VHT] Declare supporting SGI 80MHz\n"); -+ -+ /* B6 ShortGI for 160MHz */ -+ /* SET_VHT_CAPABILITY_ELE_SHORT_GI160M(pcap, pvhtpriv->sgi_80m? 1 : 0); */ -+ -+ /* B7 Tx STBC */ -+ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX)) { -+ SET_VHT_CAPABILITY_ELE_TX_STBC(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting TX STBC\n"); -+ } -+ -+ /* B8 B9 B10 Rx STBC */ -+ if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX)) { -+ rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)(&rx_stbc_nss)); -+ -+ SET_VHT_CAPABILITY_ELE_RX_STBC(pcap, rx_stbc_nss); -+ RTW_INFO("[VHT] Declare supporting RX STBC = %d\n", rx_stbc_nss); -+ } -+ #ifdef CONFIG_BEAMFORMING -+ /* B11 SU Beamformer Capable */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { -+ SET_VHT_CAPABILITY_ELE_SU_BFER(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting SU Bfer\n"); -+ /* B16 17 18 Number of Sounding Dimensions */ -+ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num); -+ SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(pcap, rf_num); -+ /* B19 MU Beamformer Capable */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { -+ SET_VHT_CAPABILITY_ELE_MU_BFER(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting MU Bfer\n"); -+ } -+ } -+ -+ /* B12 SU Beamformee Capable */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) { -+ SET_VHT_CAPABILITY_ELE_SU_BFEE(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting SU Bfee\n"); -+ -+ rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num); -+ -+ /* IOT action suggested by Yu Chen 2017/3/3 */ -+#ifdef CONFIG_80211AC_VHT -+ if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) && -+ !pvhtpriv->ap_bf_cap.is_mu_bfer && -+ pvhtpriv->ap_bf_cap.su_sound_dim == 2) -+ rf_num = (rf_num >= 2 ? 2 : rf_num); -+#endif -+ /* B13 14 15 Compressed Steering Number of Beamformer Antennas Supported */ -+ SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(pcap, rf_num); -+ /* B20 SU Beamformee Capable */ -+ if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE)) { -+ SET_VHT_CAPABILITY_ELE_MU_BFEE(pcap, 1); -+ RTW_INFO("[VHT] Declare supporting MU Bfee\n"); -+ } -+ } -+ #endif/*CONFIG_BEAMFORMING*/ -+ -+ /* B21 VHT TXOP PS */ -+ SET_VHT_CAPABILITY_ELE_TXOP_PS(pcap, 0); -+ /* B22 +HTC-VHT Capable */ -+ SET_VHT_CAPABILITY_ELE_HTC_VHT(pcap, 1); -+ /* B23 24 25 Maximum A-MPDU Length Exponent */ -+ if (pregistrypriv->ampdu_factor != 0xFE) -+ SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pcap, pregistrypriv->ampdu_factor); -+ else -+ SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pcap, 7); -+ /* B26 27 VHT Link Adaptation Capable */ -+ SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(pcap, 0); -+ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pcap); -+ _rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2); -+ -+ pcap_mcs = GET_VHT_CAPABILITY_ELE_TX_MCS(pcap); -+ _rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2); -+ -+ /* find the largest bw supported by both registry and hal */ -+ bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv)); -+ -+ HighestRate = VHT_MCS_DATA_RATE[bw][pvhtpriv->sgi_80m][((pvhtpriv->vht_highest_rate - MGN_VHT1SS_MCS0) & 0x3f)]; -+ HighestRate = (HighestRate + 1) >> 1; -+ -+ SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(pcap, HighestRate); /* indicate we support highest rx rate is 600Mbps. */ -+ SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(pcap, HighestRate); /* indicate we support highest tx rate is 600Mbps. */ -+ -+ pbuf = rtw_set_ie(pbuf, EID_VHTCapability, 12, pcap, &len); -+ -+ return len; -+} -+ -+u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ u32 ielen; -+ u8 max_bw; -+ u8 oper_ch, oper_bw = CHANNEL_WIDTH_20, oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ u8 *out_vht_op_ie, *ht_op_ie, *vht_cap_ie, *vht_op_ie; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ -+ rtw_vht_use_default_setting(padapter); -+ -+ ht_op_ie = rtw_get_ie(in_ie + 12, WLAN_EID_HT_OPERATION, &ielen, in_len - 12); -+ if (!ht_op_ie || ielen != HT_OP_IE_LEN) -+ goto exit; -+ vht_cap_ie = rtw_get_ie(in_ie + 12, EID_VHTCapability, &ielen, in_len - 12); -+ if (!vht_cap_ie || ielen != VHT_CAP_IE_LEN) -+ goto exit; -+ vht_op_ie = rtw_get_ie(in_ie + 12, EID_VHTOperation, &ielen, in_len - 12); -+ if (!vht_op_ie || ielen != VHT_OP_IE_LEN) -+ goto exit; -+ -+ /* VHT Capabilities element */ -+ *pout_len += rtw_build_vht_cap_ie(padapter, out_ie + *pout_len); -+ -+ -+ /* VHT Operation element */ -+ out_vht_op_ie = out_ie + *pout_len; -+ rtw_set_ie(out_vht_op_ie, EID_VHTOperation, VHT_OP_IE_LEN, vht_op_ie + 2 , pout_len); -+ -+ /* get primary channel from HT_OP_IE */ -+ oper_ch = GET_HT_OP_ELE_PRI_CHL(ht_op_ie + 2); -+ -+ /* find the largest bw supported by both registry and hal */ -+ max_bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv)); -+ -+ if (max_bw >= CHANNEL_WIDTH_40) { -+ /* get bw offset form HT_OP_IE */ -+ if (GET_HT_OP_ELE_STA_CHL_WIDTH(ht_op_ie + 2)) { -+ switch (GET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op_ie + 2)) { -+ case SCA: -+ oper_bw = CHANNEL_WIDTH_40; -+ oper_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ case SCB: -+ oper_bw = CHANNEL_WIDTH_40; -+ oper_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ } -+ } -+ -+ if (oper_bw == CHANNEL_WIDTH_40) { -+ switch (GET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2)) { -+ case 1: /* 80MHz */ -+ case 2: /* 160MHz */ -+ case 3: /* 80+80 */ -+ oper_bw = CHANNEL_WIDTH_80; /* only support up to 80MHz for now */ -+ break; -+ } -+ -+ oper_bw = rtw_min(oper_bw, max_bw); -+ -+ /* try downgrage bw to fit in channel plan setting */ -+ while (!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset, 1, 1) -+ || (IS_DFS_SLAVE_WITH_RD(rfctl) -+ && !rtw_rfctl_dfs_domain_unknown(rfctl) -+ && rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset)) -+ ) { -+ oper_bw--; -+ if (oper_bw == CHANNEL_WIDTH_20) { -+ oper_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+ } -+ } -+ } -+ -+ rtw_warn_on(!rtw_chset_is_chbw_valid(chset, oper_ch, oper_bw, oper_offset, 1, 1)); -+ if (IS_DFS_SLAVE_WITH_RD(rfctl) && !rtw_rfctl_dfs_domain_unknown(rfctl)) -+ rtw_warn_on(rtw_chset_is_chbw_non_ocp(chset, oper_ch, oper_bw, oper_offset)); -+ -+ /* update VHT_OP_IE */ -+ if (oper_bw < CHANNEL_WIDTH_80) { -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(out_vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(out_vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(out_vht_op_ie + 2, 0); -+ } else if (oper_bw == CHANNEL_WIDTH_80) { -+ u8 cch = rtw_get_center_ch(oper_ch, oper_bw, oper_offset); -+ -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(out_vht_op_ie + 2, 1); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(out_vht_op_ie + 2, cch); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(out_vht_op_ie + 2, 0); -+ } else { -+ RTW_ERR(FUNC_ADPT_FMT" unsupported BW:%u\n", FUNC_ADPT_ARG(padapter), oper_bw); -+ rtw_warn_on(1); -+ } -+ -+ /* Operating Mode Notification element */ -+ *pout_len += rtw_build_vht_op_mode_notify_ie(padapter, out_ie + *pout_len, oper_bw); -+ -+ pvhtpriv->vht_option = _TRUE; -+ -+exit: -+ return pvhtpriv->vht_option; -+ -+} -+ -+void VHTOnAssocRsp(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 ht_AMPDU_len; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ if (!pmlmeinfo->HT_enable) -+ return; -+ -+ if (!pmlmeinfo->VHT_enable) -+ return; -+ -+ ht_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; -+ -+ if (pvhtpriv->ampdu_len > ht_AMPDU_len) -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len)); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MAX_TIME, (u8 *)(&pvhtpriv->vht_highest_rate)); -+} -+ -+#ifdef CONFIG_AP_MODE -+void rtw_vht_ies_attach(_adapter *padapter, WLAN_BSSID_EX *pnetwork) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 cap_len, operation_len; -+ uint len = 0; -+ sint ie_len = 0; -+ u8 *p = NULL; -+ -+ p = rtw_get_ie(pnetwork->IEs + _BEACON_IE_OFFSET_, EID_VHTCapability, &ie_len, -+ (pnetwork->IELength - _BEACON_IE_OFFSET_)); -+ if (p && ie_len > 0) -+ return; -+ -+ rtw_vht_use_default_setting(padapter); -+ -+ /* VHT Operation mode notifiy bit in Extended IE (127) */ -+ SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(pmlmepriv->ext_capab_ie_data, 1); -+ pmlmepriv->ext_capab_ie_len = 10; -+ rtw_set_ie(pnetwork->IEs + pnetwork->IELength, EID_EXTCapability, 8, pmlmepriv->ext_capab_ie_data, &len); -+ pnetwork->IELength += pmlmepriv->ext_capab_ie_len; -+ -+ /* VHT Capabilities element */ -+ cap_len = rtw_build_vht_cap_ie(padapter, pnetwork->IEs + pnetwork->IELength); -+ pnetwork->IELength += cap_len; -+ -+ /* VHT Operation element */ -+ operation_len = rtw_build_vht_operation_ie(padapter, pnetwork->IEs + pnetwork->IELength, -+ pnetwork->Configuration.DSConfig); -+ pnetwork->IELength += operation_len; -+ -+ rtw_check_for_vht20(padapter, pnetwork->IEs + _BEACON_IE_OFFSET_, pnetwork->IELength - _BEACON_IE_OFFSET_); -+ -+ pmlmepriv->vhtpriv.vht_option = _TRUE; -+} -+ -+void rtw_vht_ies_detach(_adapter *padapter, WLAN_BSSID_EX *pnetwork) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ rtw_remove_bcn_ie(padapter, pnetwork, EID_EXTCapability); -+ rtw_remove_bcn_ie(padapter, pnetwork, EID_VHTCapability); -+ rtw_remove_bcn_ie(padapter, pnetwork, EID_VHTOperation); -+ -+ pmlmepriv->vhtpriv.vht_option = _FALSE; -+} -+ -+void rtw_check_for_vht20(_adapter *adapter, u8 *ies, int ies_len) -+{ -+ u8 ht_ch, ht_bw, ht_offset; -+ u8 vht_ch, vht_bw, vht_offset; -+ -+ rtw_ies_get_chbw(ies, ies_len, &ht_ch, &ht_bw, &ht_offset, 1, 0); -+ rtw_ies_get_chbw(ies, ies_len, &vht_ch, &vht_bw, &vht_offset, 1, 1); -+ -+ if (ht_bw == CHANNEL_WIDTH_20 && vht_bw >= CHANNEL_WIDTH_80) { -+ u8 *vht_op_ie; -+ int vht_op_ielen; -+ -+ RTW_INFO(FUNC_ADPT_FMT" vht80 is not allowed without ht40\n", FUNC_ADPT_ARG(adapter)); -+ vht_op_ie = rtw_get_ie(ies, EID_VHTOperation, &vht_op_ielen, ies_len); -+ if (vht_op_ie && vht_op_ielen) { -+ RTW_INFO(FUNC_ADPT_FMT" switch to vht20\n", FUNC_ADPT_ARG(adapter)); -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op_ie + 2, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op_ie + 2, 0); -+ } -+ } -+} -+#endif /* CONFIG_AP_MODE */ -+#endif /* CONFIG_80211AC_VHT */ -diff --git a/drivers/staging/rtl8723cs/core/rtw_wapi.c b/drivers/staging/rtl8723cs/core/rtw_wapi.c -new file mode 100644 -index 000000000000..94b26e72513f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_wapi.c -@@ -0,0 +1,1320 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifdef CONFIG_WAPI_SUPPORT -+ -+#include -+#include -+#include -+#include -+ -+ -+u32 wapi_debug_component = -+ /* WAPI_INIT | -+ * WAPI_API | -+ * WAPI_TX | -+ * WAPI_RX | */ -+ WAPI_ERR ; /* always open err flags on */ -+ -+void WapiFreeAllStaInfo(_adapter *padapter) -+{ -+ PRT_WAPI_T pWapiInfo; -+ PRT_WAPI_STA_INFO pWapiStaInfo; -+ PRT_WAPI_BKID pWapiBkid; -+ -+ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); -+ pWapiInfo = &padapter->wapiInfo; -+ -+ /* Pust to Idle List */ -+ rtw_wapi_return_all_sta_info(padapter); -+ -+ /* Sta Info List */ -+ while (!list_empty(&(pWapiInfo->wapiSTAIdleList))) { -+ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list); -+ list_del_init(&pWapiStaInfo->list); -+ } -+ -+ /* BKID List */ -+ while (!list_empty(&(pWapiInfo->wapiBKIDIdleList))) { -+ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list); -+ list_del_init(&pWapiBkid->list); -+ } -+ WAPI_TRACE(WAPI_INIT, "<=========== %s\n", __FUNCTION__); -+ return; -+} -+ -+void WapiSetIE(_adapter *padapter) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ /* PRT_WAPI_BKID pWapiBkid; */ -+ u16 protocolVer = 1; -+ u16 akmCnt = 1; -+ u16 suiteCnt = 1; -+ u16 capability = 0; -+ u8 OUI[3]; -+ -+ OUI[0] = 0x00; -+ OUI[1] = 0x14; -+ OUI[2] = 0x72; -+ -+ pWapiInfo->wapiIELength = 0; -+ /* protocol version */ -+ memcpy(pWapiInfo->wapiIE + pWapiInfo->wapiIELength, &protocolVer, 2); -+ pWapiInfo->wapiIELength += 2; -+ /* akm */ -+ memcpy(pWapiInfo->wapiIE + pWapiInfo->wapiIELength, &akmCnt, 2); -+ pWapiInfo->wapiIELength += 2; -+ -+ if (pWapiInfo->bWapiPSK) { -+ memcpy(pWapiInfo->wapiIE + pWapiInfo->wapiIELength, OUI, 3); -+ pWapiInfo->wapiIELength += 3; -+ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x2; -+ pWapiInfo->wapiIELength += 1; -+ } else { -+ memcpy(pWapiInfo->wapiIE + pWapiInfo->wapiIELength, OUI, 3); -+ pWapiInfo->wapiIELength += 3; -+ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; -+ pWapiInfo->wapiIELength += 1; -+ } -+ -+ /* usk */ -+ memcpy(pWapiInfo->wapiIE + pWapiInfo->wapiIELength, &suiteCnt, 2); -+ pWapiInfo->wapiIELength += 2; -+ memcpy(pWapiInfo->wapiIE + pWapiInfo->wapiIELength, OUI, 3); -+ pWapiInfo->wapiIELength += 3; -+ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; -+ pWapiInfo->wapiIELength += 1; -+ -+ /* msk */ -+ memcpy(pWapiInfo->wapiIE + pWapiInfo->wapiIELength, OUI, 3); -+ pWapiInfo->wapiIELength += 3; -+ pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1; -+ pWapiInfo->wapiIELength += 1; -+ -+ /* Capbility */ -+ memcpy(pWapiInfo->wapiIE + pWapiInfo->wapiIELength, &capability, 2); -+ pWapiInfo->wapiIELength += 2; -+} -+ -+ -+/* PN1 > PN2, return 1, -+ * else return 0. -+ */ -+u32 WapiComparePN(u8 *PN1, u8 *PN2) -+{ -+ char i; -+ -+ if ((NULL == PN1) || (NULL == PN2)) -+ return 1; -+ -+ /* overflow case */ -+ if ((PN2[15] - PN1[15]) & 0x80) -+ return 1; -+ -+ for (i = 16; i > 0; i--) { -+ if (PN1[i - 1] == PN2[i - 1]) -+ continue; -+ else if (PN1[i - 1] > PN2[i - 1]) -+ return 1; -+ else -+ return 0; -+ } -+ -+ return 0; -+} -+ -+u8 -+WapiGetEntryForCamWrite(_adapter *padapter, u8 *pMacAddr, u8 KID, BOOLEAN IsMsk) -+{ -+ PRT_WAPI_T pWapiInfo = NULL; -+ /* PRT_WAPI_CAM_ENTRY pEntry=NULL; */ -+ u8 i = 0; -+ u8 ret = 0xff; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ pWapiInfo = &padapter->wapiInfo; -+ -+ /* exist? */ -+ for (i = 0; i < WAPI_CAM_ENTRY_NUM; i++) { -+ if (pWapiInfo->wapiCamEntry[i].IsUsed -+ && (_rtw_memcmp(pMacAddr, pWapiInfo->wapiCamEntry[i].PeerMacAddr, ETH_ALEN) == _TRUE) -+ && pWapiInfo->wapiCamEntry[i].keyidx == KID -+ && pWapiInfo->wapiCamEntry[i].type == IsMsk) { -+ ret = pWapiInfo->wapiCamEntry[i].entry_idx; /* cover it */ -+ break; -+ } -+ } -+ -+ if (i == WAPI_CAM_ENTRY_NUM) { /* not found */ -+ for (i = 0; i < WAPI_CAM_ENTRY_NUM; i++) { -+ if (pWapiInfo->wapiCamEntry[i].IsUsed == 0) { -+ pWapiInfo->wapiCamEntry[i].IsUsed = 1; -+ pWapiInfo->wapiCamEntry[i].type = IsMsk; -+ pWapiInfo->wapiCamEntry[i].keyidx = KID; -+ _rtw_memcpy(pWapiInfo->wapiCamEntry[i].PeerMacAddr, pMacAddr, ETH_ALEN); -+ ret = pWapiInfo->wapiCamEntry[i].entry_idx; -+ break; -+ } -+ } -+ } -+ -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+ return ret; -+ -+ /* -+ if(RTIsListEmpty(&pWapiInfo->wapiCamIdleList)) { -+ return 0; -+ } -+ -+ pEntry = (PRT_WAPI_CAM_ENTRY)RTRemoveHeadList(&pWapiInfo->wapiCamIdleList); -+ RTInsertTailList(&pWapiInfo->wapiCamUsedList, &pEntry->list); -+ -+ -+ return pEntry->entry_idx;*/ -+} -+ -+u8 WapiGetEntryForCamClear(_adapter *padapter, u8 *pPeerMac, u8 keyid, u8 IsMsk) -+{ -+ PRT_WAPI_T pWapiInfo = NULL; -+ u8 i = 0; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ pWapiInfo = &padapter->wapiInfo; -+ -+ for (i = 0; i < WAPI_CAM_ENTRY_NUM; i++) { -+ if (pWapiInfo->wapiCamEntry[i].IsUsed -+ && (_rtw_memcmp(pPeerMac, pWapiInfo->wapiCamEntry[i].PeerMacAddr, ETH_ALEN) == _TRUE) -+ && pWapiInfo->wapiCamEntry[i].keyidx == keyid -+ && pWapiInfo->wapiCamEntry[i].type == IsMsk) { -+ pWapiInfo->wapiCamEntry[i].IsUsed = 0; -+ pWapiInfo->wapiCamEntry[i].keyidx = 2; -+ _rtw_memset(pWapiInfo->wapiCamEntry[i].PeerMacAddr, 0, ETH_ALEN); -+ -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+ return pWapiInfo->wapiCamEntry[i].entry_idx; -+ } -+ } -+ -+ WAPI_TRACE(WAPI_API, "<====WapiGetReturnCamEntry(), No this cam entry.\n"); -+ return 0xff; -+ /* -+ if(RTIsListEmpty(&pWapiInfo->wapiCamUsedList)) { -+ return FALSE; -+ } -+ -+ pList = &pWapiInfo->wapiCamUsedList; -+ while(pList->Flink != &pWapiInfo->wapiCamUsedList) -+ { -+ pEntry = (PRT_WAPI_CAM_ENTRY)pList->Flink; -+ if(PlatformCompareMemory(pPeerMac,pEntry->PeerMacAddr, ETHER_ADDRLEN)== 0 -+ && keyid == pEntry->keyidx) -+ { -+ RTRemoveEntryList(pList); -+ RTInsertHeadList(&pWapiInfo->wapiCamIdleList, pList); -+ return pEntry->entry_idx; -+ } -+ pList = pList->Flink; -+ } -+ -+ return 0; -+ */ -+} -+ -+void -+WapiResetAllCamEntry(_adapter *padapter) -+{ -+ PRT_WAPI_T pWapiInfo; -+ int i; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ pWapiInfo = &padapter->wapiInfo; -+ -+ for (i = 0; i < WAPI_CAM_ENTRY_NUM; i++) { -+ _rtw_memset(pWapiInfo->wapiCamEntry[i].PeerMacAddr, 0, ETH_ALEN); -+ pWapiInfo->wapiCamEntry[i].IsUsed = 0; -+ pWapiInfo->wapiCamEntry[i].keyidx = 2; /* invalid */ -+ pWapiInfo->wapiCamEntry[i].entry_idx = 4 + i * 2; -+ } -+ -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+ -+ return; -+} -+ -+u8 WapiWriteOneCamEntry( -+ _adapter *padapter, -+ u8 *pMacAddr, -+ u8 KeyId, -+ u8 EntryId, -+ u8 EncAlg, -+ u8 bGroupKey, -+ u8 *pKey -+) -+{ -+ u8 retVal = 0; -+ u16 usConfig = 0; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ if (EntryId >= 32) { -+ WAPI_TRACE(WAPI_ERR, "<=== CamAddOneEntry(): ulKeyId exceed!\n"); -+ return retVal; -+ } -+ -+ usConfig = usConfig | (0x01 << 15) | ((u16)(EncAlg) << 2) | (KeyId); -+ -+ if (EncAlg == _SMS4_) { -+ if (bGroupKey == 1) -+ usConfig |= (0x01 << 6); -+ if ((EntryId % 2) == 1) /* ==0 sec key; == 1mic key */ -+ usConfig |= (0x01 << 5); -+ } -+ -+ write_cam(padapter, EntryId, usConfig, pMacAddr, pKey); -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ return 1; -+} -+ -+void rtw_wapi_init(_adapter *padapter) -+{ -+ PRT_WAPI_T pWapiInfo; -+ int i; -+ -+ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); -+ RT_ASSERT_RET(padapter); -+ -+ if (!padapter->WapiSupport) { -+ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ pWapiInfo = &padapter->wapiInfo; -+ pWapiInfo->bWapiEnable = false; -+ -+ /* Init BKID List */ -+ INIT_LIST_HEAD(&pWapiInfo->wapiBKIDIdleList); -+ INIT_LIST_HEAD(&pWapiInfo->wapiBKIDStoreList); -+ for (i = 0; i < WAPI_MAX_BKID_NUM; i++) -+ list_add_tail(&pWapiInfo->wapiBKID[i].list, &pWapiInfo->wapiBKIDIdleList); -+ -+ /* Init STA List */ -+ INIT_LIST_HEAD(&pWapiInfo->wapiSTAIdleList); -+ INIT_LIST_HEAD(&pWapiInfo->wapiSTAUsedList); -+ for (i = 0; i < WAPI_MAX_STAINFO_NUM; i++) -+ list_add_tail(&pWapiInfo->wapiSta[i].list, &pWapiInfo->wapiSTAIdleList); -+ -+ for (i = 0; i < WAPI_CAM_ENTRY_NUM; i++) { -+ pWapiInfo->wapiCamEntry[i].IsUsed = 0; -+ pWapiInfo->wapiCamEntry[i].keyidx = 2; /* invalid */ -+ pWapiInfo->wapiCamEntry[i].entry_idx = 4 + i * 2; -+ } -+ -+ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_free(_adapter *padapter) -+{ -+ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); -+ RT_ASSERT_RET(padapter); -+ -+ if (!padapter->WapiSupport) { -+ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ WapiFreeAllStaInfo(padapter); -+ -+ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_disable_tx(_adapter *padapter) -+{ -+ WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__); -+ RT_ASSERT_RET(padapter); -+ -+ if (!padapter->WapiSupport) { -+ WAPI_TRACE(WAPI_INIT, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ padapter->wapiInfo.wapiTxMsk.bTxEnable = false; -+ padapter->wapiInfo.wapiTxMsk.bSet = false; -+ -+ WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__); -+} -+ -+u8 rtw_wapi_is_wai_packet(_adapter *padapter, u8 *pkt_data) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ u8 WaiPkt = 0, *pTaddr, bFind = false; -+ u8 Offset_TypeWAI = 0 ; /* (mac header len + llc length) */ -+ -+ WAPI_TRACE(WAPI_TX | WAPI_RX, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return 0; -+ } -+ -+ Offset_TypeWAI = 24 + 6 ; -+ -+ /* YJ,add,091103. Data frame may also have skb->data[30]=0x88 and skb->data[31]=0xb4. */ -+ if ((pkt_data[1] & 0x40) != 0) { -+ /* RTW_INFO("data is privacy\n"); */ -+ return 0; -+ } -+ -+ pTaddr = get_addr2_ptr(pkt_data); -+ if (list_empty(&pWapiInfo->wapiSTAUsedList)) -+ bFind = false; -+ else { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (_rtw_memcmp(pTaddr, pWapiSta->PeerMacAddr, 6) == _TRUE) { -+ bFind = true; -+ break; -+ } -+ } -+ } -+ -+ WAPI_TRACE(WAPI_TX | WAPI_RX, "%s: bFind=%d pTaddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(pTaddr)); -+ -+ if (pkt_data[0] == WIFI_QOS_DATA_TYPE) -+ Offset_TypeWAI += 2; -+ -+ /* 88b4? */ -+ if ((pkt_data[Offset_TypeWAI] == 0x88) && (pkt_data[Offset_TypeWAI + 1] == 0xb4)) { -+ WaiPkt = pkt_data[Offset_TypeWAI + 5]; -+ -+ psecuritypriv->hw_decrypted = _TRUE; -+ } else -+ WAPI_TRACE(WAPI_TX | WAPI_RX, "%s(): non wai packet\n", __FUNCTION__); -+ -+ WAPI_TRACE(WAPI_TX | WAPI_RX, "%s(): Recvd WAI frame. IsWAIPkt(%d)\n", __FUNCTION__, WaiPkt); -+ -+ return WaiPkt; -+} -+ -+ -+void rtw_wapi_update_info(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ struct recv_frame_hdr *precv_hdr; -+ u8 *ptr; -+ u8 *pTA; -+ u8 *pRecvPN; -+ -+ -+ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) { -+ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ precv_hdr = &precv_frame->u.hdr; -+ ptr = precv_hdr->rx_data; -+ -+ if (precv_hdr->attrib.qos == 1) -+ precv_hdr->UserPriority = GetTid(ptr); -+ else -+ precv_hdr->UserPriority = 0; -+ -+ pTA = get_addr2_ptr(ptr); -+ _rtw_memcpy((u8 *)precv_hdr->WapiSrcAddr, pTA, 6); -+ pRecvPN = ptr + precv_hdr->attrib.hdrlen + 2; -+ _rtw_memcpy((u8 *)precv_hdr->WapiTempPN, pRecvPN, 16); -+ -+ WAPI_TRACE(WAPI_RX, "<========== %s\n", __FUNCTION__); -+} -+ -+/**************************************************************************** -+TRUE-----------------Drop -+FALSE---------------- handle -+add to support WAPI to N-mode -+*****************************************************************************/ -+u8 rtw_wapi_check_for_drop( -+ _adapter *padapter, -+ union recv_frame *precv_frame, -+ u8 *ehdr_ops -+) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ u8 *pLastRecvPN = NULL; -+ u8 bFind = false; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ u8 bDrop = false; -+ struct recv_frame_hdr *precv_hdr = &precv_frame->u.hdr; -+ u8 WapiAEPNInitialValueSrc[16] = {0x37, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C} ; -+ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C} ; -+ u8 *ptr = ehdr_ops; -+ int i; -+ -+ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) { -+ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return false; -+ } -+ -+ if (precv_hdr->bIsWaiPacket != 0) { -+ if (precv_hdr->bIsWaiPacket == 0x8) { -+ -+ RTW_INFO("rtw_wapi_check_for_drop: dump packet\n"); -+ for (i = 0; i < 50; i++) { -+ RTW_INFO("%02X ", ptr[i]); -+ if ((i + 1) % 8 == 0) -+ RTW_INFO("\n"); -+ } -+ RTW_INFO("\n rtw_wapi_check_for_drop: dump packet\n"); -+ -+ for (i = 0; i < 16; i++) { -+ if (ptr[i + 27] != 0) -+ break; -+ } -+ -+ if (i == 16) { -+ WAPI_TRACE(WAPI_RX, "rtw_wapi_check_for_drop: drop with zero BKID\n"); -+ return true; -+ } else -+ return false; -+ } else -+ return false; -+ } -+ -+ if (list_empty(&pWapiInfo->wapiSTAUsedList)) -+ bFind = false; -+ else { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (_rtw_memcmp(precv_hdr->WapiSrcAddr, pWapiSta->PeerMacAddr, ETH_ALEN) == _TRUE) { -+ bFind = true; -+ break; -+ } -+ } -+ } -+ WAPI_TRACE(WAPI_RX, "%s: bFind=%d prxb->WapiSrcAddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(precv_hdr->WapiSrcAddr)); -+ -+ if (bFind) { -+ if (IS_MCAST(precv_hdr->attrib.ra)) { -+ WAPI_TRACE(WAPI_RX, "rtw_wapi_check_for_drop: multicast case\n"); -+ pLastRecvPN = pWapiSta->lastRxMulticastPN; -+ } else { -+ WAPI_TRACE(WAPI_RX, "rtw_wapi_check_for_drop: unicast case\n"); -+ switch (precv_hdr->UserPriority) { -+ case 0: -+ case 3: -+ pLastRecvPN = pWapiSta->lastRxUnicastPNBEQueue; -+ break; -+ case 1: -+ case 2: -+ pLastRecvPN = pWapiSta->lastRxUnicastPNBKQueue; -+ break; -+ case 4: -+ case 5: -+ pLastRecvPN = pWapiSta->lastRxUnicastPNVIQueue; -+ break; -+ case 6: -+ case 7: -+ pLastRecvPN = pWapiSta->lastRxUnicastPNVOQueue; -+ break; -+ default: -+ WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __FUNCTION__); -+ break; -+ } -+ } -+ -+ if (!WapiComparePN(precv_hdr->WapiTempPN, pLastRecvPN)) { -+ WAPI_TRACE(WAPI_RX, "%s: Equal PN!!\n", __FUNCTION__); -+ if (IS_MCAST(precv_hdr->attrib.ra)) -+ _rtw_memcpy(pLastRecvPN, WapiAEMultiCastPNInitialValueSrc, 16); -+ else -+ _rtw_memcpy(pLastRecvPN, WapiAEPNInitialValueSrc, 16); -+ bDrop = true; -+ } else -+ _rtw_memcpy(pLastRecvPN, precv_hdr->WapiTempPN, 16); -+ } -+ -+ WAPI_TRACE(WAPI_RX, "<========== %s\n", __FUNCTION__); -+ return bDrop; -+} -+ -+void rtw_build_probe_resp_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ u8 WapiIELength = 0; -+ -+ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ WapiSetIE(padapter); -+ WapiIELength = pWapiInfo->wapiIELength; -+ pframe[0] = _WAPI_IE_; -+ pframe[1] = WapiIELength; -+ _rtw_memcpy(pframe + 2, pWapiInfo->wapiIE, WapiIELength); -+ pframe += WapiIELength + 2; -+ pattrib->pktlen += WapiIELength + 2; -+ -+ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_build_beacon_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ u8 WapiIELength = 0; -+ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ WapiSetIE(padapter); -+ WapiIELength = pWapiInfo->wapiIELength; -+ pframe[0] = _WAPI_IE_; -+ pframe[1] = WapiIELength; -+ _rtw_memcpy(pframe + 2, pWapiInfo->wapiIE, WapiIELength); -+ pframe += WapiIELength + 2; -+ pattrib->pktlen += WapiIELength + 2; -+ -+ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_build_assoc_req_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib) -+{ -+ PRT_WAPI_BKID pWapiBKID; -+ u16 bkidNum; -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ u8 WapiIELength = 0; -+ -+ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported!\n", __FUNCTION__); -+ return; -+ } -+ -+ WapiSetIE(padapter); -+ WapiIELength = pWapiInfo->wapiIELength; -+ bkidNum = 0; -+ if (!list_empty(&(pWapiInfo->wapiBKIDStoreList))) { -+ list_for_each_entry(pWapiBKID, &pWapiInfo->wapiBKIDStoreList, list) { -+ bkidNum++; -+ _rtw_memcpy(pWapiInfo->wapiIE + WapiIELength + 2, pWapiBKID->bkid, 16); -+ WapiIELength += 16; -+ } -+ } -+ _rtw_memcpy(pWapiInfo->wapiIE + WapiIELength, &bkidNum, 2); -+ WapiIELength += 2; -+ -+ pframe[0] = _WAPI_IE_; -+ pframe[1] = WapiIELength; -+ _rtw_memcpy(pframe + 2, pWapiInfo->wapiIE, WapiIELength); -+ pframe += WapiIELength + 2; -+ pattrib->pktlen += WapiIELength + 2; -+ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_on_assoc_ok(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ PRT_WAPI_T pWapiInfo = &(padapter->wapiInfo); -+ PRT_WAPI_STA_INFO pWapiSta; -+ u8 WapiAEPNInitialValueSrc[16] = {0x37, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C} ; -+ /* u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ; */ -+ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C} ; -+ -+ WAPI_TRACE(WAPI_MLME, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ pWapiSta = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list); -+ list_del_init(&pWapiSta->list); -+ list_add_tail(&pWapiSta->list, &pWapiInfo->wapiSTAUsedList); -+ _rtw_memcpy(pWapiSta->PeerMacAddr, padapter->mlmeextpriv.mlmext_info.network.MacAddress, 6); -+ _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPN, WapiAEPNInitialValueSrc, 16); -+ -+ /* For chenk PN error with Qos Data after s3: add by ylb 20111114 */ -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue, WapiAEPNInitialValueSrc, 16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue, WapiAEPNInitialValueSrc, 16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue, WapiAEPNInitialValueSrc, 16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue, WapiAEPNInitialValueSrc, 16); -+ -+ WAPI_TRACE(WAPI_MLME, "<========== %s\n", __FUNCTION__); -+} -+ -+ -+void rtw_wapi_return_one_sta_info(_adapter *padapter, u8 *MacAddr) -+{ -+ PRT_WAPI_T pWapiInfo; -+ PRT_WAPI_STA_INFO pWapiStaInfo = NULL; -+ PRT_WAPI_BKID pWapiBkid = NULL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ pWapiInfo = &padapter->wapiInfo; -+ -+ WAPI_TRACE(WAPI_API, "==========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { -+ while (!list_empty(&(pWapiInfo->wapiBKIDStoreList))) { -+ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list); -+ list_del_init(&pWapiBkid->list); -+ _rtw_memset(pWapiBkid->bkid, 0, 16); -+ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList); -+ } -+ } -+ -+ -+ WAPI_TRACE(WAPI_API, " %s: after clear bkid\n", __FUNCTION__); -+ -+ -+ /* Remove STA info */ -+ if (list_empty(&(pWapiInfo->wapiSTAUsedList))) { -+ WAPI_TRACE(WAPI_API, " %s: wapiSTAUsedList is null\n", __FUNCTION__); -+ return; -+ } else { -+ -+ WAPI_TRACE(WAPI_API, " %s: wapiSTAUsedList is not null\n", __FUNCTION__); -+#if 0 -+ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry((pWapiInfo->wapiSTAUsedList.next), RT_WAPI_STA_INFO, list); -+ -+ list_for_each_entry(pWapiStaInfo, &(pWapiInfo->wapiSTAUsedList), list) { -+ -+ RTW_INFO("MAC Addr %02x-%02x-%02x-%02x-%02x-%02x\n", MacAddr[0], MacAddr[1], MacAddr[2], MacAddr[3], MacAddr[4], MacAddr[5]); -+ -+ -+ RTW_INFO("peer Addr %02x-%02x-%02x-%02x-%02x-%02x\n", pWapiStaInfo->PeerMacAddr[0], pWapiStaInfo->PeerMacAddr[1], pWapiStaInfo->PeerMacAddr[2], pWapiStaInfo->PeerMacAddr[3], -+ pWapiStaInfo->PeerMacAddr[4], pWapiStaInfo->PeerMacAddr[5]); -+ -+ if (pWapiStaInfo == NULL) { -+ WAPI_TRACE(WAPI_API, " %s: pWapiStaInfo == NULL Case\n", __FUNCTION__); -+ return; -+ } -+ -+ if (pWapiStaInfo->PeerMacAddr == NULL) { -+ WAPI_TRACE(WAPI_API, " %s: pWapiStaInfo->PeerMacAddr == NULL Case\n", __FUNCTION__); -+ return; -+ } -+ -+ if (MacAddr == NULL) { -+ WAPI_TRACE(WAPI_API, " %s: MacAddr == NULL Case\n", __FUNCTION__); -+ return; -+ } -+ -+ if (_rtw_memcmp(pWapiStaInfo->PeerMacAddr, MacAddr, ETH_ALEN) == _TRUE) { -+ pWapiStaInfo->bAuthenticateInProgress = false; -+ pWapiStaInfo->bSetkeyOk = false; -+ _rtw_memset(pWapiStaInfo->PeerMacAddr, 0, ETH_ALEN); -+ list_del_init(&pWapiStaInfo->list); -+ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); -+ break; -+ } -+ -+ } -+#endif -+ -+ while (!list_empty(&(pWapiInfo->wapiSTAUsedList))) { -+ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list); -+ -+ RTW_INFO("peer Addr %02x-%02x-%02x-%02x-%02x-%02x\n", pWapiStaInfo->PeerMacAddr[0], pWapiStaInfo->PeerMacAddr[1], pWapiStaInfo->PeerMacAddr[2], pWapiStaInfo->PeerMacAddr[3], -+ pWapiStaInfo->PeerMacAddr[4], pWapiStaInfo->PeerMacAddr[5]); -+ -+ list_del_init(&pWapiStaInfo->list); -+ memset(pWapiStaInfo->PeerMacAddr, 0, ETH_ALEN); -+ pWapiStaInfo->bSetkeyOk = 0; -+ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); -+ } -+ -+ } -+ -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+ return; -+} -+ -+void rtw_wapi_return_all_sta_info(_adapter *padapter) -+{ -+ PRT_WAPI_T pWapiInfo; -+ PRT_WAPI_STA_INFO pWapiStaInfo; -+ PRT_WAPI_BKID pWapiBkid; -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ pWapiInfo = &padapter->wapiInfo; -+ -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ /* Sta Info List */ -+ while (!list_empty(&(pWapiInfo->wapiSTAUsedList))) { -+ pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list); -+ list_del_init(&pWapiStaInfo->list); -+ memset(pWapiStaInfo->PeerMacAddr, 0, ETH_ALEN); -+ pWapiStaInfo->bSetkeyOk = 0; -+ list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList); -+ } -+ -+ /* BKID List */ -+ while (!list_empty(&(pWapiInfo->wapiBKIDStoreList))) { -+ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list); -+ list_del_init(&pWapiBkid->list); -+ memset(pWapiBkid->bkid, 0, 16); -+ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList); -+ } -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+} -+ -+void CAM_empty_entry( -+ PADAPTER Adapter, -+ u8 ucIndex -+) -+{ -+ rtw_hal_set_hwreg(Adapter, HW_VAR_CAM_EMPTY_ENTRY, (u8 *)(&ucIndex)); -+} -+ -+void rtw_wapi_clear_cam_entry(_adapter *padapter, u8 *pMacAddr) -+{ -+ u8 UcIndex = 0; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 0, 0); -+ if (UcIndex != 0xff) { -+ /* CAM_mark_invalid(Adapter, UcIndex); */ -+ CAM_empty_entry(padapter, UcIndex); -+ } -+ -+ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 1, 0); -+ if (UcIndex != 0xff) { -+ /* CAM_mark_invalid(Adapter, UcIndex); */ -+ CAM_empty_entry(padapter, UcIndex); -+ } -+ -+ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 0, 1); -+ if (UcIndex != 0xff) { -+ /* CAM_mark_invalid(Adapter, UcIndex); */ -+ CAM_empty_entry(padapter, UcIndex); -+ } -+ -+ UcIndex = WapiGetEntryForCamClear(padapter, pMacAddr, 1, 1); -+ if (UcIndex != 0xff) { -+ /* CAM_mark_invalid(padapter, UcIndex); */ -+ CAM_empty_entry(padapter, UcIndex); -+ } -+ -+ WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_clear_all_cam_entry(_adapter *padapter) -+{ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) { -+ WAPI_TRACE(WAPI_MLME, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ invalidate_cam_all(padapter); /* is this ok? */ -+ WapiResetAllCamEntry(padapter); -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+} -+ -+void rtw_wapi_set_key(_adapter *padapter, RT_WAPI_KEY *pWapiKey, RT_WAPI_STA_INFO *pWapiSta, u8 bGroupKey, u8 bUseDefaultKey) -+{ -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ u8 *pMacAddr = pWapiSta->PeerMacAddr; -+ u32 EntryId = 0; -+ BOOLEAN IsPairWise = false ; -+ u8 EncAlgo; -+ -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) { -+ WAPI_TRACE(WAPI_API, "<========== %s, WAPI not supported or not enabled!\n", __FUNCTION__); -+ return; -+ } -+ -+ EncAlgo = _SMS4_; -+ -+ /* For Tx bc/mc pkt,use defualt key entry */ -+ if (bUseDefaultKey) { -+ /* when WAPI update key, keyid will be 0 or 1 by turns. */ -+ if (pWapiKey->keyId == 0) -+ EntryId = 0; -+ else -+ EntryId = 2; -+ } else { -+ /* tx/rx unicast pkt, or rx broadcast, find the key entry by peer's MacAddr */ -+ EntryId = WapiGetEntryForCamWrite(padapter, pMacAddr, pWapiKey->keyId, bGroupKey); -+ } -+ -+ if (EntryId == 0xff) { -+ WAPI_TRACE(WAPI_API, "===>No entry for WAPI setkey! !!\n"); -+ return; -+ } -+ -+ /* EntryId is also used to diff Sec key and Mic key */ -+ /* Sec Key */ -+ WapiWriteOneCamEntry(padapter, -+ pMacAddr, -+ pWapiKey->keyId, /* keyid */ -+ EntryId, /* entry */ -+ EncAlgo, /* type */ -+ bGroupKey, /* pairwise or group key */ -+ pWapiKey->dataKey); -+ /* MIC key */ -+ WapiWriteOneCamEntry(padapter, -+ pMacAddr, -+ pWapiKey->keyId, /* keyid */ -+ EntryId + 1, /* entry */ -+ EncAlgo, /* type */ -+ bGroupKey, /* pairwise or group key */ -+ pWapiKey->micKey); -+ -+ WAPI_TRACE(WAPI_API, "Set Wapi Key :KeyId:%d,EntryId:%d,PairwiseKey:%d.\n", pWapiKey->keyId, EntryId, !bGroupKey); -+ WAPI_TRACE(WAPI_API, "===========> %s\n", __FUNCTION__); -+ -+} -+ -+#if 0 -+/* YJ,test,091013 */ -+void wapi_test_set_key(struct _adapter *padapter, u8 *buf) -+{ -+ /*Data: keyType(1) + bTxEnable(1) + bAuthenticator(1) + bUpdate(1) + PeerAddr(6) + DataKey(16) + MicKey(16) + KeyId(1)*/ -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ PRT_WAPI_BKID pWapiBkid; -+ PRT_WAPI_STA_INFO pWapiSta; -+ u8 data[43]; -+ bool bTxEnable; -+ bool bUpdate; -+ bool bAuthenticator; -+ u8 PeerAddr[6]; -+ u8 WapiAEPNInitialValueSrc[16] = {0x37, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C} ; -+ u8 WapiASUEPNInitialValueSrc[16] = {0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C} ; -+ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C} ; -+ -+ WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__); -+ -+ if (!padapter->WapiSupport) -+ return; -+ -+ copy_from_user(data, buf, 43); -+ bTxEnable = data[1]; -+ bAuthenticator = data[2]; -+ bUpdate = data[3]; -+ memcpy(PeerAddr, data + 4, 6); -+ -+ if (data[0] == 0x3) { -+ if (!list_empty(&(pWapiInfo->wapiBKIDIdleList))) { -+ pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list); -+ list_del_init(&pWapiBkid->list); -+ memcpy(pWapiBkid->bkid, data + 10, 16); -+ WAPI_DATA(WAPI_INIT, "SetKey - BKID", pWapiBkid->bkid, 16); -+ list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDStoreList); -+ } -+ } else { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (!memcmp(pWapiSta->PeerMacAddr, PeerAddr, 6)) { -+ pWapiSta->bAuthenticatorInUpdata = false; -+ switch (data[0]) { -+ case 1: /* usk */ -+ if (bAuthenticator) { /* authenticator */ -+ memcpy(pWapiSta->lastTxUnicastPN, WapiAEPNInitialValueSrc, 16); -+ if (!bUpdate) { /* first */ -+ WAPI_TRACE(WAPI_INIT, "AE fisrt set usk\n"); -+ pWapiSta->wapiUsk.bSet = true; -+ memcpy(pWapiSta->wapiUsk.dataKey, data + 10, 16); -+ memcpy(pWapiSta->wapiUsk.micKey, data + 26, 16); -+ pWapiSta->wapiUsk.keyId = *(data + 42); -+ pWapiSta->wapiUsk.bTxEnable = true; -+ WAPI_DATA(WAPI_INIT, "SetKey - AE USK Data Key", pWapiSta->wapiUsk.dataKey, 16); -+ WAPI_DATA(WAPI_INIT, "SetKey - AE USK Mic Key", pWapiSta->wapiUsk.micKey, 16); -+ } else { /* update */ -+ WAPI_TRACE(WAPI_INIT, "AE update usk\n"); -+ pWapiSta->wapiUskUpdate.bSet = true; -+ pWapiSta->bAuthenticatorInUpdata = true; -+ memcpy(pWapiSta->wapiUskUpdate.dataKey, data + 10, 16); -+ memcpy(pWapiSta->wapiUskUpdate.micKey, data + 26, 16); -+ memcpy(pWapiSta->lastRxUnicastPNBEQueue, WapiASUEPNInitialValueSrc, 16); -+ memcpy(pWapiSta->lastRxUnicastPNBKQueue, WapiASUEPNInitialValueSrc, 16); -+ memcpy(pWapiSta->lastRxUnicastPNVIQueue, WapiASUEPNInitialValueSrc, 16); -+ memcpy(pWapiSta->lastRxUnicastPNVOQueue, WapiASUEPNInitialValueSrc, 16); -+ memcpy(pWapiSta->lastRxUnicastPN, WapiASUEPNInitialValueSrc, 16); -+ pWapiSta->wapiUskUpdate.keyId = *(data + 42); -+ pWapiSta->wapiUskUpdate.bTxEnable = true; -+ } -+ } else { -+ if (!bUpdate) { -+ WAPI_TRACE(WAPI_INIT, "ASUE fisrt set usk\n"); -+ if (bTxEnable) { -+ pWapiSta->wapiUsk.bTxEnable = true; -+ memcpy(pWapiSta->lastTxUnicastPN, WapiASUEPNInitialValueSrc, 16); -+ } else { -+ pWapiSta->wapiUsk.bSet = true; -+ memcpy(pWapiSta->wapiUsk.dataKey, data + 10, 16); -+ memcpy(pWapiSta->wapiUsk.micKey, data + 26, 16); -+ pWapiSta->wapiUsk.keyId = *(data + 42); -+ pWapiSta->wapiUsk.bTxEnable = false; -+ } -+ } else { -+ WAPI_TRACE(WAPI_INIT, "ASUE update usk\n"); -+ if (bTxEnable) { -+ pWapiSta->wapiUskUpdate.bTxEnable = true; -+ if (pWapiSta->wapiUskUpdate.bSet) { -+ memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16); -+ memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16); -+ pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId; -+ memcpy(pWapiSta->lastRxUnicastPNBEQueue, WapiASUEPNInitialValueSrc, 16); -+ memcpy(pWapiSta->lastRxUnicastPNBKQueue, WapiASUEPNInitialValueSrc, 16); -+ memcpy(pWapiSta->lastRxUnicastPNVIQueue, WapiASUEPNInitialValueSrc, 16); -+ memcpy(pWapiSta->lastRxUnicastPNVOQueue, WapiASUEPNInitialValueSrc, 16); -+ memcpy(pWapiSta->lastRxUnicastPN, WapiASUEPNInitialValueSrc, 16); -+ pWapiSta->wapiUskUpdate.bTxEnable = false; -+ pWapiSta->wapiUskUpdate.bSet = false; -+ } -+ memcpy(pWapiSta->lastTxUnicastPN, WapiASUEPNInitialValueSrc, 16); -+ } else { -+ pWapiSta->wapiUskUpdate.bSet = true; -+ memcpy(pWapiSta->wapiUskUpdate.dataKey, data + 10, 16); -+ memcpy(pWapiSta->wapiUskUpdate.micKey, data + 26, 16); -+ pWapiSta->wapiUskUpdate.keyId = *(data + 42); -+ pWapiSta->wapiUskUpdate.bTxEnable = false; -+ } -+ } -+ } -+ break; -+ case 2: /* msk */ -+ if (bAuthenticator) { /* authenticator */ -+ pWapiInfo->wapiTxMsk.bSet = true; -+ memcpy(pWapiInfo->wapiTxMsk.dataKey, data + 10, 16); -+ memcpy(pWapiInfo->wapiTxMsk.micKey, data + 26, 16); -+ pWapiInfo->wapiTxMsk.keyId = *(data + 42); -+ pWapiInfo->wapiTxMsk.bTxEnable = true; -+ memcpy(pWapiInfo->lastTxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); -+ -+ if (!bUpdate) { /* first */ -+ WAPI_TRACE(WAPI_INIT, "AE fisrt set msk\n"); -+ if (!pWapiSta->bSetkeyOk) -+ pWapiSta->bSetkeyOk = true; -+ pWapiInfo->bFirstAuthentiateInProgress = false; -+ } else /* update */ -+ WAPI_TRACE(WAPI_INIT, "AE update msk\n"); -+ -+ WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Data Key", pWapiInfo->wapiTxMsk.dataKey, 16); -+ WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Mic Key", pWapiInfo->wapiTxMsk.micKey, 16); -+ } else { -+ if (!bUpdate) { -+ WAPI_TRACE(WAPI_INIT, "ASUE fisrt set msk\n"); -+ pWapiSta->wapiMsk.bSet = true; -+ memcpy(pWapiSta->wapiMsk.dataKey, data + 10, 16); -+ memcpy(pWapiSta->wapiMsk.micKey, data + 26, 16); -+ pWapiSta->wapiMsk.keyId = *(data + 42); -+ pWapiSta->wapiMsk.bTxEnable = false; -+ if (!pWapiSta->bSetkeyOk) -+ pWapiSta->bSetkeyOk = true; -+ pWapiInfo->bFirstAuthentiateInProgress = false; -+ WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Data Key", pWapiSta->wapiMsk.dataKey, 16); -+ WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Mic Key", pWapiSta->wapiMsk.micKey, 16); -+ } else { -+ WAPI_TRACE(WAPI_INIT, "ASUE update msk\n"); -+ pWapiSta->wapiMskUpdate.bSet = true; -+ memcpy(pWapiSta->wapiMskUpdate.dataKey, data + 10, 16); -+ memcpy(pWapiSta->wapiMskUpdate.micKey, data + 26, 16); -+ pWapiSta->wapiMskUpdate.keyId = *(data + 42); -+ pWapiSta->wapiMskUpdate.bTxEnable = false; -+ } -+ } -+ break; -+ default: -+ WAPI_TRACE(WAPI_ERR, "Unknown Flag\n"); -+ break; -+ } -+ } -+ } -+ } -+ WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__); -+} -+ -+ -+void wapi_test_init(struct _adapter *padapter) -+{ -+ u8 keybuf[100]; -+ u8 mac_addr[ETH_ALEN] = {0x00, 0xe0, 0x4c, 0x72, 0x04, 0x70}; -+ u8 UskDataKey[16] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f}; -+ u8 UskMicKey[16] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f}; -+ u8 UskId = 0; -+ u8 MskDataKey[16] = {0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f}; -+ u8 MskMicKey[16] = {0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f}; -+ u8 MskId = 0; -+ -+ WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__); -+ -+ /* Enable Wapi */ -+ WAPI_TRACE(WAPI_INIT, "%s: Enable wapi!!!!\n", __FUNCTION__); -+ padapter->wapiInfo.bWapiEnable = true; -+ padapter->pairwise_key_type = KEY_TYPE_SMS4; -+ ieee->group_key_type = KEY_TYPE_SMS4; -+ padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; -+ padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; -+ -+ /* set usk */ -+ WAPI_TRACE(WAPI_INIT, "%s: Set USK!!!!\n", __FUNCTION__); -+ memset(keybuf, 0, 100); -+ keybuf[0] = 1; /* set usk */ -+ keybuf[1] = 1; /* enable tx */ -+ keybuf[2] = 1; /* AE */ -+ keybuf[3] = 0; /* not update */ -+ -+ memcpy(keybuf + 4, mac_addr, ETH_ALEN); -+ memcpy(keybuf + 10, UskDataKey, 16); -+ memcpy(keybuf + 26, UskMicKey, 16); -+ keybuf[42] = UskId; -+ wapi_test_set_key(padapter, keybuf); -+ -+ memset(keybuf, 0, 100); -+ keybuf[0] = 1; /* set usk */ -+ keybuf[1] = 1; /* enable tx */ -+ keybuf[2] = 0; /* AE */ -+ keybuf[3] = 0; /* not update */ -+ -+ memcpy(keybuf + 4, mac_addr, ETH_ALEN); -+ memcpy(keybuf + 10, UskDataKey, 16); -+ memcpy(keybuf + 26, UskMicKey, 16); -+ keybuf[42] = UskId; -+ wapi_test_set_key(padapter, keybuf); -+ -+ /* set msk */ -+ WAPI_TRACE(WAPI_INIT, "%s: Set MSK!!!!\n", __FUNCTION__); -+ memset(keybuf, 0, 100); -+ keybuf[0] = 2; /* set msk */ -+ keybuf[1] = 1; /* Enable TX */ -+ keybuf[2] = 1; /* AE */ -+ keybuf[3] = 0; /* not update */ -+ memcpy(keybuf + 4, mac_addr, ETH_ALEN); -+ memcpy(keybuf + 10, MskDataKey, 16); -+ memcpy(keybuf + 26, MskMicKey, 16); -+ keybuf[42] = MskId; -+ wapi_test_set_key(padapter, keybuf); -+ -+ memset(keybuf, 0, 100); -+ keybuf[0] = 2; /* set msk */ -+ keybuf[1] = 1; /* Enable TX */ -+ keybuf[2] = 0; /* AE */ -+ keybuf[3] = 0; /* not update */ -+ memcpy(keybuf + 4, mac_addr, ETH_ALEN); -+ memcpy(keybuf + 10, MskDataKey, 16); -+ memcpy(keybuf + 26, MskMicKey, 16); -+ keybuf[42] = MskId; -+ wapi_test_set_key(padapter, keybuf); -+ WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__); -+} -+#endif -+ -+void rtw_wapi_get_iv(_adapter *padapter, u8 *pRA, u8 *IV) -+{ -+ PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL; -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ bool bPNOverflow = false; -+ bool bFindMatchPeer = false; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ -+ pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)IV; -+ -+ WAPI_DATA(WAPI_RX, "wapi_get_iv: pra", pRA, 6); -+ -+ if (IS_MCAST(pRA)) { -+ if (!pWapiInfo->wapiTxMsk.bTxEnable) { -+ WAPI_TRACE(WAPI_ERR, "%s: bTxEnable = 0!!\n", __FUNCTION__); -+ return; -+ } -+ -+ if (pWapiInfo->wapiTxMsk.keyId <= 1) { -+ pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId; -+ pWapiExt->Reserved = 0; -+ bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1); -+ memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16); -+ } -+ } else { -+ if (list_empty(&pWapiInfo->wapiSTAUsedList)) { -+ WAPI_TRACE(WAPI_RX, "rtw_wapi_get_iv: list is empty\n"); -+ _rtw_memset(IV, 10, 18); -+ return; -+ } else { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ WAPI_DATA(WAPI_RX, "rtw_wapi_get_iv: peermacaddr ", pWapiSta->PeerMacAddr, 6); -+ if (_rtw_memcmp((u8 *)pWapiSta->PeerMacAddr, pRA, 6) == _TRUE) { -+ bFindMatchPeer = true; -+ break; -+ } -+ } -+ -+ WAPI_TRACE(WAPI_RX, "bFindMatchPeer: %d\n", bFindMatchPeer); -+ WAPI_DATA(WAPI_RX, "Addr", pRA, 6); -+ -+ if (bFindMatchPeer) { -+ if ((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)) -+ return; -+ -+ if (pWapiSta->wapiUsk.keyId <= 1) { -+ if (pWapiSta->wapiUskUpdate.bTxEnable) -+ pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId; -+ else -+ pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId; -+ -+ pWapiExt->Reserved = 0; -+ bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2); -+ _rtw_memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16); -+ -+ } -+ } -+ } -+ -+ } -+ -+} -+ -+bool rtw_wapi_drop_for_key_absent(_adapter *padapter, u8 *pRA) -+{ -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ bool bFindMatchPeer = false; -+ bool bDrop = false; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ WAPI_DATA(WAPI_RX, "rtw_wapi_drop_for_key_absent: ra ", pRA, 6); -+ -+ if (psecuritypriv->dot11PrivacyAlgrthm == _SMS4_) { -+ if ((!padapter->WapiSupport) || (!pWapiInfo->bWapiEnable)) -+ return true; -+ -+ if (IS_MCAST(pRA)) { -+ if (!pWapiInfo->wapiTxMsk.bTxEnable) { -+ bDrop = true; -+ WAPI_TRACE(WAPI_RX, "rtw_wapi_drop_for_key_absent: multicast key is absent\n"); -+ return bDrop; -+ } -+ } else { -+ if (!list_empty(&pWapiInfo->wapiSTAUsedList)) { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ WAPI_DATA(WAPI_RX, "rtw_wapi_drop_for_key_absent: pWapiSta->PeerMacAddr ", pWapiSta->PeerMacAddr, 6); -+ if (_rtw_memcmp(pRA, pWapiSta->PeerMacAddr, 6) == _TRUE) { -+ bFindMatchPeer = true; -+ break; -+ } -+ } -+ if (bFindMatchPeer) { -+ if (!pWapiSta->wapiUsk.bTxEnable) { -+ bDrop = true; -+ WAPI_TRACE(WAPI_RX, "rtw_wapi_drop_for_key_absent: unicast key is absent\n"); -+ return bDrop; -+ } -+ } else { -+ bDrop = true; -+ WAPI_TRACE(WAPI_RX, "rtw_wapi_drop_for_key_absent: no peer find\n"); -+ return bDrop; -+ } -+ -+ } else { -+ bDrop = true; -+ WAPI_TRACE(WAPI_RX, "rtw_wapi_drop_for_key_absent: no sta exist\n"); -+ return bDrop; -+ } -+ } -+ } else -+ return bDrop; -+ -+ return bDrop; -+} -+ -+void rtw_wapi_set_set_encryption(_adapter *padapter, struct ieee_param *param) -+{ -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ PRT_WAPI_STA_INFO pWapiSta; -+ u8 WapiASUEPNInitialValueSrc[16] = {0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C} ; -+ u8 WapiAEPNInitialValueSrc[16] = {0x37, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C} ; -+ u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C, 0x36, 0x5C} ; -+ -+ if (param->u.crypt.set_tx == 1) { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (_rtw_memcmp(pWapiSta->PeerMacAddr, param->sta_addr, 6)) { -+ _rtw_memcpy(pWapiSta->lastTxUnicastPN, WapiASUEPNInitialValueSrc, 16); -+ -+ pWapiSta->wapiUsk.bSet = true; -+ _rtw_memcpy(pWapiSta->wapiUsk.dataKey, param->u.crypt.key, 16); -+ _rtw_memcpy(pWapiSta->wapiUsk.micKey, param->u.crypt.key + 16, 16); -+ pWapiSta->wapiUsk.keyId = param->u.crypt.idx ; -+ pWapiSta->wapiUsk.bTxEnable = true; -+ -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNBEQueue, WapiAEPNInitialValueSrc, 16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNBKQueue, WapiAEPNInitialValueSrc, 16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNVIQueue, WapiAEPNInitialValueSrc, 16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPNVOQueue, WapiAEPNInitialValueSrc, 16); -+ _rtw_memcpy(pWapiSta->lastRxUnicastPN, WapiAEPNInitialValueSrc, 16); -+ pWapiSta->wapiUskUpdate.bTxEnable = false; -+ pWapiSta->wapiUskUpdate.bSet = false; -+ -+ if (psecuritypriv->sw_encrypt == false || psecuritypriv->sw_decrypt == false) { -+ /* set unicast key for ASUE */ -+ rtw_wapi_set_key(padapter, &pWapiSta->wapiUsk, pWapiSta, false, false); -+ } -+ } -+ } -+ } else { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (_rtw_memcmp(pWapiSta->PeerMacAddr, get_bssid(pmlmepriv), 6)) { -+ pWapiSta->wapiMsk.bSet = true; -+ _rtw_memcpy(pWapiSta->wapiMsk.dataKey, param->u.crypt.key, 16); -+ _rtw_memcpy(pWapiSta->wapiMsk.micKey, param->u.crypt.key + 16, 16); -+ pWapiSta->wapiMsk.keyId = param->u.crypt.idx ; -+ pWapiSta->wapiMsk.bTxEnable = false; -+ if (!pWapiSta->bSetkeyOk) -+ pWapiSta->bSetkeyOk = true; -+ pWapiSta->bAuthenticateInProgress = false; -+ -+ _rtw_memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16); -+ -+ if (psecuritypriv->sw_decrypt == false) { -+ /* set rx broadcast key for ASUE */ -+ rtw_wapi_set_key(padapter, &pWapiSta->wapiMsk, pWapiSta, true, false); -+ } -+ } -+ } -+ } -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/core/rtw_wapi_sms4.c b/drivers/staging/rtl8723cs/core/rtw_wapi_sms4.c -new file mode 100644 -index 000000000000..4b7cf957c8f2 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_wapi_sms4.c -@@ -0,0 +1,922 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifdef CONFIG_WAPI_SUPPORT -+ -+#include -+#include -+#include -+#include -+ -+ -+#ifdef CONFIG_WAPI_SW_SMS4 -+ -+#define WAPI_LITTLE_ENDIAN -+/* #define BIG_ENDIAN */ -+#define ENCRYPT 0 -+#define DECRYPT 1 -+ -+ -+/********************************************************** -+ **********************************************************/ -+const u8 Sbox[256] = { -+ 0xd6, 0x90, 0xe9, 0xfe, 0xcc, 0xe1, 0x3d, 0xb7, 0x16, 0xb6, 0x14, 0xc2, 0x28, 0xfb, 0x2c, 0x05, -+ 0x2b, 0x67, 0x9a, 0x76, 0x2a, 0xbe, 0x04, 0xc3, 0xaa, 0x44, 0x13, 0x26, 0x49, 0x86, 0x06, 0x99, -+ 0x9c, 0x42, 0x50, 0xf4, 0x91, 0xef, 0x98, 0x7a, 0x33, 0x54, 0x0b, 0x43, 0xed, 0xcf, 0xac, 0x62, -+ 0xe4, 0xb3, 0x1c, 0xa9, 0xc9, 0x08, 0xe8, 0x95, 0x80, 0xdf, 0x94, 0xfa, 0x75, 0x8f, 0x3f, 0xa6, -+ 0x47, 0x07, 0xa7, 0xfc, 0xf3, 0x73, 0x17, 0xba, 0x83, 0x59, 0x3c, 0x19, 0xe6, 0x85, 0x4f, 0xa8, -+ 0x68, 0x6b, 0x81, 0xb2, 0x71, 0x64, 0xda, 0x8b, 0xf8, 0xeb, 0x0f, 0x4b, 0x70, 0x56, 0x9d, 0x35, -+ 0x1e, 0x24, 0x0e, 0x5e, 0x63, 0x58, 0xd1, 0xa2, 0x25, 0x22, 0x7c, 0x3b, 0x01, 0x21, 0x78, 0x87, -+ 0xd4, 0x00, 0x46, 0x57, 0x9f, 0xd3, 0x27, 0x52, 0x4c, 0x36, 0x02, 0xe7, 0xa0, 0xc4, 0xc8, 0x9e, -+ 0xea, 0xbf, 0x8a, 0xd2, 0x40, 0xc7, 0x38, 0xb5, 0xa3, 0xf7, 0xf2, 0xce, 0xf9, 0x61, 0x15, 0xa1, -+ 0xe0, 0xae, 0x5d, 0xa4, 0x9b, 0x34, 0x1a, 0x55, 0xad, 0x93, 0x32, 0x30, 0xf5, 0x8c, 0xb1, 0xe3, -+ 0x1d, 0xf6, 0xe2, 0x2e, 0x82, 0x66, 0xca, 0x60, 0xc0, 0x29, 0x23, 0xab, 0x0d, 0x53, 0x4e, 0x6f, -+ 0xd5, 0xdb, 0x37, 0x45, 0xde, 0xfd, 0x8e, 0x2f, 0x03, 0xff, 0x6a, 0x72, 0x6d, 0x6c, 0x5b, 0x51, -+ 0x8d, 0x1b, 0xaf, 0x92, 0xbb, 0xdd, 0xbc, 0x7f, 0x11, 0xd9, 0x5c, 0x41, 0x1f, 0x10, 0x5a, 0xd8, -+ 0x0a, 0xc1, 0x31, 0x88, 0xa5, 0xcd, 0x7b, 0xbd, 0x2d, 0x74, 0xd0, 0x12, 0xb8, 0xe5, 0xb4, 0xb0, -+ 0x89, 0x69, 0x97, 0x4a, 0x0c, 0x96, 0x77, 0x7e, 0x65, 0xb9, 0xf1, 0x09, 0xc5, 0x6e, 0xc6, 0x84, -+ 0x18, 0xf0, 0x7d, 0xec, 0x3a, 0xdc, 0x4d, 0x20, 0x79, 0xee, 0x5f, 0x3e, 0xd7, 0xcb, 0x39, 0x48 -+}; -+ -+const u32 CK[32] = { -+ 0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269, -+ 0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9, -+ 0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249, -+ 0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9, -+ 0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229, -+ 0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299, -+ 0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209, -+ 0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279 -+}; -+ -+#define Rotl(_x, _y) (((_x) << (_y)) | ((_x) >> (32 - (_y)))) -+ -+#define ByteSub(_A) (Sbox[(_A) >> 24 & 0xFF] << 24 | \ -+ Sbox[(_A) >> 16 & 0xFF] << 16 | \ -+ Sbox[(_A) >> 8 & 0xFF] << 8 | \ -+ Sbox[(_A) & 0xFF]) -+ -+#define L1(_B) ((_B) ^ Rotl(_B, 2) ^ Rotl(_B, 10) ^ Rotl(_B, 18) ^ Rotl(_B, 24)) -+#define L2(_B) ((_B) ^ Rotl(_B, 13) ^ Rotl(_B, 23)) -+ -+static void -+xor_block(void *dst, void *src1, void *src2) -+/* 128-bit xor: *dst = *src1 xor *src2. Pointers must be 32-bit aligned */ -+{ -+ ((u32 *)dst)[0] = ((u32 *)src1)[0] ^ ((u32 *)src2)[0]; -+ ((u32 *)dst)[1] = ((u32 *)src1)[1] ^ ((u32 *)src2)[1]; -+ ((u32 *)dst)[2] = ((u32 *)src1)[2] ^ ((u32 *)src2)[2]; -+ ((u32 *)dst)[3] = ((u32 *)src1)[3] ^ ((u32 *)src2)[3]; -+} -+ -+ -+void SMS4Crypt(u8 *Input, u8 *Output, u32 *rk) -+{ -+ u32 r, mid, x0, x1, x2, x3, *p; -+ p = (u32 *)Input; -+ x0 = p[0]; -+ x1 = p[1]; -+ x2 = p[2]; -+ x3 = p[3]; -+#ifdef WAPI_LITTLE_ENDIAN -+ x0 = Rotl(x0, 16); -+ x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); -+ x1 = Rotl(x1, 16); -+ x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); -+ x2 = Rotl(x2, 16); -+ x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); -+ x3 = Rotl(x3, 16); -+ x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); -+#endif -+ for (r = 0; r < 32; r += 4) { -+ mid = x1 ^ x2 ^ x3 ^ rk[r + 0]; -+ mid = ByteSub(mid); -+ x0 ^= L1(mid); -+ mid = x2 ^ x3 ^ x0 ^ rk[r + 1]; -+ mid = ByteSub(mid); -+ x1 ^= L1(mid); -+ mid = x3 ^ x0 ^ x1 ^ rk[r + 2]; -+ mid = ByteSub(mid); -+ x2 ^= L1(mid); -+ mid = x0 ^ x1 ^ x2 ^ rk[r + 3]; -+ mid = ByteSub(mid); -+ x3 ^= L1(mid); -+ } -+#ifdef WAPI_LITTLE_ENDIAN -+ x0 = Rotl(x0, 16); -+ x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); -+ x1 = Rotl(x1, 16); -+ x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); -+ x2 = Rotl(x2, 16); -+ x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); -+ x3 = Rotl(x3, 16); -+ x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); -+#endif -+ p = (u32 *)Output; -+ p[0] = x3; -+ p[1] = x2; -+ p[2] = x1; -+ p[3] = x0; -+} -+ -+ -+ -+void SMS4KeyExt(u8 *Key, u32 *rk, u32 CryptFlag) -+{ -+ u32 r, mid, x0, x1, x2, x3, *p; -+ -+ p = (u32 *)Key; -+ x0 = p[0]; -+ x1 = p[1]; -+ x2 = p[2]; -+ x3 = p[3]; -+#ifdef WAPI_LITTLE_ENDIAN -+ x0 = Rotl(x0, 16); -+ x0 = ((x0 & 0xFF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8); -+ x1 = Rotl(x1, 16); -+ x1 = ((x1 & 0xFF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8); -+ x2 = Rotl(x2, 16); -+ x2 = ((x2 & 0xFF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8); -+ x3 = Rotl(x3, 16); -+ x3 = ((x3 & 0xFF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8); -+#endif -+ -+ x0 ^= 0xa3b1bac6; -+ x1 ^= 0x56aa3350; -+ x2 ^= 0x677d9197; -+ x3 ^= 0xb27022dc; -+ for (r = 0; r < 32; r += 4) { -+ mid = x1 ^ x2 ^ x3 ^ CK[r + 0]; -+ mid = ByteSub(mid); -+ rk[r + 0] = x0 ^= L2(mid); -+ mid = x2 ^ x3 ^ x0 ^ CK[r + 1]; -+ mid = ByteSub(mid); -+ rk[r + 1] = x1 ^= L2(mid); -+ mid = x3 ^ x0 ^ x1 ^ CK[r + 2]; -+ mid = ByteSub(mid); -+ rk[r + 2] = x2 ^= L2(mid); -+ mid = x0 ^ x1 ^ x2 ^ CK[r + 3]; -+ mid = ByteSub(mid); -+ rk[r + 3] = x3 ^= L2(mid); -+ } -+ if (CryptFlag == DECRYPT) { -+ for (r = 0; r < 16; r++) -+ mid = rk[r], rk[r] = rk[31 - r], rk[31 - r] = mid; -+ } -+} -+ -+ -+void WapiSMS4Cryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength, -+ u8 *Output, u16 *OutputLength, u32 CryptFlag) -+{ -+ u32 blockNum, i, j, rk[32]; -+ u16 remainder; -+ u8 blockIn[16], blockOut[16], tempIV[16], k; -+ -+ *OutputLength = 0; -+ remainder = InputLength & 0x0F; -+ blockNum = InputLength >> 4; -+ if (remainder != 0) -+ blockNum++; -+ else -+ remainder = 16; -+ -+ for (k = 0; k < 16; k++) -+ tempIV[k] = IV[15 - k]; -+ -+ memcpy(blockIn, tempIV, 16); -+ -+ SMS4KeyExt((u8 *)Key, rk, CryptFlag); -+ -+ for (i = 0; i < blockNum - 1; i++) { -+ SMS4Crypt((u8 *)blockIn, blockOut, rk); -+ xor_block(&Output[i * 16], &Input[i * 16], blockOut); -+ memcpy(blockIn, blockOut, 16); -+ } -+ -+ *OutputLength = i * 16; -+ -+ SMS4Crypt((u8 *)blockIn, blockOut, rk); -+ -+ for (j = 0; j < remainder; j++) -+ Output[i * 16 + j] = Input[i * 16 + j] ^ blockOut[j]; -+ *OutputLength += remainder; -+ -+} -+ -+void WapiSMS4Encryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength, -+ u8 *Output, u16 *OutputLength) -+{ -+ -+ WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT); -+} -+ -+void WapiSMS4Decryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength, -+ u8 *Output, u16 *OutputLength) -+{ -+ /* OFB mode: is also ENCRYPT flag */ -+ WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT); -+} -+ -+void WapiSMS4CalculateMic(u8 *Key, u8 *IV, u8 *Input1, u8 Input1Length, -+ u8 *Input2, u16 Input2Length, u8 *Output, u8 *OutputLength) -+{ -+ u32 blockNum, i, remainder, rk[32]; -+ u8 BlockIn[16], BlockOut[16], TempBlock[16], tempIV[16], k; -+ -+ *OutputLength = 0; -+ remainder = Input1Length & 0x0F; -+ blockNum = Input1Length >> 4; -+ -+ for (k = 0; k < 16; k++) -+ tempIV[k] = IV[15 - k]; -+ -+ memcpy(BlockIn, tempIV, 16); -+ -+ SMS4KeyExt((u8 *)Key, rk, ENCRYPT); -+ -+ SMS4Crypt((u8 *)BlockIn, BlockOut, rk); -+ -+ for (i = 0; i < blockNum; i++) { -+ xor_block(BlockIn, (Input1 + i * 16), BlockOut); -+ SMS4Crypt((u8 *)BlockIn, BlockOut, rk); -+ } -+ -+ if (remainder != 0) { -+ memset(TempBlock, 0, 16); -+ memcpy(TempBlock, (Input1 + blockNum * 16), remainder); -+ -+ xor_block(BlockIn, TempBlock, BlockOut); -+ SMS4Crypt((u8 *)BlockIn, BlockOut, rk); -+ } -+ -+ remainder = Input2Length & 0x0F; -+ blockNum = Input2Length >> 4; -+ -+ for (i = 0; i < blockNum; i++) { -+ xor_block(BlockIn, (Input2 + i * 16), BlockOut); -+ SMS4Crypt((u8 *)BlockIn, BlockOut, rk); -+ } -+ -+ if (remainder != 0) { -+ memset(TempBlock, 0, 16); -+ memcpy(TempBlock, (Input2 + blockNum * 16), remainder); -+ -+ xor_block(BlockIn, TempBlock, BlockOut); -+ SMS4Crypt((u8 *)BlockIn, BlockOut, rk); -+ } -+ -+ memcpy(Output, BlockOut, 16); -+ *OutputLength = 16; -+} -+ -+void SecCalculateMicSMS4( -+ u8 KeyIdx, -+ u8 *MicKey, -+ u8 *pHeader, -+ u8 *pData, -+ u16 DataLen, -+ u8 *MicBuffer -+) -+{ -+#if 0 -+ struct ieee80211_hdr_3addr_qos *header; -+ u8 TempBuf[34], TempLen = 32, MicLen, QosOffset, *IV; -+ u16 *pTemp, fc; -+ -+ WAPI_TRACE(WAPI_TX | WAPI_RX, "=========>%s\n", __FUNCTION__); -+ -+ header = (struct ieee80211_hdr_3addr_qos *)pHeader; -+ memset(TempBuf, 0, 34); -+ memcpy(TempBuf, pHeader, 2); /* FrameCtrl */ -+ pTemp = (u16 *)TempBuf; -+ *pTemp &= 0xc78f; /* bit4,5,6,11,12,13 */ -+ -+ memcpy((TempBuf + 2), (pHeader + 4), 12); /* Addr1, Addr2 */ -+ memcpy((TempBuf + 14), (pHeader + 22), 2); /* SeqCtrl */ -+ pTemp = (u16 *)(TempBuf + 14); -+ *pTemp &= 0x000f; -+ -+ memcpy((TempBuf + 16), (pHeader + 16), 6); /* Addr3 */ -+ -+ fc = le16_to_cpu(header->frame_ctl); -+ -+ -+ -+ if (GetFrDs((u16 *)&fc) && GetToDs((u16 *)&fc)) { -+ memcpy((TempBuf + 22), (pHeader + 24), 6); -+ QosOffset = 30; -+ } else { -+ memset((TempBuf + 22), 0, 6); -+ QosOffset = 24; -+ } -+ -+ if ((fc & 0x0088) == 0x0088) { -+ memcpy((TempBuf + 28), (pHeader + QosOffset), 2); -+ TempLen += 2; -+ /* IV = pHeader + QosOffset + 2 + SNAP_SIZE + sizeof(u16) + 2; */ -+ IV = pHeader + QosOffset + 2 + 2; -+ } else { -+ IV = pHeader + QosOffset + 2; -+ /* IV = pHeader + QosOffset + SNAP_SIZE + sizeof(u16) + 2; */ -+ } -+ -+ TempBuf[TempLen - 1] = (u8)(DataLen & 0xff); -+ TempBuf[TempLen - 2] = (u8)((DataLen & 0xff00) >> 8); -+ TempBuf[TempLen - 4] = KeyIdx; -+ -+ WAPI_DATA(WAPI_TX, "CalculateMic - KEY", MicKey, 16); -+ WAPI_DATA(WAPI_TX, "CalculateMic - IV", IV, 16); -+ WAPI_DATA(WAPI_TX, "CalculateMic - TempBuf", TempBuf, TempLen); -+ WAPI_DATA(WAPI_TX, "CalculateMic - pData", pData, DataLen); -+ -+ WapiSMS4CalculateMic(MicKey, IV, TempBuf, TempLen, -+ pData, DataLen, MicBuffer, &MicLen); -+ -+ if (MicLen != 16) -+ WAPI_TRACE(WAPI_ERR, "%s: MIC Length Error!!\n", __FUNCTION__); -+ -+ WAPI_TRACE(WAPI_TX | WAPI_RX, "<=========%s\n", __FUNCTION__); -+#endif -+} -+ -+/* AddCount: 1 or 2. -+ * If overflow, return 1, -+ * else return 0. -+ */ -+u8 WapiIncreasePN(u8 *PN, u8 AddCount) -+{ -+ u8 i; -+ -+ if (NULL == PN) -+ return 1; -+ /* YJ,test,091102 */ -+ /* -+ if(AddCount == 2){ -+ RTW_INFO("############################%s(): PN[0]=0x%x\n", __FUNCTION__, PN[0]); -+ if(PN[0] == 0x48){ -+ PN[0] += AddCount; -+ return 1; -+ }else{ -+ PN[0] += AddCount; -+ return 0; -+ } -+ } -+ */ -+ /* YJ,test,091102,end */ -+ -+ for (i = 0; i < 16; i++) { -+ if (PN[i] + AddCount <= 0xff) { -+ PN[i] += AddCount; -+ return 0; -+ } else { -+ PN[i] += AddCount; -+ AddCount = 1; -+ } -+ } -+ return 1; -+} -+ -+ -+void WapiGetLastRxUnicastPNForQoSData( -+ u8 UserPriority, -+ PRT_WAPI_STA_INFO pWapiStaInfo, -+ u8 *PNOut -+) -+{ -+ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); -+ switch (UserPriority) { -+ case 0: -+ case 3: -+ memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNBEQueue, 16); -+ break; -+ case 1: -+ case 2: -+ memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNBKQueue, 16); -+ break; -+ case 4: -+ case 5: -+ memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNVIQueue, 16); -+ break; -+ case 6: -+ case 7: -+ memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNVOQueue, 16); -+ break; -+ default: -+ WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __FUNCTION__); -+ break; -+ } -+ WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__); -+} -+ -+ -+void WapiSetLastRxUnicastPNForQoSData( -+ u8 UserPriority, -+ u8 *PNIn, -+ PRT_WAPI_STA_INFO pWapiStaInfo -+) -+{ -+ WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__); -+ switch (UserPriority) { -+ case 0: -+ case 3: -+ memcpy(pWapiStaInfo->lastRxUnicastPNBEQueue, PNIn, 16); -+ break; -+ case 1: -+ case 2: -+ memcpy(pWapiStaInfo->lastRxUnicastPNBKQueue, PNIn, 16); -+ break; -+ case 4: -+ case 5: -+ memcpy(pWapiStaInfo->lastRxUnicastPNVIQueue, PNIn, 16); -+ break; -+ case 6: -+ case 7: -+ memcpy(pWapiStaInfo->lastRxUnicastPNVOQueue, PNIn, 16); -+ break; -+ default: -+ WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __FUNCTION__); -+ break; -+ } -+ WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__); -+} -+ -+ -+/**************************************************************************** -+ FALSE not RX-Reorder -+ TRUE do RX Reorder -+add to support WAPI to N-mode -+*****************************************************************************/ -+u8 WapiCheckPnInSwDecrypt( -+ _adapter *padapter, -+ struct sk_buff *pskb -+) -+{ -+ u8 ret = false; -+ -+#if 0 -+ struct ieee80211_hdr_3addr_qos *header; -+ u16 fc; -+ u8 *pDaddr, *pTaddr, *pRaddr; -+ -+ header = (struct ieee80211_hdr_3addr_qos *)pskb->data; -+ pTaddr = header->addr2; -+ pRaddr = header->addr1; -+ fc = le16_to_cpu(header->frame_ctl); -+ -+ if (GetToDs(&fc)) -+ pDaddr = header->addr3; -+ else -+ pDaddr = header->addr1; -+ -+ if ((_rtw_memcmp(pRaddr, padapter->pnetdev->dev_addr, ETH_ALEN) == 0) -+ && !(pDaddr) -+ && (GetFrameType(&fc) == WIFI_QOS_DATA_TYPE)) -+ /* && ieee->pHTInfo->bCurrentHTSupport && */ -+ /* ieee->pHTInfo->bCurRxReorderEnable) */ -+ ret = false; -+ else -+ ret = true; -+#endif -+ WAPI_TRACE(WAPI_RX, "%s: return %d\n", __FUNCTION__, ret); -+ return ret; -+} -+ -+int SecSMS4HeaderFillIV(_adapter *padapter, u8 *pxmitframe) -+{ -+ struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib; -+ u8 *frame = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET; -+ u8 *pSecHeader = NULL, *pos = NULL, *pRA = NULL; -+ u8 bPNOverflow = false, bFindMatchPeer = false, hdr_len = 0; -+ PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL; -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ int ret = 0; -+ -+ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); -+ -+ return ret; -+#if 0 -+ hdr_len = sMacHdrLng; -+ if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE) -+ hdr_len += 2; -+ /* hdr_len += SNAP_SIZE + sizeof(u16); */ -+ -+ pos = skb_push(pskb, padapter->wapiInfo.extra_prefix_len); -+ memmove(pos, pos + padapter->wapiInfo.extra_prefix_len, hdr_len); -+ -+ pSecHeader = pskb->data + hdr_len; -+ pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)pSecHeader; -+ pRA = pskb->data + 4; -+ -+ WAPI_DATA(WAPI_TX, "FillIV - Before Fill IV", pskb->data, pskb->len); -+ -+ /* Address 1 is always receiver's address */ -+ if (IS_MCAST(pRA)) { -+ if (!pWapiInfo->wapiTxMsk.bTxEnable) { -+ WAPI_TRACE(WAPI_ERR, "%s: bTxEnable = 0!!\n", __FUNCTION__); -+ return -2; -+ } -+ if (pWapiInfo->wapiTxMsk.keyId <= 1) { -+ pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId; -+ pWapiExt->Reserved = 0; -+ bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1); -+ memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16); -+ if (bPNOverflow) { -+ /* Update MSK Notification. */ -+ WAPI_TRACE(WAPI_ERR, "===============>%s():multicast PN overflow\n", __FUNCTION__); -+ rtw_wapi_app_event_handler(padapter, NULL, 0, pRA, false, false, true, 0, false); -+ } -+ } else { -+ WAPI_TRACE(WAPI_ERR, "%s: Invalid Wapi Multicast KeyIdx!!\n", __FUNCTION__); -+ ret = -3; -+ } -+ } else { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (!memcmp(pWapiSta->PeerMacAddr, pRA, 6)) { -+ bFindMatchPeer = true; -+ break; -+ } -+ } -+ if (bFindMatchPeer) { -+ if ((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)) { -+ WAPI_TRACE(WAPI_ERR, "%s: bTxEnable = 0!!\n", __FUNCTION__); -+ return -4; -+ } -+ if (pWapiSta->wapiUsk.keyId <= 1) { -+ if (pWapiSta->wapiUskUpdate.bTxEnable) -+ pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId; -+ else -+ pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId; -+ -+ pWapiExt->Reserved = 0; -+ bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2); -+ memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16); -+ if (bPNOverflow) { -+ /* Update USK Notification. */ -+ WAPI_TRACE(WAPI_ERR, "===============>%s():unicast PN overflow\n", __FUNCTION__); -+ rtw_wapi_app_event_handler(padapter, NULL, 0, pWapiSta->PeerMacAddr, false, true, false, 0, false); -+ } -+ } else { -+ WAPI_TRACE(WAPI_ERR, "%s: Invalid Wapi Unicast KeyIdx!!\n", __FUNCTION__); -+ ret = -5; -+ } -+ } else { -+ WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT"!!\n", __FUNCTION__, MAC_ARG(pRA)); -+ ret = -6; -+ } -+ } -+ -+ WAPI_DATA(WAPI_TX, "FillIV - After Fill IV", pskb->data, pskb->len); -+ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); -+ return ret; -+#endif -+} -+ -+/* WAPI SW Enc: must have done Coalesce! */ -+void SecSWSMS4Encryption( -+ _adapter *padapter, -+ u8 *pxmitframe -+) -+{ -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ u8 *pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_SIZE; -+ struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib; -+ -+ u8 *SecPtr = NULL, *pRA, *pMicKey = NULL, *pDataKey = NULL, *pIV = NULL; -+ u8 IVOffset, DataOffset, bFindMatchPeer = false, KeyIdx = 0, MicBuffer[16]; -+ u16 OutputLength; -+ -+ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); -+ -+ WAPI_TRACE(WAPI_TX, "hdrlen: %d\n", pattrib->hdrlen); -+ -+ return; -+ -+ DataOffset = pattrib->hdrlen + pattrib->iv_len; -+ -+ pRA = pframe + 4; -+ -+ -+ if (IS_MCAST(pRA)) { -+ KeyIdx = pWapiInfo->wapiTxMsk.keyId; -+ pIV = pWapiInfo->lastTxMulticastPN; -+ pMicKey = pWapiInfo->wapiTxMsk.micKey; -+ pDataKey = pWapiInfo->wapiTxMsk.dataKey; -+ } else { -+ if (!list_empty(&(pWapiInfo->wapiSTAUsedList))) { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (0 == memcmp(pWapiSta->PeerMacAddr, pRA, 6)) { -+ bFindMatchPeer = true; -+ break; -+ } -+ } -+ -+ if (bFindMatchPeer) { -+ if (pWapiSta->wapiUskUpdate.bTxEnable) { -+ KeyIdx = pWapiSta->wapiUskUpdate.keyId; -+ WAPI_TRACE(WAPI_TX, "%s(): Use update USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx); -+ pIV = pWapiSta->lastTxUnicastPN; -+ pMicKey = pWapiSta->wapiUskUpdate.micKey; -+ pDataKey = pWapiSta->wapiUskUpdate.dataKey; -+ } else { -+ KeyIdx = pWapiSta->wapiUsk.keyId; -+ WAPI_TRACE(WAPI_TX, "%s(): Use USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx); -+ pIV = pWapiSta->lastTxUnicastPN; -+ pMicKey = pWapiSta->wapiUsk.micKey; -+ pDataKey = pWapiSta->wapiUsk.dataKey; -+ } -+ } else { -+ WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta!!\n", __FUNCTION__); -+ return; -+ } -+ } else { -+ WAPI_TRACE(WAPI_ERR, "%s: wapiSTAUsedList is empty!!\n", __FUNCTION__); -+ return; -+ } -+ } -+ -+ SecPtr = pframe; -+ SecCalculateMicSMS4(KeyIdx, pMicKey, SecPtr, (SecPtr + DataOffset), pattrib->pktlen, MicBuffer); -+ -+ WAPI_DATA(WAPI_TX, "Encryption - MIC", MicBuffer, padapter->wapiInfo.extra_postfix_len); -+ -+ memcpy(pframe + pattrib->hdrlen + pattrib->iv_len + pattrib->pktlen - pattrib->icv_len, -+ (u8 *)MicBuffer, -+ padapter->wapiInfo.extra_postfix_len -+ ); -+ -+ -+ WapiSMS4Encryption(pDataKey, pIV, (SecPtr + DataOffset), pattrib->pktlen + pattrib->icv_len, (SecPtr + DataOffset), &OutputLength); -+ -+ WAPI_DATA(WAPI_TX, "Encryption - After SMS4 encryption", pframe, pattrib->hdrlen + pattrib->iv_len + pattrib->pktlen); -+ -+ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); -+} -+ -+u8 SecSWSMS4Decryption( -+ _adapter *padapter, -+ u8 *precv_frame, -+ struct recv_priv *precv_priv -+) -+{ -+ PRT_WAPI_T pWapiInfo = &padapter->wapiInfo; -+ struct recv_frame_hdr *precv_hdr; -+ PRT_WAPI_STA_INFO pWapiSta = NULL; -+ u8 IVOffset, DataOffset, bFindMatchPeer = false, bUseUpdatedKey = false; -+ u8 KeyIdx, MicBuffer[16], lastRxPNforQoS[16]; -+ u8 *pRA, *pTA, *pMicKey, *pDataKey, *pLastRxPN, *pRecvPN, *pSecData, *pRecvMic, *pos; -+ u8 TID = 0; -+ u16 OutputLength, DataLen; -+ u8 bQosData; -+ struct sk_buff *pskb; -+ -+ WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__); -+ -+ return 0; -+ -+ precv_hdr = &((union recv_frame *)precv_frame)->u.hdr; -+ pskb = (struct sk_buff *)(precv_hdr->rx_data); -+ precv_hdr->bWapiCheckPNInDecrypt = WapiCheckPnInSwDecrypt(padapter, pskb); -+ WAPI_TRACE(WAPI_RX, "=========>%s: check PN %d\n", __FUNCTION__, precv_hdr->bWapiCheckPNInDecrypt); -+ WAPI_DATA(WAPI_RX, "Decryption - Before decryption", pskb->data, pskb->len); -+ -+ IVOffset = sMacHdrLng; -+ bQosData = GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE; -+ if (bQosData) -+ IVOffset += 2; -+ -+ /* if(GetHTC()) */ -+ /* IVOffset += 4; */ -+ -+ /* IVOffset += SNAP_SIZE + sizeof(u16); */ -+ -+ DataOffset = IVOffset + padapter->wapiInfo.extra_prefix_len; -+ -+ pRA = pskb->data + 4; -+ pTA = pskb->data + 10; -+ KeyIdx = *(pskb->data + IVOffset); -+ pRecvPN = pskb->data + IVOffset + 2; -+ pSecData = pskb->data + DataOffset; -+ DataLen = pskb->len - DataOffset; -+ pRecvMic = pskb->data + pskb->len - padapter->wapiInfo.extra_postfix_len; -+ TID = GetTid(pskb->data); -+ -+ if (!list_empty(&(pWapiInfo->wapiSTAUsedList))) { -+ list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) { -+ if (0 == memcmp(pWapiSta->PeerMacAddr, pTA, 6)) { -+ bFindMatchPeer = true; -+ break; -+ } -+ } -+ } -+ -+ if (!bFindMatchPeer) { -+ WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT" for Key Info!!!\n", __FUNCTION__, MAC_ARG(pTA)); -+ return false; -+ } -+ -+ if (IS_MCAST(pRA)) { -+ WAPI_TRACE(WAPI_RX, "%s: Multicast decryption !!!\n", __FUNCTION__); -+ if (pWapiSta->wapiMsk.keyId == KeyIdx && pWapiSta->wapiMsk.bSet) { -+ pLastRxPN = pWapiSta->lastRxMulticastPN; -+ if (!WapiComparePN(pRecvPN, pLastRxPN)) { -+ WAPI_TRACE(WAPI_ERR, "%s: MSK PN is not larger than last, Dropped!!!\n", __FUNCTION__); -+ WAPI_DATA(WAPI_ERR, "pRecvPN:", pRecvPN, 16); -+ WAPI_DATA(WAPI_ERR, "pLastRxPN:", pLastRxPN, 16); -+ return false; -+ } -+ -+ memcpy(pLastRxPN, pRecvPN, 16); -+ pMicKey = pWapiSta->wapiMsk.micKey; -+ pDataKey = pWapiSta->wapiMsk.dataKey; -+ } else if (pWapiSta->wapiMskUpdate.keyId == KeyIdx && pWapiSta->wapiMskUpdate.bSet) { -+ WAPI_TRACE(WAPI_RX, "%s: Use Updated MSK for Decryption !!!\n", __FUNCTION__); -+ bUseUpdatedKey = true; -+ memcpy(pWapiSta->lastRxMulticastPN, pRecvPN, 16); -+ pMicKey = pWapiSta->wapiMskUpdate.micKey; -+ pDataKey = pWapiSta->wapiMskUpdate.dataKey; -+ } else { -+ WAPI_TRACE(WAPI_ERR, "%s: Can not find MSK with matched KeyIdx(%d), Dropped !!!\n", __FUNCTION__, KeyIdx); -+ return false; -+ } -+ } else { -+ WAPI_TRACE(WAPI_RX, "%s: Unicast decryption !!!\n", __FUNCTION__); -+ if (pWapiSta->wapiUsk.keyId == KeyIdx && pWapiSta->wapiUsk.bSet) { -+ WAPI_TRACE(WAPI_RX, "%s: Use USK for Decryption!!!\n", __FUNCTION__); -+ if (precv_hdr->bWapiCheckPNInDecrypt) { -+ if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE) { -+ WapiGetLastRxUnicastPNForQoSData(TID, pWapiSta, lastRxPNforQoS); -+ pLastRxPN = lastRxPNforQoS; -+ } else -+ pLastRxPN = pWapiSta->lastRxUnicastPN; -+ if (!WapiComparePN(pRecvPN, pLastRxPN)) -+ return false; -+ if (bQosData) -+ WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta); -+ else -+ memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16); -+ } else -+ memcpy(precv_hdr->WapiTempPN, pRecvPN, 16); -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE)) { -+ if ((pRecvPN[0] & 0x1) == 0) { -+ WAPI_TRACE(WAPI_ERR, "%s: Rx USK PN is not odd when Infra STA mode, Dropped !!!\n", __FUNCTION__); -+ return false; -+ } -+ } -+ -+ pMicKey = pWapiSta->wapiUsk.micKey; -+ pDataKey = pWapiSta->wapiUsk.dataKey; -+ } else if (pWapiSta->wapiUskUpdate.keyId == KeyIdx && pWapiSta->wapiUskUpdate.bSet) { -+ WAPI_TRACE(WAPI_RX, "%s: Use Updated USK for Decryption!!!\n", __FUNCTION__); -+ if (pWapiSta->bAuthenticatorInUpdata) -+ bUseUpdatedKey = true; -+ else -+ bUseUpdatedKey = false; -+ -+ if (bQosData) -+ WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta); -+ else -+ memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16); -+ pMicKey = pWapiSta->wapiUskUpdate.micKey; -+ pDataKey = pWapiSta->wapiUskUpdate.dataKey; -+ } else { -+ WAPI_TRACE(WAPI_ERR, "%s: No valid USK!!!KeyIdx=%d pWapiSta->wapiUsk.keyId=%d pWapiSta->wapiUskUpdate.keyId=%d\n", __FUNCTION__, KeyIdx, pWapiSta->wapiUsk.keyId, -+ pWapiSta->wapiUskUpdate.keyId); -+ /* dump_buf(pskb->data,pskb->len); */ -+ return false; -+ } -+ } -+ -+ WAPI_DATA(WAPI_RX, "Decryption - DataKey", pDataKey, 16); -+ WAPI_DATA(WAPI_RX, "Decryption - IV", pRecvPN, 16); -+ WapiSMS4Decryption(pDataKey, pRecvPN, pSecData, DataLen, pSecData, &OutputLength); -+ -+ if (OutputLength != DataLen) -+ WAPI_TRACE(WAPI_ERR, "%s: Output Length Error!!!!\n", __FUNCTION__); -+ -+ WAPI_DATA(WAPI_RX, "Decryption - After decryption", pskb->data, pskb->len); -+ -+ DataLen -= padapter->wapiInfo.extra_postfix_len; -+ -+ SecCalculateMicSMS4(KeyIdx, pMicKey, pskb->data, pSecData, DataLen, MicBuffer); -+ -+ WAPI_DATA(WAPI_RX, "Decryption - MIC received", pRecvMic, SMS4_MIC_LEN); -+ WAPI_DATA(WAPI_RX, "Decryption - MIC calculated", MicBuffer, SMS4_MIC_LEN); -+ -+ if (0 == memcmp(MicBuffer, pRecvMic, padapter->wapiInfo.extra_postfix_len)) { -+ WAPI_TRACE(WAPI_RX, "%s: Check MIC OK!!\n", __FUNCTION__); -+ if (bUseUpdatedKey) { -+ /* delete the old key */ -+ if (IS_MCAST(pRA)) { -+ WAPI_TRACE(WAPI_API, "%s(): AE use new update MSK!!\n", __FUNCTION__); -+ pWapiSta->wapiMsk.keyId = pWapiSta->wapiMskUpdate.keyId; -+ memcpy(pWapiSta->wapiMsk.dataKey, pWapiSta->wapiMskUpdate.dataKey, 16); -+ memcpy(pWapiSta->wapiMsk.micKey, pWapiSta->wapiMskUpdate.micKey, 16); -+ pWapiSta->wapiMskUpdate.bTxEnable = pWapiSta->wapiMskUpdate.bSet = false; -+ } else { -+ WAPI_TRACE(WAPI_API, "%s(): AE use new update USK!!\n", __FUNCTION__); -+ pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId; -+ memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16); -+ memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16); -+ pWapiSta->wapiUskUpdate.bTxEnable = pWapiSta->wapiUskUpdate.bSet = false; -+ } -+ } -+ } else { -+ WAPI_TRACE(WAPI_ERR, "%s: Check MIC Error, Dropped !!!!\n", __FUNCTION__); -+ return false; -+ } -+ -+ pos = pskb->data; -+ memmove(pos + padapter->wapiInfo.extra_prefix_len, pos, IVOffset); -+ skb_pull(pskb, padapter->wapiInfo.extra_prefix_len); -+ -+ WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__); -+ -+ return true; -+} -+ -+u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe) -+{ -+ -+ u8 *pframe; -+ u32 res = _SUCCESS; -+ -+ WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) { -+ WAPI_TRACE(WAPI_TX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+ if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL) -+ return _FAIL; -+ -+ pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET; -+ -+ SecSWSMS4Encryption(padapter, pxmitframe); -+ -+ WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__); -+ return res; -+} -+ -+u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe) -+{ -+ u8 *pframe; -+ u32 res = _SUCCESS; -+ -+ WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__); -+ -+ if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) { -+ WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+ -+ /* drop packet when hw decrypt fail -+ * return tempraily */ -+ return _FAIL; -+ -+ /* pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; */ -+ -+ if (false == SecSWSMS4Decryption(padapter, precvframe, &padapter->recvpriv)) { -+ WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+ WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__); -+ return res; -+} -+ -+#else -+ -+u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe) -+{ -+ WAPI_TRACE(WAPI_TX, "=========>Dummy %s\n", __FUNCTION__); -+ WAPI_TRACE(WAPI_TX, "<=========Dummy %s\n", __FUNCTION__); -+ return _SUCCESS; -+} -+ -+u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe) -+{ -+ WAPI_TRACE(WAPI_RX, "=========>Dummy %s\n", __FUNCTION__); -+ WAPI_TRACE(WAPI_RX, "<=========Dummy %s\n", __FUNCTION__); -+ return _SUCCESS; -+} -+ -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/core/rtw_wlan_util.c b/drivers/staging/rtl8723cs/core/rtw_wlan_util.c -new file mode 100644 -index 000000000000..59e9c8680460 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_wlan_util.c -@@ -0,0 +1,5662 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_WLAN_UTIL_C_ -+ -+#include -+#include -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ #include -+ #define ETH_TYPE_OFFSET 12 -+ #define PROTOCOL_OFFSET 23 -+ #define IP_OFFSET 30 -+ #define IPv6_OFFSET 38 -+ #define IPv6_PROTOCOL_OFFSET 20 -+#endif -+ -+unsigned char ARTHEROS_OUI1[] = {0x00, 0x03, 0x7f}; -+unsigned char ARTHEROS_OUI2[] = {0x00, 0x13, 0x74}; -+ -+unsigned char BROADCOM_OUI1[] = {0x00, 0x10, 0x18}; -+unsigned char BROADCOM_OUI2[] = {0x00, 0x0a, 0xf7}; -+unsigned char BROADCOM_OUI3[] = {0x00, 0x05, 0xb5}; -+ -+ -+unsigned char CISCO_OUI[] = {0x00, 0x40, 0x96}; -+unsigned char MARVELL_OUI[] = {0x00, 0x50, 0x43}; -+unsigned char RALINK_OUI[] = {0x00, 0x0c, 0x43}; -+unsigned char REALTEK_OUI[] = {0x00, 0xe0, 0x4c}; -+unsigned char AIRGOCAP_OUI[] = {0x00, 0x0a, 0xf5}; -+ -+unsigned char REALTEK_96B_IE[] = {0x00, 0xe0, 0x4c, 0x02, 0x01, 0x20}; -+ -+extern unsigned char RTW_WPA_OUI[]; -+extern unsigned char WPA_TKIP_CIPHER[4]; -+extern unsigned char RSN_TKIP_CIPHER[4]; -+ -+#define R2T_PHY_DELAY (0) -+ -+/* #define WAIT_FOR_BCN_TO_MIN (3000) */ -+#define WAIT_FOR_BCN_TO_MIN (6000) -+#define WAIT_FOR_BCN_TO_MAX (20000) -+ -+static u8 rtw_basic_rate_cck[4] = { -+ IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK, -+ IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK -+}; -+ -+static u8 rtw_basic_rate_ofdm[3] = { -+ IEEE80211_OFDM_RATE_6MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_12MB | IEEE80211_BASIC_RATE_MASK, -+ IEEE80211_OFDM_RATE_24MB | IEEE80211_BASIC_RATE_MASK -+}; -+ -+static u8 rtw_basic_rate_mix[7] = { -+ IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK, -+ IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK, -+ IEEE80211_OFDM_RATE_6MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_12MB | IEEE80211_BASIC_RATE_MASK, -+ IEEE80211_OFDM_RATE_24MB | IEEE80211_BASIC_RATE_MASK -+}; -+ -+extern u8 WIFI_CCKRATES[]; -+bool rtw_is_cck_rate(u8 rate) -+{ -+ int i; -+ -+ for (i = 0; i < 4; i++) -+ if ((WIFI_CCKRATES[i] & 0x7F) == (rate & 0x7F)) -+ return 1; -+ return 0; -+} -+ -+extern u8 WIFI_OFDMRATES[]; -+bool rtw_is_ofdm_rate(u8 rate) -+{ -+ int i; -+ -+ for (i = 0; i < 8; i++) -+ if ((WIFI_OFDMRATES[i] & 0x7F) == (rate & 0x7F)) -+ return 1; -+ return 0; -+} -+ -+/* test if rate is defined in rtw_basic_rate_cck */ -+bool rtw_is_basic_rate_cck(u8 rate) -+{ -+ int i; -+ -+ for (i = 0; i < 4; i++) -+ if ((rtw_basic_rate_cck[i] & 0x7F) == (rate & 0x7F)) -+ return 1; -+ return 0; -+} -+ -+/* test if rate is defined in rtw_basic_rate_ofdm */ -+bool rtw_is_basic_rate_ofdm(u8 rate) -+{ -+ int i; -+ -+ for (i = 0; i < 3; i++) -+ if ((rtw_basic_rate_ofdm[i] & 0x7F) == (rate & 0x7F)) -+ return 1; -+ return 0; -+} -+ -+/* test if rate is defined in rtw_basic_rate_mix */ -+bool rtw_is_basic_rate_mix(u8 rate) -+{ -+ int i; -+ -+ for (i = 0; i < 7; i++) -+ if ((rtw_basic_rate_mix[i] & 0x7F) == (rate & 0x7F)) -+ return 1; -+ return 0; -+} -+#ifdef CONFIG_BCN_CNT_CONFIRM_HDL -+int new_bcn_max = 3; -+#endif -+int cckrates_included(unsigned char *rate, int ratelen) -+{ -+ int i; -+ -+ for (i = 0; i < ratelen; i++) { -+ if ((((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || -+ (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22)) -+ return _TRUE; -+ } -+ -+ return _FALSE; -+ -+} -+ -+int cckratesonly_included(unsigned char *rate, int ratelen) -+{ -+ int i; -+ -+ for (i = 0; i < ratelen; i++) { -+ if ((((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && -+ (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22)) -+ return _FALSE; -+ } -+ -+ return _TRUE; -+} -+ -+s8 rtw_get_sta_rx_nss(_adapter *adapter, struct sta_info *psta) -+{ -+ s8 nss = 1; -+ -+ if (!psta) -+ return nss; -+ -+ nss = GET_HAL_RX_NSS(adapter); -+ -+#ifdef CONFIG_80211N_HT -+ #ifdef CONFIG_80211AC_VHT -+ if (psta->vhtpriv.vht_option) -+ nss = rtw_min(nss, rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map)); -+ else -+ #endif /* CONFIG_80211AC_VHT */ -+ if (psta->htpriv.ht_option) -+ nss = rtw_min(nss, rtw_ht_mcsset_to_nss(psta->htpriv.ht_cap.supp_mcs_set)); -+#endif /*CONFIG_80211N_HT*/ -+ RTW_INFO("%s: %d ss\n", __func__, nss); -+ return nss; -+} -+ -+s8 rtw_get_sta_tx_nss(_adapter *adapter, struct sta_info *psta) -+{ -+ s8 nss = 1; -+ -+ if (!psta) -+ return nss; -+ -+ nss = GET_HAL_TX_NSS(adapter); -+ -+#ifdef CONFIG_80211N_HT -+ #ifdef CONFIG_80211AC_VHT -+ if (psta->vhtpriv.vht_option) -+ nss = rtw_min(nss, rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map)); -+ else -+ #endif /* CONFIG_80211AC_VHT */ -+ if (psta->htpriv.ht_option) -+ nss = rtw_min(nss, rtw_ht_mcsset_to_nss(psta->htpriv.ht_cap.supp_mcs_set)); -+#endif /*CONFIG_80211N_HT*/ -+ RTW_INFO("%s: %d SS\n", __func__, nss); -+ return nss; -+} -+ -+u8 judge_network_type(_adapter *padapter, unsigned char *rate, int ratelen) -+{ -+ u8 network_type = 0; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ -+ if (pmlmeext->cur_channel > 14) { -+ if (pmlmeinfo->VHT_enable) -+ network_type = WIRELESS_11AC; -+ else if (pmlmeinfo->HT_enable) -+ network_type = WIRELESS_11_5N; -+ -+ network_type |= WIRELESS_11A; -+ } else { -+ if (pmlmeinfo->HT_enable) -+ network_type = WIRELESS_11_24N; -+ -+ if ((cckratesonly_included(rate, ratelen)) == _TRUE) -+ network_type |= WIRELESS_11B; -+ else if ((cckrates_included(rate, ratelen)) == _TRUE) -+ network_type |= WIRELESS_11BG; -+ else -+ network_type |= WIRELESS_11G; -+ } -+ -+ return network_type; -+} -+ -+unsigned char ratetbl_val_2wifirate(unsigned char rate); -+unsigned char ratetbl_val_2wifirate(unsigned char rate) -+{ -+ unsigned char val = 0; -+ -+ switch (rate & 0x7f) { -+ case 0: -+ val = IEEE80211_CCK_RATE_1MB; -+ break; -+ -+ case 1: -+ val = IEEE80211_CCK_RATE_2MB; -+ break; -+ -+ case 2: -+ val = IEEE80211_CCK_RATE_5MB; -+ break; -+ -+ case 3: -+ val = IEEE80211_CCK_RATE_11MB; -+ break; -+ -+ case 4: -+ val = IEEE80211_OFDM_RATE_6MB; -+ break; -+ -+ case 5: -+ val = IEEE80211_OFDM_RATE_9MB; -+ break; -+ -+ case 6: -+ val = IEEE80211_OFDM_RATE_12MB; -+ break; -+ -+ case 7: -+ val = IEEE80211_OFDM_RATE_18MB; -+ break; -+ -+ case 8: -+ val = IEEE80211_OFDM_RATE_24MB; -+ break; -+ -+ case 9: -+ val = IEEE80211_OFDM_RATE_36MB; -+ break; -+ -+ case 10: -+ val = IEEE80211_OFDM_RATE_48MB; -+ break; -+ -+ case 11: -+ val = IEEE80211_OFDM_RATE_54MB; -+ break; -+ -+ } -+ -+ return val; -+ -+} -+ -+int is_basicrate(_adapter *padapter, unsigned char rate); -+int is_basicrate(_adapter *padapter, unsigned char rate) -+{ -+ int i; -+ unsigned char val; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ for (i = 0; i < NumRates; i++) { -+ val = pmlmeext->basicrate[i]; -+ -+ if ((val != 0xff) && (val != 0xfe)) { -+ if (rate == ratetbl_val_2wifirate(val)) -+ return _TRUE; -+ } -+ } -+ -+ return _FALSE; -+} -+ -+unsigned int ratetbl2rateset(_adapter *padapter, unsigned char *rateset); -+unsigned int ratetbl2rateset(_adapter *padapter, unsigned char *rateset) -+{ -+ int i; -+ unsigned char rate; -+ unsigned int len = 0; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ for (i = 0; i < NumRates; i++) { -+ rate = pmlmeext->datarate[i]; -+ -+ if (rtw_get_oper_ch(padapter) > 14 && rate < _6M_RATE_) /*5G no support CCK rate*/ -+ continue; -+ -+ switch (rate) { -+ case 0xff: -+ return len; -+ -+ case 0xfe: -+ continue; -+ -+ default: -+ rate = ratetbl_val_2wifirate(rate); -+ -+ if (is_basicrate(padapter, rate) == _TRUE) -+ rate |= IEEE80211_BASIC_RATE_MASK; -+ -+ rateset[len] = rate; -+ len++; -+ break; -+ } -+ } -+ return len; -+} -+ -+void get_rate_set(_adapter *padapter, unsigned char *pbssrate, int *bssrate_len) -+{ -+ unsigned char supportedrates[NumRates]; -+ -+ _rtw_memset(supportedrates, 0, NumRates); -+ *bssrate_len = ratetbl2rateset(padapter, supportedrates); -+ _rtw_memcpy(pbssrate, supportedrates, *bssrate_len); -+} -+ -+void set_mcs_rate_by_mask(u8 *mcs_set, u32 mask) -+{ -+ u8 mcs_rate_1r = (u8)(mask & 0xff); -+ u8 mcs_rate_2r = (u8)((mask >> 8) & 0xff); -+ u8 mcs_rate_3r = (u8)((mask >> 16) & 0xff); -+ u8 mcs_rate_4r = (u8)((mask >> 24) & 0xff); -+ -+ mcs_set[0] &= mcs_rate_1r; -+ mcs_set[1] &= mcs_rate_2r; -+ mcs_set[2] &= mcs_rate_3r; -+ mcs_set[3] &= mcs_rate_4r; -+} -+ -+void UpdateBrateTbl( -+ PADAPTER Adapter, -+ u8 *mBratesOS -+) -+{ -+ u8 i; -+ u8 rate; -+ -+ /* 1M, 2M, 5.5M, 11M, 6M, 12M, 24M are mandatory. */ -+ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { -+ rate = mBratesOS[i] & 0x7f; -+ switch (rate) { -+ case IEEE80211_CCK_RATE_1MB: -+ case IEEE80211_CCK_RATE_2MB: -+ case IEEE80211_CCK_RATE_5MB: -+ case IEEE80211_CCK_RATE_11MB: -+ case IEEE80211_OFDM_RATE_6MB: -+ case IEEE80211_OFDM_RATE_12MB: -+ case IEEE80211_OFDM_RATE_24MB: -+ mBratesOS[i] |= IEEE80211_BASIC_RATE_MASK; -+ break; -+ } -+ } -+ -+} -+ -+void UpdateBrateTblForSoftAP(u8 *bssrateset, u32 bssratelen) -+{ -+ u8 i; -+ u8 rate; -+ -+ for (i = 0; i < bssratelen; i++) { -+ rate = bssrateset[i] & 0x7f; -+ switch (rate) { -+ case IEEE80211_CCK_RATE_1MB: -+ case IEEE80211_CCK_RATE_2MB: -+ case IEEE80211_CCK_RATE_5MB: -+ case IEEE80211_CCK_RATE_11MB: -+ bssrateset[i] |= IEEE80211_BASIC_RATE_MASK; -+ break; -+ } -+ } -+ -+} -+void Set_MSR(_adapter *padapter, u8 type) -+{ -+ rtw_hal_set_hwreg(padapter, HW_VAR_MEDIA_STATUS, (u8 *)(&type)); -+} -+ -+inline u8 rtw_get_oper_ch(_adapter *adapter) -+{ -+ return adapter_to_dvobj(adapter)->oper_channel; -+} -+ -+inline void rtw_set_oper_ch(_adapter *adapter, u8 ch) -+{ -+#ifdef DBG_CH_SWITCH -+ const int len = 128; -+ char msg[128] = {0}; -+ int cnt = 0; -+ int i = 0; -+#endif /* DBG_CH_SWITCH */ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ if (dvobj->oper_channel != ch) { -+ dvobj->on_oper_ch_time = rtw_get_current_time(); -+ -+#ifdef DBG_CH_SWITCH -+ cnt += snprintf(msg + cnt, len - cnt, "switch to ch %3u", ch); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ _adapter *iface = dvobj->padapters[i]; -+ cnt += snprintf(msg + cnt, len - cnt, " ["ADPT_FMT":", ADPT_ARG(iface)); -+ if (iface->mlmeextpriv.cur_channel == ch) -+ cnt += snprintf(msg + cnt, len - cnt, "C"); -+ else -+ cnt += snprintf(msg + cnt, len - cnt, "_"); -+ if (iface->wdinfo.listen_channel == ch && !rtw_p2p_chk_state(&iface->wdinfo, P2P_STATE_NONE)) -+ cnt += snprintf(msg + cnt, len - cnt, "L"); -+ else -+ cnt += snprintf(msg + cnt, len - cnt, "_"); -+ cnt += snprintf(msg + cnt, len - cnt, "]"); -+ } -+ -+ RTW_INFO(FUNC_ADPT_FMT" %s\n", FUNC_ADPT_ARG(adapter), msg); -+#endif /* DBG_CH_SWITCH */ -+ } -+ -+ dvobj->oper_channel = ch; -+} -+ -+inline u8 rtw_get_oper_bw(_adapter *adapter) -+{ -+ return adapter_to_dvobj(adapter)->oper_bwmode; -+} -+ -+inline void rtw_set_oper_bw(_adapter *adapter, u8 bw) -+{ -+ adapter_to_dvobj(adapter)->oper_bwmode = bw; -+} -+ -+inline u8 rtw_get_oper_choffset(_adapter *adapter) -+{ -+ return adapter_to_dvobj(adapter)->oper_ch_offset; -+} -+ -+inline void rtw_set_oper_choffset(_adapter *adapter, u8 offset) -+{ -+ adapter_to_dvobj(adapter)->oper_ch_offset = offset; -+} -+ -+inline systime rtw_get_on_oper_ch_time(_adapter *adapter) -+{ -+ return adapter_to_dvobj(adapter)->on_oper_ch_time; -+} -+ -+inline systime rtw_get_on_cur_ch_time(_adapter *adapter) -+{ -+ if (adapter->mlmeextpriv.cur_channel == adapter_to_dvobj(adapter)->oper_channel) -+ return adapter_to_dvobj(adapter)->on_oper_ch_time; -+ else -+ return 0; -+} -+ -+void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode) -+{ -+ u8 center_ch, chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+#if (defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)) || defined(CONFIG_MCC_MODE) -+ u8 iqk_info_backup = _FALSE; -+#endif -+ -+ if (padapter->bNotifyChannelChange) -+ RTW_INFO("[%s] ch = %d, offset = %d, bwmode = %d\n", __FUNCTION__, channel, channel_offset, bwmode); -+ -+ center_ch = rtw_get_center_ch(channel, bwmode, channel_offset); -+ -+ if (bwmode == CHANNEL_WIDTH_80) { -+ if (center_ch > channel) -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_LOWER; -+ else if (center_ch < channel) -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_UPPER; -+ else -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) { -+ /* driver doesn't set channel setting reg under MCC */ -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) -+ RTW_INFO("Warning: Do not set channel setting reg MCC mode\n"); -+ } -+#endif -+ -+#ifdef CONFIG_DFS_MASTER -+ { -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ bool ori_overlap_radar_detect_ch = rtw_rfctl_overlap_radar_detect_ch(rfctl); -+ bool new_overlap_radar_detect_ch = _rtw_rfctl_overlap_radar_detect_ch(rfctl, channel, bwmode, channel_offset); -+ -+ if (new_overlap_radar_detect_ch && IS_CH_WAITING(rfctl)) { -+ u8 pause = 0xFF; -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &pause); -+ } -+#endif /* CONFIG_DFS_MASTER */ -+ -+ /* set Channel */ -+ /* saved channel/bw info */ -+ rtw_set_oper_ch(padapter, channel); -+ rtw_set_oper_bw(padapter, bwmode); -+ rtw_set_oper_choffset(padapter, channel_offset); -+ -+#if (defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)) || defined(CONFIG_MCC_MODE) -+ /* To check if we need to backup iqk info after switch chnl & bw */ -+ { -+ u8 take_care_iqk, do_iqk; -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk); -+ rtw_hal_get_hwreg(padapter, HW_VAR_DO_IQK, &do_iqk); -+ if ((take_care_iqk == _TRUE) && (do_iqk == _TRUE)) -+ iqk_info_backup = _TRUE; -+ } -+#endif -+ -+ rtw_hal_set_chnl_bw(padapter, center_ch, bwmode, channel_offset, chnl_offset80); /* set center channel */ -+ -+#if (defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)) || defined(CONFIG_MCC_MODE) -+ if (iqk_info_backup == _TRUE) -+ rtw_hal_ch_sw_iqk_info_backup(padapter); -+#endif -+ -+#ifdef CONFIG_DFS_MASTER -+ if (new_overlap_radar_detect_ch) -+ rtw_odm_radar_detect_enable(padapter); -+ else if (ori_overlap_radar_detect_ch) { -+ u8 pause = 0x00; -+ -+ rtw_odm_radar_detect_disable(padapter); -+ rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &pause); -+ } -+ } -+#endif /* CONFIG_DFS_MASTER */ -+ -+ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); -+} -+ -+__inline u8 *get_my_bssid(WLAN_BSSID_EX *pnetwork) -+{ -+ return pnetwork->MacAddress; -+} -+ -+u16 get_beacon_interval(WLAN_BSSID_EX *bss) -+{ -+ unsigned short val; -+ _rtw_memcpy((unsigned char *)&val, rtw_get_beacon_interval_from_ie(bss->IEs), 2); -+ -+ return le16_to_cpu(val); -+ -+} -+ -+int is_client_associated_to_ap(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext; -+ struct mlme_ext_info *pmlmeinfo; -+ -+ if (!padapter) -+ return _FAIL; -+ -+ pmlmeext = &padapter->mlmeextpriv; -+ pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE)) -+ return _TRUE; -+ else -+ return _FAIL; -+} -+ -+int is_client_associated_to_ibss(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) -+ return _TRUE; -+ else -+ return _FAIL; -+} -+ -+int is_IBSS_empty(_adapter *padapter) -+{ -+ int i; -+ struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl; -+ -+ for (i = 0; i < macid_ctl->num; i++) { -+ if (!rtw_macid_is_used(macid_ctl, i)) -+ continue; -+ if (!rtw_macid_is_iface_specific(macid_ctl, i, padapter)) -+ continue; -+ if (!GET_H2CCMD_MSRRPT_PARM_OPMODE(&macid_ctl->h2c_msr[i])) -+ continue; -+ if (GET_H2CCMD_MSRRPT_PARM_ROLE(&macid_ctl->h2c_msr[i]) == H2C_MSR_ROLE_ADHOC) -+ return _FAIL; -+ } -+ -+ return _TRUE; -+} -+ -+unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval) -+{ -+ if ((bcn_interval << 2) < WAIT_FOR_BCN_TO_MIN) -+ return WAIT_FOR_BCN_TO_MIN; -+ else if ((bcn_interval << 2) > WAIT_FOR_BCN_TO_MAX) -+ return WAIT_FOR_BCN_TO_MAX; -+ else -+ return bcn_interval << 2; -+} -+ -+void invalidate_cam_all(_adapter *padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ u8 bmc_id = rtw_iface_bcmc_id_get(padapter); -+ _irqL irqL; -+ u8 val8 = 0; -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, &val8); -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ -+ rtw_sec_cam_map_clr_all(&cam_ctl->used); -+ -+#ifndef SEC_DEFAULT_KEY_SEARCH -+ /* for BMC data TX with force camid */ -+ if (bmc_id != INVALID_SEC_MAC_CAM_ID) { -+ rtw_sec_cam_map_set(&cam_ctl->used, bmc_id); -+ if (_rtw_camctl_chk_cap(padapter, SEC_CAP_CHK_EXTRA_SEC)) -+ rtw_sec_cam_map_set(&cam_ctl->used, bmc_id + 1); -+ } -+#endif -+ -+ _rtw_memset(dvobj->cam_cache, 0, sizeof(struct sec_cam_ent) * SEC_CAM_ENT_NUM_SW_LIMIT); -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ -+#ifdef SEC_DEFAULT_KEY_SEARCH//!BMC TX force camid -+ /* clear default key related key search setting */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8 *)_FALSE); -+#endif -+} -+ -+void _clear_cam_entry(_adapter *padapter, u8 entry) -+{ -+ unsigned char null_sta[6] = {0}; -+ unsigned char null_key[32] = {0}; -+ -+ rtw_sec_write_cam_ent(padapter, entry, 0, null_sta, null_key); -+} -+ -+inline void _write_cam(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) -+{ -+#ifdef CONFIG_WRITE_CACHE_ONLY -+ write_cam_cache(adapter, id , ctrl, mac, key); -+#else -+ rtw_sec_write_cam_ent(adapter, id, ctrl, mac, key); -+ write_cam_cache(adapter, id , ctrl, mac, key); -+#endif -+} -+ -+inline void write_cam(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) -+{ -+ if (ctrl & BIT(9)) { -+ _write_cam(adapter, id, ctrl, mac, key); -+ _write_cam(adapter, (id + 1), ctrl | BIT(5), mac, (key + 16)); -+ RTW_INFO_DUMP("key-0: ", key, 16); -+ RTW_INFO_DUMP("key-1: ", (key + 16), 16); -+ } else -+ _write_cam(adapter, id, ctrl, mac, key); -+} -+ -+inline void clear_cam_entry(_adapter *adapter, u8 id) -+{ -+ _clear_cam_entry(adapter, id); -+ clear_cam_cache(adapter, id); -+} -+ -+inline void write_cam_from_cache(_adapter *adapter, u8 id) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ struct sec_cam_ent cache; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ _rtw_memcpy(&cache, &dvobj->cam_cache[id], sizeof(struct sec_cam_ent)); -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ -+ rtw_sec_write_cam_ent(adapter, id, cache.ctrl, cache.mac, cache.key); -+} -+void write_cam_cache(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ -+ dvobj->cam_cache[id].ctrl = ctrl; -+ _rtw_memcpy(dvobj->cam_cache[id].mac, mac, ETH_ALEN); -+ _rtw_memcpy(dvobj->cam_cache[id].key, key, 16); -+ -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+} -+ -+void clear_cam_cache(_adapter *adapter, u8 id) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ -+ _rtw_memset(&(dvobj->cam_cache[id]), 0, sizeof(struct sec_cam_ent)); -+ -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+} -+ -+inline bool _rtw_camctl_chk_cap(_adapter *adapter, u8 cap) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ -+ if (cam_ctl->sec_cap & cap) -+ return _TRUE; -+ return _FALSE; -+} -+ -+inline void _rtw_camctl_set_flags(_adapter *adapter, u32 flags) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ -+ cam_ctl->flags |= flags; -+} -+ -+inline void rtw_camctl_set_flags(_adapter *adapter, u32 flags) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ _rtw_camctl_set_flags(adapter, flags); -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+} -+ -+inline void _rtw_camctl_clr_flags(_adapter *adapter, u32 flags) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ -+ cam_ctl->flags &= ~flags; -+} -+ -+inline void rtw_camctl_clr_flags(_adapter *adapter, u32 flags) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ _rtw_camctl_clr_flags(adapter, flags); -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+} -+ -+inline bool _rtw_camctl_chk_flags(_adapter *adapter, u32 flags) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ -+ if (cam_ctl->flags & flags) -+ return _TRUE; -+ return _FALSE; -+} -+ -+void dump_sec_cam_map(void *sel, struct sec_cam_bmp *map, u8 max_num) -+{ -+ RTW_PRINT_SEL(sel, "0x%08x\n", map->m0); -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) -+ if (max_num && max_num > 32) -+ RTW_PRINT_SEL(sel, "0x%08x\n", map->m1); -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) -+ if (max_num && max_num > 64) -+ RTW_PRINT_SEL(sel, "0x%08x\n", map->m2); -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) -+ if (max_num && max_num > 96) -+ RTW_PRINT_SEL(sel, "0x%08x\n", map->m3); -+#endif -+} -+ -+inline bool rtw_sec_camid_is_set(struct sec_cam_bmp *map, u8 id) -+{ -+ if (id < 32) -+ return map->m0 & BIT(id); -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) -+ else if (id < 64) -+ return map->m1 & BIT(id - 32); -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) -+ else if (id < 96) -+ return map->m2 & BIT(id - 64); -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) -+ else if (id < 128) -+ return map->m3 & BIT(id - 96); -+#endif -+ else -+ rtw_warn_on(1); -+ -+ return 0; -+} -+ -+inline void rtw_sec_cam_map_set(struct sec_cam_bmp *map, u8 id) -+{ -+ if (id < 32) -+ map->m0 |= BIT(id); -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) -+ else if (id < 64) -+ map->m1 |= BIT(id - 32); -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) -+ else if (id < 96) -+ map->m2 |= BIT(id - 64); -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) -+ else if (id < 128) -+ map->m3 |= BIT(id - 96); -+#endif -+ else -+ rtw_warn_on(1); -+} -+ -+inline void rtw_sec_cam_map_clr(struct sec_cam_bmp *map, u8 id) -+{ -+ if (id < 32) -+ map->m0 &= ~BIT(id); -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) -+ else if (id < 64) -+ map->m1 &= ~BIT(id - 32); -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) -+ else if (id < 96) -+ map->m2 &= ~BIT(id - 64); -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) -+ else if (id < 128) -+ map->m3 &= ~BIT(id - 96); -+#endif -+ else -+ rtw_warn_on(1); -+} -+ -+inline void rtw_sec_cam_map_clr_all(struct sec_cam_bmp *map) -+{ -+ map->m0 = 0; -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) -+ map->m1 = 0; -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) -+ map->m2 = 0; -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) -+ map->m3 = 0; -+#endif -+} -+ -+inline bool rtw_sec_camid_is_drv_forbid(struct cam_ctl_t *cam_ctl, u8 id) -+{ -+ struct sec_cam_bmp forbid_map; -+ -+ forbid_map.m0 = 0x00000ff0; -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) -+ forbid_map.m1 = 0x00000000; -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) -+ forbid_map.m2 = 0x00000000; -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) -+ forbid_map.m3 = 0x00000000; -+#endif -+ -+ if (id < 32) -+ return forbid_map.m0 & BIT(id); -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) -+ else if (id < 64) -+ return forbid_map.m1 & BIT(id - 32); -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) -+ else if (id < 96) -+ return forbid_map.m2 & BIT(id - 64); -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) -+ else if (id < 128) -+ return forbid_map.m3 & BIT(id - 96); -+#endif -+ else -+ rtw_warn_on(1); -+ -+ return 1; -+} -+ -+bool _rtw_sec_camid_is_used(struct cam_ctl_t *cam_ctl, u8 id) -+{ -+ bool ret = _FALSE; -+ -+ if (id >= cam_ctl->num) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+#if 0 /* for testing */ -+ if (rtw_sec_camid_is_drv_forbid(cam_ctl, id)) { -+ ret = _TRUE; -+ goto exit; -+ } -+#endif -+ -+ ret = rtw_sec_camid_is_set(&cam_ctl->used, id); -+ -+exit: -+ return ret; -+} -+ -+inline bool rtw_sec_camid_is_used(struct cam_ctl_t *cam_ctl, u8 id) -+{ -+ _irqL irqL; -+ bool ret; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ ret = _rtw_sec_camid_is_used(cam_ctl, id); -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ -+ return ret; -+} -+u8 rtw_get_sec_camid(_adapter *adapter, u8 max_bk_key_num, u8 *sec_key_id) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ int i; -+ _irqL irqL; -+ u8 sec_cam_num = 0; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ for (i = 0; i < cam_ctl->num; i++) { -+ if (_rtw_sec_camid_is_used(cam_ctl, i)) { -+ sec_key_id[sec_cam_num++] = i; -+ if (sec_cam_num == max_bk_key_num) -+ break; -+ } -+ } -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ -+ return sec_cam_num; -+} -+ -+inline bool _rtw_camid_is_gk(_adapter *adapter, u8 cam_id) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ bool ret = _FALSE; -+ -+ if (cam_id >= cam_ctl->num) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (_rtw_sec_camid_is_used(cam_ctl, cam_id) == _FALSE) -+ goto exit; -+ -+ ret = (dvobj->cam_cache[cam_id].ctrl & BIT6) ? _TRUE : _FALSE; -+ -+exit: -+ return ret; -+} -+ -+inline bool rtw_camid_is_gk(_adapter *adapter, u8 cam_id) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ bool ret; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ ret = _rtw_camid_is_gk(adapter, cam_id); -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ -+ return ret; -+} -+ -+bool cam_cache_chk(_adapter *adapter, u8 id, u8 *addr, s16 kid, s8 gk) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ bool ret = _FALSE; -+ -+ if (addr && _rtw_memcmp(dvobj->cam_cache[id].mac, addr, ETH_ALEN) == _FALSE) -+ goto exit; -+ if (kid >= 0 && kid != (dvobj->cam_cache[id].ctrl & 0x03)) -+ goto exit; -+ if (gk != -1 && (gk ? _TRUE : _FALSE) != _rtw_camid_is_gk(adapter, id)) -+ goto exit; -+ -+ ret = _TRUE; -+ -+exit: -+ return ret; -+} -+ -+s16 _rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid, s8 gk) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ int i; -+ s16 cam_id = -1; -+ -+ for (i = 0; i < cam_ctl->num; i++) { -+ if (cam_cache_chk(adapter, i, addr, kid, gk)) { -+ cam_id = i; -+ break; -+ } -+ } -+ -+ if (0) { -+ if (addr) -+ RTW_INFO(FUNC_ADPT_FMT" addr:"MAC_FMT" kid:%d, gk:%d, return cam_id:%d\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(addr), kid, gk, cam_id); -+ else -+ RTW_INFO(FUNC_ADPT_FMT" addr:%p kid:%d, gk:%d, return cam_id:%d\n" -+ , FUNC_ADPT_ARG(adapter), addr, kid, gk, cam_id); -+ } -+ -+ return cam_id; -+} -+ -+s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid, s8 gk) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ s16 cam_id = -1; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ cam_id = _rtw_camid_search(adapter, addr, kid, gk); -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ -+ return cam_id; -+} -+ -+s16 rtw_get_camid(_adapter *adapter, u8 *addr, s16 kid, u8 gk, bool ext_sec) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ int i; -+#if 0 /* for testing */ -+ static u8 start_id = 0; -+#else -+ u8 start_id = 0; -+#endif -+ s16 cam_id = -1; -+ -+ if (addr == NULL) { -+ RTW_PRINT(FUNC_ADPT_FMT" mac_address is NULL\n" -+ , FUNC_ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ goto _exit; -+ } -+ -+ /* find cam entry which has the same addr, kid (, gk bit) */ -+ if (_rtw_camctl_chk_cap(adapter, SEC_CAP_CHK_BMC) == _TRUE) -+ i = _rtw_camid_search(adapter, addr, kid, gk); -+ else -+ i = _rtw_camid_search(adapter, addr, kid, -1); -+ -+ if (i >= 0) { -+ cam_id = i; -+ goto _exit; -+ } -+ -+ for (i = 0; i < cam_ctl->num; i++) { -+ /* bypass default key which is allocated statically */ -+#ifdef SEC_DEFAULT_KEY_SEARCH -+ if (((i + start_id) % cam_ctl->num) < 4) -+ continue; -+#endif -+ if (_rtw_sec_camid_is_used(cam_ctl, ((i + start_id) % cam_ctl->num)) == _FALSE) { -+ if (ext_sec) { -+ /* look out continue slot */ -+ if (((i + 1) < cam_ctl->num) && -+ (_rtw_sec_camid_is_used(cam_ctl, (((i + 1) + start_id) % cam_ctl->num)) == _FALSE)) -+ break; -+ else -+ continue; -+ } else -+ break; -+ } -+ } -+ -+ if (i == cam_ctl->num) { -+ RTW_PRINT(FUNC_ADPT_FMT" %s key with "MAC_FMT" id:%u no room\n" -+ , FUNC_ADPT_ARG(adapter), gk ? "group" : "pairwise", MAC_ARG(addr), kid); -+ rtw_warn_on(1); -+ goto _exit; -+ } -+ -+ cam_id = ((i + start_id) % cam_ctl->num); -+ start_id = ((i + start_id + 1) % cam_ctl->num); -+ -+_exit: -+ return cam_id; -+} -+ -+s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, u8 gk, bool ext_sec, bool *used) -+{ -+ struct mlme_ext_info *mlmeinfo = &adapter->mlmeextpriv.mlmext_info; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ s16 cam_id = -1; -+ -+ *used = _FALSE; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ -+ if ((((mlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) || ((mlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) -+ && !sta) { -+ /* -+ * 1. non-STA mode WEP key -+ * 2. group TX key -+ */ -+#ifdef SEC_DEFAULT_KEY_SEARCH -+ /* static alloction to default key by key ID when concurrent is not defined */ -+ if (kid > 3) { -+ RTW_PRINT(FUNC_ADPT_FMT" group key with invalid key id:%u\n" -+ , FUNC_ADPT_ARG(adapter), kid); -+ rtw_warn_on(1); -+ goto bitmap_handle; -+ } -+ cam_id = kid; -+#else -+ u8 *addr = adapter_mac_addr(adapter); -+ -+ cam_id = rtw_get_camid(adapter, addr, kid, gk, ext_sec); -+ if (1) -+ RTW_PRINT(FUNC_ADPT_FMT" group key with "MAC_FMT" assigned cam_id:%u\n" -+ , FUNC_ADPT_ARG(adapter), MAC_ARG(addr), cam_id); -+#endif -+ } else { -+ /* -+ * 1. STA mode WEP key -+ * 2. STA mode group RX key -+ * 3. sta key (pairwise, group RX) -+ */ -+ u8 *addr = sta ? sta->cmn.mac_addr : NULL; -+ -+ if (!sta) { -+ if (!(mlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { -+ /* bypass STA mode group key setting before connected(ex:WEP) because bssid is not ready */ -+ goto bitmap_handle; -+ } -+ addr = get_bssid(&adapter->mlmepriv);/*A2*/ -+ } -+ cam_id = rtw_get_camid(adapter, addr, kid, gk, ext_sec); -+ } -+ -+ -+bitmap_handle: -+ if (cam_id >= 0) { -+ *used = _rtw_sec_camid_is_used(cam_ctl, cam_id); -+ rtw_sec_cam_map_set(&cam_ctl->used, cam_id); -+ if (ext_sec) -+ rtw_sec_cam_map_set(&cam_ctl->used, cam_id + 1); -+ } -+ -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ -+ return cam_id; -+} -+ -+void rtw_camid_set(_adapter *adapter, u8 cam_id) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ -+ if (cam_id < cam_ctl->num) -+ rtw_sec_cam_map_set(&cam_ctl->used, cam_id); -+ -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+} -+ -+void rtw_camid_free(_adapter *adapter, u8 cam_id) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ -+ if (cam_id < cam_ctl->num) -+ rtw_sec_cam_map_clr(&cam_ctl->used, cam_id); -+ -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+} -+ -+/*Must pause TX/RX before use this API*/ -+inline void rtw_sec_cam_swap(_adapter *adapter, u8 cam_id_a, u8 cam_id_b) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ struct sec_cam_ent cache_a, cache_b; -+ _irqL irqL; -+ bool cam_a_used, cam_b_used; -+ -+ if (1) -+ RTW_INFO(ADPT_FMT" - sec_cam %d,%d swap\n", ADPT_ARG(adapter), cam_id_a, cam_id_b); -+ -+ if (cam_id_a == cam_id_b) -+ return; -+ -+ rtw_mi_update_ap_bmc_camid(adapter, cam_id_a, cam_id_b); -+ -+ /*setp-1. backup org cam_info*/ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ -+ cam_a_used = _rtw_sec_camid_is_used(cam_ctl, cam_id_a); -+ cam_b_used = _rtw_sec_camid_is_used(cam_ctl, cam_id_b); -+ -+ if (cam_a_used) -+ _rtw_memcpy(&cache_a, &dvobj->cam_cache[cam_id_a], sizeof(struct sec_cam_ent)); -+ -+ if (cam_b_used) -+ _rtw_memcpy(&cache_b, &dvobj->cam_cache[cam_id_b], sizeof(struct sec_cam_ent)); -+ -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ -+ /*setp-2. clean cam_info*/ -+ if (cam_a_used) { -+ rtw_camid_free(adapter, cam_id_a); -+ clear_cam_entry(adapter, cam_id_a); -+ } -+ if (cam_b_used) { -+ rtw_camid_free(adapter, cam_id_b); -+ clear_cam_entry(adapter, cam_id_b); -+ } -+ -+ /*setp-3. set cam_info*/ -+ if (cam_a_used) { -+ write_cam(adapter, cam_id_b, cache_a.ctrl, cache_a.mac, cache_a.key); -+ rtw_camid_set(adapter, cam_id_b); -+ } -+ -+ if (cam_b_used) { -+ write_cam(adapter, cam_id_a, cache_b.ctrl, cache_b.mac, cache_b.key); -+ rtw_camid_set(adapter, cam_id_a); -+ } -+} -+ -+s16 rtw_get_empty_cam_entry(_adapter *adapter, u8 start_camid) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ int i; -+ s16 cam_id = -1; -+ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ for (i = start_camid; i < cam_ctl->num; i++) { -+ if (_FALSE == _rtw_sec_camid_is_used(cam_ctl, i)) { -+ cam_id = i; -+ break; -+ } -+ } -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ -+ return cam_id; -+} -+void rtw_clean_dk_section(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = dvobj_to_sec_camctl(dvobj); -+ s16 ept_cam_id; -+ int i; -+ -+ for (i = 0; i < 4; i++) { -+ if (rtw_sec_camid_is_used(cam_ctl, i)) { -+ ept_cam_id = rtw_get_empty_cam_entry(adapter, 4); -+ if (ept_cam_id > 0) -+ rtw_sec_cam_swap(adapter, i, ept_cam_id); -+ } -+ } -+} -+void rtw_clean_hw_dk_cam(_adapter *adapter) -+{ -+ int i; -+ -+ for (i = 0; i < 4; i++) { -+ if (_rtw_camctl_chk_cap(adapter, SEC_CAP_CHK_WRITE_CAM_NEW_RULE)) -+ _clear_cam_entry(adapter, i); -+ else -+ rtw_sec_clr_cam_ent(adapter, i); -+ } -+} -+ -+void flush_all_cam_entry(_adapter *padapter) -+{ -+#ifdef CONFIG_CONCURRENT_MODE -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ -+ psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); -+ if (psta) { -+ if (psta->state & WIFI_AP_STATE) { -+ /*clear cam when ap free per sta_info*/ -+ } else -+ rtw_clearstakey_cmd(padapter, psta, _FALSE); -+ } -+ } else if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { -+#ifdef CONFIG_AP_MODE -+#ifndef SEC_DEFAULT_KEY_SEARCH -+ int cam_id = -1; -+ u8 *addr = adapter_mac_addr(padapter); -+ u8 bmc_id = rtw_iface_bcmc_id_get(padapter); -+ -+ while ((cam_id = rtw_camid_search(padapter, addr, -1, -1)) >= 0) { -+ RTW_PRINT("clear wep or group key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(addr), cam_id); -+ clear_cam_entry(padapter, cam_id); -+ /* clear cam_ctl.used bit for data BMC TX force camid in rtw_release_macid() */ -+ if (bmc_id == INVALID_SEC_MAC_CAM_ID || cam_id != bmc_id) -+ rtw_camid_free(padapter, cam_id); -+ } -+#else -+ /* clear default key */ -+ int i, cam_id; -+ u8 null_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; -+ -+ for (i = 0; i < 4; i++) { -+ cam_id = rtw_camid_search(padapter, null_addr, i, -1); -+ if (cam_id >= 0) { -+ clear_cam_entry(padapter, cam_id); -+ rtw_camid_free(padapter, cam_id); -+ } -+ } -+ /* clear default key related key search setting */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8 *)_FALSE); -+#endif -+#endif /* CONFIG_AP_MODE */ -+ } -+ -+#else /*NON CONFIG_CONCURRENT_MODE*/ -+ -+ invalidate_cam_all(padapter); -+#endif -+} -+ -+#if defined(CONFIG_P2P) && defined(CONFIG_WFD) -+void rtw_process_wfd_ie(_adapter *adapter, u8 *wfd_ie, u8 wfd_ielen, const char *tag) -+{ -+ struct wifidirect_info *wdinfo = &adapter->wdinfo; -+ -+ u8 *attr_content; -+ u32 attr_contentlen = 0; -+ -+ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) -+ return; -+ -+ RTW_INFO("[%s] Found WFD IE\n", tag); -+ attr_content = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &attr_contentlen); -+ if (attr_content && attr_contentlen) { -+ wdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16(attr_content + 2); -+ RTW_INFO("[%s] Peer PORT NUM = %d\n", tag, wdinfo->wfd_info->peer_rtsp_ctrlport); -+ } -+} -+ -+void rtw_process_wfd_ies(_adapter *adapter, u8 *ies, u8 ies_len, const char *tag) -+{ -+ u8 *wfd_ie; -+ u32 wfd_ielen; -+ -+ if (!hal_chk_wl_func(adapter, WL_FUNC_MIRACAST)) -+ return; -+ -+ wfd_ie = rtw_get_wfd_ie(ies, ies_len, NULL, &wfd_ielen); -+ while (wfd_ie) { -+ rtw_process_wfd_ie(adapter, wfd_ie, wfd_ielen, tag); -+ wfd_ie = rtw_get_wfd_ie(wfd_ie + wfd_ielen, (ies + ies_len) - (wfd_ie + wfd_ielen), NULL, &wfd_ielen); -+ } -+} -+#endif /* defined(CONFIG_P2P) && defined(CONFIG_WFD) */ -+ -+int WMM_param_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ /* struct registry_priv *pregpriv = &padapter->registrypriv; */ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (pmlmepriv->qospriv.qos_option == 0) { -+ pmlmeinfo->WMM_enable = 0; -+ return _FALSE; -+ } -+ -+ if (_rtw_memcmp(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element))) -+ return _FALSE; -+ else -+ _rtw_memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element)); -+ pmlmeinfo->WMM_enable = 1; -+ return _TRUE; -+ -+#if 0 -+ if (pregpriv->wifi_spec == 1) { -+ if (pmlmeinfo->WMM_enable == 1) { -+ /* todo: compare the parameter set count & decide wheher to update or not */ -+ return _FAIL; -+ } else { -+ pmlmeinfo->WMM_enable = 1; -+ _rtw_rtw_memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element)); -+ return _TRUE; -+ } -+ } else { -+ pmlmeinfo->WMM_enable = 0; -+ return _FAIL; -+ } -+#endif -+ -+} -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+u8 rtw_is_tbtx_capabilty(u8 *p, u8 len){ -+ int i; -+ u8 tbtx_cap_ie[8] = {0x00, 0xe0, 0x4c, 0x01, 0x00, 0x00, 0x00, 0x00}; -+ -+ for (i = 0; i < len; i++) { -+ if (*(p + i) != tbtx_cap_ie[i]) -+ return _FALSE; -+ else -+ continue; -+ } -+ return _TRUE; -+} -+#endif -+ -+void WMMOnAssocRsp(_adapter *padapter) -+{ -+ u8 ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime; -+ u8 acm_mask; -+ u16 TXOP; -+ u32 acParm, i; -+ u32 edca[4], inx[4]; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+#ifdef CONFIG_WMMPS_STA -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+#endif /* CONFIG_WMMPS_STA */ -+ -+ acm_mask = 0; -+ -+ if (is_supported_5g(pmlmeext->cur_wireless_mode) || -+ (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) -+ aSifsTime = 16; -+ else -+ aSifsTime = 10; -+ -+ if (pmlmeinfo->WMM_enable == 0) { -+ padapter->mlmepriv.acm_mask = 0; -+ -+ AIFS = aSifsTime + (2 * pmlmeinfo->slotTime); -+ -+ if (pmlmeext->cur_wireless_mode & (WIRELESS_11G | WIRELESS_11A)) { -+ ECWMin = 4; -+ ECWMax = 10; -+ } else if (pmlmeext->cur_wireless_mode & WIRELESS_11B) { -+ ECWMin = 5; -+ ECWMax = 10; -+ } else { -+ ECWMin = 4; -+ ECWMax = 10; -+ } -+ -+ TXOP = 0; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); -+ -+ ECWMin = 2; -+ ECWMax = 3; -+ TXOP = 0x2f; -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); -+ } else { -+ edca[0] = edca[1] = edca[2] = edca[3] = 0; -+ -+ for (i = 0; i < 4; i++) { -+ ACI = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN >> 5) & 0x03; -+ ACM = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN >> 4) & 0x01; -+ -+ /* AIFS = AIFSN * slot time + SIFS - r2t phy delay */ -+ AIFS = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN & 0x0f) * pmlmeinfo->slotTime + aSifsTime; -+ -+ ECWMin = (pmlmeinfo->WMM_param.ac_param[i].CW & 0x0f); -+ ECWMax = (pmlmeinfo->WMM_param.ac_param[i].CW & 0xf0) >> 4; -+ TXOP = le16_to_cpu(pmlmeinfo->WMM_param.ac_param[i].TXOP_limit); -+ -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ -+ switch (ACI) { -+ case 0x0: -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); -+ acm_mask |= (ACM ? BIT(1) : 0); -+ edca[XMIT_BE_QUEUE] = acParm; -+ break; -+ -+ case 0x1: -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); -+ /* acm_mask |= (ACM? BIT(0):0); */ -+ edca[XMIT_BK_QUEUE] = acParm; -+ break; -+ -+ case 0x2: -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); -+ acm_mask |= (ACM ? BIT(2) : 0); -+ edca[XMIT_VI_QUEUE] = acParm; -+ break; -+ -+ case 0x3: -+ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); -+ acm_mask |= (ACM ? BIT(3) : 0); -+ edca[XMIT_VO_QUEUE] = acParm; -+ break; -+ } -+ -+ RTW_INFO("WMM(%x): %x, %x\n", ACI, ACM, acParm); -+ } -+ -+ if (padapter->registrypriv.acm_method == 1) -+ rtw_hal_set_hwreg(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_mask)); -+ else -+ padapter->mlmepriv.acm_mask = acm_mask; -+ -+ inx[0] = 0; -+ inx[1] = 1; -+ inx[2] = 2; -+ inx[3] = 3; -+ -+ if (pregpriv->wifi_spec == 1) { -+ u32 j, tmp, change_inx = _FALSE; -+ -+ /* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */ -+ for (i = 0; i < 4; i++) { -+ for (j = i + 1; j < 4; j++) { -+ /* compare CW and AIFS */ -+ if ((edca[j] & 0xFFFF) < (edca[i] & 0xFFFF)) -+ change_inx = _TRUE; -+ else if ((edca[j] & 0xFFFF) == (edca[i] & 0xFFFF)) { -+ /* compare TXOP */ -+ if ((edca[j] >> 16) > (edca[i] >> 16)) -+ change_inx = _TRUE; -+ } -+ -+ if (change_inx) { -+ tmp = edca[i]; -+ edca[i] = edca[j]; -+ edca[j] = tmp; -+ -+ tmp = inx[i]; -+ inx[i] = inx[j]; -+ inx[j] = tmp; -+ -+ change_inx = _FALSE; -+ } -+ } -+ } -+ } -+ -+ for (i = 0; i < 4; i++) { -+ pxmitpriv->wmm_para_seq[i] = inx[i]; -+ RTW_INFO("wmm_para_seq(%d): %d\n", i, pxmitpriv->wmm_para_seq[i]); -+ } -+ -+#ifdef CONFIG_WMMPS_STA -+ /* if AP supports UAPSD function, driver must set each uapsd TID to coresponding mac register 0x693 */ -+ if (pmlmeinfo->WMM_param.QoS_info & AP_SUPPORTED_UAPSD) { -+ pqospriv->uapsd_ap_supported = 1; -+ rtw_hal_set_hwreg(padapter, HW_VAR_UAPSD_TID, NULL); -+ } -+#endif /* CONFIG_WMMPS_STA */ -+ } -+} -+ -+static void bwmode_update_check(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+#ifdef CONFIG_80211N_HT -+ unsigned char new_bwmode; -+ unsigned char new_ch_offset; -+ struct HT_info_element *pHT_info; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ u8 cbw40_enable = 0; -+ -+ if (!pIE) -+ return; -+ -+ if (phtpriv->ht_option == _FALSE) -+ return; -+ -+ if (pmlmeext->cur_bwmode >= CHANNEL_WIDTH_80) -+ return; -+ -+ if (pIE->Length > sizeof(struct HT_info_element)) -+ return; -+ -+ pHT_info = (struct HT_info_element *)pIE->data; -+ -+ if (hal_chk_bw_cap(padapter, BW_CAP_40M)) { -+ if (pmlmeext->cur_channel > 14) { -+ if (REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) -+ cbw40_enable = 1; -+ } else { -+ if (REGSTY_IS_BW_2G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_40)) -+ cbw40_enable = 1; -+ } -+ } -+ -+ if ((pHT_info->infos[0] & BIT(2)) && cbw40_enable) { -+ new_bwmode = CHANNEL_WIDTH_40; -+ -+ switch (pHT_info->infos[0] & 0x3) { -+ case 1: -+ new_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ -+ case 3: -+ new_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ -+ default: -+ new_bwmode = CHANNEL_WIDTH_20; -+ new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+ } else { -+ new_bwmode = CHANNEL_WIDTH_20; -+ new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ -+ -+ if ((new_bwmode != pmlmeext->cur_bwmode || new_ch_offset != pmlmeext->cur_ch_offset) -+ && new_bwmode < pmlmeext->cur_bwmode -+ ) { -+ pmlmeinfo->bwmode_updated = _TRUE; -+ -+ pmlmeext->cur_bwmode = new_bwmode; -+ pmlmeext->cur_ch_offset = new_ch_offset; -+ -+ /* update HT info also */ -+ HT_info_handler(padapter, pIE); -+ } else -+ pmlmeinfo->bwmode_updated = _FALSE; -+ -+ -+ if (_TRUE == pmlmeinfo->bwmode_updated) { -+ struct sta_info *psta; -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ /* set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); */ -+ -+ -+ /* update ap's stainfo */ -+ psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); -+ if (psta) { -+ struct ht_priv *phtpriv_sta = &psta->htpriv; -+ -+ if (phtpriv_sta->ht_option) { -+ /* bwmode */ -+ psta->cmn.bw_mode = pmlmeext->cur_bwmode; -+ phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; -+ } else { -+ psta->cmn.bw_mode = CHANNEL_WIDTH_20; -+ phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ -+ rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta); -+ } -+ -+ /* pmlmeinfo->bwmode_updated = _FALSE; */ /* bwmode_updated done, reset it! */ -+ } -+#endif /* CONFIG_80211N_HT */ -+} -+ -+#ifdef ROKU_PRIVATE -+void Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ unsigned int i; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (pIE == NULL) -+ return; -+ -+ for (i = 0 ; i < pIE->Length; i++) -+ pmlmeinfo->SupportedRates_infra_ap[i] = (pIE->data[i]); -+ -+} -+ -+void Extended_Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ unsigned int i, j; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (pIE == NULL) -+ return; -+ -+ if (pIE->Length > 0) { -+ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { -+ if (pmlmeinfo->SupportedRates_infra_ap[i] == 0) -+ break; -+ } -+ for (j = 0; j < pIE->Length; j++) -+ pmlmeinfo->SupportedRates_infra_ap[i+j] = (pIE->data[j]); -+ } -+ -+} -+ -+void HT_get_ss_from_mcs_set(u8 *mcs_set, u8 *Rx_ss) -+{ -+ u8 i, j; -+ u8 r_ss = 0, t_ss = 0; -+ -+ for (i = 0; i < 4; i++) { -+ if ((mcs_set[3-i] & 0xff) != 0x00) { -+ r_ss = 4-i; -+ break; -+ } -+ } -+ -+ *Rx_ss = r_ss; -+} -+ -+void HT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ unsigned int i; -+ u8 cur_stbc_cap_infra_ap = 0; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv_infra_ap *phtpriv = &pmlmepriv->htpriv_infra_ap; -+ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (pIE == NULL) -+ return; -+ -+ pmlmeinfo->ht_vht_received |= BIT(0); -+ -+ /*copy MCS_SET*/ -+ for (i = 3; i < 19; i++) -+ phtpriv->MCS_set_infra_ap[i-3] = (pIE->data[i]); -+ -+ /*get number of stream from mcs set*/ -+ HT_get_ss_from_mcs_set(phtpriv->MCS_set_infra_ap, &phtpriv->Rx_ss_infra_ap); -+ -+ phtpriv->rx_highest_data_rate_infra_ap = le16_to_cpu(GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(pIE->data)); -+ -+ phtpriv->ldpc_cap_infra_ap = GET_HT_CAP_ELE_LDPC_CAP(pIE->data); -+ -+ if (GET_HT_CAP_ELE_RX_STBC(pIE->data)) -+ SET_FLAG(cur_stbc_cap_infra_ap, STBC_HT_ENABLE_RX); -+ if (GET_HT_CAP_ELE_TX_STBC(pIE->data)) -+ SET_FLAG(cur_stbc_cap_infra_ap, STBC_HT_ENABLE_TX); -+ phtpriv->stbc_cap_infra_ap = cur_stbc_cap_infra_ap; -+ -+ /*store ap info SGI 20m 40m*/ -+ phtpriv->sgi_20m_infra_ap = GET_HT_CAP_ELE_SHORT_GI20M(pIE->data); -+ phtpriv->sgi_40m_infra_ap = GET_HT_CAP_ELE_SHORT_GI40M(pIE->data); -+ -+ /*store ap info for supported channel bandwidth*/ -+ phtpriv->channel_width_infra_ap = GET_HT_CAP_ELE_CHL_WIDTH(pIE->data); -+} -+#endif /* ROKU_PRIVATE */ -+ -+void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+#ifdef CONFIG_80211N_HT -+ unsigned int i; -+ u8 max_AMPDU_len, min_MPDU_spacing; -+ u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0, rx_nss = 0; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+#ifdef CONFIG_DISABLE_MCS13TO15 -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+#endif -+ -+ if (pIE == NULL) -+ return; -+ -+ if (phtpriv->ht_option == _FALSE) -+ return; -+ -+ pmlmeinfo->HT_caps_enable = 1; -+ -+ for (i = 0; i < (pIE->Length); i++) { -+ if (i != 2) { -+ /* Commented by Albert 2010/07/12 */ -+ /* Got the endian issue here. */ -+ pmlmeinfo->HT_caps.u.HT_cap[i] &= (pIE->data[i]); -+ } else { -+ /* AMPDU Parameters field */ -+ -+ /* Get MIN of MAX AMPDU Length Exp */ -+ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (pIE->data[i] & 0x3)) -+ max_AMPDU_len = (pIE->data[i] & 0x3); -+ else -+ max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3); -+ -+ /* Get MAX of MIN MPDU Start Spacing */ -+ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (pIE->data[i] & 0x1c)) -+ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c); -+ else -+ min_MPDU_spacing = (pIE->data[i] & 0x1c); -+ -+ pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para = max_AMPDU_len | min_MPDU_spacing; -+ } -+ } -+ -+ /* Commented by Albert 2010/07/12 */ -+ /* Have to handle the endian issue after copying. */ -+ /* HT_ext_caps didn't be used yet. */ -+ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info = le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info); -+ pmlmeinfo->HT_caps.u.HT_cap_element.HT_ext_caps = le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_ext_caps); -+ -+ /* update the MCS set */ -+ for (i = 0; i < 16; i++) -+ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= pmlmeext->default_supported_mcs_set[i]; -+ -+ rx_nss = GET_HAL_RX_NSS(padapter); -+ -+ switch (rx_nss) { -+ case 1: -+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R); -+ break; -+ case 2: -+ #ifdef CONFIG_DISABLE_MCS13TO15 -+ if (pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1) -+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R_13TO15_OFF); -+ else -+ #endif -+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); -+ break; -+ case 3: -+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_3R); -+ break; -+ case 4: -+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_4R); -+ break; -+ default: -+ RTW_WARN("rf_type:%d or rx_nss:%u is not expected\n", GET_HAL_RFPATH(padapter), rx_nss); -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { -+ /* Config STBC setting */ -+ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_RX_STBC(pIE->data)) { -+ SET_FLAG(cur_stbc_cap, STBC_HT_ENABLE_TX); -+ RTW_INFO("Enable HT Tx STBC !\n"); -+ } -+ phtpriv->stbc_cap = cur_stbc_cap; -+ -+#ifdef CONFIG_BEAMFORMING -+ /* Config Tx beamforming setting */ -+ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); -+ /* Shift to BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP*/ -+ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pIE->data) << 6); -+ } -+ -+ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); -+ /* Shift to BEAMFORMING_HT_BEAMFORMER_STEER_NUM*/ -+ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pIE->data) << 4); -+ } -+ phtpriv->beamform_cap = cur_beamform_cap; -+ if (cur_beamform_cap) -+ RTW_INFO("AP HT Beamforming Cap = 0x%02X\n", cur_beamform_cap); -+#endif /*CONFIG_BEAMFORMING*/ -+ } else { -+ /*WIFI_STATION_STATEorI_ADHOC_STATE or WIFI_ADHOC_MASTER_STATE*/ -+ /* Config LDPC Coding Capability */ -+ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAP_ELE_LDPC_CAP(pIE->data)) { -+ SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); -+ RTW_INFO("Enable HT Tx LDPC!\n"); -+ } -+ phtpriv->ldpc_cap = cur_ldpc_cap; -+ -+ /* Config STBC setting */ -+ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_RX_STBC(pIE->data)) { -+ SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX)); -+ RTW_INFO("Enable HT Tx STBC!\n"); -+ } -+ phtpriv->stbc_cap = cur_stbc_cap; -+ -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+ /* Config beamforming setting */ -+ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); -+ /* Shift to BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP*/ -+ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pIE->data) << 6); -+ } -+ -+ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); -+ /* Shift to BEAMFORMING_HT_BEAMFORMER_STEER_NUM*/ -+ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pIE->data) << 4); -+ } -+#else /* !RTW_BEAMFORMING_VERSION_2 */ -+ /* Config Tx beamforming setting */ -+ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE); -+ /* Shift to BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP*/ -+ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(pIE->data) << 6); -+ } -+ -+ if (TEST_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE) && -+ GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(pIE->data)) { -+ SET_FLAG(cur_beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE); -+ /* Shift to BEAMFORMING_HT_BEAMFORMER_STEER_NUM*/ -+ SET_FLAG(cur_beamform_cap, GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(pIE->data) << 4); -+ } -+#endif /* !RTW_BEAMFORMING_VERSION_2 */ -+ phtpriv->beamform_cap = cur_beamform_cap; -+ if (cur_beamform_cap) -+ RTW_INFO("Client HT Beamforming Cap = 0x%02X\n", cur_beamform_cap); -+#endif /*CONFIG_BEAMFORMING*/ -+ } -+ -+#endif /* CONFIG_80211N_HT */ -+} -+ -+void HT_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+#ifdef CONFIG_80211N_HT -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ -+ if (pIE == NULL) -+ return; -+ -+ if (phtpriv->ht_option == _FALSE) -+ return; -+ -+ -+ if (pIE->Length > sizeof(struct HT_info_element)) -+ return; -+ -+ pmlmeinfo->HT_info_enable = 1; -+ _rtw_memcpy(&(pmlmeinfo->HT_info), pIE->data, pIE->Length); -+#endif /* CONFIG_80211N_HT */ -+ return; -+} -+ -+void HTOnAssocRsp(_adapter *padapter) -+{ -+ unsigned char max_AMPDU_len; -+ unsigned char min_MPDU_spacing; -+ /* struct registry_priv *pregpriv = &padapter->registrypriv; */ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) -+ pmlmeinfo->HT_enable = 1; -+ else { -+ pmlmeinfo->HT_enable = 0; -+ /* set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); */ -+ return; -+ } -+ -+ /* handle A-MPDU parameter field */ -+ /* -+ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k -+ AMPDU_para [4:2]:Min MPDU Start Spacing -+ */ -+ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; -+ -+ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); -+#ifdef CONFIG_80211N_HT -+ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); -+#endif /* CONFIG_80211N_HT */ -+#if 0 /* move to rtw_update_ht_cap() */ -+ if ((pregpriv->bw_mode > 0) && -+ (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & BIT(1)) && -+ (pmlmeinfo->HT_info.infos[0] & BIT(2))) { -+ /* switch to the 40M Hz mode accoring to the AP */ -+ pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; -+ switch ((pmlmeinfo->HT_info.infos[0] & 0x3)) { -+ case EXTCHNL_OFFSET_UPPER: -+ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ -+ case EXTCHNL_OFFSET_LOWER: -+ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ -+ default: -+ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+ } -+#endif -+ -+ /* set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); */ -+ -+#if 0 /* move to rtw_update_ht_cap() */ -+ /* */ -+ /* Config SM Power Save setting */ -+ /* */ -+ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; -+ if (pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) { -+#if 0 -+ u8 i; -+ /* update the MCS rates */ -+ for (i = 0; i < 16; i++) -+ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; -+#endif -+ RTW_INFO("%s(): WLAN_HT_CAP_SM_PS_STATIC\n", __FUNCTION__); -+ } -+ -+ /* */ -+ /* Config current HT Protection mode. */ -+ /* */ -+ pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; -+#endif -+ -+} -+ -+void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (pIE->Length > 1) -+ return; -+ -+ pmlmeinfo->ERP_enable = 1; -+ _rtw_memcpy(&(pmlmeinfo->ERP_IE), pIE->data, pIE->Length); -+} -+ -+void VCS_update(_adapter *padapter, struct sta_info *psta) -+{ -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ switch (pregpriv->vrtl_carrier_sense) { /* 0:off 1:on 2:auto */ -+ case 0: /* off */ -+ psta->rtsen = 0; -+ psta->cts2self = 0; -+ break; -+ -+ case 1: /* on */ -+ if (pregpriv->vcs_type == 1) { /* 1:RTS/CTS 2:CTS to self */ -+ psta->rtsen = 1; -+ psta->cts2self = 0; -+ } else { -+ psta->rtsen = 0; -+ psta->cts2self = 1; -+ } -+ break; -+ -+ case 2: /* auto */ -+ default: -+ if (((pmlmeinfo->ERP_enable) && (pmlmeinfo->ERP_IE & BIT(1))) -+ /*||(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)*/ -+ ) { -+ if (pregpriv->vcs_type == 1) { -+ psta->rtsen = 1; -+ psta->cts2self = 0; -+ } else { -+ psta->rtsen = 0; -+ psta->cts2self = 1; -+ } -+ } else { -+ psta->rtsen = 0; -+ psta->cts2self = 0; -+ } -+ break; -+ } -+} -+ -+void update_ldpc_stbc_cap(struct sta_info *psta) -+{ -+#ifdef CONFIG_80211N_HT -+ -+#ifdef CONFIG_80211AC_VHT -+ if (psta->vhtpriv.vht_option) { -+ if (TEST_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_ENABLE_TX)) -+ psta->cmn.ldpc_en = VHT_LDPC_EN; -+ else -+ psta->cmn.ldpc_en = 0; -+ -+ if (TEST_FLAG(psta->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX)) -+ psta->cmn.stbc_en = VHT_STBC_EN; -+ else -+ psta->cmn.stbc_en = 0; -+ } else -+#endif /* CONFIG_80211AC_VHT */ -+ if (psta->htpriv.ht_option) { -+ if (TEST_FLAG(psta->htpriv.ldpc_cap, LDPC_HT_ENABLE_TX)) -+ psta->cmn.ldpc_en = HT_LDPC_EN; -+ else -+ psta->cmn.ldpc_en = 0; -+ -+ if (TEST_FLAG(psta->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) -+ psta->cmn.stbc_en = HT_STBC_EN; -+ else -+ psta->cmn.stbc_en = 0; -+ } else { -+ psta->cmn.ldpc_en = 0; -+ psta->cmn.stbc_en = 0; -+ } -+ -+#endif /* CONFIG_80211N_HT */ -+} -+ -+int check_ielen(u8 *start, uint len) -+{ -+ int left = len; -+ u8 *pos = start; -+ u8 id, elen; -+ -+ while (left >= 2) { -+ id = *pos++; -+ elen = *pos++; -+ left -= 2; -+ -+ if (elen > left) { -+ RTW_INFO("IEEE 802.11 element parse failed (id=%d elen=%d left=%lu)\n", -+ id, elen, (unsigned long) left); -+ return _FALSE; -+ } -+ if ((id == WLAN_EID_VENDOR_SPECIFIC) && (elen < 3)) -+ return _FALSE; -+ -+ left -= elen; -+ pos += elen; -+ } -+ if (left) -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+int validate_beacon_len(u8 *pframe, u32 len) -+{ -+ u8 ie_offset = _BEACON_IE_OFFSET_ + sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ if (len < ie_offset) { -+ RTW_INFO("%s: incorrect beacon length(%d)\n", __func__, len); -+ return _FALSE; -+ } -+ -+ if (check_ielen(pframe + ie_offset, len - ie_offset) == _FALSE) -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+#ifdef CONFIG_CHECK_SPECIFIC_IE_CONTENT -+u8 support_rate_ranges[] = { -+ IEEE80211_CCK_RATE_1MB, -+ IEEE80211_CCK_RATE_2MB, -+ IEEE80211_CCK_RATE_5MB, -+ IEEE80211_CCK_RATE_11MB, -+ IEEE80211_OFDM_RATE_6MB, -+ IEEE80211_OFDM_RATE_9MB, -+ IEEE80211_OFDM_RATE_12MB, -+ IEEE80211_OFDM_RATE_18MB, -+ IEEE80211_PBCC_RATE_22MB, -+ IEEE80211_FREAK_RATE_22_5MB, -+ IEEE80211_OFDM_RATE_24MB, -+ IEEE80211_OFDM_RATE_36MB, -+ IEEE80211_OFDM_RATE_48MB, -+ IEEE80211_OFDM_RATE_54MB, -+}; -+ -+inline bool match_ranges(u16 EID, u32 value) -+{ -+ int i; -+ int nr_range; -+ -+ switch (EID) { -+ case _EXT_SUPPORTEDRATES_IE_: -+ case _SUPPORTEDRATES_IE_: -+ nr_range = sizeof(support_rate_ranges)/sizeof(u8); -+ for (i = 0; i < nr_range; i++) { -+ /* clear bit7 before searching. */ -+ value &= ~BIT(7); -+ if (value == support_rate_ranges[i]) -+ return _TRUE; -+ } -+ break; -+ default: -+ break; -+ }; -+ return _FALSE; -+} -+ -+/* -+ * rtw_validate_value: validate the IE contain. -+ * -+ * Input : -+ * EID : Element ID -+ * p : IE buffer (without EID & length) -+ * len : IE length -+ * return: -+ * _TRUE : All Values are validated. -+ * _FALSE : At least one value is NOT validated. -+ */ -+bool rtw_validate_value(u16 EID, u8 *p, u16 len) -+{ -+ u8 rate; -+ u32 i, nr_val; -+ -+ switch (EID) { -+ case _EXT_SUPPORTEDRATES_IE_: -+ case _SUPPORTEDRATES_IE_: -+ nr_val = len; -+ for (i=0; iSsid.Ssid, snetwork->Ssid.SsidLength); -+} -+ -+/* -+ Get SSID if this ilegal frame(probe resp) comes from a hidden SSID AP. -+ Update the SSID to the corresponding pnetwork in scan queue. -+*/ -+void rtw_absorb_ssid_ifneed(_adapter *padapter, WLAN_BSSID_EX *bssid, u8 *pframe) -+{ -+ struct wlan_network *scanned = NULL; -+ WLAN_BSSID_EX *snetwork; -+ u8 ie_offset, *p=NULL, *next_ie=NULL, *mac = get_addr2_ptr(pframe); -+ sint ssid_len_ori; -+ u32 remain_len = 0; -+ u8 backupIE[MAX_IE_SZ]; -+ u16 subtype = get_frame_sub_type(pframe); -+ _irqL irqL; -+ -+ if (subtype == WIFI_BEACON) { -+ bssid->Reserved[0] = BSS_TYPE_BCN; -+ ie_offset = _BEACON_IE_OFFSET_; -+ } else { -+ /* FIXME : more type */ -+ if (subtype == WIFI_PROBERSP) { -+ ie_offset = _PROBERSP_IE_OFFSET_; -+ bssid->Reserved[0] = BSS_TYPE_PROB_RSP; -+ } else if (subtype == WIFI_PROBEREQ) { -+ ie_offset = _PROBEREQ_IE_OFFSET_; -+ bssid->Reserved[0] = BSS_TYPE_PROB_REQ; -+ } else { -+ bssid->Reserved[0] = BSS_TYPE_UNDEF; -+ ie_offset = _FIXED_IE_LENGTH_; -+ } -+ } -+ -+ _enter_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL); -+ scanned = _rtw_find_network(&padapter->mlmepriv.scanned_queue, mac); -+ if (!scanned) { -+ _exit_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL); -+ return; -+ } -+ -+ snetwork = &(scanned->network); -+ /* scan queue records as Hidden SSID && Input frame is NOT Hidden SSID */ -+ if (hidden_ssid_ap(snetwork) && !hidden_ssid_ap(bssid)) { -+ p = rtw_get_ie(snetwork->IEs+ie_offset, _SSID_IE_, &ssid_len_ori, snetwork->IELength-ie_offset); -+ if (!p) { -+ _exit_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL); -+ return; -+ } -+ next_ie = p + 2 + ssid_len_ori; -+ remain_len = snetwork->IELength - (next_ie - snetwork->IEs); -+ scanned->network.Ssid.SsidLength = bssid->Ssid.SsidLength; -+ _rtw_memcpy(scanned->network.Ssid.Ssid, bssid->Ssid.Ssid, bssid->Ssid.SsidLength); -+ -+ //update pnetwork->ssid, pnetwork->ssidlen -+ _rtw_memcpy(backupIE, next_ie, remain_len); -+ *(p+1) = bssid->Ssid.SsidLength; -+ _rtw_memcpy(p+2, bssid->Ssid.Ssid, bssid->Ssid.SsidLength); -+ _rtw_memcpy(p+2+bssid->Ssid.SsidLength, backupIE, remain_len); -+ snetwork->IELength += bssid->Ssid.SsidLength; -+ } -+ _exit_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL); -+} -+ -+#ifdef DBG_RX_BCN -+void rtw_debug_rx_bcn(_adapter *adapter, u8 *pframe, u32 packet_len) -+{ -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *mlmeinfo = &(pmlmeext->mlmext_info); -+ u16 sn = ((struct rtw_ieee80211_hdr_3addr *)pframe)->seq_ctl >> 4; -+ u64 tsf, tsf_offset; -+ u8 dtim_cnt, dtim_period, tim_bmap, tim_pvbit; -+ -+ update_TSF(pmlmeext, pframe, packet_len); -+ tsf = pmlmeext->TSFValue; -+ tsf_offset = rtw_modular64(pmlmeext->TSFValue, (mlmeinfo->bcn_interval * 1024)); -+ -+ /*get TIM IE*/ -+ /*DTIM Count*/ -+ dtim_cnt = pmlmeext->tim[0]; -+ /*DTIM Period*/ -+ dtim_period = pmlmeext->tim[1]; -+ /*Bitmap*/ -+ tim_bmap = pmlmeext->tim[2]; -+ /*Partial VBitmap AID 0 ~ 7*/ -+ tim_pvbit = pmlmeext->tim[3]; -+ -+ RTW_INFO("[BCN] SN-%d, TSF-%lld(us), offset-%lld, bcn_interval-%d DTIM-%d[%d] bitmap-0x%02x-0x%02x\n", -+ sn, tsf, tsf_offset, mlmeinfo->bcn_interval, dtim_period, dtim_cnt, tim_bmap, tim_pvbit); -+} -+#endif -+ -+/* -+ * rtw_get_bcn_keys: get beacon keys from recv frame -+ * -+ * TODO: -+ * WLAN_EID_COUNTRY -+ * WLAN_EID_ERP_INFO -+ * WLAN_EID_CHANNEL_SWITCH -+ * WLAN_EID_PWR_CONSTRAINT -+ */ -+int _rtw_get_bcn_keys(u8 *cap_info, u32 buf_len, u8 def_ch, ADAPTER *adapter -+ , struct beacon_keys *recv_beacon) -+{ -+ int left; -+ u16 capability; -+ unsigned char *pos; -+ struct rtw_ieee802_11_elems elems; -+ -+ _rtw_memset(recv_beacon, 0, sizeof(*recv_beacon)); -+ -+ /* checking capabilities */ -+ capability = le16_to_cpu(*(unsigned short *)(cap_info)); -+ -+ /* checking IEs */ -+ left = buf_len - 2; -+ pos = cap_info + 2; -+ if (rtw_ieee802_11_parse_elems(pos, left, &elems, 1) == ParseFailed) -+ return _FALSE; -+ -+ if (elems.ht_capabilities) { -+ if (elems.ht_capabilities_len != 26) -+ return _FALSE; -+ } -+ -+ if (elems.ht_operation) { -+ if (elems.ht_operation_len != 22) -+ return _FALSE; -+ } -+ -+ if (elems.vht_capabilities) { -+ if (elems.vht_capabilities_len != 12) -+ return _FALSE; -+ } -+ -+ if (elems.vht_operation) { -+ if (elems.vht_operation_len != 5) -+ return _FALSE; -+ } -+ -+ if (rtw_ies_get_supported_rate(pos, left, recv_beacon->rate_set, &recv_beacon->rate_num) == _FAIL) -+ return _FALSE; -+ -+ if (cckratesonly_included(recv_beacon->rate_set, recv_beacon->rate_num) == _TRUE) -+ recv_beacon->proto_cap |= PROTO_CAP_11B; -+ else if (cckrates_included(recv_beacon->rate_set, recv_beacon->rate_num) == _TRUE) -+ recv_beacon->proto_cap |= PROTO_CAP_11B | PROTO_CAP_11G; -+ else -+ recv_beacon->proto_cap |= PROTO_CAP_11G; -+ -+ if (elems.ht_capabilities && elems.ht_operation) -+ recv_beacon->proto_cap |= PROTO_CAP_11N; -+ -+ if (elems.vht_capabilities && elems.vht_operation) -+ recv_beacon->proto_cap |= PROTO_CAP_11AC; -+ -+ /* check bw and channel offset */ -+ rtw_ies_get_chbw(pos, left, &recv_beacon->ch, &recv_beacon->bw, &recv_beacon->offset, 1, 1); -+ if (!recv_beacon->ch) -+ recv_beacon->ch = def_ch; -+ -+ /* checking SSID */ -+ if (elems.ssid) { -+ if (elems.ssid_len > sizeof(recv_beacon->ssid)) -+ return _FALSE; -+ -+ _rtw_memcpy(recv_beacon->ssid, elems.ssid, elems.ssid_len); -+ recv_beacon->ssid_len = elems.ssid_len; -+ } -+ -+ /* checking RSN first */ -+ if (elems.rsn_ie && elems.rsn_ie_len) { -+ recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WPA2; -+ rtw_parse_wpa2_ie(elems.rsn_ie - 2, elems.rsn_ie_len + 2, -+ &recv_beacon->group_cipher, &recv_beacon->pairwise_cipher, -+ NULL, &recv_beacon->akm, NULL); -+ } -+ /* checking WPA secon */ -+ else if (elems.wpa_ie && elems.wpa_ie_len) { -+ recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WPA; -+ rtw_parse_wpa_ie(elems.wpa_ie - 2, elems.wpa_ie_len + 2, -+ &recv_beacon->group_cipher, &recv_beacon->pairwise_cipher, -+ &recv_beacon->akm); -+ } else if (capability & BIT(4)) -+ recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WEP; -+ -+ if (adapter) { -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ -+ if (elems.tim && elems.tim_len) { -+ #ifdef DBG_RX_BCN -+ _rtw_memcpy(pmlmeext->tim, elems.tim, 4); -+ #endif -+ pmlmeext->dtim = elems.tim[1]; -+ } -+ -+ /* checking RTW TBTX */ -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (elems.tbtx_cap && elems.tbtx_cap_len) { -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (rtw_is_tbtx_capabilty(elems.tbtx_cap, elems.tbtx_cap_len)) -+ RTW_DBG("AP support TBTX\n"); -+ } -+ #endif -+ } -+ -+ return _TRUE; -+} -+ -+int rtw_get_bcn_keys(_adapter *adapter, u8 *whdr, u32 flen, struct beacon_keys *bcn_keys) -+{ -+ return _rtw_get_bcn_keys( -+ whdr + WLAN_HDR_A3_LEN + 10 -+ , flen - WLAN_HDR_A3_LEN - 10 -+ , adapter->mlmeextpriv.cur_channel, adapter -+ , bcn_keys); -+} -+ -+int rtw_get_bcn_keys_from_bss(WLAN_BSSID_EX *bss, struct beacon_keys *bcn_keys) -+{ -+ return _rtw_get_bcn_keys( -+ bss->IEs + 10 -+ , bss->IELength - 10 -+ , bss->Configuration.DSConfig, NULL -+ , bcn_keys); -+} -+ -+int rtw_update_bcn_keys_of_network(struct wlan_network *network) -+{ -+ network->bcn_keys_valid = rtw_get_bcn_keys_from_bss(&network->network, &network->bcn_keys); -+ return network->bcn_keys_valid; -+} -+ -+void rtw_dump_bcn_keys(void *sel, struct beacon_keys *recv_beacon) -+{ -+#if defined(CONFIG_RTW_DEBUG) || defined(CONFIG_PROC_DEBUG) -+ u8 ssid[IW_ESSID_MAX_SIZE + 1]; -+ -+ _rtw_memcpy(ssid, recv_beacon->ssid, recv_beacon->ssid_len); -+ ssid[recv_beacon->ssid_len] = '\0'; -+ -+ RTW_PRINT_SEL(sel, "ssid = %s (len = %u)\n", ssid, recv_beacon->ssid_len); -+ RTW_PRINT_SEL(sel, "ch = %u,%u,%u\n" -+ , recv_beacon->ch, recv_beacon->bw, recv_beacon->offset); -+ RTW_PRINT_SEL(sel, "proto_cap = 0x%02x\n", recv_beacon->proto_cap); -+ RTW_MAP_DUMP_SEL(sel, "rate_set = " -+ , recv_beacon->rate_set, recv_beacon->rate_num); -+ RTW_PRINT_SEL(sel, "sec = %d, group = 0x%x, pair = 0x%x, akm = 0x%08x\n" -+ , recv_beacon->encryp_protocol, recv_beacon->group_cipher -+ , recv_beacon->pairwise_cipher, recv_beacon->akm); -+#endif -+} -+ -+void rtw_bcn_key_err_fix(struct beacon_keys *cur, struct beacon_keys *recv) -+{ -+ if ((recv->ch == cur->ch) && (recv->bw == cur->bw) && (recv->bw > CHANNEL_WIDTH_20)) { -+ if ((recv->offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) -+ && (cur->offset != HAL_PRIME_CHNL_OFFSET_DONT_CARE)) { -+ RTW_DBG("recv_bcn offset = %d is invalid, try to use cur_bcn offset = %d to replace it !\n", recv->offset, cur->offset); -+ recv->offset = cur->offset; -+ } -+ } -+} -+ -+bool rtw_bcn_key_compare(struct beacon_keys *cur, struct beacon_keys *recv) -+{ -+#define BCNKEY_VERIFY_PROTO_CAP 0 -+#define BCNKEY_VERIFY_WHOLE_RATE_SET 0 -+ -+ struct beacon_keys tmp; -+ bool ret = _FALSE; -+ -+ if (!rtw_is_chbw_grouped(cur->ch, cur->bw, cur->offset -+ , recv->ch, recv->bw, recv->offset)) -+ goto exit; -+ -+ _rtw_memcpy(&tmp, cur, sizeof(tmp)); -+ -+ /* check fields excluding below */ -+ tmp.ch = recv->ch; -+ tmp.bw = recv->bw; -+ tmp.offset = recv->offset; -+ if (!BCNKEY_VERIFY_PROTO_CAP) -+ tmp.proto_cap = recv->proto_cap; -+ if (!BCNKEY_VERIFY_WHOLE_RATE_SET) { -+ tmp.rate_num = recv->rate_num; -+ _rtw_memcpy(tmp.rate_set, recv->rate_set, 12); -+ } -+ -+ if (_rtw_memcmp(&tmp, recv, sizeof(*recv)) == _FALSE) -+ goto exit; -+ -+ ret = _TRUE; -+ -+exit: -+ return ret; -+} -+ -+int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) -+{ -+ u8 *pbssid = GetAddr3Ptr(pframe); -+ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; -+ struct wlan_network *cur_network = &(Adapter->mlmepriv.cur_network); -+ struct beacon_keys *cur_beacon = &pmlmepriv->cur_beacon_keys; -+ struct beacon_keys recv_beacon; -+ int ret = 0; -+ u8 ifbmp_m = rtw_mi_get_ap_mesh_ifbmp(Adapter); -+ u8 ifbmp_s = rtw_mi_get_ld_sta_ifbmp(Adapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter); -+ _adapter *pri_adapter = dvobj_get_primary_adapter(dvobj); -+ struct mlme_ext_priv *pmlmeext = &pri_adapter->mlmeextpriv; -+ -+ if (is_client_associated_to_ap(Adapter) == _FALSE) -+ goto exit_success; -+ -+ if (rtw_get_bcn_keys(Adapter, pframe, packet_len, &recv_beacon) == _FALSE) -+ goto exit_success; /* parsing failed => broken IE */ -+ -+#ifdef DBG_RX_BCN -+ rtw_debug_rx_bcn(Adapter, pframe, packet_len); -+#endif -+ -+ /* hidden ssid, replace with current beacon ssid directly */ -+ if (is_hidden_ssid(recv_beacon.ssid, recv_beacon.ssid_len)) { -+ _rtw_memcpy(recv_beacon.ssid, cur_beacon->ssid, cur_beacon->ssid_len); -+ recv_beacon.ssid_len = cur_beacon->ssid_len; -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_CSA_UPDATE_BEACON)) { -+ u8 u_ch, u_offset, u_bw; -+ struct sta_info *psta = NULL; -+ _rtw_memcpy(cur_beacon, &recv_beacon, sizeof(recv_beacon)); -+ clr_fwstate(pmlmepriv, WIFI_CSA_UPDATE_BEACON); -+ rtw_mi_get_ch_setting_union(Adapter, &u_ch, &u_bw, &u_offset); -+ -+ /* RTW_INFO("u_ch=%d, u_bw=%d, u_offset=%d \n", u_ch, u_bw, u_offset); -+ RTW_INFO("recv_beacon.ch=%d, recv_beacon.bw=%d, recv_beacon.offset=%d \n", recv_beacon.ch, recv_beacon.bw, recv_beacon.offset); */ -+ /* rtw_dump_bcn_keys(RTW_DBGDUMP, &recv_beacon); */ -+ -+ /* RTW_INFO("_cancel_timer_async csa_timer\n"); */ -+ _cancel_timer_async(&pmlmeext->csa_timer); -+ -+ /* beacon bw/offset is different from CSA IE */ -+ if((recv_beacon.bw > u_bw) || -+ ((recv_beacon.offset != HAL_PRIME_CHNL_OFFSET_DONT_CARE) && ((u_offset != HAL_PRIME_CHNL_OFFSET_DONT_CARE)) -+ && (recv_beacon.offset != u_offset))) { -+ -+ /* update ch, bw, offset for all asoc STA ifaces */ -+ if (ifbmp_s) { -+ _adapter *iface; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface || !(ifbmp_s & BIT(iface->iface_id))) -+ continue; -+ -+ iface->mlmeextpriv.cur_channel = recv_beacon.ch; -+ iface->mlmeextpriv.cur_bwmode = recv_beacon.bw; -+ iface->mlmeextpriv.cur_ch_offset = recv_beacon.offset; -+ iface->mlmepriv.cur_network.network.Configuration.DSConfig = recv_beacon.ch; -+ } -+ } -+ -+#ifdef CONFIG_AP_MODE -+ if (ifbmp_m) { -+ rtw_change_bss_chbw_cmd(dvobj_get_primary_adapter(dvobj), 0 -+ , ifbmp_m, 0, recv_beacon.ch, REQ_BW_ORI, REQ_OFFSET_NONE); -+ } else -+#endif -+ { -+ #ifdef CONFIG_DFS_MASTER -+ rtw_dfs_rd_en_decision(dvobj_get_primary_adapter(dvobj), MLME_OPCH_SWITCH, ifbmp_s); -+ #endif -+ rtw_set_chbw_cmd(Adapter, recv_beacon.ch, recv_beacon.bw, recv_beacon.offset, 0); -+ } -+ rtw_mi_get_ch_setting_union(Adapter, &u_ch, &u_bw, &u_offset); -+ -+ /* RTW_INFO("u_ch=%d, u_bw=%d, u_offset=%d \n", u_ch, u_bw, u_offset); */ -+ } else { -+ RTW_INFO("u_ch=%d, u_bw=%d, u_offset=%d, recv_beacon.ch=%d, recv_beacon.bw=%d, recv_beacon.offset=%d\n" -+ , u_ch, u_bw, u_offset, recv_beacon.ch, recv_beacon.bw, recv_beacon.offset); -+ } -+ -+ rtw_iqk_cmd(Adapter, 0); -+ psta = rtw_get_stainfo(&Adapter->stapriv, get_bssid(&Adapter->mlmepriv)); -+ if (psta) -+ rtw_dm_ra_mask_wk_cmd(Adapter, (u8 *)psta); -+ -+ } -+ -+#ifdef CONFIG_BCN_CNT_CONFIRM_HDL -+ if (_rtw_memcmp(&recv_beacon, cur_beacon, sizeof(recv_beacon)) == _TRUE) -+ pmlmepriv->new_beacon_cnts = 0; -+ else if ((pmlmepriv->new_beacon_cnts == 0) || -+ _rtw_memcmp(&recv_beacon, &pmlmepriv->new_beacon_keys, sizeof(recv_beacon)) == _FALSE) { -+ RTW_DBG("%s: start new beacon (seq=%d)\n", __func__, GetSequence(pframe)); -+ -+ if (pmlmepriv->new_beacon_cnts == 0) { -+ RTW_ERR("%s: cur beacon key\n", __func__); -+ RTW_DBG_EXPR(rtw_dump_bcn_keys(RTW_DBGDUMP, cur_beacon)); -+ } -+ -+ RTW_DBG("%s: new beacon key\n", __func__); -+ RTW_DBG_EXPR(rtw_dump_bcn_keys(RTW_DBGDUMP, &recv_beacon)); -+ -+ _rtw_memcpy(&pmlmepriv->new_beacon_keys, &recv_beacon, sizeof(recv_beacon)); -+ pmlmepriv->new_beacon_cnts = 1; -+ } else { -+ RTW_DBG("%s: new beacon again (seq=%d)\n", __func__, GetSequence(pframe)); -+ pmlmepriv->new_beacon_cnts++; -+ } -+ -+ /* if counter >= max, it means beacon is changed really */ -+ if (pmlmepriv->new_beacon_cnts >= new_bcn_max) -+#else -+ if (_rtw_memcmp(&recv_beacon, cur_beacon, sizeof(recv_beacon)) == _FALSE) -+#endif -+ { -+ RTW_INFO(FUNC_ADPT_FMT" new beacon occur!!\n", FUNC_ADPT_ARG(Adapter)); -+ RTW_INFO(FUNC_ADPT_FMT" cur beacon key:\n", FUNC_ADPT_ARG(Adapter)); -+ rtw_dump_bcn_keys(RTW_DBGDUMP, cur_beacon); -+ RTW_INFO(FUNC_ADPT_FMT" new beacon key:\n", FUNC_ADPT_ARG(Adapter)); -+ rtw_dump_bcn_keys(RTW_DBGDUMP, &recv_beacon); -+ -+ rtw_bcn_key_err_fix(cur_beacon, &recv_beacon); -+ -+ if (rtw_bcn_key_compare(cur_beacon, &recv_beacon) == _FALSE) -+ goto exit; -+ -+ _rtw_memcpy(cur_beacon, &recv_beacon, sizeof(recv_beacon)); -+ #ifdef CONFIG_BCN_CNT_CONFIRM_HDL -+ pmlmepriv->new_beacon_cnts = 0; -+ #endif -+ } -+ -+exit_success: -+ ret = 1; -+ -+exit: -+ return ret; -+} -+ -+void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta_info *psta) -+{ -+ unsigned int i; -+ unsigned int len; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ -+#ifdef CONFIG_TDLS -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ u8 tdls_prohibited[] = { 0x00, 0x00, 0x00, 0x00, 0x10 }; /* bit(38): TDLS_prohibited */ -+#endif /* CONFIG_TDLS */ -+ -+ len = pkt_len - (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN); -+ -+ for (i = 0; i < len;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN) + i); -+ -+ switch (pIE->ElementID) { -+ case _VENDOR_SPECIFIC_IE_: -+ /* to update WMM paramter set while receiving beacon */ -+ if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6) && pIE->Length == WLAN_WMM_LEN) /* WMM */ -+ (WMM_param_handler(padapter, pIE)) ? report_wmm_edca_update(padapter) : 0; -+ -+ break; -+ -+ case _HT_EXTRA_INFO_IE_: /* HT info */ -+ /* HT_info_handler(padapter, pIE); */ -+ bwmode_update_check(padapter, pIE); -+ break; -+#ifdef CONFIG_80211AC_VHT -+ case EID_OpModeNotification: -+ rtw_process_vht_op_mode_notify(padapter, pIE->data, psta); -+ break; -+#endif /* CONFIG_80211AC_VHT */ -+ case _ERPINFO_IE_: -+ ERP_IE_handler(padapter, pIE); -+ VCS_update(padapter, psta); -+ break; -+ -+#ifdef CONFIG_TDLS -+ case _EXT_CAP_IE_: -+ if (check_ap_tdls_prohibited(pIE->data, pIE->Length) == _TRUE) -+ ptdlsinfo->ap_prohibited = _TRUE; -+ if (check_ap_tdls_ch_switching_prohibited(pIE->data, pIE->Length) == _TRUE) -+ ptdlsinfo->ch_switch_prohibited = _TRUE; -+ break; -+#endif /* CONFIG_TDLS */ -+ default: -+ break; -+ } -+ -+ i += (pIE->Length + 2); -+ } -+} -+ -+#if CONFIG_DFS -+void process_csa_ie(_adapter *padapter, u8 *ies, uint ies_len) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ unsigned int i, j, countdown; -+ PNDIS_802_11_VARIABLE_IEs pIE, sub_pie; -+ u8 ch = 0, csa_ch_offset = 0, csa_ch_width = 0, csa_ch_freq_seg0 = 0, csa_ch_freq_seg1 = 0, csa_switch_cnt = 0; -+ -+ /* TODO: compare with scheduling CSA */ -+ if (rfctl->csa_ch) -+ return; -+ -+ for (i = 0; i + 1 < ies_len;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(ies + i); -+ -+ switch (pIE->ElementID) { -+ case _CH_SWTICH_ANNOUNCE_: -+ ch = *(pIE->data + 1); -+ csa_switch_cnt = *(pIE->data + 2); -+ break; -+ case WLAN_EID_SECONDARY_CHANNEL_OFFSET: -+ csa_ch_offset = *(pIE->data); -+ break; -+ case WLAN_EID_WIDE_BANDWIDTH_CHANNEL_SWITCH: -+ csa_ch_width = *(pIE->data); -+ csa_ch_freq_seg0 = *(pIE->data+1); -+ csa_ch_freq_seg1 = *(pIE->data+2); -+ /* RTW_INFO("bw:%02x center_freq_0:%d center_freq_1:%d, ch=%d\n" -+ , csa_ch_width, csa_ch_freq_seg0, csa_ch_freq_seg1, ch); */ -+ break; -+ case WLAN_EID_CHANNEL_SWITCH_WRAPPER: -+ for(j=0; j + 1 < pIE->Length;) { -+ sub_pie = (PNDIS_802_11_VARIABLE_IEs)(ies + i + j + 2); -+ if(sub_pie->ElementID == WLAN_EID_WIDE_BANDWIDTH_CHANNEL_SWITCH) { -+ csa_ch_width = *(sub_pie->data); -+ csa_ch_freq_seg0 = *(sub_pie->data+1); -+ csa_ch_freq_seg1 = *(sub_pie->data+2); -+ /* RTW_INFO("2. sub_IE:%02x IE_length:%02x bw:%02x center_freq_0:%d center_freq_1:%d, ch=%d\n" -+ , sub_pie->ElementID, sub_pie->Length, csa_ch_width, csa_ch_freq_seg0, csa_ch_freq_seg1, ch); */ -+ } -+ j += (sub_pie->Length + 2); -+ } -+ -+ break; -+ default: -+ break; -+ } -+ -+ i += (pIE->Length + 2); -+ } -+ -+ if (ch != 0) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ _adapter *pri_adapter = dvobj_get_primary_adapter(dvobj); -+ -+ rfctl->csa_ch = ch; -+ rfctl->csa_switch_cnt = csa_switch_cnt; -+ rfctl->csa_ch_offset = csa_ch_offset; -+ rfctl->csa_ch_width = csa_ch_width; -+ rfctl->csa_ch_freq_seg0 = csa_ch_freq_seg0; -+ rfctl->csa_ch_freq_seg1 = csa_ch_freq_seg1; -+ -+ countdown = pmlmeinfo->network.Configuration.BeaconPeriod * (csa_switch_cnt+1); /* ms */ -+ RTW_INFO("csa: set countdown timer to %d ms\n", countdown); -+ _set_timer(&pri_adapter->mlmeextpriv.csa_timer, countdown); -+ -+ } -+} -+#endif /* CONFIG_DFS */ -+ -+enum eap_type parsing_eapol_packet(_adapter *padapter, u8 *key_payload, struct sta_info *psta, u8 trx_type) -+{ -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ struct ieee802_1x_hdr *hdr; -+ struct wpa_eapol_key *key; -+ u16 key_info, key_data_length; -+ char *trx_msg = trx_type ? "send" : "recv"; -+ enum eap_type eapol_type; -+ -+ hdr = (struct ieee802_1x_hdr *) key_payload; -+ -+ /* WPS - eapol start packet */ -+ if (hdr->type == 1 && hdr->length == 0) { -+ RTW_INFO("%s eapol start packet\n", trx_msg); -+ return EAPOL_START; -+ } -+ -+ if (hdr->type == 0) { /* WPS - eapol packet */ -+ RTW_INFO("%s eapol packet\n", trx_msg); -+ return EAPOL_PACKET; -+ } -+ -+ key = (struct wpa_eapol_key *) (hdr + 1); -+ key_info = be16_to_cpu(*((u16 *)(key->key_info))); -+ key_data_length = be16_to_cpu(*((u16 *)(key->key_data_length))); -+ -+ if (!(key_info & WPA_KEY_INFO_KEY_TYPE)) { /* WPA group key handshake */ -+ if (key_info & WPA_KEY_INFO_ACK) { -+ RTW_PRINT("%s eapol packet - WPA Group Key 1/2\n", trx_msg); -+ eapol_type = EAPOL_WPA_GROUP_KEY_1_2; -+ } else { -+ RTW_PRINT("%s eapol packet - WPA Group Key 2/2\n", trx_msg); -+ eapol_type = EAPOL_WPA_GROUP_KEY_2_2; -+ -+ /* WPA key-handshake has completed */ -+ if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPAPSK) -+ psta->state &= (~WIFI_UNDER_KEY_HANDSHAKE); -+ } -+ } else if (key_info & WPA_KEY_INFO_MIC) { -+ if (key_data_length == 0) { -+ RTW_PRINT("%s eapol packet 4/4\n", trx_msg); -+ eapol_type = EAPOL_4_4; -+ } else if (key_info & WPA_KEY_INFO_ACK) { -+ RTW_PRINT("%s eapol packet 3/4\n", trx_msg); -+ eapol_type = EAPOL_3_4; -+ } else { -+ RTW_PRINT("%s eapol packet 2/4\n", trx_msg); -+ eapol_type = EAPOL_2_4; -+ } -+ } else { -+ RTW_PRINT("%s eapol packet 1/4\n", trx_msg); -+ eapol_type = EAPOL_1_4; -+ } -+ -+ return eapol_type; -+} -+ -+unsigned int is_ap_in_tkip(_adapter *padapter) -+{ -+ u32 i; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ -+ if (rtw_get_capability((WLAN_BSSID_EX *)cur_network) & WLAN_CAPABILITY_PRIVACY) { -+ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i); -+ -+ switch (pIE->ElementID) { -+ case _VENDOR_SPECIFIC_IE_: -+ if ((_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4)) && (_rtw_memcmp((pIE->data + 12), WPA_TKIP_CIPHER, 4))) -+ return _TRUE; -+ break; -+ -+ case _RSN_IE_2_: -+ if (_rtw_memcmp((pIE->data + 8), RSN_TKIP_CIPHER, 4)) -+ return _TRUE; -+ -+ default: -+ break; -+ } -+ -+ i += (pIE->Length + 2); -+ } -+ -+ return _FALSE; -+ } else -+ return _FALSE; -+ -+} -+ -+unsigned int should_forbid_n_rate(_adapter *padapter) -+{ -+ u32 i; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ WLAN_BSSID_EX *cur_network = &pmlmepriv->cur_network.network; -+ -+ if (rtw_get_capability((WLAN_BSSID_EX *)cur_network) & WLAN_CAPABILITY_PRIVACY) { -+ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < cur_network->IELength;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(cur_network->IEs + i); -+ -+ switch (pIE->ElementID) { -+ case _VENDOR_SPECIFIC_IE_: -+ if (_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4) && -+ ((_rtw_memcmp((pIE->data + 12), WPA_CIPHER_SUITE_CCMP, 4)) || -+ (_rtw_memcmp((pIE->data + 16), WPA_CIPHER_SUITE_CCMP, 4)))) -+ return _FALSE; -+ break; -+ -+ case _RSN_IE_2_: -+ if ((_rtw_memcmp((pIE->data + 8), RSN_CIPHER_SUITE_CCMP, 4)) || -+ (_rtw_memcmp((pIE->data + 12), RSN_CIPHER_SUITE_CCMP, 4))) -+ return _FALSE; -+ -+ default: -+ break; -+ } -+ -+ i += (pIE->Length + 2); -+ } -+ -+ return _TRUE; -+ } else -+ return _FALSE; -+ -+} -+ -+ -+unsigned int is_ap_in_wep(_adapter *padapter) -+{ -+ u32 i; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ -+ if (rtw_get_capability((WLAN_BSSID_EX *)cur_network) & WLAN_CAPABILITY_PRIVACY) { -+ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i); -+ -+ switch (pIE->ElementID) { -+ case _VENDOR_SPECIFIC_IE_: -+ if (_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4)) -+ return _FALSE; -+ break; -+ -+ case _RSN_IE_2_: -+ return _FALSE; -+ -+ default: -+ break; -+ } -+ -+ i += (pIE->Length + 2); -+ } -+ -+ return _TRUE; -+ } else -+ return _FALSE; -+ -+} -+ -+int wifirate2_ratetbl_inx(unsigned char rate); -+int wifirate2_ratetbl_inx(unsigned char rate) -+{ -+ int inx = 0; -+ rate = rate & 0x7f; -+ -+ switch (rate) { -+ case 54*2: -+ inx = 11; -+ break; -+ -+ case 48*2: -+ inx = 10; -+ break; -+ -+ case 36*2: -+ inx = 9; -+ break; -+ -+ case 24*2: -+ inx = 8; -+ break; -+ -+ case 18*2: -+ inx = 7; -+ break; -+ -+ case 12*2: -+ inx = 6; -+ break; -+ -+ case 9*2: -+ inx = 5; -+ break; -+ -+ case 6*2: -+ inx = 4; -+ break; -+ -+ case 11*2: -+ inx = 3; -+ break; -+ case 11: -+ inx = 2; -+ break; -+ -+ case 2*2: -+ inx = 1; -+ break; -+ -+ case 1*2: -+ inx = 0; -+ break; -+ -+ } -+ return inx; -+} -+ -+unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz) -+{ -+ unsigned int i, num_of_rate; -+ unsigned int mask = 0; -+ -+ num_of_rate = (ptn_sz > NumRates) ? NumRates : ptn_sz; -+ -+ for (i = 0; i < num_of_rate; i++) { -+ if ((*(ptn + i)) & 0x80) -+ mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i)); -+ } -+ return mask; -+} -+ -+unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz) -+{ -+ unsigned int i, num_of_rate; -+ unsigned int mask = 0; -+ -+ num_of_rate = (ptn_sz > NumRates) ? NumRates : ptn_sz; -+ -+ for (i = 0; i < num_of_rate; i++) -+ mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i)); -+ -+ return mask; -+} -+ -+int support_short_GI(_adapter *padapter, struct HT_caps_element *pHT_caps, u8 bwmode) -+{ -+ unsigned char bit_offset; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if (!(pmlmeinfo->HT_enable)) -+ return _FAIL; -+ -+ bit_offset = (bwmode & CHANNEL_WIDTH_40) ? 6 : 5; -+ -+ if (pHT_caps->u.HT_cap_element.HT_caps_info & (0x1 << bit_offset)) -+ return _SUCCESS; -+ else -+ return _FAIL; -+} -+ -+unsigned char get_highest_rate_idx(u64 mask) -+{ -+ int i; -+ unsigned char rate_idx = 0; -+ -+ for (i = 63; i >= 0; i--) { -+ if ((mask >> i) & 0x01) { -+ rate_idx = i; -+ break; -+ } -+ } -+ -+ return rate_idx; -+} -+unsigned char get_lowest_rate_idx_ex(u64 mask, int start_bit) -+{ -+ int i; -+ unsigned char rate_idx = 0; -+ -+ for (i = start_bit; i < 64; i++) { -+ if ((mask >> i) & 0x01) { -+ rate_idx = i; -+ break; -+ } -+ } -+ -+ return rate_idx; -+} -+ -+void Update_RA_Entry(_adapter *padapter, struct sta_info *psta) -+{ -+ rtw_hal_update_ra_mask(psta); -+} -+ -+void set_sta_rate(_adapter *padapter, struct sta_info *psta) -+{ -+ /* rate adaptive */ -+ rtw_hal_update_ra_mask(psta); -+} -+ -+/* Update RRSR and Rate for USERATE */ -+void update_tx_basic_rate(_adapter *padapter, u8 wirelessmode) -+{ -+ NDIS_802_11_RATES_EX supported_rates; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ -+ /* Added by Albert 2011/03/22 */ -+ /* In the P2P mode, the driver should not support the b mode. */ -+ /* So, the Tx packet shouldn't use the CCK rate */ -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ return; -+#endif /* CONFIG_P2P */ -+ -+ _rtw_memset(supported_rates, 0, NDIS_802_11_LENGTH_RATES_EX); -+ -+ /* clear B mod if current channel is in 5G band, avoid tx cck rate in 5G band. */ -+ if (pmlmeext->cur_channel > 14) -+ wirelessmode &= ~(WIRELESS_11B); -+ -+ if ((wirelessmode & WIRELESS_11B) && (wirelessmode == WIRELESS_11B)) -+ _rtw_memcpy(supported_rates, rtw_basic_rate_cck, 4); -+ else if (wirelessmode & WIRELESS_11B) -+ _rtw_memcpy(supported_rates, rtw_basic_rate_mix, 7); -+ else -+ _rtw_memcpy(supported_rates, rtw_basic_rate_ofdm, 3); -+ -+ if (wirelessmode & WIRELESS_11B) -+ update_mgnt_tx_rate(padapter, IEEE80211_CCK_RATE_1MB); -+ else -+ update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, supported_rates); -+} -+ -+unsigned char check_assoc_AP(u8 *pframe, uint len) -+{ -+ unsigned int i; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ -+ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < len;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i); -+ -+ switch (pIE->ElementID) { -+ case _VENDOR_SPECIFIC_IE_: -+ if ((_rtw_memcmp(pIE->data, ARTHEROS_OUI1, 3)) || (_rtw_memcmp(pIE->data, ARTHEROS_OUI2, 3))) { -+ RTW_INFO("link to Artheros AP\n"); -+ return HT_IOT_PEER_ATHEROS; -+ } else if ((_rtw_memcmp(pIE->data, BROADCOM_OUI1, 3)) -+ || (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3)) -+ || (_rtw_memcmp(pIE->data, BROADCOM_OUI3, 3))) { -+ RTW_INFO("link to Broadcom AP\n"); -+ return HT_IOT_PEER_BROADCOM; -+ } else if (_rtw_memcmp(pIE->data, MARVELL_OUI, 3)) { -+ RTW_INFO("link to Marvell AP\n"); -+ return HT_IOT_PEER_MARVELL; -+ } else if (_rtw_memcmp(pIE->data, RALINK_OUI, 3)) { -+ RTW_INFO("link to Ralink AP\n"); -+ return HT_IOT_PEER_RALINK; -+ } else if (_rtw_memcmp(pIE->data, CISCO_OUI, 3)) { -+ RTW_INFO("link to Cisco AP\n"); -+ return HT_IOT_PEER_CISCO; -+ } else if (_rtw_memcmp(pIE->data, REALTEK_OUI, 3)) { -+ u32 Vender = HT_IOT_PEER_REALTEK; -+ -+ if (pIE->Length >= 5) { -+ if (pIE->data[4] == 1) { -+ /* if(pIE->data[5] & RT_HT_CAP_USE_LONG_PREAMBLE) */ -+ /* bssDesc->BssHT.RT2RT_HT_Mode |= RT_HT_CAP_USE_LONG_PREAMBLE; */ -+ -+ if (pIE->data[5] & RT_HT_CAP_USE_92SE) { -+ /* bssDesc->BssHT.RT2RT_HT_Mode |= RT_HT_CAP_USE_92SE; */ -+ Vender = HT_IOT_PEER_REALTEK_92SE; -+ } -+ } -+ -+ if (pIE->data[5] & RT_HT_CAP_USE_SOFTAP) -+ Vender = HT_IOT_PEER_REALTEK_SOFTAP; -+ -+ if (pIE->data[4] == 2) { -+ if (pIE->data[6] & RT_HT_CAP_USE_JAGUAR_BCUT) { -+ Vender = HT_IOT_PEER_REALTEK_JAGUAR_BCUTAP; -+ RTW_INFO("link to Realtek JAGUAR_BCUTAP\n"); -+ } -+ if (pIE->data[6] & RT_HT_CAP_USE_JAGUAR_CCUT) { -+ Vender = HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP; -+ RTW_INFO("link to Realtek JAGUAR_CCUTAP\n"); -+ } -+ } -+ } -+ -+ RTW_INFO("link to Realtek AP\n"); -+ return Vender; -+ } else if (_rtw_memcmp(pIE->data, AIRGOCAP_OUI, 3)) { -+ RTW_INFO("link to Airgo Cap\n"); -+ return HT_IOT_PEER_AIRGO; -+ } else -+ break; -+ -+ default: -+ break; -+ } -+ -+ i += (pIE->Length + 2); -+ } -+ -+ RTW_INFO("link to new AP\n"); -+ return HT_IOT_PEER_UNKNOWN; -+} -+ -+void get_assoc_AP_Vendor(char *vendor, u8 assoc_AP_vendor) -+{ -+ switch (assoc_AP_vendor) { -+ -+ case HT_IOT_PEER_UNKNOWN: -+ sprintf(vendor, "%s", "unknown"); -+ break; -+ -+ case HT_IOT_PEER_REALTEK: -+ case HT_IOT_PEER_REALTEK_92SE: -+ case HT_IOT_PEER_REALTEK_SOFTAP: -+ case HT_IOT_PEER_REALTEK_JAGUAR_BCUTAP: -+ case HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP: -+ -+ sprintf(vendor, "%s", "Realtek"); -+ break; -+ -+ case HT_IOT_PEER_BROADCOM: -+ sprintf(vendor, "%s", "Broadcom"); -+ break; -+ -+ case HT_IOT_PEER_MARVELL: -+ sprintf(vendor, "%s", "Marvell"); -+ break; -+ -+ case HT_IOT_PEER_RALINK: -+ sprintf(vendor, "%s", "Ralink"); -+ break; -+ -+ case HT_IOT_PEER_CISCO: -+ sprintf(vendor, "%s", "Cisco"); -+ break; -+ -+ case HT_IOT_PEER_AIRGO: -+ sprintf(vendor, "%s", "Airgo"); -+ break; -+ -+ case HT_IOT_PEER_ATHEROS: -+ sprintf(vendor, "%s", "Atheros"); -+ break; -+ -+ default: -+ sprintf(vendor, "%s", "unkown"); -+ break; -+ } -+ -+} -+#ifdef CONFIG_RTS_FULL_BW -+void rtw_parse_sta_vendor_ie_8812(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len) -+{ -+ unsigned char REALTEK_OUI[] = {0x00,0xe0, 0x4c}; -+ u8 *p; -+ -+ p = rtw_get_ie_ex(tlv_ies, tlv_ies_len, WLAN_EID_VENDOR_SPECIFIC, REALTEK_OUI, 3, NULL, NULL); -+ if (!p) -+ goto exit; -+ else { -+ if(*(p+1) > 6 ) { -+ -+ if(*(p+6) != 2) -+ goto exit; -+ -+ if(*(p+8) == RT_HT_CAP_USE_JAGUAR_BCUT) -+ sta->vendor_8812 = TRUE; -+ else if (*(p+8) == RT_HT_CAP_USE_JAGUAR_CCUT) -+ sta->vendor_8812 = TRUE; -+ } -+ } -+exit: -+ return; -+} -+#endif/*CONFIG_RTS_FULL_BW*/ -+ -+#ifdef CONFIG_80211AC_VHT -+void get_vht_bf_cap(u8 *pframe, uint len, struct vht_bf_cap *bf_cap) -+{ -+ unsigned int i; -+ PNDIS_802_11_VARIABLE_IEs pIE; -+ -+ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < len;) { -+ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i); -+ -+ switch (pIE->ElementID) { -+ -+ case EID_VHTCapability: -+ bf_cap->is_mu_bfer = GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data); -+ bf_cap->su_sound_dim = GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pIE->data); -+ break; -+ default: -+ break; -+ } -+ i += (pIE->Length + 2); -+ } -+} -+#endif -+ -+void update_capinfo(PADAPTER Adapter, u16 updateCap) -+{ -+ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ BOOLEAN ShortPreamble; -+ -+ /* Check preamble mode, 2005.01.06, by rcnjko. */ -+ /* Mark to update preamble value forever, 2008.03.18 by lanhsin */ -+ /* if( pMgntInfo->RegPreambleMode == PREAMBLE_AUTO ) */ -+ { -+ -+ if (updateCap & cShortPreamble) { -+ /* Short Preamble */ -+ if (pmlmeinfo->preamble_mode != PREAMBLE_SHORT) { /* PREAMBLE_LONG or PREAMBLE_AUTO */ -+ ShortPreamble = _TRUE; -+ pmlmeinfo->preamble_mode = PREAMBLE_SHORT; -+ rtw_hal_set_hwreg(Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble); -+ } -+ } else { -+ /* Long Preamble */ -+ if (pmlmeinfo->preamble_mode != PREAMBLE_LONG) { /* PREAMBLE_SHORT or PREAMBLE_AUTO */ -+ ShortPreamble = _FALSE; -+ pmlmeinfo->preamble_mode = PREAMBLE_LONG; -+ rtw_hal_set_hwreg(Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble); -+ } -+ } -+ } -+ -+ if (updateCap & cIBSS) { -+ /* Filen: See 802.11-2007 p.91 */ -+ pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; -+ } else { -+ /* Filen: See 802.11-2007 p.90 */ -+ if (pmlmeext->cur_wireless_mode & (WIRELESS_11_24N | WIRELESS_11A | WIRELESS_11_5N | WIRELESS_11AC)) -+ pmlmeinfo->slotTime = SHORT_SLOT_TIME; -+ else if (pmlmeext->cur_wireless_mode & (WIRELESS_11G)) { -+ if ((updateCap & cShortSlotTime) /* && (!(pMgntInfo->pHTInfo->RT2RT_HT_Mode & RT_HT_CAP_USE_LONG_PREAMBLE)) */) { -+ /* Short Slot Time */ -+ pmlmeinfo->slotTime = SHORT_SLOT_TIME; -+ } else { -+ /* Long Slot Time */ -+ pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; -+ } -+ } else { -+ /* B Mode */ -+ pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; -+ } -+ } -+ -+ rtw_hal_set_hwreg(Adapter, HW_VAR_SLOT_TIME, &pmlmeinfo->slotTime); -+ -+} -+ -+/* -+* set adapter.mlmeextpriv.mlmext_info.HT_enable -+* set adapter.mlmeextpriv.cur_wireless_mode -+* set SIFS register -+* set mgmt tx rate -+*/ -+void update_wireless_mode(_adapter *padapter) -+{ -+ int ratelen, network_type = 0; -+ u32 SIFS_Timer; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ unsigned char *rate = cur_network->SupportedRates; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ -+ ratelen = rtw_get_rateset_len(cur_network->SupportedRates); -+ -+ if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) -+ pmlmeinfo->HT_enable = 1; -+ -+ if (pmlmeext->cur_channel > 14) { -+ if (pmlmeinfo->VHT_enable) -+ network_type = WIRELESS_11AC; -+ else if (pmlmeinfo->HT_enable) -+ network_type = WIRELESS_11_5N; -+ -+ network_type |= WIRELESS_11A; -+ } else { -+ if (pmlmeinfo->VHT_enable) -+ network_type = WIRELESS_11AC; -+ else if (pmlmeinfo->HT_enable) -+ network_type = WIRELESS_11_24N; -+ -+ if ((cckratesonly_included(rate, ratelen)) == _TRUE) -+ network_type |= WIRELESS_11B; -+ else if ((cckrates_included(rate, ratelen)) == _TRUE) -+ network_type |= WIRELESS_11BG; -+ else -+ network_type |= WIRELESS_11G; -+ } -+ -+ pmlmeext->cur_wireless_mode = network_type & padapter->registrypriv.wireless_mode; -+ /* RTW_INFO("network_type=%02x, padapter->registrypriv.wireless_mode=%02x\n", network_type, padapter->registrypriv.wireless_mode); */ -+ -+#ifndef RTW_HALMAC -+ /* HALMAC IC do not set HW_VAR_RESP_SIFS here */ -+#if 0 -+ if ((pmlmeext->cur_wireless_mode == WIRELESS_11G) || -+ (pmlmeext->cur_wireless_mode == WIRELESS_11BG)) /* WIRELESS_MODE_G) */ -+ SIFS_Timer = 0x0a0a;/* CCK */ -+ else -+ SIFS_Timer = 0x0e0e;/* pHalData->SifsTime; //OFDM */ -+#endif -+ -+ SIFS_Timer = 0x0a0a0808; /* 0x0808->for CCK, 0x0a0a->for OFDM -+ * change this value if having IOT issues. */ -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_RESP_SIFS, (u8 *)&SIFS_Timer); -+#endif -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_WIRELESS_MODE, (u8 *)&(pmlmeext->cur_wireless_mode)); -+ -+ if ((pmlmeext->cur_wireless_mode & WIRELESS_11B) -+ #ifdef CONFIG_P2P -+ && (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) -+ #ifdef CONFIG_IOCTL_CFG80211 -+ || !rtw_cfg80211_iface_has_p2p_group_cap(padapter) -+ #endif -+ ) -+ #endif -+ ) -+ update_mgnt_tx_rate(padapter, IEEE80211_CCK_RATE_1MB); -+ else -+ update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB); -+} -+ -+void fire_write_MAC_cmd(_adapter *padapter, unsigned int addr, unsigned int value); -+void fire_write_MAC_cmd(_adapter *padapter, unsigned int addr, unsigned int value) -+{ -+#if 0 -+ struct cmd_obj *ph2c; -+ struct reg_rw_parm *pwriteMacPara; -+ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); -+ -+ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (ph2c == NULL) -+ return; -+ -+ pwriteMacPara = (struct reg_rw_parm *)rtw_malloc(sizeof(struct reg_rw_parm)); -+ if (pwriteMacPara == NULL) { -+ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); -+ return; -+ } -+ -+ pwriteMacPara->rw = 1; -+ pwriteMacPara->addr = addr; -+ pwriteMacPara->value = value; -+ -+ init_h2fwcmd_w_parm_no_rsp(ph2c, pwriteMacPara, GEN_CMD_CODE(_Write_MACREG)); -+ rtw_enqueue_cmd(pcmdpriv, ph2c); -+#endif -+} -+ -+void update_sta_basic_rate(struct sta_info *psta, u8 wireless_mode) -+{ -+ if (IsSupportedTxCCK(wireless_mode)) { -+ /* Only B, B/G, and B/G/N AP could use CCK rate */ -+ _rtw_memcpy(psta->bssrateset, rtw_basic_rate_cck, 4); -+ psta->bssratelen = 4; -+ } else { -+ _rtw_memcpy(psta->bssrateset, rtw_basic_rate_ofdm, 3); -+ psta->bssratelen = 3; -+ } -+} -+ -+int rtw_ies_get_supported_rate(u8 *ies, uint ies_len, u8 *rate_set, u8 *rate_num) -+{ -+ u8 *ie, *p; -+ unsigned int ie_len; -+ int i, j; -+ -+ struct support_rate_handler support_rate_tbl[] = { -+ {IEEE80211_CCK_RATE_1MB, _FALSE, _FALSE}, -+ {IEEE80211_CCK_RATE_2MB, _FALSE, _FALSE}, -+ {IEEE80211_CCK_RATE_5MB, _FALSE, _FALSE}, -+ {IEEE80211_CCK_RATE_11MB, _FALSE, _FALSE}, -+ {IEEE80211_OFDM_RATE_6MB, _FALSE, _FALSE}, -+ {IEEE80211_OFDM_RATE_9MB, _FALSE, _FALSE}, -+ {IEEE80211_OFDM_RATE_12MB, _FALSE, _FALSE}, -+ {IEEE80211_OFDM_RATE_18MB, _FALSE, _FALSE}, -+ {IEEE80211_OFDM_RATE_24MB, _FALSE, _FALSE}, -+ {IEEE80211_OFDM_RATE_36MB, _FALSE, _FALSE}, -+ {IEEE80211_OFDM_RATE_48MB, _FALSE, _FALSE}, -+ {IEEE80211_OFDM_RATE_54MB, _FALSE, _FALSE}, -+ }; -+ -+ if (!rate_set || !rate_num) -+ return _FALSE; -+ -+ *rate_num = 0; -+ ie = rtw_get_ie(ies, _SUPPORTEDRATES_IE_, &ie_len, ies_len); -+ if (ie == NULL) -+ goto ext_rate; -+ -+ /* get valid supported rates */ -+ for (i = 0; i < 12; i++) { -+ p = ie + 2; -+ for (j = 0; j < ie_len; j++) { -+ if ((*p & ~BIT(7)) == support_rate_tbl[i].rate){ -+ support_rate_tbl[i].existence = _TRUE; -+ if ((*p) & BIT(7)) -+ support_rate_tbl[i].basic = _TRUE; -+ } -+ p++; -+ } -+ } -+ -+ext_rate: -+ ie = rtw_get_ie(ies, _EXT_SUPPORTEDRATES_IE_, &ie_len, ies_len); -+ if (ie) { -+ /* get valid extended supported rates */ -+ for (i = 0; i < 12; i++) { -+ p = ie + 2; -+ for (j = 0; j < ie_len; j++) { -+ if ((*p & ~BIT(7)) == support_rate_tbl[i].rate){ -+ support_rate_tbl[i].existence = _TRUE; -+ if ((*p) & BIT(7)) -+ support_rate_tbl[i].basic = _TRUE; -+ } -+ p++; -+ } -+ } -+ } -+ -+ for (i = 0; i < 12; i++){ -+ if (support_rate_tbl[i].existence){ -+ if (support_rate_tbl[i].basic) -+ rate_set[*rate_num] = support_rate_tbl[i].rate | IEEE80211_BASIC_RATE_MASK; -+ else -+ rate_set[*rate_num] = support_rate_tbl[i].rate; -+ *rate_num += 1; -+ } -+ } -+ -+ if (*rate_num == 0) -+ return _FAIL; -+ -+ if (0) { -+ int i; -+ -+ for (i = 0; i < *rate_num; i++) -+ RTW_INFO("rate:0x%02x\n", *(rate_set + i)); -+ } -+ -+ return _SUCCESS; -+} -+ -+void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr) -+{ -+ struct sta_info *psta; -+ u16 tid, start_seq, param; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct ADDBA_request *preq = (struct ADDBA_request *)paddba_req; -+ u8 size, accept = _FALSE; -+ -+ psta = rtw_get_stainfo(pstapriv, addr); -+ if (!psta) -+ goto exit; -+ -+ start_seq = le16_to_cpu(preq->BA_starting_seqctrl) >> 4; -+ -+ param = le16_to_cpu(preq->BA_para_set); -+ tid = (param >> 2) & 0x0f; -+ -+ -+ accept = rtw_rx_ampdu_is_accept(padapter); -+ if (padapter->fix_rx_ampdu_size != RX_AMPDU_SIZE_INVALID) -+ size = padapter->fix_rx_ampdu_size; -+ else { -+ size = rtw_rx_ampdu_size(padapter); -+ size = rtw_min(size, rx_ampdu_size_sta_limit(padapter, psta)); -+ } -+ -+ if (accept == _TRUE) -+ rtw_addbarsp_cmd(padapter, addr, tid, 0, size, start_seq); -+ else -+ rtw_addbarsp_cmd(padapter, addr, tid, 37, size, start_seq); /* reject ADDBA Req */ -+ -+exit: -+ return; -+} -+ -+void rtw_process_bar_frame(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ struct sta_info *psta = NULL; -+ struct recv_reorder_ctrl *preorder_ctrl = NULL; -+ u8 tid = 0; -+ u16 start_seq=0; -+ -+ psta = rtw_get_stainfo(pstapriv, get_addr2_ptr(pframe)); -+ if (psta == NULL) -+ goto exit; -+ -+ tid = ((cpu_to_le16((*(u16 *)(pframe + 16))) & 0xf000) >> 12); -+ preorder_ctrl = &psta->recvreorder_ctrl[tid]; -+ start_seq = ((cpu_to_le16(*(u16 *)(pframe + 18))) >> 4); -+ preorder_ctrl->indicate_seq = start_seq; -+ -+ /* for Debug use */ -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" tid=%d, start_seq=%d\n", FUNC_ADPT_ARG(padapter), tid, start_seq); -+ -+exit: -+ return; -+} -+ -+void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len) -+{ -+ u8 *pIE; -+ u32 *pbuf; -+ -+ pIE = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ pbuf = (u32 *)pIE; -+ -+ pmlmeext->TSFValue = le32_to_cpu(*(pbuf + 1)); -+ -+ pmlmeext->TSFValue = pmlmeext->TSFValue << 32; -+ -+ pmlmeext->TSFValue |= le32_to_cpu(*pbuf); -+} -+ -+void correct_TSF(_adapter *padapter, u8 mlme_state) -+{ -+ u8 m_state = mlme_state; -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_CORRECT_TSF, (u8 *)&m_state); -+} -+ -+#ifdef CONFIG_BCN_RECV_TIME -+/* calculate beacon receiving time -+ 1.RxBCNTime(CCK_1M) = [192us(preamble)] + [length of beacon(byte)*8us] + [10us] -+ 2.RxBCNTime(OFDM_6M) = [8us(S) + 8us(L) + 4us(L-SIG)] + [(length of beacon(byte)/3 + 1] *4us] + [10us] -+*/ -+inline u16 _rx_bcn_time_calculate(uint bcn_len, u8 data_rate) -+{ -+ u16 rx_bcn_time = 0;/*us*/ -+ -+ if (data_rate == DESC_RATE1M) -+ rx_bcn_time = 192 + bcn_len * 8 + 10; -+ else if(data_rate == DESC_RATE6M) -+ rx_bcn_time = 8 + 8 + 4 + (bcn_len /3 + 1) * 4 + 10; -+/* -+ else -+ RTW_ERR("%s invalid data rate(0x%02x)\n", __func__, data_rate); -+*/ -+ return rx_bcn_time; -+} -+void rtw_rx_bcn_time_update(_adapter *adapter, uint bcn_len, u8 data_rate) -+{ -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ -+ pmlmeext->bcn_rx_time = _rx_bcn_time_calculate(bcn_len, data_rate); -+} -+#endif -+ -+void beacon_timing_control(_adapter *padapter) -+{ -+ rtw_hal_bcn_related_reg_setting(padapter); -+} -+ -+inline bool _rtw_macid_ctl_chk_cap(_adapter *adapter, u8 cap) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct macid_ctl_t *macid_ctl = &dvobj->macid_ctl; -+ -+ if (macid_ctl->macid_cap & cap) -+ return _TRUE; -+ return _FALSE; -+} -+ -+void dump_macid_map(void *sel, struct macid_bmp *map, u8 max_num) -+{ -+ RTW_PRINT_SEL(sel, "0x%08x\n", map->m0); -+#if (MACID_NUM_SW_LIMIT > 32) -+ if (max_num && max_num > 32) -+ RTW_PRINT_SEL(sel, "0x%08x\n", map->m1); -+#endif -+#if (MACID_NUM_SW_LIMIT > 64) -+ if (max_num && max_num > 64) -+ RTW_PRINT_SEL(sel, "0x%08x\n", map->m2); -+#endif -+#if (MACID_NUM_SW_LIMIT > 96) -+ if (max_num && max_num > 96) -+ RTW_PRINT_SEL(sel, "0x%08x\n", map->m3); -+#endif -+} -+ -+inline bool rtw_macid_is_set(struct macid_bmp *map, u8 id) -+{ -+ if (id < 32) -+ return map->m0 & BIT(id); -+#if (MACID_NUM_SW_LIMIT > 32) -+ else if (id < 64) -+ return map->m1 & BIT(id - 32); -+#endif -+#if (MACID_NUM_SW_LIMIT > 64) -+ else if (id < 96) -+ return map->m2 & BIT(id - 64); -+#endif -+#if (MACID_NUM_SW_LIMIT > 96) -+ else if (id < 128) -+ return map->m3 & BIT(id - 96); -+#endif -+ else -+ rtw_warn_on(1); -+ -+ return 0; -+} -+ -+inline void rtw_macid_map_set(struct macid_bmp *map, u8 id) -+{ -+ if (id < 32) -+ map->m0 |= BIT(id); -+#if (MACID_NUM_SW_LIMIT > 32) -+ else if (id < 64) -+ map->m1 |= BIT(id - 32); -+#endif -+#if (MACID_NUM_SW_LIMIT > 64) -+ else if (id < 96) -+ map->m2 |= BIT(id - 64); -+#endif -+#if (MACID_NUM_SW_LIMIT > 96) -+ else if (id < 128) -+ map->m3 |= BIT(id - 96); -+#endif -+ else -+ rtw_warn_on(1); -+} -+ -+inline void rtw_macid_map_clr(struct macid_bmp *map, u8 id) -+{ -+ if (id < 32) -+ map->m0 &= ~BIT(id); -+#if (MACID_NUM_SW_LIMIT > 32) -+ else if (id < 64) -+ map->m1 &= ~BIT(id - 32); -+#endif -+#if (MACID_NUM_SW_LIMIT > 64) -+ else if (id < 96) -+ map->m2 &= ~BIT(id - 64); -+#endif -+#if (MACID_NUM_SW_LIMIT > 96) -+ else if (id < 128) -+ map->m3 &= ~BIT(id - 96); -+#endif -+ else -+ rtw_warn_on(1); -+} -+ -+inline bool rtw_macid_is_used(struct macid_ctl_t *macid_ctl, u8 id) -+{ -+ return rtw_macid_is_set(&macid_ctl->used, id); -+} -+ -+inline bool rtw_macid_is_bmc(struct macid_ctl_t *macid_ctl, u8 id) -+{ -+ return rtw_macid_is_set(&macid_ctl->bmc, id); -+} -+ -+inline u8 rtw_macid_get_iface_bmp(struct macid_ctl_t *macid_ctl, u8 id) -+{ -+ int i; -+ u8 iface_bmp = 0; -+ -+ for (i = 0; i < CONFIG_IFACE_NUMBER; i++) { -+ if (rtw_macid_is_set(&macid_ctl->if_g[i], id)) -+ iface_bmp |= BIT(i); -+ } -+ return iface_bmp; -+} -+ -+inline bool rtw_macid_is_iface_shared(struct macid_ctl_t *macid_ctl, u8 id) -+{ -+#if CONFIG_IFACE_NUMBER >= 2 -+ int i; -+ u8 iface_bmp = 0; -+ -+ for (i = 0; i < CONFIG_IFACE_NUMBER; i++) { -+ if (rtw_macid_is_set(&macid_ctl->if_g[i], id)) { -+ if (iface_bmp) -+ return 1; -+ iface_bmp |= BIT(i); -+ } -+ } -+#endif -+ return 0; -+} -+ -+inline bool rtw_macid_is_iface_specific(struct macid_ctl_t *macid_ctl, u8 id, _adapter *adapter) -+{ -+ int i; -+ u8 iface_bmp = 0; -+ -+ for (i = 0; i < CONFIG_IFACE_NUMBER; i++) { -+ if (rtw_macid_is_set(&macid_ctl->if_g[i], id)) { -+ if (iface_bmp || i != adapter->iface_id) -+ return 0; -+ iface_bmp |= BIT(i); -+ } -+ } -+ -+ return iface_bmp ? 1 : 0; -+} -+ -+inline s8 rtw_macid_get_ch_g(struct macid_ctl_t *macid_ctl, u8 id) -+{ -+ int i; -+ -+ for (i = 0; i < 2; i++) { -+ if (rtw_macid_is_set(&macid_ctl->ch_g[i], id)) -+ return i; -+ } -+ return -1; -+} -+ -+/*Record bc's mac-id and sec-cam-id*/ -+inline void rtw_iface_bcmc_id_set(_adapter *padapter, u8 mac_id) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ -+ macid_ctl->iface_bmc[padapter->iface_id] = mac_id; -+} -+inline u8 rtw_iface_bcmc_id_get(_adapter *padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ -+ return macid_ctl->iface_bmc[padapter->iface_id]; -+} -+#if defined(DBG_CONFIG_ERROR_RESET) -+void rtw_iface_bcmc_sec_cam_map_restore(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = dvobj_to_sec_camctl(dvobj); -+ int cam_id = -1; -+ -+ cam_id = rtw_iface_bcmc_id_get(adapter); -+ if (cam_id != INVALID_SEC_MAC_CAM_ID) -+ rtw_sec_cam_map_set(&cam_ctl->used, cam_id); -+} -+#endif -+void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta) -+{ -+ int i; -+ _irqL irqL; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ struct macid_bmp *used_map = &macid_ctl->used; -+ /* static u8 last_id = 0; for testing */ -+ u8 last_id = 0; -+ u8 is_bc_sta = _FALSE; -+ -+ if (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), ETH_ALEN)) { -+ psta->cmn.mac_id = macid_ctl->num; -+ return; -+ } -+ -+ if (_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN)) { -+ is_bc_sta = _TRUE; -+ rtw_iface_bcmc_id_set(padapter, INVALID_SEC_MAC_CAM_ID); /*init default value*/ -+ } -+ -+ if (is_bc_sta -+ #ifndef SEC_DEFAULT_KEY_SEARCH -+ && (MLME_IS_STA(padapter) || MLME_IS_NULL(padapter)) -+ #endif -+ ) { -+ /* STA mode have no BMC data TX, shared with this macid */ -+ /* When non-concurrent, only one BMC data TX is used, shared with this macid */ -+ /* TODO: When concurrent, non-security BMC data TX may use this, but will not control by specific macid sleep */ -+ i = RTW_DEFAULT_MGMT_MACID; -+ goto assigned; -+ } -+ -+ _enter_critical_bh(&macid_ctl->lock, &irqL); -+ -+ for (i = last_id; i < macid_ctl->num; i++) { -+#ifdef CONFIG_MCC_MODE -+ /* macid 0/1 reserve for mcc for mgnt queue macid */ -+ if (MCC_EN(padapter)) { -+ if (i == MCC_ROLE_STA_GC_MGMT_QUEUE_MACID) -+ continue; -+ if (i == MCC_ROLE_SOFTAP_GO_MGMT_QUEUE_MACID) -+ continue; -+ } -+#endif /* CONFIG_MCC_MODE */ -+ -+ #ifndef SEC_DEFAULT_KEY_SEARCH -+ /* for BMC data TX with force camid */ -+ if (is_bc_sta && rtw_sec_camid_is_used(dvobj_to_sec_camctl(dvobj), i)) -+ continue; -+ #endif -+ -+ if (!rtw_macid_is_used(macid_ctl, i)) -+ break; -+ } -+ -+ if (i < macid_ctl->num) { -+ -+ rtw_macid_map_set(used_map, i); -+ -+ #ifndef SEC_DEFAULT_KEY_SEARCH -+ /* for BMC data TX with force camid */ -+ if (is_bc_sta) { -+ struct cam_ctl_t *cam_ctl = dvobj_to_sec_camctl(dvobj); -+ -+ rtw_macid_map_set(&macid_ctl->bmc, i); -+ rtw_iface_bcmc_id_set(padapter, i); -+ rtw_sec_cam_map_set(&cam_ctl->used, i); -+ if (_rtw_camctl_chk_cap(padapter, SEC_CAP_CHK_EXTRA_SEC)) -+ rtw_sec_cam_map_set(&cam_ctl->used, i + 1); -+ } -+ #endif -+ -+ rtw_macid_map_set(&macid_ctl->if_g[padapter->iface_id], i); -+ macid_ctl->sta[i] = psta; -+ -+ /* TODO ch_g? */ -+ -+ last_id++; -+ last_id %= macid_ctl->num; -+ } -+ -+ _exit_critical_bh(&macid_ctl->lock, &irqL); -+ -+ if (i >= macid_ctl->num) { -+ psta->cmn.mac_id = macid_ctl->num; -+ RTW_ERR(FUNC_ADPT_FMT" if%u, mac_addr:"MAC_FMT" no available macid\n" -+ , FUNC_ADPT_ARG(padapter), padapter->iface_id + 1, MAC_ARG(psta->cmn.mac_addr)); -+ rtw_warn_on(1); -+ goto exit; -+ } else -+ goto assigned; -+ -+assigned: -+ psta->cmn.mac_id = i; -+ RTW_INFO(FUNC_ADPT_FMT" if%u, mac_addr:"MAC_FMT" macid:%u\n" -+ , FUNC_ADPT_ARG(padapter), padapter->iface_id + 1, MAC_ARG(psta->cmn.mac_addr), psta->cmn.mac_id); -+ -+exit: -+ return; -+} -+ -+void rtw_release_macid(_adapter *padapter, struct sta_info *psta) -+{ -+ _irqL irqL; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ u8 ifbmp; -+ int i; -+ -+ if (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), ETH_ALEN)) -+ goto exit; -+ -+ if (psta->cmn.mac_id >= macid_ctl->num) { -+ RTW_WARN(FUNC_ADPT_FMT" if%u, mac_addr:"MAC_FMT" macid:%u not valid\n" -+ , FUNC_ADPT_ARG(padapter), padapter->iface_id + 1 -+ , MAC_ARG(psta->cmn.mac_addr), psta->cmn.mac_id); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (psta->cmn.mac_id == RTW_DEFAULT_MGMT_MACID) -+ goto msg; -+ -+ _enter_critical_bh(&macid_ctl->lock, &irqL); -+ -+ if (!rtw_macid_is_used(macid_ctl, psta->cmn.mac_id)) { -+ RTW_WARN(FUNC_ADPT_FMT" if%u, mac_addr:"MAC_FMT" macid:%u not used\n" -+ , FUNC_ADPT_ARG(padapter), padapter->iface_id + 1 -+ , MAC_ARG(psta->cmn.mac_addr), psta->cmn.mac_id); -+ _exit_critical_bh(&macid_ctl->lock, &irqL); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ ifbmp = rtw_macid_get_iface_bmp(macid_ctl, psta->cmn.mac_id); -+ if (!(ifbmp & BIT(padapter->iface_id))) { -+ RTW_WARN(FUNC_ADPT_FMT" if%u, mac_addr:"MAC_FMT" macid:%u not used by self\n" -+ , FUNC_ADPT_ARG(padapter), padapter->iface_id + 1 -+ , MAC_ARG(psta->cmn.mac_addr), psta->cmn.mac_id); -+ _exit_critical_bh(&macid_ctl->lock, &irqL); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN)) { -+ struct cam_ctl_t *cam_ctl = dvobj_to_sec_camctl(dvobj); -+ u8 id = rtw_iface_bcmc_id_get(padapter); -+ -+ if ((id != INVALID_SEC_MAC_CAM_ID) && (id < cam_ctl->num)) { -+ rtw_sec_cam_map_clr(&cam_ctl->used, id); -+ if (_rtw_camctl_chk_cap(padapter, SEC_CAP_CHK_EXTRA_SEC)) -+ rtw_sec_cam_map_clr(&cam_ctl->used, id + 1); -+ } -+ -+ rtw_iface_bcmc_id_set(padapter, INVALID_SEC_MAC_CAM_ID); -+ } -+ -+ rtw_macid_map_clr(&macid_ctl->if_g[padapter->iface_id], psta->cmn.mac_id); -+ -+ ifbmp &= ~BIT(padapter->iface_id); -+ if (!ifbmp) { /* only used by self */ -+ rtw_macid_map_clr(&macid_ctl->used, psta->cmn.mac_id); -+ rtw_macid_map_clr(&macid_ctl->bmc, psta->cmn.mac_id); -+ for (i = 0; i < 2; i++) -+ rtw_macid_map_clr(&macid_ctl->ch_g[i], psta->cmn.mac_id); -+ macid_ctl->sta[psta->cmn.mac_id] = NULL; -+ } -+ -+ _exit_critical_bh(&macid_ctl->lock, &irqL); -+ -+msg: -+ RTW_INFO(FUNC_ADPT_FMT" if%u, mac_addr:"MAC_FMT" macid:%u\n" -+ , FUNC_ADPT_ARG(padapter), padapter->iface_id + 1 -+ , MAC_ARG(psta->cmn.mac_addr), psta->cmn.mac_id -+ ); -+ -+exit: -+ psta->cmn.mac_id = macid_ctl->num; -+} -+ -+/* For 8188E RA */ -+u8 rtw_search_max_mac_id(_adapter *padapter) -+{ -+ u8 max_mac_id = 0; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ int i; -+ _irqL irqL; -+ -+ /* TODO: Only search for connected macid? */ -+ -+ _enter_critical_bh(&macid_ctl->lock, &irqL); -+ for (i = (macid_ctl->num - 1); i > 0 ; i--) { -+ if (rtw_macid_is_used(macid_ctl, i)) -+ break; -+ } -+ _exit_critical_bh(&macid_ctl->lock, &irqL); -+ max_mac_id = i; -+ -+ return max_mac_id; -+} -+ -+inline u8 rtw_macid_ctl_set_h2c_msr(struct macid_ctl_t *macid_ctl, u8 id, u8 h2c_msr) -+{ -+ u8 op_num_change_bmp = 0; -+ -+ if (id >= macid_ctl->num) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (GET_H2CCMD_MSRRPT_PARM_OPMODE(&macid_ctl->h2c_msr[id]) -+ && !GET_H2CCMD_MSRRPT_PARM_OPMODE(&h2c_msr) -+ ) { -+ u8 role = GET_H2CCMD_MSRRPT_PARM_ROLE(&macid_ctl->h2c_msr[id]); -+ -+ if (role < H2C_MSR_ROLE_MAX) { -+ macid_ctl->op_num[role]--; -+ op_num_change_bmp |= BIT(role); -+ } -+ } else if (!GET_H2CCMD_MSRRPT_PARM_OPMODE(&macid_ctl->h2c_msr[id]) -+ && GET_H2CCMD_MSRRPT_PARM_OPMODE(&h2c_msr) -+ ) { -+ u8 role = GET_H2CCMD_MSRRPT_PARM_ROLE(&h2c_msr); -+ -+ if (role < H2C_MSR_ROLE_MAX) { -+ macid_ctl->op_num[role]++; -+ op_num_change_bmp |= BIT(role); -+ } -+ } -+ -+ macid_ctl->h2c_msr[id] = h2c_msr; -+ if (0) -+ RTW_INFO("macid:%u, h2c_msr:"H2C_MSR_FMT"\n", id, H2C_MSR_ARG(&macid_ctl->h2c_msr[id])); -+ -+exit: -+ return op_num_change_bmp; -+} -+ -+inline void rtw_macid_ctl_set_bw(struct macid_ctl_t *macid_ctl, u8 id, u8 bw) -+{ -+ if (id >= macid_ctl->num) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ macid_ctl->bw[id] = bw; -+ if (0) -+ RTW_INFO("macid:%u, bw:%s\n", id, ch_width_str(macid_ctl->bw[id])); -+} -+ -+inline void rtw_macid_ctl_set_vht_en(struct macid_ctl_t *macid_ctl, u8 id, u8 en) -+{ -+ if (id >= macid_ctl->num) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ macid_ctl->vht_en[id] = en; -+ if (0) -+ RTW_INFO("macid:%u, vht_en:%u\n", id, macid_ctl->vht_en[id]); -+} -+ -+inline void rtw_macid_ctl_set_rate_bmp0(struct macid_ctl_t *macid_ctl, u8 id, u32 bmp) -+{ -+ if (id >= macid_ctl->num) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ macid_ctl->rate_bmp0[id] = bmp; -+ if (0) -+ RTW_INFO("macid:%u, rate_bmp0:0x%08X\n", id, macid_ctl->rate_bmp0[id]); -+} -+ -+inline void rtw_macid_ctl_set_rate_bmp1(struct macid_ctl_t *macid_ctl, u8 id, u32 bmp) -+{ -+ if (id >= macid_ctl->num) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ macid_ctl->rate_bmp1[id] = bmp; -+ if (0) -+ RTW_INFO("macid:%u, rate_bmp1:0x%08X\n", id, macid_ctl->rate_bmp1[id]); -+} -+ -+#ifdef CONFIG_PROTSEL_MACSLEEP -+inline void rtw_macid_ctl_init_sleep_reg(struct macid_ctl_t *macid_ctl, u16 reg_ctrl, u16 reg_info) -+{ -+ macid_ctl->reg_sleep_ctrl = reg_ctrl; -+ macid_ctl->reg_sleep_info = reg_info; -+} -+inline void rtw_macid_ctl_init_drop_reg(struct macid_ctl_t *macid_ctl, u16 reg_ctrl, u16 reg_info) -+{ -+ macid_ctl->reg_drop_ctrl = reg_ctrl; -+ macid_ctl->reg_drop_info = reg_info; -+} -+ -+#else -+inline void rtw_macid_ctl_init_sleep_reg(struct macid_ctl_t *macid_ctl, u16 m0, u16 m1, u16 m2, u16 m3) -+{ -+ macid_ctl->reg_sleep_m0 = m0; -+#if (MACID_NUM_SW_LIMIT > 32) -+ macid_ctl->reg_sleep_m1 = m1; -+#endif -+#if (MACID_NUM_SW_LIMIT > 64) -+ macid_ctl->reg_sleep_m2 = m2; -+#endif -+#if (MACID_NUM_SW_LIMIT > 96) -+ macid_ctl->reg_sleep_m3 = m3; -+#endif -+} -+ -+inline void rtw_macid_ctl_init_drop_reg(struct macid_ctl_t *macid_ctl, u16 m0, u16 m1, u16 m2, u16 m3) -+{ -+ macid_ctl->reg_drop_m0 = m0; -+#if (MACID_NUM_SW_LIMIT > 32) -+ macid_ctl->reg_drop_m1 = m1; -+#endif -+#if (MACID_NUM_SW_LIMIT > 64) -+ macid_ctl->reg_drop_m2 = m2; -+#endif -+#if (MACID_NUM_SW_LIMIT > 96) -+ macid_ctl->reg_drop_m3 = m3; -+#endif -+} -+#endif -+ -+inline void rtw_macid_ctl_init(struct macid_ctl_t *macid_ctl) -+{ -+ int i; -+ u8 id = RTW_DEFAULT_MGMT_MACID; -+ -+ rtw_macid_map_set(&macid_ctl->used, id); -+ rtw_macid_map_set(&macid_ctl->bmc, id); -+ for (i = 0; i < CONFIG_IFACE_NUMBER; i++) -+ rtw_macid_map_set(&macid_ctl->if_g[i], id); -+ macid_ctl->sta[id] = NULL; -+ -+ _rtw_spinlock_init(&macid_ctl->lock); -+} -+ -+inline void rtw_macid_ctl_deinit(struct macid_ctl_t *macid_ctl) -+{ -+ _rtw_spinlock_free(&macid_ctl->lock); -+} -+ -+inline bool rtw_bmp_is_set(const u8 *bmp, u8 bmp_len, u8 id) -+{ -+ if (id / 8 >= bmp_len) -+ return 0; -+ -+ return bmp[id / 8] & BIT(id % 8); -+} -+ -+inline void rtw_bmp_set(u8 *bmp, u8 bmp_len, u8 id) -+{ -+ if (id / 8 < bmp_len) -+ bmp[id / 8] |= BIT(id % 8); -+} -+ -+inline void rtw_bmp_clear(u8 *bmp, u8 bmp_len, u8 id) -+{ -+ if (id / 8 < bmp_len) -+ bmp[id / 8] &= ~BIT(id % 8); -+} -+ -+inline bool rtw_bmp_not_empty(const u8 *bmp, u8 bmp_len) -+{ -+ int i; -+ -+ for (i = 0; i < bmp_len; i++) { -+ if (bmp[i]) -+ return 1; -+ } -+ -+ return 0; -+} -+ -+inline bool rtw_bmp_not_empty_exclude_bit0(const u8 *bmp, u8 bmp_len) -+{ -+ int i; -+ -+ for (i = 0; i < bmp_len; i++) { -+ if (i == 0) { -+ if (bmp[i] & 0xFE) -+ return 1; -+ } else { -+ if (bmp[i]) -+ return 1; -+ } -+ } -+ -+ return 0; -+} -+ -+#ifdef CONFIG_AP_MODE -+/* Check the id be set or not in map , if yes , return a none zero value*/ -+bool rtw_tim_map_is_set(_adapter *padapter, const u8 *map, u8 id) -+{ -+ return rtw_bmp_is_set(map, padapter->stapriv.aid_bmp_len, id); -+} -+ -+/* Set the id into map array*/ -+void rtw_tim_map_set(_adapter *padapter, u8 *map, u8 id) -+{ -+ rtw_bmp_set(map, padapter->stapriv.aid_bmp_len, id); -+} -+ -+/* Clear the id from map array*/ -+void rtw_tim_map_clear(_adapter *padapter, u8 *map, u8 id) -+{ -+ rtw_bmp_clear(map, padapter->stapriv.aid_bmp_len, id); -+} -+ -+/* Check have anyone bit be set , if yes return true*/ -+bool rtw_tim_map_anyone_be_set(_adapter *padapter, const u8 *map) -+{ -+ return rtw_bmp_not_empty(map, padapter->stapriv.aid_bmp_len); -+} -+ -+/* Check have anyone bit be set exclude bit0 , if yes return true*/ -+bool rtw_tim_map_anyone_be_set_exclude_aid0(_adapter *padapter, const u8 *map) -+{ -+ return rtw_bmp_not_empty_exclude_bit0(map, padapter->stapriv.aid_bmp_len); -+} -+#endif /* CONFIG_AP_MODE */ -+ -+#if 0 -+unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame) -+{ -+ unsigned short ATIMWindow; -+ unsigned char *pframe; -+ struct tx_desc *ptxdesc; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ unsigned int rate_len, len = 0; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ _rtw_memset(beacon_frame, 0, 256); -+ -+ pframe = beacon_frame + TXDESC_SIZE; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); -+ -+ set_frame_sub_type(pframe, WIFI_BEACON); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ len = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ /* timestamp will be inserted by hardware */ -+ pframe += 8; -+ len += 8; -+ -+ /* beacon interval: 2 bytes */ -+ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); -+ -+ pframe += 2; -+ len += 2; -+ -+ /* capability info: 2 bytes */ -+ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); -+ -+ pframe += 2; -+ len += 2; -+ -+ /* SSID */ -+ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &len); -+ -+ /* supported rates... */ -+ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &len); -+ -+ /* DS parameter set */ -+ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &len); -+ -+ /* IBSS Parameter Set... */ -+ /* ATIMWindow = cur->Configuration.ATIMWindow; */ -+ ATIMWindow = 0; -+ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &len); -+ -+ /* todo: ERP IE */ -+ -+ /* EXTERNDED SUPPORTED RATE */ -+ if (rate_len > 8) -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &len); -+ -+ if ((len + TXDESC_SIZE) > 256) { -+ /* RTW_INFO("marc: beacon frame too large\n"); */ -+ return 0; -+ } -+ -+ /* fill the tx descriptor */ -+ ptxdesc = (struct tx_desc *)beacon_frame; -+ -+ /* offset 0 */ -+ ptxdesc->txdw0 |= cpu_to_le32(len & 0x0000ffff); -+ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); /* default = 32 bytes for TX Desc */ -+ -+ /* offset 4 */ -+ ptxdesc->txdw1 |= cpu_to_le32((0x10 << QSEL_SHT) & 0x00001f00); -+ -+ /* offset 8 */ -+ ptxdesc->txdw2 |= cpu_to_le32(BMC); -+ ptxdesc->txdw2 |= cpu_to_le32(BK); -+ -+ /* offset 16 */ -+ ptxdesc->txdw4 = 0x80000000; -+ -+ /* offset 20 */ -+ ptxdesc->txdw5 = 0x00000000; /* 1M */ -+ -+ return len + TXDESC_SIZE; -+} -+#endif -+ -+_adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj) -+{ -+ _adapter *port0_iface = NULL; -+ int i; -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (get_hw_port(dvobj->padapters[i]) == HW_PORT0) -+ break; -+ } -+ -+ if (i < 0 || i >= dvobj->iface_nums) -+ rtw_warn_on(1); -+ else -+ port0_iface = dvobj->padapters[i]; -+ -+ return port0_iface; -+} -+ -+_adapter *dvobj_get_unregisterd_adapter(struct dvobj_priv *dvobj) -+{ -+ _adapter *adapter = NULL; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (dvobj->padapters[i]->registered == 0) -+ break; -+ } -+ -+ if (i < dvobj->iface_nums) -+ adapter = dvobj->padapters[i]; -+ -+ return adapter; -+} -+ -+_adapter *dvobj_get_adapter_by_addr(struct dvobj_priv *dvobj, u8 *addr) -+{ -+ _adapter *adapter = NULL; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (_rtw_memcmp(dvobj->padapters[i]->mac_addr, addr, ETH_ALEN) == _TRUE) -+ break; -+ } -+ -+ if (i < dvobj->iface_nums) -+ adapter = dvobj->padapters[i]; -+ -+ return adapter; -+} -+ -+#ifdef CONFIG_WOWLAN -+bool rtw_wowlan_parser_pattern_cmd(u8 *input, char *pattern, -+ int *pattern_len, char *bit_mask) -+{ -+ char *cp = NULL; -+ size_t len = 0; -+ int pos = 0, mask_pos = 0, res = 0; -+ -+ /* To get the pattern string after "=", when we use : -+ * iwpriv wlanX pattern=XX:XX:..:XX -+ */ -+ cp = strchr(input, '='); -+ if (cp) { -+ *cp = 0; -+ cp++; -+ input = cp; -+ } -+ -+ /* To take off the newline character '\n'(0x0a) at the end of pattern string, -+ * when we use echo xxxx > /proc/xxxx -+ */ -+ cp = strchr(input, '\n'); -+ if (cp) -+ *cp = 0; -+ -+ while (input) { -+ cp = strsep((char **)(&input), ":"); -+ -+ if (bit_mask && (strcmp(cp, "-") == 0 || -+ strcmp(cp, "xx") == 0 || -+ strcmp(cp, "--") == 0)) { -+ /* skip this byte and leave mask bit unset */ -+ } else { -+ u8 hex; -+ -+ if (strlen(cp) != 2) { -+ RTW_ERR("%s:[ERROR] hex len != 2, input=[%s]\n", -+ __func__, cp); -+ goto error; -+ } -+ -+ if (hexstr2bin(cp, &hex, 1) < 0) { -+ RTW_ERR("%s:[ERROR] pattern is invalid, input=[%s]\n", -+ __func__, cp); -+ goto error; -+ } -+ -+ pattern[pos] = hex; -+ mask_pos = pos / 8; -+ if (bit_mask) -+ bit_mask[mask_pos] |= 1 << (pos % 8); -+ } -+ -+ pos++; -+ } -+ -+ (*pattern_len) = pos; -+ -+ return _TRUE; -+error: -+ return _FALSE; -+} -+ -+void rtw_wow_pattern_sw_reset(_adapter *adapter) -+{ -+ int i; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(adapter); -+ -+ if (pwrctrlpriv->default_patterns_en == _TRUE) -+ pwrctrlpriv->wowlan_pattern_idx = DEFAULT_PATTERN_NUM; -+ else -+ pwrctrlpriv->wowlan_pattern_idx = 0; -+ -+ for (i = 0 ; i < MAX_WKFM_CAM_NUM; i++) { -+ _rtw_memset(pwrctrlpriv->patterns[i].content, '\0', sizeof(pwrctrlpriv->patterns[i].content)); -+ _rtw_memset(pwrctrlpriv->patterns[i].mask, '\0', sizeof(pwrctrlpriv->patterns[i].mask)); -+ pwrctrlpriv->patterns[i].len = 0; -+ } -+} -+ -+u8 rtw_set_default_pattern(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ u8 index = 0; -+ u8 multicast_addr[3] = {0x01, 0x00, 0x5e}; -+ u8 multicast_ip[4] = {0xe0, 0x28, 0x28, 0x2a}; -+ -+ u8 unicast_mask[5] = {0x3f, 0x70, 0x80, 0xc0, 0x03}; -+ u8 icmpv6_mask[7] = {0x00, 0x70, 0x10, 0x00, 0xc0, 0xc0, 0x3f}; -+ u8 multicast_mask[5] = {0x07, 0x70, 0x80, 0xc0, 0x03}; -+ -+ u8 ip_protocol[3] = {0x08, 0x00, 0x45}; -+ u8 ipv6_protocol[3] = {0x86, 0xdd, 0x60}; -+ -+ u8 *target = NULL; -+ -+ if (pwrpriv->default_patterns_en == _FALSE) -+ return 0; -+ -+ for (index = 0 ; index < DEFAULT_PATTERN_NUM ; index++) { -+ _rtw_memset(pwrpriv->patterns[index].content, 0, -+ sizeof(pwrpriv->patterns[index].content)); -+ _rtw_memset(pwrpriv->patterns[index].mask, 0, -+ sizeof(pwrpriv->patterns[index].mask)); -+ pwrpriv->patterns[index].len = 0; -+ } -+ -+ /*TCP/ICMP unicast*/ -+ for (index = 0 ; index < DEFAULT_PATTERN_NUM ; index++) { -+ switch (index) { -+ case 0: -+ target = pwrpriv->patterns[index].content; -+ _rtw_memcpy(target, adapter_mac_addr(adapter), -+ ETH_ALEN); -+ -+ target += ETH_TYPE_OFFSET; -+ _rtw_memcpy(target, &ip_protocol, -+ sizeof(ip_protocol)); -+ -+ /* TCP */ -+ target += (PROTOCOL_OFFSET - ETH_TYPE_OFFSET); -+ _rtw_memset(target, 0x06, 1); -+ -+ target += (IP_OFFSET - PROTOCOL_OFFSET); -+ -+ _rtw_memcpy(target, pmlmeinfo->ip_addr, -+ RTW_IP_ADDR_LEN); -+ -+ _rtw_memcpy(pwrpriv->patterns[index].mask, -+ &unicast_mask, sizeof(unicast_mask)); -+ -+ pwrpriv->patterns[index].len = -+ IP_OFFSET + RTW_IP_ADDR_LEN; -+ break; -+ case 1: -+ target = pwrpriv->patterns[index].content; -+ _rtw_memcpy(target, adapter_mac_addr(adapter), -+ ETH_ALEN); -+ -+ target += ETH_TYPE_OFFSET; -+ _rtw_memcpy(target, &ip_protocol, sizeof(ip_protocol)); -+ -+ /* ICMP */ -+ target += (PROTOCOL_OFFSET - ETH_TYPE_OFFSET); -+ _rtw_memset(target, 0x01, 1); -+ -+ target += (IP_OFFSET - PROTOCOL_OFFSET); -+ _rtw_memcpy(target, pmlmeinfo->ip_addr, -+ RTW_IP_ADDR_LEN); -+ -+ _rtw_memcpy(pwrpriv->patterns[index].mask, -+ &unicast_mask, sizeof(unicast_mask)); -+ pwrpriv->patterns[index].len = -+ -+ IP_OFFSET + RTW_IP_ADDR_LEN; -+ break; -+#ifdef CONFIG_IPV6 -+ case 2: -+ if (pwrpriv->wowlan_ns_offload_en == _TRUE) { -+ target = pwrpriv->patterns[index].content; -+ target += ETH_TYPE_OFFSET; -+ -+ _rtw_memcpy(target, &ipv6_protocol, -+ sizeof(ipv6_protocol)); -+ -+ /* ICMPv6 */ -+ target += (IPv6_PROTOCOL_OFFSET - -+ ETH_TYPE_OFFSET); -+ _rtw_memset(target, 0x3a, 1); -+ -+ target += (IPv6_OFFSET - IPv6_PROTOCOL_OFFSET); -+ _rtw_memcpy(target, pmlmeinfo->ip6_addr, -+ RTW_IPv6_ADDR_LEN); -+ -+ _rtw_memcpy(pwrpriv->patterns[index].mask, -+ &icmpv6_mask, sizeof(icmpv6_mask)); -+ pwrpriv->patterns[index].len = -+ IPv6_OFFSET + RTW_IPv6_ADDR_LEN; -+ } -+ break; -+#endif /*CONFIG_IPV6*/ -+ case 3: -+ target = pwrpriv->patterns[index].content; -+ _rtw_memcpy(target, &multicast_addr, -+ sizeof(multicast_addr)); -+ -+ target += ETH_TYPE_OFFSET; -+ _rtw_memcpy(target, &ip_protocol, sizeof(ip_protocol)); -+ -+ /* UDP */ -+ target += (PROTOCOL_OFFSET - ETH_TYPE_OFFSET); -+ _rtw_memset(target, 0x11, 1); -+ -+ target += (IP_OFFSET - PROTOCOL_OFFSET); -+ _rtw_memcpy(target, &multicast_ip, -+ sizeof(multicast_ip)); -+ -+ _rtw_memcpy(pwrpriv->patterns[index].mask, -+ &multicast_mask, sizeof(multicast_mask)); -+ -+ pwrpriv->patterns[index].len = -+ IP_OFFSET + sizeof(multicast_ip); -+ break; -+ default: -+ break; -+ } -+ } -+ return index; -+} -+ -+void rtw_dump_priv_pattern(_adapter *adapter, u8 idx) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ char str_1[128]; -+ char *p_str; -+ u8 val8 = 0; -+ int i = 0, j = 0, len = 0, max_len = 0; -+ -+ RTW_INFO("=========[%d]========\n", idx); -+ -+ RTW_INFO(">>>priv_pattern_content:\n"); -+ p_str = str_1; -+ max_len = sizeof(str_1); -+ for (i = 0 ; i < MAX_WKFM_PATTERN_SIZE / 8 ; i++) { -+ _rtw_memset(p_str, 0, max_len); -+ len = 0; -+ for (j = 0 ; j < 8 ; j++) { -+ val8 = pwrctl->patterns[idx].content[i * 8 + j]; -+ len += snprintf(p_str + len, max_len - len, -+ "%02x ", val8); -+ } -+ RTW_INFO("%s\n", p_str); -+ } -+ -+ RTW_INFO(">>>priv_pattern_mask:\n"); -+ for (i = 0 ; i < MAX_WKFM_SIZE / 8 ; i++) { -+ _rtw_memset(p_str, 0, max_len); -+ len = 0; -+ for (j = 0 ; j < 8 ; j++) { -+ val8 = pwrctl->patterns[idx].mask[i * 8 + j]; -+ len += snprintf(p_str + len, max_len - len, -+ "%02x ", val8); -+ } -+ RTW_INFO("%s\n", p_str); -+ } -+ -+ RTW_INFO(">>>priv_pattern_len:\n"); -+ RTW_INFO("%s: len: %d\n", __func__, pwrctl->patterns[idx].len); -+} -+ -+void rtw_wow_pattern_sw_dump(_adapter *adapter) -+{ -+ int i; -+ -+ RTW_INFO("********[RTK priv-patterns]*********\n"); -+ for (i = 0 ; i < MAX_WKFM_CAM_NUM; i++) -+ rtw_dump_priv_pattern(adapter, i); -+} -+ -+void rtw_get_sec_iv(PADAPTER padapter, u8 *pcur_dot11txpn, u8 *StaAddr) -+{ -+ struct sta_info *psta; -+ struct security_priv *psecpriv = &padapter->securitypriv; -+ -+ _rtw_memset(pcur_dot11txpn, 0, 8); -+ if (NULL == StaAddr) -+ return; -+ psta = rtw_get_stainfo(&padapter->stapriv, StaAddr); -+ RTW_INFO("%s(): StaAddr: %02x %02x %02x %02x %02x %02x\n", -+ __func__, StaAddr[0], StaAddr[1], StaAddr[2], -+ StaAddr[3], StaAddr[4], StaAddr[5]); -+ -+ if (psta) { -+ if ((psecpriv->dot11PrivacyAlgrthm == _AES_) || -+ (psecpriv->dot11PrivacyAlgrthm == _CCMP_256_)) -+ AES_IV(pcur_dot11txpn, psta->dot11txpn, 0); -+ else if (psecpriv->dot11PrivacyAlgrthm == _TKIP_) -+ TKIP_IV(pcur_dot11txpn, psta->dot11txpn, 0); -+ else if ((psecpriv->dot11PrivacyAlgrthm == _GCMP_) || -+ (psecpriv->dot11PrivacyAlgrthm == _GCMP_256_)) -+ GCMP_IV(pcur_dot11txpn, psta->dot11txpn, 0); -+ -+ RTW_INFO("%s(): CurrentIV: %02x %02x %02x %02x %02x %02x %02x %02x\n" -+ , __func__, pcur_dot11txpn[0], pcur_dot11txpn[1], -+ pcur_dot11txpn[2], pcur_dot11txpn[3], pcur_dot11txpn[4], -+ pcur_dot11txpn[5], pcur_dot11txpn[6], pcur_dot11txpn[7]); -+ } -+} -+ -+#ifdef CONFIG_WAR_OFFLOAD -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+void rtw_wow_war_mdns_dump_buf(struct seq_file *m, u8 *title, u8 *buf, u32 len) -+{ -+ u32 i; -+ -+ RTW_PRINT_SEL(m, "\t%s (%d)\n\t\t", title, len); -+ for (i = 1; i <= len; i++) -+ { -+ RTW_PRINT_SEL(m, "%2.2x-", *(buf + i - 1)); -+ if( (i%16 == 0) && (len != i) ) RTW_PRINT_SEL(m, "\n\t\t"); -+ } -+ RTW_PRINT_SEL(m, "\n\n"); -+} -+ -+void rtw_wow_war_mdns_dump_txt(struct seq_file *m, u8 *title, u8 *buf, u32 len) -+{ -+ u16 idx=1, offset=0; /* offset = the location of L in the Length.Value */ -+ -+ RTW_PRINT_SEL(m, "\t%s (%d)\n\t", title, len); -+ for (; offset < len; idx++) -+ { -+ int item_len = buf[offset]; -+ u8 item_buf[256]={0}; -+ -+ _rtw_memcpy(item_buf, (buf + offset + 1), item_len); -+ RTW_PRINT_SEL(m, "\t[%d] => %s (%d)\n\t", idx, item_buf, item_len); -+ _rtw_memset(item_buf, 0, sizeof(item_buf)); -+ offset += (1+item_len); -+ } -+ RTW_PRINT_SEL(m, "\n\n"); -+} -+ -+bool rtw_wow_war_mdns_parser_pattern(u8 *input, char *target, -+ u32 *target_len, u32 type) -+{ -+ char *cp = NULL, *end = NULL; -+ size_t len = 0; -+ int pos = 0, mask_pos = 0, res = 0; -+ u8 member[2] = {0}; -+ -+ /* reset */ -+ _rtw_memset(target, '\0', type); -+ (*target_len) = 0; -+ -+ cp = strchr(input, '='); -+ if (cp) { -+ *cp = 0; -+ cp++; -+ input = cp; -+ } -+ -+ while (1) { -+ cp = strchr(input, ':'); -+ -+ if (cp) { -+ len = strlen(input) - strlen(cp); -+ *cp = 0; -+ cp++; -+ } else -+ len = 2; -+ -+ { -+ u8 hex,idx=0, pos_in_unit_as_4bit = 0; -+ -+ strncpy(member, input, len); -+ res = sscanf(member, "%02hhx", &hex); -+ -+ target[pos] = hex; -+ -+ /* RTW_INFO("==> in; input-member = %s, hex = %x, target[%d] = %x\n", member, hex, target[pos], pos); */ -+ -+ for(idx = 0; idx<2;idx++) -+ { -+ pos_in_unit_as_4bit = pos*2 + (1-idx); -+ mask_pos = (pos_in_unit_as_4bit /8); -+ -+ if(!IsHexDigit(member[idx])) -+ { -+ RTW_ERR("%s:[ERROR] pattern is invalid!!(%c)\n",__func__, member[idx]); -+ goto error; -+ } -+ -+ /* RTW_INFO("==> in; pos = %d, pos_in_unit_as_4bit = %d, mask-pos = %d \n", pos, pos_in_unit_as_4bit, mask_pos); -+ RTW_INFO("==> in; hex(0x%02x), member(%c%c) \n", pattern[pos], member[1], member[0]); */ -+ } -+ /* RTW_INFO_DUMP("Pattern Mask: ",bit_mask, 6); */ -+ } -+ -+ pos++; -+ if (!cp) -+ break; -+ input = cp; -+ } -+ -+ (*target_len) = pos; -+ -+ return _TRUE; -+error: -+ return _FALSE; -+ -+} -+ -+static struct war_mdns_service_info default_sinfo[] = { -+/* example of default setting */ -+ RTW_MDNS_SRV_INFO("_ipp", 4, "_tcp", 4, "local", 5, 0x02, 0x77, 7200, "KM1", 3, 0), -+ RTW_MDNS_SRV_INFO("_ipps", 5, "_tcp", 4, "local", 5, 0x02, 0x77, 7200, "KM2", 3, 0), -+ RTW_MDNS_SRV_INFO("_http", 5, "_tcp", 4, "local", 5, 0x00, 0x50, 7200, "KM3", 3, 2), -+ RTW_MDNS_SRV_INFO("_privet", 7, "_tcp", 4, "local", 5, 0x00, 0x50, 7200, "KM4", 3, 3), -+ RTW_MDNS_SRV_INFO("_https", 6, "_tcp", 4, "local", 5, 0x01, 0xbb, 7200, "KM5", 3, 2), -+ RTW_MDNS_SRV_INFO("_uscan", 6, "_tcp", 4, "local", 5, 0x1f, 0x91, 7200, "KM6", 3, 4), -+ RTW_MDNS_SRV_INFO("_printer", 8, "_tcp", 4, "local", 5, 0x23, 0x8c, 7200, "KM7", 3, 1), -+ RTW_MDNS_SRV_INFO("_pdl-datastream", 15, "_tcp", 4, "local", 5, 0x23, 0x8c, 7200, "KM8", 3, 1) -+ -+}; -+ -+void rtw_wow_war_mdns_parms_reset(_adapter *adapter, u8 is_set_default) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ u8 i =0; -+ u16 offset=0; -+ u8 default_domain_name[] = "Generic"; -+ //u8 default_machine_name[] = { 0x0a, 0x5f, 0x75, 0x6e, 0x69, 0x76, 0x65, 0x72, 0x73, 0x61, 0x6c, 0x04, 0x5f, 0x73, 0x75, 0x62 }; -+ //u8 default_machine_name_len = 16; -+ u8 default_machine_name[] = { 0x0a, 0x5f, 0x75, 0x6e, 0x69, 0x76, 0x65, 0x72, 0x73, 0x61, 0x6c}; /* length : 10 name : _universal */ -+ u8 default_machine_name_len = 11; -+ -+ /* set default txt value*/ -+ char *default_txt_rsp_0_for_serive[2] = { "_ipp", "_ipps" }; -+ char *default_txt_rsp_0[25] = { -+ "txtvers=1", "qtotal=1", "usb_MFG=KONICA MINOLTA", "usb_MDL=C754Series", -+ "rp=ipp/print","priority=54","tr=Generic 35c-4", "product=DriverName", -+ "pdl=application/postscript,image/urf,application/octet-stream,image/jpeg", -+ "adminurl=http://KM00D91C.local./wcd/a_network.xml", -+ "note=Copy Room", "Transparent=T", "Binary=T", "TBCP=T", -+ "URF=V1,4,w8,SRGB24,ADOBERGB24-48,DEVW8,DEVRGB24,DEVCMYK32,RS150000000,IS19-20-21,MT1-3,OB1,PQ4,DM1,FN3-14,CP255", -+ "rfo=ipp/faxout", "Fax=T", "Scan=T", "Duplex=T", "Color=T", "air=none", -+ "Kind=document,envelope,photo", -+ "PaperMax=tabloid-A3", "UUID=6c183832-69ba-541b-baf6-6d947c144325", "TLS=1.2" -+ }; -+ -+ char *default_txt_rsp_1_for_serive[2] = { "_printer", "_pdl-datastream" }; -+ char *default_txt_rsp_1[13] = { -+ "txtvers=1", "qtotal=1", "usb_MFG=KONICA MINOLTA", "usb_MDL=C754Series", -+ "rp=print","priority=51","tr=Generic 35c-4", "product=DriverName", -+ "pdl=application/postscript", "note=Copy Room", "Transparent=T", "Binary=T", "TBCP=F" -+ }; -+ -+ char *default_txt_rsp_2_for_serive[2] = { "_http", "_https" }; -+ char *default_txt_rsp_2[1] = { -+ "Path=/" -+ }; -+ -+ char *default_txt_rsp_3_for_serive[1] = { "_privet" }; -+ char *default_txt_rsp_3[5] = { -+ "txtvers=1", "url=https://www.google.com/cloudprint", -+ "type=printer", "cs=not-configured","note=Copy Room" -+ }; -+ -+ char *default_txt_rsp_4_for_serive[1] = { "_uscan" }; -+ char *default_txt_rsp_4[11] = { -+ "txtvers=1", "vers=2.5", "adminurl=http://KM00D91C.local./wsd/a_network_airprint.xml", -+ "representation=http://KM00D91C.local./wcd/DeviceIcon_1283png", -+ "rs=eSCL", "ty=KONICA MINOLTA bishub C287", "note=japan", -+ "pdl=image/jpeg,image/tiff,application/pdf", -+ "UUID=dd5454cc-e196-5711-aa1f-35be49a6ca9f", -+ "cs=color,grayscale,binary", "is=platen,adf,duplex=T" -+ }; -+ -+ -+ /* reset ===> */ -+ -+ _rtw_memset(pwrpriv->wowlan_war_offload_mdns_domain_name, 0, MAX_MDNS_DOMAIN_NAME_LEN); -+ _rtw_memset(pwrpriv->wowlan_war_offload_mdns_mnane, 0, sizeof(pwrpriv->wowlan_war_offload_mdns_mnane)); -+ _rtw_memset(pwrpriv->wowlan_war_offload_mdns_service, 0, sizeof(pwrpriv->wowlan_war_offload_mdns_service)); -+ _rtw_memset(pwrpriv->wowlan_war_offload_mdns_txt_rsp, 0, sizeof(pwrpriv->wowlan_war_offload_mdns_txt_rsp)); -+ -+ pwrpriv->wowlan_war_offload_mdns_domain_name_len = 0; -+ pwrpriv->wowlan_war_offload_mdns_mnane_num = 0; -+ pwrpriv->wowlan_war_offload_mdns_service_info_num = 0; -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp_num = 0; -+ pwrpriv->wowlan_war_offload_mdns_para_cur_size = 0; -+ pwrpriv->wowlan_war_offload_mdns_rsp_cur_size = 0; -+ -+ /* init ===> */ -+ -+ if(is_set_default) -+ { -+ // domain_name -+ pwrpriv->wowlan_war_offload_mdns_domain_name_len = strlen(default_domain_name); -+ _rtw_memcpy(pwrpriv->wowlan_war_offload_mdns_domain_name, default_domain_name, sizeof(default_domain_name)); -+ -+ // machine name -+ pwrpriv->wowlan_war_offload_mdns_mnane_num = 1; -+ pwrpriv->wowlan_war_offload_mdns_mnane[0].name_len = default_machine_name_len; -+ _rtw_memcpy(pwrpriv->wowlan_war_offload_mdns_mnane[0].name, default_machine_name, default_machine_name_len); -+ -+ // service info -+ pwrpriv->wowlan_war_offload_mdns_service_info_num = 8; -+ _rtw_memcpy(pwrpriv->wowlan_war_offload_mdns_service, default_sinfo, sizeof(default_sinfo)); -+ -+ // type txt rsp 0~5 -+ // 0 -+ for(offset=0, i=0; i<25; i++) -+ { -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[0].txt[offset++] = strlen(default_txt_rsp_0[i]); -+ _rtw_memcpy(pwrpriv->wowlan_war_offload_mdns_txt_rsp[0].txt + offset, default_txt_rsp_0[i], strlen(default_txt_rsp_0[i])); -+ offset += strlen(default_txt_rsp_0[i]); -+ RTW_INFO("==> default_txt_rsp_0[%d]: [%s](%zu), offset(%d)\n", i, default_txt_rsp_0[i], strlen(default_txt_rsp_0[i]), offset); -+ } -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[0].txt_len = offset; -+ // RTW_INFO("==> offset = %d\n\n", offset); -+ -+ -+ // 1 -+ for(offset=0, i=0; i<13; i++) -+ { -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[1].txt[offset++] = strlen(default_txt_rsp_1[i]); -+ _rtw_memcpy(pwrpriv->wowlan_war_offload_mdns_txt_rsp[1].txt + offset, default_txt_rsp_1[i], strlen(default_txt_rsp_1[i])); -+ offset += strlen(default_txt_rsp_1[i]); -+ } -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[1].txt_len = offset; -+ // RTW_INFO("==> offset = %d\n\n", offset); -+ -+ // 2 -+ for(offset=0, i=0; i<1; i++) -+ { -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[2].txt[offset++] = strlen(default_txt_rsp_2[i]); -+ _rtw_memcpy(pwrpriv->wowlan_war_offload_mdns_txt_rsp[2].txt + offset, default_txt_rsp_2[i], strlen(default_txt_rsp_2[i])); -+ offset += strlen(default_txt_rsp_2[i]); -+ } -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[2].txt_len = offset; -+ // RTW_INFO("==> offset = %d\n\n", offset); -+ -+ // 3 -+ for(offset=0, i=0; i<5; i++) -+ { -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[3].txt[offset++] = strlen(default_txt_rsp_3[i]); -+ _rtw_memcpy(pwrpriv->wowlan_war_offload_mdns_txt_rsp[3].txt + offset, default_txt_rsp_3[i], strlen(default_txt_rsp_3[i])); -+ offset += strlen(default_txt_rsp_3[i]); -+ } -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[3].txt_len = offset; -+ // RTW_INFO("==> offset = %d\n\n", offset); -+ -+ // 4 -+ for(offset=0, i=0; i<11; i++) -+ { -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[4].txt[offset++] = strlen(default_txt_rsp_4[i]); -+ _rtw_memcpy(pwrpriv->wowlan_war_offload_mdns_txt_rsp[4].txt + offset, default_txt_rsp_4[i], strlen(default_txt_rsp_4[i])); -+ offset += strlen(default_txt_rsp_4[i]); -+ } -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp[4].txt_len = offset; -+ // RTW_INFO("==> offset = %d\n\n", offset); -+ -+ /* txt_rsp_num is always as MAX_MDNS_TXT_NUM because the input mechanism(new/append) makes the entities are not in order */ -+ pwrpriv->wowlan_war_offload_mdns_txt_rsp_num = MAX_MDNS_TXT_NUM; -+ } -+} -+ -+ -+#endif /* defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) */ -+#endif /* CONFIG_WAR_OFFLOAD */ -+#endif /* CONFIG_WOWLAN */ -+ -+inline bool _rtw_wow_chk_cap(_adapter *adapter, u8 cap) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct wow_ctl_t *wow_ctl = &dvobj->wow_ctl; -+ -+ if (wow_ctl->wow_cap & cap) -+ return _TRUE; -+ return _FALSE; -+} -+ -+#ifdef CONFIG_PNO_SUPPORT -+#define CSCAN_TLV_TYPE_SSID_IE 'S' -+#define CIPHER_IE "key_mgmt=" -+#define CIPHER_NONE "NONE" -+#define CIPHER_WPA_PSK "WPA-PSK" -+#define CIPHER_WPA_EAP "WPA-EAP IEEE8021X" -+/* -+ * SSIDs list parsing from cscan tlv list -+ */ -+int rtw_parse_ssid_list_tlv(char **list_str, pno_ssid_t *ssid, -+ int max, int *bytes_left) -+{ -+ char *str; -+ -+ int idx = 0; -+ -+ if ((list_str == NULL) || (*list_str == NULL) || (*bytes_left < 0)) { -+ RTW_INFO("%s error paramters\n", __func__); -+ return -1; -+ } -+ -+ str = *list_str; -+ while (*bytes_left > 0) { -+ -+ if (str[0] != CSCAN_TLV_TYPE_SSID_IE) { -+ *list_str = str; -+ RTW_INFO("nssid=%d left_parse=%d %d\n", idx, *bytes_left, str[0]); -+ return idx; -+ } -+ -+ /* Get proper CSCAN_TLV_TYPE_SSID_IE */ -+ *bytes_left -= 1; -+ str += 1; -+ -+ if (str[0] == 0) { -+ /* Broadcast SSID */ -+ ssid[idx].SSID_len = 0; -+ memset((char *)ssid[idx].SSID, 0x0, WLAN_SSID_MAXLEN); -+ *bytes_left -= 1; -+ str += 1; -+ -+ RTW_INFO("BROADCAST SCAN left=%d\n", *bytes_left); -+ } else if (str[0] <= WLAN_SSID_MAXLEN) { -+ /* Get proper SSID size */ -+ ssid[idx].SSID_len = str[0]; -+ *bytes_left -= 1; -+ str += 1; -+ -+ /* Get SSID */ -+ if (ssid[idx].SSID_len > *bytes_left) { -+ RTW_INFO("%s out of memory range len=%d but left=%d\n", -+ __func__, ssid[idx].SSID_len, *bytes_left); -+ return -1; -+ } -+ -+ memcpy((char *)ssid[idx].SSID, str, ssid[idx].SSID_len); -+ -+ *bytes_left -= ssid[idx].SSID_len; -+ str += ssid[idx].SSID_len; -+ -+ RTW_INFO("%s :size=%d left=%d\n", -+ (char *)ssid[idx].SSID, ssid[idx].SSID_len, *bytes_left); -+ } else { -+ RTW_INFO("### SSID size more that %d\n", str[0]); -+ return -1; -+ } -+ -+ if (idx++ > max) { -+ RTW_INFO("%s number of SSIDs more that %d\n", __func__, idx); -+ return -1; -+ } -+ } -+ -+ *list_str = str; -+ return idx; -+} -+ -+int rtw_parse_cipher_list(struct pno_nlo_info *nlo_info, char *list_str) -+{ -+ -+ char *pch, *pnext, *pend; -+ u8 key_len = 0, index = 0; -+ -+ pch = list_str; -+ -+ if (nlo_info == NULL || list_str == NULL) { -+ RTW_INFO("%s error paramters\n", __func__); -+ return -1; -+ } -+ -+ while (strlen(pch) != 0) { -+ pnext = strstr(pch, "key_mgmt="); -+ if (pnext != NULL) { -+ pch = pnext + strlen(CIPHER_IE); -+ pend = strstr(pch, "}"); -+ if (strncmp(pch, CIPHER_NONE, -+ strlen(CIPHER_NONE)) == 0) -+ nlo_info->ssid_cipher_info[index] = 0x00; -+ else if (strncmp(pch, CIPHER_WPA_PSK, -+ strlen(CIPHER_WPA_PSK)) == 0) -+ nlo_info->ssid_cipher_info[index] = 0x66; -+ else if (strncmp(pch, CIPHER_WPA_EAP, -+ strlen(CIPHER_WPA_EAP)) == 0) -+ nlo_info->ssid_cipher_info[index] = 0x01; -+ index++; -+ pch = pend + 1; -+ } else -+ break; -+ } -+ return 0; -+} -+ -+int rtw_dev_nlo_info_set(struct pno_nlo_info *nlo_info, pno_ssid_t *ssid, -+ int num, int pno_time, int pno_repeat, int pno_freq_expo_max) -+{ -+ -+ int i = 0; -+ struct file *fp; -+ mm_segment_t fs; -+ loff_t pos = 0; -+ u8 *source = NULL; -+ long len = 0; -+ -+ RTW_INFO("+%s+\n", __func__); -+ -+ nlo_info->fast_scan_period = pno_time; -+ nlo_info->ssid_num = num & BIT_LEN_MASK_32(8); -+ nlo_info->hidden_ssid_num = num & BIT_LEN_MASK_32(8); -+ nlo_info->slow_scan_period = (pno_time * 2); -+ nlo_info->fast_scan_iterations = 5; -+ -+ if (nlo_info->hidden_ssid_num > 8) -+ nlo_info->hidden_ssid_num = 8; -+ -+ /* TODO: channel list and probe index is all empty. */ -+ for (i = 0 ; i < num ; i++) { -+ nlo_info->ssid_length[i] -+ = ssid[i].SSID_len; -+ } -+ -+ /* cipher array */ -+ fp = filp_open("/data/misc/wifi/wpa_supplicant.conf", O_RDONLY, 0644); -+ if (IS_ERR(fp)) { -+ RTW_INFO("Error, wpa_supplicant.conf doesn't exist.\n"); -+ RTW_INFO("Error, cipher array using default value.\n"); -+ return 0; -+ } -+ -+ len = i_size_read(fp->f_path.dentry->d_inode); -+ if (len < 0 || len > 2048) { -+ RTW_INFO("Error, file size is bigger than 2048.\n"); -+ RTW_INFO("Error, cipher array using default value.\n"); -+ return 0; -+ } -+ -+ fs = get_fs(); -+ set_fs(KERNEL_DS); -+ -+ source = rtw_zmalloc(2048); -+ -+ if (source != NULL) { -+ len = vfs_read(fp, source, len, &pos); -+ rtw_parse_cipher_list(nlo_info, source); -+ rtw_mfree(source, 2048); -+ } -+ -+ set_fs(fs); -+ filp_close(fp, NULL); -+ -+ RTW_INFO("-%s-\n", __func__); -+ return 0; -+} -+ -+int rtw_dev_ssid_list_set(struct pno_ssid_list *pno_ssid_list, -+ pno_ssid_t *ssid, u8 num) -+{ -+ -+ int i = 0; -+ if (num > MAX_PNO_LIST_COUNT) -+ num = MAX_PNO_LIST_COUNT; -+ -+ for (i = 0 ; i < num ; i++) { -+ _rtw_memcpy(&pno_ssid_list->node[i].SSID, -+ ssid[i].SSID, ssid[i].SSID_len); -+ pno_ssid_list->node[i].SSID_len = ssid[i].SSID_len; -+ } -+ return 0; -+} -+ -+int rtw_dev_scan_info_set(_adapter *padapter, pno_ssid_t *ssid, -+ unsigned char ch, unsigned char ch_offset, unsigned short bw_mode) -+{ -+ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ struct pno_scan_info *scan_info = pwrctl->pscan_info; -+ u8 band = ch <= 14 ? BAND_ON_2_4G : BAND_ON_5G; -+ int i; -+ -+ scan_info->channel_num = MAX_SCAN_LIST_COUNT; -+ scan_info->orig_ch = ch; -+ scan_info->orig_bw = bw_mode; -+ scan_info->orig_40_offset = ch_offset; -+ -+ for (i = 0 ; i < scan_info->channel_num ; i++) { -+ if (i < 11) -+ scan_info->ssid_channel_info[i].active = 1; -+ else -+ scan_info->ssid_channel_info[i].active = 0; -+ -+ scan_info->ssid_channel_info[i].timeout = 100; -+ -+ scan_info->ssid_channel_info[i].tx_power = -+ phy_get_tx_power_index_ex(padapter, 0, CCK, MGN_1M, bw_mode, band, i + 1, i + 1); -+ -+ scan_info->ssid_channel_info[i].channel = i + 1; -+ } -+ -+ RTW_INFO("%s, channel_num: %d, orig_ch: %d, orig_bw: %d orig_40_offset: %d\n", -+ __func__, scan_info->channel_num, scan_info->orig_ch, -+ scan_info->orig_bw, scan_info->orig_40_offset); -+ return 0; -+} -+ -+int rtw_dev_pno_set(struct net_device *net, pno_ssid_t *ssid, int num, -+ int pno_time, int pno_repeat, int pno_freq_expo_max) -+{ -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ int ret = -1; -+ -+ if (num == 0) { -+ RTW_INFO("%s, nssid is zero, no need to setup pno ssid list\n", __func__); -+ return 0; -+ } -+ -+ if (pwrctl == NULL) { -+ RTW_INFO("%s, ERROR: pwrctl is NULL\n", __func__); -+ return -1; -+ } else { -+ pwrctl->pnlo_info = -+ (pno_nlo_info_t *)rtw_zmalloc(sizeof(pno_nlo_info_t)); -+ pwrctl->pno_ssid_list = -+ (pno_ssid_list_t *)rtw_zmalloc(sizeof(pno_ssid_list_t)); -+ pwrctl->pscan_info = -+ (pno_scan_info_t *)rtw_zmalloc(sizeof(pno_scan_info_t)); -+ } -+ -+ if (pwrctl->pnlo_info == NULL || -+ pwrctl->pscan_info == NULL || -+ pwrctl->pno_ssid_list == NULL) { -+ RTW_INFO("%s, ERROR: alloc nlo_info, ssid_list, scan_info fail\n", __func__); -+ goto failing; -+ } -+ -+ pwrctl->wowlan_in_resume = _FALSE; -+ -+ pwrctl->pno_inited = _TRUE; -+ /* NLO Info */ -+ ret = rtw_dev_nlo_info_set(pwrctl->pnlo_info, ssid, num, -+ pno_time, pno_repeat, pno_freq_expo_max); -+ -+ /* SSID Info */ -+ ret = rtw_dev_ssid_list_set(pwrctl->pno_ssid_list, ssid, num); -+ -+ /* SCAN Info */ -+ ret = rtw_dev_scan_info_set(padapter, ssid, pmlmeext->cur_channel, -+ pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); -+ -+ RTW_INFO("+%s num: %d, pno_time: %d, pno_repeat:%d, pno_freq_expo_max:%d+\n", -+ __func__, num, pno_time, pno_repeat, pno_freq_expo_max); -+ -+ return 0; -+ -+failing: -+ if (pwrctl->pnlo_info) { -+ rtw_mfree((u8 *)pwrctl->pnlo_info, sizeof(pno_nlo_info_t)); -+ pwrctl->pnlo_info = NULL; -+ } -+ if (pwrctl->pno_ssid_list) { -+ rtw_mfree((u8 *)pwrctl->pno_ssid_list, sizeof(pno_ssid_list_t)); -+ pwrctl->pno_ssid_list = NULL; -+ } -+ if (pwrctl->pscan_info) { -+ rtw_mfree((u8 *)pwrctl->pscan_info, sizeof(pno_scan_info_t)); -+ pwrctl->pscan_info = NULL; -+ } -+ -+ return -1; -+} -+ -+#ifdef CONFIG_PNO_SET_DEBUG -+void rtw_dev_pno_debug(struct net_device *net) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ int i = 0, j = 0; -+ -+ RTW_INFO("*******NLO_INFO********\n"); -+ RTW_INFO("ssid_num: %d\n", pwrctl->pnlo_info->ssid_num); -+ RTW_INFO("fast_scan_iterations: %d\n", -+ pwrctl->pnlo_info->fast_scan_iterations); -+ RTW_INFO("fast_scan_period: %d\n", pwrctl->pnlo_info->fast_scan_period); -+ RTW_INFO("slow_scan_period: %d\n", pwrctl->pnlo_info->slow_scan_period); -+ -+ -+ -+ for (i = 0 ; i < MAX_PNO_LIST_COUNT ; i++) { -+ RTW_INFO("%d SSID (%s) length (%d) cipher(%x) channel(%d)\n", -+ i, pwrctl->pno_ssid_list->node[i].SSID, pwrctl->pnlo_info->ssid_length[i], -+ pwrctl->pnlo_info->ssid_cipher_info[i], pwrctl->pnlo_info->ssid_channel_info[i]); -+ } -+ -+ RTW_INFO("******SCAN_INFO******\n"); -+ RTW_INFO("ch_num: %d\n", pwrctl->pscan_info->channel_num); -+ RTW_INFO("orig_ch: %d\n", pwrctl->pscan_info->orig_ch); -+ RTW_INFO("orig bw: %d\n", pwrctl->pscan_info->orig_bw); -+ RTW_INFO("orig 40 offset: %d\n", pwrctl->pscan_info->orig_40_offset); -+ for (i = 0 ; i < MAX_SCAN_LIST_COUNT ; i++) { -+ RTW_INFO("[%02d] avtive:%d, timeout:%d, tx_power:%d, ch:%02d\n", -+ i, pwrctl->pscan_info->ssid_channel_info[i].active, -+ pwrctl->pscan_info->ssid_channel_info[i].timeout, -+ pwrctl->pscan_info->ssid_channel_info[i].tx_power, -+ pwrctl->pscan_info->ssid_channel_info[i].channel); -+ } -+ RTW_INFO("*****************\n"); -+} -+#endif /* CONFIG_PNO_SET_DEBUG */ -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+inline void rtw_collect_bcn_info(_adapter *adapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ -+ if (!is_client_associated_to_ap(adapter)) -+ return; -+ -+ pmlmeext->cur_bcn_cnt = pmlmeext->bcn_cnt - pmlmeext->last_bcn_cnt; -+ pmlmeext->last_bcn_cnt = pmlmeext->bcn_cnt; -+ /*TODO get offset of bcn's timestamp*/ -+ /*pmlmeext->bcn_timestamp;*/ -+} -+ -+static u32 rtw_get_vht_bitrate(u8 mcs, u8 bw, u8 nss, u8 sgi) -+{ -+ static const u32 base[4][10] = { -+ { 6500000, -+ 13000000, -+ 19500000, -+ 26000000, -+ 39000000, -+ 52000000, -+ 58500000, -+ 65000000, -+ 78000000, -+ /* not in the spec, but some devices use this: */ -+ 86500000, -+ }, -+ { 13500000, -+ 27000000, -+ 40500000, -+ 54000000, -+ 81000000, -+ 108000000, -+ 121500000, -+ 135000000, -+ 162000000, -+ 180000000, -+ }, -+ { 29300000, -+ 58500000, -+ 87800000, -+ 117000000, -+ 175500000, -+ 234000000, -+ 263300000, -+ 292500000, -+ 351000000, -+ 390000000, -+ }, -+ { 58500000, -+ 117000000, -+ 175500000, -+ 234000000, -+ 351000000, -+ 468000000, -+ 526500000, -+ 585000000, -+ 702000000, -+ 780000000, -+ }, -+ }; -+ u32 bitrate; -+ int bw_idx; -+ -+ if (mcs > 9) { -+ RTW_INFO("Invalid mcs = %d\n", mcs); -+ return 0; -+ } -+ -+ if (nss > 4 || nss < 1) { -+ RTW_INFO("Now only support nss = 1, 2, 3, 4\n"); -+ } -+ -+ switch (bw) { -+ case CHANNEL_WIDTH_160: -+ bw_idx = 3; -+ break; -+ case CHANNEL_WIDTH_80: -+ bw_idx = 2; -+ break; -+ case CHANNEL_WIDTH_40: -+ bw_idx = 1; -+ break; -+ case CHANNEL_WIDTH_20: -+ bw_idx = 0; -+ break; -+ default: -+ RTW_INFO("bw = %d currently not supported\n", bw); -+ return 0; -+ } -+ -+ bitrate = base[bw_idx][mcs]; -+ bitrate *= nss; -+ -+ if (sgi) -+ bitrate = (bitrate / 9) * 10; -+ -+ /* do NOT round down here */ -+ return (bitrate + 50000) / 100000; -+} -+ -+static u32 rtw_get_ht_bitrate(u8 mcs, u8 bw, u8 sgi) -+{ -+ int modulation, streams, bitrate; -+ -+ /* the formula below does only work for MCS values smaller than 32 */ -+ if (mcs >= 32) { -+ RTW_INFO("Invalid mcs = %d\n", mcs); -+ return 0; -+ } -+ -+ if (bw > 1) { -+ RTW_INFO("Now HT only support bw = 0(20Mhz), 1(40Mhz)\n"); -+ return 0; -+ } -+ -+ modulation = mcs & 7; -+ streams = (mcs >> 3) + 1; -+ -+ bitrate = (bw == 1) ? 13500000 : 6500000; -+ -+ if (modulation < 4) -+ bitrate *= (modulation + 1); -+ else if (modulation == 4) -+ bitrate *= (modulation + 2); -+ else -+ bitrate *= (modulation + 3); -+ -+ bitrate *= streams; -+ -+ if (sgi) -+ bitrate = (bitrate / 9) * 10; -+ -+ return (bitrate + 50000) / 100000; -+} -+ -+/** -+ * @bw: 0(20Mhz), 1(40Mhz), 2(80Mhz), 3(160Mhz) -+ * @rate_idx: DESC_RATEXXXX & 0x7f -+ * @sgi: DESC_RATEXXXX >> 7 -+ * Returns: bitrate in 100kbps -+ */ -+u32 rtw_desc_rate_to_bitrate(u8 bw, u8 rate_idx, u8 sgi) -+{ -+ u32 bitrate; -+ -+ if (rate_idx <= DESC_RATE54M){ -+ u16 ofdm_rate[12] = {10, 20, 55, 110, -+ 60, 90, 120, 180, 240, 360, 480, 540}; -+ -+ bitrate = ofdm_rate[rate_idx]; -+ } else if ((DESC_RATEMCS0 <= rate_idx) && -+ (rate_idx <= DESC_RATEMCS31)) { -+ u8 mcs = rate_idx - DESC_RATEMCS0; -+ -+ bitrate = rtw_get_ht_bitrate(mcs, bw, sgi); -+ } else if ((DESC_RATEVHTSS1MCS0 <= rate_idx) && -+ (rate_idx <= DESC_RATEVHTSS4MCS9)) { -+ u8 mcs = (rate_idx - DESC_RATEVHTSS1MCS0) % 10; -+ u8 nss = ((rate_idx - DESC_RATEVHTSS1MCS0) / 10) + 1; -+ -+ bitrate = rtw_get_vht_bitrate(mcs, bw, nss, sgi); -+ } else { -+ /* TODO: 60Ghz */ -+ bitrate = 1; -+ } -+ -+ return bitrate; -+} -+ -+#ifdef CONFIG_RTW_MULTI_AP -+u8 rtw_get_ch_utilization(_adapter *adapter) -+{ -+ u16 clm = rtw_phydm_clm_ratio(adapter); -+ u16 nhm = rtw_phydm_nhm_ratio(adapter); -+ u16 ch_util; -+ -+ ch_util = clm / 3 + (2 * (nhm / 3)); -+ /* For Multi-AP, scaling 0-100 to 0-255 */ -+ ch_util = 255 * ch_util / 100; -+ -+ return (u8)ch_util; -+} -+ -+void rtw_ch_util_rpt(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface; -+ int i, j; -+ u8 i_rpts = 0; -+ u8 *ch_util; -+ u8 **bssid; -+ u8 threshold = GET_PRIMARY_ADAPTER(adapter)->ch_util_threshold; -+ u8 need_rpt = 0; -+ -+ if (threshold == 0) -+ return; -+ -+ ch_util = rtw_zmalloc(sizeof(u8) * dvobj->iface_nums); -+ if (!ch_util) -+ goto err_out; -+ bssid = (u8 **) rtw_zmalloc(sizeof(u8 *) * dvobj->iface_nums); -+ if (!bssid) -+ goto err_out1; -+ for (j = 0; j < dvobj->iface_nums; j++) { -+ *(bssid + j) = (u8 *) rtw_zmalloc(sizeof(u8) * ETH_ALEN); -+ if (!(*(bssid + j))) -+ goto err_out2; -+ } -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && MLME_IS_AP(iface)) { -+ *(ch_util + i_rpts) = rtw_get_ch_utilization(iface); -+ _rtw_memcpy(*(bssid + i_rpts), iface->mac_addr, ETH_ALEN); -+ -+ if (*(ch_util + i_rpts) > threshold) -+ need_rpt = 1; -+ -+ i_rpts++; -+ } -+ } -+ -+ if (need_rpt) -+ rtw_nlrtw_ch_util_rpt(adapter, i_rpts, ch_util, bssid); -+ -+ rtw_mfree(ch_util, sizeof(u8) * dvobj->iface_nums); -+ for (i = 0; i < dvobj->iface_nums; i++) -+ rtw_mfree(*(bssid + i), ETH_ALEN); -+ rtw_mfree(bssid, sizeof(u8 *) * dvobj->iface_nums); -+ -+ return; -+ -+err_out2: -+ for (i = 0; i < j; i++) -+ rtw_mfree(*(bssid + i), sizeof(u8) * ETH_ALEN); -+ rtw_mfree(bssid, sizeof(sizeof(u8 *) * dvobj->iface_nums)); -+err_out1: -+ rtw_mfree(ch_util, sizeof(u8) * dvobj->iface_nums); -+err_out: -+ RTW_INFO("[%s] rtw_zmalloc fail\n", __func__); -+} -+#endif -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_wnm.c b/drivers/staging/rtl8723cs/core/rtw_wnm.c -new file mode 100644 -index 000000000000..293eb86b741a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_wnm.c -@@ -0,0 +1,1098 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+ -+#ifndef RTW_WNM_DBG -+ #define RTW_WNM_DBG 0 -+#endif -+#if RTW_WNM_DBG -+ #define RTW_WNM_INFO(fmt, arg...) \ -+ RTW_INFO(fmt, arg) -+ #define RTW_WNM_DUMP(str, data, len) \ -+ RTW_INFO_DUMP(str, data, len) -+#else -+ #define RTW_WNM_INFO(fmt, arg...) do {} while (0) -+ #define RTW_WNM_DUMP(str, data, len) do {} while (0) -+#endif -+ -+#ifdef CONFIG_RTW_WNM -+ -+static u32 wnm_defualt_validity_time = 6000; -+static u32 wnm_default_disassoc_time = 5000; -+static u32 wnm_disassoc_wait_time = 500; -+ -+/* for wifi test, need more validity time to wait scan done */ -+static u32 wnm_ext_validity_time = 4000; -+ -+static void rtw_wmn_btm_cache_update(_adapter *padapter, struct btm_req_hdr *phdr) -+{ -+ struct btm_rpt_cache *pcache = &(padapter->mlmepriv.nb_info.btm_cache); -+ -+ pcache->dialog_token = phdr->dialog_token; -+ pcache->req_mode = phdr->req_mode; -+ pcache->disassoc_timer = le16_to_cpu(phdr->disassoc_timer); -+ -+ if (phdr->validity_interval > 0) -+ pcache->validity_interval = phdr->validity_interval; -+ -+ pcache->term_duration.id = phdr->term_duration.id; -+ pcache->term_duration.len = phdr->term_duration.len; -+ pcache->term_duration.tsf = le64_to_cpu(phdr->term_duration.tsf); -+ pcache->term_duration.duration = le16_to_cpu(phdr->term_duration.duration); -+ -+ RTW_WNM_INFO("%s: req_mode(0x%02x), disassoc_timer(0x%04x), " -+ "validity_interval(0x%02x %s), tsf(0x%llx), duration(0x%02x)\n", -+ __func__, pcache->req_mode, pcache->disassoc_timer, -+ pcache->validity_interval, (!phdr->validity_interval)?"default":"", -+ pcache->term_duration.tsf, -+ pcache->term_duration.duration); -+ -+ if (pcache->validity_interval > 0) { -+ pcache->validity_time = pcache->validity_interval * 100; -+ #ifdef CONFIG_RTW_MBO -+ if (rtw_mbo_wifi_logo_test(padapter)) -+ pcache->validity_time += wnm_ext_validity_time; -+ #endif -+ } -+ -+ if (pcache->disassoc_timer > 0) { -+ pcache->disassoc_time= pcache->disassoc_timer * 100; -+ #ifdef CONFIG_RTW_MBO -+ if (rtw_mbo_wifi_logo_test(padapter)) -+ pcache->disassoc_time += wnm_ext_validity_time; -+ #endif -+ } -+ -+ pcache->req_stime = rtw_get_current_time(); -+ -+ RTW_WNM_INFO("%s: validity_time=%u, disassoc_time=%u\n", -+ __func__, pcache->validity_time, pcache->disassoc_time); -+} -+ -+static u8 rtw_wnm_btm_candidate_validity(struct btm_rpt_cache *pcache, u8 flag) -+{ -+ u8 is_validity =_TRUE; -+ u32 req_validity_time = rtw_get_passing_time_ms(pcache->req_stime); -+ -+ if ((flag & BIT(0)) && (req_validity_time > pcache->validity_time)) -+ is_validity = _FALSE; -+ -+ if ((flag & BIT(1)) && (req_validity_time > pcache->disassoc_time)) -+ is_validity = _FALSE; -+ -+ RTW_WNM_INFO("%s : validity=%u, rtime=%u, vtime=%u. dtime=%u\n", -+ __func__, is_validity, req_validity_time, -+ pcache->validity_time, pcache->disassoc_time); -+ return is_validity; -+} -+ -+u8 rtw_wmn_btm_rsp_reason_decision(_adapter *padapter, u8* req_mode) -+{ -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ u8 reason = 0; -+ -+ if (!rtw_wnm_btm_diff_bss(padapter)) { -+ /* Reject - No suitable BSS transition candidates */ -+ reason = 7; -+ goto candidate_remove; -+ } -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_chk_flags(padapter, RTW_FT_BTM_ROAM)) { -+ /* Accept */ -+ reason = 0; -+ goto under_survey; -+ } -+#endif -+ -+ if (((*req_mode) & DISASSOC_IMMINENT) == 0) { -+ /* Reject - Unspecified reject reason */ -+ reason = 1; -+ goto candidate_remove; -+ } -+ -+ if (precvpriv->signal_strength_data.avg_val >= pmlmepriv->roam_rssi_threshold) { -+ reason = 1; -+ RTW_WNM_INFO("%s : Reject - under high roam rssi(%u, %u) \n", -+ __func__, precvpriv->signal_strength_data.avg_val, -+ pmlmepriv->roam_rssi_threshold); -+ goto candidate_remove; -+ } -+ -+#ifdef CONFIG_RTW_80211R -+under_survey: -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY)) { -+ RTW_WNM_INFO("%s reject due to _FW_UNDER_SURVEY\n", __func__); -+ reason = 1; -+ } -+#endif -+ -+candidate_remove: -+ if (reason !=0) -+ rtw_wnm_reset_btm_candidate(&pmlmepriv->nb_info); -+ -+ return reason; -+} -+ -+static u32 rtw_wnm_btm_candidates_offset_get(u8* pframe) -+{ -+ u32 offset = 0; -+ -+ if (!pframe) -+ return 0; -+ -+ offset += 7; -+ -+ /* BSS Termination Duration check */ -+ if (wnm_btm_bss_term_inc(pframe)) -+ offset += 12; -+ -+ /* Session Information URL check*/ -+ if (wnm_btm_ess_disassoc_im(pframe)) { -+ /*URL length field + URL variable length*/ -+ offset = 1 + *(pframe + offset); -+ } -+ -+ RTW_WNM_INFO("%s : hdr offset=%u\n", __func__, offset); -+ return offset; -+} -+ -+static void rtw_wnm_btm_req_hdr_parsing(u8* pframe, struct btm_req_hdr *phdr) -+{ -+ u8 *pos; -+ u32 offset = 0; -+ -+ if (!pframe || !phdr) -+ return; -+ -+ _rtw_memset(phdr, 0, sizeof(struct btm_req_hdr)); -+ phdr->dialog_token = wnm_btm_dialog_token(pframe); -+ phdr->req_mode = wnm_btm_req_mode(pframe); -+ phdr->disassoc_timer = wnm_btm_disassoc_timer(pframe); -+ phdr->validity_interval = wnm_btm_valid_interval(pframe); -+ if (wnm_btm_bss_term_inc(pframe)) { -+ pos = wnm_btm_term_duration_offset(pframe); -+ if (*pos == WNM_BTM_TERM_DUR_SUBEID) { -+ phdr->term_duration.id = *pos; -+ phdr->term_duration.len = *(pos + 1); -+ phdr->term_duration.tsf = *((u64*)(pos + 2)); -+ phdr->term_duration.duration= *((u16*)(pos + 10)); -+ } else -+ RTW_WNM_INFO("%s : invaild BSS Termination Duration content!\n", __func__); -+ } -+ -+ RTW_WNM_INFO("WNM: req_mode(0x%02x), disassoc_timer(0x%04x), validity_interval(0x%02x)\n", -+ phdr->req_mode, phdr->disassoc_timer, phdr->validity_interval); -+ if (wnm_btm_bss_term_inc(pframe)) -+ RTW_WNM_INFO("WNM: tsf(0x%llx), duration(0x%4x)\n", -+ phdr->term_duration.tsf, phdr->term_duration.duration); -+} -+ -+u8 rtw_wnm_btm_reassoc_req(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct roam_nb_info *pnb = &(pmlmepriv->nb_info); -+ u8 breassoc = _FALSE; -+ -+ if (_rtw_memcmp(get_my_bssid(&(pmlmeinfo->network)), -+ pnb->roam_target_addr, ETH_ALEN)) { -+ RTW_WNM_INFO("%s : bss "MAC_FMT" found in roam_target "MAC_FMT"\n", -+ __func__, MAC_ARG(get_my_bssid(&(pmlmeinfo->network))), -+ MAC_ARG(pnb->roam_target_addr)); -+ -+ breassoc = _TRUE; -+ } -+ -+ return breassoc; -+} -+ -+void rtw_wnm_roam_scan_hdl(void *ctx) -+{ -+ _adapter *padapter = (_adapter *)ctx; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ if (rtw_is_scan_deny(padapter)) -+ RTW_WNM_INFO("%s: roam scan would abort by scan_deny!\n", __func__); -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_chk_flags(padapter, RTW_FT_BTM_ROAM)) { -+ pmlmepriv->need_to_roam = _TRUE; -+ rtw_set_to_roam(padapter, padapter->registrypriv.max_roaming_times); -+ RTW_WNM_INFO("%s : enable roaming\n", __func__); -+ } -+ -+ rtw_drv_scan_by_self(padapter, RTW_AUTO_SCAN_REASON_ROAM); -+#endif -+} -+ -+static void rtw_wnm_roam_scan(_adapter *padapter) -+{ -+ struct roam_nb_info *pnb = &(padapter->mlmepriv.nb_info); -+ -+ if (rtw_is_scan_deny(padapter)) { -+ _cancel_timer_ex(&pnb->roam_scan_timer); -+ _set_timer(&pnb->roam_scan_timer, 1000); -+ } else -+ rtw_wnm_roam_scan_hdl((void *)padapter); -+} -+ -+void rtw_wnm_disassoc_chk_hdl(void *ctx) -+{ -+ _adapter *padapter = (_adapter *)ctx; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct roam_nb_info *pnb = &(pmlmepriv->nb_info); -+ -+ RTW_WNM_INFO("%s : expired\n", __func__); -+ if (pnb->disassoc_waiting <= 0 ) { -+ RTW_WNM_INFO("%s : btm roam is interrupted by disassoc\n", __func__); -+ return; -+ } -+ -+ pnb->disassoc_waiting = _FALSE; -+ rtw_wnm_roam_scan(padapter); -+} -+ -+u8 rtw_wnm_try_btm_roam_imnt(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct roam_nb_info *pnb = &(pmlmepriv->nb_info); -+ struct btm_rpt_cache *pcache = &(pnb->btm_cache); -+ u8 reason = 0, flag = 0; -+ -+ if (!rtw_wnm_btm_preference_cap(padapter)) { -+ RTW_WNM_INFO("%s : no btm candidate can be used!\n", __func__); -+ return 1; -+ } -+ -+ flag = BIT(0) | BIT(1); -+ if (!rtw_wnm_btm_candidate_validity(pcache, flag)) -+ return 1; -+ -+#ifdef CONFIG_RTW_MBO -+ if (!rtw_mbo_wifi_logo_test(padapter) -+ && !(pcache->req_mode & DISASSOC_IMMINENT)) { -+ RTW_WNM_INFO("%s : non-disassoc imminet req\n", __func__); -+ return 1; -+ } -+#endif -+ -+ RTW_WNM_INFO("%s : disassoc_waiting(%d)\n", __func__, pnb->disassoc_waiting); -+ if (pnb->disassoc_waiting) { -+ _cancel_timer_ex(&pnb->disassoc_chk_timer); -+ pnb->disassoc_waiting = _FALSE; -+ rtw_wnm_roam_scan_hdl((void *)padapter); -+ } else if (!pnb->disassoc_waiting) -+ RTW_WNM_INFO("%s : waiting for btm roaming start/finish\n", __func__); -+ else -+ reason = 1; -+ -+ return reason; -+} -+ -+void rtw_wnm_process_btm_req(_adapter *padapter, u8* pframe, u32 frame_len) -+{ -+ struct roam_nb_info *pnb = &(padapter->mlmepriv.nb_info); -+ struct btm_req_hdr req_hdr; -+ u8 *ptr, reason; -+ u32 elem_len, offset; -+ -+ rtw_wnm_btm_req_hdr_parsing(pframe, &req_hdr); -+ offset = rtw_wnm_btm_candidates_offset_get(pframe); -+ if (offset == 0) -+ return; -+ -+ if ((frame_len - offset) <= 15) { -+ RTW_INFO("WNM : Reject - no suitable BSS transition candidates!\n"); -+ rtw_wnm_issue_action(padapter, -+ RTW_WLAN_ACTION_WNM_BTM_RSP, 7, req_hdr.dialog_token); -+ return; -+ } -+ -+ rtw_wmn_btm_cache_update(padapter, &req_hdr); -+ -+ ptr = (pframe + offset); -+ elem_len = (frame_len - offset); -+ rtw_wnm_btm_candidates_survey(padapter, ptr, elem_len, _TRUE); -+ reason = rtw_wmn_btm_rsp_reason_decision(padapter, &pframe[3]); -+ -+#ifdef CONFIG_RTW_MBO -+ /* for wifi-test; AP2 could power-off when BTM-req received */ -+ if ((reason > 0) && (rtw_mbo_wifi_logo_test(padapter))) { -+ _rtw_memcpy(pnb->roam_target_addr, pnb->nb_rpt[0].bssid, ETH_ALEN); -+ RTW_WNM_INFO("%s : used report 0 as roam_target_addr(reason=%u)\n", -+ __func__, reason); -+ reason = 0; -+ pnb->preference_en = _TRUE; -+ pnb->nb_rpt_valid = _FALSE; -+ } -+#endif -+ -+ rtw_wnm_issue_action(padapter, -+ RTW_WLAN_ACTION_WNM_BTM_RSP, reason, req_hdr.dialog_token); -+ -+ if (reason == 0) { -+ pnb->disassoc_waiting = _TRUE; -+ _set_timer(&pnb->disassoc_chk_timer, wnm_disassoc_wait_time); -+ } -+ -+} -+ -+void rtw_wnm_reset_btm_candidate(struct roam_nb_info *pnb) -+{ -+ pnb->preference_en = _FALSE; -+ _rtw_memset(pnb->roam_target_addr, 0, ETH_ALEN); -+} -+ -+void rtw_wnm_reset_btm_cache(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct roam_nb_info *pnb = &(pmlmepriv->nb_info); -+ struct btm_rpt_cache *pcache = &(pnb->btm_cache); -+ u8 flag = 0; -+ -+ flag |= BIT(0); -+ if (rtw_wnm_btm_candidate_validity(pcache, flag)) -+ return; -+ -+ rtw_wnm_reset_btm_candidate(pnb); -+ _rtw_memset(pcache, 0, sizeof(struct btm_rpt_cache)); -+ pcache->validity_time = wnm_defualt_validity_time; -+ pcache->disassoc_time= wnm_default_disassoc_time; -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_chk_flags(padapter, RTW_FT_BTM_ROAM)) { -+ pmlmepriv->need_to_roam = _FALSE; -+ rtw_set_to_roam(padapter, 0); -+ RTW_WNM_INFO("%s : disabled roaming\n", __func__); -+ } -+#endif -+} -+ -+void rtw_wnm_reset_btm_state(_adapter *padapter) -+{ -+ struct roam_nb_info *pnb = &(padapter->mlmepriv.nb_info); -+ -+ pnb->last_nb_rpt_entries = 0; -+ pnb->nb_rpt_is_same = _TRUE; -+ pnb->nb_rpt_valid = _FALSE; -+ pnb->nb_rpt_ch_list_num = 0; -+ pnb->disassoc_waiting = -1; -+ _rtw_memset(&pnb->nb_rpt, 0, sizeof(pnb->nb_rpt)); -+ _rtw_memset(&pnb->nb_rpt_ch_list, 0, sizeof(pnb->nb_rpt_ch_list)); -+ rtw_wnm_reset_btm_cache(padapter); -+} -+ -+u32 rtw_wnm_btm_rsp_candidates_sz_get( -+ _adapter *padapter, u8* pframe, u32 frame_len) -+{ -+ u32 num = 0, sz = 0; -+ u8 status; -+ u8 *ptr; -+ -+ if (!pframe || (frame_len <= 5)) -+ goto exit; -+ -+ status = wnm_btm_rsp_status(pframe); -+ if (((status != 0) && (status != 6)) || (frame_len < 23)) -+ goto exit; -+ -+ if (status == 0) -+ num = (frame_len - 5 - ETH_ALEN)/18; -+ else -+ num = (frame_len - 5)/18; -+ sz = sizeof(struct wnm_btm_cant) * num; -+exit: -+ RTW_WNM_INFO("WNM: %u candidates(sz=%u) in BTM rsp\n", num, sz); -+ return sz; -+} -+ -+void rtw_wnm_process_btm_rsp(_adapter *padapter, -+ u8* pframe, u32 frame_len, struct btm_rsp_hdr *prsp) -+{ -+ prsp->dialog_token = wnm_btm_dialog_token(pframe); -+ prsp->status = wnm_btm_rsp_status(pframe); -+ prsp->termination_delay = wnm_btm_rsp_term_delay(pframe); -+ -+ if ((pframe == NULL) || (frame_len == 0)) -+ return; -+ -+ prsp->status = *(pframe + 3); -+ prsp->termination_delay = *(pframe + 4); -+ -+ /* no Target BSSID & Candidate in frame */ -+ if (frame_len <= 5) -+ return; -+ -+ /* accept */ -+ if ((prsp->status == 0) && (frame_len >= 11)) -+ _rtw_memcpy(prsp->bssid, (pframe + 5), ETH_ALEN); -+ -+ /* STA BSS Transition Candidate List provided, -+ and at least one NB report exist */ -+ if (((prsp->status == 0) || (prsp->status == 6)) && (frame_len >= 23)) { -+ struct wnm_btm_cant cant; -+ u8 *ptr, *pend; -+ u32 idx = 0; -+ -+ ptr = pframe + 5; -+ if (prsp->status == 0) -+ ptr += ETH_ALEN; -+ -+ pend = ptr + frame_len; -+ prsp->candidates_num = 0; -+ while (ptr < pend) { -+ if (*ptr != RTW_WLAN_ACTION_WNM_NB_RPT_ELEM) -+ break; -+ _rtw_memset(&cant, 0, sizeof(cant)); -+ cant.nb_rpt.id = *ptr; -+ cant.nb_rpt.len = *(ptr + 1); -+ _rtw_memcpy(cant.nb_rpt.bssid, (ptr + 2), ETH_ALEN); -+ cant.nb_rpt.bss_info = *((u32 *)(ptr + 8)); -+ cant.nb_rpt.reg_class = *(ptr + 12); -+ cant.nb_rpt.ch_num = *(ptr + 13); -+ cant.nb_rpt.phy_type= *(ptr + 14); -+ -+ if (*(ptr + 15) == WNM_BTM_CAND_PREF_SUBEID) -+ cant.preference = *(ptr + 17); -+ ptr = ptr + cant.nb_rpt.len + 2; -+ if (prsp->pcandidates) { -+ prsp->candidates_num++; -+ _rtw_memcpy((prsp->pcandidates + sizeof(cant) * idx), &cant, sizeof(cant)); -+ } -+ -+ idx++; -+ RTW_WNM_INFO("WNM: btm rsp candidate bssid("MAC_FMT -+ ") ,bss_info(0x%04X), reg_class(0x%02X), ch(%d)," -+ " phy_type(0x%02X), preference(0x%02X)\n", -+ MAC_ARG(cant.nb_rpt.bssid), cant.nb_rpt.bss_info, -+ cant.nb_rpt.reg_class, cant.nb_rpt.ch_num, -+ cant.nb_rpt.phy_type, cant.preference); -+ if ((prsp->pcandidates) && (prsp->candidates_num > 0)) -+ RTW_WNM_DUMP("WNM candidates: ", prsp->pcandidates, -+ (sizeof(struct wnm_btm_cant) * prsp->candidates_num)); -+ } -+ } -+ -+} -+ -+void rtw_wnm_hdr_init(_adapter *padapter, -+ struct xmit_frame *pactionframe, u8 *pmac, -+ u8 action, u8 **pcontent) -+{ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *pfctrl; -+ u8 category; -+ -+ pattrib = &(pactionframe->attrib); -+ update_mgntframe_attrib(padapter, pattrib); -+ _rtw_memset(pactionframe->buf_addr, 0, (WLANHDR_OFFSET + TXDESC_OFFSET)); -+ -+ *pcontent = (u8 *)(pactionframe->buf_addr + TXDESC_OFFSET); -+ pwlanhdr = (struct rtw_ieee80211_hdr *)(*pcontent); -+ pfctrl = &(pwlanhdr->frame_ctl); -+ *(pfctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, pmac, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(*pcontent, WIFI_ACTION); -+ -+ *pcontent += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ category = RTW_WLAN_CATEGORY_WNM; -+ *pcontent = rtw_set_fixed_ie(*pcontent, 1, &(category), &(pattrib->pktlen)); -+ *pcontent = rtw_set_fixed_ie(*pcontent, 1, &(action), &(pattrib->pktlen)); -+} -+ -+void rtw_wnm_build_btm_req_ies(_adapter *padapter, -+ u8 **pframe, struct pkt_attrib *pattrib, -+ struct btm_req_hdr *phdr, u8 *purl, u32 url_len, -+ u8 *pcandidates, u8 candidate_cnt) -+{ -+ int i; -+ -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ &phdr->dialog_token, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ &phdr->req_mode, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 2, -+ (u8 *)&phdr->disassoc_timer, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ &phdr->validity_interval, &(pattrib->pktlen)); -+ -+ if (phdr->req_mode & BSS_TERMINATION_INCLUDED) { -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ &phdr->term_duration.id, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ &phdr->term_duration.len, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 8, -+ (u8 *)&phdr->term_duration.tsf, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 2, -+ (u8 *)&phdr->term_duration.duration, &(pattrib->pktlen)); -+ } -+ -+ if ((purl != NULL) && (url_len > 0) && -+ (phdr->req_mode & ESS_DISASSOC_IMMINENT)) { -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ (u8 *)&url_len, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, -+ url_len, purl, &(pattrib->pktlen)); -+ } -+ -+ if ((pcandidates != NULL) && (candidate_cnt > 0)) { -+ for (i=0; inb_rpt); -+ -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ &pcandidate->nb_rpt.id, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ &pcandidate->nb_rpt.len, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, ETH_ALEN, -+ pcandidate->nb_rpt.bssid, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 4, -+ (u8 *)&pcandidate->nb_rpt.bss_info, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ &pcandidate->nb_rpt.reg_class, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ &pcandidate->nb_rpt.ch_num, &(pattrib->pktlen)); -+ *pframe = rtw_set_fixed_ie(*pframe, 1, -+ &pcandidate->nb_rpt.phy_type, &(pattrib->pktlen)); -+ *pframe = rtw_set_ie(*pframe, WNM_BTM_CAND_PREF_SUBEID, 1, -+ (u8 *)&pcandidate->preference, &(pattrib->pktlen)); -+ } -+ } -+ -+} -+ -+void rtw_wnm_issue_btm_req(_adapter *padapter, -+ u8 *pmac, struct btm_req_hdr *phdr, u8 *purl, u32 url_len, -+ u8 *pcandidates, u8 candidate_cnt) -+{ -+ struct roam_nb_info *pnb = &(padapter->mlmepriv.nb_info); -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ u8 action, *pframe, dialog_token = 0; -+ -+ if (!pmac || is_zero_mac_addr(pmac) -+ || is_broadcast_mac_addr(pmac)) -+ return ; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ return ; -+ -+ rtw_wnm_hdr_init(padapter, pmgntframe, pmac, -+ RTW_WLAN_ACTION_WNM_BTM_REQ, &pframe); -+ -+ pattrib = &(pmgntframe->attrib); -+ rtw_wnm_build_btm_req_ies(padapter, &pframe, pattrib, -+ phdr, purl, url_len, pcandidates, candidate_cnt); -+ -+ if (0) { -+ u8 *__p = (u8 *)(pmgntframe->buf_addr + TXDESC_OFFSET); -+ RTW_WNM_DUMP("WNM BTM REQ :", __p, pattrib->pktlen); -+ } -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ RTW_INFO("WNM: BSS Transition Management Request sent\n"); -+} -+ -+void rtw_wnm_issue_action(_adapter *padapter, -+ u8 action, u8 reason, u8 dialog) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct xmit_frame *pmgntframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct pkt_attrib *pattrib; -+ u8 category, termination_delay, *pframe, dialog_token = 0; -+#ifdef CONFIG_RTW_MBO -+ u8 mbo_trans_rej_res = 1; /* Unspecified reason */ -+ u8 mbo_notif_req_type ; -+#endif -+ u16 *fctrl; -+ -+ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) -+ return ; -+ -+ pattrib = &(pmgntframe->attrib); -+ update_mgntframe_attrib(padapter, pattrib); -+ _rtw_memset(pmgntframe->buf_addr, 0, (WLANHDR_OFFSET + TXDESC_OFFSET)); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr + TXDESC_OFFSET); -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ category = RTW_WLAN_CATEGORY_WNM; -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ -+ switch (action) { -+ case RTW_WLAN_ACTION_WNM_BTM_QUERY: -+ dialog_token++; -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialog_token), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(reason), &(pattrib->pktlen)); -+ RTW_INFO("WNM: BSS Transition Management Query sent\n"); -+ break; -+ case RTW_WLAN_ACTION_WNM_BTM_RSP: -+ dialog_token = dialog; -+ termination_delay = 0; -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialog_token), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(reason), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(termination_delay), &(pattrib->pktlen)); -+ if (!reason && !is_zero_mac_addr(pmlmepriv->nb_info.roam_target_addr)) { -+ pframe = rtw_set_fixed_ie(pframe, 6, -+ pmlmepriv->nb_info.roam_target_addr, &(pattrib->pktlen)); -+ } -+ -+#ifdef CONFIG_RTW_MBO -+ rtw_mbo_build_trans_reject_reason_attr(padapter, -+ &pframe, pattrib, &mbo_trans_rej_res); -+#endif -+ -+ RTW_INFO("WNM: BSS Transition Management Response sent(reason:%d)\n", reason); -+ break; -+ case RTW_WLAN_ACTION_WNM_NOTIF_REQ: -+#ifdef CONFIG_RTW_MBO -+ dialog_token++; -+ mbo_notif_req_type = WLAN_EID_VENDOR_SPECIFIC; -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialog_token), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(mbo_notif_req_type), &(pattrib->pktlen)); -+ rtw_mbo_build_wnm_notification(padapter, &pframe, pattrib); -+ RTW_INFO("WNM: Notification request sent\n"); -+#endif -+ break; -+ default: -+ goto exit; -+ } -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ -+exit: -+ return; -+} -+ -+/* argument req_ie@cfg80211_roamed()/cfg80211_connect_result() -+ is association request IEs format. if driver used reassoc-req format, -+ RSN IE could not be parsed @supplicant process */ -+void rtw_wnm_update_reassoc_req_ie(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u32 dup_len, offset; -+ u8 *pdup; -+ -+ if (!pmlmepriv->assoc_req || !pmlmepriv->assoc_req_len) -+ return; -+ -+ /* total len is assoc req len without Current AP Field*/ -+ dup_len = pmlmepriv->assoc_req_len - ETH_ALEN; -+ -+ /* offset is a len of 80211 header + capability(2B) + listen interval(2B) */ -+ offset = sizeof(struct rtw_ieee80211_hdr_3addr) + 4; -+ -+ pdup = rtw_zmalloc(dup_len); -+ if (pdup) { -+ /* remove Current AP Field @reassoc req IE */ -+ _rtw_memcpy(pdup, pmlmepriv->assoc_req, offset); -+ _rtw_memcpy(pdup + offset, pmlmepriv->assoc_req + offset + ETH_ALEN, -+ pmlmepriv->assoc_req_len - offset); -+ rtw_buf_update(&pmlmepriv->assoc_req, -+ &pmlmepriv->assoc_req_len, pdup, dup_len); -+ rtw_mfree(pdup, dup_len); -+ } -+} -+#endif /* CONFIG_RTW_WNM */ -+ -+#if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K) -+void rtw_roam_nb_info_init(_adapter *padapter) -+{ -+ struct roam_nb_info *pnb = &(padapter->mlmepriv.nb_info); -+ struct btm_rpt_cache *pcache = &(pnb->btm_cache); -+ -+ _rtw_memset(&pnb->nb_rpt, 0, sizeof(pnb->nb_rpt)); -+ _rtw_memset(&pnb->nb_rpt_ch_list, 0, sizeof(pnb->nb_rpt_ch_list)); -+ _rtw_memset(&pnb->roam_target_addr, 0, ETH_ALEN); -+ pnb->nb_rpt_valid = _FALSE; -+ pnb->nb_rpt_ch_list_num = 0; -+ pnb->preference_en = _FALSE; -+ pnb->nb_rpt_is_same = _TRUE; -+ pnb->last_nb_rpt_entries = 0; -+ pnb->disassoc_waiting = -1; -+#ifdef CONFIG_RTW_WNM -+ pnb->features = 0; -+ /* pnb->features |= RTW_WNM_FEATURE_BTM_REQ_EN; */ -+ -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ pnb->features |= RTW_WNM_FEATURE_BTM_REQ_EN; -+#endif -+ -+ rtw_init_timer(&pnb->roam_scan_timer, -+ padapter, rtw_wnm_roam_scan_hdl, -+ padapter); -+ rtw_init_timer(&pnb->disassoc_chk_timer, -+ padapter, rtw_wnm_disassoc_chk_hdl, -+ padapter); -+ -+ _rtw_memset(pcache, 0, sizeof(struct btm_rpt_cache)); -+ pcache->validity_time = wnm_defualt_validity_time; -+ pcache->disassoc_time= wnm_default_disassoc_time ; -+#endif -+} -+ -+u8 rtw_roam_nb_scan_list_set( -+ _adapter *padapter, struct sitesurvey_parm *pparm) -+{ -+ u8 ret = _FALSE; -+ u32 i; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct roam_nb_info *pnb = &(pmlmepriv->nb_info); -+ -+#ifdef CONFIG_RTW_80211R -+ if (!rtw_chk_roam_flags(padapter, RTW_ROAM_ACTIVE) -+ && !rtw_ft_chk_flags(padapter, RTW_FT_BTM_ROAM)) -+ return ret; -+#endif -+ -+ if (!pmlmepriv->need_to_roam) -+ return ret; -+ -+ if ((!pmlmepriv->nb_info.nb_rpt_valid) || (!pnb->nb_rpt_ch_list_num)) -+ return ret; -+ -+ if (!pparm) -+ return ret; -+ -+ rtw_init_sitesurvey_parm(padapter, pparm); -+ if (rtw_roam_busy_scan(padapter, pnb)) { -+ pparm->ch_num = 1; -+ pparm->ch[pmlmepriv->ch_cnt].hw_value = -+ pnb->nb_rpt_ch_list[pmlmepriv->ch_cnt].hw_value; -+ pmlmepriv->ch_cnt++; -+ ret = _TRUE; -+ -+ RTW_WNM_INFO("%s: ch_cnt=%u, (%u)hw_value=%u\n", -+ __func__, pparm->ch_num, pmlmepriv->ch_cnt, -+ pparm->ch[pmlmepriv->ch_cnt].hw_value); -+ -+ if (pmlmepriv->ch_cnt == pnb->nb_rpt_ch_list_num) { -+ pmlmepriv->nb_info.nb_rpt_valid = _FALSE; -+ pmlmepriv->ch_cnt = 0; -+ } -+ goto set_bssid_list; -+ } -+ -+ pparm->ch_num = (pnb->nb_rpt_ch_list_num > RTW_CHANNEL_SCAN_AMOUNT)? -+ (RTW_CHANNEL_SCAN_AMOUNT):(pnb->nb_rpt_ch_list_num); -+ for (i=0; ich_num; i++) { -+ pparm->ch[i].hw_value = pnb->nb_rpt_ch_list[i].hw_value; -+ pparm->ch[i].flags = RTW_IEEE80211_CHAN_PASSIVE_SCAN; -+ } -+ -+ pmlmepriv->nb_info.nb_rpt_valid = _FALSE; -+ pmlmepriv->ch_cnt = 0; -+ ret = _TRUE; -+ -+set_bssid_list: -+ rtw_set_802_11_bssid_list_scan(padapter, pparm); -+ return ret; -+} -+ -+static u8 rtw_wnm_nb_elem_parsing( -+ u8* pdata, u32 data_len, u8 from_btm, -+ u32 *nb_rpt_num, u8 *nb_rpt_is_same, -+ struct roam_nb_info *pnb, struct wnm_btm_cant *pcandidates) -+{ -+ u8 bfound = _FALSE, ret = _SUCCESS; -+ u8 *ptr, *pend, *op; -+ u32 elem_len, subelem_len, op_len; -+ u32 i, nb_rpt_entries = 0; -+ struct nb_rpt_hdr *pie; -+ struct wnm_btm_cant *pcandidate; -+ -+ if ((!pdata) || (!pnb)) -+ return _FAIL; -+ -+ if ((from_btm) && (!pcandidates)) -+ return _FAIL; -+ -+ ptr = pdata; -+ pend = ptr + data_len; -+ elem_len = data_len; -+ subelem_len = (u32)*(pdata+1); -+ -+ for (i=0; i < RTW_MAX_NB_RPT_NUM; i++) { -+ if (((ptr + 7) > pend) || (elem_len < subelem_len)) -+ break; -+ -+ if (*ptr != RTW_WLAN_ACTION_WNM_NB_RPT_ELEM) { -+ RTW_WNM_INFO("WNM: end of data(0x%2x)!\n", *ptr); -+ break; -+ } -+ -+ pie = (struct nb_rpt_hdr *)ptr; -+ if (from_btm) { -+ op = rtw_get_ie((u8 *)(ptr+15), -+ WNM_BTM_CAND_PREF_SUBEID, -+ &op_len, (subelem_len - 15)); -+ } -+ -+ ptr = (u8 *)(ptr + subelem_len + 2); -+ elem_len -= (subelem_len +2); -+ subelem_len = *(ptr+1); -+ if (from_btm) { -+ pcandidate = (pcandidates + i); -+ _rtw_memcpy(&pcandidate->nb_rpt, pie, sizeof(struct nb_rpt_hdr)); -+ if (op && (op_len !=0)) { -+ pcandidate->preference = *(op + 2); -+ bfound = _TRUE; -+ } else -+ pcandidate->preference = 0; -+ -+ RTW_WNM_INFO("WNM: preference check bssid("MAC_FMT -+ ") ,bss_info(0x%04X), reg_class(0x%02X), ch(%d)," -+ " phy_type(0x%02X), preference(0x%02X)\n", -+ MAC_ARG(pcandidate->nb_rpt.bssid), pcandidate->nb_rpt.bss_info, -+ pcandidate->nb_rpt.reg_class, pcandidate->nb_rpt.ch_num, -+ pcandidate->nb_rpt.phy_type, pcandidate->preference); -+ } else { -+ if (_rtw_memcmp(&pnb->nb_rpt[i], pie, sizeof(struct nb_rpt_hdr)) == _FALSE) -+ *nb_rpt_is_same = _FALSE; -+ _rtw_memcpy(&pnb->nb_rpt[i], pie, sizeof(struct nb_rpt_hdr)); -+ } -+ nb_rpt_entries++; -+ } -+ -+ if (from_btm) -+ pnb->preference_en = (bfound)?_TRUE:_FALSE; -+ -+ *nb_rpt_num = nb_rpt_entries; -+ return ret; -+} -+ -+/* selection sorting based on preference value -+ * IN : nb_rpt_entries - candidate num -+ * IN/OUT : pcandidates - candidate list -+ * return : TRUE - means pcandidates is updated. -+ */ -+static u8 rtw_wnm_candidates_sorting( -+ u32 nb_rpt_entries, struct wnm_btm_cant *pcandidates) -+{ -+ u8 updated = _FALSE; -+ u32 i, j, pos; -+ struct wnm_btm_cant swap; -+ struct wnm_btm_cant *pcant_1, *pcant_2; -+ -+ if ((!nb_rpt_entries) || (!pcandidates)) -+ return updated; -+ -+ for (i=0; i < (nb_rpt_entries - 1); i++) { -+ pos = i; -+ for (j=(i + 1); j < nb_rpt_entries; j++) { -+ pcant_1 = pcandidates+pos; -+ pcant_2 = pcandidates+j; -+ if ((pcant_1->preference) < (pcant_2->preference)) -+ pos = j; -+ } -+ -+ if (pos != i) { -+ updated = _TRUE; -+ _rtw_memcpy(&swap, (pcandidates+i), sizeof(struct wnm_btm_cant)); -+ _rtw_memcpy((pcandidates+i), (pcandidates+pos), sizeof(struct wnm_btm_cant)); -+ _rtw_memcpy((pcandidates+pos), &swap, sizeof(struct wnm_btm_cant)); -+ } -+ } -+ return updated; -+} -+ -+static void rtw_wnm_nb_info_update( -+ u32 nb_rpt_entries, u8 from_btm, -+ struct roam_nb_info *pnb, struct wnm_btm_cant *pcandidates, -+ u8 *nb_rpt_is_same) -+{ -+ u8 is_found; -+ u32 i, j; -+ struct wnm_btm_cant *pcand; -+ -+ if (!pnb) -+ return; -+ -+ pnb->nb_rpt_ch_list_num = 0; -+ for (i=0; inb_rpt[i], &pcand->nb_rpt, -+ sizeof(struct nb_rpt_hdr)) == _FALSE) -+ *nb_rpt_is_same = _FALSE; -+ _rtw_memcpy(&pnb->nb_rpt[i], &pcand->nb_rpt, sizeof(struct nb_rpt_hdr)); -+ } -+ -+ RTW_WNM_INFO("WNM: bssid(" MAC_FMT -+ ") , bss_info(0x%04X), reg_class(0x%02X), ch_num(%d), phy_type(0x%02X)\n", -+ MAC_ARG(pnb->nb_rpt[i].bssid), pnb->nb_rpt[i].bss_info, -+ pnb->nb_rpt[i].reg_class, pnb->nb_rpt[i].ch_num, -+ pnb->nb_rpt[i].phy_type); -+ -+ if (pnb->nb_rpt[i].ch_num == 0) -+ continue; -+ -+ for (j=0; jnb_rpt[i].ch_num == pnb->nb_rpt_ch_list[j].hw_value) { -+ is_found = _TRUE; -+ break; -+ } -+ } -+ -+ if (!is_found) { -+ pnb->nb_rpt_ch_list[pnb->nb_rpt_ch_list_num].hw_value = pnb->nb_rpt[i].ch_num; -+ pnb->nb_rpt_ch_list_num++; -+ } -+ } -+} -+ -+static void rtw_wnm_btm_candidate_select(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct roam_nb_info *pnb = &(padapter->mlmepriv.nb_info); -+ struct wlan_network *pnetwork; -+ u8 bfound = _FALSE; -+ u8 ignore_currrent = _FALSE; -+ u32 i; -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_chk_flags(padapter, RTW_FT_BTM_ROAM)) -+ ignore_currrent = _TRUE; -+#endif -+ -+ for (i = 0; i < pnb->last_nb_rpt_entries; i++) { -+ if (ignore_currrent && -+ (_rtw_memcmp(pnb->nb_rpt[i].bssid,\ -+ padapter->mlmepriv.cur_network.network.MacAddress, ETH_ALEN))) { -+ RTW_WNM_INFO("WNM : ignore candidate "MAC_FMT" for it's connected(%u)!\n", -+ MAC_ARG(pnb->nb_rpt[i].bssid), i); -+ continue; -+ } -+ -+ pnetwork = rtw_find_network( -+ &(pmlmepriv->scanned_queue), -+ pnb->nb_rpt[i].bssid); -+ -+ if (pnetwork) { -+ bfound = _TRUE; -+ break; -+ } -+ } -+ -+ if (bfound) { -+ _rtw_memcpy(pnb->roam_target_addr, pnb->nb_rpt[i].bssid, ETH_ALEN); -+ RTW_INFO("WNM : select btm entry(%d) - %s("MAC_FMT", ch:%u) rssi:%d\n" -+ , i -+ , pnetwork->network.Ssid.Ssid -+ , MAC_ARG(pnetwork->network.MacAddress) -+ , pnetwork->network.Configuration.DSConfig -+ , (int)pnetwork->network.Rssi); -+ } else -+ _rtw_memset(pnb->roam_target_addr,0, ETH_ALEN); -+} -+ -+u32 rtw_wnm_btm_candidates_survey( -+ _adapter *padapter, u8* pframe, u32 elem_len, u8 from_btm) -+{ -+ struct roam_nb_info *pnb = &(padapter->mlmepriv.nb_info); -+ struct wnm_btm_cant *pcandidate_list = NULL; -+ u8 nb_rpt_is_same = _TRUE; -+ u32 ret = _FAIL; -+ u32 nb_rpt_entries = 0; -+ -+ if (from_btm) { -+ u32 mlen = sizeof(struct wnm_btm_cant) * RTW_MAX_NB_RPT_NUM; -+ pcandidate_list = (struct wnm_btm_cant *)rtw_malloc(mlen); -+ if (pcandidate_list == NULL) -+ goto exit; -+ } -+ -+ /*clean the status set last time*/ -+ _rtw_memset(&pnb->nb_rpt_ch_list, 0, sizeof(pnb->nb_rpt_ch_list)); -+ pnb->nb_rpt_valid = _FALSE; -+ if (!rtw_wnm_nb_elem_parsing( -+ pframe, elem_len, from_btm, -+ &nb_rpt_entries, &nb_rpt_is_same, -+ pnb, pcandidate_list)) -+ goto exit; -+ -+ if (nb_rpt_entries != 0) { -+ if ((from_btm) && (rtw_wnm_btm_preference_cap(padapter))) -+ rtw_wnm_candidates_sorting(nb_rpt_entries, pcandidate_list); -+ -+ rtw_wnm_nb_info_update( -+ nb_rpt_entries, from_btm, -+ pnb, pcandidate_list, &nb_rpt_is_same); -+ } -+ -+ RTW_WNM_INFO("nb_rpt_is_same = %d, nb_rpt_entries = %d, last_nb_rpt_entries = %d\n", -+ nb_rpt_is_same, nb_rpt_entries, pnb->last_nb_rpt_entries); -+ if ((nb_rpt_is_same == _TRUE) && (nb_rpt_entries == pnb->last_nb_rpt_entries)) -+ pnb->nb_rpt_is_same = _TRUE; -+ else { -+ pnb->nb_rpt_is_same = _FALSE; -+ pnb->last_nb_rpt_entries = nb_rpt_entries; -+ } -+ -+ if ((from_btm) && (nb_rpt_entries != 0)) -+ rtw_wnm_btm_candidate_select(padapter); -+ -+ pnb->nb_rpt_valid = _TRUE; -+ ret = _SUCCESS; -+ -+exit: -+ if (from_btm && pcandidate_list) -+ rtw_mfree((u8 *)pcandidate_list, sizeof(struct wnm_btm_cant) * RTW_MAX_NB_RPT_NUM); -+ -+ return ret; -+} -+ -+#endif /*defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K) */ -+ -diff --git a/drivers/staging/rtl8723cs/core/rtw_xmit.c b/drivers/staging/rtl8723cs/core/rtw_xmit.c -new file mode 100644 -index 000000000000..10e831db3e99 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/rtw_xmit.c -@@ -0,0 +1,6638 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_XMIT_C_ -+ -+#include -+#include -+ -+static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 }; -+static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 }; -+ -+static void _init_txservq(struct tx_servq *ptxservq) -+{ -+ _rtw_init_listhead(&ptxservq->tx_pending); -+ _rtw_init_queue(&ptxservq->sta_pending); -+ ptxservq->qcnt = 0; -+} -+ -+ -+void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv) -+{ -+ -+ -+ _rtw_memset((unsigned char *)psta_xmitpriv, 0, sizeof(struct sta_xmit_priv)); -+ -+ _rtw_spinlock_init(&psta_xmitpriv->lock); -+ -+ /* for(i = 0 ; i < MAX_NUMBLKS; i++) */ -+ /* _init_txservq(&(psta_xmitpriv->blk_q[i])); */ -+ -+ _init_txservq(&psta_xmitpriv->be_q); -+ _init_txservq(&psta_xmitpriv->bk_q); -+ _init_txservq(&psta_xmitpriv->vi_q); -+ _init_txservq(&psta_xmitpriv->vo_q); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ _init_txservq(&psta_xmitpriv->mgmt_q); -+#endif -+ _rtw_init_listhead(&psta_xmitpriv->legacy_dz); -+ _rtw_init_listhead(&psta_xmitpriv->apsd); -+ -+ -+} -+ -+void rtw_init_xmit_block(_adapter *padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ _rtw_spinlock_init(&dvobj->xmit_block_lock); -+ dvobj->xmit_block = XMIT_BLOCK_NONE; -+ -+} -+void rtw_free_xmit_block(_adapter *padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ _rtw_spinlock_free(&dvobj->xmit_block_lock); -+} -+ -+s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter) -+{ -+ int i; -+ struct xmit_buf *pxmitbuf; -+ struct xmit_frame *pxframe; -+ sint res = _SUCCESS; -+ -+ -+ /* We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). */ -+ /* _rtw_memset((unsigned char *)pxmitpriv, 0, sizeof(struct xmit_priv)); */ -+ -+ _rtw_spinlock_init(&pxmitpriv->lock); -+ _rtw_spinlock_init(&pxmitpriv->lock_sctx); -+ _rtw_init_sema(&pxmitpriv->xmit_sema, 0); -+ -+ /* -+ Please insert all the queue initializaiton using _rtw_init_queue below -+ */ -+ -+ pxmitpriv->adapter = padapter; -+ -+ /* for(i = 0 ; i < MAX_NUMBLKS; i++) */ -+ /* _rtw_init_queue(&pxmitpriv->blk_strms[i]); */ -+ -+ _rtw_init_queue(&pxmitpriv->be_pending); -+ _rtw_init_queue(&pxmitpriv->bk_pending); -+ _rtw_init_queue(&pxmitpriv->vi_pending); -+ _rtw_init_queue(&pxmitpriv->vo_pending); -+ _rtw_init_queue(&pxmitpriv->mgmt_pending); -+ -+ /* _rtw_init_queue(&pxmitpriv->legacy_dz_queue); */ -+ /* _rtw_init_queue(&pxmitpriv->apsd_queue); */ -+ -+ _rtw_init_queue(&pxmitpriv->free_xmit_queue); -+ -+ /* -+ Please allocate memory with the sz = (struct xmit_frame) * NR_XMITFRAME, -+ and initialize free_xmit_frame below. -+ Please also apply free_txobj to link_up all the xmit_frames... -+ */ -+ -+ pxmitpriv->pallocated_frame_buf = rtw_zvmalloc(NR_XMITFRAME * sizeof(struct xmit_frame) + 4); -+ -+ if (pxmitpriv->pallocated_frame_buf == NULL) { -+ pxmitpriv->pxmit_frame_buf = NULL; -+ res = _FAIL; -+ goto exit; -+ } -+ pxmitpriv->pxmit_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_frame_buf), 4); -+ /* pxmitpriv->pxmit_frame_buf = pxmitpriv->pallocated_frame_buf + 4 - */ -+ /* ((SIZE_PTR) (pxmitpriv->pallocated_frame_buf) &3); */ -+ -+ pxframe = (struct xmit_frame *) pxmitpriv->pxmit_frame_buf; -+ -+ for (i = 0; i < NR_XMITFRAME; i++) { -+ _rtw_init_listhead(&(pxframe->list)); -+ -+ pxframe->padapter = padapter; -+ pxframe->frame_tag = NULL_FRAMETAG; -+ -+ pxframe->pkt = NULL; -+ -+ pxframe->buf_addr = NULL; -+ pxframe->pxmitbuf = NULL; -+ -+ rtw_list_insert_tail(&(pxframe->list), &(pxmitpriv->free_xmit_queue.queue)); -+ -+ pxframe++; -+ } -+ -+ pxmitpriv->free_xmitframe_cnt = NR_XMITFRAME; -+ -+ pxmitpriv->frag_len = MAX_FRAG_THRESHOLD; -+ -+ -+ /* init xmit_buf */ -+ _rtw_init_queue(&pxmitpriv->free_xmitbuf_queue); -+ _rtw_init_queue(&pxmitpriv->pending_xmitbuf_queue); -+ -+ pxmitpriv->pallocated_xmitbuf = rtw_zvmalloc(NR_XMITBUFF * sizeof(struct xmit_buf) + 4); -+ -+ if (pxmitpriv->pallocated_xmitbuf == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pxmitpriv->pxmitbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmitbuf), 4); -+ /* pxmitpriv->pxmitbuf = pxmitpriv->pallocated_xmitbuf + 4 - */ -+ /* ((SIZE_PTR) (pxmitpriv->pallocated_xmitbuf) &3); */ -+ -+ pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; -+ -+ for (i = 0; i < NR_XMITBUFF; i++) { -+ _rtw_init_listhead(&pxmitbuf->list); -+ -+ pxmitbuf->priv_data = NULL; -+ pxmitbuf->padapter = padapter; -+ pxmitbuf->buf_tag = XMITBUF_DATA; -+ -+ /* Tx buf allocation may fail sometimes, so sleep and retry. */ -+ res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, (MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ), _TRUE); -+ if (res == _FAIL) { -+ rtw_msleep_os(10); -+ res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, (MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ), _TRUE); -+ if (res == _FAIL) -+ goto exit; -+ } -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pxmitbuf->phead = pxmitbuf->pbuf; -+ pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMITBUF_SZ; -+ pxmitbuf->len = 0; -+ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; -+#endif -+ -+ pxmitbuf->flags = XMIT_VO_QUEUE; -+ -+ rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmitbuf_queue.queue)); -+#ifdef DBG_XMIT_BUF -+ pxmitbuf->no = i; -+#endif -+ -+ pxmitbuf++; -+ -+ } -+ -+ pxmitpriv->free_xmitbuf_cnt = NR_XMITBUFF; -+ -+ /* init xframe_ext queue, the same count as extbuf */ -+ _rtw_init_queue(&pxmitpriv->free_xframe_ext_queue); -+ -+ pxmitpriv->xframe_ext_alloc_addr = rtw_zvmalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_frame) + 4); -+ -+ if (pxmitpriv->xframe_ext_alloc_addr == NULL) { -+ pxmitpriv->xframe_ext = NULL; -+ res = _FAIL; -+ goto exit; -+ } -+ pxmitpriv->xframe_ext = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->xframe_ext_alloc_addr), 4); -+ pxframe = (struct xmit_frame *)pxmitpriv->xframe_ext; -+ -+ for (i = 0; i < NR_XMIT_EXTBUFF; i++) { -+ _rtw_init_listhead(&(pxframe->list)); -+ -+ pxframe->padapter = padapter; -+ pxframe->frame_tag = NULL_FRAMETAG; -+ -+ pxframe->pkt = NULL; -+ -+ pxframe->buf_addr = NULL; -+ pxframe->pxmitbuf = NULL; -+ -+ pxframe->ext_tag = 1; -+ -+ rtw_list_insert_tail(&(pxframe->list), &(pxmitpriv->free_xframe_ext_queue.queue)); -+ -+ pxframe++; -+ } -+ pxmitpriv->free_xframe_ext_cnt = NR_XMIT_EXTBUFF; -+ -+ /* Init xmit extension buff */ -+ _rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue); -+ -+ pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4); -+ -+ if (pxmitpriv->pallocated_xmit_extbuf == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmit_extbuf), 4); -+ -+ pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; -+ -+ for (i = 0; i < NR_XMIT_EXTBUFF; i++) { -+ _rtw_init_listhead(&pxmitbuf->list); -+ -+ pxmitbuf->priv_data = NULL; -+ pxmitbuf->padapter = padapter; -+ pxmitbuf->buf_tag = XMITBUF_MGNT; -+ -+ res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, MAX_XMIT_EXTBUF_SZ + XMITBUF_ALIGN_SZ, _TRUE); -+ if (res == _FAIL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pxmitbuf->phead = pxmitbuf->pbuf; -+ pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMIT_EXTBUF_SZ; -+ pxmitbuf->len = 0; -+ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; -+#endif -+ -+ rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue)); -+#ifdef DBG_XMIT_BUF_EXT -+ pxmitbuf->no = i; -+#endif -+ pxmitbuf++; -+ -+ } -+ -+ pxmitpriv->free_xmit_extbuf_cnt = NR_XMIT_EXTBUFF; -+ -+ for (i = 0; i < CMDBUF_MAX; i++) { -+ pxmitbuf = &pxmitpriv->pcmd_xmitbuf[i]; -+ if (pxmitbuf) { -+ _rtw_init_listhead(&pxmitbuf->list); -+ -+ pxmitbuf->priv_data = NULL; -+ pxmitbuf->padapter = padapter; -+ pxmitbuf->buf_tag = XMITBUF_CMD; -+ -+ res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, MAX_CMDBUF_SZ + XMITBUF_ALIGN_SZ, _TRUE); -+ if (res == _FAIL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pxmitbuf->phead = pxmitbuf->pbuf; -+ pxmitbuf->pend = pxmitbuf->pbuf + MAX_CMDBUF_SZ; -+ pxmitbuf->len = 0; -+ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; -+#endif -+ pxmitbuf->alloc_sz = MAX_CMDBUF_SZ + XMITBUF_ALIGN_SZ; -+ } -+ } -+ -+ rtw_alloc_hwxmits(padapter); -+ rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); -+ -+ for (i = 0; i < 4; i++) -+ pxmitpriv->wmm_para_seq[i] = i; -+ -+#ifdef CONFIG_USB_HCI -+ pxmitpriv->txirp_cnt = 1; -+ -+ _rtw_init_sema(&(pxmitpriv->tx_retevt), 0); -+ -+ /* per AC pending irp */ -+ pxmitpriv->beq_cnt = 0; -+ pxmitpriv->bkq_cnt = 0; -+ pxmitpriv->viq_cnt = 0; -+ pxmitpriv->voq_cnt = 0; -+#endif -+ -+ -+#ifdef CONFIG_XMIT_ACK -+ pxmitpriv->ack_tx = _FALSE; -+ _rtw_mutex_init(&pxmitpriv->ack_tx_mutex); -+ rtw_sctx_init(&pxmitpriv->ack_tx_ops, 0); -+#endif -+ -+#ifdef CONFIG_TX_AMSDU -+ rtw_init_timer(&(pxmitpriv->amsdu_vo_timer), padapter, -+ rtw_amsdu_vo_timeout_handler, padapter); -+ pxmitpriv->amsdu_vo_timeout = RTW_AMSDU_TIMER_UNSET; -+ -+ rtw_init_timer(&(pxmitpriv->amsdu_vi_timer), padapter, -+ rtw_amsdu_vi_timeout_handler, padapter); -+ pxmitpriv->amsdu_vi_timeout = RTW_AMSDU_TIMER_UNSET; -+ -+ rtw_init_timer(&(pxmitpriv->amsdu_be_timer), padapter, -+ rtw_amsdu_be_timeout_handler, padapter); -+ pxmitpriv->amsdu_be_timeout = RTW_AMSDU_TIMER_UNSET; -+ -+ rtw_init_timer(&(pxmitpriv->amsdu_bk_timer), padapter, -+ rtw_amsdu_bk_timeout_handler, padapter); -+ pxmitpriv->amsdu_bk_timeout = RTW_AMSDU_TIMER_UNSET; -+ -+ pxmitpriv->amsdu_debug_set_timer = 0; -+ pxmitpriv->amsdu_debug_timeout = 0; -+ pxmitpriv->amsdu_debug_coalesce_one = 0; -+ pxmitpriv->amsdu_debug_coalesce_two = 0; -+#endif -+#ifdef DBG_TXBD_DESC_DUMP -+ pxmitpriv->dump_txbd_desc = 0; -+#endif -+ rtw_init_xmit_block(padapter); -+ rtw_hal_init_xmit_priv(padapter); -+ -+exit: -+ -+ -+ return res; -+} -+ -+void rtw_mfree_xmit_priv_lock(struct xmit_priv *pxmitpriv); -+void rtw_mfree_xmit_priv_lock(struct xmit_priv *pxmitpriv) -+{ -+ _rtw_spinlock_free(&pxmitpriv->lock); -+ _rtw_free_sema(&pxmitpriv->xmit_sema); -+ -+ _rtw_spinlock_free(&pxmitpriv->be_pending.lock); -+ _rtw_spinlock_free(&pxmitpriv->bk_pending.lock); -+ _rtw_spinlock_free(&pxmitpriv->vi_pending.lock); -+ _rtw_spinlock_free(&pxmitpriv->vo_pending.lock); -+ _rtw_spinlock_free(&pxmitpriv->mgmt_pending.lock); -+ -+ /* _rtw_spinlock_free(&pxmitpriv->legacy_dz_queue.lock); */ -+ /* _rtw_spinlock_free(&pxmitpriv->apsd_queue.lock); */ -+ -+ _rtw_spinlock_free(&pxmitpriv->free_xmit_queue.lock); -+ _rtw_spinlock_free(&pxmitpriv->free_xmitbuf_queue.lock); -+ _rtw_spinlock_free(&pxmitpriv->pending_xmitbuf_queue.lock); -+} -+ -+ -+void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv) -+{ -+ int i; -+ _adapter *padapter = pxmitpriv->adapter; -+ struct xmit_frame *pxmitframe = (struct xmit_frame *) pxmitpriv->pxmit_frame_buf; -+ struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; -+ -+ -+ rtw_hal_free_xmit_priv(padapter); -+ -+ rtw_mfree_xmit_priv_lock(pxmitpriv); -+ -+ if (pxmitpriv->pxmit_frame_buf == NULL) -+ goto out; -+ -+ for (i = 0; i < NR_XMITFRAME; i++) { -+ rtw_os_xmit_complete(padapter, pxmitframe); -+ -+ pxmitframe++; -+ } -+ -+ for (i = 0; i < NR_XMITBUFF; i++) { -+ rtw_os_xmit_resource_free(padapter, pxmitbuf, (MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ), _TRUE); -+ -+ pxmitbuf++; -+ } -+ -+ if (pxmitpriv->pallocated_frame_buf) -+ rtw_vmfree(pxmitpriv->pallocated_frame_buf, NR_XMITFRAME * sizeof(struct xmit_frame) + 4); -+ -+ -+ if (pxmitpriv->pallocated_xmitbuf) -+ rtw_vmfree(pxmitpriv->pallocated_xmitbuf, NR_XMITBUFF * sizeof(struct xmit_buf) + 4); -+ -+ /* free xframe_ext queue, the same count as extbuf */ -+ if ((pxmitframe = (struct xmit_frame *)pxmitpriv->xframe_ext)) { -+ for (i = 0; i < NR_XMIT_EXTBUFF; i++) { -+ rtw_os_xmit_complete(padapter, pxmitframe); -+ pxmitframe++; -+ } -+ } -+ if (pxmitpriv->xframe_ext_alloc_addr) -+ rtw_vmfree(pxmitpriv->xframe_ext_alloc_addr, NR_XMIT_EXTBUFF * sizeof(struct xmit_frame) + 4); -+ _rtw_spinlock_free(&pxmitpriv->free_xframe_ext_queue.lock); -+ -+ /* free xmit extension buff */ -+ _rtw_spinlock_free(&pxmitpriv->free_xmit_extbuf_queue.lock); -+ -+ pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; -+ for (i = 0; i < NR_XMIT_EXTBUFF; i++) { -+ rtw_os_xmit_resource_free(padapter, pxmitbuf, (MAX_XMIT_EXTBUF_SZ + XMITBUF_ALIGN_SZ), _TRUE); -+ -+ pxmitbuf++; -+ } -+ -+ if (pxmitpriv->pallocated_xmit_extbuf) -+ rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4); -+ -+ for (i = 0; i < CMDBUF_MAX; i++) { -+ pxmitbuf = &pxmitpriv->pcmd_xmitbuf[i]; -+ if (pxmitbuf != NULL) -+ rtw_os_xmit_resource_free(padapter, pxmitbuf, MAX_CMDBUF_SZ + XMITBUF_ALIGN_SZ , _TRUE); -+ } -+ -+ rtw_free_hwxmits(padapter); -+ -+#ifdef CONFIG_XMIT_ACK -+ _rtw_mutex_free(&pxmitpriv->ack_tx_mutex); -+#endif -+ rtw_free_xmit_block(padapter); -+out: -+ return; -+} -+ -+u8 rtw_get_tx_bw_mode(_adapter *adapter, struct sta_info *sta) -+{ -+ u8 bw; -+ -+ bw = sta->cmn.bw_mode; -+ if (MLME_STATE(adapter) & WIFI_ASOC_STATE) { -+ if (adapter->mlmeextpriv.cur_channel <= 14) -+ bw = rtw_min(bw, ADAPTER_TX_BW_2G(adapter)); -+ else -+ bw = rtw_min(bw, ADAPTER_TX_BW_5G(adapter)); -+ } -+ -+ return bw; -+} -+ -+void rtw_get_adapter_tx_rate_bmp_by_bw(_adapter *adapter, u8 bw, u16 *r_bmp_cck_ofdm, u32 *r_bmp_ht, u64 *r_bmp_vht) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ u8 fix_bw = 0xFF; -+ u16 bmp_cck_ofdm = 0; -+ u32 bmp_ht = 0; -+ u64 bmp_vht = 0; -+ int i; -+ -+ if (adapter->fix_rate != 0xFF && adapter->fix_bw != 0xFF) -+ fix_bw = adapter->fix_bw; -+ -+ /* TODO: adapter->fix_rate */ -+ -+ for (i = 0; i < macid_ctl->num; i++) { -+ if (!rtw_macid_is_used(macid_ctl, i)) -+ continue; -+ if (!rtw_macid_is_iface_specific(macid_ctl, i, adapter)) -+ continue; -+ -+ if (bw == CHANNEL_WIDTH_20) /* CCK, OFDM always 20MHz */ -+ bmp_cck_ofdm |= macid_ctl->rate_bmp0[i] & 0x00000FFF; -+ -+ /* bypass mismatch bandwidth for HT, VHT */ -+ if ((fix_bw != 0xFF && fix_bw != bw) || (fix_bw == 0xFF && macid_ctl->bw[i] != bw)) -+ continue; -+ -+ if (macid_ctl->vht_en[i]) -+ bmp_vht |= (macid_ctl->rate_bmp0[i] >> 12) | (macid_ctl->rate_bmp1[i] << 20); -+ else -+ bmp_ht |= (macid_ctl->rate_bmp0[i] >> 12) | (macid_ctl->rate_bmp1[i] << 20); -+ } -+ -+ /* TODO: mlmeext->tx_rate*/ -+ -+ if (r_bmp_cck_ofdm) -+ *r_bmp_cck_ofdm = bmp_cck_ofdm; -+ if (r_bmp_ht) -+ *r_bmp_ht = bmp_ht; -+ if (r_bmp_vht) -+ *r_bmp_vht = bmp_vht; -+} -+ -+void rtw_get_shared_macid_tx_rate_bmp_by_bw(struct dvobj_priv *dvobj, u8 bw, u16 *r_bmp_cck_ofdm, u32 *r_bmp_ht, u64 *r_bmp_vht) -+{ -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ u16 bmp_cck_ofdm = 0; -+ u32 bmp_ht = 0; -+ u64 bmp_vht = 0; -+ int i; -+ -+ for (i = 0; i < macid_ctl->num; i++) { -+ if (!rtw_macid_is_used(macid_ctl, i)) -+ continue; -+ if (!rtw_macid_is_iface_shared(macid_ctl, i)) -+ continue; -+ -+ if (bw == CHANNEL_WIDTH_20) /* CCK, OFDM always 20MHz */ -+ bmp_cck_ofdm |= macid_ctl->rate_bmp0[i] & 0x00000FFF; -+ -+ /* bypass mismatch bandwidth for HT, VHT */ -+ if (macid_ctl->bw[i] != bw) -+ continue; -+ -+ if (macid_ctl->vht_en[i]) -+ bmp_vht |= (macid_ctl->rate_bmp0[i] >> 12) | (macid_ctl->rate_bmp1[i] << 20); -+ else -+ bmp_ht |= (macid_ctl->rate_bmp0[i] >> 12) | (macid_ctl->rate_bmp1[i] << 20); -+ } -+ -+ if (r_bmp_cck_ofdm) -+ *r_bmp_cck_ofdm = bmp_cck_ofdm; -+ if (r_bmp_ht) -+ *r_bmp_ht = bmp_ht; -+ if (r_bmp_vht) -+ *r_bmp_vht = bmp_vht; -+} -+ -+void rtw_get_adapter_tx_rate_bmp(_adapter *adapter, u16 r_bmp_cck_ofdm[], u32 r_bmp_ht[], u64 r_bmp_vht[]) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 bw; -+ u16 bmp_cck_ofdm, tmp_cck_ofdm; -+ u32 bmp_ht, tmp_ht; -+ u64 bmp_vht, tmp_vht; -+ int i; -+ -+ for (bw = CHANNEL_WIDTH_20; bw <= CHANNEL_WIDTH_160; bw++) { -+ bmp_cck_ofdm = bmp_ht = bmp_vht = 0; -+ if (hal_is_bw_support(adapter, bw)) { -+ { -+ rtw_get_adapter_tx_rate_bmp_by_bw(adapter, bw, &tmp_cck_ofdm, &tmp_ht, &tmp_vht); -+ bmp_cck_ofdm |= tmp_cck_ofdm; -+ bmp_ht |= tmp_ht; -+ bmp_vht |= tmp_vht; -+ } -+ rtw_get_shared_macid_tx_rate_bmp_by_bw(dvobj, bw, &tmp_cck_ofdm, &tmp_ht, &tmp_vht); -+ bmp_cck_ofdm |= tmp_cck_ofdm; -+ bmp_ht |= tmp_ht; -+ bmp_vht |= tmp_vht; -+ } -+ if (bw == CHANNEL_WIDTH_20) -+ r_bmp_cck_ofdm[bw] = bmp_cck_ofdm; -+ if (bw <= CHANNEL_WIDTH_40) -+ r_bmp_ht[bw] = bmp_ht; -+ if (bw <= CHANNEL_WIDTH_160) -+ r_bmp_vht[bw] = bmp_vht; -+ } -+} -+ -+void rtw_update_tx_rate_bmp(struct dvobj_priv *dvobj) -+{ -+ struct rf_ctl_t *rf_ctl = dvobj_to_rfctl(dvobj); -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 bw; -+ u16 bmp_cck_ofdm, tmp_cck_ofdm; -+ u32 bmp_ht, tmp_ht, ori_bmp_ht[2]; -+ u64 bmp_vht, tmp_vht, ori_bmp_vht[4]; -+ int i; -+ -+ for (bw = CHANNEL_WIDTH_20; bw <= CHANNEL_WIDTH_160; bw++) { -+ /* backup the original ht & vht bmp */ -+ if (bw <= CHANNEL_WIDTH_40) -+ ori_bmp_ht[bw] = rf_ctl->rate_bmp_ht_by_bw[bw]; -+ if (bw <= CHANNEL_WIDTH_160) -+ ori_bmp_vht[bw] = rf_ctl->rate_bmp_vht_by_bw[bw]; -+ -+ bmp_cck_ofdm = bmp_ht = bmp_vht = 0; -+ if (hal_is_bw_support(dvobj_get_primary_adapter(dvobj), bw)) { -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!dvobj->padapters[i]) -+ continue; -+ rtw_get_adapter_tx_rate_bmp_by_bw(dvobj->padapters[i], bw, &tmp_cck_ofdm, &tmp_ht, &tmp_vht); -+ bmp_cck_ofdm |= tmp_cck_ofdm; -+ bmp_ht |= tmp_ht; -+ bmp_vht |= tmp_vht; -+ } -+ rtw_get_shared_macid_tx_rate_bmp_by_bw(dvobj, bw, &tmp_cck_ofdm, &tmp_ht, &tmp_vht); -+ bmp_cck_ofdm |= tmp_cck_ofdm; -+ bmp_ht |= tmp_ht; -+ bmp_vht |= tmp_vht; -+ } -+ if (bw == CHANNEL_WIDTH_20) -+ rf_ctl->rate_bmp_cck_ofdm = bmp_cck_ofdm; -+ if (bw <= CHANNEL_WIDTH_40) -+ rf_ctl->rate_bmp_ht_by_bw[bw] = bmp_ht; -+ if (bw <= CHANNEL_WIDTH_160) -+ rf_ctl->rate_bmp_vht_by_bw[bw] = bmp_vht; -+ } -+ -+#if CONFIG_TXPWR_LIMIT -+#ifndef DBG_HIGHEST_RATE_BMP_BW_CHANGE -+#define DBG_HIGHEST_RATE_BMP_BW_CHANGE 0 -+#endif -+ -+ if (hal_data->txpwr_limit_loaded) { -+ u8 ori_highest_ht_rate_bw_bmp; -+ u8 ori_highest_vht_rate_bw_bmp; -+ u8 highest_rate_bw; -+ u8 highest_rate_bw_bmp; -+ u8 update_ht_rs = _FALSE; -+ u8 update_vht_rs = _FALSE; -+ -+ /* backup the original ht & vht highest bw bmp */ -+ ori_highest_ht_rate_bw_bmp = rf_ctl->highest_ht_rate_bw_bmp; -+ ori_highest_vht_rate_bw_bmp = rf_ctl->highest_vht_rate_bw_bmp; -+ -+ highest_rate_bw_bmp = BW_CAP_20M; -+ highest_rate_bw = CHANNEL_WIDTH_20; -+ for (bw = CHANNEL_WIDTH_20; bw <= CHANNEL_WIDTH_40; bw++) { -+ if (rf_ctl->rate_bmp_ht_by_bw[highest_rate_bw] < rf_ctl->rate_bmp_ht_by_bw[bw]) { -+ highest_rate_bw_bmp = ch_width_to_bw_cap(bw); -+ highest_rate_bw = bw; -+ } else if (rf_ctl->rate_bmp_ht_by_bw[highest_rate_bw] == rf_ctl->rate_bmp_ht_by_bw[bw]) -+ highest_rate_bw_bmp |= ch_width_to_bw_cap(bw); -+ } -+ rf_ctl->highest_ht_rate_bw_bmp = highest_rate_bw_bmp; -+ -+ if (ori_highest_ht_rate_bw_bmp != rf_ctl->highest_ht_rate_bw_bmp -+ || largest_bit(ori_bmp_ht[highest_rate_bw]) != largest_bit(rf_ctl->rate_bmp_ht_by_bw[highest_rate_bw]) -+ ) { -+ if (DBG_HIGHEST_RATE_BMP_BW_CHANGE) { -+ RTW_INFO("highest_ht_rate_bw_bmp:0x%02x=>0x%02x\n", ori_highest_ht_rate_bw_bmp, rf_ctl->highest_ht_rate_bw_bmp); -+ RTW_INFO("rate_bmp_ht_by_bw[%u]:0x%08x=>0x%08x\n", highest_rate_bw, ori_bmp_ht[highest_rate_bw], rf_ctl->rate_bmp_ht_by_bw[highest_rate_bw]); -+ } -+ if (rf_ctl->rate_bmp_ht_by_bw[highest_rate_bw]) -+ update_ht_rs = _TRUE; -+ } -+ -+ highest_rate_bw_bmp = BW_CAP_20M; -+ highest_rate_bw = CHANNEL_WIDTH_20; -+ for (bw = CHANNEL_WIDTH_20; bw <= CHANNEL_WIDTH_160; bw++) { -+ if (rf_ctl->rate_bmp_vht_by_bw[highest_rate_bw] < rf_ctl->rate_bmp_vht_by_bw[bw]) { -+ highest_rate_bw_bmp = ch_width_to_bw_cap(bw); -+ highest_rate_bw = bw; -+ } else if (rf_ctl->rate_bmp_vht_by_bw[highest_rate_bw] == rf_ctl->rate_bmp_vht_by_bw[bw]) -+ highest_rate_bw_bmp |= ch_width_to_bw_cap(bw); -+ } -+ rf_ctl->highest_vht_rate_bw_bmp = highest_rate_bw_bmp; -+ -+ if (ori_highest_vht_rate_bw_bmp != rf_ctl->highest_vht_rate_bw_bmp -+ || largest_bit_64(ori_bmp_vht[highest_rate_bw]) != largest_bit_64(rf_ctl->rate_bmp_vht_by_bw[highest_rate_bw]) -+ ) { -+ if (DBG_HIGHEST_RATE_BMP_BW_CHANGE) { -+ RTW_INFO("highest_vht_rate_bw_bmp:0x%02x=>0x%02x\n", ori_highest_vht_rate_bw_bmp, rf_ctl->highest_vht_rate_bw_bmp); -+ RTW_INFO("rate_bmp_vht_by_bw[%u]:0x%016llx=>0x%016llx\n", highest_rate_bw, ori_bmp_vht[highest_rate_bw], rf_ctl->rate_bmp_vht_by_bw[highest_rate_bw]); -+ } -+ if (rf_ctl->rate_bmp_vht_by_bw[highest_rate_bw]) -+ update_vht_rs = _TRUE; -+ } -+ -+ /* TODO: per rfpath and rate section handling? */ -+ if (update_ht_rs == _TRUE || update_vht_rs == _TRUE) -+ rtw_hal_update_txpwr_level(adapter); -+ } -+#endif /* CONFIG_TXPWR_LIMIT */ -+} -+ -+u8 rtw_get_tx_bw_bmp_of_ht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw) -+{ -+ struct rf_ctl_t *rf_ctl = dvobj_to_rfctl(dvobj); -+ u8 bw; -+ u8 bw_bmp = 0; -+ u32 rate_bmp; -+ -+ if (!IS_HT_RATE(rate)) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ rate_bmp = 1 << (rate - MGN_MCS0); -+ -+ if (max_bw > CHANNEL_WIDTH_40) -+ max_bw = CHANNEL_WIDTH_40; -+ -+ for (bw = CHANNEL_WIDTH_20; bw <= max_bw; bw++) { -+ /* RA may use lower rate for retry */ -+ if (rf_ctl->rate_bmp_ht_by_bw[bw] >= rate_bmp) -+ bw_bmp |= ch_width_to_bw_cap(bw); -+ } -+ -+exit: -+ return bw_bmp; -+} -+ -+u8 rtw_get_tx_bw_bmp_of_vht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw) -+{ -+ struct rf_ctl_t *rf_ctl = dvobj_to_rfctl(dvobj); -+ u8 bw; -+ u8 bw_bmp = 0; -+ u64 rate_bmp; -+ -+ if (!IS_VHT_RATE(rate)) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ rate_bmp = BIT_ULL(rate - MGN_VHT1SS_MCS0); -+ -+ if (max_bw > CHANNEL_WIDTH_160) -+ max_bw = CHANNEL_WIDTH_160; -+ -+ for (bw = CHANNEL_WIDTH_20; bw <= max_bw; bw++) { -+ /* RA may use lower rate for retry */ -+ if (rf_ctl->rate_bmp_vht_by_bw[bw] >= rate_bmp) -+ bw_bmp |= ch_width_to_bw_cap(bw); -+ } -+ -+exit: -+ return bw_bmp; -+} -+ -+s16 rtw_adapter_get_oper_txpwr_max_mbm(_adapter *adapter, bool eirp) -+{ -+ s16 mbm = -100 * MBM_PDBM; -+ -+ if (MLME_IS_ASOC(adapter)) { -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ u8 ch = mlmeext->cur_channel; -+ u8 bw = mlmeext->cur_bwmode; -+ u8 offset = mlmeext->cur_ch_offset; -+ u8 cch = rtw_get_center_ch(ch, bw, offset); -+ u8 hw_rate = MRateToHwRate(mlmeext->tx_rate); -+ u16 bmp_cck_ofdm_by_bw[1] = {0}; -+ u32 bmp_ht_by_bw[2] = {0}; -+ u64 bmp_vht_by_bw[4] = {0}; -+ u16 bmp_cck_ofdm = 0; -+ u32 bmp_ht = 0; -+ u64 bmp_vht = 0; -+ int i; -+ -+ rtw_get_adapter_tx_rate_bmp(adapter, bmp_cck_ofdm_by_bw, bmp_ht_by_bw, bmp_vht_by_bw); -+ -+ bmp_cck_ofdm |= bmp_cck_ofdm_by_bw[0]; -+ for (i = 0; i < 2; i++) -+ bmp_ht |= bmp_ht_by_bw[i]; -+ for (i = 0; i < 4; i++) -+ bmp_vht |= bmp_vht_by_bw[i]; -+ -+ if (IS_LEGACY_HRATE(hw_rate)) -+ bmp_cck_ofdm |= BIT(hw_rate); -+ else if (IS_HT_HRATE(hw_rate)) -+ bmp_ht |= BIT(hw_rate - DESC_RATEMCS0); -+ else if (IS_VHT_HRATE(hw_rate)) -+ bmp_vht |= BIT(hw_rate - DESC_RATEVHTSS1MCS0); -+ -+ mbm = phy_get_txpwr_total_max_mbm(adapter -+ , bw, cch, ch, bmp_cck_ofdm, bmp_ht, bmp_vht, 0, eirp); -+ } -+ -+ return mbm; -+} -+ -+s16 rtw_rfctl_get_oper_txpwr_max_mbm(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u8 ifbmp_mod, u8 if_op, bool eirp) -+{ -+ struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ s16 mbm = -100 * MBM_PDBM; -+ -+ if (ch) { -+ u8 cch = rtw_get_center_ch(ch, bw, offset); -+ u16 bmp_cck_ofdm = 0; -+ u32 bmp_ht = 0; -+ u64 bmp_vht = 0; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ struct mlme_ext_priv *mlmeext; -+ u8 hw_rate; -+ -+ if (!dvobj->padapters[i]) -+ continue; -+ -+ if (ifbmp_mod & BIT(i)) { -+ if (!if_op) -+ continue; -+ } else if (!MLME_IS_ASOC(dvobj->padapters[i])) -+ continue; -+ -+ mlmeext = &(dvobj->padapters[i]->mlmeextpriv); -+ hw_rate = MRateToHwRate(mlmeext->tx_rate); -+ -+ if (IS_LEGACY_HRATE(hw_rate)) -+ bmp_cck_ofdm |= BIT(hw_rate); -+ else if (IS_HT_HRATE(hw_rate)) -+ bmp_ht |= BIT(hw_rate - DESC_RATEMCS0); -+ else if (IS_VHT_HRATE(hw_rate)) -+ bmp_vht |= BIT(hw_rate - DESC_RATEVHTSS1MCS0); -+ } -+ -+ bmp_cck_ofdm |= rfctl->rate_bmp_cck_ofdm; -+ for (i = 0; i < 2; i++) -+ bmp_ht |= rfctl->rate_bmp_ht_by_bw[i]; -+ for (i = 0; i < 4; i++) -+ bmp_vht |= rfctl->rate_bmp_vht_by_bw[i]; -+ -+ mbm = phy_get_txpwr_total_max_mbm(adapter -+ , bw, cch, ch, bmp_cck_ofdm, bmp_ht, bmp_vht, 0, eirp); -+ } -+ -+ return mbm; -+} -+ -+s16 rtw_get_oper_txpwr_max_mbm(struct dvobj_priv *dvobj, bool eirp) -+{ -+ struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ s16 mbm = -100 * MBM_PDBM; -+ u8 ch = rfctl->op_ch, bw, offset; -+ -+ if (rtw_get_bw_offset_by_op_class_ch(rfctl->op_class, ch, &bw, &offset)) -+ mbm = rtw_rfctl_get_oper_txpwr_max_mbm(rfctl, ch, bw, offset, 0, 0, eirp); -+ -+ return mbm; -+} -+ -+s16 rtw_rfctl_get_reg_max_txpwr_mbm(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, bool eirp) -+{ -+ struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); -+ struct registry_priv *regsty = dvobj_to_regsty(dvobj); -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ s16 mbm = -100 * MBM_PDBM; -+ u8 cch = rtw_get_center_ch(ch, bw, offset); -+ u16 bmp_cck_ofdm = 0; -+ u32 bmp_ht = 0; -+ u64 bmp_vht = 0; -+ -+ if (ch <= 14) -+ bmp_cck_ofdm |= RATE_BMP_CCK; -+ -+ /* TODO: NO OFDM? */ -+ bmp_cck_ofdm |= RATE_BMP_OFDM; -+ -+#ifdef CONFIG_80211N_HT -+ if (regsty->ht_enable && is_supported_ht(regsty->wireless_mode)) { -+ switch (GET_HAL_TX_NSS(adapter)) { -+ case 1: -+ bmp_ht |= RATE_BMP_HT_1SS; -+ break; -+ case 2: -+ bmp_ht |= RATE_BMP_HT_2SS | RATE_BMP_HT_1SS; -+ break; -+ case 3: -+ bmp_ht |= RATE_BMP_HT_3SS | RATE_BMP_HT_2SS | RATE_BMP_HT_1SS; -+ break; -+ case 4: -+ bmp_ht |= RATE_BMP_HT_4SS | RATE_BMP_HT_3SS | RATE_BMP_HT_2SS | RATE_BMP_HT_1SS; -+ break; -+ default: -+ rtw_warn_on(1); -+ } -+ } -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ if (ch > 14 && REGSTY_IS_11AC_ENABLE(regsty) && is_supported_vht(regsty->wireless_mode) -+ && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)) -+ ) { -+ switch (GET_HAL_TX_NSS(adapter)) { -+ case 1: -+ bmp_vht |= RATE_BMP_VHT_1SS; -+ break; -+ case 2: -+ bmp_vht |= RATE_BMP_VHT_2SS | RATE_BMP_VHT_1SS; -+ break; -+ case 3: -+ bmp_vht |= RATE_BMP_VHT_3SS | RATE_BMP_VHT_2SS | RATE_BMP_VHT_1SS; -+ break; -+ case 4: -+ bmp_vht |= RATE_BMP_VHT_4SS | RATE_BMP_VHT_3SS | RATE_BMP_VHT_2SS | RATE_BMP_VHT_1SS; -+ break; -+ default: -+ rtw_warn_on(1); -+ } -+ } -+#endif -+ -+ mbm = phy_get_txpwr_total_max_mbm(adapter -+ , bw, cch, ch, bmp_cck_ofdm, bmp_ht, bmp_vht, 1, eirp); -+ -+ return mbm; -+} -+ -+u8 query_ra_short_GI(struct sta_info *psta, u8 bw) -+{ -+ u8 sgi = _FALSE, sgi_20m = _FALSE, sgi_40m = _FALSE, sgi_80m = _FALSE; -+ -+#ifdef CONFIG_80211N_HT -+#ifdef CONFIG_80211AC_VHT -+ if (psta->vhtpriv.vht_option) -+ sgi_80m = psta->vhtpriv.sgi_80m; -+#endif -+ sgi_20m = psta->htpriv.sgi_20m; -+ sgi_40m = psta->htpriv.sgi_40m; -+#endif -+ -+ switch (bw) { -+ case CHANNEL_WIDTH_80: -+ sgi = sgi_80m; -+ break; -+ case CHANNEL_WIDTH_40: -+ sgi = sgi_40m; -+ break; -+ case CHANNEL_WIDTH_20: -+ default: -+ sgi = sgi_20m; -+ break; -+ } -+ -+ return sgi; -+} -+ -+/* This function references driver insmond parameters to decide vcs mode. */ -+/* Driver insmond parameters: rtw_vrtl_carrier_sense and rtw_vcs_type */ -+static u8 validate_vcs(_adapter *padapter, u8 mode) { -+ -+ u8 vcs_mode = NONE_VCS; -+ -+ switch(padapter->registrypriv.vrtl_carrier_sense) { -+ -+ case DISABLE_VCS: -+ vcs_mode = NONE_VCS; -+ break; -+ -+ case ENABLE_VCS: -+ vcs_mode = padapter->registrypriv.vcs_type; -+ break; -+ -+ case AUTO_VCS: -+ vcs_mode = mode; -+ break; -+ -+ default: -+ vcs_mode = NONE_VCS; -+ break; -+ } -+ -+ return vcs_mode; -+ -+} -+ -+static void update_attrib_vcs_info(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ u32 sz; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ #ifdef RTW_FORCE_CTS_TO_SELF_UNDER_LOW_RSSI -+ s8 rssi = 0; -+ struct sta_info *psta = pattrib->psta; -+ #endif -+ /* -+ if(pattrib->psta) -+ { -+ psta = pattrib->psta; -+ } -+ else -+ { -+ RTW_INFO("%s, call rtw_get_stainfo()\n", __func__); -+ psta=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); -+ } -+ -+ if(psta==NULL) -+ { -+ RTW_INFO("%s, psta==NUL\n", __func__); -+ return; -+ } -+ -+ if(!(psta->state &WIFI_ASOC_STATE)) -+ { -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); -+ return; -+ } -+ */ -+ -+ if (pattrib->nr_frags != 1) -+ sz = padapter->xmitpriv.frag_len; -+ else /* no frag */ -+ sz = pattrib->last_txcmdsz; -+ -+ /* (1) RTS_Threshold is compared to the MPDU, not MSDU. */ -+ /* (2) If there are more than one frag in this MSDU, only the first frag uses protection frame. */ -+ /* Other fragments are protected by previous fragment. */ -+ /* So we only need to check the length of first fragment. */ -+ if (pmlmeext->cur_wireless_mode < WIRELESS_11_24N || padapter->registrypriv.wifi_spec) { -+ if (sz > padapter->registrypriv.rts_thresh) -+ pattrib->vcs_mode = RTS_CTS; -+ else { -+ if (pattrib->rtsen) -+ pattrib->vcs_mode = RTS_CTS; -+ else if (pattrib->cts2self) -+ pattrib->vcs_mode = CTS_TO_SELF; -+ else -+ pattrib->vcs_mode = NONE_VCS; -+ } -+ } else { -+ while (_TRUE) { -+#if 0 /* Todo */ -+ /* check IOT action */ -+ if (pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF) { -+ pattrib->vcs_mode = CTS_TO_SELF; -+ pattrib->rts_rate = MGN_24M; -+ break; -+ } else if (pHTInfo->IOTAction & (HT_IOT_ACT_FORCED_RTS | HT_IOT_ACT_PURE_N_MODE)) { -+ pattrib->vcs_mode = RTS_CTS; -+ pattrib->rts_rate = MGN_24M; -+ break; -+ } -+#endif -+ -+ /* IOT action */ -+ if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS) && (pattrib->ampdu_en == _TRUE) && -+ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) { -+ pattrib->vcs_mode = CTS_TO_SELF; -+ break; -+ } -+ -+ /* check ERP protection */ -+ if (pattrib->rtsen || pattrib->cts2self) { -+ if (pattrib->rtsen) -+ pattrib->vcs_mode = RTS_CTS; -+ else if (pattrib->cts2self) -+ pattrib->vcs_mode = CTS_TO_SELF; -+ -+ break; -+ } -+ -+ /* check HT op mode */ -+ if (pattrib->ht_en) { -+ u8 HTOpMode = pmlmeinfo->HT_protection; -+ if ((pmlmeext->cur_bwmode && (HTOpMode == 2 || HTOpMode == 3)) || -+ (!pmlmeext->cur_bwmode && HTOpMode == 3)) { -+ pattrib->vcs_mode = RTS_CTS; -+ break; -+ } -+ } -+ -+ /* check rts */ -+ if (sz > padapter->registrypriv.rts_thresh) { -+ pattrib->vcs_mode = RTS_CTS; -+ break; -+ } -+ -+ /* to do list: check MIMO power save condition. */ -+ -+ /* check AMPDU aggregation for TXOP */ -+ if ((pattrib->ampdu_en == _TRUE) && (!IS_HARDWARE_TYPE_8812(padapter))) { -+ pattrib->vcs_mode = RTS_CTS; -+ break; -+ } -+ -+ pattrib->vcs_mode = NONE_VCS; -+ break; -+ } -+ #ifdef RTW_FORCE_CTS_TO_SELF_UNDER_LOW_RSSI -+ /*RTStoCTS while let TP degree ,while enable full BW*/ -+ if (psta != NULL) { -+ rssi = psta->cmn.rssi_stat.rssi; -+ if ((rssi < 18) && (pattrib->vcs_mode == RTS_CTS)) -+ pattrib->vcs_mode = CTS_TO_SELF; -+ } -+ #endif -+ } -+ -+ pattrib->vcs_mode = validate_vcs(padapter, pattrib->vcs_mode); -+ -+ /* for debug : force driver control vrtl_carrier_sense. */ -+ if (padapter->driver_vcs_en == 1) { -+ /* u8 driver_vcs_en; */ /* Enable=1, Disable=0 driver control vrtl_carrier_sense. */ -+ /* u8 driver_vcs_type; */ /* force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. */ -+ pattrib->vcs_mode = padapter->driver_vcs_type; -+ } -+ -+} -+ -+#ifdef CONFIG_WMMPS_STA -+/* -+ * update_attrib_trigger_frame_info -+ * For Station mode, if a specific TID of driver setting and an AP support uapsd function, the data -+ * frame with corresponding TID will be a trigger frame when driver is in wmm power saving mode. -+ * -+ * Arguments: -+ * @padapter: _adapter pointer. -+ * @pattrib: pkt_attrib pointer. -+ * -+ * Auther: Arvin Liu -+ * Date: 2017/06/05 -+ */ -+static void update_attrib_trigger_frame_info(_adapter *padapter, struct pkt_attrib *pattrib) { -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+ u8 trigger_frame_en = 0; -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { -+ if ((pwrpriv->pwr_mode == PS_MODE_MIN) || (pwrpriv->pwr_mode == PS_MODE_MAX)) { -+ if((pqospriv->uapsd_ap_supported) && ((pqospriv->uapsd_tid & BIT(pattrib->priority)) == _TRUE)) { -+ trigger_frame_en = 1; -+ RTW_INFO("[WMMPS]"FUNC_ADPT_FMT": This is a Trigger Frame\n", FUNC_ADPT_ARG(padapter)); -+ } -+ } -+ } -+ -+ pattrib->trigger_frame = trigger_frame_en; -+} -+#endif /* CONFIG_WMMPS_STA */ -+ -+static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta) -+{ -+ struct mlme_ext_priv *mlmeext = &padapter->mlmeextpriv; -+ u8 bw; -+ -+ pattrib->rtsen = psta->rtsen; -+ pattrib->cts2self = psta->cts2self; -+ -+ pattrib->mdata = 0; -+ pattrib->eosp = 0; -+ pattrib->triggered = 0; -+ pattrib->ampdu_spacing = 0; -+ -+ /* ht_en, init rate, ,bw, ch_offset, sgi */ -+ -+ pattrib->raid = psta->cmn.ra_info.rate_id; -+ -+ bw = rtw_get_tx_bw_mode(padapter, psta); -+ pattrib->bwmode = rtw_min(bw, mlmeext->cur_bwmode); -+ pattrib->sgi = query_ra_short_GI(psta, pattrib->bwmode); -+ -+ pattrib->ldpc = psta->cmn.ldpc_en; -+ pattrib->stbc = psta->cmn.stbc_en; -+ -+#ifdef CONFIG_80211N_HT -+ if(padapter->registrypriv.ht_enable && -+ is_supported_ht(padapter->registrypriv.wireless_mode)) { -+ pattrib->ht_en = psta->htpriv.ht_option; -+ pattrib->ch_offset = psta->htpriv.ch_offset; -+ pattrib->ampdu_en = _FALSE; -+ -+ if (padapter->driver_ampdu_spacing != 0xFF) /* driver control AMPDU Density for peer sta's rx */ -+ pattrib->ampdu_spacing = padapter->driver_ampdu_spacing; -+ else -+ pattrib->ampdu_spacing = psta->htpriv.rx_ampdu_min_spacing; -+ -+ /* check if enable ampdu */ -+ if (pattrib->ht_en && psta->htpriv.ampdu_enable) { -+ if (psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) { -+ pattrib->ampdu_en = _TRUE; -+ if (psta->htpriv.tx_amsdu_enable == _TRUE) -+ pattrib->amsdu_ampdu_en = _TRUE; -+ else -+ pattrib->amsdu_ampdu_en = _FALSE; -+ } -+ } -+ } -+#endif /* CONFIG_80211N_HT */ -+ /* if(pattrib->ht_en && psta->htpriv.ampdu_enable) */ -+ /* { */ -+ /* if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) */ -+ /* pattrib->ampdu_en = _TRUE; */ -+ /* } */ -+ -+#ifdef CONFIG_TDLS -+ if (pattrib->direct_link == _TRUE) { -+ psta = pattrib->ptdls_sta; -+ -+ pattrib->raid = psta->cmn.ra_info.rate_id; -+#ifdef CONFIG_80211N_HT -+ if(padapter->registrypriv.ht_enable && -+ is_supported_ht(padapter->registrypriv.wireless_mode)) { -+ pattrib->bwmode = rtw_get_tx_bw_mode(padapter, psta); -+ pattrib->ht_en = psta->htpriv.ht_option; -+ pattrib->ch_offset = psta->htpriv.ch_offset; -+ pattrib->sgi = query_ra_short_GI(psta, pattrib->bwmode); -+ } -+#endif /* CONFIG_80211N_HT */ -+ } -+#endif /* CONFIG_TDLS */ -+ -+ pattrib->retry_ctrl = _FALSE; -+} -+ -+static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta, enum eap_type eapol_type) -+{ -+ sint res = _SUCCESS; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ sint bmcast = IS_MCAST(pattrib->ra); -+ -+ _rtw_memset(pattrib->dot118021x_UncstKey.skey, 0, 16); -+ _rtw_memset(pattrib->dot11tkiptxmickey.skey, 0, 16); -+ pattrib->mac_id = psta->cmn.mac_id; -+ -+ /* Comment by Owen at 2020/05/19 -+ * Issue: RTK STA sends encrypted 4-way 4/4 when AP thinks the 4-way incomplete -+ * In TCL pressure test, AP may resend 4-way 3/4 with new replay counter in 2 ms. -+ * In this situation, STA sends unencrypted 4-way 4/4 with old replay counter after more -+ * than 2 ms, followed by the encrypted 4-way 4/4 with new replay counter. Because the -+ * AP only accepts unencrypted 4-way 4/4 with a new play counter, and the STA encrypts -+ * each 4-way 4/4 at this time, the 4-way handshake cannot be completed. -+ * So we modified that after STA receives unencrypted 4-way 1/4 and 4-way 3/4, -+ * 4-way 2/4 and 4-way 4/4 sent by STA in the next 100 ms are not encrypted. -+ */ -+ if (psta->ieee8021x_blocked == _TRUE || -+ ((eapol_type == EAPOL_2_4 || eapol_type == EAPOL_4_4) && -+ rtw_get_passing_time_ms(psta->resp_nonenc_eapol_key_starttime) <= 100)) { -+ -+ if (eapol_type == EAPOL_2_4 || eapol_type == EAPOL_4_4) -+ RTW_INFO("Respond unencrypted eapol key\n"); -+ -+ pattrib->encrypt = 0; -+ -+ if ((pattrib->ether_type != 0x888e) && (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE)) { -+#ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s psta->ieee8021x_blocked == _TRUE, pattrib->ether_type(%04x) != 0x888e\n", __FUNCTION__, pattrib->ether_type); -+#endif -+ res = _FAIL; -+ goto exit; -+ } -+ } else { -+ GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, bmcast); -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (pattrib->ether_type == 0x88B4) -+ pattrib->encrypt = _NO_PRIVACY_; -+#endif -+ -+ switch (psecuritypriv->dot11AuthAlgrthm) { -+ case dot11AuthAlgrthm_Open: -+ case dot11AuthAlgrthm_Shared: -+ case dot11AuthAlgrthm_Auto: -+ pattrib->key_idx = (u8)psecuritypriv->dot11PrivacyKeyIndex; -+ break; -+ case dot11AuthAlgrthm_8021X: -+ if (bmcast) -+ pattrib->key_idx = (u8)psecuritypriv->dot118021XGrpKeyid; -+ else -+ pattrib->key_idx = 0; -+ break; -+ default: -+ pattrib->key_idx = 0; -+ break; -+ } -+ -+ /* For WPS 1.0 WEP, driver should not encrypt EAPOL Packet for WPS handshake. */ -+ if (((pattrib->encrypt == _WEP40_) || (pattrib->encrypt == _WEP104_)) && (pattrib->ether_type == 0x888e)) -+ pattrib->encrypt = _NO_PRIVACY_; -+ -+ } -+ -+#ifdef CONFIG_TDLS -+ if (pattrib->direct_link == _TRUE) { -+ if (pattrib->encrypt > 0) -+ pattrib->encrypt = _AES_; -+ } -+#endif -+ -+ switch (pattrib->encrypt) { -+ case _WEP40_: -+ case _WEP104_: -+ pattrib->iv_len = 4; -+ pattrib->icv_len = 4; -+ WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ break; -+ -+ case _TKIP_: -+ pattrib->iv_len = 8; -+ pattrib->icv_len = 4; -+ -+ if (psecuritypriv->busetkipkey == _FAIL) { -+#ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s psecuritypriv->busetkipkey(%d)==_FAIL drop packet\n", __FUNCTION__, psecuritypriv->busetkipkey); -+#endif -+ res = _FAIL; -+ goto exit; -+ } -+ -+ if (bmcast) -+ TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ else -+ TKIP_IV(pattrib->iv, psta->dot11txpn, 0); -+ -+ -+ _rtw_memcpy(pattrib->dot11tkiptxmickey.skey, psta->dot11tkiptxmickey.skey, 16); -+ -+ break; -+ -+ case _AES_: -+ -+ pattrib->iv_len = 8; -+ pattrib->icv_len = 8; -+ -+ if (bmcast) -+ AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ else -+ AES_IV(pattrib->iv, psta->dot11txpn, 0); -+ -+ break; -+ -+ case _GCMP_: -+ case _GCMP_256_: -+ -+ pattrib->iv_len = 8; -+ pattrib->icv_len = 16; -+ -+ if (bmcast) -+ GCMP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ else -+ GCMP_IV(pattrib->iv, psta->dot11txpn, 0); -+ -+ break; -+ -+ case _CCMP_256_: -+ -+ pattrib->iv_len = 8; -+ pattrib->icv_len = 16; -+ -+ if (bmcast) -+ GCMP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ else -+ GCMP_IV(pattrib->iv, psta->dot11txpn, 0); -+ -+ break; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ pattrib->iv_len = 18; -+ pattrib->icv_len = 16; -+ rtw_wapi_get_iv(padapter, pattrib->ra, pattrib->iv); -+ break; -+#endif -+ default: -+ pattrib->iv_len = 0; -+ pattrib->icv_len = 0; -+ break; -+ } -+ -+ if (pattrib->encrypt > 0) { -+ _rtw_memcpy(pattrib->dot118021x_UncstKey.skey -+ , psta->dot118021x_UncstKey.skey -+ , (pattrib->encrypt & _SEC_TYPE_256_) ? 32 : 16); -+ } -+ -+ -+ if (pattrib->encrypt && -+ ((padapter->securitypriv.sw_encrypt == _TRUE) || (psecuritypriv->hw_decrypted == _FALSE))) { -+ pattrib->bswenc = _TRUE; -+ } else { -+ pattrib->bswenc = _FALSE; -+ } -+ -+ pattrib->bmc_camid = padapter->securitypriv.dot118021x_bmc_cam_id; -+ -+ if (pattrib->encrypt && bmcast && _rtw_camctl_chk_flags(padapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH)) -+ pattrib->bswenc = _TRUE; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (pattrib->encrypt == _SMS4_) -+ pattrib->bswenc = _FALSE; -+#endif -+ -+exit: -+ -+ return res; -+ -+} -+ -+u8 qos_acm(u8 acm_mask, u8 priority) -+{ -+ u8 change_priority = priority; -+ -+ switch (priority) { -+ case 0: -+ case 3: -+ if (acm_mask & BIT(1)) -+ change_priority = 1; -+ break; -+ case 1: -+ case 2: -+ break; -+ case 4: -+ case 5: -+ if (acm_mask & BIT(2)) -+ change_priority = 0; -+ break; -+ case 6: -+ case 7: -+ if (acm_mask & BIT(3)) -+ change_priority = 5; -+ break; -+ default: -+ RTW_INFO("qos_acm(): invalid pattrib->priority: %d!!!\n", priority); -+ break; -+ } -+ -+ return change_priority; -+} -+ -+/* refer to IEEE802.11-2016 Table R-3; Comply with IETF RFC4594 */ -+static u8 tos_to_up(u8 tos) -+{ -+ u8 up = 0; -+ u8 dscp; -+ u8 mode = CONFIG_RTW_UP_MAPPING_RULE; -+ -+ -+ /* tos precedence mapping */ -+ if (mode == 0) { -+ up = tos >> 5; -+ return up; -+ } -+ -+ /* refer to IEEE802.11-2016 Table R-3; -+ * DCSP 32(CS4) comply with IETF RFC4594 -+ */ -+ dscp = (tos >> 2); -+ -+ if ( dscp == 0 ) -+ up = 0; -+ else if ( dscp >= 1 && dscp <= 9) -+ up = 1; -+ else if ( dscp >= 10 && dscp <= 16) -+ up = 2; -+ else if ( dscp >= 17 && dscp <= 23) -+ up = 3; -+ else if ( dscp >= 24 && dscp <= 31) -+ up = 4; -+ else if ( dscp >= 33 && dscp <= 40) -+ up = 5; -+ else if ((dscp >= 41 && dscp <= 47) || (dscp == 32)) -+ up = 6; -+ else if ( dscp >= 48 && dscp <= 63) -+ up = 7; -+ -+ return up; -+} -+ -+static void set_qos(_pkt *pkt, struct pkt_attrib *pattrib) -+{ -+ s32 UserPriority = 0; -+ -+ if (!pkt) -+ goto null_pkt; -+ -+ /* get UserPriority from IP hdr */ -+ if (pattrib->ether_type == 0x0800) { -+ struct pkt_file ppktfile; -+ struct ethhdr etherhdr; -+ struct iphdr ip_hdr; -+ -+ _rtw_open_pktfile(pkt, &ppktfile); -+ _rtw_pktfile_read(&ppktfile, (unsigned char *)ðerhdr, ETH_HLEN); -+ _rtw_pktfile_read(&ppktfile, (u8 *)&ip_hdr, sizeof(ip_hdr)); -+ /* UserPriority = (ntohs(ip_hdr.tos) >> 5) & 0x3; */ -+ UserPriority = tos_to_up(ip_hdr.tos); -+ } -+ /* -+ else if (pattrib->ether_type == 0x888e) { -+ -+ -+ UserPriority = 7; -+ } -+ */ -+ -+ #ifdef CONFIG_ICMP_VOQ -+ if(pattrib->icmp_pkt==1)/*use VO queue to send icmp packet*/ -+ UserPriority = 7; -+ #endif -+ #ifdef CONFIG_IP_R_MONITOR -+ if (pattrib->ether_type == ETH_P_ARP) -+ UserPriority = 7; -+ #endif/*CONFIG_IP_R_MONITOR*/ -+ -+null_pkt: -+ pattrib->priority = UserPriority; -+ pattrib->hdrlen = XATTRIB_GET_WDS(pattrib) ? WLAN_HDR_A4_QOS_LEN : WLAN_HDR_A3_QOS_LEN; -+ pattrib->subtype = WIFI_QOS_DATA_TYPE; -+} -+ -+#ifdef CONFIG_TDLS -+u8 rtw_check_tdls_established(_adapter *padapter, struct pkt_attrib *pattrib) -+{ -+ pattrib->ptdls_sta = NULL; -+ -+ pattrib->direct_link = _FALSE; -+ if (padapter->tdlsinfo.link_established == _TRUE) { -+ pattrib->ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->dst); -+#if 1 -+ if ((pattrib->ptdls_sta != NULL) && -+ (pattrib->ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) && -+ (pattrib->ether_type != 0x0806)) { -+ pattrib->direct_link = _TRUE; -+ /* RTW_INFO("send ptk to "MAC_FMT" using direct link\n", MAC_ARG(pattrib->dst)); */ -+ } -+#else -+ if (pattrib->ptdls_sta != NULL && -+ pattrib->ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { -+ pattrib->direct_link = _TRUE; -+#if 0 -+ RTW_INFO("send ptk to "MAC_FMT" using direct link\n", MAC_ARG(pattrib->dst)); -+#endif -+ } -+ -+ /* ARP frame may be helped by AP*/ -+ if (pattrib->ether_type != 0x0806) -+ pattrib->direct_link = _FALSE; -+#endif -+ } -+ -+ return pattrib->direct_link; -+} -+ -+s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib) -+{ -+ -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+ -+ s32 res = _SUCCESS; -+ -+ psta = rtw_get_stainfo(pstapriv, pattrib->ra); -+ if (psta == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pattrib->mac_id = psta->cmn.mac_id; -+ pattrib->psta = psta; -+ pattrib->ack_policy = 0; -+ /* get ether_hdr_len */ -+ pattrib->pkt_hdrlen = ETH_HLEN; -+ -+ pattrib->qos_en = psta->qos_option; -+ -+ /* [TDLS] TODO: setup req/rsp should be AC_BK */ -+ if (pqospriv->qos_option && psta->qos_option) { -+ pattrib->priority = 4; /* tdls management frame should be AC_VI */ -+ pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN; -+ pattrib->subtype = WIFI_QOS_DATA_TYPE; -+ } else { -+ pattrib->priority = 0; -+ pattrib->hdrlen = WLAN_HDR_A3_LEN; -+ pattrib->subtype = WIFI_DATA_TYPE; -+ } -+ -+ /* TODO:_lock */ -+ if (update_attrib_sec_info(padapter, pattrib, psta, NON_EAPOL) == _FAIL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ update_attrib_phy_info(padapter, pattrib, psta); -+ -+ -+exit: -+ -+ return res; -+} -+ -+#endif /* CONFIG_TDLS */ -+ -+/*get non-qos hw_ssn control register,mapping to REG_HW_SEQ 0,1,2,3*/ -+inline u8 rtw_get_hwseq_no(_adapter *padapter) -+{ -+ u8 hwseq_num = 0; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) \ -+ || defined(CONFIG_RTL8723F) -+ hwseq_num = padapter->iface_id; -+ if (hwseq_num > 3) -+ hwseq_num = 3; -+ #else -+ if (!is_primary_adapter(padapter)) -+ hwseq_num = 1; -+ #endif -+#endif /* CONFIG_CONCURRENT_MODE */ -+ return hwseq_num; -+} -+#ifdef CONFIG_LPS -+#define LPS_PT_NORMAL 0 -+#define LPS_PT_SP 1/* only DHCP packets is as SPECIAL_PACKET*/ -+#define LPS_PT_ICMP 2 -+ -+/*If EAPOL , ARP , OR DHCP packet, driver must be in active mode.*/ -+static u8 _rtw_lps_chk_packet_type(struct pkt_attrib *pattrib) -+{ -+ u8 pkt_type = LPS_PT_NORMAL; /*normal data frame*/ -+ -+ #ifdef CONFIG_WAPI_SUPPORT -+ if ((pattrib->ether_type == 0x88B4) || (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1)) -+ pkt_type = LPS_PT_SP; -+ #else /* !CONFIG_WAPI_SUPPORT */ -+ -+ #ifndef CONFIG_LPS_NOT_LEAVE_FOR_ICMP -+ if (pattrib->icmp_pkt == 1) -+ pkt_type = LPS_PT_ICMP; -+ else -+ #endif -+ if (pattrib->dhcp_pkt == 1) -+ pkt_type = LPS_PT_SP; -+ #endif -+ return pkt_type; -+} -+#endif -+static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattrib) -+{ -+ uint i; -+ struct pkt_file pktfile; -+ struct sta_info *psta = NULL; -+ struct ethhdr etherhdr; -+ -+ sint bmcast; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ sint res = _SUCCESS; -+ enum eap_type eapol_type = NON_EAPOL; -+#ifdef CONFIG_LPS -+ u8 pkt_type = 0; -+#endif -+ -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib); -+ -+ _rtw_open_pktfile(pkt, &pktfile); -+ i = _rtw_pktfile_read(&pktfile, (u8 *)ðerhdr, ETH_HLEN); -+ -+ pattrib->ether_type = ntohs(etherhdr.h_proto); -+ -+ if (MLME_STATE(padapter) & (WIFI_AP_STATE | WIFI_MESH_STATE)) /* address resolve is done for ap/mesh */ -+ goto get_sta_info; -+ -+ _rtw_memcpy(pattrib->dst, ðerhdr.h_dest, ETH_ALEN); -+ _rtw_memcpy(pattrib->src, ðerhdr.h_source, ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || -+ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { -+ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_adhoc); -+ } else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { -+ #ifdef CONFIG_TDLS -+ if (rtw_check_tdls_established(padapter, pattrib) == _TRUE) -+ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); /* For TDLS direct link Tx, set ra to be same to dst */ -+ else -+ #endif -+ { -+ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); -+ #ifdef CONFIG_RTW_WDS -+ if (adapter_use_wds(padapter) -+ && _rtw_memcmp(pattrib->src, pattrib->ta, ETH_ALEN) == _FALSE -+ ) { -+ pattrib->wds = 1; -+ if (IS_MCAST(pattrib->dst)) -+ rtw_tx_wds_gptr_update(padapter, pattrib->src); -+ } -+ #endif -+ } -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_sta); -+ } else -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_unknown); -+ -+get_sta_info: -+ bmcast = IS_MCAST(pattrib->ra); -+ if (bmcast) { -+ psta = rtw_get_bcmc_stainfo(padapter); -+ if (psta == NULL) { /* if we cannot get psta => drop the pkt */ -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_sta); -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __func__, MAC_ARG(pattrib->ra)); -+ #endif -+ res = _FAIL; -+ goto exit; -+ } -+ } else { -+ psta = rtw_get_stainfo(pstapriv, pattrib->ra); -+ if (psta == NULL) { /* if we cannot get psta => drop the pkt */ -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_sta); -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __func__, MAC_ARG(pattrib->ra)); -+ #endif -+ res = _FAIL; -+ goto exit; -+ } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE && !(psta->state & WIFI_ASOC_STATE)) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_ap_link); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ #ifdef CONFIG_RTW_WDS -+ if (XATTRIB_GET_WDS(pattrib) && !(psta->flags & WLAN_STA_WDS)) -+ pattrib->wds = 0; -+ #endif -+ } -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_link); -+ RTW_INFO("%s-"ADPT_FMT" psta("MAC_FMT")->state(0x%x) != WIFI_ASOC_STATE\n", -+ __func__, ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr), psta->state); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pattrib->pktlen = pktfile.pkt_len; -+ -+ /* TODO: 802.1Q VLAN header */ -+ /* TODO: IPV6 */ -+ -+ if (ETH_P_IP == pattrib->ether_type) { -+ u8 ip[20]; -+ -+ _rtw_pktfile_read(&pktfile, ip, 20); -+ -+ if (GET_IPV4_IHL(ip) * 4 > 20) -+ _rtw_pktfile_read(&pktfile, NULL, GET_IPV4_IHL(ip) - 20); -+ -+ pattrib->icmp_pkt = 0; -+ pattrib->dhcp_pkt = 0; -+ pattrib->hipriority_pkt = 0; -+ -+ if (GET_IPV4_PROTOCOL(ip) == 0x01) { /* ICMP */ -+ pattrib->icmp_pkt = 1; -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_icmp); -+ -+ } else if (GET_IPV4_PROTOCOL(ip) == 0x11) { /* UDP */ -+ u8 udp[24]; -+ -+ _rtw_pktfile_read(&pktfile, udp, 24); -+ -+ if ((GET_UDP_SRC(udp) == 68 && GET_UDP_DST(udp) == 67) -+ || (GET_UDP_SRC(udp) == 67 && GET_UDP_DST(udp) == 68) -+ ) { -+ /* 67 : UDP BOOTP server, 68 : UDP BOOTP client */ -+ if (pattrib->pktlen > 282) { /* MINIMUM_DHCP_PACKET_SIZE */ -+ pattrib->dhcp_pkt = 1; -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_dhcp); -+ if (0) -+ RTW_INFO("send DHCP packet\n"); -+ } -+ } -+ -+ /* WaveAgent packet, increase priority so that the system can read data in time */ -+ if (((GET_UDP_SIG1(udp) == 0xcc) || (GET_UDP_SIG1(udp) == 0xdd)) && -+ (GET_UDP_SIG2(udp) == 0xe2)) { -+ pattrib->hipriority_pkt = 1; -+ } -+ -+ } else if (GET_IPV4_PROTOCOL(ip) == 0x06 /* TCP */ -+ && rtw_st_ctl_chk_reg_s_proto(&psta->st_ctl, 0x06) == _TRUE -+ ) { -+ u8 tcp[20]; -+ -+ _rtw_pktfile_read(&pktfile, tcp, 20); -+ -+ if (rtw_st_ctl_chk_reg_rule(&psta->st_ctl, padapter, IPV4_SRC(ip), TCP_SRC(tcp), IPV4_DST(ip), TCP_DST(tcp)) == _TRUE) { -+ if (GET_TCP_SYN(tcp) && GET_TCP_ACK(tcp)) { -+ session_tracker_add_cmd(padapter, psta -+ , IPV4_SRC(ip), TCP_SRC(tcp) -+ , IPV4_SRC(ip), TCP_DST(tcp)); -+ if (DBG_SESSION_TRACKER) -+ RTW_INFO(FUNC_ADPT_FMT" local:"IP_FMT":"PORT_FMT", remote:"IP_FMT":"PORT_FMT" SYN-ACK\n" -+ , FUNC_ADPT_ARG(padapter) -+ , IP_ARG(IPV4_SRC(ip)), PORT_ARG(TCP_SRC(tcp)) -+ , IP_ARG(IPV4_DST(ip)), PORT_ARG(TCP_DST(tcp))); -+ } -+ if (GET_TCP_FIN(tcp)) { -+ session_tracker_del_cmd(padapter, psta -+ , IPV4_SRC(ip), TCP_SRC(tcp) -+ , IPV4_SRC(ip), TCP_DST(tcp)); -+ if (DBG_SESSION_TRACKER) -+ RTW_INFO(FUNC_ADPT_FMT" local:"IP_FMT":"PORT_FMT", remote:"IP_FMT":"PORT_FMT" FIN\n" -+ , FUNC_ADPT_ARG(padapter) -+ , IP_ARG(IPV4_SRC(ip)), PORT_ARG(TCP_SRC(tcp)) -+ , IP_ARG(IPV4_DST(ip)), PORT_ARG(TCP_DST(tcp))); -+ } -+ } -+ } -+ -+ } else if (0x888e == pattrib->ether_type) -+ eapol_type = parsing_eapol_packet(padapter, pktfile.cur_addr, psta, 1); -+#if defined (DBG_ARP_DUMP) || defined (DBG_IP_R_MONITOR) -+ else if (pattrib->ether_type == ETH_P_ARP) { -+ u8 arp[28] = {0}; -+ -+ _rtw_pktfile_read(&pktfile, arp, 28); -+ dump_arp_pkt(RTW_DBGDUMP, etherhdr.h_dest, etherhdr.h_source, arp, 1); -+ } -+#endif -+ -+ if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1)) -+ rtw_mi_set_scan_deny(padapter, 3000); -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && -+ pattrib->ether_type == ETH_P_ARP && -+ !IS_MCAST(pattrib->dst)) { -+ rtw_mi_set_scan_deny(padapter, 1000); -+ rtw_mi_scan_abort(padapter, _FALSE); /*rtw_scan_abort_no_wait*/ -+ } -+ -+#ifdef CONFIG_LPS -+ pkt_type = _rtw_lps_chk_packet_type(pattrib); -+ -+ if (pkt_type == LPS_PT_SP) {/*packet is as SPECIAL_PACKET*/ -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_active); -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 0); -+ } else if (pkt_type == LPS_PT_ICMP) -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 0); -+#endif /* CONFIG_LPS */ -+ -+#ifdef CONFIG_BEAMFORMING -+ update_attrib_txbf_info(padapter, pattrib, psta); -+#endif -+ -+ /* TODO:_lock */ -+ if (update_attrib_sec_info(padapter, pattrib, psta, eapol_type) == _FAIL) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_sec); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ /* get ether_hdr_len */ -+ pattrib->pkt_hdrlen = ETH_HLEN;/* (pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; */ /* vlan tag */ -+ -+ pattrib->hdrlen = XATTRIB_GET_WDS(pattrib) ? WLAN_HDR_A4_LEN : WLAN_HDR_A3_LEN; -+ pattrib->subtype = WIFI_DATA_TYPE; -+ pattrib->qos_en = psta->qos_option; -+ pattrib->priority = 0; -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE | WIFI_MESH_STATE -+ | WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE) -+ ) { -+ if (pattrib->qos_en) { -+ set_qos(pkt, pattrib); -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) -+ rtw_mesh_tx_set_whdr_mctrl_len(pattrib->mesh_frame_mode, pattrib); -+ #endif -+ } -+ } else { -+#ifdef CONFIG_TDLS -+ if (pattrib->direct_link == _TRUE) { -+ if (pattrib->qos_en) -+ set_qos(pkt, pattrib); -+ } else -+#endif -+ { -+ if (pqospriv->qos_option) { -+ set_qos(pkt, pattrib); -+ -+ if (pmlmepriv->acm_mask != 0) -+ pattrib->priority = qos_acm(pmlmepriv->acm_mask, pattrib->priority); -+ } -+ } -+ } -+ -+ update_attrib_phy_info(padapter, pattrib, psta); -+ -+ /* RTW_INFO("%s ==> mac_id(%d)\n",__FUNCTION__,pattrib->mac_id ); */ -+ -+ pattrib->psta = psta; -+ /* TODO:_unlock */ -+ -+#ifdef CONFIG_AUTO_AP_MODE -+ if (psta->isrc && psta->pid > 0) -+ pattrib->pctrl = _TRUE; -+ else -+#endif -+ pattrib->pctrl = 0; -+ -+ pattrib->ack_policy = 0; -+ -+ if (bmcast) -+ pattrib->rate = psta->init_rate; -+ -+ -+#ifdef CONFIG_WMMPS_STA -+ update_attrib_trigger_frame_info(padapter, pattrib); -+#endif /* CONFIG_WMMPS_STA */ -+ -+ /* pattrib->priority = 5; */ /* force to used VI queue, for testing */ -+ pattrib->hw_ssn_sel = pxmitpriv->hw_ssn_seq_no; -+ rtw_set_tx_chksum_offload(pkt, pattrib); -+ -+exit: -+ -+ -+ return res; -+} -+ -+static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ sint curfragnum, length; -+ u8 *pframe, *payload, mic[8]; -+ struct mic_data micdata; -+ /* struct sta_info *stainfo; */ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ u8 priority[4] = {0x0, 0x0, 0x0, 0x0}; -+ u8 hw_hdr_offset = 0; -+ sint bmcst = IS_MCAST(pattrib->ra); -+ -+ /* -+ if(pattrib->psta) -+ { -+ stainfo = pattrib->psta; -+ } -+ else -+ { -+ RTW_INFO("%s, call rtw_get_stainfo()\n", __func__); -+ stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0]); -+ } -+ -+ if(stainfo==NULL) -+ { -+ RTW_INFO("%s, psta==NUL\n", __func__); -+ return _FAIL; -+ } -+ -+ if(!(stainfo->state &WIFI_ASOC_STATE)) -+ { -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, stainfo->state); -+ return _FAIL; -+ } -+ */ -+ -+ -+#ifdef CONFIG_USB_TX_AGGREGATION -+ hw_hdr_offset = TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ);; -+#else -+#ifdef CONFIG_TX_EARLY_MODE -+ hw_hdr_offset = TXDESC_OFFSET + EARLY_MODE_INFO_SIZE; -+#else -+ hw_hdr_offset = TXDESC_OFFSET; -+#endif -+#endif -+ -+ if (pattrib->encrypt == _TKIP_) { /* if(psecuritypriv->dot11PrivacyAlgrthm==_TKIP_PRIVACY_) */ -+ /* encode mic code */ -+ /* if(stainfo!= NULL) */ -+ { -+ u8 null_key[16] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; -+ -+ pframe = pxmitframe->buf_addr + hw_hdr_offset; -+ -+ if (bmcst) { -+ if (_rtw_memcmp(psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey, null_key, 16) == _TRUE) { -+ /* DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey==0\n"); */ -+ /* rtw_msleep_os(10); */ -+ return _FAIL; -+ } -+ /* start to calculate the mic code */ -+ rtw_secmicsetkey(&micdata, psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey); -+ } else { -+ if (_rtw_memcmp(&pattrib->dot11tkiptxmickey.skey[0], null_key, 16) == _TRUE) { -+ /* DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey==0\n"); */ -+ /* rtw_msleep_os(10); */ -+ return _FAIL; -+ } -+ /* start to calculate the mic code */ -+ rtw_secmicsetkey(&micdata, &pattrib->dot11tkiptxmickey.skey[0]); -+ } -+ -+ if (pframe[1] & 1) { /* ToDS==1 */ -+ rtw_secmicappend(&micdata, &pframe[16], 6); /* DA */ -+ if (pframe[1] & 2) /* From Ds==1 */ -+ rtw_secmicappend(&micdata, &pframe[24], 6); -+ else -+ rtw_secmicappend(&micdata, &pframe[10], 6); -+ } else { /* ToDS==0 */ -+ rtw_secmicappend(&micdata, &pframe[4], 6); /* DA */ -+ if (pframe[1] & 2) /* From Ds==1 */ -+ rtw_secmicappend(&micdata, &pframe[16], 6); -+ else -+ rtw_secmicappend(&micdata, &pframe[10], 6); -+ -+ } -+ -+ if (pattrib->qos_en) -+ priority[0] = (u8)pxmitframe->attrib.priority; -+ -+ -+ rtw_secmicappend(&micdata, &priority[0], 4); -+ -+ payload = pframe; -+ -+ for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) { -+ payload = (u8 *)RND4((SIZE_PTR)(payload)); -+ -+ payload = payload + pattrib->hdrlen + pattrib->iv_len; -+ if ((curfragnum + 1) == pattrib->nr_frags) { -+ length = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - ((pattrib->bswenc) ? pattrib->icv_len : 0); -+ rtw_secmicappend(&micdata, payload, length); -+ payload = payload + length; -+ } else { -+ length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - ((pattrib->bswenc) ? pattrib->icv_len : 0); -+ rtw_secmicappend(&micdata, payload, length); -+ payload = payload + length + pattrib->icv_len; -+ } -+ } -+ rtw_secgetmic(&micdata, &(mic[0])); -+ /* add mic code and add the mic code length in last_txcmdsz */ -+ -+ _rtw_memcpy(payload, &(mic[0]), 8); -+ pattrib->last_txcmdsz += 8; -+ -+ payload = payload - pattrib->last_txcmdsz + 8; -+ } -+ } -+ -+ -+ return _SUCCESS; -+} -+ -+/*#define DBG_TX_SW_ENCRYPTOR*/ -+ -+static s32 xmitframe_swencrypt(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ /* struct security_priv *psecuritypriv=&padapter->securitypriv; */ -+ -+ -+ /* if((psecuritypriv->sw_encrypt)||(pattrib->bswenc)) */ -+ if (pattrib->bswenc) { -+#ifdef DBG_TX_SW_ENCRYPTOR -+ RTW_INFO(ADPT_FMT" - sec_type:%s DO SW encryption\n", -+ ADPT_ARG(padapter), security_type_str(pattrib->encrypt)); -+#endif -+ -+ switch (pattrib->encrypt) { -+ case _WEP40_: -+ case _WEP104_: -+ rtw_wep_encrypt(padapter, (u8 *)pxmitframe); -+ break; -+ case _TKIP_: -+ rtw_tkip_encrypt(padapter, (u8 *)pxmitframe); -+ break; -+ case _AES_: -+ case _CCMP_256_: -+ rtw_aes_encrypt(padapter, (u8 *)pxmitframe); -+ break; -+ case _GCMP_: -+ case _GCMP_256_: -+ rtw_gcmp_encrypt(padapter, (u8 *)pxmitframe); -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ rtw_sms4_encrypt(padapter, (u8 *)pxmitframe); -+#endif -+ default: -+ break; -+ } -+ -+ } -+ -+ -+ return _SUCCESS; -+} -+ -+s32 rtw_make_wlanhdr(_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib) -+{ -+ u16 *qc; -+ -+ struct rtw_ieee80211_hdr *pwlanhdr = (struct rtw_ieee80211_hdr *)hdr; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+ u8 qos_option = _FALSE; -+ sint res = _SUCCESS; -+ u16 *fctrl = &pwlanhdr->frame_ctl; -+ -+ /* struct sta_info *psta; */ -+ -+ /* sint bmcst = IS_MCAST(pattrib->ra); */ -+ -+ -+ /* -+ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ if(pattrib->psta != psta) -+ { -+ RTW_INFO("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); -+ return; -+ } -+ -+ if(psta==NULL) -+ { -+ RTW_INFO("%s, psta==NUL\n", __func__); -+ return _FAIL; -+ } -+ -+ if(!(psta->state &WIFI_ASOC_STATE)) -+ { -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); -+ return _FAIL; -+ } -+ */ -+ -+ _rtw_memset(hdr, 0, WLANHDR_OFFSET); -+ -+ set_frame_sub_type(fctrl, pattrib->subtype); -+ -+ if (pattrib->subtype & WIFI_DATA_TYPE) { -+ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) { -+#ifdef CONFIG_TDLS -+ if (pattrib->direct_link == _TRUE) { -+ /* TDLS data transfer, ToDS=0, FrDs=0 */ -+ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); -+ -+ if (pattrib->qos_en) -+ qos_option = _TRUE; -+ } else -+#endif /* CONFIG_TDLS */ -+ { -+ #ifdef CONFIG_RTW_WDS -+ if (pattrib->wds) { -+ SetToDs(fctrl); -+ SetFrDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, pattrib->ra, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr4, pattrib->src, ETH_ALEN); -+ } else -+ #endif -+ { -+ /* to_ds = 1, fr_ds = 0; */ -+ /* 1.Data transfer to AP */ -+ /* 2.Arp pkt will relayed by AP */ -+ SetToDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); -+ } -+ -+ if (pqospriv->qos_option) -+ qos_option = _TRUE; -+ } -+ } else if ((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)) { -+ #ifdef CONFIG_RTW_WDS -+ if (pattrib->wds) { -+ SetToDs(fctrl); -+ SetFrDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, pattrib->ra, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr4, pattrib->src, ETH_ALEN); -+ } else -+ #endif -+ { -+ /* to_ds = 0, fr_ds = 1; */ -+ SetFrDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pattrib->src, ETH_ALEN); -+ } -+ -+ if (pattrib->qos_en) -+ qos_option = _TRUE; -+ } else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || -+ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { -+ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); -+ -+ if (pattrib->qos_en) -+ qos_option = _TRUE; -+#ifdef CONFIG_RTW_MESH -+ } else if (check_fwstate(pmlmepriv, WIFI_MESH_STATE) == _TRUE) { -+ rtw_mesh_tx_build_whdr(padapter, pattrib, fctrl, pwlanhdr); -+ if (pattrib->qos_en) -+ qos_option = _TRUE; -+ else { -+ RTW_WARN("[%s] !qos_en in Mesh\n", __FUNCTION__); -+ res = _FAIL; -+ goto exit; -+ } -+#endif -+ } else { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ if (pattrib->mdata) -+ SetMData(fctrl); -+ -+ if (pattrib->encrypt) -+ SetPrivacy(fctrl); -+ -+ if (qos_option) { -+ qc = (unsigned short *)(hdr + pattrib->hdrlen - 2); -+ -+ if (pattrib->priority) -+ SetPriority(qc, pattrib->priority); -+ -+ SetEOSP(qc, pattrib->eosp); -+ -+ SetAckpolicy(qc, pattrib->ack_policy); -+ -+ if(pattrib->amsdu) -+ SetAMsdu(qc, pattrib->amsdu); -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ /* active: don't care, light sleep: 0, deep sleep: 1*/ -+ set_mps_lv(qc, 0); //TBD -+ -+ /* TBD: temporary set (rspi, eosp) = (0, 1) which means End MPSP */ -+ set_rspi(qc, 0); -+ SetEOSP(qc, 1); -+ -+ set_mctrl_present(qc, 1); -+ } -+#endif -+ } -+ -+ /* TODO: fill HT Control Field */ -+ -+ /* Update Seq Num will be handled by f/w */ -+ { -+ struct sta_info *psta; -+ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ if (pattrib->psta != psta) { -+ RTW_INFO("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); -+ return _FAIL; -+ } -+ -+ if (psta == NULL) { -+ RTW_INFO("%s, psta==NUL\n", __func__); -+ return _FAIL; -+ } -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) { -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); -+ return _FAIL; -+ } -+ -+ -+ if (psta) { -+ psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; -+ psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; -+ pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; -+ -+ SetSeqNum(hdr, pattrib->seqnum); -+ -+#ifdef CONFIG_80211N_HT -+#if 0 /* move into update_attrib_phy_info(). */ -+ /* check if enable ampdu */ -+ if (pattrib->ht_en && psta->htpriv.ampdu_enable) { -+ if (psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) -+ pattrib->ampdu_en = _TRUE; -+ } -+#endif -+ /* re-check if enable ampdu by BA_starting_seqctrl */ -+ if (pattrib->ampdu_en == _TRUE) { -+ u16 tx_seq; -+ -+ tx_seq = psta->BA_starting_seqctrl[pattrib->priority & 0x0f]; -+ -+ /* check BA_starting_seqctrl */ -+ if (SN_LESS(pattrib->seqnum, tx_seq)) { -+ /* RTW_INFO("tx ampdu seqnum(%d) < tx_seq(%d)\n", pattrib->seqnum, tx_seq); */ -+ pattrib->ampdu_en = _FALSE;/* AGG BK */ -+ } else if (SN_EQUAL(pattrib->seqnum, tx_seq)) { -+ psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (tx_seq + 1) & 0xfff; -+ -+ pattrib->ampdu_en = _TRUE;/* AGG EN */ -+ } else { -+ /* RTW_INFO("tx ampdu over run\n"); */ -+ psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (pattrib->seqnum + 1) & 0xfff; -+ pattrib->ampdu_en = _TRUE;/* AGG EN */ -+ } -+ -+ } -+#endif /* CONFIG_80211N_HT */ -+ } -+ } -+ -+ } else { -+ -+ } -+ -+exit: -+ -+ -+ return res; -+} -+ -+s32 rtw_txframes_pending(_adapter *padapter) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ return ((_rtw_queue_empty(&pxmitpriv->be_pending) == _FALSE) || -+ (_rtw_queue_empty(&pxmitpriv->bk_pending) == _FALSE) || -+ (_rtw_queue_empty(&pxmitpriv->vi_pending) == _FALSE) || -+ (_rtw_queue_empty(&pxmitpriv->vo_pending) == _FALSE) -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ || (_rtw_queue_empty(&pxmitpriv->mgmt_pending) == _FALSE) -+#endif -+ ); -+} -+ -+s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib) -+{ -+ struct sta_info *psta; -+ struct tx_servq *ptxservq; -+ int priority = pattrib->priority; -+ /* -+ if(pattrib->psta) -+ { -+ psta = pattrib->psta; -+ } -+ else -+ { -+ RTW_INFO("%s, call rtw_get_stainfo()\n", __func__); -+ psta=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0]); -+ } -+ */ -+ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ if (pattrib->psta != psta) { -+ RTW_INFO("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); -+ return 0; -+ } -+ -+ if (psta == NULL) { -+ RTW_INFO("%s, psta==NUL\n", __func__); -+ return 0; -+ } -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) { -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); -+ return 0; -+ } -+ -+ switch (priority) { -+ case 1: -+ case 2: -+ ptxservq = &(psta->sta_xmitpriv.bk_q); -+ break; -+ case 4: -+ case 5: -+ ptxservq = &(psta->sta_xmitpriv.vi_q); -+ break; -+ case 6: -+ case 7: -+ ptxservq = &(psta->sta_xmitpriv.vo_q); -+ break; -+ case 0: -+ case 3: -+ default: -+ ptxservq = &(psta->sta_xmitpriv.be_q); -+ break; -+ -+ } -+ -+ return ptxservq->qcnt; -+} -+ -+#ifdef CONFIG_TDLS -+ -+int rtw_build_tdls_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_info *ptdls_sta = NULL; -+ int res = _SUCCESS; -+ -+ ptdls_sta = rtw_get_stainfo((&padapter->stapriv), pattrib->dst); -+ if (ptdls_sta == NULL) { -+ switch (ptxmgmt->action_code) { -+ case TDLS_DISCOVERY_REQUEST: -+ case TUNNELED_PROBE_REQ: -+ case TUNNELED_PROBE_RSP: -+ break; -+ default: -+ RTW_INFO("[TDLS] %s - Direct Link Peer = "MAC_FMT" not found for action = %d\n", __func__, MAC_ARG(pattrib->dst), ptxmgmt->action_code); -+ res = _FAIL; -+ goto exit; -+ } -+ } -+ -+ switch (ptxmgmt->action_code) { -+ case TDLS_SETUP_REQUEST: -+ rtw_build_tdls_setup_req_ies(padapter, pxmitframe, pframe, ptxmgmt, ptdls_sta); -+ break; -+ case TDLS_SETUP_RESPONSE: -+ rtw_build_tdls_setup_rsp_ies(padapter, pxmitframe, pframe, ptxmgmt, ptdls_sta); -+ break; -+ case TDLS_SETUP_CONFIRM: -+ rtw_build_tdls_setup_cfm_ies(padapter, pxmitframe, pframe, ptxmgmt, ptdls_sta); -+ break; -+ case TDLS_TEARDOWN: -+ rtw_build_tdls_teardown_ies(padapter, pxmitframe, pframe, ptxmgmt, ptdls_sta); -+ break; -+ case TDLS_DISCOVERY_REQUEST: -+ rtw_build_tdls_dis_req_ies(padapter, pxmitframe, pframe, ptxmgmt); -+ break; -+ case TDLS_PEER_TRAFFIC_INDICATION: -+ rtw_build_tdls_peer_traffic_indication_ies(padapter, pxmitframe, pframe, ptxmgmt, ptdls_sta); -+ break; -+#ifdef CONFIG_TDLS_CH_SW -+ case TDLS_CHANNEL_SWITCH_REQUEST: -+ rtw_build_tdls_ch_switch_req_ies(padapter, pxmitframe, pframe, ptxmgmt, ptdls_sta); -+ break; -+ case TDLS_CHANNEL_SWITCH_RESPONSE: -+ rtw_build_tdls_ch_switch_rsp_ies(padapter, pxmitframe, pframe, ptxmgmt, ptdls_sta); -+ break; -+#endif -+ case TDLS_PEER_TRAFFIC_RESPONSE: -+ rtw_build_tdls_peer_traffic_rsp_ies(padapter, pxmitframe, pframe, ptxmgmt, ptdls_sta); -+ break; -+#ifdef CONFIG_WFD -+ case TUNNELED_PROBE_REQ: -+ rtw_build_tunneled_probe_req_ies(padapter, pxmitframe, pframe); -+ break; -+ case TUNNELED_PROBE_RSP: -+ rtw_build_tunneled_probe_rsp_ies(padapter, pxmitframe, pframe); -+ break; -+#endif /* CONFIG_WFD */ -+ default: -+ res = _FAIL; -+ break; -+ } -+ -+exit: -+ return res; -+} -+ -+s32 rtw_make_tdls_wlanhdr(_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib, struct tdls_txmgmt *ptxmgmt) -+{ -+ u16 *qc; -+ struct rtw_ieee80211_hdr *pwlanhdr = (struct rtw_ieee80211_hdr *)hdr; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta = NULL, *ptdls_sta = NULL; -+ u8 tdls_seq = 0, baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; -+ -+ sint res = _SUCCESS; -+ u16 *fctrl = &pwlanhdr->frame_ctl; -+ -+ -+ _rtw_memset(hdr, 0, WLANHDR_OFFSET); -+ -+ set_frame_sub_type(fctrl, pattrib->subtype); -+ -+ switch (ptxmgmt->action_code) { -+ case TDLS_SETUP_REQUEST: -+ case TDLS_SETUP_RESPONSE: -+ case TDLS_SETUP_CONFIRM: -+ case TDLS_PEER_TRAFFIC_INDICATION: -+ case TDLS_PEER_PSM_REQUEST: -+ case TUNNELED_PROBE_REQ: -+ case TUNNELED_PROBE_RSP: -+ case TDLS_DISCOVERY_REQUEST: -+ SetToDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); -+ break; -+ case TDLS_CHANNEL_SWITCH_REQUEST: -+ case TDLS_CHANNEL_SWITCH_RESPONSE: -+ case TDLS_PEER_PSM_RESPONSE: -+ case TDLS_PEER_TRAFFIC_RESPONSE: -+ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); -+ tdls_seq = 1; -+ break; -+ case TDLS_TEARDOWN: -+ if (ptxmgmt->status_code == _RSON_TDLS_TEAR_UN_RSN_) { -+ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); -+ tdls_seq = 1; -+ } else { -+ SetToDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); -+ } -+ break; -+ } -+ -+ if (pattrib->encrypt) -+ SetPrivacy(fctrl); -+ -+ if (ptxmgmt->action_code == TDLS_PEER_TRAFFIC_RESPONSE) -+ SetPwrMgt(fctrl); -+ -+ if (pqospriv->qos_option) { -+ qc = (unsigned short *)(hdr + pattrib->hdrlen - 2); -+ if (pattrib->priority) -+ SetPriority(qc, pattrib->priority); -+ SetAckpolicy(qc, pattrib->ack_policy); -+ } -+ -+ psta = pattrib->psta; -+ -+ /* 1. update seq_num per link by sta_info */ -+ /* 2. rewrite encrypt to _AES_, also rewrite iv_len, icv_len */ -+ if (tdls_seq == 1) { -+ ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); -+ if (ptdls_sta) { -+ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]++; -+ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; -+ pattrib->seqnum = ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]; -+ SetSeqNum(hdr, pattrib->seqnum); -+ -+ if (pattrib->encrypt) { -+ pattrib->encrypt = _AES_; -+ pattrib->iv_len = 8; -+ pattrib->icv_len = 8; -+ pattrib->bswenc = _FALSE; -+ } -+ pattrib->mac_id = ptdls_sta->cmn.mac_id; -+ } else { -+ res = _FAIL; -+ goto exit; -+ } -+ } else if (psta) { -+ psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; -+ psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; -+ pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; -+ SetSeqNum(hdr, pattrib->seqnum); -+ } -+ -+ -+exit: -+ -+ -+ return res; -+} -+ -+s32 rtw_xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, struct tdls_txmgmt *ptxmgmt) -+{ -+ s32 llc_sz; -+ -+ u8 *pframe, *mem_start; -+ -+ struct sta_info *psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ u8 *pbuf_start; -+ s32 bmcst = IS_MCAST(pattrib->ra); -+ s32 res = _SUCCESS; -+ -+ -+ if (pattrib->psta) -+ psta = pattrib->psta; -+ else { -+ if (bmcst) -+ psta = rtw_get_bcmc_stainfo(padapter); -+ else -+ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ } -+ -+ if (psta == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ if (pxmitframe->buf_addr == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pbuf_start = pxmitframe->buf_addr; -+ mem_start = pbuf_start + TXDESC_OFFSET; -+ -+ if (rtw_make_tdls_wlanhdr(padapter, mem_start, pattrib, ptxmgmt) == _FAIL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pframe = mem_start; -+ pframe += pattrib->hdrlen; -+ -+ /* adding icv, if necessary... */ -+ if (pattrib->iv_len) { -+ if (psta != NULL) { -+ switch (pattrib->encrypt) { -+ case _WEP40_: -+ case _WEP104_: -+ WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ break; -+ case _TKIP_: -+ if (bmcst) -+ TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ else -+ TKIP_IV(pattrib->iv, psta->dot11txpn, 0); -+ break; -+ case _AES_: -+ if (bmcst) -+ AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ else -+ AES_IV(pattrib->iv, psta->dot11txpn, 0); -+ break; -+ } -+ } -+ -+ _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); -+ pframe += pattrib->iv_len; -+ -+ } -+ -+ llc_sz = rtw_put_snap(pframe, pattrib->ether_type); -+ pframe += llc_sz; -+ -+ /* pattrib->pktlen will be counted in rtw_build_tdls_ies */ -+ pattrib->pktlen = 0; -+ -+ rtw_build_tdls_ies(padapter, pxmitframe, pframe, ptxmgmt); -+ -+ if ((pattrib->icv_len > 0) && (pattrib->bswenc)) { -+ pframe += pattrib->pktlen; -+ _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); -+ pframe += pattrib->icv_len; -+ } -+ -+ pattrib->nr_frags = 1; -+ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + llc_sz + -+ ((pattrib->bswenc) ? pattrib->icv_len : 0) + pattrib->pktlen; -+ -+ if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ xmitframe_swencrypt(padapter, pxmitframe); -+ -+ update_attrib_vcs_info(padapter, pxmitframe); -+ -+exit: -+ -+ -+ return res; -+} -+#endif /* CONFIG_TDLS */ -+ -+/* -+ * Calculate wlan 802.11 packet MAX size from pkt_attrib -+ * This function doesn't consider fragment case -+ */ -+u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib) -+{ -+ u32 len = 0; -+ -+ len = pattrib->hdrlen /* WLAN Header */ -+ + pattrib->iv_len /* IV */ -+ + XATTRIB_GET_MCTRL_LEN(pattrib) -+ + SNAP_SIZE + sizeof(u16) /* LLC */ -+ + pattrib->pktlen -+ + (pattrib->encrypt == _TKIP_ ? 8 : 0) /* MIC */ -+ + (pattrib->bswenc ? pattrib->icv_len : 0) /* ICV */ -+ ; -+ -+ return len; -+} -+ -+#ifdef CONFIG_TX_AMSDU -+s32 check_amsdu(struct xmit_frame *pxmitframe) -+{ -+ struct pkt_attrib *pattrib; -+ s32 ret = _TRUE; -+ -+ if (!pxmitframe) -+ ret = _FALSE; -+ -+ pattrib = &pxmitframe->attrib; -+ -+ if (IS_MCAST(pattrib->ra)) -+ ret = _FALSE; -+ -+ if ((pattrib->ether_type == 0x888e) || -+ (pattrib->ether_type == 0x0806) || -+ (pattrib->ether_type == 0x88b4) || -+ (pattrib->dhcp_pkt == 1)) -+ ret = _FALSE; -+ -+ if ((pattrib->encrypt == _WEP40_) || -+ (pattrib->encrypt == _WEP104_) || -+ (pattrib->encrypt == _TKIP_)) -+ ret = _FALSE; -+ -+ if (!pattrib->qos_en) -+ ret = _FALSE; -+ -+ if (IS_AMSDU_AMPDU_NOT_VALID(pattrib)) -+ ret = _FALSE; -+ -+ return ret; -+} -+ -+s32 check_amsdu_tx_support(_adapter *padapter) -+{ -+ struct dvobj_priv *pdvobjpriv; -+ int tx_amsdu; -+ int tx_amsdu_rate; -+ int current_tx_rate; -+ s32 ret = _FALSE; -+ -+ pdvobjpriv = adapter_to_dvobj(padapter); -+ tx_amsdu = padapter->tx_amsdu; -+ tx_amsdu_rate = padapter->tx_amsdu_rate; -+ current_tx_rate = pdvobjpriv->traffic_stat.cur_tx_tp; -+ -+ if (tx_amsdu == 1) -+ ret = _TRUE; -+ else if (tx_amsdu == 2 && (tx_amsdu_rate == 0 || current_tx_rate > tx_amsdu_rate)) -+ ret = _TRUE; -+ else -+ ret = _FALSE; -+ -+ return ret; -+} -+ -+s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_frame *pxmitframe_queue) -+{ -+ -+ struct pkt_file pktfile; -+ struct pkt_attrib *pattrib; -+ _pkt *pkt; -+ -+ struct pkt_file pktfile_queue; -+ struct pkt_attrib *pattrib_queue; -+ _pkt *pkt_queue; -+ -+ s32 llc_sz, mem_sz; -+ -+ s32 padding = 0; -+ -+ u8 *pframe, *mem_start; -+ u8 hw_hdr_offset; -+ -+ u16* len; -+ u8 *pbuf_start; -+ s32 res = _SUCCESS; -+ -+ if (pxmitframe->buf_addr == NULL) { -+ RTW_INFO("==> %s buf_addr==NULL\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+ -+ pbuf_start = pxmitframe->buf_addr; -+ -+#ifdef CONFIG_USB_TX_AGGREGATION -+ hw_hdr_offset = TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); -+#else -+#ifdef CONFIG_TX_EARLY_MODE /* for SDIO && Tx Agg */ -+ hw_hdr_offset = TXDESC_OFFSET + EARLY_MODE_INFO_SIZE; -+#else -+ hw_hdr_offset = TXDESC_OFFSET; -+#endif -+#endif -+ -+ mem_start = pbuf_start + hw_hdr_offset; //for DMA -+ -+ pattrib = &pxmitframe->attrib; -+ -+ pattrib->amsdu = 1; -+ -+ if (rtw_make_wlanhdr(padapter, mem_start, pattrib) == _FAIL) { -+ RTW_INFO("rtw_xmitframe_coalesce: rtw_make_wlanhdr fail; drop pkt\n"); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ llc_sz = 0; -+ -+ pframe = mem_start; -+ -+ //SetMFrag(mem_start); -+ ClearMFrag(mem_start); -+ -+ pframe += pattrib->hdrlen; -+ -+ /* adding icv, if necessary... */ -+ if (pattrib->iv_len) { -+ _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); // queue or new? -+ -+ RTW_DBG("rtw_xmitframe_coalesce: keyid=%d pattrib->iv[3]=%.2x pframe=%.2x %.2x %.2x %.2x\n", -+ padapter->securitypriv.dot11PrivacyKeyIndex, pattrib->iv[3], *pframe, *(pframe + 1), *(pframe + 2), *(pframe + 3)); -+ -+ pframe += pattrib->iv_len; -+ } -+ -+ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len; -+ -+ if(pxmitframe_queue) -+ { -+ pattrib_queue = &pxmitframe_queue->attrib; -+ pkt_queue = pxmitframe_queue->pkt; -+ -+ _rtw_open_pktfile(pkt_queue, &pktfile_queue); -+ _rtw_pktfile_read(&pktfile_queue, NULL, pattrib_queue->pkt_hdrlen); -+ -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ /* mDA(6), mSA(6), len(2), mctrl */ -+ _rtw_memcpy(pframe, pattrib_queue->mda, ETH_ALEN); -+ pframe += ETH_ALEN; -+ _rtw_memcpy(pframe, pattrib_queue->msa, ETH_ALEN); -+ pframe += ETH_ALEN; -+ len = (u16*)pframe; -+ pframe += 2; -+ rtw_mesh_tx_build_mctrl(padapter, pattrib_queue, pframe); -+ pframe += XATTRIB_GET_MCTRL_LEN(pattrib_queue); -+ } else -+ #endif -+ { -+ /* 802.3 MAC Header DA(6) SA(6) Len(2)*/ -+ _rtw_memcpy(pframe, pattrib_queue->dst, ETH_ALEN); -+ pframe += ETH_ALEN; -+ _rtw_memcpy(pframe, pattrib_queue->src, ETH_ALEN); -+ pframe += ETH_ALEN; -+ len = (u16*)pframe; -+ pframe += 2; -+ } -+ -+ llc_sz = rtw_put_snap(pframe, pattrib_queue->ether_type); -+ pframe += llc_sz; -+ -+ mem_sz = _rtw_pktfile_read(&pktfile_queue, pframe, pattrib_queue->pktlen); -+ pframe += mem_sz; -+ -+ *len = htons(XATTRIB_GET_MCTRL_LEN(pattrib_queue) + llc_sz + mem_sz); -+ -+ //calc padding -+ padding = 4 - ((ETH_HLEN + XATTRIB_GET_MCTRL_LEN(pattrib_queue) + llc_sz + mem_sz) & (4-1)); -+ if(padding == 4) -+ padding = 0; -+ -+ //_rtw_memset(pframe,0xaa, padding); -+ pframe += padding; -+ -+ pattrib->last_txcmdsz += ETH_HLEN + XATTRIB_GET_MCTRL_LEN(pattrib_queue) + llc_sz + mem_sz + padding ; -+ } -+ -+ //2nd mpdu -+ -+ pkt = pxmitframe->pkt; -+ _rtw_open_pktfile(pkt, &pktfile); -+ _rtw_pktfile_read(&pktfile, NULL, pattrib->pkt_hdrlen); -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ /* mDA(6), mSA(6), len(2), mctrl */ -+ _rtw_memcpy(pframe, pattrib->mda, ETH_ALEN); -+ pframe += ETH_ALEN; -+ _rtw_memcpy(pframe, pattrib->msa, ETH_ALEN); -+ pframe += ETH_ALEN; -+ len = (u16*)pframe; -+ pframe += 2; -+ rtw_mesh_tx_build_mctrl(padapter, pattrib, pframe); -+ pframe += XATTRIB_GET_MCTRL_LEN(pattrib); -+ } else -+#endif -+ { -+ /* 802.3 MAC Header DA(6) SA(6) Len(2) */ -+ _rtw_memcpy(pframe, pattrib->dst, ETH_ALEN); -+ pframe += ETH_ALEN; -+ _rtw_memcpy(pframe, pattrib->src, ETH_ALEN); -+ pframe += ETH_ALEN; -+ len = (u16*)pframe; -+ pframe += 2; -+ } -+ -+ llc_sz = rtw_put_snap(pframe, pattrib->ether_type); -+ pframe += llc_sz; -+ -+ mem_sz = _rtw_pktfile_read(&pktfile, pframe, pattrib->pktlen); -+ -+ pframe += mem_sz; -+ -+ *len = htons(XATTRIB_GET_MCTRL_LEN(pattrib) + llc_sz + mem_sz); -+ -+ //the last ampdu has no padding -+ padding = 0; -+ -+ pattrib->nr_frags = 1; -+ -+ pattrib->last_txcmdsz += ETH_HLEN + XATTRIB_GET_MCTRL_LEN(pattrib) + llc_sz + mem_sz + padding + -+ ((pattrib->bswenc) ? pattrib->icv_len : 0) ; -+ -+ if ((pattrib->icv_len > 0) && (pattrib->bswenc)) { -+ _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); -+ pframe += pattrib->icv_len; -+ } -+ -+ if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) { -+ RTW_INFO("xmitframe_addmic(padapter, pxmitframe)==_FAIL\n"); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ xmitframe_swencrypt(padapter, pxmitframe); -+ -+ update_attrib_vcs_info(padapter, pxmitframe); -+ -+exit: -+ return res; -+} -+#endif /* CONFIG_TX_AMSDU */ -+ -+/* -+ -+This sub-routine will perform all the following: -+ -+1. remove 802.3 header. -+2. create wlan_header, based on the info in pxmitframe -+3. append sta's iv/ext-iv -+4. append LLC -+5. move frag chunk from pframe to pxmitframe->mem -+6. apply sw-encrypt, if necessary. -+ -+*/ -+s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe) -+{ -+ struct pkt_file pktfile; -+ -+ s32 frg_inx, frg_len, mpdu_len, llc_sz, mem_sz; -+ -+ SIZE_PTR addr; -+ -+ u8 *pframe, *mem_start; -+ u8 hw_hdr_offset; -+ -+ /* struct sta_info *psta; */ -+ /* struct sta_priv *pstapriv = &padapter->stapriv; */ -+ /* struct mlme_priv *pmlmepriv = &padapter->mlmepriv; */ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ -+ u8 *pbuf_start; -+ -+ s32 bmcst = IS_MCAST(pattrib->ra); -+ s32 res = _SUCCESS; -+ -+ -+ /* -+ if (pattrib->psta) -+ { -+ psta = pattrib->psta; -+ } else -+ { -+ RTW_INFO("%s, call rtw_get_stainfo()\n", __func__); -+ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ } -+ -+ if(psta==NULL) -+ { -+ -+ RTW_INFO("%s, psta==NUL\n", __func__); -+ return _FAIL; -+ } -+ -+ -+ if(!(psta->state &WIFI_ASOC_STATE)) -+ { -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); -+ return _FAIL; -+ } -+ */ -+ if (pxmitframe->buf_addr == NULL) { -+ RTW_INFO("==> %s buf_addr==NULL\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+ pbuf_start = pxmitframe->buf_addr; -+ -+#ifdef CONFIG_USB_TX_AGGREGATION -+ hw_hdr_offset = TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); -+#else -+#ifdef CONFIG_TX_EARLY_MODE /* for SDIO && Tx Agg */ -+ hw_hdr_offset = TXDESC_OFFSET + EARLY_MODE_INFO_SIZE; -+#else -+ hw_hdr_offset = TXDESC_OFFSET; -+#endif -+#endif -+ -+ mem_start = pbuf_start + hw_hdr_offset; -+ -+ if (rtw_make_wlanhdr(padapter, mem_start, pattrib) == _FAIL) { -+ RTW_INFO("rtw_xmitframe_coalesce: rtw_make_wlanhdr fail; drop pkt\n"); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ _rtw_open_pktfile(pkt, &pktfile); -+ _rtw_pktfile_read(&pktfile, NULL, pattrib->pkt_hdrlen); -+ -+ frg_inx = 0; -+ frg_len = pxmitpriv->frag_len - 4;/* 2346-4 = 2342 */ -+ -+ while (1) { -+ llc_sz = 0; -+ -+ mpdu_len = frg_len; -+ -+ pframe = mem_start; -+ -+ SetMFrag(mem_start); -+ -+ pframe += pattrib->hdrlen; -+ mpdu_len -= pattrib->hdrlen; -+ -+ /* adding icv, if necessary... */ -+ if (pattrib->iv_len) { -+#if 0 -+ /* if (check_fwstate(pmlmepriv, WIFI_MP_STATE)) */ -+ /* psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); */ -+ /* else */ -+ /* psta = rtw_get_stainfo(pstapriv, pattrib->ra); */ -+ -+ if (psta != NULL) { -+ switch (pattrib->encrypt) { -+ case _WEP40_: -+ case _WEP104_: -+ WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ break; -+ case _TKIP_: -+ if (bmcst) -+ TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ else -+ TKIP_IV(pattrib->iv, psta->dot11txpn, 0); -+ break; -+ case _AES_: -+ if (bmcst) -+ AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); -+ else -+ AES_IV(pattrib->iv, psta->dot11txpn, 0); -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ rtw_wapi_get_iv(padapter, pattrib->ra, pattrib->iv); -+ break; -+#endif -+ } -+ } -+#endif -+ _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); -+ -+ -+ pframe += pattrib->iv_len; -+ -+ mpdu_len -= pattrib->iv_len; -+ } -+ -+ if (frg_inx == 0) { -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ rtw_mesh_tx_build_mctrl(padapter, pattrib, pframe); -+ pframe += XATTRIB_GET_MCTRL_LEN(pattrib); -+ mpdu_len -= XATTRIB_GET_MCTRL_LEN(pattrib); -+ } -+ #endif -+ -+ llc_sz = rtw_put_snap(pframe, pattrib->ether_type); -+ pframe += llc_sz; -+ mpdu_len -= llc_sz; -+ } -+ -+ if ((pattrib->icv_len > 0) && (pattrib->bswenc)) -+ mpdu_len -= pattrib->icv_len; -+ -+ -+ if (bmcst) { -+ /* don't do fragment to broadcat/multicast packets */ -+ mem_sz = _rtw_pktfile_read(&pktfile, pframe, pattrib->pktlen); -+ } else -+ mem_sz = _rtw_pktfile_read(&pktfile, pframe, mpdu_len); -+ -+ pframe += mem_sz; -+ -+ if ((pattrib->icv_len > 0) && (pattrib->bswenc)) { -+ _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); -+ pframe += pattrib->icv_len; -+ } -+ -+ frg_inx++; -+ -+ if (bmcst || (rtw_endofpktfile(&pktfile) == _TRUE)) { -+ pattrib->nr_frags = frg_inx; -+ -+ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + -+ ((pattrib->nr_frags == 1) ? (XATTRIB_GET_MCTRL_LEN(pattrib) + llc_sz) : 0) + -+ ((pattrib->bswenc) ? pattrib->icv_len : 0) + mem_sz; -+ -+ ClearMFrag(mem_start); -+ -+ break; -+ } -+ -+ addr = (SIZE_PTR)(pframe); -+ -+ mem_start = (unsigned char *)RND4(addr) + hw_hdr_offset; -+ _rtw_memcpy(mem_start, pbuf_start + hw_hdr_offset, pattrib->hdrlen); -+ -+ } -+ -+ if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) { -+ RTW_INFO("xmitframe_addmic(padapter, pxmitframe)==_FAIL\n"); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ xmitframe_swencrypt(padapter, pxmitframe); -+ -+ if (bmcst == _FALSE) -+ update_attrib_vcs_info(padapter, pxmitframe); -+ else -+ pattrib->vcs_mode = NONE_VCS; -+ -+exit: -+ -+ -+ return res; -+} -+ -+#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) -+/* -+ * CCMP encryption for unicast robust mgmt frame and broadcast group privicy action -+ * BIP for broadcast robust mgmt frame -+ */ -+s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe) -+{ -+#define DBG_MGMT_XMIT_COALESEC_DUMP 0 -+#define DBG_MGMT_XMIT_BIP_DUMP 0 -+#define DBG_MGMT_XMIT_ENC_DUMP 0 -+ -+ struct pkt_file pktfile; -+ s32 frg_inx, frg_len, mpdu_len, llc_sz, mem_sz; -+ SIZE_PTR addr; -+ u8 *pframe, *mem_start = NULL, *tmp_buf = NULL; -+ u8 hw_hdr_offset, subtype ; -+ u8 category = 0xFF; -+ struct sta_info *psta = NULL; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ u8 *pbuf_start; -+ s32 bmcst = IS_MCAST(pattrib->ra); -+ s32 res = _FAIL; -+ u8 *BIP_AAD = NULL; -+ u8 *MGMT_body = NULL; -+ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u8 mme_cont[_MME_IE_LENGTH_ - 2]; -+ u8 mme_clen; -+ -+ _irqL irqL; -+ u32 ori_len; -+ union pn48 *pn = NULL; -+ enum security_type cipher = _NO_PRIVACY_; -+ u8 kid; -+ -+ if (pxmitframe->buf_addr == NULL) { -+ RTW_WARN(FUNC_ADPT_FMT" pxmitframe->buf_addr\n" -+ , FUNC_ADPT_ARG(padapter)); -+ return _FAIL; -+ } -+ -+ mem_start = pframe = (u8 *)(pxmitframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ subtype = get_frame_sub_type(pframe); /* bit(7)~bit(2) */ -+ -+ /* check if robust mgmt frame */ -+ if (subtype != WIFI_DEAUTH && subtype != WIFI_DISASSOC && subtype != WIFI_ACTION) -+ return _SUCCESS; -+ if (subtype == WIFI_ACTION) { -+ category = *(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ if (CATEGORY_IS_NON_ROBUST(category)) -+ return _SUCCESS; -+ } -+ if (!bmcst) { -+ if (pattrib->psta) -+ psta = pattrib->psta; -+ else -+ pattrib->psta = psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ if (psta == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT" unicast sta == NULL\n", FUNC_ADPT_ARG(padapter)); -+ return _FAIL; -+ } -+ if (!(psta->flags & WLAN_STA_MFP)) { -+ /* peer is not MFP capable, no need to encrypt */ -+ return _SUCCESS; -+ } -+ if (psta->bpairwise_key_installed != _TRUE) { -+ RTW_INFO(FUNC_ADPT_FMT" PTK is not installed\n" -+ , FUNC_ADPT_ARG(padapter)); -+ return _FAIL; -+ } -+ } -+ -+ ori_len = BIP_AAD_SIZE + pattrib->pktlen + _MME_IE_LENGTH_; -+ tmp_buf = BIP_AAD = rtw_zmalloc(ori_len); -+ if (BIP_AAD == NULL) -+ return _FAIL; -+ -+ _enter_critical_bh(&padapter->security_key_mutex, &irqL); -+ -+ if (bmcst) { -+ if (subtype == WIFI_ACTION && CATEGORY_IS_GROUP_PRIVACY(category)) { -+ /* broadcast group privacy action frame */ -+ #if DBG_MGMT_XMIT_COALESEC_DUMP -+ RTW_INFO(FUNC_ADPT_FMT" broadcast gp action(%u)\n" -+ , FUNC_ADPT_ARG(padapter), category); -+ #endif -+ -+ if (pattrib->psta) -+ psta = pattrib->psta; -+ else -+ pattrib->psta = psta = rtw_get_bcmc_stainfo(padapter); -+ if (psta == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT" broadcast sta == NULL\n" -+ , FUNC_ADPT_ARG(padapter)); -+ goto xmitframe_coalesce_fail; -+ } -+ if (padapter->securitypriv.binstallGrpkey != _TRUE) { -+ RTW_INFO(FUNC_ADPT_FMT" GTK is not installed\n" -+ , FUNC_ADPT_ARG(padapter)); -+ goto xmitframe_coalesce_fail; -+ } -+ -+ pn = &psta->dot11txpn; -+ cipher = padapter->securitypriv.dot118021XGrpPrivacy; -+ kid = padapter->securitypriv.dot118021XGrpKeyid; -+ } else { -+ #ifdef CONFIG_IEEE80211W -+ /* broadcast robust mgmt frame, using BIP */ -+ int frame_body_len; -+ u8 mic[16]; -+ -+ /* IGTK key is not install ex: mesh MFP without IGTK */ -+ if (SEC_IS_BIP_KEY_INSTALLED(&padapter->securitypriv) != _TRUE) -+ goto xmitframe_coalesce_success; -+ -+ #if DBG_MGMT_XMIT_COALESEC_DUMP -+ if (subtype == WIFI_DEAUTH) -+ RTW_INFO(FUNC_ADPT_FMT" braodcast deauth\n", FUNC_ADPT_ARG(padapter)); -+ else if (subtype == WIFI_DISASSOC) -+ RTW_INFO(FUNC_ADPT_FMT" braodcast disassoc\n", FUNC_ADPT_ARG(padapter)); -+ else if (subtype == WIFI_ACTION) { -+ RTW_INFO(FUNC_ADPT_FMT" braodcast action(%u)\n" -+ , FUNC_ADPT_ARG(padapter), category); -+ } -+ #endif -+ -+ _rtw_memset(mme_cont, 0, _MME_IE_LENGTH_ - 2); -+ mme_clen = padapter->securitypriv.dot11wCipher == _BIP_CMAC_128_ ? 16 : 24; -+ -+ MGMT_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); -+ pframe += pattrib->pktlen; -+ -+ /* octent 0 and 1 is key index ,BIP keyid is 4 or 5, LSB only need octent 0 */ -+ mme_cont[0] = padapter->securitypriv.dot11wBIPKeyid; -+ /* increase PN and apply to packet */ -+ padapter->securitypriv.dot11wBIPtxpn.val++; -+ RTW_PUT_LE64(&mme_cont[2], padapter->securitypriv.dot11wBIPtxpn.val); -+ -+ /* add MME IE with MIC all zero, MME string doesn't include element id and length */ -+ pframe = rtw_set_ie(pframe, _MME_IE_ , mme_clen , mme_cont, &(pattrib->pktlen)); -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ /* total frame length - header length */ -+ frame_body_len = pattrib->pktlen - sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ /* conscruct AAD, copy frame control field */ -+ _rtw_memcpy(BIP_AAD, &pwlanhdr->frame_ctl, 2); -+ ClearRetry(BIP_AAD); -+ ClearPwrMgt(BIP_AAD); -+ ClearMData(BIP_AAD); -+ /* conscruct AAD, copy address 1 to address 3 */ -+ _rtw_memcpy(BIP_AAD + 2, GetAddr1Ptr((u8 *)pwlanhdr), 18); -+ /* copy management fram body */ -+ _rtw_memcpy(BIP_AAD + BIP_AAD_SIZE, MGMT_body, frame_body_len); -+ -+ #if DBG_MGMT_XMIT_BIP_DUMP -+ /* dump total packet include MME with zero MIC */ -+ { -+ int i; -+ printk("Total packet: "); -+ for (i = 0; i < BIP_AAD_SIZE + frame_body_len; i++) -+ printk(" %02x ", BIP_AAD[i]); -+ printk("\n"); -+ } -+ #endif -+ -+ /* calculate mic */ -+ if (rtw_calculate_bip_mic(padapter->securitypriv.dot11wCipher, -+ (u8 *)pwlanhdr, pattrib->pktlen, -+ padapter->securitypriv.dot11wBIPKey[padapter->securitypriv.dot11wBIPKeyid].skey, -+ BIP_AAD, (BIP_AAD_SIZE + frame_body_len), mic) == _FAIL) -+ goto xmitframe_coalesce_fail; -+ -+ #if DBG_MGMT_XMIT_BIP_DUMP -+ /* dump calculated mic result */ -+ { -+ int i; -+ printk("Calculated mic result: "); -+ for (i = 0; i < 16; i++) -+ printk(" %02x ", mic[i]); -+ printk("\n"); -+ } -+ #endif -+ -+ /* copy right BIP mic value, total is 128bits, we use the 0~63 bits */ -+ if (padapter->securitypriv.dot11wCipher == _BIP_CMAC_128_) -+ _rtw_memcpy(pframe - 8, mic, 8); -+ else -+ _rtw_memcpy(pframe - 16, mic, 16); -+ -+ #if DBG_MGMT_XMIT_BIP_DUMP -+ /*dump all packet after mic ok */ -+ { -+ int pp; -+ printk("pattrib->pktlen = %d\n", pattrib->pktlen); -+ for(pp=0;pp< pattrib->pktlen; pp++) -+ printk(" %02x ", mem_start[pp]); -+ printk("\n"); -+ } -+ #endif -+ -+ #endif /* CONFIG_IEEE80211W */ -+ -+ goto xmitframe_coalesce_success; -+ } -+ } -+ else { -+ /* unicast robust mgmt frame */ -+ #if DBG_MGMT_XMIT_COALESEC_DUMP -+ if (subtype == WIFI_DEAUTH) { -+ RTW_INFO(FUNC_ADPT_FMT" unicast deauth to "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(pattrib->ra)); -+ } else if (subtype == WIFI_DISASSOC) { -+ RTW_INFO(FUNC_ADPT_FMT" unicast disassoc to "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(pattrib->ra)); -+ } else if (subtype == WIFI_ACTION) { -+ RTW_INFO(FUNC_ADPT_FMT" unicast action(%u) to "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(padapter), category, MAC_ARG(pattrib->ra)); -+ } -+ #endif -+ -+ pn = &psta->dot11txpn; -+ cipher = psta->dot118021XPrivacy; -+ kid = 0; -+ -+ _rtw_memcpy(pattrib->dot118021x_UncstKey.skey -+ , psta->dot118021x_UncstKey.skey -+ , (cipher & _SEC_TYPE_256_) ? 32 : 16); -+ -+ /* To use wrong key */ -+ if (pattrib->key_type == IEEE80211W_WRONG_KEY) { -+ RTW_INFO("use wrong key\n"); -+ pattrib->dot118021x_UncstKey.skey[0] = 0xff; -+ } -+ } -+ -+ #if DBG_MGMT_XMIT_ENC_DUMP -+ /* before encrypt dump the management packet content */ -+ { -+ int i; -+ printk("Management pkt: "); -+ for(i=0; ipktlen; i++) -+ printk(" %02x ", pframe[i]); -+ printk("=======\n"); -+ } -+ #endif -+ -+ /* bakeup original management packet */ -+ _rtw_memcpy(tmp_buf, pframe, pattrib->pktlen); -+ /* move to data portion */ -+ pframe += pattrib->hdrlen; -+ -+ if (pattrib->key_type != IEEE80211W_NO_KEY) { -+ pattrib->encrypt = cipher; -+ pattrib->bswenc = _TRUE; -+ } -+ -+ /* -+ * 802.11w encrypted management packet must be: -+ * _AES_, _CCMP_256_, _GCMP_, _GCMP_256_ -+ */ -+ switch (pattrib->encrypt) { -+ case _AES_: -+ pattrib->iv_len = 8; -+ pattrib->icv_len = 8; -+ AES_IV(pattrib->iv, (*pn), kid); -+ break; -+ case _CCMP_256_: -+ pattrib->iv_len = 8; -+ pattrib->icv_len = 16; -+ AES_IV(pattrib->iv, (*pn), kid); -+ break; -+ case _GCMP_: -+ case _GCMP_256_: -+ pattrib->iv_len = 8; -+ pattrib->icv_len = 16; -+ GCMP_IV(pattrib->iv, (*pn), kid); -+ break; -+ default: -+ goto xmitframe_coalesce_fail; -+ } -+ -+ /* insert iv header into management frame */ -+ _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); -+ pframe += pattrib->iv_len; -+ /* copy mgmt data portion after CCMP header */ -+ _rtw_memcpy(pframe, tmp_buf + pattrib->hdrlen, pattrib->pktlen - pattrib->hdrlen); -+ /* move pframe to end of mgmt pkt */ -+ pframe += pattrib->pktlen - pattrib->hdrlen; -+ /* add 8 bytes CCMP IV header to length */ -+ pattrib->pktlen += pattrib->iv_len; -+ -+ #if DBG_MGMT_XMIT_ENC_DUMP -+ /* dump management packet include AES IV header */ -+ { -+ int i; -+ printk("Management pkt + IV: "); -+ /* for(i=0; ipktlen; i++) */ -+ -+ printk("@@@@@@@@@@@@@\n"); -+ } -+ #endif -+ -+ if ((pattrib->icv_len > 0) && (pattrib->bswenc)) { -+ _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); -+ pframe += pattrib->icv_len; -+ } -+ /* add 8 bytes MIC */ -+ pattrib->pktlen += pattrib->icv_len; -+ /* set final tx command size */ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ /* set protected bit must be beofre SW encrypt */ -+ SetPrivacy(mem_start); -+ -+ #if DBG_MGMT_XMIT_ENC_DUMP -+ /* dump management packet include AES header */ -+ { -+ int i; -+ printk("prepare to enc Management pkt + IV: "); -+ for (i = 0; i < pattrib->pktlen; i++) -+ printk(" %02x ", mem_start[i]); -+ printk("@@@@@@@@@@@@@\n"); -+ } -+ #endif -+ -+ /* software encrypt */ -+ xmitframe_swencrypt(padapter, pxmitframe); -+ -+xmitframe_coalesce_success: -+ _exit_critical_bh(&padapter->security_key_mutex, &irqL); -+ rtw_mfree(BIP_AAD, ori_len); -+ return _SUCCESS; -+ -+xmitframe_coalesce_fail: -+ _exit_critical_bh(&padapter->security_key_mutex, &irqL); -+ rtw_mfree(BIP_AAD, ori_len); -+ -+ return _FAIL; -+} -+#endif /* defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) */ -+ -+/* Logical Link Control(LLC) SubNetwork Attachment Point(SNAP) header -+ * IEEE LLC/SNAP header contains 8 octets -+ * First 3 octets comprise the LLC portion -+ * SNAP portion, 5 octets, is divided into two fields: -+ * Organizationally Unique Identifier(OUI), 3 octets, -+ * type, defined by that organization, 2 octets. -+ */ -+s32 rtw_put_snap(u8 *data, u16 h_proto) -+{ -+ struct ieee80211_snap_hdr *snap; -+ u8 *oui; -+ -+ -+ snap = (struct ieee80211_snap_hdr *)data; -+ snap->dsap = 0xaa; -+ snap->ssap = 0xaa; -+ snap->ctrl = 0x03; -+ -+ if (h_proto == 0x8137 || h_proto == 0x80f3) -+ oui = P802_1H_OUI; -+ else -+ oui = RFC1042_OUI; -+ -+ snap->oui[0] = oui[0]; -+ snap->oui[1] = oui[1]; -+ snap->oui[2] = oui[2]; -+ -+ *(u16 *)(data + SNAP_SIZE) = htons(h_proto); -+ -+ -+ return SNAP_SIZE + sizeof(u16); -+} -+ -+void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len) -+{ -+ -+ uint protection; -+ u8 *perp; -+ sint erp_len; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ -+ -+ switch (pxmitpriv->vcs_setting) { -+ case DISABLE_VCS: -+ pxmitpriv->vcs = NONE_VCS; -+ break; -+ -+ case ENABLE_VCS: -+ break; -+ -+ case AUTO_VCS: -+ default: -+ perp = rtw_get_ie(ie, _ERPINFO_IE_, &erp_len, ie_len); -+ if (perp == NULL) -+ pxmitpriv->vcs = NONE_VCS; -+ else { -+ protection = (*(perp + 2)) & BIT(1); -+ if (protection) { -+ if (pregistrypriv->vcs_type == RTS_CTS) -+ pxmitpriv->vcs = RTS_CTS; -+ else -+ pxmitpriv->vcs = CTS_TO_SELF; -+ } else -+ pxmitpriv->vcs = NONE_VCS; -+ } -+ -+ break; -+ -+ } -+ -+ -+} -+ -+void rtw_count_tx_stats(PADAPTER padapter, struct xmit_frame *pxmitframe, int sz) -+{ -+ struct sta_info *psta = NULL; -+ struct stainfo_stats *pstats = NULL; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ u8 pkt_num = 1; -+ -+ if ((pxmitframe->frame_tag & 0x0f) == DATA_FRAMETAG) { -+#if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pkt_num = pxmitframe->agg_num; -+#endif -+ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod += pkt_num; -+ -+ pxmitpriv->tx_pkts += pkt_num; -+ -+ pxmitpriv->tx_bytes += sz; -+ -+ psta = pxmitframe->attrib.psta; -+ if (psta) { -+ pstats = &psta->sta_stats; -+ -+ pstats->tx_pkts += pkt_num; -+ -+ pstats->tx_bytes += sz; -+ #if defined(CONFIG_CHECK_LEAVE_LPS) && defined(CONFIG_LPS_CHK_BY_TP) -+ if (adapter_to_pwrctl(padapter)->lps_chk_by_tp) -+ traffic_check_for_leave_lps_by_tp(padapter, _TRUE, psta); -+ #endif /* CONFIG_LPS */ -+ } -+ -+#ifdef CONFIG_CHECK_LEAVE_LPS -+ /* traffic_check_for_leave_lps(padapter, _TRUE); */ -+#endif /* CONFIG_CHECK_LEAVE_LPS */ -+ -+ } -+} -+ -+static struct xmit_buf *__rtw_alloc_cmd_xmitbuf(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type) -+{ -+ struct xmit_buf *pxmitbuf = NULL; -+ -+ -+ pxmitbuf = &pxmitpriv->pcmd_xmitbuf[buf_type]; -+ if (pxmitbuf != NULL) { -+ pxmitbuf->priv_data = NULL; -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pxmitbuf->len = 0; -+ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; -+ pxmitbuf->agg_num = 0; -+ pxmitbuf->pg_num = 0; -+#endif -+#ifdef CONFIG_PCI_HCI -+ pxmitbuf->len = 0; -+#ifdef CONFIG_TRX_BD_ARCH -+ /*pxmitbuf->buf_desc = NULL;*/ -+#else -+ pxmitbuf->desc = NULL; -+#endif -+#endif -+ -+ if (pxmitbuf->sctx) { -+ RTW_INFO("%s pxmitbuf->sctx is not NULL\n", __func__); -+ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC); -+ } -+ } else -+ RTW_INFO("%s fail, no xmitbuf available !!!\n", __func__); -+ -+ return pxmitbuf; -+} -+ -+struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type) -+{ -+ struct xmit_frame *pcmdframe; -+ struct xmit_buf *pxmitbuf; -+ -+ pcmdframe = rtw_alloc_xmitframe(pxmitpriv, 0); -+ if (pcmdframe == NULL) { -+ RTW_INFO("%s, alloc xmitframe fail\n", __FUNCTION__); -+ return NULL; -+ } -+ -+ pxmitbuf = __rtw_alloc_cmd_xmitbuf(pxmitpriv, buf_type); -+ if (pxmitbuf == NULL) { -+ RTW_INFO("%s, alloc xmitbuf fail\n", __FUNCTION__); -+ rtw_free_xmitframe(pxmitpriv, pcmdframe); -+ return NULL; -+ } -+ -+ pcmdframe->frame_tag = MGNT_FRAMETAG; -+ -+ pcmdframe->pxmitbuf = pxmitbuf; -+ -+ pcmdframe->buf_addr = pxmitbuf->pbuf; -+ -+ /* initial memory to zero */ -+ _rtw_memset(pcmdframe->buf_addr, 0, MAX_CMDBUF_SZ); -+ -+ pxmitbuf->priv_data = pcmdframe; -+ -+ return pcmdframe; -+ -+} -+ -+struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv) -+{ -+ _irqL irqL; -+ struct xmit_buf *pxmitbuf = NULL; -+ _list *plist, *phead; -+ _queue *pfree_queue = &pxmitpriv->free_xmit_extbuf_queue; -+ -+ -+ _enter_critical(&pfree_queue->lock, &irqL); -+ -+ if (_rtw_queue_empty(pfree_queue) == _TRUE) -+ pxmitbuf = NULL; -+ else { -+ -+ phead = get_list_head(pfree_queue); -+ -+ plist = get_next(phead); -+ -+ pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); -+ -+ rtw_list_delete(&(pxmitbuf->list)); -+ } -+ -+ if (pxmitbuf != NULL) { -+ pxmitpriv->free_xmit_extbuf_cnt--; -+#ifdef DBG_XMIT_BUF_EXT -+ RTW_INFO("DBG_XMIT_BUF_EXT ALLOC no=%d, free_xmit_extbuf_cnt=%d\n", pxmitbuf->no, pxmitpriv->free_xmit_extbuf_cnt); -+#endif -+ -+ -+ pxmitbuf->priv_data = NULL; -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pxmitbuf->len = 0; -+ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; -+ pxmitbuf->agg_num = 1; -+#endif -+#ifdef CONFIG_PCI_HCI -+ pxmitbuf->len = 0; -+#ifdef CONFIG_TRX_BD_ARCH -+ /*pxmitbuf->buf_desc = NULL;*/ -+#else -+ pxmitbuf->desc = NULL; -+#endif -+#endif -+ -+ if (pxmitbuf->sctx) { -+ RTW_INFO("%s pxmitbuf->sctx is not NULL\n", __func__); -+ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC); -+ } -+ -+ } -+ -+ _exit_critical(&pfree_queue->lock, &irqL); -+ -+ -+ return pxmitbuf; -+} -+ -+s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) -+{ -+ _irqL irqL; -+ _queue *pfree_queue = &pxmitpriv->free_xmit_extbuf_queue; -+ -+ -+ if (pxmitbuf == NULL) -+ return _FAIL; -+ -+ _enter_critical(&pfree_queue->lock, &irqL); -+ -+ rtw_list_delete(&pxmitbuf->list); -+ -+ rtw_list_insert_tail(&(pxmitbuf->list), get_list_head(pfree_queue)); -+ pxmitpriv->free_xmit_extbuf_cnt++; -+#ifdef DBG_XMIT_BUF_EXT -+ RTW_INFO("DBG_XMIT_BUF_EXT FREE no=%d, free_xmit_extbuf_cnt=%d\n", pxmitbuf->no , pxmitpriv->free_xmit_extbuf_cnt); -+#endif -+ -+ _exit_critical(&pfree_queue->lock, &irqL); -+ -+ -+ return _SUCCESS; -+} -+ -+struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv) -+{ -+ _irqL irqL; -+ struct xmit_buf *pxmitbuf = NULL; -+ _list *plist, *phead; -+ _queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue; -+ -+ -+ /* RTW_INFO("+rtw_alloc_xmitbuf\n"); */ -+ -+ _enter_critical(&pfree_xmitbuf_queue->lock, &irqL); -+ -+ if (_rtw_queue_empty(pfree_xmitbuf_queue) == _TRUE) -+ pxmitbuf = NULL; -+ else { -+ -+ phead = get_list_head(pfree_xmitbuf_queue); -+ -+ plist = get_next(phead); -+ -+ pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); -+ -+ rtw_list_delete(&(pxmitbuf->list)); -+ } -+ -+ if (pxmitbuf != NULL) { -+ pxmitpriv->free_xmitbuf_cnt--; -+#ifdef DBG_XMIT_BUF -+ RTW_INFO("DBG_XMIT_BUF ALLOC no=%d, free_xmitbuf_cnt=%d\n", pxmitbuf->no, pxmitpriv->free_xmitbuf_cnt); -+#endif -+ /* RTW_INFO("alloc, free_xmitbuf_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt); */ -+ -+ pxmitbuf->priv_data = NULL; -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pxmitbuf->len = 0; -+ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; -+ pxmitbuf->agg_num = 0; -+ pxmitbuf->pg_num = 0; -+#endif -+#ifdef CONFIG_PCI_HCI -+ pxmitbuf->len = 0; -+#ifdef CONFIG_TRX_BD_ARCH -+ /*pxmitbuf->buf_desc = NULL;*/ -+#else -+ pxmitbuf->desc = NULL; -+#endif -+#endif -+ -+ if (pxmitbuf->sctx) { -+ RTW_INFO("%s pxmitbuf->sctx is not NULL\n", __func__); -+ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC); -+ } -+ } -+#ifdef DBG_XMIT_BUF -+ else -+ RTW_INFO("DBG_XMIT_BUF rtw_alloc_xmitbuf return NULL\n"); -+#endif -+ -+ _exit_critical(&pfree_xmitbuf_queue->lock, &irqL); -+ -+ -+ return pxmitbuf; -+} -+ -+s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) -+{ -+ _irqL irqL; -+ _queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue; -+ -+ -+ /* RTW_INFO("+rtw_free_xmitbuf\n"); */ -+ -+ if (pxmitbuf == NULL) -+ return _FAIL; -+ -+ if (pxmitbuf->sctx) { -+ RTW_INFO("%s pxmitbuf->sctx is not NULL\n", __func__); -+ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_FREE); -+ } -+ -+ if (pxmitbuf->buf_tag == XMITBUF_CMD) { -+ } else if (pxmitbuf->buf_tag == XMITBUF_MGNT) -+ rtw_free_xmitbuf_ext(pxmitpriv, pxmitbuf); -+ else { -+ _enter_critical(&pfree_xmitbuf_queue->lock, &irqL); -+ -+ rtw_list_delete(&pxmitbuf->list); -+ -+ rtw_list_insert_tail(&(pxmitbuf->list), get_list_head(pfree_xmitbuf_queue)); -+ -+ pxmitpriv->free_xmitbuf_cnt++; -+ /* RTW_INFO("FREE, free_xmitbuf_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt); */ -+#ifdef DBG_XMIT_BUF -+ RTW_INFO("DBG_XMIT_BUF FREE no=%d, free_xmitbuf_cnt=%d\n", pxmitbuf->no , pxmitpriv->free_xmitbuf_cnt); -+#endif -+ _exit_critical(&pfree_xmitbuf_queue->lock, &irqL); -+ } -+ -+ -+ return _SUCCESS; -+} -+ -+void rtw_init_xmitframe(struct xmit_frame *pxframe) -+{ -+ if (pxframe != NULL) { /* default value setting */ -+ pxframe->buf_addr = NULL; -+ pxframe->pxmitbuf = NULL; -+ -+ _rtw_memset(&pxframe->attrib, 0, sizeof(struct pkt_attrib)); -+ /* pxframe->attrib.psta = NULL; */ -+ -+ pxframe->frame_tag = DATA_FRAMETAG; -+ -+#ifdef CONFIG_USB_HCI -+ pxframe->pkt = NULL; -+#ifdef USB_PACKET_OFFSET_SZ -+ pxframe->pkt_offset = (PACKET_OFFSET_SZ / 8); -+#else -+ pxframe->pkt_offset = 1;/* default use pkt_offset to fill tx desc */ -+#endif -+ -+#ifdef CONFIG_USB_TX_AGGREGATION -+ pxframe->agg_num = 1; -+#endif -+ -+#endif /* #ifdef CONFIG_USB_HCI */ -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pxframe->pg_num = 1; -+ pxframe->agg_num = 1; -+#endif -+ -+#ifdef CONFIG_XMIT_ACK -+ pxframe->ack_report = 0; -+#endif -+ -+ } -+} -+ -+/* -+Calling context: -+1. OS_TXENTRY -+2. RXENTRY (rx_thread or RX_ISR/RX_CallBack) -+ -+If we turn on USE_RXTHREAD, then, no need for critical section. -+Otherwise, we must use _enter/_exit critical to protect free_xmit_queue... -+ -+Must be very very cautious... -+ -+*/ -+struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv, u16 os_qid) -+{ -+ /* -+ Please remember to use all the osdep_service api, -+ and lock/unlock or _enter/_exit critical to protect -+ pfree_xmit_queue -+ */ -+ -+ _irqL irqL; -+ struct xmit_frame *pxframe = NULL; -+ _list *plist, *phead; -+ _queue *pfree_xmit_queue = &pxmitpriv->free_xmit_queue; -+ -+ _enter_critical_bh(&pfree_xmit_queue->lock, &irqL); -+ -+ if (_rtw_queue_empty(pfree_xmit_queue) == _TRUE) { -+ pxframe = NULL; -+ } else { -+ phead = get_list_head(pfree_xmit_queue); -+ -+ plist = get_next(phead); -+ -+ pxframe = LIST_CONTAINOR(plist, struct xmit_frame, list); -+ -+ rtw_list_delete(&(pxframe->list)); -+ pxmitpriv->free_xmitframe_cnt--; -+ pxframe->os_qid = os_qid; -+ } -+ -+ _exit_critical_bh(&pfree_xmit_queue->lock, &irqL); -+ -+ if (pxframe) -+ rtw_os_check_stop_queue(pxmitpriv->adapter, os_qid); -+ -+ rtw_init_xmitframe(pxframe); -+ -+ -+ return pxframe; -+} -+ -+struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv) -+{ -+ _irqL irqL; -+ struct xmit_frame *pxframe = NULL; -+ _list *plist, *phead; -+ _queue *queue = &pxmitpriv->free_xframe_ext_queue; -+ -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ -+ if (_rtw_queue_empty(queue) == _TRUE) { -+ pxframe = NULL; -+ } else { -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ pxframe = LIST_CONTAINOR(plist, struct xmit_frame, list); -+ -+ rtw_list_delete(&(pxframe->list)); -+ pxmitpriv->free_xframe_ext_cnt--; -+ } -+ -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+ rtw_init_xmitframe(pxframe); -+ -+ -+ return pxframe; -+} -+ -+struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv) -+{ -+ struct xmit_frame *pxframe = NULL; -+ u8 *alloc_addr; -+ -+ alloc_addr = rtw_zmalloc(sizeof(struct xmit_frame) + 4); -+ -+ if (alloc_addr == NULL) -+ goto exit; -+ -+ pxframe = (struct xmit_frame *)N_BYTE_ALIGMENT((SIZE_PTR)(alloc_addr), 4); -+ pxframe->alloc_addr = alloc_addr; -+ -+ pxframe->padapter = pxmitpriv->adapter; -+ pxframe->frame_tag = NULL_FRAMETAG; -+ -+ pxframe->pkt = NULL; -+ -+ pxframe->buf_addr = NULL; -+ pxframe->pxmitbuf = NULL; -+ -+ rtw_init_xmitframe(pxframe); -+ -+ RTW_INFO("################## %s ##################\n", __func__); -+ -+exit: -+ return pxframe; -+} -+ -+s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe) -+{ -+ _irqL irqL; -+ _queue *queue = NULL; -+ _adapter *padapter = pxmitpriv->adapter; -+ _pkt *pndis_pkt = NULL; -+ -+ -+ if (pxmitframe == NULL) { -+ goto exit; -+ } -+ -+ if (pxmitframe->pkt) { -+ pndis_pkt = pxmitframe->pkt; -+ pxmitframe->pkt = NULL; -+ } -+ -+ if (pxmitframe->alloc_addr) { -+ RTW_INFO("################## %s with alloc_addr ##################\n", __func__); -+ rtw_mfree(pxmitframe->alloc_addr, sizeof(struct xmit_frame) + 4); -+ goto check_pkt_complete; -+ } -+ -+ if (pxmitframe->ext_tag == 0) -+ queue = &pxmitpriv->free_xmit_queue; -+ else if (pxmitframe->ext_tag == 1) -+ queue = &pxmitpriv->free_xframe_ext_queue; -+ else -+ rtw_warn_on(1); -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ -+ rtw_list_delete(&pxmitframe->list); -+ rtw_list_insert_tail(&pxmitframe->list, get_list_head(queue)); -+ if (pxmitframe->ext_tag == 0) { -+ pxmitpriv->free_xmitframe_cnt++; -+ } else if (pxmitframe->ext_tag == 1) { -+ pxmitpriv->free_xframe_ext_cnt++; -+ } else { -+ } -+ -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+ if (queue == &pxmitpriv->free_xmit_queue) -+ rtw_os_check_wakup_queue(padapter, pxmitframe->os_qid); -+ -+check_pkt_complete: -+ -+ if (pndis_pkt) -+ rtw_os_pkt_complete(padapter, pndis_pkt); -+ -+exit: -+ -+ -+ return _SUCCESS; -+} -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+void rtw_free_mgmt_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *mgmt_queue) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ struct xmit_frame *pxmitframe; -+ -+ _enter_critical_bh(&(mgmt_queue->lock), &irqL); -+ -+ phead = get_list_head(mgmt_queue); -+ plist = get_next(phead); -+ -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ -+ pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); -+ plist = get_next(plist); -+ -+ #ifdef DBG_MGMT_QUEUE -+ RTW_INFO("%s seq_num = %u\n", __func__, pxmitframe->attrib.seqnum); -+ #endif -+ -+ rtw_free_xmitbuf_ext(pxmitpriv, pxmitframe->pxmitbuf); -+ rtw_free_xmitframe(pxmitpriv, pxmitframe); -+ } -+ _exit_critical_bh(&(mgmt_queue->lock), &irqL); -+} -+ -+u8 rtw_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ struct sta_info *psta; -+ struct tx_servq *ptxservq; -+ struct pkt_attrib *pattrib = &(pxmitframe->attrib); -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct hw_xmit *phwxmits = pxmitpriv->hwxmits; -+ u8 mgmt_idx = pxmitpriv->hwxmit_entry - 1; -+ -+ DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class); -+ -+ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ if (pattrib->psta != psta) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_sta); -+ RTW_INFO("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); -+ return _FAIL; -+ } -+ -+ if (psta == NULL) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_nosta); -+ RTW_INFO("rtw_xmit_classifier: psta == NULL\n"); -+ return _FAIL; -+ } -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_fwlink); -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); -+ return _FAIL; -+ } -+ -+ ptxservq = &(psta->sta_xmitpriv.mgmt_q); -+ -+ if (rtw_is_list_empty(&ptxservq->tx_pending)) -+ rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmits[mgmt_idx].sta_queue)); -+ -+ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptxservq->sta_pending)); -+ ptxservq->qcnt++; -+ phwxmits[mgmt_idx].accnt++; -+ -+ return _SUCCESS; -+} -+#endif -+ -+void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ struct xmit_frame *pxmitframe; -+ -+ -+ _enter_critical_bh(&(pframequeue->lock), &irqL); -+ -+ phead = get_list_head(pframequeue); -+ plist = get_next(phead); -+ -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ -+ pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); -+ -+ plist = get_next(plist); -+ -+ rtw_free_xmitframe(pxmitpriv, pxmitframe); -+ -+ } -+ _exit_critical_bh(&(pframequeue->lock), &irqL); -+ -+} -+ -+s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ DBG_COUNTER(padapter->tx_logs.core_tx_enqueue); -+ if (rtw_xmit_classifier(padapter, pxmitframe) == _FAIL) { -+ /* pxmitframe->pkt = NULL; */ -+ return _FAIL; -+ } -+ -+ return _SUCCESS; -+} -+ -+static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit, struct tx_servq *ptxservq, _queue *pframe_queue) -+{ -+ _list *xmitframe_plist, *xmitframe_phead; -+ struct xmit_frame *pxmitframe = NULL; -+ -+ xmitframe_phead = get_list_head(pframe_queue); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ -+ /* xmitframe_plist = get_next(xmitframe_plist); */ -+ -+ /*#ifdef RTK_DMP_PLATFORM -+ #ifdef CONFIG_USB_TX_AGGREGATION -+ if((ptxservq->qcnt>0) && (ptxservq->qcnt<=2)) -+ { -+ pxmitframe = NULL; -+ -+ tasklet_schedule(&pxmitpriv->xmit_tasklet); -+ -+ break; -+ } -+ #endif -+ #endif*/ -+ rtw_list_delete(&pxmitframe->list); -+ -+ ptxservq->qcnt--; -+ -+ /* rtw_list_insert_tail(&pxmitframe->list, &phwxmit->pending); */ -+ -+ /* ptxservq->qcnt--; */ -+ -+ break; -+ -+ /* pxmitframe = NULL; */ -+ -+ } -+ -+ return pxmitframe; -+} -+ -+static struct xmit_frame *get_one_xmitframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit, struct tx_servq *ptxservq, _queue *pframe_queue) -+{ -+ _list *xmitframe_plist, *xmitframe_phead; -+ struct xmit_frame *pxmitframe = NULL; -+ -+ xmitframe_phead = get_list_head(pframe_queue); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ break; -+ } -+ -+ return pxmitframe; -+} -+ -+struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame) -+{ -+ _irqL irqL0; -+ _list *sta_plist, *sta_phead; -+ struct hw_xmit *phwxmit_i = pxmitpriv->hwxmits; -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ /* This function gets xmit_frame from AC queue. */ -+ /* When mgmt queue is used, AC queue index is (hwxmit_entry - 1) */ -+ sint entry = pxmitpriv->hwxmit_entry - 1; -+#else -+ sint entry = pxmitpriv->hwxmit_entry; -+#endif -+ struct hw_xmit *phwxmit; -+ struct tx_servq *ptxservq = NULL; -+ _queue *pframe_queue = NULL; -+ struct xmit_frame *pxmitframe = NULL; -+ _adapter *padapter = pxmitpriv->adapter; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ int i, inx[4]; -+ -+ inx[0] = 0; -+ inx[1] = 1; -+ inx[2] = 2; -+ inx[3] = 3; -+ -+ *num_frame = 0; -+ -+ /*No amsdu when wifi_spec on*/ -+ if (pregpriv->wifi_spec == 1) { -+ return NULL; -+ } -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL0); -+ -+ for (i = 0; i < entry; i++) { -+ phwxmit = phwxmit_i + inx[i]; -+ -+ sta_phead = get_list_head(phwxmit->sta_queue); -+ sta_plist = get_next(sta_phead); -+ -+ while ((rtw_end_of_queue_search(sta_phead, sta_plist)) == _FALSE) { -+ -+ ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); -+ pframe_queue = &ptxservq->sta_pending; -+ -+ if(ptxservq->qcnt) -+ { -+ *num_frame = ptxservq->qcnt; -+ pxmitframe = get_one_xmitframe(pxmitpriv, phwxmit, ptxservq, pframe_queue); -+ goto exit; -+ } -+ sta_plist = get_next(sta_plist); -+ } -+ } -+ -+exit: -+ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL0); -+ -+ return pxmitframe; -+} -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+struct xmit_frame *rtw_dequeue_mgmt_xframe(struct xmit_priv *pxmitpriv) -+{ -+ _irqL irqL0; -+ _list *sta_plist, *sta_phead; -+ struct hw_xmit *mgmt_hwxmit; -+ struct tx_servq *ptxservq = NULL; -+ _queue *pframe_queue = NULL; -+ struct xmit_frame *pxmitframe = NULL; -+ u8 mgmt_entry = pxmitpriv->hwxmit_entry - 1; -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL0); -+ -+ /* management queue */ -+ mgmt_hwxmit = (pxmitpriv->hwxmits) + mgmt_entry; -+ -+ sta_phead = get_list_head(mgmt_hwxmit->sta_queue); -+ sta_plist = get_next(sta_phead); -+ -+ while ((rtw_end_of_queue_search(sta_phead, sta_plist)) == _FALSE) { -+ -+ ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); -+ -+ pframe_queue = &ptxservq->sta_pending; -+ -+ pxmitframe = dequeue_one_xmitframe(pxmitpriv, mgmt_hwxmit, ptxservq, pframe_queue); -+ -+ #ifdef DBG_MGMT_QUEUE -+ RTW_INFO("%s dequeue mgmt frame (seq_num = %u) to TX\n", __func__, pxmitframe->attrib.seqnum); -+ #endif -+ -+ if (pxmitframe) { -+ mgmt_hwxmit->accnt--; -+ -+ /* Remove sta node when there is no pending packets. */ -+ if (_rtw_queue_empty(pframe_queue)) /* must be done after get_next and before break */ -+ rtw_list_delete(&ptxservq->tx_pending); -+ -+ goto exit; -+ } -+ sta_plist = get_next(sta_plist); -+ } -+exit: -+ _exit_critical_bh(&pxmitpriv->lock, &irqL0); -+ -+ return pxmitframe; -+} -+#endif -+ -+struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry) -+{ -+ _irqL irqL0; -+ _list *sta_plist, *sta_phead; -+ struct hw_xmit *phwxmit; -+ struct tx_servq *ptxservq = NULL; -+ _queue *pframe_queue = NULL; -+ struct xmit_frame *pxmitframe = NULL; -+ _adapter *padapter = pxmitpriv->adapter; -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ int i, inx[4]; -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ /* This function gets xmit_frame from AC queue. */ -+ /* When mgmt queue is used, AC queue index is (hwxmit_entry - 1) */ -+ entry--; -+#endif -+ inx[0] = 0; -+ inx[1] = 1; -+ inx[2] = 2; -+ inx[3] = 3; -+ -+ if (pregpriv->wifi_spec == 1) { -+ int j; -+#if 0 -+ if (flags < XMIT_QUEUE_ENTRY) { -+ /* priority exchange according to the completed xmitbuf flags. */ -+ inx[flags] = 0; -+ inx[0] = flags; -+ } -+#endif -+ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI) -+ for (j = 0; j < 4; j++) -+ inx[j] = pxmitpriv->wmm_para_seq[j]; -+#endif -+ } -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL0); -+ -+ for (i = 0; i < entry; i++) { -+ phwxmit = phwxmit_i + inx[i]; -+ -+ /* _enter_critical_ex(&phwxmit->sta_queue->lock, &irqL0); */ -+ -+ sta_phead = get_list_head(phwxmit->sta_queue); -+ sta_plist = get_next(sta_phead); -+ -+ while ((rtw_end_of_queue_search(sta_phead, sta_plist)) == _FALSE) { -+ -+ ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); -+ -+ pframe_queue = &ptxservq->sta_pending; -+ -+ pxmitframe = dequeue_one_xmitframe(pxmitpriv, phwxmit, ptxservq, pframe_queue); -+ -+ if (pxmitframe) { -+ phwxmit->accnt--; -+ -+ /* Remove sta node when there is no pending packets. */ -+ if (_rtw_queue_empty(pframe_queue)) /* must be done after get_next and before break */ -+ rtw_list_delete(&ptxservq->tx_pending); -+ -+ /* _exit_critical_ex(&phwxmit->sta_queue->lock, &irqL0); */ -+ -+ goto exit; -+ } -+ -+ sta_plist = get_next(sta_plist); -+ -+ } -+ -+ /* _exit_critical_ex(&phwxmit->sta_queue->lock, &irqL0); */ -+ -+ } -+ -+exit: -+ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL0); -+ -+ return pxmitframe; -+} -+ -+struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac) -+{ -+ struct tx_servq *ptxservq = NULL; -+ -+ -+ switch (up) { -+ case 1: -+ case 2: -+ ptxservq = &(psta->sta_xmitpriv.bk_q); -+ *(ac) = 3; -+ break; -+ -+ case 4: -+ case 5: -+ ptxservq = &(psta->sta_xmitpriv.vi_q); -+ *(ac) = 1; -+ break; -+ -+ case 6: -+ case 7: -+ ptxservq = &(psta->sta_xmitpriv.vo_q); -+ *(ac) = 0; -+ break; -+ -+ case 0: -+ case 3: -+ default: -+ ptxservq = &(psta->sta_xmitpriv.be_q); -+ *(ac) = 2; -+ break; -+ -+ } -+ -+ -+ return ptxservq; -+} -+ -+/* -+ * Will enqueue pxmitframe to the proper queue, -+ * and indicate it to xx_pending list..... -+ */ -+s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ /* _irqL irqL0; */ -+ u8 ac_index; -+ struct sta_info *psta; -+ struct tx_servq *ptxservq; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; -+ sint res = _SUCCESS; -+ -+ -+ DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class); -+ -+ /* -+ if (pattrib->psta) { -+ psta = pattrib->psta; -+ } else { -+ RTW_INFO("%s, call rtw_get_stainfo()\n", __func__); -+ psta = rtw_get_stainfo(pstapriv, pattrib->ra); -+ } -+ */ -+ -+ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ if (pattrib->psta != psta) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_sta); -+ RTW_INFO("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); -+ return _FAIL; -+ } -+ -+ if (psta == NULL) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_nosta); -+ res = _FAIL; -+ RTW_INFO("rtw_xmit_classifier: psta == NULL\n"); -+ goto exit; -+ } -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_fwlink); -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); -+ return _FAIL; -+ } -+ -+ ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index)); -+ -+ /* _enter_critical(&pstapending->lock, &irqL0); */ -+ -+ if (rtw_is_list_empty(&ptxservq->tx_pending)) -+ rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmits[ac_index].sta_queue)); -+ -+ /* _enter_critical(&ptxservq->sta_pending.lock, &irqL1); */ -+ -+ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptxservq->sta_pending)); -+ ptxservq->qcnt++; -+ phwxmits[ac_index].accnt++; -+ -+ /* _exit_critical(&ptxservq->sta_pending.lock, &irqL1); */ -+ -+ /* _exit_critical(&pstapending->lock, &irqL0); */ -+ -+exit: -+ -+ -+ return res; -+} -+ -+void rtw_alloc_hwxmits(_adapter *padapter) -+{ -+ struct hw_xmit *hwxmits; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ pxmitpriv->hwxmit_entry = HWXMIT_ENTRY; -+ -+ pxmitpriv->hwxmits = NULL; -+ -+ pxmitpriv->hwxmits = (struct hw_xmit *)rtw_zmalloc(sizeof(struct hw_xmit) * pxmitpriv->hwxmit_entry); -+ -+ if (pxmitpriv->hwxmits == NULL) { -+ RTW_INFO("alloc hwxmits fail!...\n"); -+ return; -+ } -+ -+ hwxmits = pxmitpriv->hwxmits; -+ -+ rtw_warn_on(pxmitpriv->hwxmit_entry < 4); -+ -+ /* pxmitpriv->vo_txqueue.head = 0; */ -+ /* hwxmits[0] .phwtxqueue = &pxmitpriv->vo_txqueue; */ -+ hwxmits[0].sta_queue = &pxmitpriv->vo_pending; -+ -+ /* pxmitpriv->vi_txqueue.head = 0; */ -+ /* hwxmits[1] .phwtxqueue = &pxmitpriv->vi_txqueue; */ -+ hwxmits[1].sta_queue = &pxmitpriv->vi_pending; -+ -+ /* pxmitpriv->be_txqueue.head = 0; */ -+ /* hwxmits[2] .phwtxqueue = &pxmitpriv->be_txqueue; */ -+ hwxmits[2].sta_queue = &pxmitpriv->be_pending; -+ -+ /* pxmitpriv->bk_txqueue.head = 0; */ -+ /* hwxmits[3] .phwtxqueue = &pxmitpriv->bk_txqueue; */ -+ hwxmits[3].sta_queue = &pxmitpriv->bk_pending; -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ hwxmits[4].sta_queue = &pxmitpriv->mgmt_pending; -+#endif -+ -+} -+ -+void rtw_free_hwxmits(_adapter *padapter) -+{ -+ struct hw_xmit *hwxmits; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ hwxmits = pxmitpriv->hwxmits; -+ if (hwxmits) -+ rtw_mfree((u8 *)hwxmits, (sizeof(struct hw_xmit) * pxmitpriv->hwxmit_entry)); -+} -+ -+void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry) -+{ -+ sint i; -+ for (i = 0; i < entry; i++, phwxmit++) { -+ /* _rtw_spinlock_init(&phwxmit->xmit_lock); */ -+ /* _rtw_init_listhead(&phwxmit->pending); */ -+ /* phwxmit->txcmdcnt = 0; */ -+ phwxmit->accnt = 0; -+ } -+} -+ -+#ifdef CONFIG_BR_EXT -+int rtw_br_client_tx(_adapter *padapter, struct sk_buff **pskb) -+{ -+ struct sk_buff *skb = *pskb; -+ _irqL irqL; -+ /* if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) */ -+ { -+ void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb); -+ int res, is_vlan_tag = 0, i, do_nat25 = 1; -+ unsigned short vlan_hdr = 0; -+ void *br_port = NULL; -+ -+ /* mac_clone_handle_frame(priv, skb); */ -+ -+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) -+ br_port = padapter->pnetdev->br_port; -+#else /* (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) */ -+ rcu_read_lock(); -+ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); -+ rcu_read_unlock(); -+#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) */ -+ _enter_critical_bh(&padapter->br_ext_lock, &irqL); -+ if (!(skb->data[0] & 1) && -+ br_port && -+ memcmp(skb->data + MACADDRLEN, padapter->br_mac, MACADDRLEN) && -+ *((unsigned short *)(skb->data + MACADDRLEN * 2)) != __constant_htons(ETH_P_8021Q) && -+ *((unsigned short *)(skb->data + MACADDRLEN * 2)) == __constant_htons(ETH_P_IP) && -+ !memcmp(padapter->scdb_mac, skb->data + MACADDRLEN, MACADDRLEN) && padapter->scdb_entry) { -+ memcpy(skb->data + MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); -+ padapter->scdb_entry->ageing_timer = jiffies; -+ _exit_critical_bh(&padapter->br_ext_lock, &irqL); -+ } else -+ /* if (!priv->pmib->ethBrExtInfo.nat25_disable) */ -+ { -+ /* if (priv->dev->br_port && -+ * !memcmp(skb->data+MACADDRLEN, priv->br_mac, MACADDRLEN)) { */ -+#if 1 -+ if (*((unsigned short *)(skb->data + MACADDRLEN * 2)) == __constant_htons(ETH_P_8021Q)) { -+ is_vlan_tag = 1; -+ vlan_hdr = *((unsigned short *)(skb->data + MACADDRLEN * 2 + 2)); -+ for (i = 0; i < 6; i++) -+ *((unsigned short *)(skb->data + MACADDRLEN * 2 + 2 - i * 2)) = *((unsigned short *)(skb->data + MACADDRLEN * 2 - 2 - i * 2)); -+ skb_pull(skb, 4); -+ } -+ /* if SA == br_mac && skb== IP => copy SIP to br_ip ?? why */ -+ if (!memcmp(skb->data + MACADDRLEN, padapter->br_mac, MACADDRLEN) && -+ (*((unsigned short *)(skb->data + MACADDRLEN * 2)) == __constant_htons(ETH_P_IP))) -+ memcpy(padapter->br_ip, skb->data + WLAN_ETHHDR_LEN + 12, 4); -+ -+ if (*((unsigned short *)(skb->data + MACADDRLEN * 2)) == __constant_htons(ETH_P_IP)) { -+ if (memcmp(padapter->scdb_mac, skb->data + MACADDRLEN, MACADDRLEN)) { -+ void *scdb_findEntry(_adapter *priv, unsigned char *macAddr, unsigned char *ipAddr); -+ -+ padapter->scdb_entry = (struct nat25_network_db_entry *)scdb_findEntry(padapter, -+ skb->data + MACADDRLEN, skb->data + WLAN_ETHHDR_LEN + 12); -+ if (padapter->scdb_entry != NULL) { -+ memcpy(padapter->scdb_mac, skb->data + MACADDRLEN, MACADDRLEN); -+ memcpy(padapter->scdb_ip, skb->data + WLAN_ETHHDR_LEN + 12, 4); -+ padapter->scdb_entry->ageing_timer = jiffies; -+ do_nat25 = 0; -+ } -+ } else { -+ if (padapter->scdb_entry) { -+ padapter->scdb_entry->ageing_timer = jiffies; -+ do_nat25 = 0; -+ } else { -+ memset(padapter->scdb_mac, 0, MACADDRLEN); -+ memset(padapter->scdb_ip, 0, 4); -+ } -+ } -+ } -+ _exit_critical_bh(&padapter->br_ext_lock, &irqL); -+#endif /* 1 */ -+ if (do_nat25) { -+ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method); -+ if (nat25_db_handle(padapter, skb, NAT25_CHECK) == 0) { -+ struct sk_buff *newskb; -+ -+ if (is_vlan_tag) { -+ skb_push(skb, 4); -+ for (i = 0; i < 6; i++) -+ *((unsigned short *)(skb->data + i * 2)) = *((unsigned short *)(skb->data + 4 + i * 2)); -+ *((unsigned short *)(skb->data + MACADDRLEN * 2)) = __constant_htons(ETH_P_8021Q); -+ *((unsigned short *)(skb->data + MACADDRLEN * 2 + 2)) = vlan_hdr; -+ } -+ -+ newskb = rtw_skb_copy(skb); -+ if (newskb == NULL) { -+ /* priv->ext_stats.tx_drops++; */ -+ DEBUG_ERR("TX DROP: rtw_skb_copy fail!\n"); -+ /* goto stop_proc; */ -+ return -1; -+ } -+ rtw_skb_free(skb); -+ -+ *pskb = skb = newskb; -+ if (is_vlan_tag) { -+ vlan_hdr = *((unsigned short *)(skb->data + MACADDRLEN * 2 + 2)); -+ for (i = 0; i < 6; i++) -+ *((unsigned short *)(skb->data + MACADDRLEN * 2 + 2 - i * 2)) = *((unsigned short *)(skb->data + MACADDRLEN * 2 - 2 - i * 2)); -+ skb_pull(skb, 4); -+ } -+ } -+ -+ if (skb_is_nonlinear(skb)) -+ DEBUG_ERR("%s(): skb_is_nonlinear!!\n", __FUNCTION__); -+ -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) -+ res = skb_linearize(skb, GFP_ATOMIC); -+#else /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) */ -+ res = skb_linearize(skb); -+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) */ -+ if (res < 0) { -+ DEBUG_ERR("TX DROP: skb_linearize fail!\n"); -+ /* goto free_and_stop; */ -+ return -1; -+ } -+ -+ res = nat25_db_handle(padapter, skb, NAT25_INSERT); -+ if (res < 0) { -+ if (res == -2) { -+ /* priv->ext_stats.tx_drops++; */ -+ DEBUG_ERR("TX DROP: nat25_db_handle fail!\n"); -+ /* goto free_and_stop; */ -+ return -1; -+ -+ } -+ /* we just print warning message and let it go */ -+ /* DEBUG_WARN("%s()-%d: nat25_db_handle INSERT Warning!\n", __FUNCTION__, __LINE__); */ -+ /* return -1; */ /* return -1 will cause system crash on 2011/08/30! */ -+ return 0; -+ } -+ } -+ -+ memcpy(skb->data + MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); -+ -+ dhcp_flag_bcast(padapter, skb); -+ -+ if (is_vlan_tag) { -+ skb_push(skb, 4); -+ for (i = 0; i < 6; i++) -+ *((unsigned short *)(skb->data + i * 2)) = *((unsigned short *)(skb->data + 4 + i * 2)); -+ *((unsigned short *)(skb->data + MACADDRLEN * 2)) = __constant_htons(ETH_P_8021Q); -+ *((unsigned short *)(skb->data + MACADDRLEN * 2 + 2)) = vlan_hdr; -+ } -+ } -+#if 0 -+ else { -+ if (*((unsigned short *)(skb->data + MACADDRLEN * 2)) == __constant_htons(ETH_P_8021Q)) -+ is_vlan_tag = 1; -+ -+ if (is_vlan_tag) { -+ if (ICMPV6_MCAST_MAC(skb->data) && ICMPV6_PROTO1A_VALN(skb->data)) -+ memcpy(skb->data + MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); -+ } else { -+ if (ICMPV6_MCAST_MAC(skb->data) && ICMPV6_PROTO1A(skb->data)) -+ memcpy(skb->data + MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); -+ } -+ } -+#endif /* 0 */ -+ -+ /* check if SA is equal to our MAC */ -+ if (memcmp(skb->data + MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN)) { -+ /* priv->ext_stats.tx_drops++; */ -+ DEBUG_ERR("TX DROP: untransformed frame SA:%02X%02X%02X%02X%02X%02X!\n", -+ skb->data[6], skb->data[7], skb->data[8], skb->data[9], skb->data[10], skb->data[11]); -+ /* goto free_and_stop; */ -+ return -1; -+ } -+ } -+ return 0; -+} -+#endif /* CONFIG_BR_EXT */ -+ -+u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe) -+{ -+ u32 addr; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ -+ switch (pattrib->qsel) { -+ case 0: -+ case 3: -+ addr = BE_QUEUE_INX; -+ break; -+ case 1: -+ case 2: -+ addr = BK_QUEUE_INX; -+ break; -+ case 4: -+ case 5: -+ addr = VI_QUEUE_INX; -+ break; -+ case 6: -+ case 7: -+ addr = VO_QUEUE_INX; -+ break; -+ case 0x10: -+ addr = BCN_QUEUE_INX; -+ break; -+ case 0x11: /* BC/MC in PS (HIQ) */ -+ addr = HIGH_QUEUE_INX; -+ break; -+ case 0x13: -+ addr = TXCMD_QUEUE_INX; -+ break; -+ case 0x12: -+ default: -+ addr = MGT_QUEUE_INX; -+ break; -+ -+ } -+ -+ return addr; -+ -+} -+ -+static void do_queue_select(_adapter *padapter, struct pkt_attrib *pattrib) -+{ -+ u8 qsel; -+ -+ qsel = pattrib->priority; -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) { -+ /* Under MCC */ -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) { -+ if (padapter->mcc_adapterpriv.role == MCC_ROLE_GO -+ || padapter->mcc_adapterpriv.role == MCC_ROLE_AP) { -+ pattrib->qsel = QSLT_VO; /* AP interface VO queue */ -+ pattrib->priority = QSLT_VO; -+ } else { -+ pattrib->qsel = QSLT_BE; /* STA interface BE queue */ -+ pattrib->priority = QSLT_BE; -+ } -+ } else -+ /* Not Under MCC */ -+ pattrib->qsel = qsel; -+ } else -+ /* Not enable MCC */ -+ pattrib->qsel = qsel; -+#else /* !CONFIG_MCC_MODE */ -+ pattrib->qsel = qsel; -+#endif /* CONFIG_MCC_MODE */ -+ -+ /* high priority packet */ -+ if (pattrib->hipriority_pkt) { -+ pattrib->qsel = QSLT_VO; -+ pattrib->priority = QSLT_VO; -+ } -+} -+ -+/* -+ * The main transmit(tx) entry -+ * -+ * Return -+ * 1 enqueue -+ * 0 success, hardware will handle this xmit frame(packet) -+ * <0 fail -+ */ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) -+s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev) -+{ -+ u16 frame_ctl; -+ struct ieee80211_radiotap_header rtap_hdr; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct pkt_file pktfile; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct pkt_attrib *pattrib; -+ struct xmit_frame *pmgntframe; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ unsigned char *pframe; -+ u8 dummybuf[32]; -+ int len = skb->len, rtap_len; -+ -+ -+ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); -+ -+#ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL -+ if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) -+ goto fail; -+ -+ _rtw_open_pktfile((_pkt *)skb, &pktfile); -+ _rtw_pktfile_read(&pktfile, (u8 *)(&rtap_hdr), sizeof(struct ieee80211_radiotap_header)); -+ rtap_len = ieee80211_get_radiotap_len((u8 *)(&rtap_hdr)); -+ if (unlikely(rtap_hdr.it_version)) -+ goto fail; -+ -+ if (unlikely(skb->len < rtap_len)) -+ goto fail; -+ -+ if (rtap_len != 12) { -+ RTW_INFO("radiotap len (should be 14): %d\n", rtap_len); -+ goto fail; -+ } -+ _rtw_pktfile_read(&pktfile, dummybuf, rtap_len-sizeof(struct ieee80211_radiotap_header)); -+ len = len - rtap_len; -+#endif -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ rtw_udelay_os(500); -+ goto fail; -+ } -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+// _rtw_memcpy(pframe, (void *)checking, len); -+ _rtw_pktfile_read(&pktfile, pframe, len); -+ -+ -+ /* Check DATA/MGNT frames */ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ frame_ctl = le16_to_cpu(pwlanhdr->frame_ctl); -+ if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { -+ -+ pattrib = &pmgntframe->attrib; -+ update_monitor_frame_attrib(padapter, pattrib); -+ -+ if (is_broadcast_mac_addr(pwlanhdr->addr3) || is_broadcast_mac_addr(pwlanhdr->addr1)) -+ pattrib->rate = MGN_24M; -+ -+ } else { -+ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ } -+ pattrib->retry_ctrl = _FALSE; -+ pattrib->pktlen = len; -+ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); -+ pattrib->seqnum = pmlmeext->mgnt_seq; -+ pmlmeext->mgnt_seq++; -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+fail: -+ rtw_skb_free(skb); -+ return 0; -+} -+#endif -+ -+/* -+ * -+ * Return _TRUE when frame has been put to queue, otherwise return _FALSE. -+ */ -+static u8 xmit_enqueue(struct _ADAPTER *a, struct xmit_frame *frame) -+{ -+ struct sta_info *sta = NULL; -+ struct pkt_attrib *attrib = NULL; -+ _irqL irqL; -+ _list *head; -+ u8 ret = _TRUE; -+ -+ -+ attrib = &frame->attrib; -+ sta = attrib->psta; -+ if (!sta) -+ return _FALSE; -+ -+ _enter_critical_bh(&sta->tx_queue.lock, &irqL); -+ -+ head = get_list_head(&sta->tx_queue); -+ -+ if ((rtw_is_list_empty(head) == _TRUE) && (!sta->tx_q_enable)) { -+ ret = _FALSE; -+ goto exit; -+ } -+ -+ rtw_list_insert_tail(&frame->list, head); -+ RTW_INFO(FUNC_ADPT_FMT ": en-queue tx pkt for macid=%d\n", -+ FUNC_ADPT_ARG(a), sta->cmn.mac_id); -+ -+exit: -+ _exit_critical_bh(&sta->tx_queue.lock, &irqL); -+ -+ return ret; -+} -+ -+static void xmit_dequeue(struct sta_info *sta) -+{ -+ struct _ADAPTER *a; -+ _irqL irqL; -+ _list *head, *list; -+ struct xmit_frame *frame; -+ -+ -+ a = sta->padapter; -+ -+ _enter_critical_bh(&sta->tx_queue.lock, &irqL); -+ -+ head = get_list_head(&sta->tx_queue); -+ -+ do { -+ if (rtw_is_list_empty(head) == _TRUE) -+ break; -+ -+ list = get_next(head); -+ rtw_list_delete(list); -+ frame = LIST_CONTAINOR(list, struct xmit_frame, list); -+ RTW_INFO(FUNC_ADPT_FMT ": de-queue tx frame of macid=%d\n", -+ FUNC_ADPT_ARG(a), sta->cmn.mac_id); -+ -+ rtw_hal_xmit(a, frame); -+ } while (1); -+ -+ _exit_critical_bh(&sta->tx_queue.lock, &irqL); -+} -+ -+void rtw_xmit_dequeue_callback(_workitem *work) -+{ -+ struct sta_info *sta; -+ -+ -+ sta = container_of(work, struct sta_info, tx_q_work); -+ xmit_dequeue(sta); -+} -+ -+void rtw_xmit_queue_set(struct sta_info *sta) -+{ -+ _irqL irqL; -+ -+ _enter_critical_bh(&sta->tx_queue.lock, &irqL); -+ -+ if (sta->tx_q_enable) { -+ RTW_WARN(FUNC_ADPT_FMT ": duplicated set!\n", -+ FUNC_ADPT_ARG(sta->padapter)); -+ goto exit; -+ } -+ sta->tx_q_enable = 1; -+ RTW_INFO(FUNC_ADPT_FMT ": enable queue TX for macid=%d\n", -+ FUNC_ADPT_ARG(sta->padapter), sta->cmn.mac_id); -+ -+exit: -+ _exit_critical_bh(&sta->tx_queue.lock, &irqL); -+} -+ -+void rtw_xmit_queue_clear(struct sta_info *sta) -+{ -+ _irqL irqL; -+ -+ _enter_critical_bh(&sta->tx_queue.lock, &irqL); -+ -+ if (!sta->tx_q_enable) { -+ RTW_WARN(FUNC_ADPT_FMT ": tx queue for macid=%d " -+ "not be enabled!\n", -+ FUNC_ADPT_ARG(sta->padapter), sta->cmn.mac_id); -+ goto exit; -+ } -+ -+ sta->tx_q_enable = 0; -+ RTW_INFO(FUNC_ADPT_FMT ": disable queue TX for macid=%d\n", -+ FUNC_ADPT_ARG(sta->padapter), sta->cmn.mac_id); -+ -+ _set_workitem(&sta->tx_q_work); -+ -+exit: -+ _exit_critical_bh(&sta->tx_queue.lock, &irqL); -+} -+ -+/* -+ * The main transmit(tx) entry post handle -+ * -+ * Return -+ * 1 enqueue -+ * 0 success, hardware will handle this xmit frame(packet) -+ * <0 fail -+ */ -+s32 rtw_xmit_posthandle(_adapter *padapter, struct xmit_frame *pxmitframe, _pkt *pkt) -+{ -+#ifdef CONFIG_AP_MODE -+ _irqL irqL0; -+#endif -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ s32 res; -+ -+ res = update_attrib(padapter, pkt, &pxmitframe->attrib); -+ -+#ifdef CONFIG_MCC_MODE -+ /* record data kernel TX to driver to check MCC concurrent TX */ -+ rtw_hal_mcc_calc_tx_bytes_from_kernel(padapter, pxmitframe->attrib.pktlen); -+#endif /* CONFIG_MCC_MODE */ -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (pxmitframe->attrib.ether_type != 0x88B4) { -+ if (rtw_wapi_drop_for_key_absent(padapter, pxmitframe->attrib.ra)) { -+ WAPI_TRACE(WAPI_RX, "drop for key absend when tx\n"); -+ res = _FAIL; -+ } -+ } -+#endif -+ if (res == _FAIL) { -+ /*RTW_INFO("%s-"ADPT_FMT" update attrib fail\n", __func__, ADPT_ARG(padapter));*/ -+#ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s update attrib fail\n", __FUNCTION__); -+#endif -+ rtw_free_xmitframe(pxmitpriv, pxmitframe); -+ return -1; -+ } -+ pxmitframe->pkt = pkt; -+ -+ rtw_led_tx_control(padapter, pxmitframe->attrib.dst); -+ -+ do_queue_select(padapter, &pxmitframe->attrib); -+ -+#ifdef CONFIG_AP_MODE -+ _enter_critical_bh(&pxmitpriv->lock, &irqL0); -+ if (xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE) { -+ _exit_critical_bh(&pxmitpriv->lock, &irqL0); -+ DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue); -+ return 1; -+ } -+ _exit_critical_bh(&pxmitpriv->lock, &irqL0); -+#endif -+ -+ if (xmit_enqueue(padapter, pxmitframe) == _TRUE) -+ return 1; -+ -+ /* pre_xmitframe */ -+ if (rtw_hal_xmit(padapter, pxmitframe) == _FALSE) -+ return 1; -+ -+ return 0; -+} -+ -+/* -+ * The main transmit(tx) entry -+ * -+ * Return -+ * 1 enqueue -+ * 0 success, hardware will handle this xmit frame(packet) -+ * <0 fail -+ */ -+s32 rtw_xmit(_adapter *padapter, _pkt **ppkt, u16 os_qid) -+{ -+ static systime start = 0; -+ static u32 drop_cnt = 0; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct xmit_frame *pxmitframe = NULL; -+ s32 res; -+ -+ DBG_COUNTER(padapter->tx_logs.core_tx); -+ -+ if (IS_CH_WAITING(adapter_to_rfctl(padapter))) -+ return -1; -+ -+ if (rtw_linked_check(padapter) == _FALSE) -+ return -1; -+ -+ if (start == 0) -+ start = rtw_get_current_time(); -+ -+ pxmitframe = rtw_alloc_xmitframe(pxmitpriv, os_qid); -+ -+ if (rtw_get_passing_time_ms(start) > 2000) { -+ if (drop_cnt) -+ RTW_INFO("DBG_TX_DROP_FRAME %s no more pxmitframe, drop_cnt:%u\n", __FUNCTION__, drop_cnt); -+ start = rtw_get_current_time(); -+ drop_cnt = 0; -+ } -+ -+ if (pxmitframe == NULL) { -+ drop_cnt++; -+ /*RTW_INFO("%s-"ADPT_FMT" no more xmitframe\n", __func__, ADPT_ARG(padapter));*/ -+ DBG_COUNTER(padapter->tx_logs.core_tx_err_pxmitframe); -+ return -1; -+ } -+ -+#ifdef CONFIG_BR_EXT -+ if (!adapter_use_wds(padapter) && check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE) == _TRUE) { -+ void *br_port = NULL; -+ -+ #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) -+ br_port = padapter->pnetdev->br_port; -+ #else -+ rcu_read_lock(); -+ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); -+ rcu_read_unlock(); -+ #endif -+ -+ if (br_port) { -+ res = rtw_br_client_tx(padapter, ppkt); -+ if (res == -1) { -+ rtw_free_xmitframe(pxmitpriv, pxmitframe); -+ DBG_COUNTER(padapter->tx_logs.core_tx_err_brtx); -+ return -1; -+ } -+ } -+ } -+#endif /* CONFIG_BR_EXT */ -+ -+#if defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) -+ if (MLME_STATE(padapter) & (WIFI_AP_STATE | WIFI_MESH_STATE)) { -+ _list b2u_list; -+ -+ #ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) -+ res = rtw_mesh_addr_resolve(padapter, os_qid, pxmitframe, *ppkt, &b2u_list); -+ else -+ #endif -+ res = rtw_ap_addr_resolve(padapter, os_qid, pxmitframe, *ppkt, &b2u_list); -+ if (res == RTW_RA_RESOLVING) -+ return 1; -+ if (res == _FAIL) -+ return -1; -+ -+ #if CONFIG_RTW_DATA_BMC_TO_UC -+ if (!rtw_is_list_empty(&b2u_list)) { -+ _list *list = get_next(&b2u_list); -+ struct xmit_frame *b2uframe; -+ -+ while ((rtw_end_of_queue_search(&b2u_list, list)) == _FALSE) { -+ b2uframe = LIST_CONTAINOR(list, struct xmit_frame, list); -+ list = get_next(list); -+ rtw_list_delete(&b2uframe->list); -+ -+ b2uframe->pkt = rtw_os_pkt_copy(*ppkt); -+ if (!b2uframe->pkt) { -+ if (res == RTW_BMC_NO_NEED) -+ res = _SUCCESS; -+ rtw_free_xmitframe(pxmitpriv, b2uframe); -+ continue; -+ } -+ -+ rtw_xmit_posthandle(padapter, b2uframe, b2uframe->pkt); -+ } -+ } -+ #endif -+ -+ if (res == RTW_BMC_NO_NEED) { -+ rtw_free_xmitframe(&padapter->xmitpriv, pxmitframe); -+ return 0; -+ } -+ } -+#endif /* defined(CONFIG_AP_MODE) || defined(CONFIG_RTW_MESH) */ -+ -+ pxmitframe->pkt = NULL; /* let rtw_xmit_posthandle not to free pkt inside */ -+ res = rtw_xmit_posthandle(padapter, pxmitframe, *ppkt); -+ -+ return res; -+} -+ -+#ifdef CONFIG_TDLS -+sint xmitframe_enqueue_for_tdls_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ sint ret = _FALSE; -+ -+ _irqL irqL; -+ struct sta_info *ptdls_sta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ int i; -+ -+ ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); -+ if (ptdls_sta == NULL) -+ return ret; -+ else if (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) { -+ -+ if (pattrib->triggered == 1) { -+ ret = _TRUE; -+ return ret; -+ } -+ -+ _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); -+ -+ if (ptdls_sta->state & WIFI_SLEEP_STATE) { -+ rtw_list_delete(&pxmitframe->list); -+ -+ /* _enter_critical_bh(&psta->sleep_q.lock, &irqL); */ -+ -+ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptdls_sta->sleep_q)); -+ -+ ptdls_sta->sleepq_len++; -+ ptdls_sta->sleepq_ac_len++; -+ -+ /* indicate 4-AC queue bit in TDLS peer traffic indication */ -+ switch (pattrib->priority) { -+ case 1: -+ case 2: -+ ptdls_sta->uapsd_bk |= BIT(1); -+ break; -+ case 4: -+ case 5: -+ ptdls_sta->uapsd_vi |= BIT(1); -+ break; -+ case 6: -+ case 7: -+ ptdls_sta->uapsd_vo |= BIT(1); -+ break; -+ case 0: -+ case 3: -+ default: -+ ptdls_sta->uapsd_be |= BIT(1); -+ break; -+ } -+ -+ /* Transmit TDLS PTI via AP */ -+ if (ptdls_sta->sleepq_len == 1) -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_ISSUE_PTI); -+ -+ ret = _TRUE; -+ } -+ -+ _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); -+ } -+ -+ return ret; -+ -+} -+#endif /* CONFIG_TDLS */ -+ -+#define RTW_HIQ_FILTER_ALLOW_ALL 0 -+#define RTW_HIQ_FILTER_ALLOW_SPECIAL 1 -+#define RTW_HIQ_FILTER_DENY_ALL 2 -+ -+inline bool xmitframe_hiq_filter(struct xmit_frame *xmitframe) -+{ -+ bool allow = _FALSE; -+ _adapter *adapter = xmitframe->padapter; -+ struct registry_priv *registry = &adapter->registrypriv; -+ -+ if (adapter->registrypriv.wifi_spec == 1) -+ allow = _TRUE; -+ else if (registry->hiq_filter == RTW_HIQ_FILTER_ALLOW_SPECIAL) { -+ -+ struct pkt_attrib *attrib = &xmitframe->attrib; -+ -+ if (attrib->ether_type == 0x0806 -+ || attrib->ether_type == 0x888e -+#ifdef CONFIG_WAPI_SUPPORT -+ || attrib->ether_type == 0x88B4 -+#endif -+ || attrib->dhcp_pkt -+ ) { -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" ether_type:0x%04x%s\n", FUNC_ADPT_ARG(xmitframe->padapter) -+ , attrib->ether_type, attrib->dhcp_pkt ? " DHCP" : ""); -+ allow = _TRUE; -+ } -+ } else if (registry->hiq_filter == RTW_HIQ_FILTER_ALLOW_ALL) -+ allow = _TRUE; -+ else if (registry->hiq_filter == RTW_HIQ_FILTER_DENY_ALL) -+ allow = _FALSE; -+ else -+ rtw_warn_on(1); -+ -+ return allow; -+} -+ -+#if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) -+#ifdef CONFIG_RTW_MGMT_QUEUE -+u8 mgmt_xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ _irqL irqL; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ struct sta_info *psta = pattrib->psta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ bool update_tim = _FALSE; -+ u8 ret = _TRUE; -+ -+ if (is_broadcast_mac_addr(pattrib->ra) || pattrib->ps_dontq) -+ return _FALSE; -+ -+ if (psta == NULL) { -+ RTW_INFO("%s, psta==NUL, pattrib->ra:"MAC_FMT"\n", -+ __func__, MAC_ARG(pattrib->ra)); -+ return _FALSE; -+ } -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_link); -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); -+ return _FALSE; -+ } -+ -+ _enter_critical_bh(&psta->mgmt_sleep_q.lock, &irqL); -+ -+ if (psta->state & WIFI_SLEEP_STATE && -+ rtw_tim_map_is_set(padapter, pstapriv->sta_dz_bitmap, psta->cmn.aid)) { -+ -+ rtw_list_delete(&pxmitframe->list); -+ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->mgmt_sleep_q)); -+ psta->mgmt_sleepq_len++; -+ -+ #ifdef DBG_MGMT_QUEUE -+ RTW_INFO("%s attrib->ra:"MAC_FMT" seq_num = %u, subtype = 0x%x\n", -+ __func__, MAC_ARG(pattrib->ra), pattrib->seqnum, pattrib->subtype); -+ #endif -+ -+ if (!(rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, psta->cmn.aid))) -+ update_tim = _TRUE; -+ -+ rtw_tim_map_set(padapter, pstapriv->tim_bitmap, psta->cmn.aid); -+ -+ /* upate BCN for TIM IE */ -+ if (update_tim == _TRUE) -+ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0, "buffer mgmt frame"); -+ -+ ret = RTW_QUEUE_MGMT; -+ DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_ucast); -+ } -+ -+ _exit_critical_bh(&psta->mgmt_sleep_q.lock, &irqL); -+ -+ return ret; -+} -+ -+static void dequeue_mgmt_xmitframe_to_sleepq(_adapter *padapter, struct sta_info *psta, _queue *pframequeue) -+{ -+ sint ret; -+ _list *plist, *phead; -+ struct tx_servq *ptxservq; -+ struct pkt_attrib *pattrib; -+ struct xmit_frame *pxmitframe; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct hw_xmit *phwxmits = pxmitpriv->hwxmits; -+ u8 mgmt_idx = pxmitpriv->hwxmit_entry - 1; -+ -+ phead = get_list_head(pframequeue); -+ plist = get_next(phead); -+ -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); -+ plist = get_next(plist); -+ -+ pattrib = &pxmitframe->attrib; -+ pattrib->triggered = 0; -+ -+ ret = mgmt_xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe); -+ -+ if (ret == RTW_QUEUE_MGMT) { -+ ptxservq = &(psta->sta_xmitpriv.mgmt_q); -+ ptxservq->qcnt--; -+ phwxmits[mgmt_idx].accnt--; -+ } else { -+ /* RTW_INFO("xmitframe_enqueue_for_sleeping_sta return _FALSE\n"); */ -+ } -+ } -+} -+#endif -+ -+sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ _irqL irqL; -+ sint ret = _FALSE; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct pkt_attrib *pattrib = &pxmitframe->attrib; -+ sint bmcst = IS_MCAST(pattrib->ra); -+ bool update_tim = _FALSE; -+#ifdef CONFIG_TDLS -+ -+ if (padapter->tdlsinfo.link_established == _TRUE) -+ ret = xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pxmitframe); -+#endif /* CONFIG_TDLS */ -+ -+ if (!MLME_IS_AP(padapter) && !MLME_IS_MESH(padapter)) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_fwstate); -+ return ret; -+ } -+ /* -+ if(pattrib->psta) -+ { -+ psta = pattrib->psta; -+ } -+ else -+ { -+ RTW_INFO("%s, call rtw_get_stainfo()\n", __func__); -+ psta=rtw_get_stainfo(pstapriv, pattrib->ra); -+ } -+ */ -+ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); -+ if (pattrib->psta != psta) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_sta); -+ RTW_INFO("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); -+ return _FALSE; -+ } -+ -+ if (psta == NULL) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_nosta); -+ RTW_INFO("%s, psta==NUL\n", __func__); -+ return _FALSE; -+ } -+ -+ if (!(psta->state & WIFI_ASOC_STATE)) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_link); -+ RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); -+ return _FALSE; -+ } -+ -+ if (pattrib->triggered == 1) { -+ DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_trigger); -+ /* RTW_INFO("directly xmit pspoll_triggered packet\n"); */ -+ -+ /* pattrib->triggered=0; */ -+ if (bmcst && xmitframe_hiq_filter(pxmitframe) == _TRUE) -+ pattrib->qsel = QSLT_HIGH;/* HIQ */ -+ -+ return ret; -+ } -+ -+ -+ if (bmcst) { -+ _enter_critical_bh(&psta->sleep_q.lock, &irqL); -+ -+ if (rtw_tim_map_anyone_be_set(padapter, pstapriv->sta_dz_bitmap)) { /* if anyone sta is in ps mode */ -+ /* pattrib->qsel = QSLT_HIGH; */ /* HIQ */ -+ -+ rtw_list_delete(&pxmitframe->list); -+ -+ /*_enter_critical_bh(&psta->sleep_q.lock, &irqL);*/ -+ -+ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->sleep_q)); -+ -+ psta->sleepq_len++; -+ -+ if (!(rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, 0))) -+ update_tim = _TRUE; -+ -+ rtw_tim_map_set(padapter, pstapriv->tim_bitmap, 0); -+ rtw_tim_map_set(padapter, pstapriv->sta_dz_bitmap, 0); -+ -+ /* RTW_INFO("enqueue, sq_len=%d\n", psta->sleepq_len); */ -+ /* RTW_INFO_DUMP("enqueue, tim=", pstapriv->tim_bitmap, pstapriv->aid_bmp_len); */ -+ if (update_tim == _TRUE) { -+ if (is_broadcast_mac_addr(pattrib->ra)) -+ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0, "buffer BC"); -+ else -+ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0, "buffer MC"); -+ } else -+ chk_bmc_sleepq_cmd(padapter); -+ -+ /*_exit_critical_bh(&psta->sleep_q.lock, &irqL);*/ -+ -+ ret = _TRUE; -+ -+ DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_mcast); -+ } -+ -+ _exit_critical_bh(&psta->sleep_q.lock, &irqL); -+ -+ return ret; -+ -+ } -+ -+ -+ _enter_critical_bh(&psta->sleep_q.lock, &irqL); -+ -+ if (psta->state & WIFI_SLEEP_STATE) { -+ u8 wmmps_ac = 0; -+ -+ if (rtw_tim_map_is_set(padapter, pstapriv->sta_dz_bitmap, psta->cmn.aid)) { -+ rtw_list_delete(&pxmitframe->list); -+ -+ /* _enter_critical_bh(&psta->sleep_q.lock, &irqL); */ -+ -+ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->sleep_q)); -+ -+ psta->sleepq_len++; -+ -+ switch (pattrib->priority) { -+ case 1: -+ case 2: -+ wmmps_ac = psta->uapsd_bk & BIT(0); -+ break; -+ case 4: -+ case 5: -+ wmmps_ac = psta->uapsd_vi & BIT(0); -+ break; -+ case 6: -+ case 7: -+ wmmps_ac = psta->uapsd_vo & BIT(0); -+ break; -+ case 0: -+ case 3: -+ default: -+ wmmps_ac = psta->uapsd_be & BIT(0); -+ break; -+ } -+ -+ if (wmmps_ac) -+ psta->sleepq_ac_len++; -+ -+ if (((psta->has_legacy_ac) && (!wmmps_ac)) || ((!psta->has_legacy_ac) && (wmmps_ac))) { -+ if (!(rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, psta->cmn.aid))) -+ update_tim = _TRUE; -+ -+ rtw_tim_map_set(padapter, pstapriv->tim_bitmap, psta->cmn.aid); -+ -+ /* RTW_INFO("enqueue, sq_len=%d\n", psta->sleepq_len); */ -+ /* RTW_INFO_DUMP("enqueue, tim=", pstapriv->tim_bitmap, pstapriv->aid_bmp_len); */ -+ -+ if (update_tim == _TRUE) { -+ /* RTW_INFO("sleepq_len==1, update BCNTIM\n"); */ -+ /* upate BCN for TIM IE */ -+ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0, "buffer UC"); -+ } -+ } -+ -+ /* _exit_critical_bh(&psta->sleep_q.lock, &irqL); */ -+ -+ /* if(psta->sleepq_len > (NR_XMITFRAME>>3)) */ -+ /* { */ -+ /* wakeup_sta_to_xmit(padapter, psta); */ -+ /* } */ -+ -+ ret = _TRUE; -+ -+ DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_ucast); -+ } -+ -+ } -+ -+ _exit_critical_bh(&psta->sleep_q.lock, &irqL); -+ -+ return ret; -+ -+} -+ -+static void dequeue_xmitframes_to_sleeping_queue(_adapter *padapter, struct sta_info *psta, _queue *pframequeue) -+{ -+ sint ret; -+ _list *plist, *phead; -+ u8 ac_index; -+ struct tx_servq *ptxservq; -+ struct pkt_attrib *pattrib; -+ struct xmit_frame *pxmitframe; -+ struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; -+ -+ phead = get_list_head(pframequeue); -+ plist = get_next(phead); -+ -+ while (rtw_end_of_queue_search(phead, plist) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); -+ -+ plist = get_next(plist); -+ -+ pattrib = &pxmitframe->attrib; -+ -+ pattrib->triggered = 0; -+ -+ ret = xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe); -+ -+ if (_TRUE == ret) { -+ ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index)); -+ -+ ptxservq->qcnt--; -+ phwxmits[ac_index].accnt--; -+ } else { -+ /* RTW_INFO("xmitframe_enqueue_for_sleeping_sta return _FALSE\n"); */ -+ } -+ -+ } -+ -+} -+ -+void stop_sta_xmit(_adapter *padapter, struct sta_info *psta) -+{ -+ _irqL irqL0; -+ struct sta_info *psta_bmc; -+ struct sta_xmit_priv *pstaxmitpriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ pstaxmitpriv = &psta->sta_xmitpriv; -+ -+ /* for BC/MC Frames */ -+ psta_bmc = rtw_get_bcmc_stainfo(padapter); -+ if (!psta_bmc) -+ rtw_warn_on(1); -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL0); -+ -+ psta->state |= WIFI_SLEEP_STATE; -+ -+#ifdef CONFIG_TDLS -+ if (!(psta->tdls_sta_state & TDLS_LINKED_STATE)) -+#endif /* CONFIG_TDLS */ -+ rtw_tim_map_set(padapter, pstapriv->sta_dz_bitmap, psta->cmn.aid); -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ dequeue_mgmt_xmitframe_to_sleepq(padapter, psta, &pstaxmitpriv->mgmt_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->mgmt_q.tx_pending)); -+#endif -+ -+ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vo_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending)); -+ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vi_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending)); -+ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->be_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); -+ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->bk_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending)); -+ -+ if (psta_bmc != NULL -+ #ifdef CONFIG_TDLS -+ && !(psta->tdls_sta_state & TDLS_LINKED_STATE) -+ #endif -+ ) -+ { -+ /* for BC/MC Frames */ -+ pstaxmitpriv = &psta_bmc->sta_xmitpriv; -+ dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->vo_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending)); -+ dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->vi_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending)); -+ dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->be_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); -+ dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->bk_q.sta_pending); -+ rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending)); -+ } -+ _exit_critical_bh(&pxmitpriv->lock, &irqL0); -+ -+ -+} -+ -+void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta) -+{ -+ _irqL irqL; -+ u8 update_mask = 0, wmmps_ac = 0; -+ struct sta_info *psta_bmc; -+ _list *xmitframe_plist, *xmitframe_phead; -+ struct xmit_frame *pxmitframe = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ psta_bmc = rtw_get_bcmc_stainfo(padapter); -+ -+ -+ /* _enter_critical_bh(&psta->sleep_q.lock, &irqL); */ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ /* management queue */ -+ xmitframe_phead = get_list_head(&psta->mgmt_sleep_q); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ -+ xmitframe_plist = get_next(xmitframe_plist); -+ -+ rtw_list_delete(&pxmitframe->list); -+ -+ #ifdef DBG_MGMT_QUEUE -+ RTW_INFO("%s seq_num = %u, subtype = 0x%x\n", -+ __func__, pxmitframe->attrib.seqnum, pxmitframe->attrib.subtype); -+ #endif -+ -+ psta->mgmt_sleepq_len--; -+ -+ pxmitframe->attrib.triggered = 1; -+ -+ rtw_hal_mgmt_xmitframe_enqueue(padapter, pxmitframe); -+ } -+#endif /* CONFIG_RTW_MGMT_QUEUE */ -+ -+ /* AC queue */ -+ xmitframe_phead = get_list_head(&psta->sleep_q); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ -+ xmitframe_plist = get_next(xmitframe_plist); -+ -+ rtw_list_delete(&pxmitframe->list); -+ -+ switch (pxmitframe->attrib.priority) { -+ case 1: -+ case 2: -+ wmmps_ac = psta->uapsd_bk & BIT(1); -+ break; -+ case 4: -+ case 5: -+ wmmps_ac = psta->uapsd_vi & BIT(1); -+ break; -+ case 6: -+ case 7: -+ wmmps_ac = psta->uapsd_vo & BIT(1); -+ break; -+ case 0: -+ case 3: -+ default: -+ wmmps_ac = psta->uapsd_be & BIT(1); -+ break; -+ } -+ -+ psta->sleepq_len--; -+ if (psta->sleepq_len > 0) -+ pxmitframe->attrib.mdata = 1; -+ else -+ pxmitframe->attrib.mdata = 0; -+ -+ if (wmmps_ac) { -+ psta->sleepq_ac_len--; -+ if (psta->sleepq_ac_len > 0) { -+ pxmitframe->attrib.mdata = 1; -+ pxmitframe->attrib.eosp = 0; -+ } else { -+ pxmitframe->attrib.mdata = 0; -+ pxmitframe->attrib.eosp = 1; -+ } -+ } -+ -+ pxmitframe->attrib.triggered = 1; -+ -+ /* -+ _exit_critical_bh(&psta->sleep_q.lock, &irqL); -+ if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) -+ { -+ rtw_os_xmit_complete(padapter, pxmitframe); -+ } -+ _enter_critical_bh(&psta->sleep_q.lock, &irqL); -+ */ -+ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); -+ -+ -+ } -+ -+ if (psta->sleepq_len == 0 -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ && psta->mgmt_sleepq_len == 0 -+#endif -+ ) { -+#ifdef CONFIG_TDLS -+ if (psta->tdls_sta_state & TDLS_LINKED_STATE) { -+ if (psta->state & WIFI_SLEEP_STATE) -+ psta->state ^= WIFI_SLEEP_STATE; -+ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ return; -+ } -+#endif /* CONFIG_TDLS */ -+ -+ if (rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, psta->cmn.aid)) { -+ /* RTW_INFO("wakeup to xmit, qlen==0\n"); */ -+ /* RTW_INFO_DUMP("update_BCNTIM, tim=", pstapriv->tim_bitmap, pstapriv->aid_bmp_len); */ -+ /* upate BCN for TIM IE */ -+ /* update_BCNTIM(padapter); */ -+ update_mask = BIT(0); -+ } -+ -+ rtw_tim_map_clear(padapter, pstapriv->tim_bitmap, psta->cmn.aid); -+ -+ if (psta->state & WIFI_SLEEP_STATE) -+ psta->state ^= WIFI_SLEEP_STATE; -+ -+ if (psta->state & WIFI_STA_ALIVE_CHK_STATE) { -+ RTW_INFO("%s alive check\n", __func__); -+ psta->expire_to = pstapriv->expire_to; -+ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; -+ } -+ -+ rtw_tim_map_clear(padapter, pstapriv->sta_dz_bitmap, psta->cmn.aid); -+ } -+ -+ /* for BC/MC Frames */ -+ if (!psta_bmc) -+ goto _exit; -+ -+ if (!(rtw_tim_map_anyone_be_set_exclude_aid0(padapter, pstapriv->sta_dz_bitmap))) { /* no any sta in ps mode */ -+ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ -+ xmitframe_plist = get_next(xmitframe_plist); -+ -+ rtw_list_delete(&pxmitframe->list); -+ -+ psta_bmc->sleepq_len--; -+ if (psta_bmc->sleepq_len > 0) -+ pxmitframe->attrib.mdata = 1; -+ else -+ pxmitframe->attrib.mdata = 0; -+ -+ -+ pxmitframe->attrib.triggered = 1; -+ /* -+ _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); -+ if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) -+ { -+ rtw_os_xmit_complete(padapter, pxmitframe); -+ } -+ _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); -+ -+ */ -+ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); -+ -+ } -+ -+ if (psta_bmc->sleepq_len == 0) { -+ if (rtw_tim_map_is_set(padapter, pstapriv->tim_bitmap, 0)) { -+ /* RTW_INFO("wakeup to xmit, qlen==0\n"); */ -+ /* RTW_INFO_DUMP("update_BCNTIM, tim=", pstapriv->tim_bitmap, pstapriv->aid_bmp_len); */ -+ /* upate BCN for TIM IE */ -+ /* update_BCNTIM(padapter); */ -+ update_mask |= BIT(1); -+ } -+ rtw_tim_map_clear(padapter, pstapriv->tim_bitmap, 0); -+ rtw_tim_map_clear(padapter, pstapriv->sta_dz_bitmap, 0); -+ } -+ -+ } -+ -+_exit: -+ -+ /* _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); */ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ if (update_mask) { -+ /* update_BCNTIM(padapter); */ -+ if ((update_mask & (BIT(0) | BIT(1))) == (BIT(0) | BIT(1))) -+ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0, "clear UC&BMC"); -+ else if ((update_mask & BIT(1)) == BIT(1)) -+ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0, "clear BMC"); -+ else -+ _update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0, "clear UC"); -+ } -+} -+ -+void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta) -+{ -+ _irqL irqL; -+ u8 wmmps_ac = 0; -+ _list *xmitframe_plist, *xmitframe_phead; -+ struct xmit_frame *pxmitframe = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ -+ /* _enter_critical_bh(&psta->sleep_q.lock, &irqL); */ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ xmitframe_phead = get_list_head(&psta->sleep_q); -+ xmitframe_plist = get_next(xmitframe_phead); -+ -+ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) { -+ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); -+ -+ xmitframe_plist = get_next(xmitframe_plist); -+ -+ switch (pxmitframe->attrib.priority) { -+ case 1: -+ case 2: -+ wmmps_ac = psta->uapsd_bk & BIT(1); -+ break; -+ case 4: -+ case 5: -+ wmmps_ac = psta->uapsd_vi & BIT(1); -+ break; -+ case 6: -+ case 7: -+ wmmps_ac = psta->uapsd_vo & BIT(1); -+ break; -+ case 0: -+ case 3: -+ default: -+ wmmps_ac = psta->uapsd_be & BIT(1); -+ break; -+ } -+ -+ if (!wmmps_ac) -+ continue; -+ -+ rtw_list_delete(&pxmitframe->list); -+ -+ psta->sleepq_len--; -+ psta->sleepq_ac_len--; -+ -+ if (psta->sleepq_ac_len > 0) { -+ pxmitframe->attrib.mdata = 1; -+ pxmitframe->attrib.eosp = 0; -+ } else { -+ pxmitframe->attrib.mdata = 0; -+ pxmitframe->attrib.eosp = 1; -+ } -+ -+ pxmitframe->attrib.triggered = 1; -+ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); -+ -+ if ((psta->sleepq_ac_len == 0) && (!psta->has_legacy_ac) && (wmmps_ac)) { -+#ifdef CONFIG_TDLS -+ if (psta->tdls_sta_state & TDLS_LINKED_STATE) { -+ /* _exit_critical_bh(&psta->sleep_q.lock, &irqL); */ -+ goto exit; -+ } -+#endif /* CONFIG_TDLS */ -+ rtw_tim_map_clear(padapter, pstapriv->tim_bitmap, psta->cmn.aid); -+ -+ /* RTW_INFO("wakeup to xmit, qlen==0\n"); */ -+ /* RTW_INFO_DUMP("update_BCNTIM, tim=", pstapriv->tim_bitmap, pstapriv->aid_bmp_len); */ -+ /* upate BCN for TIM IE */ -+ /* update_BCNTIM(padapter); */ -+ update_beacon(padapter, _TIM_IE_, NULL, _TRUE, 0); -+ /* update_mask = BIT(0); */ -+ } -+ -+ } -+ -+#ifdef CONFIG_TDLS -+exit: -+#endif -+ /* _exit_critical_bh(&psta->sleep_q.lock, &irqL); */ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ return; -+} -+ -+#endif /* defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) */ -+ -+#ifdef CONFIG_XMIT_THREAD_MODE -+void enqueue_pending_xmitbuf( -+ struct xmit_priv *pxmitpriv, -+ struct xmit_buf *pxmitbuf) -+{ -+ _irqL irql; -+ _queue *pqueue; -+ _adapter *pri_adapter = pxmitpriv->adapter; -+ -+ pqueue = &pxmitpriv->pending_xmitbuf_queue; -+ -+ _enter_critical_bh(&pqueue->lock, &irql); -+ rtw_list_delete(&pxmitbuf->list); -+ rtw_list_insert_tail(&pxmitbuf->list, get_list_head(pqueue)); -+ _exit_critical_bh(&pqueue->lock, &irql); -+ -+#if defined(CONFIG_SDIO_HCI) && defined(CONFIG_CONCURRENT_MODE) -+ pri_adapter = GET_PRIMARY_ADAPTER(pri_adapter); -+#endif /*SDIO_HCI + CONCURRENT*/ -+ _rtw_up_sema(&(pri_adapter->xmitpriv.xmit_sema)); -+} -+ -+void enqueue_pending_xmitbuf_to_head( -+ struct xmit_priv *pxmitpriv, -+ struct xmit_buf *pxmitbuf) -+{ -+ _irqL irql; -+ _queue *pqueue = &pxmitpriv->pending_xmitbuf_queue; -+ -+ _enter_critical_bh(&pqueue->lock, &irql); -+ rtw_list_delete(&pxmitbuf->list); -+ rtw_list_insert_head(&pxmitbuf->list, get_list_head(pqueue)); -+ _exit_critical_bh(&pqueue->lock, &irql); -+} -+ -+struct xmit_buf *dequeue_pending_xmitbuf( -+ struct xmit_priv *pxmitpriv) -+{ -+ _irqL irql; -+ struct xmit_buf *pxmitbuf; -+ _queue *pqueue; -+ -+ -+ pxmitbuf = NULL; -+ pqueue = &pxmitpriv->pending_xmitbuf_queue; -+ -+ _enter_critical_bh(&pqueue->lock, &irql); -+ -+ if (_rtw_queue_empty(pqueue) == _FALSE) { -+ _list *plist, *phead; -+ -+ phead = get_list_head(pqueue); -+ plist = get_next(phead); -+ pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); -+ rtw_list_delete(&pxmitbuf->list); -+ } -+ -+ _exit_critical_bh(&pqueue->lock, &irql); -+ -+ return pxmitbuf; -+} -+ -+static struct xmit_buf *dequeue_pending_xmitbuf_ext( -+ struct xmit_priv *pxmitpriv) -+{ -+ _irqL irql; -+ struct xmit_buf *pxmitbuf; -+ _queue *pqueue; -+ -+ pxmitbuf = NULL; -+ pqueue = &pxmitpriv->pending_xmitbuf_queue; -+ -+ _enter_critical_bh(&pqueue->lock, &irql); -+ -+ if (_rtw_queue_empty(pqueue) == _FALSE) { -+ _list *plist, *phead; -+ -+ phead = get_list_head(pqueue); -+ plist = phead; -+ do { -+ plist = get_next(plist); -+ if (plist == phead) -+ break; -+ -+ pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); -+ -+ if (pxmitbuf->buf_tag == XMITBUF_MGNT) { -+ rtw_list_delete(&pxmitbuf->list); -+ break; -+ } -+ pxmitbuf = NULL; -+ } while (1); -+ } -+ -+ _exit_critical_bh(&pqueue->lock, &irql); -+ -+ return pxmitbuf; -+} -+ -+struct xmit_buf *select_and_dequeue_pending_xmitbuf(_adapter *padapter) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct xmit_buf *pxmitbuf = NULL; -+ -+ if (_TRUE == rtw_is_xmit_blocked(padapter)) -+ return pxmitbuf; -+ -+ pxmitbuf = dequeue_pending_xmitbuf_ext(pxmitpriv); -+ if (pxmitbuf == NULL && rtw_xmit_ac_blocked(padapter) != _TRUE) -+ pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); -+ -+ return pxmitbuf; -+} -+ -+sint check_pending_xmitbuf( -+ struct xmit_priv *pxmitpriv) -+{ -+ _irqL irql; -+ _queue *pqueue; -+ sint ret = _FALSE; -+ -+ pqueue = &pxmitpriv->pending_xmitbuf_queue; -+ -+ _enter_critical_bh(&pqueue->lock, &irql); -+ -+ if (_rtw_queue_empty(pqueue) == _FALSE) -+ ret = _TRUE; -+ -+ _exit_critical_bh(&pqueue->lock, &irql); -+ -+ return ret; -+} -+ -+thread_return rtw_xmit_thread(thread_context context) -+{ -+ s32 err; -+ PADAPTER padapter; -+#ifdef RTW_XMIT_THREAD_HIGH_PRIORITY -+#ifdef PLATFORM_LINUX -+ struct sched_param param = { .sched_priority = 1 }; -+ -+ sched_setscheduler(current, SCHED_FIFO, ¶m); -+#endif /* PLATFORM_LINUX */ -+#endif /* RTW_XMIT_THREAD_HIGH_PRIORITY */ -+ -+ err = _SUCCESS; -+ padapter = (PADAPTER)context; -+ -+ thread_enter("RTW_XMIT_THREAD"); -+ -+ do { -+ err = rtw_hal_xmit_thread_handler(padapter); -+ flush_signals_thread(); -+ } while (_SUCCESS == err); -+ -+ RTW_INFO(FUNC_ADPT_FMT " Exit\n", FUNC_ADPT_ARG(padapter)); -+ -+ rtw_thread_wait_stop(); -+ -+ return 0; -+} -+#endif -+ -+#ifdef DBG_XMIT_BLOCK -+void dump_xmit_block(void *sel, _adapter *padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ RTW_PRINT_SEL(sel, "[XMIT-BLOCK] xmit_block :0x%02x\n", dvobj->xmit_block); -+ if (dvobj->xmit_block & XMIT_BLOCK_REDLMEM) -+ RTW_PRINT_SEL(sel, "Reason:%s\n", "XMIT_BLOCK_REDLMEM"); -+ if (dvobj->xmit_block & XMIT_BLOCK_SUSPEND) -+ RTW_PRINT_SEL(sel, "Reason:%s\n", "XMIT_BLOCK_SUSPEND"); -+ if (dvobj->xmit_block == XMIT_BLOCK_NONE) -+ RTW_PRINT_SEL(sel, "Reason:%s\n", "XMIT_BLOCK_NONE"); -+} -+void dump_xmit_block_info(void *sel, const char *fun_name, _adapter *padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ RTW_INFO("\n"ADPT_FMT" call %s\n", ADPT_ARG(padapter), fun_name); -+ dump_xmit_block(sel, padapter); -+} -+#define DBG_XMIT_BLOCK_DUMP(adapter) dump_xmit_block_info(RTW_DBGDUMP, __func__, adapter) -+#endif -+ -+void rtw_set_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason) -+{ -+ _irqL irqL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ _enter_critical_bh(&dvobj->xmit_block_lock, &irqL); -+ dvobj->xmit_block |= reason; -+ _exit_critical_bh(&dvobj->xmit_block_lock, &irqL); -+ -+ #ifdef DBG_XMIT_BLOCK -+ DBG_XMIT_BLOCK_DUMP(padapter); -+ #endif -+} -+ -+void rtw_clr_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason) -+{ -+ _irqL irqL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ _enter_critical_bh(&dvobj->xmit_block_lock, &irqL); -+ dvobj->xmit_block &= ~reason; -+ _exit_critical_bh(&dvobj->xmit_block_lock, &irqL); -+ -+ #ifdef DBG_XMIT_BLOCK -+ DBG_XMIT_BLOCK_DUMP(padapter); -+ #endif -+} -+bool rtw_is_xmit_blocked(_adapter *padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ #ifdef DBG_XMIT_BLOCK -+ DBG_XMIT_BLOCK_DUMP(padapter); -+ #endif -+ return ((dvobj->xmit_block) ? _TRUE : _FALSE); -+} -+ -+bool rtw_xmit_ac_blocked(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ _adapter *iface; -+ struct mlme_ext_priv *mlmeext; -+ bool blocked = _FALSE; -+ int i; -+#ifdef DBG_CONFIG_ERROR_DETECT -+#ifdef DBG_CONFIG_ERROR_RESET -+#ifdef CONFIG_USB_HCI -+ if (rtw_hal_sreset_inprogress(adapter) == _TRUE) { -+ blocked = _TRUE; -+ goto exit; -+ } -+#endif/* #ifdef CONFIG_USB_HCI */ -+#endif/* #ifdef DBG_CONFIG_ERROR_RESET */ -+#endif/* #ifdef DBG_CONFIG_ERROR_DETECT */ -+ -+ if (rfctl->offch_state != OFFCHS_NONE -+ #if CONFIG_DFS -+ || IS_RADAR_DETECTED(rfctl) || rfctl->csa_ch -+ #endif -+ ) { -+ blocked = _TRUE; -+ goto exit; -+ } -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ mlmeext = &iface->mlmeextpriv; -+ -+ /* check scan state */ -+ if (mlmeext_scan_state(mlmeext) != SCAN_DISABLE -+ && mlmeext_scan_state(mlmeext) != SCAN_BACK_OP -+ ) { -+ blocked = _TRUE; -+ goto exit; -+ } -+ -+ if (mlmeext_scan_state(mlmeext) == SCAN_BACK_OP -+ && !mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_TX_RESUME) -+ ) { -+ blocked = _TRUE; -+ goto exit; -+ } -+ } -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(adapter)) { -+ if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { -+ if (MCC_STOP(adapter)) { -+ blocked = _TRUE; -+ goto exit; -+ } -+ } -+ } -+#endif /* CONFIG_MCC_MODE */ -+ -+exit: -+ return blocked; -+} -+ -+#ifdef CONFIG_TX_AMSDU -+void rtw_amsdu_vo_timeout_handler(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *)FunctionContext; -+ -+ adapter->xmitpriv.amsdu_vo_timeout = RTW_AMSDU_TIMER_TIMEOUT; -+ -+ tasklet_hi_schedule(&adapter->xmitpriv.xmit_tasklet); -+} -+ -+void rtw_amsdu_vi_timeout_handler(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *)FunctionContext; -+ -+ adapter->xmitpriv.amsdu_vi_timeout = RTW_AMSDU_TIMER_TIMEOUT; -+ -+ tasklet_hi_schedule(&adapter->xmitpriv.xmit_tasklet); -+} -+ -+void rtw_amsdu_be_timeout_handler(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *)FunctionContext; -+ -+ adapter->xmitpriv.amsdu_be_timeout = RTW_AMSDU_TIMER_TIMEOUT; -+ -+ if (printk_ratelimit()) -+ RTW_INFO("%s Timeout!\n",__FUNCTION__); -+ -+ tasklet_hi_schedule(&adapter->xmitpriv.xmit_tasklet); -+} -+ -+void rtw_amsdu_bk_timeout_handler(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *)FunctionContext; -+ -+ adapter->xmitpriv.amsdu_bk_timeout = RTW_AMSDU_TIMER_TIMEOUT; -+ -+ tasklet_hi_schedule(&adapter->xmitpriv.xmit_tasklet); -+} -+ -+u8 rtw_amsdu_get_timer_status(_adapter *padapter, u8 priority) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ u8 status = RTW_AMSDU_TIMER_UNSET; -+ -+ switch(priority) -+ { -+ case 1: -+ case 2: -+ status = pxmitpriv->amsdu_bk_timeout; -+ break; -+ case 4: -+ case 5: -+ status = pxmitpriv->amsdu_vi_timeout; -+ break; -+ case 6: -+ case 7: -+ status = pxmitpriv->amsdu_vo_timeout; -+ break; -+ case 0: -+ case 3: -+ default: -+ status = pxmitpriv->amsdu_be_timeout; -+ break; -+ } -+ return status; -+} -+ -+void rtw_amsdu_set_timer_status(_adapter *padapter, u8 priority, u8 status) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ switch(priority) -+ { -+ case 1: -+ case 2: -+ pxmitpriv->amsdu_bk_timeout = status; -+ break; -+ case 4: -+ case 5: -+ pxmitpriv->amsdu_vi_timeout = status; -+ break; -+ case 6: -+ case 7: -+ pxmitpriv->amsdu_vo_timeout = status; -+ break; -+ case 0: -+ case 3: -+ default: -+ pxmitpriv->amsdu_be_timeout = status; -+ break; -+ } -+} -+ -+void rtw_amsdu_set_timer(_adapter *padapter, u8 priority) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ _timer* amsdu_timer = NULL; -+ -+ switch(priority) -+ { -+ case 1: -+ case 2: -+ amsdu_timer = &pxmitpriv->amsdu_bk_timer; -+ break; -+ case 4: -+ case 5: -+ amsdu_timer = &pxmitpriv->amsdu_vi_timer; -+ break; -+ case 6: -+ case 7: -+ amsdu_timer = &pxmitpriv->amsdu_vo_timer; -+ break; -+ case 0: -+ case 3: -+ default: -+ amsdu_timer = &pxmitpriv->amsdu_be_timer; -+ break; -+ } -+ _set_timer(amsdu_timer, 1); -+} -+ -+void rtw_amsdu_cancel_timer(_adapter *padapter, u8 priority) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ _timer* amsdu_timer = NULL; -+ -+ switch(priority) -+ { -+ case 1: -+ case 2: -+ amsdu_timer = &pxmitpriv->amsdu_bk_timer; -+ break; -+ case 4: -+ case 5: -+ amsdu_timer = &pxmitpriv->amsdu_vi_timer; -+ break; -+ case 6: -+ case 7: -+ amsdu_timer = &pxmitpriv->amsdu_vo_timer; -+ break; -+ case 0: -+ case 3: -+ default: -+ amsdu_timer = &pxmitpriv->amsdu_be_timer; -+ break; -+ } -+ _cancel_timer_ex(amsdu_timer); -+} -+#endif /* CONFIG_TX_AMSDU */ -+ -+#ifdef DBG_TXBD_DESC_DUMP -+static struct rtw_tx_desc_backup tx_backup[HW_QUEUE_ENTRY][TX_BAK_FRMAE_CNT]; -+static u8 backup_idx[HW_QUEUE_ENTRY]; -+ -+void rtw_tx_desc_backup(_adapter *padapter, struct xmit_frame *pxmitframe, u8 desc_size, u8 hwq) -+{ -+ u32 tmp32; -+ u8 *pxmit_buf; -+ -+ if (rtw_get_hw_init_completed(padapter) == _FALSE) -+ return; -+ -+ pxmit_buf = pxmitframe->pxmitbuf->pbuf; -+ -+ _rtw_memcpy(tx_backup[hwq][backup_idx[hwq]].tx_bak_desc, pxmit_buf, desc_size); -+ _rtw_memcpy(tx_backup[hwq][backup_idx[hwq]].tx_bak_data_hdr, pxmit_buf+desc_size, TX_BAK_DATA_LEN); -+ -+ tmp32 = rtw_read32(padapter, get_txbd_rw_reg(hwq)); -+ -+ tx_backup[hwq][backup_idx[hwq]].tx_bak_rp = (tmp32>>16)&0xfff; -+ tx_backup[hwq][backup_idx[hwq]].tx_bak_wp = tmp32&0xfff; -+ -+ tx_backup[hwq][backup_idx[hwq]].tx_desc_size = desc_size; -+ -+ backup_idx[hwq] = (backup_idx[hwq] + 1) % TX_BAK_FRMAE_CNT; -+} -+ -+void rtw_tx_desc_backup_reset(void) -+{ -+ int i, j; -+ -+ for (i = 0; i < HW_QUEUE_ENTRY; i++) { -+ for (j = 0; j < TX_BAK_FRMAE_CNT; j++) -+ _rtw_memset(&tx_backup[i][j], 0, sizeof(struct rtw_tx_desc_backup)); -+ -+ backup_idx[i] = 0; -+ } -+} -+ -+u8 rtw_get_tx_desc_backup(_adapter *padapter, u8 hwq, struct rtw_tx_desc_backup **pbak) -+{ -+ *pbak = &tx_backup[hwq][0]; -+ -+ return backup_idx[hwq]; -+} -+#endif -+ -+#ifdef CONFIG_PCI_TX_POLLING -+void rtw_tx_poll_init(_adapter *padapter) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ _timer* timer = &pxmitpriv->tx_poll_timer; -+ -+ if (!is_primary_adapter(padapter)) -+ return; -+ -+ if (timer->function != NULL) { -+ RTW_INFO("tx polling timer has been init.\n"); -+ return; -+ } -+ -+ rtw_init_timer(timer, padapter, rtw_tx_poll_timeout_handler, padapter); -+ rtw_tx_poll_timer_set(padapter, 1); -+ RTW_INFO("Tx poll timer init!\n"); -+} -+ -+void rtw_tx_poll_timeout_handler(void *FunctionContext) -+{ -+ _adapter *adapter = (_adapter *)FunctionContext; -+ -+ rtw_tx_poll_timer_set(adapter, 1); -+ -+ if (adapter->hal_func.tx_poll_handler) -+ adapter->hal_func.tx_poll_handler(adapter); -+ else -+ RTW_WARN("hal ops: tx_poll_handler is NULL\n"); -+} -+ -+void rtw_tx_poll_timer_set(_adapter *padapter, u32 delay) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ _timer* timer = NULL; -+ -+ timer = &pxmitpriv->tx_poll_timer; -+ _set_timer(timer, delay); -+} -+ -+void rtw_tx_poll_timer_cancel(_adapter *padapter) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ _timer* timer = NULL; -+ -+ if (!is_primary_adapter(padapter)) -+ return; -+ -+ timer = &pxmitpriv->tx_poll_timer; -+ _cancel_timer_ex(timer); -+ timer->function = NULL; -+ RTW_INFO("Tx poll timer cancel !\n"); -+} -+#endif /* CONFIG_PCI_TX_POLLING */ -+ -+void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms) -+{ -+ sctx->timeout_ms = timeout_ms; -+ sctx->submit_time = rtw_get_current_time(); -+#ifdef PLATFORM_LINUX /* TODO: add condition wating interface for other os */ -+ init_completion(&sctx->done); -+#endif -+ sctx->status = RTW_SCTX_SUBMITTED; -+} -+ -+int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg) -+{ -+ int ret = _FAIL; -+ unsigned long expire; -+ int status = 0; -+ -+#ifdef PLATFORM_LINUX -+ expire = sctx->timeout_ms ? msecs_to_jiffies(sctx->timeout_ms) : MAX_SCHEDULE_TIMEOUT; -+ if (!wait_for_completion_timeout(&sctx->done, expire)) { -+ /* timeout, do something?? */ -+ status = RTW_SCTX_DONE_TIMEOUT; -+ RTW_INFO("%s timeout: %s\n", __func__, msg); -+ } else -+ status = sctx->status; -+#endif -+ -+ if (status == RTW_SCTX_DONE_SUCCESS) -+ ret = _SUCCESS; -+ -+ return ret; -+} -+ -+bool rtw_sctx_chk_waring_status(int status) -+{ -+ switch (status) { -+ case RTW_SCTX_DONE_UNKNOWN: -+ case RTW_SCTX_DONE_BUF_ALLOC: -+ case RTW_SCTX_DONE_BUF_FREE: -+ -+ case RTW_SCTX_DONE_DRV_STOP: -+ case RTW_SCTX_DONE_DEV_REMOVE: -+ return _TRUE; -+ default: -+ return _FALSE; -+ } -+} -+ -+void rtw_sctx_done_err(struct submit_ctx **sctx, int status) -+{ -+ if (*sctx) { -+ if (rtw_sctx_chk_waring_status(status)) -+ RTW_INFO("%s status:%d\n", __func__, status); -+ (*sctx)->status = status; -+#ifdef PLATFORM_LINUX -+ complete(&((*sctx)->done)); -+#endif -+ *sctx = NULL; -+ } -+} -+ -+void rtw_sctx_done(struct submit_ctx **sctx) -+{ -+ rtw_sctx_done_err(sctx, RTW_SCTX_DONE_SUCCESS); -+} -+ -+#ifdef CONFIG_XMIT_ACK -+int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms) -+{ -+ struct submit_ctx *pack_tx_ops = &pxmitpriv->ack_tx_ops; -+ -+ pack_tx_ops->submit_time = rtw_get_current_time(); -+ pack_tx_ops->timeout_ms = timeout_ms; -+ pack_tx_ops->status = RTW_SCTX_SUBMITTED; -+ -+ return rtw_sctx_wait(pack_tx_ops, __func__); -+} -+ -+void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status) -+{ -+ struct submit_ctx *pack_tx_ops = &pxmitpriv->ack_tx_ops; -+ -+ if (pxmitpriv->ack_tx) -+ rtw_sctx_done_err(&pack_tx_ops, status); -+ else -+ RTW_INFO("%s ack_tx not set\n", __func__); -+} -+#endif /* CONFIG_XMIT_ACK */ -diff --git a/drivers/staging/rtl8723cs/core/wds/rtw_wds.c b/drivers/staging/rtl8723cs/core/wds/rtw_wds.c -new file mode 100644 -index 000000000000..fd88b1c4fdcf ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/wds/rtw_wds.c -@@ -0,0 +1,786 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_WDS_C_ -+ -+#include -+ -+#if defined(CONFIG_RTW_WDS) -+#include -+ -+#if defined(CONFIG_AP_MODE) -+ -+#ifdef PLATFORM_LINUX -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+static void rtw_wpath_free_rcu(struct rtw_wds_path *wpath) -+{ -+ kfree_rcu(wpath, rcu); -+ rtw_mstat_update(MSTAT_TYPE_PHY, MSTAT_FREE, sizeof(struct rtw_wds_path)); -+} -+#else -+static void rtw_wpath_free_rcu_callback(rtw_rcu_head *head) -+{ -+ struct rtw_wds_path *wpath; -+ -+ wpath = container_of(head, struct rtw_wds_path, rcu); -+ rtw_mfree(wpath, sizeof(struct rtw_wds_path)); -+} -+ -+static void rtw_wpath_free_rcu(struct rtw_wds_path *wpath) -+{ -+ call_rcu(&wpath->rcu, rtw_wpath_free_rcu_callback); -+} -+#endif -+#endif /* PLATFORM_LINUX */ -+ -+static void rtw_wds_path_free_rcu(struct rtw_wds_table *tbl, struct rtw_wds_path *wpath); -+ -+static u32 rtw_wds_table_hash(const void *addr, u32 len, u32 seed) -+{ -+ /* Use last four bytes of hw addr as hash index */ -+ return jhash_1word(*(u32 *)(addr+2), seed); -+} -+ -+static const rtw_rhashtable_params rtw_wds_rht_params = { -+ .nelem_hint = 2, -+ .automatic_shrinking = true, -+ .key_len = ETH_ALEN, -+ .key_offset = offsetof(struct rtw_wds_path, dst), -+ .head_offset = offsetof(struct rtw_wds_path, rhash), -+ .hashfn = rtw_wds_table_hash, -+}; -+ -+static void rtw_wds_path_rht_free(void *ptr, void *tblptr) -+{ -+ struct rtw_wds_path *wpath = ptr; -+ struct rtw_wds_table *tbl = tblptr; -+ -+ rtw_wds_path_free_rcu(tbl, wpath); -+} -+ -+static struct rtw_wds_table *rtw_wds_table_alloc(void) -+{ -+ struct rtw_wds_table *newtbl; -+ -+ newtbl = rtw_malloc(sizeof(struct rtw_wds_table)); -+ if (!newtbl) -+ return NULL; -+ -+ return newtbl; -+} -+ -+static void rtw_wds_table_free(struct rtw_wds_table *tbl) -+{ -+ rtw_rhashtable_free_and_destroy(&tbl->rhead, -+ rtw_wds_path_rht_free, tbl); -+ rtw_mfree(tbl, sizeof(struct rtw_wds_table)); -+} -+ -+void rtw_wds_path_assign_nexthop(struct rtw_wds_path *wpath, struct sta_info *sta) -+{ -+ rtw_rcu_assign_pointer(wpath->next_hop, sta); -+} -+ -+static struct rtw_wds_path *rtw_wpath_lookup(struct rtw_wds_table *tbl, const u8 *dst) -+{ -+ struct rtw_wds_path *wpath; -+ -+ if (!tbl) -+ return NULL; -+ -+ wpath = rtw_rhashtable_lookup_fast(&tbl->rhead, dst, rtw_wds_rht_params); -+ -+ return wpath; -+} -+ -+struct rtw_wds_path *rtw_wds_path_lookup(_adapter *adapter, const u8 *dst) -+{ -+ return rtw_wpath_lookup(adapter->wds_paths, dst); -+} -+ -+static struct rtw_wds_path * -+__rtw_wds_path_lookup_by_idx(struct rtw_wds_table *tbl, int idx) -+{ -+ int i = 0, ret; -+ struct rtw_wds_path *wpath = NULL; -+ rtw_rhashtable_iter iter; -+ -+ if (!tbl) -+ return NULL; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return NULL; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto err; -+ -+ while ((wpath = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(wpath) && PTR_ERR(wpath) == -EAGAIN) -+ continue; -+ if (IS_ERR(wpath)) -+ break; -+ if (i++ == idx) -+ break; -+ } -+err: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+ -+ if (IS_ERR(wpath) || !wpath) -+ return NULL; -+ -+ return wpath; -+} -+ -+/** -+ * Locking: must be called within a read rcu section. -+ */ -+struct rtw_wds_path * -+rtw_wds_path_lookup_by_idx(_adapter *adapter, int idx) -+{ -+ return __rtw_wds_path_lookup_by_idx(adapter->wds_paths, idx); -+} -+ -+void dump_wpath(void *sel, _adapter *adapter) -+{ -+ struct rtw_wds_path *wpath; -+ int idx = 0; -+ char dst[ETH_ALEN]; -+ char next_hop[ETH_ALEN]; -+ u32 age_ms; -+ -+ RTW_PRINT_SEL(sel, "num:%d\n", ATOMIC_READ(&adapter->wds_path_num)); -+ RTW_PRINT_SEL(sel, "%-17s %-17s %-6s\n" -+ , "dst", "next_hop", "age" -+ ); -+ -+ do { -+ rtw_rcu_read_lock(); -+ -+ wpath = rtw_wds_path_lookup_by_idx(adapter, idx); -+ if (wpath) { -+ _rtw_memcpy(dst, wpath->dst, ETH_ALEN); -+ _rtw_memcpy(next_hop, wpath->next_hop->cmn.mac_addr, ETH_ALEN); -+ age_ms = rtw_get_passing_time_ms(wpath->last_update); -+ } -+ -+ rtw_rcu_read_unlock(); -+ -+ if (wpath) { -+ RTW_PRINT_SEL(sel, MAC_FMT" "MAC_FMT" %6u\n" -+ , MAC_ARG(dst), MAC_ARG(next_hop) -+ , age_ms < 999999 ? age_ms : 999999 -+ ); -+ } -+ -+ idx++; -+ } while (wpath); -+} -+ -+static -+struct rtw_wds_path *rtw_wds_path_new(_adapter *adapter, -+ const u8 *dst) -+{ -+ struct rtw_wds_path *new_wpath; -+ -+ new_wpath = rtw_zmalloc(sizeof(struct rtw_wds_path)); -+ if (!new_wpath) -+ return NULL; -+ -+ new_wpath->adapter = adapter; -+ _rtw_memcpy(new_wpath->dst, dst, ETH_ALEN); -+ new_wpath->last_update = rtw_get_current_time(); -+ -+ return new_wpath; -+} -+ -+/** -+ * Returns: 0 on success -+ * -+ * State: the initial state of the new path is set to 0 -+ */ -+struct rtw_wds_path *rtw_wds_path_add(_adapter *adapter, -+ const u8 *dst, struct sta_info *next_hop) -+{ -+ struct rtw_wds_table *tbl = adapter->wds_paths; -+ struct rtw_wds_path *wpath, *new_wpath; -+ int ret; -+ -+ if (!tbl) -+ return ERR_PTR(-ENOTSUPP); -+ -+ if (_rtw_memcmp(dst, adapter_mac_addr(adapter), ETH_ALEN) == _TRUE) -+ /* never add ourselves as neighbours */ -+ return ERR_PTR(-ENOTSUPP); -+ -+ if (IS_MCAST(dst)) -+ return ERR_PTR(-ENOTSUPP); -+ -+ if (ATOMIC_INC_UNLESS(&adapter->wds_path_num, RTW_WDS_MAX_PATHS) == 0) -+ return ERR_PTR(-ENOSPC); -+ -+ new_wpath = rtw_wds_path_new(adapter, dst); -+ if (!new_wpath) -+ return ERR_PTR(-ENOMEM); -+ -+ do { -+ ret = rtw_rhashtable_lookup_insert_fast(&tbl->rhead, -+ &new_wpath->rhash, -+ rtw_wds_rht_params); -+ -+ if (ret == -EEXIST) -+ wpath = rtw_rhashtable_lookup_fast(&tbl->rhead, -+ dst, -+ rtw_wds_rht_params); -+ -+ } while (unlikely(ret == -EEXIST && !wpath)); -+ -+ if (ret && ret != -EEXIST) -+ return ERR_PTR(ret); -+ -+ /* At this point either new_wpath was added, or we found a -+ * matching entry already in the table; in the latter case -+ * free the unnecessary new entry. -+ */ -+ if (ret == -EEXIST) { -+ rtw_mfree(new_wpath, sizeof(struct rtw_wds_path)); -+ new_wpath = wpath; -+ } -+ rtw_wds_path_assign_nexthop(new_wpath, next_hop); -+ -+ return new_wpath; -+} -+ -+static void rtw_wds_path_free_rcu(struct rtw_wds_table *tbl, -+ struct rtw_wds_path *wpath) -+{ -+ _adapter *adapter = wpath->adapter; -+ -+ ATOMIC_DEC(&adapter->wds_path_num); -+ -+ rtw_wpath_free_rcu(wpath); -+} -+ -+static void __rtw_wds_path_del(struct rtw_wds_table *tbl, struct rtw_wds_path *wpath) -+{ -+ rtw_rhashtable_remove_fast(&tbl->rhead, &wpath->rhash, rtw_wds_rht_params); -+ rtw_wds_path_free_rcu(tbl, wpath); -+} -+ -+void rtw_wds_path_flush_by_nexthop(struct sta_info *sta) -+{ -+ _adapter *adapter = sta->padapter; -+ struct rtw_wds_table *tbl = adapter->wds_paths; -+ struct rtw_wds_path *wpath; -+ rtw_rhashtable_iter iter; -+ int ret; -+ -+ if (!tbl) -+ return; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto out; -+ -+ while ((wpath = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(wpath) && PTR_ERR(wpath) == -EAGAIN) -+ continue; -+ if (IS_ERR(wpath)) -+ break; -+ -+ if (rtw_rcu_access_pointer(wpath->next_hop) == sta) -+ __rtw_wds_path_del(tbl, wpath); -+ } -+out: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+} -+ -+static void rtw_wds_table_flush_by_iface(struct rtw_wds_table *tbl) -+{ -+ struct rtw_wds_path *wpath; -+ rtw_rhashtable_iter iter; -+ int ret; -+ -+ if (!tbl) -+ return; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto out; -+ -+ while ((wpath = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(wpath) && PTR_ERR(wpath) == -EAGAIN) -+ continue; -+ if (IS_ERR(wpath)) -+ break; -+ __rtw_wds_path_del(tbl, wpath); -+ } -+out: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+} -+ -+void rtw_wds_path_flush_by_iface(_adapter *adapter) -+{ -+ rtw_wds_table_flush_by_iface(adapter->wds_paths); -+} -+ -+static int rtw_wds_table_path_del(struct rtw_wds_table *tbl, -+ const u8 *addr) -+{ -+ struct rtw_wds_path *wpath; -+ -+ if (!tbl) -+ return -ENXIO; -+ -+ rtw_rcu_read_lock(); -+ wpath = rtw_rhashtable_lookup_fast(&tbl->rhead, addr, rtw_wds_rht_params); -+ if (!wpath) { -+ rtw_rcu_read_unlock(); -+ return -ENXIO; -+ } -+ -+ __rtw_wds_path_del(tbl, wpath); -+ rtw_rcu_read_unlock(); -+ return 0; -+} -+ -+int rtw_wds_path_del(_adapter *adapter, const u8 *addr) -+{ -+ int err; -+ -+ err = rtw_wds_table_path_del(adapter->wds_paths, addr); -+ return err; -+} -+ -+int rtw_wds_pathtbl_init(_adapter *adapter) -+{ -+ struct rtw_wds_table *tbl_path; -+ int ret; -+ -+ tbl_path = rtw_wds_table_alloc(); -+ if (!tbl_path) -+ return -ENOMEM; -+ -+ rtw_rhashtable_init(&tbl_path->rhead, &rtw_wds_rht_params); -+ -+ ATOMIC_SET(&adapter->wds_path_num, 0); -+ adapter->wds_paths = tbl_path; -+ -+ return 0; -+} -+ -+static -+void rtw_wds_path_tbl_expire(_adapter *adapter, -+ struct rtw_wds_table *tbl) -+{ -+ struct rtw_wds_path *wpath; -+ rtw_rhashtable_iter iter; -+ int ret; -+ -+ if (!tbl) -+ return; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto out; -+ -+ while ((wpath = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(wpath) && PTR_ERR(wpath) == -EAGAIN) -+ continue; -+ if (IS_ERR(wpath)) -+ break; -+ if (rtw_time_after(rtw_get_current_time(), wpath->last_update + RTW_WDS_PATH_EXPIRE)) -+ __rtw_wds_path_del(tbl, wpath); -+ } -+ -+out: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+} -+ -+void rtw_wds_path_expire(_adapter *adapter) -+{ -+ rtw_wds_path_tbl_expire(adapter, adapter->wds_paths); -+} -+ -+void rtw_wds_pathtbl_unregister(_adapter *adapter) -+{ -+ if (adapter->wds_paths) { -+ rtw_wds_table_free(adapter->wds_paths); -+ adapter->wds_paths = NULL; -+ } -+} -+ -+int rtw_wds_nexthop_lookup(_adapter *adapter, const u8 *da, u8 *ra) -+{ -+ struct rtw_wds_path *wpath; -+ struct sta_info *next_hop; -+ int err = -ENOENT; -+ -+ rtw_rcu_read_lock(); -+ wpath = rtw_wds_path_lookup(adapter, da); -+ -+ if (!wpath) -+ goto endlookup; -+ -+ next_hop = rtw_rcu_dereference(wpath->next_hop); -+ if (next_hop) { -+ _rtw_memcpy(ra, next_hop->cmn.mac_addr, ETH_ALEN); -+ err = 0; -+ } -+ -+endlookup: -+ rtw_rcu_read_unlock(); -+ return err; -+} -+ -+#endif /* defined(CONFIG_AP_MODE) */ -+ -+/* WDS group adddressed proxy TX record */ -+struct rtw_wds_gptr { -+ u8 src[ETH_ALEN]; -+ systime last_update; -+ rtw_rhash_head rhash; -+ _adapter *adapter; -+ rtw_rcu_head rcu; -+}; -+ -+#define RTW_WDS_GPTR_EXPIRE (2 * HZ) -+ -+/* Maximum number of gptrs per interface */ -+#define RTW_WDS_MAX_GPTRS 1024 -+ -+#ifdef PLATFORM_LINUX -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+static void rtw_wgptr_free_rcu(struct rtw_wds_gptr *wgptr) -+{ -+ kfree_rcu(wgptr, rcu); -+ rtw_mstat_update(MSTAT_TYPE_PHY, MSTAT_FREE, sizeof(struct rtw_wds_gptr)); -+} -+#else -+static void rtw_wgptr_free_rcu_callback(rtw_rcu_head *head) -+{ -+ struct rtw_wds_gptr *wgptr; -+ -+ wgptr = container_of(head, struct rtw_wds_gptr, rcu); -+ rtw_mfree(wgptr, sizeof(struct rtw_wds_gptr)); -+} -+ -+static void rtw_wgptr_free_rcu(struct rtw_wds_gptr *wgptr) -+{ -+ call_rcu(&wgptr->rcu, rtw_wgptr_free_rcu_callback); -+} -+#endif -+#endif /* PLATFORM_LINUX */ -+ -+static void rtw_wds_gptr_free_rcu(struct rtw_wds_gptr_table *tbl, struct rtw_wds_gptr *wgptr) -+{ -+ _adapter *adapter = wgptr->adapter; -+ -+ ATOMIC_DEC(&adapter->wds_gpt_record_num); -+ -+ rtw_wgptr_free_rcu(wgptr); -+} -+ -+static u32 rtw_wds_gptr_table_hash(const void *addr, u32 len, u32 seed) -+{ -+ /* Use last four bytes of hw addr as hash index */ -+ return jhash_1word(*(u32 *)(addr+2), seed); -+} -+ -+static const rtw_rhashtable_params rtw_wds_gptr_rht_params = { -+ .nelem_hint = 2, -+ .automatic_shrinking = true, -+ .key_len = ETH_ALEN, -+ .key_offset = offsetof(struct rtw_wds_gptr, src), -+ .head_offset = offsetof(struct rtw_wds_gptr, rhash), -+ .hashfn = rtw_wds_gptr_table_hash, -+}; -+ -+static void rtw_wds_gptr_rht_free(void *ptr, void *tblptr) -+{ -+ struct rtw_wds_gptr *wgptr = ptr; -+ struct rtw_wds_gptr_table *tbl = tblptr; -+ -+ rtw_wds_gptr_free_rcu(tbl, wgptr); -+} -+ -+static struct rtw_wds_gptr_table *rtw_wds_gptr_table_alloc(void) -+{ -+ struct rtw_wds_gptr_table *newtbl; -+ -+ newtbl = rtw_malloc(sizeof(struct rtw_wds_gptr_table)); -+ if (!newtbl) -+ return NULL; -+ -+ return newtbl; -+} -+ -+static void rtw_wds_gptr_table_free(struct rtw_wds_gptr_table *tbl) -+{ -+ rtw_rhashtable_free_and_destroy(&tbl->rhead, -+ rtw_wds_gptr_rht_free, tbl); -+ rtw_mfree(tbl, sizeof(struct rtw_wds_gptr_table)); -+} -+ -+static struct rtw_wds_gptr *rtw_wds_gptr_lookup(_adapter *adapter, const u8 *src) -+{ -+ struct rtw_wds_gptr_table *tbl = adapter->wds_gpt_records; -+ -+ if (!tbl) -+ return NULL; -+ -+ return rtw_rhashtable_lookup_fast(&tbl->rhead, src, rtw_wds_gptr_rht_params); -+} -+ -+/** -+ * Locking: must be called within a read rcu section. -+ */ -+static struct rtw_wds_gptr *rtw_wds_gptr_lookup_by_idx(_adapter *adapter, int idx) -+{ -+ int i = 0, ret; -+ struct rtw_wds_gptr_table *tbl = adapter->wds_gpt_records; -+ struct rtw_wds_gptr *wgptr = NULL; -+ rtw_rhashtable_iter iter; -+ -+ if (!tbl) -+ return NULL; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return NULL; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto err; -+ -+ while ((wgptr = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(wgptr) && PTR_ERR(wgptr) == -EAGAIN) -+ continue; -+ if (IS_ERR(wgptr)) -+ break; -+ if (i++ == idx) -+ break; -+ } -+err: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+ -+ if (IS_ERR(wgptr) || !wgptr) -+ return NULL; -+ -+ return wgptr; -+} -+ -+void dump_wgptr(void *sel, _adapter *adapter) -+{ -+ struct rtw_wds_gptr *wgptr; -+ int idx = 0; -+ char src[ETH_ALEN]; -+ u32 age_ms; -+ -+ RTW_PRINT_SEL(sel, "num:%d\n", ATOMIC_READ(&adapter->wds_gpt_record_num)); -+ RTW_PRINT_SEL(sel, "%-17s %-6s\n" -+ , "src", "age" -+ ); -+ -+ do { -+ rtw_rcu_read_lock(); -+ -+ wgptr = rtw_wds_gptr_lookup_by_idx(adapter, idx); -+ if (wgptr) { -+ _rtw_memcpy(src, wgptr->src, ETH_ALEN); -+ age_ms = rtw_get_passing_time_ms(wgptr->last_update); -+ } -+ -+ rtw_rcu_read_unlock(); -+ -+ if (wgptr) { -+ RTW_PRINT_SEL(sel, MAC_FMT" %6u\n" -+ , MAC_ARG(src) -+ , age_ms < 999999 ? age_ms : 999999 -+ ); -+ } -+ -+ idx++; -+ } while (wgptr); -+} -+ -+static struct rtw_wds_gptr *rtw_wds_gptr_new(_adapter *adapter, const u8 *src) -+{ -+ struct rtw_wds_gptr *new_wgptr; -+ -+ new_wgptr = rtw_zmalloc(sizeof(struct rtw_wds_gptr)); -+ if (!new_wgptr) -+ return NULL; -+ -+ new_wgptr->adapter = adapter; -+ _rtw_memcpy(new_wgptr->src, src, ETH_ALEN); -+ new_wgptr->last_update = rtw_get_current_time(); -+ -+ return new_wgptr; -+} -+ -+static struct rtw_wds_gptr *rtw_wds_gptr_add(_adapter *adapter, const u8 *src) -+{ -+ struct rtw_wds_gptr_table *tbl = adapter->wds_gpt_records; -+ struct rtw_wds_gptr *wgptr, *new_wgptr; -+ int ret; -+ -+ if (!tbl) -+ return ERR_PTR(-ENOTSUPP); -+ -+ if (ATOMIC_INC_UNLESS(&adapter->wds_gpt_record_num, RTW_WDS_MAX_PATHS) == 0) -+ return ERR_PTR(-ENOSPC); -+ -+ new_wgptr = rtw_wds_gptr_new(adapter, src); -+ if (!new_wgptr) -+ return ERR_PTR(-ENOMEM); -+ -+ do { -+ ret = rtw_rhashtable_lookup_insert_fast(&tbl->rhead, -+ &new_wgptr->rhash, -+ rtw_wds_gptr_rht_params); -+ -+ if (ret == -EEXIST) -+ wgptr = rtw_rhashtable_lookup_fast(&tbl->rhead, -+ src, -+ rtw_wds_gptr_rht_params); -+ -+ } while (unlikely(ret == -EEXIST && !wgptr)); -+ -+ if (ret && ret != -EEXIST) -+ return ERR_PTR(ret); -+ -+ /* At this point either new_wgptr was added, or we found a -+ * matching entry already in the table; in the latter case -+ * free the unnecessary new entry. -+ */ -+ if (ret == -EEXIST) { -+ rtw_mfree(new_wgptr, sizeof(struct rtw_wds_gptr)); -+ new_wgptr = wgptr; -+ } -+ -+ return new_wgptr; -+} -+ -+bool rtw_rx_wds_gptr_check(_adapter *adapter, const u8 *src) -+{ -+ struct rtw_wds_gptr *wgptr; -+ bool ret = 0; -+ -+ rtw_rcu_read_lock(); -+ -+ wgptr = rtw_wds_gptr_lookup(adapter, src); -+ if (wgptr) -+ ret = rtw_time_after(wgptr->last_update + RTW_WDS_GPTR_EXPIRE, rtw_get_current_time()); -+ -+ rtw_rcu_read_unlock(); -+ -+ return ret; -+} -+ -+void rtw_tx_wds_gptr_update(_adapter *adapter, const u8 *src) -+{ -+ struct rtw_wds_gptr *wgptr; -+ -+ rtw_rcu_read_lock(); -+ wgptr = rtw_wds_gptr_lookup(adapter, src); -+ if (!wgptr) -+ rtw_wds_gptr_add(adapter, src); -+ else -+ wgptr->last_update = rtw_get_current_time(); -+ rtw_rcu_read_unlock(); -+} -+ -+static void __rtw_wds_gptr_del(struct rtw_wds_gptr_table *tbl, struct rtw_wds_gptr *wgptr) -+{ -+ rtw_rhashtable_remove_fast(&tbl->rhead, &wgptr->rhash, rtw_wds_gptr_rht_params); -+ rtw_wds_gptr_free_rcu(tbl, wgptr); -+} -+ -+void rtw_wds_gptr_expire(_adapter *adapter) -+{ -+ struct rtw_wds_gptr_table *tbl = adapter->wds_gpt_records; -+ struct rtw_wds_gptr *wgptr; -+ rtw_rhashtable_iter iter; -+ int ret; -+ -+ if (!tbl) -+ return; -+ -+ ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); -+ if (ret) -+ return; -+ -+ ret = rtw_rhashtable_walk_start(&iter); -+ if (ret && ret != -EAGAIN) -+ goto out; -+ -+ while ((wgptr = rtw_rhashtable_walk_next(&iter))) { -+ if (IS_ERR(wgptr) && PTR_ERR(wgptr) == -EAGAIN) -+ continue; -+ if (IS_ERR(wgptr)) -+ break; -+ if (rtw_time_after(rtw_get_current_time(), wgptr->last_update + RTW_WDS_GPTR_EXPIRE)) -+ __rtw_wds_gptr_del(tbl, wgptr); -+ } -+ -+out: -+ rtw_rhashtable_walk_stop(&iter); -+ rtw_rhashtable_walk_exit(&iter); -+} -+ -+int rtw_wds_gptr_tbl_init(_adapter *adapter) -+{ -+ struct rtw_wds_gptr_table *tbl; -+ int ret; -+ -+ tbl = rtw_wds_gptr_table_alloc(); -+ if (!tbl) -+ return -ENOMEM; -+ -+ rtw_rhashtable_init(&tbl->rhead, &rtw_wds_gptr_rht_params); -+ -+ ATOMIC_SET(&adapter->wds_gpt_record_num, 0); -+ adapter->wds_gpt_records = tbl; -+ -+ return 0; -+} -+ -+void rtw_wds_gptr_tbl_unregister(_adapter *adapter) -+{ -+ if (adapter->wds_gpt_records) { -+ rtw_wds_gptr_table_free(adapter->wds_gpt_records); -+ adapter->wds_gpt_records = NULL; -+ } -+} -+#endif /* defined(CONFIG_RTW_WDS) */ -+ -diff --git a/drivers/staging/rtl8723cs/core/wds/rtw_wds.h b/drivers/staging/rtl8723cs/core/wds/rtw_wds.h -new file mode 100644 -index 000000000000..f1312c740107 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/core/wds/rtw_wds.h -@@ -0,0 +1,65 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_WDS_H_ -+#define __RTW_WDS_H_ -+ -+#ifdef CONFIG_AP_MODE -+struct rtw_wds_path { -+ u8 dst[ETH_ALEN]; -+ rtw_rhash_head rhash; -+ _adapter *adapter; -+ struct sta_info __rcu *next_hop; -+ rtw_rcu_head rcu; -+ systime last_update; -+}; -+ -+struct rtw_wds_table { -+ rtw_rhashtable rhead; -+}; -+ -+#define RTW_WDS_PATH_EXPIRE (600 * HZ) -+ -+/* Maximum number of paths per interface */ -+#define RTW_WDS_MAX_PATHS 1024 -+ -+int rtw_wds_nexthop_lookup(_adapter *adapter, const u8 *da, u8 *ra); -+ -+struct rtw_wds_path *rtw_wds_path_lookup(_adapter *adapter, const u8 *dst); -+void dump_wpath(void *sel, _adapter *adapter); -+ -+void rtw_wds_path_expire(_adapter *adapter); -+ -+struct rtw_wds_path *rtw_wds_path_add(_adapter *adapter, const u8 *dst, struct sta_info *next_hop); -+void rtw_wds_path_assign_nexthop(struct rtw_wds_path *path, struct sta_info *sta); -+ -+int rtw_wds_pathtbl_init(_adapter *adapter); -+void rtw_wds_pathtbl_unregister(_adapter *adapter); -+ -+void rtw_wds_path_flush_by_nexthop(struct sta_info *sta); -+#endif /* CONFIG_AP_MODE */ -+ -+struct rtw_wds_gptr_table { -+ rtw_rhashtable rhead; -+}; -+ -+void dump_wgptr(void *sel, _adapter *adapter); -+bool rtw_rx_wds_gptr_check(_adapter *adapter, const u8 *src); -+void rtw_tx_wds_gptr_update(_adapter *adapter, const u8 *src); -+void rtw_wds_gptr_expire(_adapter *adapter); -+int rtw_wds_gptr_tbl_init(_adapter *adapter); -+void rtw_wds_gptr_tbl_unregister(_adapter *adapter); -+ -+#endif /* __RTW_WDSH_ */ -+ -diff --git a/drivers/staging/rtl8723cs/hal/HalPwrSeqCmd.c b/drivers/staging/rtl8723cs/hal/HalPwrSeqCmd.c -new file mode 100644 -index 000000000000..389785c2bfe4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/HalPwrSeqCmd.c -@@ -0,0 +1,185 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/*++ -+Copyright (c) Realtek Semiconductor Corp. All rights reserved. -+ -+Module Name: -+ HalPwrSeqCmd.c -+ -+Abstract: -+ Implement HW Power sequence configuration CMD handling routine for Realtek devices. -+ -+Major Change History: -+ When Who What -+ ---------- --------------- ------------------------------- -+ 2011-10-26 Lucas Modify to be compatible with SD4-CE driver. -+ 2011-07-07 Roger Create. -+ -+--*/ -+#include -+ -+ -+/* -+ * Description: -+ * This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC. -+ * -+ * Assumption: -+ * We should follow specific format which was released from HW SD. -+ * -+ * 2011.07.07, added by Roger. -+ * */ -+u8 HalPwrSeqCmdParsing( -+ PADAPTER padapter, -+ u8 CutVersion, -+ u8 FabVersion, -+ u8 InterfaceType, -+ WLAN_PWR_CFG PwrSeqCmd[]) -+{ -+ WLAN_PWR_CFG PwrCfgCmd = {0}; -+ u8 bPollingBit = _FALSE; -+ u8 bHWICSupport = _FALSE; -+ u32 AryIdx = 0; -+ u8 value = 0; -+ u32 offset = 0; -+ u8 flag = 0; -+ u32 pollingCount = 0; /* polling autoload done. */ -+ u32 maxPollingCnt = 5000; -+ -+ do { -+ PwrCfgCmd = PwrSeqCmd[AryIdx]; -+ -+ -+ /* 2 Only Handle the command whose FAB, CUT, and Interface are matched */ -+ if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) && -+ (GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) && -+ (GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) { -+ switch (GET_PWR_CFG_CMD(PwrCfgCmd)) { -+ case PWR_CMD_READ: -+ break; -+ -+ case PWR_CMD_WRITE: -+ offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); -+ -+#ifdef CONFIG_SDIO_HCI -+ /* */ -+ /* We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface */ -+ /* 2011.07.07. */ -+ /* */ -+ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) { -+ /* Read Back SDIO Local value */ -+ value = SdioLocalCmd52Read1Byte(padapter, offset); -+ -+ value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd)); -+ value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)); -+ -+ /* Write Back SDIO Local value */ -+ SdioLocalCmd52Write1Byte(padapter, offset, value); -+ } else -+#endif -+ { -+#ifdef CONFIG_GSPI_HCI -+ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) -+ offset = SPI_LOCAL_OFFSET | offset; -+#endif -+ /* Read the value from system register */ -+ value = rtw_read8(padapter, offset); -+ -+ value = value & (~(GET_PWR_CFG_MASK(PwrCfgCmd))); -+ value = value | (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)); -+ -+ /* Write the value back to sytem register */ -+ rtw_write8(padapter, offset, value); -+ } -+ break; -+ -+ case PWR_CMD_POLLING: -+ -+ bPollingBit = _FALSE; -+ offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_PWR_CMD, &bHWICSupport); -+ if (bHWICSupport && offset == 0x06) { -+ flag = 0; -+ maxPollingCnt = 100000; -+ } else -+ maxPollingCnt = 5000; -+ -+#ifdef CONFIG_GSPI_HCI -+ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) -+ offset = SPI_LOCAL_OFFSET | offset; -+#endif -+ do { -+#ifdef CONFIG_SDIO_HCI -+ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) -+ value = SdioLocalCmd52Read1Byte(padapter, offset); -+ else -+#endif -+ value = rtw_read8(padapter, offset); -+ -+ value = value & GET_PWR_CFG_MASK(PwrCfgCmd); -+ if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd))) -+ bPollingBit = _TRUE; -+ else -+ rtw_udelay_os(10); -+ -+ if (pollingCount++ > maxPollingCnt) { -+ RTW_ERR("HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value); -+ -+ /* For PCIE + USB package poll power bit timeout issue only modify 8821AE and 8723BE */ -+ if (bHWICSupport && offset == 0x06 && flag == 0) { -+ -+ RTW_ERR("[WARNING] PCIE polling(0x%X) timeout(%d), Toggle 0x04[3] and try again.\n", offset, maxPollingCnt); -+ if (IS_HARDWARE_TYPE_8723DE(padapter)) -+ PlatformEFIOWrite1Byte(padapter, 0x40, (PlatformEFIORead1Byte(padapter, 0x40)) & (~BIT3)); -+ -+ PlatformEFIOWrite1Byte(padapter, 0x04, PlatformEFIORead1Byte(padapter, 0x04) | BIT3); -+ PlatformEFIOWrite1Byte(padapter, 0x04, PlatformEFIORead1Byte(padapter, 0x04) & ~BIT3); -+ -+ if (IS_HARDWARE_TYPE_8723DE(padapter)) -+ PlatformEFIOWrite1Byte(padapter, 0x40, PlatformEFIORead1Byte(padapter, 0x40)|BIT3); -+ -+ /* Retry Polling Process one more time */ -+ pollingCount = 0; -+ flag = 1; -+ } else { -+ return _FALSE; -+ } -+ } -+ } while (!bPollingBit); -+ -+ break; -+ -+ case PWR_CMD_DELAY: -+ if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US) -+ rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)); -+ else -+ rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd) * 1000); -+ break; -+ -+ case PWR_CMD_END: -+ /* When this command is parsed, end the process */ -+ return _TRUE; -+ break; -+ -+ default: -+ break; -+ } -+ } -+ -+ AryIdx++;/* Add Array Index */ -+ } while (1); -+ -+ return _TRUE; -+} -diff --git a/drivers/staging/rtl8723cs/hal/btc/btc_basic_types.h b/drivers/staging/rtl8723cs/hal/btc/btc_basic_types.h -new file mode 100644 -index 000000000000..c2a27a264218 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/btc/btc_basic_types.h -@@ -0,0 +1,53 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __BTC_BASIC_TYPES_H__ -+#define __BTC_BASIC_TYPES_H__ -+ -+#define IN -+#define OUT -+#define VOID void -+typedef void *PVOID; -+ -+#define u1Byte u8 -+#define pu1Byte u8* -+ -+#define u2Byte u16 -+#define pu2Byte u16* -+ -+#define u4Byte u32 -+#define pu4Byte u32* -+ -+#define u8Byte u64 -+#define pu8Byte u64* -+ -+#define s1Byte s8 -+#define ps1Byte s8* -+ -+#define s2Byte s16 -+#define ps2Byte s16* -+ -+#define s4Byte s32 -+#define ps4Byte s32* -+ -+#define s8Byte s64 -+#define ps8Byte s64* -+ -+#define UCHAR u8 -+#define USHORT u16 -+#define UINT u32 -+#define ULONG u32 -+#define PULONG u32* -+ -+#endif /* __BTC_BASIC_TYPES_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/btc/halbtc8703b1ant.c b/drivers/staging/rtl8723cs/hal/btc/halbtc8703b1ant.c -new file mode 100644 -index 000000000000..a7334eae6145 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/btc/halbtc8703b1ant.c -@@ -0,0 +1,4622 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/* ************************************************************ -+ * Description: -+ * -+ * This file is for RTL8703B Co-exist mechanism -+ * -+ * History -+ * 2012/11/15 Cosa first check in. -+ * -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * include files -+ * ************************************************************ */ -+#include "mp_precomp.h" -+ -+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) -+ -+#if (RTL8703B_SUPPORT == 1) -+/* ************************************************************ -+ * Global variables, these are static variables -+ * ************************************************************ */ -+static u8 *trace_buf = &gl_btc_trace_buf[0]; -+static struct coex_dm_8703b_1ant glcoex_dm_8703b_1ant; -+static struct coex_dm_8703b_1ant *coex_dm = &glcoex_dm_8703b_1ant; -+static struct coex_sta_8703b_1ant glcoex_sta_8703b_1ant; -+static struct coex_sta_8703b_1ant *coex_sta = &glcoex_sta_8703b_1ant; -+static struct psdscan_sta_8703b_1ant gl_psd_scan_8703b_1ant; -+static struct psdscan_sta_8703b_1ant *psd_scan = &gl_psd_scan_8703b_1ant; -+ -+ -+const char *const glbt_info_src_8703b_1ant[] = { -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+/* ************************************************************ -+ * BtCoex Version Format: -+ * 1. date : glcoex_ver_date_XXXXX_1ant -+ * 2. WifiCoexVersion : glcoex_ver_XXXX_1ant -+ * 3. BtCoexVersion : glcoex_ver_btdesired_XXXXX_1ant -+ * 4. others : glcoex_ver_XXXXXX_XXXXX_1ant -+ * -+ * Variable should be indicated IC and Antenna numbers !!! -+ * Please strictly follow this order and naming style !!! -+ * -+ * ************************************************************ */ -+u32 glcoex_ver_date_8703b_1ant = 20180330; -+u32 glcoex_ver_8703b_1ant = 0x1e; -+u32 glcoex_ver_btdesired_8703b_1ant = 0x1c; -+ -+ -+/* ************************************************************ -+ * local function proto type if needed -+ * ************************************************************ -+ * ************************************************************ -+ * local function start with halbtc8703b1ant_ -+ * ************************************************************ */ -+u8 halbtc8703b1ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1) -+{ -+ s32 bt_rssi = 0; -+ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; -+ -+ bt_rssi = coex_sta->bt_rssi; -+ -+ if (level_num == 2) { -+ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || -+ (coex_sta->pre_bt_rssi_state == -+ BTC_RSSI_STATE_STAY_LOW)) { -+ if (bt_rssi >= (rssi_thresh + -+ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ bt_rssi_state = BTC_RSSI_STATE_HIGH; -+ else -+ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; -+ } else { -+ if (bt_rssi < rssi_thresh) -+ bt_rssi_state = BTC_RSSI_STATE_LOW; -+ else -+ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } else if (level_num == 3) { -+ if (rssi_thresh > rssi_thresh1) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Rssi thresh error!!\n"); -+ BTC_TRACE(trace_buf); -+ return coex_sta->pre_bt_rssi_state; -+ } -+ -+ if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || -+ (coex_sta->pre_bt_rssi_state == -+ BTC_RSSI_STATE_STAY_LOW)) { -+ if (bt_rssi >= (rssi_thresh + -+ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; -+ else -+ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; -+ } else if ((coex_sta->pre_bt_rssi_state == -+ BTC_RSSI_STATE_MEDIUM) || -+ (coex_sta->pre_bt_rssi_state == -+ BTC_RSSI_STATE_STAY_MEDIUM)) { -+ if (bt_rssi >= (rssi_thresh1 + -+ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ bt_rssi_state = BTC_RSSI_STATE_HIGH; -+ else if (bt_rssi < rssi_thresh) -+ bt_rssi_state = BTC_RSSI_STATE_LOW; -+ else -+ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; -+ } else { -+ if (bt_rssi < rssi_thresh1) -+ bt_rssi_state = BTC_RSSI_STATE_MEDIUM; -+ else -+ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ -+ coex_sta->pre_bt_rssi_state = bt_rssi_state; -+ -+ return bt_rssi_state; -+} -+ -+u8 halbtc8703b1ant_wifi_rssi_state(IN struct btc_coexist *btcoexist, -+ IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1) -+{ -+ s32 wifi_rssi = 0; -+ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); -+ -+ if (level_num == 2) { -+ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) -+ || -+ (coex_sta->pre_wifi_rssi_state[index] == -+ BTC_RSSI_STATE_STAY_LOW)) { -+ if (wifi_rssi >= (rssi_thresh + -+ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ wifi_rssi_state = BTC_RSSI_STATE_HIGH; -+ else -+ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; -+ } else { -+ if (wifi_rssi < rssi_thresh) -+ wifi_rssi_state = BTC_RSSI_STATE_LOW; -+ else -+ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } else if (level_num == 3) { -+ if (rssi_thresh > rssi_thresh1) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], wifi RSSI thresh error!!\n"); -+ BTC_TRACE(trace_buf); -+ return coex_sta->pre_wifi_rssi_state[index]; -+ } -+ -+ if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW) -+ || -+ (coex_sta->pre_wifi_rssi_state[index] == -+ BTC_RSSI_STATE_STAY_LOW)) { -+ if (wifi_rssi >= (rssi_thresh + -+ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; -+ else -+ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; -+ } else if ((coex_sta->pre_wifi_rssi_state[index] == -+ BTC_RSSI_STATE_MEDIUM) || -+ (coex_sta->pre_wifi_rssi_state[index] == -+ BTC_RSSI_STATE_STAY_MEDIUM)) { -+ if (wifi_rssi >= (rssi_thresh1 + -+ BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT)) -+ wifi_rssi_state = BTC_RSSI_STATE_HIGH; -+ else if (wifi_rssi < rssi_thresh) -+ wifi_rssi_state = BTC_RSSI_STATE_LOW; -+ else -+ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; -+ } else { -+ if (wifi_rssi < rssi_thresh1) -+ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; -+ else -+ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; -+ } -+ } -+ -+ coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; -+ -+ return wifi_rssi_state; -+} -+ -+void halbtc8703b1ant_update_ra_mask(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN u32 dis_rate_mask) -+{ -+ coex_dm->cur_ra_mask = dis_rate_mask; -+ -+ if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) -+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, -+ &coex_dm->cur_ra_mask); -+ coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; -+} -+ -+void halbtc8703b1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN u8 type) -+{ -+ boolean wifi_under_b_mode = FALSE; -+ -+ coex_dm->cur_arfr_type = type; -+ -+ if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { -+ switch (coex_dm->cur_arfr_type) { -+ case 0: /* normal mode */ -+ btcoexist->btc_write_4byte(btcoexist, 0x430, -+ coex_dm->backup_arfr_cnt1); -+ btcoexist->btc_write_4byte(btcoexist, 0x434, -+ coex_dm->backup_arfr_cnt2); -+ break; -+ case 1: -+ btcoexist->btc_get(btcoexist, -+ BTC_GET_BL_WIFI_UNDER_B_MODE, -+ &wifi_under_b_mode); -+ if (wifi_under_b_mode) { -+ btcoexist->btc_write_4byte(btcoexist, -+ 0x430, 0x0); -+ btcoexist->btc_write_4byte(btcoexist, -+ 0x434, 0x01010101); -+ } else { -+ btcoexist->btc_write_4byte(btcoexist, -+ 0x430, 0x0); -+ btcoexist->btc_write_4byte(btcoexist, -+ 0x434, 0x04030201); -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; -+} -+ -+void halbtc8703b1ant_retry_limit(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN u8 type) -+{ -+ coex_dm->cur_retry_limit_type = type; -+ -+ if (force_exec || -+ (coex_dm->pre_retry_limit_type != -+ coex_dm->cur_retry_limit_type)) { -+ switch (coex_dm->cur_retry_limit_type) { -+ case 0: /* normal mode */ -+ btcoexist->btc_write_2byte(btcoexist, 0x42a, -+ coex_dm->backup_retry_limit); -+ break; -+ case 1: /* retry limit=8 */ -+ btcoexist->btc_write_2byte(btcoexist, 0x42a, -+ 0x0808); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; -+} -+ -+void halbtc8703b1ant_ampdu_max_time(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN u8 type) -+{ -+ coex_dm->cur_ampdu_time_type = type; -+ -+ if (force_exec || -+ (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) { -+ switch (coex_dm->cur_ampdu_time_type) { -+ case 0: /* normal mode */ -+ btcoexist->btc_write_1byte(btcoexist, 0x456, -+ coex_dm->backup_ampdu_max_time); -+ break; -+ case 1: /* AMPDU timw = 0x38 * 32us */ -+ btcoexist->btc_write_1byte(btcoexist, 0x456, -+ 0x38); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; -+} -+ -+void halbtc8703b1ant_limited_tx(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type, -+ IN u8 retry_limit_type, IN u8 ampdu_time_type) -+{ -+ switch (ra_mask_type) { -+ case 0: /* normal mode */ -+ halbtc8703b1ant_update_ra_mask(btcoexist, force_exec, -+ 0x0); -+ break; -+ case 1: /* disable cck 1/2 */ -+ halbtc8703b1ant_update_ra_mask(btcoexist, force_exec, -+ 0x00000003); -+ break; -+ case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ -+ halbtc8703b1ant_update_ra_mask(btcoexist, force_exec, -+ 0x0001f1f7); -+ break; -+ default: -+ break; -+ } -+ -+ halbtc8703b1ant_auto_rate_fallback_retry(btcoexist, force_exec, -+ arfr_type); -+ halbtc8703b1ant_retry_limit(btcoexist, force_exec, retry_limit_type); -+ halbtc8703b1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type); -+} -+ -+void halbtc8703b1ant_limited_rx(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN boolean rej_ap_agg_pkt, -+ IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size) -+{ -+ boolean reject_rx_agg = rej_ap_agg_pkt; -+ boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; -+ u8 rx_agg_size = agg_buf_size; -+ -+ /* ============================================ */ -+ /* Rx Aggregation related setting */ -+ /* ============================================ */ -+ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, -+ &reject_rx_agg); -+ /* decide BT control aggregation buf size or not */ -+ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, -+ &bt_ctrl_rx_agg_size); -+ /* aggregation buf size, only work when BT control Rx aggregation size. */ -+ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); -+ /* real update aggregation setting */ -+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); -+ -+ -+} -+ -+void halbtc8703b1ant_query_bt_info(IN struct btc_coexist *btcoexist) -+{ -+ u8 h2c_parameter[1] = {0}; -+ -+ -+ h2c_parameter[0] |= BIT(0); /* trigger */ -+ -+ btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); -+} -+ -+void halbtc8703b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist) -+{ -+ u32 reg_hp_txrx, reg_lp_txrx, u32tmp; -+ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; -+ static u8 num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_overhead = 0, -+ cnt_autoslot_hang = 0; -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ -+ /* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */ -+ /* if (! (btcoexist->btc_read_1byte(btcoexist, 0x76e) & 0x8) ) */ -+ -+ reg_hp_txrx = 0x770; -+ reg_lp_txrx = 0x774; -+ -+ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); -+ reg_hp_tx = u32tmp & MASKLWORD; -+ reg_hp_rx = (u32tmp & MASKHWORD) >> 16; -+ -+ u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); -+ reg_lp_tx = u32tmp & MASKLWORD; -+ reg_lp_rx = (u32tmp & MASKHWORD) >> 16; -+ -+ coex_sta->high_priority_tx = reg_hp_tx; -+ coex_sta->high_priority_rx = reg_hp_rx; -+ coex_sta->low_priority_tx = reg_lp_tx; -+ coex_sta->low_priority_rx = reg_lp_rx; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", -+ reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx); -+ -+ BTC_TRACE(trace_buf); -+ -+ if (BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == -+ coex_dm->bt_status) { -+ -+ if (coex_sta->high_priority_rx >= 15) { -+ if (cnt_overhead < 3) -+ cnt_overhead++; -+ -+ if (cnt_overhead == 3) -+ coex_sta->is_hiPri_rx_overhead = TRUE; -+ } else { -+ if (cnt_overhead > 0) -+ cnt_overhead--; -+ -+ if (cnt_overhead == 0) -+ coex_sta->is_hiPri_rx_overhead = FALSE; -+ } -+ } else -+ coex_sta->is_hiPri_rx_overhead = FALSE; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", -+ reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx); -+ -+ BTC_TRACE(trace_buf); -+ -+ /* reset counter */ -+ btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); -+ -+ if ((coex_sta->low_priority_tx > 1150) && -+ (!coex_sta->c2h_bt_inquiry_page)) -+ coex_sta->pop_event_cnt++; -+ -+ if ((coex_sta->low_priority_rx >= 1150) && -+ (coex_sta->low_priority_rx >= coex_sta->low_priority_tx) -+ && (!coex_sta->under_ips) && (!coex_sta->c2h_bt_inquiry_page) && -+ (coex_sta->bt_link_exist)) { -+ if (cnt_slave >= 3) { -+ bt_link_info->slave_role = TRUE; -+ cnt_slave = 3; -+ } else -+ cnt_slave++; -+ } else { -+ if (cnt_slave == 0) { -+ bt_link_info->slave_role = FALSE; -+ cnt_slave = 0; -+ } else -+ cnt_slave--; -+ -+ } -+ -+ if (coex_sta->is_tdma_btautoslot) { -+ if ((coex_sta->low_priority_tx >= 1300) && -+ (coex_sta->low_priority_rx <= 150)) { -+ if (cnt_autoslot_hang >= 2) { -+ coex_sta->is_tdma_btautoslot_hang = TRUE; -+ cnt_autoslot_hang = 2; -+ } else -+ cnt_autoslot_hang++; -+ } else { -+ if (cnt_autoslot_hang == 0) { -+ coex_sta->is_tdma_btautoslot_hang = FALSE; -+ cnt_autoslot_hang = 0; -+ } else -+ cnt_autoslot_hang--; -+ } -+ } -+ -+ if (bt_link_info->hid_only) { -+ if (coex_sta->low_priority_rx > 50) -+ coex_sta->is_hid_low_pri_tx_overhead = true; -+ else -+ coex_sta->is_hid_low_pri_tx_overhead = false; -+ } -+ -+ if (!coex_sta->bt_disabled) { -+ if ((coex_sta->high_priority_tx == 0) && -+ (coex_sta->high_priority_rx == 0) && -+ (coex_sta->low_priority_tx == 0) && -+ (coex_sta->low_priority_rx == 0)) { -+ num_of_bt_counter_chk++; -+ if (num_of_bt_counter_chk >= 3) { -+ halbtc8703b1ant_query_bt_info(btcoexist); -+ num_of_bt_counter_chk = 0; -+ } -+ } -+ } -+ -+} -+ -+ -+void halbtc8703b1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist) -+{ -+ s32 wifi_rssi = 0; -+ boolean wifi_busy = FALSE, wifi_under_b_mode = FALSE, -+ wifi_scan = FALSE, wifi_connected = FALSE; -+ boolean bt_idle = FALSE, wl_idle = FALSE, is_cck_deadlock = FALSE; -+ static u8 cck_lock_counter = 0, wl_noisy_count0 = 0, -+ wl_noisy_count1 = 3, wl_noisy_count2 = 0; -+ u32 total_cnt, reg_val1, reg_val2, cnt_cck; -+ u32 cnt_crcok = 0, cnt_crcerr = 0; -+ static u8 cnt = 0, cnt_ccklocking = 0; -+ u8 h2c_parameter[1] = {0}; -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ -+ /*send h2c to query WL FW dbg info */ -+ if (((coex_dm->cur_ps_tdma_on) && (coex_sta->force_lps_ctrl)) || -+ ((coex_sta->acl_busy) && (bt_link_info->a2dp_exist))) { -+ h2c_parameter[0] = 0x8; -+ btcoexist->btc_fill_h2c(btcoexist, 0x69, 1, h2c_parameter); -+ } -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); -+ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, -+ &wifi_under_b_mode); -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan); -+ -+ coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter( -+ btcoexist, -+ PHYDM_INFO_CRC32_OK_CCK); -+ coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter( -+ btcoexist, -+ PHYDM_INFO_CRC32_OK_LEGACY); -+ coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter( -+ btcoexist, -+ PHYDM_INFO_CRC32_OK_HT); -+ coex_sta->crc_ok_11n_vht = btcoexist->btc_phydm_query_PHY_counter( -+ btcoexist, -+ PHYDM_INFO_CRC32_OK_VHT); -+ -+ coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter( -+ btcoexist, PHYDM_INFO_CRC32_ERROR_CCK); -+ coex_sta->crc_err_11g = btcoexist->btc_phydm_query_PHY_counter( -+ btcoexist, PHYDM_INFO_CRC32_ERROR_LEGACY); -+ coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter( -+ btcoexist, PHYDM_INFO_CRC32_ERROR_HT); -+ coex_sta->crc_err_11n_vht = btcoexist->btc_phydm_query_PHY_counter( -+ btcoexist, -+ PHYDM_INFO_CRC32_ERROR_VHT); -+ -+ cnt_crcok = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g -+ + coex_sta->crc_ok_11n -+ + coex_sta->crc_ok_11n_vht; -+ -+ cnt_crcerr = coex_sta->crc_err_cck + coex_sta->crc_err_11g -+ + coex_sta->crc_err_11n -+ + coex_sta->crc_err_11n_vht; -+ -+ /* CCK lock identification */ -+ if (coex_sta->cck_lock) -+ cnt_ccklocking++; -+ else if (cnt_ccklocking != 0) -+ cnt_ccklocking--; -+ -+ if (cnt_ccklocking >= 3) { -+ cnt_ccklocking = 3; -+ coex_sta->cck_lock_ever = TRUE; -+ } -+ -+ /* WiFi environment noisy identification */ -+ cnt_cck = coex_sta->crc_ok_cck + coex_sta->crc_err_cck; -+ -+ if ((!wifi_busy) && (!coex_sta->cck_lock)) { -+ if (cnt_cck > 250) { -+ if (wl_noisy_count2 < 3) -+ wl_noisy_count2++; -+ -+ if (wl_noisy_count2 == 3) { -+ wl_noisy_count0 = 0; -+ wl_noisy_count1 = 0; -+ } -+ -+ } else if (cnt_cck < 50) { -+ if (wl_noisy_count0 < 3) -+ wl_noisy_count0++; -+ -+ if (wl_noisy_count0 == 3) { -+ wl_noisy_count1 = 0; -+ wl_noisy_count2 = 0; -+ } -+ -+ } else { -+ if (wl_noisy_count1 < 3) -+ wl_noisy_count1++; -+ -+ if (wl_noisy_count1 == 3) { -+ wl_noisy_count0 = 0; -+ wl_noisy_count2 = 0; -+ } -+ } -+ -+ if (wl_noisy_count2 == 3) -+ coex_sta->wl_noisy_level = 2; -+ else if (wl_noisy_count1 == 3) -+ coex_sta->wl_noisy_level = 1; -+ else -+ coex_sta->wl_noisy_level = 0; -+ } -+ -+} -+ -+ -+ -+ -+void halbtc8703b1ant_update_bt_link_info(IN struct btc_coexist *btcoexist) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ boolean bt_hs_on = FALSE; -+ boolean bt_busy = FALSE; -+ u32 val = 0; -+ static u8 pre_num_of_profile = 0, cur_num_of_profile = 0, cnt = 0; -+ -+ if (coex_sta->is_ble_scan_toggle) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n"); -+ BTC_TRACE(trace_buf); -+ coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(btcoexist); -+ -+ if ((coex_sta->bt_ble_scan_type & 0x1) == 0x1) -+ coex_sta->bt_ble_scan_para[0] = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x1); -+ if ((coex_sta->bt_ble_scan_type & 0x2) == 0x2) -+ coex_sta->bt_ble_scan_para[1] = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x2); -+ if ((coex_sta->bt_ble_scan_type & 0x4) == 0x4) -+ coex_sta->bt_ble_scan_para[2] = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x4); -+ } -+ -+ coex_sta->num_of_profile = 0; -+ -+ /* set link exist status */ -+ if (!(coex_sta->bt_info & BT_INFO_8703B_1ANT_B_CONNECTION)) { -+ coex_sta->bt_link_exist = FALSE; -+ coex_sta->pan_exist = FALSE; -+ coex_sta->a2dp_exist = FALSE; -+ coex_sta->hid_exist = FALSE; -+ coex_sta->sco_exist = FALSE; -+ } else { /* connection exists */ -+ coex_sta->bt_link_exist = TRUE; -+ if (coex_sta->bt_info & BT_INFO_8703B_1ANT_B_FTP) { -+ coex_sta->pan_exist = TRUE; -+ coex_sta->num_of_profile++; -+ } else -+ coex_sta->pan_exist = FALSE; -+ -+ if (coex_sta->bt_info & BT_INFO_8703B_1ANT_B_A2DP) { -+ coex_sta->a2dp_exist = TRUE; -+ coex_sta->num_of_profile++; -+ } else -+ coex_sta->a2dp_exist = FALSE; -+ -+ if (coex_sta->bt_info & BT_INFO_8703B_1ANT_B_HID) { -+ coex_sta->hid_exist = TRUE; -+ coex_sta->num_of_profile++; -+ } else -+ coex_sta->hid_exist = FALSE; -+ -+ if (coex_sta->bt_info & BT_INFO_8703B_1ANT_B_SCO_ESCO) { -+ coex_sta->sco_exist = TRUE; -+ coex_sta->num_of_profile++; -+ } else -+ coex_sta->sco_exist = FALSE; -+ -+ } -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); -+ -+ bt_link_info->bt_link_exist = coex_sta->bt_link_exist; -+ bt_link_info->sco_exist = coex_sta->sco_exist; -+ bt_link_info->a2dp_exist = coex_sta->a2dp_exist; -+ bt_link_info->pan_exist = coex_sta->pan_exist; -+ bt_link_info->hid_exist = coex_sta->hid_exist; -+ bt_link_info->acl_busy = coex_sta->acl_busy; -+ -+ /* work around for HS mode. */ -+ if (bt_hs_on) { -+ bt_link_info->pan_exist = TRUE; -+ bt_link_info->bt_link_exist = TRUE; -+ } -+ -+ /* check if Sco only */ -+ if (bt_link_info->sco_exist && -+ !bt_link_info->a2dp_exist && -+ !bt_link_info->pan_exist && -+ !bt_link_info->hid_exist) -+ bt_link_info->sco_only = TRUE; -+ else -+ bt_link_info->sco_only = FALSE; -+ -+ /* check if A2dp only */ -+ if (!bt_link_info->sco_exist && -+ bt_link_info->a2dp_exist && -+ !bt_link_info->pan_exist && -+ !bt_link_info->hid_exist) -+ bt_link_info->a2dp_only = TRUE; -+ else -+ bt_link_info->a2dp_only = FALSE; -+ -+ /* check if Pan only */ -+ if (!bt_link_info->sco_exist && -+ !bt_link_info->a2dp_exist && -+ bt_link_info->pan_exist && -+ !bt_link_info->hid_exist) -+ bt_link_info->pan_only = TRUE; -+ else -+ bt_link_info->pan_only = FALSE; -+ -+ /* check if Hid only */ -+ if (!bt_link_info->sco_exist && -+ !bt_link_info->a2dp_exist && -+ !bt_link_info->pan_exist && -+ bt_link_info->hid_exist) -+ bt_link_info->hid_only = TRUE; -+ else -+ bt_link_info->hid_only = FALSE; -+ -+ if (coex_sta->bt_info & BT_INFO_8703B_1ANT_B_INQ_PAGE) { -+ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_INQ_PAGE; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BtInfoNotify(), BT Inq/page!!!\n"); -+ } else if (!(coex_sta->bt_info & BT_INFO_8703B_1ANT_B_CONNECTION)) { -+ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"); -+ } else if (coex_sta->bt_info == BT_INFO_8703B_1ANT_B_CONNECTION) { -+ /* connection exists but no busy */ -+ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"); -+ } else if (((coex_sta->bt_info & BT_INFO_8703B_1ANT_B_SCO_ESCO) || -+ (coex_sta->bt_info & BT_INFO_8703B_1ANT_B_SCO_BUSY)) && -+ (coex_sta->bt_info & BT_INFO_8703B_1ANT_B_ACL_BUSY)) { -+ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BtInfoNotify(), BT ACL SCO busy!!!\n"); -+ } else if ((coex_sta->bt_info & BT_INFO_8703B_1ANT_B_SCO_ESCO) || -+ (coex_sta->bt_info & BT_INFO_8703B_1ANT_B_SCO_BUSY)) { -+ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_SCO_BUSY; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"); -+ } else if (coex_sta->bt_info & BT_INFO_8703B_1ANT_B_ACL_BUSY) { -+ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_ACL_BUSY; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"); -+ } else { -+ coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_MAX; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"); -+ } -+ -+ BTC_TRACE(trace_buf); -+ -+ if ((BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || -+ (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || -+ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) -+ bt_busy = TRUE; -+ else -+ bt_busy = FALSE; -+ -+ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); -+ -+ cur_num_of_profile = coex_sta->num_of_profile; -+ -+ if (cur_num_of_profile != pre_num_of_profile) -+ cnt = 2; -+ -+ if (bt_link_info->a2dp_exist) { -+ -+ if (((coex_sta->bt_a2dp_vendor_id == 0) && -+ (coex_sta->bt_a2dp_device_name == 0)) || -+ (cur_num_of_profile != pre_num_of_profile)) { -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_DEVICE_INFO, &val); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BtInfoNotify(), get BT DEVICE_INFO = %x\n", val); -+ BTC_TRACE(trace_buf); -+ -+ coex_sta->bt_a2dp_vendor_id = (u8)(val & 0xff); -+ coex_sta->bt_a2dp_device_name = (val & 0xffffff00) >> 8; -+ } -+ -+ if (((coex_sta->legacy_forbidden_slot == 0) && -+ (coex_sta->le_forbidden_slot == 0)) || -+ (cur_num_of_profile != pre_num_of_profile) || -+ (cnt > 0)) { -+ -+ if (cnt > 0) -+ cnt--; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL, &val); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BtInfoNotify(), get BT FORBIDDEN_SLOT_VAL = %x\n", val); -+ BTC_TRACE(trace_buf); -+ -+ coex_sta->legacy_forbidden_slot = (u16)(val & 0xffff); -+ coex_sta->le_forbidden_slot = (u16)((val & 0xffff0000) >> 16); -+ } -+ } -+ -+ pre_num_of_profile = coex_sta->num_of_profile; -+ -+} -+ -+ -+void halbtc8703b1ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist, -+ IN u8 type) -+{ -+ u8 h2c_parameter[3] = {0}; -+ u32 wifi_bw; -+ u8 wifi_central_chnl; -+ -+ /* only 2.4G we need to inform bt the chnl mask */ -+ btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, -+ &wifi_central_chnl); -+ if ((BTC_MEDIA_CONNECT == type) && -+ (wifi_central_chnl <= 14)) { -+ h2c_parameter[0] = -+ 0x1; /* enable BT AFH skip WL channel for 8703b because BT Rx LO interference */ -+ /* h2c_parameter[0] = 0x0; */ -+ h2c_parameter[1] = wifi_central_chnl; -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); -+ if (BTC_WIFI_BW_HT40 == wifi_bw) -+ h2c_parameter[2] = 0x30; -+ else -+ h2c_parameter[2] = 0x20; -+ } -+ -+ coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; -+ coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; -+ coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; -+ -+ btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); -+ -+} -+ -+void halbtc8703b1ant_set_bt_auto_report(IN struct btc_coexist *btcoexist, -+ IN boolean enable_auto_report) -+{ -+ u8 h2c_parameter[1] = {0}; -+ -+ h2c_parameter[0] = 0; -+ -+ if (enable_auto_report) -+ h2c_parameter[0] |= BIT(0); -+ -+ btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); -+} -+ -+void halbtc8703b1ant_bt_auto_report(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN boolean enable_auto_report) -+{ -+ coex_dm->cur_bt_auto_report = enable_auto_report; -+ -+ if (!force_exec) { -+ if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) -+ return; -+ } -+ halbtc8703b1ant_set_bt_auto_report(btcoexist, -+ coex_dm->cur_bt_auto_report); -+ -+ coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; -+} -+ -+void halbtc8703b1ant_set_fw_low_penalty_ra(IN struct btc_coexist -+ *btcoexist, IN boolean low_penalty_ra) -+{ -+ u8 h2c_parameter[6] = {0}; -+ -+ h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */ -+ -+ if (low_penalty_ra) { -+ h2c_parameter[1] |= BIT(0); -+ h2c_parameter[2] = -+ 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */ -+ h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */ -+ h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */ -+ h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */ -+ } -+ -+ btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter); -+} -+ -+void halbtc8703b1ant_low_penalty_ra(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN boolean low_penalty_ra) -+{ -+ coex_dm->cur_low_penalty_ra = low_penalty_ra; -+ -+ if (!force_exec) { -+ if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) -+ return; -+ } -+ -+ halbtc8703b1ant_set_fw_low_penalty_ra(btcoexist, -+ coex_dm->cur_low_penalty_ra); -+ -+ coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; -+} -+ -+void halbtc8703b1ant_write_score_board( -+ IN struct btc_coexist *btcoexist, -+ IN u16 bitpos, -+ IN boolean state -+) -+{ -+ -+ static u16 originalval = 0x8002, preval = 0x0; -+ -+ if (state) -+ originalval = originalval | bitpos; -+ else -+ originalval = originalval & (~bitpos); -+ -+ coex_sta->score_board_WB = originalval; -+ -+ if (originalval != preval) { -+ -+ preval = originalval; -+ btcoexist->btc_write_2byte(btcoexist, 0xaa, originalval); -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], halbtc8703b1ant_write_score_board: return for nochange\n"); -+ BTC_TRACE(trace_buf); -+ } -+} -+ -+ -+void halbtc8703b1ant_read_score_board( -+ IN struct btc_coexist *btcoexist, -+ IN u16 *score_board_val -+) -+{ -+ -+ *score_board_val = (btcoexist->btc_read_2byte(btcoexist, -+ 0xaa)) & 0x7fff; -+} -+ -+void halbtc8703b1ant_post_state_to_bt( -+ IN struct btc_coexist *btcoexist, -+ IN u16 type, -+ IN boolean state -+) -+{ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], halbtc8703b1ant_post_state_to_bt: type = %d, state =%d\n", -+ type, state); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_write_score_board(btcoexist, (u16) type, state); -+} -+ -+boolean halbtc8703b1ant_is_wifibt_status_changed(IN struct btc_coexist -+ *btcoexist) -+{ -+ static boolean pre_wifi_busy = FALSE, pre_under_4way = FALSE, -+ pre_bt_hs_on = FALSE, pre_bt_off = FALSE, -+ pre_bt_slave = FALSE, pre_hid_low_pri_tx_overhead = FALSE, -+ pre_wifi_under_lps = FALSE, pre_bt_setup_link = FALSE, -+ pre_cck_lock = FALSE, pre_cck_lock_warn = FALSE; -+ static u8 pre_hid_busy_num = 0, pre_wl_noisy_level = 0; -+ boolean wifi_busy = FALSE, under_4way = FALSE, bt_hs_on = FALSE; -+ boolean wifi_connected = FALSE; -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, -+ &wifi_connected); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, -+ &under_4way); -+ -+ if (coex_sta->bt_disabled != pre_bt_off) { -+ pre_bt_off = coex_sta->bt_disabled; -+ -+ if (coex_sta->bt_disabled) -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT is disabled !!\n"); -+ else -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT is enabled !!\n"); -+ -+ BTC_TRACE(trace_buf); -+ -+ coex_sta->bt_coex_supported_feature = 0; -+ coex_sta->bt_coex_supported_version = 0; -+ coex_sta->bt_ble_scan_type = 0; -+ coex_sta->bt_ble_scan_para[0] = 0; -+ coex_sta->bt_ble_scan_para[1] = 0; -+ coex_sta->bt_ble_scan_para[2] = 0; -+ coex_sta->legacy_forbidden_slot = 0; -+ coex_sta->le_forbidden_slot = 0; -+ coex_sta->bt_a2dp_vendor_id = 0; -+ coex_sta->bt_a2dp_device_name = 0; -+ -+ return TRUE; -+ } -+ -+ if (wifi_connected) { -+ if (wifi_busy != pre_wifi_busy) { -+ pre_wifi_busy = wifi_busy; -+ -+ if (wifi_busy) -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_UNDERTEST, TRUE); -+ else -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_UNDERTEST, FALSE); -+ return TRUE; -+ } -+ if (under_4way != pre_under_4way) { -+ pre_under_4way = under_4way; -+ return TRUE; -+ } -+ if (bt_hs_on != pre_bt_hs_on) { -+ pre_bt_hs_on = bt_hs_on; -+ return TRUE; -+ } -+ if (coex_sta->wl_noisy_level != pre_wl_noisy_level) { -+ pre_wl_noisy_level = coex_sta->wl_noisy_level; -+ return TRUE; -+ } -+ if (coex_sta->under_lps != pre_wifi_under_lps) { -+ pre_wifi_under_lps = coex_sta->under_lps; -+ if (coex_sta->under_lps == TRUE) -+ return TRUE; -+ } -+ if (coex_sta->cck_lock != pre_cck_lock) { -+ pre_cck_lock = coex_sta->cck_lock; -+ return TRUE; -+ } -+ if (coex_sta->cck_lock_warn != pre_cck_lock_warn) { -+ pre_cck_lock_warn = coex_sta->cck_lock_warn; -+ return TRUE; -+ } -+ } -+ -+ if (!coex_sta->bt_disabled) { -+ if (coex_sta->hid_busy_num != pre_hid_busy_num) { -+ pre_hid_busy_num = coex_sta->hid_busy_num; -+ return TRUE; -+ } -+ -+ if (bt_link_info->slave_role != pre_bt_slave) { -+ pre_bt_slave = bt_link_info->slave_role; -+ return TRUE; -+ } -+ -+ if (pre_hid_low_pri_tx_overhead != coex_sta->is_hid_low_pri_tx_overhead) { -+ pre_hid_low_pri_tx_overhead = coex_sta->is_hid_low_pri_tx_overhead; -+ return TRUE; -+ } -+ -+ if (pre_bt_setup_link != coex_sta->is_setupLink) { -+ pre_bt_setup_link = coex_sta->is_setupLink; -+ return TRUE; -+ } -+ } -+ -+ return FALSE; -+} -+ -+ -+void halbtc8703b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist) -+{ -+ static u32 bt_disable_cnt = 0; -+ boolean bt_active = TRUE, bt_disabled = FALSE; -+ u16 u16tmp; -+ -+ /* This function check if bt is disabled */ -+#if 1 -+ if (coex_sta->high_priority_tx == 0 && -+ coex_sta->high_priority_rx == 0 && -+ coex_sta->low_priority_tx == 0 && -+ coex_sta->low_priority_rx == 0) -+ bt_active = FALSE; -+ if (coex_sta->high_priority_tx == 0xffff && -+ coex_sta->high_priority_rx == 0xffff && -+ coex_sta->low_priority_tx == 0xffff && -+ coex_sta->low_priority_rx == 0xffff) -+ bt_active = FALSE; -+ -+ -+#else /* 8703b BT can't show correct on/off status in scoreboard[1] 2015/11/26 */ -+ -+ halbtc8703b1ant_read_score_board(btcoexist, &u16tmp); -+ -+ bt_active = u16tmp & BIT(1); -+ -+ -+#endif -+ -+ if (bt_active) { -+ bt_disable_cnt = 0; -+ bt_disabled = FALSE; -+ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, -+ &bt_disabled); -+ } else { -+ -+ bt_disable_cnt++; -+ if (bt_disable_cnt >= 10) { -+ bt_disabled = TRUE; -+ bt_disable_cnt = 10; -+ } -+ -+ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, -+ &bt_disabled); -+ } -+ -+ if (bt_disabled) -+ halbtc8703b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, FALSE); -+ else -+ halbtc8703b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, TRUE); -+ -+ if (coex_sta->bt_disabled != bt_disabled) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT is from %s to %s!!\n", -+ (coex_sta->bt_disabled ? "disabled" : "enabled"), -+ (bt_disabled ? "disabled" : "enabled")); -+ BTC_TRACE(trace_buf); -+ coex_sta->bt_disabled = bt_disabled; -+ -+ } -+} -+ -+ -+ -+void halbtc8703b1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist, -+ IN boolean isenable) -+{ -+ -+#if (BT_8703B_1ANT_ENABLE_GNTBT_TO_GPIO14 == 1) -+ if (isenable) { -+ /* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */ -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x1); -+ -+ /* enable GNT_BT debug to GPIO */ -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x0); -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x0); -+ } else { -+ /* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */ -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x0); -+ -+ /* Disable GNT_BT debug to GPIO, and enable chip_wakeup_host */ -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x1); -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x1); -+ } -+#endif -+} -+ -+u32 halbtc8703b1ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist, -+ IN u16 reg_addr) -+{ -+ u32 j = 0, delay_count = 0; -+ -+ /* wait for ready bit before access 0x7c0/0x7c4 */ -+ while (1) { -+ if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) { -+ delay_ms(50); -+ delay_count++; -+ if (delay_count >= 10) { -+ delay_count = 0; -+ break; -+ } -+ } else -+ break; -+ } -+ -+ btcoexist->btc_write_4byte(btcoexist, 0x7c0, 0x800F0000 | reg_addr); -+ -+ return btcoexist->btc_read_4byte(btcoexist, -+ 0x7c8); /* get read data */ -+ -+} -+ -+void halbtc8703b1ant_ltecoex_indirect_write_reg(IN struct btc_coexist -+ *btcoexist, -+ IN u16 reg_addr, IN u32 bit_mask, IN u32 reg_value) -+{ -+ u32 val, i = 0, j = 0, bitpos = 0, delay_count = 0; -+ -+ if (bit_mask == 0x0) -+ return; -+ if (bit_mask == 0xffffffff) { -+ /* wait for ready bit before access 0x7c0/0x7c4 */ -+ while (1) { -+ if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) { -+ delay_ms(50); -+ delay_count++; -+ if (delay_count >= 10) { -+ delay_count = 0; -+ break; -+ } -+ } else -+ break; -+ } -+ -+ btcoexist->btc_write_4byte(btcoexist, 0x7c4, -+ reg_value); /* put write data */ -+ -+ btcoexist->btc_write_4byte(btcoexist, 0x7c0, -+ 0xc00F0000 | reg_addr); -+ } else { -+ for (i = 0; i <= 31; i++) { -+ if (((bit_mask >> i) & 0x1) == 0x1) { -+ bitpos = i; -+ break; -+ } -+ } -+ -+ /* read back register value before write */ -+ val = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ reg_addr); -+ val = (val & (~bit_mask)) | (reg_value << bitpos); -+ -+ /* wait for ready bit before access 0x7c0/0x7c4 */ -+ while (1) { -+ if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) { -+ delay_ms(50); -+ delay_count++; -+ if (delay_count >= 10) { -+ delay_count = 0; -+ break; -+ } -+ } else -+ break; -+ } -+ -+ btcoexist->btc_write_4byte(btcoexist, 0x7c4, -+ val); /* put write data */ -+ -+ btcoexist->btc_write_4byte(btcoexist, 0x7c0, -+ 0xc00F0000 | reg_addr); -+ -+ } -+ -+} -+ -+void halbtc8703b1ant_ltecoex_enable(IN struct btc_coexist *btcoexist, -+ IN boolean enable) -+{ -+ u8 val; -+ -+ val = (enable) ? 1 : 0; -+ halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist, 0x38, 0x80, -+ val); /* 0x38[7] */ -+ -+} -+ -+void halbtc8703b1ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist, -+ IN boolean wifi_control) -+{ -+ u8 val; -+ -+ val = (wifi_control) ? 1 : 0; -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x4, -+ val); /* 0x70[26] */ -+ -+} -+ -+void halbtc8703b1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist, -+ IN u8 control_block, IN boolean sw_control, IN u8 state) -+{ -+ u32 val = 0, val_orig = 0; -+ -+ if (!sw_control) -+ val = 0x0; -+ else if (state & 0x1) -+ val = 0x3; -+ else -+ val = 0x1; -+ -+ val_orig = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ 0x38); -+ -+ switch (control_block) { -+ case BT_8703B_1ANT_GNT_BLOCK_RFC_BB: -+ default: -+ val = ((val << 14) | (val << 10)) | (val_orig & 0xffff33ff); -+ break; -+ case BT_8703B_1ANT_GNT_BLOCK_RFC: -+ val = (val << 14) | (val_orig & 0xffff3fff); -+ break; -+ case BT_8703B_1ANT_GNT_BLOCK_BB: -+ val = (val << 10) | (val_orig & 0xfffff3ff); -+ break; -+ } -+ -+ halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist, -+ 0x38, 0xffffffff, val); -+} -+ -+ -+void halbtc8703b1ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist, -+ IN u8 control_block, IN boolean sw_control, IN u8 state) -+{ -+ u32 val = 0, val_orig = 0; -+ -+ if (!sw_control) -+ val = 0x0; -+ else if (state & 0x1) -+ val = 0x3; -+ else -+ val = 0x1; -+ -+ val_orig = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ 0x38); -+ -+ switch (control_block) { -+ case BT_8703B_1ANT_GNT_BLOCK_RFC_BB: -+ default: -+ val = ((val << 12) | (val << 8)) | (val_orig & 0xffffccff); -+ break; -+ case BT_8703B_1ANT_GNT_BLOCK_RFC: -+ val = (val << 12) | (val_orig & 0xffffcfff); -+ break; -+ case BT_8703B_1ANT_GNT_BLOCK_BB: -+ val = (val << 8) | (val_orig & 0xfffffcff); -+ break; -+ } -+ -+ halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist, -+ 0x38, 0xffffffff, val); -+} -+ -+ -+void halbtc8703b1ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist, -+ IN u8 table_type, IN u16 table_content) -+{ -+ u16 reg_addr = 0x0000; -+ -+ switch (table_type) { -+ case BT_8703B_1ANT_CTT_WL_VS_LTE: -+ reg_addr = 0xa0; -+ break; -+ case BT_8703B_1ANT_CTT_BT_VS_LTE: -+ reg_addr = 0xa4; -+ break; -+ } -+ -+ if (reg_addr != 0x0000) -+ halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist, reg_addr, -+ 0xffff, table_content); /* 0xa0[15:0] or 0xa4[15:0] */ -+ -+ -+} -+ -+ -+void halbtc8703b1ant_ltecoex_set_break_table(IN struct btc_coexist *btcoexist, -+ IN u8 table_type, IN u8 table_content) -+{ -+ u16 reg_addr = 0x0000; -+ -+ switch (table_type) { -+ case BT_8703B_1ANT_LBTT_WL_BREAK_LTE: -+ reg_addr = 0xa8; -+ break; -+ case BT_8703B_1ANT_LBTT_BT_BREAK_LTE: -+ reg_addr = 0xac; -+ break; -+ case BT_8703B_1ANT_LBTT_LTE_BREAK_WL: -+ reg_addr = 0xb0; -+ break; -+ case BT_8703B_1ANT_LBTT_LTE_BREAK_BT: -+ reg_addr = 0xb4; -+ break; -+ } -+ -+ if (reg_addr != 0x0000) -+ halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist, reg_addr, -+ 0xff, table_content); /* 0xa8[15:0] or 0xb4[15:0] */ -+ -+ -+} -+ -+void halbtc8703b1ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN u8 interval, -+ IN u8 val0x6c4_b0, IN u8 val0x6c4_b1, IN u8 val0x6c4_b2, -+ IN u8 val0x6c4_b3) -+{ -+ static u8 pre_h2c_parameter[6] = {0}; -+ u8 cur_h2c_parameter[6] = {0}; -+ u8 i, match_cnt = 0; -+ -+ cur_h2c_parameter[0] = 0x7; /* op_code, 0x7= wlan toggle slot*/ -+ -+ cur_h2c_parameter[1] = interval; -+ cur_h2c_parameter[2] = val0x6c4_b0; -+ cur_h2c_parameter[3] = val0x6c4_b1; -+ cur_h2c_parameter[4] = val0x6c4_b2; -+ cur_h2c_parameter[5] = val0x6c4_b3; -+ -+ if (!force_exec) { -+ for (i = 1; i <= 5; i++) { -+ if (cur_h2c_parameter[i] != pre_h2c_parameter[i]) -+ break; -+ -+ match_cnt++; -+ } -+ -+ if (match_cnt == 5) -+ return; -+ } -+ -+ for (i = 1; i <= 5; i++) -+ pre_h2c_parameter[i] = cur_h2c_parameter[i]; -+ -+ btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, cur_h2c_parameter); -+} -+ -+ -+void halbtc8703b1ant_set_coex_table(IN struct btc_coexist *btcoexist, -+ IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc) -+{ -+ btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); -+ -+ btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); -+ -+ btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); -+ -+ btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); -+} -+ -+void halbtc8703b1ant_coex_table(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4, -+ IN u32 val0x6c8, IN u8 val0x6cc) -+{ -+ coex_dm->cur_val0x6c0 = val0x6c0; -+ coex_dm->cur_val0x6c4 = val0x6c4; -+ coex_dm->cur_val0x6c8 = val0x6c8; -+ coex_dm->cur_val0x6cc = val0x6cc; -+ -+ if (!force_exec) { -+ if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && -+ (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && -+ (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && -+ (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) -+ return; -+ } -+ halbtc8703b1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, -+ val0x6cc); -+ -+ coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; -+ coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; -+ coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; -+ coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; -+} -+ -+void halbtc8703b1ant_coex_table_with_type(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN u8 type) -+{ -+ u32 break_table; -+ u8 select_table; -+ -+ coex_sta->coex_table_type = type; -+ -+ if (coex_sta->concurrent_rx_mode_on == TRUE) { -+ break_table = 0xf0ffffff; /* set WL hi-pri can break BT */ -+ select_table = -+ 0xb; /* set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) */ -+ } else { -+ break_table = 0xffffff; -+ select_table = 0x3; -+ } -+ -+ switch (type) { -+ case 0: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0x55555555, 0x55555555, break_table, -+ select_table); -+ break; -+ case 1: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xa5555555, 0xaa5a5a5a, break_table, -+ select_table); -+ break; -+ case 2: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xaa5a5a5a, 0xaa5a5a5a, break_table, -+ select_table); -+ break; -+ case 3: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0x55555555, 0x5a5a5a5a, break_table, -+ select_table); -+ break; -+ case 4: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xa5555555, 0xaa5a5a5a, break_table, -+ select_table); -+ break; -+ case 5: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0x5a5a5a5a, 0x5a5a5a5a, break_table, -+ select_table); -+ break; -+ case 6: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xa5555555, 0xaa5a5a5a, break_table, -+ select_table); -+ break; -+ case 7: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xaa555555, 0xaa555555, break_table, -+ select_table); -+ break; -+ case 8: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xa5555555, 0xaaaa5aaa, break_table, -+ select_table); -+ break; -+ case 9: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0x5a5a5a5a, 0xaaaa5aaa, break_table, -+ select_table); -+ break; -+ case 10: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xaaaaaaaa, 0xaaaaaaaa, break_table, -+ select_table); -+ break; -+ case 11: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xa5a55555, 0xaaaa5a5a, break_table, -+ select_table); -+ break; -+ case 12: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xa5555555, 0xaaaa5a5a, break_table, -+ select_table); -+ break; -+ case 13: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xaa5555aa, 0xaa5a5a5a, break_table, -+ select_table); -+ break; -+ case 14: -+ halbtc8703b1ant_coex_table(btcoexist, force_exec, -+ 0xaa5555aa, 0x5a5a5a5a, break_table, -+ select_table); -+ break; -+ default: -+ break; -+ } -+} -+ -+void halbtc8703b1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist, -+ IN boolean enable) -+{ -+ u8 h2c_parameter[1] = {0}; -+ -+ if (enable) -+ h2c_parameter[0] |= BIT(0);/* function enable */ -+ -+ btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); -+} -+ -+void halbtc8703b1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN boolean enable) -+{ -+ coex_dm->cur_ignore_wlan_act = enable; -+ -+ if (!force_exec) { -+ if (coex_dm->pre_ignore_wlan_act == -+ coex_dm->cur_ignore_wlan_act) -+ return; -+ } -+ halbtc8703b1ant_set_fw_ignore_wlan_act(btcoexist, enable); -+ -+ coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; -+} -+ -+void halbtc8703b1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist, -+ IN u8 lps_val, IN u8 rpwm_val) -+{ -+ u8 lps = lps_val; -+ u8 rpwm = rpwm_val; -+ -+ btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps); -+ btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm); -+} -+ -+void halbtc8703b1ant_lps_rpwm(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val) -+{ -+ coex_dm->cur_lps = lps_val; -+ coex_dm->cur_rpwm = rpwm_val; -+ -+ if (!force_exec) { -+ if ((coex_dm->pre_lps == coex_dm->cur_lps) && -+ (coex_dm->pre_rpwm == coex_dm->cur_rpwm)) -+ return; -+ } -+ halbtc8703b1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val); -+ -+ coex_dm->pre_lps = coex_dm->cur_lps; -+ coex_dm->pre_rpwm = coex_dm->cur_rpwm; -+} -+ -+void halbtc8703b1ant_ps_tdma_check_for_power_save_state( -+ IN struct btc_coexist *btcoexist, IN boolean new_ps_state) -+{ -+ u8 lps_mode = 0x0; -+ u8 h2c_parameter[5] = {0x8, 0, 0, 0, 0}; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode); -+ -+ if (lps_mode) { /* already under LPS state */ -+ if (new_ps_state) { -+ /* keep state under LPS, do nothing. */ -+ } else { -+ /* will leave LPS state, turn off psTdma first */ -+ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, -+ h2c_parameter); -+ } -+ } else { /* NO PS state */ -+ if (new_ps_state) { -+ /* will enter LPS state, turn off psTdma first */ -+ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, -+ h2c_parameter); -+ } else { -+ /* keep state under NO PS state, do nothing. */ -+ } -+ } -+} -+ -+void halbtc8703b1ant_power_save_state(IN struct btc_coexist *btcoexist, -+ IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val) -+{ -+ boolean low_pwr_disable = FALSE; -+ -+ switch (ps_type) { -+ case BTC_PS_WIFI_NATIVE: -+ /* recover to original 32k low power setting */ -+ coex_sta->force_lps_ctrl = FALSE; -+ low_pwr_disable = FALSE; -+ /* btcoexist->btc_set(btcoexist, -+ BTC_SET_ACT_DISABLE_LOW_POWER, -+ &low_pwr_disable); */ -+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_PRE_NORMAL_LPS, -+ NULL); -+ -+ break; -+ case BTC_PS_LPS_ON: -+ coex_sta->force_lps_ctrl = TRUE; -+ halbtc8703b1ant_ps_tdma_check_for_power_save_state( -+ btcoexist, TRUE); -+ halbtc8703b1ant_lps_rpwm(btcoexist, NORMAL_EXEC, -+ lps_val, rpwm_val); -+ /* when coex force to enter LPS, do not enter 32k low power. */ -+ low_pwr_disable = TRUE; -+ btcoexist->btc_set(btcoexist, -+ BTC_SET_ACT_DISABLE_LOW_POWER, -+ &low_pwr_disable); -+ /* power save must executed before psTdma. */ -+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, -+ NULL); -+ -+ break; -+ case BTC_PS_LPS_OFF: -+ coex_sta->force_lps_ctrl = TRUE; -+ halbtc8703b1ant_ps_tdma_check_for_power_save_state( -+ btcoexist, FALSE); -+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, -+ NULL); -+ -+ break; -+ default: -+ break; -+ } -+} -+ -+ -+ -+void halbtc8703b1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist, -+ IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5) -+{ -+ u8 h2c_parameter[5] = {0}; -+ u8 real_byte1 = byte1, real_byte5 = byte5; -+ boolean ap_enable = FALSE; -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ u8 ps_type = BTC_PS_WIFI_NATIVE; -+ -+ if (byte5 & BIT(2)) -+ coex_sta->is_tdma_btautoslot = TRUE; -+ else -+ coex_sta->is_tdma_btautoslot = FALSE; -+ -+ /* release bt-auto slot for auto-slot hang is detected!! */ -+ if (coex_sta->is_tdma_btautoslot) -+ if ((coex_sta->is_tdma_btautoslot_hang) || -+ (bt_link_info->slave_role)) -+ byte5 = byte5 & 0xfb; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, -+ &ap_enable); -+ -+ if ((ap_enable) && (byte1 & BIT(4) && !(byte1 & BIT(5)))) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], FW for AP mode\n"); -+ BTC_TRACE(trace_buf); -+ real_byte1 &= ~BIT(4); -+ real_byte1 |= BIT(5); -+ -+ real_byte5 |= BIT(5); -+ real_byte5 &= ~BIT(6); -+ -+ ps_type = BTC_PS_WIFI_NATIVE; -+ halbtc8703b1ant_power_save_state(btcoexist, -+ ps_type, 0x0, -+ 0x0); -+ } else if (byte1 & BIT(4) && !(byte1 & BIT(5))) { -+ -+ ps_type = BTC_PS_LPS_ON; -+ halbtc8703b1ant_power_save_state( -+ btcoexist, ps_type, 0x50, -+ 0x4); -+ } else { -+ ps_type = BTC_PS_WIFI_NATIVE; -+ halbtc8703b1ant_power_save_state(btcoexist, ps_type, -+ 0x0, -+ 0x0); -+ } -+ -+ h2c_parameter[0] = real_byte1; -+ h2c_parameter[1] = byte2; -+ h2c_parameter[2] = byte3; -+ h2c_parameter[3] = byte4; -+ h2c_parameter[4] = real_byte5; -+ -+ coex_dm->ps_tdma_para[0] = real_byte1; -+ coex_dm->ps_tdma_para[1] = byte2; -+ coex_dm->ps_tdma_para[2] = byte3; -+ coex_dm->ps_tdma_para[3] = byte4; -+ coex_dm->ps_tdma_para[4] = real_byte5; -+ -+ btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); -+ -+ if (ps_type == BTC_PS_WIFI_NATIVE) -+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_POST_NORMAL_LPS, NULL); -+} -+ -+ -+void halbtc8703b1ant_ps_tdma(IN struct btc_coexist *btcoexist, -+ IN boolean force_exec, IN boolean turn_on, IN u8 type) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ boolean wifi_busy = FALSE; -+ u8 rssi_adjust_val = 0; -+ static u8 psTdmaByte4Modify = 0x0, pre_psTdmaByte4Modify = 0x0; -+ static boolean pre_wifi_busy = FALSE; -+ -+ coex_dm->cur_ps_tdma_on = turn_on; -+ coex_dm->cur_ps_tdma = type; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); -+ -+ if (wifi_busy != pre_wifi_busy) { -+ force_exec = TRUE; -+ pre_wifi_busy = wifi_busy; -+ } -+ -+ /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */ -+ if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist)) -+ psTdmaByte4Modify = 0x1; -+ else -+ psTdmaByte4Modify = 0x0; -+ -+ if (pre_psTdmaByte4Modify != psTdmaByte4Modify) { -+ -+ force_exec = TRUE; -+ pre_psTdmaByte4Modify = psTdmaByte4Modify; -+ } -+ -+ if (!force_exec) { -+ if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && -+ (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) -+ return; -+ } -+ -+ if (coex_dm->cur_ps_tdma_on) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], ********** TDMA(on, %d) **********\n", -+ coex_dm->cur_ps_tdma); -+ BTC_TRACE(trace_buf); -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], ********** TDMA(off, %d) **********\n", -+ coex_dm->cur_ps_tdma); -+ BTC_TRACE(trace_buf); -+ } -+ -+ if (turn_on) { -+ -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8, -+ 0x1); /* enable TBTT nterrupt */ -+ } -+ -+ -+ if (turn_on) { -+ switch (type) { -+ default: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x35, 0x03, 0x11, 0x11); -+ break; -+ case 3: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x30, 0x03, 0x10, 0x50); -+ break; -+ case 4: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x21, 0x03, 0x10, 0x50); -+ break; -+ case 5: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x3a, 0x03, 0x11, 0x11); -+ break; -+ case 6: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x20, 0x03, 0x11, 0x11); -+ break; -+ case 7: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x10, 0x03, 0x10, 0x54 | -+ psTdmaByte4Modify); -+ break; -+ case 8: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x10, 0x03, 0x10, 0x54 | -+ psTdmaByte4Modify); -+ break; -+ case 9: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x10, 0x03, 0x10, 0x54 | -+ psTdmaByte4Modify); -+ break; -+ case 10: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x30, 0x03, 0x11, 0x10); -+ break; -+ case 11: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x25, 0x03, 0x11, 0x11 | -+ psTdmaByte4Modify); -+ break; -+ case 12: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x35, 0x03, 0x10, 0x50 | -+ psTdmaByte4Modify); -+ break; -+ case 13: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x25, 0x03, 0x10, 0x50 | -+ psTdmaByte4Modify); -+ break; -+ case 14: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x15, 0x03, 0x10, 0x50 | -+ psTdmaByte4Modify); -+ break; -+ case 15: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x20, 0x03, 0x10, 0x50 | -+ psTdmaByte4Modify); -+ break; -+ case 16: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x10, 0x03, 0x11, 0x15 | -+ psTdmaByte4Modify); -+ break; -+ case 17: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x10, 0x03, 0x11, 0x14); -+ break; -+ case 18: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x30, 0x03, 0x10, 0x50 | -+ psTdmaByte4Modify); -+ break; -+ case 19: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x15, 0x03, 0x11, 0x10); -+ break; -+ case 20: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x30, 0x03, 0x11, 0x10); -+ break; -+ case 21: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x30, 0x03, 0x11, 0x10); -+ break; -+ case 22: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x25, 0x03, 0x11, 0x10); -+ break; -+ case 24: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x08, 0x03, 0x10, 0x54 | -+ psTdmaByte4Modify); -+ break; -+ case 27: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x10, 0x03, 0x11, 0x15); -+ break; -+ case 28: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x10, 0x0b, 0x10, 0x54); -+ break; -+ case 32: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x35, 0x03, 0x11, 0x11); -+ break; -+ case 33: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x35, 0x03, 0x11, 0x10); -+ break; -+ case 36: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x48, 0x03, 0x11, 0x10); -+ break; -+ case 57: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x10, 0x03, 0x10, 0x50 | -+ psTdmaByte4Modify); -+ break; -+ case 58: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x51, 0x10, 0x03, 0x10, 0x50 | -+ psTdmaByte4Modify); -+ break; -+ case 67: -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, -+ 0x61, 0x10, 0x03, 0x11, 0x10 | -+ psTdmaByte4Modify); -+ break; -+ } -+ } else { -+ -+ /* disable PS tdma */ -+ switch (type) { -+ case 8: /* PTA Control */ -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x8, -+ 0x0, 0x0, 0x0, 0x0); -+ break; -+ case 0: -+ default: /* Software control, Antenna at BT side */ -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x0, -+ 0x0, 0x0, 0x0, 0x0); -+ break; -+ case 1: /* 2-Ant, 0x778=3, antenna control by antenna diversity */ -+ halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x0, -+ 0x0, 0x0, 0x48, 0x0); -+ break; -+ } -+ } -+ -+ coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; -+ coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; -+ -+} -+ -+void halbtc8703b1ant_set_ant_path(IN struct btc_coexist *btcoexist, -+ IN u8 ant_pos_type, IN boolean force_exec, -+ IN u8 phase) -+{ -+ u32 cnt_bt_cal_chk = 0; -+ boolean is_in_mp_mode = FALSE; -+ u8 u8tmp = 0; -+ u32 u32tmp1 = 0, u32tmp2 = 0; -+ -+ -+ u32tmp1 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ 0x38); -+ -+ /* To avoid indirect access fail */ -+ if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) { -+ force_exec = TRUE; -+ coex_sta->gnt_error_cnt++; -+ } -+ -+#if 1 -+ u32tmp2 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ 0x54); -+ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x73); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], ********** (Before Ant Setup) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", -+ u8tmp, u32tmp1, u32tmp2); -+ BTC_TRACE(trace_buf); -+#endif -+ -+ coex_dm->cur_ant_pos_type = ant_pos_type; -+ -+ if (!force_exec) { -+ if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) { -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n"); -+ BTC_TRACE(trace_buf); -+ return; -+ } -+ } -+ -+ coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type; -+ -+ switch (phase) { -+ case BT_8703B_1ANT_PHASE_COEX_INIT: -+ /* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */ -+ halbtc8703b1ant_ltecoex_enable(btcoexist, 0x0); -+ -+ /* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */ -+ halbtc8703b1ant_ltecoex_set_coex_table( -+ btcoexist, -+ BT_8703B_1ANT_CTT_WL_VS_LTE, -+ 0xffff); -+ -+ /* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */ -+ halbtc8703b1ant_ltecoex_set_coex_table( -+ btcoexist, -+ BT_8703B_1ANT_CTT_BT_VS_LTE, -+ 0xffff); -+ -+ /* Wait If BT IQK running, because Path control owner is at BT during BT IQK (setup by WiFi firmware) */ -+ while (cnt_bt_cal_chk <= 20) { -+ u8tmp = btcoexist->btc_read_1byte( -+ btcoexist, -+ 0x49d); -+ cnt_bt_cal_chk++; -+ if (u8tmp & BIT(0)) { -+ BTC_SPRINTF(trace_buf, -+ BT_TMP_BUF_SIZE, -+ "[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n", -+ cnt_bt_cal_chk); -+ BTC_TRACE(trace_buf); -+ delay_ms(50); -+ } else { -+ BTC_SPRINTF(trace_buf, -+ BT_TMP_BUF_SIZE, -+ "[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n", -+ cnt_bt_cal_chk); -+ BTC_TRACE(trace_buf); -+ break; -+ } -+ } -+ -+ -+ /* set Path control owner to WL at initial step */ -+ halbtc8703b1ant_ltecoex_pathcontrol_owner( -+ btcoexist, -+ BT_8703B_1ANT_PCO_WLSIDE); -+ -+ /* set GNT_BT to SW high */ -+ halbtc8703b1ant_ltecoex_set_gnt_bt(btcoexist, -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, -+ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); -+ /* Set GNT_WL to SW low */ -+ halbtc8703b1ant_ltecoex_set_gnt_wl(btcoexist, -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, -+ BT_8703B_1ANT_SIG_STA_SET_TO_LOW); -+ -+ if (BTC_ANT_PATH_AUTO == ant_pos_type) -+ ant_pos_type = BTC_ANT_PATH_BT; -+ -+ coex_sta->run_time_state = FALSE; -+ break; -+ case BT_8703B_1ANT_PHASE_WLANONLY_INIT: -+ /* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */ -+ halbtc8703b1ant_ltecoex_enable(btcoexist, 0x0); -+ -+ /* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */ -+ halbtc8703b1ant_ltecoex_set_coex_table( -+ btcoexist, -+ BT_8703B_1ANT_CTT_WL_VS_LTE, -+ 0xffff); -+ -+ /* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */ -+ halbtc8703b1ant_ltecoex_set_coex_table( -+ btcoexist, -+ BT_8703B_1ANT_CTT_BT_VS_LTE, -+ 0xffff); -+ -+ /* set Path control owner to WL at initial step */ -+ halbtc8703b1ant_ltecoex_pathcontrol_owner( -+ btcoexist, -+ BT_8703B_1ANT_PCO_WLSIDE); -+ -+ /* set GNT_BT to SW low */ -+ halbtc8703b1ant_ltecoex_set_gnt_bt(btcoexist, -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, -+ BT_8703B_1ANT_SIG_STA_SET_TO_LOW); -+ /* Set GNT_WL to SW high */ -+ halbtc8703b1ant_ltecoex_set_gnt_wl(btcoexist, -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, -+ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); -+ -+ if (BTC_ANT_PATH_AUTO == ant_pos_type) -+ ant_pos_type = -+ BTC_ANT_PATH_WIFI; -+ -+ coex_sta->run_time_state = FALSE; -+ break; -+ case BT_8703B_1ANT_PHASE_WLAN_OFF: -+ /* Disable LTE Coex Function in WiFi side */ -+ halbtc8703b1ant_ltecoex_enable(btcoexist, 0x0); -+ -+ /* set Path control owner to BT */ -+ halbtc8703b1ant_ltecoex_pathcontrol_owner( -+ btcoexist, -+ BT_8703B_1ANT_PCO_BTSIDE); -+ -+ if (BTC_ANT_PATH_AUTO == ant_pos_type) -+ ant_pos_type = BTC_ANT_PATH_BT; -+ -+ coex_sta->run_time_state = FALSE; -+ break; -+ case BT_8703B_1ANT_PHASE_2G_RUNTIME: -+ halbtc8703b1ant_ltecoex_pathcontrol_owner( -+ btcoexist, -+ BT_8703B_1ANT_PCO_WLSIDE); -+ -+ /* set GNT_BT to PTA */ -+ halbtc8703b1ant_ltecoex_set_gnt_bt(btcoexist, -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA, -+ BT_8703B_1ANT_SIG_STA_SET_BY_HW); -+ /* Set GNT_WL to PTA */ -+ halbtc8703b1ant_ltecoex_set_gnt_wl(btcoexist, -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA, -+ BT_8703B_1ANT_SIG_STA_SET_BY_HW); -+ -+ if (BTC_ANT_PATH_AUTO == ant_pos_type) -+ ant_pos_type = BTC_ANT_PATH_PTA; -+ -+ coex_sta->run_time_state = TRUE; -+ break; -+ case BT_8703B_1ANT_PHASE_BTMPMODE: -+ halbtc8703b1ant_ltecoex_pathcontrol_owner( -+ btcoexist, -+ BT_8703B_1ANT_PCO_WLSIDE); -+ -+ /* set GNT_BT to high */ -+ halbtc8703b1ant_ltecoex_set_gnt_bt(btcoexist, -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, -+ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); -+ /* Set GNT_WL to low */ -+ halbtc8703b1ant_ltecoex_set_gnt_wl(btcoexist, -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, -+ BT_8703B_1ANT_SIG_STA_SET_TO_LOW); -+ -+ if (BTC_ANT_PATH_AUTO == ant_pos_type) -+ ant_pos_type = BTC_ANT_PATH_BT; -+ -+ coex_sta->run_time_state = FALSE; -+ break; -+ } -+ -+ -+#if 1 -+ u32tmp1 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38); -+ u32tmp2 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x54); -+ u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x73); -+ -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], ********** (After Ant-Setup) 0x73 = 0x%x, 0x38= 0x%x, 0x54= 0x%x**********\n", -+ u8tmp, u32tmp1, u32tmp2); -+ BTC_TRACE(trace_buf); -+ -+#endif -+} -+ -+ -+boolean halbtc8703b1ant_is_common_action(IN struct btc_coexist *btcoexist) -+{ -+ boolean common = FALSE, wifi_connected = FALSE, wifi_busy = FALSE; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, -+ &wifi_connected); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); -+ -+ if (!wifi_connected && -+ BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == -+ coex_dm->bt_status) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n"); -+ BTC_TRACE(trace_buf); -+ common = TRUE; -+ } else if (wifi_connected && -+ (BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == -+ coex_dm->bt_status)) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Wifi connected + BT non connected-idle!!\n"); -+ BTC_TRACE(trace_buf); -+ common = TRUE; -+ } else if (!wifi_connected && -+ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == -+ coex_dm->bt_status)) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Wifi non connected-idle + BT connected-idle!!\n"); -+ BTC_TRACE(trace_buf); -+ common = TRUE; -+ } else if (wifi_connected && -+ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == -+ coex_dm->bt_status)) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Wifi connected + BT connected-idle!!\n"); -+ BTC_TRACE(trace_buf); -+ common = TRUE; -+ } else if (!wifi_connected && -+ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE != -+ coex_dm->bt_status)) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Wifi non connected-idle + BT Busy!!\n"); -+ BTC_TRACE(trace_buf); -+ common = TRUE; -+ } else { -+ if (wifi_busy) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Wifi Connected-Busy + BT Busy!!\n"); -+ BTC_TRACE(trace_buf); -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Wifi Connected-Idle + BT Busy!!\n"); -+ BTC_TRACE(trace_buf); -+ } -+ -+ common = FALSE; -+ } -+ -+ return common; -+} -+ -+ -+/* ********************************************* -+ * -+ * Non-Software Coex Mechanism start -+ * -+ * ********************************************* */ -+u8 halbtc8703b1ant_action_algorithm(IN struct btc_coexist *btcoexist) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ boolean bt_hs_on = FALSE; -+ u8 algorithm = BT_8703B_1ANT_COEX_ALGO_UNDEFINED; -+ u8 num_of_diff_profile = 0; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); -+ -+ if (!bt_link_info->bt_link_exist) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], No BT link exists!!!\n"); -+ BTC_TRACE(trace_buf); -+ return algorithm; -+ } -+ -+ if (bt_link_info->sco_exist) -+ num_of_diff_profile++; -+ if (bt_link_info->hid_exist) -+ num_of_diff_profile++; -+ if (bt_link_info->pan_exist) -+ num_of_diff_profile++; -+ if (bt_link_info->a2dp_exist) -+ num_of_diff_profile++; -+ -+ if (num_of_diff_profile == 1) { -+ if (bt_link_info->sco_exist) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO only\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; -+ } else { -+ if (bt_link_info->hid_exist) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = HID only\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; -+ } else if (bt_link_info->a2dp_exist) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = A2DP only\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_A2DP; -+ } else if (bt_link_info->pan_exist) { -+ if (bt_hs_on) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = PAN(HS) only\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_PANHS; -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = PAN(EDR) only\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_PANEDR; -+ } -+ } -+ } -+ } else if (num_of_diff_profile == 2) { -+ if (bt_link_info->sco_exist) { -+ if (bt_link_info->hid_exist) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO + HID\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; -+ } else if (bt_link_info->a2dp_exist) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO + A2DP ==> SCO\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; -+ } else if (bt_link_info->pan_exist) { -+ if (bt_hs_on) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO + PAN(HS)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO + PAN(EDR)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } else { -+ if (bt_link_info->hid_exist && -+ bt_link_info->a2dp_exist) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = HID + A2DP\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID_A2DP; -+ } else if (bt_link_info->hid_exist && -+ bt_link_info->pan_exist) { -+ if (bt_hs_on) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = HID + PAN(HS)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_HID_A2DP; -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = HID + PAN(EDR)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } else if (bt_link_info->pan_exist && -+ bt_link_info->a2dp_exist) { -+ if (bt_hs_on) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = A2DP + PAN(HS)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS; -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = A2DP + PAN(EDR)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP; -+ } -+ } -+ } -+ } else if (num_of_diff_profile == 3) { -+ if (bt_link_info->sco_exist) { -+ if (bt_link_info->hid_exist && -+ bt_link_info->a2dp_exist) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_HID; -+ } else if (bt_link_info->hid_exist && -+ bt_link_info->pan_exist) { -+ if (bt_hs_on) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO + HID + PAN(HS)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_HID_A2DP; -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } else if (bt_link_info->pan_exist && -+ bt_link_info->a2dp_exist) { -+ if (bt_hs_on) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = BT_8703B_1ANT_COEX_ALGO_SCO; -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } else { -+ if (bt_link_info->hid_exist && -+ bt_link_info->pan_exist && -+ bt_link_info->a2dp_exist) { -+ if (bt_hs_on) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_HID_A2DP; -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR; -+ } -+ } -+ } -+ } else if (num_of_diff_profile >= 3) { -+ if (bt_link_info->sco_exist) { -+ if (bt_link_info->hid_exist && -+ bt_link_info->pan_exist && -+ bt_link_info->a2dp_exist) { -+ if (bt_hs_on) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n"); -+ BTC_TRACE(trace_buf); -+ -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); -+ BTC_TRACE(trace_buf); -+ algorithm = -+ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID; -+ } -+ } -+ } -+ } -+ -+ return algorithm; -+} -+ -+void halbtc8703b1ant_action_bt_whql_test(IN struct btc_coexist *btcoexist) -+{ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC, -+ BT_8703B_1ANT_PHASE_2G_RUNTIME); -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8); -+} -+ -+void halbtc8703b1ant_action_bt_hs(IN struct btc_coexist *btcoexist) -+{ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 5); -+} -+ -+void halbtc8703b1ant_action_bt_relink(IN struct btc_coexist *btcoexist) -+{ -+ if (coex_sta->is_bt_multi_link == TRUE) -+ return; -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 5); -+} -+ -+void halbtc8703b1ant_action_bt_idle(IN struct btc_coexist *btcoexist) -+{ -+ boolean wifi_busy = FALSE; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); -+ -+ if (!wifi_busy) { -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 6); -+ } else {/* if wl busy */ -+ -+ if (BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == -+ coex_dm->bt_status) { -+ -+ if (coex_sta->is_hiPri_rx_overhead) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8); -+ -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 33); -+ } else { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 32); -+ } -+ } -+} -+ -+void halbtc8703b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ boolean wifi_connected = FALSE, ap_enable = FALSE, wifi_busy = FALSE, -+ bt_busy = FALSE; -+ boolean wifi_scan = FALSE, wifi_link = FALSE, wifi_roam = FALSE; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, -+ &ap_enable); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, -+ &wifi_connected); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); -+ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan); -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam); -+ -+ if ((wifi_link) || (wifi_roam) || (coex_sta->wifi_is_high_pri_task)) { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 33); -+ } else if ((wifi_scan) && (coex_sta->bt_create_connection)) { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 33); -+ } else if ((!wifi_connected) && (!wifi_scan)) { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8); -+ } else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 6); -+ } else if ((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 22); -+ } else if (bt_link_info->a2dp_exist) { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 32); -+ } else if (wifi_scan) { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 20); -+ } else if (wifi_busy) { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 21); -+ } else { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 21); -+ } -+} -+ -+void halbtc8703b1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist -+ *btcoexist) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ boolean wifi_connected = FALSE, wifi_busy = FALSE, wifi_cckdeadlock_ap = FALSE; -+ u32 wifi_bw = 1; -+ u8 iot_peer = BTC_IOT_PEER_UNKNOWN; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, &wifi_connected); -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); -+ btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer); -+ -+ if ((iot_peer == BTC_IOT_PEER_ATHEROS) && (coex_sta->cck_lock_ever)) -+ wifi_cckdeadlock_ap = TRUE; -+ -+ if (bt_link_info->sco_exist) { -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 5); -+ } else if (coex_sta->is_hid_rcu) { -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); -+ -+ if (wifi_busy) -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 36); -+ else -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 6); -+ } else { -+ -+ if ((wifi_cckdeadlock_ap) && (coex_sta->is_bt_multi_link)) { -+ -+ if (coex_sta->hid_busy_num < 2) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 18); -+ } else if (coex_sta->is_bt_multi_link) { -+ if (coex_sta->hid_busy_num < 2) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 18); -+ } else if (coex_sta->hid_busy_num < 2) { -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 11); -+ } else if (wifi_bw == 0) { /* if 11bg mode */ -+ -+ if (coex_sta->is_bt_multi_link) { -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, -+ 11); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 11); -+ } else { -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, -+ 11); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 11); -+ } -+ } else { -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 11); -+ } -+ } -+} -+ -+ -+void halbtc8703b1ant_action_wifi_only(IN struct btc_coexist *btcoexist) -+{ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_2G_RUNTIME); -+ halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 10); -+ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 8); -+} -+ -+void halbtc8703b1ant_action_wifi_native_lps(IN struct btc_coexist *btcoexist) -+{ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, -+ NORMAL_EXEC, 5); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8); -+} -+ -+void halbtc8703b1ant_action_wifi_cck_dead_lock(IN struct btc_coexist *btcoexist) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ -+ if ((bt_link_info->hid_exist) && (bt_link_info->a2dp_exist) && -+ (!bt_link_info->pan_exist)) { -+ -+ if ((coex_sta->cck_lock) || (coex_sta->cck_lock_warn)) { -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 28); -+ } else { -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 8); -+ } -+ } -+} -+ -+void halbtc8703b1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC, -+ BT_8703B_1ANT_PHASE_2G_RUNTIME); -+ -+ if ((BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == -+ coex_dm->bt_status) || -+ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == -+ coex_dm->bt_status)) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); -+ else if (!bt_link_info->pan_exist) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); -+ -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8); -+} -+ -+void halbtc8703b1ant_action_wifi_linkscan_process(IN struct btc_coexist -+ *btcoexist) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); -+ -+ if (bt_link_info->pan_exist) -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 22); -+ else if (bt_link_info->a2dp_exist) -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 27); -+ else -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 21); -+} -+ -+void halbtc8703b1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist -+ *btcoexist) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ boolean wifi_busy = FALSE, wifi_turbo = FALSE, wifi_cckdeadlock_ap = FALSE; -+ u32 wifi_bw = 1; -+ u8 iot_peer = BTC_IOT_PEER_UNKNOWN; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); -+ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &coex_sta->scan_ap_num); -+ btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "############# [BTCoex], scan_ap_num = %d, wl_noisy_level = %d\n", -+ coex_sta->scan_ap_num, coex_sta->wl_noisy_level); -+ BTC_TRACE(trace_buf); -+ -+ if ((wifi_busy) && (coex_sta->wl_noisy_level == 0)) -+ wifi_turbo = TRUE; -+ -+ if ((iot_peer == BTC_IOT_PEER_ATHEROS) && (coex_sta->cck_lock_ever)) -+ wifi_cckdeadlock_ap = TRUE; -+ -+ if ((bt_link_info->a2dp_exist) && (coex_sta->is_bt_a2dp_sink)) { -+ -+ if (wifi_cckdeadlock_ap) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6); -+ -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 12); -+ } else if (bt_link_info->a2dp_only) { /* A2DP */ -+ -+ if (wifi_cckdeadlock_ap) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13); -+ else if (wifi_turbo) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); -+ -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 7); -+ } else if (((bt_link_info->a2dp_exist) && -+ (bt_link_info->pan_exist)) || -+ (bt_link_info->hid_exist && bt_link_info->a2dp_exist && -+ bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */ -+ -+ if (wifi_cckdeadlock_ap) { -+ if ((bt_link_info->hid_exist) && (coex_sta->hid_busy_num < 2)) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13); -+ } else if (bt_link_info->hid_exist) { -+ if (coex_sta->hid_busy_num < 2) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); -+ } else if (wifi_turbo) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); -+ -+ if (wifi_busy) -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 13); -+ else -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 14); -+ } else if (bt_link_info->hid_exist && -+ bt_link_info->a2dp_exist) { /* HID+A2DP */ -+ -+ if (wifi_cckdeadlock_ap) { -+#if 1 -+ if (coex_sta->hid_busy_num < 2) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13); -+ -+ if (coex_sta->hid_pair_cnt > 1) -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 24); -+ else -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 8); -+#endif -+ -+#if 0 -+ halbtc8703b1ant_action_wifi_cck_dead_lock(btcoexist); -+#endif -+ } else { -+ if (coex_sta->hid_busy_num < 2) /* 2/18 HID */ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); -+ else if (wifi_bw == 0)/* if 11bg mode */ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 12); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); -+ -+ if (coex_sta->hid_pair_cnt > 1) -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 24); -+ else -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 8); -+ } -+ } else if ((bt_link_info->pan_only) -+ || (bt_link_info->hid_exist && bt_link_info->pan_exist)) { -+ /* PAN(OPP,FTP), HID+PAN(OPP,FTP) */ -+ -+ if (wifi_cckdeadlock_ap) { -+ if ((bt_link_info->hid_exist) && (coex_sta->hid_busy_num < 2)) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 13); -+ } else if (bt_link_info->hid_exist) { -+ if (coex_sta->hid_busy_num < 2) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); -+ } else if (wifi_turbo) -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8); -+ else -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); -+ -+ if (!wifi_busy) -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 4); -+ else -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 3); -+ } else { -+ /* BT no-profile busy (0x9) */ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 33); -+ } -+ -+} -+ -+ -+void halbtc8703b1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist) -+{ -+ /* tdma and coex table */ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); -+ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 8); -+} -+ -+void halbtc8703b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ boolean wifi_busy = FALSE; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], CoexForWifiConnect()===>\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, -+ NORMAL_EXEC, -+ BT_8703B_1ANT_PHASE_2G_RUNTIME); -+ -+ if ((coex_dm->bt_status == BT_8703B_1ANT_BT_STATUS_ACL_BUSY) || -+ (coex_dm->bt_status == BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY)) { -+ -+ if (bt_link_info->hid_only)/* HID only */ -+ halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist); -+ else -+ halbtc8703b1ant_action_wifi_connected_bt_acl_busy(btcoexist); -+ -+ } else if (coex_dm->bt_status == BT_8703B_1ANT_BT_STATUS_SCO_BUSY) -+ halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist); -+ else -+ halbtc8703b1ant_action_bt_idle(btcoexist); -+} -+ -+ -+void halbtc8703b1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist) -+{ -+ u8 algorithm = 0; -+ -+ algorithm = halbtc8703b1ant_action_algorithm(btcoexist); -+ coex_dm->cur_algorithm = algorithm; -+ -+ if (halbtc8703b1ant_is_common_action(btcoexist)) { -+ -+ } else { -+ switch (coex_dm->cur_algorithm) { -+ case BT_8703B_1ANT_COEX_ALGO_SCO: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = SCO.\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_HID: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = HID.\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_A2DP: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = A2DP.\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = A2DP+PAN(HS).\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_PANEDR: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = PAN(EDR).\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_PANHS: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = HS mode.\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = PAN+A2DP.\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_PANEDR_HID: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = PAN(EDR)+HID.\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = HID+A2DP+PAN.\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ case BT_8703B_1ANT_COEX_ALGO_HID_A2DP: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = HID+A2DP.\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ default: -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Action algorithm = coexist All Off!!\n"); -+ BTC_TRACE(trace_buf); -+ break; -+ } -+ coex_dm->pre_algorithm = coex_dm->cur_algorithm; -+ } -+} -+ -+void halbtc8703b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist) -+{ -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ boolean wifi_connected = FALSE, bt_hs_on = FALSE; -+ boolean increase_scan_dev_num = FALSE; -+ boolean bt_ctrl_agg_buf_size = FALSE; -+ boolean miracast_plus_bt = FALSE, wifi_under_5g = FALSE; -+ u8 agg_buf_size = 5; -+ u32 wifi_link_status = 0; -+ u32 num_of_wifi_link = 0, wifi_bw; -+ u8 iot_peer = BTC_IOT_PEER_UNKNOWN; -+ boolean scan = FALSE, link = FALSE, roam = FALSE, under_4way = FALSE; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], RunCoexistMechanism()===>\n"); -+ BTC_TRACE(trace_buf); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], under_lps = %d, force_lps_ctrl = %d, acl_busy = %d!!!\n", -+ coex_sta->under_lps, coex_sta->force_lps_ctrl, coex_sta->acl_busy); -+ BTC_TRACE(trace_buf); -+ -+ if (btcoexist->manual_control) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"); -+ BTC_TRACE(trace_buf); -+ return; -+ } -+ -+ if (btcoexist->stop_coex_dm) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n"); -+ BTC_TRACE(trace_buf); -+ return; -+ } -+ -+ if (coex_sta->under_ips) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], wifi is under IPS !!!\n"); -+ BTC_TRACE(trace_buf); -+ return; -+ } -+ -+ if (!coex_sta->run_time_state) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], return for run_time_state = FALSE !!!\n"); -+ BTC_TRACE(trace_buf); -+ return; -+ } -+ -+ if (coex_sta->freeze_coexrun_by_btinfo) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], return for freeze_coexrun_by_btinfo\n"); -+ BTC_TRACE(trace_buf); -+ return; -+ } -+ -+ if ((coex_sta->under_lps) && (!coex_sta->force_lps_ctrl) && -+ (!coex_sta->acl_busy)) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], RunCoexistMechanism(), wifi is under LPS !!!\n"); -+ BTC_TRACE(trace_buf); -+ halbtc8703b1ant_action_wifi_native_lps(btcoexist); -+ return; -+ } -+ -+ if (coex_sta->bt_whck_test) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT is under WHCK TEST!!!\n"); -+ BTC_TRACE(trace_buf); -+ halbtc8703b1ant_action_bt_whql_test(btcoexist); -+ return; -+ } -+ -+ if (coex_sta->bt_disabled) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT is disabled !!!\n"); -+ halbtc8703b1ant_action_wifi_only(btcoexist); -+ return; -+ } -+ -+ if (coex_sta->c2h_bt_inquiry_page) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT is under inquiry/page scan !!\n"); -+ BTC_TRACE(trace_buf); -+ halbtc8703b1ant_action_bt_inquiry(btcoexist); -+ return; -+ } -+ -+ if ((coex_sta->is_setupLink) && -+ (coex_sta->bt_relink_downcount != 0)) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT is re-link !!!\n"); -+ halbtc8703b1ant_action_bt_relink(btcoexist); -+ return; -+ } -+ -+ if ((BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || -+ (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || -+ (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) -+ increase_scan_dev_num = TRUE; -+ -+ btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, -+ &increase_scan_dev_num); -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS, -+ &wifi_link_status); -+ -+ num_of_wifi_link = wifi_link_status >> 16; -+ -+ if ((num_of_wifi_link >= 2) || -+ (wifi_link_status & WIFI_P2P_GO_CONNECTED)) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n", -+ num_of_wifi_link, wifi_link_status); -+ BTC_TRACE(trace_buf); -+ -+ if (bt_link_info->bt_link_exist) -+ miracast_plus_bt = TRUE; -+ else -+ miracast_plus_bt = FALSE; -+ -+ btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT, -+ &miracast_plus_bt); -+ -+ halbtc8703b1ant_action_wifi_multi_port(btcoexist); -+ -+ return; -+ } -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, &wifi_connected); -+ -+ if ((bt_link_info->bt_link_exist) && (wifi_connected)) { -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer); -+ -+ if (BTC_IOT_PEER_CISCO == iot_peer) { -+ -+ if (BTC_WIFI_BW_HT40 == wifi_bw) -+ halbtc8703b1ant_limited_rx(btcoexist, -+ NORMAL_EXEC, FALSE, TRUE, 0x10); -+ else -+ halbtc8703b1ant_limited_rx(btcoexist, -+ NORMAL_EXEC, FALSE, TRUE, 0x8); -+ } -+ } -+ -+ halbtc8703b1ant_run_sw_coexist_mechanism( -+ btcoexist); /* just print debug message */ -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); -+ -+ if (bt_hs_on) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "############# [BTCoex], BT Is hs\n"); -+ BTC_TRACE(trace_buf); -+ halbtc8703b1ant_action_bt_hs(btcoexist); -+ return; -+ } -+ -+ if ((BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == -+ coex_dm->bt_status) || -+ (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == -+ coex_dm->bt_status)) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "############# [BTCoex], BT Is idle\n"); -+ BTC_TRACE(trace_buf); -+ halbtc8703b1ant_action_bt_idle(btcoexist); -+ return; -+ } -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, -+ &under_4way); -+ -+ if (scan || link || roam || under_4way) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n", -+ scan, link, roam, under_4way); -+ BTC_TRACE(trace_buf); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], wifi is under linkscan process!!\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_action_wifi_linkscan_process(btcoexist); -+ } else if (wifi_connected) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], wifi is under connected!!\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_action_wifi_connected(btcoexist); -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], wifi is under not-connected!!\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_action_wifi_not_connected(btcoexist); -+ } -+} -+ -+ -+void halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist) -+{ -+ /* force to reset coex mechanism */ -+ -+ halbtc8703b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, FALSE); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Coex Mechanism Init!!\n"); -+ BTC_TRACE(trace_buf); -+ -+ coex_sta->pop_event_cnt = 0; -+ coex_sta->cnt_RemoteNameReq = 0; -+ coex_sta->cnt_ReInit = 0; -+ coex_sta->cnt_setupLink = 0; -+ coex_sta->cnt_IgnWlanAct = 0; -+ coex_sta->cnt_Page = 0; -+ coex_sta->cnt_RoleSwitch = 0; -+} -+ -+void halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist, -+ IN boolean back_up, IN boolean wifi_only) -+{ -+ u32 u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0; -+ u8 i = 0; -+ -+ u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70), -+ u32tmp1 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38); -+ u32tmp2 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x54); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "\n [BTCoex], ********** 0x70/ 0x38/ 0x54 (Before Init HW config) = 0x%x/ 0x%x/ 0x%x**********\n", -+ u32tmp0, -+ u32tmp1, u32tmp2); -+ BTC_TRACE(trace_buf); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], 1Ant Init HW Config!!\n"); -+ BTC_TRACE(trace_buf); -+ -+ coex_sta->bt_coex_supported_feature = 0; -+ coex_sta->bt_coex_supported_version = 0; -+ coex_sta->bt_ble_scan_type = 0; -+ coex_sta->bt_ble_scan_para[0] = 0; -+ coex_sta->bt_ble_scan_para[1] = 0; -+ coex_sta->bt_ble_scan_para[2] = 0; -+ coex_sta->gnt_error_cnt = 0; -+ coex_sta->bt_relink_downcount = 0; -+ coex_sta->wl_rx_rate = BTC_UNKNOWN; -+ -+ for (i = 0; i <= 9; i++) -+ coex_sta->bt_afh_map[i] = 0; -+ -+ /* 0xf0[15:12] --> Chip Cut information */ -+ coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist, -+ 0xf1) & 0xf0) >> 4; -+ -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8, -+ 0x1); /* enable TBTT nterrupt */ -+ -+ /* BT report packet sample rate */ -+ btcoexist->btc_write_1byte(btcoexist, 0x790, 0x5); -+ -+ /* Enable BT counter statistics */ -+ btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1); -+ -+ /* Enable PTA (3-wire function form BT side) */ -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1); -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x41, 0x02, 0x1); -+ -+ /* Enable PTA (tx/rx signal form WiFi side) */ -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4c6, 0x10, 0x1); -+ -+ halbtc8703b1ant_enable_gnt_to_gpio(btcoexist, FALSE); -+ -+#if 0 -+ if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6) -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ONOFF, TRUE); -+#endif -+ -+ /* Antenna config */ -+ if (coex_sta->is_rf_state_off) { -+ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, -+ FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_WLAN_OFF); -+ -+ btcoexist->stop_coex_dm = TRUE; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], ********** halbtc8703b1ant_init_hw_config (RF Off)**********\n"); -+ BTC_TRACE(trace_buf); -+ } else if (wifi_only) { -+ coex_sta->concurrent_rx_mode_on = FALSE; -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_WIFI, -+ FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_WLANONLY_INIT); -+ } else { -+ coex_sta->concurrent_rx_mode_on = TRUE; -+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x2, 0x1); -+ /* RF 0x1[0] = 0->Set GNT_WL_RF_Rx always = 1 for con-current Rx */ -+ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0x1, 0x0); -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, -+ FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_COEX_INIT); -+ } -+ -+ /* PTA parameter */ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); -+ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 8); -+ -+ u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70), -+ u32tmp1 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38); -+ u32tmp2 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x54); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], ********** 0x70/ 0x38/ 0x54 (After Init HW config) = 0x%x/ 0x%x/ 0x%x**********\n", -+ u32tmp0, -+ u32tmp1, u32tmp2); -+ BTC_TRACE(trace_buf); -+ -+} -+ -+ -+ -+/* ************************************************************ -+ * work around function start with wa_halbtc8703b1ant_ -+ * ************************************************************ -+ * ************************************************************ -+ * extern function start with ex_halbtc8703b1ant_ -+ * ************************************************************ */ -+void ex_halbtc8703b1ant_power_on_setting(IN struct btc_coexist *btcoexist) -+{ -+ struct btc_board_info *board_info = &btcoexist->board_info; -+ u8 u8tmp = 0x0; -+ u16 u16tmp = 0x0; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "xxxxxxxxxxxxxxxx Execute 8703b 1-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n"); -+ BTC_TRACE(trace_buf); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "Ant Det Finish = %s, Ant Det Number = %d\n", -+ (board_info->btdm_ant_det_finish ? "Yes" : "No"), -+ board_info->btdm_ant_num_by_ant_det); -+ BTC_TRACE(trace_buf); -+ -+ btcoexist->stop_coex_dm = TRUE; -+ coex_sta->is_rf_state_off = FALSE; -+ -+ /* enable BB, REG_SYS_FUNC_EN such that we can write BB/MAC reg correctly. */ -+ u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2); -+ btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1)); -+ -+ /* set Path control owner to WiFi */ -+ halbtc8703b1ant_ltecoex_pathcontrol_owner(btcoexist, -+ BT_8703B_1ANT_PCO_WLSIDE); -+ -+ /* set GNT_BT to high */ -+ halbtc8703b1ant_ltecoex_set_gnt_bt(btcoexist, -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, -+ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH); -+ /* Set GNT_WL to low */ -+ halbtc8703b1ant_ltecoex_set_gnt_wl(btcoexist, -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW, -+ BT_8703B_1ANT_SIG_STA_SET_TO_LOW); -+ -+ /* set WLAN_ACT = 0 */ -+ /*btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);*/ -+ -+ halbtc8703b1ant_enable_gnt_to_gpio(btcoexist, FALSE); -+ -+ /* */ -+ /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */ -+ /* Local setting bit define */ -+ /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */ -+ /* BIT1: "0" for internal switch; "1" for external switch */ -+ /* BIT2: "0" for one antenna; "1" for two antenna */ -+ /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */ -+ -+ u8tmp = 0; -+ board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; -+ -+ if (btcoexist->chip_interface == BTC_INTF_USB) -+ btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp); -+ else if (btcoexist->chip_interface == BTC_INTF_SDIO) -+ btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, u8tmp); -+ -+ -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], ********** 0x70(MAC)/0x38/0x54 (Power-On) =0x%x/ 0x%x/ 0x%x**********\n", -+ btcoexist->btc_read_4byte(btcoexist, 0x70), -+ halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38), -+ halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x54)); -+ BTC_TRACE(trace_buf); -+ -+ -+} -+ -+void ex_halbtc8703b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist) -+{ -+} -+ -+void ex_halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist, -+ IN boolean wifi_only) -+{ -+ halbtc8703b1ant_init_hw_config(btcoexist, TRUE, wifi_only); -+ btcoexist->stop_coex_dm = FALSE; -+} -+ -+void ex_halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist) -+{ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Coex Mechanism Init!!\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_init_coex_dm(btcoexist); -+} -+ -+void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist) -+{ -+ struct btc_board_info *board_info = &btcoexist->board_info; -+ struct btc_stack_info *stack_info = &btcoexist->stack_info; -+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; -+ u8 *cli_buf = btcoexist->cli_buf; -+ u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; -+ u16 u16tmp[4]; -+ u32 u32tmp[4]; -+ u32 fa_ofdm, fa_cck, cca_ofdm, cca_cck; -+ u32 fw_ver = 0, bt_patch_ver = 0, bt_coex_ver = 0; -+ static u8 pop_report_in_10s = 0, cnt = 0; -+ u32 phyver = 0; -+ boolean lte_coex_on = FALSE; -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n ============[BT Coexist info]============"); -+ CL_PRINTF(cli_buf); -+ -+ if (btcoexist->manual_control) { -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n ============[Under Manual Control]============"); -+ CL_PRINTF(cli_buf); -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n =========================================="); -+ CL_PRINTF(cli_buf); -+ } -+ if (btcoexist->stop_coex_dm) { -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n ============[Coex is STOPPED]============"); -+ CL_PRINTF(cli_buf); -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n =========================================="); -+ CL_PRINTF(cli_buf); -+ } -+ -+ if (!coex_sta->bt_disabled) { -+ if (coex_sta->bt_coex_supported_feature == 0) -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE, -+ &coex_sta->bt_coex_supported_feature); -+ -+ if ((coex_sta->bt_coex_supported_version == 0) || -+ (coex_sta->bt_coex_supported_version == 0xffff)) -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION, -+ &coex_sta->bt_coex_supported_version); -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); -+ btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver; -+ -+ if (coex_sta->num_of_profile > 0) { -+ cnt++; -+ -+ if (cnt >= 3) { -+ btcoexist->btc_get_bt_afh_map_from_bt(btcoexist, 0, -+ &coex_sta->bt_afh_map[0]); -+ cnt = 0; -+ } -+ } -+ } -+ -+ if (psd_scan->ant_det_try_count == 0) { -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", -+ "Ant PG Num/ Mech/ Pos", -+ board_info->pg_ant_num, board_info->btdm_ant_num, -+ board_info->btdm_ant_pos); -+ CL_PRINTF(cli_buf); -+ } else { -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = %d/ %d/ %d (%d/%d/%d)", -+ "Ant PG Num/ Mech(Ant_Det)/ Pos", -+ board_info->pg_ant_num, -+ board_info->btdm_ant_num_by_ant_det, -+ board_info->btdm_ant_pos, -+ psd_scan->ant_det_try_count, -+ psd_scan->ant_det_fail_count, -+ psd_scan->ant_det_result); -+ CL_PRINTF(cli_buf); -+ -+ if (board_info->btdm_ant_det_finish) { -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", -+ "Ant Det PSD Value", -+ psd_scan->ant_det_peak_val); -+ CL_PRINTF(cli_buf); -+ } -+ } -+ -+ -+ /*bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;*/ -+ bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver; -+ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); -+ phyver = btcoexist->btc_get_bt_phydm_version(btcoexist); -+ -+ bt_coex_ver = ((coex_sta->bt_coex_supported_version & 0xff00) >> 8); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)", -+ "CoexVer WL/ BT_Desired/ BT_Report", -+ glcoex_ver_date_8703b_1ant, glcoex_ver_8703b_1ant, -+ glcoex_ver_btdesired_8703b_1ant, -+ bt_coex_ver, -+ (bt_coex_ver == 0xff ? "Unknown" : -+ (bt_coex_ver >= glcoex_ver_btdesired_8703b_1ant ? -+ "Match":"Mis-Match"))); -+ CL_PRINTF(cli_buf); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = 0x%x/ 0x%x/ v%d/ %c", -+ "W_FW/ B_FW/ Phy/ Kt", -+ fw_ver, bt_patch_ver, phyver, -+ coex_sta->cut_version + 65); -+ CL_PRINTF(cli_buf); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", -+ "Wifi channel informed to BT", -+ coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1], -+ coex_dm->wifi_chnl_info[2]); -+ CL_PRINTF(cli_buf); -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", -+ "WifibHiPri/ Ccklock/ CckEverLock", -+ (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"), -+ (coex_sta->cck_lock ? "Yes" : "No"), -+ (coex_sta->cck_lock_ever ? "Yes" : "No")); -+ CL_PRINTF(cli_buf); -+ -+ /* wifi status */ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", -+ "============[Wifi Status]============"); -+ CL_PRINTF(cli_buf); -+ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", -+ "============[BT Status]============"); -+ CL_PRINTF(cli_buf); -+ -+ pop_report_in_10s++; -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %ddBm/ %d/ %d", -+ "BT status/ rssi/ retryCnt/ popCnt", -+ ((coex_sta->bt_disabled) ? ("disabled") : (( -+ coex_sta->c2h_bt_inquiry_page) ? ("inquiry-page") -+ : ((BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == -+ coex_dm->bt_status) ? "non-connected-idle" : -+ ((BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) -+ ? "connected-idle" : "busy")))), -+ coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt, -+ coex_sta->pop_event_cnt); -+ CL_PRINTF(cli_buf); -+ -+ if (pop_report_in_10s >= 5) { -+ coex_sta->pop_event_cnt = 0; -+ pop_report_in_10s = 0; -+ } -+ -+ if (coex_sta->num_of_profile != 0) -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = %s%s%s%s%s", -+ "Profiles", -+ ((bt_link_info->a2dp_exist) ? -+ ((coex_sta->is_bt_a2dp_sink) ? "A2DP sink," : -+ "A2DP,") : ""), -+ ((bt_link_info->sco_exist) ? "HFP," : ""), -+ ((bt_link_info->hid_exist) ? -+ ((coex_sta->is_hid_rcu) ? "HID(RCU)" : -+ ((coex_sta->hid_busy_num >= 2) ? "HID(4/18)," : -+ "HID(2/18),")) : ""), -+ ((bt_link_info->pan_exist) ? -+ ((coex_sta->is_bt_opp_exist) ? "OPP," : "PAN,") : ""), -+ ((coex_sta->voice_over_HOGP) ? "Voice" : "")); -+ else -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = None", "Profiles"); -+ -+ CL_PRINTF(cli_buf); -+ -+ if (bt_link_info->a2dp_exist) { -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s", -+ "A2DP Rate/Bitpool/Auto_Slot", -+ ((coex_sta->is_A2DP_3M) ? "3M" : "No_3M"), -+ coex_sta->a2dp_bit_pool, -+ ((coex_sta->is_autoslot) ? "On" : "Off") -+ ); -+ CL_PRINTF(cli_buf); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ %d/ %d", -+ "V_ID/D_name/FBSlot_Legacy/FBSlot_Le", -+ coex_sta->bt_a2dp_vendor_id, -+ coex_sta->bt_a2dp_device_name, -+ coex_sta->legacy_forbidden_slot, -+ coex_sta->le_forbidden_slot -+ ); -+ CL_PRINTF(cli_buf); -+ } -+ -+ if (bt_link_info->hid_exist) { -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", -+ "HID PairNum", -+ coex_sta->hid_pair_cnt -+ ); -+ CL_PRINTF(cli_buf); -+ } -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s/ 0x%x", -+ "Role/RoleSwCnt/IgnWlact/Feature", -+ ((bt_link_info->slave_role) ? "Slave" : "Master"), -+ coex_sta->cnt_RoleSwitch, -+ ((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"), -+ coex_sta->bt_coex_supported_feature); -+ CL_PRINTF(cli_buf); -+ -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", -+ "ReInit/ReLink/IgnWlact/Page/NameReq", -+ coex_sta->cnt_ReInit, -+ coex_sta->cnt_setupLink, -+ coex_sta->cnt_IgnWlanAct, -+ coex_sta->cnt_Page, -+ coex_sta->cnt_RemoteNameReq -+ ); -+ CL_PRINTF(cli_buf); -+ -+ halbtc8703b1ant_read_score_board(btcoexist, &u16tmp[0]); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%04x", -+ "ScoreBoard(B->W)", u16tmp[0]); -+ CL_PRINTF(cli_buf); -+ -+ if (coex_sta->num_of_profile > 0) { -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x", -+ "AFH MAP", -+ coex_sta->bt_afh_map[0], -+ coex_sta->bt_afh_map[1], -+ coex_sta->bt_afh_map[2], -+ coex_sta->bt_afh_map[3], -+ coex_sta->bt_afh_map[4], -+ coex_sta->bt_afh_map[5], -+ coex_sta->bt_afh_map[6], -+ coex_sta->bt_afh_map[7], -+ coex_sta->bt_afh_map[8], -+ coex_sta->bt_afh_map[9] -+ ); -+ CL_PRINTF(cli_buf); -+ } -+ -+ for (i = 0; i < BT_INFO_SRC_8703B_1ANT_MAX; i++) { -+ if (coex_sta->bt_info_c2h_cnt[i]) { -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x (%d)", -+ glbt_info_src_8703b_1ant[i], -+ coex_sta->bt_info_c2h[i][0], -+ coex_sta->bt_info_c2h[i][1], -+ coex_sta->bt_info_c2h[i][2], -+ coex_sta->bt_info_c2h[i][3], -+ coex_sta->bt_info_c2h[i][4], -+ coex_sta->bt_info_c2h[i][5], -+ coex_sta->bt_info_c2h[i][6], -+ coex_sta->bt_info_c2h_cnt[i]); -+ CL_PRINTF(cli_buf); -+ } -+ } -+ -+ if (btcoexist->manual_control) -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", -+ "============[mechanisms] (before Manual)============"); -+ else -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", -+ "============[mechanisms]============"); -+ CL_PRINTF(cli_buf); -+ -+ ps_tdma_case = coex_dm->cur_ps_tdma; -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s)", -+ "PS TDMA", -+ coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1], -+ coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3], -+ coex_dm->ps_tdma_para[4], ps_tdma_case, -+ (coex_dm->cur_ps_tdma_on ? "TDMA On" : "TDMA Off")); -+ -+ CL_PRINTF(cli_buf); -+ -+ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); -+ u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); -+ u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = %d/ 0x%x/ 0x%x/ 0x%x", -+ "Table/0x6c0/0x6c4/0x6c8", -+ coex_sta->coex_table_type, u32tmp[0], u32tmp[1], u32tmp[2]); -+ CL_PRINTF(cli_buf); -+ -+ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); -+ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6cc); -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = 0x%x/ 0x%x/ 0x%04x", -+ "0x778/0x6cc/Scoreboard(W->B)", -+ u8tmp[0], u32tmp[0], coex_sta->score_board_WB); -+ CL_PRINTF(cli_buf); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s", -+ "BtCtrlLPS/LPRA", -+ ((coex_sta->force_lps_ctrl) ? "On" : "Off"), -+ ((coex_dm->cur_low_penalty_ra) ? "On" : "Off")); -+ CL_PRINTF(cli_buf); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", -+ "BT_Empty/BT_Late", -+ coex_sta->wl_fw_dbg_info[4], -+ coex_sta->wl_fw_dbg_info[5]); -+ CL_PRINTF(cli_buf); -+ -+ u32tmp[0] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38); -+ lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ? TRUE : FALSE; -+ -+ if (lte_coex_on) { -+ u32tmp[0] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ 0xa0); -+ u32tmp[1] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ 0xa4); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", -+ "LTE Coex Table W_L/B_L", -+ u32tmp[0] & 0xffff, u32tmp[1] & 0xffff); -+ CL_PRINTF(cli_buf); -+ -+ u32tmp[0] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ 0xa8); -+ u32tmp[1] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ 0xac); -+ u32tmp[2] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ 0xb0); -+ u32tmp[3] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, -+ 0xb4); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", -+ "LTE Break Table W_L/B_L/L_W/L_B", -+ u32tmp[0] & 0xffff, u32tmp[1] & 0xffff, -+ u32tmp[2] & 0xffff, u32tmp[3] & 0xffff); -+ CL_PRINTF(cli_buf); -+ } -+ /* Hw setting */ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s", -+ "============[Hw setting]============"); -+ CL_PRINTF(cli_buf); -+ -+ u32tmp[0] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38); -+ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x73); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %s", -+ "LTE CoexOn/Path Ctrl Owner", -+ (int)((u32tmp[0] & BIT(7)) >> 7), -+ ((u8tmp[0] & BIT(2)) ? "WL" : "BT")); -+ CL_PRINTF(cli_buf); -+ -+ if (lte_coex_on) { -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", -+ "LTE 3Wire/OPMode/UART/UARTMode", -+ (int)((u32tmp[0] & BIT(6)) >> 6), -+ (int)((u32tmp[0] & (BIT(5) | BIT(4))) >> 4), -+ (int)((u32tmp[0] & BIT(3)) >> 3), -+ (int)(u32tmp[0] & (BIT(2) | BIT(1) | BIT(0)))); -+ CL_PRINTF(cli_buf); -+ } -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s (gnt_err = %d)", -+ "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg", -+ ((u32tmp[0] & BIT(12)) ? "SW" : "HW"), -+ ((u32tmp[0] & BIT(8)) ? "SW" : "HW"), -+ ((u32tmp[0] & BIT(14)) ? "SW" : "HW"), -+ ((u32tmp[0] & BIT(10)) ? "SW" : "HW"), -+ ((u8tmp[0] & BIT(3)) ? "On" : "Off"), -+ coex_sta->gnt_error_cnt); -+ CL_PRINTF(cli_buf); -+ -+ u32tmp[0] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x54); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", -+ "GNT_WL/GNT_BT/LTE_Busy/UART_Busy", -+ (int)((u32tmp[0] & BIT(2)) >> 2), -+ (int)((u32tmp[0] & BIT(3)) >> 3), -+ (int)((u32tmp[0] & BIT(1)) >> 1), (int)(u32tmp[0] & BIT(0))); -+ CL_PRINTF(cli_buf); -+ -+ -+ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x4c6); -+ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", -+ "0x4c6[4]/0x40[5] (WL/BT PTA)", -+ (int)((u8tmp[0] & BIT(4)) >> 4), -+ (int)((u8tmp[1] & BIT(5)) >> 5)); -+ CL_PRINTF(cli_buf); -+ -+ u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); -+ u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); -+ u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x953); -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ %s", -+ "0x550(bcn ctrl)/0x522/4-RxAGC", -+ u32tmp[0], u8tmp[0], (u8tmp[1] & 0x2) ? "On" : "Off"); -+ CL_PRINTF(cli_buf); -+ -+ fa_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_FA_OFDM); -+ fa_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_FA_CCK); -+ cca_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_CCA_OFDM); -+ cca_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_CCA_CCK); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, -+ "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", -+ "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA", -+ cca_cck, fa_cck, cca_ofdm, fa_ofdm); -+ CL_PRINTF(cli_buf); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d (Rx_rate Data/RTS= %d/%d)", -+ "CRC_OK CCK/11g/11n/11ac", -+ coex_sta->crc_ok_cck, coex_sta->crc_ok_11g, -+ coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_vht, -+ coex_sta->wl_rx_rate, coex_sta->wl_rts_rx_rate); -+ CL_PRINTF(cli_buf); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", -+ "CRC_Err CCK/11g/11n/11n-agg", -+ coex_sta->crc_err_cck, coex_sta->crc_err_11g, -+ coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht); -+ CL_PRINTF(cli_buf); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d", -+ "WlHiPri/ Locking/ Locked/ Noisy", -+ (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"), -+ (coex_sta->cck_lock ? "Yes" : "No"), -+ (coex_sta->cck_lock_ever ? "Yes" : "No"), -+ coex_sta->wl_noisy_level); -+ CL_PRINTF(cli_buf); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s", -+ "0x770(Hi-pri rx/tx)", -+ coex_sta->high_priority_rx, coex_sta->high_priority_tx, -+ (coex_sta->is_hiPri_rx_overhead ? "(scan overhead!!)" : "")); -+ CL_PRINTF(cli_buf); -+ -+ CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s", -+ "0x774(Lo-pri rx/tx)", -+ coex_sta->low_priority_rx, coex_sta->low_priority_tx, -+ (bt_link_info->slave_role ? "(Slave!!)" : ( -+ coex_sta->is_tdma_btautoslot_hang ? "(auto-slot hang!!)" : ""))); -+ CL_PRINTF(cli_buf); -+ -+ btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); -+} -+ -+ -+void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type) -+{ -+ if (btcoexist->manual_control || btcoexist->stop_coex_dm) -+ return; -+ -+ if (BTC_IPS_ENTER == type) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], IPS ENTER notify\n"); -+ BTC_TRACE(trace_buf); -+ coex_sta->under_ips = TRUE; -+ coex_sta->under_lps = FALSE; -+ -+ /* Write WL "Active" in Score-board for LPS off */ -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE | -+ BT_8703B_1ANT_SCOREBOARD_ONOFF | -+ BT_8703B_1ANT_SCOREBOARD_SCAN | -+ BT_8703B_1ANT_SCOREBOARD_UNDERTEST, -+ FALSE); -+ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, -+ FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_WLAN_OFF); -+ -+ halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); -+ halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0); -+ } else if (BTC_IPS_LEAVE == type) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], IPS LEAVE notify\n"); -+ BTC_TRACE(trace_buf); -+#if 0 -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE, TRUE); -+#endif -+ halbtc8703b1ant_init_hw_config(btcoexist, FALSE, FALSE); -+ halbtc8703b1ant_init_coex_dm(btcoexist); -+ halbtc8703b1ant_query_bt_info(btcoexist); -+ -+ coex_sta->under_ips = FALSE; -+ } -+} -+ -+void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type) -+{ -+ static boolean pre_force_lps_on = FALSE; -+ -+ if (btcoexist->manual_control || btcoexist->stop_coex_dm) -+ return; -+ -+ if (BTC_LPS_ENABLE == type) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], LPS ENABLE notify\n"); -+ BTC_TRACE(trace_buf); -+ coex_sta->under_lps = TRUE; -+ coex_sta->under_ips = FALSE; -+ -+ if (coex_sta->force_lps_ctrl == TRUE) { /* LPS No-32K */ -+ /* Write WL "Active" in Score-board for PS-TDMA */ -+ pre_force_lps_on = TRUE; -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE, TRUE); -+ -+ } else { /* LPS-32K, need check if this h2c 0x71 can work?? (2015/08/28) */ -+ /* Write WL "Non-Active" in Score-board for Native-PS */ -+ pre_force_lps_on = FALSE; -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE, FALSE); -+ -+ halbtc8703b1ant_action_wifi_native_lps(btcoexist); -+ } -+ } else if (BTC_LPS_DISABLE == type) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], LPS DISABLE notify\n"); -+ BTC_TRACE(trace_buf); -+ coex_sta->under_lps = FALSE; -+ -+ /* Write WL "Active" in Score-board for LPS off */ -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE, TRUE); -+ -+ if ((pre_force_lps_on == FALSE) && (!coex_sta->force_lps_ctrl)) -+ halbtc8703b1ant_query_bt_info(btcoexist); -+ } -+} -+ -+void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type) -+{ -+ boolean wifi_connected = FALSE; -+ -+ if (btcoexist->manual_control || -+ btcoexist->stop_coex_dm) -+ return; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, -+ &wifi_connected); -+ -+ -+ if (BTC_SCAN_START == type) { -+ -+ coex_sta->wifi_is_high_pri_task = TRUE; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], SCAN START notify\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE | -+ BT_8703B_1ANT_SCOREBOARD_SCAN | -+ BT_8703B_1ANT_SCOREBOARD_ONOFF, -+ TRUE); -+ -+ halbtc8703b1ant_query_bt_info(btcoexist); -+ -+ /* Force antenna setup for no scan result issue */ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, -+ FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_2G_RUNTIME); -+ -+ halbtc8703b1ant_run_coexist_mechanism(btcoexist); -+ -+ } else { -+ -+ coex_sta->wifi_is_high_pri_task = FALSE; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, -+ &coex_sta->scan_ap_num); -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], SCAN FINISH notify (Scan-AP = %d)\n", -+ coex_sta->scan_ap_num); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_run_coexist_mechanism(btcoexist); -+ } -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], SCAN START Notify() end\n"); -+ BTC_TRACE(trace_buf); -+ -+} -+ -+void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type) -+{ -+ boolean wifi_connected = FALSE; -+ -+ if (btcoexist->manual_control || -+ btcoexist->stop_coex_dm) -+ return; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, -+ &wifi_connected); -+ -+ if (BTC_ASSOCIATE_START == type) { -+ coex_sta->wifi_is_high_pri_task = TRUE; -+ -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE | -+ BT_8703B_1ANT_SCOREBOARD_SCAN | -+ BT_8703B_1ANT_SCOREBOARD_ONOFF, -+ TRUE); -+ -+ /* Force antenna setup for no scan result issue */ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, -+ FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_2G_RUNTIME); -+ -+ /* psd_scan->ant_det_is_ant_det_available = TRUE; */ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], CONNECT START notify\n"); -+ BTC_TRACE(trace_buf); -+ coex_dm->arp_cnt = 0; -+ -+ halbtc8703b1ant_run_coexist_mechanism(btcoexist); -+ } else { -+ coex_sta->wifi_is_high_pri_task = FALSE; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], CONNECT FINISH notify\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_run_coexist_mechanism(btcoexist); -+ } -+ -+} -+ -+void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type) -+{ -+ boolean wifi_under_b_mode = FALSE; -+ -+ if (btcoexist->manual_control || -+ btcoexist->stop_coex_dm) -+ return; -+ -+ if (BTC_MEDIA_CONNECT == type) { -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], MEDIA connect notify\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE | -+ BT_8703B_1ANT_SCOREBOARD_ONOFF, -+ TRUE); -+ -+ /* Force antenna setup for no scan result issue */ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, -+ FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_2G_RUNTIME); -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, -+ &wifi_under_b_mode); -+ -+ /* Set CCK Tx/Rx high Pri except 11b mode */ -+ if (wifi_under_b_mode) { -+ btcoexist->btc_write_1byte(btcoexist, 0x6cd, -+ 0x00); /* CCK Tx */ -+ btcoexist->btc_write_1byte(btcoexist, 0x6cf, -+ 0x00); /* CCK Rx */ -+ } else { -+ /* btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x10); */ /*CCK Tx */ -+ /* btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x10); */ /*CCK Rx */ -+ btcoexist->btc_write_1byte(btcoexist, 0x6cd, -+ 0x00); /* CCK Tx */ -+ btcoexist->btc_write_1byte(btcoexist, 0x6cf, -+ 0x10); /* CCK Rx */ -+ } -+ -+ coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, -+ 0x430); -+ coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, -+ 0x434); -+ coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( -+ btcoexist, 0x42a); -+ coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte( -+ btcoexist, 0x456); -+ } else { -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], MEDIA disconnect notify\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE, FALSE); -+ -+ btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */ -+ btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */ -+ -+ coex_sta->cck_lock_ever = FALSE; -+ } -+ -+ halbtc8703b1ant_update_wifi_channel_info(btcoexist, type); -+ -+} -+ -+void ex_halbtc8703b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type) -+{ -+ boolean under_4way = FALSE; -+ -+ if (btcoexist->manual_control || -+ btcoexist->stop_coex_dm) -+ return; -+ -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, -+ &under_4way); -+ -+ if (under_4way) { -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], specific Packet ---- under_4way!!\n"); -+ BTC_TRACE(trace_buf); -+ -+ coex_sta->wifi_is_high_pri_task = TRUE; -+ coex_sta->specific_pkt_period_cnt = 2; -+ } else if (BTC_PACKET_ARP == type) { -+ -+ coex_dm->arp_cnt++; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], specific Packet ARP notify -cnt = %d\n", -+ coex_dm->arp_cnt); -+ BTC_TRACE(trace_buf); -+ -+ } else { -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], specific Packet DHCP or EAPOL notify [Type = %d]\n", -+ type); -+ BTC_TRACE(trace_buf); -+ -+ coex_sta->wifi_is_high_pri_task = TRUE; -+ coex_sta->specific_pkt_period_cnt = 2; -+ } -+ -+ if (coex_sta->wifi_is_high_pri_task) { -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_SCAN, TRUE); -+ halbtc8703b1ant_run_coexist_mechanism(btcoexist); -+ } -+} -+ -+void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist, -+ IN u8 *tmp_buf, IN u8 length) -+{ -+ u8 i, rsp_source = 0; -+ boolean wifi_connected = FALSE; -+ boolean wifi_scan = FALSE, wifi_link = FALSE, wifi_roam = FALSE, -+ wifi_busy = FALSE; -+ static boolean is_scoreboard_scan = FALSE; -+ -+ -+ rsp_source = tmp_buf[0] & 0xf; -+ if (rsp_source >= BT_INFO_SRC_8703B_1ANT_MAX) -+ rsp_source = BT_INFO_SRC_8703B_1ANT_WIFI_FW; -+ coex_sta->bt_info_c2h_cnt[rsp_source]++; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Bt_info[%d], len=%d, data=[", rsp_source, -+ length); -+ BTC_TRACE(trace_buf); -+ -+ for (i = 0; i < length; i++) { -+ coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; -+ -+ if (i == length - 1) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n", -+ tmp_buf[i]); -+ BTC_TRACE(trace_buf); -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ", -+ tmp_buf[i]); -+ BTC_TRACE(trace_buf); -+ } -+ } -+ -+ coex_sta->bt_info = coex_sta->bt_info_c2h[rsp_source][1]; -+ coex_sta->bt_info_ext = coex_sta->bt_info_c2h[rsp_source][4]; -+ coex_sta->bt_info_ext2 = coex_sta->bt_info_c2h[rsp_source][5]; -+ -+ if (BT_INFO_SRC_8703B_1ANT_WIFI_FW != rsp_source) { -+ -+ /* if 0xff, it means BT is under WHCK test */ -+ coex_sta->bt_whck_test = ((coex_sta->bt_info == 0xff) ? TRUE : -+ FALSE); -+ -+ coex_sta->bt_create_connection = (( -+ coex_sta->bt_info_c2h[rsp_source][2] & 0x80) ? TRUE : -+ FALSE); -+ -+ /* unit: %, value-100 to translate to unit: dBm */ -+ coex_sta->bt_rssi = coex_sta->bt_info_c2h[rsp_source][3] * 2 + -+ 10; -+ -+ coex_sta->c2h_bt_remote_name_req = (( -+ coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ? TRUE : -+ FALSE); -+ -+ coex_sta->is_A2DP_3M = ((coex_sta->bt_info_c2h[rsp_source][2] & -+ 0x10) ? TRUE : FALSE); -+ -+ coex_sta->acl_busy = ((coex_sta->bt_info_c2h[rsp_source][1] & -+ 0x8) ? TRUE : FALSE); -+ -+ coex_sta->voice_over_HOGP = ((coex_sta->bt_info_ext & 0x10) ? -+ TRUE : FALSE); -+ -+ coex_sta->c2h_bt_inquiry_page = ((coex_sta->bt_info & -+ BT_INFO_8703B_1ANT_B_INQ_PAGE) ? TRUE : FALSE); -+ -+ coex_sta->a2dp_bit_pool = ((( -+ coex_sta->bt_info_c2h[rsp_source][1] & 0x49) == 0x49) ? -+ coex_sta->bt_info_c2h[rsp_source][6] : 0); -+ -+ coex_sta->is_bt_a2dp_sink = (coex_sta->bt_info_c2h[rsp_source][6] & 0x80) ? -+ TRUE : FALSE; -+ -+ coex_sta->bt_retry_cnt = coex_sta->bt_info_c2h[rsp_source][2] & -+ 0xf; -+ -+ coex_sta->is_autoslot = coex_sta->bt_info_ext2 & 0x8; -+ -+ coex_sta->forbidden_slot = coex_sta->bt_info_ext2 & 0x7; -+ -+ coex_sta->hid_busy_num = (coex_sta->bt_info_ext2 & 0x30) >> 4; -+ -+ coex_sta->hid_pair_cnt = (coex_sta->bt_info_ext2 & 0xc0) >> 6; -+ -+ coex_sta->is_bt_opp_exist = (coex_sta->bt_info_ext2 & 0x1) ? TRUE : FALSE; -+ -+ if (coex_sta->bt_retry_cnt >= 1) -+ coex_sta->pop_event_cnt++; -+ -+ if (coex_sta->c2h_bt_remote_name_req) -+ coex_sta->cnt_RemoteNameReq++; -+ -+ if (coex_sta->bt_info_ext & BIT(1)) -+ coex_sta->cnt_ReInit++; -+ -+ if (coex_sta->bt_info_ext & BIT(2)) { -+ coex_sta->cnt_setupLink++; -+ coex_sta->is_setupLink = TRUE; -+ coex_sta->bt_relink_downcount = 2; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Re-Link start in BT info!!\n"); -+ BTC_TRACE(trace_buf); -+ } else { -+ coex_sta->is_setupLink = FALSE; -+ coex_sta->bt_relink_downcount = 0; -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Re-Link stop in BT info!!\n"); -+ BTC_TRACE(trace_buf); -+ } -+ -+ if (coex_sta->bt_info_ext & BIT(3)) -+ coex_sta->cnt_IgnWlanAct++; -+ -+ if (coex_sta->bt_info_ext & BIT(6)) -+ coex_sta->cnt_RoleSwitch++; -+ -+ if (coex_sta->bt_info_ext & BIT(7)) -+ coex_sta->is_bt_multi_link = TRUE; -+ else -+ coex_sta->is_bt_multi_link = FALSE; -+ -+ if (coex_sta->bt_info_ext & BIT(0)) -+ coex_sta->is_hid_rcu = TRUE; -+ else -+ coex_sta->is_hid_rcu = FALSE; -+ -+ if (coex_sta->bt_info_ext & BIT(5)) -+ coex_sta->is_ble_scan_toggle = TRUE; -+ else -+ coex_sta->is_ble_scan_toggle = FALSE; -+ -+ if (coex_sta->bt_create_connection) { -+ coex_sta->cnt_Page++; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, -+ &wifi_busy); -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link); -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam); -+ -+ if ((wifi_link) || (wifi_roam) || (wifi_scan) || -+ (coex_sta->wifi_is_high_pri_task) || (wifi_busy)) { -+ -+ is_scoreboard_scan = TRUE; -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_SCAN, TRUE); -+ -+ } else -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_SCAN, FALSE); -+ -+ } else { -+ if (is_scoreboard_scan) { -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_SCAN, FALSE); -+ is_scoreboard_scan = FALSE; -+ } -+ } -+ -+ /* Here we need to resend some wifi info to BT */ -+ /* because bt is reset and loss of the info. */ -+ -+ if ((!btcoexist->manual_control) && -+ (!btcoexist->stop_coex_dm)) { -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, -+ &wifi_connected); -+ -+ /* Re-Init */ -+ if ((coex_sta->bt_info_ext & BIT(1))) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"); -+ BTC_TRACE(trace_buf); -+ if (wifi_connected) -+ halbtc8703b1ant_update_wifi_channel_info( -+ btcoexist, BTC_MEDIA_CONNECT); -+ else -+ halbtc8703b1ant_update_wifi_channel_info( -+ btcoexist, -+ BTC_MEDIA_DISCONNECT); -+ } -+ -+ -+ /* If Ignore_WLanAct && not SetUp_Link */ -+ if ((coex_sta->bt_info_ext & BIT(3)) && -+ (!(coex_sta->bt_info_ext & BIT(2)))) { -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); -+ BTC_TRACE(trace_buf); -+ halbtc8703b1ant_ignore_wlan_act(btcoexist, -+ FORCE_EXEC, FALSE); -+ } -+ } -+ -+ } -+ -+ halbtc8703b1ant_update_bt_link_info(btcoexist); -+ -+ halbtc8703b1ant_run_coexist_mechanism(btcoexist); -+} -+ -+void ex_halbtc8703b1ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist, -+ IN u8 *tmp_buf, IN u8 length) -+{ -+ u8 i = 0; -+ static u8 tmp_buf_pre[10] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], WiFi Fw Dbg info = %d %d %d %d %d %d (len = %d)\n", -+ tmp_buf[0], tmp_buf[1], -+ tmp_buf[2], tmp_buf[3], -+ tmp_buf[4], tmp_buf[5], length); -+ BTC_TRACE(trace_buf); -+ -+ if (tmp_buf[0] == 0x8) { -+ for (i = 1; i <= 5; i++) { -+ coex_sta->wl_fw_dbg_info[i] = -+ (tmp_buf[i] >= tmp_buf_pre[i]) ? -+ (tmp_buf[i] - tmp_buf_pre[i]) : -+ (255 - tmp_buf_pre[i] + tmp_buf[i]); -+ -+ tmp_buf_pre[i] = tmp_buf[i]; -+ } -+ } -+} -+ -+ -+void ex_halbtc8703b1ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist, -+ IN BOOLEAN is_data_frame, IN u8 btc_rate_id) -+{ -+ BOOLEAN wifi_connected = FALSE; -+ -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, -+ &wifi_connected); -+ -+ if (is_data_frame) { -+ coex_sta->wl_rx_rate = btc_rate_id; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], rx_rate_change_notify data rate id = %d, RTS_Rate = %d\n", -+ coex_sta->wl_rx_rate, coex_sta->wl_rts_rx_rate); -+ BTC_TRACE(trace_buf); -+ } else { -+ coex_sta->wl_rts_rx_rate = btc_rate_id; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], rts_rate_change_notify RTS rate id = %d, RTS_Rate = %d\n", -+ coex_sta->wl_rts_rx_rate, coex_sta->wl_rts_rx_rate); -+ BTC_TRACE(trace_buf); -+ } -+ -+ if ((wifi_connected) && -+ ((coex_dm->bt_status == -+ BT_8703B_1ANT_BT_STATUS_ACL_BUSY) || -+ (coex_dm->bt_status == -+ BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY) || -+ (coex_dm->bt_status == -+ BT_8703B_1ANT_BT_STATUS_SCO_BUSY))) { -+ -+ if ((coex_sta->wl_rx_rate == BTC_CCK_5_5) || -+ (coex_sta->wl_rx_rate == BTC_OFDM_6) || -+ (coex_sta->wl_rx_rate == BTC_MCS_0)) { -+ -+ coex_sta->cck_lock_warn = TRUE; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], cck lock warning...\n"); -+ BTC_TRACE(trace_buf); -+ } else if ((coex_sta->wl_rx_rate == BTC_CCK_1) || -+ (coex_sta->wl_rx_rate == BTC_CCK_2) || -+ (coex_sta->wl_rts_rx_rate == BTC_CCK_1) || -+ (coex_sta->wl_rts_rx_rate == BTC_CCK_2)) { -+ -+ coex_sta->cck_lock = TRUE; -+ coex_sta->cck_lock_ever = TRUE; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], cck locking...\n"); -+ BTC_TRACE(trace_buf); -+ } else { -+ coex_sta->cck_lock_warn = FALSE; -+ coex_sta->cck_lock = FALSE; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], cck unlock...\n"); -+ BTC_TRACE(trace_buf); -+ } -+ } else { -+ if ((coex_dm->bt_status == -+ BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE) || -+ (coex_dm->bt_status == -+ BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE)) { -+ coex_sta->cck_lock_warn = FALSE; -+ coex_sta->cck_lock = FALSE; -+ } -+ } -+ -+} -+ -+ -+ -+void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type) -+{ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], RF Status notify\n"); -+ BTC_TRACE(trace_buf); -+ -+ if (BTC_RF_ON == type) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], RF is turned ON!!\n"); -+ BTC_TRACE(trace_buf); -+ -+ btcoexist->stop_coex_dm = FALSE; -+ coex_sta->is_rf_state_off = FALSE; -+#if 0 -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE, TRUE); -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ONOFF, TRUE); -+#endif -+ /* halbtc8703b1ant_init_hw_config(btcoexist, FALSE, FALSE); */ -+ } else if (BTC_RF_OFF == type) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], RF is turned OFF!!\n"); -+ BTC_TRACE(trace_buf); -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE | -+ BT_8703B_1ANT_SCOREBOARD_ONOFF | -+ BT_8703B_1ANT_SCOREBOARD_SCAN | -+ BT_8703B_1ANT_SCOREBOARD_UNDERTEST, -+ FALSE); -+ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, -+ FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_WLAN_OFF); -+ -+ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 0); -+ -+ btcoexist->stop_coex_dm = TRUE; -+ coex_sta->is_rf_state_off = TRUE; -+ } -+} -+ -+void ex_halbtc8703b1ant_halt_notify(IN struct btc_coexist *btcoexist) -+{ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE | -+ BT_8703B_1ANT_SCOREBOARD_ONOFF | -+ BT_8703B_1ANT_SCOREBOARD_SCAN | -+ BT_8703B_1ANT_SCOREBOARD_UNDERTEST, -+ FALSE); -+ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_WLAN_OFF); -+ -+ ex_halbtc8703b1ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); -+ -+ halbtc8703b1ant_enable_gnt_to_gpio(btcoexist, FALSE); -+ -+ halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 0); -+ -+ btcoexist->stop_coex_dm = TRUE; -+} -+ -+void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist, -+ IN u8 pnp_state) -+{ -+ static u8 pre_pnp_state; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n"); -+ BTC_TRACE(trace_buf); -+ -+ if ((BTC_WIFI_PNP_SLEEP == pnp_state) || -+ (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state)) { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Pnp notify to SLEEP\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE | -+ BT_8703B_1ANT_SCOREBOARD_ONOFF | -+ BT_8703B_1ANT_SCOREBOARD_SCAN | -+ BT_8703B_1ANT_SCOREBOARD_UNDERTEST, -+ FALSE); -+ -+ if (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state) { -+ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, -+ FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_2G_RUNTIME); -+ } else { -+ -+ halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, -+ FORCE_EXEC, -+ BT_8703B_1ANT_PHASE_WLAN_OFF); -+ } -+ -+ btcoexist->stop_coex_dm = TRUE; -+ } else { -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], Pnp notify to WAKE UP\n"); -+ BTC_TRACE(trace_buf); -+ -+ if (pre_pnp_state == BTC_WIFI_PNP_SLEEP_KEEP_ANT || -+ pnp_state == BTC_WIFI_PNP_WOWLAN) { -+ coex_sta->run_time_state = TRUE; -+ btcoexist->stop_coex_dm = FALSE; -+ halbtc8703b1ant_run_coexist_mechanism(btcoexist); -+ } -+ } -+ pre_pnp_state = pnp_state; -+} -+ -+void ex_halbtc8703b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist) -+{ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], *****************Coex DM Reset*****************\n"); -+ BTC_TRACE(trace_buf); -+ -+ halbtc8703b1ant_init_hw_config(btcoexist, FALSE, FALSE); -+ halbtc8703b1ant_init_coex_dm(btcoexist); -+} -+ -+void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist) -+{ -+ u32 bt_patch_ver; -+ boolean wifi_busy = FALSE; -+ boolean bt_relink_finish = FALSE; -+ -+#if (BT_AUTO_REPORT_ONLY_8703B_1ANT == 0) -+ halbtc8703b1ant_query_bt_info(btcoexist); -+#endif -+ -+ halbtc8703b1ant_monitor_bt_ctr(btcoexist); -+ halbtc8703b1ant_monitor_wifi_ctr(btcoexist); -+ -+ halbtc8703b1ant_monitor_bt_enable_disable(btcoexist); -+ -+#if 0 -+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); -+ -+ /* halbtc8703b1ant_read_score_board(btcoexist, &bt_scoreboard_val); */ -+ -+ if (wifi_busy) { -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_UNDERTEST, TRUE); -+ /* -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_WLBUSY, TRUE); -+ -+ if (bt_scoreboard_val & BIT(6)) -+ halbtc8703b1ant_query_bt_info(btcoexist); */ -+ } else { -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_UNDERTEST, FALSE); -+ /* -+ halbtc8703b1ant_post_state_to_bt(btcoexist, -+ BT_8703B_1ANT_SCOREBOARD_WLBUSY, -+ FALSE); */ -+ } -+#endif -+ -+ if (coex_sta->bt_relink_downcount != 0) { -+ coex_sta->bt_relink_downcount--; -+ -+ if (coex_sta->bt_relink_downcount == 0) { -+ coex_sta->is_setupLink = FALSE; -+ bt_relink_finish = TRUE; -+ } -+ } -+ -+ /* for 4-way, DHCP, EAPOL packet */ -+ if (coex_sta->specific_pkt_period_cnt > 0) { -+ -+ coex_sta->specific_pkt_period_cnt--; -+ -+ if ((coex_sta->specific_pkt_period_cnt == 0) && -+ (coex_sta->wifi_is_high_pri_task)) -+ coex_sta->wifi_is_high_pri_task = FALSE; -+ -+ BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, -+ "[BTCoex], ***************** Hi-Pri Task = %s*****************\n", -+ (coex_sta->wifi_is_high_pri_task ? "Yes" : -+ "No")); -+ BTC_TRACE(trace_buf); -+ -+ } -+ -+ if (halbtc8703b1ant_is_wifibt_status_changed(btcoexist) || (bt_relink_finish)) -+ halbtc8703b1ant_run_coexist_mechanism(btcoexist); -+} -+ -+void ex_halbtc8703b1ant_antenna_detection(IN struct btc_coexist *btcoexist, -+ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds) -+{ -+ /* No Antenna Detection required because 8730b is only 1-Ant */ -+} -+ -+void ex_halbtc8703b1ant_antenna_isolation(IN struct btc_coexist *btcoexist, -+ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds) -+{ -+ -+ -+} -+ -+void ex_halbtc8703b1ant_psd_scan(IN struct btc_coexist *btcoexist, -+ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds) -+{ -+ -+ -+} -+ -+void ex_halbtc8703b1ant_display_ant_detection(IN struct btc_coexist *btcoexist) -+{ -+ -+} -+ -+#endif -+ -+#endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */ -+ -diff --git a/drivers/staging/rtl8723cs/hal/btc/halbtc8703b1ant.h b/drivers/staging/rtl8723cs/hal/btc/halbtc8703b1ant.h -new file mode 100644 -index 000000000000..fc441ca31c60 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/btc/halbtc8703b1ant.h -@@ -0,0 +1,445 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) -+ -+#if (RTL8703B_SUPPORT == 1) -+/* ******************************************* -+ * The following is for 8703B 1ANT BT Co-exist definition -+ * ******************************************* */ -+#define BT_AUTO_REPORT_ONLY_8703B_1ANT 1 -+#define BT_8703B_1ANT_ENABLE_GNTBT_TO_GPIO14 0 -+ -+#define BT_INFO_8703B_1ANT_B_FTP BIT(7) -+#define BT_INFO_8703B_1ANT_B_A2DP BIT(6) -+#define BT_INFO_8703B_1ANT_B_HID BIT(5) -+#define BT_INFO_8703B_1ANT_B_SCO_BUSY BIT(4) -+#define BT_INFO_8703B_1ANT_B_ACL_BUSY BIT(3) -+#define BT_INFO_8703B_1ANT_B_INQ_PAGE BIT(2) -+#define BT_INFO_8703B_1ANT_B_SCO_ESCO BIT(1) -+#define BT_INFO_8703B_1ANT_B_CONNECTION BIT(0) -+ -+#define BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \ -+ (((_BT_INFO_EXT_&BIT(0))) ? TRUE : FALSE) -+ -+#define BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT 2 -+ -+#define BT_8703B_1ANT_WIFI_NOISY_THRESH 50 /* max: 255 */ -+ -+/* for Antenna detection */ -+#define BT_8703B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50 -+#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70 -+#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55 -+#define BT_8703B_1ANT_ANTDET_PSDTHRES_1ANT 35 -+#define BT_8703B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */ -+#define BT_8703B_1ANT_ANTDET_SWEEPPOINT_DELAY 40000 -+#define BT_8703B_1ANT_ANTDET_ENABLE 0 -+#define BT_8703B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0 -+ -+#define BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000 -+ -+enum bt_8703b_1ant_signal_state { -+ BT_8703B_1ANT_SIG_STA_SET_TO_LOW = 0x0, -+ BT_8703B_1ANT_SIG_STA_SET_BY_HW = 0x0, -+ BT_8703B_1ANT_SIG_STA_SET_TO_HIGH = 0x1, -+ BT_8703B_1ANT_SIG_STA_MAX -+}; -+ -+enum bt_8703b_1ant_path_ctrl_owner { -+ BT_8703B_1ANT_PCO_BTSIDE = 0x0, -+ BT_8703B_1ANT_PCO_WLSIDE = 0x1, -+ BT_8703B_1ANT_PCO_MAX -+}; -+ -+enum bt_8703b_1ant_gnt_ctrl_type { -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0, -+ BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1, -+ BT_8703B_1ANT_GNT_TYPE_MAX -+}; -+ -+enum bt_8703b_1ant_gnt_ctrl_block { -+ BT_8703B_1ANT_GNT_BLOCK_RFC_BB = 0x0, -+ BT_8703B_1ANT_GNT_BLOCK_RFC = 0x1, -+ BT_8703B_1ANT_GNT_BLOCK_BB = 0x2, -+ BT_8703B_1ANT_GNT_BLOCK_MAX -+}; -+ -+enum bt_8703b_1ant_lte_coex_table_type { -+ BT_8703B_1ANT_CTT_WL_VS_LTE = 0x0, -+ BT_8703B_1ANT_CTT_BT_VS_LTE = 0x1, -+ BT_8703B_1ANT_CTT_MAX -+}; -+ -+enum bt_8703b_1ant_lte_break_table_type { -+ BT_8703B_1ANT_LBTT_WL_BREAK_LTE = 0x0, -+ BT_8703B_1ANT_LBTT_BT_BREAK_LTE = 0x1, -+ BT_8703B_1ANT_LBTT_LTE_BREAK_WL = 0x2, -+ BT_8703B_1ANT_LBTT_LTE_BREAK_BT = 0x3, -+ BT_8703B_1ANT_LBTT_MAX -+}; -+ -+enum bt_info_src_8703b_1ant { -+ BT_INFO_SRC_8703B_1ANT_WIFI_FW = 0x0, -+ BT_INFO_SRC_8703B_1ANT_BT_RSP = 0x1, -+ BT_INFO_SRC_8703B_1ANT_BT_ACTIVE_SEND = 0x2, -+ BT_INFO_SRC_8703B_1ANT_MAX -+}; -+ -+enum bt_8703b_1ant_bt_status { -+ BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1, -+ BT_8703B_1ANT_BT_STATUS_INQ_PAGE = 0x2, -+ BT_8703B_1ANT_BT_STATUS_ACL_BUSY = 0x3, -+ BT_8703B_1ANT_BT_STATUS_SCO_BUSY = 0x4, -+ BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, -+ BT_8703B_1ANT_BT_STATUS_MAX -+}; -+ -+enum bt_8703b_1ant_wifi_status { -+ BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0, -+ BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4, -+ BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5, -+ BT_8703B_1ANT_WIFI_STATUS_MAX -+}; -+ -+enum bt_8703b_1ant_coex_algo { -+ BT_8703B_1ANT_COEX_ALGO_UNDEFINED = 0x0, -+ BT_8703B_1ANT_COEX_ALGO_SCO = 0x1, -+ BT_8703B_1ANT_COEX_ALGO_HID = 0x2, -+ BT_8703B_1ANT_COEX_ALGO_A2DP = 0x3, -+ BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4, -+ BT_8703B_1ANT_COEX_ALGO_PANEDR = 0x5, -+ BT_8703B_1ANT_COEX_ALGO_PANHS = 0x6, -+ BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7, -+ BT_8703B_1ANT_COEX_ALGO_PANEDR_HID = 0x8, -+ BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, -+ BT_8703B_1ANT_COEX_ALGO_HID_A2DP = 0xa, -+ BT_8703B_1ANT_COEX_ALGO_MAX = 0xb, -+}; -+ -+enum bt_8703b_1ant_phase { -+ BT_8703B_1ANT_PHASE_COEX_INIT = 0x0, -+ BT_8703B_1ANT_PHASE_WLANONLY_INIT = 0x1, -+ BT_8703B_1ANT_PHASE_WLAN_OFF = 0x2, -+ BT_8703B_1ANT_PHASE_2G_RUNTIME = 0x3, -+ BT_8703B_1ANT_PHASE_5G_RUNTIME = 0x4, -+ BT_8703B_1ANT_PHASE_BTMPMODE = 0x5, -+ BT_8703B_1ANT_PHASE_ANTENNA_DET = 0x6, -+ BT_8703B_1ANT_PHASE_MAX -+}; -+ -+enum bt_8703b_1ant_Scoreboard { -+ BT_8703B_1ANT_SCOREBOARD_ACTIVE = BIT(0), -+ BT_8703B_1ANT_SCOREBOARD_ONOFF = BIT(1), -+ BT_8703B_1ANT_SCOREBOARD_SCAN = BIT(2), -+ BT_8703B_1ANT_SCOREBOARD_UNDERTEST = BIT(3), -+ BT_8703B_1ANT_SCOREBOARD_WLBUSY = BIT(6) -+}; -+ -+ -+struct coex_dm_8703b_1ant { -+ /* hw setting */ -+ u8 pre_ant_pos_type; -+ u8 cur_ant_pos_type; -+ /* fw mechanism */ -+ boolean cur_ignore_wlan_act; -+ boolean pre_ignore_wlan_act; -+ u8 pre_ps_tdma; -+ u8 cur_ps_tdma; -+ u8 ps_tdma_para[5]; -+ u8 ps_tdma_du_adj_type; -+ boolean auto_tdma_adjust; -+ boolean pre_ps_tdma_on; -+ boolean cur_ps_tdma_on; -+ boolean pre_bt_auto_report; -+ boolean cur_bt_auto_report; -+ u8 pre_lps; -+ u8 cur_lps; -+ u8 pre_rpwm; -+ u8 cur_rpwm; -+ -+ /* sw mechanism */ -+ boolean pre_low_penalty_ra; -+ boolean cur_low_penalty_ra; -+ u32 pre_val0x6c0; -+ u32 cur_val0x6c0; -+ u32 pre_val0x6c4; -+ u32 cur_val0x6c4; -+ u32 pre_val0x6c8; -+ u32 cur_val0x6c8; -+ u8 pre_val0x6cc; -+ u8 cur_val0x6cc; -+ boolean limited_dig; -+ -+ u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */ -+ u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */ -+ u16 backup_retry_limit; -+ u8 backup_ampdu_max_time; -+ -+ /* algorithm related */ -+ u8 pre_algorithm; -+ u8 cur_algorithm; -+ u8 bt_status; -+ u8 wifi_chnl_info[3]; -+ -+ u32 pre_ra_mask; -+ u32 cur_ra_mask; -+ u8 pre_arfr_type; -+ u8 cur_arfr_type; -+ u8 pre_retry_limit_type; -+ u8 cur_retry_limit_type; -+ u8 pre_ampdu_time_type; -+ u8 cur_ampdu_time_type; -+ u32 arp_cnt; -+ -+ u8 error_condition; -+}; -+ -+struct coex_sta_8703b_1ant { -+ boolean bt_disabled; -+ boolean bt_link_exist; -+ boolean sco_exist; -+ boolean a2dp_exist; -+ boolean hid_exist; -+ boolean pan_exist; -+ boolean bt_hi_pri_link_exist; -+ u8 num_of_profile; -+ -+ boolean under_lps; -+ boolean under_ips; -+ u32 specific_pkt_period_cnt; -+ u32 high_priority_tx; -+ u32 high_priority_rx; -+ u32 low_priority_tx; -+ u32 low_priority_rx; -+ boolean is_hiPri_rx_overhead; -+ s8 bt_rssi; -+ boolean bt_tx_rx_mask; -+ u8 pre_bt_rssi_state; -+ u8 pre_wifi_rssi_state[4]; -+ u8 bt_info_c2h[BT_INFO_SRC_8703B_1ANT_MAX][10]; -+ u32 bt_info_c2h_cnt[BT_INFO_SRC_8703B_1ANT_MAX]; -+ boolean bt_whck_test; -+ boolean c2h_bt_inquiry_page; -+ boolean c2h_bt_remote_name_req; -+ boolean c2h_bt_page; /* Add for win8.1 page out issue */ -+ boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */ -+ u8 bt_retry_cnt; -+ u8 bt_info_ext; -+ u8 bt_info_ext2; -+ u32 pop_event_cnt; -+ u8 scan_ap_num; -+ -+ u32 crc_ok_cck; -+ u32 crc_ok_11g; -+ u32 crc_ok_11n; -+ u32 crc_ok_11n_vht; -+ -+ u32 crc_err_cck; -+ u32 crc_err_11g; -+ u32 crc_err_11n; -+ u32 crc_err_11n_vht; -+ -+ boolean cck_lock; -+ boolean cck_lock_ever; -+ boolean cck_lock_warn; -+ -+ u8 coex_table_type; -+ boolean force_lps_ctrl; -+ -+ boolean concurrent_rx_mode_on; -+ -+ u16 score_board; -+ u8 isolation_btween_wb; /* 0~ 50 */ -+ -+ u8 a2dp_bit_pool; -+ u8 cut_version; -+ boolean acl_busy; -+ boolean bt_create_connection; -+ -+ u32 bt_coex_supported_feature; -+ u32 bt_coex_supported_version; -+ -+ u8 bt_ble_scan_type; -+ u32 bt_ble_scan_para[3]; -+ -+ boolean run_time_state; -+ boolean freeze_coexrun_by_btinfo; -+ -+ boolean is_A2DP_3M; -+ boolean voice_over_HOGP; -+ u8 bt_info; -+ boolean is_autoslot; -+ u8 forbidden_slot; -+ u8 hid_busy_num; -+ u8 hid_pair_cnt; -+ -+ u32 cnt_RemoteNameReq; -+ u32 cnt_setupLink; -+ u32 cnt_ReInit; -+ u32 cnt_IgnWlanAct; -+ u32 cnt_Page; -+ u32 cnt_RoleSwitch; -+ -+ u16 bt_reg_vendor_ac; -+ u16 bt_reg_vendor_ae; -+ -+ boolean is_setupLink; -+ u8 wl_noisy_level; -+ u32 gnt_error_cnt; -+ -+ u8 bt_afh_map[10]; -+ u8 bt_relink_downcount; -+ boolean is_tdma_btautoslot; -+ boolean is_tdma_btautoslot_hang; -+ -+ boolean is_rf_state_off; -+ -+ boolean is_hid_low_pri_tx_overhead; -+ boolean is_bt_multi_link; -+ boolean is_bt_a2dp_sink; -+ -+ u8 wl_fw_dbg_info[10]; -+ u8 wl_rx_rate; -+ u8 wl_rts_rx_rate; -+ -+ u16 score_board_WB; -+ boolean is_hid_rcu; -+ u16 legacy_forbidden_slot; -+ u16 le_forbidden_slot; -+ u8 bt_a2dp_vendor_id; -+ u32 bt_a2dp_device_name; -+ boolean is_ble_scan_toggle; -+ -+ boolean is_bt_opp_exist; -+}; -+ -+#define BT_8703B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */ -+#define BT_8703B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */ -+#define BT_8703B_1ANT_ANTDET_BUF_LEN 16 -+ -+struct psdscan_sta_8703b_1ant { -+ -+ u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */ -+ u32 ant_det_bt_tx_time; -+ u32 ant_det_pre_psdscan_peak_val; -+ boolean ant_det_is_ant_det_available; -+ u32 ant_det_psd_scan_peak_val; -+ boolean ant_det_is_btreply_available; -+ u32 ant_det_psd_scan_peak_freq; -+ -+ u8 ant_det_result; -+ u8 ant_det_peak_val[BT_8703B_1ANT_ANTDET_BUF_LEN]; -+ u8 ant_det_peak_freq[BT_8703B_1ANT_ANTDET_BUF_LEN]; -+ u32 ant_det_try_count; -+ u32 ant_det_fail_count; -+ u32 ant_det_inteval_count; -+ u32 ant_det_thres_offset; -+ -+ u32 real_cent_freq; -+ s32 real_offset; -+ u32 real_span; -+ -+ u32 psd_band_width; /* unit: Hz */ -+ u32 psd_point; /* 128/256/512/1024 */ -+ u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */ -+ u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */ -+ u32 psd_start_point; -+ u32 psd_stop_point; -+ u32 psd_max_value_point; -+ u32 psd_max_value; -+ u32 psd_start_base; -+ u32 psd_avg_num; /* 1/8/16/32 */ -+ u32 psd_gen_count; -+ boolean is_psd_running; -+ boolean is_psd_show_max_only; -+}; -+ -+/* ******************************************* -+ * The following is interface which will notify coex module. -+ * ******************************************* */ -+void ex_halbtc8703b1ant_power_on_setting(IN struct btc_coexist *btcoexist); -+void ex_halbtc8703b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist); -+void ex_halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist, -+ IN boolean wifi_only); -+void ex_halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist); -+void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type); -+void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type); -+void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type); -+void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type); -+void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type); -+void ex_halbtc8703b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type); -+void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist, -+ IN u8 *tmp_buf, IN u8 length); -+void ex_halbtc8703b1ant_wl_fwdbginfo_notify(IN struct btc_coexist *btcoexist, -+ IN u8 *tmp_buf, IN u8 length); -+void ex_halbtc8703b1ant_rx_rate_change_notify(IN struct btc_coexist *btcoexist, -+ IN BOOLEAN is_data_frame, IN u8 btc_rate_id); -+void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist, -+ IN u8 type); -+void ex_halbtc8703b1ant_halt_notify(IN struct btc_coexist *btcoexist); -+void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist, -+ IN u8 pnp_state); -+void ex_halbtc8703b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist); -+void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist); -+void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist); -+void ex_halbtc8703b1ant_antenna_detection(IN struct btc_coexist *btcoexist, -+ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds); -+void ex_halbtc8703b1ant_antenna_isolation(IN struct btc_coexist *btcoexist, -+ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds); -+ -+void ex_halbtc8703b1ant_psd_scan(IN struct btc_coexist *btcoexist, -+ IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds); -+void ex_halbtc8703b1ant_display_ant_detection(IN struct btc_coexist *btcoexist); -+ -+#else -+#define ex_halbtc8703b1ant_power_on_setting(btcoexist) -+#define ex_halbtc8703b1ant_pre_load_firmware(btcoexist) -+#define ex_halbtc8703b1ant_init_hw_config(btcoexist, wifi_only) -+#define ex_halbtc8703b1ant_init_coex_dm(btcoexist) -+#define ex_halbtc8703b1ant_ips_notify(btcoexist, type) -+#define ex_halbtc8703b1ant_lps_notify(btcoexist, type) -+#define ex_halbtc8703b1ant_scan_notify(btcoexist, type) -+#define ex_halbtc8703b1ant_connect_notify(btcoexist, type) -+#define ex_halbtc8703b1ant_media_status_notify(btcoexist, type) -+#define ex_halbtc8703b1ant_specific_packet_notify(btcoexist, type) -+#define ex_halbtc8703b1ant_bt_info_notify(btcoexist, tmp_buf, length) -+#define ex_halbtc8703b1ant_wl_fwdbginfo_notify(btcoexist, tmp_buf, length) -+#define ex_halbtc8703b1ant_rx_rate_change_notify(btcoexist, is_data_frame, btc_rate_id) -+#define ex_halbtc8703b1ant_rf_status_notify(btcoexist, type) -+#define ex_halbtc8703b1ant_halt_notify(btcoexist) -+#define ex_halbtc8703b1ant_pnp_notify(btcoexist, pnp_state) -+#define ex_halbtc8703b1ant_coex_dm_reset(btcoexist) -+#define ex_halbtc8703b1ant_periodical(btcoexist) -+#define ex_halbtc8703b1ant_display_coex_info(btcoexist) -+#define ex_halbtc8703b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds) -+#define ex_halbtc8703b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds) -+#define ex_halbtc8703b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds) -+#define ex_halbtc8703b1ant_display_ant_detection(btcoexist) -+ -+#endif -+ -+ -+#endif -+ -diff --git a/drivers/staging/rtl8723cs/hal/btc/halbtcoutsrc.h b/drivers/staging/rtl8723cs/hal/btc/halbtcoutsrc.h -new file mode 100644 -index 000000000000..28a3c25c2c2e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/btc/halbtcoutsrc.h -@@ -0,0 +1,2164 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HALBTC_OUT_SRC_H__ -+#define __HALBTC_OUT_SRC_H__ -+ -+enum { -+ BTC_CCK_1, -+ BTC_CCK_2, -+ BTC_CCK_5_5, -+ BTC_CCK_11, -+ BTC_OFDM_6, -+ BTC_OFDM_9, -+ BTC_OFDM_12, -+ BTC_OFDM_18, -+ BTC_OFDM_24, -+ BTC_OFDM_36, -+ BTC_OFDM_48, -+ BTC_OFDM_54, -+ BTC_MCS_0, -+ BTC_MCS_1, -+ BTC_MCS_2, -+ BTC_MCS_3, -+ BTC_MCS_4, -+ BTC_MCS_5, -+ BTC_MCS_6, -+ BTC_MCS_7, -+ BTC_MCS_8, -+ BTC_MCS_9, -+ BTC_MCS_10, -+ BTC_MCS_11, -+ BTC_MCS_12, -+ BTC_MCS_13, -+ BTC_MCS_14, -+ BTC_MCS_15, -+ BTC_MCS_16, -+ BTC_MCS_17, -+ BTC_MCS_18, -+ BTC_MCS_19, -+ BTC_MCS_20, -+ BTC_MCS_21, -+ BTC_MCS_22, -+ BTC_MCS_23, -+ BTC_MCS_24, -+ BTC_MCS_25, -+ BTC_MCS_26, -+ BTC_MCS_27, -+ BTC_MCS_28, -+ BTC_MCS_29, -+ BTC_MCS_30, -+ BTC_MCS_31, -+ BTC_VHT_1SS_MCS_0, -+ BTC_VHT_1SS_MCS_1, -+ BTC_VHT_1SS_MCS_2, -+ BTC_VHT_1SS_MCS_3, -+ BTC_VHT_1SS_MCS_4, -+ BTC_VHT_1SS_MCS_5, -+ BTC_VHT_1SS_MCS_6, -+ BTC_VHT_1SS_MCS_7, -+ BTC_VHT_1SS_MCS_8, -+ BTC_VHT_1SS_MCS_9, -+ BTC_VHT_2SS_MCS_0, -+ BTC_VHT_2SS_MCS_1, -+ BTC_VHT_2SS_MCS_2, -+ BTC_VHT_2SS_MCS_3, -+ BTC_VHT_2SS_MCS_4, -+ BTC_VHT_2SS_MCS_5, -+ BTC_VHT_2SS_MCS_6, -+ BTC_VHT_2SS_MCS_7, -+ BTC_VHT_2SS_MCS_8, -+ BTC_VHT_2SS_MCS_9, -+ BTC_VHT_3SS_MCS_0, -+ BTC_VHT_3SS_MCS_1, -+ BTC_VHT_3SS_MCS_2, -+ BTC_VHT_3SS_MCS_3, -+ BTC_VHT_3SS_MCS_4, -+ BTC_VHT_3SS_MCS_5, -+ BTC_VHT_3SS_MCS_6, -+ BTC_VHT_3SS_MCS_7, -+ BTC_VHT_3SS_MCS_8, -+ BTC_VHT_3SS_MCS_9, -+ BTC_VHT_4SS_MCS_0, -+ BTC_VHT_4SS_MCS_1, -+ BTC_VHT_4SS_MCS_2, -+ BTC_VHT_4SS_MCS_3, -+ BTC_VHT_4SS_MCS_4, -+ BTC_VHT_4SS_MCS_5, -+ BTC_VHT_4SS_MCS_6, -+ BTC_VHT_4SS_MCS_7, -+ BTC_VHT_4SS_MCS_8, -+ BTC_VHT_4SS_MCS_9, -+ BTC_MCS_32, -+ BTC_UNKNOWN, -+ BTC_PKT_MGNT, -+ BTC_PKT_CTRL, -+ BTC_PKT_UNKNOWN, -+ BTC_PKT_NOT_FOR_ME, -+ BTC_RATE_MAX -+}; -+ -+enum { -+ BTC_MULTIPORT_SCC, -+ BTC_MULTIPORT_MCC_DUAL_CHANNEL, -+ BTC_MULTIPORT_MCC_DUAL_BAND, -+ BTC_MULTIPORT_MAX -+}; -+ -+#define BTC_COEX_8822B_COMMON_CODE 0 -+#define BTC_COEX_OFFLOAD 0 -+#define BTC_TMP_BUF_SHORT 20 -+ -+extern u1Byte gl_btc_trace_buf[]; -+#define BTC_SPRINTF rsprintf -+#define BTC_TRACE(_MSG_)\ -+do {\ -+ if (GLBtcDbgType[COMP_COEX] & BIT(DBG_LOUD)) {\ -+ RTW_INFO("%s", _MSG_);\ -+ } \ -+} while (0) -+#define BT_PrintData(adapter, _MSG_, len, data) RTW_DBG_DUMP((_MSG_), data, len) -+ -+ -+#define NORMAL_EXEC FALSE -+#define FORCE_EXEC TRUE -+ -+#define NM_EXCU FALSE -+#define FC_EXCU TRUE -+ -+#define BTC_RF_OFF 0x0 -+#define BTC_RF_ON 0x1 -+ -+#define BTC_RF_A 0x0 -+#define BTC_RF_B 0x1 -+#define BTC_RF_C 0x2 -+#define BTC_RF_D 0x3 -+ -+#define BTC_SMSP SINGLEMAC_SINGLEPHY -+#define BTC_DMDP DUALMAC_DUALPHY -+#define BTC_DMSP DUALMAC_SINGLEPHY -+#define BTC_MP_UNKNOWN 0xff -+ -+#define BT_COEX_ANT_TYPE_PG 0 -+#define BT_COEX_ANT_TYPE_ANTDIV 1 -+#define BT_COEX_ANT_TYPE_DETECTED 2 -+ -+#define BTC_MIMO_PS_STATIC 0 /* 1ss */ -+#define BTC_MIMO_PS_DYNAMIC 1 /* 2ss */ -+ -+#define BTC_RATE_DISABLE 0 -+#define BTC_RATE_ENABLE 1 -+ -+/* single Antenna definition */ -+#define BTC_ANT_PATH_WIFI 0 -+#define BTC_ANT_PATH_BT 1 -+#define BTC_ANT_PATH_PTA 2 -+#define BTC_ANT_PATH_WIFI5G 3 -+#define BTC_ANT_PATH_AUTO 4 -+/* dual Antenna definition */ -+#define BTC_ANT_WIFI_AT_MAIN 0 -+#define BTC_ANT_WIFI_AT_AUX 1 -+#define BTC_ANT_WIFI_AT_DIVERSITY 2 -+/* coupler Antenna definition */ -+#define BTC_ANT_WIFI_AT_CPL_MAIN 0 -+#define BTC_ANT_WIFI_AT_CPL_AUX 1 -+ -+/* for common code request */ -+#define REG_LTE_IDR_COEX_CTRL 0x0038 -+#define REG_SYS_SDIO_CTRL 0x0070 -+#define REG_SYS_SDIO_CTRL3 0x0073 -+/* #define REG_RETRY_LIMIT 0x042a */ -+/* #define REG_DARFRC 0x0430 */ -+#define REG_DARFRCH 0x0434 -+#define REG_CCK_CHECK 0x0454 -+#define REG_AMPDU_MAX_TIME_V1 0x0455 -+#define REG_TX_HANG_CTRL 0x045E -+#define REG_LIFETIME_EN 0x0426 -+#define REG_BT_COEX_TABLE0 0x06C0 -+#define REG_BT_COEX_TABLE1 0x06C4 -+#define REG_BT_COEX_BRK_TABLE 0x06C8 -+#define REG_BT_COEX_TABLE_H 0x06CC -+#define REG_BT_ACT_STATISTICS 0x0770 -+#define REG_BT_ACT_STATISTICS_1 0x0774 -+#define REG_BT_STAT_CTRL 0x0778 -+ -+#define BIT_EN_GNT_BT_AWAKE BIT(3) -+#define BIT_EN_BCN_FUNCTION BIT(3) -+#define BIT_EN_BCN_PKT_REL BIT(6) -+#define BIT_FEN_BB_GLB_RST BIT(1) -+#define BIT_FEN_BB_RSTB BIT(0) -+ -+#define TDMA_4SLOT BIT(8) -+ -+/* for 2T2R -> 2T1R coex MIMO-PS mechanism tranlation */ -+#define BTC_2GTDD_MAX_TRY 3 /* the max retry count for 1R->2R */ -+#define BTC_2GFDD_MAX_STAY 300 /* the max stay time at 1R if 2R try-able (unit: 2s) */ -+ -+typedef enum _BTC_POWERSAVE_TYPE { -+ BTC_PS_WIFI_NATIVE = 0, /* wifi original power save behavior */ -+ BTC_PS_LPS_ON = 1, -+ BTC_PS_LPS_OFF = 2, -+ BTC_PS_MAX -+} BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE; -+ -+typedef enum _BTC_BT_REG_TYPE { -+ BTC_BT_REG_RF = 0, -+ BTC_BT_REG_MODEM = 1, -+ BTC_BT_REG_BLUEWIZE = 2, -+ BTC_BT_REG_VENDOR = 3, -+ BTC_BT_REG_LE = 4, -+ BTC_BT_REG_MAX -+} BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE; -+ -+typedef enum _BTC_CHIP_INTERFACE { -+ BTC_INTF_UNKNOWN = 0, -+ BTC_INTF_PCI = 1, -+ BTC_INTF_USB = 2, -+ BTC_INTF_SDIO = 3, -+ BTC_INTF_MAX -+} BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE; -+ -+typedef enum _BTC_CHIP_TYPE { -+ BTC_CHIP_UNDEF = 0, -+ BTC_CHIP_CSR_BC4 = 1, -+ BTC_CHIP_CSR_BC8 = 2, -+ BTC_CHIP_RTL8723A = 3, -+ BTC_CHIP_RTL8821 = 4, -+ BTC_CHIP_RTL8723B = 5, -+ BTC_CHIP_RTL8822B = 6, -+ BTC_CHIP_RTL8822C = 7, -+ BTC_CHIP_RTL8821C = 8, -+ BTC_CHIP_RTL8821A = 9, -+ BTC_CHIP_RTL8723D = 10, -+ BTC_CHIP_RTL8703B = 11, -+ BTC_CHIP_RTL8725A = 12, -+ BTC_CHIP_RTL8723F = 13, -+ BTC_CHIP_MAX -+} BTC_CHIP_TYPE, *PBTC_CHIP_TYPE; -+ -+/* following is for wifi link status */ -+#define WIFI_STA_CONNECTED BIT0 -+#define WIFI_AP_CONNECTED BIT1 -+#define WIFI_HS_CONNECTED BIT2 -+#define WIFI_P2P_GO_CONNECTED BIT3 -+#define WIFI_P2P_GC_CONNECTED BIT4 -+ -+/* following is for command line utility */ -+#define CL_SPRINTF rsprintf -+#define CL_PRINTF DCMD_Printf -+#define CL_STRNCAT(dst, dst_size, src, src_size) rstrncat(dst, src, src_size) -+ -+static const char *const glbt_info_src[] = { -+ "BT Info[wifi fw]", -+ "BT Info[bt rsp]", -+ "BT Info[bt auto report]", -+}; -+ -+#define BTC_INFO_FTP BIT(7) -+#define BTC_INFO_A2DP BIT(6) -+#define BTC_INFO_HID BIT(5) -+#define BTC_INFO_SCO_BUSY BIT(4) -+#define BTC_INFO_ACL_BUSY BIT(3) -+#define BTC_INFO_INQ_PAGE BIT(2) -+#define BTC_INFO_SCO_ESCO BIT(1) -+#define BTC_INFO_CONNECTION BIT(0) -+ -+#define BTC_BTINFO_LENGTH_MAX 10 -+ -+enum btc_gnt_setup_state { -+ BTC_GNT_SET_SW_LOW = 0x0, -+ BTC_GNT_SET_SW_HIGH = 0x1, -+ BTC_GNT_SET_HW_PTA = 0x2, -+ BTC_GNT_SET_MAX -+}; -+ -+enum btc_gnt_setup_state_2 { -+ BTC_GNT_HW_PTA = 0x0, -+ BTC_GNT_SW_LOW = 0x1, -+ BTC_GNT_SW_HIGH = 0x3, -+ BTC_GNT_MAX -+}; -+ -+enum btc_path_ctrl_owner { -+ BTC_OWNER_BT = 0x0, -+ BTC_OWNER_WL = 0x1, -+ BTC_OWNER_MAX -+}; -+ -+enum btc_gnt_ctrl_type { -+ BTC_GNT_CTRL_BY_PTA = 0x0, -+ BTC_GNT_CTRL_BY_SW = 0x1, -+ BTC_GNT_CTRL_MAX -+}; -+ -+enum btc_gnt_ctrl_block { -+ BTC_GNT_BLOCK_RFC_BB = 0x0, -+ BTC_GNT_BLOCK_RFC = 0x1, -+ BTC_GNT_BLOCK_BB = 0x2, -+ BTC_GNT_BLOCK_MAX -+}; -+ -+enum btc_lte_coex_table_type { -+ BTC_CTT_WL_VS_LTE = 0x0, -+ BTC_CTT_BT_VS_LTE = 0x1, -+ BTC_CTT_MAX -+}; -+ -+enum btc_lte_break_table_type { -+ BTC_LBTT_WL_BREAK_LTE = 0x0, -+ BTC_LBTT_BT_BREAK_LTE = 0x1, -+ BTC_LBTT_LTE_BREAK_WL = 0x2, -+ BTC_LBTT_LTE_BREAK_BT = 0x3, -+ BTC_LBTT_MAX -+}; -+ -+enum btc_btinfo_src { -+ BTC_BTINFO_SRC_WL_FW = 0x0, -+ BTC_BTINFO_SRC_BT_RSP = 0x1, -+ BTC_BTINFO_SRC_BT_ACT = 0x2, -+ BTC_BTINFO_SRC_BT_IQK = 0x3, -+ BTC_BTINFO_SRC_BT_SCBD = 0x4, -+ BTC_BTINFO_SRC_H2C60 = 0x5, -+ BTC_BTINFO_SRC_MAX -+}; -+ -+enum btc_bt_profile { -+ BTC_BTPROFILE_NONE = 0, -+ BTC_BTPROFILE_HFP = BIT(0), -+ BTC_BTPROFILE_HID = BIT(1), -+ BTC_BTPROFILE_A2DP = BIT(2), -+ BTC_BTPROFILE_PAN = BIT(3), -+ BTC_BTPROFILE_MAX = 0xf -+}; -+ -+static const char *const bt_profile_string[] = { -+ "None", -+ "HFP", -+ "HID", -+ "HID + HFP", -+ "A2DP", -+ "A2DP + HFP", -+ "A2DP + HID", -+ "PAN + HID + HFP", -+ "PAN", -+ "PAN + HFP", -+ "PAN + HID", -+ "PAN + HID + HFP", -+ "PAN + A2DP", -+ "PAN + A2DP + HFP", -+ "PAN + A2DP + HID", -+ "PAN + A2DP + HID + HFP" -+}; -+ -+enum btc_bt_status { -+ BTC_BTSTATUS_NCON_IDLE = 0x0, -+ BTC_BTSTATUS_CON_IDLE = 0x1, -+ BTC_BTSTATUS_INQ_PAGE = 0x2, -+ BTC_BTSTATUS_ACL_BUSY = 0x3, -+ BTC_BTSTATUS_SCO_BUSY = 0x4, -+ BTC_BTSTATUS_ACL_SCO_BUSY = 0x5, -+ BTC_BTSTATUS_MAX -+}; -+ -+static const char *const bt_status_string[] = { -+ "BT Non-Connected-idle", -+ "BT Connected-idle", -+ "BT Inq-page", -+ "BT ACL-busy", -+ "BT SCO-busy", -+ "BT ACL-SCO-busy", -+ "BT Non-Defined-state" -+}; -+ -+enum btc_coex_algo { -+ BTC_COEX_NOPROFILE = 0x0, -+ BTC_COEX_HFP = 0x1, -+ BTC_COEX_HID = 0x2, -+ BTC_COEX_A2DP = 0x3, -+ BTC_COEX_PAN = 0x4, -+ BTC_COEX_A2DP_HID = 0x5, -+ BTC_COEX_A2DP_PAN = 0x6, -+ BTC_COEX_PAN_HID = 0x7, -+ BTC_COEX_A2DP_PAN_HID = 0x8, -+ BTC_COEX_MAX -+}; -+ -+static const char *const coex_algo_string[] = { -+ "No Profile", -+ "HFP", -+ "HID", -+ "A2DP", -+ "PAN", -+ "A2DP + HID", -+ "A2DP + PAN", -+ "PAN + HID", -+ "A2DP + PAN + HID" -+}; -+ -+enum btc_ext_ant_switch_type { -+ BTC_SWITCH_NONE = 0x0, -+ BTC_SWITCH_SPDT = 0x1, -+ BTC_SWITCH_SP3T = 0x2, -+ BTC_SWITCH_DPDT = 0x3, -+ BTC_SWITCH_ANTMAX -+}; -+ -+enum btc_ext_ant_switch_ctrl_type { -+ BTC_SWITCH_CTRL_BY_BBSW = 0x0, -+ BTC_SWITCH_CTRL_BY_PTA = 0x1, -+ BTC_SWITCH_CTRL_BY_ANTDIV = 0x2, -+ BTC_SWITCH_CTRL_BY_MAC = 0x3, -+ BTC_SWITCH_CTRL_BY_BT = 0x4, -+ BTC_SWITCH_CTRL_BY_FW = 0x5, -+ BTC_SWITCH_CTRL_MAX -+}; -+ -+enum btc_ext_ant_switch_pos_type { -+ BTC_SWITCH_TO_BT = 0x0, -+ BTC_SWITCH_TO_WLG = 0x1, -+ BTC_SWITCH_TO_WLA = 0x2, -+ BTC_SWITCH_TO_NOCARE = 0x3, -+ BTC_SWITCH_TO_WLG_BT = 0x4, -+ BTC_SWITCH_TO_MAX -+}; -+ -+enum btx_set_ant_phase { -+ BTC_ANT_INIT = 0x0, -+ BTC_ANT_WONLY = 0x1, -+ BTC_ANT_WOFF = 0x2, -+ BTC_ANT_2G = 0x3, -+ BTC_ANT_5G = 0x4, -+ BTC_ANT_BTMP = 0x5, -+ BTC_ANT_POWERON = 0x6, -+ BTC_ANT_2G_WL = 0x7, -+ BTC_ANT_2G_BT = 0x8, -+ BTC_ANT_MCC = 0x9, -+ BTC_ANT_2G_WLBT = 0xa, -+ BTC_ANT_2G_FREERUN = 0xb, -+ BTC_ANT_MAX -+}; -+ -+/*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/ -+enum btc_wl2bt_scoreboard { -+ BTC_SCBD_ACTIVE = BIT(0), -+ BTC_SCBD_ON = BIT(1), -+ BTC_SCBD_SCAN = BIT(2), -+ BTC_SCBD_UNDERTEST = BIT(3), -+ BTC_SCBD_RXGAIN = BIT(4), -+ BTC_SCBD_WLBUSY = BIT(7), -+ BTC_SCBD_EXTFEM = BIT(8), -+ BTC_SCBD_TDMA = BIT(9), -+ BTC_SCBD_FIX2M = BIT(10), -+ BTC_SCBD_MAILBOX_DBG = BIT(14), -+ BTC_SCBD_ALL = 0xffff, -+ BTC_SCBD_ALL_32BIT = 0xffffffff -+}; -+ -+enum btc_bt2wl_scoreboard { -+ BTC_SCBD_BT_ONOFF = BIT(1), -+ BTC_SCBD_BT_LPS = BIT(7) -+}; -+enum btc_scoreboard_bit_num { -+ BTC_SCBD_16_BIT = BIT(0), -+ BTC_SCBD_32_BIT = BIT(1) -+}; -+ -+enum btc_runreason { -+ BTC_RSN_2GSCANSTART = 0x0, -+ BTC_RSN_5GSCANSTART = 0x1, -+ BTC_RSN_SCANFINISH = 0x2, -+ BTC_RSN_2GSWITCHBAND = 0x3, -+ BTC_RSN_5GSWITCHBAND = 0x4, -+ BTC_RSN_2GCONSTART = 0x5, -+ BTC_RSN_5GCONSTART = 0x6, -+ BTC_RSN_2GCONFINISH = 0x7, -+ BTC_RSN_5GCONFINISH = 0x8, -+ BTC_RSN_2GMEDIA = 0x9, -+ BTC_RSN_5GMEDIA = 0xa, -+ BTC_RSN_MEDIADISCON = 0xb, -+ BTC_RSN_2GSPECIALPKT = 0xc, -+ BTC_RSN_5GSPECIALPKT = 0xd, -+ BTC_RSN_BTINFO = 0xe, -+ BTC_RSN_PERIODICAL = 0xf, -+ BTC_RSN_PNP = 0x10, -+ BTC_RSN_LPS = 0x11, -+ BTC_RSN_TIMERUP = 0x12, -+ BTC_RSN_WLSTATUS = 0x13, -+ BTC_RSN_BTCNT = 0x14, -+ BTC_RSN_RFK = 0x15, -+ BTC_RSN_MAX -+}; -+ -+static const char *const run_reason_string[] = { -+ "2G_SCAN_START", -+ "5G_SCAN_START", -+ "SCAN_FINISH", -+ "2G_SWITCH_BAND", -+ "5G_SWITCH_BAND", -+ "2G_CONNECT_START", -+ "5G_CONNECT_START", -+ "2G_CONNECT_FINISH", -+ "5G_CONNECT_FINISH", -+ "2G_MEDIA_STATUS", -+ "5G_MEDIA_STATUS", -+ "MEDIA_DISCONNECT", -+ "2G_SPECIALPKT", -+ "5G_SPECIALPKT", -+ "BTINFO", -+ "PERIODICAL", -+ "PNPNotify", -+ "LPSNotify", -+ "TimerUp", -+ "WL_STATUS_CHANGE", -+ "BT_CNT_CHANGE", -+ "WL_RFK", -+ "Reason Max" -+}; -+ -+enum btc_wl_link_mode { -+ BTC_WLINK_2G1PORT = 0x0, -+ BTC_WLINK_2GMPORT = 0x1, -+ BTC_WLINK_25GMPORT = 0x2, -+ BTC_WLINK_5G = 0x3, -+ BTC_WLINK_2GGO = 0x4, -+ BTC_WLINK_2GGC = 0x5, -+ BTC_WLINK_BTMR = 0x6, -+ BTC_WLINK_2GFREE = 0x7, -+ BTC_WLINK_MAX -+}; -+ -+static const char *const coex_mode_string[] = { -+ "2G-SP", -+ "2G-MP", -+ "25G-MP", -+ "5G", -+ "2G-P2P-GO", -+ "2G-P2P-GC", -+ "BT-MR", -+ "2G1RFREE", -+ "unknow" -+}; -+ -+enum btc_bt_state_cnt { -+ BTC_CNT_BT_RETRY = 0x0, -+ BTC_CNT_BT_REINIT = 0x1, -+ BTC_CNT_BT_POPEVENT = 0x2, -+ BTC_CNT_BT_SETUPLINK = 0x3, -+ BTC_CNT_BT_IGNWLANACT = 0x4, -+ BTC_CNT_BT_INQ = 0x5, -+ BTC_CNT_BT_PAGE = 0x6, -+ BTC_CNT_BT_ROLESWITCH = 0x7, -+ BTC_CNT_BT_AFHUPDATE = 0x8, -+ BTC_CNT_BT_DISABLE = 0x9, -+ BTC_CNT_BT_INFOUPDATE = 0xa, -+ BTC_CNT_BT_IQK = 0xb, -+ BTC_CNT_BT_IQKFAIL = 0xc, -+ BTC_CNT_BT_TRX = 0xd, -+ BTC_CNT_BT_MAX -+}; -+ -+enum btc_wl_state_cnt { -+ BTC_CNT_WL_SCANAP = 0x0, -+ BTC_CNT_WL_ARP = 0x1, -+ BTC_CNT_WL_GNTERR = 0x2, -+ BTC_CNT_WL_PSFAIL = 0x3, -+ BTC_CNT_WL_COEXRUN = 0x4, -+ BTC_CNT_WL_COEXINFO1 = 0x5, -+ BTC_CNT_WL_COEXINFO2 = 0x6, -+ BTC_CNT_WL_AUTOSLOT_HANG = 0x7, -+ BTC_CNT_WL_NOISY0 = 0x8, -+ BTC_CNT_WL_NOISY1 = 0x9, -+ BTC_CNT_WL_NOISY2 = 0xa, -+ BTC_CNT_WL_ACTIVEPORT = 0xb, -+ BTC_CNT_WL_LEAKAP_NORX = 0xc, -+ BTC_CNT_WL_FW_NOTIFY = 0xd, -+ BTC_CNT_WL_2G_TDDTRY = 0xe, -+ BTC_CNT_WL_2G_FDDSTAY = 0xf, -+ BTC_CNT_WL_MAX -+}; -+ -+enum btc_wl_crc_cnt { -+ BTC_WLCRC_11BOK = 0x0, -+ BTC_WLCRC_11GOK = 0x1, -+ BTC_WLCRC_11NOK = 0x2, -+ BTC_WLCRC_11VHTOK = 0x3, -+ BTC_WLCRC_11BERR = 0x4, -+ BTC_WLCRC_11GERR = 0x5, -+ BTC_WLCRC_11NERR = 0x6, -+ BTC_WLCRC_11VHTERR = 0x7, -+ BTC_WLCRC_MAX -+}; -+ -+enum btc_timer_cnt { -+ BTC_TIMER_WL_STAYBUSY = 0x0, -+ BTC_TIMER_WL_COEXFREEZE = 0x1, -+ BTC_TIMER_WL_SPECPKT = 0x2, -+ BTC_TIMER_WL_CONNPKT = 0x3, -+ BTC_TIMER_WL_PNPWAKEUP = 0x4, -+ BTC_TIMER_WL_CCKLOCK = 0x5, -+ BTC_TIMER_WL_FWDBG = 0x6, -+ BTC_TIMER_BT_RELINK = 0x7, -+ BTC_TIMER_BT_REENABLE = 0x8, -+ BTC_TIMER_BT_MULTILINK = 0x9, -+ BTC_TIMER_BT_INQPAGE = 0xa, -+ BTC_TIMER_BT_A2DP_ACT = 0xb, -+ BTC_TIMER_MAX -+}; -+ -+enum btc_wl_status_change { -+ BTC_WLSTATUS_CHANGE_TOIDLE = 0x0, -+ BTC_WLSTATUS_CHANGE_TOBUSY = 0x1, -+ BTC_WLSTATUS_CHANGE_RSSI = 0x2, -+ BTC_WLSTATUS_CHANGE_LINKINFO = 0x3, -+ BTC_WLSTATUS_CHANGE_DIR = 0x4, -+ BTC_WLSTATUS_CHANGE_NOISY = 0x5, -+ BTC_WLSTATUS_CHANGE_BTCNT = 0x6, -+ BTC_WLSTATUS_CHANGE_LOCKTRY = 0x7, -+ BTC_WLSTATUS_CHANGE_MAX -+}; -+ -+enum btc_commom_chip_setup { -+ BTC_CSETUP_INIT_HW = 0x0, -+ BTC_CSETUP_ANT_SWITCH = 0x1, -+ BTC_CSETUP_GNT_FIX = 0x2, -+ BTC_CSETUP_GNT_DEBUG = 0x3, -+ BTC_CSETUP_RFE_TYPE = 0x4, -+ BTC_CSETUP_COEXINFO_HW = 0x5, -+ BTC_CSETUP_WL_TX_POWER = 0x6, -+ BTC_CSETUP_WL_RX_GAIN = 0x7, -+ BTC_CSETUP_WLAN_ACT_IPS = 0x8, -+ BTC_CSETUP_BT_CTRL_ACT = 0x9, -+ BTC_CSETUP_MAX -+}; -+ -+enum btc_indirect_reg_type { -+ BTC_INDIRECT_1700 = 0x0, -+ BTC_INDIRECT_7C0 = 0x1, -+ BTC_INDIRECT_MAX -+}; -+ -+enum btc_pstdma_type { -+ BTC_PSTDMA_FORCE_LPSOFF = 0x0, -+ BTC_PSTDMA_FORCE_LPSON = 0x1, -+ BTC_PSTDMA_MAX -+}; -+ -+enum btc_btrssi_type { -+ BTC_BTRSSI_RATIO = 0x0, -+ BTC_BTRSSI_DBM = 0x1, -+ BTC_BTRSSI_MAX -+}; -+ -+enum btc_wl_priority_mask { -+ BTC_WLPRI_RX_RSP = 2, -+ BTC_WLPRI_TX_RSP = 3, -+ BTC_WLPRI_TX_BEACON = 4, -+ BTC_WLPRI_TX_OFDM = 11, -+ BTC_WLPRI_TX_CCK = 12, -+ BTC_WLPRI_TX_BEACONQ = 27, -+ BTC_WLPRI_RX_CCK = 28, -+ BTC_WLPRI_RX_OFDM = 29, -+ BTC_WLPRI_MAX -+}; -+ -+enum btc_ext_chip_id{ -+ BTC_EXT_CHIP_NONE, -+ BTC_EXT_CHIP_RF4CE, -+ BTC_EXT_CHIP_MAX -+}; -+ -+enum btc_ext_chip_mode{ -+ BTC_EXTMODE_NORMAL, -+ BTC_EXTMODE_VOICE, -+ BTC_EXTMODE_MAX -+}; -+ -+enum btc_wl_rfk_type { -+ BTC_PWR_TRK = 0, -+ BTC_IQK = 1, -+ BTC_LCK = 2, -+ BTC_DPK = 3, -+ BTC_TXGAPK = 4, -+ BTC_RFK_TYPE_MAX -+}; -+ -+enum btc_wl_rfk_state { -+ BTC_RFK_START = 0, -+ BTC_RFK_END = 1, -+ BTC_RFK_STATE_MAX -+}; -+ -+struct btc_board_info { -+ /* The following is some board information */ -+ u8 bt_chip_type; -+ u8 pg_ant_num; /* pg ant number */ -+ u8 btdm_ant_num; /* ant number for btdm */ -+ u8 btdm_ant_num_by_ant_det; /* ant number for btdm after antenna detection */ -+ u8 btdm_ant_pos; /* Bryant Add to indicate Antenna Position for (pg_ant_num = 2) && (btdm_ant_num =1) (DPDT+1Ant case) */ -+ u8 single_ant_path; /* current used for 8723b only, 1=>s0, 0=>s1 */ -+ boolean tfbga_package; /* for Antenna detect threshold */ -+ boolean btdm_ant_det_finish; -+ boolean btdm_ant_det_already_init_phydm; -+ u8 ant_type; -+ u8 rfe_type; -+ u8 ant_div_cfg; -+ boolean btdm_ant_det_complete_fail; -+ u8 ant_det_result; -+ boolean ant_det_result_five_complete; -+ u32 antdetval; -+ u8 customerID; -+ u8 customer_id; -+ u8 ant_distance; /* WL-BT antenna space for non-shared antenna */ -+ u8 ext_chip_id; -+}; -+ -+struct btc_coex_dm { -+ boolean cur_ignore_wlan_act; -+ boolean cur_ps_tdma_on; -+ boolean cur_low_penalty_ra; -+ boolean cur_wl_rx_low_gain_en; -+ -+ u8 bt_rssi_state[4]; -+ u8 wl_rssi_state[4]; -+ u8 cur_ps_tdma; -+ u8 ps_tdma_para[5]; -+ u8 fw_tdma_para[5]; -+ u8 cur_lps; -+ u8 cur_rpwm; -+ u8 cur_bt_pwr_lvl; -+ u8 cur_bt_lna_lvl; -+ u8 cur_wl_pwr_lvl; -+ u8 cur_algorithm; -+ u8 bt_status; -+ u8 wl_chnl_info[3]; -+ u8 cur_toggle_para[6]; -+ u32 cur_ant_pos_type; -+ u32 cur_switch_status; -+ u32 setting_tdma; -+}; -+ -+struct btc_coex_sta { -+ boolean coex_freeze; -+ boolean coex_freerun; -+ boolean rf4ce_en; -+ boolean force_freerun; -+ boolean force_tdd; -+ -+ boolean bt_disabled; -+ boolean bt_disabled_pre; -+ boolean bt_link_exist; -+ boolean bt_whck_test; -+ boolean bt_inq_page; -+ boolean bt_inq_page_pre; -+ boolean bt_inq_page_remain; -+ boolean bt_inq; -+ boolean bt_page; -+ boolean bt_ble_voice; -+ boolean bt_ble_exist; -+ boolean bt_hfp_exist; -+ boolean bt_a2dp_exist; -+ boolean bt_hid_exist; -+ boolean bt_pan_exist; // PAN or OPP -+ boolean bt_opp_exist; //OPP only -+ boolean bt_msft_mr_exist; -+ boolean bt_acl_busy; -+ boolean bt_fix_2M; -+ boolean bt_setup_link; -+ boolean bt_multi_link; -+ boolean bt_multi_link_pre; -+ boolean bt_multi_link_remain; -+ boolean bt_a2dp_sink; -+ boolean bt_reenable; -+ boolean bt_ble_scan_en; -+ boolean bt_slave; -+ boolean bt_a2dp_active; -+ boolean bt_a2dp_active_pre; -+ boolean bt_a2dp_active_remain; -+ boolean bt_slave_latency; -+ boolean bt_init_scan; -+ boolean bt_418_hid_exist; -+ boolean bt_ble_hid_exist; -+ boolean bt_mesh; -+ boolean bt_ctr_ok; -+ -+ boolean wl_under_lps; -+ boolean wl_under_ips; -+ boolean wl_under_4way; -+ boolean wl_hi_pri_task1; -+ boolean wl_hi_pri_task2; -+ boolean wl_cck_lock; -+ boolean wl_cck_lock_pre; -+ boolean wl_cck_lock_ever; -+ boolean wl_force_lps_ctrl; -+ boolean wl_busy_pre; -+ boolean wl_gl_busy; -+ boolean wl_gl_busy_pre; -+ boolean wl_linkscan_proc; -+ boolean wl_mimo_ps; -+ boolean wl_cck_dead_lock_ap; -+ boolean wl_tx_limit_en; -+ boolean wl_ampdu_limit_en; -+ boolean wl_rxagg_limit_en; -+ boolean wl_connecting; -+ boolean wl_pnp_wakeup; -+ boolean wl_slot_toggle; -+ boolean wl_slot_toggle_change; /* if toggle to no-toggle */ -+ boolean wl_leak_ap; /* !is_no_wl_5ms_extend */ -+ boolean wl_blacklist_ap; -+ boolean wl_rfk; -+ -+ u8 coex_table_type; -+ u8 coex_run_reason; -+ u8 tdma_byte4_modify_pre; -+ u8 kt_ver; -+ u8 gnt_workaround_state; -+ u8 tdma_timer_base; -+ u8 bt_rssi; -+ u8 bt_profile_num; -+ u8 bt_profile_num_pre; -+ u8 bt_info_c2h[BTC_BTINFO_SRC_MAX][BTC_BTINFO_LENGTH_MAX]; -+ u8 bt_info_lb2; -+ u8 bt_info_lb3; -+ u8 bt_info_hb0; -+ u8 bt_info_hb1; -+ u8 bt_info_hb2; -+ u8 bt_info_hb3; -+ u8 bt_ble_scan_type; -+ u8 bt_afh_map[10]; -+ u8 bt_a2dp_vendor_id; -+ u8 bt_hid_pair_num; -+ u8 bt_hid_slot; -+ u8 bt_a2dp_bitpool; -+ u8 bt_iqk_state; -+ u8 bt_sut_pwr_lvl[4]; -+ u8 bt_golden_rx_shift[4]; -+ u8 bt_ext_autoslot_thres; -+ u8 ext_chip_mode; -+ -+ u8 wl_pnp_state_pre; -+ u8 wl_noisy_level; -+ u8 wl_fw_dbg_info[10]; -+ u8 wl_fw_dbg_info_pre[10]; -+ u8 wl_rx_rate; -+ u8 wl_tx_rate; -+ u8 wl_rts_rx_rate; -+ u8 wl_center_ch; -+ u8 wl_tx_macid; -+ u8 wl_tx_retry_ratio; -+ u8 wl_coex_mode; -+ u8 wl_iot_peer; -+ u8 wl_ra_thres; -+ u8 wl_ampdulen; -+ u8 wl_rxagg_size; -+ u8 wl_toggle_para[6]; -+ u8 wl_toggle_interval; -+ -+ u16 score_board_BW; -+ u32 score_board_WB; -+ u16 bt_reg_vendor_ac; -+ u16 bt_reg_vendor_ae; -+ u32 bt_reg_vendor_dac; -+ u16 bt_reg_modem_a; -+ u16 bt_reg_rf_2; -+ u16 bt_reg_rf_9; -+ u16 wl_txlimit; -+ -+ u32 score_board_BW_32bit; -+ u32 score_board_WB_32bit; -+ u32 hi_pri_tx; -+ u32 hi_pri_rx; -+ u32 lo_pri_tx; -+ u32 lo_pri_rx; -+ u32 bt_supported_feature; -+ u32 bt_supported_version; -+ u32 bt_ble_scan_para[3]; -+ u32 bt_a2dp_device_name; -+ u32 bt_a2dp_flush_time; -+ u32 wl_arfb1; -+ u32 wl_arfb2; -+ u32 wl_traffic_dir; -+ u32 wl_bw; -+ u32 cnt_bt_info_c2h[BTC_BTINFO_SRC_MAX]; -+ u32 cnt_bt[BTC_CNT_BT_MAX]; -+ u32 cnt_wl[BTC_CNT_WL_MAX]; -+ u32 cnt_timer[BTC_TIMER_MAX]; -+}; -+ -+struct btc_rfe_type { -+ boolean ant_switch_exist; -+ boolean ant_switch_diversity; /* If diversity on */ -+ boolean ant_switch_with_bt; /* If WL_2G/BT use ext-switch at shared-ant */ -+ u8 rfe_module_type; -+ u8 ant_switch_type; -+ u8 ant_switch_polarity; -+ -+ boolean band_switch_exist; -+ u8 band_switch_type; /* 0:DPDT, 1:SPDT */ -+ u8 band_switch_polarity; -+ -+ /* If TRUE: WLG at BTG, If FALSE: WLG at WLAG */ -+ boolean wlg_at_btg; -+}; -+ -+ -+struct btc_wifi_link_info_ext { -+ boolean is_all_under_5g; -+ boolean is_mcc_25g; -+ boolean is_p2p_connected; -+ boolean is_ap_mode; -+ boolean is_scan; -+ boolean is_link; -+ boolean is_roam; -+ boolean is_4way; -+ boolean is_32k; -+ boolean is_connected; -+ u8 num_of_active_port; -+ u32 port_connect_status; -+ u32 traffic_dir; -+ u32 wifi_bw; -+}; -+ -+struct btc_coex_table_para { -+ u32 bt; //0x6c0 -+ u32 wl; //0x6c4 -+}; -+ -+struct btc_tdma_para { -+ u8 para[5]; -+}; -+ -+struct btc_reg_byte_modify { -+ u32 addr; -+ u8 bitmask; -+ u8 val; -+}; -+ -+struct btc_5g_afh_map { -+ u32 wl_5g_ch; -+ u8 bt_skip_ch; -+ u8 bt_skip_span; -+}; -+ -+struct btc_rf_para { -+ u8 wl_pwr_dec_lvl; -+ u8 bt_pwr_dec_lvl; -+ boolean wl_low_gain_en; -+ u8 bt_lna_lvl; -+}; -+ -+typedef enum _BTC_DBG_OPCODE { -+ BTC_DBG_SET_COEX_NORMAL = 0x0, -+ BTC_DBG_SET_COEX_WIFI_ONLY = 0x1, -+ BTC_DBG_SET_COEX_BT_ONLY = 0x2, -+ BTC_DBG_SET_COEX_DEC_BT_PWR = 0x3, -+ BTC_DBG_SET_COEX_BT_AFH_MAP = 0x4, -+ BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT = 0x5, -+ BTC_DBG_SET_COEX_MANUAL_CTRL = 0x6, -+ BTC_DBG_MAX -+} BTC_DBG_OPCODE, *PBTC_DBG_OPCODE; -+ -+typedef enum _BTC_RSSI_STATE { -+ BTC_RSSI_STATE_HIGH = 0x0, -+ BTC_RSSI_STATE_MEDIUM = 0x1, -+ BTC_RSSI_STATE_LOW = 0x2, -+ BTC_RSSI_STATE_STAY_HIGH = 0x3, -+ BTC_RSSI_STATE_STAY_MEDIUM = 0x4, -+ BTC_RSSI_STATE_STAY_LOW = 0x5, -+ BTC_RSSI_MAX -+} BTC_RSSI_STATE, *PBTC_RSSI_STATE; -+#define BTC_RSSI_HIGH(_rssi_) ((_rssi_ == BTC_RSSI_STATE_HIGH || _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? TRUE:FALSE) -+#define BTC_RSSI_MEDIUM(_rssi_) ((_rssi_ == BTC_RSSI_STATE_MEDIUM || _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? TRUE:FALSE) -+#define BTC_RSSI_LOW(_rssi_) ((_rssi_ == BTC_RSSI_STATE_LOW || _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? TRUE:FALSE) -+ -+typedef enum _BTC_WIFI_ROLE { -+ BTC_ROLE_STATION = 0x0, -+ BTC_ROLE_AP = 0x1, -+ BTC_ROLE_IBSS = 0x2, -+ BTC_ROLE_HS_MODE = 0x3, -+ BTC_ROLE_MAX -+} BTC_WIFI_ROLE, *PBTC_WIFI_ROLE; -+ -+typedef enum _BTC_WIRELESS_FREQ { -+ BTC_FREQ_2_4G = 0x0, -+ BTC_FREQ_5G = 0x1, -+ BTC_FREQ_25G = 0x2, -+ BTC_FREQ_MAX -+} BTC_WIRELESS_FREQ, *PBTC_WIRELESS_FREQ; -+ -+typedef enum _BTC_WIFI_BW_MODE { -+ BTC_WIFI_BW_LEGACY = 0x0, -+ BTC_WIFI_BW_HT20 = 0x1, -+ BTC_WIFI_BW_HT40 = 0x2, -+ BTC_WIFI_BW_HT80 = 0x3, -+ BTC_WIFI_BW_HT160 = 0x4, -+ BTC_WIFI_BW_MAX -+} BTC_WIFI_BW_MODE, *PBTC_WIFI_BW_MODE; -+ -+typedef enum _BTC_WIFI_TRAFFIC_DIR { -+ BTC_WIFI_TRAFFIC_TX = 0x0, -+ BTC_WIFI_TRAFFIC_RX = 0x1, -+ BTC_WIFI_TRAFFIC_MAX -+} BTC_WIFI_TRAFFIC_DIR, *PBTC_WIFI_TRAFFIC_DIR; -+ -+typedef enum _BTC_WIFI_PNP { -+ BTC_WIFI_PNP_WAKE_UP = 0x0, -+ BTC_WIFI_PNP_SLEEP = 0x1, -+ BTC_WIFI_PNP_SLEEP_KEEP_ANT = 0x2, -+ BTC_WIFI_PNP_WOWLAN = 0x3, -+ BTC_WIFI_PNP_MAX -+} BTC_WIFI_PNP, *PBTC_WIFI_PNP; -+ -+typedef enum _BTC_IOT_PEER { -+ BTC_IOT_PEER_UNKNOWN = 0, -+ BTC_IOT_PEER_REALTEK = 1, -+ BTC_IOT_PEER_REALTEK_92SE = 2, -+ BTC_IOT_PEER_BROADCOM = 3, -+ BTC_IOT_PEER_RALINK = 4, -+ BTC_IOT_PEER_ATHEROS = 5, -+ BTC_IOT_PEER_CISCO = 6, -+ BTC_IOT_PEER_MERU = 7, -+ BTC_IOT_PEER_MARVELL = 8, -+ BTC_IOT_PEER_REALTEK_SOFTAP = 9, /* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */ -+ BTC_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */ -+ BTC_IOT_PEER_AIRGO = 11, -+ BTC_IOT_PEER_INTEL = 12, -+ BTC_IOT_PEER_RTK_APCLIENT = 13, -+ BTC_IOT_PEER_REALTEK_81XX = 14, -+ BTC_IOT_PEER_REALTEK_WOW = 15, -+ BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16, -+ BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17, -+ BTC_IOT_PEER_MAX, -+} BTC_IOT_PEER, *PBTC_IOT_PEER; -+ -+/* for 8723b-d cut large current issue */ -+typedef enum _BTC_WIFI_COEX_STATE { -+ BTC_WIFI_STAT_INIT, -+ BTC_WIFI_STAT_IQK, -+ BTC_WIFI_STAT_NORMAL_OFF, -+ BTC_WIFI_STAT_MP_OFF, -+ BTC_WIFI_STAT_NORMAL, -+ BTC_WIFI_STAT_ANT_DIV, -+ BTC_WIFI_STAT_MAX -+} BTC_WIFI_COEX_STATE, *PBTC_WIFI_COEX_STATE; -+ -+typedef enum _BTC_ANT_TYPE { -+ BTC_ANT_TYPE_0, -+ BTC_ANT_TYPE_1, -+ BTC_ANT_TYPE_2, -+ BTC_ANT_TYPE_3, -+ BTC_ANT_TYPE_4, -+ BTC_ANT_TYPE_MAX -+} BTC_ANT_TYPE, *PBTC_ANT_TYPE; -+ -+typedef enum _BTC_VENDOR { -+ BTC_VENDOR_LENOVO, -+ BTC_VENDOR_ASUS, -+ BTC_VENDOR_OTHER -+} BTC_VENDOR, *PBTC_VENDOR; -+ -+ -+/* defined for BFP_BTC_GET */ -+typedef enum _BTC_GET_TYPE { -+ /* type BOOLEAN */ -+ BTC_GET_BL_HS_OPERATION, -+ BTC_GET_BL_HS_CONNECTING, -+ BTC_GET_BL_WIFI_FW_READY, -+ BTC_GET_BL_WIFI_CONNECTED, -+ BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED, -+ BTC_GET_BL_WIFI_LINK_INFO, -+ BTC_GET_BL_WIFI_BUSY, -+ BTC_GET_BL_WIFI_SCAN, -+ BTC_GET_BL_WIFI_LINK, -+ BTC_GET_BL_WIFI_ROAM, -+ BTC_GET_BL_WIFI_4_WAY_PROGRESS, -+ BTC_GET_BL_WIFI_UNDER_5G, -+ BTC_GET_BL_WIFI_AP_MODE_ENABLE, -+ BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, -+ BTC_GET_BL_WIFI_UNDER_B_MODE, -+ BTC_GET_BL_EXT_SWITCH, -+ BTC_GET_BL_WIFI_IS_IN_MP_MODE, -+ BTC_GET_BL_IS_ASUS_8723B, -+ BTC_GET_BL_RF4CE_CONNECTED, -+ BTC_GET_BL_WIFI_LW_PWR_STATE, -+ -+ /* type s4Byte */ -+ BTC_GET_S4_WIFI_RSSI, -+ BTC_GET_S4_HS_RSSI, -+ -+ /* type u4Byte */ -+ BTC_GET_U4_WIFI_BW, -+ BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, -+ BTC_GET_U4_WIFI_TRAFFIC_DIR, -+ BTC_GET_U4_WIFI_FW_VER, -+ BTC_GET_U4_WIFI_PHY_VER, -+ BTC_GET_U4_WIFI_LINK_STATUS, -+ BTC_GET_U4_BT_PATCH_VER, -+ BTC_GET_U4_VENDOR, -+ BTC_GET_U4_SUPPORTED_VERSION, -+ BTC_GET_U4_SUPPORTED_FEATURE, -+ BTC_GET_U4_BT_DEVICE_INFO, -+ BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL, -+ BTC_GET_U4_BT_A2DP_FLUSH_VAL, -+ BTC_GET_U4_WIFI_IQK_TOTAL, -+ BTC_GET_U4_WIFI_IQK_OK, -+ BTC_GET_U4_WIFI_IQK_FAIL, -+ -+ /* type u1Byte */ -+ BTC_GET_U1_WIFI_DOT11_CHNL, -+ BTC_GET_U1_WIFI_CENTRAL_CHNL, -+ BTC_GET_U1_WIFI_HS_CHNL, -+ BTC_GET_U1_WIFI_P2P_CHNL, -+ BTC_GET_U1_MAC_PHY_MODE, -+ BTC_GET_U1_AP_NUM, -+ BTC_GET_U1_ANT_TYPE, -+ BTC_GET_U1_IOT_PEER, -+ BTC_GET_BL_WIFI_BSSID, -+ -+ /* type u2Byte */ -+ BTC_GET_U2_BEACON_PERIOD, -+ -+ /*===== for 1Ant ======*/ -+ BTC_GET_U1_LPS_MODE, -+ -+ BTC_GET_MAX -+} BTC_GET_TYPE, *PBTC_GET_TYPE; -+ -+/* defined for BFP_BTC_SET */ -+typedef enum _BTC_SET_TYPE { -+ /* type BOOLEAN */ -+ BTC_SET_BL_BT_DISABLE, -+ BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE, -+ BTC_SET_BL_BT_TRAFFIC_BUSY, -+ BTC_SET_BL_BT_LIMITED_DIG, -+ BTC_SET_BL_FORCE_TO_ROAM, -+ BTC_SET_BL_TO_REJ_AP_AGG_PKT, -+ BTC_SET_BL_BT_CTRL_AGG_SIZE, -+ BTC_SET_BL_INC_SCAN_DEV_NUM, -+ BTC_SET_BL_BT_TX_RX_MASK, -+ BTC_SET_BL_MIRACAST_PLUS_BT, -+ BTC_SET_BL_BT_LNA_CONSTRAIN_LEVEL, -+ BTC_SET_BL_BT_GOLDEN_RX_RANGE, -+ -+ /* type u1Byte */ -+ BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, -+ BTC_SET_U1_AGG_BUF_SIZE, -+ -+ /* type trigger some action */ -+ BTC_SET_ACT_GET_BT_RSSI, -+ BTC_SET_ACT_AGGREGATE_CTRL, -+ BTC_SET_ACT_ANTPOSREGRISTRY_CTRL, -+ -+ // for mimo ps mode setting -+ BTC_SET_MIMO_PS_MODE, -+ /*===== for 1Ant ======*/ -+ /* type BOOLEAN */ -+ -+ /* type u1Byte */ -+ BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, -+ BTC_SET_U1_LPS_VAL, -+ BTC_SET_U1_RPWM_VAL, -+ /* type trigger some action */ -+ BTC_SET_ACT_LEAVE_LPS, -+ BTC_SET_ACT_ENTER_LPS, -+ BTC_SET_ACT_NORMAL_LPS, -+ BTC_SET_ACT_PRE_NORMAL_LPS, -+ BTC_SET_ACT_POST_NORMAL_LPS, -+ BTC_SET_ACT_DISABLE_LOW_POWER, -+ BTC_SET_ACT_UPDATE_RAMASK, -+ BTC_SET_ACT_SEND_MIMO_PS, -+ /* BT Coex related */ -+ BTC_SET_ACT_CTRL_BT_INFO, -+ BTC_SET_ACT_CTRL_BT_COEX, -+ BTC_SET_ACT_CTRL_8723B_ANT, -+ BTC_SET_RESET_COEX_VAR, -+ /*=================*/ -+ BTC_SET_MAX -+} BTC_SET_TYPE, *PBTC_SET_TYPE; -+ -+typedef enum _BTC_DBG_DISP_TYPE { -+ BTC_DBG_DISP_COEX_STATISTICS = 0x0, -+ BTC_DBG_DISP_BT_LINK_INFO = 0x1, -+ BTC_DBG_DISP_WIFI_STATUS = 0x2, -+ BTC_DBG_DISP_MAX -+} BTC_DBG_DISP_TYPE, *PBTC_DBG_DISP_TYPE; -+ -+typedef enum _BTC_NOTIFY_TYPE_IPS { -+ BTC_IPS_LEAVE = 0x0, -+ BTC_IPS_ENTER = 0x1, -+ BTC_IPS_MAX -+} BTC_NOTIFY_TYPE_IPS, *PBTC_NOTIFY_TYPE_IPS; -+typedef enum _BTC_NOTIFY_TYPE_LPS { -+ BTC_LPS_DISABLE = 0x0, -+ BTC_LPS_ENABLE = 0x1, -+ BTC_LPS_MAX -+} BTC_NOTIFY_TYPE_LPS, *PBTC_NOTIFY_TYPE_LPS; -+typedef enum _BTC_NOTIFY_TYPE_SCAN { -+ BTC_SCAN_FINISH = 0x0, -+ BTC_SCAN_START = 0x1, -+ BTC_SCAN_START_2G = 0x2, -+ BTC_SCAN_START_5G = 0x3, -+ BTC_SCAN_MAX -+} BTC_NOTIFY_TYPE_SCAN, *PBTC_NOTIFY_TYPE_SCAN; -+typedef enum _BTC_NOTIFY_TYPE_SWITCHBAND { -+ BTC_NOT_SWITCH = 0x0, -+ BTC_SWITCH_TO_24G = 0x1, -+ BTC_SWITCH_TO_5G = 0x2, -+ BTC_SWITCH_TO_24G_NOFORSCAN = 0x3, -+ BTC_SWITCH_MAX -+} BTC_NOTIFY_TYPE_SWITCHBAND, *PBTC_NOTIFY_TYPE_SWITCHBAND; -+typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE { -+ BTC_ASSOCIATE_FINISH = 0x0, -+ BTC_ASSOCIATE_START = 0x1, -+ BTC_ASSOCIATE_5G_FINISH = 0x2, -+ BTC_ASSOCIATE_5G_START = 0x3, -+ BTC_ASSOCIATE_MAX -+} BTC_NOTIFY_TYPE_ASSOCIATE, *PBTC_NOTIFY_TYPE_ASSOCIATE; -+typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS { -+ BTC_MEDIA_DISCONNECT = 0x0, -+ BTC_MEDIA_CONNECT = 0x1, -+ BTC_MEDIA_CONNECT_5G = 0x02, -+ BTC_MEDIA_MAX -+} BTC_NOTIFY_TYPE_MEDIA_STATUS, *PBTC_NOTIFY_TYPE_MEDIA_STATUS; -+typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET { -+ BTC_PACKET_UNKNOWN = 0x0, -+ BTC_PACKET_DHCP = 0x1, -+ BTC_PACKET_ARP = 0x2, -+ BTC_PACKET_EAPOL = 0x3, -+ BTC_PACKET_MAX -+} BTC_NOTIFY_TYPE_SPECIFIC_PACKET, *PBTC_NOTIFY_TYPE_SPECIFIC_PACKET; -+typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION { -+ BTC_STACK_OP_NONE = 0x0, -+ BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1, -+ BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2, -+ BTC_STACK_OP_MAX -+} BTC_NOTIFY_TYPE_STACK_OPERATION, *PBTC_NOTIFY_TYPE_STACK_OPERATION; -+ -+typedef enum _BTC_LINK_CHANGE_TYPE{ -+ BTC_LINK_CHANGE_TYPE_NONE = 0x0, -+ BTC_LINK_CHANGE_TYPE_ECSA_START = 0x1, -+ BTC_LINK_CHANGE_TYPE_ECSA_DONE = 0x2, -+ BTC_LINK_CHANGE_TYPE_MAX -+}BTC_LINK_CHANGE_TYPE,*PBTC_LINK_CHANGE_TYPE; -+ -+/* Bryant Add */ -+typedef enum _BTC_ANTENNA_POS { -+ BTC_ANTENNA_AT_MAIN_PORT = 0x1, -+ BTC_ANTENNA_AT_AUX_PORT = 0x2, -+} BTC_ANTENNA_POS, *PBTC_ANTENNA_POS; -+ -+/* Bryant Add */ -+typedef enum _BTC_BT_OFFON { -+ BTC_BT_OFF = 0x0, -+ BTC_BT_ON = 0x1, -+} BTC_BTOFFON, *PBTC_BT_OFFON; -+ -+#define BTC_5G_BAND 0x80 -+ -+/*================================================== -+For following block is for coex offload -+==================================================*/ -+typedef struct _COL_H2C { -+ u1Byte opcode; -+ u1Byte opcode_ver:4; -+ u1Byte req_num:4; -+ u1Byte buf[1]; -+} COL_H2C, *PCOL_H2C; -+ -+#define COL_C2H_ACK_HDR_LEN 3 -+typedef struct _COL_C2H_ACK { -+ u1Byte status; -+ u1Byte opcode_ver:4; -+ u1Byte req_num:4; -+ u1Byte ret_len; -+ u1Byte buf[1]; -+} COL_C2H_ACK, *PCOL_C2H_ACK; -+ -+#define COL_C2H_IND_HDR_LEN 3 -+typedef struct _COL_C2H_IND { -+ u1Byte type; -+ u1Byte version; -+ u1Byte length; -+ u1Byte data[1]; -+} COL_C2H_IND, *PCOL_C2H_IND; -+ -+/*============================================ -+NOTE: for debug message, the following define should match -+the strings in coexH2cResultString. -+============================================*/ -+typedef enum _COL_H2C_STATUS { -+ /* c2h status */ -+ COL_STATUS_C2H_OK = 0x00, /* Wifi received H2C request and check content ok. */ -+ COL_STATUS_C2H_UNKNOWN = 0x01, /* Not handled routine */ -+ COL_STATUS_C2H_UNKNOWN_OPCODE = 0x02, /* Invalid OP code, It means that wifi firmware received an undefiend OP code. */ -+ COL_STATUS_C2H_OPCODE_VER_MISMATCH = 0x03, /* Wifi firmware and wifi driver mismatch, need to update wifi driver or wifi or. */ -+ COL_STATUS_C2H_PARAMETER_ERROR = 0x04, /* Error paraneter.(ex: parameters = NULL but it should have values) */ -+ COL_STATUS_C2H_PARAMETER_OUT_OF_RANGE = 0x05, /* Wifi firmware needs to check the parameters from H2C request and return the status.(ex: ch = 500, it's wrong) */ -+ /* other COL status start from here */ -+ COL_STATUS_C2H_REQ_NUM_MISMATCH , /* c2h req_num mismatch, means this c2h is not we expected. */ -+ COL_STATUS_H2C_HALMAC_FAIL , /* HALMAC return fail. */ -+ COL_STATUS_H2C_TIMTOUT , /* not received the c2h response from fw */ -+ COL_STATUS_INVALID_C2H_LEN , /* invalid coex offload c2h ack length, must >= 3 */ -+ COL_STATUS_COEX_DATA_OVERFLOW , /* coex returned length over the c2h ack length. */ -+ COL_STATUS_MAX -+} COL_H2C_STATUS, *PCOL_H2C_STATUS; -+ -+#define COL_MAX_H2C_REQ_NUM 16 -+ -+#define COL_H2C_BUF_LEN 20 -+typedef enum _COL_OPCODE { -+ COL_OP_WIFI_STATUS_NOTIFY = 0x0, -+ COL_OP_WIFI_PROGRESS_NOTIFY = 0x1, -+ COL_OP_WIFI_INFO_NOTIFY = 0x2, -+ COL_OP_WIFI_POWER_STATE_NOTIFY = 0x3, -+ COL_OP_SET_CONTROL = 0x4, -+ COL_OP_GET_CONTROL = 0x5, -+ COL_OP_WIFI_OPCODE_MAX -+} COL_OPCODE, *PCOL_OPCODE; -+ -+typedef enum _COL_IND_TYPE { -+ COL_IND_BT_INFO = 0x0, -+ COL_IND_PSTDMA = 0x1, -+ COL_IND_LIMITED_TX_RX = 0x2, -+ COL_IND_COEX_TABLE = 0x3, -+ COL_IND_REQ = 0x4, -+ COL_IND_MAX -+} COL_IND_TYPE, *PCOL_IND_TYPE; -+ -+typedef struct _COL_SINGLE_H2C_RECORD { -+ u1Byte h2c_buf[COL_H2C_BUF_LEN]; /* the latest sent h2c buffer */ -+ u4Byte h2c_len; -+ u1Byte c2h_ack_buf[COL_H2C_BUF_LEN]; /* the latest received c2h buffer */ -+ u4Byte c2h_ack_len; -+ u4Byte count; /* the total number of the sent h2c command */ -+ u4Byte status[COL_STATUS_MAX]; /* the c2h status for the sent h2c command */ -+} COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD; -+ -+typedef struct _COL_SINGLE_C2H_IND_RECORD { -+ u1Byte ind_buf[COL_H2C_BUF_LEN]; /* the latest received c2h indication buffer */ -+ u4Byte ind_len; -+ u4Byte count; /* the total number of the rcvd c2h indication */ -+ u4Byte status[COL_STATUS_MAX]; /* the c2h indication verified status */ -+} COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD; -+ -+typedef struct _BTC_OFFLOAD { -+ /* H2C command related */ -+ u1Byte h2c_req_num; -+ u4Byte cnt_h2c_sent; -+ COL_SINGLE_H2C_RECORD h2c_record[COL_OP_WIFI_OPCODE_MAX]; -+ -+ /* C2H Ack related */ -+ u4Byte cnt_c2h_ack; -+ u4Byte status[COL_STATUS_MAX]; -+ struct completion c2h_event[COL_MAX_H2C_REQ_NUM]; /* for req_num = 1~COL_MAX_H2C_REQ_NUM */ -+ u1Byte c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN]; -+ u1Byte c2h_ack_len[COL_MAX_H2C_REQ_NUM]; -+ -+ /* C2H Indication related */ -+ u4Byte cnt_c2h_ind; -+ COL_SINGLE_C2H_IND_RECORD c2h_ind_record[COL_IND_MAX]; -+ u4Byte c2h_ind_status[COL_STATUS_MAX]; -+ u1Byte c2h_ind_buf[COL_H2C_BUF_LEN]; -+ u1Byte c2h_ind_len; -+} BTC_OFFLOAD, *PBTC_OFFLOAD; -+extern BTC_OFFLOAD gl_coex_offload; -+/*==================================================*/ -+ -+/* BTC_LINK_MODE same as WIFI_LINK_MODE */ -+typedef enum _BTC_LINK_MODE{ -+ BTC_LINK_NONE=0, -+ BTC_LINK_ONLY_GO, -+ BTC_LINK_ONLY_GC, -+ BTC_LINK_ONLY_STA, -+ BTC_LINK_ONLY_AP, -+ BTC_LINK_2G_MCC_GO_STA, -+ BTC_LINK_5G_MCC_GO_STA, -+ BTC_LINK_25G_MCC_GO_STA, -+ BTC_LINK_2G_MCC_GC_STA, -+ BTC_LINK_5G_MCC_GC_STA, -+ BTC_LINK_25G_MCC_GC_STA, -+ BTC_LINK_2G_SCC_GO_STA, -+ BTC_LINK_5G_SCC_GO_STA, -+ BTC_LINK_2G_SCC_GC_STA, -+ BTC_LINK_5G_SCC_GC_STA, -+ BTC_LINK_MAX=30 -+}BTC_LINK_MODE, *PBTC_LINK_MODE; -+ -+ -+struct btc_wifi_link_info { -+ BTC_LINK_MODE link_mode; /* LinkMode */ -+ u1Byte sta_center_channel; /* StaCenterChannel */ -+ u1Byte p2p_center_channel; /* P2PCenterChannel */ -+ BOOLEAN bany_client_join_go; -+ BOOLEAN benable_noa; -+ BOOLEAN bhotspot; -+}; -+ -+#if 0 -+typedef enum _BTC_MULTI_PORT_TDMA_MODE { -+ BTC_MULTI_PORT_TDMA_MODE_NONE=0, -+ BTC_MULTI_PORT_TDMA_MODE_2G_SCC_GO, -+ BTC_MULTI_PORT_TDMA_MODE_2G_P2P_GO, -+ BTC_MULTI_PORT_TDMA_MODE_2G_HOTSPOT_GO -+} BTC_MULTI_PORT_TDMA_MODE, *PBTC_MULTI_PORT_TDMA_MODE; -+ -+typedef struct btc_multi_port_tdma_info { -+ BTC_MULTI_PORT_TDMA_MODE btc_multi_port_tdma_mode; -+ u1Byte start_time_from_bcn; -+ u1Byte bt_time; -+} BTC_MULTI_PORT_TDMA_INFO, *PBTC_MULTI_PORT_TDMA_INFO; -+#endif -+ -+typedef enum _btc_concurrent_mode { -+ btc_concurrent_mode_none = 0, -+ btc_concurrent_mode_2g_go_miracast, -+ btc_concurrent_mode_2g_go_hotspot, -+ btc_concurrent_mode_2g_scc_go_miracast_sta, -+ btc_concurrent_mode_2g_scc_go_hotspot_sta, -+ btc_concurrent_mode_2g_gc, -+} btc_concurrent_mode, *pbtc_concurrent_mode; -+ -+struct btc_concurrent_setting { -+ btc_concurrent_mode btc_concurrent_mode; -+ u1Byte start_time_from_bcn; -+ u1Byte bt_time; -+}; -+ -+typedef u1Byte -+(*BFP_BTC_R1)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr -+ ); -+typedef u2Byte -+(*BFP_BTC_R2)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr -+ ); -+typedef u4Byte -+(*BFP_BTC_R4)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr -+ ); -+typedef VOID -+(*BFP_BTC_W1)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u1Byte Data -+ ); -+typedef VOID -+(*BFP_BTC_W1_BIT_MASK)( -+ IN PVOID pBtcContext, -+ IN u4Byte regAddr, -+ IN u1Byte bitMask, -+ IN u1Byte data1b -+ ); -+typedef VOID -+(*BFP_BTC_W2)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u2Byte Data -+ ); -+typedef VOID -+(*BFP_BTC_W4)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u4Byte Data -+ ); -+typedef VOID -+(*BFP_BTC_LOCAL_REG_W1)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u1Byte Data -+ ); -+typedef u4Byte -+(*BFP_BTC_R_LINDIRECT)( -+ IN PVOID pBtcContext, -+ IN u2Byte reg_addr -+ ); -+typedef u2Byte -+(*BFP_BTC_R_SCBD)( -+ IN PVOID pBtcContext, -+ IN pu2Byte score_board_val -+ ); -+typedef u4Byte -+(*BFP_BTC_R_SCBD_32BIT)( -+ IN PVOID pBtcContext, -+ IN pu4Byte score_board_val -+ ); -+typedef VOID -+(*BFP_BTC_W_SCBD)( -+ IN PVOID pBtcContext, -+ IN u2Byte bitpos, -+ IN BOOLEAN state -+ ); -+typedef VOID -+(*BFP_BTC_W_SCBD_32BIT)( -+ IN PVOID pBtcContext, -+ IN u4Byte bitpos, -+ IN BOOLEAN state -+ ); -+typedef VOID -+(*BFP_BTC_W_LINDIRECT)( -+ IN PVOID pBtcContext, -+ IN u2Byte reg_addr, -+ IN u4Byte bit_mask, -+ IN u4Byte reg_value -+ ); -+typedef VOID -+(*BFP_BTC_SET_BB_REG)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask, -+ IN u4Byte Data -+ ); -+typedef u4Byte -+(*BFP_BTC_GET_BB_REG)( -+ IN PVOID pBtcContext, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask -+ ); -+typedef VOID -+(*BFP_BTC_SET_RF_REG)( -+ IN PVOID pBtcContext, -+ IN enum rf_path eRFPath, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask, -+ IN u4Byte Data -+ ); -+typedef u4Byte -+(*BFP_BTC_GET_RF_REG)( -+ IN PVOID pBtcContext, -+ IN enum rf_path eRFPath, -+ IN u4Byte RegAddr, -+ IN u4Byte BitMask -+ ); -+typedef VOID -+(*BFP_BTC_FILL_H2C)( -+ IN PVOID pBtcContext, -+ IN u1Byte elementId, -+ IN u4Byte cmdLen, -+ IN pu1Byte pCmdBuffer -+ ); -+ -+typedef BOOLEAN -+(*BFP_BTC_GET)( -+ IN PVOID pBtCoexist, -+ IN u1Byte getType, -+ OUT PVOID pOutBuf -+ ); -+ -+typedef BOOLEAN -+(*BFP_BTC_SET)( -+ IN PVOID pBtCoexist, -+ IN u1Byte setType, -+ OUT PVOID pInBuf -+ ); -+typedef u2Byte -+(*BFP_BTC_SET_BT_REG)( -+ IN PVOID pBtcContext, -+ IN u1Byte regType, -+ IN u4Byte offset, -+ IN u4Byte value -+ ); -+typedef BOOLEAN -+(*BFP_BTC_SET_BT_ANT_DETECTION)( -+ IN PVOID pBtcContext, -+ IN u1Byte txTime, -+ IN u1Byte btChnl -+ ); -+ -+typedef BOOLEAN -+(*BFP_BTC_SET_BT_TRX_MASK)( -+ IN PVOID pBtcContext, -+ IN u1Byte bt_trx_mask -+ ); -+ -+typedef u4Byte -+(*BFP_BTC_GET_BT_REG)( -+ IN PVOID pBtcContext, -+ IN u1Byte regType, -+ IN u4Byte offset -+ ); -+typedef VOID -+(*BFP_BTC_DISP_DBG_MSG)( -+ IN PVOID pBtCoexist, -+ IN u1Byte dispType -+ ); -+ -+typedef COL_H2C_STATUS -+(*BFP_BTC_COEX_H2C_PROCESS)( -+ IN PVOID pBtCoexist, -+ IN u1Byte opcode, -+ IN u1Byte opcode_ver, -+ IN pu1Byte ph2c_par, -+ IN u1Byte h2c_par_len -+ ); -+ -+typedef u4Byte -+(*BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE)( -+ IN PVOID pBtcContext -+ ); -+ -+typedef u4Byte -+(*BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION)( -+ IN PVOID pBtcContext -+ ); -+ -+typedef u4Byte -+(*BFP_BTC_GET_PHYDM_VERSION)( -+ IN PVOID pBtcContext -+ ); -+ -+typedef u1Byte -+(*BFP_BTC_SET_TIMER) ( -+ IN PVOID pBtcContext, -+ IN u4Byte type, -+ IN u4Byte val -+ ); -+ -+typedef u4Byte -+(*BFP_BTC_SET_ATOMIC) ( -+ IN PVOID pBtcContext, -+ IN pu4Byte target, -+ IN u4Byte val -+ ); -+ -+ -+typedef VOID -+(*BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD)( -+ IN PVOID pDM_Odm, -+ IN u1Byte RA_offset_direction, -+ IN u1Byte RA_threshold_offset -+ ); -+ -+typedef u4Byte -+(*BTC_PHYDM_CMNINFOQUERY)( -+ IN PVOID pDM_Odm, -+ IN u1Byte info_type -+ ); -+ -+typedef VOID -+(*BTC_REDUCE_WL_TX_POWER)( -+ IN PVOID pDM_Odm, -+ IN s1Byte tx_power -+ ); -+ -+typedef VOID -+(*BTC_PHYDM_MODIFY_ANTDIV_HWSW)( -+ IN PVOID pDM_Odm, -+ IN u1Byte type -+ ); -+ -+typedef u1Byte -+(*BFP_BTC_GET_ANT_DET_VAL_FROM_BT)( -+ -+ IN PVOID pBtcContext -+ ); -+ -+typedef u1Byte -+(*BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT)( -+ IN PVOID pBtcContext -+ ); -+ -+typedef u4Byte -+(*BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT)( -+ IN PVOID pBtcContext, -+ IN u1Byte scanType -+ ); -+ -+typedef BOOLEAN -+(*BFP_BTC_GET_BT_AFH_MAP_FROM_BT)( -+ IN PVOID pBtcContext, -+ IN u1Byte mapType, -+ OUT pu1Byte afhMap -+ ); -+ -+struct btc_bt_info { -+ boolean bt_disabled; -+ boolean bt_enable_disable_change; -+ u8 rssi_adjust_for_agc_table_on; -+ u8 rssi_adjust_for_1ant_coex_type; -+ boolean pre_bt_ctrl_agg_buf_size; -+ boolean bt_ctrl_agg_buf_size; -+ boolean pre_reject_agg_pkt; -+ boolean reject_agg_pkt; -+ boolean increase_scan_dev_num; -+ boolean bt_tx_rx_mask; -+ u8 pre_agg_buf_size; -+ u8 agg_buf_size; -+ boolean bt_busy; -+ boolean limited_dig; -+ u16 bt_hci_ver; -+ u32 bt_real_fw_ver; -+ u32 get_bt_fw_ver_cnt; -+ u32 bt_get_fw_ver; -+ boolean miracast_plus_bt; -+ -+ boolean bt_disable_low_pwr; -+ -+ boolean bt_ctrl_lps; -+ boolean bt_lps_on; -+ boolean force_to_roam; /* for 1Ant solution */ -+ u8 lps_val; -+ u8 rpwm_val; -+ u32 ra_mask; -+}; -+ -+struct btc_stack_info { -+ boolean profile_notified; -+ u16 hci_version; /* stack hci version */ -+ u8 num_of_link; -+ boolean bt_link_exist; -+ boolean sco_exist; -+ boolean acl_exist; -+ boolean a2dp_exist; -+ boolean hid_exist; -+ u8 num_of_hid; -+ boolean pan_exist; -+ boolean unknown_acl_exist; -+ s8 min_bt_rssi; -+}; -+ -+struct btc_bt_link_info { -+ boolean bt_link_exist; -+ boolean bt_hi_pri_link_exist; -+ boolean sco_exist; -+ boolean sco_only; -+ boolean a2dp_exist; -+ boolean a2dp_only; -+ boolean hid_exist; -+ boolean hid_only; -+ boolean pan_exist; -+ boolean pan_only; -+ boolean slave_role; -+ boolean acl_busy; -+}; -+ -+#ifdef CONFIG_RF4CE_COEXIST -+struct btc_rf4ce_info { -+ u8 link_state; -+}; -+#endif -+ -+struct btc_statistics { -+ u32 cnt_bind; -+ u32 cnt_power_on; -+ u32 cnt_pre_load_firmware; -+ u32 cnt_init_hw_config; -+ u32 cnt_init_coex_dm; -+ u32 cnt_ips_notify; -+ u32 cnt_lps_notify; -+ u32 cnt_scan_notify; -+ u32 cnt_connect_notify; -+ u32 cnt_media_status_notify; -+ u32 cnt_specific_packet_notify; -+ u32 cnt_bt_info_notify; -+ u32 cnt_rf_status_notify; -+ u32 cnt_periodical; -+ u32 cnt_coex_dm_switch; -+ u32 cnt_stack_operation_notify; -+ u32 cnt_dbg_ctrl; -+ u32 cnt_rate_id_notify; -+ u32 cnt_halt_notify; -+ u32 cnt_pnp_notify; -+}; -+ -+struct btc_coexist { -+ BOOLEAN bBinded; /*make sure only one adapter can bind the data context*/ -+ PVOID Adapter; /*default adapter*/ -+ struct btc_board_info board_info; -+ struct btc_bt_info bt_info; /*some bt info referenced by non-bt module*/ -+ struct btc_stack_info stack_info; -+ struct btc_bt_link_info bt_link_info; -+ struct btc_wifi_link_info wifi_link_info; -+ struct btc_wifi_link_info_ext wifi_link_info_ext; -+ struct btc_coex_dm coex_dm; -+ struct btc_coex_sta coex_sta; -+ struct btc_rfe_type rfe_type; -+ const struct btc_chip_para *chip_para; -+ u8 wifi_black_bssid[6]; -+ u8 wifi_bssid[6]; -+ -+#ifdef CONFIG_RF4CE_COEXIST -+ struct btc_rf4ce_info rf4ce_info; -+#endif -+ BTC_CHIP_INTERFACE chip_interface; -+ PVOID odm_priv; -+ -+ BOOLEAN initilized; -+ BOOLEAN stop_coex_dm; -+ BOOLEAN manual_control; -+ BOOLEAN bdontenterLPS; -+ pu1Byte cli_buf; -+ struct btc_statistics statistics; -+ u1Byte pwrModeVal[10]; -+ BOOLEAN dbg_mode; -+ BOOLEAN auto_report; -+ u8 chip_type; -+ BOOLEAN wl_rf_state_off; -+ -+ /* function pointers */ -+ /* io related */ -+ BFP_BTC_R1 btc_read_1byte; -+ BFP_BTC_W1 btc_write_1byte; -+ BFP_BTC_W1_BIT_MASK btc_write_1byte_bitmask; -+ BFP_BTC_R2 btc_read_2byte; -+ BFP_BTC_W2 btc_write_2byte; -+ BFP_BTC_R4 btc_read_4byte; -+ BFP_BTC_W4 btc_write_4byte; -+ BFP_BTC_LOCAL_REG_W1 btc_write_local_reg_1byte; -+ BFP_BTC_R_LINDIRECT btc_read_linderct; -+ BFP_BTC_W_LINDIRECT btc_write_linderct; -+ BFP_BTC_R_SCBD btc_read_scbd; -+ BFP_BTC_R_SCBD_32BIT btc_read_scbd_32bit; -+ BFP_BTC_W_SCBD btc_write_scbd; -+ BFP_BTC_W_SCBD_32BIT btc_write_scbd_32bit; -+ -+ /* read/write bb related */ -+ BFP_BTC_SET_BB_REG btc_set_bb_reg; -+ BFP_BTC_GET_BB_REG btc_get_bb_reg; -+ -+ /* read/write rf related */ -+ BFP_BTC_SET_RF_REG btc_set_rf_reg; -+ BFP_BTC_GET_RF_REG btc_get_rf_reg; -+ -+ /* fill h2c related */ -+ BFP_BTC_FILL_H2C btc_fill_h2c; -+ /* other */ -+ BFP_BTC_DISP_DBG_MSG btc_disp_dbg_msg; -+ /* normal get/set related */ -+ BFP_BTC_GET btc_get; -+ BFP_BTC_SET btc_set; -+ -+ BFP_BTC_GET_BT_REG btc_get_bt_reg; -+ BFP_BTC_SET_BT_REG btc_set_bt_reg; -+ -+ BFP_BTC_SET_BT_ANT_DETECTION btc_set_bt_ant_detection; -+ -+ BFP_BTC_COEX_H2C_PROCESS btc_coex_h2c_process; -+ BFP_BTC_SET_BT_TRX_MASK btc_set_bt_trx_mask; -+ BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE btc_get_bt_coex_supported_feature; -+ BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION btc_get_bt_coex_supported_version; -+ BFP_BTC_GET_PHYDM_VERSION btc_get_bt_phydm_version; -+ BFP_BTC_SET_TIMER btc_set_timer; -+ BFP_BTC_SET_ATOMIC btc_set_atomic; -+ BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD btc_phydm_modify_RA_PCR_threshold; -+ BTC_PHYDM_CMNINFOQUERY btc_phydm_query_PHY_counter; -+ BTC_REDUCE_WL_TX_POWER btc_reduce_wl_tx_power; -+ BTC_PHYDM_MODIFY_ANTDIV_HWSW btc_phydm_modify_antdiv_hwsw; -+ BFP_BTC_GET_ANT_DET_VAL_FROM_BT btc_get_ant_det_val_from_bt; -+ BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT btc_get_ble_scan_type_from_bt; -+ BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT btc_get_ble_scan_para_from_bt; -+ BFP_BTC_GET_BT_AFH_MAP_FROM_BT btc_get_bt_afh_map_from_bt; -+ -+ union { -+ #ifdef CONFIG_RTL8822B -+ struct coex_dm_8822b_1ant coex_dm_8822b_1ant; -+ struct coex_dm_8822b_2ant coex_dm_8822b_2ant; -+ #endif /* 8822B */ -+ #ifdef CONFIG_RTL8821C -+ struct coex_dm_8821c_1ant coex_dm_8821c_1ant; -+ struct coex_dm_8821c_2ant coex_dm_8821c_2ant; -+ #endif /* 8821C */ -+ #ifdef CONFIG_RTL8723D -+ struct coex_dm_8723d_1ant coex_dm_8723d_1ant; -+ struct coex_dm_8723d_2ant coex_dm_8723d_2ant; -+ #endif /* 8723D */ -+ }; -+ -+ union { -+ #ifdef CONFIG_RTL8822B -+ struct coex_sta_8822b_1ant coex_sta_8822b_1ant; -+ struct coex_sta_8822b_2ant coex_sta_8822b_2ant; -+ #endif /* 8822B */ -+ #ifdef CONFIG_RTL8821C -+ struct coex_sta_8821c_1ant coex_sta_8821c_1ant; -+ struct coex_sta_8821c_2ant coex_sta_8821c_2ant; -+ #endif /* 8821C */ -+ #ifdef CONFIG_RTL8723D -+ struct coex_sta_8723d_1ant coex_sta_8723d_1ant; -+ struct coex_sta_8723d_2ant coex_sta_8723d_2ant; -+ #endif /* 8723D */ -+ }; -+ -+ union { -+ #ifdef CONFIG_RTL8822B -+ struct rfe_type_8822b_1ant rfe_type_8822b_1ant; -+ struct rfe_type_8822b_2ant rfe_type_8822b_2ant; -+ #endif /* 8822B */ -+ #ifdef CONFIG_RTL8821C -+ struct rfe_type_8821c_1ant rfe_type_8821c_1ant; -+ struct rfe_type_8821c_2ant rfe_type_8821c_2ant; -+ #endif /* 8821C */ -+ }; -+ -+ union { -+ #ifdef CONFIG_RTL8822B -+ struct wifi_link_info_8822b_1ant wifi_link_info_8822b_1ant; -+ struct wifi_link_info_8822b_2ant wifi_link_info_8822b_2ant; -+ #endif /* 8822B */ -+ #ifdef CONFIG_RTL8821C -+ struct wifi_link_info_8821c_1ant wifi_link_info_8821c_1ant; -+ struct wifi_link_info_8821c_2ant wifi_link_info_8821c_2ant; -+ #endif /* 8821C */ -+ }; -+ -+}; -+typedef struct btc_coexist *PBTC_COEXIST; -+ -+extern struct btc_coexist GLBtCoexist; -+ -+typedef void -+(*BFP_BTC_CHIP_SETUP)( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte setType -+ ); -+ -+struct btc_chip_para { -+ const char *chip_name; -+ u32 para_ver_date; -+ u32 para_ver; -+ u32 bt_desired_ver; -+ boolean scbd_support; -+ u32 scbd_reg; -+ u8 scbd_bit_num; -+ boolean mailbox_support; -+ boolean lte_indirect_access; -+ boolean new_scbd10_def; /* TRUE: 1:fix 2M(8822c) */ -+ u8 indirect_type; /* 0:17xx, 1:7cx */ -+ u8 pstdma_type; /* 0: LPSoff, 1:LPSon */ -+ u8 bt_rssi_type; -+ u8 ant_isolation; -+ u8 rssi_tolerance; -+ u8 rx_path_num; -+ u8 wl_rssi_step_num; -+ const u8 *wl_rssi_step; -+ u8 bt_rssi_step_num; -+ const u8 *bt_rssi_step; -+ u8 table_sant_num; -+ const struct btc_coex_table_para *table_sant; -+ u8 table_nsant_num; -+ const struct btc_coex_table_para *table_nsant; -+ u8 tdma_sant_num; -+ const struct btc_tdma_para *tdma_sant; -+ u8 tdma_nsant_num; -+ const struct btc_tdma_para *tdma_nsant; -+ u8 wl_rf_para_tx_num; -+ const struct btc_rf_para *wl_rf_para_tx; -+ const struct btc_rf_para *wl_rf_para_rx; -+ u8 bt_afh_span_bw20; -+ u8 bt_afh_span_bw40; -+ u8 afh_5g_num; -+ const struct btc_5g_afh_map *afh_5g; -+ BFP_BTC_CHIP_SETUP chip_setup; -+}; -+ -+BOOLEAN -+EXhalbtcoutsrc_InitlizeVariables( -+ IN PVOID Adapter -+ ); -+VOID -+EXhalbtcoutsrc_PowerOnSetting( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_PreLoadFirmware( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_InitHwConfig( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN bWifiOnly -+ ); -+VOID -+EXhalbtcoutsrc_InitCoexDm( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_IpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtcoutsrc_LpsNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtcoutsrc_ScanNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtcoutsrc_SetAntennaPathNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtcoutsrc_ConnectNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte action -+ ); -+VOID -+EXhalbtcoutsrc_MediaStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN RT_MEDIA_STATUS mediaStatus -+ ); -+VOID -+EXhalbtcoutsrc_SpecificPacketNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pktType -+ ); -+VOID -+EXhalbtcoutsrc_BtInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtcoutsrc_RfStatusNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+u4Byte -+EXhalbtcoutsrc_CoexTimerCheck( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+u4Byte -+EXhalbtcoutsrc_WLStatusCheck( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_WlFwDbgInfoNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN pu1Byte tmpBuf, -+ IN u1Byte length -+ ); -+VOID -+EXhalbtcoutsrc_rx_rate_change_notify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN BOOLEAN is_data_frame, -+ IN u1Byte btc_rate_id -+ ); -+VOID -+EXhalbtcoutsrc_StackOperationNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte type -+ ); -+VOID -+EXhalbtcoutsrc_HaltNotify( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_PnpNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte pnpState -+ ); -+VOID -+EXhalbtcoutsrc_TimerNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte timer_type -+); -+VOID -+EXhalbtcoutsrc_WLStatusChangeNotify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte change_type -+); -+VOID -+EXhalbtcoutsrc_WL_RFK_Notify( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte path, -+ IN u1Byte type, -+ IN u1Byte state -+ ); -+VOID -+EXhalbtcoutsrc_CoexDmSwitch( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_Periodical( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_DbgControl( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u1Byte opCode, -+ IN u1Byte opLen, -+ IN pu1Byte pData -+ ); -+VOID -+EXhalbtcoutsrc_AntennaDetection( -+ IN PBTC_COEXIST pBtCoexist, -+ IN u4Byte centFreq, -+ IN u4Byte offset, -+ IN u4Byte span, -+ IN u4Byte seconds -+ ); -+VOID -+EXhalbtcoutsrc_StackUpdateProfileInfo( -+ VOID -+ ); -+VOID -+EXhalbtcoutsrc_SetHciVersion( -+ IN u2Byte hciVersion -+ ); -+VOID -+EXhalbtcoutsrc_SetBtPatchVersion( -+ IN u2Byte btHciVersion, -+ IN u2Byte btPatchVersion -+ ); -+VOID -+EXhalbtcoutsrc_UpdateMinBtRssi( -+ IN s1Byte btRssi -+ ); -+#if 0 -+VOID -+EXhalbtcoutsrc_SetBtExist( -+ IN BOOLEAN bBtExist -+ ); -+#endif -+VOID -+EXhalbtcoutsrc_SetChipType( -+ IN u1Byte chipType -+ ); -+VOID -+EXhalbtcoutsrc_SetAntNum( -+ IN u1Byte type, -+ IN u1Byte antNum -+ ); -+VOID -+EXhalbtcoutsrc_SetSingleAntPath( -+ IN u1Byte singleAntPath -+ ); -+VOID -+EXhalbtcoutsrc_DisplayBtCoexInfo( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+VOID -+EXhalbtcoutsrc_DisplayAntDetection( -+ IN PBTC_COEXIST pBtCoexist -+ ); -+ -+#define MASKBYTE0 0xff -+#define MASKBYTE1 0xff00 -+#define MASKBYTE2 0xff0000 -+#define MASKBYTE3 0xff000000 -+#define MASKHWORD 0xffff0000 -+#define MASKLWORD 0x0000ffff -+#define MASKDWORD 0xffffffff -+#define MASK12BITS 0xfff -+#define MASKH4BITS 0xf0000000 -+#define MASKOFDM_D 0xffc00000 -+#define MASKCCK 0x3f3f3f3f -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/btc/mp_precomp.h b/drivers/staging/rtl8723cs/hal/btc/mp_precomp.h -new file mode 100644 -index 000000000000..42645498666d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/btc/mp_precomp.h -@@ -0,0 +1,168 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __MP_PRECOMP_H__ -+#define __MP_PRECOMP_H__ -+ -+#include -+#include -+#include "btc_basic_types.h" -+ -+#define BT_TMP_BUF_SIZE 100 -+ -+#ifdef PLATFORM_LINUX -+#define rsprintf snprintf -+#define rstrncat(dst, src, src_size) strncat(dst, src, src_size) -+#elif defined(PLATFORM_WINDOWS) -+#define rsprintf sprintf_s -+#endif -+ -+#define DCMD_Printf DBG_BT_INFO -+ -+#define delay_ms(ms) rtw_mdelay_os(ms) -+ -+#ifdef bEnable -+#undef bEnable -+#endif -+ -+#define WPP_SOFTWARE_TRACE 0 -+ -+typedef enum _BTC_MSG_COMP_TYPE { -+ COMP_COEX = 0, -+ COMP_MAX -+} BTC_MSG_COMP_TYPE; -+extern u4Byte GLBtcDbgType[]; -+ -+#define DBG_OFF 0 -+#define DBG_SEC 1 -+#define DBG_SERIOUS 2 -+#define DBG_WARNING 3 -+#define DBG_LOUD 4 -+#define DBG_TRACE 5 -+ -+#ifdef CONFIG_BT_COEXIST -+#define BT_SUPPORT 1 -+#define COEX_SUPPORT 1 -+#define HS_SUPPORT 1 -+#else -+#define BT_SUPPORT 0 -+#define COEX_SUPPORT 0 -+#define HS_SUPPORT 0 -+#endif -+ -+/* for wifi only mode */ -+#include "hal_btcoex_wifionly.h" -+ -+#ifdef CONFIG_BT_COEXIST -+#define BTC_BTINFO_LENGTH_MAX 10 -+ -+struct wifi_only_cfg; -+struct btc_coexist; -+ -+#ifdef CONFIG_RTL8192E -+#include "halbtc8192e1ant.h" -+#include "halbtc8192e2ant.h" -+#endif -+ -+#ifdef CONFIG_RTL8723B -+#include "halbtc8723bwifionly.h" -+#include "halbtc8723b1ant.h" -+#include "halbtc8723b2ant.h" -+#endif -+ -+#ifdef CONFIG_RTL8812A -+#include "halbtc8812a1ant.h" -+#include "halbtc8812a2ant.h" -+#endif -+ -+#ifdef CONFIG_RTL8821A -+#include "halbtc8821a1ant.h" -+#include "halbtc8821a2ant.h" -+#endif -+ -+#ifdef CONFIG_RTL8703B -+#include "halbtc8703b1ant.h" -+#endif -+ -+#ifdef CONFIG_RTL8723D -+#include "halbtc8723d1ant.h" -+#include "halbtc8723d2ant.h" -+#endif -+ -+#ifdef CONFIG_RTL8822B -+#include "halbtc8822bwifionly.h" -+#include "halbtc8822b1ant.h" -+#include "halbtc8822b2ant.h" -+#endif -+ -+#ifdef CONFIG_RTL8821C -+#include "halbtc8821cwifionly.h" -+#include "halbtc8821c1ant.h" -+#include "halbtc8821c2ant.h" -+#endif -+ -+#ifdef CONFIG_RTL8814A -+#include "halbtc8814a2ant.h" -+#endif -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+#include "halbtccommon.h" -+ -+#ifdef CONFIG_RTL8822C -+#include "halbtc8822cwifionly.h" -+#include "halbtc8822c.h" -+#endif -+ -+#ifdef CONFIG_RTL8723F -+#include "halbtc8723fwifionly.h" -+#include "halbtc8723f.h" -+#endif -+ -+#ifdef CONFIG_RTL8192F -+#include "halbtc8192f.h" -+#endif -+ -+#endif -+ -+#include "halbtcoutsrc.h" -+ -+#else /* CONFIG_BT_COEXIST */ -+ -+#ifdef CONFIG_RTL8723B -+#include "halbtc8723bwifionly.h" -+#endif -+ -+#ifdef CONFIG_RTL8822B -+#include "halbtc8822bwifionly.h" -+#endif -+ -+#ifdef CONFIG_RTL8821C -+#include "halbtc8821cwifionly.h" -+#endif -+ -+#ifdef CONFIG_RTL8822C -+#include "halbtc8822cwifionly.h" -+#endif -+ -+#ifdef CONFIG_RTL8723F -+#include "halbtc8723fwifionly.h" -+#endif -+ -+#ifdef CONFIG_RTL8814B -+#include "halbtc8814bwifionly.h" -+#endif -+ -+#endif /* CONFIG_BT_COEXIST */ -+ -+#endif /* __MP_PRECOMP_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/efuse/efuse_mask.h b/drivers/staging/rtl8723cs/hal/efuse/efuse_mask.h -new file mode 100644 -index 000000000000..dc4fdce2b280 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/efuse/efuse_mask.h -@@ -0,0 +1,188 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifdef CONFIG_USB_HCI -+ -+ #if defined(CONFIG_RTL8188E) -+ #include "rtl8188e/HalEfuseMask8188E_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8812A) -+ #include "rtl8812a/HalEfuseMask8812A_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8821A) -+ #include "rtl8812a/HalEfuseMask8821A_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8192E) -+ #include "rtl8192e/HalEfuseMask8192E_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8723B) -+ #include "rtl8723b/HalEfuseMask8723B_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8814A) -+ #include "rtl8814a/HalEfuseMask8814A_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8703B) -+ #include "rtl8703b/HalEfuseMask8703B_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8723D) -+ #include "rtl8723d/HalEfuseMask8723D_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8188F) -+ #include "rtl8188f/HalEfuseMask8188F_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8188GTV) -+ #include "rtl8188gtv/HalEfuseMask8188GTV_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8822B) -+ #include "rtl8822b/HalEfuseMask8822B_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8821C) -+ #include "rtl8821c/HalEfuseMask8821C_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8710B) -+ #include "rtl8710b/HalEfuseMask8710B_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8192F) -+ #include "rtl8192f/HalEfuseMask8192F_USB.h" -+ #endif -+ #if defined(CONFIG_RTL8822C) -+ #include "rtl8822c/HalEfuseMask8822C_USB.h" -+ #endif -+ #if defined(CONFIG_RTL8814B) -+ #include "rtl8814b/HalEfuseMask8814B_USB.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8723F) -+ #include "rtl8723f/HalEfuseMask8723F_USB.h" -+ #endif -+#endif /*CONFIG_USB_HCI*/ -+ -+#ifdef CONFIG_PCI_HCI -+ -+ #if defined(CONFIG_RTL8188E) -+ #include "rtl8188e/HalEfuseMask8188E_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8812A) -+ #include "rtl8812a/HalEfuseMask8812A_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8821A) -+ #include "rtl8812a/HalEfuseMask8821A_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8192E) -+ #include "rtl8192e/HalEfuseMask8192E_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8723B) -+ #include "rtl8723b/HalEfuseMask8723B_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8814A) -+ #include "rtl8814a/HalEfuseMask8814A_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8703B) -+ #include "rtl8703b/HalEfuseMask8703B_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8822B) -+ #include "rtl8822b/HalEfuseMask8822B_PCIE.h" -+ #endif -+ #if defined(CONFIG_RTL8723D) -+ #include "rtl8723d/HalEfuseMask8723D_PCIE.h" -+ #endif -+ #if defined(CONFIG_RTL8821C) -+ #include "rtl8821c/HalEfuseMask8821C_PCIE.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8192F) -+ #include "rtl8192f/HalEfuseMask8192F_PCIE.h" -+ #endif -+ #if defined(CONFIG_RTL8822C) -+ #include "rtl8822c/HalEfuseMask8822C_PCIE.h" -+ #endif -+ #if defined(CONFIG_RTL8814B) -+ #include "rtl8814b/HalEfuseMask8814B_PCIE.h" -+ #endif -+#endif /*CONFIG_PCI_HCI*/ -+#ifdef CONFIG_SDIO_HCI -+ #if defined(CONFIG_RTL8723B) -+ #include "rtl8723b/HalEfuseMask8723B_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8188E) -+ #include "rtl8188e/HalEfuseMask8188E_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8703B) -+ #include "rtl8703b/HalEfuseMask8703B_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8188F) -+ #include "rtl8188f/HalEfuseMask8188F_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8188GTV) -+ #include "rtl8188gtv/HalEfuseMask8188GTV_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8723D) -+ #include "rtl8723d/HalEfuseMask8723D_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8192E) -+ #include "rtl8192e/HalEfuseMask8192E_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8821A) -+ #include "rtl8812a/HalEfuseMask8821A_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8821C) -+ #include "rtl8821c/HalEfuseMask8821C_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8822B) -+ #include "rtl8822b/HalEfuseMask8822B_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8192F) -+ #include "rtl8192f/HalEfuseMask8192F_SDIO.h" -+ #endif -+ -+ -+ #if defined(CONFIG_RTL8822C) -+ #include "rtl8822c/HalEfuseMask8822C_SDIO.h" -+ #endif -+ -+ #if defined(CONFIG_RTL8723F) -+ #include "rtl8723f/HalEfuseMask8723F_SDIO.h" -+ #endif -+#endif /*CONFIG_SDIO_HCI*/ -diff --git a/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_PCIE.c b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_PCIE.c -new file mode 100644 -index 000000000000..cc62c2236255 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_PCIE.c -@@ -0,0 +1,94 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/* #include "Mp_Precomp.h" */ -+/* #include "../odm_precomp.h" */ -+ -+#include -+#include "HalEfuseMask8703B_PCIE.h" -+ -+ -+/****************************************************************************** -+* MPCIE.TXT -+******************************************************************************/ -+ -+u8 Array_MP_8703B_MPCIE[] = { -+ 0xFF, -+ 0xF3, -+ 0x00, -+ 0x0E, -+ 0x70, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x07, -+ 0xF3, -+ 0xFF, -+ 0xFF, -+ 0xFF, -+ 0xFF, -+ 0xFF, -+ 0xF1, -+ 0x00, -+ 0x80, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ -+}; -+ -+u16 -+EFUSE_GetArrayLen_MP_8703B_MPCIE(void) -+{ -+ return sizeof(Array_MP_8703B_MPCIE) / sizeof(u8); -+} -+ -+void -+EFUSE_GetMaskArray_MP_8703B_MPCIE( -+ u8 *Array -+) -+{ -+ u16 len = EFUSE_GetArrayLen_MP_8703B_MPCIE(), i = 0; -+ -+ for (i = 0; i < len; ++i) -+ Array[i] = Array_MP_8703B_MPCIE[i]; -+} -+BOOLEAN -+EFUSE_IsAddressMasked_MP_8703B_MPCIE( -+ u16 Offset -+) -+{ -+ int r = Offset / 16; -+ int c = (Offset % 16) / 2; -+ int result = 0; -+ -+ if (c < 4) /* Upper double word */ -+ result = (Array_MP_8703B_MPCIE[r] & (0x10 << c)); -+ else -+ result = (Array_MP_8703B_MPCIE[r] & (0x01 << (c - 4))); -+ -+ return (result > 0) ? 0 : 1; -+} -diff --git a/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_PCIE.h b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_PCIE.h -new file mode 100644 -index 000000000000..f7e108c9e61f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_PCIE.h -@@ -0,0 +1,33 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+/****************************************************************************** -+* MPCIE.TXT -+******************************************************************************/ -+ -+ -+u16 -+EFUSE_GetArrayLen_MP_8703B_MPCIE(void); -+ -+void -+EFUSE_GetMaskArray_MP_8703B_MPCIE( -+ u8 *Array -+); -+ -+BOOLEAN -+EFUSE_IsAddressMasked_MP_8703B_MPCIE(/* TC: Test Chip, MP: MP Chip */ -+ u16 Offset -+); -diff --git a/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_SDIO.c b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_SDIO.c -new file mode 100644 -index 000000000000..dfe02b37dc83 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_SDIO.c -@@ -0,0 +1,95 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/* #include "Mp_Precomp.h" */ -+/* #include "../odm_precomp.h" */ -+ -+#include -+#include "HalEfuseMask8703B_SDIO.h" -+ -+ -+ -+/****************************************************************************** -+* MSDIO.TXT -+******************************************************************************/ -+ -+u8 Array_MP_8703B_MSDIO[] = { -+ 0xFF, -+ 0xF3, -+ 0x00, -+ 0x0E, -+ 0x70, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x07, -+ 0xF3, -+ 0xFF, -+ 0xFF, -+ 0xFF, -+ 0xFF, -+ 0xFF, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ -+}; -+ -+u16 -+EFUSE_GetArrayLen_MP_8703B_MSDIO(void) -+{ -+ return sizeof(Array_MP_8703B_MSDIO) / sizeof(u8); -+} -+ -+void -+EFUSE_GetMaskArray_MP_8703B_MSDIO( -+ u8 *Array -+) -+{ -+ u16 len = EFUSE_GetArrayLen_MP_8703B_MSDIO(), i = 0; -+ -+ for (i = 0; i < len; ++i) -+ Array[i] = Array_MP_8703B_MSDIO[i]; -+} -+BOOLEAN -+EFUSE_IsAddressMasked_MP_8703B_MSDIO( -+ u16 Offset -+) -+{ -+ int r = Offset / 16; -+ int c = (Offset % 16) / 2; -+ int result = 0; -+ -+ if (c < 4) /* Upper double word */ -+ result = (Array_MP_8703B_MSDIO[r] & (0x10 << c)); -+ else -+ result = (Array_MP_8703B_MSDIO[r] & (0x01 << (c - 4))); -+ -+ return (result > 0) ? 0 : 1; -+} -diff --git a/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_SDIO.h b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_SDIO.h -new file mode 100644 -index 000000000000..cadea4ea1874 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_SDIO.h -@@ -0,0 +1,34 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+ -+/****************************************************************************** -+* MSDIO.TXT -+******************************************************************************/ -+ -+ -+u16 -+EFUSE_GetArrayLen_MP_8703B_MSDIO(void); -+ -+void -+EFUSE_GetMaskArray_MP_8703B_MSDIO( -+ u8 *Array -+); -+ -+BOOLEAN -+EFUSE_IsAddressMasked_MP_8703B_MSDIO(/* TC: Test Chip, MP: MP Chip */ -+ u16 Offset -+); -diff --git a/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_USB.c b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_USB.c -new file mode 100644 -index 000000000000..2608d7979494 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_USB.c -@@ -0,0 +1,92 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/* #include "Mp_Precomp.h" */ -+/* #include "../odm_precomp.h" */ -+ -+#include -+#include "HalEfuseMask8703B_USB.h" -+/****************************************************************************** -+* MUSB.TXT -+******************************************************************************/ -+ -+u8 Array_MP_8703B_MUSB[] = { -+ 0xFF, -+ 0xF3, -+ 0x00, -+ 0x0E, -+ 0x70, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x07, -+ 0xF3, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0xFF, -+ 0xFF, -+ 0xFF, -+ 0xFF, -+ 0xB0, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ 0x00, -+ -+}; -+ -+u16 -+EFUSE_GetArrayLen_MP_8703B_MUSB(void) -+{ -+ return sizeof(Array_MP_8703B_MUSB) / sizeof(u8); -+} -+ -+void -+EFUSE_GetMaskArray_MP_8703B_MUSB( -+ u8 *Array -+) -+{ -+ u16 len = EFUSE_GetArrayLen_MP_8703B_MUSB(), i = 0; -+ -+ for (i = 0; i < len; ++i) -+ Array[i] = Array_MP_8703B_MUSB[i]; -+} -+BOOLEAN -+EFUSE_IsAddressMasked_MP_8703B_MUSB( -+ u16 Offset -+) -+{ -+ int r = Offset / 16; -+ int c = (Offset % 16) / 2; -+ int result = 0; -+ -+ if (c < 4) /* Upper double word */ -+ result = (Array_MP_8703B_MUSB[r] & (0x10 << c)); -+ else -+ result = (Array_MP_8703B_MUSB[r] & (0x01 << (c - 4))); -+ -+ return (result > 0) ? 0 : 1; -+} -diff --git a/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_USB.h b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_USB.h -new file mode 100644 -index 000000000000..9644f07cda19 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/efuse/rtl8703b/HalEfuseMask8703B_USB.h -@@ -0,0 +1,34 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+ -+/****************************************************************************** -+* MUSB.TXT -+******************************************************************************/ -+ -+ -+u16 -+EFUSE_GetArrayLen_MP_8703B_MUSB(void); -+ -+void -+EFUSE_GetMaskArray_MP_8703B_MUSB( -+ u8 *Array -+); -+ -+BOOLEAN -+EFUSE_IsAddressMasked_MP_8703B_MUSB(/* TC: Test Chip, MP: MP Chip */ -+ u16 Offset -+); -diff --git a/drivers/staging/rtl8723cs/hal/hal_btcoex.c b/drivers/staging/rtl8723cs/hal/hal_btcoex.c -new file mode 100644 -index 000000000000..1a5c88ab446f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_btcoex.c -@@ -0,0 +1,6651 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define __HAL_BTCOEX_C__ -+ -+#ifdef CONFIG_BT_COEXIST -+ -+#include -+#include -+#include "btc/mp_precomp.h" -+ -+/* ************************************ -+ * Global variables -+ * ************************************ */ -+const char *const BtProfileString[] = { -+ "NONE", -+ "A2DP", -+ "PAN", -+ "HID", -+ "SCO", -+}; -+ -+const char *const BtSpecString[] = { -+ "1.0b", -+ "1.1", -+ "1.2", -+ "2.0+EDR", -+ "2.1+EDR", -+ "3.0+HS", -+ "4.0", -+}; -+ -+const char *const BtLinkRoleString[] = { -+ "Master", -+ "Slave", -+}; -+ -+const char *const h2cStaString[] = { -+ "successful", -+ "h2c busy", -+ "rf off", -+ "fw not read", -+}; -+ -+const char *const ioStaString[] = { -+ "success", -+ "can not IO", -+ "rf off", -+ "fw not read", -+ "wait io timeout", -+ "invalid len", -+ "idle Q empty", -+ "insert waitQ fail", -+ "unknown fail", -+ "wrong level", -+ "h2c stopped", -+}; -+ -+const char *const GLBtcWifiBwString[] = { -+ "11bg", -+ "HT20", -+ "HT40", -+ "VHT80", -+ "VHT160" -+}; -+ -+const char *const GLBtcWifiFreqString[] = { -+ "2.4G", -+ "5G", -+ "2.4G+5G" -+}; -+ -+const char *const GLBtcIotPeerString[] = { -+ "UNKNOWN", -+ "REALTEK", -+ "REALTEK_92SE", -+ "BROADCOM", -+ "RALINK", -+ "ATHEROS", -+ "CISCO", -+ "MERU", -+ "MARVELL", -+ "REALTEK_SOFTAP", /* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */ -+ "SELF_SOFTAP", /* Self is SoftAP */ -+ "AIRGO", -+ "INTEL", -+ "RTK_APCLIENT", -+ "REALTEK_81XX", -+ "REALTEK_WOW", -+ "REALTEK_JAGUAR_BCUTAP", -+ "REALTEK_JAGUAR_CCUTAP" -+}; -+ -+const char *const coexOpcodeString[] = { -+ "Wifi status notify", -+ "Wifi progress", -+ "Wifi info", -+ "Power state", -+ "Set Control", -+ "Get Control" -+}; -+ -+const char *const coexIndTypeString[] = { -+ "bt info", -+ "pstdma", -+ "limited tx/rx", -+ "coex table", -+ "request" -+}; -+ -+const char *const coexH2cResultString[] = { -+ "ok", -+ "unknown", -+ "un opcode", -+ "opVer MM", -+ "par Err", -+ "par OoR", -+ "reqNum MM", -+ "halMac Fail", -+ "h2c TimeOut", -+ "Invalid c2h Len", -+ "data overflow" -+}; -+ -+#define HALBTCOUTSRC_AGG_CHK_WINDOW_IN_MS 8000 -+ -+struct btc_coexist GLBtCoexist; -+BTC_OFFLOAD gl_coex_offload; -+u8 GLBtcWiFiInScanState; -+u8 GLBtcWiFiInIQKState; -+u8 GLBtcWiFiInIPS; -+u8 GLBtcWiFiInLPS; -+u8 GLBtcBtCoexAliveRegistered; -+ -+/* -+ * BT control H2C/C2H -+ */ -+/* EXT_EID */ -+typedef enum _bt_ext_eid { -+ C2H_WIFI_FW_ACTIVE_RSP = 0, -+ C2H_TRIG_BY_BT_FW -+} BT_EXT_EID; -+ -+/* C2H_STATUS */ -+typedef enum _bt_c2h_status { -+ BT_STATUS_OK = 0, -+ BT_STATUS_VERSION_MISMATCH, -+ BT_STATUS_UNKNOWN_OPCODE, -+ BT_STATUS_ERROR_PARAMETER -+} BT_C2H_STATUS; -+ -+/* C2H BT OP CODES */ -+typedef enum _bt_op_code { -+ BT_OP_GET_BT_VERSION = 0x00, -+ BT_OP_WRITE_REG_ADDR = 0x0c, -+ BT_OP_WRITE_REG_VALUE = 0x0d, -+ -+ BT_OP_READ_REG = 0x11, -+ -+ BT_LO_OP_GET_AFH_MAP_L = 0x1e, -+ BT_LO_OP_GET_AFH_MAP_M = 0x1f, -+ BT_LO_OP_GET_AFH_MAP_H = 0x20, -+ -+ BT_OP_SET_BT_TRX_MASK = 0x29, -+ BT_OP_GET_BT_COEX_SUPPORTED_FEATURE = 0x2a, -+ BT_OP_GET_BT_COEX_SUPPORTED_VERSION = 0x2b, -+ BT_OP_GET_BT_ANT_DET_VAL = 0x2c, -+ BT_OP_GET_BT_BLE_SCAN_TYPE = 0x2d, -+ BT_OP_GET_BT_BLE_SCAN_PARA = 0x2e, -+ BT_OP_GET_BT_DEVICE_INFO = 0x30, -+ BT_OP_GET_BT_FORBIDDEN_SLOT_VAL = 0x31, -+ BT_OP_SET_BT_LANCONSTRAIN_LEVEL = 0x32, -+ BT_OP_SET_BT_TEST_MODE_VAL = 0x33, -+ BT_OP_MAX -+} BT_OP_CODE; -+ -+#define BTC_MPOPER_TIMEOUT 50 /* unit: ms */ -+ -+#define C2H_MAX_SIZE 16 -+u8 GLBtcBtMpOperSeq; -+_mutex GLBtcBtMpOperLock; -+_timer GLBtcBtMpOperTimer; -+_sema GLBtcBtMpRptSema; -+u8 GLBtcBtMpRptSeq; -+u8 GLBtcBtMpRptStatus; -+u8 GLBtcBtMpRptRsp[C2H_MAX_SIZE]; -+u8 GLBtcBtMpRptRspSize; -+u8 GLBtcBtMpRptWait; -+u8 GLBtcBtMpRptWiFiOK; -+u8 GLBtcBtMpRptBTOK; -+ -+/* -+ * Debug -+ */ -+u32 GLBtcDbgType[COMP_MAX]; -+u8 GLBtcDbgBuf[BT_TMP_BUF_SIZE]; -+u8 gl_btc_trace_buf[BT_TMP_BUF_SIZE]; -+ -+typedef struct _btcoexdbginfo { -+ u8 *info; -+ u32 size; /* buffer total size */ -+ u32 len; /* now used length */ -+} BTCDBGINFO, *PBTCDBGINFO; -+ -+BTCDBGINFO GLBtcDbgInfo; -+ -+#define BT_Operation(Adapter) _FALSE -+ -+static void DBG_BT_INFO_INIT(PBTCDBGINFO pinfo, u8 *pbuf, u32 size) -+{ -+ if (NULL == pinfo) -+ return; -+ -+ _rtw_memset(pinfo, 0, sizeof(BTCDBGINFO)); -+ -+ if (pbuf && size) { -+ pinfo->info = pbuf; -+ pinfo->size = size; -+ } -+} -+ -+void DBG_BT_INFO(u8 *dbgmsg) -+{ -+ PBTCDBGINFO pinfo; -+ u32 msglen, buflen; -+ u8 *pbuf; -+ -+ -+ pinfo = &GLBtcDbgInfo; -+ -+ if (NULL == pinfo->info) -+ return; -+ -+ msglen = strlen(dbgmsg); -+ if (pinfo->len + msglen > pinfo->size) -+ return; -+ -+ pbuf = pinfo->info + pinfo->len; -+ _rtw_memcpy(pbuf, dbgmsg, msglen); -+ pinfo->len += msglen; -+} -+ -+/* ************************************ -+ * Debug related function -+ * ************************************ */ -+static u8 halbtcoutsrc_IsBtCoexistAvailable(PBTC_COEXIST pBtCoexist) -+{ -+ if (!pBtCoexist->bBinded || -+ NULL == pBtCoexist->Adapter) -+ return _FALSE; -+ return _TRUE; -+} -+ -+static void halbtcoutsrc_DbgInit(void) -+{ -+ u8 i; -+ -+ for (i = 0; i < COMP_MAX; i++) -+ GLBtcDbgType[i] = 0; -+} -+ -+static void halbtcoutsrc_EnterPwrLock(PBTC_COEXIST pBtCoexist) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj((PADAPTER)pBtCoexist->Adapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ -+ _enter_pwrlock(&pwrpriv->lock); -+} -+ -+static void halbtcoutsrc_ExitPwrLock(PBTC_COEXIST pBtCoexist) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj((PADAPTER)pBtCoexist->Adapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ -+ _exit_pwrlock(&pwrpriv->lock); -+} -+ -+static u8 halbtcoutsrc_IsHwMailboxExist(PBTC_COEXIST pBtCoexist) -+{ -+ if (pBtCoexist->board_info.bt_chip_type == BTC_CHIP_CSR_BC4 -+ || pBtCoexist->board_info.bt_chip_type == BTC_CHIP_CSR_BC8 -+ ) -+ return _FALSE; -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) -+ return _FALSE; -+ else -+ return _TRUE; -+} -+ -+static u8 halbtcoutsrc_LeaveLps(PBTC_COEXIST pBtCoexist) -+{ -+ PADAPTER padapter; -+ -+ -+ padapter = pBtCoexist->Adapter; -+ -+ pBtCoexist->bt_info.bt_ctrl_lps = _TRUE; -+ pBtCoexist->bt_info.bt_lps_on = _FALSE; -+ -+ return rtw_btcoex_LPS_Leave(padapter); -+} -+ -+void halbtcoutsrc_EnterLps(PBTC_COEXIST pBtCoexist) -+{ -+ PADAPTER padapter; -+ -+ -+ padapter = pBtCoexist->Adapter; -+ -+ if (pBtCoexist->bdontenterLPS == _FALSE) { -+ pBtCoexist->bt_info.bt_ctrl_lps = _TRUE; -+ pBtCoexist->bt_info.bt_lps_on = _TRUE; -+ -+ rtw_btcoex_LPS_Enter(padapter); -+ } -+} -+ -+void halbtcoutsrc_NormalLps(PBTC_COEXIST pBtCoexist) -+{ -+ PADAPTER padapter; -+ -+ -+ -+ padapter = pBtCoexist->Adapter; -+ -+ if (pBtCoexist->bt_info.bt_ctrl_lps) { -+ pBtCoexist->bt_info.bt_lps_on = _FALSE; -+ rtw_btcoex_LPS_Leave(padapter); -+ pBtCoexist->bt_info.bt_ctrl_lps = _FALSE; -+ -+ /* recover the LPS state to the original */ -+#if 0 -+ padapter->hal_func.UpdateLPSStatusHandler( -+ padapter, -+ pPSC->RegLeisurePsMode, -+ pPSC->RegPowerSaveMode); -+#endif -+ } -+} -+ -+void halbtcoutsrc_Pre_NormalLps(PBTC_COEXIST pBtCoexist) -+{ -+ PADAPTER padapter; -+ -+ padapter = pBtCoexist->Adapter; -+ -+ if (pBtCoexist->bt_info.bt_ctrl_lps) { -+ pBtCoexist->bt_info.bt_lps_on = _FALSE; -+ rtw_btcoex_LPS_Leave(padapter); -+ } -+} -+ -+void halbtcoutsrc_Post_NormalLps(PBTC_COEXIST pBtCoexist) -+{ -+ if (pBtCoexist->bt_info.bt_ctrl_lps) -+ pBtCoexist->bt_info.bt_ctrl_lps = _FALSE; -+} -+ -+/* -+ * Constraint: -+ * 1. this function will request pwrctrl->lock -+ */ -+void halbtcoutsrc_LeaveLowPower(PBTC_COEXIST pBtCoexist) -+{ -+#ifdef CONFIG_LPS_LCLK -+ PADAPTER padapter; -+ PHAL_DATA_TYPE pHalData; -+ struct pwrctrl_priv *pwrctrl; -+ s32 ready; -+ systime stime; -+ s32 utime; -+ u32 timeout; /* unit: ms */ -+ -+ -+ padapter = pBtCoexist->Adapter; -+ pHalData = GET_HAL_DATA(padapter); -+ pwrctrl = adapter_to_pwrctl(padapter); -+ ready = _FAIL; -+#ifdef LPS_RPWM_WAIT_MS -+ timeout = LPS_RPWM_WAIT_MS; -+#else /* !LPS_RPWM_WAIT_MS */ -+ timeout = 30; -+#endif /* !LPS_RPWM_WAIT_MS */ -+ -+ if (GLBtcBtCoexAliveRegistered == _TRUE) -+ return; -+ -+ stime = rtw_get_current_time(); -+ do { -+ ready = rtw_register_task_alive(padapter, BTCOEX_ALIVE); -+ if (_SUCCESS == ready) -+ break; -+ -+ utime = rtw_get_passing_time_ms(stime); -+ if (utime > timeout) -+ break; -+ -+ rtw_msleep_os(1); -+ } while (1); -+ -+ GLBtcBtCoexAliveRegistered = _TRUE; -+#endif /* CONFIG_LPS_LCLK */ -+} -+ -+/* -+ * Constraint: -+ * 1. this function will request pwrctrl->lock -+ */ -+void halbtcoutsrc_NormalLowPower(PBTC_COEXIST pBtCoexist) -+{ -+#ifdef CONFIG_LPS_LCLK -+ PADAPTER padapter; -+ -+ if (GLBtcBtCoexAliveRegistered == _FALSE) -+ return; -+ -+ padapter = pBtCoexist->Adapter; -+ rtw_unregister_task_alive(padapter, BTCOEX_ALIVE); -+ -+ GLBtcBtCoexAliveRegistered = _FALSE; -+#endif /* CONFIG_LPS_LCLK */ -+} -+ -+void halbtcoutsrc_DisableLowPower(PBTC_COEXIST pBtCoexist, u8 bLowPwrDisable) -+{ -+ pBtCoexist->bt_info.bt_disable_low_pwr = bLowPwrDisable; -+ if (bLowPwrDisable) -+ halbtcoutsrc_LeaveLowPower(pBtCoexist); /* leave 32k low power. */ -+ else -+ halbtcoutsrc_NormalLowPower(pBtCoexist); /* original 32k low power behavior. */ -+} -+ -+void halbtcoutsrc_AggregationCheck(PBTC_COEXIST pBtCoexist) -+{ -+ PADAPTER padapter; -+ BOOLEAN bNeedToAct = _FALSE; -+ static u32 preTime = 0; -+ u32 curTime = 0; -+ -+ padapter = pBtCoexist->Adapter; -+ -+ /* ===================================== */ -+ /* To void continuous deleteBA=>addBA=>deleteBA=>addBA */ -+ /* This function is not allowed to continuous called. */ -+ /* It can only be called after 8 seconds. */ -+ /* ===================================== */ -+ -+ curTime = rtw_systime_to_ms(rtw_get_current_time()); -+ if ((curTime - preTime) < HALBTCOUTSRC_AGG_CHK_WINDOW_IN_MS) /* over 8 seconds you can execute this function again. */ -+ return; -+ else -+ preTime = curTime; -+ -+ if (pBtCoexist->bt_info.reject_agg_pkt) { -+ bNeedToAct = _TRUE; -+ pBtCoexist->bt_info.pre_reject_agg_pkt = pBtCoexist->bt_info.reject_agg_pkt; -+ } else { -+ if (pBtCoexist->bt_info.pre_reject_agg_pkt) { -+ bNeedToAct = _TRUE; -+ pBtCoexist->bt_info.pre_reject_agg_pkt = pBtCoexist->bt_info.reject_agg_pkt; -+ } -+ -+ if (pBtCoexist->bt_info.pre_bt_ctrl_agg_buf_size != -+ pBtCoexist->bt_info.bt_ctrl_agg_buf_size) { -+ bNeedToAct = _TRUE; -+ pBtCoexist->bt_info.pre_bt_ctrl_agg_buf_size = pBtCoexist->bt_info.bt_ctrl_agg_buf_size; -+ } -+ -+ if (pBtCoexist->bt_info.bt_ctrl_agg_buf_size) { -+ if (pBtCoexist->bt_info.pre_agg_buf_size != -+ pBtCoexist->bt_info.agg_buf_size) -+ bNeedToAct = _TRUE; -+ pBtCoexist->bt_info.pre_agg_buf_size = pBtCoexist->bt_info.agg_buf_size; -+ } -+ } -+ -+ if (bNeedToAct) -+ rtw_btcoex_rx_ampdu_apply(padapter); -+} -+ -+u8 halbtcoutsrc_is_autoload_fail(PBTC_COEXIST pBtCoexist) -+{ -+ PADAPTER padapter; -+ PHAL_DATA_TYPE pHalData; -+ -+ padapter = pBtCoexist->Adapter; -+ pHalData = GET_HAL_DATA(padapter); -+ -+ return pHalData->bautoload_fail_flag; -+} -+ -+u8 halbtcoutsrc_is_fw_ready(PBTC_COEXIST pBtCoexist) -+{ -+ PADAPTER padapter; -+ -+ padapter = pBtCoexist->Adapter; -+ -+ return GET_HAL_DATA(padapter)->bFWReady; -+} -+ -+u8 halbtcoutsrc_IsDualBandConnected(PADAPTER padapter) -+{ -+ u8 ret = BTC_MULTIPORT_SCC; -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter) && (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ u8 band0 = mccobjpriv->iface[0]->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G; -+ u8 band1 = mccobjpriv->iface[1]->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G; -+ -+ if (band0 != band1) -+ ret = BTC_MULTIPORT_MCC_DUAL_BAND; -+ else -+ ret = BTC_MULTIPORT_MCC_DUAL_CHANNEL; -+ } -+#endif -+ -+ return ret; -+} -+ -+u8 halbtcoutsrc_IsWifiBusy(PADAPTER padapter) -+{ -+ if (rtw_mi_check_status(padapter, MI_AP_ASSOC)) -+ return _TRUE; -+ if (rtw_mi_busy_traffic_check(padapter)) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+static u32 _halbtcoutsrc_GetWifiLinkStatus(PADAPTER padapter) -+{ -+ struct mlme_priv *pmlmepriv; -+ u8 bp2p; -+ u32 portConnectedStatus; -+ -+ -+ pmlmepriv = &padapter->mlmepriv; -+ bp2p = _FALSE; -+ portConnectedStatus = 0; -+ -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) -+ bp2p = _TRUE; -+#endif /* CONFIG_P2P */ -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { -+ if (_TRUE == bp2p) -+ portConnectedStatus |= WIFI_P2P_GO_CONNECTED; -+ else -+ portConnectedStatus |= WIFI_AP_CONNECTED; -+ } else { -+ if (_TRUE == bp2p) -+ portConnectedStatus |= WIFI_P2P_GC_CONNECTED; -+ else -+ portConnectedStatus |= WIFI_STA_CONNECTED; -+ } -+ } -+ -+ return portConnectedStatus; -+} -+ -+u32 halbtcoutsrc_GetWifiLinkStatus(PBTC_COEXIST pBtCoexist) -+{ -+ /* ================================= */ -+ /* return value: */ -+ /* [31:16]=> connected port number */ -+ /* [15:0]=> port connected bit define */ -+ /* ================================ */ -+ -+ PADAPTER padapter; -+ u32 retVal; -+ u32 portConnectedStatus, numOfConnectedPort; -+ struct dvobj_priv *dvobj; -+ _adapter *iface; -+ int i; -+ -+ padapter = pBtCoexist->Adapter; -+ retVal = 0; -+ portConnectedStatus = 0; -+ numOfConnectedPort = 0; -+ dvobj = adapter_to_dvobj(padapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ retVal = _halbtcoutsrc_GetWifiLinkStatus(iface); -+ if (retVal) { -+ portConnectedStatus |= retVal; -+ numOfConnectedPort++; -+ } -+ } -+ } -+ retVal = (numOfConnectedPort << 16) | portConnectedStatus; -+ -+ return retVal; -+} -+ -+struct btc_wifi_link_info halbtcoutsrc_getwifilinkinfo(PBTC_COEXIST pBtCoexist) -+{ -+ u8 n_assoc_iface = 0, i =0, mcc_en = _FALSE; -+ PADAPTER adapter = NULL; -+ PADAPTER iface = NULL; -+ PADAPTER sta_iface = NULL, p2p_iface = NULL, ap_iface = NULL; -+ BTC_LINK_MODE btc_link_moe = BTC_LINK_MAX; -+ struct dvobj_priv *dvobj = NULL; -+ struct mlme_ext_priv *mlmeext = NULL; -+ struct btc_wifi_link_info wifi_link_info; -+ -+ adapter = (PADAPTER)pBtCoexist->Adapter; -+ dvobj = adapter_to_dvobj(adapter); -+ n_assoc_iface = rtw_mi_get_assoc_if_num(adapter); -+ -+ /* init value */ -+ wifi_link_info.link_mode = BTC_LINK_NONE; -+ wifi_link_info.sta_center_channel = 0; -+ wifi_link_info.p2p_center_channel = 0; -+ wifi_link_info.bany_client_join_go = _FALSE; -+ wifi_link_info.benable_noa = _FALSE; -+ wifi_link_info.bhotspot = _FALSE; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ mlmeext = &iface->mlmeextpriv; -+ if (MLME_IS_GO(iface)) { -+ wifi_link_info.link_mode = BTC_LINK_ONLY_GO; -+ wifi_link_info.p2p_center_channel = -+ rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); -+ p2p_iface = iface; -+ if (rtw_linked_check(iface)) -+ wifi_link_info.bany_client_join_go = _TRUE; -+ } else if (MLME_IS_GC(iface)) { -+ wifi_link_info.link_mode = BTC_LINK_ONLY_GC; -+ wifi_link_info.p2p_center_channel = -+ rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); -+ p2p_iface = iface; -+ } else if (MLME_IS_AP(iface)) { -+ wifi_link_info.link_mode = BTC_LINK_ONLY_AP; -+ ap_iface = iface; -+ wifi_link_info.p2p_center_channel = -+ rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); -+ } else if (MLME_IS_STA(iface) && rtw_linked_check(iface)) { -+ wifi_link_info.link_mode = BTC_LINK_ONLY_STA; -+ wifi_link_info.sta_center_channel = -+ rtw_get_center_ch(mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset); -+ sta_iface = iface; -+ } -+ } -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(adapter)) { -+ if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) -+ mcc_en = _TRUE; -+ } -+#endif/* CONFIG_MCC_MODE */ -+ -+ if (n_assoc_iface == 0) { -+ wifi_link_info.link_mode = BTC_LINK_NONE; -+ } else if (n_assoc_iface == 1) { -+ /* by pass */ -+ } else if (n_assoc_iface == 2) { -+ if (sta_iface && p2p_iface) { -+ u8 band_sta = sta_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G; -+ u8 band_p2p = p2p_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G; -+ if (band_sta == band_p2p) { -+ switch (band_sta) { -+ case BAND_ON_2_4G: -+ if (MLME_IS_GO(p2p_iface)) { -+ #ifdef CONFIG_MCC_MODE -+ wifi_link_info.link_mode = -+ mcc_en == _TRUE ? BTC_LINK_2G_MCC_GO_STA : BTC_LINK_2G_SCC_GO_STA; -+ #else /* !CONFIG_MCC_MODE */ -+ wifi_link_info.link_mode = BTC_LINK_2G_SCC_GO_STA; -+ #endif /* CONFIG_MCC_MODE */ -+ } else if (MLME_IS_GC(p2p_iface)) { -+ #ifdef CONFIG_MCC_MODE -+ wifi_link_info.link_mode = -+ mcc_en == _TRUE ? BTC_LINK_2G_MCC_GC_STA : BTC_LINK_2G_SCC_GC_STA; -+ #else /* !CONFIG_MCC_MODE */ -+ wifi_link_info.link_mode = BTC_LINK_2G_SCC_GC_STA; -+ #endif /* CONFIG_MCC_MODE */ -+ } -+ break; -+ case BAND_ON_5G: -+ if (MLME_IS_GO(p2p_iface)) { -+ #ifdef CONFIG_MCC_MODE -+ wifi_link_info.link_mode = -+ mcc_en == _TRUE ? BTC_LINK_5G_MCC_GO_STA : BTC_LINK_5G_SCC_GO_STA; -+ #else /* !CONFIG_MCC_MODE */ -+ wifi_link_info.link_mode = BTC_LINK_5G_SCC_GO_STA; -+ #endif /* CONFIG_MCC_MODE */ -+ } else if (MLME_IS_GC(p2p_iface)) { -+ #ifdef CONFIG_MCC_MODE -+ wifi_link_info.link_mode = -+ mcc_en == _TRUE ? BTC_LINK_5G_MCC_GC_STA : BTC_LINK_5G_SCC_GC_STA; -+ #else /* !CONFIG_MCC_MODE */ -+ wifi_link_info.link_mode = BTC_LINK_5G_SCC_GC_STA; -+ #endif /* CONFIG_MCC_MODE */ -+ } -+ break; -+ } -+ } else { -+ if (MLME_IS_GO(p2p_iface)) -+ wifi_link_info.link_mode = BTC_LINK_25G_MCC_GO_STA; -+ else if (MLME_IS_GC(p2p_iface)) -+ wifi_link_info.link_mode = BTC_LINK_25G_MCC_GC_STA; -+ } -+ } -+ -+ if (sta_iface && ap_iface) { -+ u8 band_sta = sta_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G; -+ u8 band_ap = ap_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G; -+ -+ if (band_sta == band_ap) { -+ switch (band_sta) { -+ case BAND_ON_2_4G: -+ #ifdef CONFIG_MCC_MODE -+ wifi_link_info.link_mode = -+ mcc_en == _TRUE ? BTC_LINK_2G_MCC_GO_STA : BTC_LINK_2G_SCC_GO_STA; -+ #else /* !CONFIG_MCC_MODE */ -+ wifi_link_info.link_mode = BTC_LINK_2G_SCC_GO_STA; -+ #endif /* CONFIG_MCC_MODE */ -+ break; -+ case BAND_ON_5G: -+ #ifdef CONFIG_MCC_MODE -+ wifi_link_info.link_mode = -+ mcc_en == _TRUE ? BTC_LINK_5G_MCC_GO_STA : BTC_LINK_5G_SCC_GO_STA; -+ #else /* !CONFIG_MCC_MODE */ -+ wifi_link_info.link_mode = BTC_LINK_5G_SCC_GO_STA; -+ #endif /* CONFIG_MCC_MODE */ -+ break; -+ } -+ } else { -+ wifi_link_info.link_mode = BTC_LINK_25G_MCC_GO_STA; -+ } -+ } -+ } else { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ RTW_ERR("%s do not support n_assoc_iface > 2 (ant_num == 1)", __func__); -+ } -+ -+ return wifi_link_info; -+} -+ -+ -+static void _btmpoper_timer_hdl(void *p) -+{ -+ if (GLBtcBtMpRptWait == _TRUE) { -+ GLBtcBtMpRptWait = _FALSE; -+ _rtw_up_sema(&GLBtcBtMpRptSema); -+ } -+} -+ -+/* -+ * !IMPORTANT! -+ * Before call this function, caller should acquire "GLBtcBtMpOperLock"! -+ * Othrewise there will be racing problem and something may go wrong. -+ */ -+static u8 _btmpoper_cmd(PBTC_COEXIST pBtCoexist, u8 opcode, u8 opcodever, u8 *cmd, u8 size) -+{ -+ PADAPTER padapter; -+ u8 buf[H2C_BTMP_OPER_LEN] = {0}; -+ u8 buflen; -+ u8 seq; -+ s32 ret; -+ -+ -+ if (!cmd && size) -+ size = 0; -+ if ((size + 2) > H2C_BTMP_OPER_LEN) -+ return BT_STATUS_H2C_LENGTH_EXCEEDED; -+ buflen = size + 2; -+ -+ seq = GLBtcBtMpOperSeq & 0xF; -+ GLBtcBtMpOperSeq++; -+ -+ buf[0] = (opcodever & 0xF) | (seq << 4); -+ buf[1] = opcode; -+ if (cmd && size) -+ _rtw_memcpy(buf + 2, cmd, size); -+ -+ GLBtcBtMpRptWait = _TRUE; -+ GLBtcBtMpRptWiFiOK = _FALSE; -+ GLBtcBtMpRptBTOK = _FALSE; -+ GLBtcBtMpRptStatus = 0; -+ padapter = pBtCoexist->Adapter; -+ _set_timer(&GLBtcBtMpOperTimer, BTC_MPOPER_TIMEOUT); -+ if (rtw_hal_fill_h2c_cmd(padapter, H2C_BT_MP_OPER, buflen, buf) == _FAIL) { -+ _cancel_timer_ex(&GLBtcBtMpOperTimer); -+ ret = BT_STATUS_H2C_FAIL; -+ goto exit; -+ } -+ -+ _rtw_down_sema(&GLBtcBtMpRptSema); -+ /* GLBtcBtMpRptWait should be _FALSE here*/ -+ -+ if (GLBtcBtMpRptWiFiOK == _FALSE) { -+ RTW_DBG("%s: Didn't get H2C Rsp Event!\n", __FUNCTION__); -+ ret = BT_STATUS_H2C_TIMTOUT; -+ goto exit; -+ } -+ if (GLBtcBtMpRptBTOK == _FALSE) { -+ RTW_DBG("%s: Didn't get BT response!\n", __FUNCTION__); -+ ret = BT_STATUS_H2C_BT_NO_RSP; -+ goto exit; -+ } -+ -+ if (seq != GLBtcBtMpRptSeq) { -+ RTW_ERR("%s: Sequence number not match!(%d!=%d)!\n", -+ __FUNCTION__, seq, GLBtcBtMpRptSeq); -+ ret = BT_STATUS_C2H_REQNUM_MISMATCH; -+ goto exit; -+ } -+ -+ switch (GLBtcBtMpRptStatus) { -+ /* Examine the status reported from C2H */ -+ case BT_STATUS_OK: -+ ret = BT_STATUS_BT_OP_SUCCESS; -+ RTW_DBG("%s: C2H status = BT_STATUS_BT_OP_SUCCESS\n", __FUNCTION__); -+ break; -+ case BT_STATUS_VERSION_MISMATCH: -+ ret = BT_STATUS_OPCODE_L_VERSION_MISMATCH; -+ RTW_DBG("%s: C2H status = BT_STATUS_OPCODE_L_VERSION_MISMATCH\n", __FUNCTION__); -+ break; -+ case BT_STATUS_UNKNOWN_OPCODE: -+ ret = BT_STATUS_UNKNOWN_OPCODE_L; -+ RTW_DBG("%s: C2H status = MP_BT_STATUS_UNKNOWN_OPCODE_L\n", __FUNCTION__); -+ break; -+ case BT_STATUS_ERROR_PARAMETER: -+ ret = BT_STATUS_PARAMETER_FORMAT_ERROR_L; -+ RTW_DBG("%s: C2H status = MP_BT_STATUS_PARAMETER_FORMAT_ERROR_L\n", __FUNCTION__); -+ break; -+ default: -+ ret = BT_STATUS_UNKNOWN_STATUS_L; -+ RTW_DBG("%s: C2H status = MP_BT_STATUS_UNKNOWN_STATUS_L\n", __FUNCTION__); -+ break; -+ } -+ -+exit: -+ return ret; -+} -+ -+u32 halbtcoutsrc_GetBtPatchVer(PBTC_COEXIST pBtCoexist) -+{ -+ if (pBtCoexist->bt_info.get_bt_fw_ver_cnt <= 5) { -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ _irqL irqL; -+ u8 ret; -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ ret = _btmpoper_cmd(pBtCoexist, BT_OP_GET_BT_VERSION, 0, NULL, 0); -+ if (BT_STATUS_BT_OP_SUCCESS == ret) { -+ pBtCoexist->bt_info.bt_real_fw_ver = le32_to_cpu(*(u32 *)GLBtcBtMpRptRsp); -+ pBtCoexist->bt_info.get_bt_fw_ver_cnt++; -+ } -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ } else { -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ u8 dataLen = 2; -+ u8 buf[4] = {0}; -+ -+ buf[0] = 0x0; /* OP_Code */ -+ buf[1] = 0x0; /* OP_Code_Length */ -+ BT_SendEventExtBtCoexControl(pBtCoexist->Adapter, _FALSE, dataLen, &buf[0]); -+#endif /* !CONFIG_BT_COEXIST_SOCKET_TRX */ -+ } -+ } -+ -+ return pBtCoexist->bt_info.bt_real_fw_ver; -+} -+ -+s32 halbtcoutsrc_GetWifiRssi(PADAPTER padapter) -+{ -+ return rtw_dm_get_min_rssi(padapter); -+} -+ -+u32 halbtcoutsrc_GetBtCoexSupportedFeature(void *pBtcContext) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u32 ret = BT_STATUS_BT_OP_SUCCESS; -+ u32 data = 0; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ u8 buf[3] = {0}; -+ _irqL irqL; -+ u8 op_code; -+ u8 status; -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ op_code = BT_OP_GET_BT_COEX_SUPPORTED_FEATURE; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0); -+ if (status == BT_STATUS_BT_OP_SUCCESS) -+ data = le16_to_cpu(*(u16 *)GLBtcBtMpRptRsp); -+ else -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ } else -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ -+ return data; -+} -+ -+u32 halbtcoutsrc_GetBtCoexSupportedVersion(void *pBtcContext) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u32 ret = BT_STATUS_BT_OP_SUCCESS; -+ u32 data = 0xFFFF; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ u8 buf[3] = {0}; -+ _irqL irqL; -+ u8 op_code; -+ u8 status; -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ op_code = BT_OP_GET_BT_COEX_SUPPORTED_VERSION; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0); -+ if (status == BT_STATUS_BT_OP_SUCCESS) -+ data = le16_to_cpu(*(u16 *)GLBtcBtMpRptRsp); -+ else -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ } else -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ -+ return data; -+} -+ -+u32 halbtcoutsrc_GetBtDeviceInfo(void *pBtcContext) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u32 ret = BT_STATUS_BT_OP_SUCCESS; -+ u32 btDeviceInfo = 0; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ u8 buf[3] = {0}; -+ _irqL irqL; -+ u8 op_code; -+ u8 status; -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ op_code = BT_OP_GET_BT_DEVICE_INFO; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0); -+ if (status == BT_STATUS_BT_OP_SUCCESS) -+ btDeviceInfo = le32_to_cpu(*(u32 *)GLBtcBtMpRptRsp); -+ else -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ } else -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ -+ return btDeviceInfo; -+} -+ -+u32 halbtcoutsrc_GetBtForbiddenSlotVal(void *pBtcContext) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u32 ret = BT_STATUS_BT_OP_SUCCESS; -+ u32 btForbiddenSlotVal = 0; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ u8 buf[3] = {0}; -+ _irqL irqL; -+ u8 op_code; -+ u8 status; -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ op_code = BT_OP_GET_BT_FORBIDDEN_SLOT_VAL; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0); -+ if (status == BT_STATUS_BT_OP_SUCCESS) -+ btForbiddenSlotVal = le32_to_cpu(*(u32 *)GLBtcBtMpRptRsp); -+ else -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ } else -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ -+ return btForbiddenSlotVal; -+} -+ -+static u8 halbtcoutsrc_GetWifiScanAPNum(PADAPTER padapter) -+{ -+ struct mlme_priv *pmlmepriv; -+ struct mlme_ext_priv *pmlmeext; -+ static u8 scan_AP_num = 0; -+ -+ -+ pmlmepriv = &padapter->mlmepriv; -+ pmlmeext = &padapter->mlmeextpriv; -+ -+ if (GLBtcWiFiInScanState == _FALSE) { -+ if (pmlmepriv->num_of_scanned > 0xFF) -+ scan_AP_num = 0xFF; -+ else -+ scan_AP_num = (u8)pmlmepriv->num_of_scanned; -+ } -+ -+ return scan_AP_num; -+} -+ -+u32 halbtcoutsrc_GetPhydmVersion(void *pBtcContext) -+{ -+ struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; -+ PADAPTER Adapter = pBtCoexist->Adapter; -+ -+#ifdef CONFIG_RTL8192E -+ return RELEASE_VERSION_8192E; -+#endif -+ -+#ifdef CONFIG_RTL8821A -+ return RELEASE_VERSION_8821A; -+#endif -+ -+#ifdef CONFIG_RTL8723B -+ return RELEASE_VERSION_8723B; -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ return RELEASE_VERSION_8812A; -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ return RELEASE_VERSION_8703B; -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ return RELEASE_VERSION_8822B; -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ return RELEASE_VERSION_8723D; -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ return RELEASE_VERSION_8821C; -+#endif -+ -+#ifdef CONFIG_RTL8192F -+ return RELEASE_VERSION_8192F; -+#endif -+ -+#ifdef CONFIG_RTL8822C -+ return RELEASE_VERSION_8822C; -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ return RELEASE_VERSION_8814A; -+#endif -+ -+#ifdef CONFIG_RTL8814B -+ return RELEASE_VERSION_8814B; -+#endif -+ -+#ifdef CONFIG_RTL8723F -+ return RELEASE_VERSION_8723F; -+#endif -+ -+} -+ -+u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ PHAL_DATA_TYPE pHalData; -+ struct mlme_ext_priv *mlmeext; -+ struct btc_wifi_link_info *wifi_link_info; -+ u8 bSoftApExist, bVwifiExist; -+ u8 *pu8; -+ s32 *pS4Tmp; -+ u32 *pU4Tmp; -+ u8 *pU1Tmp; -+ u16 *pU2Tmp; -+ u8 ret; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return _FALSE; -+ -+ padapter = pBtCoexist->Adapter; -+ pHalData = GET_HAL_DATA(padapter); -+ mlmeext = &padapter->mlmeextpriv; -+ bSoftApExist = _FALSE; -+ bVwifiExist = _FALSE; -+ pu8 = (u8 *)pOutBuf; -+ pS4Tmp = (s32 *)pOutBuf; -+ pU4Tmp = (u32 *)pOutBuf; -+ pU1Tmp = (u8 *)pOutBuf; -+ pU2Tmp = (u16*)pOutBuf; -+ wifi_link_info = (struct btc_wifi_link_info *)pOutBuf; -+ ret = _TRUE; -+ -+ switch (getType) { -+ case BTC_GET_BL_HS_OPERATION: -+ *pu8 = _FALSE; -+ ret = _FALSE; -+ break; -+ -+ case BTC_GET_BL_HS_CONNECTING: -+ *pu8 = _FALSE; -+ ret = _FALSE; -+ break; -+ -+ case BTC_GET_BL_WIFI_FW_READY: -+ *pu8 = halbtcoutsrc_is_fw_ready(pBtCoexist); -+ break; -+ -+ case BTC_GET_BL_WIFI_CONNECTED: -+ *pu8 = (rtw_mi_check_status(padapter, MI_LINKED)) ? _TRUE : _FALSE; -+ break; -+ -+ case BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED: -+ *pu8 = halbtcoutsrc_IsDualBandConnected(padapter); -+ break; -+ -+ case BTC_GET_BL_WIFI_BUSY: -+ *pu8 = halbtcoutsrc_IsWifiBusy(padapter); -+ break; -+ -+ case BTC_GET_BL_WIFI_SCAN: -+#if 0 -+ *pu8 = (rtw_mi_check_fwstate(padapter, WIFI_UNDER_SURVEY)) ? _TRUE : _FALSE; -+#else -+ /* Use the value of the new variable GLBtcWiFiInScanState to judge whether WiFi is in scan state or not, since the originally used flag -+ WIFI_UNDER_SURVEY in fwstate may not be cleared in time */ -+ *pu8 = GLBtcWiFiInScanState; -+#endif -+ break; -+ -+ case BTC_GET_BL_WIFI_LINK: -+ *pu8 = (rtw_mi_check_status(padapter, MI_STA_LINKING)) ? _TRUE : _FALSE; -+ break; -+ -+ case BTC_GET_BL_WIFI_ROAM: -+ *pu8 = (rtw_mi_check_status(padapter, MI_STA_LINKING)) ? _TRUE : _FALSE; -+ break; -+ -+ case BTC_GET_BL_WIFI_4_WAY_PROGRESS: -+ *pu8 = _FALSE; -+ break; -+ -+ case BTC_GET_BL_WIFI_BSSID: -+ _rtw_memcpy(pu8, get_bssid(&padapter->mlmepriv), ETH_ALEN); -+ break; -+ -+ case BTC_GET_BL_WIFI_UNDER_5G: -+ *pu8 = (pHalData->current_band_type == BAND_ON_5G) ? _TRUE : _FALSE; -+ break; -+ -+ case BTC_GET_BL_WIFI_AP_MODE_ENABLE: -+ *pu8 = (rtw_mi_check_status(padapter, MI_AP_MODE)) ? _TRUE : _FALSE; -+ break; -+ -+ case BTC_GET_BL_WIFI_ENABLE_ENCRYPTION: -+ *pu8 = padapter->securitypriv.dot11PrivacyAlgrthm == 0 ? _FALSE : _TRUE; -+ break; -+ -+ case BTC_GET_BL_WIFI_UNDER_B_MODE: -+ if (mlmeext->cur_wireless_mode == WIRELESS_11B) -+ *pu8 = _TRUE; -+ else -+ *pu8 = _FALSE; -+ break; -+ -+ case BTC_GET_BL_WIFI_IS_IN_MP_MODE: -+ if (padapter->registrypriv.mp_mode == 0) -+ *pu8 = _FALSE; -+ else -+ *pu8 = _TRUE; -+ break; -+ -+ case BTC_GET_BL_EXT_SWITCH: -+ *pu8 = _FALSE; -+ break; -+ case BTC_GET_BL_IS_ASUS_8723B: -+ /* Always return FALSE in linux driver since this case is added only for windows driver */ -+ *pu8 = _FALSE; -+ break; -+ -+ case BTC_GET_BL_RF4CE_CONNECTED: -+#ifdef CONFIG_RF4CE_COEXIST -+ if (hal_btcoex_get_rf4ce_link_state() == 0) -+ *pu8 = FALSE; -+ else -+ *pu8 = TRUE; -+#else -+ *pu8 = FALSE; -+#endif -+ break; -+ -+ case BTC_GET_BL_WIFI_LW_PWR_STATE: -+ /* return false due to coex do not run during 32K */ -+ *pu8 = FALSE; -+ break; -+ -+ case BTC_GET_S4_WIFI_RSSI: -+ *pS4Tmp = halbtcoutsrc_GetWifiRssi(padapter); -+ break; -+ -+ case BTC_GET_S4_HS_RSSI: -+ *pS4Tmp = 0; -+ ret = _FALSE; -+ break; -+ -+ case BTC_GET_U4_WIFI_BW: -+ if (IsLegacyOnly(mlmeext->cur_wireless_mode)) -+ *pU4Tmp = BTC_WIFI_BW_LEGACY; -+ else { -+ switch (pHalData->current_channel_bw) { -+ case CHANNEL_WIDTH_20: -+ *pU4Tmp = BTC_WIFI_BW_HT20; -+ break; -+ case CHANNEL_WIDTH_40: -+ *pU4Tmp = BTC_WIFI_BW_HT40; -+ break; -+ case CHANNEL_WIDTH_80: -+ *pU4Tmp = BTC_WIFI_BW_HT80; -+ break; -+ case CHANNEL_WIDTH_160: -+ *pU4Tmp = BTC_WIFI_BW_HT160; -+ break; -+ default: -+ RTW_INFO("[BTCOEX] unknown bandwidth(%d)\n", pHalData->current_channel_bw); -+ *pU4Tmp = BTC_WIFI_BW_HT40; -+ break; -+ } -+ -+ } -+ break; -+ -+ case BTC_GET_U4_WIFI_TRAFFIC_DIRECTION: -+ case BTC_GET_U4_WIFI_TRAFFIC_DIR: -+ { -+ PRT_LINK_DETECT_T plinkinfo; -+ plinkinfo = &padapter->mlmepriv.LinkDetectInfo; -+ -+ if (plinkinfo->NumTxOkInPeriod > plinkinfo->NumRxOkInPeriod) -+ *pU4Tmp = BTC_WIFI_TRAFFIC_TX; -+ else -+ *pU4Tmp = BTC_WIFI_TRAFFIC_RX; -+ } -+ break; -+ -+ case BTC_GET_U4_WIFI_FW_VER: -+ *pU4Tmp = pHalData->firmware_version << 16; -+ *pU4Tmp |= pHalData->firmware_sub_version; -+ break; -+ -+ case BTC_GET_U4_WIFI_PHY_VER: -+ *pU4Tmp = halbtcoutsrc_GetPhydmVersion(pBtCoexist); -+ break; -+ -+ case BTC_GET_U4_WIFI_LINK_STATUS: -+ *pU4Tmp = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist); -+ break; -+ case BTC_GET_BL_WIFI_LINK_INFO: -+ *wifi_link_info = halbtcoutsrc_getwifilinkinfo(pBtCoexist); -+ break; -+ case BTC_GET_U4_BT_PATCH_VER: -+ *pU4Tmp = halbtcoutsrc_GetBtPatchVer(pBtCoexist); -+ break; -+ -+ case BTC_GET_U4_VENDOR: -+ *pU4Tmp = BTC_VENDOR_OTHER; -+ break; -+ -+ case BTC_GET_U4_SUPPORTED_VERSION: -+ *pU4Tmp = halbtcoutsrc_GetBtCoexSupportedVersion(pBtCoexist); -+ break; -+ case BTC_GET_U4_SUPPORTED_FEATURE: -+ *pU4Tmp = halbtcoutsrc_GetBtCoexSupportedFeature(pBtCoexist); -+ break; -+ -+ case BTC_GET_U4_BT_DEVICE_INFO: -+ *pU4Tmp = halbtcoutsrc_GetBtDeviceInfo(pBtCoexist); -+ break; -+ -+ case BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL: -+ case BTC_GET_U4_BT_A2DP_FLUSH_VAL: -+ *pU4Tmp = halbtcoutsrc_GetBtForbiddenSlotVal(pBtCoexist); -+ break; -+ -+ case BTC_GET_U4_WIFI_IQK_TOTAL: -+ *pU4Tmp = pHalData->odmpriv.n_iqk_cnt; -+ break; -+ -+ case BTC_GET_U4_WIFI_IQK_OK: -+ *pU4Tmp = pHalData->odmpriv.n_iqk_ok_cnt; -+ break; -+ -+ case BTC_GET_U4_WIFI_IQK_FAIL: -+ *pU4Tmp = pHalData->odmpriv.n_iqk_fail_cnt; -+ break; -+ -+ case BTC_GET_U1_WIFI_DOT11_CHNL: -+ *pU1Tmp = padapter->mlmeextpriv.cur_channel; -+ break; -+ -+ case BTC_GET_U1_WIFI_CENTRAL_CHNL: -+ *pU1Tmp = pHalData->current_channel; -+ break; -+ -+ case BTC_GET_U1_WIFI_HS_CHNL: -+ *pU1Tmp = 0; -+ ret = _FALSE; -+ break; -+ -+ case BTC_GET_U1_WIFI_P2P_CHNL: -+#ifdef CONFIG_P2P -+ { -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ *pU1Tmp = pwdinfo->operating_channel; -+ } -+#else -+ *pU1Tmp = 0; -+#endif -+ break; -+ -+ case BTC_GET_U1_MAC_PHY_MODE: -+ /* *pU1Tmp = BTC_SMSP; -+ * *pU1Tmp = BTC_DMSP; -+ * *pU1Tmp = BTC_DMDP; -+ * *pU1Tmp = BTC_MP_UNKNOWN; */ -+ break; -+ -+ case BTC_GET_U1_AP_NUM: -+ *pU1Tmp = halbtcoutsrc_GetWifiScanAPNum(padapter); -+ break; -+ case BTC_GET_U1_ANT_TYPE: -+ switch (pHalData->bt_coexist.btAntisolation) { -+ case 0: -+ *pU1Tmp = (u8)BTC_ANT_TYPE_0; -+ pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_0; -+ break; -+ case 1: -+ *pU1Tmp = (u8)BTC_ANT_TYPE_1; -+ pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_1; -+ break; -+ case 2: -+ *pU1Tmp = (u8)BTC_ANT_TYPE_2; -+ pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_2; -+ break; -+ case 3: -+ *pU1Tmp = (u8)BTC_ANT_TYPE_3; -+ pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_3; -+ break; -+ case 4: -+ *pU1Tmp = (u8)BTC_ANT_TYPE_4; -+ pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_4; -+ break; -+ } -+ break; -+ case BTC_GET_U1_IOT_PEER: -+ *pU1Tmp = mlmeext->mlmext_info.assoc_AP_vendor; -+ break; -+ -+ /* =======1Ant=========== */ -+ case BTC_GET_U1_LPS_MODE: -+ *pU1Tmp = padapter->dvobj->pwrctl_priv.pwr_mode; -+ break; -+ -+ case BTC_GET_U2_BEACON_PERIOD: -+ *pU2Tmp = mlmeext->mlmext_info.bcn_interval; -+ break; -+ -+ default: -+ ret = _FALSE; -+ break; -+ } -+ -+ return ret; -+} -+ -+u16 halbtcoutsrc_LnaConstrainLvl(void *pBtcContext, u8 *lna_constrain_level) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u16 ret = BT_STATUS_BT_OP_SUCCESS; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ _irqL irqL; -+ u8 op_code; -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ ret = _btmpoper_cmd(pBtCoexist, BT_OP_SET_BT_LANCONSTRAIN_LEVEL, 0, lna_constrain_level, 1); -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ } else { -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ RTW_INFO("%s halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == FALSE\n", __func__); -+ } -+ -+ return ret; -+} -+ -+u8 halbtcoutsrc_SetBtGoldenRxRange(void *pBtcContext, u8 profile, u8 range_shift) -+{ -+ /* wait for implementation if necessary */ -+ -+ return 0; -+} -+ -+u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ PHAL_DATA_TYPE pHalData; -+ u8 *pu8; -+ u8 *pU1Tmp; -+ u16 *pU2Tmp; -+ u32 *pU4Tmp; -+ u8 ret; -+ u8 result = _TRUE; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return _FALSE; -+ -+ padapter = pBtCoexist->Adapter; -+ pHalData = GET_HAL_DATA(padapter); -+ pu8 = (u8 *)pInBuf; -+ pU1Tmp = (u8 *)pInBuf; -+ pU2Tmp = (u16*)pInBuf; -+ pU4Tmp = (u32 *)pInBuf; -+ ret = _TRUE; -+ -+ switch (setType) { -+ /* set some u8 type variables. */ -+ case BTC_SET_BL_BT_DISABLE: -+ pBtCoexist->bt_info.bt_disabled = *pu8; -+ break; -+ -+ case BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE: -+ pBtCoexist->bt_info.bt_enable_disable_change = *pu8; -+ break; -+ -+ case BTC_SET_BL_BT_TRAFFIC_BUSY: -+ pBtCoexist->bt_info.bt_busy = *pu8; -+ break; -+ -+ case BTC_SET_BL_BT_LIMITED_DIG: -+ pBtCoexist->bt_info.limited_dig = *pu8; -+ break; -+ -+ case BTC_SET_BL_FORCE_TO_ROAM: -+ pBtCoexist->bt_info.force_to_roam = *pu8; -+ break; -+ -+ case BTC_SET_BL_TO_REJ_AP_AGG_PKT: -+ pBtCoexist->bt_info.reject_agg_pkt = *pu8; -+ break; -+ -+ case BTC_SET_BL_BT_CTRL_AGG_SIZE: -+ pBtCoexist->bt_info.bt_ctrl_agg_buf_size = *pu8; -+ break; -+ -+ case BTC_SET_BL_INC_SCAN_DEV_NUM: -+ pBtCoexist->bt_info.increase_scan_dev_num = *pu8; -+ break; -+ -+ case BTC_SET_BL_BT_TX_RX_MASK: -+ pBtCoexist->bt_info.bt_tx_rx_mask = *pu8; -+ break; -+ -+ case BTC_SET_BL_MIRACAST_PLUS_BT: -+ pBtCoexist->bt_info.miracast_plus_bt = *pu8; -+ break; -+ -+ /* set some u8 type variables. */ -+ case BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON: -+ pBtCoexist->bt_info.rssi_adjust_for_agc_table_on = *pU1Tmp; -+ break; -+ -+ case BTC_SET_U1_AGG_BUF_SIZE: -+ pBtCoexist->bt_info.agg_buf_size = *pU1Tmp; -+ break; -+ -+ /* the following are some action which will be triggered */ -+ case BTC_SET_ACT_GET_BT_RSSI: -+#if 0 -+ BT_SendGetBtRssiEvent(padapter); -+#else -+ ret = _FALSE; -+#endif -+ break; -+ -+ case BTC_SET_ACT_AGGREGATE_CTRL: -+ halbtcoutsrc_AggregationCheck(pBtCoexist); -+ break; -+ -+ /* =======1Ant=========== */ -+ /* set some u8 type variables. */ -+ case BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE: -+ pBtCoexist->bt_info.rssi_adjust_for_1ant_coex_type = *pU1Tmp; -+ break; -+ -+ case BTC_SET_U1_LPS_VAL: -+ pBtCoexist->bt_info.lps_val = *pU1Tmp; -+ break; -+ -+ case BTC_SET_U1_RPWM_VAL: -+ pBtCoexist->bt_info.rpwm_val = *pU1Tmp; -+ break; -+ -+ /* the following are some action which will be triggered */ -+ case BTC_SET_ACT_LEAVE_LPS: -+ result = halbtcoutsrc_LeaveLps(pBtCoexist); -+ break; -+ -+ case BTC_SET_ACT_ENTER_LPS: -+ halbtcoutsrc_EnterLps(pBtCoexist); -+ break; -+ -+ case BTC_SET_ACT_NORMAL_LPS: -+ halbtcoutsrc_NormalLps(pBtCoexist); -+ break; -+ -+ case BTC_SET_ACT_PRE_NORMAL_LPS: -+ halbtcoutsrc_Pre_NormalLps(pBtCoexist); -+ break; -+ -+ case BTC_SET_ACT_POST_NORMAL_LPS: -+ halbtcoutsrc_Post_NormalLps(pBtCoexist); -+ break; -+ -+ case BTC_SET_ACT_DISABLE_LOW_POWER: -+ halbtcoutsrc_DisableLowPower(pBtCoexist, *pu8); -+ break; -+ -+ case BTC_SET_ACT_UPDATE_RAMASK: -+ /* -+ pBtCoexist->bt_info.ra_mask = *pU4Tmp; -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ struct sta_info *psta; -+ PWLAN_BSSID_EX cur_network; -+ -+ cur_network = &padapter->mlmeextpriv.mlmext_info.network; -+ psta = rtw_get_stainfo(&padapter->stapriv, cur_network->MacAddress); -+ rtw_hal_update_ra_mask(psta); -+ } -+ */ -+ break; -+ -+ case BTC_SET_ACT_SEND_MIMO_PS: { -+ u8 newMimoPsMode = 3; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ /* *pU1Tmp = 0 use SM_PS static type */ -+ /* *pU1Tmp = 1 disable SM_PS */ -+ if (*pU1Tmp == 0) -+ newMimoPsMode = WLAN_HT_CAP_SM_PS_STATIC; -+ else if (*pU1Tmp == 1) -+ newMimoPsMode = WLAN_HT_CAP_SM_PS_DISABLED; -+ -+ if (check_fwstate(&padapter->mlmepriv , WIFI_ASOC_STATE) == _TRUE) { -+ /* issue_action_SM_PS(padapter, get_my_bssid(&(pmlmeinfo->network)), newMimoPsMode); */ -+ issue_action_SM_PS_wait_ack(padapter , get_my_bssid(&(pmlmeinfo->network)) , newMimoPsMode, 3 , 1); -+ } -+ } -+ break; -+ -+ case BTC_SET_ACT_CTRL_BT_INFO: -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ { -+ u8 dataLen = *pU1Tmp; -+ u8 tmpBuf[BTC_TMP_BUF_SHORT]; -+ if (dataLen) -+ _rtw_memcpy(tmpBuf, pU1Tmp + 1, dataLen); -+ BT_SendEventExtBtInfoControl(padapter, dataLen, &tmpBuf[0]); -+ } -+#else /* !CONFIG_BT_COEXIST_SOCKET_TRX */ -+ ret = _FALSE; -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ break; -+ -+ case BTC_SET_ACT_CTRL_BT_COEX: -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ { -+ u8 dataLen = *pU1Tmp; -+ u8 tmpBuf[BTC_TMP_BUF_SHORT]; -+ if (dataLen) -+ _rtw_memcpy(tmpBuf, pU1Tmp + 1, dataLen); -+ BT_SendEventExtBtCoexControl(padapter, _FALSE, dataLen, &tmpBuf[0]); -+ } -+#else /* !CONFIG_BT_COEXIST_SOCKET_TRX */ -+ ret = _FALSE; -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ break; -+ case BTC_SET_ACT_CTRL_8723B_ANT: -+#if 0 -+ { -+ u8 dataLen = *pU1Tmp; -+ u8 tmpBuf[BTC_TMP_BUF_SHORT]; -+ if (dataLen) -+ PlatformMoveMemory(&tmpBuf[0], pU1Tmp + 1, dataLen); -+ BT_Set8723bAnt(Adapter, dataLen, &tmpBuf[0]); -+ } -+#else -+ ret = _FALSE; -+#endif -+ break; -+ case BTC_SET_BL_BT_LNA_CONSTRAIN_LEVEL: -+ halbtcoutsrc_LnaConstrainLvl(pBtCoexist, pu8); -+ break; -+ case BTC_SET_BL_BT_GOLDEN_RX_RANGE: -+ halbtcoutsrc_SetBtGoldenRxRange(pBtCoexist, (*pU2Tmp & 0xff00) >> 8, (*pU2Tmp & 0xff)); -+ break; -+ case BTC_SET_RESET_COEX_VAR: -+ _rtw_memset(&pBtCoexist->coex_dm, 0x00, sizeof(pBtCoexist->coex_dm)); -+ _rtw_memset(&pBtCoexist->coex_sta, 0x00, sizeof(pBtCoexist->coex_sta)); -+ -+ switch(pBtCoexist->chip_type) { -+#ifdef CONFIG_RTL8822B -+ case BTC_CHIP_RTL8822B: -+ _rtw_memset(&pBtCoexist->coex_dm_8822b_1ant, 0x00, sizeof(pBtCoexist->coex_dm_8822b_1ant)); -+ _rtw_memset(&pBtCoexist->coex_dm_8822b_2ant, 0x00, sizeof(pBtCoexist->coex_dm_8822b_2ant)); -+ _rtw_memset(&pBtCoexist->coex_sta_8822b_1ant, 0x00, sizeof(pBtCoexist->coex_sta_8822b_1ant)); -+ _rtw_memset(&pBtCoexist->coex_sta_8822b_2ant, 0x00, sizeof(pBtCoexist->coex_sta_8822b_2ant)); -+ break; -+#endif -+#ifdef CONFIG_RTL8821C -+ case BTC_CHIP_RTL8821C: -+ _rtw_memset(&pBtCoexist->coex_dm_8821c_1ant, 0x00, sizeof(pBtCoexist->coex_dm_8821c_1ant)); -+ _rtw_memset(&pBtCoexist->coex_dm_8821c_2ant, 0x00, sizeof(pBtCoexist->coex_dm_8821c_2ant)); -+ _rtw_memset(&pBtCoexist->coex_sta_8821c_1ant, 0x00, sizeof(pBtCoexist->coex_sta_8821c_1ant)); -+ _rtw_memset(&pBtCoexist->coex_sta_8821c_2ant, 0x00, sizeof(pBtCoexist->coex_sta_8821c_2ant)); -+ break; -+#endif -+#ifdef CONFIG_RTL8723D -+ case BTC_CHIP_RTL8723D: -+ _rtw_memset(&pBtCoexist->coex_dm_8723d_1ant, 0x00, sizeof(pBtCoexist->coex_dm_8723d_1ant)); -+ _rtw_memset(&pBtCoexist->coex_dm_8723d_2ant, 0x00, sizeof(pBtCoexist->coex_dm_8723d_2ant)); -+ _rtw_memset(&pBtCoexist->coex_sta_8723d_1ant, 0x00, sizeof(pBtCoexist->coex_sta_8723d_1ant)); -+ _rtw_memset(&pBtCoexist->coex_sta_8723d_2ant, 0x00, sizeof(pBtCoexist->coex_sta_8723d_2ant)); -+ break; -+#endif -+ } -+ break; -+ /* ===================== */ -+ default: -+ ret = _FALSE; -+ break; -+ } -+ -+ return result; -+} -+ -+u8 halbtcoutsrc_UnderIps(PBTC_COEXIST pBtCoexist) -+{ -+ PADAPTER padapter; -+ struct pwrctrl_priv *pwrpriv; -+ u8 bMacPwrCtrlOn; -+ -+ padapter = pBtCoexist->Adapter; -+ pwrpriv = &padapter->dvobj->pwrctl_priv; -+ bMacPwrCtrlOn = _FALSE; -+ -+ if ((_TRUE == pwrpriv->bips_processing) -+ && (IPS_NONE != pwrpriv->ips_mode_req) -+ ) -+ return _TRUE; -+ -+ if (rf_off == pwrpriv->rf_pwrstate) -+ return _TRUE; -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if (_FALSE == bMacPwrCtrlOn) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+u8 halbtcoutsrc_UnderLps(PBTC_COEXIST pBtCoexist) -+{ -+ return GLBtcWiFiInLPS; -+} -+ -+u8 halbtcoutsrc_Under32K(PBTC_COEXIST pBtCoexist) -+{ -+ /* todo: the method to check whether wifi is under 32K or not */ -+ return _FALSE; -+} -+ -+void halbtcoutsrc_DisplayCoexStatistics(PBTC_COEXIST pBtCoexist) -+{ -+#if 0 -+ PADAPTER padapter = (PADAPTER)pBtCoexist->Adapter; -+ PBT_MGNT pBtMgnt = &padapter->MgntInfo.BtInfo.BtMgnt; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ u8 *cliBuf = pBtCoexist->cliBuf; -+ u8 i, j; -+ u8 tmpbuf[BTC_TMP_BUF_SHORT]; -+ -+ -+ if (gl_coex_offload.cnt_h2c_sent) { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Coex h2c notify]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = H2c(%d)/Ack(%d)", "Coex h2c/c2h overall statistics", -+ gl_coex_offload.cnt_h2c_sent, gl_coex_offload.cnt_c2h_ack); -+ for (j = 0; j < COL_STATUS_MAX; j++) { -+ if (gl_coex_offload.status[j]) { -+ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.status[j]); -+ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT); -+ } -+ } -+ CL_PRINTF(cliBuf); -+ } -+ for (i = 0; i < COL_OP_WIFI_OPCODE_MAX; i++) { -+ if (gl_coex_offload.h2c_record[i].count) { -+ /*==========================================*/ -+ /* H2C result statistics*/ -+ /*==========================================*/ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = total:%d", coexOpcodeString[i], gl_coex_offload.h2c_record[i].count); -+ for (j = 0; j < COL_STATUS_MAX; j++) { -+ if (gl_coex_offload.h2c_record[i].status[j]) { -+ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.h2c_record[i].status[j]); -+ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT); -+ } -+ } -+ CL_PRINTF(cliBuf); -+ /*==========================================*/ -+ /* H2C/C2H content*/ -+ /*==========================================*/ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = ", "H2C / C2H content"); -+ for (j = 0; j < gl_coex_offload.h2c_record[i].h2c_len; j++) { -+ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, "%02x ", gl_coex_offload.h2c_record[i].h2c_buf[j]); -+ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, 3); -+ } -+ if (gl_coex_offload.h2c_record[i].c2h_ack_len) { -+ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, "/ ", 2); -+ for (j = 0; j < gl_coex_offload.h2c_record[i].c2h_ack_len; j++) { -+ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, "%02x ", gl_coex_offload.h2c_record[i].c2h_ack_buf[j]); -+ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, 3); -+ } -+ } -+ CL_PRINTF(cliBuf); -+ /*==========================================*/ -+ } -+ } -+ -+ if (gl_coex_offload.cnt_c2h_ind) { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Coex c2h indication]============"); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = Ind(%d)", "C2H indication statistics", -+ gl_coex_offload.cnt_c2h_ind); -+ for (j = 0; j < COL_STATUS_MAX; j++) { -+ if (gl_coex_offload.c2h_ind_status[j]) { -+ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.c2h_ind_status[j]); -+ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT); -+ } -+ } -+ CL_PRINTF(cliBuf); -+ } -+ for (i = 0; i < COL_IND_MAX; i++) { -+ if (gl_coex_offload.c2h_ind_record[i].count) { -+ /*==========================================*/ -+ /* H2C result statistics*/ -+ /*==========================================*/ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = total:%d", coexIndTypeString[i], gl_coex_offload.c2h_ind_record[i].count); -+ for (j = 0; j < COL_STATUS_MAX; j++) { -+ if (gl_coex_offload.c2h_ind_record[i].status[j]) { -+ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.c2h_ind_record[i].status[j]); -+ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT); -+ } -+ } -+ CL_PRINTF(cliBuf); -+ /*==========================================*/ -+ /* content*/ -+ /*==========================================*/ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = ", "C2H indication content"); -+ for (j = 0; j < gl_coex_offload.c2h_ind_record[i].ind_len; j++) { -+ CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, "%02x ", gl_coex_offload.c2h_ind_record[i].ind_buf[j]); -+ CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, 3); -+ } -+ CL_PRINTF(cliBuf); -+ /*==========================================*/ -+ } -+ } -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Statistics]============"); -+ CL_PRINTF(cliBuf); -+ -+#if (H2C_USE_IO_THREAD != 1) -+ for (i = 0; i < H2C_STATUS_MAX; i++) { -+ if (pHalData->h2cStatistics[i]) { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s] = %d", "H2C statistics", \ -+ h2cStaString[i], pHalData->h2cStatistics[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+#else -+ for (i = 0; i < IO_STATUS_MAX; i++) { -+ if (Adapter->ioComStr.ioH2cStatistics[i]) { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s] = %d", "H2C statistics", \ -+ ioStaString[i], Adapter->ioComStr.ioH2cStatistics[i]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+#endif -+#if 0 -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "lastHMEBoxNum", \ -+ pHalData->LastHMEBoxNum); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x / 0x%x", "LastOkH2c/FirstFailH2c(fwNotRead)", \ -+ pHalData->lastSuccessH2cEid, pHalData->firstFailedH2cEid); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "c2hIsr/c2hIntr/clr1AF/noRdy/noBuf", \ -+ pHalData->InterruptLog.nIMR_C2HCMD, DBG_Var.c2hInterruptCnt, DBG_Var.c2hClrReadC2hCnt, -+ DBG_Var.c2hNotReadyCnt, DBG_Var.c2hBufAlloFailCnt); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "c2hPacket", \ -+ DBG_Var.c2hPacketCnt); -+ CL_PRINTF(cliBuf); -+#endif -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Periodical/ DbgCtrl", \ -+ pBtCoexist->statistics.cntPeriodical, pBtCoexist->statistics.cntDbgCtrl); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "PowerOn/InitHw/InitCoexDm/RfStatus", \ -+ pBtCoexist->statistics.cntPowerOn, pBtCoexist->statistics.cntInitHwConfig, pBtCoexist->statistics.cntInitCoexDm, -+ pBtCoexist->statistics.cntRfStatusNotify); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "Ips/Lps/Scan/Connect/Mstatus", \ -+ pBtCoexist->statistics.cntIpsNotify, pBtCoexist->statistics.cntLpsNotify, -+ pBtCoexist->statistics.cntScanNotify, pBtCoexist->statistics.cntConnectNotify, -+ pBtCoexist->statistics.cntMediaStatusNotify); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Special pkt/Bt info/ bind", -+ pBtCoexist->statistics.cntSpecialPacketNotify, pBtCoexist->statistics.cntBtInfoNotify, -+ pBtCoexist->statistics.cntBind); -+ CL_PRINTF(cliBuf); -+#endif -+ PADAPTER padapter = pBtCoexist->Adapter; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ u8 *cliBuf = pBtCoexist->cli_buf; -+ -+ if (pHalData->EEPROMBluetoothCoexist == 1) { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Coex Status]============"); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IsBtDisabled", rtw_btcoex_IsBtDisabled(padapter)); -+ CL_PRINTF(cliBuf); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IsBtControlLps", rtw_btcoex_IsBtControlLps(padapter)); -+ CL_PRINTF(cliBuf); -+ } -+} -+ -+void halbtcoutsrc_DisplayBtLinkInfo(PBTC_COEXIST pBtCoexist) -+{ -+#if 0 -+ PADAPTER padapter = (PADAPTER)pBtCoexist->Adapter; -+ PBT_MGNT pBtMgnt = &padapter->MgntInfo.BtInfo.BtMgnt; -+ u8 *cliBuf = pBtCoexist->cliBuf; -+ u8 i; -+ -+ -+ if (pBtCoexist->stack_info.profile_notified) { -+ for (i = 0; i < pBtMgnt->ExtConfig.NumberOfACL; i++) { -+ if (pBtMgnt->ExtConfig.HCIExtensionVer >= 1) { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", "Bt link type/spec/role", \ -+ BtProfileString[pBtMgnt->ExtConfig.aclLink[i].BTProfile], -+ BtSpecString[pBtMgnt->ExtConfig.aclLink[i].BTCoreSpec], -+ BtLinkRoleString[pBtMgnt->ExtConfig.aclLink[i].linkRole]); -+ CL_PRINTF(cliBuf); -+ } else { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s", "Bt link type/spec", \ -+ BtProfileString[pBtMgnt->ExtConfig.aclLink[i].BTProfile], -+ BtSpecString[pBtMgnt->ExtConfig.aclLink[i].BTCoreSpec]); -+ CL_PRINTF(cliBuf); -+ } -+ } -+ } -+#endif -+} -+ -+void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist) -+{ -+ PADAPTER padapter = pBtCoexist->Adapter; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ u8 *cliBuf = pBtCoexist->cli_buf; -+ s32 wifiRssi = 0, btHsRssi = 0; -+ BOOLEAN bScan = _FALSE, bLink = _FALSE, bRoam = _FALSE, bWifiBusy = _FALSE, bWifiUnderBMode = _FALSE; -+ u32 wifiBw = BTC_WIFI_BW_HT20, wifiTrafficDir = BTC_WIFI_TRAFFIC_TX, wifiFreq = BTC_FREQ_2_4G; -+ u32 wifiLinkStatus = 0x0; -+ BOOLEAN bBtHsOn = _FALSE, bLowPower = _FALSE; -+ u8 wifiChnl = 0, wifiP2PChnl = 0, nScanAPNum = 0, FwPSState; -+ u32 iqk_cnt_total = 0, iqk_cnt_ok = 0, iqk_cnt_fail = 0; -+ u16 wifiBcnInterval = 0; -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(padapter); -+ struct btc_wifi_link_info wifi_link_info; -+ -+ wifi_link_info = halbtcoutsrc_getwifilinkinfo(pBtCoexist); -+ -+ switch (wifi_link_info.link_mode) { -+ case BTC_LINK_NONE: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "None", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; -+ break; -+ case BTC_LINK_ONLY_GO: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "ONLY_GO", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; -+ break; -+ case BTC_LINK_ONLY_GC: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "ONLY_GC", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; -+ break; -+ case BTC_LINK_ONLY_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "ONLY_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; -+ break; -+ case BTC_LINK_ONLY_AP: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "ONLY_AP", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; -+ break; -+ case BTC_LINK_2G_MCC_GO_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "24G_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = BTC_FREQ_2_4G; -+ break; -+ case BTC_LINK_5G_MCC_GO_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "5G_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = BTC_FREQ_5G; -+ break; -+ case BTC_LINK_25G_MCC_GO_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "2BANDS_MCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = BTC_FREQ_25G; -+ break; -+ case BTC_LINK_2G_MCC_GC_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "24G_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = BTC_FREQ_2_4G; -+ break; -+ case BTC_LINK_5G_MCC_GC_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "5G_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = BTC_FREQ_5G; -+ break; -+ case BTC_LINK_25G_MCC_GC_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "2BANDS_MCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = BTC_FREQ_25G; -+ break; -+ case BTC_LINK_2G_SCC_GO_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "24G_SCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = BTC_FREQ_2_4G; -+ break; -+ case BTC_LINK_5G_SCC_GO_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "5G_SCC_GO_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = BTC_FREQ_5G; -+ break; -+ case BTC_LINK_2G_SCC_GC_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "24G_SCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = BTC_FREQ_2_4G; -+ break; -+ case BTC_LINK_5G_SCC_GC_STA: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "5G_SCC_GC_STA", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = BTC_FREQ_5G; -+ break; -+ default: -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %d/ %d", "WifiLinkMode/HotSpa/Noa/ClientJoin", -+ "UNKNOWN", wifi_link_info.bhotspot, wifi_link_info.benable_noa, wifi_link_info.bany_client_join_go); -+ wifiFreq = hal->current_channel > 14 ? BTC_FREQ_5G : BTC_FREQ_2_4G; -+ break; -+ } -+ -+ CL_PRINTF(cliBuf); -+ -+ wifiLinkStatus = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "STA/vWifi/HS/p2pGo/p2pGc", -+ ((wifiLinkStatus & WIFI_STA_CONNECTED) ? 1 : 0), ((wifiLinkStatus & WIFI_AP_CONNECTED) ? 1 : 0), -+ ((wifiLinkStatus & WIFI_HS_CONNECTED) ? 1 : 0), ((wifiLinkStatus & WIFI_P2P_GO_CONNECTED) ? 1 : 0), -+ ((wifiLinkStatus & WIFI_P2P_GC_CONNECTED) ? 1 : 0)); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Link/ Roam/ Scan", -+ bLink, bRoam, bScan); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_IQK_TOTAL, &iqk_cnt_total); -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_IQK_OK, &iqk_cnt_ok); -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_IQK_FAIL, &iqk_cnt_fail); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d %s %s", -+ "IQK All/ OK/ Fail/AutoLoad/FWDL", iqk_cnt_total, iqk_cnt_ok, iqk_cnt_fail, -+ ((halbtcoutsrc_is_autoload_fail(pBtCoexist) == _TRUE) ? "fail":"ok"), ((halbtcoutsrc_is_fw_ready(pBtCoexist) == _TRUE) ? "ok":"fail")); -+ CL_PRINTF(cliBuf); -+ -+ if (wifiLinkStatus & WIFI_STA_CONNECTED) { -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ "MAC_FMT"", "IOT Peer/BSSID", GLBtcIotPeerString[padapter->mlmeextpriv.mlmext_info.assoc_AP_vendor], MAC_ARG(get_bssid(&padapter->mlmepriv))); -+ CL_PRINTF(cliBuf); -+ } -+ -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U2_BEACON_PERIOD, &wifiBcnInterval); -+ wifiChnl = wifi_link_info.sta_center_channel; -+ wifiP2PChnl = wifi_link_info.p2p_center_channel; -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dBm/ %d/ %d/ %d", "RSSI/ STA_Chnl/ P2P_Chnl/ BI", -+ wifiRssi-100, wifiChnl, wifiP2PChnl, wifiBcnInterval); -+ CL_PRINTF(cliBuf); -+ -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_AP_NUM, &nScanAPNum); -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s/ %d ", "Band/ BW/ Traffic/ APCnt", -+ GLBtcWifiFreqString[wifiFreq], ((bWifiUnderBMode) ? "11b" : GLBtcWifiBwString[wifiBw]), -+ ((!bWifiBusy) ? "idle" : ((BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ? "uplink" : "downlink")), -+ nScanAPNum); -+ CL_PRINTF(cliBuf); -+ -+ /* power status */ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s%s%s", "Power Status", \ -+ ((halbtcoutsrc_UnderIps(pBtCoexist) == _TRUE) ? "IPS ON" : "IPS OFF"), -+ ((halbtcoutsrc_UnderLps(pBtCoexist) == _TRUE) ? ", LPS ON" : ", LPS OFF"), -+ ((halbtcoutsrc_Under32K(pBtCoexist) == _TRUE) ? ", 32k" : "")); -+ CL_PRINTF(cliBuf); -+ -+ CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x (0x%x/0x%x)", "Power mode cmd(lps/rpwm)", -+ pBtCoexist->pwrModeVal[0], pBtCoexist->pwrModeVal[1], -+ pBtCoexist->pwrModeVal[2], pBtCoexist->pwrModeVal[3], -+ pBtCoexist->pwrModeVal[4], pBtCoexist->pwrModeVal[5], -+ pBtCoexist->bt_info.lps_val, -+ pBtCoexist->bt_info.rpwm_val); -+ CL_PRINTF(cliBuf); -+} -+ -+void halbtcoutsrc_DisplayDbgMsg(void *pBtcContext, u8 dispType) -+{ -+ PBTC_COEXIST pBtCoexist; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ switch (dispType) { -+ case BTC_DBG_DISP_COEX_STATISTICS: -+ halbtcoutsrc_DisplayCoexStatistics(pBtCoexist); -+ break; -+ case BTC_DBG_DISP_BT_LINK_INFO: -+ halbtcoutsrc_DisplayBtLinkInfo(pBtCoexist); -+ break; -+ case BTC_DBG_DISP_WIFI_STATUS: -+ halbtcoutsrc_DisplayWifiStatus(pBtCoexist); -+ break; -+ default: -+ break; -+ } -+} -+ -+/* ************************************ -+ * IO related function -+ * ************************************ */ -+u8 halbtcoutsrc_Read1Byte(void *pBtcContext, u32 RegAddr) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ return rtw_read8(padapter, RegAddr); -+} -+ -+u16 halbtcoutsrc_Read2Byte(void *pBtcContext, u32 RegAddr) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ return rtw_read16(padapter, RegAddr); -+} -+ -+u32 halbtcoutsrc_Read4Byte(void *pBtcContext, u32 RegAddr) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ return rtw_read32(padapter, RegAddr); -+} -+ -+void halbtcoutsrc_Write1Byte(void *pBtcContext, u32 RegAddr, u8 Data) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ rtw_write8(padapter, RegAddr, Data); -+} -+ -+void halbtcoutsrc_BitMaskWrite1Byte(void *pBtcContext, u32 regAddr, u8 bitMask, u8 data1b) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ u8 originalValue, bitShift; -+ u8 i; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ originalValue = 0; -+ bitShift = 0; -+ -+ if (bitMask != 0xff) { -+ originalValue = rtw_read8(padapter, regAddr); -+ -+ for (i = 0; i <= 7; i++) { -+ if ((bitMask >> i) & 0x1) -+ break; -+ } -+ bitShift = i; -+ -+ data1b = (originalValue & ~bitMask) | ((data1b << bitShift) & bitMask); -+ } -+ -+ rtw_write8(padapter, regAddr, data1b); -+} -+ -+void halbtcoutsrc_Write2Byte(void *pBtcContext, u32 RegAddr, u16 Data) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ rtw_write16(padapter, RegAddr, Data); -+} -+ -+void halbtcoutsrc_Write4Byte(void *pBtcContext, u32 RegAddr, u32 Data) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ rtw_write32(padapter, RegAddr, Data); -+} -+ -+void halbtcoutsrc_WriteLocalReg1Byte(void *pBtcContext, u32 RegAddr, u8 Data) -+{ -+ PBTC_COEXIST pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ PADAPTER Adapter = pBtCoexist->Adapter; -+ -+ if (BTC_INTF_SDIO == pBtCoexist->chip_interface) -+ rtw_write8(Adapter, SDIO_LOCAL_BASE | RegAddr, Data); -+ else -+ rtw_write8(Adapter, RegAddr, Data); -+} -+ -+u32 halbtcoutsrc_WaitLIndirectReg_Ready(void *pBtcContext) -+{ -+ PBTC_COEXIST btc = (PBTC_COEXIST)pBtcContext; -+ u32 delay_count = 0, reg = 0; -+ -+ if (!btc->chip_para->lte_indirect_access) -+ return 0; -+ -+ switch (btc->chip_para->indirect_type) { -+ case BTC_INDIRECT_1700: -+ reg = 0x1703; -+ break; -+ case BTC_INDIRECT_7C0: -+ reg = 0x7C3; -+ break; -+ default: -+ return 0; -+ } -+ -+ /* wait for ready bit before access */ -+ while (1) { -+ if ((halbtcoutsrc_Read1Byte(btc, reg) & BIT(5)) == 0) { -+ rtw_mdelay_os(10); -+ if (++delay_count >= 10) -+ break; -+ } else { -+ break; -+ } -+ } -+ -+ return delay_count; -+} -+ -+u32 halbtcoutsrc_ReadLIndirectReg(void *pBtcContext, u16 reg_addr) -+{ -+ PBTC_COEXIST btc = (PBTC_COEXIST)pBtcContext; -+ u32 val = 0; -+ -+ if (!btc->chip_para->lte_indirect_access) -+ return 0; -+ -+ /* wait for ready bit before access */ -+ halbtcoutsrc_WaitLIndirectReg_Ready(btc); -+ -+ switch (btc->chip_para->indirect_type) { -+ case BTC_INDIRECT_1700: -+ halbtcoutsrc_Write4Byte(btc, 0x1700, 0x800F0000 | reg_addr); -+ val = halbtcoutsrc_Read4Byte(btc, 0x1708); /* get read data */ -+ break; -+ case BTC_INDIRECT_7C0: -+ halbtcoutsrc_Write4Byte(btc, 0x7c0, 0x800F0000 | reg_addr); -+ val = halbtcoutsrc_Read4Byte(btc, 0x7c8); /* get read data */ -+ break; -+ } -+ -+ return val; -+} -+ -+void halbtcoutsrc_WriteLIndirectReg(void *pBtcContext, u16 reg_addr, u32 bit_mask, u32 reg_value) -+{ -+ PBTC_COEXIST btc = (PBTC_COEXIST)pBtcContext; -+ u32 val, i = 0, bitpos = 0, reg0, reg1; -+ -+ if (!btc->chip_para->lte_indirect_access) -+ return; -+ -+ if (bit_mask == 0x0) -+ return; -+ -+ switch (btc->chip_para->indirect_type) { -+ case BTC_INDIRECT_1700: -+ reg0 = 0x1700; -+ reg1 = 0x1704; -+ break; -+ case BTC_INDIRECT_7C0: -+ reg0 = 0x7C0; -+ reg1 = 0x7C4; -+ break; -+ default: -+ return; -+ } -+ -+ if (bit_mask == 0xffffffff) { -+ /* wait for ready bit before access 0x1700 */ -+ halbtcoutsrc_WaitLIndirectReg_Ready(btc); -+ -+ /* put write data */ -+ halbtcoutsrc_Write4Byte(btc, reg1, reg_value); -+ halbtcoutsrc_Write4Byte(btc, reg0, 0xc00F0000 | reg_addr); -+ } else { -+ for (i = 0; i <= 31; i++) { -+ if (((bit_mask >> i) & 0x1) == 0x1) { -+ bitpos = i; -+ break; -+ } -+ } -+ -+ /* read back register value before write */ -+ val = halbtcoutsrc_ReadLIndirectReg(btc, reg_addr); -+ val = (val & (~bit_mask)) | (reg_value << bitpos); -+ -+ /* wait for ready bit before access 0x1700 */ -+ halbtcoutsrc_WaitLIndirectReg_Ready(btc); -+ -+ halbtcoutsrc_Write4Byte(btc, reg1, val); /* put write data */ -+ halbtcoutsrc_Write4Byte(btc, reg0, 0xc00F0000 | reg_addr); -+ } -+} -+ -+u16 halbtcoutsrc_Read_scbd(void *pBtcContext, u16* score_board_val) -+{ -+ PBTC_COEXIST btc = (PBTC_COEXIST)pBtcContext; -+ struct btc_coex_sta *coex_sta = &btc->coex_sta; -+ const struct btc_chip_para *chip_para = btc->chip_para; -+ -+ if (!chip_para->scbd_support) -+ return 0; -+ -+ *score_board_val = (btc->btc_read_2byte(btc, chip_para->scbd_reg)) -+ & 0x7fff; -+ coex_sta->score_board_BW = *score_board_val; -+ -+ return coex_sta->score_board_BW; -+} -+ -+u32 halbtcoutsrc_Read_scbd_32bit(void *pBtcContext, u32* score_board_val) -+{ -+ PBTC_COEXIST btc = (PBTC_COEXIST)pBtcContext; -+ struct btc_coex_sta *coex_sta = &btc->coex_sta; -+ const struct btc_chip_para *chip_para = btc->chip_para; -+ -+ if (!chip_para->scbd_support) -+ return 0; -+ -+ *score_board_val = (btc->btc_read_4byte(btc, chip_para->scbd_reg)) -+ & 0x7fffffff; -+ coex_sta->score_board_BW_32bit = *score_board_val; -+ -+ return coex_sta->score_board_BW_32bit; -+} -+ -+void halbtcoutsrc_Write_scbd(void *pBtcContext, u16 bitpos, u8 state) -+{ -+ PBTC_COEXIST btc = (PBTC_COEXIST)pBtcContext; -+ struct btc_coex_sta *coex_sta = &btc->coex_sta; -+ const struct btc_chip_para *chip_para = btc->chip_para; -+ u16 val = 0x2; -+ -+ if (!chip_para->scbd_support) -+ return; -+ -+ val = val | coex_sta->score_board_WB; -+ -+ /* for 8822b, Scoreboard[10]: 0: CQDDR off, 1: CQDDR on -+ * for 8822c, Scoreboard[10]: 0: CQDDR on, 1:CQDDR fix 2M -+ */ -+ if (!btc->chip_para->new_scbd10_def && (bitpos & BTC_SCBD_FIX2M)) { -+ if (state) -+ val = val & (~BTC_SCBD_FIX2M); -+ else -+ val = val | BTC_SCBD_FIX2M; -+ } else { -+ if (state) -+ val = val | bitpos; -+ else -+ val = val & (~bitpos); -+ } -+ -+ if (val != coex_sta->score_board_WB) { -+ coex_sta->score_board_WB = val; -+ val = val | 0x8000; -+ -+ btc->btc_write_2byte(btc, chip_para->scbd_reg, val); -+ -+ RTW_DBG("[BTC], write scoreboard 0x%x\n", val); -+ } else { -+ RTW_DBG("[BTC], return for nochange\n"); -+ } -+} -+ -+void halbtcoutsrc_Write_scbd_32bit(void *pBtcContext, u32 bitpos, u8 state) -+{ -+ PBTC_COEXIST btc = (PBTC_COEXIST)pBtcContext; -+ struct btc_coex_sta *coex_sta = &btc->coex_sta; -+ const struct btc_chip_para *chip_para = btc->chip_para; -+ u32 val = 0x2; -+ -+ if (!chip_para->scbd_support) -+ return; -+ -+ val = val | coex_sta->score_board_WB; -+ -+ /* for 8822b, Scoreboard[10]: 0: CQDDR off, 1: CQDDR on -+ * for 8822c, Scoreboard[10]: 0: CQDDR on, 1:CQDDR fix 2M -+ */ -+ if (!btc->chip_para->new_scbd10_def && (bitpos & BTC_SCBD_FIX2M)) { -+ if (state) -+ val = val & (~BTC_SCBD_FIX2M); -+ else -+ val = val | BTC_SCBD_FIX2M; -+ } else { -+ if (state) -+ val = val | bitpos; -+ else -+ val = val & (~bitpos); -+ } -+ -+ if (val != coex_sta->score_board_WB_32bit) { -+ coex_sta->score_board_WB_32bit = val; -+ val = val | 0x80000000; -+ -+ btc->btc_write_4byte(btc, chip_para->scbd_reg, val); -+ -+ RTW_DBG("[BTC], write scoreboard 0x%x\n", val); -+ } else { -+ RTW_DBG("[BTC], return for nochange\n"); -+ } -+} -+ -+void halbtcoutsrc_SetBbReg(void *pBtcContext, u32 RegAddr, u32 BitMask, u32 Data) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ phy_set_bb_reg(padapter, RegAddr, BitMask, Data); -+} -+ -+ -+u32 halbtcoutsrc_GetBbReg(void *pBtcContext, u32 RegAddr, u32 BitMask) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ return phy_query_bb_reg(padapter, RegAddr, BitMask); -+} -+ -+void halbtcoutsrc_SetRfReg(void *pBtcContext, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ phy_set_rf_reg(padapter, eRFPath, RegAddr, BitMask, Data); -+} -+ -+u32 halbtcoutsrc_GetRfReg(void *pBtcContext, enum rf_path eRFPath, u32 RegAddr, u32 BitMask) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ return phy_query_rf_reg(padapter, eRFPath, RegAddr, BitMask); -+} -+ -+u16 halbtcoutsrc_SetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr, u32 Data) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u16 ret = BT_STATUS_BT_OP_SUCCESS; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ u8 buf[3] = {0}; -+ _irqL irqL; -+ u8 op_code; -+ u8 status; -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ Data = cpu_to_le32(Data); -+ op_code = BT_OP_WRITE_REG_VALUE; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, (u8 *)&Data, 3); -+ if (status != BT_STATUS_BT_OP_SUCCESS) -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ else { -+ buf[0] = RegType; -+ *(u16 *)(buf + 1) = cpu_to_le16((u16)RegAddr); -+ op_code = BT_OP_WRITE_REG_ADDR; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 3); -+ if (status != BT_STATUS_BT_OP_SUCCESS) -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ } -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ } else -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ -+ return ret; -+} -+ -+u8 halbtcoutsrc_SetBtAntDetection(void *pBtcContext, u8 txTime, u8 btChnl) -+{ -+ /* Always return _FALSE since we don't implement this yet */ -+#if 0 -+ PBTC_COEXIST pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ PADAPTER Adapter = pBtCoexist->Adapter; -+ u8 btCanTx = 0; -+ BOOLEAN bStatus = FALSE; -+ -+ bStatus = NDBG_SetBtAntDetection(Adapter, txTime, btChnl, &btCanTx); -+ if (bStatus && btCanTx) -+ return _TRUE; -+ else -+ return _FALSE; -+#else -+ return _FALSE; -+#endif -+} -+ -+u8 halbtcoutsrc_SetBtTRXMASK(void *pBtcContext, u8 bt_trx_mask) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u8 bStatus = _FALSE; -+ u8 btCanTx = 0; -+ u16 ret = BT_STATUS_BT_OP_SUCCESS; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter) || IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter) -+ || IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ u8 buf[3] = {0}; -+ u8 len = 0; -+ _irqL irqL; -+ u8 op_code; -+ u8 status; -+ -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ buf[0] = bt_trx_mask; -+ len = 1; -+ } else { -+ buf[0] = (bt_trx_mask & 0x80) >> 7; -+ buf[1] = bt_trx_mask & 0x7f; -+ len = 2; -+ } -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ op_code = BT_OP_SET_BT_TRX_MASK; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, len); -+ if (status != BT_STATUS_BT_OP_SUCCESS) -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ } else -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ } -+ -+ if (ret == BT_STATUS_BT_OP_SUCCESS) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+u16 halbtcoutsrc_GetBtReg_with_status(void *pBtcContext, u8 RegType, u32 RegAddr, u32 *data) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u16 ret = BT_STATUS_BT_OP_SUCCESS; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ u8 buf[3] = {0}; -+ _irqL irqL; -+ u8 op_code; -+ u8 status; -+ -+ buf[0] = RegType; -+ *(u16 *)(buf + 1) = cpu_to_le16((u16)RegAddr); -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ op_code = BT_OP_READ_REG; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 3); -+ if (status == BT_STATUS_BT_OP_SUCCESS) -+ *data = le16_to_cpu(*(u16 *)GLBtcBtMpRptRsp); -+ else -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ } else -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ -+ return ret; -+} -+ -+u32 halbtcoutsrc_GetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr) -+{ -+ u32 regVal; -+ -+ return (BT_STATUS_BT_OP_SUCCESS == halbtcoutsrc_GetBtReg_with_status(pBtcContext, RegType, RegAddr, ®Val)) ? regVal : 0xffffffff; -+} -+ -+u16 halbtcoutsrc_setbttestmode(void *pBtcContext, u8 Type) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u16 ret = BT_STATUS_BT_OP_SUCCESS; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ _irqL irqL; -+ u8 op_code; -+ u8 status; -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ Type = cpu_to_le32(Type); -+ op_code = BT_OP_SET_BT_TEST_MODE_VAL; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, (u8 *)&Type, 3); -+ if (status != BT_STATUS_BT_OP_SUCCESS) -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ } else -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ -+ return ret; -+ -+} -+ -+ -+void halbtcoutsrc_FillH2cCmd(void *pBtcContext, u8 elementId, u32 cmdLen, u8 *pCmdBuffer) -+{ -+ PBTC_COEXIST pBtCoexist; -+ PADAPTER padapter; -+ s32 ret = 0; -+ -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ padapter = pBtCoexist->Adapter; -+ -+ ret = rtw_hal_fill_h2c_cmd(padapter, elementId, cmdLen, pCmdBuffer); -+ -+#ifdef CONFIG_RTL8192F -+ if (ret == _SUCCESS) { -+ switch (elementId) { -+ case H2C_BT_INFO: -+ case H2C_BT_IGNORE_WLANACT: -+ case H2C_WL_OPMODE: -+ case H2C_BT_MP_OPER: -+ case H2C_BT_CONTROL: -+ rtw_msleep_os(20); -+ break; -+ } -+ } -+#endif -+} -+ -+static void halbtcoutsrc_coex_offload_init(void) -+{ -+ u8 i; -+ -+ gl_coex_offload.h2c_req_num = 0; -+ gl_coex_offload.cnt_h2c_sent = 0; -+ gl_coex_offload.cnt_c2h_ack = 0; -+ gl_coex_offload.cnt_c2h_ind = 0; -+ -+ for (i = 0; i < COL_MAX_H2C_REQ_NUM; i++) -+ init_completion(&gl_coex_offload.c2h_event[i]); -+} -+ -+static COL_H2C_STATUS halbtcoutsrc_send_h2c(PADAPTER Adapter, PCOL_H2C pcol_h2c, u16 h2c_cmd_len) -+{ -+ COL_H2C_STATUS h2c_status = COL_STATUS_C2H_OK; -+ u8 i; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0)) -+ reinit_completion(&gl_coex_offload.c2h_event[pcol_h2c->req_num]); /* set event to un signaled state */ -+#else -+ INIT_COMPLETION(gl_coex_offload.c2h_event[pcol_h2c->req_num]); -+#endif -+ -+ if (TRUE) { -+#if 0 /*(USE_HAL_MAC_API == 1) */ -+ if (RT_STATUS_SUCCESS == HAL_MAC_Send_BT_COEX(&GET_HAL_MAC_INFO(Adapter), (u8 *)(pcol_h2c), (u32)h2c_cmd_len, 1)) { -+ if (!wait_for_completion_timeout(&gl_coex_offload.c2h_event[pcol_h2c->req_num], 20)) { -+ h2c_status = COL_STATUS_H2C_TIMTOUT; -+ } -+ } else { -+ h2c_status = COL_STATUS_H2C_HALMAC_FAIL; -+ } -+#endif -+ } -+ -+ return h2c_status; -+} -+ -+static COL_H2C_STATUS halbtcoutsrc_check_c2h_ack(PADAPTER Adapter, PCOL_SINGLE_H2C_RECORD pH2cRecord) -+{ -+ COL_H2C_STATUS c2h_status = COL_STATUS_C2H_OK; -+ PCOL_H2C p_h2c_cmd = (PCOL_H2C)&pH2cRecord->h2c_buf[0]; -+ u8 req_num = p_h2c_cmd->req_num; -+ PCOL_C2H_ACK p_c2h_ack = (PCOL_C2H_ACK)&gl_coex_offload.c2h_ack_buf[req_num]; -+ -+ -+ if ((COL_C2H_ACK_HDR_LEN + p_c2h_ack->ret_len) > gl_coex_offload.c2h_ack_len[req_num]) { -+ c2h_status = COL_STATUS_COEX_DATA_OVERFLOW; -+ return c2h_status; -+ } -+ /* else */ -+ { -+ _rtw_memmove(&pH2cRecord->c2h_ack_buf[0], &gl_coex_offload.c2h_ack_buf[req_num], gl_coex_offload.c2h_ack_len[req_num]); -+ pH2cRecord->c2h_ack_len = gl_coex_offload.c2h_ack_len[req_num]; -+ } -+ -+ -+ if (p_c2h_ack->req_num != p_h2c_cmd->req_num) { -+ c2h_status = COL_STATUS_C2H_REQ_NUM_MISMATCH; -+ } else if (p_c2h_ack->opcode_ver != p_h2c_cmd->opcode_ver) { -+ c2h_status = COL_STATUS_C2H_OPCODE_VER_MISMATCH; -+ } else { -+ c2h_status = p_c2h_ack->status; -+ } -+ -+ return c2h_status; -+} -+ -+COL_H2C_STATUS halbtcoutsrc_CoexH2cProcess(void *pBtCoexist, -+ u8 opcode, u8 opcode_ver, u8 *ph2c_par, u8 h2c_par_len) -+{ -+ PADAPTER Adapter = ((struct btc_coexist *)pBtCoexist)->Adapter; -+ u8 H2C_Parameter[BTC_TMP_BUF_SHORT] = {0}; -+ PCOL_H2C pcol_h2c = (PCOL_H2C)&H2C_Parameter[0]; -+ u16 paraLen = 0; -+ COL_H2C_STATUS h2c_status = COL_STATUS_C2H_OK, c2h_status = COL_STATUS_C2H_OK; -+ COL_H2C_STATUS ret_status = COL_STATUS_C2H_OK; -+ u16 i, col_h2c_len = 0; -+ -+ pcol_h2c->opcode = opcode; -+ pcol_h2c->opcode_ver = opcode_ver; -+ pcol_h2c->req_num = gl_coex_offload.h2c_req_num; -+ gl_coex_offload.h2c_req_num++; -+ gl_coex_offload.h2c_req_num %= 16; -+ -+ _rtw_memmove(&pcol_h2c->buf[0], ph2c_par, h2c_par_len); -+ -+ -+ col_h2c_len = h2c_par_len + 2; /* 2=sizeof(OPCode, OPCode_version and Request number) */ -+ BT_PrintData(Adapter, "[COL], H2C cmd: ", col_h2c_len, H2C_Parameter); -+ -+ gl_coex_offload.cnt_h2c_sent++; -+ -+ gl_coex_offload.h2c_record[opcode].count++; -+ gl_coex_offload.h2c_record[opcode].h2c_len = col_h2c_len; -+ _rtw_memmove((void *)&gl_coex_offload.h2c_record[opcode].h2c_buf[0], (void *)pcol_h2c, col_h2c_len); -+ -+ h2c_status = halbtcoutsrc_send_h2c(Adapter, pcol_h2c, col_h2c_len); -+ -+ gl_coex_offload.h2c_record[opcode].c2h_ack_len = 0; -+ -+ if (COL_STATUS_C2H_OK == h2c_status) { -+ /* if reach here, it means H2C get the correct c2h response, */ -+ c2h_status = halbtcoutsrc_check_c2h_ack(Adapter, &gl_coex_offload.h2c_record[opcode]); -+ ret_status = c2h_status; -+ } else { -+ /* check h2c status error, return error status code to upper layer. */ -+ ret_status = h2c_status; -+ } -+ gl_coex_offload.h2c_record[opcode].status[ret_status]++; -+ gl_coex_offload.status[ret_status]++; -+ -+ return ret_status; -+} -+ -+u8 halbtcoutsrc_GetAntDetValFromBt(void *pBtcContext) -+{ -+ /* Always return 0 since we don't implement this yet */ -+#if 0 -+ struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; -+ PADAPTER Adapter = pBtCoexist->Adapter; -+ u8 AntDetVal = 0x0; -+ u8 opcodeVer = 1; -+ BOOLEAN status = false; -+ -+ status = NDBG_GetAntDetValFromBt(Adapter, opcodeVer, &AntDetVal); -+ -+ RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$ halbtcoutsrc_GetAntDetValFromBt(): status = %d, feature = %x\n", status, AntDetVal)); -+ -+ return AntDetVal; -+#else -+ return 0; -+#endif -+} -+ -+u8 halbtcoutsrc_GetBleScanTypeFromBt(void *pBtcContext) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u32 ret = BT_STATUS_BT_OP_SUCCESS; -+ u8 data = 0; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ u8 buf[3] = {0}; -+ _irqL irqL; -+ u8 op_code; -+ u8 status; -+ -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ op_code = BT_OP_GET_BT_BLE_SCAN_TYPE; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0); -+ if (status == BT_STATUS_BT_OP_SUCCESS) -+ data = *(u8 *)GLBtcBtMpRptRsp; -+ else -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ } else -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ -+ return data; -+} -+ -+u32 halbtcoutsrc_GetBleScanParaFromBt(void *pBtcContext, u8 scanType) -+{ -+ PBTC_COEXIST pBtCoexist; -+ u32 ret = BT_STATUS_BT_OP_SUCCESS; -+ u32 data = 0; -+ -+ pBtCoexist = (PBTC_COEXIST)pBtcContext; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _TRUE) { -+ u8 buf[3] = {0}; -+ _irqL irqL; -+ u8 op_code; -+ u8 status; -+ -+ buf[0] = scanType; -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ op_code = BT_OP_GET_BT_BLE_SCAN_PARA; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 1); -+ if (status == BT_STATUS_BT_OP_SUCCESS) -+ data = le32_to_cpu(*(u32 *)GLBtcBtMpRptRsp); -+ else -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ } else -+ ret = BT_STATUS_NOT_IMPLEMENT; -+ -+ return data; -+} -+ -+u8 halbtcoutsrc_GetBtAFHMapFromBt(void *pBtcContext, u8 mapType, u8 *afhMap) -+{ -+ struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; -+ u8 buf[2] = {0}; -+ _irqL irqL; -+ u8 op_code; -+ u32 *AfhMapL = (u32 *)&(afhMap[0]); -+ u32 *AfhMapM = (u32 *)&(afhMap[4]); -+ u16 *AfhMapH = (u16 *)&(afhMap[8]); -+ u8 status; -+ u32 ret = BT_STATUS_BT_OP_SUCCESS; -+ -+ if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _FALSE) -+ return _FALSE; -+ -+ buf[0] = 0; -+ buf[1] = mapType; -+ -+ _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ op_code = BT_LO_OP_GET_AFH_MAP_L; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0); -+ if (status == BT_STATUS_BT_OP_SUCCESS) -+ *AfhMapL = le32_to_cpu(*(u32 *)GLBtcBtMpRptRsp); -+ else { -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ goto exit; -+ } -+ -+ op_code = BT_LO_OP_GET_AFH_MAP_M; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0); -+ if (status == BT_STATUS_BT_OP_SUCCESS) -+ *AfhMapM = le32_to_cpu(*(u32 *)GLBtcBtMpRptRsp); -+ else { -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ goto exit; -+ } -+ -+ op_code = BT_LO_OP_GET_AFH_MAP_H; -+ status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0); -+ if (status == BT_STATUS_BT_OP_SUCCESS) -+ *AfhMapH = le16_to_cpu(*(u16 *)GLBtcBtMpRptRsp); -+ else { -+ ret = SET_BT_MP_OPER_RET(op_code, status); -+ goto exit; -+ } -+ -+exit: -+ -+ _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); -+ -+ return (ret == BT_STATUS_BT_OP_SUCCESS) ? _TRUE : _FALSE; -+} -+ -+u8 halbtcoutsrc_SetTimer(void *pBtcContext, u32 type, u32 val) -+{ -+ struct btc_coexist *pBtCoexist=(struct btc_coexist *)pBtcContext; -+ -+ if (type >= BTC_TIMER_MAX) -+ return _FALSE; -+ -+ pBtCoexist->coex_sta.cnt_timer[type] = val; -+ -+ RTW_DBG("[BTC], Set Timer: type = %d, val = %d\n", type, val); -+ -+ return _TRUE; -+} -+ -+u32 halbtcoutsrc_SetAtomic (void *btc_ctx, u32 *target, u32 val) -+{ -+ *target = val; -+ return _SUCCESS; -+} -+ -+void halbtcoutsrc_phydm_modify_AntDiv_HwSw(void *pBtcContext, u8 is_hw) -+{ -+ /* empty function since we don't need it */ -+} -+ -+void halbtcoutsrc_phydm_modify_RA_PCR_threshold(void *pBtcContext, u8 RA_offset_direction, u8 RA_threshold_offset) -+{ -+ struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; -+ -+/* switch to #if 0 in case the phydm version does not provide the function */ -+#if 1 -+ phydm_modify_RA_PCR_threshold(pBtCoexist->odm_priv, RA_offset_direction, RA_threshold_offset); -+#endif -+} -+ -+u32 halbtcoutsrc_phydm_query_PHY_counter(void *pBtcContext, u8 info_type) -+{ -+ struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; -+ -+/* switch to #if 0 in case the phydm version does not provide the function */ -+#if 1 -+ return phydm_cmn_info_query((struct dm_struct *)pBtCoexist->odm_priv, (enum phydm_info_query)info_type); -+#else -+ return 0; -+#endif -+} -+ -+void halbtcoutsrc_reduce_wl_tx_power(void *pBtcContext, s8 tx_power) -+{ -+ struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA((PADAPTER)pBtCoexist->Adapter); -+ -+ /* The reduction of wl tx pwr should be processed inside the set tx pwr lvl function */ -+ if (IS_HARDWARE_TYPE_8822C(pBtCoexist->Adapter) || IS_HARDWARE_TYPE_8723F(pBtCoexist->Adapter)) -+ rtw_hal_set_tx_power_level(pBtCoexist->Adapter, pHalData->current_channel); -+} -+ -+#if 0 -+static void BT_CoexOffloadRecordErrC2hAck(PADAPTER Adapter) -+{ -+ PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); -+ -+ if (pDefaultAdapter != Adapter) -+ return; -+ -+ if (!hal_btcoex_IsBtExist(Adapter)) -+ return; -+ -+ gl_coex_offload.cnt_c2h_ack++; -+ -+ gl_coex_offload.status[COL_STATUS_INVALID_C2H_LEN]++; -+} -+ -+static void BT_CoexOffloadC2hAckCheck(PADAPTER Adapter, u8 *tmpBuf, u8 length) -+{ -+ PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); -+ PCOL_C2H_ACK p_c2h_ack = NULL; -+ u8 req_num = 0xff; -+ -+ if (pDefaultAdapter != Adapter) -+ return; -+ -+ if (!hal_btcoex_IsBtExist(Adapter)) -+ return; -+ -+ gl_coex_offload.cnt_c2h_ack++; -+ -+ if (length < COL_C2H_ACK_HDR_LEN) { /* c2h ack length must >= 3 (status, opcode_ver, req_num and ret_len) */ -+ gl_coex_offload.status[COL_STATUS_INVALID_C2H_LEN]++; -+ } else { -+ BT_PrintData(Adapter, "[COL], c2h ack:", length, tmpBuf); -+ -+ p_c2h_ack = (PCOL_C2H_ACK)tmpBuf; -+ req_num = p_c2h_ack->req_num; -+ -+ _rtw_memmove(&gl_coex_offload.c2h_ack_buf[req_num][0], tmpBuf, length); -+ gl_coex_offload.c2h_ack_len[req_num] = length; -+ -+ complete(&gl_coex_offload.c2h_event[req_num]); -+ } -+} -+ -+static void BT_CoexOffloadC2hIndCheck(PADAPTER Adapter, u8 *tmpBuf, u8 length) -+{ -+ PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); -+ PCOL_C2H_IND p_c2h_ind = NULL; -+ u8 ind_type = 0, ind_version = 0, ind_length = 0; -+ -+ if (pDefaultAdapter != Adapter) -+ return; -+ -+ if (!hal_btcoex_IsBtExist(Adapter)) -+ return; -+ -+ gl_coex_offload.cnt_c2h_ind++; -+ -+ if (length < COL_C2H_IND_HDR_LEN) { /* c2h indication length must >= 3 (type, version and length) */ -+ gl_coex_offload.c2h_ind_status[COL_STATUS_INVALID_C2H_LEN]++; -+ } else { -+ BT_PrintData(Adapter, "[COL], c2h indication:", length, tmpBuf); -+ -+ p_c2h_ind = (PCOL_C2H_IND)tmpBuf; -+ ind_type = p_c2h_ind->type; -+ ind_version = p_c2h_ind->version; -+ ind_length = p_c2h_ind->length; -+ -+ _rtw_memmove(&gl_coex_offload.c2h_ind_buf[0], tmpBuf, length); -+ gl_coex_offload.c2h_ind_len = length; -+ -+ /* log */ -+ gl_coex_offload.c2h_ind_record[ind_type].count++; -+ gl_coex_offload.c2h_ind_record[ind_type].status[COL_STATUS_C2H_OK]++; -+ _rtw_memmove(&gl_coex_offload.c2h_ind_record[ind_type].ind_buf[0], tmpBuf, length); -+ gl_coex_offload.c2h_ind_record[ind_type].ind_len = length; -+ -+ gl_coex_offload.c2h_ind_status[COL_STATUS_C2H_OK]++; -+ /*TODO: need to check c2h indication length*/ -+ /* TODO: Notification */ -+ } -+} -+ -+void BT_CoexOffloadC2hCheck(PADAPTER Adapter, u8 *Buffer, u8 Length) -+{ -+#if 0 /*(USE_HAL_MAC_API == 1)*/ -+ u8 c2hSubCmdId = 0, c2hAckLen = 0, h2cCmdId = 0, h2cSubCmdId = 0, c2hIndLen = 0; -+ -+ BT_PrintData(Adapter, "[COL], c2h packet:", Length - 2, Buffer + 2); -+ c2hSubCmdId = (u8)C2H_HDR_GET_C2H_SUB_CMD_ID(Buffer); -+ -+ if (c2hSubCmdId == C2H_SUB_CMD_ID_H2C_ACK_HDR || -+ c2hSubCmdId == C2H_SUB_CMD_ID_BT_COEX_INFO) { -+ if (c2hSubCmdId == C2H_SUB_CMD_ID_H2C_ACK_HDR) { -+ /* coex c2h ack */ -+ h2cCmdId = (u8)H2C_ACK_HDR_GET_H2C_CMD_ID(Buffer); -+ h2cSubCmdId = (u8)H2C_ACK_HDR_GET_H2C_SUB_CMD_ID(Buffer); -+ if (h2cCmdId == 0xff && h2cSubCmdId == 0x60) { -+ c2hAckLen = (u8)C2H_HDR_GET_LEN(Buffer); -+ if (c2hAckLen >= 8) -+ BT_CoexOffloadC2hAckCheck(Adapter, &Buffer[12], (u8)(c2hAckLen - 8)); -+ else -+ BT_CoexOffloadRecordErrC2hAck(Adapter); -+ } -+ } else if (c2hSubCmdId == C2H_SUB_CMD_ID_BT_COEX_INFO) { -+ /* coex c2h indication */ -+ c2hIndLen = (u8)C2H_HDR_GET_LEN(Buffer); -+ BT_CoexOffloadC2hIndCheck(Adapter, &Buffer[4], (u8)c2hIndLen); -+ } -+ } -+#endif -+} -+#endif -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+static void halbtcoutsrc_wl_noisy_detect(struct btc_coexist *btc) -+{ -+ struct btc_coex_sta *coex_sta = &btc->coex_sta; -+ u32 cnt_cck, ok_11b, err_11b; -+ -+ ok_11b = btc->btc_phydm_query_PHY_counter(btc, PHYDM_INFO_CRC32_OK_CCK); -+ err_11b = btc->btc_phydm_query_PHY_counter(btc, -+ PHYDM_INFO_CRC32_ERROR_CCK); -+ -+ /* WiFi environment noisy identification */ -+ cnt_cck = ok_11b + err_11b; -+ -+ if (!coex_sta->wl_gl_busy && !coex_sta->wl_cck_lock) { -+ if (cnt_cck > 250) { -+ if (coex_sta->cnt_wl[BTC_CNT_WL_NOISY2] < 5) -+ coex_sta->cnt_wl[BTC_CNT_WL_NOISY2]++; -+ -+ if (coex_sta->cnt_wl[BTC_CNT_WL_NOISY2] == 5) { -+ coex_sta->cnt_wl[BTC_CNT_WL_NOISY0] = 0; -+ coex_sta->cnt_wl[BTC_CNT_WL_NOISY1] = 0; -+ } -+ } else if (cnt_cck < 100) { -+ if (coex_sta->cnt_wl[BTC_CNT_WL_NOISY0] < 5) -+ coex_sta->cnt_wl[BTC_CNT_WL_NOISY0]++; -+ -+ if (coex_sta->cnt_wl[BTC_CNT_WL_NOISY0] == 5) { -+ coex_sta->cnt_wl[BTC_CNT_WL_NOISY1] = 0; -+ coex_sta->cnt_wl[BTC_CNT_WL_NOISY2] = 0; -+ } -+ } else { -+ if (coex_sta->cnt_wl[BTC_CNT_WL_NOISY1] < 5) -+ coex_sta->cnt_wl[BTC_CNT_WL_NOISY1]++; -+ -+ if (coex_sta->cnt_wl[BTC_CNT_WL_NOISY1] == 5) { -+ coex_sta->cnt_wl[BTC_CNT_WL_NOISY0] = 0; -+ coex_sta->cnt_wl[BTC_CNT_WL_NOISY2] = 0; -+ } -+ } -+ -+ if (coex_sta->cnt_wl[BTC_CNT_WL_NOISY2] == 5) -+ coex_sta->wl_noisy_level = 2; -+ else if (coex_sta->cnt_wl[BTC_CNT_WL_NOISY1] == 5) -+ coex_sta->wl_noisy_level = 1; -+ else -+ coex_sta->wl_noisy_level = 0; -+ -+ RTW_DBG("[BTC], wl_noisy_level = %d\n", -+ coex_sta->wl_noisy_level); -+ } -+} -+ -+static boolean halbtcoutsrc_btc_monitor_bt_ctr(struct btc_coexist *btc) -+{ -+ struct btc_coex_sta *coex_sta = &btc->coex_sta; -+ struct btc_coex_dm *coex_dm = &btc->coex_dm; -+ u32 cnt_bt_hi_pri, cnt_bt_lo_pri, cnt_bt_all; -+ boolean is_run_coex = _FALSE; -+ -+ cnt_bt_hi_pri = btc->btc_read_4byte(btc, REG_BT_ACT_STATISTICS); -+ coex_sta->hi_pri_tx = cnt_bt_hi_pri & MASKLWORD; -+ coex_sta->hi_pri_rx = (cnt_bt_hi_pri & MASKHWORD) >> 16; -+ -+ cnt_bt_lo_pri = btc->btc_read_4byte(btc, REG_BT_ACT_STATISTICS_1); -+ coex_sta->lo_pri_tx = cnt_bt_lo_pri & MASKLWORD; -+ coex_sta->lo_pri_rx = (cnt_bt_lo_pri & MASKHWORD) >> 16; -+ -+ RTW_DBG("[BTC], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", -+ coex_sta->hi_pri_rx, coex_sta->hi_pri_tx, -+ coex_sta->lo_pri_rx, coex_sta->lo_pri_tx); -+ -+ /* reset counter */ -+ btc->btc_write_1byte(btc, 0x76e, 0xc); -+ -+ if (coex_sta->wl_under_lps || coex_sta->wl_under_ips || -+ (coex_sta->hi_pri_rx == 65535 && coex_sta->hi_pri_tx == 65535 && -+ coex_sta->lo_pri_rx == 65535 && coex_sta->lo_pri_tx == 65535)) -+ coex_sta->bt_ctr_ok = _FALSE; -+ else -+ coex_sta->bt_ctr_ok = _TRUE; -+ -+ if (!coex_sta->bt_ctr_ok) -+ return _FALSE; -+ -+ if (coex_sta->hi_pri_rx == 0 && coex_sta->hi_pri_tx == 0 && -+ coex_sta->lo_pri_rx == 0 && coex_sta->lo_pri_tx == 0) { -+ coex_sta->cnt_bt[BTC_CNT_BT_DISABLE]++; -+ -+ if (coex_sta->cnt_bt[BTC_CNT_BT_DISABLE] > 2) -+ coex_sta->cnt_bt[BTC_CNT_BT_DISABLE] = 2; -+ } else { -+ coex_sta->cnt_bt[BTC_CNT_BT_DISABLE] = 0; -+ } -+ -+ cnt_bt_all = coex_sta->hi_pri_rx + coex_sta->hi_pri_tx + -+ coex_sta->lo_pri_rx + coex_sta->lo_pri_tx; -+ -+ if ((coex_sta->cnt_bt[BTC_CNT_BT_TRX] > (cnt_bt_all + 50) || -+ cnt_bt_all > (coex_sta->cnt_bt[BTC_CNT_BT_TRX] + 50)) && -+ coex_dm->bt_status == BTC_BTSTATUS_NCON_IDLE) -+ is_run_coex = _TRUE; -+ -+ coex_sta->cnt_bt[BTC_CNT_BT_TRX] = cnt_bt_all; -+ -+ return is_run_coex; -+} -+#endif -+ -+/* ************************************ -+ * Extern functions called by other module -+ * ************************************ */ -+u8 EXhalbtcoutsrc_BindBtCoexWithAdapter(void *padapter) -+{ -+ PBTC_COEXIST pBtCoexist = &GLBtCoexist; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA((PADAPTER)padapter); -+ -+ if (pBtCoexist->bBinded) -+ return _FALSE; -+ else -+ pBtCoexist->bBinded = _TRUE; -+ -+ pBtCoexist->statistics.cnt_bind++; -+ -+ pBtCoexist->Adapter = padapter; -+ pBtCoexist->odm_priv = (void *)&(pHalData->odmpriv); -+ -+ pBtCoexist->stack_info.profile_notified = _FALSE; -+ -+ pBtCoexist->bt_info.bt_ctrl_agg_buf_size = _FALSE; -+ pBtCoexist->bt_info.agg_buf_size = 5; -+ -+ pBtCoexist->bt_info.increase_scan_dev_num = _FALSE; -+ pBtCoexist->bt_info.miracast_plus_bt = _FALSE; -+ -+ /* for btc common architecture, inform chip type to coex. mechanism */ -+ if(IS_HARDWARE_TYPE_8822C(padapter)) { -+#ifdef CONFIG_RTL8822C -+ pBtCoexist->chip_type = BTC_CHIP_RTL8822C; -+ pBtCoexist->chip_para = &btc_chip_para_8822c; -+#endif -+ } -+#ifdef CONFIG_RTL8192F -+ else if (IS_HARDWARE_TYPE_8192F(padapter)) { -+ pBtCoexist->chip_type = BTC_CHIP_RTL8725A; -+ pBtCoexist->chip_para = &btc_chip_para_8192f; -+ } -+#endif -+#ifdef PLATFORM_LINUX -+#ifdef CONFIG_RTL8723F -+ else if (IS_HARDWARE_TYPE_8723F(padapter)) { -+ pBtCoexist->chip_type = BTC_CHIP_RTL8723F; -+ pBtCoexist->chip_para = &btc_chip_para_8723f; -+ } -+#endif -+#endif -+ else { -+ pBtCoexist->chip_type = BTC_CHIP_UNDEF; -+ pBtCoexist->chip_para = NULL; -+ } -+ -+ return _TRUE; -+} -+ -+void EXhalbtcoutsrc_AntInfoSetting(void *padapter) -+{ -+ PBTC_COEXIST pBtCoexist = &GLBtCoexist; -+ u8 antNum = 1, singleAntPath = 0; -+ -+ antNum = rtw_btcoex_get_pg_ant_num((PADAPTER)padapter); -+ EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_PG, antNum); -+ -+ if (antNum == 1) { -+ singleAntPath = rtw_btcoex_get_pg_single_ant_path((PADAPTER)padapter); -+ EXhalbtcoutsrc_SetSingleAntPath(singleAntPath); -+ } -+ -+ pBtCoexist->board_info.customerID = RT_CID_DEFAULT; -+ pBtCoexist->board_info.customer_id = RT_CID_DEFAULT; -+ -+ /* set default antenna position to main port */ -+ pBtCoexist->board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; -+ -+ pBtCoexist->board_info.btdm_ant_det_finish = _FALSE; -+ pBtCoexist->board_info.btdm_ant_num_by_ant_det = 1; -+ -+ pBtCoexist->board_info.tfbga_package = rtw_btcoex_is_tfbga_package_type((PADAPTER)padapter); -+ -+ pBtCoexist->board_info.rfe_type = rtw_btcoex_get_pg_rfe_type((PADAPTER)padapter); -+ -+ pBtCoexist->board_info.ant_div_cfg = rtw_btcoex_get_ant_div_cfg((PADAPTER)padapter); -+ -+ pBtCoexist->board_info.ant_distance = 10; -+} -+ -+u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) -+{ -+ PBTC_COEXIST pBtCoexist = &GLBtCoexist; -+ -+ /* pBtCoexist->statistics.cntBind++; */ -+ -+ halbtcoutsrc_DbgInit(); -+ -+ halbtcoutsrc_coex_offload_init(); -+ -+#ifdef CONFIG_PCI_HCI -+ pBtCoexist->chip_interface = BTC_INTF_PCI; -+#elif defined(CONFIG_USB_HCI) -+ pBtCoexist->chip_interface = BTC_INTF_USB; -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pBtCoexist->chip_interface = BTC_INTF_SDIO; -+#else -+ pBtCoexist->chip_interface = BTC_INTF_UNKNOWN; -+#endif -+ -+ EXhalbtcoutsrc_BindBtCoexWithAdapter(padapter); -+ -+ pBtCoexist->btc_read_1byte = halbtcoutsrc_Read1Byte; -+ pBtCoexist->btc_write_1byte = halbtcoutsrc_Write1Byte; -+ pBtCoexist->btc_write_1byte_bitmask = halbtcoutsrc_BitMaskWrite1Byte; -+ pBtCoexist->btc_read_2byte = halbtcoutsrc_Read2Byte; -+ pBtCoexist->btc_write_2byte = halbtcoutsrc_Write2Byte; -+ pBtCoexist->btc_read_4byte = halbtcoutsrc_Read4Byte; -+ pBtCoexist->btc_write_4byte = halbtcoutsrc_Write4Byte; -+ pBtCoexist->btc_write_local_reg_1byte = halbtcoutsrc_WriteLocalReg1Byte; -+ -+ pBtCoexist->btc_read_linderct = halbtcoutsrc_ReadLIndirectReg; -+ pBtCoexist->btc_write_linderct = halbtcoutsrc_WriteLIndirectReg; -+ -+ pBtCoexist->btc_read_scbd = halbtcoutsrc_Read_scbd; -+ pBtCoexist->btc_read_scbd_32bit = halbtcoutsrc_Read_scbd_32bit; -+ pBtCoexist->btc_write_scbd = halbtcoutsrc_Write_scbd; -+ pBtCoexist->btc_write_scbd_32bit = halbtcoutsrc_Write_scbd_32bit; -+ -+ pBtCoexist->btc_set_bb_reg = halbtcoutsrc_SetBbReg; -+ pBtCoexist->btc_get_bb_reg = halbtcoutsrc_GetBbReg; -+ -+ pBtCoexist->btc_set_rf_reg = halbtcoutsrc_SetRfReg; -+ pBtCoexist->btc_get_rf_reg = halbtcoutsrc_GetRfReg; -+ -+ pBtCoexist->btc_fill_h2c = halbtcoutsrc_FillH2cCmd; -+ pBtCoexist->btc_disp_dbg_msg = halbtcoutsrc_DisplayDbgMsg; -+ -+ pBtCoexist->btc_get = halbtcoutsrc_Get; -+ pBtCoexist->btc_set = halbtcoutsrc_Set; -+ pBtCoexist->btc_get_bt_reg = halbtcoutsrc_GetBtReg; -+ pBtCoexist->btc_set_bt_reg = halbtcoutsrc_SetBtReg; -+ pBtCoexist->btc_set_bt_ant_detection = halbtcoutsrc_SetBtAntDetection; -+ pBtCoexist->btc_set_bt_trx_mask = halbtcoutsrc_SetBtTRXMASK; -+ pBtCoexist->btc_coex_h2c_process = halbtcoutsrc_CoexH2cProcess; -+ pBtCoexist->btc_get_bt_coex_supported_feature = halbtcoutsrc_GetBtCoexSupportedFeature; -+ pBtCoexist->btc_get_bt_coex_supported_version= halbtcoutsrc_GetBtCoexSupportedVersion; -+ pBtCoexist->btc_get_ant_det_val_from_bt = halbtcoutsrc_GetAntDetValFromBt; -+ pBtCoexist->btc_get_ble_scan_type_from_bt = halbtcoutsrc_GetBleScanTypeFromBt; -+ pBtCoexist->btc_get_ble_scan_para_from_bt = halbtcoutsrc_GetBleScanParaFromBt; -+ pBtCoexist->btc_get_bt_afh_map_from_bt = halbtcoutsrc_GetBtAFHMapFromBt; -+ pBtCoexist->btc_get_bt_phydm_version = halbtcoutsrc_GetPhydmVersion; -+ pBtCoexist->btc_set_timer = halbtcoutsrc_SetTimer; -+ pBtCoexist->btc_set_atomic= halbtcoutsrc_SetAtomic; -+ pBtCoexist->btc_phydm_modify_RA_PCR_threshold = halbtcoutsrc_phydm_modify_RA_PCR_threshold; -+ pBtCoexist->btc_phydm_query_PHY_counter = halbtcoutsrc_phydm_query_PHY_counter; -+ pBtCoexist->btc_reduce_wl_tx_power = halbtcoutsrc_reduce_wl_tx_power; -+ pBtCoexist->btc_phydm_modify_antdiv_hwsw = halbtcoutsrc_phydm_modify_AntDiv_HwSw; -+ -+ pBtCoexist->cli_buf = &GLBtcDbgBuf[0]; -+ -+ GLBtcWiFiInScanState = _FALSE; -+ -+ GLBtcWiFiInIQKState = _FALSE; -+ -+ GLBtcWiFiInIPS = _FALSE; -+ -+ GLBtcWiFiInLPS = _FALSE; -+ -+ GLBtcBtCoexAliveRegistered = _FALSE; -+ -+ /* BT Control H2C/C2H*/ -+ GLBtcBtMpOperSeq = 0; -+ _rtw_mutex_init(&GLBtcBtMpOperLock); -+ rtw_init_timer(&GLBtcBtMpOperTimer, padapter, _btmpoper_timer_hdl, pBtCoexist); -+ _rtw_init_sema(&GLBtcBtMpRptSema, 0); -+ GLBtcBtMpRptSeq = 0; -+ GLBtcBtMpRptStatus = 0; -+ _rtw_memset(GLBtcBtMpRptRsp, 0, C2H_MAX_SIZE); -+ GLBtcBtMpRptRspSize = 0; -+ GLBtcBtMpRptWait = _FALSE; -+ GLBtcBtMpRptWiFiOK = _FALSE; -+ GLBtcBtMpRptBTOK = _FALSE; -+ -+ return _TRUE; -+} -+ -+void EXhalbtcoutsrc_PowerOnSetting(PBTC_COEXIST pBtCoexist) -+{ -+ HAL_DATA_TYPE *pHalData = NULL; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pHalData = GET_HAL_DATA((PADAPTER)pBtCoexist->Adapter); -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_power_on_setting(pBtCoexist); -+ -+#else -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8723B -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_power_on_setting(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_power_on_setting(pBtCoexist); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_power_on_setting(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_power_on_setting(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_power_on_setting(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821A -+ else if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_power_on_setting(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_power_on_setting(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if ((IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) && (pHalData->EEPROMBluetoothCoexist == _TRUE)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_power_on_setting(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_power_on_setting(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if ((IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) && (pHalData->EEPROMBluetoothCoexist == _TRUE)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_power_on_setting(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_power_on_setting(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_power_on_setting(pBtCoexist); -+ /* else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8814a1ant_power_on_setting(pBtCoexist); */ -+ } -+#endif -+ -+#endif -+} -+ -+void EXhalbtcoutsrc_PreLoadFirmware(PBTC_COEXIST pBtCoexist) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->statistics.cnt_pre_load_firmware++; -+ -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8723B -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_pre_load_firmware(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_pre_load_firmware(pBtCoexist); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_pre_load_firmware(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_pre_load_firmware(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_pre_load_firmware(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_pre_load_firmware(pBtCoexist); -+ } -+#endif -+} -+ -+void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->statistics.cnt_init_hw_config++; -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_init_hw_config(pBtCoexist, bWifiOnly); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_init_hw_config(pBtCoexist, bWifiOnly); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_init_hw_config(pBtCoexist, bWifiOnly); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_init_hw_config(pBtCoexist, bWifiOnly); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_init_hw_config(pBtCoexist, bWifiOnly); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_init_hw_config(pBtCoexist, bWifiOnly); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_init_hw_config(pBtCoexist, bWifiOnly); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_init_hw_config(pBtCoexist, bWifiOnly); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_init_hw_config(pBtCoexist, bWifiOnly); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_init_hw_config(pBtCoexist, bWifiOnly); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_init_hw_config(pBtCoexist, bWifiOnly); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_init_hw_config(pBtCoexist, bWifiOnly); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_init_hw_config(pBtCoexist, bWifiOnly); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_init_hw_config(pBtCoexist, bWifiOnly); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_init_hw_config(pBtCoexist, bWifiOnly); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_init_hw_config(pBtCoexist, bWifiOnly); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_init_hw_config(pBtCoexist, bWifiOnly); -+ } -+#endif -+ -+#endif -+} -+ -+void EXhalbtcoutsrc_init_coex_dm(PBTC_COEXIST pBtCoexist) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->statistics.cnt_init_coex_dm++; -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_init_coex_dm(pBtCoexist); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_init_coex_dm(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_init_coex_dm(pBtCoexist); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_init_coex_dm(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_init_coex_dm(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_init_coex_dm(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_init_coex_dm(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_init_coex_dm(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_init_coex_dm(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_init_coex_dm(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_init_coex_dm(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_init_coex_dm(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_init_coex_dm(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_init_coex_dm(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_init_coex_dm(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_init_coex_dm(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_init_coex_dm(pBtCoexist); -+ } -+#endif -+ -+#endif -+ -+ pBtCoexist->initilized = _TRUE; -+} -+ -+void EXhalbtcoutsrc_ips_notify(PBTC_COEXIST pBtCoexist, u8 type) -+{ -+ u8 ipsType; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->statistics.cnt_ips_notify++; -+ if (pBtCoexist->manual_control) -+ return; -+ -+ if (IPS_NONE == type) { -+ ipsType = BTC_IPS_LEAVE; -+ GLBtcWiFiInIPS = _FALSE; -+ } else { -+ ipsType = BTC_IPS_ENTER; -+ GLBtcWiFiInIPS = _TRUE; -+ } -+ -+ /* All notify is called in cmd thread, don't need to leave low power again -+ * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_ips_notify(pBtCoexist, ipsType); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_ips_notify(pBtCoexist, ipsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_ips_notify(pBtCoexist, ipsType); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_ips_notify(pBtCoexist, ipsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_ips_notify(pBtCoexist, ipsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_ips_notify(pBtCoexist, ipsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_ips_notify(pBtCoexist, ipsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_ips_notify(pBtCoexist, ipsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_ips_notify(pBtCoexist, ipsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_ips_notify(pBtCoexist, ipsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_ips_notify(pBtCoexist, ipsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_ips_notify(pBtCoexist, ipsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_ips_notify(pBtCoexist, ipsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_ips_notify(pBtCoexist, ipsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_ips_notify(pBtCoexist, ipsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_ips_notify(pBtCoexist, ipsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_ips_notify(pBtCoexist, ipsType); -+ } -+#endif -+ -+#endif -+ /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ -+} -+ -+void EXhalbtcoutsrc_lps_notify(PBTC_COEXIST pBtCoexist, u8 type) -+{ -+ u8 lpsType; -+ -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->statistics.cnt_lps_notify++; -+ if (pBtCoexist->manual_control) -+ return; -+ -+ if (PS_MODE_ACTIVE == type) { -+ lpsType = BTC_LPS_DISABLE; -+ GLBtcWiFiInLPS = _FALSE; -+ } else { -+ lpsType = BTC_LPS_ENABLE; -+ GLBtcWiFiInLPS = _TRUE; -+ } -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_lps_notify(pBtCoexist, lpsType); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_lps_notify(pBtCoexist, lpsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_lps_notify(pBtCoexist, lpsType); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_lps_notify(pBtCoexist, lpsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_lps_notify(pBtCoexist, lpsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_lps_notify(pBtCoexist, lpsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_lps_notify(pBtCoexist, lpsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_lps_notify(pBtCoexist, lpsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_lps_notify(pBtCoexist, lpsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_lps_notify(pBtCoexist, lpsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_lps_notify(pBtCoexist, lpsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_lps_notify(pBtCoexist, lpsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_lps_notify(pBtCoexist, lpsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_lps_notify(pBtCoexist, lpsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_lps_notify(pBtCoexist, lpsType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_lps_notify(pBtCoexist, lpsType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_lps_notify(pBtCoexist, lpsType); -+ } -+#endif -+ -+#endif -+} -+ -+void EXhalbtcoutsrc_scan_notify(PBTC_COEXIST pBtCoexist, u8 type) -+{ -+ u8 scanType; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ pBtCoexist->statistics.cnt_scan_notify++; -+ if (pBtCoexist->manual_control) -+ return; -+ -+ if (type) { -+ scanType = BTC_SCAN_START; -+ GLBtcWiFiInScanState = _TRUE; -+ } else { -+ scanType = BTC_SCAN_FINISH; -+ GLBtcWiFiInScanState = _FALSE; -+ } -+ -+ /* All notify is called in cmd thread, don't need to leave low power again -+ * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_scan_notify(pBtCoexist, scanType); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_scan_notify(pBtCoexist, scanType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_scan_notify(pBtCoexist, scanType); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_scan_notify(pBtCoexist, scanType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_scan_notify(pBtCoexist, scanType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_scan_notify(pBtCoexist, scanType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_scan_notify(pBtCoexist, scanType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_scan_notify(pBtCoexist, scanType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_scan_notify(pBtCoexist, scanType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_scan_notify(pBtCoexist, scanType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_scan_notify(pBtCoexist, scanType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_scan_notify(pBtCoexist, scanType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_scan_notify(pBtCoexist, scanType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_scan_notify(pBtCoexist, scanType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_scan_notify(pBtCoexist, scanType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_scan_notify(pBtCoexist, scanType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_scan_notify(pBtCoexist, scanType); -+ } -+#endif -+ -+#endif -+ -+ /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ -+} -+ -+void EXhalbtcoutsrc_SetAntennaPathNotify(PBTC_COEXIST pBtCoexist, u8 type) -+{ -+#if 0 -+ u8 switchType; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ if (pBtCoexist->manual_control) -+ return; -+ -+ halbtcoutsrc_LeaveLowPower(pBtCoexist); -+ -+ switchType = type; -+ -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_set_antenna_notify(pBtCoexist, type); -+ } -+ if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_set_antenna_notify(pBtCoexist, type); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_set_antenna_notify(pBtCoexist, type); -+ } -+ -+ halbtcoutsrc_NormalLowPower(pBtCoexist); -+#endif -+} -+ -+void EXhalbtcoutsrc_connect_notify(PBTC_COEXIST pBtCoexist, u8 assoType) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ pBtCoexist->statistics.cnt_connect_notify++; -+ if (pBtCoexist->manual_control) -+ return; -+ -+ /* All notify is called in cmd thread, don't need to leave low power again -+ * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_connect_notify(pBtCoexist, assoType); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_connect_notify(pBtCoexist, assoType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_connect_notify(pBtCoexist, assoType); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_connect_notify(pBtCoexist, assoType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_connect_notify(pBtCoexist, assoType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_connect_notify(pBtCoexist, assoType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_connect_notify(pBtCoexist, assoType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_connect_notify(pBtCoexist, assoType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_connect_notify(pBtCoexist, assoType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_connect_notify(pBtCoexist, assoType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_connect_notify(pBtCoexist, assoType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_connect_notify(pBtCoexist, assoType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_connect_notify(pBtCoexist, assoType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_connect_notify(pBtCoexist, assoType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_connect_notify(pBtCoexist, assoType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_connect_notify(pBtCoexist, assoType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_connect_notify(pBtCoexist, assoType); -+ } -+#endif -+ -+#endif -+ -+ /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ -+} -+ -+void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS mediaStatus) -+{ -+ u8 mStatus = BTC_MEDIA_MAX; -+ PADAPTER adapter = NULL; -+ HAL_DATA_TYPE *hal = NULL; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ if (pBtCoexist->manual_control) -+ return; -+ -+ pBtCoexist->statistics.cnt_media_status_notify++; -+ adapter = (PADAPTER)pBtCoexist->Adapter; -+ hal = GET_HAL_DATA(adapter); -+ -+ if (RT_MEDIA_CONNECT == mediaStatus) { -+ if (hal->current_band_type == BAND_ON_2_4G) -+ mStatus = BTC_MEDIA_CONNECT; -+ else if (hal->current_band_type == BAND_ON_5G) -+ mStatus = BTC_MEDIA_CONNECT_5G; -+ else { -+ mStatus = BTC_MEDIA_CONNECT; -+ RTW_ERR("%s unknow band type\n", __func__); -+ } -+ } else -+ mStatus = BTC_MEDIA_DISCONNECT; -+ -+ /* All notify is called in cmd thread, don't need to leave low power again -+ * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_media_status_notify(pBtCoexist, mStatus); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ /* compatible for 8821A */ -+ if (mStatus == BTC_MEDIA_CONNECT_5G) -+ mStatus = BTC_MEDIA_CONNECT; -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_media_status_notify(pBtCoexist, mStatus); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_media_status_notify(pBtCoexist, mStatus); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_media_status_notify(pBtCoexist, mStatus); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_media_status_notify(pBtCoexist, mStatus); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_media_status_notify(pBtCoexist, mStatus); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_media_status_notify(pBtCoexist, mStatus); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_media_status_notify(pBtCoexist, mStatus); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_media_status_notify(pBtCoexist, mStatus); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_media_status_notify(pBtCoexist, mStatus); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ /* compatible for 8812A */ -+ if (mStatus == BTC_MEDIA_CONNECT_5G) -+ mStatus = BTC_MEDIA_CONNECT; -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_media_status_notify(pBtCoexist, mStatus); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_media_status_notify(pBtCoexist, mStatus); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_media_status_notify(pBtCoexist, mStatus); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_media_status_notify(pBtCoexist, mStatus); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_media_status_notify(pBtCoexist, mStatus); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_media_status_notify(pBtCoexist, mStatus); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_media_status_notify(pBtCoexist, mStatus); -+ } -+#endif -+ -+#endif -+ -+ /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ -+} -+ -+void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType) -+{ -+ u8 packetType; -+ PADAPTER adapter = NULL; -+ HAL_DATA_TYPE *hal = NULL; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ if (pBtCoexist->manual_control) -+ return; -+ -+ pBtCoexist->statistics.cnt_specific_packet_notify++; -+ adapter = (PADAPTER)pBtCoexist->Adapter; -+ hal = GET_HAL_DATA(adapter); -+ -+ if (PACKET_DHCP == pktType) -+ packetType = BTC_PACKET_DHCP; -+ else if (PACKET_EAPOL == pktType) -+ packetType = BTC_PACKET_EAPOL; -+ else if (PACKET_ARP == pktType) -+ packetType = BTC_PACKET_ARP; -+ else { -+ packetType = BTC_PACKET_UNKNOWN; -+ return; -+ } -+ -+ if (hal->current_band_type == BAND_ON_5G) -+ packetType |= BTC_5G_BAND; -+ -+ /* All notify is called in cmd thread, don't need to leave low power again -+ * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_specific_packet_notify(pBtCoexist, packetType); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ /* compatible for 8821A */ -+ if (hal->current_band_type == BAND_ON_5G) -+ packetType &= ~BTC_5G_BAND; -+ -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_specific_packet_notify(pBtCoexist, packetType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_specific_packet_notify(pBtCoexist, packetType); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_specific_packet_notify(pBtCoexist, packetType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_specific_packet_notify(pBtCoexist, packetType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_specific_packet_notify(pBtCoexist, packetType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_specific_packet_notify(pBtCoexist, packetType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_specific_packet_notify(pBtCoexist, packetType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_specific_packet_notify(pBtCoexist, packetType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_specific_packet_notify(pBtCoexist, packetType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ /* compatible for 8812A */ -+ if (hal->current_band_type == BAND_ON_5G) -+ packetType &= ~BTC_5G_BAND; -+ -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_specific_packet_notify(pBtCoexist, packetType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_specific_packet_notify(pBtCoexist, packetType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_specific_packet_notify(pBtCoexist, packetType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_specific_packet_notify(pBtCoexist, packetType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_specific_packet_notify(pBtCoexist, packetType); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_specific_packet_notify(pBtCoexist, packetType); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_specific_packet_notify(pBtCoexist, packetType); -+ } -+#endif -+ -+#endif -+ -+ /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ -+} -+ -+void EXhalbtcoutsrc_bt_info_notify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->statistics.cnt_bt_info_notify++; -+ -+ /* All notify is called in cmd thread, don't need to leave low power again -+ * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_bt_info_notify(pBtCoexist, tmpBuf, length); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_bt_info_notify(pBtCoexist, tmpBuf, length); -+ } -+#endif -+ -+#endif -+ -+ /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ -+} -+ -+void EXhalbtcoutsrc_WlFwDbgInfoNotify(PBTC_COEXIST pBtCoexist, u8* tmpBuf, u8 length) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_wl_fwdbginfo_notify(pBtCoexist, tmpBuf, length); -+#else -+ -+ if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8703B -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_wl_fwdbginfo_notify(pBtCoexist, tmpBuf, length); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_wl_fwdbginfo_notify(pBtCoexist, tmpBuf, length); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_wl_fwdbginfo_notify(pBtCoexist, tmpBuf, length); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_wl_fwdbginfo_notify(pBtCoexist, tmpBuf, length); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_wl_fwdbginfo_notify(pBtCoexist, tmpBuf, length); -+ } -+#endif -+ -+#endif -+} -+ -+void EXhalbtcoutsrc_rx_rate_change_notify(PBTC_COEXIST pBtCoexist, u8 is_data_frame, u8 btc_rate_id) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->statistics.cnt_rate_id_notify++; -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_rx_rate_change_notify(pBtCoexist, is_data_frame, btc_rate_id); -+#else -+ -+ if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8703B -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_rx_rate_change_notify(pBtCoexist, is_data_frame, btc_rate_id); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_rx_rate_change_notify(pBtCoexist, is_data_frame, btc_rate_id); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_rx_rate_change_notify(pBtCoexist, is_data_frame, btc_rate_id); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_rx_rate_change_notify(pBtCoexist, is_data_frame, btc_rate_id); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_rx_rate_change_notify(pBtCoexist, is_data_frame, btc_rate_id); -+ } -+#endif -+ -+#endif -+} -+ -+void -+EXhalbtcoutsrc_RfStatusNotify( -+ PBTC_COEXIST pBtCoexist, -+ u8 type -+) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ pBtCoexist->statistics.cnt_rf_status_notify++; -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_rf_status_notify(pBtCoexist, type); -+#else -+ -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8723B -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_rf_status_notify(pBtCoexist, type); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_rf_status_notify(pBtCoexist, type); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_rf_status_notify(pBtCoexist, type); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_rf_status_notify(pBtCoexist, type); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_rf_status_notify(pBtCoexist, type); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_rf_status_notify(pBtCoexist, type); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_rf_status_notify(pBtCoexist, type); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_rf_status_notify(pBtCoexist, type); -+ } -+#endif -+ -+#endif -+} -+ -+void EXhalbtcoutsrc_StackOperationNotify(PBTC_COEXIST pBtCoexist, u8 type) -+{ -+#if 0 -+ u8 stackOpType; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ pBtCoexist->statistics.cntStackOperationNotify++; -+ if (pBtCoexist->manual_control) -+ return; -+ -+ if ((HCI_BT_OP_INQUIRY_START == type) || -+ (HCI_BT_OP_PAGING_START == type) || -+ (HCI_BT_OP_PAIRING_START == type)) -+ stackOpType = BTC_STACK_OP_INQ_PAGE_PAIR_START; -+ else if ((HCI_BT_OP_INQUIRY_FINISH == type) || -+ (HCI_BT_OP_PAGING_SUCCESS == type) || -+ (HCI_BT_OP_PAGING_UNSUCCESS == type) || -+ (HCI_BT_OP_PAIRING_FINISH == type)) -+ stackOpType = BTC_STACK_OP_INQ_PAGE_PAIR_FINISH; -+ else -+ stackOpType = BTC_STACK_OP_NONE; -+ -+#endif -+} -+ -+void EXhalbtcoutsrc_halt_notify(PBTC_COEXIST pBtCoexist) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->statistics.cnt_halt_notify++; -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_halt_notify(pBtCoexist); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_halt_notify(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_halt_notify(pBtCoexist); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_halt_notify(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_halt_notify(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_halt_notify(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_halt_notify(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_halt_notify(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_halt_notify(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_halt_notify(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_halt_notify(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_halt_notify(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_halt_notify(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_halt_notify(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_halt_notify(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_halt_notify(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_halt_notify(pBtCoexist); -+ } -+#endif -+ -+#endif -+} -+ -+void EXhalbtcoutsrc_SwitchBtTRxMask(PBTC_COEXIST pBtCoexist) -+{ -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) { -+ halbtcoutsrc_SetBtReg(pBtCoexist, 0, 0x3c, 0x01); /* BT goto standby while GNT_BT 1-->0 */ -+ } else if (pBtCoexist->board_info.btdm_ant_num == 1) { -+ halbtcoutsrc_SetBtReg(pBtCoexist, 0, 0x3c, 0x15); /* BT goto standby while GNT_BT 1-->0 */ -+ } -+ } -+} -+ -+void EXhalbtcoutsrc_pnp_notify(PBTC_COEXIST pBtCoexist, u8 pnpState) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->statistics.cnt_pnp_notify++; -+ -+ /* */ -+ /* currently only 1ant we have to do the notification, */ -+ /* once pnp is notified to sleep state, we have to leave LPS that we can sleep normally. */ -+ /* */ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_pnp_notify(pBtCoexist, pnpState); -+#else -+ -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8723B -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_pnp_notify(pBtCoexist, pnpState); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_pnp_notify(pBtCoexist, pnpState); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_pnp_notify(pBtCoexist, pnpState); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_pnp_notify(pBtCoexist, pnpState); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_pnp_notify(pBtCoexist, pnpState); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821A -+ else if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_pnp_notify(pBtCoexist, pnpState); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_pnp_notify(pBtCoexist, pnpState); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_pnp_notify(pBtCoexist, pnpState); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_pnp_notify(pBtCoexist, pnpState); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_pnp_notify(pBtCoexist, pnpState); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_pnp_notify(pBtCoexist, pnpState); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_pnp_notify(pBtCoexist, pnpState); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_pnp_notify(pBtCoexist, pnpState); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_pnp_notify(pBtCoexist, pnpState); -+ } -+#endif -+ -+#endif -+} -+ -+void EXhalbtcoutsrc_CoexDmSwitch(PBTC_COEXIST pBtCoexist) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ pBtCoexist->statistics.cnt_coex_dm_switch++; -+ -+ halbtcoutsrc_LeaveLowPower(pBtCoexist); -+ -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8723B -+ if (pBtCoexist->board_info.btdm_ant_num == 1) { -+ pBtCoexist->stop_coex_dm = TRUE; -+ ex_halbtc8723b1ant_coex_dm_reset(pBtCoexist); -+ EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_DETECTED, 2); -+ ex_halbtc8723b2ant_init_hw_config(pBtCoexist, FALSE); -+ ex_halbtc8723b2ant_init_coex_dm(pBtCoexist); -+ pBtCoexist->stop_coex_dm = FALSE; -+ } -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) { -+ pBtCoexist->stop_coex_dm = TRUE; -+ ex_halbtc8723d1ant_coex_dm_reset(pBtCoexist); -+ EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_DETECTED, 2); -+ ex_halbtc8723d2ant_init_hw_config(pBtCoexist, FALSE); -+ ex_halbtc8723d2ant_init_coex_dm(pBtCoexist); -+ pBtCoexist->stop_coex_dm = FALSE; -+ } -+ } -+#endif -+ -+ halbtcoutsrc_NormalLowPower(pBtCoexist); -+} -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+void EXhalbtcoutsrc_TimerNotify(PBTC_COEXIST pBtCoexist, u32 timer_type) -+{ -+ rtw_btc_ex_timerup_notify(pBtCoexist, timer_type); -+} -+ -+void EXhalbtcoutsrc_WLStatusChangeNotify(PBTC_COEXIST pBtCoexist, u32 change_type) -+{ -+ rtw_btc_ex_wl_status_change_notify(pBtCoexist, change_type); -+} -+ -+u32 EXhalbtcoutsrc_CoexTimerCheck(PBTC_COEXIST pBtCoexist) -+{ -+ u32 i, timer_map = 0; -+ -+ for (i = 0; i < BTC_TIMER_MAX; i++) { -+ if (pBtCoexist->coex_sta.cnt_timer[i] > 0) { -+ if (pBtCoexist->coex_sta.cnt_timer[i] == 1) { -+ timer_map |= BIT(i); -+ RTW_DBG("[BTC], %s(): timer_map = 0x%x\n", __func__, timer_map); -+ } -+ -+ pBtCoexist->coex_sta.cnt_timer[i]--; -+ } -+ } -+ -+ return timer_map; -+} -+ -+u32 EXhalbtcoutsrc_WLStatusCheck(PBTC_COEXIST pBtCoexist) -+{ -+ struct btc_wifi_link_info link_info; -+ struct btc_coex_sta *coex_sta = &pBtCoexist->coex_sta; -+ const struct btc_chip_para *chip_para = pBtCoexist->chip_para; -+ u32 change_map = 0; -+ static bool wl_busy_pre; -+ bool wl_busy = _FALSE, bt_ctr_change = _FALSE; -+ s32 wl_rssi; -+ u32 traffic_dir; -+ u8 i, tmp; -+ static u8 rssi_step_pre = 5, wl_noisy_level_pre = 4; -+ -+ halbtcoutsrc_wl_noisy_detect(pBtCoexist); -+ bt_ctr_change = halbtcoutsrc_btc_monitor_bt_ctr(pBtCoexist); -+ -+ /* WL busy to idle or idle to busy */ -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &wl_busy); -+ if (wl_busy != wl_busy_pre) { -+ if (wl_busy) -+ change_map |= BIT(BTC_WLSTATUS_CHANGE_TOBUSY); -+ else -+ change_map |= BIT(BTC_WLSTATUS_CHANGE_TOIDLE); -+ -+ wl_busy_pre = wl_busy; -+ } -+ -+ /* WL RSSI */ -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wl_rssi); -+ tmp = (u8)(wl_rssi & 0xff); -+ for (i = 0; i < 4; i++) { -+ if (tmp >= chip_para->wl_rssi_step[i]) -+ break; -+ } -+ -+ if (rssi_step_pre != i) { -+ rssi_step_pre = i; -+ change_map |= BIT(BTC_WLSTATUS_CHANGE_RSSI); -+ } -+ -+ /* WL Link info */ -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_LINK_INFO, &link_info); -+ if (link_info.link_mode != pBtCoexist->wifi_link_info.link_mode || -+ link_info.sta_center_channel != -+ pBtCoexist->wifi_link_info.sta_center_channel || -+ link_info.p2p_center_channel != -+ pBtCoexist->wifi_link_info.p2p_center_channel || -+ link_info.bany_client_join_go != -+ pBtCoexist->wifi_link_info.bany_client_join_go) { -+ change_map |= BIT(BTC_WLSTATUS_CHANGE_LINKINFO); -+ pBtCoexist->wifi_link_info = link_info; -+ } -+ -+ /* WL Traffic Direction */ -+ pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIR, &traffic_dir); -+ if (wl_busy && traffic_dir != pBtCoexist->wifi_link_info_ext.traffic_dir) { -+ change_map |= BIT(BTC_WLSTATUS_CHANGE_DIR); -+ pBtCoexist->wifi_link_info_ext.traffic_dir = traffic_dir; -+ } -+ -+ /* Noisy Detect */ -+ if (coex_sta->wl_noisy_level != wl_noisy_level_pre) { -+ change_map |= BIT(BTC_WLSTATUS_CHANGE_NOISY); -+ wl_noisy_level_pre = coex_sta->wl_noisy_level; -+ } -+ -+ /* BT Counter change > 50 */ -+ if (bt_ctr_change) -+ change_map |= BIT(BTC_WLSTATUS_CHANGE_BTCNT); -+ -+ /* CCK Lock Try */ -+ if (coex_sta->wl_coex_mode == BTC_WLINK_2GFREE) -+ coex_sta->cnt_wl[BTC_CNT_WL_2G_FDDSTAY]++; -+ -+ if (coex_sta->wl_coex_mode == BTC_WLINK_2GFREE && -+ coex_sta->cnt_wl[BTC_CNT_WL_2G_FDDSTAY] > BTC_2GFDD_MAX_STAY && -+ coex_sta->cnt_wl[BTC_CNT_WL_2G_TDDTRY] < BTC_2GTDD_MAX_TRY) { -+ coex_sta->cnt_wl[BTC_CNT_WL_2G_TDDTRY]++; -+ -+ RTW_DBG("[BTC], Try 2.4G coex from FDD to TDD (FDD:%d, TRY:%d)\n", -+ coex_sta->cnt_wl[BTC_CNT_WL_2G_FDDSTAY], -+ coex_sta->cnt_wl[BTC_CNT_WL_2G_TDDTRY]); -+ -+ coex_sta->cnt_wl[BTC_CNT_WL_2G_FDDSTAY] = 0; -+ change_map |= BIT(BTC_WLSTATUS_CHANGE_LOCKTRY); -+ } -+ -+ RTW_DBG("[BTC], %s(): change_map = 0x%x\n", __func__, change_map); -+ -+ return change_map; -+} -+ -+void EXhalbtcoutsrc_status_monitor(PBTC_COEXIST pBtCoexist) -+{ -+ u32 timer_up_type = 0, wl_status_change_type = 0; -+ -+ timer_up_type = EXhalbtcoutsrc_CoexTimerCheck(pBtCoexist); -+ if (timer_up_type != 0) -+ EXhalbtcoutsrc_TimerNotify(pBtCoexist, timer_up_type); -+ -+ wl_status_change_type = EXhalbtcoutsrc_WLStatusCheck(pBtCoexist); -+ if (wl_status_change_type != 0) -+ EXhalbtcoutsrc_WLStatusChangeNotify(pBtCoexist, wl_status_change_type); -+ -+ rtw_btc_ex_periodical(pBtCoexist); -+} -+#endif -+ -+void EXhalbtcoutsrc_WL_RFK_Notify(PBTC_COEXIST pBtCoexist, u8 path, u8 type, u8 state) -+{ -+ #if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_wl_rfk_notify(pBtCoexist, path, type, state); -+ #endif -+ return; -+} -+ -+void EXhalbtcoutsrc_periodical(PBTC_COEXIST pBtCoexist) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ pBtCoexist->statistics.cnt_periodical++; -+ -+ /* Periodical should be called in cmd thread, */ -+ /* don't need to leave low power again -+ * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ EXhalbtcoutsrc_status_monitor(pBtCoexist); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_periodical(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) { -+ if (!halbtcoutsrc_UnderIps(pBtCoexist)) -+ ex_halbtc8821a1ant_periodical(pBtCoexist); -+ } -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_periodical(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_periodical(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_periodical(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_periodical(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_periodical(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_periodical(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_periodical(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_periodical(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_periodical(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_periodical(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_periodical(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_periodical(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_periodical(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_periodical(pBtCoexist); -+ } -+#endif -+ -+#endif -+ -+ /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ -+} -+ -+void EXhalbtcoutsrc_dbg_control(PBTC_COEXIST pBtCoexist, u8 opCode, u8 opLen, u8 *pData) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->statistics.cnt_dbg_ctrl++; -+ -+ /* This function doesn't be called yet, */ -+ /* default no need to leave low power to avoid deadlock -+ * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ /* rtw_btc_ex_dbg_control(pBtCoexist, opCode, opLen, pData); */ -+#else -+ -+ if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8192E -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_dbg_control(pBtCoexist, opCode, opLen, pData); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_dbg_control(pBtCoexist, opCode, opLen, pData); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_dbg_control(pBtCoexist, opCode, opLen, pData); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) -+ if(pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_dbg_control(pBtCoexist, opCode, opLen, pData); -+#endif -+ -+#endif -+ -+ /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ -+} -+ -+#if 0 -+void -+EXhalbtcoutsrc_AntennaDetection( -+ PBTC_COEXIST pBtCoexist, -+ u32 centFreq, -+ u32 offset, -+ u32 span, -+ u32 seconds -+) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ /* Need to refine the following power save operations to enable this function in the future */ -+#if 0 -+ IPSDisable(pBtCoexist->Adapter, FALSE, 0); -+ LeisurePSLeave(pBtCoexist->Adapter, LPS_DISABLE_BT_COEX); -+#endif -+ -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_AntennaDetection(pBtCoexist, centFreq, offset, span, seconds); -+ } -+ -+ /* IPSReturn(pBtCoexist->Adapter, 0xff); */ -+} -+#endif -+ -+void EXhalbtcoutsrc_StackUpdateProfileInfo(void) -+{ -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ PBTC_COEXIST pBtCoexist = &GLBtCoexist; -+ PADAPTER padapter = NULL; -+ PBT_MGNT pBtMgnt = NULL; -+ u8 i; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ padapter = (PADAPTER)pBtCoexist->Adapter; -+ pBtMgnt = &padapter->coex_info.BtMgnt; -+ -+ pBtCoexist->stack_info.profile_notified = _TRUE; -+ -+ pBtCoexist->stack_info.num_of_link = -+ pBtMgnt->ExtConfig.NumberOfACL + pBtMgnt->ExtConfig.NumberOfSCO; -+ -+ /* reset first */ -+ pBtCoexist->stack_info.bt_link_exist = _FALSE; -+ pBtCoexist->stack_info.sco_exist = _FALSE; -+ pBtCoexist->stack_info.acl_exist = _FALSE; -+ pBtCoexist->stack_info.a2dp_exist = _FALSE; -+ pBtCoexist->stack_info.hid_exist = _FALSE; -+ pBtCoexist->stack_info.num_of_hid = 0; -+ pBtCoexist->stack_info.pan_exist = _FALSE; -+ -+ if (!pBtMgnt->ExtConfig.NumberOfACL) -+ pBtCoexist->stack_info.min_bt_rssi = 0; -+ -+ if (pBtCoexist->stack_info.num_of_link) { -+ pBtCoexist->stack_info.bt_link_exist = _TRUE; -+ if (pBtMgnt->ExtConfig.NumberOfSCO) -+ pBtCoexist->stack_info.sco_exist = _TRUE; -+ if (pBtMgnt->ExtConfig.NumberOfACL) -+ pBtCoexist->stack_info.acl_exist = _TRUE; -+ } -+ -+ for (i = 0; i < pBtMgnt->ExtConfig.NumberOfACL; i++) { -+ if (BT_PROFILE_A2DP == pBtMgnt->ExtConfig.aclLink[i].BTProfile) -+ pBtCoexist->stack_info.a2dp_exist = _TRUE; -+ else if (BT_PROFILE_PAN == pBtMgnt->ExtConfig.aclLink[i].BTProfile) -+ pBtCoexist->stack_info.pan_exist = _TRUE; -+ else if (BT_PROFILE_HID == pBtMgnt->ExtConfig.aclLink[i].BTProfile) { -+ pBtCoexist->stack_info.hid_exist = _TRUE; -+ pBtCoexist->stack_info.num_of_hid++; -+ } else -+ pBtCoexist->stack_info.unknown_acl_exist = _TRUE; -+ } -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+} -+ -+void EXhalbtcoutsrc_UpdateMinBtRssi(s8 btRssi) -+{ -+ PBTC_COEXIST pBtCoexist = &GLBtCoexist; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->stack_info.min_bt_rssi = btRssi; -+} -+ -+void EXhalbtcoutsrc_SetHciVersion(u16 hciVersion) -+{ -+ PBTC_COEXIST pBtCoexist = &GLBtCoexist; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->stack_info.hci_version = hciVersion; -+} -+ -+void EXhalbtcoutsrc_SetBtPatchVersion(u16 btHciVersion, u16 btPatchVersion) -+{ -+ PBTC_COEXIST pBtCoexist = &GLBtCoexist; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ pBtCoexist->bt_info.bt_real_fw_ver = btPatchVersion; -+ pBtCoexist->bt_info.bt_hci_ver = btHciVersion; -+} -+ -+#if 0 -+void EXhalbtcoutsrc_SetBtExist(u8 bBtExist) -+{ -+ GLBtCoexist.boardInfo.bBtExist = bBtExist; -+} -+#endif -+void EXhalbtcoutsrc_SetChipType(u8 chipType) -+{ -+ switch (chipType) { -+ default: -+ case BT_2WIRE: -+ case BT_ISSC_3WIRE: -+ case BT_ACCEL: -+ case BT_RTL8756: -+ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_UNDEF; -+ break; -+ case BT_CSR_BC4: -+ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_CSR_BC4; -+ break; -+ case BT_CSR_BC8: -+ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_CSR_BC8; -+ break; -+ case BT_RTL8723A: -+ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_RTL8723A; -+ break; -+ case BT_RTL8821: -+ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_RTL8821; -+ break; -+ case BT_RTL8723B: -+ GLBtCoexist.board_info.bt_chip_type = BTC_CHIP_RTL8723B; -+ break; -+ } -+} -+ -+void EXhalbtcoutsrc_SetAntNum(u8 type, u8 antNum) -+{ -+ if (BT_COEX_ANT_TYPE_PG == type) { -+ GLBtCoexist.board_info.pg_ant_num = antNum; -+ GLBtCoexist.board_info.btdm_ant_num = antNum; -+#if 0 -+ /* The antenna position: Main (default) or Aux for pgAntNum=2 && btdmAntNum =1 */ -+ /* The antenna position should be determined by auto-detect mechanism */ -+ /* The following is assumed to main, and those must be modified if y auto-detect mechanism is ready */ -+ if ((GLBtCoexist.board_info.pg_ant_num == 2) && (GLBtCoexist.board_info.btdm_ant_num == 1)) -+ GLBtCoexist.board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; -+ else -+ GLBtCoexist.board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT; -+#endif -+ } else if (BT_COEX_ANT_TYPE_ANTDIV == type) { -+ GLBtCoexist.board_info.btdm_ant_num = antNum; -+ /* GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; */ -+ } else if (BT_COEX_ANT_TYPE_DETECTED == type) { -+ GLBtCoexist.board_info.btdm_ant_num = antNum; -+ /* GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; */ -+ } -+} -+ -+/* -+ * Currently used by 8723b only, S0 or S1 -+ * */ -+void EXhalbtcoutsrc_SetSingleAntPath(u8 singleAntPath) -+{ -+ GLBtCoexist.board_info.single_ant_path = singleAntPath; -+} -+ -+void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist) -+{ -+ HAL_DATA_TYPE *pHalData = NULL; -+ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ halbtcoutsrc_LeaveLowPower(pBtCoexist); -+ -+ /* To prevent the racing with IPS enter */ -+ halbtcoutsrc_EnterPwrLock(pBtCoexist); -+ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ pHalData = GET_HAL_DATA((PADAPTER)pBtCoexist->Adapter); -+ -+ if (pHalData->EEPROMBluetoothCoexist == _TRUE) -+ rtw_btc_ex_display_coex_info(pBtCoexist); -+#else -+ -+ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8821A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821a2ant_display_coex_info(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821a1ant_display_coex_info(pBtCoexist); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8723B -+ else if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723b2ant_display_coex_info(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_display_coex_info(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ else if (IS_HARDWARE_TYPE_8703B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8703b1ant_display_coex_info(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ else if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8723d2ant_display_coex_info(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723d1ant_display_coex_info(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ else if (IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8192e2ant_display_coex_info(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8192e1ant_display_coex_info(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_display_coex_info(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8812a1ant_display_coex_info(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_display_coex_info(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_display_coex_info(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_display_coex_info(pBtCoexist); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_display_coex_info(pBtCoexist); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_display_coex_info(pBtCoexist); -+ } -+#endif -+ -+#endif -+ -+ halbtcoutsrc_ExitPwrLock(pBtCoexist); -+ -+ halbtcoutsrc_NormalLowPower(pBtCoexist); -+} -+ -+void EXhalbtcoutsrc_DisplayAntDetection(PBTC_COEXIST pBtCoexist) -+{ -+ if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ halbtcoutsrc_LeaveLowPower(pBtCoexist); -+ -+ if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8723B -+ if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8723b1ant_display_ant_detection(pBtCoexist); -+#endif -+ } -+ -+ halbtcoutsrc_NormalLowPower(pBtCoexist); -+} -+ -+void ex_halbtcoutsrc_pta_off_on_notify(PBTC_COEXIST pBtCoexist, u8 bBTON) -+{ -+ if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8812A -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8812a2ant_pta_off_on_notify(pBtCoexist, (bBTON == _TRUE) ? BTC_BT_ON : BTC_BT_OFF); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_pta_off_on_notify(pBtCoexist, (bBTON == _TRUE) ? BTC_BT_ON : BTC_BT_OFF); -+ } -+#endif -+} -+ -+void EXhalbtcoutsrc_set_rfe_type(u8 type) -+{ -+ GLBtCoexist.board_info.rfe_type= type; -+} -+ -+#ifdef CONFIG_RF4CE_COEXIST -+void EXhalbtcoutsrc_set_rf4ce_link_state(u8 state) -+{ -+ GLBtCoexist.rf4ce_info.link_state = state; -+} -+ -+u8 EXhalbtcoutsrc_get_rf4ce_link_state(void) -+{ -+ return GLBtCoexist.rf4ce_info.link_state; -+} -+#endif -+ -+void EXhalbtcoutsrc_switchband_notify(struct btc_coexist *pBtCoexist, u8 type) -+{ -+ if(!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) -+ return; -+ -+ if(pBtCoexist->manual_control) -+ return; -+ -+ /* Driver should guarantee that the HW status isn't in low power mode */ -+ /* halbtcoutsrc_LeaveLowPower(pBtCoexist); */ -+#if (CONFIG_BTCOEX_SUPPORT_BTC_CMN == 1) -+ rtw_btc_ex_switchband_notify(pBtCoexist, type); -+#else -+ -+ if(IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) { -+#ifdef CONFIG_RTL8822B -+ if(pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8822b1ant_switchband_notify(pBtCoexist, type); -+ else if(pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8822b2ant_switchband_notify(pBtCoexist, type); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8821c2ant_switchband_notify(pBtCoexist, type); -+ else if (pBtCoexist->board_info.btdm_ant_num == 1) -+ ex_halbtc8821c1ant_switchband_notify(pBtCoexist, type); -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ else if (IS_HARDWARE_TYPE_8814A(pBtCoexist->Adapter)) { -+ if (pBtCoexist->board_info.btdm_ant_num == 2) -+ ex_halbtc8814a2ant_switchband_notify(pBtCoexist, type); -+ } -+#endif -+ -+#endif -+ -+ /* halbtcoutsrc_NormalLowPower(pBtCoexist); */ -+} -+ -+u8 EXhalbtcoutsrc_rate_id_to_btc_rate_id(u8 rate_id) -+{ -+ u8 btc_rate_id = BTC_UNKNOWN; -+ -+ switch (rate_id) { -+ /* CCK rates */ -+ case DESC_RATE1M: -+ btc_rate_id = BTC_CCK_1; -+ break; -+ case DESC_RATE2M: -+ btc_rate_id = BTC_CCK_2; -+ break; -+ case DESC_RATE5_5M: -+ btc_rate_id = BTC_CCK_5_5; -+ break; -+ case DESC_RATE11M: -+ btc_rate_id = BTC_CCK_11; -+ break; -+ -+ /* OFDM rates */ -+ case DESC_RATE6M: -+ btc_rate_id = BTC_OFDM_6; -+ break; -+ case DESC_RATE9M: -+ btc_rate_id = BTC_OFDM_9; -+ break; -+ case DESC_RATE12M: -+ btc_rate_id = BTC_OFDM_12; -+ break; -+ case DESC_RATE18M: -+ btc_rate_id = BTC_OFDM_18; -+ break; -+ case DESC_RATE24M: -+ btc_rate_id = BTC_OFDM_24; -+ break; -+ case DESC_RATE36M: -+ btc_rate_id = BTC_OFDM_36; -+ break; -+ case DESC_RATE48M: -+ btc_rate_id = BTC_OFDM_48; -+ break; -+ case DESC_RATE54M: -+ btc_rate_id = BTC_OFDM_54; -+ break; -+ -+ /* MCS rates */ -+ case DESC_RATEMCS0: -+ btc_rate_id = BTC_MCS_0; -+ break; -+ case DESC_RATEMCS1: -+ btc_rate_id = BTC_MCS_1; -+ break; -+ case DESC_RATEMCS2: -+ btc_rate_id = BTC_MCS_2; -+ break; -+ case DESC_RATEMCS3: -+ btc_rate_id = BTC_MCS_3; -+ break; -+ case DESC_RATEMCS4: -+ btc_rate_id = BTC_MCS_4; -+ break; -+ case DESC_RATEMCS5: -+ btc_rate_id = BTC_MCS_5; -+ break; -+ case DESC_RATEMCS6: -+ btc_rate_id = BTC_MCS_6; -+ break; -+ case DESC_RATEMCS7: -+ btc_rate_id = BTC_MCS_7; -+ break; -+ case DESC_RATEMCS8: -+ btc_rate_id = BTC_MCS_8; -+ break; -+ case DESC_RATEMCS9: -+ btc_rate_id = BTC_MCS_9; -+ break; -+ case DESC_RATEMCS10: -+ btc_rate_id = BTC_MCS_10; -+ break; -+ case DESC_RATEMCS11: -+ btc_rate_id = BTC_MCS_11; -+ break; -+ case DESC_RATEMCS12: -+ btc_rate_id = BTC_MCS_12; -+ break; -+ case DESC_RATEMCS13: -+ btc_rate_id = BTC_MCS_13; -+ break; -+ case DESC_RATEMCS14: -+ btc_rate_id = BTC_MCS_14; -+ break; -+ case DESC_RATEMCS15: -+ btc_rate_id = BTC_MCS_15; -+ break; -+ case DESC_RATEMCS16: -+ btc_rate_id = BTC_MCS_16; -+ break; -+ case DESC_RATEMCS17: -+ btc_rate_id = BTC_MCS_17; -+ break; -+ case DESC_RATEMCS18: -+ btc_rate_id = BTC_MCS_18; -+ break; -+ case DESC_RATEMCS19: -+ btc_rate_id = BTC_MCS_19; -+ break; -+ case DESC_RATEMCS20: -+ btc_rate_id = BTC_MCS_20; -+ break; -+ case DESC_RATEMCS21: -+ btc_rate_id = BTC_MCS_21; -+ break; -+ case DESC_RATEMCS22: -+ btc_rate_id = BTC_MCS_22; -+ break; -+ case DESC_RATEMCS23: -+ btc_rate_id = BTC_MCS_23; -+ break; -+ case DESC_RATEMCS24: -+ btc_rate_id = BTC_MCS_24; -+ break; -+ case DESC_RATEMCS25: -+ btc_rate_id = BTC_MCS_25; -+ break; -+ case DESC_RATEMCS26: -+ btc_rate_id = BTC_MCS_26; -+ break; -+ case DESC_RATEMCS27: -+ btc_rate_id = BTC_MCS_27; -+ break; -+ case DESC_RATEMCS28: -+ btc_rate_id = BTC_MCS_28; -+ break; -+ case DESC_RATEMCS29: -+ btc_rate_id = BTC_MCS_29; -+ break; -+ case DESC_RATEMCS30: -+ btc_rate_id = BTC_MCS_30; -+ break; -+ case DESC_RATEMCS31: -+ btc_rate_id = BTC_MCS_31; -+ break; -+ -+ case DESC_RATEVHTSS1MCS0: -+ btc_rate_id = BTC_VHT_1SS_MCS_0; -+ break; -+ case DESC_RATEVHTSS1MCS1: -+ btc_rate_id = BTC_VHT_1SS_MCS_1; -+ break; -+ case DESC_RATEVHTSS1MCS2: -+ btc_rate_id = BTC_VHT_1SS_MCS_2; -+ break; -+ case DESC_RATEVHTSS1MCS3: -+ btc_rate_id = BTC_VHT_1SS_MCS_3; -+ break; -+ case DESC_RATEVHTSS1MCS4: -+ btc_rate_id = BTC_VHT_1SS_MCS_4; -+ break; -+ case DESC_RATEVHTSS1MCS5: -+ btc_rate_id = BTC_VHT_1SS_MCS_5; -+ break; -+ case DESC_RATEVHTSS1MCS6: -+ btc_rate_id = BTC_VHT_1SS_MCS_6; -+ break; -+ case DESC_RATEVHTSS1MCS7: -+ btc_rate_id = BTC_VHT_1SS_MCS_7; -+ break; -+ case DESC_RATEVHTSS1MCS8: -+ btc_rate_id = BTC_VHT_1SS_MCS_8; -+ break; -+ case DESC_RATEVHTSS1MCS9: -+ btc_rate_id = BTC_VHT_1SS_MCS_9; -+ break; -+ -+ case DESC_RATEVHTSS2MCS0: -+ btc_rate_id = BTC_VHT_2SS_MCS_0; -+ break; -+ case DESC_RATEVHTSS2MCS1: -+ btc_rate_id = BTC_VHT_2SS_MCS_1; -+ break; -+ case DESC_RATEVHTSS2MCS2: -+ btc_rate_id = BTC_VHT_2SS_MCS_2; -+ break; -+ case DESC_RATEVHTSS2MCS3: -+ btc_rate_id = BTC_VHT_2SS_MCS_3; -+ break; -+ case DESC_RATEVHTSS2MCS4: -+ btc_rate_id = BTC_VHT_2SS_MCS_4; -+ break; -+ case DESC_RATEVHTSS2MCS5: -+ btc_rate_id = BTC_VHT_2SS_MCS_5; -+ break; -+ case DESC_RATEVHTSS2MCS6: -+ btc_rate_id = BTC_VHT_2SS_MCS_6; -+ break; -+ case DESC_RATEVHTSS2MCS7: -+ btc_rate_id = BTC_VHT_2SS_MCS_7; -+ break; -+ case DESC_RATEVHTSS2MCS8: -+ btc_rate_id = BTC_VHT_2SS_MCS_8; -+ break; -+ case DESC_RATEVHTSS2MCS9: -+ btc_rate_id = BTC_VHT_2SS_MCS_9; -+ break; -+ -+ case DESC_RATEVHTSS3MCS0: -+ btc_rate_id = BTC_VHT_3SS_MCS_0; -+ break; -+ case DESC_RATEVHTSS3MCS1: -+ btc_rate_id = BTC_VHT_3SS_MCS_1; -+ break; -+ case DESC_RATEVHTSS3MCS2: -+ btc_rate_id = BTC_VHT_3SS_MCS_2; -+ break; -+ case DESC_RATEVHTSS3MCS3: -+ btc_rate_id = BTC_VHT_3SS_MCS_3; -+ break; -+ case DESC_RATEVHTSS3MCS4: -+ btc_rate_id = BTC_VHT_3SS_MCS_4; -+ break; -+ case DESC_RATEVHTSS3MCS5: -+ btc_rate_id = BTC_VHT_3SS_MCS_5; -+ break; -+ case DESC_RATEVHTSS3MCS6: -+ btc_rate_id = BTC_VHT_3SS_MCS_6; -+ break; -+ case DESC_RATEVHTSS3MCS7: -+ btc_rate_id = BTC_VHT_3SS_MCS_7; -+ break; -+ case DESC_RATEVHTSS3MCS8: -+ btc_rate_id = BTC_VHT_3SS_MCS_8; -+ break; -+ case DESC_RATEVHTSS3MCS9: -+ btc_rate_id = BTC_VHT_3SS_MCS_9; -+ break; -+ -+ case DESC_RATEVHTSS4MCS0: -+ btc_rate_id = BTC_VHT_4SS_MCS_0; -+ break; -+ case DESC_RATEVHTSS4MCS1: -+ btc_rate_id = BTC_VHT_4SS_MCS_1; -+ break; -+ case DESC_RATEVHTSS4MCS2: -+ btc_rate_id = BTC_VHT_4SS_MCS_2; -+ break; -+ case DESC_RATEVHTSS4MCS3: -+ btc_rate_id = BTC_VHT_4SS_MCS_3; -+ break; -+ case DESC_RATEVHTSS4MCS4: -+ btc_rate_id = BTC_VHT_4SS_MCS_4; -+ break; -+ case DESC_RATEVHTSS4MCS5: -+ btc_rate_id = BTC_VHT_4SS_MCS_5; -+ break; -+ case DESC_RATEVHTSS4MCS6: -+ btc_rate_id = BTC_VHT_4SS_MCS_6; -+ break; -+ case DESC_RATEVHTSS4MCS7: -+ btc_rate_id = BTC_VHT_4SS_MCS_7; -+ break; -+ case DESC_RATEVHTSS4MCS8: -+ btc_rate_id = BTC_VHT_4SS_MCS_8; -+ break; -+ case DESC_RATEVHTSS4MCS9: -+ btc_rate_id = BTC_VHT_4SS_MCS_9; -+ break; -+ } -+ -+ return btc_rate_id; -+} -+ -+/* -+ * Description: -+ * Run BT-Coexist mechansim or not -+ * -+ */ -+void hal_btcoex_SetBTCoexist(PADAPTER padapter, u8 bBtExist) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ pHalData->bt_coexist.bBtExist = bBtExist; -+} -+ -+/* -+ * Dewcription: -+ * Check is co-exist mechanism enabled or not -+ * -+ * Return: -+ * _TRUE Enable BT co-exist mechanism -+ * _FALSE Disable BT co-exist mechanism -+ */ -+u8 hal_btcoex_IsBtExist(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ return pHalData->bt_coexist.bBtExist; -+} -+ -+u8 hal_btcoex_IsBtDisabled(PADAPTER padapter) -+{ -+ if (!hal_btcoex_IsBtExist(padapter)) -+ return _TRUE; -+ -+ if (GLBtCoexist.bt_info.bt_disabled) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+void hal_btcoex_SetChipType(PADAPTER padapter, u8 chipType) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ pHalData->bt_coexist.btChipType = chipType; -+} -+ -+void hal_btcoex_SetPgAntNum(PADAPTER padapter, u8 antNum) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ pHalData->bt_coexist.btTotalAntNum = antNum; -+} -+ -+u8 hal_btcoex_Initialize(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 ret; -+ -+ _rtw_memset(&GLBtCoexist, 0, sizeof(GLBtCoexist)); -+ -+ ret = EXhalbtcoutsrc_InitlizeVariables((void *)padapter); -+ -+ return ret; -+} -+ -+void hal_btcoex_PowerOnSetting(PADAPTER padapter) -+{ -+ EXhalbtcoutsrc_PowerOnSetting(&GLBtCoexist); -+} -+ -+void hal_btcoex_AntInfoSetting(PADAPTER padapter) -+{ -+ hal_btcoex_SetBTCoexist(padapter, rtw_btcoex_get_bt_coexist(padapter)); -+ hal_btcoex_SetChipType(padapter, rtw_btcoex_get_chip_type(padapter)); -+ hal_btcoex_SetPgAntNum(padapter, rtw_btcoex_get_pg_ant_num(padapter)); -+ -+ EXhalbtcoutsrc_AntInfoSetting(padapter); -+} -+ -+void hal_btcoex_PowerOffSetting(PADAPTER padapter) -+{ -+ /* Clear the WiFi on/off bit in scoreboard reg. if necessary */ -+ if (IS_HARDWARE_TYPE_8703B(padapter) || IS_HARDWARE_TYPE_8723D(padapter) -+ || IS_HARDWARE_TYPE_8821C(padapter) || IS_HARDWARE_TYPE_8822B(padapter) -+ || IS_HARDWARE_TYPE_8822C(padapter)) -+ rtw_write16(padapter, 0xaa, 0x8000); -+} -+ -+void hal_btcoex_PreLoadFirmware(PADAPTER padapter) -+{ -+ EXhalbtcoutsrc_PreLoadFirmware(&GLBtCoexist); -+} -+ -+void hal_btcoex_InitHwConfig(PADAPTER padapter, u8 bWifiOnly) -+{ -+ if (!hal_btcoex_IsBtExist(padapter)) -+ return; -+ -+ EXhalbtcoutsrc_init_hw_config(&GLBtCoexist, bWifiOnly); -+ EXhalbtcoutsrc_init_coex_dm(&GLBtCoexist); -+} -+ -+void hal_btcoex_IpsNotify(PADAPTER padapter, u8 type) -+{ -+ EXhalbtcoutsrc_ips_notify(&GLBtCoexist, type); -+} -+ -+void hal_btcoex_LpsNotify(PADAPTER padapter, u8 type) -+{ -+ EXhalbtcoutsrc_lps_notify(&GLBtCoexist, type); -+} -+ -+void hal_btcoex_ScanNotify(PADAPTER padapter, u8 type) -+{ -+ EXhalbtcoutsrc_scan_notify(&GLBtCoexist, type); -+} -+ -+void hal_btcoex_ConnectNotify(PADAPTER padapter, u8 action) -+{ -+ u8 assoType = 0; -+ u8 is_5g_band = _FALSE; -+ -+ is_5g_band = (padapter->mlmeextpriv.cur_channel > 14) ? _TRUE : _FALSE; -+ -+ if (action == _TRUE) { -+ if (is_5g_band == _TRUE) -+ assoType = BTC_ASSOCIATE_5G_START; -+ else -+ assoType = BTC_ASSOCIATE_START; -+ } -+ else { -+ if (is_5g_band == _TRUE) -+ assoType = BTC_ASSOCIATE_5G_FINISH; -+ else -+ assoType = BTC_ASSOCIATE_FINISH; -+ } -+ -+ EXhalbtcoutsrc_connect_notify(&GLBtCoexist, assoType); -+} -+ -+void hal_btcoex_MediaStatusNotify(PADAPTER padapter, u8 mediaStatus) -+{ -+ EXhalbtcoutsrc_media_status_notify(&GLBtCoexist, mediaStatus); -+} -+ -+void hal_btcoex_SpecialPacketNotify(PADAPTER padapter, u8 pktType) -+{ -+ EXhalbtcoutsrc_specific_packet_notify(&GLBtCoexist, pktType); -+} -+ -+void hal_btcoex_IQKNotify(PADAPTER padapter, u8 state) -+{ -+ GLBtcWiFiInIQKState = state; -+} -+ -+void hal_btcoex_WLRFKNotify(PADAPTER padapter, u8 path, u8 type, u8 state) -+{ -+ EXhalbtcoutsrc_WL_RFK_Notify(&GLBtCoexist, path, type, state); -+} -+ -+void hal_btcoex_BtInfoNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) -+{ -+ if (GLBtcWiFiInIQKState == _TRUE) -+ return; -+ -+ EXhalbtcoutsrc_bt_info_notify(&GLBtCoexist, tmpBuf, length); -+} -+ -+void hal_btcoex_BtMpRptNotify(PADAPTER padapter, u8 length, u8 *tmpBuf) -+{ -+ u8 extid, status, len, seq; -+ -+ -+ if (GLBtcBtMpRptWait == _FALSE) -+ return; -+ -+ if ((length < 3) || (!tmpBuf)) -+ return; -+ -+ extid = tmpBuf[0]; -+ /* not response from BT FW then exit*/ -+ switch (extid) { -+ case C2H_WIFI_FW_ACTIVE_RSP: -+ GLBtcBtMpRptWiFiOK = _TRUE; -+ break; -+ -+ case C2H_TRIG_BY_BT_FW: -+ GLBtcBtMpRptBTOK = _TRUE; -+ -+ status = tmpBuf[1] & 0xF; -+ len = length - 3; -+ seq = tmpBuf[2] >> 4; -+ -+ GLBtcBtMpRptSeq = seq; -+ GLBtcBtMpRptStatus = status; -+ _rtw_memcpy(GLBtcBtMpRptRsp, tmpBuf + 3, len); -+ GLBtcBtMpRptRspSize = len; -+ -+ break; -+ -+ default: -+ return; -+ } -+ -+ if ((GLBtcBtMpRptWiFiOK == _TRUE) && (GLBtcBtMpRptBTOK == _TRUE)) { -+ GLBtcBtMpRptWait = _FALSE; -+ _cancel_timer_ex(&GLBtcBtMpOperTimer); -+ _rtw_up_sema(&GLBtcBtMpRptSema); -+ } -+} -+ -+void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state) -+{ -+ switch (state) { -+ case BTCOEX_SUSPEND_STATE_SUSPEND: -+ EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_SLEEP); -+ break; -+ case BTCOEX_SUSPEND_STATE_SUSPEND_KEEP_ANT: -+ /* should switch to "#if 1" once all ICs' coex. revision are upgraded to support the KEEP_ANT case */ -+#if 0 -+ EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_SLEEP_KEEP_ANT); -+#else -+ EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_SLEEP); -+ EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_SLEEP_KEEP_ANT); -+#endif -+ break; -+ case BTCOEX_SUSPEND_STATE_RESUME: -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ /* re-download FW after resume, inform WL FW port number */ -+ rtw_hal_set_wifi_btc_port_id_cmd(GLBtCoexist.Adapter); -+#endif -+ EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_WAKE_UP); -+ break; -+ } -+} -+ -+void hal_btcoex_HaltNotify(PADAPTER padapter, u8 do_halt) -+{ -+ if (do_halt == 1) -+ EXhalbtcoutsrc_halt_notify(&GLBtCoexist); -+ -+ GLBtCoexist.bBinded = _FALSE; -+ GLBtCoexist.Adapter = NULL; -+} -+ -+void hal_btcoex_SwitchBtTRxMask(PADAPTER padapter) -+{ -+ EXhalbtcoutsrc_SwitchBtTRxMask(&GLBtCoexist); -+} -+ -+void hal_btcoex_Hanlder(PADAPTER padapter) -+{ -+ u32 bt_patch_ver; -+ -+ EXhalbtcoutsrc_periodical(&GLBtCoexist); -+ -+ if (GLBtCoexist.bt_info.bt_get_fw_ver == 0) { -+ GLBtCoexist.btc_get(&GLBtCoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); -+ GLBtCoexist.bt_info.bt_get_fw_ver = bt_patch_ver; -+ } -+} -+ -+s32 hal_btcoex_IsBTCoexRejectAMPDU(PADAPTER padapter) -+{ -+ return (s32)GLBtCoexist.bt_info.reject_agg_pkt; -+} -+ -+s32 hal_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER padapter) -+{ -+ return (s32)GLBtCoexist.bt_info.bt_ctrl_agg_buf_size; -+} -+ -+u32 hal_btcoex_GetAMPDUSize(PADAPTER padapter) -+{ -+ return (u32)GLBtCoexist.bt_info.agg_buf_size; -+} -+ -+void hal_btcoex_SetManualControl(PADAPTER padapter, u8 bmanual) -+{ -+ GLBtCoexist.manual_control = bmanual; -+} -+ -+void hal_btcoex_set_policy_control(PADAPTER padapter, u8 btc_policy) -+{ -+ switch (btc_policy) { -+ case BTCOEX_POLICY_CONTROL_AUTO: -+ GLBtCoexist.coex_sta.force_freerun = _FALSE; -+ GLBtCoexist.coex_sta.force_tdd = _FALSE; -+ break; -+ case BTCOEX_POLICY_CONTROL_FORCE_FREERUN: -+ GLBtCoexist.coex_sta.force_freerun = _TRUE; -+ GLBtCoexist.coex_sta.force_tdd = _FALSE; -+ break; -+ case BTCOEX_POLICY_CONTROL_FORCE_TDMA: -+ GLBtCoexist.coex_sta.force_freerun = _FALSE; -+ GLBtCoexist.coex_sta.force_tdd = _TRUE; -+ break; -+ } -+} -+ -+u8 hal_btcoex_1Ant(PADAPTER padapter) -+{ -+ if (hal_btcoex_IsBtExist(padapter) == _FALSE) -+ return _FALSE; -+ -+ if (GLBtCoexist.board_info.btdm_ant_num == 1) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+u8 hal_btcoex_IsBtControlLps(PADAPTER padapter) -+{ -+ if (GLBtCoexist.bdontenterLPS == _TRUE) -+ return _TRUE; -+ -+ if (hal_btcoex_IsBtExist(padapter) == _FALSE) -+ return _FALSE; -+ -+ if (GLBtCoexist.bt_info.bt_disabled) -+ return _FALSE; -+ -+ if (GLBtCoexist.bt_info.bt_ctrl_lps) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+u8 hal_btcoex_IsLpsOn(PADAPTER padapter) -+{ -+ if (GLBtCoexist.bdontenterLPS == _TRUE) -+ return _FALSE; -+ -+ if (hal_btcoex_IsBtExist(padapter) == _FALSE) -+ return _FALSE; -+ -+ if (GLBtCoexist.bt_info.bt_disabled) -+ return _FALSE; -+ -+ if (GLBtCoexist.bt_info.bt_lps_on) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+u8 hal_btcoex_RpwmVal(PADAPTER padapter) -+{ -+ return GLBtCoexist.bt_info.rpwm_val; -+} -+ -+u8 hal_btcoex_LpsVal(PADAPTER padapter) -+{ -+ return GLBtCoexist.bt_info.lps_val; -+} -+ -+u32 hal_btcoex_GetRaMask(PADAPTER padapter) -+{ -+ if (!hal_btcoex_IsBtExist(padapter)) -+ return 0; -+ -+ if (GLBtCoexist.bt_info.bt_disabled) -+ return 0; -+ -+ /* Modify by YiWei , suggest by Cosa and Jenyu -+ * Remove the limit antenna number , because 2 antenna case (ex: 8192eu)also want to get BT coex report rate mask. -+ */ -+ /*if (GLBtCoexist.board_info.btdm_ant_num != 1) -+ return 0;*/ -+ -+ return GLBtCoexist.bt_info.ra_mask; -+} -+ -+u8 hal_btcoex_query_reduced_wl_pwr_lvl(PADAPTER padapter) -+{ -+ return GLBtCoexist.coex_dm.cur_wl_pwr_lvl; -+} -+ -+void hal_btcoex_set_reduced_wl_pwr_lvl(PADAPTER padapter, u8 val) -+{ -+ GLBtCoexist.coex_dm.cur_wl_pwr_lvl = val; -+} -+ -+void hal_btcoex_do_reduce_wl_pwr_lvl(PADAPTER padapter) -+{ -+ halbtcoutsrc_reduce_wl_tx_power(&GLBtCoexist, 0); -+} -+ -+void hal_btcoex_RecordPwrMode(PADAPTER padapter, u8 *pCmdBuf, u8 cmdLen) -+{ -+ -+ _rtw_memcpy(GLBtCoexist.pwrModeVal, pCmdBuf, cmdLen); -+} -+ -+void hal_btcoex_DisplayBtCoexInfo(PADAPTER padapter, u8 *pbuf, u32 bufsize) -+{ -+ PBTCDBGINFO pinfo; -+ -+ -+ pinfo = &GLBtcDbgInfo; -+ DBG_BT_INFO_INIT(pinfo, pbuf, bufsize); -+ EXhalbtcoutsrc_DisplayBtCoexInfo(&GLBtCoexist); -+ DBG_BT_INFO_INIT(pinfo, NULL, 0); -+} -+ -+void hal_btcoex_SetDBG(PADAPTER padapter, u32 *pDbgModule) -+{ -+ u32 i; -+ -+ -+ if (NULL == pDbgModule) -+ return; -+ -+ for (i = 0; i < COMP_MAX; i++) -+ GLBtcDbgType[i] = pDbgModule[i]; -+} -+ -+u32 hal_btcoex_GetDBG(PADAPTER padapter, u8 *pStrBuf, u32 bufSize) -+{ -+ s32 count; -+ u8 *pstr; -+ u32 leftSize; -+ -+ -+ if ((NULL == pStrBuf) || (0 == bufSize)) -+ return 0; -+ -+ count = 0; -+ pstr = pStrBuf; -+ leftSize = bufSize; -+ /* RTW_INFO(FUNC_ADPT_FMT ": bufsize=%d\n", FUNC_ADPT_ARG(padapter), bufSize); */ -+ -+ count = rtw_sprintf(pstr, leftSize, "#define DBG\t%d\n", DBG); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ -+ count = rtw_sprintf(pstr, leftSize, "BTCOEX Debug Setting:\n"); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ -+ count = rtw_sprintf(pstr, leftSize, -+ "COMP_COEX: 0x%08X\n\n", -+ GLBtcDbgType[COMP_COEX]); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ -+#if 0 -+ count = rtw_sprintf(pstr, leftSize, "INTERFACE Debug Setting Definition:\n"); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[0]=%d for INTF_INIT\n", -+ GLBtcDbgType[BTC_MSG_INTERFACE] & INTF_INIT ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[2]=%d for INTF_NOTIFY\n\n", -+ GLBtcDbgType[BTC_MSG_INTERFACE] & INTF_NOTIFY ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ -+ count = rtw_sprintf(pstr, leftSize, "ALGORITHM Debug Setting Definition:\n"); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[0]=%d for BT_RSSI_STATE\n", -+ GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_BT_RSSI_STATE ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[1]=%d for WIFI_RSSI_STATE\n", -+ GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_WIFI_RSSI_STATE ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[2]=%d for BT_MONITOR\n", -+ GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_BT_MONITOR ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[3]=%d for TRACE\n", -+ GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[4]=%d for TRACE_FW\n", -+ GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_FW ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[5]=%d for TRACE_FW_DETAIL\n", -+ GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_FW_DETAIL ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[6]=%d for TRACE_FW_EXEC\n", -+ GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_FW_EXEC ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[7]=%d for TRACE_SW\n", -+ GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_SW ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[8]=%d for TRACE_SW_DETAIL\n", -+ GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_SW_DETAIL ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+ count = rtw_sprintf(pstr, leftSize, "\tbit[9]=%d for TRACE_SW_EXEC\n", -+ GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_SW_EXEC ? 1 : 0); -+ if ((count < 0) || (count >= leftSize)) -+ goto exit; -+ pstr += count; -+ leftSize -= count; -+#endif -+ -+exit: -+ count = pstr - pStrBuf; -+ /* RTW_INFO(FUNC_ADPT_FMT ": usedsize=%d\n", FUNC_ADPT_ARG(padapter), count); */ -+ -+ return count; -+} -+ -+u8 hal_btcoex_IncreaseScanDeviceNum(PADAPTER padapter) -+{ -+ if (!hal_btcoex_IsBtExist(padapter)) -+ return _FALSE; -+ -+ if (GLBtCoexist.bt_info.increase_scan_dev_num) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+u8 hal_btcoex_IsBtLinkExist(PADAPTER padapter) -+{ -+ if (GLBtCoexist.bt_link_info.bt_link_exist) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+void hal_btcoex_SetBtPatchVersion(PADAPTER padapter, u16 btHciVer, u16 btPatchVer) -+{ -+ EXhalbtcoutsrc_SetBtPatchVersion(btHciVer, btPatchVer); -+} -+ -+void hal_btcoex_SetHciVersion(PADAPTER padapter, u16 hciVersion) -+{ -+ EXhalbtcoutsrc_SetHciVersion(hciVersion); -+} -+ -+void hal_btcoex_StackUpdateProfileInfo(void) -+{ -+ EXhalbtcoutsrc_StackUpdateProfileInfo(); -+} -+ -+void hal_btcoex_pta_off_on_notify(PADAPTER padapter, u8 bBTON) -+{ -+ ex_halbtcoutsrc_pta_off_on_notify(&GLBtCoexist, bBTON); -+} -+ -+/* -+ * Description: -+ * Setting BT coex antenna isolation type . -+ * coex mechanisn/ spital stream/ best throughput -+ * anttype = 0 , PSTDMA / 2SS / 0.5T , bad isolation , WiFi/BT ANT Distance<15cm , (<20dB) for 2,3 antenna -+ * anttype = 1 , PSTDMA / 1SS / 0.5T , normal isolaiton , 50cm>WiFi/BT ANT Distance>15cm , (>20dB) for 2 antenna -+ * anttype = 2 , TDMA / 2SS / T , normal isolaiton , 50cm>WiFi/BT ANT Distance>15cm , (>20dB) for 3 antenna -+ * anttype = 3 , no TDMA / 1SS / 0.5T , good isolation , WiFi/BT ANT Distance >50cm , (>40dB) for 2 antenna -+ * anttype = 4 , no TDMA / 2SS / T , good isolation , WiFi/BT ANT Distance >50cm , (>40dB) for 3 antenna -+ * wifi only throughput ~ T -+ * wifi/BT share one antenna with SPDT -+ */ -+void hal_btcoex_SetAntIsolationType(PADAPTER padapter, u8 anttype) -+{ -+ PHAL_DATA_TYPE pHalData; -+ PBTC_COEXIST pBtCoexist = &GLBtCoexist; -+ -+ /*RTW_INFO("####%s , anttype = %d , %d\n" , __func__ , anttype , __LINE__); */ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ -+ pHalData->bt_coexist.btAntisolation = anttype; -+ -+ switch (pHalData->bt_coexist.btAntisolation) { -+ case 0: -+ pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_0; -+ break; -+ case 1: -+ pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_1; -+ break; -+ case 2: -+ pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_2; -+ break; -+ case 3: -+ pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_3; -+ break; -+ case 4: -+ pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_4; -+ break; -+ } -+ -+} -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+int -+hal_btcoex_ParseAntIsolationConfigFile( -+ PADAPTER Adapter, -+ char *buffer -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u32 i = 0 , j = 0; -+ char *szLine , *ptmp; -+ int rtStatus = _SUCCESS; -+ char param_value_string[10]; -+ u8 param_value; -+ u8 anttype = 4; -+ -+ u8 ant_num = 3 , ant_distance = 50 , rfe_type = 1; -+ -+ typedef struct ant_isolation { -+ char *param_name; /* antenna isolation config parameter name */ -+ u8 *value; /* antenna isolation config parameter value */ -+ } ANT_ISOLATION; -+ -+ ANT_ISOLATION ant_isolation_param[] = { -+ {"ANT_NUMBER" , &ant_num}, -+ {"ANT_DISTANCE" , &ant_distance}, -+ {"RFE_TYPE" , &rfe_type}, -+ {NULL , 0} -+ }; -+ -+ -+ -+ /* RTW_INFO("===>Hal_ParseAntIsolationConfigFile()\n" ); */ -+ -+ ptmp = buffer; -+ for (szLine = GetLineFromBuffer(ptmp) ; szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { -+ /* skip comment */ -+ if (IsCommentString(szLine)) -+ continue; -+ -+ /* RTW_INFO("%s : szLine = %s , strlen(szLine) = %d\n" , __func__ , szLine , strlen(szLine));*/ -+ for (j = 0 ; ant_isolation_param[j].param_name != NULL ; j++) { -+ if (strstr(szLine , ant_isolation_param[j].param_name) != NULL) { -+ i = 0; -+ while (i < strlen(szLine)) { -+ if (szLine[i] != '"') -+ ++i; -+ else { -+ /* skip only has one " */ -+ if (strpbrk(szLine , "\"") == strrchr(szLine , '"')) { -+ RTW_INFO("Fail to parse parameters , format error!\n"); -+ break; -+ } -+ _rtw_memset((void *)param_value_string , 0 , 10); -+ if (!ParseQualifiedString(szLine , &i , param_value_string , '"' , '"')) { -+ RTW_INFO("Fail to parse parameters\n"); -+ return _FAIL; -+ } else if (!GetU1ByteIntegerFromStringInDecimal(param_value_string , ant_isolation_param[j].value)) -+ RTW_INFO("Fail to GetU1ByteIntegerFromStringInDecimal\n"); -+ -+ break; -+ } -+ } -+ } -+ } -+ } -+ -+ /* YiWei 20140716 , for BT coex antenna isolation control */ -+ /* rfe_type = 0 was SPDT , rfe_type = 1 was coupler */ -+ if (ant_num == 3 && ant_distance >= 50) -+ anttype = 3; -+ else if (ant_num == 2 && ant_distance >= 50 && rfe_type == 1) -+ anttype = 2; -+ else if (ant_num == 3 && ant_distance >= 15 && ant_distance < 50) -+ anttype = 2; -+ else if (ant_num == 2 && ant_distance >= 15 && ant_distance < 50 && rfe_type == 1) -+ anttype = 2; -+ else if ((ant_num == 2 && ant_distance < 15 && rfe_type == 1) || (ant_num == 3 && ant_distance < 15)) -+ anttype = 1; -+ else if (ant_num == 2 && rfe_type == 0) -+ anttype = 0; -+ else -+ anttype = 0; -+ -+ hal_btcoex_SetAntIsolationType(Adapter, anttype); -+ -+ RTW_INFO("%s : ant_num = %d\n" , __func__ , ant_num); -+ RTW_INFO("%s : ant_distance = %d\n" , __func__ , ant_distance); -+ RTW_INFO("%s : rfe_type = %d\n" , __func__ , rfe_type); -+ /* RTW_INFO("<===Hal_ParseAntIsolationConfigFile()\n"); */ -+ return rtStatus; -+} -+ -+ -+int -+hal_btcoex_AntIsolationConfig_ParaFile( -+ PADAPTER Adapter, -+ char *pFileName -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ int rlen = 0 , rtStatus = _FAIL; -+ -+ _rtw_memset(pHalData->para_file_buf , 0 , MAX_PARA_FILE_BUF_LEN); -+ -+ rtw_get_phy_file_path(Adapter, pFileName); -+ if (rtw_is_file_readable(rtw_phy_para_file_path) == _TRUE) { -+ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); -+ if (rlen > 0) -+ rtStatus = _SUCCESS; -+ } -+ -+ -+ if (rtStatus == _SUCCESS) { -+ /*RTW_INFO("%s(): read %s ok\n", __func__ , pFileName);*/ -+ rtStatus = hal_btcoex_ParseAntIsolationConfigFile(Adapter , pHalData->para_file_buf); -+ } else -+ RTW_INFO("%s(): No File %s, Load from *** Array!\n" , __func__ , pFileName); -+ -+ return rtStatus; -+} -+#endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */ -+ -+u16 hal_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data) -+{ -+ u16 ret = 0; -+ -+ halbtcoutsrc_LeaveLowPower(&GLBtCoexist); -+ -+ ret = halbtcoutsrc_GetBtReg_with_status(&GLBtCoexist, type, addr, data); -+ -+ halbtcoutsrc_NormalLowPower(&GLBtCoexist); -+ -+ return ret; -+} -+ -+u16 hal_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val) -+{ -+ u16 ret = 0; -+ -+ halbtcoutsrc_LeaveLowPower(&GLBtCoexist); -+ -+ ret = halbtcoutsrc_SetBtReg(&GLBtCoexist, type, addr, val); -+ -+ halbtcoutsrc_NormalLowPower(&GLBtCoexist); -+ -+ return ret; -+} -+ -+void hal_btcoex_set_rfe_type(u8 type) -+{ -+ EXhalbtcoutsrc_set_rfe_type(type); -+} -+ -+#ifdef CONFIG_RF4CE_COEXIST -+void hal_btcoex_set_rf4ce_link_state(u8 state) -+{ -+ EXhalbtcoutsrc_set_rf4ce_link_state(state); -+} -+ -+u8 hal_btcoex_get_rf4ce_link_state(void) -+{ -+ return EXhalbtcoutsrc_get_rf4ce_link_state(); -+} -+#endif /* CONFIG_RF4CE_COEXIST */ -+ -+void hal_btcoex_switchband_notify(u8 under_scan, u8 band_type) -+{ -+ switch (band_type) { -+ case BAND_ON_2_4G: -+ if (under_scan) -+ EXhalbtcoutsrc_switchband_notify(&GLBtCoexist, BTC_SWITCH_TO_24G); -+ else -+ EXhalbtcoutsrc_switchband_notify(&GLBtCoexist, BTC_SWITCH_TO_24G_NOFORSCAN); -+ break; -+ case BAND_ON_5G: -+ EXhalbtcoutsrc_switchband_notify(&GLBtCoexist, BTC_SWITCH_TO_5G); -+ break; -+ default: -+ RTW_INFO("[BTCOEX] unkown switch band type\n"); -+ break; -+ } -+} -+ -+void hal_btcoex_WlFwDbgInfoNotify(PADAPTER padapter, u8* tmpBuf, u8 length) -+{ -+ EXhalbtcoutsrc_WlFwDbgInfoNotify(&GLBtCoexist, tmpBuf, length); -+} -+ -+void hal_btcoex_rx_rate_change_notify(PADAPTER padapter, u8 is_data_frame, u8 rate_id) -+{ -+ EXhalbtcoutsrc_rx_rate_change_notify(&GLBtCoexist, is_data_frame, EXhalbtcoutsrc_rate_id_to_btc_rate_id(rate_id)); -+} -+ -+u16 hal_btcoex_btset_testode(PADAPTER padapter, u8 type) -+{ -+ u16 ret = 0; -+ -+ halbtcoutsrc_LeaveLowPower(&GLBtCoexist); -+ -+ ret = halbtcoutsrc_setbttestmode(&GLBtCoexist, type); -+ -+ halbtcoutsrc_NormalLowPower(&GLBtCoexist); -+ -+ return ret; -+} -+ -+#endif /* CONFIG_BT_COEXIST */ -diff --git a/drivers/staging/rtl8723cs/hal/hal_btcoex_wifionly.c b/drivers/staging/rtl8723cs/hal/hal_btcoex_wifionly.c -new file mode 100644 -index 000000000000..a9ef07f14a31 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_btcoex_wifionly.c -@@ -0,0 +1,279 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include -+ -+#if (CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG == 1) -+ -+#include "btc/mp_precomp.h" -+ -+struct wifi_only_cfg GLBtCoexistWifiOnly; -+ -+void halwifionly_write1byte(void *pwifionlyContext, u32 RegAddr, u8 Data) -+{ -+ struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; -+ PADAPTER Adapter = pwifionlycfg->Adapter; -+ -+ rtw_write8(Adapter, RegAddr, Data); -+} -+ -+void halwifionly_write2byte(void *pwifionlyContext, u32 RegAddr, u16 Data) -+{ -+ struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; -+ PADAPTER Adapter = pwifionlycfg->Adapter; -+ -+ rtw_write16(Adapter, RegAddr, Data); -+} -+ -+void halwifionly_write4byte(void *pwifionlyContext, u32 RegAddr, u32 Data) -+{ -+ struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; -+ PADAPTER Adapter = pwifionlycfg->Adapter; -+ -+ rtw_write32(Adapter, RegAddr, Data); -+} -+ -+u8 halwifionly_read1byte(void *pwifionlyContext, u32 RegAddr) -+{ -+ struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; -+ PADAPTER Adapter = pwifionlycfg->Adapter; -+ -+ return rtw_read8(Adapter, RegAddr); -+} -+ -+u16 halwifionly_read2byte(void * pwifionlyContext, u32 RegAddr) -+{ -+ struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; -+ PADAPTER Adapter = pwifionlycfg->Adapter; -+ -+ return rtw_read16(Adapter, RegAddr); -+} -+ -+u32 halwifionly_read4byte(void *pwifionlyContext, u32 RegAddr) -+{ -+ struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; -+ PADAPTER Adapter = pwifionlycfg->Adapter; -+ -+ return rtw_read32(Adapter, RegAddr); -+} -+ -+void halwifionly_bitmaskwrite1byte(void *pwifionlyContext, u32 regAddr, u8 bitMask, u8 data) -+{ -+ u8 originalValue, bitShift = 0; -+ u8 i; -+ -+ struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; -+ PADAPTER Adapter = pwifionlycfg->Adapter; -+ -+ if (bitMask != 0xff) { -+ originalValue = rtw_read8(Adapter, regAddr); -+ for (i = 0; i <= 7; i++) { -+ if ((bitMask >> i) & 0x1) -+ break; -+ } -+ bitShift = i; -+ data = ((originalValue) & (~bitMask)) | (((data << bitShift)) & bitMask); -+ } -+ rtw_write8(Adapter, regAddr, data); -+} -+ -+void halwifionly_phy_set_rf_reg(void *pwifionlyContext, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data) -+{ -+ struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; -+ PADAPTER Adapter = pwifionlycfg->Adapter; -+ -+ phy_set_rf_reg(Adapter, eRFPath, RegAddr, BitMask, Data); -+} -+ -+void halwifionly_phy_set_bb_reg(void *pwifionlyContext, u32 RegAddr, u32 BitMask, u32 Data) -+{ -+ struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext; -+ PADAPTER Adapter = pwifionlycfg->Adapter; -+ -+ phy_set_bb_reg(Adapter, RegAddr, BitMask, Data); -+} -+ -+void hal_btcoex_wifionly_switchband_notify(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 is_5g = _FALSE; -+ -+ if (pHalData->current_band_type == BAND_ON_5G) -+ is_5g = _TRUE; -+ -+ if (IS_HARDWARE_TYPE_8822B(padapter)) { -+#ifdef CONFIG_RTL8822B -+ ex_hal8822b_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(padapter)) -+ ex_hal8821c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ -+#ifdef CONFIG_RTL8822C -+ else if (IS_HARDWARE_TYPE_8822C(padapter)) -+ ex_hal8822c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ -+#ifdef CONFIG_RTL8814B -+ else if (IS_HARDWARE_TYPE_8814B(padapter)) -+ ex_hal8814b_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ -+#ifdef CONFIG_RTL8723F -+ else if (IS_HARDWARE_TYPE_8723F(padapter)) -+ ex_hal8723f_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+} -+ -+void hal_btcoex_wifionly_scan_notify(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 is_5g = _FALSE; -+ -+ if (pHalData->current_band_type == BAND_ON_5G) -+ is_5g = _TRUE; -+ -+ if (IS_HARDWARE_TYPE_8822B(padapter)) { -+#ifdef CONFIG_RTL8822B -+ ex_hal8822b_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(padapter)) -+ ex_hal8821c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ -+#ifdef CONFIG_RTL8822C -+ else if (IS_HARDWARE_TYPE_8822C(padapter)) -+ ex_hal8822c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ -+#ifdef CONFIG_RTL8814B -+ else if (IS_HARDWARE_TYPE_8814B(padapter)) -+ ex_hal8814b_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+} -+ -+void hal_btcoex_wifionly_connect_notify(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 is_5g = _FALSE; -+ -+ if (pHalData->current_band_type == BAND_ON_5G) -+ is_5g = _TRUE; -+ -+ if (IS_HARDWARE_TYPE_8822B(padapter)) { -+#ifdef CONFIG_RTL8822B -+ ex_hal8822b_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(padapter)) -+ ex_hal8821c_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ -+#ifdef CONFIG_RTL8822C -+ else if (IS_HARDWARE_TYPE_8822C(padapter)) -+ ex_hal8822c_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ -+#ifdef CONFIG_RTL8814B -+ else if (IS_HARDWARE_TYPE_8814B(padapter)) -+ ex_hal8814b_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+ -+#ifdef CONFIG_RTL8723F -+ else if (IS_HARDWARE_TYPE_8723F(padapter)) -+ ex_hal8723f_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g); -+#endif -+} -+ -+void hal_btcoex_wifionly_hw_config(PADAPTER padapter) -+{ -+ struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly; -+ -+ if (IS_HARDWARE_TYPE_8723B(padapter)) { -+#ifdef CONFIG_RTL8723B -+ ex_hal8723b_wifi_only_hw_config(pwifionlycfg); -+#endif -+ } -+ -+#ifdef CONFIG_RTL8822B -+ else if (IS_HARDWARE_TYPE_8822B(padapter)) -+ ex_hal8822b_wifi_only_hw_config(pwifionlycfg); -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ else if (IS_HARDWARE_TYPE_8821C(padapter)) -+ ex_hal8821c_wifi_only_hw_config(pwifionlycfg); -+#endif -+ -+#ifdef CONFIG_RTL8822C -+ else if (IS_HARDWARE_TYPE_8822C(padapter)) -+ ex_hal8822c_wifi_only_hw_config(pwifionlycfg); -+#endif -+ -+#ifdef CONFIG_RTL8814B -+ else if (IS_HARDWARE_TYPE_8814B(padapter)) -+ ex_hal8814b_wifi_only_hw_config(pwifionlycfg); -+#endif -+ -+#ifdef CONFIG_RTL8723F -+ else if (IS_HARDWARE_TYPE_8723F(padapter)) -+ ex_hal8723f_wifi_only_hw_config(pwifionlycfg); -+#endif -+} -+ -+void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter) -+{ -+ struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly; -+ struct wifi_only_haldata *pwifionly_haldata = &pwifionlycfg->haldata_info; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ _rtw_memset(&GLBtCoexistWifiOnly, 0, sizeof(GLBtCoexistWifiOnly)); -+ -+ pwifionlycfg->Adapter = padapter; -+ -+#ifdef CONFIG_PCI_HCI -+ pwifionlycfg->chip_interface = WIFIONLY_INTF_PCI; -+#elif defined(CONFIG_USB_HCI) -+ pwifionlycfg->chip_interface = WIFIONLY_INTF_USB; -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pwifionlycfg->chip_interface = WIFIONLY_INTF_SDIO; -+#else -+ pwifionlycfg->chip_interface = WIFIONLY_INTF_UNKNOWN; -+#endif -+ -+ pwifionly_haldata->customer_id = CUSTOMER_NORMAL; -+} -+ -+void hal_btcoex_wifionly_AntInfoSetting(PADAPTER padapter) -+{ -+ struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly; -+ struct wifi_only_haldata *pwifionly_haldata = &pwifionlycfg->haldata_info; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ pwifionly_haldata->efuse_pg_antnum = pHalData->EEPROMBluetoothAntNum; -+ pwifionly_haldata->efuse_pg_antpath = pHalData->ant_path; -+ pwifionly_haldata->rfe_type = pHalData->rfe_type; -+ pwifionly_haldata->ant_div_cfg = pHalData->AntDivCfg; -+} -+ -+#endif -+ -diff --git a/drivers/staging/rtl8723cs/hal/hal_com.c b/drivers/staging/rtl8723cs/hal/hal_com.c -new file mode 100644 -index 000000000000..a0f15958a778 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_com.c -@@ -0,0 +1,16525 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _HAL_COM_C_ -+ -+#include -+#include "hal_com_h2c.h" -+ -+#include "hal_data.h" -+ -+#ifdef RTW_HALMAC -+#include "../../hal/hal_halmac.h" -+#endif -+ -+void rtw_dump_fw_info(void *sel, _adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = NULL; -+ -+ if (!adapter) -+ return; -+ -+ hal_data = GET_HAL_DATA(adapter); -+ if (hal_data->bFWReady) -+ RTW_PRINT_SEL(sel, "FW VER -%d.%d\n", hal_data->firmware_version, hal_data->firmware_sub_version); -+ else -+ RTW_PRINT_SEL(sel, "FW not ready\n"); -+} -+ -+bool rsvd_page_cache_update_all(struct rsvd_page_cache_t *cache, u8 loc -+ , u8 txdesc_len, u32 page_size, u8 *info, u32 info_len) -+{ -+ u8 page_num; -+ bool modified = 0; -+ bool loc_mod = 0, size_mod = 0, page_num_mod = 0; -+ -+ page_num = info_len ? (u8)PageNum(txdesc_len + info_len, page_size) : 0; -+ if (!info_len) -+ loc = 0; -+ -+ if (cache->loc != loc) { -+ RTW_INFO("%s %s loc change (%u -> %u)\n" -+ , __func__, cache->name, cache->loc, loc); -+ loc_mod = 1; -+ } -+ if (cache->size != info_len) { -+ RTW_INFO("%s %s size change (%u -> %u)\n" -+ , __func__, cache->name, cache->size, info_len); -+ size_mod = 1; -+ } -+ if (cache->page_num != page_num) { -+ RTW_INFO("%s %s page_num change (%u -> %u)\n" -+ , __func__, cache->name, cache->page_num, page_num); -+ page_num_mod = 1; -+ } -+ -+ if (info && info_len) { -+ if (cache->data) { -+ if (cache->size == info_len) { -+ if (_rtw_memcmp(cache->data, info, info_len) != _TRUE) { -+ RTW_INFO("%s %s data change\n", __func__, cache->name); -+ modified = 1; -+ } -+ } else -+ rsvd_page_cache_free_data(cache); -+ } -+ -+ if (!cache->data) { -+ cache->data = rtw_malloc(info_len); -+ if (!cache->data) { -+ RTW_ERR("%s %s alloc data with size(%u) fail\n" -+ , __func__, cache->name, info_len); -+ rtw_warn_on(1); -+ } else { -+ RTW_INFO("%s %s alloc data with size(%u)\n" -+ , __func__, cache->name, info_len); -+ } -+ modified = 1; -+ } -+ -+ if (cache->data && modified) -+ _rtw_memcpy(cache->data, info, info_len); -+ } else { -+ if (cache->data && size_mod) -+ rsvd_page_cache_free_data(cache); -+ } -+ -+ cache->loc = loc; -+ cache->page_num = page_num; -+ cache->size = info_len; -+ -+ return modified | loc_mod | size_mod | page_num_mod; -+} -+ -+bool rsvd_page_cache_update_data(struct rsvd_page_cache_t *cache, u8 *info, u32 info_len) -+{ -+ bool modified = 0; -+ -+ if (!info || !info_len) { -+ RTW_WARN("%s %s invalid input(info:%p, info_len:%u)\n" -+ , __func__, cache->name, info, info_len); -+ goto exit; -+ } -+ -+ if (!cache->loc || !cache->page_num || !cache->size) { -+ RTW_ERR("%s %s layout not ready(loc:%u, page_num:%u, size:%u)\n" -+ , __func__, cache->name, cache->loc, cache->page_num, cache->size); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (cache->size != info_len) { -+ RTW_ERR("%s %s size(%u) differ with info_len(%u)\n" -+ , __func__, cache->name, cache->size, info_len); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (!cache->data) { -+ cache->data = rtw_zmalloc(cache->size); -+ if (!cache->data) { -+ RTW_ERR("%s %s alloc data with size(%u) fail\n" -+ , __func__, cache->name, cache->size); -+ rtw_warn_on(1); -+ goto exit; -+ } else { -+ RTW_INFO("%s %s alloc data with size(%u)\n" -+ , __func__, cache->name, info_len); -+ } -+ modified = 1; -+ } -+ -+ if (_rtw_memcmp(cache->data, info, cache->size) == _FALSE) { -+ RTW_INFO("%s %s data change\n", __func__, cache->name); -+ _rtw_memcpy(cache->data, info, cache->size); -+ modified = 1; -+ } -+ -+exit: -+ return modified; -+} -+ -+void rsvd_page_cache_free_data(struct rsvd_page_cache_t *cache) -+{ -+ if (cache->data) { -+ rtw_mfree(cache->data, cache->size); -+ cache->data = NULL; -+ } -+} -+ -+void rsvd_page_cache_free(struct rsvd_page_cache_t *cache) -+{ -+ cache->loc = 0; -+ cache->page_num = 0; -+ rsvd_page_cache_free_data(cache); -+ cache->size = 0; -+} -+ -+/* #define CONFIG_GTK_OL_DBG */ -+ -+/*#define DBG_SEC_CAM_MOVE*/ -+#ifdef DBG_SEC_CAM_MOVE -+void rtw_hal_move_sta_gk_to_dk(_adapter *adapter) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ int cam_id, index = 0; -+ u8 *addr = NULL; -+ -+ if (!MLME_IS_STA(adapter)) -+ return; -+ -+ addr = get_bssid(pmlmepriv); -+ -+ if (addr == NULL) { -+ RTW_INFO("%s: get bssid MAC addr fail!!\n", __func__); -+ return; -+ } -+ -+ rtw_clean_dk_section(adapter); -+ -+ do { -+ cam_id = rtw_camid_search(adapter, addr, index, 1); -+ -+ if (cam_id == -1) -+ RTW_INFO("%s: cam_id: %d, key_id:%d\n", __func__, cam_id, index); -+ else -+ rtw_sec_cam_swap(adapter, cam_id, index); -+ -+ index++; -+ } while (index < 4); -+ -+} -+ -+void rtw_hal_read_sta_dk_key(_adapter *adapter, u8 key_id) -+{ -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ u8 get_key[16]; -+ -+ _rtw_memset(get_key, 0, sizeof(get_key)); -+ -+ if (key_id > 4) { -+ RTW_INFO("%s [ERROR] gtk_keyindex:%d invalid\n", __func__, key_id); -+ rtw_warn_on(1); -+ return; -+ } -+ rtw_sec_read_cam_ent(adapter, key_id, NULL, NULL, get_key); -+ -+ /*update key into related sw variable*/ -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ if (_rtw_camid_is_gk(adapter, key_id)) { -+ RTW_INFO("[HW KEY] -Key-id:%d "KEY_FMT"\n", key_id, KEY_ARG(get_key)); -+ RTW_INFO("[cam_cache KEY] - Key-id:%d "KEY_FMT"\n", key_id, KEY_ARG(&dvobj->cam_cache[key_id].key)); -+ } -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ -+} -+#endif -+ -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ char rtw_phy_para_file_path[PATH_LENGTH_MAX]; -+#endif -+ -+void dump_chip_info(HAL_VERSION ChipVersion) -+{ -+ int cnt = 0; -+ u8 buf[128] = {0}; -+ -+ if (IS_8188E(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_"); -+ else if (IS_8188F(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188F_"); -+ else if (IS_8188GTV(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188GTV_"); -+ else if (IS_8812_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8812_"); -+ else if (IS_8192E(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8192E_"); -+ else if (IS_8821_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8821_"); -+ else if (IS_8723B_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8723B_"); -+ else if (IS_8703B_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8703B_"); -+ else if (IS_8723D_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8723D_"); -+ else if (IS_8814A_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8814A_"); -+ else if (IS_8822B_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8822B_"); -+ else if (IS_8821C_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8821C_"); -+ else if (IS_8710B_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8710B_"); -+ else if (IS_8192F_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8192F_"); -+ else if (IS_8822C_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8822C_"); -+ else if (IS_8814B_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8814B_"); -+ else if (IS_8723F_SERIES(ChipVersion)) -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8723F_"); -+ else -+ cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_UNKNOWN_"); -+ -+ cnt += sprintf((buf + cnt), "%s", IS_NORMAL_CHIP(ChipVersion) ? "" : "T_"); -+ -+ if (IS_CHIP_VENDOR_TSMC(ChipVersion)) -+ cnt += sprintf((buf + cnt), "%s", "T"); -+ else if (IS_CHIP_VENDOR_UMC(ChipVersion)) -+ cnt += sprintf((buf + cnt), "%s", "U"); -+ else if (IS_CHIP_VENDOR_SMIC(ChipVersion)) -+ cnt += sprintf((buf + cnt), "%s", "S"); -+ -+ if (IS_A_CUT(ChipVersion)) -+ cnt += sprintf((buf + cnt), "1_"); -+ else if (IS_B_CUT(ChipVersion)) -+ cnt += sprintf((buf + cnt), "2_"); -+ else if (IS_C_CUT(ChipVersion)) -+ cnt += sprintf((buf + cnt), "3_"); -+ else if (IS_D_CUT(ChipVersion)) -+ cnt += sprintf((buf + cnt), "4_"); -+ else if (IS_E_CUT(ChipVersion)) -+ cnt += sprintf((buf + cnt), "5_"); -+ else if (IS_F_CUT(ChipVersion)) -+ cnt += sprintf((buf + cnt), "6_"); -+ else if (IS_I_CUT(ChipVersion)) -+ cnt += sprintf((buf + cnt), "9_"); -+ else if (IS_J_CUT(ChipVersion)) -+ cnt += sprintf((buf + cnt), "10_"); -+ else if (IS_K_CUT(ChipVersion)) -+ cnt += sprintf((buf + cnt), "11_"); -+ else -+ cnt += sprintf((buf + cnt), "UNKNOWN_Cv(%d)_", ChipVersion.CUTVersion); -+ -+ if (IS_1T1R(ChipVersion)) -+ cnt += sprintf((buf + cnt), "1T1R_"); -+ else if (IS_1T2R(ChipVersion)) -+ cnt += sprintf((buf + cnt), "1T2R_"); -+ else if (IS_2T2R(ChipVersion)) -+ cnt += sprintf((buf + cnt), "2T2R_"); -+ else if (IS_3T3R(ChipVersion)) -+ cnt += sprintf((buf + cnt), "3T3R_"); -+ else if (IS_3T4R(ChipVersion)) -+ cnt += sprintf((buf + cnt), "3T4R_"); -+ else if (IS_4T4R(ChipVersion)) -+ cnt += sprintf((buf + cnt), "4T4R_"); -+ else -+ cnt += sprintf((buf + cnt), "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType); -+ -+ cnt += sprintf((buf + cnt), "RomVer(%d)\n", ChipVersion.ROMVer); -+ -+ RTW_INFO("%s", buf); -+} -+ -+u8 rtw_hal_get_port(_adapter *adapter) -+{ -+ u8 hw_port = get_hw_port(adapter); -+#ifdef CONFIG_CLIENT_PORT_CFG -+ u8 clt_port = get_clt_port(adapter); -+ -+ if (clt_port) -+ hw_port = clt_port; -+ -+#ifdef DBG_HW_PORT -+ if (MLME_IS_STA(adapter) && (adapter->client_id != MAX_CLIENT_PORT_NUM)) { -+ if(hw_port == CLT_PORT_INVALID) { -+ RTW_ERR(ADPT_FMT" @@@@@ Client port == 0 @@@@@\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ } -+ } -+ #ifdef CONFIG_AP_MODE -+ else if (MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) { -+ if (hw_port != HW_PORT0) { -+ RTW_ERR(ADPT_FMT" @@@@@ AP / MESH port != 0 @@@@@\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ } -+ } -+ #endif -+ if (0) -+ RTW_INFO(ADPT_FMT" - HP:%d,CP:%d\n", ADPT_ARG(adapter), get_hw_port(adapter), get_clt_port(adapter)); -+#endif /*DBG_HW_PORT*/ -+ -+#endif/*CONFIG_CLIENT_PORT_CFG*/ -+ -+ return hw_port; -+} -+ -+#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 -+ -+/* -+ * Description: -+ * Use hardware(efuse), driver parameter(registry) and default channel plan -+ * to decide which one should be used. -+ * -+ * Parameters: -+ * padapter pointer of adapter -+ * hw_alpha2 country code from HW (efuse/eeprom/mapfile) -+ * hw_chplan channel plan from HW (efuse/eeprom/mapfile) -+ * BIT[7] software configure mode; 0:Enable, 1:disable -+ * BIT[6:0] Channel Plan -+ * sw_alpha2 country code from HW (registry/module param) -+ * sw_chplan channel plan from SW (registry/module param) -+ * AutoLoadFail efuse autoload fail or not -+ * -+ */ -+void hal_com_config_channel_plan( -+ PADAPTER padapter, -+ char *hw_alpha2, -+ u8 hw_chplan, -+ char *sw_alpha2, -+ u8 sw_chplan, -+ BOOLEAN AutoLoadFail -+) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ PHAL_DATA_TYPE pHalData; -+ u8 force_hw_chplan = _FALSE; -+ int chplan = -1; -+ const struct country_chplan *country_ent = NULL, *ent; -+ u8 def_chplan = 0x7F; /* Realtek define, used when HW, SW both invalid */ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ /* treat 0xFF as invalid value, bypass hw_chplan & force_hw_chplan parsing */ -+ if (hw_chplan == 0xFF) -+ goto chk_hw_country_code; -+ -+ if (AutoLoadFail == _TRUE) -+ goto chk_sw_config; -+ -+#ifndef CONFIG_FORCE_SW_CHANNEL_PLAN -+ if (hw_chplan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) -+ force_hw_chplan = _TRUE; -+#endif -+ -+ hw_chplan &= (~EEPROM_CHANNEL_PLAN_BY_HW_MASK); -+ -+chk_hw_country_code: -+ if (hw_alpha2 && !IS_ALPHA2_NO_SPECIFIED(hw_alpha2)) { -+ ent = rtw_get_chplan_from_country(hw_alpha2); -+ if (ent) { -+ /* get chplan from hw country code, by pass hw chplan setting */ -+ country_ent = ent; -+ chplan = ent->chplan; -+ goto chk_sw_config; -+ } else -+ RTW_PRINT("%s unsupported hw_alpha2:\"%c%c\"\n", __func__, hw_alpha2[0], hw_alpha2[1]); -+ } -+ -+ if (rtw_is_channel_plan_valid(hw_chplan)) -+ chplan = hw_chplan; -+ else if (force_hw_chplan == _TRUE) { -+ RTW_PRINT("%s unsupported hw_chplan:0x%02X\n", __func__, hw_chplan); -+ /* hw infomaton invalid, refer to sw information */ -+ force_hw_chplan = _FALSE; -+ } -+ -+chk_sw_config: -+ if (force_hw_chplan == _TRUE) -+ goto done; -+ -+ if (sw_alpha2 && !IS_ALPHA2_NO_SPECIFIED(sw_alpha2)) { -+ ent = rtw_get_chplan_from_country(sw_alpha2); -+ if (ent) { -+ /* get chplan from sw country code, by pass sw chplan setting */ -+ country_ent = ent; -+ chplan = ent->chplan; -+ goto done; -+ } else -+ RTW_PRINT("%s unsupported sw_alpha2:\"%c%c\"\n", __func__, sw_alpha2[0], sw_alpha2[1]); -+ } -+ -+ if (rtw_is_channel_plan_valid(sw_chplan)) { -+ /* cancel hw_alpha2 because chplan is specified by sw_chplan*/ -+ country_ent = NULL; -+ chplan = sw_chplan; -+ } else if (sw_chplan != RTW_CHPLAN_UNSPECIFIED) -+ RTW_PRINT("%s unsupported sw_chplan:0x%02X\n", __func__, sw_chplan); -+ -+done: -+ if (chplan == -1) { -+ RTW_PRINT("%s use def_chplan:0x%02X\n", __func__, def_chplan); -+ chplan = def_chplan; -+ } else if (country_ent) { -+ RTW_PRINT("%s country code:\"%c%c\" with chplan:0x%02X\n", __func__ -+ , country_ent->alpha2[0], country_ent->alpha2[1], country_ent->chplan); -+ } else -+ RTW_PRINT("%s chplan:0x%02X\n", __func__, chplan); -+ -+ rfctl->country_ent = country_ent; -+ rfctl->ChannelPlan = chplan; -+ pHalData->bDisableSWChannelPlan = force_hw_chplan; -+} -+ -+BOOLEAN -+HAL_IsLegalChannel( -+ PADAPTER Adapter, -+ u32 Channel -+) -+{ -+ BOOLEAN bLegalChannel = _TRUE; -+ -+ if (Channel > 14) { -+ if (is_supported_5g(Adapter->registrypriv.wireless_mode) == _FALSE) { -+ bLegalChannel = _FALSE; -+ RTW_INFO("Channel > 14 but wireless_mode do not support 5G\n"); -+ } -+ } else if ((Channel <= 14) && (Channel >= 1)) { -+ if (IsSupported24G(Adapter->registrypriv.wireless_mode) == _FALSE) { -+ bLegalChannel = _FALSE; -+ RTW_INFO("(Channel <= 14) && (Channel >=1) but wireless_mode do not support 2.4G\n"); -+ } -+ } else { -+ bLegalChannel = _FALSE; -+ RTW_INFO("Channel is Invalid !!!\n"); -+ } -+ -+ return bLegalChannel; -+} -+ -+static const u8 _MRateToHwRate[MGN_UNKNOWN] = { -+ [MGN_1M] = DESC_RATE1M, -+ [MGN_2M] = DESC_RATE2M, -+ [MGN_5_5M] = DESC_RATE5_5M, -+ [MGN_11M] = DESC_RATE11M, -+ [MGN_6M] = DESC_RATE6M, -+ [MGN_9M] = DESC_RATE9M, -+ [MGN_12M] = DESC_RATE12M, -+ [MGN_18M] = DESC_RATE18M, -+ [MGN_24M] = DESC_RATE24M, -+ [MGN_36M] = DESC_RATE36M, -+ [MGN_48M] = DESC_RATE48M, -+ [MGN_54M] = DESC_RATE54M, -+ [MGN_MCS0] = DESC_RATEMCS0, -+ [MGN_MCS1] = DESC_RATEMCS1, -+ [MGN_MCS2] = DESC_RATEMCS2, -+ [MGN_MCS3] = DESC_RATEMCS3, -+ [MGN_MCS4] = DESC_RATEMCS4, -+ [MGN_MCS5] = DESC_RATEMCS5, -+ [MGN_MCS6] = DESC_RATEMCS6, -+ [MGN_MCS7] = DESC_RATEMCS7, -+ [MGN_MCS8] = DESC_RATEMCS8, -+ [MGN_MCS9] = DESC_RATEMCS9, -+ [MGN_MCS10] = DESC_RATEMCS10, -+ [MGN_MCS11] = DESC_RATEMCS11, -+ [MGN_MCS12] = DESC_RATEMCS12, -+ [MGN_MCS13] = DESC_RATEMCS13, -+ [MGN_MCS14] = DESC_RATEMCS14, -+ [MGN_MCS15] = DESC_RATEMCS15, -+ [MGN_MCS16] = DESC_RATEMCS16, -+ [MGN_MCS17] = DESC_RATEMCS17, -+ [MGN_MCS18] = DESC_RATEMCS18, -+ [MGN_MCS19] = DESC_RATEMCS19, -+ [MGN_MCS20] = DESC_RATEMCS20, -+ [MGN_MCS21] = DESC_RATEMCS21, -+ [MGN_MCS22] = DESC_RATEMCS22, -+ [MGN_MCS23] = DESC_RATEMCS23, -+ [MGN_MCS24] = DESC_RATEMCS24, -+ [MGN_MCS25] = DESC_RATEMCS25, -+ [MGN_MCS26] = DESC_RATEMCS26, -+ [MGN_MCS27] = DESC_RATEMCS27, -+ [MGN_MCS28] = DESC_RATEMCS28, -+ [MGN_MCS29] = DESC_RATEMCS29, -+ [MGN_MCS30] = DESC_RATEMCS30, -+ [MGN_MCS31] = DESC_RATEMCS31, -+ [MGN_VHT1SS_MCS0] = DESC_RATEVHTSS1MCS0, -+ [MGN_VHT1SS_MCS1] = DESC_RATEVHTSS1MCS1, -+ [MGN_VHT1SS_MCS2] = DESC_RATEVHTSS1MCS2, -+ [MGN_VHT1SS_MCS3] = DESC_RATEVHTSS1MCS3, -+ [MGN_VHT1SS_MCS4] = DESC_RATEVHTSS1MCS4, -+ [MGN_VHT1SS_MCS5] = DESC_RATEVHTSS1MCS5, -+ [MGN_VHT1SS_MCS6] = DESC_RATEVHTSS1MCS6, -+ [MGN_VHT1SS_MCS7] = DESC_RATEVHTSS1MCS7, -+ [MGN_VHT1SS_MCS8] = DESC_RATEVHTSS1MCS8, -+ [MGN_VHT1SS_MCS9] = DESC_RATEVHTSS1MCS9, -+ [MGN_VHT2SS_MCS0] = DESC_RATEVHTSS2MCS0, -+ [MGN_VHT2SS_MCS1] = DESC_RATEVHTSS2MCS1, -+ [MGN_VHT2SS_MCS2] = DESC_RATEVHTSS2MCS2, -+ [MGN_VHT2SS_MCS3] = DESC_RATEVHTSS2MCS3, -+ [MGN_VHT2SS_MCS4] = DESC_RATEVHTSS2MCS4, -+ [MGN_VHT2SS_MCS5] = DESC_RATEVHTSS2MCS5, -+ [MGN_VHT2SS_MCS6] = DESC_RATEVHTSS2MCS6, -+ [MGN_VHT2SS_MCS7] = DESC_RATEVHTSS2MCS7, -+ [MGN_VHT2SS_MCS8] = DESC_RATEVHTSS2MCS8, -+ [MGN_VHT2SS_MCS9] = DESC_RATEVHTSS2MCS9, -+ [MGN_VHT3SS_MCS0] = DESC_RATEVHTSS3MCS0, -+ [MGN_VHT3SS_MCS1] = DESC_RATEVHTSS3MCS1, -+ [MGN_VHT3SS_MCS2] = DESC_RATEVHTSS3MCS2, -+ [MGN_VHT3SS_MCS3] = DESC_RATEVHTSS3MCS3, -+ [MGN_VHT3SS_MCS4] = DESC_RATEVHTSS3MCS4, -+ [MGN_VHT3SS_MCS5] = DESC_RATEVHTSS3MCS5, -+ [MGN_VHT3SS_MCS6] = DESC_RATEVHTSS3MCS6, -+ [MGN_VHT3SS_MCS7] = DESC_RATEVHTSS3MCS7, -+ [MGN_VHT3SS_MCS8] = DESC_RATEVHTSS3MCS8, -+ [MGN_VHT3SS_MCS9] = DESC_RATEVHTSS3MCS9, -+ [MGN_VHT4SS_MCS0] = DESC_RATEVHTSS4MCS0, -+ [MGN_VHT4SS_MCS1] = DESC_RATEVHTSS4MCS1, -+ [MGN_VHT4SS_MCS2] = DESC_RATEVHTSS4MCS2, -+ [MGN_VHT4SS_MCS3] = DESC_RATEVHTSS4MCS3, -+ [MGN_VHT4SS_MCS4] = DESC_RATEVHTSS4MCS4, -+ [MGN_VHT4SS_MCS5] = DESC_RATEVHTSS4MCS5, -+ [MGN_VHT4SS_MCS6] = DESC_RATEVHTSS4MCS6, -+ [MGN_VHT4SS_MCS7] = DESC_RATEVHTSS4MCS7, -+ [MGN_VHT4SS_MCS8] = DESC_RATEVHTSS4MCS8, -+ [MGN_VHT4SS_MCS9] = DESC_RATEVHTSS4MCS9, -+}; -+ -+u8 MRateToHwRate(enum MGN_RATE rate) -+{ -+ u8 hw_rate = DESC_RATE1M; /* default value, also is zero */ -+ -+ if (rate < MGN_UNKNOWN) -+ hw_rate = _MRateToHwRate[rate]; -+ -+ if (rate != MGN_1M && hw_rate == DESC_RATE1M) -+ RTW_WARN("Invalid rate 0x%x in %s\n", rate, __FUNCTION__); -+ -+ return hw_rate; -+} -+ -+const char * const _HDATA_RATE[DESC_RATE_NUM + 1] = { -+ [DESC_RATE1M] = "CCK_1M", -+ [DESC_RATE2M] = "CCK_2M", -+ [DESC_RATE5_5M] = "CCK5_5M", -+ [DESC_RATE11M] = "CCK_11M", -+ [DESC_RATE6M] = "OFDM_6M", -+ [DESC_RATE9M] = "OFDM_9M", -+ [DESC_RATE12M] = "OFDM_12M", -+ [DESC_RATE18M] = "OFDM_18M", -+ [DESC_RATE24M] = "OFDM_24M", -+ [DESC_RATE36M] = "OFDM_36M", -+ [DESC_RATE48M] = "OFDM_48M", -+ [DESC_RATE54M] = "OFDM_54M", -+ [DESC_RATEMCS0] = "MCS0", -+ [DESC_RATEMCS1] = "MCS1", -+ [DESC_RATEMCS2] = "MCS2", -+ [DESC_RATEMCS3] = "MCS3", -+ [DESC_RATEMCS4] = "MCS4", -+ [DESC_RATEMCS5] = "MCS5", -+ [DESC_RATEMCS6] = "MCS6", -+ [DESC_RATEMCS7] = "MCS7", -+ [DESC_RATEMCS8] = "MCS8", -+ [DESC_RATEMCS9] = "MCS9", -+ [DESC_RATEMCS10] = "MCS10", -+ [DESC_RATEMCS11] = "MCS11", -+ [DESC_RATEMCS12] = "MCS12", -+ [DESC_RATEMCS13] = "MCS13", -+ [DESC_RATEMCS14] = "MCS14", -+ [DESC_RATEMCS15] = "MCS15", -+ [DESC_RATEMCS16] = "MCS16", -+ [DESC_RATEMCS17] = "MCS17", -+ [DESC_RATEMCS18] = "MCS18", -+ [DESC_RATEMCS19] = "MCS19", -+ [DESC_RATEMCS20] = "MCS20", -+ [DESC_RATEMCS21] = "MCS21", -+ [DESC_RATEMCS22] = "MCS22", -+ [DESC_RATEMCS23] = "MCS23", -+ [DESC_RATEMCS24] = "MCS24", -+ [DESC_RATEMCS25] = "MCS25", -+ [DESC_RATEMCS26] = "MCS26", -+ [DESC_RATEMCS27] = "MCS27", -+ [DESC_RATEMCS28] = "MCS28", -+ [DESC_RATEMCS29] = "MCS29", -+ [DESC_RATEMCS30] = "MCS30", -+ [DESC_RATEMCS31] = "MCS31", -+ [DESC_RATEVHTSS1MCS0] = "VHT1SMCS0", -+ [DESC_RATEVHTSS1MCS1] = "VHT1SMCS1", -+ [DESC_RATEVHTSS1MCS2] = "VHT1SMCS2", -+ [DESC_RATEVHTSS1MCS3] = "VHT1SMCS3", -+ [DESC_RATEVHTSS1MCS4] = "VHT1SMCS4", -+ [DESC_RATEVHTSS1MCS5] = "VHT1SMCS5", -+ [DESC_RATEVHTSS1MCS6] = "VHT1SMCS6", -+ [DESC_RATEVHTSS1MCS7] = "VHT1SMCS7", -+ [DESC_RATEVHTSS1MCS8] = "VHT1SMCS8", -+ [DESC_RATEVHTSS1MCS9] = "VHT1SMCS9", -+ [DESC_RATEVHTSS2MCS0] = "VHT2SMCS0", -+ [DESC_RATEVHTSS2MCS1] = "VHT2SMCS1", -+ [DESC_RATEVHTSS2MCS2] = "VHT2SMCS2", -+ [DESC_RATEVHTSS2MCS3] = "VHT2SMCS3", -+ [DESC_RATEVHTSS2MCS4] = "VHT2SMCS4", -+ [DESC_RATEVHTSS2MCS5] = "VHT2SMCS5", -+ [DESC_RATEVHTSS2MCS6] = "VHT2SMCS6", -+ [DESC_RATEVHTSS2MCS7] = "VHT2SMCS7", -+ [DESC_RATEVHTSS2MCS8] = "VHT2SMCS8", -+ [DESC_RATEVHTSS2MCS9] = "VHT2SMCS9", -+ [DESC_RATEVHTSS3MCS0] = "VHT3SMCS0", -+ [DESC_RATEVHTSS3MCS1] = "VHT3SMCS1", -+ [DESC_RATEVHTSS3MCS2] = "VHT3SMCS2", -+ [DESC_RATEVHTSS3MCS3] = "VHT3SMCS3", -+ [DESC_RATEVHTSS3MCS4] = "VHT3SMCS4", -+ [DESC_RATEVHTSS3MCS5] = "VHT3SMCS5", -+ [DESC_RATEVHTSS3MCS6] = "VHT3SMCS6", -+ [DESC_RATEVHTSS3MCS7] = "VHT3SMCS7", -+ [DESC_RATEVHTSS3MCS8] = "VHT3SMCS8", -+ [DESC_RATEVHTSS3MCS9] = "VHT3SMCS9", -+ [DESC_RATEVHTSS4MCS0] = "VHT4SMCS0", -+ [DESC_RATEVHTSS4MCS1] = "VHT4SMCS1", -+ [DESC_RATEVHTSS4MCS2] = "VHT4SMCS2", -+ [DESC_RATEVHTSS4MCS3] = "VHT4SMCS3", -+ [DESC_RATEVHTSS4MCS4] = "VHT4SMCS4", -+ [DESC_RATEVHTSS4MCS5] = "VHT4SMCS5", -+ [DESC_RATEVHTSS4MCS6] = "VHT4SMCS6", -+ [DESC_RATEVHTSS4MCS7] = "VHT4SMCS7", -+ [DESC_RATEVHTSS4MCS8] = "VHT4SMCS8", -+ [DESC_RATEVHTSS4MCS9] = "VHT4SMCS9", -+ [DESC_RATE_NUM] = "UNKNOWN", -+}; -+ -+static const u8 _hw_rate_to_m_rate[DESC_RATE_NUM] = { -+ [DESC_RATE1M] = MGN_1M, -+ [DESC_RATE2M] = MGN_2M, -+ [DESC_RATE5_5M] = MGN_5_5M, -+ [DESC_RATE11M] = MGN_11M, -+ [DESC_RATE6M] = MGN_6M, -+ [DESC_RATE9M] = MGN_9M, -+ [DESC_RATE12M] = MGN_12M, -+ [DESC_RATE18M] = MGN_18M, -+ [DESC_RATE24M] = MGN_24M, -+ [DESC_RATE36M] = MGN_36M, -+ [DESC_RATE48M] = MGN_48M, -+ [DESC_RATE54M] = MGN_54M, -+ [DESC_RATEMCS0] = MGN_MCS0, -+ [DESC_RATEMCS1] = MGN_MCS1, -+ [DESC_RATEMCS2] = MGN_MCS2, -+ [DESC_RATEMCS3] = MGN_MCS3, -+ [DESC_RATEMCS4] = MGN_MCS4, -+ [DESC_RATEMCS5] = MGN_MCS5, -+ [DESC_RATEMCS6] = MGN_MCS6, -+ [DESC_RATEMCS7] = MGN_MCS7, -+ [DESC_RATEMCS8] = MGN_MCS8, -+ [DESC_RATEMCS9] = MGN_MCS9, -+ [DESC_RATEMCS10] = MGN_MCS10, -+ [DESC_RATEMCS11] = MGN_MCS11, -+ [DESC_RATEMCS12] = MGN_MCS12, -+ [DESC_RATEMCS13] = MGN_MCS13, -+ [DESC_RATEMCS14] = MGN_MCS14, -+ [DESC_RATEMCS15] = MGN_MCS15, -+ [DESC_RATEMCS16] = MGN_MCS16, -+ [DESC_RATEMCS17] = MGN_MCS17, -+ [DESC_RATEMCS18] = MGN_MCS18, -+ [DESC_RATEMCS19] = MGN_MCS19, -+ [DESC_RATEMCS20] = MGN_MCS20, -+ [DESC_RATEMCS21] = MGN_MCS21, -+ [DESC_RATEMCS22] = MGN_MCS22, -+ [DESC_RATEMCS23] = MGN_MCS23, -+ [DESC_RATEMCS24] = MGN_MCS24, -+ [DESC_RATEMCS25] = MGN_MCS25, -+ [DESC_RATEMCS26] = MGN_MCS26, -+ [DESC_RATEMCS27] = MGN_MCS27, -+ [DESC_RATEMCS28] = MGN_MCS28, -+ [DESC_RATEMCS29] = MGN_MCS29, -+ [DESC_RATEMCS30] = MGN_MCS30, -+ [DESC_RATEMCS31] = MGN_MCS31, -+ [DESC_RATEVHTSS1MCS0] = MGN_VHT1SS_MCS0, -+ [DESC_RATEVHTSS1MCS1] = MGN_VHT1SS_MCS1, -+ [DESC_RATEVHTSS1MCS2] = MGN_VHT1SS_MCS2, -+ [DESC_RATEVHTSS1MCS3] = MGN_VHT1SS_MCS3, -+ [DESC_RATEVHTSS1MCS4] = MGN_VHT1SS_MCS4, -+ [DESC_RATEVHTSS1MCS5] = MGN_VHT1SS_MCS5, -+ [DESC_RATEVHTSS1MCS6] = MGN_VHT1SS_MCS6, -+ [DESC_RATEVHTSS1MCS7] = MGN_VHT1SS_MCS7, -+ [DESC_RATEVHTSS1MCS8] = MGN_VHT1SS_MCS8, -+ [DESC_RATEVHTSS1MCS9] = MGN_VHT1SS_MCS9, -+ [DESC_RATEVHTSS2MCS0] = MGN_VHT2SS_MCS0, -+ [DESC_RATEVHTSS2MCS1] = MGN_VHT2SS_MCS1, -+ [DESC_RATEVHTSS2MCS2] = MGN_VHT2SS_MCS2, -+ [DESC_RATEVHTSS2MCS3] = MGN_VHT2SS_MCS3, -+ [DESC_RATEVHTSS2MCS4] = MGN_VHT2SS_MCS4, -+ [DESC_RATEVHTSS2MCS5] = MGN_VHT2SS_MCS5, -+ [DESC_RATEVHTSS2MCS6] = MGN_VHT2SS_MCS6, -+ [DESC_RATEVHTSS2MCS7] = MGN_VHT2SS_MCS7, -+ [DESC_RATEVHTSS2MCS8] = MGN_VHT2SS_MCS8, -+ [DESC_RATEVHTSS2MCS9] = MGN_VHT2SS_MCS9, -+ [DESC_RATEVHTSS3MCS0] = MGN_VHT3SS_MCS0, -+ [DESC_RATEVHTSS3MCS1] = MGN_VHT3SS_MCS1, -+ [DESC_RATEVHTSS3MCS2] = MGN_VHT3SS_MCS2, -+ [DESC_RATEVHTSS3MCS3] = MGN_VHT3SS_MCS3, -+ [DESC_RATEVHTSS3MCS4] = MGN_VHT3SS_MCS4, -+ [DESC_RATEVHTSS3MCS5] = MGN_VHT3SS_MCS5, -+ [DESC_RATEVHTSS3MCS6] = MGN_VHT3SS_MCS6, -+ [DESC_RATEVHTSS3MCS7] = MGN_VHT3SS_MCS7, -+ [DESC_RATEVHTSS3MCS8] = MGN_VHT3SS_MCS8, -+ [DESC_RATEVHTSS3MCS9] = MGN_VHT3SS_MCS9, -+ [DESC_RATEVHTSS4MCS0] = MGN_VHT4SS_MCS0, -+ [DESC_RATEVHTSS4MCS1] = MGN_VHT4SS_MCS1, -+ [DESC_RATEVHTSS4MCS2] = MGN_VHT4SS_MCS2, -+ [DESC_RATEVHTSS4MCS3] = MGN_VHT4SS_MCS3, -+ [DESC_RATEVHTSS4MCS4] = MGN_VHT4SS_MCS4, -+ [DESC_RATEVHTSS4MCS5] = MGN_VHT4SS_MCS5, -+ [DESC_RATEVHTSS4MCS6] = MGN_VHT4SS_MCS6, -+ [DESC_RATEVHTSS4MCS7] = MGN_VHT4SS_MCS7, -+ [DESC_RATEVHTSS4MCS8] = MGN_VHT4SS_MCS8, -+ [DESC_RATEVHTSS4MCS9] = MGN_VHT4SS_MCS9, -+}; -+ -+u8 hw_rate_to_m_rate(u8 hw_rate) -+{ -+ u8 rate = MGN_1M; /* default value */ -+ -+ if (hw_rate < DESC_RATE_NUM) -+ rate = _hw_rate_to_m_rate[hw_rate]; -+ else -+ RTW_WARN("Invalid hw_rate 0x%x in %s\n", hw_rate, __FUNCTION__); -+ -+ return rate; -+} -+ -+#ifdef CONFIG_RTW_DEBUG -+void dump_hw_rate_map_test(void *sel) -+{ -+ RATE_SECTION rs; -+ u8 hw_rate; -+ enum MGN_RATE m_rate; -+ int i; -+ -+ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { -+ for (i = 0; i < rates_by_sections[rs].rate_num; i++) { -+ hw_rate = MRateToHwRate(rates_by_sections[rs].rates[i]); -+ RTW_PRINT_SEL(sel, "m_rate:%s(%d) to hw_rate:%s(%d)\n" -+ , MGN_RATE_STR(rates_by_sections[rs].rates[i]), rates_by_sections[rs].rates[i] -+ , HDATA_RATE(hw_rate), hw_rate -+ ); -+ } -+ if (rs == HT_4SS) { /* show MCS32 after MCS31 */ -+ hw_rate = MRateToHwRate(MGN_MCS32); -+ RTW_PRINT_SEL(sel, "m_rate:%s(%d) to hw_rate:%s(%d)\n" -+ , MGN_RATE_STR(MGN_MCS32), MGN_MCS32 -+ , HDATA_RATE(hw_rate), hw_rate -+ ); -+ } -+ } -+ hw_rate = MRateToHwRate(MGN_UNKNOWN); -+ RTW_PRINT_SEL(sel, "m_rate:%s(%d) to hw_rate:%s(%d)\n" -+ , MGN_RATE_STR(MGN_UNKNOWN), MGN_UNKNOWN -+ , HDATA_RATE(hw_rate), hw_rate -+ ); -+ -+ for (i = DESC_RATE1M; i <= DESC_RATE_NUM; i++) { -+ m_rate = hw_rate_to_m_rate(i); -+ RTW_PRINT_SEL(sel, "hw_rate:%s(%d) to m_rate:%s(%d)\n" -+ , HDATA_RATE(i), i -+ , MGN_RATE_STR(m_rate), m_rate -+ ); -+ } -+} -+#endif /* CONFIG_RTW_DEBUG */ -+ -+void HalSetBrateCfg( -+ PADAPTER Adapter, -+ u8 *mBratesOS, -+ u16 *pBrateCfg) -+{ -+ u8 i, is_brate, brate; -+ -+ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { -+ is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK; -+ brate = mBratesOS[i] & 0x7f; -+ -+ if (is_brate) { -+ switch (brate) { -+ case IEEE80211_CCK_RATE_1MB: -+ *pBrateCfg |= RATE_1M; -+ break; -+ case IEEE80211_CCK_RATE_2MB: -+ *pBrateCfg |= RATE_2M; -+ break; -+ case IEEE80211_CCK_RATE_5MB: -+ *pBrateCfg |= RATE_5_5M; -+ break; -+ case IEEE80211_CCK_RATE_11MB: -+ *pBrateCfg |= RATE_11M; -+ break; -+ case IEEE80211_OFDM_RATE_6MB: -+ *pBrateCfg |= RATE_6M; -+ break; -+ case IEEE80211_OFDM_RATE_9MB: -+ *pBrateCfg |= RATE_9M; -+ break; -+ case IEEE80211_OFDM_RATE_12MB: -+ *pBrateCfg |= RATE_12M; -+ break; -+ case IEEE80211_OFDM_RATE_18MB: -+ *pBrateCfg |= RATE_18M; -+ break; -+ case IEEE80211_OFDM_RATE_24MB: -+ *pBrateCfg |= RATE_24M; -+ break; -+ case IEEE80211_OFDM_RATE_36MB: -+ *pBrateCfg |= RATE_36M; -+ break; -+ case IEEE80211_OFDM_RATE_48MB: -+ *pBrateCfg |= RATE_48M; -+ break; -+ case IEEE80211_OFDM_RATE_54MB: -+ *pBrateCfg |= RATE_54M; -+ break; -+ } -+ } -+ } -+} -+ -+static void -+_OneOutPipeMapping( -+ PADAPTER pAdapter -+) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); -+ -+ pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */ -+ pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */ -+ pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];/* BE */ -+ pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */ -+ -+ pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ -+ pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ -+ pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */ -+ pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ -+} -+ -+static void -+_TwoOutPipeMapping( -+ PADAPTER pAdapter, -+ BOOLEAN bWIFICfg -+) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); -+ -+ if (bWIFICfg) { /* WMM */ -+ -+ /* BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA */ -+ /* { 0, 1, 0, 1, 0, 0, 0, 0, 0 }; */ -+ /* 0:ep_0 num, 1:ep_1 num */ -+ -+ pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];/* VO */ -+ pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */ -+ pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */ -+ pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */ -+ -+ pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ -+ pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ -+ pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */ -+ pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ -+ -+ } else { /* typical setting */ -+ -+ -+ /* BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA */ -+ /* { 1, 1, 0, 0, 0, 0, 0, 0, 0 }; */ -+ /* 0:ep_0 num, 1:ep_1 num */ -+ -+ pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */ -+ pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */ -+ pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */ -+ pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */ -+ -+ pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ -+ pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ -+ pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */ -+ pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ -+ -+ } -+ -+} -+ -+static void _ThreeOutPipeMapping( -+ PADAPTER pAdapter, -+ BOOLEAN bWIFICfg -+) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); -+ -+ if (bWIFICfg) { /* for WMM */ -+ -+ /* BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA */ -+ /* { 1, 2, 1, 0, 0, 0, 0, 0, 0 }; */ -+ /* 0:H, 1:N, 2:L */ -+ -+ pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */ -+ pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */ -+ pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */ -+ pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */ -+ -+ pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ -+ pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ -+ pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */ -+ pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ -+ -+ } else { /* typical setting */ -+ -+ -+ /* BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA */ -+ /* { 2, 2, 1, 0, 0, 0, 0, 0, 0 }; */ -+ /* 0:H, 1:N, 2:L */ -+ -+ pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */ -+ pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */ -+ pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */ -+ pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];/* BK */ -+ -+ pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ -+ pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ -+ pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */ -+ pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ -+ } -+ -+} -+#if 0 -+static void _FourOutPipeMapping( -+ PADAPTER pAdapter, -+ BOOLEAN bWIFICfg -+) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter); -+ -+ if (bWIFICfg) { /* for WMM */ -+ -+ /* BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA */ -+ /* { 1, 2, 1, 0, 0, 0, 0, 0, 0 }; */ -+ /* 0:H, 1:N, 2:L ,3:E */ -+ -+ pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */ -+ pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */ -+ pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */ -+ pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */ -+ -+ pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ -+ pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ -+ pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];/* HIGH */ -+ pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ -+ -+ } else { /* typical setting */ -+ -+ -+ /* BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA */ -+ /* { 2, 2, 1, 0, 0, 0, 0, 0, 0 }; */ -+ /* 0:H, 1:N, 2:L */ -+ -+ pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */ -+ pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */ -+ pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */ -+ pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];/* BK */ -+ -+ pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */ -+ pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */ -+ pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];/* HIGH */ -+ pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */ -+ } -+ -+} -+#endif -+BOOLEAN -+Hal_MappingOutPipe( -+ PADAPTER pAdapter, -+ u8 NumOutPipe -+) -+{ -+ struct registry_priv *pregistrypriv = &pAdapter->registrypriv; -+ -+ BOOLEAN bWIFICfg = (pregistrypriv->wifi_spec) ? _TRUE : _FALSE; -+ -+ BOOLEAN result = _TRUE; -+ -+ switch (NumOutPipe) { -+ case 2: -+ _TwoOutPipeMapping(pAdapter, bWIFICfg); -+ break; -+ case 3: -+ case 4: -+ case 5: -+ case 6: -+ _ThreeOutPipeMapping(pAdapter, bWIFICfg); -+ break; -+ case 1: -+ _OneOutPipeMapping(pAdapter); -+ break; -+ default: -+ result = _FALSE; -+ break; -+ } -+ -+ return result; -+ -+} -+ -+void rtw_hal_reqtxrpt(_adapter *padapter, u8 macid) -+{ -+ if (padapter->hal_func.reqtxrpt) -+ padapter->hal_func.reqtxrpt(padapter, macid); -+} -+ -+void rtw_hal_dump_macaddr(void *sel, _adapter *adapter) -+{ -+ int i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 mac_addr[ETH_ALEN]; -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_mbid_cam_dump(sel, __func__, adapter); -+#else -+ rtw_mi_hal_dump_macaddr(sel, adapter); -+#endif -+} -+ -+#ifdef RTW_HALMAC -+void rtw_hal_hw_port_enable(_adapter *adapter) -+{ -+#if 1 -+ u8 port_enable = _TRUE; -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_PORT_CFG, &port_enable); -+#else -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct rtw_halmac_bcn_ctrl bcn_ctrl; -+ -+ _rtw_memset(&bcn_ctrl, 0, sizeof(struct rtw_halmac_bcn_ctrl)); -+ bcn_ctrl.enable_bcn = 1; -+ bcn_ctrl.rx_bssid_fit = 1; -+ bcn_ctrl.rxbcn_rpt = 1; -+ -+ /*rtw_halmac_get_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, -+ struct rtw_halmac_bcn_ctrl *bcn_ctrl)*/ -+ if (rtw_halmac_set_bcn_ctrl(dvobj, get_hw_port(adapter), &bcn_ctrl) == -1) { -+ RTW_ERR(ADPT_FMT" - hw port(%d) enable fail!!\n", ADPT_ARG(adapter), get_hw_port(adapter)); -+ rtw_warn_on(1); -+ } -+#endif -+} -+void rtw_hal_hw_port_disable(_adapter *adapter) -+{ -+ u8 port_enable = _FALSE; -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_PORT_CFG, &port_enable); -+} -+ -+void rtw_restore_hw_port_cfg(_adapter *adapter) -+{ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ -+#else -+ int i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface) -+ rtw_hal_hw_port_enable(iface); -+ } -+#endif -+} -+#endif -+ -+void rtw_mi_set_mac_addr(_adapter *adapter) -+{ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_mi_set_mbid_cam(adapter); -+#else -+ int i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface) -+ rtw_hal_set_hwreg(iface, HW_VAR_MAC_ADDR, adapter_mac_addr(iface)); -+ } -+#endif -+ if (0) -+ rtw_hal_dump_macaddr(RTW_DBGDUMP, adapter); -+} -+ -+void rtw_init_hal_com_default_value(PADAPTER Adapter) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ struct registry_priv *regsty = adapter_to_regsty(Adapter); -+ -+ pHalData->AntDetection = 1; -+ pHalData->antenna_test = _FALSE; -+ pHalData->RegIQKFWOffload = regsty->iqk_fw_offload; -+ pHalData->ch_switch_offload = regsty->ch_switch_offload; -+ pHalData->multi_ch_switch_mode = 0; -+#ifdef RTW_REDUCE_SCAN_SWITCH_CH_TIME -+ if (pHalData->ch_switch_offload == 0) -+ pHalData->ch_switch_offload = 1; -+#endif -+} -+ -+#ifdef CONFIG_FW_C2H_REG -+void c2h_evt_clear(_adapter *adapter) -+{ -+ rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE); -+} -+ -+s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf) -+{ -+ s32 ret = _FAIL; -+ int i; -+ u8 trigger; -+ -+ if (buf == NULL) -+ goto exit; -+ -+ trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR); -+ -+ if (trigger == C2H_EVT_HOST_CLOSE) { -+ goto exit; /* Not ready */ -+ } else if (trigger != C2H_EVT_FW_CLOSE) { -+ goto clear_evt; /* Not a valid value */ -+ } -+ -+ _rtw_memset(buf, 0, C2H_REG_LEN); -+ -+ /* Read ID, LEN, SEQ */ -+ SET_C2H_ID_88XX(buf, rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL)); -+ SET_C2H_SEQ_88XX(buf, rtw_read8(adapter, REG_C2HEVT_CMD_SEQ_88XX)); -+ SET_C2H_PLEN_88XX(buf, rtw_read8(adapter, REG_C2HEVT_CMD_LEN_88XX)); -+ -+ if (0) { -+ RTW_INFO("%s id=0x%02x, seq=%u, plen=%u, trigger=0x%02x\n", __func__ -+ , C2H_ID_88XX(buf), C2H_SEQ_88XX(buf), C2H_PLEN_88XX(buf), trigger); -+ } -+ -+ /* Read the content */ -+ for (i = 0; i < C2H_PLEN_88XX(buf); i++) -+ *(C2H_PAYLOAD_88XX(buf) + i) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i); -+ -+ RTW_DBG_DUMP("payload: ", C2H_PAYLOAD_88XX(buf), C2H_PLEN_88XX(buf)); -+ -+ ret = _SUCCESS; -+ -+clear_evt: -+ /* -+ * Clear event to notify FW we have read the command. -+ * If this field isn't clear, the FW won't update the next command message. -+ */ -+ c2h_evt_clear(adapter); -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_FW_C2H_REG */ -+ -+#ifdef CONFIG_FW_C2H_PKT -+#ifndef DBG_C2H_PKT_PRE_HDL -+#define DBG_C2H_PKT_PRE_HDL 0 -+#endif -+#ifndef DBG_C2H_PKT_HDL -+#define DBG_C2H_PKT_HDL 0 -+#endif -+void rtw_hal_c2h_pkt_pre_hdl(_adapter *adapter, u8 *buf, u16 len) -+{ -+#ifdef RTW_HALMAC -+ /* TODO: extract hal_mac IC's code here*/ -+#else -+ u8 parse_fail = 0; -+ u8 hdl_here = 0; -+ s32 ret = _FAIL; -+ u8 id, seq, plen; -+ u8 *payload; -+ -+ if (rtw_hal_c2h_pkt_hdr_parse(adapter, buf, len, &id, &seq, &plen, &payload) != _SUCCESS) { -+ parse_fail = 1; -+ goto exit; -+ } -+ -+ hdl_here = rtw_hal_c2h_id_handle_directly(adapter, id, seq, plen, payload) == _TRUE ? 1 : 0; -+ if (hdl_here) -+ ret = rtw_hal_c2h_handler(adapter, id, seq, plen, payload); -+ else -+ ret = rtw_c2h_packet_wk_cmd(adapter, buf, len); -+ -+exit: -+ if (parse_fail) -+ RTW_ERR("%s parse fail, buf=%p, len=:%u\n", __func__, buf, len); -+ else if (ret != _SUCCESS || DBG_C2H_PKT_PRE_HDL > 0) { -+ RTW_PRINT("%s: id=0x%02x, seq=%u, plen=%u, %s %s\n", __func__, id, seq, plen -+ , hdl_here ? "handle" : "enqueue" -+ , ret == _SUCCESS ? "ok" : "fail" -+ ); -+ if (DBG_C2H_PKT_PRE_HDL >= 2) -+ RTW_PRINT_DUMP("dump: ", buf, len); -+ } -+#endif -+} -+ -+void rtw_hal_c2h_pkt_hdl(_adapter *adapter, u8 *buf, u16 len) -+{ -+#ifdef RTW_HALMAC -+ adapter->hal_func.hal_mac_c2h_handler(adapter, buf, len); -+#else -+ u8 parse_fail = 0; -+ u8 bypass = 0; -+ s32 ret = _FAIL; -+ u8 id, seq, plen; -+ u8 *payload; -+ -+ if (rtw_hal_c2h_pkt_hdr_parse(adapter, buf, len, &id, &seq, &plen, &payload) != _SUCCESS) { -+ parse_fail = 1; -+ goto exit; -+ } -+ -+#ifdef CONFIG_WOWLAN -+ if (adapter_to_pwrctl(adapter)->wowlan_mode == _TRUE) { -+ bypass = 1; -+ ret = _SUCCESS; -+ goto exit; -+ } -+#endif -+ -+ ret = rtw_hal_c2h_handler(adapter, id, seq, plen, payload); -+ -+exit: -+ if (parse_fail) -+ RTW_ERR("%s parse fail, buf=%p, len=:%u\n", __func__, buf, len); -+ else if (ret != _SUCCESS || bypass || DBG_C2H_PKT_HDL > 0) { -+ RTW_PRINT("%s: id=0x%02x, seq=%u, plen=%u, %s %s\n", __func__, id, seq, plen -+ , !bypass ? "handle" : "bypass" -+ , ret == _SUCCESS ? "ok" : "fail" -+ ); -+ if (DBG_C2H_PKT_HDL >= 2) -+ RTW_PRINT_DUMP("dump: ", buf, len); -+ } -+#endif -+} -+#endif /* CONFIG_FW_C2H_PKT */ -+ -+void c2h_iqk_offload(_adapter *adapter, u8 *data, u8 len) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct submit_ctx *iqk_sctx = &hal_data->iqk_sctx; -+ -+ RTW_INFO("IQK offload finish in %dms\n", rtw_get_passing_time_ms(iqk_sctx->submit_time)); -+ if (0) -+ RTW_INFO_DUMP("C2H_IQK_FINISH: ", data, len); -+ -+ rtw_sctx_done(&iqk_sctx); -+} -+ -+int c2h_iqk_offload_wait(_adapter *adapter, u32 timeout_ms) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct submit_ctx *iqk_sctx = &hal_data->iqk_sctx; -+ -+ iqk_sctx->submit_time = rtw_get_current_time(); -+ iqk_sctx->timeout_ms = timeout_ms; -+ iqk_sctx->status = RTW_SCTX_SUBMITTED; -+ -+ return rtw_sctx_wait(iqk_sctx, __func__); -+} -+ -+#ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX -+void c2h_txpwr_idx_offload_done(_adapter *adapter, u8 *data, u8 len) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct submit_ctx *sctx = &hal_data->txpwr_idx_offload_sctx; -+ -+ if (0) -+ RTW_INFO("txpwr_idx offload finish in %dms\n", rtw_get_passing_time_ms(sctx->submit_time)); -+ rtw_sctx_done(&sctx); -+} -+ -+int c2h_txpwr_idx_offload_wait(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct submit_ctx *sctx = &hal_data->txpwr_idx_offload_sctx; -+ -+ return rtw_sctx_wait(sctx, __func__); -+} -+#endif -+ -+#define GET_C2H_MAC_HIDDEN_RPT_UUID_X(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 0, 0, 8) -+#define GET_C2H_MAC_HIDDEN_RPT_UUID_Y(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 1, 0, 8) -+#define GET_C2H_MAC_HIDDEN_RPT_UUID_Z(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 2, 0, 5) -+#define GET_C2H_MAC_HIDDEN_RPT_UUID_CRC(_data) LE_BITS_TO_2BYTE(((u8 *)(_data)) + 2, 5, 11) -+#define GET_C2H_MAC_HIDDEN_RPT_HCI_TYPE(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 4, 0, 4) -+#define GET_C2H_MAC_HIDDEN_RPT_PACKAGE_TYPE(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 4, 4, 3) -+#define GET_C2H_MAC_HIDDEN_RPT_TR_SWITCH(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 4, 7, 1) -+#define GET_C2H_MAC_HIDDEN_RPT_WL_FUNC(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 5, 0, 4) -+#define GET_C2H_MAC_HIDDEN_RPT_HW_STYPE(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 5, 4, 4) -+#define GET_C2H_MAC_HIDDEN_RPT_BW(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 0, 3) -+#define GET_C2H_MAC_HIDDEN_RPT_ANT_NUM(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 5, 3) -+#define GET_C2H_MAC_HIDDEN_RPT_80211_PROTOCOL(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 2, 2) -+#define GET_C2H_MAC_HIDDEN_RPT_NIC_ROUTER(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 6, 2) -+ -+#ifndef DBG_C2H_MAC_HIDDEN_RPT_HANDLE -+#define DBG_C2H_MAC_HIDDEN_RPT_HANDLE 0 -+#endif -+ -+#ifdef CONFIG_RTW_MAC_HIDDEN_RPT -+int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ enum rf_type rf_type; -+ u8 tx_path_num, rx_path_num; -+ int ret = _FAIL; -+ -+ u8 uuid_x; -+ u8 uuid_y; -+ u8 uuid_z; -+ u16 uuid_crc; -+ -+ u8 hci_type; -+ u8 package_type; -+ u8 tr_switch; -+ u8 wl_func; -+ u8 hw_stype; -+ u8 bw; -+ u8 ss_num = 4; -+ u8 ant_num; -+ u8 protocol; -+ u8 nic; -+ -+ int i; -+ -+ if (len < MAC_HIDDEN_RPT_LEN) { -+ RTW_WARN("%s len(%u) < %d\n", __func__, len, MAC_HIDDEN_RPT_LEN); -+ goto exit; -+ } -+ -+ uuid_x = GET_C2H_MAC_HIDDEN_RPT_UUID_X(data); -+ uuid_y = GET_C2H_MAC_HIDDEN_RPT_UUID_Y(data); -+ uuid_z = GET_C2H_MAC_HIDDEN_RPT_UUID_Z(data); -+ uuid_crc = GET_C2H_MAC_HIDDEN_RPT_UUID_CRC(data); -+ -+ hci_type = GET_C2H_MAC_HIDDEN_RPT_HCI_TYPE(data); -+ package_type = GET_C2H_MAC_HIDDEN_RPT_PACKAGE_TYPE(data); -+ -+ tr_switch = GET_C2H_MAC_HIDDEN_RPT_TR_SWITCH(data); -+ -+ wl_func = GET_C2H_MAC_HIDDEN_RPT_WL_FUNC(data); -+ hw_stype = GET_C2H_MAC_HIDDEN_RPT_HW_STYPE(data); -+ -+ bw = GET_C2H_MAC_HIDDEN_RPT_BW(data); -+ ant_num = GET_C2H_MAC_HIDDEN_RPT_ANT_NUM(data); -+ -+ protocol = GET_C2H_MAC_HIDDEN_RPT_80211_PROTOCOL(data); -+ nic = GET_C2H_MAC_HIDDEN_RPT_NIC_ROUTER(data); -+ -+ if (DBG_C2H_MAC_HIDDEN_RPT_HANDLE) { -+ for (i = 0; i < len; i++) -+ RTW_PRINT("%s: 0x%02X\n", __func__, *(data + i)); -+ -+ RTW_PRINT("uuid x:0x%02x y:0x%02x z:0x%x crc:0x%x\n", uuid_x, uuid_y, uuid_z, uuid_crc); -+ RTW_PRINT("hci_type:0x%x\n", hci_type); -+ RTW_PRINT("package_type:0x%x\n", package_type); -+ RTW_PRINT("tr_switch:0x%x\n", tr_switch); -+ RTW_PRINT("wl_func:0x%x\n", wl_func); -+ RTW_PRINT("hw_stype:0x%x\n", hw_stype); -+ RTW_PRINT("bw:0x%x\n", bw); -+ RTW_PRINT("ant_num:0x%x\n", ant_num); -+ RTW_PRINT("protocol:0x%x\n", protocol); -+ RTW_PRINT("nic:0x%x\n", nic); -+ } -+ -+#if defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) -+ if (IS_8822C_SERIES(hal_data->version_id) || IS_8814B_SERIES(hal_data->version_id)) { -+ #define GET_C2H_MAC_HIDDEN_RPT_SS_NUM(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 3, 2) -+ ss_num = GET_C2H_MAC_HIDDEN_RPT_SS_NUM(data); -+ -+ if (DBG_C2H_MAC_HIDDEN_RPT_HANDLE) -+ RTW_PRINT("ss_num:0x%x\n", ss_num); -+ -+ if (ss_num == 0x03) -+ ss_num = 4; -+ } -+#endif -+ -+#if defined(CONFIG_RTL8822C) -+ if (IS_8822C_SERIES(hal_data->version_id)) { -+ if (ant_num == 1) -+ hal_spec->rf_reg_trx_path_bmp = 0x22; /* 1T1R pathB */ -+ if (hw_stype == 0xE) -+ hal_spec->max_tx_cnt = rtw_min(hal_spec->max_tx_cnt, 1); /* limit 1TX only */ -+ } -+#endif -+ hal_data->PackageType = package_type; -+ hal_spec->hci_type = hci_type; -+ hal_spec->wl_func &= mac_hidden_wl_func_to_hal_wl_func(wl_func); -+ hal_spec->bw_cap &= mac_hidden_max_bw_to_hal_bw_cap(bw); -+ hal_spec->proto_cap &= mac_hidden_proto_to_hal_proto_cap(protocol); -+ -+ rf_type = rtw_chip_rftype_to_hal_rftype(adapter, 0); -+ if (!RF_TYPE_VALID(rf_type)) { -+ RTW_ERR("%s rtw_chip_rftype_to_hal_rftype failed\n", __func__); -+ goto exit; -+ } -+ hal_spec->rf_reg_path_avail_num = rtw_min(hal_spec->rf_reg_path_num, ant_num); -+ tx_path_num = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->rf_reg_path_avail_num); -+ rx_path_num = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rf_reg_path_avail_num); -+ hal_spec->rf_reg_trx_path_bmp = rtw_restrict_trx_path_bmp_by_trx_num_lmt( -+ hal_spec->rf_reg_trx_path_bmp, tx_path_num, rx_path_num, &tx_path_num, &rx_path_num); -+ if (!hal_spec->rf_reg_trx_path_bmp) { -+ RTW_ERR("%s rtw_restrict_trx_path_bmp_by_trx_num_lmt(0x%x, %u, %u) failed\n" -+ , __func__, hal_spec->rf_reg_trx_path_bmp, tx_path_num, rx_path_num); -+ goto exit; -+ } -+ hal_spec->rf_reg_path_avail_num = rtw_max(tx_path_num, rx_path_num); -+ -+ /* -+ * RF TX path num >= max_tx_cnt >= tx_nss_num -+ * ex: RF TX path num(4) >= max_tx_cnt(2) >= tx_nss_num(1) -+ * Select at most 2 out of 4 TX RF path to do 1SS 2TX -+ */ -+ hal_spec->max_tx_cnt = rtw_min(hal_spec->max_tx_cnt, tx_path_num); -+ hal_spec->tx_nss_num = rtw_min(hal_spec->tx_nss_num, hal_spec->max_tx_cnt); -+ hal_spec->tx_nss_num = rtw_min(hal_spec->tx_nss_num, ss_num); -+ -+ hal_spec->rx_nss_num = rtw_min(hal_spec->rx_nss_num, rx_path_num); -+ hal_spec->rx_nss_num = rtw_min(hal_spec->rx_nss_num, ss_num); -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+int c2h_mac_hidden_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ int ret = _FAIL; -+ -+ int i; -+ -+ if (len < MAC_HIDDEN_RPT_2_LEN) { -+ RTW_WARN("%s len(%u) < %d\n", __func__, len, MAC_HIDDEN_RPT_2_LEN); -+ goto exit; -+ } -+ -+ if (DBG_C2H_MAC_HIDDEN_RPT_HANDLE) { -+ for (i = 0; i < len; i++) -+ RTW_PRINT("%s: 0x%02X\n", __func__, *(data + i)); -+ } -+ -+ #if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) -+ if (IS_8188F(hal_data->version_id) || IS_8188GTV(hal_data->version_id)) { -+ #define GET_C2H_MAC_HIDDEN_RPT_IRV(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 0, 0, 4) -+ u8 irv = GET_C2H_MAC_HIDDEN_RPT_IRV(data); -+ -+ if (DBG_C2H_MAC_HIDDEN_RPT_HANDLE) -+ RTW_PRINT("irv:0x%x\n", irv); -+ -+ if(irv != 0xf) -+ hal_data->version_id.CUTVersion = irv; -+ } -+ #endif -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+int hal_read_mac_hidden_rpt(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); -+ int ret = _FAIL; -+ int ret_fwdl; -+ u8 mac_hidden_rpt[MAC_HIDDEN_RPT_LEN + MAC_HIDDEN_RPT_2_LEN] = {0}; -+ systime start = rtw_get_current_time(); -+ u32 cnt = 0; -+ u32 timeout_ms = 800; -+ u32 min_cnt = 10; -+ u8 id = C2H_DEFEATURE_RSVD; -+ int i; -+ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) -+ u8 hci_type = rtw_get_intf_type(adapter); -+ -+ if ((hci_type == RTW_USB || hci_type == RTW_PCIE) -+ && !rtw_is_hw_init_completed(adapter)) -+ rtw_hal_power_on(adapter); -+#endif -+ -+ /* inform FW mac hidden rpt from reg is needed */ -+ rtw_write8(adapter, REG_C2HEVT_MSG_NORMAL, C2H_DEFEATURE_RSVD); -+ -+ /* download FW */ -+ pHalData->not_xmitframe_fw_dl = 1; -+ ret_fwdl = rtw_hal_fw_dl(adapter, _FALSE); -+ pHalData->not_xmitframe_fw_dl = 0; -+ if (ret_fwdl != _SUCCESS) -+ goto mac_hidden_rpt_hdl; -+ -+ /* polling for data ready */ -+ start = rtw_get_current_time(); -+ do { -+ cnt++; -+ id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL); -+ if (id == C2H_MAC_HIDDEN_RPT || RTW_CANNOT_IO(adapter)) -+ break; -+ rtw_msleep_os(10); -+ } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); -+ -+ if (id == C2H_MAC_HIDDEN_RPT) { -+ /* read data */ -+ for (i = 0; i < MAC_HIDDEN_RPT_LEN + MAC_HIDDEN_RPT_2_LEN; i++) -+ mac_hidden_rpt[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i); -+ } -+ -+ /* inform FW mac hidden rpt has read */ -+ rtw_write8(adapter, REG_C2HEVT_MSG_NORMAL, C2H_DBG); -+ -+mac_hidden_rpt_hdl: -+ c2h_mac_hidden_rpt_hdl(adapter, mac_hidden_rpt, MAC_HIDDEN_RPT_LEN); -+ c2h_mac_hidden_rpt_2_hdl(adapter, mac_hidden_rpt + MAC_HIDDEN_RPT_LEN, MAC_HIDDEN_RPT_2_LEN); -+ -+ if (ret_fwdl == _SUCCESS && id == C2H_MAC_HIDDEN_RPT) -+ ret = _SUCCESS; -+ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) -+ if ((hci_type == RTW_USB || hci_type == RTW_PCIE) -+ && !rtw_is_hw_init_completed(adapter)) -+ rtw_hal_power_off(adapter); -+#endif -+ -+ RTW_INFO("%s %s! (%u, %dms), fwdl:%d, id:0x%02x\n", __func__ -+ , (ret == _SUCCESS) ? "OK" : "Fail", cnt, rtw_get_passing_time_ms(start), ret_fwdl, id); -+ -+ return ret; -+} -+#endif /* CONFIG_RTW_MAC_HIDDEN_RPT */ -+ -+int c2h_defeature_dbg_hdl(_adapter *adapter, u8 *data, u8 len) -+{ -+ int ret = _FAIL; -+ -+ int i; -+ -+ if (len < DEFEATURE_DBG_LEN) { -+ RTW_WARN("%s len(%u) < %d\n", __func__, len, DEFEATURE_DBG_LEN); -+ goto exit; -+ } -+ -+ for (i = 0; i < len; i++) -+ RTW_PRINT("%s: 0x%02X\n", __func__, *(data + i)); -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+#ifndef DBG_CUSTOMER_STR_RPT_HANDLE -+#define DBG_CUSTOMER_STR_RPT_HANDLE 0 -+#endif -+ -+#ifdef CONFIG_RTW_CUSTOMER_STR -+s32 rtw_hal_h2c_customer_str_req(_adapter *adapter) -+{ -+ u8 h2c_data[H2C_CUSTOMER_STR_REQ_LEN] = {0}; -+ -+ SET_H2CCMD_CUSTOMER_STR_REQ_EN(h2c_data, 1); -+ return rtw_hal_fill_h2c_cmd(adapter, H2C_CUSTOMER_STR_REQ, H2C_CUSTOMER_STR_REQ_LEN, h2c_data); -+} -+ -+#define C2H_CUSTOMER_STR_RPT_BYTE0(_data) ((u8 *)(_data)) -+#define C2H_CUSTOMER_STR_RPT_2_BYTE8(_data) ((u8 *)(_data)) -+ -+int c2h_customer_str_rpt_hdl(_adapter *adapter, u8 *data, u8 len) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ int ret = _FAIL; -+ int i; -+ -+ if (len < CUSTOMER_STR_RPT_LEN) { -+ RTW_WARN("%s len(%u) < %d\n", __func__, len, CUSTOMER_STR_RPT_LEN); -+ goto exit; -+ } -+ -+ if (DBG_CUSTOMER_STR_RPT_HANDLE) -+ RTW_PRINT_DUMP("customer_str_rpt: ", data, CUSTOMER_STR_RPT_LEN); -+ -+ _enter_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ -+ if (dvobj->customer_str_sctx != NULL) { -+ if (dvobj->customer_str_sctx->status != RTW_SCTX_SUBMITTED) -+ RTW_WARN("%s invalid sctx.status:%d\n", __func__, dvobj->customer_str_sctx->status); -+ _rtw_memcpy(dvobj->customer_str, C2H_CUSTOMER_STR_RPT_BYTE0(data), CUSTOMER_STR_RPT_LEN); -+ dvobj->customer_str_sctx->status = RTX_SCTX_CSTR_WAIT_RPT2; -+ } else -+ RTW_WARN("%s sctx not set\n", __func__); -+ -+ _exit_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+int c2h_customer_str_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ int ret = _FAIL; -+ int i; -+ -+ if (len < CUSTOMER_STR_RPT_2_LEN) { -+ RTW_WARN("%s len(%u) < %d\n", __func__, len, CUSTOMER_STR_RPT_2_LEN); -+ goto exit; -+ } -+ -+ if (DBG_CUSTOMER_STR_RPT_HANDLE) -+ RTW_PRINT_DUMP("customer_str_rpt_2: ", data, CUSTOMER_STR_RPT_2_LEN); -+ -+ _enter_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ -+ if (dvobj->customer_str_sctx != NULL) { -+ if (dvobj->customer_str_sctx->status != RTX_SCTX_CSTR_WAIT_RPT2) -+ RTW_WARN("%s rpt not ready\n", __func__); -+ _rtw_memcpy(dvobj->customer_str + CUSTOMER_STR_RPT_LEN, C2H_CUSTOMER_STR_RPT_2_BYTE8(data), CUSTOMER_STR_RPT_2_LEN); -+ rtw_sctx_done(&dvobj->customer_str_sctx); -+ } else -+ RTW_WARN("%s sctx not set\n", __func__); -+ -+ _exit_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+/* read customer str */ -+s32 rtw_hal_customer_str_read(_adapter *adapter, u8 *cs) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct submit_ctx sctx; -+ s32 ret = _SUCCESS; -+ -+ _enter_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ if (dvobj->customer_str_sctx != NULL) -+ ret = _FAIL; -+ else { -+ rtw_sctx_init(&sctx, 2 * 1000); -+ dvobj->customer_str_sctx = &sctx; -+ } -+ _exit_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ -+ if (ret == _FAIL) { -+ RTW_WARN("%s another handle ongoing\n", __func__); -+ goto exit; -+ } -+ -+ ret = rtw_customer_str_req_cmd(adapter); -+ if (ret != _SUCCESS) { -+ RTW_WARN("%s read cmd fail\n", __func__); -+ _enter_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ dvobj->customer_str_sctx = NULL; -+ _exit_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ goto exit; -+ } -+ -+ /* wait till rpt done or timeout */ -+ rtw_sctx_wait(&sctx, __func__); -+ -+ _enter_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ dvobj->customer_str_sctx = NULL; -+ if (sctx.status == RTW_SCTX_DONE_SUCCESS) -+ _rtw_memcpy(cs, dvobj->customer_str, RTW_CUSTOMER_STR_LEN); -+ else -+ ret = _FAIL; -+ _exit_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ -+exit: -+ return ret; -+} -+ -+s32 rtw_hal_h2c_customer_str_write(_adapter *adapter, const u8 *cs) -+{ -+ u8 h2c_data_w1[H2C_CUSTOMER_STR_W1_LEN] = {0}; -+ u8 h2c_data_w2[H2C_CUSTOMER_STR_W2_LEN] = {0}; -+ u8 h2c_data_w3[H2C_CUSTOMER_STR_W3_LEN] = {0}; -+ s32 ret; -+ -+ SET_H2CCMD_CUSTOMER_STR_W1_EN(h2c_data_w1, 1); -+ _rtw_memcpy(H2CCMD_CUSTOMER_STR_W1_BYTE0(h2c_data_w1), cs, 6); -+ -+ SET_H2CCMD_CUSTOMER_STR_W2_EN(h2c_data_w2, 1); -+ _rtw_memcpy(H2CCMD_CUSTOMER_STR_W2_BYTE6(h2c_data_w2), cs + 6, 6); -+ -+ SET_H2CCMD_CUSTOMER_STR_W3_EN(h2c_data_w3, 1); -+ _rtw_memcpy(H2CCMD_CUSTOMER_STR_W3_BYTE12(h2c_data_w3), cs + 6 + 6, 4); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, H2C_CUSTOMER_STR_W1, H2C_CUSTOMER_STR_W1_LEN, h2c_data_w1); -+ if (ret != _SUCCESS) { -+ RTW_WARN("%s w1 fail\n", __func__); -+ goto exit; -+ } -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, H2C_CUSTOMER_STR_W2, H2C_CUSTOMER_STR_W2_LEN, h2c_data_w2); -+ if (ret != _SUCCESS) { -+ RTW_WARN("%s w2 fail\n", __func__); -+ goto exit; -+ } -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, H2C_CUSTOMER_STR_W3, H2C_CUSTOMER_STR_W3_LEN, h2c_data_w3); -+ if (ret != _SUCCESS) { -+ RTW_WARN("%s w3 fail\n", __func__); -+ goto exit; -+ } -+ -+exit: -+ return ret; -+} -+ -+/* write customer str and check if value reported is the same as requested */ -+s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct submit_ctx sctx; -+ s32 ret = _SUCCESS; -+ -+ _enter_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ if (dvobj->customer_str_sctx != NULL) -+ ret = _FAIL; -+ else { -+ rtw_sctx_init(&sctx, 2 * 1000); -+ dvobj->customer_str_sctx = &sctx; -+ } -+ _exit_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ -+ if (ret == _FAIL) { -+ RTW_WARN("%s another handle ongoing\n", __func__); -+ goto exit; -+ } -+ -+ ret = rtw_customer_str_write_cmd(adapter, cs); -+ if (ret != _SUCCESS) { -+ RTW_WARN("%s write cmd fail\n", __func__); -+ _enter_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ dvobj->customer_str_sctx = NULL; -+ _exit_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ goto exit; -+ } -+ -+ ret = rtw_customer_str_req_cmd(adapter); -+ if (ret != _SUCCESS) { -+ RTW_WARN("%s read cmd fail\n", __func__); -+ _enter_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ dvobj->customer_str_sctx = NULL; -+ _exit_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ goto exit; -+ } -+ -+ /* wait till rpt done or timeout */ -+ rtw_sctx_wait(&sctx, __func__); -+ -+ _enter_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ dvobj->customer_str_sctx = NULL; -+ if (sctx.status == RTW_SCTX_DONE_SUCCESS) { -+ if (_rtw_memcmp(cs, dvobj->customer_str, RTW_CUSTOMER_STR_LEN) != _TRUE) { -+ RTW_WARN("%s read back check fail\n", __func__); -+ RTW_INFO_DUMP("write req: ", cs, RTW_CUSTOMER_STR_LEN); -+ RTW_INFO_DUMP("read back: ", dvobj->customer_str, RTW_CUSTOMER_STR_LEN); -+ ret = _FAIL; -+ } -+ } else -+ ret = _FAIL; -+ _exit_critical_mutex(&dvobj->customer_str_mutex, NULL); -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_RTW_CUSTOMER_STR */ -+ -+#ifdef RTW_PER_CMD_SUPPORT_FW -+#define H2C_REQ_PER_RPT_LEN 5 -+#define SET_H2CCMD_REQ_PER_RPT_GROUP_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_H2CCMD_REQ_PER_RPT_RPT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -+#define SET_H2CCMD_REQ_PER_RPT_MACID_BMAP(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd + 1, 0, 32, __Value) -+ -+u8 rtw_hal_set_req_per_rpt_cmd(_adapter *adapter, u8 group_macid, -+ u8 rpt_type, u32 macid_bitmap) -+{ -+ u8 ret = _FAIL; -+ u8 cmd_buf[H2C_REQ_PER_RPT_LEN] = {0}; -+ -+ SET_H2CCMD_REQ_PER_RPT_GROUP_MACID(cmd_buf, group_macid); -+ SET_H2CCMD_REQ_PER_RPT_RPT_TYPE(cmd_buf, rpt_type); -+ SET_H2CCMD_REQ_PER_RPT_MACID_BMAP(cmd_buf, macid_bitmap); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_REQ_PER_RPT, -+ H2C_REQ_PER_RPT_LEN, -+ cmd_buf); -+ return ret; -+} -+ -+#define GET_C2H_PER_RATE_RPT_TYPE0_MACID0(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)), 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE0_PER0(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 1, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE0_RATE0(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 2, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE0_BW0(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 3, 0, 2) -+#define GET_C2H_PER_RATE_RPT_TYPE0_TOTAL_PKT0(_data) LE_BITS_TO_2BYTE(((u8 *)(_data)) + 4, 0, 16) -+#define GET_C2H_PER_RATE_RPT_TYPE0_MACID1(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE0_PER1(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE0_RATE1(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 8, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE0_BW1(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 9, 0, 2) -+#define GET_C2H_PER_RATE_RPT_TYPE0_TOTAL_PKT1(_data) LE_BITS_TO_2BYTE(((u8 *)(_data)) + 10, 0, 16) -+ -+#define GET_C2H_PER_RATE_RPT_TYPE1_MACID0(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)), 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE1_PER0(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 1, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE1_RATE0(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 2, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE1_BW0(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 3, 0, 2) -+#define GET_C2H_PER_RATE_RPT_TYPE1_MACID1(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 4, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE1_PER1(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 5, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE1_RATE1(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE1_BW1(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 0, 2) -+#define GET_C2H_PER_RATE_RPT_TYPE1_MACID2(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 8, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE1_PER2(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 9, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE1_RATE2(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 10, 0, 8) -+#define GET_C2H_PER_RATE_RPT_TYPE1_BW2(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 11, 0, 2) -+ -+static void per_rate_rpt_update(_adapter *adapter, u8 mac_id, -+ u8 per, u8 rate, -+ u8 bw, u8 total_pkt) -+{ -+#ifdef CONFIG_RTW_MESH -+ rtw_ieee80211s_update_metric(adapter, mac_id, -+ per, rate, -+ bw, total_pkt); -+#endif -+} -+ -+int c2h_per_rate_rpt_hdl(_adapter *adapter, u8 *data, u8 len) -+{ -+ /* Now only consider type0, since it covers all params in type1 -+ * type0: mac_id, per, rate, bw, total_pkt -+ * type1: mac_id, per, rate, bw -+ */ -+ u8 mac_id[2] = {0}, per[2] = {0}, rate[2] = {0}, bw[2] = {0}; -+ u16 total_pkt[2] = {0}; -+ int ret = _FAIL, i, macid_cnt = 0; -+ -+ /* type0: -+ * 1 macid includes 6 bytes info + 1 byte 0xff -+ * 2 macid includes 2*6 bytes info -+ */ -+ if (!(len == 7 || len == 12)) { -+ RTW_WARN("%s len(%u) != 7 or 12\n", __FUNCTION__, len); -+ goto exit; -+ } -+ -+ macid_cnt++; -+ mac_id[0] = GET_C2H_PER_RATE_RPT_TYPE0_MACID0(data); -+ per[0] = GET_C2H_PER_RATE_RPT_TYPE0_PER0(data); -+ rate[0] = GET_C2H_PER_RATE_RPT_TYPE0_RATE0(data); -+ bw[0] = GET_C2H_PER_RATE_RPT_TYPE0_BW0(data); -+ total_pkt[0] = GET_C2H_PER_RATE_RPT_TYPE0_TOTAL_PKT0(data); -+ -+ mac_id[1] = GET_C2H_PER_RATE_RPT_TYPE0_MACID1(data); -+ /* 0xff means no report anymore */ -+ if (mac_id[1] == 0xff) -+ goto update_per; -+ if (len != 12) { -+ RTW_WARN("%s incorrect format\n", __FUNCTION__); -+ goto exit; -+ } -+ macid_cnt++; -+ per[1] = GET_C2H_PER_RATE_RPT_TYPE0_PER1(data); -+ rate[1] = GET_C2H_PER_RATE_RPT_TYPE0_RATE1(data); -+ bw[1] = GET_C2H_PER_RATE_RPT_TYPE0_BW1(data); -+ total_pkt[1] = GET_C2H_PER_RATE_RPT_TYPE0_TOTAL_PKT1(data); -+ -+update_per: -+ for (i = 0; i < macid_cnt; i++) { -+ RTW_DBG("[%s] type0 rpt[%d]: macid = %u, per = %u, " -+ "rate = %u, bw = %u, total_pkt = %u\n", -+ __FUNCTION__, i, mac_id[i], per[i], -+ rate[i], bw[i], total_pkt[i]); -+ per_rate_rpt_update(adapter, mac_id[i], -+ per[i], rate[i], -+ bw[i], total_pkt[i]); -+ } -+ ret = _SUCCESS; -+exit: -+ return ret; -+} -+#endif /* RTW_PER_CMD_SUPPORT_FW */ -+ -+#ifdef CONFIG_LPS_ACK -+#define GET_C2H_LPS_STATUS_RPT_GET_ACTION(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)), 0, 8) -+#define GET_C2H_LPS_STATUS_RPT_GET_STATUS_CODE(_data) LE_BITS_TO_1BYTE(((u8 *)(_data)) + 1, 0, 8) -+#define DBG_LPS_STATUS_RPT 0 -+ -+int c2h_lps_status_rpt(PADAPTER adapter, u8 *data, u8 len) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ struct submit_ctx *lps_sctx = &pwrpriv->lps_ack_sctx; -+ u8 action = 0; -+ s8 status_code = 0; -+ int ret = _FAIL; -+ -+ if (len < LPS_STATUS_RPT_LEN) { -+ RTW_WARN("%s len(%u) < %d\n", __func__, len, LPS_STATUS_RPT_LEN); -+ goto exit; -+ } -+ -+ action = GET_C2H_LPS_STATUS_RPT_GET_ACTION(data); -+ status_code = GET_C2H_LPS_STATUS_RPT_GET_STATUS_CODE(data); -+ -+ /* action=0: report force leave null data status */ -+ /* action=1: report Rf on status when receiving a SetPwrMode H2C with PwrState = RFON */ -+ switch (action) { -+ case 0: -+ /* status code 0: success, 1: no ack, 2: timeout, 3: cancel */ -+ case 1: -+ /* status code 0: FW has already turn to RFON */ -+ pwrpriv->lps_ack_status = status_code; -+ -+ if (DBG_LPS_STATUS_RPT) -+ RTW_INFO("=== [C2H LPS Action(%d)] LPS Status Code:%d ===\n", action, status_code); -+ -+ break; -+ default: -+ RTW_INFO("UnKnown Action(%d) for C2H LPS RPT\n", action); -+ break; -+ } -+ -+ rtw_sctx_done(&lps_sctx); -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_LPS_ACK */ -+ -+void rtw_hal_update_sta_wset(_adapter *adapter, struct sta_info *psta) -+{ -+ u8 w_set = 0; -+ -+ if (psta->wireless_mode & WIRELESS_11B) -+ w_set |= WIRELESS_CCK; -+ -+ if ((psta->wireless_mode & WIRELESS_11G) || (psta->wireless_mode & WIRELESS_11A)) -+ w_set |= WIRELESS_OFDM; -+ -+ if (psta->wireless_mode & WIRELESS_11_24N) -+ w_set |= WIRELESS_HT; -+ -+ if ((psta->wireless_mode & WIRELESS_11AC) || (psta->wireless_mode & WIRELESS_11_5N)) -+ w_set |= WIRELESS_VHT; -+ -+ psta->cmn.support_wireless_set = w_set; -+} -+ -+void rtw_hal_update_sta_mimo_type(_adapter *adapter, struct sta_info *psta) -+{ -+ s8 tx_nss, rx_nss; -+ -+ tx_nss = rtw_get_sta_tx_nss(adapter, psta); -+ rx_nss = rtw_get_sta_rx_nss(adapter, psta); -+ if ((tx_nss == 1) && (rx_nss == 1)) -+ psta->cmn.mimo_type = RF_1T1R; -+ else if ((tx_nss == 1) && (rx_nss == 2)) -+ psta->cmn.mimo_type = RF_1T2R; -+ else if ((tx_nss == 2) && (rx_nss == 2)) -+ psta->cmn.mimo_type = RF_2T2R; -+ else if ((tx_nss == 2) && (rx_nss == 3)) -+ psta->cmn.mimo_type = RF_2T3R; -+ else if ((tx_nss == 2) && (rx_nss == 4)) -+ psta->cmn.mimo_type = RF_2T4R; -+ else if ((tx_nss == 3) && (rx_nss == 3)) -+ psta->cmn.mimo_type = RF_3T3R; -+ else if ((tx_nss == 3) && (rx_nss == 4)) -+ psta->cmn.mimo_type = RF_3T4R; -+ else if ((tx_nss == 4) && (rx_nss == 4)) -+ psta->cmn.mimo_type = RF_4T4R; -+ else -+ rtw_warn_on(1); -+ -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+ rtw_ctrl_txss_update_mimo_type(adapter, psta); -+#endif -+ -+ RTW_INFO("STA - MAC_ID:%d, Tx - %d SS, Rx - %d SS\n", -+ psta->cmn.mac_id, tx_nss, rx_nss); -+} -+ -+void rtw_hal_update_sta_smps_cap(_adapter *adapter, struct sta_info *psta) -+{ -+ /*Spatial Multiplexing Power Save*/ -+#if 0 -+ if (check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _TRUE) { -+ #ifdef CONFIG_80211N_HT -+ if (psta->htpriv.ht_option) { -+ if (psta->htpriv.smps_cap == 0) -+ psta->cmn.sm_ps = SM_PS_STATIC; -+ else if (psta->htpriv.smps_cap == 1) -+ psta->cmn.sm_ps = SM_PS_DYNAMIC; -+ else -+ psta->cmn.sm_ps = SM_PS_DISABLE; -+ } -+ #endif /* CONFIG_80211N_HT */ -+ } else -+#endif -+ psta->cmn.sm_ps = SM_PS_DISABLE; -+ -+ RTW_INFO("STA - MAC_ID:%d, SM_PS %d\n", -+ psta->cmn.mac_id, psta->cmn.sm_ps); -+} -+ -+u8 rtw_get_mgntframe_raid(_adapter *adapter, unsigned char network_type) -+{ -+ -+ u8 raid; -+ if (IS_NEW_GENERATION_IC(adapter)) { -+ -+ raid = (network_type & WIRELESS_11B) ? RATEID_IDX_B -+ : RATEID_IDX_G; -+ } else { -+ raid = (network_type & WIRELESS_11B) ? RATR_INX_WIRELESS_B -+ : RATR_INX_WIRELESS_G; -+ } -+ return raid; -+} -+ -+void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta) -+{ -+ u8 i, tx_nss; -+ u64 tx_ra_bitmap = 0, tmp64=0; -+ -+ if (psta == NULL) -+ return; -+ -+ /* b/g mode ra_bitmap */ -+ for (i = 0; i < sizeof(psta->bssrateset); i++) { -+ if (psta->bssrateset[i]) -+ tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i] & 0x7f); -+ } -+ -+#ifdef CONFIG_80211N_HT -+if (padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode)) { -+ tx_nss = GET_HAL_TX_NSS(padapter); -+#ifdef CONFIG_80211AC_VHT -+ if (psta->vhtpriv.vht_option) { -+ /* AC mode ra_bitmap */ -+ tx_ra_bitmap |= (rtw_vht_mcs_map_to_bitmap(psta->vhtpriv.vht_mcs_map, tx_nss) << 12); -+ } else -+#endif /* CONFIG_80211AC_VHT */ -+ if (psta->htpriv.ht_option) { -+ /* n mode ra_bitmap */ -+ -+ /* Handling SMPS mode for AP MODE only*/ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) { -+ /*0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/ -+ if (psta->htpriv.smps_cap == 0 || psta->htpriv.smps_cap == 1) { -+ /*operate with only one active receive chain // 11n-MCS rate <= MSC7*/ -+ tx_nss = rtw_min(tx_nss, 1); -+ } -+ } -+ -+ tmp64 = rtw_ht_mcs_set_to_bitmap(psta->htpriv.ht_cap.supp_mcs_set, tx_nss); -+ tx_ra_bitmap |= (tmp64 << 12); -+ } -+} -+#endif /* CONFIG_80211N_HT */ -+ psta->cmn.ra_info.ramask = tx_ra_bitmap; -+ psta->init_rate = get_highest_rate_idx(tx_ra_bitmap) & 0x3f; -+} -+ -+void rtw_hal_update_sta_ra_info(PADAPTER padapter, struct sta_info *psta) -+{ -+ rtw_hal_update_sta_mimo_type(padapter, psta); -+ rtw_hal_update_sta_smps_cap(padapter, psta); -+ rtw_hal_update_sta_rate_mask(padapter, psta); -+} -+ -+#ifndef CONFIG_HAS_HW_VAR_BCN_CTRL_ADDR -+static u32 hw_bcn_ctrl_addr(_adapter *adapter, u8 hw_port) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ -+ if (hw_port >= hal_spec->port_num) { -+ RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port); -+ rtw_warn_on(1); -+ return 0; -+ } -+ -+ switch (hw_port) { -+ case HW_PORT0: -+ return REG_BCN_CTRL; -+ case HW_PORT1: -+ return REG_BCN_CTRL_1; -+ } -+ -+ return 0; -+} -+#endif -+ -+static void rtw_hal_get_msr(_adapter *adapter, u8 *net_type) -+{ -+#ifdef RTW_HALMAC -+ rtw_halmac_get_network_type(adapter_to_dvobj(adapter), -+ adapter->hw_port, net_type); -+#else /* !RTW_HALMAC */ -+ switch (adapter->hw_port) { -+ case HW_PORT0: -+ /*REG_CR - BIT[17:16]-Network Type for port 1*/ -+ *net_type = rtw_read8(adapter, MSR) & 0x03; -+ break; -+ case HW_PORT1: -+ /*REG_CR - BIT[19:18]-Network Type for port 1*/ -+ *net_type = (rtw_read8(adapter, MSR) & 0x0C) >> 2; -+ break; -+#if defined(CONFIG_RTL8814A) -+ case HW_PORT2: -+ /*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/ -+ *net_type = rtw_read8(adapter, MSR1) & 0x03; -+ break; -+ case HW_PORT3: -+ /*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/ -+ *net_type = (rtw_read8(adapter, MSR1) & 0x0C) >> 2; -+ break; -+ case HW_PORT4: -+ /*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/ -+ *net_type = (rtw_read8(adapter, MSR1) & 0x30) >> 4; -+ break; -+#endif /*#if defined(CONFIG_RTL8814A)*/ -+ default: -+ RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n", -+ ADPT_ARG(adapter), adapter->hw_port); -+ rtw_warn_on(1); -+ break; -+ } -+#endif /* !RTW_HALMAC */ -+} -+ -+#if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) /*For 2 hw ports - 88E/92E/8812/8821/8723B*/ -+static u8 rtw_hal_net_type_decision(_adapter *adapter, u8 net_type) -+{ -+ if ((adapter->hw_port == HW_PORT0) && (rtw_get_mbid_cam_entry_num(adapter))) { -+ if (net_type != _HW_STATE_NOLINK_) -+ return _HW_STATE_AP_; -+ } -+ return net_type; -+} -+#endif -+static void rtw_hal_set_msr(_adapter *adapter, u8 net_type) -+{ -+#ifdef RTW_HALMAC -+ #if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) -+ net_type = rtw_hal_net_type_decision(adapter, net_type); -+ #endif -+ rtw_halmac_set_network_type(adapter_to_dvobj(adapter), -+ adapter->hw_port, net_type); -+#else /* !RTW_HALMAC */ -+ u8 val8 = 0; -+ -+ switch (adapter->hw_port) { -+ case HW_PORT0: -+ #if defined(CONFIG_MI_WITH_MBSSID_CAM) && defined(CONFIG_MBSSID_CAM) -+ net_type = rtw_hal_net_type_decision(adapter, net_type); -+ #endif -+ /*REG_CR - BIT[17:16]-Network Type for port 0*/ -+ val8 = rtw_read8(adapter, MSR) & 0x0C; -+ val8 |= net_type; -+ rtw_write8(adapter, MSR, val8); -+ break; -+ case HW_PORT1: -+ /*REG_CR - BIT[19:18]-Network Type for port 1*/ -+ val8 = rtw_read8(adapter, MSR) & 0x03; -+ val8 |= net_type << 2; -+ rtw_write8(adapter, MSR, val8); -+ break; -+#if defined(CONFIG_RTL8814A) -+ case HW_PORT2: -+ /*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/ -+ val8 = rtw_read8(adapter, MSR1) & 0xFC; -+ val8 |= net_type; -+ rtw_write8(adapter, MSR1, val8); -+ break; -+ case HW_PORT3: -+ /*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/ -+ val8 = rtw_read8(adapter, MSR1) & 0xF3; -+ val8 |= net_type << 2; -+ rtw_write8(adapter, MSR1, val8); -+ break; -+ case HW_PORT4: -+ /*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/ -+ val8 = rtw_read8(adapter, MSR1) & 0xCF; -+ val8 |= net_type << 4; -+ rtw_write8(adapter, MSR1, val8); -+ break; -+#endif /* CONFIG_RTL8814A */ -+ default: -+ RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n", -+ ADPT_ARG(adapter), adapter->hw_port); -+ rtw_warn_on(1); -+ break; -+ } -+#endif /* !RTW_HALMAC */ -+} -+ -+#ifndef SEC_CAM_ACCESS_TIMEOUT_MS -+ #define SEC_CAM_ACCESS_TIMEOUT_MS 200 -+#endif -+ -+#ifndef DBG_SEC_CAM_ACCESS -+ #define DBG_SEC_CAM_ACCESS 0 -+#endif -+ -+u32 rtw_sec_read_cam(_adapter *adapter, u8 addr) -+{ -+ _mutex *mutex = &adapter_to_dvobj(adapter)->cam_ctl.sec_cam_access_mutex; -+ u32 rdata; -+ u32 cnt = 0; -+ systime start = 0, end = 0; -+ u8 timeout = 0; -+ u8 sr = 0; -+ -+ _enter_critical_mutex(mutex, NULL); -+ -+ rtw_write32(adapter, REG_CAMCMD, CAM_POLLINIG | addr); -+ -+ start = rtw_get_current_time(); -+ while (1) { -+ if (rtw_is_surprise_removed(adapter)) { -+ sr = 1; -+ break; -+ } -+ -+ cnt++; -+ if (0 == (rtw_read32(adapter, REG_CAMCMD) & CAM_POLLINIG)) -+ break; -+ -+ if (rtw_get_passing_time_ms(start) > SEC_CAM_ACCESS_TIMEOUT_MS) { -+ timeout = 1; -+ break; -+ } -+ } -+ end = rtw_get_current_time(); -+ -+ rdata = rtw_read32(adapter, REG_CAMREAD); -+ -+ _exit_critical_mutex(mutex, NULL); -+ -+ if (DBG_SEC_CAM_ACCESS || timeout) { -+ RTW_INFO(FUNC_ADPT_FMT" addr:0x%02x, rdata:0x%08x, to:%u, polling:%u, %d ms\n" -+ , FUNC_ADPT_ARG(adapter), addr, rdata, timeout, cnt, rtw_get_time_interval_ms(start, end)); -+ } -+ -+ return rdata; -+} -+ -+void rtw_sec_write_cam(_adapter *adapter, u8 addr, u32 wdata) -+{ -+ _mutex *mutex = &adapter_to_dvobj(adapter)->cam_ctl.sec_cam_access_mutex; -+ u32 cnt = 0; -+ systime start = 0, end = 0; -+ u8 timeout = 0; -+ u8 sr = 0; -+ -+ _enter_critical_mutex(mutex, NULL); -+ -+ rtw_write32(adapter, REG_CAMWRITE, wdata); -+ rtw_write32(adapter, REG_CAMCMD, CAM_POLLINIG | CAM_WRITE | addr); -+ -+ start = rtw_get_current_time(); -+ while (1) { -+ if (rtw_is_surprise_removed(adapter)) { -+ sr = 1; -+ break; -+ } -+ -+ cnt++; -+ if (0 == (rtw_read32(adapter, REG_CAMCMD) & CAM_POLLINIG)) -+ break; -+ -+ if (rtw_get_passing_time_ms(start) > SEC_CAM_ACCESS_TIMEOUT_MS) { -+ timeout = 1; -+ break; -+ } -+ } -+ end = rtw_get_current_time(); -+ -+ _exit_critical_mutex(mutex, NULL); -+ -+ if (DBG_SEC_CAM_ACCESS || timeout) { -+ RTW_INFO(FUNC_ADPT_FMT" addr:0x%02x, wdata:0x%08x, to:%u, polling:%u, %d ms\n" -+ , FUNC_ADPT_ARG(adapter), addr, wdata, timeout, cnt, rtw_get_time_interval_ms(start, end)); -+ } -+} -+ -+void rtw_sec_read_cam_ent(_adapter *adapter, u8 id, u8 *ctrl, u8 *mac, u8 *key) -+{ -+ u8 i; -+ u32 rdata; -+ u8 begin = 0; -+ u8 end = 5; /* TODO: consider other key length accordingly */ -+ -+ if (!ctrl && !mac && !key) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ /* TODO: check id range */ -+ -+ if (!ctrl && !mac) -+ begin = 2; /* read from key */ -+ -+ if (!key && !mac) -+ end = 0; /* read to ctrl */ -+ else if (!key) -+ end = 2; /* read to mac */ -+ -+ for (i = begin; i <= end; i++) { -+ rdata = rtw_sec_read_cam(adapter, (id << 3) | i); -+ -+ switch (i) { -+ case 0: -+ if (ctrl) -+ _rtw_memcpy(ctrl, (u8 *)(&rdata), 2); -+ if (mac) -+ _rtw_memcpy(mac, ((u8 *)(&rdata)) + 2, 2); -+ break; -+ case 1: -+ if (mac) -+ _rtw_memcpy(mac + 2, (u8 *)(&rdata), 4); -+ break; -+ default: -+ if (key) -+ _rtw_memcpy(key + (i - 2) * 4, (u8 *)(&rdata), 4); -+ break; -+ } -+ } -+ -+exit: -+ return; -+} -+ -+ -+void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) -+{ -+ unsigned int i; -+ int j; -+ u8 addr, addr1 = 0; -+ u32 wdata, wdata1 = 0; -+ -+ /* TODO: consider other key length accordingly */ -+#if 0 -+ switch ((ctrl & 0x1c) >> 2) { -+ case _WEP40_: -+ case _TKIP_: -+ case _AES_: -+ case _WEP104_: -+ -+ } -+#else -+ j = 7; -+#endif -+ -+ for (; j >= 0; j--) { -+ switch (j) { -+ case 0: -+ wdata = (ctrl | (mac[0] << 16) | (mac[1] << 24)); -+ break; -+ case 1: -+ wdata = (mac[2] | (mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24)); -+ break; -+ case 6: -+ case 7: -+ wdata = 0; -+ break; -+ default: -+ i = (j - 2) << 2; -+ wdata = (key[i] | (key[i + 1] << 8) | (key[i + 2] << 16) | (key[i + 3] << 24)); -+ break; -+ } -+ -+ addr = (id << 3) + j; -+ -+#if defined(CONFIG_RTL8192F) -+ if(j == 1) { -+ wdata1 = wdata; -+ addr1 = addr; -+ continue; -+ } -+#endif -+ -+ rtw_sec_write_cam(adapter, addr, wdata); -+ } -+ -+#if defined(CONFIG_RTL8192F) -+ rtw_sec_write_cam(adapter, addr1, wdata1); -+#endif -+} -+ -+void rtw_sec_clr_cam_ent(_adapter *adapter, u8 id) -+{ -+ u8 addr; -+ -+ addr = (id << 3); -+ rtw_sec_write_cam(adapter, addr, 0); -+} -+ -+bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id) -+{ -+ bool res; -+ u16 ctrl; -+ -+ rtw_sec_read_cam_ent(adapter, id, (u8 *)&ctrl, NULL, NULL); -+ -+ res = (ctrl & BIT6) ? _TRUE : _FALSE; -+ return res; -+} -+#ifdef CONFIG_MBSSID_CAM -+void rtw_mbid_cam_init(struct dvobj_priv *dvobj) -+{ -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ _rtw_spinlock_init(&mbid_cam_ctl->lock); -+ mbid_cam_ctl->bitmap = 0; -+ ATOMIC_SET(&mbid_cam_ctl->mbid_entry_num, 0); -+ _rtw_memset(&dvobj->mbid_cam_cache, 0, sizeof(dvobj->mbid_cam_cache)); -+} -+ -+void rtw_mbid_cam_deinit(struct dvobj_priv *dvobj) -+{ -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ _rtw_spinlock_free(&mbid_cam_ctl->lock); -+} -+ -+void rtw_mbid_cam_reset(_adapter *adapter) -+{ -+ _irqL irqL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ _enter_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ mbid_cam_ctl->bitmap = 0; -+ _rtw_memset(&dvobj->mbid_cam_cache, 0, sizeof(dvobj->mbid_cam_cache)); -+ _exit_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ -+ ATOMIC_SET(&mbid_cam_ctl->mbid_entry_num, 0); -+} -+static u8 _rtw_mbid_cam_search_by_macaddr(_adapter *adapter, u8 *mac_addr) -+{ -+ u8 i; -+ u8 cam_id = INVALID_CAM_ID; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ for (i = 0; i < TOTAL_MBID_CAM_NUM; i++) { -+ if (mac_addr && _rtw_memcmp(dvobj->mbid_cam_cache[i].mac_addr, mac_addr, ETH_ALEN) == _TRUE) { -+ cam_id = i; -+ break; -+ } -+ } -+ -+ RTW_INFO("%s mac:"MAC_FMT" - cam_id:%d\n", __func__, MAC_ARG(mac_addr), cam_id); -+ return cam_id; -+} -+ -+u8 rtw_mbid_cam_search_by_macaddr(_adapter *adapter, u8 *mac_addr) -+{ -+ _irqL irqL; -+ -+ u8 cam_id = INVALID_CAM_ID; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ _enter_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ cam_id = _rtw_mbid_cam_search_by_macaddr(adapter, mac_addr); -+ _exit_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ -+ return cam_id; -+} -+static u8 _rtw_mbid_cam_search_by_ifaceid(_adapter *adapter, u8 iface_id) -+{ -+ u8 i; -+ u8 cam_id = INVALID_CAM_ID; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ for (i = 0; i < TOTAL_MBID_CAM_NUM; i++) { -+ if (iface_id == dvobj->mbid_cam_cache[i].iface_id) { -+ cam_id = i; -+ break; -+ } -+ } -+ if (cam_id != INVALID_CAM_ID) -+ RTW_INFO("%s iface_id:%d mac:"MAC_FMT" - cam_id:%d\n", -+ __func__, iface_id, MAC_ARG(dvobj->mbid_cam_cache[cam_id].mac_addr), cam_id); -+ -+ return cam_id; -+} -+ -+u8 rtw_mbid_cam_search_by_ifaceid(_adapter *adapter, u8 iface_id) -+{ -+ _irqL irqL; -+ u8 cam_id = INVALID_CAM_ID; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ _enter_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ cam_id = _rtw_mbid_cam_search_by_ifaceid(adapter, iface_id); -+ _exit_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ -+ return cam_id; -+} -+u8 rtw_get_max_mbid_cam_id(_adapter *adapter) -+{ -+ _irqL irqL; -+ s8 i; -+ u8 cam_id = INVALID_CAM_ID; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ _enter_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ for (i = (TOTAL_MBID_CAM_NUM - 1); i >= 0; i--) { -+ if (mbid_cam_ctl->bitmap & BIT(i)) { -+ cam_id = i; -+ break; -+ } -+ } -+ _exit_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ /*RTW_INFO("%s max cam_id:%d\n", __func__, cam_id);*/ -+ return cam_id; -+} -+ -+inline u8 rtw_get_mbid_cam_entry_num(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ return ATOMIC_READ(&mbid_cam_ctl->mbid_entry_num); -+} -+ -+static inline void mbid_cam_cache_init(_adapter *adapter, struct mbid_cam_cache *pmbid_cam, u8 *mac_addr) -+{ -+ if (adapter && pmbid_cam && mac_addr) { -+ _rtw_memcpy(pmbid_cam->mac_addr, mac_addr, ETH_ALEN); -+ pmbid_cam->iface_id = adapter->iface_id; -+ } -+} -+static inline void mbid_cam_cache_clr(struct mbid_cam_cache *pmbid_cam) -+{ -+ if (pmbid_cam) { -+ _rtw_memset(pmbid_cam->mac_addr, 0, ETH_ALEN); -+ pmbid_cam->iface_id = CONFIG_IFACE_NUMBER; -+ } -+} -+ -+u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr) -+{ -+ _irqL irqL; -+ u8 cam_id = INVALID_CAM_ID, i; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ u8 entry_num = ATOMIC_READ(&mbid_cam_ctl->mbid_entry_num); -+ -+ if (INVALID_CAM_ID != rtw_mbid_cam_search_by_macaddr(adapter, mac_addr)) -+ goto exit; -+ -+ if (entry_num >= TOTAL_MBID_CAM_NUM) { -+ RTW_INFO(FUNC_ADPT_FMT" failed !! MBSSID number :%d over TOTAL_CAM_ENTRY(8)\n", FUNC_ADPT_ARG(adapter), entry_num); -+ rtw_warn_on(1); -+ } -+ -+ _enter_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ for (i = 0; i < TOTAL_MBID_CAM_NUM; i++) { -+ if (!(mbid_cam_ctl->bitmap & BIT(i))) { -+ mbid_cam_ctl->bitmap |= BIT(i); -+ cam_id = i; -+ break; -+ } -+ } -+ if ((cam_id != INVALID_CAM_ID) && (mac_addr)) -+ mbid_cam_cache_init(adapter, &dvobj->mbid_cam_cache[cam_id], mac_addr); -+ _exit_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ -+ if (cam_id != INVALID_CAM_ID) { -+ ATOMIC_INC(&mbid_cam_ctl->mbid_entry_num); -+ RTW_INFO("%s mac:"MAC_FMT" - cam_id:%d\n", __func__, MAC_ARG(mac_addr), cam_id); -+#ifdef DBG_MBID_CAM_DUMP -+ rtw_mbid_cam_cache_dump(RTW_DBGDUMP, __func__, adapter); -+#endif -+ } else -+ RTW_INFO("%s [WARN] "MAC_FMT" - invalid cam_id:%d\n", __func__, MAC_ARG(mac_addr), cam_id); -+exit: -+ return cam_id; -+} -+ -+u8 rtw_mbid_cam_info_change(_adapter *adapter, u8 *mac_addr) -+{ -+ _irqL irqL; -+ u8 entry_id = INVALID_CAM_ID; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ _enter_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ entry_id = _rtw_mbid_cam_search_by_ifaceid(adapter, adapter->iface_id); -+ if (entry_id != INVALID_CAM_ID) -+ mbid_cam_cache_init(adapter, &dvobj->mbid_cam_cache[entry_id], mac_addr); -+ -+ _exit_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ -+ return entry_id; -+} -+ -+u8 rtw_mbid_cam_assign(_adapter *adapter, u8 *mac_addr, u8 camid) -+{ -+ _irqL irqL; -+ u8 ret = _FALSE; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ if ((camid >= TOTAL_MBID_CAM_NUM) || (camid == INVALID_CAM_ID)) { -+ RTW_INFO(FUNC_ADPT_FMT" failed !! invlaid mbid_canid :%d\n", FUNC_ADPT_ARG(adapter), camid); -+ rtw_warn_on(1); -+ } -+ if (INVALID_CAM_ID != rtw_mbid_cam_search_by_macaddr(adapter, mac_addr)) -+ goto exit; -+ -+ _enter_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ if (!(mbid_cam_ctl->bitmap & BIT(camid))) { -+ if (mac_addr) { -+ mbid_cam_ctl->bitmap |= BIT(camid); -+ mbid_cam_cache_init(adapter, &dvobj->mbid_cam_cache[camid], mac_addr); -+ ret = _TRUE; -+ } -+ } -+ _exit_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ -+ if (ret == _TRUE) { -+ ATOMIC_INC(&mbid_cam_ctl->mbid_entry_num); -+ RTW_INFO("%s mac:"MAC_FMT" - cam_id:%d\n", __func__, MAC_ARG(mac_addr), camid); -+#ifdef DBG_MBID_CAM_DUMP -+ rtw_mbid_cam_cache_dump(RTW_DBGDUMP, __func__, adapter); -+#endif -+ } else -+ RTW_INFO("%s [WARN] mac:"MAC_FMT" - cam_id:%d assigned failed\n", __func__, MAC_ARG(mac_addr), camid); -+ -+exit: -+ return ret; -+} -+ -+void rtw_mbid_camid_clean(_adapter *adapter, u8 mbss_canid) -+{ -+ _irqL irqL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ if ((mbss_canid >= TOTAL_MBID_CAM_NUM) || (mbss_canid == INVALID_CAM_ID)) { -+ RTW_INFO(FUNC_ADPT_FMT" failed !! invlaid mbid_canid :%d\n", FUNC_ADPT_ARG(adapter), mbss_canid); -+ rtw_warn_on(1); -+ } -+ _enter_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ mbid_cam_cache_clr(&dvobj->mbid_cam_cache[mbss_canid]); -+ mbid_cam_ctl->bitmap &= (~BIT(mbss_canid)); -+ _exit_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ ATOMIC_DEC(&mbid_cam_ctl->mbid_entry_num); -+ RTW_INFO("%s - cam_id:%d\n", __func__, mbss_canid); -+} -+int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name, _adapter *adapter) -+{ -+ _irqL irqL; -+ u8 i; -+ _adapter *iface; -+ u8 iface_id; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ u8 entry_num = ATOMIC_READ(&mbid_cam_ctl->mbid_entry_num); -+ u8 max_cam_id = rtw_get_max_mbid_cam_id(adapter); -+ -+ RTW_PRINT_SEL(sel, "== MBSSID CAM DUMP (%s)==\n", fun_name); -+ -+ _enter_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ RTW_PRINT_SEL(sel, "Entry numbers:%d, max_camid:%d, bitmap:0x%08x\n", entry_num, max_cam_id, mbid_cam_ctl->bitmap); -+ for (i = 0; i < TOTAL_MBID_CAM_NUM; i++) { -+ RTW_PRINT_SEL(sel, "CAM_ID = %d\t", i); -+ -+ if (mbid_cam_ctl->bitmap & BIT(i)) { -+ iface_id = dvobj->mbid_cam_cache[i].iface_id; -+ _RTW_PRINT_SEL(sel, "IF_ID:%d\t", iface_id); -+ _RTW_PRINT_SEL(sel, "MAC Addr:"MAC_FMT"\t", MAC_ARG(dvobj->mbid_cam_cache[i].mac_addr)); -+ -+ iface = dvobj->padapters[iface_id]; -+ if (iface) { -+ if (MLME_IS_STA(iface)) -+ _RTW_PRINT_SEL(sel, "ROLE:%s\n", "STA"); -+ else if (MLME_IS_AP(iface)) -+ _RTW_PRINT_SEL(sel, "ROLE:%s\n", "AP"); -+ else if (MLME_IS_MESH(iface)) -+ _RTW_PRINT_SEL(sel, "ROLE:%s\n", "MESH"); -+ else -+ _RTW_PRINT_SEL(sel, "ROLE:%s\n", "NONE"); -+ } -+ -+ } else -+ _RTW_PRINT_SEL(sel, "N/A\n"); -+ } -+ _exit_critical_bh(&mbid_cam_ctl->lock, &irqL); -+ return 0; -+} -+ -+static void read_mbssid_cam(_adapter *padapter, u8 cam_addr, u8 *mac) -+{ -+ u8 poll = 1; -+ u8 cam_ready = _FALSE; -+ u32 cam_data1 = 0; -+ u16 cam_data2 = 0; -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ return; -+ -+ rtw_write32(padapter, REG_MBIDCAMCFG_2, BIT_MBIDCAM_POLL | ((cam_addr & MBIDCAM_ADDR_MASK) << MBIDCAM_ADDR_SHIFT)); -+ -+ do { -+ if (0 == (rtw_read32(padapter, REG_MBIDCAMCFG_2) & BIT_MBIDCAM_POLL)) { -+ cam_ready = _TRUE; -+ break; -+ } -+ poll++; -+ } while ((poll % 10) != 0 && !RTW_CANNOT_RUN(padapter)); -+ -+ if (cam_ready) { -+ cam_data1 = rtw_read32(padapter, REG_MBIDCAMCFG_1); -+ mac[0] = cam_data1 & 0xFF; -+ mac[1] = (cam_data1 >> 8) & 0xFF; -+ mac[2] = (cam_data1 >> 16) & 0xFF; -+ mac[3] = (cam_data1 >> 24) & 0xFF; -+ -+ cam_data2 = rtw_read16(padapter, REG_MBIDCAMCFG_2); -+ mac[4] = cam_data2 & 0xFF; -+ mac[5] = (cam_data2 >> 8) & 0xFF; -+ } -+ -+} -+int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter) -+{ -+ /*_irqL irqL;*/ -+ u8 i; -+ u8 mac_addr[ETH_ALEN]; -+ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+ RTW_PRINT_SEL(sel, "\n== MBSSID HW-CAM DUMP (%s)==\n", fun_name); -+ -+ /*_enter_critical_bh(&mbid_cam_ctl->lock, &irqL);*/ -+ for (i = 0; i < TOTAL_MBID_CAM_NUM; i++) { -+ RTW_PRINT_SEL(sel, "CAM_ID = %d\t", i); -+ _rtw_memset(mac_addr, 0, ETH_ALEN); -+ read_mbssid_cam(adapter, i, mac_addr); -+ _RTW_PRINT_SEL(sel, "MAC Addr:"MAC_FMT"\n", MAC_ARG(mac_addr)); -+ } -+ /*_exit_critical_bh(&mbid_cam_ctl->lock, &irqL);*/ -+ return 0; -+} -+ -+static void write_mbssid_cam(_adapter *padapter, u8 cam_addr, u8 *mac) -+{ -+ u32 cam_val[2] = {0}; -+ -+ cam_val[0] = (mac[3] << 24) | (mac[2] << 16) | (mac[1] << 8) | mac[0]; -+ cam_val[1] = ((cam_addr & MBIDCAM_ADDR_MASK) << MBIDCAM_ADDR_SHIFT) | (mac[5] << 8) | mac[4]; -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_MBSSID_CAM_WRITE, (u8 *)cam_val); -+} -+ -+/* -+static void clear_mbssid_cam(_adapter *padapter, u8 cam_addr) -+{ -+ rtw_hal_set_hwreg(padapter, HW_VAR_MBSSID_CAM_CLEAR, &cam_addr); -+} -+*/ -+ -+void rtw_ap_set_mbid_num(_adapter *adapter, u8 ap_num) -+{ -+ rtw_write8(adapter, REG_MBID_NUM, -+ ((rtw_read8(adapter, REG_MBID_NUM) & 0xF8) | ((ap_num -1) & 0x07))); -+ -+} -+void rtw_mbid_cam_enable(_adapter *adapter) -+{ -+ /*enable MBSSID*/ -+ rtw_hal_rcr_add(adapter, RCR_ENMBID); -+} -+void rtw_mi_set_mbid_cam(_adapter *adapter) -+{ -+ u8 i; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mbid_cam_ctl_t *mbid_cam_ctl = &dvobj->mbid_cam_ctl; -+ -+#ifdef DBG_MBID_CAM_DUMP -+ rtw_mbid_cam_cache_dump(RTW_DBGDUMP, __func__, adapter); -+#endif -+ -+ for (i = 0; i < TOTAL_MBID_CAM_NUM; i++) { -+ if (mbid_cam_ctl->bitmap & BIT(i)) { -+ write_mbssid_cam(adapter, i, dvobj->mbid_cam_cache[i].mac_addr); -+ RTW_INFO("%s - cam_id:%d => mac:"MAC_FMT"\n", __func__, i, MAC_ARG(dvobj->mbid_cam_cache[i].mac_addr)); -+ } -+ } -+ rtw_mbid_cam_enable(adapter); -+} -+#endif /*CONFIG_MBSSID_CAM*/ -+ -+#ifdef CONFIG_FW_HANDLE_TXBCN -+#define H2C_BCN_OFFLOAD_LEN 1 -+ -+#define SET_H2CCMD_BCN_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_BCN_ROOT_TBTT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_H2CCMD_BCN_VAP1_TBTT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_H2CCMD_BCN_VAP2_TBTT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+#define SET_H2CCMD_BCN_VAP3_TBTT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -+#define SET_H2CCMD_BCN_VAP4_TBTT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) -+ -+void rtw_hal_set_fw_ap_bcn_offload_cmd(_adapter *adapter, bool fw_bcn_en, u8 tbtt_rpt_map) -+{ -+ u8 fw_bcn_offload[1] = {0}; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ if (fw_bcn_en) -+ SET_H2CCMD_BCN_OFFLOAD_EN(fw_bcn_offload, 1); -+ -+ if (tbtt_rpt_map & BIT(0)) -+ SET_H2CCMD_BCN_ROOT_TBTT_RPT(fw_bcn_offload, 1); -+ if (tbtt_rpt_map & BIT(1)) -+ SET_H2CCMD_BCN_VAP1_TBTT_RPT(fw_bcn_offload, 1); -+ if (tbtt_rpt_map & BIT(2)) -+ SET_H2CCMD_BCN_VAP2_TBTT_RPT(fw_bcn_offload, 1); -+ if (tbtt_rpt_map & BIT(3)) -+ SET_H2CCMD_BCN_VAP3_TBTT_RPT(fw_bcn_offload, 1); -+ -+ dvobj->vap_tbtt_rpt_map = tbtt_rpt_map; -+ dvobj->fw_bcn_offload = fw_bcn_en; -+ RTW_INFO("[FW BCN] Offload : %s\n", (dvobj->fw_bcn_offload) ? "EN" : "DIS"); -+ RTW_INFO("[FW BCN] TBTT RPT map : 0x%02x\n", dvobj->vap_tbtt_rpt_map); -+ -+ rtw_hal_fill_h2c_cmd(adapter, H2C_FW_BCN_OFFLOAD, -+ H2C_BCN_OFFLOAD_LEN, fw_bcn_offload); -+} -+ -+void rtw_hal_set_bcn_rsvdpage_loc_cmd(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 ret, vap_id; -+ u32 page_size = 0; -+ u8 bcn_rsvdpage[H2C_BCN_RSVDPAGE_LEN] = {0}; -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&page_size); -+ #if 1 -+ for (vap_id = 0; vap_id < CONFIG_LIMITED_AP_NUM; vap_id++) { -+ if (dvobj->vap_map & BIT(vap_id)) -+ bcn_rsvdpage[vap_id] = vap_id * (MAX_BEACON_LEN / page_size); -+ } -+ #else -+#define SET_H2CCMD_BCN_RSVDPAGE_LOC_ROOT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 8, __Value) -+#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 8, __Value) -+#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 8, __Value) -+#define SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP4(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 8, __Value) -+ -+ if (dvobj->vap_map & BIT(0)) -+ SET_H2CCMD_BCN_RSVDPAGE_LOC_ROOT(bcn_rsvdpage, 0); -+ if (dvobj->vap_map & BIT(1)) -+ SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP1(bcn_rsvdpage, -+ 1 * (MAX_BEACON_LEN / page_size)); -+ if (dvobj->vap_map & BIT(2)) -+ SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP2(bcn_rsvdpage, -+ 2 * (MAX_BEACON_LEN / page_size)); -+ if (dvobj->vap_map & BIT(3)) -+ SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP3(bcn_rsvdpage, -+ 3 * (MAX_BEACON_LEN / page_size)); -+ if (dvobj->vap_map & BIT(4)) -+ SET_H2CCMD_BCN_RSVDPAGE_LOC_VAP4(bcn_rsvdpage, -+ 4 * (MAX_BEACON_LEN / page_size)); -+ #endif -+ if (1) { -+ RTW_INFO("[BCN_LOC] vap_map : 0x%02x\n", dvobj->vap_map); -+ RTW_INFO("[BCN_LOC] page_size :%d, @bcn_page_num :%d\n" -+ , page_size, (MAX_BEACON_LEN / page_size)); -+ RTW_INFO("[BCN_LOC] root ap : 0x%02x\n", *bcn_rsvdpage); -+ RTW_INFO("[BCN_LOC] vap_1 : 0x%02x\n", *(bcn_rsvdpage + 1)); -+ RTW_INFO("[BCN_LOC] vap_2 : 0x%02x\n", *(bcn_rsvdpage + 2)); -+ RTW_INFO("[BCN_LOC] vap_3 : 0x%02x\n", *(bcn_rsvdpage + 3)); -+ RTW_INFO("[BCN_LOC] vap_4 : 0x%02x\n", *(bcn_rsvdpage + 4)); -+ } -+ ret = rtw_hal_fill_h2c_cmd(adapter, H2C_BCN_RSVDPAGE, -+ H2C_BCN_RSVDPAGE_LEN, bcn_rsvdpage); -+} -+ -+void rtw_ap_multi_bcn_cfg(_adapter *adapter) -+{ -+ u8 dft_bcn_space = DEFAULT_BCN_INTERVAL; -+ u8 sub_bcn_space = (DEFAULT_BCN_INTERVAL / CONFIG_LIMITED_AP_NUM); -+ -+ /*enable to rx data frame*/ -+ rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); -+ -+ /*Disable Port0's beacon function*/ -+ rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) & ~BIT_EN_BCN_FUNCTION); -+ /*Reset Port0's TSF*/ -+ rtw_write8(adapter, REG_DUAL_TSF_RST, BIT_TSFTR_RST); -+ -+ rtw_ap_set_mbid_num(adapter, CONFIG_LIMITED_AP_NUM); -+ -+ /*BCN space & BCN sub-space 0x554[15:0] = 0x64,0x5BC[23:16] = 0x21*/ -+ rtw_halmac_set_bcn_interval(adapter_to_dvobj(adapter), HW_PORT0, dft_bcn_space); -+ rtw_write8(adapter, REG_MBSSID_BCN_SPACE3 + 2, sub_bcn_space); -+ -+ #if 0 /*setting in hw_var_set_opmode_mbid - ResumeTxBeacon*/ -+ /*BCN hold time 0x540[19:8] = 0x80*/ -+ rtw_write8(adapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME & 0xFF); -+ rtw_write8(adapter, REG_TBTT_PROHIBIT + 2, -+ (rtw_read8(adapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME >> 8)); -+ #endif -+ -+ /*ATIM window -0x55A = 0x32, reg 0x570 = 0x32, reg 0x5A0 = 0x32 */ -+ rtw_write8(adapter, REG_ATIMWND, 0x32); -+ rtw_write8(adapter, REG_ATIMWND1_V1, 0x32); -+ rtw_write8(adapter, REG_ATIMWND2, 0x32); -+ rtw_write8(adapter, REG_ATIMWND3, 0x32); -+ /* -+ rtw_write8(adapter, REG_ATIMWND4, 0x32); -+ rtw_write8(adapter, REG_ATIMWND5, 0x32); -+ rtw_write8(adapter, REG_ATIMWND6, 0x32); -+ rtw_write8(adapter, REG_ATIMWND7, 0x32);*/ -+ -+ /*no limit setting - 0x5A7 = 0xFF - Packet in Hi Queue Tx immediately*/ -+ rtw_write8(adapter, REG_HIQ_NO_LMT_EN, 0xFF); -+ -+ /*Mask all beacon*/ -+ rtw_write8(adapter, REG_MBSSID_CTRL, 0); -+ -+ /*BCN invalid bit setting 0x454[6] = 1*/ -+ /*rtw_write8(adapter, REG_CCK_CHECK, rtw_read8(adapter, REG_CCK_CHECK) | BIT_EN_BCN_PKT_REL);*/ -+ -+ /*Enable Port0's beacon function*/ -+ rtw_write8(adapter, REG_BCN_CTRL, -+ rtw_read8(adapter, REG_BCN_CTRL) | BIT_DIS_RX_BSSID_FIT | BIT_P0_EN_TXBCN_RPT | BIT_DIS_TSF_UDT | BIT_EN_BCN_FUNCTION); -+ -+ /* Enable HW seq for BCN -+ * 0x4FC[0]: EN_HWSEQ / 0x4FC[1]: EN_HWSEQEXT */ -+ #ifdef CONFIG_RTL8822B -+ if (IS_HARDWARE_TYPE_8822B(adapter)) -+ rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822B, 0x01); -+ #endif -+ -+ #ifdef CONFIG_RTL8822C -+ if (IS_HARDWARE_TYPE_8822C(adapter)) -+ rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822C, 0x01); -+ #endif -+} -+static void _rtw_mbid_bcn_cfg(_adapter *adapter, bool mbcnq_en, u8 mbcnq_id) -+{ -+ if (mbcnq_id >= CONFIG_LIMITED_AP_NUM) { -+ RTW_ERR(FUNC_ADPT_FMT"- mbid bcnq_id(%d) invalid\n", FUNC_ADPT_ARG(adapter), mbcnq_id); -+ rtw_warn_on(1); -+ } -+ -+ if (mbcnq_en) { -+ rtw_write8(adapter, REG_MBSSID_CTRL, -+ rtw_read8(adapter, REG_MBSSID_CTRL) | BIT(mbcnq_id)); -+ RTW_INFO(FUNC_ADPT_FMT"- mbid bcnq_id(%d) enabled\n", FUNC_ADPT_ARG(adapter), mbcnq_id); -+ } else { -+ rtw_write8(adapter, REG_MBSSID_CTRL, -+ rtw_read8(adapter, REG_MBSSID_CTRL) & (~BIT(mbcnq_id))); -+ RTW_INFO(FUNC_ADPT_FMT"- mbid bcnq_id(%d) disabled\n", FUNC_ADPT_ARG(adapter), mbcnq_id); -+ } -+} -+/*#define CONFIG_FW_TBTT_RPT*/ -+void rtw_ap_mbid_bcn_en(_adapter *adapter, u8 ap_id) -+{ -+ RTW_INFO(FUNC_ADPT_FMT"- ap_id(%d)\n", FUNC_ADPT_ARG(adapter), ap_id); -+ -+ #ifdef CONFIG_FW_TBTT_RPT -+ if (rtw_ap_get_nums(adapter) >= 1) { -+ u8 tbtt_rpt_map = adapter_to_dvobj(adapter)->vap_tbtt_rpt_map; -+ -+ rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _TRUE, -+ tbtt_rpt_map | BIT(ap_id));/*H2C-0xBA*/ -+ } -+ #else -+ if (rtw_ap_get_nums(adapter) == 1) -+ rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _TRUE, 0);/*H2C-0xBA*/ -+ #endif -+ -+ rtw_hal_set_bcn_rsvdpage_loc_cmd(adapter);/*H2C-0x09*/ -+ -+ _rtw_mbid_bcn_cfg(adapter, _TRUE, ap_id); -+} -+void rtw_ap_mbid_bcn_dis(_adapter *adapter, u8 ap_id) -+{ -+ RTW_INFO(FUNC_ADPT_FMT"- ap_id(%d)\n", FUNC_ADPT_ARG(adapter), ap_id); -+ _rtw_mbid_bcn_cfg(adapter, _FALSE, ap_id); -+ -+ if (rtw_ap_get_nums(adapter) == 0) -+ rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _FALSE, 0); -+ #ifdef CONFIG_FW_TBTT_RPT -+ else if (rtw_ap_get_nums(adapter) >= 1) { -+ u8 tbtt_rpt_map = adapter_to_dvobj(adapter)->vap_tbtt_rpt_map; -+ -+ rtw_hal_set_fw_ap_bcn_offload_cmd(adapter, _TRUE, -+ tbtt_rpt_map & ~BIT(ap_id));/*H2C-0xBA*/ -+ } -+ #endif -+} -+#endif -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+void rtw_ap_multi_bcn_cfg(_adapter *adapter) -+{ -+ #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) -+ rtw_write8(adapter, REG_BCN_CTRL, DIS_TSF_UDT); -+ #else -+ rtw_write8(adapter, REG_BCN_CTRL, DIS_TSF_UDT | DIS_BCNQ_SUB); -+ #endif -+ /*enable to rx data frame*/ -+ rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); -+ -+ /*Beacon Control related register for first time*/ -+ rtw_write8(adapter, REG_BCNDMATIM, 0x02); /* 2ms */ -+ -+ /*rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);*/ -+ rtw_write8(adapter, REG_ATIMWND, 0x0c); /* 12ms */ -+ -+ #ifndef CONFIG_HW_P0_TSF_SYNC -+ rtw_write16(adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ -+ #endif -+ -+ /*reset TSF*/ -+ rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(0)); -+ -+ /*enable BCN0 Function for if1*/ -+ /*don't enable update TSF0 for if1 (due to TSF update when beacon,probe rsp are received)*/ -+ #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) -+ rtw_write8(adapter, REG_BCN_CTRL, BIT_DIS_RX_BSSID_FIT | BIT_P0_EN_TXBCN_RPT | BIT_DIS_TSF_UDT |BIT_EN_BCN_FUNCTION); -+ #else -+ rtw_write8(adapter, REG_BCN_CTRL, (DIS_TSF_UDT | EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB)); -+ #endif -+ #ifdef CONFIG_BCN_XMIT_PROTECT -+ rtw_write8(adapter, REG_CCK_CHECK, rtw_read8(adapter, REG_CCK_CHECK) | BIT_EN_BCN_PKT_REL); -+ #endif -+ -+ if (IS_HARDWARE_TYPE_8821(adapter) || IS_HARDWARE_TYPE_8192E(adapter))/* select BCN on port 0 for DualBeacon*/ -+ rtw_write8(adapter, REG_CCK_CHECK, rtw_read8(adapter, REG_CCK_CHECK) & (~BIT_BCN_PORT_SEL)); -+ -+ /* Enable HW seq for BCN -+ * 0x4FC[0]: EN_HWSEQ / 0x4FC[1]: EN_HWSEQEXT */ -+ #ifdef CONFIG_RTL8822B -+ if (IS_HARDWARE_TYPE_8822B(adapter)) -+ rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822B, 0x01); -+ #endif -+ -+ #ifdef CONFIG_RTL8822C -+ if (IS_HARDWARE_TYPE_8822C(adapter)) -+ rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822C, 0x01); -+ #endif -+} -+#endif -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr) -+{ -+ -+#if 0 /*TODO - modify for more flexible*/ -+ u8 idx = 0; -+ -+ if ((check_fwstate(&adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) && -+ (DEV_STA_NUM(adapter_to_dvobj(adapter)) == 1)) { -+ for (idx = 0; idx < 6; idx++) -+ rtw_write8(GET_PRIMARY_ADAPTER(adapter), (REG_MACID + idx), val[idx]); -+ } else { -+ /*MBID entry_id = 0~7 ,0 for root AP, 1~7 for VAP*/ -+ u8 entry_id; -+ -+ if ((check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _TRUE) && -+ (DEV_AP_NUM(adapter_to_dvobj(adapter)) == 1)) { -+ entry_id = 0; -+ if (rtw_mbid_cam_assign(adapter, val, entry_id)) { -+ RTW_INFO(FUNC_ADPT_FMT" Root AP assigned success\n", FUNC_ADPT_ARG(adapter)); -+ write_mbssid_cam(adapter, entry_id, val); -+ } -+ } else { -+ entry_id = rtw_mbid_camid_alloc(adapter, val); -+ if (entry_id != INVALID_CAM_ID) -+ write_mbssid_cam(adapter, entry_id, val); -+ } -+ } -+#else -+ { -+ /* -+ MBID entry_id = 0~7 ,for IFACE_ID0 ~ IFACE_IDx -+ */ -+ u8 entry_id = rtw_mbid_camid_alloc(adapter, mac_addr); -+ -+ -+ if (entry_id != INVALID_CAM_ID) { -+ write_mbssid_cam(adapter, entry_id, mac_addr); -+ RTW_INFO("%s "ADPT_FMT"- mbid(%d) mac_addr ="MAC_FMT"\n", __func__, -+ ADPT_ARG(adapter), entry_id, MAC_ARG(mac_addr)); -+ } -+ } -+#endif -+} -+ -+void rtw_hal_change_macaddr_mbid(_adapter *adapter, u8 *mac_addr) -+{ -+ u8 idx = 0; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 entry_id; -+ -+ if (!mac_addr) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ -+ entry_id = rtw_mbid_cam_info_change(adapter, mac_addr); -+ -+ if (entry_id != INVALID_CAM_ID) -+ write_mbssid_cam(adapter, entry_id, mac_addr); -+} -+ -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+u16 rtw_hal_bcn_interval_adjust(_adapter *adapter, u16 bcn_interval) -+{ -+ if (adapter_to_dvobj(adapter)->inter_bcn_space != bcn_interval) -+ return adapter_to_dvobj(adapter)->inter_bcn_space; -+ else -+ return bcn_interval; -+} -+#endif/*CONFIG_SWTIMER_BASED_TXBCN*/ -+ -+#else -+ -+#ifndef RTW_HALMAC -+static u32 _get_macaddr_reg(enum _hw_port hwport) -+{ -+ u32 reg_macaddr = REG_MACID; -+ -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (hwport == HW_PORT1) -+ reg_macaddr = REG_MACID1; -+ #if defined(CONFIG_RTL8814A) -+ else if (hwport == HW_PORT2) -+ reg_macaddr = REG_MACID2; -+ else if (hwport == HW_PORT3) -+ reg_macaddr = REG_MACID3; -+ else if (hwport == HW_PORT4) -+ reg_macaddr = REG_MACID4; -+ #endif /*CONFIG_RTL8814A*/ -+ #endif /*CONFIG_CONCURRENT_MODE*/ -+ -+ return reg_macaddr; -+} -+#endif /*!RTW_HALMAC*/ -+ -+static void rtw_hal_set_macaddr_port(_adapter *adapter, u8 *mac_addr) -+{ -+ enum _hw_port hwport; -+ -+ if (mac_addr == NULL) -+ return; -+ hwport = get_hw_port(adapter); -+ -+ RTW_INFO("%s "ADPT_FMT"- hw port(%d) mac_addr ="MAC_FMT"\n", __func__, -+ ADPT_ARG(adapter), hwport, MAC_ARG(mac_addr)); -+ -+#ifdef RTW_HALMAC /*8822B ~ 8814B*/ -+ rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), hwport, mac_addr); -+#else /* !RTW_HALMAC */ -+ { -+ u8 idx = 0; -+ u32 reg_macaddr = _get_macaddr_reg(hwport); -+ -+ for (idx = 0; idx < ETH_ALEN; idx++) -+ rtw_write8(GET_PRIMARY_ADAPTER(adapter), (reg_macaddr + idx), mac_addr[idx]); -+ } -+#endif /* !RTW_HALMAC */ -+} -+ -+static void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr) -+{ -+ enum _hw_port hwport; -+ -+ if (mac_addr == NULL) -+ return; -+ hwport = get_hw_port(adapter); -+ -+ _rtw_memset(mac_addr, 0, ETH_ALEN); -+#ifdef RTW_HALMAC /*8822B ~ 8814B*/ -+ rtw_halmac_get_mac_address(adapter_to_dvobj(adapter), hwport, mac_addr); -+#else /* !RTW_HALMAC */ -+ { -+ u8 idx = 0; -+ u32 reg_macaddr = _get_macaddr_reg(hwport); -+ -+ for (idx = 0; idx < ETH_ALEN; idx++) -+ mac_addr[idx] = rtw_read8(GET_PRIMARY_ADAPTER(adapter), (reg_macaddr + idx)); -+ } -+#endif /* !RTW_HALMAC */ -+ -+ RTW_DBG("%s "ADPT_FMT"- hw port(%d) mac_addr ="MAC_FMT"\n", __func__, -+ ADPT_ARG(adapter), hwport, MAC_ARG(mac_addr)); -+} -+#endif/*#ifdef CONFIG_MI_WITH_MBSSID_CAM*/ -+ -+#ifndef RTW_HALMAC -+static u32 _get_bssid_reg(enum _hw_port hw_port) -+{ -+ u32 reg_bssid = REG_BSSID; -+ -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (hw_port == HW_PORT1) -+ reg_bssid = REG_BSSID1; -+ #if defined(CONFIG_RTL8814A) -+ else if (hw_port == HW_PORT2) -+ reg_bssid = REG_BSSID2; -+ else if (hw_port == HW_PORT3) -+ reg_bssid = REG_BSSID3; -+ else if (hw_port == HW_PORT4) -+ reg_bssid = REG_BSSID4; -+ #endif /*CONFIG_RTL8814A*/ -+ #endif /*CONFIG_CONCURRENT_MODE*/ -+ -+ return reg_bssid; -+} -+#endif /*!RTW_HALMAC*/ -+static void rtw_hal_set_bssid(_adapter *adapter, u8 *val) -+{ -+ enum _hw_port hw_port = rtw_hal_get_port(adapter); -+#ifdef RTW_HALMAC -+ -+ rtw_halmac_set_bssid(adapter_to_dvobj(adapter), hw_port, val); -+#else /* !RTW_HALMAC */ -+ u8 idx = 0; -+ u32 reg_bssid = _get_bssid_reg(hw_port); -+ -+ for (idx = 0 ; idx < ETH_ALEN; idx++) -+ rtw_write8(adapter, (reg_bssid + idx), val[idx]); -+#endif /* !RTW_HALMAC */ -+ -+ RTW_INFO("%s "ADPT_FMT"- hw port -%d BSSID: "MAC_FMT"\n", -+ __func__, ADPT_ARG(adapter), hw_port, MAC_ARG(val)); -+} -+ -+#ifndef CONFIG_MI_WITH_MBSSID_CAM -+static void rtw_hal_set_tsf_update(_adapter *adapter, u8 en) -+{ -+ u32 addr = 0; -+ u8 val8; -+ -+ rtw_hal_get_hwreg(adapter, HW_VAR_BCN_CTRL_ADDR, (u8 *)&addr); -+ if (addr) { -+ rtw_enter_protsel_port(adapter, get_hw_port(adapter)); -+ val8 = rtw_read8(adapter, addr); -+ if (en && (val8 & DIS_TSF_UDT)) { -+ rtw_write8(adapter, addr, val8 & ~DIS_TSF_UDT); -+ #ifdef DBG_TSF_UPDATE -+ RTW_INFO("port%u("ADPT_FMT") enable TSF update\n", adapter->hw_port, ADPT_ARG(adapter)); -+ #endif -+ } -+ if (!en && !(val8 & DIS_TSF_UDT)) { -+ rtw_write8(adapter, addr, val8 | DIS_TSF_UDT); -+ #ifdef DBG_TSF_UPDATE -+ RTW_INFO("port%u("ADPT_FMT") disable TSF update\n", adapter->hw_port, ADPT_ARG(adapter)); -+ #endif -+ } -+ rtw_leave_protsel_port(adapter); -+ } else { -+ RTW_WARN("unknown port%d("ADPT_FMT") %s TSF update\n" -+ , adapter->hw_port, ADPT_ARG(adapter), en ? "enable" : "disable"); -+ rtw_warn_on(1); -+ } -+} -+#endif /*CONFIG_MI_WITH_MBSSID_CAM*/ -+static void rtw_hal_set_hw_update_tsf(PADAPTER padapter) -+{ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ -+#else -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ if (!pmlmeext->en_hw_update_tsf) -+ return; -+ -+ /* check RCR */ -+ if (!rtw_hal_rcr_check(padapter, RCR_CBSSID_BCN)) -+ return; -+ -+ if (pmlmeext->tsf_update_required) { -+ pmlmeext->tsf_update_pause_stime = 0; -+ rtw_hal_set_tsf_update(padapter, 1); -+ } -+ -+ pmlmeext->en_hw_update_tsf = 0; -+#endif -+} -+ -+void rtw_iface_enable_tsf_update(_adapter *adapter) -+{ -+ adapter->mlmeextpriv.tsf_update_pause_stime = 0; -+ adapter->mlmeextpriv.tsf_update_required = 1; -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ -+#else -+ rtw_hal_set_tsf_update(adapter, 1); -+#endif -+} -+ -+void rtw_iface_disable_tsf_update(_adapter *adapter) -+{ -+ adapter->mlmeextpriv.tsf_update_required = 0; -+ adapter->mlmeextpriv.tsf_update_pause_stime = 0; -+ adapter->mlmeextpriv.en_hw_update_tsf = 0; -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ -+#else -+ rtw_hal_set_tsf_update(adapter, 0); -+#endif -+} -+ -+static void rtw_hal_tsf_update_pause(_adapter *adapter) -+{ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ -+#else -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ rtw_hal_set_tsf_update(iface, 0); -+ if (iface->mlmeextpriv.tsf_update_required) { -+ iface->mlmeextpriv.tsf_update_pause_stime = rtw_get_current_time(); -+ if (!iface->mlmeextpriv.tsf_update_pause_stime) -+ iface->mlmeextpriv.tsf_update_pause_stime++; -+ } -+ iface->mlmeextpriv.en_hw_update_tsf = 0; -+ } -+#endif -+} -+ -+static void rtw_hal_tsf_update_restore(_adapter *adapter) -+{ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ -+#else -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ if (iface->mlmeextpriv.tsf_update_required) { -+ /* enable HW TSF update when recive beacon*/ -+ iface->mlmeextpriv.en_hw_update_tsf = 1; -+ #ifdef DBG_TSF_UPDATE -+ RTW_INFO("port%d("ADPT_FMT") enabling TSF update...\n" -+ , iface->hw_port, ADPT_ARG(iface)); -+ #endif -+ } -+ } -+#endif -+} -+ -+void rtw_hal_periodic_tsf_update_chk(_adapter *adapter) -+{ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ -+#else -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface; -+ struct mlme_ext_priv *mlmeext; -+ int i; -+ u32 restore_ms = 0; -+ -+ if (dvobj->periodic_tsf_update_etime) { -+ if (rtw_time_after(rtw_get_current_time(), dvobj->periodic_tsf_update_etime)) { -+ /* end for restore status */ -+ dvobj->periodic_tsf_update_etime = 0; -+ rtw_hal_rcr_set_chk_bssid(adapter, MLME_ACTION_NONE); -+ } -+ return; -+ } -+ -+ if (dvobj->rf_ctl.offch_state != OFFCHS_NONE) -+ return; -+ -+ /* -+ * all required ifaces can switch to restore status together -+ * loop all pause iface to get largest restore time required -+ */ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ mlmeext = &iface->mlmeextpriv; -+ -+ if (mlmeext->tsf_update_required -+ && mlmeext->tsf_update_pause_stime -+ && rtw_get_passing_time_ms(mlmeext->tsf_update_pause_stime) -+ > mlmeext->mlmext_info.bcn_interval * mlmeext->tsf_update_pause_factor -+ ) { -+ if (restore_ms < mlmeext->mlmext_info.bcn_interval * mlmeext->tsf_update_restore_factor) -+ restore_ms = mlmeext->mlmext_info.bcn_interval * mlmeext->tsf_update_restore_factor; -+ } -+ } -+ -+ if (!restore_ms) -+ return; -+ -+ dvobj->periodic_tsf_update_etime = rtw_get_current_time() + rtw_ms_to_systime(restore_ms); -+ if (!dvobj->periodic_tsf_update_etime) -+ dvobj->periodic_tsf_update_etime++; -+ -+ rtw_hal_rcr_set_chk_bssid(adapter, MLME_ACTION_NONE); -+ -+ /* set timer to end restore status */ -+ _set_timer(&dvobj->periodic_tsf_update_end_timer, restore_ms); -+#endif -+} -+ -+void rtw_hal_periodic_tsf_update_end_timer_hdl(void *ctx) -+{ -+ struct dvobj_priv *dvobj = (struct dvobj_priv *)ctx; -+ -+ if (dev_is_surprise_removed(dvobj) || dev_is_drv_stopped(dvobj)) -+ return; -+ -+ rtw_periodic_tsf_update_end_cmd(dvobj_get_primary_adapter(dvobj)); -+} -+ -+static inline u8 hw_var_rcr_config(_adapter *adapter, u32 rcr) -+{ -+ int err; -+ -+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL -+ rcr = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_APWRMGT | RCR_ADF | RCR_AMF | RCR_APP_PHYST_RXFF | RCR_APP_MIC | RCR_APP_ICV; -+#endif -+ err = rtw_write32(adapter, REG_RCR, rcr); -+ if (err == _SUCCESS) -+ GET_HAL_DATA(adapter)->ReceiveConfig = rcr; -+ return err; -+} -+ -+static inline u8 hw_var_rcr_get(_adapter *adapter, u32 *rcr) -+{ -+ u32 v32; -+ -+ v32 = rtw_read32(adapter, REG_RCR); -+ if (rcr) -+ *rcr = v32; -+ GET_HAL_DATA(adapter)->ReceiveConfig = v32; -+ return _SUCCESS; -+} -+ -+/* only check SW RCR variable */ -+inline u8 rtw_hal_rcr_check(_adapter *adapter, u32 check_bit) -+{ -+ PHAL_DATA_TYPE hal; -+ u32 rcr; -+ -+ hal = GET_HAL_DATA(adapter); -+ -+ rcr = hal->ReceiveConfig; -+ if ((rcr & check_bit) == check_bit) -+ return 1; -+ -+ return 0; -+} -+ -+inline u8 rtw_hal_rcr_add(_adapter *adapter, u32 add) -+{ -+ PHAL_DATA_TYPE hal; -+ u32 rcr; -+ u8 ret = _SUCCESS; -+ -+ hal = GET_HAL_DATA(adapter); -+ -+ rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr); -+ rcr |= add; -+ if (rcr != hal->ReceiveConfig) -+ ret = rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr); -+ -+ return ret; -+} -+ -+inline u8 rtw_hal_rcr_clear(_adapter *adapter, u32 clear) -+{ -+ PHAL_DATA_TYPE hal; -+ u32 rcr; -+ u8 ret = _SUCCESS; -+ -+ hal = GET_HAL_DATA(adapter); -+ -+ rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr); -+ rcr &= ~clear; -+ if (rcr != hal->ReceiveConfig) -+ ret = rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr); -+ -+ return ret; -+} -+ -+void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u32 rcr, rcr_new; -+ struct mi_state mstate, mstate_s; -+ -+ rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr); -+ rcr_new = rcr; -+ -+#if defined(CONFIG_MI_WITH_MBSSID_CAM) && !defined(CONFIG_CLIENT_PORT_CFG) -+ rcr_new &= ~(RCR_CBSSID_BCN | RCR_CBSSID_DATA); -+#else -+ rtw_mi_status_no_self(adapter, &mstate); -+ rtw_mi_status_no_others(adapter, &mstate_s); -+ -+ /* only adjust parameters interested */ -+ switch (self_action) { -+ case MLME_SCAN_ENTER: -+ mstate_s.scan_num = 1; -+ mstate_s.scan_enter_num = 1; -+ break; -+ case MLME_SCAN_DONE: -+ mstate_s.scan_enter_num = 0; -+ break; -+ case MLME_STA_CONNECTING: -+ mstate_s.lg_sta_num = 1; -+ mstate_s.ld_sta_num = 0; -+ break; -+ case MLME_STA_CONNECTED: -+ mstate_s.lg_sta_num = 0; -+ mstate_s.ld_sta_num = 1; -+ break; -+ case MLME_STA_DISCONNECTED: -+ mstate_s.lg_sta_num = 0; -+ mstate_s.ld_sta_num = 0; -+ break; -+#ifdef CONFIG_TDLS -+ case MLME_TDLS_LINKED: -+ mstate_s.ld_tdls_num = 1; -+ break; -+ case MLME_TDLS_NOLINK: -+ mstate_s.ld_tdls_num = 0; -+ break; -+#endif -+#ifdef CONFIG_AP_MODE -+ case MLME_AP_STARTED: -+ mstate_s.ap_num = 1; -+ break; -+ case MLME_AP_STOPPED: -+ mstate_s.ap_num = 0; -+ mstate_s.ld_ap_num = 0; -+ break; -+#endif -+#ifdef CONFIG_RTW_MESH -+ case MLME_MESH_STARTED: -+ mstate_s.mesh_num = 1; -+ break; -+ case MLME_MESH_STOPPED: -+ mstate_s.mesh_num = 0; -+ mstate_s.ld_mesh_num = 0; -+ break; -+#endif -+ case MLME_ACTION_NONE: -+ case MLME_ADHOC_STARTED: -+ /* caller without effect of decision */ -+ break; -+ default: -+ rtw_warn_on(1); -+ }; -+ -+ rtw_mi_status_merge(&mstate, &mstate_s); -+ -+ if (MSTATE_AP_NUM(&mstate) || MSTATE_MESH_NUM(&mstate) || MSTATE_TDLS_LD_NUM(&mstate) -+ #ifdef CONFIG_FIND_BEST_CHANNEL -+ || MSTATE_SCAN_ENTER_NUM(&mstate) -+ #endif -+ || hal_data->in_cta_test -+ ) -+ rcr_new &= ~RCR_CBSSID_DATA; -+ else -+ rcr_new |= RCR_CBSSID_DATA; -+ -+ if (MSTATE_SCAN_ENTER_NUM(&mstate) || hal_data->in_cta_test) -+ rcr_new &= ~RCR_CBSSID_BCN; -+ else if (MSTATE_STA_LG_NUM(&mstate) -+ || adapter_to_dvobj(adapter)->periodic_tsf_update_etime -+ ) -+ rcr_new |= RCR_CBSSID_BCN; -+ else if ((MSTATE_AP_NUM(&mstate) && adapter->registrypriv.wifi_spec) /* for 11n Logo 4.2.31/4.2.32 */ -+ || MSTATE_MESH_NUM(&mstate) -+ ) -+ rcr_new &= ~RCR_CBSSID_BCN; -+ else -+ rcr_new |= RCR_CBSSID_BCN; -+ -+ #ifdef CONFIG_CLIENT_PORT_CFG -+ if (get_clt_num(adapter) > MAX_CLIENT_PORT_NUM) -+ rcr_new &= ~RCR_CBSSID_BCN; -+ #endif -+#endif /* CONFIG_MI_WITH_MBSSID_CAM */ -+ -+#ifdef CONFIG_RTW_MULTI_AP -+ if (MSTATE_AP_NUM(&mstate) -+ && rtw_unassoc_sta_src_chk(adapter, UNASOC_STA_SRC_RX_NMY_UC) -+ ) { -+ rcr_new |= RCR_AAP; -+ } else -+ rcr_new &= ~RCR_AAP; -+#endif -+ -+ if (rcr == rcr_new) -+ return; -+ -+ if (!hal_spec->rx_tsf_filter -+ && (rcr & RCR_CBSSID_BCN) && !(rcr_new & RCR_CBSSID_BCN)) -+ rtw_hal_tsf_update_pause(adapter); -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr_new); -+ -+ if (!hal_spec->rx_tsf_filter -+ && !(rcr & RCR_CBSSID_BCN) && (rcr_new & RCR_CBSSID_BCN) -+ && self_action != MLME_STA_CONNECTING) -+ rtw_hal_tsf_update_restore(adapter); -+} -+ -+void rtw_hal_rcr_set_chk_bssid_act_non(_adapter *adapter) -+{ -+ rtw_hal_rcr_set_chk_bssid(adapter, MLME_ACTION_NONE); -+} -+ -+static void hw_var_set_rcr_am(_adapter *adapter, u8 enable) -+{ -+ u32 rcr = RCR_AM; -+ -+ if (enable) -+ rtw_hal_rcr_add(adapter, rcr); -+ else -+ rtw_hal_rcr_clear(adapter, rcr); -+} -+ -+static void hw_var_set_bcn_interval(_adapter *adapter, u16 interval) -+{ -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+ interval = rtw_hal_bcn_interval_adjust(adapter, interval); -+#endif -+ -+#ifdef RTW_HALMAC -+ rtw_halmac_set_bcn_interval(adapter_to_dvobj(adapter), adapter->hw_port, interval); -+#else -+ rtw_write16(adapter, REG_MBSSID_BCN_SPACE, interval); -+#endif -+ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT -+ { -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { -+ RTW_INFO("%s==> bcn_interval:%d, eraly_int:%d\n", __func__, interval, interval >> 1); -+ rtw_write8(adapter, REG_DRVERLYINT, interval >> 1); -+ } -+ } -+#endif -+} -+ -+#if CONFIG_TX_AC_LIFETIME -+const char *const _tx_aclt_conf_str[] = { -+ "DEFAULT", -+ "AP_M2U", -+ "MESH", -+ "INVALID", -+}; -+ -+void dump_tx_aclt_force_val(void *sel, struct dvobj_priv *dvobj) -+{ -+#define TX_ACLT_FORCE_MSG_LEN 64 -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(dvobj)); -+ struct tx_aclt_conf_t *conf = &dvobj->tx_aclt_force_val; -+ char buf[TX_ACLT_FORCE_MSG_LEN]; -+ int cnt = 0; -+ -+ RTW_PRINT_SEL(sel, "unit:%uus, maximum:%uus\n" -+ , hal_spec->tx_aclt_unit_factor * 32 -+ , 0xFFFF * hal_spec->tx_aclt_unit_factor * 32); -+ -+ RTW_PRINT_SEL(sel, "%-5s %-12s %-12s\n", "en", "vo_vi(us)", "be_bk(us)"); -+ RTW_PRINT_SEL(sel, " 0x%02x %12u %12u\n" -+ , conf->en -+ , conf->vo_vi * hal_spec->tx_aclt_unit_factor * 32 -+ , conf->be_bk * hal_spec->tx_aclt_unit_factor * 32 -+ ); -+ -+ cnt += snprintf(buf + cnt, TX_ACLT_FORCE_MSG_LEN - cnt - 1, "%5s", conf->en == 0xFF ? "AUTO" : "FORCE"); -+ if (cnt >= TX_ACLT_FORCE_MSG_LEN - 1) -+ goto exit; -+ -+ if (conf->vo_vi) -+ cnt += snprintf(buf + cnt, TX_ACLT_FORCE_MSG_LEN - cnt - 1, " FORCE:0x%04x", conf->vo_vi); -+ else -+ cnt += snprintf(buf + cnt, TX_ACLT_FORCE_MSG_LEN - cnt - 1, " AUTO"); -+ if (cnt >= TX_ACLT_FORCE_MSG_LEN - 1) -+ goto exit; -+ -+ -+ if (conf->be_bk) -+ cnt += snprintf(buf + cnt, TX_ACLT_FORCE_MSG_LEN - cnt - 1, " FORCE:0x%04x", conf->be_bk); -+ else -+ cnt += snprintf(buf + cnt, TX_ACLT_FORCE_MSG_LEN - cnt - 1, " AUTO"); -+ if (cnt >= TX_ACLT_FORCE_MSG_LEN - 1) -+ goto exit; -+ -+ RTW_PRINT_SEL(sel, "%s\n", buf); -+ -+exit: -+ return; -+} -+ -+void rtw_hal_set_tx_aclt_force_val(_adapter *adapter, struct tx_aclt_conf_t *input, u8 arg_num) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct tx_aclt_conf_t *conf = &dvobj->tx_aclt_force_val; -+ -+ if (arg_num >= 1) { -+ if (input->en == 0xFF) -+ conf->en = input->en; -+ else -+ conf->en = input->en & 0xF; -+ } -+ if (arg_num >= 2) { -+ conf->vo_vi = input->vo_vi / (hal_spec->tx_aclt_unit_factor * 32); -+ if (conf->vo_vi > 0xFFFF) -+ conf->vo_vi = 0xFFFF; -+ } -+ if (arg_num >= 3) { -+ conf->be_bk = input->be_bk / (hal_spec->tx_aclt_unit_factor * 32); -+ if (conf->be_bk > 0xFFFF) -+ conf->be_bk = 0xFFFF; -+ } -+} -+ -+void dump_tx_aclt_confs(void *sel, struct dvobj_priv *dvobj) -+{ -+#define TX_ACLT_CONF_MSG_LEN 32 -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(dvobj)); -+ struct tx_aclt_conf_t *conf; -+ char buf[TX_ACLT_CONF_MSG_LEN]; -+ int cnt; -+ int i; -+ -+ RTW_PRINT_SEL(sel, "unit:%uus, maximum:%uus\n" -+ , hal_spec->tx_aclt_unit_factor * 32 -+ , 0xFFFF * hal_spec->tx_aclt_unit_factor * 32); -+ -+ RTW_PRINT_SEL(sel, "%-7s %-1s %-3s %-9s %-9s %-10s %-10s\n" -+ , "name", "#", "en", "vo_vi(us)", "be_bk(us)", "vo_vi(reg)", "be_bk(reg)"); -+ -+ for (i = 0; i < TX_ACLT_CONF_NUM; i++) { -+ conf = &dvobj->tx_aclt_confs[i]; -+ cnt = 0; -+ -+ if (conf->vo_vi) -+ cnt += snprintf(buf + cnt, TX_ACLT_CONF_MSG_LEN - cnt - 1, " 0x%04x", conf->vo_vi); -+ else -+ cnt += snprintf(buf + cnt, TX_ACLT_CONF_MSG_LEN - cnt - 1, " N/A"); -+ if (cnt >= TX_ACLT_CONF_MSG_LEN - 1) -+ continue; -+ -+ if (conf->be_bk) -+ cnt += snprintf(buf + cnt, TX_ACLT_CONF_MSG_LEN - cnt - 1, " 0x%04x", conf->be_bk); -+ else -+ cnt += snprintf(buf + cnt, TX_ACLT_CONF_MSG_LEN - cnt - 1, " N/A"); -+ if (cnt >= TX_ACLT_CONF_MSG_LEN - 1) -+ continue; -+ -+ RTW_PRINT_SEL(sel, "%7s %1u 0x%x %9u %9u%s\n" -+ , tx_aclt_conf_str(i), i -+ , conf->en -+ , conf->vo_vi * hal_spec->tx_aclt_unit_factor * 32 -+ , conf->be_bk * hal_spec->tx_aclt_unit_factor * 32 -+ , buf -+ ); -+ } -+} -+ -+void rtw_hal_set_tx_aclt_conf(_adapter *adapter, u8 conf_idx, struct tx_aclt_conf_t *input, u8 arg_num) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct tx_aclt_conf_t *conf; -+ -+ if (conf_idx >= TX_ACLT_CONF_NUM) -+ return; -+ -+ conf = &dvobj->tx_aclt_confs[conf_idx]; -+ -+ if (arg_num >= 1) { -+ if (input->en != 0xFF) -+ conf->en = input->en & 0xF; -+ } -+ if (arg_num >= 2) { -+ conf->vo_vi = input->vo_vi / (hal_spec->tx_aclt_unit_factor * 32); -+ if (conf->vo_vi > 0xFFFF) -+ conf->vo_vi = 0xFFFF; -+ } -+ if (arg_num >= 3) { -+ conf->be_bk = input->be_bk / (hal_spec->tx_aclt_unit_factor * 32); -+ if (conf->be_bk > 0xFFFF) -+ conf->be_bk = 0xFFFF; -+ } -+} -+ -+void rtw_hal_update_tx_aclt(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); -+ u8 lt_en = 0, lt_en_ori; -+ u16 lt_vo_vi = 0xFFFF, lt_be_bk = 0xFFFF; -+ u32 lt, lt_ori; -+ struct tx_aclt_conf_t *conf; -+ int i; -+#ifdef CONFIG_AP_MODE -+#if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ _adapter *iface; -+ u8 ap_m2u_num = 0; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ if (MLME_IS_AP(iface) -+ && ((iface->b2u_flags_ap_src & RTW_AP_B2U_IP_MCAST) -+ || (iface->b2u_flags_ap_fwd & RTW_AP_B2U_IP_MCAST)) -+ ) -+ ap_m2u_num++; -+ } -+#endif -+#endif /* CONFIG_AP_MODE */ -+ -+ lt_en_ori = rtw_read8(adapter, REG_LIFETIME_EN); -+ lt_ori = rtw_read32(adapter, REG_PKT_LIFE_TIME); -+ -+ for (i = 0; i < TX_ACLT_CONF_NUM; i++) { -+ if (!(dvobj->tx_aclt_flags & BIT(i))) -+ continue; -+ -+ conf = &dvobj->tx_aclt_confs[i]; -+ -+ if (i == TX_ACLT_CONF_DEFAULT) { -+ /* first and default status, assign directly */ -+ lt_en = conf->en; -+ if (conf->vo_vi) -+ lt_vo_vi = conf->vo_vi; -+ if (conf->be_bk) -+ lt_be_bk = conf->be_bk; -+ } -+ #ifdef CONFIG_AP_MODE -+ #if CONFIG_RTW_AP_DATA_BMC_TO_UC || defined(CONFIG_RTW_MESH) -+ else if (0 -+ #if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ || (i == TX_ACLT_CONF_AP_M2U -+ && ap_m2u_num -+ && macid_ctl->op_num[H2C_MSR_ROLE_STA] /* having AP mode with STA connected */) -+ #endif -+ #ifdef CONFIG_RTW_MESH -+ || (i == TX_ACLT_CONF_MESH -+ && macid_ctl->op_num[H2C_MSR_ROLE_MESH] > 1 /* implies only 1 MESH mode supported */) -+ #endif -+ ) { -+ /* long term status, OR en and MIN lifetime */ -+ lt_en |= conf->en; -+ if (conf->vo_vi && lt_vo_vi > conf->vo_vi) -+ lt_vo_vi = conf->vo_vi; -+ if (conf->be_bk && lt_be_bk > conf->be_bk) -+ lt_be_bk = conf->be_bk; -+ } -+ #endif -+ #endif /* CONFIG_AP_MODE */ -+ } -+ -+ if (dvobj->tx_aclt_force_val.en != 0xFF) -+ lt_en = dvobj->tx_aclt_force_val.en; -+ if (dvobj->tx_aclt_force_val.vo_vi) -+ lt_vo_vi = dvobj->tx_aclt_force_val.vo_vi; -+ if (dvobj->tx_aclt_force_val.be_bk) -+ lt_be_bk = dvobj->tx_aclt_force_val.be_bk; -+ -+ lt_en = (lt_en_ori & 0xF0) | (lt_en & 0x0F); -+ lt = (lt_be_bk << 16) | lt_vo_vi; -+ -+ if (0) -+ RTW_INFO("lt_en:0x%x(0x%x), lt:0x%08x(0x%08x)\n", lt_en, lt_en_ori, lt, lt_ori); -+ -+ if (lt_en != lt_en_ori) -+ rtw_write8(adapter, REG_LIFETIME_EN, lt_en); -+ if (lt != lt_ori) -+ rtw_write32(adapter, REG_PKT_LIFE_TIME, lt); -+} -+#endif /* CONFIG_TX_AC_LIFETIME */ -+ -+void hw_var_port_switch(_adapter *adapter) -+{ -+#ifdef CONFIG_CONCURRENT_MODE -+#ifdef CONFIG_RUNTIME_PORT_SWITCH -+ /* -+ 0x102: MSR -+ 0x550: REG_BCN_CTRL -+ 0x551: REG_BCN_CTRL_1 -+ 0x55A: REG_ATIMWND -+ 0x560: REG_TSFTR -+ 0x568: REG_TSFTR1 -+ 0x570: REG_ATIMWND_1 -+ 0x610: REG_MACID -+ 0x618: REG_BSSID -+ 0x700: REG_MACID1 -+ 0x708: REG_BSSID1 -+ */ -+ -+ int i; -+ u8 msr; -+ u8 bcn_ctrl; -+ u8 bcn_ctrl_1; -+ u8 atimwnd[2]; -+ u8 atimwnd_1[2]; -+ u8 tsftr[8]; -+ u8 tsftr_1[8]; -+ u8 macid[6]; -+ u8 bssid[6]; -+ u8 macid_1[6]; -+ u8 bssid_1[6]; -+#if defined(CONFIG_RTL8192F) -+ u16 wlan_act_mask_ctrl = 0; -+ u16 en_port_mask = EN_PORT_0_FUNCTION | EN_PORT_1_FUNCTION; -+#endif -+ -+ u8 hw_port; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface = NULL; -+ -+ msr = rtw_read8(adapter, MSR); -+ bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL); -+ bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1); -+#if defined(CONFIG_RTL8192F) -+ wlan_act_mask_ctrl = rtw_read16(adapter, REG_WLAN_ACT_MASK_CTRL_1); -+#endif -+ -+ for (i = 0; i < 2; i++) -+ atimwnd[i] = rtw_read8(adapter, REG_ATIMWND + i); -+ for (i = 0; i < 2; i++) -+ atimwnd_1[i] = rtw_read8(adapter, REG_ATIMWND_1 + i); -+ -+ for (i = 0; i < 8; i++) -+ tsftr[i] = rtw_read8(adapter, REG_TSFTR + i); -+ for (i = 0; i < 8; i++) -+ tsftr_1[i] = rtw_read8(adapter, REG_TSFTR1 + i); -+ -+ for (i = 0; i < 6; i++) -+ macid[i] = rtw_read8(adapter, REG_MACID + i); -+ -+ for (i = 0; i < 6; i++) -+ bssid[i] = rtw_read8(adapter, REG_BSSID + i); -+ -+ for (i = 0; i < 6; i++) -+ macid_1[i] = rtw_read8(adapter, REG_MACID1 + i); -+ -+ for (i = 0; i < 6; i++) -+ bssid_1[i] = rtw_read8(adapter, REG_BSSID1 + i); -+ -+#ifdef DBG_RUNTIME_PORT_SWITCH -+ RTW_INFO(FUNC_ADPT_FMT" before switch\n" -+ "msr:0x%02x\n" -+ "bcn_ctrl:0x%02x\n" -+ "bcn_ctrl_1:0x%02x\n" -+#if defined(CONFIG_RTL8192F) -+ "wlan_act_mask_ctrl:0x%02x\n" -+#endif -+ "atimwnd:0x%04x\n" -+ "atimwnd_1:0x%04x\n" -+ "tsftr:%llu\n" -+ "tsftr1:%llu\n" -+ "macid:"MAC_FMT"\n" -+ "bssid:"MAC_FMT"\n" -+ "macid_1:"MAC_FMT"\n" -+ "bssid_1:"MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter) -+ , msr -+ , bcn_ctrl -+ , bcn_ctrl_1 -+#if defined(CONFIG_RTL8192F) -+ , wlan_act_mask_ctrl -+#endif -+ , *((u16 *)atimwnd) -+ , *((u16 *)atimwnd_1) -+ , *((u64 *)tsftr) -+ , *((u64 *)tsftr_1) -+ , MAC_ARG(macid) -+ , MAC_ARG(bssid) -+ , MAC_ARG(macid_1) -+ , MAC_ARG(bssid_1) -+ ); -+#endif /* DBG_RUNTIME_PORT_SWITCH */ -+ -+ /* disable bcn function, disable update TSF */ -+ rtw_write8(adapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT); -+ rtw_write8(adapter, REG_BCN_CTRL_1, (bcn_ctrl_1 & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT); -+ -+#if defined(CONFIG_RTL8192F) -+ rtw_write16(adapter, REG_WLAN_ACT_MASK_CTRL_1, wlan_act_mask_ctrl & ~en_port_mask); -+#endif -+ -+ /* switch msr */ -+ msr = (msr & 0xf0) | ((msr & 0x03) << 2) | ((msr & 0x0c) >> 2); -+ rtw_write8(adapter, MSR, msr); -+ -+ /* write port0 */ -+ rtw_write8(adapter, REG_BCN_CTRL, bcn_ctrl_1 & ~EN_BCN_FUNCTION); -+ for (i = 0; i < 2; i++) -+ rtw_write8(adapter, REG_ATIMWND + i, atimwnd_1[i]); -+ for (i = 0; i < 8; i++) -+ rtw_write8(adapter, REG_TSFTR + i, tsftr_1[i]); -+ for (i = 0; i < 6; i++) -+ rtw_write8(adapter, REG_MACID + i, macid_1[i]); -+ for (i = 0; i < 6; i++) -+ rtw_write8(adapter, REG_BSSID + i, bssid_1[i]); -+ -+ /* write port1 */ -+ rtw_write8(adapter, REG_BCN_CTRL_1, bcn_ctrl & ~EN_BCN_FUNCTION); -+ for (i = 0; i < 2; i++) -+ rtw_write8(adapter, REG_ATIMWND_1 + i, atimwnd[i]); -+ for (i = 0; i < 8; i++) -+ rtw_write8(adapter, REG_TSFTR1 + i, tsftr[i]); -+ for (i = 0; i < 6; i++) -+ rtw_write8(adapter, REG_MACID1 + i, macid[i]); -+ for (i = 0; i < 6; i++) -+ rtw_write8(adapter, REG_BSSID1 + i, bssid[i]); -+ -+ /* write bcn ctl */ -+#ifdef CONFIG_BT_COEXIST -+ /* always enable port0 beacon function for PSTDMA */ -+ if (IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8703B(adapter) -+ || IS_HARDWARE_TYPE_8723D(adapter)) -+ bcn_ctrl_1 |= EN_BCN_FUNCTION; -+ /* always disable port1 beacon function for PSTDMA */ -+ if (IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8703B(adapter)) -+ bcn_ctrl &= ~EN_BCN_FUNCTION; -+#endif -+ rtw_write8(adapter, REG_BCN_CTRL, bcn_ctrl_1); -+ rtw_write8(adapter, REG_BCN_CTRL_1, bcn_ctrl); -+ -+#if defined(CONFIG_RTL8192F) -+ /* if the setting of port0 and port1 are the same, it does not need to switch port setting*/ -+ if(((wlan_act_mask_ctrl & en_port_mask) != 0) && ((wlan_act_mask_ctrl & en_port_mask) -+ != (EN_PORT_0_FUNCTION | EN_PORT_1_FUNCTION))) -+ wlan_act_mask_ctrl ^= en_port_mask; -+ rtw_write16(adapter, REG_WLAN_ACT_MASK_CTRL_1, wlan_act_mask_ctrl); -+#endif -+ -+ if (adapter->iface_id == IFACE_ID0) -+ iface = dvobj->padapters[IFACE_ID1]; -+ else if (adapter->iface_id == IFACE_ID1) -+ iface = dvobj->padapters[IFACE_ID0]; -+ -+ -+ if (adapter->hw_port == HW_PORT0) { -+ adapter->hw_port = HW_PORT1; -+ iface->hw_port = HW_PORT0; -+ RTW_PRINT("port switch - port0("ADPT_FMT"), port1("ADPT_FMT")\n", -+ ADPT_ARG(iface), ADPT_ARG(adapter)); -+ } else { -+ adapter->hw_port = HW_PORT0; -+ iface->hw_port = HW_PORT1; -+ RTW_PRINT("port switch - port0("ADPT_FMT"), port1("ADPT_FMT")\n", -+ ADPT_ARG(adapter), ADPT_ARG(iface)); -+ } -+ -+#ifdef DBG_RUNTIME_PORT_SWITCH -+ msr = rtw_read8(adapter, MSR); -+ bcn_ctrl = rtw_read8(adapter, REG_BCN_CTRL); -+ bcn_ctrl_1 = rtw_read8(adapter, REG_BCN_CTRL_1); -+#if defined(CONFIG_RTL8192F) -+ wlan_act_mask_ctrl = rtw_read16(adapter, REG_WLAN_ACT_MASK_CTRL_1); -+#endif -+ -+ for (i = 0; i < 2; i++) -+ atimwnd[i] = rtw_read8(adapter, REG_ATIMWND + i); -+ for (i = 0; i < 2; i++) -+ atimwnd_1[i] = rtw_read8(adapter, REG_ATIMWND_1 + i); -+ -+ for (i = 0; i < 8; i++) -+ tsftr[i] = rtw_read8(adapter, REG_TSFTR + i); -+ for (i = 0; i < 8; i++) -+ tsftr_1[i] = rtw_read8(adapter, REG_TSFTR1 + i); -+ -+ for (i = 0; i < 6; i++) -+ macid[i] = rtw_read8(adapter, REG_MACID + i); -+ -+ for (i = 0; i < 6; i++) -+ bssid[i] = rtw_read8(adapter, REG_BSSID + i); -+ -+ for (i = 0; i < 6; i++) -+ macid_1[i] = rtw_read8(adapter, REG_MACID1 + i); -+ -+ for (i = 0; i < 6; i++) -+ bssid_1[i] = rtw_read8(adapter, REG_BSSID1 + i); -+ -+ RTW_INFO(FUNC_ADPT_FMT" after switch\n" -+ "msr:0x%02x\n" -+ "bcn_ctrl:0x%02x\n" -+ "bcn_ctrl_1:0x%02x\n" -+#if defined(CONFIG_RTL8192F) -+ "wlan_act_mask_ctrl:0x%02x\n" -+#endif -+ "atimwnd:%u\n" -+ "atimwnd_1:%u\n" -+ "tsftr:%llu\n" -+ "tsftr1:%llu\n" -+ "macid:"MAC_FMT"\n" -+ "bssid:"MAC_FMT"\n" -+ "macid_1:"MAC_FMT"\n" -+ "bssid_1:"MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter) -+ , msr -+ , bcn_ctrl -+ , bcn_ctrl_1 -+#if defined(CONFIG_RTL8192F) -+ , wlan_act_mask_ctrl -+#endif -+ , *((u16 *)atimwnd) -+ , *((u16 *)atimwnd_1) -+ , *((u64 *)tsftr) -+ , *((u64 *)tsftr_1) -+ , MAC_ARG(macid) -+ , MAC_ARG(bssid) -+ , MAC_ARG(macid_1) -+ , MAC_ARG(bssid_1) -+ ); -+#endif /* DBG_RUNTIME_PORT_SWITCH */ -+ -+#endif /* CONFIG_RUNTIME_PORT_SWITCH */ -+#endif /* CONFIG_CONCURRENT_MODE */ -+} -+ -+const char *const _h2c_msr_role_str[] = { -+ "RSVD", -+ "STA", -+ "AP", -+ "GC", -+ "GO", -+ "TDLS", -+ "ADHOC", -+ "MESH", -+ "INVALID", -+}; -+ -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id) -+{ -+ s32 ret = _SUCCESS; -+ u8 parm[H2C_DEFAULT_PORT_ID_LEN] = {0}; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 port_id = rtw_hal_get_port(adapter); -+ -+ if ((dvobj->dft.port_id == port_id) && (dvobj->dft.mac_id == mac_id)) -+ return ret; -+ -+ SET_H2CCMD_DFTPID_PORT_ID(parm, port_id); -+ SET_H2CCMD_DFTPID_MAC_ID(parm, mac_id); -+ -+ RTW_DBG_DUMP("DFT port id parm:", parm, H2C_DEFAULT_PORT_ID_LEN); -+ RTW_INFO("%s ("ADPT_FMT") port_id :%d, mad_id:%d\n", -+ __func__, ADPT_ARG(adapter), port_id, mac_id); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, H2C_DEFAULT_PORT_ID, H2C_DEFAULT_PORT_ID_LEN, parm); -+ dvobj->dft.port_id = port_id; -+ dvobj->dft.mac_id = mac_id; -+ -+ return ret; -+} -+s32 rtw_set_default_port_id(_adapter *adapter) -+{ -+ s32 ret = _SUCCESS; -+ struct sta_info *psta; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ -+ if (is_client_associated_to_ap(adapter)) { -+ psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); -+ if (psta) -+ ret = rtw_hal_set_default_port_id_cmd(adapter, psta->cmn.mac_id); -+ } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { -+ -+ } else { -+ } -+ -+ return ret; -+} -+s32 rtw_set_ps_rsvd_page(_adapter *adapter) -+{ -+ s32 ret = _SUCCESS; -+ u16 media_status_rpt = RT_MEDIA_CONNECT; -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ -+ if (adapter->iface_id == pwrctl->fw_psmode_iface_id) -+ return ret; -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT, -+ (u8 *)&media_status_rpt); -+ -+ return ret; -+} -+ -+#if 0 -+_adapter * _rtw_search_dp_iface(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface; -+ _adapter *target_iface = NULL; -+ int i; -+ u8 sta_num = 0, tdls_num = 0, ap_num = 0, mesh_num = 0, adhoc_num = 0; -+ u8 p2p_go_num = 0, p2p_gc_num = 0; -+ _adapter *sta_ifs[8]; -+ _adapter *ap_ifs[8]; -+ _adapter *mesh_ifs[8]; -+ _adapter *gc_ifs[8]; -+ _adapter *go_ifs[8]; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ -+ if (check_fwstate(&iface->mlmepriv, WIFI_STATION_STATE) == _TRUE) { -+ if (check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ sta_ifs[sta_num++] = iface; -+ -+ #ifdef CONFIG_TDLS -+ if (iface->tdlsinfo.link_established == _TRUE) -+ tdls_num++; -+ #endif -+ #ifdef CONFIG_P2P -+ if (MLME_IS_GC(iface)) -+ gc_ifs[p2p_gc_num++] = iface; -+ #endif -+ } -+#ifdef CONFIG_AP_MODE -+ } else if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE ) { -+ if (check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ ap_ifs[ap_num++] = iface; -+ #ifdef CONFIG_P2P -+ if (MLME_IS_GO(iface)) -+ go_ifs[p2p_go_num++] = iface; -+ #endif -+ } -+#endif -+ } else if (check_fwstate(&iface->mlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE) == _TRUE -+ && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE -+ ) { -+ adhoc_num++; -+ -+#ifdef CONFIG_RTW_MESH -+ } else if (check_fwstate(&iface->mlmepriv, WIFI_MESH_STATE) == _TRUE -+ && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE -+ ) { -+ mesh_ifs[mesh_num++] = iface; -+#endif -+ } -+ } -+ -+ if (p2p_gc_num) { -+ target_iface = gc_ifs[0]; -+ } -+ else if (sta_num) { -+ if(sta_num == 1) { -+ target_iface = sta_ifs[0]; -+ } else if (sta_num >= 2) { -+ /*TODO get target_iface by timestamp*/ -+ target_iface = sta_ifs[0]; -+ } -+ } else if (ap_num) { -+ target_iface = ap_ifs[0]; -+ } -+ -+ RTW_INFO("[IFS_ASSOC_STATUS] - STA :%d", sta_num); -+ RTW_INFO("[IFS_ASSOC_STATUS] - TDLS :%d", tdls_num); -+ RTW_INFO("[IFS_ASSOC_STATUS] - AP:%d", ap_num); -+ RTW_INFO("[IFS_ASSOC_STATUS] - MESH :%d", mesh_num); -+ RTW_INFO("[IFS_ASSOC_STATUS] - ADHOC :%d", adhoc_num); -+ RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GC :%d", p2p_gc_num); -+ RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GO :%d", p2p_go_num); -+ -+ if (target_iface) -+ RTW_INFO("%s => target_iface ("ADPT_FMT")\n", -+ __func__, ADPT_ARG(target_iface)); -+ else -+ RTW_INFO("%s => target_iface NULL\n", __func__); -+ -+ return target_iface; -+} -+ -+void rtw_search_default_port(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *adp_iface = NULL; -+#ifdef CONFIG_WOWLAN -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ -+ if (pwrpriv->wowlan_mode == _TRUE) { -+ adp_iface = adapter; -+ goto exit; -+ } -+#endif -+ adp_iface = _rtw_search_dp_iface(adapter); -+ -+exit : -+ if ((adp_iface != NULL) && (MLME_IS_STA(adp_iface))) -+ rtw_set_default_port_id(adp_iface); -+ else -+ rtw_hal_set_default_port_id_cmd(adapter, 0); -+ -+ if (1) { -+ _adapter *tmp_adp; -+ -+ tmp_adp = (adp_iface) ? adp_iface : adapter; -+ -+ RTW_INFO("%s ("ADPT_FMT")=> hw_port :%d, default_port(%d)\n", -+ __func__, ADPT_ARG(adapter), get_hw_port(tmp_adp), get_dft_portid(tmp_adp)); -+ } -+} -+#endif -+#endif /*CONFIG_FW_MULTI_PORT_SUPPORT*/ -+ -+#ifdef CONFIG_P2P_PS -+#ifdef RTW_HALMAC -+void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state) -+{ -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter); -+ struct wifidirect_info *pwdinfo = &adapter->wdinfo; -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *psta; -+ HAL_P2P_PS_PARA p2p_ps_para; -+ int status = -1; -+ u8 i; -+ u8 hw_port = rtw_hal_get_port(adapter); -+ -+ _rtw_memset(&p2p_ps_para, 0, sizeof(HAL_P2P_PS_PARA)); -+ _rtw_memcpy((&p2p_ps_para) , &hal->p2p_ps_offload , sizeof(hal->p2p_ps_offload)); -+ -+ (&p2p_ps_para)->p2p_port_id = hw_port; -+ (&p2p_ps_para)->p2p_group = 0; -+ psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); -+ if (psta) { -+ (&p2p_ps_para)->p2p_macid = psta->cmn.mac_id; -+ } else { -+ if (p2p_ps_state != P2P_PS_DISABLE) { -+ RTW_ERR("%s , psta was NULL\n", __func__); -+ return; -+ } -+ } -+ -+ -+ switch (p2p_ps_state) { -+ case P2P_PS_DISABLE: -+ RTW_INFO("P2P_PS_DISABLE\n"); -+ _rtw_memset(&p2p_ps_para , 0, sizeof(HAL_P2P_PS_PARA)); -+ break; -+ -+ case P2P_PS_ENABLE: -+ RTW_INFO("P2P_PS_ENABLE\n"); -+ /* update CTWindow value. */ -+ if (pwdinfo->ctwindow > 0) { -+ (&p2p_ps_para)->ctwindow_en = 1; -+ (&p2p_ps_para)->ctwindow_length = pwdinfo->ctwindow; -+ /*RTW_INFO("%s , ctwindow_length = %d\n" , __func__ , (&p2p_ps_para)->ctwindow_length);*/ -+ } -+ -+ -+ if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) { -+ (&p2p_ps_para)->offload_en = 1; -+ if (pwdinfo->role == P2P_ROLE_GO) { -+ (&p2p_ps_para)->role = 1; -+ (&p2p_ps_para)->all_sta_sleep = 0; -+ } else -+ (&p2p_ps_para)->role = 0; -+ -+ (&p2p_ps_para)->discovery = 0; -+ } -+ /* hw only support 2 set of NoA */ -+ for (i = 0; i < pwdinfo->noa_num; i++) { -+ /* To control the register setting for which NOA */ -+ (&p2p_ps_para)->noa_sel = i; -+ (&p2p_ps_para)->noa_en = 1; -+ (&p2p_ps_para)->disable_close_rf = 0; -+#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(adapter, WIFI_ASOC_STATE)) -+#endif /* CONFIG_CONCURRENT_MODE */ -+ (&p2p_ps_para)->disable_close_rf = 1; -+#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */ -+ /* config P2P NoA Descriptor Register */ -+ /* config NOA duration */ -+ (&p2p_ps_para)->noa_duration_para = pwdinfo->noa_duration[i]; -+ /* config NOA interval */ -+ (&p2p_ps_para)->noa_interval_para = pwdinfo->noa_interval[i]; -+ /* config NOA start time */ -+ (&p2p_ps_para)->noa_start_time_para = pwdinfo->noa_start_time[i]; -+ /* config NOA count */ -+ (&p2p_ps_para)->noa_count_para = pwdinfo->noa_count[i]; -+ /*RTW_INFO("%s , noa_duration_para = %d , noa_interval_para = %d , noa_start_time_para = %d , noa_count_para = %d\n" , __func__ , -+ (&p2p_ps_para)->noa_duration_para , (&p2p_ps_para)->noa_interval_para , -+ (&p2p_ps_para)->noa_start_time_para , (&p2p_ps_para)->noa_count_para);*/ -+ status = rtw_halmac_p2pps(adapter_to_dvobj(adapter) , (&p2p_ps_para)); -+ if (status == -1) -+ RTW_ERR("%s , rtw_halmac_p2pps fail\n", __func__); -+ } -+ -+ break; -+ -+ case P2P_PS_SCAN: -+ /*This feature FW not ready 20161116 YiWei*/ -+ return; -+ /* -+ RTW_INFO("P2P_PS_SCAN\n"); -+ (&p2p_ps_para)->discovery = 1; -+ (&p2p_ps_para)->ctwindow_length = pwdinfo->ctwindow; -+ (&p2p_ps_para)->noa_duration_para = pwdinfo->noa_duration[0]; -+ (&p2p_ps_para)->noa_interval_para = pwdinfo->noa_interval[0]; -+ (&p2p_ps_para)->noa_start_time_para = pwdinfo->noa_start_time[0]; -+ (&p2p_ps_para)->noa_count_para = pwdinfo->noa_count[0]; -+ */ -+ break; -+ -+ case P2P_PS_SCAN_DONE: -+ /*This feature FW not ready 20161116 YiWei*/ -+ return; -+ /* -+ RTW_INFO("P2P_PS_SCAN_DONE\n"); -+ (&p2p_ps_para)->discovery = 0; -+ pwdinfo->p2p_ps_state = P2P_PS_ENABLE; -+ (&p2p_ps_para)->ctwindow_length = pwdinfo->ctwindow; -+ (&p2p_ps_para)->noa_duration_para = pwdinfo->noa_duration[0]; -+ (&p2p_ps_para)->noa_interval_para = pwdinfo->noa_interval[0]; -+ (&p2p_ps_para)->noa_start_time_para = pwdinfo->noa_start_time[0]; -+ (&p2p_ps_para)->noa_count_para = pwdinfo->noa_count[0]; -+ */ -+ break; -+ -+ default: -+ break; -+ } -+ -+ if (p2p_ps_state != P2P_PS_ENABLE || (&p2p_ps_para)->noa_en == 0) { -+ status = rtw_halmac_p2pps(adapter_to_dvobj(adapter) , (&p2p_ps_para)); -+ if (status == -1) -+ RTW_ERR("%s , rtw_halmac_p2pps fail\n", __func__); -+ } -+ _rtw_memcpy(&hal->p2p_ps_offload , (&p2p_ps_para) , sizeof(hal->p2p_ps_offload)); -+ -+} -+#endif /* RTW_HALMAC */ -+#endif /* CONFIG_P2P */ -+ -+#if defined(CONFIG_RTL8822C) && defined(CONFIG_SUPPORT_DYNAMIC_TXPWR) -+static void _rtw_hal_dtp_macid_set( -+ _adapter *padapter, u8 opmode, u8 mac_id) -+{ -+ struct macid_ctl_t *macid_ctl = &(padapter->dvobj->macid_ctl); -+ struct sta_info *psta; -+ u8 h2c_cmd[H2C_FW_CRC5_SEARCH_LEN] = {0}; -+ u8 mac_addr[ETH_ALEN] = {0}; -+ -+ if (opmode) { -+ psta = macid_ctl->sta[mac_id]; -+ if (psta) -+ _rtw_memcpy(mac_addr, psta->cmn.mac_addr, ETH_ALEN); -+ -+ if (rtw_check_invalid_mac_address(mac_addr, _FALSE)) -+ return; -+ } -+ /* else DON'T CARE H2C_FW_CRC5_SEARCH mac addr in disconnected case */ -+ -+ if (rtw_get_chip_type(padapter) == RTL8822C) { -+ SET_H2CCMD_FW_CRC5_SEARCH_EN(h2c_cmd, opmode); -+ SET_H2CCMD_FW_CRC5_SEARCH_MACID(h2c_cmd, mac_id); -+ SET_H2CCMD_FW_CRC5_SEARCH_MAC(&h2c_cmd[1], mac_addr); -+ if (rtw_hal_fill_h2c_cmd(padapter, H2C_FW_CRC5_SEARCH, -+ H2C_FW_CRC5_SEARCH_LEN, h2c_cmd) != _SUCCESS) -+ RTW_WARN("%s : set h2c - 0x%02x fail!\n", __func__, H2C_FW_CRC5_SEARCH); -+ } -+} -+ -+static void rtw_hal_dtp_macid_set(_adapter *padapter, u8 opmode, -+ bool macid_ind, u8 mac_id, u8 macid_end) -+{ -+ int i; -+ -+ if (macid_ind == 0) { -+ _rtw_hal_dtp_macid_set(padapter, opmode, mac_id); -+ } else { -+ for (i = mac_id; i <= macid_end; i++) -+ _rtw_hal_dtp_macid_set(padapter, opmode, i); -+ } -+} -+#endif -+ -+/* -+* rtw_hal_set_FwMediaStatusRpt_cmd - -+* -+* @adapter: -+* @opmode: 0:disconnect, 1:connect -+* @miracast: 0:it's not in miracast scenario. 1:it's in miracast scenario -+* @miracast_sink: 0:source. 1:sink -+* @role: The role of this macid. 0:rsvd. 1:STA. 2:AP. 3:GC. 4:GO. 5:TDLS -+* @macid: -+* @macid_ind: 0:update Media Status to macid. 1:update Media Status from macid to macid_end -+* @macid_end: -+*/ -+s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, bool macid_ind, u8 macid_end) -+{ -+ struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; -+ u8 parm[H2C_MEDIA_STATUS_RPT_LEN] = {0}; -+ int i; -+ s32 ret; -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ u8 hw_port = rtw_hal_get_port(adapter); -+#endif -+ u8 op_num_change_bmp = 0; -+ -+#if defined(CONFIG_RTL8822C) && defined(CONFIG_SUPPORT_DYNAMIC_TXPWR) -+ rtw_hal_dtp_macid_set(adapter, opmode, macid_ind, macid, macid_end); -+#endif -+ -+ SET_H2CCMD_MSRRPT_PARM_OPMODE(parm, opmode); -+ SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, macid_ind); -+ SET_H2CCMD_MSRRPT_PARM_MIRACAST(parm, miracast); -+ SET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK(parm, miracast_sink); -+ SET_H2CCMD_MSRRPT_PARM_ROLE(parm, role); -+ SET_H2CCMD_MSRRPT_PARM_MACID(parm, macid); -+ SET_H2CCMD_MSRRPT_PARM_MACID_END(parm, macid_end); -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ SET_H2CCMD_MSRRPT_PARM_PORT_NUM(parm, hw_port); -+#endif -+ RTW_DBG_DUMP("MediaStatusRpt parm:", parm, H2C_MEDIA_STATUS_RPT_LEN); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, H2C_MEDIA_STATUS_RPT, H2C_MEDIA_STATUS_RPT_LEN, parm); -+ if (ret != _SUCCESS) -+ goto exit; -+ -+#if defined(CONFIG_RTL8188E) -+ if (rtw_get_chip_type(adapter) == RTL8188E) { -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ /* 8188E FW doesn't set macid no link, driver does it by self */ -+ if (opmode) -+ rtw_hal_set_hwreg(adapter, HW_VAR_MACID_LINK, &macid); -+ else -+ rtw_hal_set_hwreg(adapter, HW_VAR_MACID_NOLINK, &macid); -+ -+ /* for 8188E RA */ -+#if (RATE_ADAPTIVE_SUPPORT == 1) -+ if (hal_data->fw_ractrl == _FALSE) { -+ u8 max_macid; -+ -+ max_macid = rtw_search_max_mac_id(adapter); -+ rtw_hal_set_hwreg(adapter, HW_VAR_TX_RPT_MAX_MACID, &max_macid); -+ } -+#endif -+ } -+#endif -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ /* TODO: this should move to IOT issue area */ -+ if (rtw_get_chip_type(adapter) == RTL8812 -+ || rtw_get_chip_type(adapter) == RTL8821 -+ ) { -+ if (MLME_IS_STA(adapter)) -+ Hal_PatchwithJaguar_8812(adapter, opmode); -+ } -+#endif -+ -+ SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, 0); -+ if (macid_ind == 0) -+ macid_end = macid; -+ -+ for (i = macid; macid <= macid_end; macid++) { -+ op_num_change_bmp |= rtw_macid_ctl_set_h2c_msr(macid_ctl, macid, parm[0]); -+ if (!opmode) { -+ rtw_macid_ctl_set_bw(macid_ctl, macid, CHANNEL_WIDTH_20); -+ rtw_macid_ctl_set_vht_en(macid_ctl, macid, 0); -+ rtw_macid_ctl_set_rate_bmp0(macid_ctl, macid, 0); -+ rtw_macid_ctl_set_rate_bmp1(macid_ctl, macid, 0); -+ } -+ } -+ -+#if CONFIG_TX_AC_LIFETIME -+ if (op_num_change_bmp) -+ rtw_hal_update_tx_aclt(adapter); -+#endif -+ -+ if (!opmode) -+ rtw_update_tx_rate_bmp(adapter_to_dvobj(adapter)); -+ -+exit: -+ return ret; -+} -+ -+inline s32 rtw_hal_set_FwMediaStatusRpt_single_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid) -+{ -+ return rtw_hal_set_FwMediaStatusRpt_cmd(adapter, opmode, miracast, miracast_sink, role, macid, 0, 0); -+} -+ -+inline s32 rtw_hal_set_FwMediaStatusRpt_range_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, u8 macid_end) -+{ -+ return rtw_hal_set_FwMediaStatusRpt_cmd(adapter, opmode, miracast, miracast_sink, role, macid, 1, macid_end); -+} -+ -+void rtw_hal_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) -+{ -+ u8 u1H2CRsvdPageParm[H2C_RSVDPAGE_LOC_LEN] = {0}; -+ u8 ret = 0; -+ -+ RTW_INFO("RsvdPageLoc: ProbeRsp=%d PsPoll=%d Null=%d QoSNull=%d BTNull=%d\n", -+ rsvdpageloc->LocProbeRsp, rsvdpageloc->LocPsPoll, -+ rsvdpageloc->LocNullData, rsvdpageloc->LocQosNull, -+ rsvdpageloc->LocBTQosNull); -+ -+ SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1H2CRsvdPageParm, rsvdpageloc->LocProbeRsp); -+ SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1H2CRsvdPageParm, rsvdpageloc->LocPsPoll); -+ SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocNullData); -+ SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull); -+ SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocBTQosNull); -+ -+ ret = rtw_hal_fill_h2c_cmd(padapter, -+ H2C_RSVD_PAGE, -+ H2C_RSVDPAGE_LOC_LEN, -+ u1H2CRsvdPageParm); -+ -+} -+ -+#ifdef CONFIG_GPIO_WAKEUP -+void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ if (IS_8723D_SERIES(pHalData->version_id) || IS_8192F_SERIES(pHalData->version_id) -+ || IS_8822B_SERIES(pHalData->version_id) || IS_8821C_SERIES(pHalData->version_id) -+ || IS_8822C_SERIES(pHalData->version_id)) -+ rtw_hal_set_hwreg(padapter, HW_SET_GPIO_WL_CTRL, (u8 *)(&enable)); -+ /* -+ * Switch GPIO_13, GPIO_14 to wlan control, or pull GPIO_13,14 MUST fail. -+ * It happended at 8723B/8192E/8821A. New IC will check multi function GPIO, -+ * and implement HAL function. -+ * TODO: GPIO_8 multi function? -+ */ -+ -+ if ((index == 13 || index == 14) -+ #if defined(CONFIG_RTL8821A) && defined(CONFIG_SDIO_HCI) -+ /* 8821A's LED2 circuit(used by HW_LED strategy) needs enable WL GPIO control of GPIO[14:13], can't disable */ -+ && (!IS_HW_LED_STRATEGY(rtw_led_get_strategy(padapter)) || enable) -+ #endif -+ ) -+ rtw_hal_set_hwreg(padapter, HW_SET_GPIO_WL_CTRL, (u8 *)(&enable)); -+} -+ -+void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval) -+{ -+#if defined(CONFIG_RTL8192F) -+ rtw_hal_set_hwreg(padapter, HW_VAR_WOW_OUTPUT_GPIO, (u8 *)(&outputval)); -+#else -+ if (index <= 7) { -+ /* config GPIO mode */ -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL + 3, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL + 3) & ~BIT(index)); -+ -+ /* config GPIO Sel */ -+ /* 0: input */ -+ /* 1: output */ -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL + 2, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL + 2) | BIT(index)); -+ -+ /* set output value */ -+ if (outputval) { -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL + 1, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL + 1) | BIT(index)); -+ } else { -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL + 1, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL + 1) & ~BIT(index)); -+ } -+ } else if (index <= 15) { -+ /* 88C Series: */ -+ /* index: 11~8 transform to 3~0 */ -+ /* 8723 Series: */ -+ /* index: 12~8 transform to 4~0 */ -+ -+ index -= 8; -+ -+ /* config GPIO mode */ -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 3, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 3) & ~BIT(index)); -+ -+ /* config GPIO Sel */ -+ /* 0: input */ -+ /* 1: output */ -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 2, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 2) | BIT(index)); -+ -+ /* set output value */ -+ if (outputval) { -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 1, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 1) | BIT(index)); -+ } else { -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 1, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 1) & ~BIT(index)); -+ } -+ } else { -+ RTW_INFO("%s: invalid GPIO%d=%d\n", -+ __FUNCTION__, index, outputval); -+ } -+#endif -+} -+void rtw_hal_set_input_gpio(_adapter *padapter, u8 index) -+{ -+#if defined(CONFIG_RTL8192F) -+ rtw_hal_set_hwreg(padapter, HW_VAR_WOW_INPUT_GPIO, (u8 *)(&index)); -+#else -+ if (index <= 7) { -+ /* config GPIO mode */ -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL + 3, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL + 3) & ~BIT(index)); -+ -+ /* config GPIO Sel */ -+ /* 0: input */ -+ /* 1: output */ -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL + 2, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL + 2) & ~BIT(index)); -+ -+ } else if (index <= 15) { -+ /* 88C Series: */ -+ /* index: 11~8 transform to 3~0 */ -+ /* 8723 Series: */ -+ /* index: 12~8 transform to 4~0 */ -+ -+ index -= 8; -+ -+ /* config GPIO mode */ -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 3, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 3) & ~BIT(index)); -+ -+ /* config GPIO Sel */ -+ /* 0: input */ -+ /* 1: output */ -+ rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 2, -+ rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 2) & ~BIT(index)); -+ } else -+ RTW_INFO("%s: invalid GPIO%d\n", __func__, index); -+#endif -+} -+ -+#endif -+ -+void rtw_hal_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ u8 ret = 0; -+#ifdef CONFIG_WOWLAN -+ u8 u1H2CAoacRsvdPageParm[H2C_AOAC_RSVDPAGE_LOC_LEN] = {0}; -+ -+ RTW_INFO("%s: RWC: %d ArpRsp: %d NbrAdv: %d LocNDPInfo: %d\n", -+ __func__, rsvdpageloc->LocRemoteCtrlInfo, -+ rsvdpageloc->LocArpRsp, rsvdpageloc->LocNbrAdv, -+ rsvdpageloc->LocNDPInfo); -+ RTW_INFO("%s:GtkRsp: %d GtkInfo: %d ProbeReq: %d NetworkList: %d\n", -+ __func__, rsvdpageloc->LocGTKRsp, rsvdpageloc->LocGTKInfo, -+ rsvdpageloc->LocProbeReq, rsvdpageloc->LocNetList); -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) { -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo); -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp); -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(u1H2CAoacRsvdPageParm, -+ rsvdpageloc->LocNbrAdv); -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_NDP_INFO(u1H2CAoacRsvdPageParm, -+ rsvdpageloc->LocNDPInfo); -+#ifdef CONFIG_GTK_OL -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKRsp); -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKInfo); -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKEXTMEM); -+#endif /* CONFIG_GTK_OL */ -+ ret = rtw_hal_fill_h2c_cmd(padapter, -+ H2C_AOAC_RSVD_PAGE, -+ H2C_AOAC_RSVDPAGE_LOC_LEN, -+ u1H2CAoacRsvdPageParm); -+ -+ RTW_INFO("AOAC Report=%d\n", rsvdpageloc->LocAOACReport); -+ _rtw_memset(&u1H2CAoacRsvdPageParm, 0, sizeof(u1H2CAoacRsvdPageParm)); -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_AOAC_REPORT(u1H2CAoacRsvdPageParm, -+ rsvdpageloc->LocAOACReport); -+ ret = rtw_hal_fill_h2c_cmd(padapter, -+ H2C_AOAC_RSVDPAGE3, -+ H2C_AOAC_RSVDPAGE_LOC_LEN, -+ u1H2CAoacRsvdPageParm); -+ pwrpriv->wowlan_aoac_rpt_loc = rsvdpageloc->LocAOACReport; -+ } -+#ifdef CONFIG_PNO_SUPPORT -+ else { -+ -+ if (!pwrpriv->wowlan_in_resume) { -+ RTW_INFO("NLO_INFO=%d\n", rsvdpageloc->LocPNOInfo); -+ _rtw_memset(&u1H2CAoacRsvdPageParm, 0, -+ sizeof(u1H2CAoacRsvdPageParm)); -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(u1H2CAoacRsvdPageParm, -+ rsvdpageloc->LocPNOInfo); -+ ret = rtw_hal_fill_h2c_cmd(padapter, -+ H2C_AOAC_RSVDPAGE3, -+ H2C_AOAC_RSVDPAGE_LOC_LEN, -+ u1H2CAoacRsvdPageParm); -+ } -+ } -+#endif /* CONFIG_PNO_SUPPORT */ -+#endif /* CONFIG_WOWLAN */ -+} -+ -+#ifdef DBG_FW_DEBUG_MSG_PKT -+void rtw_hal_set_fw_dbg_msg_pkt_rsvd_page_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) -+{ -+ struct hal_ops *pHalFunc = &padapter->hal_func; -+ u8 u1H2C_fw_dbg_msg_pkt_parm[H2C_FW_DBG_MSG_PKT_LEN] = {0}; -+ u8 ret = 0; -+ -+ -+ RTW_INFO("RsvdPageLoc: loc_fw_dbg_msg_pkt =%d\n", rsvdpageloc->loc_fw_dbg_msg_pkt); -+ -+ SET_H2CCMD_FW_DBG_MSG_PKT_EN(u1H2C_fw_dbg_msg_pkt_parm, 1); -+ SET_H2CCMD_RSVDPAGE_LOC_FW_DBG_MSG_PKT(u1H2C_fw_dbg_msg_pkt_parm, rsvdpageloc->loc_fw_dbg_msg_pkt); -+ ret = rtw_hal_fill_h2c_cmd(padapter, -+ H2C_FW_DBG_MSG_PKT, -+ H2C_FW_DBG_MSG_PKT_LEN, -+ u1H2C_fw_dbg_msg_pkt_parm); -+ -+} -+#endif /*DBG_FW_DEBUG_MSG_PKT*/ -+ -+/*#define DBG_GET_RSVD_PAGE*/ -+int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset, -+ u32 page_num, u8 *buffer, u32 buffer_size) -+{ -+ u32 addr = 0, size = 0, count = 0; -+ u32 page_size = 0, data_low = 0, data_high = 0; -+ u16 txbndy = 0, offset = 0; -+ u8 i = 0; -+ bool rst = _FALSE; -+ -+#ifdef DBG_LA_MODE -+ struct registry_priv *registry_par = &adapter->registrypriv; -+ -+ if(registry_par->la_mode_en == 1) { -+ RTW_INFO("%s LA debug mode can't dump rsvd pg \n", __func__); -+ return rst; -+ } -+#endif -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, &page_size); -+ -+ addr = page_offset * page_size; -+ size = page_num * page_size; -+ -+ if (buffer_size < size) { -+ RTW_ERR("%s buffer_size(%d) < get page total size(%d)\n", -+ __func__, buffer_size, size); -+ return rst; -+ } -+#ifdef RTW_HALMAC -+ if (rtw_halmac_dump_fifo(adapter_to_dvobj(adapter), 2, addr, size, buffer) < 0) -+ rst = _FALSE; -+ else -+ rst = _TRUE; -+#else -+ txbndy = rtw_read8(adapter, REG_TDECTRL + 1); -+ -+ offset = (txbndy + page_offset) * page_size / 8; -+ count = (buffer_size / 8) + 1; -+ -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, 0x69); -+ -+ for (i = 0 ; i < count ; i++) { -+ rtw_write32(adapter, REG_PKTBUF_DBG_CTRL, offset + i); -+ data_low = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L); -+ data_high = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H); -+ _rtw_memcpy(buffer + (i * 8), -+ &data_low, sizeof(data_low)); -+ _rtw_memcpy(buffer + ((i * 8) + 4), -+ &data_high, sizeof(data_high)); -+ } -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, 0x0); -+ rst = _TRUE; -+#endif /*RTW_HALMAC*/ -+ -+#ifdef DBG_GET_RSVD_PAGE -+ RTW_INFO("%s [page_offset:%d , page_num:%d][start_addr:0x%04x , size:%d]\n", -+ __func__, page_offset, page_num, addr, size); -+ RTW_INFO_DUMP("\n", buffer, size); -+ RTW_INFO(" ==================================================\n"); -+#endif -+ return rst; -+} -+ -+void rtw_dump_rsvd_page(void *sel, _adapter *adapter, u8 page_offset, u8 page_num) -+{ -+#if defined(CONFIG_RTW_DEBUG) || defined(CONFIG_PROC_DEBUG) -+ u32 page_size = 0; -+ u8 *buffer = NULL; -+ u32 buf_size = 0; -+ -+ if (page_num == 0) -+ return; -+ -+ RTW_PRINT_SEL(sel, "======= RSVD PAGE DUMP =======\n"); -+ RTW_PRINT_SEL(sel, "page_offset:%d, page_num:%d\n", page_offset, page_num); -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, &page_size); -+ if (page_size) { -+ buf_size = page_size * page_num; -+ buffer = rtw_zvmalloc(buf_size); -+ -+ if (buffer) { -+ rtw_hal_get_rsvd_page(adapter, page_offset, page_num, buffer, buf_size); -+ RTW_DUMP_SEL(sel, buffer, buf_size); -+ rtw_vmfree(buffer, buf_size); -+ } else -+ RTW_PRINT_SEL(sel, "ERROR - rsvd_buf mem allocate failed\n"); -+ } else -+ RTW_PRINT_SEL(sel, "ERROR - Tx page size is zero ??\n"); -+ -+ RTW_PRINT_SEL(sel, "==========================\n"); -+#endif -+} -+ -+#ifdef CONFIG_SUPPORT_FIFO_DUMP -+void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32 fifo_size) -+{ -+ u8 *buffer = NULL; -+ u32 buff_size = 0; -+ static const char * const fifo_sel_str[] = { -+ "TX", "RX", "RSVD_PAGE", "REPORT", "LLT", "RXBUF_FW" -+ }; -+ -+ if (fifo_sel > 5) { -+ RTW_ERR("fifo_sel:%d invalid\n", fifo_sel); -+ return; -+ } -+ -+ RTW_PRINT_SEL(sel, "========= FIFO DUMP =========\n"); -+ RTW_PRINT_SEL(sel, "%s FIFO DUMP [start_addr:0x%04x , size:%d]\n", fifo_sel_str[fifo_sel], fifo_addr, fifo_size); -+ -+ if (fifo_size) { -+ buff_size = RND4(fifo_size); -+ buffer = rtw_zvmalloc(buff_size); -+ if (buffer == NULL) -+ buff_size = 0; -+ } -+ -+ rtw_halmac_dump_fifo(adapter_to_dvobj(adapter), fifo_sel, fifo_addr, buff_size, buffer); -+ -+ if (buffer) { -+ RTW_DUMP_SEL(sel, buffer, fifo_size); -+ rtw_vmfree(buffer, buff_size); -+ } -+ -+ RTW_PRINT_SEL(sel, "==========================\n"); -+} -+#endif -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+static void rtw_hal_force_enable_rxdma(_adapter *adapter) -+{ -+ RTW_INFO("%s: Set 0x690=0x00\n", __func__); -+ rtw_write8(adapter, REG_WOW_CTRL, -+ (rtw_read8(adapter, REG_WOW_CTRL) & 0xf0)); -+ RTW_PRINT("%s: Release RXDMA\n", __func__); -+ rtw_write32(adapter, REG_RXPKT_NUM, -+ (rtw_read32(adapter, REG_RXPKT_NUM) & (~RW_RELEASE_EN))); -+} -+#if defined(CONFIG_RTL8188E) -+static void rtw_hal_disable_tx_report(_adapter *adapter) -+{ -+ rtw_write8(adapter, REG_TX_RPT_CTRL, -+ ((rtw_read8(adapter, REG_TX_RPT_CTRL) & ~BIT(1))) & ~BIT(5)); -+ RTW_INFO("disable TXRPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL)); -+} -+ -+static void rtw_hal_enable_tx_report(_adapter *adapter) -+{ -+ rtw_write8(adapter, REG_TX_RPT_CTRL, -+ ((rtw_read8(adapter, REG_TX_RPT_CTRL) | BIT(1))) | BIT(5)); -+ RTW_INFO("enable TX_RPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL)); -+} -+#endif -+static void rtw_hal_release_rx_dma(_adapter *adapter) -+{ -+ u32 val32 = 0; -+ -+ val32 = rtw_read32(adapter, REG_RXPKT_NUM); -+ -+ rtw_write32(adapter, REG_RXPKT_NUM, (val32 & (~RW_RELEASE_EN))); -+ -+ RTW_INFO("%s, [0x%04x]: 0x%08x\n", -+ __func__, REG_RXPKT_NUM, (u32)(val32 & (~RW_RELEASE_EN))); -+} -+ -+static u8 rtw_hal_pause_rx_dma(_adapter *adapter) -+{ -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter); -+ u8 ret = 0; -+ s8 trycnt = 100; -+ u32 tmp = 0; -+ int res = 0; -+ /* RX DMA stop */ -+ RTW_PRINT("Pause DMA\n"); -+ rtw_write32(adapter, REG_RXPKT_NUM, -+ (rtw_read32(adapter, REG_RXPKT_NUM) | RW_RELEASE_EN)); -+ do { -+ if ((rtw_read32(adapter, REG_RXPKT_NUM) & RXDMA_IDLE)) { -+#ifdef CONFIG_USB_HCI -+ /* stop interface before leave */ -+ if (_TRUE == hal->usb_intf_start) { -+ rtw_intf_stop(adapter); -+ RTW_ENABLE_FUNC(adapter, DF_RX_BIT); -+ RTW_ENABLE_FUNC(adapter, DF_TX_BIT); -+ } -+#endif /* CONFIG_USB_HCI */ -+ -+ RTW_PRINT("RX_DMA_IDLE is true\n"); -+ ret = _SUCCESS; -+ break; -+ } -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ else { -+ res = RecvOnePkt(adapter); -+ RTW_PRINT("RecvOnePkt Result: %d\n", res); -+ } -+#endif /* CONFIG_SDIO_HCI || CONFIG_GSPI_HCI */ -+ -+#ifdef CONFIG_USB_HCI -+ else { -+ /* to avoid interface start repeatedly */ -+ if (_FALSE == hal->usb_intf_start) -+ rtw_intf_start(adapter); -+ } -+#endif /* CONFIG_USB_HCI */ -+ } while (trycnt--); -+ -+ if (trycnt < 0) { -+ tmp = rtw_read16(adapter, REG_RXPKT_NUM + 2); -+ -+ RTW_PRINT("Stop RX DMA failed......\n"); -+#if defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) -+ RTW_PRINT("%s, RXPKT_NUM: 0x%04x\n", -+ __func__, rtw_read16(adapter, REG_RXPKTNUM)); -+#else -+ RTW_PRINT("%s, RXPKT_NUM: 0x%02x\n", -+ __func__, ((tmp & 0xFF00) >> 8)); -+#endif -+ if (tmp & BIT(3)) -+ RTW_PRINT("%s, RX DMA has req\n", -+ __func__); -+ else -+ RTW_PRINT("%s, RX DMA no req\n", -+ __func__); -+ ret = _FAIL; -+ } -+ -+ return ret; -+} -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+#ifndef RTW_HALMAC -+static u8 rtw_hal_enable_cpwm2(_adapter *adapter) -+{ -+ u8 ret = 0; -+ int res = 0; -+ u32 tmp = 0; -+#ifdef CONFIG_GPIO_WAKEUP -+ return _SUCCESS; -+#else -+ RTW_PRINT("%s\n", __func__); -+ -+ res = sdio_local_read(adapter, SDIO_REG_HIMR, 4, (u8 *)&tmp); -+ if (!res) -+ RTW_INFO("read SDIO_REG_HIMR: 0x%08x\n", tmp); -+ else -+ RTW_INFO("sdio_local_read fail\n"); -+ -+ tmp = SDIO_HIMR_CPWM2_MSK; -+ -+ res = sdio_local_write(adapter, SDIO_REG_HIMR, 4, (u8 *)&tmp); -+ -+ if (!res) { -+ res = sdio_local_read(adapter, SDIO_REG_HIMR, 4, (u8 *)&tmp); -+ RTW_INFO("read again SDIO_REG_HIMR: 0x%08x\n", tmp); -+ ret = _SUCCESS; -+ } else { -+ RTW_INFO("sdio_local_write fail\n"); -+ ret = _FAIL; -+ } -+ return ret; -+#endif /* CONFIG_CPIO_WAKEUP */ -+} -+#endif -+#endif /* CONFIG_SDIO_HCI, CONFIG_GSPI_HCI */ -+#endif /* CONFIG_WOWLAN || CONFIG_AP_WOWLAN */ -+ -+#ifdef CONFIG_WOWLAN -+/* -+ * rtw_hal_check_wow_ctrl -+ * chk_type: _TRUE means to check enable, if 0x690 & bit1 (for 8051), WOW enable successful. -+ * If 0x1C7 == 0 (for 3081), WOW enable successful. -+ * _FALSE means to check disable, if 0x690 & bit1 (for 8051), WOW disable fail. -+ * If 0x120 & bit16 || 0x284 & bit18 (for 3081), WOW disable fail. -+ */ -+static u8 rtw_hal_check_wow_ctrl(_adapter *adapter, u8 chk_type) -+{ -+ u32 fe1_imr = 0xFF, rxpkt_num = 0xFF; -+ u8 mstatus = 0; -+ u8 reason = 0xFF; -+ u8 trycnt = 25; -+ u8 res = _FALSE; -+ -+ if (IS_HARDWARE_TYPE_JAGUAR2(adapter) || IS_HARDWARE_TYPE_JAGUAR3(adapter)) { -+ if (chk_type) { -+ reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON); -+ RTW_INFO("%s reason:0x%02x\n", __func__, reason); -+ -+ while (reason && trycnt > 1) { -+ reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON); -+ RTW_PRINT("Loop index: %d :0x%02x\n", -+ trycnt, reason); -+ trycnt--; -+ rtw_msleep_os(20); -+ } -+ if (!reason) -+ res = _TRUE; -+ else -+ res = _FALSE; -+ } else { -+ /* Wait FW to cleare 0x120 bit16, 0x284 bit18 to 0 */ -+ fe1_imr = rtw_read32(adapter, REG_FE1IMR); /* RxDone IMR for 3081 */ -+ rxpkt_num = rtw_read32(adapter, REG_RXPKT_NUM); /* Release RXDMA */ -+ RTW_PRINT("%s REG_FE1IMR (reg120): 0x%x, REG_RXPKT_NUM(reg284): 0x%x\n", __func__, fe1_imr, rxpkt_num); -+ -+ while (((fe1_imr & BIT_FS_RXDONE_INT_EN) || (rxpkt_num & BIT_RW_RELEASE_EN)) && trycnt > 1) { -+ rtw_msleep_os(20); -+ fe1_imr = rtw_read32(adapter, REG_FE1IMR); -+ rxpkt_num = rtw_read32(adapter, REG_RXPKT_NUM); -+ RTW_PRINT("Loop index: %d :0x%x, 0x%x\n", -+ trycnt, fe1_imr, rxpkt_num); -+ trycnt--; -+ } -+ -+ if ((fe1_imr & BIT_FS_RXDONE_INT_EN) || (rxpkt_num & BIT_RW_RELEASE_EN)) -+ res = _FALSE; -+ else -+ res = _TRUE; -+ } -+ } else { -+ mstatus = rtw_read8(adapter, REG_WOW_CTRL); -+ RTW_INFO("%s mstatus:0x%02x\n", __func__, mstatus); -+ -+ -+ if (chk_type) { -+ while (!(mstatus & BIT1) && trycnt > 1) { -+ mstatus = rtw_read8(adapter, REG_WOW_CTRL); -+ RTW_PRINT("Loop index: %d :0x%02x\n", -+ trycnt, mstatus); -+ trycnt--; -+ rtw_msleep_os(20); -+ } -+ if (mstatus & BIT1) -+ res = _TRUE; -+ else -+ res = _FALSE; -+ } else { -+ while (mstatus & BIT1 && trycnt > 1) { -+ mstatus = rtw_read8(adapter, REG_WOW_CTRL); -+ RTW_PRINT("Loop index: %d :0x%02x\n", -+ trycnt, mstatus); -+ trycnt--; -+ rtw_msleep_os(20); -+ } -+ -+ if (mstatus & BIT1) -+ res = _FALSE; -+ else -+ res = _TRUE; -+ } -+ } -+ -+ RTW_PRINT("%s check_type: %d res: %d trycnt: %d\n", -+ __func__, chk_type, res, (25 - trycnt)); -+ return res; -+} -+ -+#ifdef CONFIG_PNO_SUPPORT -+static u8 rtw_hal_check_pno_enabled(_adapter *adapter) -+{ -+ struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); -+ u8 res = 0, count = 0; -+ u8 ret = _FALSE; -+ -+ if (ppwrpriv->wowlan_pno_enable && ppwrpriv->wowlan_in_resume == _FALSE) { -+ res = rtw_read8(adapter, REG_PNO_STATUS); -+ while (!(res & BIT(7)) && count < 25) { -+ RTW_INFO("[%d] cmd: 0x81 REG_PNO_STATUS: 0x%02x\n", -+ count, res); -+ res = rtw_read8(adapter, REG_PNO_STATUS); -+ count++; -+ rtw_msleep_os(2); -+ } -+ if (res & BIT(7)) -+ ret = _TRUE; -+ else -+ ret = _FALSE; -+ RTW_INFO("cmd: 0x81 REG_PNO_STATUS: ret(%d)\n", ret); -+ } -+ return ret; -+} -+#endif -+ -+static void rtw_hal_backup_rate(_adapter *adapter) -+{ -+ RTW_INFO("%s\n", __func__); -+ /* backup data rate to register 0x8b for wowlan FW */ -+ rtw_write8(adapter, 0x8d, 1); -+ rtw_write8(adapter, 0x8c, 0); -+ rtw_write8(adapter, 0x8f, 0x40); -+ rtw_write8(adapter, 0x8b, rtw_read8(adapter, 0x2f0)); -+} -+ -+#ifdef CONFIG_GTK_OL -+static void rtw_hal_fw_sync_cam_id(_adapter *adapter) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ int cam_id, index = 0; -+ u8 *addr = NULL; -+ -+ if (!MLME_IS_STA(adapter)) -+ return; -+ -+ addr = get_bssid(pmlmepriv); -+ -+ if (addr == NULL) { -+ RTW_INFO("%s: get bssid MAC addr fail!!\n", __func__); -+ return; -+ } -+ -+ rtw_clean_dk_section(adapter); -+ -+ do { -+ cam_id = rtw_camid_search(adapter, addr, index, 1); -+ -+ if (cam_id == -1) -+ RTW_INFO("%s: cam_id: %d, key_id:%d\n", __func__, cam_id, index); -+ else -+ rtw_sec_cam_swap(adapter, cam_id, index); -+ -+ index++; -+ } while (index < 4); -+ -+ rtw_write8(adapter, REG_SECCFG, 0xcc); -+} -+ -+static void rtw_hal_update_gtk_offload_info(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ struct aoac_report *paoac_rpt = &pwrctl->wowlan_aoac_rpt; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ _irqL irqL; -+ u8 get_key[16]; -+ u8 gtk_id = 0, offset = 0, i = 0, sz = 0, aoac_rpt_ver = 0, has_rekey = _FALSE; -+ u64 replay_count = 0, tmp_iv_hdr = 0, pkt_pn = 0; -+ -+ if (!MLME_IS_STA(adapter)) -+ return; -+ -+ _rtw_memset(get_key, 0, sizeof(get_key)); -+ _rtw_memcpy(&replay_count, -+ paoac_rpt->replay_counter_eapol_key, 8); -+ -+ /*read gtk key index*/ -+ gtk_id = paoac_rpt->key_index; -+ aoac_rpt_ver = paoac_rpt->version_info; -+ -+ if (aoac_rpt_ver == 0) { -+ /* initial verison */ -+ if (gtk_id == 5) -+ has_rekey = _FALSE; -+ else -+ has_rekey = _TRUE; -+ } else if (aoac_rpt_ver >= 1) { -+ /* Add krack patch */ -+ if (gtk_id == 5) -+ RTW_WARN("%s FW check iv fail\n", __func__); -+ -+ if (aoac_rpt_ver == 1) -+ RTW_WARN("%s aoac report version should be update to v2\n", __func__); -+ -+ /* Fix key id mismatch */ -+ if (aoac_rpt_ver == 2) -+ has_rekey = paoac_rpt->rekey_ok == 1 ? _TRUE : _FALSE; -+ } -+ -+ if (has_rekey == _FALSE) { -+ RTW_INFO("%s no rekey event happened.\n", __func__); -+ } else if (has_rekey == _TRUE) { -+ RTW_INFO("%s update security key.\n", __func__); -+ /*read key from sec-cam,for DK ,keyindex is equal to cam-id*/ -+ rtw_sec_read_cam_ent(adapter, gtk_id, -+ NULL, NULL, get_key); -+ rtw_clean_hw_dk_cam(adapter); -+ -+ if (_rtw_camid_is_gk(adapter, gtk_id)) { -+ _enter_critical_bh(&cam_ctl->lock, &irqL); -+ _rtw_memcpy(&dvobj->cam_cache[gtk_id].key, -+ get_key, 16); -+ _exit_critical_bh(&cam_ctl->lock, &irqL); -+ } else { -+ struct setkey_parm parm_gtk; -+ -+ parm_gtk.algorithm = paoac_rpt->security_type; -+ parm_gtk.keyid = gtk_id; -+ _rtw_memcpy(parm_gtk.key, get_key, 16); -+ setkey_hdl(adapter, (u8 *)&parm_gtk); -+ } -+ -+ /*update key into related sw variable and sec-cam cache*/ -+ psecuritypriv->dot118021XGrpKeyid = gtk_id; -+ _rtw_memcpy(&psecuritypriv->dot118021XGrpKey[gtk_id], -+ get_key, 16); -+ /* update SW TKIP TX/RX MIC value */ -+ if (psecuritypriv->dot118021XGrpPrivacy == _TKIP_) { -+ offset = RTW_KEK_LEN + RTW_TKIP_MIC_LEN; -+ _rtw_memcpy( -+ &psecuritypriv->dot118021XGrptxmickey[gtk_id], -+ &(paoac_rpt->group_key[offset]), -+ RTW_TKIP_MIC_LEN); -+ -+ offset = RTW_KEK_LEN; -+ _rtw_memcpy( -+ &psecuritypriv->dot118021XGrprxmickey[gtk_id], -+ &(paoac_rpt->group_key[offset]), -+ RTW_TKIP_MIC_LEN); -+ } -+ RTW_PRINT("GTK (%d) "KEY_FMT"\n", gtk_id, -+ KEY_ARG(psecuritypriv->dot118021XGrpKey[gtk_id].skey)); -+ } -+ -+ /* Update broadcast RX IV */ -+ if (psecuritypriv->dot118021XGrpPrivacy == _AES_) { -+ sz = sizeof(psecuritypriv->iv_seq[0]); -+ for (i = 0 ; i < 4 ; i++) { -+ _rtw_memcpy(&tmp_iv_hdr, paoac_rpt->rxgtk_iv[i], sz); -+ tmp_iv_hdr = le64_to_cpu(tmp_iv_hdr); -+ pkt_pn = CCMPH_2_PN(tmp_iv_hdr); -+ _rtw_memcpy(psecuritypriv->iv_seq[i], &pkt_pn, sz); -+ } -+ } -+ -+ rtw_clean_dk_section(adapter); -+ -+ rtw_write8(adapter, REG_SECCFG, 0x0c); -+ -+ #ifdef CONFIG_GTK_OL_DBG -+ /* if (gtk_keyindex != 5) */ -+ dump_sec_cam(RTW_DBGDUMP, adapter); -+ dump_sec_cam_cache(RTW_DBGDUMP, adapter); -+ #endif -+} -+#endif /*CONFIG_GTK_OL*/ -+ -+static void rtw_dump_aoac_rpt(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ struct aoac_report *paoac_rpt = &pwrctl->wowlan_aoac_rpt; -+ int i = 0; -+ -+ RTW_INFO_DUMP("[AOAC-RPT] IV -", paoac_rpt->iv, 8); -+ RTW_INFO_DUMP("[AOAC-RPT] Replay counter of EAPOL key - ", -+ paoac_rpt->replay_counter_eapol_key, 8); -+ RTW_INFO_DUMP("[AOAC-RPT] Group key - ", paoac_rpt->group_key, 32); -+ RTW_INFO("[AOAC-RPT] Key Index - %d\n", paoac_rpt->key_index); -+ RTW_INFO("[AOAC-RPT] Security Type - %d\n", paoac_rpt->security_type); -+ RTW_INFO("[AOAC-RPT] wow_pattern_idx - %d\n", -+ paoac_rpt->wow_pattern_idx); -+ RTW_INFO("[AOAC-RPT] version_info - %d\n", paoac_rpt->version_info); -+ RTW_INFO("[AOAC-RPT] rekey_ok - %d\n", paoac_rpt->rekey_ok); -+ RTW_INFO_DUMP("[AOAC-RPT] RX PTK IV-", paoac_rpt->rxptk_iv, 8); -+ RTW_INFO_DUMP("[AOAC-RPT] RX GTK[0] IV-", paoac_rpt->rxgtk_iv[0], 8); -+ RTW_INFO_DUMP("[AOAC-RPT] RX GTK[1] IV-", paoac_rpt->rxgtk_iv[1], 8); -+ RTW_INFO_DUMP("[AOAC-RPT] RX GTK[2] IV-", paoac_rpt->rxgtk_iv[2], 8); -+ RTW_INFO_DUMP("[AOAC-RPT] RX GTK[3] IV-", paoac_rpt->rxgtk_iv[3], 8); -+} -+ -+static void rtw_hal_get_aoac_rpt(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ struct aoac_report *paoac_rpt = &pwrctl->wowlan_aoac_rpt; -+ u32 page_offset = 0, page_number = 0; -+ u32 page_size = 0, buf_size = 0; -+ u8 *buffer = NULL; -+ u8 i = 0, tmp = 0; -+ int ret = -1; -+ -+ /* read aoac report from rsvd page */ -+ page_offset = pwrctl->wowlan_aoac_rpt_loc; -+ page_number = 1; -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, &page_size); -+ buf_size = page_size * page_number; -+ -+ buffer = rtw_zvmalloc(buf_size); -+ -+ if (buffer == NULL) { -+ RTW_ERR("%s buffer allocate failed size(%d)\n", -+ __func__, buf_size); -+ return; -+ } -+ -+ RTW_INFO("Get AOAC Report from rsvd page_offset:%d\n", page_offset); -+ -+ ret = rtw_hal_get_rsvd_page(adapter, page_offset, -+ page_number, buffer, buf_size); -+ -+ if (ret == _FALSE) { -+ RTW_ERR("%s get aoac report failed\n", __func__); -+ rtw_warn_on(1); -+ goto _exit; -+ } -+ -+ _rtw_memset(paoac_rpt, 0, sizeof(struct aoac_report)); -+ _rtw_memcpy(paoac_rpt, buffer, sizeof(struct aoac_report)); -+ -+ for (i = 0 ; i < 4 ; i++) { -+ tmp = paoac_rpt->replay_counter_eapol_key[i]; -+ paoac_rpt->replay_counter_eapol_key[i] = -+ paoac_rpt->replay_counter_eapol_key[7 - i]; -+ paoac_rpt->replay_counter_eapol_key[7 - i] = tmp; -+ } -+ -+ rtw_dump_aoac_rpt(adapter); -+ -+_exit: -+ if (buffer) -+ rtw_vmfree(buffer, buf_size); -+} -+ -+static void rtw_hal_update_tx_iv(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ struct aoac_report *paoac_rpt = &pwrctl->wowlan_aoac_rpt; -+ struct sta_info *psta; -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct security_priv *psecpriv = &adapter->securitypriv; -+ -+ u16 val16 = 0; -+ u32 val32 = 0; -+ u64 txiv = 0; -+ u8 *pval = NULL; -+ -+ psta = rtw_get_stainfo(&adapter->stapriv, -+ get_my_bssid(&pmlmeinfo->network)); -+ -+ /* Update TX iv data. */ -+ pval = (u8 *)&paoac_rpt->iv; -+ -+ if (psecpriv->dot11PrivacyAlgrthm == _TKIP_) { -+ val16 = ((u16)(paoac_rpt->iv[2]) << 0) + -+ ((u16)(paoac_rpt->iv[0]) << 8); -+ val32 = ((u32)(paoac_rpt->iv[4]) << 0) + -+ ((u32)(paoac_rpt->iv[5]) << 8) + -+ ((u32)(paoac_rpt->iv[6]) << 16) + -+ ((u32)(paoac_rpt->iv[7]) << 24); -+ } else if (psecpriv->dot11PrivacyAlgrthm == _AES_) { -+ val16 = ((u16)(paoac_rpt->iv[0]) << 0) + -+ ((u16)(paoac_rpt->iv[1]) << 8); -+ val32 = ((u32)(paoac_rpt->iv[4]) << 0) + -+ ((u32)(paoac_rpt->iv[5]) << 8) + -+ ((u32)(paoac_rpt->iv[6]) << 16) + -+ ((u32)(paoac_rpt->iv[7]) << 24); -+ } -+ -+ if (psta) { -+ txiv = val16 + ((u64)val32 << 16); -+ if (txiv != 0) -+ psta->dot11txpn.val = txiv; -+ } -+} -+ -+static void rtw_hal_update_sw_security_info(_adapter *adapter) -+{ -+ struct security_priv *psecpriv = &adapter->securitypriv; -+ u8 sz = sizeof (psecpriv->iv_seq); -+ -+ rtw_hal_update_tx_iv(adapter); -+#ifdef CONFIG_GTK_OL -+ if (psecpriv->binstallKCK_KEK == _TRUE && -+ (psecpriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK || _rtw_wow_chk_cap(adapter, WOW_CAP_TKIP_OL))) -+ rtw_hal_update_gtk_offload_info(adapter); -+#else -+ _rtw_memset(psecpriv->iv_seq, 0, sz); -+#endif -+} -+#ifdef CONFIG_CUSTOM_PULSE -+static u8 rtw_hal_set_gpio_custom_cmd(_adapter *adapter, u8 enable) -+{ -+ u8 H2CGpioCustomParm[H2C_GPIO_CUSTOM_LEN] = {0}; -+ u8 customid = 0x2, special_wakeup_reason = RX_MAGIC_PKT, custom_for_wakeup_reason=0x1; -+ u8 ret = _FAIL; -+ -+ RTW_INFO("%s(): enable = %d\n", __func__, enable); -+ -+ if(enable) { -+ SET_H2CCMD_CUSTOMERID(H2CGpioCustomParm, customid); -+ SET_H2CCMD_SPECIAL_WAKE_REASON(H2CGpioCustomParm, special_wakeup_reason); -+ SET_H2CCMD_CUSTOM_WAKE_REASON(H2CGpioCustomParm, custom_for_wakeup_reason); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_GPIO_CUSTOM, -+ H2C_GPIO_CUSTOM_LEN, -+ H2CGpioCustomParm); -+ RTW_DBG("%s(): H2C_cmd=%x, cmd=%02x, %02x, %02x\n", __func__, H2C_GPIO_CUSTOM, -+ H2CGpioCustomParm[0], H2CGpioCustomParm[1], H2CGpioCustomParm[2]); -+ } -+ -+ return ret; -+} -+#endif /* CONFIG_CUSTOM_PULSE */ -+static u8 rtw_hal_set_keep_alive_cmd(_adapter *adapter, u8 enable, u8 pkt_type) -+{ -+ u8 u1H2CKeepAliveParm[H2C_KEEP_ALIVE_CTRL_LEN] = {0}; -+ u8 adopt = 1, check_period = 5; -+ u8 ret = _FAIL; -+ u8 hw_port = rtw_hal_get_port(adapter); -+ -+ SET_H2CCMD_KEEPALIVE_PARM_ENABLE(u1H2CKeepAliveParm, enable); -+ SET_H2CCMD_KEEPALIVE_PARM_ADOPT(u1H2CKeepAliveParm, adopt); -+ SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(u1H2CKeepAliveParm, pkt_type); -+ SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(u1H2CKeepAliveParm, check_period); -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ SET_H2CCMD_KEEPALIVE_PARM_PORT_NUM(u1H2CKeepAliveParm, hw_port); -+ RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, hw_port); -+#else -+ RTW_INFO("%s(): enable = %d\n", __func__, enable); -+#endif -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_KEEP_ALIVE, -+ H2C_KEEP_ALIVE_CTRL_LEN, -+ u1H2CKeepAliveParm); -+ -+ return ret; -+} -+ -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+static u8 rtw_hal_set_keep_alive_pattern_cmd(PADAPTER adapter, u8 enable) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ u8 u1H2CKeepAliveParm[H2C_KEEP_ALIVE_PATTERN_LEN] = {0}; -+ u8 ret = _FAIL; -+ int i; -+ -+ /* If keep alive pattern is set, FW will use pattern for keep alive action */ -+ if(enable == 0 || (pwrctl->wowlan_keep_alive_mode == wow_keep_alive_pattern_disable)) { -+ SET_H2CCMD_UDP_KEEP_ALIVE_EN(u1H2CKeepAliveParm, _FALSE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_ACK_PATTERN_EN(u1H2CKeepAliveParm, _FALSE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_WAKE_EN(u1H2CKeepAliveParm, _FALSE); -+ return ret; -+ } -+ /*step1:set keep alive period*/ -+ SET_H2CCMD_UDP_KEEP_ALIVE_PERIOD_LOW_BIT(u1H2CKeepAliveParm, pwrctl->wowlan_keep_alive_period & 0x00FF); -+ SET_H2CCMD_UDP_KEEP_ALIVE_PERIOD_HI_BIT(u1H2CKeepAliveParm, ((pwrctl->wowlan_keep_alive_period & 0xFF00)>> 8)); -+ -+ if (pwrctl->wowlan_keep_alive_mode == wow_keep_alive_pattern_tx) { -+ SET_H2CCMD_UDP_KEEP_ALIVE_EN(u1H2CKeepAliveParm, _TRUE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_ACK_PATTERN_EN(u1H2CKeepAliveParm, _FALSE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_WAKE_EN(u1H2CKeepAliveParm, _FALSE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_PACKET_LOC(u1H2CKeepAliveParm, pwrctl->keep_alive_pattern_loc); -+ goto exit; -+ } -+ if (pwrctl->wowlan_keep_alive_mode == wow_keep_alive_pattern_trx) { -+ SET_H2CCMD_UDP_KEEP_ALIVE_EN(u1H2CKeepAliveParm, _TRUE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_ACK_PATTERN_EN(u1H2CKeepAliveParm, _TRUE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_WAKE_EN(u1H2CKeepAliveParm, _FALSE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_PACKET_LOC(u1H2CKeepAliveParm, pwrctl->keep_alive_pattern_loc); -+ SET_H2CCMD_UDP_KEEP_ALIVE_ACK_PATTERN_idx(u1H2CKeepAliveParm, pwrctl->wowlan_keep_alive_ack_index); -+ SET_H2CCMD_UDP_KEEP_ALIVE_RETRY_INTERVAL(u1H2CKeepAliveParm, pwrctl->wowlan_keep_alive_retry_interval); -+ SET_H2CCMD_UDP_KEEP_ALIVE_RETRY_LIMIT(u1H2CKeepAliveParm, pwrctl->wowlan_keep_alive_retry_counter); -+ goto exit; -+ } -+ if (pwrctl->wowlan_keep_alive_mode == wow_keep_alive_pattern_trx_with_ack) { -+ SET_H2CCMD_UDP_KEEP_ALIVE_EN(u1H2CKeepAliveParm, _TRUE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_ACK_PATTERN_EN(u1H2CKeepAliveParm, _TRUE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_WAKE_EN(u1H2CKeepAliveParm, _TRUE); -+ SET_H2CCMD_UDP_KEEP_ALIVE_PACKET_LOC(u1H2CKeepAliveParm, pwrctl->keep_alive_pattern_loc); -+ SET_H2CCMD_UDP_KEEP_ALIVE_ACK_PATTERN_idx(u1H2CKeepAliveParm, pwrctl->wowlan_keep_alive_ack_index); -+ SET_H2CCMD_UDP_KEEP_ALIVE_WAKE_PATTERN_idx(u1H2CKeepAliveParm, pwrctl->wowlan_wake_pattern_index); -+ SET_H2CCMD_UDP_KEEP_ALIVE_RETRY_INTERVAL(u1H2CKeepAliveParm, pwrctl->wowlan_keep_alive_retry_interval); -+ SET_H2CCMD_UDP_KEEP_ALIVE_RETRY_LIMIT(u1H2CKeepAliveParm, pwrctl->wowlan_keep_alive_retry_counter); -+ goto exit; -+ } -+exit: -+ for(i=0; iregistrypriv; -+ u8 hw_port = rtw_hal_get_port(adapter); -+ -+ SET_H2CCMD_DISCONDECISION_PARM_ENABLE(u1H2CDisconDecisionParm, enable); -+ SET_H2CCMD_DISCONDECISION_PARM_ADOPT(u1H2CDisconDecisionParm, adopt); -+ if (!(pregistry->wakeup_event & BIT(2))) -+ SET_H2CCMD_DISCONDECISION_PARM_DISCONNECT_EN(u1H2CDisconDecisionParm, adopt); -+ SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(u1H2CDisconDecisionParm, check_period); -+ SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(u1H2CDisconDecisionParm, trypkt_num); -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ SET_H2CCMD_DISCONDECISION_PORT_NUM(u1H2CDisconDecisionParm, hw_port); -+ RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, hw_port); -+#else -+ RTW_INFO("%s(): enable = %d\n", __func__, enable); -+#endif -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_DISCON_DECISION, -+ H2C_DISCON_DECISION_LEN, -+ u1H2CDisconDecisionParm); -+ return ret; -+} -+ -+static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_unit) -+{ -+ struct registry_priv *registry_par = &adapter->registrypriv; -+ struct security_priv *psecpriv = &adapter->securitypriv; -+ struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ -+ u8 u1H2CWoWlanCtrlParm[H2C_WOWLAN_LEN] = {0}; -+ u8 discont_wake = 0, gpionum = 0, gpio_dur = 0, no_wake = 0; -+ u8 hw_unicast = 0, gpio_pulse_cnt = 0, gpio_pulse_en = 0; -+ u8 sdio_wakeup_enable = 1; -+ u8 gpio_high_active = 0; -+ u8 magic_pkt = 0; -+ u8 gpio_unit = 0; /*0: 64ns, 1: 8ms*/ -+ u8 ret = _FAIL; -+#ifdef CONFIG_DIS_UPHY -+ u8 dis_uphy = 0, dis_uphy_unit = 0, dis_uphy_time = 0; -+#endif /* CONFIG_DIS_UPHY */ -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ gpio_high_active = ppwrpriv->is_high_active; -+ gpionum = ppwrpriv->wowlan_gpio_index; -+ sdio_wakeup_enable = 0; -+#endif /* CONFIG_GPIO_WAKEUP */ -+ -+ if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && -+ !check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) -+ no_wake = 1; -+ -+ if (!ppwrpriv->wowlan_pno_enable && -+ registry_par->wakeup_event & BIT(0) && !no_wake) -+ magic_pkt = enable; -+ -+ if ((registry_par->wakeup_event & BIT(1)) && -+ (psecpriv->dot11PrivacyAlgrthm == _WEP40_ || -+ psecpriv->dot11PrivacyAlgrthm == _WEP104_) && !no_wake) -+ hw_unicast = 1; -+ -+ if (registry_par->wakeup_event & BIT(2) && !no_wake) -+ discont_wake = enable; -+ -+ RTW_INFO("%s(): enable=%d change_unit=%d\n", __func__, -+ enable, change_unit); -+ -+ /* time = (gpio_dur/2) * gpio_unit, default:256 ms */ -+ if (enable && change_unit) { -+ gpio_dur = 0x40; -+ gpio_unit = 1; -+ gpio_pulse_en = 1; -+ } -+ -+#ifdef CONFIG_PLATFORM_ARM_RK3188 -+ if (enable) { -+ gpio_pulse_en = 1; -+ gpio_pulse_cnt = 0x04; -+ } -+#endif -+ -+ SET_H2CCMD_WOWLAN_FUNC_ENABLE(u1H2CWoWlanCtrlParm, enable); -+ if(!no_wake) -+ SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(u1H2CWoWlanCtrlParm, enable); -+ SET_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(u1H2CWoWlanCtrlParm, magic_pkt); -+ SET_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(u1H2CWoWlanCtrlParm, hw_unicast); -+ SET_H2CCMD_WOWLAN_ALL_PKT_DROP(u1H2CWoWlanCtrlParm, 0); -+ SET_H2CCMD_WOWLAN_GPIO_ACTIVE(u1H2CWoWlanCtrlParm, gpio_high_active); -+ -+#ifdef CONFIG_GTK_OL -+ if (psecpriv->binstallKCK_KEK == _TRUE && -+ (psecpriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK || _rtw_wow_chk_cap(adapter, WOW_CAP_TKIP_OL))) -+ SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 0); -+ else -+ SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 1); -+#else -+ SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, enable); -+#endif -+ SET_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(u1H2CWoWlanCtrlParm, discont_wake); -+ SET_H2CCMD_WOWLAN_GPIONUM(u1H2CWoWlanCtrlParm, gpionum); -+ SET_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(u1H2CWoWlanCtrlParm, sdio_wakeup_enable); -+ -+ SET_H2CCMD_WOWLAN_GPIO_DURATION(u1H2CWoWlanCtrlParm, gpio_dur); -+ SET_H2CCMD_WOWLAN_CHANGE_UNIT(u1H2CWoWlanCtrlParm, gpio_unit); -+ -+ SET_H2CCMD_WOWLAN_GPIO_PULSE_EN(u1H2CWoWlanCtrlParm, gpio_pulse_en); -+ SET_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(u1H2CWoWlanCtrlParm, gpio_pulse_cnt); -+ -+#ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE -+ if (enable) -+ SET_H2CCMD_WOWLAN_GPIO_INPUT_EN(u1H2CWoWlanCtrlParm, 1); -+#endif -+ -+#ifdef CONFIG_DIS_UPHY -+ if (enable) { -+ dis_uphy = 1; -+ /* time unit: 0 -> ms, 1 -> 256 ms*/ -+ dis_uphy_unit = 1; -+ dis_uphy_time = 0x4; -+ } -+ -+ SET_H2CCMD_WOWLAN_DISABLE_UPHY(u1H2CWoWlanCtrlParm, dis_uphy); -+ SET_H2CCMD_WOWLAN_UNIT_FOR_UPHY_DISABLE(u1H2CWoWlanCtrlParm, dis_uphy_unit); -+ SET_H2CCMD_WOWLAN_TIME_FOR_UPHY_DISABLE(u1H2CWoWlanCtrlParm, dis_uphy_time); -+ if (ppwrpriv->hst2dev_high_active == 1) -+ SET_H2CCMD_WOWLAN_RISE_HST2DEV(u1H2CWoWlanCtrlParm, 1); -+#ifdef CONFIG_RTW_ONE_PIN_GPIO -+ SET_H2CCMD_WOWLAN_GPIO_INPUT_EN(u1H2CWoWlanCtrlParm, 1); -+ SET_H2CCMD_WOWLAN_DEV2HST_EN(u1H2CWoWlanCtrlParm, 1); -+ SET_H2CCMD_WOWLAN_HST2DEV_EN(u1H2CWoWlanCtrlParm, 0); -+#else -+ SET_H2CCMD_WOWLAN_HST2DEV_EN(u1H2CWoWlanCtrlParm, 1); -+#endif /* CONFIG_RTW_ONE_PIN_GPIO */ -+#endif /* CONFIG_DIS_UPHY */ -+ -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_WOWLAN, -+ H2C_WOWLAN_LEN, -+ u1H2CWoWlanCtrlParm); -+ return ret; -+} -+ -+static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable) -+{ -+ struct security_priv *psecuritypriv = &(adapter->securitypriv); -+ struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); -+ struct registry_priv *pregistrypriv = &adapter->registrypriv; -+ u8 arp_en = pregistrypriv->wakeup_event & BIT(3); -+ u8 u1H2CRemoteWakeCtrlParm[H2C_REMOTE_WAKE_CTRL_LEN] = {0}; -+ u8 ret = _FAIL, count = 0, no_wake = 0; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ -+ RTW_INFO("%s(): enable=%d\n", __func__, enable); -+ -+ if(pregistrypriv->suspend_type == FW_IPS_DISABLE_BBRF && -+ !check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) -+ no_wake = 1; -+ if(no_wake) { -+ SET_H2CCMD_REMOTE_WAKECTRL_ENABLE( -+ u1H2CRemoteWakeCtrlParm, enable); -+ } else { -+ if (!ppwrpriv->wowlan_pno_enable) { -+ SET_H2CCMD_REMOTE_WAKECTRL_ENABLE( -+ u1H2CRemoteWakeCtrlParm, enable); -+ if (arp_en) -+ SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN( -+ u1H2CRemoteWakeCtrlParm, 1); -+ else -+ SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN( -+ u1H2CRemoteWakeCtrlParm, 0); -+ #ifdef CONFIG_GTK_OL -+ if (psecuritypriv->binstallKCK_KEK == _TRUE && -+ (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK || _rtw_wow_chk_cap(adapter, WOW_CAP_TKIP_OL))) { -+ SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN( -+ u1H2CRemoteWakeCtrlParm, 1); -+ } else { -+ RTW_INFO("no kck kek\n"); -+ SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN( -+ u1H2CRemoteWakeCtrlParm, 0); -+ } -+ #endif /* CONFIG_GTK_OL */ -+ -+ #ifdef CONFIG_IPV6 -+ if (ppwrpriv->wowlan_ns_offload_en == _TRUE) { -+ RTW_INFO("enable NS offload\n"); -+ SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN( -+ u1H2CRemoteWakeCtrlParm, enable); -+ } -+ -+ /* -+ * filter NetBios name service pkt to avoid being waked-up -+ * by this kind of unicast pkt this exceptional modification -+ * is used for match competitor's behavior -+ */ -+ -+ SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN( -+ u1H2CRemoteWakeCtrlParm, enable); -+ #endif /*CONFIG_IPV6*/ -+#if 0 /* replaced by WOWLAN pattern match */ -+ #ifdef CONFIG_RTL8192F -+ if (IS_HARDWARE_TYPE_8192F(adapter)){ -+ SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN( -+ u1H2CRemoteWakeCtrlParm, enable); -+ } -+ #endif /* CONFIG_RTL8192F */ -+#endif -+ if ((psecuritypriv->dot11PrivacyAlgrthm == _AES_) || -+ (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) || -+ (psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_)) { -+ SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( -+ u1H2CRemoteWakeCtrlParm, 0); -+ } else { /* WEP etc. */ -+ if (arp_en) -+ SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( -+ u1H2CRemoteWakeCtrlParm, 1); -+ } -+ -+ if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) { -+#ifdef CONFIG_GTK_OL -+ if(_rtw_wow_chk_cap(adapter, WOW_CAP_TKIP_OL)) -+ SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN( -+ u1H2CRemoteWakeCtrlParm, enable); -+#endif /* CONFIG_GTK_OL */ -+ if (IS_HARDWARE_TYPE_8188E(adapter) || -+ IS_HARDWARE_TYPE_8812(adapter)) { -+ SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN( -+ u1H2CRemoteWakeCtrlParm, 0); -+ if (arp_en) -+ SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( -+ u1H2CRemoteWakeCtrlParm, 1); -+ } -+ } -+ -+ SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP( -+ u1H2CRemoteWakeCtrlParm, 1); -+ } -+ #ifdef CONFIG_PNO_SUPPORT -+ else { -+ SET_H2CCMD_REMOTE_WAKECTRL_ENABLE( -+ u1H2CRemoteWakeCtrlParm, enable); -+ SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN( -+ u1H2CRemoteWakeCtrlParm, enable); -+ } -+ #endif -+ -+ #ifdef CONFIG_P2P_WOWLAN -+ if (_TRUE == ppwrpriv->wowlan_p2p_mode) { -+ RTW_INFO("P2P OFFLOAD ENABLE\n"); -+ SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm, 1); -+ } else { -+ RTW_INFO("P2P OFFLOAD DISABLE\n"); -+ SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(u1H2CRemoteWakeCtrlParm, 0); -+ } -+ #endif /* CONFIG_P2P_WOWLAN */ -+ } -+ -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_REMOTE_WAKE_CTRL, -+ H2C_REMOTE_WAKE_CTRL_LEN, -+ u1H2CRemoteWakeCtrlParm); -+ return ret; -+} -+ -+#ifdef CONFIG_WAR_OFFLOAD -+static u8 rtw_hal_set_war_offload_ctrl_cmd(_adapter *adapter, u8 enable) -+{ -+ struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); -+ u8 u1H2CWarOffloadParm[H2C_WAR_OFFLOAD_LEN] = {0}; -+ u8 ret = _FAIL; -+ -+ RTW_INFO("%s(): enable=%d\n", __func__, enable); -+ -+ if (_TRUE == ppwrpriv->wowlan_war_offload_mode) { -+ SET_H2CCMD_WAR_CFG_EN(u1H2CWarOffloadParm, enable); -+ SET_H2CCMD_WAR_CFG_ARP_RSP_EN(u1H2CWarOffloadParm, 1); -+ -+#ifdef CONFIG_OFFLOAD_MDNS_V4 -+ if (WAR_MDNS_V4_RSP_EN & ppwrpriv->wowlan_war_offload_ctrl) { -+ SET_H2CCMD_WAR_CFG_MDNSV4_RSP_EN(u1H2CWarOffloadParm, 1); -+ } -+ if (WAR_MDNS_V4_WAKEUP_EN& ppwrpriv->wowlan_war_offload_ctrl) { -+ SET_H2CCMD_WAR_CFG_MDNSV4_WAKE_EN(u1H2CWarOffloadParm, 1); -+ } -+#endif /* CONFIG_OFFLOAD_MDNS_V4 */ -+ -+#ifdef CONFIG_OFFLOAD_MDNS_V6 -+ if (WAR_MDNS_V6_RSP_EN & ppwrpriv->wowlan_war_offload_ctrl) { -+ SET_H2CCMD_WAR_CFG_MDNSV6_RSP_EN(u1H2CWarOffloadParm, 1); -+ } -+ if (WAR_MDNS_V6_WAKEUP_EN & ppwrpriv->wowlan_war_offload_ctrl) { -+ SET_H2CCMD_WAR_CFG_MDNSV6_WAKE_EN(u1H2CWarOffloadParm, 1); -+ } -+#endif /* CONFIG_OFFLOAD_MDNS_V6 */ -+ -+ } -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_WAR_OFFLOAD, -+ H2C_WAR_OFFLOAD_LEN, -+ u1H2CWarOffloadParm); -+ return ret; -+} -+ -+static u8 rtw_hal_set_war_offload_parm(_adapter *adapter, PRSVDPAGE_LOC rsvdpageloc) -+{ -+ struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); -+ u8 u1H2CWarOfldParm[H2C_WAROFLD_RSVDPAGE1_LEN] = {0}; -+ u8 ret = _FAIL; -+ -+ SET_H2CCMD_WAROFLD_RSVDPAGE1_LOC_PARM(u1H2CWarOfldParm, rsvdpageloc->LocIpParm); -+ RTW_INFO("%s(): LocIpParm = %d\n", __func__, rsvdpageloc->LocIpParm); -+ -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_WAROFLD_RSVDPAGE1, -+ H2C_WAROFLD_RSVDPAGE1_LEN, -+ u1H2CWarOfldParm); -+ -+ return ret; -+} -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+ -+ -+static u8 rtw_hal_set_global_info_cmd(_adapter *adapter, u8 group_alg, u8 pairwise_alg) -+{ -+ u8 ret = _FAIL; -+ u8 u1H2CAOACGlobalInfoParm[H2C_AOAC_GLOBAL_INFO_LEN] = {0}; -+ -+ RTW_INFO("%s(): group_alg=%d pairwise_alg=%d\n", -+ __func__, group_alg, pairwise_alg); -+ SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(u1H2CAOACGlobalInfoParm, -+ pairwise_alg); -+ SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(u1H2CAOACGlobalInfoParm, -+ group_alg); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_AOAC_GLOBAL_INFO, -+ H2C_AOAC_GLOBAL_INFO_LEN, -+ u1H2CAOACGlobalInfoParm); -+ -+ return ret; -+} -+ -+#ifdef CONFIG_PNO_SUPPORT -+static u8 rtw_hal_set_scan_offload_info_cmd(_adapter *adapter, -+ PRSVDPAGE_LOC rsvdpageloc, u8 enable) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ u8 u1H2CScanOffloadInfoParm[H2C_SCAN_OFFLOAD_CTRL_LEN] = {0}; -+ u8 res = 0, count = 0, ret = _FAIL; -+ -+ RTW_INFO("%s: loc_probe_packet:%d, loc_scan_info: %d loc_ssid_info:%d\n", -+ __func__, rsvdpageloc->LocProbePacket, -+ rsvdpageloc->LocScanInfo, rsvdpageloc->LocSSIDInfo); -+ -+ SET_H2CCMD_AOAC_NLO_FUN_EN(u1H2CScanOffloadInfoParm, enable); -+ SET_H2CCMD_AOAC_NLO_IPS_EN(u1H2CScanOffloadInfoParm, enable); -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(u1H2CScanOffloadInfoParm, -+ rsvdpageloc->LocScanInfo); -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(u1H2CScanOffloadInfoParm, -+ rsvdpageloc->LocProbePacket); -+ /* -+ SET_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(u1H2CScanOffloadInfoParm, -+ rsvdpageloc->LocSSIDInfo); -+ */ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_D0_SCAN_OFFLOAD_INFO, -+ H2C_SCAN_OFFLOAD_CTRL_LEN, -+ u1H2CScanOffloadInfoParm); -+ return ret; -+} -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+void rtw_hal_set_fw_wow_related_cmd(_adapter *padapter, u8 enable) -+{ -+ struct security_priv *psecpriv = &padapter->securitypriv; -+ struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct registry_priv *pregistry = &padapter->registrypriv; -+ u8 pkt_type = 0, no_wake = 0; -+ -+ if(pregistry->suspend_type == FW_IPS_DISABLE_BBRF && -+ !check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) -+ no_wake = 1; -+ -+ RTW_PRINT("+%s()+: enable=%d\n", __func__, enable); -+ -+ rtw_hal_set_wowlan_ctrl_cmd(padapter, enable, _FALSE); -+ -+ if (enable) { -+ if(!no_wake) -+ rtw_hal_set_global_info_cmd(padapter, -+ psecpriv->dot118021XGrpPrivacy, -+ psecpriv->dot11PrivacyAlgrthm); -+ -+ if (!(ppwrpriv->wowlan_pno_enable)) { -+ if (!no_wake) -+ rtw_hal_set_disconnect_decision_cmd(padapter, -+ enable); -+#ifdef CONFIG_ARP_KEEP_ALIVE -+ if ((psecpriv->dot11PrivacyAlgrthm == _WEP40_) || -+ (psecpriv->dot11PrivacyAlgrthm == _WEP104_)) -+ pkt_type = 0; -+ else -+ pkt_type = 1; -+#else -+ pkt_type = 0; -+#endif /* CONFIG_ARP_KEEP_ALIVE */ -+ if(!no_wake) { -+ #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ rtw_hal_set_keep_alive_pattern_cmd(padapter,enable); -+ #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ rtw_hal_set_keep_alive_cmd(padapter, enable, pkt_type); -+ } -+ } -+#ifdef CONFIG_PNO_SUPPORT -+ rtw_hal_check_pno_enabled(padapter); -+#endif /* CONFIG_PNO_SUPPORT */ -+#ifdef CONFIG_WAR_OFFLOAD -+ rtw_hal_set_war_offload_ctrl_cmd(padapter, enable); -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+ } else { -+#if 0 -+ { -+ u32 PageSize = 0; -+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize); -+ dump_TX_FIFO(padapter, 4, PageSize); -+ } -+#endif -+ } -+#ifdef CONFIG_CUSTOM_PULSE -+ rtw_hal_set_gpio_custom_cmd(padapter, enable); -+#endif /* CONFIG_CUSTOM_PULSE */ -+ rtw_hal_set_remote_wake_ctrl_cmd(padapter, enable); -+ RTW_PRINT("-%s()-\n", __func__); -+} -+#endif /* CONFIG_WOWLAN */ -+ -+#ifdef CONFIG_AP_WOWLAN -+static u8 rtw_hal_set_ap_wowlan_ctrl_cmd(_adapter *adapter, u8 enable) -+{ -+ struct pwrctrl_priv *ppwrpriv = adapter_to_pwrctl(adapter); -+ -+ u8 u1H2CAPWoWlanCtrlParm[H2C_AP_WOW_GPIO_CTRL_LEN] = {0}; -+ u8 gpionum = 0, gpio_dur = 0; -+ u8 gpio_pulse = enable; -+ u8 sdio_wakeup_enable = 1; -+ u8 gpio_high_active = 0; -+ u8 ret = _FAIL; -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ gpio_high_active = ppwrpriv->is_high_active; -+ gpionum = ppwrpriv->wowlan_gpio_index; -+ sdio_wakeup_enable = 0; -+#endif /*CONFIG_GPIO_WAKEUP*/ -+ -+ RTW_INFO("%s(): enable=%d\n", __func__, enable); -+ -+ SET_H2CCMD_AP_WOW_GPIO_CTRL_INDEX(u1H2CAPWoWlanCtrlParm, -+ gpionum); -+ SET_H2CCMD_AP_WOW_GPIO_CTRL_PLUS(u1H2CAPWoWlanCtrlParm, -+ gpio_pulse); -+ SET_H2CCMD_AP_WOW_GPIO_CTRL_HIGH_ACTIVE(u1H2CAPWoWlanCtrlParm, -+ gpio_high_active); -+ SET_H2CCMD_AP_WOW_GPIO_CTRL_EN(u1H2CAPWoWlanCtrlParm, -+ enable); -+ SET_H2CCMD_AP_WOW_GPIO_CTRL_DURATION(u1H2CAPWoWlanCtrlParm, -+ gpio_dur); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_AP_WOW_GPIO_CTRL, -+ H2C_AP_WOW_GPIO_CTRL_LEN, -+ u1H2CAPWoWlanCtrlParm); -+ -+ return ret; -+} -+ -+static u8 rtw_hal_set_ap_offload_ctrl_cmd(_adapter *adapter, u8 enable) -+{ -+ u8 u1H2CAPOffloadCtrlParm[H2C_WOWLAN_LEN] = {0}; -+ u8 ret = _FAIL; -+ -+ RTW_INFO("%s(): bFuncEn=%d\n", __func__, enable); -+ -+ SET_H2CCMD_AP_WOWLAN_EN(u1H2CAPOffloadCtrlParm, enable); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_AP_OFFLOAD, -+ H2C_AP_OFFLOAD_LEN, -+ u1H2CAPOffloadCtrlParm); -+ -+ return ret; -+} -+ -+static u8 rtw_hal_set_ap_ps_cmd(_adapter *adapter, u8 enable) -+{ -+ u8 ap_ps_parm[H2C_AP_PS_LEN] = {0}; -+ u8 ret = _FAIL; -+ -+ RTW_INFO("%s(): enable=%d\n" , __func__ , enable); -+ -+ SET_H2CCMD_AP_WOW_PS_EN(ap_ps_parm, enable); -+#ifndef CONFIG_USB_HCI -+ SET_H2CCMD_AP_WOW_PS_32K_EN(ap_ps_parm, enable); -+#endif /*CONFIG_USB_HCI*/ -+ SET_H2CCMD_AP_WOW_PS_RF(ap_ps_parm, enable); -+ -+ if (enable) -+ SET_H2CCMD_AP_WOW_PS_DURATION(ap_ps_parm, 0x32); -+ else -+ SET_H2CCMD_AP_WOW_PS_DURATION(ap_ps_parm, 0x0); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, H2C_SAP_PS_, -+ H2C_AP_PS_LEN, ap_ps_parm); -+ -+ return ret; -+} -+ -+static void rtw_hal_set_ap_rsvdpage_loc_cmd(PADAPTER padapter, -+ PRSVDPAGE_LOC rsvdpageloc) -+{ -+ struct hal_ops *pHalFunc = &padapter->hal_func; -+ u8 rsvdparm[H2C_AOAC_RSVDPAGE_LOC_LEN] = {0}; -+ u8 ret = _FAIL, header = 0; -+ -+ if (pHalFunc->fill_h2c_cmd == NULL) { -+ RTW_INFO("%s: Please hook fill_h2c_cmd first!\n", __func__); -+ return; -+ } -+ -+ header = rtw_read8(padapter, REG_BCNQ_BDNY); -+ -+ RTW_INFO("%s: beacon: %d, probeRsp: %d, header:0x%02x\n", __func__, -+ rsvdpageloc->LocApOffloadBCN, -+ rsvdpageloc->LocProbeRsp, -+ header); -+ -+ SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(rsvdparm, -+ rsvdpageloc->LocApOffloadBCN + header); -+ -+ ret = rtw_hal_fill_h2c_cmd(padapter, H2C_BCN_RSVDPAGE, -+ H2C_BCN_RSVDPAGE_LEN, rsvdparm); -+ -+ if (ret == _FAIL) -+ RTW_INFO("%s: H2C_BCN_RSVDPAGE cmd fail\n", __func__); -+ -+ rtw_msleep_os(10); -+ -+ _rtw_memset(&rsvdparm, 0, sizeof(rsvdparm)); -+ -+ SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp(rsvdparm, -+ rsvdpageloc->LocProbeRsp + header); -+ -+ ret = rtw_hal_fill_h2c_cmd(padapter, H2C_PROBERSP_RSVDPAGE, -+ H2C_PROBERSP_RSVDPAGE_LEN, rsvdparm); -+ -+ if (ret == _FAIL) -+ RTW_INFO("%s: H2C_PROBERSP_RSVDPAGE cmd fail\n", __func__); -+ -+ rtw_msleep_os(10); -+} -+ -+static void rtw_hal_set_fw_ap_wow_related_cmd(_adapter *padapter, u8 enable) -+{ -+ rtw_hal_set_ap_offload_ctrl_cmd(padapter, enable); -+ rtw_hal_set_ap_wowlan_ctrl_cmd(padapter, enable); -+ rtw_hal_set_ap_ps_cmd(padapter, enable); -+} -+ -+static void rtw_hal_ap_wow_enable(_adapter *padapter) -+{ -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct sta_info *psta = NULL; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+#ifdef DBG_CHECK_FW_PS_STATE -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+#endif /*DBG_CHECK_FW_PS_STATE*/ -+ int res; -+ u16 media_status_rpt; -+#ifdef CONFIG_GPIO_WAKEUP -+ u8 val8 = 0; -+#endif -+ -+ RTW_INFO("%s, WOWLAN_AP_ENABLE\n", __func__); -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ pdbgpriv->dbg_enwow_dload_fw_fail_cnt++; -+ RTW_PRINT("wowlan enable no leave 32k\n"); -+ } -+#endif /*DBG_CHECK_FW_PS_STATE*/ -+ -+ /* 1. Download WOWLAN FW*/ -+ rtw_hal_fw_dl(padapter, _TRUE); -+ -+ media_status_rpt = RT_MEDIA_CONNECT; -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, -+ (u8 *)&media_status_rpt); -+ -+ issue_beacon(padapter, 0); -+ -+ rtw_msleep_os(2); -+ #if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(padapter)) -+ rtw_hal_disable_tx_report(padapter); -+ #endif -+ /* RX DMA stop */ -+ res = rtw_hal_pause_rx_dma(padapter); -+ if (res == _FAIL) -+ RTW_PRINT("[WARNING] pause RX DMA fail\n"); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ /* Enable CPWM2 only. */ -+ res = rtw_hal_enable_cpwm2(padapter); -+ if (res == _FAIL) -+ RTW_PRINT("[WARNING] enable cpwm2 fail\n"); -+#endif -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#ifdef CONFIG_RTW_ONE_PIN_GPIO -+ rtw_hal_switch_gpio_wl_ctrl(padapter, pwrpriv->wowlan_gpio_index, _TRUE); -+ rtw_hal_set_input_gpio(padapter, pwrpriv->wowlan_gpio_index); -+#else -+#ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE -+ if (pwrctrlpriv->is_high_active == 0) -+ rtw_hal_set_input_gpio(padapter, pwrpriv->wowlan_gpio_index); -+ else -+ rtw_hal_set_output_gpio(padapter, pwrpriv->wowlan_gpio_index, -+ GPIO_OUTPUT_LOW); -+#else -+ val8 = (pwrpriv->is_high_active == 0) ? 1 : 0; -+ rtw_hal_set_output_gpio(padapter, pwrpriv->wowlan_gpio_index, val8); -+ rtw_hal_switch_gpio_wl_ctrl(padapter, pwrpriv->wowlan_gpio_index, _TRUE); -+ RTW_INFO("%s: set GPIO_%d to OUTPUT %s state in ap wow suspend and %s_ACTIVE.\n", -+ __func__, pwrpriv->wowlan_gpio_index, -+ pwrpriv->wowlan_gpio_output_state ? "HIGH" : "LOW", -+ pwrpriv->is_high_active ? "HIGI" : "LOW"); -+#endif /* CONFIG_WAKEUP_GPIO_INPUT_MODE */ -+#endif /* CONFIG_RTW_ONE_PIN_GPIO */ -+#endif /* CONFIG_GPIO_WAKEUP */ -+ -+ /* 5. Set Enable WOWLAN H2C command. */ -+ RTW_PRINT("Set Enable AP WOWLan cmd\n"); -+ rtw_hal_set_fw_ap_wow_related_cmd(padapter, 1); -+ -+ rtw_write8(padapter, REG_MCUTST_WOWLAN, 0); -+#ifdef CONFIG_USB_HCI -+ rtw_mi_intf_stop(padapter); -+#endif -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) -+ /* Invoid SE0 reset signal during suspending*/ -+ rtw_write8(padapter, REG_RSV_CTRL, 0x20); -+ if (IS_8188F(pHalData->version_id) == FALSE -+ && IS_8188GTV(pHalData->version_id) == FALSE) -+ rtw_write8(padapter, REG_RSV_CTRL, 0x60); -+#endif -+} -+ -+static void rtw_hal_ap_wow_disable(_adapter *padapter) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+#ifdef DBG_CHECK_FW_PS_STATE -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+#endif /*DBG_CHECK_FW_PS_STATE*/ -+ u16 media_status_rpt; -+ -+ RTW_INFO("%s, WOWLAN_AP_DISABLE\n", __func__); -+ /* 1. Read wakeup reason*/ -+ pwrctl->wowlan_wake_reason = rtw_read8(padapter, REG_MCUTST_WOWLAN); -+ -+ RTW_PRINT("wakeup_reason: 0x%02x\n", -+ pwrctl->wowlan_wake_reason); -+ -+ rtw_hal_set_fw_ap_wow_related_cmd(padapter, 0); -+ -+ rtw_msleep_os(2); -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ pdbgpriv->dbg_diswow_dload_fw_fail_cnt++; -+ RTW_PRINT("wowlan enable no leave 32k\n"); -+ } -+#endif /*DBG_CHECK_FW_PS_STATE*/ -+ -+ #if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(padapter)) -+ rtw_hal_enable_tx_report(padapter); -+ #endif -+ -+ rtw_hal_force_enable_rxdma(padapter); -+ -+ rtw_hal_fw_dl(padapter, _FALSE); -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#ifdef CONFIG_RTW_ONE_PIN_GPIO -+ rtw_hal_set_input_gpio(padapter, pwrctl->wowlan_gpio_index); -+#else -+#ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE -+ if (pwrctl->is_high_active == 0) -+ rtw_hal_set_input_gpio(padapter, pwrctl->wowlan_gpio_index); -+ else -+ rtw_hal_set_output_gpio(padapter, pwrctl->wowlan_gpio_index -+ , GPIO_OUTPUT_LOW); -+#else -+ rtw_hal_set_output_gpio(padapter, pwrctl->wowlan_gpio_index, -+ pwrctl->wowlan_gpio_output_state); -+ RTW_INFO("%s: set GPIO_%d to OUTPUT %s state in ap wow resume and %s_ACTIVE.\n", -+ __func__, pwrctl->wowlan_gpio_index, -+ pwrctl->wowlan_gpio_output_state ? "HIGH" : "LOW", -+ pwrctl->is_high_active ? "HIGI" : "LOW"); -+#endif /*CONFIG_WAKEUP_GPIO_INPUT_MODE*/ -+#endif /* CONFIG_RTW_ONE_PIN_GPIO */ -+#endif /* CONFIG_GPIO_WAKEUP */ -+ media_status_rpt = RT_MEDIA_CONNECT; -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, -+ (u8 *)&media_status_rpt); -+ -+ issue_beacon(padapter, 0); -+} -+#endif /*CONFIG_AP_WOWLAN*/ -+ -+#ifdef CONFIG_P2P_WOWLAN -+static int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode) -+{ -+ u8 *ssid_ie; -+ sint ssid_len_ori; -+ int len_diff = 0; -+ -+ ssid_ie = rtw_get_ie(ies, WLAN_EID_SSID, &ssid_len_ori, ies_len); -+ -+ /* RTW_INFO("%s hidden_ssid_mode:%u, ssid_ie:%p, ssid_len_ori:%d\n", __FUNCTION__, hidden_ssid_mode, ssid_ie, ssid_len_ori); */ -+ -+ if (ssid_ie && ssid_len_ori > 0) { -+ switch (hidden_ssid_mode) { -+ case 1: { -+ u8 *next_ie = ssid_ie + 2 + ssid_len_ori; -+ u32 remain_len = 0; -+ -+ remain_len = ies_len - (next_ie - ies); -+ -+ ssid_ie[1] = 0; -+ _rtw_memcpy(ssid_ie + 2, next_ie, remain_len); -+ len_diff -= ssid_len_ori; -+ -+ break; -+ } -+ case 2: -+ _rtw_memset(&ssid_ie[2], 0, ssid_len_ori); -+ break; -+ default: -+ break; -+ } -+ } -+ -+ return len_diff; -+} -+ -+static void rtw_hal_construct_P2PBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) -+{ -+ /* struct xmit_frame *pmgntframe; */ -+ /* struct pkt_attrib *pattrib; */ -+ /* unsigned char *pframe; */ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ unsigned int rate_len; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ u32 pktlen; -+ /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ /* _irqL irqL; -+ * struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ * #endif */ /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ -+ /* for debug */ -+ u8 *dbgbuf = pframe; -+ u8 dbgbufLen = 0, index = 0; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ /* _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); -+ * #endif */ /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); -+ /* pmlmeext->mgnt_seq++; */ -+ set_frame_sub_type(pframe, WIFI_BEACON); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { -+ /* RTW_INFO("ie len=%d\n", cur_network->IELength); */ -+#ifdef CONFIG_P2P -+ /* for P2P : Primary Device Type & Device Name */ -+ u32 wpsielen = 0, insert_len = 0; -+ u8 *wpsie = NULL; -+ wpsie = rtw_get_wps_ie(cur_network->IEs + _FIXED_IE_LENGTH_, cur_network->IELength - _FIXED_IE_LENGTH_, NULL, &wpsielen); -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && wpsie && wpsielen > 0) { -+ uint wps_offset, remainder_ielen; -+ u8 *premainder_ie, *pframe_wscie; -+ -+ wps_offset = (uint)(wpsie - cur_network->IEs); -+ -+ premainder_ie = wpsie + wpsielen; -+ -+ remainder_ielen = cur_network->IELength - wps_offset - wpsielen; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (pmlmepriv->wps_beacon_ie && pmlmepriv->wps_beacon_ie_len > 0) { -+ _rtw_memcpy(pframe, cur_network->IEs, wps_offset); -+ pframe += wps_offset; -+ pktlen += wps_offset; -+ -+ _rtw_memcpy(pframe, pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len); -+ pframe += pmlmepriv->wps_beacon_ie_len; -+ pktlen += pmlmepriv->wps_beacon_ie_len; -+ -+ /* copy remainder_ie to pframe */ -+ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); -+ pframe += remainder_ielen; -+ pktlen += remainder_ielen; -+ } else { -+ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); -+ pframe += cur_network->IELength; -+ pktlen += cur_network->IELength; -+ } -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ pframe_wscie = pframe + wps_offset; -+ _rtw_memcpy(pframe, cur_network->IEs, wps_offset + wpsielen); -+ pframe += (wps_offset + wpsielen); -+ pktlen += (wps_offset + wpsielen); -+ -+ /* now pframe is end of wsc ie, insert Primary Device Type & Device Name */ -+ /* Primary Device Type */ -+ /* Type: */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(WPS_ATTR_PRIMARY_DEV_TYPE); -+ insert_len += 2; -+ -+ /* Length: */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(0x0008); -+ insert_len += 2; -+ -+ /* Value: */ -+ /* Category ID */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(WPS_PDT_CID_MULIT_MEDIA); -+ insert_len += 2; -+ -+ /* OUI */ -+ *(u32 *)(pframe + insert_len) = cpu_to_be32(WPSOUI); -+ insert_len += 4; -+ -+ /* Sub Category ID */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(WPS_PDT_SCID_MEDIA_SERVER); -+ insert_len += 2; -+ -+ -+ /* Device Name */ -+ /* Type: */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); -+ insert_len += 2; -+ -+ /* Length: */ -+ *(u16 *)(pframe + insert_len) = cpu_to_be16(pwdinfo->device_name_len); -+ insert_len += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(pframe + insert_len, pwdinfo->device_name, pwdinfo->device_name_len); -+ insert_len += pwdinfo->device_name_len; -+ -+ -+ /* update wsc ie length */ -+ *(pframe_wscie + 1) = (wpsielen - 2) + insert_len; -+ -+ /* pframe move to end */ -+ pframe += insert_len; -+ pktlen += insert_len; -+ -+ /* copy remainder_ie to pframe */ -+ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); -+ pframe += remainder_ielen; -+ pktlen += remainder_ielen; -+ } -+ } else -+#endif /* CONFIG_P2P */ -+ { -+ int len_diff; -+ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); -+ len_diff = update_hidden_ssid( -+ pframe + _BEACON_IE_OFFSET_ -+ , cur_network->IELength - _BEACON_IE_OFFSET_ -+ , pmlmeinfo->hidden_ssid_mode -+ ); -+ pframe += (cur_network->IELength + len_diff); -+ pktlen += (cur_network->IELength + len_diff); -+ } -+#if 0 -+ { -+ u8 *wps_ie; -+ uint wps_ielen; -+ u8 sr = 0; -+ wps_ie = rtw_get_wps_ie(pmgntframe->buf_addr + TXDESC_OFFSET + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_, -+ pattrib->pktlen - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_, NULL, &wps_ielen); -+ if (wps_ie && wps_ielen > 0) -+ rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8 *)(&sr), NULL); -+ if (sr != 0) -+ set_fwstate(pmlmepriv, WIFI_UNDER_WPS); -+ else -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_WPS); -+ } -+#endif -+#ifdef CONFIG_P2P -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ u32 len; -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (pwdinfo->driver_interface == DRIVER_CFG80211) { -+ len = pmlmepriv->p2p_beacon_ie_len; -+ if (pmlmepriv->p2p_beacon_ie && len > 0) -+ _rtw_memcpy(pframe, pmlmepriv->p2p_beacon_ie, len); -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ len = build_beacon_p2p_ie(pwdinfo, pframe); -+ } -+ -+ pframe += len; -+ pktlen += len; -+ -+ #ifdef CONFIG_WFD -+ len = rtw_append_beacon_wfd_ie(padapter, pframe); -+ pframe += len; -+ pktlen += len; -+ #endif -+ -+ } -+#endif /* CONFIG_P2P */ -+ -+ goto _issue_bcn; -+ -+ } -+ -+ /* below for ad-hoc mode */ -+ -+ /* timestamp will be inserted by hardware */ -+ pframe += 8; -+ pktlen += 8; -+ -+ /* beacon interval: 2 bytes */ -+ -+ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); -+ -+ pframe += 2; -+ pktlen += 2; -+ -+ /* capability info: 2 bytes */ -+ -+ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); -+ -+ pframe += 2; -+ pktlen += 2; -+ -+ /* SSID */ -+ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); -+ -+ /* supported rates... */ -+ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &pktlen); -+ -+ /* DS parameter set */ -+ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); -+ -+ /* if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) */ -+ { -+ u8 erpinfo = 0; -+ u32 ATIMWindow; -+ /* IBSS Parameter Set... */ -+ /* ATIMWindow = cur->Configuration.ATIMWindow; */ -+ ATIMWindow = 0; -+ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); -+ -+ /* ERP IE */ -+ pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pktlen); -+ } -+ -+ -+ /* EXTERNDED SUPPORTED RATE */ -+ if (rate_len > 8) -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); -+ -+ -+ /* todo:HT for adhoc */ -+ -+_issue_bcn: -+ -+ /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ /* pmlmepriv->update_bcn = _FALSE; -+ * -+ * _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); -+ * #endif */ /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ -+ *pLength = pktlen; -+#if 0 -+ /* printf dbg msg */ -+ dbgbufLen = pktlen; -+ RTW_INFO("======> DBG MSG FOR CONSTRAUCT P2P BEACON\n"); -+ -+ for (index = 0; index < dbgbufLen; index++) -+ printk("%x ", *(dbgbuf + index)); -+ -+ printk("\n"); -+ RTW_INFO("<====== DBG MSG FOR CONSTRAUCT P2P BEACON\n"); -+ -+#endif -+} -+ -+static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength) -+{ -+ /* struct xmit_frame *pmgntframe; */ -+ /* struct pkt_attrib *pattrib; */ -+ /* unsigned char *pframe; */ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ unsigned char *mac; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ /* WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); */ -+ u16 beacon_interval = 100; -+ u16 capInfo = 0; -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 wpsie[255] = { 0x00 }; -+ u32 wpsielen = 0, p2pielen = 0; -+ u32 pktlen; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ /* for debug */ -+ u8 *dbgbuf = pframe; -+ u8 dbgbufLen = 0, index = 0; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ mac = adapter_mac_addr(padapter); -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ /* DA filled by FW */ -+ _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); -+ -+ /* Use the device address for BSSID field. */ -+ _rtw_memcpy(pwlanhdr->addr3, mac, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_frame_sub_type(fctrl, WIFI_PROBERSP); -+ -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ pframe += pktlen; -+ -+ -+ /* timestamp will be inserted by hardware */ -+ pframe += 8; -+ pktlen += 8; -+ -+ /* beacon interval: 2 bytes */ -+ _rtw_memcpy(pframe, (unsigned char *) &beacon_interval, 2); -+ pframe += 2; -+ pktlen += 2; -+ -+ /* capability info: 2 bytes */ -+ /* ESS and IBSS bits must be 0 (defined in the 3.1.2.1.1 of WiFi Direct Spec) */ -+ capInfo |= cap_ShortPremble; -+ capInfo |= cap_ShortSlot; -+ -+ _rtw_memcpy(pframe, (unsigned char *) &capInfo, 2); -+ pframe += 2; -+ pktlen += 2; -+ -+ -+ /* SSID */ -+ pframe = rtw_set_ie(pframe, _SSID_IE_, 7, pwdinfo->p2p_wildcard_ssid, &pktlen); -+ -+ /* supported rates... */ -+ /* Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) */ -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pktlen); -+ -+ /* DS parameter set */ -+ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&pwdinfo->listen_channel, &pktlen); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (pmlmepriv->wps_probe_resp_ie != NULL && pmlmepriv->p2p_probe_resp_ie != NULL) { -+ /* WPS IE */ -+ _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len); -+ pktlen += pmlmepriv->wps_probe_resp_ie_len; -+ pframe += pmlmepriv->wps_probe_resp_ie_len; -+ -+ /* P2P IE */ -+ _rtw_memcpy(pframe, pmlmepriv->p2p_probe_resp_ie, pmlmepriv->p2p_probe_resp_ie_len); -+ pktlen += pmlmepriv->p2p_probe_resp_ie_len; -+ pframe += pmlmepriv->p2p_probe_resp_ie_len; -+ } -+ } else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ { -+ -+ /* Todo: WPS IE */ -+ /* Noted by Albert 20100907 */ -+ /* According to the WPS specification, all the WPS attribute is presented by Big Endian. */ -+ -+ wpsielen = 0; -+ /* WPS OUI */ -+ *(u32 *)(wpsie) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* WPS version */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -+ -+ /* WiFi Simple Config State */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_SIMPLE_CONF_STATE); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_WSC_STATE_NOT_CONFIG; /* Not Configured. */ -+ -+ /* Response Type */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_RESP_TYPE); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_RESPONSE_TYPE_8021X; -+ -+ /* UUID-E */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_UUID_E); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0010); -+ wpsielen += 2; -+ -+ /* Value: */ -+ if (pwdinfo->external_uuid == 0) { -+ _rtw_memset(wpsie + wpsielen, 0x0, 16); -+ _rtw_memcpy(wpsie + wpsielen, mac, ETH_ALEN); -+ } else -+ _rtw_memcpy(wpsie + wpsielen, pwdinfo->uuid, 0x10); -+ wpsielen += 0x10; -+ -+ /* Manufacturer */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_MANUFACTURER); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0007); -+ wpsielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(wpsie + wpsielen, "Realtek", 7); -+ wpsielen += 7; -+ -+ /* Model Name */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_MODEL_NAME); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0006); -+ wpsielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(wpsie + wpsielen, "8192CU", 6); -+ wpsielen += 6; -+ -+ /* Model Number */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_MODEL_NUMBER); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = 0x31; /* character 1 */ -+ -+ /* Serial Number */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_SERIAL_NUMBER); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(ETH_ALEN); -+ wpsielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(wpsie + wpsielen, "123456" , ETH_ALEN); -+ wpsielen += ETH_ALEN; -+ -+ /* Primary Device Type */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_PRIMARY_DEV_TYPE); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0008); -+ wpsielen += 2; -+ -+ /* Value: */ -+ /* Category ID */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_CID_MULIT_MEDIA); -+ wpsielen += 2; -+ -+ /* OUI */ -+ *(u32 *)(wpsie + wpsielen) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* Sub Category ID */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_PDT_SCID_MEDIA_SERVER); -+ wpsielen += 2; -+ -+ /* Device Name */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(pwdinfo->device_name_len); -+ wpsielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len); -+ wpsielen += pwdinfo->device_name_len; -+ -+ /* Config Method */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_CONF_METHOD); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0002); -+ wpsielen += 2; -+ -+ /* Value: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(pwdinfo->supported_wps_cm); -+ wpsielen += 2; -+ -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pktlen); -+ -+ -+ p2pielen = build_probe_resp_p2p_ie(pwdinfo, pframe); -+ pframe += p2pielen; -+ pktlen += p2pielen; -+ } -+ -+#ifdef CONFIG_WFD -+ wfdielen = rtw_append_probe_resp_wfd_ie(padapter, pframe); -+ pframe += wfdielen; -+ pktlen += wfdielen; -+#endif -+ -+ *pLength = pktlen; -+ -+#if 0 -+ /* printf dbg msg */ -+ dbgbufLen = pktlen; -+ RTW_INFO("======> DBG MSG FOR CONSTRAUCT P2P Probe Rsp\n"); -+ -+ for (index = 0; index < dbgbufLen; index++) -+ printk("%x ", *(dbgbuf + index)); -+ -+ printk("\n"); -+ RTW_INFO("<====== DBG MSG FOR CONSTRAUCT P2P Probe Rsp\n"); -+#endif -+} -+static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pLength) -+{ -+ struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list); -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_GO_NEGO_RESP; -+ u8 wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 }; -+ u8 p2pielen = 0, i; -+ uint wpsielen = 0; -+ u16 wps_devicepassword_id = 0x0000; -+ uint wps_devicepassword_id_len = 0; -+ u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh; -+ u16 len_channellist_attr = 0; -+ u32 pktlen; -+ u8 dialogToken = 0; -+ -+ /* struct xmit_frame *pmgntframe; */ -+ /* struct pkt_attrib *pattrib; */ -+ /* unsigned char *pframe; */ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ /* WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); */ -+ -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ /* for debug */ -+ u8 *dbgbuf = pframe; -+ u8 dbgbufLen = 0, index = 0; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ /* RA, filled by FW */ -+ _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ pframe += pktlen; -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pktlen)); -+ -+ /* dialog token, filled by FW */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pktlen)); -+ -+ _rtw_memset(wpsie, 0x00, 255); -+ wpsielen = 0; -+ -+ /* WPS Section */ -+ wpsielen = 0; -+ /* WPS OUI */ -+ *(u32 *)(wpsie) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* WPS version */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -+ -+ /* Device Password ID */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_DEVICE_PWID); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0002); -+ wpsielen += 2; -+ -+ /* Value: */ -+ if (wps_devicepassword_id == WPS_DPID_USER_SPEC) -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_DPID_REGISTRAR_SPEC); -+ else if (wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_DPID_USER_SPEC); -+ else -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_DPID_PBC); -+ wpsielen += 2; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pktlen); -+ -+ -+ /* P2P IE Section. */ -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20100908 */ -+ /* According to the P2P Specification, the group negoitation response frame should contain 9 P2P attributes */ -+ /* 1. Status */ -+ /* 2. P2P Capability */ -+ /* 3. Group Owner Intent */ -+ /* 4. Configuration Timeout */ -+ /* 5. Operating Channel */ -+ /* 6. Intended P2P Interface Address */ -+ /* 7. Channel List */ -+ /* 8. Device Info */ -+ /* 9. Group ID ( Only GO ) */ -+ -+ -+ /* ToDo: */ -+ -+ /* P2P Status */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_STATUS; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0001); -+ p2pielen += 2; -+ -+ /* Value, filled by FW */ -+ p2pie[p2pielen++] = 1; -+ -+ /* P2P Capability */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CAPABILITY; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Device Capability Bitmap, 1 byte */ -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) { -+ /* Commented by Albert 2011/03/08 */ -+ /* According to the P2P specification */ -+ /* if the sending device will be client, the P2P Capability should be reserved of group negotation response frame */ -+ p2pie[p2pielen++] = 0; -+ } else { -+ /* Be group owner or meet the error case */ -+ p2pie[p2pielen++] = DMP_P2P_DEVCAP_SUPPORT; -+ } -+ -+ /* Group Capability Bitmap, 1 byte */ -+ if (pwdinfo->persistent_supported) -+ p2pie[p2pielen++] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP; -+ else -+ p2pie[p2pielen++] = P2P_GRPCAP_CROSS_CONN; -+ -+ /* Group Owner Intent */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GO_INTENT; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0001); -+ p2pielen += 2; -+ -+ /* Value: */ -+ if (pwdinfo->peer_intent & 0x01) { -+ /* Peer's tie breaker bit is 1, our tie breaker bit should be 0 */ -+ p2pie[p2pielen++] = (pwdinfo->intent << 1); -+ } else { -+ /* Peer's tie breaker bit is 0, our tie breaker bit should be 1 */ -+ p2pie[p2pielen++] = ((pwdinfo->intent << 1) | BIT(0)); -+ } -+ -+ -+ /* Configuration Timeout */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CONF_TIMEOUT; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P GO */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P Client */ -+ -+ /* Operating Channel */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_OPERATING_CH; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Operating Class */ -+ if (pwdinfo->operating_channel <= 14) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; -+ } else if ((pwdinfo->operating_channel >= 36) && (pwdinfo->operating_channel <= 48)) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x73; -+ } else { -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x7c; -+ } -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = pwdinfo->operating_channel; /* operating channel number */ -+ -+ /* Intended P2P Interface Address */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_INTENDED_IF_ADDR; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* Channel List */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CH_LIST; -+ -+ /* Country String(3) */ -+ /* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */ -+ /* + number of channels in all classes */ -+ len_channellist_attr = 3 -+ + (1 + 1) * (u16)ch_list->reg_classes -+ + get_reg_classes_full_count(ch_list); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_ASOC_STATE)) -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(5 + 1); -+ else -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+ -+#else -+ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+ -+#endif -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Channel Entry List */ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ -+ /* Operating Class */ -+ if (union_ch > 14) { -+ if (union_ch >= 149) -+ p2pie[p2pielen++] = 0x7c; -+ else -+ p2pie[p2pielen++] = 0x73; -+ } else -+ p2pie[p2pielen++] = 0x51; -+ -+ -+ /* Number of Channels */ -+ /* Just support 1 channel and this channel is AP's channel */ -+ p2pie[p2pielen++] = 1; -+ -+ /* Channel List */ -+ p2pie[p2pielen++] = union_ch; -+ } else -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ int i, j; -+ for (j = 0; j < ch_list->reg_classes; j++) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].reg_class; -+ -+ /* Number of Channels */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].channels; -+ -+ /* Channel List */ -+ for (i = 0; i < ch_list->reg_class[j].channels; i++) -+ p2pie[p2pielen++] = ch_list->reg_class[j].channel[i]; -+ } -+ } -+ -+ /* Device Info */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* 21->P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) */ -+ /* + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(21 + pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address */ -+ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* Config Method */ -+ /* This field should be big endian. Noted by P2P specification. */ -+ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(pwdinfo->supported_wps_cm); -+ -+ p2pielen += 2; -+ -+ /* Primary Device Type */ -+ /* Category ID */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_PDT_CID_MULIT_MEDIA); -+ p2pielen += 2; -+ -+ /* OUI */ -+ *(u32 *)(p2pie + p2pielen) = cpu_to_be32(WPSOUI); -+ p2pielen += 4; -+ -+ /* Sub Category ID */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_PDT_SCID_MEDIA_SERVER); -+ p2pielen += 2; -+ -+ /* Number of Secondary Device Types */ -+ p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */ -+ -+ /* Device Name */ -+ /* Type: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); -+ p2pielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_be16(pwdinfo->device_name_len); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len); -+ p2pielen += pwdinfo->device_name_len; -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ /* Group ID Attribute */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GROUP_ID; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN + pwdinfo->nego_ssidlen); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* p2P Device Address */ -+ _rtw_memcpy(p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ /* SSID */ -+ _rtw_memcpy(p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen); -+ p2pielen += pwdinfo->nego_ssidlen; -+ -+ } -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pktlen); -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_nego_resp_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pktlen += wfdielen; -+#endif -+ -+ *pLength = pktlen; -+#if 0 -+ /* printf dbg msg */ -+ dbgbufLen = pktlen; -+ RTW_INFO("======> DBG MSG FOR CONSTRAUCT Nego Rsp\n"); -+ -+ for (index = 0; index < dbgbufLen; index++) -+ printk("%x ", *(dbgbuf + index)); -+ -+ printk("\n"); -+ RTW_INFO("<====== DBG MSG FOR CONSTRAUCT Nego Rsp\n"); -+#endif -+} -+ -+static void rtw_hal_construct_P2PInviteRsp(_adapter *padapter, u8 *pframe, u32 *pLength) -+{ -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_INVIT_RESP; -+ u8 p2pie[255] = { 0x00 }; -+ u8 p2pielen = 0, i; -+ u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0; -+ u16 len_channellist_attr = 0; -+ u32 pktlen; -+ u8 dialogToken = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ /* struct xmit_frame *pmgntframe; */ -+ /* struct pkt_attrib *pattrib; */ -+ /* unsigned char *pframe; */ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ /* for debug */ -+ u8 *dbgbuf = pframe; -+ u8 dbgbufLen = 0, index = 0; -+ -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ /* RA fill by FW */ -+ _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ /* BSSID fill by FW */ -+ _rtw_memset(pwlanhdr->addr3, 0, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pktlen)); -+ -+ /* dialog token, filled by FW */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pktlen)); -+ -+ /* P2P IE Section. */ -+ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2pie[p2pielen++] = 0x50; -+ p2pie[p2pielen++] = 0x6F; -+ p2pie[p2pielen++] = 0x9A; -+ p2pie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20101005 */ -+ /* According to the P2P Specification, the P2P Invitation response frame should contain 5 P2P attributes */ -+ /* 1. Status */ -+ /* 2. Configuration Timeout */ -+ /* 3. Operating Channel ( Only GO ) */ -+ /* 4. P2P Group BSSID ( Only GO ) */ -+ /* 5. Channel List */ -+ -+ /* P2P Status */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_STATUS; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0001); -+ p2pielen += 2; -+ -+ /* Value: filled by FW, defult value is FAIL INFO UNAVAILABLE */ -+ p2pie[p2pielen++] = P2P_STATUS_FAIL_INFO_UNAVAILABLE; -+ -+ /* Configuration Timeout */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CONF_TIMEOUT; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P GO */ -+ p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P Client */ -+ -+ /* due to defult value is FAIL INFO UNAVAILABLE, so the following IE is not needed */ -+#if 0 -+ if (status_code == P2P_STATUS_SUCCESS) { -+ struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list); -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ /* The P2P Invitation request frame asks this Wi-Fi device to be the P2P GO */ -+ /* In this case, the P2P Invitation response frame should carry the two more P2P attributes. */ -+ /* First one is operating channel attribute. */ -+ /* Second one is P2P Group BSSID attribute. */ -+ -+ /* Operating Channel */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_OPERATING_CH; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Operating Class */ -+ p2pie[p2pielen++] = 0x51; /* Copy from SD7 */ -+ -+ /* Channel Number */ -+ p2pie[p2pielen++] = pwdinfo->operating_channel; /* operating channel number */ -+ -+ -+ /* P2P Group BSSID */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_GROUP_BSSID; -+ -+ /* Length: */ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* P2P Device Address for GO */ -+ _rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN); -+ p2pielen += ETH_ALEN; -+ -+ } -+ -+ /* Channel List */ -+ /* Type: */ -+ p2pie[p2pielen++] = P2P_ATTR_CH_LIST; -+ -+ /* Length: */ -+ /* Country String(3) */ -+ /* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */ -+ /* + number of channels in all classes */ -+ len_channellist_attr = 3 -+ + (1 + 1) * (u16)ch_list->reg_classes -+ + get_reg_classes_full_count(ch_list); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(5 + 1); -+ else -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+ -+#else -+ -+ *(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); -+ -+#endif -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Country String */ -+ p2pie[p2pielen++] = 'X'; -+ p2pie[p2pielen++] = 'X'; -+ -+ /* The third byte should be set to 0x04. */ -+ /* Described in the "Operating Channel Attribute" section. */ -+ p2pie[p2pielen++] = 0x04; -+ -+ /* Channel Entry List */ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ -+ /* Operating Class */ -+ if (union_ch > 14) { -+ if (union_ch >= 149) -+ p2pie[p2pielen++] = 0x7c; -+ else -+ p2pie[p2pielen++] = 0x73; -+ -+ } else -+ p2pie[p2pielen++] = 0x51; -+ -+ -+ /* Number of Channels */ -+ /* Just support 1 channel and this channel is AP's channel */ -+ p2pie[p2pielen++] = 1; -+ -+ /* Channel List */ -+ p2pie[p2pielen++] = union_ch; -+ } else -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ int i, j; -+ for (j = 0; j < ch_list->reg_classes; j++) { -+ /* Operating Class */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].reg_class; -+ -+ /* Number of Channels */ -+ p2pie[p2pielen++] = ch_list->reg_class[j].channels; -+ -+ /* Channel List */ -+ for (i = 0; i < ch_list->reg_class[j].channels; i++) -+ p2pie[p2pielen++] = ch_list->reg_class[j].channel[i]; -+ } -+ } -+ } -+#endif -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pktlen); -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_invitation_resp_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pktlen += wfdielen; -+#endif -+ -+ *pLength = pktlen; -+ -+#if 0 -+ /* printf dbg msg */ -+ dbgbufLen = pktlen; -+ RTW_INFO("======> DBG MSG FOR CONSTRAUCT Invite Rsp\n"); -+ -+ for (index = 0; index < dbgbufLen; index++) -+ printk("%x ", *(dbgbuf + index)); -+ -+ printk("\n"); -+ RTW_INFO("<====== DBG MSG FOR CONSTRAUCT Invite Rsp\n"); -+#endif -+} -+ -+ -+static void rtw_hal_construct_P2PProvisionDisRsp(_adapter *padapter, u8 *pframe, u32 *pLength) -+{ -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u8 dialogToken = 0; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_PROVISION_DISC_RESP; -+ u8 wpsie[100] = { 0x00 }; -+ u8 wpsielen = 0; -+ u32 pktlen; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ /* struct xmit_frame *pmgntframe; */ -+ /* struct pkt_attrib *pattrib; */ -+ /* unsigned char *pframe; */ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ /* for debug */ -+ u8 *dbgbuf = pframe; -+ u8 dbgbufLen = 0, index = 0; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ /* RA filled by FW */ -+ _rtw_memset(pwlanhdr->addr1, 0, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pktlen)); -+ /* dialog token, filled by FW */ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pktlen)); -+ -+ wpsielen = 0; -+ /* WPS OUI */ -+ /* *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); */ -+ RTW_PUT_BE32(wpsie, WPSOUI); -+ wpsielen += 4; -+ -+#if 0 -+ /* WPS version */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -+#endif -+ -+ /* Config Method */ -+ /* Type: */ -+ /* *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); */ -+ RTW_PUT_BE16(wpsie + wpsielen, WPS_ATTR_CONF_METHOD); -+ wpsielen += 2; -+ -+ /* Length: */ -+ /* *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); */ -+ RTW_PUT_BE16(wpsie + wpsielen, 0x0002); -+ wpsielen += 2; -+ -+ /* Value: filled by FW, default value is PBC */ -+ /* *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( config_method ); */ -+ RTW_PUT_BE16(wpsie + wpsielen, WPS_CM_PUSH_BUTTON); -+ wpsielen += 2; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pktlen); -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pktlen += wfdielen; -+#endif -+ -+ *pLength = pktlen; -+ -+ /* printf dbg msg */ -+#if 0 -+ dbgbufLen = pktlen; -+ RTW_INFO("======> DBG MSG FOR CONSTRAUCT ProvisionDis Rsp\n"); -+ -+ for (index = 0; index < dbgbufLen; index++) -+ printk("%x ", *(dbgbuf + index)); -+ -+ printk("\n"); -+ RTW_INFO("<====== DBG MSG FOR CONSTRAUCT ProvisionDis Rsp\n"); -+#endif -+} -+ -+u8 rtw_hal_set_FwP2PRsvdPage_cmd(_adapter *adapter, PRSVDPAGE_LOC rsvdpageloc) -+{ -+ u8 u1H2CP2PRsvdPageParm[H2C_P2PRSVDPAGE_LOC_LEN] = {0}; -+ struct hal_ops *pHalFunc = &adapter->hal_func; -+ u8 ret = _FAIL; -+ -+ RTW_INFO("P2PRsvdPageLoc: P2PBeacon=%d P2PProbeRsp=%d NegoRsp=%d InviteRsp=%d PDRsp=%d\n", -+ rsvdpageloc->LocP2PBeacon, rsvdpageloc->LocP2PProbeRsp, -+ rsvdpageloc->LocNegoRsp, rsvdpageloc->LocInviteRsp, -+ rsvdpageloc->LocPDRsp); -+ -+ SET_H2CCMD_RSVDPAGE_LOC_P2P_BCN(u1H2CP2PRsvdPageParm, rsvdpageloc->LocProbeRsp); -+ SET_H2CCMD_RSVDPAGE_LOC_P2P_PROBE_RSP(u1H2CP2PRsvdPageParm, rsvdpageloc->LocPsPoll); -+ SET_H2CCMD_RSVDPAGE_LOC_P2P_NEGO_RSP(u1H2CP2PRsvdPageParm, rsvdpageloc->LocNullData); -+ SET_H2CCMD_RSVDPAGE_LOC_P2P_INVITE_RSP(u1H2CP2PRsvdPageParm, rsvdpageloc->LocQosNull); -+ SET_H2CCMD_RSVDPAGE_LOC_P2P_PD_RSP(u1H2CP2PRsvdPageParm, rsvdpageloc->LocBTQosNull); -+ -+ /* FillH2CCmd8723B(padapter, H2C_8723B_P2P_OFFLOAD_RSVD_PAGE, H2C_P2PRSVDPAGE_LOC_LEN, u1H2CP2PRsvdPageParm); */ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_P2P_OFFLOAD_RSVD_PAGE, -+ H2C_P2PRSVDPAGE_LOC_LEN, -+ u1H2CP2PRsvdPageParm); -+ -+ return ret; -+} -+ -+u8 rtw_hal_set_p2p_wowlan_offload_cmd(_adapter *adapter) -+{ -+ -+ u8 offload_cmd[H2C_P2P_OFFLOAD_LEN] = {0}; -+ struct wifidirect_info *pwdinfo = &(adapter->wdinfo); -+ struct P2P_WoWlan_Offload_t *p2p_wowlan_offload = (struct P2P_WoWlan_Offload_t *)offload_cmd; -+ struct hal_ops *pHalFunc = &adapter->hal_func; -+ u8 ret = _FAIL; -+ -+ _rtw_memset(p2p_wowlan_offload, 0 , sizeof(struct P2P_WoWlan_Offload_t)); -+ RTW_INFO("%s\n", __func__); -+ switch (pwdinfo->role) { -+ case P2P_ROLE_DEVICE: -+ RTW_INFO("P2P_ROLE_DEVICE\n"); -+ p2p_wowlan_offload->role = 0; -+ break; -+ case P2P_ROLE_CLIENT: -+ RTW_INFO("P2P_ROLE_CLIENT\n"); -+ p2p_wowlan_offload->role = 1; -+ break; -+ case P2P_ROLE_GO: -+ RTW_INFO("P2P_ROLE_GO\n"); -+ p2p_wowlan_offload->role = 2; -+ break; -+ default: -+ RTW_INFO("P2P_ROLE_DISABLE\n"); -+ break; -+ } -+ p2p_wowlan_offload->Wps_Config[0] = pwdinfo->supported_wps_cm >> 8; -+ p2p_wowlan_offload->Wps_Config[1] = pwdinfo->supported_wps_cm; -+ offload_cmd = (u8 *)p2p_wowlan_offload; -+ RTW_INFO("p2p_wowlan_offload: %x:%x:%x\n", offload_cmd[0], offload_cmd[1], offload_cmd[2]); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_P2P_OFFLOAD, -+ H2C_P2P_OFFLOAD_LEN, -+ offload_cmd); -+ return ret; -+ -+ /* FillH2CCmd8723B(adapter, H2C_8723B_P2P_OFFLOAD, sizeof(struct P2P_WoWlan_Offload_t), (u8 *)p2p_wowlan_offload); */ -+} -+#endif /* CONFIG_P2P_WOWLAN */ -+ -+void rtw_hal_construct_beacon(_adapter *padapter, -+ u8 *pframe, u32 *pLength) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u32 pktlen; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); -+ /* pmlmeext->mgnt_seq++; */ -+ set_frame_sub_type(pframe, WIFI_BEACON); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ /* timestamp will be inserted by hardware */ -+ pframe += 8; -+ pktlen += 8; -+ -+ /* beacon interval: 2 bytes */ -+ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); -+ -+ pframe += 2; -+ pktlen += 2; -+ -+#if 0 -+ /* capability info: 2 bytes */ -+ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); -+ -+ pframe += 2; -+ pktlen += 2; -+ -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { -+ /* RTW_INFO("ie len=%d\n", cur_network->IELength); */ -+ pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); -+ _rtw_memcpy(pframe, cur_network->IEs + sizeof(NDIS_802_11_FIXED_IEs), pktlen); -+ -+ goto _ConstructBeacon; -+ } -+ -+ /* below for ad-hoc mode */ -+ -+ /* SSID */ -+ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); -+ -+ /* supported rates... */ -+ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &pktlen); -+ -+ /* DS parameter set */ -+ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); -+ -+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { -+ u32 ATIMWindow; -+ /* IBSS Parameter Set... */ -+ /* ATIMWindow = cur->Configuration.ATIMWindow; */ -+ ATIMWindow = 0; -+ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); -+ } -+ -+ -+ /* todo: ERP IE */ -+ -+ -+ /* EXTERNDED SUPPORTED RATE */ -+ if (rate_len > 8) -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); -+ -+ /* todo:HT for adhoc */ -+ -+_ConstructBeacon: -+#endif -+ -+ if ((pktlen + TXDESC_SIZE) > MAX_BEACON_LEN) { -+ RTW_ERR("beacon frame too large ,len(%d,%d)\n", -+ (pktlen + TXDESC_SIZE), MAX_BEACON_LEN); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ *pLength = pktlen; -+ -+ /* RTW_INFO("%s bcn_sz=%d\n", __FUNCTION__, pktlen); */ -+ -+} -+ -+static void rtw_hal_construct_PSPoll(_adapter *padapter, -+ u8 *pframe, u32 *pLength) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u32 pktlen; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ /* Frame control. */ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ SetPwrMgt(fctrl); -+ set_frame_sub_type(pframe, WIFI_PSPOLL); -+ -+ /* AID. */ -+ set_duration(pframe, (pmlmeinfo->aid | 0xc000)); -+ -+ /* BSSID. */ -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ /* TA. */ -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ -+ *pLength = 16; -+} -+ -+ -+#ifdef DBG_FW_DEBUG_MSG_PKT -+void rtw_hal_construct_fw_dbg_msg_pkt( -+ PADAPTER padapter, -+ u8 *pframe, -+ u32 *plength) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u32 pktlen; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &pmlmepriv->cur_network; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ -+ /* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ -+ set_frame_sub_type(pframe, WIFI_DATA); -+ -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ *plength = pktlen; -+} -+#endif /*DBG_FW_DEBUG_MSG_PKT*/ -+ -+void rtw_hal_construct_NullFunctionData( -+ PADAPTER padapter, -+ u8 *pframe, -+ u32 *pLength, -+ u8 bQoS, -+ u8 AC, -+ u8 bEosp, -+ u8 bForcePowerSave) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u32 pktlen; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &pmlmepriv->cur_network; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 *sta_addr = NULL; -+ u8 bssid[ETH_ALEN] = {0}; -+ -+ /* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ if (bForcePowerSave) -+ SetPwrMgt(fctrl); -+ -+ sta_addr = get_my_bssid(&pmlmeinfo->network); -+ if (NULL == sta_addr) { -+ _rtw_memcpy(bssid, adapter_mac_addr(padapter), ETH_ALEN); -+ sta_addr = bssid; -+ } -+ -+ switch (cur_network->network.InfrastructureMode) { -+ case Ndis802_11Infrastructure: -+ SetToDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, sta_addr, ETH_ALEN); -+ break; -+ case Ndis802_11APMode: -+ SetFrDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, sta_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); -+ break; -+ case Ndis802_11IBSS: -+ default: -+ _rtw_memcpy(pwlanhdr->addr1, sta_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ break; -+ } -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_duration(pwlanhdr, 0); -+ -+ if (bQoS == _TRUE) { -+ struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr; -+ -+ set_frame_sub_type(pframe, WIFI_QOS_DATA_NULL); -+ -+ pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos *)pframe; -+ SetPriority(&pwlanqoshdr->qc, AC); -+ SetEOSP(&pwlanqoshdr->qc, bEosp); -+ -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); -+ } else { -+ set_frame_sub_type(pframe, WIFI_DATA_NULL); -+ -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ } -+ -+ *pLength = pktlen; -+} -+ -+void rtw_hal_construct_ProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, -+ BOOLEAN bHideSSID) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u8 *mac, *bssid, *sta_addr; -+ u32 pktlen; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); -+ -+ /*RTW_INFO("%s\n", __FUNCTION__);*/ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ mac = adapter_mac_addr(padapter); -+ bssid = cur_network->MacAddress; -+ sta_addr = get_my_bssid(&pmlmeinfo->network); -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ _rtw_memcpy(pwlanhdr->addr1, sta_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_frame_sub_type(fctrl, WIFI_PROBERSP); -+ -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ pframe += pktlen; -+ -+ if (cur_network->IELength > MAX_IE_SZ) -+ return; -+ -+ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); -+ pframe += cur_network->IELength; -+ pktlen += cur_network->IELength; -+ -+ *pLength = pktlen; -+} -+ -+#ifdef CONFIG_WOWLAN -+static void rtw_hal_append_tkip_mic(PADAPTER padapter, -+ u8 *pframe, u32 offset) -+{ -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct mic_data micdata; -+ struct sta_info *psta = NULL; -+ int res = 0; -+ -+ u8 *payload = (u8 *)(pframe + offset); -+ -+ u8 mic[8]; -+ u8 priority[4] = {0x0}; -+ u8 null_key[16] = {0x0}; -+ -+ RTW_INFO("%s(): Add MIC, offset: %d\n", __func__, offset); -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ psta = rtw_get_stainfo(&padapter->stapriv, -+ get_my_bssid(&(pmlmeinfo->network))); -+ if (psta != NULL) { -+ res = _rtw_memcmp(&psta->dot11tkiptxmickey.skey[0], -+ null_key, 16); -+ if (res == _TRUE) -+ RTW_INFO("%s(): STA dot11tkiptxmickey==0\n", __func__); -+ rtw_secmicsetkey(&micdata, &psta->dot11tkiptxmickey.skey[0]); -+ } -+ -+ rtw_secmicappend(&micdata, pwlanhdr->addr3, 6); /* DA */ -+ -+ rtw_secmicappend(&micdata, pwlanhdr->addr2, 6); /* SA */ -+ -+ priority[0] = 0; -+ -+ rtw_secmicappend(&micdata, &priority[0], 4); -+ -+ rtw_secmicappend(&micdata, payload, 36); /* payload length = 8 + 28 */ -+ -+ rtw_secgetmic(&micdata, &(mic[0])); -+ -+ payload += 36; -+ -+ _rtw_memcpy(payload, &(mic[0]), 8); -+} -+/* -+ * Description: -+ * Construct the ARP response packet to support ARP offload. -+ * */ -+static void rtw_hal_construct_ARPRsp( -+ PADAPTER padapter, -+ u8 *pframe, -+ u32 *pLength, -+ u8 *pIPAddress -+) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u32 pktlen; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ static u8 ARPLLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x08, 0x06}; -+ u8 *pARPRspPkt = pframe; -+ /* for TKIP Cal MIC */ -+ u8 *payload = pframe; -+ u8 EncryptionHeadOverhead = 0, arp_offset = 0; -+ /* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ /* ------------------------------------------------------------------------- */ -+ /* MAC Header. */ -+ /* ------------------------------------------------------------------------- */ -+ SetFrameType(fctrl, WIFI_DATA); -+ /* set_frame_sub_type(fctrl, 0); */ -+ SetToDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_duration(pwlanhdr, 0); -+ /* SET_80211_HDR_FRAME_CONTROL(pARPRspPkt, 0); */ -+ /* SET_80211_HDR_TYPE_AND_SUBTYPE(pARPRspPkt, Type_Data); */ -+ /* SET_80211_HDR_TO_DS(pARPRspPkt, 1); */ -+ /* SET_80211_HDR_ADDRESS1(pARPRspPkt, pMgntInfo->Bssid); */ -+ /* SET_80211_HDR_ADDRESS2(pARPRspPkt, Adapter->CurrentAddress); */ -+ /* SET_80211_HDR_ADDRESS3(pARPRspPkt, pMgntInfo->Bssid); */ -+ -+ /* SET_80211_HDR_DURATION(pARPRspPkt, 0); */ -+ /* SET_80211_HDR_FRAGMENT_SEQUENCE(pARPRspPkt, 0); */ -+#ifdef CONFIG_WAPI_SUPPORT -+ *pLength = sMacHdrLng; -+#else -+ *pLength = 24; -+#endif -+ switch (psecuritypriv->dot11PrivacyAlgrthm) { -+ case _WEP40_: -+ case _WEP104_: -+ EncryptionHeadOverhead = 4; -+ break; -+ case _TKIP_: -+ EncryptionHeadOverhead = 8; -+ break; -+ case _AES_: -+ EncryptionHeadOverhead = 8; -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ EncryptionHeadOverhead = 18; -+ break; -+#endif -+ default: -+ EncryptionHeadOverhead = 0; -+ } -+ -+ if (EncryptionHeadOverhead > 0) { -+ _rtw_memset(&(pframe[*pLength]), 0, EncryptionHeadOverhead); -+ *pLength += EncryptionHeadOverhead; -+ /* SET_80211_HDR_WEP(pARPRspPkt, 1); */ /* Suggested by CCW. */ -+ SetPrivacy(fctrl); -+ } -+ -+ /* ------------------------------------------------------------------------- */ -+ /* Frame Body. */ -+ /* ------------------------------------------------------------------------- */ -+ arp_offset = *pLength; -+ pARPRspPkt = (u8 *)(pframe + arp_offset); -+ payload = pARPRspPkt; /* Get Payload pointer */ -+ /* LLC header */ -+ _rtw_memcpy(pARPRspPkt, ARPLLCHeader, 8); -+ *pLength += 8; -+ -+ /* ARP element */ -+ pARPRspPkt += 8; -+ SET_ARP_HTYPE(pARPRspPkt, 1); -+ SET_ARP_PTYPE(pARPRspPkt, ETH_P_IP); /* IP protocol */ -+ SET_ARP_HLEN(pARPRspPkt, ETH_ALEN); -+ SET_ARP_PLEN(pARPRspPkt, RTW_IP_ADDR_LEN); -+ SET_ARP_OPER(pARPRspPkt, 2); /* ARP response */ -+ SET_ARP_SENDER_MAC_ADDR(pARPRspPkt, adapter_mac_addr(padapter)); -+ SET_ARP_SENDER_IP_ADDR(pARPRspPkt, pIPAddress); -+#ifdef CONFIG_ARP_KEEP_ALIVE -+ if (!is_zero_mac_addr(pmlmepriv->gw_mac_addr)) { -+ SET_ARP_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr); -+ SET_ARP_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip); -+ } else -+#endif -+ { -+ SET_ARP_TARGET_MAC_ADDR(pARPRspPkt, -+ get_my_bssid(&(pmlmeinfo->network))); -+ SET_ARP_TARGET_IP_ADDR(pARPRspPkt, -+ pIPAddress); -+ RTW_INFO("%s Target Mac Addr:" MAC_FMT "\n", __FUNCTION__, -+ MAC_ARG(get_my_bssid(&(pmlmeinfo->network)))); -+ RTW_INFO("%s Target IP Addr" IP_FMT "\n", __FUNCTION__, -+ IP_ARG(pIPAddress)); -+ } -+ -+ *pLength += 28; -+ -+ if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) { -+ if (IS_HARDWARE_TYPE_8188E(padapter) || -+ IS_HARDWARE_TYPE_8812(padapter)) { -+ rtw_hal_append_tkip_mic(padapter, pframe, arp_offset); -+ } -+ *pLength += 8; -+ } -+} -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+/* -+ * Description: -+ * Construct the Keep Alive packet to support specific Keep Alive packet. -+ * */ -+static void rtw_hal_construct_keepalive( PADAPTER padapter, -+ u8 *pframe, -+ u32 *pLength -+){ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u32 pktlen; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ static u8 LLCHeader[6] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00}; -+ u8 *pKeepAlivePkt = pframe; -+ /* for TKIP Cal MIC */ -+ u8 *payload = pframe; -+ u8 EncryptionHeadOverhead = 0, frame_offset = 0; -+ int i; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ RTW_INFO("%s======>\n", __func__); -+ -+ -+ /* ------------------------------------------------------------------------- */ -+ /* MAC Header. */ -+ /* ------------------------------------------------------------------------- */ -+ SetFrameType(fctrl, WIFI_DATA); -+ /* set_frame_sub_type(fctrl, 0); */ -+ SetToDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, pwrpriv->keep_alive_pattern+6, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3,pwrpriv->keep_alive_pattern, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_duration(pwlanhdr, 0); -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ *pLength = sMacHdrLng; -+#else -+ *pLength = 24; -+#endif -+ switch (psecuritypriv->dot11PrivacyAlgrthm) { -+ case _WEP40_: -+ case _WEP104_: -+ EncryptionHeadOverhead = 4; -+ break; -+ case _TKIP_: -+ EncryptionHeadOverhead = 8; -+ break; -+ case _AES_: -+ EncryptionHeadOverhead = 8; -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ EncryptionHeadOverhead = 18; -+ break; -+#endif -+ default: -+ EncryptionHeadOverhead = 0; -+ } -+ -+ if (EncryptionHeadOverhead > 0) { -+ _rtw_memset(&(pframe[*pLength]), 0, EncryptionHeadOverhead); -+ *pLength += EncryptionHeadOverhead; -+ /* SET_80211_HDR_WEP(pARPRspPkt, 1); */ /* Suggested by CCW. */ -+ SetPrivacy(fctrl); -+ } -+ -+ /* ------------------------------------------------------------------------- */ -+ /* Frame Body. */ -+ /* ------------------------------------------------------------------------- */ -+ frame_offset = *pLength; -+ pKeepAlivePkt = (u8 *)(pframe + frame_offset); -+ payload = pKeepAlivePkt; /* Get Payload pointer */ -+ /* LLC header */ -+ _rtw_memcpy(pKeepAlivePkt, LLCHeader, 6); -+ *pLength += 6; -+ -+ /*From protocol type*/ -+ pKeepAlivePkt+=6; -+ -+ _rtw_memcpy(pKeepAlivePkt,pwrpriv->keep_alive_pattern+12,pwrpriv->keep_alive_pattern_len-12); -+ -+ *pLength+=pwrpriv->keep_alive_pattern_len-12; -+ -+ if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) { -+ *pLength += 8; -+ } -+ -+ /* for debug -+ for (i=0; i< (*pLength) ;i++) { -+ RTW_INFO("KA_Pkt[0x%x]=x%0x", i,pKeepAlivePkt[i]); -+ if((i%8) == 7) -+ RTW_INFO("\n"); -+ } -+ */ -+ -+ RTW_INFO("%s <======\n", __func__); -+} -+ -+#endif/*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ -+#ifdef CONFIG_IPV6 -+/* -+ * Description: Neighbor Discovery Offload. -+ */ -+static void rtw_hal_construct_na_message(_adapter *padapter, -+ u8 *pframe, u32 *pLength) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr = NULL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ u32 pktlen = 0; -+ u16 *fctrl = NULL; -+ -+ u8 ns_hdr[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x86, 0xDD}; -+ u8 ipv6_info[4] = {0x60, 0x00, 0x00, 0x00}; -+ u8 ipv6_contx[4] = {0x00, 0x20, 0x3a, 0xff}; -+ u8 icmpv6_hdr[8] = {0x88, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00}; -+ u8 val8 = 0; -+ -+ u8 *p_na_msg = pframe; -+ /* for TKIP Cal MIC */ -+ u8 *payload = pframe; -+ u8 EncryptionHeadOverhead = 0, na_msg_offset = 0; -+ /* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ /* ------------------------------------------------------------------------- */ -+ /* MAC Header. */ -+ /* ------------------------------------------------------------------------- */ -+ SetFrameType(fctrl, WIFI_DATA); -+ SetToDs(fctrl); -+ _rtw_memcpy(pwlanhdr->addr1, -+ get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, -+ adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, -+ get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_duration(pwlanhdr, 0); -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ *pLength = sMacHdrLng; -+#else -+ *pLength = 24; -+#endif -+ switch (psecuritypriv->dot11PrivacyAlgrthm) { -+ case _WEP40_: -+ case _WEP104_: -+ EncryptionHeadOverhead = 4; -+ break; -+ case _TKIP_: -+ EncryptionHeadOverhead = 8; -+ break; -+ case _AES_: -+ EncryptionHeadOverhead = 8; -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ EncryptionHeadOverhead = 18; -+ break; -+#endif -+ default: -+ EncryptionHeadOverhead = 0; -+ } -+ -+ if (EncryptionHeadOverhead > 0) { -+ _rtw_memset(&(pframe[*pLength]), 0, EncryptionHeadOverhead); -+ *pLength += EncryptionHeadOverhead; -+ /* SET_80211_HDR_WEP(pARPRspPkt, 1); */ /* Suggested by CCW. */ -+ SetPrivacy(fctrl); -+ } -+ -+ /* ------------------------------------------------------------------------- */ -+ /* Frame Body. */ -+ /* ------------------------------------------------------------------------- */ -+ na_msg_offset = *pLength; -+ p_na_msg = (u8 *)(pframe + na_msg_offset); -+ payload = p_na_msg; /* Get Payload pointer */ -+ -+ /* LLC header */ -+ val8 = sizeof(ns_hdr); -+ _rtw_memcpy(p_na_msg, ns_hdr, val8); -+ *pLength += val8; -+ p_na_msg += val8; -+ -+ /* IPv6 Header */ -+ /* 1 . Information (4 bytes): 0x60 0x00 0x00 0x00 */ -+ val8 = sizeof(ipv6_info); -+ _rtw_memcpy(p_na_msg, ipv6_info, val8); -+ *pLength += val8; -+ p_na_msg += val8; -+ -+ /* 2 . playload : 0x00 0x20 , NextProt : 0x3a (ICMPv6) HopLim : 0xff */ -+ val8 = sizeof(ipv6_contx); -+ _rtw_memcpy(p_na_msg, ipv6_contx, val8); -+ *pLength += val8; -+ p_na_msg += val8; -+ -+ /* 3 . SA : 16 bytes , DA : 16 bytes ( Fw will filled ) */ -+ _rtw_memset(&(p_na_msg[*pLength]), 0, 32); -+ *pLength += 32; -+ p_na_msg += 32; -+ -+ /* ICMPv6 */ -+ /* 1. Type : 0x88 (NA) -+ * 2. Code : 0x00 -+ * 3. ChechSum : 0x00 0x00 (RSvd) -+ * 4. NAFlag: 0x60 0x00 0x00 0x00 ( Solicited , Override) -+ */ -+ val8 = sizeof(icmpv6_hdr); -+ _rtw_memcpy(p_na_msg, icmpv6_hdr, val8); -+ *pLength += val8; -+ p_na_msg += val8; -+ -+ /* TA: 16 bytes*/ -+ _rtw_memset(&(p_na_msg[*pLength]), 0, 16); -+ *pLength += 16; -+ p_na_msg += 16; -+ -+ /* ICMPv6 Target Link Layer Address */ -+ p_na_msg[0] = 0x02; /* type */ -+ p_na_msg[1] = 0x01; /* len 1 unit of 8 octes */ -+ *pLength += 2; -+ p_na_msg += 2; -+ -+ _rtw_memset(&(p_na_msg[*pLength]), 0, 6); -+ *pLength += 6; -+ p_na_msg += 6; -+ -+ if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) { -+ if (IS_HARDWARE_TYPE_8188E(padapter) || -+ IS_HARDWARE_TYPE_8812(padapter)) { -+ rtw_hal_append_tkip_mic(padapter, pframe, -+ na_msg_offset); -+ } -+ *pLength += 8; -+ } -+} -+/* -+ * Description: Neighbor Discovery Protocol Information. -+ */ -+static void rtw_hal_construct_ndp_info(_adapter *padapter, -+ u8 *pframe, u32 *pLength) -+{ -+ struct mlme_ext_priv *pmlmeext = NULL; -+ struct mlme_ext_info *pmlmeinfo = NULL; -+ struct rtw_ndp_info ndp_info; -+ u8 *pndp_info = pframe; -+ u8 len = sizeof(struct rtw_ndp_info); -+ -+ RTW_INFO("%s: len: %d\n", __func__, len); -+ -+ pmlmeext = &padapter->mlmeextpriv; -+ pmlmeinfo = &pmlmeext->mlmext_info; -+ -+ _rtw_memset(pframe, 0, len); -+ _rtw_memset(&ndp_info, 0, len); -+ -+ ndp_info.enable = 1; -+ ndp_info.check_remote_ip = 0; -+ ndp_info.num_of_target_ip = 1; -+ -+ _rtw_memcpy(&ndp_info.target_link_addr, adapter_mac_addr(padapter), -+ ETH_ALEN); -+ _rtw_memcpy(&ndp_info.target_ipv6_addr, pmlmeinfo->ip6_addr, -+ RTW_IPv6_ADDR_LEN); -+ -+ _rtw_memcpy(pndp_info, &ndp_info, len); -+} -+#endif /* CONFIG_IPV6 */ -+ -+#ifdef CONFIG_PNO_SUPPORT -+static void rtw_hal_construct_ProbeReq(_adapter *padapter, u8 *pframe, -+ u32 *pLength, pno_ssid_t *ssid) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u32 pktlen; -+ unsigned char *mac; -+ unsigned char bssrate[NumRates]; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ int bssrate_len = 0; -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ mac = adapter_mac_addr(padapter); -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); -+ -+ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_frame_sub_type(pframe, WIFI_PROBEREQ); -+ -+ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ pframe += pktlen; -+ -+ if (ssid == NULL) -+ pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &pktlen); -+ else { -+ /* RTW_INFO("%s len:%d\n", ssid->SSID, ssid->SSID_len); */ -+ pframe = rtw_set_ie(pframe, _SSID_IE_, ssid->SSID_len, ssid->SSID, &pktlen); -+ } -+ -+ get_rate_set(padapter, bssrate, &bssrate_len); -+ -+ if (bssrate_len > 8) { -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &pktlen); -+ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &pktlen); -+ } else -+ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &pktlen); -+ -+ *pLength = pktlen; -+} -+ -+static void rtw_hal_construct_PNO_info(_adapter *padapter, -+ u8 *pframe, u32 *pLength) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ int i; -+ -+ u8 *pPnoInfoPkt = pframe; -+ pPnoInfoPkt = (u8 *)(pframe + *pLength); -+ _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_num, 1); -+ -+ pPnoInfoPkt += 1; -+ _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->hidden_ssid_num, 1); -+ -+ pPnoInfoPkt += 3; -+ _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->fast_scan_period, 1); -+ -+ pPnoInfoPkt += 4; -+ _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->fast_scan_iterations, 4); -+ -+ pPnoInfoPkt += 4; -+ _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->slow_scan_period, 4); -+ -+ pPnoInfoPkt += 4; -+ _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_length, MAX_PNO_LIST_COUNT); -+ -+ pPnoInfoPkt += MAX_PNO_LIST_COUNT; -+ _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_cipher_info, MAX_PNO_LIST_COUNT); -+ -+ pPnoInfoPkt += MAX_PNO_LIST_COUNT; -+ _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->ssid_channel_info, MAX_PNO_LIST_COUNT); -+ -+ pPnoInfoPkt += MAX_PNO_LIST_COUNT; -+ _rtw_memcpy(pPnoInfoPkt, &pwrctl->pnlo_info->loc_probe_req, MAX_HIDDEN_AP); -+ -+ pPnoInfoPkt += MAX_HIDDEN_AP; -+ -+ /* -+ SSID is located at 128th Byte in NLO info Page -+ */ -+ -+ *pLength += 128; -+ pPnoInfoPkt = pframe + 128; -+ -+ for (i = 0; i < pwrctl->pnlo_info->ssid_num ; i++) { -+ _rtw_memcpy(pPnoInfoPkt, &pwrctl->pno_ssid_list->node[i].SSID, -+ pwrctl->pnlo_info->ssid_length[i]); -+ *pLength += WLAN_SSID_MAXLEN; -+ pPnoInfoPkt += WLAN_SSID_MAXLEN; -+ } -+} -+ -+static void rtw_hal_construct_ssid_list(_adapter *padapter, -+ u8 *pframe, u32 *pLength) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ u8 *pSSIDListPkt = pframe; -+ int i; -+ -+ pSSIDListPkt = (u8 *)(pframe + *pLength); -+ -+ for (i = 0; i < pwrctl->pnlo_info->ssid_num ; i++) { -+ _rtw_memcpy(pSSIDListPkt, &pwrctl->pno_ssid_list->node[i].SSID, -+ pwrctl->pnlo_info->ssid_length[i]); -+ -+ *pLength += WLAN_SSID_MAXLEN; -+ pSSIDListPkt += WLAN_SSID_MAXLEN; -+ } -+} -+ -+static void rtw_hal_construct_scan_info(_adapter *padapter, -+ u8 *pframe, u32 *pLength) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ u8 *pScanInfoPkt = pframe; -+ int i; -+ -+ pScanInfoPkt = (u8 *)(pframe + *pLength); -+ -+ _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->channel_num, 1); -+ -+ *pLength += 1; -+ pScanInfoPkt += 1; -+ _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_ch, 1); -+ -+ -+ *pLength += 1; -+ pScanInfoPkt += 1; -+ _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_bw, 1); -+ -+ -+ *pLength += 1; -+ pScanInfoPkt += 1; -+ _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_40_offset, 1); -+ -+ *pLength += 1; -+ pScanInfoPkt += 1; -+ _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->orig_80_offset, 1); -+ -+ *pLength += 1; -+ pScanInfoPkt += 1; -+ _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->periodScan, 1); -+ -+ *pLength += 1; -+ pScanInfoPkt += 1; -+ _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->period_scan_time, 1); -+ -+ *pLength += 1; -+ pScanInfoPkt += 1; -+ _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->enableRFE, 1); -+ -+ *pLength += 1; -+ pScanInfoPkt += 1; -+ _rtw_memcpy(pScanInfoPkt, &pwrctl->pscan_info->rfe_type, 8); -+ -+ *pLength += 8; -+ pScanInfoPkt += 8; -+ -+ for (i = 0 ; i < MAX_SCAN_LIST_COUNT ; i++) { -+ _rtw_memcpy(pScanInfoPkt, -+ &pwrctl->pscan_info->ssid_channel_info[i], 4); -+ *pLength += 4; -+ pScanInfoPkt += 4; -+ } -+} -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+#ifdef CONFIG_WAR_OFFLOAD -+#ifdef CONFIG_OFFLOAD_MDNS_V4 -+ -+/* -+ * Description: -+ * Construct the MDNS V4 response packet to support MDNS offload. -+ * -+ */ -+static void rtw_hal_construct_mdns_rsp_v4( -+ PADAPTER padapter, -+ u8 *pframe, -+ u32 *pLength, -+ u8 *pIPAddress -+) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u32 pktlen; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &pmlmepriv->cur_network; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ static u8 ICMPLLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x08, 0x00}; -+ u8 mulicast_ipv4_addr[4] = {0xe0, 0x00, 0x00, 0xfb}; -+ u8 mulicast_mac_addr_for_mdns[6] = {0x01, 0x00, 0x5e, 0x00, 0x00, 0xfb}; -+ u8 *pMdnsRspPkt = pframe; -+ /* for TKIP Cal MIC */ -+ u8 EncryptionHeadOverhead = 0, mdns_offset = 0; -+ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ /* ------------------------------------------------------------------------- */ -+ /* MAC Header. */ -+ /* ------------------------------------------------------------------------- */ -+ SetFrameType(fctrl, WIFI_DATA); -+ /* set_frame_sub_type(fctrl, 0); */ -+ SetToDs(fctrl); -+ //_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, mulicast_mac_addr_for_mdns, ETH_ALEN ); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_duration(pwlanhdr, 0); -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ *pLength = sMacHdrLng; -+#else -+ *pLength = 24; -+#endif -+ switch (psecuritypriv->dot11PrivacyAlgrthm) { -+ case _WEP40_: -+ case _WEP104_: -+ EncryptionHeadOverhead = 4; -+ break; -+ case _TKIP_: -+ EncryptionHeadOverhead = 8; -+ break; -+ case _AES_: -+ EncryptionHeadOverhead = 8; -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ EncryptionHeadOverhead = 18; -+ break; -+#endif -+ default: -+ EncryptionHeadOverhead = 0; -+ } -+ -+ if (EncryptionHeadOverhead > 0) { -+ _rtw_memset(&(pframe[*pLength]), 0, EncryptionHeadOverhead); -+ *pLength += EncryptionHeadOverhead; -+ /* SET_80211_HDR_WEP(pARPRspPkt, 1); */ /* Suggested by CCW. */ -+ SetPrivacy(fctrl); -+ } -+ -+ /* ------------------------------------------------------------------------- */ -+ /* Frame Body. */ -+ /* ------------------------------------------------------------------------- */ -+ mdns_offset = *pLength; -+ pMdnsRspPkt = (u8 *)(pframe + mdns_offset); -+ /* LLC header */ -+ _rtw_memcpy(pMdnsRspPkt, ICMPLLCHeader, 8); -+ *pLength += 8; -+ -+ /* IP element */ -+ pMdnsRspPkt += 8; -+ SET_IPHDR_VERSION(pMdnsRspPkt, 0x45); -+ SET_IPHDR_DSCP(pMdnsRspPkt, 0); -+ SET_IPHDR_TOTAL_LEN(pMdnsRspPkt, 0); // filled by fw -+ SET_IPHDR_IDENTIFIER(pMdnsRspPkt, 0); // filled by fw -+ SET_IPHDR_FLAGS(pMdnsRspPkt, 0x40); -+ SET_IPHDR_FRAG_OFFSET(pMdnsRspPkt, 0); -+ SET_IPHDR_TTL(pMdnsRspPkt, 0x40); -+ SET_IPHDR_PROTOCOL(pMdnsRspPkt, 0x11); // ICMP-UDP -+ SET_IPHDR_HDR_CHECKSUM(pMdnsRspPkt, 0); // filled by fw -+ SET_IPHDR_SRC_IP_ADDR(pMdnsRspPkt, pIPAddress); -+ SET_IPHDR_DST_IP_ADDR(pMdnsRspPkt, mulicast_ipv4_addr); // filled by fw -+ -+ *pLength += 20; -+ -+ if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) { -+ if (IS_HARDWARE_TYPE_8188E(padapter) || -+ IS_HARDWARE_TYPE_8812(padapter)) { -+ rtw_hal_append_tkip_mic(padapter, pframe, mdns_offset); -+ } -+ *pLength += 8; -+ } -+ -+ /* UDP element */ -+ pMdnsRspPkt += 20; -+ SET_UDP_SRC_PORT(pMdnsRspPkt, 0xe914); // MDNS -+ SET_UDP_DST_PORT(pMdnsRspPkt, 0xe914); // MDNS -+ SET_UDP_LEN(pMdnsRspPkt, 0); // filled by fw -+ SET_UDP_CHECKSUM(pMdnsRspPkt, 0); // filled by fw -+ *pLength += 8; -+ -+ /* MDNS Header */ -+ pMdnsRspPkt += 8; -+ SET_MDNS_HDR_FLAG(pMdnsRspPkt, 0x84); -+ *pLength += 12; -+ -+} -+ -+#endif /* CONFIG_OFFLOAD_MDNS_V4 */ -+ -+#ifdef CONFIG_OFFLOAD_MDNS_V6 -+ -+/* -+ * Description: -+ * Construct the MDNS response V6 packet to support MDNS offload. -+ * -+ */ -+static void rtw_hal_construct_mdns_rsp_v6( -+ PADAPTER padapter, -+ u8 *pframe, -+ u32 *pLength, -+ u8 *pIPAddress -+) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u32 pktlen; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &pmlmepriv->cur_network; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ static u8 ICMPLLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x86, 0xDD}; -+ u8 mulicast_ipv6_addr[16] = {0xff, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfb}; -+ u8 mulicast_mac_addr_for_mdns[6] = {0x33, 0x33, 0x00, 0x00, 0x00, 0xfb}; /* could be revise by fw */ -+ u8 *pMdnsRspPkt = pframe; -+ /* for TKIP Cal MIC */ -+ u8 EncryptionHeadOverhead = 0, mdns_offset = 0; -+ /* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */ -+ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ /* ------------------------------------------------------------------------- */ -+ /* MAC Header. */ -+ /* ------------------------------------------------------------------------- */ -+ SetFrameType(fctrl, WIFI_DATA); -+ /* set_frame_sub_type(fctrl, 0); */ -+ SetToDs(fctrl); -+ //_rtw_memcpy(pwlanhdr->addr1, mulicast_mac_addr_for_mdns, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ //_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, mulicast_mac_addr_for_mdns, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_duration(pwlanhdr, 0); -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ *pLength = sMacHdrLng; -+#else -+ *pLength = 24; -+#endif -+ switch (psecuritypriv->dot11PrivacyAlgrthm) { -+ case _WEP40_: -+ case _WEP104_: -+ EncryptionHeadOverhead = 4; -+ break; -+ case _TKIP_: -+ EncryptionHeadOverhead = 8; -+ break; -+ case _AES_: -+ EncryptionHeadOverhead = 8; -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ EncryptionHeadOverhead = 18; -+ break; -+#endif -+ default: -+ EncryptionHeadOverhead = 0; -+ } -+ -+ if (EncryptionHeadOverhead > 0) { -+ _rtw_memset(&(pframe[*pLength]), 0, EncryptionHeadOverhead); -+ *pLength += EncryptionHeadOverhead; -+ SetPrivacy(fctrl); -+ } -+ -+ /* ------------------------------------------------------------------------- */ -+ /* Frame Body. */ -+ /* ------------------------------------------------------------------------- */ -+ mdns_offset = *pLength; -+ pMdnsRspPkt = (u8 *)(pframe + mdns_offset); -+ /* LLC header */ -+ _rtw_memcpy(pMdnsRspPkt, ICMPLLCHeader, 8); -+ *pLength += 8; -+ -+ /* ICMP element */ -+ pMdnsRspPkt += 8; -+ SET_IPHDRV6_VERSION(pMdnsRspPkt, 0x06); -+ SET_IPHDRV6_PAYLOAD_LENGTH(pMdnsRspPkt, 0); // filled by fw -+ SET_IPHDRV6_NEXT_HEADER(pMdnsRspPkt, 0x3A); -+ SET_IPHDRV6_HOP_LIMIT(pMdnsRspPkt, 0xFF); -+ SET_IPHDRV6_SRC_IP_ADDR(pMdnsRspPkt, pIPAddress); // filled by fw -+ SET_IPHDRV6_DST_IP_ADDR(pMdnsRspPkt, mulicast_ipv6_addr); // filled by fw -+ -+ *pLength += 40; -+ -+ if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) { -+ if (IS_HARDWARE_TYPE_8188E(padapter) || -+ IS_HARDWARE_TYPE_8812(padapter)) { -+ rtw_hal_append_tkip_mic(padapter, pframe, mdns_offset); -+ } -+ *pLength += 8; -+ } -+ -+ /* UDP element */ -+ pMdnsRspPkt += 40; -+ SET_UDP_SRC_PORT(pMdnsRspPkt, 0xe914); // SNMP -+ SET_UDP_DST_PORT(pMdnsRspPkt, 0xe914); // SNMP -+ SET_UDP_LEN(pMdnsRspPkt, 0); // filled by fw -+ SET_UDP_CHECKSUM(pMdnsRspPkt, 0); // filled by fw -+ *pLength += 8; -+ -+ /* MDNS Header */ -+ pMdnsRspPkt += 8; -+ SET_MDNS_HDR_FLAG(pMdnsRspPkt, 0x84); -+ *pLength += 12; -+ -+} -+ -+#endif /* CONFIG_OFFLOAD_MDNS_V6 */ -+#endif -+ -+#ifdef CONFIG_GTK_OL -+static void rtw_hal_construct_GTKRsp( -+ PADAPTER padapter, -+ u8 *pframe, -+ u32 *pLength -+) -+{ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ u16 *fctrl; -+ u32 pktlen; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &pmlmepriv->cur_network; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ static u8 LLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x88, 0x8E}; -+ static u8 GTKbody_a[11] = {0x01, 0x03, 0x00, 0x5F, 0x02, 0x03, 0x12, 0x00, 0x10, 0x42, 0x0B}; -+ u8 *pGTKRspPkt = pframe; -+ u8 EncryptionHeadOverhead = 0; -+ /* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ /* ------------------------------------------------------------------------- */ -+ /* MAC Header. */ -+ /* ------------------------------------------------------------------------- */ -+ SetFrameType(fctrl, WIFI_DATA); -+ /* set_frame_sub_type(fctrl, 0); */ -+ SetToDs(fctrl); -+ -+ _rtw_memcpy(pwlanhdr->addr1, -+ get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ _rtw_memcpy(pwlanhdr->addr2, -+ adapter_mac_addr(padapter), ETH_ALEN); -+ -+ _rtw_memcpy(pwlanhdr->addr3, -+ get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, 0); -+ set_duration(pwlanhdr, 0); -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ *pLength = sMacHdrLng; -+#else -+ *pLength = 24; -+#endif /* CONFIG_WAPI_SUPPORT */ -+ -+ /* ------------------------------------------------------------------------- */ -+ /* Security Header: leave space for it if necessary. */ -+ /* ------------------------------------------------------------------------- */ -+ switch (psecuritypriv->dot11PrivacyAlgrthm) { -+ case _WEP40_: -+ case _WEP104_: -+ EncryptionHeadOverhead = 4; -+ break; -+ case _TKIP_: -+ EncryptionHeadOverhead = 8; -+ break; -+ case _AES_: -+ EncryptionHeadOverhead = 8; -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ EncryptionHeadOverhead = 18; -+ break; -+#endif /* CONFIG_WAPI_SUPPORT */ -+ default: -+ EncryptionHeadOverhead = 0; -+ } -+ -+ if (EncryptionHeadOverhead > 0) { -+ _rtw_memset(&(pframe[*pLength]), 0, EncryptionHeadOverhead); -+ *pLength += EncryptionHeadOverhead; -+ /* SET_80211_HDR_WEP(pGTKRspPkt, 1); */ /* Suggested by CCW. */ -+ /* GTK's privacy bit is done by FW */ -+ /* SetPrivacy(fctrl); */ -+ } -+ /* ------------------------------------------------------------------------- */ -+ /* Frame Body. */ -+ /* ------------------------------------------------------------------------- */ -+ pGTKRspPkt = (u8 *)(pframe + *pLength); -+ /* LLC header */ -+ _rtw_memcpy(pGTKRspPkt, LLCHeader, 8); -+ *pLength += 8; -+ -+ /* GTK element */ -+ pGTKRspPkt += 8; -+ -+ /* GTK frame body after LLC, part 1 */ -+ /* TKIP key_length = 32, AES key_length = 16 */ -+ if (psecuritypriv->dot118021XGrpPrivacy == _TKIP_) -+ GTKbody_a[8] = 0x20; -+ -+ /* GTK frame body after LLC, part 1 */ -+ _rtw_memcpy(pGTKRspPkt, GTKbody_a, 11); -+ *pLength += 11; -+ pGTKRspPkt += 11; -+ /* GTK frame body after LLC, part 2 */ -+ _rtw_memset(&(pframe[*pLength]), 0, 88); -+ *pLength += 88; -+ pGTKRspPkt += 88; -+ -+ if (psecuritypriv->dot118021XGrpPrivacy == _TKIP_) -+ *pLength += 8; -+} -+#endif /* CONFIG_GTK_OL */ -+ -+#define PN_2_CCMPH(ch,key_id) ((ch) & 0x000000000000ffff) \ -+ | (((ch) & 0x0000ffffffff0000) << 16) \ -+ | (((key_id) << 30)) \ -+ | BIT(29) -+static void rtw_hal_construct_remote_control_info(_adapter *adapter, -+ u8 *pframe, u32 *pLength) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ struct sta_info *psta; -+ struct stainfo_rxcache *prxcache; -+ u8 cur_dot11rxiv[8], id = 0, tid_id = 0, i = 0; -+ size_t sz = 0, total = 0; -+ u64 ccmp_hdr = 0, tmp_key = 0; -+ -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ -+ if (psta == NULL) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ prxcache = &psta->sta_recvpriv.rxcache; -+ sz = sizeof(cur_dot11rxiv); -+ -+ /* 3 SEC IV * 1 page */ -+ rtw_get_sec_iv(adapter, cur_dot11rxiv, -+ get_my_bssid(&pmlmeinfo->network)); -+ -+ _rtw_memcpy(pframe, cur_dot11rxiv, sz); -+ *pLength += sz; -+ pframe += sz; -+ -+ _rtw_memset(&cur_dot11rxiv, 0, sz); -+ -+ if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) { -+ id = psecuritypriv->dot118021XGrpKeyid; -+ tid_id = prxcache->last_tid; -+ REMOTE_INFO_CTRL_SET_VALD_EN(cur_dot11rxiv, 0xdd); -+ REMOTE_INFO_CTRL_SET_PTK_EN(cur_dot11rxiv, 1); -+ REMOTE_INFO_CTRL_SET_GTK_EN(cur_dot11rxiv, 1); -+ REMOTE_INFO_CTRL_SET_GTK_IDX(cur_dot11rxiv, id); -+ _rtw_memcpy(pframe, cur_dot11rxiv, sz); -+ *pLength += sz; -+ pframe += sz; -+ -+ _rtw_memcpy(pframe, prxcache->iv[tid_id], sz); -+ *pLength += sz; -+ pframe += sz; -+ -+ total = sizeof(psecuritypriv->iv_seq); -+ total /= sizeof(psecuritypriv->iv_seq[0]); -+ -+ for (i = 0 ; i < total ; i ++) { -+ ccmp_hdr = -+ le64_to_cpu(*(u64*)psecuritypriv->iv_seq[i]); -+ _rtw_memset(&cur_dot11rxiv, 0, sz); -+ if (ccmp_hdr != 0) { -+ tmp_key = i; -+ ccmp_hdr = PN_2_CCMPH(ccmp_hdr, tmp_key); -+ *(u64*)cur_dot11rxiv = cpu_to_le64(ccmp_hdr); -+ _rtw_memcpy(pframe, cur_dot11rxiv, sz); -+ } -+ *pLength += sz; -+ pframe += sz; -+ } -+ } -+} -+ -+void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, -+ u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len, -+ RSVDPAGE_LOC *rsvd_page_loc) -+{ -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ struct mlme_ext_priv *pmlmeext; -+ struct mlme_ext_info *pmlmeinfo; -+ u32 ARPLength = 0, GTKLength = 0, PNOLength = 0, ScanInfoLength = 0; -+ u32 ProbeReqLength = 0, ns_len = 0, rc_len = 0; -+ u8 CurtPktPageNum = 0; -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ u32 keep_alive_len=0; -+ int i; -+#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN */ -+#ifdef CONFIG_WAR_OFFLOAD -+ u16 tmp_idx = 0; -+ u32 buf_len = 0; -+#endif -+ -+#ifdef CONFIG_GTK_OL -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *psta; -+ struct security_priv *psecpriv = &adapter->securitypriv; -+ u8 kek[RTW_KEK_LEN]; -+ u8 kck[RTW_KCK_LEN]; -+#endif /* CONFIG_GTK_OL */ -+#ifdef CONFIG_PNO_SUPPORT -+ int pno_index; -+ u8 ssid_num; -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+ pmlmeext = &adapter->mlmeextpriv; -+ pmlmeinfo = &pmlmeext->mlmext_info; -+ -+ if (pwrctl->wowlan_pno_enable == _FALSE) { -+ /* ARP RSP * 1 page */ -+ -+ rsvd_page_loc->LocArpRsp = *page_num; -+ -+ RTW_INFO("LocArpRsp: %d\n", rsvd_page_loc->LocArpRsp); -+ -+#ifdef CONFIG_WAR_OFFLOAD -+ if ((0 != pwrctl->wowlan_war_offload_ipv4.ip_addr[0]) && -+ (_FALSE == _rtw_memcmp(&pwrctl->wowlan_war_offload_ipv4.ip_addr[0], pmlmeinfo->ip_addr, 4))) { -+ _rtw_memcpy(pmlmeinfo->ip_addr, &pwrctl->wowlan_war_offload_ipv4.ip_addr[0], 4); -+ RTW_INFO("Update IP(%d.%d.%d.%d) to arp rsvd page\n", -+ pmlmeinfo->ip_addr[0], pmlmeinfo->ip_addr[1], -+ pmlmeinfo->ip_addr[2], pmlmeinfo->ip_addr[3]); -+ } -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+ -+ rtw_hal_construct_ARPRsp(adapter, &pframe[index], -+ &ARPLength, pmlmeinfo->ip_addr); -+ -+ rtw_hal_fill_fake_txdesc(adapter, -+ &pframe[index - tx_desc], -+ ARPLength, _FALSE, _FALSE, _TRUE); -+ -+ CurtPktPageNum = (u8)PageNum(tx_desc + ARPLength, page_size); -+ -+ *page_num += CurtPktPageNum; -+ -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-ARPRsp", CurtPktPageNum, *page_num, 0); -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ /* Keep Alive * ? page*/ -+ if(pwrctl->keep_alive_pattern_len){ -+ rsvd_page_loc->LocKeepAlive = *page_num; -+ pwrctl->keep_alive_pattern_loc = rsvd_page_loc->LocKeepAlive; -+ RTW_INFO("pwrctl->keep_alive_pattern_loc: %d\n", pwrctl->keep_alive_pattern_loc); -+ rtw_hal_construct_keepalive(adapter,&pframe[index],&keep_alive_len); -+ rtw_hal_fill_fake_txdesc(adapter, -+ &pframe[index - tx_desc], -+ keep_alive_len, _FALSE, _FALSE, _TRUE); -+ CurtPktPageNum = (u8)PageNum(tx_desc + keep_alive_len, page_size); -+ *page_num += CurtPktPageNum; -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-KeepAlive:", CurtPktPageNum, *page_num, 0); -+ } -+#endif /* CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ -+#ifdef CONFIG_IPV6 -+ /* 2 NS offload and NDP Info*/ -+ if (pwrctl->wowlan_ns_offload_en == _TRUE) { -+ rsvd_page_loc->LocNbrAdv = *page_num; -+ RTW_INFO("LocNbrAdv: %d\n", rsvd_page_loc->LocNbrAdv); -+ rtw_hal_construct_na_message(adapter, -+ &pframe[index], &ns_len); -+ rtw_hal_fill_fake_txdesc(adapter, -+ &pframe[index - tx_desc], -+ ns_len, _FALSE, -+ _FALSE, _TRUE); -+ CurtPktPageNum = (u8)PageNum(tx_desc + ns_len, -+ page_size); -+ *page_num += CurtPktPageNum; -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-NbrAdv", CurtPktPageNum, *page_num, 0); -+ -+ rsvd_page_loc->LocNDPInfo = *page_num; -+ RTW_INFO("LocNDPInfo: %d\n", -+ rsvd_page_loc->LocNDPInfo); -+ -+ rtw_hal_construct_ndp_info(adapter, -+ &pframe[index - tx_desc], -+ &ns_len); -+ CurtPktPageNum = -+ (u8)PageNum(tx_desc + ns_len, page_size); -+ *page_num += CurtPktPageNum; -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-NDPInfo", CurtPktPageNum, *page_num, 0); -+ -+ } -+#endif /*CONFIG_IPV6*/ -+ /* 3 Remote Control Info. * 1 page */ -+ rsvd_page_loc->LocRemoteCtrlInfo = *page_num; -+ RTW_INFO("LocRemoteCtrlInfo: %d\n", rsvd_page_loc->LocRemoteCtrlInfo); -+ rtw_hal_construct_remote_control_info(adapter, -+ &pframe[index - tx_desc], -+ &rc_len); -+ CurtPktPageNum = (u8)PageNum(rc_len, page_size); -+ *page_num += CurtPktPageNum; -+ *total_pkt_len = index + rc_len; -+ RSVD_PAGE_CFG("WOW-RCI", CurtPktPageNum, *page_num, *total_pkt_len); -+#ifdef CONFIG_GTK_OL -+ index += (CurtPktPageNum * page_size); -+ -+ /* if the ap staion info. exists, get the kek, kck from staion info. */ -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) { -+ _rtw_memset(kek, 0, RTW_KEK_LEN); -+ _rtw_memset(kck, 0, RTW_KCK_LEN); -+ RTW_INFO("%s, KEK, KCK download rsvd page all zero\n", -+ __func__); -+ } else { -+ _rtw_memcpy(kek, psta->kek, RTW_KEK_LEN); -+ _rtw_memcpy(kck, psta->kck, RTW_KCK_LEN); -+ } -+ -+ /* 3 KEK, KCK */ -+ rsvd_page_loc->LocGTKInfo = *page_num; -+ RTW_INFO("LocGTKInfo: %d\n", rsvd_page_loc->LocGTKInfo); -+ -+ if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_8812(adapter)) { -+ struct security_priv *psecpriv = NULL; -+ -+ psecpriv = &adapter->securitypriv; -+ _rtw_memcpy(pframe + index - tx_desc, -+ &psecpriv->dot11PrivacyAlgrthm, 1); -+ _rtw_memcpy(pframe + index - tx_desc + 1, -+ &psecpriv->dot118021XGrpPrivacy, 1); -+ _rtw_memcpy(pframe + index - tx_desc + 2, -+ kck, RTW_KCK_LEN); -+ _rtw_memcpy(pframe + index - tx_desc + 2 + RTW_KCK_LEN, -+ kek, RTW_KEK_LEN); -+ CurtPktPageNum = (u8)PageNum(tx_desc + 2 + RTW_KCK_LEN + RTW_KEK_LEN, page_size); -+ } else { -+ -+ _rtw_memcpy(pframe + index - tx_desc, kck, RTW_KCK_LEN); -+ _rtw_memcpy(pframe + index - tx_desc + RTW_KCK_LEN, -+ kek, RTW_KEK_LEN); -+ GTKLength = tx_desc + RTW_KCK_LEN + RTW_KEK_LEN; -+ -+ if (psta != NULL && -+ psecuritypriv->dot118021XGrpPrivacy == _TKIP_) { -+ _rtw_memcpy(pframe + index - tx_desc + 56, -+ &psta->dot11tkiptxmickey, RTW_TKIP_MIC_LEN); -+ GTKLength += RTW_TKIP_MIC_LEN; -+ } -+ CurtPktPageNum = (u8)PageNum(GTKLength, page_size); -+ } -+#if 0 -+ { -+ int i; -+ printk("\ntoFW KCK: "); -+ for (i = 0; i < 16; i++) -+ printk(" %02x ", kck[i]); -+ printk("\ntoFW KEK: "); -+ for (i = 0; i < 16; i++) -+ printk(" %02x ", kek[i]); -+ printk("\n"); -+ } -+ -+ RTW_INFO("%s(): HW_VAR_SET_TX_CMD: KEK KCK %p %d\n", -+ __FUNCTION__, &pframe[index - tx_desc], -+ (tx_desc + RTW_KCK_LEN + RTW_KEK_LEN)); -+#endif -+ -+ *page_num += CurtPktPageNum; -+ -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-GTKInfo", CurtPktPageNum, *page_num, 0); -+ -+ /* 3 GTK Response */ -+ rsvd_page_loc->LocGTKRsp = *page_num; -+ RTW_INFO("LocGTKRsp: %d\n", rsvd_page_loc->LocGTKRsp); -+ rtw_hal_construct_GTKRsp(adapter, &pframe[index], >KLength); -+ -+ rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc], -+ GTKLength, _FALSE, _FALSE, _TRUE); -+#if 0 -+ { -+ int gj; -+ printk("123GTK pkt=>\n"); -+ for (gj = 0; gj < GTKLength + tx_desc; gj++) { -+ printk(" %02x ", pframe[index - tx_desc + gj]); -+ if ((gj + 1) % 16 == 0) -+ printk("\n"); -+ } -+ printk(" <=end\n"); -+ } -+ -+ RTW_INFO("%s(): HW_VAR_SET_TX_CMD: GTK RSP %p %d\n", -+ __FUNCTION__, &pframe[index - tx_desc], -+ (tx_desc + GTKLength)); -+#endif -+ -+ CurtPktPageNum = (u8)PageNum(tx_desc + GTKLength, page_size); -+ -+ *page_num += CurtPktPageNum; -+ -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-GTKRsp", CurtPktPageNum, *page_num, 0); -+ -+ /* below page is empty for GTK extension memory */ -+ /* 3(11) GTK EXT MEM */ -+ rsvd_page_loc->LocGTKEXTMEM = *page_num; -+ RTW_INFO("LocGTKEXTMEM: %d\n", rsvd_page_loc->LocGTKEXTMEM); -+ CurtPktPageNum = 2; -+ -+ if (page_size >= 256) -+ CurtPktPageNum = 1; -+ -+ *page_num += CurtPktPageNum; -+ /* extension memory for FW */ -+ *total_pkt_len = index + (page_size * CurtPktPageNum); -+ RSVD_PAGE_CFG("WOW-GTKEXTMEM", CurtPktPageNum, *page_num, *total_pkt_len); -+#endif /* CONFIG_GTK_OL */ -+ -+ index += (CurtPktPageNum * page_size); -+ -+#ifdef CONFIG_WAR_OFFLOAD -+ if(_TRUE == pwrctl->wowlan_war_offload_mode) { -+ u8 zero_ary[16] = {0x00}; -+ u8 war_tmp_cnt = 0; -+ -+ /* Reserve 2 page for Ip parameters */ -+ /* First page -+ | Byte 15 -----------Byte 0 | -+ | IP-4 | IP-3 | IP-2 | IP-1 | -+ | location of each feature | mac addr | -+ | NetBIOS name | -+ | location of each feature | -+ Second page -+ | IPv6 - 1 | -+ | IPv6 - 2 | -+ | IPv6 - 3 | -+ | IPv6 - 4 | -+ | IPv6 - 5 | -+ | IPv6 - 6 | -+ | IPv6 - 7 | -+ | IPv6 - 8 | -+ */ -+ -+ /* location of each feature : Byte 22 ~ Byte 31 -+ * Byte22 : location of SNMP RX -+ * Byte23 : location of SNMP V4 -+ * Byte24 : location of SNMP V6 -+ * Byte25 : location of MDNS Param -+ * Byte26 : location of MDNS V4 -+ * Byte27 : location of MDNS V6 -+ * Byte28 : location of SSDP pattern -+ * Byte29 : location of WSD pattern -+ * Byte30 : location of SLP pattern -+ * Byte31 : location of LLMNR -+ */ -+ -+ /* ipv4 : 4 */ -+ if (0 == pwrctl->wowlan_war_offload_ipv4.ip_addr[0]) -+ _rtw_memcpy(&pwrctl->wowlan_war_offload_ipv4.ip_addr[0], pmlmeinfo->ip_addr, 4); -+ for(war_tmp_cnt=0; war_tmp_cnt<4 ;war_tmp_cnt++) -+ _rtw_memcpy(pframe + index - tx_desc + (war_tmp_cnt*4), &pwrctl->wowlan_war_offload_ipv4.ip_addr[war_tmp_cnt], 4); -+ -+ if (is_zero_mac_addr(pwrctl->wowlan_war_offload_mac)) { -+ _rtw_memcpy(pwrctl->wowlan_war_offload_mac, adapter_mac_addr(adapter), 6); -+ } -+ _rtw_memcpy(pframe + index + 16 - tx_desc, pwrctl->wowlan_war_offload_mac, 6); -+ -+ -+ /* ipv6 : 8 */ -+ if (_TRUE == _rtw_memcmp(pwrctl->wowlan_war_offload_ipv6.ipv6_addr[0], zero_ary, RTW_IPv6_ADDR_LEN)) -+ _rtw_memcpy(pwrctl->wowlan_war_offload_ipv6.ipv6_addr[0], pmlmeinfo->ip6_addr, RTW_IPv6_ADDR_LEN); -+ -+ for(war_tmp_cnt=0; war_tmp_cnt<8 ;war_tmp_cnt++) -+ _rtw_memcpy(pframe + index + page_size - tx_desc + (war_tmp_cnt*16), pwrctl->wowlan_war_offload_ipv6.ipv6_addr[war_tmp_cnt], 16); -+ -+ rsvd_page_loc->LocIpParm = *page_num; -+ -+ tmp_idx = index; -+ CurtPktPageNum = 2; -+ *page_num += CurtPktPageNum; -+ *total_pkt_len = index + (page_size * CurtPktPageNum); -+ index += (CurtPktPageNum * page_size); -+ -+ -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+ if ( (WAR_MDNS_V4_RSP_EN & pwrctl->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V6_RSP_EN & pwrctl->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V4_WAKEUP_EN & pwrctl->wowlan_war_offload_ctrl) || -+ (WAR_MDNS_V6_WAKEUP_EN & pwrctl->wowlan_war_offload_ctrl)) { -+ -+ struct war_mdns_service_info *psinfo = pwrctl->wowlan_war_offload_mdns_service; -+ u8 txt_in_ptr[31]={ 0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -+ 0x00, 0x13, 0x09, 0x74, 0x78, 0x74, 0x76, 0x65, 0x72, 0x73, -+ 0x3d, 0x31, 0x08, 0x71, 0x74, 0x6f, 0x74, 0x61, 0x6c, 0x3d, 0x31}; -+ u16 mdns_offset = index - tx_desc; -+ u8 i = 0; -+ -+ rsvd_page_loc->LocMdnsPara = *page_num; -+ RTW_INFO("LocMdnsPara : %d\n", rsvd_page_loc->LocMdnsPara); -+ -+ /* 1. service info */ -+ pframe[mdns_offset] = 0x01; // TLV(T) -+ mdns_offset += 1; -+ _rtw_memcpy(pframe + mdns_offset, &pwrctl->wowlan_war_offload_mdns_service_info_num, 1); -+ mdns_offset += 1; -+ -+ for(i=0; iwowlan_war_offload_mdns_service_info_num ;i++) -+ { -+ u16 srv_rsp_len = 0; -+ -+ // 1.1 : construct service name string -+ // : length of total service name string (service+transport+domain) -+ pframe[mdns_offset] = psinfo[i].service_len + psinfo[i].transport_len + psinfo[i].domain_len + 4; -+ mdns_offset += 1; -+ -+ // : service name -+ pframe[mdns_offset] = psinfo[i].service_len; -+ mdns_offset += 1; -+ _rtw_memcpy(pframe + mdns_offset, &psinfo[i].service, psinfo[i].service_len); -+ mdns_offset += psinfo[i].service_len; -+ -+ // : transport name -+ pframe[mdns_offset] = psinfo[i].transport_len; -+ mdns_offset += 1; -+ _rtw_memcpy(pframe + mdns_offset, &psinfo[i].transport, psinfo[i].transport_len); -+ mdns_offset += psinfo[i].transport_len; -+ -+ // : domain name -+ pframe[mdns_offset] = psinfo[i].domain_len; -+ mdns_offset += 1; -+ _rtw_memcpy(pframe + mdns_offset, &psinfo[i].domain, psinfo[i].domain_len); -+ mdns_offset += psinfo[i].domain_len; -+ -+ // : delimiter -+ mdns_offset += 1; -+ -+ // 1.2 : construct type srv rsp -+ pframe[mdns_offset] = psinfo[i].target_len + 19; // length -+ pframe[mdns_offset + 2] = 0x21; // rsp type (srv) -+ pframe[mdns_offset + 4] = 0x01; // cache flush + class -+ _rtw_memcpy(pframe + mdns_offset + 5, &psinfo[i].ttl, 4); // ttl -+ pframe[mdns_offset + 5] = (u8) ( (psinfo[i].ttl & 0xff000000) >> 24); // ttl - byte0 -+ pframe[mdns_offset + 6] = (u8) ( (psinfo[i].ttl & 0x00ff0000) >> 16); // ttl - byte1 -+ pframe[mdns_offset + 7] = (u8) ( (psinfo[i].ttl & 0x0000ff00) >> 8 ); // ttl - byte2 -+ pframe[mdns_offset + 8] = (u8) (psinfo[i].ttl & 0x000000ff); // ttl - byte3 -+ pframe[mdns_offset + 10] = psinfo[i].target_len + 9; // data length -+ _rtw_memcpy(pframe + mdns_offset + 15, &psinfo[i].port, 2); // port -+ _rtw_memcpy(pframe + mdns_offset + 17, &psinfo[i].target_len, 1); // target len -+ _rtw_memcpy(pframe + mdns_offset + 18, &psinfo[i].target, psinfo[i].target_len); // target -+ pframe[mdns_offset + 18 + psinfo[i].target_len] = 0xc0; // message compresion, offset will be filled by fw. -+ mdns_offset += (1 + psinfo[i].target_len + 19); -+ -+ // 1.3 : set the idx of txt rsp -+ pframe[mdns_offset] = psinfo[i].txt_rsp_idx; -+ mdns_offset += 1; -+ } -+ -+ /* 2. machine name */ -+ pframe[mdns_offset] = 0x02; // TLV(T) -+ mdns_offset += 1; -+ _rtw_memcpy(pframe + mdns_offset, &pwrctl->wowlan_war_offload_mdns_mnane_num, 1); // NUM -+ mdns_offset += 1; -+ -+ for(i=0; iwowlan_war_offload_mdns_mnane_num; i++) -+ { -+ pframe[mdns_offset] = pwrctl->wowlan_war_offload_mdns_mnane[i].name_len; -+ _rtw_memcpy(pframe + mdns_offset + 1, pwrctl->wowlan_war_offload_mdns_mnane[i].name, -+ pwrctl->wowlan_war_offload_mdns_mnane[i].name_len); // machine name -+ mdns_offset += (1+pwrctl->wowlan_war_offload_mdns_mnane[i].name_len); -+ } -+ -+ /* 3. A rsp */ -+ pframe[mdns_offset] = 0x03; // TLV(T) -+ pframe[mdns_offset + 1] = 14; // TLV(L) -+ pframe[mdns_offset + 3] = 0x01; // rsp type (a) -+ pframe[mdns_offset + 5] = 0x01; // cache flush + class -+ pframe[mdns_offset + 9] = 0xf0; // ttl (240 sec) -+ pframe[mdns_offset + 11] = 4; // length of ipv4 addr. -+ _rtw_memcpy(pframe + mdns_offset + 12, &pwrctl->wowlan_war_offload_ipv4.ip_addr[0], 4); -+ mdns_offset += (2 + 14); -+ -+ /* 4. AAAA rsp */ -+ pframe[mdns_offset] = 0x04; // TLV(T) -+ pframe[mdns_offset + 1] = 26; // TLV(L) -+ pframe[mdns_offset + 3] = 0x1c; // rsp type (aaaa) -+ pframe[mdns_offset + 5] = 0x01; // cache flush + class -+ pframe[mdns_offset + 9] = 0xf0; // ttl (240 sec) -+ pframe[mdns_offset + 11] = 16; // length of ipv6 addr. -+ _rtw_memcpy(pframe + mdns_offset + 12, &pwrctl->wowlan_war_offload_ipv6.ipv6_addr[0], 16); -+ mdns_offset += (2 + 26); -+ -+ /* 5. PTR rsp */ -+ pframe[mdns_offset] = 0x05; // TLV(T) -+ pframe[mdns_offset + 1] = 13 + pwrctl->wowlan_war_offload_mdns_domain_name_len; // TLV(L) -+ pframe[mdns_offset + 3] = 0x0c; // rsp type (aaaa) -+ pframe[mdns_offset + 5] = 0x01; // cache flush + class -+ pframe[mdns_offset + 8] = 0x1c; // ttl -+ pframe[mdns_offset + 9] = 0x20; // ttl (7200 sec) -+ pframe[mdns_offset + 11] = 3 + pwrctl->wowlan_war_offload_mdns_domain_name_len; // data length -+ pframe[mdns_offset + 12] = pwrctl->wowlan_war_offload_mdns_domain_name_len; // domain name length -+ _rtw_memcpy(pframe + mdns_offset + 13, &pwrctl->wowlan_war_offload_mdns_domain_name, -+ pwrctl->wowlan_war_offload_mdns_domain_name_len); -+ pframe[mdns_offset + 13 + pwrctl->wowlan_war_offload_mdns_domain_name_len] = 0xc0; // message compression -+ mdns_offset += (2 + 13 + pwrctl->wowlan_war_offload_mdns_domain_name_len); -+ -+ /* 6. TXT in PTR rsp */ -+ pframe[mdns_offset] = 0x06; // TLV(T) -+ pframe[mdns_offset + 1] = 31; // TLV(L) -+ _rtw_memcpy(pframe + mdns_offset + 2, &txt_in_ptr, 31); -+ mdns_offset += (2 + 31); -+ -+ /* 7. TXT rsp */ -+ pframe[mdns_offset] = 0x07; // TLV(T) -+ mdns_offset += 1; -+ _rtw_memcpy(pframe + mdns_offset, &pwrctl->wowlan_war_offload_mdns_txt_rsp_num, 1); // NUM -+ mdns_offset += 1; -+ -+ for(i=0; iwowlan_war_offload_mdns_txt_rsp_num; i++) -+ { -+ u16 txt_rsp_len = pwrctl->wowlan_war_offload_mdns_txt_rsp[i].txt_len; -+ -+ if(pwrctl->wowlan_war_offload_mdns_txt_rsp[i].txt_len==0) -+ { -+ _rtw_memcpy(pframe + mdns_offset, &txt_rsp_len, 2); -+ mdns_offset += ( 2 + txt_rsp_len ); -+ continue; -+ } -+ -+ txt_rsp_len += 10; -+ _rtw_memcpy(pframe + mdns_offset, &txt_rsp_len, 2); -+ pframe[mdns_offset + 3] = 0x10; // rsp type (txt) -+ pframe[mdns_offset + 5] = 0x01; // cache flush + class -+ pframe[mdns_offset + 8] = 0x1c; // ttl -+ pframe[mdns_offset + 9] = 0x20; // ttl (7200 sec) -+ pframe[mdns_offset + 10] = (u8) ((pwrctl->wowlan_war_offload_mdns_txt_rsp[i].txt_len & 0xff00) >> 8); -+ pframe[mdns_offset + 11] = (u8) (pwrctl->wowlan_war_offload_mdns_txt_rsp[i].txt_len & 0x00ff); -+ _rtw_memcpy(pframe + mdns_offset + 12, &pwrctl->wowlan_war_offload_mdns_txt_rsp[i].txt, -+ pwrctl->wowlan_war_offload_mdns_txt_rsp[i].txt_len); -+ mdns_offset += ( 2 + txt_rsp_len ); -+ } -+ -+ CurtPktPageNum = (u8)PageNum(mdns_offset - index, page_size)+1; -+ *page_num += CurtPktPageNum; -+ *total_pkt_len = index + (page_size * CurtPktPageNum); -+ index += (CurtPktPageNum * page_size); -+ } -+#endif /* defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) */ -+ -+#ifdef CONFIG_OFFLOAD_MDNS_V4 -+ if (WAR_MDNS_V4_RSP_EN & pwrctl->wowlan_war_offload_ctrl) { -+ rsvd_page_loc->LocMdnsv4 = *page_num; -+ RTW_INFO("LocMdnsv4: %d\n", rsvd_page_loc->LocMdnsv4); -+ -+ rtw_hal_construct_mdns_rsp_v4(adapter, &pframe[index], &buf_len, pmlmeinfo->ip_addr); -+ rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc], buf_len, _FALSE, _FALSE, _TRUE); -+ CurtPktPageNum = 16; -+ *page_num += CurtPktPageNum; -+ index += (CurtPktPageNum * page_size); -+ } -+#endif /* CONFIG_OFFLOAD_MDNS_V4 */ -+ -+#ifdef CONFIG_OFFLOAD_MDNS_V6 -+ if (WAR_MDNS_V6_RSP_EN & pwrctl->wowlan_war_offload_ctrl) { -+ rsvd_page_loc->LocMdnsv6 = *page_num; -+ RTW_INFO("LocMdnsv6: %d\n", rsvd_page_loc->LocMdnsv6); -+ -+ rtw_hal_construct_mdns_rsp_v6(adapter, &pframe[index], &buf_len, pmlmeinfo->ip_addr); -+ rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc], buf_len, _FALSE, _FALSE, _TRUE); -+ CurtPktPageNum = 16; -+ *page_num += CurtPktPageNum; -+ index += (CurtPktPageNum * page_size); -+ } -+#endif /* CONFIG_OFFLOAD_MDNS_V6 */ -+ -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+ *(pframe+tmp_idx+25-tx_desc) = rsvd_page_loc->LocMdnsPara; -+ *(pframe+tmp_idx+26-tx_desc) = rsvd_page_loc->LocMdnsv4; -+ *(pframe+tmp_idx+27-tx_desc) = rsvd_page_loc->LocMdnsv6; -+#endif /* defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) */ -+ -+ } -+ //rtw_dump_rsvd_page(RTW_DBGDUMP, adapter, rsvd_page_loc->LocIpParm, 46); -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+ -+ /*Reserve 1 page for AOAC report*/ -+ rsvd_page_loc->LocAOACReport = *page_num; -+ RTW_INFO("LocAOACReport: %d\n", rsvd_page_loc->LocAOACReport); -+ *page_num += 1; -+ *total_pkt_len = index + (page_size * 1); -+ RSVD_PAGE_CFG("WOW-AOAC", 1, *page_num, *total_pkt_len); -+ } else { -+#ifdef CONFIG_PNO_SUPPORT -+ if (pwrctl->wowlan_in_resume == _FALSE && -+ pwrctl->pno_inited == _TRUE) { -+ -+ /* Broadcast Probe Request */ -+ rsvd_page_loc->LocProbePacket = *page_num; -+ -+ RTW_INFO("loc_probe_req: %d\n", -+ rsvd_page_loc->LocProbePacket); -+ -+ rtw_hal_construct_ProbeReq( -+ adapter, -+ &pframe[index], -+ &ProbeReqLength, -+ NULL); -+ -+ rtw_hal_fill_fake_txdesc(adapter, -+ &pframe[index - tx_desc], -+ ProbeReqLength, _FALSE, _FALSE, _FALSE); -+ -+ CurtPktPageNum = -+ (u8)PageNum(tx_desc + ProbeReqLength, page_size); -+ -+ *page_num += CurtPktPageNum; -+ -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-ProbeReq", CurtPktPageNum, *page_num, 0); -+ -+ /* Hidden SSID Probe Request */ -+ ssid_num = pwrctl->pnlo_info->hidden_ssid_num; -+ -+ for (pno_index = 0 ; pno_index < ssid_num ; pno_index++) { -+ pwrctl->pnlo_info->loc_probe_req[pno_index] = -+ *page_num; -+ -+ rtw_hal_construct_ProbeReq( -+ adapter, -+ &pframe[index], -+ &ProbeReqLength, -+ &pwrctl->pno_ssid_list->node[pno_index]); -+ -+ rtw_hal_fill_fake_txdesc(adapter, -+ &pframe[index - tx_desc], -+ ProbeReqLength, _FALSE, _FALSE, _FALSE); -+ -+ CurtPktPageNum = -+ (u8)PageNum(tx_desc + ProbeReqLength, page_size); -+ -+ *page_num += CurtPktPageNum; -+ -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-ProbeReq", CurtPktPageNum, *page_num, 0); -+ } -+ -+ /* PNO INFO Page */ -+ rsvd_page_loc->LocPNOInfo = *page_num; -+ RTW_INFO("LocPNOInfo: %d\n", rsvd_page_loc->LocPNOInfo); -+ rtw_hal_construct_PNO_info(adapter, -+ &pframe[index - tx_desc], -+ &PNOLength); -+ -+ CurtPktPageNum = (u8)PageNum(PNOLength, page_size); -+ *page_num += CurtPktPageNum; -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-PNOInfo", CurtPktPageNum, *page_num, 0); -+ -+ /* Scan Info Page */ -+ rsvd_page_loc->LocScanInfo = *page_num; -+ RTW_INFO("LocScanInfo: %d\n", rsvd_page_loc->LocScanInfo); -+ rtw_hal_construct_scan_info(adapter, -+ &pframe[index - tx_desc], -+ &ScanInfoLength); -+ -+ CurtPktPageNum = (u8)PageNum(ScanInfoLength, page_size); -+ *page_num += CurtPktPageNum; -+ *total_pkt_len = index + ScanInfoLength; -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-ScanInfo", CurtPktPageNum, *page_num, *total_pkt_len); -+ } -+#endif /* CONFIG_PNO_SUPPORT */ -+ } -+} -+ -+static void rtw_hal_gate_bb(_adapter *adapter, bool stop) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ u8 i = 0, val8 = 0, empty = _FAIL; -+ -+ if (stop) { -+ /* checking TX queue status */ -+ for (i = 0 ; i < 5 ; i++) { -+ rtw_hal_get_hwreg(adapter, HW_VAR_CHK_MGQ_CPU_EMPTY, &empty); -+ if (empty) { -+ break; -+ } else { -+ RTW_WARN("%s: MGQ_CPU is busy(%d)!\n", -+ __func__, i); -+ rtw_mdelay_os(10); -+ } -+ } -+ -+ if (val8 == 5) -+ RTW_ERR("%s: Polling MGQ_CPU empty fail!\n", __func__); -+ -+ /* Pause TX*/ -+ pwrpriv->wowlan_txpause_status = rtw_read8(adapter, REG_TXPAUSE); -+ rtw_write8(adapter, REG_TXPAUSE, 0xff); -+ val8 = rtw_read8(adapter, REG_SYS_FUNC_EN); -+ val8 &= ~BIT(0); -+ rtw_write8(adapter, REG_SYS_FUNC_EN, val8); -+ RTW_INFO("%s: BB gated: 0x%02x, store TXPAUSE: %02x\n", -+ __func__, -+ rtw_read8(adapter, REG_SYS_FUNC_EN), -+ pwrpriv->wowlan_txpause_status); -+ } else { -+ val8 = rtw_read8(adapter, REG_SYS_FUNC_EN); -+ val8 |= BIT(0); -+ rtw_write8(adapter, REG_SYS_FUNC_EN, val8); -+ RTW_INFO("%s: BB release: 0x%02x, recover TXPAUSE:%02x\n", -+ __func__, rtw_read8(adapter, REG_SYS_FUNC_EN), -+ pwrpriv->wowlan_txpause_status); -+ /* release TX*/ -+ rtw_write8(adapter, REG_TXPAUSE, pwrpriv->wowlan_txpause_status); -+ } -+} -+ -+static u8 rtw_hal_wow_pattern_generate(_adapter *adapter, u8 idx, struct rtl_wow_pattern *pwow_pattern) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ u8 *pattern; -+ u8 len = 0; -+ u8 *mask; -+ -+ u8 mask_hw[MAX_WKFM_SIZE] = {0}; -+ u8 content[MAX_WKFM_PATTERN_SIZE] = {0}; -+ u8 broadcast_addr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 multicast_addr1[2] = {0x33, 0x33}; -+ u8 multicast_addr2[3] = {0x01, 0x00, 0x5e}; -+ u8 mask_len = 0; -+ u8 mac_addr[ETH_ALEN] = {0}; -+ u16 count = 0; -+ int i; -+ -+ if (pwrctl->wowlan_pattern_idx > MAX_WKFM_CAM_NUM) { -+ RTW_INFO("%s pattern_idx is more than MAX_FMC_NUM: %d\n", -+ __func__, MAX_WKFM_CAM_NUM); -+ return _FAIL; -+ } -+ -+ pattern = pwrctl->patterns[idx].content; -+ len = pwrctl->patterns[idx].len; -+ mask = pwrctl->patterns[idx].mask; -+ -+ _rtw_memcpy(mac_addr, adapter_mac_addr(adapter), ETH_ALEN); -+ _rtw_memset(pwow_pattern, 0, sizeof(struct rtl_wow_pattern)); -+ -+ mask_len = DIV_ROUND_UP(len, 8); -+ -+ /* 1. setup A1 table */ -+ if (memcmp(pattern, broadcast_addr, ETH_ALEN) == 0) -+ pwow_pattern->type = PATTERN_BROADCAST; -+ else if (memcmp(pattern, multicast_addr1, 2) == 0) -+ pwow_pattern->type = PATTERN_MULTICAST; -+ else if (memcmp(pattern, multicast_addr2, 3) == 0) -+ pwow_pattern->type = PATTERN_MULTICAST; -+ else if (memcmp(pattern, mac_addr, ETH_ALEN) == 0) -+ pwow_pattern->type = PATTERN_UNICAST; -+ else -+ pwow_pattern->type = PATTERN_INVALID; -+ -+ /* translate mask from os to mask for hw */ -+ -+ /****************************************************************************** -+ * pattern from OS uses 'ethenet frame', like this: -+ -+ | 6 | 6 | 2 | 20 | Variable | 4 | -+ |--------+--------+------+-----------+------------+-----| -+ | 802.3 Mac Header | IP Header | TCP Packet | FCS | -+ | DA | SA | Type | -+ -+ * BUT, packet catched by our HW is in '802.11 frame', begin from LLC, -+ -+ | 24 or 30 | 6 | 2 | 20 | Variable | 4 | -+ |-------------------+--------+------+-----------+------------+-----| -+ | 802.11 MAC Header | LLC | IP Header | TCP Packet | FCS | -+ | Others | Tpye | -+ -+ * Therefore, we need translate mask_from_OS to mask_to_hw. -+ * We should left-shift mask by 6 bits, then set the new bit[0~5] = 0, -+ * because new mask[0~5] means 'SA', but our HW packet begins from LLC, -+ * bit[0~5] corresponds to first 6 Bytes in LLC, they just don't match. -+ ******************************************************************************/ -+ /* Shift 6 bits */ -+ for (i = 0; i < mask_len - 1; i++) { -+ mask_hw[i] = mask[i] >> 6; -+ mask_hw[i] |= (mask[i + 1] & 0x3F) << 2; -+ } -+ -+ mask_hw[i] = (mask[i] >> 6) & 0x3F; -+ /* Set bit 0-5 to zero */ -+ mask_hw[0] &= 0xC0; -+ -+ for (i = 0; i < (MAX_WKFM_SIZE / 4); i++) { -+ pwow_pattern->mask[i] = mask_hw[i * 4]; -+ pwow_pattern->mask[i] |= (mask_hw[i * 4 + 1] << 8); -+ pwow_pattern->mask[i] |= (mask_hw[i * 4 + 2] << 16); -+ pwow_pattern->mask[i] |= (mask_hw[i * 4 + 3] << 24); -+ } -+ -+ /* To get the wake up pattern from the mask. -+ * We do not count first 12 bits which means -+ * DA[6] and SA[6] in the pattern to match HW design. */ -+ count = 0; -+ for (i = 12; i < len; i++) { -+ if ((mask[i / 8] >> (i % 8)) & 0x01) { -+ content[count] = pattern[i]; -+ count++; -+ } -+ } -+ -+ pwow_pattern->crc = rtw_calc_crc(content, count); -+ -+ if (pwow_pattern->crc != 0) { -+ if (pwow_pattern->type == PATTERN_INVALID) -+ pwow_pattern->type = PATTERN_VALID; -+ } -+ -+ return _SUCCESS; -+} -+ -+void rtw_dump_wow_pattern(void *sel, struct rtl_wow_pattern *pwow_pattern, u8 idx) -+{ -+ int j; -+ -+ RTW_PRINT_SEL(sel, "=======WOW CAM-ID[%d]=======\n", idx); -+ RTW_PRINT_SEL(sel, "[WOW CAM] type:%d\n", pwow_pattern->type); -+ RTW_PRINT_SEL(sel, "[WOW CAM] crc:0x%04x\n", pwow_pattern->crc); -+ for (j = 0; j < 4; j++) -+ RTW_PRINT_SEL(sel, "[WOW CAM] Mask:0x%08x\n", pwow_pattern->mask[j]); -+} -+/*bit definition of pattern match format*/ -+#define WOW_VALID_BIT BIT31 -+#ifndef CONFIG_WOW_PATTERN_IN_TXFIFO -+#define WOW_BC_BIT BIT26 -+#define WOW_MC_BIT BIT25 -+#define WOW_UC_BIT BIT24 -+#else -+#define WOW_BC_BIT BIT18 -+#define WOW_UC_BIT BIT17 -+#define WOW_MC_BIT BIT16 -+#endif /*CONFIG_WOW_PATTERN_IN_TXFIFO*/ -+ -+#ifndef CONFIG_WOW_PATTERN_HW_CAM -+#ifndef CONFIG_WOW_PATTERN_IN_TXFIFO -+static void rtw_hal_reset_mac_rx(_adapter *adapter) -+{ -+ u8 val8 = 0; -+ /* Set REG_CR bit1, bit3, bit7 to 0*/ -+ val8 = rtw_read8(adapter, REG_CR); -+ val8 &= 0x75; -+ rtw_write8(adapter, REG_CR, val8); -+ val8 = rtw_read8(adapter, REG_CR); -+ /* Set REG_CR bit1, bit3, bit7 to 1*/ -+ val8 |= 0x8a; -+ rtw_write8(adapter, REG_CR, val8); -+ RTW_INFO("0x%04x: %02x\n", REG_CR, rtw_read8(adapter, REG_CR)); -+} -+static void rtw_hal_set_wow_rxff_boundary(_adapter *adapter, bool wow_mode) -+{ -+ u8 val8 = 0; -+ u16 rxff_bndy = 0; -+ u32 rx_dma_buff_sz = 0; -+ -+ val8 = rtw_read8(adapter, REG_FIFOPAGE + 3); -+ if (val8 != 0) -+ RTW_INFO("%s:[%04x]some PKTs in TXPKTBUF\n", -+ __func__, (REG_FIFOPAGE + 3)); -+ -+ rtw_hal_reset_mac_rx(adapter); -+ -+ if (wow_mode) { -+ rtw_hal_get_def_var(adapter, HAL_DEF_RX_DMA_SZ_WOW, -+ (u8 *)&rx_dma_buff_sz); -+ rxff_bndy = rx_dma_buff_sz - 1; -+ -+ rtw_write16(adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); -+ RTW_INFO("%s: wow mode, 0x%04x: 0x%04x\n", __func__, -+ REG_TRXFF_BNDY + 2, -+ rtw_read16(adapter, (REG_TRXFF_BNDY + 2))); -+ } else { -+ rtw_hal_get_def_var(adapter, HAL_DEF_RX_DMA_SZ, -+ (u8 *)&rx_dma_buff_sz); -+ rxff_bndy = rx_dma_buff_sz - 1; -+ rtw_write16(adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); -+ RTW_INFO("%s: normal mode, 0x%04x: 0x%04x\n", __func__, -+ REG_TRXFF_BNDY + 2, -+ rtw_read16(adapter, (REG_TRXFF_BNDY + 2))); -+ } -+} -+#endif /* CONFIG_WOW_PATTERN_IN_TXFIFO*/ -+#ifndef CONFIG_WOW_PATTERN_IN_TXFIFO -+bool rtw_read_from_frame_mask(_adapter *adapter, u8 idx) -+{ -+ u32 data_l = 0, data_h = 0, rx_dma_buff_sz = 0, page_sz = 0; -+ u16 offset, rx_buf_ptr = 0; -+ u16 cam_start_offset = 0; -+ u16 ctrl_l = 0, ctrl_h = 0; -+ u8 count = 0, tmp = 0; -+ int i = 0; -+ bool res = _TRUE; -+ -+ if (idx > MAX_WKFM_CAM_NUM) { -+ RTW_INFO("[Error]: %s, pattern index is out of range\n", -+ __func__); -+ return _FALSE; -+ } -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_RX_DMA_SZ_WOW, -+ (u8 *)&rx_dma_buff_sz); -+ -+ if (rx_dma_buff_sz == 0) { -+ RTW_INFO("[Error]: %s, rx_dma_buff_sz is 0!!\n", __func__); -+ return _FALSE; -+ } -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_RX_PAGE_SIZE, (u8 *)&page_sz); -+ -+ if (page_sz == 0) { -+ RTW_INFO("[Error]: %s, page_sz is 0!!\n", __func__); -+ return _FALSE; -+ } -+ -+ offset = (u16)PageNum(rx_dma_buff_sz, page_sz); -+ cam_start_offset = offset * page_sz; -+ -+ ctrl_l = 0x0; -+ ctrl_h = 0x0; -+ -+ /* Enable RX packet buffer access */ -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, RXPKT_BUF_SELECT); -+ -+ /* Read the WKFM CAM */ -+ for (i = 0; i < (WKFMCAM_ADDR_NUM / 2); i++) { -+ /* -+ * Set Rx packet buffer offset. -+ * RxBufer pointer increases 1, we can access 8 bytes in Rx packet buffer. -+ * CAM start offset (unit: 1 byte) = Index*WKFMCAM_SIZE -+ * RxBufer pointer addr = (CAM start offset + per entry offset of a WKFMCAM)/8 -+ * * Index: The index of the wake up frame mask -+ * * WKFMCAM_SIZE: the total size of one WKFM CAM -+ * * per entry offset of a WKFM CAM: Addr i * 4 bytes -+ */ -+ rx_buf_ptr = -+ (cam_start_offset + idx * WKFMCAM_SIZE + i * 8) >> 3; -+ rtw_write16(adapter, REG_PKTBUF_DBG_CTRL, rx_buf_ptr); -+ -+ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_l); -+ data_l = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L); -+ data_h = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H); -+ -+ RTW_INFO("[%d]: %08x %08x\n", i, data_h, data_l); -+ -+ count = 0; -+ -+ do { -+ tmp = rtw_read8(adapter, REG_RXPKTBUF_CTRL); -+ rtw_udelay_os(2); -+ count++; -+ } while (!tmp && count < 100); -+ -+ if (count >= 100) { -+ RTW_INFO("%s count:%d\n", __func__, count); -+ res = _FALSE; -+ } -+ } -+ -+ /* Disable RX packet buffer access */ -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, -+ DISABLE_TRXPKT_BUF_ACCESS); -+ return res; -+} -+ -+bool rtw_write_to_frame_mask(_adapter *adapter, u8 idx, -+ struct rtl_wow_pattern *context) -+{ -+ u32 data = 0, rx_dma_buff_sz = 0, page_sz = 0; -+ u16 offset, rx_buf_ptr = 0; -+ u16 cam_start_offset = 0; -+ u16 ctrl_l = 0, ctrl_h = 0; -+ u8 count = 0, tmp = 0; -+ int res = 0, i = 0; -+ -+ if (idx > MAX_WKFM_CAM_NUM) { -+ RTW_INFO("[Error]: %s, pattern index is out of range\n", -+ __func__); -+ return _FALSE; -+ } -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_RX_DMA_SZ_WOW, -+ (u8 *)&rx_dma_buff_sz); -+ -+ if (rx_dma_buff_sz == 0) { -+ RTW_INFO("[Error]: %s, rx_dma_buff_sz is 0!!\n", __func__); -+ return _FALSE; -+ } -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_RX_PAGE_SIZE, (u8 *)&page_sz); -+ -+ if (page_sz == 0) { -+ RTW_INFO("[Error]: %s, page_sz is 0!!\n", __func__); -+ return _FALSE; -+ } -+ -+ offset = (u16)PageNum(rx_dma_buff_sz, page_sz); -+ -+ cam_start_offset = offset * page_sz; -+ -+ if (IS_HARDWARE_TYPE_8188E(adapter)) { -+ ctrl_l = 0x0001; -+ ctrl_h = 0x0001; -+ } else { -+ ctrl_l = 0x0f01; -+ ctrl_h = 0xf001; -+ } -+ -+ /* Enable RX packet buffer access */ -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, RXPKT_BUF_SELECT); -+ -+ /* Write the WKFM CAM */ -+ for (i = 0; i < WKFMCAM_ADDR_NUM; i++) { -+ /* -+ * Set Rx packet buffer offset. -+ * RxBufer pointer increases 1, we can access 8 bytes in Rx packet buffer. -+ * CAM start offset (unit: 1 byte) = Index*WKFMCAM_SIZE -+ * RxBufer pointer addr = (CAM start offset + per entry offset of a WKFMCAM)/8 -+ * * Index: The index of the wake up frame mask -+ * * WKFMCAM_SIZE: the total size of one WKFM CAM -+ * * per entry offset of a WKFM CAM: Addr i * 4 bytes -+ */ -+ rx_buf_ptr = -+ (cam_start_offset + idx * WKFMCAM_SIZE + i * 4) >> 3; -+ rtw_write16(adapter, REG_PKTBUF_DBG_CTRL, rx_buf_ptr); -+ -+ if (i == 0) { -+ if (context->type == PATTERN_VALID) -+ data = WOW_VALID_BIT; -+ else if (context->type == PATTERN_BROADCAST) -+ data = WOW_VALID_BIT | WOW_BC_BIT; -+ else if (context->type == PATTERN_MULTICAST) -+ data = WOW_VALID_BIT | WOW_MC_BIT; -+ else if (context->type == PATTERN_UNICAST) -+ data = WOW_VALID_BIT | WOW_UC_BIT; -+ -+ if (context->crc != 0) -+ data |= context->crc; -+ -+ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_L, data); -+ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_l); -+ } else if (i == 1) { -+ data = 0; -+ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_H, data); -+ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_h); -+ } else if (i == 2 || i == 4) { -+ data = context->mask[i - 2]; -+ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_L, data); -+ /* write to RX packet buffer*/ -+ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_l); -+ } else if (i == 3 || i == 5) { -+ data = context->mask[i - 2]; -+ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_H, data); -+ /* write to RX packet buffer*/ -+ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_h); -+ } -+ -+ count = 0; -+ do { -+ tmp = rtw_read8(adapter, REG_RXPKTBUF_CTRL); -+ rtw_udelay_os(2); -+ count++; -+ } while (tmp && count < 100); -+ -+ if (count >= 100) -+ res = _FALSE; -+ else -+ res = _TRUE; -+ } -+ -+ /* Disable RX packet buffer access */ -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, -+ DISABLE_TRXPKT_BUF_ACCESS); -+ -+ return res; -+} -+#else /* CONFIG_WOW_PATTERN_IN_TXFIFO */ -+bool rtw_read_from_frame_mask(_adapter *adapter, u8 idx) -+{ -+ u32 data_l = 0, data_h = 0, rx_dma_buff_sz = 0, page_sz = 0; -+ u16 tx_page_start, tx_buf_ptr = 0; -+ u16 cam_start_offset = 0; -+ u16 ctrl_l = 0, ctrl_h = 0; -+ u8 count = 0, tmp = 0, last_entry = 0; -+ int i = 0; -+ bool res = _TRUE; -+ -+ if (idx > MAX_WKFM_CAM_NUM) { -+ RTW_INFO("[Error]: %s, pattern index is out of range\n", -+ __func__); -+ return _FALSE; -+ } -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&page_sz); -+ if (page_sz == 0) { -+ RTW_INFO("[Error]: %s, page_sz is 0!!\n", __func__); -+ return _FALSE; -+ } -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_BUFFER_LAST_ENTRY, (u8 *)&last_entry); -+ if (last_entry == 0) { -+ RTW_INFO("[Error]: %s, last entry of tx buffer is 0!!\n", __func__); -+ return _FALSE; -+ } -+ -+ /* use the last 2 pages for wow pattern e.g. 0xfe and 0xff */ -+ tx_page_start = last_entry - 1; -+ cam_start_offset = tx_page_start * page_sz / 8; -+ ctrl_l = 0x0; -+ ctrl_h = 0x0; -+ -+ /* Enable TX packet buffer access */ -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); -+ -+ /* Read the WKFM CAM */ -+ for (i = 0; i < (WKFMCAM_ADDR_NUM / 2); i++) { -+ /* -+ * Set Tx packet buffer offset. -+ * TxBufer pointer increases 1, we can access 8 bytes in Tx packet buffer. -+ * CAM start offset (unit: 1 byte) = Index*WKFMCAM_SIZE -+ * TxBufer pointer addr = (CAM start offset + per entry offset of a WKFMCAM)/8 -+ * * Index: The index of the wake up frame mask -+ * * WKFMCAM_SIZE: the total size of one WKFM CAM -+ * * per entry offset of a WKFM CAM: Addr i * 4 bytes -+ */ -+ tx_buf_ptr = -+ (cam_start_offset + idx * WKFMCAM_SIZE + i * 8) >> 3; -+ rtw_write16(adapter, REG_PKTBUF_DBG_CTRL, tx_buf_ptr); -+ rtw_write16(adapter, REG_RXPKTBUF_CTRL, ctrl_l); -+ data_l = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L); -+ data_h = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H); -+ -+ RTW_INFO("[%d]: %08x %08x\n", i, data_h, data_l); -+ -+ count = 0; -+ -+ do { -+ tmp = rtw_read32(adapter, REG_PKTBUF_DBG_CTRL) & BIT23; -+ rtw_udelay_os(2); -+ count++; -+ } while (!tmp && count < 100); -+ -+ if (count >= 100) { -+ RTW_INFO("%s count:%d\n", __func__, count); -+ res = _FALSE; -+ } -+ } -+ -+ /* Disable RX packet buffer access */ -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, -+ DISABLE_TRXPKT_BUF_ACCESS); -+ return res; -+} -+ -+bool rtw_write_to_frame_mask(_adapter *adapter, u8 idx, -+ struct rtl_wow_pattern *context) -+{ -+ u32 tx_page_start = 0, page_sz = 0; -+ u16 tx_buf_ptr = 0; -+ u16 cam_start_offset = 0; -+ u32 data_l = 0, data_h = 0; -+ u8 count = 0, tmp = 0, last_entry = 0; -+ int res = 0, i = 0; -+ -+ if (idx > MAX_WKFM_CAM_NUM) { -+ RTW_INFO("[Error]: %s, pattern index is out of range\n", -+ __func__); -+ return _FALSE; -+ } -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&page_sz); -+ if (page_sz == 0) { -+ RTW_INFO("[Error]: %s, page_sz is 0!!\n", __func__); -+ return _FALSE; -+ } -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_BUFFER_LAST_ENTRY, (u8 *)&last_entry); -+ if (last_entry == 0) { -+ RTW_INFO("[Error]: %s, last entry of tx buffer is 0!!\n", __func__); -+ return _FALSE; -+ } -+ -+ /* use the last 2 pages for wow pattern e.g. 0xfe and 0xff */ -+ tx_page_start = last_entry - 1; -+ cam_start_offset = tx_page_start * page_sz / 8; -+ -+ /* Write the PATTERN location to BIT_TXBUF_WKCAM_OFFSET */ -+ rtw_write8(adapter, REG_TXBUF_WKCAM_OFFSET, cam_start_offset & 0xFF); -+ rtw_write8(adapter, REG_TXBUF_WKCAM_OFFSET + 1, (cam_start_offset >> 8) & 0xFF); -+ /* Enable TX packet buffer access */ -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); -+ -+ /* Write the WKFM CAM */ -+ for (i = 0; i < WKFMCAM_ADDR_NUM / 2; i++) { -+ /* -+ * Set Tx packet buffer offset. -+ * TxBufer pointer increases 1, we can access 8 bytes in Rx packet buffer. -+ * CAM start offset (unit: 1 byte) = Index*WKFMCAM_SIZE -+ * TxBufer pointer addr = (CAM start offset + per entry offset of a WKFMCAM)/8 -+ * * Index: The index of the wake up frame mask -+ * * WKFMCAM_SIZE: the total size of one WKFM CAM -+ * * per entry offset of a WKFM CAM: Addr i * 4 bytes -+ */ -+ tx_buf_ptr = cam_start_offset + ((idx * WKFMCAM_SIZE + i * 8) >> 3); -+ -+ if (i == 0) { -+ if (context->type == PATTERN_VALID) -+ data_l = WOW_VALID_BIT; -+ else if (context->type == PATTERN_BROADCAST) -+ data_l = WOW_VALID_BIT | WOW_BC_BIT; -+ else if (context->type == PATTERN_MULTICAST) -+ data_l = WOW_VALID_BIT | WOW_MC_BIT; -+ else if (context->type == PATTERN_UNICAST) -+ data_l = WOW_VALID_BIT | WOW_UC_BIT; -+ -+ if (context->crc != 0) -+ data_l |= context->crc; -+ -+ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_L, data_l); -+ } else { -+ data_l = context->mask[i * 2 - 2]; -+ data_h = context->mask[i * 2 - 1]; -+ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_L, data_l); -+ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_H, data_h); -+ } -+ -+ rtw_write32(adapter, REG_PKTBUF_DBG_CTRL, (tx_buf_ptr & 0x1FFF) | BIT23 | (0xff <<24)); -+ count = 0; -+ do { -+ tmp = rtw_read32(adapter, REG_PKTBUF_DBG_CTRL) & BIT23; -+ rtw_udelay_os(2); -+ count++; -+ } while (tmp && count < 100); -+ -+ if (count >= 100) { -+ res = _FALSE; -+ RTW_INFO("%s write failed\n", __func__); -+ } else { -+ res = _TRUE; -+ RTW_INFO("%s write OK\n", __func__); -+ } -+ } -+ -+ /* Disable TX packet buffer access */ -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS); -+ return res; -+} -+#endif /* CONFIG_WOW_PATTERN_IN_TXFIFO */ -+ -+void rtw_clean_pattern(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ struct rtl_wow_pattern zero_pattern; -+ int i = 0; -+ -+ _rtw_memset(&zero_pattern, 0, sizeof(struct rtl_wow_pattern)); -+ -+ zero_pattern.type = PATTERN_INVALID; -+ -+ for (i = 0; i < MAX_WKFM_CAM_NUM; i++) -+ rtw_write_to_frame_mask(adapter, i, &zero_pattern); -+ -+ rtw_write8(adapter, REG_WKFMCAM_NUM, 0); -+} -+#if 0 -+static int rtw_hal_set_pattern(_adapter *adapter, u8 *pattern, -+ u8 len, u8 *mask, u8 idx) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ struct mlme_ext_priv *pmlmeext = NULL; -+ struct mlme_ext_info *pmlmeinfo = NULL; -+ struct rtl_wow_pattern wow_pattern; -+ u8 mask_hw[MAX_WKFM_SIZE] = {0}; -+ u8 content[MAX_WKFM_PATTERN_SIZE] = {0}; -+ u8 broadcast_addr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 multicast_addr1[2] = {0x33, 0x33}; -+ u8 multicast_addr2[3] = {0x01, 0x00, 0x5e}; -+ u8 res = _FALSE, index = 0, mask_len = 0; -+ u8 mac_addr[ETH_ALEN] = {0}; -+ u16 count = 0; -+ int i, j; -+ -+ if (pwrctl->wowlan_pattern_idx > MAX_WKFM_CAM_NUM) { -+ RTW_INFO("%s pattern_idx is more than MAX_FMC_NUM: %d\n", -+ __func__, MAX_WKFM_CAM_NUM); -+ return _FALSE; -+ } -+ -+ pmlmeext = &adapter->mlmeextpriv; -+ pmlmeinfo = &pmlmeext->mlmext_info; -+ _rtw_memcpy(mac_addr, adapter_mac_addr(adapter), ETH_ALEN); -+ _rtw_memset(&wow_pattern, 0, sizeof(struct rtl_wow_pattern)); -+ -+ mask_len = DIV_ROUND_UP(len, 8); -+ -+ /* 1. setup A1 table */ -+ if (memcmp(pattern, broadcast_addr, ETH_ALEN) == 0) -+ wow_pattern.type = PATTERN_BROADCAST; -+ else if (memcmp(pattern, multicast_addr1, 2) == 0) -+ wow_pattern.type = PATTERN_MULTICAST; -+ else if (memcmp(pattern, multicast_addr2, 3) == 0) -+ wow_pattern.type = PATTERN_MULTICAST; -+ else if (memcmp(pattern, mac_addr, ETH_ALEN) == 0) -+ wow_pattern.type = PATTERN_UNICAST; -+ else -+ wow_pattern.type = PATTERN_INVALID; -+ -+ /* translate mask from os to mask for hw */ -+ -+/****************************************************************************** -+ * pattern from OS uses 'ethenet frame', like this: -+ -+ | 6 | 6 | 2 | 20 | Variable | 4 | -+ |--------+--------+------+-----------+------------+-----| -+ | 802.3 Mac Header | IP Header | TCP Packet | FCS | -+ | DA | SA | Type | -+ -+ * BUT, packet catched by our HW is in '802.11 frame', begin from LLC, -+ -+ | 24 or 30 | 6 | 2 | 20 | Variable | 4 | -+ |-------------------+--------+------+-----------+------------+-----| -+ | 802.11 MAC Header | LLC | IP Header | TCP Packet | FCS | -+ | Others | Tpye | -+ -+ * Therefore, we need translate mask_from_OS to mask_to_hw. -+ * We should left-shift mask by 6 bits, then set the new bit[0~5] = 0, -+ * because new mask[0~5] means 'SA', but our HW packet begins from LLC, -+ * bit[0~5] corresponds to first 6 Bytes in LLC, they just don't match. -+ ******************************************************************************/ -+ /* Shift 6 bits */ -+ for (i = 0; i < mask_len - 1; i++) { -+ mask_hw[i] = mask[i] >> 6; -+ mask_hw[i] |= (mask[i + 1] & 0x3F) << 2; -+ } -+ -+ mask_hw[i] = (mask[i] >> 6) & 0x3F; -+ /* Set bit 0-5 to zero */ -+ mask_hw[0] &= 0xC0; -+ -+ for (i = 0; i < (MAX_WKFM_SIZE / 4); i++) { -+ wow_pattern.mask[i] = mask_hw[i * 4]; -+ wow_pattern.mask[i] |= (mask_hw[i * 4 + 1] << 8); -+ wow_pattern.mask[i] |= (mask_hw[i * 4 + 2] << 16); -+ wow_pattern.mask[i] |= (mask_hw[i * 4 + 3] << 24); -+ } -+ -+ /* To get the wake up pattern from the mask. -+ * We do not count first 12 bits which means -+ * DA[6] and SA[6] in the pattern to match HW design. */ -+ count = 0; -+ for (i = 12; i < len; i++) { -+ if ((mask[i / 8] >> (i % 8)) & 0x01) { -+ content[count] = pattern[i]; -+ count++; -+ } -+ } -+ -+ wow_pattern.crc = rtw_calc_crc(content, count); -+ -+ if (wow_pattern.crc != 0) { -+ if (wow_pattern.type == PATTERN_INVALID) -+ wow_pattern.type = PATTERN_VALID; -+ } -+ -+ index = idx; -+ -+ if (!pwrctl->bInSuspend) -+ index += 2; -+ -+ /* write pattern */ -+ res = rtw_write_to_frame_mask(adapter, index, &wow_pattern); -+ -+ if (res == _FALSE) -+ RTW_INFO("%s: ERROR!! idx: %d write_to_frame_mask_cam fail\n", -+ __func__, idx); -+ -+ return res; -+} -+#endif -+ -+void rtw_fill_pattern(_adapter *adapter) -+{ -+ int i = 0, total = 0, index; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ struct rtl_wow_pattern wow_pattern; -+ -+ total = pwrpriv->wowlan_pattern_idx; -+ -+ if (total > MAX_WKFM_CAM_NUM) -+ total = MAX_WKFM_CAM_NUM; -+ -+ for (i = 0 ; i < total ; i++) { -+ if (_SUCCESS == rtw_hal_wow_pattern_generate(adapter, i, &wow_pattern)) { -+ -+ index = i; -+ if (!pwrpriv->bInSuspend) -+ index += 2; -+ rtw_dump_wow_pattern(RTW_DBGDUMP, &wow_pattern, i); -+ if (rtw_write_to_frame_mask(adapter, index, &wow_pattern) == _FALSE) -+ RTW_INFO("%s: ERROR!! idx: %d write_to_frame_mask_cam fail\n", __func__, i); -+ } -+ -+ } -+ rtw_write8(adapter, REG_WKFMCAM_NUM, total); -+ -+} -+ -+#else /*CONFIG_WOW_PATTERN_HW_CAM*/ -+ -+#define WOW_CAM_ACCESS_TIMEOUT_MS 200 -+static u32 _rtw_wow_pattern_read_cam(_adapter *adapter, u8 addr) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ _mutex *mutex = &pwrpriv->wowlan_pattern_cam_mutex; -+ -+ u32 rdata = 0; -+ u32 cnt = 0; -+ systime start = 0; -+ u8 timeout = 0; -+ u8 rst = _FALSE; -+ -+ _enter_critical_mutex(mutex, NULL); -+ -+ rtw_write32(adapter, REG_WKFMCAM_CMD, BIT_WKFCAM_POLLING_V1 | BIT_WKFCAM_ADDR_V2(addr)); -+ -+ start = rtw_get_current_time(); -+ while (1) { -+ if (rtw_is_surprise_removed(adapter)) -+ break; -+ -+ cnt++; -+ if (0 == (rtw_read32(adapter, REG_WKFMCAM_CMD) & BIT_WKFCAM_POLLING_V1)) { -+ rst = _SUCCESS; -+ break; -+ } -+ if (rtw_get_passing_time_ms(start) > WOW_CAM_ACCESS_TIMEOUT_MS) { -+ timeout = 1; -+ break; -+ } -+ } -+ -+ rdata = rtw_read32(adapter, REG_WKFMCAM_RWD); -+ -+ _exit_critical_mutex(mutex, NULL); -+ -+ /*RTW_INFO("%s ==> addr:0x%02x , rdata:0x%08x\n", __func__, addr, rdata);*/ -+ -+ if (timeout) -+ RTW_ERR(FUNC_ADPT_FMT" failed due to polling timeout\n", FUNC_ADPT_ARG(adapter)); -+ -+ return rdata; -+} -+void rtw_wow_pattern_read_cam_ent(_adapter *adapter, u8 id, struct rtl_wow_pattern *context) -+{ -+ int i; -+ u32 rdata; -+ -+ _rtw_memset(context, 0, sizeof(struct rtl_wow_pattern)); -+ -+ for (i = 4; i >= 0; i--) { -+ rdata = _rtw_wow_pattern_read_cam(adapter, (id << 3) | i); -+ -+ switch (i) { -+ case 4: -+ if (rdata & WOW_BC_BIT) -+ context->type = PATTERN_BROADCAST; -+ else if (rdata & WOW_MC_BIT) -+ context->type = PATTERN_MULTICAST; -+ else if (rdata & WOW_UC_BIT) -+ context->type = PATTERN_UNICAST; -+ else -+ context->type = PATTERN_INVALID; -+ -+ context->crc = rdata & 0xFFFF; -+ break; -+ default: -+ _rtw_memcpy(&context->mask[i], (u8 *)(&rdata), 4); -+ break; -+ } -+ } -+} -+ -+static void _rtw_wow_pattern_write_cam(_adapter *adapter, u8 addr, u32 wdata) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ _mutex *mutex = &pwrpriv->wowlan_pattern_cam_mutex; -+ u32 cnt = 0; -+ systime start = 0, end = 0; -+ u8 timeout = 0; -+ -+ /*RTW_INFO("%s ==> addr:0x%02x , wdata:0x%08x\n", __func__, addr, wdata);*/ -+ _enter_critical_mutex(mutex, NULL); -+ -+ rtw_write32(adapter, REG_WKFMCAM_RWD, wdata); -+ rtw_write32(adapter, REG_WKFMCAM_CMD, BIT_WKFCAM_POLLING_V1 | BIT_WKFCAM_WE | BIT_WKFCAM_ADDR_V2(addr)); -+ -+ start = rtw_get_current_time(); -+ while (1) { -+ if (rtw_is_surprise_removed(adapter)) -+ break; -+ -+ cnt++; -+ if (0 == (rtw_read32(adapter, REG_WKFMCAM_CMD) & BIT_WKFCAM_POLLING_V1)) -+ break; -+ -+ if (rtw_get_passing_time_ms(start) > WOW_CAM_ACCESS_TIMEOUT_MS) { -+ timeout = 1; -+ break; -+ } -+ } -+ end = rtw_get_current_time(); -+ -+ _exit_critical_mutex(mutex, NULL); -+ -+ if (timeout) { -+ RTW_ERR(FUNC_ADPT_FMT" addr:0x%02x, wdata:0x%08x, to:%u, polling:%u, %d ms\n" -+ , FUNC_ADPT_ARG(adapter), addr, wdata, timeout, cnt, rtw_get_time_interval_ms(start, end)); -+ } -+} -+ -+void rtw_wow_pattern_write_cam_ent(_adapter *adapter, u8 id, struct rtl_wow_pattern *context) -+{ -+ int j; -+ u8 addr; -+ u32 wdata = 0; -+ -+ for (j = 4; j >= 0; j--) { -+ switch (j) { -+ case 4: -+ wdata = context->crc; -+ -+ if (PATTERN_BROADCAST == context->type) -+ wdata |= WOW_BC_BIT; -+ if (PATTERN_MULTICAST == context->type) -+ wdata |= WOW_MC_BIT; -+ if (PATTERN_UNICAST == context->type) -+ wdata |= WOW_UC_BIT; -+ if (PATTERN_INVALID != context->type) -+ wdata |= WOW_VALID_BIT; -+ break; -+ default: -+ wdata = context->mask[j]; -+ break; -+ } -+ -+ addr = (id << 3) + j; -+ -+ _rtw_wow_pattern_write_cam(adapter, addr, wdata); -+ } -+} -+ -+static u8 _rtw_wow_pattern_clean_cam(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ _mutex *mutex = &pwrpriv->wowlan_pattern_cam_mutex; -+ u32 cnt = 0; -+ systime start = 0; -+ u8 timeout = 0; -+ u8 rst = _FAIL; -+ -+ _enter_critical_mutex(mutex, NULL); -+ rtw_write32(adapter, REG_WKFMCAM_CMD, BIT_WKFCAM_POLLING_V1 | BIT_WKFCAM_CLR_V1); -+ -+ start = rtw_get_current_time(); -+ while (1) { -+ if (rtw_is_surprise_removed(adapter)) -+ break; -+ -+ cnt++; -+ if (0 == (rtw_read32(adapter, REG_WKFMCAM_CMD) & BIT_WKFCAM_POLLING_V1)) { -+ rst = _SUCCESS; -+ break; -+ } -+ if (rtw_get_passing_time_ms(start) > WOW_CAM_ACCESS_TIMEOUT_MS) { -+ timeout = 1; -+ break; -+ } -+ } -+ _exit_critical_mutex(mutex, NULL); -+ -+ if (timeout) -+ RTW_ERR(FUNC_ADPT_FMT" falied ,polling timeout\n", FUNC_ADPT_ARG(adapter)); -+ -+ return rst; -+} -+ -+void rtw_clean_pattern(_adapter *adapter) -+{ -+ if (_FAIL == _rtw_wow_pattern_clean_cam(adapter)) -+ RTW_ERR("rtw_clean_pattern failed\n"); -+} -+void rtw_fill_pattern(_adapter *adapter) -+{ -+ int i = 0, total = 0; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ struct rtl_wow_pattern wow_pattern; -+ -+ total = pwrpriv->wowlan_pattern_idx; -+ -+ if (total > MAX_WKFM_CAM_NUM) -+ total = MAX_WKFM_CAM_NUM; -+ -+ for (i = 0 ; i < total ; i++) { -+ if (_SUCCESS == rtw_hal_wow_pattern_generate(adapter, i, &wow_pattern)) { -+ rtw_dump_wow_pattern(RTW_DBGDUMP, &wow_pattern, i); -+ rtw_wow_pattern_write_cam_ent(adapter, i, &wow_pattern); -+ } -+ } -+} -+ -+#endif -+void rtw_wow_pattern_cam_dump(_adapter *adapter) -+{ -+ -+#ifndef CONFIG_WOW_PATTERN_HW_CAM -+ int i; -+ -+ for (i = 0 ; i < MAX_WKFM_CAM_NUM; i++) { -+ RTW_INFO("=======[%d]=======\n", i); -+ rtw_read_from_frame_mask(adapter, i); -+ } -+#else -+ struct rtl_wow_pattern context; -+ int i; -+ -+ for (i = 0 ; i < MAX_WKFM_CAM_NUM; i++) { -+ rtw_wow_pattern_read_cam_ent(adapter, i, &context); -+ rtw_dump_wow_pattern(RTW_DBGDUMP, &context, i); -+ } -+ -+#endif -+} -+ -+ -+static void rtw_hal_dl_pattern(_adapter *adapter, u8 mode) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ -+ switch (mode) { -+ case 0: -+ rtw_clean_pattern(adapter); -+ RTW_INFO("%s: total patterns: %d\n", __func__, pwrpriv->wowlan_pattern_idx); -+ break; -+ case 1: -+ rtw_set_default_pattern(adapter); -+ rtw_fill_pattern(adapter); -+ RTW_INFO("%s: pattern total: %d downloaded\n", __func__, pwrpriv->wowlan_pattern_idx); -+ break; -+ case 2: -+ rtw_clean_pattern(adapter); -+ rtw_wow_pattern_sw_reset(adapter); -+ RTW_INFO("%s: clean patterns\n", __func__); -+ break; -+ default: -+ RTW_INFO("%s: unknown mode\n", __func__); -+ break; -+ } -+} -+ -+static void rtw_hal_wow_enable(_adapter *adapter) -+{ -+ struct registry_priv *registry_par = &adapter->registrypriv; -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct sta_info *psta = NULL; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); -+ int res; -+ u16 media_status_rpt; -+ u8 no_wake = 0, i; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface; -+#ifdef CONFIG_GPIO_WAKEUP -+ u8 val8 = 0; -+#endif -+ -+#ifdef CONFIG_LPS_PG -+ u8 lps_pg_hdl_id = 0; -+#endif -+ -+ -+ -+ if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && -+ !check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) -+ no_wake = 1; -+ -+ RTW_PRINT(FUNC_ADPT_FMT " WOWLAN_ENABLE\n", FUNC_ADPT_ARG(adapter)); -+ rtw_hal_gate_bb(adapter, _TRUE); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ /* Start Usb TxDMA */ -+ if(iface) { -+ RTW_INFO(ADPT_FMT "enable TX\n", ADPT_ARG(iface)); -+ RTW_ENABLE_FUNC(iface, DF_TX_BIT); -+ } -+ } -+ -+#ifdef CONFIG_GTK_OL -+ if (psecuritypriv->binstallKCK_KEK == _TRUE) -+ rtw_hal_fw_sync_cam_id(adapter); -+#endif -+ if (IS_HARDWARE_TYPE_8723B(adapter)) -+ rtw_hal_backup_rate(adapter); -+ -+ rtw_hal_fw_dl(adapter, _TRUE); -+ if(no_wake) -+ media_status_rpt = RT_MEDIA_DISCONNECT; -+ else -+ media_status_rpt = RT_MEDIA_CONNECT; -+ rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT, -+ (u8 *)&media_status_rpt); -+ -+ /* RX DMA stop */ -+ #if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(adapter)) -+ rtw_hal_disable_tx_report(adapter); -+ #endif -+ -+ res = rtw_hal_pause_rx_dma(adapter); -+ if (res == _FAIL) -+ RTW_PRINT("[WARNING] pause RX DMA fail\n"); -+ -+ #ifndef CONFIG_WOW_PATTERN_HW_CAM -+ /* Reconfig RX_FF Boundary */ -+ #ifndef CONFIG_WOW_PATTERN_IN_TXFIFO -+ rtw_hal_set_wow_rxff_boundary(adapter, _TRUE); -+ #endif /*CONFIG_WOW_PATTERN_IN_TXFIFO*/ -+ #endif -+ -+ /* redownload wow pattern */ -+ if(!no_wake) -+ rtw_hal_dl_pattern(adapter, 1); -+ -+ if (!pwrctl->wowlan_pno_enable) { -+ psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); -+ -+ if (psta != NULL) { -+ #ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ adapter_to_dvobj(adapter)->dft.port_id = 0xFF; -+ adapter_to_dvobj(adapter)->dft.mac_id = 0xFF; -+ rtw_hal_set_default_port_id_cmd(adapter, psta->cmn.mac_id); -+ #endif -+ if(!no_wake) -+ rtw_sta_media_status_rpt(adapter, psta, 1); -+ } -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ else { -+ if(registry_par->suspend_type == FW_IPS_WRC) { -+ adapter_to_dvobj(adapter)->dft.port_id = 0xFF; -+ adapter_to_dvobj(adapter)->dft.mac_id = 0xFF; -+ rtw_hal_set_default_port_id_cmd(adapter, 0); -+ } -+ } -+#endif /* CONFIG_FW_MULTI_PORT_SUPPORT */ -+ } -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ /* Enable CPWM2 only. */ -+ res = rtw_hal_enable_cpwm2(adapter); -+ if (res == _FAIL) -+ RTW_PRINT("[WARNING] enable cpwm2 fail\n"); -+#endif -+#ifdef CONFIG_GPIO_WAKEUP -+#ifdef CONFIG_RTW_ONE_PIN_GPIO -+ rtw_hal_switch_gpio_wl_ctrl(adapter, pwrctl->wowlan_gpio_index, _TRUE); -+ rtw_hal_set_input_gpio(adapter, pwrctl->wowlan_gpio_index); -+#else -+#ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE -+ if (pwrctl->is_high_active == 0) -+ rtw_hal_set_input_gpio(adapter, pwrctl->wowlan_gpio_index); -+ else -+ rtw_hal_set_output_gpio(adapter, pwrctl->wowlan_gpio_index, -+ GPIO_OUTPUT_LOW); -+#else -+ val8 = (pwrctl->is_high_active == 0) ? 1 : 0; -+ rtw_hal_set_output_gpio(adapter, pwrctl->wowlan_gpio_index, val8); -+ rtw_hal_switch_gpio_wl_ctrl(adapter, pwrctl->wowlan_gpio_index, _TRUE); -+ RTW_INFO("%s: set GPIO_%d to OUTPUT %s state in wow suspend and %s_ACTIVE.\n", -+ __func__, pwrctl->wowlan_gpio_index, -+ pwrctl->wowlan_gpio_output_state ? "HIGH" : "LOW", -+ pwrctl->is_high_active ? "HIGI" : "LOW"); -+#endif /* CONFIG_WAKEUP_GPIO_INPUT_MODE */ -+#endif /* CONFIG_RTW_ONE_PIN_GPIO */ -+#endif /* CONFIG_GPIO_WAKEUP */ -+ /* Set WOWLAN H2C command. */ -+ RTW_PRINT("Set WOWLan cmd\n"); -+ rtw_hal_set_fw_wow_related_cmd(adapter, 1); -+ -+ res = rtw_hal_check_wow_ctrl(adapter, _TRUE); -+ -+ if (res == _FALSE) -+ RTW_INFO("[Error]%s: set wowlan CMD fail!!\n", __func__); -+ -+ pwrctl->wowlan_wake_reason = -+ rtw_read8(adapter, REG_WOWLAN_WAKE_REASON); -+ -+ RTW_PRINT("wowlan_wake_reason: 0x%02x\n", -+ pwrctl->wowlan_wake_reason); -+#ifdef CONFIG_GTK_OL_DBG -+ dump_sec_cam(RTW_DBGDUMP, adapter); -+ dump_sec_cam_cache(RTW_DBGDUMP, adapter); -+#endif -+ -+#ifdef CONFIG_LPS_PG -+ if (pwrctl->lps_level == LPS_PG) { -+ lps_pg_hdl_id = LPS_PG_INFO_CFG; -+ rtw_hal_set_hwreg(adapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id)); -+ } -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ /* free adapter's resource */ -+ rtw_mi_intf_stop(adapter); -+ -+#endif -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) -+ /* Invoid SE0 reset signal during suspending*/ -+ rtw_write8(adapter, REG_RSV_CTRL, 0x20); -+ if (IS_8188F(pHalData->version_id) == FALSE -+ && IS_8188GTV(pHalData->version_id) == FALSE) -+ rtw_write8(adapter, REG_RSV_CTRL, 0x60); -+#endif -+ -+ rtw_hal_gate_bb(adapter, _FALSE); -+} -+ -+#define DBG_WAKEUP_REASON -+#ifdef DBG_WAKEUP_REASON -+void _dbg_wake_up_reason_string(_adapter *adapter, const char *srt_res) -+{ -+ RTW_INFO(ADPT_FMT "- wake up reason - %s\n", ADPT_ARG(adapter), srt_res); -+} -+void _dbg_rtw_wake_up_reason(_adapter *adapter, u8 reason) -+{ -+ if (RX_PAIRWISEKEY == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx pairwise key"); -+ else if (RX_GTK == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx GTK"); -+ else if (RX_FOURWAY_HANDSHAKE == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx four way handshake"); -+ else if (RX_DISASSOC == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx disassoc"); -+ else if (RX_DEAUTH == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx deauth"); -+ else if (RX_ARP_REQUEST == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx ARP request"); -+ else if (FW_DECISION_DISCONNECT == reason) -+ _dbg_wake_up_reason_string(adapter, "FW detect disconnect"); -+ else if (RX_MAGIC_PKT == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx magic packet"); -+ else if (RX_UNICAST_PKT == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx unicast packet"); -+ else if (RX_PATTERN_PKT == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx pattern packet"); -+ else if (RTD3_SSID_MATCH == reason) -+ _dbg_wake_up_reason_string(adapter, "RTD3 SSID match"); -+ else if (RX_REALWOW_V2_WAKEUP_PKT == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx real WOW V2 wakeup packet"); -+ else if (RX_REALWOW_V2_ACK_LOST == reason) -+ _dbg_wake_up_reason_string(adapter, "Rx real WOW V2 ack lost"); -+ else if (ENABLE_FAIL_DMA_IDLE == reason) -+ _dbg_wake_up_reason_string(adapter, "enable fail DMA idle"); -+ else if (ENABLE_FAIL_DMA_PAUSE == reason) -+ _dbg_wake_up_reason_string(adapter, "enable fail DMA pause"); -+ else if (AP_OFFLOAD_WAKEUP == reason) -+ _dbg_wake_up_reason_string(adapter, "AP offload wakeup"); -+ else if (CLK_32K_UNLOCK == reason) -+ _dbg_wake_up_reason_string(adapter, "clk 32k unlock"); -+ else if (RTIME_FAIL_DMA_IDLE == reason) -+ _dbg_wake_up_reason_string(adapter, "RTIME fail DMA idle"); -+ else if (CLK_32K_LOCK == reason) -+ _dbg_wake_up_reason_string(adapter, "clk 32k lock"); -+ #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ else if (WOW_KEEPALIVE_ACK_TIMEOUT == reason) -+ _dbg_wake_up_reason_string(adapter, "rx keep alive ack timeout"); -+ else if (WOW_KEEPALIVE_WAKE == reason) -+ _dbg_wake_up_reason_string(adapter, "rx keep alive wake pattern"); -+ #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ else -+ _dbg_wake_up_reason_string(adapter, "unknown reasoen"); -+} -+#endif -+ -+static void rtw_hal_wow_disable(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ struct security_priv *psecuritypriv = &adapter->securitypriv; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct sta_info *psta = NULL; -+ struct registry_priv *registry_par = &adapter->registrypriv; -+ int res; -+ u16 media_status_rpt; -+ -+ RTW_PRINT("%s, WOWLAN_DISABLE\n", __func__); -+ -+ if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) { -+ RTW_INFO("FW_IPS_DISABLE_BBRF resume\n"); -+ return; -+ } -+ -+ if (!pwrctl->wowlan_pno_enable) { -+ psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); -+ if (psta != NULL) -+ rtw_sta_media_status_rpt(adapter, psta, 0); -+ else -+ RTW_INFO("%s: psta is null\n", __func__); -+ } -+ -+ if (0) { -+ RTW_INFO("0x630:0x%02x\n", rtw_read8(adapter, 0x630)); -+ RTW_INFO("0x631:0x%02x\n", rtw_read8(adapter, 0x631)); -+ RTW_INFO("0x634:0x%02x\n", rtw_read8(adapter, 0x634)); -+ RTW_INFO("0x1c7:0x%02x\n", rtw_read8(adapter, 0x1c7)); -+ } -+ -+ pwrctl->wowlan_wake_reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON); -+ -+ RTW_PRINT("wakeup_reason: 0x%02x\n", -+ pwrctl->wowlan_wake_reason); -+ #ifdef DBG_WAKEUP_REASON -+ _dbg_rtw_wake_up_reason(adapter, pwrctl->wowlan_wake_reason); -+ #endif -+ -+ rtw_hal_set_fw_wow_related_cmd(adapter, 0); -+ -+ res = rtw_hal_check_wow_ctrl(adapter, _FALSE); -+ -+ #if defined(CONFIG_RTL8188E) -+ if (IS_HARDWARE_TYPE_8188E(adapter)) -+ rtw_hal_enable_tx_report(adapter); -+ #endif -+ -+ if ((pwrctl->wowlan_wake_reason != RX_DISASSOC) && -+ (pwrctl->wowlan_wake_reason != RX_DEAUTH) && -+ (pwrctl->wowlan_wake_reason != FW_DECISION_DISCONNECT)) { -+ rtw_hal_get_aoac_rpt(adapter); -+ rtw_hal_update_sw_security_info(adapter); -+ } -+ -+ if (res == _FALSE) { -+ RTW_INFO("[Error]%s: disable WOW cmd fail\n!!", __func__); -+ rtw_hal_force_enable_rxdma(adapter); -+ } -+ -+ rtw_hal_gate_bb(adapter, _TRUE); -+ -+ res = rtw_hal_pause_rx_dma(adapter); -+ if (res == _FAIL) -+ RTW_PRINT("[WARNING] pause RX DMA fail\n"); -+ -+ /* clean HW pattern match */ -+ rtw_hal_dl_pattern(adapter, 0); -+ -+ #ifndef CONFIG_WOW_PATTERN_HW_CAM -+ /* config RXFF boundary to original */ -+ #ifndef CONFIG_WOW_PATTERN_IN_TXFIFO -+ rtw_hal_set_wow_rxff_boundary(adapter, _FALSE); -+ #endif /*CONFIG_WOW_PATTERN_IN_TXFIFO*/ -+ #endif -+ rtw_hal_release_rx_dma(adapter); -+ -+ rtw_hal_fw_dl(adapter, _FALSE); -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ -+#ifdef CONFIG_RTW_ONE_PIN_GPIO -+ rtw_hal_set_input_gpio(adapter, pwrctl->wowlan_gpio_index); -+#else -+#ifdef CONFIG_WAKEUP_GPIO_INPUT_MODE -+ if (pwrctl->is_high_active == 0) -+ rtw_hal_set_input_gpio(adapter, pwrctl->wowlan_gpio_index); -+ else -+ rtw_hal_set_output_gpio(adapter, pwrctl->wowlan_gpio_index, -+ GPIO_OUTPUT_LOW); -+#else -+ rtw_hal_set_output_gpio(adapter, pwrctl->wowlan_gpio_index -+ , pwrctl->wowlan_gpio_output_state); -+ RTW_INFO("%s: set GPIO_%d to OUTPUT %s state in wow resume and %s_ACTIVE.\n", -+ __func__, pwrctl->wowlan_gpio_index, -+ pwrctl->wowlan_gpio_output_state ? "HIGH" : "LOW", -+ pwrctl->is_high_active ? "HIGI" : "LOW"); -+#endif /* CONFIG_WAKEUP_GPIO_INPUT_MODE */ -+#endif /* CONFIG_RTW_ONE_PIN_GPIO */ -+#endif /* CONFIG_GPIO_WAKEUP */ -+ if ((pwrctl->wowlan_wake_reason != FW_DECISION_DISCONNECT) && -+ (pwrctl->wowlan_wake_reason != RX_PAIRWISEKEY) && -+ (pwrctl->wowlan_wake_reason != RX_DISASSOC) && -+ (pwrctl->wowlan_wake_reason != RX_DEAUTH)) { -+ -+ media_status_rpt = RT_MEDIA_CONNECT; -+ rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT, -+ (u8 *)&media_status_rpt); -+ -+ if (psta != NULL) { -+ #ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ adapter_to_dvobj(adapter)->dft.port_id = 0xFF; -+ adapter_to_dvobj(adapter)->dft.mac_id = 0xFF; -+ rtw_hal_set_default_port_id_cmd(adapter, psta->cmn.mac_id); -+ #endif -+ rtw_sta_media_status_rpt(adapter, psta, 1); -+ } -+ } -+ rtw_hal_gate_bb(adapter, _FALSE); -+} -+#endif /*CONFIG_WOWLAN*/ -+ -+#ifdef CONFIG_P2P_WOWLAN -+void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index, -+ u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len, -+ RSVDPAGE_LOC *rsvd_page_loc) -+{ -+ u32 P2PNegoRspLength = 0, P2PInviteRspLength = 0; -+ u32 P2PPDRspLength = 0, P2PProbeRspLength = 0, P2PBCNLength = 0; -+ u8 CurtPktPageNum = 0; -+ -+ /* P2P Beacon */ -+ rsvd_page_loc->LocP2PBeacon = *page_num; -+ rtw_hal_construct_P2PBeacon(adapter, &pframe[index], &P2PBCNLength); -+ rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc], -+ P2PBCNLength, _FALSE, _FALSE, _FALSE); -+ -+#if 0 -+ RTW_INFO("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", -+ __FUNCTION__, &pframe[index - tx_desc], (P2PBCNLength + tx_desc)); -+#endif -+ -+ CurtPktPageNum = (u8)PageNum(tx_desc + P2PBCNLength, page_size); -+ -+ *page_num += CurtPktPageNum; -+ -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-P2P-Beacon", CurtPktPageNum, *page_num, 0); -+ -+ /* P2P Probe rsp */ -+ rsvd_page_loc->LocP2PProbeRsp = *page_num; -+ rtw_hal_construct_P2PProbeRsp(adapter, &pframe[index], -+ &P2PProbeRspLength); -+ rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc], -+ P2PProbeRspLength, _FALSE, _FALSE, _FALSE); -+ -+ /* RTW_INFO("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", */ -+ /* __FUNCTION__, &pframe[index-tx_desc], (P2PProbeRspLength+tx_desc)); */ -+ -+ CurtPktPageNum = (u8)PageNum(tx_desc + P2PProbeRspLength, page_size); -+ -+ *page_num += CurtPktPageNum; -+ -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-P2P-ProbeRsp", CurtPktPageNum, *page_num, 0); -+ -+ /* P2P nego rsp */ -+ rsvd_page_loc->LocNegoRsp = *page_num; -+ rtw_hal_construct_P2PNegoRsp(adapter, &pframe[index], -+ &P2PNegoRspLength); -+ rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc], -+ P2PNegoRspLength, _FALSE, _FALSE, _FALSE); -+ -+ /* RTW_INFO("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", */ -+ /* __FUNCTION__, &pframe[index-tx_desc], (NegoRspLength+tx_desc)); */ -+ -+ CurtPktPageNum = (u8)PageNum(tx_desc + P2PNegoRspLength, page_size); -+ -+ *page_num += CurtPktPageNum; -+ -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-P2P-NegoRsp", CurtPktPageNum, *page_num, 0); -+ -+ /* P2P invite rsp */ -+ rsvd_page_loc->LocInviteRsp = *page_num; -+ rtw_hal_construct_P2PInviteRsp(adapter, &pframe[index], -+ &P2PInviteRspLength); -+ rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc], -+ P2PInviteRspLength, _FALSE, _FALSE, _FALSE); -+ -+ /* RTW_INFO("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", */ -+ /* __FUNCTION__, &pframe[index-tx_desc], (InviteRspLength+tx_desc)); */ -+ -+ CurtPktPageNum = (u8)PageNum(tx_desc + P2PInviteRspLength, page_size); -+ -+ *page_num += CurtPktPageNum; -+ -+ index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("WOW-P2P-InviteRsp", CurtPktPageNum, *page_num, 0); -+ -+ /* P2P provision discovery rsp */ -+ rsvd_page_loc->LocPDRsp = *page_num; -+ rtw_hal_construct_P2PProvisionDisRsp(adapter, -+ &pframe[index], &P2PPDRspLength); -+ -+ rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc], -+ P2PPDRspLength, _FALSE, _FALSE, _FALSE); -+ -+ /* RTW_INFO("%s(): HW_VAR_SET_TX_CMD: QOS NULL DATA %p %d\n", */ -+ /* __FUNCTION__, &pframe[index-tx_desc], (PDRspLength+tx_desc)); */ -+ -+ CurtPktPageNum = (u8)PageNum(tx_desc + P2PPDRspLength, page_size); -+ -+ *page_num += CurtPktPageNum; -+ -+ *total_pkt_len = index + P2PPDRspLength; -+ RSVD_PAGE_CFG("WOW-P2P-PDR", CurtPktPageNum, *page_num, *total_pkt_len); -+ -+ index += (CurtPktPageNum * page_size); -+ -+ -+} -+#endif /* CONFIG_P2P_WOWLAN */ -+ -+#ifdef CONFIG_LPS_PG -+#ifndef DBG_LPSPG_INFO_DUMP -+#define DBG_LPSPG_INFO_DUMP 1 -+#endif -+ -+#include "hal_halmac.h" -+ -+#ifdef CONFIG_RTL8822C -+static int rtw_lps_pg_set_dpk_info_rsvd_page(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct dm_struct *dm = adapter_to_phydm(adapter); -+ struct rsvd_page_cache_t *cache = &pwrpriv->lpspg_dpk_info; -+ u8 *info = NULL; -+ u32 info_len; -+ int ret = _FAIL; -+ -+ /* get length */ -+ halrf_dpk_info_rsvd_page(dm, NULL, &info_len); -+ if (!info_len) { -+ RTW_ERR("get %s length fail\n", cache->name); -+ goto exit; -+ } -+ -+ /* allocate buf */ -+ info = rtw_zmalloc(info_len); -+ if (!info) { -+ RTW_ERR("alloc %s buffer fail(len=%d)\n", cache->name, info_len); -+ goto exit; -+ } -+ -+ /* get content */ -+ halrf_dpk_info_rsvd_page(dm, info, NULL); -+ -+ if (rsvd_page_cache_update_data(cache, info, info_len)) { -+ -+ #if (DBG_LPSPG_INFO_DUMP >= 1) -+ RTW_INFO_DUMP(cache->name, info, info_len); -+ #endif -+ -+ ret = rtw_halmac_download_rsvd_page(dvobj, cache->loc, info, info_len); -+ ret = !ret ? _SUCCESS : _FAIL; -+ if (ret != _SUCCESS) { -+ RTW_ERR("download %s rsvd page to offset:%u fail\n", cache->name, cache->loc); -+ goto free_mem; -+ } -+ -+ #if (DBG_LPSPG_INFO_DUMP >= 2) -+ RTW_INFO("get %s from rsvd page offset:%d\n", cache->name, cache->loc); -+ rtw_dump_rsvd_page(RTW_DBGDUMP, adapter, cache->loc, cache->page_num); -+ #endif -+ } -+ -+free_mem: -+ rtw_mfree(info, info_len); -+ -+exit: -+ return ret; -+} -+ -+static int rtw_lps_pg_set_iqk_info_rsvd_page(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct dm_struct *dm = adapter_to_phydm(adapter); -+ struct rsvd_page_cache_t *cache = &pwrpriv->lpspg_iqk_info; -+ u8 *info = NULL; -+ u32 info_len = 0; -+ int ret = _FAIL; -+ -+ if (hal_data->RegIQKFWOffload) { -+ rsvd_page_cache_free_data(cache); -+ ret = _SUCCESS; -+ goto exit; -+ } -+ -+ /* get length */ -+ halrf_iqk_info_rsvd_page(dm, NULL, &info_len); -+ if (!info_len) { -+ RTW_ERR("get %s length fail\n", cache->name); -+ goto exit; -+ } -+ -+ /* allocate buf */ -+ info = rtw_zmalloc(info_len); -+ if (!info) { -+ RTW_ERR("alloc %s buffer fail(len=%d)\n", cache->name, info_len); -+ goto exit; -+ } -+ -+ /* get content */ -+ halrf_iqk_info_rsvd_page(dm, info, NULL); -+ -+ if (rsvd_page_cache_update_data(cache, info, info_len)) { -+ -+ #if (DBG_LPSPG_INFO_DUMP >= 1) -+ RTW_INFO_DUMP(cache->name, info, info_len); -+ #endif -+ -+ ret = rtw_halmac_download_rsvd_page(dvobj, cache->loc, info, info_len); -+ ret = !ret ? _SUCCESS : _FAIL; -+ if (ret != _SUCCESS) { -+ RTW_ERR("download %s rsvd page to offset:%u fail\n", cache->name, cache->loc); -+ goto free_mem; -+ } -+ -+ #if (DBG_LPSPG_INFO_DUMP >= 2) -+ RTW_INFO("get %s from rsvd page offset:%d\n", cache->name, cache->loc); -+ rtw_dump_rsvd_page(RTW_DBGDUMP, adapter, cache->loc, cache->page_num); -+ #endif -+ } -+ -+free_mem: -+ rtw_mfree(info, info_len); -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_RTL8822C */ -+ -+static void rtw_hal_build_lps_pg_info_rsvd_page(struct dvobj_priv *dvobj, _adapter *ld_sta_iface, u8 *buf, u32 *buf_size) -+{ -+#define LPS_PG_INFO_RSVD_LEN 16 -+ -+ if (buf) { -+ _adapter *adapter = dvobj_get_primary_adapter(dvobj); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ struct sta_info *psta; -+#ifdef CONFIG_MBSSID_CAM -+ u8 cam_id = INVALID_CAM_ID; -+#endif -+ u8 *psec_cam_id = buf + 8; -+ u8 sec_cam_num = 0; -+ u8 drv_rsvdpage_num = 0; -+ -+ if (ld_sta_iface) { -+ psta = rtw_get_stainfo(&ld_sta_iface->stapriv, get_bssid(&ld_sta_iface->mlmepriv)); -+ if (!psta) { -+ RTW_ERR("%s [ERROR] sta is NULL\n", __func__); -+ rtw_warn_on(1); -+ goto size_chk; -+ } -+ /*Byte 0 - used macid*/ -+ LPSPG_RSVD_PAGE_SET_MACID(buf, psta->cmn.mac_id); -+ RTW_INFO("[LPSPG-INFO] mac_id:%d\n", psta->cmn.mac_id); -+ } -+ -+#ifdef CONFIG_MBSSID_CAM -+ /*Byte 1 - used BSSID CAM entry*/ -+ cam_id = rtw_mbid_cam_search_by_ifaceid(adapter, adapter->iface_id); -+ if (cam_id != INVALID_CAM_ID) -+ LPSPG_RSVD_PAGE_SET_MBSSCAMID(buf, cam_id); -+ RTW_INFO("[LPSPG-INFO] mbss_cam_id:%d\n", cam_id); -+#endif -+ -+#ifdef CONFIG_WOWLAN /*&& pattern match cam used*/ -+ /*Btye 2 - Max used Pattern Match CAM entry*/ -+ if (pwrpriv->wowlan_mode == _TRUE -+ && ld_sta_iface && check_fwstate(&ld_sta_iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ LPSPG_RSVD_PAGE_SET_PMC_NUM(buf, pwrpriv->wowlan_pattern_idx); -+ RTW_INFO("[LPSPG-INFO] Max Pattern Match CAM entry :%d\n", pwrpriv->wowlan_pattern_idx); -+ } -+#endif -+#ifdef CONFIG_BEAMFORMING /*&& MU BF*/ -+ /*Btye 3 - Max MU rate table Group ID*/ -+ LPSPG_RSVD_PAGE_SET_MU_RAID_GID(buf, 0); -+ RTW_INFO("[LPSPG-INFO] Max MU rate table Group ID :%d\n", 0); -+#endif -+ -+ /*Btye 8 ~15 - used Security CAM entry */ -+ sec_cam_num = rtw_get_sec_camid(adapter, 8, psec_cam_id); -+ -+ /*Btye 4 - used Security CAM entry number*/ -+ if (sec_cam_num < 8) -+ LPSPG_RSVD_PAGE_SET_SEC_CAM_NUM(buf, sec_cam_num); -+ RTW_INFO("[LPSPG-INFO] Security CAM entry number :%d\n", sec_cam_num); -+ -+ /*Btye 5 - Txbuf used page number for fw offload*/ -+ if (pwrpriv->wowlan_mode == _TRUE || pwrpriv->wowlan_ap_mode == _TRUE) -+ drv_rsvdpage_num = rtw_hal_get_txbuff_rsvd_page_num(adapter, _TRUE); -+ else -+ drv_rsvdpage_num = rtw_hal_get_txbuff_rsvd_page_num(adapter, _FALSE); -+ LPSPG_RSVD_PAGE_SET_DRV_RSVDPAGE_NUM(buf, drv_rsvdpage_num); -+ RTW_INFO("[LPSPG-INFO] DRV's rsvd page numbers :%d\n", drv_rsvdpage_num); -+ } -+ -+size_chk: -+ if (buf_size) -+ *buf_size = LPS_PG_INFO_RSVD_LEN; -+} -+ -+static int rtw_hal_set_lps_pg_info_rsvd_page(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct rsvd_page_cache_t *cache = &pwrpriv->lpspg_info; -+ u8 *info = NULL; -+ u32 info_len = 0; -+ int ret = _FAIL; -+ -+ /* get length */ -+ rtw_hal_build_lps_pg_info_rsvd_page(dvobj, adapter, NULL, &info_len); -+ if (!info_len) { -+ RTW_ERR("get %s length fail\n", cache->name); -+ goto exit; -+ } -+ -+ /* allocate buf */ -+ info = rtw_zmalloc(info_len); -+ if (!info) { -+ RTW_ERR("alloc %s buffer fail(len=%d)\n", cache->name, info_len); -+ goto exit; -+ } -+ -+ /* get content */ -+ rtw_hal_build_lps_pg_info_rsvd_page(dvobj, adapter, info, NULL); -+ -+ if (rsvd_page_cache_update_data(cache, info, info_len)) { -+ -+ #if (DBG_LPSPG_INFO_DUMP >= 1) -+ RTW_INFO_DUMP(cache->name, info, info_len); -+ #endif -+ -+ ret = rtw_halmac_download_rsvd_page(dvobj, cache->loc, info, info_len); -+ ret = !ret ? _SUCCESS : _FAIL; -+ if (ret != _SUCCESS) { -+ RTW_ERR("download %s rsvd page to offset:%u fail\n", cache->name, cache->loc); -+ goto free_mem; -+ } -+ -+ #if (DBG_LPSPG_INFO_DUMP >= 2) -+ RTW_INFO("get %s from rsvd page offset:%d\n", cache->name, cache->loc); -+ rtw_dump_rsvd_page(RTW_DBGDUMP, adapter, cache->loc, cache->page_num); -+ #endif -+ } -+ -+free_mem: -+ rtw_mfree(info, info_len); -+ -+exit: -+ return ret; -+} -+ -+static void rtw_lps_pg_set_rsvd_page(_adapter *adapter, u8 *frame, u16 *index -+ , u8 txdesc_size, u32 page_size, u8 *total_page_num -+ , bool is_wow_mode, _adapter *ld_sta_iface, bool only_get_page_num) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ struct rsvd_page_cache_t *cache; -+ bool rsvd = 1; -+ u8 *pos; -+ u32 len; -+ -+ if (is_wow_mode) { -+ /* lps_level will not change when enter wow_mode */ -+ if (pwrctl->lps_level != LPS_PG) -+ rsvd = 0; -+ } else { -+ if (!only_get_page_num && !ld_sta_iface) -+ rsvd = 0; -+ } -+ -+ pos = only_get_page_num ? NULL : frame + *index; -+ -+#ifdef CONFIG_RTL8822C -+ if (IS_8822C_SERIES(hal_data->version_id)) { -+ /* LPSPG_DPK_INFO */ -+ cache = &pwrctl->lpspg_dpk_info; -+ if (rsvd) { -+ if (pwrctl->lps_level != LPS_PG) -+ pos = NULL; -+ len = 0; -+ halrf_dpk_info_rsvd_page(adapter_to_phydm(adapter), pos, &len); -+ #if (DBG_LPSPG_INFO_DUMP >= 1) -+ if (pos) -+ RTW_INFO_DUMP(cache->name, pos, len); -+ #endif -+ rsvd_page_cache_update_all(cache, *total_page_num, txdesc_size, page_size, pos, len); -+ *total_page_num += cache->page_num; -+ *index += page_size * cache->page_num; -+ pos = only_get_page_num ? NULL : frame + *index; -+ RSVD_PAGE_CFG(cache->name, cache->page_num, *total_page_num, *index); -+ } else -+ rsvd_page_cache_free(cache); -+ -+ /* LPSPG_IQK_INFO */ -+ cache = &pwrctl->lpspg_iqk_info; -+ if (rsvd -+ /* RegIQKFWOffload will not change when enter wow_mode */ -+ && !(is_wow_mode && hal_data->RegIQKFWOffload) -+ ) { -+ if (pwrctl->lps_level != LPS_PG || hal_data->RegIQKFWOffload) -+ pos = NULL; -+ len = 0; -+ halrf_iqk_info_rsvd_page(adapter_to_phydm(adapter), pos, &len); -+ #if (DBG_LPSPG_INFO_DUMP >= 1) -+ if (pos) -+ RTW_INFO_DUMP(cache->name, pos, len); -+ #endif -+ rsvd_page_cache_update_all(cache, *total_page_num, txdesc_size, page_size, pos, len); -+ *total_page_num += cache->page_num; -+ *index += page_size * cache->page_num; -+ pos = only_get_page_num ? NULL : frame + *index; -+ RSVD_PAGE_CFG(cache->name, cache->page_num, *total_page_num, *index); -+ } else -+ rsvd_page_cache_free(cache); -+ } -+#endif -+ -+ /* LPSPG_INFO */ -+ cache = &pwrctl->lpspg_info; -+ if (rsvd) { -+ if (pwrctl->lps_level != LPS_PG) -+ pos = NULL; -+ rtw_hal_build_lps_pg_info_rsvd_page(adapter_to_dvobj(adapter), ld_sta_iface, pos, &len); -+ #if (DBG_LPSPG_INFO_DUMP >= 1) -+ if (pos) -+ RTW_INFO_DUMP(cache->name, pos, len); -+ #endif -+ rsvd_page_cache_update_all(cache, *total_page_num, txdesc_size, page_size, pos, len); -+ *total_page_num += cache->page_num; -+ *index += page_size * cache->page_num; -+ pos = only_get_page_num ? NULL : frame + *index; -+ RSVD_PAGE_CFG(cache->name, cache->page_num, *total_page_num, *index); -+ } else -+ rsvd_page_cache_free(cache); -+} -+ -+u8 rtw_hal_set_lps_pg_info_cmd(_adapter *adapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ -+ u8 lpspg_info[H2C_LPS_PG_INFO_LEN] = {0}; -+ u8 ret = _FAIL; -+ -+ if (_NO_PRIVACY_ != adapter->securitypriv.dot11PrivacyAlgrthm) -+ SET_H2CCMD_LPSPG_SEC_CAM_EN(lpspg_info, 1); /*SecurityCAM_En*/ -+ -+#ifdef CONFIG_MBSSID_CAM -+ SET_H2CCMD_LPSPG_MBID_CAM_EN(lpspg_info, 1); /*BSSIDCAM_En*/ -+#endif -+ -+#if defined(CONFIG_WOWLAN) && defined(CONFIG_WOW_PATTERN_HW_CAM) -+ if (pwrpriv->wowlan_mode == _TRUE && -+ check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ -+ SET_H2CCMD_LPSPG_PMC_CAM_EN(lpspg_info, 1); /*PatternMatchCAM_En*/ -+ } -+#endif -+ -+#ifdef CONFIG_MACID_SEARCH -+ SET_H2CCMD_LPSPG_MACID_SEARCH_EN(lpspg_info, 1); /*MACIDSearch_En*/ -+#endif -+ -+#ifdef CONFIG_TX_SC -+ SET_H2CCMD_LPSPG_TXSC_EN(lpspg_info, 1); /*TXSC_En*/ -+#endif -+ -+#ifdef CONFIG_BEAMFORMING /*&& MU BF*/ -+ SET_H2CCMD_LPSPG_MU_RATE_TB_EN(lpspg_info, 1); /*MURateTable_En*/ -+#endif -+ -+ SET_H2CCMD_LPSPG_LOC(lpspg_info, pwrpriv->lpspg_info.loc); -+ -+#ifdef CONFIG_RTL8822C -+ if (pwrpriv->bFwCurrentInPSMode == _FALSE) { -+ SET_H2CCMD_LPSPG_DPK_INFO_LOC(lpspg_info, pwrpriv->lpspg_dpk_info.loc); -+ if (!GET_HAL_DATA(adapter)->RegIQKFWOffload) -+ SET_H2CCMD_LPSPG_IQK_INFO_LOC(lpspg_info, pwrpriv->lpspg_iqk_info.loc); -+ } else { -+ SET_H2CCMD_LPSPG_DPK_INFO_LOC(lpspg_info, 0); -+ if (!GET_HAL_DATA(adapter)->RegIQKFWOffload) -+ SET_H2CCMD_LPSPG_IQK_INFO_LOC(lpspg_info, 0); -+ } -+#endif -+ -+#if (DBG_LPSPG_INFO_DUMP >= 1) -+ RTW_INFO_DUMP("H2C_LPS_PG_INFO: ", lpspg_info, H2C_LPS_PG_INFO_LEN); -+#endif -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_LPS_PG_INFO, -+ H2C_LPS_PG_INFO_LEN, -+ lpspg_info); -+ return ret; -+} -+u8 rtw_hal_set_lps_pg_info(_adapter *adapter) -+{ -+ u8 ret = _FAIL; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ -+ if (pwrpriv->lpspg_info.loc == 0) { -+ RTW_ERR("%s lpspg_info.loc = 0\n", __func__); -+ rtw_warn_on(1); -+ return ret; -+ } -+ #ifdef CONFIG_RTL8822C -+ rtw_lps_pg_set_dpk_info_rsvd_page(adapter); -+ rtw_lps_pg_set_iqk_info_rsvd_page(adapter); -+ #endif -+ rtw_hal_set_lps_pg_info_rsvd_page(adapter); -+ -+ ret = rtw_hal_set_lps_pg_info_cmd(adapter); -+ -+ return ret; -+} -+ -+void rtw_hal_lps_pg_rssi_lv_decide(_adapter *adapter, struct sta_info *sta) -+{ -+#if 0 -+ if (sta->cmn.ra_info.rssi_level >= 4) -+ sta->lps_pg_rssi_lv = 3; /*RSSI High - 1SS_VHT_MCS7*/ -+ else if (sta->cmn.ra_info.rssi_level >= 2) -+ sta->lps_pg_rssi_lv = 2; /*RSSI Middle - 1SS_VHT_MCS3*/ -+ else -+ sta->lps_pg_rssi_lv = 1; /*RSSI Lower - Lowest_rate*/ -+#else -+ sta->lps_pg_rssi_lv = 0; -+#endif -+ RTW_INFO("%s mac-id:%d, rssi:%d, rssi_level:%d, lps_pg_rssi_lv:%d\n", -+ __func__, sta->cmn.mac_id, sta->cmn.rssi_stat.rssi, sta->cmn.ra_info.rssi_level, sta->lps_pg_rssi_lv); -+} -+ -+void rtw_hal_lps_pg_handler(_adapter *adapter, enum lps_pg_hdl_id hdl_id) -+{ -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *sta; -+ -+ sta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); -+ -+ switch (hdl_id) { -+ case LPS_PG_INFO_CFG: -+ rtw_hal_set_lps_pg_info(adapter); -+ break; -+ case LPS_PG_REDLEMEM: -+ if (IS_8822C_SERIES(GET_HAL_DATA(adapter)->version_id)) -+ break; -+ -+ /*set xmit_block*/ -+ rtw_set_xmit_block(adapter, XMIT_BLOCK_REDLMEM); -+ if (_FAIL == rtw_hal_fw_mem_dl(adapter, FW_EMEM)) -+ rtw_warn_on(1); -+ /*clearn xmit_block*/ -+ rtw_clr_xmit_block(adapter, XMIT_BLOCK_REDLMEM); -+ break; -+ case LPS_PG_PHYDM_DIS:/*Disable RA and PT by H2C*/ -+ if (IS_8822C_SERIES(GET_HAL_DATA(adapter)->version_id)) -+ break; -+ -+ if (sta) -+ rtw_phydm_lps_pg_hdl(adapter, sta, _TRUE); -+ break; -+ case LPS_PG_PHYDM_EN:/*Enable RA and PT by H2C*/ -+ if (IS_8822C_SERIES(GET_HAL_DATA(adapter)->version_id)) -+ break; -+ -+ if (sta) { -+ rtw_hal_lps_pg_rssi_lv_decide(adapter, sta); -+ rtw_phydm_lps_pg_hdl(adapter, sta, _FALSE); -+ sta->lps_pg_rssi_lv = 0; -+ } -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+#endif /*CONFIG_LPS_PG*/ -+ -+static u8 _rtw_mi_assoc_if_num(_adapter *adapter) -+{ -+ u8 mi_iface_num = 0; -+ -+ if (0) { -+ RTW_INFO("[IFS_ASSOC_STATUS] - STA :%d", DEV_STA_LD_NUM(adapter_to_dvobj(adapter))); -+ RTW_INFO("[IFS_ASSOC_STATUS] - AP:%d", DEV_AP_NUM(adapter_to_dvobj(adapter))); -+ RTW_INFO("[IFS_ASSOC_STATUS] - AP starting :%d", DEV_AP_STARTING_NUM(adapter_to_dvobj(adapter))); -+ RTW_INFO("[IFS_ASSOC_STATUS] - MESH :%d", DEV_MESH_NUM(adapter_to_dvobj(adapter))); -+ RTW_INFO("[IFS_ASSOC_STATUS] - ADHOC :%d", DEV_ADHOC_NUM(adapter_to_dvobj(adapter))); -+ /*RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GC :%d", DEV_P2P_GC_NUM(adapter_to_dvobj(adapter)));*/ -+ /*RTW_INFO("[IFS_ASSOC_STATUS] - P2P-GO :%d", DEV_P2P_GO_NUM(adapter_to_dvobj(adapter)));*/ -+ } -+ -+ mi_iface_num = (DEV_STA_LD_NUM(adapter_to_dvobj(adapter)) + -+ DEV_AP_NUM(adapter_to_dvobj(adapter)) + -+ DEV_AP_STARTING_NUM(adapter_to_dvobj(adapter))); -+ return mi_iface_num; -+} -+#ifdef CONFIG_CONCURRENT_MODE -+static _adapter *_rtw_search_sta_iface(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface = NULL; -+ _adapter *sta_iface = NULL; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (check_fwstate(&iface->mlmepriv, WIFI_STATION_STATE) == _TRUE) { -+ if (check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ sta_iface = iface; -+ break; -+ } -+ } -+ } -+ return sta_iface; -+} -+#if defined(CONFIG_AP_MODE) && defined(CONFIG_BT_COEXIST) -+static _adapter *_rtw_search_ap_iface(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface = NULL; -+ _adapter *ap_iface = NULL; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE ) { -+ ap_iface = iface; -+ break; -+ } -+ } -+ return ap_iface; -+} -+#endif/*CONFIG_AP_MODE*/ -+#endif/*CONFIG_CONCURRENT_MODE*/ -+ -+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA -+void rtw_hal_set_pathb_phase(_adapter *adapter, u8 phase_idx) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); -+ struct PHY_DM_STRUCT *pDM_Odm = &pHalData->odmpriv; -+ -+ return phydm_pathb_q_matrix_rotate(pDM_Odm, phase_idx); -+} -+#endif -+ -+/* -+ * Description: Fill the reserved packets that FW will use to RSVD page. -+ * Now we just send 4 types packet to rsvd page. -+ * (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. -+ * Input: -+ * finished - FALSE:At the first time we will send all the packets as a large packet to Hw, -+ * so we need to set the packet length to total lengh. -+ * TRUE: At the second time, we should send the first packet (default:beacon) -+ * to Hw again and set the lengh in descriptor to the real beacon lengh. -+ * page_num - The amount of reserved page which driver need. -+ * If this is not NULL, this function doesn't real download reserved -+ * page, but just count the number of reserved page. -+ * -+ * 2009.10.15 by tynli. -+ * 2017.06.20 modified by Lucas. -+ * -+ * Page Size = 128: 8188e, 8723a/b, 8192c/d, -+ * Page Size = 256: 8192e, 8821a -+ * Page Size = 512: 8812a -+ */ -+ -+/*#define DBG_DUMP_SET_RSVD_PAGE*/ -+static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page_num) -+{ -+ PHAL_DATA_TYPE pHalData; -+ struct xmit_frame *pcmdframe = NULL; -+ struct pkt_attrib *pattrib; -+ struct xmit_priv *pxmitpriv; -+ struct pwrctrl_priv *pwrctl; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ u32 BeaconLength = 0, ProbeRspLength = 0, PSPollLength = 0; -+ u32 NullDataLength = 0, QosNullLength = 0, BTQosNullLength = 0; -+ u32 ProbeReqLength = 0, NullFunctionDataLength = 0; -+ u8 TxDescLen = TXDESC_SIZE, TxDescOffset = TXDESC_OFFSET; -+ u8 TotalPageNum = 0 , CurtPktPageNum = 0 , RsvdPageNum = 0; -+ u8 *ReservedPagePacket; -+ u16 BufIndex = 0; -+ u32 TotalPacketLen = 0, MaxRsvdPageBufSize = 0, PageSize = 0; -+ RSVDPAGE_LOC RsvdPageLoc; -+ struct registry_priv *registry_par = &adapter->registrypriv; -+ -+#ifdef DBG_FW_DEBUG_MSG_PKT -+ u32 fw_dbg_msg_pkt_len = 0; -+#endif /*DBG_FW_DEBUG_MSG_PKT*/ -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ struct sreset_priv *psrtpriv; -+#endif /* DBG_CONFIG_ERROR_DETECT */ -+ -+#ifdef CONFIG_MCC_MODE -+ u8 dl_mcc_page = _FAIL; -+#endif /* CONFIG_MCC_MODE */ -+ u8 nr_assoc_if; -+ -+ _adapter *sta_iface = NULL; -+ _adapter *ap_iface = NULL; -+ -+ bool is_wow_mode = _FALSE; -+ -+ pHalData = GET_HAL_DATA(adapter); -+#ifdef DBG_CONFIG_ERROR_DETECT -+ psrtpriv = &pHalData->srestpriv; -+#endif -+ pxmitpriv = &adapter->xmitpriv; -+ pwrctl = adapter_to_pwrctl(adapter); -+ -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize); -+ -+ if (PageSize == 0) { -+ RTW_ERR("[Error]: %s, PageSize is zero!!\n", __func__); -+ return; -+ } -+ nr_assoc_if = _rtw_mi_assoc_if_num(adapter); -+ -+ if ((pwrctl->wowlan_mode == _TRUE && pwrctl->wowlan_in_resume == _FALSE) || -+ pwrctl->wowlan_ap_mode == _TRUE || -+ pwrctl->wowlan_p2p_mode == _TRUE) -+ is_wow_mode = _TRUE; -+ -+ /*page_num for init time to get rsvd page number*/ -+ /* Prepare ReservedPagePacket */ -+ if (page_num) { -+ ReservedPagePacket = rtw_zmalloc(MAX_CMDBUF_SZ); -+ if (!ReservedPagePacket) { -+ RTW_WARN("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); -+ *page_num = 0xFF; -+ return; -+ } -+ RTW_INFO(FUNC_ADPT_FMT" Get [ %s ] RsvdPageNUm ==>\n", -+ FUNC_ADPT_ARG(adapter), (is_wow_mode) ? "WOW" : "NOR"); -+ -+ } else { -+ if (is_wow_mode) -+ RsvdPageNum = rtw_hal_get_txbuff_rsvd_page_num(adapter, _TRUE); -+ else -+ RsvdPageNum = rtw_hal_get_txbuff_rsvd_page_num(adapter, _FALSE); -+ -+ RTW_INFO(FUNC_ADPT_FMT" PageSize: %d, [ %s ]-RsvdPageNUm: %d\n", -+ FUNC_ADPT_ARG(adapter), PageSize, (is_wow_mode) ? "WOW" : "NOR", RsvdPageNum); -+ -+ MaxRsvdPageBufSize = RsvdPageNum * PageSize; -+ if (MaxRsvdPageBufSize > MAX_CMDBUF_SZ) { -+ RTW_ERR("%s MaxRsvdPageBufSize(%d) is larger than MAX_CMDBUF_SZ(%d)", -+ __func__, MaxRsvdPageBufSize, MAX_CMDBUF_SZ); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv); -+ if (pcmdframe == NULL) { -+ RTW_ERR("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); -+ return; -+ } -+ -+ ReservedPagePacket = pcmdframe->buf_addr; -+ } -+ -+ _rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC)); -+ -+ BufIndex = TxDescOffset; -+ -+ /*======== beacon content =======*/ -+ rtw_hal_construct_beacon(adapter, -+ &ReservedPagePacket[BufIndex], &BeaconLength); -+ -+ /* -+ * When we count the first page size, we need to reserve description size for the RSVD -+ * packet, it will be filled in front of the packet in TXPKTBUF. -+ */ -+ BeaconLength = MAX_BEACON_LEN - TxDescLen; -+ CurtPktPageNum = (u8)PageNum((TxDescLen + BeaconLength), PageSize); -+ -+#if defined(CONFIG_FW_HANDLE_TXBCN) || defined(CONFIG_PORT_BASED_TXBCN) -+ CurtPktPageNum = CurtPktPageNum * CONFIG_LIMITED_AP_NUM; -+#endif -+ TotalPageNum += CurtPktPageNum; -+ -+ BufIndex += (CurtPktPageNum * PageSize); -+ -+ RSVD_PAGE_CFG("Beacon", CurtPktPageNum, TotalPageNum, TotalPacketLen); -+ -+ /*======== probe response content ========*/ -+ if (pwrctl->wowlan_ap_mode == _TRUE) {/*WOW mode*/ -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (nr_assoc_if >= 2) -+ RTW_ERR("Not support > 2 net-interface in WOW\n"); -+ #endif -+ /* (4) probe response*/ -+ RsvdPageLoc.LocProbeRsp = TotalPageNum; -+ rtw_hal_construct_ProbeRsp( -+ adapter, &ReservedPagePacket[BufIndex], -+ &ProbeRspLength, -+ _FALSE); -+ rtw_hal_fill_fake_txdesc(adapter, -+ &ReservedPagePacket[BufIndex - TxDescLen], -+ ProbeRspLength, _FALSE, _FALSE, _FALSE); -+ -+ CurtPktPageNum = (u8)PageNum(TxDescLen + ProbeRspLength, PageSize); -+ TotalPageNum += CurtPktPageNum; -+ TotalPacketLen = BufIndex + ProbeRspLength; -+ BufIndex += (CurtPktPageNum * PageSize); -+ RSVD_PAGE_CFG("ProbeRsp", CurtPktPageNum, TotalPageNum, TotalPacketLen); -+ goto download_page; -+ } -+ -+ /*======== ps-poll content * 1 page ========*/ -+ sta_iface = adapter; -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (!MLME_IS_STA(sta_iface) && DEV_STA_LD_NUM(adapter_to_dvobj(sta_iface))) { -+ sta_iface = _rtw_search_sta_iface(adapter); -+ RTW_INFO("get ("ADPT_FMT") to create PS-Poll/Null/QosNull\n", ADPT_ARG(sta_iface)); -+ } -+ #endif -+ -+ if (MLME_IS_STA(sta_iface) || (nr_assoc_if == 0)) { -+ RsvdPageLoc.LocPsPoll = TotalPageNum; -+ RTW_INFO("LocPsPoll: %d\n", RsvdPageLoc.LocPsPoll); -+ rtw_hal_construct_PSPoll(sta_iface, -+ &ReservedPagePacket[BufIndex], &PSPollLength); -+ rtw_hal_fill_fake_txdesc(sta_iface, -+ &ReservedPagePacket[BufIndex - TxDescLen], -+ PSPollLength, _TRUE, _FALSE, _FALSE); -+ -+ CurtPktPageNum = (u8)PageNum((TxDescLen + PSPollLength), PageSize); -+ -+ TotalPageNum += CurtPktPageNum; -+ -+ BufIndex += (CurtPktPageNum * PageSize); -+ RSVD_PAGE_CFG("PSPoll", CurtPktPageNum, TotalPageNum, TotalPacketLen); -+ } -+ -+#ifdef CONFIG_MCC_MODE -+ /*======== MCC * n page ======== */ -+ if (MCC_EN(adapter)) {/*Normal mode*/ -+ dl_mcc_page = rtw_hal_dl_mcc_fw_rsvd_page(adapter, ReservedPagePacket, -+ &BufIndex, TxDescLen, PageSize, &TotalPageNum, &RsvdPageLoc, page_num); -+ } else { -+ dl_mcc_page = _FAIL; -+ } -+ -+ if (dl_mcc_page == _FAIL) -+#endif /* CONFIG_MCC_MODE */ -+ { /*======== null data * 1 page ======== */ -+ if (MLME_IS_STA(sta_iface) || (nr_assoc_if == 0)) { -+ RsvdPageLoc.LocNullData = TotalPageNum; -+ RTW_INFO("LocNullData: %d\n", RsvdPageLoc.LocNullData); -+ rtw_hal_construct_NullFunctionData( -+ sta_iface, -+ &ReservedPagePacket[BufIndex], -+ &NullDataLength, -+ _FALSE, 0, 0, _FALSE); -+ rtw_hal_fill_fake_txdesc(sta_iface, -+ &ReservedPagePacket[BufIndex - TxDescLen], -+ NullDataLength, _FALSE, _FALSE, _FALSE); -+ -+ CurtPktPageNum = (u8)PageNum(TxDescLen + NullDataLength, PageSize); -+ -+ TotalPageNum += CurtPktPageNum; -+ -+ BufIndex += (CurtPktPageNum * PageSize); -+ RSVD_PAGE_CFG("NullData", CurtPktPageNum, TotalPageNum, TotalPacketLen); -+ } -+ } -+ -+ /*======== Qos null data * 1 page ======== */ -+ if (pwrctl->wowlan_mode == _FALSE || -+ pwrctl->wowlan_in_resume == _TRUE) {/*Normal mode*/ -+ if (MLME_IS_STA(sta_iface) || (nr_assoc_if == 0)) { -+ RsvdPageLoc.LocQosNull = TotalPageNum; -+ RTW_INFO("LocQosNull: %d\n", RsvdPageLoc.LocQosNull); -+ rtw_hal_construct_NullFunctionData(sta_iface, -+ &ReservedPagePacket[BufIndex], -+ &QosNullLength, -+ _TRUE, 0, 0, _FALSE); -+ rtw_hal_fill_fake_txdesc(sta_iface, -+ &ReservedPagePacket[BufIndex - TxDescLen], -+ QosNullLength, _FALSE, _FALSE, _FALSE); -+ -+ CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength, -+ PageSize); -+ -+ TotalPageNum += CurtPktPageNum; -+ -+ BufIndex += (CurtPktPageNum * PageSize); -+ RSVD_PAGE_CFG("QosNull", CurtPktPageNum, TotalPageNum, TotalPacketLen); -+ } -+ } -+ -+#ifdef CONFIG_BT_COEXIST -+ /*======== BT Qos null data * 1 page ======== */ -+ if (pwrctl->wowlan_mode == _FALSE || -+ pwrctl->wowlan_in_resume == _TRUE) {/*Normal mode*/ -+ -+ ap_iface = adapter; -+ #if defined (CONFIG_CONCURRENT_MODE) && defined(CONFIG_AP_MODE) -+ if (!MLME_IS_AP(ap_iface) && DEV_AP_NUM(adapter_to_dvobj(ap_iface))) { /*DEV_AP_STARTING_NUM*/ -+ ap_iface = _rtw_search_ap_iface(adapter); -+ RTW_INFO("get ("ADPT_FMT") to create BTQoSNull\n", ADPT_ARG(ap_iface)); -+ } -+ #endif -+ -+ if (MLME_IS_AP(ap_iface) || (nr_assoc_if == 0)) { -+ RsvdPageLoc.LocBTQosNull = TotalPageNum; -+ -+ RTW_INFO("LocBTQosNull: %d\n", RsvdPageLoc.LocBTQosNull); -+ -+ rtw_hal_construct_NullFunctionData(ap_iface, -+ &ReservedPagePacket[BufIndex], -+ &BTQosNullLength, -+ _TRUE, 0, 0, _FALSE); -+ -+ rtw_hal_fill_fake_txdesc(ap_iface, -+ &ReservedPagePacket[BufIndex - TxDescLen], -+ BTQosNullLength, _FALSE, _TRUE, _FALSE); -+ -+ CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength, -+ PageSize); -+ -+ TotalPageNum += CurtPktPageNum; -+ BufIndex += (CurtPktPageNum * PageSize); -+ -+ RSVD_PAGE_CFG("BTQosNull", CurtPktPageNum, TotalPageNum, TotalPacketLen); -+ } -+ } -+#endif /* CONFIG_BT_COEXIT */ -+ -+ TotalPacketLen = BufIndex; -+ -+#ifdef DBG_FW_DEBUG_MSG_PKT -+ /*======== FW DEBUG MSG * n page ======== */ -+ RsvdPageLoc.loc_fw_dbg_msg_pkt = TotalPageNum; -+ RTW_INFO("loc_fw_dbg_msg_pkt: %d\n", RsvdPageLoc.loc_fw_dbg_msg_pkt); -+ rtw_hal_construct_fw_dbg_msg_pkt( -+ adapter, -+ &ReservedPagePacket[BufIndex], -+ &fw_dbg_msg_pkt_len); -+ -+ rtw_hal_fill_fake_txdesc(adapter, -+ &ReservedPagePacket[BufIndex - TxDescLen], -+ fw_dbg_msg_pkt_len, _FALSE, _FALSE, _FALSE); -+ -+ CurtPktPageNum = (u8)PageNum(TxDescLen + fw_dbg_msg_pkt_len, PageSize); -+ -+ if (CurtPktPageNum < 2) -+ CurtPktPageNum = 2; /*Need at least 2 rsvd page*/ -+ TotalPageNum += CurtPktPageNum; -+ -+ TotalPacketLen = BufIndex + fw_dbg_msg_pkt_len; -+ BufIndex += (CurtPktPageNum * PageSize); -+#endif /*DBG_FW_DEBUG_MSG_PKT*/ -+ -+#ifdef CONFIG_LPS_PG -+ rtw_lps_pg_set_rsvd_page(adapter, ReservedPagePacket, &BufIndex -+ , TxDescLen, PageSize, &TotalPageNum, is_wow_mode -+ , (sta_iface && MLME_IS_STA(sta_iface) && MLME_IS_ASOC(sta_iface)) ? sta_iface : NULL -+ , page_num ? 1 : 0 -+ ); -+ TotalPacketLen = BufIndex; -+#endif -+ -+#ifdef CONFIG_WOWLAN -+ /*======== WOW * n page ======== */ -+ if (pwrctl->wowlan_mode == _TRUE && -+ pwrctl->wowlan_in_resume == _FALSE && -+ check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) {/*WOW mode*/ -+ rtw_hal_set_wow_fw_rsvd_page(adapter, ReservedPagePacket, -+ BufIndex, TxDescLen, PageSize, -+ &TotalPageNum, &TotalPacketLen, &RsvdPageLoc); -+#ifdef CONFIG_WAR_OFFLOAD -+ rtw_hal_set_war_offload_parm(adapter, &RsvdPageLoc); -+#endif /* CONFIG_WAR_OFFLOAD */ -+ } -+#endif /* CONFIG_WOWLAN */ -+ -+#ifdef CONFIG_P2P_WOWLAN -+ /*======== P2P WOW * n page ======== */ -+ if (_TRUE == pwrctl->wowlan_p2p_mode) {/*WOW mode*/ -+ rtw_hal_set_p2p_wow_fw_rsvd_page(adapter, ReservedPagePacket, -+ BufIndex, TxDescLen, PageSize, -+ &TotalPageNum, &TotalPacketLen, &RsvdPageLoc); -+ } -+#endif /* CONFIG_P2P_WOWLAN */ -+ -+ /*Note: BufIndex already add a TxDescOffset offset in first Beacon page -+ * The "TotalPacketLen" is calculate by BufIndex. -+ * We need to decrease TxDescOffset before doing length check. by yiwei -+ */ -+ TotalPacketLen = TotalPacketLen - TxDescOffset; -+ -+download_page: -+ if (page_num) { -+ *page_num = TotalPageNum; -+ rtw_mfree(ReservedPagePacket, MAX_CMDBUF_SZ); -+ ReservedPagePacket = NULL; -+ RTW_INFO(FUNC_ADPT_FMT" Get [ %s ] RsvdPageNUm <==\n", -+ FUNC_ADPT_ARG(adapter), (is_wow_mode) ? "WOW" : "NOR"); -+ return; -+ } -+ -+ /* RTW_INFO("%s BufIndex(%d), TxDescLen(%d), PageSize(%d)\n",__func__, BufIndex, TxDescLen, PageSize);*/ -+ RTW_INFO("%s PageNum(%d), pktlen(%d)\n", -+ __func__, TotalPageNum, TotalPacketLen); -+ -+ if (TotalPacketLen > MaxRsvdPageBufSize) { -+ RTW_ERR("%s : rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n", -+ __FUNCTION__, TotalPacketLen, MaxRsvdPageBufSize); -+ rtw_warn_on(1); -+ goto error; -+ } else { -+ /* update attribute */ -+ pattrib = &pcmdframe->attrib; -+ update_mgntframe_attrib(adapter, pattrib); -+ pattrib->qsel = QSLT_BEACON; -+ pattrib->pktlen = TotalPacketLen; -+ pattrib->last_txcmdsz = TotalPacketLen; -+#ifdef CONFIG_PCI_HCI -+ dump_mgntframe(adapter, pcmdframe); -+#else -+ dump_mgntframe_and_wait(adapter, pcmdframe, 100); -+#endif -+ } -+ -+ RTW_INFO("%s: Set RSVD page location to Fw ,TotalPacketLen(%d), TotalPageNum(%d)\n", -+ __func__, TotalPacketLen, TotalPageNum); -+#ifdef DBG_DUMP_SET_RSVD_PAGE -+ RTW_INFO(" ==================================================\n"); -+ RTW_INFO_DUMP("\n", ReservedPagePacket, TotalPacketLen); -+ RTW_INFO(" ==================================================\n"); -+#endif -+ -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) -+ || MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)){ -+ rtw_hal_set_FwRsvdPage_cmd(adapter, &RsvdPageLoc); -+#ifdef DBG_FW_DEBUG_MSG_PKT -+ rtw_hal_set_fw_dbg_msg_pkt_rsvd_page_cmd(adapter, &RsvdPageLoc); -+#endif /*DBG_FW_DEBUG_MSG_PKT*/ -+#ifdef CONFIG_WOWLAN -+ if (pwrctl->wowlan_mode == _TRUE && -+ pwrctl->wowlan_in_resume == _FALSE) -+ rtw_hal_set_FwAoacRsvdPage_cmd(adapter, &RsvdPageLoc); -+#endif /* CONFIG_WOWLAN */ -+#ifdef CONFIG_AP_WOWLAN -+ if (pwrctl->wowlan_ap_mode == _TRUE) -+ rtw_hal_set_ap_rsvdpage_loc_cmd(adapter, &RsvdPageLoc); -+#endif /* CONFIG_AP_WOWLAN */ -+ } else if (pwrctl->wowlan_pno_enable) { -+#ifdef CONFIG_PNO_SUPPORT -+ rtw_hal_set_FwAoacRsvdPage_cmd(adapter, &RsvdPageLoc); -+ if (pwrctl->wowlan_in_resume) -+ rtw_hal_set_scan_offload_info_cmd(adapter, -+ &RsvdPageLoc, 0); -+ else -+ rtw_hal_set_scan_offload_info_cmd(adapter, -+ &RsvdPageLoc, 1); -+#endif /* CONFIG_PNO_SUPPORT */ -+ } -+ -+#ifdef CONFIG_P2P_WOWLAN -+ if (_TRUE == pwrctl->wowlan_p2p_mode) -+ rtw_hal_set_FwP2PRsvdPage_cmd(adapter, &RsvdPageLoc); -+#endif /* CONFIG_P2P_WOWLAN */ -+ -+ return; -+error: -+ rtw_free_xmitframe(pxmitpriv, pcmdframe); -+} -+ -+void rtw_hal_set_fw_rsvd_page(struct _ADAPTER *adapter, bool finished) -+{ -+#ifdef CONFIG_AP_MODE -+ if (finished) -+ rtw_mi_tx_beacon_hdl(adapter); -+ else -+#endif -+ _rtw_hal_set_fw_rsvd_page(adapter, finished, NULL); -+} -+ -+static u8 rtw_hal_set_fw_bcn_early_c2h_rpt_cmd(struct _ADAPTER *adapter, u8 enable) -+{ -+ u8 u1H2CSetPwrMode[H2C_PWRMODE_LEN] = {0}; -+ u8 ret = _FAIL; -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_CH_SW -+ if (ATOMIC_READ(&adapter->tdlsinfo.chsw_info.chsw_on) == _TRUE) -+ { -+ SET_H2CCMD_PWRMODE_PARM_RLBM(u1H2CSetPwrMode, 1); -+ SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1H2CSetPwrMode, 0); -+ } -+#endif -+#endif -+ -+ SET_H2CCMD_PWRMODE_PARM_MODE(u1H2CSetPwrMode, 0); -+ SET_H2CCMD_PWRMODE_PARM_PWR_STATE(u1H2CSetPwrMode, 0x0C); -+ SET_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(u1H2CSetPwrMode, enable); -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, -+ H2C_SET_PWR_MODE, -+ H2C_PWRMODE_LEN, -+ u1H2CSetPwrMode); -+ -+ RTW_PRINT("-%s()-\n", __func__); -+ -+ return ret; -+} -+ -+/** -+ * rtw_hal_get_rsvd_page_num() - Get needed reserved page number -+ * @adapter: struct _ADAPTER* -+ * -+ * Caculate needed reserved page number. -+ * In different state would get different number, for example normal mode and -+ * WOW mode would need different reserved page size. -+ * -+ * Return the number of reserved page which driver need. -+ */ -+u8 rtw_hal_get_rsvd_page_num(struct _ADAPTER *adapter) -+{ -+ u8 num = 0; -+ -+ -+ _rtw_hal_set_fw_rsvd_page(adapter, _FALSE, &num); -+ -+ return num; -+} -+ -+#ifndef CONFIG_HAS_HW_VAR_BCN_FUNC -+static void hw_var_set_bcn_func(_adapter *adapter, u8 enable) -+{ -+ u32 bcn_ctrl_reg; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (adapter->hw_port == HW_PORT1) -+ bcn_ctrl_reg = REG_BCN_CTRL_1; -+ else -+#endif -+ bcn_ctrl_reg = REG_BCN_CTRL; -+ -+ if (enable) -+ rtw_write8(adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); -+ else { -+ u8 val8; -+ -+ val8 = rtw_read8(adapter, bcn_ctrl_reg); -+ val8 &= ~(EN_BCN_FUNCTION | EN_TXBCN_RPT); -+ -+#ifdef CONFIG_BT_COEXIST -+ if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist == 1) { -+ /* Always enable port0 beacon function for PSTDMA */ -+ if (REG_BCN_CTRL == bcn_ctrl_reg) -+ val8 |= EN_BCN_FUNCTION; -+ } -+#endif -+ -+ rtw_write8(adapter, bcn_ctrl_reg, val8); -+ } -+ -+#ifdef CONFIG_RTL8192F -+ if (IS_HARDWARE_TYPE_8192F(adapter)) { -+ u16 val16, val16_ori; -+ -+ val16_ori = val16 = rtw_read16(adapter, REG_WLAN_ACT_MASK_CTRL_1); -+ -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (adapter->hw_port == HW_PORT1) { -+ if (enable) -+ val16 |= EN_PORT_1_FUNCTION; -+ else -+ val16 &= ~EN_PORT_1_FUNCTION; -+ } else -+ #endif -+ { -+ if (enable) -+ val16 |= EN_PORT_0_FUNCTION; -+ else -+ val16 &= ~EN_PORT_0_FUNCTION; -+ -+ #ifdef CONFIG_BT_COEXIST -+ if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist == 1) -+ val16 |= EN_PORT_0_FUNCTION; -+ #endif -+ } -+ -+ if (val16 != val16_ori) -+ rtw_write16(adapter, REG_WLAN_ACT_MASK_CTRL_1, val16); -+ } -+#endif -+} -+#endif -+ -+#ifndef CONFIG_HAS_HW_VAR_MLME_DISCONNECT -+static void hw_var_set_mlme_disconnect(_adapter *adapter) -+{ -+ u8 val8; -+ -+ /* reject all data frames */ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE) -+#endif -+ rtw_write16(adapter, REG_RXFLTMAP2, 0x0000); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (adapter->hw_port == HW_PORT1) { -+ /* reset TSF1 */ -+ rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(1)); -+ -+ /* disable update TSF1 */ -+ rtw_iface_disable_tsf_update(adapter); -+ -+ if (!IS_HARDWARE_TYPE_8723D(adapter) -+ && !IS_HARDWARE_TYPE_8192F(adapter) -+ && !IS_HARDWARE_TYPE_8710B(adapter) -+ ) { -+ /* disable Port1's beacon function */ -+ val8 = rtw_read8(adapter, REG_BCN_CTRL_1); -+ val8 &= ~EN_BCN_FUNCTION; -+ rtw_write8(adapter, REG_BCN_CTRL_1, val8); -+ } -+ } else -+#endif -+ { -+ /* reset TSF */ -+ rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(0)); -+ -+ /* disable update TSF */ -+ rtw_iface_disable_tsf_update(adapter); -+ } -+} -+#endif -+ -+static void hw_var_set_mlme_sitesurvey(_adapter *adapter, u8 enable) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u16 value_rxfltmap2; -+ -+#ifdef DBG_IFACE_STATUS -+ DBG_IFACE_STATUS_DUMP(adapter); -+#endif -+ -+#ifdef CONFIG_FIND_BEST_CHANNEL -+ /* Receive all data frames */ -+ value_rxfltmap2 = 0xFFFF; -+#else -+ /* not to receive data frame */ -+ value_rxfltmap2 = 0; -+#endif -+ -+ if (enable) { /* under sitesurvey */ -+ /* -+ * 1. configure REG_RXFLTMAP2 -+ * 2. disable TSF update & buddy TSF update to avoid updating wrong TSF due to clear RCR_CBSSID_BCN -+ * 3. config RCR to receive different BSSID BCN or probe rsp -+ */ -+ rtw_write16(adapter, REG_RXFLTMAP2, value_rxfltmap2); -+ -+ rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_ENTER); -+ -+ /* Save orignal RRSR setting, only 8812 set RRSR after set ch/bw/band */ -+ #if defined (CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ hal_data->RegRRSR = rtw_read32(adapter, REG_RRSR); -+ hal_data->RegRRSR &= 0x000FFFFF; -+ #endif -+ -+ #if defined(CONFIG_BEAMFORMING) && (defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)) -+ if (IS_8812_SERIES(hal_data->version_id) || IS_8821_SERIES(hal_data->version_id)) { -+ /* set 718[1:0]=2'b00 to avoid BF scan hang */ -+ hal_data->backup_snd_ptcl_ctrl = rtw_read8(adapter, REG_SND_PTCL_CTRL_8812A); -+ rtw_write8(adapter, REG_SND_PTCL_CTRL_8812A, (hal_data->backup_snd_ptcl_ctrl & 0xfc)); -+ } -+ #endif -+ -+ if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) -+ StopTxBeacon(adapter); -+ } else { /* sitesurvey done */ -+ /* -+ * 1. enable rx data frame -+ * 2. config RCR not to receive different BSSID BCN or probe rsp -+ * 3. doesn't enable TSF update & buddy TSF right now to avoid HW conflict -+ * so, we enable TSF update when rx first BCN after sitesurvey done -+ */ -+ if (rtw_mi_check_fwstate(adapter, WIFI_ASOC_STATE | WIFI_AP_STATE | WIFI_MESH_STATE)) { -+ /* enable to rx data frame */ -+ rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); -+ } -+ -+ rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_DONE); -+ -+ /* Restore orignal RRSR setting,only 8812 set RRSR after set ch/bw/band */ -+ #if defined (CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ rtw_phydm_set_rrsr(adapter, hal_data->RegRRSR, TRUE); -+ #endif -+ -+ #if defined(CONFIG_BEAMFORMING) && (defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)) -+ if (IS_8812_SERIES(hal_data->version_id) || IS_8821_SERIES(hal_data->version_id)) { -+ /* Restore orignal 0x718 setting*/ -+ rtw_write8(adapter, REG_SND_PTCL_CTRL_8812A, hal_data->backup_snd_ptcl_ctrl); -+ } -+ #endif -+ -+ #ifdef CONFIG_AP_MODE -+ if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) { -+ ResumeTxBeacon(adapter); -+ rtw_mi_tx_beacon_hdl(adapter); -+ } -+ #endif -+ } -+} -+ -+#ifndef CONFIG_HAS_HW_VAR_MLME_JOIN -+static void hw_var_set_mlme_join(_adapter *adapter, u8 type) -+{ -+ u8 val8; -+ u16 val16; -+ u32 val32; -+ u8 RetryLimit = RL_VAL_STA; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (type == 0) { -+ /* prepare to join */ -+ if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) -+ StopTxBeacon(adapter); -+ -+ /* enable to rx data frame.Accept all data frame */ -+ rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) -+ RetryLimit = (hal_data->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA; -+ else /* Ad-hoc Mode */ -+ RetryLimit = RL_VAL_AP; -+ -+ rtw_iface_enable_tsf_update(adapter); -+ -+ } else if (type == 1) { -+ /* joinbss_event call back when join res < 0 */ -+ if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE) -+ rtw_write16(adapter, REG_RXFLTMAP2, 0x00); -+ -+ rtw_iface_disable_tsf_update(adapter); -+ -+ if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) { -+ ResumeTxBeacon(adapter); -+ -+ /* reset TSF 1/2 after ResumeTxBeacon */ -+ rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(1) | BIT(0)); -+ } -+ -+ } else if (type == 2) { -+ /* sta add event call back */ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) { -+ /* fixed beacon issue for 8191su........... */ -+ rtw_write8(adapter, 0x542 , 0x02); -+ RetryLimit = RL_VAL_AP; -+ } -+ -+ if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) { -+ ResumeTxBeacon(adapter); -+ -+ /* reset TSF 1/2 after ResumeTxBeacon */ -+ rtw_write8(adapter, REG_DUAL_TSF_RST, BIT(1) | BIT(0)); -+ } -+ } -+ -+ val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit); -+ rtw_write16(adapter, REG_RETRY_LIMIT, val16); -+#else /* !CONFIG_CONCURRENT_MODE */ -+ if (type == 0) { /* prepare to join */ -+ /* enable to rx data frame.Accept all data frame */ -+ rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) -+ RetryLimit = (hal_data->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA; -+ else /* Ad-hoc Mode */ -+ RetryLimit = RL_VAL_AP; -+ -+ rtw_iface_enable_tsf_update(adapter); -+ -+ } else if (type == 1) { /* joinbss_event call back when join res < 0 */ -+ rtw_write16(adapter, REG_RXFLTMAP2, 0x00); -+ -+ rtw_iface_disable_tsf_update(adapter); -+ -+ } else if (type == 2) { /* sta add event call back */ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) -+ RetryLimit = RL_VAL_AP; -+ } -+ -+ val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit); -+ rtw_write16(adapter, REG_RETRY_LIMIT, val16); -+#endif /* !CONFIG_CONCURRENT_MODE */ -+} -+#endif -+ -+#ifdef CONFIG_TSF_RESET_OFFLOAD -+static int rtw_hal_h2c_reset_tsf(_adapter *adapter, u8 reset_port) -+{ -+ u8 buf[2]; -+ int ret; -+ -+ if (reset_port == HW_PORT0) { -+ buf[0] = 0x1; -+ buf[1] = 0; -+ } else { -+ buf[0] = 0x0; -+ buf[1] = 0x1; -+ } -+ -+ ret = rtw_hal_fill_h2c_cmd(adapter, H2C_RESET_TSF, 2, buf); -+ -+ return ret; -+} -+ -+int rtw_hal_reset_tsf(_adapter *adapter, u8 reset_port) -+{ -+ u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0; -+ u32 reg_reset_tsf_cnt = (reset_port == HW_PORT0) ? -+ REG_FW_RESET_TSF_CNT_0 : REG_FW_RESET_TSF_CNT_1; -+ int ret; -+ -+ /* site survey will cause reset tsf fail */ -+ rtw_mi_buddy_scan_abort(adapter, _FALSE); -+ reset_cnt_after = reset_cnt_before = rtw_read8(adapter, reg_reset_tsf_cnt); -+ ret = rtw_hal_h2c_reset_tsf(adapter, reset_port); -+ if (ret != _SUCCESS) -+ return ret; -+ -+ while ((reset_cnt_after == reset_cnt_before) && (loop_cnt < 10)) { -+ rtw_msleep_os(100); -+ loop_cnt++; -+ reset_cnt_after = rtw_read8(adapter, reg_reset_tsf_cnt); -+ } -+ -+ return (loop_cnt >= 10) ? _FAIL : _SUCCESS; -+} -+#endif /* CONFIG_TSF_RESET_OFFLOAD */ -+ -+#ifndef CONFIG_HAS_HW_VAR_CORRECT_TSF -+#ifdef CONFIG_HW_P0_TSF_SYNC -+#ifdef CONFIG_CONCURRENT_MODE -+static void hw_port0_tsf_sync_sel(_adapter *adapter, u8 benable, u8 hw_port, u16 tr_offset) -+{ -+ u8 val8; -+ u8 client_id = 0; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(adapter) && (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC))) { -+ RTW_INFO("[MCC] do not set HW TSF sync\n"); -+ return; -+ } -+#endif -+ /* check if port0 is already synced */ -+ if (benable && dvobj->p0_tsf.sync_port != MAX_HW_PORT && dvobj->p0_tsf.sync_port == hw_port) { -+ RTW_WARN(FUNC_ADPT_FMT ": port0 already enable TSF sync(%d)\n", -+ FUNC_ADPT_ARG(adapter), dvobj->p0_tsf.sync_port); -+ return; -+ } -+ -+ /* check if port0 already disable sync */ -+ if (!benable && dvobj->p0_tsf.sync_port == MAX_HW_PORT) { -+ RTW_WARN(FUNC_ADPT_FMT ": port0 already disable TSF sync\n", FUNC_ADPT_ARG(adapter)); -+ return; -+ } -+ -+ /* check if port0 sync to port0 */ -+ if (benable && hw_port == HW_PORT0) { -+ RTW_ERR(FUNC_ADPT_FMT ": hw_port is port0 under enable\n", FUNC_ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ /*0x5B4 [6:4] :SYNC_CLI_SEL - The selector for the CLINT port of sync tsft source for port 0*/ -+ /* Bit[5:4] : 0 for clint0, 1 for clint1, 2 for clint2, 3 for clint3. -+ Bit6 : 1= enable sync to port 0. 0=disable sync to port 0.*/ -+ -+ val8 = rtw_read8(adapter, REG_TIMER0_SRC_SEL); -+ -+ if (benable) { -+ /*Disable Port0's beacon function*/ -+ rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) & ~BIT_EN_BCN_FUNCTION); -+ -+ /*Reg 0x518[15:0]: TSFTR_SYN_OFFSET*/ -+ if (tr_offset) -+ rtw_write16(adapter, REG_TSFTR_SYN_OFFSET, tr_offset); -+ -+ /*reg 0x577[6]=1*/ /*auto sync by tbtt*/ -+ rtw_write8(adapter, REG_MISC_CTRL, rtw_read8(adapter, REG_MISC_CTRL) | BIT_AUTO_SYNC_BY_TBTT); -+ -+ if (HW_PORT1 == hw_port) -+ client_id = 0; -+ else if (HW_PORT2 == hw_port) -+ client_id = 1; -+ else if (HW_PORT3 == hw_port) -+ client_id = 2; -+ else if (HW_PORT4 == hw_port) -+ client_id = 3; -+ -+ val8 &= 0x8F; -+ val8 |= (BIT(6) | (client_id << 4)); -+ -+ dvobj->p0_tsf.sync_port = hw_port; -+ dvobj->p0_tsf.offset = tr_offset; -+ rtw_write8(adapter, REG_TIMER0_SRC_SEL, val8); -+ -+ /*Enable Port0's beacon function*/ -+ rtw_write8(adapter, REG_BCN_CTRL, rtw_read8(adapter, REG_BCN_CTRL) | BIT_EN_BCN_FUNCTION); -+ RTW_INFO("%s Port_%d TSF sync to P0, timer offset :%d\n", __func__, hw_port, tr_offset); -+ } else { -+ val8 &= ~BIT(6); -+ -+ dvobj->p0_tsf.sync_port = MAX_HW_PORT; -+ dvobj->p0_tsf.offset = 0; -+ rtw_write8(adapter, REG_TIMER0_SRC_SEL, val8); -+ RTW_INFO("%s P0 TSF sync disable\n", __func__); -+ } -+} -+static _adapter * _search_ld_sta(_adapter *adapter, u8 include_self) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 i; -+ _adapter *iface = NULL; -+ -+ if (rtw_mi_get_assoced_sta_num(adapter) == 0) { -+ RTW_ERR("STA_LD_NUM == 0\n"); -+ rtw_warn_on(1); -+ } -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ if (include_self == _FALSE && adapter == iface) -+ continue; -+ if (is_client_associated_to_ap(iface)) -+ break; -+ } -+ if (iface) -+ RTW_INFO("search STA iface -"ADPT_FMT"\n", ADPT_ARG(iface)); -+ return iface; -+} -+#endif /*CONFIG_CONCURRENT_MODE*/ -+/*Correct port0's TSF*/ -+/*#define DBG_P0_TSF_SYNC*/ -+void hw_var_set_correct_tsf(PADAPTER adapter, u8 mlme_state) -+{ -+#ifdef CONFIG_CONCURRENT_MODE -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ _adapter *sta_if = NULL; -+ u8 hw_port; -+ -+ RTW_INFO(FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(adapter)); -+ #ifdef DBG_P0_TSF_SYNC -+ RTW_INFO("[TSF_SYNC] AP_NUM = %d\n", rtw_mi_get_ap_num(adapter)); -+ RTW_INFO("[TSF_SYNC] MESH_NUM = %d\n", rtw_mi_get_mesh_num(adapter)); -+ RTW_INFO("[TSF_SYNC] LD_STA_NUM = %d\n", rtw_mi_get_assoced_sta_num(adapter)); -+ if (dvobj->p0_tsf.sync_port == MAX_HW_PORT) -+ RTW_INFO("[TSF_SYNC] org p0 sync port = N/A\n"); -+ else -+ RTW_INFO("[TSF_SYNC] org p0 sync port = %d\n", dvobj->p0_tsf.sync_port); -+ RTW_INFO("[TSF_SYNC] timer offset = %d\n", dvobj->p0_tsf.offset); -+ #endif -+ switch (mlme_state) { -+ case MLME_STA_CONNECTED : -+ { -+ hw_port = rtw_hal_get_port(adapter); -+ -+ if (!MLME_IS_STA(adapter)) { -+ RTW_ERR("STA CON state,but iface("ADPT_FMT") is not STA\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ } -+ -+ if ((dvobj->p0_tsf.sync_port != MAX_HW_PORT) && (hw_port == HW_PORT0)) { -+ RTW_ERR(ADPT_FMT" is STA with P0 connected => DIS P0_TSF_SYNC\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ hw_port0_tsf_sync_sel(adapter, _FALSE, 0, 0); -+ } -+ -+ if ((dvobj->p0_tsf.sync_port == MAX_HW_PORT) && -+ (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter))) { -+ hw_port0_tsf_sync_sel(adapter, _TRUE, hw_port, 50);/*timer offset 50ms*/ -+ #ifdef DBG_P0_TSF_SYNC -+ RTW_INFO("[TSF_SYNC] STA_LINKED => EN P0_TSF_SYNC\n"); -+ #endif -+ } -+ } -+ break; -+ case MLME_STA_DISCONNECTED : -+ { -+ hw_port = rtw_hal_get_port(adapter); -+ -+ if (!MLME_IS_STA(adapter)) { -+ RTW_ERR("STA DIS_CON state,but iface("ADPT_FMT") is not STA\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ } -+ -+ if (dvobj->p0_tsf.sync_port == hw_port) { -+ if (rtw_mi_get_assoced_sta_num(adapter) >= 2) { -+ /* search next appropriate sta*/ -+ sta_if = _search_ld_sta(adapter, _FALSE); -+ if (sta_if) { -+ hw_port = rtw_hal_get_port(sta_if); -+ hw_port0_tsf_sync_sel(adapter, _TRUE, hw_port, 50);/*timer offset 50ms*/ -+ #ifdef DBG_P0_TSF_SYNC -+ RTW_INFO("[TSF_SYNC] STA_DIS_CON => CHANGE P0_TSF_SYNC\n"); -+ #endif -+ } -+ } else if (rtw_mi_get_assoced_sta_num(adapter) == 1) { -+ hw_port0_tsf_sync_sel(adapter, _FALSE, 0, 0); -+ #ifdef DBG_P0_TSF_SYNC -+ RTW_INFO("[TSF_SYNC] STA_DIS_CON => DIS P0_TSF_SYNC\n"); -+ #endif -+ } -+ } -+ } -+ break; -+#ifdef CONFIG_AP_MODE -+ case MLME_AP_STARTED : -+ case MLME_MESH_STARTED : -+ { -+ if (!(MLME_IS_AP(adapter) || MLME_IS_MESH(adapter))) { -+ RTW_ERR("AP START state,but iface("ADPT_FMT") is not AP\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ } -+ -+ if ((dvobj->p0_tsf.sync_port == MAX_HW_PORT) && -+ rtw_mi_get_assoced_sta_num(adapter)) { -+ /* get port of sta */ -+ sta_if = _search_ld_sta(adapter, _FALSE); -+ if (sta_if) { -+ hw_port = rtw_hal_get_port(sta_if); -+ hw_port0_tsf_sync_sel(adapter, _TRUE, hw_port, 50);/*timer offset 50ms*/ -+ #ifdef DBG_P0_TSF_SYNC -+ RTW_INFO("[TSF_SYNC] AP_START => EN P0_TSF_SYNC\n"); -+ #endif -+ } -+ } -+ } -+ break; -+ case MLME_AP_STOPPED : -+ case MLME_MESH_STOPPED : -+ { -+ if (!(MLME_IS_AP(adapter) || MLME_IS_MESH(adapter))) { -+ RTW_ERR("AP START state,but iface("ADPT_FMT") is not AP\n", ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ } -+ /*stop ap mode*/ -+ if ((rtw_mi_get_ap_num(adapter) + rtw_mi_get_mesh_num(adapter) == 1) && -+ (dvobj->p0_tsf.sync_port != MAX_HW_PORT)) { -+ hw_port0_tsf_sync_sel(adapter, _FALSE, 0, 0); -+ #ifdef DBG_P0_TSF_SYNC -+ RTW_INFO("[TSF_SYNC] AP_STOP => DIS P0_TSF_SYNC\n"); -+ #endif -+ } -+ } -+ break; -+#endif /* CONFIG_AP_MODE */ -+ default : -+ RTW_ERR(FUNC_ADPT_FMT" unknow state(0x%02x)\n", FUNC_ADPT_ARG(adapter), mlme_state); -+ break; -+ } -+ -+ /*#ifdef DBG_P0_TSF_SYNC*/ -+ #if 1 -+ if (dvobj->p0_tsf.sync_port == MAX_HW_PORT) -+ RTW_INFO("[TSF_SYNC] p0 sync port = N/A\n"); -+ else -+ RTW_INFO("[TSF_SYNC] p0 sync port = %d\n", dvobj->p0_tsf.sync_port); -+ RTW_INFO("[TSF_SYNC] timer offset = %d\n", dvobj->p0_tsf.offset); -+ #endif -+#endif /*CONFIG_CONCURRENT_MODE*/ -+} -+ -+#else /*! CONFIG_HW_P0_TSF_SYNC*/ -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+static void hw_var_set_correct_tsf(_adapter *adapter, u8 mlme_state) -+{ -+ /*do nothing*/ -+} -+#else /* !CONFIG_MI_WITH_MBSSID_CAM*/ -+static void rtw_hal_correct_tsf(_adapter *padapter, u8 hw_port, u64 tsf) -+{ -+ if (hw_port == HW_PORT0) { -+ /*disable related TSF function*/ -+ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~EN_BCN_FUNCTION)); -+#if defined(CONFIG_RTL8192F) -+ rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter, -+ REG_WLAN_ACT_MASK_CTRL_1) & ~EN_PORT_0_FUNCTION); -+#endif -+ -+ rtw_write32(padapter, REG_TSFTR, tsf); -+ rtw_write32(padapter, REG_TSFTR + 4, tsf >> 32); -+ -+ /*enable related TSF function*/ -+ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | EN_BCN_FUNCTION); -+#if defined(CONFIG_RTL8192F) -+ rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter, -+ REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_0_FUNCTION); -+#endif -+ } else if (hw_port == HW_PORT1) { -+ /*disable related TSF function*/ -+ rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) & (~EN_BCN_FUNCTION)); -+#if defined(CONFIG_RTL8192F) -+ rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter, -+ REG_WLAN_ACT_MASK_CTRL_1) & ~EN_PORT_1_FUNCTION); -+#endif -+ -+ rtw_write32(padapter, REG_TSFTR1, tsf); -+ rtw_write32(padapter, REG_TSFTR1 + 4, tsf >> 32); -+ -+ /*enable related TSF function*/ -+ rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1) | EN_BCN_FUNCTION); -+#if defined(CONFIG_RTL8192F) -+ rtw_write16(padapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(padapter, -+ REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_1_FUNCTION); -+#endif -+ } else -+ RTW_INFO("%s-[WARN] "ADPT_FMT" invalid hw_port:%d\n", __func__, ADPT_ARG(padapter), hw_port); -+} -+static void hw_var_set_correct_tsf(_adapter *adapter, u8 mlme_state) -+{ -+ u64 tsf; -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *mlmeinfo = &(mlmeext->mlmext_info); -+ -+ tsf = mlmeext->TSFValue - rtw_modular64(mlmeext->TSFValue, (mlmeinfo->bcn_interval * 1024)) - 1024; /*us*/ -+ -+ if ((mlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE -+ || (mlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) -+ StopTxBeacon(adapter); -+ -+ rtw_hal_correct_tsf(adapter, adapter->hw_port, tsf); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ /* Update buddy port's TSF if it is SoftAP/Mesh for beacon TX issue! */ -+ if ((mlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE -+ && (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) -+ ) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ int i; -+ _adapter *iface; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ if (iface == adapter) -+ continue; -+ -+ #ifdef CONFIG_AP_MODE -+ if ((MLME_IS_AP(iface) || MLME_IS_MESH(iface)) -+ && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE -+ ) { -+ rtw_hal_correct_tsf(iface, iface->hw_port, tsf); -+ #ifdef CONFIG_TSF_RESET_OFFLOAD -+ if (rtw_hal_reset_tsf(iface, iface->hw_port) == _FAIL) -+ RTW_INFO("%s-[ERROR] "ADPT_FMT" Reset port%d TSF fail\n" -+ , __func__, ADPT_ARG(iface), iface->hw_port); -+ #endif /* CONFIG_TSF_RESET_OFFLOAD*/ -+ } -+ #endif /* CONFIG_AP_MODE */ -+ } -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ if ((mlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE -+ || (mlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) -+ ResumeTxBeacon(adapter); -+} -+#endif /*#ifdef CONFIG_MI_WITH_MBSSID_CAM*/ -+#endif /*#ifdef CONFIG_HW_P0_TSF_SYNC*/ -+#endif /*#ifndef CONFIG_HAS_HW_VAR_CORRECT_TSF*/ -+ -+u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u64 tsftr = 0; -+ -+ if (port >= hal_spec->port_num) { -+ RTW_ERR("%s invalid port(%d) \n", __func__, port); -+ goto exit; -+ } -+ -+ switch (rtw_get_chip_type(adapter)) { -+#if defined(CONFIG_RTL8814B) -+ case RTL8814B: -+ { -+ u8 val8; -+ -+ /* 0x1500[6:4] - BIT_BCN_TIMER_SEL_FWRD_V1 */ -+ val8 = rtw_read8(adapter, REG_PORT_CTRL_SEL); -+ val8 &= ~0x70; -+ val8 |= port << 4; -+ rtw_write8(adapter, REG_PORT_CTRL_SEL, val8); -+ -+ tsftr = rtw_read32(adapter, REG_TSFTR_HIGH); -+ tsftr = tsftr << 32; -+ tsftr |= rtw_read32(adapter, REG_TSFTR_LOW); -+ -+ break; -+ } -+#endif -+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) -+ case RTL8814A: -+ case RTL8822B: -+ case RTL8821C: -+ case RTL8822C: -+ { -+ u8 val8; -+ -+ /* 0x554[30:28] - BIT_BCN_TIMER_SEL_FWRD */ -+ val8 = rtw_read8(adapter, REG_MBSSID_BCN_SPACE + 3); -+ val8 &= 0x8F; -+ val8 |= port << 4; -+ rtw_write8(adapter, REG_MBSSID_BCN_SPACE + 3, val8); -+ -+ tsftr = rtw_read32(adapter, REG_TSFTR + 4); -+ tsftr = tsftr << 32; -+ tsftr |= rtw_read32(adapter, REG_TSFTR); -+ -+ break; -+ } -+#endif -+#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) \ -+ || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8192F) \ -+ || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8723D) \ -+ || defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) \ -+ || defined(CONFIG_RTL8710B) -+ case RTL8188E: -+ case RTL8188F: -+ case RTL8188GTV: -+ case RTL8192E: -+ case RTL8192F: -+ case RTL8723B: -+ case RTL8703B: -+ case RTL8723D: -+ case RTL8812: -+ case RTL8821: -+ case RTL8710B: -+ { -+ u32 addr; -+ -+ if (port == HW_PORT0) -+ addr = REG_TSFTR; -+ else if (port == HW_PORT1) -+ addr = REG_TSFTR1; -+ else { -+ RTW_ERR("%s unknown port(%d) \n", __func__, port); -+ goto exit; -+ } -+ -+ tsftr = rtw_read32(adapter, addr + 4); -+ tsftr = tsftr << 32; -+ tsftr |= rtw_read32(adapter, addr); -+ -+ break; -+ } -+#endif -+ default: -+ RTW_ERR("%s unknow chip type\n", __func__); -+ } -+ -+exit: -+ return tsftr; -+} -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_CH_SW -+s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ u8 ch_sw_h2c_buf[4] = {0x00, 0x00, 0x00, 0x00}; -+ -+ -+ SET_H2CCMD_CH_SW_OPER_OFFLOAD_CH_NUM(ch_sw_h2c_buf, channel); -+ SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_MODE(ch_sw_h2c_buf, bwmode); -+ switch (bwmode) { -+ case CHANNEL_WIDTH_40: -+ SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_40M_SC(ch_sw_h2c_buf, channel_offset); -+ break; -+ case CHANNEL_WIDTH_80: -+ SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_80M_SC(ch_sw_h2c_buf, channel_offset); -+ break; -+ case CHANNEL_WIDTH_20: -+ default: -+ break; -+ } -+ SET_H2CCMD_CH_SW_OPER_OFFLOAD_RFE_TYPE(ch_sw_h2c_buf, pHalData->rfe_type); -+ -+ return rtw_hal_fill_h2c_cmd(padapter, H2C_CHNL_SWITCH_OPER_OFFLOAD, sizeof(ch_sw_h2c_buf), ch_sw_h2c_buf); -+} -+#endif -+#endif -+ -+#ifdef CONFIG_WMMPS_STA -+void rtw_hal_update_uapsd_tid(_adapter *adapter) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct qos_priv *pqospriv = &pmlmepriv->qospriv; -+ -+ /* write complement of pqospriv->uapsd_tid to mac register 0x693 because -+ it's designed for "0" represents "enable" and "1" represents "disable" */ -+ rtw_write8(adapter, REG_WMMPS_UAPSD_TID, (u8)(~pqospriv->uapsd_tid)); -+} -+#endif /* CONFIG_WMMPS_STA */ -+ -+#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT) -+/* For multi-port support, driver needs to inform the port ID to FW for btc operations */ -+s32 rtw_hal_set_wifi_btc_port_id_cmd(_adapter *adapter) -+{ -+ u8 h2c_buf[H2C_BTC_WL_PORT_ID_LEN] = {0}; -+ u8 hw_port = rtw_hal_get_port(adapter); -+ -+ SET_H2CCMD_BTC_WL_PORT_ID(h2c_buf, hw_port); -+ RTW_INFO("%s ("ADPT_FMT") - hw_port :%d\n", __func__, ADPT_ARG(adapter), hw_port); -+ return rtw_hal_fill_h2c_cmd(adapter, H2C_BTC_WL_PORT_ID, H2C_BTC_WL_PORT_ID_LEN, h2c_buf); -+} -+#endif -+ -+#define LPS_ACTIVE_TIMEOUT 50 /*number of times*/ -+void rtw_lps_state_chk(_adapter *adapter, u8 ps_mode) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *psta = NULL; -+ u8 ps_ready = _FALSE; -+ s8 leave_wait_count = LPS_ACTIVE_TIMEOUT; -+ -+ if (ps_mode == PS_MODE_ACTIVE) { -+#ifdef CONFIG_LPS_ACK -+ if (rtw_sctx_wait(&pwrpriv->lps_ack_sctx, __func__)) { -+ if (pwrpriv->lps_ack_status > 0) { -+ psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); -+ if (psta != NULL) { -+ if(issue_nulldata(adapter, psta->cmn.mac_addr, PS_MODE_ACTIVE, 3, 1) == _FAIL) -+ RTW_INFO(FUNC_ADPT_FMT" LPS state sync not yet finished.\n", FUNC_ADPT_ARG(adapter)); -+ } -+ } -+ } else { -+ RTW_WARN("LPS sctx query timeout, operation abort!!\n"); -+ return; -+ } -+ pwrpriv->lps_ack_status = -1; -+#else -+ do { -+ if ((rtw_read8(adapter, REG_TCR) & BIT_PWRBIT_OW_EN) == 0) { -+ ps_ready = _TRUE; -+ break; -+ } -+ rtw_msleep_os(1); -+ } while (leave_wait_count--); -+ -+ if (ps_ready == _FALSE) { -+ RTW_WARN(FUNC_ADPT_FMT" Power Bit Control is still in HW!\n", FUNC_ADPT_ARG(adapter)); -+ return; -+ } -+#endif /* CONFIG_LPS_ACK */ -+ } -+ } -+ -+void rtw_var_set_basic_rate(PADAPTER padapter, u8 *val) { -+ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ struct mlme_ext_info *mlmext_info = &padapter->mlmeextpriv.mlmext_info; -+ u16 input_b = 0, masked = 0, ioted = 0, BrateCfg = 0; -+ u16 rrsr_2g_force_mask = RRSR_CCK_RATES; -+ u16 rrsr_2g_allow_mask = (RRSR_24M | RRSR_12M | RRSR_6M | RRSR_CCK_RATES); -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ u16 rrsr_5g_force_mask = (RRSR_6M); -+ u16 rrsr_5g_allow_mask = (RRSR_OFDM_RATES); -+ #endif -+ u32 temp_RRSR; -+ -+ HalSetBrateCfg(padapter, val, &BrateCfg); -+ input_b = BrateCfg; -+ -+ /* apply force and allow mask */ -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ if (pHalData->current_band_type != BAND_ON_2_4G) { -+ BrateCfg |= rrsr_5g_force_mask; -+ BrateCfg &= rrsr_5g_allow_mask; -+ } else -+ #endif -+ { /* 2.4G */ -+ BrateCfg |= rrsr_2g_force_mask; -+ BrateCfg &= rrsr_2g_allow_mask; -+ } -+ masked = BrateCfg; -+ -+#ifdef CONFIG_CMCC_TEST -+ BrateCfg |= (RRSR_11M | RRSR_5_5M | RRSR_1M); /* use 11M to send ACK */ -+ BrateCfg |= (RRSR_24M | RRSR_18M | RRSR_12M); /*CMCC_OFDM_ACK 12/18/24M */ -+#endif -+ -+ /* IOT consideration */ -+ if (mlmext_info->assoc_AP_vendor == HT_IOT_PEER_CISCO) { -+ /* if peer is cisco and didn't use ofdm rate, we enable 6M ack */ -+ if ((BrateCfg & (RRSR_24M | RRSR_12M | RRSR_6M)) == 0) -+ BrateCfg |= RRSR_6M; -+ } -+ ioted = BrateCfg; -+ -+#ifdef CONFIG_NARROWBAND_SUPPORTING -+ if ((padapter->registrypriv.rtw_nb_config == RTW_NB_CONFIG_WIDTH_10) -+ || (padapter->registrypriv.rtw_nb_config == RTW_NB_CONFIG_WIDTH_5)) { -+ BrateCfg &= ~RRSR_CCK_RATES; -+ BrateCfg |= RRSR_6M; -+ } -+#endif -+ pHalData->BasicRateSet = BrateCfg; -+ -+ RTW_INFO("HW_VAR_BASIC_RATE: %#x->%#x->%#x\n", input_b, masked, ioted); -+ -+ /* Set RRSR rate table. */ -+ temp_RRSR = rtw_read32(padapter, REG_RRSR); -+ temp_RRSR &=0xFFFF0000; -+ temp_RRSR |=BrateCfg; -+ rtw_phydm_set_rrsr(padapter, temp_RRSR, TRUE); -+ -+ rtw_write8(padapter, REG_RRSR + 2, rtw_read8(padapter, REG_RRSR + 2) & 0xf0); -+ -+ #if defined(CONFIG_RTL8188E) -+ rtw_hal_set_hwreg(padapter, HW_VAR_INIT_RTS_RATE, (u8 *)&BrateCfg); -+ #endif -+} -+ -+u8 SetHwReg(_adapter *adapter, u8 variable, u8 *val) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 ret = _SUCCESS; -+ -+ switch (variable) { -+ case HW_VAR_MEDIA_STATUS: { -+ u8 net_type = *((u8 *)val); -+ -+ rtw_hal_set_msr(adapter, net_type); -+ } -+ break; -+ case HW_VAR_DO_IQK: -+ if (*val) -+ hal_data->bNeedIQK = _TRUE; -+ else -+ hal_data->bNeedIQK = _FALSE; -+ break; -+ case HW_VAR_MAC_ADDR: -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_hal_set_macaddr_mbid(adapter, val); -+#else -+ rtw_hal_set_macaddr_port(adapter, val); -+#endif -+ break; -+ case HW_VAR_BSSID: -+ rtw_hal_set_bssid(adapter, val); -+ break; -+ case HW_VAR_RCR: -+ ret = hw_var_rcr_config(adapter, *((u32 *)val)); -+ break; -+ case HW_VAR_ON_RCR_AM: -+ hw_var_set_rcr_am(adapter, 1); -+ break; -+ case HW_VAR_OFF_RCR_AM: -+ hw_var_set_rcr_am(adapter, 0); -+ break; -+ case HW_VAR_BEACON_INTERVAL: -+ hw_var_set_bcn_interval(adapter, *(u16 *)val); -+ break; -+#ifdef CONFIG_MBSSID_CAM -+ case HW_VAR_MBSSID_CAM_WRITE: { -+ u32 cmd = 0; -+ u32 *cam_val = (u32 *)val; -+ -+ rtw_write32(adapter, REG_MBIDCAMCFG_1, cam_val[0]); -+ cmd = BIT_MBIDCAM_POLL | BIT_MBIDCAM_WT_EN | BIT_MBIDCAM_VALID | cam_val[1]; -+ rtw_write32(adapter, REG_MBIDCAMCFG_2, cmd); -+ } -+ break; -+ case HW_VAR_MBSSID_CAM_CLEAR: { -+ u32 cmd; -+ u8 entry_id = *(u8 *)val; -+ -+ rtw_write32(adapter, REG_MBIDCAMCFG_1, 0); -+ -+ cmd = BIT_MBIDCAM_POLL | BIT_MBIDCAM_WT_EN | ((entry_id & MBIDCAM_ADDR_MASK) << MBIDCAM_ADDR_SHIFT); -+ rtw_write32(adapter, REG_MBIDCAMCFG_2, cmd); -+ } -+ break; -+ case HW_VAR_RCR_MBSSID_EN: -+ if (*((u8 *)val)) -+ rtw_hal_rcr_add(adapter, RCR_ENMBID); -+ else -+ rtw_hal_rcr_clear(adapter, RCR_ENMBID); -+ break; -+#endif -+ case HW_VAR_PORT_SWITCH: -+ hw_var_port_switch(adapter); -+ break; -+ case HW_VAR_INIT_RTS_RATE: { -+ u16 brate_cfg = *((u16 *)val); -+ u8 rate_index = 0; -+ HAL_VERSION *hal_ver = &hal_data->version_id; -+ -+ if (IS_8188E(*hal_ver)) { -+ -+ while (brate_cfg > 0x1) { -+ brate_cfg = (brate_cfg >> 1); -+ rate_index++; -+ } -+ rtw_write8(adapter, REG_INIRTS_RATE_SEL, rate_index); -+ } else -+ rtw_warn_on(1); -+ } -+ break; -+ case HW_VAR_SEC_CFG: { -+ u16 reg_scr_ori; -+ u16 reg_scr; -+ -+ reg_scr = reg_scr_ori = rtw_read16(adapter, REG_SECCFG); -+ reg_scr |= (SCR_CHK_KEYID | SCR_RxDecEnable | SCR_TxEncEnable); -+ -+ if (_rtw_camctl_chk_cap(adapter, SEC_CAP_CHK_BMC)) -+ reg_scr |= SCR_CHK_BMC; -+ -+ if (_rtw_camctl_chk_flags(adapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH)) -+ reg_scr |= SCR_NoSKMC; -+ -+ if (reg_scr != reg_scr_ori) -+ rtw_write16(adapter, REG_SECCFG, reg_scr); -+ } -+ break; -+ case HW_VAR_SEC_DK_CFG: { -+ struct security_priv *sec = &adapter->securitypriv; -+ u8 reg_scr = rtw_read8(adapter, REG_SECCFG); -+ -+ if (val) { /* Enable default key related setting */ -+ reg_scr |= SCR_TXBCUSEDK; -+ if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X) -+ reg_scr |= (SCR_RxUseDK | SCR_TxUseDK); -+ } else /* Disable default key related setting */ -+ reg_scr &= ~(SCR_RXBCUSEDK | SCR_TXBCUSEDK | SCR_RxUseDK | SCR_TxUseDK); -+ -+ rtw_write8(adapter, REG_SECCFG, reg_scr); -+ } -+ break; -+ -+ case HW_VAR_ASIX_IOT: -+ /* enable ASIX IOT function */ -+ if (*((u8 *)val) == _TRUE) { -+ /* 0xa2e[0]=0 (disable rake receiver) */ -+ rtw_write8(adapter, rCCK0_FalseAlarmReport + 2, -+ rtw_read8(adapter, rCCK0_FalseAlarmReport + 2) & ~(BIT0)); -+ /* 0xa1c=0xa0 (reset channel estimation if signal quality is bad) */ -+ rtw_write8(adapter, rCCK0_DSPParameter2, 0xa0); -+ } else { -+ /* restore reg:0xa2e, reg:0xa1c */ -+ rtw_write8(adapter, rCCK0_FalseAlarmReport + 2, -+ rtw_read8(adapter, rCCK0_FalseAlarmReport + 2) | (BIT0)); -+ rtw_write8(adapter, rCCK0_DSPParameter2, 0x00); -+ } -+ break; -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ case HW_VAR_WOWLAN: { -+ struct wowlan_ioctl_param *poidparam; -+ -+ poidparam = (struct wowlan_ioctl_param *)val; -+ switch (poidparam->subcode) { -+#ifdef CONFIG_WOWLAN -+ case WOWLAN_PATTERN_CLEAN: -+ rtw_hal_dl_pattern(adapter, 2); -+ break; -+ case WOWLAN_ENABLE: -+ rtw_hal_wow_enable(adapter); -+ break; -+ case WOWLAN_DISABLE: -+ rtw_hal_wow_disable(adapter); -+ break; -+#endif /*CONFIG_WOWLAN*/ -+#ifdef CONFIG_AP_WOWLAN -+ case WOWLAN_AP_ENABLE: -+ rtw_hal_ap_wow_enable(adapter); -+ break; -+ case WOWLAN_AP_DISABLE: -+ rtw_hal_ap_wow_disable(adapter); -+ break; -+#endif /*CONFIG_AP_WOWLAN*/ -+ default: -+ break; -+ } -+ } -+ break; -+#endif /*defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)*/ -+ -+#ifndef CONFIG_HAS_HW_VAR_BCN_FUNC -+ case HW_VAR_BCN_FUNC: -+ hw_var_set_bcn_func(adapter, *val); -+ break; -+#endif -+ -+#ifndef CONFIG_HAS_HW_VAR_MLME_DISCONNECT -+ case HW_VAR_MLME_DISCONNECT: -+ hw_var_set_mlme_disconnect(adapter); -+ break; -+#endif -+ -+ case HW_VAR_MLME_SITESURVEY: -+ hw_var_set_mlme_sitesurvey(adapter, *val); -+ #ifdef CONFIG_BT_COEXIST -+ if (hal_data->EEPROMBluetoothCoexist == 1) -+ rtw_btcoex_ScanNotify(adapter, *val ? _TRUE : _FALSE); -+ #endif -+ break; -+ -+#ifndef CONFIG_HAS_HW_VAR_MLME_JOIN -+ case HW_VAR_MLME_JOIN: -+ hw_var_set_mlme_join(adapter, *val); -+ break; -+#endif -+ -+ case HW_VAR_EN_HW_UPDATE_TSF: -+ rtw_hal_set_hw_update_tsf(adapter); -+ break; -+#ifndef CONFIG_HAS_HW_VAR_CORRECT_TSF -+ case HW_VAR_CORRECT_TSF: -+ hw_var_set_correct_tsf(adapter, *val); -+ break; -+#endif -+ -+#if defined(CONFIG_HW_P0_TSF_SYNC) && defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_MCC_MODE) -+ case HW_VAR_TSF_AUTO_SYNC: -+ if (*val == _TRUE) -+ hw_port0_tsf_sync_sel(adapter, _TRUE, adapter->hw_port, 50); -+ else -+ hw_port0_tsf_sync_sel(adapter, _FALSE, adapter->hw_port, 50); -+ break; -+#endif -+ case HW_VAR_APFM_ON_MAC: -+ hal_data->bMacPwrCtrlOn = *val; -+ RTW_INFO("%s: bMacPwrCtrlOn=%d\n", __func__, hal_data->bMacPwrCtrlOn); -+ break; -+#ifdef CONFIG_WMMPS_STA -+ case HW_VAR_UAPSD_TID: -+ rtw_hal_update_uapsd_tid(adapter); -+ break; -+#endif /* CONFIG_WMMPS_STA */ -+#ifdef CONFIG_LPS_PG -+ case HW_VAR_LPS_PG_HANDLE: -+ rtw_hal_lps_pg_handler(adapter, *val); -+ break; -+#endif -+#ifdef CONFIG_LPS_LCLK_WD_TIMER -+ case HW_VAR_DM_IN_LPS_LCLK: -+ rtw_phydm_wd_lps_lclk_hdl(adapter); -+ break; -+#endif -+ case HW_VAR_ENABLE_RX_BAR: -+ if (*val == _TRUE) { -+ /* enable RX BAR */ -+ u16 val16 = rtw_read16(adapter, REG_RXFLTMAP1); -+ -+ val16 |= BIT(8); -+ rtw_write16(adapter, REG_RXFLTMAP1, val16); -+ } else { -+ /* disable RX BAR */ -+ u16 val16 = rtw_read16(adapter, REG_RXFLTMAP1); -+ -+ val16 &= (~BIT(8)); -+ rtw_write16(adapter, REG_RXFLTMAP1, val16); -+ } -+ RTW_INFO("[HW_VAR_ENABLE_RX_BAR] 0x%02X=0x%02X\n", -+ REG_RXFLTMAP1, rtw_read16(adapter, REG_RXFLTMAP1)); -+ break; -+ case HW_VAR_HCI_SUS_STATE: -+ hal_data->hci_sus_state = *(u8 *)val; -+ RTW_INFO("%s: hci_sus_state=%u\n", __func__, hal_data->hci_sus_state); -+ break; -+#if defined(CONFIG_AP_MODE) && defined(CONFIG_FW_HANDLE_TXBCN) && defined(CONFIG_SUPPORT_MULTI_BCN) -+ case HW_VAR_BCN_HEAD_SEL: -+ { -+ u8 vap_id = *(u8 *)val; -+ -+ if ((vap_id >= CONFIG_LIMITED_AP_NUM) && (vap_id != 0xFF)) { -+ RTW_ERR(ADPT_FMT " vap_id(%d:%d) is invalid\n", ADPT_ARG(adapter),vap_id, adapter->vap_id); -+ rtw_warn_on(1); -+ } -+ if (MLME_IS_AP(adapter) || MLME_IS_MESH(adapter)) { -+ u16 drv_pg_bndy = 0, bcn_addr = 0; -+ u32 page_size = 0; -+ -+ /*rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_BOUNDARY, &drv_pg_bndy);*/ -+ rtw_halmac_get_rsvd_drv_pg_bndy(adapter_to_dvobj(adapter), &drv_pg_bndy); -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&page_size); -+ -+ if (vap_id != 0xFF) -+ bcn_addr = drv_pg_bndy + (vap_id * (MAX_BEACON_LEN / page_size)); -+ else -+ bcn_addr = drv_pg_bndy; -+ RTW_INFO(ADPT_FMT" vap_id(%d) change BCN HEAD to 0x%04x\n", -+ ADPT_ARG(adapter), vap_id, bcn_addr); -+ rtw_write16(adapter, REG_FIFOPAGE_CTRL_2, -+ (bcn_addr & BIT_MASK_BCN_HEAD_1_V1) | BIT_BCN_VALID_V1); -+ } -+ } -+ break; -+#endif -+ case HW_VAR_LPS_STATE_CHK : -+ rtw_lps_state_chk(adapter, *(u8 *)val); -+ break; -+ -+#ifdef CONFIG_RTS_FULL_BW -+ case HW_VAR_SET_RTS_BW: -+ { -+ #ifdef RTW_HALMAC -+ rtw_halmac_set_rts_full_bw(adapter_to_dvobj(adapter), (*val)); -+ #else -+ u8 temp; -+ if(*val) -+ temp = (( rtw_read8(adapter, REG_INIRTS_RATE_SEL)) | BIT5 ); -+ else -+ temp = (( rtw_read8(adapter, REG_INIRTS_RATE_SEL)) & (~BIT5)); -+ rtw_write8(adapter, REG_INIRTS_RATE_SEL, temp); -+ /*RTW_INFO("HW_VAR_SET_RTS_BW val=%u REG480=0x%x\n", *val, rtw_read8(adapter, REG_INIRTS_RATE_SEL));*/ -+ #endif -+ } -+ break; -+#endif/*CONFIG_RTS_FULL_BW*/ -+#if defined(CONFIG_PCI_HCI) -+ case HW_VAR_ENSWBCN: -+ if (*val == _TRUE) { -+ rtw_write8(adapter, REG_CR + 1, -+ rtw_read8(adapter, REG_CR + 1) | BIT(0)); -+ } else -+ rtw_write8(adapter, REG_CR + 1, -+ rtw_read8(adapter, REG_CR + 1) & ~BIT(0)); -+ break; -+#endif -+ case HW_VAR_BCN_EARLY_C2H_RPT: -+ rtw_hal_set_fw_bcn_early_c2h_rpt_cmd(adapter, *(u8 *)val); -+ break; -+ default: -+ if (0) -+ RTW_PRINT(FUNC_ADPT_FMT" variable(%d) not defined!\n", -+ FUNC_ADPT_ARG(adapter), variable); -+ ret = _FAIL; -+ break; -+ } -+ -+ return ret; -+} -+ -+void GetHwReg(_adapter *adapter, u8 variable, u8 *val) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u64 val64; -+ -+ -+ switch (variable) { -+ case HW_VAR_MAC_ADDR: -+ #ifndef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_hal_get_macaddr_port(adapter, val); -+ #endif -+ break; -+ case HW_VAR_BASIC_RATE: -+ *((u16 *)val) = hal_data->BasicRateSet; -+ break; -+ case HW_VAR_MEDIA_STATUS: -+ rtw_hal_get_msr(adapter, val); -+ break; -+ case HW_VAR_DO_IQK: -+ *val = hal_data->bNeedIQK; -+ break; -+ case HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO: -+ if (hal_is_band_support(adapter, BAND_ON_5G)) -+ *val = _TRUE; -+ else -+ *val = _FALSE; -+ break; -+ case HW_VAR_APFM_ON_MAC: -+ *val = hal_data->bMacPwrCtrlOn; -+ break; -+ case HW_VAR_RCR: -+ hw_var_rcr_get(adapter, (u32 *)val); -+ break; -+ case HW_VAR_FWLPS_RF_ON: -+ /* When we halt NIC, we should check if FW LPS is leave. */ -+ if (rtw_is_surprise_removed(adapter) -+ || (adapter_to_pwrctl(adapter)->rf_pwrstate == rf_off) -+ ) { -+ /* -+ * If it is in HW/SW Radio OFF or IPS state, -+ * we do not check Fw LPS Leave, -+ * because Fw is unload. -+ */ -+ *val = _TRUE; -+ } else { -+ u32 rcr = 0; -+ -+ rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr); -+ if (rcr & (RCR_UC_MD_EN | RCR_BC_MD_EN | RCR_TIM_PARSER_EN)) -+ *val = _FALSE; -+ else -+ *val = _TRUE; -+ } -+ break; -+ -+ case HW_VAR_HCI_SUS_STATE: -+ *((u8 *)val) = hal_data->hci_sus_state; -+ break; -+ -+#ifndef CONFIG_HAS_HW_VAR_BCN_CTRL_ADDR -+ case HW_VAR_BCN_CTRL_ADDR: -+ *((u32 *)val) = hw_bcn_ctrl_addr(adapter, adapter->hw_port); -+ break; -+#endif -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ case HW_VAR_CAM_EMPTY_ENTRY: { -+ u8 ucIndex = *((u8 *)val); -+ u8 i; -+ u32 ulCommand = 0; -+ u32 ulContent = 0; -+ u32 ulEncAlgo = CAM_AES; -+ -+ for (i = 0; i < CAM_CONTENT_COUNT; i++) { -+ /* filled id in CAM config 2 byte */ -+ if (i == 0) -+ ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo) << 2); -+ else -+ ulContent = 0; -+ /* polling bit, and No Write enable, and address */ -+ ulCommand = CAM_CONTENT_COUNT * ucIndex + i; -+ ulCommand = ulCommand | CAM_POLLINIG | CAM_WRITE; -+ /* write content 0 is equall to mark invalid */ -+ rtw_write32(adapter, REG_CAMWRITE, ulContent); /* delay_ms(40); */ -+ rtw_write32(adapter, REG_CAMCMD, ulCommand); /* delay_ms(40); */ -+ } -+ } -+#endif -+ -+ default: -+ if (0) -+ RTW_PRINT(FUNC_ADPT_FMT" variable(%d) not defined!\n", -+ FUNC_ADPT_ARG(adapter), variable); -+ break; -+ } -+ -+} -+ -+static u32 _get_page_size(struct _ADAPTER *a) -+{ -+#ifdef RTW_HALMAC -+ struct dvobj_priv *d; -+ u32 size = 0; -+ int err = 0; -+ -+ -+ d = adapter_to_dvobj(a); -+ -+ err = rtw_halmac_get_page_size(d, &size); -+ if (!err) -+ return size; -+ -+ RTW_WARN(FUNC_ADPT_FMT ": Fail to get Page size!!(err=%d)\n", -+ FUNC_ADPT_ARG(a), err); -+#endif /* RTW_HALMAC */ -+ -+ return PAGE_SIZE_128; -+} -+ -+u8 -+SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 bResult = _SUCCESS; -+ -+ switch (variable) { -+ -+ case HAL_DEF_DBG_DUMP_RXPKT: -+ hal_data->bDumpRxPkt = *((u8 *)value); -+ break; -+ case HAL_DEF_DBG_DUMP_TXPKT: -+ hal_data->bDumpTxPkt = *((u8 *)value); -+ break; -+ case HAL_DEF_ANT_DETECT: -+ hal_data->AntDetection = *((u8 *)value); -+ break; -+ default: -+ RTW_PRINT("%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable); -+ bResult = _FAIL; -+ break; -+ } -+ -+ return bResult; -+} -+ -+#ifdef CONFIG_BEAMFORMING -+u8 rtw_hal_query_txbfer_rf_num(_adapter *adapter) -+{ -+ struct registry_priv *pregistrypriv = &adapter->registrypriv; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ if ((pregistrypriv->beamformer_rf_num) && (IS_HARDWARE_TYPE_8814AE(adapter) || IS_HARDWARE_TYPE_8814AU(adapter) || IS_HARDWARE_TYPE_8822BU(adapter) || IS_HARDWARE_TYPE_8821C(adapter))) -+ return pregistrypriv->beamformer_rf_num; -+ else if (IS_HARDWARE_TYPE_8814AE(adapter) -+#if 0 -+#if defined(CONFIG_USB_HCI) -+ || (IS_HARDWARE_TYPE_8814AU(adapter) && (pUsbModeMech->CurUsbMode == 2 || pUsbModeMech->HubUsbMode == 2)) /* for USB3.0 */ -+#endif -+#endif -+ ) { -+ /*BF cap provided by Yu Chen, Sean, 2015, 01 */ -+ if (hal_data->rf_type == RF_3T3R) -+ return 2; -+ else if (hal_data->rf_type == RF_4T4R) -+ return 3; -+ else -+ return 1; -+ } else -+ return 1; -+ -+} -+u8 rtw_hal_query_txbfee_rf_num(_adapter *adapter) -+{ -+ struct registry_priv *pregistrypriv = &adapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ if ((pregistrypriv->beamformee_rf_num) && (IS_HARDWARE_TYPE_8814AE(adapter) || IS_HARDWARE_TYPE_8814AU(adapter) || IS_HARDWARE_TYPE_8822BU(adapter) || IS_HARDWARE_TYPE_8821C(adapter))) -+ return pregistrypriv->beamformee_rf_num; -+ else if (IS_HARDWARE_TYPE_8814AE(adapter) || IS_HARDWARE_TYPE_8814AU(adapter)) { -+ if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) -+ return 2; -+ else -+ return 2;/*TODO: May be 3 in the future, by ChenYu. */ -+ } else -+ return 1; -+ -+} -+#ifdef RTW_BEAMFORMING_VERSION_2 -+void rtw_hal_beamforming_config_csirate(PADAPTER adapter) -+{ -+ struct dm_struct *p_dm_odm; -+ struct beamforming_info *bf_info; -+ u8 fix_rate_enable = 0; -+ u8 new_csi_rate_idx; -+ u8 rrsr_54_en; -+ u32 temp_rrsr; -+ -+ /* Acting as BFee */ -+ if (IS_BEAMFORMEE(adapter)) { -+ #if 0 -+ /* Do not enable now because it will affect MU performance and CTS/BA rate. 2016.07.19. by tynli. [PCIE-1660] */ -+ if (IS_HARDWARE_TYPE_8821C(Adapter)) -+ FixRateEnable = 1; /* Support after 8821C */ -+ #endif -+ -+ p_dm_odm = adapter_to_phydm(adapter); -+ bf_info = GET_BEAMFORM_INFO(adapter); -+ -+ rtw_halmac_bf_cfg_csi_rate(adapter_to_dvobj(adapter), -+ p_dm_odm->rssi_min, -+ bf_info->cur_csi_rpt_rate, -+ fix_rate_enable, &new_csi_rate_idx, &rrsr_54_en); -+ -+ temp_rrsr = rtw_read32(adapter, REG_RRSR); -+ if (rrsr_54_en == 1) -+ temp_rrsr |= RRSR_54M; -+ else if (rrsr_54_en == 0) -+ temp_rrsr &= ~RRSR_54M; -+ rtw_phydm_set_rrsr(adapter, temp_rrsr, FALSE); -+ -+ if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate) -+ bf_info->cur_csi_rpt_rate = new_csi_rate_idx; -+ } -+} -+#endif -+#endif -+ -+u8 -+GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 bResult = _SUCCESS; -+ -+ switch (variable) { -+ case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: { -+ struct mlme_priv *pmlmepriv; -+ struct sta_priv *pstapriv; -+ struct sta_info *psta; -+ -+ pmlmepriv = &adapter->mlmepriv; -+ pstapriv = &adapter->stapriv; -+ psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress); -+ if (psta) -+ *((int *)value) = psta->cmn.rssi_stat.rssi; -+ } -+ break; -+ case HAL_DEF_DBG_DUMP_RXPKT: -+ *((u8 *)value) = hal_data->bDumpRxPkt; -+ break; -+ case HAL_DEF_DBG_DUMP_TXPKT: -+ *((u8 *)value) = hal_data->bDumpTxPkt; -+ break; -+ case HAL_DEF_ANT_DETECT: -+ *((u8 *)value) = hal_data->AntDetection; -+ break; -+ case HAL_DEF_TX_PAGE_SIZE: -+ *((u32 *)value) = _get_page_size(adapter); -+ break; -+ case HAL_DEF_TX_STBC: -+ #ifdef CONFIG_ALPHA_SMART_ANTENNA -+ *(u8 *)value = 0; -+ #else -+ *(u8 *)value = hal_data->max_tx_cnt > 1 ? 1 : 0; -+ #endif -+ break; -+ case HAL_DEF_EXPLICIT_BEAMFORMER: -+ case HAL_DEF_EXPLICIT_BEAMFORMEE: -+ case HAL_DEF_VHT_MU_BEAMFORMER: -+ case HAL_DEF_VHT_MU_BEAMFORMEE: -+ *(u8 *)value = _FALSE; -+ break; -+#ifdef CONFIG_BEAMFORMING -+ case HAL_DEF_BEAMFORMER_CAP: -+ *(u8 *)value = rtw_hal_query_txbfer_rf_num(adapter); -+ break; -+ case HAL_DEF_BEAMFORMEE_CAP: -+ *(u8 *)value = rtw_hal_query_txbfee_rf_num(adapter); -+ break; -+#endif -+ default: -+ RTW_PRINT("%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n", __FUNCTION__, variable); -+ bResult = _FAIL; -+ break; -+ } -+ -+ return bResult; -+} -+ -+/* -+ * Description: -+ * Translate a character to hex digit. -+ * */ -+u32 -+MapCharToHexDigit( -+ char chTmp -+) -+{ -+ if (chTmp >= '0' && chTmp <= '9') -+ return chTmp - '0'; -+ else if (chTmp >= 'a' && chTmp <= 'f') -+ return 10 + (chTmp - 'a'); -+ else if (chTmp >= 'A' && chTmp <= 'F') -+ return 10 + (chTmp - 'A'); -+ else -+ return 0; -+} -+ -+ -+ -+/* -+ * Description: -+ * Parse hex number from the string pucStr. -+ * */ -+BOOLEAN -+GetHexValueFromString( -+ char *szStr, -+ u32 *pu4bVal, -+ u32 *pu4bMove -+) -+{ -+ char *szScan = szStr; -+ -+ /* Check input parameter. */ -+ if (szStr == NULL || pu4bVal == NULL || pu4bMove == NULL) { -+ RTW_INFO("GetHexValueFromString(): Invalid inpur argumetns! szStr: %p, pu4bVal: %p, pu4bMove: %p\n", szStr, pu4bVal, pu4bMove); -+ return _FALSE; -+ } -+ -+ /* Initialize output. */ -+ *pu4bMove = 0; -+ *pu4bVal = 0; -+ -+ /* Skip leading space. */ -+ while (*szScan != '\0' && -+ (*szScan == ' ' || *szScan == '\t')) { -+ szScan++; -+ (*pu4bMove)++; -+ } -+ -+ /* Skip leading '0x' or '0X'. */ -+ if (*szScan == '0' && (*(szScan + 1) == 'x' || *(szScan + 1) == 'X')) { -+ szScan += 2; -+ (*pu4bMove) += 2; -+ } -+ -+ /* Check if szScan is now pointer to a character for hex digit, */ -+ /* if not, it means this is not a valid hex number. */ -+ if (!IsHexDigit(*szScan)) -+ return _FALSE; -+ -+ /* Parse each digit. */ -+ do { -+ (*pu4bVal) <<= 4; -+ *pu4bVal += MapCharToHexDigit(*szScan); -+ -+ szScan++; -+ (*pu4bMove)++; -+ } while (IsHexDigit(*szScan)); -+ -+ return _TRUE; -+} -+ -+BOOLEAN -+GetFractionValueFromString( -+ char *szStr, -+ u8 *pInteger, -+ u8 *pFraction, -+ u32 *pu4bMove -+) -+{ -+ char *szScan = szStr; -+ -+ /* Initialize output. */ -+ *pu4bMove = 0; -+ *pInteger = 0; -+ *pFraction = 0; -+ -+ /* Skip leading space. */ -+ while (*szScan != '\0' && (*szScan == ' ' || *szScan == '\t')) { -+ ++szScan; -+ ++(*pu4bMove); -+ } -+ -+ if (*szScan < '0' || *szScan > '9') -+ return _FALSE; -+ -+ /* Parse each digit. */ -+ do { -+ (*pInteger) *= 10; -+ *pInteger += (*szScan - '0'); -+ -+ ++szScan; -+ ++(*pu4bMove); -+ -+ if (*szScan == '.') { -+ ++szScan; -+ ++(*pu4bMove); -+ -+ if (*szScan < '0' || *szScan > '9') -+ return _FALSE; -+ -+ *pFraction += (*szScan - '0') * 10; -+ ++szScan; -+ ++(*pu4bMove); -+ -+ if (*szScan >= '0' && *szScan <= '9') { -+ *pFraction += *szScan - '0'; -+ ++szScan; -+ ++(*pu4bMove); -+ } -+ return _TRUE; -+ } -+ } while (*szScan >= '0' && *szScan <= '9'); -+ -+ return _TRUE; -+} -+ -+/* -+ * Description: -+ * Return TRUE if szStr is comment out with leading " */ /* ". -+ * */ -+BOOLEAN -+IsCommentString( -+ char *szStr -+) -+{ -+ if (*szStr == '/' && *(szStr + 1) == '/') -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+BOOLEAN -+GetU1ByteIntegerFromStringInDecimal( -+ char *Str, -+ u8 *pInt -+) -+{ -+ u16 i = 0; -+ *pInt = 0; -+ -+ while (Str[i] != '\0') { -+ if (Str[i] >= '0' && Str[i] <= '9') { -+ *pInt *= 10; -+ *pInt += (Str[i] - '0'); -+ } else -+ return _FALSE; -+ ++i; -+ } -+ -+ return _TRUE; -+} -+ -+/* <20121004, Kordan> For example, -+ * ParseQualifiedString(inString, 0, outString, '[', ']') gets "Kordan" from a string "Hello [Kordan]". -+ * If RightQualifier does not exist, it will hang on in the while loop */ -+BOOLEAN -+ParseQualifiedString( -+ char *In, -+ u32 *Start, -+ char *Out, -+ char LeftQualifier, -+ char RightQualifier -+) -+{ -+ u32 i = 0, j = 0; -+ char c = In[(*Start)++]; -+ -+ if (c != LeftQualifier) -+ return _FALSE; -+ -+ i = (*Start); -+ c = In[(*Start)++]; -+ while (c != RightQualifier && c != '\0') -+ c = In[(*Start)++]; -+ -+ if (c == '\0') -+ return _FALSE; -+ -+ j = (*Start) - 2; -+ strncpy((char *)Out, (const char *)(In + i), j - i + 1); -+ -+ return _TRUE; -+} -+ -+BOOLEAN -+isAllSpaceOrTab( -+ u8 *data, -+ u8 size -+) -+{ -+ u8 cnt = 0, NumOfSpaceAndTab = 0; -+ -+ while (size > cnt) { -+ if (data[cnt] == ' ' || data[cnt] == '\t' || data[cnt] == '\0') -+ ++NumOfSpaceAndTab; -+ -+ ++cnt; -+ } -+ -+ return size == NumOfSpaceAndTab; -+} -+ -+ -+void rtw_hal_check_rxfifo_full(_adapter *adapter) -+{ -+ struct dvobj_priv *psdpriv = adapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); -+ struct registry_priv *regsty = &adapter->registrypriv; -+ int save_cnt = _FALSE; -+ -+ if (regsty->check_hw_status == 1) { -+ /* switch counter to RX fifo */ -+ if (IS_8188E(pHalData->version_id) || -+ IS_8188F(pHalData->version_id) || -+ IS_8188GTV(pHalData->version_id) || -+ IS_8812_SERIES(pHalData->version_id) || -+ IS_8821_SERIES(pHalData->version_id) || -+ IS_8723B_SERIES(pHalData->version_id) || -+ IS_8192E(pHalData->version_id) || -+ IS_8703B_SERIES(pHalData->version_id) || -+ IS_8723D_SERIES(pHalData->version_id) || -+ IS_8192F_SERIES(pHalData->version_id)) { -+ rtw_write8(adapter, REG_RXERR_RPT + 3, rtw_read8(adapter, REG_RXERR_RPT + 3) | 0xa0); -+ save_cnt = _TRUE; -+ } else { -+ /* todo: other chips */ -+ } -+ -+ -+ if (save_cnt) { -+ pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow; -+ pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT); -+ pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow - pdbgpriv->dbg_rx_fifo_last_overflow; -+ } else { -+ /* special value to indicate no implementation */ -+ pdbgpriv->dbg_rx_fifo_last_overflow = 1; -+ pdbgpriv->dbg_rx_fifo_curr_overflow = 1; -+ pdbgpriv->dbg_rx_fifo_diff_overflow = 1; -+ } -+ } -+} -+ -+void linked_info_dump(_adapter *padapter, u8 benable) -+{ -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ if (padapter->bLinkInfoDump == benable) -+ return; -+ -+ RTW_INFO("%s %s\n", __FUNCTION__, (benable) ? "enable" : "disable"); -+ -+ if (benable) { -+#ifdef CONFIG_LPS -+ pwrctrlpriv->org_power_mgnt = pwrctrlpriv->power_mgnt;/* keep org value */ -+ rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); -+#endif -+ -+#ifdef CONFIG_IPS -+ pwrctrlpriv->ips_org_mode = pwrctrlpriv->ips_mode;/* keep org value */ -+ rtw_pm_set_ips(padapter, IPS_NONE); -+#endif -+ } else { -+#ifdef CONFIG_IPS -+ rtw_pm_set_ips(padapter, pwrctrlpriv->ips_org_mode); -+#endif /* CONFIG_IPS */ -+ -+#ifdef CONFIG_LPS -+ rtw_pm_set_lps(padapter, pwrctrlpriv->org_power_mgnt); -+#endif /* CONFIG_LPS */ -+ } -+ padapter->bLinkInfoDump = benable ; -+} -+ -+#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA -+void rtw_get_raw_rssi_info(void *sel, _adapter *padapter) -+{ -+ u8 isCCKrate, rf_path; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; -+ RTW_PRINT_SEL(sel, "RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n", -+ HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all); -+ isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M) ? TRUE : FALSE; -+ -+ if (isCCKrate) -+ psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball; -+ -+ for (rf_path = 0; rf_path < hal_spec->rf_reg_path_num; rf_path++) { -+ if (!(GET_HAL_RX_PATH_BMP(padapter) & BIT(rf_path))) -+ continue; -+ RTW_PRINT_SEL(sel, "RF_PATH_%d=>signal_strength:%d(%%),signal_quality:%d(%%)\n" -+ , rf_path, psample_pkt_rssi->mimo_signal_strength[rf_path], psample_pkt_rssi->mimo_signal_quality[rf_path]); -+ -+ if (!isCCKrate) { -+ RTW_PRINT_SEL(sel, "\trx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n", -+ psample_pkt_rssi->ofdm_pwr[rf_path], psample_pkt_rssi->ofdm_snr[rf_path]); -+ } -+ } -+} -+ -+void rtw_dump_raw_rssi_info(_adapter *padapter, void *sel) -+{ -+ u8 isCCKrate, rf_path; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; -+ _RTW_PRINT_SEL(sel, "============ RAW Rx Info dump ===================\n"); -+ _RTW_PRINT_SEL(sel, "RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n", HDATA_RATE(psample_pkt_rssi->data_rate), psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all); -+ -+ isCCKrate = (psample_pkt_rssi->data_rate <= DESC_RATE11M) ? TRUE : FALSE; -+ -+ if (isCCKrate) -+ psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball; -+ -+ for (rf_path = 0; rf_path < hal_spec->rf_reg_path_num; rf_path++) { -+ if (!(GET_HAL_RX_PATH_BMP(padapter) & BIT(rf_path))) -+ continue; -+ _RTW_PRINT_SEL(sel , "RF_PATH_%d=>signal_strength:%d(%%),signal_quality:%d(%%)" -+ , rf_path, psample_pkt_rssi->mimo_signal_strength[rf_path], psample_pkt_rssi->mimo_signal_quality[rf_path]); -+ -+ if (!isCCKrate) -+ _RTW_PRINT_SEL(sel , ",rx_ofdm_pwr:%d(dBm),rx_ofdm_snr:%d(dB)\n", psample_pkt_rssi->ofdm_pwr[rf_path], psample_pkt_rssi->ofdm_snr[rf_path]); -+ else -+ _RTW_PRINT_SEL(sel , "\n"); -+ -+ } -+} -+#endif -+ -+#ifdef DBG_RX_DFRAME_RAW_DATA -+void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel) -+{ -+#define DBG_RX_DFRAME_RAW_DATA_UC 0 -+#define DBG_RX_DFRAME_RAW_DATA_BMC 1 -+#define DBG_RX_DFRAME_RAW_DATA_TYPES 2 -+ -+ _irqL irqL; -+ u8 isCCKrate, rf_path; -+ struct recv_priv *precvpriv = &(padapter->recvpriv); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta; -+ struct sta_recv_dframe_info *psta_dframe_info; -+ int i, j; -+ _list *plist, *phead; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; -+ -+ if (precvpriv->store_law_data_flag) { -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ plist = get_next(plist); -+ -+ if (psta) { -+ if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) -+ && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE) -+ && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), ETH_ALEN) != _TRUE)) { -+ -+ RTW_PRINT_SEL(sel, "==============================\n"); -+ RTW_PRINT_SEL(sel, "macaddr =" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); -+ -+ for (j = 0; j < DBG_RX_DFRAME_RAW_DATA_TYPES; j++) { -+ if (j == DBG_RX_DFRAME_RAW_DATA_UC) { -+ psta_dframe_info = &psta->sta_dframe_info; -+ RTW_PRINT_SEL(sel, "\n"); -+ RTW_PRINT_SEL(sel, "Unicast:\n"); -+ } else if (j == DBG_RX_DFRAME_RAW_DATA_BMC) { -+ psta_dframe_info = &psta->sta_dframe_info_bmc; -+ RTW_PRINT_SEL(sel, "\n"); -+ RTW_PRINT_SEL(sel, "Broadcast/Multicast:\n"); -+ } -+ -+ isCCKrate = (psta_dframe_info->sta_data_rate <= DESC_RATE11M) ? TRUE : FALSE; -+ -+ RTW_PRINT_SEL(sel, "BW=%s, sgi =%d\n", ch_width_str(psta_dframe_info->sta_bw_mode), psta_dframe_info->sta_sgi); -+ RTW_PRINT_SEL(sel, "Rx_Data_Rate = %s\n", HDATA_RATE(psta_dframe_info->sta_data_rate)); -+ -+ for (rf_path = 0; rf_path < hal_spec->rf_reg_path_num; rf_path++) { -+ if (!(GET_HAL_RX_PATH_BMP(padapter) & BIT(rf_path))) -+ continue; -+ if (!isCCKrate) { -+ RTW_PRINT_SEL(sel , "RF_PATH_%d RSSI:%d(dBm)", rf_path, psta_dframe_info->sta_RxPwr[rf_path]); -+ _RTW_PRINT_SEL(sel , ",rx_ofdm_snr:%d(dB)\n", psta_dframe_info->sta_ofdm_snr[rf_path]); -+ } else -+ RTW_PRINT_SEL(sel , "RF_PATH_%d RSSI:%d(dBm)\n", rf_path, (psta_dframe_info->sta_mimo_signal_strength[rf_path]) - 100); -+ } -+ } -+ -+ } -+ } -+ } -+ } -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ } -+} -+#endif -+void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe) -+{ -+ u8 isCCKrate, rf_path , dframe_type; -+ u8 *ptr; -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+#ifdef DBG_RX_DFRAME_RAW_DATA -+ struct sta_recv_dframe_info *psta_dframe_info; -+#endif -+ struct recv_priv *precvpriv = &(padapter->recvpriv); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; -+ struct sta_info *psta = prframe->u.hdr.psta; -+ struct phydm_phyinfo_struct *p_phy_info = &pattrib->phy_info; -+ struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info; -+ psample_pkt_rssi->data_rate = pattrib->data_rate; -+ ptr = prframe->u.hdr.rx_data; -+ dframe_type = GetFrameType(ptr); -+ /*RTW_INFO("=>%s\n", __FUNCTION__);*/ -+ -+ -+ if (precvpriv->store_law_data_flag) { -+ isCCKrate = (pattrib->data_rate <= DESC_RATE11M) ? TRUE : FALSE; -+ -+ psample_pkt_rssi->pwdball = p_phy_info->rx_pwdb_all; -+ psample_pkt_rssi->pwr_all = p_phy_info->recv_signal_power; -+ -+ for (rf_path = 0; rf_path < hal_spec->rf_reg_path_num; rf_path++) { -+ psample_pkt_rssi->mimo_signal_strength[rf_path] = p_phy_info->rx_mimo_signal_strength[rf_path]; -+ psample_pkt_rssi->mimo_signal_quality[rf_path] = p_phy_info->rx_mimo_signal_quality[rf_path]; -+ if (!isCCKrate) { -+ psample_pkt_rssi->ofdm_pwr[rf_path] = p_phy_info->rx_pwr[rf_path]; -+ psample_pkt_rssi->ofdm_snr[rf_path] = p_phy_info->rx_snr[rf_path]; -+ } -+ } -+#ifdef DBG_RX_DFRAME_RAW_DATA -+ if ((dframe_type == WIFI_DATA_TYPE) || (dframe_type == WIFI_QOS_DATA_TYPE) || (padapter->registrypriv.mp_mode == 1)) { -+ -+ /*RTW_INFO("=>%s WIFI_DATA_TYPE or WIFI_QOS_DATA_TYPE\n", __FUNCTION__);*/ -+ if (psta) { -+ if (IS_MCAST(get_ra(get_recvframe_data(prframe)))) -+ psta_dframe_info = &psta->sta_dframe_info_bmc; -+ else -+ psta_dframe_info = &psta->sta_dframe_info; -+ /*RTW_INFO("=>%s psta->cmn.mac_addr="MAC_FMT" !\n", -+ __FUNCTION__, MAC_ARG(psta->cmn.mac_addr));*/ -+ if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) || (padapter->registrypriv.mp_mode == 1)) { -+ psta_dframe_info->sta_data_rate = pattrib->data_rate; -+ psta_dframe_info->sta_sgi = pattrib->sgi; -+ psta_dframe_info->sta_bw_mode = pattrib->bw; -+ for (rf_path = 0; rf_path < hal_spec->rf_reg_path_num; rf_path++) { -+ -+ psta_dframe_info->sta_mimo_signal_strength[rf_path] = (p_phy_info->rx_mimo_signal_strength[rf_path]);/*Percentage to dbm*/ -+ -+ if (!isCCKrate) { -+ psta_dframe_info->sta_ofdm_snr[rf_path] = p_phy_info->rx_snr[rf_path]; -+ psta_dframe_info->sta_RxPwr[rf_path] = p_phy_info->rx_pwr[rf_path]; -+ } -+ } -+ } -+ } -+ } -+#endif -+ } -+ -+} -+ -+int hal_efuse_macaddr_offset(_adapter *adapter) -+{ -+ u8 interface_type = 0; -+ int addr_offset = -1; -+ -+ interface_type = rtw_get_intf_type(adapter); -+ -+ switch (rtw_get_chip_type(adapter)) { -+#ifdef CONFIG_RTL8723B -+ case RTL8723B: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8723BU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8723BS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8723BE; -+ break; -+#endif -+#ifdef CONFIG_RTL8703B -+ case RTL8703B: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8703BU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8703BS; -+ break; -+#endif -+#ifdef CONFIG_RTL8723D -+ case RTL8723D: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8723DU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8723DS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8723DE; -+ break; -+#endif -+ -+#ifdef CONFIG_RTL8188E -+ case RTL8188E: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_88EU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_88ES; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_88EE; -+ break; -+#endif -+#ifdef CONFIG_RTL8188F -+ case RTL8188F: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8188FU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8188FS; -+ break; -+#endif -+#ifdef CONFIG_RTL8188GTV -+ case RTL8188GTV: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8188GTVU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8188GTVS; -+ break; -+#endif -+#ifdef CONFIG_RTL8812A -+ case RTL8812: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8812AU; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8812AE; -+ break; -+#endif -+#ifdef CONFIG_RTL8821A -+ case RTL8821: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8821AU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8821AS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8821AE; -+ break; -+#endif -+#ifdef CONFIG_RTL8192E -+ case RTL8192E: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8192EU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8192ES; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8192EE; -+ break; -+#endif -+#ifdef CONFIG_RTL8814A -+ case RTL8814A: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8814AU; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8814AE; -+ break; -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ case RTL8822B: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8822BU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8822BS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8822BE; -+ break; -+#endif /* CONFIG_RTL8822B */ -+ -+#ifdef CONFIG_RTL8821C -+ case RTL8821C: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8821CU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8821CS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8821CE; -+ break; -+#endif /* CONFIG_RTL8821C */ -+ -+#ifdef CONFIG_RTL8710B -+ case RTL8710B: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8710B; -+ break; -+#endif -+ -+#ifdef CONFIG_RTL8192F -+ case RTL8192F: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8192FU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8192FS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8192FE; -+ break; -+#endif /* CONFIG_RTL8192F */ -+ -+#ifdef CONFIG_RTL8822C -+ case RTL8822C: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8822CU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8822CS; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8822CE; -+ break; -+#endif /* CONFIG_RTL8822C */ -+ -+#ifdef CONFIG_RTL8814B -+ case RTL8814B: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8814BU; -+ else if (interface_type == RTW_PCIE) -+ addr_offset = EEPROM_MAC_ADDR_8814BE; -+ break; -+#endif /* CONFIG_RTL8814B */ -+ -+#ifdef CONFIG_RTL8723F -+ case RTL8723F: -+ if (interface_type == RTW_USB) -+ addr_offset = EEPROM_MAC_ADDR_8723FU; -+ else if (interface_type == RTW_SDIO) -+ addr_offset = EEPROM_MAC_ADDR_8723FS; -+ break; -+#endif /* CONFIG_RTL8723F */ -+ } -+ -+ if (addr_offset == -1) { -+ RTW_ERR("%s: unknown combination - chip_type:%u, interface:%u\n" -+ , __func__, rtw_get_chip_type(adapter), rtw_get_intf_type(adapter)); -+ } -+ -+ return addr_offset; -+} -+ -+int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr) -+{ -+ int ret = _FAIL; -+ int addr_offset; -+ -+ addr_offset = hal_efuse_macaddr_offset(padapter); -+ if (addr_offset == -1) -+ goto exit; -+ -+ ret = rtw_efuse_map_read(padapter, addr_offset, ETH_ALEN, mac_addr); -+ -+exit: -+ return ret; -+} -+ -+void rtw_dump_cur_efuse(PADAPTER padapter) -+{ -+ int mapsize =0; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (void *)&mapsize, _FALSE); -+ -+ if (mapsize <= 0 || mapsize > EEPROM_MAX_SIZE) { -+ RTW_ERR("wrong map size %d\n", mapsize); -+ return; -+ } -+ -+#ifdef CONFIG_RTW_DEBUG -+ if (hal_data->efuse_file_status == EFUSE_FILE_LOADED) -+ RTW_MAP_DUMP_SEL(RTW_DBGDUMP, "EFUSE FILE", hal_data->efuse_eeprom_data, mapsize); -+ else -+ RTW_MAP_DUMP_SEL(RTW_DBGDUMP, "HW EFUSE", hal_data->efuse_eeprom_data, mapsize); -+#endif -+} -+ -+ -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+u32 Hal_readPGDataFromConfigFile(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ u32 ret = _FALSE; -+ u32 maplen = 0; -+#ifdef CONFIG_MP_INCLUDED -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+#endif -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (void *)&maplen, _FALSE); -+ -+ if (maplen < 256 || maplen > EEPROM_MAX_SIZE) { -+ RTW_ERR("eFuse length error :%d\n", maplen); -+ return _FALSE; -+ } -+#ifdef CONFIG_MP_INCLUDED -+ if (pmp_priv->efuse_update_file == _TRUE && (rtw_mp_mode_check(padapter))) { -+ RTW_INFO("%s, eFuse read from file :%s\n", __func__, pmp_priv->efuse_file_path); -+ ret = rtw_read_efuse_from_file(pmp_priv->efuse_file_path, hal_data->efuse_eeprom_data, maplen); -+ pmp_priv->efuse_update_file = _FALSE; -+ } else -+#endif -+ { -+ ret = rtw_read_efuse_from_file(EFUSE_MAP_PATH, hal_data->efuse_eeprom_data, maplen); -+ } -+ -+ hal_data->efuse_file_status = ((ret == _FAIL) ? EFUSE_FILE_FAILED : EFUSE_FILE_LOADED); -+ -+ if (hal_data->efuse_file_status == EFUSE_FILE_LOADED) -+ rtw_dump_cur_efuse(padapter); -+ -+ return ret; -+} -+ -+u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ u32 ret = _FAIL; -+ -+ if (rtw_read_macaddr_from_file(WIFIMAC_PATH, mac_addr) == _SUCCESS -+ && rtw_check_invalid_mac_address(mac_addr, _TRUE) == _FALSE -+ ) { -+ hal_data->macaddr_file_status = MACADDR_FILE_LOADED; -+ ret = _SUCCESS; -+ } else -+ hal_data->macaddr_file_status = MACADDR_FILE_FAILED; -+ -+ return ret; -+} -+#endif /* CONFIG_EFUSE_CONFIG_FILE */ -+ -+int hal_config_macaddr(_adapter *adapter, bool autoload_fail) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 addr[ETH_ALEN]; -+ int addr_offset = hal_efuse_macaddr_offset(adapter); -+ u8 *hw_addr = NULL; -+ int ret = _SUCCESS; -+#if defined(CONFIG_RTL8822B) && defined(CONFIG_USB_HCI) -+ u8 ft_mac_addr[ETH_ALEN] = {0x00, 0xff, 0xff, 0xff, 0xff, 0xff}; /* FT USB2 for 8822B */ -+#endif -+ -+ if (autoload_fail) -+ goto bypass_hw_pg; -+ -+ if (addr_offset != -1) -+ hw_addr = &hal_data->efuse_eeprom_data[addr_offset]; -+ -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+ /* if the hw_addr is written by efuse file, set to NULL */ -+ if (hal_data->efuse_file_status == EFUSE_FILE_LOADED) -+ hw_addr = NULL; -+#endif -+ -+ if (!hw_addr) { -+ /* try getting hw pg data */ -+ if (Hal_GetPhyEfuseMACAddr(adapter, addr) == _SUCCESS) -+ hw_addr = addr; -+ } -+ -+#if defined(CONFIG_RTL8822B) && defined(CONFIG_USB_HCI) -+ if (_rtw_memcmp(hw_addr, ft_mac_addr, ETH_ALEN)) -+ hw_addr[0] = 0xff; -+#endif -+ -+ /* check hw pg data */ -+ if (hw_addr && rtw_check_invalid_mac_address(hw_addr, _TRUE) == _FALSE) { -+ _rtw_memcpy(hal_data->EEPROMMACAddr, hw_addr, ETH_ALEN); -+ goto exit; -+ } -+ -+bypass_hw_pg: -+ -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+ /* check wifi mac file */ -+ if (Hal_ReadMACAddrFromFile(adapter, addr) == _SUCCESS) { -+ _rtw_memcpy(hal_data->EEPROMMACAddr, addr, ETH_ALEN); -+ goto exit; -+ } -+#endif -+ -+ _rtw_memset(hal_data->EEPROMMACAddr, 0, ETH_ALEN); -+ ret = _FAIL; -+ -+exit: -+ return ret; -+} -+ -+#ifdef CONFIG_RF_POWER_TRIM -+u32 Array_kfreemap[] = { -+ 0x08, 0xe, -+ 0x06, 0xc, -+ 0x04, 0xa, -+ 0x02, 0x8, -+ 0x00, 0x6, -+ 0x03, 0x4, -+ 0x05, 0x2, -+ 0x07, 0x0, -+ 0x09, 0x0, -+ 0x0c, 0x0, -+}; -+ -+void rtw_bb_rf_gain_offset(_adapter *padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ struct kfree_data_t *kfree_data = &pHalData->kfree_data; -+ u8 value = pHalData->EEPROMRFGainOffset; -+ u8 tmp = 0x3e; -+ u32 res, i = 0; -+ u32 ArrayLen = sizeof(Array_kfreemap) / sizeof(u32); -+ u32 *Array = Array_kfreemap; -+ u32 v1 = 0, v2 = 0, GainValue = 0, target = 0; -+ -+ if (registry_par->RegPwrTrimEnable == 2) { -+ RTW_INFO("Registry kfree default force disable.\n"); -+ return; -+ } -+ -+#if defined(CONFIG_RTL8723B) -+ if (value & BIT4 && (registry_par->RegPwrTrimEnable == 1)) { -+ RTW_INFO("Offset RF Gain.\n"); -+ RTW_INFO("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x\n", pHalData->EEPROMRFGainVal); -+ -+ if (pHalData->EEPROMRFGainVal != 0xff) { -+ -+ if (pHalData->ant_path == RF_PATH_A) -+ GainValue = (pHalData->EEPROMRFGainVal & 0x0f); -+ -+ else -+ GainValue = (pHalData->EEPROMRFGainVal & 0xf0) >> 4; -+ RTW_INFO("Ant PATH_%d GainValue Offset = 0x%x\n", (pHalData->ant_path == RF_PATH_A) ? (RF_PATH_A) : (RF_PATH_B), GainValue); -+ -+ for (i = 0; i < ArrayLen; i += 2) { -+ /* RTW_INFO("ArrayLen in =%d ,Array 1 =0x%x ,Array2 =0x%x\n",i,Array[i],Array[i]+1); */ -+ v1 = Array[i]; -+ v2 = Array[i + 1]; -+ if (v1 == GainValue) { -+ RTW_INFO("Offset RF Gain. got v1 =0x%x ,v2 =0x%x\n", v1, v2); -+ target = v2; -+ break; -+ } -+ } -+ RTW_INFO("pHalData->EEPROMRFGainVal=0x%x ,Gain offset Target Value=0x%x\n", pHalData->EEPROMRFGainVal, target); -+ -+ res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); -+ RTW_INFO("Offset RF Gain. before reg 0x7f=0x%08x\n", res); -+ phy_set_rf_reg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18 | BIT17 | BIT16 | BIT15, target); -+ res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); -+ -+ RTW_INFO("Offset RF Gain. After reg 0x7f=0x%08x\n", res); -+ -+ } else -+ -+ RTW_INFO("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n", pHalData->EEPROMRFGainVal); -+ } else -+ RTW_INFO("Using the default RF gain.\n"); -+ -+#elif defined(CONFIG_RTL8188E) -+ if (value & BIT4 && (registry_par->RegPwrTrimEnable == 1)) { -+ RTW_INFO("8188ES Offset RF Gain.\n"); -+ RTW_INFO("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n", -+ pHalData->EEPROMRFGainVal); -+ -+ if (pHalData->EEPROMRFGainVal != 0xff) { -+ res = rtw_hal_read_rfreg(padapter, RF_PATH_A, -+ REG_RF_BB_GAIN_OFFSET, 0xffffffff); -+ -+ RTW_INFO("Offset RF Gain. reg 0x55=0x%x\n", res); -+ res &= 0xfff87fff; -+ -+ res |= (pHalData->EEPROMRFGainVal & 0x0f) << 15; -+ RTW_INFO("Offset RF Gain. res=0x%x\n", res); -+ -+ rtw_hal_write_rfreg(padapter, RF_PATH_A, -+ REG_RF_BB_GAIN_OFFSET, -+ RF_GAIN_OFFSET_MASK, res); -+ } else { -+ RTW_INFO("Offset RF Gain. EEPROMRFGainVal=0x%x == 0xff, didn't run Kfree\n", -+ pHalData->EEPROMRFGainVal); -+ } -+ } else -+ RTW_INFO("Using the default RF gain.\n"); -+#else -+ /* TODO: call this when channel switch */ -+ if (kfree_data->flag & KFREE_FLAG_ON) -+ rtw_rf_apply_tx_gain_offset(padapter, 6); /* input ch6 to select BB_GAIN_2G */ -+#endif -+ -+} -+#endif /*CONFIG_RF_POWER_TRIM */ -+ -+bool kfree_data_is_bb_gain_empty(struct kfree_data_t *data) -+{ -+#ifdef CONFIG_RF_POWER_TRIM -+ int i, j; -+ -+ for (i = 0; i < BB_GAIN_NUM; i++) -+ for (j = 0; j < RF_PATH_MAX; j++) -+ if (data->bb_gain[i][j] != 0) -+ return 0; -+#endif -+ return 1; -+} -+ -+#ifdef CONFIG_USB_RX_AGGREGATION -+void rtw_set_usb_agg_by_mode_normal(_adapter *padapter, u8 cur_wireless_mode) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ if (cur_wireless_mode < WIRELESS_11_24N -+ && cur_wireless_mode > 0) { /* ABG mode */ -+#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ u32 remainder = 0; -+ u8 quotient = 0; -+ -+ remainder = MAX_RECVBUF_SZ % (4 * 1024); -+ quotient = (u8)(MAX_RECVBUF_SZ >> 12); -+ -+ if (quotient > 5) { -+ pHalData->rxagg_usb_size = 0x6; -+ pHalData->rxagg_usb_timeout = 0x10; -+ } else { -+ if (remainder >= 2048) { -+ pHalData->rxagg_usb_size = quotient; -+ pHalData->rxagg_usb_timeout = 0x10; -+ } else { -+ pHalData->rxagg_usb_size = (quotient - 1); -+ pHalData->rxagg_usb_timeout = 0x10; -+ } -+ } -+#else /* !CONFIG_PREALLOC_RX_SKB_BUFFER */ -+ if (0x6 != pHalData->rxagg_usb_size || 0x10 != pHalData->rxagg_usb_timeout) { -+ pHalData->rxagg_usb_size = 0x6; -+ pHalData->rxagg_usb_timeout = 0x10; -+ rtw_write16(padapter, REG_RXDMA_AGG_PG_TH, -+ pHalData->rxagg_usb_size | (pHalData->rxagg_usb_timeout << 8)); -+ } -+#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ -+ -+ } else if (cur_wireless_mode >= WIRELESS_11_24N -+ && cur_wireless_mode <= WIRELESS_MODE_MAX) { /* N AC mode */ -+#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ u32 remainder = 0; -+ u8 quotient = 0; -+ -+ remainder = MAX_RECVBUF_SZ % (4 * 1024); -+ quotient = (u8)(MAX_RECVBUF_SZ >> 12); -+ -+ if (quotient > 5) { -+ pHalData->rxagg_usb_size = 0x5; -+ pHalData->rxagg_usb_timeout = 0x20; -+ } else { -+ if (remainder >= 2048) { -+ pHalData->rxagg_usb_size = quotient; -+ pHalData->rxagg_usb_timeout = 0x10; -+ } else { -+ pHalData->rxagg_usb_size = (quotient - 1); -+ pHalData->rxagg_usb_timeout = 0x10; -+ } -+ } -+#else /* !CONFIG_PREALLOC_RX_SKB_BUFFER */ -+ if ((0x5 != pHalData->rxagg_usb_size) || (0x20 != pHalData->rxagg_usb_timeout)) { -+ pHalData->rxagg_usb_size = 0x5; -+ pHalData->rxagg_usb_timeout = 0x20; -+ rtw_write16(padapter, REG_RXDMA_AGG_PG_TH, -+ pHalData->rxagg_usb_size | (pHalData->rxagg_usb_timeout << 8)); -+ } -+#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ -+ -+ } else { -+ /* RTW_INFO("%s: Unknow wireless mode(0x%x)\n",__func__,padapter->mlmeextpriv.cur_wireless_mode); */ -+ } -+} -+ -+void rtw_set_usb_agg_by_mode_customer(_adapter *padapter, u8 cur_wireless_mode, u8 UsbDmaSize, u8 Legacy_UsbDmaSize) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (cur_wireless_mode < WIRELESS_11_24N -+ && cur_wireless_mode > 0) { /* ABG mode */ -+ if (Legacy_UsbDmaSize != pHalData->rxagg_usb_size -+ || 0x10 != pHalData->rxagg_usb_timeout) { -+ pHalData->rxagg_usb_size = Legacy_UsbDmaSize; -+ pHalData->rxagg_usb_timeout = 0x10; -+ rtw_write16(padapter, REG_RXDMA_AGG_PG_TH, -+ pHalData->rxagg_usb_size | (pHalData->rxagg_usb_timeout << 8)); -+ } -+ } else if (cur_wireless_mode >= WIRELESS_11_24N -+ && cur_wireless_mode <= WIRELESS_MODE_MAX) { /* N AC mode */ -+ if (UsbDmaSize != pHalData->rxagg_usb_size -+ || 0x20 != pHalData->rxagg_usb_timeout) { -+ pHalData->rxagg_usb_size = UsbDmaSize; -+ pHalData->rxagg_usb_timeout = 0x20; -+ rtw_write16(padapter, REG_RXDMA_AGG_PG_TH, -+ pHalData->rxagg_usb_size | (pHalData->rxagg_usb_timeout << 8)); -+ } -+ } else { -+ /* RTW_INFO("%s: Unknown wireless mode(0x%x)\n",__func__,padapter->mlmeextpriv.cur_wireless_mode); */ -+ } -+} -+ -+void rtw_set_usb_agg_by_mode(_adapter *padapter, u8 cur_wireless_mode) -+{ -+#ifdef CONFIG_PLATFORM_NOVATEK_NT72668 -+ rtw_set_usb_agg_by_mode_customer(padapter, cur_wireless_mode, 0x3, 0x3); -+ return; -+#endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ -+ -+ rtw_set_usb_agg_by_mode_normal(padapter, cur_wireless_mode); -+} -+#endif /* CONFIG_USB_RX_AGGREGATION */ -+ -+/* To avoid RX affect TX throughput */ -+void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 cur_wireless_mode = WIRELESS_INVALID; -+ -+#ifdef CONFIG_USB_RX_AGGREGATION -+ if (!registry_par->dynamic_agg_enable) -+ return; -+ -+#ifdef RTW_HALMAC -+ if (IS_HARDWARE_TYPE_8822BU(padapter) || IS_HARDWARE_TYPE_8821CU(padapter) -+ || IS_HARDWARE_TYPE_8822CU(padapter) || IS_HARDWARE_TYPE_8814BU(padapter) -+ || IS_HARDWARE_TYPE_8723FU(padapter)) -+ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, NULL); -+#else /* !RTW_HALMAC */ -+ if (IS_HARDWARE_TYPE_8821U(padapter)) { /* || IS_HARDWARE_TYPE_8192EU(padapter)) */ -+ /* This AGG_PH_TH only for UsbRxAggMode == USB_RX_AGG_USB */ -+ if ((pHalData->rxagg_mode == RX_AGG_USB) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) { -+ if (pdvobjpriv->traffic_stat.cur_tx_tp > 2 && pdvobjpriv->traffic_stat.cur_rx_tp < 30) -+ rtw_write16(padapter , REG_RXDMA_AGG_PG_TH , 0x1010); -+ else if (pdvobjpriv->traffic_stat.last_tx_bytes > 220000 && pdvobjpriv->traffic_stat.cur_rx_tp < 30) -+ rtw_write16(padapter , REG_RXDMA_AGG_PG_TH , 0x1006); -+ else -+ rtw_write16(padapter, REG_RXDMA_AGG_PG_TH, 0x2005); /* dmc agg th 20K */ -+ -+ /* RTW_INFO("TX_TP=%u, RX_TP=%u\n", pdvobjpriv->traffic_stat.cur_tx_tp, pdvobjpriv->traffic_stat.cur_rx_tp); */ -+ } -+ } else if (IS_HARDWARE_TYPE_8812(padapter)) { -+#ifdef CONFIG_CONCURRENT_MODE -+ u8 i; -+ _adapter *iface; -+ u8 bassocaed = _FALSE; -+ struct mlme_ext_priv *mlmeext; -+ -+ for (i = 0; i < pdvobjpriv->iface_nums; i++) { -+ iface = pdvobjpriv->padapters[i]; -+ mlmeext = &iface->mlmeextpriv; -+ if (rtw_linked_check(iface) == _TRUE) { -+ if (mlmeext->cur_wireless_mode >= cur_wireless_mode) -+ cur_wireless_mode = mlmeext->cur_wireless_mode; -+ bassocaed = _TRUE; -+ } -+ } -+ if (bassocaed) -+#endif -+ rtw_set_usb_agg_by_mode(padapter, cur_wireless_mode); -+#ifdef CONFIG_PLATFORM_NOVATEK_NT72668 -+ } else { -+ rtw_set_usb_agg_by_mode(padapter, cur_wireless_mode); -+#endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ -+ } -+#endif /* RTW_HALMAC */ -+#endif /* CONFIG_USB_RX_AGGREGATION */ -+ -+} -+ -+/* bus-agg check for SoftAP mode */ -+inline u8 rtw_hal_busagg_qsel_check(_adapter *padapter, u8 pre_qsel, u8 next_qsel) -+{ -+#ifdef CONFIG_AP_MODE -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 chk_rst = _SUCCESS; -+ -+ if (!MLME_IS_AP(padapter) && !MLME_IS_MESH(padapter)) -+ return chk_rst; -+ -+ /* if((pre_qsel == 0xFF)||(next_qsel== 0xFF)) */ -+ /* return chk_rst; */ -+ -+ if (((pre_qsel == QSLT_HIGH) || ((next_qsel == QSLT_HIGH))) -+ && (pre_qsel != next_qsel)) { -+ /* RTW_INFO("### bus-agg break cause of qsel misatch, pre_qsel=0x%02x,next_qsel=0x%02x ###\n", */ -+ /* pre_qsel,next_qsel); */ -+ chk_rst = _FAIL; -+ } -+ return chk_rst; -+#else -+ return _SUCCESS; -+#endif /* CONFIG_AP_MODE */ -+} -+ -+#ifdef CONFIG_WOWLAN -+/* -+ * Description: -+ * dump_TX_FIFO: This is only used to dump TX_FIFO for debug WoW mode offload -+ * contant. -+ * -+ * Input: -+ * adapter: adapter pointer. -+ * page_num: The max. page number that user want to dump. -+ * page_size: page size of each page. eg. 128 bytes, 256 bytes, 512byte. -+ */ -+void dump_TX_FIFO(_adapter *padapter, u8 page_num, u16 page_size) -+{ -+ -+ int i; -+ u8 val = 0; -+ u8 base = 0; -+ u32 addr = 0; -+ u32 count = (page_size / 8); -+ -+ if (page_num <= 0) { -+ RTW_INFO("!!%s: incorrect input page_num paramter!\n", __func__); -+ return; -+ } -+ -+ if (page_size < 128 || page_size > 512) { -+ RTW_INFO("!!%s: incorrect input page_size paramter!\n", __func__); -+ return; -+ } -+ -+ RTW_INFO("+%s+\n", __func__); -+ val = rtw_read8(padapter, 0x106); -+ rtw_write8(padapter, 0x106, 0x69); -+ RTW_INFO("0x106: 0x%02x\n", val); -+ base = rtw_read8(padapter, 0x209); -+ RTW_INFO("0x209: 0x%02x\n", base); -+ -+ addr = ((base)*page_size) / 8; -+ for (i = 0 ; i < page_num * count ; i += 2) { -+ rtw_write32(padapter, 0x140, addr + i); -+ printk(" %08x %08x ", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148)); -+ rtw_write32(padapter, 0x140, addr + i + 1); -+ printk(" %08x %08x\n", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148)); -+ } -+} -+#endif -+ -+#ifdef CONFIG_GPIO_API -+u8 rtw_hal_get_gpio(_adapter *adapter, u8 gpio_num) -+{ -+ u8 value = 0; -+ u8 direction = 0; -+ u32 gpio_pin_input_val = REG_GPIO_PIN_CTRL; -+ u32 gpio_pin_output_val = REG_GPIO_PIN_CTRL + 1; -+ u32 gpio_pin_output_en = REG_GPIO_PIN_CTRL + 2; -+ u8 gpio_num_to_set = gpio_num; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ -+ if (rtw_hal_gpio_func_check(adapter, gpio_num) == _FAIL) -+ return value; -+ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ -+ RTW_INFO("rf_pwrstate=0x%02x\n", pwrpriv->rf_pwrstate); -+ LeaveAllPowerSaveModeDirect(adapter); -+ -+ if (gpio_num > 7) { -+ gpio_pin_input_val = REG_GPIO_PIN_CTRL_2; -+ gpio_pin_output_val = REG_GPIO_PIN_CTRL_2 + 1; -+ gpio_pin_output_en = REG_GPIO_PIN_CTRL_2 + 2; -+ gpio_num_to_set = gpio_num - 8; -+ } -+ -+ /* Read GPIO Direction */ -+ direction = (rtw_read8(adapter, gpio_pin_output_en) & BIT(gpio_num_to_set)) >> gpio_num_to_set; -+ -+ /* According the direction to read register value */ -+ if (direction) -+ value = (rtw_read8(adapter, gpio_pin_output_val) & BIT(gpio_num_to_set)) >> gpio_num_to_set; -+ else -+ value = (rtw_read8(adapter, gpio_pin_input_val) & BIT(gpio_num_to_set)) >> gpio_num_to_set; -+ -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+ RTW_INFO("%s direction=%d value=%d\n", __FUNCTION__, direction, value); -+ -+ return value; -+} -+ -+int rtw_hal_set_gpio_output_value(_adapter *adapter, u8 gpio_num, bool isHigh) -+{ -+ u8 direction = 0; -+ u8 res = -1; -+ u32 gpio_pin_output_val = REG_GPIO_PIN_CTRL + 1; -+ u32 gpio_pin_output_en = REG_GPIO_PIN_CTRL + 2; -+ u8 gpio_num_to_set = gpio_num; -+ -+ if (rtw_hal_gpio_func_check(adapter, gpio_num) == _FAIL) -+ return -1; -+ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ -+ LeaveAllPowerSaveModeDirect(adapter); -+ -+ if (gpio_num > 7) { -+ gpio_pin_output_val = REG_GPIO_PIN_CTRL_2 + 1; -+ gpio_pin_output_en = REG_GPIO_PIN_CTRL_2 + 2; -+ gpio_num_to_set = gpio_num - 8; -+ } -+ -+ /* Read GPIO direction */ -+ direction = (rtw_read8(adapter, gpio_pin_output_en) & BIT(gpio_num_to_set)) >> gpio_num_to_set; -+ -+ /* If GPIO is output direction, setting value. */ -+ if (direction) { -+ if (isHigh) -+ rtw_write8(adapter, gpio_pin_output_val, rtw_read8(adapter, gpio_pin_output_val) | BIT(gpio_num_to_set)); -+ else -+ rtw_write8(adapter, gpio_pin_output_val, rtw_read8(adapter, gpio_pin_output_val) & ~BIT(gpio_num_to_set)); -+ -+ RTW_INFO("%s Set gpio %x[%d]=%d\n", __FUNCTION__, REG_GPIO_PIN_CTRL + 1, gpio_num, isHigh); -+ res = 0; -+ } else { -+ RTW_INFO("%s The gpio is input,not be set!\n", __FUNCTION__); -+ res = -1; -+ } -+ -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+ return res; -+} -+ -+int rtw_hal_config_gpio(_adapter *adapter, u8 gpio_num, bool isOutput) -+{ -+ u32 gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL + 2; -+ u8 gpio_num_to_set = gpio_num; -+ -+ if (rtw_hal_gpio_func_check(adapter, gpio_num) == _FAIL) -+ return -1; -+ -+ RTW_INFO("%s gpio_num =%d direction=%d\n", __FUNCTION__, gpio_num, isOutput); -+ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ -+ LeaveAllPowerSaveModeDirect(adapter); -+ -+ rtw_hal_gpio_multi_func_reset(adapter, gpio_num); -+ -+ if (gpio_num > 7) { -+ gpio_ctrl_reg_to_set = REG_GPIO_PIN_CTRL_2 + 2; -+ gpio_num_to_set = gpio_num - 8; -+ } -+ -+ if (isOutput) -+ rtw_write8(adapter, gpio_ctrl_reg_to_set, rtw_read8(adapter, gpio_ctrl_reg_to_set) | BIT(gpio_num_to_set)); -+ else -+ rtw_write8(adapter, gpio_ctrl_reg_to_set, rtw_read8(adapter, gpio_ctrl_reg_to_set) & ~BIT(gpio_num_to_set)); -+ -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+ -+ return 0; -+} -+int rtw_hal_register_gpio_interrupt(_adapter *adapter, int gpio_num, void(*callback)(u8 level)) -+{ -+ u8 value; -+ u8 direction; -+ PHAL_DATA_TYPE phal = GET_HAL_DATA(adapter); -+ -+ if (IS_HARDWARE_TYPE_8188E(adapter)) { -+ if (gpio_num > 7 || gpio_num < 4) { -+ RTW_PRINT("%s The gpio number does not included 4~7.\n", __FUNCTION__); -+ return -1; -+ } -+ } -+ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ -+ LeaveAllPowerSaveModeDirect(adapter); -+ -+ /* Read GPIO direction */ -+ direction = (rtw_read8(adapter, REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num; -+ if (direction) { -+ RTW_PRINT("%s Can't register output gpio as interrupt.\n", __FUNCTION__); -+ return -1; -+ } -+ -+ /* Config GPIO Mode */ -+ rtw_write8(adapter, REG_GPIO_PIN_CTRL + 3, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 3) | BIT(gpio_num)); -+ -+ /* Register GPIO interrupt handler*/ -+ adapter->gpiointpriv.callback[gpio_num] = callback; -+ -+ /* Set GPIO interrupt mode, 0:positive edge, 1:negative edge */ -+ value = rtw_read8(adapter, REG_GPIO_PIN_CTRL) & BIT(gpio_num); -+ adapter->gpiointpriv.interrupt_mode = rtw_read8(adapter, REG_HSIMR + 2) ^ value; -+ rtw_write8(adapter, REG_GPIO_INTM, adapter->gpiointpriv.interrupt_mode); -+ -+ /* Enable GPIO interrupt */ -+ adapter->gpiointpriv.interrupt_enable_mask = rtw_read8(adapter, REG_HSIMR + 2) | BIT(gpio_num); -+ rtw_write8(adapter, REG_HSIMR + 2, adapter->gpiointpriv.interrupt_enable_mask); -+ -+ rtw_hal_update_hisr_hsisr_ind(adapter, 1); -+ -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+ -+ return 0; -+} -+int rtw_hal_disable_gpio_interrupt(_adapter *adapter, int gpio_num) -+{ -+ u8 value; -+ u8 direction; -+ PHAL_DATA_TYPE phal = GET_HAL_DATA(adapter); -+ -+ if (IS_HARDWARE_TYPE_8188E(adapter)) { -+ if (gpio_num > 7 || gpio_num < 4) { -+ RTW_INFO("%s The gpio number does not included 4~7.\n", __FUNCTION__); -+ return -1; -+ } -+ } -+ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ -+ LeaveAllPowerSaveModeDirect(adapter); -+ -+ /* Config GPIO Mode */ -+ rtw_write8(adapter, REG_GPIO_PIN_CTRL + 3, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 3) & ~BIT(gpio_num)); -+ -+ /* Unregister GPIO interrupt handler*/ -+ adapter->gpiointpriv.callback[gpio_num] = NULL; -+ -+ /* Reset GPIO interrupt mode, 0:positive edge, 1:negative edge */ -+ adapter->gpiointpriv.interrupt_mode = rtw_read8(adapter, REG_GPIO_INTM) & ~BIT(gpio_num); -+ rtw_write8(adapter, REG_GPIO_INTM, 0x00); -+ -+ /* Disable GPIO interrupt */ -+ adapter->gpiointpriv.interrupt_enable_mask = rtw_read8(adapter, REG_HSIMR + 2) & ~BIT(gpio_num); -+ rtw_write8(adapter, REG_HSIMR + 2, adapter->gpiointpriv.interrupt_enable_mask); -+ -+ if (!adapter->gpiointpriv.interrupt_enable_mask) -+ rtw_hal_update_hisr_hsisr_ind(adapter, 0); -+ -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+ -+ return 0; -+} -+#endif -+ -+s8 rtw_hal_ch_sw_iqk_info_search(_adapter *padapter, u8 central_chnl, u8 bw_mode) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 i; -+ -+ for (i = 0; i < MAX_IQK_INFO_BACKUP_CHNL_NUM; i++) { -+ if ((pHalData->iqk_reg_backup[i].central_chnl != 0)) { -+ if ((pHalData->iqk_reg_backup[i].central_chnl == central_chnl) -+ && (pHalData->iqk_reg_backup[i].bw_mode == bw_mode)) -+ return i; -+ } -+ } -+ -+ return -1; -+} -+ -+void rtw_hal_ch_sw_iqk_info_backup(_adapter *padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ s8 res; -+ u8 i; -+ -+ /* If it's an existed record, overwrite it */ -+ res = rtw_hal_ch_sw_iqk_info_search(padapter, pHalData->current_channel, pHalData->current_channel_bw); -+ if ((res >= 0) && (res < MAX_IQK_INFO_BACKUP_CHNL_NUM)) { -+ rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_BACKUP, (u8 *)&(pHalData->iqk_reg_backup[res])); -+ return; -+ } -+ -+ /* Search for the empty record to use */ -+ for (i = 0; i < MAX_IQK_INFO_BACKUP_CHNL_NUM; i++) { -+ if (pHalData->iqk_reg_backup[i].central_chnl == 0) { -+ rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_BACKUP, (u8 *)&(pHalData->iqk_reg_backup[i])); -+ return; -+ } -+ } -+ -+ /* Else, overwrite the oldest record */ -+ for (i = 1; i < MAX_IQK_INFO_BACKUP_CHNL_NUM; i++) -+ _rtw_memcpy(&(pHalData->iqk_reg_backup[i - 1]), &(pHalData->iqk_reg_backup[i]), sizeof(struct hal_iqk_reg_backup)); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_BACKUP, (u8 *)&(pHalData->iqk_reg_backup[MAX_IQK_INFO_BACKUP_CHNL_NUM - 1])); -+} -+ -+void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case) -+{ -+ rtw_hal_set_hwreg(padapter, HW_VAR_CH_SW_IQK_INFO_RESTORE, &ch_sw_use_case); -+} -+ -+void rtw_dump_mac_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter) -+{ -+ u32 mac_cck_ok = 0, mac_ofdm_ok = 0, mac_ht_ok = 0, mac_vht_ok = 0; -+ u32 mac_cck_err = 0, mac_ofdm_err = 0, mac_ht_err = 0, mac_vht_err = 0; -+ u32 mac_cck_fa = 0, mac_ofdm_fa = 0, mac_ht_fa = 0; -+ u32 DropPacket = 0; -+ -+ if (!rx_counter) { -+ rtw_warn_on(1); -+ return; -+ } -+ if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT26, 0x0);/*clear bit-26*/ -+ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x3); -+ mac_cck_ok = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0] */ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x0); -+ mac_ofdm_ok = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0] */ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x6); -+ mac_ht_ok = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0] */ -+ mac_vht_ok = 0; -+ if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) { -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x0); -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT26, 0x1); -+ mac_vht_ok = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0]*/ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT26, 0x0);/*clear bit-26*/ -+ } -+ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x4); -+ mac_cck_err = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0] */ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x1); -+ mac_ofdm_err = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0] */ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x7); -+ mac_ht_err = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0] */ -+ mac_vht_err = 0; -+ if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) { -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x1); -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT26, 0x1); -+ mac_vht_err = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0]*/ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT26, 0x0);/*clear bit-26*/ -+ } -+ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x5); -+ mac_cck_fa = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0] */ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x2); -+ mac_ofdm_fa = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0] */ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT28 | BIT29 | BIT30 | BIT31, 0x9); -+ mac_ht_fa = phy_query_mac_reg(padapter, REG_RXERR_RPT, bMaskLWord);/* [15:0] */ -+ -+ /* Mac_DropPacket */ -+ rtw_write32(padapter, REG_RXERR_RPT, (rtw_read32(padapter, REG_RXERR_RPT) & 0x0FFFFFFF) | Mac_DropPacket); -+ DropPacket = rtw_read32(padapter, REG_RXERR_RPT) & 0x0000FFFF; -+ -+ rx_counter->rx_pkt_ok = mac_cck_ok + mac_ofdm_ok + mac_ht_ok + mac_vht_ok; -+ rx_counter->rx_pkt_crc_error = mac_cck_err + mac_ofdm_err + mac_ht_err + mac_vht_err; -+ rx_counter->rx_cck_fa = mac_cck_fa; -+ rx_counter->rx_ofdm_fa = mac_ofdm_fa; -+ rx_counter->rx_ht_fa = mac_ht_fa; -+ rx_counter->rx_pkt_drop = DropPacket; -+} -+void rtw_reset_mac_rx_counters(_adapter *padapter) -+{ -+ -+ /* If no packet rx, MaxRx clock be gating ,BIT_DISGCLK bit19 set 1 for fix*/ -+ if (IS_HARDWARE_TYPE_8703B(padapter) || -+ IS_HARDWARE_TYPE_8723D(padapter) || -+ IS_HARDWARE_TYPE_8188F(padapter) || -+ IS_HARDWARE_TYPE_8188GTV(padapter) || -+ IS_HARDWARE_TYPE_8192F(padapter) || -+ IS_HARDWARE_TYPE_8822C(padapter)) -+ phy_set_mac_reg(padapter, REG_RCR, BIT19, 0x1); -+ -+ /* reset mac counter */ -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT27, 0x1); -+ phy_set_mac_reg(padapter, REG_RXERR_RPT, BIT27, 0x0); -+} -+ -+void rtw_dump_phy_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter) -+{ -+ u32 cckok = 0, cckcrc = 0, ofdmok = 0, ofdmcrc = 0, htok = 0, htcrc = 0, OFDM_FA = 0, CCK_FA = 0, vht_ok = 0, vht_err = 0; -+ if (!rx_counter) { -+ rtw_warn_on(1); -+ return; -+ } -+ if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) { -+ cckok = phy_query_bb_reg(padapter, 0xF04, 0x3FFF); /* [13:0] */ -+ ofdmok = phy_query_bb_reg(padapter, 0xF14, 0x3FFF); /* [13:0] */ -+ htok = phy_query_bb_reg(padapter, 0xF10, 0x3FFF); /* [13:0] */ -+ vht_ok = phy_query_bb_reg(padapter, 0xF0C, 0x3FFF); /* [13:0] */ -+ cckcrc = phy_query_bb_reg(padapter, 0xF04, 0x3FFF0000); /* [29:16] */ -+ ofdmcrc = phy_query_bb_reg(padapter, 0xF14, 0x3FFF0000); /* [29:16] */ -+ htcrc = phy_query_bb_reg(padapter, 0xF10, 0x3FFF0000); /* [29:16] */ -+ vht_err = phy_query_bb_reg(padapter, 0xF0C, 0x3FFF0000); /* [29:16] */ -+ CCK_FA = phy_query_bb_reg(padapter, 0xA5C, bMaskLWord); -+ OFDM_FA = phy_query_bb_reg(padapter, 0xF48, bMaskLWord); -+ } else if(IS_HARDWARE_TYPE_JAGUAR3(padapter)){ -+ cckok = phy_query_bb_reg(padapter, 0x2c04, 0xffff); -+ ofdmok = phy_query_bb_reg(padapter, 0x2c14, 0xffff); -+ htok = phy_query_bb_reg(padapter, 0x2c10, 0xffff); -+ vht_ok = phy_query_bb_reg(padapter, 0x2c0c, 0xffff); -+ cckcrc = phy_query_bb_reg(padapter, 0x2c04, 0xffff0000); -+ ofdmcrc = phy_query_bb_reg(padapter, 0x2c14, 0xffff0000); -+ htcrc = phy_query_bb_reg(padapter, 0x2c10, 0xffff0000); -+ vht_err = phy_query_bb_reg(padapter, 0x2c0c, 0xffff0000); -+ CCK_FA = phy_query_bb_reg(padapter, 0x1a5c, bMaskLWord); -+ OFDM_FA = phy_query_bb_reg(padapter, 0x2d00, bMaskLWord) - phy_query_bb_reg(padapter, 0x2de0, bMaskLWord); -+ } else if(IS_HARDWARE_TYPE_JAGUAR3_11N(padapter)){ -+ cckok = phy_query_bb_reg(padapter, 0x2aac, 0xffff); -+ ofdmok = phy_query_bb_reg(padapter, 0x2c14, 0xffff); -+ htok = phy_query_bb_reg(padapter, 0x2c10, 0xffff); -+ cckcrc = phy_query_bb_reg(padapter, 0x2aac, 0xffff0000); -+ ofdmcrc = phy_query_bb_reg(padapter, 0x2c14, 0xffff0000); -+ htcrc = phy_query_bb_reg(padapter, 0x2c10, 0xffff0000); -+ CCK_FA = phy_query_bb_reg(padapter, 0x2aa8, 0xffff0000) + phy_query_bb_reg(padapter, 0x2aa8, 0x0000ffff); -+ OFDM_FA = phy_query_bb_reg(padapter, 0x2d00, bMaskLWord) - phy_query_bb_reg(padapter, 0x2de0, bMaskLWord); -+ } else { -+ cckok = phy_query_bb_reg(padapter, 0xF88, bMaskDWord); -+ ofdmok = phy_query_bb_reg(padapter, 0xF94, bMaskLWord); -+ htok = phy_query_bb_reg(padapter, 0xF90, bMaskLWord); -+ vht_ok = 0; -+ cckcrc = phy_query_bb_reg(padapter, 0xF84, bMaskDWord); -+ ofdmcrc = phy_query_bb_reg(padapter, 0xF94, bMaskHWord); -+ htcrc = phy_query_bb_reg(padapter, 0xF90, bMaskHWord); -+ vht_err = 0; -+ OFDM_FA = phy_query_bb_reg(padapter, 0xCF0, bMaskLWord) + phy_query_bb_reg(padapter, 0xCF2, bMaskLWord) + -+ phy_query_bb_reg(padapter, 0xDA2, bMaskLWord) + phy_query_bb_reg(padapter, 0xDA4, bMaskLWord) + -+ phy_query_bb_reg(padapter, 0xDA6, bMaskLWord) + phy_query_bb_reg(padapter, 0xDA8, bMaskLWord); -+ -+ CCK_FA = (rtw_read8(padapter, 0xA5B) << 8) | (rtw_read8(padapter, 0xA5C)); -+ } -+ -+ rx_counter->rx_pkt_ok = cckok + ofdmok + htok + vht_ok; -+ rx_counter->rx_pkt_crc_error = cckcrc + ofdmcrc + htcrc + vht_err; -+ rx_counter->rx_ofdm_fa = OFDM_FA; -+ rx_counter->rx_cck_fa = CCK_FA; -+ -+} -+ -+void rtw_reset_phy_trx_ok_counters(_adapter *padapter) -+{ -+ if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) { -+ phy_set_bb_reg(padapter, 0xB58, BIT0, 0x1); -+ phy_set_bb_reg(padapter, 0xB58, BIT0, 0x0); -+ } else if(IS_HARDWARE_TYPE_JAGUAR3(padapter) || IS_HARDWARE_TYPE_JAGUAR3_11N(padapter)) { -+ phy_set_bb_reg(padapter, 0x1EB4, BIT25, 0x1); -+ phy_set_bb_reg(padapter, 0x1EB4, BIT25, 0x0); -+ } else { -+ phy_set_bb_reg(padapter, 0xF14, BIT16, 0x1); -+ phy_set_bb_reg(padapter, 0xF14, BIT16, 0x0); -+ } -+} -+ -+void rtw_reset_phy_rx_counters(_adapter *padapter) -+{ -+ /* reset phy counter */ -+ if (IS_HARDWARE_TYPE_JAGUAR3(padapter)) { -+ /* reset CCK FA counter */ -+ phy_set_bb_reg(padapter, 0x1a2c, BIT(15) | BIT(14), 0); -+ phy_set_bb_reg(padapter, 0x1a2c, BIT(15) | BIT(14), 2); -+ -+ /* reset CCK CCA counter */ -+ phy_set_bb_reg(padapter, 0x1a2c, BIT(13) | BIT(12), 0); -+ phy_set_bb_reg(padapter, 0x1a2c, BIT(13) | BIT(12), 2); -+ -+ } else if (IS_HARDWARE_TYPE_JAGUAR3_11N(padapter)) { -+ /* reset CCK FA and CCK CCA counter */ -+ phy_set_bb_reg(padapter, 0x2a44, BIT21, 0); -+ phy_set_bb_reg(padapter, 0x2a44, BIT21, 1); -+ rtw_reset_phy_trx_ok_counters(padapter); -+ -+ } else if (IS_HARDWARE_TYPE_JAGUAR(padapter) || IS_HARDWARE_TYPE_JAGUAR2(padapter)) { -+ rtw_reset_phy_trx_ok_counters(padapter); -+ -+ phy_set_bb_reg(padapter, 0x9A4, BIT17, 0x1);/* reset OFDA FA counter */ -+ phy_set_bb_reg(padapter, 0x9A4, BIT17, 0x0); -+ -+ phy_set_bb_reg(padapter, 0xA2C, BIT15, 0x0);/* reset CCK FA counter */ -+ phy_set_bb_reg(padapter, 0xA2C, BIT15, 0x1); -+ } else { -+ phy_set_bb_reg(padapter, 0xF14, BIT16, 0x1); -+ rtw_msleep_os(10); -+ phy_set_bb_reg(padapter, 0xF14, BIT16, 0x0); -+ -+ phy_set_bb_reg(padapter, 0xD00, BIT27, 0x1);/* reset OFDA FA counter */ -+ phy_set_bb_reg(padapter, 0xC0C, BIT31, 0x1);/* reset OFDA FA counter */ -+ phy_set_bb_reg(padapter, 0xD00, BIT27, 0x0); -+ phy_set_bb_reg(padapter, 0xC0C, BIT31, 0x0); -+ -+ phy_set_bb_reg(padapter, 0xA2C, BIT15, 0x0);/* reset CCK FA counter */ -+ phy_set_bb_reg(padapter, 0xA2C, BIT15, 0x1); -+ } -+} -+#ifdef DBG_RX_COUNTER_DUMP -+void rtw_dump_drv_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter) -+{ -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ if (!rx_counter) { -+ rtw_warn_on(1); -+ return; -+ } -+ rx_counter->rx_pkt_ok = padapter->drv_rx_cnt_ok; -+ rx_counter->rx_pkt_crc_error = padapter->drv_rx_cnt_crcerror; -+ rx_counter->rx_pkt_drop = precvpriv->rx_drop - padapter->drv_rx_cnt_drop; -+} -+void rtw_reset_drv_rx_counters(_adapter *padapter) -+{ -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ padapter->drv_rx_cnt_ok = 0; -+ padapter->drv_rx_cnt_crcerror = 0; -+ padapter->drv_rx_cnt_drop = precvpriv->rx_drop; -+} -+void rtw_dump_phy_rxcnts_preprocess(_adapter *padapter, u8 rx_cnt_mode) -+{ -+ u8 initialgain; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ -+ if ((!(padapter->dump_rx_cnt_mode & DUMP_PHY_RX_COUNTER)) && (rx_cnt_mode & DUMP_PHY_RX_COUNTER)) { -+ rtw_hal_get_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, NULL); -+ RTW_INFO("%s CurIGValue:0x%02x\n", __FUNCTION__, initialgain); -+ rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE); -+ /*disable dynamic functions, such as high power, DIG*/ -+ rtw_phydm_ability_backup(padapter); -+ rtw_phydm_func_clr(padapter, (ODM_BB_DIG | ODM_BB_FA_CNT)); -+ } else if ((padapter->dump_rx_cnt_mode & DUMP_PHY_RX_COUNTER) && (!(rx_cnt_mode & DUMP_PHY_RX_COUNTER))) { -+ /* turn on phy-dynamic functions */ -+ rtw_phydm_ability_restore(padapter); -+ initialgain = 0xff; /* restore RX GAIN */ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE); -+ -+ } -+} -+ -+void rtw_dump_rx_counters(_adapter *padapter) -+{ -+ struct dbg_rx_counter rx_counter; -+ -+ if (padapter->dump_rx_cnt_mode & DUMP_DRV_RX_COUNTER) { -+ _rtw_memset(&rx_counter, 0, sizeof(struct dbg_rx_counter)); -+ rtw_dump_drv_rx_counters(padapter, &rx_counter); -+ RTW_INFO("Drv Received packet OK:%d CRC error:%d Drop Packets: %d\n", -+ rx_counter.rx_pkt_ok, rx_counter.rx_pkt_crc_error, rx_counter.rx_pkt_drop); -+ rtw_reset_drv_rx_counters(padapter); -+ } -+ -+ if (padapter->dump_rx_cnt_mode & DUMP_MAC_RX_COUNTER) { -+ _rtw_memset(&rx_counter, 0, sizeof(struct dbg_rx_counter)); -+ rtw_dump_mac_rx_counters(padapter, &rx_counter); -+ RTW_INFO("Mac Received packet OK:%d CRC error:%d FA Counter: %d Drop Packets: %d\n", -+ rx_counter.rx_pkt_ok, rx_counter.rx_pkt_crc_error, -+ rx_counter.rx_cck_fa + rx_counter.rx_ofdm_fa + rx_counter.rx_ht_fa, -+ rx_counter.rx_pkt_drop); -+ rtw_reset_mac_rx_counters(padapter); -+ } -+ -+ if (padapter->dump_rx_cnt_mode & DUMP_PHY_RX_COUNTER) { -+ _rtw_memset(&rx_counter, 0, sizeof(struct dbg_rx_counter)); -+ rtw_dump_phy_rx_counters(padapter, &rx_counter); -+ /* RTW_INFO("%s: OFDM_FA =%d\n", __FUNCTION__, rx_counter.rx_ofdm_fa); */ -+ /* RTW_INFO("%s: CCK_FA =%d\n", __FUNCTION__, rx_counter.rx_cck_fa); */ -+ RTW_INFO("Phy Received packet OK:%d CRC error:%d FA Counter: %d\n", rx_counter.rx_pkt_ok, rx_counter.rx_pkt_crc_error, -+ rx_counter.rx_ofdm_fa + rx_counter.rx_cck_fa); -+ rtw_reset_phy_rx_counters(padapter); -+ } -+} -+#endif -+u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ u8 curr_tx_sgi = 0; -+ struct ra_sta_info *ra_info; -+ -+ if (!psta) -+ return curr_tx_sgi; -+ -+ if (padapter->fix_rate == 0xff) { -+#if defined(CONFIG_RTL8188E) -+#if (RATE_ADAPTIVE_SUPPORT == 1) -+ curr_tx_sgi = hal_data->odmpriv.ra_info[psta->cmn.mac_id].rate_sgi; -+#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/ -+#else -+ ra_info = &psta->cmn.ra_info; -+ curr_tx_sgi = ((ra_info->curr_tx_rate) & 0x80) >> 7; -+#endif -+ } else { -+ curr_tx_sgi = ((padapter->fix_rate) & 0x80) >> 7; -+ } -+ -+ return curr_tx_sgi; -+} -+ -+u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ u8 rate_id = 0; -+ struct ra_sta_info *ra_info; -+ -+ if (!psta) -+ return rate_id; -+ -+ if (padapter->fix_rate == 0xff) { -+#if defined(CONFIG_RTL8188E) -+#if (RATE_ADAPTIVE_SUPPORT == 1) -+ rate_id = hal_data->odmpriv.ra_info[psta->cmn.mac_id].decision_rate; -+#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/ -+#else -+ ra_info = &psta->cmn.ra_info; -+ rate_id = ra_info->curr_tx_rate & 0x7f; -+#endif -+ } else { -+ rate_id = padapter->fix_rate & 0x7f; -+ } -+ -+ return rate_id; -+} -+ -+void update_IOT_info(_adapter *padapter) -+{ -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ switch (pmlmeinfo->assoc_AP_vendor) { -+ case HT_IOT_PEER_MARVELL: -+ pmlmeinfo->turboMode_cts2self = 1; -+ pmlmeinfo->turboMode_rtsen = 0; -+ break; -+ -+ case HT_IOT_PEER_RALINK: -+ pmlmeinfo->turboMode_cts2self = 0; -+ pmlmeinfo->turboMode_rtsen = 1; -+ break; -+ case HT_IOT_PEER_REALTEK: -+ /* rtw_write16(padapter, 0x4cc, 0xffff); */ -+ /* rtw_write16(padapter, 0x546, 0x01c0); */ -+ break; -+ default: -+ pmlmeinfo->turboMode_cts2self = 0; -+ pmlmeinfo->turboMode_rtsen = 1; -+ break; -+ } -+ -+} -+#ifdef CONFIG_RTS_FULL_BW -+/* -+8188E: not support full RTS BW feature(mac REG no define 480[5]) -+*/ -+void rtw_set_rts_bw(_adapter *padapter) { -+ int i; -+ u8 enable = 1; -+ bool connect_to_8812 = _FALSE; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ struct sta_info *station = NULL; -+ -+ for (i = 0; i < macid_ctl->num; i++) { -+ if (rtw_macid_is_used(macid_ctl, i)) { -+ -+ station = NULL; -+ station = macid_ctl->sta[i]; -+ if(station) { -+ -+ _adapter *sta_adapter =station->padapter; -+ struct mlme_ext_priv *pmlmeext = &(sta_adapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ if ( pmlmeinfo->state != WIFI_FW_NULL_STATE) { -+ if(_rtw_memcmp(macid_ctl->sta[i]->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) { -+ if ( macid_ctl->sta[i]->vendor_8812) { -+ connect_to_8812 = _TRUE; -+ enable = 0; -+ } -+ } -+ } -+ } -+ } -+ -+ if(connect_to_8812) -+ break; -+ } -+ -+ RTW_INFO("%s connect_to_8812=%d,enable=%u\n", __FUNCTION__,connect_to_8812,enable); -+ rtw_hal_set_hwreg(padapter, HW_VAR_SET_RTS_BW, &enable); -+} -+#endif/*CONFIG_RTS_FULL_BW*/ -+ -+int hal_spec_init(_adapter *adapter) -+{ -+ u8 interface_type = 0; -+ int ret = _SUCCESS; -+ -+ interface_type = rtw_get_intf_type(adapter); -+ -+ switch (rtw_get_chip_type(adapter)) { -+#ifdef CONFIG_RTL8723B -+ case RTL8723B: -+ init_hal_spec_8723b(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8703B -+ case RTL8703B: -+ init_hal_spec_8703b(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8723D -+ case RTL8723D: -+ init_hal_spec_8723d(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8188E -+ case RTL8188E: -+ init_hal_spec_8188e(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8188F -+ case RTL8188F: -+ init_hal_spec_8188f(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8188GTV -+ case RTL8188GTV: -+ init_hal_spec_8188gtv(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8812A -+ case RTL8812: -+ init_hal_spec_8812a(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8821A -+ case RTL8821: -+ init_hal_spec_8821a(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8192E -+ case RTL8192E: -+ init_hal_spec_8192e(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8814A -+ case RTL8814A: -+ init_hal_spec_8814a(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8822B -+ case RTL8822B: -+ rtl8822b_init_hal_spec(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8821C -+ case RTL8821C: -+ init_hal_spec_rtl8821c(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8710B -+ case RTL8710B: -+ init_hal_spec_8710b(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8192F -+ case RTL8192F: -+ init_hal_spec_8192f(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8822C -+ case RTL8822C: -+ rtl8822c_init_hal_spec(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8814B -+ case RTL8814B: -+ rtl8814b_init_hal_spec(adapter); -+ break; -+#endif -+#ifdef CONFIG_RTL8723F -+ case RTL8723F: -+ rtl8723f_init_hal_spec(adapter); -+ break; -+#endif -+ default: -+ RTW_ERR("%s: unknown chip_type:%u\n" -+ , __func__, rtw_get_chip_type(adapter)); -+ ret = _FAIL; -+ break; -+ } -+ -+ return ret; -+} -+ -+static const char *const _band_cap_str[] = { -+ /* BIT0 */"2G", -+ /* BIT1 */"5G", -+}; -+ -+static const char *const _bw_cap_str[] = { -+ /* BIT0 */"5M", -+ /* BIT1 */"10M", -+ /* BIT2 */"20M", -+ /* BIT3 */"40M", -+ /* BIT4 */"80M", -+ /* BIT5 */"160M", -+ /* BIT6 */"80_80M", -+}; -+ -+static const char *const _proto_cap_str[] = { -+ /* BIT0 */"b", -+ /* BIT1 */"g", -+ /* BIT2 */"n", -+ /* BIT3 */"ac", -+}; -+ -+static const char *const _wl_func_str[] = { -+ /* BIT0 */"P2P", -+ /* BIT1 */"MIRACAST", -+ /* BIT2 */"TDLS", -+ /* BIT3 */"FTM", -+}; -+ -+void dump_hal_spec(void *sel, _adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ int i; -+ -+ RTW_PRINT_SEL(sel, "macid_num:%u\n", hal_spec->macid_num); -+ RTW_PRINT_SEL(sel, "macid_cap:%u\n", hal_spec->macid_cap); -+ RTW_PRINT_SEL(sel, "sec_cap:0x%02x\n", hal_spec->sec_cap); -+ RTW_PRINT_SEL(sel, "sec_cam_ent_num:%u\n", hal_spec->sec_cam_ent_num); -+ -+ RTW_PRINT_SEL(sel, "rfpath_num_2g:%u\n", hal_spec->rfpath_num_2g); -+ RTW_PRINT_SEL(sel, "rfpath_num_5g:%u\n", hal_spec->rfpath_num_5g); -+ RTW_PRINT_SEL(sel, "rf_reg_path_num:%u\n", hal_spec->rf_reg_path_num); -+ RTW_PRINT_SEL(sel, "rf_reg_path_avail_num:%u\n", hal_spec->rf_reg_path_avail_num); -+ RTW_PRINT_SEL(sel, "rf_reg_trx_path_bmp:0x%02x\n", hal_spec->rf_reg_trx_path_bmp); -+ RTW_PRINT_SEL(sel, "max_tx_cnt:%u\n", hal_spec->max_tx_cnt); -+ -+ RTW_PRINT_SEL(sel, "tx_nss_num:%u\n", hal_spec->tx_nss_num); -+ RTW_PRINT_SEL(sel, "rx_nss_num:%u\n", hal_spec->rx_nss_num); -+ -+ RTW_PRINT_SEL(sel, "band_cap:"); -+ for (i = 0; i < BAND_CAP_BIT_NUM; i++) { -+ if (((hal_spec->band_cap) >> i) & BIT0 && _band_cap_str[i]) -+ _RTW_PRINT_SEL(sel, "%s ", _band_cap_str[i]); -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "bw_cap:"); -+ for (i = 0; i < BW_CAP_BIT_NUM; i++) { -+ if (((hal_spec->bw_cap) >> i) & BIT0 && _bw_cap_str[i]) -+ _RTW_PRINT_SEL(sel, "%s ", _bw_cap_str[i]); -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "proto_cap:"); -+ for (i = 0; i < PROTO_CAP_BIT_NUM; i++) { -+ if (((hal_spec->proto_cap) >> i) & BIT0 && _proto_cap_str[i]) -+ _RTW_PRINT_SEL(sel, "%s ", _proto_cap_str[i]); -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "txgi_max:%u\n", hal_spec->txgi_max); -+ RTW_PRINT_SEL(sel, "txgi_pdbm:%u\n", hal_spec->txgi_pdbm); -+ -+ RTW_PRINT_SEL(sel, "wl_func:"); -+ for (i = 0; i < WL_FUNC_BIT_NUM; i++) { -+ if (((hal_spec->wl_func) >> i) & BIT0 && _wl_func_str[i]) -+ _RTW_PRINT_SEL(sel, "%s ", _wl_func_str[i]); -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ -+#if CONFIG_TX_AC_LIFETIME -+ RTW_PRINT_SEL(sel, "tx_aclt_unit_factor:%u (unit:%uus)\n" -+ , hal_spec->tx_aclt_unit_factor, hal_spec->tx_aclt_unit_factor * 32); -+#endif -+ -+ RTW_PRINT_SEL(sel, "rx_tsf_filter:%u\n", hal_spec->rx_tsf_filter); -+ -+ RTW_PRINT_SEL(sel, "pg_txpwr_saddr:0x%X\n", hal_spec->pg_txpwr_saddr); -+ RTW_PRINT_SEL(sel, "pg_txgi_diff_factor:%u\n", hal_spec->pg_txgi_diff_factor); -+} -+ -+inline bool hal_chk_band_cap(_adapter *adapter, u8 cap) -+{ -+ return GET_HAL_SPEC(adapter)->band_cap & cap; -+} -+ -+inline bool hal_chk_bw_cap(_adapter *adapter, u8 cap) -+{ -+ return GET_HAL_SPEC(adapter)->bw_cap & cap; -+} -+ -+inline bool hal_chk_proto_cap(_adapter *adapter, u8 cap) -+{ -+ return GET_HAL_SPEC(adapter)->proto_cap & cap; -+} -+ -+inline bool hal_chk_wl_func(_adapter *adapter, u8 func) -+{ -+ return GET_HAL_SPEC(adapter)->wl_func & func; -+} -+ -+inline bool hal_is_band_support(_adapter *adapter, u8 band) -+{ -+ return GET_HAL_SPEC(adapter)->band_cap & band_to_band_cap(band); -+} -+ -+inline bool hal_is_bw_support(_adapter *adapter, u8 bw) -+{ -+ return GET_HAL_SPEC(adapter)->bw_cap & ch_width_to_bw_cap(bw); -+} -+ -+inline bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode) -+{ -+ u8 proto_cap = GET_HAL_SPEC(adapter)->proto_cap; -+ -+ if (mode == WIRELESS_11B) -+ if ((proto_cap & PROTO_CAP_11B) && hal_chk_band_cap(adapter, BAND_CAP_2G)) -+ return 1; -+ -+ if (mode == WIRELESS_11G) -+ if ((proto_cap & PROTO_CAP_11G) && hal_chk_band_cap(adapter, BAND_CAP_2G)) -+ return 1; -+ -+ if (mode == WIRELESS_11A) -+ if ((proto_cap & PROTO_CAP_11G) && hal_chk_band_cap(adapter, BAND_CAP_5G)) -+ return 1; -+ -+ if (mode == WIRELESS_11_24N) -+ if ((proto_cap & PROTO_CAP_11N) && hal_chk_band_cap(adapter, BAND_CAP_2G)) -+ return 1; -+ -+ if (mode == WIRELESS_11_5N) -+ if ((proto_cap & PROTO_CAP_11N) && hal_chk_band_cap(adapter, BAND_CAP_5G)) -+ return 1; -+ -+ if (mode == WIRELESS_11AC) -+ if ((proto_cap & PROTO_CAP_11AC) && hal_chk_band_cap(adapter, BAND_CAP_5G)) -+ return 1; -+ -+ return 0; -+} -+inline bool hal_is_mimo_support(_adapter *adapter) -+{ -+ if ((GET_HAL_TX_NSS(adapter) == 1) && -+ (GET_HAL_RX_NSS(adapter) == 1)) -+ return 0; -+ return 1; -+} -+ -+/* -+* hal_largest_bw - starting from in_bw, get largest bw supported by HAL -+* @adapter: -+* @in_bw: starting bw, value of enum channel_width -+* -+* Returns: value of enum channel_width -+*/ -+u8 hal_largest_bw(_adapter *adapter, u8 in_bw) -+{ -+ for (; in_bw > CHANNEL_WIDTH_20; in_bw--) { -+ if (hal_is_bw_support(adapter, in_bw)) -+ break; -+ } -+ -+ if (!hal_is_bw_support(adapter, in_bw)) -+ rtw_warn_on(1); -+ -+ return in_bw; -+} -+ -+#ifndef CONFIG_HAS_TX_BEACON_PAUSE -+void ResumeTxBeacon(_adapter *padapter) -+{ -+ RTW_DBG("ResumeTxBeacon\n"); -+ #ifdef CONFIG_STOP_RESUME_BCN_BY_TXPAUSE -+ rtw_write8(padapter, REG_TXPAUSE, -+ rtw_read8(padapter, REG_TXPAUSE) & (~BIT6)); -+ #else -+ rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, -+ rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2) | BIT(6)); -+ #endif -+ -+#ifdef RTW_HALMAC -+ /* Add this for driver using HALMAC because driver doesn't have setup time init by self */ -+ /* TBTT setup time */ -+ rtw_write8(padapter, REG_TBTT_PROHIBIT, TBTT_PROHIBIT_SETUP_TIME); -+#endif -+ -+ /* TBTT hold time: 0x540[19:8] */ -+ rtw_write8(padapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME & 0xFF); -+ rtw_write8(padapter, REG_TBTT_PROHIBIT + 2, -+ (rtw_read8(padapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME >> 8)); -+} -+ -+void StopTxBeacon(_adapter *padapter) -+{ -+ RTW_DBG("StopTxBeacon\n"); -+ #ifdef CONFIG_STOP_RESUME_BCN_BY_TXPAUSE -+ rtw_write8(padapter, REG_TXPAUSE, -+ rtw_read8(padapter, REG_TXPAUSE) | BIT6); -+ #else -+ rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, -+ rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2) & (~BIT6)); -+ #endif -+ -+ /* TBTT hold time: 0x540[19:8] */ -+ rtw_write8(padapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME_STOP_BCN & 0xFF); -+ rtw_write8(padapter, REG_TBTT_PROHIBIT + 2, -+ (rtw_read8(padapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME_STOP_BCN >> 8)); -+} -+#endif /* CONFIG_HAS_TX_BEACON_PAUSE */ -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM /*HW port0 - MBSS*/ -+ -+#ifdef CONFIG_CLIENT_PORT_CFG -+const u8 _clt_port_id[MAX_CLIENT_PORT_NUM] = { -+ CLT_PORT0, -+ CLT_PORT1, -+ CLT_PORT2, -+ CLT_PORT3 -+}; -+ -+void rtw_clt_port_init(struct clt_port_t *cltp) -+{ -+ cltp->bmp = 0; -+ cltp->num = 0; -+ _rtw_spinlock_init(&cltp->lock); -+} -+void rtw_clt_port_deinit(struct clt_port_t *cltp) -+{ -+ _rtw_spinlock_free(&cltp->lock); -+} -+static void _hw_client_port_alloc(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct clt_port_t *cltp = &dvobj->clt_port; -+ _irqL irql; -+ int i; -+ -+ #if 0 -+ if (cltp->num > MAX_CLIENT_PORT_NUM) { -+ RTW_ERR(ADPT_FMT" cann't alloc client (%d)\n", ADPT_ARG(adapter), cltp->num); -+ rtw_warn_on(1); -+ return; -+ } -+ #endif -+ -+ if (adapter->client_id != MAX_CLIENT_PORT_NUM) { -+ RTW_INFO(ADPT_FMT" client_id %d has allocated port:%d\n", -+ ADPT_ARG(adapter), adapter->client_id, adapter->client_port); -+ return; -+ } -+ _enter_critical_bh(&cltp->lock, &irql); -+ for (i = 0; i < MAX_CLIENT_PORT_NUM; i++) { -+ if (!(cltp->bmp & BIT(i))) -+ break; -+ } -+ -+ if (i < MAX_CLIENT_PORT_NUM) { -+ adapter->client_id = i; -+ cltp->bmp |= BIT(i); -+ adapter->client_port = _clt_port_id[i]; -+ } -+ cltp->num++; -+ _exit_critical_bh(&cltp->lock, &irql); -+ RTW_INFO("%s("ADPT_FMT")id:%d, port:%d clt_num:%d\n", -+ __func__, ADPT_ARG(adapter), adapter->client_id, adapter->client_port, cltp->num); -+} -+static void _hw_client_port_free(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct clt_port_t *cltp = &dvobj->clt_port; -+ _irqL irql; -+ -+ #if 0 -+ if (adapter->client_id >= MAX_CLIENT_PORT_NUM) { -+ RTW_ERR(ADPT_FMT" client_id %d is invalid\n", ADPT_ARG(adapter), adapter->client_id); -+ /*rtw_warn_on(1);*/ -+ } -+ #endif -+ -+ RTW_INFO("%s ("ADPT_FMT") id:%d, port:%d clt_num:%d\n", -+ __func__, ADPT_ARG(adapter), adapter->client_id, adapter->client_port, cltp->num); -+ -+ _enter_critical_bh(&cltp->lock, &irql); -+ if (adapter->client_id != MAX_CLIENT_PORT_NUM) { -+ cltp->bmp &= ~ BIT(adapter->client_id); -+ adapter->client_id = MAX_CLIENT_PORT_NUM; -+ adapter->client_port = CLT_PORT_INVALID; -+ } -+ cltp->num--; -+ if (cltp->num < 0) -+ cltp->num = 0; -+ _exit_critical_bh(&cltp->lock, &irql); -+} -+void rtw_hw_client_port_allocate(_adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ -+ if (hal_spec->port_num != 5) -+ return; -+ -+ _hw_client_port_alloc(adapter); -+} -+void rtw_hw_client_port_release(_adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ -+ if (hal_spec->port_num != 5) -+ return; -+ -+ _hw_client_port_free(adapter); -+} -+#endif /*CONFIG_CLIENT_PORT_CFG*/ -+ -+void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode) -+{ -+ RTW_INFO("%s()-"ADPT_FMT" mode = %d\n", __func__, ADPT_ARG(Adapter), mode); -+ -+ rtw_hal_rcr_set_chk_bssid(Adapter, MLME_ACTION_NONE); -+ -+ /* set net_type */ -+ Set_MSR(Adapter, mode); -+ -+ if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) { -+ if (!rtw_mi_get_ap_num(Adapter) && !rtw_mi_get_mesh_num(Adapter)) -+ StopTxBeacon(Adapter); -+ } else if (mode == _HW_STATE_ADHOC_) -+ ResumeTxBeacon(Adapter); -+ else if (mode == _HW_STATE_AP_) -+ /* enable rx ps-poll */ -+ rtw_write16(Adapter, REG_RXFLTMAP1, rtw_read16(Adapter, REG_RXFLTMAP1) | BIT_CTRLFLT10EN); -+ -+ /* enable rx data frame */ -+ rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); -+ -+#ifdef CONFIG_CLIENT_PORT_CFG -+ if (mode == _HW_STATE_STATION_) -+ rtw_hw_client_port_allocate(Adapter); -+ else -+ rtw_hw_client_port_release(Adapter); -+#endif -+#if defined(CONFIG_RTL8192F) -+ rtw_write16(Adapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(Adapter, -+ REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_0_FUNCTION); -+#endif -+} -+#endif -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+u8 rtw_hal_antdiv_before_linked(_adapter *padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 cur_ant, change_ant; -+ -+ if (!pHalData->AntDivCfg) -+ return _FALSE; -+ -+ if (pHalData->sw_antdiv_bl_state == 0) { -+ pHalData->sw_antdiv_bl_state = 1; -+ -+ rtw_hal_get_odm_var(padapter, HAL_ODM_ANTDIV_SELECT, &cur_ant, NULL); -+ change_ant = (cur_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT; -+ -+ return rtw_antenna_select_cmd(padapter, change_ant, _FALSE); -+ } -+ -+ pHalData->sw_antdiv_bl_state = 0; -+ return _FALSE; -+} -+ -+void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (pHalData->AntDivCfg) { -+ /*RTW_INFO("update_network=> org-RSSI(%d), new-RSSI(%d)\n", dst->Rssi, src->Rssi);*/ -+ /*select optimum_antenna for before linked =>For antenna diversity*/ -+ if (dst->Rssi >= src->Rssi) {/*keep org parameter*/ -+ src->Rssi = dst->Rssi; -+ src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; -+ } -+ } -+} -+#endif -+ -+#ifdef CONFIG_PROC_DEBUG -+#ifdef CONFIG_PHY_CAPABILITY_QUERY -+void rtw_dump_phy_cap_by_phydmapi(void *sel, _adapter *adapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); -+ struct phy_spec_t *phy_spec = &pHalData->phy_spec; -+ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] TRx Capability : 0x%08x\n", phy_spec->trx_cap); -+ RTW_PRINT_SEL(sel, "[PHY SPEC] Tx Stream Num Index : %d\n", (phy_spec->trx_cap >> 24) & 0xFF); /*Tx Stream Num Index [31:24]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] Rx Stream Num Index : %d\n", (phy_spec->trx_cap >> 16) & 0xFF); /*Rx Stream Num Index [23:16]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] Tx Path Num Index : %d\n", (phy_spec->trx_cap >> 8) & 0xFF);/*Tx Path Num Index [15:8]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] Rx Path Num Index : %d\n\n", (phy_spec->trx_cap & 0xFF));/*Rx Path Num Index [7:0]*/ -+ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] STBC Capability : 0x%08x\n", phy_spec->stbc_cap); -+ RTW_PRINT_SEL(sel, "[PHY SPEC] VHT STBC Tx : %s\n", ((phy_spec->stbc_cap >> 24) & 0xFF) ? "Supported" : "N/A"); /*VHT STBC Tx [31:24]*/ -+ /*VHT STBC Rx [23:16] -+ 0 = not support -+ 1 = support for 1 spatial stream -+ 2 = support for 1 or 2 spatial streams -+ 3 = support for 1 or 2 or 3 spatial streams -+ 4 = support for 1 or 2 or 3 or 4 spatial streams*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] VHT STBC Rx :%d\n", ((phy_spec->stbc_cap >> 16) & 0xFF)); -+ RTW_PRINT_SEL(sel, "[PHY SPEC] HT STBC Tx : %s\n", ((phy_spec->stbc_cap >> 8) & 0xFF) ? "Supported" : "N/A"); /*HT STBC Tx [15:8]*/ -+ /*HT STBC Rx [7:0] -+ 0 = not support -+ 1 = support for 1 spatial stream -+ 2 = support for 1 or 2 spatial streams -+ 3 = support for 1 or 2 or 3 spatial streams*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] HT STBC Rx : %d\n\n", (phy_spec->stbc_cap & 0xFF)); -+ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] LDPC Capability : 0x%08x\n", phy_spec->ldpc_cap); -+ RTW_PRINT_SEL(sel, "[PHY SPEC] VHT LDPC Tx : %s\n", ((phy_spec->ldpc_cap >> 24) & 0xFF) ? "Supported" : "N/A"); /*VHT LDPC Tx [31:24]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] VHT LDPC Rx : %s\n", ((phy_spec->ldpc_cap >> 16) & 0xFF) ? "Supported" : "N/A"); /*VHT LDPC Rx [23:16]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] HT LDPC Tx : %s\n", ((phy_spec->ldpc_cap >> 8) & 0xFF) ? "Supported" : "N/A"); /*HT LDPC Tx [15:8]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] HT LDPC Rx : %s\n\n", (phy_spec->ldpc_cap & 0xFF) ? "Supported" : "N/A"); /*HT LDPC Rx [7:0]*/ -+ #ifdef CONFIG_BEAMFORMING -+ RTW_PRINT_SEL(sel, "[PHY SPEC] TxBF Capability : 0x%08x\n", phy_spec->txbf_cap); -+ RTW_PRINT_SEL(sel, "[PHY SPEC] VHT MU Bfer : %s\n", ((phy_spec->txbf_cap >> 28) & 0xF) ? "Supported" : "N/A"); /*VHT MU Bfer [31:28]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] VHT MU Bfee : %s\n", ((phy_spec->txbf_cap >> 24) & 0xF) ? "Supported" : "N/A"); /*VHT MU Bfee [27:24]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] VHT SU Bfer : %s\n", ((phy_spec->txbf_cap >> 20) & 0xF) ? "Supported" : "N/A"); /*VHT SU Bfer [23:20]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] VHT SU Bfee : %s\n", ((phy_spec->txbf_cap >> 16) & 0xF) ? "Supported" : "N/A"); /*VHT SU Bfee [19:16]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] HT Bfer : %s\n", ((phy_spec->txbf_cap >> 4) & 0xF) ? "Supported" : "N/A"); /*HT Bfer [7:4]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] HT Bfee : %s\n\n", (phy_spec->txbf_cap & 0xF) ? "Supported" : "N/A"); /*HT Bfee [3:0]*/ -+ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] TxBF parameter : 0x%08x\n", phy_spec->txbf_param); -+ RTW_PRINT_SEL(sel, "[PHY SPEC] VHT Sounding Dim : %d\n", (phy_spec->txbf_param >> 24) & 0xFF); /*VHT Sounding Dim [31:24]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] VHT Steering Ant : %d\n", (phy_spec->txbf_param >> 16) & 0xFF); /*VHT Steering Ant [23:16]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] HT Sounding Dim : %d\n", (phy_spec->txbf_param >> 8) & 0xFF); /*HT Sounding Dim [15:8]*/ -+ RTW_PRINT_SEL(sel, "[PHY SPEC] HT Steering Ant : %d\n", phy_spec->txbf_param & 0xFF); /*HT Steering Ant [7:0]*/ -+ #endif -+} -+#else -+void rtw_dump_phy_cap_by_hal(void *sel, _adapter *adapter) -+{ -+ u8 phy_cap = _FALSE; -+ -+ /* STBC */ -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_STBC, (u8 *)&phy_cap); -+ RTW_PRINT_SEL(sel, "[HAL] STBC Tx : %s\n", (_TRUE == phy_cap) ? "Supported" : "N/A"); -+ -+ phy_cap = _FALSE; -+ rtw_hal_get_def_var(adapter, HAL_DEF_RX_STBC, (u8 *)&phy_cap); -+ RTW_PRINT_SEL(sel, "[HAL] STBC Rx : %s\n\n", (_TRUE == phy_cap) ? "Supported" : "N/A"); -+ -+ /* LDPC support */ -+ phy_cap = _FALSE; -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_LDPC, (u8 *)&phy_cap); -+ RTW_PRINT_SEL(sel, "[HAL] LDPC Tx : %s\n", (_TRUE == phy_cap) ? "Supported" : "N/A"); -+ -+ phy_cap = _FALSE; -+ rtw_hal_get_def_var(adapter, HAL_DEF_RX_LDPC, (u8 *)&phy_cap); -+ RTW_PRINT_SEL(sel, "[HAL] LDPC Rx : %s\n\n", (_TRUE == phy_cap) ? "Supported" : "N/A"); -+ -+ #ifdef CONFIG_BEAMFORMING -+ phy_cap = _FALSE; -+ rtw_hal_get_def_var(adapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&phy_cap); -+ RTW_PRINT_SEL(sel, "[HAL] Beamformer: %s\n", (_TRUE == phy_cap) ? "Supported" : "N/A"); -+ -+ phy_cap = _FALSE; -+ rtw_hal_get_def_var(adapter, HAL_DEF_EXPLICIT_BEAMFORMEE, (u8 *)&phy_cap); -+ RTW_PRINT_SEL(sel, "[HAL] Beamformee: %s\n", (_TRUE == phy_cap) ? "Supported" : "N/A"); -+ -+ phy_cap = _FALSE; -+ rtw_hal_get_def_var(adapter, HAL_DEF_VHT_MU_BEAMFORMER, &phy_cap); -+ RTW_PRINT_SEL(sel, "[HAL] VHT MU Beamformer: %s\n", (_TRUE == phy_cap) ? "Supported" : "N/A"); -+ -+ phy_cap = _FALSE; -+ rtw_hal_get_def_var(adapter, HAL_DEF_VHT_MU_BEAMFORMEE, &phy_cap); -+ RTW_PRINT_SEL(sel, "[HAL] VHT MU Beamformee: %s\n", (_TRUE == phy_cap) ? "Supported" : "N/A"); -+ #endif -+} -+#endif -+void rtw_dump_phy_cap(void *sel, _adapter *adapter) -+{ -+ RTW_PRINT_SEL(sel, "\n ======== PHY Capability ========\n"); -+#ifdef CONFIG_PHY_CAPABILITY_QUERY -+ rtw_dump_phy_cap_by_phydmapi(sel, adapter); -+#else -+ rtw_dump_phy_cap_by_hal(sel, adapter); -+#endif -+} -+#endif -+ -+inline s16 translate_dbm_to_percentage(s16 signal) -+{ -+ if ((signal <= -100) || (signal >= 20)) -+ return 0; -+ else if (signal >= 0) -+ return 100; -+ else -+ return 100 + signal; -+} -+ -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+#ifdef CONFIG_BCN_RECOVERY -+#define REG_CPU_MGQ_INFO 0x041C -+#define BIT_BCN_POLL BIT(28) -+u8 rtw_ap_bcn_recovery(_adapter *padapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ -+ if (hal_data->issue_bcn_fail >= 2) { -+ RTW_ERR("%s ISSUE BCN Fail\n", __func__); -+ rtw_write8(padapter, REG_CPU_MGQ_INFO + 3, 0x10); -+ hal_data->issue_bcn_fail = 0; -+ } -+ return _SUCCESS; -+} -+#endif /*CONFIG_BCN_RECOVERY*/ -+ -+#ifdef CONFIG_BCN_XMIT_PROTECT -+u8 rtw_ap_bcn_queue_empty_check(_adapter *padapter, u32 txbcn_timer_ms) -+{ -+ u32 start_time = rtw_get_current_time(); -+ u8 bcn_queue_empty = _FALSE; -+ -+ do { -+ if (rtw_read16(padapter, REG_TXPKT_EMPTY) & BIT(11)) { -+ bcn_queue_empty = _TRUE; -+ break; -+ } -+ } while (rtw_get_passing_time_ms(start_time) <= (txbcn_timer_ms + 10)); -+ -+ if (bcn_queue_empty == _FALSE) -+ RTW_ERR("%s BCN queue not empty\n", __func__); -+ -+ return bcn_queue_empty; -+} -+#endif /*CONFIG_BCN_XMIT_PROTECT*/ -+#endif /*CONFIG_SWTIMER_BASED_TXBCN*/ -+ -+/** -+ * rtw_hal_get_trx_path() - Get RF path related information -+ * @d: struct dvobj_priv* -+ * @type: RF type, nTnR -+ * @tx: Tx path -+ * @rx: Rx path -+ * -+ * Get RF type, TX path and RX path information. -+ */ -+void rtw_hal_get_trx_path(struct dvobj_priv *d, enum rf_type *type, -+ enum bb_path *tx, enum bb_path *rx) -+{ -+ struct _ADAPTER *a = dvobj_get_primary_adapter(d); -+ enum rf_type t = GET_HAL_RFPATH(a); -+ -+ if (type) -+ *type = t; -+ -+ if (tx || rx) { -+ u8 tx_bmp = GET_HAL_TX_PATH_BMP(a); -+ u8 rx_bmp = GET_HAL_RX_PATH_BMP(a); -+ -+ if (!tx_bmp && !rx_bmp) -+ rf_type_to_default_trx_bmp(t, tx, rx); -+ else { -+ if (tx) -+ *tx = GET_HAL_TX_PATH_BMP(a); -+ if (rx) -+ *rx = GET_HAL_RX_PATH_BMP(a); -+ } -+ } -+} -+ -+#ifdef RTW_CHANNEL_SWITCH_OFFLOAD -+void rtw_hal_switch_chnl_and_set_bw_offload(_adapter *adapter, u8 central_ch, u8 pri_ch_idx, u8 bw) -+{ -+ u8 h2c[H2C_SINGLE_CHANNELSWITCH_V2_LEN] = {0}; -+ PHAL_DATA_TYPE hal; -+ struct submit_ctx *chsw_sctx; -+ -+ hal = GET_HAL_DATA(adapter); -+ chsw_sctx = &hal->chsw_sctx; -+ -+ SET_H2CCMD_SINGLE_CH_SWITCH_V2_CENTRAL_CH_NUM(h2c, central_ch); -+ SET_H2CCMD_SINGLE_CH_SWITCH_V2_PRIMARY_CH_IDX(h2c, pri_ch_idx); -+ SET_H2CCMD_SINGLE_CH_SWITCH_V2_BW(h2c, bw); -+ SET_H2CCMD_SINGLE_CH_SWITCH_V2_IQK_UPDATE_EN(h2c, 1); -+ -+ rtw_sctx_init(chsw_sctx, 10); -+ rtw_hal_fill_h2c_cmd(adapter, H2C_SINGLE_CHANNELSWITCH_V2, H2C_SINGLE_CHANNELSWITCH_V2_LEN, h2c); -+ rtw_sctx_wait(chsw_sctx, __func__); -+} -+#endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ -+ -+u8 phy_get_capable_tx_num(_adapter *adapter, enum MGN_RATE rate) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 tx_num = 0; -+ -+ if (IS_1T_RATE(rate)) -+ tx_num = hal_data->txpath_cap_num_nss[0]; -+ else if (IS_2T_RATE(rate)) -+ tx_num = hal_data->txpath_cap_num_nss[1]; -+ else if (IS_3T_RATE(rate)) -+ tx_num = hal_data->txpath_cap_num_nss[2]; -+ else if (IS_4T_RATE(rate)) -+ tx_num = hal_data->txpath_cap_num_nss[3]; -+ else -+ rtw_warn_on(1); -+ -+ return tx_num == 0 ? RF_1TX : tx_num - 1; -+} -+ -+u8 phy_get_current_tx_num(_adapter *adapter, enum MGN_RATE rate) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 tx_num = 0; -+ -+ if (IS_1T_RATE(rate)) -+ tx_num = hal_data->txpath_num_nss[0]; -+ else if (IS_2T_RATE(rate)) -+ tx_num = hal_data->txpath_num_nss[1]; -+ else if (IS_3T_RATE(rate)) -+ tx_num = hal_data->txpath_num_nss[2]; -+ else if (IS_4T_RATE(rate)) -+ tx_num = hal_data->txpath_num_nss[3]; -+ else -+ rtw_warn_on(1); -+ -+ return tx_num == 0 ? RF_1TX : tx_num - 1; -+} -+ -+#ifdef CONFIG_RTL8812A -+u8 * rtw_hal_set_8812a_vendor_ie(_adapter *padapter , u8 *pframe ,uint *frlen ) { -+ int vender_len = 7; -+ unsigned char vendor_info[vender_len]; -+ unsigned char REALTEK_OUI[] = {0x00, 0xe0, 0x4c}; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if( !IS_HARDWARE_TYPE_8812(padapter) ) -+ return pframe; -+ -+ _rtw_memset(vendor_info,0,vender_len); -+ _rtw_memcpy(vendor_info, REALTEK_OUI, 3); -+ vendor_info[4] =2; -+ if(pHalData->version_id.CUTVersion > B_CUT_VERSION ) -+ vendor_info[6] = RT_HT_CAP_USE_JAGUAR_CCUT; -+ else -+ vendor_info[6] = RT_HT_CAP_USE_JAGUAR_BCUT; -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_,vender_len,vendor_info , frlen); -+ -+ return pframe; -+} -+#endif /*CONFIG_RTL8812A*/ -+ -+static inline void rtw_enter_protsel(struct protsel *protsel, u32 sel) -+{ -+ int refcnt; -+ -+ _enter_critical_mutex(&protsel->mutex, NULL); -+ -+ refcnt = ATOMIC_INC_RETURN(&protsel->refcnt); -+ -+ WARN_ON(refcnt > 1 && protsel->sel != sel); -+ -+ protsel->sel = sel; -+ -+ _exit_critical_mutex(&protsel->mutex, NULL); -+} -+ -+static inline void rtw_leave_protsel(struct protsel *protsel) -+{ -+ int refcnt; -+ -+ _enter_critical_mutex(&protsel->mutex, NULL); -+ -+ refcnt = ATOMIC_DEC_RETURN(&protsel->refcnt); -+ -+ _exit_critical_mutex(&protsel->mutex, NULL); -+ -+ WARN_ON(refcnt < 0); -+} -+ -+static inline bool rtw_assert_protsel(struct protsel *protsel) -+{ -+ int refcnt = ATOMIC_READ(&protsel->refcnt); -+ -+ if (refcnt > 0) -+ return true; -+ -+ return false; -+} -+ -+#ifdef CONFIG_PROTSEL_PORT -+void rtw_enter_protsel_port(_adapter *padapter, u8 port_sel) -+{ -+ u8 val8; -+ -+ rtw_enter_protsel(&padapter->dvobj->protsel_port, port_sel); -+ -+ val8 = rtw_read8(padapter, REG_PORT_CTRL_SEL); -+ val8 &= ~BIT_MASK_PORT_CTRL_SEL; -+ val8 |= BIT_PORT_CTRL_SEL(port_sel); -+ rtw_write8(padapter, REG_PORT_CTRL_SEL, val8); -+} -+ -+bool rtw_assert_protsel_port(_adapter *padapter, u32 addr, u8 len) -+{ -+ if (!padapter->bup) /* don't assert before IF up */ -+ return true; -+ -+ return rtw_assert_protsel(&padapter->dvobj->protsel_port); -+} -+ -+void rtw_leave_protsel_port(_adapter *padapter) -+{ -+ rtw_leave_protsel(&padapter->dvobj->protsel_port); -+} -+#endif -+ -+#ifdef CONFIG_PROTSEL_ATIMDTIM -+void rtw_enter_protsel_atimdtim(_adapter *padapter, u8 port_sel) -+{ -+ /* 0~15 is for port 0 MBSSID setting -+ * 16 is for port 1 setting -+ * 17 is for port 2 setting -+ * 18 is for port 3 setting -+ * 19 is for port 4 setting -+ */ -+ u8 val8; -+ -+ if (port_sel >= 1 && port_sel <= 4) -+ port_sel += 15; -+ -+ rtw_enter_protsel(&padapter->dvobj->protsel_atimdtim, port_sel); -+ -+ val8 = rtw_read8(padapter, REG_ATIM_DTIM_CTRL_SEL); -+ val8 &= ~BIT_MASK_ATIM_DTIM_SEL; -+ val8 |= BIT_ATIM_DTIM_SEL(port_sel); -+ rtw_write8(padapter, REG_ATIM_DTIM_CTRL_SEL, val8); -+} -+ -+bool rtw_assert_protsel_atimdtim(_adapter *padapter, u32 addr, u8 len) -+{ -+ return rtw_assert_protsel(&padapter->dvobj->protsel_atimdtim); -+} -+ -+void rtw_leave_protsel_atimdtim(_adapter *padapter) -+{ -+ rtw_leave_protsel(&padapter->dvobj->protsel_atimdtim); -+} -+#endif -+ -+#ifdef CONFIG_PROTSEL_MACSLEEP -+void rtw_enter_protsel_macsleep(_adapter *padapter, u8 sel) -+{ -+ u32 val32; -+ -+ rtw_enter_protsel(&padapter->dvobj->protsel_macsleep, sel); -+ -+ val32 = rtw_read32(padapter, REG_MACID_SLEEP_CTRL); -+ val32 &= ~BIT_MASK_MACID_SLEEP_SEL; -+ val32 |= BIT_MACID_SLEEP_SEL(sel); -+ rtw_write32(padapter, REG_MACID_SLEEP_CTRL, val32); -+} -+ -+bool rtw_assert_protsel_macsleep(_adapter *padapter, u32 addr, u8 len) -+{ -+ return rtw_assert_protsel(&padapter->dvobj->protsel_macsleep); -+} -+ -+void rtw_leave_protsel_macsleep(_adapter *padapter) -+{ -+ rtw_leave_protsel(&padapter->dvobj->protsel_macsleep); -+} -+#endif -+ -+void rtw_hal_bcn_early_rpt_c2h_handler(_adapter *padapter) -+{ -+ -+ if(0) -+ RTW_INFO("Recv Bcn Early report!!\n"); -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_CH_SW -+ if (ATOMIC_READ(&padapter->tdlsinfo.chsw_info.chsw_on) == _TRUE) -+ rtw_tdls_ch_sw_back_to_base_chnl(padapter); -+#endif -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/hal/hal_com_c2h.h b/drivers/staging/rtl8723cs/hal/hal_com_c2h.h -new file mode 100644 -index 000000000000..b9aa9ffc7565 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_com_c2h.h -@@ -0,0 +1,142 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __COMMON_C2H_H__ -+#define __COMMON_C2H_H__ -+ -+#define C2H_TYPE_REG 0 -+#define C2H_TYPE_PKT 1 -+ -+/* -+* C2H event format: -+* Fields TRIGGER PAYLOAD SEQ PLEN ID -+* BITS [127:120] [119:16] [15:8] [7:4] [3:0] -+*/ -+#define C2H_ID(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 0, 4) -+#define C2H_PLEN(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 4, 4) -+#define C2H_SEQ(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 1, 0, 8) -+#define C2H_PAYLOAD(_c2h) (((u8*)(_c2h)) + 2) -+ -+#define SET_C2H_ID(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 0, 4, _val) -+#define SET_C2H_PLEN(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 4, 4, _val) -+#define SET_C2H_SEQ(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 1 , 0, 8, _val) -+ -+/* -+* C2H event format: -+* Fields TRIGGER PLEN PAYLOAD SEQ ID -+* BITS [127:120] [119:112] [111:16] [15:8] [7:0] -+*/ -+#define C2H_ID_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 0, 8) -+#define C2H_SEQ_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 1, 0, 8) -+#define C2H_PAYLOAD_88XX(_c2h) (((u8*)(_c2h)) + 2) -+#define C2H_PLEN_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 14, 0, 8) -+#define C2H_TRIGGER_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 15, 0, 8) -+ -+#define SET_C2H_ID_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 0, 8, _val) -+#define SET_C2H_SEQ_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 1, 0, 8, _val) -+#define SET_C2H_PLEN_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 14, 0, 8, _val) -+ -+typedef enum _C2H_EVT { -+ C2H_DBG = 0x00, -+ C2H_LB = 0x01, -+ C2H_TXBF = 0x02, -+ C2H_CCX_TX_RPT = 0x03, -+ C2H_AP_REQ_TXRPT = 0x04, -+ C2H_FW_SCAN_COMPLETE = 0x7, -+ C2H_BT_INFO = 0x09, -+ C2H_BT_MP_INFO = 0x0B, -+ C2H_RA_RPT = 0x0C, -+ C2H_SPC_STAT = 0x0D, -+ C2H_RA_PARA_RPT = 0x0E, -+ C2H_FW_CHNL_SWITCH_COMPLETE = 0x10, -+ C2H_IQK_FINISH = 0x11, -+ C2H_MAILBOX_STATUS = 0x15, -+ C2H_P2P_RPORT = 0x16, -+ C2H_MCC = 0x17, -+ C2H_MAC_HIDDEN_RPT = 0x19, -+ C2H_MAC_HIDDEN_RPT_2 = 0x1A, -+ C2H_BCN_EARLY_RPT = 0x1E, -+ C2H_DEFEATURE_DBG = 0x22, -+ C2H_CUSTOMER_STR_RPT = 0x24, -+ C2H_CUSTOMER_STR_RPT_2 = 0x25, -+ C2H_WLAN_INFO = 0x27, -+#ifdef RTW_PER_CMD_SUPPORT_FW -+ C2H_PER_RATE_RPT = 0x2c, -+#endif -+ C2H_LPS_STATUS_RPT = 0x32, -+ C2H_SET_TXPWR_FINISH = 0x70, -+ C2H_DEFEATURE_RSVD = 0xFD, -+ C2H_EXTEND = 0xff, -+} C2H_EVT; -+ -+typedef enum _EXTEND_C2H_EVT { -+ EXTEND_C2H_DBG_PRINT = 0 -+} EXTEND_C2H_EVT; -+ -+#define C2H_REG_LEN 16 -+ -+/* C2H_IQK_FINISH, 0x11 */ -+#define IQK_OFFLOAD_LEN 1 -+void c2h_iqk_offload(_adapter *adapter, u8 *data, u8 len); -+int c2h_iqk_offload_wait(_adapter *adapter, u32 timeout_ms); -+#define rtl8812_iqk_wait c2h_iqk_offload_wait /* TODO: remove this after phydm call c2h_iqk_offload_wait instead */ -+ -+#ifdef CONFIG_RTW_MAC_HIDDEN_RPT -+/* C2H_MAC_HIDDEN_RPT, 0x19 */ -+#define MAC_HIDDEN_RPT_LEN 8 -+int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len); -+ -+/* C2H_MAC_HIDDEN_RPT_2, 0x1A */ -+#define MAC_HIDDEN_RPT_2_LEN 5 -+int c2h_mac_hidden_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len); -+int hal_read_mac_hidden_rpt(_adapter *adapter); -+#else -+#define hal_read_mac_hidden_rpt(adapter) _SUCCESS -+#endif /* CONFIG_RTW_MAC_HIDDEN_RPT */ -+ -+/* C2H_DEFEATURE_DBG, 0x22 */ -+#define DEFEATURE_DBG_LEN 1 -+int c2h_defeature_dbg_hdl(_adapter *adapter, u8 *data, u8 len); -+ -+#ifdef CONFIG_RTW_CUSTOMER_STR -+/* C2H_CUSTOMER_STR_RPT, 0x24 */ -+#define CUSTOMER_STR_RPT_LEN 8 -+int c2h_customer_str_rpt_hdl(_adapter *adapter, u8 *data, u8 len); -+ -+/* C2H_CUSTOMER_STR_RPT_2, 0x25 */ -+#define CUSTOMER_STR_RPT_2_LEN 8 -+int c2h_customer_str_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len); -+#endif /* CONFIG_RTW_CUSTOMER_STR */ -+ -+#ifdef RTW_PER_CMD_SUPPORT_FW -+/* C2H_PER_RATE_RPT, 0x2c */ -+int c2h_per_rate_rpt_hdl(_adapter *adapter, u8 *data, u8 len); -+#endif -+ -+#ifdef CONFIG_LPS_ACK -+/* C2H_LPS_STATUS_RPT, 0x32 */ -+#define LPS_STATUS_RPT_LEN 2 -+int c2h_lps_status_rpt(PADAPTER adapter, u8 *data, u8 len); -+#endif /* CONFIG_LPS_ACK */ -+ -+#ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX -+/* C2H_SET_TXPWR_FINISH, 0x70 */ -+#define SET_TXPWR_FINISH_LEN 1 -+void c2h_txpwr_idx_offload_done(_adapter *adapter, u8 *data, u8 len); -+int c2h_txpwr_idx_offload_wait(_adapter *adapter); -+#endif -+ -+void rtw_hal_bcn_early_rpt_c2h_handler(_adapter *adapter); -+ -+#endif /* __COMMON_C2H_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723cs/hal/hal_com_phycfg.c -new file mode 100644 -index 000000000000..0e0da62a887b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_com_phycfg.c -@@ -0,0 +1,6275 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _HAL_COM_PHYCFG_C_ -+ -+#include -+#include -+ -+#define PG_TXPWR_1PATH_BYTE_NUM_2G 18 -+#define PG_TXPWR_BASE_BYTE_NUM_2G 11 -+ -+#define PG_TXPWR_1PATH_BYTE_NUM_5G 24 -+#define PG_TXPWR_BASE_BYTE_NUM_5G 14 -+ -+#define PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) (((_pg_v) & 0xf0) >> 4) -+#define PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) ((_pg_v) & 0x0f) -+#define PG_TXPWR_MSB_DIFF_TO_S8BIT(_pg_v) ((PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) & BIT3) ? (PG_TXPWR_MSB_DIFF_S4BIT(_pg_v) | 0xF0) : PG_TXPWR_MSB_DIFF_S4BIT(_pg_v)) -+#define PG_TXPWR_LSB_DIFF_TO_S8BIT(_pg_v) ((PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) & BIT3) ? (PG_TXPWR_LSB_DIFF_S4BIT(_pg_v) | 0xF0) : PG_TXPWR_LSB_DIFF_S4BIT(_pg_v)) -+#define IS_PG_TXPWR_BASE_INVALID(hal_spec, _base) ((_base) > hal_spec->txgi_max) -+#define IS_PG_TXPWR_DIFF_INVALID(_diff) ((_diff) > 7 || (_diff) < -8) -+#define PG_TXPWR_INVALID_BASE 255 -+#define PG_TXPWR_INVALID_DIFF 8 -+ -+#if !IS_PG_TXPWR_DIFF_INVALID(PG_TXPWR_INVALID_DIFF) -+#error "PG_TXPWR_DIFF definition has problem" -+#endif -+ -+#define PG_TXPWR_SRC_PG_DATA 0 -+#define PG_TXPWR_SRC_IC_DEF 1 -+#define PG_TXPWR_SRC_DEF 2 -+#define PG_TXPWR_SRC_NUM 3 -+ -+const char *const _pg_txpwr_src_str[] = { -+ "PG_DATA", -+ "IC_DEF", -+ "DEF", -+ "UNKNOWN" -+}; -+ -+#define pg_txpwr_src_str(src) (((src) >= PG_TXPWR_SRC_NUM) ? _pg_txpwr_src_str[PG_TXPWR_SRC_NUM] : _pg_txpwr_src_str[(src)]) -+ -+const char *const _txpwr_pg_mode_str[] = { -+ "PWR_IDX", -+ "TSSI_OFFSET", -+ "UNKNOWN", -+}; -+ -+static const u8 rate_sec_base[RATE_SECTION_NUM] = { -+ MGN_11M, -+ MGN_54M, -+ MGN_MCS7, -+ MGN_MCS15, -+ MGN_MCS23, -+ MGN_MCS31, -+ MGN_VHT1SS_MCS7, -+ MGN_VHT2SS_MCS7, -+ MGN_VHT3SS_MCS7, -+ MGN_VHT4SS_MCS7, -+}; -+ -+#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX -+typedef struct _TxPowerInfo24G { -+ u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; -+ u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; -+ /* If only one tx, only BW20 and OFDM are used. */ -+ s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+} TxPowerInfo24G; -+ -+typedef struct _TxPowerInfo5G { -+ u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G]; -+ /* If only one tx, only BW20, OFDM, BW80 and BW160 are used. */ -+ s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+} TxPowerInfo5G; -+ -+#ifndef DBG_PG_TXPWR_READ -+#define DBG_PG_TXPWR_READ 0 -+#endif -+ -+#if DBG_PG_TXPWR_READ -+static void dump_pg_txpwr_info_2g(void *sel, TxPowerInfo24G *txpwr_info, u8 rfpath_num, u8 max_tx_cnt) -+{ -+ int path, group, tx_idx; -+ -+ RTW_PRINT_SEL(sel, "2.4G\n"); -+ RTW_PRINT_SEL(sel, "CCK-1T base:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (group = 0; group < MAX_CHNL_GROUP_24G; group++) -+ _RTW_PRINT_SEL(sel, "G%02d ", group); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (group = 0; group < MAX_CHNL_GROUP_24G; group++) -+ _RTW_PRINT_SEL(sel, "%3u ", txpwr_info->IndexCCK_Base[path][group]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "CCK diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) -+ _RTW_PRINT_SEL(sel, "%dT ", path + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", txpwr_info->CCK_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW40-1S base:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++) -+ _RTW_PRINT_SEL(sel, "G%02d ", group); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++) -+ _RTW_PRINT_SEL(sel, "%3u ", txpwr_info->IndexBW40_Base[path][group]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "OFDM diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) -+ _RTW_PRINT_SEL(sel, "%dT ", path + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", txpwr_info->OFDM_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW20 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) -+ _RTW_PRINT_SEL(sel, "%dS ", path + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW20_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW40 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) -+ _RTW_PRINT_SEL(sel, "%dS ", path + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW40_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+} -+ -+static void dump_pg_txpwr_info_5g(void *sel, TxPowerInfo5G *txpwr_info, u8 rfpath_num, u8 max_tx_cnt) -+{ -+ int path, group, tx_idx; -+ -+ RTW_PRINT_SEL(sel, "5G\n"); -+ RTW_PRINT_SEL(sel, "BW40-1S base:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (group = 0; group < MAX_CHNL_GROUP_5G; group++) -+ _RTW_PRINT_SEL(sel, "G%02d ", group); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (group = 0; group < MAX_CHNL_GROUP_5G; group++) -+ _RTW_PRINT_SEL(sel, "%3u ", txpwr_info->IndexBW40_Base[path][group]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "OFDM diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) -+ _RTW_PRINT_SEL(sel, "%dT ", path + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", txpwr_info->OFDM_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW20 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) -+ _RTW_PRINT_SEL(sel, "%dS ", path + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW20_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW40 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) -+ _RTW_PRINT_SEL(sel, "%dS ", path + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW40_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW80 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) -+ _RTW_PRINT_SEL(sel, "%dS ", path + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW80_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW160 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) -+ _RTW_PRINT_SEL(sel, "%dS ", path + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", txpwr_info->BW160_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+} -+#endif /* DBG_PG_TXPWR_READ */ -+ -+const struct map_t pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 168, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE, 0xEE, 0xEE, -+ 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x04, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x04, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, -+ 0xEE, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, -+ 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x2A, 0x2A, 0x2A, 0x2A, 0x04, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, -+ 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x04, 0xEE, -+ 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE) -+ ); -+ -+#ifdef CONFIG_RTL8188E -+static const struct map_t rtl8188e_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 12, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8188F -+static const struct map_t rtl8188f_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 12, -+ 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x27, 0x27, 0x27, 0x27, 0x27, 0x24) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8188GTV -+static const struct map_t rtl8188gtv_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 12, -+ 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x27, 0x27, 0x27, 0x27, 0x27, 0x24) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8723B -+static const struct map_t rtl8723b_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 2, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 12, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0xE0) -+ , MAPSEG_ARRAY_ENT(0x3A, 12, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0xE0) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8703B -+static const struct map_t rtl8703b_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 12, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8723D -+static const struct map_t rtl8723d_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 2, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 12, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02) -+ , MAPSEG_ARRAY_ENT(0x3A, 12, -+ 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x02) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8192E -+static const struct map_t rtl8192e_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 2, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 14, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE) -+ , MAPSEG_ARRAY_ENT(0x3A, 14, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8821A -+static const struct map_t rtl8821a_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 39, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8821C -+static const struct map_t rtl8821c_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 54, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, -+ 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xFF, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8710B -+static const struct map_t rtl8710b_pg_txpwr_def_info = -+ MAP_ENT(0xC8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x20, 12, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x20) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8812A -+static const struct map_t rtl8812a_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 82, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, 0x00, 0xEE, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, -+ 0x00, 0xEE) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8822B -+static const struct map_t rtl8822b_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 82, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, 0xEC, 0xEC, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, -+ 0xEC, 0xEC) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8822C -+static const struct map_t rtl8822c_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 82, -+ 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0x00, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, -+ 0x02, 0x00, 0xFF, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, -+ 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, -+ 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0xFF, 0xFF, 0x00, 0xFF, -+ 0x00, 0x00) -+ ); -+#endif -+ -+/* todo : 8723f don't know default power */ -+#ifdef CONFIG_RTL8723F -+static const struct map_t rtl8723f_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 82, -+ 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0x00, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, -+ 0x02, 0x00, 0xFF, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, -+ 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x33, 0x33, 0x33, 0x33, -+ 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x02, 0x00, 0xFF, 0xFF, 0x00, 0xFF, -+ 0x00, 0x00) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8814A -+static const struct map_t rtl8814a_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 168, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, -+ 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, -+ 0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, -+ 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, -+ 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, -+ 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, -+ 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8192F/*use 8192F default,no document*/ -+static const struct map_t rtl8192f_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 2, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 14, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE) -+ , MAPSEG_ARRAY_ENT(0x3A, 14, -+ 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE) -+ ); -+#endif -+ -+#ifdef CONFIG_RTL8814B -+static const struct map_t rtl8814b_pg_txpwr_def_info = -+ MAP_ENT(0xB8, 1, 0xFF -+ , MAPSEG_ARRAY_ENT(0x10, 168, -+ 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, -+ 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xFF, 0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, -+ 0x28, 0x28, 0x28, 0x28, 0x28, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF) -+ ); -+#endif -+ -+const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter) -+{ -+ u8 interface_type = 0; -+ const struct map_t *map = NULL; -+ -+ interface_type = rtw_get_intf_type(adapter); -+ -+ switch (rtw_get_chip_type(adapter)) { -+#ifdef CONFIG_RTL8723B -+ case RTL8723B: -+ map = &rtl8723b_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8703B -+ case RTL8703B: -+ map = &rtl8703b_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8723D -+ case RTL8723D: -+ map = &rtl8723d_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8188E -+ case RTL8188E: -+ map = &rtl8188e_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8188F -+ case RTL8188F: -+ map = &rtl8188f_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8188GTV -+ case RTL8188GTV: -+ map = &rtl8188gtv_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8812A -+ case RTL8812: -+ map = &rtl8812a_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8821A -+ case RTL8821: -+ map = &rtl8821a_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8192E -+ case RTL8192E: -+ map = &rtl8192e_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8814A -+ case RTL8814A: -+ map = &rtl8814a_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8822B -+ case RTL8822B: -+ map = &rtl8822b_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8821C -+ case RTL8821C: -+ map = &rtl8821c_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8710B -+ case RTL8710B: -+ map = &rtl8710b_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8192F -+ case RTL8192F: -+ map = &rtl8192f_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8822C -+ case RTL8822C: -+ map = &rtl8822c_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8814B -+ case RTL8814B: -+ map = &rtl8814b_pg_txpwr_def_info; -+ break; -+#endif -+#ifdef CONFIG_RTL8723F -+ case RTL8723F: -+ map = &rtl8723f_pg_txpwr_def_info; -+ break; -+#endif -+ } -+ -+ if (map == NULL) { -+ RTW_ERR("%s: unknown chip_type:%u\n" -+ , __func__, rtw_get_chip_type(adapter)); -+ rtw_warn_on(1); -+ } -+ -+ return map; -+} -+ -+static u8 hal_chk_pg_txpwr_info_2g(_adapter *adapter, TxPowerInfo24G *pwr_info) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 path, group, tx_idx; -+ -+ if (pwr_info == NULL || !hal_chk_band_cap(adapter, BAND_CAP_2G)) -+ return _SUCCESS; -+ -+ for (path = 0; path < MAX_RF_PATH; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) -+ continue; -+ for (group = 0; group < MAX_CHNL_GROUP_24G; group++) { -+ if (IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexCCK_Base[path][group]) -+ || IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group])) -+ return _FAIL; -+ } -+ for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { -+ if (tx_idx + 1 > hal_data->max_tx_cnt) -+ continue; -+ if (IS_PG_TXPWR_DIFF_INVALID(pwr_info->CCK_Diff[path][tx_idx]) -+ || IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][tx_idx]) -+ || IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx]) -+ || IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW40_Diff[path][tx_idx])) -+ return _FAIL; -+ } -+ } -+ -+ return _SUCCESS; -+} -+ -+static u8 hal_chk_pg_txpwr_info_5g(_adapter *adapter, TxPowerInfo5G *pwr_info) -+{ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 path, group, tx_idx; -+ -+ if (pwr_info == NULL || !hal_chk_band_cap(adapter, BAND_CAP_5G)) -+ return _SUCCESS; -+ -+ for (path = 0; path < MAX_RF_PATH; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) -+ continue; -+ for (group = 0; group < MAX_CHNL_GROUP_5G; group++) -+ if (IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group])) -+ return _FAIL; -+ for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { -+ if (tx_idx + 1 > hal_data->max_tx_cnt) -+ continue; -+ if (IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][tx_idx]) -+ || IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx]) -+ || IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW40_Diff[path][tx_idx]) -+ || IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW80_Diff[path][tx_idx]) -+ || IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW160_Diff[path][tx_idx])) -+ return _FAIL; -+ } -+ } -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+ return _SUCCESS; -+} -+ -+static inline void hal_init_pg_txpwr_info_2g(_adapter *adapter, TxPowerInfo24G *pwr_info) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 path, group, tx_idx; -+ -+ if (pwr_info == NULL) -+ return; -+ -+ _rtw_memset(pwr_info, 0, sizeof(TxPowerInfo24G)); -+ -+ /* init with invalid value */ -+ for (path = 0; path < MAX_RF_PATH; path++) { -+ for (group = 0; group < MAX_CHNL_GROUP_24G; group++) { -+ pwr_info->IndexCCK_Base[path][group] = PG_TXPWR_INVALID_BASE; -+ pwr_info->IndexBW40_Base[path][group] = PG_TXPWR_INVALID_BASE; -+ } -+ for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { -+ pwr_info->CCK_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF; -+ pwr_info->OFDM_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF; -+ pwr_info->BW20_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF; -+ pwr_info->BW40_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF; -+ } -+ } -+ -+ /* init for dummy base and diff */ -+ for (path = 0; path < MAX_RF_PATH; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) -+ break; -+ /* 2.4G BW40 base has 1 less group than CCK base*/ -+ pwr_info->IndexBW40_Base[path][MAX_CHNL_GROUP_24G - 1] = 0; -+ -+ /* dummy diff */ -+ pwr_info->CCK_Diff[path][0] = 0; /* 2.4G CCK-1TX */ -+ pwr_info->BW40_Diff[path][0] = 0; /* 2.4G BW40-1S */ -+ } -+} -+ -+static inline void hal_init_pg_txpwr_info_5g(_adapter *adapter, TxPowerInfo5G *pwr_info) -+{ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 path, group, tx_idx; -+ -+ if (pwr_info == NULL) -+ return; -+ -+ _rtw_memset(pwr_info, 0, sizeof(TxPowerInfo5G)); -+ -+ /* init with invalid value */ -+ for (path = 0; path < MAX_RF_PATH; path++) { -+ for (group = 0; group < MAX_CHNL_GROUP_5G; group++) -+ pwr_info->IndexBW40_Base[path][group] = PG_TXPWR_INVALID_BASE; -+ for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { -+ pwr_info->OFDM_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF; -+ pwr_info->BW20_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF; -+ pwr_info->BW40_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF; -+ pwr_info->BW80_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF; -+ pwr_info->BW160_Diff[path][tx_idx] = PG_TXPWR_INVALID_DIFF; -+ } -+ } -+ -+ for (path = 0; path < MAX_RF_PATH; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) -+ break; -+ /* dummy diff */ -+ pwr_info->BW40_Diff[path][0] = 0; /* 5G BW40-1S */ -+ } -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+} -+ -+#if DBG_PG_TXPWR_READ -+#define LOAD_PG_TXPWR_WARN_COND(_txpwr_src) 1 -+#else -+#define LOAD_PG_TXPWR_WARN_COND(_txpwr_src) (_txpwr_src > PG_TXPWR_SRC_PG_DATA) -+#endif -+ -+u16 hal_load_pg_txpwr_info_path_2g( -+ _adapter *adapter, -+ TxPowerInfo24G *pwr_info, -+ u32 path, -+ u8 txpwr_src, -+ const struct map_t *txpwr_map, -+ u16 pg_offset) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u16 offset = pg_offset; -+ u8 group, tx_idx; -+ u8 val; -+ u8 tmp_base; -+ s8 tmp_diff; -+ -+ if (pwr_info == NULL || !hal_chk_band_cap(adapter, BAND_CAP_2G)) { -+ offset += PG_TXPWR_1PATH_BYTE_NUM_2G; -+ goto exit; -+ } -+ -+ if (DBG_PG_TXPWR_READ) -+ RTW_INFO("%s [%c] offset:0x%03x\n", __func__, rf_path_char(path), offset); -+ -+ for (group = 0; group < MAX_CHNL_GROUP_24G; group++) { -+ if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) { -+ tmp_base = map_read8(txpwr_map, offset); -+ if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base) -+ && IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexCCK_Base[path][group]) -+ ) { -+ pwr_info->IndexCCK_Base[path][group] = tmp_base; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 2G G%02d CCK-1T base:%u from %s\n", rf_path_char(path), group, tmp_base, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ offset++; -+ } -+ -+ for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++) { -+ if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) { -+ tmp_base = map_read8(txpwr_map, offset); -+ if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base) -+ && IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group]) -+ ) { -+ pwr_info->IndexBW40_Base[path][group] = tmp_base; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 2G G%02d BW40-1S base:%u from %s\n", rf_path_char(path), group, tmp_base, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ offset++; -+ } -+ -+ for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { -+ if (tx_idx == 0) { -+ if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) { -+ val = map_read8(txpwr_map, offset); -+ tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx]) -+ ) { -+ pwr_info->BW20_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 2G BW20-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][tx_idx]) -+ ) { -+ pwr_info->OFDM_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 2G OFDM-%dT diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ offset++; -+ } else { -+ if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path) && tx_idx + 1 <= hal_data->max_tx_cnt) { -+ val = map_read8(txpwr_map, offset); -+ tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW40_Diff[path][tx_idx]) -+ ) { -+ pwr_info->BW40_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 2G BW40-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ -+ } -+ tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx]) -+ ) { -+ pwr_info->BW20_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 2G BW20-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ offset++; -+ -+ if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path) && tx_idx + 1 <= hal_data->max_tx_cnt) { -+ val = map_read8(txpwr_map, offset); -+ tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][tx_idx]) -+ ) { -+ pwr_info->OFDM_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 2G OFDM-%dT diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->CCK_Diff[path][tx_idx]) -+ ) { -+ pwr_info->CCK_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 2G CCK-%dT diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ offset++; -+ } -+ } -+ -+ if (offset != pg_offset + PG_TXPWR_1PATH_BYTE_NUM_2G) { -+ RTW_ERR("%s parse %d bytes != %d\n", __func__, offset - pg_offset, PG_TXPWR_1PATH_BYTE_NUM_2G); -+ rtw_warn_on(1); -+ } -+ -+exit: -+ return offset; -+} -+ -+u16 hal_load_pg_txpwr_info_path_5g( -+ _adapter *adapter, -+ TxPowerInfo5G *pwr_info, -+ u32 path, -+ u8 txpwr_src, -+ const struct map_t *txpwr_map, -+ u16 pg_offset) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u16 offset = pg_offset; -+ u8 group, tx_idx; -+ u8 val; -+ u8 tmp_base; -+ s8 tmp_diff; -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ if (pwr_info == NULL || !hal_chk_band_cap(adapter, BAND_CAP_5G)) -+#endif -+ { -+ offset += PG_TXPWR_1PATH_BYTE_NUM_5G; -+ goto exit; -+ } -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ if (DBG_PG_TXPWR_READ) -+ RTW_INFO("%s[%c] eaddr:0x%03x\n", __func__, rf_path_char(path), offset); -+ -+ for (group = 0; group < MAX_CHNL_GROUP_5G; group++) { -+ if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) { -+ tmp_base = map_read8(txpwr_map, offset); -+ if (!IS_PG_TXPWR_BASE_INVALID(hal_spec, tmp_base) -+ && IS_PG_TXPWR_BASE_INVALID(hal_spec, pwr_info->IndexBW40_Base[path][group]) -+ ) { -+ pwr_info->IndexBW40_Base[path][group] = tmp_base; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 5G G%02d BW40-1S base:%u from %s\n", rf_path_char(path), group, tmp_base, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ offset++; -+ } -+ -+ for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { -+ if (tx_idx == 0) { -+ if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) { -+ val = map_read8(txpwr_map, offset); -+ tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx]) -+ ) { -+ pwr_info->BW20_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 5G BW20-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][tx_idx]) -+ ) { -+ pwr_info->OFDM_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 5G OFDM-%dT diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ offset++; -+ } else { -+ if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path) && tx_idx + 1 <= hal_data->max_tx_cnt) { -+ val = map_read8(txpwr_map, offset); -+ tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW40_Diff[path][tx_idx]) -+ ) { -+ pwr_info->BW40_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 5G BW40-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW20_Diff[path][tx_idx]) -+ ) { -+ pwr_info->BW20_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 5G BW20-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ offset++; -+ } -+ } -+ -+ /* OFDM diff 2T ~ 3T */ -+ if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path) && hal_data->max_tx_cnt > 1) { -+ val = map_read8(txpwr_map, offset); -+ tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][1]) -+ ) { -+ pwr_info->OFDM_Diff[path][1] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 5G OFDM-%dT diff:%d from %s\n", rf_path_char(path), 2, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ if (hal_data->max_tx_cnt > 2) { -+ tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][2]) -+ ) { -+ pwr_info->OFDM_Diff[path][2] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 5G OFDM-%dT diff:%d from %s\n", rf_path_char(path), 3, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ } -+ offset++; -+ -+ /* OFDM diff 4T */ -+ if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path) && hal_data->max_tx_cnt > 3) { -+ val = map_read8(txpwr_map, offset); -+ tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->OFDM_Diff[path][3]) -+ ) { -+ pwr_info->OFDM_Diff[path][3] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 5G OFDM-%dT diff:%d from %s\n", rf_path_char(path), 4, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ offset++; -+ -+ for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { -+ if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path) && tx_idx + 1 <= hal_data->max_tx_cnt) { -+ val = map_read8(txpwr_map, offset); -+ tmp_diff = PG_TXPWR_MSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW80_Diff[path][tx_idx]) -+ ) { -+ pwr_info->BW80_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 5G BW80-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ tmp_diff = PG_TXPWR_LSB_DIFF_TO_S8BIT(val); -+ if (!IS_PG_TXPWR_DIFF_INVALID(tmp_diff) -+ && IS_PG_TXPWR_DIFF_INVALID(pwr_info->BW160_Diff[path][tx_idx]) -+ ) { -+ pwr_info->BW160_Diff[path][tx_idx] = tmp_diff; -+ if (LOAD_PG_TXPWR_WARN_COND(txpwr_src)) -+ RTW_INFO("[%c] 5G BW160-%dS diff:%d from %s\n", rf_path_char(path), tx_idx + 1, tmp_diff, pg_txpwr_src_str(txpwr_src)); -+ } -+ } -+ offset++; -+ } -+ -+ if (offset != pg_offset + PG_TXPWR_1PATH_BYTE_NUM_5G) { -+ RTW_ERR("%s parse %d bytes != %d\n", __func__, offset - pg_offset, PG_TXPWR_1PATH_BYTE_NUM_5G); -+ rtw_warn_on(1); -+ } -+ -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+ -+exit: -+ return offset; -+} -+ -+void hal_load_pg_txpwr_info( -+ _adapter *adapter, -+ TxPowerInfo24G *pwr_info_2g, -+ TxPowerInfo5G *pwr_info_5g, -+ u8 *pg_data, -+ BOOLEAN AutoLoadFail -+) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 path; -+ u16 pg_offset; -+ u8 txpwr_src = PG_TXPWR_SRC_PG_DATA; -+ struct map_t pg_data_map = MAP_ENT(184, 1, 0xFF, MAPSEG_PTR_ENT(0x00, 184, pg_data)); -+ const struct map_t *txpwr_map = NULL; -+ -+ /* init with invalid value and some dummy base and diff */ -+ hal_init_pg_txpwr_info_2g(adapter, pwr_info_2g); -+ hal_init_pg_txpwr_info_5g(adapter, pwr_info_5g); -+ -+select_src: -+ pg_offset = hal_spec->pg_txpwr_saddr; -+ -+ switch (txpwr_src) { -+ case PG_TXPWR_SRC_PG_DATA: -+ txpwr_map = &pg_data_map; -+ break; -+ case PG_TXPWR_SRC_IC_DEF: -+ txpwr_map = hal_pg_txpwr_def_info(adapter); -+ break; -+ case PG_TXPWR_SRC_DEF: -+ default: -+ txpwr_map = &pg_txpwr_def_info; -+ break; -+ }; -+ -+ if (txpwr_map == NULL) -+ goto end_parse; -+ -+ for (path = 0; path < MAX_RF_PATH ; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path) && !HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) -+ break; -+ pg_offset = hal_load_pg_txpwr_info_path_2g(adapter, pwr_info_2g, path, txpwr_src, txpwr_map, pg_offset); -+ pg_offset = hal_load_pg_txpwr_info_path_5g(adapter, pwr_info_5g, path, txpwr_src, txpwr_map, pg_offset); -+ } -+ -+ if (hal_chk_pg_txpwr_info_2g(adapter, pwr_info_2g) == _SUCCESS -+ && hal_chk_pg_txpwr_info_5g(adapter, pwr_info_5g) == _SUCCESS) -+ goto exit; -+ -+end_parse: -+ txpwr_src++; -+ if (txpwr_src < PG_TXPWR_SRC_NUM) -+ goto select_src; -+ -+ if (hal_chk_pg_txpwr_info_2g(adapter, pwr_info_2g) != _SUCCESS -+ || hal_chk_pg_txpwr_info_5g(adapter, pwr_info_5g) != _SUCCESS) -+ rtw_warn_on(1); -+ -+exit: -+ #if DBG_PG_TXPWR_READ -+ if (pwr_info_2g) -+ dump_pg_txpwr_info_2g(RTW_DBGDUMP, pwr_info_2g, 4, 4); -+ if (pwr_info_5g) -+ dump_pg_txpwr_info_5g(RTW_DBGDUMP, pwr_info_5g, 4, 4); -+ #endif -+ -+ return; -+} -+#endif /* CONFIG_TXPWR_PG_WITH_PWR_IDX */ -+ -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+ -+#define EFUSE_POWER_INDEX_INVALID 0xFF -+ -+static u8 _check_phy_efuse_tx_power_info_valid(u8 *pg_data, int chk_len, u16 pg_offset) -+{ -+ int ff_cnt = 0; -+ int i; -+ -+ for (i = 0; i < chk_len; i++) { -+ if (*(pg_data + pg_offset + i) == 0xFF) -+ ff_cnt++; -+ } -+ -+ if (ff_cnt == 0) -+ return _TRUE; -+ else if (ff_cnt == chk_len) -+ return _FALSE; -+ else -+ return EFUSE_POWER_INDEX_INVALID; -+} -+ -+int check_phy_efuse_tx_power_info_valid(_adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 *pg_data = hal_data->efuse_eeprom_data; -+ u16 pg_offset = hal_spec->pg_txpwr_saddr; -+ u8 path; -+ u8 valid_2g_path_bmp = 0; -+#if CONFIG_IEEE80211_BAND_5GHZ -+ u8 valid_5g_path_bmp = 0; -+#endif -+#ifdef CONFIG_MP_INCLUDED -+ struct mp_priv *pmp_priv = &adapter->mppriv; -+ -+ -+ if (pmp_priv->efuse_update_file == _TRUE && (rtw_mp_mode_check(adapter))) { -+ RTW_INFO("%s: To use efuse_update_file !!!\n", __func__); -+ return _FALSE; -+ } -+#endif -+ /* NOTE: TSSI offset use the same layout as TXPWR base */ -+ -+ for (path = 0; path < MAX_RF_PATH; path++) { -+ u8 ret = _FALSE; -+ -+ if (!HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path) && !HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) -+ break; -+ -+ if (HAL_SPEC_CHK_RF_PATH_2G(hal_spec, path)) { -+ ret = _check_phy_efuse_tx_power_info_valid(pg_data, PG_TXPWR_BASE_BYTE_NUM_2G, pg_offset); -+ if (ret == _TRUE) -+ valid_2g_path_bmp |= BIT(path); -+ else if (ret == EFUSE_POWER_INDEX_INVALID) -+ return _FALSE; -+ } -+ pg_offset += PG_TXPWR_1PATH_BYTE_NUM_2G; -+ -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ if (HAL_SPEC_CHK_RF_PATH_5G(hal_spec, path)) { -+ ret = _check_phy_efuse_tx_power_info_valid(pg_data, PG_TXPWR_BASE_BYTE_NUM_5G, pg_offset); -+ if (ret == _TRUE) -+ valid_5g_path_bmp |= BIT(path); -+ else if (ret == EFUSE_POWER_INDEX_INVALID) -+ return _FALSE; -+ } -+ #endif -+ pg_offset += PG_TXPWR_1PATH_BYTE_NUM_5G; -+ } -+ -+ if ((hal_chk_band_cap(adapter, BAND_CAP_2G) && valid_2g_path_bmp) -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ || (hal_chk_band_cap(adapter, BAND_CAP_5G) && valid_5g_path_bmp) -+ #endif -+ ) -+ return _TRUE; -+ -+ return _FALSE; -+} -+#endif /* CONFIG_EFUSE_CONFIG_FILE */ -+ -+#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX -+void hal_load_txpwr_info(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 max_tx_cnt = hal_data->max_tx_cnt; -+ u8 *pg_data = hal_data->efuse_eeprom_data; -+ TxPowerInfo24G *pwr_info_2g = NULL; -+ TxPowerInfo5G *pwr_info_5g = NULL; -+ u8 rfpath, ch_idx, group, tx_idx; -+ -+ if (hal_chk_band_cap(adapter, BAND_CAP_2G)) -+ pwr_info_2g = rtw_vmalloc(sizeof(TxPowerInfo24G)); -+#if CONFIG_IEEE80211_BAND_5GHZ -+ if (hal_chk_band_cap(adapter, BAND_CAP_5G)) -+ pwr_info_5g = rtw_vmalloc(sizeof(TxPowerInfo5G)); -+#endif -+ -+ /* load from pg data (or default value) */ -+ hal_load_pg_txpwr_info(adapter, pwr_info_2g, pwr_info_5g, pg_data, _FALSE); -+ -+ /* transform to hal_data */ -+ for (rfpath = 0; rfpath < MAX_RF_PATH; rfpath++) { -+ -+ if (!pwr_info_2g || !HAL_SPEC_CHK_RF_PATH_2G(hal_spec, rfpath)) -+ goto bypass_2g; -+ -+ /* 2.4G base */ -+ for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++) { -+ u8 cck_group; -+ -+ if (rtw_get_ch_group(ch_idx + 1, &group, &cck_group) != BAND_ON_2_4G) -+ continue; -+ -+ hal_data->Index24G_CCK_Base[rfpath][ch_idx] = pwr_info_2g->IndexCCK_Base[rfpath][cck_group]; -+ hal_data->Index24G_BW40_Base[rfpath][ch_idx] = pwr_info_2g->IndexBW40_Base[rfpath][group]; -+ } -+ -+ /* 2.4G diff */ -+ for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { -+ if (tx_idx + 1 > max_tx_cnt) -+ break; -+ -+ hal_data->CCK_24G_Diff[rfpath][tx_idx] = pwr_info_2g->CCK_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; -+ hal_data->OFDM_24G_Diff[rfpath][tx_idx] = pwr_info_2g->OFDM_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; -+ hal_data->BW20_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW20_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; -+ hal_data->BW40_24G_Diff[rfpath][tx_idx] = pwr_info_2g->BW40_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; -+ } -+bypass_2g: -+ ; -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ if (!pwr_info_5g || !HAL_SPEC_CHK_RF_PATH_5G(hal_spec, rfpath)) -+ goto bypass_5g; -+ -+ /* 5G base */ -+ for (ch_idx = 0; ch_idx < CENTER_CH_5G_ALL_NUM; ch_idx++) { -+ if (rtw_get_ch_group(center_ch_5g_all[ch_idx], &group, NULL) != BAND_ON_5G) -+ continue; -+ hal_data->Index5G_BW40_Base[rfpath][ch_idx] = pwr_info_5g->IndexBW40_Base[rfpath][group]; -+ } -+ -+ for (ch_idx = 0 ; ch_idx < CENTER_CH_5G_80M_NUM; ch_idx++) { -+ u8 upper, lower; -+ -+ if (rtw_get_ch_group(center_ch_5g_80m[ch_idx], &group, NULL) != BAND_ON_5G) -+ continue; -+ -+ upper = pwr_info_5g->IndexBW40_Base[rfpath][group]; -+ lower = pwr_info_5g->IndexBW40_Base[rfpath][group + 1]; -+ hal_data->Index5G_BW80_Base[rfpath][ch_idx] = (upper + lower) / 2; -+ } -+ -+ /* 5G diff */ -+ for (tx_idx = 0; tx_idx < MAX_TX_COUNT; tx_idx++) { -+ if (tx_idx + 1 > max_tx_cnt) -+ break; -+ -+ hal_data->OFDM_5G_Diff[rfpath][tx_idx] = pwr_info_5g->OFDM_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; -+ hal_data->BW20_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW20_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; -+ hal_data->BW40_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW40_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; -+ hal_data->BW80_5G_Diff[rfpath][tx_idx] = pwr_info_5g->BW80_Diff[rfpath][tx_idx] * hal_spec->pg_txgi_diff_factor; -+ } -+bypass_5g: -+ ; -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+ } -+ -+ if (pwr_info_2g) -+ rtw_vmfree(pwr_info_2g, sizeof(TxPowerInfo24G)); -+ if (pwr_info_5g) -+ rtw_vmfree(pwr_info_5g, sizeof(TxPowerInfo5G)); -+} -+ -+void dump_hal_txpwr_info_2g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ int path, ch_idx, tx_idx; -+ -+ RTW_PRINT_SEL(sel, "2.4G\n"); -+ RTW_PRINT_SEL(sel, "CCK-1T base:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++) -+ _RTW_PRINT_SEL(sel, "%3d ", center_ch_2g[ch_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++) -+ _RTW_PRINT_SEL(sel, "%3u ", hal_data->Index24G_CCK_Base[path][ch_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "CCK diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%dT ", tx_idx + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", hal_data->CCK_24G_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW40-1S base:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++) -+ _RTW_PRINT_SEL(sel, "%3d ", center_ch_2g[ch_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (ch_idx = 0; ch_idx < CENTER_CH_2G_NUM; ch_idx++) -+ _RTW_PRINT_SEL(sel, "%3u ", hal_data->Index24G_BW40_Base[path][ch_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "OFDM diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%dT ", tx_idx + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", hal_data->OFDM_24G_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW20 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%dS ", tx_idx + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", hal_data->BW20_24G_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW40 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%dS ", tx_idx + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", hal_data->BW40_24G_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+} -+ -+void dump_hal_txpwr_info_5g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt) -+{ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ int path, ch_idx, tx_idx; -+ u8 dump_section = 0; -+ u8 ch_idx_s = 0; -+ -+ RTW_PRINT_SEL(sel, "5G\n"); -+ RTW_PRINT_SEL(sel, "BW40-1S base:\n"); -+ do { -+ #define DUMP_5G_BW40_BASE_SECTION_NUM 3 -+ u8 end[DUMP_5G_BW40_BASE_SECTION_NUM] = {64, 144, 177}; -+ -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (ch_idx = ch_idx_s; ch_idx < CENTER_CH_5G_ALL_NUM; ch_idx++) { -+ _RTW_PRINT_SEL(sel, "%3d ", center_ch_5g_all[ch_idx]); -+ if (end[dump_section] == center_ch_5g_all[ch_idx]) -+ break; -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (ch_idx = ch_idx_s; ch_idx < CENTER_CH_5G_ALL_NUM; ch_idx++) { -+ _RTW_PRINT_SEL(sel, "%3u ", hal_data->Index5G_BW40_Base[path][ch_idx]); -+ if (end[dump_section] == center_ch_5g_all[ch_idx]) -+ break; -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ ch_idx_s = ch_idx + 1; -+ dump_section++; -+ if (dump_section >= DUMP_5G_BW40_BASE_SECTION_NUM) -+ break; -+ } while (1); -+ -+ RTW_PRINT_SEL(sel, "BW80-1S base:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (ch_idx = 0; ch_idx < CENTER_CH_5G_80M_NUM; ch_idx++) -+ _RTW_PRINT_SEL(sel, "%3d ", center_ch_5g_80m[ch_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (ch_idx = 0; ch_idx < CENTER_CH_5G_80M_NUM; ch_idx++) -+ _RTW_PRINT_SEL(sel, "%3u ", hal_data->Index5G_BW80_Base[path][ch_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "OFDM diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%dT ", tx_idx + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", hal_data->OFDM_5G_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW20 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%dS ", tx_idx + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", hal_data->BW20_5G_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW40 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%dS ", tx_idx + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", hal_data->BW40_5G_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, "BW80 diff:\n"); -+ RTW_PRINT_SEL(sel, "%4s ", ""); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%dS ", tx_idx + 1); -+ _RTW_PRINT_SEL(sel, "\n"); -+ for (path = 0; path < MAX_RF_PATH && path < rfpath_num; path++) { -+ RTW_PRINT_SEL(sel, "[%c]: ", rf_path_char(path)); -+ for (tx_idx = RF_1TX; tx_idx < MAX_TX_COUNT && tx_idx < max_tx_cnt; tx_idx++) -+ _RTW_PRINT_SEL(sel, "%2d ", hal_data->BW80_5G_Diff[path][tx_idx]); -+ _RTW_PRINT_SEL(sel, "\n"); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+} -+#endif /* CONFIG_TXPWR_PG_WITH_PWR_IDX */ -+ -+/* -+* rtw_regsty_get_target_tx_power - -+* -+* Return dBm or -1 for undefined -+*/ -+s8 rtw_regsty_get_target_tx_power( -+ PADAPTER Adapter, -+ u8 Band, -+ u8 RfPath, -+ RATE_SECTION RateSection -+) -+{ -+ struct registry_priv *regsty = adapter_to_regsty(Adapter); -+ s8 value = 0; -+ -+ if (RfPath > RF_PATH_D) { -+ RTW_PRINT("%s invalid RfPath:%d\n", __func__, RfPath); -+ return -1; -+ } -+ -+ if (Band != BAND_ON_2_4G -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ && Band != BAND_ON_5G -+ #endif -+ ) { -+ RTW_PRINT("%s invalid Band:%d\n", __func__, Band); -+ return -1; -+ } -+ -+ if (RateSection >= RATE_SECTION_NUM -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ || (Band == BAND_ON_5G && RateSection == CCK) -+ #endif -+ ) { -+ RTW_PRINT("%s invalid RateSection:%d in Band:%d, RfPath:%d\n", __func__ -+ , RateSection, Band, RfPath); -+ return -1; -+ } -+ -+ if (Band == BAND_ON_2_4G) -+ value = regsty->target_tx_pwr_2g[RfPath][RateSection]; -+#if CONFIG_IEEE80211_BAND_5GHZ -+ else /* BAND_ON_5G */ -+ value = regsty->target_tx_pwr_5g[RfPath][RateSection - 1]; -+#endif -+ -+ return value; -+} -+ -+bool rtw_regsty_chk_target_tx_power_valid(_adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ int path, tx_num, band, rs; -+ s8 target; -+ -+ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { -+ if (!hal_is_band_support(adapter, band)) -+ continue; -+ -+ for (path = 0; path < RF_PATH_MAX; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path)) -+ break; -+ -+ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { -+ tx_num = rate_section_to_tx_num(rs); -+ if (tx_num + 1 > GET_HAL_TX_NSS(adapter)) -+ continue; -+ -+ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) -+ continue; -+ -+ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ continue; -+ -+ target = rtw_regsty_get_target_tx_power(adapter, band, path, rs); -+ if (target == -1) { -+ RTW_PRINT("%s return _FALSE for band:%d, path:%d, rs:%d, t:%d\n", __func__, band, path, rs, target); -+ return _FALSE; -+ } -+ } -+ } -+ } -+ -+ return _TRUE; -+} -+ -+/* -+* phy_get_target_txpwr - -+* -+* Return value in unit of TX Gain Index -+*/ -+u8 phy_get_target_txpwr( -+ PADAPTER Adapter, -+ u8 Band, -+ u8 RfPath, -+ RATE_SECTION RateSection -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u8 value = 0; -+ -+ if (RfPath > RF_PATH_D) { -+ RTW_PRINT("%s invalid RfPath:%d\n", __func__, RfPath); -+ return 0; -+ } -+ -+ if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) { -+ RTW_PRINT("%s invalid Band:%d\n", __func__, Band); -+ return 0; -+ } -+ -+ if (RateSection >= RATE_SECTION_NUM -+ || (Band == BAND_ON_5G && RateSection == CCK) -+ ) { -+ RTW_PRINT("%s invalid RateSection:%d in Band:%d, RfPath:%d\n", __func__ -+ , RateSection, Band, RfPath); -+ return 0; -+ } -+ -+ if (Band == BAND_ON_2_4G) -+ value = pHalData->target_txpwr_2g[RfPath][RateSection]; -+ else if (Band == BAND_ON_5G) -+ value = pHalData->target_txpwr_5g[RfPath][RateSection - 1]; -+ -+ return value; -+} -+ -+static void phy_set_target_txpwr( -+ PADAPTER Adapter, -+ u8 Band, -+ u8 RfPath, -+ RATE_SECTION RateSection, -+ u8 Value -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ if (RfPath > RF_PATH_D) { -+ RTW_PRINT("%s invalid RfPath:%d\n", __func__, RfPath); -+ return; -+ } -+ -+ if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) { -+ RTW_PRINT("%s invalid Band:%d\n", __func__, Band); -+ return; -+ } -+ -+ if (RateSection >= RATE_SECTION_NUM -+ || (Band == BAND_ON_5G && RateSection == CCK) -+ ) { -+ RTW_PRINT("%s invalid RateSection:%d in %sG, RfPath:%d\n", __func__ -+ , RateSection, (Band == BAND_ON_2_4G) ? "2.4" : "5", RfPath); -+ return; -+ } -+ -+ if (Band == BAND_ON_2_4G) -+ pHalData->target_txpwr_2g[RfPath][RateSection] = Value; -+ else /* BAND_ON_5G */ -+ pHalData->target_txpwr_5g[RfPath][RateSection - 1] = Value; -+} -+ -+static inline BOOLEAN phy_is_txpwr_by_rate_undefined_of_band_path(_adapter *adapter, u8 band, u8 path) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 rate_idx = 0; -+ -+ for (rate_idx = 0; rate_idx < TX_PWR_BY_RATE_NUM_RATE; rate_idx++) { -+ if (hal_data->TxPwrByRate[band][path][rate_idx] != hal_spec->txgi_max) -+ goto exit; -+ } -+ -+exit: -+ return rate_idx >= TX_PWR_BY_RATE_NUM_RATE ? _TRUE : _FALSE; -+} -+ -+static inline void phy_txpwr_by_rate_duplicate_band_path(_adapter *adapter, u8 band, u8 s_path, u8 t_path) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 rate_idx = 0; -+ -+ for (rate_idx = 0; rate_idx < TX_PWR_BY_RATE_NUM_RATE; rate_idx++) -+ hal_data->TxPwrByRate[band][t_path][rate_idx] = hal_data->TxPwrByRate[band][s_path][rate_idx]; -+} -+ -+static void phy_txpwr_by_rate_chk_for_path_dup(_adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 band, path; -+ s8 src_path; -+ -+ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) -+ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) -+ hal_data->txpwr_by_rate_undefined_band_path[band][path] = 0; -+ -+ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { -+ if (!hal_is_band_support(adapter, band)) -+ continue; -+ -+ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path)) -+ continue; -+ -+ if (phy_is_txpwr_by_rate_undefined_of_band_path(adapter, band, path)) -+ hal_data->txpwr_by_rate_undefined_band_path[band][path] = 1; -+ } -+ } -+ -+ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { -+ if (!hal_is_band_support(adapter, band)) -+ continue; -+ -+ src_path = -1; -+ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path)) -+ continue; -+ -+ /* find src */ -+ if (src_path == -1 && hal_data->txpwr_by_rate_undefined_band_path[band][path] == 0) -+ src_path = path; -+ } -+ -+ if (src_path == -1) { -+ RTW_ERR("%s all power by rate undefined\n", __func__); -+ continue; -+ } -+ -+ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path)) -+ continue; -+ -+ /* duplicate src to undefined one */ -+ if (hal_data->txpwr_by_rate_undefined_band_path[band][path] == 1) { -+ RTW_INFO("%s duplicate %s [%c] to [%c]\n", __func__ -+ , band_str(band), rf_path_char(src_path), rf_path_char(path)); -+ phy_txpwr_by_rate_duplicate_band_path(adapter, band, src_path, path); -+ } -+ } -+ } -+} -+ -+static s8 _phy_get_txpwr_by_rate(_adapter *adapter -+ , BAND_TYPE band, enum rf_path rfpath, enum MGN_RATE rate); -+ -+void phy_store_target_tx_power(PADAPTER pAdapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter); -+ struct registry_priv *regsty = adapter_to_regsty(pAdapter); -+ -+ u8 band, path, rs, tx_num, base; -+ -+ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { -+ if (!hal_is_band_support(pAdapter, band)) -+ continue; -+ -+ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path)) -+ break; -+ -+ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { -+ tx_num = rate_section_to_tx_num(rs); -+ if (tx_num + 1 > GET_HAL_TX_NSS(pAdapter)) -+ continue; -+ -+ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) -+ continue; -+ -+ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) -+ continue; -+ -+ if (regsty->target_tx_pwr_valid == _TRUE) -+ base = hal_spec->txgi_pdbm * rtw_regsty_get_target_tx_power(pAdapter, band, path, rs); -+ else -+ base = _phy_get_txpwr_by_rate(pAdapter, band, path, rate_sec_base[rs]); -+ phy_set_target_txpwr(pAdapter, band, path, rs, base); -+ } -+ } -+ } -+} -+ -+static u8 get_val_from_dhex(u32 dhex, u8 i) -+{ -+ return (((dhex >> (i * 8 + 4)) & 0xF)) * 10 + ((dhex >> (i * 8)) & 0xF); -+} -+ -+static u8 get_val_from_hex(u32 hex, u8 i) -+{ -+ return (hex >> (i * 8)) & 0xFF; -+} -+ -+void -+PHY_GetRateValuesOfTxPowerByRate( -+ PADAPTER pAdapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Value, -+ u8 *Rate, -+ s8 *PwrByRateVal, -+ u8 *RateNum -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ u8 i = 0; -+ u8 (*get_val)(u32, u8); -+ -+ if (pDM_Odm->phy_reg_pg_version == 1) -+ get_val = get_val_from_dhex; -+ else -+ get_val = get_val_from_hex; -+ -+ switch (RegAddr) { -+ case rTxAGC_A_Rate18_06: -+ case rTxAGC_B_Rate18_06: -+ Rate[0] = MGN_6M; -+ Rate[1] = MGN_9M; -+ Rate[2] = MGN_12M; -+ Rate[3] = MGN_18M; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case rTxAGC_A_Rate54_24: -+ case rTxAGC_B_Rate54_24: -+ Rate[0] = MGN_24M; -+ Rate[1] = MGN_36M; -+ Rate[2] = MGN_48M; -+ Rate[3] = MGN_54M; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case rTxAGC_A_CCK1_Mcs32: -+ Rate[0] = MGN_1M; -+ PwrByRateVal[0] = (s8)get_val(Value, 1); -+ *RateNum = 1; -+ break; -+ -+ case rTxAGC_B_CCK11_A_CCK2_11: -+ if (BitMask == 0xffffff00) { -+ Rate[0] = MGN_2M; -+ Rate[1] = MGN_5_5M; -+ Rate[2] = MGN_11M; -+ for (i = 1; i < 4; ++i) -+ PwrByRateVal[i - 1] = (s8)get_val(Value, i); -+ *RateNum = 3; -+ } else if (BitMask == 0x000000ff) { -+ Rate[0] = MGN_11M; -+ PwrByRateVal[0] = (s8)get_val(Value, 0); -+ *RateNum = 1; -+ } -+ break; -+ -+ case rTxAGC_A_Mcs03_Mcs00: -+ case rTxAGC_B_Mcs03_Mcs00: -+ Rate[0] = MGN_MCS0; -+ Rate[1] = MGN_MCS1; -+ Rate[2] = MGN_MCS2; -+ Rate[3] = MGN_MCS3; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case rTxAGC_A_Mcs07_Mcs04: -+ case rTxAGC_B_Mcs07_Mcs04: -+ Rate[0] = MGN_MCS4; -+ Rate[1] = MGN_MCS5; -+ Rate[2] = MGN_MCS6; -+ Rate[3] = MGN_MCS7; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case rTxAGC_A_Mcs11_Mcs08: -+ case rTxAGC_B_Mcs11_Mcs08: -+ Rate[0] = MGN_MCS8; -+ Rate[1] = MGN_MCS9; -+ Rate[2] = MGN_MCS10; -+ Rate[3] = MGN_MCS11; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case rTxAGC_A_Mcs15_Mcs12: -+ case rTxAGC_B_Mcs15_Mcs12: -+ Rate[0] = MGN_MCS12; -+ Rate[1] = MGN_MCS13; -+ Rate[2] = MGN_MCS14; -+ Rate[3] = MGN_MCS15; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case rTxAGC_B_CCK1_55_Mcs32: -+ Rate[0] = MGN_1M; -+ Rate[1] = MGN_2M; -+ Rate[2] = MGN_5_5M; -+ for (i = 1; i < 4; ++i) -+ PwrByRateVal[i - 1] = (s8)get_val(Value, i); -+ *RateNum = 3; -+ break; -+ -+ case 0xC20: -+ case 0xE20: -+ case 0x1820: -+ case 0x1a20: -+ Rate[0] = MGN_1M; -+ Rate[1] = MGN_2M; -+ Rate[2] = MGN_5_5M; -+ Rate[3] = MGN_11M; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC24: -+ case 0xE24: -+ case 0x1824: -+ case 0x1a24: -+ Rate[0] = MGN_6M; -+ Rate[1] = MGN_9M; -+ Rate[2] = MGN_12M; -+ Rate[3] = MGN_18M; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC28: -+ case 0xE28: -+ case 0x1828: -+ case 0x1a28: -+ Rate[0] = MGN_24M; -+ Rate[1] = MGN_36M; -+ Rate[2] = MGN_48M; -+ Rate[3] = MGN_54M; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC2C: -+ case 0xE2C: -+ case 0x182C: -+ case 0x1a2C: -+ Rate[0] = MGN_MCS0; -+ Rate[1] = MGN_MCS1; -+ Rate[2] = MGN_MCS2; -+ Rate[3] = MGN_MCS3; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC30: -+ case 0xE30: -+ case 0x1830: -+ case 0x1a30: -+ Rate[0] = MGN_MCS4; -+ Rate[1] = MGN_MCS5; -+ Rate[2] = MGN_MCS6; -+ Rate[3] = MGN_MCS7; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC34: -+ case 0xE34: -+ case 0x1834: -+ case 0x1a34: -+ Rate[0] = MGN_MCS8; -+ Rate[1] = MGN_MCS9; -+ Rate[2] = MGN_MCS10; -+ Rate[3] = MGN_MCS11; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC38: -+ case 0xE38: -+ case 0x1838: -+ case 0x1a38: -+ Rate[0] = MGN_MCS12; -+ Rate[1] = MGN_MCS13; -+ Rate[2] = MGN_MCS14; -+ Rate[3] = MGN_MCS15; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC3C: -+ case 0xE3C: -+ case 0x183C: -+ case 0x1a3C: -+ Rate[0] = MGN_VHT1SS_MCS0; -+ Rate[1] = MGN_VHT1SS_MCS1; -+ Rate[2] = MGN_VHT1SS_MCS2; -+ Rate[3] = MGN_VHT1SS_MCS3; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC40: -+ case 0xE40: -+ case 0x1840: -+ case 0x1a40: -+ Rate[0] = MGN_VHT1SS_MCS4; -+ Rate[1] = MGN_VHT1SS_MCS5; -+ Rate[2] = MGN_VHT1SS_MCS6; -+ Rate[3] = MGN_VHT1SS_MCS7; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC44: -+ case 0xE44: -+ case 0x1844: -+ case 0x1a44: -+ Rate[0] = MGN_VHT1SS_MCS8; -+ Rate[1] = MGN_VHT1SS_MCS9; -+ Rate[2] = MGN_VHT2SS_MCS0; -+ Rate[3] = MGN_VHT2SS_MCS1; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC48: -+ case 0xE48: -+ case 0x1848: -+ case 0x1a48: -+ Rate[0] = MGN_VHT2SS_MCS2; -+ Rate[1] = MGN_VHT2SS_MCS3; -+ Rate[2] = MGN_VHT2SS_MCS4; -+ Rate[3] = MGN_VHT2SS_MCS5; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xC4C: -+ case 0xE4C: -+ case 0x184C: -+ case 0x1a4C: -+ Rate[0] = MGN_VHT2SS_MCS6; -+ Rate[1] = MGN_VHT2SS_MCS7; -+ Rate[2] = MGN_VHT2SS_MCS8; -+ Rate[3] = MGN_VHT2SS_MCS9; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xCD8: -+ case 0xED8: -+ case 0x18D8: -+ case 0x1aD8: -+ Rate[0] = MGN_MCS16; -+ Rate[1] = MGN_MCS17; -+ Rate[2] = MGN_MCS18; -+ Rate[3] = MGN_MCS19; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xCDC: -+ case 0xEDC: -+ case 0x18DC: -+ case 0x1aDC: -+ Rate[0] = MGN_MCS20; -+ Rate[1] = MGN_MCS21; -+ Rate[2] = MGN_MCS22; -+ Rate[3] = MGN_MCS23; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0x3a24: /* HT MCS24-27 */ -+ Rate[0] = MGN_MCS24; -+ Rate[1] = MGN_MCS25; -+ Rate[2] = MGN_MCS26; -+ Rate[3] = MGN_MCS27; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0x3a28: /* HT MCS28-31 */ -+ Rate[0] = MGN_MCS28; -+ Rate[1] = MGN_MCS29; -+ Rate[2] = MGN_MCS30; -+ Rate[3] = MGN_MCS31; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xCE0: -+ case 0xEE0: -+ case 0x18E0: -+ case 0x1aE0: -+ Rate[0] = MGN_VHT3SS_MCS0; -+ Rate[1] = MGN_VHT3SS_MCS1; -+ Rate[2] = MGN_VHT3SS_MCS2; -+ Rate[3] = MGN_VHT3SS_MCS3; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xCE4: -+ case 0xEE4: -+ case 0x18E4: -+ case 0x1aE4: -+ Rate[0] = MGN_VHT3SS_MCS4; -+ Rate[1] = MGN_VHT3SS_MCS5; -+ Rate[2] = MGN_VHT3SS_MCS6; -+ Rate[3] = MGN_VHT3SS_MCS7; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0xCE8: -+ case 0xEE8: -+ case 0x18E8: -+ case 0x1aE8: -+ case 0x3a48: -+ Rate[0] = MGN_VHT3SS_MCS8; -+ Rate[1] = MGN_VHT3SS_MCS9; -+ Rate[2] = MGN_VHT4SS_MCS0; -+ Rate[3] = MGN_VHT4SS_MCS1; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0x3a4c: -+ Rate[0] = MGN_VHT4SS_MCS2; -+ Rate[1] = MGN_VHT4SS_MCS3; -+ Rate[2] = MGN_VHT4SS_MCS4; -+ Rate[3] = MGN_VHT4SS_MCS5; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ case 0x3a50: -+ Rate[0] = MGN_VHT4SS_MCS6; -+ Rate[1] = MGN_VHT4SS_MCS7; -+ Rate[2] = MGN_VHT4SS_MCS8; -+ Rate[3] = MGN_VHT4SS_MCS9; -+ for (i = 0; i < 4; ++i) -+ PwrByRateVal[i] = (s8)get_val(Value, i); -+ *RateNum = 4; -+ break; -+ -+ default: -+ RTW_PRINT("Invalid RegAddr 0x%x in %s()\n", RegAddr, __func__); -+ break; -+ }; -+} -+ -+void -+PHY_StoreTxPowerByRateNew( -+ PADAPTER pAdapter, -+ u32 Band, -+ u32 RfPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u8 i = 0, rates[4] = {0}, rateNum = 0; -+ s8 PwrByRateVal[4] = {0}; -+ -+ PHY_GetRateValuesOfTxPowerByRate(pAdapter, RegAddr, BitMask, Data, rates, PwrByRateVal, &rateNum); -+ -+ if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) { -+ RTW_PRINT("Invalid Band %d\n", Band); -+ return; -+ } -+ -+ if (RfPath > RF_PATH_D) { -+ RTW_PRINT("Invalid RfPath %d\n", RfPath); -+ return; -+ } -+ -+ for (i = 0; i < rateNum; ++i) { -+ u8 rate_idx = phy_get_rate_idx_of_txpwr_by_rate(rates[i]); -+ -+ pHalData->TxPwrByRate[Band][RfPath][rate_idx] = PwrByRateVal[i]; -+ } -+} -+ -+void -+PHY_InitTxPowerByRate( -+ PADAPTER pAdapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter); -+ u8 band = 0, rfPath = 0, rate = 0; -+ -+ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; ++band) -+ for (rfPath = 0; rfPath < TX_PWR_BY_RATE_NUM_RF; ++rfPath) -+ for (rate = 0; rate < TX_PWR_BY_RATE_NUM_RATE; ++rate) -+ pHalData->TxPwrByRate[band][rfPath][rate] = hal_spec->txgi_max; -+} -+ -+void -+phy_store_tx_power_by_rate( -+ PADAPTER pAdapter, -+ u32 Band, -+ u32 RfPath, -+ u32 TxNum, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ -+ if (pDM_Odm->phy_reg_pg_version > 0) -+ PHY_StoreTxPowerByRateNew(pAdapter, Band, RfPath, RegAddr, BitMask, Data); -+ else -+ RTW_INFO("Invalid PHY_REG_PG.txt version %d\n", pDM_Odm->phy_reg_pg_version); -+ -+} -+ -+/* -+ * This function must be called if the value in the PHY_REG_PG.txt(or header) -+ * is exact dBm values -+ */ -+void -+PHY_TxPowerByRateConfiguration( -+ PADAPTER pAdapter -+) -+{ -+ phy_txpwr_by_rate_chk_for_path_dup(pAdapter); -+ phy_store_target_tx_power(pAdapter); -+} -+ -+#ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX -+extern bool phy_set_txpwr_idx_offload(_adapter *adapter); -+#endif -+ -+void -+phy_set_tx_power_index_by_rate_section( -+ PADAPTER pAdapter, -+ enum rf_path RFPath, -+ u8 Channel, -+ u8 rs -+) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(pAdapter); -+ u8 band = hal_data->current_band_type; -+ u8 bw = hal_data->current_channel_bw; -+ u32 powerIndex = 0; -+ int i = 0; -+ -+ if (rs >= RATE_SECTION_NUM) { -+ RTW_INFO("Invalid RateSection %d in %s", rs, __func__); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (rs == CCK && bw != BAND_ON_2_4G) -+ goto exit; -+ -+ for (i = 0; i < rates_by_sections[rs].rate_num; ++i) { -+#if DBG_TX_POWER_IDX -+ struct txpwr_idx_comp tic; -+ -+ powerIndex = rtw_hal_get_tx_power_index(pAdapter, RFPath -+ , rs, rates_by_sections[rs].rates[i], bw, band, Channel, 0, &tic); -+ dump_tx_power_index_inline(RTW_DBGDUMP, pAdapter, RFPath, bw, Channel -+ , rates_by_sections[rs].rates[i], powerIndex, &tic); -+#else -+ powerIndex = phy_get_tx_power_index_ex(pAdapter, RFPath -+ , rs, rates_by_sections[rs].rates[i], bw, band, Channel, 0); -+#endif -+ PHY_SetTxPowerIndex(pAdapter, powerIndex, RFPath, rates_by_sections[rs].rates[i]); -+ } -+ -+#ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX -+ if (!hal_data->set_entire_txpwr -+ && phy_set_txpwr_idx_offload(pAdapter)) -+ rtw_hal_set_txpwr_done(pAdapter); -+#endif -+ -+exit: -+ return; -+} -+ -+bool phy_get_ch_idx(u8 ch, u8 *ch_idx) -+{ -+ u8 i = 0; -+ BOOLEAN bIn24G = _TRUE; -+ -+ if (ch > 0 && ch <= 14) { -+ bIn24G = _TRUE; -+ *ch_idx = ch - 1; -+ } else { -+ bIn24G = _FALSE; -+ -+ for (i = 0; i < CENTER_CH_5G_ALL_NUM; ++i) { -+ if (center_ch_5g_all[i] == ch) { -+ *ch_idx = i; -+ break; -+ } -+ } -+ } -+ -+ return bIn24G; -+} -+ -+bool phy_chk_ch_setting_consistency(_adapter *adapter, u8 ch) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 ch_idx = 0xFF; -+ u8 ret = _FAIL; -+ -+ phy_get_ch_idx(ch, &ch_idx); -+ if (ch_idx == 0xFF) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (ch != hal_data->current_channel) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (ch <= 14) { -+ if (hal_data->current_band_type != BAND_ON_2_4G) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ if (hal_data->current_channel_bw > CHANNEL_WIDTH_40) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ } -+ if (ch > 14) { -+ if (hal_data->current_band_type != BAND_ON_5G) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ if (hal_data->current_channel_bw > CHANNEL_WIDTH_160) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ } -+ -+ ret = _SUCCESS; -+ -+exit: -+ if (ret != _SUCCESS) -+ RTW_WARN("ch:%u, hal band:%u, ch:%u, bw:%u\n", ch -+ , hal_data->current_band_type, hal_data->current_channel, hal_data->current_channel_bw); -+ -+ return ret; -+} -+ -+#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX -+u8 phy_get_pg_txpwr_idx(_adapter *pAdapter -+ , enum rf_path RFPath, RATE_SECTION rs, u8 ntx_idx -+ , enum channel_width BandWidth, u8 band, u8 Channel) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ u8 i; -+ u8 txPower = 0; -+ u8 chnlIdx = (Channel - 1); -+ -+ if (HAL_IsLegalChannel(pAdapter, Channel) == _FALSE) { -+ chnlIdx = 0; -+ RTW_INFO("Illegal channel!!\n"); -+ } -+ -+ phy_get_ch_idx(Channel, &chnlIdx); -+ -+ if (0) -+ RTW_INFO("[%s] Channel Index: %d\n", band_str(band), chnlIdx); -+ -+ if (band == BAND_ON_2_4G) { -+ if (IS_CCK_RATE_SECTION(rs)) { -+ /* CCK-nTX */ -+ txPower = pHalData->Index24G_CCK_Base[RFPath][chnlIdx]; -+ txPower += pHalData->CCK_24G_Diff[RFPath][RF_1TX]; -+ if (ntx_idx >= RF_2TX) -+ txPower += pHalData->CCK_24G_Diff[RFPath][RF_2TX]; -+ if (ntx_idx >= RF_3TX) -+ txPower += pHalData->CCK_24G_Diff[RFPath][RF_3TX]; -+ if (ntx_idx >= RF_4TX) -+ txPower += pHalData->CCK_24G_Diff[RFPath][RF_4TX]; -+ goto exit; -+ } -+ -+ txPower = pHalData->Index24G_BW40_Base[RFPath][chnlIdx]; -+ -+ /* OFDM-nTX */ -+ if (IS_OFDM_RATE_SECTION(rs)) { -+ txPower += pHalData->OFDM_24G_Diff[RFPath][RF_1TX]; -+ if (ntx_idx >= RF_2TX) -+ txPower += pHalData->OFDM_24G_Diff[RFPath][RF_2TX]; -+ if (ntx_idx >= RF_3TX) -+ txPower += pHalData->OFDM_24G_Diff[RFPath][RF_3TX]; -+ if (ntx_idx >= RF_4TX) -+ txPower += pHalData->OFDM_24G_Diff[RFPath][RF_4TX]; -+ goto exit; -+ } -+ -+ /* BW20-nS */ -+ if (BandWidth == CHANNEL_WIDTH_20) { -+ txPower += pHalData->BW20_24G_Diff[RFPath][RF_1TX]; -+ if (rate_section_to_tx_num(rs) >= RF_2TX) -+ txPower += pHalData->BW20_24G_Diff[RFPath][RF_2TX]; -+ if (rate_section_to_tx_num(rs) >= RF_3TX) -+ txPower += pHalData->BW20_24G_Diff[RFPath][RF_3TX]; -+ if (rate_section_to_tx_num(rs) >= RF_4TX) -+ txPower += pHalData->BW20_24G_Diff[RFPath][RF_4TX]; -+ goto exit; -+ } -+ -+ /* BW40-nS */ -+ if (BandWidth == CHANNEL_WIDTH_40 -+ /* Willis suggest adopt BW 40M power index while in BW 80 mode */ -+ || BandWidth == CHANNEL_WIDTH_80 -+ ) { -+ txPower += pHalData->BW40_24G_Diff[RFPath][RF_1TX]; -+ if (rate_section_to_tx_num(rs) >= RF_2TX) -+ txPower += pHalData->BW40_24G_Diff[RFPath][RF_2TX]; -+ if (rate_section_to_tx_num(rs) >= RF_3TX) -+ txPower += pHalData->BW40_24G_Diff[RFPath][RF_3TX]; -+ if (rate_section_to_tx_num(rs) >= RF_4TX) -+ txPower += pHalData->BW40_24G_Diff[RFPath][RF_4TX]; -+ goto exit; -+ } -+ } -+#if CONFIG_IEEE80211_BAND_5GHZ -+ else if (band == BAND_ON_5G) { -+ if (IS_CCK_RATE_SECTION(rs)) { -+ RTW_WARN("===>%s: INVALID, CCK on 5G\n", __func__); -+ goto exit; -+ } -+ -+ txPower = pHalData->Index5G_BW40_Base[RFPath][chnlIdx]; -+ -+ /* OFDM-nTX */ -+ if (IS_OFDM_RATE_SECTION(rs)) { -+ txPower += pHalData->OFDM_5G_Diff[RFPath][RF_1TX]; -+ if (ntx_idx >= RF_2TX) -+ txPower += pHalData->OFDM_5G_Diff[RFPath][RF_2TX]; -+ if (ntx_idx >= RF_3TX) -+ txPower += pHalData->OFDM_5G_Diff[RFPath][RF_3TX]; -+ if (ntx_idx >= RF_4TX) -+ txPower += pHalData->OFDM_5G_Diff[RFPath][RF_4TX]; -+ goto exit; -+ } -+ -+ /* BW20-nS */ -+ if (BandWidth == CHANNEL_WIDTH_20) { -+ txPower += pHalData->BW20_5G_Diff[RFPath][RF_1TX]; -+ if (rate_section_to_tx_num(rs) >= RF_2TX) -+ txPower += pHalData->BW20_5G_Diff[RFPath][RF_2TX]; -+ if (rate_section_to_tx_num(rs) >= RF_3TX) -+ txPower += pHalData->BW20_5G_Diff[RFPath][RF_3TX]; -+ if (rate_section_to_tx_num(rs) >= RF_4TX) -+ txPower += pHalData->BW20_5G_Diff[RFPath][RF_4TX]; -+ goto exit; -+ } -+ -+ /* BW40-nS */ -+ if (BandWidth == CHANNEL_WIDTH_40) { -+ txPower += pHalData->BW40_5G_Diff[RFPath][RF_1TX]; -+ if (rate_section_to_tx_num(rs) >= RF_2TX) -+ txPower += pHalData->BW40_5G_Diff[RFPath][RF_2TX]; -+ if (rate_section_to_tx_num(rs) >= RF_3TX) -+ txPower += pHalData->BW40_5G_Diff[RFPath][RF_3TX]; -+ if (rate_section_to_tx_num(rs) >= RF_4TX) -+ txPower += pHalData->BW40_5G_Diff[RFPath][RF_4TX]; -+ goto exit; -+ } -+ -+ /* BW80-nS */ -+ if (BandWidth == CHANNEL_WIDTH_80) { -+ /* get 80MHz cch index */ -+ for (i = 0; i < CENTER_CH_5G_80M_NUM; ++i) { -+ if (center_ch_5g_80m[i] == Channel) { -+ chnlIdx = i; -+ break; -+ } -+ } -+ if (i >= CENTER_CH_5G_80M_NUM) { -+ #ifdef CONFIG_MP_INCLUDED -+ if (rtw_mp_mode_check(pAdapter) == _FALSE) -+ #endif -+ rtw_warn_on(1); -+ txPower = 0; -+ goto exit; -+ } -+ -+ txPower = pHalData->Index5G_BW80_Base[RFPath][chnlIdx]; -+ -+ txPower += + pHalData->BW80_5G_Diff[RFPath][RF_1TX]; -+ if (rate_section_to_tx_num(rs) >= RF_2TX) -+ txPower += pHalData->BW80_5G_Diff[RFPath][RF_2TX]; -+ if (rate_section_to_tx_num(rs) >= RF_3TX) -+ txPower += pHalData->BW80_5G_Diff[RFPath][RF_3TX]; -+ if (rate_section_to_tx_num(rs) >= RF_4TX) -+ txPower += pHalData->BW80_5G_Diff[RFPath][RF_4TX]; -+ goto exit; -+ } -+ -+ /* TODO: BW160-nS */ -+ rtw_warn_on(1); -+ } -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+ -+exit: -+ return txPower; -+} -+#endif /* CONFIG_TXPWR_PG_WITH_PWR_IDX */ -+ -+s8 -+PHY_GetTxPowerTrackingOffset( -+ PADAPTER pAdapter, -+ enum rf_path RFPath, -+ u8 Rate -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ s8 offset = 0; -+ -+ if (pDM_Odm->rf_calibrate_info.txpowertrack_control == _FALSE) -+ return offset; -+ -+ if ((Rate == MGN_1M) || (Rate == MGN_2M) || (Rate == MGN_5_5M) || (Rate == MGN_11M)) { -+ offset = pDM_Odm->rf_calibrate_info.remnant_cck_swing_idx; -+ /*RTW_INFO("+Remnant_CCKSwingIdx = 0x%x\n", RFPath, Rate, pRFCalibrateInfo->Remnant_CCKSwingIdx);*/ -+ } else { -+ offset = pDM_Odm->rf_calibrate_info.remnant_ofdm_swing_idx[RFPath]; -+ /*RTW_INFO("+Remanant_OFDMSwingIdx[RFPath %u][Rate 0x%x] = 0x%x\n", RFPath, Rate, pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath]); */ -+ -+ } -+ -+ return offset; -+} -+ -+static const u8 _phy_get_rate_idx_of_txpwr_by_rate[MGN_UNKNOWN] = { -+ [MGN_1M] = 0, -+ [MGN_2M] = 1, -+ [MGN_5_5M] = 2, -+ [MGN_11M] = 3, -+ [MGN_6M] = 4, -+ [MGN_9M] = 5, -+ [MGN_12M] = 6, -+ [MGN_18M] = 7, -+ [MGN_24M] = 8, -+ [MGN_36M] = 9, -+ [MGN_48M] = 10, -+ [MGN_54M] = 11, -+ [MGN_MCS0] = 12, -+ [MGN_MCS1] = 13, -+ [MGN_MCS2] = 14, -+ [MGN_MCS3] = 15, -+ [MGN_MCS4] = 16, -+ [MGN_MCS5] = 17, -+ [MGN_MCS6] = 18, -+ [MGN_MCS7] = 19, -+ [MGN_MCS8] = 20, -+ [MGN_MCS9] = 21, -+ [MGN_MCS10] = 22, -+ [MGN_MCS11] = 23, -+ [MGN_MCS12] = 24, -+ [MGN_MCS13] = 25, -+ [MGN_MCS14] = 26, -+ [MGN_MCS15] = 27, -+ [MGN_MCS16] = 28, -+ [MGN_MCS17] = 29, -+ [MGN_MCS18] = 30, -+ [MGN_MCS19] = 31, -+ [MGN_MCS20] = 32, -+ [MGN_MCS21] = 33, -+ [MGN_MCS22] = 34, -+ [MGN_MCS23] = 35, -+ [MGN_MCS24] = 36, -+ [MGN_MCS25] = 37, -+ [MGN_MCS26] = 38, -+ [MGN_MCS27] = 39, -+ [MGN_MCS28] = 40, -+ [MGN_MCS29] = 41, -+ [MGN_MCS30] = 42, -+ [MGN_MCS31] = 43, -+ [MGN_VHT1SS_MCS0] = 44, -+ [MGN_VHT1SS_MCS1] = 45, -+ [MGN_VHT1SS_MCS2] = 46, -+ [MGN_VHT1SS_MCS3] = 47, -+ [MGN_VHT1SS_MCS4] = 48, -+ [MGN_VHT1SS_MCS5] = 49, -+ [MGN_VHT1SS_MCS6] = 50, -+ [MGN_VHT1SS_MCS7] = 51, -+ [MGN_VHT1SS_MCS8] = 52, -+ [MGN_VHT1SS_MCS9] = 53, -+ [MGN_VHT2SS_MCS0] = 54, -+ [MGN_VHT2SS_MCS1] = 55, -+ [MGN_VHT2SS_MCS2] = 56, -+ [MGN_VHT2SS_MCS3] = 57, -+ [MGN_VHT2SS_MCS4] = 58, -+ [MGN_VHT2SS_MCS5] = 59, -+ [MGN_VHT2SS_MCS6] = 60, -+ [MGN_VHT2SS_MCS7] = 61, -+ [MGN_VHT2SS_MCS8] = 62, -+ [MGN_VHT2SS_MCS9] = 63, -+ [MGN_VHT3SS_MCS0] = 64, -+ [MGN_VHT3SS_MCS1] = 65, -+ [MGN_VHT3SS_MCS2] = 66, -+ [MGN_VHT3SS_MCS3] = 67, -+ [MGN_VHT3SS_MCS4] = 68, -+ [MGN_VHT3SS_MCS5] = 69, -+ [MGN_VHT3SS_MCS6] = 70, -+ [MGN_VHT3SS_MCS7] = 71, -+ [MGN_VHT3SS_MCS8] = 72, -+ [MGN_VHT3SS_MCS9] = 73, -+ [MGN_VHT4SS_MCS0] = 74, -+ [MGN_VHT4SS_MCS1] = 75, -+ [MGN_VHT4SS_MCS2] = 76, -+ [MGN_VHT4SS_MCS3] = 77, -+ [MGN_VHT4SS_MCS4] = 78, -+ [MGN_VHT4SS_MCS5] = 79, -+ [MGN_VHT4SS_MCS6] = 80, -+ [MGN_VHT4SS_MCS7] = 81, -+ [MGN_VHT4SS_MCS8] = 82, -+ [MGN_VHT4SS_MCS9] = 83, -+}; -+ -+/*The same as MRateToHwRate in hal_com.c*/ -+u8 phy_get_rate_idx_of_txpwr_by_rate(enum MGN_RATE rate) -+{ -+ u8 index = 0; -+ -+ if (rate < MGN_UNKNOWN) -+ index = _phy_get_rate_idx_of_txpwr_by_rate[rate]; -+ -+ if (rate != MGN_1M && index == 0) -+ RTW_WARN("Invalid rate 0x%x in %s\n", rate, __FUNCTION__); -+ -+ return index; -+} -+ -+static s8 _phy_get_txpwr_by_rate(_adapter *adapter -+ , BAND_TYPE band, enum rf_path rfpath, enum MGN_RATE rate) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); -+ s8 value = 0; -+ u8 rate_idx = phy_get_rate_idx_of_txpwr_by_rate(rate); -+ -+ if (band != BAND_ON_2_4G && band != BAND_ON_5G) { -+ RTW_INFO("Invalid band %d in %s\n", band, __func__); -+ goto exit; -+ } -+ if (rfpath > RF_PATH_D) { -+ RTW_INFO("Invalid RfPath %d in %s\n", rfpath, __func__); -+ goto exit; -+ } -+ if (rate_idx >= TX_PWR_BY_RATE_NUM_RATE) { -+ RTW_INFO("Invalid RateIndex %d in %s\n", rate_idx, __func__); -+ goto exit; -+ } -+ -+ value = pHalData->TxPwrByRate[band][rfpath][rate_idx]; -+ -+exit: -+ return value; -+} -+ -+/* -+* Return value in unit of TX Gain Index -+*/ -+s8 phy_get_txpwr_by_rate(_adapter *adapter -+ , BAND_TYPE band, enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate) -+{ -+ if (phy_is_tx_power_by_rate_needed(adapter)) -+ return _phy_get_txpwr_by_rate(adapter, band, rfpath, rate); -+ return phy_get_target_txpwr(adapter, band, rfpath, rs); -+} -+ -+/* get txpowr in mBm for single path */ -+s16 phy_get_txpwr_by_rate_single_mbm(_adapter *adapter -+ , BAND_TYPE band, enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate, bool eirp) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ s16 val; -+ -+ val = phy_get_txpwr_by_rate(adapter, band, rfpath, rs, rate); -+ if (val == hal_spec->txgi_max) -+ val = UNSPECIFIED_MBM; -+ else { -+ val = (val * MBM_PDBM) / hal_spec->txgi_pdbm; -+ if (eirp) -+ val += rfctl->antenna_gain; -+ } -+ -+ return val; -+} -+ -+/* get txpowr in mBm with effect of N-TX */ -+s16 phy_get_txpwr_by_rate_total_mbm(_adapter *adapter -+ , BAND_TYPE band, RATE_SECTION rs, enum MGN_RATE rate, bool cap, bool eirp) -+{ -+ s16 val; -+ u8 tx_num; -+ -+ if (cap) -+ tx_num = phy_get_capable_tx_num(adapter, rate) + 1; -+ else -+ tx_num = phy_get_current_tx_num(adapter, rate) + 1; -+ -+ /* assume all path have same txpower target */ -+ val = phy_get_txpwr_by_rate_single_mbm(adapter, band, RF_PATH_A, rs, rate, eirp); -+ if (val != UNSPECIFIED_MBM) -+ val += mb_of_ntx(tx_num); -+ -+ return val; -+} -+ -+static s16 _phy_get_txpwr_by_rate_max_mbm(_adapter *adapter, BAND_TYPE band, s8 rfpath, bool cap, bool eirp) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 tx_num; -+ RATE_SECTION rs; -+ int i; -+ s16 max = UNSPECIFIED_MBM, mbm; -+ -+ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { -+ tx_num = rate_section_to_tx_num(rs); -+ if (tx_num + 1 > hal_data->tx_nss) -+ continue; -+ -+ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) -+ continue; -+ -+ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ continue; -+ -+ for (i = 0; i < rates_by_sections[rs].rate_num; i++) { -+ if (rfpath < 0) /* total */ -+ mbm = phy_get_txpwr_by_rate_total_mbm(adapter, band, rs, rates_by_sections[rs].rates[i], cap, eirp); -+ else -+ mbm = phy_get_txpwr_by_rate_single_mbm(adapter, band, rfpath, rs, rates_by_sections[rs].rates[i], eirp); -+ if (mbm == UNSPECIFIED_MBM) -+ continue; -+ if (max == UNSPECIFIED_MBM || mbm > max) -+ max = mbm; -+ } -+ } -+ -+ return max; -+} -+ -+/* get txpowr in mBm for single path */ -+s16 phy_get_txpwr_by_rate_single_max_mbm(_adapter *adapter, BAND_TYPE band, enum rf_path rfpath, bool eirp) -+{ -+ return _phy_get_txpwr_by_rate_max_mbm(adapter, band, rfpath, 0 /* single don't care */, eirp); -+} -+ -+/* get txpowr in mBm with effect of N-TX */ -+s16 phy_get_txpwr_by_rate_total_max_mbm(_adapter *adapter, BAND_TYPE band, bool cap, bool eirp) -+{ -+ return _phy_get_txpwr_by_rate_max_mbm(adapter, band, -1, cap, eirp); -+} -+ -+u8 phy_check_under_survey_ch(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ _adapter *iface; -+ struct mlme_ext_priv *mlmeext; -+ u8 ret = _FALSE; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ mlmeext = &iface->mlmeextpriv; -+ -+ /* check scan state */ -+ if (mlmeext_scan_state(mlmeext) != SCAN_DISABLE -+ && mlmeext_scan_state(mlmeext) != SCAN_COMPLETE -+ && mlmeext_scan_state(mlmeext) != SCAN_BACKING_OP) { -+ ret = _TRUE; -+ } else if (mlmeext_scan_state(mlmeext) == SCAN_BACKING_OP -+ && !mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_TX_RESUME)) { -+ ret = _TRUE; -+ } -+ } -+ -+ return ret; -+} -+ -+void -+phy_set_tx_power_level_by_path( -+ PADAPTER Adapter, -+ u8 channel, -+ u8 path -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ BOOLEAN bIsIn24G = (pHalData->current_band_type == BAND_ON_2_4G); -+ u8 under_survey_ch = phy_check_under_survey_ch(Adapter); -+ -+ -+ /* if ( pMgntInfo->RegNByteAccess == 0 ) */ -+ { -+ if (bIsIn24G) -+ phy_set_tx_power_index_by_rate_section(Adapter, path, channel, CCK); -+ -+ phy_set_tx_power_index_by_rate_section(Adapter, path, channel, OFDM); -+ -+ if (!under_survey_ch) { -+ phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS0_MCS7); -+ -+ if (IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter)) -+ phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_1SSMCS0_1SSMCS9); -+ -+ if (pHalData->tx_nss >= 2) { -+ phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS8_MCS15); -+ -+ if (IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8814A(Adapter)) -+ phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_2SSMCS0_2SSMCS9); -+ -+ if (IS_HARDWARE_TYPE_8814A(Adapter)) { -+ phy_set_tx_power_index_by_rate_section(Adapter, path, channel, HT_MCS16_MCS23); -+ phy_set_tx_power_index_by_rate_section(Adapter, path, channel, VHT_3SSMCS0_3SSMCS9); -+ } -+ } -+ } -+ } -+} -+ -+#if CONFIG_TXPWR_LIMIT -+const char *const _txpwr_lmt_rs_str[] = { -+ "CCK", -+ "OFDM", -+ "HT", -+ "VHT", -+ "UNKNOWN", -+}; -+ -+static s8 -+phy_GetChannelIndexOfTxPowerLimit( -+ u8 Band, -+ u8 Channel -+) -+{ -+ s8 channelIndex = -1; -+ u8 i = 0; -+ -+ if (Band == BAND_ON_2_4G) -+ channelIndex = Channel - 1; -+ else if (Band == BAND_ON_5G) { -+ for (i = 0; i < CENTER_CH_5G_ALL_NUM; ++i) { -+ if (center_ch_5g_all[i] == Channel) -+ channelIndex = i; -+ } -+ } else -+ RTW_PRINT("Invalid Band %d in %s\n", Band, __func__); -+ -+ if (channelIndex == -1) -+ RTW_PRINT("Invalid Channel %d of Band %d in %s\n", Channel, Band, __func__); -+ -+ return channelIndex; -+} -+ -+static s8 phy_txpwr_ww_lmt_value(_adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ -+ if (hal_spec->txgi_max == 63) -+ return -63; -+ else if (hal_spec->txgi_max == 127) -+ return -128; -+ -+ rtw_warn_on(1); -+ return -128; -+} -+ -+/* -+* return txpwr limit in unit of TX Gain Index -+* hsl_spec->txgi_max is returned when NO limit -+*/ -+s8 phy_get_txpwr_lmt( -+ PADAPTER Adapter, -+ const char *regd_name, -+ BAND_TYPE Band, -+ enum channel_width bw, -+ u8 tlrs, -+ u8 ntx_idx, -+ u8 cch, -+ u8 lock -+) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(Adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(Adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); -+ struct txpwr_lmt_ent *ent = NULL; -+ _irqL irqL; -+ _list *cur, *head; -+ s8 ch_idx; -+ u8 is_ww_regd = 0; -+ s8 ww_lmt_val = phy_txpwr_ww_lmt_value(Adapter); -+ s8 lmt = hal_spec->txgi_max; -+ -+ if ((Adapter->registrypriv.RegEnableTxPowerLimit == 2 && hal_data->EEPROMRegulatory != 1) || -+ Adapter->registrypriv.RegEnableTxPowerLimit == 0) -+ goto exit; -+ -+ if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) { -+ RTW_ERR("%s invalid band:%u\n", __func__, Band); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (Band == BAND_ON_5G && tlrs == TXPWR_LMT_RS_CCK) { -+ RTW_ERR("5G has no CCK\n"); -+ goto exit; -+ } -+ -+ if (lock) -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ if (!regd_name) /* no regd_name specified, use currnet */ -+ regd_name = rfctl->regd_name; -+ -+ if (rfctl->txpwr_regd_num == 0 -+ || strcmp(regd_name, regd_str(TXPWR_LMT_NONE)) == 0) -+ goto release_lock; -+ -+ if (strcmp(regd_name, regd_str(TXPWR_LMT_WW)) == 0) -+ is_ww_regd = 1; -+ -+ if (!is_ww_regd) { -+ ent = _rtw_txpwr_lmt_get_by_name(rfctl, regd_name); -+ if (!ent) -+ goto release_lock; -+ } -+ -+ ch_idx = phy_GetChannelIndexOfTxPowerLimit(Band, cch); -+ if (ch_idx == -1) -+ goto release_lock; -+ -+ if (Band == BAND_ON_2_4G) { -+ if (!is_ww_regd) { -+ lmt = ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx]; -+ if (lmt != ww_lmt_val) -+ goto release_lock; -+ } -+ -+ /* search for min value for WW regd or WW limit */ -+ lmt = hal_spec->txgi_max; -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ if (ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx] != ww_lmt_val) -+ lmt = rtw_min(lmt, ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx]); -+ } -+ } -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ else if (Band == BAND_ON_5G) { -+ if (!is_ww_regd) { -+ lmt = ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx]; -+ if (lmt != ww_lmt_val) -+ goto release_lock; -+ } -+ -+ /* search for min value for WW regd or WW limit */ -+ lmt = hal_spec->txgi_max; -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ if (ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx] != ww_lmt_val) -+ lmt = rtw_min(lmt, ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx]); -+ } -+ } -+ #endif -+ -+release_lock: -+ if (lock) -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+exit: -+ return lmt; -+} -+ -+/* -+* return txpwr limit diff value to target of its rate section in unit of TX Gain Index -+* hal_spec->txgi_max is returned when NO limit -+*/ -+inline s8 phy_get_txpwr_lmt_diff(_adapter *adapter -+ , const char *regd_name -+ , BAND_TYPE band, enum channel_width bw -+ , u8 rfpath, u8 rs, u8 tlrs, u8 ntx_idx, u8 cch, u8 lock -+) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ s8 lmt = phy_get_txpwr_lmt(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock); -+ -+ if (lmt != hal_spec->txgi_max) { -+ /* return diff value */ -+ lmt = lmt - phy_get_target_txpwr(adapter, band, rfpath, rs); -+ } -+ -+ return lmt; -+} -+ -+/* -+* May search for secondary channels for max/min limit -+* @opch: used to specify operating channel position to get -+* cch of every bandwidths which differ from current hal_data.cch20, 40, 80... -+* -+* return txpwr limit in unit of TX Gain Index -+* hsl_spec->txgi_max is returned when NO limit -+*/ -+s8 phy_get_txpwr_lmt_sub_chs(_adapter *adapter -+ , const char *regd_name -+ , BAND_TYPE band, enum channel_width bw -+ , u8 rfpath, u8 rate, u8 ntx_idx, u8 cch, u8 opch, bool reg_max) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ BOOLEAN no_sc = _FALSE; -+ u8 cch_20 = hal_data->cch_20, cch_40 = hal_data->cch_40, cch_80 = hal_data->cch_80; -+ s8 tlrs = -1; -+ s8 lmt = hal_spec->txgi_max; -+ u8 tmp_cch = 0; -+ u8 tmp_bw; -+ u8 bw_bmp = 0; -+ s8 final_lmt = reg_max ? 0 : hal_spec->txgi_max; -+ u8 final_bw = CHANNEL_WIDTH_MAX, final_cch = cch; -+ _irqL irqL; -+ -+ if ((adapter->registrypriv.RegEnableTxPowerLimit == 2 && hal_data->EEPROMRegulatory != 1) || -+ adapter->registrypriv.RegEnableTxPowerLimit == 0 -+ ) { -+ final_lmt = hal_spec->txgi_max; -+ goto exit; -+ } -+ -+#ifdef CONFIG_MP_INCLUDED -+ /* MP mode channel don't use secondary channel */ -+ if (rtw_mp_mode_check(adapter) == _TRUE) -+ no_sc = _TRUE; -+#endif -+ if (IS_CCK_RATE(rate)) -+ tlrs = TXPWR_LMT_RS_CCK; -+ else if (IS_OFDM_RATE(rate)) -+ tlrs = TXPWR_LMT_RS_OFDM; -+ else if (IS_HT_RATE(rate)) -+ tlrs = TXPWR_LMT_RS_HT; -+ else if (IS_VHT_RATE(rate)) -+ tlrs = TXPWR_LMT_RS_VHT; -+ else { -+ RTW_ERR("%s invalid rate 0x%x\n", __func__, rate); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (no_sc == _TRUE) { -+ /* use the input center channel and bandwidth directly */ -+ tmp_cch = cch; -+ bw_bmp = ch_width_to_bw_cap(bw); -+ } else { -+ /* decide center channel of each bandwidth */ -+ if (opch != 0) { -+ cch_80 = bw == CHANNEL_WIDTH_80 ? cch : 0; -+ cch_40 = bw == CHANNEL_WIDTH_40 ? cch : 0; -+ cch_20 = bw == CHANNEL_WIDTH_20 ? cch : 0; -+ if (cch_80 != 0) -+ cch_40 = rtw_get_scch_by_cch_opch(cch_80, CHANNEL_WIDTH_80, opch); -+ if (cch_40 != 0) -+ cch_20 = rtw_get_scch_by_cch_opch(cch_40, CHANNEL_WIDTH_40, opch); -+ } -+ -+ /* -+ * reg_max: -+ * get valid full bandwidth bmp up to @bw -+ * -+ * !reg_max: -+ * find the possible tx bandwidth bmp for this rate -+ * if no possible tx bandwidth bmp, select valid bandwidth bmp up to @bw -+ */ -+ if (tlrs == TXPWR_LMT_RS_CCK || tlrs == TXPWR_LMT_RS_OFDM) -+ bw_bmp = BW_CAP_20M; /* CCK, OFDM only BW 20M */ -+ else if (tlrs == TXPWR_LMT_RS_HT) { -+ if (reg_max) -+ bw_bmp = ch_width_to_bw_cap(bw > CHANNEL_WIDTH_40 ? CHANNEL_WIDTH_40 + 1 : bw + 1) - 1; -+ else { -+ bw_bmp = rtw_get_tx_bw_bmp_of_ht_rate(dvobj, rate, bw); -+ if (bw_bmp == 0) -+ bw_bmp = ch_width_to_bw_cap(bw > CHANNEL_WIDTH_40 ? CHANNEL_WIDTH_40 : bw); -+ } -+ } else if (tlrs == TXPWR_LMT_RS_VHT) { -+ if (reg_max) -+ bw_bmp = ch_width_to_bw_cap(bw > CHANNEL_WIDTH_160 ? CHANNEL_WIDTH_160 + 1 : bw + 1) - 1; -+ else { -+ bw_bmp = rtw_get_tx_bw_bmp_of_vht_rate(dvobj, rate, bw); -+ if (bw_bmp == 0) -+ bw_bmp = ch_width_to_bw_cap(bw > CHANNEL_WIDTH_160 ? CHANNEL_WIDTH_160 : bw); -+ } -+ } else -+ rtw_warn_on(1); -+ } -+ -+ if (bw_bmp == 0) -+ goto exit; -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ /* loop for each possible tx bandwidth to find final limit */ -+ for (tmp_bw = CHANNEL_WIDTH_20; tmp_bw <= bw; tmp_bw++) { -+ if (!(ch_width_to_bw_cap(tmp_bw) & bw_bmp)) -+ continue; -+ -+ if (no_sc == _FALSE) { -+ /* get center channel for each bandwidth */ -+ if (tmp_bw == CHANNEL_WIDTH_20) -+ tmp_cch = cch_20; -+ else if (tmp_bw == CHANNEL_WIDTH_40) -+ tmp_cch = cch_40; -+ else if (tmp_bw == CHANNEL_WIDTH_80) -+ tmp_cch = cch_80; -+ else { -+ tmp_cch = 0; -+ rtw_warn_on(1); -+ } -+ } -+ -+ lmt = phy_get_txpwr_lmt(adapter, regd_name, band, tmp_bw, tlrs, ntx_idx, tmp_cch, 0); -+ -+ if (final_lmt > lmt) { -+ if (reg_max) -+ continue; -+ } else if (final_lmt < lmt) { -+ if (!reg_max) -+ continue; -+ } else { /* equal */ -+ if (final_bw == bw) -+ continue; -+ } -+ -+ final_lmt = lmt; -+ final_cch = tmp_cch; -+ final_bw = tmp_bw; -+ } -+ -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+ if (0) { -+ if (final_bw != bw && (IS_HT_RATE(rate) || IS_VHT_RATE(rate))) -+ RTW_INFO("%s final_lmt: %s ch%u -> %s ch%u\n" -+ , MGN_RATE_STR(rate) -+ , ch_width_str(bw), cch -+ , ch_width_str(final_bw), final_cch); -+ } -+ -+exit: -+ return final_lmt; -+} -+ -+static void phy_txpwr_lmt_cck_ofdm_mt_chk(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ struct txpwr_lmt_ent *ent; -+ _list *cur, *head; -+ u8 channel, tlrs, ntx_idx; -+ -+ rfctl->txpwr_lmt_2g_cck_ofdm_state = 0; -+#if CONFIG_IEEE80211_BAND_5GHZ -+ rfctl->txpwr_lmt_5g_cck_ofdm_state = 0; -+#endif -+ -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ -+ /* check 2G CCK, OFDM state*/ -+ for (tlrs = TXPWR_LMT_RS_CCK; tlrs <= TXPWR_LMT_RS_OFDM; tlrs++) { -+ for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { -+ for (channel = 0; channel < CENTER_CH_2G_NUM; ++channel) { -+ if (ent->lmt_2g[CHANNEL_WIDTH_20][tlrs][channel][ntx_idx] != hal_spec->txgi_max) { -+ if (tlrs == TXPWR_LMT_RS_CCK) -+ rfctl->txpwr_lmt_2g_cck_ofdm_state |= TXPWR_LMT_HAS_CCK_1T << ntx_idx; -+ else -+ rfctl->txpwr_lmt_2g_cck_ofdm_state |= TXPWR_LMT_HAS_OFDM_1T << ntx_idx; -+ break; -+ } -+ } -+ } -+ } -+ -+ /* if 2G OFDM multi-TX is not defined, reference HT20 */ -+ for (channel = 0; channel < CENTER_CH_2G_NUM; ++channel) { -+ for (ntx_idx = RF_2TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { -+ if (rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)) -+ continue; -+ ent->lmt_2g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_OFDM][channel][ntx_idx] = -+ ent->lmt_2g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_HT][channel][ntx_idx]; -+ } -+ } -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ /* check 5G OFDM state*/ -+ for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { -+ for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) { -+ if (ent->lmt_5g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_OFDM - 1][channel][ntx_idx] != hal_spec->txgi_max) { -+ rfctl->txpwr_lmt_5g_cck_ofdm_state |= TXPWR_LMT_HAS_OFDM_1T << ntx_idx; -+ break; -+ } -+ } -+ } -+ -+ for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) { -+ for (ntx_idx = RF_2TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { -+ if (rfctl->txpwr_lmt_5g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)) -+ continue; -+ /* if 5G OFDM multi-TX is not defined, reference HT20 */ -+ ent->lmt_5g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_OFDM - 1][channel][ntx_idx] = -+ ent->lmt_5g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_HT - 1][channel][ntx_idx]; -+ } -+ } -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+ } -+} -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+static void phy_txpwr_lmt_cross_ref_ht_vht(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ struct txpwr_lmt_ent *ent; -+ _list *cur, *head; -+ u8 bw, channel, tlrs, ref_tlrs, ntx_idx; -+ int ht_ref_vht_5g_20_40 = 0; -+ int vht_ref_ht_5g_20_40 = 0; -+ int ht_has_ref_5g_20_40 = 0; -+ int vht_has_ref_5g_20_40 = 0; -+ -+ rfctl->txpwr_lmt_5g_20_40_ref = 0; -+ -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ -+ for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; ++bw) { -+ -+ for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) { -+ -+ for (tlrs = TXPWR_LMT_RS_HT; tlrs < TXPWR_LMT_RS_NUM; ++tlrs) { -+ -+ /* 5G 20M 40M VHT and HT can cross reference */ -+ if (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40) { -+ if (tlrs == TXPWR_LMT_RS_HT) -+ ref_tlrs = TXPWR_LMT_RS_VHT; -+ else if (tlrs == TXPWR_LMT_RS_VHT) -+ ref_tlrs = TXPWR_LMT_RS_HT; -+ else -+ continue; -+ -+ for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { -+ -+ if (ent->lmt_5g[bw][ref_tlrs - 1][channel][ntx_idx] == hal_spec->txgi_max) -+ continue; -+ -+ if (tlrs == TXPWR_LMT_RS_HT) -+ ht_has_ref_5g_20_40++; -+ else if (tlrs == TXPWR_LMT_RS_VHT) -+ vht_has_ref_5g_20_40++; -+ else -+ continue; -+ -+ if (ent->lmt_5g[bw][tlrs - 1][channel][ntx_idx] != hal_spec->txgi_max) -+ continue; -+ -+ if (tlrs == TXPWR_LMT_RS_HT && ref_tlrs == TXPWR_LMT_RS_VHT) -+ ht_ref_vht_5g_20_40++; -+ else if (tlrs == TXPWR_LMT_RS_VHT && ref_tlrs == TXPWR_LMT_RS_HT) -+ vht_ref_ht_5g_20_40++; -+ -+ if (0) -+ RTW_INFO("reg:%s, bw:%u, ch:%u, %s-%uT ref %s-%uT\n" -+ , ent->regd_name, bw, channel -+ , txpwr_lmt_rs_str(tlrs), ntx_idx + 1 -+ , txpwr_lmt_rs_str(ref_tlrs), ntx_idx + 1); -+ -+ ent->lmt_5g[bw][tlrs - 1][channel][ntx_idx] = -+ ent->lmt_5g[bw][ref_tlrs - 1][channel][ntx_idx]; -+ } -+ } -+ -+ } -+ } -+ } -+ } -+ -+ if (0) { -+ RTW_INFO("ht_ref_vht_5g_20_40:%d, ht_has_ref_5g_20_40:%d\n", ht_ref_vht_5g_20_40, ht_has_ref_5g_20_40); -+ RTW_INFO("vht_ref_ht_5g_20_40:%d, vht_has_ref_5g_20_40:%d\n", vht_ref_ht_5g_20_40, vht_has_ref_5g_20_40); -+ } -+ -+ /* 5G 20M&40M HT all come from VHT*/ -+ if (ht_ref_vht_5g_20_40 && ht_has_ref_5g_20_40 == ht_ref_vht_5g_20_40) -+ rfctl->txpwr_lmt_5g_20_40_ref |= TXPWR_LMT_REF_HT_FROM_VHT; -+ -+ /* 5G 20M&40M VHT all come from HT*/ -+ if (vht_ref_ht_5g_20_40 && vht_has_ref_5g_20_40 == vht_ref_ht_5g_20_40) -+ rfctl->txpwr_lmt_5g_20_40_ref |= TXPWR_LMT_REF_VHT_FROM_HT; -+} -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+ -+#ifndef DBG_TXPWR_LMT_BAND_CHK -+#define DBG_TXPWR_LMT_BAND_CHK 0 -+#endif -+ -+#if DBG_TXPWR_LMT_BAND_CHK -+/* check if larger bandwidth limit is less than smaller bandwidth for HT & VHT rate */ -+void phy_txpwr_limit_bandwidth_chk(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 band, bw, path, tlrs, ntx_idx, cch, offset, scch; -+ u8 ch_num, n, i; -+ -+ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { -+ if (!hal_is_band_support(adapter, band)) -+ continue; -+ -+ for (bw = CHANNEL_WIDTH_40; bw <= CHANNEL_WIDTH_80; bw++) { -+ if (bw >= CHANNEL_WIDTH_160) -+ continue; -+ if (band == BAND_ON_2_4G && bw >= CHANNEL_WIDTH_80) -+ continue; -+ -+ if (band == BAND_ON_2_4G) -+ ch_num = center_chs_2g_num(bw); -+ else -+ ch_num = center_chs_5g_num(bw); -+ -+ if (ch_num == 0) { -+ rtw_warn_on(1); -+ break; -+ } -+ -+ for (tlrs = TXPWR_LMT_RS_HT; tlrs < TXPWR_LMT_RS_NUM; tlrs++) { -+ -+ if (band == BAND_ON_2_4G && tlrs == TXPWR_LMT_RS_VHT) -+ continue; -+ if (band == BAND_ON_5G && tlrs == TXPWR_LMT_RS_CCK) -+ continue; -+ if (bw > CHANNEL_WIDTH_20 && (tlrs == TXPWR_LMT_RS_CCK || tlrs == TXPWR_LMT_RS_OFDM)) -+ continue; -+ if (bw > CHANNEL_WIDTH_40 && tlrs == TXPWR_LMT_RS_HT) -+ continue; -+ if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ continue; -+ -+ for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) { -+ struct txpwr_lmt_ent *ent; -+ _list *cur, *head; -+ -+ if (ntx_idx + 1 > hal_data->max_tx_cnt) -+ continue; -+ -+ /* bypass CCK multi-TX is not defined */ -+ if (tlrs == TXPWR_LMT_RS_CCK && ntx_idx > RF_1TX) { -+ if (band == BAND_ON_2_4G -+ && !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_CCK_1T << ntx_idx))) -+ continue; -+ } -+ -+ /* bypass OFDM multi-TX is not defined */ -+ if (tlrs == TXPWR_LMT_RS_OFDM && ntx_idx > RF_1TX) { -+ if (band == BAND_ON_2_4G -+ && !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx))) -+ continue; -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ if (band == BAND_ON_5G -+ && !(rfctl->txpwr_lmt_5g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx))) -+ continue; -+ #endif -+ } -+ -+ /* bypass 5G 20M, 40M pure reference */ -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ if (band == BAND_ON_5G && (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)) { -+ if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_HT_FROM_VHT) { -+ if (tlrs == TXPWR_LMT_RS_HT) -+ continue; -+ } else if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_VHT_FROM_HT) { -+ if (tlrs == TXPWR_LMT_RS_VHT && bw <= CHANNEL_WIDTH_40) -+ continue; -+ } -+ } -+ #endif -+ -+ for (n = 0; n < ch_num; n++) { -+ u8 cch_by_bw[3]; -+ u8 offset_by_bw; /* bitmap, 0 for lower, 1 for upper */ -+ u8 bw_pos; -+ s8 lmt[3]; -+ -+ if (band == BAND_ON_2_4G) -+ cch = center_chs_2g(bw, n); -+ else -+ cch = center_chs_5g(bw, n); -+ -+ if (cch == 0) { -+ rtw_warn_on(1); -+ break; -+ } -+ -+ _rtw_memset(cch_by_bw, 0, 3); -+ cch_by_bw[bw] = cch; -+ offset_by_bw = 0x01; -+ -+ do { -+ for (bw_pos = bw; bw_pos >= CHANNEL_WIDTH_40; bw_pos--) -+ cch_by_bw[bw_pos - 1] = rtw_get_scch_by_cch_offset(cch_by_bw[bw_pos], bw_pos, offset_by_bw & BIT(bw_pos) ? HAL_PRIME_CHNL_OFFSET_UPPER : HAL_PRIME_CHNL_OFFSET_LOWER); -+ -+ head = &rfctl->txpwr_lmt_list; -+ cur = get_next(head); -+ while ((rtw_end_of_queue_search(head, cur)) == _FALSE) { -+ ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list); -+ cur = get_next(cur); -+ -+ for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) -+ lmt[bw_pos] = phy_get_txpwr_lmt(adapter, ent->regd_name, band, bw_pos, tlrs, ntx_idx, cch_by_bw[bw_pos], 0); -+ -+ for (bw_pos = bw; bw_pos > CHANNEL_WIDTH_20; bw_pos--) -+ if (lmt[bw_pos] > lmt[bw_pos - 1]) -+ break; -+ if (bw_pos == CHANNEL_WIDTH_20) -+ continue; -+ -+ RTW_PRINT_SEL(RTW_DBGDUMP, "[%s][%s][%s][%uT][%-4s] cch:" -+ , band_str(band) -+ , ch_width_str(bw) -+ , txpwr_lmt_rs_str(tlrs) -+ , ntx_idx + 1 -+ , ent->regd_name -+ ); -+ for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "%03u ", cch_by_bw[bw_pos]); -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "limit:"); -+ for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) { -+ if (lmt[bw_pos] == hal_spec->txgi_max) -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "N/A "); -+ else if (lmt[bw_pos] > -hal_spec->txgi_pdbm && lmt[bw_pos] < 0) /* -1 < value < 0 */ -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "-0.%d", (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); -+ else if (lmt[bw_pos] % hal_spec->txgi_pdbm) -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "%2d.%d ", lmt[bw_pos] / hal_spec->txgi_pdbm, (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); -+ else -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "%2d ", lmt[bw_pos] / hal_spec->txgi_pdbm); -+ } -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "\n"); -+ } -+ for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) -+ lmt[bw_pos] = phy_get_txpwr_lmt(adapter, regd_str(TXPWR_LMT_WW), band, bw_pos, tlrs, ntx_idx, cch_by_bw[bw_pos], 0); -+ -+ for (bw_pos = bw; bw_pos > CHANNEL_WIDTH_20; bw_pos--) -+ if (lmt[bw_pos] > lmt[bw_pos - 1]) -+ break; -+ if (bw_pos != CHANNEL_WIDTH_20) { -+ RTW_PRINT_SEL(RTW_DBGDUMP, "[%s][%s][%s][%uT][%-4s] cch:" -+ , band_str(band) -+ , ch_width_str(bw) -+ , txpwr_lmt_rs_str(tlrs) -+ , ntx_idx + 1 -+ , regd_str(TXPWR_LMT_WW) -+ ); -+ for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "%03u ", cch_by_bw[bw_pos]); -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "limit:"); -+ for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) { -+ if (lmt[bw_pos] == hal_spec->txgi_max) -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "N/A "); -+ else if (lmt[bw_pos] > -hal_spec->txgi_pdbm && lmt[bw_pos] < 0) /* -1 < value < 0 */ -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "-0.%d", (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); -+ else if (lmt[bw_pos] % hal_spec->txgi_pdbm) -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "%2d.%d ", lmt[bw_pos] / hal_spec->txgi_pdbm, (rtw_abs(lmt[bw_pos]) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); -+ else -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "%2d ", lmt[bw_pos] / hal_spec->txgi_pdbm); -+ } -+ _RTW_PRINT_SEL(RTW_DBGDUMP, "\n"); -+ } -+ -+ offset_by_bw += 2; -+ if (offset_by_bw & BIT(bw + 1)) -+ break; -+ } while (1); /* loop for all ch combinations */ -+ } /* loop for center channels */ -+ } /* loop fo each ntx_idx */ -+ } /* loop for tlrs */ -+ } /* loop for bandwidth */ -+ } /* loop for band */ -+} -+#endif /* DBG_TXPWR_LMT_BAND_CHK */ -+ -+static void phy_txpwr_lmt_post_hdl(_adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ _irqL irqL; -+ -+ _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ if (IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ phy_txpwr_lmt_cross_ref_ht_vht(adapter); -+#endif -+ phy_txpwr_lmt_cck_ofdm_mt_chk(adapter); -+ -+#if DBG_TXPWR_LMT_BAND_CHK -+ phy_txpwr_limit_bandwidth_chk(adapter); -+#endif -+ -+ _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL); -+} -+ -+BOOLEAN -+GetS1ByteIntegerFromStringInDecimal( -+ char *str, -+ s8 *val -+) -+{ -+ u8 negative = 0; -+ u16 i = 0; -+ -+ *val = 0; -+ -+ while (str[i] != '\0') { -+ if (i == 0 && (str[i] == '+' || str[i] == '-')) { -+ if (str[i] == '-') -+ negative = 1; -+ } else if (str[i] >= '0' && str[i] <= '9') { -+ *val *= 10; -+ *val += (str[i] - '0'); -+ } else -+ return _FALSE; -+ ++i; -+ } -+ -+ if (negative) -+ *val = -*val; -+ -+ return _TRUE; -+} -+#endif /* CONFIG_TXPWR_LIMIT */ -+ -+/* -+* phy_set_tx_power_limit - Parsing TX power limit from phydm array, called by odm_ConfigBB_TXPWR_LMT_XXX in phydm -+*/ -+void -+phy_set_tx_power_limit( -+ struct dm_struct *pDM_Odm, -+ u8 *Regulation, -+ u8 *Band, -+ u8 *Bandwidth, -+ u8 *RateSection, -+ u8 *ntx, -+ u8 *Channel, -+ u8 *PowerLimit -+) -+{ -+#if CONFIG_TXPWR_LIMIT -+ PADAPTER Adapter = pDM_Odm->adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); -+ u8 band = 0, bandwidth = 0, tlrs = 0, channel; -+ u8 ntx_idx; -+ s8 powerLimit = 0, prevPowerLimit, channelIndex; -+ s8 ww_lmt_val = phy_txpwr_ww_lmt_value(Adapter); -+ -+ if (0) -+ RTW_INFO("Index of power limit table [regulation %s][band %s][bw %s][rate section %s][ntx %s][chnl %s][val %s]\n" -+ , Regulation, Band, Bandwidth, RateSection, ntx, Channel, PowerLimit); -+ -+ if (GetU1ByteIntegerFromStringInDecimal((char *)Channel, &channel) == _FALSE -+ || GetS1ByteIntegerFromStringInDecimal((char *)PowerLimit, &powerLimit) == _FALSE -+ ) { -+ RTW_PRINT("Illegal index of power limit table [ch %s][val %s]\n", Channel, PowerLimit); -+ return; -+ } -+ -+ if (powerLimit != ww_lmt_val) { -+ if (powerLimit < -hal_spec->txgi_max || powerLimit > hal_spec->txgi_max) -+ RTW_PRINT("Illegal power limit value [ch %s][val %s]\n", Channel, PowerLimit); -+ -+ if (powerLimit > hal_spec->txgi_max) -+ powerLimit = hal_spec->txgi_max; -+ else if (powerLimit < -hal_spec->txgi_max) -+ powerLimit = ww_lmt_val + 1; -+ } -+ -+ if (strncmp(RateSection, "CCK", 3) == 0) -+ tlrs = TXPWR_LMT_RS_CCK; -+ else if (strncmp(RateSection, "OFDM", 4) == 0) -+ tlrs = TXPWR_LMT_RS_OFDM; -+ else if (strncmp(RateSection, "HT", 2) == 0) -+ tlrs = TXPWR_LMT_RS_HT; -+ else if (strncmp(RateSection, "VHT", 3) == 0) -+ tlrs = TXPWR_LMT_RS_VHT; -+ else { -+ RTW_PRINT("Wrong rate section:%s\n", RateSection); -+ return; -+ } -+ -+ if (strncmp(ntx, "1T", 2) == 0) -+ ntx_idx = RF_1TX; -+ else if (strncmp(ntx, "2T", 2) == 0) -+ ntx_idx = RF_2TX; -+ else if (strncmp(ntx, "3T", 2) == 0) -+ ntx_idx = RF_3TX; -+ else if (strncmp(ntx, "4T", 2) == 0) -+ ntx_idx = RF_4TX; -+ else { -+ RTW_PRINT("Wrong tx num:%s\n", ntx); -+ return; -+ } -+ -+ if (strncmp(Bandwidth, "20M", 3) == 0) -+ bandwidth = CHANNEL_WIDTH_20; -+ else if (strncmp(Bandwidth, "40M", 3) == 0) -+ bandwidth = CHANNEL_WIDTH_40; -+ else if (strncmp(Bandwidth, "80M", 3) == 0) -+ bandwidth = CHANNEL_WIDTH_80; -+ else if (strncmp(Bandwidth, "160M", 4) == 0) -+ bandwidth = CHANNEL_WIDTH_160; -+ else { -+ RTW_PRINT("unknown bandwidth: %s\n", Bandwidth); -+ return; -+ } -+ -+ if (strncmp(Band, "2.4G", 4) == 0) { -+ band = BAND_ON_2_4G; -+ channelIndex = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_2_4G, channel); -+ -+ if (channelIndex == -1) { -+ RTW_PRINT("unsupported channel: %d at 2.4G\n", channel); -+ return; -+ } -+ -+ if (bandwidth >= MAX_2_4G_BANDWIDTH_NUM) { -+ RTW_PRINT("unsupported bandwidth: %s at 2.4G\n", Bandwidth); -+ return; -+ } -+ -+ rtw_txpwr_lmt_add(adapter_to_rfctl(Adapter), Regulation, band, bandwidth, tlrs, ntx_idx, channelIndex, powerLimit); -+ } -+#if CONFIG_IEEE80211_BAND_5GHZ -+ else if (strncmp(Band, "5G", 2) == 0) { -+ band = BAND_ON_5G; -+ channelIndex = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_5G, channel); -+ -+ if (channelIndex == -1) { -+ RTW_PRINT("unsupported channel: %d at 5G\n", channel); -+ return; -+ } -+ -+ rtw_txpwr_lmt_add(adapter_to_rfctl(Adapter), Regulation, band, bandwidth, tlrs, ntx_idx, channelIndex, powerLimit); -+ } -+#endif -+ else { -+ RTW_PRINT("unknown/unsupported band:%s\n", Band); -+ return; -+ } -+#endif -+} -+ -+void -+phy_set_tx_power_limit_ex( -+ struct dm_struct *pDM_Odm, -+ u8 Regulation, -+ u8 Band, -+ u8 Bandwidth, -+ u8 RateSection, -+ u8 ntx, -+ u8 channel, -+ s8 powerLimit -+) -+{ -+#if CONFIG_TXPWR_LIMIT -+ PADAPTER Adapter = pDM_Odm->adapter; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); -+ u8 regd; -+ u8 band = 0, bandwidth = 0, tlrs = 0; -+ u8 ntx_idx; -+ s8 prevPowerLimit, channelIndex; -+ s8 ww_lmt_val = phy_txpwr_ww_lmt_value(Adapter); -+ -+ if (0) -+ RTW_INFO("Index of power limit table [regulation %d][band %d][bw %d][rate section %d][ntx %d][chnl %d][val %d]\n" -+ , Regulation, Band, Bandwidth, RateSection, ntx, channel, powerLimit); -+ -+ if (powerLimit != ww_lmt_val) { -+ if (powerLimit < -hal_spec->txgi_max || powerLimit > hal_spec->txgi_max) -+ RTW_PRINT("Illegal power limit value [ch %d][val %d]\n", channel, powerLimit); -+ -+ if (powerLimit > hal_spec->txgi_max) -+ powerLimit = hal_spec->txgi_max; -+ else if (powerLimit < -hal_spec->txgi_max) -+ powerLimit = ww_lmt_val + 1; -+ } -+ -+ switch (Regulation) { -+ case PW_LMT_REGU_FCC: -+ regd = TXPWR_LMT_FCC; -+ break; -+ case PW_LMT_REGU_ETSI: -+ regd = TXPWR_LMT_ETSI; -+ break; -+ case PW_LMT_REGU_MKK: -+ regd = TXPWR_LMT_MKK; -+ break; -+ case PW_LMT_REGU_IC: -+ regd = TXPWR_LMT_IC; -+ break; -+ case PW_LMT_REGU_KCC: -+ regd = TXPWR_LMT_KCC; -+ break; -+ case PW_LMT_REGU_ACMA: -+ regd = TXPWR_LMT_ACMA; -+ break; -+ case PW_LMT_REGU_CHILE: -+ regd = TXPWR_LMT_CHILE; -+ break; -+ case PW_LMT_REGU_UKRAINE: -+ regd = TXPWR_LMT_UKRAINE; -+ break; -+ case PW_LMT_REGU_MEXICO: -+ regd = TXPWR_LMT_MEXICO; -+ break; -+ case PW_LMT_REGU_CN: -+ regd = TXPWR_LMT_CN; -+ break; -+ case PW_LMT_REGU_WW13: -+ default: -+ RTW_PRINT("Wrong regulation:%d\n", Regulation); -+ return; -+ } -+ -+ switch (RateSection) { -+ case PW_LMT_RS_CCK: -+ tlrs = TXPWR_LMT_RS_CCK; -+ break; -+ case PW_LMT_RS_OFDM: -+ tlrs = TXPWR_LMT_RS_OFDM; -+ break; -+ case PW_LMT_RS_HT: -+ tlrs = TXPWR_LMT_RS_HT; -+ break; -+ case PW_LMT_RS_VHT: -+ tlrs = TXPWR_LMT_RS_VHT; -+ break; -+ default: -+ RTW_PRINT("Wrong rate section:%d\n", RateSection); -+ return; -+ } -+ -+ switch (ntx) { -+ case PW_LMT_PH_1T: -+ ntx_idx = RF_1TX; -+ break; -+ case PW_LMT_PH_2T: -+ ntx_idx = RF_2TX; -+ break; -+ case PW_LMT_PH_3T: -+ ntx_idx = RF_3TX; -+ break; -+ case PW_LMT_PH_4T: -+ ntx_idx = RF_4TX; -+ break; -+ default: -+ RTW_PRINT("Wrong tx num:%d\n", ntx); -+ return; -+ } -+ -+ switch (Bandwidth) { -+ case PW_LMT_BW_20M: -+ bandwidth = CHANNEL_WIDTH_20; -+ break; -+ case PW_LMT_BW_40M: -+ bandwidth = CHANNEL_WIDTH_40; -+ break; -+ case PW_LMT_BW_80M: -+ bandwidth = CHANNEL_WIDTH_80; -+ break; -+ case PW_LMT_BW_160M: -+ bandwidth = CHANNEL_WIDTH_160; -+ break; -+ default: -+ RTW_PRINT("unknown bandwidth: %d\n", Bandwidth); -+ return; -+ } -+ -+ if (Band == PW_LMT_BAND_2_4G) { -+ band = BAND_ON_2_4G; -+ channelIndex = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_2_4G, channel); -+ -+ if (channelIndex == -1) { -+ RTW_PRINT("unsupported channel: %d at 2.4G\n", channel); -+ return; -+ } -+ -+ if (bandwidth >= MAX_2_4G_BANDWIDTH_NUM) { -+ RTW_PRINT("unsupported bandwidth: %s at 2.4G\n", ch_width_str(bandwidth)); -+ return; -+ } -+ -+ rtw_txpwr_lmt_add(adapter_to_rfctl(Adapter), regd_str(regd), band, bandwidth, tlrs, ntx_idx, channelIndex, powerLimit); -+ } -+#if CONFIG_IEEE80211_BAND_5GHZ -+ else if (Band == PW_LMT_BAND_5G) { -+ band = BAND_ON_5G; -+ channelIndex = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_5G, channel); -+ -+ if (channelIndex == -1) { -+ RTW_PRINT("unsupported channel: %d at 5G\n", channel); -+ return; -+ } -+ -+ rtw_txpwr_lmt_add(adapter_to_rfctl(Adapter), regd_str(regd), band, bandwidth, tlrs, ntx_idx, channelIndex, powerLimit); -+ } -+#endif -+ else { -+ RTW_PRINT("unknown/unsupported band:%d\n", Band); -+ return; -+ } -+#endif -+} -+ -+u8 phy_get_tx_power_index_ex(_adapter *adapter -+ , enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate -+ , enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch) -+{ -+ return rtw_hal_get_tx_power_index(adapter, rfpath, rs, rate, bw, band, cch, opch, NULL); -+} -+ -+u8 phy_get_tx_power_index( -+ PADAPTER pAdapter, -+ enum rf_path RFPath, -+ u8 Rate, -+ enum channel_width BandWidth, -+ u8 Channel -+) -+{ -+ RATE_SECTION rs = mgn_rate_to_rs(Rate); -+ BAND_TYPE band = Channel <= 14 ? BAND_ON_2_4G : BAND_ON_5G; -+ -+ return rtw_hal_get_tx_power_index(pAdapter, RFPath, rs, Rate, BandWidth, band, Channel, 0, NULL); -+} -+ -+void -+PHY_SetTxPowerIndex( -+ PADAPTER pAdapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+) -+{ -+ rtw_hal_set_tx_power_index(pAdapter, PowerIndex, RFPath, Rate); -+} -+ -+void dump_tx_power_index_inline(void *sel, _adapter *adapter, u8 rfpath, enum channel_width bw, u8 cch, enum MGN_RATE rate, u8 pwr_idx, struct txpwr_idx_comp *tic) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ -+ if (tic->utarget == hal_spec->txgi_max) { -+ RTW_PRINT_SEL(sel, "TXPWR: [%c][%s]cch:%u, %s %uT, idx:%u(0x%02x) = base(%d) + min((byr(%d) + btc(%d) + extra(%d)), rlmt(%d), lmt(%d), ulmt(%d)) + tpc(%d) + tpt(%d) + dpd(%d)\n" -+ , rf_path_char(rfpath), ch_width_str(bw), cch -+ , MGN_RATE_STR(rate), tic->ntx_idx + 1 -+ , pwr_idx, pwr_idx, tic->base -+ , tic->by_rate, tic->btc, tic->extra, tic->rlimit, tic->limit, tic->ulimit -+ , tic->tpc -+ , tic->tpt, tic->dpd); -+ } else { -+ RTW_PRINT_SEL(sel, "TXPWR: [%c][%s]cch:%u, %s %uT, idx:%u(0x%02x) = base(%d) + min(utgt(%d), rlmt(%d), lmt(%d), ulmt(%d)) + tpc(%d) + tpt(%d) + dpd(%d)\n" -+ , rf_path_char(rfpath), ch_width_str(bw), cch -+ , MGN_RATE_STR(rate), tic->ntx_idx + 1 -+ , pwr_idx, pwr_idx, tic->base -+ , tic->utarget, tic->rlimit, tic->limit, tic->ulimit -+ , tic->tpc -+ , tic->tpt, tic->dpd); -+ } -+} -+ -+#ifdef CONFIG_PROC_DEBUG -+void dump_tx_power_idx_value(void *sel, _adapter *adapter, u8 rfpath, enum MGN_RATE rate, u8 pwr_idx, struct txpwr_idx_comp *tic) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ char tmp_str[8]; -+ -+ txpwr_idx_get_dbm_str(tic->target, hal_spec->txgi_max, hal_spec->txgi_pdbm, 0, tmp_str, 8); -+ -+ if (tic->utarget == hal_spec->txgi_max) { -+ RTW_PRINT_SEL(sel, "%4c %9s %uT %s %3u(0x%02x)" -+ " %4d ((%4d %3d %5d) %4d %4d %4d) %3d %3d %3d\n" -+ , rf_path_char(rfpath), MGN_RATE_STR(rate), tic->ntx_idx + 1 -+ , tmp_str, pwr_idx, pwr_idx -+ , tic->base, tic->by_rate, tic->btc, tic->extra, tic->rlimit, tic->limit, tic->ulimit -+ , tic->tpc -+ , tic->tpt, tic->dpd); -+ } else { -+ RTW_PRINT_SEL(sel, "%4c %9s %uT %s %3u(0x%02x)" -+ " %4d (%4d %4d %4d %4d) %3d %3d %3d\n" -+ , rf_path_char(rfpath), MGN_RATE_STR(rate), tic->ntx_idx + 1 -+ , tmp_str, pwr_idx, pwr_idx -+ , tic->base, tic->utarget, tic->rlimit, tic->limit, tic->ulimit -+ , tic->tpc -+ , tic->tpt, tic->dpd); -+ } -+} -+ -+void dump_tx_power_idx_title(void *sel, _adapter *adapter, enum channel_width bw, u8 cch, u8 opch) -+{ -+ u8 cch_20, cch_40, cch_80; -+ -+ cch_80 = bw == CHANNEL_WIDTH_80 ? cch : 0; -+ cch_40 = bw == CHANNEL_WIDTH_40 ? cch : 0; -+ cch_20 = bw == CHANNEL_WIDTH_20 ? cch : 0; -+ if (cch_80 != 0) -+ cch_40 = rtw_get_scch_by_cch_opch(cch_80, CHANNEL_WIDTH_80, opch); -+ if (cch_40 != 0) -+ cch_20 = rtw_get_scch_by_cch_opch(cch_40, CHANNEL_WIDTH_40, opch); -+ -+ RTW_PRINT_SEL(sel, "%s", ch_width_str(bw)); -+ if (bw >= CHANNEL_WIDTH_80) -+ _RTW_PRINT_SEL(sel, ", cch80:%u", cch_80); -+ if (bw >= CHANNEL_WIDTH_40) -+ _RTW_PRINT_SEL(sel, ", cch40:%u", cch_40); -+ _RTW_PRINT_SEL(sel, ", cch20:%u\n", cch_20); -+ -+ if (!phy_is_txpwr_user_target_specified(adapter)) { -+ RTW_PRINT_SEL(sel, "%-4s %-9s %2s %-6s %-3s%6s" -+ " = %-4s + min((%-4s + %-3s + %-5s), %-4s, %-4s, %-4s) + %-3s + %-3s + %-3s\n" -+ , "path", "rate", "", "dBm", "idx", "" -+ , "base", "byr", "btc", "extra", "rlmt", "lmt", "ulmt" -+ , "tpc" -+ , "tpt", "dpd"); -+ } else { -+ RTW_PRINT_SEL(sel, "%-4s %-9s %2s %-6s %-3s%6s" -+ " = %-4s + min(%-4s, %-4s, %-4s, %-4s) + %-3s + %-3s + %-3s\n" -+ , "path", "rate", "", "dBm", "idx", "" -+ , "base", "utgt", "rlmt", "lmt", "ulmt" -+ , "tpc" -+ , "tpt", "dpd"); -+ } -+} -+ -+void dump_tx_power_idx_by_path_rs(void *sel, _adapter *adapter, u8 rfpath -+ , RATE_SECTION rs, enum channel_width bw, u8 cch, u8 opch) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 power_idx; -+ struct txpwr_idx_comp tic; -+ u8 tx_num, i; -+ u8 band = cch > 14 ? BAND_ON_5G : BAND_ON_2_4G; -+ -+ if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, rfpath)) -+ return; -+ -+ if (rs >= RATE_SECTION_NUM) -+ return; -+ -+ tx_num = rate_section_to_tx_num(rs); -+ if (tx_num + 1 > hal_data->tx_nss) -+ return; -+ -+ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) -+ return; -+ -+ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ return; -+ -+ for (i = 0; i < rates_by_sections[rs].rate_num; i++) { -+ power_idx = rtw_hal_get_tx_power_index(adapter, rfpath, rs, rates_by_sections[rs].rates[i], bw, band, cch, opch, &tic); -+ dump_tx_power_idx_value(sel, adapter, rfpath, rates_by_sections[rs].rates[i], power_idx, &tic); -+ } -+} -+ -+void dump_tx_power_idx(void *sel, _adapter *adapter, enum channel_width bw, u8 cch, u8 opch) -+{ -+ u8 rfpath, rs; -+ -+ dump_tx_power_idx_title(sel, adapter, bw, cch, opch); -+ for (rfpath = RF_PATH_A; rfpath < RF_PATH_MAX; rfpath++) -+ for (rs = CCK; rs < RATE_SECTION_NUM; rs++) -+ dump_tx_power_idx_by_path_rs(sel, adapter, rfpath, rs, bw, cch, opch); -+} -+ -+void dump_txpwr_total_dbm_value(void *sel, _adapter *adapter, enum MGN_RATE rate, u8 ntx_idx -+ , s16 target, s16 byr, s16 btc, s16 extra, s16 rlmt, s16 lmt, s16 ulmt, s16 tpc) -+{ -+ char target_str[8]; -+ char byr_str[8]; -+ char btc_str[8]; -+ char extra_str[8]; -+ char rlmt_str[8]; -+ char lmt_str[8]; -+ char ulmt_str[8]; -+ char tpc_str[8]; -+ -+ txpwr_mbm_get_dbm_str(target, 0, target_str, 8); -+ txpwr_mbm_get_dbm_str(byr, 0, byr_str, 8); -+ txpwr_mbm_get_dbm_str(btc, 0, btc_str, 8); -+ txpwr_mbm_get_dbm_str(extra, 0, extra_str, 8); -+ txpwr_mbm_get_dbm_str(rlmt, 0, rlmt_str, 8); -+ txpwr_mbm_get_dbm_str(lmt, 0, lmt_str, 8); -+ txpwr_mbm_get_dbm_str(ulmt, 0, ulmt_str, 8); -+ txpwr_mbm_get_dbm_str(tpc, 0, tpc_str, 8); -+ -+ RTW_PRINT_SEL(sel, "%9s %uT %s = ((%s %s %s), %s, %s, %s) %s\n" -+ , MGN_RATE_STR(rate), ntx_idx + 1 -+ , target_str, byr_str, btc_str, extra_str, rlmt_str, lmt_str, ulmt_str, tpc_str); -+} -+ -+void dump_txpwr_total_dbm_value_utgt(void *sel, _adapter *adapter, enum MGN_RATE rate, u8 ntx_idx -+ , s16 target, s16 utgt, s16 rlmt, s16 lmt, s16 ulmt, s16 tpc) -+{ -+ char target_str[8]; -+ char utgt_str[8]; -+ char rlmt_str[8]; -+ char lmt_str[8]; -+ char ulmt_str[8]; -+ char tpc_str[8]; -+ -+ txpwr_mbm_get_dbm_str(target, 0, target_str, 8); -+ txpwr_mbm_get_dbm_str(utgt, 0, utgt_str, 8); -+ txpwr_mbm_get_dbm_str(rlmt, 0, rlmt_str, 8); -+ txpwr_mbm_get_dbm_str(lmt, 0, lmt_str, 8); -+ txpwr_mbm_get_dbm_str(ulmt, 0, ulmt_str, 8); -+ txpwr_mbm_get_dbm_str(tpc, 0, tpc_str, 8); -+ -+ RTW_PRINT_SEL(sel, "%9s %uT %s = (%s, %s, %s, %s) %s\n" -+ , MGN_RATE_STR(rate), ntx_idx + 1 -+ , target_str, utgt_str, rlmt_str, lmt_str, ulmt_str, tpc_str); -+} -+ -+void dump_txpwr_total_dbm_title(void *sel, _adapter *adapter, enum channel_width bw, u8 cch, u8 opch) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ char antenna_gain_str[8]; -+ u8 cch_20, cch_40, cch_80; -+ -+ txpwr_mbm_get_dbm_str(rfctl->antenna_gain, 0, antenna_gain_str, 8); -+ RTW_PRINT_SEL(sel, "antenna_gain:%s\n", antenna_gain_str); -+ -+ cch_80 = bw == CHANNEL_WIDTH_80 ? cch : 0; -+ cch_40 = bw == CHANNEL_WIDTH_40 ? cch : 0; -+ cch_20 = bw == CHANNEL_WIDTH_20 ? cch : 0; -+ if (cch_80 != 0) -+ cch_40 = rtw_get_scch_by_cch_opch(cch_80, CHANNEL_WIDTH_80, opch); -+ if (cch_40 != 0) -+ cch_20 = rtw_get_scch_by_cch_opch(cch_40, CHANNEL_WIDTH_40, opch); -+ -+ RTW_PRINT_SEL(sel, "%s", ch_width_str(bw)); -+ if (bw >= CHANNEL_WIDTH_80) -+ _RTW_PRINT_SEL(sel, ", cch80:%u", cch_80); -+ if (bw >= CHANNEL_WIDTH_40) -+ _RTW_PRINT_SEL(sel, ", cch40:%u", cch_40); -+ _RTW_PRINT_SEL(sel, ", cch20:%u\n", cch_20); -+ -+ if (!phy_is_txpwr_user_target_specified(adapter)) { -+ RTW_PRINT_SEL(sel, "%-9s %2s %-6s = min((%-6s + %-6s + %-6s), %-6s, %-6s, %-6s) + %-6s\n" -+ , "rate", "", "target", "byr", "btc", "extra", "rlmt", "lmt", "ulmt", "tpc"); -+ } else { -+ RTW_PRINT_SEL(sel, "%-9s %2s %-6s = min(%-6s, %-6s, %-6s, %-6s) + %-6s\n" -+ , "rate", "", "target", "utgt", "rlmt", "lmt", "ulmt", "tpc"); -+ } -+} -+ -+void dump_txpwr_total_dbm_by_rs(void *sel, _adapter *adapter, u8 rs, enum channel_width bw, u8 cch, u8 opch) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 i; -+ u8 band = cch > 14 ? BAND_ON_5G : BAND_ON_2_4G; -+ -+ if (rs >= RATE_SECTION_NUM) -+ return; -+ -+ if (rate_section_to_tx_num(rs) + 1 > hal_data->tx_nss) -+ return; -+ -+ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) -+ return; -+ -+ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ return; -+ -+ for (i = 0; i < rates_by_sections[rs].rate_num; i++) { -+ struct txpwr_idx_comp tic; -+ s16 target, byr, tpc, btc, extra, utgt, rlmt, lmt, ulmt; -+ u8 tx_num; -+ -+ target = phy_get_txpwr_total_mbm(adapter, rs, rates_by_sections[rs].rates[i], bw, cch, opch, 0, 0, &tic); -+ tx_num = tic.ntx_idx + 1; -+ if (tic.rlimit == hal_spec->txgi_max) -+ rlmt = UNSPECIFIED_MBM; -+ else -+ rlmt = ((tic.rlimit * MBM_PDBM) / hal_spec->txgi_pdbm) + mb_of_ntx(tx_num); -+ if (tic.limit == hal_spec->txgi_max) -+ lmt = UNSPECIFIED_MBM; -+ else -+ lmt = ((tic.limit * MBM_PDBM) / hal_spec->txgi_pdbm) + mb_of_ntx(tx_num); -+ if (tic.ulimit == hal_spec->txgi_max) -+ ulmt = UNSPECIFIED_MBM; -+ else -+ ulmt = ((tic.ulimit * MBM_PDBM) / hal_spec->txgi_pdbm) + mb_of_ntx(tx_num); -+ tpc = (tic.tpc * MBM_PDBM) / hal_spec->txgi_pdbm; -+ -+ if (tic.utarget == hal_spec->txgi_max) { -+ byr = ((tic.by_rate * MBM_PDBM) / hal_spec->txgi_pdbm) + mb_of_ntx(tx_num); -+ btc = (tic.btc * MBM_PDBM) / hal_spec->txgi_pdbm; -+ extra = (tic.extra * MBM_PDBM) / hal_spec->txgi_pdbm; -+ dump_txpwr_total_dbm_value(sel, adapter, rates_by_sections[rs].rates[i], tic.ntx_idx -+ , target, byr, btc, extra, rlmt, lmt, ulmt, tpc); -+ } else { -+ utgt = ((tic.utarget * MBM_PDBM) / hal_spec->txgi_pdbm) + mb_of_ntx(tx_num); -+ dump_txpwr_total_dbm_value_utgt(sel, adapter, rates_by_sections[rs].rates[i], tic.ntx_idx -+ , target, utgt, rlmt, lmt, ulmt, tpc); -+ } -+ } -+} -+ -+/* dump txpowr in dBm with effect of N-TX */ -+void dump_txpwr_total_dbm(void *sel, _adapter *adapter, enum channel_width bw, u8 cch, u8 opch) -+{ -+ u8 rs; -+ -+ dump_txpwr_total_dbm_title(sel, adapter, bw, cch, opch); -+ for (rs = CCK; rs < RATE_SECTION_NUM; rs++) -+ dump_txpwr_total_dbm_by_rs(sel, adapter, rs, bw, cch, opch); -+} -+#endif -+ -+bool phy_is_tx_power_limit_needed(_adapter *adapter) -+{ -+#if CONFIG_TXPWR_LIMIT -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter)); -+ -+ if (regsty->RegEnableTxPowerLimit == 1 -+ || (regsty->RegEnableTxPowerLimit == 2 && hal_data->EEPROMRegulatory == 1)) -+ return _TRUE; -+#endif -+ -+ return _FALSE; -+} -+ -+bool phy_is_tx_power_by_rate_needed(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter)); -+ -+ if (regsty->RegEnableTxPowerByRate == 1 -+ || (regsty->RegEnableTxPowerByRate == 2 && hal_data->EEPROMRegulatory != 2)) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+int phy_load_tx_power_by_rate(_adapter *adapter, u8 chk_file) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ int ret = _FAIL; -+ -+ hal_data->txpwr_by_rate_loaded = 0; -+ PHY_InitTxPowerByRate(adapter); -+ -+ /* tx power limit is based on tx power by rate */ -+ hal_data->txpwr_limit_loaded = 0; -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ if (chk_file -+ && phy_ConfigBBWithPgParaFile(adapter, PHY_FILE_PHY_REG_PG) == _SUCCESS -+ ) { -+ hal_data->txpwr_by_rate_from_file = 1; -+ goto post_hdl; -+ } -+#endif -+ -+#ifdef CONFIG_EMBEDDED_FWIMG -+ if (HAL_STATUS_SUCCESS == odm_config_bb_with_header_file(&hal_data->odmpriv, CONFIG_BB_PHY_REG_PG)) { -+ RTW_INFO("default power by rate loaded\n"); -+ hal_data->txpwr_by_rate_from_file = 0; -+ goto post_hdl; -+ } -+#endif -+ -+ RTW_ERR("%s():Read Tx power by rate fail\n", __func__); -+ goto exit; -+ -+post_hdl: -+ if (hal_data->odmpriv.phy_reg_pg_value_type != PHY_REG_PG_EXACT_VALUE) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ PHY_TxPowerByRateConfiguration(adapter); -+ hal_data->txpwr_by_rate_loaded = 1; -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+#if CONFIG_TXPWR_LIMIT -+int phy_load_tx_power_limit(_adapter *adapter, u8 chk_file) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter)); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ int ret = _FAIL; -+ -+ hal_data->txpwr_limit_loaded = 0; -+ rtw_regd_exc_list_free(rfctl); -+ rtw_txpwr_lmt_list_free(rfctl); -+ -+ if (!hal_data->txpwr_by_rate_loaded && regsty->target_tx_pwr_valid != _TRUE) { -+ RTW_ERR("%s():Read Tx power limit before target tx power is specify\n", __func__); -+ goto exit; -+ } -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ if (chk_file -+ && PHY_ConfigRFWithPowerLimitTableParaFile(adapter, PHY_FILE_TXPWR_LMT) == _SUCCESS -+ ) { -+ hal_data->txpwr_limit_from_file = 1; -+ goto post_hdl; -+ } -+#endif -+ -+#ifdef CONFIG_EMBEDDED_FWIMG -+ if (odm_config_rf_with_header_file(&hal_data->odmpriv, CONFIG_RF_TXPWR_LMT, RF_PATH_A) == HAL_STATUS_SUCCESS) { -+ RTW_INFO("default power limit loaded\n"); -+ hal_data->txpwr_limit_from_file = 0; -+ goto post_hdl; -+ } -+#endif -+ -+ RTW_ERR("%s():Read Tx power limit fail\n", __func__); -+ goto exit; -+ -+post_hdl: -+ phy_txpwr_lmt_post_hdl(adapter); -+ rtw_txpwr_init_regd(rfctl); -+ hal_data->txpwr_limit_loaded = 1; -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_TXPWR_LIMIT */ -+ -+void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file) -+{ -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ -+ /* check registy target tx power */ -+ regsty->target_tx_pwr_valid = rtw_regsty_chk_target_tx_power_valid(adapter); -+ -+ /* power by rate */ -+ if (phy_is_tx_power_by_rate_needed(adapter) -+ || regsty->target_tx_pwr_valid != _TRUE /* need target tx power from by rate table */ -+ ) -+ phy_load_tx_power_by_rate(adapter, chk_file); -+ -+ /* power limit */ -+#if CONFIG_TXPWR_LIMIT -+ if (phy_is_tx_power_limit_needed(adapter)) -+ phy_load_tx_power_limit(adapter, chk_file); -+#endif -+} -+ -+inline void phy_reload_tx_power_ext_info(_adapter *adapter) -+{ -+ phy_load_tx_power_ext_info(adapter, 1); -+ op_class_pref_apply_regulatory(adapter, REG_TXPWR_CHANGE); -+} -+ -+inline void phy_reload_default_tx_power_ext_info(_adapter *adapter) -+{ -+ phy_load_tx_power_ext_info(adapter, 0); -+ op_class_pref_apply_regulatory(adapter, REG_TXPWR_CHANGE); -+} -+ -+#ifdef CONFIG_PROC_DEBUG -+void dump_tx_power_ext_info(void *sel, _adapter *adapter) -+{ -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ RTW_PRINT_SEL(sel, "txpwr_pg_mode: %s\n", txpwr_pg_mode_str(hal_data->txpwr_pg_mode)); -+ -+ if (regsty->target_tx_pwr_valid == _TRUE) -+ RTW_PRINT_SEL(sel, "target_tx_power: from registry\n"); -+ else if (hal_data->txpwr_by_rate_loaded) -+ RTW_PRINT_SEL(sel, "target_tx_power: from power by rate\n"); -+ else -+ RTW_PRINT_SEL(sel, "target_tx_power: unavailable\n"); -+ -+ RTW_PRINT_SEL(sel, "tx_power_by_rate: %s, %s, %s\n" -+ , phy_is_tx_power_by_rate_needed(adapter) ? "enabled" : "disabled" -+ , hal_data->txpwr_by_rate_loaded ? "loaded" : "unloaded" -+ , hal_data->txpwr_by_rate_from_file ? "file" : "default" -+ ); -+ -+ RTW_PRINT_SEL(sel, "tx_power_limit: %s, %s, %s\n" -+ , phy_is_tx_power_limit_needed(adapter) ? "enabled" : "disabled" -+ , hal_data->txpwr_limit_loaded ? "loaded" : "unloaded" -+ , hal_data->txpwr_limit_from_file ? "file" : "default" -+ ); -+} -+ -+void dump_target_tx_power(void *sel, _adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ int path, tx_num, band, rs; -+ u8 target; -+ -+ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { -+ if (!hal_is_band_support(adapter, band)) -+ continue; -+ -+ for (path = 0; path < RF_PATH_MAX; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path)) -+ break; -+ -+ RTW_PRINT_SEL(sel, "[%s][%c]%s\n", band_str(band), rf_path_char(path) -+ , (regsty->target_tx_pwr_valid == _FALSE && hal_data->txpwr_by_rate_undefined_band_path[band][path]) ? "(dup)" : ""); -+ -+ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { -+ tx_num = rate_section_to_tx_num(rs); -+ if (tx_num + 1 > hal_data->tx_nss) -+ continue; -+ -+ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) -+ continue; -+ -+ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ continue; -+ -+ target = phy_get_target_txpwr(adapter, band, path, rs); -+ -+ if (target % hal_spec->txgi_pdbm) { -+ _RTW_PRINT_SEL(sel, "%7s: %2d.%d\n", rate_section_str(rs) -+ , target / hal_spec->txgi_pdbm, (target % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); -+ } else { -+ _RTW_PRINT_SEL(sel, "%7s: %5d\n", rate_section_str(rs) -+ , target / hal_spec->txgi_pdbm); -+ } -+ } -+ } -+ } -+ -+ return; -+} -+ -+void dump_tx_power_by_rate(void *sel, _adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ int path, tx_num, band, n, rs; -+ u8 rate_num, max_rate_num, base; -+ s8 by_rate; -+ -+ for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) { -+ if (!hal_is_band_support(adapter, band)) -+ continue; -+ -+ for (path = 0; path < RF_PATH_MAX; path++) { -+ if (!HAL_SPEC_CHK_RF_PATH(hal_spec, band, path)) -+ break; -+ -+ RTW_PRINT_SEL(sel, "[%s][%c]%s\n", band_str(band), rf_path_char(path) -+ , hal_data->txpwr_by_rate_undefined_band_path[band][path] ? "(dup)" : ""); -+ -+ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { -+ tx_num = rate_section_to_tx_num(rs); -+ if (tx_num + 1 > hal_data->tx_nss) -+ continue; -+ -+ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) -+ continue; -+ -+ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ continue; -+ -+ if (IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ max_rate_num = 10; -+ else -+ max_rate_num = 8; -+ rate_num = rate_section_rate_num(rs); -+ -+ RTW_PRINT_SEL(sel, "%7s: ", rate_section_str(rs)); -+ -+ /* dump power by rate in db */ -+ for (n = rate_num - 1; n >= 0; n--) { -+ by_rate = phy_get_txpwr_by_rate(adapter, band, path, rs, rates_by_sections[rs].rates[n]); -+ if (by_rate % hal_spec->txgi_pdbm) { -+ _RTW_PRINT_SEL(sel, "%2d.%d ", by_rate / hal_spec->txgi_pdbm -+ , (by_rate % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm); -+ } else -+ _RTW_PRINT_SEL(sel, "%5d ", by_rate / hal_spec->txgi_pdbm); -+ } -+ for (n = 0; n < max_rate_num - rate_num; n++) -+ _RTW_PRINT_SEL(sel, "%5s ", ""); -+ -+ _RTW_PRINT_SEL(sel, "|"); -+ -+ /* dump power by rate in offset */ -+ for (n = rate_num - 1; n >= 0; n--) { -+ by_rate = phy_get_txpwr_by_rate(adapter, band, path, rs, rates_by_sections[rs].rates[n]); -+ base = phy_get_target_txpwr(adapter, band, path, rs); -+ _RTW_PRINT_SEL(sel, "%3d ", by_rate - base); -+ } -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ } -+ } -+ } -+} -+#endif -+/* -+ * phy file path is stored in global char array rtw_phy_para_file_path -+ * need to care about racing -+ */ -+int rtw_get_phy_file_path(_adapter *adapter, const char *file_name) -+{ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ int len = 0; -+ -+ if (file_name) { -+ len += snprintf(rtw_phy_para_file_path, PATH_LENGTH_MAX, "%s", rtw_phy_file_path); -+ #if defined(CONFIG_MULTIDRV) || defined(REALTEK_CONFIG_PATH_WITH_IC_NAME_FOLDER) -+ len += snprintf(rtw_phy_para_file_path + len, PATH_LENGTH_MAX - len, "%s/", hal_spec->ic_name); -+ #endif -+ len += snprintf(rtw_phy_para_file_path + len, PATH_LENGTH_MAX - len, "%s", file_name); -+ -+ return _TRUE; -+ } -+#endif -+ return _FALSE; -+} -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+int -+phy_ConfigMACWithParaFile( -+ PADAPTER Adapter, -+ char *pFileName -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ int rlen = 0, rtStatus = _FAIL; -+ char *szLine, *ptmp; -+ u32 u4bRegOffset, u4bRegValue, u4bMove; -+ -+ if (!(Adapter->registrypriv.load_phy_file & LOAD_MAC_PARA_FILE)) -+ return rtStatus; -+ -+ _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); -+ -+ if ((pHalData->mac_reg_len == 0) && (pHalData->mac_reg == NULL)) { -+ rtw_get_phy_file_path(Adapter, pFileName); -+ if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, -+ MAX_PARA_FILE_BUF_LEN) == _TRUE) { -+ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); -+ if (rlen > 0) { -+ rtStatus = _SUCCESS; -+ pHalData->mac_reg = rtw_zvmalloc(rlen); -+ if (pHalData->mac_reg) { -+ _rtw_memcpy(pHalData->mac_reg, pHalData->para_file_buf, rlen); -+ pHalData->mac_reg_len = rlen; -+ } else -+ RTW_INFO("%s mac_reg alloc fail !\n", __FUNCTION__); -+ } -+ } -+ } else { -+ if ((pHalData->mac_reg_len != 0) && (pHalData->mac_reg != NULL)) { -+ _rtw_memcpy(pHalData->para_file_buf, pHalData->mac_reg, pHalData->mac_reg_len); -+ rtStatus = _SUCCESS; -+ } else -+ RTW_INFO("%s(): Critical Error !!!\n", __FUNCTION__); -+ } -+ -+ if (rtStatus == _SUCCESS) { -+ ptmp = pHalData->para_file_buf; -+ for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { -+ if (!IsCommentString(szLine)) { -+ /* Get 1st hex value as register offset */ -+ if (GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) { -+ if (u4bRegOffset == 0xffff) { -+ /* Ending. */ -+ break; -+ } -+ -+ /* Get 2nd hex value as register value. */ -+ szLine += u4bMove; -+ if (GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) -+ rtw_write8(Adapter, u4bRegOffset, (u8)u4bRegValue); -+ } -+ } -+ } -+ } else -+ RTW_INFO("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); -+ -+ return rtStatus; -+} -+ -+int -+phy_ConfigBBWithParaFile( -+ PADAPTER Adapter, -+ char *pFileName, -+ u32 ConfigType -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ int rlen = 0, rtStatus = _FAIL; -+ char *szLine, *ptmp; -+ u32 u4bRegOffset, u4bRegValue, u4bMove; -+ char *pBuf = NULL; -+ u32 *pBufLen = NULL; -+ -+ if (!(Adapter->registrypriv.load_phy_file & LOAD_BB_PARA_FILE)) -+ return rtStatus; -+ -+ switch (ConfigType) { -+ case CONFIG_BB_PHY_REG: -+ pBuf = pHalData->bb_phy_reg; -+ pBufLen = &pHalData->bb_phy_reg_len; -+ break; -+ case CONFIG_BB_AGC_TAB: -+ pBuf = pHalData->bb_agc_tab; -+ pBufLen = &pHalData->bb_agc_tab_len; -+ break; -+ default: -+ RTW_INFO("Unknown ConfigType!! %d\r\n", ConfigType); -+ break; -+ } -+ -+ _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); -+ -+ if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) { -+ rtw_get_phy_file_path(Adapter, pFileName); -+ if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, -+ MAX_PARA_FILE_BUF_LEN) == _TRUE) { -+ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); -+ if (rlen > 0) { -+ rtStatus = _SUCCESS; -+ pBuf = rtw_zvmalloc(rlen); -+ if (pBuf) { -+ _rtw_memcpy(pBuf, pHalData->para_file_buf, rlen); -+ *pBufLen = rlen; -+ -+ switch (ConfigType) { -+ case CONFIG_BB_PHY_REG: -+ pHalData->bb_phy_reg = pBuf; -+ break; -+ case CONFIG_BB_AGC_TAB: -+ pHalData->bb_agc_tab = pBuf; -+ break; -+ } -+ } else -+ RTW_INFO("%s(): ConfigType %d alloc fail !\n", __FUNCTION__, ConfigType); -+ } -+ } -+ } else { -+ if ((pBufLen != NULL) && (*pBufLen != 0) && (pBuf != NULL)) { -+ _rtw_memcpy(pHalData->para_file_buf, pBuf, *pBufLen); -+ rtStatus = _SUCCESS; -+ } else -+ RTW_INFO("%s(): Critical Error !!!\n", __FUNCTION__); -+ } -+ -+ if (rtStatus == _SUCCESS) { -+ ptmp = pHalData->para_file_buf; -+ for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { -+ if (!IsCommentString(szLine)) { -+ /* Get 1st hex value as register offset. */ -+ if (GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) { -+ if (u4bRegOffset == 0xffff) { -+ /* Ending. */ -+ break; -+ } else if (u4bRegOffset == 0xfe || u4bRegOffset == 0xffe) { -+#ifdef CONFIG_LONG_DELAY_ISSUE -+ rtw_msleep_os(50); -+#else -+ rtw_mdelay_os(50); -+#endif -+ } else if (u4bRegOffset == 0xfd) -+ rtw_mdelay_os(5); -+ else if (u4bRegOffset == 0xfc) -+ rtw_mdelay_os(1); -+ else if (u4bRegOffset == 0xfb) -+ rtw_udelay_os(50); -+ else if (u4bRegOffset == 0xfa) -+ rtw_udelay_os(5); -+ else if (u4bRegOffset == 0xf9) -+ rtw_udelay_os(1); -+ -+ /* Get 2nd hex value as register value. */ -+ szLine += u4bMove; -+ if (GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { -+ /* RTW_INFO("[BB-ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue); */ -+ phy_set_bb_reg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue); -+ -+ if (u4bRegOffset == 0xa24) -+ pHalData->odmpriv.rf_calibrate_info.rega24 = u4bRegValue; -+ -+ /* Add 1us delay between BB/RF register setting. */ -+ rtw_udelay_os(1); -+ } -+ } -+ } -+ } -+ } else -+ RTW_INFO("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); -+ -+ return rtStatus; -+} -+ -+void -+phy_DecryptBBPgParaFile( -+ PADAPTER Adapter, -+ char *buffer -+) -+{ -+ u32 i = 0, j = 0; -+ u8 map[95] = {0}; -+ u8 currentChar; -+ char *BufOfLines, *ptmp; -+ -+ /* RTW_INFO("=====>phy_DecryptBBPgParaFile()\n"); */ -+ /* 32 the ascii code of the first visable char, 126 the last one */ -+ for (i = 0; i < 95; ++i) -+ map[i] = (u8)(94 - i); -+ -+ ptmp = buffer; -+ i = 0; -+ for (BufOfLines = GetLineFromBuffer(ptmp); BufOfLines != NULL; BufOfLines = GetLineFromBuffer(ptmp)) { -+ /* RTW_INFO("Encrypted Line: %s\n", BufOfLines); */ -+ -+ for (j = 0; j < strlen(BufOfLines); ++j) { -+ currentChar = BufOfLines[j]; -+ -+ if (currentChar == '\0') -+ break; -+ -+ currentChar -= (u8)((((i + j) * 3) % 128)); -+ -+ BufOfLines[j] = map[currentChar - 32] + 32; -+ } -+ /* RTW_INFO("Decrypted Line: %s\n", BufOfLines ); */ -+ if (strlen(BufOfLines) != 0) -+ i++; -+ BufOfLines[strlen(BufOfLines)] = '\n'; -+ } -+} -+ -+#ifndef DBG_TXPWR_BY_RATE_FILE_PARSE -+#define DBG_TXPWR_BY_RATE_FILE_PARSE 0 -+#endif -+ -+int -+phy_ParseBBPgParaFile( -+ PADAPTER Adapter, -+ char *buffer -+) -+{ -+ int rtStatus = _FAIL; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); -+ char *szLine, *ptmp; -+ u32 u4bRegOffset, u4bRegMask; -+ u32 u4bMove; -+ BOOLEAN firstLine = _TRUE; -+ u8 tx_num = 0; -+ u8 band = 0, rf_path = 0; -+ -+ if (Adapter->registrypriv.RegDecryptCustomFile == 1) -+ phy_DecryptBBPgParaFile(Adapter, buffer); -+ -+ ptmp = buffer; -+ for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { -+ if (isAllSpaceOrTab(szLine, sizeof(*szLine))) -+ continue; -+ -+ if (!IsCommentString(szLine)) { -+ /* Get header info (relative value or exact value) */ -+ if (firstLine) { -+ if (strncmp(szLine, "#[v1]", 5) == 0 -+ || strncmp(szLine, "#[v2]", 5) == 0) -+ pHalData->odmpriv.phy_reg_pg_version = szLine[3] - '0'; -+ else { -+ RTW_ERR("The format in PHY_REG_PG are invalid %s\n", szLine); -+ goto exit; -+ } -+ -+ if (strncmp(szLine + 5, "[Exact]#", 8) == 0) { -+ pHalData->odmpriv.phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; -+ firstLine = _FALSE; -+ continue; -+ } else { -+ RTW_ERR("The values in PHY_REG_PG are invalid %s\n", szLine); -+ goto exit; -+ } -+ } -+ -+ if (pHalData->odmpriv.phy_reg_pg_version > 0) { -+ u32 index = 0; -+ -+ if (strncmp(szLine, "0xffff", 6) == 0) -+ break; -+ -+ if (strncmp(szLine, "#[END]#", 7)) { -+ /* load the table label info */ -+ if (szLine[0] == '#') { -+ index = 0; -+ if (strncmp(szLine, "#[2.4G]", 7) == 0) { -+ band = BAND_ON_2_4G; -+ index += 8; -+ } else if (strncmp(szLine, "#[5G]", 5) == 0) { -+ band = BAND_ON_5G; -+ index += 6; -+ } else { -+ RTW_ERR("Invalid band %s in PHY_REG_PG.txt\n", szLine); -+ goto exit; -+ } -+ -+ rf_path = szLine[index] - 'A'; -+ if (DBG_TXPWR_BY_RATE_FILE_PARSE) -+ RTW_INFO(" Table label Band %d, RfPath %d\n", band, rf_path ); -+ } else { /* load rows of tables */ -+ if (szLine[1] == '1') -+ tx_num = RF_1TX; -+ else if (szLine[1] == '2') -+ tx_num = RF_2TX; -+ else if (szLine[1] == '3') -+ tx_num = RF_3TX; -+ else if (szLine[1] == '4') -+ tx_num = RF_4TX; -+ else { -+ RTW_ERR("Invalid row in PHY_REG_PG.txt '%c'(%d)\n", szLine[1], szLine[1]); -+ goto exit; -+ } -+ -+ while (szLine[index] != ']') -+ ++index; -+ ++index;/* skip ] */ -+ -+ /* Get 2nd hex value as register offset. */ -+ szLine += index; -+ if (GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) -+ szLine += u4bMove; -+ else -+ goto exit; -+ -+ /* Get 2nd hex value as register mask. */ -+ if (GetHexValueFromString(szLine, &u4bRegMask, &u4bMove)) -+ szLine += u4bMove; -+ else -+ goto exit; -+ -+ if (pHalData->odmpriv.phy_reg_pg_value_type == PHY_REG_PG_EXACT_VALUE) { -+ u32 combineValue = 0; -+ u8 integer = 0, fraction = 0; -+ -+ if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) -+ szLine += u4bMove; -+ else -+ goto exit; -+ -+ integer *= hal_spec->txgi_pdbm; -+ integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100; -+ if (pHalData->odmpriv.phy_reg_pg_version == 1) -+ combineValue |= (((integer / 10) << 4) + (integer % 10)); -+ else -+ combineValue |= integer; -+ -+ if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) -+ szLine += u4bMove; -+ else -+ goto exit; -+ -+ integer *= hal_spec->txgi_pdbm; -+ integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100; -+ combineValue <<= 8; -+ if (pHalData->odmpriv.phy_reg_pg_version == 1) -+ combineValue |= (((integer / 10) << 4) + (integer % 10)); -+ else -+ combineValue |= integer; -+ -+ if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) -+ szLine += u4bMove; -+ else -+ goto exit; -+ -+ integer *= hal_spec->txgi_pdbm; -+ integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100; -+ combineValue <<= 8; -+ if (pHalData->odmpriv.phy_reg_pg_version == 1) -+ combineValue |= (((integer / 10) << 4) + (integer % 10)); -+ else -+ combineValue |= integer; -+ -+ if (GetFractionValueFromString(szLine, &integer, &fraction, &u4bMove)) -+ szLine += u4bMove; -+ else -+ goto exit; -+ -+ integer *= hal_spec->txgi_pdbm; -+ integer += ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100; -+ combineValue <<= 8; -+ if (pHalData->odmpriv.phy_reg_pg_version == 1) -+ combineValue |= (((integer / 10) << 4) + (integer % 10)); -+ else -+ combineValue |= integer; -+ -+ phy_store_tx_power_by_rate(Adapter, band, rf_path, tx_num, u4bRegOffset, u4bRegMask, combineValue); -+ -+ if (DBG_TXPWR_BY_RATE_FILE_PARSE) -+ RTW_INFO("addr:0x%3x mask:0x%08x %dTx = 0x%08x\n", u4bRegOffset, u4bRegMask, tx_num + 1, combineValue); -+ } -+ } -+ } -+ } -+ } -+ } -+ -+ rtStatus = _SUCCESS; -+ -+exit: -+ RTW_INFO("%s return %d\n", __func__, rtStatus); -+ return rtStatus; -+} -+ -+int -+phy_ConfigBBWithPgParaFile( -+ PADAPTER Adapter, -+ const char *pFileName) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ int rlen = 0, rtStatus = _FAIL; -+ -+ if (!(Adapter->registrypriv.load_phy_file & LOAD_BB_PG_PARA_FILE)) -+ return rtStatus; -+ -+ _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); -+ -+ if (pHalData->bb_phy_reg_pg == NULL) { -+ rtw_get_phy_file_path(Adapter, pFileName); -+ if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, -+ MAX_PARA_FILE_BUF_LEN) == _TRUE) { -+ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); -+ if (rlen > 0) { -+ rtStatus = _SUCCESS; -+ pHalData->bb_phy_reg_pg = rtw_zvmalloc(rlen); -+ if (pHalData->bb_phy_reg_pg) { -+ _rtw_memcpy(pHalData->bb_phy_reg_pg, pHalData->para_file_buf, rlen); -+ pHalData->bb_phy_reg_pg_len = rlen; -+ } else -+ RTW_INFO("%s bb_phy_reg_pg alloc fail !\n", __FUNCTION__); -+ } -+ } -+ } else { -+ if ((pHalData->bb_phy_reg_pg_len != 0) && (pHalData->bb_phy_reg_pg != NULL)) { -+ _rtw_memcpy(pHalData->para_file_buf, pHalData->bb_phy_reg_pg, pHalData->bb_phy_reg_pg_len); -+ rtStatus = _SUCCESS; -+ } else -+ RTW_INFO("%s(): Critical Error !!!\n", __FUNCTION__); -+ } -+ -+ if (rtStatus == _SUCCESS) { -+ /* RTW_INFO("phy_ConfigBBWithPgParaFile(): read %s ok\n", pFileName); */ -+ rtStatus = phy_ParseBBPgParaFile(Adapter, pHalData->para_file_buf); -+ } else -+ RTW_INFO("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); -+ -+ return rtStatus; -+} -+ -+#if (MP_DRIVER == 1) -+ -+int -+phy_ConfigBBWithMpParaFile( -+ PADAPTER Adapter, -+ char *pFileName -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ int rlen = 0, rtStatus = _FAIL; -+ char *szLine, *ptmp; -+ u32 u4bRegOffset, u4bRegValue, u4bMove; -+ -+ if (!(Adapter->registrypriv.load_phy_file & LOAD_BB_MP_PARA_FILE)) -+ return rtStatus; -+ -+ _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); -+ -+ if ((pHalData->bb_phy_reg_mp_len == 0) && (pHalData->bb_phy_reg_mp == NULL)) { -+ rtw_get_phy_file_path(Adapter, pFileName); -+ if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, -+ MAX_PARA_FILE_BUF_LEN) == _TRUE) { -+ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); -+ if (rlen > 0) { -+ rtStatus = _SUCCESS; -+ pHalData->bb_phy_reg_mp = rtw_zvmalloc(rlen); -+ if (pHalData->bb_phy_reg_mp) { -+ _rtw_memcpy(pHalData->bb_phy_reg_mp, pHalData->para_file_buf, rlen); -+ pHalData->bb_phy_reg_mp_len = rlen; -+ } else -+ RTW_INFO("%s bb_phy_reg_mp alloc fail !\n", __FUNCTION__); -+ } -+ } -+ } else { -+ if ((pHalData->bb_phy_reg_mp_len != 0) && (pHalData->bb_phy_reg_mp != NULL)) { -+ _rtw_memcpy(pHalData->para_file_buf, pHalData->bb_phy_reg_mp, pHalData->bb_phy_reg_mp_len); -+ rtStatus = _SUCCESS; -+ } else -+ RTW_INFO("%s(): Critical Error !!!\n", __FUNCTION__); -+ } -+ -+ if (rtStatus == _SUCCESS) { -+ /* RTW_INFO("phy_ConfigBBWithMpParaFile(): read %s ok\n", pFileName); */ -+ -+ ptmp = pHalData->para_file_buf; -+ for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { -+ if (!IsCommentString(szLine)) { -+ /* Get 1st hex value as register offset. */ -+ if (GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) { -+ if (u4bRegOffset == 0xffff) { -+ /* Ending. */ -+ break; -+ } else if (u4bRegOffset == 0xfe || u4bRegOffset == 0xffe) { -+#ifdef CONFIG_LONG_DELAY_ISSUE -+ rtw_msleep_os(50); -+#else -+ rtw_mdelay_os(50); -+#endif -+ } else if (u4bRegOffset == 0xfd) -+ rtw_mdelay_os(5); -+ else if (u4bRegOffset == 0xfc) -+ rtw_mdelay_os(1); -+ else if (u4bRegOffset == 0xfb) -+ rtw_udelay_os(50); -+ else if (u4bRegOffset == 0xfa) -+ rtw_udelay_os(5); -+ else if (u4bRegOffset == 0xf9) -+ rtw_udelay_os(1); -+ -+ /* Get 2nd hex value as register value. */ -+ szLine += u4bMove; -+ if (GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { -+ /* RTW_INFO("[ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue); */ -+ phy_set_bb_reg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue); -+ -+ /* Add 1us delay between BB/RF register setting. */ -+ rtw_udelay_os(1); -+ } -+ } -+ } -+ } -+ } else -+ RTW_INFO("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); -+ -+ return rtStatus; -+} -+ -+#endif -+ -+int -+PHY_ConfigRFWithParaFile( -+ PADAPTER Adapter, -+ char *pFileName, -+ enum rf_path eRFPath -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ int rlen = 0, rtStatus = _FAIL; -+ char *szLine, *ptmp; -+ u32 u4bRegOffset, u4bRegValue, u4bMove; -+ u16 i; -+ char *pBuf = NULL; -+ u32 *pBufLen = NULL; -+ -+ if (!(Adapter->registrypriv.load_phy_file & LOAD_RF_PARA_FILE)) -+ return rtStatus; -+ -+ switch (eRFPath) { -+ case RF_PATH_A: -+ pBuf = pHalData->rf_radio_a; -+ pBufLen = &pHalData->rf_radio_a_len; -+ break; -+ case RF_PATH_B: -+ pBuf = pHalData->rf_radio_b; -+ pBufLen = &pHalData->rf_radio_b_len; -+ break; -+ default: -+ RTW_INFO("Unknown RF path!! %d\r\n", eRFPath); -+ break; -+ } -+ -+ _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); -+ -+ if ((pBufLen != NULL) && (*pBufLen == 0) && (pBuf == NULL)) { -+ rtw_get_phy_file_path(Adapter, pFileName); -+ if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, -+ MAX_PARA_FILE_BUF_LEN) == _TRUE) { -+ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); -+ if (rlen > 0) { -+ rtStatus = _SUCCESS; -+ pBuf = rtw_zvmalloc(rlen); -+ if (pBuf) { -+ _rtw_memcpy(pBuf, pHalData->para_file_buf, rlen); -+ *pBufLen = rlen; -+ -+ switch (eRFPath) { -+ case RF_PATH_A: -+ pHalData->rf_radio_a = pBuf; -+ break; -+ case RF_PATH_B: -+ pHalData->rf_radio_b = pBuf; -+ break; -+ default: -+ RTW_INFO("Unknown RF path!! %d\r\n", eRFPath); -+ break; -+ } -+ } else -+ RTW_INFO("%s(): eRFPath=%d alloc fail !\n", __FUNCTION__, eRFPath); -+ } -+ } -+ } else { -+ if ((pBufLen != NULL) && (*pBufLen != 0) && (pBuf != NULL)) { -+ _rtw_memcpy(pHalData->para_file_buf, pBuf, *pBufLen); -+ rtStatus = _SUCCESS; -+ } else -+ RTW_INFO("%s(): Critical Error !!!\n", __FUNCTION__); -+ } -+ -+ if (rtStatus == _SUCCESS) { -+ /* RTW_INFO("%s(): read %s successfully\n", __FUNCTION__, pFileName); */ -+ -+ ptmp = pHalData->para_file_buf; -+ for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { -+ if (!IsCommentString(szLine)) { -+ /* Get 1st hex value as register offset. */ -+ if (GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) { -+ if (u4bRegOffset == 0xfe || u4bRegOffset == 0xffe) { -+ /* Deay specific ms. Only RF configuration require delay. */ -+#ifdef CONFIG_LONG_DELAY_ISSUE -+ rtw_msleep_os(50); -+#else -+ rtw_mdelay_os(50); -+#endif -+ } else if (u4bRegOffset == 0xfd) { -+ /* delay_ms(5); */ -+ for (i = 0; i < 100; i++) -+ rtw_udelay_os(MAX_STALL_TIME); -+ } else if (u4bRegOffset == 0xfc) { -+ /* delay_ms(1); */ -+ for (i = 0; i < 20; i++) -+ rtw_udelay_os(MAX_STALL_TIME); -+ } else if (u4bRegOffset == 0xfb) -+ rtw_udelay_os(50); -+ else if (u4bRegOffset == 0xfa) -+ rtw_udelay_os(5); -+ else if (u4bRegOffset == 0xf9) -+ rtw_udelay_os(1); -+ else if (u4bRegOffset == 0xffff) -+ break; -+ -+ /* Get 2nd hex value as register value. */ -+ szLine += u4bMove; -+ if (GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) { -+ phy_set_rf_reg(Adapter, eRFPath, u4bRegOffset, bRFRegOffsetMask, u4bRegValue); -+ -+ /* Temp add, for frequency lock, if no delay, that may cause */ -+ /* frequency shift, ex: 2412MHz => 2417MHz */ -+ /* If frequency shift, the following action may works. */ -+ /* Fractional-N table in radio_a.txt */ -+ /* 0x2a 0x00001 */ /* channel 1 */ -+ /* 0x2b 0x00808 frequency divider. */ -+ /* 0x2b 0x53333 */ -+ /* 0x2c 0x0000c */ -+ rtw_udelay_os(1); -+ } -+ } -+ } -+ } -+ } else -+ RTW_INFO("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); -+ -+ return rtStatus; -+} -+ -+void -+initDeltaSwingIndexTables( -+ PADAPTER Adapter, -+ char *Band, -+ char *Path, -+ char *Sign, -+ char *Channel, -+ char *Rate, -+ char *Data -+) -+{ -+#define STR_EQUAL_5G(_band, _path, _sign, _rate, _chnl) \ -+ ((strcmp(Band, _band) == 0) && (strcmp(Path, _path) == 0) && (strcmp(Sign, _sign) == 0) &&\ -+ (strcmp(Rate, _rate) == 0) && (strcmp(Channel, _chnl) == 0)\ -+ ) -+#define STR_EQUAL_2G(_band, _path, _sign, _rate) \ -+ ((strcmp(Band, _band) == 0) && (strcmp(Path, _path) == 0) && (strcmp(Sign, _sign) == 0) &&\ -+ (strcmp(Rate, _rate) == 0)\ -+ ) -+ -+#define STORE_SWING_TABLE(_array, _iteratedIdx) \ -+ do { \ -+ for (token = strsep(&Data, delim); token != NULL; token = strsep(&Data, delim)) {\ -+ sscanf(token, "%d", &idx);\ -+ _array[_iteratedIdx++] = (u8)idx;\ -+ } } while (0)\ -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ struct dm_rf_calibration_struct *pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); -+ u32 j = 0; -+ char *token; -+ char delim[] = ","; -+ u32 idx = 0; -+ -+ /* RTW_INFO("===>initDeltaSwingIndexTables(): Band: %s;\nPath: %s;\nSign: %s;\nChannel: %s;\nRate: %s;\n, Data: %s;\n", */ -+ /* Band, Path, Sign, Channel, Rate, Data); */ -+ -+ if (STR_EQUAL_2G("2G", "A", "+", "CCK")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_2g_cck_a_p, j); -+ else if (STR_EQUAL_2G("2G", "A", "-", "CCK")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_2g_cck_a_n, j); -+ else if (STR_EQUAL_2G("2G", "B", "+", "CCK")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_2g_cck_b_p, j); -+ else if (STR_EQUAL_2G("2G", "B", "-", "CCK")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_2g_cck_b_n, j); -+ else if (STR_EQUAL_2G("2G", "A", "+", "ALL")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_2ga_p, j); -+ else if (STR_EQUAL_2G("2G", "A", "-", "ALL")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_2ga_n, j); -+ else if (STR_EQUAL_2G("2G", "B", "+", "ALL")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_2gb_p, j); -+ else if (STR_EQUAL_2G("2G", "B", "-", "ALL")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_2gb_n, j); -+ else if (STR_EQUAL_5G("5G", "A", "+", "ALL", "0")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5ga_p[0], j); -+ else if (STR_EQUAL_5G("5G", "A", "-", "ALL", "0")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5ga_n[0], j); -+ else if (STR_EQUAL_5G("5G", "B", "+", "ALL", "0")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5gb_p[0], j); -+ else if (STR_EQUAL_5G("5G", "B", "-", "ALL", "0")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5gb_n[0], j); -+ else if (STR_EQUAL_5G("5G", "A", "+", "ALL", "1")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5ga_p[1], j); -+ else if (STR_EQUAL_5G("5G", "A", "-", "ALL", "1")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5ga_n[1], j); -+ else if (STR_EQUAL_5G("5G", "B", "+", "ALL", "1")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5gb_p[1], j); -+ else if (STR_EQUAL_5G("5G", "B", "-", "ALL", "1")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5gb_n[1], j); -+ else if (STR_EQUAL_5G("5G", "A", "+", "ALL", "2")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5ga_p[2], j); -+ else if (STR_EQUAL_5G("5G", "A", "-", "ALL", "2")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5ga_n[2], j); -+ else if (STR_EQUAL_5G("5G", "B", "+", "ALL", "2")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5gb_p[2], j); -+ else if (STR_EQUAL_5G("5G", "B", "-", "ALL", "2")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5gb_n[2], j); -+ else if (STR_EQUAL_5G("5G", "A", "+", "ALL", "3")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5ga_p[3], j); -+ else if (STR_EQUAL_5G("5G", "A", "-", "ALL", "3")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5ga_n[3], j); -+ else if (STR_EQUAL_5G("5G", "B", "+", "ALL", "3")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5gb_p[3], j); -+ else if (STR_EQUAL_5G("5G", "B", "-", "ALL", "3")) -+ STORE_SWING_TABLE(pRFCalibrateInfo->delta_swing_table_idx_5gb_n[3], j); -+ else -+ RTW_INFO("===>initDeltaSwingIndexTables(): The input is invalid!!\n"); -+} -+ -+int -+PHY_ConfigRFWithTxPwrTrackParaFile( -+ PADAPTER Adapter, -+ char *pFileName -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ int rlen = 0, rtStatus = _FAIL; -+ char *szLine, *ptmp; -+ u32 i = 0; -+ -+ if (!(Adapter->registrypriv.load_phy_file & LOAD_RF_TXPWR_TRACK_PARA_FILE)) -+ return rtStatus; -+ -+ _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); -+ -+ if ((pHalData->rf_tx_pwr_track_len == 0) && (pHalData->rf_tx_pwr_track == NULL)) { -+ rtw_get_phy_file_path(Adapter, pFileName); -+ if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, -+ MAX_PARA_FILE_BUF_LEN) == _TRUE) { -+ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); -+ if (rlen > 0) { -+ rtStatus = _SUCCESS; -+ pHalData->rf_tx_pwr_track = rtw_zvmalloc(rlen); -+ if (pHalData->rf_tx_pwr_track) { -+ _rtw_memcpy(pHalData->rf_tx_pwr_track, pHalData->para_file_buf, rlen); -+ pHalData->rf_tx_pwr_track_len = rlen; -+ } else -+ RTW_INFO("%s rf_tx_pwr_track alloc fail !\n", __FUNCTION__); -+ } -+ } -+ } else { -+ if ((pHalData->rf_tx_pwr_track_len != 0) && (pHalData->rf_tx_pwr_track != NULL)) { -+ _rtw_memcpy(pHalData->para_file_buf, pHalData->rf_tx_pwr_track, pHalData->rf_tx_pwr_track_len); -+ rtStatus = _SUCCESS; -+ } else -+ RTW_INFO("%s(): Critical Error !!!\n", __FUNCTION__); -+ } -+ -+ if (rtStatus == _SUCCESS) { -+ /* RTW_INFO("%s(): read %s successfully\n", __FUNCTION__, pFileName); */ -+ -+ ptmp = pHalData->para_file_buf; -+ for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { -+ if (!IsCommentString(szLine)) { -+ char band[5] = "", path[5] = "", sign[5] = ""; -+ char chnl[5] = "", rate[10] = ""; -+ char data[300] = ""; /* 100 is too small */ -+ -+ if (strlen(szLine) < 10 || szLine[0] != '[') -+ continue; -+ -+ strncpy(band, szLine + 1, 2); -+ strncpy(path, szLine + 5, 1); -+ strncpy(sign, szLine + 8, 1); -+ -+ i = 10; /* szLine+10 */ -+ if (!ParseQualifiedString(szLine, &i, rate, '[', ']')) { -+ /* RTW_INFO("Fail to parse rate!\n"); */ -+ } -+ if (!ParseQualifiedString(szLine, &i, chnl, '[', ']')) { -+ /* RTW_INFO("Fail to parse channel group!\n"); */ -+ } -+ while (szLine[i] != '{' && i < strlen(szLine)) -+ i++; -+ if (!ParseQualifiedString(szLine, &i, data, '{', '}')) { -+ /* RTW_INFO("Fail to parse data!\n"); */ -+ } -+ -+ initDeltaSwingIndexTables(Adapter, band, path, sign, chnl, rate, data); -+ } -+ } -+ } else -+ RTW_INFO("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); -+#if 0 -+ for (i = 0; i < DELTA_SWINGIDX_SIZE; ++i) { -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2ga_p[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2ga_p[i]); -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2ga_n[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2ga_n[i]); -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2gb_p[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2gb_p[i]); -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2gb_n[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2gb_n[i]); -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2g_cck_a_p[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2g_cck_a_p[i]); -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2g_cck_a_n[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2g_cck_a_n[i]); -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2g_cck_b_p[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2g_cck_b_p[i]); -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2g_cck_b_n[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2g_cck_b_n[i]); -+ -+ for (j = 0; j < 3; ++j) { -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_5ga_p[%d][%d] = %d\n", j, i, pRFCalibrateInfo->delta_swing_table_idx_5ga_p[j][i]); -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_5ga_n[%d][%d] = %d\n", j, i, pRFCalibrateInfo->delta_swing_table_idx_5ga_n[j][i]); -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_5gb_p[%d][%d] = %d\n", j, i, pRFCalibrateInfo->delta_swing_table_idx_5gb_p[j][i]); -+ RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_5gb_n[%d][%d] = %d\n", j, i, pRFCalibrateInfo->delta_swing_table_idx_5gb_n[j][i]); -+ } -+ } -+#endif -+ return rtStatus; -+} -+ -+#if CONFIG_TXPWR_LIMIT -+ -+#ifndef DBG_TXPWR_LMT_FILE_PARSE -+#define DBG_TXPWR_LMT_FILE_PARSE 0 -+#endif -+ -+#define PARSE_RET_NO_HDL 0 -+#define PARSE_RET_SUCCESS 1 -+#define PARSE_RET_FAIL 2 -+ -+/* -+* @@Ver=2.0 -+* or -+* @@DomainCode=0x28, Regulation=C6 -+* or -+* @@CountryCode=GB, Regulation=C7 -+*/ -+static u8 parse_reg_exc_config(_adapter *adapter, char *szLine) -+{ -+#define VER_PREFIX "Ver=" -+#define DOMAIN_PREFIX "DomainCode=0x" -+#define COUNTRY_PREFIX "CountryCode=" -+#define REG_PREFIX "Regulation=" -+ -+ const u8 ver_prefix_len = strlen(VER_PREFIX); -+ const u8 domain_prefix_len = strlen(DOMAIN_PREFIX); -+ const u8 country_prefix_len = strlen(COUNTRY_PREFIX); -+ const u8 reg_prefix_len = strlen(REG_PREFIX); -+ u32 i, i_val_s, i_val_e; -+ u32 j; -+ u8 domain = 0xFF; -+ char *country = NULL; -+ u8 parse_reg = 0; -+ -+ if (szLine[0] != '@' || szLine[1] != '@') -+ return PARSE_RET_NO_HDL; -+ -+ i = 2; -+ if (strncmp(szLine + i, VER_PREFIX, ver_prefix_len) == 0) -+ ; /* nothing to do */ -+ else if (strncmp(szLine + i, DOMAIN_PREFIX, domain_prefix_len) == 0) { -+ /* get string after domain prefix to ',' */ -+ i += domain_prefix_len; -+ i_val_s = i; -+ while (szLine[i] != ',') { -+ if (szLine[i] == '\0') -+ return PARSE_RET_FAIL; -+ i++; -+ } -+ i_val_e = i; -+ -+ /* check if all hex */ -+ for (j = i_val_s; j < i_val_e; j++) -+ if (IsHexDigit(szLine[j]) == _FALSE) -+ return PARSE_RET_FAIL; -+ -+ /* get value from hex string */ -+ if (sscanf(szLine + i_val_s, "%hhx", &domain) != 1) -+ return PARSE_RET_FAIL; -+ -+ parse_reg = 1; -+ } else if (strncmp(szLine + i, COUNTRY_PREFIX, country_prefix_len) == 0) { -+ /* get string after country prefix to ',' */ -+ i += country_prefix_len; -+ i_val_s = i; -+ while (szLine[i] != ',') { -+ if (szLine[i] == '\0') -+ return PARSE_RET_FAIL; -+ i++; -+ } -+ i_val_e = i; -+ -+ if (i_val_e - i_val_s != 2) -+ return PARSE_RET_FAIL; -+ -+ /* check if all alpha */ -+ for (j = i_val_s; j < i_val_e; j++) -+ if (is_alpha(szLine[j]) == _FALSE) -+ return PARSE_RET_FAIL; -+ -+ country = szLine + i_val_s; -+ -+ parse_reg = 1; -+ -+ } else -+ return PARSE_RET_FAIL; -+ -+ if (parse_reg) { -+ /* move to 'R' */ -+ while (szLine[i] != 'R') { -+ if (szLine[i] == '\0') -+ return PARSE_RET_FAIL; -+ i++; -+ } -+ -+ /* check if matching regulation prefix */ -+ if (strncmp(szLine + i, REG_PREFIX, reg_prefix_len) != 0) -+ return PARSE_RET_FAIL; -+ -+ /* get string after regulation prefix ending with space */ -+ i += reg_prefix_len; -+ i_val_s = i; -+ while (szLine[i] != ' ' && szLine[i] != '\t' && szLine[i] != '\0') -+ i++; -+ -+ if (i == i_val_s) -+ return PARSE_RET_FAIL; -+ -+ rtw_regd_exc_add_with_nlen(adapter_to_rfctl(adapter), country, domain, szLine + i_val_s, i - i_val_s); -+ } -+ -+ return PARSE_RET_SUCCESS; -+} -+ -+static int -+phy_ParsePowerLimitTableFile( -+ PADAPTER Adapter, -+ char *buffer -+) -+{ -+#define LD_STAGE_EXC_MAPPING 0 -+#define LD_STAGE_TAB_DEFINE 1 -+#define LD_STAGE_TAB_START 2 -+#define LD_STAGE_COLUMN_DEFINE 3 -+#define LD_STAGE_CH_ROW 4 -+ -+ int rtStatus = _FAIL; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); -+ struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -+ u8 loadingStage = LD_STAGE_EXC_MAPPING; -+ u32 i = 0, forCnt = 0; -+ char *szLine, *ptmp; -+ char band[10], bandwidth[10], rateSection[10], ntx[10], colNumBuf[10]; -+ char **regulation = NULL; -+ u8 colNum = 0; -+ -+ if (Adapter->registrypriv.RegDecryptCustomFile == 1) -+ phy_DecryptBBPgParaFile(Adapter, buffer); -+ -+ ptmp = buffer; -+ for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) { -+ if (isAllSpaceOrTab(szLine, sizeof(*szLine))) -+ continue; -+ if (IsCommentString(szLine)) -+ continue; -+ -+ if (loadingStage == LD_STAGE_EXC_MAPPING) { -+ if (szLine[0] == '#' || szLine[1] == '#') { -+ loadingStage = LD_STAGE_TAB_DEFINE; -+ if (DBG_TXPWR_LMT_FILE_PARSE) -+ dump_regd_exc_list(RTW_DBGDUMP, adapter_to_rfctl(Adapter)); -+ } else { -+ if (parse_reg_exc_config(Adapter, szLine) == PARSE_RET_FAIL) { -+ RTW_ERR("Fail to parse regulation exception ruls!\n"); -+ goto exit; -+ } -+ continue; -+ } -+ } -+ -+ if (loadingStage == LD_STAGE_TAB_DEFINE) { -+ /* read "## 2.4G, 20M, 1T, CCK" */ -+ if (szLine[0] != '#' || szLine[1] != '#') -+ continue; -+ -+ /* skip the space */ -+ i = 2; -+ while (szLine[i] == ' ' || szLine[i] == '\t') -+ ++i; -+ -+ szLine[--i] = ' '; /* return the space in front of the regulation info */ -+ -+ /* Parse the label of the table */ -+ _rtw_memset((void *) band, 0, 10); -+ _rtw_memset((void *) bandwidth, 0, 10); -+ _rtw_memset((void *) ntx, 0, 10); -+ _rtw_memset((void *) rateSection, 0, 10); -+ if (!ParseQualifiedString(szLine, &i, band, ' ', ',')) { -+ RTW_ERR("Fail to parse band!\n"); -+ goto exit; -+ } -+ if (!ParseQualifiedString(szLine, &i, bandwidth, ' ', ',')) { -+ RTW_ERR("Fail to parse bandwidth!\n"); -+ goto exit; -+ } -+ if (!ParseQualifiedString(szLine, &i, ntx, ' ', ',')) { -+ RTW_ERR("Fail to parse ntx!\n"); -+ goto exit; -+ } -+ if (!ParseQualifiedString(szLine, &i, rateSection, ' ', ',')) { -+ RTW_ERR("Fail to parse rate!\n"); -+ goto exit; -+ } -+ -+ loadingStage = LD_STAGE_TAB_START; -+ } else if (loadingStage == LD_STAGE_TAB_START) { -+ /* read "## START" */ -+ if (szLine[0] != '#' || szLine[1] != '#') -+ continue; -+ -+ /* skip the space */ -+ i = 2; -+ while (szLine[i] == ' ' || szLine[i] == '\t') -+ ++i; -+ -+ if (strncmp((u8 *)(szLine + i), "START", 5)) { -+ RTW_ERR("Missing \"## START\" label\n"); -+ goto exit; -+ } -+ -+ loadingStage = LD_STAGE_COLUMN_DEFINE; -+ } else if (loadingStage == LD_STAGE_COLUMN_DEFINE) { -+ /* read "## #5# FCC ETSI MKK IC KCC" */ -+ if (szLine[0] != '#' || szLine[1] != '#') -+ continue; -+ -+ /* skip the space */ -+ i = 2; -+ while (szLine[i] == ' ' || szLine[i] == '\t') -+ ++i; -+ -+ _rtw_memset((void *) colNumBuf, 0, 10); -+ if (!ParseQualifiedString(szLine, &i, colNumBuf, '#', '#')) { -+ RTW_ERR("Fail to parse column number!\n"); -+ goto exit; -+ } -+ if (!GetU1ByteIntegerFromStringInDecimal(colNumBuf, &colNum)) { -+ RTW_ERR("Column number \"%s\" is not unsigned decimal\n", colNumBuf); -+ goto exit; -+ } -+ if (colNum == 0) { -+ RTW_ERR("Column number is 0\n"); -+ goto exit; -+ } -+ -+ if (DBG_TXPWR_LMT_FILE_PARSE) -+ RTW_PRINT("[%s][%s][%s][%s] column num:%d\n", band, bandwidth, rateSection, ntx, colNum); -+ -+ regulation = (char **)rtw_zmalloc(sizeof(char *) * colNum); -+ if (!regulation) { -+ RTW_ERR("Regulation alloc fail\n"); -+ goto exit; -+ } -+ -+ for (forCnt = 0; forCnt < colNum; ++forCnt) { -+ u32 i_ns; -+ -+ /* skip the space */ -+ while (szLine[i] == ' ' || szLine[i] == '\t') -+ i++; -+ i_ns = i; -+ -+ while (szLine[i] != ' ' && szLine[i] != '\t' && szLine[i] != '\0') -+ i++; -+ -+ regulation[forCnt] = (char *)rtw_malloc(i - i_ns + 1); -+ if (!regulation[forCnt]) { -+ RTW_ERR("Regulation alloc fail\n"); -+ goto exit; -+ } -+ -+ _rtw_memcpy(regulation[forCnt], szLine + i_ns, i - i_ns); -+ regulation[forCnt][i - i_ns] = '\0'; -+ } -+ -+ if (DBG_TXPWR_LMT_FILE_PARSE) { -+ RTW_PRINT("column name:"); -+ for (forCnt = 0; forCnt < colNum; ++forCnt) -+ _RTW_PRINT(" %s", regulation[forCnt]); -+ _RTW_PRINT("\n"); -+ } -+ -+ loadingStage = LD_STAGE_CH_ROW; -+ } else if (loadingStage == LD_STAGE_CH_ROW) { -+ char channel[10] = {0}, powerLimit[10] = {0}; -+ u8 cnt = 0; -+ -+ /* the table ends */ -+ if (szLine[0] == '#' && szLine[1] == '#') { -+ i = 2; -+ while (szLine[i] == ' ' || szLine[i] == '\t') -+ ++i; -+ -+ if (strncmp((u8 *)(szLine + i), "END", 3) == 0) { -+ loadingStage = LD_STAGE_TAB_DEFINE; -+ if (regulation) { -+ for (forCnt = 0; forCnt < colNum; ++forCnt) { -+ if (regulation[forCnt]) { -+ rtw_mfree(regulation[forCnt], strlen(regulation[forCnt]) + 1); -+ regulation[forCnt] = NULL; -+ } -+ } -+ rtw_mfree((u8 *)regulation, sizeof(char *) * colNum); -+ regulation = NULL; -+ } -+ colNum = 0; -+ continue; -+ } else { -+ RTW_ERR("Missing \"## END\" label\n"); -+ goto exit; -+ } -+ } -+ -+ if ((szLine[0] != 'c' && szLine[0] != 'C') || -+ (szLine[1] != 'h' && szLine[1] != 'H') -+ ) { -+ RTW_WARN("Wrong channel prefix: '%c','%c'(%d,%d)\n", szLine[0], szLine[1], szLine[0], szLine[1]); -+ continue; -+ } -+ i = 2;/* move to the location behind 'h' */ -+ -+ /* load the channel number */ -+ cnt = 0; -+ while (szLine[i] >= '0' && szLine[i] <= '9') { -+ channel[cnt] = szLine[i]; -+ ++cnt; -+ ++i; -+ } -+ /* RTW_INFO("chnl %s!\n", channel); */ -+ -+ for (forCnt = 0; forCnt < colNum; ++forCnt) { -+ /* skip the space between channel number and the power limit value */ -+ while (szLine[i] == ' ' || szLine[i] == '\t') -+ ++i; -+ -+ /* load the power limit value */ -+ _rtw_memset((void *) powerLimit, 0, 10); -+ -+ if (szLine[i] == 'W' && szLine[i + 1] == 'W') { -+ /* -+ * case "WW" assign special ww value -+ * means to get minimal limit in other regulations at same channel -+ */ -+ s8 ww_value = phy_txpwr_ww_lmt_value(Adapter); -+ -+ sprintf(powerLimit, "%d", ww_value); -+ i += 2; -+ -+ } else if (szLine[i] == 'N' && szLine[i + 1] == 'A') { -+ /* -+ * case "NA" assign max txgi value -+ * means no limitation -+ */ -+ sprintf(powerLimit, "%d", hal_spec->txgi_max); -+ i += 2; -+ -+ } else if ((szLine[i] >= '0' && szLine[i] <= '9') || szLine[i] == '.' -+ || szLine[i] == '+' || szLine[i] == '-' -+ ){ -+ /* case of dBm value */ -+ u8 integer = 0, fraction = 0, negative = 0; -+ u32 u4bMove; -+ s8 lmt = 0; -+ -+ if (szLine[i] == '+' || szLine[i] == '-') { -+ if (szLine[i] == '-') -+ negative = 1; -+ i++; -+ } -+ -+ if (GetFractionValueFromString(&szLine[i], &integer, &fraction, &u4bMove)) -+ i += u4bMove; -+ else { -+ RTW_ERR("Limit \"%s\" is not valid decimal\n", &szLine[i]); -+ goto exit; -+ } -+ -+ /* transform to string of value in unit of txgi */ -+ lmt = integer * hal_spec->txgi_pdbm + ((u16)fraction * (u16)hal_spec->txgi_pdbm) / 100; -+ if (negative) -+ lmt = -lmt; -+ sprintf(powerLimit, "%d", lmt); -+ -+ } else { -+ RTW_ERR("Wrong limit expression \"%c%c\"(%d, %d)\n" -+ , szLine[i], szLine[i + 1], szLine[i], szLine[i + 1]); -+ goto exit; -+ } -+ -+ /* store the power limit value */ -+ phy_set_tx_power_limit(pDM_Odm, (u8 *)regulation[forCnt], (u8 *)band, -+ (u8 *)bandwidth, (u8 *)rateSection, (u8 *)ntx, (u8 *)channel, (u8 *)powerLimit); -+ -+ } -+ } -+ } -+ -+ rtStatus = _SUCCESS; -+ -+exit: -+ if (regulation) { -+ for (forCnt = 0; forCnt < colNum; ++forCnt) { -+ if (regulation[forCnt]) { -+ rtw_mfree(regulation[forCnt], strlen(regulation[forCnt]) + 1); -+ regulation[forCnt] = NULL; -+ } -+ } -+ rtw_mfree((u8 *)regulation, sizeof(char *) * colNum); -+ regulation = NULL; -+ } -+ -+ RTW_INFO("%s return %d\n", __func__, rtStatus); -+ return rtStatus; -+} -+ -+int -+PHY_ConfigRFWithPowerLimitTableParaFile( -+ PADAPTER Adapter, -+ const char *pFileName -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ int rlen = 0, rtStatus = _FAIL; -+ -+ if (!(Adapter->registrypriv.load_phy_file & LOAD_RF_TXPWR_LMT_PARA_FILE)) -+ return rtStatus; -+ -+ _rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN); -+ -+ if (pHalData->rf_tx_pwr_lmt == NULL) { -+ rtw_get_phy_file_path(Adapter, pFileName); -+ if (rtw_readable_file_sz_chk(rtw_phy_para_file_path, -+ MAX_PARA_FILE_BUF_LEN) == _TRUE) { -+ rlen = rtw_retrieve_from_file(rtw_phy_para_file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN); -+ if (rlen > 0) { -+ rtStatus = _SUCCESS; -+ pHalData->rf_tx_pwr_lmt = rtw_zvmalloc(rlen); -+ if (pHalData->rf_tx_pwr_lmt) { -+ _rtw_memcpy(pHalData->rf_tx_pwr_lmt, pHalData->para_file_buf, rlen); -+ pHalData->rf_tx_pwr_lmt_len = rlen; -+ } else -+ RTW_INFO("%s rf_tx_pwr_lmt alloc fail !\n", __FUNCTION__); -+ } -+ } -+ } else { -+ if ((pHalData->rf_tx_pwr_lmt_len != 0) && (pHalData->rf_tx_pwr_lmt != NULL)) { -+ _rtw_memcpy(pHalData->para_file_buf, pHalData->rf_tx_pwr_lmt, pHalData->rf_tx_pwr_lmt_len); -+ rtStatus = _SUCCESS; -+ } else -+ RTW_INFO("%s(): Critical Error !!!\n", __FUNCTION__); -+ } -+ -+ if (rtStatus == _SUCCESS) { -+ /* RTW_INFO("%s(): read %s ok\n", __FUNCTION__, pFileName); */ -+ rtStatus = phy_ParsePowerLimitTableFile(Adapter, pHalData->para_file_buf); -+ } else -+ RTW_INFO("%s(): No File %s, Load from HWImg Array!\n", __FUNCTION__, pFileName); -+ -+ return rtStatus; -+} -+#endif /* CONFIG_TXPWR_LIMIT */ -+ -+void phy_free_filebuf_mask(_adapter *padapter, u8 mask) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (pHalData->mac_reg && (mask & LOAD_MAC_PARA_FILE)) { -+ rtw_vmfree(pHalData->mac_reg, pHalData->mac_reg_len); -+ pHalData->mac_reg = NULL; -+ } -+ if (mask & LOAD_BB_PARA_FILE) { -+ if (pHalData->bb_phy_reg) { -+ rtw_vmfree(pHalData->bb_phy_reg, pHalData->bb_phy_reg_len); -+ pHalData->bb_phy_reg = NULL; -+ } -+ if (pHalData->bb_agc_tab) { -+ rtw_vmfree(pHalData->bb_agc_tab, pHalData->bb_agc_tab_len); -+ pHalData->bb_agc_tab = NULL; -+ } -+ } -+ if (pHalData->bb_phy_reg_pg && (mask & LOAD_BB_PG_PARA_FILE)) { -+ rtw_vmfree(pHalData->bb_phy_reg_pg, pHalData->bb_phy_reg_pg_len); -+ pHalData->bb_phy_reg_pg = NULL; -+ } -+ if (pHalData->bb_phy_reg_mp && (mask & LOAD_BB_MP_PARA_FILE)) { -+ rtw_vmfree(pHalData->bb_phy_reg_mp, pHalData->bb_phy_reg_mp_len); -+ pHalData->bb_phy_reg_mp = NULL; -+ } -+ if (mask & LOAD_RF_PARA_FILE) { -+ if (pHalData->rf_radio_a) { -+ rtw_vmfree(pHalData->rf_radio_a, pHalData->rf_radio_a_len); -+ pHalData->rf_radio_a = NULL; -+ } -+ if (pHalData->rf_radio_b) { -+ rtw_vmfree(pHalData->rf_radio_b, pHalData->rf_radio_b_len); -+ pHalData->rf_radio_b = NULL; -+ } -+ } -+ if (pHalData->rf_tx_pwr_track && (mask & LOAD_RF_TXPWR_TRACK_PARA_FILE)) { -+ rtw_vmfree(pHalData->rf_tx_pwr_track, pHalData->rf_tx_pwr_track_len); -+ pHalData->rf_tx_pwr_track = NULL; -+ } -+ if (pHalData->rf_tx_pwr_lmt && (mask & LOAD_RF_TXPWR_LMT_PARA_FILE)) { -+ rtw_vmfree(pHalData->rf_tx_pwr_lmt, pHalData->rf_tx_pwr_lmt_len); -+ pHalData->rf_tx_pwr_lmt = NULL; -+ } -+} -+ -+inline void phy_free_filebuf(_adapter *padapter) -+{ -+ phy_free_filebuf_mask(padapter, 0xFF); -+} -+ -+#endif -+ -+/* -+* TX power limit of regulatory without HAL consideration -+* Return value in unit of TX Gain Index -+* hal_spec.txgi_max means unspecified -+*/ -+s8 phy_get_txpwr_regd_lmt(_adapter *adapter, struct hal_spec_t *hal_spec, u8 cch, enum channel_width bw, u8 ntx_idx) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ s16 total_mbm = UNSPECIFIED_MBM; -+ s8 lmt; -+ -+ if ((adapter->registrypriv.RegEnableTxPowerLimit == 2 && hal_data->EEPROMRegulatory != 1) || -+ adapter->registrypriv.RegEnableTxPowerLimit == 0) -+ goto exit; -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+ if (rfctl->regd_src == REGD_SRC_OS) -+ total_mbm = rtw_os_get_total_txpwr_regd_lmt_mbm(adapter, cch, bw); -+#endif -+ -+exit: -+ if (total_mbm != UNSPECIFIED_MBM) -+ lmt = (total_mbm - mb_of_ntx(ntx_idx + 1) - rfctl->antenna_gain) * hal_spec->txgi_pdbm / MBM_PDBM; -+ else -+ lmt = hal_spec->txgi_max; -+ -+ return lmt; -+} -+ -+/* -+* check if user specified mbm is valid -+*/ -+bool phy_is_txpwr_user_mbm_valid(_adapter *adapter, s16 mbm) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ -+ /* 1T upper bound check */ -+ if (hal_spec->txgi_max <= mbm * hal_spec->txgi_pdbm / MBM_PDBM) -+ return 0; -+ -+ return 1; -+} -+ -+bool phy_is_txpwr_user_target_specified(_adapter *adapter) -+{ -+ s16 total_mbm = UNSPECIFIED_MBM; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ total_mbm = rtw_cfg80211_dev_get_total_txpwr_target_mbm(adapter_to_dvobj(adapter)); -+#endif -+ -+ return total_mbm != UNSPECIFIED_MBM; -+} -+ -+/* -+* Return value in unit of TX Gain Index -+* hal_spec.txgi_max means unspecified -+*/ -+s8 phy_get_txpwr_user_target(_adapter *adapter, struct hal_spec_t *hal_spec, u8 ntx_idx) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ s16 total_mbm = UNSPECIFIED_MBM; -+ s8 target; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ total_mbm = rtw_cfg80211_dev_get_total_txpwr_target_mbm(adapter_to_dvobj(adapter)); -+#endif -+ if (total_mbm != UNSPECIFIED_MBM) -+ target = (total_mbm - mb_of_ntx(ntx_idx + 1) - rfctl->antenna_gain) * hal_spec->txgi_pdbm / MBM_PDBM; -+ else -+ target = hal_spec->txgi_max; -+ -+ return target; -+} -+ -+/* -+* Return value in unit of TX Gain Index -+* hal_spec.txgi_max means unspecified -+*/ -+s8 phy_get_txpwr_user_lmt(_adapter *adapter, struct hal_spec_t *hal_spec, u8 ntx_idx) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ s16 total_mbm = UNSPECIFIED_MBM; -+ s8 lmt; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ total_mbm = rtw_cfg80211_dev_get_total_txpwr_lmt_mbm(adapter_to_dvobj(adapter)); -+#endif -+ if (total_mbm != UNSPECIFIED_MBM) -+ lmt = (total_mbm - mb_of_ntx(ntx_idx + 1) - rfctl->antenna_gain) * hal_spec->txgi_pdbm / MBM_PDBM; -+ else -+ lmt = hal_spec->txgi_max; -+ -+ return lmt; -+} -+ -+/* -+* Return value in unit of TX Gain Index -+* 0 means unspecified -+*/ -+s8 phy_get_txpwr_tpc(_adapter *adapter, struct hal_spec_t *hal_spec) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ u16 cnst = 0; -+ -+ if (rfctl->tpc_mode == TPC_MODE_MANUAL) -+ cnst = rfctl->tpc_manual_constraint * hal_spec->txgi_pdbm / MBM_PDBM; -+ -+ return -cnst; -+} -+ -+void dump_txpwr_tpc_settings(void *sel, _adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ if (rfctl->tpc_mode == TPC_MODE_DISABLE) -+ RTW_PRINT_SEL(sel, "mode:DISABLE(%d)\n", rfctl->tpc_mode); -+ else if (rfctl->tpc_mode == TPC_MODE_MANUAL) { -+ RTW_PRINT_SEL(sel, "mode:MANUAL(%d)\n", rfctl->tpc_mode); -+ RTW_PRINT_SEL(sel, "constraint:%d (mB)\n", rfctl->tpc_manual_constraint); -+ } -+} -+ -+void dump_txpwr_antenna_gain(void *sel, _adapter *adapter) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ RTW_PRINT_SEL(sel, "%d (mBi)\n", rfctl->antenna_gain); -+} -+ -+/* -+* Return value in unit of TX Gain Index -+*/ -+s8 phy_get_txpwr_target(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate, u8 ntx_idx -+ , enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch, bool reg_max, struct txpwr_idx_comp *tic) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ s8 target, by_rate = 0, btc_diff = 0, extra = 0; -+ s8 lmt, rlmt, utgt, ulmt; -+ s8 tpc = 0; -+ -+ rlmt = lmt = utgt = ulmt = hal_spec->txgi_max; -+ -+ if (band != BAND_ON_2_4G && IS_CCK_RATE(rate)) -+ goto exit; -+ -+ if (!reg_max) { -+ utgt = phy_get_txpwr_user_target(adapter, hal_spec, ntx_idx); -+ if (utgt != hal_spec->txgi_max) -+ goto get_lmt; -+ } -+ -+#ifdef CONFIG_RTL8812A -+ if (IS_HARDWARE_TYPE_8812(adapter) -+ && phy_get_txpwr_target_skip_by_rate_8812a(adapter, rate)) -+ by_rate = phy_get_target_txpwr(adapter, band, rfpath, rs); -+ else -+#endif -+ by_rate = phy_get_txpwr_by_rate(adapter, band, rfpath, rs, rate); -+ if (by_rate == hal_spec->txgi_max) -+ by_rate = 0; -+ -+#ifdef CONFIG_BT_COEXIST -+ if (!reg_max) { -+ if (hal_data->EEPROMBluetoothCoexist == _TRUE) -+ btc_diff = -(rtw_btcoex_query_reduced_wl_pwr_lvl(adapter) * hal_spec->txgi_pdbm); -+ } -+#endif -+ -+ extra = rtw_hal_get_txpwr_target_extra_bias(adapter, rfpath, rs, rate, bw, band, cch); -+ -+get_lmt: -+ rlmt = phy_get_txpwr_regd_lmt(adapter, hal_spec, cch, bw, ntx_idx); -+ lmt = phy_get_txpwr_lmt_sub_chs(adapter, NULL, band, bw, rfpath, rate, ntx_idx, cch, opch, reg_max); -+ if (!reg_max) -+ ulmt = phy_get_txpwr_user_lmt(adapter, hal_spec, ntx_idx); -+ /* TODO: limit from outer source, ex: 11d */ -+ -+ if (!reg_max) -+ tpc = phy_get_txpwr_tpc(adapter, hal_spec); -+ -+exit: -+ if (utgt != hal_spec->txgi_max) -+ target = utgt; -+ else -+ target = by_rate + btc_diff + extra; -+ -+ if (target > rlmt) -+ target = rlmt; -+ if (target > lmt) -+ target = lmt; -+ if (target > ulmt) -+ target = ulmt; -+ -+ target += tpc; -+ -+ if (tic) { -+ tic->target = target; -+ if (utgt == hal_spec->txgi_max) { -+ tic->by_rate = by_rate; -+ tic->btc = btc_diff; -+ tic->extra = extra; -+ } -+ tic->utarget = utgt; -+ tic->rlimit = rlmt; -+ tic->limit = lmt; -+ tic->ulimit = ulmt; -+ tic->tpc = tpc; -+ } -+ -+ return target; -+} -+ -+/* TODO: common dpd_diff getting API from phydm */ -+#ifdef CONFIG_RTL8822C -+#include "./rtl8822c/rtl8822c.h" -+#endif -+ -+/* -+* Return in unit of TX Gain Index -+*/ -+s8 phy_get_txpwr_amends(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate, u8 ntx_idx -+ , enum channel_width bw, BAND_TYPE band, u8 cch, struct txpwr_idx_comp *tic) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ s8 tpt_diff = 0, dpd_diff = 0, val = 0; -+ -+ if (band != BAND_ON_2_4G && IS_CCK_RATE(rate)) -+ goto exit; -+ -+ if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8188GTV(adapter) -+ || IS_HARDWARE_TYPE_8192E(adapter) || IS_HARDWARE_TYPE_8192F(adapter) -+ || IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8703B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) -+ || IS_HARDWARE_TYPE_8710B(adapter) -+ || IS_HARDWARE_TYPE_8821(adapter) || IS_HARDWARE_TYPE_8812(adapter) -+ ) -+ tpt_diff = PHY_GetTxPowerTrackingOffset(adapter, rfpath, rate); -+ -+#ifdef CONFIG_RTL8822C -+ if (IS_HARDWARE_TYPE_8822C(adapter)) -+ dpd_diff = -(rtl8822c_get_dis_dpd_by_rate_diff(adapter, rate) * hal_spec->txgi_pdbm); -+#endif -+ -+exit: -+ if (tic) { -+ tic->tpt = tpt_diff; -+ tic->dpd = dpd_diff; -+ } -+ -+ return tpt_diff + dpd_diff; -+} -+ -+#ifdef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET -+s8 phy_get_tssi_txpwr_by_rate_ref(_adapter *adapter, enum rf_path path -+ , enum channel_width bw, u8 cch, u8 opch) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 ntx_idx = phy_get_current_tx_num(adapter, MGN_MCS7); -+ BAND_TYPE band = cch > 14 ? BAND_ON_5G : BAND_ON_2_4G; -+ s8 pwr_idx; -+ -+ pwr_idx = phy_get_txpwr_target(adapter, path, HT_1SS, MGN_MCS7 -+ , ntx_idx, bw, band, cch, opch, 0, NULL); -+ pwr_idx += phy_get_txpwr_amends(adapter, path, HT_1SS, MGN_MCS7 -+ , ntx_idx, bw, band, cch, NULL); -+ -+ return pwr_idx; -+} -+#endif -+ -+/* -+ * Rteurn tx power index for rate -+ */ -+u8 hal_com_get_txpwr_idx(_adapter *adapter, enum rf_path rfpath -+ , RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch -+ , struct txpwr_idx_comp *tic) -+{ -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ s16 power_idx = 0; -+ s8 base = 0; -+ s8 rate_target, rate_amends; -+ u8 ntx_idx = phy_get_current_tx_num(adapter, rate); -+ -+ /* target */ -+ rate_target = phy_get_txpwr_target(adapter, rfpath, rs, rate, ntx_idx, bw, band, cch, opch, 0, tic); -+ -+ /* amends */ -+ rate_amends = phy_get_txpwr_amends(adapter, rfpath, rs, rate, ntx_idx, bw, band, cch, tic); -+ -+ switch (hal->txpwr_pg_mode) { -+#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ case TXPWR_PG_WITH_PWR_IDX: { -+ /* -+ * power index = -+ * 1. pg base (per rate section) + -+ * 2. target diff (per rate) to target of its rate section + -+ * 3. amends diff (per rate) -+ */ -+ u8 rs_target; -+ -+ base = phy_get_pg_txpwr_idx(adapter, rfpath, rs, ntx_idx, bw, band, cch); -+ rs_target = phy_get_target_txpwr(adapter, band, rfpath, rs); -+ power_idx = base + (rate_target - rs_target) + (rate_amends); -+ -+ if (tic) { -+ if (tic->utarget == hal_spec->txgi_max) -+ tic->by_rate -= rs_target; -+ else -+ tic->utarget -= rs_target; -+ if (tic->rlimit != hal_spec->txgi_max) -+ tic->rlimit -= rs_target; -+ if (tic->limit != hal_spec->txgi_max) -+ tic->limit -= rs_target; -+ if (tic->ulimit != hal_spec->txgi_max) -+ tic->ulimit -= rs_target; -+ } -+ } -+ break; -+#endif -+#ifdef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET -+ case TXPWR_PG_WITH_TSSI_OFFSET: { -+ /* -+ * power index = -+ * 1. base (fixed) + -+ * 2. target (per rate) + -+ * 3. amends diff (per rate) -+ * base is selected that power index of MCS7 == halrf_get_tssi_codeword_for_txindex() -+ */ -+ s8 mcs7_idx; -+ -+ mcs7_idx = phy_get_tssi_txpwr_by_rate_ref(adapter, rfpath, bw, cch, opch); -+ base = halrf_get_tssi_codeword_for_txindex(adapter_to_phydm(adapter)) - mcs7_idx; -+ power_idx = base + rate_target + rate_amends; -+ } -+ break; -+#endif -+ } -+ -+ if (tic) { -+ tic->ntx_idx = ntx_idx; -+ tic->base = base; -+ } -+ -+ if (power_idx < 0) -+ power_idx = 0; -+ else if (power_idx > hal_spec->txgi_max) -+ power_idx = hal_spec->txgi_max; -+ -+#if defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8812A) -+ if ((IS_HARDWARE_TYPE_8821(adapter) || IS_HARDWARE_TYPE_8812(adapter)) -+ && power_idx % 2 == 1 && !IS_NORMAL_CHIP(hal->version_id)) -+ --power_idx; -+#endif -+ -+ return power_idx; -+} -+ -+static s16 phy_get_txpwr_mbm(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate -+ , enum channel_width bw, u8 cch, u8 opch, bool total, bool reg_max, bool eirp, struct txpwr_idx_comp *tic) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ BAND_TYPE band = cch <= 14 ? BAND_ON_2_4G : BAND_ON_5G; -+ u8 ntx_idx_max, ntx_idx, i; -+ s16 val, max = UNSPECIFIED_MBM; -+ -+ if (reg_max) { -+ ntx_idx_max = phy_get_capable_tx_num(adapter, rate); -+ ntx_idx = rate_section_to_tx_num(rs); -+ if (ntx_idx > ntx_idx_max) { -+ rtw_warn_on(1); -+ return 0; -+ } -+ } else -+ ntx_idx_max = ntx_idx = phy_get_current_tx_num(adapter, rate); -+ -+ for (i = 0; ntx_idx + i <= ntx_idx_max; i++) { -+ val = phy_get_txpwr_target(adapter, rfpath, rs, rate, ntx_idx, bw, band, cch, opch, reg_max, tic); -+ val = (val * MBM_PDBM) / hal_spec->txgi_pdbm; -+ if (total) -+ val += mb_of_ntx(ntx_idx + 1); -+ if (eirp) -+ val += rfctl->antenna_gain; -+ -+ if (max == UNSPECIFIED_MBM || max < val) -+ max = val; -+ } -+ -+ if (tic) -+ tic->ntx_idx = ntx_idx; -+ -+ if (max == UNSPECIFIED_MBM) { -+ rtw_warn_on(1); -+ max = 0; -+ } -+ return max; -+} -+ -+/* get txpowr in mBm for single path */ -+s16 phy_get_txpwr_single_mbm(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate -+ , enum channel_width bw, u8 cch, u8 opch, bool reg_max, bool eirp, struct txpwr_idx_comp *tic) -+{ -+ return phy_get_txpwr_mbm(adapter, rfpath, rs, rate, bw, cch, opch, 0, reg_max, eirp, tic); -+} -+ -+/* get txpowr in mBm with effect of N-TX */ -+s16 phy_get_txpwr_total_mbm(_adapter *adapter, RATE_SECTION rs, u8 rate -+ , enum channel_width bw, u8 cch, u8 opch, bool reg_max, bool eirp, struct txpwr_idx_comp *tic) -+{ -+ /* assume all path have same txpower target */ -+ return phy_get_txpwr_mbm(adapter, RF_PATH_A, rs, rate, bw, cch, opch, 1, reg_max, eirp, tic); -+} -+ -+static s16 _phy_get_txpwr_max_mbm(_adapter *adapter, s8 rfpath -+ , enum channel_width bw, u8 cch, u8 opch, u16 bmp_cck_ofdm, u32 bmp_ht, u64 bmp_vht, bool reg_max, bool eirp) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ BAND_TYPE band = cch <= 14 ? BAND_ON_2_4G : BAND_ON_5G; -+ u8 tx_num; -+ RATE_SECTION rs; -+ u8 hw_rate; -+ int i; -+ s16 max = UNSPECIFIED_MBM, mbm; -+ -+ if (0) -+ RTW_INFO("cck_ofdm:0x%04x, ht:0x%08x, vht:0x%016llx\n", bmp_cck_ofdm, bmp_ht, bmp_vht); -+ -+ for (rs = 0; rs < RATE_SECTION_NUM; rs++) { -+ tx_num = rate_section_to_tx_num(rs); -+ if (tx_num + 1 > hal_data->tx_nss) -+ continue; -+ -+ if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs)) -+ continue; -+ -+ if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) -+ continue; -+ -+ for (i = 0; i < rates_by_sections[rs].rate_num; i++) { -+ hw_rate = MRateToHwRate(rates_by_sections[rs].rates[i]); -+ if (IS_LEGACY_HRATE(hw_rate)) { -+ if (!(bmp_cck_ofdm & BIT(hw_rate))) -+ continue; -+ } else if (IS_HT_HRATE(hw_rate)) { -+ if (!(bmp_ht & BIT(hw_rate - DESC_RATEMCS0))) -+ continue; -+ } else if (IS_VHT_HRATE(hw_rate)) { -+ if (!(bmp_vht & BIT(hw_rate - DESC_RATEVHTSS1MCS0))) -+ continue; -+ } -+ -+ if (rfpath < 0) /* total */ -+ mbm = phy_get_txpwr_total_mbm(adapter, rs, rates_by_sections[rs].rates[i], bw, cch, opch, reg_max, eirp, NULL); -+ else -+ mbm = phy_get_txpwr_single_mbm(adapter, rfpath, rs, rates_by_sections[rs].rates[i], bw, cch, opch, reg_max, eirp, NULL); -+ -+ if (max == UNSPECIFIED_MBM || mbm > max) -+ max = mbm; -+ } -+ } -+ -+ return max; -+} -+ -+s16 phy_get_txpwr_single_max_mbm(_adapter *adapter, u8 rfpath -+ , enum channel_width bw, u8 cch, u8 opch, u16 bmp_cck_ofdm, u32 bmp_ht, u64 bmp_vht, bool reg_max, bool eirp) -+{ -+ return _phy_get_txpwr_max_mbm(adapter, rfpath, bw, cch, opch, bmp_cck_ofdm, bmp_ht, bmp_vht, reg_max, eirp); -+} -+ -+s16 phy_get_txpwr_total_max_mbm(_adapter *adapter -+ , enum channel_width bw, u8 cch, u8 opch, u16 bmp_cck_ofdm, u32 bmp_ht, u64 bmp_vht, bool reg_max, bool eirp) -+{ -+ return _phy_get_txpwr_max_mbm(adapter, -1, bw, cch, opch, bmp_cck_ofdm, bmp_ht, bmp_vht, reg_max, eirp); -+} -+ -+s8 -+phy_get_tx_power_final_absolute_value(_adapter *adapter, u8 rfpath, u8 rate, -+ enum channel_width bw, u8 cch) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ RATE_SECTION rs = mgn_rate_to_rs(rate); -+ BAND_TYPE band = cch <= 14 ? BAND_ON_2_4G : BAND_ON_5G; -+ s8 val; -+ -+ val = phy_get_txpwr_target(adapter, rfpath -+ , rs, rate, phy_get_current_tx_num(adapter, rate), bw, band, cch, 0, 0, NULL); -+ -+ val /= hal_spec->txgi_pdbm; -+ -+ return val; -+} -diff --git a/drivers/staging/rtl8723cs/hal/hal_dm.c b/drivers/staging/rtl8723cs/hal/hal_dm.c -new file mode 100644 -index 000000000000..b42235a179dd ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_dm.c -@@ -0,0 +1,1937 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2014 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+ -+/* A mapping from HalData to ODM. */ -+enum odm_board_type boardType(u8 InterfaceSel) -+{ -+ enum odm_board_type board = ODM_BOARD_DEFAULT; -+ -+#ifdef CONFIG_PCI_HCI -+ INTERFACE_SELECT_PCIE pcie = (INTERFACE_SELECT_PCIE)InterfaceSel; -+ switch (pcie) { -+ case INTF_SEL0_SOLO_MINICARD: -+ board |= ODM_BOARD_MINICARD; -+ break; -+ case INTF_SEL1_BT_COMBO_MINICARD: -+ board |= ODM_BOARD_BT; -+ board |= ODM_BOARD_MINICARD; -+ break; -+ default: -+ board = ODM_BOARD_DEFAULT; -+ break; -+ } -+ -+#elif defined(CONFIG_USB_HCI) -+ INTERFACE_SELECT_USB usb = (INTERFACE_SELECT_USB)InterfaceSel; -+ switch (usb) { -+ case INTF_SEL1_USB_High_Power: -+ board |= ODM_BOARD_EXT_LNA; -+ board |= ODM_BOARD_EXT_PA; -+ break; -+ case INTF_SEL2_MINICARD: -+ board |= ODM_BOARD_MINICARD; -+ break; -+ case INTF_SEL4_USB_Combo: -+ board |= ODM_BOARD_BT; -+ break; -+ case INTF_SEL5_USB_Combo_MF: -+ board |= ODM_BOARD_BT; -+ break; -+ case INTF_SEL0_USB: -+ case INTF_SEL3_USB_Solo: -+ default: -+ board = ODM_BOARD_DEFAULT; -+ break; -+ } -+ -+#endif -+ /* RTW_INFO("===> boardType(): (pHalData->InterfaceSel, pDM_Odm->BoardType) = (%d, %d)\n", InterfaceSel, board); */ -+ -+ return board; -+} -+ -+void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter) -+{ -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter); -+ struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -+ -+ if (hal->RegIQKFWOffload) { -+ rtw_sctx_init(&hal->iqk_sctx, 0); -+ phydm_fwoffload_ability_init(p_dm_odm, PHYDM_RF_IQK_OFFLOAD); -+ } else -+ phydm_fwoffload_ability_clear(p_dm_odm, PHYDM_RF_IQK_OFFLOAD); -+ -+ RTW_INFO("IQK FW offload:%s\n", hal->RegIQKFWOffload ? "enable" : "disable"); -+ -+ if (rtw_mi_check_status(adapter, MI_LINKED)) { -+ #ifdef CONFIG_LPS -+ LPS_Leave(adapter, "SWITCH_IQK_OFFLOAD"); -+ #endif -+ halrf_iqk_trigger(p_dm_odm, _FALSE); -+ } -+} -+ -+#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1) \ -+ || (RTL8723F_SUPPORT == 1)) -+void rtw_phydm_iqk_trigger(_adapter *adapter) -+{ -+ struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -+ u8 clear = _TRUE; -+ u8 segment = _FALSE; -+ u8 rfk_forbidden = _FALSE; -+ -+ halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); -+#if (RTL8822C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8723F_SUPPORT == 1) -+ /* halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_IQK_SEGMENT, segment); to do */ -+ halrf_rf_k_connect_trigger(p_dm_odm, _TRUE, SEGMENT_FREE); -+#else -+ /*segment = _rtw_phydm_iqk_segment_chk(adapter);*/ -+ halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_IQK_SEGMENT, segment); -+ halrf_segment_iqk_trigger(p_dm_odm, clear, segment); -+#endif -+} -+#endif -+ -+void rtw_phydm_iqk_trigger_all(_adapter *adapter) -+{ -+ struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -+ u8 clear = _TRUE; -+ u8 segment = _FALSE; -+ u8 rfk_forbidden = _FALSE; -+ -+#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1) \ -+ || (RTL8723F_SUPPORT == 1)) -+ halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); -+#if (RTL8822C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8723F_SUPPORT == 1) -+ /* halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_IQK_SEGMENT, segment); to do */ -+ halrf_rf_k_connect_trigger(p_dm_odm, _TRUE, SEGMENT_FREE); -+#else -+ /*segment = _rtw_phydm_iqk_segment_chk(adapter);*/ -+ halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_IQK_SEGMENT, segment); -+ halrf_segment_iqk_trigger(p_dm_odm, clear, segment); -+#endif /* (RTL8822C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) (RTL8723F_SUPPORT == 1) */ -+#else -+ halrf_iqk_trigger(p_dm_odm, _FALSE); -+#endif /* ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) -+ (RTL8723F_SUPPORT == 1) */ -+} -+ -+void rtw_phydm_iqk_trigger_dbg(_adapter *adapter, bool recovery, bool clear, bool segment) -+{ -+ struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -+ -+#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) -+ halrf_segment_iqk_trigger(p_dm_odm, clear, segment); -+#else -+ halrf_iqk_trigger(p_dm_odm, recovery); -+#endif -+} -+void rtw_phydm_lck_trigger(_adapter *adapter) -+{ -+ struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -+ -+ halrf_lck_trigger(p_dm_odm); -+} -+ -+void rtw_hal_phydm_cal_trigger(_adapter *adapter) -+{ -+ struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -+ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ LeaveAllPowerSaveModeDirect(adapter); -+ -+ rtw_phydm_iqk_trigger_all(adapter); -+ -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+} -+ -+#ifdef CONFIG_DBG_RF_CAL -+void rtw_hal_iqk_test(_adapter *adapter, bool recovery, bool clear, bool segment) -+{ -+ struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -+ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ LeaveAllPowerSaveModeDirect(adapter); -+ -+ rtw_phydm_ability_backup(adapter); -+ rtw_phydm_func_disable_all(adapter); -+ -+ halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_ABILITY, HAL_RF_IQK); -+ -+ rtw_phydm_iqk_trigger_dbg(adapter, recovery, clear, segment); -+ rtw_phydm_ability_restore(adapter); -+ -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+} -+ -+void rtw_hal_lck_test(_adapter *adapter) -+{ -+ struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -+ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ LeaveAllPowerSaveModeDirect(adapter); -+ -+ rtw_phydm_ability_backup(adapter); -+ rtw_phydm_func_disable_all(adapter); -+ -+ halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_ABILITY, HAL_RF_LCK); -+ -+ rtw_phydm_lck_trigger(adapter); -+ -+ rtw_phydm_ability_restore(adapter); -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+} -+#endif -+ -+#ifdef CONFIG_FW_OFFLOAD_PARAM_INIT -+void rtw_hal_update_param_init_fw_offload_cap(_adapter *adapter) -+{ -+ struct dm_struct *p_dm_odm = adapter_to_phydm(adapter); -+ -+ if (adapter->registrypriv.fw_param_init) -+ phydm_fwoffload_ability_init(p_dm_odm, PHYDM_PHY_PARAM_OFFLOAD); -+ else -+ phydm_fwoffload_ability_clear(p_dm_odm, PHYDM_PHY_PARAM_OFFLOAD); -+ -+ RTW_INFO("Init-Parameter FW offload:%s\n", adapter->registrypriv.fw_param_init ? "enable" : "disable"); -+} -+#endif -+ -+void record_ra_info(void *p_dm_void, u8 macid, struct cmn_sta_info *p_sta, u64 ra_mask) -+{ -+ struct dm_struct *p_dm = (struct dm_struct *)p_dm_void; -+ _adapter *adapter = p_dm->adapter; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ -+ if (p_sta) { -+ rtw_macid_ctl_set_bw(macid_ctl, macid, p_sta->ra_info.ra_bw_mode); -+ rtw_macid_ctl_set_vht_en(macid_ctl, macid, p_sta->ra_info.is_vht_enable); -+ rtw_macid_ctl_set_rate_bmp0(macid_ctl, macid, ra_mask); -+ rtw_macid_ctl_set_rate_bmp1(macid_ctl, macid, ra_mask >> 32); -+ -+ rtw_update_tx_rate_bmp(adapter_to_dvobj(adapter)); -+ } -+} -+ -+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR -+void rtw_phydm_fill_desc_dpt(void *dm, u8 *desc, u8 dpt_lv) -+{ -+ struct dm_struct *p_dm = (struct dm_struct *)dm; -+ _adapter *adapter = p_dm->adapter; -+ -+ switch (rtw_get_chip_type(adapter)) { -+/* -+ #ifdef CONFIG_RTL8188F -+ case RTL8188F: -+ break; -+ #endif -+ -+ #ifdef CONFIG_RTL8723B -+ case RTL8723B : -+ break; -+ #endif -+ -+ #ifdef CONFIG_RTL8703B -+ case RTL8703B : -+ break; -+ #endif -+ -+ #ifdef CONFIG_RTL8812A -+ case RTL8812 : -+ break; -+ #endif -+ -+ #ifdef CONFIG_RTL8821A -+ case RTL8821: -+ break; -+ #endif -+ -+ #ifdef CONFIG_RTL8814A -+ case RTL8814A : -+ break; -+ #endif -+ -+ #ifdef CONFIG_RTL8192F -+ case RTL8192F : -+ break; -+ #endif -+*/ -+/* -+ #ifdef CONFIG_RTL8192E -+ case RTL8192E : -+ SET_TX_DESC_TX_POWER_0_PSET_92E(desc, dpt_lv); -+ break; -+ #endif -+*/ -+ #ifdef CONFIG_RTL8822B -+ case RTL8822B : -+ SET_TX_DESC_TXPWR_OFSET_8822B(desc, dpt_lv); -+ break; -+ #endif -+ -+ #ifdef CONFIG_RTL8821C -+ case RTL8821C : -+ SET_TX_DESC_TXPWR_OFSET_8821C(desc, dpt_lv); -+ break; -+ #endif -+ -+ default : -+ RTW_ERR("%s IC not support dynamic tx power\n", __func__); -+ break; -+ } -+} -+void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id) -+{ -+ struct dm_struct *dm = adapter_to_phydm(adapter); -+ -+ odm_set_dyntxpwr(dm, desc, mac_id); -+} -+#endif -+ -+#ifdef CONFIG_TDMADIG -+void rtw_phydm_tdmadig(_adapter *adapter, u8 state) -+{ -+ struct registry_priv *pregistrypriv = &adapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct dm_struct *dm = adapter_to_phydm(adapter); -+ u8 tdma_dig_en; -+ -+ switch (state) { -+ case TDMADIG_INIT: -+ phydm_tdma_dig_para_upd(dm, ENABLE_TDMA, pregistrypriv->tdmadig_en); -+ phydm_tdma_dig_para_upd(dm, MODE_DECISION, pregistrypriv->tdmadig_mode); -+ break; -+ case TDMADIG_NON_INIT: -+ if(pregistrypriv->tdmadig_dynamic) { -+ if(pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) -+ tdma_dig_en = 0; -+ else -+ tdma_dig_en = pregistrypriv->tdmadig_en; -+ phydm_tdma_dig_para_upd(dm, ENABLE_TDMA, tdma_dig_en); -+ } -+ break; -+ default: -+ break; -+ -+ } -+} -+#endif/*CONFIG_TDMADIG*/ -+void rtw_phydm_ops_func_init(struct dm_struct *p_phydm) -+{ -+ struct ra_table *p_ra_t = &p_phydm->dm_ra_table; -+ -+ p_ra_t->record_ra_info = record_ra_info; -+ #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR -+ p_phydm->fill_desc_dyntxpwr = rtw_phydm_fill_desc_dpt; -+ #endif -+} -+void rtw_phydm_priv_init(_adapter *adapter) -+{ -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter); -+ struct dm_struct *phydm = &(hal->odmpriv); -+ -+ phydm->adapter = adapter; -+ odm_cmn_info_init(phydm, ODM_CMNINFO_PLATFORM, ODM_CE); -+} -+ -+void Init_ODM_ComInfo(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); -+ struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter); -+ int i; -+ -+ /*phydm_op_mode could be change for different scenarios: ex: SoftAP - PHYDM_BALANCE_MODE*/ -+ pHalData->phydm_op_mode = PHYDM_PERFORMANCE_MODE;/*Service one device*/ -+ rtw_odm_init_ic_type(adapter); -+ -+ if (rtw_get_intf_type(adapter) == RTW_GSPI) -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO); -+ else -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_INTERFACE, rtw_get_intf_type(adapter)); -+ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->version_id)); -+ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID); -+ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, adapter->registrypriv.wifi_spec); -+ -+#ifdef CONFIG_ADVANCE_OTA -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_ADVANCE_OTA, adapter->registrypriv.adv_ota); -+#endif -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_TYPE, pHalData->rf_type); -+ -+ { -+ /* 1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE ======= */ -+ u8 odm_board_type = ODM_BOARD_DEFAULT; -+ -+ if (pHalData->ExternalLNA_2G != 0) { -+ odm_board_type |= ODM_BOARD_EXT_LNA; -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1); -+ } -+ if (pHalData->external_lna_5g != 0) { -+ odm_board_type |= ODM_BOARD_EXT_LNA_5G; -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1); -+ } -+ if (pHalData->ExternalPA_2G != 0) { -+ odm_board_type |= ODM_BOARD_EXT_PA; -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EXT_PA, 1); -+ } -+ if (pHalData->external_pa_5g != 0) { -+ odm_board_type |= ODM_BOARD_EXT_PA_5G; -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1); -+ } -+ if (pHalData->EEPROMBluetoothCoexist) -+ odm_board_type |= ODM_BOARD_BT; -+ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, odm_board_type); -+ /* 1 ============== End of BoardType ============== */ -+ } -+ -+ rtw_hal_set_odm_var(adapter, HAL_ODM_REGULATION, NULL, _TRUE); -+ -+#ifdef CONFIG_DFS_MASTER -+ rtw_odm_update_dfs_region(dvobj); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_DFS_MASTER_ENABLE, &(adapter_to_rfctl(adapter)->radar_detect_enabled)); -+#endif -+ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA); -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA); -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA); -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA); -+ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->rfe_type); -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_X_CAP_SETTING, pHalData->crystal_cap); -+ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0); -+ -+ /*Add by YuChen for kfree init*/ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_REGRFKFREEENABLE, adapter->registrypriv.RegPwrTrimEnable); -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RFKFREEENABLE, pHalData->RfKFreeEnable); -+ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_BE_FIX_TX_ANT, pHalData->b_fix_tx_ant); -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH, pHalData->with_extenal_ant_switch); -+ -+ /* (8822B) efuse 0x3D7 & 0x3D8 for TX PA bias */ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EFUSE0X3D7, pHalData->efuse0x3d7); -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EFUSE0X3D8, pHalData->efuse0x3d8); -+ -+ /* waiting for PhyDMV034 support*/ -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_MANUAL_SUPPORTABILITY, &(adapter->registrypriv.phydm_ability)); -+ /*Add by YuChen for adaptivity init*/ -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ADAPTIVITY, &(adapter->registrypriv.adaptivity_en)); -+ phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE, (adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE); -+ phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_L2H_INI, adapter->registrypriv.adaptivity_th_l2h_ini); -+ phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, adapter->registrypriv.adaptivity_th_edcca_hl_diff); -+ -+ /*halrf info init*/ -+ halrf_cmn_info_init(pDM_Odm, HALRF_CMNINFO_EEPROM_THERMAL_VALUE, pHalData->eeprom_thermal_meter); -+ halrf_cmn_info_init(pDM_Odm, HALRF_CMNINFO_PWT_TYPE, 0); -+ halrf_cmn_info_init(pDM_Odm, HALRF_CMNINFO_MP_POWER_TRACKING_TYPE, pHalData->txpwr_pg_mode); -+ -+ if (rtw_odm_adaptivity_needed(adapter) == _TRUE) -+ rtw_odm_adaptivity_config_msg(RTW_DBGDUMP, adapter); -+ -+#ifdef CONFIG_IQK_PA_OFF -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_IQKPAOFF, 1); -+#endif -+ rtw_hal_update_iqk_fw_offload_cap(adapter); -+ #ifdef CONFIG_FW_OFFLOAD_PARAM_INIT -+ rtw_hal_update_param_init_fw_offload_cap(adapter); -+ #endif -+ -+ /* Pointer reference */ -+ /*Antenna diversity relative parameters*/ -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ANT_DIV, &(pHalData->AntDivCfg)); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_MP_MODE, &(adapter->registrypriv.mp_mode)); -+ -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BB_OPERATION_MODE, &(pHalData->phydm_op_mode)); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes)); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_RX_UNI, &(dvobj->traffic_stat.rx_bytes)); -+ -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BAND, &(pHalData->current_band_type)); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_FORCED_RATE, &(pHalData->ForcedDataRate)); -+ -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC)); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_SEC_MODE, &(adapter->securitypriv.dot11PrivacyAlgrthm)); -+#ifdef CONFIG_NARROWBAND_SUPPORTING -+ if ((adapter->registrypriv.rtw_nb_config == RTW_NB_CONFIG_WIDTH_10) -+ || (adapter->registrypriv.rtw_nb_config == RTW_NB_CONFIG_WIDTH_5)) { -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BW, &(adapter->registrypriv.rtw_nb_config)); -+ } -+ else -+#endif -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BW, &(pHalData->current_channel_bw)); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_CHNL, &(pHalData->current_channel)); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_NET_CLOSED, &(adapter->net_closed)); -+ -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_SCAN, &(pHalData->bScanInProcess)); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctl->bpower_saving)); -+ /*Add by Yuchen for phydm beamforming*/ -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_TX_TP, &(dvobj->traffic_stat.cur_tx_tp)); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_RX_TP, &(dvobj->traffic_stat.cur_rx_tp)); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ANT_TEST, &(pHalData->antenna_test)); -+#ifdef CONFIG_RTL8723B -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_IS1ANTENNA, &pHalData->EEPROMBluetoothAntNum); -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_RFDEFAULTPATH, &pHalData->ant_path); -+#endif /*CONFIG_RTL8723B*/ -+#ifdef CONFIG_USB_HCI -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_HUBUSBMODE, &(dvobj->usb_speed)); -+#endif -+ -+#ifdef CONFIG_DYNAMIC_SOML -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ADAPTIVE_SOML, &(adapter->registrypriv.dyn_soml_en)); -+#endif -+#ifdef CONFIG_RTW_PATH_DIV -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_PATH_DIV, &(adapter->registrypriv.path_div)); -+#endif -+ odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_FCS_MODE, &(pHalData->multi_ch_switch_mode)); -+ -+ /*halrf info hook*/ -+ /* waiting for PhyDMV034 support*/ -+ halrf_cmn_info_hook(pDM_Odm, HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY, &(adapter->registrypriv.halrf_ability)); -+#ifdef CONFIG_MP_INCLUDED -+ halrf_cmn_info_hook(pDM_Odm, HALRF_CMNINFO_CON_TX, &(adapter->mppriv.mpt_ctx.is_start_cont_tx)); -+ halrf_cmn_info_hook(pDM_Odm, HALRF_CMNINFO_SINGLE_TONE, &(adapter->mppriv.mpt_ctx.is_single_tone)); -+ halrf_cmn_info_hook(pDM_Odm, HALRF_CMNINFO_CARRIER_SUPPRESSION, &(adapter->mppriv.mpt_ctx.is_carrier_suppression)); -+ halrf_cmn_info_hook(pDM_Odm, HALRF_CMNINFO_MP_RATE_INDEX, &(adapter->mppriv.mpt_ctx.mpt_rate_index)); -+#endif/*CONFIG_MP_INCLUDED*/ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) -+ phydm_cmn_sta_info_hook(pDM_Odm, i, NULL); -+ -+ rtw_phydm_ops_func_init(pDM_Odm); -+ phydm_dm_early_init(pDM_Odm); -+ /* TODO */ -+ /* odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BT_OPERATION, _FALSE); */ -+ /* odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BT_DISABLE_EDCA, _FALSE); */ -+} -+ -+ -+static u32 edca_setting_UL[HT_IOT_PEER_MAX] = -+/*UNKNOWN, REALTEK_90, REALTEK_92SE, BROADCOM,*/ -+/*RALINK, ATHEROS, CISCO, MERU, MARVELL, 92U_AP, SELF_AP(DownLink/Tx) */ -+{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322}; -+ -+static u32 edca_setting_DL[HT_IOT_PEER_MAX] = -+/*UNKNOWN, REALTEK_90, REALTEK_92SE, BROADCOM,*/ -+/*RALINK, ATHEROS, CISCO, MERU, MARVELL, 92U_AP, SELF_AP(UpLink/Rx)*/ -+{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b}; -+ -+static u32 edca_setting_dl_g_mode[HT_IOT_PEER_MAX] = -+/*UNKNOWN, REALTEK_90, REALTEK_92SE, BROADCOM,*/ -+/*RALINK, ATHEROS, CISCO, MERU, MARVELL, 92U_AP, SELF_AP */ -+{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b}; -+ -+ -+struct turbo_edca_setting{ -+ u32 edca_ul; /* uplink, tx */ -+ u32 edca_dl; /* downlink, rx */ -+}; -+ -+#define TURBO_EDCA_ENT(UL, DL) {UL, DL} -+ -+#if 0 -+#define TURBO_EDCA_MODE_NUM 18 -+static struct turbo_edca_setting rtw_turbo_edca[TURBO_EDCA_MODE_NUM] = { -+ TURBO_EDCA_ENT(0xa42b, 0xa42b), /* mode 0 */ -+ TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */ -+ TURBO_EDCA_ENT(0x4319, 0x4319), /* mode 2 */ -+ -+ TURBO_EDCA_ENT(0x5ea42b, 0x5ea42b), /* mode 3 */ -+ TURBO_EDCA_ENT(0x5e431c, 0x5e431c), /* mode 4 */ -+ TURBO_EDCA_ENT(0x5e4319, 0x5e4319), /* mode 5 */ -+ -+ TURBO_EDCA_ENT(0x6ea42b, 0x6ea42b), /* mode 6 */ -+ TURBO_EDCA_ENT(0x6e431c, 0x6e431c), /* mode 7 */ -+ TURBO_EDCA_ENT(0x6e4319, 0x6e4319), /* mode 8 */ -+ -+ TURBO_EDCA_ENT(0x5ea42b, 0xa42b), /* mode 9 */ -+ TURBO_EDCA_ENT(0x5e431c, 0x431c), /* mode 10 */ -+ TURBO_EDCA_ENT(0x5e4319, 0x4319), /* mode 11 */ -+ -+ TURBO_EDCA_ENT(0x6ea42b, 0xa42b), /* mode 12 */ -+ TURBO_EDCA_ENT(0x6e431c, 0x431c), /* mode 13 */ -+ TURBO_EDCA_ENT(0x6e4319, 0x4319), /* mode 14 */ -+ -+ TURBO_EDCA_ENT(0x431c, 0x5e431c), /* mode 15 */ -+ -+ TURBO_EDCA_ENT(0xa42b, 0x5ea42b), /* mode 16 */ -+ -+ TURBO_EDCA_ENT(0x138642b, 0x431c), /* mode 17 */ -+}; -+#else -+#define TURBO_EDCA_MODE_NUM 8 -+static struct turbo_edca_setting rtw_turbo_edca[TURBO_EDCA_MODE_NUM] = { -+ /* { UL, DL } */ -+ TURBO_EDCA_ENT(0x5e431c, 0x431c), /* mode 0 */ -+ -+ TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */ -+ -+ TURBO_EDCA_ENT(0x5e431c, 0x5e431c), /* mode 2 */ -+ -+ TURBO_EDCA_ENT(0x5ea42b, 0x5ea42b), /* mode 3 */ -+ -+ TURBO_EDCA_ENT(0x5ea42b, 0x431c), /* mode 4 */ -+ -+ TURBO_EDCA_ENT(0x6ea42b, 0x6ea42b), /* mode 5 */ -+ -+ TURBO_EDCA_ENT(0xa42b, 0xa42b), /* mode 6 */ -+ -+ TURBO_EDCA_ENT(0x5e431c, 0xa42b), /* mode 7 */ -+}; -+#endif -+ -+void rtw_hal_turbo_edca(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct recv_priv *precvpriv = &(adapter->recvpriv); -+ struct registry_priv *pregpriv = &adapter->registrypriv; -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ /* Parameter suggested by Scott */ -+#if 0 -+ u32 EDCA_BE_UL = edca_setting_UL[p_mgnt_info->iot_peer]; -+ u32 EDCA_BE_DL = edca_setting_DL[p_mgnt_info->iot_peer]; -+#endif -+ u32 EDCA_BE_UL = 0x5ea42b; -+ u32 EDCA_BE_DL = 0x00a42b; -+ u8 ic_type = rtw_get_chip_type(adapter); -+ -+ u8 iot_peer = 0; -+ u8 wireless_mode = 0xFF; /* invalid value */ -+ u8 traffic_index; -+ u32 edca_param; -+ u64 cur_tx_bytes = 0; -+ u64 cur_rx_bytes = 0; -+ u8 bbtchange = _TRUE; -+ u8 is_bias_on_rx = _FALSE; -+ u8 is_linked = _FALSE; -+ u8 interface_type; -+ -+ if (hal_data->dis_turboedca == 1) -+ return; -+ -+ if (rtw_mi_check_status(adapter, MI_ASSOC)) -+ is_linked = _TRUE; -+ -+ if (is_linked != _TRUE) { -+ precvpriv->is_any_non_be_pkts = _FALSE; -+ return; -+ } -+ -+ if (pregpriv->wifi_spec == 1) { /* || (pmlmeinfo->HT_enable == 0)) */ -+ precvpriv->is_any_non_be_pkts = _FALSE; -+ return; -+ } -+ -+ interface_type = rtw_get_intf_type(adapter); -+ wireless_mode = pmlmeext->cur_wireless_mode; -+ -+ iot_peer = pmlmeinfo->assoc_AP_vendor; -+ -+ if (iot_peer >= HT_IOT_PEER_MAX) { -+ precvpriv->is_any_non_be_pkts = _FALSE; -+ return; -+ } -+ -+ if (ic_type == RTL8188E) { -+ if ((iot_peer == HT_IOT_PEER_RALINK) || (iot_peer == HT_IOT_PEER_ATHEROS)) -+ is_bias_on_rx = _TRUE; -+ } -+ -+ /* Check if the status needs to be changed. */ -+ if ((bbtchange) || (!precvpriv->is_any_non_be_pkts)) { -+ cur_tx_bytes = dvobj->traffic_stat.cur_tx_bytes; -+ cur_rx_bytes = dvobj->traffic_stat.cur_rx_bytes; -+ -+ /* traffic, TX or RX */ -+ if (is_bias_on_rx) { -+ if (cur_tx_bytes > (cur_rx_bytes << 2)) { -+ /* Uplink TP is present. */ -+ traffic_index = UP_LINK; -+ } else { -+ /* Balance TP is present. */ -+ traffic_index = DOWN_LINK; -+ } -+ } else { -+ if (cur_rx_bytes > (cur_tx_bytes << 2)) { -+ /* Downlink TP is present. */ -+ traffic_index = DOWN_LINK; -+ } else { -+ /* Balance TP is present. */ -+ traffic_index = UP_LINK; -+ } -+ } -+#if 0 -+ if ((p_dm_odm->dm_edca_table.prv_traffic_idx != traffic_index) -+ || (!p_dm_odm->dm_edca_table.is_current_turbo_edca)) -+#endif -+ { -+ if (interface_type == RTW_PCIE) { -+ EDCA_BE_UL = 0x6ea42b; -+ EDCA_BE_DL = 0x6ea42b; -+ } -+ -+ /* 92D txop can't be set to 0x3e for cisco1250 */ -+ if ((iot_peer == HT_IOT_PEER_CISCO) && (wireless_mode == ODM_WM_N24G)) { -+ EDCA_BE_DL = edca_setting_DL[iot_peer]; -+ EDCA_BE_UL = edca_setting_UL[iot_peer]; -+ } -+ /* merge from 92s_92c_merge temp*/ -+ else if ((iot_peer == HT_IOT_PEER_CISCO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == (ODM_WM_B | ODM_WM_G)) || (wireless_mode == ODM_WM_A) || (wireless_mode == ODM_WM_B))) -+ EDCA_BE_DL = edca_setting_dl_g_mode[iot_peer]; -+ else if ((iot_peer == HT_IOT_PEER_AIRGO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == ODM_WM_A))) -+ EDCA_BE_DL = 0xa630; -+ else if (iot_peer == HT_IOT_PEER_MARVELL) { -+ EDCA_BE_DL = edca_setting_DL[iot_peer]; -+ EDCA_BE_UL = edca_setting_UL[iot_peer]; -+ } else if (iot_peer == HT_IOT_PEER_ATHEROS) { -+ /* Set DL EDCA for Atheros peer to 0x3ea42b.*/ -+ /* Suggested by SD3 Wilson for ASUS TP issue.*/ -+ EDCA_BE_DL = edca_setting_DL[iot_peer]; -+ } -+ -+ if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E) || (ic_type == RTL8192F)) { /* add 8812AU/8812AE */ -+ EDCA_BE_UL = 0x5ea42b; -+ EDCA_BE_DL = 0x5ea42b; -+ -+ RTW_DBG("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x\n", EDCA_BE_UL, EDCA_BE_DL); -+ } -+ -+ if (interface_type == RTW_PCIE && -+ ((ic_type == RTL8822B) -+ || (ic_type == RTL8822C) -+ || (ic_type == RTL8814A) || (ic_type == RTL8814B))) { -+ EDCA_BE_UL = 0x6ea42b; -+ EDCA_BE_DL = 0x6ea42b; -+ } -+ -+ if ((ic_type == RTL8822B) -+ && (interface_type == RTW_SDIO)) -+ EDCA_BE_DL = 0x00431c; -+ -+#ifdef CONFIG_RTW_TPT_MODE -+ if ( dvobj->tpt_mode > 0 ) { -+ EDCA_BE_UL = dvobj->edca_be_ul; -+ EDCA_BE_DL = dvobj->edca_be_dl; -+ } -+#endif /* CONFIG_RTW_TPT_MODE */ -+ -+ /* keep this condition at last check */ -+ if (hal_data->dis_turboedca == 2) { -+ -+ if (hal_data->edca_param_mode < TURBO_EDCA_MODE_NUM) { -+ -+ struct turbo_edca_setting param; -+ -+ param = rtw_turbo_edca[hal_data->edca_param_mode]; -+ -+ EDCA_BE_UL = param.edca_ul; -+ EDCA_BE_DL = param.edca_dl; -+ -+ } else { -+ -+ EDCA_BE_UL = hal_data->edca_param_mode; -+ EDCA_BE_DL = hal_data->edca_param_mode; -+ } -+ } -+ -+ if (traffic_index == DOWN_LINK) -+ edca_param = EDCA_BE_DL; -+ else -+ edca_param = EDCA_BE_UL; -+ -+#ifdef CONFIG_EXTEND_LOWRATE_TXOP -+#define TXOP_CCK1M 0x01A6 -+#define TXOP_CCK2M 0x00E6 -+#define TXOP_CCK5M 0x006B -+#define TXOP_OFD6M 0x0066 -+#define TXOP_MCS6M 0x0061 -+{ -+ struct sta_info *psta; -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ u8 mac_id, role, current_rate_id; -+ -+ /* search all used & connect2AP macid */ -+ for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) { -+ if (rtw_macid_is_used(macid_ctl, mac_id)) { -+ role = GET_H2CCMD_MSRRPT_PARM_ROLE(&(macid_ctl->h2c_msr[mac_id])); -+ if (role != H2C_MSR_ROLE_AP) -+ continue; -+ -+ psta = macid_ctl->sta[mac_id]; -+ current_rate_id = rtw_get_current_tx_rate(adapter, psta); -+ /* Check init tx_rate==1M and set 0x508[31:16]==0x019B(unit 32us) if it is */ -+ switch (current_rate_id) { -+ case DESC_RATE1M: -+ edca_param &= 0x0000FFFF; -+ edca_param |= (TXOP_CCK1M<<16); -+ break; -+ case DESC_RATE2M: -+ edca_param &= 0x0000FFFF; -+ edca_param |= (TXOP_CCK2M<<16); -+ break; -+ case DESC_RATE5_5M: -+ edca_param &= 0x0000FFFF; -+ edca_param |= (TXOP_CCK5M<<16); -+ break; -+ case DESC_RATE6M: -+ edca_param &= 0x0000FFFF; -+ edca_param |= (TXOP_OFD6M<<16); -+ break; -+ case DESC_RATEMCS0: -+ edca_param &= 0x0000FFFF; -+ edca_param |= (TXOP_MCS6M<<16); -+ break; -+ default: -+ break; -+ } -+ } -+ } -+} -+#endif /* CONFIG_EXTEND_LOWRATE_TXOP */ -+ -+#ifdef CONFIG_RTW_CUSTOMIZE_BEEDCA -+ edca_param = CONFIG_RTW_CUSTOMIZE_BEEDCA; -+#endif -+ -+ if ( edca_param != hal_data->ac_param_be) { -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param)); -+ -+ RTW_INFO("Turbo EDCA =0x%x\n", edca_param); -+ } -+ -+ hal_data->prv_traffic_idx = traffic_index; -+ } -+ -+ hal_data->is_turbo_edca = _TRUE; -+ } else { -+ /* */ -+ /* Turn Off EDCA turbo here. */ -+ /* Restore original EDCA according to the declaration of AP. */ -+ /* */ -+ if (hal_data->is_turbo_edca) { -+ edca_param = hal_data->ac_param_be; -+ rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param)); -+ hal_data->is_turbo_edca = _FALSE; -+ } -+ } -+ -+} -+ -+s8 rtw_dm_get_min_rssi(_adapter *adapter) -+{ -+ struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); -+ struct sta_info *sta; -+ s8 min_rssi = 127, rssi; -+ int i; -+ -+ for (i = 0; i < MACID_NUM_SW_LIMIT; i++) { -+ sta = macid_ctl->sta[i]; -+ if (!sta || !GET_H2CCMD_MSRRPT_PARM_OPMODE(macid_ctl->h2c_msr + i) -+ || is_broadcast_mac_addr(sta->cmn.mac_addr)) -+ continue; -+ rssi = sta->cmn.rssi_stat.rssi; -+ if (rssi >= 0 && min_rssi > rssi) -+ min_rssi = rssi; -+ } -+ -+ return min_rssi == 127 ? 0 : min_rssi; -+} -+ -+s8 rtw_phydm_get_min_rssi(_adapter *adapter) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ s8 rssi_min = 0; -+ -+ rssi_min = phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_RSSI_MIN); -+ return rssi_min; -+} -+ -+u8 rtw_phydm_get_cur_igi(_adapter *adapter) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ u8 cur_igi = 0; -+ -+ cur_igi = phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CURR_IGI); -+ return cur_igi; -+} -+ -+bool rtw_phydm_get_edcca_flag(_adapter *adapter) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ bool cur_edcca_flag = 0; -+ -+ cur_edcca_flag = phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_EDCCA_FLAG); -+ return cur_edcca_flag; -+} -+ -+u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ -+ if (cnt == FA_OFDM) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_FA_OFDM); -+ else if (cnt == FA_CCK) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_FA_CCK); -+ else if (cnt == FA_TOTAL) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_FA_TOTAL); -+ else if (cnt == CCA_OFDM) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CCA_OFDM); -+ else if (cnt == CCA_CCK) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CCA_CCK); -+ else if (cnt == CCA_ALL) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CCA_ALL); -+ else if (cnt == CRC32_OK_VHT) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_OK_VHT); -+ else if (cnt == CRC32_OK_HT) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_OK_HT); -+ else if (cnt == CRC32_OK_LEGACY) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_OK_LEGACY); -+ else if (cnt == CRC32_OK_CCK) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_OK_CCK); -+ else if (cnt == CRC32_ERROR_VHT) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_ERROR_VHT); -+ else if (cnt == CRC32_ERROR_HT) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_ERROR_HT); -+ else if (cnt == CRC32_ERROR_LEGACY) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_ERROR_LEGACY); -+ else if (cnt == CRC32_ERROR_CCK) -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CRC32_ERROR_CCK); -+ else -+ return 0; -+} -+ -+u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter) -+{ -+ u8 rts = _FALSE; -+ struct dm_struct *podmpriv = adapter_to_phydm(adapter); -+ -+ odm_acquire_spin_lock(podmpriv, RT_IQK_SPINLOCK); -+ if (podmpriv->rf_calibrate_info.is_iqk_in_progress == _TRUE) { -+ RTW_ERR("IQK InProgress\n"); -+ rts = _TRUE; -+ } -+ odm_release_spin_lock(podmpriv, RT_IQK_SPINLOCK); -+ -+ return rts; -+} -+ -+void SetHalODMVar( -+ PADAPTER Adapter, -+ HAL_ODM_VARIABLE eVariable, -+ void *pValue1, -+ BOOLEAN bSet) -+{ -+ struct dm_struct *podmpriv = adapter_to_phydm(Adapter); -+ /* _irqL irqL; */ -+ switch (eVariable) { -+ case HAL_ODM_STA_INFO: { -+ struct sta_info *psta = (struct sta_info *)pValue1; -+ -+ if (bSet) { -+ RTW_INFO("### Set STA_(%d) info ###\n", psta->cmn.mac_id); -+ psta->cmn.dm_ctrl = STA_DM_CTRL_ACTIVE; -+ phydm_cmn_sta_info_hook(podmpriv, psta->cmn.mac_id, &(psta->cmn)); -+ } else { -+ RTW_INFO("### Clean STA_(%d) info ###\n", psta->cmn.mac_id); -+ /* _enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); */ -+ psta->cmn.dm_ctrl = 0; -+ phydm_cmn_sta_info_hook(podmpriv, psta->cmn.mac_id, NULL); -+ -+ /* _exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); */ -+ } -+ } -+ break; -+ case HAL_ODM_P2P_STATE: -+ odm_cmn_info_update(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet); -+ break; -+ case HAL_ODM_WIFI_DISPLAY_STATE: -+ odm_cmn_info_update(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet); -+ break; -+ case HAL_ODM_REGULATION: -+ /* used to auto enable/disable adaptivity by SD7 */ -+ phydm_adaptivity_info_update(podmpriv, PHYDM_ADAPINFO_DOMAIN_CODE_2G, 0); -+ phydm_adaptivity_info_update(podmpriv, PHYDM_ADAPINFO_DOMAIN_CODE_5G, 0); -+ break; -+ case HAL_ODM_INITIAL_GAIN: { -+ u8 rx_gain = *((u8 *)(pValue1)); -+ /*printk("rx_gain:%x\n",rx_gain);*/ -+ if (rx_gain == 0xff) {/*restore rx gain*/ -+ /*odm_write_dig(podmpriv,pDigTable->backup_ig_value);*/ -+ odm_pause_dig(podmpriv, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_0, rx_gain); -+ } else { -+ /*pDigTable->backup_ig_value = pDigTable->cur_ig_value;*/ -+ /*odm_write_dig(podmpriv,rx_gain);*/ -+ odm_pause_dig(podmpriv, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_0, rx_gain); -+ } -+ } -+ break; -+ case HAL_ODM_RX_INFO_DUMP: { -+ u8 cur_igi = 0; -+ s8 rssi_min; -+ void *sel; -+ -+ sel = pValue1; -+ cur_igi = rtw_phydm_get_cur_igi(Adapter); -+ rssi_min = rtw_phydm_get_min_rssi(Adapter); -+ -+ _RTW_PRINT_SEL(sel, "============ Rx Info dump ===================\n"); -+ _RTW_PRINT_SEL(sel, "is_linked = %d, rssi_min = %d(%%)(%d(%%)), current_igi = 0x%x\n" -+ , podmpriv->is_linked, rssi_min, rtw_dm_get_min_rssi(Adapter), cur_igi); -+ _RTW_PRINT_SEL(sel, "cnt_cck_fail = %d, cnt_ofdm_fail = %d, Total False Alarm = %d\n", -+ rtw_phydm_get_phy_cnt(Adapter, FA_CCK), -+ rtw_phydm_get_phy_cnt(Adapter, FA_OFDM), -+ rtw_phydm_get_phy_cnt(Adapter, FA_TOTAL)); -+ -+ if (podmpriv->is_linked) { -+ _RTW_PRINT_SEL(sel, "rx_rate = %s", HDATA_RATE(podmpriv->rx_rate)); -+ if (IS_HARDWARE_TYPE_8814A(Adapter)) -+ _RTW_PRINT_SEL(sel, " rssi_a = %d(%%), rssi_b = %d(%%), rssi_c = %d(%%), rssi_d = %d(%%)\n", -+ podmpriv->rssi_a, podmpriv->rssi_b, podmpriv->rssi_c, podmpriv->rssi_d); -+ else -+ _RTW_PRINT_SEL(sel, " rssi_a = %d(%%), rssi_b = %d(%%)\n", podmpriv->rssi_a, podmpriv->rssi_b); -+#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA -+ rtw_dump_raw_rssi_info(Adapter, sel); -+#endif -+ } -+ } -+ break; -+ case HAL_ODM_RX_Dframe_INFO: { -+ void *sel; -+ -+ sel = pValue1; -+ -+ /*_RTW_PRINT_SEL(sel , "HAL_ODM_RX_Dframe_INFO\n");*/ -+#ifdef DBG_RX_DFRAME_RAW_DATA -+ rtw_dump_rx_dframe_info(Adapter, sel); -+#endif -+ } -+ break; -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ case HAL_ODM_ANTDIV_SELECT: { -+ u8 antenna = (*(u8 *)pValue1); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ /*switch antenna*/ -+ odm_update_rx_idle_ant(&pHalData->odmpriv, antenna); -+ /*RTW_INFO("==> HAL_ODM_ANTDIV_SELECT, Ant_(%s)\n", (antenna == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");*/ -+ -+ } -+ break; -+#endif -+ -+ default: -+ break; -+ } -+} -+ -+void GetHalODMVar( -+ PADAPTER Adapter, -+ HAL_ODM_VARIABLE eVariable, -+ void *pValue1, -+ void *pValue2) -+{ -+ struct dm_struct *podmpriv = adapter_to_phydm(Adapter); -+ -+ switch (eVariable) { -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ case HAL_ODM_ANTDIV_SELECT: { -+ struct phydm_fat_struct *pDM_FatTable = &podmpriv->dm_fat_table; -+ *((u8 *)pValue1) = pDM_FatTable->rx_idle_ant; -+ } -+ break; -+#endif -+ case HAL_ODM_INITIAL_GAIN: -+ *((u8 *)pValue1) = rtw_phydm_get_cur_igi(Adapter); -+ break; -+ default: -+ break; -+ } -+} -+ -+#ifdef RTW_HALMAC -+#include "../hal_halmac.h" -+#endif -+bool rtw_phydm_rfe_ctrl_gpio( -+ _adapter *adapter, -+ u8 gpio_num -+) -+{ -+ #ifdef RTW_HALMAC -+ if(rtw_halmac_rfe_ctrl_cfg(adapter_to_dvobj(adapter), gpio_num)) -+ return _TRUE; -+ else -+ #endif/*RTW_HALMAC*/ -+ return _FALSE; -+} -+ -+enum hal_status -+rtw_phydm_fw_iqk( -+ struct dm_struct *p_dm_odm, -+ u8 clear, -+ u8 segment -+) -+{ -+ #ifdef RTW_HALMAC -+ struct _ADAPTER *adapter = p_dm_odm->adapter; -+ -+ if (rtw_halmac_iqk(adapter_to_dvobj(adapter), clear, segment) == 0) -+ return HAL_STATUS_SUCCESS; -+ #endif -+ return HAL_STATUS_FAILURE; -+} -+ -+enum hal_status -+rtw_phydm_cfg_phy_para( -+ struct dm_struct *p_dm_odm, -+ enum phydm_halmac_param config_type, -+ u32 offset, -+ u32 data, -+ u32 mask, -+ enum rf_path e_rf_path, -+ u32 delay_time) -+{ -+ #ifdef RTW_HALMAC -+ struct _ADAPTER *adapter = p_dm_odm->adapter; -+ struct rtw_phy_parameter para; -+ -+ switch (config_type) { -+ case PHYDM_HALMAC_CMD_MAC_W8: -+ para.cmd = 0; /* MAC register */ -+ para.data.mac.offset = offset; -+ para.data.mac.value = data; -+ para.data.mac.msk = mask; -+ para.data.mac.msk_en = (mask) ? 1 : 0; -+ para.data.mac.size = 1; -+ break; -+ case PHYDM_HALMAC_CMD_MAC_W16: -+ para.cmd = 0; /* MAC register */ -+ para.data.mac.offset = offset; -+ para.data.mac.value = data; -+ para.data.mac.msk = mask; -+ para.data.mac.msk_en = (mask) ? 1 : 0; -+ para.data.mac.size = 2; -+ break; -+ case PHYDM_HALMAC_CMD_MAC_W32: -+ para.cmd = 0; /* MAC register */ -+ para.data.mac.offset = offset; -+ para.data.mac.value = data; -+ para.data.mac.msk = mask; -+ para.data.mac.msk_en = (mask) ? 1 : 0; -+ para.data.mac.size = 4; -+ break; -+ case PHYDM_HALMAC_CMD_BB_W8: -+ para.cmd = 1; /* BB register */ -+ para.data.bb.offset = offset; -+ para.data.bb.value = data; -+ para.data.bb.msk = mask; -+ para.data.bb.msk_en = (mask) ? 1 : 0; -+ para.data.bb.size = 1; -+ break; -+ case PHYDM_HALMAC_CMD_BB_W16: -+ para.cmd = 1; /* BB register */ -+ para.data.bb.offset = offset; -+ para.data.bb.value = data; -+ para.data.bb.msk = mask; -+ para.data.bb.msk_en = (mask) ? 1 : 0; -+ para.data.bb.size = 2; -+ break; -+ case PHYDM_HALMAC_CMD_BB_W32: -+ para.cmd = 1; /* BB register */ -+ para.data.bb.offset = offset; -+ para.data.bb.value = data; -+ para.data.bb.msk = mask; -+ para.data.bb.msk_en = (mask) ? 1 : 0; -+ para.data.bb.size = 4; -+ break; -+ case PHYDM_HALMAC_CMD_RF_W: -+ para.cmd = 2; /* RF register */ -+ para.data.rf.offset = offset; -+ para.data.rf.value = data; -+ para.data.rf.msk = mask; -+ para.data.rf.msk_en = (mask) ? 1 : 0; -+ if (e_rf_path == RF_PATH_A) -+ para.data.rf.path = 0; -+ else if (e_rf_path == RF_PATH_B) -+ para.data.rf.path = 1; -+ else if (e_rf_path == RF_PATH_C) -+ para.data.rf.path = 2; -+ else if (e_rf_path == RF_PATH_D) -+ para.data.rf.path = 3; -+ else -+ para.data.rf.path = 0; -+ break; -+ case PHYDM_HALMAC_CMD_DELAY_US: -+ para.cmd = 3; /* Delay */ -+ para.data.delay.unit = 0; /* microsecond */ -+ para.data.delay.value = delay_time; -+ break; -+ case PHYDM_HALMAC_CMD_DELAY_MS: -+ para.cmd = 3; /* Delay */ -+ para.data.delay.unit = 1; /* millisecond */ -+ para.data.delay.value = delay_time; -+ break; -+ case PHYDM_HALMAC_CMD_END: -+ para.cmd = 0xFF; /* End command */ -+ break; -+ default: -+ return HAL_STATUS_FAILURE; -+ } -+ -+ if (rtw_halmac_cfg_phy_para(adapter_to_dvobj(adapter), ¶)) -+ return HAL_STATUS_FAILURE; -+ #endif /*RTW_HALMAC*/ -+ return HAL_STATUS_SUCCESS; -+} -+ -+ -+#ifdef CONFIG_LPS_LCLK_WD_TIMER -+void rtw_phydm_wd_lps_lclk_hdl(_adapter *adapter) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *psta = NULL; -+ bool is_linked = _FALSE; -+ -+ if (!rtw_is_hw_init_completed(adapter)) -+ return; -+ -+ if (rtw_mi_check_status(adapter, MI_ASSOC)) -+ is_linked = _TRUE; -+ -+ if (is_linked == _FALSE) -+ return; -+ -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) -+ return; -+ -+ odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_LINK, is_linked); -+ -+ phydm_watchdog_lps_32k(&pHalData->odmpriv); -+ -+#ifdef CONFIG_LPS_PG -+ if (pwrpriv->lps_level == LPS_PG) { -+ if (rtw_hal_set_lps_pg_info_cmd(adapter) == _FAIL) -+ RTW_INFO(FUNC_ADPT_FMT": Send PG H2C command Fail! \n", -+ FUNC_ADPT_ARG(adapter)); -+ } -+#endif /* CONFIG_LPS_PG */ -+} -+ -+void rtw_phydm_watchdog_in_lps_lclk(_adapter *adapter) -+{ -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ u8 cur_igi = 0; -+ s8 min_rssi = 0; -+ -+ if (!rtw_is_hw_init_completed(adapter)) -+ return; -+ -+ cur_igi = rtw_phydm_get_cur_igi(adapter); -+ min_rssi = rtw_dm_get_min_rssi(adapter); -+ /*RTW_INFO("%s "ADPT_FMT" cur_ig_value=%d, min_rssi = %d\n", __func__, ADPT_ARG(adapter), cur_igi, min_rssi);*/ -+ -+ if (min_rssi <= 0) -+ return; -+ -+ if ((cur_igi > min_rssi + 5) || -+ (cur_igi < min_rssi - 5)) { -+#ifdef CONFIG_LPS -+ rtw_dm_in_lps_wk_cmd(adapter); -+#endif -+ } -+} -+#endif /*CONFIG_LPS_LCLK_WD_TIMER*/ -+ -+void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta) -+{ -+ struct ra_sta_info *ra_info; -+ u8 curr_sgi = _FALSE; -+ u32 tx_tp_mbips, rx_tp_mbips, bi_tp_mbips; -+ -+ if (!psta) -+ return; -+ RTW_PRINT_SEL(sel, "\n"); -+ RTW_PRINT_SEL(sel, "====== mac_id : %d [" MAC_FMT "] ======\n", -+ psta->cmn.mac_id, MAC_ARG(psta->cmn.mac_addr)); -+ -+ if (is_client_associated_to_ap(psta->padapter)) -+ RTW_PRINT_SEL(sel, "BCN counts : %d (per-%d second), DTIM Period:%d\n", -+ rtw_get_bcn_cnt(psta->padapter) / 2, 1, rtw_get_bcn_dtim_period(psta->padapter)); -+ -+ ra_info = &psta->cmn.ra_info; -+ curr_sgi = rtw_get_current_tx_sgi(adapter, psta); -+ RTW_PRINT_SEL(sel, "tx_rate : %s(%s) rx_rate : %s, rx_rate_bmc : %s, rssi : %d %%\n" -+ , HDATA_RATE(rtw_get_current_tx_rate(adapter, psta)), (curr_sgi) ? "S" : "L" -+ , HDATA_RATE((psta->curr_rx_rate & 0x7F)), HDATA_RATE((psta->curr_rx_rate_bmc & 0x7F)), psta->cmn.rssi_stat.rssi -+ ); -+ -+ if (0) { -+ RTW_PRINT_SEL(sel, "tx_bytes:%llu(%llu - %llu)\n" -+ , psta->sta_stats.tx_bytes - psta->sta_stats.last_tx_bytes -+ , psta->sta_stats.tx_bytes, psta->sta_stats.last_tx_bytes -+ ); -+ RTW_PRINT_SEL(sel, "rx_uc_bytes:%llu(%llu - %llu)\n" -+ , sta_rx_uc_bytes(psta) - sta_last_rx_uc_bytes(psta) -+ , sta_rx_uc_bytes(psta), sta_last_rx_uc_bytes(psta) -+ ); -+ RTW_PRINT_SEL(sel, "rx_mc_bytes:%llu(%llu - %llu)\n" -+ , psta->sta_stats.rx_mc_bytes - psta->sta_stats.last_rx_mc_bytes -+ , psta->sta_stats.rx_mc_bytes, psta->sta_stats.last_rx_mc_bytes -+ ); -+ RTW_PRINT_SEL(sel, "rx_bc_bytes:%llu(%llu - %llu)\n" -+ , psta->sta_stats.rx_bc_bytes - psta->sta_stats.last_rx_bc_bytes -+ , psta->sta_stats.rx_bc_bytes, psta->sta_stats.last_rx_bc_bytes -+ ); -+ } -+ -+ _RTW_PRINT_SEL(sel, "RTW: [TP] "); -+ tx_tp_mbips = psta->sta_stats.tx_tp_kbits >> 10; -+ rx_tp_mbips = psta->sta_stats.rx_tp_kbits >> 10; -+ bi_tp_mbips = tx_tp_mbips + rx_tp_mbips; -+ -+ if (tx_tp_mbips) -+ _RTW_PRINT_SEL(sel, "Tx : %d(Mbps) ", tx_tp_mbips); -+ else -+ _RTW_PRINT_SEL(sel, "Tx : %d(Kbps) ", psta->sta_stats.tx_tp_kbits); -+ -+ if (rx_tp_mbips) -+ _RTW_PRINT_SEL(sel, "Rx : %d(Mbps) ", rx_tp_mbips); -+ else -+ _RTW_PRINT_SEL(sel, "Rx : %d(Kbps) ", psta->sta_stats.rx_tp_kbits); -+ -+ if (bi_tp_mbips) -+ _RTW_PRINT_SEL(sel, "Total : %d(Mbps)\n", bi_tp_mbips); -+ else -+ _RTW_PRINT_SEL(sel, "Total : %d(Kbps)\n", psta->sta_stats.tx_tp_kbits + psta->sta_stats.rx_tp_kbits); -+ -+ -+ _RTW_PRINT_SEL(sel, "RTW: [Smooth TP] "); -+ tx_tp_mbips = psta->sta_stats.smooth_tx_tp_kbits >> 10; -+ rx_tp_mbips = psta->sta_stats.smooth_rx_tp_kbits >> 10; -+ bi_tp_mbips = tx_tp_mbips + rx_tp_mbips; -+ if (tx_tp_mbips) -+ _RTW_PRINT_SEL(sel, "Tx : %d(Mbps) ", tx_tp_mbips); -+ else -+ _RTW_PRINT_SEL(sel, "Tx : %d(Kbps) ", psta->sta_stats.smooth_tx_tp_kbits); -+ -+ if (rx_tp_mbips) -+ _RTW_PRINT_SEL(sel, "Rx : %d(Mbps) ", rx_tp_mbips); -+ else -+ _RTW_PRINT_SEL(sel, "Rx : %d(Kbps) ", psta->sta_stats.smooth_rx_tp_kbits); -+ -+ if (bi_tp_mbips) -+ _RTW_PRINT_SEL(sel, "Total : %d(Mbps)\n", bi_tp_mbips); -+ else -+ _RTW_PRINT_SEL(sel, "Total : %d(Kbps)\n", psta->sta_stats.smooth_tx_tp_kbits + psta->sta_stats.rx_tp_kbits); -+ -+ #if 0 -+ RTW_PRINT_SEL(sel, "Moving-AVG TP {Tx,Rx,Total} = { %d , %d , %d } Mbps\n\n", -+ (psta->cmn.tx_moving_average_tp << 3), (psta->cmn.rx_moving_average_tp << 3), -+ (psta->cmn.tx_moving_average_tp + psta->cmn.rx_moving_average_tp) << 3); -+ #endif -+} -+ -+void dump_sta_info(void *sel, struct sta_info *psta) -+{ -+ struct ra_sta_info *ra_info; -+ u8 curr_tx_sgi = _FALSE; -+ u8 curr_tx_rate = 0; -+ -+ if (!psta) -+ return; -+ -+ ra_info = &psta->cmn.ra_info; -+ -+ RTW_PRINT_SEL(sel, "============ STA [" MAC_FMT "] ===================\n", -+ MAC_ARG(psta->cmn.mac_addr)); -+ RTW_PRINT_SEL(sel, "mac_id : %d\n", psta->cmn.mac_id); -+ RTW_PRINT_SEL(sel, "wireless_mode : 0x%02x\n", psta->wireless_mode); -+ RTW_PRINT_SEL(sel, "mimo_type : %d\n", psta->cmn.mimo_type); -+ RTW_PRINT_SEL(sel, "static smps : %s\n", (psta->cmn.sm_ps == SM_PS_STATIC) ? "Y" : "N"); -+ RTW_PRINT_SEL(sel, "bw_mode : %s, ra_bw_mode : %s\n", -+ ch_width_str(psta->cmn.bw_mode), ch_width_str(ra_info->ra_bw_mode)); -+ RTW_PRINT_SEL(sel, "rate_id : %d\n", ra_info->rate_id); -+ RTW_PRINT_SEL(sel, "rssi : %d (%%), rssi_level : %d\n", psta->cmn.rssi_stat.rssi, ra_info->rssi_level); -+ RTW_PRINT_SEL(sel, "is_support_sgi : %s, is_vht_enable : %s\n", -+ (ra_info->is_support_sgi) ? "Y" : "N", (ra_info->is_vht_enable) ? "Y" : "N"); -+ RTW_PRINT_SEL(sel, "disable_ra : %s, disable_pt : %s\n", -+ (ra_info->disable_ra) ? "Y" : "N", (ra_info->disable_pt) ? "Y" : "N"); -+ RTW_PRINT_SEL(sel, "is_noisy : %s\n", (ra_info->is_noisy) ? "Y" : "N"); -+ RTW_PRINT_SEL(sel, "txrx_state : %d\n", ra_info->txrx_state);/*0: uplink, 1:downlink, 2:bi-direction*/ -+ -+ curr_tx_sgi = rtw_get_current_tx_sgi(psta->padapter, psta); -+ curr_tx_rate = rtw_get_current_tx_rate(psta->padapter, psta); -+ RTW_PRINT_SEL(sel, "curr_tx_rate : %s (%s)\n", -+ HDATA_RATE(curr_tx_rate), (curr_tx_sgi) ? "S" : "L"); -+ RTW_PRINT_SEL(sel, "curr_tx_bw : %s\n", ch_width_str(ra_info->curr_tx_bw)); -+ RTW_PRINT_SEL(sel, "curr_retry_ratio : %d\n", ra_info->curr_retry_ratio); -+ RTW_PRINT_SEL(sel, "ra_mask : 0x%016llx\n\n", ra_info->ramask); -+} -+ -+void rtw_phydm_ra_registed(_adapter *adapter, struct sta_info *psta) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ -+ if (psta == NULL) { -+ RTW_ERR(FUNC_ADPT_FMT" sta is NULL\n", FUNC_ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ if (psta->cmn.mac_id >= macid_ctl->num) -+ return; -+ -+ phydm_ra_registed(&hal_data->odmpriv, psta->cmn.mac_id, psta->cmn.rssi_stat.rssi); -+ dump_sta_info(RTW_DBGDUMP, psta); -+} -+ -+static void init_phydm_info(_adapter *adapter) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ struct dm_struct *phydm = &(hal_data->odmpriv); -+ -+ odm_cmn_info_init(phydm, ODM_CMNINFO_FW_VER, hal_data->firmware_version); -+ odm_cmn_info_init(phydm, ODM_CMNINFO_FW_SUB_VER, hal_data->firmware_sub_version); -+} -+ -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+void rtw_phydm_trx_cfg(_adapter *adapter, bool tx_1ss) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ enum bb_path txpath = BB_PATH_AB; -+ enum bb_path rxpath = BB_PATH_AB; -+ /*is_2tx = _FALSE for 8822B, or BB_PATH_AUTO for PATH_DIVERSITY for 8822B*/ -+ enum bb_path txpath_1ss = BB_PATH_A; -+ -+ rtw_hal_get_trx_path(adapter_to_dvobj(adapter), NULL, &txpath, &rxpath); -+ txpath = (tx_1ss) ? BB_PATH_A : txpath; -+ -+ if (phydm_api_trx_mode(adapter_to_phydm(adapter), txpath, rxpath, txpath_1ss) == FALSE) -+ RTW_ERR("%s failed\n", __func__); -+} -+#endif -+ -+u8 rtw_hal_runtime_trx_path_decision(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ enum bb_path txpath; -+ enum bb_path rxpath; -+ int i; -+ u8 rst = _FAIL; -+ -+ rtw_hal_get_trx_path(adapter_to_dvobj(adapter), NULL, &txpath, &rxpath); -+ if (!txpath) { -+ RTW_ERR("%s tx_path_bmp is empty\n", __func__); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ if (!rxpath) { -+ RTW_ERR("%s rx_path_bmp is empty\n", __func__); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ tx_path_nss_set_default(hal_data->txpath_nss, hal_data->txpath_num_nss -+ , GET_HAL_TX_PATH_BMP(adapter)); -+ -+#if defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8822B) ||defined(CONFIG_RTL8822C) -+{ -+ enum bb_path txpath_1ss; -+ -+ if (txpath == BB_PATH_AB) { -+ switch (hal_data->max_tx_cnt) { -+ case 2: -+ #ifdef CONFIG_RTW_TX_NPATH_EN -+ if (adapter->registrypriv.tx_npath == 1) -+ txpath_1ss = BB_PATH_AB; -+ else -+ #endif -+ #ifdef CONFIG_RTW_PATH_DIV -+ if (adapter->registrypriv.path_div == 1) /* path diversity, support 2sts TX */ -+ txpath_1ss = BB_PATH_AUTO; -+ else -+ #endif -+ txpath_1ss = BB_PATH_A; -+ break; -+ case 1: -+ #ifdef CONFIG_RTW_PATH_DIV -+ if (adapter->registrypriv.path_div == 1) /* path diversity, no support 2sts TX */ -+ txpath = txpath_1ss = BB_PATH_AUTO; -+ else -+ #endif -+ txpath = txpath_1ss = BB_PATH_A; -+ break; -+ default: -+ RTW_ERR("%s invalid max_tx_cnt:%u\n", __func__ -+ , hal_data->max_tx_cnt); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ } else -+ txpath_1ss = txpath; -+ -+ if (hal_data->txpath_nss[0] != txpath_1ss) { -+ hal_data->txpath_nss[0] = txpath_1ss; -+ if (txpath_1ss == BB_PATH_AUTO) -+ hal_data->txpath_num_nss[0] = 1; -+ else { -+ hal_data->txpath_num_nss[0] = 0; -+ for (i = 0; i < RF_PATH_MAX; i++) { -+ if (txpath_1ss & BIT(i)) -+ hal_data->txpath_num_nss[0]++; -+ } -+ } -+ } -+} -+#elif defined(CONFIG_RTL8814B) -+{ -+ /* 8814B is always full-TX */ -+ tx_path_nss_set_full_tx(hal_data->txpath_nss, hal_data->txpath_num_nss, txpath); -+} -+#elif defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8192E) -+{ -+ #ifdef CONFIG_RTW_TX_NPATH_EN -+ if (adapter->registrypriv.tx_npath == 1) -+ tx_path_nss_set_full_tx(hal_data->txpath_nss, hal_data->txpath_num_nss, txpath); -+ #endif -+} -+#endif -+ -+ hal_data->txpath = txpath; -+ hal_data->rxpath = rxpath; -+ dump_hal_runtime_trx_mode(RTW_DBGDUMP, adapter); -+ rst = _SUCCESS; -+ -+exit: -+ return rst; -+} -+ -+/* -+* trx_mode init - 8822B / 8822C / 8192F -+* 1ssNTx - 8192E / 8812A / 8822B / 8822C / 8192F -+* Path-diversity - 8822B / 8822C / 8192F -+* PHYDM API - phydm_api_trx_mode -+*/ -+static u8 rtw_phydm_config_trx_path(_adapter *adapter) -+{ -+ u8 rst = _SUCCESS; -+ -+#if defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8822B) ||defined(CONFIG_RTL8822C) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ enum bb_path txpath = hal_data->txpath; -+ enum bb_path rxpath = hal_data->rxpath; -+ enum bb_path txpath_1ss = hal_data->txpath_nss[0]; -+ -+ if (phydm_api_trx_mode(adapter_to_phydm(adapter), txpath, rxpath, txpath_1ss) == FALSE) { -+ RTW_ERR("%s txpath=0x%x, rxpath=0x%x, txpath_1ss=0x%x fail\n", __func__ -+ , txpath, rxpath, txpath_1ss); -+ rtw_warn_on(1); -+ rst = _FAIL; -+ } -+} -+#elif defined(CONFIG_RTL8814B) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ enum bb_path txpath = hal_data->txpath; -+ enum bb_path rxpath = hal_data->rxpath; -+ -+ if (txpath == BB_PATH_ABCD && rxpath == BB_PATH_ABCD) -+ rst = config_phydm_trx_mode_8814b(adapter_to_phydm(adapter), txpath, rxpath); -+ else -+ rst = config_phydm_trx_mode_ext_8814b(adapter_to_phydm(adapter), txpath, -+ rxpath, -+ txpath, txpath, txpath); -+ if (rst == FALSE) { -+ RTW_ERR("%s txpath=0x%x, rxpath=0x%x fail\n", __func__ -+ , txpath, rxpath); -+ rtw_warn_on(1); -+ rst = _FAIL; -+ } -+} -+#elif defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8192E) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ if (hal_data->txpath_num_nss[0] == 2) -+ phydm_tx_2path(adapter_to_phydm(adapter)); -+} -+#endif -+ -+ return rst; -+} -+ -+void rtw_phydm_init(_adapter *adapter) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ struct dm_struct *phydm = &(hal_data->odmpriv); -+ -+ rtw_phydm_config_trx_path(adapter); -+ init_phydm_info(adapter); -+ hal_data->phydm_init_result = odm_dm_init(phydm); -+ -+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA -+ phydm_pathb_q_matrix_rotate_en(phydm); -+#endif -+} -+ -+bool rtw_phydm_set_crystal_cap(_adapter *adapter, u8 crystal_cap) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ struct dm_struct *phydm = &(hal_data->odmpriv); -+ -+ return phydm_set_crystal_cap_reg(phydm, crystal_cap); -+} -+ -+#ifdef CONFIG_LPS_PG -+/* -+static void _lps_pg_state_update(_adapter *adapter) -+{ -+ u8 is_in_lpspg = _FALSE; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct sta_priv *pstapriv = &adapter->stapriv; -+ struct sta_info *psta = NULL; -+ -+ if ((pwrpriv->lps_level == LPS_PG) && (pwrpriv->pwr_mode != PS_MODE_ACTIVE) && (pwrpriv->rpwm <= PS_STATE_S2)) -+ is_in_lpspg = _TRUE; -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ -+ if (psta) -+ psta->cmn.ra_info.disable_ra = (is_in_lpspg) ? _TRUE : _FALSE; -+} -+*/ -+void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ /*u8 rate_id;*/ -+ -+ if(sta == NULL) { -+ RTW_ERR("%s sta is null\n", __func__); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ if (in_lpspg) { -+ sta->cmn.ra_info.disable_ra = _TRUE; -+ sta->cmn.ra_info.disable_pt = _TRUE; -+ /*TODO : DRV fix tx rate*/ -+ /*rate_id = phydm_get_rate_from_rssi_lv(phydm, sta->cmn.mac_id);*/ -+ } else { -+ sta->cmn.ra_info.disable_ra = _FALSE; -+ sta->cmn.ra_info.disable_pt = _FALSE; -+ } -+ -+ rtw_phydm_ra_registed(adapter, sta); -+} -+#endif -+ -+/*#define DBG_PHYDM_STATE_CHK*/ -+ -+ -+static u8 _rtw_phydm_rfk_condition_check(_adapter *adapter, u8 is_scaning, u8 ifs_linked) -+{ -+ u8 rfk_allowed = _TRUE; -+ -+ #ifdef CONFIG_SKIP_RFK_IN_DM -+ rfk_allowed = _FALSE; -+ if (0) -+ RTW_ERR("[RFK-CHK] RF-K not allowed due to CONFIG_SKIP_RFK_IN_DM\n"); -+ return rfk_allowed; -+ #endif -+ -+ #ifdef CONFIG_MCC_MODE -+ /*not in MCC State*/ -+ if (MCC_EN(adapter) && -+ rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { -+ rfk_allowed = _FALSE; -+ if (0) -+ RTW_INFO("[RFK-CHK] RF-K not allowed due to doing MCC\n"); -+ return rfk_allowed; -+ } -+ #endif -+ -+ #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) -+ -+ #endif -+ -+ if (ifs_linked) { -+ if (is_scaning) { -+ rfk_allowed = _FALSE; -+ RTW_DBG("[RFK-CHK] RF-K not allowed due to ifaces under site-survey\n"); -+ } -+ else { -+ rfk_allowed = rtw_mi_stayin_union_ch_chk(adapter) ? _TRUE : _FALSE; -+ if (rfk_allowed == _FALSE) -+ RTW_ERR("[RFK-CHK] RF-K not allowed due to ld_iface not stayin union ch\n"); -+ } -+ } -+ -+ return rfk_allowed; -+} -+ -+#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) -+static u8 _rtw_phydm_iqk_segment_chk(_adapter *adapter, u8 ifs_linked) -+{ -+ u8 iqk_sgt = _FALSE; -+ -+#if 0 -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ if (ifs_linked && (dvobj->traffic_stat.cur_tx_tp > 2 || dvobj->traffic_stat.cur_rx_tp > 2)) -+ rst = _TRUE; -+#else -+ if (ifs_linked) -+ iqk_sgt = _TRUE; -+#endif -+ return iqk_sgt; -+} -+#endif -+ -+/*check the tx low rate while unlinked to any AP;for pwr tracking */ -+static u8 _rtw_phydm_pwr_tracking_rate_check(_adapter *adapter) -+{ -+ int i; -+ _adapter *iface; -+ u8 if_tx_rate = 0xFF; -+ u8 tx_rate = 0xFF; -+ struct mlme_ext_priv *pmlmeext = NULL; -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ pmlmeext = &(iface->mlmeextpriv); -+ if ((iface) && rtw_is_adapter_up(iface)) { -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_role(&(iface)->wdinfo, P2P_ROLE_DISABLE)) -+ if_tx_rate = IEEE80211_OFDM_RATE_6MB; -+ else -+#endif -+ if_tx_rate = pmlmeext->tx_rate; -+ -+ if (if_tx_rate < tx_rate) { -+ /*5G limit ofdm rate*/ -+ if (pHalData->current_channel > 14) { -+ if (!IS_CCK_RATE(if_tx_rate)) -+ tx_rate = if_tx_rate; -+ } else { -+ tx_rate = if_tx_rate; -+ } -+ } -+ RTW_DBG("%s i=%d if_tx_rate =0x%x\n", __func__, i, if_tx_rate); -+ } -+ } -+ -+ /*suggest by RF James,unlinked setting ofdm rate*/ -+ if (tx_rate == 0xFF) -+ tx_rate = IEEE80211_OFDM_RATE_6MB; -+ -+ RTW_DBG("%s tx_low_rate (unlinked to any AP)=0x%x\n", __func__, tx_rate); -+ return tx_rate; -+} -+ -+#ifdef CONFIG_DYNAMIC_SOML -+void rtw_dyn_soml_byte_update(_adapter *adapter, u8 data_rate, u32 size) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ -+ phydm_soml_bytes_acq(phydm, data_rate, size); -+} -+ -+void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl, -+ u8 period, u8 delay) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ -+ phydm_adaptive_soml_para_set(phydm, train_num, intvl, period, delay); -+ RTW_INFO("%s.\n", __func__); -+} -+ -+void rtw_dyn_soml_config(_adapter *adapter) -+{ -+ RTW_INFO("%s.\n", __func__); -+ -+ if (adapter->registrypriv.dyn_soml_en == 1) { -+ /* Must after phydm_adaptive_soml_init() */ -+ rtw_hal_set_hwreg(adapter , HW_VAR_SET_SOML_PARAM , NULL); -+ RTW_INFO("dyn_soml_en = 1\n"); -+ } else { -+ if (adapter->registrypriv.dyn_soml_en == 2) { -+ rtw_dyn_soml_para_set(adapter, -+ adapter->registrypriv.dyn_soml_train_num, -+ adapter->registrypriv.dyn_soml_interval, -+ adapter->registrypriv.dyn_soml_period, -+ adapter->registrypriv.dyn_soml_delay); -+ RTW_INFO("dyn_soml_en = 2\n"); -+ RTW_INFO("dyn_soml_en, param = %d, %d, %d, %d\n", -+ adapter->registrypriv.dyn_soml_train_num, -+ adapter->registrypriv.dyn_soml_interval, -+ adapter->registrypriv.dyn_soml_period, -+ adapter->registrypriv.dyn_soml_delay); -+ } else if (adapter->registrypriv.dyn_soml_en == 0) { -+ RTW_INFO("dyn_soml_en = 0\n"); -+ } else -+ RTW_ERR("%s, wrong setting: dyn_soml_en = %d\n", __func__, -+ adapter->registrypriv.dyn_soml_en); -+ } -+} -+#endif -+ -+void rtw_phydm_set_rrsr(_adapter *adapter, u32 rrsr_value, bool write_rrsr) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ u32 temp_rrsr =0xFFFFFFFF; -+ -+ if (adapter->registrypriv.set_rrsr_value != 0xFFFFFFFF) -+ temp_rrsr = adapter->registrypriv.set_rrsr_value; -+ else -+ temp_rrsr = rrsr_value; -+ -+ odm_cmn_info_update(phydm, ODM_CMNINFO_RRSR_VAL, temp_rrsr); -+ if(write_rrsr) -+ phydm_rrsr_set_register(phydm, temp_rrsr); -+} -+void rtw_phydm_dyn_rrsr_en(_adapter *adapter, bool en_rrsr) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ -+ phydm_rrsr_en(phydm, en_rrsr); -+} -+void rtw_phydm_read_efuse(_adapter *adapter) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ struct dm_struct *phydm = &(hal_data->odmpriv); -+ -+ /*PHYDM API - thermal trim*/ -+ phydm_get_thermal_trim_offset(phydm); -+ /*PHYDM API - power trim*/ -+ phydm_get_power_trim_offset(phydm); -+} -+ -+#ifdef CONFIG_LPS_PWR_TRACKING -+void rtw_phydm_pwr_tracking_directly(_adapter *adapter) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ u8 rfk_forbidden = _TRUE; -+ u8 is_linked = _FALSE; -+ -+ if (rtw_mi_check_status(adapter, MI_ASSOC)) -+ is_linked = _TRUE; -+ -+ rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter, hal_data->bScanInProcess, is_linked) == _TRUE) ? _FALSE : _TRUE; -+ halrf_cmn_info_set(&hal_data->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); -+ -+ odm_txpowertracking_direct_ce(&hal_data->odmpriv); -+} -+#endif -+ -+void rtw_phydm_watchdog(_adapter *adapter, bool in_lps) -+{ -+ u8 bLinked = _FALSE; -+ u8 bsta_state = _FALSE; -+ u8 bBtDisabled = _TRUE; -+ u8 rfk_forbidden = _FALSE; -+ #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) -+ u8 segment_iqk = _FALSE; -+ #endif -+ u8 tx_unlinked_low_rate = 0xFF; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter); -+ -+ if (!rtw_is_hw_init_completed(adapter)) { -+ RTW_DBG("%s skip due to hw_init_completed == FALSE\n", __func__); -+ return; -+ } -+ if (rtw_mi_check_fwstate(adapter, WIFI_UNDER_SURVEY)) -+ pHalData->bScanInProcess = _TRUE; -+ else -+ pHalData->bScanInProcess = _FALSE; -+ -+ if (rtw_mi_check_status(adapter, MI_ASSOC)) { -+ bLinked = _TRUE; -+ if (rtw_mi_check_status(adapter, MI_STA_LINKED)) -+ bsta_state = _TRUE; -+ } -+ -+ odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_LINK, bLinked); -+ odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_STATION_STATE, bsta_state); -+ -+ #ifdef CONFIG_BT_COEXIST -+ bBtDisabled = rtw_btcoex_IsBtDisabled(adapter); -+ odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED, -+ (bBtDisabled == _TRUE) ? _FALSE : _TRUE); -+ #else -+ odm_cmn_info_update(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED, _FALSE); -+ #endif /* CONFIG_BT_COEXIST */ -+ -+ rfk_forbidden = (_rtw_phydm_rfk_condition_check(adapter, pHalData->bScanInProcess, bLinked) == _TRUE) ? _FALSE : _TRUE; -+ halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); -+ -+ #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) -+ segment_iqk = _rtw_phydm_iqk_segment_chk(adapter, bLinked); -+ halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_IQK_SEGMENT, segment_iqk); -+ #endif -+ #ifdef DBG_PHYDM_STATE_CHK -+ RTW_INFO("%s rfk_forbidden = %s, segment_iqk = %s\n", -+ __func__, (rfk_forbidden) ? "Y" : "N", (segment_iqk) ? "Y" : "N"); -+ #endif -+ -+ if (bLinked == _FALSE) { -+ tx_unlinked_low_rate = _rtw_phydm_pwr_tracking_rate_check(adapter); -+ halrf_cmn_info_set(&pHalData->odmpriv, HALRF_CMNINFO_RATE_INDEX, tx_unlinked_low_rate); -+ } -+ -+ /*if (!rtw_mi_stayin_union_band_chk(adapter)) { -+ #ifdef DBG_PHYDM_STATE_CHK -+ RTW_ERR("Not stay in union band, skip phydm\n"); -+ #endif -+ goto _exit; -+ }*/ -+ -+ #ifdef CONFIG_TDMADIG -+ rtw_phydm_tdmadig(adapter, TDMADIG_NON_INIT); -+ #endif/*CONFIG_TDMADIG*/ -+ -+ if (in_lps) -+ phydm_watchdog_lps(&pHalData->odmpriv); -+ else -+ phydm_watchdog(&pHalData->odmpriv); -+ -+ #ifdef CONFIG_RTW_ACS -+ rtw_acs_update_current_info(adapter); -+ #endif -+ -+ return; -+} -+ -+ -diff --git a/drivers/staging/rtl8723cs/hal/hal_dm.h b/drivers/staging/rtl8723cs/hal/hal_dm.h -new file mode 100644 -index 000000000000..863ffb7be99c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_dm.h -@@ -0,0 +1,121 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_DM_H__ -+#define __HAL_DM_H__ -+ -+#define adapter_to_phydm(adapter) (&(GET_HAL_DATA(adapter)->odmpriv)) -+#define dvobj_to_phydm(dvobj) adapter_to_phydm(dvobj_get_primary_adapter(dvobj)) -+#ifdef CONFIG_TDMADIG -+void rtw_phydm_tdmadig(_adapter *adapter, u8 state); -+#endif -+void rtw_phydm_priv_init(_adapter *adapter); -+void Init_ODM_ComInfo(_adapter *adapter); -+void rtw_phydm_init(_adapter *adapter); -+ -+void rtw_hal_turbo_edca(_adapter *adapter); -+u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter); -+ -+void GetHalODMVar( -+ PADAPTER Adapter, -+ HAL_ODM_VARIABLE eVariable, -+ void *pValue1, -+ void *pValue2); -+void SetHalODMVar( -+ PADAPTER Adapter, -+ HAL_ODM_VARIABLE eVariable, -+ void *pValue1, -+ BOOLEAN bSet); -+ -+void rtw_phydm_ra_registed(_adapter *adapter, struct sta_info *psta); -+ -+#ifdef CONFIG_DYNAMIC_SOML -+void rtw_dyn_soml_byte_update(_adapter *adapter, u8 data_rate, u32 size); -+void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl, -+ u8 period, u8 delay); -+void rtw_dyn_soml_config(_adapter *adapter); -+#endif -+void rtw_phydm_set_rrsr(_adapter *adapter, u32 rrsr_value, bool write_rrsr); -+void rtw_phydm_dyn_rrsr_en(_adapter *adapter, bool en_rrsr); -+void rtw_phydm_watchdog(_adapter *adapter, bool in_lps); -+ -+void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter); -+void dump_sta_info(void *sel, struct sta_info *psta); -+void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta); -+ -+void rtw_hal_phydm_cal_trigger(_adapter *adapter); -+#ifdef CONFIG_DBG_RF_CAL -+void rtw_hal_iqk_test(_adapter *adapter, bool recovery, bool clear, bool segment); -+void rtw_hal_lck_test(_adapter *adapter); -+#endif -+ -+s8 rtw_dm_get_min_rssi(_adapter *adapter); -+s8 rtw_phydm_get_min_rssi(_adapter *adapter); -+u8 rtw_phydm_get_cur_igi(_adapter *adapter); -+bool rtw_phydm_get_edcca_flag(_adapter *adapter); -+ -+ -+#ifdef CONFIG_LPS_LCLK_WD_TIMER -+extern void phydm_rssi_monitor_check(void *p_dm_void); -+ -+void rtw_phydm_wd_lps_lclk_hdl(_adapter *adapter); -+void rtw_phydm_watchdog_in_lps_lclk(_adapter *adapter); -+#endif -+#ifdef CONFIG_TDMADIG -+enum rtw_tdmadig_state{ -+ TDMADIG_INIT, -+ TDMADIG_NON_INIT, -+}; -+#endif -+enum phy_cnt { -+ FA_OFDM, -+ FA_CCK, -+ FA_TOTAL, -+ CCA_OFDM, -+ CCA_CCK, -+ CCA_ALL, -+ CRC32_OK_VHT, -+ CRC32_OK_HT, -+ CRC32_OK_LEGACY, -+ CRC32_OK_CCK, -+ CRC32_ERROR_VHT, -+ CRC32_ERROR_HT, -+ CRC32_ERROR_LEGACY, -+ CRC32_ERROR_CCK, -+}; -+u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt); -+#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1) \ -+ || (RTL8723F_SUPPORT == 1)) -+void rtw_phydm_iqk_trigger(_adapter *adapter); -+#endif -+void rtw_phydm_read_efuse(_adapter *adapter); -+bool rtw_phydm_set_crystal_cap(_adapter *adapter, u8 crystal_cap); -+ -+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR -+void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id); -+#endif -+ -+#ifdef CONFIG_LPS_PG -+void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg); -+#endif -+#ifdef CONFIG_LPS_PWR_TRACKING -+void rtw_phydm_pwr_tracking_directly(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+void rtw_phydm_trx_cfg(_adapter *adapter, bool tx_1ss); -+#endif -+u8 rtw_hal_runtime_trx_path_decision(_adapter *adapter); -+bool rtw_phydm_rfe_ctrl_gpio(_adapter *adapter, u8 gpio_num); -+#endif /* __HAL_DM_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/hal_dm_acs.c b/drivers/staging/rtl8723cs/hal/hal_dm_acs.c -new file mode 100644 -index 000000000000..c6196127d0b1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_dm_acs.c -@@ -0,0 +1,577 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2014 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include -+#include -+ -+ -+#if defined(CONFIG_RTW_ACS) || defined(CONFIG_BACKGROUND_NOISE_MONITOR) -+static void _rtw_bss_nums_count(_adapter *adapter, u8 *pbss_nums) -+{ -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ _list *plist, *phead; -+ _irqL irqL; -+ int chan_idx = -1; -+ -+ if (pbss_nums == NULL) { -+ RTW_ERR("%s pbss_nums is null pointer\n", __func__); -+ return; -+ } -+ _rtw_memset(pbss_nums, 0, MAX_CHANNEL_NUM); -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ if (!pnetwork) -+ break; -+ chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), pnetwork->network.Configuration.DSConfig); -+ if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) { -+ RTW_ERR("%s can't get chan_idx(CH:%d)\n", -+ __func__, pnetwork->network.Configuration.DSConfig); -+ chan_idx = 0; -+ } -+ /*if (pnetwork->network.Reserved[0] != BSS_TYPE_PROB_REQ)*/ -+ -+ pbss_nums[chan_idx]++; -+ -+ plist = get_next(plist); -+ } -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+} -+ -+u8 rtw_get_ch_num_by_idx(_adapter *adapter, u8 idx) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ RT_CHANNEL_INFO *pch_set = rfctl->channel_set; -+ u8 max_chan_nums = rfctl->max_chan_nums; -+ -+ if (idx >= max_chan_nums) -+ return 0; -+ return pch_set[idx].ChannelNum; -+} -+#endif /*defined(CONFIG_RTW_ACS) || defined(CONFIG_BACKGROUND_NOISE_MONITOR)*/ -+ -+ -+#ifdef CONFIG_RTW_ACS -+void rtw_acs_version_dump(void *sel, _adapter *adapter) -+{ -+ _RTW_PRINT_SEL(sel, "RTK_ACS VER_%d\n", RTK_ACS_VERSION); -+} -+u8 rtw_phydm_clm_ratio(_adapter *adapter) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CLM_RATIO); -+} -+u8 rtw_phydm_nhm_ratio(_adapter *adapter) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_NHM_ENV_RATIO); -+} -+ -+u8 rtw_phydm_nhm_noise_pwr(_adapter *adapter) -+{ -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ -+ return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_NHM_PWR); -+} -+ -+void rtw_acs_reset(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct auto_chan_sel *pacs = &hal_data->acs; -+ -+ _rtw_memset(pacs, 0, sizeof(struct auto_chan_sel)); -+ #ifdef CONFIG_RTW_ACS_DBG -+ rtw_acs_adv_reset(adapter); -+ #endif /*CONFIG_RTW_ACS_DBG*/ -+} -+ -+#ifdef CONFIG_RTW_ACS_DBG -+u8 rtw_is_acs_igi_valid(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct auto_chan_sel *pacs = &hal_data->acs; -+ -+ if ((pacs->igi) && ((pacs->igi >= 0x1E) || (pacs->igi < 0x60))) -+ return _TRUE; -+ -+ return _FALSE; -+} -+void rtw_acs_adv_setting(_adapter *adapter, RT_SCAN_TYPE scan_type, u16 scan_time, u8 igi, u8 bw) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct auto_chan_sel *pacs = &hal_data->acs; -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ -+ pacs->scan_type = scan_type; -+ pacs->scan_time = scan_time; -+ pacs->igi = igi; -+ pacs->bw = bw; -+ RTW_INFO("[ACS] ADV setting - scan_type:%c, ch_ms:%d(ms), igi:0x%02x, bw:%d\n", -+ pacs->scan_type ? 'A' : 'P', pacs->scan_time, pacs->igi, pacs->bw); -+} -+void rtw_acs_adv_reset(_adapter *adapter) -+{ -+ rtw_acs_adv_setting(adapter, SCAN_ACTIVE, 0, 0, 0); -+} -+#endif /*CONFIG_RTW_ACS_DBG*/ -+ -+void rtw_acs_trigger(_adapter *adapter, u16 scan_time_ms, u8 scan_chan, enum NHM_PID pid) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+#if (RTK_ACS_VERSION == 3) -+ struct clm_para_info clm_para; -+ struct nhm_para_info nhm_para; -+ struct env_trig_rpt trig_rpt; -+ -+ scan_time_ms -= 10; -+ -+ init_acs_clm(clm_para, scan_time_ms); -+ -+ if (pid == NHM_PID_IEEE_11K_HIGH) -+ init_11K_high_nhm(nhm_para, scan_time_ms); -+ else if (pid == NHM_PID_IEEE_11K_LOW) -+ init_11K_low_nhm(nhm_para, scan_time_ms); -+ else -+ init_acs_nhm(nhm_para, scan_time_ms); -+ -+ hal_data->acs.trig_rst = phydm_env_mntr_trigger(phydm, &nhm_para, &clm_para, &trig_rpt); -+ if (hal_data->acs.trig_rst == (NHM_SUCCESS | CLM_SUCCESS)) { -+ hal_data->acs.trig_rpt.clm_rpt_stamp = trig_rpt.clm_rpt_stamp; -+ hal_data->acs.trig_rpt.nhm_rpt_stamp = trig_rpt.nhm_rpt_stamp; -+ /*RTW_INFO("[ACS] trigger success (rst = 0x%02x, clm_stamp:%d, nhm_stamp:%d)\n", -+ hal_data->acs.trig_rst, hal_data->acs.trig_rpt.clm_rpt_stamp, hal_data->acs.trig_rpt.nhm_rpt_stamp);*/ -+ } else -+ RTW_ERR("[ACS] trigger failed (rst = 0x%02x)\n", hal_data->acs.trig_rst); -+#else -+ phydm_ccx_monitor_trigger(phydm, scan_time_ms); -+#endif -+ -+ hal_data->acs.trigger_ch = scan_chan; -+ hal_data->acs.triggered = _TRUE; -+ -+ #ifdef CONFIG_RTW_ACS_DBG -+ RTW_INFO("[ACS] Trigger CH:%d, Times:%d\n", hal_data->acs.trigger_ch, scan_time_ms); -+ #endif -+} -+void rtw_acs_get_rst(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ int chan_idx = -1; -+ u8 cur_chan = hal_data->acs.trigger_ch; -+ -+ if (cur_chan == 0) -+ return; -+ -+ if (!hal_data->acs.triggered) -+ return; -+ -+ chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), cur_chan); -+ if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) { -+ RTW_ERR("[ACS] %s can't get chan_idx(CH:%d)\n", __func__, cur_chan); -+ return; -+ } -+#if (RTK_ACS_VERSION == 3) -+ if (!(hal_data->acs.trig_rst == (NHM_SUCCESS | CLM_SUCCESS))) { -+ RTW_ERR("[ACS] get_rst return, due to acs trigger failed\n"); -+ return; -+ } -+ -+ { -+ struct env_mntr_rpt rpt = {0}; -+ u8 rst; -+ -+ rst = phydm_env_mntr_result(phydm, &rpt); -+ if ((rst == (NHM_SUCCESS | CLM_SUCCESS)) && -+ (rpt.clm_rpt_stamp == hal_data->acs.trig_rpt.clm_rpt_stamp) && -+ (rpt.nhm_rpt_stamp == hal_data->acs.trig_rpt.nhm_rpt_stamp)){ -+ hal_data->acs.clm_ratio[chan_idx] = rpt.clm_ratio; -+ hal_data->acs.nhm_ratio[chan_idx] = rpt.nhm_env_ratio; -+ hal_data->acs.env_mntr_rpt[chan_idx] = (rpt.nhm_noise_pwr -100); -+ _rtw_memcpy(&hal_data->acs.nhm[chan_idx][0], rpt.nhm_result, NHM_RPT_NUM); -+ -+ /*RTW_INFO("[ACS] get_rst success (rst = 0x%02x, clm_stamp:%d:%d, nhm_stamp:%d:%d)\n", -+ rst, -+ hal_data->acs.trig_rpt.clm_rpt_stamp, rpt.clm_rpt_stamp, -+ hal_data->acs.trig_rpt.nhm_rpt_stamp, rpt.nhm_rpt_stamp);*/ -+ } else { -+ RTW_ERR("[ACS] get_rst failed (rst = 0x%02x, clm_stamp:%d:%d, nhm_stamp:%d:%d)\n", -+ rst, -+ hal_data->acs.trig_rpt.clm_rpt_stamp, rpt.clm_rpt_stamp, -+ hal_data->acs.trig_rpt.nhm_rpt_stamp, rpt.nhm_rpt_stamp); -+ } -+ } -+ -+#else -+ phydm_ccx_monitor_result(phydm); -+ -+ hal_data->acs.clm_ratio[chan_idx] = rtw_phydm_clm_ratio(adapter); -+ hal_data->acs.nhm_ratio[chan_idx] = rtw_phydm_nhm_ratio(adapter); -+#endif -+ hal_data->acs.triggered = _FALSE; -+ #ifdef CONFIG_RTW_ACS_DBG -+ RTW_INFO("[ACS] Result CH:%d, CLM:%d NHM:%d\n", -+ cur_chan, hal_data->acs.clm_ratio[chan_idx], hal_data->acs.nhm_ratio[chan_idx]); -+ RTW_INFO("[ACS] Result NHM(dBm):%d\n", -+ hal_data->acs.env_mntr_rpt[chan_idx] ); -+ #endif -+} -+ -+void _rtw_phydm_acs_select_best_chan(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ u8 ch_idx; -+ u8 ch_idx_24g = 0xFF, ch_idx_5g = 0xFF; -+ u8 min_itf_24g = 0xFF, min_itf_5g = 0xFF; -+ u8 *pbss_nums = hal_data->acs.bss_nums; -+ u8 *pclm_ratio = hal_data->acs.clm_ratio; -+ u8 *pnhm_ratio = hal_data->acs.nhm_ratio; -+ u8 *pinterference_time = hal_data->acs.interference_time; -+ u8 max_chan_nums = rfctl->max_chan_nums; -+ -+ for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) { -+ if (pbss_nums[ch_idx]) -+ pinterference_time[ch_idx] = (pclm_ratio[ch_idx] / 2) + (pnhm_ratio[ch_idx] / 2); -+ else -+ pinterference_time[ch_idx] = (pclm_ratio[ch_idx] / 3) + ((pnhm_ratio[ch_idx] * 2) / 3); -+ -+ if (rtw_get_ch_num_by_idx(adapter, ch_idx) < 14) { -+ if (pinterference_time[ch_idx] < min_itf_24g) { -+ min_itf_24g = pinterference_time[ch_idx]; -+ ch_idx_24g = ch_idx; -+ } -+ } else { -+ if (pinterference_time[ch_idx] < min_itf_5g) { -+ min_itf_5g = pinterference_time[ch_idx]; -+ ch_idx_5g = ch_idx; -+ } -+ } -+ } -+ if (ch_idx_24g != 0xFF) -+ hal_data->acs.best_chan_24g = rtw_get_ch_num_by_idx(adapter, ch_idx_24g); -+ -+ if (ch_idx_5g != 0xFF) -+ hal_data->acs.best_chan_5g = rtw_get_ch_num_by_idx(adapter, ch_idx_5g); -+ -+ hal_data->acs.trigger_ch = 0; -+} -+ -+void rtw_acs_info_dump(void *sel, _adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ u8 max_chan_nums = rfctl->max_chan_nums; -+ u8 ch_idx, ch_num; -+ -+ _RTW_PRINT_SEL(sel, "========== ACS (VER-%d) ==========\n", RTK_ACS_VERSION); -+ _RTW_PRINT_SEL(sel, "Best 24G Channel:%d\n", hal_data->acs.best_chan_24g); -+ _RTW_PRINT_SEL(sel, "Best 5G Channel:%d\n\n", hal_data->acs.best_chan_5g); -+ -+ #ifdef CONFIG_RTW_ACS_DBG -+ _RTW_PRINT_SEL(sel, "Advanced setting - scan_type:%c, ch_ms:%d(ms), igi:0x%02x, bw:%d\n", -+ hal_data->acs.scan_type ? 'A' : 'P', hal_data->acs.scan_time, hal_data->acs.igi, hal_data->acs.bw); -+ -+ _RTW_PRINT_SEL(sel, "BW 20MHz\n"); -+ _RTW_PRINT_SEL(sel, "%5s %3s %3s %3s(%%) %3s(%%) %3s\n", -+ "Index", "CH", "BSS", "CLM", "NHM", "ITF"); -+ -+ for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) { -+ ch_num = rtw_get_ch_num_by_idx(adapter, ch_idx); -+ _RTW_PRINT_SEL(sel, "%5d %3d %3d %6d %6d %3d\n", -+ ch_idx, ch_num, hal_data->acs.bss_nums[ch_idx], -+ hal_data->acs.clm_ratio[ch_idx], -+ hal_data->acs.nhm_ratio[ch_idx], -+ hal_data->acs.interference_time[ch_idx]); -+ } -+ #endif -+} -+void rtw_acs_select_best_chan(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ _rtw_bss_nums_count(adapter, hal_data->acs.bss_nums); -+ _rtw_phydm_acs_select_best_chan(adapter); -+ rtw_acs_info_dump(RTW_DBGDUMP, adapter); -+} -+ -+void rtw_acs_start(_adapter *adapter) -+{ -+ rtw_acs_reset(adapter); -+ if (GET_ACS_STATE(adapter) != ACS_ENABLE) -+ SET_ACS_STATE(adapter, ACS_ENABLE); -+} -+void rtw_acs_stop(_adapter *adapter) -+{ -+ SET_ACS_STATE(adapter, ACS_DISABLE); -+} -+ -+ -+u8 rtw_acs_get_clm_ratio_by_ch_num(_adapter *adapter, u8 chan) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ int chan_idx = -1; -+ -+ chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan); -+ if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) { -+ RTW_ERR("[ACS] Get CLM fail, can't get chan_idx(CH:%d)\n", chan); -+ return 0; -+ } -+ -+ return hal_data->acs.clm_ratio[chan_idx]; -+} -+u8 rtw_acs_get_clm_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ if (ch_idx >= MAX_CHANNEL_NUM) { -+ RTW_ERR("%s [ACS] ch_idx(%d) is invalid\n", __func__, ch_idx); -+ return 0; -+ } -+ -+ return hal_data->acs.clm_ratio[ch_idx]; -+} -+u8 rtw_acs_get_nhm_ratio_by_ch_num(_adapter *adapter, u8 chan) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ int chan_idx = -1; -+ -+ chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan); -+ if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) { -+ RTW_ERR("[ACS] Get NHM fail, can't get chan_idx(CH:%d)\n", chan); -+ return 0; -+ } -+ -+ return hal_data->acs.nhm_ratio[chan_idx]; -+} -+u8 rtw_acs_get_nhm_noise_pwr_by_ch_idx(_adapter *adapter, u8 ch_idx) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ if (ch_idx >= MAX_CHANNEL_NUM) { -+ RTW_ERR("%s [ACS] ch_idx(%d) is invalid\n", __func__, ch_idx); -+ return 0; -+ } -+ -+ return hal_data->acs.env_mntr_rpt[ch_idx]; -+} -+ -+u8 rtw_acs_get_num_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ if (ch_idx >= MAX_CHANNEL_NUM) { -+ RTW_ERR("%s [ACS] ch_idx(%d) is invalid\n", __func__, ch_idx); -+ return 0; -+ } -+ -+ return hal_data->acs.nhm_ratio[ch_idx]; -+} -+void rtw_acs_chan_info_dump(void *sel, _adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ u8 max_chan_nums = rfctl->max_chan_nums; -+ u8 ch_idx, ch_num; -+ u8 utilization; -+ -+ _RTW_PRINT_SEL(sel, "BW 20MHz\n"); -+ _RTW_PRINT_SEL(sel, "%5s %3s %7s(%%) %12s(%%) %11s(%%) %9s(%%) %8s(%%)\n", -+ "Index", "CH", "Quality", "Availability", "Utilization", -+ "WIFI Util", "Interference Util"); -+ -+ for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) { -+ ch_num = rtw_get_ch_num_by_idx(adapter, ch_idx); -+ utilization = hal_data->acs.clm_ratio[ch_idx] + hal_data->acs.nhm_ratio[ch_idx]; -+ _RTW_PRINT_SEL(sel, "%5d %3d %7d %12d %12d %12d %12d\n", -+ ch_idx, ch_num, -+ (100-hal_data->acs.interference_time[ch_idx]), -+ (100-utilization), -+ utilization, -+ hal_data->acs.clm_ratio[ch_idx], -+ hal_data->acs.nhm_ratio[ch_idx]); -+ } -+} -+void rtw_acs_current_info_dump(void *sel, _adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u8 ch, cen_ch, bw, offset; -+ -+ _RTW_PRINT_SEL(sel, "========== ACS (VER-%d) ==========\n", RTK_ACS_VERSION); -+ -+ ch = rtw_get_oper_ch(adapter); -+ bw = rtw_get_oper_bw(adapter); -+ offset = rtw_get_oper_choffset(adapter); -+ -+ _RTW_PRINT_SEL(sel, "Current Channel:%d\n", ch); -+ if ((bw == CHANNEL_WIDTH_80) ||(bw == CHANNEL_WIDTH_40)) { -+ cen_ch = rtw_get_center_ch(ch, bw, offset); -+ _RTW_PRINT_SEL(sel, "Center Channel:%d\n", cen_ch); -+ } -+ -+ _RTW_PRINT_SEL(sel, "Current BW %s\n", ch_width_str(bw)); -+ if (0) -+ _RTW_PRINT_SEL(sel, "Current IGI 0x%02x\n", rtw_phydm_get_cur_igi(adapter)); -+ _RTW_PRINT_SEL(sel, "CLM:%d, NHM:%d\n\n", -+ hal_data->acs.cur_ch_clm_ratio, hal_data->acs.cur_ch_nhm_ratio); -+} -+ -+void rtw_acs_update_current_info(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ hal_data->acs.cur_ch_clm_ratio = rtw_phydm_clm_ratio(adapter); -+ hal_data->acs.cur_ch_nhm_ratio = rtw_phydm_nhm_ratio(adapter); -+ -+ #ifdef CONFIG_RTW_ACS_DBG -+ rtw_acs_current_info_dump(RTW_DBGDUMP, adapter); -+ #endif -+} -+#endif /*CONFIG_RTW_ACS*/ -+ -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+void rtw_noise_monitor_version_dump(void *sel, _adapter *adapter) -+{ -+ _RTW_PRINT_SEL(sel, "RTK_NOISE_MONITOR VER_%d\n", RTK_NOISE_MONITOR_VERSION); -+} -+void rtw_nm_enable(_adapter *adapter) -+{ -+ SET_NM_STATE(adapter, NM_ENABLE); -+} -+void rtw_nm_disable(_adapter *adapter) -+{ -+ SET_NM_STATE(adapter, NM_DISABLE); -+} -+void rtw_noise_info_dump(void *sel, _adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ u8 max_chan_nums = rfctl->max_chan_nums; -+ u8 ch_idx, ch_num; -+ -+ _RTW_PRINT_SEL(sel, "========== NM (VER-%d) ==========\n", RTK_NOISE_MONITOR_VERSION); -+ -+ _RTW_PRINT_SEL(sel, "%5s %3s %3s %10s", "Index", "CH", "BSS", "Noise(dBm)\n"); -+ -+ _rtw_bss_nums_count(adapter, hal_data->nm.bss_nums); -+ -+ for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) { -+ ch_num = rtw_get_ch_num_by_idx(adapter, ch_idx); -+ _RTW_PRINT_SEL(sel, "%5d %3d %3d %10d\n", -+ ch_idx, ch_num, hal_data->nm.bss_nums[ch_idx], -+ hal_data->nm.noise[ch_idx]); -+ } -+} -+ -+void rtw_noise_measure(_adapter *adapter, u8 chan, u8 is_pause_dig, u8 igi_value, u32 max_time) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct dm_struct *phydm = &hal_data->odmpriv; -+ int chan_idx = -1; -+ s16 noise = 0; -+ -+ #ifdef DBG_NOISE_MONITOR -+ RTW_INFO("[NM] chan(%d)-PauseDIG:%s, IGIValue:0x%02x, max_time:%d (ms)\n", -+ chan, (is_pause_dig) ? "Y" : "N", igi_value, max_time); -+ #endif -+ -+ chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan); -+ if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) { -+ RTW_ERR("[NM] Get noise fail, can't get chan_idx(CH:%d)\n", chan); -+ return; -+ } -+ noise = odm_inband_noise_monitor(phydm, is_pause_dig, igi_value, max_time); /*dBm*/ -+ -+ hal_data->nm.noise[chan_idx] = noise; -+ -+ #ifdef DBG_NOISE_MONITOR -+ RTW_INFO("[NM] %s chan_%d, noise = %d (dBm)\n", __func__, chan, hal_data->nm.noise[chan_idx]); -+ -+ RTW_INFO("[NM] noise_a = %d, noise_b = %d noise_all:%d\n", -+ phydm->noise_level.noise[RF_PATH_A], -+ phydm->noise_level.noise[RF_PATH_B], -+ phydm->noise_level.noise_all); -+ #endif /*DBG_NOISE_MONITOR*/ -+} -+ -+s16 rtw_noise_query_by_chan_num(_adapter *adapter, u8 chan) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ s16 noise = 0; -+ int chan_idx = -1; -+ -+ chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan); -+ if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) { -+ RTW_ERR("[NM] Get noise fail, can't get chan_idx(CH:%d)\n", chan); -+ return noise; -+ } -+ noise = hal_data->nm.noise[chan_idx]; -+ -+ #ifdef DBG_NOISE_MONITOR -+ RTW_INFO("[NM] %s chan_%d, noise = %d (dBm)\n", __func__, chan, noise); -+ #endif/*DBG_NOISE_MONITOR*/ -+ return noise; -+} -+s16 rtw_noise_query_by_chan_idx(_adapter *adapter, u8 ch_idx) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ s16 noise = 0; -+ -+ if (ch_idx >= MAX_CHANNEL_NUM) { -+ RTW_ERR("[NM] %s ch_idx(%d) is invalid\n", __func__, ch_idx); -+ return noise; -+ } -+ noise = hal_data->nm.noise[ch_idx]; -+ -+ #ifdef DBG_NOISE_MONITOR -+ RTW_INFO("[NM] %s ch_idx %d, noise = %d (dBm)\n", __func__, ch_idx, noise); -+ #endif/*DBG_NOISE_MONITOR*/ -+ return noise; -+} -+ -+s16 rtw_noise_measure_curchan(_adapter *padapter) -+{ -+ s16 noise = 0; -+ u8 igi_value = 0x1E; -+ u32 max_time = 100;/* ms */ -+ u8 is_pause_dig = _TRUE; -+ u8 cur_chan = rtw_get_oper_ch(padapter); -+ -+ if (rtw_linked_check(padapter) == _FALSE) -+ return noise; -+ -+ rtw_ps_deny(padapter, PS_DENY_IOCTL); -+ LeaveAllPowerSaveModeDirect(padapter); -+ rtw_noise_measure(padapter, cur_chan, is_pause_dig, igi_value, max_time); -+ noise = rtw_noise_query_by_chan_num(padapter, cur_chan); -+ rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); -+ -+ return noise; -+} -+#endif /*CONFIG_BACKGROUND_NOISE_MONITOR*/ -+ -diff --git a/drivers/staging/rtl8723cs/hal/hal_dm_acs.h b/drivers/staging/rtl8723cs/hal/hal_dm_acs.h -new file mode 100644 -index 000000000000..ba6e136bd524 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_dm_acs.h -@@ -0,0 +1,173 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_DM_ACS_H__ -+#define __HAL_DM_ACS_H__ -+#ifdef CONFIG_RTW_ACS -+#define RTK_ACS_VERSION 3 -+ -+#if (RTK_ACS_VERSION == 3) -+enum NHM_PID { -+ NHM_PID_ACS, -+ NHM_PID_IEEE_11K_HIGH, -+ NHM_PID_IEEE_11K_LOW, -+}; -+ -+#define init_clm_param(clm, app, lv, time) \ -+ do {\ -+ clm.clm_app = app;\ -+ clm.clm_lv = lv;\ -+ clm.mntr_time = time;\ -+ } while (0) -+ -+#define init_nhm_param(nhm, txon, cca, cnt_opt, app, lv, time) \ -+ do {\ -+ nhm.incld_txon = txon;\ -+ nhm.incld_cca = cca;\ -+ nhm.div_opt = cnt_opt;\ -+ nhm.nhm_app = app;\ -+ nhm.nhm_lv = lv;\ -+ nhm.mntr_time = time;\ -+ } while (0) -+ -+ -+#define init_acs_clm(clm, time) \ -+ init_clm_param(clm, CLM_ACS, CLM_LV_2, time) -+ -+#define init_acs_nhm(nhm, time) \ -+ init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, NHM_ACS, NHM_LV_2, time) -+ -+#define init_11K_high_nhm(nhm, time) \ -+ init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, IEEE_11K_HIGH, NHM_LV_2, time) -+ -+#define init_11K_low_nhm(nhm, time) \ -+ init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, IEEE_11K_LOW, NHM_LV_2, time) -+ -+ -+#endif /*(RTK_ACS_VERSION == 3)*/ -+void rtw_acs_version_dump(void *sel, _adapter *adapter); -+extern void phydm_ccx_monitor_trigger(void *p_dm_void, u16 monitor_time); -+extern void phydm_ccx_monitor_result(void *p_dm_void); -+ -+#define GET_ACS_STATE(padapter) (ATOMIC_READ(&GET_HAL_DATA(padapter)->acs.state)) -+#define SET_ACS_STATE(padapter, set_state) (ATOMIC_SET(&GET_HAL_DATA(padapter)->acs.state, set_state)) -+#define IS_ACS_ENABLE(padapter) ((GET_ACS_STATE(padapter) == ACS_ENABLE) ? _TRUE : _FALSE) -+ -+enum ACS_STATE { -+ ACS_DISABLE, -+ ACS_ENABLE, -+}; -+ -+#define ACS_BW_20M BIT(0) -+#define ACS_BW_40M BIT(1) -+#define ACS_BW_80M BIT(2) -+#define ACS_BW_160M BIT(3) -+ -+struct auto_chan_sel { -+ ATOMIC_T state; -+ u8 trigger_ch; -+ bool triggered; -+ u8 clm_ratio[MAX_CHANNEL_NUM]; -+ u8 nhm_ratio[MAX_CHANNEL_NUM]; -+ s8 env_mntr_rpt[MAX_CHANNEL_NUM]; -+ #if (RTK_ACS_VERSION == 3) -+ u8 nhm[MAX_CHANNEL_NUM][NHM_RPT_NUM]; -+ #endif -+ u8 bss_nums[MAX_CHANNEL_NUM]; -+ u8 interference_time[MAX_CHANNEL_NUM]; -+ u8 cur_ch_clm_ratio; -+ u8 cur_ch_nhm_ratio; -+ u8 best_chan_5g; -+ u8 best_chan_24g; -+ -+ #if (RTK_ACS_VERSION == 3) -+ u8 trig_rst; -+ struct env_trig_rpt trig_rpt; -+ #endif -+ -+ #ifdef CONFIG_RTW_ACS_DBG -+ RT_SCAN_TYPE scan_type; -+ u16 scan_time; -+ u8 igi; -+ u8 bw; -+ #endif -+}; -+ -+#define rtw_acs_get_best_chan_24g(adapter) (GET_HAL_DATA(adapter)->acs.best_chan_24g) -+#define rtw_acs_get_best_chan_5g(adapter) (GET_HAL_DATA(adapter)->acs.best_chan_5g) -+ -+#ifdef CONFIG_RTW_ACS_DBG -+#define rtw_is_acs_passiv_scan(adapter) (((GET_HAL_DATA(adapter)->acs.scan_type) == SCAN_PASSIVE) ? _TRUE : _FALSE) -+ -+#define rtw_acs_get_adv_st(adapter) (GET_HAL_DATA(adapter)->acs.scan_time) -+#define rtw_is_acs_st_valid(adapter) ((GET_HAL_DATA(adapter)->acs.scan_time) ? _TRUE : _FALSE) -+ -+#define rtw_acs_get_adv_igi(adapter) (GET_HAL_DATA(adapter)->acs.igi) -+u8 rtw_is_acs_igi_valid(_adapter *adapter); -+ -+#define rtw_acs_get_adv_bw(adapter) (GET_HAL_DATA(adapter)->acs.bw) -+ -+void rtw_acs_adv_setting(_adapter *adapter, RT_SCAN_TYPE scan_type, u16 scan_time, u8 igi, u8 bw); -+void rtw_acs_adv_reset(_adapter *adapter); -+#endif -+ -+u8 rtw_acs_get_clm_ratio_by_ch_num(_adapter *adapter, u8 chan); -+u8 rtw_acs_get_clm_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx); -+u8 rtw_acs_get_nhm_ratio_by_ch_num(_adapter *adapter, u8 chan); -+u8 rtw_acs_get_nhm_noise_pwr_by_ch_idx(_adapter *adapter, u8 ch_idx); -+u8 rtw_acs_get_num_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx); -+ -+u8 rtw_phydm_clm_ratio(_adapter *adapter); -+u8 rtw_phydm_nhm_ratio(_adapter *adapter); -+u8 rtw_phydm_nhm_noise_pwr(_adapter *adapter); -+ -+void rtw_acs_reset(_adapter *adapter); -+void rtw_acs_trigger(_adapter *adapter, u16 scan_time_ms, u8 scan_chan, enum NHM_PID pid); -+void rtw_acs_get_rst(_adapter *adapter); -+void rtw_acs_select_best_chan(_adapter *adapter); -+void rtw_acs_info_dump(void *sel, _adapter *adapter); -+void rtw_acs_update_current_info(_adapter *adapter); -+void rtw_acs_chan_info_dump(void *sel, _adapter *adapter); -+void rtw_acs_current_info_dump(void *sel, _adapter *adapter); -+ -+void rtw_acs_start(_adapter *adapter); -+void rtw_acs_stop(_adapter *adapter); -+ -+#endif /*CONFIG_RTW_ACS*/ -+ -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+#define RTK_NOISE_MONITOR_VERSION 3 -+#define GET_NM_STATE(padapter) (ATOMIC_READ(&GET_HAL_DATA(padapter)->nm.state)) -+#define SET_NM_STATE(padapter, set_state) (ATOMIC_SET(&GET_HAL_DATA(padapter)->nm.state, set_state)) -+#define IS_NM_ENABLE(padapter) ((GET_NM_STATE(padapter) == NM_ENABLE) ? _TRUE : _FALSE) -+ -+enum NM_STATE { -+ NM_DISABLE, -+ NM_ENABLE, -+}; -+ -+struct noise_monitor { -+ ATOMIC_T state; -+ s16 noise[MAX_CHANNEL_NUM]; -+ u8 bss_nums[MAX_CHANNEL_NUM]; -+}; -+void rtw_nm_enable(_adapter *adapter); -+void rtw_nm_disable(_adapter *adapter); -+void rtw_noise_measure(_adapter *adapter, u8 chan, u8 is_pause_dig, u8 igi_value, u32 max_time); -+s16 rtw_noise_query_by_chan_num(_adapter *adapter, u8 chan); -+s16 rtw_noise_query_by_chan_idx(_adapter *adapter, u8 ch_idx); -+s16 rtw_noise_measure_curchan(_adapter *padapter); -+void rtw_noise_info_dump(void *sel, _adapter *adapter); -+#endif -+#endif /* __HAL_DM_ACS_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/hal_halmac.c b/drivers/staging/rtl8723cs/hal/hal_halmac.c -new file mode 100644 -index 000000000000..aa1bbf90d9e9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_halmac.c -@@ -0,0 +1,5927 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _HAL_HALMAC_C_ -+ -+#include /* PADAPTER, struct dvobj_priv, SDIO_ERR_VAL8 and etc. */ -+#include /* efuse, PHAL_DATA_TYPE and etc. */ -+#include "hal_halmac.h" /* dvobj_to_halmac() and ect. */ -+ -+/* -+ * HALMAC take return value 0 for fail and 1 for success to replace -+ * _FALSE/_TRUE after V1_04_09 -+ */ -+#define RTW_HALMAC_FAIL 0 -+#define RTW_HALMAC_SUCCESS 1 -+ -+#define DEFAULT_INDICATOR_TIMELMT 1000 /* ms */ -+#define MSG_PREFIX "[HALMAC]" -+ -+#define RTW_HALMAC_DLFW_MEM_NO_STOP_TX -+#define RTW_HALMAC_FILTER_DRV_C2H /* Block C2H owner=driver */ -+ -+/* -+ * Driver API for HALMAC operations -+ */ -+ -+#ifdef CONFIG_SDIO_HCI -+#include -+ -+static u8 _halmac_mac_reg_page0_chk(const char *func, struct dvobj_priv *dvobj, u32 offset) -+{ -+#if defined(CONFIG_IO_CHECK_IN_ANA_LOW_CLK) && defined(CONFIG_LPS_LCLK) -+ struct pwrctrl_priv *pwrpriv = &dvobj->pwrctl_priv; -+ u32 mac_reg_offset = 0; -+ -+ if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) -+ return _TRUE; -+ -+ if (pwrpriv->lps_level == LPS_NORMAL) -+ return _TRUE; -+ -+ if (pwrpriv->rpwm >= PS_STATE_S2) -+ return _TRUE; -+ -+ if (offset & (WLAN_IOREG_DEVICE_ID << 13)) { /*WLAN_IOREG_OFFSET*/ -+ mac_reg_offset = offset & HALMAC_WLAN_MAC_REG_MSK; -+ if (mac_reg_offset < 0x100) { -+ RTW_ERR(FUNC_ADPT_FMT -+ "access MAC REG -0x%04x in PS-mode:0x%02x (rpwm:0x%02x, lps_level:0x%02x)\n", -+ FUNC_ADPT_ARG(dvobj_get_primary_adapter(dvobj)), mac_reg_offset, -+ pwrpriv->pwr_mode, pwrpriv->rpwm, pwrpriv->lps_level); -+ rtw_warn_on(1); -+ return _FALSE; -+ } -+ } -+#endif -+ return _TRUE; -+} -+ -+static u8 _halmac_sdio_cmd52_read(void *p, u32 offset) -+{ -+ struct dvobj_priv *d; -+ u8 val; -+ u8 ret; -+ -+ -+ d = (struct dvobj_priv *)p; -+ _halmac_mac_reg_page0_chk(__func__, d, offset); -+ ret = rtw_sdio_read_cmd52(d, offset, &val, 1); -+ if (_FAIL == ret) { -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+ return SDIO_ERR_VAL8; -+ } -+ -+ return val; -+} -+ -+static void _halmac_sdio_cmd52_write(void *p, u32 offset, u8 val) -+{ -+ struct dvobj_priv *d; -+ u8 ret; -+ -+ -+ d = (struct dvobj_priv *)p; -+ _halmac_mac_reg_page0_chk(__func__, d, offset); -+ ret = rtw_sdio_write_cmd52(d, offset, &val, 1); -+ if (_FAIL == ret) -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+} -+ -+static u8 _halmac_sdio_reg_read_8(void *p, u32 offset) -+{ -+ struct dvobj_priv *d; -+ u8 *pbuf; -+ u8 val; -+ u8 ret; -+ -+ -+ d = (struct dvobj_priv *)p; -+ val = SDIO_ERR_VAL8; -+ _halmac_mac_reg_page0_chk(__func__, d, offset); -+ pbuf = rtw_zmalloc(1); -+ if (!pbuf) -+ return val; -+ -+ ret = rtw_sdio_read_cmd53(d, offset, pbuf, 1); -+ if (ret == _FAIL) { -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ val = *pbuf; -+ -+exit: -+ rtw_mfree(pbuf, 1); -+ -+ return val; -+} -+ -+static u16 _halmac_sdio_reg_read_16(void *p, u32 offset) -+{ -+ struct dvobj_priv *d; -+ u8 *pbuf; -+ u16 val; -+ u8 ret; -+ -+ -+ d = (struct dvobj_priv *)p; -+ val = SDIO_ERR_VAL16; -+ _halmac_mac_reg_page0_chk(__func__, d, offset); -+ pbuf = rtw_zmalloc(2); -+ if (!pbuf) -+ return val; -+ -+ ret = rtw_sdio_read_cmd53(d, offset, pbuf, 2); -+ if (ret == _FAIL) { -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ val = le16_to_cpu(*(u16 *)pbuf); -+ -+exit: -+ rtw_mfree(pbuf, 2); -+ -+ return val; -+} -+ -+static u32 _halmac_sdio_reg_read_32(void *p, u32 offset) -+{ -+ struct dvobj_priv *d; -+ u8 *pbuf; -+ u32 val; -+ u8 ret; -+ -+ -+ d = (struct dvobj_priv *)p; -+ val = SDIO_ERR_VAL32; -+ _halmac_mac_reg_page0_chk(__func__, d, offset); -+ pbuf = rtw_zmalloc(4); -+ if (!pbuf) -+ return val; -+ -+ ret = rtw_sdio_read_cmd53(d, offset, pbuf, 4); -+ if (ret == _FAIL) { -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ val = le32_to_cpu(*(u32 *)pbuf); -+ -+exit: -+ rtw_mfree(pbuf, 4); -+ -+ return val; -+} -+ -+static u8 _halmac_sdio_reg_read_n(void *p, u32 offset, u32 size, u8 *data) -+{ -+ struct dvobj_priv *d = (struct dvobj_priv *)p; -+ u8 *pbuf; -+ u8 ret; -+ u8 rst = RTW_HALMAC_FAIL; -+ u32 sdio_read_size; -+ -+ -+ if (!data) -+ return rst; -+ -+ sdio_read_size = RND4(size); -+ sdio_read_size = rtw_sdio_cmd53_align_size(d, sdio_read_size); -+ -+ pbuf = rtw_zmalloc(sdio_read_size); -+ if (!pbuf) -+ return rst; -+ -+ ret = rtw_sdio_read_cmd53(d, offset, pbuf, sdio_read_size); -+ if (ret == _FAIL) { -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ _rtw_memcpy(data, pbuf, size); -+ rst = RTW_HALMAC_SUCCESS; -+exit: -+ rtw_mfree(pbuf, sdio_read_size); -+ -+ return rst; -+} -+ -+static void _halmac_sdio_reg_write_8(void *p, u32 offset, u8 val) -+{ -+ struct dvobj_priv *d; -+ u8 *pbuf; -+ u8 ret; -+ -+ -+ d = (struct dvobj_priv *)p; -+ _halmac_mac_reg_page0_chk(__func__, d, offset); -+ pbuf = rtw_zmalloc(1); -+ if (!pbuf) -+ return; -+ _rtw_memcpy(pbuf, &val, 1); -+ -+ ret = rtw_sdio_write_cmd53(d, offset, pbuf, 1); -+ if (ret == _FAIL) -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+ -+ rtw_mfree(pbuf, 1); -+} -+ -+static void _halmac_sdio_reg_write_16(void *p, u32 offset, u16 val) -+{ -+ struct dvobj_priv *d; -+ u8 *pbuf; -+ u8 ret; -+ -+ -+ d = (struct dvobj_priv *)p; -+ _halmac_mac_reg_page0_chk(__func__, d, offset); -+ val = cpu_to_le16(val); -+ pbuf = rtw_zmalloc(2); -+ if (!pbuf) -+ return; -+ _rtw_memcpy(pbuf, &val, 2); -+ -+ ret = rtw_sdio_write_cmd53(d, offset, pbuf, 2); -+ if (ret == _FAIL) -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+ -+ rtw_mfree(pbuf, 2); -+} -+ -+static void _halmac_sdio_reg_write_32(void *p, u32 offset, u32 val) -+{ -+ struct dvobj_priv *d; -+ u8 *pbuf; -+ u8 ret; -+ -+ -+ d = (struct dvobj_priv *)p; -+ _halmac_mac_reg_page0_chk(__func__, d, offset); -+ val = cpu_to_le32(val); -+ pbuf = rtw_zmalloc(4); -+ if (!pbuf) -+ return; -+ _rtw_memcpy(pbuf, &val, 4); -+ -+ ret = rtw_sdio_write_cmd53(d, offset, pbuf, 4); -+ if (ret == _FAIL) -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+ -+ rtw_mfree(pbuf, 4); -+} -+ -+static u8 _halmac_sdio_read_cia(void *p, u32 offset) -+{ -+ struct dvobj_priv *d; -+ u8 data = 0; -+ u8 ret; -+ -+ -+ d = (struct dvobj_priv *)p; -+ -+ ret = rtw_sdio_f0_read(d, offset, &data, 1); -+ if (ret == _FAIL) -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+ -+ return data; -+} -+ -+#else /* !CONFIG_SDIO_HCI */ -+ -+static u8 _halmac_reg_read_8(void *p, u32 offset) -+{ -+ struct dvobj_priv *d; -+ PADAPTER adapter; -+ -+ -+ d = (struct dvobj_priv *)p; -+ adapter = dvobj_get_primary_adapter(d); -+ -+ return _rtw_read8(adapter, offset); -+} -+ -+static u16 _halmac_reg_read_16(void *p, u32 offset) -+{ -+ struct dvobj_priv *d; -+ PADAPTER adapter; -+ -+ -+ d = (struct dvobj_priv *)p; -+ adapter = dvobj_get_primary_adapter(d); -+ -+ return _rtw_read16(adapter, offset); -+} -+ -+static u32 _halmac_reg_read_32(void *p, u32 offset) -+{ -+ struct dvobj_priv *d; -+ PADAPTER adapter; -+ -+ -+ d = (struct dvobj_priv *)p; -+ adapter = dvobj_get_primary_adapter(d); -+ -+ return _rtw_read32(adapter, offset); -+} -+ -+static void _halmac_reg_write_8(void *p, u32 offset, u8 val) -+{ -+ struct dvobj_priv *d; -+ PADAPTER adapter; -+ int err; -+ -+ -+ d = (struct dvobj_priv *)p; -+ adapter = dvobj_get_primary_adapter(d); -+ -+ err = _rtw_write8(adapter, offset, val); -+ if (err == _FAIL) -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+} -+ -+static void _halmac_reg_write_16(void *p, u32 offset, u16 val) -+{ -+ struct dvobj_priv *d; -+ PADAPTER adapter; -+ int err; -+ -+ -+ d = (struct dvobj_priv *)p; -+ adapter = dvobj_get_primary_adapter(d); -+ -+ err = _rtw_write16(adapter, offset, val); -+ if (err == _FAIL) -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+} -+ -+static void _halmac_reg_write_32(void *p, u32 offset, u32 val) -+{ -+ struct dvobj_priv *d; -+ PADAPTER adapter; -+ int err; -+ -+ -+ d = (struct dvobj_priv *)p; -+ adapter = dvobj_get_primary_adapter(d); -+ -+ err = _rtw_write32(adapter, offset, val); -+ if (err == _FAIL) -+ RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__); -+} -+#endif /* !CONFIG_SDIO_HCI */ -+ -+#ifdef DBG_IO -+static void _halmac_reg_read_monitor(void *p, u32 addr, u32 len, u32 val -+ , const char *caller, const u32 line) -+{ -+ struct dvobj_priv *d = (struct dvobj_priv *)p; -+ _adapter *adapter = dvobj_get_primary_adapter(d); -+ -+ dbg_rtw_reg_read_monitor(adapter, addr, len, val, caller, line); -+} -+ -+static void _halmac_reg_write_monitor(void *p, u32 addr, u32 len, u32 val -+ , const char *caller, const u32 line) -+{ -+ struct dvobj_priv *d = (struct dvobj_priv *)p; -+ _adapter *adapter = dvobj_get_primary_adapter(d); -+ -+ dbg_rtw_reg_write_monitor(adapter, addr, len, val, caller, line); -+} -+#endif -+ -+static u8 _halmac_mfree(void *p, void *buffer, u32 size) -+{ -+ rtw_mfree(buffer, size); -+ return RTW_HALMAC_SUCCESS; -+} -+ -+static void *_halmac_malloc(void *p, u32 size) -+{ -+ return rtw_zmalloc(size); -+} -+ -+static u8 _halmac_memcpy(void *p, void *dest, void *src, u32 size) -+{ -+ _rtw_memcpy(dest, src, size); -+ return RTW_HALMAC_SUCCESS; -+} -+ -+static u8 _halmac_memset(void *p, void *addr, u8 value, u32 size) -+{ -+ _rtw_memset(addr, value, size); -+ return RTW_HALMAC_SUCCESS; -+} -+ -+static void _halmac_udelay(void *p, u32 us) -+{ -+ /* Most hardware polling wait time < 50us) */ -+ if (us <= 50) -+ rtw_udelay_os(us); -+ else if (us <= 1000) -+ rtw_usleep_os(us); -+ else -+ rtw_msleep_os(RTW_DIV_ROUND_UP(us, 1000)); -+} -+ -+static u8 _halmac_mutex_init(void *p, HALMAC_MUTEX *pMutex) -+{ -+ _rtw_mutex_init(pMutex); -+ return RTW_HALMAC_SUCCESS; -+} -+ -+static u8 _halmac_mutex_deinit(void *p, HALMAC_MUTEX *pMutex) -+{ -+ _rtw_mutex_free(pMutex); -+ return RTW_HALMAC_SUCCESS; -+} -+ -+static u8 _halmac_mutex_lock(void *p, HALMAC_MUTEX *pMutex) -+{ -+ int err; -+ -+ err = _enter_critical_mutex(pMutex, NULL); -+ if (err) -+ return RTW_HALMAC_FAIL; -+ -+ return RTW_HALMAC_SUCCESS; -+} -+ -+static u8 _halmac_mutex_unlock(void *p, HALMAC_MUTEX *pMutex) -+{ -+ _exit_critical_mutex(pMutex, NULL); -+ return RTW_HALMAC_SUCCESS; -+} -+ -+#ifndef CONFIG_SDIO_HCI -+#define DBG_MSG_FILTER -+#endif -+ -+#ifdef DBG_MSG_FILTER -+static u8 is_msg_allowed(uint drv_lv, u8 msg_lv) -+{ -+ switch (drv_lv) { -+ case _DRV_NONE_: -+ return _FALSE; -+ -+ case _DRV_ALWAYS_: -+ if (msg_lv > HALMAC_DBG_ALWAYS) -+ return _FALSE; -+ break; -+ case _DRV_ERR_: -+ if (msg_lv > HALMAC_DBG_ERR) -+ return _FALSE; -+ break; -+ case _DRV_WARNING_: -+ if (msg_lv > HALMAC_DBG_WARN) -+ return _FALSE; -+ break; -+ case _DRV_INFO_: -+ if (msg_lv >= HALMAC_DBG_TRACE) -+ return _FALSE; -+ break; -+ } -+ -+ return _TRUE; -+} -+#endif /* DBG_MSG_FILTER */ -+ -+static u8 _halmac_msg_print(void *p, u32 msg_type, u8 msg_level, s8 *fmt, ...) -+{ -+#define MSG_LEN 100 -+ va_list args; -+ u8 str[MSG_LEN] = {0}; -+#ifdef DBG_MSG_FILTER -+ uint drv_level = _DRV_NONE_; -+#endif -+ int err; -+ u8 ret = RTW_HALMAC_SUCCESS; -+ -+ -+#ifdef DBG_MSG_FILTER -+#ifdef CONFIG_RTW_DEBUG -+ drv_level = rtw_drv_log_level; -+#endif -+ if (is_msg_allowed(drv_level, msg_level) == _FALSE) -+ return ret; -+#endif -+ -+ str[0] = '\n'; -+ va_start(args, fmt); -+ err = vsnprintf(str, MSG_LEN, fmt, args); -+ va_end(args); -+ -+ /* An output error is encountered */ -+ if (err < 0) -+ return RTW_HALMAC_FAIL; -+ /* Output may be truncated due to size limit */ -+ if ((err == (MSG_LEN - 1)) && (str[MSG_LEN - 2] != '\n')) -+ ret = RTW_HALMAC_FAIL; -+ -+ if (msg_level == HALMAC_DBG_ALWAYS) -+ RTW_PRINT(MSG_PREFIX "%s", str); -+ else if (msg_level <= HALMAC_DBG_ERR) -+ RTW_ERR(MSG_PREFIX "%s", str); -+ else if (msg_level <= HALMAC_DBG_WARN) -+ RTW_WARN(MSG_PREFIX "%s", str); -+ else -+ RTW_DBG(MSG_PREFIX "%s", str); -+ -+ return ret; -+} -+ -+static u8 _halmac_buff_print(void *p, u32 msg_type, u8 msg_level, s8 *buf, u32 size) -+{ -+ if (msg_level <= HALMAC_DBG_WARN) -+ RTW_INFO_DUMP(MSG_PREFIX, buf, size); -+ else -+ RTW_DBG_DUMP(MSG_PREFIX, buf, size); -+ -+ return RTW_HALMAC_SUCCESS; -+} -+ -+ -+const char *const RTW_HALMAC_FEATURE_NAME[] = { -+ "HALMAC_FEATURE_CFG_PARA", -+ "HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE", -+ "HALMAC_FEATURE_DUMP_LOGICAL_EFUSE", -+ "HALMAC_FEATURE_DUMP_LOGICAL_EFUSE_MASK", -+ "HALMAC_FEATURE_UPDATE_PACKET", -+ "HALMAC_FEATURE_SEND_SCAN_PACKET", -+ "HALMAC_FEATURE_DROP_SCAN_PACKET", -+ "HALMAC_FEATURE_UPDATE_DATAPACK", -+ "HALMAC_FEATURE_RUN_DATAPACK", -+ "HALMAC_FEATURE_CHANNEL_SWITCH", -+ "HALMAC_FEATURE_IQK", -+ "HALMAC_FEATURE_POWER_TRACKING", -+ "HALMAC_FEATURE_PSD", -+ "HALMAC_FEATURE_FW_SNDING", -+ "HALMAC_FEATURE_DPK", -+ "HALMAC_FEATURE_ALL" -+}; -+ -+static inline u8 is_valid_id_status(enum halmac_feature_id id, enum halmac_cmd_process_status status) -+{ -+ switch (id) { -+ case HALMAC_FEATURE_CFG_PARA: -+ RTW_DBG("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ break; -+ case HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ if (HALMAC_CMD_PROCESS_DONE != status) -+ RTW_INFO("%s: id(%d) unspecified status(%d)!\n", -+ __FUNCTION__, id, status); -+ break; -+ case HALMAC_FEATURE_DUMP_LOGICAL_EFUSE: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ if (HALMAC_CMD_PROCESS_DONE != status) -+ RTW_INFO("%s: id(%d) unspecified status(%d)!\n", -+ __FUNCTION__, id, status); -+ break; -+ case HALMAC_FEATURE_UPDATE_PACKET: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ if (status != HALMAC_CMD_PROCESS_DONE) -+ RTW_INFO("%s: id(%d) unspecified status(%d)!\n", -+ __FUNCTION__, id, status); -+ break; -+ case HALMAC_FEATURE_UPDATE_DATAPACK: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ break; -+ case HALMAC_FEATURE_RUN_DATAPACK: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ break; -+ case HALMAC_FEATURE_CHANNEL_SWITCH: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ if ((status != HALMAC_CMD_PROCESS_DONE) && (status != HALMAC_CMD_PROCESS_RCVD)) -+ RTW_INFO("%s: id(%d) unspecified status(%d)!\n", -+ __FUNCTION__, id, status); -+ if (status == HALMAC_CMD_PROCESS_DONE) -+ return _FALSE; -+ break; -+ case HALMAC_FEATURE_IQK: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ break; -+ case HALMAC_FEATURE_POWER_TRACKING: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ break; -+ case HALMAC_FEATURE_PSD: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ break; -+ case HALMAC_FEATURE_FW_SNDING: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ break; -+ case HALMAC_FEATURE_DPK: -+ if (status == HALMAC_CMD_PROCESS_RCVD) -+ return _FALSE; -+ if ((status != HALMAC_CMD_PROCESS_DONE) -+ || (status != HALMAC_CMD_PROCESS_ERROR)) -+ RTW_WARN("%s: %s unexpected status(0x%x)!\n", -+ __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id], -+ status); -+ break; -+ case HALMAC_FEATURE_ALL: -+ RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]); -+ break; -+ default: -+ RTW_ERR("%s: unknown feature id(%d)\n", __FUNCTION__, id); -+ return _FALSE; -+ } -+ -+ return _TRUE; -+} -+ -+static int init_halmac_event_with_waittime(struct dvobj_priv *d, enum halmac_feature_id id, u8 *buf, u32 size, u32 time) -+{ -+ struct submit_ctx *sctx; -+ -+ -+ if (!d->hmpriv.indicator[id].sctx) { -+ sctx = (struct submit_ctx *)rtw_zmalloc(sizeof(*sctx)); -+ if (!sctx) -+ return -1; -+ } else { -+ RTW_WARN("%s: id(%d) sctx is not NULL!!\n", __FUNCTION__, id); -+ sctx = d->hmpriv.indicator[id].sctx; -+ d->hmpriv.indicator[id].sctx = NULL; -+ } -+ -+ rtw_sctx_init(sctx, time); -+ d->hmpriv.indicator[id].buffer = buf; -+ d->hmpriv.indicator[id].buf_size = size; -+ d->hmpriv.indicator[id].ret_size = 0; -+ d->hmpriv.indicator[id].status = 0; -+ /* fill sctx at least to sure other variables are all ready! */ -+ d->hmpriv.indicator[id].sctx = sctx; -+ -+ return 0; -+} -+ -+static inline int init_halmac_event(struct dvobj_priv *d, enum halmac_feature_id id, u8 *buf, u32 size) -+{ -+ return init_halmac_event_with_waittime(d, id, buf, size, DEFAULT_INDICATOR_TIMELMT); -+} -+ -+static void free_halmac_event(struct dvobj_priv *d, enum halmac_feature_id id) -+{ -+ struct submit_ctx *sctx; -+ -+ -+ if (!d->hmpriv.indicator[id].sctx) -+ return; -+ -+ sctx = d->hmpriv.indicator[id].sctx; -+ d->hmpriv.indicator[id].sctx = NULL; -+ rtw_mfree((u8 *)sctx, sizeof(*sctx)); -+} -+ -+static int wait_halmac_event(struct dvobj_priv *d, enum halmac_feature_id id) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ struct submit_ctx *sctx; -+ int status; -+ int ret; -+ -+ -+ sctx = d->hmpriv.indicator[id].sctx; -+ if (!sctx) -+ return -1; -+ -+ ret = rtw_sctx_wait(sctx, RTW_HALMAC_FEATURE_NAME[id]); -+ status = sctx->status; -+ free_halmac_event(d, id); -+ if (_SUCCESS == ret) -+ return 0; -+ -+ /* If no one change sctx->status, it is timeout case */ -+ if (status == 0) -+ status = RTW_SCTX_DONE_TIMEOUT; -+ RTW_ERR("%s: id(%d, %s) status=0x%x ! Reset HALMAC state!\n", -+ __FUNCTION__, id, RTW_HALMAC_FEATURE_NAME[id], status); -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ api->halmac_reset_feature(mac, id); -+ -+ return -1; -+} -+ -+/* -+ * Return: -+ * Always return RTW_HALMAC_SUCCESS, HALMAC don't care the return value. -+ */ -+static u8 _halmac_event_indication(void *p, enum halmac_feature_id feature_id, -+ enum halmac_cmd_process_status process_status, -+ u8 *buf, u32 size) -+{ -+ struct dvobj_priv *d; -+ PADAPTER adapter; -+ PHAL_DATA_TYPE hal; -+ struct halmac_indicator *tbl, *indicator; -+ struct submit_ctx *sctx; -+ u32 cpsz; -+ u8 ret; -+ -+ -+ d = (struct dvobj_priv *)p; -+ adapter = dvobj_get_primary_adapter(d); -+ hal = GET_HAL_DATA(adapter); -+ tbl = d->hmpriv.indicator; -+ -+ /* Filter(Skip) middle status indication */ -+ ret = is_valid_id_status(feature_id, process_status); -+ if (_FALSE == ret) -+ goto exit; -+ -+ indicator = &tbl[feature_id]; -+ indicator->status = process_status; -+ indicator->ret_size = size; -+ if (!indicator->sctx) { -+ RTW_WARN("%s: id(%d, %s) is not waiting!!\n", __FUNCTION__, -+ feature_id, RTW_HALMAC_FEATURE_NAME[feature_id]); -+ goto exit; -+ } -+ sctx = indicator->sctx; -+ -+ if (HALMAC_CMD_PROCESS_ERROR == process_status) { -+ RTW_ERR("%s: id(%d, %s) Something wrong!!\n", __FUNCTION__, -+ feature_id, RTW_HALMAC_FEATURE_NAME[feature_id]); -+ if ((size == 1) && buf) -+ RTW_ERR("%s: error code=0x%x\n", __FUNCTION__, *buf); -+ rtw_sctx_done_err(&sctx, RTW_SCTX_DONE_UNKNOWN); -+ goto exit; -+ } -+ -+ if (size > indicator->buf_size) { -+ RTW_WARN("%s: id(%d, %s) buffer is not enough(%d<%d), " -+ "and data will be truncated!\n", -+ __FUNCTION__, -+ feature_id, RTW_HALMAC_FEATURE_NAME[feature_id], -+ indicator->buf_size, size); -+ cpsz = indicator->buf_size; -+ } else { -+ cpsz = size; -+ } -+ if (cpsz && indicator->buffer) -+ _rtw_memcpy(indicator->buffer, buf, cpsz); -+ -+ rtw_sctx_done(&sctx); -+ -+exit: -+ return RTW_HALMAC_SUCCESS; -+} -+ -+struct halmac_platform_api rtw_halmac_platform_api = { -+ /* R/W register */ -+#ifdef CONFIG_SDIO_HCI -+ .SDIO_CMD52_READ = _halmac_sdio_cmd52_read, -+ .SDIO_CMD53_READ_8 = _halmac_sdio_reg_read_8, -+ .SDIO_CMD53_READ_16 = _halmac_sdio_reg_read_16, -+ .SDIO_CMD53_READ_32 = _halmac_sdio_reg_read_32, -+ .SDIO_CMD53_READ_N = _halmac_sdio_reg_read_n, -+ .SDIO_CMD52_WRITE = _halmac_sdio_cmd52_write, -+ .SDIO_CMD53_WRITE_8 = _halmac_sdio_reg_write_8, -+ .SDIO_CMD53_WRITE_16 = _halmac_sdio_reg_write_16, -+ .SDIO_CMD53_WRITE_32 = _halmac_sdio_reg_write_32, -+ .SDIO_CMD52_CIA_READ = _halmac_sdio_read_cia, -+#endif /* CONFIG_SDIO_HCI */ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) -+ .REG_READ_8 = _halmac_reg_read_8, -+ .REG_READ_16 = _halmac_reg_read_16, -+ .REG_READ_32 = _halmac_reg_read_32, -+ .REG_WRITE_8 = _halmac_reg_write_8, -+ .REG_WRITE_16 = _halmac_reg_write_16, -+ .REG_WRITE_32 = _halmac_reg_write_32, -+#endif /* CONFIG_USB_HCI || CONFIG_PCI_HCI */ -+ -+#ifdef DBG_IO -+ .READ_MONITOR = _halmac_reg_read_monitor, -+ .WRITE_MONITOR = _halmac_reg_write_monitor, -+#endif -+ -+ /* Write data */ -+#if 0 -+ /* impletement in HAL-IC level */ -+ .SEND_RSVD_PAGE = sdio_write_data_rsvd_page, -+ .SEND_H2C_PKT = sdio_write_data_h2c, -+#endif -+ /* Memory allocate */ -+ .RTL_FREE = _halmac_mfree, -+ .RTL_MALLOC = _halmac_malloc, -+ .RTL_MEMCPY = _halmac_memcpy, -+ .RTL_MEMSET = _halmac_memset, -+ -+ /* Sleep */ -+ .RTL_DELAY_US = _halmac_udelay, -+ -+ /* Process Synchronization */ -+ .MUTEX_INIT = _halmac_mutex_init, -+ .MUTEX_DEINIT = _halmac_mutex_deinit, -+ .MUTEX_LOCK = _halmac_mutex_lock, -+ .MUTEX_UNLOCK = _halmac_mutex_unlock, -+ -+ .MSG_PRINT = _halmac_msg_print, -+ .BUFF_PRINT = _halmac_buff_print, -+ .EVENT_INDICATION = _halmac_event_indication, -+}; -+ -+u8 rtw_halmac_read8(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ -+ -+ /* WARNING: pintf_dev should not be null! */ -+ mac = dvobj_to_halmac(pintfhdl->pintf_dev); -+ api = HALMAC_GET_API(mac); -+ -+ return api->halmac_reg_read_8(mac, addr); -+} -+ -+u16 rtw_halmac_read16(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ -+ -+ /* WARNING: pintf_dev should not be null! */ -+ mac = dvobj_to_halmac(pintfhdl->pintf_dev); -+ api = HALMAC_GET_API(mac); -+ -+ return api->halmac_reg_read_16(mac, addr); -+} -+ -+u32 rtw_halmac_read32(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ -+ -+ /* WARNING: pintf_dev should not be null! */ -+ mac = dvobj_to_halmac(pintfhdl->pintf_dev); -+ api = HALMAC_GET_API(mac); -+ -+ return api->halmac_reg_read_32(mac, addr); -+} -+ -+static void _read_register(struct dvobj_priv *d, u32 addr, u32 cnt, u8 *buf) -+{ -+#if 1 -+ struct _ADAPTER *a; -+ u32 i, n; -+ u16 val16; -+ u32 val32; -+ -+ -+ a = dvobj_get_primary_adapter(d); -+ -+ i = addr & 0x3; -+ /* Handle address not start from 4 bytes alignment case */ -+ if (i) { -+ val32 = cpu_to_le32(rtw_read32(a, addr & ~0x3)); -+ n = 4 - i; -+ _rtw_memcpy(buf, ((u8 *)&val32) + i, n); -+ i = n; -+ cnt -= n; -+ } -+ -+ while (cnt) { -+ if (cnt >= 4) -+ n = 4; -+ else if (cnt >= 2) -+ n = 2; -+ else -+ n = 1; -+ cnt -= n; -+ -+ switch (n) { -+ case 1: -+ buf[i] = rtw_read8(a, addr+i); -+ i++; -+ break; -+ case 2: -+ val16 = cpu_to_le16(rtw_read16(a, addr+i)); -+ _rtw_memcpy(&buf[i], &val16, 2); -+ i += 2; -+ break; -+ case 4: -+ val32 = cpu_to_le32(rtw_read32(a, addr+i)); -+ _rtw_memcpy(&buf[i], &val32, 4); -+ i += 4; -+ break; -+ } -+ } -+#else -+ struct _ADAPTER *a; -+ u32 i; -+ -+ -+ a = dvobj_get_primary_adapter(d); -+ for (i = 0; i < cnt; i++) -+ buf[i] = rtw_read8(a, addr + i); -+#endif -+} -+ -+#ifdef CONFIG_SDIO_HCI -+static int _sdio_read_local(struct dvobj_priv *d, u32 addr, u32 cnt, u8 *buf) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ if (buf == NULL) -+ return -1; -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_reg_sdio_cmd53_read_n(mac, addr, cnt, buf); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: addr=0x%08x cnt=%d err=%d\n", -+ __FUNCTION__, addr, cnt, status); -+ return -1; -+ } -+ -+ return 0; -+} -+#endif /* CONFIG_SDIO_HCI */ -+ -+void rtw_halmac_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem) -+{ -+ struct dvobj_priv *d; -+ -+ -+ if (pmem == NULL) { -+ RTW_ERR("pmem is NULL\n"); -+ return; -+ } -+ -+ d = pintfhdl->pintf_dev; -+ -+#ifdef CONFIG_SDIO_HCI -+ if (addr & 0xFFFF0000) { -+ int err = 0; -+ -+ err = _sdio_read_local(d, addr, cnt, pmem); -+ if (!err) -+ return; -+ } -+#endif /* CONFIG_SDIO_HCI */ -+ -+ _read_register(d, addr, cnt, pmem); -+} -+ -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+u8 rtw_halmac_iread8(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ -+ /* WARNING: pintf_dev should not be null! */ -+ mac = dvobj_to_halmac(pintfhdl->pintf_dev); -+ api = HALMAC_GET_API(mac); -+ -+ /*return api->halmac_reg_read_indirect_8(mac, addr);*/ -+ return api->halmac_reg_read_8(mac, addr); -+} -+ -+u16 rtw_halmac_iread16(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ u16 val16 = 0; -+ -+ /* WARNING: pintf_dev should not be null! */ -+ mac = dvobj_to_halmac(pintfhdl->pintf_dev); -+ api = HALMAC_GET_API(mac); -+ -+ /*return api->halmac_reg_read_indirect_16(mac, addr);*/ -+ return api->halmac_reg_read_16(mac, addr); -+} -+ -+u32 rtw_halmac_iread32(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ -+ -+ /* WARNING: pintf_dev should not be null! */ -+ mac = dvobj_to_halmac(pintfhdl->pintf_dev); -+ api = HALMAC_GET_API(mac); -+ -+ return api->halmac_reg_read_indirect_32(mac, addr); -+} -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+ -+int rtw_halmac_write8(struct intf_hdl *pintfhdl, u32 addr, u8 value) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ /* WARNING: pintf_dev should not be null! */ -+ mac = dvobj_to_halmac(pintfhdl->pintf_dev); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_reg_write_8(mac, addr, value); -+ -+ if (status == HALMAC_RET_SUCCESS) -+ return 0; -+ -+ return -1; -+} -+ -+int rtw_halmac_write16(struct intf_hdl *pintfhdl, u32 addr, u16 value) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ /* WARNING: pintf_dev should not be null! */ -+ mac = dvobj_to_halmac(pintfhdl->pintf_dev); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_reg_write_16(mac, addr, value); -+ -+ if (status == HALMAC_RET_SUCCESS) -+ return 0; -+ -+ return -1; -+} -+ -+int rtw_halmac_write32(struct intf_hdl *pintfhdl, u32 addr, u32 value) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ /* WARNING: pintf_dev should not be null! */ -+ mac = dvobj_to_halmac(pintfhdl->pintf_dev); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_reg_write_32(mac, addr, value); -+ -+ if (status == HALMAC_RET_SUCCESS) -+ return 0; -+ -+ return -1; -+} -+ -+static int init_write_rsvd_page_size(struct dvobj_priv *d) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ u32 size = 0; -+ struct halmac_ofld_func_info ofld_info; -+ enum halmac_ret_status status; -+ int err = 0; -+ -+ -+#ifdef CONFIG_USB_HCI -+ /* for USB do not exceed MAX_CMDBUF_SZ */ -+ size = 0x1000; -+#elif defined(CONFIG_PCI_HCI) -+ size = MAX_CMDBUF_SZ - TXDESC_OFFSET; -+#elif defined(CONFIG_SDIO_HCI) -+ size = 0x7000; /* 28KB */ -+#else -+ /* Use HALMAC default setting and don't call any function */ -+ return 0; -+#endif -+#if 0 /* Fail to pass coverity DEADCODE check */ -+ /* If size==0, use HALMAC default setting and don't call any function */ -+ if (!size) -+ return 0; -+#endif -+ err = rtw_halmac_set_max_dl_fw_size(d, size); -+ if (err) { -+ RTW_ERR("%s: Fail to set max download fw size!\n", __FUNCTION__); -+ return -1; -+ } -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ _rtw_memset(&ofld_info, 0, sizeof(ofld_info)); -+ ofld_info.halmac_malloc_max_sz = 0xFFFFFFFF; -+ ofld_info.rsvd_pg_drv_buf_max_sz = size; -+ status = api->halmac_ofld_func_cfg(mac, &ofld_info); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: Fail to config offload parameters!\n", __FUNCTION__); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+static int init_priv(struct halmacpriv *priv) -+{ -+ struct halmac_indicator *indicator; -+ u32 count, size; -+ -+ -+ if (priv->indicator) -+ RTW_WARN("%s: HALMAC private data is not CLEAR!\n", __FUNCTION__); -+ count = HALMAC_FEATURE_ALL + 1; -+ size = sizeof(*indicator) * count; -+ indicator = (struct halmac_indicator *)rtw_zmalloc(size); -+ if (!indicator) -+ return -1; -+ priv->indicator = indicator; -+ -+ return 0; -+} -+ -+static void deinit_priv(struct halmacpriv *priv) -+{ -+ struct halmac_indicator *indicator; -+ -+ -+ indicator = priv->indicator; -+ priv->indicator = NULL; -+ if (indicator) { -+ u32 count, size; -+ -+ count = HALMAC_FEATURE_ALL + 1; -+#ifdef CONFIG_RTW_DEBUG -+ { -+ struct submit_ctx *sctx; -+ u32 i; -+ -+ for (i = 0; i < count; i++) { -+ if (!indicator[i].sctx) -+ continue; -+ -+ RTW_WARN("%s: %s id(%d) sctx still exist!!\n", -+ __FUNCTION__, RTW_HALMAC_FEATURE_NAME[i], i); -+ sctx = indicator[i].sctx; -+ indicator[i].sctx = NULL; -+ rtw_mfree((u8 *)sctx, sizeof(*sctx)); -+ } -+ } -+#endif /* !CONFIG_RTW_DEBUG */ -+ size = sizeof(*indicator) * count; -+ rtw_mfree((u8 *)indicator, size); -+ } -+} -+ -+#ifdef CONFIG_SDIO_HCI -+static enum halmac_sdio_spec_ver _sdio_ver_drv2halmac(struct dvobj_priv *d) -+{ -+ bool v3; -+ enum halmac_sdio_spec_ver ver; -+ -+ -+ v3 = rtw_is_sdio30(dvobj_get_primary_adapter(d)); -+ if (v3) -+ ver = HALMAC_SDIO_SPEC_VER_3_00; -+ else -+ ver = HALMAC_SDIO_SPEC_VER_2_00; -+ -+ return ver; -+} -+#endif /* CONFIG_SDIO_HCI */ -+ -+void rtw_halmac_get_version(char *str, u32 len) -+{ -+ enum halmac_ret_status status; -+ struct halmac_ver ver; -+ -+ -+ status = halmac_get_version(&ver); -+ if (status != HALMAC_RET_SUCCESS) -+ return; -+ -+ rtw_sprintf(str, len, "V%d_%02d_%02d", -+ ver.major_ver, ver.prototype_ver, ver.minor_ver); -+} -+ -+int rtw_halmac_init_adapter(struct dvobj_priv *d, struct halmac_platform_api *pf_api) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_interface intf; -+ enum halmac_intf_phy_platform pltfm = HALMAC_INTF_PHY_PLATFORM_ALL; -+ enum halmac_ret_status status; -+ int err = 0; -+#ifdef CONFIG_SDIO_HCI -+ struct halmac_sdio_hw_info info; -+#endif /* CONFIG_SDIO_HCI */ -+ -+ -+ halmac = dvobj_to_halmac(d); -+ if (halmac) { -+ RTW_WARN("%s: initialize already completed!\n", __FUNCTION__); -+ goto error; -+ } -+ -+ err = init_priv(&d->hmpriv); -+ if (err) -+ goto error; -+ -+#ifdef CONFIG_SDIO_HCI -+ intf = HALMAC_INTERFACE_SDIO; -+#elif defined(CONFIG_USB_HCI) -+ intf = HALMAC_INTERFACE_USB; -+#elif defined(CONFIG_PCI_HCI) -+ intf = HALMAC_INTERFACE_PCIE; -+#else -+#warning "INTERFACE(CONFIG_XXX_HCI) not be defined!!" -+ intf = HALMAC_INTERFACE_UNDEFINE; -+#endif -+ status = halmac_init_adapter(d, pf_api, intf, &halmac, &api); -+ if (HALMAC_RET_SUCCESS != status) { -+ RTW_ERR("%s: halmac_init_adapter fail!(status=%d)\n", __FUNCTION__, status); -+ err = -1; -+ if (halmac) -+ goto deinit; -+ goto free; -+ } -+ -+ dvobj_set_halmac(d, halmac); -+ -+ status = api->halmac_interface_integration_tuning(halmac); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: halmac_interface_integration_tuning fail!(status=%d)\n", __FUNCTION__, status); -+ err = -1; -+ goto deinit; -+ } -+ -+#ifdef CONFIG_PLATFORM_RTK1319 -+ pltfm = HALMAC_INTF_PHY_PLATFORM_DHC; -+#endif /* CONFIG_PLATFORM_RTK1319 */ -+ status = api->halmac_phy_cfg(halmac, pltfm); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: halmac_phy_cfg fail! (platform=%d, status=%d)\n", -+ __FUNCTION__, pltfm, status); -+ err = -1; -+ goto deinit; -+ } -+ -+ init_write_rsvd_page_size(d); -+ -+#ifdef CONFIG_SDIO_HCI -+ _rtw_memset(&info, 0, sizeof(info)); -+ info.spec_ver = _sdio_ver_drv2halmac(d); -+ /* Convert clock speed unit to MHz from Hz */ -+ info.clock_speed = RTW_DIV_ROUND_UP(rtw_sdio_get_clock(d), 1000000); -+ info.block_size = rtw_sdio_get_block_size(d); -+ if (d->hmpriv.sdio_io_indir == 2) -+ info.io_indir_flag = 0; -+ else -+ info.io_indir_flag = 1; /* Default enable indirect I/O */ -+ RTW_DBG("%s: SDIO ver=%u clock=%uMHz blk_size=%u bytes, io_indir=%u\n", -+ __FUNCTION__, info.spec_ver+2, info.clock_speed, -+ info.block_size, info.io_indir_flag); -+ status = api->halmac_sdio_hw_info(halmac, &info); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: halmac_sdio_hw_info fail!(status=%d)\n", -+ __FUNCTION__, status); -+ err = -1; -+ goto deinit; -+ } -+#endif /* CONFIG_SDIO_HCI */ -+ -+ return 0; -+ -+deinit: -+ status = halmac_deinit_adapter(halmac); -+ dvobj_set_halmac(d, NULL); -+ if (status != HALMAC_RET_SUCCESS) -+ RTW_ERR("%s: halmac_deinit_adapter fail!(status=%d)\n", -+ __FUNCTION__, status); -+ -+free: -+ deinit_priv(&d->hmpriv); -+ -+error: -+ return err; -+} -+ -+int rtw_halmac_deinit_adapter(struct dvobj_priv *d) -+{ -+ struct halmac_adapter *halmac; -+ enum halmac_ret_status status; -+ int err = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ if (halmac) { -+ status = halmac_deinit_adapter(halmac); -+ dvobj_set_halmac(d, NULL); -+ if (status != HALMAC_RET_SUCCESS) -+ err = -1; -+ } -+ -+ deinit_priv(&d->hmpriv); -+ -+ return err; -+} -+ -+static inline enum halmac_portid _hw_port_drv2halmac(enum _hw_port hwport) -+{ -+ enum halmac_portid port = HALMAC_PORTID_NUM; -+ -+ -+ switch (hwport) { -+ case HW_PORT0: -+ port = HALMAC_PORTID0; -+ break; -+ case HW_PORT1: -+ port = HALMAC_PORTID1; -+ break; -+ case HW_PORT2: -+ port = HALMAC_PORTID2; -+ break; -+ case HW_PORT3: -+ port = HALMAC_PORTID3; -+ break; -+ case HW_PORT4: -+ port = HALMAC_PORTID4; -+ break; -+ default: -+ break; -+ } -+ -+ return port; -+} -+ -+static enum halmac_network_type_select _network_type_drv2halmac(u8 type) -+{ -+ enum halmac_network_type_select network = HALMAC_NETWORK_UNDEFINE; -+ -+ -+ switch (type) { -+ case _HW_STATE_NOLINK_: -+ case _HW_STATE_MONITOR_: -+ network = HALMAC_NETWORK_NO_LINK; -+ break; -+ -+ case _HW_STATE_ADHOC_: -+ network = HALMAC_NETWORK_ADHOC; -+ break; -+ -+ case _HW_STATE_STATION_: -+ network = HALMAC_NETWORK_INFRASTRUCTURE; -+ break; -+ -+ case _HW_STATE_AP_: -+ network = HALMAC_NETWORK_AP; -+ break; -+ } -+ -+ return network; -+} -+ -+static u8 _network_type_halmac2drv(enum halmac_network_type_select network) -+{ -+ u8 type = _HW_STATE_NOLINK_; -+ -+ -+ switch (network) { -+ case HALMAC_NETWORK_NO_LINK: -+ case HALMAC_NETWORK_UNDEFINE: -+ type = _HW_STATE_NOLINK_; -+ break; -+ -+ case HALMAC_NETWORK_ADHOC: -+ type = _HW_STATE_ADHOC_; -+ break; -+ -+ case HALMAC_NETWORK_INFRASTRUCTURE: -+ type = _HW_STATE_STATION_; -+ break; -+ -+ case HALMAC_NETWORK_AP: -+ type = _HW_STATE_AP_; -+ break; -+ } -+ -+ return type; -+} -+ -+static void _beacon_ctrl_halmac2drv(struct halmac_bcn_ctrl *ctrl, -+ struct rtw_halmac_bcn_ctrl *drv_ctrl) -+{ -+ drv_ctrl->rx_bssid_fit = ctrl->dis_rx_bssid_fit ? 0 : 1; -+ drv_ctrl->txbcn_rpt = ctrl->en_txbcn_rpt ? 1 : 0; -+ drv_ctrl->tsf_update = ctrl->dis_tsf_udt ? 0 : 1; -+ drv_ctrl->enable_bcn = ctrl->en_bcn ? 1 : 0; -+ drv_ctrl->rxbcn_rpt = ctrl->en_rxbcn_rpt ? 1 : 0; -+ drv_ctrl->p2p_ctwin = ctrl->en_p2p_ctwin ? 1 : 0; -+ drv_ctrl->p2p_bcn_area = ctrl->en_p2p_bcn_area ? 1 : 0; -+} -+ -+static void _beacon_ctrl_drv2halmac(struct rtw_halmac_bcn_ctrl *drv_ctrl, -+ struct halmac_bcn_ctrl *ctrl) -+{ -+ ctrl->dis_rx_bssid_fit = drv_ctrl->rx_bssid_fit ? 0 : 1; -+ ctrl->en_txbcn_rpt = drv_ctrl->txbcn_rpt ? 1 : 0; -+ ctrl->dis_tsf_udt = drv_ctrl->tsf_update ? 0 : 1; -+ ctrl->en_bcn = drv_ctrl->enable_bcn ? 1 : 0; -+ ctrl->en_rxbcn_rpt = drv_ctrl->rxbcn_rpt ? 1 : 0; -+ ctrl->en_p2p_ctwin = drv_ctrl->p2p_ctwin ? 1 : 0; -+ ctrl->en_p2p_bcn_area = drv_ctrl->p2p_bcn_area ? 1 : 0; -+} -+ -+int rtw_halmac_get_hw_value(struct dvobj_priv *d, enum halmac_hw_id hw_id, void *pvalue) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_get_hw_value(mac, hw_id, pvalue); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_tx_fifo_size() - TX FIFO size -+ * @d: struct dvobj_priv* -+ * @size: TX FIFO size, unit is byte. -+ * -+ * Get TX FIFO size(byte) from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_tx_fifo_size(struct dvobj_priv *d, u32 *size) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_TXFIFO_SIZE, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *size = val; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_rx_fifo_size() - RX FIFO size -+ * @d: struct dvobj_priv* -+ * @size: RX FIFO size, unit is byte -+ * -+ * Get RX FIFO size(byte) from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_rx_fifo_size(struct dvobj_priv *d, u32 *size) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_RXFIFO_SIZE, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *size = val; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_rsvd_drv_pg_bndy() - Reserve page boundary of driver -+ * @d: struct dvobj_priv* -+ * @size: Page size, unit is byte -+ * -+ * Get reserve page boundary of driver from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *d, u16 *bndy) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u16 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_RSVD_PG_BNDY, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *bndy = val; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_page_size() - Page size -+ * @d: struct dvobj_priv* -+ * @size: Page size, unit is byte -+ * -+ * Get TX/RX page size(byte) from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_page_size(struct dvobj_priv *d, u32 *size) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_PAGE_SIZE, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *size = val; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_tx_agg_align_size() - TX aggregation align size -+ * @d: struct dvobj_priv* -+ * @size: TX aggregation align size, unit is byte -+ * -+ * Get TX aggregation align size(byte) from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_tx_agg_align_size(struct dvobj_priv *d, u16 *size) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u16 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_TX_AGG_ALIGN_SIZE, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *size = val; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_rx_agg_align_size() - RX aggregation align size -+ * @d: struct dvobj_priv* -+ * @size: RX aggregation align size, unit is byte -+ * -+ * Get RX aggregation align size(byte) from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_rx_agg_align_size(struct dvobj_priv *d, u8 *size) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u8 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_RX_AGG_ALIGN_SIZE, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *size = val; -+ -+ return 0; -+} -+ -+/* -+ * Description: -+ * Get RX driver info size. RX driver info is a small memory space between -+ * scriptor and RX payload. -+ * -+ * +-------------------------+ -+ * | RX descriptor | -+ * | usually 24 bytes | -+ * +-------------------------+ -+ * | RX driver info | -+ * | depends on driver cfg | -+ * +-------------------------+ -+ * | RX paylad | -+ * | | -+ * +-------------------------+ -+ * -+ * Parameter: -+ * d pointer to struct dvobj_priv of driver -+ * sz rx driver info size in bytes. -+ * -+ * Return: -+ * 0 Success -+ * other Fail -+ */ -+int rtw_halmac_get_rx_drv_info_sz(struct dvobj_priv *d, u8 *sz) -+{ -+ enum halmac_ret_status status; -+ struct halmac_adapter *halmac = dvobj_to_halmac(d); -+ struct halmac_api *api = HALMAC_GET_API(halmac); -+ u8 dw = 0; -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_DRV_INFO_SIZE, &dw); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *sz = dw * 8; -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_tx_desc_size() - TX descriptor size -+ * @d: struct dvobj_priv* -+ * @size: TX descriptor size, unit is byte. -+ * -+ * Get TX descriptor size(byte) from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_tx_desc_size(struct dvobj_priv *d, u32 *size) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_TX_DESC_SIZE, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *size = val; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_rx_desc_size() - RX descriptor size -+ * @d: struct dvobj_priv* -+ * @size: RX descriptor size, unit is byte. -+ * -+ * Get RX descriptor size(byte) from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_rx_desc_size(struct dvobj_priv *d, u32 *size) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_RX_DESC_SIZE, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *size = val; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_tx_dma_ch_map() - Get TX DMA channel Map for tx desc -+ * @d: struct dvobj_priv* -+ * @dma_ch_map: return map of QSEL to DMA channel -+ * @map_size: size of dma_ch_map -+ * Suggest size to be last valid QSEL(QSLT_CMD)+1 or full QSLT -+ * size(0x20) -+ * -+ * 8814B would need this to get mapping of QSEL to DMA channel for TX desc. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_tx_dma_ch_map(struct dvobj_priv *d, u8 *dma_ch_map, u8 map_size) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ struct halmac_rqpn_ch_map map; -+ enum halmac_dma_ch channel = HALMAC_DMA_CH_UNDEFINE; -+ u8 qsel; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_RQPN_CH_MAPPING, &map); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ for (qsel = 0; qsel < map_size; qsel++) { -+ switch (qsel) { -+ /*case QSLT_VO:*/ -+ case 0x06: -+ case 0x07: -+ channel = map.dma_map_vo; -+ break; -+ /*case QSLT_VI:*/ -+ case 0x04: -+ case 0x05: -+ channel = map.dma_map_vi; -+ break; -+ /*case QSLT_BE:*/ -+ case 0x00: -+ case 0x03: -+ channel = map.dma_map_be; -+ break; -+ /*case QSLT_BK:*/ -+ case 0x01: -+ case 0x02: -+ channel = map.dma_map_bk; -+ break; -+ /*case QSLT_BEACON:*/ -+ case 0x10: -+ channel = HALMAC_DMA_CH_BCN; -+ break; -+ /*case QSLT_HIGH:*/ -+ case 0x11: -+ channel = map.dma_map_hi; -+ break; -+ /*case QSLT_MGNT:*/ -+ case 0x12: -+ channel = map.dma_map_mg; -+ break; -+ /*case QSLT_CMD:*/ -+ case 0x13: -+ channel = HALMAC_DMA_CH_H2C; -+ break; -+ default: -+ /*RTW_ERR("%s: invalid qsel=0x%x\n", __FUNCTION__, qsel);*/ -+ channel = HALMAC_DMA_CH_UNDEFINE; -+ break; -+ } -+ dma_ch_map[qsel] = (u8)channel; -+ } -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_fw_max_size() - Firmware MAX size -+ * @d: struct dvobj_priv* -+ * @size: MAX Firmware size, unit is byte. -+ * -+ * Get Firmware MAX size(byte) from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+static int rtw_halmac_get_fw_max_size(struct dvobj_priv *d, u32 *size) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_FW_MAX_SIZE, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *size = val; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_ori_h2c_size() - Original H2C MAX size -+ * @d: struct dvobj_priv* -+ * @size: H2C MAX size, unit is byte. -+ * -+ * Get original H2C MAX size(byte) from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_ori_h2c_size(struct dvobj_priv *d, u32 *size) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_ORI_H2C_SIZE, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *size = val; -+ -+ return 0; -+} -+ -+int rtw_halmac_get_oqt_size(struct dvobj_priv *d, u8 *size) -+{ -+ enum halmac_ret_status status; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ u8 val; -+ -+ -+ if (!size) -+ return -1; -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_AC_OQT_SIZE, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *size = val; -+ return 0; -+} -+ -+int rtw_halmac_get_ac_queue_number(struct dvobj_priv *d, u8 *num) -+{ -+ enum halmac_ret_status status; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ u8 val; -+ -+ -+ if (!num) -+ return -1; -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_AC_QUEUE_NUM, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *num = val; -+ return 0; -+} -+ -+/** -+ * rtw_halmac_get_mac_address() - Get MAC address of specific port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * @addr: buffer for storing MAC address -+ * -+ * Get MAC address of specific port from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ union halmac_wlan_addr hwa; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ if (!addr) -+ goto out; -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ port = _hw_port_drv2halmac(hwport); -+ _rtw_memset(&hwa, 0, sizeof(hwa)); -+ -+ status = api->halmac_get_mac_addr(halmac, port, &hwa); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ _rtw_memcpy(addr, hwa.addr, 6); -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/** -+ * rtw_halmac_get_network_type() - Get network type of specific port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * @type: buffer to put network type (_HW_STATE_*) -+ * -+ * Get network type of specific port from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 *type) -+{ -+#if 0 -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ enum halmac_network_type_select network; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ port = _hw_port_drv2halmac(hwport); -+ network = HALMAC_NETWORK_UNDEFINE; -+ -+ status = api->halmac_get_net_type(halmac, port, &network); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ *type = _network_type_halmac2drv(network); -+ -+ err = 0; -+out: -+ return err; -+#else -+ struct _ADAPTER *a; -+ enum halmac_portid port; -+ enum halmac_network_type_select network; -+ u32 val; -+ int err = -1; -+ -+ -+ a = dvobj_get_primary_adapter(d); -+ port = _hw_port_drv2halmac(hwport); -+ network = HALMAC_NETWORK_UNDEFINE; -+ -+ switch (port) { -+ case HALMAC_PORTID0: -+ val = rtw_read32(a, REG_CR); -+ network = BIT_GET_NETYPE0(val); -+ break; -+ -+ case HALMAC_PORTID1: -+ val = rtw_read32(a, REG_CR); -+ network = BIT_GET_NETYPE1(val); -+ break; -+ -+ case HALMAC_PORTID2: -+ val = rtw_read32(a, REG_CR_EXT); -+ network = BIT_GET_NETYPE2(val); -+ break; -+ -+ case HALMAC_PORTID3: -+ val = rtw_read32(a, REG_CR_EXT); -+ network = BIT_GET_NETYPE3(val); -+ break; -+ -+ case HALMAC_PORTID4: -+ val = rtw_read32(a, REG_CR_EXT); -+ network = BIT_GET_NETYPE4(val); -+ break; -+ -+ default: -+ goto out; -+ } -+ -+ *type = _network_type_halmac2drv(network); -+ -+ err = 0; -+out: -+ return err; -+#endif -+} -+ -+/** -+ * rtw_halmac_get_bcn_ctrl() - Get beacon control setting of specific port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * @bcn_ctrl: setting of beacon control -+ * -+ * Get beacon control setting of specific port from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_get_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, -+ struct rtw_halmac_bcn_ctrl *bcn_ctrl) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ struct halmac_bcn_ctrl ctrl; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ port = _hw_port_drv2halmac(hwport); -+ _rtw_memset(&ctrl, 0, sizeof(ctrl)); -+ -+ status = api->halmac_rw_bcn_ctrl(halmac, port, 0, &ctrl); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ _beacon_ctrl_halmac2drv(&ctrl, bcn_ctrl); -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/* -+ * Note: -+ * When this function return, the register REG_RCR may be changed. -+ */ -+int rtw_halmac_config_rx_info(struct dvobj_priv *d, enum halmac_drv_info info) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_cfg_drv_info(halmac, info); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err = 0; -+out: -+ /* Sync driver RCR cache with register setting */ -+ rtw_hal_get_hwreg(dvobj_get_primary_adapter(d), HW_VAR_RCR, NULL); -+ -+ return err; -+} -+ -+/** -+ * rtw_halmac_set_max_dl_fw_size() - Set the MAX download firmware size -+ * @d: struct dvobj_priv* -+ * @size: the max download firmware size in one I/O -+ * -+ * Set the max download firmware size in one I/O. -+ * Please also consider the max size of the callback function "SEND_RSVD_PAGE" -+ * could accept, because download firmware would call "SEND_RSVD_PAGE" to send -+ * firmware to IC. -+ * -+ * If the value of "size" is not even, it would be rounded down to nearest -+ * even, and 0 and 1 are both invalid value. -+ * -+ * Return 0 for setting OK, otherwise fail. -+ */ -+int rtw_halmac_set_max_dl_fw_size(struct dvobj_priv *d, u32 size) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ if (!size || (size == 1)) -+ return -1; -+ -+ mac = dvobj_to_halmac(d); -+ if (!mac) { -+ RTW_ERR("%s: HALMAC is not ready!!\n", __FUNCTION__); -+ return -1; -+ } -+ api = HALMAC_GET_API(mac); -+ -+ size &= ~1; /* round down to even */ -+ status = api->halmac_cfg_max_dl_size(mac, size); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_WARN("%s: Fail to cfg_max_dl_size(%d), err=%d!!\n", -+ __FUNCTION__, size, status); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_set_mac_address() - Set mac address of specific port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * @addr: mac address -+ * -+ * Set self mac address of specific port to HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_set_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ union halmac_wlan_addr hwa; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ port = _hw_port_drv2halmac(hwport); -+ _rtw_memset(&hwa, 0, sizeof(hwa)); -+ _rtw_memcpy(hwa.addr, addr, 6); -+ -+ status = api->halmac_cfg_mac_addr(halmac, port, &hwa); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/** -+ * rtw_halmac_set_bssid() - Set BSSID of specific port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * @addr: BSSID, mac address of AP -+ * -+ * Set BSSID of specific port to HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_set_bssid(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ union halmac_wlan_addr hwa; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ port = _hw_port_drv2halmac(hwport); -+ -+ _rtw_memset(&hwa, 0, sizeof(hwa)); -+ _rtw_memcpy(hwa.addr, addr, 6); -+ status = api->halmac_cfg_bssid(halmac, port, &hwa); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/** -+ * rtw_halmac_set_tx_address() - Set transmitter address of specific port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * @addr: transmitter address -+ * -+ * Set transmitter address of specific port to HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_set_tx_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ union halmac_wlan_addr hwa; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ port = _hw_port_drv2halmac(hwport); -+ _rtw_memset(&hwa, 0, sizeof(hwa)); -+ _rtw_memcpy(hwa.addr, addr, 6); -+ -+ status = api->halmac_cfg_transmitter_addr(halmac, port, &hwa); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/** -+ * rtw_halmac_set_network_type() - Set network type of specific port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * @type: network type (_HW_STATE_*) -+ * -+ * Set network type of specific port to HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_set_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 type) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ enum halmac_network_type_select network; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ port = _hw_port_drv2halmac(hwport); -+ network = _network_type_drv2halmac(type); -+ -+ status = api->halmac_cfg_net_type(halmac, port, network); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/** -+ * rtw_halmac_reset_tsf() - Reset TSF timer of specific port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * -+ * Notice HALMAC to reset timing synchronization function(TSF) timer of -+ * specific port. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_reset_tsf(struct dvobj_priv *d, enum _hw_port hwport) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ port = _hw_port_drv2halmac(hwport); -+ -+ status = api->halmac_cfg_tsf_rst(halmac, port); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/** -+ * rtw_halmac_set_bcn_interval() - Set beacon interval of each port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * @space: beacon interval, unit is ms -+ * -+ * Set beacon interval of specific port to HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_set_bcn_interval(struct dvobj_priv *d, enum _hw_port hwport, -+ u32 interval) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ port = _hw_port_drv2halmac(hwport); -+ -+ status = api->halmac_cfg_bcn_space(halmac, port, interval); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/** -+ * rtw_halmac_set_bcn_ctrl() - Set beacon control setting of each port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * @bcn_ctrl: setting of beacon control -+ * -+ * Set beacon control setting of specific port to HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_set_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, -+ struct rtw_halmac_bcn_ctrl *bcn_ctrl) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ struct halmac_bcn_ctrl ctrl; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ port = _hw_port_drv2halmac(hwport); -+ _rtw_memset(&ctrl, 0, sizeof(ctrl)); -+ _beacon_ctrl_drv2halmac(bcn_ctrl, &ctrl); -+ -+ status = api->halmac_rw_bcn_ctrl(halmac, port, 1, &ctrl); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/** -+ * rtw_halmac_set_aid() - Set association identifier(AID) of specific port -+ * @d: struct dvobj_priv* -+ * @hwport: port -+ * @aid: Association identifier -+ * -+ * Set association identifier(AID) of specific port to HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_set_aid(struct dvobj_priv *d, enum _hw_port hwport, u16 aid) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_portid port; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ port = _hw_port_drv2halmac(hwport); -+ -+#if 0 -+ status = api->halmac_cfg_aid(halmac, port, aid); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+#else -+{ -+ struct _ADAPTER *a; -+ u32 addr; -+ u16 val; -+ -+ a = dvobj_get_primary_adapter(d); -+ -+ switch (port) { -+ case 0: -+ addr = REG_BCN_PSR_RPT; -+ val = rtw_read16(a, addr); -+ val = BIT_SET_PS_AID_0(val, aid); -+ rtw_write16(a, addr, val); -+ break; -+ -+ case 1: -+ addr = REG_BCN_PSR_RPT1; -+ val = rtw_read16(a, addr); -+ val = BIT_SET_PS_AID_1(val, aid); -+ rtw_write16(a, addr, val); -+ break; -+ -+ case 2: -+ addr = REG_BCN_PSR_RPT2; -+ val = rtw_read16(a, addr); -+ val = BIT_SET_PS_AID_2(val, aid); -+ rtw_write16(a, addr, val); -+ break; -+ -+ case 3: -+ addr = REG_BCN_PSR_RPT3; -+ val = rtw_read16(a, addr); -+ val = BIT_SET_PS_AID_3(val, aid); -+ rtw_write16(a, addr, val); -+ break; -+ -+ case 4: -+ addr = REG_BCN_PSR_RPT4; -+ val = rtw_read16(a, addr); -+ val = BIT_SET_PS_AID_4(val, aid); -+ rtw_write16(a, addr, val); -+ break; -+ -+ default: -+ goto out; -+ } -+} -+#endif -+ -+ err = 0; -+out: -+ return err; -+} -+ -+int rtw_halmac_set_bandwidth(struct dvobj_priv *d, u8 channel, u8 pri_ch_idx, u8 bw) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_cfg_ch_bw(mac, channel, pri_ch_idx, bw); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_set_edca() - config edca parameter -+ * @d: struct dvobj_priv* -+ * @queue: XMIT_[VO/VI/BE/BK]_QUEUE -+ * @aifs: Arbitration inter-frame space(AIFS) -+ * @cw: Contention window(CW) -+ * @txop: MAX Transmit Opportunity(TXOP) -+ * -+ * Return: 0 if process OK, otherwise -1. -+ */ -+int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_acq_id ac; -+ struct halmac_edca_para edca; -+ enum halmac_ret_status status; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ switch (queue) { -+ case XMIT_VO_QUEUE: -+ ac = HALMAC_ACQ_ID_VO; -+ break; -+ case XMIT_VI_QUEUE: -+ ac = HALMAC_ACQ_ID_VI; -+ break; -+ case XMIT_BE_QUEUE: -+ ac = HALMAC_ACQ_ID_BE; -+ break; -+ case XMIT_BK_QUEUE: -+ ac = HALMAC_ACQ_ID_BK; -+ break; -+ default: -+ return -1; -+ } -+ -+ edca.aifs = aifs; -+ edca.cw = cw; -+ edca.txop_limit = txop; -+ -+ status = api->halmac_cfg_edca_para(mac, ac, &edca); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_set_rts_full_bw() - Send RTS to all covered channels -+ * @d: struct dvobj_priv* -+ * @enable: _TRUE(enable), _FALSE(disable) -+ * -+ * Hradware will duplicate RTS packet to all channels which are covered in used -+ * bandwidth. -+ * -+ * Return 0 if process OK, otherwise -1. -+ */ -+int rtw_halmac_set_rts_full_bw(struct dvobj_priv *d, u8 enable) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u8 full; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ full = (enable == _TRUE) ? 1 : 0; -+ -+ status = api->halmac_set_hw_value(mac, HALMAC_HW_RTS_FULL_BW, &full); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ -+ return 0; -+} -+ -+#ifdef RTW_HALMAC_DBG_POWER_SWITCH -+static void _dump_mac_reg(struct dvobj_priv *d, u32 start, u32 end) -+{ -+ struct _ADAPTER *adapter; -+ int i, j = 1; -+ -+ -+ adapter = dvobj_get_primary_adapter(d); -+ for (i = start; i < end; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT("0x%04x", i); -+ _RTW_PRINT(" 0x%08x ", rtw_read32(adapter, i)); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT("\n"); -+ } -+} -+ -+void dump_dbg_val(struct _ADAPTER *a, u32 reg) -+{ -+ u32 v32; -+ -+ -+ rtw_write8(a, 0x3A, reg); -+ v32 = rtw_read32(a, 0xC0); -+ RTW_PRINT("0x3A = %02x, 0xC0 = 0x%08x\n",reg, v32); -+} -+ -+#ifdef CONFIG_PCI_HCI -+static void _dump_pcie_cfg_space(struct dvobj_priv *d) -+{ -+ struct _ADAPTER *padapter = dvobj_get_primary_adapter(d); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct pci_dev *pdev = pdvobjpriv->ppcidev; -+ struct pci_dev *bridge_pdev = pdev->bus->self; -+ -+ u32 tmp[4] = { 0 }; -+ u32 i, j; -+ -+ RTW_PRINT("\n***** PCI Device Configuration Space *****\n\n"); -+ -+ for(i = 0; i < 0x100; i += 0x10) -+ { -+ for (j = 0 ; j < 4 ; j++) -+ pci_read_config_dword(pdev, i + j * 4, tmp+j); -+ -+ RTW_PRINT("%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", -+ i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF, -+ tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF, -+ tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF, -+ tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF); -+ } -+ -+ RTW_PRINT("\n***** PCI Host Device Configuration Space*****\n\n"); -+ -+ for(i = 0; i < 0x100; i += 0x10) -+ { -+ for (j = 0 ; j < 4 ; j++) -+ pci_read_config_dword(bridge_pdev, i + j * 4, tmp+j); -+ -+ RTW_PRINT("%03x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", -+ i, tmp[0] & 0xFF, (tmp[0] >> 8) & 0xFF, (tmp[0] >> 16) & 0xFF, (tmp[0] >> 24) & 0xFF, -+ tmp[1] & 0xFF, (tmp[1] >> 8) & 0xFF, (tmp[1] >> 16) & 0xFF, (tmp[1] >> 24) & 0xFF, -+ tmp[2] & 0xFF, (tmp[2] >> 8) & 0xFF, (tmp[2] >> 16) & 0xFF, (tmp[2] >> 24) & 0xFF, -+ tmp[3] & 0xFF, (tmp[3] >> 8) & 0xFF, (tmp[3] >> 16) & 0xFF, (tmp[3] >> 24) & 0xFF); -+ } -+} -+#endif -+ -+static void _dump_mac_reg_for_power_switch(struct dvobj_priv *d, -+ const char* caller, char* desc) -+{ -+ struct _ADAPTER *a; -+ u8 v8; -+ -+ -+ RTW_PRINT("%s: %s\n", caller, desc); -+ RTW_PRINT("======= MAC REG =======\n"); -+ /* page 0/1 */ -+ _dump_mac_reg(d, 0x0, 0x200); -+ _dump_mac_reg(d, 0x300, 0x400); /* also dump page 3 */ -+ -+ /* dump debug register */ -+ a = dvobj_get_primary_adapter(d); -+ -+#ifdef CONFIG_PCI_HCI -+ _dump_pcie_cfg_space(d); -+ -+ v8 = rtw_read8(a, 0xF6) | 0x01; -+ rtw_write8(a, 0xF6, v8); -+ RTW_PRINT("0xF6 = %02x\n", v8); -+ -+ dump_dbg_val(a, 0x63); -+ dump_dbg_val(a, 0x64); -+ dump_dbg_val(a, 0x68); -+ dump_dbg_val(a, 0x69); -+ dump_dbg_val(a, 0x6a); -+ dump_dbg_val(a, 0x6b); -+ dump_dbg_val(a, 0x71); -+ dump_dbg_val(a, 0x72); -+#endif -+} -+ -+static enum halmac_ret_status _power_switch(struct halmac_adapter *halmac, -+ struct halmac_api *api, -+ enum halmac_mac_power pwr) -+{ -+ enum halmac_ret_status status; -+ char desc[80] = {0}; -+ -+ -+ rtw_sprintf(desc, 80, "before calling power %s", -+ (pwr==HALMAC_MAC_POWER_ON)?"on":"off"); -+ _dump_mac_reg_for_power_switch((struct dvobj_priv *)halmac->drv_adapter, -+ __FUNCTION__, desc); -+ -+ status = api->halmac_mac_power_switch(halmac, pwr); -+ RTW_PRINT("%s: status=%d\n", __FUNCTION__, status); -+ -+ rtw_sprintf(desc, 80, "after calling power %s", -+ (pwr==HALMAC_MAC_POWER_ON)?"on":"off"); -+ _dump_mac_reg_for_power_switch((struct dvobj_priv *)halmac->drv_adapter, -+ __FUNCTION__, desc); -+ -+ return status; -+} -+#else /* !RTW_HALMAC_DBG_POWER_SWITCH */ -+#define _power_switch(mac, api, pwr) (api)->halmac_mac_power_switch(mac, pwr) -+#endif /* !RTW_HALMAC_DBG_POWER_SWITCH */ -+ -+/* -+ * Description: -+ * Power on device hardware. -+ * [Notice!] If device's power state is on before, -+ * it would be power off first and turn on power again. -+ * -+ * Return: -+ * 0 power on success -+ * -1 power on fail -+ * -2 power state unchange -+ */ -+int rtw_halmac_poweron(struct dvobj_priv *d) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ int err = -1; -+#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B) -+ struct _ADAPTER *a; -+ u8 v8; -+ u32 addr; -+ -+ a = dvobj_get_primary_adapter(d); -+#endif -+ -+ halmac = dvobj_to_halmac(d); -+ if (!halmac) -+ goto out; -+ -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_pre_init_system_cfg(halmac); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+#ifdef CONFIG_SDIO_HCI -+ status = api->halmac_sdio_cmd53_4byte(halmac, HALMAC_SDIO_CMD53_4BYTE_MODE_RW); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+#endif /* CONFIG_SDIO_HCI */ -+ -+#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B) -+ addr = 0x3F3; -+ v8 = rtw_read8(a, addr); -+ RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8); -+ /* are we in pcie debug mode? */ -+ if (!(v8 & BIT(2))) { -+ RTW_PRINT("%s: Enable pcie debug mode\n", __FUNCTION__); -+ v8 |= BIT(2); -+ v8 = rtw_write8(a, addr, v8); -+ } -+#endif -+ -+ status = _power_switch(halmac, api, HALMAC_MAC_POWER_ON); -+ if (HALMAC_RET_PWR_UNCHANGE == status) { -+ -+#if defined(CONFIG_PCI_HCI) && defined(CONFIG_RTL8822B) -+ addr = 0x3F3; -+ v8 = rtw_read8(a, addr); -+ RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8); -+ -+ /* are we in pcie debug mode? */ -+ if (!(v8 & BIT(2))) { -+ RTW_PRINT("%s: Enable pcie debug mode\n", __FUNCTION__); -+ v8 |= BIT(2); -+ v8 = rtw_write8(a, addr, v8); -+ } else if (v8 & BIT(0)) { -+ /* DMA stuck */ -+ addr = 0x1350; -+ v8 = rtw_read8(a, addr); -+ RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8); -+ RTW_PRINT("%s: recover DMA stuck\n", __FUNCTION__); -+ v8 |= BIT(6); -+ v8 = rtw_write8(a, addr, v8); -+ RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8); -+ } -+#endif -+ /* -+ * Work around for warm reboot but device not power off, -+ * but it would also fall into this case when auto power on is enabled. -+ */ -+ _power_switch(halmac, api, HALMAC_MAC_POWER_OFF); -+ status = _power_switch(halmac, api, HALMAC_MAC_POWER_ON); -+ RTW_WARN("%s: Power state abnormal, try to recover...%s\n", -+ __FUNCTION__, (HALMAC_RET_SUCCESS == status)?"OK":"FAIL!"); -+ } -+ if (HALMAC_RET_SUCCESS != status) { -+ if (HALMAC_RET_PWR_UNCHANGE == status) -+ err = -2; -+ goto out; -+ } -+ -+ status = api->halmac_init_system_cfg(halmac); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err = 0; -+out: -+ return err; -+} -+ -+/* -+ * Description: -+ * Power off device hardware. -+ * -+ * Return: -+ * 0 Power off success -+ * -1 Power off fail -+ */ -+int rtw_halmac_poweroff(struct dvobj_priv *d) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ if (!halmac) -+ goto out; -+ -+ api = HALMAC_GET_API(halmac); -+ -+ status = _power_switch(halmac, api, HALMAC_MAC_POWER_OFF); -+ if ((HALMAC_RET_SUCCESS != status) -+ && (HALMAC_RET_PWR_UNCHANGE != status)) -+ goto out; -+ -+ err = 0; -+out: -+ return err; -+} -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+static inline enum halmac_rx_fifo_expanding_mode _trx_share_mode_drv2halmac(u8 trx_share_mode) -+{ -+ if (0 == trx_share_mode) -+ return HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE; -+ else if (1 == trx_share_mode) -+ return HALMAC_RX_FIFO_EXPANDING_MODE_1_BLOCK; -+ else if (2 == trx_share_mode) -+ return HALMAC_RX_FIFO_EXPANDING_MODE_2_BLOCK; -+ else if (3 == trx_share_mode) -+ return HALMAC_RX_FIFO_EXPANDING_MODE_3_BLOCK; -+ else -+ return HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE; -+} -+ -+static enum halmac_rx_fifo_expanding_mode _rtw_get_trx_share_mode(struct _ADAPTER *adapter) -+{ -+ struct registry_priv *registry_par = &adapter->registrypriv; -+ -+ return _trx_share_mode_drv2halmac(registry_par->trx_share_mode); -+} -+ -+void dump_trx_share_mode(void *sel, struct _ADAPTER *adapter) -+{ -+ struct registry_priv *registry_par = &adapter->registrypriv; -+ u8 mode = _trx_share_mode_drv2halmac(registry_par->trx_share_mode); -+ -+ if (HALMAC_RX_FIFO_EXPANDING_MODE_1_BLOCK == mode) -+ RTW_PRINT_SEL(sel, "TRx share mode : %s\n", "RX_FIFO_EXPANDING_MODE_1"); -+ else if (HALMAC_RX_FIFO_EXPANDING_MODE_2_BLOCK == mode) -+ RTW_PRINT_SEL(sel, "TRx share mode : %s\n", "RX_FIFO_EXPANDING_MODE_2"); -+ else if (HALMAC_RX_FIFO_EXPANDING_MODE_3_BLOCK == mode) -+ RTW_PRINT_SEL(sel, "TRx share mode : %s\n", "RX_FIFO_EXPANDING_MODE_3"); -+ else -+ RTW_PRINT_SEL(sel, "TRx share mode : %s\n", "DISABLE"); -+} -+#endif -+ -+static enum halmac_drv_rsvd_pg_num _rsvd_page_num_drv2halmac(u16 num) -+{ -+ if (num <= 8) -+ return HALMAC_RSVD_PG_NUM8; -+ if (num <= 16) -+ return HALMAC_RSVD_PG_NUM16; -+ if (num <= 24) -+ return HALMAC_RSVD_PG_NUM24; -+ if (num <= 32) -+ return HALMAC_RSVD_PG_NUM32; -+ if (num <= 64) -+ return HALMAC_RSVD_PG_NUM64; -+ if (num <= 128) -+ return HALMAC_RSVD_PG_NUM128; -+ -+ if (num > 256) -+ RTW_WARN("%s: Fail to allocate RSVD page(%d)!!" -+ " The MAX RSVD page number is 256...\n", -+ __FUNCTION__, num); -+ -+ return HALMAC_RSVD_PG_NUM256; -+} -+ -+static u16 _rsvd_page_num_halmac2drv(enum halmac_drv_rsvd_pg_num rsvd_page_number) -+{ -+ u16 num = 0; -+ -+ -+ switch (rsvd_page_number) { -+ case HALMAC_RSVD_PG_NUM8: -+ num = 8; -+ break; -+ -+ case HALMAC_RSVD_PG_NUM16: -+ num = 16; -+ break; -+ -+ case HALMAC_RSVD_PG_NUM24: -+ num = 24; -+ break; -+ -+ case HALMAC_RSVD_PG_NUM32: -+ num = 32; -+ break; -+ -+ case HALMAC_RSVD_PG_NUM64: -+ num = 64; -+ break; -+ -+ case HALMAC_RSVD_PG_NUM128: -+ num = 128; -+ break; -+ -+ case HALMAC_RSVD_PG_NUM256: -+ num = 256; -+ break; -+ } -+ -+ return num; -+} -+ -+static enum halmac_trx_mode _choose_trx_mode(struct dvobj_priv *d) -+{ -+ PADAPTER p; -+ -+ -+ p = dvobj_get_primary_adapter(d); -+ -+ if (p->registrypriv.wifi_spec) -+ return HALMAC_TRX_MODE_WMM; -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+ if (_rtw_get_trx_share_mode(p)) -+ return HALMAC_TRX_MODE_TRXSHARE; -+#endif -+ -+ return HALMAC_TRX_MODE_NORMAL; -+} -+ -+static inline enum halmac_rf_type _rf_type_drv2halmac(enum rf_type rf_drv) -+{ -+ enum halmac_rf_type rf_mac; -+ -+ -+ switch (rf_drv) { -+ case RF_1T1R: -+ rf_mac = HALMAC_RF_1T1R; -+ break; -+ case RF_1T2R: -+ rf_mac = HALMAC_RF_1T2R; -+ break; -+ case RF_2T2R: -+ rf_mac = HALMAC_RF_2T2R; -+ break; -+ case RF_2T3R: -+ rf_mac = HALMAC_RF_2T3R; -+ break; -+ case RF_2T4R: -+ rf_mac = HALMAC_RF_2T4R; -+ break; -+ case RF_3T3R: -+ rf_mac = HALMAC_RF_3T3R; -+ break; -+ case RF_3T4R: -+ rf_mac = HALMAC_RF_3T4R; -+ break; -+ case RF_4T4R: -+ rf_mac = HALMAC_RF_4T4R; -+ break; -+ default: -+ rf_mac = HALMAC_RF_MAX_TYPE; -+ RTW_ERR("%s: Invalid RF type(0x%x)!\n", __FUNCTION__, rf_drv); -+ break; -+ } -+ -+ return rf_mac; -+} -+ -+static inline enum rf_type _rf_type_halmac2drv(enum halmac_rf_type rf_mac) -+{ -+ enum rf_type rf_drv; -+ -+ -+ switch (rf_mac) { -+ case HALMAC_RF_1T2R: -+ rf_drv = RF_1T2R; -+ break; -+ case HALMAC_RF_2T4R: -+ rf_drv = RF_2T4R; -+ break; -+ case HALMAC_RF_2T2R: -+ case HALMAC_RF_2T2R_GREEN: -+ rf_drv = RF_2T2R; -+ break; -+ case HALMAC_RF_2T3R: -+ rf_drv = RF_2T3R; -+ break; -+ case HALMAC_RF_1T1R: -+ rf_drv = RF_1T1R; -+ break; -+ case HALMAC_RF_3T3R: -+ rf_drv = RF_3T3R; -+ break; -+ case HALMAC_RF_3T4R: -+ rf_drv = RF_3T4R; -+ break; -+ case HALMAC_RF_4T4R: -+ rf_drv = RF_4T4R; -+ break; -+ default: -+ rf_drv = RF_TYPE_MAX; -+ RTW_ERR("%s: Invalid RF type(0x%x)!\n", __FUNCTION__, rf_mac); -+ break; -+ } -+ -+ return rf_drv; -+} -+ -+static enum odm_cut_version _cut_version_drv2phydm( -+ enum tag_HAL_Cut_Version_Definition cut_drv) -+{ -+ enum odm_cut_version cut_phydm = ODM_CUT_A; -+ u32 diff; -+ -+ -+ if (cut_drv > K_CUT_VERSION) -+ RTW_WARN("%s: unknown cut_ver=%d !!\n", __FUNCTION__, cut_drv); -+ -+ diff = cut_drv - A_CUT_VERSION; -+ cut_phydm += diff; -+ -+ return cut_phydm; -+} -+ -+static int _send_general_info_by_reg(struct dvobj_priv *d, -+ struct halmac_general_info *info) -+{ -+ struct _ADAPTER *a; -+ struct hal_com_data *hal; -+ enum tag_HAL_Cut_Version_Definition cut_drv; -+ enum rf_type rftype; -+ enum odm_cut_version cut_phydm; -+ u8 h2c[RTW_HALMAC_H2C_MAX_SIZE] = {0}; -+ -+ -+ a = dvobj_get_primary_adapter(d); -+ hal = GET_HAL_DATA(a); -+ rftype = _rf_type_halmac2drv(info->rf_type); -+ cut_drv = GET_CVID_CUT_VERSION(hal->version_id); -+ cut_phydm = _cut_version_drv2phydm(cut_drv); -+ -+#define CLASS_GENERAL_INFO_REG 0x02 -+#define CMD_ID_GENERAL_INFO_REG 0x0C -+#define GENERAL_INFO_REG_SET_CMD_ID(buf, v) SET_BITS_TO_LE_4BYTE(buf, 0, 5, v) -+#define GENERAL_INFO_REG_SET_CLASS(buf, v) SET_BITS_TO_LE_4BYTE(buf, 5, 3, v) -+#define GENERAL_INFO_REG_SET_RFE_TYPE(buf, v) SET_BITS_TO_LE_4BYTE(buf, 8, 8, v) -+#define GENERAL_INFO_REG_SET_RF_TYPE(buf, v) SET_BITS_TO_LE_4BYTE(buf, 16, 8, v) -+#define GENERAL_INFO_REG_SET_CUT_VERSION(buf, v) SET_BITS_TO_LE_4BYTE(buf, 24, 8, v) -+#define GENERAL_INFO_REG_SET_RX_ANT_STATUS(buf, v) SET_BITS_TO_LE_1BYTE(buf+4, 0, 4, v) -+#define GENERAL_INFO_REG_SET_TX_ANT_STATUS(buf, v) SET_BITS_TO_LE_1BYTE(buf+4, 4, 4, v) -+ -+ GENERAL_INFO_REG_SET_CMD_ID(h2c, CMD_ID_GENERAL_INFO_REG); -+ GENERAL_INFO_REG_SET_CLASS(h2c, CLASS_GENERAL_INFO_REG); -+ GENERAL_INFO_REG_SET_RFE_TYPE(h2c, info->rfe_type); -+ GENERAL_INFO_REG_SET_RF_TYPE(h2c, rftype); -+ GENERAL_INFO_REG_SET_CUT_VERSION(h2c, cut_phydm); -+ GENERAL_INFO_REG_SET_RX_ANT_STATUS(h2c, info->rx_ant_status); -+ GENERAL_INFO_REG_SET_TX_ANT_STATUS(h2c, info->tx_ant_status); -+ -+ return rtw_halmac_send_h2c(d, h2c); -+} -+ -+static int _send_general_info(struct dvobj_priv *d) -+{ -+ struct _ADAPTER *adapter; -+ struct hal_com_data *hal; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ struct halmac_general_info info; -+ enum halmac_ret_status status; -+ enum rf_type rf = RF_1T1R; -+ enum bb_path txpath = BB_PATH_A; -+ enum bb_path rxpath = BB_PATH_A; -+ int err; -+ -+ -+ adapter = dvobj_get_primary_adapter(d); -+ hal = GET_HAL_DATA(adapter); -+ halmac = dvobj_to_halmac(d); -+ if (!halmac) -+ return -1; -+ api = HALMAC_GET_API(halmac); -+ -+ _rtw_memset(&info, 0, sizeof(info)); -+ info.rfe_type = (u8)hal->rfe_type; -+ rtw_hal_get_trx_path(d, &rf, &txpath, &rxpath); -+ info.rf_type = _rf_type_drv2halmac(rf); -+ info.tx_ant_status = (u8)txpath; -+ info.rx_ant_status = (u8)rxpath; -+ info.ext_pa = 0; /* 2.4G or 5G? format not known */ -+ info.package_type = hal->PackageType; -+ info.mp_mode = adapter->registrypriv.mp_mode; -+ -+ status = api->halmac_send_general_info(halmac, &info); -+ switch (status) { -+ case HALMAC_RET_SUCCESS: -+ break; -+ case HALMAC_RET_NO_DLFW: -+ RTW_WARN("%s: halmac_send_general_info() fail because fw not dl!\n", -+ __FUNCTION__); -+ /* fall through */ -+ default: -+ return -1; -+ } -+ -+ err = _send_general_info_by_reg(d, &info); -+ if (err) { -+ RTW_ERR("%s: Fail to send general info by register!\n", -+ __FUNCTION__); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+static int _cfg_drv_rsvd_pg_num(struct dvobj_priv *d) -+{ -+ struct _ADAPTER *a; -+ struct hal_com_data *hal; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_drv_rsvd_pg_num rsvd_page_number; -+ enum halmac_ret_status status; -+ u16 drv_rsvd_num; -+ int ret = 0; -+ -+ -+ a = dvobj_get_primary_adapter(d); -+ hal = GET_HAL_DATA(a); -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ drv_rsvd_num = rtw_hal_get_rsvd_page_num(a); -+ rsvd_page_number = _rsvd_page_num_drv2halmac(drv_rsvd_num); -+ status = api->halmac_cfg_drv_rsvd_pg_num(halmac, rsvd_page_number); -+ if (status != HALMAC_RET_SUCCESS) { -+ ret = -1; -+ goto exit; -+ } -+ hal->drv_rsvd_page_number = _rsvd_page_num_halmac2drv(rsvd_page_number); -+ -+exit: -+#ifndef DBG_RSVD_PAGE_CFG -+ if (drv_rsvd_num != _rsvd_page_num_halmac2drv(rsvd_page_number)) -+#endif -+ RTW_INFO("%s: request %d pages => halmac %d pages %s\n" -+ , __FUNCTION__, drv_rsvd_num, _rsvd_page_num_halmac2drv(rsvd_page_number) -+ , ret ? "fail" : "success"); -+ -+ return ret; -+} -+ -+static void _debug_dlfw_fail(struct dvobj_priv *d) -+{ -+ struct _ADAPTER *a; -+ u32 addr; -+ u32 v32, i, n; -+ -+ -+ a = dvobj_get_primary_adapter(d); -+ -+ /* read 0x80[15:0], 0x10F8[31:0] once */ -+ addr = 0x80; -+ v32 = rtw_read16(a, addr); -+ RTW_PRINT("%s: 0x%X = 0x%04x\n", __FUNCTION__, addr, v32); -+ -+ addr = 0x10F8; -+ v32 = rtw_read32(a, addr); -+ RTW_PRINT("%s: 0x%X = 0x%08x\n", __FUNCTION__, addr, v32); -+ -+ /* read 0x10FC[31:0], 5 times */ -+ addr = 0x10FC; -+ n = 5; -+ for (i = 0; i < n; i++) { -+ v32 = rtw_read32(a, addr); -+ RTW_PRINT("%s: 0x%X = 0x%08x (%u/%u)\n", -+ __FUNCTION__, addr, v32, i, n); -+ } -+ -+ /* -+ * write 0x3A[7:0]=0x28 and 0xF6[7:0]=0x01 -+ * and then read 0xC0[31:0] 5 times -+ */ -+ addr = 0x3A; -+ v32 = 0x28; -+ rtw_write8(a, addr, (u8)v32); -+ v32 = rtw_read8(a, addr); -+ RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v32); -+ -+ addr = 0xF6; -+ v32 = 0x1; -+ rtw_write8(a, addr, (u8)v32); -+ v32 = rtw_read8(a, addr); -+ RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v32); -+ -+ addr = 0xC0; -+ n = 5; -+ for (i = 0; i < n; i++) { -+ v32 = rtw_read32(a, addr); -+ RTW_PRINT("%s: 0x%X = 0x%08x (%u/%u)\n", -+ __FUNCTION__, addr, v32, i, n); -+ } -+ -+ mac_reg_dump(NULL, a); -+#ifdef CONFIG_SDIO_HCI -+ RTW_PRINT("======= SDIO Local REG =======\n"); -+ sdio_local_reg_dump(NULL, a); -+ RTW_PRINT("======= SDIO CCCR REG =======\n"); -+ sd_f0_reg_dump(NULL, a); -+#endif /* CONFIG_SDIO_HCI */ -+ -+ /* read 0x80 after 10 secs */ -+ rtw_msleep_os(10000); -+ addr = 0x80; -+ v32 = rtw_read16(a, addr); -+ RTW_PRINT("%s: 0x%X = 0x%04x (after 10 secs)\n", -+ __FUNCTION__, addr, v32); -+} -+ -+static enum halmac_ret_status _enter_cpu_sleep_mode(struct dvobj_priv *d) -+{ -+ struct hal_com_data *hal; -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ -+ -+ hal = GET_HAL_DATA(dvobj_get_primary_adapter(d)); -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+#ifdef CONFIG_RTL8822B -+ /* Support after firmware version 21 */ -+ if (hal->firmware_version < 21) -+ return HALMAC_RET_NOT_SUPPORT; -+#elif defined(CONFIG_RTL8821C) -+ /* Support after firmware version 13.6 or 16 */ -+ if (hal->firmware_version == 13) { -+ if (hal->firmware_sub_version < 6) -+ return HALMAC_RET_NOT_SUPPORT; -+ } else if (hal->firmware_version < 16) { -+ return HALMAC_RET_NOT_SUPPORT; -+ } -+#endif -+ -+ return api->halmac_enter_cpu_sleep_mode(mac); -+} -+ -+/* -+ * _cpu_sleep() - Let IC CPU enter sleep mode -+ * @d: struct dvobj_priv* -+ * @timeout: time limit of wait, unit is ms -+ * 0 for no limit -+ * -+ * Return 0 for CPU in sleep mode, otherwise fail to enter sleep mode. -+ * Error codes definition are as follow: -+ * -1 HALMAC enter sleep return fail -+ * -2 HALMAC get CPU mode return fail -+ * -110 timeout -+ */ -+static int _cpu_sleep(struct dvobj_priv *d, u32 timeout) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ enum halmac_wlcpu_mode mode = HALMAC_WLCPU_UNDEFINE; -+ systime start_t; -+ s32 period = 0; -+ u32 cnt = 0; -+ int err = 0; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ start_t = rtw_get_current_time(); -+ -+ status = _enter_cpu_sleep_mode(d); -+ if (status != HALMAC_RET_SUCCESS) { -+ if (status != HALMAC_RET_NOT_SUPPORT) -+ err = -1; -+ goto exit; -+ } -+ -+ do { -+ cnt++; -+ -+ mode = HALMAC_WLCPU_UNDEFINE; -+ status = api->halmac_get_cpu_mode(mac, &mode); -+ -+ period = rtw_get_passing_time_ms(start_t); -+ -+ if (status != HALMAC_RET_SUCCESS) { -+ err = -2; -+ break; -+ } -+ if (mode == HALMAC_WLCPU_SLEEP) -+ break; -+ if (period > timeout) { -+ err = -110; -+ break; -+ } -+ -+ rtw_msleep_os(1); -+ } while (1); -+ -+exit: -+ if (err) -+ RTW_ERR("%s: Fail to enter sleep mode! (%d, %d)\n", -+ __FUNCTION__, status, mode); -+ -+ RTW_INFO("%s: Cost %dms to polling %u times. (err=%d)\n", -+ __FUNCTION__, period, cnt, err); -+ -+ return err; -+} -+ -+static void _init_trx_cfg_drv(struct dvobj_priv *d) -+{ -+#ifdef CONFIG_PCI_HCI -+ rtw_hal_irp_reset(dvobj_get_primary_adapter(d)); -+#endif -+} -+ -+/* -+ * Description: -+ * Downlaod Firmware Flow -+ * -+ * Parameters: -+ * d pointer of struct dvobj_priv -+ * fw firmware array -+ * fwsize firmware size -+ * re_dl re-download firmware or not -+ * 0: run in init hal flow, not re-download -+ * 1: it is a stand alone operation, not in init hal flow -+ * -+ * Return: -+ * 0 Success -+ * others Fail -+ */ -+static int download_fw(struct dvobj_priv *d, u8 *fw, u32 fwsize, u8 re_dl) -+{ -+ PHAL_DATA_TYPE hal; -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ struct halmac_fw_version fw_vesion; -+ enum halmac_ret_status status; -+ int err = 0; -+ -+ -+ hal = GET_HAL_DATA(dvobj_get_primary_adapter(d)); -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ if ((!fw) || (!fwsize)) -+ return -1; -+ -+ /* 1. Driver Stop Tx */ -+ /* ToDo */ -+ -+ /* 2. Driver Check Tx FIFO is empty */ -+ err = rtw_halmac_txfifo_wait_empty(d, 2000); /* wait 2s */ -+ if (err) { -+ err = -1; -+ goto resume_tx; -+ } -+ -+ /* 3. Config MAX download size */ -+ /* -+ * Already done in rtw_halmac_init_adapter() or -+ * somewhere calling rtw_halmac_set_max_dl_fw_size(). -+ */ -+ -+ if (re_dl) { -+ /* 4. Enter IC CPU sleep mode */ -+ err = _cpu_sleep(d, 2000); -+ if (err) { -+ RTW_ERR("%s: IC CPU fail to enter sleep mode!(%d)\n", -+ __FUNCTION__, err); -+ /* skip this error */ -+ err = 0; -+ } -+ } -+ -+ /* 5. Download Firmware */ -+ status = api->halmac_download_firmware(mac, fw, fwsize); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: download firmware FAIL! status=0x%02x\n", -+ __FUNCTION__, status); -+ _debug_dlfw_fail(d); -+ err = -1; -+ goto resume_tx; -+ } -+ -+ /* 5.1. (Driver) Reset driver variables if needed */ -+ hal->LastHMEBoxNum = 0; -+ -+ /* 5.2. (Driver) Get FW version */ -+ status = api->halmac_get_fw_version(mac, &fw_vesion); -+ if (status == HALMAC_RET_SUCCESS) { -+ hal->firmware_version = fw_vesion.version; -+ hal->firmware_sub_version = fw_vesion.sub_version; -+ hal->firmware_size = fwsize; -+ } -+ -+resume_tx: -+ /* 6. Driver resume TX if needed */ -+ /* ToDo */ -+ -+ if (err) -+ goto exit; -+ -+ if (re_dl) { -+ enum halmac_trx_mode mode; -+ -+ /* 7. Change reserved page size */ -+ err = _cfg_drv_rsvd_pg_num(d); -+ if (err) -+ return -1; -+ -+ /* 8. Init TRX Configuration */ -+ mode = _choose_trx_mode(d); -+ status = api->halmac_init_trx_cfg(mac, mode); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ _init_trx_cfg_drv(d); -+ -+ /* 9. Config RX Aggregation */ -+ err = rtw_halmac_rx_agg_switch(d, _TRUE); -+ if (err) -+ return -1; -+ -+ /* 10. Send General Info */ -+ err = _send_general_info(d); -+ if (err) -+ return -1; -+ } -+ -+exit: -+ return err; -+} -+ -+static int init_mac_flow(struct dvobj_priv *d) -+{ -+ PADAPTER p; -+ struct hal_com_data *hal; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_drv_rsvd_pg_num rsvd_page_number; -+ union halmac_wlan_addr hwa; -+ enum halmac_trx_mode trx_mode; -+ enum halmac_ret_status status; -+ u8 drv_rsvd_num; -+ u8 nettype; -+ int err, err_ret = -1; -+ -+ -+ p = dvobj_get_primary_adapter(d); -+ hal = GET_HAL_DATA(p); -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+ status = api->halmac_cfg_rxff_expand_mode(halmac, -+ _rtw_get_trx_share_mode(p)); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+#endif -+ -+#ifdef DBG_LA_MODE -+ if (dvobj_to_regsty(d)->la_mode_en) { -+ status = api->halmac_cfg_la_mode(halmac, HALMAC_LA_MODE_PARTIAL); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: Fail to enable LA mode!\n", __FUNCTION__); -+ goto out; -+ } -+ RTW_PRINT("%s: Enable LA mode OK.\n", __FUNCTION__); -+ } -+#endif -+ -+ err = _cfg_drv_rsvd_pg_num(d); -+ if (err) -+ goto out; -+ -+#ifdef CONFIG_USB_HCI -+ status = api->halmac_set_bulkout_num(halmac, d->RtNumOutPipes); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+#endif /* CONFIG_USB_HCI */ -+ -+ trx_mode = _choose_trx_mode(d); -+ status = api->halmac_init_mac_cfg(halmac, trx_mode); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ /* Driver insert flow: Sync driver setting with register */ -+ /* Sync driver RCR cache with register setting */ -+ rtw_hal_get_hwreg(dvobj_get_primary_adapter(d), HW_VAR_RCR, NULL); -+ -+#ifdef CONFIG_RTS_FULL_BW -+ err = rtw_halmac_set_rts_full_bw(d, _TRUE); -+ if (err) -+ RTW_WARN("%s: Fail to set RTS FULL BW mode\n", __FUNCTION__); -+#else -+ err = rtw_halmac_set_rts_full_bw(d, _FALSE); -+ if (err) -+ RTW_WARN("%s: Fail to disable RTS FULL BW mode\n", __FUNCTION__); -+#endif /* CONFIG_RTS_FULL_BW */ -+ -+ _init_trx_cfg_drv(d); -+ /* Driver inser flow end */ -+ -+ err = rtw_halmac_rx_agg_switch(d, _TRUE); -+ if (err) -+ goto out; -+ -+ nettype = dvobj_to_regsty(d)->wireless_mode; -+ if (is_supported_vht(nettype) == _TRUE) -+ status = api->halmac_cfg_operation_mode(halmac, HALMAC_WIRELESS_MODE_AC); -+ else if (is_supported_ht(nettype) == _TRUE) -+ status = api->halmac_cfg_operation_mode(halmac, HALMAC_WIRELESS_MODE_N); -+ else if (IsSupportedTxOFDM(nettype) == _TRUE) -+ status = api->halmac_cfg_operation_mode(halmac, HALMAC_WIRELESS_MODE_G); -+ else -+ status = api->halmac_cfg_operation_mode(halmac, HALMAC_WIRELESS_MODE_B); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err_ret = 0; -+out: -+ return err_ret; -+} -+ -+static int _drv_enable_trx(struct dvobj_priv *d) -+{ -+ struct _ADAPTER *adapter; -+ u32 status; -+ -+ -+ adapter = dvobj_get_primary_adapter(d); -+ if (adapter->bup == _FALSE) { -+#ifdef CONFIG_NEW_NETDEV_HDL -+ status = rtw_mi_start_drv_threads(adapter); -+#else -+ status = rtw_start_drv_threads(adapter); -+#endif -+ if (status == _FAIL) { -+ RTW_ERR("%s: Start threads Failed!\n", __FUNCTION__); -+ return -1; -+ } -+ } -+ -+ rtw_intf_start(adapter); -+ -+ return 0; -+} -+ -+/* -+ * Notices: -+ * Make sure following information -+ * 1. GET_HAL_RFPATH -+ * 2. GET_HAL_DATA(dvobj_get_primary_adapter(d))->rfe_type -+ * 3. GET_HAL_DATA(dvobj_get_primary_adapter(d))->PackageType -+ * 4. dvobj_get_primary_adapter(d)->registrypriv.mp_mode -+ * are all ready before calling this function. -+ */ -+static int _halmac_init_hal(struct dvobj_priv *d, u8 *fw, u32 fwsize) -+{ -+ PADAPTER adapter; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 ok; -+ u8 fw_ok = _FALSE; -+ int err, err_ret = -1; -+ -+ -+ adapter = dvobj_get_primary_adapter(d); -+ halmac = dvobj_to_halmac(d); -+ if (!halmac) -+ goto out; -+ api = HALMAC_GET_API(halmac); -+ -+ /* StatePowerOff */ -+ -+ /* SKIP: halmac_init_adapter (Already done before) */ -+ -+ /* halmac_pre_Init_system_cfg */ -+ /* halmac_mac_power_switch(on) */ -+ /* halmac_Init_system_cfg */ -+ ok = rtw_hal_power_on(adapter); -+ if (_FAIL == ok) -+ goto out; -+ -+ /* StatePowerOn */ -+ -+ /* DownloadFW */ -+ if (fw && fwsize) { -+ err = download_fw(d, fw, fwsize, 0); -+ if (err) -+ goto out; -+ fw_ok = _TRUE; -+ } -+ -+ /* InitMACFlow */ -+ err = init_mac_flow(d); -+ if (err) -+ goto out; -+ -+ /* Driver insert flow: Enable TR/RX */ -+ err = _drv_enable_trx(d); -+ if (err) -+ goto out; -+ -+ /* halmac_send_general_info */ -+ if (_TRUE == fw_ok) { -+ err = _send_general_info(d); -+ if (err) -+ goto out; -+ } -+ -+ /* Init Phy parameter-MAC */ -+ ok = rtw_hal_init_mac_register(adapter); -+ if (_FALSE == ok) -+ goto out; -+ -+ /* StateMacInitialized */ -+ -+ /* halmac_cfg_drv_info */ -+ err = rtw_halmac_config_rx_info(d, HALMAC_DRV_INFO_PHY_STATUS); -+ if (err) -+ goto out; -+ -+ /* halmac_set_hw_value(HALMAC_HW_EN_BB_RF) */ -+ /* Init BB, RF */ -+ ok = rtw_hal_init_phy(adapter); -+ if (_FALSE == ok) -+ goto out; -+ -+ status = api->halmac_init_interface_cfg(halmac); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ /* SKIP: halmac_verify_platform_api */ -+ /* SKIP: halmac_h2c_lb */ -+ -+ /* StateRxIdle */ -+ -+ err_ret = 0; -+out: -+ return err_ret; -+} -+ -+int rtw_halmac_init_hal(struct dvobj_priv *d) -+{ -+ return _halmac_init_hal(d, NULL, 0); -+} -+ -+/* -+ * Notices: -+ * Make sure following information -+ * 1. GET_HAL_RFPATH -+ * 2. GET_HAL_DATA(dvobj_get_primary_adapter(d))->rfe_type -+ * 3. GET_HAL_DATA(dvobj_get_primary_adapter(d))->PackageType -+ * 4. dvobj_get_primary_adapter(d)->registrypriv.mp_mode -+ * are all ready before calling this function. -+ */ -+int rtw_halmac_init_hal_fw(struct dvobj_priv *d, u8 *fw, u32 fwsize) -+{ -+ return _halmac_init_hal(d, fw, fwsize); -+} -+ -+/* -+ * Notices: -+ * Make sure following information -+ * 1. GET_HAL_RFPATH -+ * 2. GET_HAL_DATA(dvobj_get_primary_adapter(d))->rfe_type -+ * 3. GET_HAL_DATA(dvobj_get_primary_adapter(d))->PackageType -+ * 4. dvobj_get_primary_adapter(d)->registrypriv.mp_mode -+ * are all ready before calling this function. -+ */ -+int rtw_halmac_init_hal_fw_file(struct dvobj_priv *d, u8 *fwpath) -+{ -+ u8 *fw = NULL; -+ u32 fwmaxsize = 0, size = 0; -+ int err = 0; -+ -+ -+ err = rtw_halmac_get_fw_max_size(d, &fwmaxsize); -+ if (err) { -+ RTW_ERR("%s: Fail to get Firmware MAX size(err=%d)\n", __FUNCTION__, err); -+ return -1; -+ } -+ -+ fw = rtw_zmalloc(fwmaxsize); -+ if (!fw) -+ return -1; -+ -+ size = rtw_retrieve_from_file(fwpath, fw, fwmaxsize); -+ if (!size) { -+ err = -1; -+ goto exit; -+ } -+ -+ err = _halmac_init_hal(d, fw, size); -+ -+exit: -+ rtw_mfree(fw, fwmaxsize); -+ /*fw = NULL;*/ -+ -+ return err; -+} -+ -+int rtw_halmac_deinit_hal(struct dvobj_priv *d) -+{ -+ PADAPTER adapter; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ adapter = dvobj_get_primary_adapter(d); -+ halmac = dvobj_to_halmac(d); -+ if (!halmac) -+ goto out; -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_deinit_interface_cfg(halmac); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ rtw_hal_power_off(adapter); -+ -+ err = 0; -+out: -+ return err; -+} -+ -+int rtw_halmac_self_verify(struct dvobj_priv *d) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ int err = -1; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_verify_platform_api(mac); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ status = api->halmac_h2c_lb(mac); -+ if (status != HALMAC_RET_SUCCESS) -+ goto out; -+ -+ err = 0; -+out: -+ return err; -+} -+ -+static u8 rtw_halmac_txfifo_is_empty(struct dvobj_priv *d) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 chk_num = 10; -+ u8 rst = _FALSE; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_txfifo_is_empty(mac, chk_num); -+ if (status == HALMAC_RET_SUCCESS) -+ rst = _TRUE; -+ -+ return rst; -+} -+ -+/** -+ * rtw_halmac_txfifo_wait_empty() - Wait TX FIFO to be emtpy -+ * @d: struct dvobj_priv* -+ * @timeout: time limit of wait, unit is ms -+ * 0 for no limit -+ * -+ * Wait TX FIFO to be emtpy. -+ * -+ * Return 0 for TX FIFO is empty, otherwise not empty. -+ */ -+int rtw_halmac_txfifo_wait_empty(struct dvobj_priv *d, u32 timeout) -+{ -+ struct _ADAPTER *a; -+ u8 empty = _FALSE; -+ u32 cnt = 0; -+ systime start_time = 0; -+ u32 pass_time; /* ms */ -+ -+ -+ a = dvobj_get_primary_adapter(d); -+ start_time = rtw_get_current_time(); -+ -+ do { -+ cnt++; -+ empty = rtw_halmac_txfifo_is_empty(d); -+ if (empty == _TRUE) -+ break; -+ -+ if (timeout) { -+ pass_time = rtw_get_passing_time_ms(start_time); -+ if (pass_time > timeout) -+ break; -+ } -+ if (RTW_CANNOT_IO(a)) { -+ RTW_WARN("%s: Interrupted by I/O forbiden!\n", __FUNCTION__); -+ break; -+ } -+ -+ rtw_msleep_os(2); -+ } while (1); -+ -+ if (empty == _FALSE) { -+#ifdef CONFIG_RTW_DEBUG -+ u16 dbg_reg[] = {0x210, 0x230, 0x234, 0x238, 0x23C, 0x240, -+ 0x418, 0x10FC, 0x10F8, 0x11F4, 0x11F8}; -+ u8 i; -+ u32 val; -+ -+ if (!RTW_CANNOT_IO(a)) { -+ for (i = 0; i < ARRAY_SIZE(dbg_reg); i++) { -+ val = rtw_read32(a, dbg_reg[i]); -+ RTW_ERR("REG_%X:0x%08x\n", dbg_reg[i], val); -+ } -+ } -+#endif /* CONFIG_RTW_DEBUG */ -+ -+ RTW_ERR("%s: Fail to wait txfifo empty!(cnt=%d)\n", -+ __FUNCTION__, cnt); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+static enum halmac_dlfw_mem _fw_mem_drv2halmac(enum fw_mem mem, u8 tx_stop) -+{ -+ enum halmac_dlfw_mem mem_halmac = HALMAC_DLFW_MEM_UNDEFINE; -+ -+ -+ switch (mem) { -+ case FW_EMEM: -+ if (tx_stop == _FALSE) -+ mem_halmac = HALMAC_DLFW_MEM_EMEM_RSVD_PG; -+ else -+ mem_halmac = HALMAC_DLFW_MEM_EMEM; -+ break; -+ -+ case FW_IMEM: -+ case FW_DMEM: -+ mem_halmac = HALMAC_DLFW_MEM_UNDEFINE; -+ break; -+ } -+ -+ return mem_halmac; -+} -+ -+int rtw_halmac_dlfw_mem(struct dvobj_priv *d, u8 *fw, u32 fwsize, enum fw_mem mem) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ enum halmac_dlfw_mem dlfw_mem; -+ u8 tx_stop = _FALSE; -+ u32 chk_timeout = 2000; /* unit: ms */ -+ int err = 0; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ if ((!fw) || (!fwsize)) -+ return -1; -+ -+#ifndef RTW_HALMAC_DLFW_MEM_NO_STOP_TX -+ /* 1. Driver Stop Tx */ -+ /* ToDo */ -+ -+ /* 2. Driver Check Tx FIFO is empty */ -+ err = rtw_halmac_txfifo_wait_empty(d, chk_timeout); -+ if (err) -+ tx_stop = _FALSE; -+ else -+ tx_stop = _TRUE; -+#endif /* !RTW_HALMAC_DLFW_MEM_NO_STOP_TX */ -+ -+ /* 3. Download Firmware MEM */ -+ dlfw_mem = _fw_mem_drv2halmac(mem, tx_stop); -+ if (dlfw_mem == HALMAC_DLFW_MEM_UNDEFINE) { -+ err = -1; -+ goto resume_tx; -+ } -+ status = api->halmac_free_download_firmware(mac, dlfw_mem, fw, fwsize); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: halmac_free_download_firmware fail(err=0x%x)\n", -+ __FUNCTION__, status); -+ err = -1; -+ goto resume_tx; -+ } -+ -+resume_tx: -+#ifndef RTW_HALMAC_DLFW_MEM_NO_STOP_TX -+ /* 4. Driver resume TX if needed */ -+ /* ToDo */ -+#endif /* !RTW_HALMAC_DLFW_MEM_NO_STOP_TX */ -+ -+ return err; -+} -+ -+int rtw_halmac_dlfw_mem_from_file(struct dvobj_priv *d, u8 *fwpath, enum fw_mem mem) -+{ -+ u8 *fw = NULL; -+ u32 fwmaxsize = 0, size = 0; -+ int err = 0; -+ -+ -+ err = rtw_halmac_get_fw_max_size(d, &fwmaxsize); -+ if (err) { -+ RTW_ERR("%s: Fail to get Firmware MAX size(err=%d)\n", __FUNCTION__, err); -+ return -1; -+ } -+ -+ fw = rtw_zmalloc(fwmaxsize); -+ if (!fw) -+ return -1; -+ -+ size = rtw_retrieve_from_file(fwpath, fw, fwmaxsize); -+ if (size) -+ err = rtw_halmac_dlfw_mem(d, fw, size, mem); -+ else -+ err = -1; -+ -+ rtw_mfree(fw, fwmaxsize); -+ /*fw = NULL;*/ -+ -+ return err; -+} -+ -+/* -+ * Return: -+ * 0 Success -+ * -22 Invalid arguemnt -+ */ -+int rtw_halmac_dlfw(struct dvobj_priv *d, u8 *fw, u32 fwsize) -+{ -+ PADAPTER adapter; -+ enum halmac_ret_status status; -+ u32 ok; -+ int err, err_ret = -1; -+ -+ -+ if (!fw || !fwsize) -+ return -22; -+ -+ adapter = dvobj_get_primary_adapter(d); -+ -+ /* re-download firmware */ -+ if (rtw_is_hw_init_completed(adapter)) -+ return download_fw(d, fw, fwsize, 1); -+ -+ /* Download firmware before hal init */ -+ /* Power on, download firmware and init mac */ -+ ok = rtw_hal_power_on(adapter); -+ if (_FAIL == ok) -+ goto out; -+ -+ err = download_fw(d, fw, fwsize, 0); -+ if (err) { -+ err_ret = err; -+ goto out; -+ } -+ -+ err = init_mac_flow(d); -+ if (err) -+ goto out; -+ -+ err = _send_general_info(d); -+ if (err) -+ goto out; -+ -+ err_ret = 0; -+ -+out: -+ return err_ret; -+} -+ -+int rtw_halmac_dlfw_from_file(struct dvobj_priv *d, u8 *fwpath) -+{ -+ u8 *fw = NULL; -+ u32 fwmaxsize = 0, size = 0; -+ int err = 0; -+ -+ -+ err = rtw_halmac_get_fw_max_size(d, &fwmaxsize); -+ if (err) { -+ RTW_ERR("%s: Fail to get Firmware MAX size(err=%d)\n", __FUNCTION__, err); -+ return -1; -+ } -+ -+ fw = rtw_zmalloc(fwmaxsize); -+ if (!fw) -+ return -1; -+ -+ size = rtw_retrieve_from_file(fwpath, fw, fwmaxsize); -+ if (size) -+ err = rtw_halmac_dlfw(d, fw, size); -+ else -+ err = -1; -+ -+ rtw_mfree(fw, fwmaxsize); -+ /*fw = NULL;*/ -+ -+ return err; -+} -+ -+/* -+ * Description: -+ * Power on/off BB/RF domain. -+ * -+ * Parameters: -+ * enable _TRUE/_FALSE for power on/off -+ * -+ * Return: -+ * 0 Success -+ * others Fail -+ */ -+int rtw_halmac_phy_power_switch(struct dvobj_priv *d, u8 enable) -+{ -+ PADAPTER adapter; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u8 on; -+ -+ -+ adapter = dvobj_get_primary_adapter(d); -+ halmac = dvobj_to_halmac(d); -+ if (!halmac) -+ return -1; -+ api = HALMAC_GET_API(halmac); -+ on = (enable == _TRUE) ? 1 : 0; -+ -+ status = api->halmac_set_hw_value(halmac, HALMAC_HW_EN_BB_RF, &on); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+} -+ -+static u8 _is_fw_read_cmd_down(PADAPTER adapter, u8 msgbox_num) -+{ -+ u8 read_down = _FALSE; -+ int retry_cnts = 100; -+ u8 valid; -+ -+ do { -+ valid = rtw_read8(adapter, REG_HMETFR) & BIT(msgbox_num); -+ if (0 == valid) -+ read_down = _TRUE; -+ else -+ rtw_msleep_os(1); -+ } while ((!read_down) && (retry_cnts--)); -+ -+ if (_FALSE == read_down) -+ RTW_WARN("%s, reg_1cc(%x), msg_box(%d)...\n", __func__, rtw_read8(adapter, REG_HMETFR), msgbox_num); -+ -+ return read_down; -+} -+ -+/** -+ * rtw_halmac_send_h2c() - Send H2C to firmware -+ * @d: struct dvobj_priv* -+ * @h2c: H2C data buffer, suppose to be 8 bytes -+ * -+ * Send H2C to firmware by message box register(0x1D0~0x1D3 & 0x1F0~0x1F3). -+ * -+ * Assume firmware be ready to accept H2C here, please check -+ * (hal->bFWReady == _TRUE) before call this function or make sure firmware is -+ * ready. -+ * -+ * Return: 0 if process OK, otherwise fail to send this H2C. -+ */ -+int rtw_halmac_send_h2c(struct dvobj_priv *d, u8 *h2c) -+{ -+ PADAPTER adapter = dvobj_get_primary_adapter(d); -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter); -+ u8 h2c_box_num = 0; -+ u32 msgbox_addr = 0; -+ u32 msgbox_ex_addr = 0; -+ u32 h2c_cmd = 0; -+ u32 h2c_cmd_ex = 0; -+ int err = -1; -+ -+ -+ if (!h2c) { -+ RTW_WARN("%s: pbuf is NULL\n", __FUNCTION__); -+ return err; -+ } -+ -+ if (rtw_is_surprise_removed(adapter)) { -+ RTW_WARN("%s: surprise removed\n", __FUNCTION__); -+ return err; -+ } -+ -+ _enter_critical_mutex(&d->h2c_fwcmd_mutex, NULL); -+ -+ /* pay attention to if race condition happened in H2C cmd setting */ -+ h2c_box_num = hal->LastHMEBoxNum; -+ -+ if (!_is_fw_read_cmd_down(adapter, h2c_box_num)) { -+ RTW_WARN(" fw read cmd failed...\n"); -+#ifdef DBG_CONFIG_ERROR_DETECT -+ hal->srestpriv.self_dect_fw = _TRUE; -+ hal->srestpriv.self_dect_fw_cnt++; -+#endif /* DBG_CONFIG_ERROR_DETECT */ -+ goto exit; -+ } -+ -+ /* Write Ext command (byte 4~7) */ -+ msgbox_ex_addr = REG_HMEBOX_E0 + (h2c_box_num * EX_MESSAGE_BOX_SIZE); -+ _rtw_memcpy((u8 *)(&h2c_cmd_ex), h2c + 4, EX_MESSAGE_BOX_SIZE); -+ h2c_cmd_ex = le32_to_cpu(h2c_cmd_ex); -+ rtw_write32(adapter, msgbox_ex_addr, h2c_cmd_ex); -+ -+ /* Write command (byte 0~3) */ -+ msgbox_addr = REG_HMEBOX0 + (h2c_box_num * MESSAGE_BOX_SIZE); -+ _rtw_memcpy((u8 *)(&h2c_cmd), h2c, 4); -+ h2c_cmd = le32_to_cpu(h2c_cmd); -+ rtw_write32(adapter, msgbox_addr, h2c_cmd); -+ -+ /* update last msg box number */ -+ hal->LastHMEBoxNum = (h2c_box_num + 1) % MAX_H2C_BOX_NUMS; -+ err = 0; -+ -+#ifdef DBG_H2C_CONTENT -+ RTW_INFO_DUMP("[H2C] - ", h2c, RTW_HALMAC_H2C_MAX_SIZE); -+#endif -+exit: -+ _exit_critical_mutex(&d->h2c_fwcmd_mutex, NULL); -+ return err; -+} -+ -+/** -+ * rtw_halmac_c2h_handle() - Handle C2H for HALMAC -+ * @d: struct dvobj_priv* -+ * @c2h: Full C2H packet, including RX description and payload -+ * @size: Size(byte) of c2h -+ * -+ * Send C2H packet to HALMAC to process C2H packets, and the expected C2H ID is -+ * 0xFF. This function won't have any I/O, so caller doesn't have to call it in -+ * I/O safe place(ex. command thread). -+ * -+ * Please sure doesn't call this function in the same thread as someone is -+ * waiting HALMAC C2H ack, otherwise there is a deadlock happen. -+ * -+ * Return: 0 if process OK, otherwise no action for this C2H. -+ */ -+int rtw_halmac_c2h_handle(struct dvobj_priv *d, u8 *c2h, u32 size) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+#ifdef RTW_HALMAC_FILTER_DRV_C2H -+ u32 desc_size = 0; -+ u8 *c2h_data; -+ u8 sub; -+#endif /* RTW_HALMAC_FILTER_DRV_C2H */ -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+#ifdef RTW_HALMAC_FILTER_DRV_C2H -+ status = api->halmac_get_hw_value(mac, HALMAC_HW_RX_DESC_SIZE, -+ &desc_size); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: fail to get rx desc size!\n", __FUNCTION__); -+ goto skip_filter; -+ } -+ -+ c2h_data = c2h + desc_size; -+ sub = C2H_HDR_GET_C2H_SUB_CMD_ID(c2h_data); -+ switch (sub) { -+ case C2H_SUB_CMD_ID_C2H_PKT_FTM_DBG: -+ case C2H_SUB_CMD_ID_C2H_PKT_FTM_2_DBG: -+ case C2H_SUB_CMD_ID_C2H_PKT_FTM_3_DBG: -+ case C2H_SUB_CMD_ID_C2H_PKT_FTM_4_DBG: -+ case C2H_SUB_CMD_ID_FTMACKRPT_HDL_DBG: -+ case C2H_SUB_CMD_ID_FTMC2H_RPT: -+ case C2H_SUB_CMD_ID_DRVFTMC2H_RPT: -+ case C2H_SUB_CMD_ID_C2H_PKT_FTM_5_DBG: -+ case C2H_SUB_CMD_ID_CCX_RPT: -+ case C2H_SUB_CMD_ID_C2H_PKT_NAN_RPT: -+ case C2H_SUB_CMD_ID_C2H_PKT_ATM_RPT: -+ case C2H_SUB_CMD_ID_C2H_PKT_SCC_CSA_RPT: -+ case C2H_SUB_CMD_ID_C2H_PKT_FW_STATUS_NOTIFY: -+ case C2H_SUB_CMD_ID_C2H_PKT_FTMSESSION_END: -+ case C2H_SUB_CMD_ID_C2H_PKT_DETECT_THERMAL: -+ case C2H_SUB_CMD_ID_FW_FWCTRL_RPT: -+ case C2H_SUB_CMD_ID_SCAN_CH_NOTIFY: -+ case C2H_SUB_CMD_ID_FW_TBTT_RPT: -+ case C2H_SUB_CMD_ID_BCN_OFFLOAD: -+ case C2H_SUB_CMD_ID_FW_DBG_MSG: -+ RTW_PRINT("%s: unhandled C2H, id=0xFF subid=0x%x len=%u\n", -+ __FUNCTION__, sub, C2H_HDR_GET_LEN(c2h_data)); -+ RTW_PRINT_DUMP("C2H: ", c2h_data, size - desc_size); -+ return 0; -+ } -+ -+skip_filter: -+#endif /* RTW_HALMAC_FILTER_DRV_C2H */ -+ -+ status = api->halmac_get_c2h_info(mac, c2h, size); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ -+ return 0; -+} -+ -+int rtw_halmac_get_available_efuse_size(struct dvobj_priv *d, u32 *size) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 val; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_get_efuse_available_size(mac, &val); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ -+ *size = val; -+ return 0; -+} -+ -+int rtw_halmac_get_physical_efuse_size(struct dvobj_priv *d, u32 *size) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 val; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_get_efuse_size(mac, &val); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ -+ *size = val; -+ return 0; -+} -+ -+int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ enum halmac_feature_id id; -+ int ret; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ id = HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE; -+ -+ ret = init_halmac_event(d, id, map, size); -+ if (ret) -+ return -1; -+ -+ status = api->halmac_dump_efuse_map(mac, HALMAC_EFUSE_R_DRV); -+ if (HALMAC_RET_SUCCESS != status) { -+ free_halmac_event(d, id); -+ return -1; -+ } -+ -+ ret = wait_halmac_event(d, id); -+ if (ret) -+ return -1; -+ -+ return 0; -+} -+ -+int rtw_halmac_read_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u8 v; -+ u32 i; -+ u8 *efuse = NULL; -+ u32 size = 0; -+ int err = 0; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ if (api->halmac_read_efuse) { -+ for (i = 0; i < cnt; i++) { -+ status = api->halmac_read_efuse(mac, offset + i, &v); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ data[i] = v; -+ } -+ } else { -+ err = rtw_halmac_get_physical_efuse_size(d, &size); -+ if (err) -+ return -1; -+ -+ efuse = rtw_zmalloc(size); -+ if (!efuse) -+ return -1; -+ -+ err = rtw_halmac_read_physical_efuse_map(d, efuse, size); -+ if (err) -+ err = -1; -+ else -+ _rtw_memcpy(data, efuse + offset, cnt); -+ -+ rtw_mfree(efuse, size); -+ } -+ -+ return err; -+} -+ -+int rtw_halmac_write_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 i; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ if (api->halmac_write_efuse == NULL) -+ return -1; -+ -+ for (i = 0; i < cnt; i++) { -+ status = api->halmac_write_efuse(mac, offset + i, data[i]); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ } -+ -+ return 0; -+} -+ -+int rtw_halmac_get_logical_efuse_size(struct dvobj_priv *d, u32 *size) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 val; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_get_logical_efuse_size(mac, &val); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ -+ *size = val; -+ return 0; -+} -+ -+int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size, u8 *maskmap, u32 masksize) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ enum halmac_feature_id id; -+ int ret; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ id = HALMAC_FEATURE_DUMP_LOGICAL_EFUSE; -+ -+ ret = init_halmac_event(d, id, map, size); -+ if (ret) -+ return -1; -+ -+ status = api->halmac_dump_logical_efuse_map(mac, HALMAC_EFUSE_R_DRV); -+ if (HALMAC_RET_SUCCESS != status) { -+ free_halmac_event(d, id); -+ return -1; -+ } -+ -+ ret = wait_halmac_event(d, id); -+ if (ret) -+ return -1; -+ -+ if (maskmap && masksize) { -+ struct halmac_pg_efuse_info pginfo; -+ -+ pginfo.efuse_map = map; -+ pginfo.efuse_map_size = size; -+ pginfo.efuse_mask = maskmap; -+ pginfo.efuse_mask_size = masksize; -+ -+ status = api->halmac_mask_logical_efuse(mac, &pginfo); -+ if (status != HALMAC_RET_SUCCESS) -+ RTW_WARN("%s: mask logical efuse FAIL!\n", __FUNCTION__); -+ } -+ -+ return 0; -+} -+ -+int rtw_halmac_write_logical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size, u8 *maskmap, u32 masksize) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ struct halmac_pg_efuse_info pginfo; -+ enum halmac_ret_status status; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ pginfo.efuse_map = map; -+ pginfo.efuse_map_size = size; -+ pginfo.efuse_mask = maskmap; -+ pginfo.efuse_mask_size = masksize; -+ -+ status = api->halmac_pg_efuse_by_map(mac, &pginfo, HALMAC_EFUSE_R_AUTO); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ -+ return 0; -+} -+ -+int rtw_halmac_read_logical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u8 v; -+ u32 i; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ for (i = 0; i < cnt; i++) { -+ status = api->halmac_read_logical_efuse(mac, offset + i, &v); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ data[i] = v; -+ } -+ -+ return 0; -+} -+ -+int rtw_halmac_write_logical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 i; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ for (i = 0; i < cnt; i++) { -+ status = api->halmac_write_logical_efuse(mac, offset + i, data[i]); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ } -+ -+ return 0; -+} -+ -+int rtw_halmac_write_bt_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 i; -+ u8 bank = 1; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ for (i = 0; i < cnt; i++) { -+ status = api->halmac_write_efuse_bt(mac, offset + i, data[i], bank); -+ if (HALMAC_RET_SUCCESS != status) { -+ printk("%s: halmac_write_efuse_bt status = %d\n", __FUNCTION__, status); -+ return -1; -+ } -+ } -+ printk("%s: halmac_write_efuse_bt status = HALMAC_RET_SUCCESS %d\n", __FUNCTION__, status); -+ return 0; -+} -+ -+ -+int rtw_halmac_read_bt_physical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ int bank = 1; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_dump_efuse_map_bt(mac, bank, size, map); -+ if (HALMAC_RET_SUCCESS != status) { -+ printk("%s: halmac_dump_efuse_map_bt fail!\n", __FUNCTION__); -+ return -1; -+ } -+ -+ printk("%s: OK!\n", __FUNCTION__); -+ -+ return 0; -+} -+ -+static enum hal_fifo_sel _fifo_sel_drv2halmac(u8 fifo_sel) -+{ -+ switch (fifo_sel) { -+ case 0: -+ return HAL_FIFO_SEL_TX; -+ case 1: -+ return HAL_FIFO_SEL_RX; -+ case 2: -+ return HAL_FIFO_SEL_RSVD_PAGE; -+ case 3: -+ return HAL_FIFO_SEL_REPORT; -+ case 4: -+ return HAL_FIFO_SEL_LLT; -+ case 5: -+ return HAL_FIFO_SEL_RXBUF_FW; -+ } -+ -+ return HAL_FIFO_SEL_RSVD_PAGE; -+} -+ -+/*#define CONFIG_HALMAC_FIFO_DUMP*/ -+int rtw_halmac_dump_fifo(struct dvobj_priv *d, u8 fifo_sel, u32 addr, u32 size, u8 *buffer) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum hal_fifo_sel halmac_fifo_sel; -+ enum halmac_ret_status status; -+ u8 *pfifo_map = NULL; -+ u32 fifo_size = 0; -+ s8 ret = 0;/* 0:success, -1:error */ -+ u8 mem_created = _FALSE; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ if ((size != 0) && (buffer == NULL)) -+ return -1; -+ -+ halmac_fifo_sel = _fifo_sel_drv2halmac(fifo_sel); -+ -+ if ((size) && (buffer)) { -+ pfifo_map = buffer; -+ fifo_size = size; -+ } else { -+ fifo_size = api->halmac_get_fifo_size(mac, halmac_fifo_sel); -+ -+ if (fifo_size) -+ pfifo_map = rtw_zvmalloc(fifo_size); -+ if (pfifo_map == NULL) -+ return -1; -+ mem_created = _TRUE; -+ } -+ -+ status = api->halmac_dump_fifo(mac, halmac_fifo_sel, addr, fifo_size, pfifo_map); -+ if (HALMAC_RET_SUCCESS != status) { -+ ret = -1; -+ goto _exit; -+ } -+ -+#ifdef CONFIG_HALMAC_FIFO_DUMP -+ { -+ static const char * const fifo_sel_str[] = { -+ "TX", "RX", "RSVD_PAGE", "REPORT", "LLT", "RXBUF_FW" -+ }; -+ -+ RTW_INFO("%s FIFO DUMP [start_addr:0x%04x , size:%d]\n", fifo_sel_str[halmac_fifo_sel], addr, fifo_size); -+ RTW_INFO_DUMP("\n", pfifo_map, fifo_size); -+ RTW_INFO(" ==================================================\n"); -+ } -+#endif /* CONFIG_HALMAC_FIFO_DUMP */ -+ -+_exit: -+ if ((mem_created == _TRUE) && pfifo_map) -+ rtw_vmfree(pfifo_map, fifo_size); -+ -+ return ret; -+} -+ -+/* -+ * rtw_halmac_rx_agg_switch() - Switch RX aggregation function and setting -+ * @d struct dvobj_priv * -+ * @enable _FALSE/_TRUE for disable/enable RX aggregation function -+ * -+ * This function could help to on/off bus RX aggregation function, and is only -+ * useful for SDIO and USB interface. Although only "enable" flag is brough in, -+ * some setting would be taken from other places, and they are from: -+ * [DMA aggregation] -+ * struct hal_com_data.rxagg_dma_size -+ * struct hal_com_data.rxagg_dma_timeout -+ * [USB aggregation] (only use for USB interface) -+ * struct hal_com_data.rxagg_usb_size -+ * struct hal_com_data.rxagg_usb_timeout -+ * If above values of size and timeout are both 0 means driver would not -+ * control the threshold setting and leave it to HALMAC handle. -+ * -+ * From HALMAC V1_04_04, driver force the size threshold be hard limit, and the -+ * rx size can not exceed the setting. -+ * -+ * Return 0 for success, otherwise fail. -+ */ -+int rtw_halmac_rx_agg_switch(struct dvobj_priv *d, u8 enable) -+{ -+ struct _ADAPTER *adapter; -+ struct hal_com_data *hal; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ struct halmac_rxagg_cfg rxaggcfg; -+ enum halmac_ret_status status; -+ -+ -+ adapter = dvobj_get_primary_adapter(d); -+ hal = GET_HAL_DATA(adapter); -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ _rtw_memset((void *)&rxaggcfg, 0, sizeof(rxaggcfg)); -+ rxaggcfg.mode = HALMAC_RX_AGG_MODE_NONE; -+ /* -+ * Always enable size limit to avoid rx size exceed -+ * driver defined size. -+ */ -+ rxaggcfg.threshold.size_limit_en = 1; -+ -+#ifdef RTW_RX_AGGREGATION -+ if (_TRUE == enable) { -+#ifdef CONFIG_SDIO_HCI -+ rxaggcfg.mode = HALMAC_RX_AGG_MODE_DMA; -+ rxaggcfg.threshold.drv_define = 0; -+ if (hal->rxagg_dma_size || hal->rxagg_dma_timeout) { -+ rxaggcfg.threshold.drv_define = 1; -+ rxaggcfg.threshold.timeout = hal->rxagg_dma_timeout; -+ rxaggcfg.threshold.size = hal->rxagg_dma_size; -+ RTW_INFO("%s: RX aggregation threshold: " -+ "timeout=%u size=%u\n", -+ __FUNCTION__, -+ hal->rxagg_dma_timeout, -+ hal->rxagg_dma_size); -+ } -+#elif defined(CONFIG_USB_HCI) -+ switch (hal->rxagg_mode) { -+ case RX_AGG_DISABLE: -+ rxaggcfg.mode = HALMAC_RX_AGG_MODE_NONE; -+ break; -+ -+ case RX_AGG_DMA: -+ rxaggcfg.mode = HALMAC_RX_AGG_MODE_DMA; -+ if (hal->rxagg_dma_size || hal->rxagg_dma_timeout) { -+ rxaggcfg.threshold.drv_define = 1; -+ rxaggcfg.threshold.timeout = hal->rxagg_dma_timeout; -+ rxaggcfg.threshold.size = hal->rxagg_dma_size; -+ } -+ break; -+ -+ case RX_AGG_USB: -+ case RX_AGG_MIX: -+ rxaggcfg.mode = HALMAC_RX_AGG_MODE_USB; -+ if (hal->rxagg_usb_size || hal->rxagg_usb_timeout) { -+ rxaggcfg.threshold.drv_define = 1; -+ rxaggcfg.threshold.timeout = hal->rxagg_usb_timeout; -+ rxaggcfg.threshold.size = hal->rxagg_usb_size; -+ } -+ break; -+ } -+#endif /* CONFIG_USB_HCI */ -+ } -+#endif /* RTW_RX_AGGREGATION */ -+ -+ status = api->halmac_cfg_rx_aggregation(halmac, &rxaggcfg); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+} -+ -+int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pbuf, u32 size) -+{ -+ enum halmac_ret_status status = HALMAC_RET_SUCCESS; -+ struct halmac_adapter *halmac = dvobj_to_halmac(dvobj); -+ struct halmac_api *api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_dl_drv_rsvd_page(halmac, pg_offset, pbuf, size); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+} -+ -+/* -+ * Description -+ * Fill following spec info from HALMAC API: -+ * sec_cam_ent_num -+ * -+ * Return -+ * 0 Success -+ * others Fail -+ */ -+int rtw_halmac_fill_hal_spec(struct dvobj_priv *dvobj, struct hal_spec_t *spec) -+{ -+ enum halmac_ret_status status; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ u8 cam = 0; /* Security Cam Entry Number */ -+ -+ -+ halmac = dvobj_to_halmac(dvobj); -+ api = HALMAC_GET_API(halmac); -+ -+ /* Prepare data from HALMAC */ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_CAM_ENTRY_NUM, &cam); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ /* Fill data to hal_spec_t */ -+ spec->sec_cam_ent_num = cam; -+ -+ return 0; -+} -+ -+int rtw_halmac_p2pps(struct dvobj_priv *dvobj, struct hal_p2p_ps_para *pp2p_ps_para) -+{ -+ enum halmac_ret_status status = HALMAC_RET_SUCCESS; -+ struct halmac_adapter *halmac = dvobj_to_halmac(dvobj); -+ struct halmac_api *api = HALMAC_GET_API(halmac); -+ struct halmac_p2pps halmac_p2p_ps; -+ -+ (&halmac_p2p_ps)->offload_en = pp2p_ps_para->offload_en; -+ (&halmac_p2p_ps)->role = pp2p_ps_para->role; -+ (&halmac_p2p_ps)->ctwindow_en = pp2p_ps_para->ctwindow_en; -+ (&halmac_p2p_ps)->noa_en = pp2p_ps_para->noa_en; -+ (&halmac_p2p_ps)->noa_sel = pp2p_ps_para->noa_sel; -+ (&halmac_p2p_ps)->all_sta_sleep = pp2p_ps_para->all_sta_sleep; -+ (&halmac_p2p_ps)->discovery = pp2p_ps_para->discovery; -+ (&halmac_p2p_ps)->disable_close_rf = pp2p_ps_para->disable_close_rf; -+ (&halmac_p2p_ps)->p2p_port_id = _hw_port_drv2halmac(pp2p_ps_para->p2p_port_id); -+ (&halmac_p2p_ps)->p2p_group = pp2p_ps_para->p2p_group; -+ (&halmac_p2p_ps)->p2p_macid = pp2p_ps_para->p2p_macid; -+ (&halmac_p2p_ps)->ctwindow_length = pp2p_ps_para->ctwindow_length; -+ (&halmac_p2p_ps)->noa_duration_para = pp2p_ps_para->noa_duration_para; -+ (&halmac_p2p_ps)->noa_interval_para = pp2p_ps_para->noa_interval_para; -+ (&halmac_p2p_ps)->noa_start_time_para = pp2p_ps_para->noa_start_time_para; -+ (&halmac_p2p_ps)->noa_count_para = pp2p_ps_para->noa_count_para; -+ -+ status = api->halmac_p2pps(halmac, (&halmac_p2p_ps)); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+ -+} -+ -+/** -+ * rtw_halmac_iqk() - Run IQ Calibration -+ * @d: struct dvobj_priv* -+ * @clear: IQK parameters -+ * @segment: IQK parameters -+ * -+ * Process IQ Calibration(IQK). -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ enum halmac_feature_id id; -+ struct halmac_iqk_para para; -+ int ret; -+ u8 retry = 3; -+ u8 delay = 1; /* ms */ -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ id = HALMAC_FEATURE_IQK; -+ -+ ret = init_halmac_event(d, id, NULL, 0); -+ if (ret) -+ return -1; -+ -+ para.clear = clear; -+ para.segment_iqk = segment; -+ -+ do { -+ status = api->halmac_start_iqk(mac, ¶); -+ if (status != HALMAC_RET_BUSY_STATE) -+ break; -+ RTW_WARN("%s: Fail to start IQK, status is BUSY! retry=%d\n", __FUNCTION__, retry); -+ if (!retry) -+ break; -+ retry--; -+ rtw_msleep_os(delay); -+ } while (1); -+ if (status != HALMAC_RET_SUCCESS) { -+ free_halmac_event(d, id); -+ return -1; -+ } -+ -+ ret = wait_halmac_event(d, id); -+ if (ret) -+ return -1; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_dpk() - Run DP Calibration -+ * @d: struct dvobj_priv* -+ * @buf: buffer for store return value -+ * @bufsz: size of buffer -+ * -+ * Process DP Calibration(DPK). -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_dpk(struct dvobj_priv *d, u8 *buf, u32 bufsz) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ enum halmac_feature_id id; -+ int ret; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ id = HALMAC_FEATURE_DPK; -+ -+ ret = init_halmac_event(d, id, buf, bufsz); -+ if (ret) -+ return -1; -+ -+ status = api->halmac_start_dpk(mac); -+ if (status != HALMAC_RET_SUCCESS) { -+ free_halmac_event(d, id); -+ RTW_ERR("%s: Fail to start DPK (0x%x)!\n", -+ __FUNCTION__, status); -+ return -1; -+ } -+ -+ ret = wait_halmac_event(d, id); -+ if (ret) -+ return -1; -+ -+ return 0; -+} -+ -+static inline u32 _phy_parameter_val_drv2halmac(u32 val, u8 msk_en, u32 msk) -+{ -+ if (!msk_en) -+ return val; -+ -+ return (val << bitshift(msk)); -+} -+ -+static int _phy_parameter_drv2halmac(struct rtw_phy_parameter *para, struct halmac_phy_parameter_info *info) -+{ -+ if (!para || !info) -+ return -1; -+ -+ _rtw_memset(info, 0, sizeof(*info)); -+ -+ switch (para->cmd) { -+ case 0: -+ /* MAC register */ -+ switch (para->data.mac.size) { -+ case 1: -+ info->cmd_id = HALMAC_PARAMETER_CMD_MAC_W8; -+ break; -+ case 2: -+ info->cmd_id = HALMAC_PARAMETER_CMD_MAC_W16; -+ break; -+ default: -+ info->cmd_id = HALMAC_PARAMETER_CMD_MAC_W32; -+ break; -+ } -+ info->content.MAC_REG_W.value = _phy_parameter_val_drv2halmac( -+ para->data.mac.value, -+ para->data.mac.msk_en, -+ para->data.mac.msk); -+ info->content.MAC_REG_W.msk = para->data.mac.msk; -+ info->content.MAC_REG_W.offset = para->data.mac.offset; -+ info->content.MAC_REG_W.msk_en = para->data.mac.msk_en; -+ break; -+ -+ case 1: -+ /* BB register */ -+ switch (para->data.bb.size) { -+ case 1: -+ info->cmd_id = HALMAC_PARAMETER_CMD_BB_W8; -+ break; -+ case 2: -+ info->cmd_id = HALMAC_PARAMETER_CMD_BB_W16; -+ break; -+ default: -+ info->cmd_id = HALMAC_PARAMETER_CMD_BB_W32; -+ break; -+ } -+ info->content.BB_REG_W.value = _phy_parameter_val_drv2halmac( -+ para->data.bb.value, -+ para->data.bb.msk_en, -+ para->data.bb.msk); -+ info->content.BB_REG_W.msk = para->data.bb.msk; -+ info->content.BB_REG_W.offset = para->data.bb.offset; -+ info->content.BB_REG_W.msk_en = para->data.bb.msk_en; -+ break; -+ -+ case 2: -+ /* RF register */ -+ info->cmd_id = HALMAC_PARAMETER_CMD_RF_W; -+ info->content.RF_REG_W.value = _phy_parameter_val_drv2halmac( -+ para->data.rf.value, -+ para->data.rf.msk_en, -+ para->data.rf.msk); -+ info->content.RF_REG_W.msk = para->data.rf.msk; -+ info->content.RF_REG_W.offset = para->data.rf.offset; -+ info->content.RF_REG_W.msk_en = para->data.rf.msk_en; -+ info->content.RF_REG_W.rf_path = para->data.rf.path; -+ break; -+ -+ case 3: -+ /* Delay register */ -+ if (para->data.delay.unit == 0) -+ info->cmd_id = HALMAC_PARAMETER_CMD_DELAY_US; -+ else -+ info->cmd_id = HALMAC_PARAMETER_CMD_DELAY_MS; -+ info->content.DELAY_TIME.delay_time = para->data.delay.value; -+ break; -+ -+ case 0xFF: -+ /* Latest(End) command */ -+ info->cmd_id = HALMAC_PARAMETER_CMD_END; -+ break; -+ -+ default: -+ return -1; -+ } -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_cfg_phy_para() - Register(Phy parameter) configuration -+ * @d: struct dvobj_priv* -+ * @para: phy parameter -+ * -+ * Configure registers by firmware using H2C/C2H mechanism. -+ * The latest command should be para->cmd==0xFF(End command) to finish all -+ * processes. -+ * -+ * Return: 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_cfg_phy_para(struct dvobj_priv *d, struct rtw_phy_parameter *para) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ enum halmac_feature_id id; -+ struct halmac_phy_parameter_info info; -+ u8 full_fifo; -+ int err, ret; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ id = HALMAC_FEATURE_CFG_PARA; -+ full_fifo = 1; /* ToDo: How to deciede? */ -+ ret = 0; -+ -+ err = _phy_parameter_drv2halmac(para, &info); -+ if (err) -+ return -1; -+ -+ err = init_halmac_event(d, id, NULL, 0); -+ if (err) -+ return -1; -+ -+ status = api->halmac_cfg_parameter(mac, &info, full_fifo); -+ if (info.cmd_id == HALMAC_PARAMETER_CMD_END) { -+ if (status == HALMAC_RET_SUCCESS) { -+ err = wait_halmac_event(d, id); -+ if (err) -+ ret = -1; -+ } else { -+ free_halmac_event(d, id); -+ ret = -1; -+ RTW_ERR("%s: Fail to send END of cfg parameter, status is 0x%x!\n", __FUNCTION__, status); -+ } -+ } else { -+ if (status == HALMAC_RET_PARA_SENDING) { -+ err = wait_halmac_event(d, id); -+ if (err) -+ ret = -1; -+ } else { -+ free_halmac_event(d, id); -+ if (status != HALMAC_RET_SUCCESS) { -+ ret = -1; -+ RTW_ERR("%s: Fail to cfg parameter, status is 0x%x!\n", __FUNCTION__, status); -+ } -+ } -+ } -+ -+ return ret; -+} -+ -+static enum halmac_wlled_mode _led_mode_drv2halmac(u8 drv_mode) -+{ -+ enum halmac_wlled_mode halmac_mode; -+ -+ -+ switch (drv_mode) { -+ case 1: -+ halmac_mode = HALMAC_WLLED_MODE_TX; -+ break; -+ case 2: -+ halmac_mode = HALMAC_WLLED_MODE_RX; -+ break; -+ case 3: -+ halmac_mode = HALMAC_WLLED_MODE_SW_CTRL; -+ break; -+ case 0: -+ default: -+ halmac_mode = HALMAC_WLLED_MODE_TRX; -+ break; -+ } -+ -+ return halmac_mode; -+} -+ -+/** -+ * rtw_halmac_led_cfg() - Configure Hardware LED Mode -+ * @d: struct dvobj_priv* -+ * @enable: enable or disable LED function -+ * 0: disable -+ * 1: enable -+ * @mode: WLan LED mode (valid when enable==1) -+ * 0: Blink when TX(transmit packet) and RX(receive packet) -+ * 1: Blink when TX only -+ * 2: Blink when RX only -+ * 3: Software control -+ * -+ * Configure hardware WLan LED mode. -+ * If want to change LED mode after enabled, need to disable LED first and -+ * enable again to set new mode. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_led_cfg(struct dvobj_priv *d, u8 enable, u8 mode) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_wlled_mode led_mode; -+ enum halmac_ret_status status; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ if (enable) { -+ status = api->halmac_pinmux_set_func(halmac, -+ HALMAC_GPIO_FUNC_WL_LED); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: pinmux set fail!(0x%x)\n", -+ __FUNCTION__, status); -+ return -1; -+ } -+ -+ led_mode = _led_mode_drv2halmac(mode); -+ status = api->halmac_pinmux_wl_led_mode(halmac, led_mode); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: mode set fail!(0x%x)\n", -+ __FUNCTION__, status); -+ return -1; -+ } -+ } else { -+ /* Change LED to software control and turn off */ -+ api->halmac_pinmux_wl_led_mode(halmac, -+ HALMAC_WLLED_MODE_SW_CTRL); -+ api->halmac_pinmux_wl_led_sw_ctrl(halmac, 0); -+ -+ status = api->halmac_pinmux_free_func(halmac, -+ HALMAC_GPIO_FUNC_WL_LED); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: pinmux free fail!(0x%x)\n", -+ __FUNCTION__, status); -+ return -1; -+ } -+ } -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_led_switch() - Turn Hardware LED on/off -+ * @d: struct dvobj_priv* -+ * @on: LED light or not -+ * 0: Off -+ * 1: On(Light) -+ * -+ * Turn Hardware WLan LED On/Off. -+ * Before use this function, user should call rtw_halmac_led_ctrl() to switch -+ * mode to "software control(3)" first, otherwise control would fail. -+ * The interval between on and off must be longer than 1 ms, or the LED would -+ * keep light or dark only. -+ * Ex. Turn off LED at first, turn on after 0.5ms and turn off again after -+ * 0.5ms. The LED during this flow will only keep dark, and miss the turn on -+ * operation between two turn off operations. -+ */ -+void rtw_halmac_led_switch(struct dvobj_priv *d, u8 on) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ api->halmac_pinmux_wl_led_sw_ctrl(halmac, on); -+} -+ -+static int _gpio_cfg(struct dvobj_priv *d, enum halmac_gpio_func gpio, u8 enable) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ if (enable) { -+ status = api->halmac_pinmux_set_func(halmac, gpio); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: pinmux set GPIO(%d) fail!(0x%x)\n", -+ __FUNCTION__, gpio, status); -+ return -1; -+ } -+ } else { -+ status = api->halmac_pinmux_free_func(halmac, gpio); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: pinmux free GPIO(%d) fail!(0x%x)\n", -+ __FUNCTION__, gpio, status); -+ return -1; -+ } -+ } -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_bt_wake_cfg() - Configure BT wake host function -+ * @d: struct dvobj_priv* -+ * @enable: enable or disable BT wake host function -+ * 0: disable -+ * 1: enable -+ * -+ * Configure pinmux to allow BT to control BT wake host pin. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_bt_wake_cfg(struct dvobj_priv *d, u8 enable) -+{ -+ return _gpio_cfg(d, HALMAC_GPIO_FUNC_BT_HOST_WAKE1, enable); -+} -+ -+static enum halmac_gpio_func _gpio_to_func_for_rfe_ctrl(u8 gpio) -+{ -+ enum halmac_gpio_func f = HALMAC_GPIO_FUNC_UNDEFINE; -+ -+ -+#ifdef CONFIG_RTL8822C -+ switch (gpio) { -+ case 1: -+ f = HALMAC_GPIO_FUNC_ANTSWB; -+ break; -+ case 2: -+ f = HALMAC_GPIO_FUNC_S1_TRSW; -+ break; -+ case 3: -+ f = HALMAC_GPIO_FUNC_S0_TRSW; -+ break; -+ case 6: -+ f = HALMAC_GPIO_FUNC_S0_PAPE; -+ break; -+ case 7: -+ f = HALMAC_GPIO_FUNC_S0_TRSWB; -+ break; -+ case 13: -+ f = HALMAC_GPIO_FUNC_ANTSW; -+ break; -+ } -+#endif /* CONFIG_RTL8822C */ -+ -+ return f; -+} -+ -+/** -+ * rtw_halmac_rfe_ctrl_cfg() - Configure RFE control GPIO -+ * @d: struct dvobj_priv* -+ * @gpio: gpio number -+ * -+ * Configure pinmux to enable RFE control GPIO. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_rfe_ctrl_cfg(struct dvobj_priv *d, u8 gpio) -+{ -+ enum halmac_gpio_func f; -+ -+ -+ f = _gpio_to_func_for_rfe_ctrl(gpio); -+ if (f == HALMAC_GPIO_FUNC_UNDEFINE) -+ return -1; -+ return _gpio_cfg(d, f, 1); -+} -+ -+#ifdef CONFIG_PNO_SUPPORT -+/** -+ * _halmac_scanoffload() - Switch channel by firmware during scanning -+ * @d: struct dvobj_priv* -+ * @enable: 1: enable, 0: disable -+ * @nlo: 1: nlo mode (no c2h event), 0: normal mode -+ * @ssid: ssid of probe request -+ * @ssid_len: ssid length -+ * -+ * Switch Channel and Send Porbe Request Offloaded by FW -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+static int _halmac_scanoffload(struct dvobj_priv *d, u32 enable, u8 nlo, -+ u8 *ssid, u8 ssid_len) -+{ -+ struct _ADAPTER *adapter; -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ struct halmac_ch_info ch_info; -+ struct halmac_ch_switch_option cs_option; -+ struct mlme_ext_priv *pmlmeext; -+ enum halmac_feature_id id_update, id_ch_sw; -+ struct halmac_indicator *indicator, *tbl; -+ -+ int err = 0; -+ u8 probereq[64]; -+ u32 len = 0; -+ int i = 0; -+ struct pno_ssid pnossid; -+ struct rf_ctl_t *rfctl = NULL; -+ struct _RT_CHANNEL_INFO *ch_set; -+ -+ -+ tbl = d->hmpriv.indicator; -+ adapter = dvobj_get_primary_adapter(d); -+ mac = dvobj_to_halmac(d); -+ if (!mac) -+ return -1; -+ api = HALMAC_GET_API(mac); -+ id_update = HALMAC_FEATURE_UPDATE_PACKET; -+ id_ch_sw = HALMAC_FEATURE_CHANNEL_SWITCH; -+ pmlmeext = &(adapter->mlmeextpriv); -+ rfctl = adapter_to_rfctl(adapter); -+ ch_set = rfctl->channel_set; -+ -+ RTW_INFO("%s: %s scanoffload, mode: %s\n", -+ __FUNCTION__, enable?"Enable":"Disable", -+ nlo?"PNO/NLO":"Normal"); -+ -+ if (enable) { -+ _rtw_memset(probereq, 0, sizeof(probereq)); -+ -+ _rtw_memset(&pnossid, 0, sizeof(pnossid)); -+ if (ssid) { -+ if (ssid_len > sizeof(pnossid.SSID)) { -+ RTW_ERR("%s: SSID length(%d) is too long(>%d)!!\n", -+ __FUNCTION__, ssid_len, sizeof(pnossid.SSID)); -+ return -1; -+ } -+ -+ pnossid.SSID_len = ssid_len; -+ _rtw_memcpy(pnossid.SSID, ssid, ssid_len); -+ } -+ -+ rtw_hal_construct_ProbeReq(adapter, probereq, &len, &pnossid); -+ -+ if (!nlo) { -+ err = init_halmac_event(d, id_update, NULL, 0); -+ if (err) -+ return -1; -+ } -+ -+ status = api->halmac_update_packet(mac, HALMAC_PACKET_PROBE_REQ, -+ probereq, len); -+ if (status != HALMAC_RET_SUCCESS) { -+ if (!nlo) -+ free_halmac_event(d, id_update); -+ RTW_ERR("%s: halmac_update_packet FAIL(%d)!!\n", -+ __FUNCTION__, status); -+ return -1; -+ } -+ -+ if (!nlo) { -+ err = wait_halmac_event(d, id_update); -+ if (err) -+ RTW_ERR("%s: wait update packet FAIL(%d)!!\n", -+ __FUNCTION__, err); -+ } -+ -+ api->halmac_clear_ch_info(mac); -+ -+ for (i = 0; i < rfctl->max_chan_nums && ch_set[i].ChannelNum != 0; i++) { -+ _rtw_memset(&ch_info, 0, sizeof(ch_info)); -+ ch_info.extra_info = 0; -+ ch_info.channel = ch_set[i].ChannelNum; -+ ch_info.bw = HALMAC_BW_20; -+ ch_info.pri_ch_idx = HALMAC_CH_IDX_1; -+ ch_info.action_id = HALMAC_CS_ACTIVE_SCAN; -+ ch_info.timeout = 1; -+ status = api->halmac_add_ch_info(mac, &ch_info); -+ if (status != HALMAC_RET_SUCCESS) { -+ RTW_ERR("%s: add_ch_info FAIL(%d)!!\n", -+ __FUNCTION__, status); -+ return -1; -+ } -+ } -+ -+ /* set channel switch option */ -+ _rtw_memset(&cs_option, 0, sizeof(cs_option)); -+ cs_option.dest_bw = HALMAC_BW_20; -+ cs_option.periodic_option = HALMAC_CS_PERIODIC_2_PHASE; -+ cs_option.dest_pri_ch_idx = HALMAC_CH_IDX_UNDEFINE; -+ cs_option.tsf_low = 0; -+ cs_option.switch_en = 1; -+ cs_option.dest_ch_en = 1; -+ cs_option.absolute_time_en = 0; -+ cs_option.dest_ch = 1; -+ -+ cs_option.normal_period = 5; -+ cs_option.normal_period_sel = 0; -+ cs_option.normal_cycle = 10; -+ -+ cs_option.phase_2_period = 1; -+ cs_option.phase_2_period_sel = 1; -+ -+ /* nlo is for wow fw, 1: no c2h response */ -+ cs_option.nlo_en = nlo; -+ -+ if (!nlo) { -+ err = init_halmac_event(d, id_ch_sw, NULL, 0); -+ if (err) -+ return -1; -+ } -+ -+ status = api->halmac_ctrl_ch_switch(mac, &cs_option); -+ if (status != HALMAC_RET_SUCCESS) { -+ if (!nlo) -+ free_halmac_event(d, id_ch_sw); -+ RTW_ERR("%s: halmac_ctrl_ch_switch FAIL(%d)!!\n", -+ __FUNCTION__, status); -+ return -1; -+ } -+ -+ if (!nlo) { -+ err = wait_halmac_event(d, id_ch_sw); -+ if (err) -+ RTW_ERR("%s: wait ctrl_ch_switch FAIL(%d)!!\n", -+ __FUNCTION__, err); -+ } -+ } else { -+ api->halmac_clear_ch_info(mac); -+ -+ _rtw_memset(&cs_option, 0, sizeof(cs_option)); -+ cs_option.switch_en = 0; -+ -+ if (!nlo) { -+ err = init_halmac_event(d, id_ch_sw, NULL, 0); -+ if (err) -+ return -1; -+ } -+ -+ status = api->halmac_ctrl_ch_switch(mac, &cs_option); -+ if (status != HALMAC_RET_SUCCESS) { -+ if (!nlo) -+ free_halmac_event(d, id_ch_sw); -+ RTW_ERR("%s: halmac_ctrl_ch_switch FAIL(%d)!!\n", -+ __FUNCTION__, status); -+ return -1; -+ } -+ -+ if (!nlo) { -+ err = wait_halmac_event(d, id_ch_sw); -+ if (err) -+ RTW_ERR("%s: wait ctrl_ch_switch FAIL(%d)!!\n", -+ __FUNCTION__, err); -+ } -+ } -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_pno_scanoffload() - Control firmware scan AP function for PNO -+ * @d: struct dvobj_priv* -+ * @enable: 1: enable, 0: disable -+ * -+ * Switch firmware scan AP function for PNO(prefer network offload) or -+ * NLO(network list offload). -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_pno_scanoffload(struct dvobj_priv *d, u32 enable) -+{ -+ return _halmac_scanoffload(d, enable, 1, NULL, 0); -+} -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+#ifdef CONFIG_SDIO_HCI -+ -+/** -+ * rtw_halmac_preinit_sdio_io_indirect() - Enable indirect I/O or not -+ * @d: struct dvobj_priv* -+ * @enable: true: enable, false: disable -+ * -+ * Enable register access using direct I/O or indirect. This function should be -+ * called before rtw_halmac_init_adapter(), and the life cycle is the same as -+ * driver until removing driver. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_preinit_sdio_io_indirect(struct dvobj_priv *d, bool enable) -+{ -+ struct halmac_adapter *halmac; -+ struct halmacpriv *priv; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ if (halmac) { -+ RTW_WARN("%s: illegal operation! " -+ "preinit function only could be called before init!\n", -+ __FUNCTION__); -+ return -1; -+ } -+ -+ priv = &d->hmpriv; -+ priv->sdio_io_indir = (enable ? 1 : 2); -+ -+ return 0; -+} -+ -+/* -+ * Description: -+ * Update queue allocated page number to driver -+ * -+ * Parameter: -+ * d pointer to struct dvobj_priv of driver -+ * -+ * Return: -+ * 0 Success, "page" is valid. -+ * others Fail, "page" is invalid. -+ */ -+int rtw_halmac_query_tx_page_num(struct dvobj_priv *d) -+{ -+ PADAPTER adapter; -+ struct halmacpriv *hmpriv; -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ struct halmac_rqpn_map rqpn; -+ enum halmac_dma_mapping dmaqueue; -+ struct halmac_txff_allocation fifosize; -+ enum halmac_ret_status status; -+ u8 i; -+ -+ -+ adapter = dvobj_get_primary_adapter(d); -+ hmpriv = &d->hmpriv; -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ _rtw_memset((void *)&rqpn, 0, sizeof(rqpn)); -+ _rtw_memset((void *)&fifosize, 0, sizeof(fifosize)); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_RQPN_MAPPING, &rqpn); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_TXFF_ALLOCATION, &fifosize); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ for (i = 0; i < HW_QUEUE_ENTRY; i++) { -+ hmpriv->txpage[i] = 0; -+ -+ /* Driver index mapping to HALMAC DMA queue */ -+ dmaqueue = HALMAC_DMA_MAPPING_UNDEFINE; -+ switch (i) { -+ case VO_QUEUE_INX: -+ dmaqueue = rqpn.dma_map_vo; -+ break; -+ case VI_QUEUE_INX: -+ dmaqueue = rqpn.dma_map_vi; -+ break; -+ case BE_QUEUE_INX: -+ dmaqueue = rqpn.dma_map_be; -+ break; -+ case BK_QUEUE_INX: -+ dmaqueue = rqpn.dma_map_bk; -+ break; -+ case MGT_QUEUE_INX: -+ dmaqueue = rqpn.dma_map_mg; -+ break; -+ case HIGH_QUEUE_INX: -+ dmaqueue = rqpn.dma_map_hi; -+ break; -+ case BCN_QUEUE_INX: -+ case TXCMD_QUEUE_INX: -+ /* Unlimited */ -+ hmpriv->txpage[i] = 0xFFFF; -+ continue; -+ } -+ -+ switch (dmaqueue) { -+ case HALMAC_DMA_MAPPING_EXTRA: -+ hmpriv->txpage[i] = fifosize.extra_queue_pg_num; -+ break; -+ case HALMAC_DMA_MAPPING_LOW: -+ hmpriv->txpage[i] = fifosize.low_queue_pg_num; -+ break; -+ case HALMAC_DMA_MAPPING_NORMAL: -+ hmpriv->txpage[i] = fifosize.normal_queue_pg_num; -+ break; -+ case HALMAC_DMA_MAPPING_HIGH: -+ hmpriv->txpage[i] = fifosize.high_queue_pg_num; -+ break; -+ case HALMAC_DMA_MAPPING_UNDEFINE: -+ break; -+ } -+ hmpriv->txpage[i] += fifosize.pub_queue_pg_num; -+ } -+ -+ return 0; -+} -+ -+/* -+ * Description: -+ * Get specific queue allocated page number -+ * -+ * Parameter: -+ * d pointer to struct dvobj_priv of driver -+ * queue target queue to query, VO/VI/BE/BK/.../TXCMD_QUEUE_INX -+ * page return allocated page number -+ * -+ * Return: -+ * 0 Success, "page" is valid. -+ * others Fail, "page" is invalid. -+ */ -+int rtw_halmac_get_tx_queue_page_num(struct dvobj_priv *d, u8 queue, u32 *page) -+{ -+ *page = 0; -+ if (queue < HW_QUEUE_ENTRY) -+ *page = d->hmpriv.txpage[queue]; -+ -+ return 0; -+} -+ -+/* -+ * Return: -+ * address for SDIO command -+ */ -+u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *d, u8 *desc, u32 size) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u32 addr; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_get_sdio_tx_addr(mac, desc, size, &addr); -+ if (HALMAC_RET_SUCCESS != status) -+ return 0; -+ -+ return addr; -+} -+ -+int rtw_halmac_sdio_tx_allowed(struct dvobj_priv *d, u8 *buf, u32 size) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_tx_allowed_sdio(mac, buf, size); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ -+ return 0; -+} -+ -+u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *d, u8 *seq) -+{ -+ u8 id; -+ -+#define RTW_SDIO_ADDR_RX_RX0FF_PRFIX 0x0E000 -+#define RTW_SDIO_ADDR_RX_RX0FF_GEN(a) (RTW_SDIO_ADDR_RX_RX0FF_PRFIX|(a&0x3)) -+ -+ id = *seq; -+ (*seq)++; -+ return RTW_SDIO_ADDR_RX_RX0FF_GEN(id); -+} -+ -+int rtw_halmac_sdio_set_tx_format(struct dvobj_priv *d, enum halmac_sdio_tx_format format) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_set_hw_value(mac, HALMAC_HW_SDIO_TX_FORMAT, &format); -+ if (HALMAC_RET_SUCCESS != status) -+ return -1; -+ -+ return 0; -+} -+#endif /* CONFIG_SDIO_HCI */ -+ -+#ifdef CONFIG_USB_HCI -+u8 rtw_halmac_usb_get_bulkout_id(struct dvobj_priv *d, u8 *buf, u32 size) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u8 bulkout_id; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_get_usb_bulkout_id(mac, buf, size, &bulkout_id); -+ if (HALMAC_RET_SUCCESS != status) -+ return 0; -+ -+ return bulkout_id; -+} -+ -+/** -+ * rtw_halmac_usb_get_txagg_desc_num() - MAX descriptor number in one bulk for TX -+ * @d: struct dvobj_priv* -+ * @size: TX FIFO size, unit is byte. -+ * -+ * Get MAX descriptor number in one bulk out from HALMAC. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_usb_get_txagg_desc_num(struct dvobj_priv *d, u8 *num) -+{ -+ struct halmac_adapter *halmac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ u8 val = 0; -+ -+ -+ halmac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(halmac); -+ -+ status = api->halmac_get_hw_value(halmac, HALMAC_HW_USB_TXAGG_DESC_NUM, &val); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ *num = val; -+ -+ return 0; -+} -+ -+static inline enum halmac_usb_mode _usb_mode_drv2halmac(enum RTW_USB_SPEED usb_mode) -+{ -+ enum halmac_usb_mode halmac_usb_mode = HALMAC_USB_MODE_U2; -+ -+ switch (usb_mode) { -+ case RTW_USB_SPEED_2: -+ halmac_usb_mode = HALMAC_USB_MODE_U2; -+ break; -+ case RTW_USB_SPEED_3: -+ halmac_usb_mode = HALMAC_USB_MODE_U3; -+ break; -+ default: -+ halmac_usb_mode = HALMAC_USB_MODE_U2; -+ break; -+ } -+ -+ return halmac_usb_mode; -+} -+ -+u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode) -+{ -+ PADAPTER adapter; -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ enum halmac_usb_mode halmac_usb_mode; -+ -+ adapter = dvobj_get_primary_adapter(d); -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ halmac_usb_mode = _usb_mode_drv2halmac(usb_mode); -+ status = api->halmac_set_hw_value(mac, HALMAC_HW_USB_MODE, (void *)&halmac_usb_mode); -+ -+ if (HALMAC_RET_SUCCESS != status) -+ return _FAIL; -+ -+ return _SUCCESS; -+} -+#endif /* CONFIG_USB_HCI */ -+ -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+int rtw_halmac_bf_add_mu_bfer(struct dvobj_priv *d, u16 paid, u16 csi_para, -+ u16 my_aid, enum halmac_csi_seg_len sel, u8 *addr) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ struct halmac_mu_bfer_init_para param; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ _rtw_memset(¶m, 0, sizeof(param)); -+ param.paid = paid; -+ param.csi_para = csi_para; -+ param.my_aid = my_aid; -+ param.csi_length_sel = sel; -+ _rtw_memcpy(param.bfer_address.addr, addr, 6); -+ -+ status = api->halmac_mu_bfer_entry_init(mac, ¶m); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+} -+ -+int rtw_halmac_bf_del_mu_bfer(struct dvobj_priv *d) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_mu_bfer_entry_del(mac); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+} -+ -+ -+int rtw_halmac_bf_cfg_sounding(struct dvobj_priv *d, -+ enum halmac_snd_role role, enum halmac_data_rate rate) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_cfg_sounding(mac, role, rate); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+} -+ -+int rtw_halmac_bf_del_sounding(struct dvobj_priv *d, -+ enum halmac_snd_role role) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_del_sounding(mac, role); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+} -+ -+/** -+ * rtw_halmac_bf_cfg_csi_rate() - Config data rate for CSI report frame by RSSI -+ * @d: struct dvobj_priv* -+ * @rssi: RSSI vlaue, unit is percentage (0~100). -+ * @current_rate: Current CSI frame rate -+ * Valid value example -+ * 0 CCK 1M -+ * 3 CCK 11M -+ * 4 OFDM 6M -+ * and so on -+ * @fixrate_en: Enable to fix CSI frame in VHT rate, otherwise legacy OFDM rate. -+ * The value "0" for disable, otheriwse enable. -+ * @new_rate: Return new data rate, and value range is the same as -+ * current_rate -+ * @bmp_ofdm54: Return to suggest enabling OFDM 54M for CSI report frame or not, -+ * The valid values and meanings are: -+ * 0x00 disable -+ * 0x01 enable -+ * 0xFF Keep current setting -+ * -+ * According RSSI to config data rate for CSI report frame of Beamforming. -+ * -+ * Return 0 for OK, otherwise fail. -+ */ -+int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d, u8 rssi, -+ u8 current_rate, u8 fixrate_en, u8 *new_rate, -+ u8 *bmp_ofdm54) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ status = api->halmac_cfg_csi_rate(mac, -+ rssi, current_rate, fixrate_en, new_rate, -+ bmp_ofdm54); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+} -+ -+int rtw_halmac_bf_cfg_mu_mimo(struct dvobj_priv *d, enum halmac_snd_role role, -+ u8 *sounding_sts, u16 grouping_bitmap, u8 mu_tx_en, -+ u32 *given_gid_tab, u32 *given_user_pos) -+{ -+ struct halmac_adapter *mac; -+ struct halmac_api *api; -+ enum halmac_ret_status status; -+ struct halmac_cfg_mumimo_para param; -+ -+ -+ mac = dvobj_to_halmac(d); -+ api = HALMAC_GET_API(mac); -+ -+ _rtw_memset(¶m, 0, sizeof(param)); -+ -+ param.role = role; -+ param.grouping_bitmap = grouping_bitmap; -+ param.mu_tx_en = mu_tx_en; -+ -+ if (sounding_sts) -+ _rtw_memcpy(param.sounding_sts, sounding_sts, 6); -+ -+ if (given_gid_tab) -+ _rtw_memcpy(param.given_gid_tab, given_gid_tab, 8); -+ -+ if (given_user_pos) -+ _rtw_memcpy(param.given_user_pos, given_user_pos, 16); -+ -+ status = api->halmac_cfg_mumimo(mac, ¶m); -+ if (status != HALMAC_RET_SUCCESS) -+ return -1; -+ -+ return 0; -+} -+ -+#endif /* RTW_BEAMFORMING_VERSION_2 */ -+#endif /* CONFIG_BEAMFORMING */ -diff --git a/drivers/staging/rtl8723cs/hal/hal_halmac.h b/drivers/staging/rtl8723cs/hal/hal_halmac.h -new file mode 100644 -index 000000000000..73882267aa9b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_halmac.h -@@ -0,0 +1,252 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _HAL_HALMAC_H_ -+#define _HAL_HALMAC_H_ -+ -+#include /* adapter_to_dvobj(), struct intf_hdl and etc. */ -+#include /* struct hal_spec_t */ -+#include "halmac/halmac_api.h" /* struct halmac_adapter* and etc. */ -+ -+/* HALMAC Definition for Driver */ -+#define RTW_HALMAC_H2C_MAX_SIZE 8 -+#define RTW_HALMAC_BA_SSN_RPT_SIZE 4 -+ -+#define dvobj_set_halmac(d, mac) ((d)->halmac = (mac)) -+#define dvobj_to_halmac(d) ((struct halmac_adapter *)((d)->halmac)) -+#define adapter_to_halmac(p) dvobj_to_halmac(adapter_to_dvobj(p)) -+ -+/* for H2C cmd */ -+#define MAX_H2C_BOX_NUMS 4 -+#define MESSAGE_BOX_SIZE 4 -+#define EX_MESSAGE_BOX_SIZE 4 -+ -+typedef enum _RTW_HALMAC_MODE { -+ RTW_HALMAC_MODE_NORMAL, -+ RTW_HALMAC_MODE_WIFI_TEST, -+} RTW_HALMAC_MODE; -+ -+union rtw_phy_para_data { -+ struct _mac { -+ u32 value; /* value to be set in bit mask(msk) */ -+ u32 msk; /* bit mask */ -+ u16 offset; /* address */ -+ u8 msk_en; /* 0/1 for msk invalid/valid */ -+ u8 size; /* Unit is bytes, and value should be 1/2/4 */ -+ } mac; -+ struct _bb { -+ u32 value; -+ u32 msk; -+ u16 offset; -+ u8 msk_en; -+ u8 size; -+ } bb; -+ struct _rf { -+ u32 value; -+ u32 msk; -+ u8 offset; -+ u8 msk_en; -+ /* -+ * 0: path A -+ * 1: path B -+ * 2: path C -+ * 3: path D -+ */ -+ u8 path; -+ } rf; -+ struct _delay { -+ /* -+ * 0: microsecond (us) -+ * 1: millisecond (ms) -+ */ -+ u8 unit; -+ u16 value; -+ } delay; -+}; -+ -+struct rtw_phy_parameter { -+ /* -+ * 0: MAC register -+ * 1: BB register -+ * 2: RF register -+ * 3: Delay -+ * 0xFF: Latest(End) command -+ */ -+ u8 cmd; -+ union rtw_phy_para_data data; -+}; -+ -+struct rtw_halmac_bcn_ctrl { -+ u8 rx_bssid_fit:1; /* 0:HW handle beacon, 1:ignore */ -+ u8 txbcn_rpt:1; /* Enable TXBCN report in ad hoc and AP mode */ -+ u8 tsf_update:1; /* Update TSF when beacon or probe response */ -+ u8 enable_bcn:1; /* Enable beacon related functions */ -+ u8 rxbcn_rpt:1; /* Enable RXBCNOK report */ -+ u8 p2p_ctwin:1; /* Enable P2P CTN WINDOWS function */ -+ u8 p2p_bcn_area:1; /* Enable P2P BCN area on function */ -+}; -+ -+extern struct halmac_platform_api rtw_halmac_platform_api; -+ -+/* HALMAC API for Driver(HAL) */ -+u8 rtw_halmac_read8(struct intf_hdl *, u32 addr); -+u16 rtw_halmac_read16(struct intf_hdl *, u32 addr); -+u32 rtw_halmac_read32(struct intf_hdl *, u32 addr); -+void rtw_halmac_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+u8 rtw_halmac_iread8(struct intf_hdl *pintfhdl, u32 addr); -+u16 rtw_halmac_iread16(struct intf_hdl *pintfhdl, u32 addr); -+u32 rtw_halmac_iread32(struct intf_hdl *pintfhdl, u32 addr); -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+int rtw_halmac_write8(struct intf_hdl *, u32 addr, u8 value); -+int rtw_halmac_write16(struct intf_hdl *, u32 addr, u16 value); -+int rtw_halmac_write32(struct intf_hdl *, u32 addr, u32 value); -+ -+/* Software Information */ -+void rtw_halmac_get_version(char *str, u32 len); -+ -+/* Software setting before Initialization */ -+int rtw_halmac_preinit_sdio_io_indirect(struct dvobj_priv *d, bool enable); -+ -+/* Software Initialization */ -+int rtw_halmac_init_adapter(struct dvobj_priv *d, struct halmac_platform_api *pf_api); -+int rtw_halmac_deinit_adapter(struct dvobj_priv *); -+ -+/* Get operations */ -+int rtw_halmac_get_hw_value(struct dvobj_priv *d, enum halmac_hw_id hw_id, void *pvalue); -+int rtw_halmac_get_tx_fifo_size(struct dvobj_priv *d, u32 *size); -+int rtw_halmac_get_rx_fifo_size(struct dvobj_priv *d, u32 *size); -+int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *d, u16 *bndy); -+int rtw_halmac_get_page_size(struct dvobj_priv *d, u32 *size); -+int rtw_halmac_get_tx_agg_align_size(struct dvobj_priv *d, u16 *size); -+int rtw_halmac_get_rx_agg_align_size(struct dvobj_priv *d, u8 *size); -+int rtw_halmac_get_rx_drv_info_sz(struct dvobj_priv *, u8 *sz); -+int rtw_halmac_get_tx_desc_size(struct dvobj_priv *d, u32 *size); -+int rtw_halmac_get_rx_desc_size(struct dvobj_priv *d, u32 *size); -+int rtw_halmac_get_tx_dma_ch_map(struct dvobj_priv *d, u8 *dma_ch_map, u8 map_size); -+int rtw_halmac_get_ori_h2c_size(struct dvobj_priv *d, u32 *size); -+int rtw_halmac_get_oqt_size(struct dvobj_priv *d, u8 *size); -+int rtw_halmac_get_ac_queue_number(struct dvobj_priv *d, u8 *num); -+int rtw_halmac_get_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr); -+int rtw_halmac_get_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 *type); -+int rtw_halmac_get_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, struct rtw_halmac_bcn_ctrl *bcn_ctrl); -+/*int rtw_halmac_get_wow_reason(struct dvobj_priv *, u8 *reason);*/ -+ -+/* Set operations */ -+int rtw_halmac_config_rx_info(struct dvobj_priv *d, enum halmac_drv_info info); -+int rtw_halmac_set_max_dl_fw_size(struct dvobj_priv *d, u32 size); -+int rtw_halmac_set_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr); -+int rtw_halmac_set_bssid(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr); -+int rtw_halmac_set_tx_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr); -+int rtw_halmac_set_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 type); -+int rtw_halmac_reset_tsf(struct dvobj_priv *d, enum _hw_port hwport); -+int rtw_halmac_set_bcn_interval(struct dvobj_priv *d, enum _hw_port hwport, u32 space); -+int rtw_halmac_set_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, struct rtw_halmac_bcn_ctrl *bcn_ctrl); -+int rtw_halmac_set_aid(struct dvobj_priv *d, enum _hw_port hwport, u16 aid); -+int rtw_halmac_set_bandwidth(struct dvobj_priv *d, u8 channel, u8 pri_ch_idx, u8 bw); -+int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop); -+int rtw_halmac_set_rts_full_bw(struct dvobj_priv *d, u8 enable); -+ -+/* Functions */ -+int rtw_halmac_poweron(struct dvobj_priv *); -+int rtw_halmac_poweroff(struct dvobj_priv *); -+int rtw_halmac_init_hal(struct dvobj_priv *); -+int rtw_halmac_init_hal_fw(struct dvobj_priv *, u8 *fw, u32 fwsize); -+int rtw_halmac_init_hal_fw_file(struct dvobj_priv *, u8 *fwpath); -+int rtw_halmac_deinit_hal(struct dvobj_priv *); -+int rtw_halmac_self_verify(struct dvobj_priv *); -+int rtw_halmac_txfifo_wait_empty(struct dvobj_priv *d, u32 timeout); -+int rtw_halmac_dlfw(struct dvobj_priv *, u8 *fw, u32 fwsize); -+int rtw_halmac_dlfw_from_file(struct dvobj_priv *, u8 *fwpath); -+int rtw_halmac_dlfw_mem(struct dvobj_priv *d, u8 *fw, u32 fwsize, enum fw_mem mem); -+int rtw_halmac_dlfw_mem_from_file(struct dvobj_priv *d, u8 *fwpath, enum fw_mem mem); -+int rtw_halmac_phy_power_switch(struct dvobj_priv *, u8 enable); -+int rtw_halmac_send_h2c(struct dvobj_priv *, u8 *h2c); -+int rtw_halmac_c2h_handle(struct dvobj_priv *, u8 *c2h, u32 size); -+ -+/* eFuse */ -+int rtw_halmac_get_available_efuse_size(struct dvobj_priv *d, u32 *size); -+int rtw_halmac_get_physical_efuse_size(struct dvobj_priv *, u32 *size); -+int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size); -+int rtw_halmac_read_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data); -+int rtw_halmac_write_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data); -+int rtw_halmac_get_logical_efuse_size(struct dvobj_priv *, u32 *size); -+int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size, u8 *maskmap, u32 masksize); -+int rtw_halmac_write_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size, u8 *maskmap, u32 masksize); -+int rtw_halmac_read_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data); -+int rtw_halmac_write_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data); -+ -+int rtw_halmac_write_bt_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data); -+int rtw_halmac_read_bt_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size); -+ -+int rtw_halmac_dump_fifo(struct dvobj_priv *d, u8 fifo_sel, u32 addr, u32 size, u8 *buffer); -+int rtw_halmac_rx_agg_switch(struct dvobj_priv *, u8 enable); -+ -+/* Specific function APIs*/ -+int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pbuf, u32 size); -+int rtw_halmac_fill_hal_spec(struct dvobj_priv *, struct hal_spec_t *); -+int rtw_halmac_p2pps(struct dvobj_priv *dvobj, PHAL_P2P_PS_PARA pp2p_ps_para); -+int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment); -+int rtw_halmac_dpk(struct dvobj_priv *d, u8 *buf, u32 bufsz); -+int rtw_halmac_cfg_phy_para(struct dvobj_priv *d, struct rtw_phy_parameter *para); -+int rtw_halmac_led_cfg(struct dvobj_priv *d, u8 enable, u8 mode); -+void rtw_halmac_led_switch(struct dvobj_priv *d, u8 on); -+int rtw_halmac_bt_wake_cfg(struct dvobj_priv *d, u8 enable); -+int rtw_halmac_rfe_ctrl_cfg(struct dvobj_priv *d, u8 gpio); -+#ifdef CONFIG_PNO_SUPPORT -+int rtw_halmac_pno_scanoffload(struct dvobj_priv *d, u32 enable); -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+int rtw_halmac_query_tx_page_num(struct dvobj_priv *); -+int rtw_halmac_get_tx_queue_page_num(struct dvobj_priv *, u8 queue, u32 *page); -+u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *, u8 *desc, u32 size); -+int rtw_halmac_sdio_tx_allowed(struct dvobj_priv *, u8 *buf, u32 size); -+u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *, u8 *seq); -+int rtw_halmac_sdio_set_tx_format(struct dvobj_priv *d, enum halmac_sdio_tx_format format); -+#endif /* CONFIG_SDIO_HCI */ -+ -+#ifdef CONFIG_USB_HCI -+u8 rtw_halmac_usb_get_bulkout_id(struct dvobj_priv *, u8 *buf, u32 size); -+int rtw_halmac_usb_get_txagg_desc_num(struct dvobj_priv *d, u8 *num); -+u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode); -+#endif /* CONFIG_USB_HCI */ -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+void dump_trx_share_mode(void *sel, _adapter *adapter); -+#endif -+ -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+int rtw_halmac_bf_add_mu_bfer(struct dvobj_priv *d, u16 paid, u16 csi_para, -+ u16 my_aid, enum halmac_csi_seg_len sel, u8 *addr); -+int rtw_halmac_bf_del_mu_bfer(struct dvobj_priv *d); -+ -+int rtw_halmac_bf_cfg_sounding(struct dvobj_priv *d, enum halmac_snd_role role, -+ enum halmac_data_rate rate); -+int rtw_halmac_bf_del_sounding(struct dvobj_priv *d, enum halmac_snd_role role); -+ -+int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d, u8 rssi, u8 current_rate, -+ u8 fixrate_en, u8 *new_rate, u8 *bmp_ofdm54); -+ -+int rtw_halmac_bf_cfg_mu_mimo(struct dvobj_priv *d, enum halmac_snd_role role, -+ u8 *sounding_sts, u16 grouping_bitmap, u8 mu_tx_en, -+ u32 *given_gid_tab, u32 *given_user_pos); -+#define rtw_halmac_bf_cfg_mu_bfee(d, gid_tab, user_pos) \ -+ rtw_halmac_bf_cfg_mu_mimo(d, HAL_BFEE, NULL, 0, 0, gid_tab, user_pos) -+ -+#endif /* RTW_BEAMFORMING_VERSION_2 */ -+#endif /* CONFIG_BEAMFORMING */ -+ -+#endif /* _HAL_HALMAC_H_ */ -diff --git a/drivers/staging/rtl8723cs/hal/hal_hci/hal_sdio.c b/drivers/staging/rtl8723cs/hal/hal_hci/hal_sdio.c -new file mode 100644 -index 000000000000..3e8be28d0436 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_hci/hal_sdio.c -@@ -0,0 +1,885 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _HAL_SDIO_C_ -+ -+#include -+#include -+ -+#ifndef RTW_HALMAC -+const char *_sdio_tx_queue_str[] = { -+ "H", -+ "M", -+ "L", -+}; -+ -+static void dump_mac_page0(PADAPTER padapter) -+{ -+ char str_out[128]; -+ char str_val[8]; -+ char *p = NULL; -+ int index = 0, i = 0; -+ u8 val8 = 0, len = 0; -+ -+ RTW_ERR("Dump MAC Page0 register:\n"); -+ for (index = 0 ; index < 0x100 ; index += 16) { -+ p = &str_out[0]; -+ len = snprintf(str_val, sizeof(str_val), -+ "0x%02x: ", index); -+ strncpy(str_out, str_val, len); -+ p += len; -+ -+ for (i = 0 ; i < 16 ; i++) { -+ len = snprintf(str_val, sizeof(str_val), "%02x ", -+ rtw_read8(padapter, index + i)); -+ strncpy(p, str_val, len); -+ p += len; -+ } -+ RTW_INFO("%s\n", str_out); -+ _rtw_memset(&str_out, '\0', sizeof(str_out)); -+ } -+} -+ -+/* -+ * Description: -+ * Call this function to make sure power on successfully -+ * -+ * Return: -+ * _SUCCESS enable success -+ * _FAIL enable fail -+ */ -+bool sdio_power_on_check(PADAPTER padapter) { -+ u32 val_offset0, val_offset1, val_offset2, val_offset3; -+ u32 val_mix = 0; -+ u32 res = 0; -+ bool ret = _FAIL; -+ int index = 0; -+ -+ val_offset0 = rtw_read8(padapter, REG_CR); -+ val_offset1 = rtw_read8(padapter, REG_CR + 1); -+ val_offset2 = rtw_read8(padapter, REG_CR + 2); -+ val_offset3 = rtw_read8(padapter, REG_CR + 3); -+ -+ if (val_offset0 == 0xEA || val_offset1 == 0xEA || -+ val_offset2 == 0xEA || val_offset3 == 0xEA) { -+ RTW_INFO("%s: power on fail, do Power on again\n", __func__); -+ return ret; -+ } -+ -+ val_mix = val_offset3 << 24 | val_mix; -+ val_mix = val_offset2 << 16 | val_mix; -+ val_mix = val_offset1 << 8 | val_mix; -+ val_mix = val_offset0 | val_mix; -+ -+ res = rtw_read32(padapter, REG_CR); -+ -+ RTW_INFO("%s: val_mix:0x%08x, res:0x%08x\n", __func__, val_mix, res); -+ -+ while (index < 100) { -+ if (res == val_mix) { -+ RTW_INFO("%s: 0x100 the result of cmd52 and cmd53 is the same.\n", __func__); -+ ret = _SUCCESS; -+ break; -+ } else { -+ RTW_INFO("%s: 0x100 cmd52 and cmd53 is not the same(index:%d).\n", __func__, index); -+ res = rtw_read32(padapter, REG_CR); -+ index++; -+ ret = _FAIL; -+ } -+ } -+ -+ if (ret) { -+ index = 0; -+ while (index < 100) { -+ rtw_write32(padapter, 0x1B8, 0x12345678); -+ res = rtw_read32(padapter, 0x1B8); -+ if (res == 0x12345678) { -+ RTW_INFO("%s: 0x1B8 test Pass.\n", __func__); -+ ret = _SUCCESS; -+ break; -+ } else { -+ index++; -+ RTW_INFO("%s: 0x1B8 test Fail(index: %d).\n", __func__, index); -+ ret = _FAIL; -+ } -+ } -+ } else -+ RTW_INFO("%s: fail at cmd52, cmd53.\n", __func__); -+ -+ if (ret == _FAIL) -+ dump_mac_page0(padapter); -+ -+ return ret; -+} -+ -+u8 rtw_hal_sdio_max_txoqt_free_space(_adapter *padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (pHalData->SdioTxOQTMaxFreeSpace < 8) -+ pHalData->SdioTxOQTMaxFreeSpace = 8; -+ -+ return pHalData->SdioTxOQTMaxFreeSpace; -+} -+ -+u8 rtw_hal_sdio_query_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if ((pHalData->SdioTxFIFOFreePage[PageIdx] + pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX]) >= (RequiredPageNum)) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+void rtw_hal_sdio_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 DedicatedPgNum = 0; -+ u8 RequiredPublicFreePgNum = 0; -+ /* _irqL irql; */ -+ -+ /* _enter_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); */ -+ -+ DedicatedPgNum = pHalData->SdioTxFIFOFreePage[PageIdx]; -+ if (RequiredPageNum <= DedicatedPgNum) -+ pHalData->SdioTxFIFOFreePage[PageIdx] -= RequiredPageNum; -+ else { -+ pHalData->SdioTxFIFOFreePage[PageIdx] = 0; -+ RequiredPublicFreePgNum = RequiredPageNum - DedicatedPgNum; -+ pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX] -= RequiredPublicFreePgNum; -+ } -+ -+ /* _exit_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); */ -+} -+ -+void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ, u8 div_num) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u32 page_size; -+ u32 lenHQ, lenNQ, lenLQ; -+ -+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, &page_size); -+ -+ lenHQ = ((numHQ + numPubQ) / div_num) * page_size; -+ lenNQ = ((numNQ + numPubQ) / div_num) * page_size; -+ lenLQ = ((numLQ + numPubQ) / div_num) * page_size; -+ -+ pHalData->sdio_tx_max_len[HI_QUEUE_IDX] = (lenHQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenHQ; -+ pHalData->sdio_tx_max_len[MID_QUEUE_IDX] = (lenNQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenNQ; -+ pHalData->sdio_tx_max_len[LOW_QUEUE_IDX] = (lenLQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenLQ; -+ #ifdef DBG_TX_FREE_PAGE -+ RTW_INFO("rtw_hal_set_sdio_tx_max_length div_num :%u numHQ=%u numNQ=%u numLQ=%u numPubQ=%u\n",div_num ,numHQ,numNQ,numLQ,numPubQ); -+ RTW_INFO("pHalData->sdio_tx_max_len[HI_QUEUE_IDX] :%u\n",pHalData->sdio_tx_max_len[HI_QUEUE_IDX] ); -+ RTW_INFO("pHalData->sdio_tx_max_len[MID_QUEUE_IDX] :%u\n",pHalData->sdio_tx_max_len[MID_QUEUE_IDX] ); -+ RTW_INFO("rtw_hal_set_sdio_tx_max_length pHalData->sdio_tx_max_len[LOW_QUEUE_IDX] :%u\n",pHalData->sdio_tx_max_len[LOW_QUEUE_IDX] ); -+ #endif -+} -+ -+u32 rtw_hal_get_sdio_tx_max_length(PADAPTER padapter, u8 queue_idx) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u32 deviceId, max_len; -+ -+ -+ deviceId = ffaddr2deviceId(pdvobjpriv, queue_idx); -+ switch (deviceId) { -+ case WLAN_TX_HIQ_DEVICE_ID: -+ max_len = pHalData->sdio_tx_max_len[HI_QUEUE_IDX]; -+ break; -+ -+ case WLAN_TX_MIQ_DEVICE_ID: -+ max_len = pHalData->sdio_tx_max_len[MID_QUEUE_IDX]; -+ break; -+ -+ case WLAN_TX_LOQ_DEVICE_ID: -+ max_len = pHalData->sdio_tx_max_len[LOW_QUEUE_IDX]; -+ break; -+ -+ default: -+ max_len = pHalData->sdio_tx_max_len[MID_QUEUE_IDX]; -+ break; -+ } -+ -+ return max_len; -+} -+ -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) ||defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8192F)|| defined(CONFIG_RTL8723D) -+void rtw_hal_sdio_avail_page_threshold_init(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ hal_data->sdio_avail_int_en_q = 0xFF; -+ rtw_write32(adapter, REG_TQPNT1, 0xFFFFFFFF); -+ rtw_write32(adapter, REG_TQPNT2, 0xFFFFFFFF); -+ #ifdef CONFIG_RTL8192F -+ rtw_write32(adapter, REG_TQPNT3_V1_8192F, 0xFFFFFFFF); -+ #endif -+} -+ -+void rtw_hal_sdio_avail_page_threshold_en(_adapter *adapter, u8 qidx, u8 page) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ if (hal_data->sdio_avail_int_en_q != qidx) { -+ u32 page_size; -+ u32 tx_max_len; -+ u32 threshold_reg[] = {REG_TQPNT1, REG_TQPNT1 + 2, REG_TQPNT2, REG_TQPNT2 + 2}; /* H, M, L, E */ -+ u8 dw_shift[] = {0, 16, 0, 16}; /* H, M, L, E */ -+ u32 threshold = 0; -+ -+ /* use same low-high threshold as page num from tx_max_len */ -+ if(dvobj->tx_aval_int_thr_mode == 0) /*default setting by requirement*/ -+ threshold = page; -+ else if (dvobj->tx_aval_int_thr_mode == 1 && dvobj->tx_aval_int_thr_value) -+ threshold = dvobj->tx_aval_int_thr_value; -+ else { -+ rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, &page_size); -+ tx_max_len = hal_data->sdio_tx_max_len[qidx]; -+ threshold = PageNum(tx_max_len, page_size); -+ } -+ threshold |= (threshold) << 8; -+ -+ if (hal_data->sdio_avail_int_en_q == 0xFF) -+ rtw_write16(adapter, threshold_reg[qidx], threshold); -+ else if (hal_data->sdio_avail_int_en_q >> 1 == qidx >> 1) {/* same dword */ -+ rtw_write16(adapter, threshold_reg[hal_data->sdio_avail_int_en_q], 0); -+ rtw_write32(adapter, threshold_reg[qidx & 0xFE] -+ , (0xFFFF << dw_shift[hal_data->sdio_avail_int_en_q]) | (threshold << dw_shift[qidx])); -+ } else { -+ rtw_write16(adapter, threshold_reg[hal_data->sdio_avail_int_en_q], 0); -+ rtw_write16(adapter, threshold_reg[hal_data->sdio_avail_int_en_q], 0xFFFF); -+ rtw_write16(adapter, threshold_reg[qidx], threshold); -+ } -+ -+ hal_data->sdio_avail_int_en_q = qidx; -+ -+ #ifdef DBG_TX_FREE_PAGE -+ RTW_INFO("DWQP enable avail page threshold %s:%u-%u\n", sdio_tx_queue_str(qidx) -+ , threshold & 0xFF, threshold >> 8); -+ #endif -+ } -+} -+#endif -+#endif /* CONFIG_SDIO_TX_ENABLE_AVAL_INT */ -+ -+#ifdef CONFIG_FW_C2H_REG -+void sd_c2h_hisr_hdl(_adapter *adapter) -+{ -+ u8 c2h_evt[C2H_REG_LEN] = {0}; -+ u8 id, seq, plen; -+ u8 *payload; -+ -+ if (rtw_hal_c2h_evt_read(adapter, c2h_evt) != _SUCCESS) -+ goto exit; -+ -+ if (rtw_hal_c2h_reg_hdr_parse(adapter, c2h_evt, &id, &seq, &plen, &payload) != _SUCCESS) -+ goto exit; -+ -+ if (rtw_hal_c2h_id_handle_directly(adapter, id, seq, plen, payload)) { -+ /* Handle directly */ -+ rtw_hal_c2h_handler(adapter, id, seq, plen, payload); -+ goto exit; -+ } -+ -+ if (rtw_c2h_reg_wk_cmd(adapter, c2h_evt) != _SUCCESS) -+ RTW_ERR("%s rtw_c2h_reg_wk_cmd fail\n", __func__); -+ -+exit: -+ return; -+} -+#endif -+ -+#ifdef CONFIG_SDIO_CHK_HCI_RESUME -+ -+#ifndef SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS -+ #define SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS 200 -+#endif -+#ifndef DBG_SDIO_CHK_HCI_RESUME -+ #define DBG_SDIO_CHK_HCI_RESUME 0 -+#endif -+ -+bool sdio_chk_hci_resume(struct intf_hdl *pintfhdl) -+{ -+ _adapter *adapter = pintfhdl->padapter; -+ u8 hci_sus_state; -+ u8 sus_ctl, sus_ctl_ori = 0xEA; -+ u8 do_leave = 0; -+ systime start = 0, end = 0; -+ u32 poll_cnt = 0; -+ u8 timeout = 0; -+ u8 sr = 0; -+ s32 err = 0; -+ -+ rtw_hal_get_hwreg(adapter, HW_VAR_HCI_SUS_STATE, &hci_sus_state); -+ if (hci_sus_state == HCI_SUS_LEAVE || hci_sus_state == HCI_SUS_ERR) -+ goto no_hdl; -+ -+ err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl); -+ if (err) -+ goto exit; -+ sus_ctl_ori = sus_ctl; -+ -+ if ((sus_ctl & HCI_RESUME_PWR_RDY) && !(sus_ctl & HCI_SUS_CTRL)) -+ goto exit; -+ -+ if (sus_ctl & HCI_SUS_CTRL) { -+ sus_ctl &= ~(HCI_SUS_CTRL); -+ err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl); -+ if (err) -+ goto exit; -+ } -+ -+ do_leave = 1; -+ -+ /* polling for HCI_RESUME_PWR_RDY && !HCI_SUS_CTRL */ -+ start = rtw_get_current_time(); -+ while (1) { -+ if (rtw_is_surprise_removed(adapter)) { -+ sr = 1; -+ break; -+ } -+ -+ err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl); -+ poll_cnt++; -+ -+ if (!err && (sus_ctl & HCI_RESUME_PWR_RDY) && !(sus_ctl & HCI_SUS_CTRL)) -+ break; -+ -+ if (rtw_get_passing_time_ms(start) > SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS) { -+ timeout = 1; -+ break; -+ } -+ } -+ end = rtw_get_current_time(); -+ -+exit: -+ -+ if (DBG_SDIO_CHK_HCI_RESUME) { -+ RTW_INFO(FUNC_ADPT_FMT" hci_sus_state:%u, sus_ctl:0x%02x(0x%02x), do_leave:%u, to:%u, err:%u\n" -+ , FUNC_ADPT_ARG(adapter), hci_sus_state, sus_ctl, sus_ctl_ori, do_leave, timeout, err); -+ if (start != 0 || end != 0) { -+ RTW_INFO(FUNC_ADPT_FMT" polling %d ms, cnt:%u\n" -+ , FUNC_ADPT_ARG(adapter), rtw_get_time_interval_ms(start, end), poll_cnt); -+ } -+ } -+ -+ if (timeout) { -+ RTW_ERR(FUNC_ADPT_FMT" timeout(err:%d) sus_ctl:0x%02x\n" -+ , FUNC_ADPT_ARG(adapter), err, sus_ctl); -+ } else if (err) { -+ RTW_ERR(FUNC_ADPT_FMT" err:%d\n" -+ , FUNC_ADPT_ARG(adapter), err); -+ } -+ -+no_hdl: -+ return do_leave ? _TRUE : _FALSE; -+} -+ -+void sdio_chk_hci_suspend(struct intf_hdl *pintfhdl) -+{ -+#define SDIO_CHK_HCI_SUSPEND_POLLING 0 -+ -+ _adapter *adapter = pintfhdl->padapter; -+ u8 hci_sus_state; -+ u8 sus_ctl, sus_ctl_ori = 0xEA; -+ systime start = 0, end = 0; -+ u32 poll_cnt = 0; -+ u8 timeout = 0; -+ u8 sr = 0; -+ s32 err = 0; -+ u8 device_id; -+ u16 offset; -+ -+ rtw_hal_get_hwreg(adapter, HW_VAR_HCI_SUS_STATE, &hci_sus_state); -+ if (hci_sus_state == HCI_SUS_LEAVE || hci_sus_state == HCI_SUS_LEAVING || hci_sus_state == HCI_SUS_ERR) -+ goto no_hdl; -+ -+ err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl); -+ if (err) -+ goto exit; -+ sus_ctl_ori = sus_ctl; -+ -+ if (!(sus_ctl & HCI_RESUME_PWR_RDY)) -+ goto exit; -+ -+ sus_ctl |= HCI_SUS_CTRL; -+ err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl); -+ if (err) -+ goto exit; -+ -+#if SDIO_CHK_HCI_SUSPEND_POLLING -+ /* polling for HCI_RESUME_PWR_RDY cleared */ -+ start = rtw_get_current_time(); -+ while (1) { -+ if (rtw_is_surprise_removed(adapter)) { -+ sr = 1; -+ break; -+ } -+ -+ err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_HSUS_CTRL), 1, &sus_ctl); -+ poll_cnt++; -+ -+ if (!err && !(sus_ctl & HCI_RESUME_PWR_RDY)) -+ break; -+ -+ if (rtw_get_passing_time_ms(start) > SDIO_HCI_RESUME_PWR_RDY_TIMEOUT_MS) { -+ timeout = 1; -+ break; -+ } -+ } -+ end = rtw_get_current_time(); -+#endif /* SDIO_CHK_HCI_SUSPEND_POLLING */ -+ -+exit: -+ -+ if (DBG_SDIO_CHK_HCI_RESUME) { -+ RTW_INFO(FUNC_ADPT_FMT" hci_sus_state:%u, sus_ctl:0x%02x(0x%02x), to:%u, err:%u\n" -+ , FUNC_ADPT_ARG(adapter), hci_sus_state, sus_ctl, sus_ctl_ori, timeout, err); -+ if (start != 0 || end != 0) { -+ RTW_INFO(FUNC_ADPT_FMT" polling %d ms, cnt:%u\n" -+ , FUNC_ADPT_ARG(adapter), rtw_get_time_interval_ms(start, end), poll_cnt); -+ } -+ } -+ -+#if SDIO_CHK_HCI_SUSPEND_POLLING -+ if (timeout) { -+ RTW_ERR(FUNC_ADPT_FMT" timeout(err:%d) sus_ctl:0x%02x\n" -+ , FUNC_ADPT_ARG(adapter), err, sus_ctl); -+ } else -+#endif -+ if (err) { -+ RTW_ERR(FUNC_ADPT_FMT" err:%d\n" -+ , FUNC_ADPT_ARG(adapter), err); -+ } -+ -+no_hdl: -+ return; -+} -+#endif /* CONFIG_SDIO_CHK_HCI_RESUME */ -+ -+ -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+ -+/* program indirect access register in sdio local to read/write page0 registers */ -+#ifndef INDIRECT_ACCESS_TIMEOUT_MS -+ #define INDIRECT_ACCESS_TIMEOUT_MS 200 -+#endif -+#ifndef DBG_SDIO_INDIRECT_ACCESS -+ #define DBG_SDIO_INDIRECT_ACCESS 0 -+#endif -+ -+s32 sdio_iread(PADAPTER padapter, u32 addr, u8 size, u8 *v) -+{ -+ struct intf_hdl *pintfhdl = &padapter->iopriv.intf; -+ _mutex *mutex = &adapter_to_dvobj(padapter)->sd_indirect_access_mutex; -+ -+ u8 val[4] = {0}; -+ u8 cmd[4] = {0}; /* mapping to indirect access register, little endien */ -+ systime start = 0, end = 0; -+ u8 timeout = 0; -+ u8 sr = 0; -+ s32 err = 0; -+ -+ if (size == 1) -+ SET_INDIRECT_REG_SIZE_1BYTE(cmd); -+ else if (size == 2) -+ SET_INDIRECT_REG_SIZE_2BYTE(cmd); -+ else if (size == 4) -+ SET_INDIRECT_REG_SIZE_4BYTE(cmd); -+ -+ SET_INDIRECT_REG_ADDR(cmd, addr); -+ -+ /* acquire indirect access lock */ -+ _enter_critical_mutex(mutex, NULL); -+ -+ if (DBG_SDIO_INDIRECT_ACCESS) -+ RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]); -+ -+ err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG), 3, cmd); -+ if (err) -+ goto exit; -+ -+ /* trigger */ -+ SET_INDIRECT_REG_READ(cmd); -+ -+ if (DBG_SDIO_INDIRECT_ACCESS) -+ RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]); -+ -+ err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2); -+ if (err) -+ goto exit; -+ -+ /* polling for indirect access done */ -+ start = rtw_get_current_time(); -+ while (1) { -+ if (rtw_is_surprise_removed(padapter)) { -+ sr = 1; -+ break; -+ } -+ -+ err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2); -+ -+ if (!err && GET_INDIRECT_REG_RDY(cmd)) -+ break; -+ -+ if (rtw_get_passing_time_ms(start) > INDIRECT_ACCESS_TIMEOUT_MS) { -+ timeout = 1; -+ break; -+ } -+ } -+ end = rtw_get_current_time(); -+ -+ if (timeout || sr) -+ goto exit; -+ -+ /* read result */ -+ err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_DATA), size, val); -+ if (size == 2) -+ *((u16 *)(val)) = le16_to_cpu(*((u16 *)(val))); -+ else if (size == 4) -+ *((u32 *)(val)) = le32_to_cpu(*((u32 *)(val))); -+ -+ if (DBG_SDIO_INDIRECT_ACCESS) { -+ if (size == 1) -+ RTW_INFO(FUNC_ADPT_FMT" val:0x%02x\n", FUNC_ADPT_ARG(padapter), *((u8 *)(val))); -+ else if (size == 2) -+ RTW_INFO(FUNC_ADPT_FMT" val:0x%04x\n", FUNC_ADPT_ARG(padapter), *((u16 *)(val))); -+ else if (size == 4) -+ RTW_INFO(FUNC_ADPT_FMT" val:0x%08x\n", FUNC_ADPT_ARG(padapter), *((u32 *)(val))); -+ } -+ -+exit: -+ /* release indirect access lock */ -+ _exit_critical_mutex(mutex, NULL); -+ -+ if (DBG_SDIO_INDIRECT_ACCESS) { -+ RTW_INFO(FUNC_ADPT_FMT" addr:0x%0x size:%u, cmd:%02x %02x %02x %02x, to:%u, err:%u\n" -+ , FUNC_ADPT_ARG(padapter), addr, size, cmd[0], cmd[1], cmd[2], cmd[3], timeout, err); -+ if (start != 0 || end != 0) { -+ RTW_INFO(FUNC_ADPT_FMT" polling %d ms\n" -+ , FUNC_ADPT_ARG(padapter), rtw_get_time_interval_ms(start, end)); -+ } -+ } -+ -+ if (timeout) { -+ RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x timeout(err:%d), cmd\n" -+ , FUNC_ADPT_ARG(padapter), addr, err); -+ if (!err) -+ err = -1; /* just for return value */ -+ } else if (err) { -+ RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x err:%d\n" -+ , FUNC_ADPT_ARG(padapter), addr, err); -+ } else if (sr) { -+ /* just for return value */ -+ err = -1; -+ } -+ -+ if (!err && !timeout && !sr) -+ _rtw_memcpy(v, val, size); -+ -+ return err; -+} -+ -+s32 sdio_iwrite(PADAPTER padapter, u32 addr, u8 size, u8 *v) -+{ -+ struct intf_hdl *pintfhdl = &padapter->iopriv.intf; -+ _mutex *mutex = &adapter_to_dvobj(padapter)->sd_indirect_access_mutex; -+ -+ u8 val[4] = {0}; -+ u8 cmd[4] = {0}; /* mapping to indirect access register, little endien */ -+ systime start = 0, end = 0; -+ u8 timeout = 0; -+ u8 sr = 0; -+ s32 err = 0; -+ -+ if (size == 1) -+ SET_INDIRECT_REG_SIZE_1BYTE(cmd); -+ else if (size == 2) -+ SET_INDIRECT_REG_SIZE_2BYTE(cmd); -+ else if (size == 4) -+ SET_INDIRECT_REG_SIZE_4BYTE(cmd); -+ -+ SET_INDIRECT_REG_ADDR(cmd, addr); -+ -+ /* acquire indirect access lock */ -+ _enter_critical_mutex(mutex, NULL); -+ -+ if (DBG_SDIO_INDIRECT_ACCESS) -+ RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]); -+ -+ err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG), 3, cmd); -+ if (err) -+ goto exit; -+ -+ /* data to write */ -+ _rtw_memcpy(val, v, size); -+ -+ if (DBG_SDIO_INDIRECT_ACCESS) { -+ if (size == 1) -+ RTW_INFO(FUNC_ADPT_FMT" val:0x%02x\n", FUNC_ADPT_ARG(padapter), *((u8 *)(val))); -+ else if (size == 2) -+ RTW_INFO(FUNC_ADPT_FMT" val:0x%04x\n", FUNC_ADPT_ARG(padapter), *((u16 *)(val))); -+ else if (size == 4) -+ RTW_INFO(FUNC_ADPT_FMT" val:0x%08x\n", FUNC_ADPT_ARG(padapter), *((u32 *)(val))); -+ } -+ -+ if (size == 2) -+ *((u16 *)(val)) = cpu_to_le16(*((u16 *)(val))); -+ else if (size == 4) -+ *((u32 *)(val)) = cpu_to_le32(*((u32 *)(val))); -+ -+ err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_DATA), size, val); -+ if (err) -+ goto exit; -+ -+ /* trigger */ -+ SET_INDIRECT_REG_WRITE(cmd); -+ -+ if (DBG_SDIO_INDIRECT_ACCESS) -+ RTW_INFO(FUNC_ADPT_FMT" cmd:%02x %02x %02x %02x\n", FUNC_ADPT_ARG(padapter), cmd[0], cmd[1], cmd[2], cmd[3]); -+ -+ err = sd_cmd52_write(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2); -+ if (err) -+ goto exit; -+ -+ /* polling for indirect access done */ -+ start = rtw_get_current_time(); -+ while (1) { -+ if (rtw_is_surprise_removed(padapter)) { -+ sr = 1; -+ break; -+ } -+ -+ err = sd_cmd52_read(pintfhdl, SDIO_LOCAL_CMD_ADDR(SDIO_REG_INDIRECT_REG_CFG + 2), 1, cmd + 2); -+ -+ if (!err && GET_INDIRECT_REG_RDY(cmd)) -+ break; -+ -+ if (rtw_get_passing_time_ms(start) > INDIRECT_ACCESS_TIMEOUT_MS) { -+ timeout = 1; -+ break; -+ } -+ } -+ end = rtw_get_current_time(); -+ -+ if (timeout || sr) -+ goto exit; -+ -+exit: -+ /* release indirect access lock */ -+ _exit_critical_mutex(mutex, NULL); -+ -+ if (DBG_SDIO_INDIRECT_ACCESS) { -+ RTW_INFO(FUNC_ADPT_FMT" addr:0x%0x size:%u, cmd:%02x %02x %02x %02x, to:%u, err:%u\n" -+ , FUNC_ADPT_ARG(padapter), addr, size, cmd[0], cmd[1], cmd[2], cmd[3], timeout, err); -+ if (start != 0 || end != 0) { -+ RTW_INFO(FUNC_ADPT_FMT" polling %d ms\n" -+ , FUNC_ADPT_ARG(padapter), rtw_get_time_interval_ms(start, end)); -+ } -+ } -+ -+ if (timeout) { -+ RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x timeout(err:%d), cmd\n" -+ , FUNC_ADPT_ARG(padapter), addr, err); -+ if (!err) -+ err = -1; /* just for return value */ -+ } else if (err) { -+ RTW_ERR(FUNC_ADPT_FMT" addr:0x%0x err:%d\n" -+ , FUNC_ADPT_ARG(padapter), addr, err); -+ } else if (sr) { -+ /* just for return value */ -+ err = -1; -+ } -+ -+ return err; -+} -+ -+u8 sdio_iread8(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ u8 val; -+ -+ if (sdio_iread(pintfhdl->padapter, addr, 1, (u8 *)&val) != 0) -+ val = SDIO_ERR_VAL8; -+ -+ return val; -+} -+ -+u16 sdio_iread16(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ u16 val; -+ -+ if (sdio_iread(pintfhdl->padapter, addr, 2, (u8 *)&val) != 0) -+ val = SDIO_ERR_VAL16; -+ -+ return val; -+} -+ -+u32 sdio_iread32(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ u32 val; -+ -+ if (sdio_iread(pintfhdl->padapter, addr, 4, (u8 *)&val) != 0) -+ val = SDIO_ERR_VAL32; -+ -+ return val; -+} -+ -+s32 sdio_iwrite8(struct intf_hdl *pintfhdl, u32 addr, u8 val) -+{ -+ return sdio_iwrite(pintfhdl->padapter, addr, 1, (u8 *)&val); -+} -+ -+s32 sdio_iwrite16(struct intf_hdl *pintfhdl, u32 addr, u16 val) -+{ -+ return sdio_iwrite(pintfhdl->padapter, addr, 2, (u8 *)&val); -+} -+ -+s32 sdio_iwrite32(struct intf_hdl *pintfhdl, u32 addr, u32 val) -+{ -+ return sdio_iwrite(pintfhdl->padapter, addr, 4, (u8 *)&val); -+} -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+u32 cmd53_4byte_alignment(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ u32 addr_rdr; -+ u32 value; -+ -+ value = 0; -+ addr_rdr = addr % 4; -+ -+ if (addr_rdr) { -+ u8 shift_bit; -+ -+ shift_bit = addr_rdr * 8; -+ value = (sd_read32(pintfhdl, (addr - addr_rdr), NULL)) >> shift_bit; -+ } else -+ value = sd_read32(pintfhdl, addr, NULL); -+ -+ return value; -+} -+ -+#endif /* !RTW_HALMAC */ -+ -+#ifndef CONFIG_SDIO_TX_TASKLET -+#ifdef SDIO_FREE_XMIT_BUF_SEMA -+void _rtw_sdio_free_xmitbuf_sema_up(struct xmit_priv *xmit) -+{ -+ _rtw_up_sema(&xmit->sdio_free_xmitbuf_sema); -+} -+ -+void _rtw_sdio_free_xmitbuf_sema_down(struct xmit_priv *xmit) -+{ -+ _rtw_down_sema(&xmit->sdio_free_xmitbuf_sema); -+} -+ -+#ifdef DBG_SDIO_FREE_XMIT_BUF_SEMA -+void dbg_rtw_sdio_free_xmitbuf_sema_up(struct xmit_priv *xmit, const char *caller) -+{ -+ /* just for debug usage only, pleae take care for the different of count implementaton */ -+ RTW_INFO("%s("ADPT_FMT") before up sdio_free_xmitbuf_sema, count:%u\n" -+ , caller, ADPT_ARG(xmit->adapter), xmit->sdio_free_xmitbuf_sema.count); -+ _rtw_sdio_free_xmitbuf_sema_up(xmit); -+} -+ -+void dbg_rtw_sdio_free_xmitbuf_sema_down(struct xmit_priv *xmit, const char *caller) -+{ -+ /* just for debug usage only, pleae take care for the different of count implementaton */ -+ RTW_INFO("%s("ADPT_FMT") before down sdio_free_xmitbuf_sema, count:%u\n" -+ , caller, ADPT_ARG(xmit->adapter), xmit->sdio_free_xmitbuf_sema.count); -+ _rtw_sdio_free_xmitbuf_sema_down(xmit); -+} -+#endif /* DBG_SDIO_FREE_XMIT_BUF_SEMA */ -+ -+#endif /* SDIO_FREE_XMIT_BUF_SEMA */ -+#endif /* !CONFIG_SDIO_TX_TASKLET */ -+ -+s32 sdio_initrecvbuf(struct recv_buf *recvbuf, _adapter *adapter) -+{ -+ _rtw_init_listhead(&recvbuf->list); -+#ifdef PLATFORM_WINDOWS -+ _rtw_spinlock_init(&recvbuf->recvbuf_lock); -+#endif -+ recvbuf->adapter = adapter; -+ -+ return _SUCCESS; -+} -+ -+void sdio_freerecvbuf(struct recv_buf *recvbuf) -+{ -+#ifdef PLATFORM_WINDOWS -+ _rtw_spinlock_free(&recvbuf->recvbuf_lock); -+#endif -+} -+ -+#ifdef CONFIG_SDIO_RECVBUF_PWAIT -+void dump_recvbuf_pwait_conf(void *sel, struct recv_priv *recvpriv) -+{ -+ struct rtw_pwait_conf *conf = &recvpriv->recvbuf_pwait.conf; -+ -+ RTW_PRINT_SEL(sel, "%-4s %-10s %-10s\n" -+ , "type", "time", "cnt_lmt"); -+ RTW_PRINT_SEL(sel, "%4s %10d %10d\n" -+ , rtw_pwait_type_str(conf->type), conf->wait_time, conf->wait_cnt_lmt); -+} -+ -+#ifdef CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST -+int recvbuf_pwait_config_req(struct recv_priv *recvpriv, enum rtw_pwait_type type, s32 time, s32 cnt_lmt) -+{ -+ struct recv_buf *rbuf; -+ struct rtw_pwait_conf *conf; -+ int ret = _FAIL; -+ -+ rbuf = rtw_malloc(sizeof(*rbuf) + sizeof(struct rtw_pwait_conf)); -+ if (!rbuf) -+ goto exit; -+ -+ sdio_initrecvbuf(rbuf, recvpriv->adapter); -+ rbuf->type = RBUF_TYPE_PWAIT_ADJ; -+ rbuf->pbuf = ((u8*)rbuf) + sizeof(*rbuf); -+ conf = (struct rtw_pwait_conf *)rbuf->pbuf; -+ conf->type = type; -+ conf->wait_time = time; -+ conf->wait_cnt_lmt = cnt_lmt; -+ -+ ret = rtw_enqueue_recvbuf(rbuf, &recvpriv->free_recv_buf_queue); -+ if (0 && ret == _SUCCESS) { -+ RTW_INFO("request recvbuf_pwait with type=%s time=%d cnt_lmt=%d\n" -+ , rtw_pwait_type_str(type), time, cnt_lmt); -+ } -+ -+exit: -+ return ret; -+} -+ -+int recvbuf_pwait_config_hdl(struct recv_priv *recvpriv, struct recv_buf *rbuf) -+{ -+ struct rtw_pwait_conf *conf = (struct rtw_pwait_conf *)rbuf->pbuf; -+ int ret = rtw_pwctx_config(&recvpriv->recvbuf_pwait, conf->type, conf->wait_time, conf->wait_cnt_lmt); -+ -+ if (0 && ret == _SUCCESS) { -+ RTW_INFO("config recvbuf_pwait with type=%s time=%d cnt_lmt=%d\n" -+ , rtw_pwait_type_str(conf->type), conf->wait_time, conf->wait_cnt_lmt); -+ } -+ sdio_freerecvbuf(rbuf); -+ rtw_mfree(rbuf, sizeof(*rbuf) + sizeof(*conf)); -+ -+ return ret; -+} -+#endif /* CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST */ -+#endif /* CONFIG_SDIO_RECVBUF_PWAIT */ -+ -diff --git a/drivers/staging/rtl8723cs/hal/hal_hci/hal_sdio_coex.c b/drivers/staging/rtl8723cs/hal/hal_hci/hal_sdio_coex.c -new file mode 100644 -index 000000000000..564e4089a737 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_hci/hal_sdio_coex.c -@@ -0,0 +1,35 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+#include -+#include /* HAL_DATA_TYPE */ -+ -+#ifdef CONFIG_SDIO_MULTI_FUNCTION_COEX -+ -+int rtw_sdio_multi_state = SDIO_MULTI_WIFI; -+EXPORT_SYMBOL(rtw_sdio_multi_state); -+ -+bool ex_hal_sdio_multi_if_bus_available(PADAPTER adapter) -+{ -+ return rtw_sdio_multi_state == SDIO_MULTI_WIFI; -+} -+ -+#endif /* CONFIG_SDIO_MULTI_FUNCTION_COEX */ -+ -diff --git a/drivers/staging/rtl8723cs/hal/hal_intf.c b/drivers/staging/rtl8723cs/hal/hal_intf.c -new file mode 100644 -index 000000000000..762d1ac08fcc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_intf.c -@@ -0,0 +1,2350 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#define _HAL_INTF_C_ -+ -+#include -+#include -+ -+const u32 _chip_type_to_odm_ic_type[] = { -+ 0, -+ ODM_RTL8188E, -+ ODM_RTL8192E, -+ ODM_RTL8812, -+ ODM_RTL8821, -+ ODM_RTL8723B, -+ ODM_RTL8814A, -+ ODM_RTL8703B, -+ ODM_RTL8188F, -+ ODM_RTL8188F, -+ ODM_RTL8822B, -+ ODM_RTL8723D, -+ ODM_RTL8821C, -+ ODM_RTL8710B, -+ ODM_RTL8192F, -+ ODM_RTL8822C, -+ ODM_RTL8814B, -+ ODM_RTL8723F, -+ 0, -+}; -+ -+void rtw_hal_chip_configure(_adapter *padapter) -+{ -+ padapter->hal_func.intf_chip_configure(padapter); -+} -+ -+/* -+ * Description: -+ * Read chip internal ROM data -+ * -+ * Return: -+ * _SUCCESS success -+ * _FAIL fail -+ */ -+u8 rtw_hal_read_chip_info(_adapter *padapter) -+{ -+ u8 rtn = _SUCCESS; -+ u8 hci_type = rtw_get_intf_type(padapter); -+ systime start = rtw_get_current_time(); -+ -+ /* before access eFuse, make sure card enable has been called */ -+ if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI) -+ && !rtw_is_hw_init_completed(padapter)) -+ rtw_hal_power_on(padapter); -+ -+ rtn = padapter->hal_func.read_adapter_info(padapter); -+ -+ if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI) -+ && !rtw_is_hw_init_completed(padapter)) -+ rtw_hal_power_off(padapter); -+ -+ RTW_INFO("%s in %d ms\n", __func__, rtw_get_passing_time_ms(start)); -+ -+ return rtn; -+} -+ -+void rtw_hal_read_chip_version(_adapter *padapter) -+{ -+ padapter->hal_func.read_chip_version(padapter); -+ rtw_odm_init_ic_type(padapter); -+} -+ -+static void rtw_init_wireless_mode(_adapter *padapter) -+{ -+ u8 proto_wireless_mode = 0; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ if(hal_spec->proto_cap & PROTO_CAP_11B) -+ proto_wireless_mode |= WIRELESS_11B; -+ -+ if(hal_spec->proto_cap & PROTO_CAP_11G) -+ proto_wireless_mode |= WIRELESS_11G; -+#ifdef CONFIG_80211AC_VHT -+ if(hal_spec->band_cap & BAND_CAP_5G) -+ proto_wireless_mode |= WIRELESS_11A; -+#endif -+ -+#ifdef CONFIG_80211N_HT -+ if(hal_spec->proto_cap & PROTO_CAP_11N) { -+ -+ if(hal_spec->band_cap & BAND_CAP_2G) -+ proto_wireless_mode |= WIRELESS_11_24N; -+ if(hal_spec->band_cap & BAND_CAP_5G) -+ proto_wireless_mode |= WIRELESS_11_5N; -+ } -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ if(hal_spec->proto_cap & PROTO_CAP_11AC) -+ proto_wireless_mode |= WIRELESS_11AC; -+#endif -+ padapter->registrypriv.wireless_mode &= proto_wireless_mode; -+} -+ -+void rtw_hal_def_value_init(_adapter *padapter) -+{ -+ if (is_primary_adapter(padapter)) { -+ /*init fw_psmode_iface_id*/ -+ adapter_to_pwrctl(padapter)->fw_psmode_iface_id = 0xff; -+ /*wireless_mode*/ -+ rtw_init_wireless_mode(padapter); -+ padapter->hal_func.init_default_value(padapter); -+ -+ rtw_init_hal_com_default_value(padapter); -+ -+ #ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ adapter_to_dvobj(padapter)->dft.port_id = 0xFF; -+ adapter_to_dvobj(padapter)->dft.mac_id = 0xFF; -+ #endif -+ #ifdef CONFIG_HW_P0_TSF_SYNC -+ adapter_to_dvobj(padapter)->p0_tsf.sync_port = MAX_HW_PORT; -+ adapter_to_dvobj(padapter)->p0_tsf.offset = 0; -+ #endif -+ -+ GET_HAL_DATA(padapter)->rx_tsf_addr_filter_config = 0; -+ } -+} -+ -+u8 rtw_hal_data_init(_adapter *padapter) -+{ -+ if (is_primary_adapter(padapter)) { -+ padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); -+ padapter->HalData = rtw_zvmalloc(padapter->hal_data_sz); -+ if (padapter->HalData == NULL) { -+ RTW_INFO("cant not alloc memory for HAL DATA\n"); -+ return _FAIL; -+ } -+ rtw_phydm_priv_init(padapter); -+ } -+ return _SUCCESS; -+} -+ -+void rtw_hal_data_deinit(_adapter *padapter) -+{ -+ if (is_primary_adapter(padapter)) { -+ if (padapter->HalData) { -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ phy_free_filebuf(padapter); -+#endif -+ rtw_vmfree(padapter->HalData, padapter->hal_data_sz); -+ padapter->HalData = NULL; -+ padapter->hal_data_sz = 0; -+ } -+ } -+} -+ -+void rtw_hal_free_data(_adapter *padapter) -+{ -+ /* free HAL Data */ -+ rtw_hal_data_deinit(padapter); -+} -+void rtw_hal_dm_init(_adapter *padapter) -+{ -+ if (is_primary_adapter(padapter)) { -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ padapter->hal_func.dm_init(padapter); -+ -+ _rtw_spinlock_init(&pHalData->IQKSpinLock); -+ -+ #ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ if (pHalData->txpwr_pg_mode == TXPWR_PG_WITH_PWR_IDX) -+ hal_load_txpwr_info(padapter); -+ #endif -+ phy_load_tx_power_ext_info(padapter, 1); -+ } -+} -+void rtw_hal_dm_deinit(_adapter *padapter) -+{ -+ if (is_primary_adapter(padapter)) { -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ padapter->hal_func.dm_deinit(padapter); -+ -+ _rtw_spinlock_free(&pHalData->IQKSpinLock); -+ } -+} -+ -+enum rf_type rtw_chip_rftype_to_hal_rftype(_adapter *adapter, u8 limit) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ u8 tx_num = 0, rx_num = 0; -+ -+ /*get RF PATH from version_id.RF_TYPE */ -+ if (IS_1T1R(hal_data->version_id)) { -+ tx_num = 1; -+ rx_num = 1; -+ } else if (IS_1T2R(hal_data->version_id)) { -+ tx_num = 1; -+ rx_num = 2; -+ } else if (IS_2T2R(hal_data->version_id)) { -+ tx_num = 2; -+ rx_num = 2; -+ } else if (IS_2T3R(hal_data->version_id)) { -+ tx_num = 2; -+ rx_num = 3; -+ } else if (IS_2T4R(hal_data->version_id)) { -+ tx_num = 2; -+ rx_num = 4; -+ } else if (IS_3T3R(hal_data->version_id)) { -+ tx_num = 3; -+ rx_num = 3; -+ } else if (IS_3T4R(hal_data->version_id)) { -+ tx_num = 3; -+ rx_num = 4; -+ } else if (IS_4T4R(hal_data->version_id)) { -+ tx_num = 4; -+ rx_num = 4; -+ } -+ -+ if (limit) { -+ tx_num = rtw_min(tx_num, limit); -+ rx_num = rtw_min(rx_num, limit); -+ } -+ -+ return trx_num_to_rf_type(tx_num, rx_num); -+} -+ -+void dump_hal_runtime_trx_mode(void *sel, _adapter *adapter) -+{ -+ struct registry_priv *regpriv = &adapter->registrypriv; -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ int i; -+ -+ RTW_PRINT_SEL(sel, "txpath=0x%x, rxpath=0x%x\n", hal_data->txpath, hal_data->rxpath); -+ for (i = 0; i < hal_data->tx_nss; i++) -+ RTW_PRINT_SEL(sel, "txpath_%uss:0x%x, num:%u\n" -+ , i + 1, hal_data->txpath_nss[i] -+ , hal_data->txpath_num_nss[i]); -+} -+ -+void dump_hal_trx_mode(void *sel, _adapter *adapter) -+{ -+ struct registry_priv *regpriv = &adapter->registrypriv; -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ int i; -+ -+ RTW_PRINT_SEL(sel, "trx_path_bmp:0x%02x(%s), NumTotalRFPath:%u, max_tx_cnt:%u\n" -+ , hal_data->trx_path_bmp -+ , rf_type_to_rfpath_str(hal_data->rf_type) -+ , hal_data->NumTotalRFPath -+ , hal_data->max_tx_cnt -+ ); -+ RTW_PRINT_SEL(sel, "tx_nss:%u, rx_nss:%u\n" -+ , hal_data->tx_nss, hal_data->rx_nss); -+ for (i = 0; i < hal_data->tx_nss; i++) -+ RTW_PRINT_SEL(sel, "txpath_cap_num_%uss:%u\n" -+ , i + 1, hal_data->txpath_cap_num_nss[i]); -+ RTW_PRINT_SEL(sel, "\n"); -+ -+ dump_hal_runtime_trx_mode(sel, adapter); -+} -+ -+void _dump_rf_path(void *sel, _adapter *adapter) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ -+ RTW_PRINT_SEL(sel, "[RF_PATH] ver_id.RF_TYPE:%s\n" -+ , rf_type_to_rfpath_str(rtw_chip_rftype_to_hal_rftype(adapter, 0))); -+ RTW_PRINT_SEL(sel, "[RF_PATH] HALSPEC's rf_reg_trx_path_bmp:0x%02x, rf_reg_path_avail_num:%u, max_tx_cnt:%u\n" -+ , hal_spec->rf_reg_trx_path_bmp, hal_spec->rf_reg_path_avail_num, hal_spec->max_tx_cnt); -+ RTW_PRINT_SEL(sel, "[RF_PATH] PG's trx_path_bmp:0x%02x, max_tx_cnt:%u\n" -+ , hal_data->eeprom_trx_path_bmp, hal_data->eeprom_max_tx_cnt); -+ RTW_PRINT_SEL(sel, "[RF_PATH] Registry's trx_path_bmp:0x%02x, tx_path_lmt:%u, rx_path_lmt:%u\n" -+ , regsty->trx_path_bmp, regsty->tx_path_lmt, regsty->rx_path_lmt); -+ RTW_PRINT_SEL(sel, "[RF_PATH] HALDATA's trx_path_bmp:0x%02x, max_tx_cnt:%u\n" -+ , hal_data->trx_path_bmp, hal_data->max_tx_cnt); -+ RTW_PRINT_SEL(sel, "[RF_PATH] HALDATA's rf_type:%s, NumTotalRFPath:%d\n" -+ , rf_type_to_rfpath_str(hal_data->rf_type), hal_data->NumTotalRFPath); -+} -+ -+#ifdef CONFIG_RTL8814A -+extern enum rf_type rtl8814a_rfpath_decision(_adapter *adapter); -+#endif -+ -+u8 rtw_hal_rfpath_init(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ -+#ifdef CONFIG_RTL8814A -+if (IS_HARDWARE_TYPE_8814A(adapter)) { -+ enum bb_path tx_bmp, rx_bmp; -+ hal_data->rf_type = rtl8814a_rfpath_decision(adapter); -+ rf_type_to_default_trx_bmp(hal_data->rf_type, &tx_bmp, &rx_bmp); -+ hal_data->trx_path_bmp = (tx_bmp << 4) | rx_bmp; -+ hal_data->NumTotalRFPath = 4; -+ hal_data->max_tx_cnt = hal_spec->max_tx_cnt; -+ hal_data->max_tx_cnt = rtw_min(hal_data->max_tx_cnt, rf_type_to_rf_tx_cnt(hal_data->rf_type)); -+} else -+#endif -+{ -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ u8 trx_path_bmp; -+ u8 tx_path_num; -+ u8 rx_path_num; -+ int i; -+ -+ trx_path_bmp = hal_spec->rf_reg_trx_path_bmp; -+ -+ if (regsty->trx_path_bmp != 0x00) { -+ /* restrict trx_path_bmp with regsty.trx_path_bmp */ -+ trx_path_bmp &= regsty->trx_path_bmp; -+ if (!trx_path_bmp) { -+ RTW_ERR("%s hal_spec.rf_reg_trx_path_bmp:0x%02x, regsty->trx_path_bmp:0x%02x no intersection\n" -+ , __func__, hal_spec->rf_reg_trx_path_bmp, regsty->trx_path_bmp); -+ return _FAIL; -+ } -+ } else if (hal_data->eeprom_trx_path_bmp != 0x00) { -+ /* restrict trx_path_bmp with eeprom_trx_path_bmp */ -+ trx_path_bmp &= hal_data->eeprom_trx_path_bmp; -+ if (!trx_path_bmp) { -+ RTW_ERR("%s hal_spec.rf_reg_trx_path_bmp:0x%02x, hal_data->eeprom_trx_path_bmp:0x%02x no intersection\n" -+ , __func__, hal_spec->rf_reg_trx_path_bmp, hal_data->eeprom_trx_path_bmp); -+ return _FAIL; -+ } -+ } -+ -+ /* restrict trx_path_bmp with TX and RX num limit */ -+ trx_path_bmp = rtw_restrict_trx_path_bmp_by_trx_num_lmt(trx_path_bmp -+ , regsty->tx_path_lmt, regsty->rx_path_lmt, &tx_path_num, &rx_path_num); -+ if (!trx_path_bmp) { -+ RTW_ERR("%s rtw_restrict_trx_path_bmp_by_trx_num_lmt(0x%02x, %u, %u) failed\n" -+ , __func__, trx_path_bmp, regsty->tx_path_lmt, regsty->rx_path_lmt); -+ return _FAIL; -+ } -+ hal_data->trx_path_bmp = trx_path_bmp; -+ hal_data->rf_type = trx_bmp_to_rf_type((trx_path_bmp & 0xF0) >> 4, trx_path_bmp & 0x0F); -+ hal_data->NumTotalRFPath = rtw_max(tx_path_num, rx_path_num); -+ -+ hal_data->max_tx_cnt = hal_spec->max_tx_cnt; -+ hal_data->max_tx_cnt = rtw_min(hal_data->max_tx_cnt, tx_path_num); -+ if (hal_data->eeprom_max_tx_cnt) -+ hal_data->max_tx_cnt = rtw_min(hal_data->max_tx_cnt, hal_data->eeprom_max_tx_cnt); -+ -+ if (1) -+ _dump_rf_path(RTW_DBGDUMP, adapter); -+} -+ -+ RTW_INFO("%s trx_path_bmp:0x%02x(%s), NumTotalRFPath:%u, max_tx_cnt:%u\n" -+ , __func__ -+ , hal_data->trx_path_bmp -+ , rf_type_to_rfpath_str(hal_data->rf_type) -+ , hal_data->NumTotalRFPath -+ , hal_data->max_tx_cnt); -+ -+ return _SUCCESS; -+} -+ -+void _dump_trx_nss(void *sel, _adapter *adapter) -+{ -+ struct registry_priv *regpriv = &adapter->registrypriv; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ -+ RTW_PRINT_SEL(sel, "[TRX_Nss] HALSPEC - tx_nss:%d, rx_nss:%d\n", hal_spec->tx_nss_num, hal_spec->rx_nss_num); -+ RTW_PRINT_SEL(sel, "[TRX_Nss] Registry - tx_nss:%d, rx_nss:%d\n", regpriv->tx_nss, regpriv->rx_nss); -+ RTW_PRINT_SEL(sel, "[TRX_Nss] HALDATA - tx_nss:%d, rx_nss:%d\n", GET_HAL_TX_NSS(adapter), GET_HAL_RX_NSS(adapter)); -+ -+} -+#define NSS_VALID(nss) (nss > 0) -+ -+u8 rtw_hal_trxnss_init(_adapter *adapter) -+{ -+ struct registry_priv *regpriv = &adapter->registrypriv; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); -+ enum rf_type rf_path = GET_HAL_RFPATH(adapter); -+ int i; -+ -+ hal_data->tx_nss = hal_spec->tx_nss_num; -+ hal_data->rx_nss = hal_spec->rx_nss_num; -+ -+ if (NSS_VALID(regpriv->tx_nss)) -+ hal_data->tx_nss = rtw_min(hal_data->tx_nss, regpriv->tx_nss); -+ hal_data->tx_nss = rtw_min(hal_data->tx_nss, hal_data->max_tx_cnt); -+ if (NSS_VALID(regpriv->rx_nss)) -+ hal_data->rx_nss = rtw_min(hal_data->rx_nss, regpriv->rx_nss); -+ hal_data->rx_nss = rtw_min(hal_data->rx_nss, rf_type_to_rf_rx_cnt(rf_path)); -+ -+ for (i = 0; i < 4; i++) { -+ if (hal_data->tx_nss < i + 1) -+ break; -+ -+ if (IS_HARDWARE_TYPE_8814B(adapter) /* 8814B is always full-TX */ -+ #ifdef CONFIG_RTW_TX_NPATH_EN -+ /* these IC is capable of full-TX when macro defined */ -+ || IS_HARDWARE_TYPE_8192E(adapter) || IS_HARDWARE_TYPE_8192F(adapter) -+ || IS_HARDWARE_TYPE_8812(adapter) || IS_HARDWARE_TYPE_8822B(adapter) -+ || IS_HARDWARE_TYPE_8822C(adapter) -+ #endif -+ ) -+ hal_data->txpath_cap_num_nss[i] = hal_data->max_tx_cnt; -+ else -+ hal_data->txpath_cap_num_nss[i] = i + 1; -+ } -+ -+ if (1) -+ _dump_trx_nss(RTW_DBGDUMP, adapter); -+ -+ RTW_INFO("%s tx_nss:%u, rx_nss:%u\n", __func__ -+ , hal_data->tx_nss, hal_data->rx_nss); -+ -+ return _SUCCESS; -+} -+ -+#ifdef CONFIG_RTW_SW_LED -+void rtw_hal_sw_led_init(_adapter *padapter) -+{ -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ -+ if (ledpriv->bRegUseLed == _FALSE) -+ return; -+ -+ if (!is_primary_adapter(padapter)) -+ return; -+ -+ if (padapter->hal_func.InitSwLeds) { -+ padapter->hal_func.InitSwLeds(padapter); -+ rtw_led_set_ctl_en_mask_primary(padapter); -+ rtw_led_set_iface_en(padapter, 1); -+ } -+} -+ -+void rtw_hal_sw_led_deinit(_adapter *padapter) -+{ -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ -+ if (ledpriv->bRegUseLed == _FALSE) -+ return; -+ -+ if (!is_primary_adapter(padapter)) -+ return; -+ -+ if (padapter->hal_func.DeInitSwLeds) -+ padapter->hal_func.DeInitSwLeds(padapter); -+} -+#endif -+ -+u32 rtw_hal_power_on(_adapter *padapter) -+{ -+ u32 ret = 0; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ ret = padapter->hal_func.hal_power_on(padapter); -+ -+#ifdef CONFIG_BT_COEXIST -+ if ((ret == _SUCCESS) && (pHalData->EEPROMBluetoothCoexist == _TRUE)) -+ rtw_btcoex_PowerOnSetting(padapter); -+#endif -+ -+ return ret; -+} -+void rtw_hal_power_off(_adapter *padapter) -+{ -+ struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl; -+ -+ _rtw_memset(macid_ctl->h2c_msr, 0, MACID_NUM_SW_LIMIT); -+ _rtw_memset(macid_ctl->op_num, 0, H2C_MSR_ROLE_MAX); -+ -+#ifdef CONFIG_LPS_1T1R -+ GET_HAL_DATA(padapter)->lps_1t1r = 0; -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_PowerOffSetting(padapter); -+#endif -+ -+ padapter->hal_func.hal_power_off(padapter); -+} -+ -+ -+void rtw_hal_init_opmode(_adapter *padapter) -+{ -+ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType = Ndis802_11InfrastructureMax; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ sint fw_state; -+ -+ fw_state = get_fwstate(pmlmepriv); -+ -+ if (fw_state & WIFI_ADHOC_STATE) -+ networkType = Ndis802_11IBSS; -+ else if (fw_state & WIFI_STATION_STATE) -+ networkType = Ndis802_11Infrastructure; -+#ifdef CONFIG_AP_MODE -+ else if (fw_state & WIFI_AP_STATE) -+ networkType = Ndis802_11APMode; -+#endif -+#ifdef CONFIG_RTW_MESH -+ else if (fw_state & WIFI_MESH_STATE) -+ networkType = Ndis802_11_mesh; -+#endif -+ else -+ return; -+ -+ rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_DIRECTLY); -+} -+ -+#ifdef CONFIG_NEW_NETDEV_HDL -+uint rtw_hal_iface_init(_adapter *adapter) -+{ -+ uint status = _SUCCESS; -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter)); -+ #ifdef RTW_HALMAC -+ rtw_hal_hw_port_enable(adapter); -+ #endif -+ rtw_sec_restore_wep_key(adapter); -+ rtw_hal_init_opmode(adapter); -+ rtw_hal_start_thread(adapter); -+ return status; -+} -+uint rtw_hal_init(_adapter *padapter) -+{ -+ uint status = _SUCCESS; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ halrf_set_rfsupportability(adapter_to_phydm(padapter)); -+ -+ status = padapter->hal_func.hal_init(padapter); -+ -+ if(pHalData ->phydm_init_result) { -+ -+ status = _FAIL; -+ RTW_ERR("%s phydm init fail reason=%u \n", -+ __func__, -+ pHalData ->phydm_init_result); -+ } -+ -+ if (status == _SUCCESS) { -+ rtw_set_hw_init_completed(padapter, _TRUE); -+ if (padapter->registrypriv.notch_filter == 1) -+ rtw_hal_notch_filter(padapter, 1); -+ rtw_led_control(padapter, LED_CTL_POWER_ON); -+ init_hw_mlme_ext(padapter); -+ #ifdef CONFIG_RF_POWER_TRIM -+ rtw_bb_rf_gain_offset(padapter); -+ #endif /*CONFIG_RF_POWER_TRIM*/ -+ GET_PRIMARY_ADAPTER(padapter)->bup = _TRUE; /*temporary*/ -+ #ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_mi_set_mbid_cam(padapter); -+ #endif -+ #ifdef CONFIG_SUPPORT_MULTI_BCN -+ rtw_ap_multi_bcn_cfg(padapter); -+ #endif -+ #if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) -+ #ifdef CONFIG_DYNAMIC_SOML -+ rtw_dyn_soml_config(padapter); -+ #endif -+ #endif -+ #ifdef CONFIG_TDMADIG -+ rtw_phydm_tdmadig(padapter, TDMADIG_INIT); -+ #endif/*CONFIG_TDMADIG*/ -+ rtw_phydm_dyn_rrsr_en(padapter,padapter->registrypriv.en_dyn_rrsr); -+ #ifdef RTW_HALMAC -+ RTW_INFO("%s: padapter->registrypriv.set_rrsr_value=0x%x\n", __func__,padapter->registrypriv.set_rrsr_value); -+ if(padapter->registrypriv.set_rrsr_value != 0xFFFFFFFF) -+ rtw_phydm_set_rrsr(padapter, padapter->registrypriv.set_rrsr_value, TRUE); -+ #endif -+ } else { -+ rtw_set_hw_init_completed(padapter, _FALSE); -+ RTW_ERR("%s: hal_init fail\n", __func__); -+ } -+ return status; -+} -+#else -+uint rtw_hal_init(_adapter *padapter) -+{ -+ uint status = _SUCCESS; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ int i; -+ -+ halrf_set_rfsupportability(adapter_to_phydm(padapter)); -+ -+ status = padapter->hal_func.hal_init(padapter); -+ -+ if(pHalData ->phydm_init_result) { -+ -+ status = _FAIL; -+ RTW_ERR("%s phydm init fail reason=%u \n", -+ __func__, -+ pHalData->phydm_init_result); -+ } -+ -+ if (status == _SUCCESS) { -+ rtw_set_hw_init_completed(padapter, _TRUE); -+ rtw_mi_set_mac_addr(padapter);/*set mac addr of all ifaces*/ -+ #ifdef RTW_HALMAC -+ rtw_restore_hw_port_cfg(padapter); -+ #endif -+ if (padapter->registrypriv.notch_filter == 1) -+ rtw_hal_notch_filter(padapter, 1); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) -+ rtw_sec_restore_wep_key(dvobj->padapters[i]); -+ -+ rtw_led_control(padapter, LED_CTL_POWER_ON); -+ -+ init_hw_mlme_ext(padapter); -+ -+ rtw_hal_init_opmode(padapter); -+ -+ #ifdef CONFIG_RF_POWER_TRIM -+ rtw_bb_rf_gain_offset(padapter); -+ #endif /*CONFIG_RF_POWER_TRIM*/ -+ -+ #ifdef CONFIG_SUPPORT_MULTI_BCN -+ rtw_ap_multi_bcn_cfg(padapter); -+ #endif -+ -+#if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) -+#ifdef CONFIG_DYNAMIC_SOML -+ rtw_dyn_soml_config(padapter); -+#endif -+#endif -+ #ifdef CONFIG_TDMADIG -+ rtw_phydm_tdmadig(padapter, TDMADIG_INIT); -+ #endif/*CONFIG_TDMADIG*/ -+ -+ rtw_phydm_dyn_rrsr_en(padapter,padapter->registrypriv.en_dyn_rrsr); -+ #ifdef RTW_HALMAC -+ RTW_INFO("%s: padapter->registrypriv.set_rrsr_value=0x%x\n", __func__,padapter->registrypriv.set_rrsr_value); -+ if(padapter->registrypriv.set_rrsr_value != 0xFFFFFFFF) -+ rtw_phydm_set_rrsr(padapter, padapter->registrypriv.set_rrsr_value, TRUE); -+ #endif -+ -+ } else { -+ rtw_set_hw_init_completed(padapter, _FALSE); -+ RTW_ERR("%s: fail\n", __func__); -+ } -+ -+ -+ return status; -+ -+} -+#endif -+ -+uint rtw_hal_deinit(_adapter *padapter) -+{ -+ uint status = _SUCCESS; -+ -+ status = padapter->hal_func.hal_deinit(padapter); -+ -+ if (status == _SUCCESS) { -+ rtw_led_control(padapter, LED_CTL_POWER_OFF); -+ rtw_set_hw_init_completed(padapter, _FALSE); -+ } else -+ RTW_INFO("\n rtw_hal_deinit: hal_init fail\n"); -+ -+ -+ return status; -+} -+ -+u8 rtw_hal_set_hwreg(_adapter *padapter, u8 variable, u8 *val) -+{ -+ return padapter->hal_func.set_hw_reg_handler(padapter, variable, val); -+} -+ -+void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val) -+{ -+ padapter->hal_func.GetHwRegHandler(padapter, variable, val); -+} -+ -+u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue) -+{ -+ return padapter->hal_func.SetHalDefVarHandler(padapter, eVariable, pValue); -+} -+u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue) -+{ -+ return padapter->hal_func.get_hal_def_var_handler(padapter, eVariable, pValue); -+} -+ -+void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, BOOLEAN bSet) -+{ -+ padapter->hal_func.SetHalODMVarHandler(padapter, eVariable, pValue1, bSet); -+} -+void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, void *pValue2) -+{ -+ padapter->hal_func.GetHalODMVarHandler(padapter, eVariable, pValue1, pValue2); -+} -+ -+/* FOR SDIO & PCIE */ -+void rtw_hal_enable_interrupt(_adapter *padapter) -+{ -+#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) -+ padapter->hal_func.enable_interrupt(padapter); -+#endif /* #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */ -+} -+ -+/* FOR SDIO & PCIE */ -+void rtw_hal_disable_interrupt(_adapter *padapter) -+{ -+#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) -+ padapter->hal_func.disable_interrupt(padapter); -+#endif /* #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */ -+} -+ -+ -+u8 rtw_hal_check_ips_status(_adapter *padapter) -+{ -+ u8 val = _FALSE; -+ if (padapter->hal_func.check_ips_status) -+ val = padapter->hal_func.check_ips_status(padapter); -+ else -+ RTW_INFO("%s: hal_func.check_ips_status is NULL!\n", __FUNCTION__); -+ -+ return val; -+} -+ -+s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan) -+{ -+ s32 ret; -+ -+ ret = padapter->hal_func.fw_dl(padapter, wowlan); -+ -+#ifdef CONFIG_LPS_1T1R -+ GET_HAL_DATA(padapter)->lps_1t1r = 0; -+#endif -+ -+ return ret; -+} -+ -+#ifdef RTW_HALMAC -+s32 rtw_hal_fw_mem_dl(_adapter *padapter, enum fw_mem mem) -+{ -+ systime dlfw_start_time = rtw_get_current_time(); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct debug_priv *pdbgpriv = &dvobj->drv_dbg; -+ s32 rst = _FALSE; -+ -+ rst = padapter->hal_func.fw_mem_dl(padapter, mem); -+ RTW_INFO("%s in %dms\n", __func__, rtw_get_passing_time_ms(dlfw_start_time)); -+ -+ if (rst == _FALSE) -+ pdbgpriv->dbg_fw_mem_dl_error_cnt++; -+ if (1) -+ RTW_INFO("%s dbg_fw_mem_dl_error_cnt:%d\n", __func__, pdbgpriv->dbg_fw_mem_dl_error_cnt); -+ return rst; -+} -+#endif -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+void rtw_hal_clear_interrupt(_adapter *padapter) -+{ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ padapter->hal_func.clear_interrupt(padapter); -+#endif -+} -+#endif -+ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) -+u32 rtw_hal_inirp_init(_adapter *padapter) -+{ -+ if (is_primary_adapter(padapter)) -+ return padapter->hal_func.inirp_init(padapter); -+ return _SUCCESS; -+} -+u32 rtw_hal_inirp_deinit(_adapter *padapter) -+{ -+ -+ if (is_primary_adapter(padapter)) -+ return padapter->hal_func.inirp_deinit(padapter); -+ -+ return _SUCCESS; -+} -+#endif /* #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) */ -+ -+#if defined(CONFIG_PCI_HCI) -+void rtw_hal_irp_reset(_adapter *padapter) -+{ -+ padapter->hal_func.irp_reset(GET_PRIMARY_ADAPTER(padapter)); -+} -+ -+void rtw_hal_pci_dbi_write(_adapter *padapter, u16 addr, u8 data) -+{ -+ u16 cmd[2]; -+ -+ cmd[0] = addr; -+ cmd[1] = data; -+ -+ padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_DBI, (u8 *) cmd); -+} -+ -+u8 rtw_hal_pci_dbi_read(_adapter *padapter, u16 addr) -+{ -+ padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_DBI, (u8 *)(&addr)); -+ -+ return (u8)addr; -+} -+ -+void rtw_hal_pci_mdio_write(_adapter *padapter, u8 addr, u16 data) -+{ -+ u16 cmd[2]; -+ -+ cmd[0] = (u16)addr; -+ cmd[1] = data; -+ -+ padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_MDIO, (u8 *) cmd); -+} -+ -+u16 rtw_hal_pci_mdio_read(_adapter *padapter, u8 addr) -+{ -+ padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_MDIO, &addr); -+ -+ return (u8)addr; -+} -+ -+u8 rtw_hal_pci_l1off_nic_support(_adapter *padapter) -+{ -+ u8 l1off; -+ -+ padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_NIC_SUPPORT, &l1off); -+ return l1off; -+} -+ -+u8 rtw_hal_pci_l1off_capability(_adapter *padapter) -+{ -+ u8 l1off; -+ -+ padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_CAPABILITY, &l1off); -+ return l1off; -+} -+ -+ -+#endif /* #if defined(CONFIG_PCI_HCI) */ -+ -+/* for USB Auto-suspend */ -+u8 rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val) -+{ -+ if (padapter->hal_func.interface_ps_func) -+ return padapter->hal_func.interface_ps_func(padapter, efunc_id, val); -+ return _FAIL; -+} -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+s32 rtw_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ return padapter->hal_func.hal_mgmt_xmitframe_enqueue(padapter, pxmitframe); -+} -+#endif -+ -+s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ return padapter->hal_func.hal_xmitframe_enqueue(padapter, pxmitframe); -+} -+ -+s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ return padapter->hal_func.hal_xmit(padapter, pxmitframe); -+} -+ -+/* -+ * [IMPORTANT] This function would be run in interrupt context. -+ */ -+s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) -+{ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ _irqL irqL; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+#endif -+ s32 ret = _FAIL; -+ -+ update_mgntframe_attrib_addr(padapter, pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ update_mgntframe_subtype(padapter, pmgntframe); -+#endif -+ -+#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) -+ if ((!MLME_IS_MESH(padapter) && SEC_IS_BIP_KEY_INSTALLED(&padapter->securitypriv) == _TRUE) -+ #ifdef CONFIG_RTW_MESH -+ || (MLME_IS_MESH(padapter) && padapter->mesh_info.mesh_auth_id) -+ #endif -+ ) -+ rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe); -+#endif -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ ret = mgmt_xmitframe_enqueue_for_sleeping_sta(padapter, pmgntframe); -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ #ifdef DBG_MGMT_QUEUE -+ if (ret == _TRUE) -+ RTW_INFO("%s doesn't be queued, dattrib->ra:"MAC_FMT" seq_num = %u, subtype = 0x%x\n", -+ __func__, MAC_ARG(pmgntframe->attrib.ra), pmgntframe->attrib.seqnum, pmgntframe->attrib.subtype); -+ #endif -+ -+ if (ret == RTW_QUEUE_MGMT) -+ return ret; -+ } -+#endif -+ -+ ret = padapter->hal_func.mgnt_xmit(padapter, pmgntframe); -+ return ret; -+} -+ -+s32 rtw_hal_init_xmit_priv(_adapter *padapter) -+{ -+ return padapter->hal_func.init_xmit_priv(padapter); -+} -+void rtw_hal_free_xmit_priv(_adapter *padapter) -+{ -+ padapter->hal_func.free_xmit_priv(padapter); -+} -+ -+s32 rtw_hal_init_recv_priv(_adapter *padapter) -+{ -+ return padapter->hal_func.init_recv_priv(padapter); -+} -+void rtw_hal_free_recv_priv(_adapter *padapter) -+{ -+ padapter->hal_func.free_recv_priv(padapter); -+} -+ -+void rtw_sta_ra_registed(_adapter *padapter, struct sta_info *psta) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ -+ if (psta == NULL) { -+ RTW_ERR(FUNC_ADPT_FMT" sta is NULL\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ return; -+ } -+ -+#ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { -+ if (psta->cmn.aid > padapter->stapriv.max_aid) { -+ RTW_ERR("station aid %d exceed the max number\n", psta->cmn.aid); -+ rtw_warn_on(1); -+ return; -+ } -+ rtw_ap_update_sta_ra_info(padapter, psta); -+ } -+#endif -+ -+ psta->cmn.ra_info.ra_bw_mode = rtw_get_tx_bw_mode(padapter, psta); -+ /*set correct initial date rate for each mac_id */ -+ hal_data->INIDATA_RATE[psta->cmn.mac_id] = psta->init_rate; -+ -+ rtw_phydm_ra_registed(padapter, psta); -+} -+ -+void rtw_hal_update_ra_mask(struct sta_info *psta) -+{ -+ _adapter *padapter; -+ -+ if (!psta) -+ return; -+ -+ padapter = psta->padapter; -+ rtw_sta_ra_registed(padapter, psta); -+} -+ -+/* Start specifical interface thread */ -+void rtw_hal_start_thread(_adapter *padapter) -+{ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+#ifndef CONFIG_SDIO_TX_TASKLET -+ padapter->hal_func.run_thread(padapter); -+#endif -+#endif -+} -+/* Start specifical interface thread */ -+void rtw_hal_stop_thread(_adapter *padapter) -+{ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+#ifndef CONFIG_SDIO_TX_TASKLET -+ -+ padapter->hal_func.cancel_thread(padapter); -+ -+#endif -+#endif -+} -+ -+u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask) -+{ -+ u32 data = 0; -+ if (padapter->hal_func.read_bbreg) -+ data = padapter->hal_func.read_bbreg(padapter, RegAddr, BitMask); -+ return data; -+} -+void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data) -+{ -+ if (padapter->hal_func.write_bbreg) -+ padapter->hal_func.write_bbreg(padapter, RegAddr, BitMask, Data); -+} -+ -+u32 rtw_hal_read_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask) -+{ -+ u32 data = 0; -+ -+ if (padapter->hal_func.read_rfreg) { -+ data = padapter->hal_func.read_rfreg(padapter, eRFPath, RegAddr, BitMask); -+ -+ #ifdef DBG_IO -+ if (match_rf_read_sniff_ranges(padapter, eRFPath, RegAddr, BitMask)) { -+ RTW_INFO("DBG_IO rtw_hal_read_rfreg(%u, 0x%04x, 0x%08x) read:0x%08x(0x%08x)\n" -+ , eRFPath, RegAddr, BitMask, (data << PHY_CalculateBitShift(BitMask)), data); -+ } -+ #endif -+ } -+ -+ return data; -+} -+ -+void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data) -+{ -+ if (padapter->hal_func.write_rfreg) { -+ -+ #ifdef DBG_IO -+ if (match_rf_write_sniff_ranges(padapter, eRFPath, RegAddr, BitMask)) { -+ RTW_INFO("DBG_IO rtw_hal_write_rfreg(%u, 0x%04x, 0x%08x) write:0x%08x(0x%08x)\n" -+ , eRFPath, RegAddr, BitMask, (Data << PHY_CalculateBitShift(BitMask)), Data); -+ } -+ #endif -+ -+ padapter->hal_func.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data); -+ -+#ifdef CONFIG_PCI_HCI -+ if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(padapter)) /*For N-Series IC, suggest by Jenyu*/ -+ rtw_udelay_os(2); -+#endif -+ } -+} -+ -+#ifdef CONFIG_SYSON_INDIRECT_ACCESS -+u32 rtw_hal_read_syson_reg(PADAPTER padapter, u32 RegAddr, u32 BitMask) -+{ -+ u32 data = 0; -+ if (padapter->hal_func.read_syson_reg) -+ data = padapter->hal_func.read_syson_reg(padapter, RegAddr, BitMask); -+ -+ return data; -+} -+ -+void rtw_hal_write_syson_reg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data) -+{ -+ if (padapter->hal_func.write_syson_reg) -+ padapter->hal_func.write_syson_reg(padapter, RegAddr, BitMask, Data); -+} -+#endif -+ -+#if defined(CONFIG_PCI_HCI) -+s32 rtw_hal_interrupt_handler(_adapter *padapter) -+{ -+ s32 ret = _FAIL; -+ ret = padapter->hal_func.interrupt_handler(padapter); -+ return ret; -+} -+ -+void rtw_hal_unmap_beacon_icf(_adapter *padapter) -+{ -+ padapter->hal_func.unmap_beacon_icf(padapter); -+} -+#endif -+#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) -+void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf) -+{ -+ padapter->hal_func.interrupt_handler(padapter, pkt_len, pbuf); -+} -+#endif -+ -+void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ /*u8 cch_160 = Bandwidth == CHANNEL_WIDTH_160 ? channel : 0;*/ -+ u8 cch_80 = Bandwidth == CHANNEL_WIDTH_80 ? channel : 0; -+ u8 cch_40 = Bandwidth == CHANNEL_WIDTH_40 ? channel : 0; -+ u8 cch_20 = Bandwidth == CHANNEL_WIDTH_20 ? channel : 0; -+ -+ if (rtw_phydm_is_iqk_in_progress(padapter)) -+ RTW_ERR("%s, %d, IQK may race condition\n", __func__, __LINE__); -+ -+#ifdef CONFIG_MP_INCLUDED -+ /* MP mode channel don't use secondary channel */ -+ if (rtw_mp_mode_check(padapter) == _FALSE) -+#endif -+ { -+ #if 0 -+ if (cch_160 != 0) -+ cch_80 = rtw_get_scch_by_cch_offset(cch_160, CHANNEL_WIDTH_160, Offset80); -+ #endif -+ if (cch_80 != 0) -+ cch_40 = rtw_get_scch_by_cch_offset(cch_80, CHANNEL_WIDTH_80, Offset80); -+ if (cch_40 != 0) -+ cch_20 = rtw_get_scch_by_cch_offset(cch_40, CHANNEL_WIDTH_40, Offset40); -+ } -+ -+ pHalData->cch_80 = cch_80; -+ pHalData->cch_40 = cch_40; -+ pHalData->cch_20 = cch_20; -+ -+ if (0) -+ RTW_INFO("%s cch:%u, %s, offset40:%u, offset80:%u (%u, %u, %u)\n", __func__ -+ , channel, ch_width_str(Bandwidth), Offset40, Offset80 -+ , pHalData->cch_80, pHalData->cch_40, pHalData->cch_20); -+ -+ padapter->hal_func.set_chnl_bw_handler(padapter, channel, Bandwidth, Offset40, Offset80); -+} -+ -+void rtw_hal_dm_watchdog(_adapter *padapter) -+{ -+ -+ rtw_hal_turbo_edca(padapter); -+ padapter->hal_func.hal_dm_watchdog(padapter); -+} -+ -+#ifdef CONFIG_LPS_LCLK_WD_TIMER -+void rtw_hal_dm_watchdog_in_lps(_adapter *padapter) -+{ -+#if defined(CONFIG_CONCURRENT_MODE) -+#ifndef CONFIG_FW_MULTI_PORT_SUPPORT -+ if (padapter->hw_port != HW_PORT0) -+ return; -+#endif -+#endif -+ -+ if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE) -+ rtw_phydm_watchdog_in_lps_lclk(padapter);/* this function caller is in interrupt context */ -+} -+#endif /*CONFIG_LPS_LCLK_WD_TIMER*/ -+ -+void rtw_hal_bcn_related_reg_setting(_adapter *padapter) -+{ -+ padapter->hal_func.SetBeaconRelatedRegistersHandler(padapter); -+} -+ -+#ifdef CONFIG_HOSTAPD_MLME -+s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) -+{ -+ if (padapter->hal_func.hostap_mgnt_xmit_entry) -+ return padapter->hal_func.hostap_mgnt_xmit_entry(padapter, pkt); -+ return _FAIL; -+} -+#endif /* CONFIG_HOSTAPD_MLME */ -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+void rtw_hal_sreset_init(_adapter *padapter) -+{ -+ padapter->hal_func.sreset_init_value(padapter); -+} -+void rtw_hal_sreset_reset(_adapter *padapter) -+{ -+ padapter = GET_PRIMARY_ADAPTER(padapter); -+ padapter->hal_func.silentreset(padapter); -+} -+ -+void rtw_hal_sreset_reset_value(_adapter *padapter) -+{ -+ padapter->hal_func.sreset_reset_value(padapter); -+} -+ -+void rtw_hal_sreset_xmit_status_check(_adapter *padapter) -+{ -+ padapter->hal_func.sreset_xmit_status_check(padapter); -+} -+void rtw_hal_sreset_linked_status_check(_adapter *padapter) -+{ -+ padapter->hal_func.sreset_linked_status_check(padapter); -+} -+u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter) -+{ -+ return padapter->hal_func.sreset_get_wifi_status(padapter); -+} -+ -+bool rtw_hal_sreset_inprogress(_adapter *padapter) -+{ -+ padapter = GET_PRIMARY_ADAPTER(padapter); -+ return padapter->hal_func.sreset_inprogress(padapter); -+} -+#endif /* DBG_CONFIG_ERROR_DETECT */ -+ -+#ifdef CONFIG_IOL -+int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_waiting_ms, u32 bndy_cnt) -+{ -+ if (adapter->hal_func.IOL_exec_cmds_sync) -+ return adapter->hal_func.IOL_exec_cmds_sync(adapter, xmit_frame, max_waiting_ms, bndy_cnt); -+ return _FAIL; -+} -+#endif -+ -+#ifdef CONFIG_XMIT_THREAD_MODE -+s32 rtw_hal_xmit_thread_handler(_adapter *padapter) -+{ -+ return padapter->hal_func.xmit_thread_handler(padapter); -+} -+#endif -+ -+#ifdef CONFIG_RECV_THREAD_MODE -+s32 rtw_hal_recv_hdl(_adapter *adapter) -+{ -+ return adapter->hal_func.recv_hdl(adapter); -+} -+#endif -+ -+void rtw_hal_notch_filter(_adapter *adapter, bool enable) -+{ -+ if (adapter->hal_func.hal_notch_filter) -+ adapter->hal_func.hal_notch_filter(adapter, enable); -+} -+ -+#ifdef CONFIG_FW_C2H_REG -+inline bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf) -+{ -+ HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter); -+ bool ret = _FAIL; -+ -+ ret = C2H_ID_88XX(buf) || C2H_PLEN_88XX(buf); -+ -+ return ret; -+} -+ -+inline s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf) -+{ -+ HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter); -+ s32 ret = _FAIL; -+ -+ ret = c2h_evt_read_88xx(adapter, buf); -+ -+ return ret; -+} -+ -+bool rtw_hal_c2h_reg_hdr_parse(_adapter *adapter, u8 *buf, u8 *id, u8 *seq, u8 *plen, u8 **payload) -+{ -+ HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter); -+ bool ret = _FAIL; -+ -+ *id = C2H_ID_88XX(buf); -+ *seq = C2H_SEQ_88XX(buf); -+ *plen = C2H_PLEN_88XX(buf); -+ *payload = C2H_PAYLOAD_88XX(buf); -+ ret = _SUCCESS; -+ -+ return ret; -+} -+#endif /* CONFIG_FW_C2H_REG */ -+ -+#ifdef CONFIG_FW_C2H_PKT -+bool rtw_hal_c2h_pkt_hdr_parse(_adapter *adapter, u8 *buf, u16 len, u8 *id, u8 *seq, u8 *plen, u8 **payload) -+{ -+ HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter); -+ bool ret = _FAIL; -+ -+ if (!buf || len > 256 || len < 3) -+ goto exit; -+ -+ *id = C2H_ID_88XX(buf); -+ *seq = C2H_SEQ_88XX(buf); -+ *plen = len - 2; -+ *payload = C2H_PAYLOAD_88XX(buf); -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_FW_C2H_PKT */ -+ -+#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B) -+#include /* for MPTBT_FwC2hBtMpCtrl */ -+#endif -+s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) -+{ -+ u8 sub_id = 0; -+ s32 ret = _SUCCESS; -+ -+ switch (id) { -+ case C2H_FW_SCAN_COMPLETE: -+ RTW_INFO("[C2H], FW Scan Complete\n"); -+ break; -+ -+#ifdef CONFIG_BT_COEXIST -+ case C2H_BT_INFO: -+ rtw_btcoex_BtInfoNotify(adapter, plen, payload); -+ break; -+ case C2H_BT_MP_INFO: -+ #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B) -+ MPTBT_FwC2hBtMpCtrl(adapter, payload, plen); -+ #endif -+ rtw_btcoex_BtMpRptNotify(adapter, plen, payload); -+ break; -+ case C2H_MAILBOX_STATUS: -+ RTW_DBG_DUMP("C2H_MAILBOX_STATUS: ", payload, plen); -+ break; -+ case C2H_WLAN_INFO: -+ rtw_btcoex_WlFwDbgInfoNotify(adapter, payload, plen); -+ break; -+#endif /* CONFIG_BT_COEXIST */ -+ -+ case C2H_IQK_FINISH: -+ c2h_iqk_offload(adapter, payload, plen); -+ break; -+ -+#if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) -+ case C2H_FW_CHNL_SWITCH_COMPLETE: -+#ifndef CONFIG_TDLS_CH_SW_V2 -+ rtw_tdls_chsw_oper_done(adapter); -+#endif -+ break; -+#endif -+ -+ case C2H_BCN_EARLY_RPT: -+ rtw_hal_bcn_early_rpt_c2h_handler(adapter); -+ break; -+ -+#ifdef CONFIG_MCC_MODE -+ case C2H_MCC: -+ rtw_hal_mcc_c2h_handler(adapter, plen, payload); -+ break; -+#endif -+ -+#ifdef CONFIG_RTW_MAC_HIDDEN_RPT -+ case C2H_MAC_HIDDEN_RPT: -+ c2h_mac_hidden_rpt_hdl(adapter, payload, plen); -+ break; -+ case C2H_MAC_HIDDEN_RPT_2: -+ c2h_mac_hidden_rpt_2_hdl(adapter, payload, plen); -+ break; -+#endif -+ -+ case C2H_DEFEATURE_DBG: -+ c2h_defeature_dbg_hdl(adapter, payload, plen); -+ break; -+ -+#ifdef CONFIG_RTW_CUSTOMER_STR -+ case C2H_CUSTOMER_STR_RPT: -+ c2h_customer_str_rpt_hdl(adapter, payload, plen); -+ break; -+ case C2H_CUSTOMER_STR_RPT_2: -+ c2h_customer_str_rpt_2_hdl(adapter, payload, plen); -+ break; -+#endif -+#ifdef RTW_PER_CMD_SUPPORT_FW -+ case C2H_PER_RATE_RPT: -+ c2h_per_rate_rpt_hdl(adapter, payload, plen); -+ break; -+#endif -+#ifdef CONFIG_LPS_ACK -+ case C2H_LPS_STATUS_RPT: -+ c2h_lps_status_rpt(adapter, payload, plen); -+ break; -+#endif -+#ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX -+ case C2H_SET_TXPWR_FINISH: -+ c2h_txpwr_idx_offload_done(adapter, payload, plen); -+ break; -+#endif -+ case C2H_EXTEND: -+ sub_id = payload[0]; -+ /* no handle, goto default */ -+ /* fall through */ -+ -+ default: -+ if (phydm_c2H_content_parsing(adapter_to_phydm(adapter), id, plen, payload) != TRUE) -+ ret = _FAIL; -+ break; -+ } -+ -+ if (ret != _SUCCESS) { -+ if (id == C2H_EXTEND) -+ RTW_WARN("%s: unknown C2H(0x%02x, 0x%02x)\n", __func__, id, sub_id); -+ else -+ RTW_WARN("%s: unknown C2H(0x%02x)\n", __func__, id); -+ } -+ -+ return ret; -+} -+ -+#ifndef RTW_HALMAC -+s32 rtw_hal_c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) -+{ -+ s32 ret = _FAIL; -+ -+ ret = adapter->hal_func.c2h_handler(adapter, id, seq, plen, payload); -+ if (ret != _SUCCESS) -+ ret = c2h_handler(adapter, id, seq, plen, payload); -+ -+ return ret; -+} -+ -+s32 rtw_hal_c2h_id_handle_directly(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) -+{ -+ switch (id) { -+ case C2H_CCX_TX_RPT: -+ case C2H_BT_MP_INFO: -+ case C2H_FW_CHNL_SWITCH_COMPLETE: -+ case C2H_IQK_FINISH: -+ case C2H_MCC: -+ case C2H_BCN_EARLY_RPT: -+ case C2H_AP_REQ_TXRPT: -+ case C2H_SPC_STAT: -+ case C2H_SET_TXPWR_FINISH: -+ return _TRUE; -+ default: -+ return _FALSE; -+ } -+} -+#endif /* !RTW_HALMAC */ -+ -+s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter) -+{ -+ return GET_HAL_DATA(padapter)->bDisableSWChannelPlan; -+} -+ -+#ifdef CONFIG_PROTSEL_MACSLEEP -+static s32 _rtw_hal_macid_sleep(_adapter *adapter, u8 macid, u8 sleep) -+{ -+ struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); -+ u16 reg_sleep_info = macid_ctl->reg_sleep_info; -+ u16 reg_sleep_ctrl = macid_ctl->reg_sleep_ctrl; -+ const u32 sel_mask_sel = BIT(0) | BIT(1) | BIT(2); -+ u8 bit_shift; -+ u32 val32; -+ s32 ret = _FAIL; -+ -+ if (macid >= macid_ctl->num) { -+ RTW_ERR(ADPT_FMT" %s invalid macid(%u)\n" -+ , ADPT_ARG(adapter), sleep ? "sleep" : "wakeup" , macid); -+ goto exit; -+ } -+ -+ if (macid < 32) { -+ bit_shift = macid; -+ #if (MACID_NUM_SW_LIMIT > 32) -+ } else if (macid < 64) { -+ bit_shift = macid - 32; -+ #endif -+ #if (MACID_NUM_SW_LIMIT > 64) -+ } else if (macid < 96) { -+ bit_shift = macid - 64; -+ #endif -+ #if (MACID_NUM_SW_LIMIT > 96) -+ } else if (macid < 128) { -+ bit_shift = macid - 96; -+ #endif -+ } else { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (!reg_sleep_ctrl || !reg_sleep_info) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ val32 = rtw_read32(adapter, reg_sleep_ctrl); -+ val32 = (val32 &~sel_mask_sel) | ((macid / 32) & sel_mask_sel); -+ rtw_write32(adapter, reg_sleep_ctrl, val32); -+ -+ val32 = rtw_read32(adapter, reg_sleep_info); -+ RTW_INFO(ADPT_FMT" %s macid=%d, ori reg_0x%03x=0x%08x\n" -+ , ADPT_ARG(adapter), sleep ? "sleep" : "wakeup" -+ , macid, reg_sleep_info, val32); -+ -+ ret = _SUCCESS; -+ -+ if (sleep) { -+ if (val32 & BIT(bit_shift)) -+ goto exit; -+ val32 |= BIT(bit_shift); -+ } else { -+ if (!(val32 & BIT(bit_shift))) -+ goto exit; -+ val32 &= ~BIT(bit_shift); -+ } -+ -+ rtw_write32(adapter, reg_sleep_info, val32); -+ -+exit: -+ return ret; -+} -+#else -+static s32 _rtw_hal_macid_sleep(_adapter *adapter, u8 macid, u8 sleep) -+{ -+ struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); -+ u16 reg_sleep; -+ u8 bit_shift; -+ u32 val32; -+ s32 ret = _FAIL; -+ -+ if (macid >= macid_ctl->num) { -+ RTW_ERR(ADPT_FMT" %s invalid macid(%u)\n" -+ , ADPT_ARG(adapter), sleep ? "sleep" : "wakeup" , macid); -+ goto exit; -+ } -+ -+ if (macid < 32) { -+ reg_sleep = macid_ctl->reg_sleep_m0; -+ bit_shift = macid; -+ #if (MACID_NUM_SW_LIMIT > 32) -+ } else if (macid < 64) { -+ reg_sleep = macid_ctl->reg_sleep_m1; -+ bit_shift = macid - 32; -+ #endif -+ #if (MACID_NUM_SW_LIMIT > 64) -+ } else if (macid < 96) { -+ reg_sleep = macid_ctl->reg_sleep_m2; -+ bit_shift = macid - 64; -+ #endif -+ #if (MACID_NUM_SW_LIMIT > 96) -+ } else if (macid < 128) { -+ reg_sleep = macid_ctl->reg_sleep_m3; -+ bit_shift = macid - 96; -+ #endif -+ } else { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (!reg_sleep) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ val32 = rtw_read32(adapter, reg_sleep); -+ RTW_INFO(ADPT_FMT" %s macid=%d, ori reg_0x%03x=0x%08x\n" -+ , ADPT_ARG(adapter), sleep ? "sleep" : "wakeup" -+ , macid, reg_sleep, val32); -+ -+ ret = _SUCCESS; -+ -+ if (sleep) { -+ if (val32 & BIT(bit_shift)) -+ goto exit; -+ val32 |= BIT(bit_shift); -+ } else { -+ if (!(val32 & BIT(bit_shift))) -+ goto exit; -+ val32 &= ~BIT(bit_shift); -+ } -+ -+ rtw_write32(adapter, reg_sleep, val32); -+ -+exit: -+ return ret; -+} -+#endif -+ -+inline s32 rtw_hal_macid_sleep(_adapter *adapter, u8 macid) -+{ -+ return _rtw_hal_macid_sleep(adapter, macid, 1); -+} -+ -+inline s32 rtw_hal_macid_wakeup(_adapter *adapter, u8 macid) -+{ -+ return _rtw_hal_macid_sleep(adapter, macid, 0); -+} -+ -+#ifdef CONFIG_PROTSEL_MACSLEEP -+static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8 sleep) -+{ -+ struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); -+ u16 reg_sleep_info = macid_ctl->reg_sleep_info; -+ u16 reg_sleep_ctrl = macid_ctl->reg_sleep_ctrl; -+ const u32 sel_mask_sel = BIT(0) | BIT(1) | BIT(2); -+ u32 m; -+ u8 mid = 0; -+ u32 val32; -+ -+ do { -+ if (mid == 0) { -+ m = bmp->m0; -+ #if (MACID_NUM_SW_LIMIT > 32) -+ } else if (mid == 1) { -+ m = bmp->m1; -+ #endif -+ #if (MACID_NUM_SW_LIMIT > 64) -+ } else if (mid == 2) { -+ m = bmp->m2; -+ #endif -+ #if (MACID_NUM_SW_LIMIT > 96) -+ } else if (mid == 3) { -+ m = bmp->m3; -+ #endif -+ } else { -+ rtw_warn_on(1); -+ break; -+ } -+ -+ if (m == 0) -+ goto move_next; -+ -+ if (!reg_sleep_ctrl || !reg_sleep_info) { -+ rtw_warn_on(1); -+ break; -+ } -+ -+ val32 = rtw_read32(adapter, reg_sleep_ctrl); -+ val32 = (val32 &~sel_mask_sel) | (mid & sel_mask_sel); -+ rtw_write32(adapter, reg_sleep_ctrl, val32); -+ -+ val32 = rtw_read32(adapter, reg_sleep_info); -+ RTW_INFO(ADPT_FMT" %s m%u=0x%08x, ori reg_0x%03x=0x%08x\n" -+ , ADPT_ARG(adapter), sleep ? "sleep" : "wakeup" -+ , mid, m, reg_sleep_info, val32); -+ -+ if (sleep) { -+ if ((val32 & m) == m) -+ goto move_next; -+ val32 |= m; -+ } else { -+ if ((val32 & m) == 0) -+ goto move_next; -+ val32 &= ~m; -+ } -+ -+ rtw_write32(adapter, reg_sleep_info, val32); -+ -+move_next: -+ mid++; -+ } while (mid * 32 < MACID_NUM_SW_LIMIT); -+ -+ return _SUCCESS; -+} -+#else -+static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8 sleep) -+{ -+ struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); -+ u16 reg_sleep; -+ u32 m; -+ u8 mid = 0; -+ u32 val32; -+ -+ do { -+ if (mid == 0) { -+ m = bmp->m0; -+ reg_sleep = macid_ctl->reg_sleep_m0; -+ #if (MACID_NUM_SW_LIMIT > 32) -+ } else if (mid == 1) { -+ m = bmp->m1; -+ reg_sleep = macid_ctl->reg_sleep_m1; -+ #endif -+ #if (MACID_NUM_SW_LIMIT > 64) -+ } else if (mid == 2) { -+ m = bmp->m2; -+ reg_sleep = macid_ctl->reg_sleep_m2; -+ #endif -+ #if (MACID_NUM_SW_LIMIT > 96) -+ } else if (mid == 3) { -+ m = bmp->m3; -+ reg_sleep = macid_ctl->reg_sleep_m3; -+ #endif -+ } else { -+ rtw_warn_on(1); -+ break; -+ } -+ -+ if (m == 0) -+ goto move_next; -+ -+ if (!reg_sleep) { -+ rtw_warn_on(1); -+ break; -+ } -+ -+ val32 = rtw_read32(adapter, reg_sleep); -+ RTW_INFO(ADPT_FMT" %s m%u=0x%08x, ori reg_0x%03x=0x%08x\n" -+ , ADPT_ARG(adapter), sleep ? "sleep" : "wakeup" -+ , mid, m, reg_sleep, val32); -+ -+ if (sleep) { -+ if ((val32 & m) == m) -+ goto move_next; -+ val32 |= m; -+ } else { -+ if ((val32 & m) == 0) -+ goto move_next; -+ val32 &= ~m; -+ } -+ -+ rtw_write32(adapter, reg_sleep, val32); -+ -+move_next: -+ mid++; -+ } while (mid * 32 < MACID_NUM_SW_LIMIT); -+ -+ return _SUCCESS; -+} -+#endif -+ -+inline s32 rtw_hal_macid_sleep_all_used(_adapter *adapter) -+{ -+ struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); -+ -+ return _rtw_hal_macid_bmp_sleep(adapter, &macid_ctl->used, 1); -+} -+ -+inline s32 rtw_hal_macid_wakeup_all_used(_adapter *adapter) -+{ -+ struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); -+ -+ return _rtw_hal_macid_bmp_sleep(adapter, &macid_ctl->used, 0); -+} -+ -+static s32 _rtw_hal_macid_drop(_adapter *adapter, u8 macid, u8 drop) -+{ -+ struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter); -+#ifndef CONFIG_PROTSEL_MACSLEEP -+ u16 reg_drop = 0; -+#else -+ u16 reg_drop_info = macid_ctl->reg_drop_info; -+ u16 reg_drop_ctrl = macid_ctl->reg_drop_ctrl; -+ const u32 sel_mask_sel = BIT(0) | BIT(1) | BIT(2); -+#endif /* CONFIG_PROTSEL_MACSLEEP */ -+ u8 bit_shift; -+ u32 val32; -+ s32 ret = _FAIL; -+/* some IC doesn't have this register */ -+#ifndef REG_PKT_BUFF_ACCESS_CTRL -+#define REG_PKT_BUFF_ACCESS_CTRL 0 -+#endif -+ -+ if (macid >= macid_ctl->num) { -+ RTW_ERR(ADPT_FMT" %s invalid macid(%u)\n" -+ , ADPT_ARG(adapter), drop ? "drop" : "undrop" , macid); -+ goto exit; -+ } -+ -+ if(_rtw_macid_ctl_chk_cap(adapter, MACID_DROP)) { -+ if (macid < 32) { -+#ifndef CONFIG_PROTSEL_MACSLEEP -+ reg_drop = macid_ctl->reg_drop_m0; -+#endif /* CONFIG_PROTSEL_MACSLEEP */ -+ bit_shift = macid; -+ #if (MACID_NUM_SW_LIMIT > 32) -+ } else if (macid < 64) { -+#ifndef CONFIG_PROTSEL_MACSLEEP -+ reg_drop = macid_ctl->reg_drop_m1; -+#endif /* CONFIG_PROTSEL_MACSLEEP */ -+ bit_shift = macid - 32; -+ #endif -+ #if (MACID_NUM_SW_LIMIT > 64) -+ } else if (macid < 96) { -+#ifndef CONFIG_PROTSEL_MACSLEEP -+ reg_drop = macid_ctl->reg_drop_m2; -+#endif /* CONFIG_PROTSEL_MACSLEEP */ -+ bit_shift = macid - 64; -+ #endif -+ #if (MACID_NUM_SW_LIMIT > 96) -+ } else if (macid < 128) { -+#ifndef CONFIG_PROTSEL_MACSLEEP -+ reg_drop = macid_ctl->reg_drop_m3; -+#endif /* CONFIG_PROTSEL_MACSLEEP */ -+ bit_shift = macid - 96; -+ #endif -+ } else { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+#ifndef CONFIG_PROTSEL_MACSLEEP -+ if (!reg_drop) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ val32 = rtw_read32(adapter, reg_drop); -+ /*RTW_INFO(ADPT_FMT" %s macid=%d, ori reg_0x%03x=0x%08x \n" -+ , ADPT_ARG(adapter), drop ? "drop" : "undrop" -+ , macid, reg_drop, val32);*/ -+#else -+ if (!reg_drop_ctrl || !reg_drop_info) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ val32 = rtw_read32(adapter, reg_drop_ctrl); -+ val32 = (val32 &~sel_mask_sel) | ((macid / 32) & sel_mask_sel); -+ rtw_write32(adapter, reg_drop_ctrl, val32); -+ -+ val32 = rtw_read32(adapter, reg_drop_info); -+ /*RTW_INFO(ADPT_FMT" %s macid=%d, ori reg_0x%03x=0x%08x\n" -+ , ADPT_ARG(adapter), drop ? "drop" : "undrop" -+ , macid, reg_drop_info, val32);*/ -+#endif /* CONFIG_PROTSEL_MACSLEEP */ -+ ret = _SUCCESS; -+ -+ if (drop) { -+ if (val32 & BIT(bit_shift)) -+ goto exit; -+ val32 |= BIT(bit_shift); -+ } else { -+ if (!(val32 & BIT(bit_shift))) -+ goto exit; -+ val32 &= ~BIT(bit_shift); -+ } -+ -+#ifndef CONFIG_PROTSEL_MACSLEEP -+ rtw_write32(adapter, reg_drop, val32); -+ RTW_INFO(ADPT_FMT" %s macid=%d, done reg_0x%03x=0x%08x\n" -+ , ADPT_ARG(adapter), drop ? "drop" : "undrop" -+ , macid, reg_drop, val32); -+#else -+ rtw_write32(adapter, reg_drop_info, val32); -+ RTW_INFO(ADPT_FMT" %s macid=%d, done reg_0x%03x=0x%08x\n" -+ , ADPT_ARG(adapter), drop ? "drop" : "undrop" -+ , macid, reg_drop_info, val32); -+#endif /* CONFIG_PROTSEL_MACSLEEP */ -+ -+ -+ } else if(_rtw_macid_ctl_chk_cap(adapter, MACID_DROP_INDIRECT)) { -+ u16 start_addr = macid_ctl->macid_txrpt/8; -+ u32 txrpt_h4b = 0; -+ u8 i; -+ -+ /* each address means 1 byte */ -+ start_addr += macid*(macid_ctl->macid_txrpt_pgsz/8); -+ /* select tx report buffer */ -+ rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXREPORT_BUF_SELECT); -+ /* set tx report buffer start address for reading */ -+ rtw_write32(adapter, REG_PKTBUF_DBG_CTRL, start_addr); -+ txrpt_h4b = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H); -+ /* OFFSET5 BIT2 is BIT10 of high 4 bytes */ -+ if (drop) { -+ if (txrpt_h4b & BIT(10)) -+ goto exit; -+ txrpt_h4b |= BIT(10); -+ } else { -+ if (!(txrpt_h4b & BIT(10))) -+ goto exit; -+ txrpt_h4b &= ~BIT(10); -+ } -+ /* set to macid drop field */ -+ rtw_write32(adapter, REG_PKTBUF_DBG_DATA_H, txrpt_h4b); -+ /* 0x20800000 only write BIT10 of tx report buf */ -+ rtw_write32(adapter, REG_PKTBUF_DBG_CTRL, 0x20800000 | start_addr); -+#if 0 /* some ICs doesn't clear the write done bit */ -+ /* checking TX queue status */ -+ for (i = 0 ; i < 50 ; i++) { -+ txrpt_h4b = rtw_read32(adapter, REG_PKTBUF_DBG_CTRL); -+ if (txrpt_h4b & BIT(23)) { -+ RTW_INFO("%s: wait to write TX RTP buf (%d)!\n", __func__, i); -+ rtw_mdelay_os(10); -+ } else { -+ RTW_INFO("%s: wait to write TX RTP buf done (%d)!\n", __func__, i); -+ break; -+ } -+ } -+#endif -+ rtw_write32(adapter, REG_PKTBUF_DBG_CTRL, start_addr); -+ RTW_INFO("start_addr=%x, data_H:%08x, data_L:%08x, macid=%d, txrpt_h4b=%x\n", start_addr -+ ,rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H), rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L), macid, txrpt_h4b); -+ } else { -+ RTW_INFO("There is no definition for camctl cap , please correct it\n"); -+ } -+exit: -+ return ret; -+} -+ -+inline s32 rtw_hal_macid_drop(_adapter *adapter, u8 macid) -+{ -+ return _rtw_hal_macid_drop(adapter, macid, 1); -+} -+ -+inline s32 rtw_hal_macid_undrop(_adapter *adapter, u8 macid) -+{ -+ return _rtw_hal_macid_drop(adapter, macid, 0); -+} -+ -+s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) -+{ -+ _adapter *pri_adapter = GET_PRIMARY_ADAPTER(padapter); -+ -+ if (GET_HAL_DATA(pri_adapter)->bFWReady == _TRUE) -+ return padapter->hal_func.fill_h2c_cmd(padapter, ElementID, CmdLen, pCmdBuffer); -+ else if (padapter->registrypriv.mp_mode == 0) -+ RTW_PRINT(FUNC_ADPT_FMT" FW doesn't exit when no MP mode, by pass H2C id:0x%02x\n" -+ , FUNC_ADPT_ARG(padapter), ElementID); -+ return _FAIL; -+} -+ -+void rtw_hal_fill_fake_txdesc(_adapter *padapter, u8 *pDesc, u32 BufferLen, -+ u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame) -+{ -+ padapter->hal_func.fill_fake_txdesc(padapter, pDesc, BufferLen, IsPsPoll, IsBTQosNull, bDataFrame); -+ -+} -+ -+u8 rtw_hal_get_txbuff_rsvd_page_num(_adapter *adapter, bool wowlan) -+{ -+ u8 num = 0; -+ -+ -+ if (adapter->hal_func.hal_get_tx_buff_rsvd_page_num) { -+ num = adapter->hal_func.hal_get_tx_buff_rsvd_page_num(adapter, wowlan); -+ } else { -+#ifdef RTW_HALMAC -+ num = GET_HAL_DATA(adapter)->drv_rsvd_page_number; -+#endif /* RTW_HALMAC */ -+ } -+ -+ return num; -+} -+ -+#ifdef CONFIG_GPIO_API -+void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag) -+{ -+ if (padapter->hal_func.update_hisr_hsisr_ind) -+ padapter->hal_func.update_hisr_hsisr_ind(padapter, flag); -+} -+ -+int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num) -+{ -+ int ret = _SUCCESS; -+ -+ if (padapter->hal_func.hal_gpio_func_check) -+ ret = padapter->hal_func.hal_gpio_func_check(padapter, gpio_num); -+ -+ return ret; -+} -+ -+void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num) -+{ -+ if (padapter->hal_func.hal_gpio_multi_func_reset) -+ padapter->hal_func.hal_gpio_multi_func_reset(padapter, gpio_num); -+} -+#endif -+ -+#ifdef CONFIG_FW_CORRECT_BCN -+void rtw_hal_fw_correct_bcn(_adapter *padapter) -+{ -+ if (padapter->hal_func.fw_correct_bcn) -+ padapter->hal_func.fw_correct_bcn(padapter); -+} -+#endif -+ -+void rtw_hal_set_tx_power_level(_adapter *adapter, u8 channel) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ if (phy_chk_ch_setting_consistency(adapter, channel) != _SUCCESS) -+ return; -+ -+ hal_data->set_entire_txpwr = 1; -+ -+ adapter->hal_func.set_tx_power_level_handler(adapter, channel); -+ rtw_hal_set_txpwr_done(adapter); -+ -+ hal_data->set_entire_txpwr = 0; -+} -+ -+void rtw_hal_update_txpwr_level(_adapter *adapter) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ -+ rtw_hal_set_tx_power_level(adapter, hal_data->current_channel); -+ rtw_rfctl_update_op_mode(adapter_to_rfctl(adapter), 0, 0); -+} -+ -+void rtw_hal_set_txpwr_done(_adapter *adapter) -+{ -+ if (adapter->hal_func.set_txpwr_done) -+ adapter->hal_func.set_txpwr_done(adapter); -+} -+ -+void rtw_hal_set_tx_power_index(_adapter *adapter, u32 powerindex -+ , enum rf_path rfpath, u8 rate) -+{ -+ adapter->hal_func.set_tx_power_index_handler(adapter, powerindex, rfpath, rate); -+} -+ -+u8 rtw_hal_get_tx_power_index(_adapter *adapter, enum rf_path rfpath -+ , RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch -+ , struct txpwr_idx_comp *tic) -+{ -+ return adapter->hal_func.get_tx_power_index_handler(adapter, rfpath -+ , rs, rate, bw, band, cch, opch, tic); -+} -+ -+s8 rtw_hal_get_txpwr_target_extra_bias(_adapter *adapter, enum rf_path rfpath -+ , RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch) -+{ -+ s8 val = 0; -+ -+ if (adapter->hal_func.get_txpwr_target_extra_bias) { -+ val = adapter->hal_func.get_txpwr_target_extra_bias(adapter -+ , rfpath, rs, rate, bw, band, cch); -+ } -+ -+ return val; -+} -+ -+#ifdef RTW_HALMAC -+/* -+ * Description: -+ * Initialize MAC registers -+ * -+ * Return: -+ * _TRUE success -+ * _FALSE fail -+ */ -+u8 rtw_hal_init_mac_register(PADAPTER adapter) -+{ -+ return adapter->hal_func.init_mac_register(adapter); -+} -+ -+/* -+ * Description: -+ * Initialize PHY(BB/RF) related functions -+ * -+ * Return: -+ * _TRUE success -+ * _FALSE fail -+ */ -+u8 rtw_hal_init_phy(PADAPTER adapter) -+{ -+ return adapter->hal_func.init_phy(adapter); -+} -+#endif /* RTW_HALMAC */ -+ -+#ifdef CONFIG_RFKILL_POLL -+bool rtw_hal_rfkill_poll(_adapter *adapter, u8 *valid) -+{ -+ bool ret; -+ -+ if (adapter->hal_func.hal_radio_onoff_check) -+ ret = adapter->hal_func.hal_radio_onoff_check(adapter, valid); -+ else { -+ *valid = 0; -+ ret = _FALSE; -+ } -+ return ret; -+} -+#endif -+ -+#define rtw_hal_error_msg(ops_fun) \ -+ RTW_PRINT("### %s - Error : Please hook hal_func.%s ###\n", __FUNCTION__, ops_fun) -+ -+u8 rtw_hal_ops_check(_adapter *padapter) -+{ -+ u8 ret = _SUCCESS; -+#if 1 -+ /*** initialize section ***/ -+ if (NULL == padapter->hal_func.read_chip_version) { -+ rtw_hal_error_msg("read_chip_version"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.init_default_value) { -+ rtw_hal_error_msg("init_default_value"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.intf_chip_configure) { -+ rtw_hal_error_msg("intf_chip_configure"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.read_adapter_info) { -+ rtw_hal_error_msg("read_adapter_info"); -+ ret = _FAIL; -+ } -+ -+ if (NULL == padapter->hal_func.hal_power_on) { -+ rtw_hal_error_msg("hal_power_on"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.hal_power_off) { -+ rtw_hal_error_msg("hal_power_off"); -+ ret = _FAIL; -+ } -+ -+ if (NULL == padapter->hal_func.hal_init) { -+ rtw_hal_error_msg("hal_init"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.hal_deinit) { -+ rtw_hal_error_msg("hal_deinit"); -+ ret = _FAIL; -+ } -+ -+ /*** xmit section ***/ -+ if (NULL == padapter->hal_func.init_xmit_priv) { -+ rtw_hal_error_msg("init_xmit_priv"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.free_xmit_priv) { -+ rtw_hal_error_msg("free_xmit_priv"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.hal_xmit) { -+ rtw_hal_error_msg("hal_xmit"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.mgnt_xmit) { -+ rtw_hal_error_msg("mgnt_xmit"); -+ ret = _FAIL; -+ } -+#ifdef CONFIG_XMIT_THREAD_MODE -+ if (NULL == padapter->hal_func.xmit_thread_handler) { -+ rtw_hal_error_msg("xmit_thread_handler"); -+ ret = _FAIL; -+ } -+#endif -+ if (NULL == padapter->hal_func.hal_xmitframe_enqueue) { -+ rtw_hal_error_msg("hal_xmitframe_enqueue"); -+ ret = _FAIL; -+ } -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+#ifndef CONFIG_SDIO_TX_TASKLET -+ if (NULL == padapter->hal_func.run_thread) { -+ rtw_hal_error_msg("run_thread"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.cancel_thread) { -+ rtw_hal_error_msg("cancel_thread"); -+ ret = _FAIL; -+ } -+#endif -+#endif -+ -+ /*** recv section ***/ -+ if (NULL == padapter->hal_func.init_recv_priv) { -+ rtw_hal_error_msg("init_recv_priv"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.free_recv_priv) { -+ rtw_hal_error_msg("free_recv_priv"); -+ ret = _FAIL; -+ } -+#ifdef CONFIG_RECV_THREAD_MODE -+ if (NULL == padapter->hal_func.recv_hdl) { -+ rtw_hal_error_msg("recv_hdl"); -+ ret = _FAIL; -+ } -+#endif -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) -+ if (NULL == padapter->hal_func.inirp_init) { -+ rtw_hal_error_msg("inirp_init"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.inirp_deinit) { -+ rtw_hal_error_msg("inirp_deinit"); -+ ret = _FAIL; -+ } -+#endif /* #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) */ -+ -+ -+ /*** interrupt hdl section ***/ -+#if defined(CONFIG_PCI_HCI) -+ if (NULL == padapter->hal_func.irp_reset) { -+ rtw_hal_error_msg("irp_reset"); -+ ret = _FAIL; -+ } -+#endif/*#if defined(CONFIG_PCI_HCI)*/ -+#if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)) -+ if (NULL == padapter->hal_func.interrupt_handler) { -+ rtw_hal_error_msg("interrupt_handler"); -+ ret = _FAIL; -+ } -+#endif /*#if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT))*/ -+ -+#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) -+ if (NULL == padapter->hal_func.enable_interrupt) { -+ rtw_hal_error_msg("enable_interrupt"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.disable_interrupt) { -+ rtw_hal_error_msg("disable_interrupt"); -+ ret = _FAIL; -+ } -+#endif /* defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */ -+ -+ -+ /*** DM section ***/ -+ if (NULL == padapter->hal_func.dm_init) { -+ rtw_hal_error_msg("dm_init"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.dm_deinit) { -+ rtw_hal_error_msg("dm_deinit"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.hal_dm_watchdog) { -+ rtw_hal_error_msg("hal_dm_watchdog"); -+ ret = _FAIL; -+ } -+ -+ /*** xxx section ***/ -+ if (NULL == padapter->hal_func.set_chnl_bw_handler) { -+ rtw_hal_error_msg("set_chnl_bw_handler"); -+ ret = _FAIL; -+ } -+ -+ if (NULL == padapter->hal_func.set_hw_reg_handler) { -+ rtw_hal_error_msg("set_hw_reg_handler"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.GetHwRegHandler) { -+ rtw_hal_error_msg("GetHwRegHandler"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.get_hal_def_var_handler) { -+ rtw_hal_error_msg("get_hal_def_var_handler"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.SetHalDefVarHandler) { -+ rtw_hal_error_msg("SetHalDefVarHandler"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.GetHalODMVarHandler) { -+ rtw_hal_error_msg("GetHalODMVarHandler"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.SetHalODMVarHandler) { -+ rtw_hal_error_msg("SetHalODMVarHandler"); -+ ret = _FAIL; -+ } -+ -+ if (NULL == padapter->hal_func.SetBeaconRelatedRegistersHandler) { -+ rtw_hal_error_msg("SetBeaconRelatedRegistersHandler"); -+ ret = _FAIL; -+ } -+ -+ if (NULL == padapter->hal_func.fill_h2c_cmd) { -+ rtw_hal_error_msg("fill_h2c_cmd"); -+ ret = _FAIL; -+ } -+ -+#ifdef RTW_HALMAC -+ if (NULL == padapter->hal_func.hal_mac_c2h_handler) { -+ rtw_hal_error_msg("hal_mac_c2h_handler"); -+ ret = _FAIL; -+ } -+#elif !defined(CONFIG_RTL8188E) -+ if (NULL == padapter->hal_func.c2h_handler) { -+ rtw_hal_error_msg("c2h_handler"); -+ ret = _FAIL; -+ } -+#endif -+ -+#if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ if (NULL == padapter->hal_func.fill_fake_txdesc) { -+ rtw_hal_error_msg("fill_fake_txdesc"); -+ ret = _FAIL; -+ } -+#endif -+ -+#ifndef RTW_HALMAC -+ if (NULL == padapter->hal_func.hal_get_tx_buff_rsvd_page_num) { -+ rtw_hal_error_msg("hal_get_tx_buff_rsvd_page_num"); -+ ret = _FAIL; -+ } -+#endif /* !RTW_HALMAC */ -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ if (NULL == padapter->hal_func.clear_interrupt) { -+ rtw_hal_error_msg("clear_interrupt"); -+ ret = _FAIL; -+ } -+#endif -+#endif /* CONFIG_WOWLAN */ -+ -+ if (NULL == padapter->hal_func.fw_dl) { -+ rtw_hal_error_msg("fw_dl"); -+ ret = _FAIL; -+ } -+ -+ #ifdef CONFIG_FW_CORRECT_BCN -+ if (IS_HARDWARE_TYPE_8814A(padapter) -+ && NULL == padapter->hal_func.fw_correct_bcn) { -+ rtw_hal_error_msg("fw_correct_bcn"); -+ ret = _FAIL; -+ } -+ #endif -+ -+ if (!padapter->hal_func.set_tx_power_level_handler) { -+ rtw_hal_error_msg("set_tx_power_level_handler"); -+ ret = _FAIL; -+ } -+ if (!padapter->hal_func.set_tx_power_index_handler) { -+ rtw_hal_error_msg("set_tx_power_index_handler"); -+ ret = _FAIL; -+ } -+ if (!padapter->hal_func.get_tx_power_index_handler) { -+ rtw_hal_error_msg("get_tx_power_index_handler"); -+ ret = _FAIL; -+ } -+ -+ /*** SReset section ***/ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ if (NULL == padapter->hal_func.sreset_init_value) { -+ rtw_hal_error_msg("sreset_init_value"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.sreset_reset_value) { -+ rtw_hal_error_msg("sreset_reset_value"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.silentreset) { -+ rtw_hal_error_msg("silentreset"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.sreset_xmit_status_check) { -+ rtw_hal_error_msg("sreset_xmit_status_check"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.sreset_linked_status_check) { -+ rtw_hal_error_msg("sreset_linked_status_check"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.sreset_get_wifi_status) { -+ rtw_hal_error_msg("sreset_get_wifi_status"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.sreset_inprogress) { -+ rtw_hal_error_msg("sreset_inprogress"); -+ ret = _FAIL; -+ } -+#endif /* #ifdef DBG_CONFIG_ERROR_DETECT */ -+ -+#ifdef RTW_HALMAC -+ if (NULL == padapter->hal_func.init_mac_register) { -+ rtw_hal_error_msg("init_mac_register"); -+ ret = _FAIL; -+ } -+ if (NULL == padapter->hal_func.init_phy) { -+ rtw_hal_error_msg("init_phy"); -+ ret = _FAIL; -+ } -+#endif /* RTW_HALMAC */ -+ -+#ifdef CONFIG_RFKILL_POLL -+ if (padapter->hal_func.hal_radio_onoff_check == NULL) { -+ rtw_hal_error_msg("hal_radio_onoff_check"); -+ ret = _FAIL; -+ } -+#endif -+#endif -+ return ret; -+} -diff --git a/drivers/staging/rtl8723cs/hal/hal_mcc.c b/drivers/staging/rtl8723cs/hal/hal_mcc.c -new file mode 100644 -index 000000000000..904321817e41 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_mcc.c -@@ -0,0 +1,4078 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifdef CONFIG_MCC_MODE -+#define _HAL_MCC_C_ -+ -+#include /* PADAPTER */ -+#include /* mcc structure */ -+#include /* HAL_DATA */ -+#include /* power control */ -+ -+/* use for AP/GO + STA/GC case */ -+#define MCC_DURATION_IDX 0 /* druration for station side */ -+#define MCC_TSF_SYNC_OFFSET_IDX 1 -+#define MCC_START_TIME_OFFSET_IDX 2 -+#define MCC_INTERVAL_IDX 3 -+#define MCC_GUARD_OFFSET0_IDX 4 -+#define MCC_GUARD_OFFSET1_IDX 5 -+#define MCC_STOP_THRESHOLD 6 -+#define TU 1024 /* 1 TU equals 1024 microseconds */ -+/* druration, TSF sync offset, start time offset, interval (unit:TU (1024 microseconds))*/ -+u8 mcc_switch_channel_policy_table[][7]={ -+ {20, 50, 40, 100, 0, 0, 30}, -+ {80, 50, 10, 100, 0, 0, 30}, -+ {36, 50, 32, 100, 0, 0, 30}, -+ {30, 50, 35, 100, 0, 0, 30}, -+}; -+ -+const int mcc_max_policy_num = sizeof(mcc_switch_channel_policy_table) /sizeof(u8) /7; -+ -+static void dump_iqk_val_table(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct hal_iqk_reg_backup *iqk_reg_backup = pHalData->iqk_reg_backup; -+ u8 total_rf_path = hal_spec->rf_reg_path_num; -+ u8 rf_path_idx = 0; -+ u8 backup_chan_idx = 0; -+ u8 backup_reg_idx = 0; -+ -+#ifdef CONFIG_MCC_MODE_V2 -+#else -+ -+ RTW_INFO("=============dump IQK backup table================\n"); -+ for (backup_chan_idx = 0; backup_chan_idx < MAX_IQK_INFO_BACKUP_CHNL_NUM; backup_chan_idx++) { -+ for (rf_path_idx = 0; rf_path_idx < total_rf_path; rf_path_idx++) { -+ for(backup_reg_idx = 0; backup_reg_idx < MAX_IQK_INFO_BACKUP_REG_NUM; backup_reg_idx++) { -+ RTW_INFO("ch:%d. bw:%d. rf path:%d. reg[%d] = 0x%02x \n" -+ , iqk_reg_backup[backup_chan_idx].central_chnl -+ , iqk_reg_backup[backup_chan_idx].bw_mode -+ , rf_path_idx -+ , backup_reg_idx -+ , iqk_reg_backup[backup_chan_idx].reg_backup[rf_path_idx][backup_reg_idx] -+ ); -+ } -+ } -+ } -+ RTW_INFO("=============================================\n"); -+ -+#endif -+} -+ -+static void rtw_hal_mcc_build_p2p_noa_attr(PADAPTER padapter, u8 *ie, u32 *ie_len) -+{ -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); -+ u8 p2p_noa_attr_ie[MAX_P2P_IE_LEN] = {0x00}; -+ u32 p2p_noa_attr_len = 0; -+ u8 noa_desc_num = 1; -+ u8 opp_ps = 0; /* Disable OppPS */ -+ u8 noa_count = 255; -+ u32 noa_duration; -+ u32 noa_interval; -+ u8 noa_index = 0; -+ u8 mcc_policy_idx = 0; -+ -+ mcc_policy_idx = pmccobjpriv->policy_index; -+ noa_duration = mcc_switch_channel_policy_table[mcc_policy_idx][MCC_DURATION_IDX] * TU; -+ noa_interval = mcc_switch_channel_policy_table[mcc_policy_idx][MCC_INTERVAL_IDX] * TU; -+ -+ /* P2P OUI(4 bytes) */ -+ _rtw_memcpy(p2p_noa_attr_ie, P2P_OUI, 4); -+ p2p_noa_attr_len = p2p_noa_attr_len + 4; -+ -+ /* attrute ID(1 byte) */ -+ p2p_noa_attr_ie[p2p_noa_attr_len] = P2P_ATTR_NOA; -+ p2p_noa_attr_len = p2p_noa_attr_len + 1; -+ -+ /* attrute length(2 bytes) length = noa_desc_num*13 + 2 */ -+ RTW_PUT_LE16(p2p_noa_attr_ie + p2p_noa_attr_len, (noa_desc_num * 13 + 2)); -+ p2p_noa_attr_len = p2p_noa_attr_len + 2; -+ -+ /* Index (1 byte) */ -+ p2p_noa_attr_ie[p2p_noa_attr_len] = noa_index; -+ p2p_noa_attr_len = p2p_noa_attr_len + 1; -+ -+ /* CTWindow and OppPS Parameters (1 byte) */ -+ p2p_noa_attr_ie[p2p_noa_attr_len] = opp_ps; -+ p2p_noa_attr_len = p2p_noa_attr_len+ 1; -+ -+ /* NoA Count (1 byte) */ -+ p2p_noa_attr_ie[p2p_noa_attr_len] = noa_count; -+ p2p_noa_attr_len = p2p_noa_attr_len + 1; -+ -+ /* NoA Duration (4 bytes) unit: microseconds */ -+ RTW_PUT_LE32(p2p_noa_attr_ie + p2p_noa_attr_len, noa_duration); -+ p2p_noa_attr_len = p2p_noa_attr_len + 4; -+ -+ /* NoA Interval (4 bytes) unit: microseconds */ -+ RTW_PUT_LE32(p2p_noa_attr_ie + p2p_noa_attr_len, noa_interval); -+ p2p_noa_attr_len = p2p_noa_attr_len + 4; -+ -+ /* NoA Start Time (4 bytes) unit: microseconds */ -+ RTW_PUT_LE32(p2p_noa_attr_ie + p2p_noa_attr_len, pmccadapriv->noa_start_time); -+ if (0) -+ RTW_INFO("indxe:%d, start_time=0x%02x:0x%02x:0x%02x:0x%02x\n" -+ , noa_index -+ , p2p_noa_attr_ie[p2p_noa_attr_len] -+ , p2p_noa_attr_ie[p2p_noa_attr_len + 1] -+ , p2p_noa_attr_ie[p2p_noa_attr_len + 2] -+ , p2p_noa_attr_ie[p2p_noa_attr_len + 3]); -+ -+ p2p_noa_attr_len = p2p_noa_attr_len + 4; -+ rtw_set_ie(ie, _VENDOR_SPECIFIC_IE_, p2p_noa_attr_len, (u8 *)p2p_noa_attr_ie, ie_len); -+} -+ -+ -+/** -+ * rtw_hal_mcc_update_go_p2p_ie - update go p2p ie(add NoA attribute) -+ * @padapter: the adapter to be update go p2p ie -+ */ -+static void rtw_hal_mcc_update_go_p2p_ie(PADAPTER padapter) -+{ -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ struct mcc_obj_priv *mccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ u8 *pos = NULL; -+ -+ -+ /* no noa attribute, build it */ -+ if (pmccadapriv->p2p_go_noa_ie_len == 0) -+ rtw_hal_mcc_build_p2p_noa_attr(padapter, pmccadapriv->p2p_go_noa_ie, &pmccadapriv->p2p_go_noa_ie_len); -+ else { -+ /* has noa attribut, modify it */ -+ u32 noa_duration = 0; -+ -+ /* update index */ -+ pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len - 15; -+ /* 0~255 */ -+ (*pos) = ((*pos) + 1) % 256; -+ if (0) -+ RTW_INFO("indxe:%d\n", (*pos)); -+ -+ -+ /* update duration */ -+ noa_duration = mcc_switch_channel_policy_table[mccobjpriv->policy_index][MCC_DURATION_IDX] * TU; -+ pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len - 12; -+ RTW_PUT_LE32(pos, noa_duration); -+ -+ /* update start time */ -+ pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len - 4; -+ RTW_PUT_LE32(pos, pmccadapriv->noa_start_time); -+ if (0) -+ RTW_INFO("start_time=0x%02x:0x%02x:0x%02x:0x%02x\n" -+ , ((u8*)(pos))[0] -+ , ((u8*)(pos))[1] -+ , ((u8*)(pos))[2] -+ , ((u8*)(pos))[3]); -+ -+ } -+ -+ if (0) { -+ RTW_INFO("p2p_go_noa_ie_len:%d\n", pmccadapriv->p2p_go_noa_ie_len); -+ RTW_INFO_DUMP("\n", pmccadapriv->p2p_go_noa_ie, pmccadapriv->p2p_go_noa_ie_len); -+ } -+ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, P2P_OUI, _TRUE, 0); -+} -+ -+/** -+ * rtw_hal_mcc_remove_go_p2p_ie - remove go p2p ie(add NoA attribute) -+ * @padapter: the adapter to be update go p2p ie -+ */ -+static void rtw_hal_mcc_remove_go_p2p_ie(PADAPTER padapter) -+{ -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ -+ /* chech has noa ie or not */ -+ if (pmccadapriv->p2p_go_noa_ie_len == 0) -+ return; -+ -+ pmccadapriv->p2p_go_noa_ie_len = 0; -+ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, P2P_OUI, _TRUE, 0); -+} -+ -+/* restore IQK value for all interface */ -+void rtw_hal_mcc_restore_iqk_val(PADAPTER padapter) -+{ -+ u8 take_care_iqk = _FALSE; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ _adapter *iface = NULL; -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ u8 i = 0; -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk); -+ if (take_care_iqk == _TRUE && MCC_EN(padapter)) { -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ if (mccadapriv->role == MCC_ROLE_MAX) -+ continue; -+ -+ rtw_hal_ch_sw_iqk_info_restore(iface, CH_SW_USE_CASE_MCC); -+ } -+ } -+ -+ if (0) -+ dump_iqk_val_table(padapter); -+} -+ -+u8 rtw_hal_check_mcc_status(PADAPTER padapter, u8 mcc_status) -+{ -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ -+ if (pmccobjpriv->mcc_status & (mcc_status)) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+void rtw_hal_set_mcc_status(PADAPTER padapter, u8 mcc_status) -+{ -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ -+ pmccobjpriv->mcc_status |= (mcc_status); -+} -+ -+void rtw_hal_clear_mcc_status(PADAPTER padapter, u8 mcc_status) -+{ -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ -+ pmccobjpriv->mcc_status &= (~mcc_status); -+} -+ -+static void rtw_hal_mcc_update_policy_table(PADAPTER adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ u8 mcc_duration = mccobjpriv->duration; -+ s8 mcc_policy_idx = mccobjpriv->policy_index; -+ u8 interval = mcc_switch_channel_policy_table[mcc_policy_idx][MCC_INTERVAL_IDX]; -+ u8 new_mcc_duration_time = 0; -+ u8 new_starttime_offset = 0; -+ -+ /* convert % to ms */ -+ new_mcc_duration_time = mcc_duration * interval / 100; -+ -+ /* start time offset = (interval - duration time)/2 */ -+ new_starttime_offset = (interval - new_mcc_duration_time) >> 1; -+ -+ /* update modified parameters */ -+ mcc_switch_channel_policy_table[mcc_policy_idx][MCC_DURATION_IDX] -+ = new_mcc_duration_time; -+ -+ mcc_switch_channel_policy_table[mcc_policy_idx][MCC_START_TIME_OFFSET_IDX] -+ = new_starttime_offset; -+ -+ -+} -+ -+static void rtw_hal_config_mcc_switch_channel_setting(PADAPTER padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ u8 mcc_duration = 0; -+ s8 mcc_policy_idx = 0; -+ -+ mcc_policy_idx = registry_par->rtw_mcc_policy_table_idx; -+ mcc_duration = mccobjpriv->duration; -+ -+ if (mcc_policy_idx < 0 || mcc_policy_idx >= mcc_max_policy_num) { -+ mccobjpriv->policy_index = 0; -+ RTW_INFO("[MCC] can't find table(%d), use default policy(%d)\n", -+ mcc_policy_idx, mccobjpriv->policy_index); -+ } else -+ mccobjpriv->policy_index = mcc_policy_idx; -+ -+ /* convert % to time */ -+ if (mcc_duration != 0) -+ rtw_hal_mcc_update_policy_table(padapter); -+ -+ RTW_INFO("[MCC] policy(%d): %d,%d,%d,%d,%d,%d\n" -+ , mccobjpriv->policy_index -+ , mcc_switch_channel_policy_table[mccobjpriv->policy_index][MCC_DURATION_IDX] -+ , mcc_switch_channel_policy_table[mccobjpriv->policy_index][MCC_TSF_SYNC_OFFSET_IDX] -+ , mcc_switch_channel_policy_table[mccobjpriv->policy_index][MCC_START_TIME_OFFSET_IDX] -+ , mcc_switch_channel_policy_table[mccobjpriv->policy_index][MCC_INTERVAL_IDX] -+ , mcc_switch_channel_policy_table[mccobjpriv->policy_index][MCC_GUARD_OFFSET0_IDX] -+ , mcc_switch_channel_policy_table[mccobjpriv->policy_index][MCC_GUARD_OFFSET1_IDX]); -+ -+} -+ -+static void rtw_hal_mcc_assign_tx_threshold(PADAPTER padapter) -+{ -+ struct registry_priv *preg = &padapter->registrypriv; -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ switch (pmccadapriv->role) { -+ case MCC_ROLE_STA: -+ case MCC_ROLE_GC: -+ switch (pmlmeext->cur_bwmode) { -+ case CHANNEL_WIDTH_20: -+ /* -+ * target tx byte(bytes) = target tx tp(Mbits/sec) * 1024 * 1024 / 8 * (duration(ms) / 1024) -+ * = target tx tp(Mbits/sec) * 128 * duration(ms) -+ * note: -+ * target tx tp(Mbits/sec) * 1024 * 1024 / 8 ==> Mbits to bytes -+ * duration(ms) / 1024 ==> msec to sec -+ */ -+ pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw20_target_tx_tp * 128 * pmccadapriv->mcc_duration; -+ break; -+ case CHANNEL_WIDTH_40: -+ pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw40_target_tx_tp * 128 * pmccadapriv->mcc_duration; -+ break; -+ case CHANNEL_WIDTH_80: -+ pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw80_target_tx_tp * 128 * pmccadapriv->mcc_duration; -+ break; -+ case CHANNEL_WIDTH_160: -+ case CHANNEL_WIDTH_80_80: -+ RTW_INFO(FUNC_ADPT_FMT": not support bwmode = %d\n" -+ , FUNC_ADPT_ARG(padapter), pmlmeext->cur_bwmode); -+ break; -+ } -+ break; -+ case MCC_ROLE_AP: -+ case MCC_ROLE_GO: -+ switch (pmlmeext->cur_bwmode) { -+ case CHANNEL_WIDTH_20: -+ pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw20_target_tx_tp * 128 * pmccadapriv->mcc_duration; -+ break; -+ case CHANNEL_WIDTH_40: -+ pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw40_target_tx_tp * 128 * pmccadapriv->mcc_duration; -+ break; -+ case CHANNEL_WIDTH_80: -+ pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw80_target_tx_tp * 128 * pmccadapriv->mcc_duration; -+ break; -+ case CHANNEL_WIDTH_160: -+ case CHANNEL_WIDTH_80_80: -+ RTW_INFO(FUNC_ADPT_FMT": not support bwmode = %d\n" -+ , FUNC_ADPT_ARG(padapter), pmlmeext->cur_bwmode); -+ break; -+ } -+ break; -+ default: -+ RTW_INFO(FUNC_ADPT_FMT": unknown role = %d\n" -+ , FUNC_ADPT_ARG(padapter), pmccadapriv->role); -+ break; -+ } -+} -+ -+#ifdef CONFIG_MCC_PHYDM_OFFLOAD -+static void mcc_cfg_phdym_rf_ch (_adapter *adapter) -+{ -+ struct mcc_adapter_priv *mccadapriv = &adapter->mcc_adapterpriv; -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter); -+ struct dm_struct *dm = &hal->odmpriv; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ u8 order = 0; -+ -+ set_channel_bwmode(adapter, mlmeext->cur_channel, mlmeext->cur_ch_offset, mlmeext->cur_bwmode); -+ order = mccadapriv->order; -+ mcc_dm->mcc_rf_ch[order] = phy_query_rf_reg(adapter, RF_PATH_A, 0x18, 0x03ff); -+} -+ -+static void mcc_cfg_phdym_update_macid (_adapter *adapter, u8 add, u8 mac_id) -+{ -+ struct mcc_adapter_priv *mccadapriv = &adapter->mcc_adapterpriv; -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter); -+ struct dm_struct *dm = &hal->odmpriv; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ u8 order = 0, i = 0; -+ -+ order = mccadapriv->order; -+ if (add) { -+ for (i = 0; i < NUM_STA; i++) { -+ if (mcc_dm->sta_macid[order][i] == 0xff) { -+ mcc_dm->sta_macid[order][i] = mac_id; -+ break; -+ } -+ } -+ } else { -+ for (i = 0; i < NUM_STA; i++) { -+ if (mcc_dm->sta_macid[order][i] == mac_id) { -+ mcc_dm->sta_macid[order][i] = 0xff; -+ break; -+ } -+ } -+ } -+ -+ -+} -+ -+static void mcc_cfg_phdym_start(_adapter *adapter, u8 start) -+{ -+ struct dvobj_priv *dvobj; -+ struct mcc_obj_priv *mccobjpriv; -+ HAL_DATA_TYPE *hal; -+ struct dm_struct *dm; -+ struct _phydm_mcc_dm_ *mcc_dm; -+ u8 rfk_forbidden = _TRUE; -+ u8 i = 0, j = 0; -+ -+ dvobj = adapter_to_dvobj(adapter); -+ mccobjpriv = adapter_to_mccobjpriv(adapter); -+ hal = GET_HAL_DATA(adapter); -+ dm = &hal->odmpriv; -+ mcc_dm = &dm->mcc_dm; -+ -+ if (start) { -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ mcc_dm->mcc_status = mccobjpriv->mcc_phydm_offload; -+ #endif -+ -+ rfk_forbidden = _TRUE; -+ halrf_cmn_info_set(dm, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); -+ } else { -+ rfk_forbidden = _FALSE; -+ halrf_cmn_info_set(dm, HALRF_CMNINFO_RFK_FORBIDDEN, rfk_forbidden); -+ -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ for(i = 0; i < MAX_MCC_NUM; i ++) { -+ for(j = 0; j < NUM_STA; j ++) { -+ if (mcc_dm->sta_macid[i][j] != 0xff) -+ /* clear all used value for mcc stop */ -+ /* do nothing for mcc start due to phydm will init to 0xff */ -+ mcc_dm->sta_macid[i][j] = 0xff; -+ } -+ mcc_dm->mcc_rf_ch[i] = 0xff; -+ } -+ mcc_dm->mcc_status = 0; -+ #endif -+ } -+} -+ -+static void mcc_cfg_phdym_dump(_adapter *adapter, void *sel) -+{ -+ HAL_DATA_TYPE *hal; -+ struct dm_struct *dm; -+ struct _phydm_mcc_dm_ *mcc_dm; -+ u8 rfk_forbidden = _TRUE; -+ u8 i = 0, j = 0; -+ -+ -+ hal = GET_HAL_DATA(adapter); -+ dm = &hal->odmpriv; -+ mcc_dm = &dm->mcc_dm; -+ -+ rfk_forbidden = halrf_cmn_info_get(dm, HALRF_CMNINFO_RFK_FORBIDDEN); -+ RTW_PRINT_SEL(sel, "dump mcc dm info\n"); -+ RTW_PRINT_SEL(sel, "mcc_status=%d\n", mcc_dm->mcc_status); -+ RTW_PRINT_SEL(sel, "rfk_forbidden=%d\n", rfk_forbidden); -+ for(i = 0; i < MAX_MCC_NUM; i ++) { -+ -+ if (mcc_dm->mcc_rf_ch[i] != 0xff) -+ RTW_PRINT_SEL(sel, "mcc_dm->mcc_rf_ch[%d] = 0x%02x\n", i, mcc_dm->mcc_rf_ch[i]); -+ -+ for(j = 0; j < NUM_STA; j ++) { -+ if (mcc_dm->sta_macid[i][j] != 0xff) -+ RTW_PRINT_SEL(sel, "mcc_dm->sta_macid[%d][%d] = %d\n", i, j, mcc_dm->sta_macid[i][j]); -+ } -+ } -+} -+ -+static void mcc_cfg_phdym_offload(_adapter *adapter, u8 enable) -+{ -+ struct mcc_obj_priv *mccobjpriv = adapter_to_mccobjpriv(adapter); -+ _adapter *iface = NULL; -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ HAL_DATA_TYPE *hal = NULL; -+ struct dm_struct *dm = NULL; -+ struct _phydm_mcc_dm_ *mcc_dm = NULL; -+ struct sta_priv *stapriv = NULL; -+ struct sta_info *sta = NULL; -+ struct wlan_network *cur_network = NULL; -+ _irqL irqL; -+ _list *head = NULL, *list = NULL; -+ u8 i = 0; -+ -+ -+ hal = GET_HAL_DATA(adapter); -+ dm = &hal->odmpriv; -+ mcc_dm = &dm->mcc_dm; -+ -+ /* due to phydm will rst related date, driver must set related data */ -+ if (enable) { -+ for (i = 0; i < MAX_MCC_NUM; i++) { -+ iface = mccobjpriv->iface[i]; -+ if (!iface) -+ continue; -+ stapriv = &iface->stapriv; -+ mccadapriv = &iface->mcc_adapterpriv; -+ switch (mccadapriv->role) { -+ case MCC_ROLE_STA: -+ case MCC_ROLE_GC: -+ cur_network = &iface->mlmepriv.cur_network; -+ sta = rtw_get_stainfo(stapriv, cur_network->network.MacAddress); -+ if (sta) -+ mcc_cfg_phdym_update_macid(iface, _TRUE, sta->cmn.mac_id); -+ break; -+ case MCC_ROLE_AP: -+ case MCC_ROLE_GO: -+ _enter_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ -+ head = &stapriv->asoc_list; -+ list = get_next(head); -+ -+ while ((rtw_end_of_queue_search(head, list)) == _FALSE) { -+ sta = LIST_CONTAINOR(list, struct sta_info, asoc_list); -+ list = get_next(list); -+ mcc_cfg_phdym_update_macid(iface, _TRUE, sta->cmn.mac_id); -+ } -+ -+ _exit_critical_bh(&stapriv->asoc_list_lock, &irqL); -+ break; -+ default: -+ RTW_INFO("Unknown role\n"); -+ rtw_warn_on(1); -+ break; -+ } -+ -+ } -+ } -+ -+ mcc_dm->mcc_status = enable; -+} -+ -+static void rtw_hal_mcc_cfg_phydm (_adapter *adapter, enum mcc_cfg_phydm_ops ops, void *data) -+{ -+ switch (ops) { -+ case MCC_CFG_PHYDM_OFFLOAD: -+ mcc_cfg_phdym_offload(adapter, *(u8 *)data); -+ break; -+ case MCC_CFG_PHYDM_RF_CH: -+ mcc_cfg_phdym_rf_ch(adapter); -+ break; -+ case MCC_CFG_PHYDM_ADD_CLIENT: -+ mcc_cfg_phdym_update_macid(adapter, _TRUE, *(u8 *)data); -+ break; -+ case MCC_CFG_PHYDM_REMOVE_CLIENT: -+ mcc_cfg_phdym_update_macid(adapter, _FALSE, *(u8 *)data); -+ break; -+ case MCC_CFG_PHYDM_START: -+ mcc_cfg_phdym_start(adapter, _TRUE); -+ break; -+ case MCC_CFG_PHYDM_STOP: -+ mcc_cfg_phdym_start(adapter, _FALSE); -+ break; -+ case MCC_CFG_PHYDM_DUMP: -+ mcc_cfg_phdym_dump(adapter, data); -+ break; -+ case MCC_CFG_PHYDM_MAX: -+ default: -+ RTW_ERR("[MCC] rtw_hal_mcc_cfg_phydm ops error (%d)\n", ops); -+ break; -+ -+ } -+} -+#endif -+ -+static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv); -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta = NULL; -+ struct registry_priv *preg = &padapter->registrypriv; -+ _irqL irqL; -+ _list *phead =NULL, *plist = NULL; -+ u8 policy_index = 0; -+ u8 mcc_duration = 0; -+ u8 mcc_interval = 0; -+ u8 starting_ap_num = DEV_AP_STARTING_NUM(pdvobjpriv); -+ u8 ap_num = DEV_AP_NUM(pdvobjpriv); -+ -+ policy_index = pmccobjpriv->policy_index; -+ mcc_duration = mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_DURATION_IDX] -+ - mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET0_IDX] -+ - mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET1_IDX]; -+ mcc_interval = mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_INTERVAL_IDX]; -+ -+ if (starting_ap_num == 0 && ap_num == 0) { -+ pmccadapriv->order = order; -+ -+ if (pmccadapriv->order == 0) { -+ /* setting is smiliar to GO/AP */ -+ /* pmccadapriv->mcc_duration = mcc_interval - mcc_duration;*/ -+ pmccadapriv->mgmt_queue_macid = MCC_ROLE_SOFTAP_GO_MGMT_QUEUE_MACID; -+ } else if (pmccadapriv->order == 1) { -+ /* pmccadapriv->mcc_duration = mcc_duration; */ -+ pmccadapriv->mgmt_queue_macid = MCC_ROLE_STA_GC_MGMT_QUEUE_MACID; -+ } else { -+ RTW_INFO("[MCC] not support >= 3 interface\n"); -+ rtw_warn_on(1); -+ } -+ -+ rtw_hal_mcc_assign_tx_threshold(padapter); -+ -+ psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); -+ if (psta) { -+ /* combine AP/GO macid and mgmt queue macid to bitmap */ -+ pmccadapriv->mcc_macid_bitmap = BIT(psta->cmn.mac_id) | BIT(pmccadapriv->mgmt_queue_macid); -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_ADD_CLIENT, &psta->cmn.mac_id); -+ #endif -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT":AP/GO station info is NULL\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ } -+ } else { -+ /* GO/AP is 1nd order GC/STA is 2nd order */ -+ switch (pmccadapriv->role) { -+ case MCC_ROLE_STA: -+ case MCC_ROLE_GC: -+ pmccadapriv->order = 1; -+ pmccadapriv->mcc_duration = mcc_duration; -+ -+ rtw_hal_mcc_assign_tx_threshold(padapter); -+ /* assign used mac to avoid affecting RA */ -+ pmccadapriv->mgmt_queue_macid = MCC_ROLE_STA_GC_MGMT_QUEUE_MACID; -+ -+ psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); -+ if (psta) { -+ /* combine AP/GO macid and mgmt queue macid to bitmap */ -+ pmccadapriv->mcc_macid_bitmap = BIT(psta->cmn.mac_id) | BIT(pmccadapriv->mgmt_queue_macid); -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_ADD_CLIENT, &psta->cmn.mac_id); -+ #endif -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT":AP/GO station info is NULL\n", FUNC_ADPT_ARG(padapter)); -+ rtw_warn_on(1); -+ } -+ break; -+ case MCC_ROLE_AP: -+ case MCC_ROLE_GO: -+ pmccadapriv->order = 0; -+ /* total druation value equals interval */ -+ pmccadapriv->mcc_duration = mcc_interval - mcc_duration; -+ pmccadapriv->p2p_go_noa_ie_len = 0; /* not NoA attribute at init time */ -+ -+ rtw_hal_mcc_assign_tx_threshold(padapter); -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ pmccadapriv->mcc_macid_bitmap = 0; -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ pmccadapriv->mcc_macid_bitmap |= BIT(psta->cmn.mac_id); -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_ADD_CLIENT, &psta->cmn.mac_id); -+ #endif -+ } -+ -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ psta = rtw_get_bcmc_stainfo(padapter); -+ -+ if (psta != NULL) -+ pmccadapriv->mgmt_queue_macid = psta->cmn.mac_id; -+ else { -+ pmccadapriv->mgmt_queue_macid = MCC_ROLE_SOFTAP_GO_MGMT_QUEUE_MACID; -+ RTW_INFO(FUNC_ADPT_FMT":bcmc station is NULL, use macid %d\n" -+ , FUNC_ADPT_ARG(padapter), pmccadapriv->mgmt_queue_macid); -+ } -+ -+ /* combine client macid and mgmt queue macid to bitmap */ -+ pmccadapriv->mcc_macid_bitmap |= BIT(pmccadapriv->mgmt_queue_macid); -+ break; -+ default: -+ RTW_INFO("Unknown role\n"); -+ rtw_warn_on(1); -+ break; -+ } -+ -+ } -+ -+ /* setting Null data parameters */ -+ if (pmccadapriv->role == MCC_ROLE_STA) { -+ pmccadapriv->null_early = 3; -+ pmccadapriv->null_rty_num= 5; -+ } else if (pmccadapriv->role == MCC_ROLE_GC) { -+ pmccadapriv->null_early = 2; -+ pmccadapriv->null_rty_num= 5; -+ } else { -+ pmccadapriv->null_early = 0; -+ pmccadapriv->null_rty_num= 0; -+ } -+ -+ RTW_INFO("********* "FUNC_ADPT_FMT" *********\n", FUNC_ADPT_ARG(padapter)); -+ RTW_INFO("order:%d\n", pmccadapriv->order); -+ RTW_INFO("role:%d\n", pmccadapriv->role); -+ RTW_INFO("mcc duration:%d\n", pmccadapriv->mcc_duration); -+ RTW_INFO("null_early:%d\n", pmccadapriv->null_early); -+ RTW_INFO("null_rty_num:%d\n", pmccadapriv->null_rty_num); -+ RTW_INFO("mgmt queue macid:%d\n", pmccadapriv->mgmt_queue_macid); -+ RTW_INFO("bitmap:0x%02x\n", pmccadapriv->mcc_macid_bitmap); -+ RTW_INFO("target tx bytes:%d\n", pmccadapriv->mcc_target_tx_bytes_to_port); -+ RTW_INFO("**********************************\n"); -+ -+ pmccobjpriv->iface[pmccadapriv->order] = padapter; -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_RF_CH, NULL); -+ #endif -+ -+} -+ -+static void rtw_hal_mcc_rqt_tsf(PADAPTER padapter, u64 *out_tsf) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ PADAPTER order0_iface = NULL; -+ PADAPTER order1_iface = NULL; -+ struct submit_ctx *tsf_req_sctx = NULL; -+ enum _hw_port tsfx = MAX_HW_PORT; -+ enum _hw_port tsfy = MAX_HW_PORT; -+ u8 cmd[H2C_MCC_RQT_TSF_LEN] = {0}; -+ -+ _enter_critical_mutex(&mccobjpriv->mcc_tsf_req_mutex, NULL); -+ -+ order0_iface = mccobjpriv->iface[0]; -+ order1_iface = mccobjpriv->iface[1]; -+ -+ tsf_req_sctx = &mccobjpriv->mcc_tsf_req_sctx; -+ rtw_sctx_init(tsf_req_sctx, MCC_EXPIRE_TIME); -+ mccobjpriv->mcc_tsf_req_sctx_order = 0; -+ tsfx = rtw_hal_get_port(order0_iface); -+ tsfy = rtw_hal_get_port(order1_iface); -+ -+ SET_H2CCMD_MCC_RQT_TSFX(cmd, tsfx); -+ SET_H2CCMD_MCC_RQT_TSFY(cmd, tsfy); -+ -+ rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_RQT_TSF, H2C_MCC_RQT_TSF_LEN, cmd); -+ -+ if (!rtw_sctx_wait(tsf_req_sctx, __func__)) -+ RTW_INFO(FUNC_ADPT_FMT": wait for mcc tsf req C2H time out\n", FUNC_ADPT_ARG(padapter)); -+ -+ if (tsf_req_sctx->status == RTW_SCTX_DONE_SUCCESS && out_tsf != NULL) { -+ out_tsf[0] = order0_iface->mcc_adapterpriv.tsf; -+ out_tsf[1] = order1_iface->mcc_adapterpriv.tsf; -+ } -+ -+ -+ _exit_critical_mutex(&mccobjpriv->mcc_tsf_req_mutex, NULL); -+} -+ -+static u8 rtw_hal_mcc_check_start_time_is_valid(PADAPTER padapter, u8 case_num, -+ u32 tsfdiff, s8 *upper_bound_0, s8 *lower_bound_0, s8 *upper_bound_1, s8 *lower_bound_1) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ u8 duration_0 = 0, duration_1 = 0; -+ s8 final_upper_bound = 0, final_lower_bound = 0; -+ u8 intersection = _FALSE; -+ u8 min_start_time = 5; -+ u8 max_start_time = 95; -+ -+ duration_0 = mccobjpriv->iface[0]->mcc_adapterpriv.mcc_duration; -+ duration_1 = mccobjpriv->iface[1]->mcc_adapterpriv.mcc_duration; -+ -+ switch(case_num) { -+ case 1: -+ *upper_bound_0 = tsfdiff; -+ *lower_bound_0 = tsfdiff - duration_1; -+ *upper_bound_1 = 150 - duration_1; -+ *lower_bound_1= 0; -+ break; -+ case 2: -+ *upper_bound_0 = tsfdiff + 100; -+ *lower_bound_0 = tsfdiff + 100 - duration_1; -+ *upper_bound_1 = 150 - duration_1; -+ *lower_bound_1= 0; -+ break; -+ case 3: -+ *upper_bound_0 = tsfdiff + 50; -+ *lower_bound_0 = tsfdiff + 50 - duration_1; -+ *upper_bound_1 = 150 - duration_1; -+ *lower_bound_1= 0; -+ break; -+ case 4: -+ *upper_bound_0 = tsfdiff; -+ *lower_bound_0 = tsfdiff - duration_1; -+ *upper_bound_1 = 150 - duration_1; -+ *lower_bound_1= 0; -+ break; -+ case 5: -+ *upper_bound_0 = 200 - tsfdiff; -+ *lower_bound_0 = 200 - tsfdiff - duration_1; -+ *upper_bound_1 = 150 - duration_1; -+ *lower_bound_1= 0; -+ break; -+ case 6: -+ *upper_bound_0 = tsfdiff - 50; -+ *lower_bound_0 = tsfdiff - 50 - duration_1; -+ *upper_bound_1 = 150 - duration_1; -+ *lower_bound_1= 0; -+ break; -+ default: -+ RTW_ERR("[MCC] %s: error case number(%d\n)", __func__, case_num); -+ } -+ -+ -+ /* check Intersection or not */ -+ if ((*lower_bound_1 >= *upper_bound_0) || -+ (*lower_bound_0 >= *upper_bound_1)) -+ intersection = _FALSE; -+ else -+ intersection = _TRUE; -+ -+ if (intersection) { -+ if (*upper_bound_0 > *upper_bound_1) -+ final_upper_bound = *upper_bound_1; -+ else -+ final_upper_bound = *upper_bound_0; -+ -+ if (*lower_bound_0 > *lower_bound_1) -+ final_lower_bound = *lower_bound_0; -+ else -+ final_lower_bound = *lower_bound_1; -+ -+ mccobjpriv->start_time = (final_lower_bound + final_upper_bound) / 2; -+ -+ /* check start time less than 5ms, request by Pablo@SD1 */ -+ if (mccobjpriv->start_time <= min_start_time) { -+ mccobjpriv->start_time = 6; -+ if (mccobjpriv->start_time < final_lower_bound && mccobjpriv->start_time > final_upper_bound) { -+ intersection = _FALSE; -+ goto exit; -+ } -+ } -+ -+ /* check start time less than 95ms */ -+ if (mccobjpriv->start_time >= max_start_time) { -+ mccobjpriv->start_time = 90; -+ if (mccobjpriv->start_time < final_lower_bound && mccobjpriv->start_time > final_upper_bound) { -+ intersection = _FALSE; -+ goto exit; -+ } -+ } -+ } -+ -+exit: -+ return intersection; -+} -+ -+static void rtw_hal_mcc_decide_duration(PADAPTER padapter) -+{ -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ struct mcc_adapter_priv *mccadapriv = NULL, *mccadapriv_order0 = NULL, *mccadapriv_order1 = NULL; -+ _adapter *iface = NULL, *iface_order0 = NULL, *iface_order1 = NULL; -+ u8 duration = 0, i = 0, duration_time; -+ u8 mcc_interval = 150; -+ -+ iface_order0 = mccobjpriv->iface[0]; -+ iface_order1 = mccobjpriv->iface[1]; -+ mccadapriv_order0 = &iface_order0->mcc_adapterpriv; -+ mccadapriv_order1 = &iface_order1->mcc_adapterpriv; -+ -+ if (mccobjpriv->duration == 0) { -+ /* default */ -+ duration = 30;/*(%)*/ -+ RTW_INFO("%s: mccobjpriv->duration=0, use default value(%d)\n", -+ __FUNCTION__, duration); -+ } else { -+ duration = mccobjpriv->duration;/*(%)*/ -+ RTW_INFO("%s: mccobjpriv->duration=%d\n", -+ __FUNCTION__, duration); -+ } -+ -+ mccobjpriv->interval = mcc_interval; -+ mccobjpriv->mcc_stop_threshold = 2000 * 4 / 300 - 6; -+ /* convert % to ms, for primary adapter */ -+ duration_time = mccobjpriv->interval * duration / 100; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ -+ if (!iface) -+ continue; -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ if (mccadapriv->role == MCC_ROLE_MAX) -+ continue; -+ -+ if (is_primary_adapter(iface)) -+ mccadapriv->mcc_duration = duration_time; -+ else -+ mccadapriv->mcc_duration = mccobjpriv->interval - duration_time; -+ } -+ -+ RTW_INFO("[MCC]" FUNC_ADPT_FMT " order 0 duration=%d\n", FUNC_ADPT_ARG(iface_order0), mccadapriv_order0->mcc_duration); -+ RTW_INFO("[MCC]" FUNC_ADPT_FMT " order 1 duration=%d\n", FUNC_ADPT_ARG(iface_order1), mccadapriv_order1->mcc_duration); -+} -+ -+static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_update) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ u8 need_update = _FALSE; -+ u8 starting_ap_num = DEV_AP_STARTING_NUM(dvobj); -+ u8 ap_num = DEV_AP_NUM(dvobj); -+ -+ -+ /* for STA+STA, modify policy table */ -+ if (starting_ap_num == 0 && ap_num == 0) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); -+ struct mcc_adapter_priv *pmccadapriv = NULL; -+ _adapter *iface = NULL; -+ u64 tsf[MAX_MCC_NUM] = {0}; -+ u64 tsf0 = 0, tsf1 = 0; -+ u32 beaconperiod_0 = 0, beaconperiod_1 = 0, tsfdiff = 0; -+ s8 upper_bound_0 = 0, lower_bound_0 = 0; -+ s8 upper_bound_1 = 0, lower_bound_1 = 0; -+ u8 valid = _FALSE; -+ u8 case_num = 1; -+ u8 i = 0; -+ -+ /* query TSF */ -+ rtw_hal_mcc_rqt_tsf(padapter, tsf); -+ -+ /* selecet policy table according TSF diff */ -+ tsf0 = tsf[0]; -+ beaconperiod_0 = pmccobjpriv->iface[0]->mlmepriv.cur_network.network.Configuration.BeaconPeriod; -+ tsf0 = rtw_modular64(tsf0, (beaconperiod_0 * TU)); -+ -+ tsf1 = tsf[1]; -+ beaconperiod_1 = pmccobjpriv->iface[1]->mlmepriv.cur_network.network.Configuration.BeaconPeriod; -+ tsf1 = rtw_modular64(tsf1, (beaconperiod_1 * TU)); -+ -+ if (tsf0 > tsf1) -+ tsfdiff = tsf0- tsf1; -+ else -+ tsfdiff = (tsf0 + beaconperiod_0 * TU) - tsf1; -+ -+ /* convert to ms */ -+ tsfdiff = (tsfdiff / TU); -+ -+ /* force update*/ -+ if (force_update) { -+ RTW_INFO("orig TSF0:%lld, orig TSF1:%lld\n", -+ pmccobjpriv->iface[0]->mcc_adapterpriv.tsf, pmccobjpriv->iface[1]->mcc_adapterpriv.tsf); -+ RTW_INFO("tsf0:%lld, tsf1:%lld\n", tsf0, tsf1); -+ RTW_INFO("%s: force=%d, last_tsfdiff=%d, tsfdiff=%d, THRESHOLD=%d\n", -+ __func__, force_update, pmccobjpriv->last_tsfdiff, tsfdiff, MCC_UPDATE_PARAMETER_THRESHOLD); -+ pmccobjpriv->last_tsfdiff = tsfdiff; -+ need_update = _TRUE; -+ } else { -+ if (pmccobjpriv->last_tsfdiff > tsfdiff) { -+ /* last tsfdiff - current tsfdiff > THRESHOLD, update parameters */ -+ if (pmccobjpriv->last_tsfdiff > (tsfdiff + MCC_UPDATE_PARAMETER_THRESHOLD)) { -+ RTW_INFO("orig TSF0:%lld, orig TSF1:%lld\n", -+ pmccobjpriv->iface[0]->mcc_adapterpriv.tsf, pmccobjpriv->iface[1]->mcc_adapterpriv.tsf); -+ RTW_INFO("tsf0:%lld, tsf1:%lld\n", tsf0, tsf1); -+ RTW_INFO("%s: force=%d, last_tsfdiff=%d, tsfdiff=%d, THRESHOLD=%d\n", -+ __func__, force_update, pmccobjpriv->last_tsfdiff, tsfdiff, MCC_UPDATE_PARAMETER_THRESHOLD); -+ -+ pmccobjpriv->last_tsfdiff = tsfdiff; -+ need_update = _TRUE; -+ } else { -+ need_update = _FALSE; -+ } -+ } else if (tsfdiff > pmccobjpriv->last_tsfdiff){ -+ /* current tsfdiff - last tsfdiff > THRESHOLD, update parameters */ -+ if (tsfdiff > (pmccobjpriv->last_tsfdiff + MCC_UPDATE_PARAMETER_THRESHOLD)) { -+ RTW_INFO("orig TSF0:%lld, orig TSF1:%lld\n", -+ pmccobjpriv->iface[0]->mcc_adapterpriv.tsf, pmccobjpriv->iface[1]->mcc_adapterpriv.tsf); -+ RTW_INFO("tsf0:%lld, tsf1:%lld\n", tsf0, tsf1); -+ RTW_INFO("%s: force=%d, last_tsfdiff=%d, tsfdiff=%d, THRESHOLD=%d\n", -+ __func__, force_update, pmccobjpriv->last_tsfdiff, tsfdiff, MCC_UPDATE_PARAMETER_THRESHOLD); -+ -+ pmccobjpriv->last_tsfdiff = tsfdiff; -+ need_update = _TRUE; -+ } else { -+ need_update = _FALSE; -+ } -+ } else { -+ need_update = _FALSE; -+ } -+ } -+ -+ if (need_update == _FALSE) -+ goto exit; -+ -+ rtw_hal_mcc_decide_duration(padapter); -+ -+ if (tsfdiff <= 50) { -+ -+ /* RX TBTT 0 */ -+ case_num = 1; -+ valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, -+ &upper_bound_0, &lower_bound_0, &upper_bound_1, &lower_bound_1); -+ -+ if (valid) -+ goto valid_result; -+ -+ /* RX TBTT 1 */ -+ case_num = 2; -+ valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, -+ &upper_bound_0, &lower_bound_0, &upper_bound_1, &lower_bound_1); -+ -+ if (valid) -+ goto valid_result; -+ -+ /* RX TBTT 2 */ -+ case_num = 3; -+ valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, -+ &upper_bound_0, &lower_bound_0, &upper_bound_1, &lower_bound_1); -+ -+ if (valid) -+ goto valid_result; -+ -+ if (valid == _FALSE) { -+ RTW_INFO("[MCC] do not find fit start time\n"); -+ RTW_INFO("[MCC] tsfdiff:%d, duration:%d(%c), interval:%d\n", -+ tsfdiff, pmccobjpriv->duration, 37, pmccobjpriv->interval); -+ -+ } -+ -+ } else { -+ -+ /* RX TBTT 0 */ -+ case_num = 4; -+ valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, -+ &upper_bound_0, &lower_bound_0, &upper_bound_1, &lower_bound_1); -+ -+ if (valid) -+ goto valid_result; -+ -+ -+ /* RX TBTT 1 */ -+ case_num = 5; -+ valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, -+ &upper_bound_0, &lower_bound_0, &upper_bound_1, &lower_bound_1); -+ -+ if (valid) -+ goto valid_result; -+ -+ -+ /* RX TBTT 2 */ -+ case_num = 6; -+ valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, -+ &upper_bound_0, &lower_bound_0, &upper_bound_1, &lower_bound_1); -+ -+ if (valid) -+ goto valid_result; -+ -+ if (valid == _FALSE) { -+ RTW_INFO("[MCC] do not find fit start time\n"); -+ RTW_INFO("[MCC] tsfdiff:%d, duration:%d(%c), interval:%d\n", -+ tsfdiff, pmccobjpriv->duration, 37, pmccobjpriv->interval); -+ } -+ } -+ -+ -+ -+ valid_result: -+ RTW_INFO("********************\n"); -+ RTW_INFO("%s: case_num:%d, start time:%d\n", -+ __func__, case_num, pmccobjpriv->start_time); -+ RTW_INFO("%s: upper_bound_0:%d, lower_bound_0:%d\n", -+ __func__, upper_bound_0, lower_bound_0); -+ RTW_INFO("%s: upper_bound_1:%d, lower_bound_1:%d\n", -+ __func__, upper_bound_1, lower_bound_1); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ pmccadapriv = &iface->mcc_adapterpriv; -+ pmccadapriv = &iface->mcc_adapterpriv; -+ if (pmccadapriv->role == MCC_ROLE_MAX) -+ continue; -+#if 0 -+ if (pmccadapriv->order == 0) { -+ pmccadapriv->mcc_duration = mcc_duration; -+ } else if (pmccadapriv->order == 1) { -+ pmccadapriv->mcc_duration = mcc_interval - mcc_duration; -+ } else { -+ RTW_INFO("[MCC] not support >= 3 interface\n"); -+ rtw_warn_on(1); -+ } -+#endif -+ RTW_INFO("********************\n"); -+ RTW_INFO(FUNC_ADPT_FMT": order:%d, role:%d\n", -+ FUNC_ADPT_ARG(iface), pmccadapriv->order, pmccadapriv->role); -+ RTW_INFO(FUNC_ADPT_FMT": mcc duration:%d, target tx bytes:%d\n", -+ FUNC_ADPT_ARG(iface), pmccadapriv->mcc_duration, pmccadapriv->mcc_target_tx_bytes_to_port); -+ RTW_INFO(FUNC_ADPT_FMT": mgmt queue macid:%d, bitmap:0x%02x\n", -+ FUNC_ADPT_ARG(iface), pmccadapriv->mgmt_queue_macid, pmccadapriv->mcc_macid_bitmap); -+ RTW_INFO("********************\n"); -+ } -+ -+ } -+exit: -+ return need_update; -+} -+ -+static u8 rtw_hal_decide_mcc_role(PADAPTER padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ _adapter *iface = NULL; -+ struct mcc_adapter_priv *pmccadapriv = NULL; -+ struct wifidirect_info *pwdinfo = NULL; -+ struct mlme_priv *pmlmepriv = NULL; -+ u8 ret = _SUCCESS, i = 0; -+ u8 order = 1; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ pmccadapriv = &iface->mcc_adapterpriv; -+ pwdinfo = &iface->wdinfo; -+ -+ if (MLME_IS_GO(iface)) -+ pmccadapriv->role = MCC_ROLE_GO; -+ else if (MLME_IS_AP(iface)) -+ pmccadapriv->role = MCC_ROLE_AP; -+ else if (MLME_IS_GC(iface)) -+ pmccadapriv->role = MCC_ROLE_GC; -+ else if (MLME_IS_STA(iface)) { -+ if (MLME_IS_LINKING(iface) || MLME_IS_ASOC(iface)) -+ pmccadapriv->role = MCC_ROLE_STA; -+ else { -+ /* bypass non-linked/non-linking interface */ -+ RTW_INFO(FUNC_ADPT_FMT" mlme state:0x%2x\n", -+ FUNC_ADPT_ARG(iface), MLME_STATE(iface)); -+ continue; -+ } -+ } else { -+ /* bypass non-linked/non-linking interface */ -+ RTW_INFO(FUNC_ADPT_FMT" P2P Role:%d, mlme state:0x%2x\n", -+ FUNC_ADPT_ARG(iface), pwdinfo->role, MLME_STATE(iface)); -+ continue; -+ } -+ -+ if (padapter == iface) { -+ /* current adapter is order 0 */ -+ rtw_hal_config_mcc_role_setting(iface, 0); -+ } else { -+ rtw_hal_config_mcc_role_setting(iface, order); -+ order ++; -+ } -+ } -+ -+ rtw_hal_mcc_update_timing_parameters(padapter, _TRUE); -+ -+ return ret; -+} -+ -+static void rtw_hal_construct_CTS(PADAPTER padapter, u8 *pframe, u32 *pLength) -+{ -+ u8 broadcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ /* frame type, length = 1*/ -+ set_frame_sub_type(pframe, WIFI_RTS); -+ -+ /* frame control flag, length = 1 */ -+ *(pframe + 1) = 0; -+ -+ /* frame duration, length = 2 */ -+ *(pframe + 2) = 0x00; -+ *(pframe + 3) = 0x78; -+ -+ /* frame recvaddr, length = 6 */ -+ _rtw_memcpy((pframe + 4), broadcast_addr, ETH_ALEN); -+ _rtw_memcpy((pframe + 4 + ETH_ALEN), adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy((pframe + 4 + ETH_ALEN*2), adapter_mac_addr(padapter), ETH_ALEN); -+ *pLength = 22; -+} -+ -+/* avoid wrong information for power limit */ -+void rtw_hal_mcc_upadate_chnl_bw(_adapter *padapter, u8 ch, u8 ch_offset, u8 bw, u8 print) -+{ -+ -+ u8 center_ch, chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(padapter); -+ u8 cch_160, cch_80, cch_40, cch_20; -+ -+ center_ch = rtw_get_center_ch(ch, bw, ch_offset); -+ -+ if (bw == CHANNEL_WIDTH_80) { -+ if (center_ch > ch) -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_LOWER; -+ else if (center_ch < ch) -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_UPPER; -+ else -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ -+ /* set Channel */ -+ /* saved channel/bw info */ -+ rtw_set_oper_ch(padapter, ch); -+ rtw_set_oper_bw(padapter, bw); -+ rtw_set_oper_choffset(padapter, ch_offset); -+ -+ cch_80 = bw == CHANNEL_WIDTH_80 ? center_ch : 0; -+ cch_40 = bw == CHANNEL_WIDTH_40 ? center_ch : 0; -+ cch_20 = bw == CHANNEL_WIDTH_20 ? center_ch : 0; -+ -+ if (cch_80 != 0) -+ cch_40 = rtw_get_scch_by_cch_offset(cch_80, CHANNEL_WIDTH_80, chnl_offset80); -+ if (cch_40 != 0) -+ cch_20 = rtw_get_scch_by_cch_offset(cch_40, CHANNEL_WIDTH_40, ch_offset); -+ -+ -+ hal->cch_80 = cch_80; -+ hal->cch_40 = cch_40; -+ hal->cch_20 = cch_20; -+ hal->current_channel = center_ch; -+ hal->CurrentCenterFrequencyIndex1 = center_ch; -+ hal->current_channel_bw = bw; -+ hal->nCur40MhzPrimeSC = ch_offset; -+ hal->nCur80MhzPrimeSC = chnl_offset80; -+ hal->current_band_type = ch > 14 ? BAND_ON_5G:BAND_ON_2_4G; -+ -+ if (print) { -+ RTW_INFO(FUNC_ADPT_FMT" cch:%u, %s, offset40:%u, offset80:%u (%u, %u, %u), band:%s\n" -+ , FUNC_ADPT_ARG(padapter), center_ch, ch_width_str(bw) -+ , ch_offset, chnl_offset80 -+ , hal->cch_80, hal->cch_40, hal->cch_20 -+ , band_str(hal->current_band_type)); -+ } -+} -+ -+u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, -+ u8 tx_desc, u32 page_size, u8 *total_page_num, RSVDPAGE_LOC *rsvd_page_loc, u8 *page_num) -+{ -+ u32 len = 0; -+ _adapter *iface = NULL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); -+ struct mlme_ext_info *pmlmeinfo = NULL; -+ struct mlme_ext_priv *pmlmeext = NULL; -+ struct hal_com_data *hal = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ struct mcc_adapter_priv *mccadapriv = NULL; -+#if defined(CONFIG_RTL8822C) -+ struct dm_struct *phydm = adapter_to_phydm(adapter); -+ struct txagc_table_8822c tab; -+ u8 agc_buff[2][NUM_RATE_AC_2SS]; /* tatol 0x40 rate index for PATH A/B */ -+#endif -+ -+ u8 ret = _SUCCESS, i = 0, j =0, order = 0, CurtPktPageNum = 0; -+ u8 *start = NULL; -+ u8 path = RF_PATH_A; -+ -+ if (page_num) { -+#ifdef CONFIG_MCC_MODE_V2 -+ if (!hal->RegIQKFWOffload) -+ RTW_WARN("[MCC] must enable FW IQK for New IC\n"); -+#endif /* CONFIG_MCC_MODE_V2 */ -+ *total_page_num += (2 * MAX_MCC_NUM+ 1); -+ RTW_INFO("[MCC] allocate mcc rsvd page num = %d\n", *total_page_num); -+ goto exit; -+ } -+ -+ /* check proccess mcc start setting */ -+ if (!rtw_hal_check_mcc_status(adapter, MCC_STATUS_PROCESS_MCC_START_SETTING)) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ if (mccadapriv->role == MCC_ROLE_MAX) -+ continue; -+ -+ order = mccadapriv->order; -+ pmccobjpriv->mcc_loc_rsvd_paga[order] = *total_page_num; -+ -+ switch (mccadapriv->role) { -+ case MCC_ROLE_STA: -+ case MCC_ROLE_GC: -+ /* Build NULL DATA */ -+ RTW_INFO("LocNull(order:%d): %d\n" -+ , order, pmccobjpriv->mcc_loc_rsvd_paga[order]); -+ len = 0; -+ -+ rtw_hal_construct_NullFunctionData(iface -+ , &pframe[*index], &len, _FALSE, 0, 0, _FALSE); -+ rtw_hal_fill_fake_txdesc(iface, &pframe[*index-tx_desc], -+ len, _FALSE, _FALSE, _FALSE); -+ -+ CurtPktPageNum = (u8)PageNum(tx_desc + len, page_size); -+ *total_page_num += CurtPktPageNum; -+ *index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("LocNull", CurtPktPageNum, *total_page_num, *index); -+ break; -+ case MCC_ROLE_AP: -+ /* Bulid CTS */ -+ RTW_INFO("LocCTS(order:%d): %d\n" -+ , order, pmccobjpriv->mcc_loc_rsvd_paga[order]); -+ -+ len = 0; -+ rtw_hal_construct_CTS(iface, &pframe[*index], &len); -+ rtw_hal_fill_fake_txdesc(iface, &pframe[*index-tx_desc], -+ len, _FALSE, _FALSE, _FALSE); -+ -+ CurtPktPageNum = (u8)PageNum(tx_desc + len, page_size); -+ *total_page_num += CurtPktPageNum; -+ *index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("LocCTS", CurtPktPageNum, *total_page_num, *index); -+ break; -+ case MCC_ROLE_GO: -+ /* To DO */ -+ break; -+ default: -+ RTW_INFO(FUNC_ADPT_FMT": unknown role = %d\n" -+ , FUNC_ADPT_ARG(iface), mccadapriv->role); -+ break; -+ } -+ } -+ -+ for (i = 0; i < MAX_MCC_NUM; i++) { -+ u8 center_ch = 0, ch = 0, bw = 0, bw_offset = 0; -+ BAND_TYPE band = BAND_MAX; -+ u8 power_index = 0; -+ u8 rate_array_sz = 0; -+ u8 *rates = NULL; -+ u8 rate = 0; -+ u8 shift = 0; -+ u32 power_index_4bytes = 0; -+ u8 total_rate = 0; -+ u8 *total_rate_offset = NULL; -+ -+ iface = pmccobjpriv->iface[i]; -+ pmlmeext = &iface->mlmeextpriv; -+ ch = pmlmeext->cur_channel; -+ bw = pmlmeext->cur_bwmode; -+ bw_offset = pmlmeext->cur_ch_offset; -+ center_ch = rtw_get_center_ch(ch, bw, bw_offset); -+ band = center_ch <= 14 ? BAND_ON_2_4G : BAND_ON_5G; -+ rtw_hal_mcc_upadate_chnl_bw(iface, ch, bw_offset, bw, _TRUE); -+ -+ start = &pframe[*index - tx_desc]; -+ _rtw_memset(start, 0, page_size); -+ pmccobjpriv->mcc_pwr_idx_rsvd_page[i] = *total_page_num; -+ RTW_INFO(ADPT_FMT" order:%d, pwr_idx_rsvd_page location[%d]: %d\n", -+ ADPT_ARG(iface), mccadapriv->order, -+ i, pmccobjpriv->mcc_pwr_idx_rsvd_page[i]); -+ -+ total_rate_offset = start; -+#if !defined(CONFIG_RTL8822C) -+ for (path = RF_PATH_A; path < hal_spec->rf_reg_path_num; ++path) { -+ total_rate = 0; -+ /* PATH A for 0~63 byte, PATH B for 64~127 byte*/ -+ if (path == RF_PATH_A) -+ start = total_rate_offset + 1; -+ else if (path == RF_PATH_B) -+ start = total_rate_offset + 64; -+ else { -+ RTW_INFO("[MCC] %s: unknow RF PATH(%d)\n", __func__, path); -+ break; -+ } -+ -+ /* CCK */ -+ if (ch <= 14) { -+ rate_array_sz = rates_by_sections[CCK].rate_num; -+ rates = rates_by_sections[CCK].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, CCK, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ -+ shift = rate % 4; -+ if (shift == 0) { -+ *start = rate; -+ start++; -+ total_rate++; -+ -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ #endif -+ } -+ -+ *start = power_index; -+ start++; -+ -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ -+ -+ shift = rate % 4; -+ power_index_4bytes |= ((power_index & 0xff) << (shift * 8)); -+ if (shift == 3) { -+ rate = rate - 3; -+ RTW_INFO("(index:0x%02x, rfpath:%d, rate:0x%02x)\n", index, path, rate); -+ power_index_4bytes = 0; -+ total_rate++; -+ } -+ #endif -+ -+ } -+ } -+ -+ /* OFDM */ -+ rate_array_sz = rates_by_sections[OFDM].rate_num; -+ rates = rates_by_sections[OFDM].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, OFDM, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ -+ shift = rate % 4; -+ if (shift == 0) { -+ *start = rate; -+ start++; -+ total_rate++; -+ -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ #endif -+ -+ } -+ -+ *start = power_index; -+ start++; -+ -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ -+ shift = rate % 4; -+ power_index_4bytes |= ((power_index & 0xff) << (shift * 8)); -+ if (shift == 3) { -+ rate = rate - 3; -+ RTW_INFO("(index:0x%02x, rfpath:%d, rate:0x%02x)\n", index, path, rate); -+ power_index_4bytes = 0; -+ total_rate++; -+ } -+ #endif -+ } -+ -+ /* HT_MCS0_MCS7 */ -+ rate_array_sz = rates_by_sections[HT_MCS0_MCS7].rate_num; -+ rates = rates_by_sections[HT_MCS0_MCS7].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, HT_1SS, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ -+ shift = rate % 4; -+ if (shift == 0) { -+ *start = rate; -+ start++; -+ total_rate++; -+ -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ #endif -+ -+ } -+ -+ *start = power_index; -+ start++; -+ -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ -+ shift = rate % 4; -+ power_index_4bytes |= ((power_index & 0xff) << (shift * 8)); -+ if (shift == 3) { -+ rate = rate - 3; -+ RTW_INFO("(index:0x%02x, rfpath:%d, rate:0x%02x)\n", index, path, rate); -+ power_index_4bytes = 0; -+ total_rate++; -+ } -+ #endif -+ } -+ -+ /* HT_MCS8_MCS15 */ -+ rate_array_sz = rates_by_sections[HT_MCS8_MCS15].rate_num; -+ rates = rates_by_sections[HT_MCS8_MCS15].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, HT_2SS, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ -+ shift = rate % 4; -+ if (shift == 0) { -+ *start = rate; -+ start++; -+ total_rate++; -+ -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ #endif -+ } -+ -+ *start = power_index; -+ start++; -+ -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ -+ shift = rate % 4; -+ power_index_4bytes |= ((power_index & 0xff) << (shift * 8)); -+ if (shift == 3) { -+ rate = rate - 3; -+ RTW_INFO("(index:0x%02x, rfpath:%d, rate:0x%02x)\n", index, path, rate); -+ power_index_4bytes = 0; -+ total_rate++; -+ } -+ #endif -+ } -+ -+ /* VHT_1SSMCS0_1SSMCS9 */ -+ rate_array_sz = rates_by_sections[VHT_1SSMCS0_1SSMCS9].rate_num; -+ rates = rates_by_sections[VHT_1SSMCS0_1SSMCS9].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, VHT_1SS, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ -+ shift = rate % 4; -+ if (shift == 0) { -+ *start = rate; -+ start++; -+ total_rate++; -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:0x%02x\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ #endif -+ } -+ *start = power_index; -+ start++; -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ -+ shift = rate % 4; -+ power_index_4bytes |= ((power_index & 0xff) << (shift * 8)); -+ if (shift == 3) { -+ rate = rate - 3; -+ RTW_INFO("(index:0x%02x, rfpath:%d, rate:0x%02x)\n", index, path, rate); -+ power_index_4bytes = 0; -+ total_rate++; -+ } -+ #endif -+ } -+ -+ /* VHT_2SSMCS0_2SSMCS9 */ -+ rate_array_sz = rates_by_sections[VHT_2SSMCS0_2SSMCS9].rate_num; -+ rates = rates_by_sections[VHT_2SSMCS0_2SSMCS9].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, VHT_2SS, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ -+ shift = rate % 4; -+ if (shift == 0) { -+ *start = rate; -+ start++; -+ total_rate++; -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ #endif -+ } -+ *start = power_index; -+ start++; -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", -+ ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), -+ center_ch, MGN_RATE_STR(rates[j]), power_index); -+ -+ shift = rate % 4; -+ power_index_4bytes |= ((power_index & 0xff) << (shift * 8)); -+ if (shift == 3) { -+ rate = rate - 3; -+ RTW_INFO("(index:0x%02x, rfpath:%d, rate:0x%02x)\n", index, path, rate); -+ power_index_4bytes = 0; -+ total_rate++; -+ } -+ #endif -+ } -+ -+ } -+ /* total rate store in offset 0 */ -+ *total_rate_offset = total_rate; -+ -+#ifdef DBG_PWR_IDX_RSVD_PAGE -+ RTW_INFO("total_rate=%d\n", total_rate); -+ RTW_INFO(" ======================="ADPT_FMT"===========================\n", ADPT_ARG(iface)); -+ RTW_INFO_DUMP("\n", total_rate_offset, 128); -+ RTW_INFO(" ==================================================\n"); -+#endif -+ -+ CurtPktPageNum = 1; -+ *total_page_num += CurtPktPageNum; -+ *index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("mcc_pwr_idx_rsvd_page", CurtPktPageNum, *total_page_num, *index); -+#else /* 8822C */ -+ for (path = RF_PATH_A; path < hal_spec->rf_reg_path_num; ++path) { -+ /* CCK */ -+ if (ch <= 14) { -+ rate_array_sz = rates_by_sections[CCK].rate_num; -+ rates = rates_by_sections[CCK].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, CCK, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ agc_buff[path][rate] = power_index; -+ } -+ } -+ -+ /* OFDM */ -+ rate_array_sz = rates_by_sections[OFDM].rate_num; -+ rates = rates_by_sections[OFDM].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, OFDM, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ agc_buff[path][rate] = power_index; -+ } -+ /* HT */ -+ rate_array_sz = rates_by_sections[HT_MCS0_MCS7].rate_num; -+ rates = rates_by_sections[HT_MCS0_MCS7].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, HT_1SS, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ agc_buff[path][rate] = power_index; -+ } -+ -+ rate_array_sz = rates_by_sections[HT_MCS8_MCS15].rate_num; -+ rates = rates_by_sections[HT_MCS8_MCS15].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, HT_2SS, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ agc_buff[path][rate] = power_index; -+ } -+ /* VHT */ -+ rate_array_sz = rates_by_sections[VHT_1SSMCS0_1SSMCS9].rate_num; -+ rates = rates_by_sections[VHT_1SSMCS0_1SSMCS9].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, VHT_1SS, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ agc_buff[path][rate] = power_index; -+ } -+ -+ rate_array_sz = rates_by_sections[VHT_2SSMCS0_2SSMCS9].rate_num; -+ rates = rates_by_sections[VHT_2SSMCS0_2SSMCS9].rates; -+ for (j = 0; j < rate_array_sz; ++j) { -+ power_index = phy_get_tx_power_index_ex(iface, path, VHT_2SS, rates[j], bw, band, center_ch, ch); -+ rate = phy_get_rate_idx_of_txpwr_by_rate(rates[j]); -+ agc_buff[path][rate] = power_index; -+ } -+ } -+ phydm_get_txagc_ref_and_diff_8822c(phydm, agc_buff, NUM_RATE_AC_2SS, &tab); -+ *start = tab.ref_pow_cck[0]; -+ start++; -+ *start = tab.ref_pow_cck[1]; -+ start++; -+ *start = tab.ref_pow_ofdm[0]; -+ start++; -+ *start = tab.ref_pow_ofdm[1]; -+ start++; -+ _rtw_memcpy(start, tab.diff_t, sizeof(tab.diff_t)); -+ CurtPktPageNum = 1; -+ *total_page_num += CurtPktPageNum; -+ *index += (CurtPktPageNum * page_size); -+ RSVD_PAGE_CFG("mcc_pwr_idx_rsvd_page", CurtPktPageNum, *total_page_num, *index); -+ #ifdef DBG_PWR_IDX_RSVD_PAGE -+ if (1) { -+ u8 path_idx; -+ for (path_idx = 0; path_idx < 2; path_idx++) { -+ for (j = 0; j < NUM_RATE_AC_2SS; j++) -+ RTW_INFO("agc_buff[%d][%d]=%x\n", i, j, agc_buff[i][j]); -+ } -+ RTW_INFO("tab->ref_pow_cck[0]=%x\n", tab.ref_pow_cck[0]); -+ RTW_INFO("tab->ref_pow_cck[1]=%x\n", tab.ref_pow_cck[1]); -+ RTW_INFO("tab->ref_pow_ofdm[0]=%x\n", tab.ref_pow_ofdm[0]); -+ RTW_INFO("tab->ref_pow_ofdm[1]=%x\n", tab.ref_pow_ofdm[1]); -+ RTW_INFO_DUMP("diff_t ", tab.diff_t, NUM_RATE_AC_2SS); -+ RTW_INFO_DUMP("tab ", (u8 *)&tab, sizeof(tab)); -+ } -+ #endif -+ -+#endif -+ } -+ -+exit: -+ return ret; -+} -+ -+/* -+* 1. Download MCC rsvd page -+* 2. Re-Download beacon after download rsvd page -+*/ -+static void rtw_hal_set_fw_mcc_rsvd_page(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ PADAPTER port0_iface = dvobj_get_port0_adapter(dvobj); -+ PADAPTER iface = NULL; -+ struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); -+ u8 mstatus = RT_MEDIA_CONNECT, i = 0; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ rtw_hal_set_hwreg(port0_iface, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); -+ -+#ifdef CONFIG_AP_MODE -+ /* Re-Download beacon */ -+ for (i = 0; i < MAX_MCC_NUM; i++) { -+ iface = pmccobjpriv->iface[i]; -+ if (iface == NULL) -+ continue; -+ -+ pmccadapriv = &iface->mcc_adapterpriv; -+ -+ if (pmccadapriv->role == MCC_ROLE_AP -+ || pmccadapriv->role == MCC_ROLE_GO) { -+ tx_beacon_hdl(iface, NULL); -+ } -+ } -+#endif -+} -+ -+static void rtw_hal_set_mcc_rsvdpage_cmd(_adapter *padapter) -+{ -+ u8 cmd[H2C_MCC_LOCATION_LEN] = {0}, i = 0, order = 0; -+ _adapter *iface = NULL; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); -+ -+ SET_H2CCMD_MCC_PWRIDX_OFFLOAD_EN(cmd, _TRUE); -+ SET_H2CCMD_MCC_PWRIDX_OFFLOAD_RFNUM(cmd, hal_spec->rf_reg_path_num); -+ for (order = 0; order < MAX_MCC_NUM; order++) { -+ iface = pmccobjpriv->iface[i]; -+ -+ SET_H2CCMD_MCC_RSVDPAGE_LOC((cmd + order), pmccobjpriv->mcc_loc_rsvd_paga[order]); -+ SET_H2CCMD_MCC_PWRIDX_RSVDPAGE_LOC ((cmd + order), pmccobjpriv->mcc_pwr_idx_rsvd_page[order]); -+ } -+ -+#ifdef CONFIG_MCC_MODE_DEBUG -+ RTW_INFO("=========================\n"); -+ RTW_INFO("MCC RSVD PAGE LOC:\n"); -+ for (i = 0; i < H2C_MCC_LOCATION_LEN; i++) -+ pr_dbg("0x%x ", cmd[i]); -+ pr_dbg("\n"); -+ RTW_INFO("=========================\n"); -+#endif /* CONFIG_MCC_MODE_DEBUG */ -+ -+ rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_LOCATION, H2C_MCC_LOCATION_LEN, cmd); -+} -+ -+static void rtw_hal_set_mcc_time_setting_cmd(PADAPTER padapter) -+{ -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ u8 cmd[H2C_MCC_TIME_SETTING_LEN] = {0}; -+ u8 fw_eable = 1; -+ u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME; -+ u8 starting_ap_num = DEV_AP_STARTING_NUM(dvobj); -+ u8 ap_num = DEV_AP_NUM(dvobj); -+ -+ if (starting_ap_num == 0 && ap_num == 0) -+ /* For STA+GC/STA+STA, TSF of GC/STA does not need to sync from TSF of other STA/GC */ -+ fw_eable = 0; -+ else -+ /* Only for STA+GO/STA+AP, TSF of AP/GO need to sync from TSF of STA */ -+ fw_eable = 1; -+ -+ if (fw_eable == 1) { -+ PADAPTER order0_iface = NULL; -+ PADAPTER order1_iface = NULL; -+ u8 policy_idx = mccobjpriv->policy_index; -+ u8 tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX]; -+ u8 start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX]; -+ u8 interval = mcc_switch_channel_policy_table[policy_idx][MCC_INTERVAL_IDX]; -+ u8 guard_offset0 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET0_IDX]; -+ u8 guard_offset1 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET1_IDX]; -+ enum _hw_port tsf_bsae_port = MAX_HW_PORT; -+ enum _hw_port tsf_sync_port = MAX_HW_PORT; -+ order0_iface = mccobjpriv->iface[0]; -+ order1_iface = mccobjpriv->iface[1]; -+ -+ tsf_bsae_port = rtw_hal_get_port(order1_iface); -+ tsf_sync_port = rtw_hal_get_port(order0_iface); -+ -+ /* FW set enable */ -+ SET_H2CCMD_MCC_TIME_SETTING_FW_EN(cmd, fw_eable); -+ /* TSF Sync offset */ -+ SET_H2CCMD_MCC_TIME_SETTING_TSF_SYNC_OFFSET(cmd, tsf_sync_offset); -+ /* start time offset */ -+ SET_H2CCMD_MCC_TIME_SETTING_START_TIME(cmd, (start_time_offset + guard_offset0)); -+ /* interval */ -+ SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(cmd, interval); -+ /* Early time to inform driver by C2H before switch channel */ -+ SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(cmd, swchannel_early_time); -+ /* Port0 sync from Port1, not support multi-port */ -+ SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(cmd, tsf_bsae_port); -+ SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(cmd, tsf_sync_port); -+ } else { -+ /* start time offset */ -+ SET_H2CCMD_MCC_TIME_SETTING_START_TIME(cmd, mccobjpriv->start_time); -+ /* interval */ -+ SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(cmd, mccobjpriv->interval); -+ /* Early time to inform driver by C2H before switch channel */ -+ SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(cmd, swchannel_early_time); -+ } -+ -+#ifdef CONFIG_MCC_MODE_DEBUG -+ { -+ u8 i = 0; -+ -+ RTW_INFO("=========================\n"); -+ RTW_INFO("NoA:\n"); -+ for (i = 0; i < H2C_MCC_TIME_SETTING_LEN; i++) -+ pr_dbg("0x%x ", cmd[i]); -+ pr_dbg("\n"); -+ RTW_INFO("=========================\n"); -+ } -+#endif /* CONFIG_MCC_MODE_DEBUG */ -+ -+ rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_TIME_SETTING, H2C_MCC_TIME_SETTING_LEN, cmd); -+} -+ -+#ifndef CONFIG_MCC_MODE_V2 -+static void rtw_hal_set_mcc_IQK_offload_cmd(PADAPTER padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); -+ struct mcc_adapter_priv *pmccadapriv = NULL; -+ _adapter *iface = NULL; -+ u8 cmd[H2C_MCC_IQK_PARAM_LEN] = {0}, bready = 0, i = 0, order = 0; -+ u16 TX_X = 0, TX_Y = 0, RX_X = 0, RX_Y = 0; -+ u8 total_rf_path = GET_HAL_SPEC(padapter)->rf_reg_path_num; -+ u8 rf_path_idx = 0, last_order = MAX_MCC_NUM - 1, last_rf_path_index = total_rf_path - 1; -+ -+ /* by order, last order & last_rf_path_index must set ready bit = 1 */ -+ for (i = 0; i < MAX_MCC_NUM; i++) { -+ iface = pmccobjpriv->iface[i]; -+ if (iface == NULL) -+ continue; -+ -+ pmccadapriv = &iface->mcc_adapterpriv; -+ order = pmccadapriv->order; -+ -+ for (rf_path_idx = 0; rf_path_idx < total_rf_path; rf_path_idx ++) { -+ -+ _rtw_memset(cmd, 0, H2C_MCC_IQK_PARAM_LEN); -+ TX_X = pmccadapriv->mcc_iqk_arr[rf_path_idx].TX_X & 0x7ff;/* [10:0] */ -+ TX_Y = pmccadapriv->mcc_iqk_arr[rf_path_idx].TX_Y & 0x7ff;/* [10:0] */ -+ RX_X = pmccadapriv->mcc_iqk_arr[rf_path_idx].RX_X & 0x3ff;/* [9:0] */ -+ RX_Y = pmccadapriv->mcc_iqk_arr[rf_path_idx].RX_Y & 0x3ff;/* [9:0] */ -+ -+ /* ready or not */ -+ if (order == last_order && rf_path_idx == last_rf_path_index) -+ bready = 1; -+ else -+ bready = 0; -+ -+ SET_H2CCMD_MCC_IQK_READY(cmd, bready); -+ SET_H2CCMD_MCC_IQK_ORDER(cmd, order); -+ SET_H2CCMD_MCC_IQK_PATH(cmd, rf_path_idx); -+ -+ /* fill RX_X[7:0] to (cmd+1)[7:0] bitlen=8 */ -+ SET_H2CCMD_MCC_IQK_RX_L(cmd, (u8)(RX_X & 0xff)); -+ /* fill RX_X[9:8] to (cmd+2)[1:0] bitlen=2 */ -+ SET_H2CCMD_MCC_IQK_RX_M1(cmd, (u8)((RX_X >> 8) & 0x03)); -+ /* fill RX_Y[5:0] to (cmd+2)[7:2] bitlen=6 */ -+ SET_H2CCMD_MCC_IQK_RX_M2(cmd, (u8)(RX_Y & 0x3f)); -+ /* fill RX_Y[9:6] to (cmd+3)[3:0] bitlen=4 */ -+ SET_H2CCMD_MCC_IQK_RX_H(cmd, (u8)((RX_Y >> 6) & 0x0f)); -+ -+ -+ /* fill TX_X[7:0] to (cmd+4)[7:0] bitlen=8 */ -+ SET_H2CCMD_MCC_IQK_TX_L(cmd, (u8)(TX_X & 0xff)); -+ /* fill TX_X[10:8] to (cmd+5)[2:0] bitlen=3 */ -+ SET_H2CCMD_MCC_IQK_TX_M1(cmd, (u8)((TX_X >> 8) & 0x07)); -+ /* fill TX_Y[4:0] to (cmd+5)[7:3] bitlen=5 */ -+ SET_H2CCMD_MCC_IQK_TX_M2(cmd, (u8)(TX_Y & 0x1f)); -+ /* fill TX_Y[10:5] to (cmd+6)[5:0] bitlen=6 */ -+ SET_H2CCMD_MCC_IQK_TX_H(cmd, (u8)((TX_Y >> 5) & 0x3f)); -+ -+#ifdef CONFIG_MCC_MODE_DEBUG -+ RTW_INFO("=========================\n"); -+ RTW_INFO(FUNC_ADPT_FMT" IQK:\n", FUNC_ADPT_ARG(iface)); -+ RTW_INFO("TX_X: 0x%02x\n", TX_X); -+ RTW_INFO("TX_Y: 0x%02x\n", TX_Y); -+ RTW_INFO("RX_X: 0x%02x\n", RX_X); -+ RTW_INFO("RX_Y: 0x%02x\n", RX_Y); -+ RTW_INFO("cmd[0]:0x%02x\n", cmd[0]); -+ RTW_INFO("cmd[1]:0x%02x\n", cmd[1]); -+ RTW_INFO("cmd[2]:0x%02x\n", cmd[2]); -+ RTW_INFO("cmd[3]:0x%02x\n", cmd[3]); -+ RTW_INFO("cmd[4]:0x%02x\n", cmd[4]); -+ RTW_INFO("cmd[5]:0x%02x\n", cmd[5]); -+ RTW_INFO("cmd[6]:0x%02x\n", cmd[6]); -+ RTW_INFO("=========================\n"); -+#endif /* CONFIG_MCC_MODE_DEBUG */ -+ -+ rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_IQK_PARAM, H2C_MCC_IQK_PARAM_LEN, cmd); -+ } -+ } -+} -+#endif -+ -+ -+static void rtw_hal_set_mcc_macid_cmd(PADAPTER padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_adapter_priv *pmccadapriv = NULL; -+ _adapter *iface = NULL; -+ u8 cmd[H2C_MCC_MACID_BITMAP_LEN] = {0}, i = 0, order = 0; -+ u16 bitmap = 0; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ pmccadapriv = &iface->mcc_adapterpriv; -+ if (pmccadapriv->role == MCC_ROLE_MAX) -+ continue; -+ -+ order = pmccadapriv->order; -+ bitmap = pmccadapriv->mcc_macid_bitmap; -+ -+ if (order >= (H2C_MCC_MACID_BITMAP_LEN/2)) { -+ RTW_INFO(FUNC_ADPT_FMT" only support 3 interface at most(%d)\n" -+ , FUNC_ADPT_ARG(padapter), order); -+ continue; -+ } -+ SET_H2CCMD_MCC_MACID_BITMAP_L((cmd + order * 2), (u8)(bitmap & 0xff)); -+ SET_H2CCMD_MCC_MACID_BITMAP_H((cmd + order * 2), (u8)((bitmap >> 8) & 0xff)); -+ } -+ -+#ifdef CONFIG_MCC_MODE_DEBUG -+ RTW_INFO("=========================\n"); -+ RTW_INFO("MACID BITMAP: "); -+ for (i = 0; i < H2C_MCC_MACID_BITMAP_LEN; i++) -+ printk("0x%x ", cmd[i]); -+ printk("\n"); -+ RTW_INFO("=========================\n"); -+#endif /* CONFIG_MCC_MODE_DEBUG */ -+ rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_MACID_BITMAP, H2C_MCC_MACID_BITMAP_LEN, cmd); -+} -+ -+#ifdef CONFIG_MCC_MODE_V2 -+static u8 get_pri_ch_idx_by_adapter(u8 center_ch, u8 channel, u8 bw, u8 ch_offset40) -+{ -+ u8 pri_ch_idx = 0, chnl_offset80 = 0; -+ -+ if (bw == CHANNEL_WIDTH_80) { -+ if (center_ch > channel) -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_LOWER; -+ else if (center_ch < channel) -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_UPPER; -+ else -+ chnl_offset80 = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } -+ -+ if (bw == CHANNEL_WIDTH_80) { -+ /* primary channel is at lower subband of 80MHz & 40MHz */ -+ if ((ch_offset40 == HAL_PRIME_CHNL_OFFSET_LOWER) && (chnl_offset80 == HAL_PRIME_CHNL_OFFSET_LOWER)) -+ pri_ch_idx = VHT_DATA_SC_20_LOWEST_OF_80MHZ; -+ /* primary channel is at lower subband of 80MHz & upper subband of 40MHz */ -+ else if ((ch_offset40 == HAL_PRIME_CHNL_OFFSET_UPPER) && (chnl_offset80 == HAL_PRIME_CHNL_OFFSET_LOWER)) -+ pri_ch_idx = VHT_DATA_SC_20_LOWER_OF_80MHZ; -+ /* primary channel is at upper subband of 80MHz & lower subband of 40MHz */ -+ else if ((ch_offset40 == HAL_PRIME_CHNL_OFFSET_LOWER) && (chnl_offset80 == HAL_PRIME_CHNL_OFFSET_UPPER)) -+ pri_ch_idx = VHT_DATA_SC_20_UPPER_OF_80MHZ; -+ /* primary channel is at upper subband of 80MHz & upper subband of 40MHz */ -+ else if ((ch_offset40 == HAL_PRIME_CHNL_OFFSET_UPPER) && (chnl_offset80 == HAL_PRIME_CHNL_OFFSET_UPPER)) -+ pri_ch_idx = VHT_DATA_SC_20_UPPERST_OF_80MHZ; -+ else { -+ if (chnl_offset80 == HAL_PRIME_CHNL_OFFSET_LOWER) -+ pri_ch_idx = VHT_DATA_SC_40_LOWER_OF_80MHZ; -+ else if (chnl_offset80 == HAL_PRIME_CHNL_OFFSET_UPPER) -+ pri_ch_idx = VHT_DATA_SC_40_UPPER_OF_80MHZ; -+ else -+ RTW_INFO("SCMapping: DONOT CARE Mode Setting\n"); -+ } -+ } else if (bw == CHANNEL_WIDTH_40) { -+ /* primary channel is at upper subband of 40MHz */ -+ if (ch_offset40== HAL_PRIME_CHNL_OFFSET_UPPER) -+ pri_ch_idx = VHT_DATA_SC_20_UPPER_OF_80MHZ; -+ /* primary channel is at lower subband of 40MHz */ -+ else if (ch_offset40 == HAL_PRIME_CHNL_OFFSET_LOWER) -+ pri_ch_idx = VHT_DATA_SC_20_LOWER_OF_80MHZ; -+ else -+ RTW_INFO("SCMapping: DONOT CARE Mode Setting\n"); -+ } -+ -+ return pri_ch_idx; -+} -+ -+static void rtw_hal_set_mcc_ctrl_cmd_v2(PADAPTER padapter, u8 stop) -+{ -+ u8 cmd[H2C_MCC_CTRL_LEN] = {0}, i = 0; -+ u8 order = 0, totalnum = 0; -+ u8 center_ch = 0, pri_ch_idx = 0, bw = 0; -+ u8 duration = 0, role = 0, incurch = 0, rfetype = 0, distxnull = 0, c2hrpt = 0; -+ u8 dis_sw_retry = 0, null_early_time=2, tsfx = 0, update_parm = 0; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ struct mlme_ext_priv *pmlmeext = NULL; -+ struct mlme_ext_info *pmlmeinfo = NULL; -+ _adapter *iface = NULL; -+ -+ RTW_INFO(FUNC_ADPT_FMT": stop=%d\n", FUNC_ADPT_ARG(padapter), stop); -+ -+ for (i = 0; i < MAX_MCC_NUM; i++) { -+ iface = pmccobjpriv->iface[i]; -+ if (iface == NULL) -+ continue; -+ -+ if (stop) { -+ if (iface != padapter) -+ continue; -+ } -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ order = mccadapriv->order; -+ -+ if (!stop) -+ totalnum = MAX_MCC_NUM; -+ else -+ totalnum = 0xff; /* 0xff means stop */ -+ -+ pmlmeext = &iface->mlmeextpriv; -+ center_ch = rtw_get_center_ch(pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); -+ pri_ch_idx = get_pri_ch_idx_by_adapter(center_ch, pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); -+ bw = pmlmeext->cur_bwmode; -+ duration = mccadapriv->mcc_duration; -+ role = mccadapriv->role; -+ -+ incurch = _FALSE; -+ dis_sw_retry = _TRUE; -+ -+ /* STA/GC TX NULL data to inform AP/GC for ps mode */ -+ switch (role) { -+ case MCC_ROLE_GO: -+ case MCC_ROLE_AP: -+ distxnull = MCC_DISABLE_TX_NULL; -+ break; -+ case MCC_ROLE_GC: -+ set_channel_bwmode(iface, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); -+ distxnull = MCC_ENABLE_TX_NULL; -+ break; -+ case MCC_ROLE_STA: -+ distxnull = MCC_ENABLE_TX_NULL; -+ break; -+ } -+ -+ null_early_time = mccadapriv->null_early; -+ -+ c2hrpt = MCC_C2H_REPORT_ALL_STATUS; -+ tsfx = rtw_hal_get_port(iface); -+ update_parm = 0; -+ -+ SET_H2CCMD_MCC_CTRL_V2_ORDER(cmd, order); -+ SET_H2CCMD_MCC_CTRL_V2_TOTALNUM(cmd, totalnum); -+ SET_H2CCMD_MCC_CTRL_V2_CENTRAL_CH(cmd, center_ch); -+ SET_H2CCMD_MCC_CTRL_V2_PRIMARY_CH(cmd, pri_ch_idx); -+ SET_H2CCMD_MCC_CTRL_V2_BW(cmd, bw); -+ SET_H2CCMD_MCC_CTRL_V2_DURATION(cmd, duration); -+ SET_H2CCMD_MCC_CTRL_V2_ROLE(cmd, role); -+ SET_H2CCMD_MCC_CTRL_V2_INCURCH(cmd, incurch); -+ SET_H2CCMD_MCC_CTRL_V2_DIS_SW_RETRY(cmd, dis_sw_retry); -+ SET_H2CCMD_MCC_CTRL_V2_DISTXNULL(cmd, distxnull); -+ SET_H2CCMD_MCC_CTRL_V2_C2HRPT(cmd, c2hrpt); -+ SET_H2CCMD_MCC_CTRL_V2_TSFX(cmd, tsfx); -+ SET_H2CCMD_MCC_CTRL_V2_NULL_EARLY(cmd, null_early_time); -+ SET_H2CCMD_MCC_CTRL_V2_UPDATE_PARM(cmd, update_parm); -+ -+#ifdef CONFIG_MCC_MODE_DEBUG -+ RTW_INFO("=========================\n"); -+ RTW_INFO(FUNC_ADPT_FMT" MCC INFO:\n", FUNC_ADPT_ARG(iface)); -+ RTW_INFO("cmd[0]:0x%02x\n", cmd[0]); -+ RTW_INFO("cmd[1]:0x%02x\n", cmd[1]); -+ RTW_INFO("cmd[2]:0x%02x\n", cmd[2]); -+ RTW_INFO("cmd[3]:0x%02x\n", cmd[3]); -+ RTW_INFO("cmd[4]:0x%02x\n", cmd[4]); -+ RTW_INFO("cmd[5]:0x%02x\n", cmd[5]); -+ RTW_INFO("cmd[6]:0x%02x\n", cmd[6]); -+ RTW_INFO("=========================\n"); -+#endif /* CONFIG_MCC_MODE_DEBUG */ -+ -+ rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_CTRL_V2, H2C_MCC_CTRL_LEN, cmd); -+ } -+} -+ -+#else -+static void rtw_hal_set_mcc_ctrl_cmd_v1(PADAPTER padapter, u8 stop) -+{ -+ u8 cmd[H2C_MCC_CTRL_LEN] = {0}, i = 0; -+ u8 order = 0, totalnum = 0, chidx = 0, bw = 0, bw40sc = 0, bw80sc = 0; -+ u8 duration = 0, role = 0, incurch = 0, rfetype = 0, distxnull = 0, c2hrpt = 0, chscan = 0; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ struct mlme_ext_priv *pmlmeext = NULL; -+ struct mlme_ext_info *pmlmeinfo = NULL; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ _adapter *iface = NULL; -+ -+ RTW_INFO(FUNC_ADPT_FMT": stop=%d\n", FUNC_ADPT_ARG(padapter), stop); -+ -+ for (i = 0; i < MAX_MCC_NUM; i++) { -+ iface = pmccobjpriv->iface[i]; -+ if (iface == NULL) -+ continue; -+ -+ if (stop) { -+ if (iface != padapter) -+ continue; -+ } -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ order = mccadapriv->order; -+ -+ if (!stop) -+ totalnum = MAX_MCC_NUM; -+ else -+ totalnum = 0xff; /* 0xff means stop */ -+ -+ pmlmeext = &iface->mlmeextpriv; -+ chidx = pmlmeext->cur_channel; -+ bw = pmlmeext->cur_bwmode; -+ bw40sc = pmlmeext->cur_ch_offset; -+ -+ /* decide 80 band width offset */ -+ if (bw == CHANNEL_WIDTH_80) { -+ u8 center_ch = rtw_get_center_ch(chidx, bw, bw40sc); -+ -+ if (center_ch > chidx) -+ bw80sc = HAL_PRIME_CHNL_OFFSET_LOWER; -+ else if (center_ch < chidx) -+ bw80sc = HAL_PRIME_CHNL_OFFSET_UPPER; -+ else -+ bw80sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ } else -+ bw80sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ -+ duration = mccadapriv->mcc_duration; -+ role = mccadapriv->role; -+ -+ incurch = _FALSE; -+ -+ if (IS_HARDWARE_TYPE_8812(padapter)) -+ rfetype = pHalData->rfe_type; /* RFETYPE (only for 8812)*/ -+ else -+ rfetype = 0; -+ -+ /* STA/GC TX NULL data to inform AP/GC for ps mode */ -+ switch (role) { -+ case MCC_ROLE_GO: -+ case MCC_ROLE_AP: -+ distxnull = MCC_DISABLE_TX_NULL; -+ break; -+ case MCC_ROLE_GC: -+ case MCC_ROLE_STA: -+ distxnull = MCC_ENABLE_TX_NULL; -+ break; -+ } -+ -+ c2hrpt = MCC_C2H_REPORT_ALL_STATUS; -+ chscan = MCC_CHIDX; -+ -+ SET_H2CCMD_MCC_CTRL_ORDER(cmd, order); -+ SET_H2CCMD_MCC_CTRL_TOTALNUM(cmd, totalnum); -+ SET_H2CCMD_MCC_CTRL_CHIDX(cmd, chidx); -+ SET_H2CCMD_MCC_CTRL_BW(cmd, bw); -+ SET_H2CCMD_MCC_CTRL_BW40SC(cmd, bw40sc); -+ SET_H2CCMD_MCC_CTRL_BW80SC(cmd, bw80sc); -+ SET_H2CCMD_MCC_CTRL_DURATION(cmd, duration); -+ SET_H2CCMD_MCC_CTRL_ROLE(cmd, role); -+ SET_H2CCMD_MCC_CTRL_INCURCH(cmd, incurch); -+ SET_H2CCMD_MCC_CTRL_RFETYPE(cmd, rfetype); -+ SET_H2CCMD_MCC_CTRL_DISTXNULL(cmd, distxnull); -+ SET_H2CCMD_MCC_CTRL_C2HRPT(cmd, c2hrpt); -+ SET_H2CCMD_MCC_CTRL_CHSCAN(cmd, chscan); -+ -+#ifdef CONFIG_MCC_MODE_DEBUG -+ RTW_INFO("=========================\n"); -+ RTW_INFO(FUNC_ADPT_FMT" MCC INFO:\n", FUNC_ADPT_ARG(iface)); -+ RTW_INFO("cmd[0]:0x%02x\n", cmd[0]); -+ RTW_INFO("cmd[1]:0x%02x\n", cmd[1]); -+ RTW_INFO("cmd[2]:0x%02x\n", cmd[2]); -+ RTW_INFO("cmd[3]:0x%02x\n", cmd[3]); -+ RTW_INFO("cmd[4]:0x%02x\n", cmd[4]); -+ RTW_INFO("cmd[5]:0x%02x\n", cmd[5]); -+ RTW_INFO("cmd[6]:0x%02x\n", cmd[6]); -+ RTW_INFO("=========================\n"); -+#endif /* CONFIG_MCC_MODE_DEBUG */ -+ -+ rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_CTRL, H2C_MCC_CTRL_LEN, cmd); -+ } -+} -+#endif -+ -+static void rtw_hal_set_mcc_ctrl_cmd(PADAPTER padapter, u8 stop) -+{ -+ #ifdef CONFIG_MCC_MODE_V2 -+ /* new cmd 0x17 */ -+ rtw_hal_set_mcc_ctrl_cmd_v2(padapter, stop); -+ #else -+ /* old cmd 0x18 */ -+ rtw_hal_set_mcc_ctrl_cmd_v1(padapter, stop); -+ #endif -+} -+ -+static u8 check_mcc_support(PADAPTER adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 sta_linked_num = DEV_STA_LD_NUM(dvobj); -+ u8 starting_ap_num = DEV_AP_STARTING_NUM(dvobj); -+ u8 ap_num = DEV_AP_NUM(dvobj); -+ u8 ret = _FAIL; -+ -+ RTW_INFO("[MCC] sta_linked_num=%d, starting_ap_num=%d,ap_num=%d\n", -+ sta_linked_num, starting_ap_num, ap_num); -+ -+ /* case for sta + sta case */ -+ if (sta_linked_num == MAX_MCC_NUM) { -+ ret = _SUCCESS; -+ goto exit; -+ } -+ -+ /* case for starting AP + linked sta */ -+ if ((starting_ap_num + sta_linked_num) == MAX_MCC_NUM) { -+ ret = _SUCCESS; -+ goto exit; -+ } -+ -+ /* case for started AP + linked sta */ -+ if ((ap_num + sta_linked_num) == MAX_MCC_NUM) { -+ ret = _SUCCESS; -+ goto exit; -+ } -+ -+exit: -+ return ret; -+} -+ -+static void rtw_hal_mcc_start_prehdl(PADAPTER padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ _adapter *iface = NULL; -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ u8 i = 1; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ mccadapriv->role = MCC_ROLE_MAX; -+ } -+ -+#ifdef CONFIG_RTL8822C -+ if (IS_HARDWARE_TYPE_8822C(padapter)) { -+ HAL_DATA_TYPE *hal = GET_HAL_DATA(padapter); -+ struct dm_struct *dm = &hal->odmpriv; -+ -+ odm_cmn_info_update(dm, ODM_CMNINFO_IS_DOWNLOAD_FW, hal->bFWReady); -+ } -+#endif -+} -+ -+static u8 rtw_hal_set_mcc_start_setting(PADAPTER padapter, u8 status) -+{ -+ u8 ret = _SUCCESS, enable_tsf_auto_sync = _FALSE; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ -+ if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) { -+ rtw_warn_on(1); -+ RTW_INFO("PS mode is not active before start mcc, force exit ps mode\n"); -+ LeaveAllPowerSaveModeDirect(padapter); -+ } -+ -+ if (check_mcc_support(padapter) == _FAIL) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ rtw_hal_mcc_start_prehdl(padapter); -+ -+ /* configure mcc switch channel setting */ -+ rtw_hal_config_mcc_switch_channel_setting(padapter); -+ -+ if (rtw_hal_decide_mcc_role(padapter) == _FAIL) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ /* set mcc status to indicate process mcc start setting */ -+ rtw_hal_set_mcc_status(padapter, MCC_STATUS_PROCESS_MCC_START_SETTING); -+ -+ /* only download rsvd page for connect */ -+ if (status == MCC_SETCMD_STATUS_START_CONNECT) { -+ /* download mcc rsvd page */ -+ rtw_hal_set_fw_mcc_rsvd_page(padapter); -+ rtw_hal_set_mcc_rsvdpage_cmd(padapter); -+ } -+ -+ /* configure time setting */ -+ rtw_hal_set_mcc_time_setting_cmd(padapter); -+ -+#ifndef CONFIG_MCC_MODE_V2 -+ /* IQK value offload */ -+ rtw_hal_set_mcc_IQK_offload_cmd(padapter); -+#endif -+ -+ /* set mac id to fw */ -+ rtw_hal_set_mcc_macid_cmd(padapter); -+#ifdef CONFIG_HW_P0_TSF_SYNC -+ if (dvobj->p0_tsf.sync_port != MAX_HW_PORT ) { -+ /* disable tsf auto sync */ -+ RTW_INFO("[MCC] disable HW TSF sync\n"); -+ rtw_hal_set_hwreg(padapter, HW_VAR_TSF_AUTO_SYNC, &enable_tsf_auto_sync); -+ } else { -+ RTW_INFO("[MCC] already disable HW TSF sync\n"); -+ } -+#endif -+ /* set mcc parameter */ -+ rtw_hal_set_mcc_ctrl_cmd(padapter, _FALSE); -+ -+exit: -+ return ret; -+} -+ -+static void rtw_hal_set_mcc_stop_setting(PADAPTER padapter, u8 status) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &dvobj->mcc_objpriv; -+ _adapter *iface = NULL; -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ u8 i = 0; -+ /* -+ * when adapter disconnect, stop mcc mod -+ * total=0xf means stop mcc mode -+ */ -+ -+ switch (status) { -+ default: -+ /* let fw switch to other interface channel */ -+ for (i = 0; i < MAX_MCC_NUM; i++) { -+ iface = mccobjpriv->iface[i]; -+ if (iface == NULL) -+ continue; -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ -+ /* use other interface to set cmd */ -+ if (iface != padapter) { -+ rtw_hal_set_mcc_ctrl_cmd(iface, _TRUE); -+ break; -+ } -+ } -+ break; -+ } -+} -+ -+static void rtw_hal_mcc_status_hdl(PADAPTER padapter, u8 status) -+{ -+ switch (status) { -+ case MCC_SETCMD_STATUS_STOP_DISCONNECT: -+ rtw_hal_clear_mcc_status(padapter, MCC_STATUS_NEED_MCC | MCC_STATUS_DOING_MCC); -+ break; -+ case MCC_SETCMD_STATUS_STOP_SCAN_START: -+ rtw_hal_set_mcc_status(padapter, MCC_STATUS_NEED_MCC); -+ rtw_hal_clear_mcc_status(padapter, MCC_STATUS_DOING_MCC); -+ break; -+ -+ case MCC_SETCMD_STATUS_START_CONNECT: -+ case MCC_SETCMD_STATUS_START_SCAN_DONE: -+ rtw_hal_set_mcc_status(padapter, MCC_STATUS_NEED_MCC | MCC_STATUS_DOING_MCC); -+ break; -+ default: -+ RTW_INFO(FUNC_ADPT_FMT" error status(%d)\n", FUNC_ADPT_ARG(padapter), status); -+ break; -+ } -+} -+ -+static void rtw_hal_mcc_stop_posthdl(PADAPTER padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ _adapter *iface = NULL; -+ PHAL_DATA_TYPE hal; -+ u8 i = 0; -+ u8 enable_rx_bar = _FALSE; -+ -+ hal = GET_HAL_DATA(padapter); -+ -+ for (i = 0; i < MAX_MCC_NUM; i++) { -+ iface = mccobjpriv->iface[i]; -+ if (iface == NULL) -+ continue; -+ -+ /* release network queue */ -+ rtw_netif_wake_queue(iface->pnetdev); -+ mccadapriv = &iface->mcc_adapterpriv; -+ mccadapriv->mcc_tx_bytes_from_kernel = 0; -+ mccadapriv->mcc_last_tx_bytes_from_kernel = 0; -+ mccadapriv->mcc_tx_bytes_to_port = 0; -+ -+ if (mccadapriv->role == MCC_ROLE_GO) -+ rtw_hal_mcc_remove_go_p2p_ie(iface); -+ -+#ifdef CONFIG_TDLS -+ if (MLME_IS_STA(iface)) { -+ if (mccadapriv->backup_tdls_en) { -+ rtw_enable_tdls_func(iface); -+ RTW_INFO("%s: Disable MCC, Enable TDLS\n", __func__); -+ mccadapriv->backup_tdls_en = _FALSE; -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ -+ mccadapriv->role = MCC_ROLE_MAX; -+ mccobjpriv->iface[i] = NULL; -+ } -+ -+ /* force switch channel */ -+ hal->current_channel = 0; -+ hal->current_channel_bw = CHANNEL_WIDTH_MAX; -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_STOP, NULL); -+ #endif -+ -+#ifdef CONFIG_RTL8822C -+ if (IS_HARDWARE_TYPE_8822C(padapter)) { -+ HAL_DATA_TYPE *hal = GET_HAL_DATA(padapter); -+ struct dm_struct *dm = &hal->odmpriv; -+ -+ odm_cmn_info_update(dm, ODM_CMNINFO_IS_DOWNLOAD_FW, _FALSE); -+ } -+#endif -+} -+ -+static void rtw_hal_mcc_start_posthdl(PADAPTER padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ _adapter *iface = NULL; -+ u8 i = 0, order = 0; -+ u8 enable_rx_bar = _TRUE; -+ -+ for (i = 0; i < MAX_MCC_NUM; i++) { -+ iface = mccobjpriv->iface[i]; -+ if (iface == NULL) -+ continue; -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ if (mccadapriv->role == MCC_ROLE_MAX) -+ continue; -+ -+ mccadapriv->mcc_tx_bytes_from_kernel = 0; -+ mccadapriv->mcc_last_tx_bytes_from_kernel = 0; -+ mccadapriv->mcc_tx_bytes_to_port = 0; -+ -+#ifdef CONFIG_TDLS -+ if (MLME_IS_STA(iface)) { -+ if (rtw_is_tdls_enabled(iface)) { -+ mccadapriv->backup_tdls_en = _TRUE; -+ rtw_disable_tdls_func(iface, _TRUE); -+ RTW_INFO("%s: Enable MCC, Disable TDLS\n", __func__); -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ } -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_START, NULL); -+ #endif -+} -+ -+/* -+ * rtw_hal_set_mcc_setting - set mcc setting -+ * @padapter: currnet padapter to stop/start MCC -+ * @stop: stop mcc or not -+ * @return val: 1 for SUCCESS, 0 for fail -+ */ -+static u8 rtw_hal_set_mcc_setting(PADAPTER padapter, u8 status) -+{ -+ u8 ret = _FAIL; -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ u8 stop = (status < MCC_SETCMD_STATUS_START_CONNECT) ? _TRUE : _FALSE; -+ systime start_time = rtw_get_current_time(); -+ -+ RTW_INFO("===> "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ rtw_sctx_init(&pmccobjpriv->mcc_sctx, MCC_EXPIRE_TIME); -+ pmccobjpriv->mcc_c2h_status = MCC_RPT_MAX; -+ -+ if (stop == _FALSE) { -+ /* handle mcc start */ -+ if (rtw_hal_set_mcc_start_setting(padapter, status) == _FAIL) -+ goto exit; -+ -+ /* wait for C2H */ -+ if (!rtw_sctx_wait(&pmccobjpriv->mcc_sctx, __func__)) -+ RTW_INFO(FUNC_ADPT_FMT": wait for mcc start C2H time out\n", FUNC_ADPT_ARG(padapter)); -+ else -+ ret = _SUCCESS; -+ -+ if (ret == _SUCCESS) { -+ RTW_INFO(FUNC_ADPT_FMT": mcc start sucecssfully\n", FUNC_ADPT_ARG(padapter)); -+ rtw_hal_mcc_status_hdl(padapter, status); -+ rtw_hal_mcc_start_posthdl(padapter); -+ } -+ } else { -+ -+ /* set mcc status to indicate process mcc start setting */ -+ rtw_hal_set_mcc_status(padapter, MCC_STATUS_PROCESS_MCC_STOP_SETTING); -+ -+ /* handle mcc stop */ -+ rtw_hal_set_mcc_stop_setting(padapter, status); -+ -+ /* wait for C2H */ -+ if (!rtw_sctx_wait(&pmccobjpriv->mcc_sctx, __func__)) -+ RTW_INFO(FUNC_ADPT_FMT": wait for mcc stop C2H time out\n", FUNC_ADPT_ARG(padapter)); -+ else { -+ ret = _SUCCESS; -+ rtw_hal_mcc_status_hdl(padapter, status); -+ rtw_hal_mcc_stop_posthdl(padapter); -+ } -+ } -+ -+exit: -+ /* clear mcc status */ -+ rtw_hal_clear_mcc_status(padapter -+ , MCC_STATUS_PROCESS_MCC_START_SETTING | MCC_STATUS_PROCESS_MCC_STOP_SETTING); -+ -+ RTW_INFO(FUNC_ADPT_FMT" in %dms <===\n" -+ , FUNC_ADPT_ARG(padapter), rtw_get_passing_time_ms(start_time)); -+ return ret; -+} -+ -+/** -+ * rtw_hal_mcc_check_case_not_limit_traffic - handler flow ctrl for special case -+ * @cur_iface: fw stay channel setting of this iface -+ * @next_iface: fw will swich channel setting of this iface -+ */ -+static void rtw_hal_mcc_check_case_not_limit_traffic(PADAPTER cur_iface, PADAPTER next_iface) -+{ -+ u8 cur_bw = cur_iface->mlmeextpriv.cur_bwmode; -+ u8 next_bw = next_iface->mlmeextpriv.cur_bwmode; -+ -+ /* for both interface are VHT80, doesn't limit_traffic according to iperf results */ -+ if (cur_bw == CHANNEL_WIDTH_80 && next_bw == CHANNEL_WIDTH_80) { -+ cur_iface->mcc_adapterpriv.mcc_tp_limit = _FALSE; -+ next_iface->mcc_adapterpriv.mcc_tp_limit = _FALSE; -+ } -+} -+ -+ -+/** -+ * rtw_hal_mcc_sw_ch_fw_notify_hdl - handler flow ctrl -+ */ -+static void rtw_hal_mcc_sw_ch_fw_notify_hdl(PADAPTER padapter) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv); -+ struct mcc_adapter_priv *cur_mccadapriv = NULL, *next_mccadapriv = NULL; -+ _adapter *iface = NULL, *cur_iface = NULL, *next_iface = NULL; -+ struct registry_priv *preg = &padapter->registrypriv; -+ u8 cur_op_ch = pdvobjpriv->oper_channel; -+ u8 i = 0, iface_num = pdvobjpriv->iface_nums, cur_order = 0, next_order = 0; -+ static u8 cnt = 1; -+ u32 single_tx_cri = preg->rtw_mcc_single_tx_cri; -+ -+ for (i = 0; i < iface_num; i++) { -+ iface = pdvobjpriv->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ if (cur_op_ch == iface->mlmeextpriv.cur_channel) { -+ cur_iface = iface; -+ cur_mccadapriv = &cur_iface->mcc_adapterpriv; -+ cur_order = cur_mccadapriv->order; -+ next_order = (cur_order + 1) % iface_num; -+ next_iface = pmccobjpriv->iface[next_order]; -+ next_mccadapriv = &next_iface->mcc_adapterpriv; -+ break; -+ } -+ } -+ -+ if (cur_iface == NULL || next_iface == NULL) { -+ RTW_ERR("cur_iface=%p,next_iface=%p\n", cur_iface, next_iface); -+ rtw_warn_on(1); -+ return; -+ } -+ -+ /* check other interface tx busy traffic or not under every 2 switch channel notify(Mbits/100ms) */ -+ if (cnt == 2) { -+ cur_mccadapriv->mcc_tp = (cur_mccadapriv->mcc_tx_bytes_from_kernel -+ - cur_mccadapriv->mcc_last_tx_bytes_from_kernel) * 10 * 8 / 1024 / 1024; -+ cur_mccadapriv->mcc_last_tx_bytes_from_kernel = cur_mccadapriv->mcc_tx_bytes_from_kernel; -+ -+ next_mccadapriv->mcc_tp = (next_mccadapriv->mcc_tx_bytes_from_kernel -+ - next_mccadapriv->mcc_last_tx_bytes_from_kernel) * 10 * 8 / 1024 / 1024; -+ next_mccadapriv->mcc_last_tx_bytes_from_kernel = next_mccadapriv->mcc_tx_bytes_from_kernel; -+ -+ cnt = 1; -+ } else -+ cnt = 2; -+ -+ /* check single TX or cuncurrnet TX */ -+ if (next_mccadapriv->mcc_tp < single_tx_cri) { -+ /* single TX, does not stop */ -+ cur_mccadapriv->mcc_tx_stop = _FALSE; -+ cur_mccadapriv->mcc_tp_limit = _FALSE; -+ } else { -+ /* concurrent TX, stop */ -+ cur_mccadapriv->mcc_tx_stop = _TRUE; -+ cur_mccadapriv->mcc_tp_limit = _TRUE; -+ } -+ -+ if (cur_mccadapriv->mcc_tp < single_tx_cri) { -+ next_mccadapriv->mcc_tx_stop = _FALSE; -+ next_mccadapriv->mcc_tp_limit = _FALSE; -+ } else { -+ next_mccadapriv->mcc_tx_stop = _FALSE; -+ next_mccadapriv->mcc_tp_limit = _TRUE; -+ next_mccadapriv->mcc_tx_bytes_to_port = 0; -+ } -+ -+ /* stop current iface kernel queue or not */ -+ if (cur_mccadapriv->mcc_tx_stop) -+ rtw_netif_stop_queue(cur_iface->pnetdev); -+ else -+ rtw_netif_wake_queue(cur_iface->pnetdev); -+ -+ /* stop next iface kernel queue or not */ -+ if (next_mccadapriv->mcc_tx_stop) -+ rtw_netif_stop_queue(next_iface->pnetdev); -+ else -+ rtw_netif_wake_queue(next_iface->pnetdev); -+ -+ /* start xmit tasklet */ -+ rtw_os_xmit_schedule(next_iface); -+ -+ rtw_hal_mcc_check_case_not_limit_traffic(cur_iface, next_iface); -+ -+ if (0) { -+ RTW_INFO("order:%d, mcc_tx_stop:%d, mcc_tp:%d\n", -+ cur_mccadapriv->order, cur_mccadapriv->mcc_tx_stop, cur_mccadapriv->mcc_tp); -+ dump_os_queue(0, cur_iface); -+ RTW_INFO("order:%d, mcc_tx_stop:%d, mcc_tp:%d\n", -+ next_mccadapriv->order, next_mccadapriv->mcc_tx_stop, next_mccadapriv->mcc_tp); -+ dump_os_queue(0, next_iface); -+ } -+} -+ -+static void rtw_hal_mcc_update_noa_start_time_hdl(PADAPTER padapter, u8 buflen, u8 *tmpBuf) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv); -+ struct mcc_adapter_priv *pmccadapriv = NULL; -+ PADAPTER iface = NULL; -+ u8 i = 0; -+ u8 policy_idx = pmccobjpriv->policy_index; -+ u8 noa_tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX]; -+ u8 noa_start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX]; -+ -+ for (i = 0; i < pdvobjpriv->iface_nums; i++) { -+ iface = pdvobjpriv->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ pmccadapriv = &iface->mcc_adapterpriv; -+ if (pmccadapriv->role == MCC_ROLE_MAX) -+ continue; -+ -+ /* GO & channel match */ -+ if (pmccadapriv->role == MCC_ROLE_GO) { -+ /* convert GO TBTT from FW to noa_start_time(TU convert to mircosecond) */ -+ pmccadapriv->noa_start_time = RTW_GET_LE32(tmpBuf + 2) + noa_start_time_offset * TU; -+ -+ if (0) { -+ RTW_INFO("TBTT:0x%02x\n", RTW_GET_LE32(tmpBuf + 2)); -+ RTW_INFO("noa_tsf_sync_offset:%d, noa_start_time_offset:%d\n", noa_tsf_sync_offset, noa_start_time_offset); -+ RTW_INFO(FUNC_ADPT_FMT"buf=0x%02x:0x%02x:0x%02x:0x%02x, noa_start_time=0x%02x\n" -+ , FUNC_ADPT_ARG(iface) -+ , tmpBuf[2] -+ , tmpBuf[3] -+ , tmpBuf[4] -+ , tmpBuf[5] -+ ,pmccadapriv->noa_start_time); -+ } -+ -+ rtw_hal_mcc_update_go_p2p_ie(iface); -+ -+ break; -+ } -+ } -+ -+} -+ -+static u8 mcc_get_reg_hdl(PADAPTER adapter, const u8 *val) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ _adapter *cur_iface = NULL; -+ u8 ret = _SUCCESS; -+ u8 cur_order = 0; -+ #ifdef CONFIG_RTL8822C -+ u16 dbg_reg[DBG_MCC_REG_NUM] = {0x4d4,0x522,0x1d70}; -+ #else -+ u16 dbg_reg[DBG_MCC_REG_NUM] = {0x4d4,0x522,0xc50,0xe50}; -+ #endif -+ u16 dbg_rf_reg[DBG_MCC_RF_REG_NUM] = {0x18}; -+ u8 i; -+ u32 reg_val; -+ u8 path = 0, path_nums = 0; -+ -+ if (!rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ if (!val) -+ cur_order = 0xff; -+ else -+ cur_order = *val; -+ -+ if (cur_order >= MAX_MCC_NUM && cur_order != 0xff) { -+ RTW_ERR("%s: cur_order=%d\n", __func__, cur_order); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ path_nums = hal_spec->rf_reg_path_num; -+ if (cur_order == 0xff) -+ cur_iface = adapter; -+ else -+ cur_iface = mccobjpriv->iface[cur_order]; -+ -+ if (!cur_iface) { -+ RTW_ERR("%s: cur_iface = NULL, cur_order=%d\n", __func__, cur_order); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ _enter_critical_mutex(&mccobjpriv->mcc_dbg_reg_mutex, NULL); -+ if (!RTW_CANNOT_IO(adapter)) { -+ /* RTW_INFO("=================================\n"); -+ RTW_INFO(ADPT_FMT": cur_order:%d\n", ADPT_ARG(cur_iface), cur_order); */ -+ -+ for (i = 0; i < ARRAY_SIZE(dbg_reg); i++) { -+ reg_val = rtw_read32(adapter, dbg_reg[i]); -+ mccobjpriv->dbg_reg[i] = dbg_reg[i]; -+ mccobjpriv->dbg_reg_val[i] = reg_val; -+ /* RTW_PRINT("REG_%X:0x%08x\n", dbg_reg[i], reg_val); */ -+ } -+ for (i = 0; i < ARRAY_SIZE(dbg_rf_reg); i++) { -+ for (path = 0; path < path_nums; path++) { -+ reg_val = rtw_hal_read_rfreg(adapter, path, dbg_rf_reg[i], 0xffffffff); -+ /* RTW_PRINT("RF_PATH_%d_REG_%X:0x%08x\n", -+ path, dbg_rf_reg[i], reg_val); */ -+ mccobjpriv->dbg_rf_reg[i] = dbg_rf_reg[i]; -+ mccobjpriv->dbg_rf_reg_val[i][path] = reg_val; -+ } -+ } -+ } -+ _exit_critical_mutex(&mccobjpriv->mcc_dbg_reg_mutex, NULL); -+ -+exit: -+ return ret; -+} -+ -+static u8 mcc_get_reg_cmd(_adapter *adapter, u8 cur_order) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ u8 *mcc_cur_order = NULL; -+ u8 res = _SUCCESS; -+ -+ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ mcc_cur_order = rtw_zmalloc(sizeof(u8)); -+ if (mcc_cur_order == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = MCC_CMD_WK_CID; -+ pdrvextra_cmd_parm->type = MCC_GET_DBG_REG_WK_CID; -+ pdrvextra_cmd_parm->size = 1; -+ pdrvextra_cmd_parm->pbuf = mcc_cur_order; -+ -+ _rtw_memcpy(mcc_cur_order, &cur_order, 1); -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+exit: -+ return res; -+} -+ -+static void rtw_hal_mcc_rpt_tsf_hdl(PADAPTER padapter, u8 buflen, u8 *tmpBuf) -+{ -+ struct dvobj_priv *dvobjpriv = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ struct submit_ctx *mcc_tsf_req_sctx = &mccobjpriv->mcc_tsf_req_sctx; -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ _adapter *iface = NULL; -+ u8 order = 0; -+ -+ order = mccobjpriv->mcc_tsf_req_sctx_order; -+ iface = mccobjpriv->iface[order]; -+ mccadapriv = &iface->mcc_adapterpriv; -+ mccadapriv->tsf = RTW_GET_LE64(tmpBuf + 2); -+ -+ -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" TSF(order:%d):0x%02llx\n", FUNC_ADPT_ARG(iface), mccadapriv->order, mccadapriv->tsf); -+ -+ if (mccadapriv->order == (MAX_MCC_NUM - 1)) -+ rtw_sctx_done(&mcc_tsf_req_sctx); -+ else -+ mccobjpriv->mcc_tsf_req_sctx_order ++; -+ -+} -+ -+/** -+ * rtw_hal_mcc_c2h_handler - mcc c2h handler -+ */ -+void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ struct submit_ctx *mcc_sctx = &pmccobjpriv->mcc_sctx; -+ _adapter *cur_adapter = NULL; -+ u8 cur_ch = 0, cur_bw = 0, cur_ch_offset = 0; -+ _irqL irqL; -+ -+ /* RTW_INFO("[length]=%d, [C2H data]="MAC_FMT"\n", buflen, MAC_ARG(tmpBuf)); */ -+ /* To avoid reg is set, but driver recive c2h to set wrong oper_channel */ -+ if (MCC_RPT_STOPMCC == pmccobjpriv->mcc_c2h_status) { -+ RTW_INFO(FUNC_ADPT_FMT" MCC alread stops return\n", FUNC_ADPT_ARG(padapter)); -+ return; -+ } -+ -+ _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ pmccobjpriv->mcc_c2h_status = tmpBuf[0]; -+ pmccobjpriv->current_order = tmpBuf[1]; -+ cur_adapter = pmccobjpriv->iface[pmccobjpriv->current_order]; -+ cur_ch = cur_adapter->mlmeextpriv.cur_channel; -+ cur_bw = cur_adapter->mlmeextpriv.cur_bwmode; -+ cur_ch_offset = cur_adapter->mlmeextpriv.cur_ch_offset; -+ rtw_set_oper_ch(cur_adapter, cur_ch); -+ rtw_set_oper_bw(cur_adapter, cur_bw); -+ rtw_set_oper_choffset(cur_adapter, cur_ch_offset); -+ _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ -+ if (0) -+ RTW_INFO("%d,order:%d,TSF:0x%llx\n", tmpBuf[0], tmpBuf[1], RTW_GET_LE64(tmpBuf + 2)); -+ -+ switch (pmccobjpriv->mcc_c2h_status) { -+ case MCC_RPT_SUCCESS: -+ _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ pmccobjpriv->cur_mcc_success_cnt++; -+ rtw_hal_mcc_upadate_chnl_bw(cur_adapter, cur_ch, cur_ch_offset, cur_bw, _FALSE); -+ mcc_get_reg_cmd(padapter, pmccobjpriv->current_order); -+ _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ break; -+ case MCC_RPT_TXNULL_FAIL: -+ RTW_INFO("[MCC] TXNULL FAIL\n"); -+ break; -+ case MCC_RPT_STOPMCC: -+ RTW_INFO("[MCC] MCC stop\n"); -+ pmccobjpriv->mcc_c2h_status = MCC_RPT_STOPMCC; -+ rtw_hal_mcc_upadate_chnl_bw(cur_adapter, cur_ch, cur_ch_offset, cur_bw, _TRUE); -+ rtw_sctx_done(&mcc_sctx); -+ break; -+ case MCC_RPT_READY: -+ _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ /* initialize counter & time */ -+ pmccobjpriv->mcc_launch_time = rtw_get_current_time(); -+ pmccobjpriv->mcc_c2h_status = MCC_RPT_READY; -+ pmccobjpriv->cur_mcc_success_cnt = 0; -+ pmccobjpriv->prev_mcc_success_cnt = 0; -+ pmccobjpriv->mcc_tolerance_time = MCC_TOLERANCE_TIME; -+ _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ -+ RTW_INFO("[MCC] MCC ready\n"); -+ rtw_sctx_done(&mcc_sctx); -+ break; -+ case MCC_RPT_SWICH_CHANNEL_NOTIFY: -+ rtw_hal_mcc_sw_ch_fw_notify_hdl(padapter); -+ break; -+ case MCC_RPT_UPDATE_NOA_START_TIME: -+ rtw_hal_mcc_update_noa_start_time_hdl(padapter, buflen, tmpBuf); -+ break; -+ case MCC_RPT_TSF: -+ _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ rtw_hal_mcc_rpt_tsf_hdl(padapter, buflen, tmpBuf); -+ _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ break; -+ default: -+ /* RTW_INFO("[MCC] Other MCC status(%d)\n", pmccobjpriv->mcc_c2h_status); */ -+ break; -+ } -+} -+ -+void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ u8 cmd[H2C_MCC_TIME_SETTING_LEN] = {0}; -+ u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME; -+ u8 ap_num = DEV_AP_NUM(dvobj); -+ -+ if (ap_num == 0) { -+ u8 need_update = _FALSE; -+ u8 start_time_offset = 0, interval = 0, duration = 0; -+ -+ need_update = rtw_hal_mcc_update_timing_parameters(padapter, force_update); -+ -+ if (need_update == _FALSE) -+ return; -+ -+ start_time_offset = mccobjpriv->start_time; -+ interval = mccobjpriv->interval; -+ duration = mccobjpriv->iface[0]->mcc_adapterpriv.mcc_duration; -+ -+ SET_H2CCMD_MCC_TIME_SETTING_START_TIME(cmd, start_time_offset); -+ SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(cmd, interval); -+ SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(cmd, swchannel_early_time); -+ SET_H2CCMD_MCC_TIME_SETTING_UPDATE(cmd, _TRUE); -+ SET_H2CCMD_MCC_TIME_SETTING_ORDER0_DURATION(cmd, duration); -+ } else { -+ PADAPTER order0_iface = NULL; -+ PADAPTER order1_iface = NULL; -+ u8 policy_idx = mccobjpriv->policy_index; -+ u8 duration = mcc_switch_channel_policy_table[policy_idx][MCC_DURATION_IDX]; -+ u8 tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX]; -+ u8 start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX]; -+ u8 interval = mcc_switch_channel_policy_table[policy_idx][MCC_INTERVAL_IDX]; -+ u8 guard_offset0 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET0_IDX]; -+ u8 guard_offset1 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET1_IDX]; -+ u8 order0_duration = 0; -+ u8 i = 0; -+ enum _hw_port tsf_bsae_port = MAX_HW_PORT; -+ enum _hw_port tsf_sync_port = MAX_HW_PORT; -+ -+ RTW_INFO("%s: policy_idx=%d\n", __func__, policy_idx); -+ -+ order0_iface = mccobjpriv->iface[0]; -+ order1_iface = mccobjpriv->iface[1]; -+ -+ /* GO/AP is order 0, GC/STA is order 1 */ -+ order0_duration = order0_iface->mcc_adapterpriv.mcc_duration = interval - duration; -+ order0_iface->mcc_adapterpriv.mcc_duration = duration; -+ -+ tsf_bsae_port = rtw_hal_get_port(order1_iface); -+ tsf_sync_port = rtw_hal_get_port(order0_iface); -+ -+ /* update IE */ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ PADAPTER iface = NULL; -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ -+ iface = dvobj->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ if (mccadapriv->role == MCC_ROLE_MAX) -+ continue; -+ -+ if (mccadapriv->role == MCC_ROLE_GO) -+ rtw_hal_mcc_update_go_p2p_ie(iface); -+ } -+ -+ /* update H2C cmd */ -+ /* FW set enable */ -+ SET_H2CCMD_MCC_TIME_SETTING_FW_EN(cmd, _TRUE); -+ /* TSF Sync offset */ -+ SET_H2CCMD_MCC_TIME_SETTING_TSF_SYNC_OFFSET(cmd, tsf_sync_offset); -+ /* start time offset */ -+ SET_H2CCMD_MCC_TIME_SETTING_START_TIME(cmd, (start_time_offset + guard_offset0)); -+ /* interval */ -+ SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(cmd, interval); -+ /* Early time to inform driver by C2H before switch channel */ -+ SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(cmd, swchannel_early_time); -+ /* Port0 sync from Port1, not support multi-port */ -+ SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(cmd, tsf_bsae_port); -+ SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(cmd, tsf_sync_port); -+ SET_H2CCMD_MCC_TIME_SETTING_UPDATE(cmd, _TRUE); -+ SET_H2CCMD_MCC_TIME_SETTING_ORDER0_DURATION(cmd, order0_duration); -+ } -+ -+ rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_TIME_SETTING, H2C_MCC_TIME_SETTING_LEN, cmd); -+} -+ -+/** -+ * rtw_hal_mcc_sw_status_check - check mcc swich channel status -+ * @padapter: primary adapter -+ */ -+void rtw_hal_mcc_sw_status_check(PADAPTER padapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ _adapter *iface = NULL; -+ u8 cur_cnt = 0, prev_cnt = 0, diff_cnt = 0, check_ret = _FAIL, threshold = 0; -+ u8 policy_idx = pmccobjpriv->policy_index; -+ u8 noa_enable = _FALSE; -+ u8 i = 0; -+ _irqL irqL; -+ u8 ap_num = DEV_AP_NUM(dvobj); -+ -+/* #define MCC_RESTART 1 */ -+ -+ if (!MCC_EN(padapter)) -+ return; -+ -+ _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) { -+ -+ /* check noa enable or not */ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ if (mccadapriv->role == MCC_ROLE_MAX) -+ continue; -+ -+ if (iface->wdinfo.p2p_ps_mode == P2P_PS_NOA) { -+ noa_enable = _TRUE; -+ break; -+ } -+ } -+ -+ if (!noa_enable && ap_num == 0) -+ rtw_hal_mcc_update_parameter(padapter, _FALSE); -+ -+ threshold = pmccobjpriv->mcc_stop_threshold; -+ -+ if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) { -+ rtw_warn_on(1); -+ RTW_INFO("PS mode is not active under mcc, force exit ps mode\n"); -+ LeaveAllPowerSaveModeDirect(padapter); -+ } -+ -+ if (rtw_get_passing_time_ms(pmccobjpriv->mcc_launch_time) > 2000) { -+ _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ -+ cur_cnt = pmccobjpriv->cur_mcc_success_cnt; -+ prev_cnt = pmccobjpriv->prev_mcc_success_cnt; -+ if (cur_cnt < prev_cnt) -+ diff_cnt = (cur_cnt + 255) - prev_cnt; -+ else -+ diff_cnt = cur_cnt - prev_cnt; -+ -+ if (diff_cnt < threshold) { -+ pmccobjpriv->mcc_tolerance_time--; -+ RTW_INFO("%s: diff_cnt:%d, tolerance_time:%d\n", -+ __func__, diff_cnt, pmccobjpriv->mcc_tolerance_time); -+ } else -+ pmccobjpriv->mcc_tolerance_time = MCC_TOLERANCE_TIME; -+ -+ pmccobjpriv->prev_mcc_success_cnt = pmccobjpriv->cur_mcc_success_cnt; -+ -+ if (pmccobjpriv->mcc_tolerance_time != 0) -+ check_ret = _SUCCESS; -+ -+ _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ -+ if (check_ret != _SUCCESS) { -+ RTW_INFO("============ MCC swich channel check fail (%d)=============\n", diff_cnt); -+ /* restart MCC */ -+ #ifdef MCC_RESTART -+ rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_DISCONNECT); -+ rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT); -+ #endif /* MCC_RESTART */ -+ } -+ } else { -+ _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ pmccobjpriv->prev_mcc_success_cnt = pmccobjpriv->cur_mcc_success_cnt; -+ _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL); -+ } -+ -+ } -+ _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+} -+ -+/** -+ * rtw_hal_mcc_change_scan_flag - change scan flag under mcc -+ * -+ * MCC mode under sitesurvey goto AP channel to tx bcn & data -+ * MCC mode under sitesurvey doesn't support TX data for station mode (FW not support) -+ * -+ * @padapter: the adapter to be change scan flag -+ * @ch: pointer to rerurn ch -+ * @bw: pointer to rerurn bw -+ * @offset: pointer to rerurn offset -+ */ -+u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset) -+{ -+ u8 need_ch_setting_union = _TRUE, i = 0, flags = 0, back_op = _FALSE; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ struct mlme_ext_priv *mlmeext = NULL; -+ _adapter *iface = NULL; -+ -+ if (!MCC_EN(padapter)) -+ goto exit; -+ -+ if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) -+ goto exit; -+ -+ /* disable PS_ANNC & TX_RESUME for all interface */ -+ /* ToDo: TX_RESUME by interface in SCAN_BACKING_OP */ -+ mlmeext = &padapter->mlmeextpriv; -+ -+ flags = mlmeext_scan_backop_flags(mlmeext); -+ if (mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_PS_ANNC)) -+ flags &= ~SS_BACKOP_PS_ANNC; -+ -+ if (mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_TX_RESUME)) -+ flags &= ~SS_BACKOP_TX_RESUME; -+ -+ mlmeext_assign_scan_backop_flags(mlmeext, flags); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (!iface) -+ continue; -+ -+ mlmeext = &iface->mlmeextpriv; -+ -+ if (MLME_IS_GO(iface) || MLME_IS_AP(iface)) -+ back_op = _TRUE; -+ else if (MLME_IS_GC(iface) && (iface != padapter)) -+ /* switch to another linked interface(GO) to receive beacon to avoid no beacon disconnect */ -+ back_op = _TRUE; -+ else if (MLME_IS_STA(iface) && MLME_IS_ASOC(iface) && (iface != padapter)) -+ /* switch to another linked interface(STA) to receive beacon to avoid no beacon disconnect */ -+ back_op = _TRUE; -+ else { -+ /* bypass non-linked/non-linking interface/scan interface */ -+ continue; -+ } -+ -+ if (back_op) { -+ *ch = mlmeext->cur_channel; -+ *bw = mlmeext->cur_bwmode; -+ *offset = mlmeext->cur_ch_offset; -+ need_ch_setting_union = _FALSE; -+ } -+ } -+exit: -+ return need_ch_setting_union; -+} -+ -+/** -+ * rtw_hal_mcc_calc_tx_bytes_from_kernel - calculte tx bytes from kernel to check concurrent tx or not -+ * @padapter: the adapter to be record tx bytes -+ * @len: data len -+ */ -+inline void rtw_hal_mcc_calc_tx_bytes_from_kernel(PADAPTER padapter, u32 len) -+{ -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ -+ if (MCC_EN(padapter)) { -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) { -+ pmccadapriv->mcc_tx_bytes_from_kernel += len; -+ if (0) -+ RTW_INFO("%s(order:%d): mcc tx bytes from kernel:%lld\n" -+ , __func__, pmccadapriv->order, pmccadapriv->mcc_tx_bytes_from_kernel); -+ } -+ } -+} -+ -+/** -+ * rtw_hal_mcc_calc_tx_bytes_to_port - calculte tx bytes to write port in order to flow crtl -+ * @padapter: the adapter to be record tx bytes -+ * @len: data len -+ */ -+inline void rtw_hal_mcc_calc_tx_bytes_to_port(PADAPTER padapter, u32 len) -+{ -+ if (MCC_EN(padapter)) { -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) { -+ pmccadapriv->mcc_tx_bytes_to_port += len; -+ if (0) -+ RTW_INFO("%s(order:%d): mcc tx bytes to port:%d, mcc target tx bytes to port:%d\n" -+ , __func__, pmccadapriv->order, pmccadapriv->mcc_tx_bytes_to_port -+ , pmccadapriv->mcc_target_tx_bytes_to_port); -+ } -+ } -+} -+ -+/** -+ * rtw_hal_mcc_stop_tx_bytes_to_port - stop write port to hw or not -+ * @padapter: the adapter to be stopped -+ */ -+inline u8 rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter) -+{ -+ if (MCC_EN(padapter)) { -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) { -+ if (pmccadapriv->mcc_tp_limit) { -+ if (pmccadapriv->mcc_tx_bytes_to_port >= pmccadapriv->mcc_target_tx_bytes_to_port) { -+ pmccadapriv->mcc_tx_stop = _TRUE; -+ rtw_netif_stop_queue(padapter->pnetdev); -+ return _TRUE; -+ } -+ } -+ } -+ } -+ -+ return _FALSE; -+} -+ -+static void rtw_hal_mcc_assign_scan_flag(PADAPTER padapter, u8 scan_done) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ _adapter *iface = NULL; -+ struct mlme_ext_priv *pmlmeext = NULL; -+ u8 i = 0, flags; -+ -+ if (!MCC_EN(padapter)) -+ return; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ mccadapriv = &iface->mcc_adapterpriv; -+ if (mccadapriv->role == MCC_ROLE_MAX) -+ continue; -+ -+ pmlmeext = &iface->mlmeextpriv; -+ if (is_client_associated_to_ap(iface)) { -+ flags = mlmeext_scan_backop_flags_sta(pmlmeext); -+ if (scan_done) { -+ if (mlmeext_chk_scan_backop_flags_sta(pmlmeext, SS_BACKOP_EN)) { -+ flags &= ~SS_BACKOP_EN; -+ mlmeext_assign_scan_backop_flags_sta(pmlmeext, flags); -+ } -+ } else { -+ if (!mlmeext_chk_scan_backop_flags_sta(pmlmeext, SS_BACKOP_EN)) { -+ flags |= SS_BACKOP_EN; -+ mlmeext_assign_scan_backop_flags_sta(pmlmeext, flags); -+ } -+ } -+ -+ } -+ } -+} -+ -+/** -+ * rtw_hal_set_mcc_setting_scan_start - setting mcc under scan start -+ * @padapter: the adapter to be setted -+ * @ch_setting_changed: softap channel setting to be changed or not -+ */ -+u8 rtw_hal_set_mcc_setting_scan_start(PADAPTER padapter) -+{ -+ u8 ret = _FAIL; -+ -+ if (MCC_EN(padapter)) { -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ -+ _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) { -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) { -+ ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_SCAN_START); -+ rtw_hal_mcc_assign_scan_flag(padapter, 0); -+ } -+ } -+ _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ } -+ -+ return ret; -+} -+ -+/** -+ * rtw_hal_set_mcc_setting_scan_complete - setting mcc after scan commplete -+ * @padapter: the adapter to be setted -+ * @ch_setting_changed: softap channel setting to be changed or not -+ */ -+u8 rtw_hal_set_mcc_setting_scan_complete(PADAPTER padapter) -+{ -+ u8 ret = _FAIL; -+ -+ if (MCC_EN(padapter)) { -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ -+ _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) { -+ rtw_hal_mcc_assign_scan_flag(padapter, 1); -+ ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_SCAN_DONE); -+ } -+ _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ } -+ -+ return ret; -+} -+ -+ -+/** -+ * rtw_hal_set_mcc_setting_start_bss_network - setting mcc under softap start -+ * @padapter: the adapter to be setted -+ * @chbw_grouped: channel bw offset can not be allowed or not -+ */ -+u8 rtw_hal_set_mcc_setting_start_bss_network(PADAPTER padapter, u8 chbw_allow) -+{ -+ u8 ret = _FAIL; -+ -+ if (MCC_EN(padapter)) { -+ /* channel bw offset can not be allowed, start MCC */ -+ if (chbw_allow == _FALSE) { -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ -+ //rtw_hal_mcc_restore_iqk_val(padapter); -+ _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT); -+ _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ -+ if (ret == _FAIL) { /* MCC Start fail, AP/GO switch to buddy's channel */ -+ u8 ch_to_set = 0, bw_to_set, offset_to_set; -+ -+ rtw_hal_set_mcc_status(padapter, MCC_STATUS_NEED_MCC | MCC_STATUS_DOING_MCC); -+ rtw_hal_set_mcc_setting_disconnect(padapter); -+ if (rtw_mi_get_ch_setting_union_no_self( -+ padapter, &ch_to_set, &bw_to_set, -+ &offset_to_set) != 0) { -+ PHAL_DATA_TYPE hal = GET_HAL_DATA(padapter); -+ u8 doiqk = _TRUE; -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, &doiqk); -+ hal->current_channel = 0; -+ hal->current_channel_bw = CHANNEL_WIDTH_MAX; -+ set_channel_bwmode(padapter, ch_to_set, offset_to_set, bw_to_set); -+ doiqk = _FALSE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, &doiqk); -+ } -+ } -+ } -+ } -+ -+ return ret; -+} -+ -+/** -+ * rtw_hal_set_mcc_setting_disconnect - setting mcc under mlme disconnect(stop softap/disconnect from AP) -+ * @padapter: the adapter to be setted -+ */ -+u8 rtw_hal_set_mcc_setting_disconnect(PADAPTER padapter) -+{ -+ u8 ret = _FAIL; -+ -+ if (MCC_EN(padapter)) { -+ struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv); -+ -+ _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) { -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) -+ ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_DISCONNECT); -+ } -+ _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ } -+ -+ return ret; -+} -+ -+/** -+ * rtw_hal_set_mcc_setting_join_done_chk_ch - setting mcc under join done -+ * @padapter: the adapter to be checked -+ */ -+u8 rtw_hal_set_mcc_setting_join_done_chk_ch(PADAPTER padapter) -+{ -+ u8 ret = _FAIL; -+ -+ if (MCC_EN(padapter)) { -+ struct mi_state mstate; -+ -+ rtw_mi_status_no_self(padapter, &mstate); -+ -+ if (MSTATE_STA_LD_NUM(&mstate) || MSTATE_STA_LG_NUM(&mstate) || MSTATE_AP_NUM(&mstate)) { -+ bool chbw_allow = _TRUE; -+ u8 u_ch, u_offset, u_bw; -+ struct mlme_ext_priv *cur_mlmeext = &padapter->mlmeextpriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ if (rtw_mi_get_ch_setting_union_no_self(padapter, &u_ch, &u_bw, &u_offset) <= 0) { -+ dump_adapters_status(RTW_DBGDUMP , dvobj); -+ rtw_warn_on(1); -+ } -+ -+ RTW_INFO(FUNC_ADPT_FMT" union no self: %u,%u,%u\n" -+ , FUNC_ADPT_ARG(padapter), u_ch, u_bw, u_offset); -+ -+ /* chbw_allow? */ -+ chbw_allow = rtw_is_chbw_grouped(cur_mlmeext->cur_channel -+ , cur_mlmeext->cur_bwmode, cur_mlmeext->cur_ch_offset -+ , u_ch, u_bw, u_offset); -+ -+ RTW_INFO(FUNC_ADPT_FMT" chbw_allow:%d\n" -+ , FUNC_ADPT_ARG(padapter), chbw_allow); -+ -+ /* if chbw_allow = false, start MCC setting */ -+ if (chbw_allow == _FALSE) { -+ struct mcc_obj_priv *pmccobjpriv = &dvobj->mcc_objpriv; -+ -+ rtw_hal_mcc_restore_iqk_val(padapter); -+ _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT); -+ _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); -+ -+ if (ret == _FAIL) { /* MCC Start Fail, then disconenct client join */ -+ rtw_hal_set_mcc_status(padapter, MCC_STATUS_NEED_MCC | MCC_STATUS_DOING_MCC); -+ rtw_disassoc_cmd(padapter, 0, RTW_CMDF_DIRECTLY); -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ rtw_free_assoc_resources(padapter, _TRUE); -+ rtw_free_network_queue(padapter, _TRUE); -+ } -+ } -+ } -+ } -+ -+ return ret; -+} -+ -+/** -+ * rtw_hal_set_mcc_setting_chk_start_clnt_join - check change channel under start clnt join -+ * @padapter: the adapter to be checked -+ * @ch: pointer to rerurn ch -+ * @bw: pointer to rerurn bw -+ * @offset: pointer to rerurn offset -+ * @chbw_allow: allow to use adapter's channel setting -+ */ -+u8 rtw_hal_set_mcc_setting_chk_start_clnt_join(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset, u8 chbw_allow) -+{ -+ u8 ret = _FAIL; -+ -+ /* if chbw_allow = false under en_mcc = TRUE, we do not change channel related setting */ -+ if (MCC_EN(padapter)) { -+ /* restore union channel related setting to current channel related setting */ -+ if (chbw_allow == _FALSE) { -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ -+ /* issue null data to other interface connected to AP */ -+ rtw_hal_mcc_issue_null_data(padapter, chbw_allow, _TRUE); -+ -+ *ch = pmlmeext->cur_channel; -+ *bw = pmlmeext->cur_bwmode; -+ *offset = pmlmeext->cur_ch_offset; -+ -+ RTW_INFO(FUNC_ADPT_FMT" en_mcc:%d(%d,%d,%d,)\n" -+ , FUNC_ADPT_ARG(padapter), MCC_EN(padapter) -+ , *ch, *bw, *offset); -+ ret = _SUCCESS; -+ } -+ } -+ -+ return ret; -+} -+ -+static void rtw_hal_mcc_dump_noa_content(void *sel, PADAPTER padapter) -+{ -+ struct mcc_adapter_priv *pmccadapriv = NULL; -+ u8 *pos = NULL; -+ pmccadapriv = &padapter->mcc_adapterpriv; -+ /* last position for NoA attribute */ -+ pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len; -+ -+ -+ RTW_PRINT_SEL(sel, "\nStart to dump NoA Content\n"); -+ RTW_PRINT_SEL(sel, "NoA Counts:%d\n", *(pos - 13)); -+ RTW_PRINT_SEL(sel, "NoA Duration(TU):%d\n", (RTW_GET_LE32(pos - 12))/TU); -+ RTW_PRINT_SEL(sel, "NoA Interval(TU):%d\n", (RTW_GET_LE32(pos - 8))/TU); -+ RTW_PRINT_SEL(sel, "NoA Start time(microseconds):0x%02x\n", RTW_GET_LE32(pos - 4)); -+ RTW_PRINT_SEL(sel, "End to dump NoA Content\n"); -+} -+ -+static void mcc_dump_dbg_reg(void *sel, _adapter *adapter) -+{ -+ struct mcc_obj_priv *mccobjpriv = adapter_to_mccobjpriv(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ u8 i,j; -+ _irqL irqL; -+ -+ _enter_critical_bh(&mccobjpriv->mcc_lock, &irqL); -+ RTW_PRINT_SEL(sel, "current order=%d\n", mccobjpriv->current_order); -+ _exit_critical_bh(&mccobjpriv->mcc_lock, &irqL); -+ -+ _enter_critical_mutex(&mccobjpriv->mcc_dbg_reg_mutex, NULL); -+ for (i = 0; i < ARRAY_SIZE(mccobjpriv->dbg_reg); i++) -+ RTW_PRINT_SEL(sel, "REG_0x%X:0x%08x\n", mccobjpriv->dbg_reg[i], mccobjpriv->dbg_reg_val[i]); -+ -+ for (i = 0; i < ARRAY_SIZE(mccobjpriv->dbg_rf_reg); i++) { -+ for (j = 0; j < hal_spec->rf_reg_path_num; j++) -+ RTW_PRINT_SEL(sel, "RF_PATH_%d_REG_0x%X:0x%08x\n", -+ j, mccobjpriv->dbg_rf_reg[i], mccobjpriv->dbg_rf_reg_val[i][j]); -+ } -+ _exit_critical_mutex(&mccobjpriv->mcc_dbg_reg_mutex, NULL); -+} -+ -+ -+void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj) -+{ -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ struct mcc_adapter_priv *mccadapriv = NULL; -+ _adapter *iface = NULL, *pri_adapter = NULL; -+ struct registry_priv *regpriv = NULL; -+ HAL_DATA_TYPE *hal = NULL; -+ u8 i = 0, j = 0; -+ u64 tsf[MAX_MCC_NUM] = {0}; -+ -+ /* regpriv is common for all adapter */ -+ pri_adapter = dvobj_get_primary_adapter(dvobj); -+ hal = GET_HAL_DATA(pri_adapter); -+ -+ RTW_PRINT_SEL(sel, "**********************************************\n"); -+ RTW_PRINT_SEL(sel, "en_mcc:%d\n", MCC_EN(pri_adapter)); -+ RTW_PRINT_SEL(sel, "primary adapter("ADPT_FMT") duration:%d%c\n", -+ ADPT_ARG(dvobj_get_primary_adapter(dvobj)), mccobjpriv->duration, 37); -+ RTW_PRINT_SEL(sel, "runtime duration:%s\n", mccobjpriv->enable_runtime_duration ? "enable":"disable"); -+ RTW_PRINT_SEL(sel, "phydm offload:%s\n", mccobjpriv->mcc_phydm_offload ? "enable":"disable"); -+ -+ if (rtw_hal_check_mcc_status(pri_adapter, MCC_STATUS_DOING_MCC)) { -+ rtw_hal_mcc_rqt_tsf(pri_adapter, tsf); -+ -+ for (i = 0; i < MAX_MCC_NUM; i++) { -+ iface = mccobjpriv->iface[i]; -+ if (!iface) -+ continue; -+ -+ regpriv = &iface->registrypriv; -+ mccadapriv = &iface->mcc_adapterpriv; -+ -+ if (mccadapriv) { -+ u8 p2p_ps_mode = iface->wdinfo.p2p_ps_mode; -+ -+ RTW_PRINT_SEL(sel, "adapter mcc info:\n"); -+ RTW_PRINT_SEL(sel, "ifname:%s\n", ADPT_ARG(iface)); -+ RTW_PRINT_SEL(sel, "order:%d\n", mccadapriv->order); -+ RTW_PRINT_SEL(sel, "duration:%d\n", mccadapriv->mcc_duration); -+ RTW_PRINT_SEL(sel, "target tx bytes:%d\n", mccadapriv->mcc_target_tx_bytes_to_port); -+ RTW_PRINT_SEL(sel, "current TP:%d\n", mccadapriv->mcc_tp); -+ RTW_PRINT_SEL(sel, "mgmt queue macid:%d\n", mccadapriv->mgmt_queue_macid); -+ RTW_PRINT_SEL(sel, "macid bitmap:0x%02x\n", mccadapriv->mcc_macid_bitmap); -+ RTW_PRINT_SEL(sel, "P2P NoA:%s\n\n", p2p_ps_mode == P2P_PS_NOA ? "enable":"disable"); -+ RTW_PRINT_SEL(sel, "registry data:\n"); -+ RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_ap_bw20_target_tx_tp); -+ RTW_PRINT_SEL(sel, "ap target tx TP(BW:40M):%d Mbps\n", regpriv->rtw_mcc_ap_bw40_target_tx_tp); -+ RTW_PRINT_SEL(sel, "ap target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_ap_bw80_target_tx_tp); -+ RTW_PRINT_SEL(sel, "sta target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_sta_bw20_target_tx_tp); -+ RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M ):%d Mbps\n", regpriv->rtw_mcc_sta_bw40_target_tx_tp); -+ RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_sta_bw80_target_tx_tp); -+ RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", regpriv->rtw_mcc_single_tx_cri); -+ RTW_PRINT_SEL(sel, "HW TSF=0x%llx\n", tsf[mccadapriv->order]); -+ if (MLME_IS_GO(iface)) -+ rtw_hal_mcc_dump_noa_content(sel, iface); -+ RTW_PRINT_SEL(sel, "**********************************************\n"); -+ } -+ } -+ -+ mcc_dump_dbg_reg(sel, pri_adapter); -+ } -+ -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ RTW_PRINT_SEL(sel, "@@@@@@@@@@@@@@@@@@@@\n"); -+ rtw_hal_mcc_cfg_phydm(pri_adapter, MCC_CFG_PHYDM_DUMP, sel); -+ RTW_PRINT_SEL(sel, "@@@@@@@@@@@@@@@@@@@@\n"); -+ #endif -+ -+ RTW_PRINT_SEL(sel, "------------------------------------------\n"); -+ RTW_PRINT_SEL(sel, "policy index:%d\n", mccobjpriv->policy_index); -+ RTW_PRINT_SEL(sel, "------------------------------------------\n"); -+ RTW_PRINT_SEL(sel, "define data:\n"); -+ RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", MCC_AP_BW20_TARGET_TX_TP); -+ RTW_PRINT_SEL(sel, "ap target tx TP(BW:40M):%d Mbps\n", MCC_AP_BW40_TARGET_TX_TP); -+ RTW_PRINT_SEL(sel, "ap target tx TP(BW:80M):%d Mbps\n", MCC_AP_BW80_TARGET_TX_TP); -+ RTW_PRINT_SEL(sel, "sta target tx TP(BW:20M):%d Mbps\n", MCC_STA_BW20_TARGET_TX_TP); -+ RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M):%d Mbps\n", MCC_STA_BW40_TARGET_TX_TP); -+ RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", MCC_STA_BW80_TARGET_TX_TP); -+ RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", MCC_SINGLE_TX_CRITERIA); -+ RTW_PRINT_SEL(sel, "------------------------------------------\n"); -+} -+ -+inline void update_mcc_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) -+{ -+ if (MCC_EN(padapter)) { -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) { -+ /* use QSLT_MGNT to check mgnt queue or bcn queue */ -+ if (pattrib->qsel == QSLT_MGNT) { -+ pattrib->mac_id = padapter->mcc_adapterpriv.mgmt_queue_macid; -+ pattrib->qsel = QSLT_VO; -+ } -+ } -+ } -+} -+ -+inline u8 rtw_hal_mcc_link_status_chk(_adapter *padapter, const char *msg) -+{ -+ u8 ret = _TRUE, i = 0; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ _adapter *iface; -+ struct mlme_ext_priv *mlmeext; -+ -+ if (MCC_EN(padapter)) { -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) { -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ mlmeext = &iface->mlmeextpriv; -+ if (mlmeext_scan_state(mlmeext) != SCAN_DISABLE) { -+ #ifdef DBG_EXPIRATION_CHK -+ RTW_INFO(FUNC_ADPT_FMT" don't enter %s under scan for MCC mode\n", FUNC_ADPT_ARG(padapter), msg); -+ #endif -+ ret = _FALSE; -+ goto exit; -+ } -+ } -+ } -+ } -+ -+exit: -+ return ret; -+} -+ -+void rtw_hal_mcc_issue_null_data(_adapter *padapter, u8 chbw_allow, u8 ps_mode) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ _adapter *iface = NULL; -+ systime start = rtw_get_current_time(); -+ u8 i = 0; -+ -+ if (!MCC_EN(padapter)) -+ return; -+ -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) -+ return; -+ -+ if (chbw_allow == _TRUE) -+ return; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ /* issue null data to inform ap station will leave */ -+ if (is_client_associated_to_ap(iface)) { -+ struct mlme_ext_priv *mlmeext = &iface->mlmeextpriv; -+ struct mlme_ext_info *mlmeextinfo = &mlmeext->mlmext_info; -+ u8 ch = mlmeext->cur_channel; -+ u8 bw = mlmeext->cur_bwmode; -+ u8 offset = mlmeext->cur_ch_offset; -+ struct sta_info *sta = rtw_get_stainfo(&iface->stapriv, get_my_bssid(&(mlmeextinfo->network))); -+ -+ if (!sta) -+ continue; -+ -+ set_channel_bwmode(iface, ch, offset, bw); -+ -+ if (ps_mode) -+ rtw_hal_macid_sleep(iface, sta->cmn.mac_id); -+ else -+ rtw_hal_macid_wakeup(iface, sta->cmn.mac_id); -+ -+ issue_nulldata(iface, NULL, ps_mode, 3, 50); -+ } -+ } -+ RTW_INFO("%s(%d ms)\n", __func__, rtw_get_passing_time_ms(start)); -+} -+ -+u8 *rtw_hal_mcc_append_go_p2p_ie(PADAPTER padapter, u8 *pframe, u32 *len) -+{ -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ -+ if (!MCC_EN(padapter)) -+ return pframe; -+ -+ if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) -+ return pframe; -+ -+ if (pmccadapriv->p2p_go_noa_ie_len == 0) -+ return pframe; -+ -+ _rtw_memcpy(pframe, pmccadapriv->p2p_go_noa_ie, pmccadapriv->p2p_go_noa_ie_len); -+ *len = *len + pmccadapriv->p2p_go_noa_ie_len; -+ -+ return pframe + pmccadapriv->p2p_go_noa_ie_len; -+} -+ -+void rtw_hal_dump_mcc_policy_table(void *sel) -+{ -+ u8 idx = 0; -+ RTW_PRINT_SEL(sel, "duration\t,tsf sync offset\t,start time offset\t,interval\t,guard offset0\t,guard offset1\n"); -+ -+ for (idx = 0; idx < mcc_max_policy_num; idx ++) { -+ RTW_PRINT_SEL(sel, "%d\t\t,%d\t\t\t,%d\t\t\t,%d\t\t,%d\t\t,%d\n" -+ , mcc_switch_channel_policy_table[idx][MCC_DURATION_IDX] -+ , mcc_switch_channel_policy_table[idx][MCC_TSF_SYNC_OFFSET_IDX] -+ , mcc_switch_channel_policy_table[idx][MCC_START_TIME_OFFSET_IDX] -+ , mcc_switch_channel_policy_table[idx][MCC_INTERVAL_IDX] -+ , mcc_switch_channel_policy_table[idx][MCC_GUARD_OFFSET0_IDX] -+ , mcc_switch_channel_policy_table[idx][MCC_GUARD_OFFSET1_IDX]); -+ } -+} -+ -+void rtw_hal_mcc_update_macid_bitmap(PADAPTER padapter, int mac_id, u8 add) -+{ -+ struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; -+ -+ if (!MCC_EN(padapter)) -+ return; -+ -+ if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) -+ return; -+ -+ if (pmccadapriv->role == MCC_ROLE_GC || pmccadapriv->role == MCC_ROLE_STA) -+ return; -+ -+ if (mac_id < 0) { -+ RTW_WARN("%s: mac_id < 0(%d)\n", __func__, mac_id); -+ return; -+ } -+ -+ RTW_INFO(ADPT_FMT" %s macid=%d, ori mcc_macid_bitmap=0x%08x\n" -+ , ADPT_ARG(padapter), add ? "add" : "clear" -+ , mac_id, pmccadapriv->mcc_macid_bitmap); -+ -+ if (add) { -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_ADD_CLIENT, &mac_id); -+ #endif -+ pmccadapriv->mcc_macid_bitmap |= BIT(mac_id); -+ } else { -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ rtw_hal_mcc_cfg_phydm(padapter, MCC_CFG_PHYDM_REMOVE_CLIENT, &mac_id); -+ #endif -+ pmccadapriv->mcc_macid_bitmap &= ~(BIT(mac_id)); -+ } -+ rtw_hal_set_mcc_macid_cmd(padapter); -+} -+ -+void rtw_hal_mcc_process_noa(PADAPTER padapter) -+{ -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv); -+ -+ if (!MCC_EN(padapter)) -+ return; -+ -+ if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) -+ return; -+ -+ if (!MLME_IS_GC(padapter)) -+ return; -+ -+ switch(pwdinfo->p2p_ps_mode) { -+ case P2P_PS_NONE: -+ RTW_INFO("[MCC] Disable NoA under MCC\n"); -+ rtw_hal_mcc_update_parameter(padapter, _TRUE); -+ break; -+ case P2P_PS_NOA: -+ RTW_INFO("[MCC] Enable NoA under MCC\n"); -+ break; -+ default: -+ break; -+ -+ } -+} -+ -+void rtw_hal_mcc_parameter_init(PADAPTER padapter) -+{ -+ if (!padapter->registrypriv.en_mcc) -+ return; -+ -+ if (is_primary_adapter(padapter)) { -+ SET_MCC_EN_FLAG(padapter, padapter->registrypriv.en_mcc); -+ SET_MCC_DURATION(padapter, padapter->registrypriv.rtw_mcc_duration); -+ SET_MCC_RUNTIME_DURATION(padapter, padapter->registrypriv.rtw_mcc_enable_runtime_duration); -+ SET_MCC_PHYDM_OFFLOAD(padapter, padapter->registrypriv.rtw_mcc_phydm_offload); -+ } -+} -+ -+ -+static u8 set_mcc_duration_hdl(PADAPTER adapter, const u8 *val) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); -+ _adapter *iface = NULL; -+ u8 duration = 50; -+ u8 ret = _SUCCESS, noa_enable = _FALSE, i = 0; -+ enum mcc_duration_setting type; -+ -+ if (!mccobjpriv->enable_runtime_duration) -+ goto exit; -+ -+#ifdef CONFIG_P2P_PS -+ /* check noa enable or not */ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface->wdinfo.p2p_ps_mode == P2P_PS_NOA) { -+ noa_enable = _TRUE; -+ break; -+ } -+ } -+#endif /* CONFIG_P2P_PS */ -+ -+ type = val[0]; -+ duration = val[1]; -+ -+ if (type == MCC_DURATION_MAPPING) { -+ switch (duration) { -+ /* 0 = fair scheduling */ -+ case 0: -+ mccobjpriv->duration= 40; -+ mccobjpriv->policy_index = 2; -+ mccobjpriv->mchan_sched_mode = MCC_FAIR_SCHEDULE; -+ break; -+ /* 1 = favor STA */ -+ case 1: -+ mccobjpriv->duration= 70; -+ mccobjpriv->policy_index = 1; -+ mccobjpriv->mchan_sched_mode = MCC_FAVOR_STA; -+ break; -+ /* 2 = favor P2P*/ -+ case 2: -+ default: -+ mccobjpriv->duration= 30; -+ mccobjpriv->policy_index = 0; -+ mccobjpriv->mchan_sched_mode = MCC_FAVOR_P2P; -+ break; -+ } -+ } else { -+ mccobjpriv->duration = duration; -+ rtw_hal_mcc_update_policy_table(adapter); -+ } -+ -+ /* only update sw parameter under MCC -+ it will be force update during */ -+ if (noa_enable) -+ goto exit; -+ -+ if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) -+ rtw_hal_mcc_update_parameter(adapter, _TRUE); -+exit: -+ return ret; -+} -+ -+u8 rtw_set_mcc_duration_cmd(_adapter *adapter, u8 type, u8 val) -+{ -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ u8 *buf = NULL; -+ u8 sz = 2; -+ u8 res = _SUCCESS; -+ -+ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ buf = rtw_zmalloc(sizeof(u8) * sz); -+ if (buf == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = MCC_CMD_WK_CID; -+ pdrvextra_cmd_parm->type = MCC_SET_DURATION_WK_CID; -+ pdrvextra_cmd_parm->size = sz; -+ pdrvextra_cmd_parm->pbuf = buf; -+ -+ _rtw_memcpy(buf, &type, 1); -+ _rtw_memcpy(buf + 1, &val, 1); -+ -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ -+exit: -+ return res; -+} -+ -+#ifdef CONFIG_MCC_PHYDM_OFFLOAD -+static u8 mcc_phydm_offload_enable_hdl(_adapter *adapter, const u8 *val) -+{ -+ struct mcc_obj_priv *mccobjpriv = adapter_to_mccobjpriv(adapter); -+ u8 ret = _SUCCESS; -+ u8 enable = *val; -+ -+ /*only modify driver parameter during non-mcc status */ -+ if (!rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { -+ mccobjpriv->mcc_phydm_offload = enable; -+ } else { -+ /*modify both driver & phydm parameter during mcc status */ -+ mccobjpriv->mcc_phydm_offload = enable; -+ rtw_hal_mcc_cfg_phydm(adapter, MCC_CFG_PHYDM_OFFLOAD, &mccobjpriv->mcc_phydm_offload); -+ } -+ -+ RTW_INFO("[MCC] phydm offload enable hdl(%d)\n", mccobjpriv->mcc_phydm_offload); -+ -+ return ret; -+} -+ -+u8 rtw_set_mcc_phydm_offload_enable_cmd(_adapter *adapter, u8 enable, u8 enqueue) -+{ -+ u8 res = _SUCCESS; -+ -+ if (enqueue) { -+ struct cmd_obj *cmdobj; -+ struct drvextra_cmd_parm *pdrvextra_cmd_parm; -+ struct cmd_priv *pcmdpriv = &adapter->cmdpriv; -+ u8 *mcc_phydm_offload_enable = NULL; -+ -+ -+ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); -+ if (cmdobj == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); -+ if (pdrvextra_cmd_parm == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ mcc_phydm_offload_enable = rtw_zmalloc(sizeof(u8)); -+ if (mcc_phydm_offload_enable == NULL) { -+ rtw_mfree((u8 *)cmdobj, sizeof(struct cmd_obj)); -+ rtw_mfree((u8 *)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); -+ res = _FAIL; -+ goto exit; -+ } -+ -+ pdrvextra_cmd_parm->ec_id = MCC_CMD_WK_CID; -+ pdrvextra_cmd_parm->type = MCC_SET_PHYDM_OFFLOAD_WK_CID; -+ pdrvextra_cmd_parm->size = 1; -+ pdrvextra_cmd_parm->pbuf = mcc_phydm_offload_enable; -+ -+ _rtw_memcpy(mcc_phydm_offload_enable, &enable, 1); -+ init_h2fwcmd_w_parm_no_rsp(cmdobj, pdrvextra_cmd_parm, CMD_SET_DRV_EXTRA); -+ res = rtw_enqueue_cmd(pcmdpriv, cmdobj); -+ } else { -+ mcc_phydm_offload_enable_hdl(adapter, &enable); -+ } -+ -+exit: -+ return res; -+} -+#endif -+ -+u8 rtw_mcc_cmd_hdl(_adapter *adapter, u8 type, const u8 *val) -+{ -+ struct mcc_obj_priv *mccobjpriv = adapter_to_mccobjpriv(adapter); -+ u8 ret = _SUCCESS; -+ -+ switch (type) { -+ case MCC_SET_DURATION_WK_CID: -+ set_mcc_duration_hdl(adapter, val); -+ break; -+ case MCC_GET_DBG_REG_WK_CID: -+ mcc_get_reg_hdl(adapter, val); -+ break; -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ case MCC_SET_PHYDM_OFFLOAD_WK_CID: -+ mcc_phydm_offload_enable_hdl(adapter, val); -+ break; -+ #endif -+ default: -+ RTW_ERR("[MCC] rtw_mcc_cmd_hdl fail(%d)\n", type); -+ break; -+ } -+ -+ -+ -+ return ret; -+} -+ -+#endif /* CONFIG_MCC_MODE */ -diff --git a/drivers/staging/rtl8723cs/hal/hal_mp.c b/drivers/staging/rtl8723cs/hal/hal_mp.c -new file mode 100644 -index 000000000000..63febafcfeda ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_mp.c -@@ -0,0 +1,2642 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _HAL_MP_C_ -+ -+#include -+ -+#ifdef CONFIG_MP_INCLUDED -+ -+#ifdef RTW_HALMAC -+ #include /* struct HAL_DATA_TYPE, RF register definition and etc. */ -+#else /* !RTW_HALMAC */ -+ #ifdef CONFIG_RTL8188E -+ #include -+ #endif -+ #ifdef CONFIG_RTL8723B -+ #include -+ #endif -+ #ifdef CONFIG_RTL8192E -+ #include -+ #endif -+ #ifdef CONFIG_RTL8814A -+ #include -+ #endif -+ #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ #include -+ #endif -+ #ifdef CONFIG_RTL8703B -+ #include -+ #endif -+ #ifdef CONFIG_RTL8723D -+ #include -+ #endif -+ #ifdef CONFIG_RTL8710B -+ #include -+ #endif -+ #ifdef CONFIG_RTL8188F -+ #include -+ #endif -+ #ifdef CONFIG_RTL8188GTV -+ #include -+ #endif -+ #ifdef CONFIG_RTL8192F -+ #include -+ #endif -+#endif /* !RTW_HALMAC */ -+ -+ -+u8 MgntQuery_NssTxRate(u16 Rate) -+{ -+ u8 NssNum = RF_TX_NUM_NONIMPLEMENT; -+ -+ if ((Rate >= MGN_MCS8 && Rate <= MGN_MCS15) || -+ (Rate >= MGN_VHT2SS_MCS0 && Rate <= MGN_VHT2SS_MCS9)) -+ NssNum = RF_2TX; -+ else if ((Rate >= MGN_MCS16 && Rate <= MGN_MCS23) || -+ (Rate >= MGN_VHT3SS_MCS0 && Rate <= MGN_VHT3SS_MCS9)) -+ NssNum = RF_3TX; -+ else if ((Rate >= MGN_MCS24 && Rate <= MGN_MCS31) || -+ (Rate >= MGN_VHT4SS_MCS0 && Rate <= MGN_VHT4SS_MCS9)) -+ NssNum = RF_4TX; -+ else -+ NssNum = RF_1TX; -+ -+ return NssNum; -+} -+ -+void hal_mpt_SwitchRfSetting(PADAPTER pAdapter) -+{ -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ u8 ChannelToSw = pMptCtx->MptChannelToSw; -+ u32 ulRateIdx = pMptCtx->mpt_rate_index; -+ u32 ulbandwidth = pMptCtx->MptBandWidth; -+ -+ /* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis.*/ -+ if (IS_HARDWARE_TYPE_8188ES(pAdapter) && (1 <= ChannelToSw && ChannelToSw <= 11) && -+ (ulRateIdx == MPT_RATE_MCS0 || ulRateIdx == MPT_RATE_1M || ulRateIdx == MPT_RATE_6M)) { -+ pMptCtx->backup0x52_RF_A = (u8)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); -+ pMptCtx->backup0x52_RF_B = (u8)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); -+ -+ if ((PlatformEFIORead4Byte(pAdapter, 0xF4) & BIT29) == BIT29) { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xB); -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xB); -+ } else { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xD); -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xD); -+ } -+ } else if (IS_HARDWARE_TYPE_8188EE(pAdapter)) { /* <20140903, VincentL> Asked by RF Eason and Edlu*/ -+ if (ChannelToSw == 3 && ulbandwidth == MPT_BW_40MHZ) { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ -+ } else { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ -+ } -+ } else if (IS_HARDWARE_TYPE_8188E(pAdapter)) { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_A); -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_B); -+ } -+} -+ -+s32 hal_mpt_SetPowerTracking(PADAPTER padapter, u8 enable) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -+ -+ -+ if (!netif_running(padapter->pnetdev)) { -+ return _FAIL; -+ } -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { -+ return _FAIL; -+ } -+ if (enable) -+ pDM_Odm->rf_calibrate_info.txpowertrack_control = _TRUE; -+ else -+ pDM_Odm->rf_calibrate_info.txpowertrack_control = _FALSE; -+ -+ return _SUCCESS; -+} -+ -+void hal_mpt_GetPowerTracking(PADAPTER padapter, u8 *enable) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -+ -+ -+ *enable = pDM_Odm->rf_calibrate_info.txpowertrack_control; -+} -+ -+ -+void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) -+{ -+ u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; -+ u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; -+ u8 i; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); -+ u8 u1Channel = pHalData->current_channel; -+ u32 ulRateIdx = pMptCtx->mpt_rate_index; -+ u8 DataRate = 0xFF; -+ -+ /* Do not modify CCK TX filter parameters for 8822B*/ -+ if(IS_HARDWARE_TYPE_8822B(Adapter) || IS_HARDWARE_TYPE_8821C(Adapter) || -+ IS_HARDWARE_TYPE_8723D(Adapter) || IS_HARDWARE_TYPE_8192F(Adapter) || IS_HARDWARE_TYPE_8822C(Adapter)) -+ return; -+ -+ DataRate = mpt_to_mgnt_rate(ulRateIdx); -+ -+ if (u1Channel == 14 && IS_CCK_RATE(DataRate)) -+ pHalData->bCCKinCH14 = TRUE; -+ else -+ pHalData->bCCKinCH14 = FALSE; -+ -+ if (IS_HARDWARE_TYPE_8703B(Adapter)) { -+ if ((u1Channel == 14) && IS_CCK_RATE(DataRate)) { -+ /* Channel 14 in CCK, need to set 0xA26~0xA29 to 0 for 8703B */ -+ phy_set_bb_reg(Adapter, rCCK0_TxFilter2, bMaskHWord, 0); -+ phy_set_bb_reg(Adapter, rCCK0_DebugPort, bMaskLWord, 0); -+ -+ } else { -+ /* Normal setting for 8703B, just recover to the default setting. */ -+ /* This hardcore values reference from the parameter which BB team gave. */ -+ for (i = 0 ; i < 2 ; ++i) -+ phy_set_bb_reg(Adapter, pHalData->RegForRecover[i].offset, bMaskDWord, pHalData->RegForRecover[i].value); -+ -+ } -+ } else if (IS_HARDWARE_TYPE_8723D(Adapter)) { -+ /* 2.4G CCK TX DFIR */ -+ /* 2016.01.20 Suggest from RS BB mingzhi*/ -+ if (u1Channel == 14) { -+ phy_set_bb_reg(Adapter, rCCK0_TxFilter2, bMaskDWord, 0x0000B81C); -+ phy_set_bb_reg(Adapter, rCCK0_DebugPort, bMaskDWord, 0x00000000); -+ phy_set_bb_reg(Adapter, 0xAAC, bMaskDWord, 0x00003667); -+ } else { -+ for (i = 0 ; i < 3 ; ++i) { -+ phy_set_bb_reg(Adapter, -+ pHalData->RegForRecover[i].offset, -+ bMaskDWord, -+ pHalData->RegForRecover[i].value); -+ } -+ } -+ } else if (IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8188GTV(Adapter)) { -+ /* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/ -+ CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); -+ CCKSwingIndex = 20; /* default index */ -+ -+ if (!pHalData->bCCKinCH14) { -+ /* Readback the current bb cck swing value and compare with the table to */ -+ /* get the current swing index */ -+ for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { -+ if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch1_ch13_88f[i][0]) && -+ (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch1_ch13_88f[i][1])) { -+ CCKSwingIndex = i; -+ break; -+ } -+ } -+ write_bbreg(Adapter, 0xa22, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][0]); -+ write_bbreg(Adapter, 0xa23, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][1]); -+ write_bbreg(Adapter, 0xa24, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][2]); -+ write_bbreg(Adapter, 0xa25, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][3]); -+ write_bbreg(Adapter, 0xa26, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][4]); -+ write_bbreg(Adapter, 0xa27, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][5]); -+ write_bbreg(Adapter, 0xa28, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][6]); -+ write_bbreg(Adapter, 0xa29, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][7]); -+ write_bbreg(Adapter, 0xa9a, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][8]); -+ write_bbreg(Adapter, 0xa9b, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][9]); -+ write_bbreg(Adapter, 0xa9c, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][10]); -+ write_bbreg(Adapter, 0xa9d, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][11]); -+ write_bbreg(Adapter, 0xaa0, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][12]); -+ write_bbreg(Adapter, 0xaa1, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][13]); -+ write_bbreg(Adapter, 0xaa2, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][14]); -+ write_bbreg(Adapter, 0xaa3, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][15]); -+ RTW_INFO("%s , cck_swing_table_ch1_ch13_88f[%d]\n", __func__, CCKSwingIndex); -+ } else { -+ for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { -+ if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch14_88f[i][0]) && -+ (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch14_88f[i][1])) { -+ CCKSwingIndex = i; -+ break; -+ } -+ } -+ write_bbreg(Adapter, 0xa22, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][0]); -+ write_bbreg(Adapter, 0xa23, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][1]); -+ write_bbreg(Adapter, 0xa24, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][2]); -+ write_bbreg(Adapter, 0xa25, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][3]); -+ write_bbreg(Adapter, 0xa26, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][4]); -+ write_bbreg(Adapter, 0xa27, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][5]); -+ write_bbreg(Adapter, 0xa28, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][6]); -+ write_bbreg(Adapter, 0xa29, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][7]); -+ write_bbreg(Adapter, 0xa9a, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][8]); -+ write_bbreg(Adapter, 0xa9b, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][9]); -+ write_bbreg(Adapter, 0xa9c, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][10]); -+ write_bbreg(Adapter, 0xa9d, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][11]); -+ write_bbreg(Adapter, 0xaa0, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][12]); -+ write_bbreg(Adapter, 0xaa1, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][13]); -+ write_bbreg(Adapter, 0xaa2, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][14]); -+ write_bbreg(Adapter, 0xaa3, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][15]); -+ RTW_INFO("%s , cck_swing_table_ch14_88f[%d]\n", __func__, CCKSwingIndex); -+ } -+ } else { -+ -+ /* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/ -+ CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); -+ -+ if (!pHalData->bCCKinCH14) { -+ /* Readback the current bb cck swing value and compare with the table to */ -+ /* get the current swing index */ -+ for (i = 0; i < CCK_TABLE_SIZE; i++) { -+ if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch1_ch13[i][0]) && -+ (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch1_ch13[i][1])) { -+ CCKSwingIndex = i; -+ break; -+ } -+ } -+ -+ /*Write 0xa22 0xa23*/ -+ TempVal = cck_swing_table_ch1_ch13[CCKSwingIndex][0] + -+ (cck_swing_table_ch1_ch13[CCKSwingIndex][1] << 8); -+ -+ -+ /*Write 0xa24 ~ 0xa27*/ -+ TempVal2 = 0; -+ TempVal2 = cck_swing_table_ch1_ch13[CCKSwingIndex][2] + -+ (cck_swing_table_ch1_ch13[CCKSwingIndex][3] << 8) + -+ (cck_swing_table_ch1_ch13[CCKSwingIndex][4] << 16) + -+ (cck_swing_table_ch1_ch13[CCKSwingIndex][5] << 24); -+ -+ /*Write 0xa28 0xa29*/ -+ TempVal3 = 0; -+ TempVal3 = cck_swing_table_ch1_ch13[CCKSwingIndex][6] + -+ (cck_swing_table_ch1_ch13[CCKSwingIndex][7] << 8); -+ } else { -+ for (i = 0; i < CCK_TABLE_SIZE; i++) { -+ if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch14[i][0]) && -+ (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch14[i][1])) { -+ CCKSwingIndex = i; -+ break; -+ } -+ } -+ -+ /*Write 0xa22 0xa23*/ -+ TempVal = cck_swing_table_ch14[CCKSwingIndex][0] + -+ (cck_swing_table_ch14[CCKSwingIndex][1] << 8); -+ -+ /*Write 0xa24 ~ 0xa27*/ -+ TempVal2 = 0; -+ TempVal2 = cck_swing_table_ch14[CCKSwingIndex][2] + -+ (cck_swing_table_ch14[CCKSwingIndex][3] << 8) + -+ (cck_swing_table_ch14[CCKSwingIndex][4] << 16) + -+ (cck_swing_table_ch14[CCKSwingIndex][5] << 24); -+ -+ /*Write 0xa28 0xa29*/ -+ TempVal3 = 0; -+ TempVal3 = cck_swing_table_ch14[CCKSwingIndex][6] + -+ (cck_swing_table_ch14[CCKSwingIndex][7] << 8); -+ } -+ -+ write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); -+ write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); -+ write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); -+ } -+ -+} -+ -+void hal_mpt_SetChannel(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ struct mp_priv *pmp = &pAdapter->mppriv; -+ u8 channel = pmp->channel; -+ u8 bandwidth = pmp->bandwidth; -+ -+ hal_mpt_SwitchRfSetting(pAdapter); -+ -+ pHalData->bSwChnl = _TRUE; -+ pHalData->bSetChnlBW = _TRUE; -+ -+ if (bandwidth == 2) { -+ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_LOWER, HAL_PRIME_CHNL_OFFSET_UPPER); -+ } else if (bandwidth == 1) { -+ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0); -+ } else -+ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0); -+ -+ hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); -+ rtw_btcoex_wifionly_scan_notify(pAdapter); -+ -+} -+ -+/* -+ * Notice -+ * Switch bandwitdth may change center frequency(channel) -+ */ -+void hal_mpt_SetBandwidth(PADAPTER pAdapter) -+{ -+ struct mp_priv *pmp = &pAdapter->mppriv; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ u8 channel = pmp->channel; -+ u8 bandwidth = pmp->bandwidth; -+ -+ pHalData->bSwChnl = _TRUE; -+ pHalData->bSetChnlBW = _TRUE; -+ -+ if (bandwidth == 2) { -+ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_LOWER, HAL_PRIME_CHNL_OFFSET_UPPER); -+ } else if (bandwidth == 1) { -+ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0); -+ } else -+ rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0); -+ -+ hal_mpt_SwitchRfSetting(pAdapter); -+ rtw_btcoex_wifionly_scan_notify(pAdapter); -+ -+} -+ -+void mpt_SetTxPower_Old(PADAPTER pAdapter, MPT_TXPWR_DEF Rate, u8 *pTxPower) -+{ -+ switch (Rate) { -+ case MPT_CCK: { -+ u32 TxAGC = 0, pwr = 0; -+ -+ pwr = pTxPower[RF_PATH_A]; -+ if (pwr < 0x3f) { -+ TxAGC = (pwr << 16) | (pwr << 8) | (pwr); -+ phy_set_bb_reg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pTxPower[RF_PATH_A]); -+ phy_set_bb_reg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); -+ } -+ pwr = pTxPower[RF_PATH_B]; -+ if (pwr < 0x3f) { -+ TxAGC = (pwr << 16) | (pwr << 8) | (pwr); -+ phy_set_bb_reg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, pTxPower[RF_PATH_B]); -+ phy_set_bb_reg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, TxAGC); -+ } -+ } -+ break; -+ -+ case MPT_OFDM_AND_HT: { -+ u32 TxAGC = 0; -+ u8 pwr = 0; -+ -+ pwr = pTxPower[0]; -+ if (pwr < 0x3f) { -+ TxAGC |= ((pwr << 24) | (pwr << 16) | (pwr << 8) | pwr); -+ RTW_INFO("HT Tx-rf(A) Power = 0x%x\n", TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); -+ } -+ TxAGC = 0; -+ pwr = pTxPower[1]; -+ if (pwr < 0x3f) { -+ TxAGC |= ((pwr << 24) | (pwr << 16) | (pwr << 8) | pwr); -+ RTW_INFO("HT Tx-rf(B) Power = 0x%x\n", TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); -+ phy_set_bb_reg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); -+ } -+ } -+ break; -+ -+ default: -+ break; -+ } -+ RTW_INFO("<===mpt_SetTxPower_Old()\n"); -+} -+ -+void -+mpt_SetTxPower( -+ PADAPTER pAdapter, -+ MPT_TXPWR_DEF Rate, -+ u8 *pTxPower -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ u8 path = 0 , i = 0, MaxRate = MGN_6M; -+ u8 StartPath = RF_PATH_A, EndPath = RF_PATH_B; -+ u8 tx_nss = 2; -+ -+ if (IS_HARDWARE_TYPE_8814A(pAdapter) || IS_HARDWARE_TYPE_8814B(pAdapter)) { -+ EndPath = RF_PATH_D; -+ tx_nss = 4; -+ } else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter) -+ || IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) { -+ EndPath = RF_PATH_A; -+ tx_nss = 1; -+ } -+ -+ switch (Rate) { -+ case MPT_CCK: { -+ u8 rate[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; -+ -+ for (path = StartPath; path <= EndPath; path++) -+ for (i = 0; i < sizeof(rate); ++i) -+ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); -+ } -+ break; -+ case MPT_OFDM: { -+ u8 rate[] = { -+ MGN_6M, MGN_9M, MGN_12M, MGN_18M, -+ MGN_24M, MGN_36M, MGN_48M, MGN_54M, -+ }; -+ -+ for (path = StartPath; path <= EndPath; path++) -+ for (i = 0; i < sizeof(rate); ++i) -+ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); -+ } -+ break; -+ case MPT_HT: { -+ u8 rate[] = { -+ MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, -+ MGN_MCS5, MGN_MCS6, MGN_MCS7, MGN_MCS8, MGN_MCS9, -+ MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, -+ MGN_MCS15, MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, -+ MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23, MGN_MCS24, -+ MGN_MCS25, MGN_MCS26, MGN_MCS27, MGN_MCS28, MGN_MCS29, -+ MGN_MCS30, MGN_MCS31, -+ }; -+ if (tx_nss == 4) -+ MaxRate = MGN_MCS31; -+ else if (tx_nss == 3) -+ MaxRate = MGN_MCS23; -+ else if (tx_nss == 2) -+ MaxRate = MGN_MCS15; -+ else -+ MaxRate = MGN_MCS7; -+ -+ for (path = StartPath; path <= EndPath; path++) { -+ for (i = 0; i < sizeof(rate); ++i) { -+ if (rate[i] > MaxRate) -+ break; -+ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); -+ } -+ } -+ } -+ break; -+ case MPT_VHT: { -+ u8 rate[] = { -+ MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4, -+ MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9, -+ MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, -+ MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9, -+ MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4, -+ MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9, -+ MGN_VHT4SS_MCS0, MGN_VHT4SS_MCS1, MGN_VHT4SS_MCS2, MGN_VHT4SS_MCS3, MGN_VHT4SS_MCS4, -+ MGN_VHT4SS_MCS5, MGN_VHT4SS_MCS6, MGN_VHT4SS_MCS7, MGN_VHT4SS_MCS8, MGN_VHT4SS_MCS9, -+ }; -+ if (tx_nss == 4) -+ MaxRate = MGN_VHT4SS_MCS9; -+ else if (tx_nss == 3) -+ MaxRate = MGN_VHT3SS_MCS9; -+ else if (tx_nss == 2) -+ MaxRate = MGN_VHT2SS_MCS9; -+ else -+ MaxRate = MGN_VHT1SS_MCS9; -+ -+ for (path = StartPath; path <= EndPath; path++) { -+ for (i = 0; i < sizeof(rate); ++i) { -+ if (rate[i] > MaxRate) -+ break; -+ PHY_SetTxPowerIndex(pAdapter, pTxPower[path], path, rate[i]); -+ } -+ } -+ } -+ break; -+ default: -+ RTW_INFO("<===mpt_SetTxPower: Illegal channel!!\n"); -+ break; -+ } -+} -+ -+void hal_mpt_SetTxPower(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ -+ if (pHalData->rf_chip < RF_CHIP_MAX) { -+ if (IS_HARDWARE_TYPE_8188E(pAdapter) || -+ IS_HARDWARE_TYPE_8723B(pAdapter) || -+ IS_HARDWARE_TYPE_8192E(pAdapter) || -+ IS_HARDWARE_TYPE_8703B(pAdapter) || -+ IS_HARDWARE_TYPE_8188F(pAdapter) || -+ IS_HARDWARE_TYPE_8188GTV(pAdapter) -+ ) { -+ -+ RTW_INFO("===> MPT_ProSetTxPower: Old\n"); -+ -+ mpt_SetTxPower_Old(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel); -+ mpt_SetTxPower_Old(pAdapter, MPT_OFDM_AND_HT, pMptCtx->TxPwrLevel); -+ -+ } else { -+ -+ mpt_SetTxPower(pAdapter, MPT_CCK, pMptCtx->TxPwrLevel); -+ mpt_SetTxPower(pAdapter, MPT_OFDM, pMptCtx->TxPwrLevel); -+ mpt_SetTxPower(pAdapter, MPT_HT, pMptCtx->TxPwrLevel); -+ if(IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { -+ RTW_INFO("===> MPT_ProSetTxPower: Jaguar/Jaguar2\n"); -+ mpt_SetTxPower(pAdapter, MPT_VHT, pMptCtx->TxPwrLevel); -+ } -+ } -+ -+ rtw_hal_set_txpwr_done(pAdapter); -+ } else -+ RTW_INFO("RFChipID < RF_CHIP_MAX, the RF chip is not supported - %d\n", pHalData->rf_chip); -+ -+ odm_clear_txpowertracking_state(pDM_Odm); -+} -+ -+void hal_mpt_SetDataRate(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ u32 DataRate; -+ -+ DataRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); -+ -+ hal_mpt_SwitchRfSetting(pAdapter); -+ -+ hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); -+#ifdef CONFIG_RTL8723B -+ if (IS_HARDWARE_TYPE_8723B(pAdapter)) { -+ if (IS_CCK_RATE(DataRate)) { -+ if (pMptCtx->mpt_rf_path == RF_PATH_A) -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0x6); -+ else -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x71, 0xF, 0x6); -+ } else { -+ if (pMptCtx->mpt_rf_path == RF_PATH_A) -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0xE); -+ else -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x71, 0xF, 0xE); -+ } -+ } -+ -+ if ((IS_HARDWARE_TYPE_8723BS(pAdapter) && -+ ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)))) { -+ if (pMptCtx->mpt_rf_path == RF_PATH_A) -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0xE); -+ else -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x71, 0xF, 0xE); -+ } -+#endif -+} -+ -+#define RF_PATH_AB 22 -+ -+#ifdef CONFIG_RTL8814A -+void mpt_ToggleIG_8814A(PADAPTER pAdapter) -+{ -+ u8 Path; -+ u32 IGReg = rA_IGI_Jaguar, IGvalue = 0; -+ -+ for (Path = 0; Path <= RF_PATH_D; Path++) { -+ switch (Path) { -+ case RF_PATH_B: -+ IGReg = rB_IGI_Jaguar; -+ break; -+ case RF_PATH_C: -+ IGReg = rC_IGI_Jaguar2; -+ break; -+ case RF_PATH_D: -+ IGReg = rD_IGI_Jaguar2; -+ break; -+ default: -+ IGReg = rA_IGI_Jaguar; -+ break; -+ } -+ -+ IGvalue = phy_query_bb_reg(pAdapter, IGReg, bMaskByte0); -+ phy_set_bb_reg(pAdapter, IGReg, bMaskByte0, IGvalue + 2); -+ phy_set_bb_reg(pAdapter, IGReg, bMaskByte0, IGvalue); -+ } -+} -+ -+void mpt_SetRFPath_8814A(PADAPTER pAdapter) -+{ -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx; -+ R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ -+ R_ANTENNA_SELECT_CCK *p_cck_txrx; -+ u8 ForcedDataRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); -+ /*/PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo);*/ -+ /*/PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo);*/ -+ -+ u32 ulAntennaTx = pHalData->antenna_tx_path; -+ u32 ulAntennaRx = pHalData->AntennaRxPath; -+ u8 NssforRate = MgntQuery_NssTxRate(ForcedDataRate); -+ -+ if (NssforRate == RF_3TX) { -+ RTW_INFO("===> SetAntenna 3T Rate ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); -+ -+ switch (ulAntennaTx) { -+ case ANTENNA_BCD: -+ pMptCtx->mpt_rf_path = RF_PATH_BCD; -+ /*pHalData->ValidTxPath = 0x0e;*/ -+ phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x90e); /*/ 0x940[27:16]=12'b0010_0100_0111*/ -+ break; -+ -+ case ANTENNA_ABC: -+ default: -+ pMptCtx->mpt_rf_path = RF_PATH_ABC; -+ /*pHalData->ValidTxPath = 0x0d;*/ -+ phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x247); /*/ 0x940[27:16]=12'b0010_0100_0111*/ -+ break; -+ } -+ -+ } else { /*/if(NssforRate == RF_1TX)*/ -+ RTW_INFO("===> SetAntenna for 1T/2T Rate, ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); -+ switch (ulAntennaTx) { -+ case ANTENNA_BCD: -+ pMptCtx->mpt_rf_path = RF_PATH_BCD; -+ /*pHalData->ValidTxPath = 0x0e;*/ -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x7); -+ phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0x000f00000, 0xe); -+ phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0xe); -+ break; -+ -+ case ANTENNA_BC: -+ pMptCtx->mpt_rf_path = RF_PATH_BC; -+ /*pHalData->ValidTxPath = 0x06;*/ -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x6); -+ phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0x000f00000, 0x6); -+ phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x6); -+ break; -+ case ANTENNA_B: -+ pMptCtx->mpt_rf_path = RF_PATH_B; -+ /*pHalData->ValidTxPath = 0x02;*/ -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x4); /*/ 0xa07[7:4] = 4'b0100*/ -+ phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x002); /*/ 0x93C[31:20]=12'b0000_0000_0010*/ -+ phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x2); /* 0x80C[7:4] = 4'b0010*/ -+ break; -+ -+ case ANTENNA_C: -+ pMptCtx->mpt_rf_path = RF_PATH_C; -+ /*pHalData->ValidTxPath = 0x04;*/ -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x2); /*/ 0xa07[7:4] = 4'b0010*/ -+ phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x004); /*/ 0x93C[31:20]=12'b0000_0000_0100*/ -+ phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x4); /*/ 0x80C[7:4] = 4'b0100*/ -+ break; -+ -+ case ANTENNA_D: -+ pMptCtx->mpt_rf_path = RF_PATH_D; -+ /*pHalData->ValidTxPath = 0x08;*/ -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x1); /*/ 0xa07[7:4] = 4'b0001*/ -+ phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x008); /*/ 0x93C[31:20]=12'b0000_0000_1000*/ -+ phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x8); /*/ 0x80C[7:4] = 4'b1000*/ -+ break; -+ -+ case ANTENNA_A: -+ default: -+ pMptCtx->mpt_rf_path = RF_PATH_A; -+ /*pHalData->ValidTxPath = 0x01;*/ -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x8); /*/ 0xa07[7:4] = 4'b1000*/ -+ phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x001); /*/ 0x93C[31:20]=12'b0000_0000_0001*/ -+ phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x1); /*/ 0x80C[7:4] = 4'b0001*/ -+ break; -+ } -+ } -+ -+ switch (ulAntennaRx) { -+ case ANTENNA_A: -+ /*pHalData->ValidRxPath = 0x01;*/ -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x0); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ -+ /*/ CCA related PD_delay_th*/ -+ phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_B: -+ /*pHalData->ValidRxPath = 0x02;*/ -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x1); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ -+ /*/ CCA related PD_delay_th*/ -+ phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_C: -+ /*pHalData->ValidRxPath = 0x04;*/ -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x44); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x2); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ -+ /*/ CCA related PD_delay_th*/ -+ phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_D: -+ /*pHalData->ValidRxPath = 0x08;*/ -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x88); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x3); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ -+ /*/ CCA related PD_delay_th*/ -+ phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_BC: -+ /*pHalData->ValidRxPath = 0x06;*/ -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x66); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ -+ /*/ CCA related PD_delay_th*/ -+ phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_CD: -+ /*pHalData->ValidRxPath = 0x0C;*/ -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xcc); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0xB); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ -+ /*/ CCA related PD_delay_th*/ -+ phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); -+ break; -+ -+ case ANTENNA_BCD: -+ /*pHalData->ValidRxPath = 0x0e;*/ -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xee); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, Rx mode*/ -+ /*/ CCA related PD_delay_th*/ -+ phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); -+ break; -+ -+ case ANTENNA_ABCD: -+ /*pHalData->ValidRxPath = 0x0f;*/ -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xff); -+ phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x1); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ -+ /*/ CCA related PD_delay_th*/ -+ phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); -+ break; -+ -+ default: -+ break; -+ } -+ -+ PHY_Set_SecCCATH_by_RXANT_8814A(pAdapter, ulAntennaRx); -+ -+ mpt_ToggleIG_8814A(pAdapter); -+} -+ -+#endif /* CONFIG_RTL8814A */ -+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) \ -+ || defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) || defined(CONFIG_RTL8723F) -+void -+mpt_SetSingleTone_8814A( -+ PADAPTER pAdapter, -+ BOOLEAN bSingleTone, -+ BOOLEAN bEnPMacTx) -+{ -+ -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ u8 StartPath = RF_PATH_A, EndPath = RF_PATH_A, path; -+ static u32 regIG0 = 0, regIG1 = 0, regIG2 = 0, regIG3 = 0; -+ -+ if (bSingleTone) { -+ regIG0 = phy_query_bb_reg(pAdapter, rA_TxScale_Jaguar, bMaskDWord); /*/ 0xC1C[31:21]*/ -+ regIG1 = phy_query_bb_reg(pAdapter, rB_TxScale_Jaguar, bMaskDWord); /*/ 0xE1C[31:21]*/ -+ regIG2 = phy_query_bb_reg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord); /*/ 0x181C[31:21]*/ -+ regIG3 = phy_query_bb_reg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord); /*/ 0x1A1C[31:21]*/ -+ -+ switch (pMptCtx->mpt_rf_path) { -+ case RF_PATH_A: -+ case RF_PATH_B: -+ case RF_PATH_C: -+ case RF_PATH_D: -+ StartPath = pMptCtx->mpt_rf_path; -+ EndPath = pMptCtx->mpt_rf_path; -+ break; -+ case RF_PATH_AB: -+ EndPath = RF_PATH_B; -+ break; -+ case RF_PATH_BC: -+ StartPath = RF_PATH_B; -+ EndPath = RF_PATH_C; -+ break; -+ case RF_PATH_ABC: -+ EndPath = RF_PATH_C; -+ break; -+ case RF_PATH_BCD: -+ StartPath = RF_PATH_B; -+ EndPath = RF_PATH_D; -+ break; -+ case RF_PATH_ABCD: -+ EndPath = RF_PATH_D; -+ break; -+ } -+ -+ if (bEnPMacTx == FALSE) { -+ hal_mpt_SetContinuousTx(pAdapter, _TRUE); -+ issue_nulldata(pAdapter, NULL, 1, 3, 500); -+ } -+ -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); /*/ Disable CCA*/ -+ -+ for (path = StartPath; path <= EndPath; path++) { -+ phy_set_rf_reg(pAdapter, path, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ -+ phy_set_rf_reg(pAdapter, path, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ -+ -+ phy_set_rf_reg(pAdapter, path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ -+ } -+ -+ phy_set_bb_reg(pAdapter, rA_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xC1C[31:21]*/ -+ phy_set_bb_reg(pAdapter, rB_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xE1C[31:21]*/ -+ phy_set_bb_reg(pAdapter, rC_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x181C[31:21]*/ -+ phy_set_bb_reg(pAdapter, rD_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x1A1C[31:21]*/ -+ } else { -+ switch (pMptCtx->mpt_rf_path) { -+ case RF_PATH_A: -+ case RF_PATH_B: -+ case RF_PATH_C: -+ case RF_PATH_D: -+ StartPath = pMptCtx->mpt_rf_path; -+ EndPath = pMptCtx->mpt_rf_path; -+ break; -+ case RF_PATH_AB: -+ EndPath = RF_PATH_B; -+ break; -+ case RF_PATH_BC: -+ StartPath = RF_PATH_B; -+ EndPath = RF_PATH_C; -+ break; -+ case RF_PATH_ABC: -+ EndPath = RF_PATH_C; -+ break; -+ case RF_PATH_BCD: -+ StartPath = RF_PATH_B; -+ EndPath = RF_PATH_D; -+ break; -+ case RF_PATH_ABCD: -+ EndPath = RF_PATH_D; -+ break; -+ } -+ for (path = StartPath; path <= EndPath; path++) -+ phy_set_rf_reg(pAdapter, path, lna_low_gain_3, BIT1, 0x0); /* RF LO disabled */ -+ -+ phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); /* Enable CCA*/ -+ -+ if (bEnPMacTx == FALSE) { -+ if(IS_HARDWARE_TYPE_JAGUAR3(pAdapter)) { -+#ifdef PHYDM_MP_SUPPORT -+ phydm_stop_ofdm_cont_tx(pAdapter); -+ pMptCtx->bCckContTx = FALSE; -+ pMptCtx->bOfdmContTx = FALSE; -+#endif -+ } else -+ hal_mpt_SetContinuousTx(pAdapter, _FALSE); -+ } -+ -+ phy_set_bb_reg(pAdapter, rA_TxScale_Jaguar, bMaskDWord, regIG0); /* 0xC1C[31:21]*/ -+ phy_set_bb_reg(pAdapter, rB_TxScale_Jaguar, bMaskDWord, regIG1); /* 0xE1C[31:21]*/ -+ phy_set_bb_reg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord, regIG2); /* 0x181C[31:21]*/ -+ phy_set_bb_reg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord, regIG3); /* 0x1A1C[31:21]*/ -+ } -+} -+ -+#endif -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+void mpt_SetRFPath_8812A(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx; -+ struct mp_priv *pmp = &pAdapter->mppriv; -+ u8 channel = pmp->channel; -+ u8 bandwidth = pmp->bandwidth; -+ u8 eLNA_2g = pHalData->ExternalLNA_2G; -+ u32 ulAntennaTx, ulAntennaRx; -+ u32 reg0xC50 = 0; -+ -+ ulAntennaTx = pHalData->antenna_tx_path; -+ ulAntennaRx = pHalData->AntennaRxPath; -+ -+ switch (ulAntennaTx) { -+ case ANTENNA_A: -+ pMptCtx->mpt_rf_path = RF_PATH_A; -+ phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x1111); -+ if (pHalData->rfe_type == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) -+ phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); -+ break; -+ case ANTENNA_B: -+ pMptCtx->mpt_rf_path = RF_PATH_B; -+ phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x2222); -+ if (pHalData->rfe_type == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) -+ phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x1); -+ break; -+ case ANTENNA_AB: -+ pMptCtx->mpt_rf_path = RF_PATH_AB; -+ phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x3333); -+ if (pHalData->rfe_type == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) -+ phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); -+ break; -+ default: -+ pMptCtx->mpt_rf_path = RF_PATH_AB; -+ RTW_INFO("Unknown Tx antenna.\n"); -+ break; -+ } -+ -+ switch (ulAntennaRx) { -+ case ANTENNA_A: -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, BIT19 | BIT18 | BIT17 | BIT16, 0x3); -+ -+ /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ -+ reg0xC50 = phy_query_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0); -+ phy_set_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50 + 2); -+ phy_set_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50); -+ -+ /* set PWED_TH for BB Yn user guide R29 */ -+ if (IS_HARDWARE_TYPE_8812(pAdapter)) { -+ if (channel <= 14) { /* 2.4G */ -+ if (bandwidth == CHANNEL_WIDTH_20 -+ && eLNA_2g == 0) { -+ /* 0x830[3:1]=3'b010 */ -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x02); -+ } else -+ /* 0x830[3:1]=3'b100 */ -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); -+ } else -+ /* 0x830[3:1]=3'b100 for 5G */ -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); -+ } -+ break; -+ case ANTENNA_B: -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1);/*/ RF_A_0x0[19:16] = 1, Standby mode */ -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x1); -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, BIT19 | BIT18 | BIT17 | BIT16, 0x3); -+ -+ /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ -+ reg0xC50 = phy_query_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0); -+ phy_set_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50 + 2); -+ phy_set_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50); -+ -+ /* set PWED_TH for BB Yn user guide R29 */ -+ if (IS_HARDWARE_TYPE_8812(pAdapter)) { -+ if (channel <= 14) { -+ if (bandwidth == CHANNEL_WIDTH_20 -+ && eLNA_2g == 0) { -+ /* 0x830[3:1]=3'b010 */ -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x02); -+ } else -+ /* 0x830[3:1]=3'b100 */ -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); -+ } else -+ /* 0x830[3:1]=3'b100 for 5G */ -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); -+ } -+ break; -+ case ANTENNA_AB: -+ phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x33); -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, Rx mode*/ -+ phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); -+ /* set PWED_TH for BB Yn user guide R29 */ -+ phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); -+ break; -+ default: -+ RTW_INFO("Unknown Rx antenna.\n"); -+ break; -+ } -+ -+ if (pHalData->rfe_type == 5 || pHalData->rfe_type == 1) { -+ if (ulAntennaTx == ANTENNA_A || ulAntennaTx == ANTENNA_AB) { -+ /* WiFi */ -+ phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(1) | BIT(0), 0x2); -+ phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(9) | BIT(8), 0x3); -+ } else { -+ /* BT */ -+ phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(1) | BIT(0), 0x1); -+ phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(9) | BIT(8), 0x3); -+ } -+ } -+} -+#endif -+ -+#ifdef CONFIG_RTL8723B -+void mpt_SetRFPath_8723B(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u32 ulAntennaTx, ulAntennaRx; -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ struct dm_rf_calibration_struct *pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); -+ u8 i; -+ -+ ulAntennaTx = pHalData->antenna_tx_path; -+ ulAntennaRx = pHalData->AntennaRxPath; -+ -+ if (pHalData->rf_chip >= RF_CHIP_MAX) { -+ RTW_INFO("This RF chip ID is not supported\n"); -+ return; -+ } -+ -+ switch (pAdapter->mppriv.antenna_tx) { -+ case ANTENNA_A: { /*/ Actually path S1 (Wi-Fi)*/ -+ pMptCtx->mpt_rf_path = RF_PATH_A; -+ phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x0); -+ phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ -+ -+ for (i = 0; i < 3; ++i) { -+ u32 offset = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][0]; -+ u32 data = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][1]; -+ -+ if (offset != 0) { -+ phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); -+ RTW_INFO("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ for (i = 0; i < 2; ++i) { -+ u32 offset = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][0]; -+ u32 data = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][1]; -+ -+ if (offset != 0) { -+ phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); -+ RTW_INFO("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ } -+ break; -+ case ANTENNA_B: { /*/ Actually path S0 (BT)*/ -+ u32 offset; -+ u32 data; -+ -+ pMptCtx->mpt_rf_path = RF_PATH_B; -+ phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x5); -+ phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x1); /*/ AGC Table Sel.*/ -+ -+ for (i = 0; i < 3; ++i) { -+ /*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC to S1 instead of S0.*/ -+ offset = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][0]; -+ data = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_B][i][1]; -+ if (pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_B][i][0] != 0) { -+ phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); -+ RTW_INFO("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ /*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC to S1 instead of S0.*/ -+ for (i = 0; i < 2; ++i) { -+ offset = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][0]; -+ data = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_B][i][1]; -+ if (pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_B][i][0] != 0) { -+ phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); -+ RTW_INFO("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ } -+ break; -+ default: -+ pMptCtx->mpt_rf_path = RF_PATH_AB; -+ break; -+ } -+} -+#endif -+ -+#ifdef CONFIG_RTL8703B -+void mpt_SetRFPath_8703B(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u32 ulAntennaTx, ulAntennaRx; -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ struct dm_rf_calibration_struct *pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); -+ u8 i; -+ -+ ulAntennaTx = pHalData->antenna_tx_path; -+ ulAntennaRx = pHalData->AntennaRxPath; -+ -+ if (pHalData->rf_chip >= RF_CHIP_MAX) { -+ RTW_INFO("This RF chip ID is not supported\n"); -+ return; -+ } -+ -+ switch (pAdapter->mppriv.antenna_tx) { -+ case ANTENNA_A: { /* Actually path S1 (Wi-Fi) */ -+ pMptCtx->mpt_rf_path = RF_PATH_A; -+ phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x0); -+ phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ -+ -+ for (i = 0; i < 3; ++i) { -+ u32 offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; -+ u32 data = pRFCalibrateInfo->tx_iqc_8703b[i][1]; -+ -+ if (offset != 0) { -+ phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); -+ RTW_INFO("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ -+ } -+ for (i = 0; i < 2; ++i) { -+ u32 offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; -+ u32 data = pRFCalibrateInfo->rx_iqc_8703b[i][1]; -+ -+ if (offset != 0) { -+ phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); -+ RTW_INFO("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ } -+ break; -+ case ANTENNA_B: { /* Actually path S0 (BT)*/ -+ pMptCtx->mpt_rf_path = RF_PATH_B; -+ phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x5); -+ phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x1); /* AGC Table Sel */ -+ -+ for (i = 0; i < 3; ++i) { -+ u32 offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; -+ u32 data = pRFCalibrateInfo->tx_iqc_8703b[i][1]; -+ -+ if (pRFCalibrateInfo->tx_iqc_8703b[i][0] != 0) { -+ phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); -+ RTW_INFO("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ for (i = 0; i < 2; ++i) { -+ u32 offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; -+ u32 data = pRFCalibrateInfo->rx_iqc_8703b[i][1]; -+ -+ if (pRFCalibrateInfo->rx_iqc_8703b[i][0] != 0) { -+ phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); -+ RTW_INFO("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); -+ } -+ } -+ } -+ break; -+ default: -+ pMptCtx->mpt_rf_path = RF_PATH_AB; -+ break; -+ } -+ -+} -+#endif -+ -+#ifdef CONFIG_RTL8723D -+void mpt_SetRFPath_8723D(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u8 p = 0, i = 0; -+ u32 ulAntennaTx, ulAntennaRx, offset = 0, data = 0, val32 = 0; -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ struct dm_rf_calibration_struct *pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); -+ -+ ulAntennaTx = pHalData->antenna_tx_path; -+ ulAntennaRx = pHalData->AntennaRxPath; -+ -+ if (pHalData->rf_chip >= RF_CHIP_MAX) { -+ RTW_INFO("This RF chip ID is not supported\n"); -+ return; -+ } -+ -+ switch (pAdapter->mppriv.antenna_tx) { -+ /* Actually path S1 (Wi-Fi) */ -+ case ANTENNA_A: { -+ pMptCtx->mpt_rf_path = RF_PATH_A; -+ phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7|BIT6, 0); -+ } -+ break; -+ /* Actually path S0 (BT) */ -+ case ANTENNA_B: { -+ pMptCtx->mpt_rf_path = RF_PATH_B; -+ phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7|BIT6, 0xA); -+ -+ } -+ break; -+ default: -+ pMptCtx->mpt_rf_path = RF_PATH_AB; -+ break; -+ } -+} -+#endif -+ -+void mpt_SetRFPath_819X(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ u32 ulAntennaTx, ulAntennaRx; -+ R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ -+ R_ANTENNA_SELECT_CCK *p_cck_txrx; -+ u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; -+ u8 chgTx = 0, chgRx = 0; -+ u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; -+ -+ ulAntennaTx = pHalData->antenna_tx_path; -+ ulAntennaRx = pHalData->AntennaRxPath; -+ -+ p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val; -+ p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val; -+ -+ p_ofdm_tx->r_ant_ht1 = 0x1; -+ p_ofdm_tx->r_ant_ht2 = 0x2;/*Second TX RF path is A*/ -+ p_ofdm_tx->r_ant_non_ht = 0x3;/*/ 0x1+0x2=0x3 */ -+ -+ switch (ulAntennaTx) { -+ case ANTENNA_A: -+ p_ofdm_tx->r_tx_antenna = 0x1; -+ r_ofdm_tx_en_val = 0x1; -+ p_ofdm_tx->r_ant_l = 0x1; -+ p_ofdm_tx->r_ant_ht_s1 = 0x1; -+ p_ofdm_tx->r_ant_non_ht_s1 = 0x1; -+ p_cck_txrx->r_ccktx_enable = 0x8; -+ chgTx = 1; -+ /*/ From SD3 Willis suggestion !!! Set RF A=TX and B as standby*/ -+ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ -+ { -+ phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); -+ phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); -+ r_ofdm_tx_en_val = 0x3; -+ /*/ Power save*/ -+ /*/cosa r_ant_select_ofdm_val = 0x11111111;*/ -+ /*/ We need to close RFB by SW control*/ -+ if (pHalData->rf_type == RF_2T2R) { -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1); -+ phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); -+ } -+ } -+ pMptCtx->mpt_rf_path = RF_PATH_A; -+ break; -+ case ANTENNA_B: -+ p_ofdm_tx->r_tx_antenna = 0x2; -+ r_ofdm_tx_en_val = 0x2; -+ p_ofdm_tx->r_ant_l = 0x2; -+ p_ofdm_tx->r_ant_ht_s1 = 0x2; -+ p_ofdm_tx->r_ant_non_ht_s1 = 0x2; -+ p_cck_txrx->r_ccktx_enable = 0x4; -+ chgTx = 1; -+ /*/ From SD3 Willis suggestion !!! Set RF A as standby*/ -+ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ -+ { -+ phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); -+ phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); -+ -+ /*/ 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table.*/ -+ /*/ 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control*/ -+ if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) { -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1); -+ phy_set_bb_reg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); -+ /*/phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); -+ } -+ } -+ pMptCtx->mpt_rf_path = RF_PATH_B; -+ break; -+ case ANTENNA_AB:/*/ For 8192S*/ -+ p_ofdm_tx->r_tx_antenna = 0x3; -+ r_ofdm_tx_en_val = 0x3; -+ p_ofdm_tx->r_ant_l = 0x3; -+ p_ofdm_tx->r_ant_ht_s1 = 0x3; -+ p_ofdm_tx->r_ant_non_ht_s1 = 0x3; -+ p_cck_txrx->r_ccktx_enable = 0xC; -+ chgTx = 1; -+ /*/ From SD3Willis suggestion !!! Set RF B as standby*/ -+ /*/if (IS_HARDWARE_TYPE_8192S(pAdapter))*/ -+ { -+ phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); -+ phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); -+ /* Disable Power save*/ -+ /*cosa r_ant_select_ofdm_val = 0x3321333;*/ -+ /* 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control*/ -+ if (pHalData->rf_type == RF_2T2R) { -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); -+ -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); -+ /*/phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); -+ phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); -+ } -+ } -+ pMptCtx->mpt_rf_path = RF_PATH_AB; -+ break; -+ default: -+ break; -+ } -+#if 0 -+ /* r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D */ -+ /* r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D */ -+ /* r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */ -+#endif -+ switch (ulAntennaRx) { -+ case ANTENNA_A: -+ r_rx_antenna_ofdm = 0x1; /* A*/ -+ p_cck_txrx->r_cckrx_enable = 0x0; /* default: A*/ -+ p_cck_txrx->r_cckrx_enable_2 = 0x0; /* option: A*/ -+ chgRx = 1; -+ break; -+ case ANTENNA_B: -+ r_rx_antenna_ofdm = 0x2; /*/ B*/ -+ p_cck_txrx->r_cckrx_enable = 0x1; /*/ default: B*/ -+ p_cck_txrx->r_cckrx_enable_2 = 0x1; /*/ option: B*/ -+ chgRx = 1; -+ break; -+ case ANTENNA_AB:/*/ For 8192S and 8192E/U...*/ -+ r_rx_antenna_ofdm = 0x3;/*/ AB*/ -+ p_cck_txrx->r_cckrx_enable = 0x0;/*/ default:A*/ -+ p_cck_txrx->r_cckrx_enable_2 = 0x1;/*/ option:B*/ -+ chgRx = 1; -+ break; -+ default: -+ break; -+ } -+ -+ -+ if (chgTx && chgRx) { -+ switch (pHalData->rf_chip) { -+ case RF_8225: -+ case RF_8256: -+ case RF_6052: -+ /*/r_ant_sel_cck_val = r_ant_select_cck_val;*/ -+ phy_set_bb_reg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); /*/OFDM Tx*/ -+ phy_set_bb_reg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); /*/OFDM Tx*/ -+ phy_set_bb_reg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ -+ phy_set_bb_reg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ -+ if (IS_HARDWARE_TYPE_8192E(pAdapter)) { -+ phy_set_bb_reg(pAdapter, rOFDM0_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ -+ phy_set_bb_reg(pAdapter, rOFDM1_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ -+ } -+ phy_set_bb_reg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);/*/r_ant_sel_cck_val); /CCK TxRx*/ -+ break; -+ -+ default: -+ RTW_INFO("Unsupported RFChipID for switching antenna.\n"); -+ break; -+ } -+ } -+} /* MPT_ProSetRFPath */ -+ -+#ifdef CONFIG_RTL8192F -+ -+void mpt_set_rfpath_8192f(PADAPTER pAdapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ -+ u16 ForcedDataRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); -+ u8 NssforRate, odmNssforRate; -+ u32 ulAntennaTx, ulAntennaRx; -+ enum bb_path RxAntToPhyDm; -+ enum bb_path TxAntToPhyDm; -+ -+ ulAntennaTx = pHalData->antenna_tx_path; -+ ulAntennaRx = pHalData->AntennaRxPath; -+ NssforRate = MgntQuery_NssTxRate(ForcedDataRate); -+ -+ if (pHalData->rf_chip >= RF_TYPE_MAX) -+ RTW_INFO("This RF chip ID is not supported\n"); -+ -+ switch (ulAntennaTx) { -+ case ANTENNA_A: -+ pMptCtx->mpt_rf_path = RF_PATH_A; -+ TxAntToPhyDm = BB_PATH_A; -+ break; -+ case ANTENNA_B: -+ pMptCtx->mpt_rf_path = RF_PATH_B; -+ TxAntToPhyDm = BB_PATH_B; -+ break; -+ case ANTENNA_AB: -+ pMptCtx->mpt_rf_path = RF_PATH_AB; -+ TxAntToPhyDm = (BB_PATH_A|BB_PATH_B); -+ break; -+ default: -+ pMptCtx->mpt_rf_path = RF_PATH_AB; -+ TxAntToPhyDm = (BB_PATH_A|BB_PATH_B); -+ break; -+ } -+ -+ switch (ulAntennaRx) { -+ case ANTENNA_A: -+ RxAntToPhyDm = BB_PATH_A; -+ break; -+ case ANTENNA_B: -+ RxAntToPhyDm = BB_PATH_B; -+ break; -+ case ANTENNA_AB: -+ RxAntToPhyDm = (BB_PATH_A|BB_PATH_B); -+ break; -+ default: -+ RxAntToPhyDm = (BB_PATH_A|BB_PATH_B); -+ break; -+ } -+ -+ phydm_api_trx_mode(GET_PDM_ODM(pAdapter), TxAntToPhyDm, RxAntToPhyDm, TxAntToPhyDm); -+ -+} -+ -+#endif -+ -+void hal_mpt_SetAntenna(PADAPTER pAdapter) -+{ -+ PHAL_DATA_TYPE hal; -+ ANTENNA_PATH anttx; -+ enum bb_path bb_tx = 0; -+ -+ -+ hal = GET_HAL_DATA(pAdapter); -+ anttx = hal->antenna_tx_path; -+ -+ switch (anttx) { -+ case ANTENNA_A: -+ bb_tx = BB_PATH_A; -+ break; -+ case ANTENNA_B: -+ bb_tx = BB_PATH_B; -+ break; -+ case ANTENNA_C: -+ bb_tx = BB_PATH_C; -+ break; -+ case ANTENNA_D: -+ bb_tx = BB_PATH_D; -+ break; -+ case ANTENNA_AB: -+ bb_tx = BB_PATH_AB; -+ break; -+ case ANTENNA_AC: -+ bb_tx = BB_PATH_AC; -+ break; -+ case ANTENNA_AD: -+ bb_tx = BB_PATH_AD; -+ break; -+ case ANTENNA_BC: -+ bb_tx = BB_PATH_BC; -+ break; -+ case ANTENNA_BD: -+ bb_tx = BB_PATH_BD; -+ break; -+ case ANTENNA_CD: -+ bb_tx = BB_PATH_CD; -+ break; -+ case ANTENNA_ABC: -+ bb_tx = BB_PATH_ABC; -+ break; -+ case ANTENNA_BCD: -+ bb_tx = BB_PATH_BCD; -+ break; -+ case ANTENNA_ABD: -+ bb_tx = BB_PATH_ABD; -+ break; -+ case ANTENNA_ACD: -+ bb_tx = BB_PATH_ACD; -+ break; -+ case ANTENNA_ABCD: -+ bb_tx = BB_PATH_ABCD; -+ break; -+ default: -+ bb_tx = BB_PATH_A; -+ break; -+ } -+ tx_path_nss_set_full_tx(hal->txpath_nss, hal->txpath_num_nss, bb_tx); -+ RTW_INFO("%s ,ant idx %d, tx path_num_nss = %d\n", __func__, anttx, hal->txpath_num_nss[0]); -+ -+#ifdef CONFIG_RTL8822C -+ if (IS_HARDWARE_TYPE_8822C(pAdapter)) { -+ rtl8822c_mp_config_rfpath(pAdapter); -+ return; -+ } -+#endif -+#ifdef CONFIG_RTL8814A -+ if (IS_HARDWARE_TYPE_8814A(pAdapter)) { -+ mpt_SetRFPath_8814A(pAdapter); -+ return; -+ } -+#endif -+#ifdef CONFIG_RTL8822B -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) { -+ rtl8822b_mp_config_rfpath(pAdapter); -+ return; -+ } -+#endif -+#ifdef CONFIG_RTL8821C -+ if (IS_HARDWARE_TYPE_8821C(pAdapter)) { -+ rtl8821c_mp_config_rfpath(pAdapter); -+ return; -+ } -+#endif -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { -+ mpt_SetRFPath_8812A(pAdapter); -+ return; -+ } -+#endif -+#ifdef CONFIG_RTL8723B -+ if (IS_HARDWARE_TYPE_8723B(pAdapter)) { -+ mpt_SetRFPath_8723B(pAdapter); -+ return; -+ } -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ if (IS_HARDWARE_TYPE_8703B(pAdapter)) { -+ mpt_SetRFPath_8703B(pAdapter); -+ return; -+ } -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ if (IS_HARDWARE_TYPE_8723D(pAdapter)) { -+ mpt_SetRFPath_8723D(pAdapter); -+ return; -+ } -+#endif -+ -+#ifdef CONFIG_RTL8192F -+ if (IS_HARDWARE_TYPE_8192F(pAdapter)) { -+ mpt_set_rfpath_8192f(pAdapter); -+ return; -+ } -+#endif -+ -+#ifdef CONFIG_RTL8814B -+ if (IS_HARDWARE_TYPE_8814B(pAdapter)) { -+ rtl8814b_mp_config_rfpath(pAdapter); -+ return; -+ } -+#endif -+ -+ /* else if (IS_HARDWARE_TYPE_8821B(pAdapter)) -+ mpt_SetRFPath_8821B(pAdapter); -+ Prepare for 8822B -+ else if (IS_HARDWARE_TYPE_8822B(Context)) -+ mpt_SetRFPath_8822B(Context); -+ */ -+ mpt_SetRFPath_819X(pAdapter); -+ RTW_INFO("mpt_SetRFPath_819X Do %s\n", __func__); -+} -+ -+s32 hal_mpt_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ if (!netif_running(pAdapter->pnetdev)) { -+ return _FAIL; -+ } -+ -+ -+ if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { -+ return _FAIL; -+ } -+ -+ target_ther &= 0xff; -+ -+ pHalData->eeprom_thermal_meter = target_ther; -+ -+ return _SUCCESS; -+} -+ -+ -+void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter) -+{ -+ if (IS_HARDWARE_TYPE_JAGUAR3(pAdapter)) { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x1); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x0); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x1); -+ } else -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT17 | BIT16, 0x03); -+ -+} -+ -+ -+u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter, u8 rf_path) -+ -+{ -+ struct dm_struct *p_dm_odm = adapter_to_phydm(pAdapter); -+ -+ u32 ThermalValue = 0; -+ s32 thermal_value_temp = 0; -+ s8 thermal_offset = 0; -+ u32 thermal_reg_mask = 0; -+ -+ if (IS_8822C_SERIES(GET_HAL_DATA(pAdapter)->version_id)) -+ thermal_reg_mask = 0x007e; /*0x42: RF Reg[6:1], 35332(themal K & bias k & power trim) & 35325(tssi )*/ -+ else -+ thermal_reg_mask = 0xfc00; /*0x42: RF Reg[15:10]*/ -+ -+ ThermalValue = (u8)phy_query_rf_reg(pAdapter, rf_path, 0x42, thermal_reg_mask); -+ -+ thermal_offset = phydm_get_thermal_offset(p_dm_odm); -+ -+ thermal_value_temp = ThermalValue + thermal_offset; -+ -+ if (thermal_value_temp > 63) -+ ThermalValue = 63; -+ else if (thermal_value_temp < 0) -+ ThermalValue = 0; -+ else -+ ThermalValue = thermal_value_temp; -+ -+ return (u8)ThermalValue; -+} -+ -+ -+void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 rfpath, u8 *value) -+{ -+#if 0 -+ fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); -+ rtw_msleep_os(1000); -+ fw_cmd_data(pAdapter, value, 1); -+ *value &= 0xFF; -+#else -+ hal_mpt_TriggerRFThermalMeter(pAdapter); -+ rtw_msleep_os(1000); -+ *value = hal_mpt_ReadRFThermalMeter(pAdapter, rfpath); -+#endif -+ -+} -+ -+ -+void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ pAdapter->mppriv.mpt_ctx.bSingleCarrier = bStart; -+ -+ if (bStart) {/*/ Start Single Carrier.*/ -+ /*/ Start Single Carrier.*/ -+ /*/ 1. if OFDM block on?*/ -+ if (!phy_query_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1); /*set OFDM block on*/ -+ -+ /*/ 2. set CCK test mode off, set to CCK normal mode*/ -+ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0); -+ -+ /*/ 3. turn on scramble setting*/ -+ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 1); -+ -+ /*/ 4. Turn On Continue Tx and turn off the other test modes.*/ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) -+ phy_set_bb_reg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18 | BIT17 | BIT16, OFDM_SingleCarrier); -+ else -+#endif /* CONFIG_RTL8812A || CONFIG_RTL8821A || CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */ -+ phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_SingleCarrier); -+ -+ } else { -+ /*/ Stop Single Carrier.*/ -+ /*/ Stop Single Carrier.*/ -+ /*/ Turn off all test modes.*/ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) -+ if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) -+ phy_set_bb_reg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); -+ else -+#endif /* CONFIG_RTL8812A || CONFIG_RTL8821A || CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */ -+ phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ALL_OFF); -+ -+ rtw_msleep_os(10); -+ /*/BB Reset*/ -+ phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); -+ phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); -+ } -+} -+ -+ -+void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ u32 ulAntennaTx = pHalData->antenna_tx_path; -+ static u32 regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0; -+ u8 rfPath; -+ -+ if (IS_HARDWARE_TYPE_JAGUAR3(pAdapter)) { -+#ifdef PHYDM_MP_SUPPORT -+#ifdef CONFIG_RTL8814B -+ if(pHalData->current_channel_bw == CHANNEL_WIDTH_80_80) -+ { -+ /* @Tx mode: RF0x00[19:16]=4'b0010 */ -+ config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN0, RF_0x0, 0xF0000, 0x2); -+ /* @Lowest RF gain index: RF_0x0[4:0] = 0*/ -+ config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN0, RF_0x0, 0x1F, 0x0); -+ /* @RF LO enabled */ -+ config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN0, RF_0x58, BIT(1), 0x1); -+ /* @SYN1 */ -+ config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN1, RF_0x0, 0xF0000, 0x2); -+ config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN1, RF_0x0, 0x1F, 0x0); -+ config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN1, RF_0x58, BIT(1), 0x1); -+ } -+#endif -+ phydm_mp_set_single_tone(pDM_Odm, bStart, pMptCtx->mpt_rf_path); -+#endif -+ return; -+ } -+ -+ switch (ulAntennaTx) { -+ case ANTENNA_B: -+ rfPath = RF_PATH_B; -+ break; -+ case ANTENNA_C: -+ rfPath = RF_PATH_C; -+ break; -+ case ANTENNA_D: -+ rfPath = RF_PATH_D; -+ break; -+ case ANTENNA_A: -+ default: -+ rfPath = RF_PATH_A; -+ break; -+ } -+ -+ pAdapter->mppriv.mpt_ctx.is_single_tone = bStart; -+ if (bStart) { -+ /*/ Start Single Tone.*/ -+ /*/ <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu)*/ -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) { -+ regRF = phy_query_rf_reg(pAdapter, rfPath, lna_low_gain_3, bRFRegOffsetMask); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); -+ } else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { /*/ USB need to do RF LO disable first, PCIE isn't required to follow this order.*/ -+ /*/Set MAC REG 88C: Prevent SingleTone Fail*/ -+ phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0xF); -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO disabled*/ -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ -+ } else if (IS_HARDWARE_TYPE_8192F(pAdapter)) { /* USB need to do RF LO disable first, PCIE isn't required to follow this order.*/ -+ #ifdef CONFIG_RTL8192F -+ phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x1); -+ phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x1); -+ phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x1); -+ phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x1); -+ phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x1); -+ phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x1); -+ phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0xF); -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x1); /* RF LO disabled*/ -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /* Tx mode*/ -+#endif -+ } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { -+ if (pMptCtx->mpt_rf_path == RF_PATH_A) { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x56, 0xF, 0x1); /*/ RF LO enabled*/ -+ } else { -+ /*/ S0/S1 both use PATH A to configure*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x76, 0xF, 0x1); /*/ RF LO enabled*/ -+ } -+ } else if (IS_HARDWARE_TYPE_8703B(pAdapter)) { -+ if (pMptCtx->mpt_rf_path == RF_PATH_A) { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /* Tx mode */ -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x1); /* RF LO enabled */ -+ } -+ } else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) { -+ /*Set BB REG 88C: Prevent SingleTone Fail*/ -+ phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xF); -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); -+ -+ } else if (IS_HARDWARE_TYPE_8723D(pAdapter)) { -+ if (pMptCtx->mpt_rf_path == RF_PATH_A) { -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x0); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, BIT0, 0x1); -+ } else {/* S0/S1 both use PATH A to configure */ -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x0); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x63, BIT0, 0x1); -+ } -+ } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8822B(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) { -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) -+ u8 p = RF_PATH_A; -+ -+ regRF = phy_query_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, bRFRegOffsetMask); -+ regBB0 = phy_query_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord); -+ regBB1 = phy_query_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord); -+ regBB2 = phy_query_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, bMaskDWord); -+ regBB3 = phy_query_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, bMaskDWord); -+ -+ phy_set_bb_reg(pAdapter, rOFDMCCKEN_Jaguar, BIT29 | BIT28, 0x0); /*/ Disable CCK and OFDM*/ -+ -+ if (pMptCtx->mpt_rf_path == RF_PATH_AB) { -+ for (p = RF_PATH_A; p <= RF_PATH_B; ++p) { -+ phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ -+ phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ -+ phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ -+ } -+ } else { -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ -+#ifdef CONFIG_RTL8821C -+ if (IS_HARDWARE_TYPE_8821C(pAdapter) && pDM_Odm->current_rf_set_8821c == SWITCH_TO_BTG) -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x75, BIT16, 0x1); /* RF LO (for BTG) enabled */ -+ else -+#endif -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ -+ } -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) { -+ phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); /* 0xCB0=0x77777777*/ -+ phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); /* 0xEB0=0x77777777*/ -+ phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, bMaskLWord, 0x7777); /* 0xCB4[15:0] = 0x7777*/ -+ phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, bMaskLWord, 0x7777); /* 0xEB4[15:0] = 0x7777*/ -+ phy_set_bb_reg(pAdapter, rA_RFE_Inverse_Jaguar, 0xFFF, 0xb); /* 0xCBC[23:16] = 0x12*/ -+ phy_set_bb_reg(pAdapter, rB_RFE_Inverse_Jaguar, 0xFFF, 0x830); /* 0xEBC[23:16] = 0x12*/ -+ } else if (IS_HARDWARE_TYPE_8821C(pAdapter)) { -+ phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xF0F0, 0x707); /* 0xCB0[[15:12, 7:4] = 0x707*/ -+ -+ if (pHalData->external_pa_5g) -+ { -+ phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xA00000, 0x1); /* 0xCB4[23, 21] = 0x1*/ -+ } -+ else if (pHalData->ExternalPA_2G) -+ { -+ phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xA00000, 0x1); /* 0xCB4[23, 21] = 0x1*/ -+ } -+ } else { -+ phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x77007*/ -+ phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x77007*/ -+ -+ if (pHalData->external_pa_5g) { -+ phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xCB4[23:16] = 0x12*/ -+ phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xEB4[23:16] = 0x12*/ -+ } else if (pHalData->ExternalPA_2G) { -+ phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xCB4[23:16] = 0x11*/ -+ phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xEB4[23:16] = 0x11*/ -+ } -+ } -+#endif -+ } -+#if defined(CONFIG_RTL8814A) -+ else if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ mpt_SetSingleTone_8814A(pAdapter, TRUE, FALSE); -+#endif -+ else /*/ Turn On SingleTone and turn off the other test modes.*/ -+ phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_SingleTone); -+ -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); -+ -+ } else {/*/ Stop Single Ton e.*/ -+ -+ if (IS_HARDWARE_TYPE_8188E(pAdapter)) { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, lna_low_gain_3, bRFRegOffsetMask, regRF); -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); -+ } else if (IS_HARDWARE_TYPE_8192E(pAdapter)) { -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3);/*/ Tx mode*/ -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0);/*/ RF LO disabled */ -+ /*/ RESTORE MAC REG 88C: Enable RF Functions*/ -+ phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0x0); -+ } else if (IS_HARDWARE_TYPE_8192F(pAdapter)){ -+#ifdef CONFIG_RTL8192F -+ phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x0); -+ phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x0); -+ phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x0); -+ phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x0); -+ phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x0); -+ phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x0); -+ phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0x0); -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x0); /* RF LO disabled*/ -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /* Rx mode*/ -+#endif -+ } else if (IS_HARDWARE_TYPE_8723B(pAdapter)) { -+ if (pMptCtx->mpt_rf_path == RF_PATH_A) { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x56, 0xF, 0x0); /*/ RF LO disabled*/ -+ } else { -+ /*/ S0/S1 both use PATH A to configure*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x76, 0xF, 0x0); /*/ RF LO disabled*/ -+ } -+ } else if (IS_HARDWARE_TYPE_8703B(pAdapter)) { -+ if (pMptCtx->mpt_rf_path == RF_PATH_A) { -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /* Rx mode */ -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x0); /* RF LO disabled */ -+ } -+ } else if (IS_HARDWARE_TYPE_8188F(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) { -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /*Tx mode*/ -+ phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0); /*RF LO disabled*/ -+ /*Set BB REG 88C: Prevent SingleTone Fail*/ -+ phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xc); -+ } else if (IS_HARDWARE_TYPE_8723D(pAdapter)) { -+ if (pMptCtx->mpt_rf_path == RF_PATH_A) { -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x3); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x1); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, BIT0, 0x0); -+ } else { /* S0/S1 both use PATH A to configure */ -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x3); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x1); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, 0x63, BIT0, 0x0); -+ } -+ } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8822B(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) { -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) -+ u8 p = RF_PATH_A; -+ -+ phy_set_bb_reg(pAdapter, rOFDMCCKEN_Jaguar, BIT29 | BIT28, 0x3); /*/ Disable CCK and OFDM*/ -+ -+ if (pMptCtx->mpt_rf_path == RF_PATH_AB) { -+ for (p = RF_PATH_A; p <= RF_PATH_B; ++p) { -+ phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF); -+ phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x0); /*/ RF LO disabled*/ -+ } -+ } else { -+ p = pMptCtx->mpt_rf_path; -+ phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF); -+ -+ if (IS_HARDWARE_TYPE_8821C(pAdapter)) -+ phy_set_rf_reg(pAdapter, p, 0x75, BIT16, 0x0); /* RF LO (for BTG) disabled */ -+ -+ phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x0); /*/ RF LO disabled*/ -+ } -+ -+ phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, regBB0); -+ phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, regBB1); -+ phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, bMaskDWord, regBB2); -+ phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, bMaskDWord, regBB3); -+ -+ if (IS_HARDWARE_TYPE_8822B(pAdapter)) { -+ RTW_INFO("Restore RFE control Pin cbc\n"); -+ phy_set_bb_reg(pAdapter, rA_RFE_Inverse_Jaguar, 0xfff, 0x0); -+ phy_set_bb_reg(pAdapter, rB_RFE_Inverse_Jaguar, 0xfff, 0x0); -+ } -+#endif -+ } -+#if defined(CONFIG_RTL8814A) -+ else if (IS_HARDWARE_TYPE_8814A(pAdapter)) -+ mpt_SetSingleTone_8814A(pAdapter, FALSE, FALSE); -+ -+ else/*/ Turn off all test modes.*/ -+ phy_set_bb_reg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); -+#endif -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); -+ -+ } -+} -+ -+void hal_mpt_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ struct dm_struct *pdm_odm = &pHalData->odmpriv; -+ u8 Rate; -+ -+ pAdapter->mppriv.mpt_ctx.is_carrier_suppression = bStart; -+ -+ if (IS_HARDWARE_TYPE_JAGUAR3(pAdapter)) { -+#ifdef PHYDM_MP_SUPPORT -+ phydm_mp_set_carrier_supp(pdm_odm, bStart, pAdapter->mppriv.rateidx); -+#endif -+ return; -+ } -+ -+ Rate = HwRateToMPTRate(pAdapter->mppriv.rateidx); -+ if (bStart) {/* Start Carrier Suppression.*/ -+ if (Rate <= MPT_RATE_11M) { -+ /*/ 1. if CCK block on?*/ -+ if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) -+ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/*set CCK block on*/ -+ -+ /*/Turn Off All Test Mode*/ -+ if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) -+ phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); /* rSingleTone_ContTx_Jaguar*/ -+ else -+ phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ALL_OFF); -+ -+ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*/transmit mode*/ -+ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); /*/turn off scramble setting*/ -+ -+ /*/Set CCK Tx Test Rate*/ -+ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); /*/Set FTxRate to 1Mbps*/ -+ } -+ -+ /*Set for dynamic set Power index*/ -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); -+ -+ } else {/* Stop Carrier Suppression.*/ -+ -+ if (Rate <= MPT_RATE_11M) { -+ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ -+ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ -+ -+ /*BB Reset*/ -+ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); -+ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); -+ } -+ /*Stop for dynamic set Power index*/ -+ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); -+ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); -+ } -+ RTW_INFO("\n MPT_ProSetCarrierSupp() is finished.\n"); -+} -+ -+u32 hal_mpt_query_phytxok(PADAPTER pAdapter) -+{ -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ RT_PMAC_TX_INFO PMacTxInfo = pMptCtx->PMacTxInfo; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u16 count = 0; -+ -+#ifdef PHYDM_MP_SUPPORT -+ struct dm_struct *dm = (struct dm_struct *)&pHalData->odmpriv; -+ struct phydm_mp *mp = &dm->dm_mp_table; -+ -+ if (IS_HARDWARE_TYPE_JAGUAR3(pAdapter)) { -+ phydm_mp_get_tx_ok(&pHalData->odmpriv, pAdapter->mppriv.rateidx); -+ count = mp->tx_phy_ok_cnt; -+ -+ } else -+#endif -+ { -+ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) -+ count = phy_query_bb_reg(pAdapter, 0xF50, bMaskLWord); /* [15:0]*/ -+ else -+ count = phy_query_bb_reg(pAdapter, 0xF50, bMaskHWord); /* [31:16]*/ -+ } -+ -+ if (count > 50000) { -+ rtw_reset_phy_trx_ok_counters(pAdapter); -+ pAdapter->mppriv.tx.sended += count; -+ count = 0; -+ } -+ -+ return pAdapter->mppriv.tx.sended + count; -+ -+} -+ -+static void mpt_StopCckContTx( -+ PADAPTER pAdapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ u8 u1bReg; -+ -+ pMptCtx->bCckContTx = FALSE; -+ pMptCtx->bOfdmContTx = FALSE; -+ -+ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ -+ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { -+ phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 2b00*/ -+ phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ -+ -+ phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 0); -+ phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, BIT14, 0); -+ phy_set_bb_reg(pAdapter, 0x0B34, BIT14, 0); -+ } -+ -+ /*BB Reset*/ -+ phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); -+ phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { -+ phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); -+ phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); -+ } -+ -+ if (IS_HARDWARE_TYPE_8188E(pAdapter) || IS_HARDWARE_TYPE_8723B(pAdapter) || -+ IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter) || -+ IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8192F(pAdapter) || -+ IS_HARDWARE_TYPE_8821C(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) { -+ phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bDisable);/* patch Count CCK adjust Rate*/ -+ } -+ -+} /* mpt_StopCckContTx */ -+ -+ -+static void mpt_StopOfdmContTx( -+ PADAPTER pAdapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ u8 u1bReg; -+ u32 data; -+ -+ pMptCtx->bCckContTx = FALSE; -+ pMptCtx->bOfdmContTx = FALSE; -+ -+ if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) -+ phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); -+ else -+ phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ALL_OFF); -+ -+ rtw_mdelay_os(10); -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)){ -+ phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 0*/ -+ phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ -+ } -+ -+ /*BB Reset*/ -+ phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); -+ phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { -+ phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); -+ phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); -+ } -+} /* mpt_StopOfdmContTx */ -+ -+ -+static void mpt_StartCckContTx( -+ PADAPTER pAdapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ u32 cckrate; -+ -+ /* 1. if CCK block on */ -+ if (!phy_query_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn)) -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, 1);/*set CCK block on*/ -+ -+ /*Turn Off All Test Mode*/ -+ if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) -+ phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); -+ else -+ phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ALL_OFF); -+ -+ cckrate = pAdapter->mppriv.rateidx; -+ -+ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); -+ -+ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*transmit mode*/ -+ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { -+ phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 11 force cck rxiq = 0*/ -+ phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1 force ofdm rxiq = ofdm txiq*/ -+ phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 1); -+ phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, BIT14, 1); -+ phy_set_bb_reg(pAdapter, 0x0B34, BIT14, 1); -+ } -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { -+ phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); -+ phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); -+ } -+ -+ if (IS_HARDWARE_TYPE_8188E(pAdapter) || IS_HARDWARE_TYPE_8723B(pAdapter) || -+ IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter) || -+ IS_HARDWARE_TYPE_8723D(pAdapter) || IS_HARDWARE_TYPE_8192F(pAdapter) || -+ IS_HARDWARE_TYPE_8821C(pAdapter) || IS_HARDWARE_TYPE_8188GTV(pAdapter)) { -+ if (pAdapter->mppriv.rateidx == MPT_RATE_1M) /* patch Count CCK adjust Rate*/ -+ phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bDisable); -+ else -+ phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bEnable); -+ } -+ -+ pMptCtx->bCckContTx = TRUE; -+ pMptCtx->bOfdmContTx = FALSE; -+ -+} /* mpt_StartCckContTx */ -+ -+ -+static void mpt_StartOfdmContTx( -+ PADAPTER pAdapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); -+ -+ /* 1. if OFDM block on?*/ -+ if (!phy_query_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) -+ phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 1);/*set OFDM block on*/ -+ -+ /* 2. set CCK test mode off, set to CCK normal mode*/ -+ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0); -+ -+ /* 3. turn on scramble setting*/ -+ phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 1); -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { -+ phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 2b'11*/ -+ phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1*/ -+ } -+ -+ /* 4. Turn On Continue Tx and turn off the other test modes.*/ -+ if (IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) -+ phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ContinuousTx); -+ else -+ phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ContinuousTx); -+ -+ if (!IS_HARDWARE_TYPE_JAGUAR_ALL(pAdapter)) { -+ phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); -+ phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); -+ } -+ -+ pMptCtx->bCckContTx = FALSE; -+ pMptCtx->bOfdmContTx = TRUE; -+} /* mpt_StartOfdmContTx */ -+ -+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) \ -+ || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) \ -+ || defined(CONFIG_RTL8723F) -+#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT -+static void mpt_convert_phydm_txinfo_for_jaguar3( -+ RT_PMAC_TX_INFO *pMacTxInfo, struct phydm_pmac_info *phydmtxinfo) -+{ -+ phydmtxinfo->en_pmac_tx = pMacTxInfo->bEnPMacTx; -+ phydmtxinfo->mode = pMacTxInfo->Mode; -+ phydmtxinfo->tx_rate = MRateToHwRate(mpt_to_mgnt_rate(pMacTxInfo->TX_RATE)); -+ phydmtxinfo->tx_sc = pMacTxInfo->TX_SC; -+ phydmtxinfo->is_short_preamble = pMacTxInfo->bSPreamble; -+ phydmtxinfo->ndp_sound = pMacTxInfo->NDP_sound; -+ phydmtxinfo->bw = pMacTxInfo->BandWidth; -+ phydmtxinfo->m_stbc = pMacTxInfo->m_STBC; -+ phydmtxinfo->packet_period = pMacTxInfo->PacketPeriod; -+ phydmtxinfo->packet_count = pMacTxInfo->PacketCount; -+ phydmtxinfo->packet_pattern = pMacTxInfo->PacketPattern; -+ phydmtxinfo->sfd = pMacTxInfo->SFD; -+ phydmtxinfo->signal_field = pMacTxInfo->SignalField; -+ phydmtxinfo->service_field = pMacTxInfo->ServiceField; -+ phydmtxinfo->length = pMacTxInfo->LENGTH; -+ _rtw_memcpy(&phydmtxinfo->crc16,pMacTxInfo->CRC16, 2); -+ _rtw_memcpy(&phydmtxinfo->lsig , pMacTxInfo->LSIG,3); -+ _rtw_memcpy(&phydmtxinfo->ht_sig , pMacTxInfo->HT_SIG,6); -+ _rtw_memcpy(&phydmtxinfo->vht_sig_a , pMacTxInfo->VHT_SIG_A,6); -+ _rtw_memcpy(&phydmtxinfo->vht_sig_b , pMacTxInfo->VHT_SIG_B,4); -+ phydmtxinfo->vht_sig_b_crc = pMacTxInfo->VHT_SIG_B_CRC; -+ _rtw_memcpy(&phydmtxinfo->vht_delimiter,pMacTxInfo->VHT_Delimiter,4); -+} -+#endif -+ -+/* for HW TX mode */ -+u8 mpt_ProSetPMacTx(PADAPTER Adapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); -+ struct mp_priv *pmppriv = &Adapter->mppriv; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); -+ RT_PMAC_TX_INFO PMacTxInfo = pMptCtx->PMacTxInfo; -+ struct dm_struct *p_dm_odm; -+ u32 u4bTmp; -+ u8 status = _TRUE; -+ -+ p_dm_odm = &pHalData->odmpriv; -+ -+#if 0 -+ PRINT_DATA("LSIG ", PMacTxInfo.LSIG, 3); -+ PRINT_DATA("HT_SIG", PMacTxInfo.HT_SIG, 6); -+ PRINT_DATA("VHT_SIG_A", PMacTxInfo.VHT_SIG_A, 6); -+ PRINT_DATA("VHT_SIG_B", PMacTxInfo.VHT_SIG_B, 4); -+ dbg_print("VHT_SIG_B_CRC %x\n", PMacTxInfo.VHT_SIG_B_CRC); -+ PRINT_DATA("VHT_Delimiter", PMacTxInfo.VHT_Delimiter, 4); -+ -+ PRINT_DATA("Src Address", Adapter->mac_addr, ETH_ALEN); -+ PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, ETH_ALEN); -+#endif -+ if (pmppriv->pktInterval != 0) -+ PMacTxInfo.PacketPeriod = pmppriv->pktInterval; -+ -+ if (pmppriv->tx.count != 0) -+ PMacTxInfo.PacketCount = pmppriv->tx.count; -+ -+ RTW_INFO("SGI %d bSPreamble %d bSTBC %d bLDPC %d NDP_sound %d\n", PMacTxInfo.bSGI, PMacTxInfo.bSPreamble, PMacTxInfo.bSTBC, PMacTxInfo.bLDPC, PMacTxInfo.NDP_sound); -+ RTW_INFO("TXSC %d BandWidth %d PacketPeriod %d PacketCount %d PacketLength %d PacketPattern %d\n", PMacTxInfo.TX_SC, PMacTxInfo.BandWidth, PMacTxInfo.PacketPeriod, PMacTxInfo.PacketCount, -+ PMacTxInfo.PacketLength, PMacTxInfo.PacketPattern); -+ -+ if (hal_spec->tx_nss_num < 2 && MPT_IS_2SS_RATE(PMacTxInfo.TX_RATE)) -+ return _FALSE; -+ if (hal_spec->tx_nss_num < 3 && MPT_IS_3SS_RATE(PMacTxInfo.TX_RATE)) -+ return _FALSE; -+ if (hal_spec->tx_nss_num < 4 && MPT_IS_4SS_RATE(PMacTxInfo.TX_RATE)) -+ return _FALSE; -+ if (!is_supported_vht(Adapter->registrypriv.wireless_mode) && MPT_IS_VHT_RATE(PMacTxInfo.TX_RATE)) -+ return _FALSE; -+ if (!is_supported_ht(Adapter->registrypriv.wireless_mode) && MPT_IS_HT_RATE(PMacTxInfo.TX_RATE)) -+ return _FALSE; -+ -+ if (PMacTxInfo.BandWidth == 1 && hal_chk_bw_cap(Adapter, BW_CAP_40M)) -+ PMacTxInfo.BandWidth = CHANNEL_WIDTH_40; -+ else if (PMacTxInfo.BandWidth == 2 && hal_chk_bw_cap(Adapter, BW_CAP_80M)) -+ PMacTxInfo.BandWidth = CHANNEL_WIDTH_80; -+ else -+ PMacTxInfo.BandWidth = CHANNEL_WIDTH_20; -+ -+ if (IS_HARDWARE_TYPE_JAGUAR3(Adapter)) { -+#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT -+ struct phydm_pmac_info phydm_mactxinfo; -+ -+ if (PMacTxInfo.bEnPMacTx == TRUE) { -+ pMptCtx->HWTxmode = PMacTxInfo.Mode; -+ pMptCtx->mpt_rate_index = PMacTxInfo.TX_RATE; -+ if (PMacTxInfo.Mode == CONTINUOUS_TX) -+ hal_mpt_SetTxPower(Adapter); -+ } else { -+ PMacTxInfo.Mode = pMptCtx->HWTxmode; -+ PMacTxInfo.TX_RATE = pMptCtx->mpt_rate_index; -+ pMptCtx->HWTxmode = TEST_NONE; -+ } -+ mpt_convert_phydm_txinfo_for_jaguar3(&PMacTxInfo, &phydm_mactxinfo); -+ phydm_set_pmac_tx(p_dm_odm, &phydm_mactxinfo, pMptCtx->mpt_rf_path); -+#endif -+ return status; -+ } -+ -+ if (PMacTxInfo.bEnPMacTx == FALSE) { -+ if (pMptCtx->HWTxmode == CONTINUOUS_TX) { -+ phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ -+ if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index)) -+ mpt_StopCckContTx(Adapter); -+ else -+ mpt_StopOfdmContTx(Adapter); -+ } else if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index)) { -+ u4bTmp = phy_query_bb_reg(Adapter, 0xf50, bMaskLWord); -+ phy_set_bb_reg(Adapter, 0xb1c, bMaskLWord, u4bTmp + 50); -+ phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /*TX Stop*/ -+ } else -+ phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ -+ -+ if (pMptCtx->HWTxmode == OFDM_Single_Tone_TX) { -+ /* Stop HW TX -> Stop Continuous TX -> Stop RF Setting*/ -+ if (IS_MPT_CCK_RATE(pMptCtx->mpt_rate_index)) -+ mpt_StopCckContTx(Adapter); -+ else -+ mpt_StopOfdmContTx(Adapter); -+ -+ mpt_SetSingleTone_8814A(Adapter, FALSE, TRUE); -+ } -+ pMptCtx->HWTxmode = TEST_NONE; -+ return status; -+ } -+ -+ pMptCtx->mpt_rate_index = PMacTxInfo.TX_RATE; -+ -+ if (PMacTxInfo.Mode == CONTINUOUS_TX) { -+ pMptCtx->HWTxmode = CONTINUOUS_TX; -+ PMacTxInfo.PacketCount = 1; -+ -+ hal_mpt_SetTxPower(Adapter); -+ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) -+ mpt_StartCckContTx(Adapter); -+ else -+ mpt_StartOfdmContTx(Adapter); -+ } else if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { -+ /* Continuous TX -> HW TX -> RF Setting */ -+ pMptCtx->HWTxmode = OFDM_Single_Tone_TX; -+ PMacTxInfo.PacketCount = 1; -+ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) -+ mpt_StartCckContTx(Adapter); -+ else -+ mpt_StartOfdmContTx(Adapter); -+ } else if (PMacTxInfo.Mode == PACKETS_TX) { -+ pMptCtx->HWTxmode = PACKETS_TX; -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE) && PMacTxInfo.PacketCount == 0) -+ PMacTxInfo.PacketCount = 0xffff; -+ } -+ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { -+ /* 0xb1c[0:15] TX packet count 0xb1C[31:16] SFD*/ -+ u4bTmp = PMacTxInfo.PacketCount | (PMacTxInfo.SFD << 16); -+ phy_set_bb_reg(Adapter, 0xb1c, bMaskDWord, u4bTmp); -+ /* 0xb40 7:0 SIGNAL 15:8 SERVICE 31:16 LENGTH*/ -+ u4bTmp = PMacTxInfo.SignalField | (PMacTxInfo.ServiceField << 8) | (PMacTxInfo.LENGTH << 16); -+ phy_set_bb_reg(Adapter, 0xb40, bMaskDWord, u4bTmp); -+ u4bTmp = PMacTxInfo.CRC16[0] | (PMacTxInfo.CRC16[1] << 8); -+ phy_set_bb_reg(Adapter, 0xb44, bMaskLWord, u4bTmp); -+ -+ if (PMacTxInfo.bSPreamble) -+ phy_set_bb_reg(Adapter, 0xb0c, BIT27, 0); -+ else -+ phy_set_bb_reg(Adapter, 0xb0c, BIT27, 1); -+ } else { -+ phy_set_bb_reg(Adapter, 0xb18, 0xfffff, PMacTxInfo.PacketCount); -+ -+ u4bTmp = PMacTxInfo.LSIG[0] | ((PMacTxInfo.LSIG[1]) << 8) | ((PMacTxInfo.LSIG[2]) << 16) | ((PMacTxInfo.PacketPattern) << 24); -+ phy_set_bb_reg(Adapter, 0xb08, bMaskDWord, u4bTmp); /* Set 0xb08[23:0] = LSIG, 0xb08[31:24] = Data init octet*/ -+ -+ if (PMacTxInfo.PacketPattern == 0x12) -+ u4bTmp = 0x3000000; -+ else -+ u4bTmp = 0; -+ } -+ -+ if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) { -+ u4bTmp |= PMacTxInfo.HT_SIG[0] | ((PMacTxInfo.HT_SIG[1]) << 8) | ((PMacTxInfo.HT_SIG[2]) << 16); -+ phy_set_bb_reg(Adapter, 0xb0c, bMaskDWord, u4bTmp); -+ u4bTmp = PMacTxInfo.HT_SIG[3] | ((PMacTxInfo.HT_SIG[4]) << 8) | ((PMacTxInfo.HT_SIG[5]) << 16); -+ phy_set_bb_reg(Adapter, 0xb10, 0xffffff, u4bTmp); -+ } else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) { -+ u4bTmp |= PMacTxInfo.VHT_SIG_A[0] | ((PMacTxInfo.VHT_SIG_A[1]) << 8) | ((PMacTxInfo.VHT_SIG_A[2]) << 16); -+ phy_set_bb_reg(Adapter, 0xb0c, bMaskDWord, u4bTmp); -+ u4bTmp = PMacTxInfo.VHT_SIG_A[3] | ((PMacTxInfo.VHT_SIG_A[4]) << 8) | ((PMacTxInfo.VHT_SIG_A[5]) << 16); -+ phy_set_bb_reg(Adapter, 0xb10, 0xffffff, u4bTmp); -+ -+ _rtw_memcpy(&u4bTmp, PMacTxInfo.VHT_SIG_B, 4); -+ phy_set_bb_reg(Adapter, 0xb14, bMaskDWord, u4bTmp); -+ } -+ -+ if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) { -+ u4bTmp = (PMacTxInfo.VHT_SIG_B_CRC << 24) | PMacTxInfo.PacketPeriod; /* for TX interval */ -+ phy_set_bb_reg(Adapter, 0xb20, bMaskDWord, u4bTmp); -+ -+ _rtw_memcpy(&u4bTmp, PMacTxInfo.VHT_Delimiter, 4); -+ phy_set_bb_reg(Adapter, 0xb24, bMaskDWord, u4bTmp); -+ -+ /* 0xb28 - 0xb34 24 byte Probe Request MAC Header*/ -+ /*& Duration & Frame control*/ -+ phy_set_bb_reg(Adapter, 0xb28, bMaskDWord, 0x00000040); -+ -+ /* Address1 [0:3]*/ -+ u4bTmp = PMacTxInfo.MacAddress[0] | (PMacTxInfo.MacAddress[1] << 8) | (PMacTxInfo.MacAddress[2] << 16) | (PMacTxInfo.MacAddress[3] << 24); -+ phy_set_bb_reg(Adapter, 0xb2C, bMaskDWord, u4bTmp); -+ -+ /* Address3 [3:0]*/ -+ phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp); -+ -+ /* Address2[0:1] & Address1 [5:4]*/ -+ u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8) | (Adapter->mac_addr[0] << 16) | (Adapter->mac_addr[1] << 24); -+ phy_set_bb_reg(Adapter, 0xb30, bMaskDWord, u4bTmp); -+ -+ /* Address2 [5:2]*/ -+ u4bTmp = Adapter->mac_addr[2] | (Adapter->mac_addr[3] << 8) | (Adapter->mac_addr[4] << 16) | (Adapter->mac_addr[5] << 24); -+ phy_set_bb_reg(Adapter, 0xb34, bMaskDWord, u4bTmp); -+ -+ /* Sequence Control & Address3 [5:4]*/ -+ /*u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8) ;*/ -+ /*phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp);*/ -+ } else { -+ phy_set_bb_reg(Adapter, 0xb20, bMaskDWord, PMacTxInfo.PacketPeriod); /* for TX interval*/ -+ /* & Duration & Frame control */ -+ phy_set_bb_reg(Adapter, 0xb24, bMaskDWord, 0x00000040); -+ -+ /* 0xb24 - 0xb38 24 byte Probe Request MAC Header*/ -+ /* Address1 [0:3]*/ -+ u4bTmp = PMacTxInfo.MacAddress[0] | (PMacTxInfo.MacAddress[1] << 8) | (PMacTxInfo.MacAddress[2] << 16) | (PMacTxInfo.MacAddress[3] << 24); -+ phy_set_bb_reg(Adapter, 0xb28, bMaskDWord, u4bTmp); -+ -+ /* Address3 [3:0]*/ -+ phy_set_bb_reg(Adapter, 0xb34, bMaskDWord, u4bTmp); -+ -+ /* Address2[0:1] & Address1 [5:4]*/ -+ u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8) | (Adapter->mac_addr[0] << 16) | (Adapter->mac_addr[1] << 24); -+ phy_set_bb_reg(Adapter, 0xb2c, bMaskDWord, u4bTmp); -+ -+ /* Address2 [5:2] */ -+ u4bTmp = Adapter->mac_addr[2] | (Adapter->mac_addr[3] << 8) | (Adapter->mac_addr[4] << 16) | (Adapter->mac_addr[5] << 24); -+ phy_set_bb_reg(Adapter, 0xb30, bMaskDWord, u4bTmp); -+ -+ /* Sequence Control & Address3 [5:4]*/ -+ u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8); -+ phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp); -+ } -+ -+ phy_set_bb_reg(Adapter, 0xb48, bMaskByte3, PMacTxInfo.TX_RATE_HEX); -+ -+ /* 0xb4c 3:0 TXSC 5:4 BW 7:6 m_STBC 8 NDP_Sound*/ -+ u4bTmp = (PMacTxInfo.TX_SC) | ((PMacTxInfo.BandWidth) << 4) | ((PMacTxInfo.m_STBC - 1) << 6) | ((PMacTxInfo.NDP_sound) << 8); -+ phy_set_bb_reg(Adapter, 0xb4c, 0x1ff, u4bTmp); -+ -+ if (IS_HARDWARE_TYPE_JAGUAR2(Adapter)) { -+ u32 offset = 0xb44; -+ -+ if (IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE)) -+ phy_set_bb_reg(Adapter, offset, 0xc0000000, 0); -+ else if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) -+ phy_set_bb_reg(Adapter, offset, 0xc0000000, 1); -+ else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) -+ phy_set_bb_reg(Adapter, offset, 0xc0000000, 2); -+ -+ } else if(IS_HARDWARE_TYPE_JAGUAR(Adapter)) { -+ u32 offset = 0xb4c; -+ -+ if(IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE)) -+ phy_set_bb_reg(Adapter, offset, 0xc0000000, 0); -+ else if(IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) -+ phy_set_bb_reg(Adapter, offset, 0xc0000000, 1); -+ else if(IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) -+ phy_set_bb_reg(Adapter, offset, 0xc0000000, 2); -+ } -+ -+ phy_set_bb_reg(Adapter, 0xb00, BIT8, 1); /* Turn on PMAC*/ -+ /* phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); */ /* TX Stop */ -+ if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { -+ phy_set_bb_reg(Adapter, 0xb04, 0xf, 8); /*TX CCK ON*/ -+ phy_set_bb_reg(Adapter, 0xA84, BIT31, 0); -+ } else -+ phy_set_bb_reg(Adapter, 0xb04, 0xf, 4); /* TX Ofdm ON */ -+ -+ if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) -+ mpt_SetSingleTone_8814A(Adapter, TRUE, TRUE); -+ -+ return status; -+} -+ -+#endif -+ -+void hal_mpt_SetContinuousTx(PADAPTER pAdapter, u8 bStart) -+{ -+ u8 Rate; -+ -+ RTW_INFO("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx); -+ Rate = HwRateToMPTRate(pAdapter->mppriv.rateidx); -+ pAdapter->mppriv.mpt_ctx.is_start_cont_tx = bStart; -+ -+ if (Rate <= MPT_RATE_11M) { -+ if (bStart) -+ mpt_StartCckContTx(pAdapter); -+ else -+ mpt_StopCckContTx(pAdapter); -+ -+ } else if (Rate >= MPT_RATE_6M) { -+ if (bStart) -+ mpt_StartOfdmContTx(pAdapter); -+ else -+ mpt_StopOfdmContTx(pAdapter); -+ } -+} -+ -+void mpt_trigger_tssi_tracking(PADAPTER pAdapter, u8 rf_path) -+{ -+#ifdef CONFIG_RTL8814B -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ -+ halrf_do_tssi_8814b(pDM_Odm, rf_path); -+#endif -+} -+ -+#endif /* CONFIG_MP_INCLUDE*/ -diff --git a/drivers/staging/rtl8723cs/hal/hal_phy.c b/drivers/staging/rtl8723cs/hal/hal_phy.c -new file mode 100644 -index 000000000000..cf5cb3b5470f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/hal_phy.c -@@ -0,0 +1,257 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _HAL_PHY_C_ -+ -+#include -+ -+/** -+* Function: PHY_CalculateBitShift -+* -+* OverView: Get shifted position of the BitMask -+* -+* Input: -+* u32 BitMask, -+* -+* Output: none -+* Return: u32 Return the shift bit bit position of the mask -+*/ -+u32 -+PHY_CalculateBitShift( -+ u32 BitMask -+) -+{ -+ u32 i; -+ -+ for (i = 0; i <= 31; i++) { -+ if (((BitMask >> i) & 0x1) == 1) -+ break; -+ } -+ -+ return i; -+} -+ -+ -+#ifdef CONFIG_RF_SHADOW_RW -+/* ******************************************************************************** -+ * Constant. -+ * ******************************************************************************** -+ * 2008/11/20 MH For Debug only, RF */ -+static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; -+ -+/* -+ * ==> RF shadow Operation API Code Section!!! -+ * -+ *----------------------------------------------------------------------------- -+ * Function: PHY_RFShadowRead -+ * PHY_RFShadowWrite -+ * PHY_RFShadowCompare -+ * PHY_RFShadowRecorver -+ * PHY_RFShadowCompareAll -+ * PHY_RFShadowRecorverAll -+ * PHY_RFShadowCompareFlagSet -+ * PHY_RFShadowRecorverFlagSet -+ * -+ * Overview: When we set RF register, we must write shadow at first. -+ * When we are running, we must compare shadow abd locate error addr. -+ * Decide to recorver or not. -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 11/20/2008 MHC Create Version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+u32 -+PHY_RFShadowRead( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset) -+{ -+ return RF_Shadow[eRFPath][Offset].Value; -+ -+} /* PHY_RFShadowRead */ -+ -+ -+void -+PHY_RFShadowWrite( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset, -+ u32 Data) -+{ -+ RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); -+ RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE; -+ -+} /* PHY_RFShadowWrite */ -+ -+ -+BOOLEAN -+PHY_RFShadowCompare( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset) -+{ -+ u32 reg; -+ /* Check if we need to check the register */ -+ if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) { -+ reg = rtw_hal_read_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask); -+ /* Compare shadow and real rf register for 20bits!! */ -+ if (RF_Shadow[eRFPath][Offset].Value != reg) { -+ /* Locate error position. */ -+ RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE; -+ } -+ return RF_Shadow[eRFPath][Offset].ErrorOrNot ; -+ } -+ return _FALSE; -+} /* PHY_RFShadowCompare */ -+ -+ -+void -+PHY_RFShadowRecorver( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset) -+{ -+ /* Check if the address is error */ -+ if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) { -+ /* Check if we need to recorver the register. */ -+ if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) { -+ rtw_hal_write_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask, -+ RF_Shadow[eRFPath][Offset].Value); -+ } -+ } -+ -+} /* PHY_RFShadowRecorver */ -+ -+ -+void -+PHY_RFShadowCompareAll( -+ PADAPTER Adapter) -+{ -+ enum rf_path eRFPath = RF_PATH_A; -+ u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter); -+ -+ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) { -+ for (Offset = 0; Offset < maxReg; Offset++) -+ PHY_RFShadowCompare(Adapter, eRFPath, Offset); -+ } -+ -+} /* PHY_RFShadowCompareAll */ -+ -+ -+void -+PHY_RFShadowRecorverAll( -+ PADAPTER Adapter) -+{ -+ enum rf_path eRFPath = RF_PATH_A; -+ u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter); -+ -+ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) { -+ for (Offset = 0; Offset < maxReg; Offset++) -+ PHY_RFShadowRecorver(Adapter, eRFPath, Offset); -+ } -+ -+} /* PHY_RFShadowRecorverAll */ -+ -+ -+void -+PHY_RFShadowCompareFlagSet( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset, -+ u8 Type) -+{ -+ /* Set True or False!!! */ -+ RF_Shadow[eRFPath][Offset].Compare = Type; -+ -+} /* PHY_RFShadowCompareFlagSet */ -+ -+ -+void -+PHY_RFShadowRecorverFlagSet( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset, -+ u8 Type) -+{ -+ /* Set True or False!!! */ -+ RF_Shadow[eRFPath][Offset].Recorver = Type; -+ -+} /* PHY_RFShadowRecorverFlagSet */ -+ -+ -+void -+PHY_RFShadowCompareFlagSetAll( -+ PADAPTER Adapter) -+{ -+ enum rf_path eRFPath = RF_PATH_A; -+ u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter); -+ -+ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) { -+ for (Offset = 0; Offset < maxReg; Offset++) { -+ /* 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! */ -+ if (Offset != 0x26 && Offset != 0x27) -+ PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _FALSE); -+ else -+ PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _TRUE); -+ } -+ } -+ -+} /* PHY_RFShadowCompareFlagSetAll */ -+ -+ -+void -+PHY_RFShadowRecorverFlagSetAll( -+ PADAPTER Adapter) -+{ -+ enum rf_path eRFPath = RF_PATH_A; -+ u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter); -+ -+ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) { -+ for (Offset = 0; Offset < maxReg; Offset++) { -+ /* 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! */ -+ if (Offset != 0x26 && Offset != 0x27) -+ PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _FALSE); -+ else -+ PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _TRUE); -+ } -+ } -+ -+} /* PHY_RFShadowCompareFlagSetAll */ -+ -+void -+PHY_RFShadowRefresh( -+ PADAPTER Adapter) -+{ -+ enum rf_path eRFPath = RF_PATH_A; -+ u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter); -+ -+ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) { -+ for (Offset = 0; Offset < maxReg; Offset++) { -+ RF_Shadow[eRFPath][Offset].Value = 0; -+ RF_Shadow[eRFPath][Offset].Compare = _FALSE; -+ RF_Shadow[eRFPath][Offset].Recorver = _FALSE; -+ RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE; -+ RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE; -+ } -+ } -+ -+} /* PHY_RFShadowRead */ -+#endif /*CONFIG_RF_SHADOW_RW*/ -diff --git a/drivers/staging/rtl8723cs/hal/led/hal_led.c b/drivers/staging/rtl8723cs/hal/led/hal_led.c -new file mode 100644 -index 000000000000..95d3daa24315 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/led/hal_led.c -@@ -0,0 +1,254 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+ -+#ifdef CONFIG_RTW_LED -+void dump_led_config(void *sel, _adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct led_priv *ledpriv = adapter_to_led(adapter); -+ int i; -+ -+ RTW_PRINT_SEL(sel, "strategy:%u\n", ledpriv->LedStrategy); -+#ifdef CONFIG_RTW_SW_LED -+ RTW_PRINT_SEL(sel, "bRegUseLed:%u\n", ledpriv->bRegUseLed); -+ RTW_PRINT_SEL(sel, "iface_en_mask:0x%02X\n", ledpriv->iface_en_mask); -+ for (i = 0; i < dvobj->iface_nums; i++) -+ RTW_PRINT_SEL(sel, "ctl_en_mask[%d]:0x%08X\n", i, ledpriv->ctl_en_mask[i]); -+#endif -+} -+ -+void rtw_led_set_strategy(_adapter *adapter, u8 strategy) -+{ -+ struct led_priv *ledpriv = adapter_to_led(adapter); -+ _adapter *pri_adapter = GET_PRIMARY_ADAPTER(adapter); -+ -+#ifndef CONFIG_RTW_SW_LED -+ if (IS_SW_LED_STRATEGY(strategy)) { -+ RTW_WARN("CONFIG_RTW_SW_LED is not defined\n"); -+ return; -+ } -+#endif -+ -+#ifdef CONFIG_RTW_SW_LED -+ if (!ledpriv->bRegUseLed) -+ return; -+#endif -+ -+ if (ledpriv->LedStrategy == strategy) -+ return; -+ -+ if (IS_HW_LED_STRATEGY(strategy) || IS_HW_LED_STRATEGY(ledpriv->LedStrategy)) { -+ RTW_WARN("switching on/off HW_LED strategy is not supported\n"); -+ return; -+ } -+ -+ ledpriv->LedStrategy = strategy; -+ -+#ifdef CONFIG_RTW_SW_LED -+ rtw_hal_sw_led_deinit(pri_adapter); -+#endif -+ -+ rtw_led_control(pri_adapter, RTW_LED_OFF); -+} -+ -+#ifdef CONFIG_RTW_SW_LED -+#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY -+void rtw_sw_led_blink_uc_trx_only(LED_DATA *led) -+{ -+ _adapter *adapter = led->padapter; -+ BOOLEAN bStopBlinking = _FALSE; -+ -+ if (led->BlinkingLedState == RTW_LED_ON) -+ SwLedOn(adapter, led); -+ else -+ SwLedOff(adapter, led); -+ -+ switch (led->CurrLedState) { -+ case RTW_LED_ON: -+ SwLedOn(adapter, led); -+ break; -+ -+ case RTW_LED_OFF: -+ SwLedOff(adapter, led); -+ break; -+ -+ case LED_BLINK_TXRX: -+ led->BlinkTimes--; -+ if (led->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ -+ if (adapter_to_pwrctl(adapter)->rf_pwrstate != rf_on -+ && adapter_to_pwrctl(adapter)->rfoff_reason > RF_CHANGE_BY_PS -+ ) { -+ SwLedOff(adapter, led); -+ led->bLedBlinkInProgress = _FALSE; -+ } else { -+ if (led->bLedOn) -+ led->BlinkingLedState = RTW_LED_OFF; -+ else -+ led->BlinkingLedState = RTW_LED_ON; -+ -+ if (bStopBlinking) { -+ led->CurrLedState = RTW_LED_OFF; -+ led->bLedBlinkInProgress = _FALSE; -+ } -+ _set_timer(&(led->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+void rtw_sw_led_ctl_mode_uc_trx_only(_adapter *adapter, LED_CTL_MODE ctl) -+{ -+ struct led_priv *ledpriv = adapter_to_led(adapter); -+ LED_DATA *led = &(ledpriv->SwLed0); -+ LED_DATA *led1 = &(ledpriv->SwLed1); -+ LED_DATA *led2 = &(ledpriv->SwLed2); -+ -+ switch (ctl) { -+ case LED_CTL_UC_TX: -+ case LED_CTL_UC_RX: -+ if (led->bLedBlinkInProgress == _FALSE) { -+ led->bLedBlinkInProgress = _TRUE; -+ led->CurrLedState = LED_BLINK_TXRX; -+ led->BlinkTimes = 2; -+ if (led->bLedOn) -+ led->BlinkingLedState = RTW_LED_OFF; -+ else -+ led->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(led->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ led->CurrLedState = RTW_LED_OFF; -+ led->BlinkingLedState = RTW_LED_OFF; -+ -+ if (led->bLedBlinkInProgress) { -+ _cancel_timer_ex(&(led->BlinkTimer)); -+ led->bLedBlinkInProgress = _FALSE; -+ } -+ -+ SwLedOff(adapter, led); -+ SwLedOff(adapter, led1); -+ SwLedOff(adapter, led2); -+ break; -+ -+ default: -+ break; -+ } -+} -+#endif /* CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY */ -+ -+void rtw_led_control(_adapter *adapter, LED_CTL_MODE ctl) -+{ -+ struct led_priv *ledpriv = adapter_to_led(adapter); -+ -+ if (ledpriv->LedControlHandler) { -+ #if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY -+ if (ledpriv->LedStrategy != SW_LED_MODE_UC_TRX_ONLY) { -+ if (ctl == LED_CTL_UC_TX || ctl == LED_CTL_BMC_TX) { -+ if (ledpriv->ctl_en_mask[adapter->iface_id] & BIT(LED_CTL_TX)) -+ ctl = LED_CTL_TX; /* transform specific TX ctl to general TX ctl */ -+ } else if (ctl == LED_CTL_UC_RX || ctl == LED_CTL_BMC_RX) { -+ if (ledpriv->ctl_en_mask[adapter->iface_id] & BIT(LED_CTL_RX)) -+ ctl = LED_CTL_RX; /* transform specific RX ctl to general RX ctl */ -+ } -+ } -+ #endif -+ -+ if ((ledpriv->iface_en_mask & BIT(adapter->iface_id)) -+ && (ledpriv->ctl_en_mask[adapter->iface_id] & BIT(ctl))) -+ ledpriv->LedControlHandler(adapter, ctl); -+ } -+} -+ -+void rtw_led_tx_control(_adapter *adapter, const u8 *da) -+{ -+#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY -+ if (IS_MCAST(da)) -+ rtw_led_control(adapter, LED_CTL_BMC_TX); -+ else -+ rtw_led_control(adapter, LED_CTL_UC_TX); -+#else -+ rtw_led_control(adapter, LED_CTL_TX); -+#endif -+} -+ -+void rtw_led_rx_control(_adapter *adapter, const u8 *da) -+{ -+#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY -+ if (IS_MCAST(da)) -+ rtw_led_control(adapter, LED_CTL_BMC_RX); -+ else -+ rtw_led_control(adapter, LED_CTL_UC_RX); -+#else -+ rtw_led_control(adapter, LED_CTL_RX); -+#endif -+} -+ -+void rtw_led_set_iface_en(_adapter *adapter, u8 en) -+{ -+ struct led_priv *ledpriv = adapter_to_led(adapter); -+ -+ if (en) -+ ledpriv->iface_en_mask |= BIT(adapter->iface_id); -+ else -+ ledpriv->iface_en_mask &= ~BIT(adapter->iface_id); -+} -+ -+void rtw_led_set_iface_en_mask(_adapter *adapter, u8 mask) -+{ -+ struct led_priv *ledpriv = adapter_to_led(adapter); -+ -+ ledpriv->iface_en_mask = mask; -+} -+ -+void rtw_led_set_ctl_en_mask(_adapter *adapter, u32 ctl_mask) -+{ -+ struct led_priv *ledpriv = adapter_to_led(adapter); -+ -+#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY -+ if (ctl_mask & BIT(LED_CTL_TX)) -+ ctl_mask |= BIT(LED_CTL_UC_TX) | BIT(LED_CTL_BMC_TX); -+ if (ctl_mask & BIT(LED_CTL_RX)) -+ ctl_mask |= BIT(LED_CTL_UC_RX) | BIT(LED_CTL_BMC_RX); -+#endif -+ -+ ledpriv->ctl_en_mask[adapter->iface_id] = ctl_mask; -+} -+ -+void rtw_led_set_ctl_en_mask_primary(_adapter *adapter) -+{ -+ rtw_led_set_ctl_en_mask(adapter, 0xFFFFFFFF); -+} -+ -+void rtw_led_set_ctl_en_mask_virtual(_adapter *adapter) -+{ -+ rtw_led_set_ctl_en_mask(adapter -+ , BIT(LED_CTL_POWER_ON) | BIT(LED_CTL_POWER_OFF) -+ | BIT(LED_CTL_TX) | BIT(LED_CTL_RX) -+ ); -+} -+#endif /* CONFIG_RTW_SW_LED */ -+ -+#endif /* CONFIG_RTW_LED */ -+ -diff --git a/drivers/staging/rtl8723cs/hal/led/hal_sdio_led.c b/drivers/staging/rtl8723cs/hal/led/hal_sdio_led.c -new file mode 100644 -index 000000000000..506d17d7b3b6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/led/hal_sdio_led.c -@@ -0,0 +1,2014 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+#include -+#ifdef CONFIG_RTW_SW_LED -+ -+/* -+ * Description: -+ * Implementation of LED blinking behavior. -+ * It toggle off LED and schedule corresponding timer if necessary. -+ * */ -+void -+SwLedBlink( -+ PLED_SDIO pLed -+) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bStopBlinking = _FALSE; -+ -+ /* Change LED according to BlinkingLedState specified. */ -+ if (pLed->BlinkingLedState == RTW_LED_ON) { -+ SwLedOn(padapter, pLed); -+ } else { -+ SwLedOff(padapter, pLed); -+ } -+ -+ /* Determine if we shall change LED state again. */ -+ pLed->BlinkTimes--; -+ switch (pLed->CurrLedState) { -+ -+ case LED_BLINK_NORMAL: -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ break; -+ -+ case LED_BLINK_StartToBlink: -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) && check_fwstate(pmlmepriv, WIFI_STATION_STATE)) -+ bStopBlinking = _TRUE; -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) && -+ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))) -+ bStopBlinking = _TRUE; -+ else if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ break; -+ -+ case LED_BLINK_WPS: -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ break; -+ -+ -+ default: -+ bStopBlinking = _TRUE; -+ break; -+ -+ } -+ -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else if ((check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) && (pLed->bLedOn == _FALSE)) -+ SwLedOn(padapter, pLed); -+ else if ((check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) && pLed->bLedOn == _TRUE) -+ SwLedOff(padapter, pLed); -+ -+ pLed->BlinkTimes = 0; -+ pLed->bLedBlinkInProgress = _FALSE; -+ } else { -+ /* Assign LED state to toggle. */ -+ if (pLed->BlinkingLedState == RTW_LED_ON) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ -+ /* Schedule a timer to toggle LED state. */ -+ switch (pLed->CurrLedState) { -+ case LED_BLINK_NORMAL: -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ break; -+ -+ case LED_BLINK_SLOWLY: -+ case LED_BLINK_StartToBlink: -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ break; -+ -+ case LED_BLINK_WPS: -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); -+ break; -+ -+ default: -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ break; -+ } -+ } -+} -+ -+void -+SwLedBlink1( -+ PLED_SDIO pLed -+) -+{ -+ _adapter *padapter = pLed->padapter; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ PLED_SDIO pLed1 = &(ledpriv->SwLed1); -+ u8 bStopBlinking = _FALSE; -+ -+ if (pHalData->CustomerID == RT_CID_819x_CAMEO) -+ pLed = &(ledpriv->SwLed1); -+ -+ /* Change LED according to BlinkingLedState specified. */ -+ if (pLed->BlinkingLedState == RTW_LED_ON) { -+ SwLedOn(padapter, pLed); -+ } else { -+ SwLedOff(padapter, pLed); -+ } -+ -+ -+ if (pHalData->CustomerID == RT_CID_DEFAULT) { -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ if (!pLed1->bSWLedCtrl) { -+ SwLedOn(padapter, pLed1); -+ pLed1->bSWLedCtrl = _TRUE; -+ } else if (!pLed1->bLedOn) -+ SwLedOn(padapter, pLed1); -+ } else { -+ if (!pLed1->bSWLedCtrl) { -+ SwLedOff(padapter, pLed1); -+ pLed1->bSWLedCtrl = _TRUE; -+ } else if (pLed1->bLedOn) -+ SwLedOff(padapter, pLed1); -+ } -+ } -+ -+ switch (pLed->CurrLedState) { -+ case LED_BLINK_SLOWLY: -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ break; -+ -+ case LED_BLINK_NORMAL: -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ break; -+ -+ case LED_BLINK_SCAN: -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ pLed->bLedLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_NORMAL; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ -+ } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ } -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } else { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_TXRX: -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ pLed->bLedLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_NORMAL; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ } -+ pLed->BlinkTimes = 0; -+ pLed->bLedBlinkInProgress = _FALSE; -+ } else { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_WPS: -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ break; -+ -+ case LED_BLINK_WPS_STOP: /* WPS success */ -+ if (pLed->BlinkingLedState == RTW_LED_ON) { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); -+ bStopBlinking = _FALSE; -+ } else -+ bStopBlinking = _TRUE; -+ -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else { -+ pLed->bLedLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_NORMAL; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ } -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+void -+SwLedBlink2( -+ PLED_SDIO pLed -+) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bStopBlinking = _FALSE; -+ -+ /* Change LED according to BlinkingLedState specified. */ -+ if (pLed->BlinkingLedState == RTW_LED_ON) { -+ SwLedOn(padapter, pLed); -+ } else { -+ SwLedOff(padapter, pLed); -+ } -+ -+ switch (pLed->CurrLedState) { -+ case LED_BLINK_SCAN: -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ SwLedOn(padapter, pLed); -+ -+ } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ SwLedOff(padapter, pLed); -+ } -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } else { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_TXRX: -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ SwLedOn(padapter, pLed); -+ -+ } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ SwLedOff(padapter, pLed); -+ } -+ pLed->bLedBlinkInProgress = _FALSE; -+ } else { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+void -+SwLedBlink3( -+ PLED_SDIO pLed -+) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bStopBlinking = _FALSE; -+ -+ /* Change LED according to BlinkingLedState specified. */ -+ if (pLed->BlinkingLedState == RTW_LED_ON) { -+ SwLedOn(padapter, pLed); -+ } else { -+ if (pLed->CurrLedState != LED_BLINK_WPS_STOP) -+ SwLedOff(padapter, pLed); -+ } -+ -+ switch (pLed->CurrLedState) { -+ case LED_BLINK_SCAN: -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ if (!pLed->bLedOn) -+ SwLedOn(padapter, pLed); -+ -+ } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if (pLed->bLedOn) -+ SwLedOff(padapter, pLed); -+ -+ } -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } else { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_TXRX: -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ -+ if (!pLed->bLedOn) -+ SwLedOn(padapter, pLed); -+ -+ } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ -+ if (pLed->bLedOn) -+ SwLedOff(padapter, pLed); -+ -+ -+ } -+ pLed->bLedBlinkInProgress = _FALSE; -+ } else { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_WPS: -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ break; -+ -+ case LED_BLINK_WPS_STOP: /* WPS success */ -+ if (pLed->BlinkingLedState == RTW_LED_ON) { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); -+ bStopBlinking = _FALSE; -+ } else -+ bStopBlinking = _TRUE; -+ -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) -+ SwLedOff(padapter, pLed); -+ else { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ SwLedOn(padapter, pLed); -+ } -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ break; -+ -+ -+ default: -+ break; -+ } -+ -+} -+ -+ -+void -+SwLedBlink4( -+ PLED_SDIO pLed -+) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ PLED_SDIO pLed1 = &(ledpriv->SwLed1); -+ u8 bStopBlinking = _FALSE; -+ -+ /* Change LED according to BlinkingLedState specified. */ -+ if (pLed->BlinkingLedState == RTW_LED_ON) { -+ SwLedOn(padapter, pLed); -+ } else { -+ SwLedOff(padapter, pLed); -+ } -+ -+ if (!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) { -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ pLed1->CurrLedState = RTW_LED_OFF; -+ SwLedOff(padapter, pLed1); -+ } -+ -+ switch (pLed->CurrLedState) { -+ case LED_BLINK_SLOWLY: -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ break; -+ -+ case LED_BLINK_StartToBlink: -+ if (pLed->bLedOn) { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ } else { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ break; -+ -+ case LED_BLINK_SCAN: -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _FALSE; -+ -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ SwLedOff(padapter, pLed); -+ else { -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ } -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } else { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ SwLedOff(padapter, pLed); -+ else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_TXRX: -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ SwLedOff(padapter, pLed); -+ else { -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ } -+ pLed->bLedBlinkInProgress = _FALSE; -+ } else { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ SwLedOff(padapter, pLed); -+ else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ case LED_BLINK_WPS: -+ if (pLed->bLedOn) { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ } else { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ break; -+ -+ case LED_BLINK_WPS_STOP: /* WPS authentication fail */ -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ break; -+ -+ case LED_BLINK_WPS_STOP_OVERLAP: /* WPS session overlap */ -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) { -+ if (pLed->bLedOn) -+ pLed->BlinkTimes = 1; -+ else -+ bStopBlinking = _TRUE; -+ } -+ -+ if (bStopBlinking) { -+ pLed->BlinkTimes = 10; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ } else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ break; -+ -+ default: -+ break; -+ } -+ -+ -+ -+} -+ -+void -+SwLedBlink5( -+ PLED_SDIO pLed -+) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bStopBlinking = _FALSE; -+ -+ /* Change LED according to BlinkingLedState specified. */ -+ if (pLed->BlinkingLedState == RTW_LED_ON) { -+ SwLedOn(padapter, pLed); -+ } else { -+ SwLedOff(padapter, pLed); -+ } -+ -+ switch (pLed->CurrLedState) { -+ case LED_BLINK_SCAN: -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if (pLed->bLedOn) -+ SwLedOff(padapter, pLed); -+ } else { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ if (!pLed->bLedOn) -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } else { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ SwLedOff(padapter, pLed); -+ else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ -+ case LED_BLINK_TXRX: -+ pLed->BlinkTimes--; -+ if (pLed->BlinkTimes == 0) -+ bStopBlinking = _TRUE; -+ -+ if (bStopBlinking) { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if (pLed->bLedOn) -+ SwLedOff(padapter, pLed); -+ } else { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ if (!pLed->bLedOn) -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ -+ pLed->bLedBlinkInProgress = _FALSE; -+ } else { -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) -+ SwLedOff(padapter, pLed); -+ else { -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ } -+ break; -+ -+ default: -+ break; -+ } -+ -+ -+ -+} -+ -+void -+SwLedBlink6( -+ PLED_SDIO pLed -+) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 bStopBlinking = _FALSE; -+ -+ /* Change LED according to BlinkingLedState specified. */ -+ if (pLed->BlinkingLedState == RTW_LED_ON) { -+ SwLedOn(padapter, pLed); -+ } else { -+ SwLedOff(padapter, pLed); -+ } -+ -+} -+ -+/* -+ * Description: -+ * Handler function of LED Blinking. -+ * We dispatch acture LED blink action according to LedStrategy. -+ * */ -+void BlinkHandler(PLED_SDIO pLed) -+{ -+ _adapter *padapter = pLed->padapter; -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ -+ /* RTW_INFO("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); */ -+ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { -+ RTW_INFO("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" -+ , __func__ -+ , rtw_is_drv_stopped(padapter) ? "True" : "False" -+ , rtw_is_surprise_removed(padapter) ? "True" : "False"); -+ -+ return; -+ } -+ -+ switch (ledpriv->LedStrategy) { -+ #if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY -+ case SW_LED_MODE_UC_TRX_ONLY: -+ rtw_sw_led_blink_uc_trx_only(pLed); -+ break; -+ #endif -+ -+ case SW_LED_MODE0: -+ SwLedBlink(pLed); -+ break; -+ -+ case SW_LED_MODE1: -+ SwLedBlink1(pLed); -+ break; -+ -+ case SW_LED_MODE2: -+ SwLedBlink2(pLed); -+ break; -+ -+ case SW_LED_MODE3: -+ SwLedBlink3(pLed); -+ break; -+ -+ case SW_LED_MODE4: -+ SwLedBlink4(pLed); -+ break; -+ -+ case SW_LED_MODE5: -+ SwLedBlink5(pLed); -+ break; -+ -+ case SW_LED_MODE6: -+ SwLedBlink6(pLed); -+ break; -+ -+ default: -+ /* SwLedBlink(pLed); */ -+ break; -+ } -+} -+ -+/* -+ * Description: -+ * Callback function of LED BlinkTimer, -+ * it just schedules to corresponding BlinkWorkItem/led_blink_hdl -+ * */ -+void BlinkTimerCallback(void *data) -+{ -+ PLED_SDIO pLed = (PLED_SDIO)data; -+ _adapter *padapter = pLed->padapter; -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { -+ /*RTW_INFO("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" -+ , __func__ -+ , rtw_is_drv_stopped(padapter)?"True":"False" -+ , rtw_is_surprise_removed(padapter)?"True":"False" );*/ -+ return; -+ } -+ -+#ifdef CONFIG_RTW_LED_HANDLED_BY_CMD_THREAD -+ rtw_led_blink_cmd(padapter, pLed); -+#else -+ _set_workitem(&(pLed->BlinkWorkItem)); -+#endif -+} -+ -+/* -+ * Description: -+ * Callback function of LED BlinkWorkItem. -+ * We dispatch acture LED blink action according to LedStrategy. -+ * */ -+void BlinkWorkItemCallback(_workitem *work) -+{ -+ PLED_SDIO pLed = container_of(work, LED_SDIO, BlinkWorkItem); -+ BlinkHandler(pLed); -+} -+ -+static void -+SwLedControlMode0( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ PLED_SDIO pLed = &(ledpriv->SwLed1); -+ -+ /* Decide led state */ -+ switch (LedAction) { -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if (pLed->bLedBlinkInProgress == _FALSE) { -+ pLed->bLedBlinkInProgress = _TRUE; -+ -+ pLed->CurrLedState = LED_BLINK_NORMAL; -+ pLed->BlinkTimes = 2; -+ -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ break; -+ -+ case LED_CTL_START_TO_LINK: -+ if (pLed->bLedBlinkInProgress == _FALSE) { -+ pLed->bLedBlinkInProgress = _TRUE; -+ -+ pLed->CurrLedState = LED_BLINK_StartToBlink; -+ pLed->BlinkTimes = 24; -+ -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ } else -+ pLed->CurrLedState = LED_BLINK_StartToBlink; -+ break; -+ -+ case LED_CTL_LINK: -+ pLed->CurrLedState = RTW_LED_ON; -+ if (pLed->bLedBlinkInProgress == _FALSE) { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_NO_LINK: -+ pLed->CurrLedState = RTW_LED_OFF; -+ if (pLed->bLedBlinkInProgress == _FALSE) { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ if (pLed->bLedBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ SwLedOff(padapter, pLed); -+ break; -+ -+ case LED_CTL_START_WPS: -+ if (pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == RTW_LED_ON) { -+ pLed->bLedBlinkInProgress = _TRUE; -+ -+ pLed->CurrLedState = LED_BLINK_WPS; -+ pLed->BlinkTimes = 20; -+ -+ if (pLed->bLedOn) { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); -+ } else { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); -+ } -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS: -+ if (pLed->bLedBlinkInProgress) { -+ pLed->CurrLedState = RTW_LED_OFF; -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ break; -+ -+ -+ default: -+ break; -+ } -+ -+ -+} -+ -+/* ALPHA, added by chiyoko, 20090106 */ -+static void -+SwLedControlMode1( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ PLED_SDIO pLed = &(ledpriv->SwLed0); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ if (pHalData->CustomerID == RT_CID_819x_CAMEO) -+ pLed = &(ledpriv->SwLed1); -+ -+ switch (LedAction) { -+ case LED_CTL_POWER_ON: -+ case LED_CTL_START_TO_LINK: -+ case LED_CTL_NO_LINK: -+ if (pLed->bLedNoLinkBlinkInProgress == _FALSE) { -+ if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ return; -+ if (pLed->bLedLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_LINK: -+ if (pLed->bLedLinkBlinkInProgress == _FALSE) { -+ if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ return; -+ if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_NORMAL; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_SITE_SURVEY: -+ if ((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) -+ ; -+ else if (pLed->bLedScanBlinkInProgress == _FALSE) { -+ if (IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedScanBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SCAN; -+ pLed->BlinkTimes = 24; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ -+ } -+ break; -+ -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if (pLed->bLedBlinkInProgress == _FALSE) { -+ if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ return; -+ if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ pLed->bLedBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_TXRX; -+ pLed->BlinkTimes = 2; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_START_WPS: /* wait until xinpin finish */ -+ case LED_CTL_START_WPS_BOTTON: -+ if (pLed->bLedWPSBlinkInProgress == _FALSE) { -+ if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_WPS; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ -+ case LED_CTL_STOP_WPS: -+ if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedWPSBlinkInProgress) -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ else -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ -+ pLed->CurrLedState = LED_BLINK_WPS_STOP; -+ if (pLed->bLedOn) { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); -+ } else { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS_FAIL: -+ if (pLed->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if (pLed->bLedNoLinkBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedLinkBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ -+ SwLedOff(padapter, pLed); -+ break; -+ -+ default: -+ break; -+ -+ } -+ -+} -+ -+/* Arcadyan/Sitecom , added by chiyoko, 20090216 */ -+static void -+SwLedControlMode2( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PLED_SDIO pLed = &(ledpriv->SwLed0); -+ -+ switch (LedAction) { -+ case LED_CTL_SITE_SURVEY: -+ if (pmlmepriv->LinkDetectInfo.bBusyTraffic) -+ ; -+ else if (pLed->bLedScanBlinkInProgress == _FALSE) { -+ if (IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedScanBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SCAN; -+ pLed->BlinkTimes = 24; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if ((pLed->bLedBlinkInProgress == _FALSE) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) { -+ if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ pLed->bLedBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_TXRX; -+ pLed->BlinkTimes = 2; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_LINK: -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ if (pLed->bLedBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ -+ _set_timer(&(pLed->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_START_WPS: /* wait until xinpin finish */ -+ case LED_CTL_START_WPS_BOTTON: -+ if (pLed->bLedWPSBlinkInProgress == _FALSE) { -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS: -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } else { -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS_FAIL: -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_START_TO_LINK: -+ case LED_CTL_NO_LINK: -+ if (!IS_LED_BLINKING(pLed)) { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if (pLed->bLedBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ SwLedOff(padapter, pLed); -+ break; -+ -+ default: -+ break; -+ -+ } -+ -+} -+ -+/* COREGA, added by chiyoko, 20090316 */ -+static void -+SwLedControlMode3( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PLED_SDIO pLed = &(ledpriv->SwLed0); -+ -+ switch (LedAction) { -+ case LED_CTL_SITE_SURVEY: -+ if (pmlmepriv->LinkDetectInfo.bBusyTraffic) -+ ; -+ else if (pLed->bLedScanBlinkInProgress == _FALSE) { -+ if (IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedScanBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SCAN; -+ pLed->BlinkTimes = 24; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if ((pLed->bLedBlinkInProgress == _FALSE) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) { -+ if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ pLed->bLedBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_TXRX; -+ pLed->BlinkTimes = 2; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_LINK: -+ if (IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ if (pLed->bLedBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ -+ _set_timer(&(pLed->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_START_WPS: /* wait until xinpin finish */ -+ case LED_CTL_START_WPS_BOTTON: -+ if (pLed->bLedWPSBlinkInProgress == _FALSE) { -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_WPS; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS: -+ if (pLed->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } else -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ -+ pLed->CurrLedState = LED_BLINK_WPS_STOP; -+ if (pLed->bLedOn) { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); -+ } else { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ -+ break; -+ -+ case LED_CTL_STOP_WPS_FAIL: -+ if (pLed->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_START_TO_LINK: -+ case LED_CTL_NO_LINK: -+ if (!IS_LED_BLINKING(pLed)) { -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ if (pLed->bLedBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ SwLedOff(padapter, pLed); -+ break; -+ -+ default: -+ break; -+ -+ } -+ -+} -+ -+ -+/* Edimax-Belkin, added by chiyoko, 20090413 */ -+static void -+SwLedControlMode4( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PLED_SDIO pLed = &(ledpriv->SwLed0); -+ PLED_SDIO pLed1 = &(ledpriv->SwLed1); -+ -+ switch (LedAction) { -+ case LED_CTL_START_TO_LINK: -+ if (pLed1->bLedWPSBlinkInProgress) { -+ pLed1->bLedWPSBlinkInProgress = _FALSE; -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ pLed1->CurrLedState = RTW_LED_OFF; -+ -+ if (pLed1->bLedOn) -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ -+ if (pLed->bLedStartToLinkBlinkInProgress == _FALSE) { -+ if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ return; -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedStartToLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_StartToBlink; -+ if (pLed->bLedOn) { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ } else { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ } -+ break; -+ -+ case LED_CTL_LINK: -+ case LED_CTL_NO_LINK: -+ /* LED1 settings */ -+ if (LedAction == LED_CTL_LINK) { -+ if (pLed1->bLedWPSBlinkInProgress) { -+ pLed1->bLedWPSBlinkInProgress = _FALSE; -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ pLed1->CurrLedState = RTW_LED_OFF; -+ -+ if (pLed1->bLedOn) -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ } -+ -+ if (pLed->bLedNoLinkBlinkInProgress == _FALSE) { -+ if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ return; -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_SITE_SURVEY: -+ if ((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) -+ ; -+ else if (pLed->bLedScanBlinkInProgress == _FALSE) { -+ if (IS_LED_WPS_BLINKING(pLed)) -+ return; -+ -+ if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedScanBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SCAN; -+ pLed->BlinkTimes = 24; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if (pLed->bLedBlinkInProgress == _FALSE) { -+ if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) -+ return; -+ if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ pLed->bLedBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_TXRX; -+ pLed->BlinkTimes = 2; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_START_WPS: /* wait until xinpin finish */ -+ case LED_CTL_START_WPS_BOTTON: -+ if (pLed1->bLedWPSBlinkInProgress) { -+ pLed1->bLedWPSBlinkInProgress = _FALSE; -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ pLed1->CurrLedState = RTW_LED_OFF; -+ -+ if (pLed1->bLedOn) -+ _set_timer(&(pLed->BlinkTimer), 0); -+ } -+ -+ if (pLed->bLedWPSBlinkInProgress == _FALSE) { -+ if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ pLed->bLedWPSBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_WPS; -+ if (pLed->bLedOn) { -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); -+ } else { -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ } -+ } -+ break; -+ -+ case LED_CTL_STOP_WPS: /* WPS connect success */ -+ if (pLed->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ -+ break; -+ -+ case LED_CTL_STOP_WPS_FAIL: /* WPS authentication fail */ -+ if (pLed->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ -+ /* LED1 settings */ -+ if (pLed1->bLedWPSBlinkInProgress) -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ else -+ pLed1->bLedWPSBlinkInProgress = _TRUE; -+ -+ pLed1->CurrLedState = LED_BLINK_WPS_STOP; -+ if (pLed1->bLedOn) -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed1->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ -+ break; -+ -+ case LED_CTL_STOP_WPS_FAIL_OVERLAP: /* WPS session overlap */ -+ if (pLed->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed->bLedNoLinkBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SLOWLY; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); -+ -+ /* LED1 settings */ -+ if (pLed1->bLedWPSBlinkInProgress) -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ else -+ pLed1->bLedWPSBlinkInProgress = _TRUE; -+ -+ pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; -+ pLed1->BlinkTimes = 10; -+ if (pLed1->bLedOn) -+ pLed1->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed1->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); -+ -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ -+ if (pLed->bLedNoLinkBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedLinkBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedScanBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedScanBlinkInProgress = _FALSE; -+ } -+ if (pLed->bLedStartToLinkBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedStartToLinkBlinkInProgress = _FALSE; -+ } -+ -+ if (pLed1->bLedWPSBlinkInProgress) { -+ _cancel_timer_ex(&(pLed1->BlinkTimer)); -+ pLed1->bLedWPSBlinkInProgress = _FALSE; -+ } -+ -+ pLed1->BlinkingLedState = LED_UNKNOWN; -+ SwLedOff(padapter, pLed); -+ SwLedOff(padapter, pLed1); -+ break; -+ -+ default: -+ break; -+ -+ } -+ -+} -+ -+ -+ -+/* Sercomm-Belkin, added by chiyoko, 20090415 */ -+static void -+SwLedControlMode5( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PLED_SDIO pLed = &(ledpriv->SwLed0); -+ -+ if (pHalData->CustomerID == RT_CID_819x_CAMEO) -+ pLed = &(ledpriv->SwLed1); -+ -+ switch (LedAction) { -+ case LED_CTL_POWER_ON: -+ case LED_CTL_NO_LINK: -+ case LED_CTL_LINK: /* solid blue */ -+ pLed->CurrLedState = RTW_LED_ON; -+ pLed->BlinkingLedState = RTW_LED_ON; -+ -+ _set_timer(&(pLed->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_SITE_SURVEY: -+ if ((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) -+ ; -+ else if (pLed->bLedScanBlinkInProgress == _FALSE) { -+ if (pLed->bLedBlinkInProgress == _TRUE) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ pLed->bLedScanBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_SCAN; -+ pLed->BlinkTimes = 24; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_TX: -+ case LED_CTL_RX: -+ if (pLed->bLedBlinkInProgress == _FALSE) { -+ if (pLed->CurrLedState == LED_BLINK_SCAN) -+ return; -+ pLed->bLedBlinkInProgress = _TRUE; -+ pLed->CurrLedState = LED_BLINK_TXRX; -+ pLed->BlinkTimes = 2; -+ if (pLed->bLedOn) -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ else -+ pLed->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); -+ } -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ pLed->CurrLedState = RTW_LED_OFF; -+ pLed->BlinkingLedState = RTW_LED_OFF; -+ -+ if (pLed->bLedBlinkInProgress) { -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ pLed->bLedBlinkInProgress = _FALSE; -+ } -+ -+ SwLedOff(padapter, pLed); -+ break; -+ -+ default: -+ break; -+ -+ } -+ -+} -+ -+/* WNC-Corega, added by chiyoko, 20090902 */ -+static void -+SwLedControlMode6( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ PLED_SDIO pLed0 = &(ledpriv->SwLed0); -+ -+ switch (LedAction) { -+ case LED_CTL_POWER_ON: -+ case LED_CTL_LINK: -+ case LED_CTL_NO_LINK: -+ _cancel_timer_ex(&(pLed0->BlinkTimer)); -+ pLed0->CurrLedState = RTW_LED_ON; -+ pLed0->BlinkingLedState = RTW_LED_ON; -+ _set_timer(&(pLed0->BlinkTimer), 0); -+ break; -+ -+ case LED_CTL_POWER_OFF: -+ SwLedOff(padapter, pLed0); -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+void -+LedControlSDIO( -+ _adapter *padapter, -+ LED_CTL_MODE LedAction -+) -+{ -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ -+#if (MP_DRIVER == 1) -+ if (padapter->registrypriv.mp_mode == 1) -+ return; -+#endif -+ -+ if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { -+ /*RTW_INFO("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" -+ , __func__ -+ , rtw_is_drv_stopped(padapter)?"True":"False" -+ , rtw_is_surprise_removed(padapter)?"True":"False");*/ -+ return; -+ } -+ -+ if (ledpriv->bRegUseLed == _FALSE) -+ return; -+ -+ /* if(priv->bInHctTest) */ -+ /* return; */ -+ -+ if ((adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && -+ adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) && -+ (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || -+ LedAction == LED_CTL_SITE_SURVEY || -+ LedAction == LED_CTL_LINK || -+ LedAction == LED_CTL_NO_LINK || -+ LedAction == LED_CTL_POWER_ON)) -+ return; -+ -+ switch (ledpriv->LedStrategy) { -+ #if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY -+ case SW_LED_MODE_UC_TRX_ONLY: -+ rtw_sw_led_ctl_mode_uc_trx_only(padapter, LedAction); -+ break; -+ #endif -+ -+ case SW_LED_MODE0: -+ SwLedControlMode0(padapter, LedAction); -+ break; -+ -+ case SW_LED_MODE1: -+ SwLedControlMode1(padapter, LedAction); -+ break; -+ case SW_LED_MODE2: -+ SwLedControlMode2(padapter, LedAction); -+ break; -+ -+ case SW_LED_MODE3: -+ SwLedControlMode3(padapter, LedAction); -+ break; -+ -+ case SW_LED_MODE4: -+ SwLedControlMode4(padapter, LedAction); -+ break; -+ -+ case SW_LED_MODE5: -+ SwLedControlMode5(padapter, LedAction); -+ break; -+ -+ case SW_LED_MODE6: -+ SwLedControlMode6(padapter, LedAction); -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+/* -+ * Description: -+ * Reset status of LED_871x object. -+ * */ -+void ResetLedStatus(PLED_SDIO pLed) -+{ -+ -+ pLed->CurrLedState = RTW_LED_OFF; /* Current LED state. */ -+ pLed->bLedOn = _FALSE; /* true if LED is ON, false if LED is OFF. */ -+ -+ pLed->bLedBlinkInProgress = _FALSE; /* true if it is blinking, false o.w.. */ -+ pLed->bLedWPSBlinkInProgress = _FALSE; -+ -+ pLed->BlinkTimes = 0; /* Number of times to toggle led state for blinking. */ -+ pLed->BlinkingLedState = LED_UNKNOWN; /* Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. */ -+ -+ pLed->bLedNoLinkBlinkInProgress = _FALSE; -+ pLed->bLedLinkBlinkInProgress = _FALSE; -+ pLed->bLedStartToLinkBlinkInProgress = _FALSE; -+ pLed->bLedScanBlinkInProgress = _FALSE; -+} -+ -+/* -+* Description: -+* Initialize an LED_871x object. -+* */ -+void -+InitLed( -+ _adapter *padapter, -+ PLED_SDIO pLed, -+ LED_PIN LedPin -+) -+{ -+ pLed->padapter = padapter; -+ pLed->LedPin = LedPin; -+ -+ ResetLedStatus(pLed); -+ -+ rtw_init_timer(&(pLed->BlinkTimer), padapter, BlinkTimerCallback, pLed); -+ -+ _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); -+} -+ -+ -+/* -+ * Description: -+ * DeInitialize an LED_871x object. -+ * */ -+void -+DeInitLed( -+ PLED_SDIO pLed -+) -+{ -+ _cancel_workitem_sync(&(pLed->BlinkWorkItem)); -+ _cancel_timer_ex(&(pLed->BlinkTimer)); -+ ResetLedStatus(pLed); -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/ap_makefile.mk b/drivers/staging/rtl8723cs/hal/phydm/ap_makefile.mk -new file mode 100644 -index 000000000000..120fc3d8ff63 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/ap_makefile.mk -@@ -0,0 +1,237 @@ -+ -+_PHYDM_FILES :=\ -+ phydm/phydm.o \ -+ phydm/phydm_dig.o\ -+ phydm/phydm_antdiv.o\ -+ phydm/phydm_soml.o\ -+ phydm/phydm_smt_ant.o\ -+ phydm/phydm_pathdiv.o\ -+ phydm/phydm_rainfo.o\ -+ phydm/phydm_dynamictxpower.o\ -+ phydm/phydm_adaptivity.o\ -+ phydm/phydm_debug.o\ -+ phydm/phydm_interface.o\ -+ phydm/phydm_phystatus.o\ -+ phydm/phydm_hwconfig.o\ -+ phydm/phydm_dfs.o\ -+ phydm/phydm_cfotracking.o\ -+ phydm/phydm_adc_sampling.o\ -+ phydm/phydm_ccx.o\ -+ phydm/phydm_primary_cca.o\ -+ phydm/phydm_cck_pd.o\ -+ phydm/phydm_rssi_monitor.o\ -+ phydm/phydm_auto_dbg.o\ -+ phydm/phydm_math_lib.o\ -+ phydm/phydm_noisemonitor.o\ -+ phydm/phydm_api.o\ -+ phydm/phydm_pow_train.o\ -+ phydm/phydm_lna_sat.o\ -+ phydm/phydm_pmac_tx_setting.o\ -+ phydm/phydm_mp.o\ -+ phydm/phydm_cck_rx_pathdiv.o\ -+ phydm/phydm_direct_bf.o\ -+ phydm/txbf/phydm_hal_txbf_api.o\ -+ EdcaTurboCheck.o\ -+ phydm/halrf/halrf.o\ -+ phydm/halrf/halrf_debug.o\ -+ phydm/halrf/halphyrf_ap.o\ -+ phydm/halrf/halrf_powertracking_ap.o\ -+ phydm/halrf/halrf_powertracking.o\ -+ phydm/halrf/halrf_kfree.o\ -+ phydm/halrf/halrf_psd.o -+ -+ifeq ($(CONFIG_RTL_88E_SUPPORT),y) -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8188e/halhwimg8188e_bb.o\ -+ phydm/rtl8188e/halhwimg8188e_mac.o\ -+ phydm/rtl8188e/halhwimg8188e_rf.o\ -+ phydm/rtl8188e/phydm_regconfig8188e.o\ -+ phydm/rtl8188e/hal8188erateadaptive.o\ -+ phydm/rtl8188e/phydm_rtl8188e.o\ -+ phydm/halrf/rtl8188e/halrf_8188e_ap.o -+ endif -+endif -+ -+ifeq ($(CONFIG_RTL_8812_SUPPORT),y) -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += ./phydm/halrf/rtl8812a/halrf_8812a_ap.o -+ endif -+ _PHYDM_FILES += phydm/rtl8812a/phydm_rtl8812a.o -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8881A),y) -+ _PHYDM_FILES += phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.o -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8192EE),y) -+ _PHYDM_FILES += \ -+ phydm/halrf/rtl8192e/halrf_8192e_ap.o\ -+ phydm/rtl8192e/phydm_rtl8192e.o -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8814AE),y) -+ rtl8192cd-objs += phydm/halrf/rtl8814a/halrf_8814a_ap.o -+ rtl8192cd-objs += phydm/halrf/rtl8814a/halrf_iqk_8814a.o -+ rtl8192cd-objs += phydm/halrf/rtl8814a/halhwimg8814a_rf.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ rtl8192cd-objs += \ -+ phydm/rtl8814a/halhwimg8814a_bb.o\ -+ phydm/rtl8814a/halhwimg8814a_mac.o\ -+ phydm/rtl8814a/phydm_regconfig8814a.o\ -+ phydm/rtl8814a/phydm_rtl8814a.o -+ endif -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8822BE),y) -+ _PHYDM_FILES += phydm/halrf/rtl8822b/halrf_8822b.o -+ _PHYDM_FILES += phydm/halrf/rtl8822b/halrf_iqk_8822b.o -+ _PHYDM_FILES += phydm/halrf/rtl8822b/halhwimg8822b_rf.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8822b/halhwimg8822b_bb.o\ -+ phydm/rtl8822b/halhwimg8822b_mac.o\ -+ phydm/rtl8822b/phydm_regconfig8822b.o\ -+ phydm/rtl8822b/phydm_hal_api8822b.o\ -+ phydm/rtl8822b/phydm_rtl8822b.o -+ endif -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8822CE),y) -+ _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_8822c.o -+ _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_iqk_8822c.o -+ _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_dpk_8822c.o -+ _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_rfk_init_8822c.o -+ _PHYDM_FILES += phydm/halrf/rtl8822c/halhwimg8822c_rf.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8822c/halhwimg8822c_bb.o\ -+ phydm/rtl8822c/phydm_regconfig8822c.o\ -+ phydm/rtl8822c/phydm_hal_api8822c.o -+ endif -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8812FE),y) -+ _PHYDM_FILES += phydm/halrf/rtl8812f/halrf_8812f.o -+ _PHYDM_FILES += phydm/halrf/rtl8812f/halrf_iqk_8812f.o -+ _PHYDM_FILES += phydm/halrf/rtl8812f/halrf_dpk_8812f.o -+ _PHYDM_FILES += phydm/halrf/rtl8812f/halrf_tssi_8812f.o -+ _PHYDM_FILES += phydm/halrf/rtl8812f/halrf_rfk_init_8812f.o -+ _PHYDM_FILES += phydm/halrf/rtl8812f/halhwimg8812f_rf.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8812f/halhwimg8812f_bb.o\ -+ phydm/rtl8812f/phydm_regconfig8812f.o\ -+ phydm/rtl8812f/phydm_hal_api8812f.o\ -+ phydm/rtl8812f/phydm_rtl8812f.o -+ endif -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8821CE),y) -+ _PHYDM_FILES += phydm/halrf/rtl8821c/halrf_8821c.o -+ _PHYDM_FILES += phydm/halrf/rtl8821c/halrf_iqk_8821c.o -+ _PHYDM_FILES += phydm/halrf/rtl8821c/halhwimg8821c_rf.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8821c/halhwimg8821c_bb.o\ -+ phydm/rtl8821c/halhwimg8821c_mac.o\ -+ phydm/rtl8821c/phydm_regconfig8821c.o\ -+ phydm/rtl8821c/phydm_hal_api8821c.o\ -+ phydm/rtl8821c/phydm_rtl8821c.o -+ endif -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8197F),y) -+ _PHYDM_FILES += phydm/halrf/rtl8197f/halrf_8197f.o -+ _PHYDM_FILES += phydm/halrf/rtl8197f/halrf_iqk_8197f.o -+ _PHYDM_FILES += phydm/halrf/rtl8197f/halrf_dpk_8197f.o -+ _PHYDM_FILES += phydm/halrf/rtl8197f/halhwimg8197f_rf.o -+ _PHYDM_FILES += efuse_97f/efuse.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8197f/halhwimg8197f_bb.o\ -+ phydm/rtl8197f/halhwimg8197f_mac.o\ -+ phydm/rtl8197f/phydm_hal_api8197f.o\ -+ phydm/rtl8197f/phydm_regconfig8197f.o\ -+ phydm/rtl8197f/phydm_rtl8197f.o -+ endif -+endif -+ -+ -+ifeq ($(CONFIG_WLAN_HAL_8192FE),y) -+ _PHYDM_FILES += phydm/halrf/rtl8192f/halrf_8192f.o -+ _PHYDM_FILES += phydm/halrf/rtl8192f/halrf_dpk_8192f.o -+ _PHYDM_FILES += phydm/halrf/rtl8192f/halhwimg8192f_rf.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8192f/halhwimg8192f_bb.o\ -+ phydm/rtl8192f/halhwimg8192f_mac.o\ -+ phydm/rtl8192f/phydm_hal_api8192f.o\ -+ phydm/rtl8192f/phydm_regconfig8192f.o\ -+ phydm/rtl8192f/phydm_rtl8192f.o -+ endif -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8198F),y) -+ _PHYDM_FILES += phydm/halrf/rtl8198f/halrf_8198f.o -+ _PHYDM_FILES += phydm/halrf/rtl8198f/halrf_iqk_8198f.o -+ _PHYDM_FILES += phydm/halrf/rtl8198f/halrf_dpk_8198f.o -+ _PHYDM_FILES += phydm/halrf/rtl8198f/halrf_rfk_init_8198f.o -+ _PHYDM_FILES += phydm/halrf/rtl8198f/halhwimg8198f_rf.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8198f/phydm_hal_api8198f.o\ -+ phydm/rtl8198f/halhwimg8198f_bb.o\ -+ phydm/rtl8198f/halhwimg8198f_mac.o\ -+ phydm/rtl8198f/phydm_regconfig8198f.o \ -+ phydm/halrf/rtl8198f/halrf_8198f.o -+ endif -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8814BE),y) -+ _PHYDM_FILES += phydm/halrf/rtl8814b/halrf_8814b.o -+ _PHYDM_FILES += phydm/halrf/rtl8814b/halrf_iqk_8814b.o -+ _PHYDM_FILES += phydm/halrf/rtl8814b/halrf_dpk_8814b.o -+ _PHYDM_FILES += phydm/halrf/rtl8814b/halrf_txgapk_8814b.o -+ _PHYDM_FILES += phydm/halrf/rtl8814b/halrf_rfk_init_8814b.o -+ _PHYDM_FILES += phydm/halrf/rtl8814b/halhwimg8814b_rf.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8814b/phydm_hal_api8814b.o\ -+ phydm/rtl8814b/halhwimg8814b_bb.o\ -+ phydm/rtl8814b/phydm_regconfig8814b.o \ -+ phydm/rtl8814b/phydm_extraagc8814b.o \ -+ phydm/halrf/rtl8814b/halrf_8814b.o -+ endif -+endif -+ -+ifeq ($(CONFIG_WLAN_HAL_8197G),y) -+ _PHYDM_FILES += phydm/halrf/rtl8197g/halrf_8197g.o -+ _PHYDM_FILES += phydm/halrf/rtl8197g/halrf_iqk_8197g.o -+ _PHYDM_FILES += phydm/halrf/rtl8197g/halrf_dpk_8197g.o -+ _PHYDM_FILES += phydm/halrf/rtl8197g/halrf_tssi_8197g.o -+ _PHYDM_FILES += phydm/halrf/rtl8197g/halrf_rfk_init_8197g.o -+ _PHYDM_FILES += phydm/halrf/rtl8197g/halhwimg8197g_rf.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8197g/phydm_hal_api8197g.o\ -+ phydm/rtl8197g/halhwimg8197g_bb.o\ -+ phydm/rtl8197g/halhwimg8197g_mac.o\ -+ phydm/rtl8197g/phydm_regconfig8197g.o \ -+ phydm/rtl8197g/phydm_rtl8197g.o \ -+ phydm/halrf/rtl8197g/halrf_8197g.o -+ endif -+endif -+ifeq ($(CONFIG_WLAN_HAL_8723FE),y) -+ _PHYDM_FILES += phydm/halrf/rtl8723f/halrf_8723f.o -+ _PHYDM_FILES += phydm/halrf/rtl8723f/halrf_iqk_8723f.o -+ _PHYDM_FILES += phydm/halrf/rtl8723f/halrf_dpk_8723f.o -+ _PHYDM_FILES += phydm/halrf/rtl8723f/halrf_rfk_init_8723f.o -+ _PHYDM_FILES += phydm/halrf/rtl8723f/halhwimg8723f_rf.o -+ ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) -+ _PHYDM_FILES += \ -+ phydm/rtl8723f/halhwimg8723f_bb.o\ -+ phydm/rtl8723f/phydm_regconfig8723f.o\ -+ phydm/rtl8723f/phydm_hal_api8723f.o -+ endif -+endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halhwimg.h b/drivers/staging/rtl8723cs/hal/phydm/halhwimg.h -new file mode 100644 -index 000000000000..6d658b3935ed ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halhwimg.h -@@ -0,0 +1,137 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#pragma once -+#ifndef __INC_HW_IMG_H -+#define __INC_HW_IMG_H -+ -+/*@ -+ * 2011/03/15 MH Add for different IC HW image file selection. code size consideration. -+ * */ -+#if RT_PLATFORM == PLATFORM_LINUX -+ -+ #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ /* @For 92C */ -+ #define RTL8192CE_HWIMG_SUPPORT 1 -+ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192CU_HWIMG_SUPPORT 0 -+ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 -+ -+ /* @For 92D */ -+ #define RTL8192DE_HWIMG_SUPPORT 1 -+ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192DU_HWIMG_SUPPORT 0 -+ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 -+ -+ /* @For 8723 */ -+ #define RTL8723E_HWIMG_SUPPORT 1 -+ #define RTL8723U_HWIMG_SUPPORT 0 -+ #define RTL8723S_HWIMG_SUPPORT 0 -+ -+ /* @For 88E */ -+ #define RTL8188EE_HWIMG_SUPPORT 0 -+ #define RTL8188EU_HWIMG_SUPPORT 0 -+ #define RTL8188ES_HWIMG_SUPPORT 0 -+ -+ #elif (DEV_BUS_TYPE == RT_USB_INTERFACE) -+ /* @For 92C */ -+ #define RTL8192CE_HWIMG_SUPPORT 0 -+ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192CU_HWIMG_SUPPORT 1 -+ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 -+ -+ /* @For 92D */ -+ #define RTL8192DE_HWIMG_SUPPORT 0 -+ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192DU_HWIMG_SUPPORT 1 -+ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 -+ -+ /* @For 8723 */ -+ #define RTL8723E_HWIMG_SUPPORT 0 -+ #define RTL8723U_HWIMG_SUPPORT 1 -+ #define RTL8723S_HWIMG_SUPPORT 0 -+ -+ /* @For 88E */ -+ #define RTL8188EE_HWIMG_SUPPORT 0 -+ #define RTL8188EU_HWIMG_SUPPORT 0 -+ #define RTL8188ES_HWIMG_SUPPORT 0 -+ -+ #elif (DEV_BUS_TYPE == RT_SDIO_INTERFACE) -+ /* @For 92C */ -+ #define RTL8192CE_HWIMG_SUPPORT 0 -+ #define RTL8192CE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192CU_HWIMG_SUPPORT 1 -+ #define RTL8192CU_TEST_HWIMG_SUPPORT 0 -+ -+ /* @For 92D */ -+ #define RTL8192DE_HWIMG_SUPPORT 0 -+ #define RTL8192DE_TEST_HWIMG_SUPPORT 0 -+ #define RTL8192DU_HWIMG_SUPPORT 1 -+ #define RTL8192DU_TEST_HWIMG_SUPPORT 0 -+ -+ /* @For 8723 */ -+ #define RTL8723E_HWIMG_SUPPORT 0 -+ #define RTL8723U_HWIMG_SUPPORT 0 -+ #define RTL8723S_HWIMG_SUPPORT 1 -+ -+ /* @For 88E */ -+ #define RTL8188EE_HWIMG_SUPPORT 0 -+ #define RTL8188EU_HWIMG_SUPPORT 0 -+ #define RTL8188ES_HWIMG_SUPPORT 0 -+ #endif -+ -+#else /* PLATFORM_WINDOWS & MacOSX */ -+ -+ /* @For 92C */ -+ #define RTL8192CE_HWIMG_SUPPORT 1 -+ #define RTL8192CE_TEST_HWIMG_SUPPORT 1 -+ #define RTL8192CU_HWIMG_SUPPORT 1 -+ #define RTL8192CU_TEST_HWIMG_SUPPORT 1 -+ -+ /* @For 92D */ -+ #define RTL8192DE_HWIMG_SUPPORT 1 -+ #define RTL8192DE_TEST_HWIMG_SUPPORT 1 -+ #define RTL8192DU_HWIMG_SUPPORT 1 -+ #define RTL8192DU_TEST_HWIMG_SUPPORT 1 -+ -+ #if defined(UNDER_CE) -+ /* @For 8723 */ -+ #define RTL8723E_HWIMG_SUPPORT 0 -+ #define RTL8723U_HWIMG_SUPPORT 0 -+ #define RTL8723S_HWIMG_SUPPORT 1 -+ -+ /* @For 88E */ -+ #define RTL8188EE_HWIMG_SUPPORT 0 -+ #define RTL8188EU_HWIMG_SUPPORT 0 -+ #define RTL8188ES_HWIMG_SUPPORT 0 -+ -+ #else -+ -+ /* @For 8723 */ -+ #define RTL8723E_HWIMG_SUPPORT 1 -+ /* @#define RTL_8723E_TEST_HWIMG_SUPPORT 1 */ -+ #define RTL8723U_HWIMG_SUPPORT 1 -+ /* @#define RTL_8723U_TEST_HWIMG_SUPPORT 1 */ -+ #define RTL8723S_HWIMG_SUPPORT 1 -+ /* @#define RTL_8723S_TEST_HWIMG_SUPPORT 1 */ -+ -+ /* @For 88E */ -+ #define RTL8188EE_HWIMG_SUPPORT 1 -+ #define RTL8188EU_HWIMG_SUPPORT 1 -+ #define RTL8188ES_HWIMG_SUPPORT 1 -+ #endif -+ -+#endif -+ -+#endif /* @__INC_HW_IMG_H */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ap.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ap.c -new file mode 100644 -index 000000000000..857f01946842 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ap.c -@@ -0,0 +1,1674 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifndef index_mapping_NUM_88E -+ #define index_mapping_NUM_88E 15 -+#endif -+ -+/* #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) */ -+ -+#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \ -+ do {\ -+ for (_offset = 0; _offset < _size; _offset++) { \ -+ \ -+ if (_delta_thermal < thermal_threshold[_direction][_offset]) { \ -+ \ -+ if (_offset != 0)\ -+ _offset--;\ -+ break;\ -+ } \ -+ } \ -+ if (_offset >= _size)\ -+ _offset = _size-1;\ -+ } while (0) -+ -+void odm_clear_txpowertracking_state( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+ u8 i; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>%s\n", __func__); -+ -+ for (i = 0; i < MAX_RF_PATH; i++) { -+ cali_info->absolute_ofdm_swing_idx[i] = 0; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "cali_info->absolute_ofdm_swing_idx[%d]=%d\n", -+ i, cali_info->absolute_ofdm_swing_idx[i]); -+ } -+ -+ dm->rf_calibrate_info.thermal_value = 0; -+ dm->rf_calibrate_info.thermal_value_lck = 0; -+ dm->rf_calibrate_info.thermal_value_iqk = 0; -+} -+ -+void configure_txpower_track( -+ void *dm_void, -+ struct txpwrtrack_cfg *config -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if RTL8812A_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ /* if (IS_HARDWARE_TYPE_8812(dm->adapter)) */ -+ if (dm->support_ic_type == ODM_RTL8812) -+ configure_txpower_track_8812a(config); -+ /* else */ -+#endif -+#endif -+ -+#if RTL8814A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8814A) -+ configure_txpower_track_8814a(config); -+#endif -+ -+ -+#if RTL8188E_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8188E) -+ configure_txpower_track_8188e(config); -+#endif -+ -+#if RTL8197F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8197F) -+ configure_txpower_track_8197f(config); -+#endif -+ -+#if RTL8822B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8822B) -+ configure_txpower_track_8822b(config); -+#endif -+ -+#if RTL8192F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8192F) -+ configure_txpower_track_8192f(config); -+#endif -+ -+#if RTL8198F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8198F) -+ configure_txpower_track_8198f(config); -+#endif -+ -+#if RTL8814B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8814B) -+ configure_txpower_track_8814b(config); -+#endif -+ -+#if RTL8812F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8812F) -+ configure_txpower_track_8812f(config); -+#endif -+ -+#if RTL8197G_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8197G) -+ configure_txpower_track_8197g(config); -+#endif -+ -+} -+ -+#if (RTL8192E_SUPPORT == 1) -+void -+odm_txpowertracking_callback_thermal_meter_92e( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ u8 thermal_value = 0, delta, delta_IQK, delta_LCK, channel, is_decrease, rf_mimo_mode; -+ u8 thermal_value_avg_count = 0; -+ u8 OFDM_min_index = 10; /* OFDM BB Swing should be less than +2.5dB, which is required by Arthur */ -+ s8 OFDM_index[2], index ; -+ u32 thermal_value_avg = 0, reg0x18; -+ u32 i = 0, j = 0, rf; -+ s32 value32, CCK_index = 0, ele_A, ele_D, ele_C, X, Y; -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+ rf_mimo_mode = dm->rf_type; -+ /* RF_DBG(dm,DBG_RF_TX_PWR_TRACK,"%s:%d rf_mimo_mode:%d\n", __FUNCTION__, __LINE__, rf_mimo_mode); */ -+ -+#ifdef MP_TEST -+ if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) { -+ channel = priv->pshare->working_channel; -+ if (priv->pshare->mp_txpwr_tracking == false) -+ return; -+ } else -+#endif -+ { -+ channel = (priv->pmib->dot11RFEntry.dot11channel); -+ } -+ -+ thermal_value = (unsigned char)odm_get_rf_reg(dm, RF_PATH_A, ODM_RF_T_METER_92E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); -+ -+ -+ switch (rf_mimo_mode) { -+ case RF_1T1R: -+ rf = 1; -+ break; -+ case RF_2T2R: -+ rf = 2; -+ break; -+ default: -+ rf = 2; -+ break; -+ } -+ -+ /* Query OFDM path A default setting Bit[31:21] */ -+ ele_D = phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKOFDM_D); -+ for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) { -+ if (ele_D == (ofdm_swing_table_92e[i] >> 22)) { -+ OFDM_index[0] = (unsigned char)i; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "PathA 0xC80[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[0]); -+ break; -+ } -+ } -+ -+ /* Query OFDM path B default setting */ -+ if (rf_mimo_mode == RF_2T2R) { -+ ele_D = phy_query_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKOFDM_D); -+ for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) { -+ if (ele_D == (ofdm_swing_table_92e[i] >> 22)) { -+ OFDM_index[1] = (unsigned char)i; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "PathB 0xC88[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[1]); -+ break; -+ } -+ } -+ } -+ -+ /* calculate average thermal meter */ -+ { -+ priv->pshare->thermal_value_avg_88xx[priv->pshare->thermal_value_avg_index_88xx] = thermal_value; -+ priv->pshare->thermal_value_avg_index_88xx++; -+ if (priv->pshare->thermal_value_avg_index_88xx == AVG_THERMAL_NUM_88XX) -+ priv->pshare->thermal_value_avg_index_88xx = 0; -+ -+ for (i = 0; i < AVG_THERMAL_NUM_88XX; i++) { -+ if (priv->pshare->thermal_value_avg_88xx[i]) { -+ thermal_value_avg += priv->pshare->thermal_value_avg_88xx[i]; -+ thermal_value_avg_count++; -+ } -+ } -+ -+ if (thermal_value_avg_count) { -+ thermal_value = (unsigned char)(thermal_value_avg / thermal_value_avg_count); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "AVG Thermal Meter = 0x%x\n", thermal_value); -+ } -+ } -+ -+ /* Initialize */ -+ if (!priv->pshare->thermal_value) { -+ priv->pshare->thermal_value = priv->pmib->dot11RFEntry.ther; -+ priv->pshare->thermal_value_iqk = thermal_value; -+ priv->pshare->thermal_value_lck = thermal_value; -+ } -+ -+ if (thermal_value != priv->pshare->thermal_value) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** START POWER TRACKING ********\n"); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); -+ -+ delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther); -+ delta_IQK = RTL_ABS(thermal_value, priv->pshare->thermal_value_iqk); -+ delta_LCK = RTL_ABS(thermal_value, priv->pshare->thermal_value_lck); -+ is_decrease = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 1 : 0); -+ -+#ifdef _TRACKING_TABLE_FILE -+ if (priv->pshare->rf_ft_var.pwr_track_file) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)); -+ -+ if (is_decrease) { -+ for (i = 0; i < rf; i++) { -+ OFDM_index[i] = priv->pshare->OFDM_index0[i] + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0); -+ OFDM_index[i] = ((OFDM_index[i] > (OFDM_TABLE_SIZE_92E- 1)) ? (OFDM_TABLE_SIZE_92E - 1) : OFDM_index[i]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)); -+ CCK_index = priv->pshare->CCK_index0 + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1); -+ CCK_index = ((CCK_index > (CCK_TABLE_SIZE_92E - 1)) ? (CCK_TABLE_SIZE_92E - 1) : CCK_index); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> Decrese power ---> new CCK_INDEX:%d (%d + %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)); -+ } -+ } else { -+ for (i = 0; i < rf; i++) { -+ OFDM_index[i] = priv->pshare->OFDM_index0[i] - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0); -+ OFDM_index[i] = ((OFDM_index[i] < OFDM_min_index) ? OFDM_min_index : OFDM_index[i]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> Increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)); -+ CCK_index = priv->pshare->CCK_index0 - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1); -+ CCK_index = ((CCK_index < 0) ? 0 : CCK_index); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> Increse power ---> new CCK_INDEX:%d (%d - %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)); -+ } -+ } -+ } -+#endif /* CFG_TRACKING_TABLE_FILE */ -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[0]]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "ofdm_swing_table_92e[(unsigned int)OFDM_index[1]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[1]]); -+ -+ /* Adujst OFDM Ant_A according to IQK result */ -+ ele_D = (ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] & 0xFFC00000) >> 22; -+ X = priv->pshare->rege94; -+ Y = priv->pshare->rege9c; -+ -+ if (X != 0) { -+ if ((X & 0x00000200) != 0) -+ X = X | 0xFFFFFC00; -+ ele_A = ((X * ele_D) >> 8) & 0x000003FF; -+ -+ /* new element C = element D x Y */ -+ if ((Y & 0x00000200) != 0) -+ Y = Y | 0xFFFFFC00; -+ ele_C = ((Y * ele_D) >> 8) & 0x000003FF; -+ -+ /* wirte new elements A, C, D to regC80 and regC94, element B is always 0 */ -+ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; -+ phy_set_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, value32); -+ -+ value32 = (ele_C & 0x000003C0) >> 6; -+ phy_set_bb_reg(priv, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, value32); -+ -+ value32 = ((X * ele_D) >> 7) & 0x01; -+ phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(24), value32); -+ } else { -+ phy_set_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_92e[(unsigned int)OFDM_index[0]]); -+ phy_set_bb_reg(priv, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, 0x00); -+ phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(24), 0x00); -+ } -+ -+ set_CCK_swing_index(priv, CCK_index); -+ -+ if (rf == 2) { -+ ele_D = (ofdm_swing_table_92e[(unsigned int)OFDM_index[1]] & 0xFFC00000) >> 22; -+ X = priv->pshare->regeb4; -+ Y = priv->pshare->regebc; -+ -+ if (X != 0) { -+ if ((X & 0x00000200) != 0) /* consider minus */ -+ X = X | 0xFFFFFC00; -+ ele_A = ((X * ele_D) >> 8) & 0x000003FF; -+ -+ /* new element C = element D x Y */ -+ if ((Y & 0x00000200) != 0) -+ Y = Y | 0xFFFFFC00; -+ ele_C = ((Y * ele_D) >> 8) & 0x00003FF; -+ -+ /* wirte new elements A, C, D to regC88 and regC9C, element B is always 0 */ -+ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; -+ phy_set_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD, value32); -+ -+ value32 = (ele_C & 0x000003C0) >> 6; -+ phy_set_bb_reg(priv, REG_OFDM_0_XD_TX_AFE, MASKH4BITS, value32); -+ -+ value32 = ((X * ele_D) >> 7) & 0x01; -+ phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(28), value32); -+ } else { -+ phy_set_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_92e[(unsigned int)OFDM_index[1]]); -+ phy_set_bb_reg(priv, REG_OFDM_0_XD_TX_AFE, MASKH4BITS, 0x00); -+ phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(28), 0x00); -+ } -+ -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xc80 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD)); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xc88 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD)); -+ -+ if ((delta_IQK > 3) && (!iqk_info->rfk_forbidden)) { -+ priv->pshare->thermal_value_iqk = thermal_value; -+#ifdef MP_TEST -+#endif if (!(*(dm->mp_mode) && (OPMODE & (WIFI_MP_CTX_BACKGROUND | WIFI_MP_CTX_PACKET)))) -+ -+ halrf_iqk_trigger(dm, false); -+ } -+ -+ if ((delta_LCK > 8) && (!iqk_info->rfk_forbidden)) { -+ RTL_W8(0x522, 0xff); -+ reg0x18 = phy_query_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, 1); -+ phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 1); -+ phy_set_rf_reg(priv, RF_PATH_A, 0x18, BIT(15), 1); -+ delay_ms(1); -+ phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0); -+ phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18); -+ RTL_W8(0x522, 0x0); -+ priv->pshare->thermal_value_lck = thermal_value; -+ } -+ } -+ -+ /* update thermal meter value */ -+ priv->pshare->thermal_value = thermal_value; -+ for (i = 0 ; i < rf ; i++) -+ priv->pshare->OFDM_index[i] = OFDM_index[i]; -+ priv->pshare->CCK_index = CCK_index; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__); -+} -+#endif -+ -+#if (RTL8814B_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8197G_SUPPORT == 1) -+void -+odm_txpowertracking_callback_thermal_meter_jaguar_series4(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; -+ struct rtl8192cd_priv *priv = dm->priv; -+ struct txpwrtrack_cfg c; -+ -+ if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) -+ return; -+ -+ u8 thermal_value[MAX_RF_PATH] = {0}, delta[MAX_RF_PATH] = {0}; -+ u8 delta_swing_table_idx_tup[DELTA_SWINGIDX_SIZE] = {0}; -+ u8 delta_swing_table_idx_tdown[DELTA_SWINGIDX_SIZE] = {0}; -+ u8 delta_LCK = 0, delta_IQK = 0, i = 0, j = 0, p; -+ u8 thermal_value_avg_count[MAX_RF_PATH] = {0}; -+ u32 thermal_value_avg[MAX_RF_PATH] = {0}; -+ s8 thermal_value_temp[MAX_RF_PATH] = {0}; -+ -+ u8 *pwrtrk_tab_up_a = NULL; -+ u8 *pwrtrk_tab_down_a = NULL; -+ u8 *pwrtrk_tab_up_b = NULL; -+ u8 *pwrtrk_tab_down_b = NULL; -+ u8 *pwrtrk_tab_up_c = NULL; -+ u8 *pwrtrk_tab_down_c = NULL; -+ u8 *pwrtrk_tab_up_d = NULL; -+ u8 *pwrtrk_tab_down_d = NULL; -+ u8 tracking_method = MIX_MODE; -+ -+ configure_txpower_track(dm, &c); -+ -+ (*c.get_delta_swing_table)(dm, -+ (u8 **)&pwrtrk_tab_up_a, (u8 **)&pwrtrk_tab_down_a, -+ (u8 **)&pwrtrk_tab_up_b, (u8 **)&pwrtrk_tab_down_b); -+ -+ if (GET_CHIP_VER(priv) == VERSION_8814B) { -+ (*c.get_delta_swing_table8814only)(dm, -+ (u8 **)&pwrtrk_tab_up_c, (u8 **)&pwrtrk_tab_down_c, -+ (u8 **)&pwrtrk_tab_up_d, (u8 **)&pwrtrk_tab_down_d); -+ } -+ -+ cali_info->txpowertracking_callback_cnt++; -+ cali_info->is_txpowertracking_init = true; -+ -+ /* Initialize */ -+ if (!dm->rf_calibrate_info.thermal_value) -+ dm->rf_calibrate_info.thermal_value = -+ priv->pmib->dot11RFEntry.thermal[RF_PATH_A]; -+ -+ if (!dm->rf_calibrate_info.thermal_value_lck) -+ dm->rf_calibrate_info.thermal_value_lck = -+ priv->pmib->dot11RFEntry.thermal[RF_PATH_A]; -+ -+ if (!dm->rf_calibrate_info.thermal_value_iqk) -+ dm->rf_calibrate_info.thermal_value_iqk = -+ priv->pmib->dot11RFEntry.thermal[RF_PATH_A]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", -+ cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base_path[RF_PATH_A], cali_info->default_ofdm_index); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->txpowertrack_control=%d\n", cali_info->txpowertrack_control); -+ -+ for (i = 0; i < c.rf_path_count; i++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "PGthermal[%d]=0x%x(%d)\n", i, -+ priv->pmib->dot11RFEntry.thermal[i], -+ priv->pmib->dot11RFEntry.thermal[i]); -+ -+ if (priv->pmib->dot11RFEntry.thermal[i] == 0xff || -+ priv->pmib->dot11RFEntry.thermal[i] == 0x0) -+ return; -+ } -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F)) { -+ for (i = 0; i < c.rf_path_count; i++) -+ thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0x7e); /* 0x42: RF Reg[6:1] Thermal Trim*/ -+ } else if (dm->support_ic_type == ODM_RTL8197G) { -+ for (i = 0; i < c.rf_path_count; i++) -+ thermal_value[i] = (u8)odm_get_rf_reg(dm, i, RF_0xf6, 0x7E000); -+ } else { -+ for (i = 0; i < c.rf_path_count; i++) { -+ thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ -+ -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_multi_thermal_offset(dm, i); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "thermal_value_temp[%d](%d) = thermal_value[%d](%d) + multi_thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_multi_thermal_offset(dm, i)); -+ } else { -+ thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "thermal_value_temp[%d](%d) = thermal_value[%d](%d) + thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm)); -+ } -+ -+ if (thermal_value_temp[i] > 63) -+ thermal_value[i] = 63; -+ else if (thermal_value_temp[i] < 0) -+ thermal_value[i] = 0; -+ else -+ thermal_value[i] = thermal_value_temp[i]; -+ } -+ } -+ -+ for (j = 0; j < c.rf_path_count; j++) { -+ cali_info->thermal_value_avg_path[j][cali_info->thermal_value_avg_index_path[j]] = thermal_value[j]; -+ cali_info->thermal_value_avg_index_path[j]++; -+ if (cali_info->thermal_value_avg_index_path[j] == c.average_thermal_num) /*Average times = c.average_thermal_num*/ -+ cali_info->thermal_value_avg_index_path[j] = 0; -+ -+ -+ for (i = 0; i < c.average_thermal_num; i++) { -+ if (cali_info->thermal_value_avg_path[j][i]) { -+ thermal_value_avg[j] += cali_info->thermal_value_avg_path[j][i]; -+ thermal_value_avg_count[j]++; -+ } -+ } -+ -+ if (thermal_value_avg_count[j]) { /* Calculate Average thermal_value after average enough times */ -+ thermal_value[j] = (u8)(thermal_value_avg[j] / thermal_value_avg_count[j]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "PGthermal[%d] = 0x%x(%d), AVG Thermal Meter = 0x%x(%d)\n", j, -+ priv->pmib->dot11RFEntry.thermal[j], -+ priv->pmib->dot11RFEntry.thermal[j], -+ thermal_value[j], -+ thermal_value[j]); -+ } -+ /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ -+ -+ /* "delta" here is used to determine whether thermal value changes or not. */ -+ delta[j] = RTL_ABS(thermal_value[j], priv->pmib->dot11RFEntry.thermal[j]); -+ delta_LCK = RTL_ABS(thermal_value[RF_PATH_A], dm->rf_calibrate_info.thermal_value_lck); -+ delta_IQK = RTL_ABS(thermal_value[RF_PATH_A], dm->rf_calibrate_info.thermal_value_iqk); -+ } -+ -+ /*4 6. If necessary, do LCK.*/ -+ for (i = 0; i < c.rf_path_count; i++) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", i, delta[i], delta_LCK, delta_IQK); -+ -+ /* Wait sacn to do LCK by RF Jenyu*/ -+ if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { -+ /* Delta temperature is equal to or larger than 20 centigrade.*/ -+ if (delta_LCK >= c.threshold_iqk) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); -+ cali_info->thermal_value_lck = thermal_value[RF_PATH_A]; -+ -+ /*Use RTLCK, so close power tracking driver LCK*/ -+ if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) { -+ if (c.phy_lc_calibrate) -+ (*c.phy_lc_calibrate)(dm); -+ } else -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do not do LCK\n"); -+ } -+ } -+ -+ /*3 7. If necessary, move the index of swing table to adjust Tx power.*/ -+#ifdef _TRACKING_TABLE_FILE -+ for (i = 0; i < c.rf_path_count; i++) { -+ if (i == RF_PATH_B) { -+ odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_b, DELTA_SWINGIDX_SIZE); -+ } else if (i == RF_PATH_C) { -+ odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_c, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_c, DELTA_SWINGIDX_SIZE); -+ } else if (i == RF_PATH_D) { -+ odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_d, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_d, DELTA_SWINGIDX_SIZE); -+ } else { -+ odm_move_memory(dm, delta_swing_table_idx_tup, pwrtrk_tab_up_a, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, pwrtrk_tab_down_a, DELTA_SWINGIDX_SIZE); -+ } -+ -+ cali_info->delta_power_index_last_path[i] = cali_info->delta_power_index_path[i]; /*recording poer index offset*/ -+ delta[i] = thermal_value[i] > priv->pmib->dot11RFEntry.thermal[i] ? (thermal_value[i] - priv->pmib->dot11RFEntry.thermal[i]) : (priv->pmib->dot11RFEntry.thermal[i] - thermal_value[i]); -+ -+ if (delta[i] >= TXPWR_TRACK_TABLE_SIZE) -+ delta[i] = TXPWR_TRACK_TABLE_SIZE - 1; -+ -+ if (thermal_value[i] > priv->pmib->dot11RFEntry.thermal[i]) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tup[delta[i]], i); -+ -+ cali_info->delta_power_index_path[i] = delta_swing_table_idx_tup[delta[i]]; -+ cali_info->absolute_ofdm_swing_idx[i] = delta_swing_table_idx_tup[delta[i]]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tdown[delta[i]], i); -+ cali_info->delta_power_index_path[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; -+ cali_info->absolute_ofdm_swing_idx[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); -+ } -+ } -+ -+#endif -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ if (cali_info->delta_power_index_path[p] == cali_info->delta_power_index_last_path[p]) /*If Thermal value changes but lookup table value still the same*/ -+ cali_info->power_index_offset_path[p] = 0; -+ else -+ cali_info->power_index_offset_path[p] = cali_info->delta_power_index_path[p] - cali_info->delta_power_index_last_path[p]; /*Power index diff between 2 times Power Tracking*/ -+ } -+ -+#if 0 -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0); -+ } -+#else -+ if (*dm->mp_mode == 1) { -+ if (cali_info->txpowertrack_control == 1) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ tracking_method = MIX_MODE; -+ } else if (cali_info->txpowertrack_control == 3) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n"); -+ tracking_method = TSSI_MODE; -+ } -+ } else { -+ if (dm->priv->pmib->dot11RFEntry.tssi_enable == 0) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ tracking_method = MIX_MODE; -+ } else if (dm->priv->pmib->dot11RFEntry.tssi_enable == 1) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n"); -+ tracking_method = TSSI_MODE; -+ } -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8822C || dm->support_ic_type == ODM_RTL8812F || -+ dm->support_ic_type == ODM_RTL8814B || dm->support_ic_type == ODM_RTL8197G) -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, tracking_method, p, 0); -+ -+#endif -+ /* Wait sacn to do IQK by RF Jenyu*/ -+ if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden) && (dm->is_linked || *dm->mp_mode)) { -+ /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ -+ if (delta_IQK >= c.threshold_iqk) { -+ cali_info->thermal_value_iqk = thermal_value[RF_PATH_A]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); -+ -+ /*if (!cali_info->is_iqk_in_progress)*/ -+ /* (*c.do_iqk)(dm, delta_IQK, thermal_value[RF_PATH_A], 8);*/ -+ /*RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do IQK\n");*/ -+ -+ /*if (!cali_info->is_iqk_in_progress)*/ -+ /* (*c.do_tssi_dck)(dm, true);*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do TSSI DCK\n"); -+ } -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__); -+ -+ cali_info->tx_powercount = 0; -+} -+#endif -+ -+#if (RTL8197F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\ -+ RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1) -+void -+odm_txpowertracking_callback_thermal_meter_jaguar_series3( -+ void *dm_void -+) -+{ -+#if 1 -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase; -+ u8 thermal_value_avg_count = 0, p = 0, i = 0; -+ u32 thermal_value_avg = 0; -+ struct rtl8192cd_priv *priv = dm->priv; -+ struct txpwrtrack_cfg c; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ /*The following tables decide the final index of OFDM/CCK swing table.*/ -+ u8 *pwrtrk_tab_up_a = NULL, *pwrtrk_tab_down_a = NULL; -+ u8 *pwrtrk_tab_up_b = NULL, *pwrtrk_tab_down_b = NULL; -+ u8 *pwrtrk_tab_up_cck_a = NULL, *pwrtrk_tab_down_cck_a = NULL; -+ u8 *pwrtrk_tab_up_cck_b = NULL, *pwrtrk_tab_down_cck_b = NULL; -+ /*for 8814 add by Yu Chen*/ -+ u8 *pwrtrk_tab_up_c = NULL, *pwrtrk_tab_down_c = NULL; -+ u8 *pwrtrk_tab_up_d = NULL, *pwrtrk_tab_down_d = NULL; -+ u8 *pwrtrk_tab_up_cck_c = NULL, *pwrtrk_tab_down_cck_c = NULL; -+ u8 *pwrtrk_tab_up_cck_d = NULL, *pwrtrk_tab_down_cck_d = NULL; -+ s8 thermal_value_temp = 0; -+ -+#ifdef MP_TEST -+ if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) { -+ channel = priv->pshare->working_channel; -+ if (priv->pshare->mp_txpwr_tracking == false) -+ return; -+ } else -+#endif -+ { -+ channel = (priv->pmib->dot11RFEntry.dot11channel); -+ } -+ -+ configure_txpower_track(dm, &c); -+ -+ (*c.get_delta_all_swing_table)(dm, -+ (u8 **)&pwrtrk_tab_up_a, (u8 **)&pwrtrk_tab_down_a, -+ (u8 **)&pwrtrk_tab_up_b, (u8 **)&pwrtrk_tab_down_b, -+ (u8 **)&pwrtrk_tab_up_cck_a, (u8 **)&pwrtrk_tab_down_cck_a, -+ (u8 **)&pwrtrk_tab_up_cck_b, (u8 **)&pwrtrk_tab_down_cck_b); -+ -+ if (GET_CHIP_VER(priv) == VERSION_8198F) { -+ (*c.get_delta_all_swing_table_ex)(dm, -+ (u8 **)&pwrtrk_tab_up_c, (u8 **)&pwrtrk_tab_down_c, -+ (u8 **)&pwrtrk_tab_up_d, (u8 **)&pwrtrk_tab_down_d, -+ (u8 **)&pwrtrk_tab_up_cck_c, (u8 **)&pwrtrk_tab_down_cck_c, -+ (u8 **)&pwrtrk_tab_up_cck_d, (u8 **)&pwrtrk_tab_down_cck_d); -+ } -+ /*0x42: RF Reg[15:10] 88E*/ -+ thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); -+#ifdef THER_TRIM -+ if (GET_CHIP_VER(priv) == VERSION_8197F) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"orig thermal_value=%d, ther_trim_val=%d\n", thermal_value, priv->pshare->rf_ft_var.ther_trim_val); -+ -+ thermal_value += priv->pshare->rf_ft_var.ther_trim_val; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"after thermal trim, thermal_value=%d\n", thermal_value); -+ } -+ -+ if (GET_CHIP_VER(priv) == VERSION_8198F) { -+ thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "thermal_value_temp(%d) = ther_value(%d) + ther_trim_ther(%d)\n", -+ thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm)); -+ -+ if (thermal_value_temp > 63) -+ thermal_value = 63; -+ else if (thermal_value_temp < 0) -+ thermal_value = 0; -+ else -+ thermal_value = thermal_value_temp; -+ } -+#endif -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\n\n\nCurrent Thermal = 0x%x(%d) EEPROMthermalmeter 0x%x(%d)\n" -+ , thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther); -+ -+ /* Initialize */ -+ if (!dm->rf_calibrate_info.thermal_value) -+ dm->rf_calibrate_info.thermal_value = priv->pmib->dot11RFEntry.ther; -+ -+ if (!dm->rf_calibrate_info.thermal_value_lck) -+ dm->rf_calibrate_info.thermal_value_lck = priv->pmib->dot11RFEntry.ther; -+ -+ if (!dm->rf_calibrate_info.thermal_value_iqk) -+ dm->rf_calibrate_info.thermal_value_iqk = priv->pmib->dot11RFEntry.ther; -+ -+ /* calculate average thermal meter */ -+ dm->rf_calibrate_info.thermal_value_avg[dm->rf_calibrate_info.thermal_value_avg_index] = thermal_value; -+ dm->rf_calibrate_info.thermal_value_avg_index++; -+ -+ if (dm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num) /*Average times = c.average_thermal_num*/ -+ dm->rf_calibrate_info.thermal_value_avg_index = 0; -+ -+ for (i = 0; i < c.average_thermal_num; i++) { -+ if (dm->rf_calibrate_info.thermal_value_avg[i]) { -+ thermal_value_avg += dm->rf_calibrate_info.thermal_value_avg[i]; -+ thermal_value_avg_count++; -+ } -+ } -+ -+ if (thermal_value_avg_count) {/*Calculate Average thermal_value after average enough times*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"thermal_value_avg=0x%x(%d) thermal_value_avg_count = %d\n" -+ , thermal_value_avg, thermal_value_avg, thermal_value_avg_count); -+ -+ thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"AVG Thermal Meter = 0x%X(%d), EEPROMthermalmeter = 0x%X(%d)\n", thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther); -+ } -+ -+ /*4 Calculate delta, delta_LCK, delta_IQK.*/ -+ delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther); -+ delta_LCK = RTL_ABS(thermal_value, dm->rf_calibrate_info.thermal_value_lck); -+ delta_IQK = RTL_ABS(thermal_value, dm->rf_calibrate_info.thermal_value_iqk); -+ is_increase = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 0 : 1); -+ -+ if (delta > 29) { /* power track table index(thermal diff.) upper bound*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta(%d) > 29, set delta to 29\n", delta); -+ delta = 29; -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK); -+ -+ /*4 if necessary, do LCK.*/ -+ if ((delta_LCK >= c.threshold_iqk) && (!iqk_info->rfk_forbidden)) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); -+ dm->rf_calibrate_info.thermal_value_lck = thermal_value; -+#if (RTL8822B_SUPPORT != 1) -+ if (!(dm->support_ic_type & ODM_RTL8822B)) { -+ if (c.phy_lc_calibrate) -+ (*c.phy_lc_calibrate)(dm); -+ } -+#endif -+ } -+ -+ if (!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ -+ return; -+ -+ /*4 Do Power Tracking*/ -+ -+ if (thermal_value != dm->rf_calibrate_info.thermal_value) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******** START POWER TRACKING ********\n"); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", -+ thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther); -+ -+#ifdef _TRACKING_TABLE_FILE -+ if (priv->pshare->rf_ft_var.pwr_track_file) { -+ if (is_increase) { /*thermal is higher than base*/ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ switch (p) { -+ case RF_PATH_B: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_b[%d] = %d pwrtrk_tab_up_cck_b[%d] = %d\n", delta, pwrtrk_tab_up_b[delta], delta, pwrtrk_tab_up_cck_b[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_b[delta]; -+ cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_b[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_B] = %d pRF->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); -+ break; -+ -+ case RF_PATH_C: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_c[%d] = %d pwrtrk_tab_up_cck_c[%d] = %d\n", delta, pwrtrk_tab_up_c[delta], delta, pwrtrk_tab_up_cck_c[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_c[delta]; -+ cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_c[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_C] = %d pRF->absolute_cck_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); -+ break; -+ -+ case RF_PATH_D: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_d[%d] = %d pwrtrk_tab_up_cck_d[%d] = %d\n", delta, pwrtrk_tab_up_d[delta], delta, pwrtrk_tab_up_cck_d[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_d[delta]; -+ cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_d[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_D] = %d pRF->absolute_cck_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); -+ break; -+ default: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_up_a[%d] = %d pwrtrk_tab_up_cck_a[%d] = %d\n", delta, pwrtrk_tab_up_a[delta], delta, pwrtrk_tab_up_cck_a[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = pwrtrk_tab_up_a[delta]; -+ cali_info->absolute_cck_swing_idx[p] = pwrtrk_tab_up_cck_a[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and pRF->absolute_ofdm_swing_idx[RF_PATH_A] = %d pRF->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); -+ break; -+ } -+ } -+ } else { /* thermal is lower than base*/ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ switch (p) { -+ case RF_PATH_B: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_b[%d] = %d pwrtrk_tab_down_cck_b[%d] = %d\n", delta, pwrtrk_tab_down_b[delta], delta, pwrtrk_tab_down_cck_b[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_b[delta]; -+ cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_b[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_B] = %d pRF->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); -+ break; -+ -+ case RF_PATH_C: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_c[%d] = %d pwrtrk_tab_down_cck_c[%d] = %d\n", delta, pwrtrk_tab_down_c[delta], delta, pwrtrk_tab_down_cck_c[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_c[delta]; -+ cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_c[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_C] = %d pRF->absolute_cck_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); -+ break; -+ -+ case RF_PATH_D: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_d[%d] = %d pwrtrk_tab_down_cck_d[%d] = %d\n", delta, pwrtrk_tab_down_d[delta], delta, pwrtrk_tab_down_cck_d[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_d[delta]; -+ cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_d[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_D] = %d pRF->absolute_cck_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); -+ break; -+ -+ default: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"pwrtrk_tab_down_a[%d] = %d pwrtrk_tab_down_cck_a[%d] = %d\n", delta, pwrtrk_tab_down_a[delta], delta, pwrtrk_tab_down_cck_a[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * pwrtrk_tab_down_a[delta]; -+ cali_info->absolute_cck_swing_idx[p] = -1 * pwrtrk_tab_down_cck_a[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and pRF->absolute_ofdm_swing_idx[RF_PATH_A] = %d pRF->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p], cali_info->absolute_cck_swing_idx[p]); -+ break; -+ } -+ } -+ } -+ -+ if (is_increase) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> increse power --->\n"); -+ if (GET_CHIP_VER(priv) == VERSION_8197F) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0); -+ } else if (GET_CHIP_VER(priv) == VERSION_8192F) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else if (GET_CHIP_VER(priv) == VERSION_8822B) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else if (GET_CHIP_VER(priv) == VERSION_8821C) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else if (GET_CHIP_VER(priv) == VERSION_8198F) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else if (GET_CHIP_VER(priv) == VERSION_8192F) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power --->\n"); -+ if (GET_CHIP_VER(priv) == VERSION_8197F) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0); -+ } else if (GET_CHIP_VER(priv) == VERSION_8192F) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else if (GET_CHIP_VER(priv) == VERSION_8822B) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else if (GET_CHIP_VER(priv) == VERSION_8821C) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else if (GET_CHIP_VER(priv) == VERSION_8198F) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else if (GET_CHIP_VER(priv) == VERSION_8192F) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } -+ } -+ } -+#endif -+ -+ if (GET_CHIP_VER(priv) != VERSION_8198F) { -+ if ((delta_IQK >= c.threshold_iqk) && (!iqk_info->rfk_forbidden) && dm->is_linked) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); -+ dm->rf_calibrate_info.thermal_value_iqk = thermal_value; -+ if (!(dm->support_ic_type & ODM_RTL8197F)) { -+ if (c.do_iqk) -+ (*c.do_iqk)(dm, false, thermal_value, 0); -+ } -+ } -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n\n", __func__); -+ /*update thermal meter value*/ -+ dm->rf_calibrate_info.thermal_value = thermal_value; -+ -+ } -+ -+#endif -+} -+#endif -+ -+/*#if (RTL8814A_SUPPORT == 1)*/ -+#if (RTL8814A_SUPPORT == 1) -+ -+void -+odm_txpowertracking_callback_thermal_meter_jaguar_series2( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase; -+ u8 thermal_value_avg_count = 0, p = 0, i = 0; -+ u32 thermal_value_avg = 0, reg0x18; -+ u32 bb_swing_reg[4] = {REG_A_TX_SCALE_JAGUAR, REG_B_TX_SCALE_JAGUAR, REG_C_TX_SCALE_JAGUAR2, REG_D_TX_SCALE_JAGUAR2}; -+ s32 ele_D; -+ u32 bb_swing_idx; -+ struct rtl8192cd_priv *priv = dm->priv; -+ struct txpwrtrack_cfg c; -+ boolean is_tssi_enable = false; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ /* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */ -+ u8 *delta_swing_table_idx_tup_a = NULL, *delta_swing_table_idx_tdown_a = NULL; -+ u8 *delta_swing_table_idx_tup_b = NULL, *delta_swing_table_idx_tdown_b = NULL; -+ /* for 8814 add by Yu Chen */ -+ u8 *delta_swing_table_idx_tup_c = NULL, *delta_swing_table_idx_tdown_c = NULL; -+ u8 *delta_swing_table_idx_tup_d = NULL, *delta_swing_table_idx_tdown_d = NULL; -+ -+#ifdef MP_TEST -+ if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) { -+ channel = priv->pshare->working_channel; -+ if (priv->pshare->mp_txpwr_tracking == false) -+ return; -+ } else -+#endif -+ { -+ channel = (priv->pmib->dot11RFEntry.dot11channel); -+ } -+ -+ configure_txpower_track(dm, &c); -+ cali_info->default_ofdm_index = priv->pshare->OFDM_index0[RF_PATH_A]; -+ -+ (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, -+ (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b); -+ -+ if (dm->support_ic_type & ODM_RTL8814A) /* for 8814 path C & D */ -+ (*c.get_delta_swing_table8814only)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c, -+ (u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d); -+ -+ thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\nReadback Thermal Meter = 0x%x, pre thermal meter 0x%x, EEPROMthermalmeter 0x%x\n", thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther); -+ -+ /* Initialize */ -+ if (!dm->rf_calibrate_info.thermal_value) -+ dm->rf_calibrate_info.thermal_value = priv->pmib->dot11RFEntry.ther; -+ -+ if (!dm->rf_calibrate_info.thermal_value_lck) -+ dm->rf_calibrate_info.thermal_value_lck = priv->pmib->dot11RFEntry.ther; -+ -+ if (!dm->rf_calibrate_info.thermal_value_iqk) -+ dm->rf_calibrate_info.thermal_value_iqk = priv->pmib->dot11RFEntry.ther; -+ -+ is_tssi_enable = (boolean)odm_get_rf_reg(dm, RF_PATH_A, REG_RF_TX_GAIN_OFFSET, BIT(7)); /* check TSSI enable */ -+ -+ /* 4 Query OFDM BB swing default setting Bit[31:21] */ -+ for (p = RF_PATH_A ; p < c.rf_path_count ; p++) { -+ ele_D = odm_get_bb_reg(dm, bb_swing_reg[p], 0xffe00000); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[p], odm_get_bb_reg(dm, bb_swing_reg[p], MASKDWORD), ele_D); -+ -+ for (bb_swing_idx = 0; bb_swing_idx < TXSCALE_TABLE_SIZE; bb_swing_idx++) {/* 4 */ -+ if (ele_D == tx_scaling_table_jaguar[bb_swing_idx]) { -+ dm->rf_calibrate_info.OFDM_index[p] = (u8)bb_swing_idx; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"OFDM_index[%d]=%d\n", p, dm->rf_calibrate_info.OFDM_index[p]); -+ break; -+ } -+ } -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "kfree_offset[%d]=%d\n", p, cali_info->kfree_offset[p]); -+ -+ } -+ -+ /* calculate average thermal meter */ -+ dm->rf_calibrate_info.thermal_value_avg[dm->rf_calibrate_info.thermal_value_avg_index] = thermal_value; -+ dm->rf_calibrate_info.thermal_value_avg_index++; -+ if (dm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num) /* Average times = c.average_thermal_num */ -+ dm->rf_calibrate_info.thermal_value_avg_index = 0; -+ -+ for (i = 0; i < c.average_thermal_num; i++) { -+ if (dm->rf_calibrate_info.thermal_value_avg[i]) { -+ thermal_value_avg += dm->rf_calibrate_info.thermal_value_avg[i]; -+ thermal_value_avg_count++; -+ } -+ } -+ -+ if (thermal_value_avg_count) { /* Calculate Average thermal_value after average enough times */ -+ thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"AVG Thermal Meter = 0x%X, EEPROMthermalmeter = 0x%X\n", thermal_value, priv->pmib->dot11RFEntry.ther); -+ } -+ -+ /* 4 Calculate delta, delta_LCK, delta_IQK. */ -+ delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther); -+ delta_LCK = RTL_ABS(thermal_value, dm->rf_calibrate_info.thermal_value_lck); -+ delta_IQK = RTL_ABS(thermal_value, dm->rf_calibrate_info.thermal_value_iqk); -+ is_increase = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 0 : 1); -+ -+ /* 4 if necessary, do LCK. */ -+ if (!(dm->support_ic_type & ODM_RTL8821)) { -+ if ((delta_LCK > c.threshold_iqk) && (!iqk_info->rfk_forbidden)) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); -+ dm->rf_calibrate_info.thermal_value_lck = thermal_value; -+ -+ /*Use RTLCK, so close power tracking driver LCK*/ -+#if (RTL8814A_SUPPORT != 1) -+ if (!(dm->support_ic_type & ODM_RTL8814A)) { -+ if (c.phy_lc_calibrate) -+ (*c.phy_lc_calibrate)(dm); -+ } -+#endif -+ } -+ } -+ -+ if ((delta_IQK > c.threshold_iqk) && (!iqk_info->rfk_forbidden)) { -+ panic_printk("%s(%d)\n", __FUNCTION__, __LINE__); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); -+ dm->rf_calibrate_info.thermal_value_iqk = thermal_value; -+ if (c.do_iqk) -+ (*c.do_iqk)(dm, true, 0, 0); -+ } -+ -+ if (!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ -+ return; -+ -+ /* 4 Do Power Tracking */ -+ -+ if (is_tssi_enable == true) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter PURE TSSI MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, TSSI_MODE, p, 0); -+ } else if (thermal_value != dm->rf_calibrate_info.thermal_value) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\n******** START POWER TRACKING ********\n"); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, dm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther); -+ -+#ifdef _TRACKING_TABLE_FILE -+ if (priv->pshare->rf_ft_var.pwr_track_file) { -+ if (is_increase) { /* thermal is higher than base */ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ switch (p) { -+ case RF_PATH_B: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta]; /* Record delta swing for mix mode power tracking */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_C: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta]; /* Record delta swing for mix mode power tracking */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_D: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta]; /* Record delta swing for mix mode power tracking */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ default: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta]; /* Record delta swing for mix mode power tracking */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is higher and dm->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ } -+ } -+ } else { /* thermal is lower than base */ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ switch (p) { -+ case RF_PATH_B: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /* Record delta swing for mix mode power tracking */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_C: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta]; /* Record delta swing for mix mode power tracking */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_D: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta]; /* Record delta swing for mix mode power tracking */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ default: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]); -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /* Record delta swing for mix mode power tracking */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"******Temp is lower and dm->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ } -+ } -+ } -+ -+ if (is_increase) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> increse power --->\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power --->\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } -+ } -+#endif -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__); -+ /* update thermal meter value */ -+ dm->rf_calibrate_info.thermal_value = thermal_value; -+ -+ } -+} -+#endif -+ -+#if (RTL8812A_SUPPORT == 1 || RTL8881A_SUPPORT == 1) -+void -+odm_txpowertracking_callback_thermal_meter_jaguar_series( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ unsigned char thermal_value = 0, delta, delta_LCK, channel, is_decrease; -+ unsigned char thermal_value_avg_count = 0; -+ unsigned int thermal_value_avg = 0, reg0x18; -+ unsigned int bb_swing_reg[4] = {0xc1c, 0xe1c, 0x181c, 0x1a1c}; -+ int ele_D, value32; -+ char OFDM_index[2], index; -+ unsigned int i = 0, j = 0, rf_path, max_rf_path = 2, rf; -+ struct rtl8192cd_priv *priv = dm->priv; -+ unsigned char OFDM_min_index = 7; /* OFDM BB Swing should be less than +2.5dB, which is required by Arthur and Mimic */ -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ -+#ifdef MP_TEST -+ if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) { -+ channel = priv->pshare->working_channel; -+ if (priv->pshare->mp_txpwr_tracking == false) -+ return; -+ } else -+#endif -+ { -+ channel = (priv->pmib->dot11RFEntry.dot11channel); -+ } -+ -+#if RTL8881A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8881A) { -+ max_rf_path = 1; -+ if ((get_bonding_type_8881A() == BOND_8881AM || get_bonding_type_8881A() == BOND_8881AN) -+ && priv->pshare->rf_ft_var.use_intpa8881A && (*dm->band_type == ODM_BAND_2_4G)) -+ OFDM_min_index = 6; /* intPA - upper bond set to +3 dB (base: -2 dB)ot11RFEntry.phy_band_select == PHY_BAND_2G)) */ -+ else -+ OFDM_min_index = 10; /* OFDM BB Swing should be less than +1dB, which is required by Arthur and Mimic */ -+ } -+#endif -+ -+ -+ thermal_value = (unsigned char)phy_query_rf_reg(priv, RF_PATH_A, 0x42, 0xfc00, 1); /* 0x42: RF Reg[15:10] 88E */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); -+ -+ -+ /* 4 Query OFDM BB swing default setting Bit[31:21] */ -+ for (rf_path = 0 ; rf_path < max_rf_path ; rf_path++) { -+ ele_D = phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], MASKDWORD), ele_D); -+ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {/* 4 */ -+ if (ele_D == ofdm_swing_table_8812[i]) { -+ OFDM_index[rf_path] = (unsigned char)i; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "OFDM_index[%d]=%d\n", rf_path, OFDM_index[rf_path]); -+ break; -+ } -+ } -+ } -+#if 0 -+ /* Query OFDM path A default setting Bit[31:21] */ -+ ele_D = phy_query_bb_reg(priv, 0xc1c, 0xffe00000); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xc1c:0x%x ([31:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xc1c, MASKDWORD), ele_D); -+ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {/* 4 */ -+ if (ele_D == ofdm_swing_table_8812[i]) { -+ OFDM_index[0] = (unsigned char)i; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "OFDM_index[0]=%d\n", OFDM_index[0]); -+ break; -+ } -+ } -+ /* Query OFDM path B default setting */ -+ if (rf == 2) { -+ ele_D = phy_query_bb_reg(priv, 0xe1c, 0xffe00000); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "0xe1c:0x%x ([32:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xe1c, MASKDWORD), ele_D); -+ for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) { -+ if (ele_D == ofdm_swing_table_8812[i]) { -+ OFDM_index[1] = (unsigned char)i; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "OFDM_index[1]=%d\n", OFDM_index[1]); -+ break; -+ } -+ } -+ } -+#endif -+ /* Initialize */ -+ if (!priv->pshare->thermal_value) { -+ priv->pshare->thermal_value = priv->pmib->dot11RFEntry.ther; -+ priv->pshare->thermal_value_lck = thermal_value; -+ } -+ -+ /* calculate average thermal meter */ -+ { -+ priv->pshare->thermal_value_avg_8812[priv->pshare->thermal_value_avg_index_8812] = thermal_value; -+ priv->pshare->thermal_value_avg_index_8812++; -+ if (priv->pshare->thermal_value_avg_index_8812 == AVG_THERMAL_NUM_8812) -+ priv->pshare->thermal_value_avg_index_8812 = 0; -+ -+ for (i = 0; i < AVG_THERMAL_NUM_8812; i++) { -+ if (priv->pshare->thermal_value_avg_8812[i]) { -+ thermal_value_avg += priv->pshare->thermal_value_avg_8812[i]; -+ thermal_value_avg_count++; -+ } -+ } -+ -+ if (thermal_value_avg_count) { -+ thermal_value = (unsigned char)(thermal_value_avg / thermal_value_avg_count); -+ /* printk("AVG Thermal Meter = 0x%x\n", thermal_value); */ -+ } -+ } -+ -+ -+ /* 4 If necessary, do power tracking */ -+ -+ if (!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/ -+ return; -+ -+ if (thermal_value != priv->pshare->thermal_value) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** START POWER TRACKING ********\n"); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther); -+ delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther); -+ delta_LCK = RTL_ABS(thermal_value, priv->pshare->thermal_value_lck); -+ is_decrease = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 1 : 0); -+ /* if (*dm->band_type == ODM_BAND_5G) */ -+ { -+#ifdef _TRACKING_TABLE_FILE -+ if (priv->pshare->rf_ft_var.pwr_track_file) { -+ for (rf_path = 0; rf_path < max_rf_path; rf_path++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)); -+ if (is_decrease) { -+ OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] + get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0); -+ OFDM_index[rf_path] = ((OFDM_index[rf_path] > (OFDM_TABLE_SIZE_8812 - 1)) ? (OFDM_TABLE_SIZE_8812 - 1) : OFDM_index[rf_path]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)); -+#if 0/* RTL8881A_SUPPORT */ -+ if (dm->support_ic_type == ODM_RTL8881A) { -+ if (priv->pshare->rf_ft_var.pwrtrk_tx_agc_enable) { -+ if (priv->pshare->add_tx_agc) { /* tx_agc has been added */ -+ add_tx_power88xx_ac(priv, 0); -+ priv->pshare->add_tx_agc = 0; -+ priv->pshare->add_tx_agc_index = 0; -+ } -+ } -+ } -+#endif -+ } else { -+ -+ OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] - get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0); -+#if 0/* RTL8881A_SUPPORT */ -+ if (dm->support_ic_type == ODM_RTL8881A) { -+ if (priv->pshare->rf_ft_var.pwrtrk_tx_agc_enable) { -+ if (OFDM_index[i] < OFDM_min_index) { -+ priv->pshare->add_tx_agc_index = (OFDM_min_index - OFDM_index[i]) / 2; /* Calculate Remnant tx_agc value, 2 index for 1 tx_agc */ -+ add_tx_power88xx_ac(priv, priv->pshare->add_tx_agc_index); -+ priv->pshare->add_tx_agc = 1; /* add_tx_agc Flag = 1 */ -+ OFDM_index[i] = OFDM_min_index; -+ } else { -+ if (priv->pshare->add_tx_agc) { /* tx_agc been added */ -+ priv->pshare->add_tx_agc = 0; -+ priv->pshare->add_tx_agc_index = 0; -+ add_tx_power88xx_ac(priv, 0); /* minus the added TPI */ -+ } -+ } -+ } -+ } -+#else -+ OFDM_index[rf_path] = ((OFDM_index[rf_path] < OFDM_min_index) ? OFDM_min_index : OFDM_index[rf_path]); -+#endif -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, ">>> increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)); -+ } -+ } -+ } -+#endif -+ /* 4 Set new BB swing index */ -+ for (rf_path = 0; rf_path < max_rf_path; rf_path++) { -+ phy_set_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000, ofdm_swing_table_8812[(unsigned int)OFDM_index[rf_path]]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Readback 0x%x[31:21] = 0x%x, OFDM_index:%d\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000), OFDM_index[rf_path]); -+ } -+ -+ } -+ if ((delta_LCK > 8) && (!iqk_info->rfk_forbidden)) { -+ RTL_W8(0x522, 0xff); -+ reg0x18 = phy_query_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, 1); -+ phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 1); -+ phy_set_rf_reg(priv, RF_PATH_A, 0x18, BIT(15), 1); -+ delay_ms(200); /* frequency deviation */ -+ phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0); -+ phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18); -+#ifdef CONFIG_RTL_8812_SUPPORT -+ if (GET_CHIP_VER(priv) == VERSION_8812E) -+ update_bbrf_val8812(priv, priv->pmib->dot11RFEntry.dot11channel); -+#endif -+ RTL_W8(0x522, 0x0); -+ priv->pshare->thermal_value_lck = thermal_value; -+ } -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "\n******** END:%s() ********\n", __FUNCTION__); -+ -+ /* update thermal meter value */ -+ priv->pshare->thermal_value = thermal_value; -+ for (rf_path = 0; rf_path < max_rf_path; rf_path++) -+ priv->pshare->OFDM_index[rf_path] = OFDM_index[rf_path]; -+ } -+} -+ -+#endif -+ -+ -+void -+odm_txpowertracking_callback_thermal_meter( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ -+#if (RTL8814B_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8812F | ODM_RTL8822C | ODM_RTL8197G)) { -+ odm_txpowertracking_callback_thermal_meter_jaguar_series4(dm); -+ return; -+ } -+#endif -+#if (RTL8197F_SUPPORT == 1 ||RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197F || dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8822B -+ || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8198F) { -+ odm_txpowertracking_callback_thermal_meter_jaguar_series3(dm); -+ return; -+ } -+#endif -+#if (RTL8814A_SUPPORT == 1) /*use this function to do power tracking after 8814 by YuChen*/ -+ if (dm->support_ic_type & ODM_RTL8814A) { -+ odm_txpowertracking_callback_thermal_meter_jaguar_series2(dm); -+ return; -+ } -+#endif -+#if (RTL8881A_SUPPORT || RTL8812A_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8812 || dm->support_ic_type & ODM_RTL8881A) { -+ odm_txpowertracking_callback_thermal_meter_jaguar_series(dm); -+ return; -+ } -+#endif -+ -+#if (RTL8192E_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8192E) { -+ odm_txpowertracking_callback_thermal_meter_92e(dm); -+ return; -+ } -+#endif -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ /* PMGNT_INFO mgnt_info = &adapter->mgnt_info; */ -+#endif -+ -+ -+ u8 thermal_value = 0, delta, delta_LCK, delta_IQK, offset; -+ u8 thermal_value_avg_count = 0; -+ u32 thermal_value_avg = 0; -+ /* s32 ele_A=0, ele_D, TempCCk, X, value32; -+ * s32 Y, ele_C=0; -+ * s8 OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index; -+ * s8 deltaPowerIndex = 0; */ -+ u32 i = 0;/* , j = 0; */ -+ boolean is2T = false; -+ /* bool bInteralPA = false; */ -+ -+ u8 OFDM_max_index = 34, rf = (is2T) ? 2 : 1; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */ -+ u8 indexforchannel = 0;/*get_right_chnl_place_for_iqk(hal_data->current_channel)*/ -+ enum _POWER_DEC_INC { POWER_DEC, POWER_INC }; -+ -+ struct txpwrtrack_cfg c; -+ -+ -+ /* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */ -+ s8 delta_swing_table_idx[2][index_mapping_NUM_88E] = { -+ /* {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} */ -+ {0, 0, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 10, 11}, {0, 0, 1, 2, 3, 4, 4, 4, 4, 5, 7, 8, 9, 9, 10} -+ }; -+ u8 thermal_threshold[2][index_mapping_NUM_88E] = { -+ /* {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} */ -+ {0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 27}, {0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 25, 25, 25} -+ }; -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ struct rtl8192cd_priv *priv = dm->priv; -+#endif -+ -+ /* 4 2. Initilization ( 7 steps in total ) */ -+ -+ configure_txpower_track(dm, &c); -+ -+ dm->rf_calibrate_info.txpowertracking_callback_cnt++; /* cosa add for debug */ -+ dm->rf_calibrate_info.is_txpowertracking_init = true; -+ -+#if (MP_DRIVER == 1) -+ dm->rf_calibrate_info.txpowertrack_control = hal_data->txpowertrack_control; /* We should keep updating the control variable according to HalData. -+ * rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */ -+ dm->rf_calibrate_info.rega24 = 0x090e1317; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && defined(MP_TEST) -+ if ((OPMODE & WIFI_MP_STATE) || *(dm->mp_mode)) { -+ if (dm->priv->pshare->mp_txpwr_tracking == false) -+ return; -+ } -+#endif -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>odm_txpowertracking_callback_thermal_meter_8188e, dm->bb_swing_idx_cck_base: %d, dm->bb_swing_idx_ofdm_base: %d\n", cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base); -+ /* -+ if (!dm->rf_calibrate_info.tm_trigger) { -+ odm_set_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, BIT(17) | BIT(16), 0x3); -+ dm->rf_calibrate_info.tm_trigger = 1; -+ return; -+ } -+ */ -+ thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ if (!thermal_value || !dm->rf_calibrate_info.txpowertrack_control) -+#else -+ if (!dm->rf_calibrate_info.txpowertrack_control) -+#endif -+ return; -+ -+ /* 4 3. Initialize ThermalValues of rf_calibrate_info */ -+ -+ if (!dm->rf_calibrate_info.thermal_value) { -+ dm->rf_calibrate_info.thermal_value_lck = thermal_value; -+ dm->rf_calibrate_info.thermal_value_iqk = thermal_value; -+ } -+ -+ if (dm->rf_calibrate_info.is_reloadtxpowerindex) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "reload ofdm index for band switch\n"); -+ -+ /* 4 4. Calculate average thermal meter */ -+ -+ dm->rf_calibrate_info.thermal_value_avg[dm->rf_calibrate_info.thermal_value_avg_index] = thermal_value; -+ dm->rf_calibrate_info.thermal_value_avg_index++; -+ if (dm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num) -+ dm->rf_calibrate_info.thermal_value_avg_index = 0; -+ -+ for (i = 0; i < c.average_thermal_num; i++) { -+ if (dm->rf_calibrate_info.thermal_value_avg[i]) { -+ thermal_value_avg += dm->rf_calibrate_info.thermal_value_avg[i]; -+ thermal_value_avg_count++; -+ } -+ } -+ -+ if (thermal_value_avg_count) { -+ /* Give the new thermo value a weighting */ -+ thermal_value_avg += (thermal_value * 4); -+ -+ thermal_value = (u8)(thermal_value_avg / (thermal_value_avg_count + 4)); -+ cali_info->thermal_value_delta = thermal_value - priv->pmib->dot11RFEntry.ther; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "AVG Thermal Meter = 0x%x\n", thermal_value); -+ } -+ -+ /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ -+ -+ delta = (thermal_value > dm->rf_calibrate_info.thermal_value) ? (thermal_value - dm->rf_calibrate_info.thermal_value) : (dm->rf_calibrate_info.thermal_value - thermal_value); -+ delta_LCK = (thermal_value > dm->rf_calibrate_info.thermal_value_lck) ? (thermal_value - dm->rf_calibrate_info.thermal_value_lck) : (dm->rf_calibrate_info.thermal_value_lck - thermal_value); -+ delta_IQK = (thermal_value > dm->rf_calibrate_info.thermal_value_iqk) ? (thermal_value - dm->rf_calibrate_info.thermal_value_iqk) : (dm->rf_calibrate_info.thermal_value_iqk - thermal_value); -+ -+ /* 4 6. If necessary, do LCK. */ -+ if (!(dm->support_ic_type & ODM_RTL8821)) { -+ /*if((delta_LCK > hal_data->delta_lck) && (hal_data->delta_lck != 0))*/ -+ if ((delta_LCK >= c.threshold_iqk) && (!iqk_info->rfk_forbidden)) { -+ /*Delta temperature is equal to or larger than 20 centigrade.*/ -+ dm->rf_calibrate_info.thermal_value_lck = thermal_value; -+ (*c.phy_lc_calibrate)(dm); -+ } -+ } -+ -+ /* 3 7. If necessary, move the index of swing table to adjust Tx power. */ -+ -+ if (delta > 0 && dm->rf_calibrate_info.txpowertrack_control) { -+ -+ delta = (thermal_value > dm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - dm->priv->pmib->dot11RFEntry.ther) : (dm->priv->pmib->dot11RFEntry.ther - thermal_value); -+ -+ /* 4 7.1 The Final Power index = BaseIndex + power_index_offset */ -+ -+ if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) { -+ CALCULATE_SWINGTALBE_OFFSET(offset, POWER_INC, index_mapping_NUM_88E, delta); -+ dm->rf_calibrate_info.delta_power_index_last = dm->rf_calibrate_info.delta_power_index; -+ dm->rf_calibrate_info.delta_power_index = delta_swing_table_idx[POWER_INC][offset]; -+ -+ } else { -+ -+ CALCULATE_SWINGTALBE_OFFSET(offset, POWER_DEC, index_mapping_NUM_88E, delta); -+ dm->rf_calibrate_info.delta_power_index_last = dm->rf_calibrate_info.delta_power_index; -+ dm->rf_calibrate_info.delta_power_index = (-1) * delta_swing_table_idx[POWER_DEC][offset]; -+ } -+ -+ if (dm->rf_calibrate_info.delta_power_index == dm->rf_calibrate_info.delta_power_index_last) -+ dm->rf_calibrate_info.power_index_offset = 0; -+ else -+ dm->rf_calibrate_info.power_index_offset = dm->rf_calibrate_info.delta_power_index - dm->rf_calibrate_info.delta_power_index_last; -+ -+ for (i = 0; i < rf; i++) -+ dm->rf_calibrate_info.OFDM_index[i] = cali_info->bb_swing_idx_ofdm_base + dm->rf_calibrate_info.power_index_offset; -+ dm->rf_calibrate_info.CCK_index = cali_info->bb_swing_idx_cck_base + dm->rf_calibrate_info.power_index_offset; -+ -+ cali_info->bb_swing_idx_cck = dm->rf_calibrate_info.CCK_index; -+ cali_info->bb_swing_idx_ofdm[RF_PATH_A] = dm->rf_calibrate_info.OFDM_index[RF_PATH_A]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, dm->rf_calibrate_info.power_index_offset); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "The 'OFDM' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[RF_PATH_A], cali_info->bb_swing_idx_ofdm_base, dm->rf_calibrate_info.power_index_offset); -+ -+ /* 4 7.1 Handle boundary conditions of index. */ -+ -+ -+ for (i = 0; i < rf; i++) { -+ if (dm->rf_calibrate_info.OFDM_index[i] > OFDM_max_index) -+ dm->rf_calibrate_info.OFDM_index[i] = OFDM_max_index; -+ else if (dm->rf_calibrate_info.OFDM_index[i] < 0) -+ dm->rf_calibrate_info.OFDM_index[i] = 0; -+ } -+ -+ if (dm->rf_calibrate_info.CCK_index > c.swing_table_size_cck - 1) -+ dm->rf_calibrate_info.CCK_index = c.swing_table_size_cck - 1; -+ else if (dm->rf_calibrate_info.CCK_index < 0) -+ dm->rf_calibrate_info.CCK_index = 0; -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"The thermal meter is unchanged or TxPowerTracking OFF: thermal_value: %d, dm->rf_calibrate_info.thermal_value: %d)\n", thermal_value, dm->rf_calibrate_info.thermal_value); -+ dm->rf_calibrate_info.power_index_offset = 0; -+ } -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", dm->rf_calibrate_info.CCK_index, cali_info->bb_swing_idx_cck_base); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK,"TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index: %d\n", dm->rf_calibrate_info.OFDM_index[RF_PATH_A], cali_info->bb_swing_idx_ofdm_base); -+ -+ if (dm->rf_calibrate_info.power_index_offset != 0 && dm->rf_calibrate_info.txpowertrack_control) { -+ /* 4 7.2 Configure the Swing Table to adjust Tx Power. */ -+ -+ dm->rf_calibrate_info.is_tx_power_changed = true; /* Always true after Tx Power is adjusted by power tracking. */ -+ /* */ -+ /* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */ -+ /* to increase TX power. Otherwise, EVM will be bad. */ -+ /* */ -+ /* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */ -+ if (thermal_value > dm->rf_calibrate_info.thermal_value) { -+ /* RF_DBG(dm,DBG_RF_TX_PWR_TRACK, */ -+ /* "Temperature Increasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */ -+ /* dm->rf_calibrate_info.power_index_offset, delta, thermal_value, hal_data->eeprom_thermal_meter, dm->rf_calibrate_info.thermal_value); */ -+ } else if (thermal_value < dm->rf_calibrate_info.thermal_value) { /* Low temperature */ -+ /* RF_DBG(dm,DBG_RF_TX_PWR_TRACK, */ -+ /* "Temperature Decreasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */ -+ /* dm->rf_calibrate_info.power_index_offset, delta, thermal_value, hal_data->eeprom_thermal_meter, dm->rf_calibrate_info.thermal_value); */ -+ } -+ if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) -+ { -+ /* RF_DBG(dm,DBG_RF_TX_PWR_TRACK,"Temperature(%d) hugher than PG value(%d), increases the power by tx_agc\n", thermal_value, hal_data->eeprom_thermal_meter); */ -+ (*c.odm_tx_pwr_track_set_pwr)(dm, TXAGC, 0, 0); -+ } else { -+ /* RF_DBG(dm,DBG_RF_TX_PWR_TRACK,"Temperature(%d) lower than PG value(%d), increases the power by tx_agc\n", thermal_value, hal_data->eeprom_thermal_meter); */ -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, RF_PATH_A, indexforchannel); -+ if (is2T) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, RF_PATH_B, indexforchannel); -+ } -+ -+ cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; -+ cali_info->bb_swing_idx_ofdm_base = cali_info->bb_swing_idx_ofdm[RF_PATH_A]; -+ dm->rf_calibrate_info.thermal_value = thermal_value; -+ -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n"); -+ -+ dm->rf_calibrate_info.tx_powercount = 0; -+} -+ -+/* 3============================================================ -+ * 3 IQ Calibration -+ * 3============================================================ */ -+ -+void -+odm_reset_iqk_result( -+ void *dm_void -+) -+{ -+ return; -+} -+#if 1/* !(DM_ODM_SUPPORT_TYPE & ODM_AP) */ -+u8 odm_get_right_chnl_place_for_iqk(u8 chnl) -+{ -+ u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { -+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165 -+ }; -+ u8 place = chnl; -+ -+ -+ if (chnl > 14) { -+ for (place = 14; place < sizeof(channel_all); place++) { -+ if (channel_all[place] == chnl) -+ return place - 13; -+ } -+ } -+ return 0; -+ -+} -+#endif -+ -+void -+odm_iq_calibrate( -+ struct dm_struct *dm -+) -+{ -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ if ((dm->is_linked) && (!iqk_info->rfk_forbidden)) { -+ if ((*dm->channel != dm->pre_channel) && (!*dm->is_scan_in_process)) { -+ dm->pre_channel = *dm->channel; -+ dm->linked_interval = 0; -+ } -+ -+ if (dm->linked_interval < 3) -+ dm->linked_interval++; -+ -+ if (dm->linked_interval == 2) -+ halrf_iqk_trigger(dm, false); -+ } else -+ dm->linked_interval = 0; -+ -+} -+ -+void phydm_rf_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ odm_txpowertracking_init(dm); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814A) -+ phy_iq_calibrate_8814a_init(dm); -+#endif -+#endif -+ -+} -+ -+void phydm_rf_watchdog(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_txpowertracking_check(dm); -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ odm_iq_calibrate(dm); -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ap.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ap.h -new file mode 100644 -index 000000000000..8cc2797bc58c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ap.h -@@ -0,0 +1,170 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALPHYRF_H__ -+#define __HALPHYRF_H__ -+ -+#include "halrf/halrf_powertracking_ap.h" -+#include "halrf/halrf_kfree.h" -+ -+#if (RTL8814A_SUPPORT == 1) -+ #include "halrf/rtl8814a/halrf_iqk_8814a.h" -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+ #include "halrf/rtl8822b/halrf_iqk_8822b.h" -+#endif -+ -+#if (RTL8821C_SUPPORT == 1) -+ #include "halrf/rtl8821c/halrf_iqk_8821c.h" -+#endif -+ -+#if (RTL8195B_SUPPORT == 1) -+// #include "halrf/rtl8195b/halrf.h" -+ #include "halrf/rtl8195b/halrf_iqk_8195b.h" -+ #include "halrf/rtl8195b/halrf_txgapk_8195b.h" -+ #include "halrf/rtl8195b/halrf_dpk_8195b.h" -+#endif -+ -+#if (RTL8198F_SUPPORT == 1) -+ #include "halrf/rtl8198f/halrf_iqk_8198f.h" -+ #include "halrf/rtl8198f/halrf_dpk_8198f.h" -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ #include "halrf/rtl8812f/halrf_iqk_8812f.h" -+ #include "halrf/rtl8812f/halrf_dpk_8812f.h" -+ #include "halrf/rtl8812f/halrf_tssi_8812f.h" -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ #include "halrf/rtl8814b/halrf_iqk_8814b.h" -+ #include "halrf/rtl8814b/halrf_dpk_8814b.h" -+ #include "halrf/rtl8814b/halrf_txgapk_8814b.h" -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ #include "halrf/rtl8197g/halrf_iqk_8197g.h" -+ #include "halrf/rtl8197g/halrf_dpk_8197g.h" -+ #include "halrf/rtl8197g/halrf_tssi_8197g.h" -+#endif -+ -+enum pwrtrack_method { -+ BBSWING, -+ TXAGC, -+ MIX_MODE, -+ TSSI_MODE, -+ MIX_2G_TSSI_5G_MODE, -+ MIX_5G_TSSI_2G_MODE, -+ CLEAN_MODE -+}; -+ -+typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8); -+typedef void(*func_iqk)(void *, u8, u8, u8); -+typedef void (*func_lck)(void *); -+typedef void (*func_tssi_dck)(void *, u8); -+/* refine by YuChen for 8814A */ -+typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **); -+typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **); -+typedef void (*func_all_swing)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **); -+typedef void (*func_all_swing_ex)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **); -+ -+struct txpwrtrack_cfg { -+ u8 swing_table_size_cck; -+ u8 swing_table_size_ofdm; -+ u8 threshold_iqk; -+ u8 threshold_dpk; -+ u8 average_thermal_num; -+ u8 rf_path_count; -+ u32 thermal_reg_addr; -+ func_set_pwr odm_tx_pwr_track_set_pwr; -+ func_iqk do_iqk; -+ func_lck phy_lc_calibrate; -+ func_tssi_dck do_tssi_dck; -+ func_swing get_delta_swing_table; -+ func_swing8814only get_delta_swing_table8814only; -+ func_all_swing get_delta_all_swing_table; -+ func_all_swing_ex get_delta_all_swing_table_ex; -+}; -+ -+void -+odm_clear_txpowertracking_state( -+ void *dm_void -+); -+ -+void -+configure_txpower_track( -+ void *dm_void, -+ struct txpwrtrack_cfg *config -+); -+ -+ -+void -+odm_txpowertracking_callback_thermal_meter( -+ void *dm_void -+); -+ -+#if (RTL8192E_SUPPORT == 1) -+void -+odm_txpowertracking_callback_thermal_meter_92e( -+ void *dm_void -+); -+#endif -+ -+#if (RTL8814A_SUPPORT == 1) -+void -+odm_txpowertracking_callback_thermal_meter_jaguar_series2( -+ void *dm_void -+); -+ -+#elif ODM_IC_11AC_SERIES_SUPPORT -+void -+odm_txpowertracking_callback_thermal_meter_jaguar_series( -+ void *dm_void -+); -+ -+#elif (RTL8197F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\ -+ RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1) -+void -+odm_txpowertracking_callback_thermal_meter_jaguar_series3( -+ void *dm_void -+); -+ -+#elif (RTL8814B_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8197G_SUPPORT == 1) -+void -+odm_txpowertracking_callback_thermal_meter_jaguar_series4( -+ void *dm_void -+); -+ -+#endif -+ -+#define IS_CCK_RATE(_rate) (ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M) -+ -+#define ODM_TARGET_CHNL_NUM_2G_5G 59 -+ -+ -+void -+odm_reset_iqk_result( -+ void *dm_void -+); -+u8 -+odm_get_right_chnl_place_for_iqk( -+ u8 chnl -+); -+ -+void phydm_rf_init(void *dm_void); -+void phydm_rf_watchdog(void *dm_void); -+ -+#endif /*#ifndef __HALPHYRF_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ce.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ce.c -new file mode 100644 -index 000000000000..1cfb95d36b9c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ce.c -@@ -0,0 +1,1180 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal)\ -+ do { \ -+ u32 __offset = (u32)_offset; \ -+ u32 __size = (u32)_size; \ -+ for (__offset = 0; __offset < __size; __offset++) { \ -+ if (_delta_thermal < \ -+ thermal_threshold[_direction][__offset]) { \ -+ if (__offset != 0) \ -+ __offset--; \ -+ break; \ -+ } \ -+ } \ -+ if (__offset >= __size) \ -+ __offset = __size - 1; \ -+ } while (0) -+ -+void configure_txpower_track(void *dm_void, struct txpwrtrack_cfg *config) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if RTL8192E_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8192E) -+ configure_txpower_track_8192e(config); -+#endif -+#if RTL8821A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8821) -+ configure_txpower_track_8821a(config); -+#endif -+#if RTL8812A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8812) -+ configure_txpower_track_8812a(config); -+#endif -+#if RTL8188E_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8188E) -+ configure_txpower_track_8188e(config); -+#endif -+ -+#if RTL8723B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8723B) -+ configure_txpower_track_8723b(config); -+#endif -+ -+#if RTL8814A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8814A) -+ configure_txpower_track_8814a(config); -+#endif -+ -+#if RTL8703B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8703B) -+ configure_txpower_track_8703b(config); -+#endif -+ -+#if RTL8188F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8188F) -+ configure_txpower_track_8188f(config); -+#endif -+#if RTL8723D_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8723D) -+ configure_txpower_track_8723d(config); -+#endif -+/*@ JJ ADD 20161014 */ -+#if RTL8710B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8710B) -+ configure_txpower_track_8710b(config); -+#endif -+#if RTL8822B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8822B) -+ configure_txpower_track_8822b(config); -+#endif -+#if RTL8821C_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8821C) -+ configure_txpower_track_8821c(config); -+#endif -+ -+#if RTL8192F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8192F) -+ configure_txpower_track_8192f(config); -+#endif -+ -+#if RTL8822C_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8822C) -+ configure_txpower_track_8822c(config); -+#endif -+ -+#if RTL8814B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8814B) -+ configure_txpower_track_8814b(config); -+#endif -+ -+#if RTL8723F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8723F) -+ configure_txpower_track_8723f(config); -+#endif -+ -+} -+ -+/*@ ********************************************************************** -+ * <20121113, Kordan> This function should be called when tx_agc changed. -+ * Otherwise the previous compensation is gone, because we record the -+ * delta of temperature between two TxPowerTracking watch dogs. -+ * -+ * NOTE: If Tx BB swing or Tx scaling is varified during run-time, still -+ * need to call this function. -+ * ********************************************************************** -+ */ -+void odm_clear_txpowertracking_state(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ u8 p = 0; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ -+ cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index; -+ cali_info->bb_swing_idx_cck = cali_info->default_cck_index; -+ dm->rf_calibrate_info.CCK_index = 0; -+ -+ for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) { -+ cali_info->bb_swing_idx_ofdm_base[p] -+ = cali_info->default_ofdm_index; -+ cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index; -+ cali_info->OFDM_index[p] = cali_info->default_ofdm_index; -+ -+ cali_info->power_index_offset[p] = 0; -+ cali_info->delta_power_index[p] = 0; -+ cali_info->delta_power_index_last[p] = 0; -+ -+ /* Initial Mix mode power tracking*/ -+ cali_info->absolute_ofdm_swing_idx[p] = 0; -+ cali_info->remnant_ofdm_swing_idx[p] = 0; -+ cali_info->kfree_offset[p] = 0; -+ } -+ /* Initial Mix mode power tracking*/ -+ cali_info->modify_tx_agc_flag_path_a = false; -+ cali_info->modify_tx_agc_flag_path_b = false; -+ cali_info->modify_tx_agc_flag_path_c = false; -+ cali_info->modify_tx_agc_flag_path_d = false; -+ cali_info->remnant_cck_swing_idx = 0; -+ cali_info->thermal_value = rf->eeprom_thermal; -+ cali_info->modify_tx_agc_value_cck = 0; -+ cali_info->modify_tx_agc_value_ofdm = 0; -+} -+ -+void odm_get_tracking_table(void *dm_void, u8 thermal_value, u8 delta) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct txpwrtrack_cfg c = {0}; -+ -+ u8 p; -+ /* 4 1. TWO tables decide the final index of OFDM/CCK swing table. */ -+ u8 *pwrtrk_tab_up_a = NULL; -+ u8 *pwrtrk_tab_down_a = NULL; -+ u8 *pwrtrk_tab_up_b = NULL; -+ u8 *pwrtrk_tab_down_b = NULL; -+ /*for 8814 add by Yu Chen*/ -+ u8 *pwrtrk_tab_up_c = NULL; -+ u8 *pwrtrk_tab_down_c = NULL; -+ u8 *pwrtrk_tab_up_d = NULL; -+ u8 *pwrtrk_tab_down_d = NULL; -+ /*for Xtal Offset by James.Tung*/ -+ s8 *xtal_tab_up = NULL; -+ s8 *xtal_tab_down = NULL; -+ -+ configure_txpower_track(dm, &c); -+ -+ (*c.get_delta_swing_table)(dm, -+ (u8 **)&pwrtrk_tab_up_a, -+ (u8 **)&pwrtrk_tab_down_a, -+ (u8 **)&pwrtrk_tab_up_b, -+ (u8 **)&pwrtrk_tab_down_b); -+ -+ if (dm->support_ic_type & ODM_RTL8814A) /*for 8814 path C & D*/ -+ (*c.get_delta_swing_table8814only)(dm, -+ (u8 **)&pwrtrk_tab_up_c, -+ (u8 **)&pwrtrk_tab_down_c, -+ (u8 **)&pwrtrk_tab_up_d, -+ (u8 **)&pwrtrk_tab_down_d); -+ /*for Xtal Offset*/ -+ if (dm->support_ic_type & -+ (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F)) -+ (*c.get_delta_swing_xtal_table)(dm, -+ (s8 **)&xtal_tab_up, -+ (s8 **)&xtal_tab_down); -+ -+ if (thermal_value > rf->eeprom_thermal) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ /*recording power index offset*/ -+ cali_info->delta_power_index_last[p] = -+ cali_info->delta_power_index[p]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher******\n"); -+ switch (p) { -+ case RF_PATH_B: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "pwrtrk_tab_up_b[%d] = %d\n", delta, -+ pwrtrk_tab_up_b[delta]); -+ -+ cali_info->delta_power_index[p] = -+ pwrtrk_tab_up_b[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -+ pwrtrk_tab_up_b[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "absolute_ofdm_swing_idx[PATH_B] = %d\n", -+ cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_C: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "pwrtrk_tab_up_c[%d] = %d\n", delta, -+ pwrtrk_tab_up_c[delta]); -+ -+ cali_info->delta_power_index[p] = -+ pwrtrk_tab_up_c[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -+ pwrtrk_tab_up_c[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "absolute_ofdm_swing_idx[PATH_C] = %d\n", -+ cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_D: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "pwrtrk_tab_up_d[%d] = %d\n", delta, -+ pwrtrk_tab_up_d[delta]); -+ -+ cali_info->delta_power_index[p] = -+ pwrtrk_tab_up_d[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -+ pwrtrk_tab_up_d[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "absolute_ofdm_swing_idx[PATH_D] = %d\n", -+ cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ default: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "pwrtrk_tab_up_a[%d] = %d\n", delta, -+ pwrtrk_tab_up_a[delta]); -+ -+ cali_info->delta_power_index[p] = -+ pwrtrk_tab_up_a[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -+ pwrtrk_tab_up_a[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "absolute_ofdm_swing_idx[PATH_A] = %d\n", -+ cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ } -+ } -+ /* @JJ ADD 20161014 */ -+ /*Save xtal_offset from Xtal table*/ -+ if (dm->support_ic_type & -+ (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | -+ ODM_RTL8192F)) { -+ /*recording last Xtal offset*/ -+ cali_info->xtal_offset_last = cali_info->xtal_offset; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "[Xtal] xtal_tab_up[%d] = %d\n", -+ delta, xtal_tab_up[delta]); -+ cali_info->xtal_offset = xtal_tab_up[delta]; -+ if (cali_info->xtal_offset_last != xtal_tab_up[delta]) -+ cali_info->xtal_offset_eanble = 1; -+ } -+ } else { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ /*recording power index offset*/ -+ cali_info->delta_power_index_last[p] = -+ cali_info->delta_power_index[p]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower******\n"); -+ switch (p) { -+ case RF_PATH_B: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "pwrtrk_tab_down_b[%d] = %d\n", delta, -+ pwrtrk_tab_down_b[delta]); -+ cali_info->delta_power_index[p] = -+ -1 * pwrtrk_tab_down_b[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -+ -1 * pwrtrk_tab_down_b[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "absolute_ofdm_swing_idx[PATH_B] = %d\n", -+ cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_C: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "pwrtrk_tab_down_c[%d] = %d\n", delta, -+ pwrtrk_tab_down_c[delta]); -+ cali_info->delta_power_index[p] = -+ -1 * pwrtrk_tab_down_c[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -+ -1 * pwrtrk_tab_down_c[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "absolute_ofdm_swing_idx[PATH_C] = %d\n", -+ cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_D: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "pwrtrk_tab_down_d[%d] = %d\n", delta, -+ pwrtrk_tab_down_d[delta]); -+ cali_info->delta_power_index[p] = -+ -1 * pwrtrk_tab_down_d[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -+ -1 * pwrtrk_tab_down_d[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "absolute_ofdm_swing_idx[PATH_D] = %d\n", -+ cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ default: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "pwrtrk_tab_down_a[%d] = %d\n", delta, -+ pwrtrk_tab_down_a[delta]); -+ cali_info->delta_power_index[p] = -+ -1 * pwrtrk_tab_down_a[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -+ -1 * pwrtrk_tab_down_a[delta]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "absolute_ofdm_swing_idx[PATH_A] = %d\n", -+ cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ } -+ } -+ /* @JJ ADD 20161014 */ -+ if (dm->support_ic_type & -+ (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | -+ ODM_RTL8192F)) { -+ /*recording last Xtal offset*/ -+ cali_info->xtal_offset_last = cali_info->xtal_offset; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "[Xtal] xtal_tab_down[%d] = %d\n", delta, -+ xtal_tab_down[delta]); -+ /*Save xtal_offset from Xtal table*/ -+ cali_info->xtal_offset = xtal_tab_down[delta]; -+ if (cali_info->xtal_offset_last != xtal_tab_down[delta]) -+ cali_info->xtal_offset_eanble = 1; -+ } -+ } -+} -+ -+void odm_pwrtrk_method(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 p, idxforchnl = 0; -+ -+ struct txpwrtrack_cfg c = {0}; -+ -+ configure_txpower_track(dm, &c); -+ -+ if (dm->support_ic_type & -+ (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8821 | ODM_RTL8812 | -+ ODM_RTL8723B | ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8188F | -+ ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B | -+ ODM_RTL8192F)) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "***Enter PwrTrk MIX_MODE***\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else if (dm->support_ic_type & ODM_RTL8723D) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "***Enter PwrTrk MIX_MODE***\n"); -+ p = (u8)odm_get_bb_reg(dm, R_0x948, 0x00000080); -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ /*if open ant_div 0x948=140,do 2 path pwr_track*/ -+ if (odm_get_bb_reg(dm, R_0x948, 0x00000040)) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, 1, 0); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "***Enter PwrTrk BBSWING_MODE***\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr) -+ (dm, BBSWING, p, idxforchnl); -+ } -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+void odm_txpowertracking_callback_thermal_meter(struct dm_struct *dm) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+void odm_txpowertracking_callback_thermal_meter(void *dm_void) -+#else -+void odm_txpowertracking_callback_thermal_meter(void *adapter) -+#endif -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#endif -+ -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ u8 thermal_value = 0, delta, delta_lck, delta_iqk, p = 0, i = 0; -+ u8 thermal_value_avg_count = 0; -+ u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4; -+ -+ /* OFDM BB Swing should be less than +3.0dB, required by Arthur */ -+#if 0 -+ u8 OFDM_min_index = 0; -+#endif -+#if 0 -+ /* get_right_chnl_place_for_iqk(hal_data->current_channel) */ -+#endif -+ u8 power_tracking_type = rf->pwt_type; -+ s8 thermal_value_temp = 0; -+ -+ struct txpwrtrack_cfg c = {0}; -+ -+ /* @4 2. Initialization ( 7 steps in total ) */ -+ -+ configure_txpower_track(dm, &c); -+ -+ cali_info->txpowertracking_callback_cnt++; -+ cali_info->is_txpowertracking_init = true; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "\n\n\n===>%s bbsw_idx_cck_base=%d\n", -+ __func__, cali_info->bb_swing_idx_cck_base); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "bbsw_idx_ofdm_base[A]=%d default_ofdm_idx=%d\n", -+ cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], -+ cali_info->default_ofdm_index); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->txpowertrack_control=%d, rf->eeprom_thermal %d\n", -+ cali_info->txpowertrack_control, rf->eeprom_thermal); -+ -+ /* 0x42: RF Reg[15:10] 88E */ -+ thermal_value = -+ (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); -+ -+ thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "thermal_value_temp(%d) = ther_value(%d) + pwr_trim_ther(%d)\n", -+ thermal_value_temp, thermal_value, -+ phydm_get_thermal_offset(dm)); -+ -+ if (thermal_value_temp > 63) -+ thermal_value = 63; -+ else if (thermal_value_temp < 0) -+ thermal_value = 0; -+ else -+ thermal_value = thermal_value_temp; -+ -+ /*@add log by zhao he, check c80/c94/c14/ca0 value*/ -+ if (dm->support_ic_type & -+ (ODM_RTL8723D | ODM_RTL8710B)) { -+ regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD); -+ regcd0 = odm_get_bb_reg(dm, R_0xcd0, MASKDWORD); -+ regcd4 = odm_get_bb_reg(dm, R_0xcd4, MASKDWORD); -+ regab4 = odm_get_bb_reg(dm, R_0xab4, 0x000007FF); -+ RF_DBG(dm, DBG_RF_IQK, -+ "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", -+ regc80, regcd0, regcd4, regab4); -+ } -+ -+ if (!cali_info->txpowertrack_control) -+ return; -+ -+ if (rf->eeprom_thermal == 0xff) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", -+ rf->eeprom_thermal); -+ return; -+ } -+ -+ /*@4 3. Initialize ThermalValues of rf_calibrate_info*/ -+ -+ if (cali_info->is_reloadtxpowerindex) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "reload ofdm index for band switch\n"); -+ -+ /*@4 4. Calculate average thermal meter*/ -+ -+ cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] -+ = thermal_value; -+ -+ cali_info->thermal_value_avg_index++; -+ /*Average times = c.average_thermal_num*/ -+ if (cali_info->thermal_value_avg_index == c.average_thermal_num) -+ cali_info->thermal_value_avg_index = 0; -+ -+ for (i = 0; i < c.average_thermal_num; i++) { -+ if (cali_info->thermal_value_avg[i]) { -+ thermal_value_avg += cali_info->thermal_value_avg[i]; -+ thermal_value_avg_count++; -+ } -+ } -+ -+ /* Calculate Average thermal_value after average enough times */ -+ if (thermal_value_avg_count) { -+ thermal_value = -+ (u8)(thermal_value_avg / thermal_value_avg_count); -+ cali_info->thermal_value_delta -+ = thermal_value - rf->eeprom_thermal; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", -+ thermal_value, rf->eeprom_thermal); -+ } -+ -+ /* @4 5. Calculate delta, delta_lck, delta_iqk. */ -+ /* "delta" here is used to determine thermal value changes or not. */ -+ if (thermal_value > cali_info->thermal_value) -+ delta = thermal_value - cali_info->thermal_value; -+ else -+ delta = cali_info->thermal_value - thermal_value; -+ -+ if (thermal_value > cali_info->thermal_value_lck) -+ delta_lck = thermal_value - cali_info->thermal_value_lck; -+ else -+ delta_lck = cali_info->thermal_value_lck - thermal_value; -+ -+ if (thermal_value > cali_info->thermal_value_iqk) -+ delta_iqk = thermal_value - cali_info->thermal_value_iqk; -+ else -+ delta_iqk = cali_info->thermal_value_iqk - thermal_value; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "(delta, delta_lck, delta_iqk) = (%d, %d, %d)\n", delta, -+ delta_lck, delta_iqk); -+ -+ /*@4 6. If necessary, do LCK.*/ -+ /* Wait sacn to do LCK by RF Jenyu*/ -+ if (!(*dm->is_scan_in_process) && !iqk_info->rfk_forbidden) { -+ /* Delta temperature is equal to or larger than 20 centigrade.*/ -+ if (delta_lck >= c.threshold_iqk) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_lck(%d) >= threshold_iqk(%d)\n", -+ delta_lck, c.threshold_iqk); -+ cali_info->thermal_value_lck = thermal_value; -+ -+ /*Use RTLCK, close power tracking driver LCK*/ -+ /*8821 don't do LCK*/ -+ if (!(dm->support_ic_type & -+ (ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B)) && -+ c.phy_lc_calibrate) { -+ (*c.phy_lc_calibrate)(dm); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "do pwrtrk lck\n"); -+ } -+ } -+ } -+ -+ /*@3 7. If necessary, move the index of swing table to adjust Tx power.*/ -+ /* "delta" here is used to record the absolute value of difference. */ -+ if (delta > 0 && cali_info->txpowertrack_control) { -+ if (thermal_value > rf->eeprom_thermal) -+ delta = thermal_value - rf->eeprom_thermal; -+ else -+ delta = rf->eeprom_thermal - thermal_value; -+ -+ if (delta >= TXPWR_TRACK_TABLE_SIZE) -+ delta = TXPWR_TRACK_TABLE_SIZE - 1; -+ -+ odm_get_tracking_table(dm, thermal_value, delta); -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "\n[path-%d] Calculate pwr_idx_offset\n", p); -+ -+ /*If Thermal value changes but table value is the same*/ -+ if (cali_info->delta_power_index[p] == -+ cali_info->delta_power_index_last[p]) -+ cali_info->power_index_offset[p] = 0; -+ else -+ cali_info->power_index_offset[p] = -+ cali_info->delta_power_index[p] - -+ cali_info->delta_power_index_last[p]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "path-%d pwridx_diff%d=pwr_idx%d - last_idx%d\n", -+ p, cali_info->power_index_offset[p], -+ cali_info->delta_power_index[p], -+ cali_info->delta_power_index_last[p]); -+#if 0 -+ -+ cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p]; -+ cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p]; -+ -+ cali_info->bb_swing_idx_cck = cali_info->CCK_index; -+ cali_info->bb_swing_idx_ofdm[p] = cali_info->OFDM_index[p]; -+ -+ /*************Print BB Swing base and index Offset*************/ -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", -+ cali_info->bb_swing_idx_cck, -+ cali_info->bb_swing_idx_cck_base, -+ cali_info->power_index_offset[p]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", -+ cali_info->bb_swing_idx_ofdm[p], p, -+ cali_info->bb_swing_idx_ofdm_base[p], -+ cali_info->power_index_offset[p]); -+ -+ /*4 7.1 Handle boundary conditions of index.*/ -+ -+ if (cali_info->OFDM_index[p] > c.swing_table_size_ofdm - 1) -+ cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1; -+ else if (cali_info->OFDM_index[p] <= OFDM_min_index) -+ cali_info->OFDM_index[p] = OFDM_min_index; -+#endif -+ } -+#if 0 -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "\n\n========================================================================================================\n"); -+ -+ if (cali_info->CCK_index > c.swing_table_size_cck - 1) -+ cali_info->CCK_index = c.swing_table_size_cck - 1; -+ else if (cali_info->CCK_index <= 0) -+ cali_info->CCK_index = 0; -+#endif -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Thermal is unchanged thermal=%d last_thermal=%d\n", -+ thermal_value, -+ cali_info->thermal_value); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ cali_info->power_index_offset[p] = 0; -+ } -+ -+#if 0 -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", -+ cali_info->CCK_index, -+ cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/ -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n", -+ cali_info->OFDM_index[p], p, -+ cali_info->bb_swing_idx_ofdm_base[p]); -+ } -+#endif -+ -+ if ((dm->support_ic_type & ODM_RTL8814A)) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "power_tracking_type=%d\n", -+ power_tracking_type); -+ -+ if (power_tracking_type == 0) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "***Enter PwrTrk MIX_MODE***\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr) -+ (dm, MIX_MODE, p, 0); -+ } else if (power_tracking_type == 1) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "***Enter PwrTrk MIX(2G) TSSI(5G) MODE***\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr) -+ (dm, MIX_2G_TSSI_5G_MODE, p, 0); -+ } else if (power_tracking_type == 2) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "***Enter PwrTrk MIX(5G) TSSI(2G)MODE***\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr) -+ (dm, MIX_5G_TSSI_2G_MODE, p, 0); -+ } else if (power_tracking_type == 3) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "***Enter PwrTrk TSSI MODE***\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr) -+ (dm, TSSI_MODE, p, 0); -+ } -+ } else if ((cali_info->power_index_offset[RF_PATH_A] != 0 || -+ cali_info->power_index_offset[RF_PATH_B] != 0 || -+ cali_info->power_index_offset[RF_PATH_C] != 0 || -+ cali_info->power_index_offset[RF_PATH_D] != 0)) { -+#if 0 -+ /* 4 7.2 Configure the Swing Table to adjust Tx Power. */ -+ /*Always true after Tx Power is adjusted by power tracking.*/ -+ -+ cali_info->is_tx_power_changed = true; -+ /* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital -+ * to increase TX power. Otherwise, EVM will be bad. -+ * -+ * 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. -+ */ -+ if (thermal_value > cali_info->thermal_value) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", -+ p, cali_info->power_index_offset[p], -+ delta, thermal_value, rf->eeprom_thermal, -+ cali_info->thermal_value); -+ } -+ } else if (thermal_value < cali_info->thermal_value) { /*Low temperature*/ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", -+ p, cali_info->power_index_offset[p], -+ delta, thermal_value, rf->eeprom_thermal, -+ cali_info->thermal_value); -+ } -+ } -+#endif -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ if (thermal_value > rf->eeprom_thermal) { -+#else -+ if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) { -+#endif -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) higher than PG value(%d)\n", -+ thermal_value, rf->eeprom_thermal); -+ -+ odm_pwrtrk_method(dm); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) lower than PG value(%d)\n", -+ thermal_value, rf->eeprom_thermal); -+ -+ odm_pwrtrk_method(dm); -+ } -+ -+#if 0 -+ /*Record last time Power Tracking result as base.*/ -+ cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p]; -+#endif -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->thermal_value = %d thermal_value= %d\n", -+ cali_info->thermal_value, thermal_value); -+ } -+ /*Record last Power Tracking Thermal value*/ -+ cali_info->thermal_value = thermal_value; -+ -+ if (dm->support_ic_type & -+ (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8192F | ODM_RTL8710B)) { -+ if (cali_info->xtal_offset_eanble != 0 && -+ cali_info->txpowertrack_control && -+ rf->eeprom_thermal != 0xff) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "**********Enter Xtal Tracking**********\n"); -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ if (thermal_value > rf->eeprom_thermal) { -+#else -+ if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) { -+#endif -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) higher than PG (%d)\n", -+ thermal_value, rf->eeprom_thermal); -+ (*c.odm_txxtaltrack_set_xtal)(dm); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) lower than PG (%d)\n", -+ thermal_value, rf->eeprom_thermal); -+ (*c.odm_txxtaltrack_set_xtal)(dm); -+ } -+ } -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "**********End Xtal Tracking**********\n"); -+ } -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ -+ /* Wait sacn to do IQK by RF Jenyu*/ -+ if (!(*dm->is_scan_in_process) && !iqk_info->rfk_forbidden && -+ !cali_info->is_iqk_in_progress && dm->is_linked) { -+ if (!(dm->support_ic_type & ODM_RTL8723B)) { -+ /*Delta temperature is equal or larger than 20 Celsius*/ -+ /*When threshold is 8*/ -+ if (delta_iqk >= c.threshold_iqk) { -+ cali_info->thermal_value_iqk = thermal_value; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_iqk(%d) >= threshold_iqk(%d)\n", -+ delta_iqk, c.threshold_iqk); -+ (*c.do_iqk)(dm, delta_iqk, thermal_value, 8); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "do pwrtrk iqk\n"); -+ } -+ } -+ } -+ -+#if 0 -+ if (cali_info->dpk_thermal[RF_PATH_A] != 0) { -+ if (diff_DPK[RF_PATH_A] >= c.threshold_dpk) { -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk)); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } else if ((diff_DPK[RF_PATH_A] <= -1 * c.threshold_dpk)) { -+ s32 value = 0x20 + (diff_DPK[RF_PATH_A] / c.threshold_dpk); -+ -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } else { -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } -+ } -+ if (cali_info->dpk_thermal[RF_PATH_B] != 0) { -+ if (diff_DPK[RF_PATH_B] >= c.threshold_dpk) { -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk)); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } else if ((diff_DPK[RF_PATH_B] <= -1 * c.threshold_dpk)) { -+ s32 value = 0x20 + (diff_DPK[RF_PATH_B] / c.threshold_dpk); -+ -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } else { -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } -+ } -+#endif -+ -+#endif -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__); -+ -+ cali_info->tx_powercount = 0; -+} -+ -+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+void -+odm_txpowertracking_new_callback_thermal_meter(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; -+ u8 thermal_value[MAX_RF_PATH] = {0}, delta[MAX_RF_PATH] = {0}; -+ u8 delta_swing_table_idx_tup[DELTA_SWINGIDX_SIZE] = {0}; -+ u8 delta_swing_table_idx_tdown[DELTA_SWINGIDX_SIZE] = {0}; -+ u8 delta_LCK = 0, delta_IQK = 0, i = 0, j = 0, p; -+ u8 thermal_value_avg_count[MAX_RF_PATH] = {0}; -+ u32 thermal_value_avg[MAX_RF_PATH] = {0}; -+ s8 thermal_value_temp[MAX_RF_PATH] = {0}; -+ u8 tracking_method = MIX_MODE; -+ -+ struct txpwrtrack_cfg c; -+ -+ u8 *delta_swing_table_idx_tup_a = NULL; -+ u8 *delta_swing_table_idx_tdown_a = NULL; -+ u8 *delta_swing_table_idx_tup_b = NULL; -+ u8 *delta_swing_table_idx_tdown_b = NULL; -+ u8 *delta_swing_table_idx_tup_c = NULL; -+ u8 *delta_swing_table_idx_tdown_c = NULL; -+ u8 *delta_swing_table_idx_tup_d = NULL; -+ u8 *delta_swing_table_idx_tdown_d = NULL; -+ -+ configure_txpower_track(dm, &c); -+ -+ (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, -+ (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b); -+ -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c, -+ (u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d); -+ } -+ -+ cali_info->txpowertracking_callback_cnt++; -+ cali_info->is_txpowertracking_init = true; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", -+ cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->txpowertrack_control=%d, tssi->thermal[RF_PATH_A]=%d tssi->thermal[RF_PATH_B]=%d\n", -+ cali_info->txpowertrack_control, tssi->thermal[RF_PATH_A], tssi->thermal[RF_PATH_B]); -+ -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ for (i = 0; i < c.rf_path_count; i++) -+ thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0x7e); /* 0x42: RF Reg[6:1] Thermal Trim*/ -+ } else { -+ for (i = 0; i < c.rf_path_count; i++) { -+ thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ -+ -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_multi_thermal_offset(dm, i); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "thermal_value_temp[%d](%d) = thermal_value[%d](%d) + multi_thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_multi_thermal_offset(dm, i)); -+ } else { -+ thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "thermal_value_temp[%d](%d) = thermal_value[%d](%d) + thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm)); -+ } -+ -+ if (thermal_value_temp[i] > 63) -+ thermal_value[i] = 63; -+ else if (thermal_value_temp[i] < 0) -+ thermal_value[i] = 0; -+ else -+ thermal_value[i] = thermal_value_temp[i]; -+ } -+ } -+ -+ if ((tssi->thermal[RF_PATH_A] == 0xff || tssi->thermal[RF_PATH_B] == 0xff) && -+ cali_info->txpowertrack_control != 3) { -+ for (i = 0; i < c.rf_path_count; i++) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, tssi->thermal[%d] = 0x%x\n", -+ i, tssi->thermal[i]); -+ return; -+ } -+ -+ for (j = 0; j < c.rf_path_count; j++) { -+ cali_info->thermal_value_avg_path[j][cali_info->thermal_value_avg_index_path[j]] = thermal_value[j]; -+ cali_info->thermal_value_avg_index_path[j]++; -+ if (cali_info->thermal_value_avg_index_path[j] == c.average_thermal_num) /*Average times = c.average_thermal_num*/ -+ cali_info->thermal_value_avg_index_path[j] = 0; -+ -+ -+ for (i = 0; i < c.average_thermal_num; i++) { -+ if (cali_info->thermal_value_avg_path[j][i]) { -+ thermal_value_avg[j] += cali_info->thermal_value_avg_path[j][i]; -+ thermal_value_avg_count[j]++; -+ } -+ } -+ -+ if (thermal_value_avg_count[j]) { /* Calculate Average thermal_value after average enough times */ -+ thermal_value[j] = (u8)(thermal_value_avg[j] / thermal_value_avg_count[j]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "AVG Thermal Meter = 0x%X, tssi->thermal[%d] = 0x%x\n", -+ thermal_value[j], j, tssi->thermal[j]); -+ } -+ /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ -+ -+ /* "delta" here is used to determine whether thermal value changes or not. */ -+ delta[j] = (thermal_value[j] > cali_info->thermal_value_path[j]) ? (thermal_value[j] - cali_info->thermal_value_path[j]) : (cali_info->thermal_value_path[j] - thermal_value[j]); -+ delta_LCK = (thermal_value[0] > cali_info->thermal_value_lck) ? (thermal_value[0] - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value[0]); -+ delta_IQK = (thermal_value[0] > cali_info->thermal_value_iqk) ? (thermal_value[0] - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value[0]); -+ } -+ -+ /*4 6. If necessary, do LCK.*/ -+ -+ for (i = 0; i < c.rf_path_count; i++) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", i, delta[i], delta_LCK, delta_IQK); -+ -+ /* Wait sacn to do LCK by RF Jenyu*/ -+ if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { -+ /* Delta temperature is equal to or larger than 20 centigrade.*/ -+ if (delta_LCK >= c.threshold_iqk) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); -+ cali_info->thermal_value_lck = thermal_value[RF_PATH_A]; -+ -+ /*Use RTLCK, so close power tracking driver LCK*/ -+ if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) { -+ if (c.phy_lc_calibrate) -+ (*c.phy_lc_calibrate)(dm); -+ } else -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do not do LCK\n"); -+ } -+ } -+ -+ /*3 7. If necessary, move the index of swing table to adjust Tx power.*/ -+ for (i = 0; i < c.rf_path_count; i++) { -+ if (i == RF_PATH_B) { -+ odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_b, DELTA_SWINGIDX_SIZE); -+ } else if (i == RF_PATH_C) { -+ odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_c, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_c, DELTA_SWINGIDX_SIZE); -+ } else if (i == RF_PATH_D) { -+ odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_d, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_d, DELTA_SWINGIDX_SIZE); -+ } else { -+ odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_a, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_a, DELTA_SWINGIDX_SIZE); -+ } -+ -+ cali_info->delta_power_index_last[i] = cali_info->delta_power_index[i]; /*recording poer index offset*/ -+ delta[i] = thermal_value[i] > tssi->thermal[i] ? (thermal_value[i] - tssi->thermal[i]) : (tssi->thermal[i] - thermal_value[i]); -+ -+ if (delta[i] >= TXPWR_TRACK_TABLE_SIZE) -+ delta[i] = TXPWR_TRACK_TABLE_SIZE - 1; -+ -+ if (thermal_value[i] > tssi->thermal[i]) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tup[delta[i]], i); -+ -+ cali_info->delta_power_index[i] = delta_swing_table_idx_tup[delta[i]]; -+ cali_info->absolute_ofdm_swing_idx[i] = delta_swing_table_idx_tup[delta[i]]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tdown[delta[i]], i); -+ cali_info->delta_power_index[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; -+ cali_info->absolute_ofdm_swing_idx[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); -+ } -+ } -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/ -+ cali_info->power_index_offset[p] = 0; -+ else -+ cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/ -+ } -+ -+#if 0 -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0); -+ } -+#endif -+ if (*dm->mp_mode == 1) { -+ if (cali_info->txpowertrack_control == 1) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ tracking_method = MIX_MODE; -+ } else if (cali_info->txpowertrack_control == 3) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n"); -+ tracking_method = TSSI_MODE; -+ } -+ } else { -+ if (rf->power_track_type >= 0 && rf->power_track_type <= 3) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ tracking_method = MIX_MODE; -+ } else if (rf->power_track_type >= 4 && rf->power_track_type <= 7) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n"); -+ tracking_method = TSSI_MODE; -+ } -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8822C || dm->support_ic_type == ODM_RTL8814B) -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, tracking_method, p, 0); -+ -+ /* Wait sacn to do IQK by RF Jenyu*/ -+ if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden) && (dm->is_linked || *dm->mp_mode)) { -+ /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ -+ if (delta_IQK >= c.threshold_iqk) { -+ cali_info->thermal_value_iqk = thermal_value[RF_PATH_A]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); -+ /*if (!cali_info->is_iqk_in_progress)*/ -+ /* (*c.do_iqk)(dm, delta_IQK, thermal_value[RF_PATH_A], 8);*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do IQK\n"); -+ -+ /*if (!cali_info->is_iqk_in_progress)*/ -+ /* (*c.do_tssi_dck)(dm, true);*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do TSSI DCK\n"); -+ } -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__); -+ -+ cali_info->tx_powercount = 0; -+} -+#endif -+ -+/*@3============================================================ -+ * 3 IQ Calibration -+ * 3============================================================ -+ */ -+ -+void odm_reset_iqk_result(void *dm_void) -+{ -+} -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+u8 odm_get_right_chnl_place_for_iqk(u8 chnl) -+{ -+ u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { -+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, -+ 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, -+ 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, -+ 124, 126, 128, 130, 132, 134, 136, 138, 140, -+ 149, 151, 153, 155, 157, 159, 161, 163, 165}; -+ u8 place = chnl; -+ -+ if (chnl > 14) { -+ for (place = 14; place < sizeof(channel_all); place++) { -+ if (channel_all[place] == chnl) -+ return place - 13; -+ } -+ } -+ return 0; -+} -+#endif -+ -+void odm_iq_calibrate(struct dm_struct *dm) -+{ -+ void *adapter = dm->adapter; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (*dm->is_fcs_mode_enable) -+ return; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ if (IS_HARDWARE_TYPE_8812AU(adapter)) -+ return; -+#endif -+ -+ if (dm->is_linked && !iqk_info->rfk_forbidden) { -+ if ((*dm->channel != dm->pre_channel) && -+ (!*dm->is_scan_in_process)) { -+ dm->pre_channel = *dm->channel; -+ dm->linked_interval = 0; -+ } -+ -+ if (dm->linked_interval < 3) -+ dm->linked_interval++; -+ -+ if (dm->linked_interval == 2) -+ halrf_iqk_trigger(dm, false); -+ } else { -+ dm->linked_interval = 0; -+ } -+} -+ -+void phydm_rf_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_txpowertracking_init(dm); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ odm_clear_txpowertracking_state(dm); -+#endif -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814A) -+ phy_iq_calibrate_8814a_init(dm); -+#endif -+#endif -+} -+ -+void phydm_rf_watchdog(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ odm_txpowertracking_check(dm); -+#if 0 -+/*if (dm->support_ic_type & ODM_IC_11AC_SERIES)*/ -+/*odm_iq_calibrate(dm);*/ -+#endif -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ce.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ce.h -new file mode 100644 -index 000000000000..dcded1e0acb5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_ce.h -@@ -0,0 +1,123 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALPHYRF_H__ -+#define __HALPHYRF_H__ -+ -+#include "halrf/halrf_kfree.h" -+#if (RTL8814A_SUPPORT == 1) -+#include "halrf/rtl8814a/halrf_iqk_8814a.h" -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+#include "halrf/rtl8822b/halrf_iqk_8822b.h" -+#endif -+ -+#if (RTL8821C_SUPPORT == 1) -+#include "halrf/rtl8821c/halrf_iqk_8821c.h" -+#endif -+ -+#if (RTL8195B_SUPPORT == 1) -+/* #include "halrf/rtl8195b/halrf.h" */ -+#include "halrf/rtl8195b/halrf_iqk_8195b.h" -+#include "halrf/rtl8195b/halrf_txgapk_8195b.h" -+#include "halrf/rtl8195b/halrf_dpk_8195b.h" -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ #include "halrf/rtl8814b/halrf_iqk_8814b.h" -+ #include "halrf/rtl8814b/halrf_dpk_8814b.h" -+ #include "halrf/rtl8814b/halrf_txgapk_8814b.h" -+#endif -+ -+#include "halrf/halrf_powertracking_ce.h" -+ -+enum spur_cal_method { -+ PLL_RESET, -+ AFE_PHASE_SEL -+}; -+ -+enum pwrtrack_method { -+ BBSWING, -+ TXAGC, -+ MIX_MODE, -+ TSSI_MODE, -+ MIX_2G_TSSI_5G_MODE, -+ MIX_5G_TSSI_2G_MODE, -+ CLEAN_MODE -+}; -+ -+typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8); -+typedef void (*func_iqk)(void *, u8, u8, u8); -+typedef void (*func_lck)(void *); -+typedef void (*func_tssi_dck)(void *, u8); -+typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **); -+typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **); -+typedef void (*func_swing_xtal)(void *, s8 **, s8 **); -+typedef void (*func_set_xtal)(void *); -+ -+struct txpwrtrack_cfg { -+ u8 swing_table_size_cck; -+ u8 swing_table_size_ofdm; -+ u8 threshold_iqk; -+ u8 threshold_dpk; -+ u8 average_thermal_num; -+ u8 rf_path_count; -+ u32 thermal_reg_addr; -+ func_set_pwr odm_tx_pwr_track_set_pwr; -+ func_iqk do_iqk; -+ func_lck phy_lc_calibrate; -+ func_tssi_dck do_tssi_dck; -+ func_swing get_delta_swing_table; -+ func_swing8814only get_delta_swing_table8814only; -+ func_swing_xtal get_delta_swing_xtal_table; -+ func_set_xtal odm_txxtaltrack_set_xtal; -+}; -+ -+void configure_txpower_track(void *dm_void, struct txpwrtrack_cfg *config); -+ -+void odm_clear_txpowertracking_state(void *dm_void); -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+void odm_txpowertracking_callback_thermal_meter(void *dm_void); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+void odm_txpowertracking_callback_thermal_meter(void *dm); -+#else -+void odm_txpowertracking_callback_thermal_meter(void *adapter); -+#endif -+ -+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+void odm_txpowertracking_new_callback_thermal_meter(void *dm_void); -+#endif -+ -+#define ODM_TARGET_CHNL_NUM_2G_5G 59 -+ -+void odm_reset_iqk_result(void *dm_void); -+u8 odm_get_right_chnl_place_for_iqk(u8 chnl); -+ -+void phydm_rf_init(void *dm_void); -+void phydm_rf_watchdog(void *dm_void); -+ -+#endif /*__HALPHYRF_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_iot.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_iot.c -new file mode 100644 -index 000000000000..16d9084db881 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_iot.c -@@ -0,0 +1,664 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \ -+ do {\ -+ for (_offset = 0; _offset < _size; _offset++) { \ -+ if (_delta_thermal < thermal_threshold[_direction][_offset]) { \ -+ if (_offset != 0)\ -+ _offset--;\ -+ break;\ -+ } \ -+ } \ -+ if (_offset >= _size)\ -+ _offset = _size-1;\ -+ } while (0) -+ -+void configure_txpower_track( -+ void *dm_void, -+ struct txpwrtrack_cfg *config -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if RTL8195B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8195B) -+ configure_txpower_track_8195b(config); -+#endif -+#if RTL8710C_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8710C) -+ configure_txpower_track_8710c(config); -+#endif -+#if RTL8721D_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8721D) -+ configure_txpower_track_8721d(config); -+#endif -+ -+} -+ -+/* ********************************************************************** -+ * <20121113, Kordan> This function should be called when tx_agc changed. -+ * Otherwise the previous compensation is gone, because we record the -+ * delta of temperature between two TxPowerTracking watch dogs. -+ * -+ * NOTE: If Tx BB swing or Tx scaling is varified during run-time, still -+ * need to call this function. -+ * ********************************************************************** */ -+void -+odm_clear_txpowertracking_state( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ u8 p = 0; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ -+ cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index; -+ cali_info->bb_swing_idx_cck = cali_info->default_cck_index; -+ dm->rf_calibrate_info.CCK_index = 0; -+ -+ for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) { -+ cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index; -+ cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index; -+ cali_info->OFDM_index[p] = cali_info->default_ofdm_index; -+ -+ cali_info->power_index_offset[p] = 0; -+ cali_info->delta_power_index[p] = 0; -+ cali_info->delta_power_index_last[p] = 0; -+ -+ cali_info->absolute_ofdm_swing_idx[p] = 0; -+ cali_info->remnant_ofdm_swing_idx[p] = 0; -+ cali_info->kfree_offset[p] = 0; -+ } -+ -+ cali_info->modify_tx_agc_flag_path_a = false; -+ cali_info->modify_tx_agc_flag_path_b = false; -+ cali_info->modify_tx_agc_flag_path_c = false; -+ cali_info->modify_tx_agc_flag_path_d = false; -+ cali_info->remnant_cck_swing_idx = 0; -+ cali_info->thermal_value = rf->eeprom_thermal; -+ cali_info->modify_tx_agc_value_cck = 0; -+ cali_info->modify_tx_agc_value_ofdm = 0; -+} -+ -+void -+odm_txpowertracking_callback_thermal_meter( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ u8 thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0; -+ u8 thermal_value_avg_count = 0; -+ u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4; -+ -+ u8 OFDM_min_index = 0; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */ -+ u8 indexforchannel = 0; /* get_right_chnl_place_for_iqk(hal_data->current_channel) */ -+ u8 power_tracking_type = rf->pwt_type; -+ u8 xtal_offset_eanble = 0; -+ s8 thermal_value_temp = 0; -+ u8 xtal_track_efuse = 0; -+ -+ struct txpwrtrack_cfg c = {0}; -+ -+ /* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */ -+ u8 *delta_swing_table_idx_tup_a = NULL; -+ u8 *delta_swing_table_idx_tdown_a = NULL; -+ u8 *delta_swing_table_idx_tup_b = NULL; -+ u8 *delta_swing_table_idx_tdown_b = NULL; -+#if (RTL8721D_SUPPORT == 1) -+ u8 *delta_swing_table_idx_tup_a_cck = NULL; -+ u8 *delta_swing_table_idx_tdown_a_cck = NULL; -+ u8 *delta_swing_table_idx_tup_b_cck = NULL; -+ u8 *delta_swing_table_idx_tdown_b_cck = NULL; -+#endif -+ /*for Xtal Offset by James.Tung*/ -+ s8 *delta_swing_table_xtal_up = NULL; -+ s8 *delta_swing_table_xtal_down = NULL; -+ -+ /* 4 2. Initialization ( 7 steps in total ) */ -+ indexforchannel = odm_get_right_chnl_place_for_iqk(*dm->channel); -+ configure_txpower_track(dm, &c); -+#if (RTL8721D_SUPPORT == 1) -+ (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, -+ (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b, -+ (u8 **)&delta_swing_table_idx_tup_a_cck, (u8 **)&delta_swing_table_idx_tdown_a_cck, -+ (u8 **)&delta_swing_table_idx_tup_b_cck, (u8 **)&delta_swing_table_idx_tdown_b_cck); -+#else -+ (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, -+ (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b); -+#endif -+ -+ /*for Xtal Offset*/ -+ odm_efuse_one_byte_read(dm, 0xf7, &xtal_track_efuse, false); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Read efuse 0xf7=0x%x\n", xtal_track_efuse); -+ xtal_track_efuse = xtal_track_efuse & 0x3; -+ if (dm->support_ic_type == ODM_RTL8195B || -+ dm->support_ic_type == ODM_RTL8721D || -+ (dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2)) -+ (*c.get_delta_swing_xtal_table)(dm, -+ (s8 **)&delta_swing_table_xtal_up, -+ (s8 **)&delta_swing_table_xtal_down); -+ -+ cali_info->txpowertracking_callback_cnt++; /*cosa add for debug*/ -+ cali_info->is_txpowertracking_init = true; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", -+ cali_info->bb_swing_idx_cck_base, -+ cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], -+ cali_info->default_ofdm_index); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->txpowertrack_control = %d, hal_data->eeprom_thermal_meter %d\n", -+ cali_info->txpowertrack_control, rf->eeprom_thermal); -+ -+ if (dm->support_ic_type == ODM_RTL8721D -+ || dm->support_ic_type == ODM_RTL8710C) -+ thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, -+ c.thermal_reg_addr, 0x7e0); -+ /* 0x42: RF Reg[10:5] 8721D */ -+ else -+ thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, -+ c.thermal_reg_addr, 0xfc00); -+ /* 0x42: RF Reg[15:10] 88E */ -+ -+ thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "thermal_value_temp(%d) = thermal_value(%d) + power_trim_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm)); -+ -+ if (thermal_value_temp > 63) -+ thermal_value = 63; -+ else if (thermal_value_temp < 0) -+ thermal_value = 0; -+ else -+ thermal_value = thermal_value_temp; -+ -+ if (!cali_info->txpowertrack_control) -+ return; -+ -+ if (rf->eeprom_thermal == 0xff) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", rf->eeprom_thermal); -+ return; -+ } -+#if 0 -+ /*4 3. Initialize ThermalValues of rf_calibrate_info*/ -+ //if (cali_info->is_reloadtxpowerindex) -+ // RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "reload ofdm index for band switch\n"); -+#endif -+ /*4 4. Calculate average thermal meter*/ -+ -+ cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] = thermal_value; -+ cali_info->thermal_value_avg_index++; -+ if (cali_info->thermal_value_avg_index == c.average_thermal_num) /*Average times = c.average_thermal_num*/ -+ cali_info->thermal_value_avg_index = 0; -+ -+ for (i = 0; i < c.average_thermal_num; i++) { -+ if (cali_info->thermal_value_avg[i]) { -+ thermal_value_avg += cali_info->thermal_value_avg[i]; -+ thermal_value_avg_count++; -+ } -+ } -+ -+ if (thermal_value_avg_count) { /* Calculate Average thermal_value after average enough times */ -+ thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count); -+ cali_info->thermal_value_delta = thermal_value - rf->eeprom_thermal; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, rf->eeprom_thermal); -+ } -+ -+ /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ -+ /* "delta" here is used to determine whether thermal value changes or not. */ -+ delta = (thermal_value > cali_info->thermal_value) ? (thermal_value - cali_info->thermal_value) : (cali_info->thermal_value - thermal_value); -+ delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value); -+ delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value); -+ -+ /*4 6. If necessary, do LCK.*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK); -+ -+ /* Wait sacn to do LCK by RF Jenyu*/ -+ if ((!*dm->is_scan_in_process) && !iqk_info->rfk_forbidden && -+ (!*dm->is_tdma)) { -+ /* Delta temperature is equal to or larger than 20 centigrade.*/ -+ if (delta_LCK >= c.threshold_iqk) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); -+ cali_info->thermal_value_lck = thermal_value; -+ -+ /*Use RTLCK, so close power tracking driver LCK*/ -+ (*c.phy_lc_calibrate)(dm); -+ } -+ } -+ -+ /*3 7. If necessary, move the index of swing table to adjust Tx power.*/ -+ if (delta > 0 && cali_info->txpowertrack_control) { -+ /* "delta" here is used to record the absolute value of difference. */ -+ delta = thermal_value > rf->eeprom_thermal ? (thermal_value - rf->eeprom_thermal) : (rf->eeprom_thermal - thermal_value); -+ -+ if (delta >= TXPWR_TRACK_TABLE_SIZE) -+ delta = TXPWR_TRACK_TABLE_SIZE - 1; -+ -+ /*4 7.1 The Final Power index = BaseIndex + power_index_offset*/ -+ if (thermal_value > rf->eeprom_thermal) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/ -+ switch (p) { -+ case RF_PATH_B: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]); -+#if (RTL8721D_SUPPORT == 1) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup_b_cck[%d] = %d\n", delta, delta_swing_table_idx_tup_b_cck[delta]); -+ -+ cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_b_cck[delta]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_cck_swing_idx[RF_PATH_B] = %d\n", -+ cali_info->absolute_cck_swing_idx[p]); -+#endif -+ cali_info->delta_power_index[p] = -+ delta_swing_table_idx_tup_b -+ [delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -+ delta_swing_table_idx_tup_b -+ [delta]; -+ /*Record delta swing for mix mode*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ default: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]); -+#if (RTL8721D_SUPPORT == 1) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup_a_cck[%d] = %d\n", delta, delta_swing_table_idx_tup_a_cck[delta]); -+ -+ cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_a_cck[delta]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_cck_swing_idx[p]); -+#endif -+ cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -+ delta_swing_table_idx_tup_a[delta]; -+ /*Record delta swing*/ -+ /*for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ } -+ } -+ /* JJ ADD 20161014 */ -+ if (dm->support_ic_type == ODM_RTL8195B || -+ dm->support_ic_type == ODM_RTL8721D || -+ (dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2)) { -+ /*Save xtal_offset from Xtal table*/ -+ cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]); -+ cali_info->xtal_offset = delta_swing_table_xtal_up[delta]; -+ xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset); -+ } -+ -+ } else { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/ -+ -+ switch (p) { -+ case RF_PATH_B: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]); -+#if (RTL8721D_SUPPORT == 1) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown_b_cck[%d] = %d\n", delta, delta_swing_table_idx_tdown_b_cck[delta]); -+ -+ cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b_cck[delta]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_cck_swing_idx[p]); -+#endif -+ cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ default: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]); -+#if (RTL8721D_SUPPORT == 1) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown_a_cck[%d] = %d\n", delta, delta_swing_table_idx_tdown_a_cck[delta]); -+ -+ cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a_cck[delta]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_cck_swing_idx[p]); -+#endif -+ cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ } -+ } -+ /* JJ ADD 20161014 */ -+ -+ if (dm->support_ic_type == ODM_RTL8195B || -+ dm->support_ic_type == ODM_RTL8721D || -+ (dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2)) { -+ /*Save xtal_offset from Xtal table*/ -+ cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]); -+ cali_info->xtal_offset = delta_swing_table_xtal_down[delta]; -+ xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset); -+ } -+ } -+#if 0 -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p); -+ -+ if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/ -+ cali_info->power_index_offset[p] = 0; -+ else -+ cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/ -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, cali_info->power_index_offset[p], cali_info->delta_power_index[p], cali_info->delta_power_index_last[p]); -+ -+ cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p]; -+ cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p]; -+ -+ cali_info->bb_swing_idx_cck = cali_info->CCK_index; -+ cali_info->bb_swing_idx_ofdm[p] = cali_info->OFDM_index[p]; -+ -+ /*************Print BB Swing base and index Offset*************/ -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, cali_info->power_index_offset[p]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[p], p, cali_info->bb_swing_idx_ofdm_base[p], cali_info->power_index_offset[p]); -+ -+ /*4 7.1 Handle boundary conditions of index.*/ -+ -+ if (cali_info->OFDM_index[p] > c.swing_table_size_ofdm - 1) -+ cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1; -+ else if (cali_info->OFDM_index[p] <= OFDM_min_index) -+ cali_info->OFDM_index[p] = OFDM_min_index; -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "\n\n========================================================================================================\n"); -+ -+ if (cali_info->CCK_index > c.swing_table_size_cck - 1) -+ cali_info->CCK_index = c.swing_table_size_cck - 1; -+ else if (cali_info->CCK_index <= 0) -+ cali_info->CCK_index = 0; -+#endif -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, cali_info->thermal_value: %d\n", -+ cali_info->txpowertrack_control, thermal_value, cali_info->thermal_value); -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ cali_info->power_index_offset[p] = 0; -+ } -+#if 0 -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", -+ cali_info->CCK_index, cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/ -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n", -+ cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]); -+ } -+#endif -+ -+#if (RTL8721D_SUPPORT == 1) -+ if (thermal_value != cali_info->thermal_value) { -+ if (thermal_value > rf->eeprom_thermal) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) higher than PG value(%d)\n", -+ thermal_value, rf->eeprom_thermal); -+ else if (thermal_value < rf->eeprom_thermal) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) lower than PG value(%d)\n", -+ thermal_value, rf->eeprom_thermal); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "**********Enter POWER Tracking MIX_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, -+ indexforchannel); -+ -+ /*Record last time Power Tracking result as base.*/ -+ cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ cali_info->bb_swing_idx_ofdm_base[p] = -+ cali_info->bb_swing_idx_ofdm[p]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->thermal_value = %d thermal_value= %d\n", -+ cali_info->thermal_value, thermal_value); -+ /*Record last Power Tracking Thermal value*/ -+ cali_info->thermal_value = thermal_value; -+ } -+ -+#else -+ if (thermal_value > rf->eeprom_thermal) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) higher than PG value(%d)\n", thermal_value, rf->eeprom_thermal); -+ -+ if (dm->support_ic_type == ODM_RTL8188E || -+ dm->support_ic_type == ODM_RTL8192E || -+ dm->support_ic_type == ODM_RTL8821 || -+ dm->support_ic_type == ODM_RTL8812 || -+ dm->support_ic_type == ODM_RTL8723B || -+ dm->support_ic_type == ODM_RTL8814A || -+ dm->support_ic_type == ODM_RTL8703B || -+ dm->support_ic_type == ODM_RTL8188F || -+ dm->support_ic_type == ODM_RTL8822B || -+ dm->support_ic_type == ODM_RTL8723D || -+ dm->support_ic_type == ODM_RTL8821C || -+ dm->support_ic_type == ODM_RTL8710B || -+ dm->support_ic_type == ODM_RTL8192F || -+ dm->support_ic_type == ODM_RTL8195B || -+ dm->support_ic_type == ODM_RTL8710C){ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel); -+ } -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) lower than PG value(%d)\n", thermal_value, rf->eeprom_thermal); -+ -+ if (dm->support_ic_type == ODM_RTL8188E || -+ dm->support_ic_type == ODM_RTL8192E || -+ dm->support_ic_type == ODM_RTL8821 || -+ dm->support_ic_type == ODM_RTL8812 || -+ dm->support_ic_type == ODM_RTL8723B || -+ dm->support_ic_type == ODM_RTL8814A || -+ dm->support_ic_type == ODM_RTL8703B || -+ dm->support_ic_type == ODM_RTL8188F || -+ dm->support_ic_type == ODM_RTL8822B || -+ dm->support_ic_type == ODM_RTL8723D || -+ dm->support_ic_type == ODM_RTL8821C || -+ dm->support_ic_type == ODM_RTL8710B || -+ dm->support_ic_type == ODM_RTL8192F || -+ dm->support_ic_type == ODM_RTL8195B || -+ dm->support_ic_type == ODM_RTL8710C) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel); -+ } -+ -+ cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; /*Record last time Power Tracking result as base.*/ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->thermal_value = %d thermal_value= %d\n", cali_info->thermal_value, thermal_value); -+ -+ cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/ -+ } -+#endif -+ /* JJ ADD 20161014 */ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->xtal_offset_last=%d cali_info->xtal_offset=%d\n", -+ cali_info->xtal_offset_last, cali_info->xtal_offset); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "xtal_offset_eanble=%d cali_info->txpowertrack_control=%d rf->eeprom_thermal=%d xtal_track_efuse=%d\n", -+ xtal_offset_eanble, cali_info->txpowertrack_control, rf->eeprom_thermal, xtal_track_efuse); -+ -+ if (dm->support_ic_type == ODM_RTL8195B || -+ dm->support_ic_type == ODM_RTL8721D || -+ (dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2)) { -+ if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (rf->eeprom_thermal != 0xff)) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n"); -+ -+ if (thermal_value > rf->eeprom_thermal) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) higher than PG value(%d)\n", thermal_value, rf->eeprom_thermal); -+ (*c.odm_txxtaltrack_set_xtal)(dm); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) lower than PG value(%d)\n", thermal_value, rf->eeprom_thermal); -+ (*c.odm_txxtaltrack_set_xtal)(dm); -+ } -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********End Xtal Tracking**********\n"); -+ } -+ } -+#if (!RTL8721D_SUPPORT) -+ /* Wait sacn to do IQK by RF Jenyu*/ -+ if ((!*dm->is_scan_in_process) && (!iqk_info->rfk_forbidden) && (dm->is_linked || *dm->mp_mode)) { -+ /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ -+ if (delta_IQK >= c.threshold_iqk) { -+ cali_info->thermal_value_iqk = thermal_value; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); -+ if (!cali_info->is_iqk_in_progress) -+ (*c.do_iqk)(dm, delta_IQK, thermal_value, 8); -+ } -+ } -+#endif -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n"); -+ -+ cali_info->tx_powercount = 0; -+} -+ -+/* 3============================================================ -+ * 3 IQ Calibration -+ * 3============================================================ -+ */ -+ -+void -+odm_reset_iqk_result( -+ void *dm_void -+) -+{ -+ return; -+} -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+u8 odm_get_right_chnl_place_for_iqk(u8 chnl) -+{ -+ u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { -+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, -+ 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, -+ 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, -+ 124, 126, 128, 130, 132, 134, 136, 138, 140, -+ 149, 151, 153, 155, 157, 159, 161, 163, 165}; -+ u8 place = chnl; -+ -+ if (chnl > 14) { -+ for (place = 14; place < sizeof(channel_all); place++) { -+ if (channel_all[place] == chnl) -+ return place - 13; -+ } -+ } -+ return 0; -+} -+#endif -+ -+void -+odm_rf_calibrate(struct dm_struct *dm) -+{ -+#if (RTL8721D_SUPPORT == 1) -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ if (dm->is_linked && !iqk_info->rfk_forbidden) { -+ if ((*dm->channel != dm->pre_channel) && -+ (!*dm->is_scan_in_process)) { -+ dm->pre_channel = *dm->channel; -+ dm->linked_interval = 0; -+ } -+ -+ if (dm->linked_interval < 3) -+ dm->linked_interval++; -+ -+ if (dm->linked_interval == 2) -+ halrf_rf_k_connect_trigger(dm, 0, SEGMENT_FREE); -+ } else { -+ dm->linked_interval = 0; -+ } -+#endif -+} -+ -+void phydm_rf_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_txpowertracking_init(dm); -+ -+ odm_clear_txpowertracking_state(dm); -+} -+ -+void phydm_rf_watchdog(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_txpowertracking_check(dm); -+#if (RTL8721D_SUPPORT == 1) -+ odm_rf_calibrate(dm); -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_iot.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_iot.h -new file mode 100644 -index 000000000000..8d4395a1f74d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_iot.h -@@ -0,0 +1,137 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALPHYRF_H__ -+#define __HALPHYRF_H__ -+ -+#include "halrf/halrf_kfree.h" -+ -+#if (RTL8821C_SUPPORT == 1) -+ #include "halrf/rtl8821c/halrf_iqk_8821c.h" -+#endif -+ -+#if (RTL8195B_SUPPORT == 1) -+// #include "halrf/rtl8195b/halrf.h" -+ #include "halrf/rtl8195b/halrf_iqk_8195b.h" -+ #include "halrf/rtl8195b/halrf_txgapk_8195b.h" -+ #include "halrf/rtl8195b/halrf_dpk_8195b.h" -+#endif -+ -+#if (RTL8710C_SUPPORT == 1) -+// #include "halrf/rtl8710c/halrf.h" -+ #include "halrf/rtl8710c/halrf_iqk_8710c.h" -+// #include "halrf/rtl8710c/halrf_txgapk_8710c.h" -+// #include "halrf/rtl8710c/halrf_dpk_8710c.h" -+#endif -+ -+#include "halrf/halrf_powertracking_iot.h" -+ -+ -+enum spur_cal_method { -+ PLL_RESET, -+ AFE_PHASE_SEL -+}; -+ -+enum pwrtrack_method { -+ BBSWING, -+ TXAGC, -+ MIX_MODE, -+ TSSI_MODE, -+ MIX_2G_TSSI_5G_MODE, -+ MIX_5G_TSSI_2G_MODE, -+ CLEAN_MODE -+}; -+ -+typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8); -+typedef void(*func_iqk)(void *, u8, u8, u8); -+typedef void (*func_lck)(void *); -+#if (RTL8721D_SUPPORT == 1) -+ typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **, -+ u8 **, u8 **, u8 **, u8 **); -+#else -+ typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **); -+#endif -+typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **); -+typedef void(*func_swing_xtal)(void *, s8 **, s8 **); -+typedef void(*func_set_xtal)(void *); -+ -+struct txpwrtrack_cfg { -+ u8 swing_table_size_cck; -+ u8 swing_table_size_ofdm; -+ u8 threshold_iqk; -+ u8 threshold_dpk; -+ u8 average_thermal_num; -+ u8 rf_path_count; -+ u32 thermal_reg_addr; -+ func_set_pwr odm_tx_pwr_track_set_pwr; -+ func_iqk do_iqk; -+ func_lck phy_lc_calibrate; -+ func_swing get_delta_swing_table; -+ func_swing8814only get_delta_swing_table8814only; -+ func_swing_xtal get_delta_swing_xtal_table; -+ func_set_xtal odm_txxtaltrack_set_xtal; -+}; -+ -+void -+configure_txpower_track( -+ void *dm_void, -+ struct txpwrtrack_cfg *config -+); -+ -+ -+void -+odm_clear_txpowertracking_state( -+ void *dm_void -+); -+ -+void -+odm_txpowertracking_callback_thermal_meter( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ void *dm_void -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ void *dm -+#else -+ void *adapter -+#endif -+); -+ -+ -+ -+#define ODM_TARGET_CHNL_NUM_2G_5G 59 -+ -+ -+void -+odm_reset_iqk_result( -+ void *dm_void -+); -+u8 -+odm_get_right_chnl_place_for_iqk( -+ u8 chnl -+); -+ -+void phydm_rf_init(void *dm_void); -+void phydm_rf_watchdog(void *dm_void); -+ -+#endif /*#ifndef __HALPHYRF_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_win.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_win.c -new file mode 100644 -index 000000000000..679d5e094da0 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_win.c -@@ -0,0 +1,1108 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \ -+ do {\ -+ for (_offset = 0; _offset < _size; _offset++) { \ -+ \ -+ if (_delta_thermal < thermal_threshold[_direction][_offset]) { \ -+ \ -+ if (_offset != 0)\ -+ _offset--;\ -+ break;\ -+ } \ -+ } \ -+ if (_offset >= _size)\ -+ _offset = _size-1;\ -+ } while (0) -+ -+void configure_txpower_track( -+ struct dm_struct *dm, -+ struct txpwrtrack_cfg *config -+) -+{ -+#if RTL8192E_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8192E) -+ configure_txpower_track_8192e(config); -+#endif -+#if RTL8821A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8821) -+ configure_txpower_track_8821a(config); -+#endif -+#if RTL8812A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8812) -+ configure_txpower_track_8812a(config); -+#endif -+#if RTL8188E_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8188E) -+ configure_txpower_track_8188e(config); -+#endif -+ -+#if RTL8188F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8188F) -+ configure_txpower_track_8188f(config); -+#endif -+ -+#if RTL8723B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8723B) -+ configure_txpower_track_8723b(config); -+#endif -+ -+#if RTL8814A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8814A) -+ configure_txpower_track_8814a(config); -+#endif -+ -+#if RTL8703B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8703B) -+ configure_txpower_track_8703b(config); -+#endif -+ -+#if RTL8822B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8822B) -+ configure_txpower_track_8822b(config); -+#endif -+ -+#if RTL8723D_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8723D) -+ configure_txpower_track_8723d(config); -+#endif -+ -+/* JJ ADD 20161014 */ -+#if RTL8710B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8710B) -+ configure_txpower_track_8710b(config); -+#endif -+ -+#if RTL8821C_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8821C) -+ configure_txpower_track_8821c(config); -+#endif -+ -+#if RTL8192F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8192F) -+ configure_txpower_track_8192f(config); -+#endif -+ -+#if RTL8822C_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8822C) -+ configure_txpower_track_8822c(config); -+#endif -+ -+#if RTL8814B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8814B) -+ configure_txpower_track_8814b(config); -+#endif -+ -+#if RTL8723F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8723F) -+ configure_txpower_track_8723f(config); -+#endif -+ -+} -+ -+/* ********************************************************************** -+ * <20121113, Kordan> This function should be called when tx_agc changed. -+ * Otherwise the previous compensation is gone, because we record the -+ * delta of temperature between two TxPowerTracking watch dogs. -+ * -+ * NOTE: If Tx BB swing or Tx scaling is varified during run-time, still -+ * need to call this function. -+ * ********************************************************************** */ -+void -+odm_clear_txpowertracking_state( -+ struct dm_struct *dm -+) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA((PADAPTER)(dm->adapter)); -+ u8 p = 0; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ -+ cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index; -+ cali_info->bb_swing_idx_cck = cali_info->default_cck_index; -+ cali_info->CCK_index = 0; -+ -+ for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) { -+ cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index; -+ cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index; -+ cali_info->OFDM_index[p] = cali_info->default_ofdm_index; -+ -+ cali_info->power_index_offset[p] = 0; -+ cali_info->delta_power_index[p] = 0; -+ cali_info->delta_power_index_last[p] = 0; -+ -+ cali_info->absolute_ofdm_swing_idx[p] = 0; /* Initial Mix mode power tracking*/ -+ cali_info->remnant_ofdm_swing_idx[p] = 0; -+ cali_info->kfree_offset[p] = 0; -+ } -+ -+ cali_info->modify_tx_agc_flag_path_a = false; /*Initial at Modify Tx Scaling mode*/ -+ cali_info->modify_tx_agc_flag_path_b = false; /*Initial at Modify Tx Scaling mode*/ -+ cali_info->modify_tx_agc_flag_path_c = false; /*Initial at Modify Tx Scaling mode*/ -+ cali_info->modify_tx_agc_flag_path_d = false; /*Initial at Modify Tx Scaling mode*/ -+ cali_info->remnant_cck_swing_idx = 0; -+ cali_info->thermal_value = hal_data->eeprom_thermal_meter; -+ -+ cali_info->modify_tx_agc_value_cck = 0; /* modify by Mingzhi.Guo */ -+ cali_info->modify_tx_agc_value_ofdm = 0; /* modify by Mingzhi.Guo */ -+ -+} -+ -+void -+odm_txpowertracking_callback_thermal_meter( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ struct dm_struct *dm -+#else -+ void *adapter -+#endif -+) -+{ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ struct dm_struct *dm = &hal_data->odmpriv; -+#endif -+#endif -+ -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ u8 thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0; -+ s8 diff_DPK[4] = {0}; -+ u8 thermal_value_avg_count = 0; -+ u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4, regc88, rege14, reg848,reg838, reg86c; -+ -+ u8 OFDM_min_index = 0; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */ -+ u8 indexforchannel = 0; /* get_right_chnl_place_for_iqk(hal_data->current_channel) */ -+ u8 power_tracking_type = hal_data->RfPowerTrackingType; -+ u8 xtal_offset_eanble = 0; -+ s8 thermal_value_temp = 0; -+ -+ struct txpwrtrack_cfg c; -+ -+ /* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */ -+ u8 *delta_swing_table_idx_tup_a = NULL; -+ u8 *delta_swing_table_idx_tdown_a = NULL; -+ u8 *delta_swing_table_idx_tup_b = NULL; -+ u8 *delta_swing_table_idx_tdown_b = NULL; -+ /*for 8814 add by Yu Chen*/ -+ u8 *delta_swing_table_idx_tup_c = NULL; -+ u8 *delta_swing_table_idx_tdown_c = NULL; -+ u8 *delta_swing_table_idx_tup_d = NULL; -+ u8 *delta_swing_table_idx_tdown_d = NULL; -+ /*for Xtal Offset by James.Tung*/ -+ s8 *delta_swing_table_xtal_up = NULL; -+ s8 *delta_swing_table_xtal_down = NULL; -+ -+ /* 4 2. Initilization ( 7 steps in total ) */ -+ -+ configure_txpower_track(dm, &c); -+ -+ (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, -+ (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b); -+ -+ if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8814B)) /*for 8814 path C & D*/ -+ (*c.get_delta_swing_table8814only)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c, -+ (u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d); -+ /* JJ ADD 20161014 */ -+ if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F)) /*for Xtal Offset*/ -+ (*c.get_delta_swing_xtal_table)(dm, (s8 **)&delta_swing_table_xtal_up, (s8 **)&delta_swing_table_xtal_down); -+ -+ -+ cali_info->txpowertracking_callback_cnt++; /*cosa add for debug*/ -+ cali_info->is_txpowertracking_init = true; -+ -+ /*cali_info->txpowertrack_control = hal_data->txpowertrack_control; -+ We should keep updating the control variable according to HalData. -+ rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if (MP_DRIVER == 1) -+ cali_info->rega24 = 0x090e1317; -+#endif -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ if (*(dm->mp_mode) == true) -+ cali_info->rega24 = 0x090e1317; -+#endif -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", -+ cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->txpowertrack_control=%d, hal_data->eeprom_thermal_meter %d\n", cali_info->txpowertrack_control, hal_data->eeprom_thermal_meter); -+ thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ -+ -+ thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "thermal_value_temp(%d) = thermal_value(%d) + power_time_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm)); -+ -+ if (thermal_value_temp > 63) -+ thermal_value = 63; -+ else if (thermal_value_temp < 0) -+ thermal_value = 0; -+ else -+ thermal_value = thermal_value_temp; -+ -+ /*add log by zhao he, check c80/c94/c14/ca0 value*/ -+ if (dm->support_ic_type == ODM_RTL8723D) { -+ regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD); -+ regcd0 = odm_get_bb_reg(dm, R_0xcd0, MASKDWORD); -+ regcd4 = odm_get_bb_reg(dm, R_0xcd4, MASKDWORD); -+ regab4 = odm_get_bb_reg(dm, R_0xab4, 0x000007FF); -+ RF_DBG(dm, DBG_RF_IQK, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4); -+ } -+ -+ /* JJ ADD 20161014 */ -+ if (dm->support_ic_type == ODM_RTL8710B) { -+ regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD); -+ regcd0 = odm_get_bb_reg(dm, R_0xcd0, MASKDWORD); -+ regcd4 = odm_get_bb_reg(dm, R_0xcd4, MASKDWORD); -+ regab4 = odm_get_bb_reg(dm, R_0xab4, 0x000007FF); -+ RF_DBG(dm, DBG_RF_IQK, "0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4); -+ } -+ /* Winnita add 20171205 */ -+ if (dm->support_ic_type == ODM_RTL8192F) { -+ regc80 = odm_get_bb_reg(dm, R_0xc80, MASKDWORD); -+ regc88 = odm_get_bb_reg(dm, R_0xc88, MASKDWORD); -+ regab4 = odm_get_bb_reg(dm, R_0xab4, MASKDWORD); -+ rege14 = odm_get_bb_reg(dm, R_0xe14, MASKDWORD); -+ reg848 = odm_get_bb_reg(dm, R_0x848, MASKDWORD); -+ reg838 = odm_get_bb_reg(dm, R_0x838, MASKDWORD); -+ reg86c = odm_get_bb_reg(dm, R_0x86c, MASKDWORD); -+ RF_DBG(dm, DBG_RF_IQK, "0xc80 = 0x%x 0xc88 = 0x%x 0xab4 = 0x%x 0xe14 = 0x%x\n", regc80, regc88, regab4, rege14); -+ RF_DBG(dm, DBG_RF_IQK, "0x848 = 0x%x 0x838 = 0x%x 0x86c = 0x%x\n", reg848, reg838, reg86c); -+ } -+ -+ if (!cali_info->txpowertrack_control) -+ return; -+ -+ if (hal_data->eeprom_thermal_meter == 0xff) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", hal_data->eeprom_thermal_meter); -+ return; -+ } -+ -+ /*4 3. Initialize ThermalValues of rf_calibrate_info*/ -+ -+ if (cali_info->is_reloadtxpowerindex) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "reload ofdm index for band switch\n"); -+ -+ /*4 4. Calculate average thermal meter*/ -+ -+ cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] = thermal_value; -+ cali_info->thermal_value_avg_index++; -+ if (cali_info->thermal_value_avg_index == c.average_thermal_num) /*Average times = c.average_thermal_num*/ -+ cali_info->thermal_value_avg_index = 0; -+ -+ for (i = 0; i < c.average_thermal_num; i++) { -+ if (cali_info->thermal_value_avg[i]) { -+ thermal_value_avg += cali_info->thermal_value_avg[i]; -+ thermal_value_avg_count++; -+ } -+ } -+ -+ if (thermal_value_avg_count) { /* Calculate Average thermal_value after average enough times */ -+ thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count); -+ cali_info->thermal_value_delta = thermal_value - hal_data->eeprom_thermal_meter; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, hal_data->eeprom_thermal_meter); -+ } -+ -+ /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ -+ -+ /* "delta" here is used to determine whether thermal value changes or not. */ -+ delta = (thermal_value > cali_info->thermal_value) ? (thermal_value - cali_info->thermal_value) : (cali_info->thermal_value - thermal_value); -+ delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value); -+ delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value); -+ -+ if (cali_info->thermal_value_iqk == 0xff) { /*no PG, use thermal value for IQK*/ -+ cali_info->thermal_value_iqk = thermal_value; -+ delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no PG, use thermal_value for IQK\n"); -+ } -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ diff_DPK[p] = (s8)thermal_value - (s8)cali_info->dpk_thermal[p]; -+ -+ /*4 6. If necessary, do LCK.*/ -+ -+ if (!(dm->support_ic_type & ODM_RTL8821)) { /*no PG, do LCK at initial status*/ -+ if (cali_info->thermal_value_lck == 0xff) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no PG, do LCK\n"); -+ cali_info->thermal_value_lck = thermal_value; -+ -+ /*Use RTLCK, so close power tracking driver LCK*/ -+ if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) { -+ if (c.phy_lc_calibrate) -+ (*c.phy_lc_calibrate)(dm); -+ } -+ -+ delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value); -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK); -+ -+ /* Wait sacn to do LCK by RF Jenyu*/ -+ if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { -+ /* Delta temperature is equal to or larger than 20 centigrade.*/ -+ if (delta_LCK >= c.threshold_iqk) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); -+ cali_info->thermal_value_lck = thermal_value; -+ -+ /*Use RTLCK, so close power tracking driver LCK*/ -+ if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) { -+ if (c.phy_lc_calibrate) -+ (*c.phy_lc_calibrate)(dm); -+ } -+ } -+ } -+ } -+ -+ /*3 7. If necessary, move the index of swing table to adjust Tx power.*/ -+ -+ if (delta > 0 && cali_info->txpowertrack_control) { -+ /* "delta" here is used to record the absolute value of differrence. */ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ delta = thermal_value > hal_data->eeprom_thermal_meter ? (thermal_value - hal_data->eeprom_thermal_meter) : (hal_data->eeprom_thermal_meter - thermal_value); -+#else -+ delta = (thermal_value > dm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - dm->priv->pmib->dot11RFEntry.ther) : (dm->priv->pmib->dot11RFEntry.ther - thermal_value); -+#endif -+ if (delta >= TXPWR_TRACK_TABLE_SIZE) -+ delta = TXPWR_TRACK_TABLE_SIZE - 1; -+ -+ /*4 7.1 The Final Power index = BaseIndex + power_index_offset*/ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ if (thermal_value > hal_data->eeprom_thermal_meter) { -+#else -+ if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) { -+#endif -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/ -+ switch (p) { -+ case RF_PATH_B: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]); -+ -+ cali_info->delta_power_index[p] = delta_swing_table_idx_tup_b[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_C: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]); -+ -+ cali_info->delta_power_index[p] = delta_swing_table_idx_tup_c[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_D: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]); -+ -+ cali_info->delta_power_index[p] = delta_swing_table_idx_tup_d[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ default: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]); -+ -+ cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ } -+ } -+ /* JJ ADD 20161014 */ -+ if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F)) { -+ /*Save xtal_offset from Xtal table*/ -+ cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]); -+ cali_info->xtal_offset = delta_swing_table_xtal_up[delta]; -+ -+ if (cali_info->xtal_offset_last == cali_info->xtal_offset) -+ xtal_offset_eanble = 0; -+ else -+ xtal_offset_eanble = 1; -+ } -+ -+ } else { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/ -+ -+ switch (p) { -+ case RF_PATH_B: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]); -+ cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_C: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]); -+ cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_c[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_C] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ case RF_PATH_D: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]); -+ cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_d[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_D] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ -+ default: -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]); -+ cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta]; -+ cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]); -+ break; -+ } -+ } -+ /* JJ ADD 20161014 */ -+ if (dm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B | ODM_RTL8192F)) { -+ /*Save xtal_offset from Xtal table*/ -+ cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]); -+ cali_info->xtal_offset = delta_swing_table_xtal_down[delta]; -+ -+ if (cali_info->xtal_offset_last == cali_info->xtal_offset) -+ xtal_offset_eanble = 0; -+ else -+ xtal_offset_eanble = 1; -+ } -+ -+ } -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p); -+ -+ if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/ -+ cali_info->power_index_offset[p] = 0; -+ else -+ cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/ -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, cali_info->power_index_offset[p], cali_info->delta_power_index[p], cali_info->delta_power_index_last[p]); -+ -+ cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p]; -+ cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p]; -+ -+ cali_info->bb_swing_idx_cck = cali_info->CCK_index; -+ cali_info->bb_swing_idx_ofdm[p] = cali_info->OFDM_index[p]; -+ -+ /*************Print BB Swing base and index Offset*************/ -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, cali_info->power_index_offset[p]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[p], p, cali_info->bb_swing_idx_ofdm_base[p], cali_info->power_index_offset[p]); -+ -+ /*4 7.1 Handle boundary conditions of index.*/ -+ -+ if (cali_info->OFDM_index[p] > c.swing_table_size_ofdm - 1) -+ cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1; -+ else if (cali_info->OFDM_index[p] <= OFDM_min_index) -+ cali_info->OFDM_index[p] = OFDM_min_index; -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "\n\n========================================================================================================\n"); -+ -+ if (cali_info->CCK_index > c.swing_table_size_cck - 1) -+ cali_info->CCK_index = c.swing_table_size_cck - 1; -+ else if (cali_info->CCK_index <= 0) -+ cali_info->CCK_index = 0; -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, cali_info->thermal_value: %d\n", -+ cali_info->txpowertrack_control, thermal_value, cali_info->thermal_value); -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ cali_info->power_index_offset[p] = 0; -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", -+ cali_info->CCK_index, cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/ -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n", -+ cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]); -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8814B) -+ power_tracking_type = TSSI_MODE; -+ -+ if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8814B)) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "power_tracking_type=%d\n", power_tracking_type); -+ -+ if (power_tracking_type == 0) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else if (power_tracking_type == 1) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_2G_TSSI_5G_MODE, p, 0); -+ } else if (power_tracking_type == 2) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_5G_TSSI_2G_MODE, p, 0); -+ } else if (power_tracking_type == 3) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, TSSI_MODE, p, 0); -+ } -+ cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/ -+ -+ } else if ((cali_info->power_index_offset[RF_PATH_A] != 0 || -+ cali_info->power_index_offset[RF_PATH_B] != 0 || -+ cali_info->power_index_offset[RF_PATH_C] != 0 || -+ cali_info->power_index_offset[RF_PATH_D] != 0) && -+ cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) { -+ /* 4 7.2 Configure the Swing Table to adjust Tx Power. */ -+ -+ cali_info->is_tx_power_changed = true; /*Always true after Tx Power is adjusted by power tracking.*/ -+ /* */ -+ /* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */ -+ /* to increase TX power. Otherwise, EVM will be bad. */ -+ /* */ -+ /* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */ -+ if (thermal_value > cali_info->thermal_value) { -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", -+ p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value); -+ } -+ } else if (thermal_value < cali_info->thermal_value) { /*Low temperature*/ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", -+ p, cali_info->power_index_offset[p], delta, thermal_value, hal_data->eeprom_thermal_meter, cali_info->thermal_value); -+ } -+ } -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ if (thermal_value > hal_data->eeprom_thermal_meter) -+#else -+ if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) -+#endif -+ { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); -+ -+ if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 || -+ dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A || -+ dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B || -+ dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B || -+ dm->support_ic_type == ODM_RTL8192F) { -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel); -+ } -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); -+ -+ if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8821 || -+ dm->support_ic_type == ODM_RTL8812 || dm->support_ic_type == ODM_RTL8723B || dm->support_ic_type == ODM_RTL8814A || -+ dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8822B || -+ dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8821C || dm->support_ic_type == ODM_RTL8710B || -+ dm->support_ic_type == ODM_RTL8192F) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel); -+ } -+ -+ } -+ -+ cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; /*Record last time Power Tracking result as base.*/ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->thermal_value = %d thermal_value= %d\n", cali_info->thermal_value, thermal_value); -+ -+ cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/ -+ -+ } -+ -+ -+ if (dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || -+ dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */ -+ -+ if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (hal_data->eeprom_thermal_meter != 0xff)) { -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n"); -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ if (thermal_value > hal_data->eeprom_thermal_meter) { -+#else -+ if (thermal_value > dm->priv->pmib->dot11RFEntry.ther) { -+#endif -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) higher than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); -+ (*c.odm_txxtaltrack_set_xtal)(dm); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "Temperature(%d) lower than PG value(%d)\n", thermal_value, hal_data->eeprom_thermal_meter); -+ (*c.odm_txxtaltrack_set_xtal)(dm); -+ } -+ } -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********End Xtal Tracking**********\n"); -+ } -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ -+ /* Wait sacn to do IQK by RF Jenyu*/ -+ if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden) && dm->is_linked) { -+ if (!IS_HARDWARE_TYPE_8723B(adapter)) { -+ /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ -+ if (delta_IQK >= c.threshold_iqk) { -+ cali_info->thermal_value_iqk = thermal_value; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); -+ if (!cali_info->is_iqk_in_progress) -+ (*c.do_iqk)(dm, delta_IQK, thermal_value, 8); -+ } -+ } -+ } -+ if (cali_info->dpk_thermal[RF_PATH_A] != 0) { -+ if (diff_DPK[RF_PATH_A] >= c.threshold_dpk) { -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_A] / c.threshold_dpk)); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } else if ((diff_DPK[RF_PATH_A] <= -1 * c.threshold_dpk)) { -+ s32 value = 0x20 + (diff_DPK[RF_PATH_A] / c.threshold_dpk); -+ -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } else { -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xcc4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } -+ } -+ if (cali_info->dpk_thermal[RF_PATH_B] != 0) { -+ if (diff_DPK[RF_PATH_B] >= c.threshold_dpk) { -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), (diff_DPK[RF_PATH_B] / c.threshold_dpk)); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } else if ((diff_DPK[RF_PATH_B] <= -1 * c.threshold_dpk)) { -+ s32 value = 0x20 + (diff_DPK[RF_PATH_B] / c.threshold_dpk); -+ -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), value); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } else { -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x1); -+ odm_set_bb_reg(dm, R_0xec4, BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10), 0); -+ odm_set_bb_reg(dm, R_0x82c, BIT(31), 0x0); -+ } -+ } -+ -+#endif -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n"); -+ -+ cali_info->tx_powercount = 0; -+} -+ -+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+void -+odm_txpowertracking_new_callback_thermal_meter(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; -+ u8 thermal_value[MAX_RF_PATH] = {0}, delta[MAX_RF_PATH] = {0}; -+ u8 delta_swing_table_idx_tup[DELTA_SWINGIDX_SIZE] = {0}; -+ u8 delta_swing_table_idx_tdown[DELTA_SWINGIDX_SIZE] = {0}; -+ u8 delta_LCK = 0, delta_IQK = 0, i = 0, j = 0, p; -+ u8 thermal_value_avg_count[MAX_RF_PATH] = {0}; -+ u32 thermal_value_avg[MAX_RF_PATH] = {0}; -+ s8 thermal_value_temp[MAX_RF_PATH] = {0}; -+ u8 tracking_method = MIX_MODE; -+ -+ struct txpwrtrack_cfg c; -+ -+ u8 *delta_swing_table_idx_tup_a = NULL; -+ u8 *delta_swing_table_idx_tdown_a = NULL; -+ u8 *delta_swing_table_idx_tup_b = NULL; -+ u8 *delta_swing_table_idx_tdown_b = NULL; -+ u8 *delta_swing_table_idx_tup_c = NULL; -+ u8 *delta_swing_table_idx_tdown_c = NULL; -+ u8 *delta_swing_table_idx_tup_d = NULL; -+ u8 *delta_swing_table_idx_tdown_d = NULL; -+ -+ configure_txpower_track(dm, &c); -+ -+ (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a, -+ (u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b); -+ -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ (*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c, -+ (u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d); -+ } -+ -+ cali_info->txpowertracking_callback_cnt++; -+ cali_info->is_txpowertracking_init = true; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n", -+ cali_info->bb_swing_idx_cck_base, cali_info->bb_swing_idx_ofdm_base[RF_PATH_A], cali_info->default_ofdm_index); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "cali_info->txpowertrack_control=%d, tssi->thermal[RF_PATH_A]=%d tssi->thermal[RF_PATH_B]=%d\n", -+ cali_info->txpowertrack_control, tssi->thermal[RF_PATH_A], tssi->thermal[RF_PATH_B]); -+ -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ for (i = 0; i < c.rf_path_count; i++) -+ thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0x7e); /* 0x42: RF Reg[6:1] Thermal Trim*/ -+ } else { -+ for (i = 0; i < c.rf_path_count; i++) { -+ thermal_value[i] = (u8)odm_get_rf_reg(dm, i, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ -+ -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_multi_thermal_offset(dm, i); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "thermal_value_temp[%d](%d) = thermal_value[%d](%d) + multi_thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_multi_thermal_offset(dm, i)); -+ } else { -+ thermal_value_temp[i] = (s8)thermal_value[i] + phydm_get_thermal_offset(dm); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "thermal_value_temp[%d](%d) = thermal_value[%d](%d) + thermal_trim(%d)\n", i, thermal_value_temp[i], i, thermal_value[i], phydm_get_thermal_offset(dm)); -+ } -+ -+ if (thermal_value_temp[i] > 63) -+ thermal_value[i] = 63; -+ else if (thermal_value_temp[i] < 0) -+ thermal_value[i] = 0; -+ else -+ thermal_value[i] = thermal_value_temp[i]; -+ } -+ } -+ -+ if ((tssi->thermal[RF_PATH_A] == 0xff || tssi->thermal[RF_PATH_B] == 0xff)) { -+ for (i = 0; i < c.rf_path_count; i++) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, tssi->thermal[%d] = 0x%x\n", -+ i, tssi->thermal[i]); -+ return; -+ } -+ -+ for (j = 0; j < c.rf_path_count; j++) { -+ cali_info->thermal_value_avg_path[j][cali_info->thermal_value_avg_index_path[j]] = thermal_value[j]; -+ cali_info->thermal_value_avg_index_path[j]++; -+ if (cali_info->thermal_value_avg_index_path[j] == c.average_thermal_num) /*Average times = c.average_thermal_num*/ -+ cali_info->thermal_value_avg_index_path[j] = 0; -+ -+ -+ for (i = 0; i < c.average_thermal_num; i++) { -+ if (cali_info->thermal_value_avg_path[j][i]) { -+ thermal_value_avg[j] += cali_info->thermal_value_avg_path[j][i]; -+ thermal_value_avg_count[j]++; -+ } -+ } -+ -+ if (thermal_value_avg_count[j]) { /* Calculate Average thermal_value after average enough times */ -+ thermal_value[j] = (u8)(thermal_value_avg[j] / thermal_value_avg_count[j]); -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "AVG Thermal Meter = 0x%X, tssi->thermal[%d] = 0x%x\n", -+ thermal_value[j], j, tssi->thermal[j]); -+ } -+ /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ -+ -+ /* "delta" here is used to determine whether thermal value changes or not. */ -+ delta[j] = (thermal_value[j] > cali_info->thermal_value_path[j]) ? (thermal_value[j] - cali_info->thermal_value_path[j]) : (cali_info->thermal_value_path[j] - thermal_value[j]); -+ delta_LCK = (thermal_value[0] > cali_info->thermal_value_lck) ? (thermal_value[0] - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value[0]); -+ delta_IQK = (thermal_value[0] > cali_info->thermal_value_iqk) ? (thermal_value[0] - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value[0]); -+ } -+ -+ /*4 6. If necessary, do LCK.*/ -+ -+ for (i = 0; i < c.rf_path_count; i++) -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta[%d], delta_LCK, delta_IQK) = (%d, %d, %d)\n", i, delta[i], delta_LCK, delta_IQK); -+ -+ /* Wait sacn to do LCK by RF Jenyu*/ -+ if( (*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden)) { -+ /* Delta temperature is equal to or larger than 20 centigrade.*/ -+ if (delta_LCK >= c.threshold_iqk) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk); -+ cali_info->thermal_value_lck = thermal_value[RF_PATH_A]; -+ -+ /*Use RTLCK, so close power tracking driver LCK*/ -+ if ((!(dm->support_ic_type & ODM_RTL8814A)) && (!(dm->support_ic_type & ODM_RTL8822B))) { -+ if (c.phy_lc_calibrate) -+ (*c.phy_lc_calibrate)(dm); -+ } else -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do not do LCK\n"); -+ } -+ } -+ -+ /*3 7. If necessary, move the index of swing table to adjust Tx power.*/ -+ for (i = 0; i < c.rf_path_count; i++) { -+ if (i == RF_PATH_B) { -+ odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_b, DELTA_SWINGIDX_SIZE); -+ } else if (i == RF_PATH_C) { -+ odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_c, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_c, DELTA_SWINGIDX_SIZE); -+ } else if (i == RF_PATH_D) { -+ odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_d, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_d, DELTA_SWINGIDX_SIZE); -+ } else { -+ odm_move_memory(dm, delta_swing_table_idx_tup, delta_swing_table_idx_tup_a, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, delta_swing_table_idx_tdown, delta_swing_table_idx_tdown_a, DELTA_SWINGIDX_SIZE); -+ } -+ -+ cali_info->delta_power_index_last[i] = cali_info->delta_power_index[i]; /*recording poer index offset*/ -+ delta[i] = thermal_value[i] > tssi->thermal[i] ? (thermal_value[i] - tssi->thermal[i]) : (tssi->thermal[i] - thermal_value[i]); -+ -+ if (delta[i] >= TXPWR_TRACK_TABLE_SIZE) -+ delta[i] = TXPWR_TRACK_TABLE_SIZE - 1; -+ -+ if (thermal_value[i] > tssi->thermal[i]) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tup[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tup[delta[i]], i); -+ -+ cali_info->delta_power_index[i] = delta_swing_table_idx_tup[delta[i]]; -+ cali_info->absolute_ofdm_swing_idx[i] = delta_swing_table_idx_tup[delta[i]]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is higher and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "delta_swing_table_idx_tdown[%d]=%d Path=%d\n", delta[i], delta_swing_table_idx_tdown[delta[i]], i); -+ cali_info->delta_power_index[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; -+ cali_info->absolute_ofdm_swing_idx[i] = -1 * delta_swing_table_idx_tdown[delta[i]]; /*Record delta swing for mix mode power tracking*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Temp is lower and cali_info->absolute_ofdm_swing_idx[%d]=%d Path=%d\n", delta[i], cali_info->absolute_ofdm_swing_idx[i], i); -+ } -+ } -+ -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) { -+ if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/ -+ cali_info->power_index_offset[p] = 0; -+ else -+ cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/ -+ } -+ -+#if 0 -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0); -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n"); -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, 0); -+ } -+#endif -+ if (*dm->mp_mode == 1) { -+ if (cali_info->txpowertrack_control == 1) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ tracking_method = MIX_MODE; -+ } else if (cali_info->txpowertrack_control == 3) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n"); -+ tracking_method = TSSI_MODE; -+ } -+ } else { -+ if (rf->power_track_type >= 0 && rf->power_track_type <= 3) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n"); -+ tracking_method = MIX_MODE; -+ } else if (rf->power_track_type >= 4 && rf->power_track_type <= 7) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking TSSI_MODE**********\n"); -+ tracking_method = TSSI_MODE; -+ } -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8822C || dm->support_ic_type == ODM_RTL8814B) -+ for (p = RF_PATH_A; p < c.rf_path_count; p++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, tracking_method, p, 0); -+ -+ /* Wait sacn to do IQK by RF Jenyu*/ -+ if ((*dm->is_scan_in_process == false) && (!iqk_info->rfk_forbidden) && (dm->is_linked || *dm->mp_mode)) { -+ /*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/ -+ if (delta_IQK >= c.threshold_iqk) { -+ cali_info->thermal_value_iqk = thermal_value[RF_PATH_A]; -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk); -+ /*if (!cali_info->is_iqk_in_progress)*/ -+ /* (*c.do_iqk)(dm, delta_IQK, thermal_value[RF_PATH_A], 8);*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do IQK\n"); -+ -+ /*if (!cali_info->is_iqk_in_progress)*/ -+ /* (*c.do_tssi_dck)(dm, true);*/ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Do TSSI DCK\n"); -+ } -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===%s\n", __func__); -+ -+ cali_info->tx_powercount = 0; -+} -+#endif -+ -+/* 3============================================================ -+ * 3 IQ Calibration -+ * 3============================================================ */ -+ -+void -+odm_reset_iqk_result( -+ struct dm_struct *dm -+) -+{ -+ return; -+} -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+u8 odm_get_right_chnl_place_for_iqk(u8 chnl) -+{ -+ u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { -+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165 -+ }; -+ u8 place = chnl; -+ -+ -+ if (chnl > 14) { -+ for (place = 14; place < sizeof(channel_all); place++) { -+ if (channel_all[place] == chnl) -+ return place - 13; -+ } -+ } -+ return 0; -+ -+} -+#endif -+ -+void -+odm_iq_calibrate( -+ struct dm_struct *dm -+) -+{ -+ void *adapter = dm->adapter; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ RF_DBG(dm, DBG_RF_IQK, "=>%s\n",__FUNCTION__); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (*dm->is_fcs_mode_enable) -+ return; -+#endif -+ if (dm->is_linked) { -+ RF_DBG(dm, DBG_RF_IQK, -+ "interval=%d ch=%d prech=%d scan=%s rfk_f =%s\n", -+ dm->linked_interval, *dm->channel, dm->pre_channel, -+ *dm->is_scan_in_process == TRUE ? "TRUE":"FALSE", -+ iqk_info->rfk_forbidden == TRUE ? "TRUE":"FALSE"); -+ -+ if (iqk_info->rfk_forbidden) { -+ RF_DBG(dm, DBG_RF_IQK, "return by rfk_forbidden\n"); -+ return; -+ } -+ -+ if (*dm->is_scan_in_process) { -+ RF_DBG(dm, DBG_RF_IQK, "return by is_scan_in_process\n"); -+ return; -+ } -+ -+ if (*dm->channel != dm->pre_channel) { -+ dm->pre_channel = *dm->channel; -+ dm->linked_interval = 0; -+ } -+ -+ if (dm->linked_interval < 3) -+ dm->linked_interval++; -+ -+ if (dm->linked_interval == 2) -+ PHY_IQCalibrate(adapter, false); -+ } else { -+ dm->linked_interval = 0; -+ RF_DBG(dm, DBG_RF_IQK, "is_linked =%s, interval =%d\n", -+ dm->is_linked == TRUE ? "TRUE":"FALSE", -+ dm->linked_interval); -+ } -+} -+ -+void phydm_rf_init(struct dm_struct *dm) -+{ -+ -+ odm_txpowertracking_init(dm); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ odm_clear_txpowertracking_state(dm); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814A) -+ phy_iq_calibrate_8814a_init(dm); -+#endif -+#endif -+ -+} -+ -+void phydm_rf_watchdog(struct dm_struct *dm) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ FunctionIn(COMP_MLME); -+ -+ if (*dm->mp_mode == 1) { -+#if (MP_DRIVER == 1) -+ odm_txpowertracking_check(dm); -+#endif -+ } else { -+ odm_txpowertracking_check(dm); -+ -+ if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) -+ odm_iq_calibrate(dm); -+ } -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_win.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_win.h -new file mode 100644 -index 000000000000..3769d60a9126 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halphyrf_win.h -@@ -0,0 +1,132 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALPHYRF_H__ -+#define __HALPHYRF_H__ -+ -+#if (RTL8814A_SUPPORT == 1) -+ #include "halrf/rtl8814a/halrf_iqk_8814a.h" -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+ #include "halrf/rtl8822b/halrf_iqk_8822b.h" -+ #include "../mac/Halmac_type.h" -+#endif -+#include "halrf/halrf_powertracking_win.h" -+#include "halrf/halrf_kfree.h" -+#include "halrf/halrf_txgapcal.h" -+#if (RTL8821C_SUPPORT == 1) -+ #include "halrf/rtl8821c/halrf_iqk_8821c.h" -+#endif -+ -+#if (RTL8195B_SUPPORT == 1) -+// #include "halrf/rtl8195b/halrf.h" -+ #include "halrf/rtl8195b/halrf_iqk_8195b.h" -+ #include "halrf/rtl8195b/halrf_txgapk_8195b.h" -+ #include "halrf/rtl8195b/halrf_dpk_8195b.h" -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ #include "halrf/rtl8814b/halrf_iqk_8814b.h" -+ #include "halrf/rtl8814b/halrf_txgapk_8814b.h" -+#endif -+ -+enum spur_cal_method { -+ PLL_RESET, -+ AFE_PHASE_SEL -+}; -+ -+enum pwrtrack_method { -+ BBSWING, -+ TXAGC, -+ MIX_MODE, -+ TSSI_MODE, -+ MIX_2G_TSSI_5G_MODE, -+ MIX_5G_TSSI_2G_MODE, -+ CLEAN_MODE -+}; -+ -+typedef void(*func_set_pwr)(void *, enum pwrtrack_method, u8, u8); -+typedef void(*func_iqk)(void *, u8, u8, u8); -+typedef void(*func_lck)(void *); -+typedef void(*func_tssi_dck)(void *, u8); -+typedef void(*func_swing)(void *, u8 **, u8 **, u8 **, u8 **); -+typedef void(*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **); -+typedef void (*func_swing_xtal)(void *, s8 **, s8 **); -+typedef void (*func_set_xtal)(void *); -+typedef void(*func_all_swing)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **); -+ -+struct txpwrtrack_cfg { -+ u8 swing_table_size_cck; -+ u8 swing_table_size_ofdm; -+ u8 threshold_iqk; -+ u8 threshold_dpk; -+ u8 average_thermal_num; -+ u8 rf_path_count; -+ u32 thermal_reg_addr; -+ func_set_pwr odm_tx_pwr_track_set_pwr; -+ func_iqk do_iqk; -+ func_lck phy_lc_calibrate; -+ func_tssi_dck do_tssi_dck; -+ func_swing get_delta_swing_table; -+ func_swing8814only get_delta_swing_table8814only; -+ func_swing_xtal get_delta_swing_xtal_table; -+ func_set_xtal odm_txxtaltrack_set_xtal; -+ func_all_swing get_delta_all_swing_table; -+}; -+ -+void -+configure_txpower_track( -+ struct dm_struct *dm, -+ struct txpwrtrack_cfg *config -+); -+ -+ -+void -+odm_clear_txpowertracking_state( -+ struct dm_struct *dm -+); -+ -+void -+odm_txpowertracking_callback_thermal_meter( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ struct dm_struct *dm -+#else -+ void *adapter -+#endif -+); -+ -+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+void -+odm_txpowertracking_new_callback_thermal_meter(void *dm_void); -+#endif -+ -+#define ODM_TARGET_CHNL_NUM_2G_5G 59 -+ -+ -+void -+odm_reset_iqk_result( -+ struct dm_struct *dm -+); -+u8 -+odm_get_right_chnl_place_for_iqk( -+ u8 chnl -+); -+ -+void odm_iq_calibrate(struct dm_struct *dm); -+void phydm_rf_init(struct dm_struct *dm); -+void phydm_rf_watchdog(struct dm_struct *dm); -+ -+#endif /*#ifndef __HALPHYRF_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf.c -new file mode 100644 -index 000000000000..c1bf2cc1d03b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf.c -@@ -0,0 +1,4230 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ * ************************************************************ -+ */ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ -+ RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ -+ RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ -+ RTL8197G_SUPPORT == 1) -+ -+void _iqk_check_if_reload(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ iqk_info->is_reload = (boolean)odm_get_bb_reg(dm, R_0x1bf0, BIT(16)); -+} -+ -+void _iqk_page_switch(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type == ODM_RTL8821C) -+ odm_write_4byte(dm, 0x1b00, 0xf8000008); -+ else -+ odm_write_4byte(dm, 0x1b00, 0xf800000a); -+} -+ -+u32 halrf_psd_log2base(u32 val) -+{ -+ u8 j; -+ u32 tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0; -+ u32 result, val_fractiond_b = 0; -+ u32 table_fraction[21] = { -+ 0, 432, 332, 274, 232, 200, 174, 151, 132, 115, -+ 100, 86, 74, 62, 51, 42, 32, 23, 15, 7, 0}; -+ -+ if (val == 0) -+ return 0; -+ -+ tmp = val; -+ -+ while (1) { -+ if (tmp == 1) -+ break; -+ -+ tmp = (tmp >> 1); -+ shiftcount++; -+ } -+ -+ val_integerd_b = shiftcount + 1; -+ -+ tmp2 = 1; -+ for (j = 1; j <= val_integerd_b; j++) -+ tmp2 = tmp2 * 2; -+ -+ tmp = (val * 100) / tmp2; -+ tindex = tmp / 5; -+ -+ if (tindex > 20) -+ tindex = 20; -+ -+ val_fractiond_b = table_fraction[tindex]; -+ -+ result = val_integerd_b * 100 - val_fractiond_b; -+ -+ return result; -+} -+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) -+void halrf_iqk_xym_enable(struct dm_struct *dm, u8 xym_enable) -+{ -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ if (xym_enable == 0) -+ iqk_info->xym_read = false; -+ else -+ iqk_info->xym_read = true; -+ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]%-20s %s\n", "xym_read = ", -+ (iqk_info->xym_read ? "true" : "false")); -+} -+ -+/*xym_type => 0: rx_sym; 1: tx_xym; 2:gs1_xym; 3:gs2_sym; 4: rxk1_xym*/ -+void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ u8 i, start, num; -+ u32 tmp1, tmp2; -+ -+ if (!iqk_info->xym_read) -+ return; -+ -+ if (*dm->band_width == 0) { -+ start = 3; -+ num = 4; -+ } else if (*dm->band_width == 1) { -+ start = 2; -+ num = 6; -+ } else { -+ start = 0; -+ num = 10; -+ } -+ -+ odm_write_4byte(dm, 0x1b00, 0xf8000008); -+ tmp1 = odm_read_4byte(dm, 0x1b1c); -+ odm_write_4byte(dm, 0x1b1c, 0xa2193c32); -+ -+ odm_write_4byte(dm, 0x1b00, 0xf800000a); -+ tmp2 = odm_read_4byte(dm, 0x1b1c); -+ odm_write_4byte(dm, 0x1b1c, 0xa2193c32); -+ -+ for (path = 0; path < 2; path++) { -+ odm_write_4byte(dm, 0x1b00, 0xf8000008 | path << 1); -+ switch (xym_type) { -+ case 0: -+ for (i = 0; i < num; i++) { -+ odm_write_4byte(dm, 0x1b14, 0xe6 + start + i); -+ odm_write_4byte(dm, 0x1b14, 0x0); -+ iqk_info->rx_xym[path][i] = -+ odm_read_4byte(dm, 0x1b38); -+ } -+ break; -+ case 1: -+ for (i = 0; i < num; i++) { -+ odm_write_4byte(dm, 0x1b14, 0xe6 + start + i); -+ odm_write_4byte(dm, 0x1b14, 0x0); -+ iqk_info->tx_xym[path][i] = -+ odm_read_4byte(dm, 0x1b38); -+ } -+ break; -+ case 2: -+ for (i = 0; i < 6; i++) { -+ odm_write_4byte(dm, 0x1b14, 0xe0 + i); -+ odm_write_4byte(dm, 0x1b14, 0x0); -+ iqk_info->gs1_xym[path][i] = -+ odm_read_4byte(dm, 0x1b38); -+ } -+ break; -+ case 3: -+ for (i = 0; i < 6; i++) { -+ odm_write_4byte(dm, 0x1b14, 0xe0 + i); -+ odm_write_4byte(dm, 0x1b14, 0x0); -+ iqk_info->gs2_xym[path][i] = -+ odm_read_4byte(dm, 0x1b38); -+ } -+ break; -+ case 4: -+ for (i = 0; i < 6; i++) { -+ odm_write_4byte(dm, 0x1b14, 0xe0 + i); -+ odm_write_4byte(dm, 0x1b14, 0x0); -+ iqk_info->rxk1_xym[path][i] = -+ odm_read_4byte(dm, 0x1b38); -+ } -+ break; -+ } -+ odm_write_4byte(dm, 0x1b38, 0x20000000); -+ odm_write_4byte(dm, 0x1b00, 0xf8000008); -+ odm_write_4byte(dm, 0x1b1c, tmp1); -+ odm_write_4byte(dm, 0x1b00, 0xf800000a); -+ odm_write_4byte(dm, 0x1b1c, tmp2); -+ _iqk_page_switch(dm); -+ } -+} -+ -+/*xym_type => 0: rx_sym; 1: tx_xym; 2:gs1_xym; 3:gs2_sym; 4: rxk1_xym*/ -+void halrf_iqk_xym_show(struct dm_struct *dm, u8 xym_type) -+{ -+ u8 num, path, path_num, i; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ if (dm->rf_type == RF_1T1R) -+ path_num = 0x1; -+ else if (dm->rf_type == RF_2T2R) -+ path_num = 0x2; -+ else -+ path_num = 0x4; -+ -+ if (*dm->band_width == CHANNEL_WIDTH_20) -+ num = 4; -+ else if (*dm->band_width == CHANNEL_WIDTH_40) -+ num = 6; -+ else -+ num = 10; -+ -+ for (path = 0; path < path_num; path++) { -+ switch (xym_type) { -+ case 0: -+ for (i = 0; i < num; i++) -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]%-20s %-2d: 0x%x\n", -+ (path == 0) ? "PATH A RX-XYM " : -+ "PATH B RX-XYM", i, -+ iqk_info->rx_xym[path][i]); -+ break; -+ case 1: -+ for (i = 0; i < num; i++) -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]%-20s %-2d: 0x%x\n", -+ (path == 0) ? "PATH A TX-XYM " : -+ "PATH B TX-XYM", i, -+ iqk_info->tx_xym[path][i]); -+ break; -+ case 2: -+ for (i = 0; i < 6; i++) -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]%-20s %-2d: 0x%x\n", -+ (path == 0) ? "PATH A GS1-XYM " : -+ "PATH B GS1-XYM", i, -+ iqk_info->gs1_xym[path][i]); -+ break; -+ case 3: -+ for (i = 0; i < 6; i++) -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]%-20s %-2d: 0x%x\n", -+ (path == 0) ? "PATH A GS2-XYM " : -+ "PATH B GS2-XYM", i, -+ iqk_info->gs2_xym[path][i]); -+ break; -+ case 4: -+ for (i = 0; i < 6; i++) -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]%-20s %-2d: 0x%x\n", -+ (path == 0) ? "PATH A RXK1-XYM " : -+ "PATH B RXK1-XYM", i, -+ iqk_info->rxk1_xym[path][i]); -+ break; -+ } -+ } -+} -+ -+void halrf_iqk_xym_dump(void *dm_void) -+{ -+ u32 tmp1, tmp2; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_write_4byte(dm, 0x1b00, 0xf8000008); -+ tmp1 = odm_read_4byte(dm, 0x1b1c); -+ odm_write_4byte(dm, 0x1b00, 0xf800000a); -+ tmp2 = odm_read_4byte(dm, 0x1b1c); -+#if 0 -+ /*halrf_iqk_xym_read(dm, xym_type);*/ -+#endif -+ odm_write_4byte(dm, 0x1b00, 0xf8000008); -+ odm_write_4byte(dm, 0x1b1c, tmp1); -+ odm_write_4byte(dm, 0x1b00, 0xf800000a); -+ odm_write_4byte(dm, 0x1b1c, tmp2); -+ _iqk_page_switch(dm); -+} -+#endif -+void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 rf_path, j, reload_iqk = 0; -+ u32 tmp; -+ /*two channel, PATH, TX/RX, 0:pass 1 :fail*/ -+ boolean iqk_result[2][NUM][2]; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ if (!(dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))) -+ return; -+ -+ /* IQK INFO */ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s\n", -+ "% IQK Info %"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s\n", -+ (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW-IQK" : -+ "Driver-IQK"); -+ -+ reload_iqk = (u8)odm_get_bb_reg(dm, R_0x1bf0, BIT(16)); -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", -+ "reload", (reload_iqk) ? "True" : "False"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", -+ "rfk_forbidden", (iqk_info->rfk_forbidden) ? "True" : "False"); -+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \ -+ RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", -+ "segment_iqk", (iqk_info->segment_iqk) ? "True" : "False"); -+#endif -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s:%d %d\n", -+ "iqk count / fail count", dm->n_iqk_cnt, dm->n_iqk_fail_cnt); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %d\n", -+ "channel", *dm->channel); -+ -+ if (*dm->band_width == CHANNEL_WIDTH_20) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-20s: %s\n", "bandwidth", "BW_20"); -+ else if (*dm->band_width == CHANNEL_WIDTH_40) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-20s: %s\n", "bandwidth", "BW_40"); -+ else if (*dm->band_width == CHANNEL_WIDTH_80) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-20s: %s\n", "bandwidth", "BW_80"); -+ else if (*dm->band_width == CHANNEL_WIDTH_160) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-20s: %s\n", "bandwidth", "BW_160"); -+ else if (*dm->band_width == CHANNEL_WIDTH_80_80) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-20s: %s\n", "bandwidth", "BW_80_80"); -+ else -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-20s: %s\n", "bandwidth", "BW_UNKNOWN"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-20s: %llu %s\n", "progressing_time", -+ dm->rf_calibrate_info.iqk_total_progressing_time, "(ms)"); -+ -+ tmp = odm_read_4byte(dm, 0x1bf0); -+ for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) -+ for (j = 0; j < 2; j++) -+ iqk_result[0][rf_path][j] = (boolean) -+ (tmp & (BIT(rf_path + (j * 4)) >> (rf_path + (j * 4)))); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-20s: 0x%08x\n", "Reg0x1bf0", tmp); -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", -+ "PATH_A-Tx result", -+ (iqk_result[0][RF_PATH_A][0]) ? "Fail" : "Pass"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", -+ "PATH_A-Rx result", -+ (iqk_result[0][RF_PATH_A][1]) ? "Fail" : "Pass"); -+#if (RTL8822B_SUPPORT == 1) -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", -+ "PATH_B-Tx result", -+ (iqk_result[0][RF_PATH_B][0]) ? "Fail" : "Pass"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-20s: %s\n", -+ "PATH_B-Rx result", -+ (iqk_result[0][RF_PATH_B][1]) ? "Fail" : "Pass"); -+#endif -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void halrf_get_fw_version(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ rf->fw_ver = (dm->fw_version << 16) | dm->fw_sub_version; -+} -+ -+void halrf_iqk_dbg(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rf_path, j; -+ u32 tmp; -+ /*two channel, PATH, TX/RX, 0:pass 1 :fail*/ -+ boolean iqk_result[2][NUM][2]; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ /* IQK INFO */ -+ RF_DBG(dm, DBG_RF_IQK, "%-20s\n", "====== IQK Info ======"); -+ -+ RF_DBG(dm, DBG_RF_IQK, "%-20s\n", -+ (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW-IQK" : -+ "Driver-IQK"); -+ -+ if (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) { -+ halrf_get_fw_version(dm); -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: 0x%x\n", "FW_VER", rf->fw_ver); -+ } else { -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "IQK_VER", HALRF_IQK_VER); -+ } -+ -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "reload", -+ (iqk_info->is_reload) ? "True" : "False"); -+ -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %d %d\n", "iqk count / fail count", -+ dm->n_iqk_cnt, dm->n_iqk_fail_cnt); -+ -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %d\n", "channel", *dm->channel); -+ -+ if (*dm->band_width == CHANNEL_WIDTH_20) -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_20"); -+ else if (*dm->band_width == CHANNEL_WIDTH_40) -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_40"); -+ else if (*dm->band_width == CHANNEL_WIDTH_80) -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_80"); -+ else if (*dm->band_width == CHANNEL_WIDTH_160) -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_160"); -+ else if (*dm->band_width == CHANNEL_WIDTH_80_80) -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", "BW_80_80"); -+ else -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "bandwidth", -+ "BW_UNKNOWN"); -+#if 0 -+/* -+ * RF_DBG(dm, DBG_RF_IQK, "%-20s: %llu %s\n", -+ * "progressing_time", -+ * dm->rf_calibrate_info.iqk_total_progressing_time, "(ms)"); -+ */ -+#endif -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "rfk_forbidden", -+ (iqk_info->rfk_forbidden) ? "True" : "False"); -+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \ -+ RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "segment_iqk", -+ (iqk_info->segment_iqk) ? "True" : "False"); -+#endif -+ -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %llu %s\n", "progressing_time", -+ dm->rf_calibrate_info.iqk_progressing_time, "(ms)"); -+ -+ tmp = odm_read_4byte(dm, 0x1bf0); -+ for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) -+ for (j = 0; j < 2; j++) -+ iqk_result[0][rf_path][j] = (boolean) -+ (tmp & (BIT(rf_path + (j * 4)) >> (rf_path + (j * 4)))); -+ -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: 0x%08x\n", "Reg0x1bf0", tmp); -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: 0x%08x\n", "Reg0x1be8", -+ odm_read_4byte(dm, 0x1be8)); -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_A-Tx result", -+ (iqk_result[0][RF_PATH_A][0]) ? "Fail" : "Pass"); -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_A-Rx result", -+ (iqk_result[0][RF_PATH_A][1]) ? "Fail" : "Pass"); -+#if (RTL8822B_SUPPORT == 1) -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_B-Tx result", -+ (iqk_result[0][RF_PATH_B][0]) ? "Fail" : "Pass"); -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %s\n", "PATH_B-Rx result", -+ (iqk_result[0][RF_PATH_B][1]) ? "Fail" : "Pass"); -+#endif -+} -+ -+void halrf_lck_dbg(struct dm_struct *dm) -+{ -+ RF_DBG(dm, DBG_RF_IQK, "%-20s\n", "====== LCK Info ======"); -+#if 0 -+ /*RF_DBG(dm, DBG_RF_IQK, "%-20s\n", -+ * (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "LCK" : "RTK")); -+ */ -+#endif -+ RF_DBG(dm, DBG_RF_IQK, "%-20s: %llu %s\n", "progressing_time", -+ dm->rf_calibrate_info.lck_progressing_time, "(ms)"); -+} -+void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ phy_get_iqk_cfir_8822b(dm, idx, path, debug); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ phy_get_iqk_cfir_8822c(dm, idx, path, debug); -+ break; -+#endif -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ phy_get_iqk_cfir_8814b(dm, idx, path, debug); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+ -+void halrf_iqk_dbg_cfir_backup(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ u8 path, idx, i; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ phy_iqk_dbg_cfir_backup_8822b(dm); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ phy_iqk_dbg_cfir_backup_8822c(dm); -+ break; -+#endif -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ phy_iqk_dbg_cfir_backup_8814b(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+ -+} -+ -+void halrf_iqk_dbg_cfir_backup_update(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk = &dm->IQK_info; -+ u8 i, path, idx; -+ u32 bmask13_12 = BIT(13) | BIT(12); -+ u32 bmask20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16); -+ u32 data; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ phy_iqk_dbg_cfir_backup_update_8822b(dm); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ phy_iqk_dbg_cfir_backup_update_8822c(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_iqk_dbg_cfir_reload(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk = &dm->IQK_info; -+ u8 i, path, idx; -+ u32 bmask13_12 = BIT(13) | BIT(12); -+ u32 bmask20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16); -+ u32 data; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ phy_iqk_dbg_cfir_reload_8822b(dm); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ phy_iqk_dbg_cfir_reload_8822c(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_iqk_dbg_cfir_write(void *dm_void, u8 type, u32 path, u32 idx, -+ u32 i, u32 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ phy_iqk_dbg_cfir_write_8822b(dm, type, path, idx, i, data); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ phy_iqk_dbg_cfir_write_8822c(dm, type, path, idx, i, data); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_iqk_dbg_cfir_backup_show(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ u8 path, idx, i; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ phy_iqk_dbg_cfir_backup_8822b(dm); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ phy_iqk_dbg_cfir_backup_8822c(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_do_imr_test(void *dm_void, u8 flag_imr_test) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (flag_imr_test != 0x0) -+ switch (dm->support_ic_type) { -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ do_imr_test_8822b(dm); -+ break; -+#endif -+#if (RTL8821C_SUPPORT == 1) -+ case ODM_RTL8821C: -+ do_imr_test_8821c(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if 0 -+ /*dm_value[0]=0x0: backup from SRAM & show*/ -+ /*dm_value[0]=0x1: write backup CFIR to SRAM*/ -+ /*dm_value[0]=0x2: reload default CFIR to SRAM*/ -+ /*dm_value[0]=0x3: show backup*/ -+ /*dm_value[0]=0x10: write backup CFIR real part*/ -+ /*--> dm_value[1]:path, dm_value[2]:tx/rx, dm_value[3]:index, dm_value[4]:data*/ -+ /*dm_value[0]=0x11: write backup CFIR imag*/ -+ /*--> dm_value[1]:path, dm_value[2]:tx/rx, dm_value[3]:index, dm_value[4]:data*/ -+ /*dm_value[0]=0x20 :xym_read enable*/ -+ /*--> dm_value[1]:0:disable, 1:enable*/ -+ /*if dm_value[0]=0x20 = enable, */ -+ /*0x1:show rx_sym; 0x2: tx_xym; 0x3:gs1_xym; 0x4:gs2_sym; 0x5:rxk1_xym*/ -+#endif -+ if (dm_value[0] == 0x0) -+ halrf_iqk_dbg_cfir_backup(dm); -+ else if (dm_value[0] == 0x1) -+ halrf_iqk_dbg_cfir_backup_update(dm); -+ else if (dm_value[0] == 0x2) -+ halrf_iqk_dbg_cfir_reload(dm); -+ else if (dm_value[0] == 0x3) -+ halrf_iqk_dbg_cfir_backup_show(dm); -+ else if (dm_value[0] == 0x10) -+ halrf_iqk_dbg_cfir_write(dm, 0, dm_value[1], dm_value[2], -+ dm_value[3], dm_value[4]); -+ else if (dm_value[0] == 0x11) -+ halrf_iqk_dbg_cfir_write(dm, 1, dm_value[1], dm_value[2], -+ dm_value[3], dm_value[4]); -+ else if (dm_value[0] == 0x20) -+ halrf_iqk_xym_enable(dm, (u8)dm_value[1]); -+ else if (dm_value[0] == 0x21) -+ halrf_iqk_xym_show(dm, (u8)dm_value[1]); -+ else if (dm_value[0] == 0x30) -+ halrf_do_imr_test(dm, (u8)dm_value[1]); -+} -+#endif -+ -+void halrf_iqk_hwtx_check(void *dm_void, boolean is_check) -+{ -+#if 0 -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ u32 tmp_b04; -+ -+ if (is_check) { -+ iqk_info->is_hwtx = (boolean)odm_get_bb_reg(dm, R_0xb00, BIT(8)); -+ } else { -+ if (iqk_info->is_hwtx) { -+ tmp_b04 = odm_read_4byte(dm, 0xb04); -+ odm_set_bb_reg(dm, R_0xb04, BIT(3) | BIT(2), 0x0); -+ odm_write_4byte(dm, 0xb04, tmp_b04); -+ } -+ } -+#endif -+} -+#endif -+ -+u8 halrf_match_iqk_version(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ u32 iqk_version = 0; -+ char temp[10] = {0}; -+ -+ odm_move_memory(dm, temp, HALRF_IQK_VER, sizeof(temp)); -+ PHYDM_SSCANF(temp + 2, DCMD_HEX, &iqk_version); -+ -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ if (iqk_version >= 0x24 && (odm_get_hw_img_version(dm) >= 72)) -+ return 1; -+ else if ((iqk_version <= 0x23) && -+ (odm_get_hw_img_version(dm) <= 71)) -+ return 1; -+ else -+ return 0; -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8821C) { -+ if (iqk_version >= 0x18 && (odm_get_hw_img_version(dm) >= 37)) -+ return 1; -+ else -+ return 0; -+ } -+ -+ return 1; -+} -+ -+void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8188E_SUPPORT == 1) -+ case ODM_RTL8188E: -+ halrf_rf_lna_setting_8188e(dm, type); -+ break; -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ case ODM_RTL8192E: -+ halrf_rf_lna_setting_8192e(dm, type); -+ break; -+#endif -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ halrf_rf_lna_setting_8192f(dm, type); -+ break; -+#endif -+ -+#if (RTL8723B_SUPPORT == 1) -+ case ODM_RTL8723B: -+ halrf_rf_lna_setting_8723b(dm, type); -+ break; -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ case ODM_RTL8812: -+ halrf_rf_lna_setting_8812a(dm, type); -+ break; -+#endif -+#if ((RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1)) -+ case ODM_RTL8881A: -+ case ODM_RTL8821: -+ halrf_rf_lna_setting_8821a(dm, type); -+ break; -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ halrf_rf_lna_setting_8822b(dm_void, type); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ halrf_rf_lna_setting_8822c(dm_void, type); -+ break; -+#endif -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ halrf_rf_lna_setting_8812f(dm_void, type); -+ break; -+#endif -+#if (RTL8821C_SUPPORT == 1) -+ case ODM_RTL8821C: -+ halrf_rf_lna_setting_8821c(dm_void, type); -+ break; -+#endif -+#if (RTL8710C_SUPPORT == 1) -+ case ODM_RTL8710C: -+ halrf_rf_lna_setting_8710c(dm_void, type); -+ break; -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ halrf_rf_lna_setting_8721d(dm, type); -+ break; -+#endif -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ u32 dm_value[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i; -+ -+ for (i = 0; i < 5; i++) -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &dm_value[i]); -+ -+ if (dm_value[0] == 100) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n[RF Supportability]\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "00. (( %s ))Power Tracking\n", -+ ((rf->rf_supportability & HAL_RF_TX_PWR_TRACK) ? -+ ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "01. (( %s ))IQK\n", -+ ((rf->rf_supportability & HAL_RF_IQK) ? ("V") : -+ ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "02. (( %s ))LCK\n", -+ ((rf->rf_supportability & HAL_RF_LCK) ? ("V") : -+ ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "03. (( %s ))DPK\n", -+ ((rf->rf_supportability & HAL_RF_DPK) ? ("V") : -+ ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "04. (( %s ))HAL_RF_TXGAPK\n", -+ ((rf->rf_supportability & HAL_RF_TXGAPK) ? ("V") : -+ ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "05. (( %s ))HAL_RF_DACK\n", -+ ((rf->rf_supportability & HAL_RF_DACK) ? ("V") : -+ ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "06. (( %s ))DPK_TRACK\n", -+ ((rf->rf_supportability & HAL_RF_DPK_TRACK) ? ("V") : -+ ("."))); -+#ifdef CONFIG_2G_BAND_SHIFT -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "07. (( %s ))HAL_2GBAND_SHIFT\n", -+ ((rf->rf_supportability & HAL_2GBAND_SHIFT) ? ("V") : -+ ("."))); -+#endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "08. (( %s ))HAL_RF_RXDCK\n", -+ ((rf->rf_supportability & HAL_RF_RXDCK) ? ("V") : -+ ("."))); -+ -+ } else { -+ if (dm_value[1] == 1) /* enable */ -+ rf->rf_supportability |= BIT(dm_value[0]); -+ else if (dm_value[1] == 2) /* disable */ -+ rf->rf_supportability &= ~(BIT(dm_value[0])); -+ else -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Warning!!!] 1:enable, 2:disable\n"); -+ } -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\nCurr-RF_supportability = 0x%x\n\n", rf->rf_supportability); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#ifdef CONFIG_2G_BAND_SHIFT -+void halrf_support_band_shift_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ //u32 band_value[2] = {00}; -+ u32 dm_value[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i; -+ -+#if (RTL8192F_SUPPORT == 1) -+ for (i = 0; i < 7; i++) -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &dm_value[i]); -+ -+ if (!(rf->rf_supportability & HAL_2GBAND_SHIFT)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\nCurr-RF_supportability[07. (( . ))HAL_2GBAND_SHIFT]\nNo RF Band Shift,default: 2.4G!\n"); -+ } else { -+ if (dm_value[0] == 01) { -+ rf->rf_shift_band = HAL_RF_2P3; -+ halrf_lck_trigger(dm); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n[rf_shift_band] = %d\nRF Band Shift to 2.3G!\n", -+ rf->rf_shift_band); -+ } else if (dm_value[0] == 02) { -+ rf->rf_shift_band = HAL_RF_2P5; -+ halrf_lck_trigger(dm); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n[rf_shift_band] = %d\nRF Band Shift to 2.5G!\n", -+ rf->rf_shift_band); -+ } else { -+ rf->rf_shift_band = HAL_RF_2P4; -+ halrf_lck_trigger(dm); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n[rf_shift_band] = %d\nNo RF Band Shift,default: 2.4G!\n", -+ rf->rf_shift_band); -+ } -+ } -+ *_used = used; -+ *_out_len = out_len; -+#endif -+} -+#endif -+ -+void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info, -+ u32 value) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ switch (cmn_info) { -+ case HALRF_CMNINFO_EEPROM_THERMAL_VALUE: -+ rf->eeprom_thermal = (u8)value; -+ break; -+ case HALRF_CMNINFO_PWT_TYPE: -+ rf->pwt_type = (u8)value; -+ break; -+ case HALRF_CMNINFO_MP_POWER_TRACKING_TYPE: -+ rf->mp_pwt_type = (u8)value; -+ break; -+ default: -+ break; -+ } -+} -+ -+void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info, -+ void *value) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ switch (cmn_info) { -+ case HALRF_CMNINFO_CON_TX: -+ rf->is_con_tx = (boolean *)value; -+ break; -+ case HALRF_CMNINFO_SINGLE_TONE: -+ rf->is_single_tone = (boolean *)value; -+ break; -+ case HALRF_CMNINFO_CARRIER_SUPPRESSION: -+ rf->is_carrier_suppresion = (boolean *)value; -+ break; -+ case HALRF_CMNINFO_MP_RATE_INDEX: -+ rf->mp_rate_index = (u8 *)value; -+ break; -+ case HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY: -+ rf->manual_rf_supportability = (u32 *)value; -+ break; -+ default: -+ /*do nothing*/ -+ break; -+ } -+} -+ -+void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value) -+{ -+ /* This init variable may be changed in run time. */ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ switch (cmn_info) { -+ case HALRF_CMNINFO_ABILITY: -+ rf->rf_supportability = (u32)value; -+ break; -+ -+ case HALRF_CMNINFO_DPK_EN: -+ rf->dpk_en = (u8)value; -+ break; -+ case HALRF_CMNINFO_RFK_FORBIDDEN: -+ dm->IQK_info.rfk_forbidden = (boolean)value; -+ break; -+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \ -+ RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) -+ case HALRF_CMNINFO_IQK_SEGMENT: -+ dm->IQK_info.segment_iqk = (boolean)value; -+ break; -+#endif -+ case HALRF_CMNINFO_RATE_INDEX: -+ rf->p_rate_index = (u32)value; -+ break; -+#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ case HALRF_CMNINFO_MP_PSD_POINT: -+ rf->halrf_psd_data.point = (u32)value; -+ break; -+ case HALRF_CMNINFO_MP_PSD_START_POINT: -+ rf->halrf_psd_data.start_point = (u32)value; -+ break; -+ case HALRF_CMNINFO_MP_PSD_STOP_POINT: -+ rf->halrf_psd_data.stop_point = (u32)value; -+ break; -+ case HALRF_CMNINFO_MP_PSD_AVERAGE: -+ rf->halrf_psd_data.average = (u32)value; -+ break; -+#endif -+ case HALRF_CMNINFO_POWER_TRACK_CONTROL: -+ cali_info->txpowertrack_control = (u8)value; -+ break; -+ default: -+ /* do nothing */ -+ break; -+ } -+} -+ -+u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info) -+{ -+ /* This init variable may be changed in run time. */ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ u64 return_value = 0; -+ -+ switch (cmn_info) { -+ case HALRF_CMNINFO_ABILITY: -+ return_value = (u32)rf->rf_supportability; -+ break; -+ case HALRF_CMNINFO_RFK_FORBIDDEN: -+ return_value = dm->IQK_info.rfk_forbidden; -+ break; -+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || \ -+ RTL8821C_SUPPORT == 1 || RTL8195B_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) -+ case HALRF_CMNINFO_IQK_SEGMENT: -+ return_value = dm->IQK_info.segment_iqk; -+ break; -+ case HALRF_CMNINFO_IQK_TIMES: -+ return_value = dm->IQK_info.iqk_times; -+ break; -+#endif -+ default: -+ /* do nothing */ -+ break; -+ } -+ -+ return return_value; -+} -+ -+void halrf_supportability_init_mp(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ switch (dm->support_ic_type) { -+ case ODM_RTL8814B: -+#if (RTL8814B_SUPPORT == 1) -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ HAL_RF_DACK | -+ /*HAL_RF_TXGAPK |*/ -+ HAL_RF_DPK_TRACK | -+ 0; -+#endif -+ break; -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ /*@HAL_RF_DPK |*/ -+ 0; -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ HAL_RF_DACK | -+ HAL_RF_DPK_TRACK | -+ HAL_RF_RXDCK | -+ HAL_RF_TXGAPK | -+ 0; -+ break; -+#endif -+#if (RTL8821C_SUPPORT == 1) -+ case ODM_RTL8821C: -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ /*@HAL_RF_DPK |*/ -+ /*@HAL_RF_TXGAPK |*/ -+ 0; -+ break; -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ /*HAL_RF_TXGAPK |*/ -+ HAL_RF_DPK_TRACK | -+ 0; -+ break; -+#endif -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ HAL_RF_DACK | -+ HAL_RF_DPK_TRACK | -+ 0; -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ /*@HAL_RF_TXGAPK |*/ -+ 0; -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ /*@HAL_RF_TXGAPK |*/ -+#ifdef CONFIG_2G_BAND_SHIFT -+ /*@HAL_2GBAND_SHIFT |*/ -+#endif -+ 0; -+ break; -+#endif -+ -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ /*@HAL_RF_TXGAPK |*/ -+ 0; -+ break; -+#endif -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ /*HAL_RF_LCK |*/ -+ HAL_RF_DPK | -+ /*@HAL_RF_TXGAPK |*/ -+ HAL_RF_DPK_TRACK | -+ 0; -+ break; -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ HAL_RF_DPK_TRACK | -+ /*@HAL_RF_TXGAPK |*/ -+ 0; -+ break; -+#endif -+#if (RTL8723F_SUPPORT == 1) -+ case ODM_RTL8723F: -+ rf->rf_supportability = -+ /*@HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ HAL_RF_DPK_TRACK | -+ 0; -+ break; -+#endif -+ -+ default: -+ rf->rf_supportability = -+ /*HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ /*@HAL_RF_DPK |*/ -+ /*@HAL_RF_TXGAPK |*/ -+ 0; -+ break; -+ } -+ -+ RF_DBG(dm, DBG_RF_INIT, -+ "IC = ((0x%x)), RF_Supportability Init MP = ((0x%x))\n", -+ dm->support_ic_type, rf->rf_supportability); -+} -+ -+void halrf_supportability_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ switch (dm->support_ic_type) { -+ case ODM_RTL8814B: -+#if (RTL8814B_SUPPORT == 1) -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ HAL_RF_DACK | -+ HAL_RF_DPK_TRACK | -+ 0; -+#endif -+ break; -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ /*@HAL_RF_DPK |*/ -+ 0; -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ HAL_RF_DACK | -+ HAL_RF_DPK_TRACK | -+ HAL_RF_RXDCK | -+ HAL_RF_TXGAPK | -+ 0; -+ break; -+#endif -+#if (RTL8821C_SUPPORT == 1) -+ case ODM_RTL8821C: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ /*@HAL_RF_DPK |*/ -+ /*@HAL_RF_TXGAPK |*/ -+ 0; -+ break; -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ /*HAL_RF_TXGAPK |*/ -+ HAL_RF_DPK_TRACK | -+ 0; -+ break; -+#endif -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ HAL_RF_DACK | -+ HAL_RF_DPK_TRACK | -+ 0; -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ /*@HAL_RF_TXGAPK |*/ -+ 0; -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ /*@HAL_RF_TXGAPK |*/ -+#ifdef CONFIG_2G_BAND_SHIFT -+ /*@HAL_2GBAND_SHIFT |*/ -+#endif -+ 0; -+ break; -+#endif -+ -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ /*@HAL_RF_TXGAPK |*/ -+ 0; -+ break; -+#endif -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ /*HAL_RF_LCK |*/ -+ HAL_RF_DPK | -+ /*@HAL_RF_TXGAPK |*/ -+ HAL_RF_DPK_TRACK | -+#ifdef CONFIG_2G_BAND_SHIFT -+ HAL_2GBAND_SHIFT | -+#endif -+ 0; -+ break; -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ HAL_RF_DPK_TRACK | -+ /*@HAL_RF_TXGAPK |*/ -+ 0; -+ break; -+#endif -+#if (RTL8723F_SUPPORT == 1) -+ case ODM_RTL8723F: -+ rf->rf_supportability = -+ /*@HAL_RF_TX_PWR_TRACK |*/ -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ HAL_RF_DPK | -+ HAL_RF_DPK_TRACK | -+ 0; -+ break; -+#endif -+ -+ default: -+ rf->rf_supportability = -+ HAL_RF_TX_PWR_TRACK | -+ HAL_RF_IQK | -+ HAL_RF_LCK | -+ /*@HAL_RF_DPK |*/ -+ 0; -+ break; -+ } -+ -+ RF_DBG(dm, DBG_RF_INIT, -+ "IC = ((0x%x)), RF_Supportability Init = ((0x%x))\n", -+ dm->support_ic_type, rf->rf_supportability); -+} -+ -+void halrf_watchdog(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+#if 0 -+ /*RF_DBG(dm, DBG_RF_TMP, "%s\n", __func__);*/ -+#endif -+ -+ if (rf->is_dpk_in_progress || dm->rf_calibrate_info.is_iqk_in_progress || -+ rf->is_tssi_in_progress) -+ return; -+ -+ phydm_rf_watchdog(dm); -+ halrf_dpk_track(dm); -+} -+ -+#if 0 -+void -+halrf_iqk_init( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ break; -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ _iq_calibrate_8822b_init(dm); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ _iq_calibrate_8822c_init(dm); -+ break; -+#endif -+#if (RTL8821C_SUPPORT == 1) -+ case ODM_RTL8821C: -+ break; -+#endif -+ -+ default: -+ break; -+ } -+} -+#endif -+ -+void halrf_rfk_power_save(void *dm_void, boolean is_power_save) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ halrf_rfk_power_save_8822c(dm, is_power_save); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+ -+ -+void halrf_reload_iqk(void *dm_void, boolean reset) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ u8 i, ch; -+ u32 tmp; -+ u32 bit_mask_20_16 = BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16); -+ -+ halrf_rfk_power_save(dm, false); -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ iqk_reload_iqk_8822c(dm, reset); -+ break; -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ iqk_reload_iqk_8195b(dm, reset); -+ break; -+#endif -+ -+ default: -+ break; -+ } -+ halrf_rfk_power_save(dm, true); -+} -+ -+void halrf_rfk_handshake(void *dm_void, boolean is_before_k) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!dm->mp_mode) -+ return; -+ -+ if (*dm->mp_mode) -+ return; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ halrf_rfk_handshake_8822c(dm, is_before_k); -+ break; -+#endif -+#if (RTL8710C_SUPPORT == 1) -+ case ODM_RTL8710C: -+ halrf_rfk_handshake_8710c(dm, is_before_k); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_bbreset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ -+ switch (dm->support_ic_type) { -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ phydm_bb_reset_8814b(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_rf_k_connect_trigger(void *dm_void, boolean is_recovery, -+ enum halrf_k_segment_time seg_time) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ if (!dm->mp_mode) -+ return; -+ -+ if (dm->mp_mode && rf->is_con_tx && rf->is_single_tone && -+ rf->is_carrier_suppresion) { -+ if (*dm->mp_mode & -+ (*rf->is_con_tx || *rf->is_single_tone || -+ *rf->is_carrier_suppresion)) -+ return; -+ } -+ -+ /*[TX GAP K]*/ -+ halrf_txgapk_trigger(dm); -+ -+ /*[LOK, IQK]*/ -+ halrf_segment_iqk_trigger(dm, true, seg_time); -+ -+ /*[TSSI Trk]*/ -+ halrf_tssi_trigger(dm); -+ /*[DPK]*/ -+ if(dpk_info->is_dpk_by_channel == true) -+ halrf_dpk_trigger(dm); -+ else -+ halrf_dpk_reload(dm); -+ //ADDA restore to MP_UI setting; -+ config_halrf_path_adda_setting_trigger(dm); -+ -+ halrf_bbreset(dm); -+} -+ -+void config_halrf_path_adda_setting_trigger(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ config_phydm_path_adda_setting_8814b(dm); -+#endif -+ -+} -+ -+void halrf_dack_restore(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ if (!(rf->rf_supportability & HAL_RF_DACK)) -+ return; -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ halrf_dack_restore_8822c(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+void halrf_dack_trigger(void *dm_void, boolean force) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ u64 start_time; -+ -+ if (!(rf->rf_supportability & HAL_RF_DACK)) -+ return; -+ -+ start_time = odm_get_current_time(dm); -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ halrf_dac_cal_8822c(dm, force); -+ break; -+#endif -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ halrf_dac_cal_8812f(dm); -+ break; -+#endif -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ halrf_dac_cal_8814b(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+ rf->dpk_progressing_time = odm_get_progressing_time(dm, start_time); -+ RF_DBG(dm, DBG_RF_DACK, "[DACK]DACK progressing_time = %lld ms\n", -+ rf->dpk_progressing_time); -+} -+ -+ -+void halrf_dack_dbg(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ u64 start_time; -+ -+ if (!(rf->rf_supportability & HAL_RF_DACK)) -+ return; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ halrf_dack_dbg_8822c(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+ -+void halrf_segment_iqk_trigger(void *dm_void, boolean clear, -+ boolean segment_iqk) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ u64 start_time; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ if (odm_check_power_status(dm) == false) -+ return; -+#endif -+ -+ if (!dm->mp_mode) -+ return; -+ -+ if (dm->mp_mode && rf->is_con_tx && rf->is_single_tone && -+ rf->is_carrier_suppresion) { -+ if (*dm->mp_mode & -+ (*rf->is_con_tx || *rf->is_single_tone || -+ *rf->is_carrier_suppresion)) -+ return; -+ } -+ -+ if (!(rf->rf_supportability & HAL_RF_IQK)) -+ return; -+ -+#if DISABLE_BB_RF -+ return; -+#endif -+ if (iqk_info->rfk_forbidden) -+ return; -+ -+ halrf_rfk_handshake(dm, true); -+ -+ if (!dm->rf_calibrate_info.is_iqk_in_progress) { -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ dm->rf_calibrate_info.is_iqk_in_progress = true; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ start_time = odm_get_current_time(dm); -+ dm->IQK_info.segment_iqk = segment_iqk; -+ -+ halrf_rfk_power_save(dm, false); -+ switch (dm->support_ic_type) { -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ phy_iq_calibrate_8822b(dm, clear, segment_iqk); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ phy_iq_calibrate_8822c(dm, clear, segment_iqk); -+ break; -+#endif -+#if (RTL8821C_SUPPORT == 1) -+ case ODM_RTL8821C: -+ phy_iq_calibrate_8821c(dm, clear, segment_iqk); -+ break; -+#endif -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ phy_iq_calibrate_8814b(dm, clear, segment_iqk); -+ break; -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ phy_iq_calibrate_8195b(dm, clear, segment_iqk); -+ break; -+#endif -+#if (RTL8710C_SUPPORT == 1) -+ case ODM_RTL8710C: -+ phy_iq_calibrate_8710c(dm, clear, segment_iqk); -+ break; -+#endif -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ phy_iq_calibrate_8198f(dm, clear, segment_iqk); -+ break; -+#endif -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ phy_iq_calibrate_8812f(dm, clear, segment_iqk); -+ break; -+#endif -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ phy_iq_calibrate_8197g(dm, clear, segment_iqk); -+ break; -+#endif -+#if (RTL8188E_SUPPORT == 1) -+ case ODM_RTL8188E: -+ phy_iq_calibrate_8188e(dm, false); -+ break; -+#endif -+#if (RTL8188F_SUPPORT == 1) -+ case ODM_RTL8188F: -+ phy_iq_calibrate_8188f(dm, false); -+ break; -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ case ODM_RTL8192E: -+ phy_iq_calibrate_8192e(dm, false); -+ break; -+#endif -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ phy_iq_calibrate_8197f(dm, false); -+ break; -+#endif -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ phy_iq_calibrate_8192f(dm, false); -+ break; -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ case ODM_RTL8703B: -+ phy_iq_calibrate_8703b(dm, false); -+ break; -+#endif -+#if (RTL8710B_SUPPORT == 1) -+ case ODM_RTL8710B: -+ phy_iq_calibrate_8710b(dm, false); -+ break; -+#endif -+#if (RTL8723B_SUPPORT == 1) -+ case ODM_RTL8723B: -+ phy_iq_calibrate_8723b(dm, false); -+ break; -+#endif -+#if (RTL8723D_SUPPORT == 1) -+ case ODM_RTL8723D: -+ phy_iq_calibrate_8723d(dm, false); -+ break; -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ phy_iq_calibrate_8721d(dm, false); -+ break; -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ case ODM_RTL8812: -+ phy_iq_calibrate_8812a(dm, false); -+ break; -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ case ODM_RTL8821: -+ phy_iq_calibrate_8821a(dm, false); -+ break; -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ case ODM_RTL8814A: -+ phy_iq_calibrate_8814a(dm, false); -+ break; -+#endif -+ default: -+ break; -+ } -+ -+ halrf_rfk_power_save(dm, true); -+ dm->rf_calibrate_info.iqk_progressing_time = -+ odm_get_progressing_time(dm, start_time); -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]IQK progressing_time = %lld ms\n", -+ dm->rf_calibrate_info.iqk_progressing_time); -+ -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ dm->rf_calibrate_info.is_iqk_in_progress = false; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ -+ halrf_rfk_handshake(dm, false); -+ } else { -+ RF_DBG(dm, DBG_RF_IQK, -+ "== Return the IQK CMD, because RFKs in Progress ==\n"); -+ } -+} -+ -+ -+void halrf_iqk_trigger(void *dm_void, boolean is_recovery) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ u64 start_time; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ if (odm_check_power_status(dm) == false) -+ return; -+#endif -+ -+ if (!dm->mp_mode) -+ return; -+ -+ if (dm->mp_mode && rf->is_con_tx && rf->is_single_tone && -+ rf->is_carrier_suppresion) { -+ if (*dm->mp_mode & -+ (*rf->is_con_tx || *rf->is_single_tone || -+ *rf->is_carrier_suppresion)) -+ return; -+ } -+ -+ if (!(rf->rf_supportability & HAL_RF_IQK)) -+ return; -+ -+#if DISABLE_BB_RF -+ return; -+#endif -+ -+ if (iqk_info->rfk_forbidden) -+ return; -+ -+ halrf_rfk_handshake(dm, true); -+ -+ if (!dm->rf_calibrate_info.is_iqk_in_progress) { -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ dm->rf_calibrate_info.is_iqk_in_progress = true; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ start_time = odm_get_current_time(dm); -+ halrf_rfk_power_save(dm, false); -+ switch (dm->support_ic_type) { -+#if (RTL8188E_SUPPORT == 1) -+ case ODM_RTL8188E: -+ phy_iq_calibrate_8188e(dm, is_recovery); -+ break; -+#endif -+#if (RTL8188F_SUPPORT == 1) -+ case ODM_RTL8188F: -+ phy_iq_calibrate_8188f(dm, is_recovery); -+ break; -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ case ODM_RTL8192E: -+ phy_iq_calibrate_8192e(dm, is_recovery); -+ break; -+#endif -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ phy_iq_calibrate_8197f(dm, is_recovery); -+ break; -+#endif -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ phy_iq_calibrate_8192f(dm, is_recovery); -+ break; -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ case ODM_RTL8703B: -+ phy_iq_calibrate_8703b(dm, is_recovery); -+ break; -+#endif -+#if (RTL8710B_SUPPORT == 1) -+ case ODM_RTL8710B: -+ phy_iq_calibrate_8710b(dm, is_recovery); -+ break; -+#endif -+#if (RTL8723B_SUPPORT == 1) -+ case ODM_RTL8723B: -+ phy_iq_calibrate_8723b(dm, is_recovery); -+ break; -+#endif -+#if (RTL8723D_SUPPORT == 1) -+ case ODM_RTL8723D: -+ phy_iq_calibrate_8723d(dm, is_recovery); -+ break; -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ phy_iq_calibrate_8721d(dm, is_recovery); -+ break; -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ case ODM_RTL8812: -+ phy_iq_calibrate_8812a(dm, is_recovery); -+ break; -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ case ODM_RTL8821: -+ phy_iq_calibrate_8821a(dm, is_recovery); -+ break; -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ case ODM_RTL8814A: -+ phy_iq_calibrate_8814a(dm, is_recovery); -+ break; -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ phy_iq_calibrate_8822b(dm, false, false); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ phy_iq_calibrate_8822c(dm, false, false); -+ break; -+#endif -+#if (RTL8821C_SUPPORT == 1) -+ case ODM_RTL8821C: -+ phy_iq_calibrate_8821c(dm, false, false); -+ break; -+#endif -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ phy_iq_calibrate_8814b(dm, false, false); -+ break; -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ phy_iq_calibrate_8195b(dm, false, false); -+ break; -+#endif -+#if (RTL8710C_SUPPORT == 1) -+ case ODM_RTL8710C: -+ phy_iq_calibrate_8710c(dm, false, false); -+ break; -+#endif -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ phy_iq_calibrate_8198f(dm, false, false); -+ break; -+#endif -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ phy_iq_calibrate_8812f(dm, false, false); -+ break; -+#endif -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ phy_iq_calibrate_8197g(dm, false, false); -+ break; -+#endif -+#if (RTL8723F_SUPPORT == 1) -+ case ODM_RTL8723F: -+ phy_iq_calibrate_8723f(dm, false, false); -+ break; -+#endif -+ -+ default: -+ break; -+ } -+ -+ halrf_rfk_power_save(dm, true); -+ rf->iqk_progressing_time = odm_get_progressing_time(dm, start_time); -+ RF_DBG(dm, DBG_RF_LCK, "[IQK]Trigger IQK progressing_time = %lld ms\n", -+ rf->iqk_progressing_time); -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ dm->rf_calibrate_info.is_iqk_in_progress = false; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ -+ halrf_rfk_handshake(dm, false); -+ } else { -+ RF_DBG(dm, DBG_RF_IQK, -+ "== Return the IQK CMD, because RFKs in Progress ==\n"); -+ } -+} -+ -+void halrf_lck_trigger(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ u64 start_time; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ if (odm_check_power_status(dm) == false) -+ return; -+#endif -+ -+ if (!dm->mp_mode) -+ return; -+ -+ if (dm->mp_mode && rf->is_con_tx && rf->is_single_tone && -+ rf->is_carrier_suppresion) { -+ if (*dm->mp_mode & -+ (*rf->is_con_tx || *rf->is_single_tone || -+ *rf->is_carrier_suppresion)) -+ return; -+ } -+ -+ if (!(rf->rf_supportability & HAL_RF_LCK)) -+ return; -+ -+#if DISABLE_BB_RF -+ return; -+#endif -+ if (iqk_info->rfk_forbidden) -+ return; -+ while (*dm->is_scan_in_process) { -+ RF_DBG(dm, DBG_RF_LCK, "[LCK]scan is in process, bypass LCK\n"); -+ return; -+ } -+ -+ if (!dm->rf_calibrate_info.is_lck_in_progress) { -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ dm->rf_calibrate_info.is_lck_in_progress = true; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ start_time = odm_get_current_time(dm); -+ switch (dm->support_ic_type) { -+#if (RTL8188E_SUPPORT == 1) -+ case ODM_RTL8188E: -+ phy_lc_calibrate_8188e(dm); -+ break; -+#endif -+#if (RTL8188F_SUPPORT == 1) -+ case ODM_RTL8188F: -+ phy_lc_calibrate_8188f(dm); -+ break; -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ case ODM_RTL8192E: -+ phy_lc_calibrate_8192e(dm); -+ break; -+#endif -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ phy_lc_calibrate_8197f(dm); -+ break; -+#endif -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ phy_lc_calibrate_8192f(dm); -+ break; -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ case ODM_RTL8703B: -+ phy_lc_calibrate_8703b(dm); -+ break; -+#endif -+#if (RTL8710B_SUPPORT == 1) -+ case ODM_RTL8710B: -+ phy_lc_calibrate_8710b(dm); -+ break; -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ phy_lc_calibrate_8721d(dm); -+ break; -+#endif -+#if (RTL8723B_SUPPORT == 1) -+ case ODM_RTL8723B: -+ phy_lc_calibrate_8723b(dm); -+ break; -+#endif -+#if (RTL8723D_SUPPORT == 1) -+ case ODM_RTL8723D: -+ phy_lc_calibrate_8723d(dm); -+ break; -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ case ODM_RTL8812: -+ phy_lc_calibrate_8812a(dm); -+ break; -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ case ODM_RTL8821: -+ phy_lc_calibrate_8821a(dm); -+ break; -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ case ODM_RTL8814A: -+ phy_lc_calibrate_8814a(dm); -+ break; -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+ phy_lc_calibrate_8822b(dm); -+ break; -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ phy_lc_calibrate_8822c(dm); -+ break; -+#endif -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ phy_lc_calibrate_8812f(dm); -+ break; -+#endif -+#if (RTL8821C_SUPPORT == 1) -+ case ODM_RTL8821C: -+ phy_lc_calibrate_8821c(dm); -+ break; -+#endif -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ phy_lc_calibrate_8814b(dm); -+ break; -+#endif -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ phy_lc_calibrate_8197g(dm); -+ break; -+#endif -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ phy_lc_calibrate_8198f(dm); -+ break; -+#endif -+#if (RTL8710C_SUPPORT == 1) -+ case ODM_RTL8710C: -+ phy_lc_calibrate_8710c(dm); -+ break; -+#endif -+#if (RTL8723F_SUPPORT == 1) -+ case ODM_RTL8723F: -+ phy_lc_calibrate_8723f(dm); -+ break; -+#endif -+ -+ default: -+ break; -+ } -+ dm->rf_calibrate_info.lck_progressing_time = -+ odm_get_progressing_time(dm, start_time); -+ RF_DBG(dm, DBG_RF_LCK, "[LCK]LCK progressing_time = %lld ms\n", -+ dm->rf_calibrate_info.lck_progressing_time); -+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) -+ halrf_lck_dbg(dm); -+#endif -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ dm->rf_calibrate_info.is_lck_in_progress = false; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ } else { -+ RF_DBG(dm, DBG_RF_LCK, -+ "[LCK]= Return the LCK CMD, because RFK is in Progress =\n"); -+ } -+} -+ -+void halrf_aac_check(struct dm_struct *dm) -+{ -+ switch (dm->support_ic_type) { -+#if (RTL8821C_SUPPORT == 1) -+ case ODM_RTL8821C: -+#if 0 -+ aac_check_8821c(dm); -+#endif -+ break; -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ case ODM_RTL8822B: -+#if 1 -+ aac_check_8822b(dm); -+#endif -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_rxdck(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ if (!(rf->rf_supportability & HAL_RF_RXDCK)) -+ return; -+ -+ switch (dm->support_ic_type) { -+ case ODM_RTL8822C: -+#if (RTL8822C_SUPPORT == 1) -+ halrf_rxdck_8822c(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_x2k_check(struct dm_struct *dm) -+{ -+ -+ switch (dm->support_ic_type) { -+ case ODM_RTL8821C: -+#if (RTL8821C_SUPPORT == 1) -+#endif -+ break; -+ case ODM_RTL8822C: -+#if (RTL8822C_SUPPORT == 1) -+ phy_x2_check_8822c(dm); -+ break; -+#endif -+ case ODM_RTL8812F: -+#if (RTL8812F_SUPPORT == 1) -+ phy_x2_check_8812f(dm); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_set_rfsupportability(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ if (!dm->mp_mode) -+ return; -+ -+ if (rf->manual_rf_supportability && -+ *rf->manual_rf_supportability != 0xffffffff) { -+ rf->rf_supportability = *rf->manual_rf_supportability; -+ } else if (*dm->mp_mode) { -+ halrf_supportability_init_mp(dm); -+ } else { -+ halrf_supportability_init(dm); -+ } -+} -+ -+void halrf_rfe_definition(struct dm_struct *dm) -+{ -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ switch (dm->support_ic_type) { -+ case ODM_RTL8822C: -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->rfe_type == 21 || dm->rfe_type == 22) { -+ rf->ext_pa_5g = 1; -+ rf->ext_lna_5g = 1; -+ } -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ RF_DBG(dm, DBG_RF_INIT, "HALRF_Init\n"); -+ rf->aac_checked = false; -+ halrf_init_debug_setting(dm); -+ halrf_set_rfsupportability(dm); -+ halrf_rfe_definition(dm); -+#if 1 -+ /*Init all RF funciton*/ -+ halrf_aac_check(dm); -+ halrf_dack_trigger(dm, false); -+ halrf_x2k_check(dm); -+#endif -+ -+ /*power trim, thrmal trim, pa bias*/ -+ phydm_config_new_kfree(dm); -+ -+ /*TSSI Init*/ -+ halrf_tssi_dck(dm, true); -+ halrf_tssi_get_efuse(dm); -+ halrf_tssi_set_de(dm); -+ -+ /*TX Gap K*/ -+ halrf_txgapk_write_gain_table(dm); -+} -+ -+void halrf_dpk_trigger(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ u64 start_time; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ if (odm_check_power_status(dm) == false) -+ return; -+#endif -+ -+ if (!dm->mp_mode) -+ return; -+ -+ if (dm->mp_mode && rf->is_con_tx && rf->is_single_tone && -+ rf->is_carrier_suppresion) { -+ if (*dm->mp_mode & -+ (*rf->is_con_tx || *rf->is_single_tone || -+ *rf->is_carrier_suppresion)) -+ return; -+ } -+ -+ if (!(rf->rf_supportability & HAL_RF_DPK)) -+ return; -+ -+#if DISABLE_BB_RF -+ return; -+#endif -+ -+ if (iqk_info->rfk_forbidden) -+ return; -+ -+ halrf_rfk_handshake(dm, true); -+ -+ if (!rf->is_dpk_in_progress) { -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ rf->is_dpk_in_progress = true; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ start_time = odm_get_current_time(dm); -+ halrf_rfk_power_save(dm, false); -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ do_dpk_8822c(dm); -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ do_dpk_8197f(dm); -+ break; -+#endif -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ do_dpk_8192f(dm); -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ do_dpk_8198f(dm); -+ break; -+#endif -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ do_dpk_8812f(dm); -+ break; -+#endif -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ do_dpk_8197g(dm); -+ break; -+#endif -+ -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ do_dpk_8814b(dm); -+ break; -+#endif -+#if (RTL8723F_SUPPORT == 1) -+ case ODM_RTL8723F: -+ do_dpk_8723f(dm); -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ do_dpk_8195b(dm); -+ break; -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ do_dpk_8721d(dm); -+ break; -+#endif -+#endif -+ default: -+ break; -+ } -+ halrf_rfk_power_save(dm, true); -+ rf->dpk_progressing_time = odm_get_progressing_time(dm, start_time); -+ RF_DBG(dm, DBG_RF_DPK, "[DPK]DPK progressing_time = %lld ms\n", -+ rf->dpk_progressing_time); -+ -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ rf->is_dpk_in_progress = false; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ -+ halrf_rfk_handshake(dm, false); -+ } else { -+ RF_DBG(dm, DBG_RF_DPK, -+ "== Return the DPK CMD, because RFKs in Progress ==\n"); -+ } -+} -+ -+void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ -+ switch (dm->support_ic_type) { -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ dpk_set_dpkbychannel_8814b(dm, dpk_by_ch); -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ dpk_set_dpkbychannel_8195b(dm,dpk_by_ch); -+ break; -+#endif -+#endif -+ default: -+ if (dpk_by_ch) -+ dpk_info->is_dpk_by_channel = 1; -+ else -+ dpk_info->is_dpk_by_channel = 0; -+ break; -+ } -+ -+} -+ -+void halrf_set_dpkenable(void *dm_void, boolean is_dpk_enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ -+ -+ switch (dm->support_ic_type) { -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ dpk_set_is_dpk_enable_8814b(dm, is_dpk_enable); -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ dpk_set_is_dpk_enable_8195b(dm, is_dpk_enable); -+ break; -+#endif -+ -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ dpk_set_is_dpk_enable_8721d(dm, is_dpk_enable); -+ break; -+#endif -+ -+#endif -+ default: -+ break; -+ } -+ -+} -+boolean halrf_get_dpkbychannel(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ boolean is_dpk_by_channel = true; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ is_dpk_by_channel = dpk_get_dpkbychannel_8814b(dm); -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ is_dpk_by_channel = dpk_get_dpkbychannel_8195b(dm); -+ break; -+#endif -+#endif -+ -+ default: -+ break; -+ } -+ return is_dpk_by_channel; -+ -+} -+ -+ -+boolean halrf_get_dpkenable(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct dm_iqk_info *iqk_info = &dm->IQK_info; -+ boolean is_dpk_enable = true; -+ -+ -+ switch (dm->support_ic_type) { -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ is_dpk_enable = dpk_get_is_dpk_enable_8814b(dm); -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ is_dpk_enable = dpk_get_is_dpk_enable_8195b(dm); -+ break; -+#endif -+#endif -+ default: -+ break; -+ } -+ return is_dpk_enable; -+ -+} -+ -+u8 halrf_dpk_result_check(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ -+ u8 result = 0; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ if (dpk_info->dpk_path_ok == 0x3) -+ result = 1; -+ else -+ result = 0; -+ break; -+#endif -+ -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ if (dpk_info->dpk_path_ok == 0x1) -+ result = 1; -+ else -+ result = 0; -+ break; -+#endif -+ -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ if (dpk_info->dpk_path_ok == 0x1) -+ result = 1; -+ else -+ result = 0; -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ if (dpk_info->dpk_path_ok == 0x3) -+ result = 1; -+ else -+ result = 0; -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ if (dpk_info->dpk_path_ok == 0x3) -+ result = 1; -+ else -+ result = 0; -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ if (dpk_info->dpk_path_ok == 0xf) -+ result = 1; -+ else -+ result = 0; -+ break; -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ if (dpk_info->dpk_path_ok == 0xf) -+ result = 1; -+ else -+ result = 0; -+ break; -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ if (dpk_info->dpk_path_ok == 0x3) -+ result = 1; -+ else -+ result = 0; -+ break; -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ if (dpk_info->dpk_path_ok == 0x3) -+ result = 1; -+ else -+ result = 0; -+ break; -+#endif -+ -+#endif -+ default: -+ break; -+ } -+ return result; -+} -+ -+void halrf_dpk_sram_read(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ u8 path, group; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ dpk_coef_read_8822c(dm); -+ break; -+#endif -+ -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ dpk_sram_read_8195b(dm); -+ break; -+#endif -+ -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ dpk_sram_read_8721d(dm); -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ dpk_sram_read_8197f(dm); -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ dpk_sram_read_8192f(dm); -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ dpk_sram_read_8198f(dm); -+ break; -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ dpk_sram_read_8814b(dm); -+ break; -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ dpk_coef_read_8812f(dm); -+ break; -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ dpk_sram_read_8197g(dm); -+ break; -+#endif -+ -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_dpk_enable_disable(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ if (!(rf->rf_supportability & HAL_RF_DPK)) -+ return; -+ -+ if (!rf->is_dpk_in_progress) { -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ rf->is_dpk_in_progress = true; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ dpk_enable_disable_8822c(dm); -+ break; -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ dpk_enable_disable_8195b(dm); -+ break; -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ phy_dpk_enable_disable_8721d(dm); -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ phy_dpk_enable_disable_8197f(dm); -+ break; -+#endif -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ phy_dpk_enable_disable_8192f(dm); -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ dpk_enable_disable_8198f(dm); -+ break; -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ dpk_enable_disable_8814b(dm); -+ break; -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ dpk_enable_disable_8812f(dm); -+ break; -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ dpk_enable_disable_8197g(dm); -+ break; -+#endif -+ -+#endif -+ default: -+ break; -+ } -+ -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ rf->is_dpk_in_progress = false; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ } else { -+ RF_DBG(dm, DBG_RF_DPK, -+ "== Return the DPK CMD, because RFKs in Progress ==\n"); -+ } -+} -+ -+void halrf_dpk_track(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ if (rf->is_dpk_in_progress || dm->rf_calibrate_info.is_iqk_in_progress || -+ dm->is_psd_in_process || (dpk_info->dpk_path_ok == 0) || -+ !(rf->rf_supportability & HAL_RF_DPK_TRACK) || rf->is_tssi_in_progress -+ || rf->is_txgapk_in_progress) -+ return; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (*dm->is_fcs_mode_enable) -+ return; -+#endif -+ -+ switch (dm->support_ic_type) { -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ dpk_track_8814b(dm); -+ break; -+#endif -+ -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ dpk_track_8822c(dm); -+ break; -+#endif -+ -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ dpk_track_8195b(dm); -+ break; -+#endif -+ -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ phy_dpk_track_8721d(dm); -+ break; -+#endif -+ -+#if (RTL8723F_SUPPORT == 1) -+ case ODM_RTL8723F: -+ dpk_track_8723f(dm); -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ phy_dpk_track_8197f(dm); -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ phy_dpk_track_8192f(dm); -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ dpk_track_8198f(dm); -+ break; -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ dpk_track_8812f(dm); -+ break; -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ dpk_track_8197g(dm); -+ break; -+#endif -+ -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_set_dpk_track(void *dm_void, u8 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ -+ if (enable) -+ rf->rf_supportability = rf->rf_supportability | HAL_RF_DPK_TRACK; -+ else -+ rf->rf_supportability = rf->rf_supportability & ~HAL_RF_DPK_TRACK; -+} -+ -+void halrf_dpk_reload(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ if (dpk_info->dpk_path_ok > 0) -+ dpk_reload_8195b(dm); -+ break; -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ if (dpk_info->dpk_path_ok > 0) -+ dpk_reload_8721d(dm); -+ break; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#if (RTL8197F_SUPPORT == 1) -+ case ODM_RTL8197F: -+ if (dpk_info->dpk_path_ok > 0) -+ dpk_reload_8197f(dm); -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ case ODM_RTL8192F: -+ if (dpk_info->dpk_path_ok > 0) -+ dpk_reload_8192f(dm); -+ -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT == 1) -+ case ODM_RTL8198F: -+ if (dpk_info->dpk_path_ok > 0) -+ dpk_reload_8198f(dm); -+ break; -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ if (dpk_info->dpk_path_ok > 0) -+ dpk_reload_8814b(dm); -+ break; -+#endif -+ -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_dpk_switch(void *dm_void, u8 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ if (enable) { -+ rf->rf_supportability = rf->rf_supportability | HAL_RF_DPK; -+ dpk_info->is_dpk_enable = true; -+ halrf_dpk_enable_disable(dm); -+ halrf_dpk_trigger(dm); -+ halrf_set_dpk_track(dm, 1); -+ } else { -+ halrf_set_dpk_track(dm, 0); -+ dpk_info->is_dpk_enable = false; -+ halrf_dpk_enable_disable(dm); -+ rf->rf_supportability = rf->rf_supportability & ~HAL_RF_DPK; -+ } -+} -+ -+void _halrf_dpk_info_by_chip(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ dpk_info_by_8822c(dm, &used, output, &out_len); -+ break; -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ case ODM_RTL8812F: -+ dpk_info_by_8812f(dm, &used, output, &out_len); -+ break; -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ case ODM_RTL8197G: -+ dpk_info_by_8197g(dm, &used, output, &out_len); -+ break; -+#endif -+ -+ default: -+ break; -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void _halrf_display_dpk_info(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ char *ic_name = NULL; -+ u8 path; -+ -+ switch (dm->support_ic_type) { -+ -+#if (RTL8822C_SUPPORT) -+ case ODM_RTL8822C: -+ ic_name = "8822C"; -+ break; -+#endif -+ -+#if (RTL8814B_SUPPORT) -+ case ODM_RTL8814B: -+ ic_name = "8814B"; -+ break; -+#endif -+ -+#if (RTL8812F_SUPPORT) -+ case ODM_RTL8812F: -+ ic_name = "8812F"; -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT) -+ case ODM_RTL8198F: -+ ic_name = "8198F"; -+ break; -+#endif -+ -+#if (RTL8197F_SUPPORT) -+ case ODM_RTL8197F: -+ ic_name = "8197F"; -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ case ODM_RTL8192F: -+ ic_name = "8192F"; -+ break; -+#endif -+ -+#if (RTL8197G_SUPPORT) -+ case ODM_RTL8197G: -+ ic_name = "8197G"; -+ break; -+#endif -+ -+#if (RTL8710B_SUPPORT) -+ case ODM_RTL8721D: -+ ic_name = "8721D"; -+ break; -+#endif -+ -+#if (RTL8195B_SUPPORT) -+ case ODM_RTL8195B: -+ ic_name = "8195B"; -+ break; -+#endif -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n===============[ DPK info %s ]===============\n", ic_name); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %s %s\n", -+ "DPK type", (dm->fw_offload_ability & PHYDM_RF_DPK_OFFLOAD) ? "FW" : "Driver", -+ (dpk_info->is_dpk_by_channel) ? "(By channel)" : "(By group)"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %d (%d)\n", -+ "FW Ver (Sub Ver)", dm->fw_version, dm->fw_sub_version); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %s\n", -+ "DPK Ver", HALRF_DPK_VER); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %s\n", -+ "RFK init ver", HALRF_RFK_INIT_VER); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %d / %d (RFE type:%d)\n", -+ "Ext_PA 2G / 5G", dm->ext_pa, dm->ext_pa_5g, dm->rfe_type); -+ -+ if ((dpk_info->dpk_ch == 0) && (dpk_info->thermal_dpk[0] == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, "\n %-25s\n", -+ "No DPK had been done before!!!"); -+ return; -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %d / %d / %d\n", -+ "DPK Cal / OK / Reload", dpk_info->dpk_cal_cnt, dpk_info->dpk_ok_cnt, -+ dpk_info->dpk_reload_cnt); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %s\n", -+ "RFK H2C timeout", (rf->is_rfk_h2c_timeout) ? "Yes" : "No"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %s\n", -+ "DPD Reload", (dpk_info->dpk_status & BIT(0)) ? "Yes" : "No"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %s\n", -+ "DPD status", dpk_info->is_dpk_enable ? "Enable" : "Disable"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %s\n", -+ "DPD track status", (rf->rf_supportability & HAL_RF_DPK_TRACK) ? "Enable" : "Disable"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %s / %s / %d / %s\n", -+ "TSSI / Band / CH / BW", dpk_info->is_tssi_mode == 1 ? "On" : "Off", -+ dpk_info->dpk_band == 0 ? "2G" : "5G", dpk_info->dpk_ch, -+ dpk_info->dpk_bw == 3 ? "20M" : (dpk_info->dpk_bw == 2 ? "40M" : "80M")); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %s / %s / %s / %s\n", -+ "DPK result (path)", dpk_info->dpk_path_ok & BIT(0) ? "OK" : "Fail", -+ (dm->support_ic_type & ODM_IC_2SS) ? ((dpk_info->dpk_path_ok & BIT(1)) >> 1 ? "OK" : "Fail") : "NA", -+ (dm->support_ic_type & ODM_IC_3SS) ? ((dpk_info->dpk_path_ok & BIT(2)) >> 2 ? "OK" : "Fail") : "NA", -+ (dm->support_ic_type & ODM_IC_4SS) ? ((dpk_info->dpk_path_ok & BIT(3)) >> 3 ? "OK" : "Fail") : "NA"); -+#if 0 -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = %d / %d / %d / %d\n", -+ "DPK thermal (path)", dpk_info->thermal_dpk[0], dpk_info->thermal_dpk[1], -+ dpk_info->thermal_dpk[2], dpk_info->thermal_dpk[3]); -+#endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = ", -+ "DPK thermal (path)"); -+ for (path = 0; path < KPATH; path++) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ path == (KPATH - 1) ? "%d\n" : "%d / ", -+ dpk_info->thermal_dpk[path]); -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = 0x%x\n", -+ "DPK bkup GNT control", dpk_info->gnt_control); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-25s = 0x%x\n", -+ "DPK bkup GNT value", dpk_info->gnt_value); -+ -+ _halrf_dpk_info_by_chip(dm, &used, output, &out_len); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void halrf_dpk_debug_cmd(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ -+ char *cmd[5] = {"-h", "on", "off", "info", "switch"}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i; -+ -+ if ((strcmp(input[2], cmd[4]) != 0)) { -+ if (!(rf->rf_supportability & HAL_RF_DPK)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DPK is Unsupported!!!\n"); -+ return; -+ } -+ } -+ -+ if ((strcmp(input[2], cmd[0]) == 0)) { -+ for (i = 1; i < 4; i++) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %s\n", cmd[i]); -+ } -+ } else if ((strcmp(input[2], cmd[1]) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DPK is Enabled!!\n"); -+ dpk_info->is_dpk_enable = true; -+ halrf_dpk_enable_disable(dm); -+ } else if ((strcmp(input[2], cmd[2]) == 0)){ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DPK is Disabled!!\n"); -+ dpk_info->is_dpk_enable = false; -+ halrf_dpk_enable_disable(dm); -+ } else if ((strcmp(input[2], cmd[3]) == 0)) -+ _halrf_display_dpk_info(dm, &used, output, &out_len); -+ else if ((strcmp(input[2], cmd[4]) == 0) && (strcmp(input[3], cmd[1]) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DPK Switch on!!\n"); -+ halrf_dpk_switch(dm, 1); -+ } else if ((strcmp(input[2], cmd[4]) == 0) && (strcmp(input[3], cmd[2]) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DPK Switch off!!\n"); -+ halrf_dpk_switch(dm, 0); -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DPK Trigger start!!\n"); -+ halrf_dpk_trigger(dm); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DPK Trigger finish!!\n"); -+ } -+} -+ -+void halrf_dpk_c2h_report_transfer(void *dm_void, boolean is_ok, u8 *buf, u8 buf_size) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ -+ if (!(rf->rf_supportability & HAL_RF_DPK)) -+ return; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ dpk_c2h_report_transfer_8822c(dm, is_ok, buf, buf_size); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct dm_dpk_info *dpk_info = &dm->dpk_info; -+ -+ if (!(rf->rf_supportability & HAL_RF_DPK) || rf->is_dpk_in_progress) -+ return; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ dpk_info_rsvd_page_8822c(dm, buf, buf_size); -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void halrf_iqk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ if (!(rf->rf_supportability & HAL_RF_IQK)) -+ return; -+ -+ if (dm->rf_calibrate_info.is_iqk_in_progress) -+ return; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ iqk_info_rsvd_page_8822c(dm, buf, buf_size); -+ break; -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ iqk_info_rsvd_page_8195b(dm, buf, buf_size); -+ break; -+#endif -+ -+ default: -+ break; -+ } -+} -+ -+enum hal_status -+halrf_config_rfk_with_header_file(void *dm_void, u32 config_type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ enum hal_status result = HAL_STATUS_SUCCESS; -+#if 0 -+#if (RTL8822B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ if (config_type == CONFIG_BB_RF_CAL_INIT) -+ odm_read_and_config_mp_8822b_cal_init(dm); -+ } -+#endif -+#endif -+#if (RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197G) { -+ if (config_type == CONFIG_BB_RF_CAL_INIT) -+ odm_read_and_config_mp_8197g_cal_init(dm); -+ } -+#endif -+#if (RTL8198F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8198F) { -+ if (config_type == CONFIG_BB_RF_CAL_INIT) -+ odm_read_and_config_mp_8198f_cal_init(dm); -+ } -+#endif -+#if (RTL8812F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8812F) { -+ if (config_type == CONFIG_BB_RF_CAL_INIT) -+ odm_read_and_config_mp_8812f_cal_init(dm); -+ } -+#endif -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ if (config_type == CONFIG_BB_RF_CAL_INIT) -+ odm_read_and_config_mp_8822c_cal_init(dm); -+ } -+#endif -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ if (config_type == CONFIG_BB_RF_CAL_INIT) -+ odm_read_and_config_mp_8814b_cal_init(dm); -+ } -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195B) { -+ if (config_type == CONFIG_BB_RF_CAL_INIT) -+ odm_read_and_config_mp_8195b_cal_init(dm); -+ } -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8721D) { -+ if (config_type == CONFIG_BB_RF_CAL_INIT) -+ odm_read_and_config_mp_8721d_cal_init(dm); -+ } -+#endif -+#if (RTL8723F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8723F) { -+ if (config_type == CONFIG_BB_RF_CAL_INIT) -+ odm_read_and_config_mp_8723f_cal_init(dm); -+ } -+#endif -+ -+#if 1 -+ if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) { -+ result = phydm_set_reg_by_fw(dm, PHYDM_HALMAC_CMD_END, 0, 0, 0, (enum rf_path)0, 0); -+ RF_DBG(dm, DBG_RF_IQK,"phy param offload end!result = %d", result); -+ } -+#endif -+ return result; -+} -+ -+void halrf_txgapk_trigger(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ u64 start_time = 0x0; -+ -+ if (!(rf->rf_supportability & HAL_RF_TXGAPK)) -+ return; -+ -+ halrf_rfk_handshake(dm, true); -+ -+ start_time = odm_get_current_time(dm); -+ rf->is_txgapk_in_progress = true; -+ halrf_rfk_power_save(dm, false); -+ -+ switch (dm->support_ic_type) { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+#if (RTL8195B_SUPPORT == 1) -+ case ODM_RTL8195B: -+ /*phy_txgap_calibrate_8195b(dm, false);*/ -+ break; -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ case ODM_RTL8721D: -+ /*phy_txgap_calibrate_8721d(dm, false);*/ -+ break; -+#endif -+ -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ case ODM_RTL8814B: -+ /*phy_txgap_calibrate_8814b(dm, false);*/ -+ break; -+#endif -+ -+#if (RTL8822C_SUPPORT == 1) -+ case ODM_RTL8822C: -+ halrf_txgapk_8822c(dm); -+ break; -+#endif -+ -+ default: -+ break; -+ } -+ halrf_rfk_power_save(dm, true); -+ rf->is_txgapk_in_progress = false; -+ -+ halrf_rfk_handshake(dm, false); -+ -+ rf->dpk_progressing_time = -+ odm_get_progressing_time(dm_void, start_time); -+ RF_DBG(dm, DBG_RF_TXGAPK, "[TGGC]TXGAPK progressing_time = %lld ms\n", -+ rf->dpk_progressing_time); -+} -+ -+void halrf_tssi_get_efuse(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) { -+ halrf_tssi_get_efuse_8822c(dm); -+ halrf_get_efuse_thermal_pwrtype_8822c(dm); -+ } -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8812F) { -+ halrf_tssi_get_efuse_8812f(dm); -+ } -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ halrf_tssi_get_efuse_8814b(dm); -+ halrf_get_efuse_thermal_pwrtype_8814b(dm); -+ } -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8197G) { -+ halrf_tssi_get_efuse_8197g(dm); -+ } -+#endif -+ -+} -+ -+void halrf_do_rxbb_dck(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8814B) -+ halrf_do_rxbb_dck_8814b(dm); -+#endif -+ -+} -+ -+void halrf_do_tssi(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822C) -+ halrf_do_tssi_8822c(dm); -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8812F) -+ halrf_do_tssi_8812f(dm); -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197G) -+ halrf_do_tssi_8197g(dm); -+#endif -+ -+} -+ -+void halrf_set_tssi_enable(void *dm_void, boolean enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ -+ if (enable == 1) { -+ rf->power_track_type = 4; -+ odm_set_bb_reg(dm, R_0x1e7c, 0x40000000, 0x1); -+ } else { -+ rf->power_track_type = 0; -+ odm_set_bb_reg(dm, R_0x1e7c, 0x40000000, 0x0); -+ } -+} -+ -+ -+void halrf_do_thermal(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ halrf_do_thermal_8822c(dm); -+#endif -+} -+ -+ -+ -+u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ return halrf_set_tssi_value_8822c(dm, tssi_value); -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ return halrf_set_tssi_value_8814b(dm, tssi_value); -+#endif -+ -+ return 0; -+} -+ -+void halrf_set_tssi_power(void *dm_void, s8 power) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ /*halrf_set_tssi_poewr_8822c(dm, power);*/ -+#endif -+} -+ -+void halrf_tssi_set_de_for_tx_verify(void *dm_void, u32 tssi_de, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ halrf_tssi_set_de_for_tx_verify_8822c(dm, tssi_de, path); -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ halrf_tssi_set_de_for_tx_verify_8814b(dm, tssi_de, path); -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8812F) -+ halrf_tssi_set_de_for_tx_verify_8812f(dm, tssi_de, path); -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8197G) -+ halrf_tssi_set_de_for_tx_verify_8197g(dm, tssi_de, path); -+#endif -+ -+} -+ -+u32 halrf_query_tssi_value(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ return halrf_query_tssi_value_8822c(dm); -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ return halrf_query_tssi_value_8814b(dm); -+#endif -+ return 0; -+} -+ -+void halrf_tssi_cck(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ /*halrf_tssi_cck_8822c(dm);*/ -+ if (dm->support_ic_type & ODM_RTL8822C) -+ halrf_thermal_cck_8822c(dm); -+#endif -+ -+} -+ -+void halrf_thermal_cck(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ halrf_thermal_cck_8822c(dm); -+#endif -+ -+} -+ -+void halrf_tssi_set_de(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ halrf_tssi_set_de_8814b(dm); -+#endif -+} -+ -+void halrf_tssi_dck(void *dm_void, u8 direct_do) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ halrf_rfk_handshake(dm, true); -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ if (dm->rfe_type == 1 || dm->rfe_type == 4 || dm->rfe_type == 5) -+ return; -+#else -+ if (dm->rfe_type == 1 || dm->rfe_type == 6) -+ return; -+#endif -+ halrf_tssi_dck_8814b(dm, direct_do); -+ } -+#endif -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ halrf_tssi_dck_8822c(dm); -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8812F) -+ halrf_tssi_dck_8812f(dm); -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197G) -+ halrf_tssi_dck_8197g(dm); -+#endif -+ -+ halrf_rfk_handshake(dm, false); -+ -+} -+ -+void halrf_calculate_tssi_codeword(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ halrf_calculate_tssi_codeword_8814b(dm, RF_PATH_A); -+#endif -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ halrf_calculate_tssi_codeword_8822c(dm); -+#endif -+} -+ -+void halrf_set_tssi_codeword(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ halrf_set_tssi_codeword_8814b(dm, tssi->tssi_codeword); -+#endif -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ halrf_set_tssi_codeword_8822c(dm, tssi->tssi_codeword); -+#endif -+ -+} -+ -+u8 halrf_get_tssi_codeword_for_txindex(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ return 80; -+#else -+ return 60; -+#endif -+ } -+#endif -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ return 64; -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8812F) -+ return 100; -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8197G) -+ return 100; -+#endif -+ -+ return 60; -+} -+ -+void halrf_tssi_clean_de( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8812F_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8812F) -+ halrf_tssi_clean_de_8812f(dm); -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ halrf_tssi_clean_de_8814b(dm); -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8197G) -+ halrf_tssi_clean_de_8197g(dm); -+#endif -+ -+} -+ -+u32 halrf_tssi_trigger_de(void *dm_void, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8812F_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8812F) -+ return halrf_tssi_trigger_de_8812f(dm, path); -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ return halrf_tssi_trigger_de_8814b(dm, path); -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8197G) -+ return halrf_tssi_trigger_de_8197g(dm, path); -+#endif -+ return 0; -+} -+ -+u32 halrf_tssi_get_de(void *dm_void, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ return halrf_tssi_get_de_8822c(dm, path); -+#endif -+ -+#if (RTL8812F_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8812F) -+ return halrf_tssi_get_de_8812f(dm, path); -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ return halrf_tssi_get_de_8814b(dm, path); -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8197G) -+ return halrf_tssi_get_de_8197g(dm, path); -+#endif -+ return 0; -+} -+ -+void halrf_tssi_trigger(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ if (*dm->mp_mode == 1) { -+ if (cali_info->txpowertrack_control == 0 || -+ cali_info->txpowertrack_control == 1) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "[TSSI]======>%s MP Mode UI chose thermal tracking. return !!!\n", __func__); -+ return; -+ } -+ } else { -+ if (rf->power_track_type >= 0 && rf->power_track_type <= 3) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "[TSSI]======>%s Normal Mode efues is thermal tracking. return !!!\n", __func__); -+ return; -+ } -+ } -+#endif -+ -+ halrf_calculate_tssi_codeword(dm); -+ halrf_set_tssi_codeword(dm); -+ halrf_tssi_dck(dm, false); -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ halrf_tssi_get_efuse(dm); -+#endif -+ halrf_tssi_set_de(dm); -+ halrf_do_tssi(dm); -+} -+ -+void halrf_txgapk_write_gain_table(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ halrf_txgapk_save_all_tx_gain_table_8822c(dm); -+#endif -+} -+ -+void halrf_txgapk_reload_tx_gain(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8822C_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ halrf_txgapk_reload_tx_gain_8822c(dm); -+#endif -+} -+ -+void halrf_txgap_enable_disable(void *dm_void, u8 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ -+ if (enable) { -+ rf->rf_supportability = rf->rf_supportability | HAL_RF_TXGAPK; -+ halrf_txgapk_trigger(dm); -+ } else { -+ rf->rf_supportability = rf->rf_supportability & ~HAL_RF_TXGAPK; -+ halrf_txgapk_reload_tx_gain(dm); -+ } -+} -+ -+void _halrf_dump_subpage(void *dm_void, u32 *_used, char *output, u32 *_out_len, u8 page) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 addr; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n===============[ Subpage_%d start]===============\n", page); -+ -+ RF_DBG(dm, DBG_RF_RFK, " ===============[ Subpage_%d start]===============\n", page); -+ -+ odm_set_bb_reg(dm, R_0x1b00, BIT(2) | BIT(1), page); -+ -+ for (addr = 0x1b00; addr < 0x1c00; addr += 0x10) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " 0x%x : 0x%08x 0x%08x 0x%08x 0x%08x\n", addr, -+ odm_get_bb_reg(dm, addr, MASKDWORD), -+ odm_get_bb_reg(dm, addr + 0x4, MASKDWORD), -+ odm_get_bb_reg(dm, addr + 0x8, MASKDWORD), -+ odm_get_bb_reg(dm, addr + 0xc, MASKDWORD)); -+ RF_DBG(dm, DBG_RF_RFK, " 0x%x : 0x%08x 0x%08x 0x%08x 0x%08x\n", addr, -+ odm_get_bb_reg(dm, addr, MASKDWORD), -+ odm_get_bb_reg(dm, addr + 0x4, MASKDWORD), -+ odm_get_bb_reg(dm, addr + 0x8, MASKDWORD), -+ odm_get_bb_reg(dm, addr + 0xc, MASKDWORD)); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void halrf_dump_rfk_reg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 reg_1b00, supportability; -+ u8 page; -+ -+ if (!(dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES))) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "CMD is Unsupported due to IC type!!!\n"); -+ RF_DBG(dm, DBG_RF_RFK, "[RFK] CMD is Unsupported due to IC type!!!\n"); -+ return; -+ } else if (rf->is_dpk_in_progress || dm->rf_calibrate_info.is_iqk_in_progress || -+ dm->is_psd_in_process || rf->is_tssi_in_progress || rf->is_txgapk_in_progress) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Bypass CMD due to RFK is doing!!!\n"); -+ RF_DBG(dm, DBG_RF_RFK, "[RFK] Bypass CMD due to RFK is doing!!!\n"); -+ return; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (*dm->is_fcs_mode_enable) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Bypass CMD due to FCS mode!!!\n"); -+ RF_DBG(dm, DBG_RF_RFK, "[RFK] Bypass CMD due to FCS mode!!!\n"); -+ return; -+ } -+#endif -+ supportability = rf->rf_supportability; -+ -+ /*to avoid DPK track interruption*/ -+ rf->rf_supportability = rf->rf_supportability & ~HAL_RF_DPK_TRACK; -+ -+ reg_1b00 = odm_get_bb_reg(dm, R_0x1b00, MASKDWORD); -+ -+ if (input[2]) -+ PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[0]); -+ -+ if ((strcmp(input[2], help) == 0)) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "dump subpage {0:Page0, 1:Page1, 2:Page2, 3:Page3, 4:all}\n"); -+ else if (var1[0] > 4) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Wrong subpage number!!\n"); -+ else if (var1[0] == 4) { -+ for (page = 0; page < 4; page++) -+ _halrf_dump_subpage(dm, &used, output, &out_len, page); -+ } else -+ _halrf_dump_subpage(dm, &used, output, &out_len, (u8)var1[0]); -+ -+ odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, reg_1b00); -+ -+ rf->rf_supportability = supportability; -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+/*Golbal function*/ -+void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 i; -+ -+ for (i = 0; i < num; i++) -+ odm_write_4byte(dm, bp_reg[i], bp[i]); -+} -+ -+void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, -+ u8 ss) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 i, path; -+ -+ for (i = 0; i < num; i++) { -+ for (path = 0; path < ss; path++) -+ odm_set_rf_reg(dm, (enum rf_path)path, bp_reg[i], -+ MASK20BITS, bp[i][path]); -+ } -+} -+ -+void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 i; -+ -+ for (i = 0; i < num; i++) -+ bp[i] = odm_read_4byte(dm, bp_reg[i]); -+} -+ -+void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 i, path; -+ -+ for (i = 0; i < num; i++) { -+ for (path = 0; path < ss; path++) { -+ bp[i][path] = -+ odm_get_rf_reg(dm, (enum rf_path)path, -+ bp_reg[i], MASK20BITS); -+ } -+ } -+} -+ -+void halrf_swap(void *dm_void, u32 *v1, u32 *v2) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 temp; -+ -+ temp = *v1; -+ *v1 = *v2; -+ *v2 = temp; -+} -+ -+void halrf_bubble(void *dm_void, u32 *v1, u32 *v2) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 temp; -+ -+ if (*v1 >= 0x200 && *v2 >= 0x200) { -+ if (*v1 > *v2) -+ halrf_swap(dm, v1, v2); -+ } else if (*v1 < 0x200 && *v2 < 0x200) { -+ if (*v1 > *v2) -+ halrf_swap(dm, v1, v2); -+ } else if (*v1 < 0x200 && *v2 >= 0x200) { -+ halrf_swap(dm, v1, v2); -+ } -+} -+ -+void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 temp; -+ u32 i, j; -+ -+ RF_DBG(dm, DBG_RF_DACK, "[DACK]bubble!!!!!!!!!!!!"); -+ for (i = 0; i < SN - 1; i++) { -+ for (j = 0; j < (SN - 1 - i) ; j++) { -+ halrf_bubble(dm, &iv[j], &iv[j + 1]); -+ halrf_bubble(dm, &qv[j], &qv[j + 1]); -+ } -+ } -+} -+ -+void halrf_minmax_compare(void *dm_void, u32 value, u32 *min, -+ u32 *max) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (value >= 0x200) { -+ if (*min >= 0x200) { -+ if (*min > value) -+ *min = value; -+ } else { -+ *min = value; -+ } -+ if (*max >= 0x200) { -+ if (*max < value) -+ *max = value; -+ } -+ } else { -+ if (*min < 0x200) { -+ if (*min > value) -+ *min = value; -+ } -+ -+ if (*max >= 0x200) { -+ *max = value; -+ } else { -+ if (*max < value) -+ *max = value; -+ } -+ } -+} -+ -+u32 halrf_delta(void *dm_void, u32 v1, u32 v2) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (v1 >= 0x200 && v2 >= 0x200) { -+ if (v1 > v2) -+ return v1 - v2; -+ else -+ return v2 - v1; -+ } else if (v1 >= 0x200 && v2 < 0x200) { -+ return v2 + (0x400 - v1); -+ } else if (v1 < 0x200 && v2 >= 0x200) { -+ return v1 + (0x400 - v2); -+ } -+ -+ if (v1 > v2) -+ return v1 - v2; -+ else -+ return v2 - v1; -+} -+ -+boolean halrf_compare(void *dm_void, u32 value) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ boolean fail = false; -+ -+ if (value >= 0x200 && (0x400 - value) > 0x64) -+ fail = true; -+ else if (value < 0x200 && value > 0x64) -+ fail = true; -+ -+ if (fail) -+ RF_DBG(dm, DBG_RF_DACK, "[DACK]overflow!!!!!!!!!!!!!!!"); -+ return fail; -+} -+ -+void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 iv[SN], qv[SN], im[SN], qm[SN], temp, temp1, temp2; -+ u32 p, m, t; -+ u32 i_max = 0, q_max = 0, i_min = 0x0, q_min = 0x0, c = 0x0; -+ u32 i_delta, q_delta; -+ u8 i, j, ii = 0, qi = 0; -+ boolean fail = false; -+ -+ ODM_delay_ms(10); -+ for (i = 0; i < SN; i++) { -+ im[i] = 0; -+ qm[i] = 0; -+ } -+ i = 0; -+ c = 0; -+ while (i < SN && c < 1000) { -+ c++; -+ temp = odm_get_bb_reg(dm, 0x2dbc, 0x3fffff); -+ iv[i] = (temp & 0x3ff000) >> 12; -+ qv[i] = temp & 0x3ff; -+ -+ fail = false; -+ if (halrf_compare(dm, iv[i])) -+ fail = true; -+ if (halrf_compare(dm, qv[i])) -+ fail = true; -+ if (!fail) -+ i++; -+ } -+ c = 0; -+ do { -+ c++; -+ i_min = iv[0]; -+ i_max = iv[0]; -+ q_min = qv[0]; -+ q_max = qv[0]; -+ for (i = 0; i < SN; i++) { -+ halrf_minmax_compare(dm, iv[i], &i_min, &i_max); -+ halrf_minmax_compare(dm, qv[i], &q_min, &q_max); -+ } -+ RF_DBG(dm, DBG_RF_DACK, "[DACK]i_min=0x%x, i_max=0x%x", -+ i_min, i_max); -+ RF_DBG(dm, DBG_RF_DACK, "[DACK]q_min=0x%x, q_max=0x%x", -+ q_min, q_max); -+ if (i_max < 0x200 && i_min < 0x200) -+ i_delta = i_max - i_min; -+ else if (i_max >= 0x200 && i_min >= 0x200) -+ i_delta = i_max - i_min; -+ else -+ i_delta = i_max + (0x400 - i_min); -+ -+ if (q_max < 0x200 && q_min < 0x200) -+ q_delta = q_max - q_min; -+ else if (q_max >= 0x200 && q_min >= 0x200) -+ q_delta = q_max - q_min; -+ else -+ q_delta = q_max + (0x400 - q_min); -+ RF_DBG(dm, DBG_RF_DACK, "[DACK]i_delta=0x%x, q_delta=0x%x", -+ i_delta, q_delta); -+ halrf_b_sort(dm, iv, qv); -+ if (i_delta > 5 || q_delta > 5) { -+ temp = odm_get_bb_reg(dm, 0x2dbc, 0x3fffff); -+ iv[0] = (temp & 0x3ff000) >> 12; -+ qv[0] = temp & 0x3ff; -+ temp = odm_get_bb_reg(dm, 0x2dbc, 0x3fffff); -+ iv[SN - 1] = (temp & 0x3ff000) >> 12; -+ qv[SN - 1] = temp & 0x3ff; -+ } else { -+ break; -+ } -+ } while (c < 100); -+#if 1 -+#if 0 -+ for (i = 0; i < SN; i++) -+ RF_DBG(dm, DBG_RF_DACK, "[DACK]iv[%d] = 0x%x\n", i, iv[i]); -+ for (i = 0; i < SN; i++) -+ RF_DBG(dm, DBG_RF_DACK, "[DACK]qv[%d] = 0x%x\n", i, qv[i]); -+#endif -+ /*i*/ -+ m = 0; -+ p = 0; -+ for (i = 10; i < SN - 10; i++) { -+ if (iv[i] > 0x200) -+ m = (0x400 - iv[i]) + m; -+ else -+ p = iv[i] + p; -+ } -+ -+ if (p > m) { -+ t = p - m; -+ t = t / (SN - 20); -+ } else { -+ t = m - p; -+ t = t / (SN - 20); -+ if (t != 0x0) -+ t = 0x400 - t; -+ } -+ *i_value = t; -+ /*q*/ -+ m = 0; -+ p = 0; -+ for (i = 10; i < SN - 10; i++) { -+ if (qv[i] > 0x200) -+ m = (0x400 - qv[i]) + m; -+ else -+ p = qv[i] + p; -+ } -+ if (p > m) { -+ t = p - m; -+ t = t / (SN - 20); -+ } else { -+ t = m - p; -+ t = t / (SN - 20); -+ if (t != 0x0) -+ t = 0x400 - t; -+ } -+ *q_value = t; -+#endif -+} -+void halrf_delay_10us(u16 v1) -+{ -+ u16 i = 0; -+ -+ for (i = 0; i < v1; i++) -+ ODM_delay_us(10); -+} -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf.h -new file mode 100644 -index 000000000000..560b1fd10671 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf.h -@@ -0,0 +1,802 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_H__ -+#define __HALRF_H__ -+ -+/*@============================================================*/ -+/*@include files*/ -+/*@============================================================*/ -+#include "halrf/halrf_psd.h" -+#if (RTL8822B_SUPPORT == 1) -+#include "halrf/rtl8822b/halrf_rfk_init_8822b.h" -+#endif -+#if (RTL8822C_SUPPORT == 1) -+#include "halrf/rtl8822c/halrf_rfk_init_8822c.h" -+#include "halrf/rtl8822c/halrf_iqk_8822c.h" -+#include "halrf/rtl8822c/halrf_tssi_8822c.h" -+#include "halrf/rtl8822c/halrf_dpk_8822c.h" -+#include "halrf/rtl8822c/halrf_txgapk_8822c.h" -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+#if (RTL8197G_SUPPORT == 1) -+#include "halrf/rtl8197g/halrf_rfk_init_8197g.h" -+#endif -+#if (RTL8198F_SUPPORT == 1) -+#include "halrf/rtl8198f/halrf_rfk_init_8198f.h" -+#endif -+#if (RTL8812F_SUPPORT == 1) -+#include "halrf/rtl8812f/halrf_rfk_init_8812f.h" -+#endif -+ -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+#include "halrf/rtl8814b/halrf_rfk_init_8814b.h" -+#include "halrf/rtl8814b/halrf_iqk_8814b.h" -+#include "halrf/rtl8814b/halrf_dpk_8814b.h" -+#include "halrf/rtl8814b/halrf_txgapk_8814b.h" -+#endif -+ -+/*@============================================================*/ -+/*@Definition */ -+/*@============================================================*/ -+/*IQK version*/ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+#define IQK_VER_8188E "0x14" -+#define IQK_VER_8192E "0x01" -+#define IQK_VER_8192F "0x01" -+#define IQK_VER_8723B "0x1e" -+#define IQK_VER_8812A "0x02" -+#define IQK_VER_8821A "0x02" -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+#define IQK_VER_8188E "0x01" -+#define IQK_VER_8192E "0x01" -+#define IQK_VER_8192F "0x01" -+#define IQK_VER_8723B "0x1f" -+#define IQK_VER_8812A "0x01" -+#define IQK_VER_8821A "0x01" -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#define IQK_VER_8188E "0x01" -+#define IQK_VER_8192E "0x01" -+#define IQK_VER_8192F "0x01" -+#define IQK_VER_8723B "0x1e" -+#define IQK_VER_8812A "0x01" -+#define IQK_VER_8821A "0x01" -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+#define IQK_VER_8188E "0x01" -+#define IQK_VER_8192E "0x01" -+#define IQK_VER_8192F "0x01" -+#define IQK_VER_8723B "0x1e" -+#define IQK_VER_8812A "0x01" -+#define IQK_VER_8821A "0x01" -+#endif -+#define IQK_VER_8814A "0x0f" -+#define IQK_VER_8188F "0x01" -+#define IQK_VER_8197F "0x1d" -+#define IQK_VER_8703B "0x05" -+#define IQK_VER_8710B "0x01" -+#define IQK_VER_8723D "0x02" -+#define IQK_VER_8822B "0x32" -+#define IQK_VER_8822C "0x14" -+#define IQK_VER_8821C "0x23" -+#define IQK_VER_8198F "0x0b" -+#define IQK_VER_8814B "0x15" -+#define IQK_VER_8812F "0x0c" -+#define IQK_VER_8710C "0x0a" -+#define IQK_VER_8197G "0x03" -+ -+/*LCK version*/ -+#define LCK_VER_8188E "0x02" -+#define LCK_VER_8192E "0x02" -+#define LCK_VER_8192F "0x01" -+#define LCK_VER_8723B "0x02" -+#define LCK_VER_8812A "0x01" -+#define LCK_VER_8821A "0x01" -+#define LCK_VER_8814A "0x01" -+#define LCK_VER_8188F "0x01" -+#define LCK_VER_8197F "0x01" -+#define LCK_VER_8703B "0x01" -+#define LCK_VER_8710B "0x01" -+#define LCK_VER_8723D "0x01" -+#define LCK_VER_8822B "0x02" -+#define LCK_VER_8822C "0x00" -+#define LCK_VER_8821C "0x02" -+#define LCK_VER_8814B "0x02" -+#define LCK_VER_8195B "0x02" -+#define LCK_VER_8710C "0x02" -+#define LCK_VER_8197G "0x01" -+#define LCK_VER_8198F "0x01" -+ -+/*power tracking version*/ -+#define PWRTRK_VER_8188E "0x01" -+#define PWRTRK_VER_8192E "0x01" -+#define PWRTRK_VER_8192F "0x01" -+#define PWRTRK_VER_8723B "0x01" -+#define PWRTRK_VER_8812A "0x01" -+#define PWRTRK_VER_8821A "0x01" -+#define PWRTRK_VER_8814A "0x01" -+#define PWRTRK_VER_8188F "0x01" -+#define PWRTRK_VER_8197F "0x01" -+#define PWRTRK_VER_8703B "0x01" -+#define PWRTRK_VER_8710B "0x01" -+#define PWRTRK_VER_8723D "0x01" -+#define PWRTRK_VER_8822B "0x01" -+#define PWRTRK_VER_8822C "0x00" -+#define PWRTRK_VER_8821C "0x01" -+#define PWRTRK_VER_8814B "0x00" -+#define PWRTRK_VER_8197G "0x00" -+ -+/*DPK version*/ -+#define DPK_VER_8188E "NONE" -+#define DPK_VER_8192E "NONE" -+#define DPK_VER_8723B "NONE" -+#define DPK_VER_8812A "NONE" -+#define DPK_VER_8821A "NONE" -+#define DPK_VER_8814A "NONE" -+#define DPK_VER_8188F "NONE" -+#define DPK_VER_8197F "0x08" -+#define DPK_VER_8703B "NONE" -+#define DPK_VER_8710B "NONE" -+#define DPK_VER_8723D "NONE" -+#define DPK_VER_8822B "NONE" -+#define DPK_VER_8822C "0x20" -+#define DPK_VER_8821C "NONE" -+#define DPK_VER_8192F "0x0e" -+#define DPK_VER_8198F "0x0e" -+#define DPK_VER_8814B "0x0f" -+#define DPK_VER_8195B "0x0c" -+#define DPK_VER_8812F "0x0a" -+#define DPK_VER_8197G "0x09" -+ -+/*RFK_INIT version*/ -+#define RFK_INIT_VER_8822B "0x8" -+#define RFK_INIT_VER_8822C "0x8" -+#define RFK_INIT_VER_8195B "0x1" -+#define RFK_INIT_VER_8198F "0x8" -+#define RFK_INIT_VER_8814B "0xa" -+#define RFK_INIT_VER_8812F "0x4" -+#define RFK_INIT_VER_8197G "0x4" -+ -+/*DACK version*/ -+#define DACK_VER_8822C "0xa" -+#define DACK_VER_8814B "0x4" -+ -+/*TXGAPK version*/ -+#define TXGAPK_VER_8814B "0x1" -+#define TXGAPK_VER_8195B "0x2" -+ -+/*Kfree tracking version*/ -+#define KFREE_VER_8188E \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8192E \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8192F \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8723B \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8812A \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8821A \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8814A \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8188F \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8197F \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8703B \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8710B \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8723D \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8822B \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8822C \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8821C \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8814B \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+#define KFREE_VER_8197G \ -+ (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" -+ -+#define TSSI_VER_8812F "0x1" -+#define TSSI_VER_8822C "0x1" -+#define TSSI_VER_8821C "0x1" -+#define TSSI_VER_8814B "0x1" -+#define TSSI_VER_8197G "0x1" -+ -+/*PA Bias Calibration version*/ -+#define PABIASK_VER_8188E \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8192E \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8192F \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8723B \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8812A \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8821A \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8814A \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8188F \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8197F \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8703B \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8710B \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8723D \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8822B \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8822C \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8821C \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8814B \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+#define PABIASK_VER_8197G \ -+ (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" -+ -+#define HALRF_IQK_VER \ -+ (dm->support_ic_type == ODM_RTL8188E) ? IQK_VER_8188E : \ -+ (dm->support_ic_type == ODM_RTL8192E) ? IQK_VER_8192E : \ -+ (dm->support_ic_type == ODM_RTL8192F) ? IQK_VER_8192F : \ -+ (dm->support_ic_type == ODM_RTL8723B) ? IQK_VER_8723B : \ -+ (dm->support_ic_type == ODM_RTL8812) ? IQK_VER_8812A : \ -+ (dm->support_ic_type == ODM_RTL8821) ? IQK_VER_8821A : \ -+ (dm->support_ic_type == ODM_RTL8814A) ? IQK_VER_8814A : \ -+ (dm->support_ic_type == ODM_RTL8188F) ? IQK_VER_8188F : \ -+ (dm->support_ic_type == ODM_RTL8197F) ? IQK_VER_8197F : \ -+ (dm->support_ic_type == ODM_RTL8703B) ? IQK_VER_8703B : \ -+ (dm->support_ic_type == ODM_RTL8710B) ? IQK_VER_8710B : \ -+ (dm->support_ic_type == ODM_RTL8723D) ? IQK_VER_8723D : \ -+ (dm->support_ic_type == ODM_RTL8822B) ? IQK_VER_8822B : \ -+ (dm->support_ic_type == ODM_RTL8822C) ? IQK_VER_8822C : \ -+ (dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : \ -+ (dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : \ -+ (dm->support_ic_type == ODM_RTL8710C) ? IQK_VER_8710C : \ -+ (dm->support_ic_type == ODM_RTL8197G) ? IQK_VER_8197G : "unknown" -+ -+#define HALRF_LCK_VER \ -+ (dm->support_ic_type == ODM_RTL8188E) ? LCK_VER_8188E : \ -+ (dm->support_ic_type == ODM_RTL8192E) ? LCK_VER_8192E : \ -+ (dm->support_ic_type == ODM_RTL8192F) ? LCK_VER_8192F : \ -+ (dm->support_ic_type == ODM_RTL8723B) ? LCK_VER_8723B : \ -+ (dm->support_ic_type == ODM_RTL8812) ? LCK_VER_8812A : \ -+ (dm->support_ic_type == ODM_RTL8821) ? LCK_VER_8821A : \ -+ (dm->support_ic_type == ODM_RTL8814A) ? LCK_VER_8814A : \ -+ (dm->support_ic_type == ODM_RTL8188F) ? LCK_VER_8188F : \ -+ (dm->support_ic_type == ODM_RTL8197F) ? LCK_VER_8197F : \ -+ (dm->support_ic_type == ODM_RTL8703B) ? LCK_VER_8703B : \ -+ (dm->support_ic_type == ODM_RTL8710B) ? LCK_VER_8710B : \ -+ (dm->support_ic_type == ODM_RTL8723D) ? LCK_VER_8723D : \ -+ (dm->support_ic_type == ODM_RTL8822B) ? LCK_VER_8822B : \ -+ (dm->support_ic_type == ODM_RTL8822C) ? LCK_VER_8822C : \ -+ (dm->support_ic_type == ODM_RTL8821C) ? LCK_VER_8821C : \ -+ (dm->support_ic_type == ODM_RTL8814B) ? LCK_VER_8814B : \ -+ (dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : \ -+ (dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : "unknown" -+#define HALRF_POWRTRACKING_VER \ -+ (dm->support_ic_type == ODM_RTL8188E) ? PWRTRK_VER_8188E : \ -+ (dm->support_ic_type == ODM_RTL8192E) ? PWRTRK_VER_8192E : \ -+ (dm->support_ic_type == ODM_RTL8192F) ? PWRTRK_VER_8192F : \ -+ (dm->support_ic_type == ODM_RTL8723B) ? PWRTRK_VER_8723B : \ -+ (dm->support_ic_type == ODM_RTL8812) ? PWRTRK_VER_8812A : \ -+ (dm->support_ic_type == ODM_RTL8821) ? PWRTRK_VER_8821A : \ -+ (dm->support_ic_type == ODM_RTL8814A) ? PWRTRK_VER_8814A : \ -+ (dm->support_ic_type == ODM_RTL8188F) ? PWRTRK_VER_8188F : \ -+ (dm->support_ic_type == ODM_RTL8197F) ? PWRTRK_VER_8197F : \ -+ (dm->support_ic_type == ODM_RTL8703B) ? PWRTRK_VER_8703B : \ -+ (dm->support_ic_type == ODM_RTL8710B) ? PWRTRK_VER_8710B : \ -+ (dm->support_ic_type == ODM_RTL8723D) ? PWRTRK_VER_8723D : \ -+ (dm->support_ic_type == ODM_RTL8822B) ? PWRTRK_VER_8822B : \ -+ (dm->support_ic_type == ODM_RTL8822C) ? PWRTRK_VER_8822C : \ -+ (dm->support_ic_type == ODM_RTL8821C) ? PWRTRK_VER_8821C : \ -+ (dm->support_ic_type == ODM_RTL8197G) ? PWRTRK_VER_8197G : "unknown" -+ -+#define HALRF_DPK_VER \ -+ (dm->support_ic_type == ODM_RTL8188E) ? DPK_VER_8188E : \ -+ (dm->support_ic_type == ODM_RTL8192E) ? DPK_VER_8192E : \ -+ (dm->support_ic_type == ODM_RTL8192F) ? DPK_VER_8192F : \ -+ (dm->support_ic_type == ODM_RTL8723B) ? DPK_VER_8723B : \ -+ (dm->support_ic_type == ODM_RTL8812) ? DPK_VER_8812A : \ -+ (dm->support_ic_type == ODM_RTL8821) ? DPK_VER_8821A : \ -+ (dm->support_ic_type == ODM_RTL8814A) ? DPK_VER_8814A : \ -+ (dm->support_ic_type == ODM_RTL8188F) ? DPK_VER_8188F : \ -+ (dm->support_ic_type == ODM_RTL8197F) ? DPK_VER_8197F : \ -+ (dm->support_ic_type == ODM_RTL8198F) ? DPK_VER_8198F : \ -+ (dm->support_ic_type == ODM_RTL8703B) ? DPK_VER_8703B : \ -+ (dm->support_ic_type == ODM_RTL8710B) ? DPK_VER_8710B : \ -+ (dm->support_ic_type == ODM_RTL8723D) ? DPK_VER_8723D : \ -+ (dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \ -+ (dm->support_ic_type == ODM_RTL8822C) ? DPK_VER_8822C : \ -+ (dm->support_ic_type == ODM_RTL8812F) ? DPK_VER_8812F : \ -+ (dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : \ -+ (dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : \ -+ (dm->support_ic_type == ODM_RTL8197G) ? DPK_VER_8197G : "unknown" -+ -+#define HALRF_KFREE_VER \ -+ (dm->support_ic_type == ODM_RTL8188E) ? KFREE_VER_8188E : \ -+ (dm->support_ic_type == ODM_RTL8192E) ? KFREE_VER_8192E : \ -+ (dm->support_ic_type == ODM_RTL8192F) ? KFREE_VER_8192F : \ -+ (dm->support_ic_type == ODM_RTL8723B) ? KFREE_VER_8723B : \ -+ (dm->support_ic_type == ODM_RTL8812) ? KFREE_VER_8812A : \ -+ (dm->support_ic_type == ODM_RTL8821) ? KFREE_VER_8821A : \ -+ (dm->support_ic_type == ODM_RTL8814A) ? KFREE_VER_8814A : \ -+ (dm->support_ic_type == ODM_RTL8188F) ? KFREE_VER_8188F : \ -+ (dm->support_ic_type == ODM_RTL8197F) ? KFREE_VER_8197F : \ -+ (dm->support_ic_type == ODM_RTL8703B) ? KFREE_VER_8703B : \ -+ (dm->support_ic_type == ODM_RTL8710B) ? KFREE_VER_8710B : \ -+ (dm->support_ic_type == ODM_RTL8723D) ? KFREE_VER_8723D : \ -+ (dm->support_ic_type == ODM_RTL8822B) ? KFREE_VER_8822B : \ -+ (dm->support_ic_type == ODM_RTL8822C) ? KFREE_VER_8822C : \ -+ (dm->support_ic_type == ODM_RTL8821C) ? KFREE_VER_8821C : \ -+ (dm->support_ic_type == ODM_RTL8814B) ? KFREE_VER_8814B : \ -+ (dm->support_ic_type == ODM_RTL8197G) ? KFREE_VER_8197G : "unknown" -+ -+#define HALRF_TSSI_VER \ -+ (dm->support_ic_type == ODM_RTL8812F) ? TSSI_VER_8812F : \ -+ (dm->support_ic_type == ODM_RTL8822C) ? TSSI_VER_8822C : \ -+ (dm->support_ic_type == ODM_RTL8821C) ? TSSI_VER_8821C : \ -+ (dm->support_ic_type == ODM_RTL8814B) ? TSSI_VER_8814B : \ -+ (dm->support_ic_type == ODM_RTL8197G) ? TSSI_VER_8197G : "unknown" -+ -+#define HALRF_PABIASK_VER \ -+ (dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \ -+ (dm->support_ic_type == ODM_RTL8192E) ? PABIASK_VER_8192E : \ -+ (dm->support_ic_type == ODM_RTL8192F) ? PABIASK_VER_8192F : \ -+ (dm->support_ic_type == ODM_RTL8723B) ? PABIASK_VER_8723B : \ -+ (dm->support_ic_type == ODM_RTL8812) ? PABIASK_VER_8812A : \ -+ (dm->support_ic_type == ODM_RTL8821) ? PABIASK_VER_8821A : \ -+ (dm->support_ic_type == ODM_RTL8814A) ? PABIASK_VER_8814A : \ -+ (dm->support_ic_type == ODM_RTL8188F) ? PABIASK_VER_8188F : \ -+ (dm->support_ic_type == ODM_RTL8197F) ? PABIASK_VER_8197F : \ -+ (dm->support_ic_type == ODM_RTL8703B) ? PABIASK_VER_8703B : \ -+ (dm->support_ic_type == ODM_RTL8710B) ? PABIASK_VER_8710B : \ -+ (dm->support_ic_type == ODM_RTL8723D) ? PABIASK_VER_8723D : \ -+ (dm->support_ic_type == ODM_RTL8822B) ? PABIASK_VER_8822B : \ -+ (dm->support_ic_type == ODM_RTL8822C) ? PABIASK_VER_8822C : \ -+ (dm->support_ic_type == ODM_RTL8821C) ? PABIASK_VER_8821C : \ -+ (dm->support_ic_type == ODM_RTL8814B) ? PABIASK_VER_8814B : \ -+ (dm->support_ic_type == ODM_RTL8197G) ? PABIASK_VER_8197G : "unknown" -+ -+#define HALRF_RFK_INIT_VER \ -+ (dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : \ -+ (dm->support_ic_type == ODM_RTL8822C) ? RFK_INIT_VER_8822C : \ -+ (dm->support_ic_type == ODM_RTL8812F) ? RFK_INIT_VER_8812F : \ -+ (dm->support_ic_type == ODM_RTL8198F) ? RFK_INIT_VER_8198F : \ -+ (dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : \ -+ (dm->support_ic_type == ODM_RTL8197G) ? RFK_INIT_VER_8197G : "unknown" -+ -+#define HALRF_DACK_VER \ -+ (dm->support_ic_type == ODM_RTL8822C) ? DACK_VER_8822C : \ -+ (dm->support_ic_type == ODM_RTL8814B) ? DACK_VER_8814B : "unknown" -+ -+#define IQK_THRESHOLD 8 -+#define DPK_THRESHOLD 4 -+#define HALRF_ABS(a,b) ((a>b) ? (a-b) : (b-a)) -+#define SN 100 -+ -+#define CCK_TSSI_NUM 6 -+#define OFDM_2G_TSSI_NUM 5 -+#define OFDM_5G_TSSI_NUM 14 -+ -+ -+ -+/*@===========================================================*/ -+/*AGC RX High Power mode*/ -+/*@===========================================================*/ -+#define lna_low_gain_1 0x64 -+#define lna_low_gain_2 0x5A -+#define lna_low_gain_3 0x58 -+ -+/*@============================================================*/ -+/*@ enumeration */ -+/*@============================================================*/ -+ -+enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/ -+ RF00_PWR_TRK = 0, /*Pow_trk, TSSI_trk*/ -+ RF01_IQK = 1, /*LOK, IQK*/ -+ RF02_LCK = 2, -+ RF03_DPK = 3, -+ RF04_TXGAPK = 4, -+ RF05_DACK = 5, -+ RF06_DPK_TRK = 6, -+ RF07_2GBAND_SHIFT = 7, -+ RF08_RXDCK = 8, -+ RF09_RFK = 9 -+}; -+ -+enum halrf_ability { -+ HAL_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), -+ HAL_RF_IQK = BIT(RF01_IQK), -+ HAL_RF_LCK = BIT(RF02_LCK), -+ HAL_RF_DPK = BIT(RF03_DPK), -+ HAL_RF_TXGAPK = BIT(RF04_TXGAPK), -+ HAL_RF_DACK = BIT(RF05_DACK), -+ HAL_RF_DPK_TRACK = BIT(RF06_DPK_TRK), -+ HAL_2GBAND_SHIFT = BIT(RF07_2GBAND_SHIFT), -+ HAL_RF_RXDCK = BIT(RF08_RXDCK) -+}; -+ -+enum halrf_shift_band { -+ HAL_RF_2P4 = 0, -+ HAL_RF_2P3 = 1, -+ HAL_RF_2P5 = 2 -+}; -+ -+enum halrf_dbg_comp { -+ DBG_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), -+ DBG_RF_IQK = BIT(RF01_IQK), -+ DBG_RF_LCK = BIT(RF02_LCK), -+ DBG_RF_DPK = BIT(RF03_DPK), -+ DBG_RF_TXGAPK = BIT(RF04_TXGAPK), -+ DBG_RF_DACK = BIT(RF05_DACK), -+ DBG_RF_DPK_TRACK = BIT(RF06_DPK_TRK), -+ DBG_RF_RFK = BIT(RF09_RFK), -+ DBG_RF_MP = BIT(29), -+ DBG_RF_TMP = BIT(30), -+ DBG_RF_INIT = BIT(31) -+}; -+ -+enum halrf_cmninfo_init { -+ HALRF_CMNINFO_ABILITY = 0, -+ HALRF_CMNINFO_DPK_EN = 1, -+ HALRF_CMNINFO_EEPROM_THERMAL_VALUE, -+ HALRF_CMNINFO_RFK_FORBIDDEN, -+ HALRF_CMNINFO_IQK_SEGMENT, -+ HALRF_CMNINFO_RATE_INDEX, -+ HALRF_CMNINFO_PWT_TYPE, -+ HALRF_CMNINFO_MP_PSD_POINT, -+ HALRF_CMNINFO_MP_PSD_START_POINT, -+ HALRF_CMNINFO_MP_PSD_STOP_POINT, -+ HALRF_CMNINFO_MP_PSD_AVERAGE, -+ HALRF_CMNINFO_IQK_TIMES, -+ HALRF_CMNINFO_MP_POWER_TRACKING_TYPE, -+ HALRF_CMNINFO_POWER_TRACK_CONTROL -+}; -+ -+enum halrf_cmninfo_hook { -+ HALRF_CMNINFO_CON_TX, -+ HALRF_CMNINFO_SINGLE_TONE, -+ HALRF_CMNINFO_CARRIER_SUPPRESSION, -+ HALRF_CMNINFO_MP_RATE_INDEX, -+ HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY -+}; -+ -+enum halrf_lna_set { -+ HALRF_LNA_DISABLE = 0, -+ HALRF_LNA_ENABLE = 1, -+}; -+ -+enum halrf_k_segment_time { -+ SEGMENT_FREE = 0, -+ SEGMENT_10MS = 10, /*10ms*/ -+ SEGMENT_30MS = 30, /*30ms*/ -+ SEGMENT_50MS = 50, /*50ms*/ -+}; -+ -+#define POWER_INDEX_DIFF 4 -+#define TSSI_TXAGC_DIFF 2 -+ -+#define TSSI_CODE_NUM 84 -+ -+#define TSSI_SLOPE_2G 8 -+#define TSSI_SLOPE_5G 5 -+ -+#define TSSI_EFUSE_NUM 25 -+#define TSSI_EFUSE_KFREE_NUM 4 -+#define TSSI_DE_DIFF_EFUSE_NUM 10 -+ -+struct _halrf_tssi_data { -+ s32 cck_offset_patha; -+ s32 cck_offset_pathb; -+ s32 tssi_trk_txagc_offset[PHYDM_MAX_RF_PATH]; -+ s32 delta_tssi_txagc_offset[PHYDM_MAX_RF_PATH]; -+ s16 txagc_codeword[TSSI_CODE_NUM]; -+ u16 tssi_codeword[TSSI_CODE_NUM]; -+ s8 tssi_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_NUM]; -+ s8 tssi_de_diff_efuse[PHYDM_MAX_RF_PATH][TSSI_DE_DIFF_EFUSE_NUM]; -+ s8 tssi_kfree_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_KFREE_NUM]; -+ u8 thermal[PHYDM_MAX_RF_PATH]; -+ u32 index[PHYDM_MAX_RF_PATH][14]; -+ u8 do_tssi; -+ u8 get_thermal; -+ u8 tssi_finish_bit[PHYDM_MAX_RF_PATH]; -+ u8 thermal_trigger; -+}; -+ -+struct _halrf_txgapk_info { -+ u32 txgapk_rf3f_bp[5][12][PHYDM_MAX_RF_PATH]; /* band(2Gcck/2GOFDM/5GL/5GM/5GH)/idx/path */ -+ boolean txgapk_bp_done; -+ s8 offset[12][PHYDM_MAX_RF_PATH]; -+ s8 fianl_offset[12][PHYDM_MAX_RF_PATH]; -+ u8 read_txgain; -+}; -+ -+ -+/*@============================================================*/ -+/*@ structure */ -+/*@============================================================*/ -+ -+struct _hal_rf_ { -+ /*hook*/ -+ u8 *test1; -+ -+ /*update*/ -+ u32 rf_supportability; -+ u8 rf_shift_band; -+ /*u32 halrf_tssi_data;*/ -+ -+ u8 eeprom_thermal; -+ u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/ -+ boolean dpk_done; -+ u64 dpk_progressing_time; -+ u64 iqk_progressing_time; -+ u32 fw_ver; -+ -+ boolean *is_con_tx; -+ boolean *is_single_tone; -+ boolean *is_carrier_suppresion; -+ boolean is_dpk_in_progress; -+ boolean is_tssi_in_progress; -+ boolean is_bt_iqk_timeout; -+ boolean is_rfk_h2c_timeout; -+ boolean aac_checked; -+ boolean is_txgapk_in_progress; -+ -+ u8 *mp_rate_index; -+ u32 *manual_rf_supportability; -+ u32 p_rate_index; -+ u8 pwt_type; -+ u32 rf_dbg_comp; -+ -+ u8 ext_lna; /*@with 2G external LNA NO/Yes = 0/1*/ -+ u8 ext_lna_5g; /*@with 5G external LNA NO/Yes = 0/1*/ -+ u8 ext_pa; /*@with 2G external PNA NO/Yes = 0/1*/ -+ u8 ext_pa_5g; /*@with 5G external PNA NO/Yes = 0/1*/ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ struct _halrf_psd_data halrf_psd_data; -+ struct _halrf_tssi_data halrf_tssi_data; -+#endif -+ struct _halrf_txgapk_info halrf_txgapk_info; -+ u8 power_track_type; -+ u8 mp_pwt_type; -+ u8 pre_band_type; -+}; -+ -+/*@============================================================*/ -+/*@ function prototype */ -+/*@============================================================*/ -+ -+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ -+ RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ -+ RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ -+ RTL8197G_SUPPORT == 1) -+void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len); -+ -+void halrf_iqk_hwtx_check(void *dm_void, boolean is_check); -+#endif -+ -+u8 halrf_match_iqk_version(void *dm_void); -+ -+void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#ifdef CONFIG_2G_BAND_SHIFT -+void halrf_support_band_shift_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#endif -+void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info, -+ u32 value); -+ -+void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info, -+ void *value); -+ -+void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value); -+ -+u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info); -+ -+void halrf_watchdog(void *dm_void); -+ -+void halrf_supportability_init(void *dm_void); -+ -+void halrf_init(void *dm_void); -+ -+void halrf_iqk_trigger(void *dm_void, boolean is_recovery); -+ -+void halrf_rfk_handshake(void *dm_void, boolean is_before_k); -+ -+void halrf_rf_k_connect_trigger(void *dm_void, boolean is_recovery, -+ enum halrf_k_segment_time seg_time); -+ -+void halrf_segment_iqk_trigger(void *dm_void, boolean clear, -+ boolean segment_iqk); -+ -+void halrf_lck_trigger(void *dm_void); -+ -+void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used, -+ char *output, u32 *_out_len); -+ -+void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug); -+ -+void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type); -+ -+void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type); -+ -+void halrf_do_imr_test(void *dm_void, u8 data); -+ -+u32 halrf_psd_log2base(u32 val); -+ -+void halrf_dpk_trigger(void *dm_void); -+ -+void halrf_txgapk_trigger(void *dm_void); -+ -+u8 halrf_dpk_result_check(void *dm_void); -+ -+void halrf_dpk_sram_read(void *dm_void); -+ -+void halrf_dpk_enable_disable(void *dm_void); -+ -+void halrf_dpk_track(void *dm_void); -+ -+void halrf_dpk_reload(void *dm_void); -+ -+void halrf_dpk_switch(void *dm_void, u8 enable); -+ -+void halrf_dpk_debug_cmd(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void halrf_dpk_c2h_report_transfer(void *dm_void, boolean is_ok, u8 *buf, u8 buf_size); -+ -+void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); -+ -+/*Global function*/ -+ -+void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); -+ -+void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, -+ u8 ss); -+ -+void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); -+ -+void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss); -+ -+void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value); -+ -+boolean halrf_compare(void *dm_void, u32 value); -+ -+u32 halrf_delta(void *dm_void, u32 v1, u32 v2); -+ -+void halrf_minmax_compare(void *dm_void, u32 value, u32 *min, u32 *max); -+ -+void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv); -+ -+void halrf_bubble(void *dm_void, u32 *v1, u32 *v2); -+ -+void halrf_swap(void *dm_void, u32 *v1, u32 *v2); -+ -+enum hal_status -+halrf_config_rfk_with_header_file(void *dm_void, u32 config_type); -+ -+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ -+ RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ -+ RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ -+ RTL8197G_SUPPORT == 1) -+void halrf_iqk_dbg(void *dm_void); -+#endif -+ -+void halrf_tssi_get_efuse(void *dm_void); -+ -+void halrf_do_tssi(void *dm_void); -+ -+void halrf_set_tssi_enable(void *dm_void, boolean enable); -+ -+void halrf_do_thermal(void *dm_void); -+ -+u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value); -+ -+void halrf_set_tssi_power(void *dm_void, s8 power); -+ -+void halrf_tssi_set_de_for_tx_verify(void *dm_void, u32 tssi_de, u8 path); -+ -+u32 halrf_query_tssi_value(void *dm_void); -+ -+void halrf_tssi_cck(void *dm_void); -+ -+void halrf_thermal_cck(void *dm_void); -+ -+void halrf_tssi_set_de(void *dm_void); -+ -+void halrf_tssi_dck(void *dm_void, u8 direct_do); -+ -+void halrf_calculate_tssi_codeword(void *dm_void); -+ -+void halrf_set_tssi_codeword(void *dm_void); -+ -+u8 halrf_get_tssi_codeword_for_txindex(void *dm_void); -+ -+void halrf_tssi_clean_de(void *dm_void); -+ -+u32 halrf_tssi_trigger_de(void *dm_void, u8 path); -+ -+u32 halrf_tssi_get_de(void *dm_void, u8 path); -+ -+void halrf_tssi_trigger(void *dm_void); -+ -+void halrf_txgapk_write_gain_table(void *dm_void); -+ -+void halrf_txgapk_reload_tx_gain(void *dm_void); -+ -+void halrf_txgap_enable_disable(void *dm_void, u8 enable); -+ -+void halrf_set_dpk_track(void *dm_void, u8 enable); -+ -+void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch); -+ -+void halrf_set_dpkenable(void *dm_void, boolean is_dpk_enable); -+ -+boolean halrf_get_dpkbychannel(void *dm_void); -+ -+boolean halrf_get_dpkenable(void *dm_void); -+ -+void _iqk_check_if_reload(void *dm_void); -+ -+void halrf_do_rxbb_dck(void *dm_void); -+ -+void config_halrf_path_adda_setting_trigger(void *dm_void); -+ -+void halrf_reload_iqk(void *dm_void, boolean reset); -+ -+void halrf_dack_dbg(void *dm_void); -+ -+void halrf_dack_trigger(void *dm_void, boolean force); -+ -+void halrf_dack_restore(void *dm_void); -+ -+void halrf_iqk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); -+ -+void halrf_set_rfsupportability(void *dm_void); -+ -+void halrf_rxdck(void *dm_void); -+ -+void halrf_delay_10us(u16 v1); -+ -+void halrf_dump_rfk_reg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void halrf_rfk_power_save(void *dm_void, boolean is_power_save); -+ -+#endif /*__HALRF_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_debug.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_debug.c -new file mode 100644 -index 000000000000..692c6f1fc764 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_debug.c -@@ -0,0 +1,395 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ * ************************************************************ -+ */ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+void halrf_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 rf_release_ver = 0; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8814A_SUPPORT) -+ case ODM_RTL8814A: -+ rf_release_ver = RF_RELEASE_VERSION_8814A; -+ break; -+#endif -+ -+#if (RTL8821C_SUPPORT) -+ case ODM_RTL8821C: -+ rf_release_ver = RF_RELEASE_VERSION_8821C; -+ break; -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ case ODM_RTL8822B: -+ rf_release_ver = RF_RELEASE_VERSION_8822B; -+ break; -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ case ODM_RTL8822C: -+ rf_release_ver = RF_RELEASE_VERSION_8822C; -+ break; -+#endif -+ -+#if (RTL8814B_SUPPORT) -+ case ODM_RTL8814B: -+ rf_release_ver = RF_RELEASE_VERSION_8814B; -+ break; -+#endif -+ -+#if (RTL8812F_SUPPORT) -+ case ODM_RTL8812F: -+ rf_release_ver = RF_RELEASE_VERSION_8812F; -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT) -+ case ODM_RTL8198F: -+ rf_release_ver = RF_RELEASE_VERSION_8198F; -+ break; -+#endif -+ -+#if (RTL8197F_SUPPORT) -+ case ODM_RTL8197F: -+ rf_release_ver = RF_RELEASE_VERSION_8197F; -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ case ODM_RTL8192F: -+ rf_release_ver = RF_RELEASE_VERSION_8192F; -+ break; -+#endif -+ -+#if (RTL8710B_SUPPORT) -+ case ODM_RTL8710B: -+ rf_release_ver = RF_RELEASE_VERSION_8710B; -+ break; -+#endif -+ -+#if (RTL8195B_SUPPORT) -+ case ODM_RTL8195B: -+ rf_release_ver = RF_RELEASE_VERSION_8195B; -+ break; -+#endif -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n", -+ "RF Para Release Ver", rf_release_ver); -+ -+ /* HAL RF version List */ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n", -+ "% HAL RF version %"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "Power Tracking", HALRF_POWRTRACKING_VER); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-35s: %s %s\n", "IQK", -+ (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW" : -+ HALRF_IQK_VER, -+ (halrf_match_iqk_version(dm_void)) ? "(match)" : "(mismatch)"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "LCK", HALRF_LCK_VER); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "DPK", HALRF_DPK_VER); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "TSSI", HALRF_TSSI_VER); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "KFREE", HALRF_KFREE_VER); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "TX 2G Current Calibration", HALRF_PABIASK_VER); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "RFK Init. Parameter", HALRF_RFK_INIT_VER); -+ -+ *_used = used; -+ *_out_len = out_len; -+#endif -+} -+ -+void halrf_debug_trace(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ u32 one = 1; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 rf_var[10] = {0}; -+ u8 i; -+ -+ for (i = 0; i < 5; i++) -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &rf_var[i]); -+ -+ if (rf_var[0] == 100) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n[DBG MSG] RF Selection\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "00. (( %s ))TX_PWR_TRACK\n", -+ ((rf->rf_dbg_comp & DBG_RF_TX_PWR_TRACK) ? ("V") : -+ ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "01. (( %s ))IQK\n", -+ ((rf->rf_dbg_comp & DBG_RF_IQK) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "02. (( %s ))LCK\n", -+ ((rf->rf_dbg_comp & DBG_RF_LCK) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "03. (( %s ))DPK\n", -+ ((rf->rf_dbg_comp & DBG_RF_DPK) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "04. (( %s ))TXGAPK\n", -+ ((rf->rf_dbg_comp & DBG_RF_TXGAPK) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "06. (( %s ))DPK_TRACK\n", -+ ((rf->rf_dbg_comp & DBG_RF_DPK_TRACK) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "29. (( %s ))MP\n", -+ ((rf->rf_dbg_comp & DBG_RF_MP) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "30. (( %s ))TMP\n", -+ ((rf->rf_dbg_comp & DBG_RF_TMP) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "31. (( %s ))INIT\n", -+ ((rf->rf_dbg_comp & DBG_RF_INIT) ? ("V") : ("."))); -+ -+ } else if (rf_var[0] == 101) { -+ rf->rf_dbg_comp = 0; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Disable all DBG COMP\n"); -+ } else { -+ if (rf_var[1] == 1) /*enable*/ -+ rf->rf_dbg_comp |= (one << rf_var[0]); -+ else if (rf_var[1] == 2) /*disable*/ -+ rf->rf_dbg_comp &= ~(one << rf_var[0]); -+ } -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\nCurr-RF_Dbg_Comp = 0x%x\n", rf->rf_dbg_comp); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void halrf_dack_debug_cmd(void *dm_void, char input[][16]) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ u32 dm_value[10] = {0}; -+ u8 i; -+ -+ for (i = 0; i < 7; i++) -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &dm_value[i]); -+ -+ if (dm_value[0] == 1) -+ halrf_dack_trigger(dm, true); -+ else -+ halrf_dack_trigger(dm, false); -+} -+ -+struct halrf_command { -+ char name[16]; -+ u8 id; -+}; -+ -+enum halrf_CMD_ID { -+ HALRF_HELP, -+ HALRF_SUPPORTABILITY, -+ HALRF_DBG_COMP, -+ HALRF_PROFILE, -+ HALRF_IQK_INFO, -+ HALRF_IQK, -+ HALRF_IQK_DEBUG, -+ HALRF_DPK, -+ HALRF_DACK, -+ HALRF_DACK_DEBUG, -+ HALRF_DUMP_RFK_REG, -+#ifdef CONFIG_2G_BAND_SHIFT -+ HAL_BAND_SHIFT, -+#endif -+}; -+ -+struct halrf_command halrf_cmd_ary[] = { -+ {"-h", HALRF_HELP}, -+ {"ability", HALRF_SUPPORTABILITY}, -+ {"dbg", HALRF_DBG_COMP}, -+ {"profile", HALRF_PROFILE}, -+ {"iqk_info", HALRF_IQK_INFO}, -+ {"iqk", HALRF_IQK}, -+ {"iqk_dbg", HALRF_IQK_DEBUG}, -+ {"dpk", HALRF_DPK}, -+ {"dack", HALRF_DACK}, -+ {"dack_dbg", HALRF_DACK_DEBUG}, -+ {"dump_rfk_reg", HALRF_DUMP_RFK_REG}, -+#ifdef CONFIG_2G_BAND_SHIFT -+ {"band_shift", HAL_BAND_SHIFT}, -+#endif -+}; -+ -+void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len, u32 input_num) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+ u8 id = 0; -+ u32 rf_var[10] = {0}; -+ u32 i, input_idx = 0; -+ u32 halrf_ary_size = -+ sizeof(halrf_cmd_ary) / sizeof(struct halrf_command); -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ /* Parsing Cmd ID */ -+ for (i = 0; i < halrf_ary_size; i++) { -+ if (strcmp(halrf_cmd_ary[i].name, input[1]) == 0) { -+ id = halrf_cmd_ary[i].id; -+ break; -+ } -+ } -+ -+ if (i == halrf_ary_size) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "RF Cmd not found\n"); -+ return; -+ } -+ -+ switch (id) { -+ case HALRF_HELP: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "RF cmd ==>\n"); -+ -+ for (i = 0; i < halrf_ary_size - 1; i++) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-5d: %s\n", i, halrf_cmd_ary[i + 1].name); -+ } -+ break; -+ case HALRF_SUPPORTABILITY: -+ halrf_support_ability_debug(dm, &input[0], &used, output, -+ &out_len); -+ break; -+#ifdef CONFIG_2G_BAND_SHIFT -+ case HAL_BAND_SHIFT: -+ halrf_support_band_shift_debug(dm, &input[0], &used, output, -+ &out_len); -+ break; -+#endif -+ case HALRF_DBG_COMP: -+ halrf_debug_trace(dm, &input[0], &used, output, &out_len); -+ break; -+ case HALRF_PROFILE: -+ halrf_basic_profile(dm, &used, output, &out_len); -+ break; -+ case HALRF_IQK_INFO: -+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) -+ halrf_iqk_info_dump(dm, &used, output, &out_len); -+#endif -+ break; -+ case HALRF_IQK: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "TRX IQK Trigger\n"); -+ halrf_iqk_trigger(dm, false); -+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1) -+ halrf_iqk_info_dump(dm, &used, output, &out_len); -+#endif -+ break; -+ case HALRF_IQK_DEBUG: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "IQK DEBUG!!!!!\n"); -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 2], DCMD_HEX, -+ &rf_var[i]); -+ input_idx++; -+ } -+ } -+ -+ if (input_idx >= 1) { -+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8822C | ODM_RTL8814B)) -+ halrf_iqk_debug(dm, (u32 *)rf_var, &used, -+ output, &out_len); -+#endif -+ } -+ break; -+ case HALRF_DPK: -+ halrf_dpk_debug_cmd(dm, input, &used, output, &out_len); -+ break; -+ case HALRF_DACK: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DACK Trigger\n"); -+ halrf_dack_debug_cmd(dm, &input[0]); -+ break; -+ case HALRF_DACK_DEBUG: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DACK DEBUG\n"); -+ halrf_dack_dbg(dm); -+ break; -+ case HALRF_DUMP_RFK_REG: -+ halrf_dump_rfk_reg(dm, input, &used, output, &out_len); -+ break; -+ default: -+ break; -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+#endif -+} -+ -+void halrf_init_debug_setting(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ rf->rf_dbg_comp = -+ -+ DBG_RF_RFK | -+#if DBG -+#if 0 -+ /*DBG_RF_TX_PWR_TRACK | */ -+ /*DBG_RF_IQK | */ -+ /*DBG_RF_LCK | */ -+ /*DBG_RF_DPK | */ -+ /*DBG_RF_TXGAPK | */ -+ /*DBG_RF_DACK | */ -+ /*DBG_RF_DPK_TRACK | */ -+ /*DBG_RF_MP | */ -+ /*DBG_RF_TMP | */ -+ /*DBG_RF_INIT | */ -+#endif -+#endif -+ 0; -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_debug.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_debug.h -new file mode 100644 -index 000000000000..c13f3c5677f2 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_debug.h -@@ -0,0 +1,140 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_DEBUG_H__ -+#define __HALRF_DEBUG_H__ -+ -+/*@============================================================*/ -+/*@include files*/ -+/*@============================================================*/ -+ -+/*@============================================================*/ -+/*@Definition */ -+/*@============================================================*/ -+ -+#if DBG -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+#define RF_DBG(dm, comp, fmt, args...) \ -+ do { \ -+ if ((comp) & dm->rf_table.rf_dbg_comp) { \ -+ pr_debug("[RF] "); \ -+ RT_PRINTK(fmt, ##args); \ -+ } \ -+ } while (0) -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+static __inline void RF_DBG(PDM_ODM_T dm, int comp, char *fmt, ...) -+{ -+ RT_STATUS rt_status; -+ va_list args; -+ char buf[PRINT_MAX_SIZE] = {0}; -+ -+ if ((comp & dm->rf_table.rf_dbg_comp) == 0) -+ return; -+ -+ if (fmt == NULL) -+ return; -+ -+ va_start(args, fmt); -+ rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args); -+ va_end(args); -+ -+ if (rt_status != RT_STATUS_SUCCESS) { -+ DbgPrint("Failed (%d) to print message to buffer\n", rt_status); -+ return; -+ } -+ -+ DbgPrint("[RF] %s", buf); -+} -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ -+#define RF_DBG(dm, comp, fmt, args...) \ -+ do { \ -+ if ((comp) & dm->rf_table.rf_dbg_comp) { \ -+ RT_DEBUG(COMP_PHYDM, DBG_DMESG, "[RF] " fmt, ##args); \ -+ } \ -+ } while (0) -+ -+#else -+#define RF_DBG(dm, comp, fmt, args...) \ -+ do { \ -+ struct dm_struct *__dm = dm; \ -+ if ((comp) & __dm->rf_table.rf_dbg_comp) { \ -+ RT_TRACE(((struct rtl_priv *)__dm->adapter), \ -+ COMP_PHYDM, DBG_DMESG, "[RF] " fmt, ##args); \ -+ } \ -+ } while (0) -+#endif -+ -+#else /*#if DBG*/ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+static __inline void RF_DBG(struct dm_struct *dm, int comp, char *fmt, ...) -+{ -+#if 0 -+ RT_STATUS rt_status; -+ va_list args; -+ char buf[128] = {0};/*PRINT_MAX_SIZE*/ -+ -+ if ((comp & dm->rf_table.rf_dbg_comp) == 0) -+ return; -+ -+ if (NULL != fmt) { -+ va_start(args, fmt); -+ rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, sizeof(buf), fmt, args); -+ va_end(args); -+ if (rt_status == RT_STATUS_SUCCESS) { -+ halrf_rt_trace(buf); -+ } -+ } -+#endif -+} -+#else -+#define RF_DBG(dm, comp, fmt, args...) -+#endif -+ -+#endif /*#if DBG*/ -+ -+/*@============================================================*/ -+/*@ enumeration */ -+/*@============================================================*/ -+ -+/*@============================================================*/ -+/*@ structure */ -+/*@============================================================*/ -+ -+/*@============================================================*/ -+/*@ function prototype */ -+/*@============================================================*/ -+ -+void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len, u32 input_num); -+ -+void halrf_init_debug_setting(void *dm_void); -+ -+#endif /*__HALRF_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_dpk.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_dpk.h -new file mode 100644 -index 000000000000..44e15ab3ac13 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_dpk.h -@@ -0,0 +1,150 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_DPK_H__ -+#define __HALRF_DPK_H__ -+ -+/*@--------------------------Define Parameters-------------------------------*/ -+#define GAIN_LOSS 1 -+#define DO_DPK 2 -+#define DPK_ON 3 -+#define GAIN_LOSS_PULSE 4 -+#define DPK_PAS 5 -+#define DPK_LMS 6 -+#define DPK_LOK 4 -+#define DPK_TXK 5 -+#define DAGC 4 -+#define LOSS_CHK 0 -+#define GAIN_CHK 1 -+#define PAS_READ 2 -+#define AVG_THERMAL_NUM 8 -+#define AVG_THERMAL_NUM_DPK 8 -+#define THERMAL_DPK_AVG_NUM 4 -+ -+/*define RF path numer*/ -+#if (RTL8198F_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+#define KPATH 4 -+#elif (RTL8192F_SUPPORT == 1 || RTL8197F_SUPPORT == 1 ||RTL8197G_SUPPORT == 1 ||\ -+ RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1) -+#define KPATH 2 -+#else -+#define KPATH 1 -+#endif -+ -+#if (RTL8814B_SUPPORT == 1 || RTL8721D_SUPPORT == 1) -+#define GROUP_5G 6 -+#elif (RTL8195B_SUPPORT == 1) -+#define GROUP_5G 13 -+#endif -+ -+/*@---------------------------End Define Parameters---------------------------*/ -+ -+struct dm_dpk_info { -+ -+ boolean is_dpk_enable; -+ boolean is_dpk_pwr_on; -+ boolean is_dpk_by_channel; -+ boolean is_tssi_mode; -+ u8 dpk_status; /*bit[0]:reload;bit[1]:cal;bit[2]:cal_ok*/ -+ u16 dpk_path_ok; -+ /*@BIT(15)~BIT(12) : 5G reserved, BIT(11)~BIT(8) 5G_S3~5G_S0*/ -+ /*@BIT(7)~BIT(4) : 2G reserved, BIT(3)~BIT(0) 2G_S3~2G_S0*/ -+ u8 thermal_dpk[KPATH]; /*path*/ -+ u8 thermal_dpk_avg[KPATH][AVG_THERMAL_NUM_DPK]; /*path*/ -+ u8 pre_pwsf[KPATH]; -+ u8 thermal_dpk_avg_index; -+ u32 gnt_control; -+ u32 gnt_value; -+ u8 dpk_ch; -+ u8 dpk_band; -+ u8 dpk_bw; -+ u32 dpk_rf18[2]; -+ u32 dpk_cal_cnt; -+ u32 dpk_ok_cnt; -+ u32 dpk_reload_cnt; -+ -+#if (RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1) -+ u16 dc_i[2]; /*MDPD DC I path*/ -+ u16 dc_q[2]; /*MDPD DC Q path*/ -+ u8 corr_val[2]; /*Corr value path*/ -+ u8 corr_idx[2]; /*Corr index path*/ -+#endif -+ -+#if (RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1) -+ u8 result[2]; /*path*/ -+ u8 dpk_txagc[2]; /*path*/ -+ u32 coef[2][20]; /*path/MDPD coefficient*/ -+ u16 dpk_gs[2]; /*MDPD coef gs*/ -+ u8 thermal_dpk_delta[2]; /*path*/ -+#endif -+ -+#if (RTL8198F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8197F_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8197G_SUPPORT == 1) -+ /*2G DPK data*/ -+ u8 dpk_result[KPATH][3]; /*path/group*/ -+ u8 pwsf_2g[KPATH][3]; /*path/group*/ -+ u32 lut_2g_even[KPATH][3][64]; /*path/group/LUT data*/ -+ u32 lut_2g_odd[KPATH][3][64]; /*path/group/LUT data*/ -+ s16 tmp_pas_i[32]; /*PAScan I data*/ -+ s16 tmp_pas_q[32]; /*PAScan Q data*/ -+#endif -+ -+#if (RTL8814B_SUPPORT == 1) -+ /*5G DPK data*/ -+ u8 dpk_5g_result[KPATH][GROUP_5G]; /*path/group*/ -+ u8 pwsf_5g[KPATH][GROUP_5G]; /*path/group*/ -+ u32 lut_5g[KPATH][GROUP_5G][64]; /*path/group/LUT data*/ -+ u32 lut_2g[KPATH][3][64]; /*path/group/LUT data*/ -+ u8 rxbb[4]; /*path/group*/ -+ u8 txbb[4]; /*path/group*/ -+ u8 tx_gain; -+#endif -+ -+#if (RTL8195B_SUPPORT == 1 || RTL8721D_SUPPORT == 1) -+ u8 dpk_txagc; -+ /*2G DPK data*/ -+ u8 dpk_2g_result[KPATH][3]; /*path/group*/ -+ u8 pwsf_2g[KPATH][3]; /*path/group*/ -+ u32 lut_2g_even[KPATH][3][16]; /*path/group/LUT data*/ -+ u32 lut_2g_odd[KPATH][3][16]; /*path/group/LUT data*/ -+ /*5G DPK data*/ -+ u8 dpk_5g_result[KPATH][GROUP_5G]; /*path/group*/ -+ u8 pwsf_5g[KPATH][GROUP_5G]; /*path/group*/ -+ u32 lut_5g_even[KPATH][GROUP_5G][16]; /*path/group/LUT data*/ -+ u32 lut_5g_odd[KPATH][GROUP_5G][16]; /*path/group/LUT data*/ -+#endif -+}; -+ -+#if (RTL8822C_SUPPORT == 1) -+struct dm_dpk_c2h_report { -+ u8 result[2]; /*ch0_result/ch1_result*/ -+ u8 therm[2][2]; /*therm0_s0/therm0_s1/therm1_s0/therm1_s1*/ -+ u8 therm_delta[2][2]; /*therm_delta0_s0/therm_delta0_s1/therm_delta1_s0/therm_delta1_s1*/ -+ u32 dpk_rf18[2]; /*dpk_ch0/dpk_ch1*/ -+ u8 dpk_status; /*dpk_status*/ -+}; -+#endif -+ -+#endif /*__HALRF_DPK_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_features.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_features.h -new file mode 100644 -index 000000000000..da97614be1e9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_features.h -@@ -0,0 +1,43 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_FEATURES_H__ -+#define __HALRF_FEATURES_H__ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+#define CONFIG_HALRF_POWERTRACKING 1 -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+#define CONFIG_HALRF_POWERTRACKING 1 -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+#define CONFIG_HALRF_POWERTRACKING 1 -+ -+#endif -+ -+#endif /*#ifndef __HALRF_FEATURES_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_iqk.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_iqk.h -new file mode 100644 -index 000000000000..eb6579ed2cdc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_iqk.h -@@ -0,0 +1,151 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_IQK_H__ -+#define __HALRF_IQK_H__ -+ -+/*@--------------------------Define Parameters-------------------------------*/ -+#define LOK_delay 1 -+#define WBIQK_delay 10 -+#define TX_IQK 0 -+#define RX_IQK 1 -+#define TXIQK 0 -+#define RXIQK1 1 -+#define RXIQK2 2 -+#define kcount_limit_80m 2 -+#define kcount_limit_others 4 -+#define rxiqk_gs_limit 6 -+#define TXWBIQK_EN 1 -+#define RXWBIQK_EN 1 -+#if (RTL8814A_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT) -+#define NUM 4 -+#elif (RTL8822B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ -+ RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1) -+#define NUM 2 -+#else -+#define NUM 1 -+#endif -+ -+/*@-----------------------End Define Parameters-----------------------*/ -+ -+struct dm_dack_info { -+ boolean dack_en; -+ u16 msbk_d[2][2][15]; -+ u8 dck_d[2][2][2]; -+ u16 biask_d[2][2]; -+}; -+ -+struct dm_iqk_info { -+ boolean lok_fail[NUM]; -+ boolean iqk_fail[2][NUM]; -+ u32 iqc_matrix[2][NUM]; -+ u8 iqk_times; -+ u32 rf_reg18; -+ u32 rf_reg08; -+ u32 lna_idx; -+ u8 iqk_step; -+ u8 rxiqk_step; -+ u8 tmp1bcc; -+ u8 txgain; -+ u32 txgain56; -+ u8 kcount; -+ u8 rfk_ing; /*bit0:IQKing, bit1:LCKing, bit2:DPKing*/ -+ boolean rfk_forbidden; -+ u8 rxbb; -+ u32 rf_reg58; -+ boolean segment_iqk; -+ boolean is_tssi_mode; -+ u8 iqk_band; -+ u8 iqk_ch; -+ u8 iqk_bw; -+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ -+ RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ -+ RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ||\ -+ RTL8710C_SUPPORT == 1 || RTL8723F_SUPPORT == 1) -+ u32 iqk_channel[2]; -+ boolean iqk_fail_report[2][NUM][2]; /*channel/path/TRX(TX:0, RX:1) */ -+ /*channel / path / TRX(TX:0, RX:1) / CFIR_real*/ -+ /*channel index = 2 is just for debug*/ -+#if (RTL8814B_SUPPORT == 1) -+ u16 iqk_cfir_real[3][NUM][2][19]; -+ u16 iqk_cfir_imag[3][NUM][2][19]; -+#elif (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ) -+ u16 iqk_cfir_real[3][2][2][17]; -+ /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ -+ /*channel index = 2 is just for debug*/ -+ u16 iqk_cfir_imag[3][2][2][17]; -+ /*times/path*/ -+#elif (RTL8195B_SUPPORT == 1) -+ u32 iqk_cfir_real[3][NUM][2][9]; -+ u32 iqk_cfir_imag[3][NUM][2][9]; -+ /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ -+ /*channel index = 2 is just for debug*/ -+#else -+ u32 iqk_cfir_real[3][NUM][2][8]; -+ /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ -+ /*channel index = 2 is just for debug*/ -+ u32 iqk_cfir_imag[3][NUM][2][8]; -+#endif -+ -+#if (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ) -+ u32 rx_cfir_real[2][2][17]; -+ u32 rx_cfir_imag[2][2][17]; -+ u32 rx_cfir[2][2]; -+#endif -+ u8 retry_count[2][NUM][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */ -+ u8 gs_retry_count[2][NUM][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */ -+ /* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */ -+ u8 rxiqk_fail_code[2][NUM]; -+ u32 lok_idac[2][NUM]; /*channel / path*/ -+ u16 rxiqk_agc[2][NUM]; /*channel / path*/ -+ u32 bypass_iqk[2][NUM]; /*channel / 0xc94/0xe94*/ -+ u32 txgap_result[8]; /*txagpK result */ -+ u32 tmp_gntwl; -+ boolean is_btg; -+ boolean isbnd; -+ boolean is_reload; -+ boolean is_hwtx; -+ boolean xym_read; -+ boolean trximr_enable; -+#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) -+ u32 rx_xym[2][10]; -+ u32 tx_xym[2][10]; -+ u32 gs1_xym[2][6]; -+ u32 gs2_xym[2][6]; -+ u32 rxk1_xym[2][6]; -+ u32 nbtxk_1b38[2]; -+ u32 nbrxk_1b3c[2]; -+#endif -+#if (RTL8710C_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ) -+ u32 txxy[2][2]; -+ u32 rxxy[2][2]; -+#endif -+#endif -+}; -+ -+#endif /*__HALRF_IQK_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_kfree.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_kfree.c -new file mode 100644 -index 000000000000..bb18026466d5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_kfree.c -@@ -0,0 +1,3705 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@============================================================*/ -+/*@include files*/ -+/*@============================================================*/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+/*@ Add for KFree Feature Requested by RF David.*/ -+/*@This is a phydm API*/ -+ -+void phydm_set_kfree_to_rf_8814a(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ boolean is_odd; -+ u32 tx_gain_bitmask = (BIT(17) | BIT(16) | BIT(15)); -+ -+ if ((data % 2) != 0) { /*odd->positive*/ -+ data = data - 1; -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), 1); -+ is_odd = true; -+ } else { /*even->negative*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), 0); -+ is_odd = false; -+ } -+ RF_DBG(dm, DBG_RF_MP, "phy_ConfigKFree8814A(): RF_0x55[19]= %d\n", -+ is_odd); -+ switch (data) { -+ case 0: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 0); -+ cali_info->kfree_offset[e_rf_path] = 0; -+ break; -+ case 2: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 0); -+ cali_info->kfree_offset[e_rf_path] = 0; -+ break; -+ case 4: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 1); -+ cali_info->kfree_offset[e_rf_path] = 1; -+ break; -+ case 6: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 1); -+ cali_info->kfree_offset[e_rf_path] = 1; -+ break; -+ case 8: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 2); -+ cali_info->kfree_offset[e_rf_path] = 2; -+ break; -+ case 10: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 2); -+ cali_info->kfree_offset[e_rf_path] = 2; -+ break; -+ case 12: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 3); -+ cali_info->kfree_offset[e_rf_path] = 3; -+ break; -+ case 14: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 3); -+ cali_info->kfree_offset[e_rf_path] = 3; -+ break; -+ case 16: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 4); -+ cali_info->kfree_offset[e_rf_path] = 4; -+ break; -+ case 18: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 4); -+ cali_info->kfree_offset[e_rf_path] = 4; -+ break; -+ case 20: -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(14), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, tx_gain_bitmask, 5); -+ cali_info->kfree_offset[e_rf_path] = 5; -+ break; -+ -+ default: -+ break; -+ } -+ -+ if (!is_odd) { -+ /*that means Kfree offset is negative, we need to record it.*/ -+ cali_info->kfree_offset[e_rf_path] = -+ (-1) * cali_info->kfree_offset[e_rf_path]; -+ RF_DBG(dm, DBG_RF_MP, -+ "phy_ConfigKFree8814A(): kfree_offset = %d\n", -+ cali_info->kfree_offset[e_rf_path]); -+ } else { -+ RF_DBG(dm, DBG_RF_MP, -+ "phy_ConfigKFree8814A(): kfree_offset = %d\n", -+ cali_info->kfree_offset[e_rf_path]); -+ } -+} -+ -+void phydm_get_thermal_trim_offset_8821c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0xff; -+ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_21C, &pg_therm, false); -+ -+ if (pg_therm != 0xff) { -+ pg_therm = pg_therm & 0x1f; -+ if ((pg_therm & BIT(0)) == 0) -+ power_trim_info->thermal = (-1 * (pg_therm >> 1)); -+ else -+ power_trim_info->thermal = (pg_therm >> 1); -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8821c thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8821c thermal:%d\n", -+ power_trim_info->thermal); -+} -+ -+void phydm_get_power_trim_offset_8821c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_power = 0xff, i; -+ -+ odm_efuse_one_byte_read(dm, PPG_2G_TXAB_21C, &pg_power, false); -+ -+ if (pg_power != 0xff) { -+ power_trim_info->bb_gain[0][0] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_21C, &pg_power, false); -+ power_trim_info->bb_gain[1][0] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_21C, &pg_power, false); -+ power_trim_info->bb_gain[2][0] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_21C, &pg_power, false); -+ power_trim_info->bb_gain[3][0] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_21C, &pg_power, false); -+ power_trim_info->bb_gain[4][0] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_21C, &pg_power, false); -+ power_trim_info->bb_gain[5][0] = pg_power; -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | -+ KFREE_FLAG_ON_2G | KFREE_FLAG_ON_5G; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8821c power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8821c pwr_trim->bb_gain[%d][0]=0x%X\n", -+ i, power_trim_info->bb_gain[i][0]); -+ } -+} -+ -+void phydm_set_kfree_to_rf_8821c(void *dm_void, u8 e_rf_path, boolean wlg_btg, -+ u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 wlg, btg; -+ u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)); -+ u32 s_gain_bmask = (BIT(19) | BIT(18) | BIT(17) | -+ BIT(16) | BIT(15) | BIT(14)); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(5), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(6), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(6), 1); -+ -+ if (wlg_btg) { -+ wlg = data & 0xf; -+ btg = (data & 0xf0) >> 4; -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (wlg & BIT(0))); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, (wlg >> 1)); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(19), (btg & BIT(0))); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x65, gain_bmask, (btg >> 1)); -+ } else { -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), data & BIT(0)); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, -+ ((data & 0x1f) >> 1)); -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n", -+ odm_get_rf_reg(dm, e_rf_path, RF_0x55, s_gain_bmask), -+ odm_get_rf_reg(dm, e_rf_path, RF_0x65, s_gain_bmask)); -+} -+ -+void phydm_clear_kfree_to_rf_8821c(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)); -+ u32 s_gain_bmask = (BIT(19) | BIT(18) | BIT(17) | -+ BIT(16) | BIT(15) | BIT(14)); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(5), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(6), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(6), 1); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, (data >> 1)); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(19), (data & BIT(0))); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x65, gain_bmask, (data >> 1)); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(5), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(6), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x65, BIT(6), 0); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n", -+ odm_get_rf_reg(dm, e_rf_path, RF_0x55, s_gain_bmask), -+ odm_get_rf_reg(dm, e_rf_path, RF_0x65, s_gain_bmask)); -+} -+ -+void phydm_get_thermal_trim_offset_8822b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0xff; -+ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_22B, &pg_therm, false); -+ -+ if (pg_therm != 0xff) { -+ pg_therm = pg_therm & 0x1f; -+ if ((pg_therm & BIT(0)) == 0) -+ power_trim_info->thermal = (-1 * (pg_therm >> 1)); -+ else -+ power_trim_info->thermal = (pg_therm >> 1); -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b thermal:%d\n", -+ power_trim_info->thermal); -+} -+ -+void phydm_get_power_trim_offset_8822b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_power = 0xff, i, j; -+ -+ odm_efuse_one_byte_read(dm, PPG_2G_TXAB_22B, &pg_power, false); -+ -+ if (pg_power != 0xff) { -+ /*Path A*/ -+ odm_efuse_one_byte_read(dm, PPG_2G_TXAB_22B, &pg_power, false); -+ power_trim_info->bb_gain[0][0] = (pg_power & 0xf); -+ -+ /*Path B*/ -+ odm_efuse_one_byte_read(dm, PPG_2G_TXAB_22B, &pg_power, false); -+ power_trim_info->bb_gain[0][1] = ((pg_power & 0xf0) >> 4); -+ -+ power_trim_info->flag |= KFREE_FLAG_ON_2G; -+ power_trim_info->flag |= KFREE_FLAG_ON; -+ } -+ -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22B, &pg_power, false); -+ -+ if (pg_power != 0xff) { -+ /*Path A*/ -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22B, &pg_power, false); -+ power_trim_info->bb_gain[1][0] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_22B, &pg_power, false); -+ power_trim_info->bb_gain[2][0] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_22B, &pg_power, false); -+ power_trim_info->bb_gain[3][0] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_22B, &pg_power, false); -+ power_trim_info->bb_gain[4][0] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_22B, &pg_power, false); -+ power_trim_info->bb_gain[5][0] = pg_power; -+ -+ /*Path B*/ -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXB_22B, &pg_power, false); -+ power_trim_info->bb_gain[1][1] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXB_22B, &pg_power, false); -+ power_trim_info->bb_gain[2][1] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXB_22B, &pg_power, false); -+ power_trim_info->bb_gain[3][1] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXB_22B, &pg_power, false); -+ power_trim_info->bb_gain[4][1] = pg_power; -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXB_22B, &pg_power, false); -+ power_trim_info->bb_gain[5][1] = pg_power; -+ -+ power_trim_info->flag |= KFREE_FLAG_ON_5G; -+ power_trim_info->flag |= KFREE_FLAG_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (!(power_trim_info->flag & KFREE_FLAG_ON)) -+ return; -+ -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < 2; j++) -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8822b PwrTrim->bb_gain[%d][%d]=0x%X\n", -+ i, j, power_trim_info->bb_gain[i][j]); -+ } -+} -+ -+void phydm_set_pa_bias_to_rf_8822b(void *dm_void, u8 e_rf_path, s8 tx_pa_bias) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 rf_reg_51 = 0, rf_reg_52 = 0, rf_reg_3f = 0; -+ u32 tx_pa_bias_bmask = (BIT(12) | BIT(11) | BIT(10) | BIT(9)); -+ -+ rf_reg_51 = odm_get_rf_reg(dm, e_rf_path, RF_0x51, RFREGOFFSETMASK); -+ rf_reg_52 = odm_get_rf_reg(dm, e_rf_path, RF_0x52, RFREGOFFSETMASK); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8822b 2g rf(0x51)=0x%X rf(0x52)=0x%X path=%d\n", -+ rf_reg_51, rf_reg_52, e_rf_path); -+ -+#if 0 -+ /*rf3f => rf52[19:17] = rf3f[2:0] rf52[16:15] = rf3f[4:3] rf52[3:0] = rf3f[8:5]*/ -+ /*rf3f => rf51[6:3] = rf3f[12:9] rf52[13] = rf3f[13]*/ -+#endif -+ rf_reg_3f = ((rf_reg_52 & 0xe0000) >> 17) | -+ (((rf_reg_52 & 0x18000) >> 15) << 3) | -+ ((rf_reg_52 & 0xf) << 5) | -+ (((rf_reg_51 & 0x78) >> 3) << 9) | -+ (((rf_reg_52 & 0x2000) >> 13) << 13); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8822b 2g original pa_bias=%d rf_reg_3f=0x%X path=%d\n", -+ tx_pa_bias, rf_reg_3f, e_rf_path); -+ -+ tx_pa_bias = (s8)((rf_reg_3f & tx_pa_bias_bmask) >> 9) + tx_pa_bias; -+ -+ if (tx_pa_bias < 0) -+ tx_pa_bias = 0; -+ else if (tx_pa_bias > 7) -+ tx_pa_bias = 7; -+ -+ rf_reg_3f = ((rf_reg_3f & 0xfe1ff) | (tx_pa_bias << 9)); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8822b 2g 0x%X 0x%X pa_bias=%d rfreg_3f=0x%X path=%d\n", -+ PPG_PABIAS_2GA_22B, PPG_PABIAS_2GB_22B, -+ tx_pa_bias, rf_reg_3f, e_rf_path); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(10), 0x1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, BIT(0), 0x1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, BIT(1), 0x1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, (BIT(1) | BIT(0)), 0x3); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); -+ odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(10), 0x0); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8822b 2g tx pa bias rf_0x3f(0x%X) path=%d\n", -+ odm_get_rf_reg(dm, e_rf_path, RF_0x3f, -+ (BIT(12) | BIT(11) | BIT(10) | BIT(9))), -+ e_rf_path); -+} -+ -+void phydm_get_pa_bias_offset_8822b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_pa_bias = 0xff, e_rf_path = 0; -+ s8 tx_pa_bias[2] = {0}; -+ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22B, &pg_pa_bias, false); -+ -+ if (pg_pa_bias != 0xff) { -+ /*paht a*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22B, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ if ((pg_pa_bias & BIT(0)) == 0) -+ tx_pa_bias[0] = (-1 * (pg_pa_bias >> 1)); -+ else -+ tx_pa_bias[0] = (pg_pa_bias >> 1); -+ -+ /*paht b*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GB_22B, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ if ((pg_pa_bias & BIT(0)) == 0) -+ tx_pa_bias[1] = (-1 * (pg_pa_bias >> 1)); -+ else -+ tx_pa_bias[1] = (pg_pa_bias >> 1); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8822b 2g PathA_pa_bias:%d PathB_pa_bias:%d\n", -+ tx_pa_bias[0], tx_pa_bias[1]); -+ -+ for (e_rf_path = RF_PATH_A; e_rf_path < 2; e_rf_path++) -+ phydm_set_pa_bias_to_rf_8822b(dm, e_rf_path, -+ tx_pa_bias[e_rf_path]); -+ -+ power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON; -+ } else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b 2g tx pa bias no pg\n"); -+ } -+} -+ -+void phydm_set_kfree_to_rf_8822b(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(4), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x65, MASKLWORD, 0x9000); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, -+ ((data & 0x1f) >> 1)); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8822b 0x55[19:14]=0x%X path=%d\n", -+ odm_get_rf_reg(dm, e_rf_path, RF_0x55, -+ (BIT(19) | BIT(18) | BIT(17) | BIT(16) | -+ BIT(15) | BIT(14))), e_rf_path); -+} -+ -+void phydm_clear_kfree_to_rf_8822b(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(4), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x65, MASKLWORD, 0x9000); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, -+ ((data & 0x1f) >> 1)); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(0), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0xde, BIT(4), 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x65, MASKLWORD, 0x9000); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(7), 0); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8822b clear power trim 0x55[19:14]=0x%X path=%d\n", -+ odm_get_rf_reg(dm, e_rf_path, RF_0x55, -+ (BIT(19) | BIT(18) | BIT(17) | BIT(16) | -+ BIT(15) | BIT(14))), e_rf_path); -+} -+ -+void phydm_get_thermal_trim_offset_8710b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0xff; -+ -+ odm_efuse_one_byte_read(dm, 0x0EF, &pg_therm, false); -+ -+ if (pg_therm != 0xff) { -+ pg_therm = pg_therm & 0x1f; -+ if ((pg_therm & BIT(0)) == 0) -+ power_trim_info->thermal = (-1 * (pg_therm >> 1)); -+ else -+ power_trim_info->thermal = (pg_therm >> 1); -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b thermal:%d\n", -+ power_trim_info->thermal); -+} -+ -+void phydm_get_power_trim_offset_8710b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_power = 0xff; -+ -+ odm_efuse_one_byte_read(dm, 0xEE, &pg_power, false); -+ -+ if (pg_power != 0xff) { -+ /*Path A*/ -+ odm_efuse_one_byte_read(dm, 0xEE, &pg_power, false); -+ power_trim_info->bb_gain[0][0] = (pg_power & 0xf); -+ -+ power_trim_info->flag |= KFREE_FLAG_ON_2G; -+ power_trim_info->flag |= KFREE_FLAG_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8710b power_trim_data->bb_gain[0][0]=0x%X\n", -+ power_trim_info->bb_gain[0][0]); -+} -+ -+void phydm_set_kfree_to_rf_8710b(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15)); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, ((data & 0xf) >> 1)); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8710b 0x55[19:14]=0x%X path=%d\n", -+ odm_get_rf_reg(dm, e_rf_path, RF_0x55, -+ (BIT(19) | BIT(18) | BIT(17) | BIT(16) | -+ BIT(15) | BIT(14))), e_rf_path); -+} -+ -+void phydm_clear_kfree_to_rf_8710b(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 gain_bmask = (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, gain_bmask, -+ ((data & 0x1f) >> 1)); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8710b clear power trim 0x55[19:14]=0x%X path=%d\n", -+ odm_get_rf_reg(dm, e_rf_path, RF_0x55, -+ (BIT(19) | BIT(18) | BIT(17) | BIT(16) | -+ BIT(15) | BIT(14))), e_rf_path); -+} -+ -+void phydm_get_thermal_trim_offset_8192f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0xff; -+ -+ odm_efuse_one_byte_read(dm, 0x1EF, &pg_therm, false); -+ -+ if (pg_therm != 0xff) { -+ pg_therm = pg_therm & 0x1f; -+ if ((pg_therm & BIT(0)) == 0) -+ power_trim_info->thermal = (-1 * (pg_therm >> 1)); -+ else -+ power_trim_info->thermal = (pg_therm >> 1); -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8192f thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8192f thermal:%d\n", -+ power_trim_info->thermal); -+} -+ -+void phydm_get_power_trim_offset_8192f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_power1 = 0xff, pg_power2 = 0xff, pg_power3 = 0xff, i, j; -+ -+ odm_efuse_one_byte_read(dm, 0x1EE, &pg_power1, false); /*CH4-9*/ -+ -+ if (pg_power1 != 0xff) { -+ /*Path A*/ -+ odm_efuse_one_byte_read(dm, 0x1EE, &pg_power1, false); -+ power_trim_info->bb_gain[1][0] = (pg_power1 & 0xf); -+ /*Path B*/ -+ odm_efuse_one_byte_read(dm, 0x1EE, &pg_power1, false); -+ power_trim_info->bb_gain[1][1] = ((pg_power1 & 0xf0) >> 4); -+ -+ power_trim_info->flag |= KFREE_FLAG_ON_2G; -+ power_trim_info->flag |= KFREE_FLAG_ON; -+ } -+ -+ odm_efuse_one_byte_read(dm, 0x1EC, &pg_power2, false); /*CH1-3*/ -+ -+ if (pg_power2 != 0xff) { -+ /*Path A*/ -+ odm_efuse_one_byte_read(dm, 0x1EC, &pg_power2, false); -+ power_trim_info->bb_gain[0][0] = (pg_power2 & 0xf); -+ /*Path B*/ -+ odm_efuse_one_byte_read(dm, 0x1EC, &pg_power2, false); -+ power_trim_info->bb_gain[0][1] = ((pg_power2 & 0xf0) >> 4); -+ -+ power_trim_info->flag |= KFREE_FLAG_ON_2G; -+ power_trim_info->flag |= KFREE_FLAG_ON; -+ } else { -+ power_trim_info->bb_gain[0][0] = (pg_power1 & 0xf); -+ power_trim_info->bb_gain[0][1] = ((pg_power1 & 0xf0) >> 4); -+ } -+ -+ odm_efuse_one_byte_read(dm, 0x1EA, &pg_power3, false); /*CH10-14*/ -+ -+ if (pg_power3 != 0xff) { -+ /*Path A*/ -+ odm_efuse_one_byte_read(dm, 0x1EA, &pg_power3, false); -+ power_trim_info->bb_gain[2][0] = (pg_power3 & 0xf); -+ /*Path B*/ -+ odm_efuse_one_byte_read(dm, 0x1EA, &pg_power3, false); -+ power_trim_info->bb_gain[2][1] = ((pg_power3 & 0xf0) >> 4); -+ -+ power_trim_info->flag |= KFREE_FLAG_ON_2G; -+ power_trim_info->flag |= KFREE_FLAG_ON; -+ } else { -+ power_trim_info->bb_gain[2][0] = (pg_power1 & 0xf); -+ power_trim_info->bb_gain[2][1] = ((pg_power1 & 0xf0) >> 4); -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8192F power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (!(power_trim_info->flag & KFREE_FLAG_ON)) -+ return; -+ -+ for (i = 0; i < KFREE_CH_NUM; i++) { -+ for (j = 0; j < 2; j++) -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8192F PwrTrim->bb_gain[%d][%d]=0x%X\n", -+ i, j, power_trim_info->bb_gain[i][j]); -+ } -+} -+ -+void phydm_set_kfree_to_rf_8192f(void *dm_void, u8 e_rf_path, u8 channel_idx, -+ u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /*power_trim based on 55[19:14]*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1); -+ /*enable 55[14] for 0.5db step*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 1); -+ /*enter power_trim debug mode*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 1); -+ /*write enable*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 1); -+ -+ if (e_rf_path == 0) { -+ if (channel_idx == 0) { -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ -+ } else if (channel_idx == 1) { -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ } else if (channel_idx == 2) { -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ } -+ } else if (e_rf_path == 1) { -+ if (channel_idx == 0) { -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ } else if (channel_idx == 1) { -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ } else if (channel_idx == 2) { -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5); -+ odm_set_rf_reg(dm, e_rf_path, 0x33, 0x3F, data); -+ } -+ } -+ -+ /*leave power_trim debug mode*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0); -+ /*write disable*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 0); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8192F 0x55[19:14]=0x%X path=%d channel=%d\n", -+ odm_get_rf_reg(dm, e_rf_path, RF_0x55, -+ (BIT(19) | BIT(18) | BIT(17) | BIT(16) | -+ BIT(15) | BIT(14))), e_rf_path, channel_idx); -+} -+ -+#if 0 -+/* -+void phydm_clear_kfree_to_rf_8192f(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(19), (data & BIT(0))); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1)); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8192F clear power trim 0x55[19:14]=0x%X path=%d\n", -+ odm_get_rf_reg(dm, e_rf_path, RF_0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))), -+ e_rf_path -+ ); -+} -+*/ -+#endif -+ -+void phydm_get_thermal_trim_offset_8198f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0; -+ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_98F, &pg_therm, false); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f efuse thermal trim 0x%X=0x%X\n", -+ PPG_THERMAL_OFFSET_98F, pg_therm); -+ -+ if (pg_therm != 0) { -+ pg_therm = pg_therm & 0x1f; -+ if ((pg_therm & BIT(0)) == 0) -+ power_trim_info->thermal = (-1 * (pg_therm >> 1)); -+ else -+ power_trim_info->thermal = (pg_therm >> 1); -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f thermal:%d\n", -+ power_trim_info->thermal); -+} -+ -+void phydm_get_power_trim_offset_8198f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 i, j; -+ u8 power_trim[6] = {0}; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GL_TXAB_98F, &power_trim[0], false); -+ odm_efuse_one_byte_read(dm, PPG_2GL_TXCD_98F, &power_trim[1], false); -+ odm_efuse_one_byte_read(dm, PPG_2GM_TXAB_98F, &power_trim[2], false); -+ odm_efuse_one_byte_read(dm, PPG_2GM_TXCD_98F, &power_trim[3], false); -+ odm_efuse_one_byte_read(dm, PPG_2GH_TXAB_98F, &power_trim[4], false); -+ odm_efuse_one_byte_read(dm, PPG_2GH_TXCD_98F, &power_trim[5], false); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f efuse Power Trim 0x%X=0x%X 0x%X=0x%X 0x%X=0x%X 0x%X=0x%X 0x%X=0x%X 0x%X=0x%X\n", -+ PPG_2GL_TXAB_98F, power_trim[0], -+ PPG_2GL_TXCD_98F, power_trim[1], -+ PPG_2GM_TXAB_98F, power_trim[2], -+ PPG_2GM_TXCD_98F, power_trim[3], -+ PPG_2GH_TXAB_98F, power_trim[4], -+ PPG_2GH_TXCD_98F, power_trim[5] -+ ); -+ -+ j = 0; -+ for (i = 0; i < 6; i++) { -+ if (power_trim[i] == 0x0) -+ j++; -+ } -+ -+ if (j == 6) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f Power Trim no pg\n"); -+ } else { -+ power_trim_info->bb_gain[0][0] = power_trim[0] & 0xf; -+ power_trim_info->bb_gain[0][1] = (power_trim[0] & 0xf0) >> 4; -+ -+ power_trim_info->bb_gain[0][2] = power_trim[1] & 0xf; -+ power_trim_info->bb_gain[0][3] = (power_trim[1] & 0xf0) >> 4; -+ -+ power_trim_info->bb_gain[1][0] = power_trim[2] & 0xf; -+ power_trim_info->bb_gain[1][1] = (power_trim[2] & 0xf0) >> 4; -+ -+ power_trim_info->bb_gain[1][2] = power_trim[3] & 0xf; -+ power_trim_info->bb_gain[1][3] = (power_trim[3] & 0xf0) >> 4; -+ -+ power_trim_info->bb_gain[2][0] = power_trim[4] & 0xf; -+ power_trim_info->bb_gain[2][1] = (power_trim[4] & 0xf0) >> 4; -+ -+ power_trim_info->bb_gain[2][2] = power_trim[5] & 0xf; -+ power_trim_info->bb_gain[2][3] = (power_trim[5] & 0xf0) >> 4; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < MAX_RF_PATH; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8198f pwr_trim->bb_gain[%d][%d]=0x%X\n", -+ i, j, power_trim_info->bb_gain[i][j]); -+ } -+ } -+ } -+} -+ -+void phydm_get_pa_bias_offset_8198f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 i, j; -+ u8 pa_bias[2] = {0}; -+ u8 tx_pa_bias[4] = {0}; -+ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GAB_98F, &pa_bias[0], false); -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GCD_98F, &pa_bias[1], false); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f efuse Tx PA Bias 0x%X=0x%X 0x%X=0x%X\n", -+ PPG_PABIAS_2GAB_98F, pa_bias[0], PPG_PABIAS_2GCD_98F, pa_bias[1]); -+ -+ j = 0; -+ for (i = 0; i < 2; i++) { -+ if (pa_bias[i] == 0x0) -+ j++; -+ } -+ -+ if (j == 2) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f Tx PA Bias no pg\n"); -+ } else { -+ /*paht ab*/ -+ tx_pa_bias[0] = pa_bias[0] & 0xf; -+ tx_pa_bias[1] = ((pa_bias[0] & 0xf0) >> 4); -+ -+ /*paht cd*/ -+ tx_pa_bias[2] = pa_bias[1] & 0xf; -+ tx_pa_bias[3] = ((pa_bias[1] & 0xf0) >> 4); -+ -+ for (i = RF_PATH_A; i < 4; i++) { -+ if ((tx_pa_bias[i] & 0x1) == 1) -+ tx_pa_bias[i] = tx_pa_bias[i] & 0xe; -+ else -+ tx_pa_bias[i] = tx_pa_bias[i] | 0x1; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8198f PathA_pa_bias:0x%x PathB_pa_bias:0x%x\n", -+ tx_pa_bias[0], tx_pa_bias[1]); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8198f PathC_pa_bias:0x%x PathD_pa_bias:0x%x\n", -+ tx_pa_bias[2], tx_pa_bias[3]); -+ -+ for (i = RF_PATH_A; i < 4; i++) -+ odm_set_rf_reg(dm, i, 0x60, 0x0000f000, tx_pa_bias[i]); -+ -+ power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON; -+ } -+} -+ -+void phydm_get_set_lna_offset_8198f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 i, j; -+ u8 lna_trim[4] = {0}; -+ u8 cg[4] = {0}, cs[4] = {0}; -+ u32 rf_reg; -+ -+ odm_efuse_one_byte_read(dm, PPG_LNA_2GA_98F, &lna_trim[0], false); -+ odm_efuse_one_byte_read(dm, PPG_LNA_2GB_98F, &lna_trim[1], false); -+ odm_efuse_one_byte_read(dm, PPG_LNA_2GC_98F, &lna_trim[2], false); -+ odm_efuse_one_byte_read(dm, PPG_LNA_2GD_98F, &lna_trim[3], false); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f efuse LNA Trim 0x%X=0x%X 0x%X=0x%X 0x%X=0x%X 0x%X=0x%X\n", -+ PPG_LNA_2GA_98F, lna_trim[0], -+ PPG_LNA_2GB_98F, lna_trim[1], -+ PPG_LNA_2GC_98F, lna_trim[2], -+ PPG_LNA_2GD_98F, lna_trim[3] -+ ); -+ -+ j = 0; -+ for (i = 0; i < 4; i++) { -+ if (lna_trim[i] == 0x0) -+ j++; -+ } -+ -+ if (j == 4) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8198f LNA no pg\n"); -+ } else { -+ -+ for (i = 0; i < 4; i++) { -+ cg[i] = (lna_trim[i] & 0xc) >> 2; -+ cs[i] = lna_trim[i] & 0x3; -+ } -+ -+ for (i = RF_PATH_A; i <= RF_PATH_D; i++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8198f lna cg[%d]=0x%x cs[%d]=0x%x\n", -+ i, cg[i], i, cs[i]); -+ odm_set_rf_reg(dm, i, 0xdf, RFREGOFFSETMASK, 0x2); -+ -+ if (cg[i] == 0x3) { -+ rf_reg = odm_get_rf_reg(dm, i, 0x86, (BIT(19) | BIT(18))); -+ rf_reg = rf_reg + 1; -+ if (rf_reg >= 0x3) -+ rf_reg = 0x3; -+ odm_set_rf_reg(dm, i, 0x86, (BIT(19) | BIT(18)), rf_reg); -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8198f lna CG set rf 0x86 [19:18]=0x%x path=%d\n", rf_reg, i); -+ } -+ if (cs[i] == 0x3) { -+ rf_reg = odm_get_rf_reg(dm, i, 0x86, (BIT(17) | BIT(16))); -+ rf_reg = rf_reg + 1; -+ if (rf_reg >= 0x3) -+ rf_reg = 0x3; -+ odm_set_rf_reg(dm, i, 0x86, (BIT(17) | BIT(16)), rf_reg); -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8198f lna CS set rf 0x86 [17:16]=0x%x path=%d\n", rf_reg, i); -+ } -+ } -+ -+ power_trim_info->lna_flag |= LNA_FLAG_ON; -+ } -+} -+ -+ -+void phydm_set_kfree_to_rf_8198f(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ u32 i; -+ s8 pwr_offset[3]; -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s:Set kfree to rf 0x33\n", __func__); -+ -+ /*power_trim based on 55[19:14]*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1); -+ /*enable 55[14] for 0.5db step*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 1); -+ /*enter power_trim debug mode*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0); -+ /*write enable*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 1); -+ -+ for (i =0; i < 3; i++) -+ pwr_offset[i] = power_trim_info->bb_gain[i][e_rf_path]; -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[0]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[0]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[1]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[1]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[2]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, pwr_offset[2]); -+ -+ /*leave power_trim debug mode*/ -+ /*odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0);*/ -+ /*write disable*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 0); -+ -+} -+ -+void phydm_clear_kfree_to_rf_8198f(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if 0 -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s:Clear kfree to rf 0x55\n", __func__); -+ -+ /*power_trim based on 55[19:14]*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x55, BIT(5), 1); -+ /*enable 55[14] for 0.5db step*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 1); -+ /*enter power_trim debug mode*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0); -+ /*write enable*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 1); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 2); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 3); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 4); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x70000, 5); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, data); -+ -+ /*leave power_trim debug mode*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 0); -+ /*enable 55[14] for 0.5db step*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 0); -+ /*write disable*/ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 0); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xdf, BIT(7), 1); -+ /*odm_set_rf_reg(dm, e_rf_path, RF_0xf5, BIT(18), 0);*/ -+ -+#endif -+ -+} -+ -+void phydm_get_set_thermal_trim_offset_8822c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0xff, thermal[2] = {0}; -+ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_A_OFFSET_22C, &pg_therm, false); -+ -+ if (pg_therm != 0xff) { -+ /*s0*/ -+ pg_therm = pg_therm & 0x1f; -+ -+ thermal[RF_PATH_A] = -+ ((pg_therm & 0x1) << 3) | ((pg_therm >> 1) & 0x7); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x43, 0x000f0000, thermal[RF_PATH_A]); -+ -+ /*s1*/ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_B_OFFSET_22C, &pg_therm, false); -+ -+ pg_therm = pg_therm & 0x1f; -+ -+ thermal[RF_PATH_B] = ((pg_therm & 0x1) << 3) | ((pg_therm >> 1) & 0x7); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x43, 0x000f0000, thermal[RF_PATH_B]); -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8822c thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8822c thermalA:%d thermalB:%d\n", -+ thermal[RF_PATH_A], -+ thermal[RF_PATH_B]); -+} -+ -+void phydm_set_power_trim_offset_8822c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ u8 e_rf_path; -+ -+ for (e_rf_path = RF_PATH_A; e_rf_path < 2; e_rf_path++) -+ { -+ odm_set_rf_reg(dm, e_rf_path, RF_0xee, BIT(19), 1); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[0][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[1][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x2); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[2][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x3); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[2][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x4); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[3][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x5); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[4][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x6); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[5][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x7); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[6][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x8); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x9); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[3][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xa); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[4][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xb); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[5][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xc); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[6][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xd); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xe); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][e_rf_path]); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xee, BIT(19), 0); -+ } -+} -+ -+void phydm_get_set_power_trim_offset_8822c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_power = 0xff, i, j; -+ u8 pg_power1, pg_power2 , pg_power3, pg_power4, pg_power5; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GL_TXAB_22C, &pg_power1, false); -+ odm_efuse_one_byte_read(dm, PPG_2GM_TXAB_22C, &pg_power2, false); -+ odm_efuse_one_byte_read(dm, PPG_2GH_TXAB_22C, &pg_power3, false); -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22C, &pg_power4, false); -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXB_22C, &pg_power5, false); -+ -+ if (pg_power1 != 0xff || pg_power2 != 0xff || pg_power3 != 0xff || -+ pg_power4 != 0xff || pg_power5 != 0xff) { -+ odm_efuse_one_byte_read(dm, PPG_2GL_TXAB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[0][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[0][1] = (pg_power & 0xf0) >> 4; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GM_TXAB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[1][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[1][1] = (pg_power & 0xf0) >> 4; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GH_TXAB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[2][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[2][1] = (pg_power & 0xf0) >> 4; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[3][0] = pg_power & 0x1f; -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[3][1] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[4][0] = pg_power & 0x1f; -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[4][1] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[5][0] = pg_power & 0x1f; -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[5][1] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[6][0] = pg_power & 0x1f; -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[6][1] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[7][0] = pg_power & 0x1f; -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[7][1] = pg_power & 0x1f; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | -+ KFREE_FLAG_ON_2G | -+ KFREE_FLAG_ON_5G; -+ -+ phydm_set_power_trim_offset_8822c(dm); -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8822c power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < 2; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8822c pwr_trim->bb_gain[%d][%d]=0x%X\n", -+ i, j, power_trim_info->bb_gain[i][j]); -+ } -+ } -+ } -+} -+ -+void phydm_get_tssi_trim_offset_8822c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 i, j; -+ u8 pg_power[16] = {0}; -+ -+ odm_efuse_one_byte_read(dm, TSSI_2GM_TXA_22C, &pg_power[0], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GM_TXB_22C, &pg_power[1], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GH_TXA_22C, &pg_power[2], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GH_TXB_22C, &pg_power[3], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL1_TXA_22C, &pg_power[4], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL1_TXB_22C, &pg_power[5], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL2_TXA_22C, &pg_power[6], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL2_TXB_22C, &pg_power[7], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM1_TXA_22C, &pg_power[8], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM1_TXB_22C, &pg_power[9], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM2_TXA_22C, &pg_power[10], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM2_TXB_22C, &pg_power[11], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH1_TXA_22C, &pg_power[12], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH1_TXB_22C, &pg_power[13], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH2_TXA_22C, &pg_power[14], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH2_TXB_22C, &pg_power[15], false); -+ -+ j = 0; -+ for (i = 0; i < 16; i++) { -+ if (pg_power[i] == 0xff) -+ j++; -+ } -+ -+ if (j == 16) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8822c tssi trim no PG\n"); -+ } else { -+ power_trim_info->tssi_trim[0][0] = (s8)pg_power[0]; -+ power_trim_info->tssi_trim[0][1] = (s8)pg_power[1]; -+ power_trim_info->tssi_trim[1][0] = (s8)pg_power[0]; -+ power_trim_info->tssi_trim[1][1] = (s8)pg_power[1]; -+ power_trim_info->tssi_trim[2][0] = (s8)pg_power[2]; -+ power_trim_info->tssi_trim[2][1] = (s8)pg_power[3]; -+ power_trim_info->tssi_trim[3][0] = (s8)pg_power[4]; -+ power_trim_info->tssi_trim[3][1] = (s8)pg_power[5]; -+ power_trim_info->tssi_trim[4][0] = (s8)pg_power[6]; -+ power_trim_info->tssi_trim[4][1] = (s8)pg_power[7]; -+ power_trim_info->tssi_trim[5][0] = (s8)pg_power[8]; -+ power_trim_info->tssi_trim[5][1] = (s8)pg_power[9]; -+ power_trim_info->tssi_trim[6][0] = (s8)pg_power[10]; -+ power_trim_info->tssi_trim[6][1] = (s8)pg_power[11]; -+ power_trim_info->tssi_trim[7][0] = (s8)pg_power[12]; -+ power_trim_info->tssi_trim[7][1] = (s8)pg_power[13]; -+ power_trim_info->tssi_trim[8][0] = (s8)pg_power[14]; -+ power_trim_info->tssi_trim[8][1] = (s8)pg_power[15]; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | TSSI_TRIM_FLAG_ON; -+ -+ if (power_trim_info->flag & TSSI_TRIM_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < 2; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8822c tssi_trim[%d][%d]=0x%X\n", -+ i, j, power_trim_info->tssi_trim[i][j]); -+ } -+ } -+ } -+ } -+} -+ -+s8 phydm_get_tssi_trim_de_8822c(void *dm_void, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 channel = *dm->channel, group = 0; -+ -+ if (channel >= 1 && channel <= 3) -+ group = 0; -+ else if (channel >= 4 && channel <= 9) -+ group = 1; -+ else if (channel >= 10 && channel <= 14) -+ group = 2; -+ else if (channel >= 36 && channel <= 50) -+ group = 3; -+ else if (channel >= 52 && channel <= 64) -+ group = 4; -+ else if (channel >= 100 && channel <= 118) -+ group = 5; -+ else if (channel >= 120 && channel <= 144) -+ group = 6; -+ else if (channel >= 149 && channel <= 165) -+ group = 7; -+ else if (channel >= 167 && channel <= 177) -+ group = 8; -+ else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] Channel(%d) is not exist in Group\n", -+ channel); -+ return 0; -+ } -+ -+ return power_trim_info->tssi_trim[group][path]; -+} -+ -+ -+ -+void phydm_get_set_pa_bias_offset_8822c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_pa_bias = 0xff; -+ -+ RF_DBG(dm, DBG_RF_MP, "======>%s\n", __func__); -+ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22C, &pg_pa_bias, false); -+ -+ if (pg_pa_bias != 0xff) { -+ /*2G s0*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22C, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 2G s0 pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x0000f000, pg_pa_bias); -+ -+ /*2G s1*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GB_22C, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 2G s1 pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, 0x60, 0x0000f000, pg_pa_bias); -+ -+ /*5G s0*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_5GA_22C, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 5G s0 pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x000f0000, pg_pa_bias); -+ -+ /*5G s1*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_5GB_22C, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 5G s1 pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, 0x60, 0x000f0000, pg_pa_bias); -+ -+ power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON; -+ } else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8822c tx pa bias no pg\n"); -+ } -+ -+} -+ -+void phydm_get_set_thermal_trim_offset_8812f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0xff, thermal[2] = {0}; -+ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_A_OFFSET_22C, &pg_therm, false); -+ -+ if (pg_therm != 0xff && pg_therm != 0x0) { -+ /*s0*/ -+ pg_therm = pg_therm & 0x1f; -+ -+ thermal[RF_PATH_A] = -+ ((pg_therm & 0x1) << 3) | ((pg_therm >> 1) & 0x7); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x43, 0x000f0000, thermal[RF_PATH_A]); -+ -+ /*s1*/ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_B_OFFSET_22C, &pg_therm, false); -+ -+ pg_therm = pg_therm & 0x1f; -+ -+ thermal[RF_PATH_B] = ((pg_therm & 0x1) << 3) | ((pg_therm >> 1) & 0x7); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x43, 0x000f0000, thermal[RF_PATH_B]); -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8812f thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8812f thermalA:%d thermalB:%d\n", -+ thermal[RF_PATH_A], -+ thermal[RF_PATH_B]); -+} -+ -+void phydm_set_power_trim_offset_8812f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ u8 e_rf_path; -+ -+ for (e_rf_path = RF_PATH_A; e_rf_path < 2; e_rf_path++) -+ { -+ odm_set_rf_reg(dm, e_rf_path, RF_0xee, BIT(19), 1); -+ -+#if 0 -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[0][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[1][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x2); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[2][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x3); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[2][e_rf_path]); -+#endif -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x4); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[3][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x5); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[4][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x6); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[5][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x7); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[6][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x8); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x9); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[3][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xa); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[4][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xb); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[5][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xc); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[6][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xd); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xe); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][e_rf_path]); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xee, BIT(19), 0); -+ } -+} -+ -+void phydm_get_set_power_trim_offset_8812f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_power = 0xff, i, j; -+ u8 pg_power1 = 0, pg_power2 = 0, pg_power3 = 0; -+ u8 pg_power4 = 0, pg_power5 = 0; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22C, &pg_power1, false); -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXB_22C, &pg_power2, false); -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_22C, &pg_power3, false); -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXB_22C, &pg_power4, false); -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_22C, &pg_power5, false); -+ -+ if ((pg_power1 != 0xff || pg_power2 != 0xff || pg_power3 != 0xff || -+ pg_power4 != 0xff || pg_power5 != 0xff) && -+ (pg_power1 != 0x0 || pg_power2 != 0x0 || pg_power3 != 0x0 || -+ pg_power4 != 0x0 || pg_power5 != 0x0)) { -+#if 0 -+ odm_efuse_one_byte_read(dm, PPG_2GL_TXAB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[0][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[0][1] = (pg_power & 0xf0) >> 4; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GM_TXAB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[1][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[1][1] = (pg_power & 0xf0) >> 4; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GH_TXAB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[2][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[2][1] = (pg_power & 0xf0) >> 4; -+#endif -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[3][0] = pg_power & 0x1f; -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[3][1] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[4][0] = pg_power & 0x1f; -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[4][1] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[5][0] = pg_power & 0x1f; -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[5][1] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[6][0] = pg_power & 0x1f; -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[6][1] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[7][0] = pg_power & 0x1f; -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXB_22C, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[7][1] = pg_power & 0x1f; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_5G; -+ -+ phydm_set_power_trim_offset_8812f(dm); -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8812f power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < 2; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8812f pwr_trim->bb_gain[%d][%d]=0x%X\n", -+ i, j, power_trim_info->bb_gain[i][j]); -+ } -+ } -+ } -+} -+ -+void phydm_get_tssi_trim_offset_8812f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 i, j ; -+ u8 pg_power[16] = {0}; -+ -+#if 0 -+ odm_efuse_one_byte_read(dm, TSSI_2GM_TXA_22C, &pg_power[0], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GM_TXB_22C, &pg_power[1], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GH_TXA_22C, &pg_power[2], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GH_TXB_22C, &pg_power[3], false); -+#endif -+ odm_efuse_one_byte_read(dm, TSSI_5GL1_TXA_22C, &pg_power[4], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL1_TXB_22C, &pg_power[5], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL2_TXA_22C, &pg_power[6], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL2_TXB_22C, &pg_power[7], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM1_TXA_22C, &pg_power[8], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM1_TXB_22C, &pg_power[9], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM2_TXA_22C, &pg_power[10], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM2_TXB_22C, &pg_power[11], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH1_TXA_22C, &pg_power[12], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH1_TXB_22C, &pg_power[13], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH2_TXA_22C, &pg_power[14], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH2_TXB_22C, &pg_power[15], false); -+ -+ j = 0; -+ for (i = 4; i < 16; i++) { -+ if (pg_power[i] == 0xff || pg_power[i] == 0x0) -+ j++; -+ } -+ -+ if (j == 12) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8812f tssi trim no PG\n"); -+ } else { -+#if 0 -+ power_trim_info->tssi_trim[0][0] = (s8)pg_power[0]; -+ power_trim_info->tssi_trim[0][1] = (s8)pg_power[1]; -+ power_trim_info->tssi_trim[1][0] = (s8)pg_power[0]; -+ power_trim_info->tssi_trim[1][1] = (s8)pg_power[1]; -+ power_trim_info->tssi_trim[2][0] = (s8)pg_power[2]; -+ power_trim_info->tssi_trim[2][1] = (s8)pg_power[3]; -+#endif -+ power_trim_info->tssi_trim[3][0] = (s8)pg_power[4]; -+ power_trim_info->tssi_trim[3][1] = (s8)pg_power[5]; -+ power_trim_info->tssi_trim[4][0] = (s8)pg_power[6]; -+ power_trim_info->tssi_trim[4][1] = (s8)pg_power[7]; -+ power_trim_info->tssi_trim[5][0] = (s8)pg_power[8]; -+ power_trim_info->tssi_trim[5][1] = (s8)pg_power[9]; -+ power_trim_info->tssi_trim[6][0] = (s8)pg_power[10]; -+ power_trim_info->tssi_trim[6][1] = (s8)pg_power[11]; -+ power_trim_info->tssi_trim[7][0] = (s8)pg_power[12]; -+ power_trim_info->tssi_trim[7][1] = (s8)pg_power[13]; -+ power_trim_info->tssi_trim[8][0] = (s8)pg_power[14]; -+ power_trim_info->tssi_trim[8][1] = (s8)pg_power[15]; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | TSSI_TRIM_FLAG_ON; -+ -+ if (power_trim_info->flag & TSSI_TRIM_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < 2; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8812f tssi_trim[%d][%d]=0x%X\n", -+ i, j, power_trim_info->tssi_trim[i][j]); -+ } -+ } -+ } -+ } -+} -+ -+s8 phydm_get_tssi_trim_de_8812f(void *dm_void, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 channel = *dm->channel, group = 0; -+ -+ if (channel >= 1 && channel <= 3) -+ group = 0; -+ else if (channel >= 4 && channel <= 9) -+ group = 1; -+ else if (channel >= 10 && channel <= 14) -+ group = 2; -+ else if (channel >= 36 && channel <= 50) -+ group = 3; -+ else if (channel >= 52 && channel <= 64) -+ group = 4; -+ else if (channel >= 100 && channel <= 118) -+ group = 5; -+ else if (channel >= 120 && channel <= 144) -+ group = 6; -+ else if (channel >= 149 && channel <= 165) -+ group = 7; -+ else if (channel >= 167 && channel <= 177) -+ group = 8; -+ else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] Channel(%d) is not exist in Group\n", -+ channel); -+ return 0; -+ } -+ -+ return power_trim_info->tssi_trim[group][path]; -+} -+ -+void phydm_get_set_pa_bias_offset_8812f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_pa_bias = 0xff; -+ -+ RF_DBG(dm, DBG_RF_MP, "======>%s\n", __func__); -+ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_5GA_22C, &pg_pa_bias, false); -+ -+ if (pg_pa_bias != 0xff && pg_pa_bias != 0x0) { -+#if 0 -+ /*2G s0*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_22C, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 2G s0 pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x0000f000, pg_pa_bias); -+ -+ /*2G s1*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GB_22C, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 2G s1 pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, 0x60, 0x0000f000, pg_pa_bias); -+#endif -+ -+ /*5G s0*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_5GA_22C, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 5G s0 pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x000f0000, pg_pa_bias); -+ -+ /*5G s1*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_5GB_22C, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 5G s1 pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, 0x60, 0x000f0000, pg_pa_bias); -+ -+ power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON; -+ } else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8812f tx pa bias no pg\n"); -+ } -+ -+} -+ -+void phydm_get_thermal_trim_offset_8195b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0xff; -+ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_95B, &pg_therm, false); -+ -+ if (pg_therm != 0xff) { -+ pg_therm = pg_therm & 0x1f; -+ if ((pg_therm & BIT(0)) == 0) -+ power_trim_info->thermal = (-1 * (pg_therm >> 1)); -+ else -+ power_trim_info->thermal = (pg_therm >> 1); -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8195b thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8195b thermal:%d\n", -+ power_trim_info->thermal); -+} -+ -+void phydm_set_power_trim_rf_8195b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s:Set kfree to rf 0x33\n", __func__); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, BIT(19), 1); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON_2G) { -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x0); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[0][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x1); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[1][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x2); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[2][RF_PATH_A]); -+ } -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON_5G) { -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x4); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[3][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x5); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[4][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x6); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[5][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x7); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[6][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x8); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[7][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0xe); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[7][RF_PATH_A]); -+ } -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, BIT(19), 0); -+ } -+ -+} -+ -+void phydm_get_set_power_trim_offset_8195b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_power = 0xff, i, j; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GL_TXA_95B, &pg_power, false); -+ -+ if (pg_power != 0xff) { -+ odm_efuse_one_byte_read(dm, PPG_2GL_TXA_95B, &pg_power, false); -+ power_trim_info->bb_gain[0][0] = pg_power & 0xf; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GM_TXA_95B, &pg_power, false); -+ power_trim_info->bb_gain[1][0] = pg_power & 0xf; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GH_TXA_95B, &pg_power, false); -+ power_trim_info->bb_gain[2][0] = pg_power & 0xf; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G; -+ } -+ -+ pg_power = 0xff; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_95B, &pg_power, false); -+ -+ if (pg_power != 0xff) { -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_95B, &pg_power, false); -+ power_trim_info->bb_gain[3][0] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_95B, &pg_power, false); -+ power_trim_info->bb_gain[4][0] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_95B, &pg_power, false); -+ power_trim_info->bb_gain[5][0] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_95B, &pg_power, false); -+ power_trim_info->bb_gain[6][0] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_95B, &pg_power, false); -+ power_trim_info->bb_gain[7][0] = pg_power & 0x1f; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_5G; -+ } -+ -+ phydm_set_power_trim_rf_8195b(dm); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8195b power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < 1; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8195b pwr_trim->bb_gain[%d][%d]=0x%X\n", -+ i, j, power_trim_info->bb_gain[i][j]); -+ } -+ } -+ } -+} -+ -+void phydm_get_set_pa_bias_offset_8195b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_pa_bias = 0xff; -+ -+ RF_DBG(dm, DBG_RF_MP, "======>%s\n", __func__); -+ -+ /*2G*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_95B, &pg_pa_bias, false); -+ -+ if (pg_pa_bias != 0xff) { -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_95B, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 2G pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x0000f000, pg_pa_bias); -+ } else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8195b 2G tx pa bias no pg\n"); -+ } -+ -+ /*5G*/ -+ pg_pa_bias = 0xff; -+ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_5GA_95B, &pg_pa_bias, false); -+ -+ if (pg_pa_bias != 0xff) { -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_5GA_95B, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 5G pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x000f0000, pg_pa_bias); -+ -+ power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON; -+ } else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8195b 5G tx pa bias no pg\n"); -+ } -+} -+ -+void phydm_get_thermal_trim_offset_8721d(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0xff; -+ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_8721D, &pg_therm, false); -+ -+ if (pg_therm != 0xff) { -+ pg_therm = pg_therm & 0x1f; -+ if ((pg_therm & BIT(0)) == 0) -+ power_trim_info->thermal = (-1 * (pg_therm >> 1)); -+ else -+ power_trim_info->thermal = (pg_therm >> 1); -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8721d thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8721d thermal:%d\n", -+ power_trim_info->thermal); -+} -+ -+void phydm_set_power_trim_rf_8721d(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] %s:Set kfree to rf 0x33\n", __func__); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, BIT(19), 1); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x0); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[0][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x1); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[1][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x2); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[2][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x3); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[2][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x4); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[3][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x5); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[4][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x6); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[5][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x7); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[6][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x8); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x0000003f, -+ power_trim_info->bb_gain[7][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0x9); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[3][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0xa); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[4][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0xb); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[5][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0xc); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[6][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0xd); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0xe); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][RF_PATH_A]); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xee, BIT(19), 0); -+} -+ -+void phydm_get_set_power_trim_offset_8721d(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_power = 0xff, i, j; -+ u8 pg_power1, pg_power2, pg_power3, pg_power4, pg_power5, pg_power6; -+ -+ odm_efuse_one_byte_read(dm, PPG_2G_TXA_8721D, &pg_power1, false); -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_8721D, &pg_power2, false); -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_8721D, &pg_power3, false); -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_8721D, &pg_power4, false); -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_8721D, &pg_power5, false); -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_8721D, &pg_power6, false); -+ -+ if (pg_power1 != 0xff || pg_power2 != 0xff || pg_power3 != 0xff || -+ pg_power4 != 0xff || pg_power5 != 0xff || pg_power6 != 0xff) { -+ odm_efuse_one_byte_read(dm, PPG_2G_TXA_8721D, &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[0][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[1][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[2][0] = pg_power & 0xf; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_8721D, -+ &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[3][0] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_8721D, -+ &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[4][0] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_8721D, -+ &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[5][0] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_8721D, -+ &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[6][0] = pg_power & 0x1f; -+ -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_8721D, -+ &pg_power, false); -+ if (pg_power == 0xff) -+ pg_power = 0; -+ power_trim_info->bb_gain[7][0] = pg_power & 0x1f; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | -+ KFREE_FLAG_ON_2G | -+ KFREE_FLAG_ON_5G; -+ -+ phydm_set_power_trim_rf_8721d(dm); -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8721d power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < 1; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8721d pwr_trim->bb_gain[%d][%d]=0x%X\n", -+ i, j, power_trim_info->bb_gain[i][j]); -+ } -+ } -+ } -+} -+ -+void phydm_get_set_pa_bias_offset_8721d(void *dm_void) -+{ -+#if 0 -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_pa_bias = 0xff; -+ -+ RF_DBG(dm, DBG_RF_MP, "======>%s\n", __func__); -+ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_95B, &pg_pa_bias, false); -+ -+ if (pg_pa_bias != 0xff) { -+ /*2G*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GA_95B, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 2G pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x0000f000, pg_pa_bias); -+ -+ /*5G*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_5GA_95B, -+ &pg_pa_bias, false); -+ pg_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 5G pa_bias=0x%x\n", pg_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x000f0000, pg_pa_bias); -+ -+ power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON; -+ } else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8721d tx pa bias no pg\n"); -+ } -+#endif -+} -+ -+void phydm_get_thermal_trim_offset_8197g(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0xff, i; -+ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_A_OFFSET_97G, &pg_therm, false); -+ -+ if (pg_therm != 0x0) { -+ for (i = 0; i < 2; i++) { -+ if (i == 0) -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_A_OFFSET_97G, &pg_therm, false); -+ else if (i == 1) -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_B_OFFSET_97G, &pg_therm, false); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g Efuse thermal S%d:0x%x\n", i, pg_therm); -+ -+ pg_therm = pg_therm & 0x1f; -+ if ((pg_therm & BIT(0)) == 0) -+ power_trim_info->multi_thermal[i] = (-1 * (pg_therm >> 1)); -+ else -+ power_trim_info->multi_thermal[i] = (pg_therm >> 1); -+ } -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ for (i = 0; i < 2; i++) { -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g thermal S%d:%d\n", -+ i ,power_trim_info->multi_thermal[i]); -+ } -+} -+ -+void phydm_set_power_trim_offset_8197g(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ u8 e_rf_path; -+ -+ for (e_rf_path = RF_PATH_A; e_rf_path < 2; e_rf_path++) -+ { -+ odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 1); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x1c000, 0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, -+ power_trim_info->bb_gain[0][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x1c000, 1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, -+ power_trim_info->bb_gain[0][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x1c000, 2); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, -+ power_trim_info->bb_gain[1][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x1c000, 3); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, -+ power_trim_info->bb_gain[1][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x1c000, 4); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, -+ power_trim_info->bb_gain[2][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x1c000, 5); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, 0x3F, -+ power_trim_info->bb_gain[2][e_rf_path]); -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xef, BIT(7), 0); -+ } -+ -+} -+ -+void phydm_get_set_power_trim_offset_8197g(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_power = 0, i, j; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GL_TXAB_97G, &pg_power, false); -+ -+ if (pg_power != 0) { -+ power_trim_info->bb_gain[0][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[0][1] = (pg_power & 0xf0) >> 4; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GM_TXAB_97G, &pg_power, false); -+ power_trim_info->bb_gain[1][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[1][1] = (pg_power & 0xf0) >> 4; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GH_TXAB_97G, &pg_power, false); -+ power_trim_info->bb_gain[2][0] = pg_power & 0xf; -+ power_trim_info->bb_gain[2][1] = (pg_power & 0xf0) >> 4; -+ -+ phydm_set_power_trim_offset_8197g(dm); -+ -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < MAX_RF_PATH; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8197g pwr_trim->bb_gain[%d][%d]=0x%X\n", -+ i, j, power_trim_info->bb_gain[i][j]); -+ } -+ } -+ } -+} -+ -+void phydm_get_tssi_trim_offset_8197g(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 i, j; -+ u8 pg_power[4] = {0}; -+ -+ odm_efuse_one_byte_read(dm, TSSI_2GL_TXA_97G, &pg_power[0], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GL_TXB_97G, &pg_power[1], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GH_TXA_97G, &pg_power[2], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GH_TXB_97G, &pg_power[3], false); -+ -+ j = 0; -+ for (i = 0; i < 4; i++) { -+ if (pg_power[i] == 0x0) -+ j++; -+ } -+ -+ if (j == 4) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g tssi trim no PG\n"); -+ } else { -+ power_trim_info->tssi_trim[0][0] = (s8)pg_power[0]; -+ power_trim_info->tssi_trim[0][1] = (s8)pg_power[1]; -+ power_trim_info->tssi_trim[1][0] = (s8)pg_power[0]; -+ power_trim_info->tssi_trim[1][1] = (s8)pg_power[1]; -+ power_trim_info->tssi_trim[2][0] = (s8)pg_power[2]; -+ power_trim_info->tssi_trim[2][1] = (s8)pg_power[3]; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | TSSI_TRIM_FLAG_ON; -+ -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < MAX_PATH_NUM_8197G; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8197g tssi_trim[%d][%d]=0x%X\n", -+ i, j, power_trim_info->tssi_trim[i][j]); -+ } -+ } -+ } -+} -+ -+s8 phydm_get_tssi_trim_de_8197g(void *dm_void, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 channel = *dm->channel, group = 0; -+ -+ if (channel >= 1 && channel <= 3) -+ group = 0; -+ else if (channel >= 4 && channel <= 9) -+ group = 1; -+ else if (channel >= 10 && channel <= 14) -+ group = 2; -+ else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] Channel(%d) is not exist in Group\n", -+ channel); -+ return 0; -+ } -+ -+ return power_trim_info->tssi_trim[group][path]; -+} -+ -+void phydm_get_set_pa_bias_offset_8197g(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_pa_bias = 0xff, i; -+ u8 tx_pa_bias[4] = {0}; -+ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GAB_97G, &pg_pa_bias, false); -+ -+ if (pg_pa_bias != 0x0) { -+ /*paht ab*/ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GAB_97G, -+ &pg_pa_bias, false); -+ tx_pa_bias[0] = pg_pa_bias & 0xf; -+ tx_pa_bias[1] = ((pg_pa_bias & 0xf0) >> 4); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8197g PathA_pa_bias:0x%x PathB_pa_bias:0x%x\n", -+ tx_pa_bias[0], tx_pa_bias[1]); -+ -+ for (i = RF_PATH_A; i < 2; i++) -+ odm_set_rf_reg(dm, i, 0x60, 0x0000f000, tx_pa_bias[i]); -+ -+ power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON; -+ } else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g tx pa bias no pg\n"); -+ } -+} -+ -+void phydm_get_set_lna_offset_8197g(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_lna[2] = {0}, i, pg_lna_tmp = 0; -+ u32 lna_trim_addr[2] = {0x1884, 0x4184}; -+ -+ odm_efuse_one_byte_read(dm, PPG_LNA_2GA_97G, &pg_lna_tmp, false); -+ -+ if (pg_lna_tmp != 0) { -+ odm_efuse_one_byte_read(dm, PPG_LNA_2GA_97G, -+ &pg_lna[RF_PATH_A], false); -+ power_trim_info->lna_trim[RF_PATH_A] = (s8)pg_lna[RF_PATH_A]; -+ -+ odm_efuse_one_byte_read(dm, PPG_LNA_2GB_97G, -+ &pg_lna[RF_PATH_B], false); -+ power_trim_info->lna_trim[RF_PATH_B] = (s8)pg_lna[RF_PATH_B]; -+ -+ for (i = RF_PATH_A; i < 2; i++) { -+ if (odm_get_bb_reg(dm, lna_trim_addr[i], 0x00c00000) == 0x2) { -+ odm_set_rf_reg(dm, i, 0x88, 0x00000f00, (pg_lna[i] & 0xf)); -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g lna trim CG 0x%x path=%d\n", (pg_lna[i] & 0xf), i); -+ } else if (odm_get_bb_reg(dm, lna_trim_addr[i], 0x00c00000) == 0x3) { -+ odm_set_rf_reg(dm, i, 0x88, 0x00000f00, ((pg_lna[i] & 0xf0) >> 4)); -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g lna trim CS 0x%x path=%d\n", ((pg_lna[i] & 0xf0) >> 4), i); -+ } -+ } -+ -+ power_trim_info->lna_flag |= LNA_FLAG_ON; -+ } else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g lna trim no pg\n"); -+ } -+} -+ -+void phydm_set_lna_trim_offset_8197g(void *dm_void, u8 path, u8 cg_cs, u8 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *trim = &dm->power_trim_data; -+ -+ u8 i; -+ -+ if (enable == 0) { -+ for (i = RF_PATH_A; i < 2; i++) { -+ odm_set_rf_reg(dm, i, 0x88, 0x00000f00, 0x0); -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g diversity lna trim disable\n"); -+ } -+ return; -+ } -+ -+ /*cg*/ -+ if (cg_cs == 0) { -+ odm_set_rf_reg(dm, path, 0x88, 0x00000f00, (trim->lna_trim[path] & 0xf)); -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g diversity lna trim CG 0x%x path=%d\n", -+ (trim->lna_trim[path] & 0xf), path); -+ } else if (cg_cs == 1) { /*cs*/ -+ odm_set_rf_reg(dm, path, 0x88, 0x00000f00, ((trim->lna_trim[path] & 0xf0) >> 4)); -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8197g diversity lna trim CS 0x%x path=%d\n", -+ ((trim->lna_trim[path] & 0xf0) >> 4), path); -+ } -+} -+ -+ -+void phydm_get_thermal_trim_offset_8710c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0; -+ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_OFFSET_10C, &pg_therm, false); -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8710c Efuse thermal:0x%x\n", pg_therm); -+ -+ if (pg_therm != 0xff) { -+ pg_therm = pg_therm & 0x1f; -+ if ((pg_therm & BIT(0)) == 0) -+ power_trim_info->thermal = (-1 * (pg_therm >> 1)); -+ else -+ power_trim_info->thermal = (pg_therm >> 1); -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8710c thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8710c thermal:%d\n", -+ power_trim_info->thermal); -+} -+ -+void phydm_set_power_trim_offset_8710c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(18), 1); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 0); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x3f, -+ power_trim_info->bb_gain[0][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 1); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x3f, -+ power_trim_info->bb_gain[1][RF_PATH_A]); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, RFREGOFFSETMASK, 2); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0x3f, -+ power_trim_info->bb_gain[2][RF_PATH_A]); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(18), 0); -+} -+ -+void phydm_get_set_power_trim_offset_8710c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_power = 0, i, j; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GL_TX_10C, &pg_power, false); -+ -+ if (pg_power != 0xff) { -+ power_trim_info->bb_gain[0][RF_PATH_A] = pg_power & 0xf; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GM_TX_10C, &pg_power, false); -+ power_trim_info->bb_gain[1][RF_PATH_A] = pg_power & 0xf; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GH_TX_10C, &pg_power, false); -+ power_trim_info->bb_gain[2][RF_PATH_A] = pg_power & 0xf; -+ -+ phydm_set_power_trim_offset_8710c(dm); -+ -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8710c power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < MAX_RF_PATH; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8710c pwr_trim->bb_gain[%d][%d]=0x%X\n", -+ i, j, power_trim_info->bb_gain[i][j]); -+ } -+ } -+ } -+} -+ -+void phydm_get_set_pa_bias_offset_8710c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_pa_bias = 0xff; -+ u8 tx_pa_bias = 0; -+ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_10C, &pg_pa_bias, false); -+ -+ if (pg_pa_bias != 0xff) { -+ tx_pa_bias = pg_pa_bias & 0xf; -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8710c PathA_pa_bias:0x%x\n", tx_pa_bias); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, 0x60, 0x0000f000, tx_pa_bias); -+ -+ power_trim_info->pa_bias_flag |= PA_BIAS_FLAG_ON; -+ } else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8710c tx pa bias no pg\n"); -+ } -+} -+ -+void phydm_set_power_trim_offset_8814b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ u8 e_rf_path; -+ -+ for (e_rf_path = RF_PATH_A; e_rf_path < MAX_PATH_NUM_8814B; e_rf_path++) -+ { -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ odm_set_rf_reg(dm, e_rf_path, RF_0xee, BIT(19), 1); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON_2G) { -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x0); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[0][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x1); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[0][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x2); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[0][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x3); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[0][e_rf_path]); -+ } -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON_5G) { -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x4); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[3][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x5); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[4][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x6); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[5][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x7); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[6][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x8); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0x9); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[3][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xa); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[4][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xb); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[5][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xc); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[6][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xd); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][e_rf_path]); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x33, RFREGOFFSETMASK, 0xe); -+ odm_set_rf_reg(dm, e_rf_path, RF_0x30, RFREGOFFSETMASK, -+ power_trim_info->bb_gain[7][e_rf_path]); -+ } -+ -+ odm_set_rf_reg(dm, e_rf_path, RF_0xee, BIT(19), 0); -+ } -+ } -+} -+ -+void phydm_get_set_power_trim_offset_8814b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 i, j; -+ u8 pg_power1, pg_power2; -+ u8 pg_power_2g[2] = {0}, pg_power_5g[20] = {0}; -+ -+ odm_efuse_one_byte_read(dm, PPG_2GL_TXAB_14B, &pg_power_2g[0], false); -+ odm_efuse_one_byte_read(dm, PPG_2GL_TXCD_14B, &pg_power_2g[1], false); -+ -+ j = 0; -+ for (i = 0; i < 2; i++) { -+ if (pg_power_2g[i] == 0xff) -+ j++; -+ } -+ -+ if (j == 2) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b 2G power trim no PG\n"); -+ } else { -+ power_trim_info->bb_gain[0][RF_PATH_A] = pg_power_2g[0] & 0xf; -+ power_trim_info->bb_gain[0][RF_PATH_B] = (pg_power_2g[0] & 0xf0) >> 4; -+ -+ power_trim_info->bb_gain[0][RF_PATH_C] = pg_power_2g[1] & 0xf; -+ power_trim_info->bb_gain[0][RF_PATH_D] = (pg_power_2g[1] & 0xf0) >> 4; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G; -+ } -+ -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXA_14B, &pg_power_5g[0], false); -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXB_14B, &pg_power_5g[1], false); -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXC_14B, &pg_power_5g[2], false); -+ odm_efuse_one_byte_read(dm, PPG_5GL1_TXD_14B, &pg_power_5g[3], false); -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXA_14B, &pg_power_5g[4], false); -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXB_14B, &pg_power_5g[5], false); -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXC_14B, &pg_power_5g[6], false); -+ odm_efuse_one_byte_read(dm, PPG_5GL2_TXD_14B, &pg_power_5g[7], false); -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXA_14B, &pg_power_5g[8], false); -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXB_14B, &pg_power_5g[9], false); -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXC_14B, &pg_power_5g[10], false); -+ odm_efuse_one_byte_read(dm, PPG_5GM1_TXD_14B, &pg_power_5g[11], false); -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXA_14B, &pg_power_5g[12], false); -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXB_14B, &pg_power_5g[13], false); -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXC_14B, &pg_power_5g[14], false); -+ odm_efuse_one_byte_read(dm, PPG_5GM2_TXD_14B, &pg_power_5g[15], false); -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXA_14B, &pg_power_5g[16], false); -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXB_14B, &pg_power_5g[17], false); -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXC_14B, &pg_power_5g[18], false); -+ odm_efuse_one_byte_read(dm, PPG_5GH1_TXD_14B, &pg_power_5g[19], false); -+ -+ j = 0; -+ for (i = 0; i < 20; i++) { -+ if (pg_power_5g[i] == 0xff) -+ j++; -+ } -+ -+ if (j == 20) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b 5G power trim no PG\n"); -+ } else { -+ power_trim_info->bb_gain[3][RF_PATH_A] = pg_power_5g[0] & 0x1f; -+ power_trim_info->bb_gain[3][RF_PATH_B] = pg_power_5g[1] & 0x1f; -+ power_trim_info->bb_gain[3][RF_PATH_C] = pg_power_5g[2] & 0x1f; -+ power_trim_info->bb_gain[3][RF_PATH_D] = pg_power_5g[3] & 0x1f; -+ -+ power_trim_info->bb_gain[4][RF_PATH_A] = pg_power_5g[4] & 0x1f; -+ power_trim_info->bb_gain[4][RF_PATH_B] = pg_power_5g[5] & 0x1f; -+ power_trim_info->bb_gain[4][RF_PATH_C] = pg_power_5g[6] & 0x1f; -+ power_trim_info->bb_gain[4][RF_PATH_D] = pg_power_5g[7] & 0x1f; -+ -+ power_trim_info->bb_gain[5][RF_PATH_A] = pg_power_5g[8] & 0x1f; -+ power_trim_info->bb_gain[5][RF_PATH_B] = pg_power_5g[9] & 0x1f; -+ power_trim_info->bb_gain[5][RF_PATH_C] = pg_power_5g[10] & 0x1f; -+ power_trim_info->bb_gain[5][RF_PATH_D] = pg_power_5g[11] & 0x1f; -+ -+ power_trim_info->bb_gain[6][RF_PATH_A] = pg_power_5g[12] & 0x1f; -+ power_trim_info->bb_gain[6][RF_PATH_B] = pg_power_5g[13] & 0x1f; -+ power_trim_info->bb_gain[6][RF_PATH_C] = pg_power_5g[14] & 0x1f; -+ power_trim_info->bb_gain[6][RF_PATH_D] = pg_power_5g[15] & 0x1f; -+ -+ power_trim_info->bb_gain[7][RF_PATH_A] = pg_power_5g[16] & 0x1f; -+ power_trim_info->bb_gain[7][RF_PATH_B] = pg_power_5g[17] & 0x1f; -+ power_trim_info->bb_gain[7][RF_PATH_C] = pg_power_5g[18] & 0x1f; -+ power_trim_info->bb_gain[7][RF_PATH_D] = pg_power_5g[19] & 0x1f; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_5G; -+ -+ } -+ -+ phydm_set_power_trim_offset_8814b(dm); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b power trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ if (power_trim_info->flag & KFREE_FLAG_ON) { -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < MAX_PATH_NUM_8814B; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b pwr_trim->bb_gain[%d][%d]=0x%X\n", -+ i, j, power_trim_info->bb_gain[i][j]); -+ } -+ } -+ } -+} -+ -+void phydm_get_tssi_trim_offset_8814b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 i, j; -+ u8 tssi_trim_2g[8] = {0}, tssi_trim_5g[24] = {0}; -+ -+ odm_efuse_one_byte_read(dm, TSSI_2GM_TXA_14B, &tssi_trim_2g[0], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GM_TXB_14B, &tssi_trim_2g[1], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GM_TXC_14B, &tssi_trim_2g[2], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GM_TXD_14B, &tssi_trim_2g[3], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GH_TXA_14B, &tssi_trim_2g[4], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GH_TXB_14B, &tssi_trim_2g[5], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GH_TXC_14B, &tssi_trim_2g[6], false); -+ odm_efuse_one_byte_read(dm, TSSI_2GH_TXD_14B, &tssi_trim_2g[7], false); -+ -+ j = 0; -+ for (i = 0; i < 8; i++) { -+ if (tssi_trim_2g[i] == 0xff) -+ j++; -+ } -+ -+ if (j == 8) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b 2g tssi trim no PG\n"); -+ } else { -+ power_trim_info->tssi_trim[0][RF_PATH_A] = (s8)tssi_trim_2g[0]; -+ power_trim_info->tssi_trim[0][RF_PATH_B] = (s8)tssi_trim_2g[1]; -+ power_trim_info->tssi_trim[0][RF_PATH_C] = (s8)tssi_trim_2g[2]; -+ power_trim_info->tssi_trim[0][RF_PATH_D] = (s8)tssi_trim_2g[3]; -+ power_trim_info->tssi_trim[1][RF_PATH_A] = (s8)tssi_trim_2g[0]; -+ power_trim_info->tssi_trim[1][RF_PATH_B] = (s8)tssi_trim_2g[1]; -+ power_trim_info->tssi_trim[1][RF_PATH_C] = (s8)tssi_trim_2g[2]; -+ power_trim_info->tssi_trim[1][RF_PATH_D] = (s8)tssi_trim_2g[3]; -+ power_trim_info->tssi_trim[2][RF_PATH_A] = (s8)tssi_trim_2g[4]; -+ power_trim_info->tssi_trim[2][RF_PATH_B] = (s8)tssi_trim_2g[5]; -+ power_trim_info->tssi_trim[2][RF_PATH_C] = (s8)tssi_trim_2g[6]; -+ power_trim_info->tssi_trim[2][RF_PATH_D] = (s8)tssi_trim_2g[7]; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | TSSI_TRIM_FLAG_ON | KFREE_FLAG_ON_2G; -+ -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < MAX_PATH_NUM_8814B; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 2g tssi_trim[%d][%d]=0x%X\n", -+ i, j, power_trim_info->tssi_trim[i][j]); -+ } -+ } -+ } -+ -+ odm_efuse_one_byte_read(dm, TSSI_5GL1_TXA_14B, &tssi_trim_5g[0], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL1_TXB_14B, &tssi_trim_5g[1], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL1_TXC_14B, &tssi_trim_5g[2], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL1_TXD_14B, &tssi_trim_5g[3], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL2_TXA_14B, &tssi_trim_5g[4], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL2_TXB_14B, &tssi_trim_5g[5], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL2_TXC_14B, &tssi_trim_5g[6], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GL2_TXD_14B, &tssi_trim_5g[7], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM1_TXA_14B, &tssi_trim_5g[8], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM1_TXB_14B, &tssi_trim_5g[9], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM1_TXC_14B, &tssi_trim_5g[10], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM1_TXD_14B, &tssi_trim_5g[11], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM2_TXA_14B, &tssi_trim_5g[12], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM2_TXB_14B, &tssi_trim_5g[13], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM2_TXC_14B, &tssi_trim_5g[14], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GM2_TXD_14B, &tssi_trim_5g[15], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH1_TXA_14B, &tssi_trim_5g[16], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH1_TXB_14B, &tssi_trim_5g[17], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH1_TXC_14B, &tssi_trim_5g[18], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH1_TXD_14B, &tssi_trim_5g[19], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH2_TXA_14B, &tssi_trim_5g[20], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH2_TXB_14B, &tssi_trim_5g[21], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH2_TXC_14B, &tssi_trim_5g[22], false); -+ odm_efuse_one_byte_read(dm, TSSI_5GH2_TXD_14B, &tssi_trim_5g[23], false); -+ -+ j = 0; -+ for (i = 0; i < 24; i++) { -+ if (tssi_trim_5g[i] == 0xff) -+ j++; -+ } -+ -+ if (j == 24) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b 5g tssi trim no PG\n"); -+ } else { -+ power_trim_info->tssi_trim[3][RF_PATH_A] = (s8)tssi_trim_5g[0]; -+ power_trim_info->tssi_trim[3][RF_PATH_B] = (s8)tssi_trim_5g[1]; -+ power_trim_info->tssi_trim[3][RF_PATH_C] = (s8)tssi_trim_5g[2]; -+ power_trim_info->tssi_trim[3][RF_PATH_D] = (s8)tssi_trim_5g[3]; -+ power_trim_info->tssi_trim[4][RF_PATH_A] = (s8)tssi_trim_5g[4]; -+ power_trim_info->tssi_trim[4][RF_PATH_B] = (s8)tssi_trim_5g[5]; -+ power_trim_info->tssi_trim[4][RF_PATH_C] = (s8)tssi_trim_5g[6]; -+ power_trim_info->tssi_trim[4][RF_PATH_D] = (s8)tssi_trim_5g[7]; -+ power_trim_info->tssi_trim[5][RF_PATH_A] = (s8)tssi_trim_5g[8]; -+ power_trim_info->tssi_trim[5][RF_PATH_B] = (s8)tssi_trim_5g[9]; -+ power_trim_info->tssi_trim[5][RF_PATH_C] = (s8)tssi_trim_5g[10]; -+ power_trim_info->tssi_trim[5][RF_PATH_D] = (s8)tssi_trim_5g[11]; -+ power_trim_info->tssi_trim[6][RF_PATH_A] = (s8)tssi_trim_5g[12]; -+ power_trim_info->tssi_trim[6][RF_PATH_B] = (s8)tssi_trim_5g[13]; -+ power_trim_info->tssi_trim[6][RF_PATH_C] = (s8)tssi_trim_5g[14]; -+ power_trim_info->tssi_trim[6][RF_PATH_D] = (s8)tssi_trim_5g[15]; -+ power_trim_info->tssi_trim[7][RF_PATH_A] = (s8)tssi_trim_5g[16]; -+ power_trim_info->tssi_trim[7][RF_PATH_B] = (s8)tssi_trim_5g[17]; -+ power_trim_info->tssi_trim[7][RF_PATH_C] = (s8)tssi_trim_5g[18]; -+ power_trim_info->tssi_trim[7][RF_PATH_D] = (s8)tssi_trim_5g[19]; -+ power_trim_info->tssi_trim[8][RF_PATH_A] = (s8)tssi_trim_5g[20]; -+ power_trim_info->tssi_trim[8][RF_PATH_B] = (s8)tssi_trim_5g[21]; -+ power_trim_info->tssi_trim[8][RF_PATH_C] = (s8)tssi_trim_5g[22]; -+ power_trim_info->tssi_trim[8][RF_PATH_D] = (s8)tssi_trim_5g[23]; -+ -+ power_trim_info->flag = -+ power_trim_info->flag | TSSI_TRIM_FLAG_ON | KFREE_FLAG_ON_5G; -+ -+ for (i = 0; i < KFREE_BAND_NUM; i++) { -+ for (j = 0; j < MAX_PATH_NUM_8814B; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 5g tssi_trim[%d][%d]=0x%X\n", -+ i, j, power_trim_info->tssi_trim[i][j]); -+ } -+ } -+ } -+} -+ -+s8 phydm_get_tssi_trim_de_8814b(void *dm_void, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 channel = *dm->channel, group = 0; -+ -+ if (channel >= 1 && channel <= 3) -+ group = 0; -+ else if (channel >= 4 && channel <= 9) -+ group = 1; -+ else if (channel >= 10 && channel <= 14) -+ group = 2; -+ else if (channel >= 36 && channel <= 50) -+ group = 3; -+ else if (channel >= 52 && channel <= 64) -+ group = 4; -+ else if (channel >= 100 && channel <= 118) -+ group = 5; -+ else if (channel >= 120 && channel <= 144) -+ group = 6; -+ else if (channel >= 149 && channel <= 165) -+ group = 7; -+ else if (channel >= 167 && channel <= 177) -+ group = 8; -+ else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] Channel(%d) is not exist in Group\n", -+ channel); -+ return 0; -+ } -+ -+ return power_trim_info->tssi_trim[group][path]; -+} -+ -+void phydm_set_pabias_bandedge_2g_rf_8814b(void *dm_void) -+{ -+#if 0 -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u32 rf_reg_51 = 0, rf_reg_52 = 0, rf_reg_53 = 0, rf_reg_3f = 0; -+ u8 i, j; -+ s32 pa_bias_tmp, bandedge_tmp, reg_tmp; -+ -+#if 0 -+ /*2.4G bias*/ -+ /*rf3f == rf53*/ -+#endif -+ for (i = 0; i < MAX_PATH_NUM_8814B; i++) { -+ rf_reg_51 = odm_get_rf_reg(dm, i, RF_0x51, RFREGOFFSETMASK); -+ rf_reg_52 = odm_get_rf_reg(dm, i, RF_0x52, RFREGOFFSETMASK); -+ rf_reg_53 = odm_get_rf_reg(dm, i, RF_0x53, RFREGOFFSETMASK); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 2g rf(0x51)=0x%X rf(0x52)=0x%X rf(0x53)=0x%X path=%d\n", -+ rf_reg_51, rf_reg_52, rf_reg_53, i); -+ -+ /*2.4G bias*/ -+ rf_reg_3f = rf_reg_53; -+ pa_bias_tmp = rf_reg_3f & 0xf; -+ -+ reg_tmp = pa_bias_tmp + power_trim_info->pa_bias_trim[0][i]; -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 2g pa bias reg_tmp(%d) = pa_bias_tmp(%d) + power_trim_info->pa_bias_trim[0][%d](%d)\n", -+ reg_tmp, pa_bias_tmp, i, power_trim_info->pa_bias_trim[0][i]); -+ -+#if 0 -+ if (reg_tmp < 0) { -+ reg_tmp = 0; -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 2g pa bias reg_tmp < 0. Set 0 path=%d\n", i); -+ } else if (reg_tmp > 7) { -+ reg_tmp = 7; -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 2g pa bias reg_tmp > 7. Set 7 path=%d\n", i); -+ } -+#endif -+ -+ rf_reg_3f = ((rf_reg_3f & 0xffff0) | reg_tmp); -+ rf_reg_3f = ((rf_reg_3f & 0x0ffff) | 0x10000); -+ -+ odm_set_rf_reg(dm, i, RF_0xef, BIT(10), 0x1); -+ for (j = 0; j <= 0xf; j++) { -+ odm_set_rf_reg(dm, i, RF_0x30, RFREGOFFSETMASK, (j << 16)); -+ odm_set_rf_reg(dm, i, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 2G pa bias write RF_0x30=0x%05x RF_0x3f=0x%x path=%d\n", -+ (j << 16), rf_reg_3f, i); -+ } -+ odm_set_rf_reg(dm, i, RF_0xef, BIT(10), 0x0); -+ -+#if 0 -+ /*2.4G bandedge*/ -+ /*rf3f =>*/ -+ /*rf51[3:1] = rf3f[17:15]*/ -+ /*rf52[2:0] = rf3f[14:12]*/ -+ /*rf52[18] = rf3f[11]*/ -+ /*rf51[6:4] = rf3f[10:8]*/ -+ /*rf51[11:8] = rf3f[7:4]*/ -+ /*rf51[16:13] = rf3f[3:0]*/ -+#endif -+ /*2.4G bandedge*/ -+ rf_reg_3f = (((rf_reg_51 & 0xe) >> 1) << 15) | -+ ((rf_reg_52 & 0x7) << 12) | -+ (((rf_reg_52 & 0x40000) >> 18) << 11) | -+ (((rf_reg_51 & 0x70) >> 4) << 8) | -+ (((rf_reg_51 & 0xf00) >> 8) << 4) | -+ ((rf_reg_51 & 0x1e000) >> 13); -+ -+ bandedge_tmp = rf_reg_3f & 0xf; -+ -+ reg_tmp = bandedge_tmp + power_trim_info->pa_bias_trim[0][i]; -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 2g bandedge reg_tmp(%d) = bandedge_tmp(%d) + power_trim_info->pa_bias_trim[0][%d](%d)\n", -+ reg_tmp, bandedge_tmp, i, power_trim_info->pa_bias_trim[0][i]); -+ -+#if 0 -+ if (reg_tmp < 0) { -+ reg_tmp = 0; -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 2g bandedge reg_tmp < 0. Set 0 path=%d\n", i); -+ } else if (reg_tmp > 7) { -+ reg_tmp = 7; -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 2g bandedge reg_tmp > 7. Set 7 path=%d\n", i); -+ } -+#endif -+ -+ rf_reg_3f = ((rf_reg_3f & 0xffff0) | reg_tmp); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 2G bandedge RF_0x30=0x%05X RF_0x3f=0x%x path=%d\n", -+ 0x00001, rf_reg_3f, i); -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 2G bandedge RF_0x30=0x%05X RF_0x3f=0x%x path=%d\n", -+ 0x0000b, rf_reg_3f, i); -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 2G bandedge RF_0x30=0x%05X RF_0x3f=0x%x path=%d\n", -+ 0x00023, rf_reg_3f, i); -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 2G bandedge RF_0x30=0x%05X RF_0x3f=0x%x path=%d\n", -+ 0x00029, rf_reg_3f, i); -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 2G bandedge RF_0x30=0x%05X RF_0x3f=0x%x path=%d\n", -+ 0x0002a, rf_reg_3f, i); -+ -+ odm_set_rf_reg(dm, i, RF_0xef, BIT(8), 0x1); -+ odm_set_rf_reg(dm, i, RF_0x33, RFREGOFFSETMASK, 0x00001); -+ odm_set_rf_reg(dm, i, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); -+ odm_set_rf_reg(dm, i, RF_0x33, RFREGOFFSETMASK, 0x0000b); -+ odm_set_rf_reg(dm, i, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); -+ odm_set_rf_reg(dm, i, RF_0x33, RFREGOFFSETMASK, 0x00023); -+ odm_set_rf_reg(dm, i, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); -+ odm_set_rf_reg(dm, i, RF_0x33, RFREGOFFSETMASK, 0x00029); -+ odm_set_rf_reg(dm, i, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); -+ odm_set_rf_reg(dm, i, RF_0x33, RFREGOFFSETMASK, 0x0002a); -+ odm_set_rf_reg(dm, i, RF_0x3f, RFREGOFFSETMASK, rf_reg_3f); -+ odm_set_rf_reg(dm, i, RF_0xef, BIT(8), 0x0); -+ -+ } -+#endif -+} -+ -+void phydm_set_pabias_bandedge_5g_rf_8814b(void *dm_void) -+{ -+#if 0 -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u32 rf_reg_18[MAX_PATH_NUM_8814B] = {0}, -+ rf_reg_61[15][MAX_PATH_NUM_8814B] = {0}, -+ rf_reg_62[3][MAX_PATH_NUM_8814B] = {0}; -+ u8 i, j; -+ u32 bandedge[15][MAX_PATH_NUM_8814B] = {0}, -+ pa_bias[3][MAX_PATH_NUM_8814B] = {0}; -+ -+ s32 pa_bias_tmp, reg_tmp; -+ -+ -+ for (i = 0; i < MAX_PATH_NUM_8814B; i++) { -+ rf_reg_18[i] = odm_get_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK); -+ -+ for (j = 0; j < 3; j++) { -+ if (j == 0) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x10d24); -+ else if (j == 1) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x30d64); -+ else if (j == 2) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x50da9); -+ -+ rf_reg_62[j][i] = odm_get_rf_reg(dm, i, 0x62, RFREGOFFSETMASK); -+ -+#if 0 -+ /*5G bias*/ -+ /*rf62[19:16] == rf30[11:8]*/ -+ /*rf62[15:12] == rf30[7:4]*/ -+ /*rf62[11:8] == rf3030[3:0]*/ -+#endif -+ pa_bias[j][i] = (((rf_reg_62[j][i] & 0xf0000) >> 16) << 8) | -+ (((rf_reg_62[j][i] & 0xf000) >> 12) << 4) | -+ ((rf_reg_62[j][i] & 0xf00) >> 8); -+ } -+ -+ for (j = 0; j < 15; j++) { -+ if (j == 0) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x10d24);/*ch36*/ -+ else if (j == 1) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x11926);/*ch38*/ -+ else if (j == 2) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x1252a);/*ch42*/ -+ else if (j == 3) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x1253a);/*ch58*/ -+ else if (j == 4) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x1193e);/*ch62*/ -+ else if (j == 5) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x10d40);/*ch64*/ -+ else if (j == 6) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x30d64);/*ch100*/ -+ else if (j == 7) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x31966);/*ch102*/ -+ else if (j == 8) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x3256a);/*ch106*/ -+ else if (j == 9) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x3257a);/*ch122*/ -+ else if (j == 10) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x31986);/*ch134*/ -+ else if (j == 11) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x30d8c);/*ch140*/ -+ else if (j == 12) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x50d95);/*ch149*/ -+ else if (j == 13) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x51997);/*ch151*/ -+ else if (j == 14) -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, 0x5259b);/*ch155*/ -+ -+ -+ rf_reg_61[j][i] = odm_get_rf_reg(dm, i, RF_0x61, RFREGOFFSETMASK); -+#if 0 -+ /*5G bandedge*/ -+ /*rf61[11:8] == rf30[11:8]*/ -+ /*rf61[7:4] == rf30[7:4]*/ -+ /*rf61[3:0] == rf3030[3:0]*/ -+#endif -+ bandedge[j][i] = rf_reg_61[j][i] & 0xfff; -+ } -+ -+ odm_set_rf_reg(dm, i, RF_0x18, RFREGOFFSETMASK, rf_reg_18[i]); -+ } -+ -+ for (i = 0; i < MAX_PATH_NUM_8814B; i++) { -+ for (j = 0; j < 3; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] pa_bias[%d][%d]=0x%x\n", j, i, pa_bias[j][i]); -+ } -+ } -+ -+ for (i = 0; i < MAX_PATH_NUM_8814B; i++) { -+ for (j = 0; j < 15; j++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] bandedge[%d][%d]=0x%x\n", j, i, bandedge[j][i]); -+ } -+ } -+ -+ /*5G bias*/ -+ for (i = 0; i < MAX_PATH_NUM_8814B; i++) { -+ odm_set_rf_reg(dm, i, RF_0xee, BIT(8), 0x1); -+ for (j = 0; j <= 0xb; j++) { -+ -+ if (j >= 0 && j <= 3) -+ pa_bias_tmp = pa_bias[0][i] & 0xf; -+ else if (j >= 4 && j <= 0x7) -+ pa_bias_tmp = pa_bias[1][i] & 0xf; -+ else if (j >= 0x8 && j <= 0xb) -+ pa_bias_tmp = pa_bias[2][i] & 0xf; -+ -+ reg_tmp = pa_bias_tmp + power_trim_info->pa_bias_trim[1][i]; -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 5g pa bias reg_tmp(%d) = pa_bias_tmp(%d) + power_trim_info->pa_bias_trim[1][%d](%d)\n", -+ reg_tmp, pa_bias_tmp, i, power_trim_info->pa_bias_trim[1][i]); -+#if 0 -+ if (reg_tmp < 0) { -+ reg_tmp = 0; -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 5g pa bias reg_tmp < 0. Set 0 path=%d\n", i); -+ } else if (reg_tmp > 7) { -+ reg_tmp = 7; -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 5g pa bias reg_tmp > 7. Set 7 path=%d\n", i); -+ } -+#endif -+ if (j >= 0 && j <= 3) -+ reg_tmp = ((pa_bias[0][i] & 0xffff0) | reg_tmp | (j << 12)); -+ else if (j >= 4 && j <= 0x7) -+ reg_tmp = ((pa_bias[1][i] & 0xffff0) | reg_tmp | (j << 12)); -+ else if (j >= 0x8 && j <= 0xb) -+ reg_tmp = ((pa_bias[2][i] & 0xffff0) | reg_tmp | (j << 12)); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b write RF_0x30=0x%05x path=%d\n", -+ reg_tmp, i); -+ -+ odm_set_rf_reg(dm, i, RF_0x30, RFREGOFFSETMASK, reg_tmp); -+ } -+ odm_set_rf_reg(dm, i, RF_0xee, BIT(8), 0x0); -+ } -+ -+ /*5G bandedge*/ -+ for (i = 0; i < MAX_PATH_NUM_8814B; i++) { -+ odm_set_rf_reg(dm, i, RF_0xee, BIT(9), 0x1); -+ for (j = 0; j <= 0xe; j++) { -+ reg_tmp = bandedge[j][i] + power_trim_info->pa_bias_trim[1][i]; -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b 5g bandedge reg_tmp(%d)(0x%X) = bandedge_org(%d) + power_trim_info->pa_bias_trim[1][%d](%d)\n", -+ reg_tmp, reg_tmp, bandedge[j][i], i, power_trim_info->pa_bias_trim[1][i]); -+#if 0 -+ if (reg_tmp < 0) { -+ reg_tmp = 0; -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 5g bandedge reg_tmp < 0. Set 0 path=%d\n", i); -+ } else if (reg_tmp > 7) { -+ reg_tmp = 7; -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 5g bandedge reg_tmp > 7. Set 7 path=%d\n", i); -+ } -+#endif -+ -+ reg_tmp = ((bandedge[j][i] & 0xffff0) | reg_tmp | (j << 12)); -+ -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] 8814b write RF_0x30=0x%05x path=%d\n", -+ reg_tmp, i); -+ -+ odm_set_rf_reg(dm, i, RF_0x30, RFREGOFFSETMASK, reg_tmp); -+ } -+ odm_set_rf_reg(dm, i, RF_0xee, BIT(9), 0x0); -+ } -+ -+#endif -+} -+ -+ -+void phydm_get_pa_bias_offset_8814b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 i, j, k; -+ u8 tssi_pa_bias_2g[2] = {0}, tssi_pa_bias_5g[2] = {0}; -+ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GAC_14B, &tssi_pa_bias_2g[0], false); -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_2GBD_14B, &tssi_pa_bias_2g[1], false); -+ -+ j = 0; -+ for (i = 0; i < 2; i++) { -+ if (tssi_pa_bias_2g[i] == 0xff) -+ j++; -+ } -+ -+ if (j == 2) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b 2g PA Bias K no PG\n"); -+ } else { -+ power_trim_info->pa_bias_trim[0][RF_PATH_A] = tssi_pa_bias_2g[0] & 0xf; -+ power_trim_info->pa_bias_trim[0][RF_PATH_C] = (tssi_pa_bias_2g[0] & 0xf0) >> 4; -+ power_trim_info->pa_bias_trim[0][RF_PATH_B] = tssi_pa_bias_2g[1] & 0xf; -+ power_trim_info->pa_bias_trim[0][RF_PATH_D] = (tssi_pa_bias_2g[1] & 0xf0) >> 4; -+ -+ for (k = 0; k < MAX_PATH_NUM_8814B; k++) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b 2g PA Bias K efuse:0x%x path=%d\n", -+ power_trim_info->pa_bias_trim[0][k], k); -+ odm_set_rf_reg(dm, k, 0x60, 0x0000f000, power_trim_info->pa_bias_trim[0][k]); -+ } -+ -+#if 0 -+ for (k = 0; k < MAX_PATH_NUM_8814B; k++) { -+ if ((power_trim_info->pa_bias_trim[0][k] & BIT(0)) == 0) -+ power_trim_info->pa_bias_trim[0][k] = (-1 * (power_trim_info->pa_bias_trim[0][k] >> 1)); -+ else -+ power_trim_info->pa_bias_trim[0][k] = (power_trim_info->pa_bias_trim[0][k] >> 1); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b 2g PA Bias K power_trim_info->pa_bias_trim[0][%d]=0x%x\n", -+ k, power_trim_info->pa_bias_trim[0][k]); -+ } -+ -+ phydm_set_pabias_bandedge_2g_rf_8814b(dm); -+#endif -+ } -+ -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_5GAC_14B, &tssi_pa_bias_5g[0], false); -+ odm_efuse_one_byte_read(dm, PPG_PABIAS_5GBD_14B, &tssi_pa_bias_5g[1], false); -+ -+ j = 0; -+ for (i = 0; i < 2; i++) { -+ if (tssi_pa_bias_5g[i] == 0xff) -+ j++; -+ } -+ -+ if (j == 2) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b 5g PA Bias K no PG\n"); -+ } else { -+ power_trim_info->pa_bias_trim[1][RF_PATH_A] = tssi_pa_bias_5g[0] & 0xf; -+ power_trim_info->pa_bias_trim[1][RF_PATH_C] = (tssi_pa_bias_5g[0] & 0xf0) >> 4; -+ power_trim_info->pa_bias_trim[1][RF_PATH_B] = tssi_pa_bias_5g[1] & 0xf; -+ power_trim_info->pa_bias_trim[1][RF_PATH_D] = (tssi_pa_bias_5g[1] & 0xf0) >> 4; -+ -+ for (k = 0; k < MAX_PATH_NUM_8814B; k++) { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b 5g PA Bias K efuse:0x%x path=%d\n", -+ power_trim_info->pa_bias_trim[1][k], k); -+ -+ odm_set_rf_reg(dm, k, 0x60, 0x000f0000, power_trim_info->pa_bias_trim[1][k]); -+ } -+#if 0 -+ for (k = 0; k < MAX_PATH_NUM_8814B; k++) { -+ if ((power_trim_info->pa_bias_trim[1][k] & BIT(0)) == 0) -+ power_trim_info->pa_bias_trim[1][k] = (-1 * (power_trim_info->pa_bias_trim[1][k] >> 1)); -+ else -+ power_trim_info->pa_bias_trim[1][k] = (power_trim_info->pa_bias_trim[1][k] >> 1); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b 5g PA Bias K power_trim_info->pa_bias_trim[1][%d]=0x%x\n", -+ k, power_trim_info->pa_bias_trim[1][k]); -+ } -+ -+ phydm_set_pabias_bandedge_5g_rf_8814b(dm); -+#endif -+ } -+ -+ -+} -+ -+void phydm_get_thermal_trim_offset_8814b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ u8 pg_therm = 0xff, i; -+ -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_A_OFFSET_14B, &pg_therm, false); -+ -+ if (pg_therm != 0xff) { -+ for (i = 0; i < MAX_PATH_NUM_8814B; i++) { -+ if (i == 0) -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_A_OFFSET_14B, &pg_therm, false); -+ else if (i == 1) -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_B_OFFSET_14B, &pg_therm, false); -+ else if (i == 2) -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_C_OFFSET_14B, &pg_therm, false); -+ else if (i == 3) -+ odm_efuse_one_byte_read(dm, PPG_THERMAL_D_OFFSET_14B, &pg_therm, false); -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b Efuse thermal S%d:0x%x\n", i, pg_therm); -+ pg_therm = pg_therm & 0x1f; -+ if ((pg_therm & BIT(0)) == 0) -+ power_trim_info->multi_thermal[i] = (-1 * (pg_therm >> 1)); -+ else -+ power_trim_info->multi_thermal[i] = (pg_therm >> 1); -+ } -+ -+ power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b thermal trim flag:0x%02x\n", -+ power_trim_info->flag); -+ -+ for (i = 0; i < MAX_RF_PATH; i++) { -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] 8814b thermal S%d:%d\n", -+ i ,power_trim_info->multi_thermal[i]); -+ } -+} -+ -+s8 phydm_get_tssi_trim_de(void *dm_void, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_RTL8822C) -+ return phydm_get_tssi_trim_de_8822c(dm, path); -+ else if (dm->support_ic_type & ODM_RTL8812F) -+ return phydm_get_tssi_trim_de_8812f(dm, path); -+ else if (dm->support_ic_type & ODM_RTL8197G) -+ return phydm_get_tssi_trim_de_8197g(dm, path); -+ else if (dm->support_ic_type & ODM_RTL8814B) -+ return phydm_get_tssi_trim_de_8814b(dm, path); -+ else -+ return 0; -+} -+ -+void phydm_do_new_kfree(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_RTL8822C) { -+ phydm_get_set_thermal_trim_offset_8822c(dm); -+ phydm_get_set_power_trim_offset_8822c(dm); -+ phydm_get_set_pa_bias_offset_8822c(dm); -+ phydm_get_tssi_trim_offset_8822c(dm); -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8812F) { -+ phydm_get_set_thermal_trim_offset_8812f(dm); -+ phydm_get_set_power_trim_offset_8812f(dm); -+ phydm_get_set_pa_bias_offset_8812f(dm); -+ phydm_get_tssi_trim_offset_8812f(dm); -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8195B) { -+ phydm_get_thermal_trim_offset_8195b(dm); -+ phydm_get_set_power_trim_offset_8195b(dm); -+ phydm_get_set_pa_bias_offset_8195b(dm); -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8721D) { -+ phydm_get_thermal_trim_offset_8721d(dm); -+ phydm_get_set_power_trim_offset_8721d(dm); -+ /*phydm_get_set_pa_bias_offset_8721d(dm);*/ -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8198F) { -+ phydm_get_pa_bias_offset_8198f(dm); -+ phydm_get_set_lna_offset_8198f(dm); -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8197G) { -+ phydm_get_thermal_trim_offset_8197g(dm); -+ phydm_get_set_power_trim_offset_8197g(dm); -+ phydm_get_set_pa_bias_offset_8197g(dm); -+ phydm_get_tssi_trim_offset_8197g(dm); -+ phydm_get_set_lna_offset_8197g(dm); -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8710C) { -+ phydm_get_thermal_trim_offset_8710c(dm); -+ phydm_get_set_power_trim_offset_8710c(dm); -+ phydm_get_set_pa_bias_offset_8710c(dm); -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ phydm_get_thermal_trim_offset_8814b(dm); -+ phydm_get_set_power_trim_offset_8814b(dm); -+ phydm_get_pa_bias_offset_8814b(dm); -+ phydm_get_tssi_trim_offset_8814b(dm); -+ } -+} -+ -+void phydm_set_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_RTL8814A) -+ phydm_set_kfree_to_rf_8814a(dm, e_rf_path, data); -+ -+ if ((dm->support_ic_type & ODM_RTL8821C) && -+ (*dm->band_type == ODM_BAND_2_4G)) -+ phydm_set_kfree_to_rf_8821c(dm, e_rf_path, true, data); -+ else if (dm->support_ic_type & ODM_RTL8821C) -+ phydm_set_kfree_to_rf_8821c(dm, e_rf_path, false, data); -+ -+ if (dm->support_ic_type & ODM_RTL8822B) -+ phydm_set_kfree_to_rf_8822b(dm, e_rf_path, data); -+ -+ if (dm->support_ic_type & ODM_RTL8710B) -+ phydm_set_kfree_to_rf_8710b(dm, e_rf_path, data); -+ -+ if (dm->support_ic_type & ODM_RTL8198F) -+ phydm_set_kfree_to_rf_8198f(dm, e_rf_path, data); -+} -+ -+void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_RTL8822B) -+ phydm_clear_kfree_to_rf_8822b(dm, e_rf_path, 1); -+ -+ if (dm->support_ic_type & ODM_RTL8821C) -+ phydm_clear_kfree_to_rf_8821c(dm, e_rf_path, 1); -+ -+ if (dm->support_ic_type & ODM_RTL8198F) -+ phydm_clear_kfree_to_rf_8198f(dm, e_rf_path, 0); -+} -+ -+void phydm_get_thermal_trim_offset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal; -+ u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2]; -+ -+ if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO((PADAPTER)adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] dump efuse fail !!!\n"); -+#endif -+ -+ if (dm->support_ic_type & ODM_RTL8821C) -+ phydm_get_thermal_trim_offset_8821c(dm_void); -+ else if (dm->support_ic_type & ODM_RTL8822B) -+ phydm_get_thermal_trim_offset_8822b(dm_void); -+ else if (dm->support_ic_type & ODM_RTL8710B) -+ phydm_get_thermal_trim_offset_8710b(dm_void); -+ else if (dm->support_ic_type & ODM_RTL8192F) -+ phydm_get_thermal_trim_offset_8192f(dm_void); -+ else if (dm->support_ic_type & ODM_RTL8198F) -+ phydm_get_thermal_trim_offset_8198f(dm_void); -+} -+ -+void phydm_get_power_trim_offset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if 0 //(DM_ODM_SUPPORT_TYPE & ODM_WIN) // 2017 MH DM Should use the same code.s -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal; -+ u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2]; -+ -+ if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO(adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] dump efuse fail !!!\n"); -+#endif -+ -+ if (dm->support_ic_type & ODM_RTL8821C) -+ phydm_get_power_trim_offset_8821c(dm_void); -+ else if (dm->support_ic_type & ODM_RTL8822B) -+ phydm_get_power_trim_offset_8822b(dm_void); -+ else if (dm->support_ic_type & ODM_RTL8710B) -+ phydm_get_power_trim_offset_8710b(dm_void); -+ else if (dm->support_ic_type & ODM_RTL8192F) -+ phydm_get_power_trim_offset_8192f(dm_void); -+ else if (dm->support_ic_type & ODM_RTL8198F) -+ phydm_get_power_trim_offset_8198f(dm_void); -+} -+ -+void phydm_get_pa_bias_offset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ PEFUSE_HAL pEfuseHal = &hal_data->EfuseHal; -+ u1Byte eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2]; -+ -+ if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO((PADAPTER)adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS) -+ RF_DBG(dm, DBG_RF_MP, "[kfree] dump efuse fail !!!\n"); -+#endif -+ -+ if (dm->support_ic_type & ODM_RTL8822B) -+ phydm_get_pa_bias_offset_8822b(dm_void); -+} -+ -+s8 phydm_get_thermal_offset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ return power_trim_info->thermal; -+ else -+ return 0; -+} -+ -+s8 phydm_get_multi_thermal_offset(void *dm_void, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *power_trim_info = &dm->power_trim_data; -+ -+ if (power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON) -+ return power_trim_info->multi_thermal[path]; -+ else -+ return 0; -+} -+ -+void phydm_do_kfree(void *dm_void, u8 channel_to_sw) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_power_trim_data *pwrtrim = &dm->power_trim_data; -+ u8 channel_idx = 0, rfpath = 0, max_path = 0, kfree_band_num = 0; -+ u8 i, j; -+ s8 bb_gain; -+ -+ if (dm->support_ic_type & ODM_RTL8814A) -+ max_path = 4; /*0~3*/ -+ else if (dm->support_ic_type & -+ (ODM_RTL8812 | ODM_RTL8822B | ODM_RTL8192F)) { -+ max_path = 2; /*0~1*/ -+ kfree_band_num = KFREE_BAND_NUM; -+ } else if (dm->support_ic_type & ODM_RTL8821C) { -+ max_path = 1; -+ kfree_band_num = KFREE_BAND_NUM; -+ } else if (dm->support_ic_type & ODM_RTL8710B) { -+ max_path = 1; -+ kfree_band_num = 1; -+ } else if (dm->support_ic_type & ODM_RTL8198F) { -+ max_path = 4; -+ kfree_band_num = 3; -+ } -+ -+ if (dm->support_ic_type & -+ (ODM_RTL8192F | ODM_RTL8822B | ODM_RTL8821C | -+ ODM_RTL8814A | ODM_RTL8710B)) { -+ for (i = 0; i < kfree_band_num; i++) { -+ for (j = 0; j < max_path; j++) -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] PwrTrim->gain[%d][%d]=0x%X\n", -+ i, j, pwrtrim->bb_gain[i][j]); -+ } -+ } -+ if (*dm->band_type == ODM_BAND_2_4G && -+ pwrtrim->flag & KFREE_FLAG_ON_2G) { -+ if (!(dm->support_ic_type & ODM_RTL8192F)) { -+ if (channel_to_sw >= 1 && channel_to_sw <= 14) -+ channel_idx = PHYDM_2G; -+ for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s:chnl=%d PATH=%d gain:0x%X\n", -+ __func__, channel_to_sw, rfpath, -+ pwrtrim->bb_gain[channel_idx][rfpath]); -+ bb_gain = pwrtrim->bb_gain[channel_idx][rfpath]; -+ phydm_set_kfree_to_rf(dm, rfpath, bb_gain); -+ } -+ } else if (dm->support_ic_type & ODM_RTL8192F) { -+ if (channel_to_sw >= 1 && channel_to_sw <= 3) -+ channel_idx = 0; -+ if (channel_to_sw >= 4 && channel_to_sw <= 9) -+ channel_idx = 1; -+ if (channel_to_sw >= 10 && channel_to_sw <= 14) -+ channel_idx = 2; -+ for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s:chnl=%d PATH=%d gain:0x%X\n", -+ __func__, channel_to_sw, rfpath, -+ pwrtrim->bb_gain[channel_idx][rfpath]); -+ bb_gain = pwrtrim->bb_gain[channel_idx][rfpath]; -+ phydm_set_kfree_to_rf_8192f(dm, rfpath, -+ channel_idx, -+ bb_gain); -+ } -+ } -+ } else if (*dm->band_type == ODM_BAND_5G && -+ pwrtrim->flag & KFREE_FLAG_ON_5G) { -+ if (channel_to_sw >= 36 && channel_to_sw <= 48) -+ channel_idx = PHYDM_5GLB1; -+ if (channel_to_sw >= 52 && channel_to_sw <= 64) -+ channel_idx = PHYDM_5GLB2; -+ if (channel_to_sw >= 100 && channel_to_sw <= 120) -+ channel_idx = PHYDM_5GMB1; -+ if (channel_to_sw >= 122 && channel_to_sw <= 144) -+ channel_idx = PHYDM_5GMB2; -+ if (channel_to_sw >= 149 && channel_to_sw <= 177) -+ channel_idx = PHYDM_5GHB; -+ -+ for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s: channel=%d PATH=%d bb_gain:0x%X\n", -+ __func__, channel_to_sw, rfpath, -+ pwrtrim->bb_gain[channel_idx][rfpath]); -+ bb_gain = pwrtrim->bb_gain[channel_idx][rfpath]; -+ phydm_set_kfree_to_rf(dm, rfpath, bb_gain); -+ } -+ } else { -+ RF_DBG(dm, DBG_RF_MP, "[kfree] Set default Register\n"); -+ if (!(dm->support_ic_type & ODM_RTL8192F)) { -+ for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) { -+ bb_gain = pwrtrim->bb_gain[channel_idx][rfpath]; -+ phydm_clear_kfree_to_rf(dm, rfpath, bb_gain); -+ } -+ } -+#if 0 -+ /*else if(dm->support_ic_type & ODM_RTL8192F){ -+ if (channel_to_sw >= 1 && channel_to_sw <= 3) -+ channel_idx = 0; -+ if (channel_to_sw >= 4 && channel_to_sw <= 9) -+ channel_idx = 1; -+ if (channel_to_sw >= 9 && channel_to_sw <= 14) -+ channel_idx = 2; -+ for (rfpath = RF_PATH_A; rfpath < max_path; rfpath++) -+ phydm_clear_kfree_to_rf_8192f(dm, rfpath, pwrtrim->bb_gain[channel_idx][rfpath]); -+ }*/ -+#endif -+ } -+} -+ -+void phydm_config_new_kfree(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ -+ if (cali_info->reg_rf_kfree_enable == 2) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s: reg_rf_kfree_enable == 2, Disable\n", -+ __func__); -+ return; -+ } else if (cali_info->reg_rf_kfree_enable == 1 || -+ cali_info->reg_rf_kfree_enable == 0) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s: reg_rf_kfree_enable == true\n", __func__); -+ -+ phydm_do_new_kfree(dm); -+ } -+} -+ -+void phydm_config_kfree(void *dm_void, u8 channel_to_sw) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ struct odm_power_trim_data *pwrtrim = &dm->power_trim_data; -+ -+ RF_DBG(dm, DBG_RF_MP, "===>[kfree] phy_ConfigKFree()\n"); -+ -+ if (cali_info->reg_rf_kfree_enable == 2) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s: reg_rf_kfree_enable == 2, Disable\n", -+ __func__); -+ return; -+ } else if (cali_info->reg_rf_kfree_enable == 1 || -+ cali_info->reg_rf_kfree_enable == 0) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s: reg_rf_kfree_enable == true\n", __func__); -+ /*Make sure the targetval is defined*/ -+ if (!(pwrtrim->flag & KFREE_FLAG_ON)) { -+ RF_DBG(dm, DBG_RF_MP, -+ "[kfree] %s: efuse is 0xff, KFree not work\n", -+ __func__); -+ return; -+ } -+#if 0 -+ /*if kfree_table[0] == 0xff, means no Kfree*/ -+#endif -+ phydm_do_kfree(dm, channel_to_sw); -+ } -+ RF_DBG(dm, DBG_RF_MP, "<===[kfree] phy_ConfigKFree()\n"); -+} -+ -+void phydm_set_lna_trim_offset (void *dm_void, u8 path, u8 cg_cs, u8 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_RTL8197G) -+ phydm_set_lna_trim_offset_8197g(dm, path, cg_cs, enable); -+} -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_kfree.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_kfree.h -new file mode 100644 -index 000000000000..2de6b6bb9d63 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_kfree.h -@@ -0,0 +1,296 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_KFREE_H__ -+#define __HALRF_KFREE_H__ -+ -+#define KFREE_VERSION "1.0" -+ -+#define KFREE_BAND_NUM 9 -+#define KFREE_CH_NUM 3 -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP)) -+ -+#define BB_GAIN_NUM 6 -+ -+#endif -+ -+#define KFREE_FLAG_ON BIT(0) -+#define KFREE_FLAG_THERMAL_K_ON BIT(1) -+ -+#define KFREE_FLAG_ON_2G BIT(2) -+#define KFREE_FLAG_ON_5G BIT(3) -+ -+#define PA_BIAS_FLAG_ON BIT(4) -+ -+#define TSSI_TRIM_FLAG_ON BIT(5) -+ -+#define LNA_FLAG_ON BIT(6) -+ -+ -+#define PPG_THERMAL_OFFSET_98F 0x50 -+#define PPG_2GM_TXAB_98F 0x51 -+#define PPG_2GM_TXCD_98F 0x52 -+#define PPG_2GL_TXAB_98F 0x53 -+#define PPG_2GL_TXCD_98F 0x54 -+#define PPG_2GH_TXAB_98F 0x55 -+#define PPG_2GH_TXCD_98F 0x56 -+ -+#define PPG_PABIAS_2GAB_98F 0x57 -+#define PPG_PABIAS_2GCD_98F 0x58 -+ -+#define PPG_LNA_2GA_98F 0x59 -+#define PPG_LNA_2GB_98F 0x5a -+#define PPG_LNA_2GC_98F 0x5b -+#define PPG_LNA_2GD_98F 0x5c -+ -+#define PPG_THERMAL_OFFSET_21C 0x1EF -+#define PPG_2G_TXAB_21C 0x1EE -+#define PPG_5GL1_TXA_21C 0x1EC -+#define PPG_5GL2_TXA_21C 0x1E8 -+#define PPG_5GM1_TXA_21C 0x1E4 -+#define PPG_5GM2_TXA_21C 0x1E0 -+#define PPG_5GH1_TXA_21C 0x1DC -+ -+#define PPG_THERMAL_OFFSET_22B 0x3EF -+#define PPG_2G_TXAB_22B 0x3EE -+#define PPG_2G_TXCD_22B 0x3ED -+#define PPG_5GL1_TXA_22B 0x3EC -+#define PPG_5GL1_TXB_22B 0x3EB -+#define PPG_5GL1_TXC_22B 0x3EA -+#define PPG_5GL1_TXD_22B 0x3E9 -+#define PPG_5GL2_TXA_22B 0x3E8 -+#define PPG_5GL2_TXB_22B 0x3E7 -+#define PPG_5GL2_TXC_22B 0x3E6 -+#define PPG_5GL2_TXD_22B 0x3E5 -+#define PPG_5GM1_TXA_22B 0x3E4 -+#define PPG_5GM1_TXB_22B 0x3E3 -+#define PPG_5GM1_TXC_22B 0x3E2 -+#define PPG_5GM1_TXD_22B 0x3E1 -+#define PPG_5GM2_TXA_22B 0x3E0 -+#define PPG_5GM2_TXB_22B 0x3DF -+#define PPG_5GM2_TXC_22B 0x3DE -+#define PPG_5GM2_TXD_22B 0x3DD -+#define PPG_5GH1_TXA_22B 0x3DC -+#define PPG_5GH1_TXB_22B 0x3DB -+#define PPG_5GH1_TXC_22B 0x3DA -+#define PPG_5GH1_TXD_22B 0x3D9 -+ -+#define PPG_PABIAS_2GA_22B 0x3D5 -+#define PPG_PABIAS_2GB_22B 0x3D6 -+ -+#define PPG_THERMAL_A_OFFSET_22C 0x1ef -+#define PPG_THERMAL_B_OFFSET_22C 0x1b0 -+#define PPG_2GL_TXAB_22C 0x1d4 -+#define PPG_2GM_TXAB_22C 0x1ee -+#define PPG_2GH_TXAB_22C 0x1d2 -+#define PPG_5GL1_TXA_22C 0x1ec -+#define PPG_5GL1_TXB_22C 0x1eb -+#define PPG_5GL2_TXA_22C 0x1e8 -+#define PPG_5GL2_TXB_22C 0x1e7 -+#define PPG_5GM1_TXA_22C 0x1e4 -+#define PPG_5GM1_TXB_22C 0x1e3 -+#define PPG_5GM2_TXA_22C 0x1e0 -+#define PPG_5GM2_TXB_22C 0x1df -+#define PPG_5GH1_TXA_22C 0x1dc -+#define PPG_5GH1_TXB_22C 0x1db -+ -+#define PPG_PABIAS_2GA_22C 0x1d6 -+#define PPG_PABIAS_2GB_22C 0x1d5 -+#define PPG_PABIAS_5GA_22C 0x1d8 -+#define PPG_PABIAS_5GB_22C 0x1d7 -+ -+#define TSSI_2GM_TXA_22C 0x1c0 -+#define TSSI_2GM_TXB_22C 0x1bf -+#define TSSI_2GH_TXA_22C 0x1be -+#define TSSI_2GH_TXB_22C 0x1bd -+#define TSSI_5GL1_TXA_22C 0x1bc -+#define TSSI_5GL1_TXB_22C 0x1bb -+#define TSSI_5GL2_TXA_22C 0x1ba -+#define TSSI_5GL2_TXB_22C 0x1b9 -+#define TSSI_5GM1_TXA_22C 0x1b8 -+#define TSSI_5GM1_TXB_22C 0x1b7 -+#define TSSI_5GM2_TXA_22C 0x1b6 -+#define TSSI_5GM2_TXB_22C 0x1b5 -+#define TSSI_5GH1_TXA_22C 0x1b4 -+#define TSSI_5GH1_TXB_22C 0x1b3 -+#define TSSI_5GH2_TXA_22C 0x1b2 -+#define TSSI_5GH2_TXB_22C 0x1b1 -+ -+/*8195B*/ -+#define PPG_THERMAL_OFFSET_95B 0x1ef -+#define PPG_2GL_TXA_95B 0x1d4 -+#define PPG_2GM_TXA_95B 0x1ee -+#define PPG_2GH_TXA_95B 0x1d2 -+#define PPG_5GL1_TXA_95B 0x1ec -+#define PPG_5GL2_TXA_95B 0x1e8 -+#define PPG_5GM1_TXA_95B 0x1e4 -+#define PPG_5GM2_TXA_95B 0x1e0 -+#define PPG_5GH1_TXA_95B 0x1dc -+ -+#define PPG_PABIAS_2GA_95B 0x1d6 -+#define PPG_PABIAS_5GA_95B 0x1d8 -+ -+/*8721D*/ -+/*#define KFREE_BAND_NUM_8721D 6*/ -+#define PPG_THERMAL_OFFSET_8721D 0x1EF -+#define PPG_2G_TXA_8721D 0x1EE -+#define PPG_5GL1_TXA_8721D 0x1ED -+#define PPG_5GL2_TXA_8721D 0x1EC -+#define PPG_5GM1_TXA_8721D 0x1EB -+#define PPG_5GM2_TXA_8721D 0x1EA -+#define PPG_5GH1_TXA_8721D 0x1E9 -+ -+/*8197G*/ -+#define PPG_THERMAL_A_OFFSET_97G 0x50 -+#define PPG_THERMAL_B_OFFSET_97G 0x27 -+#define PPG_2GM_TXAB_97G 0x51 -+#define PPG_2GL_TXAB_97G 0x53 -+#define PPG_2GH_TXAB_97G 0x55 -+#define TSSI_2GL_TXA_97G 0x1c -+#define TSSI_2GL_TXB_97G 0x1d -+#define TSSI_2GH_TXA_97G 0x1e -+#define TSSI_2GH_TXB_97G 0x1f -+#define PPG_PABIAS_2GAB_97G 0x57 -+#define PPG_LNA_2GA_97G 0x21 -+#define PPG_LNA_2GB_97G 0x22 -+ -+/*8710C Ameba Z2*/ -+#define PPG_THERMAL_OFFSET_10C 0x1EF -+#define PPG_2GL_TX_10C 0x1D4 -+#define PPG_2GM_TX_10C 0x1EE -+#define PPG_2GH_TX_10C 0x1D2 -+#define PPG_PABIAS_10C 0x1D6 -+#define PPG_LNA_10C 0x1D0 -+ -+/*8814B*/ -+#define PPG_2GL_TXAB_14B 0x3ee -+#define PPG_2GL_TXCD_14B 0x3ed -+#define PPG_5GL1_TXA_14B 0x3ec -+#define PPG_5GL1_TXB_14B 0x3eb -+#define PPG_5GL1_TXC_14B 0x3ea -+#define PPG_5GL1_TXD_14B 0x3e9 -+#define PPG_5GL2_TXA_14B 0x3e8 -+#define PPG_5GL2_TXB_14B 0x3e7 -+#define PPG_5GL2_TXC_14B 0x3e6 -+#define PPG_5GL2_TXD_14B 0x3e5 -+#define PPG_5GM1_TXA_14B 0x3e4 -+#define PPG_5GM1_TXB_14B 0x3e3 -+#define PPG_5GM1_TXC_14B 0x3e2 -+#define PPG_5GM1_TXD_14B 0x3e1 -+#define PPG_5GM2_TXA_14B 0x3e0 -+#define PPG_5GM2_TXB_14B 0x3df -+#define PPG_5GM2_TXC_14B 0x3de -+#define PPG_5GM2_TXD_14B 0x3dd -+#define PPG_5GH1_TXA_14B 0x3dc -+#define PPG_5GH1_TXB_14B 0x3db -+#define PPG_5GH1_TXC_14B 0x3da -+#define PPG_5GH1_TXD_14B 0x3d9 -+#define PPG_PABIAS_5GAC_14B 0x3d8 -+#define PPG_PABIAS_5GBD_14B 0x3d7 -+#define PPG_PABIAS_2GAC_14B 0x3d6 -+#define PPG_PABIAS_2GBD_14B 0x3d5 -+ -+#define PPG_THERMAL_A_OFFSET_14B 0x3D4 -+#define PPG_THERMAL_B_OFFSET_14B 0x3D3 -+#define PPG_THERMAL_C_OFFSET_14B 0x3D2 -+#define PPG_THERMAL_D_OFFSET_14B 0x3D1 -+ -+#define TSSI_2GM_TXA_14B 0x3c0 -+#define TSSI_2GM_TXB_14B 0x3bf -+#define TSSI_2GM_TXC_14B 0x3be -+#define TSSI_2GM_TXD_14B 0x3bd -+#define TSSI_2GH_TXA_14B 0x3bc -+#define TSSI_2GH_TXB_14B 0x3bb -+#define TSSI_2GH_TXC_14B 0x3ba -+#define TSSI_2GH_TXD_14B 0x3b9 -+#define TSSI_5GL1_TXA_14B 0x3b8 -+#define TSSI_5GL1_TXB_14B 0x3b7 -+#define TSSI_5GL1_TXC_14B 0x3b6 -+#define TSSI_5GL1_TXD_14B 0x3b5 -+#define TSSI_5GL2_TXA_14B 0x3b4 -+#define TSSI_5GL2_TXB_14B 0x3b3 -+#define TSSI_5GL2_TXC_14B 0x3b2 -+#define TSSI_5GL2_TXD_14B 0x3b1 -+#define TSSI_5GM1_TXA_14B 0x3b0 -+#define TSSI_5GM1_TXB_14B 0x3af -+#define TSSI_5GM1_TXC_14B 0x3ae -+#define TSSI_5GM1_TXD_14B 0x3ad -+#define TSSI_5GM2_TXA_14B 0x3ac -+#define TSSI_5GM2_TXB_14B 0x3ab -+#define TSSI_5GM2_TXC_14B 0x3aa -+#define TSSI_5GM2_TXD_14B 0x3a9 -+#define TSSI_5GH1_TXA_14B 0x3a8 -+#define TSSI_5GH1_TXB_14B 0x3a7 -+#define TSSI_5GH1_TXC_14B 0x3a6 -+#define TSSI_5GH1_TXD_14B 0x3a5 -+#define TSSI_5GH2_TXA_14B 0x3a4 -+#define TSSI_5GH2_TXB_14B 0x3a3 -+#define TSSI_5GH2_TXC_14B 0x3a2 -+#define TSSI_5GH2_TXD_14B 0x3a1 -+ -+ -+struct odm_power_trim_data { -+ u8 flag; -+ u8 pa_bias_flag; -+ u8 lna_flag; -+ s8 bb_gain[KFREE_BAND_NUM][MAX_RF_PATH]; -+ s8 tssi_trim[KFREE_BAND_NUM][MAX_RF_PATH]; -+ s8 pa_bias_trim[KFREE_BAND_NUM][MAX_RF_PATH]; -+ s8 lna_trim[MAX_RF_PATH]; -+ s8 thermal; -+ s8 multi_thermal[MAX_RF_PATH]; -+}; -+ -+enum phydm_kfree_channeltosw { -+ PHYDM_2G = 0, -+ PHYDM_5GLB1 = 1, -+ PHYDM_5GLB2 = 2, -+ PHYDM_5GMB1 = 3, -+ PHYDM_5GMB2 = 4, -+ PHYDM_5GHB = 5, -+}; -+ -+void phydm_get_thermal_trim_offset(void *dm_void); -+ -+void phydm_get_power_trim_offset(void *dm_void); -+ -+void phydm_get_pa_bias_offset(void *dm_void); -+ -+s8 phydm_get_thermal_offset(void *dm_void); -+ -+s8 phydm_get_multi_thermal_offset(void *dm_void, u8 path); -+ -+void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data); -+ -+void phydm_config_new_kfree(void *dm_void); -+ -+s8 phydm_get_tssi_trim_de(void *dm_void, u8 path); -+ -+void phydm_config_kfree(void *dm_void, u8 channel_to_sw); -+ -+void phydm_set_lna_trim_offset (void *dm_void, u8 path, u8 cg_cs, u8 enable); -+ -+#endif /*__HALRF_KFREE_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking.c -new file mode 100644 -index 000000000000..a1db18f95e8c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking.c -@@ -0,0 +1,186 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ * ************************************************************ -+ */ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+boolean -+odm_check_power_status(void *dm_void) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ PADAPTER *adapter = dm->adapter; -+ -+ RT_RF_POWER_STATE rt_state; -+ MGNT_INFO *mgnt_info = &((PADAPTER)adapter)->MgntInfo; -+ -+ /* 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. */ -+ if (mgnt_info->init_adpt_in_progress == true) { -+ RF_DBG(dm, DBG_RF_INIT, -+ "check_pow_status Return true, due to initadapter\n"); -+ return true; -+ } -+ -+ /* -+ * 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. -+ */ -+ ((PADAPTER)adapter)->HalFunc.GetHwRegHandler((PADAPTER)adapter, HW_VAR_RF_STATE, (u8 *)(&rt_state)); -+ if (((PADAPTER)adapter)->bDriverStopped || ((PADAPTER)adapter)->bDriverIsGoingToPnpSetPowerSleep || rt_state == eRfOff) { -+ RF_DBG(dm, DBG_RF_INIT, -+ "check_pow_status Return false, due to %d/%d/%d\n", -+ ((PADAPTER)adapter)->bDriverStopped, -+ ((PADAPTER)adapter)->bDriverIsGoingToPnpSetPowerSleep, -+ rt_state); -+ return false; -+ } -+#endif -+ return true; -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+void halrf_update_pwr_track(void *dm_void, u8 rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ u8 path_idx = 0; -+#endif -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Pwr Track Get rate=0x%x\n", rate); -+ -+ dm->tx_rate = rate; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+#if USE_WORKITEM -+ odm_schedule_work_item(&dm->ra_rpt_workitem); -+#else -+ if (dm->support_ic_type == ODM_RTL8821) { -+#if (RTL8821A_SUPPORT == 1) -+ odm_tx_pwr_track_set_pwr8821a(dm, MIX_MODE, RF_PATH_A, 0); -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8812) { -+ for (path_idx = RF_PATH_A; path_idx < MAX_PATH_NUM_8812A; path_idx++) { -+#if (RTL8812A_SUPPORT == 1) -+ odm_tx_pwr_track_set_pwr8812a(dm, MIX_MODE, path_idx, 0); -+#endif -+ } -+ } else if (dm->support_ic_type == ODM_RTL8723B) { -+#if (RTL8723B_SUPPORT == 1) -+ odm_tx_pwr_track_set_pwr_8723b(dm, MIX_MODE, RF_PATH_A, 0); -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8192E) { -+ for (path_idx = RF_PATH_A; path_idx < MAX_PATH_NUM_8192E; path_idx++) { -+#if (RTL8192E_SUPPORT == 1) -+ odm_tx_pwr_track_set_pwr92_e(dm, MIX_MODE, path_idx, 0); -+#endif -+ } -+ } else if (dm->support_ic_type == ODM_RTL8188E) { -+#if (RTL8188E_SUPPORT == 1) -+ odm_tx_pwr_track_set_pwr88_e(dm, MIX_MODE, RF_PATH_A, 0); -+#endif -+ } -+#endif -+#else -+ odm_schedule_work_item(&dm->ra_rpt_workitem); -+#endif -+#endif -+} -+ -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void halrf_update_init_rate_work_item_callback( -+ void *context) -+{ -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ u8 p = 0; -+ -+ if (dm->support_ic_type == ODM_RTL8821) { -+#if (RTL8821A_SUPPORT == 1) -+ odm_tx_pwr_track_set_pwr8821a(dm, MIX_MODE, RF_PATH_A, 0); -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8812) { -+#if (RTL8812A_SUPPORT == 1) -+ /*Don't know how to include &c*/ -+ for (p = RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) -+ odm_tx_pwr_track_set_pwr8812a(dm, MIX_MODE, p, 0); -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8723B) { -+#if (RTL8723B_SUPPORT == 1) -+ odm_tx_pwr_track_set_pwr_8723b(dm, MIX_MODE, RF_PATH_A, 0); -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8192E) { -+#if (RTL8192E_SUPPORT == 1) -+ /*Don't know how to include &c*/ -+ for (p = RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) -+ odm_tx_pwr_track_set_pwr92_e(dm, MIX_MODE, p, 0); -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8188E) { -+#if (RTL8188E_SUPPORT == 1) -+ odm_tx_pwr_track_set_pwr88_e(dm, MIX_MODE, RF_PATH_A, 0); -+#endif -+ } -+} -+#endif -+ -+void halrf_set_pwr_track(void *dm_void, u8 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ struct txpwrtrack_cfg c; -+ u8 i; -+ -+ configure_txpower_track(dm, &c); -+ if (enable) { -+ rf->rf_supportability = rf->rf_supportability | HAL_RF_TX_PWR_TRACK; -+ if (cali_info->txpowertrack_control == 1 || cali_info->txpowertrack_control == 3) -+ halrf_do_tssi(dm); -+ } else { -+ rf->rf_supportability = rf->rf_supportability & ~HAL_RF_TX_PWR_TRACK; -+ odm_clear_txpowertracking_state(dm); -+ halrf_do_tssi(dm); -+ halrf_calculate_tssi_codeword(dm); -+ halrf_set_tssi_codeword(dm); -+ -+#if !(RTL8723F_SUPPORT == 1) -+ for (i = 0; i < c.rf_path_count; i++) -+ (*c.odm_tx_pwr_track_set_pwr)(dm, CLEAN_MODE, i, 0); -+#endif -+ } -+ -+ if (cali_info->txpowertrack_control == 2 || -+ cali_info->txpowertrack_control == 3 || -+ cali_info->txpowertrack_control == 4 || -+ cali_info->txpowertrack_control == 5) -+ halrf_txgapk_reload_tx_gain(dm); -+} -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking.h -new file mode 100644 -index 000000000000..c81f25225d7a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking.h -@@ -0,0 +1,43 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_POWER_TRACKING_H__ -+#define __HALRF_POWER_TRACKING_H__ -+ -+boolean -+odm_check_power_status(void *dm_void); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+void halrf_update_pwr_track(void *dm_void, u8 rate); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void halrf_update_init_rate_work_item_callback( -+ void *context); -+#endif -+ -+void halrf_set_pwr_track(void *dm_void, u8 enable); -+ -+#endif /*#ifndef __HALRF_POWERTRACKING_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ap.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ap.c -new file mode 100644 -index 000000000000..28a8091fa402 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ap.c -@@ -0,0 +1,1290 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/* ************************************************************ -+ * include files -+ * ************************************************************ */ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if !defined(_OUTSRC_COEXIST) -+/* ************************************************************ -+ * Global var -+ * ************************************************************ */ -+ -+ -+u32 ofdm_swing_table_new[OFDM_TABLE_SIZE_92D] = { -+ 0x0b40002d, /* 0, -15.0dB */ -+ 0x0c000030, /* 1, -14.5dB */ -+ 0x0cc00033, /* 2, -14.0dB */ -+ 0x0d800036, /* 3, -13.5dB */ -+ 0x0e400039, /* 4, -13.0dB */ -+ 0x0f00003c, /* 5, -12.5dB */ -+ 0x10000040, /* 6, -12.0dB */ -+ 0x11000044, /* 7, -11.5dB */ -+ 0x12000048, /* 8, -11.0dB */ -+ 0x1300004c, /* 9, -10.5dB */ -+ 0x14400051, /* 10, -10.0dB */ -+ 0x15800056, /* 11, -9.5dB */ -+ 0x16c0005b, /* 12, -9.0dB */ -+ 0x18000060, /* 13, -8.5dB */ -+ 0x19800066, /* 14, -8.0dB */ -+ 0x1b00006c, /* 15, -7.5dB */ -+ 0x1c800072, /* 16, -7.0dB */ -+ 0x1e400079, /* 17, -6.5dB */ -+ 0x20000080, /* 18, -6.0dB */ -+ 0x22000088, /* 19, -5.5dB */ -+ 0x24000090, /* 20, -5.0dB */ -+ 0x26000098, /* 21, -4.5dB */ -+ 0x288000a2, /* 22, -4.0dB */ -+ 0x2ac000ab, /* 23, -3.5dB */ -+ 0x2d4000b5, /* 24, -3.0dB */ -+ 0x300000c0, /* 25, -2.5dB */ -+ 0x32c000cb, /* 26, -2.0dB */ -+ 0x35c000d7, /* 27, -1.5dB */ -+ 0x390000e4, /* 28, -1.0dB */ -+ 0x3c8000f2, /* 29, -0.5dB */ -+ 0x40000100, /* 30, +0dB */ -+ 0x43c0010f, /* 31, +0.5dB */ -+ 0x47c0011f, /* 32, +1.0dB */ -+ 0x4c000130, /* 33, +1.5dB */ -+ 0x50800142, /* 34, +2.0dB */ -+ 0x55400155, /* 35, +2.5dB */ -+ 0x5a400169, /* 36, +3.0dB */ -+ 0x5fc0017f, /* 37, +3.5dB */ -+ 0x65400195, /* 38, +4.0dB */ -+ 0x6b8001ae, /* 39, +4.5dB */ -+ 0x71c001c7, /* 40, +5.0dB */ -+ 0x788001e2, /* 41, +5.5dB */ -+ 0x7f8001fe /* 42, +6.0dB */ -+}; -+ -+u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB */ -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB */ -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB */ -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB */ -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB */ -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB */ -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB */ -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB */ -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB */ -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB */ -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB */ -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB */ -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB */ -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB */ -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */ -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB */ -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB */ -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */ -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB */ -+ {0x1c, 0x1a, 0x18, 0x12, 0x0e, 0x08, 0x04, 0x02}, /* 20, -6.0dB */ -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB */ -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */ -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB */ -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */ -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB */ -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB */ -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB */ -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */ -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB */ -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB */ -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB */ -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB */ -+}; -+ -+ -+u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB */ -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB */ -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB */ -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB */ -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB */ -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 5, -13.5dB */ -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB */ -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB */ -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB */ -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB */ -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB */ -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 11, -10.5dB */ -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB */ -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB */ -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 14, -9.0dB */ -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB */ -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB */ -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */ -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */ -+ {0x1c, 0x1a, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */ -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB */ -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */ -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 23, -4.5dB */ -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */ -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */ -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */ -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 27, -2.5dB */ -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */ -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 29, -1.5dB */ -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */ -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */ -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */ -+}; -+ -+u32 ofdm_swing_table[OFDM_TABLE_SIZE_92D] = { -+ 0x0b40002d, /* 0, -15.0dB */ -+ 0x0c000030, /* 1, -14.5dB */ -+ 0x0cc00033, /* 2, -14.0dB */ -+ 0x0d800036, /* 3, -13.5dB */ -+ 0x0e400039, /* 4, -13.0dB */ -+ 0x0f00003c, /* 5, -12.5dB */ -+ 0x10000040, /* 6, -12.0dB */ -+ 0x11000044, /* 7, -11.5dB */ -+ 0x12000048, /* 8, -11.0dB */ -+ 0x1300004c, /* 9, -10.5dB */ -+ 0x14400051, /* 10, -10.0dB */ -+ 0x15800056, /* 11, -9.5dB */ -+ 0x16c0005b, /* 12, -9.0dB */ -+ 0x18000060, /* 13, -8.5dB */ -+ 0x19800066, /* 14, -8.0dB */ -+ 0x1b00006c, /* 15, -7.5dB */ -+ 0x1c800072, /* 16, -7.0dB */ -+ 0x1e400079, /* 17, -6.5dB */ -+ 0x20000080, /* 18, -6.0dB */ -+ 0x22000088, /* 19, -5.5dB */ -+ 0x24000090, /* 20, -5.0dB */ -+ 0x26000098, /* 21, -4.5dB */ -+ 0x288000a2, /* 22, -4.0dB */ -+ 0x2ac000ab, /* 23, -3.5dB */ -+ 0x2d4000b5, /* 24, -3.0dB */ -+ 0x300000c0, /* 25, -2.5dB */ -+ 0x32c000cb, /* 26, -2.0dB */ -+ 0x35c000d7, /* 27, -1.5dB */ -+ 0x390000e4, /* 28, -1.0dB */ -+ 0x3c8000f2, /* 29, -0.5dB */ -+ 0x40000100, /* 30, +0dB */ -+ 0x43c0010f, /* 31, +0.5dB */ -+ 0x47c0011f, /* 32, +1.0dB */ -+ 0x4c000130, /* 33, +1.5dB */ -+ 0x50800142, /* 34, +2.0dB */ -+ 0x55400155, /* 35, +2.5dB */ -+ 0x5a400169, /* 36, +3.0dB */ -+ 0x5fc0017f, /* 37, +3.5dB */ -+ 0x65400195, /* 38, +4.0dB */ -+ 0x6b8001ae, /* 39, +4.5dB */ -+ 0x71c001c7, /* 40, +5.0dB */ -+ 0x788001e2, /* 41, +5.5dB */ -+ 0x7f8001fe /* 42, +6.0dB */ -+}; -+ -+ -+u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB */ -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB */ -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB */ -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB */ -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB */ -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB */ -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB */ -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB */ -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB */ -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB */ -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB */ -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB */ -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB */ -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB */ -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */ -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB */ -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB */ -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */ -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB */ -+ {0x1c, 0x1a, 0x18, 0x12, 0x0e, 0x08, 0x04, 0x02}, /* 20, -6.0dB */ -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB */ -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */ -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB */ -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */ -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB */ -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB */ -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB */ -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */ -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB */ -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB */ -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB */ -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB */ -+}; -+ -+ -+u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB */ -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB */ -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB */ -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB */ -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB */ -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 5, -13.5dB */ -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB */ -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB */ -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB */ -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB */ -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB */ -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 11, -10.5dB */ -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB */ -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB */ -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 14, -9.0dB */ -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB */ -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB */ -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */ -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */ -+ {0x1c, 0x1a, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */ -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB */ -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */ -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 23, -4.5dB */ -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */ -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */ -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */ -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 27, -2.5dB */ -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */ -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 29, -1.5dB */ -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */ -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */ -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */ -+}; -+ -+u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x16, 0x15, 0x13, 0x10, 0xD, 0x9, 0x6, 0x3, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 0 -16dB */ -+ {0x18, 0x17, 0x15, 0x12, 0xE, 0xA, 0x7, 0x4, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 1 -15.5dB */ -+ {0x1B, 0x1A, 0x18, 0x14, 0x10, 0xB, 0x7, 0x4, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 2 -15dB */ -+ {0x1F, 0x1E, 0x1B, 0x17, 0x12, 0xD, 0x8, 0x5, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 3 -14.5dB */ -+ {0x22, 0x21, 0x1E, 0x19, 0x14, 0xE, 0x9, 0x5, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 4 -14dB */ -+ {0x26, 0x25, 0x22, 0x1C, 0x16, 0x10, 0xA, 0x6, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 5 -13.5dB */ -+ {0x2B, 0x2A, 0x26, 0x20, 0x19, 0x12, 0xC, 0x7, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 6 -13dB */ -+ {0x30, 0x2F, 0x2A, 0x24, 0x1C, 0x14, 0xD, 0x8, 0x4, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 7 -12.5dB */ -+ {0x36, 0x34, 0x2F, 0x28, 0x1F, 0x17, 0xF, 0x9, 0x4, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 8 -12dB */ -+ {0x3D, 0x3B, 0x35, 0x2D, 0x23, 0x19, 0x11, 0xA, 0x5, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 9 -11.5dB */ -+ {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0xB, 0x5, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 10 -11dB */ -+ {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0xC, 0x6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 11 -10.5dB */ -+ {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0xE, 0x6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 12 -10dB */ -+ {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0xF, 0x7, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 13 -9.5dB */ -+ {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x8, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 14 -9dB */ -+ {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x9, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 15 -8.5dB */ -+ {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0xA, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 16 -8dB */ -+ {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0xB, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 17 -7.5dB */ -+ {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0xD, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 18 -7dB */ -+ {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0xE, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 19 -6.5dB */ -+ {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0} /* 20 -6dB */ -+}; -+ -+ -+u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x16, 0x15, 0x13, 0x10, 0xD, 0x9, 0x6, 0x3, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 0 -16dB */ -+ {0x18, 0x17, 0x15, 0x12, 0xE, 0xA, 0x7, 0x4, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 1 -15.5dB */ -+ {0x1B, 0x1A, 0x18, 0x14, 0x10, 0xB, 0x7, 0x4, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 2 -15dB */ -+ {0x1F, 0x1E, 0x1B, 0x17, 0x12, 0xD, 0x8, 0x5, 0x2, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 3 -14.5dB */ -+ {0x22, 0x21, 0x1E, 0x19, 0x14, 0xE, 0x9, 0x5, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 4 -14dB */ -+ {0x26, 0x25, 0x22, 0x1C, 0x16, 0x10, 0xA, 0x6, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 5 -13.5dB */ -+ {0x2B, 0x2A, 0x26, 0x20, 0x19, 0x12, 0xC, 0x7, 0x3, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 6 -13dB */ -+ {0x30, 0x2F, 0x2A, 0x24, 0x1C, 0x14, 0xD, 0x8, 0x4, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 7 -12.5dB */ -+ {0x36, 0x34, 0x2F, 0x28, 0x1F, 0x17, 0xF, 0x9, 0x4, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 8 -12dB */ -+ {0x3D, 0x3B, 0x35, 0x2D, 0x23, 0x19, 0x11, 0xA, 0x5, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 9 -11.5dB */ -+ {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0xB, 0x5, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 10 -11dB */ -+ {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0xC, 0x6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 11 -10.5dB */ -+ {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0xE, 0x6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 12 -10dB */ -+ {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0xF, 0x7, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 13 -9.5dB */ -+ {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x8, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 14 -9dB */ -+ {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x9, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 15 -8.5dB */ -+ {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0xA, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 16 -8dB */ -+ {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0xB, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 17 -7.5dB */ -+ {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0xD, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 18 -7dB */ -+ {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0xE, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 19 -6.5dB */ -+ {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0} /* 20 -6dB */ -+}; -+ -+ -+u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+ {0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+ {0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+ {0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+ {0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+ {0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+ {0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+ {0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+ {0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+ {0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+ {0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+ {0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+ {0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+ {0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+ {0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+ {0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+ {0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+ {0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+ {0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+ {0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+ {0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+/* Winnita ADD 20171113 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/ -+u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, /*19*/ -+ 0x287, /*20*/ -+ 0x2AE, /*21*/ -+ 0x2D6, /*22*/ -+ 0x301, /*23*/ -+ 0x32F, /*24*/ -+ 0x35F, /*25*/ -+ 0x392, /*26*/ -+ 0x3C9, /*27*/ -+ 0x402, /*28*/ -+ 0x43F, /*29*/ -+ 0x47F, /*30*/ -+ 0x4C3, /*31*/ -+ 0x50C, /*32*/ -+ 0x558, /*33*/ -+ 0x5A9, /*34*/ -+ 0x5FF, /*35*/ -+ 0x65A, /*36*/ -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+ -+#if 0 -+u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E] = { -+ /* Index0 6 dB */ 0x7fc001ff, -+ /* Index1 5.7dB */ 0x7b4001ed, -+ /* Index2 5.4dB */ 0x774001dd, -+ /* Index3 5.1dB */ 0x734001cd, -+ /* Index4 4.8dB */ 0x6f4001bd, -+ /* Index5 4.5dB */ 0x6b8001ae, -+ /* Index6 4.2dB */ 0x67c0019f, -+ /* Index7 3.9dB */ 0x64400191, -+ /* Index8 3.6dB */ 0x60c00183, -+ /* Index9 3.3dB */ 0x5d800176, -+ /* Index10 3 dB */ 0x5a80016a, -+ /* Index11 2.7dB */ 0x5740015d, -+ /* Index12 2.4dB */ 0x54400151, -+ /* Index13 2.1dB */ 0x51800146, -+ /* Index14 1.8dB */ 0x4ec0013b, -+ /* Index15 1.5dB */ 0x4c000130, -+ /* Index16 1.2dB */ 0x49800126, -+ /* Index17 0.9dB */ 0x4700011c, -+ /* Index18 0.6dB */ 0x44800112, -+ /* Index19 0.3dB */ 0x42000108, -+ /* Index20 0 dB */ 0x40000100, /* 20 This is OFDM base index */ -+ /* Index21 -0.3dB */ 0x3dc000f7, -+ /* Index22 -0.6dB */ 0x3bc000ef, -+ /* Index23 -0.9dB */ 0x39c000e7, -+ /* Index24 -1.2dB */ 0x37c000df, -+ /* Index25 -1.5dB */ 0x35c000d7, -+ /* Index26 -1.8dB */ 0x340000d0, -+ /* Index27 -2.1dB */ 0x324000c9, -+ /* Index28 -2.4dB */ 0x308000c2, -+ /* Index29 -2.7dB */ 0x2f0000bc, -+ /* Index30 -3 dB */ 0x2d4000b5, -+ /* Index31 -3.3dB */ 0x2bc000af, -+ /* Index32 -3.6dB */ 0x2a4000a9, -+ /* Index33 -3.9dB */ 0x28c000a3, -+ /* Index34 -4.2dB */ 0x2780009e, -+ /* Index35 -4.5dB */ 0x26000098, -+ /* Index36 -4.8dB */ 0x24c00093, -+ /* Index37 -5.1dB */ 0x2380008e, -+ /* Index38 -5.4dB */ 0x22400089, -+ /* Index39 -5.7dB */ 0x21400085, -+ /* Index40 -6 dB */ 0x20000080, -+ /* Index41 -6.3dB */ 0x1f00007c, -+ /* Index42 -6.6dB */ 0x1e000078, -+ /* Index43 -6.9dB */ 0x1d000074, -+ /* Index44 -7.2dB */ 0x1c000070, -+ /* Index45 -7.5dB */ 0x1b00006c, -+ /* Index46 -7.8dB */ 0x1a000068, -+ /* Index47 -8.1dB */ 0x19400065, -+ /* Index48 -8.4dB */ 0x18400061, -+ /* Index49 -8.7dB */ 0x1780005e, -+ /* Index50 -9 dB */ 0x16c0005b, -+ /* Index51 -9.3dB */ 0x16000058, -+ /* Index52 -9.6dB */ 0x15400055, -+ /* Index53 -9.9dB */ 0x14800052 -+}; -+u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8] = { -+ /* Index0 0 dB */ {0x36, 0x34, 0x2E, 0x26, 0x1C, 0x12, 0x08, 0x04}, -+ /* Index1 -0.3dB */ {0x34, 0x32, 0x2C, 0x25, 0x1B, 0x11, 0x08, 0x04}, -+ /* Index2 -0.6dB */ {0x32, 0x30, 0x2B, 0x23, 0x1A, 0x11, 0x07, 0x04}, -+ /* Index3 -0.9dB */ {0x31, 0x2F, 0x29, 0x22, 0x19, 0x10, 0x07, 0x04}, -+ /* Index4 -1.2dB */ {0x2F, 0x2D, 0x28, 0x21, 0x18, 0x10, 0x07, 0x03}, -+ /* Index5 -1.5dB */ {0x2D, 0x2C, 0x27, 0x20, 0x18, 0x0F, 0x07, 0x03}, -+ /* Index6 -1.8dB */ {0x2C, 0x2A, 0x25, 0x1F, 0x17, 0x0F, 0x06, 0x03}, -+ /* Index7 -2.1dB */ {0x2A, 0x29, 0x24, 0x1E, 0x16, 0x0E, 0x06, 0x03}, -+ /* Index8 -2.4dB */ {0x29, 0x27, 0x23, 0x1D, 0x15, 0x0E, 0x06, 0x03}, -+ /* Index9 -2.7dB */ {0x27, 0x26, 0x22, 0x1C, 0x14, 0x0D, 0x06, 0x03}, -+ /* Index10 -3 dB */ {0x26, 0x25, 0x20, 0x1B, 0x14, 0x0D, 0x06, 0x03}, -+ /* Index11 -3.3dB */ {0x25, 0x23, 0x1F, 0x1A, 0x13, 0x0C, 0x05, 0x03}, -+ /* Index12 -3.6dB */ {0x24, 0x22, 0x1E, 0x19, 0x12, 0x0C, 0x05, 0x03}, -+ /* Index13 -3.9dB */ {0x22, 0x21, 0x1D, 0x18, 0x12, 0x0B, 0x05, 0x03}, -+ /* Index14 -4.2dB */ {0x21, 0x20, 0x1C, 0x17, 0x11, 0x0B, 0x05, 0x02}, -+ /* Index15 -4.5dB */ {0x20, 0x1F, 0x1B, 0x17, 0x11, 0x0B, 0x05, 0x02}, -+ /* Index16 -4.8dB */ {0x1F, 0x1E, 0x1A, 0x16, 0x10, 0x0A, 0x05, 0x02}, -+ /* Index17 -5.1dB */ {0x1E, 0x1D, 0x1A, 0x15, 0x10, 0x0A, 0x04, 0x02}, -+ /* Index18 -5.4dB */ {0x1D, 0x1C, 0x19, 0x14, 0x0F, 0x0A, 0x04, 0x02}, -+ /* Index19 -5.7dB */ {0x1C, 0x1B, 0x18, 0x14, 0x0E, 0x09, 0x04, 0x02}, -+ /* Index20 -6.0dB */ {0x1B, 0x1A, 0x17, 0x13, 0x0E, 0x09, 0x04, 0x02}, /* 20 This is CCK base index */ -+ /* Index21 -6.3dB */ {0x1A, 0x19, 0x16, 0x12, 0x0E, 0x09, 0x04, 0x02}, -+ /* Index22 -6.6dB */ {0x19, 0x18, 0x15, 0x12, 0x0D, 0x08, 0x04, 0x02}, -+ /* Index23 -6.9dB */ {0x18, 0x17, 0x15, 0x11, 0x0D, 0x08, 0x04, 0x02}, -+ /* Index24 -7.2dB */ {0x18, 0x17, 0x14, 0x11, 0x0C, 0x08, 0x03, 0x02}, -+ /* Index25 -7.5dB */ {0x17, 0x16, 0x13, 0x10, 0x0C, 0x08, 0x03, 0x02}, -+ /* Index26 -7.8dB */ {0x16, 0x15, 0x13, 0x0F, 0x0B, 0x07, 0x03, 0x02}, -+ /* Index27 -8.1dB */ {0x15, 0x14, 0x12, 0x0F, 0x0B, 0x07, 0x03, 0x02}, -+ /* Index28 -8.4dB */ {0x14, 0x14, 0x11, 0x0E, 0x0B, 0x07, 0x03, 0x02}, -+ /* Index29 -8.7dB */ {0x14, 0x13, 0x11, 0x0E, 0x0A, 0x07, 0x03, 0x01}, -+ /* Index30 -9.0dB */ {0x13, 0x12, 0x10, 0x0D, 0x0A, 0x06, 0x03, 0x01}, /* 30 This is hp CCK base index */ -+ /* Index31 -9.3dB */ {0x12, 0x12, 0x0F, 0x0D, 0x0A, 0x06, 0x03, 0x01}, -+ /* Index32 -9.6dB */ {0x12, 0x11, 0x0F, 0x0D, 0x09, 0x06, 0x03, 0x01}, -+ /* Index33 -9.9dB */ {0x11, 0x11, 0x0F, 0x0C, 0x09, 0x06, 0x03, 0x01}, -+ /* Index34 -10.2dB */ {0x11, 0x11, 0x0E, 0x0C, 0x09, 0x06, 0x02, 0x01}, -+ /* Index35 -10.5dB */ {0x10, 0x0F, 0x0E, 0x0B, 0x08, 0x05, 0x02, 0x01}, -+ /* Index36 -10.8dB */ {0x10, 0x0F, 0x0D, 0x0B, 0x08, 0x05, 0x02, 0x01}, -+ /* Index37 -11.1dB */ {0x0F, 0x0E, 0x0D, 0x0A, 0x08, 0x05, 0x02, 0x01}, -+ /* Index38 -11.4dB */ {0x0E, 0x0E, 0x0C, 0x0A, 0x07, 0x05, 0x02, 0x01}, -+ /* Index39 -11.7dB */ {0x0E, 0x0D, 0x0C, 0x0A, 0x07, 0x05, 0x02, 0x01}, -+ /* Index40 -12 dB */ {0x0E, 0x0D, 0x0C, 0x0A, 0x07, 0x05, 0x02, 0x01}, -+ /* Index41 -12.3dB */ {0x0D, 0x0D, 0x0B, 0x09, 0x07, 0x04, 0x02, 0x01}, -+ /* Index42 -12.6dB */ {0x0D, 0x0C, 0x0B, 0x09, 0x07, 0x04, 0x02, 0x01}, -+ /* Index43 -12.9dB */ {0x0C, 0x0C, 0x0A, 0x09, 0x06, 0x04, 0x02, 0x01}, -+ /* Index44 -13.2dB */ {0x0C, 0x0B, 0x0A, 0x08, 0x06, 0x04, 0x02, 0x01}, -+ /* Index45 -13.5dB */ {0x0B, 0x0B, 0x0A, 0x08, 0x06, 0x04, 0x02, 0x01}, -+ /* Index46 -13.8dB */ {0x0B, 0x0B, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, -+ /* Index47 -14.1dB */ {0x0B, 0x0A, 0x09, 0x07, 0x06, 0x04, 0x02, 0x01}, -+ /* Index48 -14.4dB */ {0x0A, 0x0A, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, -+ /* Index49 -14.7dB */ {0x0A, 0x0A, 0x08, 0x07, 0x05, 0x03, 0x01, 0x01}, -+ /* Index50 -15 dB */ {0x0A, 0x09, 0x08, 0x07, 0x05, 0x03, 0x01, 0x01}, -+ /* Index51 -15.3dB */ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, -+ /* Index52 -15.6dB */ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, -+ /* Index53 -15.9dB */ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} -+}; -+u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8] = { -+ /* Index0 0 dB */ {0x36, 0x34, 0x2E, 0x26, 0x00, 0x00, 0x00, 0x00}, -+ /* Index1 -0.3dB */ {0x34, 0x32, 0x2C, 0x25, 0x00, 0x00, 0x00, 0x00}, -+ /* Index2 -0.6dB */ {0x32, 0x30, 0x2B, 0x23, 0x00, 0x00, 0x00, 0x00}, -+ /* Index3 -0.9dB */ {0x31, 0x2F, 0x29, 0x22, 0x00, 0x00, 0x00, 0x00}, -+ /* Index4 -1.2dB */ {0x2F, 0x2D, 0x28, 0x21, 0x00, 0x00, 0x00, 0x00}, -+ /* Index5 -1.5dB */ {0x2D, 0x2C, 0x27, 0x20, 0x00, 0x00, 0x00, 0x00}, -+ /* Index6 -1.8dB */ {0x2C, 0x2A, 0x25, 0x1F, 0x00, 0x00, 0x00, 0x00}, -+ /* Index7 -2.1dB */ {0x2A, 0x29, 0x24, 0x1E, 0x00, 0x00, 0x00, 0x00}, -+ /* Index8 -2.4dB */ {0x29, 0x27, 0x23, 0x1D, 0x00, 0x00, 0x00, 0x00}, -+ /* Index9 -2.7dB */ {0x27, 0x26, 0x22, 0x1C, 0x00, 0x00, 0x00, 0x00}, -+ /* Index10 -3 dB */ {0x26, 0x25, 0x20, 0x1B, 0x00, 0x00, 0x00, 0x00}, -+ /* Index11 -3.3dB */ {0x25, 0x23, 0x1F, 0x1A, 0x00, 0x00, 0x00, 0x00}, -+ /* Index12 -3.6dB */ {0x24, 0x22, 0x1E, 0x19, 0x00, 0x00, 0x00, 0x00}, -+ /* Index13 -3.9dB */ {0x22, 0x21, 0x1D, 0x18, 0x00, 0x00, 0x00, 0x00}, -+ /* Index14 -4.2dB */ {0x21, 0x20, 0x1C, 0x17, 0x00, 0x00, 0x00, 0x00}, -+ /* Index15 -4.5dB */ {0x20, 0x1F, 0x1B, 0x17, 0x00, 0x00, 0x00, 0x00}, -+ /* Index16 -4.8dB */ {0x1F, 0x1E, 0x1A, 0x16, 0x00, 0x00, 0x00, 0x00}, -+ /* Index17 -5.1dB */ {0x1E, 0x1D, 0x1A, 0x15, 0x00, 0x00, 0x00, 0x00}, -+ /* Index18 -5.4dB */ {0x1D, 0x1C, 0x19, 0x14, 0x00, 0x00, 0x00, 0x00}, -+ /* Index19 -5.7dB */ {0x1C, 0x1B, 0x18, 0x14, 0x00, 0x00, 0x00, 0x00}, -+ /* Index20 -6 dB */ {0x1B, 0x1A, 0x17, 0x13, 0x00, 0x00, 0x00, 0x00}, -+ /* Index21 -6.3dB */ {0x1A, 0x19, 0x16, 0x12, 0x00, 0x00, 0x00, 0x00}, -+ /* Index22 -6.6dB */ {0x19, 0x18, 0x15, 0x12, 0x00, 0x00, 0x00, 0x00}, -+ /* Index23 -6.9dB */ {0x18, 0x17, 0x15, 0x11, 0x00, 0x00, 0x00, 0x00}, -+ /* Index24 -7.2dB */ {0x18, 0x17, 0x14, 0x11, 0x00, 0x00, 0x00, 0x00}, -+ /* Index25 -7.5dB */ {0x17, 0x16, 0x13, 0x10, 0x00, 0x00, 0x00, 0x00}, -+ /* Index26 -7.8dB */ {0x16, 0x15, 0x13, 0x0F, 0x00, 0x00, 0x00, 0x00}, -+ /* Index27 -8.1dB */ {0x15, 0x14, 0x12, 0x0F, 0x00, 0x00, 0x00, 0x00}, -+ /* Index28 -8.4dB */ {0x14, 0x14, 0x11, 0x0E, 0x00, 0x00, 0x00, 0x00}, -+ /* Index29 -8.7dB */ {0x14, 0x13, 0x11, 0x0E, 0x00, 0x00, 0x00, 0x00}, -+ /* Index30 -9 dB */ {0x13, 0x12, 0x10, 0x0D, 0x00, 0x00, 0x00, 0x00}, -+ /* Index31 -9.3dB */ {0x12, 0x12, 0x0F, 0x0D, 0x00, 0x00, 0x00, 0x00}, -+ /* Index32 -9.6dB */ {0x12, 0x11, 0x0F, 0x0D, 0x00, 0x00, 0x00, 0x00}, -+ /* Index33 -9.9dB */ {0x11, 0x11, 0x0F, 0x0C, 0x00, 0x00, 0x00, 0x00}, -+ /* Index34 -10.2dB */ {0x11, 0x11, 0x0E, 0x0C, 0x00, 0x00, 0x00, 0x00}, -+ /* Index35 -10.5dB */ {0x10, 0x0F, 0x0E, 0x0B, 0x00, 0x00, 0x00, 0x00}, -+ /* Index36 -10.8dB */ {0x10, 0x0F, 0x0D, 0x0B, 0x00, 0x00, 0x00, 0x00}, -+ /* Index37 -11.1dB */ {0x0F, 0x0E, 0x0D, 0x0A, 0x00, 0x00, 0x00, 0x00}, -+ /* Index38 -11.4dB */ {0x0E, 0x0E, 0x0C, 0x0A, 0x00, 0x00, 0x00, 0x00}, -+ /* Index39 -11.7dB */ {0x0E, 0x0D, 0x0C, 0x0A, 0x00, 0x00, 0x00, 0x00}, -+ /* Index40 -12 dB */ {0x0E, 0x0D, 0x0C, 0x0A, 0x00, 0x00, 0x00, 0x00}, -+ /* Index41 -12.3dB */ {0x0D, 0x0D, 0x0B, 0x09, 0x00, 0x00, 0x00, 0x00}, -+ /* Index42 -12.6dB */ {0x0D, 0x0C, 0x0B, 0x09, 0x00, 0x00, 0x00, 0x00}, -+ /* Index43 -12.9dB */ {0x0C, 0x0C, 0x0A, 0x09, 0x00, 0x00, 0x00, 0x00}, -+ /* Index44 -13.2dB */ {0x0C, 0x0B, 0x0A, 0x08, 0x00, 0x00, 0x00, 0x00}, -+ /* Index45 -13.5dB */ {0x0B, 0x0B, 0x0A, 0x08, 0x00, 0x00, 0x00, 0x00}, -+ /* Index46 -13.8dB */ {0x0B, 0x0B, 0x09, 0x08, 0x00, 0x00, 0x00, 0x00}, -+ /* Index47 -14.1dB */ {0x0B, 0x0A, 0x09, 0x07, 0x00, 0x00, 0x00, 0x00}, -+ /* Index48 -14.4dB */ {0x0A, 0x0A, 0x09, 0x07, 0x00, 0x00, 0x00, 0x00}, -+ /* Index49 -14.7dB */ {0x0A, 0x0A, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00}, -+ /* Index50 -15 dB */ {0x0A, 0x09, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00}, -+ /* Index51 -15.3dB */ {0x09, 0x09, 0x08, 0x06, 0x00, 0x00, 0x00, 0x00}, -+ /* Index52 -15.6dB */ {0x09, 0x09, 0x08, 0x06, 0x00, 0x00, 0x00, 0x00}, -+ /* Index53 -15.9dB */ {0x09, 0x08, 0x07, 0x06, 0x00, 0x00, 0x00, 0x00} -+}; -+#endif -+#endif -+ -+ -+u8 delta_swing_table_idx_2ga_p_default[DELTA_SWINGIDX_SIZE] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3 -+ , 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9 -+ }; -+u8 delta_swing_table_idx_2ga_n_default[DELTA_SWINGIDX_SIZE] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4 -+ , 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11 -+ }; -+ -+ -+#ifdef CONFIG_WLAN_HAL_8192EE -+u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E] = { -+ /* Index0 6 dB */ 0x7fc001ff, -+ /* Index1 5.7dB */ 0x7b4001ed, -+ /* Index2 5.4dB */ 0x774001dd, -+ /* Index3 5.1dB */ 0x734001cd, -+ /* Index4 4.8dB */ 0x6f4001bd, -+ /* Index5 4.5dB */ 0x6b8001ae, -+ /* Index6 4.2dB */ 0x67c0019f, -+ /* Index7 3.9dB */ 0x64400191, -+ /* Index8 3.6dB */ 0x60c00183, -+ /* Index9 3.3dB */ 0x5d800176, -+ /* Index10 3 dB */ 0x5a80016a, -+ /* Index11 2.7dB */ 0x5740015d, -+ /* Index12 2.4dB */ 0x54400151, -+ /* Index13 2.1dB */ 0x51800146, -+ /* Index14 1.8dB */ 0x4ec0013b, -+ /* Index15 1.5dB */ 0x4c000130, -+ /* Index16 1.2dB */ 0x49800126, -+ /* Index17 0.9dB */ 0x4700011c, -+ /* Index18 0.6dB */ 0x44800112, -+ /* Index19 0.3dB */ 0x42000108, -+ /* Index20 0 dB */ 0x40000100, /* 20 This is OFDM base index */ -+ /* Index21 -0.3dB */ 0x3dc000f7, -+ /* Index22 -0.6dB */ 0x3bc000ef, -+ /* Index23 -0.9dB */ 0x39c000e7, -+ /* Index24 -1.2dB */ 0x37c000df, -+ /* Index25 -1.5dB */ 0x35c000d7, -+ /* Index26 -1.8dB */ 0x340000d0, -+ /* Index27 -2.1dB */ 0x324000c9, -+ /* Index28 -2.4dB */ 0x308000c2, -+ /* Index29 -2.7dB */ 0x2f0000bc, -+ /* Index30 -3 dB */ 0x2d4000b5, -+ /* Index31 -3.3dB */ 0x2bc000af, -+ /* Index32 -3.6dB */ 0x2a4000a9, -+ /* Index33 -3.9dB */ 0x28c000a3, -+ /* Index34 -4.2dB */ 0x2780009e, -+ /* Index35 -4.5dB */ 0x26000098, -+ /* Index36 -4.8dB */ 0x24c00093, -+ /* Index37 -5.1dB */ 0x2380008e, -+ /* Index38 -5.4dB */ 0x22400089, -+ /* Index39 -5.7dB */ 0x21400085, -+ /* Index40 -6 dB */ 0x20000080, -+ /* Index41 -6.3dB */ 0x1f00007c, -+ /* Index42 -6.6dB */ 0x1e000078, -+ /* Index43 -6.9dB */ 0x1d000074, -+ /* Index44 -7.2dB */ 0x1c000070, -+ /* Index45 -7.5dB */ 0x1b00006c, -+ /* Index46 -7.8dB */ 0x1a000068, -+ /* Index47 -8.1dB */ 0x19400065, -+ /* Index48 -8.4dB */ 0x18400061, -+ /* Index49 -8.7dB */ 0x1780005e, -+ /* Index50 -9 dB */ 0x16c0005b, -+ /* Index51 -9.3dB */ 0x16000058, -+ /* Index52 -9.6dB */ 0x15400055, -+ /* Index53 -9.9dB */ 0x14800052 -+}; -+u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8] = { -+ /* Index0 0 dB */ {0x36, 0x34, 0x2E, 0x26, 0x1C, 0x12, 0x08, 0x04}, -+ /* Index1 -0.3dB */ {0x34, 0x32, 0x2C, 0x25, 0x1B, 0x11, 0x08, 0x04}, -+ /* Index2 -0.6dB */ {0x32, 0x30, 0x2B, 0x23, 0x1A, 0x11, 0x07, 0x04}, -+ /* Index3 -0.9dB */ {0x31, 0x2F, 0x29, 0x22, 0x19, 0x10, 0x07, 0x04}, -+ /* Index4 -1.2dB */ {0x2F, 0x2D, 0x28, 0x21, 0x18, 0x10, 0x07, 0x03}, -+ /* Index5 -1.5dB */ {0x2D, 0x2C, 0x27, 0x20, 0x18, 0x0F, 0x07, 0x03}, -+ /* Index6 -1.8dB */ {0x2C, 0x2A, 0x25, 0x1F, 0x17, 0x0F, 0x06, 0x03}, -+ /* Index7 -2.1dB */ {0x2A, 0x29, 0x24, 0x1E, 0x16, 0x0E, 0x06, 0x03}, -+ /* Index8 -2.4dB */ {0x29, 0x27, 0x23, 0x1D, 0x15, 0x0E, 0x06, 0x03}, -+ /* Index9 -2.7dB */ {0x27, 0x26, 0x22, 0x1C, 0x14, 0x0D, 0x06, 0x03}, -+ /* Index10 -3 dB */ {0x26, 0x25, 0x20, 0x1B, 0x14, 0x0D, 0x06, 0x03}, -+ /* Index11 -3.3dB */ {0x25, 0x23, 0x1F, 0x1A, 0x13, 0x0C, 0x05, 0x03}, -+ /* Index12 -3.6dB */ {0x24, 0x22, 0x1E, 0x19, 0x12, 0x0C, 0x05, 0x03}, -+ /* Index13 -3.9dB */ {0x22, 0x21, 0x1D, 0x18, 0x12, 0x0B, 0x05, 0x03}, -+ /* Index14 -4.2dB */ {0x21, 0x20, 0x1C, 0x17, 0x11, 0x0B, 0x05, 0x02}, -+ /* Index15 -4.5dB */ {0x20, 0x1F, 0x1B, 0x17, 0x11, 0x0B, 0x05, 0x02}, -+ /* Index16 -4.8dB */ {0x1F, 0x1E, 0x1A, 0x16, 0x10, 0x0A, 0x05, 0x02}, -+ /* Index17 -5.1dB */ {0x1E, 0x1D, 0x1A, 0x15, 0x10, 0x0A, 0x04, 0x02}, -+ /* Index18 -5.4dB */ {0x1D, 0x1C, 0x19, 0x14, 0x0F, 0x0A, 0x04, 0x02}, -+ /* Index19 -5.7dB */ {0x1C, 0x1B, 0x18, 0x14, 0x0E, 0x09, 0x04, 0x02}, -+ /* Index20 -6.0dB */ {0x1B, 0x1A, 0x17, 0x13, 0x0E, 0x09, 0x04, 0x02}, /* 20 This is CCK base index */ -+ /* Index21 -6.3dB */ {0x1A, 0x19, 0x16, 0x12, 0x0E, 0x09, 0x04, 0x02}, -+ /* Index22 -6.6dB */ {0x19, 0x18, 0x15, 0x12, 0x0D, 0x08, 0x04, 0x02}, -+ /* Index23 -6.9dB */ {0x18, 0x17, 0x15, 0x11, 0x0D, 0x08, 0x04, 0x02}, -+ /* Index24 -7.2dB */ {0x18, 0x17, 0x14, 0x11, 0x0C, 0x08, 0x03, 0x02}, -+ /* Index25 -7.5dB */ {0x17, 0x16, 0x13, 0x10, 0x0C, 0x08, 0x03, 0x02}, -+ /* Index26 -7.8dB */ {0x16, 0x15, 0x13, 0x0F, 0x0B, 0x07, 0x03, 0x02}, -+ /* Index27 -8.1dB */ {0x15, 0x14, 0x12, 0x0F, 0x0B, 0x07, 0x03, 0x02}, -+ /* Index28 -8.4dB */ {0x14, 0x14, 0x11, 0x0E, 0x0B, 0x07, 0x03, 0x02}, -+ /* Index29 -8.7dB */ {0x14, 0x13, 0x11, 0x0E, 0x0A, 0x07, 0x03, 0x01}, -+ /* Index30 -9.0dB */ {0x13, 0x12, 0x10, 0x0D, 0x0A, 0x06, 0x03, 0x01}, /* 30 This is hp CCK base index */ -+ /* Index31 -9.3dB */ {0x12, 0x12, 0x0F, 0x0D, 0x0A, 0x06, 0x03, 0x01}, -+ /* Index32 -9.6dB */ {0x12, 0x11, 0x0F, 0x0D, 0x09, 0x06, 0x03, 0x01}, -+ /* Index33 -9.9dB */ {0x11, 0x11, 0x0F, 0x0C, 0x09, 0x06, 0x03, 0x01}, -+ /* Index34 -10.2dB */ {0x11, 0x11, 0x0E, 0x0C, 0x09, 0x06, 0x02, 0x01}, -+ /* Index35 -10.5dB */ {0x10, 0x0F, 0x0E, 0x0B, 0x08, 0x05, 0x02, 0x01}, -+ /* Index36 -10.8dB */ {0x10, 0x0F, 0x0D, 0x0B, 0x08, 0x05, 0x02, 0x01}, -+ /* Index37 -11.1dB */ {0x0F, 0x0E, 0x0D, 0x0A, 0x08, 0x05, 0x02, 0x01}, -+ /* Index38 -11.4dB */ {0x0E, 0x0E, 0x0C, 0x0A, 0x07, 0x05, 0x02, 0x01}, -+ /* Index39 -11.7dB */ {0x0E, 0x0D, 0x0C, 0x0A, 0x07, 0x05, 0x02, 0x01}, -+ /* Index40 -12 dB */ {0x0E, 0x0D, 0x0C, 0x0A, 0x07, 0x05, 0x02, 0x01}, -+ /* Index41 -12.3dB */ {0x0D, 0x0D, 0x0B, 0x09, 0x07, 0x04, 0x02, 0x01}, -+ /* Index42 -12.6dB */ {0x0D, 0x0C, 0x0B, 0x09, 0x07, 0x04, 0x02, 0x01}, -+ /* Index43 -12.9dB */ {0x0C, 0x0C, 0x0A, 0x09, 0x06, 0x04, 0x02, 0x01}, -+ /* Index44 -13.2dB */ {0x0C, 0x0B, 0x0A, 0x08, 0x06, 0x04, 0x02, 0x01}, -+ /* Index45 -13.5dB */ {0x0B, 0x0B, 0x0A, 0x08, 0x06, 0x04, 0x02, 0x01}, -+ /* Index46 -13.8dB */ {0x0B, 0x0B, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, -+ /* Index47 -14.1dB */ {0x0B, 0x0A, 0x09, 0x07, 0x06, 0x04, 0x02, 0x01}, -+ /* Index48 -14.4dB */ {0x0A, 0x0A, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, -+ /* Index49 -14.7dB */ {0x0A, 0x0A, 0x08, 0x07, 0x05, 0x03, 0x01, 0x01}, -+ /* Index50 -15 dB */ {0x0A, 0x09, 0x08, 0x07, 0x05, 0x03, 0x01, 0x01}, -+ /* Index51 -15.3dB */ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, -+ /* Index52 -15.6dB */ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, -+ /* Index53 -15.9dB */ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} -+}; -+u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8] = { -+ /* Index0 0 dB */ {0x36, 0x34, 0x2E, 0x26, 0x00, 0x00, 0x00, 0x00}, -+ /* Index1 -0.3dB */ {0x34, 0x32, 0x2C, 0x25, 0x00, 0x00, 0x00, 0x00}, -+ /* Index2 -0.6dB */ {0x32, 0x30, 0x2B, 0x23, 0x00, 0x00, 0x00, 0x00}, -+ /* Index3 -0.9dB */ {0x31, 0x2F, 0x29, 0x22, 0x00, 0x00, 0x00, 0x00}, -+ /* Index4 -1.2dB */ {0x2F, 0x2D, 0x28, 0x21, 0x00, 0x00, 0x00, 0x00}, -+ /* Index5 -1.5dB */ {0x2D, 0x2C, 0x27, 0x20, 0x00, 0x00, 0x00, 0x00}, -+ /* Index6 -1.8dB */ {0x2C, 0x2A, 0x25, 0x1F, 0x00, 0x00, 0x00, 0x00}, -+ /* Index7 -2.1dB */ {0x2A, 0x29, 0x24, 0x1E, 0x00, 0x00, 0x00, 0x00}, -+ /* Index8 -2.4dB */ {0x29, 0x27, 0x23, 0x1D, 0x00, 0x00, 0x00, 0x00}, -+ /* Index9 -2.7dB */ {0x27, 0x26, 0x22, 0x1C, 0x00, 0x00, 0x00, 0x00}, -+ /* Index10 -3 dB */ {0x26, 0x25, 0x20, 0x1B, 0x00, 0x00, 0x00, 0x00}, -+ /* Index11 -3.3dB */ {0x25, 0x23, 0x1F, 0x1A, 0x00, 0x00, 0x00, 0x00}, -+ /* Index12 -3.6dB */ {0x24, 0x22, 0x1E, 0x19, 0x00, 0x00, 0x00, 0x00}, -+ /* Index13 -3.9dB */ {0x22, 0x21, 0x1D, 0x18, 0x00, 0x00, 0x00, 0x00}, -+ /* Index14 -4.2dB */ {0x21, 0x20, 0x1C, 0x17, 0x00, 0x00, 0x00, 0x00}, -+ /* Index15 -4.5dB */ {0x20, 0x1F, 0x1B, 0x17, 0x00, 0x00, 0x00, 0x00}, -+ /* Index16 -4.8dB */ {0x1F, 0x1E, 0x1A, 0x16, 0x00, 0x00, 0x00, 0x00}, -+ /* Index17 -5.1dB */ {0x1E, 0x1D, 0x1A, 0x15, 0x00, 0x00, 0x00, 0x00}, -+ /* Index18 -5.4dB */ {0x1D, 0x1C, 0x19, 0x14, 0x00, 0x00, 0x00, 0x00}, -+ /* Index19 -5.7dB */ {0x1C, 0x1B, 0x18, 0x14, 0x00, 0x00, 0x00, 0x00}, -+ /* Index20 -6 dB */ {0x1B, 0x1A, 0x17, 0x13, 0x00, 0x00, 0x00, 0x00}, -+ /* Index21 -6.3dB */ {0x1A, 0x19, 0x16, 0x12, 0x00, 0x00, 0x00, 0x00}, -+ /* Index22 -6.6dB */ {0x19, 0x18, 0x15, 0x12, 0x00, 0x00, 0x00, 0x00}, -+ /* Index23 -6.9dB */ {0x18, 0x17, 0x15, 0x11, 0x00, 0x00, 0x00, 0x00}, -+ /* Index24 -7.2dB */ {0x18, 0x17, 0x14, 0x11, 0x00, 0x00, 0x00, 0x00}, -+ /* Index25 -7.5dB */ {0x17, 0x16, 0x13, 0x10, 0x00, 0x00, 0x00, 0x00}, -+ /* Index26 -7.8dB */ {0x16, 0x15, 0x13, 0x0F, 0x00, 0x00, 0x00, 0x00}, -+ /* Index27 -8.1dB */ {0x15, 0x14, 0x12, 0x0F, 0x00, 0x00, 0x00, 0x00}, -+ /* Index28 -8.4dB */ {0x14, 0x14, 0x11, 0x0E, 0x00, 0x00, 0x00, 0x00}, -+ /* Index29 -8.7dB */ {0x14, 0x13, 0x11, 0x0E, 0x00, 0x00, 0x00, 0x00}, -+ /* Index30 -9 dB */ {0x13, 0x12, 0x10, 0x0D, 0x00, 0x00, 0x00, 0x00}, -+ /* Index31 -9.3dB */ {0x12, 0x12, 0x0F, 0x0D, 0x00, 0x00, 0x00, 0x00}, -+ /* Index32 -9.6dB */ {0x12, 0x11, 0x0F, 0x0D, 0x00, 0x00, 0x00, 0x00}, -+ /* Index33 -9.9dB */ {0x11, 0x11, 0x0F, 0x0C, 0x00, 0x00, 0x00, 0x00}, -+ /* Index34 -10.2dB */ {0x11, 0x11, 0x0E, 0x0C, 0x00, 0x00, 0x00, 0x00}, -+ /* Index35 -10.5dB */ {0x10, 0x0F, 0x0E, 0x0B, 0x00, 0x00, 0x00, 0x00}, -+ /* Index36 -10.8dB */ {0x10, 0x0F, 0x0D, 0x0B, 0x00, 0x00, 0x00, 0x00}, -+ /* Index37 -11.1dB */ {0x0F, 0x0E, 0x0D, 0x0A, 0x00, 0x00, 0x00, 0x00}, -+ /* Index38 -11.4dB */ {0x0E, 0x0E, 0x0C, 0x0A, 0x00, 0x00, 0x00, 0x00}, -+ /* Index39 -11.7dB */ {0x0E, 0x0D, 0x0C, 0x0A, 0x00, 0x00, 0x00, 0x00}, -+ /* Index40 -12 dB */ {0x0E, 0x0D, 0x0C, 0x0A, 0x00, 0x00, 0x00, 0x00}, -+ /* Index41 -12.3dB */ {0x0D, 0x0D, 0x0B, 0x09, 0x00, 0x00, 0x00, 0x00}, -+ /* Index42 -12.6dB */ {0x0D, 0x0C, 0x0B, 0x09, 0x00, 0x00, 0x00, 0x00}, -+ /* Index43 -12.9dB */ {0x0C, 0x0C, 0x0A, 0x09, 0x00, 0x00, 0x00, 0x00}, -+ /* Index44 -13.2dB */ {0x0C, 0x0B, 0x0A, 0x08, 0x00, 0x00, 0x00, 0x00}, -+ /* Index45 -13.5dB */ {0x0B, 0x0B, 0x0A, 0x08, 0x00, 0x00, 0x00, 0x00}, -+ /* Index46 -13.8dB */ {0x0B, 0x0B, 0x09, 0x08, 0x00, 0x00, 0x00, 0x00}, -+ /* Index47 -14.1dB */ {0x0B, 0x0A, 0x09, 0x07, 0x00, 0x00, 0x00, 0x00}, -+ /* Index48 -14.4dB */ {0x0A, 0x0A, 0x09, 0x07, 0x00, 0x00, 0x00, 0x00}, -+ /* Index49 -14.7dB */ {0x0A, 0x0A, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00}, -+ /* Index50 -15 dB */ {0x0A, 0x09, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00}, -+ /* Index51 -15.3dB */ {0x09, 0x09, 0x08, 0x06, 0x00, 0x00, 0x00, 0x00}, -+ /* Index52 -15.6dB */ {0x09, 0x09, 0x08, 0x06, 0x00, 0x00, 0x00, 0x00}, -+ /* Index53 -15.9dB */ {0x09, 0x08, 0x07, 0x06, 0x00, 0x00, 0x00, 0x00} -+}; -+#endif -+ -+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\ -+ RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1) -+u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = { -+ 0x081, /* 0, -12.0dB */ -+ 0x088, /* 1, -11.5dB */ -+ 0x090, /* 2, -11.0dB */ -+ 0x099, /* 3, -10.5dB */ -+ 0x0A2, /* 4, -10.0dB */ -+ 0x0AC, /* 5, -9.5dB */ -+ 0x0B6, /* 6, -9.0dB */ -+ 0x0C0, /* 7, -8.5dB */ -+ 0x0CC, /* 8, -8.0dB */ -+ 0x0D8, /* 9, -7.5dB */ -+ 0x0E5, /* 10, -7.0dB */ -+ 0x0F2, /* 11, -6.5dB */ -+ 0x101, /* 12, -6.0dB */ -+ 0x110, /* 13, -5.5dB */ -+ 0x120, /* 14, -5.0dB */ -+ 0x131, /* 15, -4.5dB */ -+ 0x143, /* 16, -4.0dB */ -+ 0x156, /* 17, -3.5dB */ -+ 0x16A, /* 18, -3.0dB */ -+ 0x180, /* 19, -2.5dB */ -+ 0x197, /* 20, -2.0dB */ -+ 0x1AF, /* 21, -1.5dB */ -+ 0x1C8, /* 22, -1.0dB */ -+ 0x1E3, /* 23, -0.5dB */ -+ 0x200, /* 24, +0 dB */ -+ 0x21E, /* 25, +0.5dB */ -+ 0x23E, /* 26, +1.0dB */ -+ 0x261, /* 27, +1.5dB */ -+ 0x285, /* 28, +2.0dB */ -+ 0x2AB, /* 29, +2.5dB */ -+ 0x2D3, /* 30, +3.0dB */ -+ 0x2FE, /* 31, +3.5dB */ -+ 0x32B, /* 32, +4.0dB */ -+ 0x35C, /* 33, +4.5dB */ -+ 0x38E, /* 34, +5.0dB */ -+ 0x3C4, /* 35, +5.5dB */ -+ 0x3FE /* 36, +6.0dB */ -+}; -+#elif(ODM_IC_11AC_SERIES_SUPPORT) -+u32 ofdm_swing_table_8812[OFDM_TABLE_SIZE_8812] = { -+ 0x3FE, /* 0, (6dB) */ -+ 0x3C4, /* 1, (5.5dB) */ -+ 0x38E, /* 2, (5dB) */ -+ 0x35C, /* 3, (4.5dB) */ -+ 0x32B, /* 4, (4dB) */ -+ 0x2FE, /* 5, (3.5dB) */ -+ 0x2D3, /* 6, (3dB) */ -+ 0x2AB, /* 7, (2.5dB) */ -+ 0x285, /* 8, (2dB) */ -+ 0x261, /* 9, (1.5dB */ -+ 0x23E, /* 10, (1dB) */ -+ 0x21E, /* 11, (0.5dB) */ -+ 0x200, /* 12, (0dB) 8814 int PA 2G default */ -+ 0x1E3, /* 13, (-0.5dB) */ -+ 0x1C8, /* 14, (-1dB) */ -+ 0x1AF, /* 15, (-1.5dB) */ -+ 0x197, /* 16, (-2dB) */ -+ 0x180, /* 17, (-2.5dB) */ -+ 0x16A, /* 18, (-3dB) 8812 / 8814 int PA 5G / 8814 ext PA 2G5G default */ -+ 0x156, /* 19, (-3.5dB) */ -+ 0x143, /* 20, (-4dB) 8812 HP default */ -+ 0x131, /* 21, (-4.5dB) */ -+ 0x120, /* 22, (-5dB) */ -+ 0x110, /* 23, (-5.5dB) */ -+ 0x101, /* 24, (-6dB) */ -+ 0x0F2, /* 25, (-6.5dB) */ -+ 0x0E5, /* 26, (-7dB) */ -+ 0x0D8, /* 27, (-7.5dB) */ -+ 0x0CC, /* 28, (-8dB) */ -+ 0x0C0, /* 29, (-8.5dB) */ -+ 0x0B6, /* 30, (-9dB) */ -+ 0x0AC, /* 31, (-9.5dB) */ -+ 0x0A2, /* 32, (-10dB) */ -+ 0x099, /* 33, (-10.5dB) */ -+ 0x090, /* 34, (-11dB) */ -+ 0x088, /* 35, (-11.5dB) */ -+ 0x081, /* 36, (-12dB) */ -+ 0x079, /* 37, (-12.5dB) */ -+ 0x072, /* 38, (-13dB) */ -+ 0x06c, /* 39, (-13.5dB) */ -+ 0x066, /* 40, (-14dB) */ -+ 0x060, /* 41, (-14.5dB) */ -+ 0x05B /* 42, (-15dB) */ -+}; -+#endif -+ -+u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = { -+ 0x0CD, -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, -+ 0x287, -+ 0x2AE, -+ 0x2D6, -+ 0x301, -+ 0x32F, -+ 0x35F, -+ 0x392, -+ 0x3C9, -+ 0x402, -+ 0x43F, -+ 0x47F, -+ 0x4C3, -+ 0x50C, -+ 0x558, -+ 0x5A9, -+ 0x5FF, -+ 0x65A, -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+/* JJ ADD 20161014 */ -+u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = { -+ 0x0CD, -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, -+ 0x287, -+ 0x2AE, -+ 0x2D6, -+ 0x301, -+ 0x32F, -+ 0x35F, -+ 0x392, -+ 0x3C9, -+ 0x402, -+ 0x43F, -+ 0x47F, -+ 0x4C3, -+ 0x50C, -+ 0x558, -+ 0x5A9, -+ 0x5FF, -+ 0x65A, -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+ -+/* #endif */ -+/* 3============================================================ -+ * 3 Tx Power Tracking -+ * 3============================================================ */ -+ -+void -+odm_txpowertracking_init( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ if (!(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8814B | ODM_IC_11N_SERIES))) -+ return; -+#endif -+ -+ odm_txpowertracking_thermal_meter_init(dm); -+} -+ -+ -+u8 -+get_swing_index( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0, bb_swing_mask = 0; -+ u32 bb_swing = 0; -+ u32 swing_table_size = 0; -+ u32 *swing_table = 0; -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+#if (RTL8197F_SUPPORT == 1) -+ if (GET_CHIP_VER(priv) == VERSION_8197F) { -+ bb_swing = phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKOFDM_D); -+ swing_table = ofdm_swing_table_new; -+ swing_table_size = OFDM_TABLE_SIZE_92D; -+ bb_swing_mask = 22; -+ } -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ if (GET_CHIP_VER(priv) == VERSION_8192F) { -+ bb_swing = phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKOFDM_D); -+ swing_table = ofdm_swing_table_new; -+ swing_table_size = OFDM_TABLE_SIZE_92D; -+ bb_swing_mask = 22; -+ } -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+ if (GET_CHIP_VER(priv) == VERSION_8822B) { -+ bb_swing = phy_query_bb_reg(priv, REG_A_TX_SCALE_JAGUAR, 0xFFE00000); -+ swing_table = tx_scaling_table_jaguar; -+ swing_table_size = TXSCALE_TABLE_SIZE; -+ bb_swing_mask = 0; -+ } -+#endif -+ -+ for (i = 0; i < swing_table_size - 1; i++) { -+ u32 table_value = swing_table[i] >> bb_swing_mask; -+ -+ if (bb_swing == table_value) -+ break; -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "bb_swing=0x%x bbswing_index=%d\n", bb_swing, i); -+ -+ -+ return i; -+} -+ -+s8 -+get_txagc_default_index( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ s8 tmp; -+ -+#if RTL8814B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ tmp = (s8)(odm_get_bb_reg(dm, R_0x18a0, 0x7f) & 0xff); -+ if (tmp & BIT(6)) -+ tmp = tmp | 0x80; -+ return tmp; -+ } else -+ return 0; -+#endif -+} -+ -+void -+odm_txpowertracking_thermal_meter_init( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; -+ struct rtl8192cd_priv *priv = dm->priv; -+ u8 p; -+ u8 default_swing_index; -+ u8 i; -+#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8192F_SUPPORT == 1) -+ if ((GET_CHIP_VER(priv) == VERSION_8197F) || (GET_CHIP_VER(priv) == VERSION_8822B) ||(GET_CHIP_VER(priv) == VERSION_8192F)) -+ default_swing_index = get_swing_index(dm); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter = dm->adapter; -+ PMGNT_INFO mgnt_info = &adapter->MgntInfo; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ -+ mgnt_info->is_txpowertracking = true; -+ hal_data->tx_powercount = 0; -+ hal_data->is_txpowertracking_init = false; -+ -+ if (*(dm->mp_mode) == false) -+ hal_data->txpowertrack_control = true; -+ RF_DBG(dm, COMP_POWER_TRACKING, "mgnt_info->is_txpowertracking = %d\n", mgnt_info->is_txpowertracking); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#ifdef CONFIG_RTL8188E -+ { -+ dm->rf_calibrate_info.is_txpowertracking = true; -+ dm->rf_calibrate_info.tx_powercount = 0; -+ dm->rf_calibrate_info.is_txpowertracking_init = false; -+ -+ if (*(dm->mp_mode) == false) -+ dm->rf_calibrate_info.txpowertrack_control = true; -+ -+ MSG_8192C("dm txpowertrack_control = %d\n", dm->rf_calibrate_info.txpowertrack_control); -+ } -+#else -+ { -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_priv *pdmpriv = &hal_data->dmpriv; -+ -+ pdmpriv->is_txpowertracking = true; -+ pdmpriv->tx_powercount = 0; -+ pdmpriv->is_txpowertracking_init = false; -+ -+ if (*(dm->mp_mode) == false) /* for mp driver, turn off txpwrtracking as default */ -+ pdmpriv->txpowertrack_control = true; -+ -+ MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control); -+ -+ } -+#endif/* endif (CONFIG_RTL8188E==1) */ -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#ifdef RTL8188E_SUPPORT -+ { -+ dm->rf_calibrate_info.is_txpowertracking = true; -+ dm->rf_calibrate_info.tx_powercount = 0; -+ dm->rf_calibrate_info.is_txpowertracking_init = false; -+ dm->rf_calibrate_info.txpowertrack_control = true; -+ dm->rf_calibrate_info.tm_trigger = 0; -+ } -+#endif -+#endif -+ -+ dm->rf_calibrate_info.txpowertrack_control = true; -+ dm->rf_calibrate_info.delta_power_index = 0; -+ dm->rf_calibrate_info.delta_power_index_last = 0; -+ dm->rf_calibrate_info.power_index_offset = 0; -+ dm->rf_calibrate_info.thermal_value = 0; -+ cali_info->default_ofdm_index = 28; -+ -+#if (RTL8197F_SUPPORT == 1) -+ if (GET_CHIP_VER(priv) == VERSION_8197F) { -+ cali_info->default_ofdm_index = (default_swing_index >= (OFDM_TABLE_SIZE_92D - 1)) ? 30 : default_swing_index; -+ cali_info->default_cck_index = 28; -+ } -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ if (GET_CHIP_VER(priv) == VERSION_8192F) { -+ cali_info->default_ofdm_index = (default_swing_index >= (OFDM_TABLE_SIZE_92D - 1)) ? 30 : default_swing_index; -+ cali_info->default_cck_index = 28; -+ } -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+ if (GET_CHIP_VER(priv) == VERSION_8822B) { -+ cali_info->default_ofdm_index = (default_swing_index >= (TXSCALE_TABLE_SIZE - 1)) ? 24 : default_swing_index; -+ cali_info->default_cck_index = 20; -+ } -+#endif -+ -+ -+#if RTL8188E_SUPPORT -+ if (GET_CHIP_VER(priv) == VERSION_8188E) { -+ cali_info->default_cck_index = 20; /* -6 dB */ -+ } -+#endif -+ -+#if RTL8192E_SUPPORT -+ if (GET_CHIP_VER(priv) == VERSION_8192E) { -+ cali_info->default_cck_index = 8; /* -12 dB */ -+ } -+#endif -+ -+#if RTL8814B_SUPPORT -+ if (GET_CHIP_VER(priv) == VERSION_8814B) { -+ cali_info->default_txagc_index = get_txagc_default_index(dm); -+ -+ for (i = 0; i < MAX_PATH_NUM_8814B; i++) -+ tssi->tssi_trk_txagc_offset[i] = -+ cali_info->default_txagc_index; -+ } -+#endif -+ -+ cali_info->bb_swing_idx_ofdm_base = cali_info->default_ofdm_index; -+ cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index; -+ dm->rf_calibrate_info.CCK_index = cali_info->default_cck_index; -+ -+ for (p = 0; p < MAX_RF_PATH; p++) { -+ dm->rf_calibrate_info.OFDM_index[p] = cali_info->default_ofdm_index; -+ cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index; -+ cali_info->kfree_offset[p] = 0; /* for 8814 kfree*/ -+ } -+ cali_info->bb_swing_idx_cck = cali_info->default_cck_index; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "cali_info->default_ofdm_index=%d cali_info->default_cck_index=%d\n", cali_info->default_ofdm_index, cali_info->default_cck_index); -+ -+ cali_info->tm_trigger = 0; -+} -+ -+ -+void -+odm_txpowertracking_check( -+ void *dm_void -+) -+{ -+ /* */ -+ /* For AP/ADSL use struct rtl8192cd_priv* */ -+ /* For CE/NIC use struct void* */ -+ /* */ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ -+ if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) -+ return; -+ -+ /* */ -+ /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ -+ /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ -+ /* HW dynamic mechanism. */ -+ /* */ -+ switch (dm->support_platform) { -+ case ODM_WIN: -+ odm_txpowertracking_check_mp(dm); -+ break; -+ -+ case ODM_CE: -+ odm_txpowertracking_check_ce(dm); -+ break; -+ -+ case ODM_AP: -+ odm_txpowertracking_check_ap(dm); -+ break; -+ } -+ -+} -+ -+void -+odm_txpowertracking_check_ce( -+ void *dm_void -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ -+#if (RTL8188E_SUPPORT == 1) -+ -+ /* if(!mgnt_info->is_txpowertracking || (!pdmpriv->txpowertrack_control && pdmpriv->is_ap_kdone)) */ -+ -+ if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) -+ return; -+ -+ if (!dm->rf_calibrate_info.tm_trigger) { /* at least delay 1 sec */ -+ /* hal_data->TxPowerCheckCnt++; */ /* cosa add for debug */ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60); -+ /* DBG_8192C("Trigger 92C Thermal Meter!!\n"); */ -+ -+ dm->rf_calibrate_info.tm_trigger = 1; -+ return; -+ -+ } else { -+ /* DBG_8192C("Schedule TxPowerTracking direct call!!\n"); */ -+ odm_txpowertracking_callback_thermal_meter_8188e(adapter); -+ dm->rf_calibrate_info.tm_trigger = 0; -+ } -+#endif -+ -+#endif -+} -+ -+void -+odm_txpowertracking_check_mp( -+ void *dm_void -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ -+ if (odm_check_power_status(adapter) == false) -+ return; -+ -+ if (!adapter->is_slave_of_dmsp || adapter->dual_mac_smart_concurrent == false) -+ odm_txpowertracking_thermal_meter_check(adapter); -+#endif -+ -+} -+ -+ -+void -+odm_txpowertracking_check_ap( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; -+ -+#if ((RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1) || (RTL8198F_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8812F_SUPPORT == 1) || (RTL8197G_SUPPORT == 1)) -+ if (!dm->rf_calibrate_info.tm_trigger) { -+ if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A | ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8192F | ODM_RTL8198F)) { -+ odm_set_rf_reg(dm, RF_PATH_A, 0x42, (BIT(17) | BIT(16)), 0x3); -+ } else if (dm->support_ic_type & ODM_RTL8812F) { -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00); -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00); -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); -+ } else if (dm->support_ic_type & ODM_RTL8814B) { -+ odm_set_rf_reg(dm, RF_PATH_A, 0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1); -+ } else if (dm->support_ic_type & ODM_RTL8197G) { -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x42, BIT(17), 0x0); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x42, BIT(17), 0x1); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x42, BIT(17), 0x0); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x42, BIT(17), 0x1); -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ ODM_delay_us(300); -+ odm_txpowertracking_callback_thermal_meter(dm); -+ tssi->thermal_trigger = 1; -+ } -+ -+ dm->rf_calibrate_info.tm_trigger = 1; -+ } else { -+ odm_txpowertracking_callback_thermal_meter(dm); -+ if (dm->support_ic_type & ODM_RTL8814B) -+ tssi->thermal_trigger = 0; -+ dm->rf_calibrate_info.tm_trigger = 0; -+ } -+#endif -+ -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ap.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ap.h -new file mode 100644 -index 000000000000..098e2845067c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ap.h -@@ -0,0 +1,407 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_POWERTRACKING_H__ -+#define __HALRF_POWERTRACKING_H__ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #ifdef RTK_AC_SUPPORT -+ #define ODM_IC_11AC_SERIES_SUPPORT 1 -+ #else -+ #define ODM_IC_11AC_SERIES_SUPPORT 0 -+ #endif -+#else -+ #define ODM_IC_11AC_SERIES_SUPPORT 1 -+#endif -+ -+#define DPK_DELTA_MAPPING_NUM 13 -+#define index_mapping_HP_NUM 15 -+#define DELTA_SWINGIDX_SIZE 30 -+#define DELTA_SWINTSSI_SIZE 61 -+#define BAND_NUM 3 -+#define MAX_RF_PATH 4 -+#define TXSCALE_TABLE_SIZE 37 -+#define CCK_TABLE_SIZE_8723D 41 -+/* JJ ADD 20161014 */ -+#define CCK_TABLE_SIZE_8710B 41 -+ -+#define IQK_MAC_REG_NUM 4 -+#define IQK_ADDA_REG_NUM 16 -+#define IQK_BB_REG_NUM_MAX 10 -+ -+#define IQK_BB_REG_NUM 9 -+ -+#define AVG_THERMAL_NUM 8 -+#define AVG_THERMAL_NUM_DPK 8 -+#define THERMAL_DPK_AVG_NUM 4 -+ -+#define iqk_matrix_reg_num 8 -+/* #define IQK_MATRIX_SETTINGS_NUM 1+24+21 */ -+#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ -+ -+#if !defined(_OUTSRC_COEXIST) -+ #define OFDM_TABLE_SIZE_92D 43 -+ #define OFDM_TABLE_SIZE 37 -+ #define CCK_TABLE_SIZE 33 -+ #define CCK_TABLE_SIZE_88F 21 -+ #define CCK_TABLE_SIZE_8192F 41 -+ -+ -+ -+ /* #define OFDM_TABLE_SIZE_92E 54 */ -+ /* #define CCK_TABLE_SIZE_92E 54 */ -+ extern u32 ofdm_swing_table[OFDM_TABLE_SIZE_92D]; -+ extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8]; -+ extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8]; -+ -+ -+ extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE_92D]; -+ extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8]; -+ extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8]; -+ extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; -+ extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; -+ extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; -+ extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F]; -+ -+#endif -+ -+#define ODM_OFDM_TABLE_SIZE 37 -+#define ODM_CCK_TABLE_SIZE 33 -+#define TXPWR_TRACK_TABLE_SIZE 30 -+/* <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */ -+extern u8 delta_swing_table_idx_2ga_p_default[DELTA_SWINGIDX_SIZE]; -+extern u8 delta_swing_table_idx_2ga_n_default[DELTA_SWINGIDX_SIZE]; -+ -+static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; -+static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+ -+/* extern u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E]; -+ * extern u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8]; -+ * extern u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8]; */ -+ -+#ifdef CONFIG_WLAN_HAL_8192EE -+ #define OFDM_TABLE_SIZE_92E 54 -+ #define CCK_TABLE_SIZE_92E 54 -+ extern u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E]; -+ extern u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8]; -+ extern u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8]; -+#endif -+ -+#define OFDM_TABLE_SIZE_8812 43 -+#define AVG_THERMAL_NUM_8812 4 -+ -+#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\ -+ RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1) -+ extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; -+ #elif(ODM_IC_11AC_SERIES_SUPPORT) -+ extern unsigned int ofdm_swing_table_8812[OFDM_TABLE_SIZE_8812]; -+#endif -+ -+extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; -+/* JJ ADD 20161014 */ -+extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B]; -+ -+#define dm_check_txpowertracking odm_txpowertracking_check -+ -+struct iqk_matrix_regs_setting { -+ boolean is_iqk_done; -+ s32 value[1][iqk_matrix_reg_num]; -+}; -+ -+struct dm_rf_calibration_struct { -+ /* for tx power tracking */ -+ -+ u32 rega24; /* for TempCCK */ -+ s32 rege94; -+ s32 rege9c; -+ s32 regeb4; -+ s32 regebc; -+ -+ /* u8 is_txpowertracking; */ -+ u8 tx_powercount; -+ boolean is_txpowertracking_init; -+ boolean is_txpowertracking; -+ u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */ -+ u8 tm_trigger; -+ u8 internal_pa_5g[2]; /* pathA / pathB */ -+ -+ u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ -+ u8 thermal_value; -+ u8 thermal_value_path[MAX_RF_PATH]; -+ u8 thermal_value_lck; -+ u8 thermal_value_iqk; -+ s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ -+ u8 thermal_value_avg[AVG_THERMAL_NUM]; -+ u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM]; -+ u8 thermal_value_avg_index; -+ u8 thermal_value_avg_index_path[MAX_RF_PATH]; -+ s8 power_index_offset_path[MAX_RF_PATH]; -+ -+ u8 thermal_value_rx_gain; -+ u8 thermal_value_crystal; -+ u8 thermal_value_dpk_store; -+ u8 thermal_value_dpk_track; -+ boolean txpowertracking_in_progress; -+ -+ -+ boolean is_reloadtxpowerindex; -+ u8 is_rf_pi_enable; -+ u32 txpowertracking_callback_cnt; /* cosa add for debug */ -+ -+ u8 is_cck_in_ch14; -+ u8 CCK_index; -+ u8 OFDM_index[MAX_RF_PATH]; -+ s8 power_index_offset; -+ s8 delta_power_index; -+ s8 delta_power_index_path[MAX_RF_PATH]; -+ s8 delta_power_index_last; -+ s8 delta_power_index_last_path[MAX_RF_PATH]; -+ boolean is_tx_power_changed; -+ -+ struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; -+ u8 delta_lck; -+ u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; -+ s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; -+ -+ u8 bb_swing_idx_ofdm[MAX_RF_PATH]; -+ u8 bb_swing_idx_ofdm_current; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; -+#else -+ u8 bb_swing_idx_ofdm_base; -+ u8 bb_swing_idx_ofdm_base_path[MAX_RF_PATH]; -+#endif -+ boolean bb_swing_flag_ofdm; -+ u8 bb_swing_idx_cck; -+ u8 bb_swing_idx_cck_current; -+ u8 bb_swing_idx_cck_base; -+ u8 default_ofdm_index; -+ u8 default_cck_index; -+ s8 default_txagc_index; -+ boolean bb_swing_flag_cck; -+ -+ s8 absolute_ofdm_swing_idx[MAX_RF_PATH]; -+ s8 remnant_ofdm_swing_idx[MAX_RF_PATH]; -+ s8 absolute_cck_swing_idx[MAX_RF_PATH]; -+ s8 remnant_cck_swing_idx; -+ s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */ -+ boolean modify_tx_agc_flag_path_a; -+ boolean modify_tx_agc_flag_path_b; -+ boolean modify_tx_agc_flag_path_c; -+ boolean modify_tx_agc_flag_path_d; -+ boolean modify_tx_agc_flag_path_a_cck; -+ boolean modify_tx_agc_flag_path_b_cck; -+ -+ s8 kfree_offset[MAX_RF_PATH]; -+ -+ /* -------------------------------------------------------------------- */ -+ -+ /* for IQK */ -+ u32 regc04; -+ u32 reg874; -+ u32 regc08; -+ u32 regb68; -+ u32 regb6c; -+ u32 reg870; -+ u32 reg860; -+ u32 reg864; -+ -+ boolean is_iqk_initialized; -+ boolean is_lck_in_progress; -+ boolean is_antenna_detected; -+ boolean is_need_iqk; -+ boolean is_iqk_in_progress; -+ boolean is_iqk_pa_off; -+ u8 delta_iqk; -+ u32 ADDA_backup[IQK_ADDA_REG_NUM]; -+ u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; -+ u32 IQK_BB_backup_recover[9]; -+ u32 IQK_BB_backup[IQK_BB_REG_NUM]; -+ u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ -+ u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ -+ u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ -+ u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ -+ -+ u64 iqk_start_time; -+ u64 iqk_total_progressing_time; -+ u64 iqk_progressing_time; -+ u64 lck_progressing_time; -+ u32 lok_result; -+ u8 iqk_step; -+ u8 kcount; -+ u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */ -+ boolean is_mp_mode; -+ -+ /* for APK */ -+ u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */ -+ u8 is_ap_kdone; -+ u8 is_apk_thermal_meter_ignore; -+ u8 is_dp_done; -+#if 0 /*move below members to halrf_dpk.h*/ -+ u8 is_dp_path_aok; -+ u8 is_dp_path_bok; -+ u8 is_dp_path_cok; -+ u8 is_dp_path_dok; -+ u8 dp_path_a_result[3]; -+ u8 dp_path_b_result[3]; -+ u8 dp_path_c_result[3]; -+ u8 dp_path_d_result[3]; -+ boolean is_dpk_enable; -+ u32 txrate[11]; -+ u8 pwsf_2g_a[3]; -+ u8 pwsf_2g_b[3]; -+ u8 pwsf_2g_c[3]; -+ u8 pwsf_2g_d[3]; -+ u32 lut_2g_even_a[3][64]; -+ u32 lut_2g_odd_a[3][64]; -+ u32 lut_2g_even_b[3][64]; -+ u32 lut_2g_odd_b[3][64]; -+ u32 lut_2g_even_c[3][64]; -+ u32 lut_2g_odd_c[3][64]; -+ u32 lut_2g_even_d[3][64]; -+ u32 lut_2g_odd_d[3][64]; -+ u1Byte is_5g_pdk_a_ok; -+ u1Byte is_5g_pdk_b_ok; -+ u1Byte is_5g_pdk_c_ok; -+ u1Byte is_5g_pdk_d_ok; -+ u1Byte pwsf_5g_a[9]; -+ u1Byte pwsf_5g_b[9]; -+ u1Byte pwsf_5g_c[9]; -+ u1Byte pwsf_5g_d[9]; -+ u4Byte lut_5g_even_a[9][16]; -+ u4Byte lut_5g_odd_a[9][16]; -+ u4Byte lut_5g_even_b[9][16]; -+ u4Byte lut_5g_odd_b[9][16]; -+ u4Byte lut_5g_even_c[9][16]; -+ u4Byte lut_5g_odd_c[9][16]; -+ u4Byte lut_5g_even_d[9][16]; -+ u4Byte lut_5g_odd_d[9][16]; -+ u8 thermal_value_dpk; -+ u8 thermal_value_dpk_avg[AVG_THERMAL_NUM_DPK]; -+ u8 thermal_value_dpk_avg_index; -+#endif -+ s8 modify_tx_agc_value_ofdm; -+ s8 modify_tx_agc_value_cck; -+ -+ /*Add by Yuchen for Kfree Phydm*/ -+ u8 reg_rf_kfree_enable; /*for registry*/ -+ u8 rf_kfree_enable; /*for efuse enable check*/ -+ u32 tx_lok[2]; -+}; -+ -+void -+odm_txpowertracking_check_ap( -+ void *dm_void -+); -+ -+void -+odm_txpowertracking_check( -+ void *dm_void -+); -+ -+ -+void -+odm_txpowertracking_thermal_meter_init( -+ void *dm_void -+); -+ -+void -+odm_txpowertracking_init( -+ void *dm_void -+); -+ -+void -+odm_txpowertracking_check_mp( -+ void *dm_void -+); -+ -+ -+void -+odm_txpowertracking_check_ce( -+ void *dm_void -+); -+ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ -+void -+odm_txpowertracking_callback_thermal_meter92c( -+ void *adapter -+); -+ -+void -+odm_txpowertracking_callback_rx_gain_thermal_meter92d( -+ void *adapter -+); -+ -+void -+odm_txpowertracking_callback_thermal_meter92d( -+ void *adapter -+); -+ -+void -+odm_txpowertracking_direct_call92c( -+ void *adapter -+); -+ -+void -+odm_txpowertracking_thermal_meter_check( -+ void *adapter -+); -+ -+#endif -+ -+ -+ -+#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ce.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ce.c -new file mode 100644 -index 000000000000..6607991766f3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ce.c -@@ -0,0 +1,955 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@=========================================================== -+ * include files -+ *============================================================ -+ */ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+/*@************************************************************ -+ * Global var -+ * ************************************************************ -+ */ -+ -+u32 ofdm_swing_table[OFDM_TABLE_SIZE] = { -+ 0x7f8001fe, /* 0, +6.0dB */ -+ 0x788001e2, /* 1, +5.5dB */ -+ 0x71c001c7, /* 2, +5.0dB*/ -+ 0x6b8001ae, /* 3, +4.5dB*/ -+ 0x65400195, /* 4, +4.0dB*/ -+ 0x5fc0017f, /* 5, +3.5dB*/ -+ 0x5a400169, /* 6, +3.0dB*/ -+ 0x55400155, /* 7, +2.5dB*/ -+ 0x50800142, /* 8, +2.0dB*/ -+ 0x4c000130, /* 9, +1.5dB*/ -+ 0x47c0011f, /* 10, +1.0dB*/ -+ 0x43c0010f, /* 11, +0.5dB*/ -+ 0x40000100, /* 12, +0dB*/ -+ 0x3c8000f2, /* 13, -0.5dB*/ -+ 0x390000e4, /* 14, -1.0dB*/ -+ 0x35c000d7, /* 15, -1.5dB*/ -+ 0x32c000cb, /* 16, -2.0dB*/ -+ 0x300000c0, /* 17, -2.5dB*/ -+ 0x2d4000b5, /* 18, -3.0dB*/ -+ 0x2ac000ab, /* 19, -3.5dB*/ -+ 0x288000a2, /* 20, -4.0dB*/ -+ 0x26000098, /* 21, -4.5dB*/ -+ 0x24000090, /* 22, -5.0dB*/ -+ 0x22000088, /* 23, -5.5dB*/ -+ 0x20000080, /* 24, -6.0dB*/ -+ 0x1e400079, /* 25, -6.5dB*/ -+ 0x1c800072, /* 26, -7.0dB*/ -+ 0x1b00006c, /* 27. -7.5dB*/ -+ 0x19800066, /* 28, -8.0dB*/ -+ 0x18000060, /* 29, -8.5dB*/ -+ 0x16c0005b, /* 30, -9.0dB*/ -+ 0x15800056, /* 31, -9.5dB*/ -+ 0x14400051, /* 32, -10.0dB*/ -+ 0x1300004c, /* 33, -10.5dB*/ -+ 0x12000048, /* 34, -11.0dB*/ -+ 0x11000044, /* 35, -11.5dB*/ -+ 0x10000040, /* 36, -12.0dB*/ -+}; -+ -+u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = { -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */ -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */ -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */ -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */ -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */ -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */ -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */ -+ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0 default*/ -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */ -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */ -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */ -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */ -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */ -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */ -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */ -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */ -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */ -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */ -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */ -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */ -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */ -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */ -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */ -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */ -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */ -+}; -+ -+u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = { -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */ -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */ -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */ -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */ -+ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0 default*/ -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */ -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */ -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */ -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */ -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */ -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */ -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */ -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */ -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */ -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */ -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */ -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */ -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */ -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */ -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */ -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */ -+}; -+ -+u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = { -+ 0x0b40002d, /* 0, -15.0dB */ -+ 0x0c000030, /* 1, -14.5dB */ -+ 0x0cc00033, /* 2, -14.0dB */ -+ 0x0d800036, /* 3, -13.5dB */ -+ 0x0e400039, /* 4, -13.0dB */ -+ 0x0f00003c, /* 5, -12.5dB */ -+ 0x10000040, /* 6, -12.0dB */ -+ 0x11000044, /* 7, -11.5dB */ -+ 0x12000048, /* 8, -11.0dB */ -+ 0x1300004c, /* 9, -10.5dB */ -+ 0x14400051, /* 10, -10.0dB */ -+ 0x15800056, /* 11, -9.5dB */ -+ 0x16c0005b, /* 12, -9.0dB */ -+ 0x18000060, /* 13, -8.5dB */ -+ 0x19800066, /* 14, -8.0dB */ -+ 0x1b00006c, /* 15, -7.5dB */ -+ 0x1c800072, /* 16, -7.0dB */ -+ 0x1e400079, /* 17, -6.5dB */ -+ 0x20000080, /* 18, -6.0dB */ -+ 0x22000088, /* 19, -5.5dB */ -+ 0x24000090, /* 20, -5.0dB */ -+ 0x26000098, /* 21, -4.5dB */ -+ 0x288000a2, /* 22, -4.0dB */ -+ 0x2ac000ab, /* 23, -3.5dB */ -+ 0x2d4000b5, /* 24, -3.0dB */ -+ 0x300000c0, /* 25, -2.5dB */ -+ 0x32c000cb, /* 26, -2.0dB */ -+ 0x35c000d7, /* 27, -1.5dB */ -+ 0x390000e4, /* 28, -1.0dB */ -+ 0x3c8000f2, /* 29, -0.5dB */ -+ 0x40000100, /* 30, +0dB */ -+ 0x43c0010f, /* 31, +0.5dB */ -+ 0x47c0011f, /* 32, +1.0dB */ -+ 0x4c000130, /* 33, +1.5dB */ -+ 0x50800142, /* 34, +2.0dB */ -+ 0x55400155, /* 35, +2.5dB */ -+ 0x5a400169, /* 36, +3.0dB */ -+ 0x5fc0017f, /* 37, +3.5dB */ -+ 0x65400195, /* 38, +4.0dB */ -+ 0x6b8001ae, /* 39, +4.5dB */ -+ 0x71c001c7, /* 40, +5.0dB */ -+ 0x788001e2, /* 41, +5.5dB */ -+ 0x7f8001fe /* 42, +6.0dB */ -+}; -+ -+u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+ {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+ {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+ {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+ {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+ {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+ {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+ {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+ {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+ {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+ {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+ {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+ {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+ {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+ {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+ {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+ {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+ {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+ {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+ {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+ {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+ {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+ {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+ {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+ {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+ {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+ {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+ {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+ {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+ {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+ {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+ {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+ {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+ {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+ {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+ {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+ {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+ {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+ {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+ {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+ {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+ {0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+ {0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+ {0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+ {0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+ {0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+ {0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+ {0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+ {0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+ {0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+ {0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+ {0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+ {0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+ {0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+ {0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+ {0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+ {0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+ {0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+ {0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+ {0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+ {0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB*/ -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB*/ -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB*/ -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB*/ -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB*/ -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB*/ -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB*/ -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB*/ -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB*/ -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB*/ -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB*/ -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB*/ -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB*/ -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB*/ -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */ -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB*/ -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB*/ -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */ -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB*/ -+ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 20, -6.0dB */ -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB*/ -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */ -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB*/ -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */ -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB*/ -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB*/ -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB*/ -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */ -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB*/ -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB*/ -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB*/ -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB*/ -+}; -+ -+u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB*/ -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB*/ -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB*/ -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB*/ -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB*/ -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /*5, -13.5dB*/ -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB*/ -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB*/ -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB*/ -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB*/ -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB*/ -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /*11, -10.5dB*/ -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB*/ -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB*/ -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /*14, -9.0dB */ -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB*/ -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB*/ -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */ -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */ -+ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */ -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB*/ -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */ -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /*23, -4.5dB*/ -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */ -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */ -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */ -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /*27, -2.5dB*/ -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */ -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /*29, -1.5dB*/ -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */ -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */ -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */ -+}; -+ -+u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, -+ 0x287, -+ 0x2AE, -+ 0x2D6, -+ 0x301, -+ 0x32F, -+ 0x35F, -+ 0x392, -+ 0x3C9, -+ 0x402, -+ 0x43F, -+ 0x47F, -+ 0x4C3, -+ 0x50C, -+ 0x558, -+ 0x5A9, -+ 0x5FF, -+ 0x65A, -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+/*@JJ ADD 20161014 */ -+u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, -+ 0x287, -+ 0x2AE, -+ 0x2D6, -+ 0x301, -+ 0x32F, -+ 0x35F, -+ 0x392, -+ 0x3C9, -+ 0x402, -+ 0x43F, -+ 0x47F, -+ 0x4C3, -+ 0x50C, -+ 0x558, -+ 0x5A9, -+ 0x5FF, -+ 0x65A, -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+/*@Winnita ADD 20171116 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/ -+u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, /*19*/ -+ 0x287, /*20*/ -+ 0x2AE, /*21*/ -+ 0x2D6, /*22*/ -+ 0x301, /*23*/ -+ 0x32F, /*24*/ -+ 0x35F, /*25*/ -+ 0x392, /*26*/ -+ 0x3C9, /*27*/ -+ 0x402, /*28*/ -+ 0x43F, /*29*/ -+ 0x47F, /*30*/ -+ 0x4C3, /*31*/ -+ 0x50C, /*32*/ -+ 0x558, /*33*/ -+ 0x5A9, /*34*/ -+ 0x5FF, /*35*/ -+ 0x65A, /*36*/ -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = { -+ 0x081, /* 0, -12.0dB*/ -+ 0x088, /* 1, -11.5dB*/ -+ 0x090, /* 2, -11.0dB*/ -+ 0x099, /* 3, -10.5dB*/ -+ 0x0A2, /* 4, -10.0dB*/ -+ 0x0AC, /* 5, -9.5dB*/ -+ 0x0B6, /* 6, -9.0dB*/ -+ 0x0C0, /*7, -8.5dB*/ -+ 0x0CC, /* 8, -8.0dB*/ -+ 0x0D8, /* 9, -7.5dB*/ -+ 0x0E5, /* 10, -7.0dB*/ -+ 0x0F2, /* 11, -6.5dB*/ -+ 0x101, /* 12, -6.0dB*/ -+ 0x110, /* 13, -5.5dB*/ -+ 0x120, /* 14, -5.0dB*/ -+ 0x131, /* 15, -4.5dB*/ -+ 0x143, /* 16, -4.0dB*/ -+ 0x156, /* 17, -3.5dB*/ -+ 0x16A, /* 18, -3.0dB*/ -+ 0x180, /* 19, -2.5dB*/ -+ 0x197, /* 20, -2.0dB*/ -+ 0x1AF, /* 21, -1.5dB*/ -+ 0x1C8, /* 22, -1.0dB*/ -+ 0x1E3, /* 23, -0.5dB*/ -+ 0x200, /* 24, +0 dB*/ -+ 0x21E, /* 25, +0.5dB*/ -+ 0x23E, /* 26, +1.0dB*/ -+ 0x261, /* 27, +1.5dB*/ -+ 0x285, /* 28, +2.0dB*/ -+ 0x2AB, /* 29, +2.5dB*/ -+ 0x2D3, /*30, +3.0dB*/ -+ 0x2FE, /* 31, +3.5dB*/ -+ 0x32B, /* 32, +4.0dB*/ -+ 0x35C, /* 33, +4.5dB*/ -+ 0x38E, /* 34, +5.0dB*/ -+ 0x3C4, /* 35, +5.5dB*/ -+ 0x3FE /* 36, +6.0dB */ -+}; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) -+#else -+u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, -+ 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, -+ 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; -+u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, -+ 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, -+ 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+#endif -+ -+void odm_txpowertracking_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_txpowertracking_thermal_meter_init(dm); -+} -+ -+u8 get_swing_index(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+#endif -+ u8 i = 0; -+ u32 bb_swing, table_value; -+ -+ if (dm->support_ic_type & -+ (ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E | -+ ODM_RTL8188F | ODM_RTL8703B | ODM_RTL8723D | -+ ODM_RTL8710B)) { -+ -+ bb_swing = odm_get_bb_reg(dm, R_0xc80, 0xFFC00000); -+ -+ for (i = 0; i < OFDM_TABLE_SIZE; i++) { -+ table_value = ofdm_swing_table_new[i]; -+ -+ if (table_value >= 0x100000) -+ table_value >>= 22; -+ if (bb_swing == table_value) -+ break; -+ } -+ } else { -+#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -+ bb_swing = -+ phy_get_tx_bb_swing_8812a(adapter, -+ hal_data->current_band_type, -+ RF_PATH_A); -+#else -+ bb_swing = odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000); -+#endif -+ for (i = 0; i < TXSCALE_TABLE_SIZE; i++) { -+ table_value = tx_scaling_table_jaguar[i]; -+ -+ if (bb_swing == table_value) -+ break; -+ } -+ } -+ -+ return i; -+} -+ -+u8 get_cck_swing_index(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ u8 i = 0; -+ u32 bb_cck_swing; -+ -+ if (dm->support_ic_type & -+ (ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E)) { -+ bb_cck_swing = odm_read_1byte(dm, 0xa22); -+ -+ for (i = 0; i < CCK_TABLE_SIZE; i++) { -+ if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0]) -+ break; -+ } -+ } else if (dm->support_ic_type & ODM_RTL8703B) { -+ bb_cck_swing = odm_read_1byte(dm, 0xa22); -+ -+ for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { -+ if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0]) -+ break; -+ } -+ } -+ -+ return i; -+} -+ -+s8 -+get_txagc_default_index( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ s8 tmp; -+ -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ tmp = (s8)(odm_get_bb_reg(dm, R_0x18a0, 0x7f) & 0xff); -+ if (tmp & BIT(6)) -+ tmp = tmp | 0x80; -+ return tmp; -+ } else -+ return 0; -+} -+ -+void odm_txpowertracking_thermal_meter_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; -+ -+ u8 swing_idx = get_swing_index(dm); -+ u8 cckswing_idx = get_cck_swing_index(dm); -+ u8 p = 0; -+ -+ cali_info->is_txpowertracking = true; -+ cali_info->tx_powercount = 0; -+ cali_info->is_txpowertracking_init = false; -+ -+ if (!(*dm->mp_mode)) -+ cali_info->txpowertrack_control = true; -+ else -+ cali_info->txpowertrack_control = false; -+ -+ if (!(*dm->mp_mode)) -+ cali_info->txpowertrack_control = true; -+ -+ RF_DBG(dm, DBG_RF_IQK, "dm txpowertrack_control = %d\n", -+ cali_info->txpowertrack_control); -+#if 0 -+ /* dm->rf_calibrate_info.txpowertrack_control = true; */ -+#endif -+ cali_info->thermal_value = rf->eeprom_thermal; -+ cali_info->thermal_value_iqk = rf->eeprom_thermal; -+ cali_info->thermal_value_lck = rf->eeprom_thermal; -+ -+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A]; -+ cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B]; -+ cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A]; -+ cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A]; -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A]; -+ cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B]; -+ cali_info->thermal_value_path[RF_PATH_C] = tssi->thermal[RF_PATH_C]; -+ cali_info->thermal_value_path[RF_PATH_D] = tssi->thermal[RF_PATH_D]; -+ cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A]; -+ cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A]; -+ } -+#endif -+ -+ if (!cali_info->default_bb_swing_index_flag) { -+ if (dm->support_ic_type & -+ (ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E | -+ ODM_RTL8703B | ODM_RTL8821)) { -+ if (swing_idx >= OFDM_TABLE_SIZE) -+ cali_info->default_ofdm_index = 30; -+ else -+ cali_info->default_ofdm_index = swing_idx; -+ -+ if (cckswing_idx >= CCK_TABLE_SIZE) -+ cali_info->default_cck_index = 20; -+ else -+ cali_info->default_cck_index = cckswing_idx; -+ /*@add by Mingzhi.Guo 2015-03-23*/ -+ } else if (dm->support_ic_type == ODM_RTL8188F) { -+ cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ -+ cali_info->default_cck_index = 20; /*CCK:-6dB*/ -+ /*@add by zhaohe 2015-10-27*/ -+ } else if (dm->support_ic_type == ODM_RTL8723D) { -+ cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ -+ cali_info->default_cck_index = 28; /*CCK: -6dB*/ -+ /*@JJ ADD 20161014 */ -+ } else if (dm->support_ic_type == ODM_RTL8710B) { -+ cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ -+ cali_info->default_cck_index = 28; /*CCK: -6dB*/ -+ } else if (dm->support_ic_type == ODM_RTL8192F) { -+ cali_info->default_ofdm_index = 30;/*OFDM: 0dB*/ -+ cali_info->default_cck_index = 28; /*CCK: -6dB*/ -+ } else { -+ if (swing_idx >= TXSCALE_TABLE_SIZE) -+ cali_info->default_ofdm_index = 24; -+ else -+ cali_info->default_ofdm_index = swing_idx; -+ -+ cali_info->default_txagc_index = get_txagc_default_index(dm); -+ -+ cali_info->default_cck_index = 24; -+ } -+ cali_info->default_bb_swing_index_flag = true; -+ } -+ -+ cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index; -+ cali_info->CCK_index = cali_info->default_cck_index; -+ -+ for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) { -+ cali_info->bb_swing_idx_ofdm_base[p] = -+ cali_info->default_ofdm_index; -+ cali_info->OFDM_index[p] = cali_info->default_ofdm_index; -+ cali_info->delta_power_index[p] = 0; -+ cali_info->delta_power_index_last[p] = 0; -+ cali_info->power_index_offset[p] = 0; -+ } -+ cali_info->modify_tx_agc_value_ofdm = 0; -+ cali_info->modify_tx_agc_value_cck = 0; -+ cali_info->tm_trigger = 0; -+} -+ -+void odm_txpowertracking_check(void *dm_void) -+{ -+ /*@2011/09/29 MH In HW integration first stage -+ * we provide 4 different handle to operate at the same time. -+ * In the stage2/3, we need to prive universal interface and merge all -+ * HW dynamic mechanism. -+ */ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ switch (dm->support_platform) { -+ case ODM_WIN: -+ odm_txpowertracking_check_mp(dm); -+ break; -+ -+ case ODM_CE: -+ odm_txpowertracking_check_ce(dm); -+ break; -+ -+ case ODM_AP: -+ odm_txpowertracking_check_ap(dm); -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+void odm_txpowertracking_check_ce(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) -+ return; -+ -+ if ((rf->power_track_type & 0xf0) >> 4 != 0) { -+ if (dm->support_ic_type & ODM_RTL8822C) { -+ /*halrf_tssi_cck(dm);*/ -+ /*halrf_thermal_cck(dm);*/ -+ return; -+ } -+ } -+ -+ if (!dm->rf_calibrate_info.tm_trigger) { -+ if (dm->support_ic_type & -+ (ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E | -+ ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 | -+ ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D | -+ ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B | -+ ODM_RTL8192F)) -+ odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, -+ (BIT(17) | BIT(16)), 0x03); -+ else if (dm->support_ic_type & ODM_RTL8822C) { -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00); -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00); -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); -+ } else if (dm->support_ic_type & ODM_RTL8814B) { -+ odm_set_rf_reg(dm, RF_PATH_A, 0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1); -+ } else -+ odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD, -+ RFREGOFFSETMASK, 0x60); -+ -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ ODM_delay_us(300); -+ odm_txpowertracking_new_callback_thermal_meter(dm); -+ tssi->thermal_trigger = 1; -+ } -+#endif -+ dm->rf_calibrate_info.tm_trigger = 1; -+ return; -+ } -+ -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) { -+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+ odm_txpowertracking_new_callback_thermal_meter(dm); -+ if (dm->support_ic_type & ODM_RTL8814B) -+ tssi->thermal_trigger = 0; -+#endif -+ } else -+ odm_txpowertracking_callback_thermal_meter(dm); -+ dm->rf_calibrate_info.tm_trigger = 0; -+#endif -+} -+ -+void -+odm_txpowertracking_direct_ce(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+ if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) -+ return; -+ -+ if (dm->support_ic_type & ODM_RTL8822C) { -+ /*halrf_tssi_cck(dm);*/ -+ /*halrf_thermal_cck(dm);*/ -+ return; -+ } -+ -+ if (dm->support_ic_type & -+ (ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E | -+ ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 | -+ ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D | -+ ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B | -+ ODM_RTL8192F | ODM_RTL8814B)) -+ odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03); -+ else if (dm->support_ic_type & ODM_RTL8822C) { -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00); -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00); -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); -+ } else -+ odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD, RFREGOFFSETMASK, 0x60); -+ -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) { -+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+ odm_txpowertracking_new_callback_thermal_meter(dm); -+#endif -+ } else -+ odm_txpowertracking_callback_thermal_meter(dm); -+#endif -+ -+} -+ -+ -+void odm_txpowertracking_check_mp(void *dm_void) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ -+ if (odm_check_power_status(adapter) == false) { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, -+ ("check_pow_status, return false\n")); -+ return; -+ } -+ -+ odm_txpowertracking_thermal_meter_check(adapter); -+#endif -+} -+ -+void odm_txpowertracking_check_ap(void *dm_void) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+ return; -+ -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ce.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ce.h -new file mode 100644 -index 000000000000..3fec1abf799f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_ce.h -@@ -0,0 +1,331 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_POWERTRACKING_H__ -+#define __HALRF_POWERTRACKING_H__ -+ -+#define DPK_DELTA_MAPPING_NUM 13 -+#define index_mapping_HP_NUM 15 -+#define OFDM_TABLE_SIZE 43 -+#define CCK_TABLE_SIZE 33 -+#define CCK_TABLE_SIZE_88F 21 -+#define TXSCALE_TABLE_SIZE 37 -+#define CCK_TABLE_SIZE_8723D 41 -+/*@JJ ADD 20161014 */ -+#define CCK_TABLE_SIZE_8710B 41 -+#define CCK_TABLE_SIZE_8192F 41 -+ -+#define TXPWR_TRACK_TABLE_SIZE 30 -+#define DELTA_SWINGIDX_SIZE 30 -+#define DELTA_SWINTSSI_SIZE 61 -+#define BAND_NUM 4 -+ -+#define AVG_THERMAL_NUM 8 -+#define IQK_MAC_REG_NUM 4 -+#define IQK_ADDA_REG_NUM 16 -+#define IQK_BB_REG_NUM_MAX 10 -+ -+#define IQK_BB_REG_NUM 9 -+ -+#define iqk_matrix_reg_num 8 -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) -+#else -+/* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ -+#define IQK_MATRIX_SETTINGS_NUM (14 + 24 + 21) -+#endif -+ -+extern u32 ofdm_swing_table[OFDM_TABLE_SIZE]; -+extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8]; -+extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8]; -+ -+extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE]; -+extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8]; -+extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8]; -+extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; -+extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; -+extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; -+extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; -+/*@JJ ADD 20161014 */ -+extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B]; -+extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F]; -+ -+extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; -+ -+/*@<20121018, Kordan> In case fail to read TxPowerTrack.txt */ -+/* we use the table of 88E as the default table. */ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) -+#else -+extern u8 delta_swing_table_idx_2ga_p_8188e[]; -+extern u8 delta_swing_table_idx_2ga_n_8188e[]; -+#endif -+ -+#define dm_check_txpowertracking odm_txpowertracking_check -+ -+struct iqk_matrix_regs_setting { -+ boolean is_iqk_done; -+ s32 value[3][iqk_matrix_reg_num]; -+ boolean is_bw_iqk_result_saved[3]; -+}; -+ -+struct dm_rf_calibration_struct { -+ /* for tx power tracking */ -+ -+ u32 rega24; /* for TempCCK */ -+ s32 rege94; -+ s32 rege9c; -+ s32 regeb4; -+ s32 regebc; -+ -+ u8 tx_powercount; -+ boolean is_txpowertracking_init; -+ boolean is_txpowertracking; -+ /* for mp mode, turn off txpwrtracking as default */ -+ u8 txpowertrack_control; -+ u8 tm_trigger; -+ u8 internal_pa_5g[2]; /* pathA / pathB */ -+ -+ /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ -+ u8 thermal_meter[2]; -+ u8 thermal_value; -+ u8 thermal_value_path[MAX_RF_PATH]; -+ u8 thermal_value_lck; -+ u8 thermal_value_iqk; -+ s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ -+ u8 thermal_value_dpk; -+ u8 thermal_value_avg[AVG_THERMAL_NUM]; -+ u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM]; -+ u8 thermal_value_avg_index; -+ u8 thermal_value_avg_index_path[MAX_RF_PATH]; -+ u8 thermal_value_rx_gain; -+ u8 thermal_value_crystal; -+ u8 thermal_value_dpk_store; -+ u8 thermal_value_dpk_track; -+ boolean txpowertracking_in_progress; -+ -+ boolean is_reloadtxpowerindex; -+ u8 is_rf_pi_enable; -+ u32 txpowertracking_callback_cnt; /* cosa add for debug */ -+ -+ /*@---------------------- Tx power Tracking ---------------------- */ -+ u8 is_cck_in_ch14; -+ u8 CCK_index; -+ u8 OFDM_index[MAX_RF_PATH]; -+ s8 power_index_offset[MAX_RF_PATH]; -+ s8 delta_power_index[MAX_RF_PATH]; -+ s8 delta_power_index_last[MAX_RF_PATH]; -+ boolean is_tx_power_changed; -+ s8 xtal_offset; -+ s8 xtal_offset_last; -+ u8 xtal_offset_eanble; -+ -+ struct iqk_matrix_regs_setting -+ iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; -+ u8 delta_lck; -+ s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */ -+ u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; -+ s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; -+ -+ u8 bb_swing_idx_ofdm[MAX_RF_PATH]; -+ u8 bb_swing_idx_ofdm_current; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; -+#else -+ u8 bb_swing_idx_ofdm_base; -+#endif -+ boolean default_bb_swing_index_flag; -+ boolean bb_swing_flag_ofdm; -+ u8 bb_swing_idx_cck; -+ u8 bb_swing_idx_cck_current; -+ u8 bb_swing_idx_cck_base; -+ u8 default_ofdm_index; -+ u8 default_cck_index; -+ s8 default_txagc_index; -+ boolean bb_swing_flag_cck; -+ -+ s8 absolute_ofdm_swing_idx[MAX_RF_PATH]; -+ s8 remnant_ofdm_swing_idx[MAX_RF_PATH]; -+ s8 absolute_cck_swing_idx[MAX_RF_PATH]; -+ s8 remnant_cck_swing_idx; -+ s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */ -+ boolean modify_tx_agc_flag_path_a; -+ boolean modify_tx_agc_flag_path_b; -+ boolean modify_tx_agc_flag_path_c; -+ boolean modify_tx_agc_flag_path_d; -+ boolean modify_tx_agc_flag_path_a_cck; -+ boolean modify_tx_agc_flag_path_b_cck; -+ -+ s8 kfree_offset[MAX_RF_PATH]; -+ -+ /*@----------------------------------------------------------------- */ -+ -+ /* for IQK */ -+ u32 regc04; -+ u32 reg874; -+ u32 regc08; -+ u32 regb68; -+ u32 regb6c; -+ u32 reg870; -+ u32 reg860; -+ u32 reg864; -+ -+ boolean is_iqk_initialized; -+ boolean is_lck_in_progress; -+ boolean is_antenna_detected; -+ boolean is_need_iqk; -+ boolean is_iqk_in_progress; -+ boolean is_iqk_pa_off; -+ u8 delta_iqk; -+ u32 ADDA_backup[IQK_ADDA_REG_NUM]; -+ u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; -+ u32 IQK_BB_backup_recover[9]; -+ u32 IQK_BB_backup[IQK_BB_REG_NUM]; -+ /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ -+ u32 tx_iqc_8723b[2][3][2]; -+ /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ -+ u32 rx_iqc_8723b[2][2][2]; -+ /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ -+ u32 tx_iqc_8703b[3][2]; -+ /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ -+ u32 rx_iqc_8703b[2][2]; -+ /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ -+ u32 tx_iqc_8723d[2][3][2]; -+ /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ -+ u32 rx_iqc_8723d[2][2][2]; -+ /* JJ ADD 20161014 */ -+ /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ -+ u32 tx_iqc_8710b[2][3][2]; -+ /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ -+ u32 rx_iqc_8710b[2][2][2]; -+ -+ u8 iqk_step; -+ u8 kcount; -+ u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */ -+ boolean is_mp_mode; -+ -+ /*@ IQK time measurement */ -+ u64 iqk_start_time; -+ u64 iqk_progressing_time; -+ u64 iqk_total_progressing_time; -+ u64 lck_progressing_time; -+ -+ u32 lok_result; -+ -+ /* for APK */ -+ u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */ -+ u8 is_ap_kdone; -+ u8 is_apk_thermal_meter_ignore; -+ -+ /* DPK */ -+ boolean is_dpk_fail; -+ u8 is_dp_done; -+ u8 is_dp_path_aok; -+ u8 is_dp_path_bok; -+ -+ u32 tx_lok[2]; -+ u32 dpk_tx_agc; -+ s32 dpk_gain; -+ u32 dpk_thermal[4]; -+ s8 modify_tx_agc_value_ofdm; -+ s8 modify_tx_agc_value_cck; -+ -+ /*@Add by Yuchen for Kfree Phydm*/ -+ u8 reg_rf_kfree_enable; /*for registry*/ -+ u8 rf_kfree_enable; /*for efuse enable check*/ -+}; -+ -+void odm_txpowertracking_check(void *dm_void); -+ -+void odm_txpowertracking_init(void *dm_void); -+ -+void odm_txpowertracking_check_ap(void *dm_void); -+ -+void odm_txpowertracking_thermal_meter_init(void *dm_void); -+ -+void odm_txpowertracking_init(void *dm_void); -+ -+void odm_txpowertracking_check_mp(void *dm_void); -+ -+void odm_txpowertracking_check_ce(void *dm_void); -+ -+void odm_txpowertracking_direct_ce(void *dm_void); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ -+void odm_txpowertracking_callback_thermal_meter92c( -+ void *adapter); -+ -+void odm_txpowertracking_callback_rx_gain_thermal_meter92d( -+ void *adapter); -+ -+void odm_txpowertracking_callback_thermal_meter92d( -+ void *adapter); -+ -+void odm_txpowertracking_direct_call92c( -+ void *adapter); -+ -+void odm_txpowertracking_thermal_meter_check( -+ void *adapter); -+ -+#endif -+ -+#endif /*__HALRF_POWER_TRACKING_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_iot.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_iot.c -new file mode 100644 -index 000000000000..494fdec37a46 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_iot.c -@@ -0,0 +1,1004 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*============================================================ */ -+/* include files */ -+/*============================================================ */ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+/* ************************************************************ -+ * Global var -+ * ************************************************************ -+ */ -+ -+const u32 ofdm_swing_table[OFDM_TABLE_SIZE] = { -+ 0x7f8001fe, /* 0, +6.0dB */ -+ 0x788001e2, /* 1, +5.5dB */ -+ 0x71c001c7, /* 2, +5.0dB*/ -+ 0x6b8001ae, /* 3, +4.5dB*/ -+ 0x65400195, /* 4, +4.0dB*/ -+ 0x5fc0017f, /* 5, +3.5dB*/ -+ 0x5a400169, /* 6, +3.0dB*/ -+ 0x55400155, /* 7, +2.5dB*/ -+ 0x50800142, /* 8, +2.0dB*/ -+ 0x4c000130, /* 9, +1.5dB*/ -+ 0x47c0011f, /* 10, +1.0dB*/ -+ 0x43c0010f, /* 11, +0.5dB*/ -+ 0x40000100, /* 12, +0dB*/ -+ 0x3c8000f2, /* 13, -0.5dB*/ -+ 0x390000e4, /* 14, -1.0dB*/ -+ 0x35c000d7, /* 15, -1.5dB*/ -+ 0x32c000cb, /* 16, -2.0dB*/ -+ 0x300000c0, /* 17, -2.5dB*/ -+ 0x2d4000b5, /* 18, -3.0dB*/ -+ 0x2ac000ab, /* 19, -3.5dB*/ -+ 0x288000a2, /* 20, -4.0dB*/ -+ 0x26000098, /* 21, -4.5dB*/ -+ 0x24000090, /* 22, -5.0dB*/ -+ 0x22000088, /* 23, -5.5dB*/ -+ 0x20000080, /* 24, -6.0dB*/ -+ 0x1e400079, /* 25, -6.5dB*/ -+ 0x1c800072, /* 26, -7.0dB*/ -+ 0x1b00006c, /* 27. -7.5dB*/ -+ 0x19800066, /* 28, -8.0dB*/ -+ 0x18000060, /* 29, -8.5dB*/ -+ 0x16c0005b, /* 30, -9.0dB*/ -+ 0x15800056, /* 31, -9.5dB*/ -+ 0x14400051, /* 32, -10.0dB*/ -+ 0x1300004c, /* 33, -10.5dB*/ -+ 0x12000048, /* 34, -11.0dB*/ -+ 0x11000044, /* 35, -11.5dB*/ -+ 0x10000040, /* 36, -12.0dB*/ -+}; -+ -+const u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = { -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB*/ -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB*/ -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB*/ -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB*/ -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB*/ -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB*/ -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB*/ -+ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB <== default */ -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB*/ -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB*/ -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB*/ -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB*/ -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB*/ -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB*/ -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB*/ -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB*/ -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB*/ -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB*/ -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB*/ -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB*/ -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB*/ -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB*/ -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB*/ -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB*/ -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB*/ -+}; -+ -+const u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = { -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB*/ -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB*/ -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB*/ -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB*/ -+ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB <== default*/ -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB*/ -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB*/ -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB*/ -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB*/ -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB*/ -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB*/ -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB*/ -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB*/ -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB*/ -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB*/ -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB*/ -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB*/ -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB*/ -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB*/ -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB*/ -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB*/ -+}; -+ -+const u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = { -+ 0x0b40002d, /* 0, -15.0dB */ -+ 0x0c000030, /* 1, -14.5dB*/ -+ 0x0cc00033, /* 2, -14.0dB*/ -+ 0x0d800036, /* 3, -13.5dB*/ -+ 0x0e400039, /* 4, -13.0dB */ -+ 0x0f00003c, /* 5, -12.5dB*/ -+ 0x10000040, /* 6, -12.0dB*/ -+ 0x11000044, /* 7, -11.5dB*/ -+ 0x12000048, /* 8, -11.0dB*/ -+ 0x1300004c, /* 9, -10.5dB*/ -+ 0x14400051, /* 10, -10.0dB*/ -+ 0x15800056, /* 11, -9.5dB*/ -+ 0x16c0005b, /* 12, -9.0dB*/ -+ 0x18000060, /* 13, -8.5dB*/ -+ 0x19800066, /* 14, -8.0dB*/ -+ 0x1b00006c, /* 15, -7.5dB*/ -+ 0x1c800072, /* 16, -7.0dB*/ -+ 0x1e400079, /* 17, -6.5dB*/ -+ 0x20000080, /* 18, -6.0dB*/ -+ 0x22000088, /* 19, -5.5dB*/ -+ 0x24000090, /* 20, -5.0dB*/ -+ 0x26000098, /* 21, -4.5dB*/ -+ 0x288000a2, /* 22, -4.0dB*/ -+ 0x2ac000ab, /* 23, -3.5dB*/ -+ 0x2d4000b5, /* 24, -3.0dB*/ -+ 0x300000c0, /* 25, -2.5dB*/ -+ 0x32c000cb, /* 26, -2.0dB*/ -+ 0x35c000d7, /* 27, -1.5dB*/ -+ 0x390000e4, /* 28, -1.0dB*/ -+ 0x3c8000f2, /* 29, -0.5dB*/ -+ 0x40000100, /* 30, +0dB*/ -+ 0x43c0010f, /* 31, +0.5dB*/ -+ 0x47c0011f, /* 32, +1.0dB*/ -+ 0x4c000130, /* 33, +1.5dB*/ -+ 0x50800142, /* 34, +2.0dB*/ -+ 0x55400155, /* 35, +2.5dB*/ -+ 0x5a400169, /* 36, +3.0dB*/ -+ 0x5fc0017f, /* 37, +3.5dB*/ -+ 0x65400195, /* 38, +4.0dB*/ -+ 0x6b8001ae, /* 39, +4.5dB*/ -+ 0x71c001c7, /* 40, +5.0dB*/ -+ 0x788001e2, /* 41, +5.5dB*/ -+ 0x7f8001fe /* 42, +6.0dB*/ -+}; -+ -+const u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+ {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+ {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+ {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+ {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+ {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+ {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+ {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+ {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+ {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+ {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+ {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+ {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+ {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+ {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+ {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+ {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+ {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+ {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+ {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+ {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+const u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+ {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+ {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+ {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+ {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+ {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+ {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+ {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+ {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+ {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+ {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+ {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+ {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+ {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+ {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+ {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+ {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+ {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+ {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+ {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+ {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+const u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+ {0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+ {0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+ {0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+ {0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+ {0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+ {0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+ {0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+ {0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+ {0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+ {0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+ {0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+ {0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+ {0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+ {0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+ {0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+ {0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+ {0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+ {0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+ {0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+ {0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+const u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB*/ -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB*/ -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB*/ -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB*/ -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB*/ -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB*/ -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB*/ -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB*/ -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB*/ -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB*/ -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB*/ -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB*/ -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB*/ -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB*/ -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */ -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB*/ -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB*/ -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */ -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB*/ -+ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /*20, -6.0dB */ -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB*/ -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */ -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB*/ -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */ -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB*/ -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB*/ -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB*/ -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */ -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB*/ -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB*/ -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB*/ -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB*/ -+}; -+ -+const u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB*/ -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB*/ -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB*/ -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB*/ -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB*/ -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /*5, -13.5dB*/ -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB*/ -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB*/ -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB*/ -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB*/ -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB*/ -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /*11, -10.5dB*/ -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB*/ -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB*/ -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /*14, -9.0dB */ -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB*/ -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB*/ -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */ -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */ -+ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */ -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB*/ -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */ -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /*23, -4.5dB*/ -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */ -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */ -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */ -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /*27, -2.5dB*/ -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */ -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /*29, -1.5dB*/ -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */ -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */ -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */ -+}; -+ -+const u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, -+ 0x287, -+ 0x2AE, -+ 0x2D6, -+ 0x301, -+ 0x32F, -+ 0x35F, -+ 0x392, -+ 0x3C9, -+ 0x402, -+ 0x43F, -+ 0x47F, -+ 0x4C3, -+ 0x50C, -+ 0x558, -+ 0x5A9, -+ 0x5FF, -+ 0x65A, -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+/* JJ ADD 20161014 */ -+const u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, -+ 0x287, -+ 0x2AE, -+ 0x2D6, -+ 0x301, -+ 0x32F, -+ 0x35F, -+ 0x392, -+ 0x3C9, -+ 0x402, -+ 0x43F, -+ 0x47F, -+ 0x4C3, -+ 0x50C, -+ 0x558, -+ 0x5A9, -+ 0x5FF, -+ 0x65A, -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+/* Winnita ADD 20171116 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/ -+const u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, /*19*/ -+ 0x287, /*20*/ -+ 0x2AE, /*21*/ -+ 0x2D6, /*22*/ -+ 0x301, /*23*/ -+ 0x32F, /*24*/ -+ 0x35F, /*25*/ -+ 0x392, /*26*/ -+ 0x3C9, /*27*/ -+ 0x402, /*28*/ -+ 0x43F, /*29*/ -+ 0x47F, /*30*/ -+ 0x4C3, /*31*/ -+ 0x50C, /*32*/ -+ 0x558, /*33*/ -+ 0x5A9, /*34*/ -+ 0x5FF, /*35*/ -+ 0x65A, /*36*/ -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+/* Winnita ADD 201805 PathA 0xAB4[10:0]*/ -+const u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, /*19*/ -+ 0x287, /*20*/ -+ 0x2AE, /*21*/ -+ 0x2D6, /*22*/ -+ 0x301, /*23*/ -+ 0x32F, /*24*/ -+ 0x35F, /*25*/ -+ 0x392, /*26*/ -+ 0x3C9, /*27*/ -+ 0x402, /*28*/ -+ 0x43F, /*29*/ -+ 0x47F, /*30*/ -+ 0x4C3, /*31*/ -+ 0x50C, /*32*/ -+ 0x558, /*33*/ -+ 0x5A9, /*34*/ -+ 0x5FF, /*35*/ -+ 0x65A, /*36*/ -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+const u32 cck_swing_table_ch1_ch14_8710c[CCK_TABLE_SIZE_8710C] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, -+ 0x287, -+ 0x2AE, -+ 0x2D6, -+ 0x301, -+ 0x32F, -+ 0x35F, -+ 0x392, -+ 0x3C9, -+ 0x402, -+ 0x43F, -+ 0x47F, -+ 0x4C3, -+ 0x50C, -+ 0x558, -+ 0x5A9, -+ 0x5FF, -+ 0x65A, -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+const u32 cck_swing_table_03db_ch1_ch14_8710c[CCK_03DB_TABLE_SIZE_8710C] = { -+ 0x143, /*0 , -4dB*/ -+ 0x14C, /*1 , -3.75dB*/ -+ 0x156, /*2 , -3.5dB*/ -+ 0x160, -+ 0x16A, -+ 0x175, -+ 0x17F, -+ 0x18B, -+ 0x196, -+ 0x1A2, -+ 0x1AE, -+ 0x1BB, -+ 0x1C8, -+ 0x1D5, -+ 0x1E3, -+ 0x1F1, -+ 0x200, -+ 0x20F, -+ 0x21E, -+ 0x22F, -+ 0x23F, -+ 0x250, -+ 0x261, -+ 0x273, -+ 0x285, -+ 0x298, -+ 0x2AB, -+ 0x2BF, -+ 0x2D6, -+ 0x2E9, -+ 0x2FF, -+ 0x315, -+ 0x32C, -+ 0x344, -+ 0x35C, -+ 0x375, -+ 0x390, -+ 0x3AA, -+ 0x3C5, -+ 0x3E1, -+ 0x402, /*40 , +6dB default*/ -+ 0x41C, -+ 0x43B, -+ 0x45A, -+ 0x47C, -+ 0x49C, -+ 0x4BF, -+ 0x4E2, -+ 0x510, -+ 0x52C, -+ 0x553, -+ 0x57B, -+ 0x5A5, -+ 0x5CE, -+ 0x5F9, -+ 0x626, -+ 0x655, -+ 0x683, -+ 0x6B5, -+ 0x6E6, -+ 0x71E, -+ 0x74E, -+ 0x786, -+ 0x7BD, -+ 0x7F9, -+ 0x832, -+ 0x871, -+ 0x8AF, -+ 0x8F2, -+ 0x932, -+ 0x977, -+ 0x9BE, -+ 0xA0E, -+ 0xA52, -+ 0xAA1, -+ 0xAEE, -+ 0xB54, -+ 0xB95, -+ 0xBEB, -+ 0xC43, -+ 0xCA3 /*80 , +16dB*/ -+}; -+ -+const u32 ofdm_swing_table_03DB_8710c[OFDM_03DB_TABLE_SIZE_8710C] = { -+ 0xE4, /*0 , -7dB*/ -+ 0xEB, /*1 , -6.75dB*/ -+ 0xF2, /*2 , -6.5dB*/ -+ 0xF9, -+ 0x100, -+ 0x108, -+ 0x110, -+ 0x118, -+ 0x11F, -+ 0x128, -+ 0x131, -+ 0x13A, -+ 0x143, -+ 0x14C, -+ 0x156, -+ 0x160, -+ 0x16A, -+ 0x175, -+ 0x180, -+ 0x18B, -+ 0x196, -+ 0x1A2, -+ 0x1AE, -+ 0x1BB, -+ 0x1C8, -+ 0x1D5, -+ 0x1E3, -+ 0x1F1, -+ 0x200, -+ 0x20F, -+ 0x21F, -+ 0x22F, -+ 0x23F, -+ 0x250, -+ 0x261, -+ 0x273, -+ 0x286, -+ 0x298, -+ 0x2AB, -+ 0x2BF, -+ 0x2D6, /*40 , +3dB default*/ -+ 0x2E9, -+ 0x2FF, -+ 0x315, -+ 0x32C, -+ 0x344, -+ 0x35C, -+ 0x375, -+ 0x390, -+ 0x3AA, -+ 0x3C5, -+ 0x3E1, -+ 0x3FF, -+ 0x41C, -+ 0x43B, -+ 0x45A, -+ 0x47B, -+ 0x49C, -+ 0x4BF, -+ 0x4E2, -+ 0x507, -+ 0x52C, -+ 0x553, -+ 0x57B, -+ 0x5A4, -+ 0x5CE, -+ 0x5F9, -+ 0x626, -+ 0x654, -+ 0x683, -+ 0x6B4, -+ 0x6E6, -+ 0x71B, -+ 0x74E, -+ 0x785, -+ 0x7BD, -+ 0x7F7, -+ 0x832, -+ 0x870, -+ 0x8AF, -+ 0x8F0 /*80 , +13dB*/ -+}; -+ -+ -+ -+const u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = { -+ 0x081, /* 0, -12.0dB*/ -+ 0x088, /* 1, -11.5dB*/ -+ 0x090, /* 2, -11.0dB*/ -+ 0x099, /* 3, -10.5dB*/ -+ 0x0A2, /* 4, -10.0dB*/ -+ 0x0AC, /* 5, -9.5dB*/ -+ 0x0B6, /* 6, -9.0dB*/ -+ 0x0C0, /*7, -8.5dB*/ -+ 0x0CC, /* 8, -8.0dB*/ -+ 0x0D8, /* 9, -7.5dB*/ -+ 0x0E5, /* 10, -7.0dB*/ -+ 0x0F2, /* 11, -6.5dB*/ -+ 0x101, /* 12, -6.0dB*/ -+ 0x110, /* 13, -5.5dB*/ -+ 0x120, /* 14, -5.0dB*/ -+ 0x131, /* 15, -4.5dB*/ -+ 0x143, /* 16, -4.0dB*/ -+ 0x156, /* 17, -3.5dB*/ -+ 0x16A, /* 18, -3.0dB*/ -+ 0x180, /* 19, -2.5dB*/ -+ 0x197, /* 20, -2.0dB*/ -+ 0x1AF, /* 21, -1.5dB*/ -+ 0x1C8, /* 22, -1.0dB*/ -+ 0x1E3, /* 23, -0.5dB*/ -+ 0x200, /* 24, +0 dB*/ -+ 0x21E, /* 25, +0.5dB*/ -+ 0x23E, /* 26, +1.0dB*/ -+ 0x261, /* 27, +1.5dB*/ -+ 0x285,/* 28, +2.0dB*/ -+ 0x2AB, /* 29, +2.5dB*/ -+ 0x2D3, /*30, +3.0dB*/ -+ 0x2FE, /* 31, +3.5dB*/ -+ 0x32B, /* 32, +4.0dB*/ -+ 0x35C, /* 33, +4.5dB*/ -+ 0x38E, /* 34, +5.0dB*/ -+ 0x3C4, /* 35, +5.5dB*/ -+ 0x3FE /* 36, +6.0dB */ -+}; -+ -+void -+odm_txpowertracking_init( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_txpowertracking_thermal_meter_init(dm); -+} -+ -+u8 -+get_swing_index( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ u8 i = 0; -+ u32 bb_swing; -+ u32 swing_table_size; -+ u32 *swing_table; -+ u32 table_value; -+ -+#if (RTL8710C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8710C) { -+ bb_swing = odm_get_bb_reg(dm, R_0xcc8, 0x000007ff); -+ -+ for (i = 0; i < OFDM_03DB_TABLE_SIZE_8710C; i++) { -+ if (bb_swing == ofdm_swing_table_03DB_8710c[i]) -+ break; -+ } -+ } -+#elif (RTL8195B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195B) { -+ bb_swing = odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000); -+ swing_table = (u32*)tx_scaling_table_jaguar; -+ swing_table_size = TXSCALE_TABLE_SIZE; -+ -+ for (i = 0; i < swing_table_size; i++) { -+ table_value = swing_table[i]; -+ -+ table_value = table_value; -+ if (bb_swing == table_value) -+ break; -+ } -+ } -+#endif -+ return i; -+} -+ -+u8 -+get_cck_swing_index( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ u8 i = 0; -+ u32 bb_cck_swing; -+ -+#if (RTL8188E_SUPPORT == 1 || RTL8723B_SUPPORT == 1 || RTL8192E_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B || -+ dm->support_ic_type == ODM_RTL8192E) { -+ bb_cck_swing = odm_read_1byte(dm, 0xa22); -+ -+ for (i = 0; i < CCK_TABLE_SIZE; i++) { -+ if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0]) -+ break; -+ } -+ } -+#elif (RTL8703B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8703B) { -+ bb_cck_swing = odm_read_1byte(dm, 0xa22); -+ -+ for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { -+ if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0]) -+ break; -+ } -+ } -+#elif (RTL8710C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8710C) { -+ bb_cck_swing = odm_get_bb_reg(dm, R_0xab4, 0x7ff); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "bb_cck_swing = 0x%x\n", bb_cck_swing); -+ -+ for (i = 0; i < CCK_03DB_TABLE_SIZE_8710C; i++) { -+ if (bb_cck_swing == cck_swing_table_03db_ch1_ch14_8710c[i]) -+ break; -+ } -+ } -+#endif -+ -+ return i; -+} -+ -+s8 -+get_txagc_default_index( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ s8 tmp; -+ -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ tmp = (s8)(odm_get_bb_reg(dm, R_0x18a0, 0x7f) & 0xff); -+ if (tmp & BIT(6)) -+ tmp = tmp | 0x80; -+ return tmp; -+ } else -+ return 0; -+} -+ -+void -+odm_txpowertracking_thermal_meter_init( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 default_swing_index; -+ u8 p = 0; -+ struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ if (!(*dm->mp_mode)) -+ cali_info->txpowertrack_control = true; -+ else -+ cali_info->txpowertrack_control = false; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "dm txpowertrack_control = %d\n", cali_info->txpowertrack_control); -+ -+ /* dm->rf_calibrate_info.txpowertrack_control = true; */ -+ cali_info->thermal_value = rf->eeprom_thermal; -+ cali_info->thermal_value_iqk = rf->eeprom_thermal; -+ cali_info->thermal_value_lck = rf->eeprom_thermal; -+ -+ if (!cali_info->default_bb_swing_index_flag) { -+ if (dm->support_ic_type == ODM_RTL8195B) { -+ default_swing_index = get_swing_index(dm); -+ cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index; -+ cali_info->default_cck_index = 24; -+ } else if (dm->support_ic_type == ODM_RTL8721D) { -+ cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ -+ cali_info->default_cck_index = 28; /*CCK: -6dB*/ -+ } else if (dm->support_ic_type == ODM_RTL8710C) { -+ cali_info->default_ofdm_index = get_swing_index(dm); -+ cali_info->default_cck_index = get_cck_swing_index(dm); -+ } -+ cali_info->default_bb_swing_index_flag = true; -+ } -+ -+ cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index; -+ cali_info->CCK_index = cali_info->default_cck_index; -+ -+ for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) { -+ cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index; -+ cali_info->OFDM_index[p] = cali_info->default_ofdm_index; -+ cali_info->delta_power_index[p] = 0; -+ cali_info->delta_power_index_last[p] = 0; -+ cali_info->power_index_offset[p] = 0; -+ } -+ cali_info->modify_tx_agc_value_ofdm = 0; -+ cali_info->modify_tx_agc_value_cck = 0; -+ cali_info->tm_trigger = 0; -+} -+ -+void -+odm_txpowertracking_check( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_txpowertracking_check_iot(dm); -+} -+ -+void -+odm_txpowertracking_check_iot( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &dm->rf_table; -+ -+ if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) -+ return; -+ -+ if (!dm->rf_calibrate_info.tm_trigger) { -+ if (dm->support_ic_type == ODM_RTL8195B) -+ odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03); -+ else if (dm->support_ic_type == ODM_RTL8721D || -+ dm->support_ic_type == ODM_RTL8710C) -+ odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, -+ (BIT(12) | BIT(11)), 0x03); -+ -+ dm->rf_calibrate_info.tm_trigger = 1; -+ return; -+ } -+ odm_txpowertracking_callback_thermal_meter(dm); -+ dm->rf_calibrate_info.tm_trigger = 0; -+} -+ -+void -+odm_txpowertracking_check_mp( -+ void *dm_void -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ -+ if (odm_check_power_status(adapter) == false) { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("check_pow_status, return false\n")); -+ return; -+ } -+ -+ odm_txpowertracking_thermal_meter_check(adapter); -+#endif -+} -+ -+void -+odm_txpowertracking_check_ap( -+ void *dm_void -+) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+ return; -+ -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_iot.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_iot.h -new file mode 100644 -index 000000000000..431890bb8cea ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_iot.h -@@ -0,0 +1,372 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_POWERTRACKING_H__ -+#define __HALRF_POWERTRACKING_H__ -+ -+#define DPK_DELTA_MAPPING_NUM 13 -+#define index_mapping_HP_NUM 15 -+#define OFDM_TABLE_SIZE 43 -+#define CCK_TABLE_SIZE 33 -+#define CCK_TABLE_SIZE_88F 21 -+#define TXSCALE_TABLE_SIZE 37 -+#define CCK_TABLE_SIZE_8723D 41 -+/* JJ ADD 20161014 */ -+#define CCK_TABLE_SIZE_8710B 41 -+#define CCK_TABLE_SIZE_8192F 41 -+#define CCK_TABLE_SIZE_8721D 41 -+#define CCK_TABLE_SIZE_8710C 41 -+#define CCK_03DB_TABLE_SIZE_8710C 81 -+#define OFDM_03DB_TABLE_SIZE_8710C 81 -+ -+ -+#define TXPWR_TRACK_TABLE_SIZE 30 -+#define DELTA_SWINGIDX_SIZE 30 -+#define DELTA_SWINTSSI_SIZE 61 -+#define BAND_NUM 4 -+ -+#define AVG_THERMAL_NUM 8 -+#define IQK_MAC_REG_NUM 4 -+#define IQK_ADDA_REG_NUM 16 -+#define IQK_BB_REG_NUM_MAX 10 -+ -+#define IQK_BB_REG_NUM 9 -+ -+ -+ -+#define iqk_matrix_reg_num 8 -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) -+#else -+#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ -+#endif -+ -+extern const u32 ofdm_swing_table[OFDM_TABLE_SIZE]; -+extern const u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8]; -+extern const u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8]; -+ -+extern const u32 ofdm_swing_table_new[OFDM_TABLE_SIZE]; -+extern const u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8]; -+extern const u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8]; -+extern const u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; -+extern const u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; -+extern const u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; -+extern const u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; -+/* JJ ADD 20161014 */ -+extern const u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B]; -+extern const u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F]; -+extern const u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D]; -+extern const u32 cck_swing_table_ch1_ch14_8710c[CCK_TABLE_SIZE_8710C]; -+extern const u32 cck_swing_table_03db_ch1_ch14_8710c[CCK_03DB_TABLE_SIZE_8710C]; -+extern const u32 ofdm_swing_table_03DB_8710c[OFDM_03DB_TABLE_SIZE_8710C]; -+ -+extern const u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; -+ -+/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) -+#else -+static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; -+static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+#endif -+ -+void -+odm_txpowertracking_init( -+ void *dm_void -+); -+ -+#define dm_check_txpowertracking odm_txpowertracking_check -+ -+struct iqk_matrix_regs_setting { -+ boolean is_iqk_done; -+ s32 value[3][iqk_matrix_reg_num]; -+ boolean is_bw_iqk_result_saved[3]; -+}; -+ -+struct dm_rf_calibration_struct { -+ /* for tx power tracking */ -+ -+ u32 rega24; /* for TempCCK */ -+ s32 rege94; -+ s32 rege9c; -+ s32 regeb4; -+ s32 regebc; -+ -+ u8 tx_powercount; -+ boolean is_txpowertracking_init; -+ boolean is_txpowertracking; -+ u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */ -+ u8 tm_trigger; -+ u8 internal_pa_5g[2]; /* pathA / pathB */ -+ -+ u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ -+ u8 thermal_value; -+ u8 thermal_value_lck; -+ u8 thermal_value_iqk; -+ s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ -+ u8 thermal_value_dpk; -+ u8 thermal_value_avg[AVG_THERMAL_NUM]; -+ u8 thermal_value_avg_index; -+ u8 thermal_value_rx_gain; -+ u8 thermal_value_crystal; -+ u8 thermal_value_dpk_store; -+ u8 thermal_value_dpk_track; -+ boolean txpowertracking_in_progress; -+ -+ boolean is_reloadtxpowerindex; -+ u8 is_rf_pi_enable; -+ u32 txpowertracking_callback_cnt; /* cosa add for debug */ -+ -+ -+ /* ------------------------- Tx power Tracking ------------------------- */ -+ u8 is_cck_in_ch14; -+ u8 CCK_index; -+ u8 OFDM_index[MAX_RF_PATH]; -+ s8 power_index_offset[MAX_RF_PATH]; -+ s8 delta_power_index[MAX_RF_PATH]; -+ s8 delta_power_index_last[MAX_RF_PATH]; -+ boolean is_tx_power_changed; -+ s8 xtal_offset; -+ s8 xtal_offset_last; -+ -+#if (RTL8710B_SUPPORT == 1 || RTL8721D_SUPPORT == 1) -+ struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; -+#endif -+ u8 delta_lck; -+ s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */ -+ u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE]; -+#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE]; -+#endif -+ u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE]; -+#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE]; -+#endif -+ -+#if (RTL8195B_SUPPORT == 1) -+ u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+#endif -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+#endif -+#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+#endif -+ s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; -+ s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; -+ -+ u8 bb_swing_idx_ofdm[MAX_RF_PATH]; -+ u8 bb_swing_idx_ofdm_current; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) -+ u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; -+#else -+ u8 bb_swing_idx_ofdm_base; -+#endif -+ boolean default_bb_swing_index_flag; -+ boolean bb_swing_flag_ofdm; -+ u8 bb_swing_idx_cck; -+ u8 bb_swing_idx_cck_current; -+ u8 bb_swing_idx_cck_base; -+ u8 default_ofdm_index; -+ u8 default_cck_index; -+ s8 default_txagc_index; -+ boolean bb_swing_flag_cck; -+ -+ s8 absolute_ofdm_swing_idx[MAX_RF_PATH]; -+ s8 remnant_ofdm_swing_idx[MAX_RF_PATH]; -+ s8 absolute_cck_swing_idx[MAX_RF_PATH]; -+ s8 remnant_cck_swing_idx; -+ s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */ -+ boolean modify_tx_agc_flag_path_a; -+ boolean modify_tx_agc_flag_path_b; -+ boolean modify_tx_agc_flag_path_c; -+ boolean modify_tx_agc_flag_path_d; -+ boolean modify_tx_agc_flag_path_a_cck; -+ boolean modify_tx_agc_flag_path_b_cck; -+ -+ s8 kfree_offset[MAX_RF_PATH]; -+ -+ /* -------------------------------------------------------------------- */ -+ -+ /* for IQK */ -+ u32 regc04; -+ u32 reg874; -+ u32 regc08; -+ u32 regb68; -+ u32 regb6c; -+ u32 reg870; -+ u32 reg860; -+ u32 reg864; -+ -+ boolean is_iqk_initialized; -+ boolean is_lck_in_progress; -+ boolean is_antenna_detected; -+ boolean is_need_iqk; -+ boolean is_iqk_in_progress; -+ boolean is_iqk_pa_off; -+ u8 delta_iqk; -+ u32 ADDA_backup[IQK_ADDA_REG_NUM]; -+ u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; -+ u32 IQK_BB_backup_recover[9]; -+ u32 IQK_BB_backup[IQK_BB_REG_NUM]; -+#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ -+ u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ -+ u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ -+ u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ -+ u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ -+ u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ -+#endif -+ /* JJ ADD 20161014 */ -+ u32 tx_iqc_8710b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ -+ u32 rx_iqc_8710b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ -+ -+ u8 iqk_step; -+ u8 kcount; -+ u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */ -+ boolean is_mp_mode; -+ -+ -+ -+ /* IQK time measurement */ -+ u32 iqk_start_time; -+ u32 iqk_progressing_time; -+ u32 iqk_total_progressing_time; -+ u32 lck_progressing_time; -+ -+ u32 lok_result; -+ -+ /* for APK */ -+ u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */ -+ u8 is_ap_kdone; -+ u8 is_apk_thermal_meter_ignore; -+ -+ /* DPK */ -+ boolean is_dpk_fail; -+ u8 is_dp_done; -+ u8 is_dp_path_aok; -+ u8 is_dp_path_bok; -+ -+ u32 tx_lok[2]; -+ u32 dpk_tx_agc; -+ s32 dpk_gain; -+ u32 dpk_thermal[4]; -+ s8 modify_tx_agc_value_ofdm; -+ s8 modify_tx_agc_value_cck; -+ -+ /*Add by Yuchen for Kfree Phydm*/ -+ u8 reg_rf_kfree_enable; /*for registry*/ -+ u8 rf_kfree_enable; /*for efuse enable check*/ -+ -+}; -+ -+ -+void -+odm_txpowertracking_check( -+ void *dm_void -+); -+ -+void -+odm_txpowertracking_check_ap( -+ void *dm_void -+); -+ -+void -+odm_txpowertracking_thermal_meter_init( -+ void *dm_void -+); -+ -+ -+void -+odm_txpowertracking_check_mp( -+ void *dm_void -+); -+ -+ -+void -+odm_txpowertracking_check_iot( -+ void *dm_void -+); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ -+void -+odm_txpowertracking_callback_thermal_meter92c( -+ void *adapter -+); -+ -+void -+odm_txpowertracking_callback_rx_gain_thermal_meter92d( -+ void *adapter -+); -+ -+void -+odm_txpowertracking_callback_thermal_meter92d( -+ void *adapter -+); -+ -+void -+odm_txpowertracking_direct_call92c( -+ void *adapter -+); -+ -+void -+odm_txpowertracking_thermal_meter_check( -+ void *adapter -+); -+ -+#endif -+ -+#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_win.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_win.c -new file mode 100644 -index 000000000000..5cb9542574e7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_win.c -@@ -0,0 +1,924 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/*============================================================ */ -+/* include files */ -+/*============================================================ */ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+/* ************************************************************ -+ * Global var -+ * ************************************************************ */ -+ -+u32 ofdm_swing_table[OFDM_TABLE_SIZE] = { -+ 0x7f8001fe, /* 0, +6.0dB */ -+ 0x788001e2, /* 1, +5.5dB */ -+ 0x71c001c7, /* 2, +5.0dB */ -+ 0x6b8001ae, /* 3, +4.5dB */ -+ 0x65400195, /* 4, +4.0dB */ -+ 0x5fc0017f, /* 5, +3.5dB */ -+ 0x5a400169, /* 6, +3.0dB */ -+ 0x55400155, /* 7, +2.5dB */ -+ 0x50800142, /* 8, +2.0dB */ -+ 0x4c000130, /* 9, +1.5dB */ -+ 0x47c0011f, /* 10, +1.0dB */ -+ 0x43c0010f, /* 11, +0.5dB */ -+ 0x40000100, /* 12, +0dB */ -+ 0x3c8000f2, /* 13, -0.5dB */ -+ 0x390000e4, /* 14, -1.0dB */ -+ 0x35c000d7, /* 15, -1.5dB */ -+ 0x32c000cb, /* 16, -2.0dB */ -+ 0x300000c0, /* 17, -2.5dB */ -+ 0x2d4000b5, /* 18, -3.0dB */ -+ 0x2ac000ab, /* 19, -3.5dB */ -+ 0x288000a2, /* 20, -4.0dB */ -+ 0x26000098, /* 21, -4.5dB */ -+ 0x24000090, /* 22, -5.0dB */ -+ 0x22000088, /* 23, -5.5dB */ -+ 0x20000080, /* 24, -6.0dB */ -+ 0x1e400079, /* 25, -6.5dB */ -+ 0x1c800072, /* 26, -7.0dB */ -+ 0x1b00006c, /* 27. -7.5dB */ -+ 0x19800066, /* 28, -8.0dB */ -+ 0x18000060, /* 29, -8.5dB */ -+ 0x16c0005b, /* 30, -9.0dB */ -+ 0x15800056, /* 31, -9.5dB */ -+ 0x14400051, /* 32, -10.0dB */ -+ 0x1300004c, /* 33, -10.5dB */ -+ 0x12000048, /* 34, -11.0dB */ -+ 0x11000044, /* 35, -11.5dB */ -+ 0x10000040, /* 36, -12.0dB */ -+}; -+ -+u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = { -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */ -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */ -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */ -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */ -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */ -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */ -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */ -+ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB <== default */ -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */ -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */ -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */ -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */ -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */ -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */ -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */ -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */ -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */ -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */ -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */ -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */ -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */ -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */ -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */ -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */ -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */ -+}; -+ -+ -+u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = { -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */ -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */ -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */ -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */ -+ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB <== default */ -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */ -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */ -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */ -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */ -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */ -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */ -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */ -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */ -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */ -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */ -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */ -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */ -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */ -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */ -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */ -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */ -+}; -+ -+ -+u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = { -+ 0x0b40002d, /* 0, -15.0dB */ -+ 0x0c000030, /* 1, -14.5dB */ -+ 0x0cc00033, /* 2, -14.0dB */ -+ 0x0d800036, /* 3, -13.5dB */ -+ 0x0e400039, /* 4, -13.0dB */ -+ 0x0f00003c, /* 5, -12.5dB */ -+ 0x10000040, /* 6, -12.0dB */ -+ 0x11000044, /* 7, -11.5dB */ -+ 0x12000048, /* 8, -11.0dB */ -+ 0x1300004c, /* 9, -10.5dB */ -+ 0x14400051, /* 10, -10.0dB */ -+ 0x15800056, /* 11, -9.5dB */ -+ 0x16c0005b, /* 12, -9.0dB */ -+ 0x18000060, /* 13, -8.5dB */ -+ 0x19800066, /* 14, -8.0dB */ -+ 0x1b00006c, /* 15, -7.5dB */ -+ 0x1c800072, /* 16, -7.0dB */ -+ 0x1e400079, /* 17, -6.5dB */ -+ 0x20000080, /* 18, -6.0dB */ -+ 0x22000088, /* 19, -5.5dB */ -+ 0x24000090, /* 20, -5.0dB */ -+ 0x26000098, /* 21, -4.5dB */ -+ 0x288000a2, /* 22, -4.0dB */ -+ 0x2ac000ab, /* 23, -3.5dB */ -+ 0x2d4000b5, /* 24, -3.0dB */ -+ 0x300000c0, /* 25, -2.5dB */ -+ 0x32c000cb, /* 26, -2.0dB */ -+ 0x35c000d7, /* 27, -1.5dB */ -+ 0x390000e4, /* 28, -1.0dB */ -+ 0x3c8000f2, /* 29, -0.5dB */ -+ 0x40000100, /* 30, +0dB */ -+ 0x43c0010f, /* 31, +0.5dB */ -+ 0x47c0011f, /* 32, +1.0dB */ -+ 0x4c000130, /* 33, +1.5dB */ -+ 0x50800142, /* 34, +2.0dB */ -+ 0x55400155, /* 35, +2.5dB */ -+ 0x5a400169, /* 36, +3.0dB */ -+ 0x5fc0017f, /* 37, +3.5dB */ -+ 0x65400195, /* 38, +4.0dB */ -+ 0x6b8001ae, /* 39, +4.5dB */ -+ 0x71c001c7, /* 40, +5.0dB */ -+ 0x788001e2, /* 41, +5.5dB */ -+ 0x7f8001fe /* 42, +6.0dB */ -+}; -+ -+ -+u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+ {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+ {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+ {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+ {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+ {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+ {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+ {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+ {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+ {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+ {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+ {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+ {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+ {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+ {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+ {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+ {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+ {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+ {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+ {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+ {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+ -+u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+ {0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+ {0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+ {0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+ {0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+ {0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+ {0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+ {0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+ {0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+ {0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+ {0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+ {0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+ {0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+ {0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+ {0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+ {0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+ {0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+ {0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+ {0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+ {0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+ {0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+ -+u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = { -+ {0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/ -+ {0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/ -+ {0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/ -+ {0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/ -+ {0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/ -+ {0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/ -+ {0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/ -+ {0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/ -+ {0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/ -+ {0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/ -+ {0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/ -+ {0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/ -+ {0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/ -+ {0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/ -+ {0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/ -+ {0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/ -+ {0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/ -+ {0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/ -+ {0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/ -+ {0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/ -+ {0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/ -+}; -+ -+ -+u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB */ -+ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB */ -+ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB */ -+ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB */ -+ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB */ -+ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB */ -+ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB */ -+ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB */ -+ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB */ -+ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB */ -+ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB */ -+ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB */ -+ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB */ -+ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB */ -+ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */ -+ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB */ -+ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ -+ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB */ -+ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */ -+ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB */ -+ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 20, -6.0dB */ -+ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB */ -+ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */ -+ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB */ -+ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */ -+ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB */ -+ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB */ -+ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB */ -+ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */ -+ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB */ -+ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB */ -+ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB */ -+ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB */ -+}; -+ -+ -+u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = { -+ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB */ -+ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB */ -+ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB */ -+ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB */ -+ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB */ -+ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 5, -13.5dB */ -+ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB */ -+ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB */ -+ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB */ -+ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB */ -+ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB */ -+ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 11, -10.5dB */ -+ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB */ -+ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB */ -+ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 14, -9.0dB */ -+ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB */ -+ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ -+ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB */ -+ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */ -+ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */ -+ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */ -+ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB */ -+ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */ -+ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 23, -4.5dB */ -+ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */ -+ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */ -+ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */ -+ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 27, -2.5dB */ -+ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */ -+ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 29, -1.5dB */ -+ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */ -+ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */ -+ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */ -+}; -+u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = { -+ 0x0CD, -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, -+ 0x287, -+ 0x2AE, -+ 0x2D6, -+ 0x301, -+ 0x32F, -+ 0x35F, -+ 0x392, -+ 0x3C9, -+ 0x402, -+ 0x43F, -+ 0x47F, -+ 0x4C3, -+ 0x50C, -+ 0x558, -+ 0x5A9, -+ 0x5FF, -+ 0x65A, -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+/* JJ ADD 20161014 */ -+u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, /*19*/ -+ 0x287, /*20*/ -+ 0x2AE, /*21*/ -+ 0x2D6, /*22*/ -+ 0x301, /*23*/ -+ 0x32F, /*24*/ -+ 0x35F, /*25*/ -+ 0x392, /*26*/ -+ 0x3C9, /*27*/ -+ 0x402, /*28*/ -+ 0x43F, /*29*/ -+ 0x47F, /*30*/ -+ 0x4C3, /*31*/ -+ 0x50C, /*32*/ -+ 0x558, /*33*/ -+ 0x5A9, /*34*/ -+ 0x5FF, /*35*/ -+ 0x65A, /*36*/ -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+/* Winnita ADD 20170828 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/ -+u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = { -+ 0x0CD, /*0 , -20dB*/ -+ 0x0D9, -+ 0x0E6, -+ 0x0F3, -+ 0x102, -+ 0x111, -+ 0x121, -+ 0x132, -+ 0x144, -+ 0x158, -+ 0x16C, -+ 0x182, -+ 0x198, -+ 0x1B1, -+ 0x1CA, -+ 0x1E5, -+ 0x202, -+ 0x221, -+ 0x241, -+ 0x263, /*19*/ -+ 0x287, /*20*/ -+ 0x2AE, /*21*/ -+ 0x2D6, /*22*/ -+ 0x301, /*23*/ -+ 0x32F, /*24*/ -+ 0x35F, /*25*/ -+ 0x392, /*26*/ -+ 0x3C9, /*27*/ -+ 0x402, /*28*/ -+ 0x43F, /*29*/ -+ 0x47F, /*30*/ -+ 0x4C3, /*31*/ -+ 0x50C, /*32*/ -+ 0x558, /*33*/ -+ 0x5A9, /*34*/ -+ 0x5FF, /*35*/ -+ 0x65A, /*36*/ -+ 0x6BA, -+ 0x720, -+ 0x78C, -+ 0x7FF, -+}; -+ -+u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = { -+ 0x081, /* 0, -12.0dB */ -+ 0x088, /* 1, -11.5dB */ -+ 0x090, /* 2, -11.0dB */ -+ 0x099, /* 3, -10.5dB */ -+ 0x0A2, /* 4, -10.0dB */ -+ 0x0AC, /* 5, -9.5dB */ -+ 0x0B6, /* 6, -9.0dB */ -+ 0x0C0, /* 7, -8.5dB */ -+ 0x0CC, /* 8, -8.0dB */ -+ 0x0D8, /* 9, -7.5dB */ -+ 0x0E5, /* 10, -7.0dB */ -+ 0x0F2, /* 11, -6.5dB */ -+ 0x101, /* 12, -6.0dB */ -+ 0x110, /* 13, -5.5dB */ -+ 0x120, /* 14, -5.0dB */ -+ 0x131, /* 15, -4.5dB */ -+ 0x143, /* 16, -4.0dB */ -+ 0x156, /* 17, -3.5dB */ -+ 0x16A, /* 18, -3.0dB */ -+ 0x180, /* 19, -2.5dB */ -+ 0x197, /* 20, -2.0dB */ -+ 0x1AF, /* 21, -1.5dB */ -+ 0x1C8, /* 22, -1.0dB */ -+ 0x1E3, /* 23, -0.5dB */ -+ 0x200, /* 24, +0 dB */ -+ 0x21E, /* 25, +0.5dB */ -+ 0x23E, /* 26, +1.0dB */ -+ 0x261, /* 27, +1.5dB */ -+ 0x285, /* 28, +2.0dB */ -+ 0x2AB, /* 29, +2.5dB */ -+ 0x2D3, /* 30, +3.0dB */ -+ 0x2FE, /* 31, +3.5dB */ -+ 0x32B, /* 32, +4.0dB */ -+ 0x35C, /* 33, +4.5dB */ -+ 0x38E, /* 34, +5.0dB */ -+ 0x3C4, /* 35, +5.5dB */ -+ 0x3FE /* 36, +6.0dB */ -+}; -+ -+void -+odm_txpowertracking_init( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ if (!(dm->support_ic_type & (ODM_RTL8814A | ODM_IC_11N_SERIES | ODM_RTL8822B))) -+ return; -+#endif -+ -+ odm_txpowertracking_thermal_meter_init(dm); -+} -+ -+u8 -+get_swing_index( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ u8 i = 0; -+ u32 bb_swing, table_value; -+ -+ if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B || -+ dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F || -+ dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || -+ dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8710B) { -+ bb_swing = odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000); -+ -+ for (i = 0; i < OFDM_TABLE_SIZE; i++) { -+ table_value = ofdm_swing_table_new[i]; -+ -+ if (table_value >= 0x100000) -+ table_value >>= 22; -+ if (bb_swing == table_value) -+ break; -+ } -+ } else { -+ bb_swing = PHY_GetTxBBSwing_8812A(adapter, hal_data->CurrentBandType, RF_PATH_A); -+ -+ for (i = 0; i < TXSCALE_TABLE_SIZE; i++) { -+ table_value = tx_scaling_table_jaguar[i]; -+ -+ if (bb_swing == table_value) -+ break; -+ } -+ } -+ -+ return i; -+} -+ -+u8 -+get_cck_swing_index( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ u8 i = 0; -+ u32 bb_cck_swing; -+ -+ if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B || -+ dm->support_ic_type == ODM_RTL8192E) { -+ bb_cck_swing = odm_read_1byte(dm, 0xa22); -+ -+ for (i = 0; i < CCK_TABLE_SIZE; i++) { -+ if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0]) -+ break; -+ } -+ } else if (dm->support_ic_type == ODM_RTL8703B) { -+ bb_cck_swing = odm_read_1byte(dm, 0xa22); -+ -+ for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { -+ if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0]) -+ break; -+ } -+ } -+ -+ return i; -+} -+ -+s8 -+get_txagc_default_index( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ s8 tmp; -+ -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ tmp = (s8)(odm_get_bb_reg(dm, R_0x18a0, 0x7f) & 0xff); -+ if (tmp & BIT(6)) -+ tmp = tmp | 0x80; -+ return tmp; -+ } else -+ return 0; -+} -+ -+void -+odm_txpowertracking_thermal_meter_init( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 default_swing_index = get_swing_index(dm); -+ u8 default_cck_swing_index = get_cck_swing_index(dm); -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct _hal_rf_ *rf = &dm->rf_table; -+ struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ u8 p = 0; -+ -+ if (*(dm->mp_mode) == false) -+ cali_info->txpowertrack_control = true; -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#ifdef CONFIG_RTL8188E -+ { -+ cali_info->is_txpowertracking = true; -+ cali_info->tx_powercount = 0; -+ cali_info->is_txpowertracking_init = false; -+ -+ if (*(dm->mp_mode) == false) -+ cali_info->txpowertrack_control = true; -+ -+ MSG_8192C("dm txpowertrack_control = %d\n", cali_info->txpowertrack_control); -+ } -+#else -+ { -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_priv *pdmpriv = &hal_data->dmpriv; -+ -+ pdmpriv->is_txpowertracking = true; -+ pdmpriv->tx_powercount = 0; -+ pdmpriv->is_txpowertracking_init = false; -+ -+ if (*(dm->mp_mode) == false) -+ pdmpriv->txpowertrack_control = true; -+ -+ MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control); -+ -+ } -+#endif -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#ifdef RTL8188E_SUPPORT -+ { -+ cali_info->is_txpowertracking = true; -+ cali_info->tx_powercount = 0; -+ cali_info->is_txpowertracking_init = false; -+ cali_info->txpowertrack_control = true; -+ } -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if (MP_DRIVER == 1) -+ cali_info->txpowertrack_control = false; -+#else -+ cali_info->txpowertrack_control = true; -+#endif -+#else -+ cali_info->txpowertrack_control = true; -+#endif -+ -+ cali_info->thermal_value = hal_data->eeprom_thermal_meter; -+ cali_info->thermal_value_iqk = hal_data->eeprom_thermal_meter; -+ cali_info->thermal_value_lck = hal_data->eeprom_thermal_meter; -+ -+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A]; -+ cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B]; -+ cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A]; -+ cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A]; -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A]; -+ cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B]; -+ cali_info->thermal_value_path[RF_PATH_C] = tssi->thermal[RF_PATH_C]; -+ cali_info->thermal_value_path[RF_PATH_D] = tssi->thermal[RF_PATH_D]; -+ cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A]; -+ cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A]; -+ } -+#endif -+ -+ if (cali_info->default_bb_swing_index_flag != true) { -+ /*The index of "0 dB" in SwingTable.*/ -+ if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B || -+ dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8703B) { -+ cali_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index; -+ cali_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index; -+ } else if (dm->support_ic_type == ODM_RTL8188F) { /*add by Mingzhi.Guo 2015-03-23*/ -+ cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ -+ cali_info->default_cck_index = 20; /*CCK:-6dB*/ -+ } else if (dm->support_ic_type == ODM_RTL8723D) { /*add by zhaohe 2015-10-27*/ -+ cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ -+ cali_info->default_cck_index = 28; /*CCK: -6dB*/ -+ /* JJ ADD 20161014 */ -+ } else if (dm->support_ic_type == ODM_RTL8710B) { -+ cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ -+ cali_info->default_cck_index = 28; /*CCK: -6dB*/ -+ /*Winnita add 20170828*/ -+ } else if (dm->support_ic_type == ODM_RTL8192F) { -+ cali_info->default_ofdm_index = 30; /*OFDM: 0dB*/ -+ cali_info->default_cck_index = 28; /*CCK: -6dB*/ -+ } else { -+ cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index; -+ cali_info->default_cck_index = 24; -+ cali_info->default_txagc_index = get_txagc_default_index(dm); -+ } -+ cali_info->default_bb_swing_index_flag = true; -+ } -+ -+ cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index; -+ cali_info->CCK_index = cali_info->default_cck_index; -+ -+ for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) { -+ cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index; -+ cali_info->OFDM_index[p] = cali_info->default_ofdm_index; -+ cali_info->delta_power_index[p] = 0; -+ cali_info->delta_power_index_last[p] = 0; -+ cali_info->power_index_offset[p] = 0; -+ cali_info->kfree_offset[p] = 0; -+ } -+ cali_info->modify_tx_agc_value_ofdm = 0; -+ cali_info->modify_tx_agc_value_cck = 0; -+ cali_info->tm_trigger = 0; -+} -+ -+ -+void -+odm_txpowertracking_check( -+ void *dm_void -+) -+{ -+ -+#if 0 -+ /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ -+ /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ -+ /* HW dynamic mechanism. */ -+#endif -+ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ switch (dm->support_platform) { -+ case ODM_WIN: -+ odm_txpowertracking_check_mp(dm); -+ break; -+ -+ case ODM_CE: -+ odm_txpowertracking_check_ce(dm); -+ break; -+ -+ case ODM_AP: -+ odm_txpowertracking_check_ap(dm); -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+void -+odm_txpowertracking_check_ce( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ void *adapter = dm->adapter; -+#if ((RTL8188F_SUPPORT == 1)) -+ rtl8192c_odm_check_txpowertracking(adapter); -+#endif -+ -+#if (RTL8188E_SUPPORT == 1) -+ -+ if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) -+ return; -+ -+ if (!cali_info->tm_trigger) { -+ odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60); -+ /*DBG_8192C("Trigger 92C Thermal Meter!!\n");*/ -+ -+ cali_info->tm_trigger = 1; -+ return; -+ -+ } else { -+ /*DBG_8192C("Schedule TxPowerTracking direct call!!\n");*/ -+ odm_txpowertracking_callback_thermal_meter_8188e(adapter); -+ cali_info->tm_trigger = 0; -+ } -+#endif -+#endif -+} -+ -+void -+odm_txpowertracking_check_mp( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter = dm->adapter; -+ -+ if (*dm->is_fcs_mode_enable) -+ return; -+ -+ if (odm_check_power_status(dm) == false) { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("check_pow_status return false\n")); -+ return; -+ } -+ -+ if (IS_HARDWARE_TYPE_8821B(adapter)) /* TODO: Don't Do PowerTracking*/ -+ return; -+ -+ odm_txpowertracking_thermal_meter_check(adapter); -+ -+ -+#endif -+ -+} -+ -+ -+void -+odm_txpowertracking_check_ap( -+ void *dm_void -+) -+{ -+ return; -+ -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+void -+odm_txpowertracking_direct_call( -+ void *adapter -+) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) { -+#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+ odm_txpowertracking_new_callback_thermal_meter(dm); -+#endif -+ } else -+ odm_txpowertracking_callback_thermal_meter(adapter); -+} -+ -+void -+odm_txpowertracking_thermal_meter_check( -+ void *adapter -+) -+{ -+ static u8 tm_trigger = 0; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &(pHalData->DM_OutSrc); -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data; -+ -+ if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, -+ ("===>odm_txpowertracking_thermal_meter_check(),mgnt_info->is_txpowertracking is false, return!!\n")); -+ return; -+ } -+ -+ if (!tm_trigger) { -+ if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) || IS_HARDWARE_TYPE_8192F(adapter) -+ ||IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8703B(adapter) -+ || IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8821C(adapter) || IS_HARDWARE_TYPE_8710B(adapter) -+ )/* JJ ADD 20161014 */ -+ PHY_SetRFReg(adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03); -+ else if (IS_HARDWARE_TYPE_8822C(adapter)) { -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00); -+ odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01); -+ -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00); -+ odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01); -+ } else if (IS_HARDWARE_TYPE_8814B(adapter)) { -+ odm_set_rf_reg(dm, RF_PATH_A, 0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1); -+ odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1); -+ } else -+ PHY_SetRFReg(adapter, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60); -+ -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ ODM_delay_us(300); -+ odm_txpowertracking_direct_call(adapter); -+ tssi->thermal_trigger = 1; -+ } -+ -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Trigger Thermal Meter!!\n")); -+ -+ tm_trigger = 1; -+ return; -+ } else { -+ RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Schedule TxPowerTracking direct call!!\n")); -+ odm_txpowertracking_direct_call(adapter); -+ -+ if (dm->support_ic_type & ODM_RTL8814B) -+ tssi->thermal_trigger = 0; -+ -+ tm_trigger = 0; -+ } -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_win.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_win.h -new file mode 100644 -index 000000000000..f84d440da560 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_powertracking_win.h -@@ -0,0 +1,306 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_POWERTRACKING_H__ -+#define __HALRF_POWERTRACKING_H__ -+ -+#define DPK_DELTA_MAPPING_NUM 13 -+#define index_mapping_HP_NUM 15 -+#define TXSCALE_TABLE_SIZE 37 -+#define OFDM_TABLE_SIZE 43 -+#define CCK_TABLE_SIZE 33 -+#define CCK_TABLE_SIZE_8723D 41 -+#define TXPWR_TRACK_TABLE_SIZE 30 -+#define DELTA_SWINGIDX_SIZE 30 -+#define DELTA_SWINTSSI_SIZE 61 -+#define BAND_NUM 3 -+#define MAX_RF_PATH 4 -+#define CCK_TABLE_SIZE_88F 21 -+/* JJ ADD 20161014 */ -+#define CCK_TABLE_SIZE_8710B 41 -+#define CCK_TABLE_SIZE_8192F 41 -+ -+ -+#define dm_check_txpowertracking odm_txpowertracking_check -+ -+#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ -+#define AVG_THERMAL_NUM 8 -+#define iqk_matrix_reg_num 8 -+#define IQK_MAC_REG_NUM 4 -+#define IQK_ADDA_REG_NUM 16 -+ -+#define IQK_BB_REG_NUM 9 -+ -+ -+extern u32 ofdm_swing_table[OFDM_TABLE_SIZE]; -+extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8]; -+extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8]; -+ -+extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE]; -+extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8]; -+extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8]; -+extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; -+extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; -+extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; -+extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; -+/* JJ ADD 20161014 */ -+extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B]; -+extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F]; -+ -+extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; -+ -+/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */ -+static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; -+static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+ -+void -+odm_txpowertracking_check( -+ void *dm_void -+); -+ -+void -+odm_txpowertracking_check_ap( -+ void *dm_void -+); -+ -+void -+odm_txpowertracking_thermal_meter_init( -+ void *dm_void -+); -+ -+void -+odm_txpowertracking_init( -+ void *dm_void -+); -+ -+void -+odm_txpowertracking_check_mp( -+ void *dm_void -+); -+ -+ -+void -+odm_txpowertracking_check_ce( -+ void *dm_void -+); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ -+ -+void -+odm_txpowertracking_thermal_meter_check( -+ void *adapter -+); -+ -+#endif -+ -+struct iqk_matrix_regs_setting { -+ boolean is_iqk_done; -+ s32 value[3][iqk_matrix_reg_num]; -+ boolean is_bw_iqk_result_saved[3]; -+}; -+ -+struct dm_rf_calibration_struct { -+ /* for tx power tracking */ -+ -+ u32 rega24; /* for TempCCK */ -+ s32 rege94; -+ s32 rege9c; -+ s32 regeb4; -+ s32 regebc; -+ /* u8 is_txpowertracking; */ -+ u8 tx_powercount; -+ boolean is_txpowertracking_init; -+ boolean is_txpowertracking; -+ u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */ -+ u8 tm_trigger; -+ u8 internal_pa_5g[2]; /* pathA / pathB */ -+ -+ u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ -+ u8 thermal_value; -+ u8 thermal_value_path[MAX_RF_PATH]; -+ u8 thermal_value_lck; -+ u8 thermal_value_iqk; -+ u8 thermal_value_dpk; -+ s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ -+ u8 thermal_value_avg[AVG_THERMAL_NUM]; -+ u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM]; -+ u8 thermal_value_avg_index; -+ u8 thermal_value_avg_index_path[MAX_RF_PATH]; -+ u8 thermal_value_rx_gain; -+ -+ -+ boolean is_reloadtxpowerindex; -+ u8 is_rf_pi_enable; -+ u32 txpowertracking_callback_cnt; /* cosa add for debug */ -+ -+ -+ /* ------------------------- Tx power Tracking ------------------------- */ -+ u8 is_cck_in_ch14; -+ u8 CCK_index; -+ u8 OFDM_index[MAX_RF_PATH]; -+ s8 power_index_offset[MAX_RF_PATH]; -+ s8 delta_power_index[MAX_RF_PATH]; -+ s8 delta_power_index_last[MAX_RF_PATH]; -+ boolean is_tx_power_changed; -+ s8 xtal_offset; -+ s8 xtal_offset_last; -+ -+ struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; -+ u8 delta_lck; -+ s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */ -+ u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; -+ s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; -+ s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; -+ u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; -+ -+ u8 bb_swing_idx_ofdm[MAX_RF_PATH]; -+ u8 bb_swing_idx_ofdm_current; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; -+#else -+ u8 bb_swing_idx_ofdm_base; -+#endif -+ boolean default_bb_swing_index_flag; -+ boolean bb_swing_flag_ofdm; -+ u8 bb_swing_idx_cck; -+ u8 bb_swing_idx_cck_current; -+ u8 bb_swing_idx_cck_base; -+ u8 default_ofdm_index; -+ u8 default_cck_index; -+ s8 default_txagc_index; -+ boolean bb_swing_flag_cck; -+ -+ s8 absolute_ofdm_swing_idx[MAX_RF_PATH]; -+ s8 remnant_ofdm_swing_idx[MAX_RF_PATH]; -+ s8 absolute_cck_swing_idx[MAX_RF_PATH]; -+ s8 remnant_cck_swing_idx; -+ s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */ -+ boolean modify_tx_agc_flag_path_a; -+ boolean modify_tx_agc_flag_path_b; -+ boolean modify_tx_agc_flag_path_c; -+ boolean modify_tx_agc_flag_path_d; -+ boolean modify_tx_agc_flag_path_a_cck; -+ boolean modify_tx_agc_flag_path_b_cck; -+ -+ s8 kfree_offset[MAX_RF_PATH]; -+ -+ /* -------------------------------------------------------------------- */ -+ -+ /* for IQK */ -+ u32 regc04; -+ u32 reg874; -+ u32 regc08; -+ u32 regb68; -+ u32 regb6c; -+ u32 reg870; -+ u32 reg860; -+ u32 reg864; -+ -+ boolean is_iqk_initialized; -+ boolean is_lck_in_progress; -+ boolean is_antenna_detected; -+ boolean is_need_iqk; -+ boolean is_iqk_in_progress; -+ boolean is_iqk_pa_off; -+ u8 delta_iqk; -+ u32 ADDA_backup[IQK_ADDA_REG_NUM]; -+ u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; -+ u32 IQK_BB_backup_recover[9]; -+ u32 IQK_BB_backup[IQK_BB_REG_NUM]; -+ u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ -+ u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ -+ u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ -+ u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ -+ u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ -+ u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ -+ /* JJ ADD 20161014 */ -+ u32 tx_iqc_8710b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ -+ u32 rx_iqc_8710b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ -+ -+ u64 iqk_start_time; -+ u64 iqk_total_progressing_time; -+ u64 iqk_progressing_time; -+ u64 lck_progressing_time; -+ u32 lok_result; -+ u8 iqk_step; -+ u8 kcount; -+ u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */ -+ boolean is_mp_mode; -+ -+ /* for APK */ -+ u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */ -+ u8 is_ap_kdone; -+ u8 is_apk_thermal_meter_ignore; -+ -+ /* DPK */ -+ boolean is_dpk_fail; -+ u8 is_dp_done; -+ u8 is_dp_path_aok; -+ u8 is_dp_path_bok; -+ -+ u32 tx_lok[2]; -+ u32 dpk_tx_agc; -+ s32 dpk_gain; -+ u32 dpk_thermal[4]; -+ -+ s8 modify_tx_agc_value_ofdm; -+ s8 modify_tx_agc_value_cck; -+ -+ /*Add by Yuchen for Kfree Phydm*/ -+ u8 reg_rf_kfree_enable; /*for registry*/ -+ u8 rf_kfree_enable; /*for efuse enable check*/ -+}; -+ -+ -+ -+ -+#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_psd.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_psd.c -new file mode 100644 -index 000000000000..bab7d09acd0b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_psd.c -@@ -0,0 +1,531 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/*@=========================================================== -+ * include files -+ *============================================================ -+ */ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+u64 _sqrt(u64 x) -+{ -+ u64 i = 0; -+ u64 j = (x >> 1) + 1; -+ -+ while (i <= j) { -+ u64 mid = (i + j) >> 1; -+ -+ u64 sq = mid * mid; -+ -+ if (sq == x) -+ return mid; -+ else if (sq < x) -+ i = mid + 1; -+ else -+ j = mid - 1; -+ } -+ -+ return j; -+} -+ -+u32 halrf_get_psd_data( -+ struct dm_struct *dm, -+ u32 point) -+{ -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ struct _halrf_psd_data *psd = &(rf->halrf_psd_data); -+ u32 psd_val = 0, psd_reg, psd_report, psd_point, psd_start, i, delay_time = 0; -+ -+#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE) -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) { -+ if (psd->average == 0) -+ delay_time = 100; -+ else -+ delay_time = 0; -+ } -+#endif -+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ if (dm->support_interface == ODM_ITRF_PCIE) { -+ if (psd->average == 0) -+ delay_time = 1000; -+ else -+ delay_time = 100; -+ } -+#endif -+ -+ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) { -+ psd_reg = R_0x910; -+ psd_report = R_0xf44; -+ } else { -+ psd_reg = R_0x808; -+ psd_report = R_0x8b4; -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8710B) { -+ psd_point = 0xeffffc00; -+ psd_start = 0x10000000; -+ } else { -+ psd_point = 0xffbffc00; -+ psd_start = 0x00400000; -+ } -+ -+ psd_val = odm_get_bb_reg(dm, psd_reg, MASKDWORD); -+ -+ psd_val &= psd_point; -+ psd_val |= point; -+ -+ odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val); -+ -+ psd_val |= psd_start; -+ -+ odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val); -+ -+ for (i = 0; i < delay_time; i++) -+ ODM_delay_us(1); -+ -+ psd_val = odm_get_bb_reg(dm, psd_report, MASKDWORD); -+ -+ if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8710B)) { -+ psd_val &= MASKL3BYTES; -+ psd_val = psd_val / 32; -+ } else { -+ psd_val &= MASKLWORD; -+ } -+ -+ return psd_val; -+} -+ -+void halrf_psd( -+ struct dm_struct *dm, -+ u32 point, -+ u32 start_point, -+ u32 stop_point, -+ u32 average) -+{ -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ struct _halrf_psd_data *psd = &(rf->halrf_psd_data); -+ -+ u32 i = 0, j = 0, k = 0; -+ u32 psd_reg, avg_org, point_temp, average_tmp, mode; -+ u64 data_tatal = 0, data_temp[64] = {0}; -+ -+ psd->buf_size = 256; -+ -+ mode = average >> 16; -+ -+ if (mode == 2) -+ average_tmp = 1; -+ else -+ average_tmp = average & 0xffff; -+ -+ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) -+ psd_reg = R_0x910; -+ else -+ psd_reg = R_0x808; -+ -+#if 0 -+ dbg_print("[PSD]point=%d, start_point=%d, stop_point=%d, average=%d, average_tmp=%d, buf_size=%d\n", -+ point, start_point, stop_point, average, average_tmp, psd->buf_size); -+#endif -+ -+ for (i = 0; i < psd->buf_size; i++) -+ psd->psd_data[i] = 0; -+ -+ if (dm->support_ic_type & ODM_RTL8710B) -+ avg_org = odm_get_bb_reg(dm, psd_reg, 0x30000); -+ else -+ avg_org = odm_get_bb_reg(dm, psd_reg, 0x3000); -+ -+ if (mode == 1) { -+ if (dm->support_ic_type & ODM_RTL8710B) -+ odm_set_bb_reg(dm, psd_reg, 0x30000, 0x1); -+ else -+ odm_set_bb_reg(dm, psd_reg, 0x3000, 0x1); -+ } -+ -+#if 0 -+ if (avg_temp == 0) -+ avg = 1; -+ else if (avg_temp == 1) -+ avg = 8; -+ else if (avg_temp == 2) -+ avg = 16; -+ else if (avg_temp == 3) -+ avg = 32; -+#endif -+ -+ i = start_point; -+ while (i < stop_point) { -+ data_tatal = 0; -+ -+ if (i >= point) -+ point_temp = i - point; -+ else -+ point_temp = i; -+ -+ for (k = 0; k < average_tmp; k++) { -+ data_temp[k] = halrf_get_psd_data(dm, point_temp); -+ data_tatal = data_tatal + (data_temp[k] * data_temp[k]); -+ -+#if 0 -+ if ((k % 20) == 0) -+ dbg_print("\n "); -+ -+ dbg_print("0x%x ", data_temp[k]); -+#endif -+ } -+#if 0 -+ /*dbg_print("\n");*/ -+#endif -+ -+ data_tatal = phydm_division64((data_tatal * 100), average_tmp); -+ psd->psd_data[j] = (u32)_sqrt(data_tatal); -+ -+ i++; -+ j++; -+ } -+ -+#if 0 -+ for (i = 0; i < psd->buf_size; i++) { -+ if ((i % 20) == 0) -+ dbg_print("\n "); -+ -+ dbg_print("0x%x ", psd->psd_data[i]); -+ } -+ dbg_print("\n\n"); -+#endif -+ -+ if (dm->support_ic_type & ODM_RTL8710B) -+ odm_set_bb_reg(dm, psd_reg, 0x30000, avg_org); -+ else -+ odm_set_bb_reg(dm, psd_reg, 0x3000, avg_org); -+} -+ -+void backup_bb_register(struct dm_struct *dm, u32 *bb_backup, u32 *backup_bb_reg, u32 counter) -+{ -+ u32 i ; -+ -+ for (i = 0; i < counter; i++) -+ bb_backup[i] = odm_get_bb_reg(dm, backup_bb_reg[i], MASKDWORD); -+} -+ -+void restore_bb_register(struct dm_struct *dm, u32 *bb_backup, u32 *backup_bb_reg, u32 counter) -+{ -+ u32 i ; -+ -+ for (i = 0; i < counter; i++) -+ odm_set_bb_reg(dm, backup_bb_reg[i], MASKDWORD, bb_backup[i]); -+} -+ -+ -+ -+void _halrf_psd_iqk_init(struct dm_struct *dm) -+{ -+ odm_set_bb_reg(dm, 0x1b04, MASKDWORD, 0x0); -+ odm_set_bb_reg(dm, 0x1b08, MASKDWORD, 0x80); -+ odm_set_bb_reg(dm, 0x1b0c, 0xc00, 0x3); -+ odm_set_bb_reg(dm, 0x1b14, MASKDWORD, 0x0); -+ odm_set_bb_reg(dm, 0x1b18, BIT(0), 0x1); -+ -+ if (dm->support_ic_type & ODM_RTL8197G) -+ odm_set_bb_reg(dm, 0x1b20, MASKDWORD, 0x00040008); -+ if (dm->support_ic_type & ODM_RTL8198F) -+ odm_set_bb_reg(dm, 0x1b20, MASKDWORD, 0x00000000); -+ -+ if (dm->support_ic_type & (ODM_RTL8197G | ODM_RTL8198F)) { -+ odm_set_bb_reg(dm, 0x1b24, MASKDWORD, 0x00030000); -+ odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x00000000); -+ odm_set_bb_reg(dm, 0x1b2c, MASKDWORD, 0x00180018); -+ odm_set_bb_reg(dm, 0x1b30, MASKDWORD, 0x20000000); -+ /*odm_set_bb_reg(dm, 0x1b38, MASKDWORD, 0x20000000);*/ -+ /*odm_set_bb_reg(dm, 0x1b3c, MASKDWORD, 0x20000000);*/ -+ } -+ -+ odm_set_bb_reg(dm, 0x1b1c, 0xfff, 0xd21); -+ odm_set_bb_reg(dm, 0x1b1c, 0xfff00000, 0x821); -+ odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x0); -+ odm_set_bb_reg(dm, 0x1bcc, 0x3f, 0x3f); -+} -+ -+ -+u32 halrf_get_iqk_psd_data( -+ struct dm_struct *dm, -+ u32 point) -+{ -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ struct _halrf_psd_data *psd = &(rf->halrf_psd_data); -+ u32 psd_val, psd_val1, psd_val2, psd_point, i, delay_time = 0; -+ -+#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE) -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) { -+ if (dm->support_ic_type & ODM_RTL8822C) -+ delay_time = 1000; -+ else -+ delay_time = 0; -+ } -+#endif -+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ if (dm->support_interface == ODM_ITRF_PCIE) { -+ if (dm->support_ic_type & ODM_RTL8822C) -+ delay_time = 1000; -+ else -+ delay_time = 150; -+ } -+#endif -+ psd_point = odm_get_bb_reg(dm, R_0x1b2c, MASKDWORD); -+ -+ psd_point &= 0xF000FFFF; -+ -+ point &= 0xFFF; -+ -+ psd_point = psd_point | (point << 16); -+ -+ odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, psd_point); -+ -+ odm_set_bb_reg(dm, R_0x1b34, BIT(0), 0x1); -+ -+ odm_set_bb_reg(dm, R_0x1b34, BIT(0), 0x0); -+ -+ for (i = 0; i < delay_time; i++) -+ ODM_delay_us(1); -+ -+ if (dm->support_ic_type & (ODM_RTL8197G | ODM_RTL8198F)) { -+ if (dm->support_ic_type & ODM_RTL8197G) -+ odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x001a0001); -+ else -+ odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001); -+ -+ psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); -+ -+ psd_val1 = (psd_val1 & 0x001f0000) >> 16; -+ -+ if (dm->support_ic_type & ODM_RTL8197G) -+ odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x001b0001); -+ else -+ odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001); -+ -+ psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); -+ -+ psd_val = (psd_val1 << 27) + (psd_val2 >> 5); -+ } else { -+ odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001); -+ -+ psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); -+ -+ psd_val1 = (psd_val1 & 0x07FF0000) >> 16; -+ -+ odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001); -+ -+ psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); -+ -+ psd_val = (psd_val1 << 21) + (psd_val2 >> 11); -+ } -+ -+ return psd_val; -+} -+ -+void halrf_iqk_psd( -+ struct dm_struct *dm, -+ u32 point, -+ u32 start_point, -+ u32 stop_point, -+ u32 average) -+{ -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ struct _halrf_psd_data *psd = &(rf->halrf_psd_data); -+ -+ u32 i = 0, j = 0, k = 0; -+ u32 psd_reg, avg_org, point_temp, average_tmp = 32, mode, reg_tmp = 5; -+ u64 data_tatal = 0, data_temp[64] = {0}; -+ s32 s_point_tmp; -+ -+ psd->buf_size = 256; -+ -+ mode = average >> 16; -+ -+ if (mode == 2) { -+ if (dm->support_ic_type & ODM_RTL8822C) -+ average_tmp = 1; -+ else { -+ reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000); -+ if (reg_tmp == 0) -+ average_tmp = 1; -+ else if (reg_tmp == 3) -+ average_tmp = 8; -+ else if (reg_tmp == 4) -+ average_tmp = 16; -+ else if (reg_tmp == 5) -+ average_tmp = 32; -+ odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0); -+ } -+ } else { -+ reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000); -+ if (reg_tmp == 0) -+ average_tmp = 1; -+ else if (reg_tmp == 3) -+ average_tmp = 8; -+ else if (reg_tmp == 4) -+ average_tmp = 16; -+ else if (reg_tmp == 5) -+ average_tmp = 32; -+ odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0); -+ } -+ -+#if 0 -+ DbgPrint("[PSD]point=%d, start_point=%d, stop_point=%d, average=0x%x, average_tmp=%d, buf_size=%d, mode=%d\n", -+ point, start_point, stop_point, average, average_tmp, psd->buf_size, mode); -+#endif -+ -+ for (i = 0; i < psd->buf_size; i++) -+ psd->psd_data[i] = 0; -+ -+ i = start_point; -+ while (i < stop_point) { -+ data_tatal = 0; -+ -+ if (i >= point) -+ point_temp = i - point; -+ else -+ { -+ if (dm->support_ic_type & ODM_RTL8814B) -+ { -+ s_point_tmp = i - point - 1; -+ point_temp = s_point_tmp & 0xfff; -+ } -+ else -+ point_temp = i; -+ } -+ -+ for (k = 0; k < average_tmp; k++) { -+ data_temp[k] = halrf_get_iqk_psd_data(dm, point_temp); -+ /*data_tatal = data_tatal + (data_temp[k] * data_temp[k]);*/ -+ data_tatal = data_tatal + data_temp[k]; -+ -+#if 0 -+ if ((k % 20) == 0) -+ DbgPrint("\n "); -+ -+ DbgPrint("0x%x ", data_temp[k]); -+#endif -+ } -+ -+ data_tatal = phydm_division64((data_tatal * 10), average_tmp); -+ psd->psd_data[j] = (u32)data_tatal; -+ -+ i++; -+ j++; -+ } -+ -+ if (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G)) -+ odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, reg_tmp); -+ -+#if 0 -+ DbgPrint("\n [iqk psd]psd result:\n"); -+ -+ for (i = 0; i < psd->buf_size; i++) { -+ if ((i % 20) == 0) -+ DbgPrint("\n "); -+ -+ DbgPrint("0x%x ", psd->psd_data[i]); -+ } -+ DbgPrint("\n\n"); -+#endif -+} -+ -+ -+u32 -+halrf_psd_init( -+ void *dm_void) -+{ -+ enum rt_status ret_status = RT_STATUS_SUCCESS; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ struct _halrf_psd_data *psd = &(rf->halrf_psd_data); -+ -+#if 0 -+ u32 bb_backup[12]; -+ u32 backup_bb_reg[12] = {0x1b04, 0x1b08, 0x1b0c, 0x1b14, 0x1b18, -+ 0x1b1c, 0x1b28, 0x1bcc, 0x1b2c, 0x1b34, -+ 0x1bd4, 0x1bfc}; -+#endif -+ -+ if (psd->psd_progress) { -+ ret_status = RT_STATUS_PENDING; -+ } else { -+ psd->psd_progress = 1; -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G)) { -+ /*backup_bb_register(dm, bb_backup, backup_bb_reg, 12);*/ -+ _halrf_psd_iqk_init(dm); -+ halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average); -+ /*restore_bb_register(dm, bb_backup, backup_bb_reg, 12);*/ -+ } else -+ halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average); -+ psd->psd_progress = 0; -+ } -+ return ret_status; -+} -+ -+u32 -+halrf_psd_query( -+ void *dm_void, -+ u32 *outbuf, -+ u32 buf_size) -+{ -+ enum rt_status ret_status = RT_STATUS_SUCCESS; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ struct _halrf_psd_data *psd = &(rf->halrf_psd_data); -+ -+ if (psd->psd_progress) -+ ret_status = RT_STATUS_PENDING; -+ else -+ odm_move_memory(dm, outbuf, psd->psd_data, -+ sizeof(u32) * psd->buf_size); -+ -+ return ret_status; -+} -+ -+u32 -+halrf_psd_init_query( -+ void *dm_void, -+ u32 *outbuf, -+ u32 point, -+ u32 start_point, -+ u32 stop_point, -+ u32 average, -+ u32 buf_size) -+{ -+ enum rt_status ret_status = RT_STATUS_SUCCESS; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ struct _halrf_psd_data *psd = &(rf->halrf_psd_data); -+ -+ psd->point = point; -+ psd->start_point = start_point; -+ psd->stop_point = stop_point; -+ psd->average = average; -+ -+ if (psd->psd_progress) { -+ ret_status = RT_STATUS_PENDING; -+ } else { -+ psd->psd_progress = 1; -+ halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average); -+ odm_move_memory(dm, outbuf, psd->psd_data, 0x400); -+ psd->psd_progress = 0; -+ } -+ -+ return ret_status; -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_psd.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_psd.h -new file mode 100644 -index 000000000000..f4a76746d9cb ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_psd.h -@@ -0,0 +1,50 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_PSD_H__ -+#define __HALRF_PSD_H__ -+ -+ -+struct _halrf_psd_data { -+ u32 point; -+ u32 start_point; -+ u32 stop_point; -+ u32 average; -+ u32 buf_size; -+ u32 psd_data[256]; -+ u32 psd_progress; -+}; -+ -+u32 -+halrf_psd_init( -+ void *dm_void); -+ -+u32 -+halrf_psd_query( -+ void *dm_void, -+ u32 *outbuf, -+ u32 buf_size); -+ -+u32 -+halrf_psd_init_query( -+ void *dm_void, -+ u32 *outbuf, -+ u32 point, -+ u32 start_point, -+ u32 stop_point, -+ u32 average, -+ u32 buf_size); -+ -+#endif /*#__HALRF_PSD_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_txgapcal.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_txgapcal.c -new file mode 100644 -index 000000000000..0cc44974bf3f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_txgapcal.c -@@ -0,0 +1,300 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+void odm_bub_sort(u32 *data, u32 n) -+{ -+ int i, j, temp, sp; -+ -+ for (i = n - 1; i >= 0; i--) { -+ sp = 1; -+ for (j = 0; j < i; j++) { -+ if (data[j] < data[j + 1]) { -+ temp = data[j]; -+ data[j] = data[j + 1]; -+ data[j + 1] = temp; -+ sp = 0; -+ } -+ } -+ if (sp == 1) -+ break; -+ } -+} -+ -+#if (RTL8197F_SUPPORT == 1) -+ -+u4Byte -+odm_tx_gain_gap_psd_8197f( -+ void *dm_void, -+ u1Byte rf_path, -+ u4Byte rf56) -+{ -+ PDM_ODM_T dm = (PDM_ODM_T)dm_void; -+ -+ u1Byte i, j; -+ u4Byte psd_vaule[5], psd_avg_time = 5, psd_vaule_temp; -+ -+ u4Byte iqk_ctl_addr[2][6] = {{0xe30, 0xe34, 0xe50, 0xe54, 0xe38, 0xe3c}, -+ {0xe50, 0xe54, 0xe30, 0xe34, 0xe58, 0xe5c}}; -+ -+ u4Byte psd_finish_bit[2] = {0x04000000, 0x20000000}; -+ u4Byte psd_fail_bit[2] = {0x08000000, 0x40000000}; -+ -+ u4Byte psd_cntl_value[2][2] = {{0x38008c1c, 0x10008c1c}, -+ {0x38008c2c, 0x10008c2c}}; -+ -+ u4Byte psd_report_addr[2] = {0xea0, 0xec0}; -+ -+ odm_set_rf_reg(dm, rf_path, RF_0xdf, bRFRegOffsetMask, 0x00e02); -+ -+ ODM_delay_us(100); -+ -+ odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x0); -+ -+ odm_set_rf_reg(dm, rf_path, RF_0x56, 0xfff, rf56); -+ while (rf56 != (odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff))) -+ odm_set_rf_reg(dm, rf_path, RF_0x56, 0xfff, rf56); -+ -+ odm_set_bb_reg(dm, R_0xd94, 0xffffffff, 0x44FFBB44); -+ odm_set_bb_reg(dm, R_0xe70, 0xffffffff, 0x00400040); -+ odm_set_bb_reg(dm, R_0xc04, 0xffffffff, 0x6f005403); -+ odm_set_bb_reg(dm, R_0xc08, 0xffffffff, 0x000804e4); -+ odm_set_bb_reg(dm, R_0x874, 0xffffffff, 0x04203400); -+ odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x80800000); -+ -+ odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][0], 0xffffffff, psd_cntl_value[rf_path][0]); -+ odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][1], 0xffffffff, psd_cntl_value[rf_path][1]); -+ odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][2], 0xffffffff, psd_cntl_value[rf_path][0]); -+ odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]); -+ odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][4], 0xffffffff, 0x8215001F); -+ odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][5], 0xffffffff, 0x2805001F); -+ -+ odm_set_bb_reg(dm, R_0xe40, 0xffffffff, 0x81007C00); -+ odm_set_bb_reg(dm, R_0xe44, 0xffffffff, 0x81004800); -+ odm_set_bb_reg(dm, R_0xe4c, 0xffffffff, 0x0046a8d0); -+ -+ for (i = 0; i < psd_avg_time; i++) { -+ for (j = 0; j < 1000; j++) { -+ odm_set_bb_reg(dm, R_0xe48, 0xffffffff, 0xfa005800); -+ odm_set_bb_reg(dm, R_0xe48, 0xffffffff, 0xf8005800); -+ -+ while (!odm_get_bb_reg(dm, R_0xeac, psd_finish_bit[rf_path])) -+ ; /*wait finish bit*/ -+ -+ if (!odm_get_bb_reg(dm, R_0xeac, psd_fail_bit[rf_path])) { /*check fail bit*/ -+ -+ psd_vaule[i] = odm_get_bb_reg(dm, psd_report_addr[rf_path], 0xffffffff); -+ -+ if (psd_vaule[i] > 0xffff) -+ break; -+ } -+ } -+ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x time=%d psd_vaule=0x%x\n", -+ odm_get_rf_reg(dm, rf_path, RF_0x0, 0xff), rf56, -+ odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff), j, -+ psd_vaule[i]); -+ } -+ -+ odm_bub_sort(psd_vaule, psd_avg_time); -+ -+ psd_vaule_temp = psd_vaule[(UINT)(psd_avg_time / 2)]; -+ -+ odm_set_bb_reg(dm, R_0xd94, 0xffffffff, 0x44BBBB44); -+ odm_set_bb_reg(dm, R_0xe70, 0xffffffff, 0x80408040); -+ odm_set_bb_reg(dm, R_0xc04, 0xffffffff, 0x6f005433); -+ odm_set_bb_reg(dm, R_0xc08, 0xffffffff, 0x000004e4); -+ odm_set_bb_reg(dm, R_0x874, 0xffffffff, 0x04003400); -+ odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x00000000); -+ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x psd_vaule_temp=0x%x\n", -+ odm_get_rf_reg(dm, rf_path, RF_0x0, 0xff), rf56, -+ odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff), psd_vaule_temp); -+ -+ odm_set_rf_reg(dm, rf_path, RF_0xdf, bRFRegOffsetMask, 0x00602); -+ -+ return psd_vaule_temp; -+} -+ -+void odm_tx_gain_gap_calibration_8197f( -+ void *dm_void) -+{ -+ PDM_ODM_T dm = (PDM_ODM_T)dm_void; -+ -+ u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3; -+ -+ s1Byte delta_gain_gap_pre, delta_gain_gap[2][11]; -+ u4Byte rf56_current, rf56_next, psd_value_current, psd_value_next; -+ u4Byte psd_gap, rf56_current_temp[2][11]; -+ s4Byte rf33[2][11]; -+ -+ memset(rf33, 0x0, sizeof(rf33)); -+ -+ for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) { -+ if (rf_path == RF_PATH_A) -+ odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/ -+ else if (rf_path == RF_PATH_B) -+ odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/ -+ -+ ODM_delay_us(100); -+ -+ for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) { -+ rf0_idx_current = 3 * (rf0_idx - 1) + 1; -+ odm_set_rf_reg(dm, rf_path, RF_0x0, 0xff, rf0_idx_current); -+ ODM_delay_us(100); -+ rf56_current_temp[rf_path][rf0_idx] = odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff); -+ rf56_current = rf56_current_temp[rf_path][rf0_idx]; -+ -+ rf0_idx_next = 3 * rf0_idx + 1; -+ odm_set_rf_reg(dm, rf_path, RF_0x0, 0xff, rf0_idx_next); -+ ODM_delay_us(100); -+ rf56_next = odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff); -+ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[TGGC] rf56_current[%d][%d]=0x%x rf56_next[%d][%d]=0x%x\n", -+ rf_path, rf0_idx, rf56_current, rf_path, rf0_idx, -+ rf56_next); -+ -+ if ((rf56_current >> 5) == (rf56_next >> 5)) { -+ delta_gain_gap[rf_path][rf0_idx] = 0; -+ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[TGGC] rf56_current[11:5] == rf56_next[%d][%d][11:5]=0x%x delta_gain_gap[%d][%d]=%d\n", -+ rf_path, rf0_idx, (rf56_next >> 5), -+ rf_path, rf0_idx, -+ delta_gain_gap[rf_path][rf0_idx]); -+ -+ continue; -+ } -+ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[TGGC] rf56_current[%d][%d][11:5]=0x%x != rf56_next[%d][%d][11:5]=0x%x\n", -+ rf_path, rf0_idx, (rf56_current >> 5), rf_path, -+ rf0_idx, (rf56_next >> 5)); -+ -+ for (i = 0; i < delta_gain_retry; i++) { -+ psd_value_current = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_current); -+ -+ psd_value_next = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_next - 2); -+ -+ psd_gap = psd_value_next / (psd_value_current / 1000); -+ -+#if 0 -+ if (psd_gap > 1413) -+ delta_gain_gap[rf_path][rf0_idx] = 1; -+ else if (psd_gap > 1122) -+ delta_gain_gap[rf_path][rf0_idx] = 0; -+ else -+ delta_gain_gap[rf_path][rf0_idx] = -1; -+#endif -+ -+ if (psd_gap > 1445) -+ delta_gain_gap[rf_path][rf0_idx] = 1; -+ else if (psd_gap > 1096) -+ delta_gain_gap[rf_path][rf0_idx] = 0; -+ else -+ delta_gain_gap[rf_path][rf0_idx] = -1; -+ -+ if (i == 0) -+ delta_gain_gap_pre = delta_gain_gap[rf_path][rf0_idx]; -+ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[TGGC] psd_value_current=0x%x psd_value_next=0x%x psd_value_next/psd_value_current=%d delta_gain_gap[%d][%d]=%d\n", -+ psd_value_current, psd_value_next, -+ psd_gap, rf_path, rf0_idx, -+ delta_gain_gap[rf_path][rf0_idx]); -+ -+ if (i == 0 && delta_gain_gap[rf_path][rf0_idx] == 0) -+ break; -+ -+ if (delta_gain_gap_pre != delta_gain_gap[rf_path][rf0_idx]) { -+ delta_gain_gap[rf_path][rf0_idx] = 0; -+ -+ RF_DBG(dm, DBG_RF_IQK, "[TGGC] delta_gain_gap_pre(%d) != delta_gain_gap[%d][%d](%d) time=%d\n", -+ delta_gain_gap_pre, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx], i); -+ -+ break; -+ } -+ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[TGGC] delta_gain_gap_pre(%d) == delta_gain_gap[%d][%d](%d) time=%d\n", -+ delta_gain_gap_pre, rf_path, rf0_idx, -+ delta_gain_gap[rf_path][rf0_idx], i); -+ } -+ } -+ -+ if (rf_path == RF_PATH_A) -+ odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/ -+ else if (rf_path == RF_PATH_B) -+ odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/ -+ -+ ODM_delay_us(100); -+ } -+ -+#if 0 -+ /*odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire*/ -+#endif -+ -+ for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) { -+ odm_set_rf_reg(dm, rf_path, RF_0xef, bRFRegOffsetMask, 0x00100); -+ -+ for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) { -+ rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + (rf56_current_temp[rf_path][rf0_idx] & 0x1f); -+ -+ for (i = rf0_idx; i <= 10; i++) -+ rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + delta_gain_gap[rf_path][i]; -+ -+ if (rf33[rf_path][rf0_idx] >= 0x1d) -+ rf33[rf_path][rf0_idx] = 0x1d; -+ else if (rf33[rf_path][rf0_idx] <= 0x2) -+ rf33[rf_path][rf0_idx] = 0x2; -+ -+ rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + ((rf0_idx - 1) * 0x4000) + (rf56_current_temp[rf_path][rf0_idx] & 0xfffe0); -+ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[TGGC] rf56[%d][%d]=0x%05x rf33[%d][%d]=0x%05x\n", -+ rf_path, rf0_idx, -+ rf56_current_temp[rf_path][rf0_idx], rf_path, -+ rf0_idx, rf33[rf_path][rf0_idx]); -+ -+ odm_set_rf_reg(dm, rf_path, RF_0x33, bRFRegOffsetMask, rf33[rf_path][rf0_idx]); -+ } -+ -+ odm_set_rf_reg(dm, rf_path, RF_0xef, bRFRegOffsetMask, 0x00000); -+ } -+} -+#endif -+ -+void odm_tx_gain_gap_calibration(void *dm_void) -+{ -+ PDM_ODM_T dm = (PDM_ODM_T)dm_void; -+#if (RTL8197F_SUPPORT == 1) -+ if (dm->SupportICType & ODM_RTL8197F) -+ odm_tx_gain_gap_calibration_8197f(dm_void); -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_txgapcal.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_txgapcal.h -new file mode 100644 -index 000000000000..09651cbee3b9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/halrf_txgapcal.h -@@ -0,0 +1,31 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_TXGAPCAL_H__ -+#define __HALRF_TXGAPCAL_H__ -+ -+void odm_tx_gain_gap_calibration(void *dm_void); -+ -+#endif /*__HALRF_TXGAPCAL_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/rtl8703b/halrf_8703b.c b/drivers/staging/rtl8723cs/hal/phydm/halrf/rtl8703b/halrf_8703b.c -new file mode 100644 -index 000000000000..6630fee689a6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/rtl8703b/halrf_8703b.c -@@ -0,0 +1,1857 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if RT_PLATFORM == PLATFORM_MACOSX -+#include "phydm_precomp.h" -+#else -+#include "../phydm_precomp.h" -+#endif -+#else -+#include "../../phydm_precomp.h" -+#endif -+ -+#if (RTL8703B_SUPPORT == 1) -+ -+/*---------------------------Define Local Constant---------------------------*/ -+/* IQK */ -+#define IQK_DELAY_TIME_8703B 10 -+#define LCK_DELAY_TIME_8703B 100 -+ -+/* LTE_COEX */ -+#define REG_LTECOEX_CTRL 0x07C0 -+#define REG_LTECOEX_WRITE_DATA 0x07C4 -+#define REG_LTECOEX_READ_DATA 0x07C8 -+#define REG_LTECOEX_PATH_CONTROL 0x70 -+ -+/* 2010/04/25 MH Define the max tx power tracking tx agc power. */ -+#define ODM_TXPWRTRACK_MAX_IDX8703B 6 -+ -+#define idx_0xc94 0 -+#define idx_0xc80 1 -+#define idx_0xc4c 2 -+ -+#define idx_0xc14 0 -+#define idx_0xca0 1 -+ -+#define KEY 0 -+#define VAL 1 -+ -+/*---------------------------Define Local Constant---------------------------*/ -+ -+/* 3============================================================ -+ * 3 Tx Power Tracking -+ * 3============================================================ */ -+ -+void set_iqk_matrix_8703b(struct dm_struct *dm, u8 OFDM_index, u8 rf_path, -+ s32 iqk_result_x, s32 iqk_result_y) -+{ -+ s32 ele_A = 0, ele_D = 0, ele_C = 0, value32; -+ s32 ele_A_ext = 0, ele_C_ext = 0, ele_D_ext = 0; -+ -+ rf_path = RF_PATH_A; -+ -+ if (OFDM_index >= OFDM_TABLE_SIZE) -+ OFDM_index = OFDM_TABLE_SIZE - 1; -+ else if (OFDM_index < 0) -+ OFDM_index = 0; -+ -+ if (iqk_result_x != 0 && (*dm->band_type == ODM_BAND_2_4G)) { -+ /* new element D */ -+ ele_D = (ofdm_swing_table_new[OFDM_index] & 0xFFC00000) >> 22; -+ ele_D_ext = (((iqk_result_x * ele_D) >> 7) & 0x01); -+ -+ /* new element A */ -+ if ((iqk_result_x & 0x00000200) != 0) /* consider minus */ -+ iqk_result_x = iqk_result_x | 0xFFFFFC00; -+ ele_A = ((iqk_result_x * ele_D) >> 8) & 0x000003FF; -+ ele_A_ext = ((iqk_result_x * ele_D) >> 7) & 0x1; -+ /* new element C */ -+ if ((iqk_result_y & 0x00000200) != 0) -+ iqk_result_y = iqk_result_y | 0xFFFFFC00; -+ ele_C = ((iqk_result_y * ele_D) >> 8) & 0x000003FF; -+ ele_C_ext = ((iqk_result_y * ele_D) >> 7) & 0x1; -+ -+ switch (rf_path) { -+ case RF_PATH_A: -+ /* write new elements A, C, D to regC80, regC94, reg0xc4c, and element B is always 0 */ -+ /* write 0xc80 */ -+ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; -+ odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, value32); -+ /* write 0xc94 */ -+ value32 = (ele_C & 0x000003C0) >> 6; -+ odm_set_bb_reg(dm, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, value32); -+ /* write 0xc4c */ -+ value32 = (ele_D_ext << 28) | (ele_A_ext << 31) | (ele_C_ext << 29); -+ value32 = (odm_get_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD) & (~(BIT(31) | BIT(29) | BIT(28)))) | value32; -+ odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD, value32); -+ break; -+ case RF_PATH_B: -+ /* write new elements A, C, D to regC88, regC9C, regC4C, and element B is always 0 */ -+ /* write 0xc88 */ -+ value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; -+ odm_set_bb_reg(dm, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD, value32); -+ /* write 0xc9c */ -+ value32 = (ele_C & 0x000003C0) >> 6; -+ odm_set_bb_reg(dm, REG_OFDM_0_XD_TX_AFE, MASKH4BITS, value32); -+ /* write 0xc4c */ -+ value32 = (ele_D_ext << 24) | (ele_A_ext << 27) | (ele_C_ext << 25); -+ value32 = (odm_get_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD) & (~(BIT(24) | BIT(27) | BIT(25)))) | value32; -+ odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD, value32); -+ break; -+ default: -+ break; -+ } -+ } else { -+ switch (rf_path) { -+ case RF_PATH_A: -+ odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_new[OFDM_index]); -+ odm_set_bb_reg(dm, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, 0x00); -+ value32 = odm_get_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD) & (~(BIT(31) | BIT(29) | BIT(28))); -+ odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD, value32); -+ break; -+ -+ case RF_PATH_B: -+ odm_set_bb_reg(dm, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_new[OFDM_index]); -+ odm_set_bb_reg(dm, REG_OFDM_0_XD_TX_AFE, MASKH4BITS, 0x00); -+ value32 = odm_get_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD) & (~(BIT(24) | BIT(27) | BIT(25))); -+ odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD, value32); -+ break; -+ -+ default: -+ break; -+ } -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "TxPwrTracking path %c: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x ele_A_ext = 0x%x ele_C_ext = 0x%x ele_D_ext = 0x%x\n", -+ (rf_path == RF_PATH_A ? 'A' : 'B'), (u32)iqk_result_x, -+ (u32)iqk_result_y, (u32)ele_A, (u32)ele_C, (u32)ele_D, -+ (u32)ele_A_ext, (u32)ele_C_ext, (u32)ele_D_ext); -+} -+ -+void set_cck_filter_coefficient_8703b(struct dm_struct *dm, u8 cck_swing_index) -+{ -+ odm_write_1byte(dm, 0xa22, cck_swing_table_ch1_ch14_88f[cck_swing_index][0]); -+ odm_write_1byte(dm, 0xa23, cck_swing_table_ch1_ch14_88f[cck_swing_index][1]); -+ odm_write_1byte(dm, 0xa24, cck_swing_table_ch1_ch14_88f[cck_swing_index][2]); -+ odm_write_1byte(dm, 0xa25, cck_swing_table_ch1_ch14_88f[cck_swing_index][3]); -+ odm_write_1byte(dm, 0xa26, cck_swing_table_ch1_ch14_88f[cck_swing_index][4]); -+ odm_write_1byte(dm, 0xa27, cck_swing_table_ch1_ch14_88f[cck_swing_index][5]); -+ odm_write_1byte(dm, 0xa28, cck_swing_table_ch1_ch14_88f[cck_swing_index][6]); -+ odm_write_1byte(dm, 0xa29, cck_swing_table_ch1_ch14_88f[cck_swing_index][7]); -+ odm_write_1byte(dm, 0xa9a, cck_swing_table_ch1_ch14_88f[cck_swing_index][8]); -+ odm_write_1byte(dm, 0xa9b, cck_swing_table_ch1_ch14_88f[cck_swing_index][9]); -+ odm_write_1byte(dm, 0xa9c, cck_swing_table_ch1_ch14_88f[cck_swing_index][10]); -+ odm_write_1byte(dm, 0xa9d, cck_swing_table_ch1_ch14_88f[cck_swing_index][11]); -+ odm_write_1byte(dm, 0xaa0, cck_swing_table_ch1_ch14_88f[cck_swing_index][12]); -+ odm_write_1byte(dm, 0xaa1, cck_swing_table_ch1_ch14_88f[cck_swing_index][13]); -+ odm_write_1byte(dm, 0xaa2, cck_swing_table_ch1_ch14_88f[cck_swing_index][14]); -+ odm_write_1byte(dm, 0xaa3, cck_swing_table_ch1_ch14_88f[cck_swing_index][15]); -+} -+ -+void do_iqk_8703b(void *dm_void, u8 delta_thermal_index, u8 thermal_value, -+ u8 threshold) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ odm_reset_iqk_result(dm); -+ dm->rf_calibrate_info.thermal_value_iqk = thermal_value; -+ halrf_iqk_trigger(dm, false); -+} -+ -+/*----------------------------------------------------------------------------- -+ * Function: odm_TxPwrTrackSetPwr88E() -+ * -+ * Overview: 88E change all channel tx power accordign to flag. -+ * OFDM & CCK are all different. -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 04/23/2012 MHC Create version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+void odm_tx_pwr_track_set_pwr_8703b(void *dm_void, enum pwrtrack_method method, -+ u8 rf_path, u8 channel_mapped_index) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ADAPTER *adapter = dm->adapter; -+ u8 pwr_tracking_limit_ofdm = 34; /* +0dB */ -+ u8 pwr_tracking_limit_cck = CCK_TABLE_SIZE_88F - 1; /* -2dB */ -+ u8 tx_rate = 0xFF; -+ u8 final_ofdm_swing_index = 0; -+ u8 final_cck_swing_index = 0; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+#if (MP_DRIVER == 1) /*win MP */ -+ PMPT_CONTEXT p_mpt_ctx = &(adapter->MptCtx); -+ -+ tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex); -+#else /*win normal*/ -+ PMGNT_INFO mgnt_info = &(((PADAPTER)adapter)->MgntInfo); -+ if (!mgnt_info->ForcedDataRate) { /*auto rate*/ -+ tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate); -+ } else -+ tx_rate = (u8)mgnt_info->ForcedDataRate; -+#endif -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ if (*dm->mp_mode == true) { /*CE MP*/ -+#ifdef CONFIG_MP_INCLUDED -+ PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx); -+ -+ tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index); -+#endif -+ } else { /*CE normal*/ -+ u16 rate = *(dm->forced_data_rate); -+ -+ if (!rate) { /*auto rate*/ -+ if (dm->number_linked_client != 0) -+ tx_rate = hw_rate_to_m_rate(dm->tx_rate); -+ else -+ tx_rate = rf->p_rate_index; -+ } else /*force rate*/ -+ tx_rate = (u8)rate; -+ } -+#endif -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "===>ODM_TxPwrTrackSetPwr8703B\n"); -+ -+ if (tx_rate != 0xFF) { -+ /*2 CCK*/ -+ if ((tx_rate >= MGN_1M && tx_rate <= MGN_5_5M) || tx_rate == MGN_11M) -+ pwr_tracking_limit_cck = CCK_TABLE_SIZE_88F - 1; -+ /*2 OFDM*/ -+ else if ((tx_rate >= MGN_6M) && (tx_rate <= MGN_48M)) -+ pwr_tracking_limit_ofdm = 36; /*+3dB*/ -+ else if (tx_rate == MGN_54M) -+ pwr_tracking_limit_ofdm = 34; /*+2dB*/ -+ /*2 HT*/ -+ else if ((tx_rate >= MGN_MCS0) && (tx_rate <= MGN_MCS2)) /*QPSK/BPSK*/ -+ pwr_tracking_limit_ofdm = 38; /*+4dB*/ -+ else if ((tx_rate >= MGN_MCS3) && (tx_rate <= MGN_MCS4)) /*16QAM*/ -+ pwr_tracking_limit_ofdm = 36; /*+3dB*/ -+ else if ((tx_rate >= MGN_MCS5) && (tx_rate <= MGN_MCS7)) /*64QAM*/ -+ pwr_tracking_limit_ofdm = 34; /*+2dB*/ -+ else -+ pwr_tracking_limit_ofdm = cali_info->default_ofdm_index; /*Default OFDM index = 30*/ -+ } -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "tx_rate=0x%x, pwr_tracking_limit=%d\n", -+ tx_rate, pwr_tracking_limit_ofdm); -+ -+ if (method == TXAGC) { -+ u32 pwr = 0, tx_agc = 0; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "odm_TxPwrTrackSetPwr8703B CH=%d\n", *(dm->channel)); -+ -+ cali_info->remnant_ofdm_swing_idx[rf_path] = cali_info->absolute_ofdm_swing_idx[rf_path]; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#if (MP_DRIVER != 1) -+ cali_info->modify_tx_agc_flag_path_a = true; -+ cali_info->modify_tx_agc_flag_path_a_cck = true; -+ -+ odm_set_tx_power_index_by_rate_section(dm, (enum rf_path)rf_path, *dm->channel, CCK); -+ odm_set_tx_power_index_by_rate_section(dm, (enum rf_path)rf_path, *dm->channel, OFDM); -+ odm_set_tx_power_index_by_rate_section(dm, (enum rf_path)rf_path, *dm->channel, HT_MCS0_MCS7); -+#else -+ pwr = odm_get_bb_reg(dm, REG_TX_AGC_A_RATE18_06, 0xFF); -+ pwr += cali_info->power_index_offset[rf_path]; -+ odm_set_bb_reg(dm, REG_TX_AGC_A_CCK_1_MCS32, MASKBYTE1, pwr); -+ tx_agc = (pwr << 16) | (pwr << 8) | (pwr); -+ odm_set_bb_reg(dm, REG_TX_AGC_B_CCK_11_A_CCK_2_11, 0xffffff00, tx_agc); -+ RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr8703B: CCK Tx-rf(A) Power = 0x%x\n", tx_agc)); -+ -+ pwr = odm_get_bb_reg(dm, REG_TX_AGC_A_RATE18_06, 0xFF); -+ pwr += (cali_info->bb_swing_idx_ofdm[rf_path] - cali_info->bb_swing_idx_ofdm_base[rf_path]); -+ tx_agc |= ((pwr << 24) | (pwr << 16) | (pwr << 8) | pwr); -+ odm_set_bb_reg(dm, REG_TX_AGC_A_RATE18_06, MASKDWORD, tx_agc); -+ odm_set_bb_reg(dm, REG_TX_AGC_A_RATE54_24, MASKDWORD, tx_agc); -+ odm_set_bb_reg(dm, REG_TX_AGC_A_MCS03_MCS00, MASKDWORD, tx_agc); -+ odm_set_bb_reg(dm, REG_TX_AGC_A_MCS07_MCS04, MASKDWORD, tx_agc); -+ odm_set_bb_reg(dm, REG_TX_AGC_A_MCS11_MCS08, MASKDWORD, tx_agc); -+ odm_set_bb_reg(dm, REG_TX_AGC_A_MCS15_MCS12, MASKDWORD, tx_agc); -+ RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr8703B: OFDM Tx-rf(A) Power = 0x%x\n", tx_agc)); -+#endif -+#endif -+ } else if (method == BBSWING) { -+ final_ofdm_swing_index = cali_info->default_ofdm_index + cali_info->absolute_ofdm_swing_idx[rf_path]; -+ final_cck_swing_index = cali_info->default_cck_index + cali_info->absolute_ofdm_swing_idx[rf_path]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " cali_info->default_ofdm_index=%d, cali_info->DefaultCCKIndex=%d, cali_info->absolute_ofdm_swing_idx[rf_path]=%d, cali_info->remnant_cck_swing_idx=%d rf_path = %d\n", -+ cali_info->default_ofdm_index, -+ cali_info->default_cck_index, -+ cali_info->absolute_ofdm_swing_idx[rf_path], -+ cali_info->remnant_cck_swing_idx, rf_path); -+ -+ /* Adjust BB swing by OFDM IQ matrix */ -+ if (final_ofdm_swing_index >= pwr_tracking_limit_ofdm) -+ final_ofdm_swing_index = pwr_tracking_limit_ofdm; -+ else if (final_ofdm_swing_index < 0) -+ final_ofdm_swing_index = 0; -+ -+ if (final_cck_swing_index >= CCK_TABLE_SIZE_88F) -+ final_cck_swing_index = CCK_TABLE_SIZE_88F - 1; -+ else if (cali_info->bb_swing_idx_cck < 0) -+ final_cck_swing_index = 0; -+ -+ set_iqk_matrix_8703b(dm, final_ofdm_swing_index, RF_PATH_A, -+ cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0], -+ cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); -+ -+ set_cck_filter_coefficient_8703b(dm, final_cck_swing_index); -+ -+ } else if (method == MIX_MODE) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " dm->default_ofdm_index=%d, dm->DefaultCCKIndex=%d, dm->absolute_ofdm_swing_idx[rf_path]=%d, dm->remnant_cck_swing_idx=%d rf_path = %d\n", -+ cali_info->default_ofdm_index, -+ cali_info->default_cck_index, -+ cali_info->absolute_ofdm_swing_idx[rf_path], -+ cali_info->remnant_cck_swing_idx, rf_path); -+ -+ final_ofdm_swing_index = cali_info->default_ofdm_index + cali_info->absolute_ofdm_swing_idx[rf_path]; -+ final_cck_swing_index = cali_info->default_cck_index + cali_info->absolute_ofdm_swing_idx[rf_path]; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " dm->default_ofdm_index=%d, dm->DefaultCCKIndex=%d, dm->absolute_ofdm_swing_idx[rf_path]=%d rf_path = %d\n", -+ cali_info->default_ofdm_index, -+ cali_info->default_cck_index, -+ cali_info->absolute_ofdm_swing_idx[rf_path], rf_path); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " final_ofdm_swing_index=%d, final_cck_swing_index=%d rf_path=%d\n", -+ final_ofdm_swing_index, final_cck_swing_index, rf_path); -+ -+ if (final_ofdm_swing_index > pwr_tracking_limit_ofdm) { /*BBSwing higher then Limit*/ -+ cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index - pwr_tracking_limit_ofdm; -+ -+ set_iqk_matrix_8703b(dm, pwr_tracking_limit_ofdm, RF_PATH_A, -+ cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0], -+ cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); -+ -+ cali_info->modify_tx_agc_flag_path_a = true; -+ odm_set_tx_power_index_by_rate_section(dm, (enum rf_path)rf_path, *dm->channel, OFDM); -+ odm_set_tx_power_index_by_rate_section(dm, (enum rf_path)rf_path, *dm->channel, HT_MCS0_MCS7); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " ******Path_A Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n", -+ pwr_tracking_limit_ofdm, -+ cali_info->remnant_ofdm_swing_idx[rf_path]); -+ } else if (final_ofdm_swing_index < 0) { -+ cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index; -+ -+ set_iqk_matrix_8703b(dm, 0, RF_PATH_A, -+ cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0], -+ cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); -+ -+ cali_info->modify_tx_agc_flag_path_a = true; -+ odm_set_tx_power_index_by_rate_section(dm, (enum rf_path)rf_path, *dm->channel, OFDM); -+ odm_set_tx_power_index_by_rate_section(dm, (enum rf_path)rf_path, *dm->channel, HT_MCS0_MCS7); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " ******Path_A Lower then BBSwing lower bound 0, Remnant tx_agc value = %d\n", -+ cali_info->remnant_ofdm_swing_idx[rf_path]); -+ } else { -+ set_iqk_matrix_8703b(dm, final_ofdm_swing_index, RF_PATH_A, -+ cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][0], -+ cali_info->iqk_matrix_reg_setting[channel_mapped_index].value[0][1]); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " ******Path_A Compensate with BBSwing, final_ofdm_swing_index = %d\n", -+ final_ofdm_swing_index); -+ -+ if (cali_info->modify_tx_agc_flag_path_a) { /*If tx_agc has changed, reset tx_agc again*/ -+ cali_info->remnant_ofdm_swing_idx[rf_path] = 0; -+ odm_set_tx_power_index_by_rate_section(dm, (enum rf_path)rf_path, *dm->channel, OFDM); -+ odm_set_tx_power_index_by_rate_section(dm, (enum rf_path)rf_path, *dm->channel, HT_MCS0_MCS7); -+ cali_info->modify_tx_agc_flag_path_a = false; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " ******Path_A dm->Modify_TxAGC_Flag = false\n"); -+ } -+ } -+ if (final_cck_swing_index > pwr_tracking_limit_cck) { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " final_cck_swing_index(%d) > pwr_tracking_limit_cck(%d)\n", -+ final_cck_swing_index, pwr_tracking_limit_cck); -+ -+ cali_info->remnant_cck_swing_idx = final_cck_swing_index - pwr_tracking_limit_cck; -+ -+ set_cck_filter_coefficient_8703b(dm, pwr_tracking_limit_cck); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Path_A CCK Over Limit, pwr_tracking_limit_cck = %d, dm->remnant_cck_swing_idx = %d\n", -+ pwr_tracking_limit_cck, -+ cali_info->remnant_cck_swing_idx); -+ -+ cali_info->modify_tx_agc_flag_path_a_cck = true; -+ -+ odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, CCK); -+ -+ } else if (final_cck_swing_index < 0) { /* Lowest CCK index = 0 */ -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " final_cck_swing_index(%d) < 0 pwr_tracking_limit_cck(%d)\n", -+ final_cck_swing_index, pwr_tracking_limit_cck); -+ -+ cali_info->remnant_cck_swing_idx = final_cck_swing_index; -+ -+ set_cck_filter_coefficient_8703b(dm, 0); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Path_A CCK Under Limit, pwr_tracking_limit_cck = %d, dm->remnant_cck_swing_idx = %d\n", -+ 0, cali_info->remnant_cck_swing_idx); -+ -+ cali_info->modify_tx_agc_flag_path_a_cck = true; -+ -+ odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, CCK); -+ -+ } else { -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ " else final_cck_swing_index=%d pwr_tracking_limit_cck(%d)\n", -+ final_cck_swing_index, pwr_tracking_limit_cck); -+ -+ set_cck_filter_coefficient_8703b(dm, final_cck_swing_index); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "******Path_A CCK Compensate with BBSwing, final_cck_swing_index = %d\n", -+ final_cck_swing_index); -+ -+ cali_info->modify_tx_agc_flag_path_a_cck = false; -+ -+ cali_info->remnant_cck_swing_idx = 0; -+ -+ if (cali_info->modify_tx_agc_flag_path_a_cck) { /*If tx_agc has changed, reset tx_agc again*/ -+ cali_info->remnant_cck_swing_idx = 0; -+ odm_set_tx_power_index_by_rate_section(dm, RF_PATH_A, *dm->channel, CCK); -+ cali_info->modify_tx_agc_flag_path_a_cck = false; -+ } -+ } -+ -+ } else { -+ return; /* This method is not supported. */ -+ } -+} -+ -+void get_delta_swing_table_8703b(void *dm_void, u8 **temperature_up_a, -+ u8 **temperature_down_a, u8 **temperature_up_b, -+ u8 **temperature_down_b) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ADAPTER *adapter = dm->adapter; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ struct _hal_rf_ *rf = &(dm->rf_table); -+ u8 tx_rate = 0xFF; -+ u8 channel = *dm->channel; -+ -+ if (*dm->mp_mode == true) { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if (MP_DRIVER == 1) -+ PMPT_CONTEXT p_mpt_ctx = &(adapter->MptCtx); -+ -+ tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex); -+#endif -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+#ifdef CONFIG_MP_INCLUDED -+ PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx); -+ -+ tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index); -+#endif -+#endif -+#endif -+ } else { -+ u16 rate = *(dm->forced_data_rate); -+ -+ if (!rate) { /*auto rate*/ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ if (dm->number_linked_client != 0) -+ tx_rate = hw_rate_to_m_rate(dm->tx_rate); -+ else -+ tx_rate = rf->p_rate_index; -+#endif -+ } else /*force rate*/ -+ tx_rate = (u8)rate; -+ } -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", -+ tx_rate); -+ -+ if (1 <= channel && channel <= 14) { -+ if (IS_CCK_RATE(tx_rate)) { -+ *temperature_up_a = cali_info->delta_swing_table_idx_2g_cck_a_p; -+ *temperature_down_a = cali_info->delta_swing_table_idx_2g_cck_a_n; -+ *temperature_up_b = cali_info->delta_swing_table_idx_2g_cck_b_p; -+ *temperature_down_b = cali_info->delta_swing_table_idx_2g_cck_b_n; -+ } else { -+ *temperature_up_a = cali_info->delta_swing_table_idx_2ga_p; -+ *temperature_down_a = cali_info->delta_swing_table_idx_2ga_n; -+ *temperature_up_b = cali_info->delta_swing_table_idx_2gb_p; -+ *temperature_down_b = cali_info->delta_swing_table_idx_2gb_n; -+ } -+ } else { -+ *temperature_up_a = (u8 *)delta_swing_table_idx_2ga_p_8188e; -+ *temperature_down_a = (u8 *)delta_swing_table_idx_2ga_n_8188e; -+ *temperature_up_b = (u8 *)delta_swing_table_idx_2ga_p_8188e; -+ *temperature_down_b = (u8 *)delta_swing_table_idx_2ga_n_8188e; -+ } -+ -+ return; -+} -+ -+void get_delta_swing_xtal_table_8703b(void *dm_void, s8 **temperature_up_xtal, -+ s8 **temperature_down_xtal) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ -+ *temperature_up_xtal = cali_info->delta_swing_table_xtal_p; -+ *temperature_down_xtal = cali_info->delta_swing_table_xtal_n; -+} -+ -+void odm_txxtaltrack_set_xtal_8703b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ -+ s8 crystal_cap; -+ -+ crystal_cap = dm->dm_cfo_track.crystal_cap_default & 0x3F; -+ crystal_cap = crystal_cap + cali_info->xtal_offset; -+ -+ if (crystal_cap < 0) -+ crystal_cap = 0; -+ else if (crystal_cap > 63) -+ crystal_cap = 63; -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, -+ "crystal_cap(%d)= dm->dm_cfo_track.crystal_cap_default(%d) + cali_info->xtal_offset(%d)\n", -+ crystal_cap, dm->dm_cfo_track.crystal_cap_default, cali_info->xtal_offset); -+ -+ odm_set_bb_reg(dm, REG_MAC_PHY_CTRL, 0xFFF000, (crystal_cap | (crystal_cap << 6))); -+ -+ RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "crystal_cap(0x2c) 0x%X\n", -+ odm_get_bb_reg(dm, REG_MAC_PHY_CTRL, 0xFFF000)); -+} -+ -+void configure_txpower_track_8703b(struct txpwrtrack_cfg *config) -+{ -+ config->swing_table_size_cck = CCK_TABLE_SIZE; -+ config->swing_table_size_ofdm = OFDM_TABLE_SIZE; -+ config->threshold_iqk = IQK_THRESHOLD; -+ config->average_thermal_num = AVG_THERMAL_NUM_8703B; -+ config->rf_path_count = MAX_PATH_NUM_8703B; -+ config->thermal_reg_addr = RF_T_METER_8703B; -+ -+ config->odm_tx_pwr_track_set_pwr = odm_tx_pwr_track_set_pwr_8703b; -+ config->do_iqk = do_iqk_8703b; -+ config->phy_lc_calibrate = halrf_lck_trigger; -+ config->get_delta_swing_table = get_delta_swing_table_8703b; -+ config->get_delta_swing_xtal_table = get_delta_swing_xtal_table_8703b; -+ config->odm_txxtaltrack_set_xtal = odm_txxtaltrack_set_xtal_8703b; -+} -+ -+/* 1 7. IQK */ -+#define MAX_TOLERANCE 5 -+#define IQK_DELAY_TIME 1 /* ms */ -+ -+u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -+ phy_path_a_iqk_8703b( -+ struct dm_struct *dm) -+{ -+ u32 reg_eac, reg_e94, reg_e9c; -+ u8 result = 0x00, ktime; -+ u32 original_path, original_gnt; -+ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]TX IQK!\n"); -+ -+ /*8703b IQK v2.0 20150713*/ -+ /*1 Tx IQK*/ -+ /*IQK setting*/ -+ odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, 0x01007c00); -+ odm_set_bb_reg(dm, REG_RX_IQK, MASKDWORD, 0x01004800); -+ /*path-A IQK setting*/ -+ odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x18008c1c); -+ odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x38008c1c); -+ odm_set_bb_reg(dm, REG_TX_IQK_TONE_B, MASKDWORD, 0x38008c1c); -+ odm_set_bb_reg(dm, REG_RX_IQK_TONE_B, MASKDWORD, 0x38008c1c); -+ /* odm_set_bb_reg(dm, REG_TX_IQK_PI_A, MASKDWORD, 0x8214010a);*/ -+ odm_set_bb_reg(dm, REG_TX_IQK_PI_A, MASKDWORD, 0x8214030f); -+ odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28110000); -+ odm_set_bb_reg(dm, REG_TX_IQK_PI_B, MASKDWORD, 0x82110000); -+ odm_set_bb_reg(dm, REG_RX_IQK_PI_B, MASKDWORD, 0x28110000); -+ -+ /*LO calibration setting*/ -+ odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x00462911); -+ -+ /*leave IQK mode*/ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); -+ -+ /*PA, PAD setting*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, 0x800, 0x1); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x55, 0x0007f, 0x7); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x7f, RFREGOFFSETMASK, 0x0d400); -+ -+ /*enter IQK mode*/ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); -+ -+#if 1 -+ /*path setting*/ -+ /*Save Original path Owner, Original GNT*/ -+ original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038); -+ ODM_delay_ms(1); -+ original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/ -+ -+ /*set GNT_WL=1/GNT_BT=0 and path owner to WiFi for pause BT traffic*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x00007700); -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038); /*0x38[15:8] = 0x77*/ -+ odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1); /*0x70[26] =1 --> path Owner to WiFi*/ -+#endif -+ -+ /*One shot, path A LOK & IQK*/ -+ odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); -+ odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); -+ -+ /* delay x ms */ -+ ODM_delay_ms(IQK_DELAY_TIME_8703B); -+ ktime = 0; -+ while ((odm_get_bb_reg(dm, R_0xe90, MASKDWORD) == 0) && ktime < 10) { -+ ODM_delay_ms(5); -+ ktime++; -+ } -+ -+#if 1 -+ /*path setting*/ -+ /*Restore GNT_WL/GNT_BT and path owner*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt); -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038); -+ odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path); -+ -+ original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038); -+ ODM_delay_ms(1); -+ original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/ -+ -+#endif -+ -+ /*leave IQK mode*/ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); -+ /* PA/PAD controlled by 0x0*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, 0x800, 0x0); -+ -+ /* Check failed*/ -+ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); -+ reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); -+ reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]0xeac = 0x%x\n", reg_eac); -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]0xe94 = 0x%x, 0xe9c = 0x%x\n", reg_e94, -+ reg_e9c); -+ /*monitor image power before & after IQK*/ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n", -+ odm_get_bb_reg(dm, R_0xe90, MASKDWORD), -+ odm_get_bb_reg(dm, R_0xe98, MASKDWORD)); -+ -+ if (!(reg_eac & BIT(28)) && -+ (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && -+ (((reg_e9c & 0x03FF0000) >> 16) != 0x42)) -+ -+ result |= 0x01; -+ -+ return result; -+} -+ -+u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -+ phy_path_a_rx_iqk_8703b( -+ struct dm_struct *dm) -+{ -+ u32 reg_eac, reg_e94, reg_e9c, reg_ea4, u4tmp, tmp; -+ u8 result = 0x00, ktime; -+ u32 original_path, original_gnt; -+ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]RX IQK:Get TXIMR setting\n"); -+ /* 1 Get TX_XY */ -+ -+ /* IQK setting */ -+ odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, 0x01007c00); -+ odm_set_bb_reg(dm, REG_RX_IQK, MASKDWORD, 0x01004800); -+ -+ /* path-A IQK setting */ -+ odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x18008c1c); -+ odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x38008c1c); -+ odm_set_bb_reg(dm, REG_TX_IQK_TONE_B, MASKDWORD, 0x38008c1c); -+ odm_set_bb_reg(dm, REG_RX_IQK_TONE_B, MASKDWORD, 0x38008c1c); -+ -+ /* odm_set_bb_reg(dm, REG_TX_IQK_PI_A, MASKDWORD, 0x82160c1f); */ -+ odm_set_bb_reg(dm, REG_TX_IQK_PI_A, MASKDWORD, 0x8216000f); -+ odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28110000); -+ odm_set_bb_reg(dm, REG_TX_IQK_PI_B, MASKDWORD, 0x82110000); -+ odm_set_bb_reg(dm, REG_RX_IQK_PI_B, MASKDWORD, 0x28110000); -+ -+ /* LO calibration setting */ -+ odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a911); -+ -+ /* leave IQK mode */ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); -+ -+ /* modify RXIQK mode table */ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_RCK_OS, RFREGOFFSETMASK, 0x30000); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G1, RFREGOFFSETMASK, 0x00007); -+ /*IQK PA off*/ -+ /* odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G2, RFREGOFFSETMASK, 0xf7fb7); */ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G2, RFREGOFFSETMASK, 0x57db7); -+ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); -+ -+#if 1 -+ /*path setting*/ -+ /*Save Original path Owner, Original GNT*/ -+ original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038); -+ ODM_delay_ms(1); -+ original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/ -+ -+ /*set GNT_WL=1/GNT_BT=0 and path owner to WiFi for pause BT traffic*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x00007700); -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038); /*0x38[15:8] = 0x77*/ -+ odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1); /*0x70[26] =1 --> path Owner to WiFi*/ -+#endif -+ -+ /* One shot, path A LOK & IQK */ -+ odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); -+ odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); -+ -+ /* delay x ms */ -+ ODM_delay_ms(IQK_DELAY_TIME_8703B); -+ ktime = 0; -+ while ((odm_get_bb_reg(dm, R_0xe90, MASKDWORD) == 0) && ktime < 10) { -+ ODM_delay_ms(5); -+ ktime++; -+ } -+ -+#if 1 -+ /*path setting*/ -+ /*Restore GNT_WL/GNT_BT and path owner*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt); -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038); -+ odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path); -+ -+ original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038); -+ ODM_delay_ms(1); -+ original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/ -+ -+#endif -+ -+ /* leave IQK mode */ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); -+ -+ /* Check failed */ -+ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); -+ reg_e94 = odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD); -+ reg_e9c = odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD); -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]0xeac = 0x%x\n", reg_eac); -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]0xe94 = 0x%x, 0xe9c = 0x%x\n", reg_e94, -+ reg_e9c); -+ /*monitor image power before & after IQK*/ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n", -+ odm_get_bb_reg(dm, R_0xe90, MASKDWORD), -+ odm_get_bb_reg(dm, R_0xe98, MASKDWORD)); -+ -+ /* Allen 20131125 */ -+ tmp = (reg_e9c & 0x03FF0000) >> 16; -+ if ((tmp & 0x200) > 0) -+ tmp = 0x400 - tmp; -+ -+ if (!(reg_eac & BIT(28)) && -+ (((reg_e94 & 0x03FF0000) >> 16) != 0x142) && -+ (((reg_e9c & 0x03FF0000) >> 16) != 0x42)) -+ -+ result |= 0x01; -+ else /* if Tx not OK, ignore Rx */ -+ return result; -+ -+ u4tmp = 0x80007C00 | (reg_e94 & 0x3FF0000) | ((reg_e9c & 0x3FF0000) >> 16); -+ odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, u4tmp); -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]0xe40 = 0x%x u4tmp = 0x%x\n", -+ odm_get_bb_reg(dm, REG_TX_IQK, MASKDWORD), u4tmp); -+ -+ /* 1 RX IQK */ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]RX IQK\n"); -+ -+ /* IQK setting */ -+ odm_set_bb_reg(dm, REG_RX_IQK, MASKDWORD, 0x01004800); -+ -+ /* path-A IQK setting */ -+ odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x38008c1c); -+ odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x18008c1c); -+ odm_set_bb_reg(dm, REG_TX_IQK_TONE_B, MASKDWORD, 0x38008c1c); -+ odm_set_bb_reg(dm, REG_RX_IQK_TONE_B, MASKDWORD, 0x38008c1c); -+ -+ odm_set_bb_reg(dm, REG_TX_IQK_PI_A, MASKDWORD, 0x82110000); -+ odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28160c1f); -+ /* odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x2816001f);*/ -+ odm_set_bb_reg(dm, REG_TX_IQK_PI_B, MASKDWORD, 0x82110000); -+ odm_set_bb_reg(dm, REG_RX_IQK_PI_B, MASKDWORD, 0x28110000); -+ -+ /* LO calibration setting */ -+ odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x0046a8d1); -+ -+ /* modify RXIQK mode table */ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_RCK_OS, RFREGOFFSETMASK, 0x30000); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G1, RFREGOFFSETMASK, 0x00007); -+ /*PA off*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G2, RFREGOFFSETMASK, 0xf7d77); -+ -+ /*PA, PAD setting*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, 0x800, 0x1); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x55, 0x0007f, 0x5); -+ -+ /*enter IQK mode*/ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); -+ -+#if 1 -+ /*path setting*/ -+ /*Save Original path Owner, Original GNT*/ -+ original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038); -+ ODM_delay_ms(1); -+ original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/ -+ -+ /*set GNT_WL=1/GNT_BT=0 and path owner to WiFi for pause BT traffic*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, 0x00007700); -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc0020038); /*0x38[15:8] = 0x77*/ -+ odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, BIT(26), 0x1); /*0x70[26] =1 --> path Owner to WiFi*/ -+#endif -+ -+ /* One shot, path A LOK & IQK */ -+ odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); -+ odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); -+ -+ /* delay x ms */ -+ ODM_delay_ms(IQK_DELAY_TIME_8703B); -+ ktime = 0; -+ while ((odm_get_bb_reg(dm, R_0xe90, MASKDWORD) == 0) && ktime < 10) { -+ ODM_delay_ms(5); -+ ktime++; -+ } -+ -+#if 1 -+ /*path setting*/ -+ /*Restore GNT_WL/GNT_BT and path owner*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_WRITE_DATA, MASKDWORD, original_gnt); -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0xc00f0038); -+ odm_set_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, original_path); -+ -+ original_path = odm_get_mac_reg(dm, REG_LTECOEX_PATH_CONTROL, MASKDWORD); /*save 0x70*/ -+ odm_set_bb_reg(dm, REG_LTECOEX_CTRL, MASKDWORD, 0x800f0038); -+ ODM_delay_ms(1); -+ original_gnt = odm_get_bb_reg(dm, REG_LTECOEX_READ_DATA, MASKDWORD); /*save 0x38*/ -+ -+#endif -+ -+ /*leave IQK mode*/ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); -+ /* PA/PAD controlled by 0x0 */ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xdf, 0x800, 0x0); -+ -+ /* Check failed */ -+ reg_eac = odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD); -+ reg_ea4 = odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD); -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]0xeac = 0x%x\n", reg_eac); -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]0xea4 = 0x%x, 0xeac = 0x%x\n", reg_ea4, -+ reg_eac); -+ /* monitor image power before & after IQK */ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]0xea0(before IQK)= 0x%x, 0xea8(afer IQK) = 0x%x\n", -+ odm_get_bb_reg(dm, R_0xea0, MASKDWORD), -+ odm_get_bb_reg(dm, R_0xea8, MASKDWORD)); -+ -+ /* Allen 20131125 */ -+ tmp = (reg_eac & 0x03FF0000) >> 16; -+ if ((tmp & 0x200) > 0) -+ tmp = 0x400 - tmp; -+ -+ if (!(reg_eac & BIT(27)) && /*if Tx is OK, check whether Rx is OK*/ -+ (((reg_ea4 & 0x03FF0000) >> 16) != 0x132) && -+ (((reg_eac & 0x03FF0000) >> 16) != 0x36) && -+ (((reg_ea4 & 0x03FF0000) >> 16) < 0x11a) && -+ (((reg_ea4 & 0x03FF0000) >> 16) > 0xe6) && -+ tmp < 0x1a) -+ result |= 0x02; -+ else /* if Tx not OK, ignore Rx */ -+ RF_DBG(dm, DBG_RF_IQK, "path A Rx IQK fail!!\n"); -+ -+ return result; -+} -+ -+void _phy_path_a_fill_iqk_matrix8703b(struct dm_struct *dm, boolean is_iqk_ok, -+ s32 result[][8], u8 final_candidate, -+ boolean is_tx_only) -+{ -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ u32 oldval_0, X, TX0_A, reg, tmp0xc80, tmp0xc94, tmp0xc4c, tmp0xc14, tmp0xca0; -+ s32 Y, TX0_C; -+ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]path A IQ Calibration %s !\n", -+ (is_iqk_ok) ? "Success" : "Failed"); -+ -+ if (final_candidate == 0xFF) -+ return; -+ -+ else if (is_iqk_ok) { -+ oldval_0 = (odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD) >> 22) & 0x3FF; -+ -+ X = result[final_candidate][0]; -+ if ((X & 0x00000200) != 0) -+ X = X | 0xFFFFFC00; -+ TX0_A = (X * oldval_0) >> 8; -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]X = 0x%x, TX0_A = 0x%x, oldval_0 0x%x\n", X, TX0_A, -+ oldval_0); -+ tmp0xc80 = (odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD) & 0xfffffc00) | (TX0_A & 0x3ff); -+ tmp0xc4c = (((X * oldval_0 >> 7) & 0x1) << 31) | (odm_get_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD) & 0x7fffffff); -+ -+ Y = result[final_candidate][1]; -+ if ((Y & 0x00000200) != 0) -+ Y = Y | 0xFFFFFC00; -+ -+ /* 2 Tx IQC */ -+ TX0_C = (Y * oldval_0) >> 8; -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]Y = 0x%x, TX = 0x%x\n", Y, TX0_C); -+ -+ tmp0xc94 = (((TX0_C & 0x3C0) >> 6) << 28) | (odm_get_bb_reg(dm, REG_OFDM_0_XC_TX_AFE, MASKDWORD) & 0x0fffffff); -+ -+ cali_info->tx_iqc_8703b[idx_0xc94][KEY] = REG_OFDM_0_XC_TX_AFE; -+ cali_info->tx_iqc_8703b[idx_0xc94][VAL] = tmp0xc94; -+ -+ tmp0xc80 = (tmp0xc80 & 0xffc0ffff) | (TX0_C & 0x3F) << 16; -+ -+ cali_info->tx_iqc_8703b[idx_0xc80][KEY] = REG_OFDM_0_XA_TX_IQ_IMBALANCE; -+ cali_info->tx_iqc_8703b[idx_0xc80][VAL] = tmp0xc80; -+ -+ tmp0xc4c = (tmp0xc4c & 0xdfffffff) | (((Y * oldval_0 >> 7) & 0x1) << 29); -+ -+ cali_info->tx_iqc_8703b[idx_0xc4c][KEY] = REG_OFDM_0_ECCA_THRESHOLD; -+ cali_info->tx_iqc_8703b[idx_0xc4c][VAL] = tmp0xc4c; -+ -+ if (is_tx_only) { -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]%s only Tx OK\n", -+ __func__); -+ -+ /* <20130226, Kordan> Saving RxIQC, otherwise not initialized. */ -+ cali_info->rx_iqc_8703b[idx_0xca0][KEY] = REG_OFDM_0_RX_IQ_EXT_ANTA; -+ cali_info->rx_iqc_8703b[idx_0xca0][VAL] = 0xfffffff & odm_get_bb_reg(dm, REG_OFDM_0_RX_IQ_EXT_ANTA, MASKDWORD); -+ cali_info->rx_iqc_8703b[idx_0xc14][KEY] = REG_OFDM_0_XA_RX_IQ_IMBALANCE; -+ cali_info->rx_iqc_8703b[idx_0xc14][VAL] = 0x40000100; -+ return; -+ } -+ -+ reg = result[final_candidate][2]; -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (RTL_ABS(reg, 0x100) >= 16) -+ reg = 0x100; -+#endif -+ -+ /* 2 Rx IQC */ -+ tmp0xc14 = (0x40000100 & 0xfffffc00) | reg; -+ -+ reg = result[final_candidate][3] & 0x3F; -+ tmp0xc14 = (tmp0xc14 & 0xffff03ff) | (reg << 10); -+ -+ cali_info->rx_iqc_8703b[idx_0xc14][KEY] = REG_OFDM_0_XA_RX_IQ_IMBALANCE; -+ cali_info->rx_iqc_8703b[idx_0xc14][VAL] = tmp0xc14; -+ -+ reg = (result[final_candidate][3] >> 6) & 0xF; -+ tmp0xca0 = odm_get_bb_reg(dm, REG_OFDM_0_RX_IQ_EXT_ANTA, 0x0fffffff) | (reg << 28); -+ -+ cali_info->rx_iqc_8703b[idx_0xca0][KEY] = REG_OFDM_0_RX_IQ_EXT_ANTA; -+ cali_info->rx_iqc_8703b[idx_0xca0][VAL] = tmp0xca0; -+ } -+} -+ -+#if 0 -+void -+_phy_path_b_fill_iqk_matrix8703b( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ struct dm_struct *dm, -+#else -+ void *adapter, -+#endif -+ boolean is_iqk_ok, -+ s32 result[][8], -+ u8 final_candidate, -+ boolean is_tx_only /* do Tx only */ -+) -+{ -+ u32 oldval_1, X, TX1_A, reg, tmp0xc80, tmp0xc94, tmp0xc4c, tmp0xc14, tmp0xca0; -+ s32 Y, TX1_C; -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ struct dm_struct *dm = &hal_data->odmpriv; -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#endif -+#endif -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]path B IQ Calibration %s !\n", -+ (is_iqk_ok) ? "Success" : "Failed"); -+ -+ if (final_candidate == 0xFF) -+ return; -+ -+ else if (is_iqk_ok) { -+ oldval_1 = (odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD) >> 22) & 0x3FF; -+ -+ -+ X = result[final_candidate][4]; -+ if ((X & 0x00000200) != 0) -+ X = X | 0xFFFFFC00; -+ TX1_A = (X * oldval_1) >> 8; -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]X = 0x%x, TX1_A = 0x%x\n", X, -+ TX1_A); -+ -+ tmp0xc80 = (odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD) & 0xfffffc00) | (TX1_A & 0x3ff); -+ tmp0xc4c = (((X * oldval_1 >> 7) & 0x1) << 31) | (odm_get_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, MASKDWORD) & 0x7fffffff); -+ -+ Y = result[final_candidate][5]; -+ if ((Y & 0x00000200) != 0) -+ Y = Y | 0xFFFFFC00; -+ -+ TX1_C = (Y * oldval_1) >> 8; -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]Y = 0x%x, TX1_C = 0x%x\n", Y, -+ TX1_C); -+ -+ /*2 Tx IQC*/ -+ -+ tmp0xc94 = (((TX1_C & 0x3C0) >> 6) << 28) | (odm_get_bb_reg(dm, REG_OFDM_0_XC_TX_AFE, MASKDWORD) & 0x0fffffff); -+ -+ cali_info->tx_iqc_8703b[PATH_S0][idx_0xc94][KEY] = REG_OFDM_0_XC_TX_AFE; -+ cali_info->tx_iqc_8703b[PATH_S0][idx_0xc94][VAL] = tmp0xc94; -+ -+ tmp0xc80 = (tmp0xc80 & 0xffc0ffff) | (TX1_C & 0x3F) << 16; -+ cali_info->tx_iqc_8703b[PATH_S0][idx_0xc80][KEY] = REG_OFDM_0_XA_TX_IQ_IMBALANCE; -+ cali_info->tx_iqc_8703b[PATH_S0][idx_0xc80][VAL] = tmp0xc80; -+ -+ tmp0xc4c = (tmp0xc4c & 0xdfffffff) | (((Y * oldval_1 >> 7) & 0x1) << 29); -+ cali_info->tx_iqc_8703b[PATH_S0][idx_0xc4c][KEY] = REG_OFDM_0_ECCA_THRESHOLD; -+ cali_info->tx_iqc_8703b[PATH_S0][idx_0xc4c][VAL] = tmp0xc4c; -+ -+ if (is_tx_only) { -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]%s only Tx OK\n", -+ __func__); -+ -+ cali_info->rx_iqc_8703b[PATH_S0][idx_0xc14][KEY] = REG_OFDM_0_XA_RX_IQ_IMBALANCE; -+ cali_info->rx_iqc_8703b[PATH_S0][idx_0xc14][VAL] = 0x40000100; -+ cali_info->rx_iqc_8703b[PATH_S0][idx_0xca0][KEY] = REG_OFDM_0_RX_IQ_EXT_ANTA; -+ cali_info->rx_iqc_8703b[PATH_S0][idx_0xca0][VAL] = 0x0fffffff & odm_get_bb_reg(dm, REG_OFDM_0_RX_IQ_EXT_ANTA, MASKDWORD); -+ return; -+ } -+ -+ /* 2 Rx IQC */ -+ reg = result[final_candidate][6]; -+ tmp0xc14 = (0x40000100 & 0xfffffc00) | reg; -+ -+ reg = result[final_candidate][7] & 0x3F; -+ tmp0xc14 = (tmp0xc14 & 0xffff03ff) | (reg << 10); -+ -+ cali_info->rx_iqc_8703b[PATH_S0][idx_0xc14][KEY] = REG_OFDM_0_XA_RX_IQ_IMBALANCE; -+ cali_info->rx_iqc_8703b[PATH_S0][idx_0xc14][VAL] = tmp0xc14; -+ -+ reg = (result[final_candidate][7] >> 6) & 0xF; -+ tmp0xca0 = odm_get_bb_reg(dm, REG_OFDM_0_RX_IQ_EXT_ANTA, 0x0fffffff) | (reg << 28); -+ -+ cali_info->rx_iqc_8703b[PATH_S0][idx_0xca0][KEY] = REG_OFDM_0_RX_IQ_EXT_ANTA; -+ cali_info->rx_iqc_8703b[PATH_S0][idx_0xca0][VAL] = tmp0xca0; -+ } -+} -+#endif -+ -+boolean -+odm_set_iqc_by_rfpath_8703b(struct dm_struct *dm) -+{ -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ -+ if (cali_info->tx_iqc_8703b[idx_0xc80][VAL] != 0x0 && cali_info->rx_iqc_8703b[idx_0xc14][VAL] != 0x0) { -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]reload RF IQC!!!\n"); -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]0xc80 = 0x%x!!!\n", -+ cali_info->tx_iqc_8703b[idx_0xc80][VAL]); -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]0xc14 = 0x%x!!!\n", -+ cali_info->tx_iqc_8703b[idx_0xc14][VAL]); -+ -+ /* TX IQC */ -+ odm_set_bb_reg(dm, cali_info->tx_iqc_8703b[idx_0xc94][KEY], MASKH4BITS, (cali_info->tx_iqc_8703b[idx_0xc94][VAL] >> 28)); -+ odm_set_bb_reg(dm, cali_info->tx_iqc_8703b[idx_0xc80][KEY], MASKDWORD, cali_info->tx_iqc_8703b[idx_0xc80][VAL]); -+ odm_set_bb_reg(dm, cali_info->tx_iqc_8703b[idx_0xc4c][KEY], BIT(31), (cali_info->tx_iqc_8703b[idx_0xc4c][VAL] >> 31)); -+ odm_set_bb_reg(dm, cali_info->tx_iqc_8703b[idx_0xc4c][KEY], BIT(29), ((cali_info->tx_iqc_8703b[idx_0xc4c][VAL] & BIT(29)) >> 29)); -+ -+ /* RX IQC */ -+ odm_set_bb_reg(dm, cali_info->rx_iqc_8703b[idx_0xc14][KEY], MASKDWORD, cali_info->rx_iqc_8703b[idx_0xc14][VAL]); -+ odm_set_bb_reg(dm, cali_info->rx_iqc_8703b[idx_0xca0][KEY], MASKDWORD, cali_info->rx_iqc_8703b[idx_0xca0][VAL]); -+ return true; -+ -+ } else { -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]IQC value invalid!!!\n"); -+ return false; -+ } -+} -+ -+void _phy_save_adda_registers8703b(struct dm_struct *dm, u32 *adda_reg, -+ u32 *adda_backup, u32 register_num) -+{ -+ u32 i; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (odm_check_power_status(dm) == false) -+ return; -+#endif -+ -+ /* RF_DBG(dm,DBG_RF_IQK, "Save ADDA parameters.\n"); */ -+ for (i = 0; i < register_num; i++) -+ adda_backup[i] = odm_get_bb_reg(dm, adda_reg[i], MASKDWORD); -+} -+ -+void _phy_save_mac_registers8703b(struct dm_struct *dm, u32 *mac_reg, -+ u32 *mac_backup) -+{ -+ u32 i; -+ -+ /* RF_DBG(dm,DBG_RF_IQK, "Save MAC parameters.\n"); */ -+ for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) -+ mac_backup[i] = odm_read_1byte(dm, mac_reg[i]); -+ -+ mac_backup[i] = odm_read_4byte(dm, mac_reg[i]); -+} -+ -+void _phy_reload_adda_registers8703b(struct dm_struct *dm, u32 *adda_reg, -+ u32 *adda_backup, u32 regiester_num) -+{ -+ u32 i; -+ -+ /* RF_DBG(dm,DBG_RF_IQK, "Reload ADDA power saving parameters !\n"); */ -+ for (i = 0; i < regiester_num; i++) -+ odm_set_bb_reg(dm, adda_reg[i], MASKDWORD, adda_backup[i]); -+} -+ -+void _phy_reload_mac_registers8703b(struct dm_struct *dm, u32 *mac_reg, -+ u32 *mac_backup) -+{ -+ u32 i; -+ -+ /* RF_DBG(dm,DBG_RF_IQK, "Reload MAC parameters !\n"); */ -+ for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) -+ odm_write_1byte(dm, mac_reg[i], (u8)mac_backup[i]); -+ -+ odm_write_4byte(dm, mac_reg[i], mac_backup[i]); -+} -+ -+void _phy_path_adda_on8703b(struct dm_struct *dm, u32 *adda_reg, -+ boolean is_path_a_on) -+{ -+ u32 path_on; -+ u32 i; -+ -+ /* RF_DBG(dm,DBG_RF_IQK, "ADDA ON.\n"); */ -+ path_on = 0x03c00014; -+ for (i = 0; i < IQK_ADDA_REG_NUM; i++) -+ odm_set_bb_reg(dm, adda_reg[i], MASKDWORD, path_on); -+} -+ -+void _phy_mac_setting_calibration8703b(struct dm_struct *dm, u32 *mac_reg, -+ u32 *mac_backup) -+{ -+ u32 i = 0; -+ -+ /* RF_DBG(dm,DBG_RF_IQK, "MAC settings for Calibration.\n"); */ -+ odm_write_1byte(dm, mac_reg[i], 0x3F); -+ for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++) -+ odm_write_1byte(dm, mac_reg[i], (u8)(mac_backup[i] & (~BIT(3)))); -+ /*remove 0x40[5]setting for coex reason */ -+ /*odm_write_1byte(dm, mac_reg[i], (u8)(mac_backup[i] & (~BIT(5))));*/ -+} -+ -+boolean -+phy_simularity_compare_8703b(struct dm_struct *dm, s32 result[][8], u8 c1, -+ u8 c2, boolean is2t) -+{ -+ u32 i, j, diff, simularity_bit_map, bound = 0; -+ u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */ -+ boolean is_result = true; -+ -+ /* #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) */ -+ /* bool is2T = IS_92C_SERIAL( hal_data->version_id); -+ * #else */ -+ /* #endif */ -+ -+ s32 tmp1 = 0, tmp2 = 0; -+ -+ if (is2t) -+ bound = 8; -+ else -+ bound = 4; -+ -+ /* RF_DBG(dm,DBG_RF_IQK, "===> IQK:phy_simularity_compare_8192e c1 %d c2 %d!!!\n", c1, c2); */ -+ -+ simularity_bit_map = 0; -+ -+ for (i = 0; i < bound; i++) { -+ if (i == 1 || i == 3 || i == 5 || i == 7) { -+ if ((result[c1][i] & 0x00000200) != 0) -+ tmp1 = result[c1][i] | 0xFFFFFC00; -+ else -+ tmp1 = result[c1][i]; -+ -+ if ((result[c2][i] & 0x00000200) != 0) -+ tmp2 = result[c2][i] | 0xFFFFFC00; -+ else -+ tmp2 = result[c2][i]; -+ } else { -+ tmp1 = result[c1][i]; -+ tmp2 = result[c2][i]; -+ } -+ -+ diff = (tmp1 > tmp2) ? (tmp1 - tmp2) : (tmp2 - tmp1); -+ -+ if (diff > MAX_TOLERANCE) { -+ /* RF_DBG(dm,DBG_RF_IQK, "IQK:differnece overflow %d index %d compare1 0x%x compare2 0x%x!!!\n", diff, i, result[c1][i], result[c2][i]); */ -+ -+ if ((i == 2 || i == 6) && !simularity_bit_map) { -+ if (result[c1][i] + result[c1][i + 1] == 0) -+ final_candidate[(i / 4)] = c2; -+ else if (result[c2][i] + result[c2][i + 1] == 0) -+ final_candidate[(i / 4)] = c1; -+ else -+ simularity_bit_map = simularity_bit_map | (1 << i); -+ } else -+ simularity_bit_map = simularity_bit_map | (1 << i); -+ } -+ } -+ -+ /* RF_DBG(dm,DBG_RF_IQK, "IQK:phy_simularity_compare_8192e simularity_bit_map %x !!!\n", simularity_bit_map); */ -+ -+ if (simularity_bit_map == 0) { -+ for (i = 0; i < (bound / 4); i++) { -+ if (final_candidate[i] != 0xFF) { -+ for (j = i * 4; j < (i + 1) * 4 - 2; j++) -+ result[3][j] = result[final_candidate[i]][j]; -+ is_result = false; -+ } -+ } -+ return is_result; -+ } -+ -+ if (!(simularity_bit_map & 0x03)) { /*path A TX OK*/ -+ for (i = 0; i < 2; i++) -+ result[3][i] = result[c1][i]; -+ } -+ -+ if (!(simularity_bit_map & 0x0c)) { /*path A RX OK*/ -+ for (i = 2; i < 4; i++) -+ result[3][i] = result[c1][i]; -+ } -+ -+ if (!(simularity_bit_map & 0x30)) { /*path B TX OK*/ -+ for (i = 4; i < 6; i++) -+ result[3][i] = result[c1][i]; -+ } -+ -+ if (!(simularity_bit_map & 0xc0)) { /*path B RX OK*/ -+ for (i = 6; i < 8; i++) -+ result[3][i] = result[c1][i]; -+ } -+ -+ return false; -+} -+ -+void _phy_check_coex_status_8703b(struct dm_struct *dm, boolean beforek) -+{ -+ u8 u1b_tmp; -+ u16 count = 0; -+ u8 h2c_parameter; -+ -+#if MP_DRIVER != 1 -+ if (beforek) { -+ /* Set H2C cmd to inform FW (enable). */ -+ h2c_parameter = 1; -+ odm_fill_h2c_cmd(dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter); -+ /* Check 0x1e6 or 100ms timeout*/ -+ count = 0; -+ u1b_tmp = odm_read_1byte(dm, 0x1e6); -+ while (u1b_tmp != 0x1 && count < 5000) { -+ ODM_delay_us(20); -+ u1b_tmp = odm_read_1byte(dm, 0x1e6); -+ count++; -+ } -+ -+ if (count >= 5000) -+ RF_DBG(dm, DBG_RF_INIT, -+ "[IQK]Polling 0x1e6 to 1 for WiFi calibration H2C cmd FAIL! count(%d)", -+ count); -+ -+ /* Wait BT IQK finished. */ -+ /* polling 0x1e7[0]=1 or 600ms timeout */ -+ count = 0; -+ u1b_tmp = odm_read_1byte(dm, 0x1e7); -+ while ((!(u1b_tmp & BIT(0))) && count < 30000) { -+ ODM_delay_us(20); -+ u1b_tmp = odm_read_1byte(dm, 0x1e7); -+ count++; -+ } -+ -+ if (count >= 30000) -+ RF_DBG(dm, DBG_RF_INIT, -+ "[IQK]Waiting BT IQK finish time out! count(%d)", -+ count); -+ } else { -+ /* Set H2C cmd to inform FW (disable). */ -+ h2c_parameter = 0; -+ odm_fill_h2c_cmd(dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter); -+ /* Check 0x1e6 or 100ms timeout */ -+ count = 0; -+ u1b_tmp = odm_read_1byte(dm, 0x1e6); -+ while (u1b_tmp != 0 && count < 5000) { -+ ODM_delay_us(20); -+ u1b_tmp = odm_read_1byte(dm, 0x1e6); -+ count++; -+ } -+ -+ if (count >= 5000) -+ RF_DBG(dm, DBG_RF_INIT, -+ "[IQK]Polling 0x1e6 to 0 for WiFi calibration H2C cmd FAIL! count(%d)", -+ count); -+ } -+#endif -+} -+ -+void _phy_iq_calibrate_8703b(struct dm_struct *dm, s32 result[][8], u8 t) -+{ -+ u32 i; -+ u8 path_aok = 0x0, path_bok = 0x0; -+ u8 tmp0xc50 = (u8)odm_get_bb_reg(dm, R_0xc50, MASKBYTE0); -+ //u8 tmp0xc58 = (u8)odm_get_bb_reg(dm, R_0xc58, MASKBYTE0); -+ u32 ADDA_REG[IQK_ADDA_REG_NUM] = { -+ REG_FPGA0_XCD_SWITCH_CONTROL, REG_BLUE_TOOTH, -+ REG_RX_WAIT_CCA, REG_TX_CCK_RFON, -+ REG_TX_CCK_BBON, REG_TX_OFDM_RFON, -+ REG_TX_OFDM_BBON, REG_TX_TO_RX, -+ REG_TX_TO_TX, REG_RX_CCK, -+ REG_RX_OFDM, REG_RX_WAIT_RIFS, -+ REG_RX_TO_RX, REG_STANDBY, -+ REG_SLEEP, REG_PMPD_ANAEN}; -+ u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = { -+ REG_TXPAUSE, REG_BCN_CTRL, -+ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; -+ -+ /*since 92C & 92D have the different define in IQK_BB_REG*/ -+ u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { -+ REG_OFDM_0_TRX_PATH_ENABLE, REG_OFDM_0_TR_MUX_PAR, -+ REG_FPGA0_XCD_RF_INTERFACE_SW, REG_CONFIG_ANT_A, REG_CONFIG_ANT_B, -+ REG_FPGA0_XAB_RF_INTERFACE_SW, REG_FPGA0_XA_RF_INTERFACE_OE, -+ REG_FPGA0_XB_RF_INTERFACE_OE, REG_CCK_0_AFE_SETTING}; -+ u32 retry_count; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ retry_count = 2; -+#ifdef MP_TEST -+ if (*(dm->mp_mode)) -+ retry_count = 9; -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+#if MP_DRIVER -+ retry_count = 1; -+#else -+ retry_count = 2; -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ if (*(dm->mp_mode)) -+ retry_count = 1; -+ else -+ retry_count = 2; -+#endif -+ -+ /* Note: IQ calibration must be performed after loading*/ -+ /*PHY_REG.txt , and radio_a, radio_b.txt*/ -+ -+ /* u32 bbvalue; */ -+ -+ if (t == 0) { -+ /* bbvalue = odm_get_bb_reg(dm, REG_FPGA0_RFMOD, MASKDWORD); -+ * RT_DISP(FINIT, INIT_IQK, ("_phy_iq_calibrate_8188e()==>0x%08x\n",bbvalue)); */ -+ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]IQ Calibration for %d times\n", t); -+ -+ /* Save ADDA parameters, turn path A ADDA on*/ -+ _phy_save_adda_registers8703b(dm, ADDA_REG, dm->rf_calibrate_info.ADDA_backup, IQK_ADDA_REG_NUM); -+ _phy_save_mac_registers8703b(dm, IQK_MAC_REG, dm->rf_calibrate_info.IQK_MAC_backup); -+ _phy_save_adda_registers8703b(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup, IQK_BB_REG_NUM); -+ } -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]IQ Calibration for %d times\n", t); -+ -+ _phy_path_adda_on8703b(dm, ADDA_REG, true); -+ /* MAC settings */ -+ _phy_mac_setting_calibration8703b(dm, IQK_MAC_REG, dm->rf_calibrate_info.IQK_MAC_backup); -+ /* BB setting */ -+ /*odm_set_bb_reg(dm, REG_FPGA0_RFMOD, BIT24, 0x00);*/ -+ odm_set_bb_reg(dm, REG_CCK_0_AFE_SETTING, 0x0f000000, 0xf); -+ odm_set_bb_reg(dm, REG_OFDM_0_TRX_PATH_ENABLE, MASKDWORD, 0x03a05600); -+ odm_set_bb_reg(dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, 0x000800e4); -+ odm_set_bb_reg(dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, 0x25204000); -+ -+/* path A TX IQK */ -+#if 1 -+ -+ for (i = 0; i < retry_count; i++) { -+ path_aok = phy_path_a_iqk_8703b(dm); -+ if (path_aok == 0x01) { -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]Tx IQK Success!!\n"); -+ result[t][0] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD) & 0x3FF0000) >> 16; -+ result[t][1] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD) & 0x3FF0000) >> 16; -+ break; -+ } -+ } -+#endif -+ -+/* path A RXIQK */ -+#if 1 -+ -+ for (i = 0; i < retry_count; i++) { -+ path_aok = phy_path_a_rx_iqk_8703b(dm); -+ if (path_aok == 0x03) { -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]Rx IQK Success!!\n"); -+ /* result[t][0] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD)&0x3FF0000)>>16; -+ * result[t][1] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD)&0x3FF0000)>>16; */ -+ result[t][2] = (odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16; -+ result[t][3] = (odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16; -+ break; -+ } -+ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]Rx IQK Fail!!\n"); -+ } -+ -+ if (0x00 == path_aok) -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]IQK failed!!\n"); -+ -+#endif -+ -+/* path B TX IQK */ -+#if 0 -+ -+#if MP_DRIVER != 1 -+ if ((*dm->is_1_antenna == false) || ((*dm->is_1_antenna == true) && (*dm->rf_default_path == 1)) -+ || dm->support_interface == ODM_ITRF_USB) -+#endif -+ { -+ for (i = 0 ; i < retry_count ; i++) { -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ path_bok = phy_path_b_iqk_8703b(adapter); -+#else -+ path_bok = phy_path_b_iqk_8703b(dm); -+#endif -+ /* if(path_bok == 0x03){ */ -+ if (path_bok == 0x01) { -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]S0 Tx IQK Success!!\n"); -+ result[t][4] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD) & 0x3FF0000) >> 16; -+ result[t][5] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD) & 0x3FF0000) >> 16; -+ break; -+ } -+ } -+#endif -+ -+/* path B RX IQK */ -+#if 0 -+ -+ for (i = 0 ; i < retry_count ; i++) { -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ path_bok = phy_path_b_rx_iqk_8703b(adapter); -+#else -+ path_bok = phy_path_b_rx_iqk_8703b(dm); -+#endif -+ if (path_bok == 0x03) { -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]S0 Rx IQK Success!!\n"); -+ /* result[t][0] = (odm_get_bb_reg(dm, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD)&0x3FF0000)>>16; -+ * result[t][1] = (odm_get_bb_reg(dm, REG_TX_POWER_AFTER_IQK_A, MASKDWORD)&0x3FF0000)>>16; */ -+ result[t][6] = (odm_get_bb_reg(dm, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16; -+ result[t][7] = (odm_get_bb_reg(dm, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16; -+ break; -+ -+ } else -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]S0 Rx IQK Fail!!\n"); -+ } -+ -+ -+ -+ if (0x00 == path_bok) -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]S0 IQK failed!!\n"); -+ } -+#endif -+ -+ /* Back to BB mode, load original value */ -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]IQK:Back to BB mode, load original value!\n"); -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); -+ -+ if (t != 0) { -+ /* Reload ADDA power saving parameters*/ -+ _phy_reload_adda_registers8703b(dm, ADDA_REG, dm->rf_calibrate_info.ADDA_backup, IQK_ADDA_REG_NUM); -+ /* Reload MAC parameters*/ -+ _phy_reload_mac_registers8703b(dm, IQK_MAC_REG, dm->rf_calibrate_info.IQK_MAC_backup); -+ _phy_reload_adda_registers8703b(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup, IQK_BB_REG_NUM); -+ /* Allen initial gain 0xc50 */ -+ /* Restore RX initial gain */ -+ odm_set_bb_reg(dm, R_0xc50, MASKBYTE0, 0x50); -+ odm_set_bb_reg(dm, R_0xc50, MASKBYTE0, tmp0xc50); -+ /* load 0xe30 IQC default value */ -+ odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x01008c00); -+ odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x01008c00); -+ } -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]%s <==\n", __func__); -+} -+ -+void _phy_lc_calibrate_8703b(struct dm_struct *dm, boolean is2T) -+{ -+ u8 tmp_reg; -+ u32 rf_bmode = 0, lc_cal, cnt; -+ -+ /*Check continuous TX and Packet TX*/ -+ tmp_reg = odm_read_1byte(dm, 0xd03); -+ -+ if ((tmp_reg & 0x70) != 0) /*Deal with contisuous TX case*/ -+ odm_write_1byte(dm, 0xd03, tmp_reg & 0x8F); /*disable all continuous TX*/ -+ else /* Deal with Packet TX case*/ -+ odm_write_1byte(dm, REG_TXPAUSE, 0xFF); /* block all queues*/ -+ -+ /*backup RF0x18*/ -+ lc_cal = odm_get_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK); -+ -+ /*Start LCK*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal | 0x08000); -+ -+ for (cnt = 0; cnt < 100; cnt++) { -+ if (odm_get_rf_reg(dm, RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1) -+ break; -+ -+ ODM_delay_ms(10); -+ } -+ if (cnt == 100) -+ RF_DBG(dm, DBG_RF_LCK, "LCK time out\n"); -+ -+ /*Recover channel number*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal); -+ -+ /*Restore original situation*/ -+ if ((tmp_reg & 0x70) != 0) { -+ /*Deal with contisuous TX case*/ -+ odm_write_1byte(dm, 0xd03, tmp_reg); -+ } else { -+ /* Deal with Packet TX case*/ -+ odm_write_1byte(dm, REG_TXPAUSE, 0x00); -+ } -+} -+ -+/* IQK version: 0x5 20171109 */ -+/* 1. add coex. related setting*/ -+ -+void phy_iq_calibrate_8703b(void *dm_void, boolean is_recovery) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ s32 result[4][8]; /* last is final result */ -+ u8 i, final_candidate, indexforchannel; -+ boolean is_patha_ok, is_pathb_ok; -+ s32 rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc, reg_tmp = 0; -+ boolean is12simular, is13simular, is23simular; -+ u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { -+ REG_OFDM_0_XA_RX_IQ_IMBALANCE, REG_OFDM_0_XB_RX_IQ_IMBALANCE, -+ REG_OFDM_0_ECCA_THRESHOLD, REG_OFDM_0_AGC_RSSI_TABLE, -+ REG_OFDM_0_XA_TX_IQ_IMBALANCE, REG_OFDM_0_XB_TX_IQ_IMBALANCE, -+ REG_OFDM_0_XC_TX_AFE, REG_OFDM_0_XD_TX_AFE, -+ REG_OFDM_0_RX_IQ_EXT_ANTA}; -+ boolean is_reload_iqk = false; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP)) -+ if (is_recovery) -+#else /* for ODM_WIN */ -+ if (is_recovery && !dm->is_in_hct_test) /* YJ,add for PowerTest,120405 */ -+#endif -+ { -+ RF_DBG(dm, DBG_RF_INIT, "[IQK]%s: Return due to is_recovery!\n", -+ __func__); -+ _phy_reload_adda_registers8703b(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup_recover, 9); -+ return; -+ } -+ -+ if (*dm->mp_mode == false) { -+#if MP_DRIVER != 1 -+ /* check if IQK had been done before!! */ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK] 0xc80 = 0x%x\n", -+ cali_info->tx_iqc_8703b[idx_0xc80][VAL]); -+ if (odm_set_iqc_by_rfpath_8703b(dm)) { -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]IQK value is reloaded!!!\n"); -+ is_reload_iqk = true; -+ } -+ if (is_reload_iqk) -+ return; -+#endif -+ } -+ /*Check & wait if BT is doing IQK*/ -+ if (*(dm->mp_mode) == false) -+ _phy_check_coex_status_8703b(dm, true); -+ -+ /* IQK start!!!!!!!!!! */ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]IQK:Start!!!\n"); -+ for (i = 0; i < 8; i++) { -+ result[0][i] = 0; -+ result[1][i] = 0; -+ result[2][i] = 0; -+ result[3][i] = 0; -+ } -+ final_candidate = 0xff; -+ is_patha_ok = false; -+ is_pathb_ok = false; -+ is12simular = false; -+ is23simular = false; -+ is13simular = false; -+ -+ for (i = 0; i < 3; i++) { -+ _phy_iq_calibrate_8703b(dm, result, i); -+ if (i == 1) { -+ is12simular = phy_simularity_compare_8703b(dm, result, 0, 1, true); -+ if (is12simular) { -+ final_candidate = 0; -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]IQK: is12simular final_candidate is %x\n", -+ final_candidate); -+ break; -+ } -+ } -+ -+ if (i == 2) { -+ is13simular = phy_simularity_compare_8703b(dm, result, 0, 2, true); -+ if (is13simular) { -+ final_candidate = 0; -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]IQK: is13simular final_candidate is %x\n", -+ final_candidate); -+ -+ break; -+ } -+ is23simular = phy_simularity_compare_8703b(dm, result, 1, 2, true); -+ if (is23simular) { -+ final_candidate = 1; -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]IQK: is23simular final_candidate is %x\n", -+ final_candidate); -+ } else { -+ for (i = 0; i < 8; i++) -+ reg_tmp += result[3][i]; -+ -+ if (reg_tmp != 0) -+ final_candidate = 3; -+ else -+ final_candidate = 0xFF; -+ } -+ } -+ } -+ /* RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate\n"));*/ -+ -+ for (i = 0; i < 4; i++) { -+ rege94 = result[i][0]; -+ rege9c = result[i][1]; -+ regea4 = result[i][2]; -+ regeac = result[i][3]; -+ regeb4 = result[i][4]; -+ regebc = result[i][5]; -+ regec4 = result[i][6]; -+ regecc = result[i][7]; -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", -+ rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, -+ regecc); -+ } -+ -+ if (final_candidate != 0xff) { -+ dm->rf_calibrate_info.rege94 = rege94 = result[final_candidate][0]; -+ dm->rf_calibrate_info.rege9c = rege9c = result[final_candidate][1]; -+ regea4 = result[final_candidate][2]; -+ regeac = result[final_candidate][3]; -+ dm->rf_calibrate_info.regeb4 = regeb4 = result[final_candidate][4]; -+ dm->rf_calibrate_info.regebc = regebc = result[final_candidate][5]; -+ regec4 = result[final_candidate][6]; -+ regecc = result[final_candidate][7]; -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]IQK: final_candidate is %x\n", -+ final_candidate); -+ RF_DBG(dm, DBG_RF_IQK, -+ "[IQK]IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", -+ rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, -+ regecc); -+ is_patha_ok = is_pathb_ok = true; -+ } else { -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]IQK: FAIL use default value\n"); -+ dm->rf_calibrate_info.rege94 = dm->rf_calibrate_info.regeb4 = 0x100; /* X default value */ -+ dm->rf_calibrate_info.rege9c = dm->rf_calibrate_info.regebc = 0x0; /* Y default value */ -+ } -+ -+ /* fill IQK matrix */ -+ if (rege94 != 0) -+ _phy_path_a_fill_iqk_matrix8703b(dm, is_patha_ok, result, final_candidate, (regea4 == 0)); -+/* if (regeb4 != 0) -+ * _phy_path_b_fill_iqk_matrix8703b(adapter, is_pathb_ok, result, final_candidate, (regec4 == 0)); */ -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ indexforchannel = odm_get_right_chnl_place_for_iqk(*dm->channel); -+#else -+ indexforchannel = 0; -+#endif -+ -+ /* To Fix BSOD when final_candidate is 0xff -+ * by sherry 20120321 */ -+ if (final_candidate < 4) { -+ for (i = 0; i < iqk_matrix_reg_num; i++) -+ dm->rf_calibrate_info.iqk_matrix_reg_setting[indexforchannel].value[0][i] = result[final_candidate][i]; -+ dm->rf_calibrate_info.iqk_matrix_reg_setting[indexforchannel].is_iqk_done = true; -+ } -+ /* RT_DISP(FINIT, INIT_IQK, ("\nIQK OK indexforchannel %d.\n", indexforchannel)); */ -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]\nIQK OK indexforchannel %d.\n", -+ indexforchannel); -+ _phy_save_adda_registers8703b(dm, IQK_BB_REG_92C, dm->rf_calibrate_info.IQK_BB_backup_recover, IQK_BB_REG_NUM); -+ /* fill IQK register */ -+ odm_set_iqc_by_rfpath_8703b(dm); -+ if (*dm->mp_mode == false) { -+ _phy_check_coex_status_8703b(dm, false); -+ } -+ RF_DBG(dm, DBG_RF_IQK, "[IQK]IQK finished\n"); -+} -+ -+void phy_lc_calibrate_8703b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ _phy_lc_calibrate_8703b(dm, false); -+} -+ -+void _phy_set_rf_path_switch_8703b( -+#if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE)) -+ struct dm_struct *dm, -+#else -+ void *adapter, -+#endif -+ boolean is_main, boolean is2T) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#endif -+ -+ if (is_main) { /*Set WIFI S1*/ -+ odm_set_bb_reg(dm, R_0x7c4, MASKLWORD, 0x7703); -+ odm_set_bb_reg(dm, R_0x7c0, MASKDWORD, 0xC00F0038); -+ } else { /*Set BT S0*/ -+ odm_set_bb_reg(dm, R_0x7c4, MASKLWORD, 0xCC03); -+ odm_set_bb_reg(dm, R_0x7c0, MASKDWORD, 0xC00F0038); -+ } -+} -+ -+void phy_set_rf_path_switch_8703b( -+#if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE)) -+ struct dm_struct *dm, -+#else -+ void *adapter, -+#endif -+ boolean is_main) -+{ -+#if DISABLE_BB_RF -+ return; -+#endif -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ _phy_set_rf_path_switch_8703b(dm, is_main, true); -+#else -+ _phy_set_rf_path_switch_8703b(adapter, is_main, true); -+#endif -+#endif -+} -+ -+/*return value true => WIFI(S1); false => BT(S0)*/ -+boolean _phy_query_rf_path_switch_8703b( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ struct dm_struct *dm, -+#else -+ void *adapter, -+#endif -+ boolean is2T) -+{ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ struct dm_struct *dm = &hal_data->odmpriv; -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#endif -+#endif -+ -+ if (odm_get_bb_reg(dm, R_0x7c4, MASKLWORD) == 0x7703) -+ return true; -+ else -+ return false; -+} -+ -+/*return value true => WIFI(S1); false => BT(S0)*/ -+boolean phy_query_rf_path_switch_8703b( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ struct dm_struct *dm -+#else -+ void *adapter -+#endif -+ ) -+{ -+#if DISABLE_BB_RF -+ return true; -+#endif -+ -+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -+ return _phy_query_rf_path_switch_8703b(adapter, false); -+#else -+ return _phy_query_rf_path_switch_8703b(dm, false); -+#endif -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/halrf/rtl8703b/halrf_8703b.h b/drivers/staging/rtl8723cs/hal/phydm/halrf/rtl8703b/halrf_8703b.h -new file mode 100644 -index 000000000000..826bd917b383 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/halrf/rtl8703b/halrf_8703b.h -@@ -0,0 +1,89 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALRF_8703B_H__ -+#define __HALRF_8703B_H__ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define index_mapping_NUM_8703B 15 -+#define AVG_THERMAL_NUM_8703B 4 -+#define RF_T_METER_8703B 0x42 -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+#if RT_PLATFORM == PLATFORM_MACOSX -+#include "halphyrf_win.h" -+#else -+#include "../halrf/halphyrf_win.h" -+#endif -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+#include "../halphyrf_ce.h" -+#endif -+ -+void configure_txpower_track_8703b(struct txpwrtrack_cfg *config); -+ -+void do_iqk_8703b(void *dm_void, u8 delta_thermal_index, u8 thermal_value, -+ u8 threshold); -+ -+void odm_tx_pwr_track_set_pwr_8703b(void *dm_void, enum pwrtrack_method method, -+ u8 rf_path, u8 channel_mapped_index); -+ -+void odm_txxtaltrack_set_xtal_8703b(void *dm_void); -+ -+/* 1 7. IQK */ -+ -+void phy_iq_calibrate_8703b(void *dm_void, boolean is_recovery); -+ -+boolean -+odm_set_iqc_by_rfpath_8703b(struct dm_struct *dm); -+ -+/* -+ * LC calibrate -+ */ -+void phy_lc_calibrate_8703b(void *dm_void); -+ -+#if 0 -+/* -+ * AP calibrate -+ * */ -+void -+phy_ap_calibrate_8703b( -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ struct dm_struct *dm, -+#else -+ void *adapter, -+#endif -+ s8 delta); -+void -+phy_digital_predistortion_8703b(void *adapter); -+#endif -+ -+void _phy_save_adda_registers_8703b( -+ struct dm_struct *dm, -+ u32 *adda_reg, -+ u32 *adda_backup, -+ u32 register_num); -+ -+void _phy_path_adda_on_8703b( -+ struct dm_struct *dm, -+ u32 *adda_reg, -+ boolean is_path_a_on, -+ boolean is2T); -+ -+void _phy_mac_setting_calibration_8703b( -+ struct dm_struct *dm, -+ u32 *mac_reg, -+ u32 *mac_backup); -+ -+#endif /*#ifndef __HALRF_8703B_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/mp_precomp.h b/drivers/staging/rtl8723cs/hal/phydm/mp_precomp.h -new file mode 100644 -index 000000000000..897adc13ffca ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/mp_precomp.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm.c b/drivers/staging/rtl8723cs/hal/phydm/phydm.c -new file mode 100644 -index 000000000000..0f7e7aa9291e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm.c -@@ -0,0 +1,3820 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+const u16 phy_rate_table[] = { -+ /*@20M*/ -+ 1, 2, 5, 11, -+ 6, 9, 12, 18, 24, 36, 48, 54, -+ 6, 13, 19, 26, 39, 52, 58, 65, /*@MCS0~7*/ -+ 13, 26, 39, 52, 78, 104, 117, 130, /*@MCS8~15*/ -+ 19, 39, 58, 78, 117, 156, 175, 195, /*@MCS16~23*/ -+ 26, 52, 78, 104, 156, 208, 234, 260, /*@MCS24~31*/ -+ 6, 13, 19, 26, 39, 52, 58, 65, 78, 90, /*@1ss MCS0~9*/ -+ 13, 26, 39, 52, 78, 104, 117, 130, 156, 180, /*@2ss MCS0~9*/ -+ 19, 39, 58, 78, 117, 156, 175, 195, 234, 260, /*@3ss MCS0~9*/ -+ 26, 52, 78, 104, 156, 208, 234, 260, 312, 360 /*@4ss MCS0~9*/ -+}; -+ -+void phydm_traffic_load_decision(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 shift = 0; -+ -+ /*@---TP & Trafic-load calculation---*/ -+ -+ if (dm->last_tx_ok_cnt > *dm->num_tx_bytes_unicast) -+ dm->last_tx_ok_cnt = *dm->num_tx_bytes_unicast; -+ -+ if (dm->last_rx_ok_cnt > *dm->num_rx_bytes_unicast) -+ dm->last_rx_ok_cnt = *dm->num_rx_bytes_unicast; -+ -+ dm->cur_tx_ok_cnt = *dm->num_tx_bytes_unicast - dm->last_tx_ok_cnt; -+ dm->cur_rx_ok_cnt = *dm->num_rx_bytes_unicast - dm->last_rx_ok_cnt; -+ dm->last_tx_ok_cnt = *dm->num_tx_bytes_unicast; -+ dm->last_rx_ok_cnt = *dm->num_rx_bytes_unicast; -+ -+ /*@AP: <<3(8bit), >>20(10^6,M), >>0(1sec)*/ -+ shift = 17 + (PHYDM_WATCH_DOG_PERIOD - 1); -+ /*@WIN&CE: <<3(8bit), >>20(10^6,M), >>1(2sec)*/ -+ -+ dm->tx_tp = (dm->tx_tp >> 1) + (u32)((dm->cur_tx_ok_cnt >> shift) >> 1); -+ dm->rx_tp = (dm->rx_tp >> 1) + (u32)((dm->cur_rx_ok_cnt >> shift) >> 1); -+ -+ dm->total_tp = dm->tx_tp + dm->rx_tp; -+ -+ /*@[Calculate TX/RX state]*/ -+ if (dm->tx_tp > (dm->rx_tp << 1)) -+ dm->txrx_state_all = TX_STATE; -+ else if (dm->rx_tp > (dm->tx_tp << 1)) -+ dm->txrx_state_all = RX_STATE; -+ else -+ dm->txrx_state_all = BI_DIRECTION_STATE; -+ -+ /*@[Traffic load decision]*/ -+ dm->pre_traffic_load = dm->traffic_load; -+ -+ if (dm->cur_tx_ok_cnt > 1875000 || dm->cur_rx_ok_cnt > 1875000) { -+ /* @( 1.875M * 8bit ) / 2sec= 7.5M bits /sec )*/ -+ dm->traffic_load = TRAFFIC_HIGH; -+ } else if (dm->cur_tx_ok_cnt > 500000 || dm->cur_rx_ok_cnt > 500000) { -+ /*@( 0.5M * 8bit ) / 2sec = 2M bits /sec )*/ -+ dm->traffic_load = TRAFFIC_MID; -+ } else if (dm->cur_tx_ok_cnt > 100000 || dm->cur_rx_ok_cnt > 100000) { -+ /*@( 0.1M * 8bit ) / 2sec = 0.4M bits /sec )*/ -+ dm->traffic_load = TRAFFIC_LOW; -+ } else if (dm->cur_tx_ok_cnt > 25000 || dm->cur_rx_ok_cnt > 25000) { -+ /*@( 0.025M * 8bit ) / 2sec = 0.1M bits /sec )*/ -+ dm->traffic_load = TRAFFIC_ULTRA_LOW; -+ } else { -+ dm->traffic_load = TRAFFIC_NO_TP; -+ } -+ -+ /*@[Calculate consecutive idlel time]*/ -+ if (dm->traffic_load == 0) -+ dm->consecutive_idlel_time += PHYDM_WATCH_DOG_PERIOD; -+ else -+ dm->consecutive_idlel_time = 0; -+ -+ #if 0 -+ PHYDM_DBG(dm, DBG_COMMON_FLOW, -+ "cur_tx_ok_cnt = %d, cur_rx_ok_cnt = %d, last_tx_ok_cnt = %d, last_rx_ok_cnt = %d\n", -+ dm->cur_tx_ok_cnt, dm->cur_rx_ok_cnt, dm->last_tx_ok_cnt, -+ dm->last_rx_ok_cnt); -+ -+ PHYDM_DBG(dm, DBG_COMMON_FLOW, "tx_tp = %d, rx_tp = %d\n", dm->tx_tp, -+ dm->rx_tp); -+ #endif -+} -+ -+void phydm_cck_new_agc_chk(struct dm_struct *dm) -+{ -+ u32 new_agc_addr = 0x0; -+ -+ dm->cck_new_agc = false; -+#if (RTL8723D_SUPPORT || RTL8822B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8197F_SUPPORT || RTL8710B_SUPPORT || RTL8192F_SUPPORT ||\ -+ RTL8195B_SUPPORT || RTL8198F_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8721D_SUPPORT || RTL8710C_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8723D | ODM_RTL8822B | ODM_RTL8821C | -+ ODM_RTL8197F | ODM_RTL8710B | ODM_RTL8192F | ODM_RTL8195B | -+ ODM_RTL8721D | ODM_RTL8710C)) { -+ new_agc_addr = R_0xa9c; -+ } else if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8822C | -+ ODM_RTL8814B | ODM_RTL8197G)) { -+ new_agc_addr = R_0x1a9c; -+ } -+ -+ /*@1: new agc 0: old agc*/ -+ dm->cck_new_agc = (boolean)odm_get_bb_reg(dm, new_agc_addr, BIT(17)); -+#endif -+#if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8723F)) -+ dm->cck_new_agc = true; -+#endif -+} -+ -+/*select 3 or 4 bit LNA */ -+void phydm_cck_lna_bit_num_chk(struct dm_struct *dm) -+{ -+ boolean report_type = 0; -+ #if (RTL8192E_SUPPORT) -+ u32 value_824, value_82c; -+ #endif -+ -+ #if (RTL8192E_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8192E)) { -+ /* @0x824[9] = 0x82C[9] = 0xA80[7] those registers setting -+ * should be equal or CCK RSSI report may be incorrect -+ */ -+ value_824 = odm_get_bb_reg(dm, R_0x824, BIT(9)); -+ value_82c = odm_get_bb_reg(dm, R_0x82c, BIT(9)); -+ -+ if (value_824 != value_82c) -+ odm_set_bb_reg(dm, R_0x82c, BIT(9), value_824); -+ odm_set_bb_reg(dm, R_0xa80, BIT(7), value_824); -+ report_type = (boolean)value_824; -+ } -+ #endif -+ -+ #if (RTL8703B_SUPPORT || RTL8723D_SUPPORT || RTL8710B_SUPPORT) -+ if (dm->support_ic_type & -+ (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) { -+ report_type = (boolean)odm_get_bb_reg(dm, R_0x950, BIT(11)); -+ -+ if (report_type != 1) -+ pr_debug("[Warning] CCK should be 4bit LNA\n"); -+ } -+ #endif -+ -+ #if (RTL8821C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8821C) { -+ if (dm->default_rf_set_8821c == SWITCH_TO_BTG) -+ report_type = 1; -+ } -+ #endif -+ -+ dm->cck_agc_report_type = report_type; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "cck_agc_report_type=((%d))\n", -+ dm->cck_agc_report_type); -+} -+ -+void phydm_init_cck_setting(struct dm_struct *dm) -+{ -+ u32 reg_tmp = 0; -+ u32 mask_tmp = 0; -+ -+ phydm_cck_new_agc_chk(dm); -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ return; -+ -+ reg_tmp = ODM_REG(CCK_RPT_FORMAT, dm); -+ mask_tmp = ODM_BIT(CCK_RPT_FORMAT, dm); -+ dm->is_cck_high_power = (boolean)odm_get_bb_reg(dm, reg_tmp, mask_tmp); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "ext_lna_gain=((%d))\n", dm->ext_lna_gain); -+ -+ phydm_config_cck_rx_antenna_init(dm); -+ -+ if (dm->support_ic_type & ODM_RTL8192F) -+ phydm_config_cck_rx_path(dm, BB_PATH_AB); -+ else if (dm->valid_path_set == BB_PATH_A) -+ phydm_config_cck_rx_path(dm, BB_PATH_A); -+ else if (dm->valid_path_set == BB_PATH_B) -+ phydm_config_cck_rx_path(dm, BB_PATH_B); -+ -+ phydm_cck_lna_bit_num_chk(dm); -+ phydm_get_cck_rssi_table_from_reg(dm); -+} -+ -+#ifdef CONFIG_RFE_BY_HW_INFO -+void phydm_init_hw_info_by_rfe(struct dm_struct *dm) -+{ -+ #if (RTL8821C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8821C) -+ phydm_init_hw_info_by_rfe_type_8821c(dm); -+ #endif -+ #if (RTL8197F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197F) -+ phydm_init_hw_info_by_rfe_type_8197f(dm); -+ #endif -+ #if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197G) -+ phydm_init_hw_info_by_rfe_type_8197g(dm); -+ #endif -+} -+#endif -+ -+void phydm_common_info_self_init(struct dm_struct *dm) -+{ -+ u32 reg_tmp = 0; -+ u32 mask_tmp = 0; -+ -+ dm->run_in_drv_fw = RUN_IN_DRIVER; -+ -+ /*@BB IP Generation*/ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ dm->ic_ip_series = PHYDM_IC_JGR3; -+ else if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ dm->ic_ip_series = PHYDM_IC_AC; -+ else if (dm->support_ic_type & ODM_IC_11N_SERIES) -+ dm->ic_ip_series = PHYDM_IC_N; -+ -+ /*@BB phy-status Generation*/ -+ if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) -+ dm->ic_phy_sts_type = PHYDM_PHYSTS_TYPE_3; -+ else if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC) -+ dm->ic_phy_sts_type = PHYDM_PHYSTS_TYPE_2; -+ else -+ dm->ic_phy_sts_type = PHYDM_PHYSTS_TYPE_1; -+ -+ phydm_init_cck_setting(dm); -+ -+ reg_tmp = ODM_REG(BB_RX_PATH, dm); -+ mask_tmp = ODM_BIT(BB_RX_PATH, dm); -+ dm->rf_path_rx_enable = (u8)odm_get_bb_reg(dm, reg_tmp, mask_tmp); -+#if (DM_ODM_SUPPORT_TYPE != ODM_CE) -+ dm->is_net_closed = &dm->BOOLEAN_temp; -+ -+ phydm_init_debug_setting(dm); -+#endif -+ phydm_init_soft_ml_setting(dm); -+ -+ dm->phydm_sys_up_time = 0; -+ -+ if (dm->support_ic_type & ODM_IC_1SS) -+ dm->num_rf_path = 1; -+ else if (dm->support_ic_type & ODM_IC_2SS) -+ dm->num_rf_path = 2; -+ #if 0 -+ /* @RTK do not has IC which is equipped with 3 RF paths, -+ * so ODM_IC_3SS is an enpty macro and result in coverity check errors -+ */ -+ else if (dm->support_ic_type & ODM_IC_3SS) -+ dm->num_rf_path = 3; -+ #endif -+ else if (dm->support_ic_type & ODM_IC_4SS) -+ dm->num_rf_path = 4; -+ else -+ dm->num_rf_path = 1; -+ -+ phydm_trx_antenna_setting_init(dm, dm->num_rf_path); -+ -+ dm->tx_rate = 0xFF; -+ dm->rssi_min_by_path = 0xFF; -+ -+ dm->number_linked_client = 0; -+ dm->pre_number_linked_client = 0; -+ dm->number_active_client = 0; -+ dm->pre_number_active_client = 0; -+ -+ dm->last_tx_ok_cnt = 0; -+ dm->last_rx_ok_cnt = 0; -+ dm->tx_tp = 0; -+ dm->rx_tp = 0; -+ dm->total_tp = 0; -+ dm->traffic_load = TRAFFIC_LOW; -+ -+ dm->nbi_set_result = 0; -+ dm->is_init_hw_info_by_rfe = false; -+ dm->pre_dbg_priority = DBGPORT_RELEASE; -+ dm->tp_active_th = 5; -+ dm->disable_phydm_watchdog = 0; -+ -+ dm->u8_dummy = 0xf; -+ dm->u16_dummy = 0xffff; -+ dm->u32_dummy = 0xffffffff; -+#if (RTL8814B_SUPPORT) -+/*@------------For spur detection Default Mode------------@*/ -+ dm->dsde_sel = DET_CSI; -+ dm->csi_wgt = 4; -+/*@-------------------------------------------------------@*/ -+#endif -+ dm->pre_is_linked = false; -+ dm->is_linked = false; -+/*dym bw thre and it can config by registry*/ -+ if (dm->en_auto_bw_th == 0) -+ dm->en_auto_bw_th = 20; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (!(dm->is_fcs_mode_enable)) { -+ dm->is_fcs_mode_enable = &dm->boolean_dummy; -+ pr_debug("[Warning] is_fcs_mode_enable=NULL\n"); -+ } -+#endif -+ /*init IOT table*/ -+ odm_memory_set(dm, &dm->iot_table, 0, sizeof(struct phydm_iot_center)); -+} -+ -+void phydm_iot_patch_id_update(void *dm_void, u32 iot_idx, boolean en) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_iot_center *iot_table = &dm->iot_table; -+ -+ PHYDM_DBG(dm, DBG_CMN, "[IOT] 0x%x = %d\n", iot_idx, en); -+ switch (iot_idx) { -+ case 0x100f0401: -+ iot_table->patch_id_100f0401 = en; -+ PHYDM_DBG(dm, DBG_CMN, "[IOT] patch_id_100f0401 = %d\n", -+ iot_table->patch_id_100f0401); -+ break; -+ case 0x10120200: -+ iot_table->patch_id_10120200 = en; -+ PHYDM_DBG(dm, DBG_CMN, "[IOT] patch_id_10120200 = %d\n", -+ iot_table->patch_id_10120200); -+ break; -+ case 0x40010700: -+ iot_table->patch_id_40010700 = en; -+ PHYDM_DBG(dm, DBG_CMN, "[IOT] patch_id_40010700 = %d\n", -+ iot_table->patch_id_40010700); -+ break; -+ case 0x021f0800: -+ iot_table->patch_id_021f0800 = en; -+ PHYDM_DBG(dm, DBG_CMN, "[IOT] patch_id_021f0800 = %d\n", -+ iot_table->patch_id_021f0800); -+ break; -+ case 0x011f0500: -+ iot_table->patch_id_011f0500 = en; -+ PHYDM_DBG(dm, DBG_CMN, "[IOT] patch_id_011f0500 = %d\n", -+ iot_table->patch_id_011f0500); -+ break; -+ default: -+ pr_debug("[%s] warning!\n", __func__); -+ break; -+ } -+} -+ -+void phydm_cmn_sta_info_update(void *dm_void, u8 macid) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; -+ struct ra_sta_info *ra = NULL; -+ -+ if (is_sta_active(sta)) { -+ ra = &sta->ra_info; -+ } else { -+ PHYDM_DBG(dm, DBG_RA_MASK, "[Warning] %s invalid sta_info\n", -+ __func__); -+ return; -+ } -+ -+ PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_RA_MASK, "MACID=%d\n", sta->mac_id); -+ -+ /*@[Calculate TX/RX state]*/ -+ if (sta->tx_moving_average_tp > (sta->rx_moving_average_tp << 1)) -+ ra->txrx_state = TX_STATE; -+ else if (sta->rx_moving_average_tp > (sta->tx_moving_average_tp << 1)) -+ ra->txrx_state = RX_STATE; -+ else -+ ra->txrx_state = BI_DIRECTION_STATE; -+ -+ ra->is_noisy = dm->noisy_decision; -+} -+ -+void phydm_common_info_self_update(struct dm_struct *dm) -+{ -+ u8 sta_cnt = 0, num_active_client = 0; -+ u32 i, one_entry_macid = 0; -+ u32 ma_rx_tp = 0; -+ u32 tp_diff = 0; -+ struct cmn_sta_info *sta; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER adapter = (PADAPTER)dm->adapter; -+ PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; -+ -+ sta = dm->phydm_sta_info[0]; -+ -+ /* STA mode is linked to AP */ -+ if (is_sta_active(sta) && !ACTING_AS_AP(adapter)) -+ dm->bsta_state = true; -+ else -+ dm->bsta_state = false; -+#endif -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ sta = dm->phydm_sta_info[i]; -+ if (is_sta_active(sta)) { -+ sta_cnt++; -+ -+ if (sta_cnt == 1) -+ one_entry_macid = i; -+ -+ phydm_cmn_sta_info_update(dm, (u8)i); -+ #ifdef PHYDM_BEAMFORMING_SUPPORT -+ /*@phydm_get_txbf_device_num(dm, (u8)i);*/ -+ #endif -+ -+ ma_rx_tp = sta->rx_moving_average_tp + -+ sta->tx_moving_average_tp; -+ -+ PHYDM_DBG(dm, DBG_COMMON_FLOW, -+ "TP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp); -+ -+ if (ma_rx_tp > ACTIVE_TP_THRESHOLD) -+ num_active_client++; -+ } -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ dm->is_linked = (sta_cnt != 0) ? true : false; -+#endif -+ -+ if (sta_cnt == 1) { -+ dm->is_one_entry_only = true; -+ dm->one_entry_macid = one_entry_macid; -+ dm->one_entry_tp = ma_rx_tp; -+ -+ dm->tp_active_occur = 0; -+ -+ PHYDM_DBG(dm, DBG_COMMON_FLOW, -+ "one_entry_tp=((%d)), pre_one_entry_tp=((%d))\n", -+ dm->one_entry_tp, dm->pre_one_entry_tp); -+ -+ if (dm->one_entry_tp > dm->pre_one_entry_tp && -+ dm->pre_one_entry_tp <= 2) { -+ tp_diff = dm->one_entry_tp - dm->pre_one_entry_tp; -+ -+ if (tp_diff > dm->tp_active_th) -+ dm->tp_active_occur = 1; -+ } -+ dm->pre_one_entry_tp = dm->one_entry_tp; -+ } else { -+ dm->is_one_entry_only = false; -+ } -+ -+ dm->pre_number_linked_client = dm->number_linked_client; -+ dm->pre_number_active_client = dm->number_active_client; -+ -+ dm->number_linked_client = sta_cnt; -+ dm->number_active_client = num_active_client; -+ -+ /*Traffic load information update*/ -+ phydm_traffic_load_decision(dm); -+ -+ dm->phydm_sys_up_time += PHYDM_WATCH_DOG_PERIOD; -+ -+ dm->is_dfs_band = phydm_is_dfs_band(dm); -+ dm->phy_dbg_info.show_phy_sts_cnt = 0; -+ -+ /*[Link Status Check]*/ -+ dm->first_connect = dm->is_linked && !dm->pre_is_linked; -+ dm->first_disconnect = !dm->is_linked && dm->pre_is_linked; -+ dm->pre_is_linked = dm->is_linked; -+} -+ -+void phydm_common_info_self_reset(struct dm_struct *dm) -+{ -+ struct odm_phy_dbg_info *dbg_t = &dm->phy_dbg_info; -+ -+ dbg_t->beacon_cnt_in_period = dbg_t->num_qry_beacon_pkt; -+ dbg_t->num_qry_beacon_pkt = 0; -+ -+ dm->rxsc_l = 0xff; -+ dm->rxsc_20 = 0xff; -+ dm->rxsc_40 = 0xff; -+ dm->rxsc_80 = 0xff; -+} -+ -+void * -+phydm_get_structure(struct dm_struct *dm, u8 structure_type) -+ -+{ -+ void *structure = NULL; -+ -+ switch (structure_type) { -+ case PHYDM_FALSEALMCNT: -+ structure = &dm->false_alm_cnt; -+ break; -+ -+ case PHYDM_CFOTRACK: -+ structure = &dm->dm_cfo_track; -+ break; -+ -+ case PHYDM_ADAPTIVITY: -+ structure = &dm->adaptivity; -+ break; -+#ifdef CONFIG_PHYDM_DFS_MASTER -+ case PHYDM_DFS: -+ structure = &dm->dfs; -+ break; -+#endif -+ default: -+ break; -+ } -+ -+ return structure; -+} -+ -+void phydm_phy_info_update(struct dm_struct *dm) -+{ -+#if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8822B) -+ dm->phy_dbg_info.condi_num = phydm_get_condi_num_8822b(dm); -+#endif -+} -+ -+void phydm_hw_setting(struct dm_struct *dm) -+{ -+#if (RTL8821A_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8821) -+ odm_hw_setting_8821a(dm); -+#endif -+ -+#if (RTL8814A_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814A) -+ phydm_hwsetting_8814a(dm); -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8822B) -+ phydm_hwsetting_8822b(dm); -+#endif -+ -+#if (RTL8812A_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8812) -+ phydm_hwsetting_8812a(dm); -+#endif -+ -+#if (RTL8197F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197F) -+ phydm_hwsetting_8197f(dm); -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8192F) -+ phydm_hwsetting_8192f(dm); -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8822C) -+ phydm_hwsetting_8822c(dm); -+#endif -+ -+#if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197G) -+ phydm_hwsetting_8197g(dm); -+#endif -+ -+#if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8723F) -+ phydm_hwsetting_8723f(dm); -+#endif -+ -+#if (RTL8821C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8821C) -+ phydm_hwsetting_8821c(dm); -+#endif -+ -+#if (RTL8812F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8812F) -+ phydm_hwsetting_8812f(dm); -+#endif -+ -+#ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT -+ phydm_cck_rx_pathdiv_watchdog(dm); -+#endif -+} -+ -+__odm_func__ -+boolean phydm_chk_bb_rf_pkg_set_valid(struct dm_struct *dm) -+{ -+ boolean valid = true; -+ -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ #if (RTL8822C_SUPPORT) -+ valid = phydm_chk_pkg_set_valid_8822c(dm, -+ RELEASE_VERSION_8822C, -+ RF_RELEASE_VERSION_8822C); -+ #else -+ valid = true; /*@Just for preventing compile warnings*/ -+ #endif -+ #if (RTL8812F_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8812F) { -+ valid = phydm_chk_pkg_set_valid_8812f(dm, -+ RELEASE_VERSION_8812F, -+ RF_RELEASE_VERSION_8812F); -+ #endif -+ #if (RTL8197G_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8197G) { -+ valid = phydm_chk_pkg_set_valid_8197g(dm, -+ RELEASE_VERSION_8197G, -+ RF_RELEASE_VERSION_8197G); -+ #endif -+ #if (RTL8812F_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8812F) { -+ valid = phydm_chk_pkg_set_valid_8812f(dm, -+ RELEASE_VERSION_8812F, -+ RF_RELEASE_VERSION_8812F); -+ #endif -+ #if (RTL8198F_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8198F) { -+ valid = phydm_chk_pkg_set_valid_8198f(dm, -+ RELEASE_VERSION_8198F, -+ RF_RELEASE_VERSION_8198F); -+ #endif -+ #if (RTL8814B_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8814B) { -+ valid = phydm_chk_pkg_set_valid_8814b(dm, -+ RELEASE_VERSION_8814B, -+ RF_RELEASE_VERSION_8814B); -+ #endif -+ #if (RTL8723F_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8723F) { -+ valid = phydm_chk_pkg_set_valid_8723f(dm, -+ RELEASE_VERSION_8723F, -+ RF_RELEASE_VERSION_8723F); -+ #endif -+ } -+ -+ return valid; -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+u64 phydm_supportability_init_win( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u64 support_ability = 0; -+ -+ switch (dm->support_ic_type) { -+/*@---------------N Series--------------------*/ -+#if (RTL8188E_SUPPORT) -+ case ODM_RTL8188E: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR | -+ ODM_BB_PRIMARY_CCA; -+ break; -+#endif -+ -+#if (RTL8192E_SUPPORT) -+ case ODM_RTL8192E: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR | -+ ODM_BB_PRIMARY_CCA; -+ break; -+#endif -+ -+#if (RTL8723B_SUPPORT) -+ case ODM_RTL8723B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR | -+ ODM_BB_PRIMARY_CCA; -+ break; -+#endif -+ -+#if (RTL8703B_SUPPORT) -+ case ODM_RTL8703B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8723D_SUPPORT) -+ case ODM_RTL8723D: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ ODM_BB_PWR_TRAIN | -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8710B_SUPPORT) -+ case ODM_RTL8710B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ ODM_BB_PWR_TRAIN | -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8188F_SUPPORT) -+ case ODM_RTL8188F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ case ODM_RTL8192F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ ODM_BB_PWR_TRAIN | -+ ODM_BB_RATE_ADAPTIVE | -+ /*ODM_BB_PATH_DIV |*/ -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ADAPTIVE_SOML | -+ ODM_BB_ENV_MONITOR; -+ /*ODM_BB_LNA_SAT_CHK |*/ -+ /*ODM_BB_PRIMARY_CCA*/ -+ -+ break; -+#endif -+ -+/*@---------------AC Series-------------------*/ -+ -+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT) -+ case ODM_RTL8812: -+ case ODM_RTL8821: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_DYNAMIC_TXPWR | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8814A_SUPPORT) -+ case ODM_RTL8814A: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_DYNAMIC_TXPWR | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ case ODM_RTL8822B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ /*ODM_BB_ADAPTIVE_SOML |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ /*ODM_BB_PATH_DIV |*/ -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8821C_SUPPORT) -+ case ODM_RTL8821C: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+/*@---------------JGR3 Series-------------------*/ -+ -+#if (RTL8822C_SUPPORT) -+ case ODM_RTL8822C: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_DYNAMIC_TXPWR | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_PATH_DIV | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8814B_SUPPORT) -+ case ODM_RTL8814B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING; -+ /*ODM_BB_ENV_MONITOR;*/ -+ break; -+#endif -+ -+#if (RTL8723F_SUPPORT) -+ case ODM_RTL8723F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /* ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ default: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ -+ pr_debug("[Warning] Supportability Init Warning !!!\n"); -+ break; -+ } -+ -+ return support_ability; -+} -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+u64 phydm_supportability_init_ce(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u64 support_ability = 0; -+ -+ switch (dm->support_ic_type) { -+/*@---------------N Series--------------------*/ -+#if (RTL8188E_SUPPORT) -+ case ODM_RTL8188E: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR | -+ ODM_BB_PRIMARY_CCA; -+ break; -+#endif -+ -+#if (RTL8192E_SUPPORT) -+ case ODM_RTL8192E: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR | -+ ODM_BB_PRIMARY_CCA; -+ break; -+#endif -+ -+#if (RTL8723B_SUPPORT) -+ case ODM_RTL8723B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR | -+ ODM_BB_PRIMARY_CCA; -+ break; -+#endif -+ -+#if (RTL8703B_SUPPORT) -+ case ODM_RTL8703B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8723D_SUPPORT) -+ case ODM_RTL8723D: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ ODM_BB_PWR_TRAIN | -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8710B_SUPPORT) -+ case ODM_RTL8710B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8188F_SUPPORT) -+ case ODM_RTL8188F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ case ODM_RTL8192F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ ODM_BB_PWR_TRAIN | -+ ODM_BB_RATE_ADAPTIVE | -+ /*ODM_BB_PATH_DIV |*/ -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ /*@ODM_BB_ADAPTIVE_SOML |*/ -+ ODM_BB_ENV_MONITOR; -+ /*@ODM_BB_LNA_SAT_CHK |*/ -+ /*@ODM_BB_PRIMARY_CCA*/ -+ break; -+#endif -+/*@---------------AC Series-------------------*/ -+ -+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT) -+ case ODM_RTL8812: -+ case ODM_RTL8821: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8814A_SUPPORT) -+ case ODM_RTL8814A: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ case ODM_RTL8822B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_DYNAMIC_TXPWR | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ /*ODM_BB_PATH_DIV |*/ -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8821C_SUPPORT) -+ case ODM_RTL8821C: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_DYNAMIC_TXPWR | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+/*@---------------JGR3 Series-------------------*/ -+ -+#if (RTL8822C_SUPPORT) -+ case ODM_RTL8822C: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_DYNAMIC_TXPWR | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ ODM_BB_RATE_ADAPTIVE | -+ /* ODM_BB_PATH_DIV | */ -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8814B_SUPPORT) -+ case ODM_RTL8814B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ /*ODM_BB_RATE_ADAPTIVE |*/ -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING; -+ /*ODM_BB_ENV_MONITOR;*/ -+ break; -+#endif -+#if (RTL8723F_SUPPORT) -+ case ODM_RTL8723F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_DYNAMIC_TXPWR | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ ODM_BB_RATE_ADAPTIVE | -+ /* ODM_BB_PATH_DIV | */ -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ default: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*@ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*@ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ -+ pr_debug("[Warning] Supportability Init Warning !!!\n"); -+ break; -+ } -+ -+ return support_ability; -+} -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+u64 phydm_supportability_init_ap( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u64 support_ability = 0; -+ -+ switch (dm->support_ic_type) { -+/*@---------------N Series--------------------*/ -+#if (RTL8188E_SUPPORT) -+ case ODM_RTL8188E: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR | -+ ODM_BB_PRIMARY_CCA; -+ break; -+#endif -+ -+#if (RTL8192E_SUPPORT) -+ case ODM_RTL8192E: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR | -+ ODM_BB_PRIMARY_CCA; -+ break; -+#endif -+ -+#if (RTL8723B_SUPPORT) -+ case ODM_RTL8723B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT || RTL8197F_SUPPORT) -+ case ODM_RTL8198F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ /*ODM_BB_RATE_ADAPTIVE |*/ -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING; -+ /*ODM_BB_ADAPTIVE_SOML |*/ -+ /*ODM_BB_ENV_MONITOR |*/ -+ /*ODM_BB_LNA_SAT_CHK |*/ -+ /*ODM_BB_PRIMARY_CCA;*/ -+ break; -+ case ODM_RTL8197F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ADAPTIVE_SOML | -+ ODM_BB_ENV_MONITOR | -+ ODM_BB_LNA_SAT_CHK | -+ ODM_BB_PRIMARY_CCA; -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ case ODM_RTL8192F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ /*ODM_BB_CFO_TRACKING |*/ -+ ODM_BB_ADAPTIVE_SOML | -+ /*ODM_BB_PATH_DIV |*/ -+ ODM_BB_ENV_MONITOR | -+ /*ODM_BB_LNA_SAT_CHK |*/ -+ /*ODM_BB_PRIMARY_CCA |*/ -+ 0; -+ break; -+#endif -+ -+/*@---------------AC Series-------------------*/ -+ -+#if (RTL8881A_SUPPORT) -+ case ODM_RTL8881A: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8814A_SUPPORT) -+ case ODM_RTL8814A: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ case ODM_RTL8822B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ /*ODM_BB_ADAPTIVE_SOML |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8821C_SUPPORT) -+ case ODM_RTL8821C: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ -+ break; -+#endif -+ -+/*@---------------JGR3 Series-------------------*/ -+ -+#if (RTL8814B_SUPPORT) -+ case ODM_RTL8814B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ /*ODM_BB_RATE_ADAPTIVE |*/ -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8197G_SUPPORT) -+ case ODM_RTL8197G: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8812F_SUPPORT) -+ case ODM_RTL8812F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_DYNAMIC_TXPWR | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ /*ODM_BB_CCK_PD |*/ -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8723F_SUPPORT) -+ case ODM_RTL8723F: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ default: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ -+ pr_debug("[Warning] Supportability Init Warning !!!\n"); -+ break; -+ } -+ -+ return support_ability; -+} -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+u64 phydm_supportability_init_iot( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u64 support_ability = 0; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8710B_SUPPORT) -+ case ODM_RTL8710B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8195A_SUPPORT) -+ case ODM_RTL8195A: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8195B_SUPPORT) -+ case ODM_RTL8195B: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8721D_SUPPORT) -+ case ODM_RTL8721D: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ -+#if (RTL8710C_SUPPORT) -+ case ODM_RTL8710C: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_ADAPTIVITY | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ break; -+#endif -+ default: -+ support_ability |= -+ ODM_BB_DIG | -+ ODM_BB_RA_MASK | -+ /*ODM_BB_DYNAMIC_TXPWR |*/ -+ ODM_BB_FA_CNT | -+ ODM_BB_RSSI_MONITOR | -+ ODM_BB_CCK_PD | -+ /*ODM_BB_PWR_TRAIN |*/ -+ ODM_BB_RATE_ADAPTIVE | -+ ODM_BB_CFO_TRACKING | -+ ODM_BB_ENV_MONITOR; -+ -+ pr_debug("[Warning] Supportability Init Warning !!!\n"); -+ break; -+ } -+ -+ return support_ability; -+} -+#endif -+ -+void phydm_fwoffload_ability_init(struct dm_struct *dm, -+ enum phydm_offload_ability offload_ability) -+{ -+ switch (offload_ability) { -+ case PHYDM_PHY_PARAM_OFFLOAD: -+ if (dm->support_ic_type & PHYDM_IC_SUPPORT_FW_PARAM_OFFLOAD) -+ dm->fw_offload_ability |= PHYDM_PHY_PARAM_OFFLOAD; -+ break; -+ -+ case PHYDM_RF_IQK_OFFLOAD: -+ dm->fw_offload_ability |= PHYDM_RF_IQK_OFFLOAD; -+ break; -+ -+ case PHYDM_RF_DPK_OFFLOAD: -+ dm->fw_offload_ability |= PHYDM_RF_DPK_OFFLOAD; -+ break; -+ -+ default: -+ PHYDM_DBG(dm, ODM_COMP_INIT, "fwofflad, wrong init type!!\n"); -+ break; -+ } -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "fw_offload_ability = %x\n", -+ dm->fw_offload_ability); -+} -+ -+void phydm_fwoffload_ability_clear(struct dm_struct *dm, -+ enum phydm_offload_ability offload_ability) -+{ -+ switch (offload_ability) { -+ case PHYDM_PHY_PARAM_OFFLOAD: -+ if (dm->support_ic_type & PHYDM_IC_SUPPORT_FW_PARAM_OFFLOAD) -+ dm->fw_offload_ability &= (~PHYDM_PHY_PARAM_OFFLOAD); -+ break; -+ -+ case PHYDM_RF_IQK_OFFLOAD: -+ dm->fw_offload_ability &= (~PHYDM_RF_IQK_OFFLOAD); -+ break; -+ -+ case PHYDM_RF_DPK_OFFLOAD: -+ dm->fw_offload_ability &= (~PHYDM_RF_DPK_OFFLOAD); -+ break; -+ -+ default: -+ PHYDM_DBG(dm, ODM_COMP_INIT, "fwofflad, wrong init type!!\n"); -+ break; -+ } -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "fw_offload_ability = %x\n", -+ dm->fw_offload_ability); -+} -+ -+void phydm_supportability_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u64 support_ability; -+ -+ if (dm->manual_supportability && -+ *dm->manual_supportability != 0xffffffff) { -+ support_ability = *dm->manual_supportability; -+ } else if (*dm->mp_mode) { -+ support_ability = 0; -+ } else { -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ support_ability = phydm_supportability_init_win(dm); -+ #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ support_ability = phydm_supportability_init_ap(dm); -+ #elif(DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ support_ability = phydm_supportability_init_ce(dm); -+ #elif(DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+ support_ability = phydm_supportability_init_iot(dm); -+ #endif -+ -+ /*@[Config Antenna Diversity]*/ -+ if (IS_FUNC_EN(dm->enable_antdiv)) -+ support_ability |= ODM_BB_ANT_DIV; -+ -+ /*@[Config TXpath Diversity]*/ -+ if (IS_FUNC_EN(dm->enable_pathdiv)) -+ support_ability |= ODM_BB_PATH_DIV; -+ -+ /*@[Config Adaptive SOML]*/ -+ if (IS_FUNC_EN(dm->en_adap_soml)) -+ support_ability |= ODM_BB_ADAPTIVE_SOML; -+ -+ /*@[DYNAMIC_TXPWR and TSSI cannot coexist]*/ -+ if(IS_FUNC_EN(&dm->en_tssi_mode) && -+ (dm->support_ic_type & ODM_RTL8822C)) -+ support_ability &= ~ODM_BB_DYNAMIC_TXPWR; -+ -+ } -+ dm->support_ability = support_ability; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "IC=0x%x, mp=%d, Supportability=0x%llx\n", -+ dm->support_ic_type, *dm->mp_mode, dm->support_ability); -+} -+ -+void phydm_rfe_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "RFE_Init\n"); -+#if (RTL8822B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822B) -+ phydm_rfe_8822b_init(dm); -+#endif -+} -+ -+#ifdef CONFIG_DYNAMIC_TXCOLLISION_TH -+void phydm_tx_collsion_th_init(void *dm_void) -+{ -+ -+struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197G) -+ phydm_tx_collsion_th_init_8197g(dm); -+#endif -+ -+#if (RTL8812F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8812F) -+ phydm_tx_collsion_th_init_8812f(dm); -+#endif -+ -+} -+ -+void phydm_tx_collsion_th_set(void *dm_void, u8 val_r2t, u8 val_t2r) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197G) -+ phydm_tx_collsion_th_set_8197g(dm, val_r2t, val_t2r); -+#endif -+ -+#if (RTL8812F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8812F) -+ phydm_tx_collsion_th_set_8812f(dm, val_r2t, val_t2r); -+#endif -+ -+} -+#endif -+ -+void phydm_dm_early_init(struct dm_struct *dm) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ phydm_init_debug_setting(dm); -+#endif -+} -+ -+enum phydm_init_result odm_dm_init(struct dm_struct *dm) -+{ -+ enum phydm_init_result result = PHYDM_INIT_SUCCESS; -+ -+ if (!phydm_chk_bb_rf_pkg_set_valid(dm)) { -+ pr_debug("[Warning][%s] Init fail\n", __func__); -+ return PHYDM_INIT_FAIL_BBRF_REG_INVALID; -+ } -+ -+ halrf_init(dm); -+ phydm_supportability_init(dm); -+ phydm_pause_func_init(dm); -+ phydm_rfe_init(dm); -+ phydm_common_info_self_init(dm); -+ phydm_rx_phy_status_init(dm); -+#ifdef PHYDM_AUTO_DEGBUG -+ phydm_auto_dbg_engine_init(dm); -+#endif -+ phydm_dig_init(dm); -+#ifdef PHYDM_SUPPORT_CCKPD -+#ifdef PHYDM_DCC_ENHANCE -+ phydm_dig_cckpd_coex_init(dm); -+#endif -+ phydm_cck_pd_init(dm); -+#endif -+ phydm_env_monitor_init(dm); -+ phydm_enhance_monitor_init(dm); -+ phydm_adaptivity_init(dm); -+ phydm_ra_info_init(dm); -+ phydm_rssi_monitor_init(dm); -+ phydm_cfo_tracking_init(dm); -+ phydm_rf_init(dm); -+ phydm_dc_cancellation(dm); -+#ifdef PHYDM_TXA_CALIBRATION -+ phydm_txcurrentcalibration(dm); -+ phydm_get_pa_bias_offset(dm); -+#endif -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ odm_antenna_diversity_init(dm); -+#endif -+#ifdef CONFIG_ADAPTIVE_SOML -+ phydm_adaptive_soml_init(dm); -+#endif -+#ifdef CONFIG_PATH_DIVERSITY -+ phydm_tx_path_diversity_init(dm); -+#endif -+#ifdef CONFIG_DYNAMIC_TX_TWR -+ phydm_dynamic_tx_power_init(dm); -+#endif -+#if (PHYDM_LA_MODE_SUPPORT) -+ phydm_la_init(dm); -+#endif -+ -+#ifdef PHYDM_BEAMFORMING_VERSION1 -+ phydm_beamforming_init(dm); -+#endif -+ -+#if (RTL8188E_SUPPORT) -+ odm_ra_info_init_all(dm); -+#endif -+#ifdef PHYDM_PRIMARY_CCA -+ phydm_primary_cca_init(dm); -+#endif -+#ifdef CONFIG_PSD_TOOL -+ phydm_psd_init(dm); -+#endif -+ -+#ifdef CONFIG_SMART_ANTENNA -+ phydm_smt_ant_init(dm); -+#endif -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ phydm_lna_sat_check_init(dm); -+#endif -+#ifdef CONFIG_MCC_DM -+ phydm_mcc_init(dm); -+#endif -+ -+#ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT -+ phydm_cck_rx_pathdiv_init(dm); -+#endif -+ -+#ifdef CONFIG_MU_RSOML -+ phydm_mu_rsoml_init(dm); -+#endif -+ -+#ifdef CONFIG_DYNAMIC_TXCOLLISION_TH -+ phydm_tx_collsion_th_init(dm); -+#endif -+ -+ return result; -+} -+ -+void odm_dm_reset(struct dm_struct *dm) -+{ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ odm_ant_div_reset(dm); -+ #endif -+ phydm_set_edcca_threshold_api(dm); -+} -+ -+void phydm_supportability_en(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 dm_value[10] = {0}; -+ u64 pre_support_ability, one = 1; -+ u64 comp = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i; -+ -+ for (i = 0; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]); -+ } -+ -+ pre_support_ability = dm->support_ability; -+ comp = dm->support_ability; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n================================\n"); -+ -+ if (dm_value[0] == 100) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Supportability] PhyDM Selection\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "================================\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "00. (( %s ))DIG\n", -+ ((comp & ODM_BB_DIG) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "01. (( %s ))RA_MASK\n", -+ ((comp & ODM_BB_RA_MASK) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "02. (( %s ))DYN_TXPWR\n", -+ ((comp & ODM_BB_DYNAMIC_TXPWR) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "03. (( %s ))FA_CNT\n", -+ ((comp & ODM_BB_FA_CNT) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "04. (( %s ))RSSI_MNTR\n", -+ ((comp & ODM_BB_RSSI_MONITOR) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "05. (( %s ))CCK_PD\n", -+ ((comp & ODM_BB_CCK_PD) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "06. (( %s ))ANT_DIV\n", -+ ((comp & ODM_BB_ANT_DIV) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "07. (( %s ))SMT_ANT\n", -+ ((comp & ODM_BB_SMT_ANT) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "08. (( %s ))PWR_TRAIN\n", -+ ((comp & ODM_BB_PWR_TRAIN) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "09. (( %s ))RA\n", -+ ((comp & ODM_BB_RATE_ADAPTIVE) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "10. (( %s ))PATH_DIV\n", -+ ((comp & ODM_BB_PATH_DIV) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "11. (( %s ))DFS\n", -+ ((comp & ODM_BB_DFS) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "12. (( %s ))DYN_ARFR\n", -+ ((comp & ODM_BB_DYNAMIC_ARFR) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "13. (( %s ))ADAPTIVITY\n", -+ ((comp & ODM_BB_ADAPTIVITY) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "14. (( %s ))CFO_TRACK\n", -+ ((comp & ODM_BB_CFO_TRACKING) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "15. (( %s ))ENV_MONITOR\n", -+ ((comp & ODM_BB_ENV_MONITOR) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "16. (( %s ))PRI_CCA\n", -+ ((comp & ODM_BB_PRIMARY_CCA) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "17. (( %s ))ADPTV_SOML\n", -+ ((comp & ODM_BB_ADAPTIVE_SOML) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "18. (( %s ))LNA_SAT_CHK\n", -+ ((comp & ODM_BB_LNA_SAT_CHK) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "================================\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Supportability] PhyDM offload ability\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "================================\n"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "00. (( %s ))PHY PARAM OFFLOAD\n", -+ ((dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) ? -+ ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "01. (( %s ))RF IQK OFFLOAD\n", -+ ((dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? -+ ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "================================\n"); -+ -+ } else if (dm_value[0] == 101) { -+ dm->support_ability = 0; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Disable all support_ability components\n"); -+ } else { -+ if (dm_value[1] == 1) { /* @enable */ -+ dm->support_ability |= (one << dm_value[0]); -+ } else if (dm_value[1] == 2) {/* @disable */ -+ dm->support_ability &= ~(one << dm_value[0]); -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Warning!!!] 1:enable, 2:disable\n"); -+ } -+ } -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pre-supportability = 0x%llx\n", pre_support_ability); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Cur-supportability = 0x%llx\n", dm->support_ability); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "================================\n"); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_watchdog_lps_32k(struct dm_struct *dm) -+{ -+ PHYDM_DBG(dm, DBG_COMMON_FLOW, "%s ======>\n", __func__); -+ -+ phydm_common_info_self_update(dm); -+ phydm_rssi_monitor_check(dm); -+ phydm_dig_lps_32k(dm); -+ phydm_common_info_self_reset(dm); -+} -+ -+void phydm_watchdog_lps(struct dm_struct *dm) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) -+ PHYDM_DBG(dm, DBG_COMMON_FLOW, "%s ======>\n", __func__); -+ -+ phydm_common_info_self_update(dm); -+ phydm_rssi_monitor_check(dm); -+ phydm_basic_dbg_message(dm); -+ phydm_receiver_blocking(dm); -+ phydm_false_alarm_counter_statistics(dm); -+ phydm_dig_by_rssi_lps(dm); -+ #ifdef PHYDM_SUPPORT_CCKPD -+ phydm_cck_pd_th(dm); -+ #endif -+ phydm_adaptivity(dm); -+ #ifdef CONFIG_BW_INDICATION -+ phydm_dyn_bw_indication(dm); -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ /*@enable AntDiv in PS mode, request from SD4 Jeff*/ -+ odm_antenna_diversity(dm); -+ #endif -+ #endif -+ phydm_common_info_self_reset(dm); -+#endif -+} -+ -+void phydm_watchdog_mp(struct dm_struct *dm) -+{ -+} -+ -+void phydm_pause_dm_watchdog(void *dm_void, enum phydm_pause_type pause_type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (pause_type == PHYDM_PAUSE) { -+ dm->disable_phydm_watchdog = 1; -+ PHYDM_DBG(dm, ODM_COMP_API, "PHYDM Stop\n"); -+ } else { -+ dm->disable_phydm_watchdog = 0; -+ PHYDM_DBG(dm, ODM_COMP_API, "PHYDM Start\n"); -+ } -+} -+ -+void phydm_pause_func_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ dm->pause_lv_table.lv_cckpd = PHYDM_PAUSE_RELEASE; -+ dm->pause_lv_table.lv_dig = PHYDM_PAUSE_RELEASE; -+ dm->pause_lv_table.lv_antdiv = PHYDM_PAUSE_RELEASE; -+ dm->pause_lv_table.lv_dig = PHYDM_PAUSE_RELEASE; -+ dm->pause_lv_table.lv_adapt = PHYDM_PAUSE_RELEASE; -+ dm->pause_lv_table.lv_adsl = PHYDM_PAUSE_RELEASE; -+} -+ -+u8 phydm_pause_func(void *dm_void, enum phydm_func_idx pause_func, -+ enum phydm_pause_type pause_type, -+ enum phydm_pause_level pause_lv, u8 val_lehgth, -+ u32 *val_buf) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_func_poiner *func_t = &dm->phydm_func_handler; -+ s8 *pause_lv_pre = &dm->s8_dummy; -+ u32 *bkp_val = &dm->u32_dummy; -+ u32 ori_val[5] = {0}; -+ u64 pause_func_bitmap = (u64)BIT(pause_func); -+ u8 i = 0; -+ u8 en_2rcca = 0; -+ u8 en_bw40m = 0; -+ u8 pause_result = PAUSE_FAIL; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "\n"); -+ PHYDM_DBG(dm, ODM_COMP_API, "[%s][%s] LV=%d, Len=%d\n", __func__, -+ ((pause_type == PHYDM_PAUSE) ? "Pause" : -+ ((pause_type == PHYDM_RESUME) ? "Resume" : "Pause no_set")), -+ pause_lv, val_lehgth); -+ -+ if (pause_lv >= PHYDM_PAUSE_MAX_NUM) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[WARNING]Wrong LV=%d\n", pause_lv); -+ return PAUSE_FAIL; -+ } -+ -+ if (pause_func == F00_DIG) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[DIG]\n"); -+ -+ if (val_lehgth != 1) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n"); -+ return PAUSE_FAIL; -+ } -+ -+ ori_val[0] = (u32)(dm->dm_dig_table.cur_ig_value); -+ pause_lv_pre = &dm->pause_lv_table.lv_dig; -+ bkp_val = (u32 *)(&dm->dm_dig_table.rvrt_val); -+ /*@function pointer hook*/ -+ func_t->pause_phydm_handler = phydm_set_dig_val; -+ -+#ifdef PHYDM_SUPPORT_CCKPD -+ } else if (pause_func == F05_CCK_PD) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[CCK_PD]\n"); -+ -+ if (val_lehgth != 1) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n"); -+ return PAUSE_FAIL; -+ } -+ -+ ori_val[0] = (u32)dm->dm_cckpd_table.cck_pd_lv; -+ pause_lv_pre = &dm->pause_lv_table.lv_cckpd; -+ bkp_val = (u32 *)(&dm->dm_cckpd_table.rvrt_val); -+ /*@function pointer hook*/ -+ func_t->pause_phydm_handler = phydm_set_cckpd_val; -+#endif -+ -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ } else if (pause_func == F06_ANT_DIV) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[AntDiv]\n"); -+ -+ if (val_lehgth != 1) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n"); -+ return PAUSE_FAIL; -+ } -+ /*@default antenna*/ -+ ori_val[0] = (u32)(dm->dm_fat_table.rx_idle_ant); -+ pause_lv_pre = &dm->pause_lv_table.lv_antdiv; -+ bkp_val = (u32 *)(&dm->dm_fat_table.rvrt_val); -+ /*@function pointer hook*/ -+ func_t->pause_phydm_handler = phydm_set_antdiv_val; -+ -+#endif -+#ifdef PHYDM_SUPPORT_ADAPTIVITY -+ } else if (pause_func == F13_ADPTVTY) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[Adaptivity]\n"); -+ -+ if (val_lehgth != 2) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 2\n"); -+ return PAUSE_FAIL; -+ } -+ -+ ori_val[0] = (u32)(dm->adaptivity.th_l2h); /*th_l2h*/ -+ ori_val[1] = (u32)(dm->adaptivity.th_h2l); /*th_h2l*/ -+ pause_lv_pre = &dm->pause_lv_table.lv_adapt; -+ bkp_val = (u32 *)(&dm->adaptivity.rvrt_val); -+ /*@function pointer hook*/ -+ func_t->pause_phydm_handler = phydm_set_edcca_val; -+ -+#endif -+#ifdef CONFIG_ADAPTIVE_SOML -+ } else if (pause_func == F17_ADPTV_SOML) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[AD-SOML]\n"); -+ -+ if (val_lehgth != 1) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] length != 1\n"); -+ return PAUSE_FAIL; -+ } -+ /*SOML_ON/OFF*/ -+ ori_val[0] = (u32)(dm->dm_soml_table.soml_on_off); -+ -+ pause_lv_pre = &dm->pause_lv_table.lv_adsl; -+ bkp_val = (u32 *)(&dm->dm_soml_table.rvrt_val); -+ /*@function pointer hook*/ -+ func_t->pause_phydm_handler = phydm_set_adsl_val; -+ -+#endif -+ } else { -+ PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] error func idx\n"); -+ return PAUSE_FAIL; -+ } -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "Pause_LV{new , pre} = {%d ,%d}\n", -+ pause_lv, *pause_lv_pre); -+ -+ if (pause_type == PHYDM_PAUSE || pause_type == PHYDM_PAUSE_NO_SET) { -+ if (pause_lv <= *pause_lv_pre) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[PAUSE FAIL] Pre_LV >= Curr_LV\n"); -+ return PAUSE_FAIL; -+ } -+ -+ if (!(dm->pause_ability & pause_func_bitmap)) { -+ for (i = 0; i < val_lehgth; i++) -+ bkp_val[i] = ori_val[i]; -+ } -+ -+ dm->pause_ability |= pause_func_bitmap; -+ PHYDM_DBG(dm, ODM_COMP_API, "pause_ability=0x%llx\n", -+ dm->pause_ability); -+ -+ if (pause_type == PHYDM_PAUSE) { -+ for (i = 0; i < val_lehgth; i++) -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[PAUSE SUCCESS] val_idx[%d]{New, Ori}={0x%x, 0x%x}\n", -+ i, val_buf[i], bkp_val[i]); -+ func_t->pause_phydm_handler(dm, val_buf, val_lehgth); -+ } else { -+ for (i = 0; i < val_lehgth; i++) -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[PAUSE NO Set: SUCCESS] val_idx[%d]{Ori}={0x%x}\n", -+ i, bkp_val[i]); -+ } -+ -+ *pause_lv_pre = pause_lv; -+ pause_result = PAUSE_SUCCESS; -+ -+ } else if (pause_type == PHYDM_RESUME) { -+ if (pause_lv < *pause_lv_pre) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[Resume FAIL] Pre_LV >= Curr_LV\n"); -+ return PAUSE_FAIL; -+ } -+ -+ if ((dm->pause_ability & pause_func_bitmap) == 0) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[RESUME] No Need to Revert\n"); -+ return PAUSE_SUCCESS; -+ } -+ -+ dm->pause_ability &= ~pause_func_bitmap; -+ PHYDM_DBG(dm, ODM_COMP_API, "pause_ability=0x%llx\n", -+ dm->pause_ability); -+ -+ *pause_lv_pre = PHYDM_PAUSE_RELEASE; -+ -+ for (i = 0; i < val_lehgth; i++) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[RESUME] val_idx[%d]={0x%x}\n", i, -+ bkp_val[i]); -+ } -+ -+ func_t->pause_phydm_handler(dm, bkp_val, val_lehgth); -+ -+ pause_result = PAUSE_SUCCESS; -+ } else { -+ PHYDM_DBG(dm, ODM_COMP_API, "[WARNING] error pause_type\n"); -+ pause_result = PAUSE_FAIL; -+ } -+ return pause_result; -+} -+ -+void phydm_pause_func_console(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 i; -+ u8 length = 0; -+ u32 buf[5] = {0}; -+ u8 set_result = 0; -+ enum phydm_func_idx func = 0; -+ enum phydm_pause_type type = 0; -+ enum phydm_pause_level lv = 0; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{Func} {1:pause,2:pause no set 3:Resume} {lv:0~3} Val[5:0]\n"); -+ -+ goto out; -+ } -+ -+ for (i = 0; i < 10; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); -+ } -+ -+ func = (enum phydm_func_idx)var1[0]; -+ type = (enum phydm_pause_type)var1[1]; -+ lv = (enum phydm_pause_level)var1[2]; -+ -+ for (i = 0; i < 5; i++) -+ buf[i] = var1[3 + i]; -+ -+ if (func == F00_DIG) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[DIG]\n"); -+ length = 1; -+ -+ } else if (func == F05_CCK_PD) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[CCK_PD]\n"); -+ length = 1; -+ } else if (func == F06_ANT_DIV) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Ant_Div]\n"); -+ length = 1; -+ } else if (func == F13_ADPTVTY) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Adaptivity]\n"); -+ length = 2; -+ } else if (func == F17_ADPTV_SOML) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ADSL]\n"); -+ length = 1; -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Set Function Error]\n"); -+ length = 0; -+ } -+ -+ if (length != 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{%s, lv=%d} val = %d, %d}\n", -+ ((type == PHYDM_PAUSE) ? "Pause" : -+ ((type == PHYDM_RESUME) ? "Resume" : "Pause no_set")), -+ lv, var1[3], var1[4]); -+ -+ set_result = phydm_pause_func(dm, func, type, lv, length, buf); -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "set_result = %d\n", set_result); -+ -+out: -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_pause_dm_by_asso_pkt(struct dm_struct *dm, -+ enum phydm_pause_type pause_type, u8 rssi) -+{ -+ u32 igi_val = rssi + 10; -+ u32 th_buf[2]; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "[%s][%s] rssi=%d\n", __func__, -+ ((pause_type == PHYDM_PAUSE) ? "Pause" : -+ ((pause_type == PHYDM_RESUME) ? "Resume" : "Pause no_set")), -+ rssi); -+ -+ if (pause_type == PHYDM_RESUME) { -+ phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, -+ PHYDM_PAUSE_LEVEL_1, 1, &igi_val); -+ -+ phydm_pause_func(dm, F13_ADPTVTY, PHYDM_RESUME, -+ PHYDM_PAUSE_LEVEL_1, 2, th_buf); -+ } else { -+ odm_write_dig(dm, (u8)igi_val); -+ phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, -+ PHYDM_PAUSE_LEVEL_1, 1, &igi_val); -+ -+ th_buf[0] = 0xff; -+ th_buf[1] = 0xff; -+ -+ phydm_pause_func(dm, F13_ADPTVTY, PHYDM_PAUSE, -+ PHYDM_PAUSE_LEVEL_1, 2, th_buf); -+ } -+} -+ -+u8 phydm_stop_dm_watchdog_check(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->disable_phydm_watchdog == 1) { -+ PHYDM_DBG(dm, DBG_COMMON_FLOW, "Disable phydm\n"); -+ return true; -+ } else { -+ return false; -+ } -+} -+ -+void phydm_watchdog(struct dm_struct *dm) -+{ -+ PHYDM_DBG(dm, DBG_COMMON_FLOW, "%s ======>\n", __func__); -+ -+ phydm_common_info_self_update(dm); -+ phydm_phy_info_update(dm); -+ phydm_rssi_monitor_check(dm); -+ phydm_basic_dbg_message(dm); -+ phydm_dm_summary(dm, FIRST_MACID); -+#ifdef PHYDM_AUTO_DEGBUG -+ phydm_auto_dbg_engine(dm); -+#endif -+ phydm_receiver_blocking(dm); -+ -+ if (phydm_stop_dm_watchdog_check(dm) == true) -+ return; -+ -+ phydm_hw_setting(dm); -+ -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+ if (dm->original_dig_restore == 0) { -+ phydm_tdma_dig_timer_check(dm); -+ } else -+#endif -+ { -+ phydm_false_alarm_counter_statistics(dm); -+ #if (ODM_IC_11N_SERIES_SUPPORT || ODM_IC_11AC_SERIES_SUPPORT) -+ if (dm->support_ic_type & (ODM_IC_11N_SERIES | -+ ODM_IC_11AC_SERIES)) -+ phydm_noisy_detection(dm); -+ #endif -+ -+ #if defined(PHYDM_DCC_ENHANCE) && defined(PHYDM_SUPPORT_CCKPD) -+ phydm_dig_cckpd_coex(dm); -+ #else -+ phydm_dig(dm); -+ #ifdef PHYDM_SUPPORT_CCKPD -+ phydm_cck_pd_th(dm); -+ #endif -+ #endif -+ } -+ -+#ifdef PHYDM_HW_IGI -+ phydm_hwigi(dm); -+#endif -+#ifdef PHYDM_POWER_TRAINING_SUPPORT -+ phydm_update_power_training_state(dm); -+#endif -+ phydm_adaptivity(dm); -+ phydm_ra_info_watchdog(dm); -+#ifdef CONFIG_PATH_DIVERSITY -+ phydm_tx_path_diversity(dm); -+#endif -+ phydm_cfo_tracking(dm); -+#ifdef CONFIG_DYNAMIC_TX_TWR -+ phydm_dynamic_tx_power(dm); -+#endif -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ odm_antenna_diversity(dm); -+#endif -+#ifdef CONFIG_ADAPTIVE_SOML -+ phydm_adaptive_soml(dm); -+#endif -+ -+#ifdef PHYDM_BEAMFORMING_VERSION1 -+ phydm_beamforming_watchdog(dm); -+#endif -+ -+ halrf_watchdog(dm); -+#ifdef PHYDM_PRIMARY_CCA -+ phydm_primary_cca(dm); -+#endif -+#ifdef CONFIG_BW_INDICATION -+ phydm_dyn_bw_indication(dm); -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ odm_dtc(dm); -+#endif -+ -+ phydm_env_mntr_watchdog(dm); -+ phydm_enhance_mntr_watchdog(dm); -+ -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ phydm_lna_sat_chk_watchdog(dm); -+#endif -+ -+#ifdef CONFIG_MCC_DM -+ phydm_mcc_switch(dm); -+#endif -+ -+#ifdef CONFIG_MU_RSOML -+ phydm_mu_rsoml_decision(dm); -+#endif -+ -+ phydm_common_info_self_reset(dm); -+} -+ -+void phydm_fw_dm_ctrl_en(void *dm_void, enum phydm_func_idx fun_idx, -+ boolean enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 h2c_val[H2C_MAX_LENGTH] = {0}; -+ u8 para4[4]; /*4 bit*/ -+ u8 para8[4]; /*8 bit*/ -+ u8 i = 0; -+ -+ for (i = 0; i < 4; i++) { -+ para4[i] = 0; -+ para8[i] = 0; -+ } -+ -+ switch (fun_idx) { -+ case F00_DIG: -+ phydm_fill_fw_dig_info(dm, &enable, para4, para8); -+ break; -+ default: -+ pr_debug("[Warning] %s\n", __func__); -+ return; -+ } -+ -+ h2c_val[0] = (u8)((fun_idx & 0x3f) | (enable << 6)); -+ h2c_val[1] = para8[0]; -+ h2c_val[2] = para8[1]; -+ h2c_val[3] = para8[2]; -+ h2c_val[4] = para8[3]; -+ h2c_val[5] = (para4[0] & 0xf) | ((para4[1] & 0xf) << 3); -+ h2c_val[6] = (para4[2] & 0xf) | ((para4[3] & 0xf) << 3); -+ -+ PHYDM_DBG(dm, DBG_FW_DM, -+ "H2C[0x59] fun_idx=%d,en=%d,para8={%x %x %x %x},para4={%x %x %x %x}\n", -+ fun_idx, enable, -+ para8[0], para8[1], para8[2], para8[3], -+ para4[0], para4[1], para4[2], para4[3]); -+ -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_DM_CTRL, H2C_MAX_LENGTH, h2c_val); -+} -+ -+/*@ -+ * Init /.. Fixed HW value. Only init time. -+ */ -+void odm_cmn_info_init(struct dm_struct *dm, enum odm_cmninfo cmn_info, -+ u64 value) -+{ -+ /* This section is used for init value */ -+ switch (cmn_info) { -+ /* @Fixed ODM value. */ -+ case ODM_CMNINFO_ABILITY: -+ dm->support_ability = (u64)value; -+ break; -+ -+ case ODM_CMNINFO_RF_TYPE: -+ dm->rf_type = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_PLATFORM: -+ dm->support_platform = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_INTERFACE: -+ dm->support_interface = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_MP_TEST_CHIP: -+ dm->is_mp_chip = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_IC_TYPE: -+ dm->support_ic_type = (u32)value; -+ break; -+ -+ case ODM_CMNINFO_CUT_VER: -+ dm->cut_version = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_FAB_VER: -+ dm->fab_version = (u8)value; -+ break; -+ case ODM_CMNINFO_FW_VER: -+ dm->fw_version = (u8)value; -+ break; -+ case ODM_CMNINFO_FW_SUB_VER: -+ dm->fw_sub_version = (u8)value; -+ break; -+ case ODM_CMNINFO_RFE_TYPE: -+#if (RTL8821C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8821C) -+ dm->rfe_type_expand = (u8)value; -+ else -+#endif -+ dm->rfe_type = (u8)value; -+ -+#ifdef CONFIG_RFE_BY_HW_INFO -+ phydm_init_hw_info_by_rfe(dm); -+#endif -+ break; -+ -+ case ODM_CMNINFO_RF_ANTENNA_TYPE: -+ dm->ant_div_type = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH: -+ dm->with_extenal_ant_switch = (u8)value; -+ break; -+ -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ case ODM_CMNINFO_BE_FIX_TX_ANT: -+ dm->dm_fat_table.b_fix_tx_ant = (u8)value; -+ break; -+#endif -+ -+ case ODM_CMNINFO_BOARD_TYPE: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->board_type = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_PACKAGE_TYPE: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->package_type = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_EXT_LNA: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->ext_lna = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_5G_EXT_LNA: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->ext_lna_5g = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_EXT_PA: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->ext_pa = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_5G_EXT_PA: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->ext_pa_5g = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_GPA: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->type_gpa = (u16)value; -+ break; -+ -+ case ODM_CMNINFO_APA: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->type_apa = (u16)value; -+ break; -+ -+ case ODM_CMNINFO_GLNA: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->type_glna = (u16)value; -+ break; -+ -+ case ODM_CMNINFO_ALNA: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->type_alna = (u16)value; -+ break; -+ -+ case ODM_CMNINFO_EXT_TRSW: -+ if (!dm->is_init_hw_info_by_rfe) -+ dm->ext_trsw = (u8)value; -+ break; -+ case ODM_CMNINFO_EXT_LNA_GAIN: -+ dm->ext_lna_gain = (u8)value; -+ break; -+ case ODM_CMNINFO_PATCH_ID: -+ dm->iot_table.win_patch_id = (u8)value; -+ break; -+ case ODM_CMNINFO_BINHCT_TEST: -+ dm->is_in_hct_test = (boolean)value; -+ break; -+ case ODM_CMNINFO_BWIFI_TEST: -+ dm->wifi_test = (u8)value; -+ break; -+ case ODM_CMNINFO_SMART_CONCURRENT: -+ dm->is_dual_mac_smart_concurrent = (boolean)value; -+ break; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ case ODM_CMNINFO_CONFIG_BB_RF: -+ dm->config_bbrf = (boolean)value; -+ break; -+#endif -+ case ODM_CMNINFO_IQKPAOFF: -+ dm->rf_calibrate_info.is_iqk_pa_off = (boolean)value; -+ break; -+ case ODM_CMNINFO_REGRFKFREEENABLE: -+ dm->rf_calibrate_info.reg_rf_kfree_enable = (u8)value; -+ break; -+ case ODM_CMNINFO_RFKFREEENABLE: -+ dm->rf_calibrate_info.rf_kfree_enable = (u8)value; -+ break; -+ case ODM_CMNINFO_NORMAL_RX_PATH_CHANGE: -+ dm->normal_rx_path = (u8)value; -+ break; -+ case ODM_CMNINFO_VALID_PATH_SET: -+ dm->valid_path_set = (u8)value; -+ break; -+ case ODM_CMNINFO_EFUSE0X3D8: -+ dm->efuse0x3d8 = (u8)value; -+ break; -+ case ODM_CMNINFO_EFUSE0X3D7: -+ dm->efuse0x3d7 = (u8)value; -+ break; -+ case ODM_CMNINFO_ADVANCE_OTA: -+ dm->p_advance_ota = (u8)value; -+ break; -+ -+#ifdef CONFIG_PHYDM_DFS_MASTER -+ case ODM_CMNINFO_DFS_REGION_DOMAIN: -+ dm->dfs_region_domain = (u8)value; -+ break; -+#endif -+ case ODM_CMNINFO_SOFT_AP_SPECIAL_SETTING: -+ dm->soft_ap_special_setting = (u32)value; -+ break; -+ -+ case ODM_CMNINFO_X_CAP_SETTING: -+ dm->dm_cfo_track.crystal_cap_default = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_DPK_EN: -+ /*@dm->dpk_en = (u1Byte)value;*/ -+ halrf_cmn_info_set(dm, HALRF_CMNINFO_DPK_EN, (u64)value); -+ break; -+ -+ case ODM_CMNINFO_HP_HWID: -+ dm->hp_hw_id = (boolean)value; -+ break; -+ case ODM_CMNINFO_TSSI_ENABLE: -+ dm->en_tssi_mode = (u8)value; -+ break; -+ case ODM_CMNINFO_DIS_DPD: -+ dm->en_dis_dpd = (boolean)value; -+ break; -+ case ODM_CMNINFO_EN_AUTO_BW_TH: -+ dm->en_auto_bw_th = (u8)value; -+ break; -+#if (RTL8721D_SUPPORT) -+ case ODM_CMNINFO_POWER_VOLTAGE: -+ dm->power_voltage = (u8)value; -+ break; -+ case ODM_CMNINFO_ANTDIV_GPIO: -+ dm->antdiv_gpio = (u8)value; -+ break; -+ case ODM_CMNINFO_PEAK_DETECT_MODE: -+ dm->peak_detect_mode = (u8)value; -+ break; -+#endif -+ default: -+ break; -+ } -+} -+ -+void odm_cmn_info_hook(struct dm_struct *dm, enum odm_cmninfo cmn_info, -+ void *value) -+{ -+ /* @Hook call by reference pointer. */ -+ switch (cmn_info) { -+ /* @Dynamic call by reference pointer. */ -+ case ODM_CMNINFO_TX_UNI: -+ dm->num_tx_bytes_unicast = (u64 *)value; -+ break; -+ -+ case ODM_CMNINFO_RX_UNI: -+ dm->num_rx_bytes_unicast = (u64 *)value; -+ break; -+ -+ case ODM_CMNINFO_BAND: -+ dm->band_type = (u8 *)value; -+ break; -+ -+ case ODM_CMNINFO_SEC_CHNL_OFFSET: -+ dm->sec_ch_offset = (u8 *)value; -+ break; -+ -+ case ODM_CMNINFO_SEC_MODE: -+ dm->security = (u8 *)value; -+ break; -+ -+ case ODM_CMNINFO_BW: -+ dm->band_width = (u8 *)value; -+ break; -+ -+ case ODM_CMNINFO_CHNL: -+ dm->channel = (u8 *)value; -+ break; -+ -+ case ODM_CMNINFO_SCAN: -+ dm->is_scan_in_process = (boolean *)value; -+ break; -+ -+ case ODM_CMNINFO_POWER_SAVING: -+ dm->is_power_saving = (boolean *)value; -+ break; -+ -+ case ODM_CMNINFO_TDMA: -+ dm->is_tdma = (boolean *)value; -+ break; -+ -+ case ODM_CMNINFO_ONE_PATH_CCA: -+ dm->one_path_cca = (u8 *)value; -+ break; -+ -+ case ODM_CMNINFO_DRV_STOP: -+ dm->is_driver_stopped = (boolean *)value; -+ break; -+ case ODM_CMNINFO_INIT_ON: -+ dm->pinit_adpt_in_progress = (boolean *)value; -+ break; -+ -+ case ODM_CMNINFO_ANT_TEST: -+ dm->antenna_test = (u8 *)value; -+ break; -+ -+ case ODM_CMNINFO_NET_CLOSED: -+ dm->is_net_closed = (boolean *)value; -+ break; -+ -+ case ODM_CMNINFO_FORCED_RATE: -+ dm->forced_data_rate = (u16 *)value; -+ break; -+ case ODM_CMNINFO_ANT_DIV: -+ dm->enable_antdiv = (u8 *)value; -+ break; -+ case ODM_CMNINFO_PATH_DIV: -+ dm->enable_pathdiv = (u8 *)value; -+ break; -+ case ODM_CMNINFO_ADAPTIVE_SOML: -+ dm->en_adap_soml = (u8 *)value; -+ break; -+ case ODM_CMNINFO_ADAPTIVITY: -+ dm->edcca_mode = (u8 *)value; -+ break; -+ -+ case ODM_CMNINFO_P2P_LINK: -+ dm->dm_dig_table.is_p2p_in_process = (u8 *)value; -+ break; -+ -+ case ODM_CMNINFO_IS1ANTENNA: -+ dm->is_1_antenna = (boolean *)value; -+ break; -+ -+ case ODM_CMNINFO_RFDEFAULTPATH: -+ dm->rf_default_path = (u8 *)value; -+ break; -+ -+ case ODM_CMNINFO_FCS_MODE: /* @fast channel switch (= MCC mode)*/ -+ dm->is_fcs_mode_enable = (boolean *)value; -+ break; -+ -+ case ODM_CMNINFO_HUBUSBMODE: -+ dm->hub_usb_mode = (u8 *)value; -+ break; -+ case ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS: -+ dm->is_fw_dw_rsvd_page_in_progress = (boolean *)value; -+ break; -+ case ODM_CMNINFO_TX_TP: -+ dm->current_tx_tp = (u32 *)value; -+ break; -+ case ODM_CMNINFO_RX_TP: -+ dm->current_rx_tp = (u32 *)value; -+ break; -+ case ODM_CMNINFO_SOUNDING_SEQ: -+ dm->sounding_seq = (u8 *)value; -+ break; -+#ifdef CONFIG_PHYDM_DFS_MASTER -+ case ODM_CMNINFO_DFS_MASTER_ENABLE: -+ dm->dfs_master_enabled = (u8 *)value; -+ break; -+#endif -+ -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ case ODM_CMNINFO_FORCE_TX_ANT_BY_TXDESC: -+ dm->dm_fat_table.p_force_tx_by_desc = (u8 *)value; -+ break; -+ case ODM_CMNINFO_SET_S0S1_DEFAULT_ANTENNA: -+ dm->dm_fat_table.p_default_s0_s1 = (u8 *)value; -+ break; -+ case ODM_CMNINFO_BF_ANTDIV_DECISION: -+ dm->dm_fat_table.is_no_csi_feedback = (boolean *)value; -+ break; -+#endif -+ -+ case ODM_CMNINFO_SOFT_AP_MODE: -+ dm->soft_ap_mode = (u32 *)value; -+ break; -+ case ODM_CMNINFO_MP_MODE: -+ dm->mp_mode = (u8 *)value; -+ break; -+ case ODM_CMNINFO_INTERRUPT_MASK: -+ dm->interrupt_mask = (u32 *)value; -+ break; -+ case ODM_CMNINFO_BB_OPERATION_MODE: -+ dm->bb_op_mode = (u8 *)value; -+ break; -+ case ODM_CMNINFO_MANUAL_SUPPORTABILITY: -+ dm->manual_supportability = (u32 *)value; -+ break; -+ case ODM_CMNINFO_EN_DYM_BW_INDICATION: -+ dm->dis_dym_bw_indication = (u8 *)value; -+ default: -+ /*do nothing*/ -+ break; -+ } -+} -+ -+/*@ -+ * Update band/CHannel/.. The values are dynamic but non-per-packet. -+ */ -+void odm_cmn_info_update(struct dm_struct *dm, u32 cmn_info, u64 value) -+{ -+ /* This init variable may be changed in run time. */ -+ switch (cmn_info) { -+ case ODM_CMNINFO_LINK_IN_PROGRESS: -+ dm->is_link_in_process = (boolean)value; -+ break; -+ -+ case ODM_CMNINFO_ABILITY: -+ dm->support_ability = (u64)value; -+ break; -+ -+ case ODM_CMNINFO_RF_TYPE: -+ dm->rf_type = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_WIFI_DIRECT: -+ dm->is_wifi_direct = (boolean)value; -+ break; -+ -+ case ODM_CMNINFO_WIFI_DISPLAY: -+ dm->is_wifi_display = (boolean)value; -+ break; -+ -+ case ODM_CMNINFO_LINK: -+ dm->is_linked = (boolean)value; -+ break; -+ -+ case ODM_CMNINFO_CMW500LINK: -+ dm->iot_table.is_linked_cmw500 = (boolean)value; -+ break; -+ -+ case ODM_CMNINFO_STATION_STATE: -+ dm->bsta_state = (boolean)value; -+ break; -+ -+ case ODM_CMNINFO_RSSI_MIN: -+#if 0 -+ dm->rssi_min = (u8)value; -+#endif -+ break; -+ -+ case ODM_CMNINFO_RSSI_MIN_BY_PATH: -+ dm->rssi_min_by_path = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_DBG_COMP: -+ dm->debug_components = (u64)value; -+ break; -+ -+#ifdef ODM_CONFIG_BT_COEXIST -+ /* The following is for BT HS mode and BT coexist mechanism. */ -+ case ODM_CMNINFO_BT_ENABLED: -+ dm->bt_info_table.is_bt_enabled = (boolean)value; -+ break; -+ -+ case ODM_CMNINFO_BT_HS_CONNECT_PROCESS: -+ dm->bt_info_table.is_bt_connect_process = (boolean)value; -+ break; -+ -+ case ODM_CMNINFO_BT_HS_RSSI: -+ dm->bt_info_table.bt_hs_rssi = (u8)value; -+ break; -+ -+ case ODM_CMNINFO_BT_OPERATION: -+ dm->bt_info_table.is_bt_hs_operation = (boolean)value; -+ break; -+ -+ case ODM_CMNINFO_BT_LIMITED_DIG: -+ dm->bt_info_table.is_bt_limited_dig = (boolean)value; -+ break; -+#endif -+ -+ case ODM_CMNINFO_AP_TOTAL_NUM: -+ dm->ap_total_num = (u8)value; -+ break; -+ -+#ifdef CONFIG_PHYDM_DFS_MASTER -+ case ODM_CMNINFO_DFS_REGION_DOMAIN: -+ dm->dfs_region_domain = (u8)value; -+ break; -+#endif -+ -+ case ODM_CMNINFO_BT_CONTINUOUS_TURN: -+ dm->is_bt_continuous_turn = (boolean)value; -+ break; -+ case ODM_CMNINFO_IS_DOWNLOAD_FW: -+ dm->is_download_fw = (boolean)value; -+ break; -+ case ODM_CMNINFO_PHYDM_PATCH_ID: -+ dm->iot_table.phydm_patch_id = (u32)value; -+ break; -+ case ODM_CMNINFO_RRSR_VAL: -+ dm->dm_ra_table.rrsr_val_init = (u32)value; -+ break; -+ case ODM_CMNINFO_LINKED_BF_SUPPORT: -+ dm->linked_bf_support = (u8)value; -+ break; -+ case ODM_CMNINFO_FLATNESS_TYPE: -+ dm->flatness_type = (u8)value; -+ break; -+ case ODM_CMNINFO_TSSI_ENABLE: -+ dm->en_tssi_mode = (u8)value; -+ break; -+ default: -+ break; -+ } -+} -+ -+u32 phydm_cmn_info_query(struct dm_struct *dm, enum phydm_info_query info_type) -+{ -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct ccx_info *ccx_info = &dm->dm_ccx_info; -+ -+ switch (info_type) { -+ /*@=== [FA Relative] ===========================================*/ -+ case PHYDM_INFO_FA_OFDM: -+ return fa_t->cnt_ofdm_fail; -+ -+ case PHYDM_INFO_FA_CCK: -+ return fa_t->cnt_cck_fail; -+ -+ case PHYDM_INFO_FA_TOTAL: -+ return fa_t->cnt_all; -+ -+ case PHYDM_INFO_CCA_OFDM: -+ return fa_t->cnt_ofdm_cca; -+ -+ case PHYDM_INFO_CCA_CCK: -+ return fa_t->cnt_cck_cca; -+ -+ case PHYDM_INFO_CCA_ALL: -+ return fa_t->cnt_cca_all; -+ -+ case PHYDM_INFO_CRC32_OK_VHT: -+ return fa_t->cnt_vht_crc32_ok; -+ -+ case PHYDM_INFO_CRC32_OK_HT: -+ return fa_t->cnt_ht_crc32_ok; -+ -+ case PHYDM_INFO_CRC32_OK_LEGACY: -+ return fa_t->cnt_ofdm_crc32_ok; -+ -+ case PHYDM_INFO_CRC32_OK_CCK: -+ return fa_t->cnt_cck_crc32_ok; -+ -+ case PHYDM_INFO_CRC32_ERROR_VHT: -+ return fa_t->cnt_vht_crc32_error; -+ -+ case PHYDM_INFO_CRC32_ERROR_HT: -+ return fa_t->cnt_ht_crc32_error; -+ -+ case PHYDM_INFO_CRC32_ERROR_LEGACY: -+ return fa_t->cnt_ofdm_crc32_error; -+ -+ case PHYDM_INFO_CRC32_ERROR_CCK: -+ return fa_t->cnt_cck_crc32_error; -+ -+ case PHYDM_INFO_EDCCA_FLAG: -+ return fa_t->edcca_flag; -+ -+ case PHYDM_INFO_OFDM_ENABLE: -+ return fa_t->ofdm_block_enable; -+ -+ case PHYDM_INFO_CCK_ENABLE: -+ return fa_t->cck_block_enable; -+ -+ case PHYDM_INFO_DBG_PORT_0: -+ return fa_t->dbg_port0; -+ -+ case PHYDM_INFO_CRC32_OK_HT_AGG: -+ return fa_t->cnt_ht_crc32_ok_agg; -+ -+ case PHYDM_INFO_CRC32_ERROR_HT_AGG: -+ return fa_t->cnt_ht_crc32_error_agg; -+ -+ /*@=== [DIG] ================================================*/ -+ -+ case PHYDM_INFO_CURR_IGI: -+ return dig_t->cur_ig_value; -+ -+ /*@=== [RSSI] ===============================================*/ -+ case PHYDM_INFO_RSSI_MIN: -+ return (u32)dm->rssi_min; -+ -+ case PHYDM_INFO_RSSI_MAX: -+ return (u32)dm->rssi_max; -+ -+ case PHYDM_INFO_CLM_RATIO: -+ return (u32)ccx_info->clm_ratio; -+ case PHYDM_INFO_NHM_RATIO: -+ return (u32)ccx_info->nhm_ratio; -+ case PHYDM_INFO_NHM_NOISE_PWR: -+ return (u32)ccx_info->nhm_level; -+ case PHYDM_INFO_NHM_PWR: -+ return (u32)ccx_info->nhm_pwr; -+ case PHYDM_INFO_NHM_ENV_RATIO: -+ return (u32)ccx_info->nhm_env_ratio; -+ -+ default: -+ return 0xffffffff; -+ } -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void odm_init_all_work_items(struct dm_struct *dm) -+{ -+ void *adapter = dm->adapter; -+#if USE_WORKITEM -+ -+#ifdef CONFIG_ADAPTIVE_SOML -+ odm_initialize_work_item(dm, -+ &dm->dm_soml_table.phydm_adaptive_soml_workitem, -+ (RT_WORKITEM_CALL_BACK)phydm_adaptive_soml_workitem_callback, -+ (void *)adapter, -+ "AdaptiveSOMLWorkitem"); -+#endif -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ odm_initialize_work_item(dm, -+ &dm->phydm_evm_antdiv_workitem, -+ (RT_WORKITEM_CALL_BACK)phydm_evm_antdiv_workitem_callback, -+ (void *)adapter, -+ "EvmAntdivWorkitem"); -+#endif -+ -+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_initialize_work_item(dm, -+ &dm->dm_swat_table.phydm_sw_antenna_switch_workitem, -+ (RT_WORKITEM_CALL_BACK)odm_sw_antdiv_workitem_callback, -+ (void *)adapter, -+ "AntennaSwitchWorkitem"); -+#endif -+#if (defined(CONFIG_HL_SMART_ANTENNA)) -+ odm_initialize_work_item(dm, -+ &dm->dm_sat_table.hl_smart_antenna_workitem, -+ (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback, -+ (void *)adapter, -+ "hl_smart_ant_workitem"); -+ -+ odm_initialize_work_item(dm, -+ &dm->dm_sat_table.hl_smart_antenna_decision_workitem, -+ (RT_WORKITEM_CALL_BACK)phydm_beam_decision_workitem_callback, -+ (void *)adapter, -+ "hl_smart_ant_decision_workitem"); -+#endif -+ -+ odm_initialize_work_item( -+ dm, -+ &dm->ra_rpt_workitem, -+ (RT_WORKITEM_CALL_BACK)halrf_update_init_rate_work_item_callback, -+ (void *)adapter, -+ "ra_rpt_workitem"); -+ -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ odm_initialize_work_item( -+ dm, -+ &dm->fast_ant_training_workitem, -+ (RT_WORKITEM_CALL_BACK)odm_fast_ant_training_work_item_callback, -+ (void *)adapter, -+ "fast_ant_training_workitem"); -+#endif -+ -+#endif /*#if USE_WORKITEM*/ -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ odm_initialize_work_item( -+ dm, -+ &dm->beamforming_info.txbf_info.txbf_enter_work_item, -+ (RT_WORKITEM_CALL_BACK)hal_com_txbf_enter_work_item_callback, -+ (void *)adapter, -+ "txbf_enter_work_item"); -+ -+ odm_initialize_work_item( -+ dm, -+ &dm->beamforming_info.txbf_info.txbf_leave_work_item, -+ (RT_WORKITEM_CALL_BACK)hal_com_txbf_leave_work_item_callback, -+ (void *)adapter, -+ "txbf_leave_work_item"); -+ -+ odm_initialize_work_item( -+ dm, -+ &dm->beamforming_info.txbf_info.txbf_fw_ndpa_work_item, -+ (RT_WORKITEM_CALL_BACK)hal_com_txbf_fw_ndpa_work_item_callback, -+ (void *)adapter, -+ "txbf_fw_ndpa_work_item"); -+ -+ odm_initialize_work_item( -+ dm, -+ &dm->beamforming_info.txbf_info.txbf_clk_work_item, -+ (RT_WORKITEM_CALL_BACK)hal_com_txbf_clk_work_item_callback, -+ (void *)adapter, -+ "txbf_clk_work_item"); -+ -+ odm_initialize_work_item( -+ dm, -+ &dm->beamforming_info.txbf_info.txbf_rate_work_item, -+ (RT_WORKITEM_CALL_BACK)hal_com_txbf_rate_work_item_callback, -+ (void *)adapter, -+ "txbf_rate_work_item"); -+ -+ odm_initialize_work_item( -+ dm, -+ &dm->beamforming_info.txbf_info.txbf_status_work_item, -+ (RT_WORKITEM_CALL_BACK)hal_com_txbf_status_work_item_callback, -+ (void *)adapter, -+ "txbf_status_work_item"); -+ -+ odm_initialize_work_item( -+ dm, -+ &dm->beamforming_info.txbf_info.txbf_reset_tx_path_work_item, -+ (RT_WORKITEM_CALL_BACK)hal_com_txbf_reset_tx_path_work_item_callback, -+ (void *)adapter, -+ "txbf_reset_tx_path_work_item"); -+ -+ odm_initialize_work_item( -+ dm, -+ &dm->beamforming_info.txbf_info.txbf_get_tx_rate_work_item, -+ (RT_WORKITEM_CALL_BACK)hal_com_txbf_get_tx_rate_work_item_callback, -+ (void *)adapter, -+ "txbf_get_tx_rate_work_item"); -+#endif -+ -+#if (PHYDM_LA_MODE_SUPPORT == 1) -+ odm_initialize_work_item( -+ dm, -+ &dm->adcsmp.adc_smp_work_item, -+ (RT_WORKITEM_CALL_BACK)adc_smp_work_item_callback, -+ (void *)adapter, -+ "adc_smp_work_item"); -+ -+ odm_initialize_work_item( -+ dm, -+ &dm->adcsmp.adc_smp_work_item_1, -+ (RT_WORKITEM_CALL_BACK)adc_smp_work_item_callback, -+ (void *)adapter, -+ "adc_smp_work_item_1"); -+#endif -+} -+ -+void odm_free_all_work_items(struct dm_struct *dm) -+{ -+#if USE_WORKITEM -+ -+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_free_work_item(&dm->dm_swat_table.phydm_sw_antenna_switch_workitem); -+#endif -+ -+#ifdef CONFIG_ADAPTIVE_SOML -+ odm_free_work_item(&dm->dm_soml_table.phydm_adaptive_soml_workitem); -+#endif -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ odm_free_work_item(&dm->phydm_evm_antdiv_workitem); -+#endif -+ -+#if (defined(CONFIG_HL_SMART_ANTENNA)) -+ odm_free_work_item(&dm->dm_sat_table.hl_smart_antenna_workitem); -+ odm_free_work_item(&dm->dm_sat_table.hl_smart_antenna_decision_workitem); -+#endif -+ -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ odm_free_work_item(&dm->fast_ant_training_workitem); -+#endif -+ odm_free_work_item(&dm->ra_rpt_workitem); -+/*odm_free_work_item((&dm->sbdcnt_workitem));*/ -+#endif -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_enter_work_item)); -+ odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_leave_work_item)); -+ odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_fw_ndpa_work_item)); -+ odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_clk_work_item)); -+ odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_rate_work_item)); -+ odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_status_work_item)); -+ odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_reset_tx_path_work_item)); -+ odm_free_work_item((&dm->beamforming_info.txbf_info.txbf_get_tx_rate_work_item)); -+#endif -+ -+#if (PHYDM_LA_MODE_SUPPORT == 1) -+ odm_free_work_item((&dm->adcsmp.adc_smp_work_item)); -+ odm_free_work_item((&dm->adcsmp.adc_smp_work_item_1)); -+#endif -+} -+#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ -+ -+void odm_init_all_timers(struct dm_struct *dm) -+{ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ odm_ant_div_timers(dm, INIT_ANTDIV_TIMMER); -+#endif -+#if (defined(PHYDM_TDMA_DIG_SUPPORT)) -+#ifdef IS_USE_NEW_TDMA -+ phydm_tdma_dig_timers(dm, INIT_TDMA_DIG_TIMMER); -+#endif -+#endif -+#ifdef CONFIG_ADAPTIVE_SOML -+ phydm_adaptive_soml_timers(dm, INIT_SOML_TIMMER); -+#endif -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+#ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+ phydm_lna_sat_chk_timers(dm, INIT_LNA_SAT_CHK_TIMMER); -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ odm_initialize_timer(dm, &dm->sbdcnt_timer, -+ (void *)phydm_sbd_callback, NULL, "SbdTimer"); -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ odm_initialize_timer(dm, &dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer, -+ (void *)hal_com_txbf_fw_ndpa_timer_callback, NULL, -+ "txbf_fw_ndpa_timer"); -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ odm_initialize_timer(dm, &dm->beamforming_info.beamforming_timer, -+ (void *)beamforming_sw_timer_callback, NULL, -+ "beamforming_timer"); -+#endif -+#endif -+} -+ -+void odm_cancel_all_timers(struct dm_struct *dm) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ /* @2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in win7*/ -+ if (dm->adapter == NULL) -+ return; -+#endif -+ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ odm_ant_div_timers(dm, CANCEL_ANTDIV_TIMMER); -+#endif -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+#ifdef IS_USE_NEW_TDMA -+ phydm_tdma_dig_timers(dm, CANCEL_TDMA_DIG_TIMMER); -+#endif -+#endif -+#ifdef CONFIG_ADAPTIVE_SOML -+ phydm_adaptive_soml_timers(dm, CANCEL_SOML_TIMMER); -+#endif -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+#ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+ phydm_lna_sat_chk_timers(dm, CANCEL_LNA_SAT_CHK_TIMMER); -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ odm_cancel_timer(dm, &dm->sbdcnt_timer); -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ odm_cancel_timer(dm, &dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer); -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ odm_cancel_timer(dm, &dm->beamforming_info.beamforming_timer); -+#endif -+#endif -+} -+ -+void odm_release_all_timers(struct dm_struct *dm) -+{ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ odm_ant_div_timers(dm, RELEASE_ANTDIV_TIMMER); -+#endif -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+#ifdef IS_USE_NEW_TDMA -+ phydm_tdma_dig_timers(dm, RELEASE_TDMA_DIG_TIMMER); -+#endif -+#endif -+#ifdef CONFIG_ADAPTIVE_SOML -+ phydm_adaptive_soml_timers(dm, RELEASE_SOML_TIMMER); -+#endif -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+#ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+ phydm_lna_sat_chk_timers(dm, RELEASE_LNA_SAT_CHK_TIMMER); -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ odm_release_timer(dm, &dm->sbdcnt_timer); -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ odm_release_timer(dm, &dm->beamforming_info.txbf_info.txbf_fw_ndpa_timer); -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ odm_release_timer(dm, &dm->beamforming_info.beamforming_timer); -+#endif -+#endif -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+void odm_init_all_threads( -+ struct dm_struct *dm) -+{ -+#ifdef TPT_THREAD -+ k_tpt_task_init(dm->priv); -+#endif -+} -+ -+void odm_stop_all_threads( -+ struct dm_struct *dm) -+{ -+#ifdef TPT_THREAD -+ k_tpt_task_stop(dm->priv); -+#endif -+} -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+/* @Justin: According to the current RRSI to adjust Response Frame TX power, -+ * 2012/11/05 -+ */ -+void odm_dtc(struct dm_struct *dm) -+{ -+#ifdef CONFIG_DM_RESP_TXAGC -+/* RSSI higher than this value, start to decade TX power */ -+#define DTC_BASE 35 -+ -+/* RSSI lower than this value, start to increase TX power */ -+#define DTC_DWN_BASE (DTC_BASE - 5) -+ -+ /* RSSI vs TX power step mapping: decade TX power */ -+ static const u8 dtc_table_down[] = { -+ DTC_BASE, -+ (DTC_BASE + 5), -+ (DTC_BASE + 10), -+ (DTC_BASE + 15), -+ (DTC_BASE + 20), -+ (DTC_BASE + 25)}; -+ -+ /* RSSI vs TX power step mapping: increase TX power */ -+ static const u8 dtc_table_up[] = { -+ DTC_DWN_BASE, -+ (DTC_DWN_BASE - 5), -+ (DTC_DWN_BASE - 10), -+ (DTC_DWN_BASE - 15), -+ (DTC_DWN_BASE - 15), -+ (DTC_DWN_BASE - 20), -+ (DTC_DWN_BASE - 20), -+ (DTC_DWN_BASE - 25), -+ (DTC_DWN_BASE - 25), -+ (DTC_DWN_BASE - 30), -+ (DTC_DWN_BASE - 35)}; -+ -+ u8 i; -+ u8 dtc_steps = 0; -+ u8 sign; -+ u8 resp_txagc = 0; -+ -+ if (dm->rssi_min > DTC_BASE) { -+ /* need to decade the CTS TX power */ -+ sign = 1; -+ for (i = 0; i < ARRAY_SIZE(dtc_table_down); i++) { -+ if (dtc_table_down[i] >= dm->rssi_min || dtc_steps >= 6) -+ break; -+ else -+ dtc_steps++; -+ } -+ } -+#if 0 -+ else if (dm->rssi_min > DTC_DWN_BASE) { -+ /* needs to increase the CTS TX power */ -+ sign = 0; -+ dtc_steps = 1; -+ for (i = 0; i < ARRAY_SIZE(dtc_table_up); i++) { -+ if (dtc_table_up[i] <= dm->rssi_min || dtc_steps >= 10) -+ break; -+ else -+ dtc_steps++; -+ } -+ } -+#endif -+ else { -+ sign = 0; -+ dtc_steps = 0; -+ } -+ -+ resp_txagc = dtc_steps | (sign << 4); -+ resp_txagc = resp_txagc | (resp_txagc << 5); -+ odm_write_1byte(dm, 0x06d9, resp_txagc); -+ -+ PHYDM_DBG(dm, ODM_COMP_PWR_TRAIN, -+ "%s rssi_min:%u, set RESP_TXAGC to %s %u\n", __func__, -+ dm->rssi_min, sign ? "minus" : "plus", dtc_steps); -+#endif /* @CONFIG_RESP_TXAGC_ADJUST */ -+} -+ -+#endif /* @#if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ -+ -+/*@<20170126, BB-Kevin>8188F D-CUT DC cancellation and 8821C*/ -+void phydm_dc_cancellation(struct dm_struct *dm) -+{ -+#ifdef PHYDM_DC_CANCELLATION -+ u32 offset_i_hex[PHYDM_MAX_RF_PATH] = {0}; -+ u32 offset_q_hex[PHYDM_MAX_RF_PATH] = {0}; -+ u32 reg_value32[PHYDM_MAX_RF_PATH] = {0}; -+ u8 path = RF_PATH_A; -+ u8 set_result; -+ -+ if (!(dm->support_ic_type & ODM_DC_CANCELLATION_SUPPORT)) -+ return; -+ if ((dm->support_ic_type & ODM_RTL8188F) && -+ dm->cut_version < ODM_CUT_D) -+ return; -+ if ((dm->support_ic_type & ODM_RTL8192F) && -+ dm->cut_version == ODM_CUT_A) -+ return; -+ if (*dm->band_width == CHANNEL_WIDTH_5) -+ return; -+ if (*dm->band_width == CHANNEL_WIDTH_10) -+ return; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__); -+ -+ /*@DC_Estimation (only for 2x2 ic now) */ -+ -+ for (path = RF_PATH_A; path < PHYDM_MAX_RF_PATH; path++) { -+ if (path > RF_PATH_A && -+ dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8188F | -+ ODM_RTL8710B | ODM_RTL8721D | -+ ODM_RTL8710C | ODM_RTL8723D)) -+ break; -+ else if (path > RF_PATH_B && -+ dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8192F)) -+ break; -+ if (phydm_stop_ic_trx(dm, PHYDM_SET) == PHYDM_SET_FAIL) { -+ PHYDM_DBG(dm, ODM_COMP_API, "STOP_TRX_FAIL\n"); -+ return; -+ } -+ odm_write_dig(dm, 0x7e); -+ /*@Disable LNA*/ -+ if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8721D | -+ ODM_RTL8710C)) -+ halrf_rf_lna_setting(dm, HALRF_LNA_DISABLE); -+ /*Turn off 3-wire*/ -+ phydm_stop_3_wire(dm, PHYDM_SET); -+ if (dm->support_ic_type & (ODM_RTL8188F | ODM_RTL8723D | -+ ODM_RTL8710B)) { -+ /*set debug port to 0x235*/ -+ if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x235)) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set Debug port Fail\n"); -+ return; -+ } -+ } else if (dm->support_ic_type & (ODM_RTL8721D | -+ ODM_RTL8710C)) { -+ /*set debug port to 0x200*/ -+ if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_2, 0x200)) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set Debug port Fail\n"); -+ return; -+ } -+ } else if (dm->support_ic_type & ODM_RTL8821C) { -+ if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x200)) { -+ /*set debug port to 0x200*/ -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set Debug port Fail\n"); -+ return; -+ } -+ phydm_bb_dbg_port_header_sel(dm, 0x0); -+ } else if (dm->support_ic_type & ODM_RTL8822B) { -+ if (path == RF_PATH_A && -+ !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x200)) { -+ /*set debug port to 0x200*/ -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set Debug port Fail\n"); -+ return; -+ } -+ if (path == RF_PATH_B && -+ !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x202)) { -+ /*set debug port to 0x200*/ -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set Debug port Fail\n"); -+ return; -+ } -+ phydm_bb_dbg_port_header_sel(dm, 0x0); -+ } else if (dm->support_ic_type & ODM_RTL8192F) { -+ if (path == RF_PATH_A && -+ !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x235)) { -+ /*set debug port to 0x235*/ -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set Debug port Fail\n"); -+ return; -+ } -+ if (path == RF_PATH_B && -+ !phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x23d)) { -+ /*set debug port to 0x23d*/ -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set Debug port Fail\n"); -+ return; -+ } -+ } -+ -+ /*@disable CCK DCNF*/ -+ odm_set_bb_reg(dm, R_0xa78, MASKBYTE1, 0x0); -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "DC cancellation Begin!!!\n"); -+ -+ phydm_stop_ck320(dm, true); /*stop ck320*/ -+ -+ /* the same debug port both for path-a and path-b*/ -+ reg_value32[path] = phydm_get_bb_dbg_port_val(dm); -+ -+ phydm_stop_ck320(dm, false); /*start ck320*/ -+ -+ phydm_release_bb_dbg_port(dm); -+ /* @Turn on 3-wire*/ -+ phydm_stop_3_wire(dm, PHYDM_REVERT); -+ /* @Enable LNA*/ -+ if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8721D | -+ ODM_RTL8710C)) -+ halrf_rf_lna_setting(dm, HALRF_LNA_ENABLE); -+ -+ odm_write_dig(dm, 0x20); -+ -+ set_result = phydm_stop_ic_trx(dm, PHYDM_REVERT); -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "DC cancellation OK!!!\n"); -+ } -+ -+ /*@DC_Cancellation*/ -+ /*@DC compensation to CCK data path*/ -+ odm_set_bb_reg(dm, R_0xa9c, BIT(20), 0x1); -+ if (dm->support_ic_type & (ODM_RTL8188F | ODM_RTL8723D | -+ ODM_RTL8710B)) { -+ offset_i_hex[0] = (reg_value32[0] & 0xffc0000) >> 18; -+ offset_q_hex[0] = (reg_value32[0] & 0x3ff00) >> 8; -+ -+ /*@Before filling into registers, -+ *offset should be multiplexed (-1) -+ */ -+ offset_i_hex[0] = (offset_i_hex[0] >= 0x200) ? -+ (0x400 - offset_i_hex[0]) : -+ (0x1ff - offset_i_hex[0]); -+ offset_q_hex[0] = (offset_q_hex[0] >= 0x200) ? -+ (0x400 - offset_q_hex[0]) : -+ (0x1ff - offset_q_hex[0]); -+ -+ odm_set_bb_reg(dm, R_0x950, 0x1ff, offset_i_hex[0]); -+ odm_set_bb_reg(dm, R_0x950, 0x1ff0000, offset_q_hex[0]); -+ } else if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B)) { -+ /* Path-a */ -+ offset_i_hex[0] = (reg_value32[0] & 0xffc00) >> 10; -+ offset_q_hex[0] = reg_value32[0] & 0x3ff; -+ -+ /*@Before filling into registers, -+ *offset should be multiplexed (-1) -+ */ -+ offset_i_hex[0] = 0x400 - offset_i_hex[0]; -+ offset_q_hex[0] = 0x400 - offset_q_hex[0]; -+ -+ odm_set_bb_reg(dm, R_0xc10, 0x3c000000, -+ (0x3c0 & offset_i_hex[0]) >> 6); -+ odm_set_bb_reg(dm, R_0xc10, 0xfc00, 0x3f & offset_i_hex[0]); -+ odm_set_bb_reg(dm, R_0xc14, 0x3c000000, -+ (0x3c0 & offset_q_hex[0]) >> 6); -+ odm_set_bb_reg(dm, R_0xc14, 0xfc00, 0x3f & offset_q_hex[0]); -+ -+ /* Path-b */ -+ if (dm->rf_type > RF_1T1R) { -+ offset_i_hex[1] = (reg_value32[1] & 0xffc00) >> 10; -+ offset_q_hex[1] = reg_value32[1] & 0x3ff; -+ -+ /*@Before filling into registers, -+ *offset should be multiplexed (-1) -+ */ -+ offset_i_hex[1] = 0x400 - offset_i_hex[1]; -+ offset_q_hex[1] = 0x400 - offset_q_hex[1]; -+ -+ odm_set_bb_reg(dm, R_0xe10, 0x3c000000, -+ (0x3c0 & offset_i_hex[1]) >> 6); -+ odm_set_bb_reg(dm, R_0xe10, 0xfc00, -+ 0x3f & offset_i_hex[1]); -+ odm_set_bb_reg(dm, R_0xe14, 0x3c000000, -+ (0x3c0 & offset_q_hex[1]) >> 6); -+ odm_set_bb_reg(dm, R_0xe14, 0xfc00, -+ 0x3f & offset_q_hex[1]); -+ } -+ } else if (dm->support_ic_type & (ODM_RTL8192F)) { -+ /* Path-a I:df4[27:18],Q:df4[17:8]*/ -+ offset_i_hex[0] = (reg_value32[0] & 0xffc0000) >> 18; -+ offset_q_hex[0] = (reg_value32[0] & 0x3ff00) >> 8; -+ -+ /*@Before filling into registers, -+ *offset should be multiplexed (-1) -+ */ -+ offset_i_hex[0] = (offset_i_hex[0] >= 0x200) ? -+ (0x400 - offset_i_hex[0]) : -+ (0xff - offset_i_hex[0]); -+ offset_q_hex[0] = (offset_q_hex[0] >= 0x200) ? -+ (0x400 - offset_q_hex[0]) : -+ (0xff - offset_q_hex[0]); -+ /*Path-a I:c10[7:0],Q:c10[15:8]*/ -+ odm_set_bb_reg(dm, R_0xc10, 0xff, offset_i_hex[0]); -+ odm_set_bb_reg(dm, R_0xc10, 0xff00, offset_q_hex[0]); -+ -+ /* Path-b */ -+ if (dm->rf_type > RF_1T1R) { -+ /* @I:df4[27:18],Q:df4[17:8]*/ -+ offset_i_hex[1] = (reg_value32[1] & 0xffc0000) >> 18; -+ offset_q_hex[1] = (reg_value32[1] & 0x3ff00) >> 8; -+ -+ /*@Before filling into registers, -+ *offset should be multiplexed (-1) -+ */ -+ offset_i_hex[1] = (offset_i_hex[1] >= 0x200) ? -+ (0x400 - offset_i_hex[1]) : -+ (0xff - offset_i_hex[1]); -+ offset_q_hex[1] = (offset_q_hex[1] >= 0x200) ? -+ (0x400 - offset_q_hex[1]) : -+ (0xff - offset_q_hex[1]); -+ /*Path-b I:c18[7:0],Q:c18[15:8]*/ -+ odm_set_bb_reg(dm, R_0xc18, 0xff, offset_i_hex[1]); -+ odm_set_bb_reg(dm, R_0xc18, 0xff00, offset_q_hex[1]); -+ } -+ } else if (dm->support_ic_type & (ODM_RTL8721D | ODM_RTL8710C)) { -+ /*judy modified 20180517*/ -+ offset_i_hex[0] = (reg_value32[0] & 0xff80000) >> 19; -+ offset_q_hex[0] = (reg_value32[0] & 0x3fe00) >> 9; -+ -+ if ((offset_i_hex[0] > 0xF && offset_i_hex[0] < 0x1F1) -+ || (offset_q_hex[0] > 0xF && offset_q_hex[0] < 0x1F1)) { -+ /*@Discard outliers*/ -+ offset_i_hex[0] = 0x0; -+ offset_q_hex[0] = 0x0; -+ } else { -+ /*@Before filling into registers, -+ *offset should be multiplexed (-1) -+ */ -+ offset_i_hex[0] = 0x200 - offset_i_hex[0]; -+ offset_q_hex[0] = 0x200 - offset_q_hex[0]; -+ } -+ odm_set_bb_reg(dm, R_0x950, 0x1ff, offset_i_hex[0]); -+ odm_set_bb_reg(dm, R_0x950, 0x1ff0000, offset_q_hex[0]); -+ } -+#endif -+} -+ -+void phydm_receiver_blocking(void *dm_void) -+{ -+#ifdef CONFIG_RECEIVER_BLOCKING -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 chnl = *dm->channel; -+ u8 bw = *dm->band_width; -+ u32 bb_regf0 = odm_get_bb_reg(dm, R_0xf0, 0xf000); -+ -+ if (!(dm->support_ic_type & ODM_RECEIVER_BLOCKING_SUPPORT) || -+ *dm->edcca_mode != PHYDM_EDCCA_ADAPT_MODE) -+ return; -+ -+ if ((dm->support_ic_type & ODM_RTL8188E && bb_regf0 < 8) || -+ dm->support_ic_type & ODM_RTL8192E) { -+ /*@8188E_T version*/ -+ if (dm->consecutive_idlel_time <= 10 || *dm->mp_mode) -+ goto end; -+ -+ if (bw == CHANNEL_WIDTH_20 && chnl == 1) { -+ phydm_nbi_setting(dm, FUNC_ENABLE, chnl, 20, 2410, -+ PHYDM_DONT_CARE); -+ dm->is_rx_blocking_en = true; -+ } else if ((bw == CHANNEL_WIDTH_20) && (chnl == 13)) { -+ phydm_nbi_setting(dm, FUNC_ENABLE, chnl, 20, 2473, -+ PHYDM_DONT_CARE); -+ dm->is_rx_blocking_en = true; -+ } else if (dm->is_rx_blocking_en && chnl != 1 && chnl != 13) { -+ phydm_nbi_enable(dm, FUNC_DISABLE); -+ odm_set_bb_reg(dm, R_0xc40, 0x1f000000, 0x1f); -+ dm->is_rx_blocking_en = false; -+ } -+ return; -+ } else if ((dm->support_ic_type & ODM_RTL8188E && bb_regf0 >= 8)) { -+ /*@8188E_S version*/ -+ if (dm->consecutive_idlel_time <= 10 || *dm->mp_mode) -+ goto end; -+ -+ if (bw == CHANNEL_WIDTH_20 && chnl == 13) { -+ phydm_nbi_setting(dm, FUNC_ENABLE, chnl, 20, 2473, -+ PHYDM_DONT_CARE); -+ dm->is_rx_blocking_en = true; -+ } else if (dm->is_rx_blocking_en && chnl != 13) { -+ phydm_nbi_enable(dm, FUNC_DISABLE); -+ odm_set_bb_reg(dm, R_0xc40, 0x1f000000, 0x1f); -+ dm->is_rx_blocking_en = false; -+ } -+ return; -+ } -+ -+end: -+ if (dm->is_rx_blocking_en) { -+ phydm_nbi_enable(dm, FUNC_DISABLE); -+ odm_set_bb_reg(dm, R_0xc40, 0x1f000000, 0x1f); -+ dm->is_rx_blocking_en = false; -+ } -+#endif -+} -+ -+void phydm_dyn_bw_indication(void *dm_void) -+{ -+#ifdef CONFIG_BW_INDICATION -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 en_auto_bw_th = dm->en_auto_bw_th; -+ -+ if (!(dm->support_ic_type & ODM_DYM_BW_INDICATION_SUPPORT)) -+ return; -+ -+ /*driver decide bw cobime timing*/ -+ if (dm->dis_dym_bw_indication) { -+ if (*dm->dis_dym_bw_indication) -+ return; -+ } -+ -+ /*check for auto bw*/ -+ if (dm->rssi_min <= en_auto_bw_th && dm->is_linked) { -+ phydm_bw_fixed_enable(dm, FUNC_DISABLE); -+ return; -+ } -+ -+ phydm_bw_fixed_setting(dm); -+#endif -+} -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm.h b/drivers/staging/rtl8723cs/hal/phydm/phydm.h -new file mode 100644 -index 000000000000..233528fc87f3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm.h -@@ -0,0 +1,1566 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALDMOUTSRC_H__ -+#define __HALDMOUTSRC_H__ -+ -+/*@============================================================*/ -+/*@include files*/ -+/*@============================================================*/ -+/*PHYDM header*/ -+#include "phydm_pre_define.h" -+#include "phydm_features.h" -+#include "phydm_dig.h" -+#ifdef CONFIG_PATH_DIVERSITY -+#include "phydm_pathdiv.h" -+#endif -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+#include "phydm_antdiv.h" -+#endif -+ -+#include "phydm_soml.h" -+ -+#ifdef CONFIG_SMART_ANTENNA -+#include "phydm_smt_ant.h" -+#endif -+#ifdef CONFIG_ANT_DETECTION -+#include "phydm_antdect.h" -+#endif -+#include "phydm_rainfo.h" -+#ifdef CONFIG_DYNAMIC_TX_TWR -+#include "phydm_dynamictxpower.h" -+#endif -+#include "phydm_cfotracking.h" -+#include "phydm_adaptivity.h" -+#include "phydm_dfs.h" -+#include "phydm_ccx.h" -+#include "txbf/phydm_hal_txbf_api.h" -+#if (PHYDM_LA_MODE_SUPPORT) -+#include "phydm_adc_sampling.h" -+#endif -+#ifdef CONFIG_PSD_TOOL -+#include "phydm_psd.h" -+#endif -+#ifdef PHYDM_PRIMARY_CCA -+#include "phydm_primary_cca.h" -+#endif -+#include "phydm_cck_pd.h" -+#include "phydm_rssi_monitor.h" -+#ifdef PHYDM_AUTO_DEGBUG -+#include "phydm_auto_dbg.h" -+#endif -+#include "phydm_math_lib.h" -+#include "phydm_noisemonitor.h" -+#include "phydm_api.h" -+#ifdef PHYDM_POWER_TRAINING_SUPPORT -+#include "phydm_pow_train.h" -+#endif -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+#include "phydm_lna_sat.h" -+#endif -+#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT -+#include "phydm_pmac_tx_setting.h" -+#endif -+#ifdef PHYDM_MP_SUPPORT -+#include "phydm_mp.h" -+#endif -+ -+#ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT -+#include "phydm_cck_rx_pathdiv.h" -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ #include "phydm_beamforming.h" -+#endif -+ -+#ifdef CONFIG_DIRECTIONAL_BF -+#include "phydm_direct_bf.h" -+#endif -+ -+#include "phydm_regtable.h" -+ -+/*@HALRF header*/ -+#include "halrf/halrf_iqk.h" -+#include "halrf/halrf_dpk.h" -+#include "halrf/halrf.h" -+#include "halrf/halrf_powertracking.h" -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ #include "halrf/halphyrf_ap.h" -+#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ #include "halrf/halphyrf_ce.h" -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ #include "halrf/halphyrf_win.h" -+#elif(DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+ #include "halrf/halphyrf_iot.h" -+#endif -+ -+extern const u16 phy_rate_table[84]; -+ -+/*@============================================================*/ -+/*@Definition */ -+/*@============================================================*/ -+ -+/* Traffic load decision */ -+#define TRAFFIC_NO_TP 0 -+#define TRAFFIC_ULTRA_LOW 1 -+#define TRAFFIC_LOW 2 -+#define TRAFFIC_MID 3 -+#define TRAFFIC_HIGH 4 -+ -+#define NONE 0 -+ -+#if defined(DM_ODM_CE_MAC80211) -+#define MAX_2(x, y) \ -+ __max2(typeof(x), typeof(y), \ -+ x, y) -+#define __max2(t1, t2, x, y) ({ \ -+ t1 m80211_max1 = (x); \ -+ t2 m80211_max2 = (y); \ -+ m80211_max1 > m80211_max2 ? m80211_max1 : m80211_max2; }) -+ -+#define MIN_2(x, y) \ -+ __min2(typeof(x), typeof(y), \ -+ x, y) -+#define __min2(t1, t2, x, y) ({ \ -+ t1 m80211_min1 = (x); \ -+ t2 m80211_min2 = (y); \ -+ m80211_min1 < m80211_min2 ? m80211_min1 : m80211_min2; }) -+ -+#define DIFF_2(x, y) \ -+ __diff2(typeof(x), typeof(y), \ -+ x, y) -+#define __diff2(t1, t2, x, y) ({ \ -+ t1 __d1 = (x); \ -+ t2 __d2 = (y); \ -+ (__d1 >= __d2) ? (__d1 - __d2) : (__d2 - __d1); }) -+#else -+#define MAX_2(_x_, _y_) (((_x_) > (_y_)) ? (_x_) : (_y_)) -+#define MIN_2(_x_, _y_) (((_x_) < (_y_)) ? (_x_) : (_y_)) -+#define DIFF_2(_x_, _y_) ((_x_ >= _y_) ? (_x_ - _y_) : (_y_ - _x_)) -+#endif -+ -+#define IS_GREATER(_x_, _y_) (((_x_) >= (_y_)) ? true : false) -+#define IS_LESS(_x_, _y_) (((_x_) < (_y_)) ? true : false) -+ -+#if defined(DM_ODM_CE_MAC80211) -+#define BYTE_DUPLICATE_2_DWORD(B0) ({ \ -+ u32 __b_dup = (B0);\ -+ (((__b_dup) << 24) | ((__b_dup) << 16) | ((__b_dup) << 8) | (__b_dup));\ -+ }) -+#else -+#define BYTE_DUPLICATE_2_DWORD(B0) \ -+ (((B0) << 24) | ((B0) << 16) | ((B0) << 8) | (B0)) -+#endif -+#define BYTE_2_DWORD(B3, B2, B1, B0) \ -+ (((B3) << 24) | ((B2) << 16) | ((B1) << 8) | (B0)) -+#define BIT_2_BYTE(B3, B2, B1, B0) \ -+ (((B3) << 3) | ((B2) << 2) | ((B1) << 1) | (B0)) -+ -+/*@For cmn sta info*/ -+#if defined(DM_ODM_CE_MAC80211) -+#define is_sta_active(sta) ({ \ -+ struct cmn_sta_info *__sta = (sta); \ -+ ((__sta) && (__sta->dm_ctrl & STA_DM_CTRL_ACTIVE)); \ -+ }) -+ -+#define IS_FUNC_EN(name) ({ \ -+ u8 *__is_func_name = (name); \ -+ (__is_func_name) && (*__is_func_name); \ -+ }) -+#else -+#define is_sta_active(sta) ((sta) && (sta->dm_ctrl & STA_DM_CTRL_ACTIVE)) -+ -+#define IS_FUNC_EN(name) ((name) && (*name)) -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #define PHYDM_WATCH_DOG_PERIOD 1 /*second*/ -+#else -+ #define PHYDM_WATCH_DOG_PERIOD 2 /*second*/ -+#endif -+ -+#define PHY_HIST_SIZE 12 -+#define PHY_HIST_TH_SIZE (PHY_HIST_SIZE - 1) -+ -+/*@============================================================*/ -+/*structure and define*/ -+/*@============================================================*/ -+ -+#define dm_type_by_fw 0 -+#define dm_type_by_driver 1 -+ -+#define HW_IGI_TXINFO_TABLE_SIZE 64 -+ -+#ifdef BB_RAM_SUPPORT -+ -+struct phydm_bb_ram_per_sta { -+ /* @Reg0x1E84 for RAM I/O*/ -+ boolean hw_igi_en; -+ boolean tx_pwr_offset0_en; -+ boolean tx_pwr_offset1_en; -+ /* @ macid from 0 to 63, above 63 => mapping to 63*/ -+ u8 macid_addr; -+ /* @hw_igi value for paths after packet Tx in a period of time*/ -+ u8 hw_igi; -+ /* @tx_pwr_offset0 offset for Tx power index*/ -+ s8 tx_pwr_offset0; -+ s8 tx_pwr_offset1; -+ -+}; -+ -+struct phydm_bb_ram_ctrl { -+ /*@ For 98F/14B/22C/12F, each tx_pwr_ofst step will be 1dB*/ -+ struct phydm_bb_ram_per_sta pram_sta_ctrl[HW_IGI_TXINFO_TABLE_SIZE]; -+ /*------------ For table2 do not set power offset by macid --------*/ -+ /* For type == 2'b10, 0x1e70[22:16] = tx_pwr_offset_reg0, 0x1e70[23] = enable */ -+ boolean tx_pwr_ofst_reg0_en; -+ u8 tx_pwr_ofst_reg0; -+ /* For type == 2'b11, 0x1e70[30:24] = tx_pwr_offset_reg1, 0x1e70[31] = enable */ -+ boolean tx_pwr_ofst_reg1_en; -+ u8 tx_pwr_ofst_reg1; -+ boolean hwigi_watchdog_en; -+ u64 macid_is_linked; -+ u64 hwigi_macid_is_linked; -+}; -+ -+#endif -+ -+struct phydm_phystatus_statistic { -+ /*@[CCK]*/ -+ u32 rssi_cck_sum; -+ u32 rssi_cck_cnt; -+ u32 rssi_beacon_sum[RF_PATH_MEM_SIZE]; -+ u32 rssi_beacon_cnt; -+ #ifdef PHYSTS_3RD_TYPE_SUPPORT -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ u32 rssi_cck_sum_abv_2ss[RF_PATH_MEM_SIZE - 1]; -+ #endif -+ #endif -+ /*@[OFDM]*/ -+ u32 rssi_ofdm_sum[RF_PATH_MEM_SIZE]; -+ u32 rssi_ofdm_cnt; -+ u32 evm_ofdm_sum; -+ u32 snr_ofdm_sum[RF_PATH_MEM_SIZE]; -+ u16 evm_ofdm_hist[PHY_HIST_SIZE]; -+ u16 snr_ofdm_hist[PHY_HIST_SIZE]; -+ /*@[1SS]*/ -+ u32 rssi_1ss_cnt; -+ u32 rssi_1ss_sum[RF_PATH_MEM_SIZE]; -+ u32 evm_1ss_sum; -+ u32 snr_1ss_sum[RF_PATH_MEM_SIZE]; -+ u16 evm_1ss_hist[PHY_HIST_SIZE]; -+ u16 snr_1ss_hist[PHY_HIST_SIZE]; -+ /*@[2SS]*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ u32 rssi_2ss_cnt; -+ u32 rssi_2ss_sum[RF_PATH_MEM_SIZE]; -+ u32 evm_2ss_sum[2]; -+ u32 snr_2ss_sum[RF_PATH_MEM_SIZE]; -+ u16 evm_2ss_hist[2][PHY_HIST_SIZE]; -+ u16 snr_2ss_hist[2][PHY_HIST_SIZE]; -+ #endif -+ /*@[3SS]*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ u32 rssi_3ss_cnt; -+ u32 rssi_3ss_sum[RF_PATH_MEM_SIZE]; -+ u32 evm_3ss_sum[3]; -+ u32 snr_3ss_sum[RF_PATH_MEM_SIZE]; -+ u16 evm_3ss_hist[3][PHY_HIST_SIZE]; -+ u16 snr_3ss_hist[3][PHY_HIST_SIZE]; -+ #endif -+ /*@[4SS]*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ u32 rssi_4ss_cnt; -+ u32 rssi_4ss_sum[RF_PATH_MEM_SIZE]; -+ u32 evm_4ss_sum[4]; -+ u32 snr_4ss_sum[RF_PATH_MEM_SIZE]; -+ u16 evm_4ss_hist[4][PHY_HIST_SIZE]; -+ u16 snr_4ss_hist[4][PHY_HIST_SIZE]; -+ #endif -+#ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ u16 p4_cnt[RF_PATH_MEM_SIZE]; /*phy-sts page4 cnt*/ -+ u16 cn_sum[RF_PATH_MEM_SIZE]; /*condition number*/ -+ u16 cn_hist[RF_PATH_MEM_SIZE][PHY_HIST_SIZE]; -+#endif -+}; -+ -+struct phydm_phystatus_avg { -+ /*@[CCK]*/ -+ u8 rssi_cck_avg; -+ u8 rssi_beacon_avg[RF_PATH_MEM_SIZE]; -+ #ifdef PHYSTS_3RD_TYPE_SUPPORT -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ u8 rssi_cck_avg_abv_2ss[RF_PATH_MEM_SIZE - 1]; -+ #endif -+ #endif -+ /*@[OFDM]*/ -+ u8 rssi_ofdm_avg[RF_PATH_MEM_SIZE]; -+ u8 evm_ofdm_avg; -+ u8 snr_ofdm_avg[RF_PATH_MEM_SIZE]; -+ /*@[1SS]*/ -+ u8 rssi_1ss_avg[RF_PATH_MEM_SIZE]; -+ u8 evm_1ss_avg; -+ u8 snr_1ss_avg[RF_PATH_MEM_SIZE]; -+ /*@[2SS]*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ u8 rssi_2ss_avg[RF_PATH_MEM_SIZE]; -+ u8 evm_2ss_avg[2]; -+ u8 snr_2ss_avg[RF_PATH_MEM_SIZE]; -+ #endif -+ /*@[3SS]*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ u8 rssi_3ss_avg[RF_PATH_MEM_SIZE]; -+ u8 evm_3ss_avg[3]; -+ u8 snr_3ss_avg[RF_PATH_MEM_SIZE]; -+ #endif -+ /*@[4SS]*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ u8 rssi_4ss_avg[RF_PATH_MEM_SIZE]; -+ u8 evm_4ss_avg[4]; -+ u8 snr_4ss_avg[RF_PATH_MEM_SIZE]; -+ #endif -+}; -+ -+struct odm_phy_dbg_info { -+ /*@ODM Write,debug info*/ -+ u32 num_qry_phy_status_cck; -+ u32 num_qry_phy_status_ofdm; -+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) || (defined(PHYSTS_3RD_TYPE_SUPPORT)) -+ u32 num_qry_mu_pkt; -+ u32 num_qry_bf_pkt; -+ u16 num_mu_vht_pkt[VHT_RATE_NUM]; -+ boolean is_ldpc_pkt; -+ boolean is_stbc_pkt; -+ u8 num_of_ppdu[4]; -+ u8 gid_num[4]; -+#endif -+ u32 condi_num; /*@condition number U(18,4)*/ -+ u8 condi_num_cdf[CN_CNT_MAX]; -+ u8 num_qry_beacon_pkt; -+ u8 beacon_cnt_in_period; /*@beacon cnt within watchdog period*/ -+ u8 beacon_phy_rate; -+ u8 show_phy_sts_all_pkt; /*@Show phy status witch not match BSSID*/ -+ u16 show_phy_sts_max_cnt; /*@show number of phy-status row data per PHYDM watchdog*/ -+ u16 show_phy_sts_cnt; -+ u16 num_qry_legacy_pkt[LEGACY_RATE_NUM]; -+ u16 num_qry_ht_pkt[HT_RATE_NUM]; -+ u16 num_qry_pkt_sc_20m[LOW_BW_RATE_NUM]; /*@20M SC*/ -+ boolean ht_pkt_not_zero; -+ boolean low_bw_20_occur; -+ #if ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT) -+ u16 num_qry_vht_pkt[VHT_RATE_NUM]; -+ u16 num_qry_pkt_sc_40m[LOW_BW_RATE_NUM]; /*@40M SC*/ -+ boolean vht_pkt_not_zero; -+ boolean low_bw_40_occur; -+ #endif -+ u16 snr_hist_th[PHY_HIST_TH_SIZE]; -+ u16 evm_hist_th[PHY_HIST_TH_SIZE]; -+ #ifdef PHYSTS_3RD_TYPE_SUPPORT -+ u16 cn_hist_th[PHY_HIST_TH_SIZE]; /*U(16,1)*/ -+ u8 condition_num_seg0; -+ u8 eigen_val[4]; -+ s16 cfo_tail[4]; /*per-path's cfo_tail */ -+ #endif -+ struct phydm_phystatus_statistic physts_statistic_info; -+ struct phydm_phystatus_avg phystatus_statistic_avg; -+}; -+ -+enum odm_cmninfo { -+ /*@Fixed value*/ -+ /*@-----------HOOK BEFORE REG INIT-----------*/ -+ ODM_CMNINFO_PLATFORM = 0, -+ ODM_CMNINFO_ABILITY, -+ ODM_CMNINFO_INTERFACE, -+ ODM_CMNINFO_MP_TEST_CHIP, -+ ODM_CMNINFO_IC_TYPE, -+ ODM_CMNINFO_CUT_VER, -+ ODM_CMNINFO_FAB_VER, -+ ODM_CMNINFO_FW_VER, -+ ODM_CMNINFO_FW_SUB_VER, -+ ODM_CMNINFO_RF_TYPE, -+ ODM_CMNINFO_RFE_TYPE, -+ ODM_CMNINFO_DPK_EN, -+ ODM_CMNINFO_BOARD_TYPE, -+ ODM_CMNINFO_PACKAGE_TYPE, -+ ODM_CMNINFO_EXT_LNA, -+ ODM_CMNINFO_5G_EXT_LNA, -+ ODM_CMNINFO_EXT_PA, -+ ODM_CMNINFO_5G_EXT_PA, -+ ODM_CMNINFO_GPA, -+ ODM_CMNINFO_APA, -+ ODM_CMNINFO_GLNA, -+ ODM_CMNINFO_ALNA, -+ ODM_CMNINFO_TDMA, -+ ODM_CMNINFO_EXT_TRSW, -+ ODM_CMNINFO_EXT_LNA_GAIN, -+ ODM_CMNINFO_PATCH_ID, -+ ODM_CMNINFO_BINHCT_TEST, -+ ODM_CMNINFO_BWIFI_TEST, -+ ODM_CMNINFO_SMART_CONCURRENT, -+ ODM_CMNINFO_CONFIG_BB_RF, -+ ODM_CMNINFO_IQKPAOFF, -+ ODM_CMNINFO_HUBUSBMODE, -+ ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS, -+ ODM_CMNINFO_TX_TP, -+ ODM_CMNINFO_RX_TP, -+ ODM_CMNINFO_SOUNDING_SEQ, -+ ODM_CMNINFO_REGRFKFREEENABLE, -+ ODM_CMNINFO_RFKFREEENABLE, -+ ODM_CMNINFO_NORMAL_RX_PATH_CHANGE, -+ ODM_CMNINFO_VALID_PATH_SET, -+ ODM_CMNINFO_EFUSE0X3D8, -+ ODM_CMNINFO_EFUSE0X3D7, -+ ODM_CMNINFO_SOFT_AP_SPECIAL_SETTING, -+ ODM_CMNINFO_X_CAP_SETTING, -+ ODM_CMNINFO_ADVANCE_OTA, -+ ODM_CMNINFO_HP_HWID, -+ ODM_CMNINFO_TSSI_ENABLE, /*also for cmn_info_update*/ -+ ODM_CMNINFO_DIS_DPD, -+ ODM_CMNINFO_POWER_VOLTAGE, -+ ODM_CMNINFO_ANTDIV_GPIO, -+ ODM_CMNINFO_EN_AUTO_BW_TH, -+ ODM_CMNINFO_PEAK_DETECT_MODE, -+ /*@-----------HOOK BEFORE REG INIT-----------*/ -+ -+ /*@Dynamic value:*/ -+ -+ /*@--------- POINTER REFERENCE-----------*/ -+ ODM_CMNINFO_TX_UNI, -+ ODM_CMNINFO_RX_UNI, -+ ODM_CMNINFO_BAND, -+ ODM_CMNINFO_SEC_CHNL_OFFSET, -+ ODM_CMNINFO_SEC_MODE, -+ ODM_CMNINFO_BW, -+ ODM_CMNINFO_CHNL, -+ ODM_CMNINFO_FORCED_RATE, -+ ODM_CMNINFO_ANT_DIV, -+ ODM_CMNINFO_PATH_DIV, -+ ODM_CMNINFO_ADAPTIVE_SOML, -+ ODM_CMNINFO_ADAPTIVITY, -+ ODM_CMNINFO_SCAN, -+ ODM_CMNINFO_POWER_SAVING, -+ ODM_CMNINFO_ONE_PATH_CCA, -+ ODM_CMNINFO_DRV_STOP, -+ ODM_CMNINFO_PNP_IN, -+ ODM_CMNINFO_INIT_ON, -+ ODM_CMNINFO_ANT_TEST, -+ ODM_CMNINFO_NET_CLOSED, -+ ODM_CMNINFO_P2P_LINK, -+ ODM_CMNINFO_FCS_MODE, -+ ODM_CMNINFO_IS1ANTENNA, -+ ODM_CMNINFO_RFDEFAULTPATH, -+ ODM_CMNINFO_DFS_MASTER_ENABLE, -+ ODM_CMNINFO_FORCE_TX_ANT_BY_TXDESC, -+ ODM_CMNINFO_SET_S0S1_DEFAULT_ANTENNA, -+ ODM_CMNINFO_SOFT_AP_MODE, -+ ODM_CMNINFO_MP_MODE, -+ ODM_CMNINFO_INTERRUPT_MASK, -+ ODM_CMNINFO_BB_OPERATION_MODE, -+ ODM_CMNINFO_BF_ANTDIV_DECISION, -+ ODM_CMNINFO_MANUAL_SUPPORTABILITY, -+ ODM_CMNINFO_EN_DYM_BW_INDICATION, -+ /*@--------- POINTER REFERENCE-----------*/ -+ -+ /*@------------CALL BY VALUE-------------*/ -+ ODM_CMNINFO_WIFI_DIRECT, -+ ODM_CMNINFO_WIFI_DISPLAY, -+ ODM_CMNINFO_LINK_IN_PROGRESS, -+ ODM_CMNINFO_LINK, -+ ODM_CMNINFO_CMW500LINK, -+ ODM_CMNINFO_STATION_STATE, -+ ODM_CMNINFO_RSSI_MIN, -+ ODM_CMNINFO_RSSI_MIN_BY_PATH, -+ ODM_CMNINFO_DBG_COMP, -+ ODM_CMNINFO_RA_THRESHOLD_HIGH, /*to be removed*/ -+ ODM_CMNINFO_RA_THRESHOLD_LOW, /*to be removed*/ -+ ODM_CMNINFO_RF_ANTENNA_TYPE, -+ ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH, -+ ODM_CMNINFO_BE_FIX_TX_ANT, -+ ODM_CMNINFO_BT_ENABLED, -+ ODM_CMNINFO_BT_HS_CONNECT_PROCESS, -+ ODM_CMNINFO_BT_HS_RSSI, -+ ODM_CMNINFO_BT_OPERATION, -+ ODM_CMNINFO_BT_LIMITED_DIG, -+ ODM_CMNINFO_AP_TOTAL_NUM, -+ ODM_CMNINFO_POWER_TRAINING, -+ ODM_CMNINFO_DFS_REGION_DOMAIN, -+ ODM_CMNINFO_BT_CONTINUOUS_TURN, -+ ODM_CMNINFO_IS_DOWNLOAD_FW, -+ ODM_CMNINFO_PHYDM_PATCH_ID, -+ ODM_CMNINFO_RRSR_VAL, -+ ODM_CMNINFO_LINKED_BF_SUPPORT, -+ ODM_CMNINFO_FLATNESS_TYPE, -+ /*@------------CALL BY VALUE-------------*/ -+ -+ /*@Dynamic ptr array hook itms.*/ -+ ODM_CMNINFO_STA_STATUS, -+ ODM_CMNINFO_MAX, -+ -+}; -+ -+enum phydm_rfe_bb_source_sel { -+ PAPE_2G = 0, -+ PAPE_5G = 1, -+ LNA0N_2G = 2, -+ LNAON_5G = 3, -+ TRSW = 4, -+ TRSW_B = 5, -+ GNT_BT = 6, -+ ZERO = 7, -+ ANTSEL_0 = 8, -+ ANTSEL_1 = 9, -+ ANTSEL_2 = 0xa, -+ ANTSEL_3 = 0xb, -+ ANTSEL_4 = 0xc, -+ ANTSEL_5 = 0xd, -+ ANTSEL_6 = 0xe, -+ ANTSEL_7 = 0xf -+}; -+ -+enum phydm_info_query { -+ PHYDM_INFO_FA_OFDM, -+ PHYDM_INFO_FA_CCK, -+ PHYDM_INFO_FA_TOTAL, -+ PHYDM_INFO_CCA_OFDM, -+ PHYDM_INFO_CCA_CCK, -+ PHYDM_INFO_CCA_ALL, -+ PHYDM_INFO_CRC32_OK_VHT, -+ PHYDM_INFO_CRC32_OK_HT, -+ PHYDM_INFO_CRC32_OK_LEGACY, -+ PHYDM_INFO_CRC32_OK_CCK, -+ PHYDM_INFO_CRC32_ERROR_VHT, -+ PHYDM_INFO_CRC32_ERROR_HT, -+ PHYDM_INFO_CRC32_ERROR_LEGACY, -+ PHYDM_INFO_CRC32_ERROR_CCK, -+ PHYDM_INFO_EDCCA_FLAG, -+ PHYDM_INFO_OFDM_ENABLE, -+ PHYDM_INFO_CCK_ENABLE, -+ PHYDM_INFO_CRC32_OK_HT_AGG, -+ PHYDM_INFO_CRC32_ERROR_HT_AGG, -+ PHYDM_INFO_DBG_PORT_0, -+ PHYDM_INFO_CURR_IGI, -+ PHYDM_INFO_RSSI_MIN, -+ PHYDM_INFO_RSSI_MAX, -+ PHYDM_INFO_CLM_RATIO, -+ PHYDM_INFO_NHM_RATIO, -+ PHYDM_INFO_NHM_NOISE_PWR, -+ PHYDM_INFO_NHM_PWR, -+ PHYDM_INFO_NHM_ENV_RATIO, -+ -+}; -+ -+enum phydm_api { -+ PHYDM_API_NBI = 1, -+ PHYDM_API_CSI_MASK = 2, -+}; -+ -+enum phydm_func_idx { /*@F_XXX = PHYDM XXX function*/ -+ -+ F00_DIG = 0, -+ F01_RA_MASK = 1, -+ F02_DYN_TXPWR = 2, -+ F03_FA_CNT = 3, -+ F04_RSSI_MNTR = 4, -+ F05_CCK_PD = 5, -+ F06_ANT_DIV = 6, -+ F07_SMT_ANT = 7, -+ F08_PWR_TRAIN = 8, -+ F09_RA = 9, -+ F10_PATH_DIV = 10, -+ F11_DFS = 11, -+ F12_DYN_ARFR = 12, -+ F13_ADPTVTY = 13, -+ F14_CFO_TRK = 14, -+ F15_ENV_MNTR = 15, -+ F16_PRI_CCA = 16, -+ F17_ADPTV_SOML = 17, -+ F18_LNA_SAT_CHK = 18, -+}; -+ -+/*@=[PHYDM supportability]==========================================*/ -+enum odm_ability { -+ ODM_BB_DIG = BIT(F00_DIG), -+ ODM_BB_RA_MASK = BIT(F01_RA_MASK), -+ ODM_BB_DYNAMIC_TXPWR = BIT(F02_DYN_TXPWR), -+ ODM_BB_FA_CNT = BIT(F03_FA_CNT), -+ ODM_BB_RSSI_MONITOR = BIT(F04_RSSI_MNTR), -+ ODM_BB_CCK_PD = BIT(F05_CCK_PD), -+ ODM_BB_ANT_DIV = BIT(F06_ANT_DIV), -+ ODM_BB_SMT_ANT = BIT(F07_SMT_ANT), -+ ODM_BB_PWR_TRAIN = BIT(F08_PWR_TRAIN), -+ ODM_BB_RATE_ADAPTIVE = BIT(F09_RA), -+ ODM_BB_PATH_DIV = BIT(F10_PATH_DIV), -+ ODM_BB_DFS = BIT(F11_DFS), -+ ODM_BB_DYNAMIC_ARFR = BIT(F12_DYN_ARFR), -+ ODM_BB_ADAPTIVITY = BIT(F13_ADPTVTY), -+ ODM_BB_CFO_TRACKING = BIT(F14_CFO_TRK), -+ ODM_BB_ENV_MONITOR = BIT(F15_ENV_MNTR), -+ ODM_BB_PRIMARY_CCA = BIT(F16_PRI_CCA), -+ ODM_BB_ADAPTIVE_SOML = BIT(F17_ADPTV_SOML), -+ ODM_BB_LNA_SAT_CHK = BIT(F18_LNA_SAT_CHK), -+}; -+ -+/*@=[PHYDM Debug Component]=====================================*/ -+enum phydm_dbg_comp { -+ /*@BB Driver Functions*/ -+ DBG_DIG = BIT(F00_DIG), -+ DBG_RA_MASK = BIT(F01_RA_MASK), -+ DBG_DYN_TXPWR = BIT(F02_DYN_TXPWR), -+ DBG_FA_CNT = BIT(F03_FA_CNT), -+ DBG_RSSI_MNTR = BIT(F04_RSSI_MNTR), -+ DBG_CCKPD = BIT(F05_CCK_PD), -+ DBG_ANT_DIV = BIT(F06_ANT_DIV), -+ DBG_SMT_ANT = BIT(F07_SMT_ANT), -+ DBG_PWR_TRAIN = BIT(F08_PWR_TRAIN), -+ DBG_RA = BIT(F09_RA), -+ DBG_PATH_DIV = BIT(F10_PATH_DIV), -+ DBG_DFS = BIT(F11_DFS), -+ DBG_DYN_ARFR = BIT(F12_DYN_ARFR), -+ DBG_ADPTVTY = BIT(F13_ADPTVTY), -+ DBG_CFO_TRK = BIT(F14_CFO_TRK), -+ DBG_ENV_MNTR = BIT(F15_ENV_MNTR), -+ DBG_PRI_CCA = BIT(F16_PRI_CCA), -+ DBG_ADPTV_SOML = BIT(F17_ADPTV_SOML), -+ DBG_LNA_SAT_CHK = BIT(F18_LNA_SAT_CHK), -+ /*Neet to re-arrange*/ -+ DBG_PHY_STATUS = BIT(20), -+ DBG_TMP = BIT(21), -+ DBG_FW_TRACE = BIT(22), -+ DBG_TXBF = BIT(23), -+ DBG_COMMON_FLOW = BIT(24), -+ DBG_COMP_MCC = BIT(25), -+ DBG_FW_DM = BIT(26), -+ DBG_DM_SUMMARY = BIT(27), -+ ODM_PHY_CONFIG = BIT(28), -+ ODM_COMP_INIT = BIT(29), -+ DBG_CMN = BIT(30),/*@common*/ -+ ODM_COMP_API = BIT(31) -+}; -+ -+/*@=========================================================*/ -+ -+/*@ODM_CMNINFO_ONE_PATH_CCA*/ -+enum odm_cca_path { -+ ODM_CCA_2R = 0, -+ ODM_CCA_1R_A = 1, -+ ODM_CCA_1R_B = 2, -+}; -+ -+enum phy_reg_pg_type { -+ PHY_REG_PG_RELATIVE_VALUE = 0, -+ PHY_REG_PG_EXACT_VALUE = 1 -+}; -+ -+enum phydm_offload_ability { -+ PHYDM_PHY_PARAM_OFFLOAD = BIT(0), -+ PHYDM_RF_IQK_OFFLOAD = BIT(1), -+ PHYDM_RF_DPK_OFFLOAD = BIT(2), -+}; -+ -+enum phydm_init_result { -+ PHYDM_INIT_SUCCESS = 0, -+ PHYDM_INIT_FAIL_BBRF_REG_INVALID = 1 -+}; -+ -+struct phydm_pause_lv { -+ s8 lv_dig; -+ s8 lv_cckpd; -+ s8 lv_antdiv; -+ s8 lv_adapt; -+ s8 lv_adsl; -+}; -+ -+struct phydm_func_poiner { -+ void (*pause_phydm_handler)(void *dm_void, u32 *val_buf, u8 val_len); -+}; -+ -+struct pkt_process_info { -+ #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ /*@send phystatus in each sampling time*/ -+ boolean physts_auto_swch_en; -+ u8 mac_ppdu_cnt; -+ u8 phy_ppdu_cnt; /*change with phy cca cnt*/ -+ u8 page_bitmap_target; -+ u8 page_bitmap_record; -+ u8 ppdu_phy_rate; -+ u8 ppdu_macid; -+ boolean is_1st_mpdu; -+ #endif -+ u8 lna_idx; -+ u8 vga_idx; -+}; -+ -+#ifdef ODM_CONFIG_BT_COEXIST -+struct phydm_bt_info { -+ boolean is_bt_enabled; /*@BT is enabled*/ -+ boolean is_bt_connect_process; /*@BT HS is under connection progress.*/ -+ u8 bt_hs_rssi; /*@BT HS mode wifi rssi value.*/ -+ boolean is_bt_hs_operation; /*@BT HS mode is under progress*/ -+ boolean is_bt_limited_dig; /*@BT is busy.*/ -+}; -+#endif -+ -+struct phydm_iot_center { -+ boolean is_linked_cmw500; -+ u8 win_patch_id; /*Customer ID*/ -+ boolean patch_id_100f0401; -+ boolean patch_id_10120200; -+ boolean patch_id_40010700; -+ boolean patch_id_021f0800; -+ boolean patch_id_011f0500; -+ u32 phydm_patch_id; /*temp for CCX IOT */ -+}; -+ -+#if (RTL8822B_SUPPORT) -+struct drp_rtl8822b_struct { -+ enum bb_path path_judge; -+ u16 path_a_cck_fa; -+ u16 path_b_cck_fa; -+}; -+#endif -+ -+#ifdef CONFIG_MCC_DM -+#define MCC_DM_REG_NUM 32 -+struct _phydm_mcc_dm_ { -+ u8 mcc_pre_status; -+ u8 mcc_reg_id[MCC_DM_REG_NUM]; -+ u16 mcc_dm_reg[MCC_DM_REG_NUM]; -+ u8 mcc_dm_val[MCC_DM_REG_NUM][2]; -+ /*mcc DIG*/ -+ u8 mcc_rssi[2]; -+ /*u8 mcc_igi[2];*/ -+ -+ /* need to be config by driver*/ -+ u8 mcc_status; -+ u8 sta_macid[2][NUM_STA]; -+ u16 mcc_rf_ch[2]; -+ -+}; -+#endif -+ -+#if (RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+struct phydm_physts { -+ u8 cck_gi_u_bnd; -+ u8 cck_gi_l_bnd; -+}; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ #if (RT_PLATFORM != PLATFORM_LINUX) -+ typedef -+ #endif -+ -+struct dm_struct { -+#else/*for AP, CE Team*/ -+struct dm_struct { -+#endif -+ /*@Add for different team use temporarily*/ -+ void *adapter; /*@For CE/NIC team*/ -+ struct rtl8192cd_priv *priv; /*@For AP team*/ -+ boolean odm_ready; -+ enum phy_reg_pg_type phy_reg_pg_value_type; -+ u8 phy_reg_pg_version; -+ u64 support_ability; /*@PHYDM function Supportability*/ -+ u64 pause_ability; /*@PHYDM function pause Supportability*/ -+ u64 debug_components; -+ u8 cmn_dbg_msg_period; -+ u8 cmn_dbg_msg_cnt; -+ u32 fw_debug_components; -+ u32 num_qry_phy_status_all; /*@CCK + OFDM*/ -+ u32 last_num_qry_phy_status_all; -+ u32 rx_pwdb_ave; -+ boolean is_init_hw_info_by_rfe; -+ -+ //TSSI -+ u8 en_tssi_mode; -+ -+ /*@------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/ -+ boolean is_cck_high_power; -+ u8 rf_path_rx_enable; -+ /*@------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/ -+ -+ /* @COMMON INFORMATION */ -+ -+ /*@Init value*/ -+ /*@-----------HOOK BEFORE REG INIT-----------*/ -+ -+ u8 support_platform; /*@PHYDM Platform info WIN/AP/CE = 1/2/3 */ -+ u8 normal_rx_path; -+ u8 valid_path_set; /*@use for single rx path only*/ -+ boolean brxagcswitch; /* @for rx AGC table switch in Microsoft case */ -+ u8 support_interface; /*@PHYDM PCIE/USB/SDIO = 1/2/3*/ -+ u32 support_ic_type; /*@PHYDM supported IC*/ -+ enum phydm_api_host run_in_drv_fw; /*@PHYDM API is using in FW or Driver*/ -+ u8 ic_ip_series; /*N/AC/JGR3*/ -+ enum phydm_phy_sts_type ic_phy_sts_type; /*@Type1/type2/type3*/ -+ u8 cut_version; /*@cut version TestChip/A-cut/B-cut... = 0/1/2/3/...*/ -+ u8 fab_version; /*@Fab version TSMC/UMC = 0/1*/ -+ u8 fw_version; -+ u8 fw_sub_version; -+ u8 rf_type; /*@RF type 4T4R/3T3R/2T2R/1T2R/1T1R/...*/ -+ u8 rfe_type; -+ u8 board_type; -+ u8 package_type; -+ u16 type_glna; -+ u16 type_gpa; -+ u16 type_alna; -+ u16 type_apa; -+ u8 ext_lna; /*@with 2G external LNA NO/Yes = 0/1*/ -+ u8 ext_lna_5g; /*@with 5G external LNA NO/Yes = 0/1*/ -+ u8 ext_pa; /*@with 2G external PNA NO/Yes = 0/1*/ -+ u8 ext_pa_5g; /*@with 5G external PNA NO/Yes = 0/1*/ -+ u8 efuse0x3d7; /*@with Efuse number*/ -+ u8 efuse0x3d8; -+ u8 ext_trsw; /*@with external TRSW NO/Yes = 0/1*/ -+ u8 ext_lna_gain; /*@gain of external lna*/ -+ boolean is_in_hct_test; -+ u8 wifi_test; -+ boolean is_dual_mac_smart_concurrent; -+ u32 bk_support_ability; /*SD4 only*/ -+ u8 with_extenal_ant_switch; -+ /*@cck agc relative*/ -+ boolean cck_new_agc; -+ s8 cck_lna_gain_table[8]; -+ u8 cck_sat_cnt_th_init; -+ /*@-------------------------------------*/ -+ u32 phydm_sys_up_time; -+ u8 num_rf_path; /*@ex: 8821C=1, 8192E=2, 8814B=4*/ -+ u32 soft_ap_special_setting; -+ boolean boolean_dummy; -+ s8 s8_dummy; -+ u8 u8_dummy; -+ u16 u16_dummy; -+ u32 u32_dummy; -+ u8 rfe_hwsetting_band; -+ u8 p_advance_ota; -+ boolean hp_hw_id; -+ boolean BOOLEAN_temp; -+ boolean is_dfs_band; -+ u8 is_rx_blocking_en; -+ u16 fw_offload_ability; -+ boolean is_download_fw; -+ boolean en_dis_dpd; -+ u16 dis_dpd_rate; -+ u8 en_auto_bw_th; -+ #if (RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+ u8 txagc_buff[RF_PATH_MEM_SIZE][PHY_NUM_RATE_IDX]; -+ u32 bp_0x9b0; -+ #endif -+ #if (RTL8822C_SUPPORT) -+ u8 ofdm_rxagc_l_bnd[16]; -+ boolean l_bnd_detect[16]; -+ u16 agc_rf_gain_ori[16][64];/*[table][mp_gain_idx]*/ -+ u16 agc_rf_gain[16][64];/*[table][mp_gain_idx]*/ -+ u8 agc_table_cnt; -+ boolean is_agc_tab_pos_shift; -+ u8 agc_table_shift; -+ #endif -+/*@-----------HOOK BEFORE REG INIT-----------*/ -+/*@===========================================================*/ -+/*@====[ CALL BY Reference ]=========================================*/ -+/*@===========================================================*/ -+ -+ u64 *num_tx_bytes_unicast; /*@TX Unicast byte cnt*/ -+ u64 *num_rx_bytes_unicast; /*@RX Unicast byte cnt*/ -+ u8 *band_type; /*@2.4G/5G = 0/1*/ -+ u8 *sec_ch_offset; /*@Secondary channel offset don't_care/below/above = 0/1/2*/ -+ u8 *security; /*@security mode Open/WEP/AES/TKIP = 0/1/2/3*/ -+ u8 *band_width; /*@20M/40M/80M = 0/1/2*/ -+ u8 *channel; /*@central CH number*/ -+ boolean *is_scan_in_process; -+ boolean *is_power_saving; -+ boolean *is_tdma; -+ u8 *one_path_cca; /*@CCA path 2-path/path-A/path-B = 0/1/2; using enum odm_cca_path.*/ -+ u8 *antenna_test; -+ boolean *is_net_closed; -+ boolean *is_fcs_mode_enable; /*@fast channel switch (= MCC mode)*/ -+ /*@--------- For 8723B IQK-------------------------------------*/ -+ boolean *is_1_antenna; -+ u8 *rf_default_path; /* @0:S1, 1:S0 */ -+ /*@-----------------------------------------------------------*/ -+ -+ u16 *forced_data_rate; -+ u8 *enable_antdiv; -+ u8 *enable_pathdiv; -+ u8 *en_adap_soml; -+ u8 *edcca_mode; -+ u8 *hub_usb_mode; /*@1:USB2.0, 2:USB3.0*/ -+ boolean *is_fw_dw_rsvd_page_in_progress; -+ u32 *current_tx_tp; -+ u32 *current_rx_tp; -+ u8 *sounding_seq; -+ u32 *soft_ap_mode; -+ u8 *mp_mode; -+ u32 *interrupt_mask; -+ u8 *bb_op_mode; -+ u32 *manual_supportability; -+ u8 *dis_dym_bw_indication; -+/*@===========================================================*/ -+/*@====[ CALL BY VALUE ]===========================================*/ -+/*@===========================================================*/ -+ -+ u8 disable_phydm_watchdog; -+ boolean is_link_in_process; -+ boolean is_wifi_direct; -+ boolean is_wifi_display; -+ boolean is_linked; -+ boolean pre_is_linked; -+ boolean first_connect; -+ boolean first_disconnect; -+ boolean bsta_state; -+ u8 rssi_min; -+ u8 rssi_min_macid; -+ u8 pre_rssi_min; -+ u8 rssi_max; -+ u8 rssi_max_macid; -+ u8 rssi_min_by_path; -+ boolean is_mp_chip; -+ boolean is_one_entry_only; -+ u32 one_entry_macid; -+ u32 one_entry_tp; -+ u32 pre_one_entry_tp; -+ u8 pre_number_linked_client; -+ u8 number_linked_client; -+ u8 pre_number_active_client; -+ u8 number_active_client; -+ boolean is_disable_phy_api; -+ u8 rssi_a; -+ u8 rssi_b; -+ u8 rssi_c; -+ u8 rssi_d; -+ s8 rxsc_80; -+ s8 rxsc_40; -+ s8 rxsc_20; -+ s8 rxsc_l; -+ u64 rssi_trsw; -+ u64 rssi_trsw_h; -+ u64 rssi_trsw_l; -+ u64 rssi_trsw_iso; -+ u8 tx_ant_status; /*TX path enable*/ -+ u8 rx_ant_status; /*RX path enable*/ -+ #ifdef PHYDM_COMPILE_ABOVE_4SS -+ enum bb_path tx_4ss_status; /*@Use N-X for 4STS rate*/ -+ #endif -+ #ifdef PHYDM_COMPILE_ABOVE_3SS -+ enum bb_path tx_3ss_status; /*@Use N-X for 3STS rate*/ -+ #endif -+ #ifdef PHYDM_COMPILE_ABOVE_2SS -+ enum bb_path tx_2ss_status; /*@Use N-X for 2STS rate*/ -+ #endif -+ enum bb_path tx_1ss_status; /*@Use N-X for 1STS rate*/ -+ u8 cck_lna_idx; -+ u8 cck_vga_idx; -+ u8 curr_station_id; -+ u8 ofdm_agc_idx[4]; -+ u8 rx_rate; -+ u8 rate_ss; -+ u8 tx_rate; -+ u8 linked_interval; -+ u8 pre_channel; -+ u32 txagc_offset_value_a; -+ boolean is_txagc_offset_positive_a; -+ u32 txagc_offset_value_b; -+ boolean is_txagc_offset_positive_b; -+ u8 ap_total_num; -+ boolean flatness_type; -+ /*@[traffic]*/ -+ u8 traffic_load; -+ u8 pre_traffic_load; -+ u32 tx_tp; /*@Mbps*/ -+ u32 rx_tp; /*@Mbps*/ -+ u32 total_tp; /*@Mbps*/ -+ u8 txrx_state_all; /*@0:tx, 1:rx, 2:bi-dir*/ -+ u64 cur_tx_ok_cnt; -+ u64 cur_rx_ok_cnt; -+ u64 last_tx_ok_cnt; -+ u64 last_rx_ok_cnt; -+ u16 consecutive_idlel_time; /*@unit: second*/ -+ /*@---------------------------*/ -+ boolean is_bb_swing_offset_positive_a; -+ boolean is_bb_swing_offset_positive_b; -+ -+ /*@[DIG]*/ -+ boolean MPDIG_2G; /*off MPDIG*/ -+ u8 times_2g; /*@for MP DIG*/ -+ u8 force_igi; /*@for debug*/ -+ -+ /*@[TDMA-DIG]*/ -+ u8 tdma_dig_timer_ms; -+ u8 tdma_dig_state_number; -+ u8 tdma_dig_low_upper_bond; -+ u8 force_tdma_low_igi; -+ u8 force_tdma_high_igi; -+ u8 fix_expire_to_zero; -+ boolean original_dig_restore; -+ /*@---------------------------*/ -+ -+ /*@[AntDiv]*/ -+ u8 ant_div_type; -+ u8 antdiv_rssi; -+ u8 fat_comb_a; -+ u8 fat_comb_b; -+ u8 antdiv_intvl; -+ u8 antdiv_delay; -+ u8 ant_type; -+ u8 ant_type2; -+ u8 pre_ant_type; -+ u8 pre_ant_type2; -+ u8 antdiv_period; -+ u8 evm_antdiv_period; -+ u8 antdiv_select; -+ u8 antdiv_train_num; /*@training time for each antenna in EVM method*/ -+ u8 stop_antdiv_rssi_th; -+ u16 stop_antdiv_tp_diff_th; -+ u16 stop_antdiv_tp_th; -+ u8 antdiv_tp_period; -+ u16 tp_active_th; -+ u8 tp_active_occur; -+ u8 path_select; -+ u8 antdiv_evm_en; -+ u8 bdc_holdstate; -+ u8 antdiv_counter; -+ /*@---------------------------*/ -+ -+ u8 ndpa_period; -+ boolean h2c_rarpt_connect; -+ boolean cck_agc_report_type; /*@1:4bit LNA, 0:3bit LNA */ -+ u8 print_agc; -+ u8 la_mode; -+ /*@---8821C Antenna and RF Set BTG/WLG/WLA Select---------------*/ -+ u8 current_rf_set_8821c; -+ u8 default_rf_set_8821c; -+ u8 current_ant_num_8821c; -+ u8 default_ant_num_8821c; -+ u8 rfe_type_expand; -+ /*@-----------------------------------------------------------*/ -+ /*@---For Adaptivtiy---------------------------------------------*/ -+ s8 TH_L2H_default; -+ s8 th_edcca_hl_diff_default; -+ s8 th_l2h_ini; -+ s8 th_edcca_hl_diff; -+ boolean carrier_sense_enable; -+ /*@-----------------------------------------------------------*/ -+ u8 pre_dbg_priority; -+ u8 nbi_set_result; -+ u8 c2h_cmd_start; -+ u8 fw_debug_trace[60]; -+ u8 pre_c2h_seq; -+ boolean fw_buff_is_enpty; -+ u32 data_frame_num; -+ /*@--- for spur detection ---------------------------------------*/ -+ boolean en_reg_mntr_bb; -+ boolean en_reg_mntr_rf; -+ boolean en_reg_mntr_mac; -+ boolean en_reg_mntr_byte; -+ /*@--------------------------------------------------------------*/ -+#if (RTL8814B_SUPPORT || RTL8812F_SUPPORT || RTL8198F_SUPPORT) -+ u8 dsde_sel; -+ u8 nbi_path_sel; -+ u8 csi_wgt; -+#endif -+#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT) -+ u8 csi_wgt_th_db[5]; /*@wgt 4,3,2,1,0 */ -+ /* ^ ^ ^ ^ ^ */ -+#endif -+ /*@------------------------------------------*/ -+ -+ /*@--- for noise detection ---------------------------------------*/ -+ boolean is_noisy_state; -+ boolean noisy_decision; /*@b_noisy*/ -+ boolean pre_b_noisy; -+ u32 noisy_decision_smooth; -+ /*@-----------------------------------------------------------*/ -+ -+ /*@--- for MCC ant weighting ------------------------------------*/ -+ boolean is_stop_dym_ant_weighting; -+ /*@-----------------------------------------------------------*/ -+ -+ boolean is_disable_dym_ecs; -+ boolean is_disable_dym_ant_weighting; -+ struct cmn_sta_info *phydm_sta_info[ODM_ASSOCIATE_ENTRY_NUM]; -+ u8 phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM];/*@sta_idx = phydm_macid_table[HW_macid]*/ -+ -+#if (RATE_ADAPTIVE_SUPPORT) -+ u16 currmin_rpt_time; -+ struct _phydm_txstatistic_ hw_stats; -+ struct _odm_ra_info_ ra_info[ODM_ASSOCIATE_ENTRY_NUM]; -+/*Use mac_id as array index. STA mac_id=0*/ -+/*VWiFi Client mac_id={1, ODM_ASSOCIATE_ENTRY_NUM-1} //YJ,add,120119*/ -+#endif -+ /*@2012/02/14 MH Add to share 88E ra with other SW team*/ -+ /*We need to colelct all support abilit to a proper area.*/ -+ boolean ra_support88e; -+ boolean *is_driver_stopped; -+ boolean *is_driver_is_going_to_pnp_set_power_sleep; -+ boolean *pinit_adpt_in_progress; -+ boolean is_user_assign_level; -+ u8 RSSI_BT; /*@come from BT*/ -+ -+ /*@---PSD Relative ---------------------------------------------*/ -+ boolean is_psd_in_process; -+ boolean is_psd_active; -+ /*@-----------------------------------------------------------*/ -+ -+ boolean bsomlenabled; /* @D-SoML control */ -+ u8 no_ndp_cnts; -+ u16 ndp_cnt_pre; -+ boolean is_beamformed; -+ u8 linked_bf_support; -+ boolean bhtstfdisabled; /* @dynamic HTSTF gain control*/ -+ u32 n_iqk_cnt; -+ u32 n_iqk_ok_cnt; -+ u32 n_iqk_fail_cnt; -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ boolean config_bbrf; -+#endif -+ boolean is_disable_power_training; -+ boolean is_bt_continuous_turn; -+ u8 enhance_pwr_th[3]; -+ u8 set_pwr_th[3]; -+ /*@----------Dyn Tx Pwr ---------------------------------------*/ -+#ifdef BB_RAM_SUPPORT -+ struct phydm_bb_ram_ctrl p_bb_ram_ctrl; -+#endif -+ u8 dynamic_tx_high_power_lvl; -+ void (*fill_desc_dyntxpwr)(void *dm, u8 *desc, u8 dyn_tx_power); -+ u8 last_dtp_lvl; -+ u8 min_power_index; -+ u32 tx_agc_ofdm_18_6; -+ /*-------------------------------------------------------------*/ -+ u8 rx_pkt_type; -+ -+#ifdef CONFIG_PHYDM_DFS_MASTER -+ u8 dfs_region_domain; -+ u8 *dfs_master_enabled; -+ /*@---phydm_radar_detect_with_dbg_parm start --------------------*/ -+ u8 radar_detect_dbg_parm_en; -+ u32 radar_detect_reg_918; -+ u32 radar_detect_reg_91c; -+ u32 radar_detect_reg_920; -+ u32 radar_detect_reg_924; -+ -+ u32 radar_detect_reg_a40; -+ u32 radar_detect_reg_a44; -+ u32 radar_detect_reg_a48; -+ u32 radar_detect_reg_a4c; -+ u32 radar_detect_reg_a50; -+ u32 radar_detect_reg_a54; -+ -+ u32 radar_detect_reg_f54; -+ u32 radar_detect_reg_f58; -+ u32 radar_detect_reg_f5c; -+ u32 radar_detect_reg_f70; -+ u32 radar_detect_reg_f74; -+ /*@---For zero-wait DFS---------------------------------------*/ -+ boolean seg1_dfs_flag; -+ /*@-----------------------------------------------------------*/ -+/*@-----------------------------------------------------------*/ -+#endif -+ -+/*@=== RTL8721D ===*/ -+#if (RTL8721D_SUPPORT) -+ boolean cbw20_adc80; -+ boolean invalid_mode; -+ u8 power_voltage; -+ u8 cca_cbw20_lev; -+ u8 cca_cbw40_lev; -+ u8 antdiv_gpio; -+ u8 peak_detect_mode; -+#endif -+ -+/*@=== PHYDM Timer ========================================== (start)*/ -+ -+ struct phydm_timer_list mpt_dig_timer; -+ struct phydm_timer_list fast_ant_training_timer; -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ struct phydm_timer_list evm_fast_ant_training_timer; -+#endif -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+ struct phydm_timer_list tdma_dig_timer; -+#endif -+ struct phydm_timer_list sbdcnt_timer; -+ -+/*@=== PHYDM Workitem ======================================= (start)*/ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if USE_WORKITEM -+ RT_WORK_ITEM fast_ant_training_workitem; -+ RT_WORK_ITEM ra_rpt_workitem; -+ RT_WORK_ITEM sbdcnt_workitem; -+ RT_WORK_ITEM phydm_evm_antdiv_workitem; -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+ RT_WORK_ITEM phydm_tdma_dig_workitem; -+#endif -+#endif -+#endif -+ -+/*@=== PHYDM Structure ======================================== (start)*/ -+ struct phydm_func_poiner phydm_func_handler; -+ struct phydm_iot_center iot_table; -+ -+#ifdef ODM_CONFIG_BT_COEXIST -+ struct phydm_bt_info bt_info_table; -+#endif -+ -+ struct pkt_process_info pkt_proc_struct; -+ struct phydm_adaptivity_struct adaptivity; -+#ifdef CONFIG_PHYDM_DFS_MASTER -+ struct _DFS_STATISTICS dfs; -+#endif -+ struct odm_noise_monitor noise_level; -+ struct odm_phy_dbg_info phy_dbg_info; -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ struct odm_phy_dbg_info phy_dbg_info_win_bkp; -+#endif -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ struct phydm_bf_rate_info_jgr3 bf_rate_info_jgr3; -+#endif -+ -+#ifdef CONFIG_ADAPTIVE_SOML -+ struct adaptive_soml dm_soml_table; -+#endif -+ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ struct _BF_DIV_COEX_ dm_bdc_table; -+ #endif -+ -+ #if (defined(CONFIG_HL_SMART_ANTENNA)) -+ struct smt_ant_honbo dm_sat_table; -+ #endif -+#endif -+ -+#if (defined(CONFIG_SMART_ANTENNA)) -+ struct smt_ant smtant_table; -+#endif -+ -+ struct _hal_rf_ rf_table; /*@for HALRF function*/ -+ struct dm_rf_calibration_struct rf_calibrate_info; -+ struct dm_iqk_info IQK_info; -+ struct dm_dpk_info dpk_info; -+ struct dm_dack_info dack_info; -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ struct phydm_fat_struct dm_fat_table; -+ struct sw_antenna_switch dm_swat_table; -+#endif -+ struct phydm_dig_struct dm_dig_table; -+ -+#ifdef PHYDM_SUPPORT_CCKPD -+ struct phydm_cckpd_struct dm_cckpd_table; -+ -+ #ifdef PHYDM_DCC_ENHANCE -+ struct phydm_dcc_struct dm_dcc_info; /*dig cckpd coex*/ -+ #endif -+#endif -+ -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ struct phydm_lna_sat_t dm_lna_sat_info; -+#endif -+ -+#ifdef CONFIG_MCC_DM -+ struct _phydm_mcc_dm_ mcc_dm; -+#endif -+ -+#ifdef PHYDM_PRIMARY_CCA -+ struct phydm_pricca_struct dm_pri_cca; -+#endif -+ -+ struct ra_table dm_ra_table; -+ struct phydm_fa_struct false_alm_cnt; -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+ struct phydm_fa_acc_struct false_alm_cnt_acc; -+#ifdef IS_USE_NEW_TDMA -+ struct phydm_fa_acc_struct false_alm_cnt_acc_low; -+#endif -+#endif -+ struct phydm_cfo_track_struct dm_cfo_track; -+ struct ccx_info dm_ccx_info; -+ -+ struct odm_power_trim_data power_trim_data; -+#if (RTL8822B_SUPPORT) -+ struct drp_rtl8822b_struct phydm_rtl8822b; -+#endif -+ -+#ifdef CONFIG_PSD_TOOL -+ struct psd_info dm_psd_table; -+#endif -+ -+#if (PHYDM_LA_MODE_SUPPORT) -+ struct rt_adcsmp adcsmp; -+#endif -+ -+#if (defined(CONFIG_PATH_DIVERSITY)) -+ struct _ODM_PATH_DIVERSITY_ dm_path_div; -+#endif -+ -+#if (defined(CONFIG_ANT_DETECTION)) -+ struct _ANT_DETECTED_INFO ant_detected_info; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ struct _RT_BEAMFORMING_INFO beamforming_info; -+#endif -+#endif -+#ifdef PHYDM_AUTO_DEGBUG -+ struct phydm_auto_dbg_struct auto_dbg_table; -+#endif -+ -+ struct phydm_pause_lv pause_lv_table; -+ struct phydm_api_stuc api_table; -+#ifdef PHYDM_POWER_TRAINING_SUPPORT -+ struct phydm_pow_train_stuc pow_train_table; -+#endif -+ -+#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT -+ struct phydm_pmac_tx dm_pmac_tx_table; -+#endif -+ -+#ifdef PHYDM_MP_SUPPORT -+ struct phydm_mp dm_mp_table; -+#endif -+ -+#ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT -+ struct phydm_cck_rx_pathdiv dm_cck_rx_pathdiv_table; -+#endif -+/*@==========================================================*/ -+ -+#if (RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+ /*@-------------------phydm_phystatus report --------------------*/ -+ struct phydm_physts dm_physts_table; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+#if (RT_PLATFORM != PLATFORM_LINUX) -+} dm_struct; /*@DM_Dynamic_Mechanism_Structure*/ -+#else -+}; -+#endif -+ -+#else /*@for AP,CE Team*/ -+}; -+#endif -+ -+enum phydm_adv_ota { -+ PHYDM_PATHB_1RCCA = BIT(0), -+ PHYDM_HP_OTA_SETTING_A = BIT(1), -+ PHYDM_HP_OTA_SETTING_B = BIT(2), -+ PHYDM_ASUS_OTA_SETTING = BIT(3), -+ PHYDM_ASUS_OTA_SETTING_CCK_PATH = BIT(4), -+ PHYDM_HP_OTA_SETTING_CCK_PATH = BIT(5), -+ PHYDM_LENOVO_OTA_SETTING_NBI_CSI = BIT(6), -+ -+}; -+ -+enum phydm_bb_op_mode { -+ PHYDM_PERFORMANCE_MODE = 0, /*Service one device*/ -+ PHYDM_BALANCE_MODE = 1, /*@Service more than one device*/ -+}; -+ -+enum phydm_structure_type { -+ PHYDM_FALSEALMCNT, -+ PHYDM_CFOTRACK, -+ PHYDM_ADAPTIVITY, -+ PHYDM_DFS, -+ PHYDM_ROMINFO, -+ -+}; -+ -+enum odm_bb_config_type { -+ CONFIG_BB_PHY_REG, -+ CONFIG_BB_AGC_TAB, -+ CONFIG_BB_AGC_TAB_2G, -+ CONFIG_BB_AGC_TAB_5G, -+ CONFIG_BB_PHY_REG_PG, -+ CONFIG_BB_PHY_REG_MP, -+ CONFIG_BB_AGC_TAB_DIFF, -+ CONFIG_BB_RF_CAL_INIT, -+}; -+ -+enum odm_rf_config_type { -+ CONFIG_RF_RADIO, -+ CONFIG_RF_TXPWR_LMT, -+ CONFIG_RF_SYN_RADIO, -+}; -+ -+enum odm_fw_config_type { -+ CONFIG_FW_NIC, -+ CONFIG_FW_NIC_2, -+ CONFIG_FW_AP, -+ CONFIG_FW_AP_2, -+ CONFIG_FW_MP, -+ CONFIG_FW_WOWLAN, -+ CONFIG_FW_WOWLAN_2, -+ CONFIG_FW_AP_WOWLAN, -+ CONFIG_FW_BT, -+}; -+ -+/*status code*/ -+#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) -+enum rt_status { -+ RT_STATUS_SUCCESS, -+ RT_STATUS_FAILURE, -+ RT_STATUS_PENDING, -+ RT_STATUS_RESOURCE, -+ RT_STATUS_INVALID_CONTEXT, -+ RT_STATUS_INVALID_PARAMETER, -+ RT_STATUS_NOT_SUPPORT, -+ RT_STATUS_OS_API_FAILED, -+}; -+#endif /*@end of enum rt_status definition*/ -+ -+void -+phydm_watchdog_lps(struct dm_struct *dm); -+ -+void -+phydm_watchdog_lps_32k(struct dm_struct *dm); -+ -+void -+phydm_txcurrentcalibration(struct dm_struct *dm); -+ -+void -+phydm_dm_early_init(struct dm_struct *dm); -+ -+enum phydm_init_result -+odm_dm_init(struct dm_struct *dm); -+ -+void -+odm_dm_reset(struct dm_struct *dm); -+ -+void -+phydm_fwoffload_ability_init(struct dm_struct *dm, -+ enum phydm_offload_ability offload_ability); -+ -+void -+phydm_fwoffload_ability_clear(struct dm_struct *dm, -+ enum phydm_offload_ability offload_ability); -+ -+void -+phydm_supportability_en(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void -+phydm_pause_dm_watchdog(void *dm_void, enum phydm_pause_type pause_type); -+ -+void -+phydm_watchdog(struct dm_struct *dm); -+ -+void -+phydm_watchdog_mp(struct dm_struct *dm); -+ -+void -+phydm_pause_func_init(void *dm_void); -+ -+u8 -+phydm_pause_func(void *dm_void, enum phydm_func_idx pause_func, -+ enum phydm_pause_type pause_type, -+ enum phydm_pause_level pause_lv, u8 val_lehgth, u32 *val_buf); -+ -+void -+phydm_pause_func_console(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void phydm_pause_dm_by_asso_pkt(struct dm_struct *dm, -+ enum phydm_pause_type pause_type, u8 rssi); -+ -+void phydm_fw_dm_ctrl_en(void *dm_void, enum phydm_func_idx fun_idx, -+ boolean enable); -+ -+void -+odm_cmn_info_init(struct dm_struct *dm, enum odm_cmninfo cmn_info, u64 value); -+ -+void -+odm_cmn_info_hook(struct dm_struct *dm, enum odm_cmninfo cmn_info, void *value); -+ -+void -+odm_cmn_info_update(struct dm_struct *dm, u32 cmn_info, u64 value); -+ -+u32 -+phydm_cmn_info_query(struct dm_struct *dm, enum phydm_info_query info_type); -+ -+void -+odm_init_all_timers(struct dm_struct *dm); -+ -+void -+odm_cancel_all_timers(struct dm_struct *dm); -+ -+void -+odm_release_all_timers(struct dm_struct *dm); -+ -+void * -+phydm_get_structure(struct dm_struct *dm, u8 structure_type); -+ -+void -+phydm_dc_cancellation(struct dm_struct *dm); -+ -+void -+phydm_receiver_blocking(void *dm_void); -+ -+void -+phydm_dyn_bw_indication(void *dm_void); -+ -+void -+phydm_iot_patch_id_update(void *dm_void, u32 iot_idx, boolean en); -+ -+ -+#ifdef CONFIG_DYNAMIC_TXCOLLISION_TH -+void -+phydm_tx_collsion_th_init(void *dm_void); -+ -+void -+phydm_tx_collsion_th_set(void *dm_void, u8 val_r2t, u8 val_t2r); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void -+odm_init_all_work_items( -+ struct dm_struct *dm -+); -+void -+odm_free_all_work_items( -+ struct dm_struct *dm -+); -+#endif /*@#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+void -+odm_dtc(struct dm_struct *dm); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+void -+odm_init_all_threads( -+ struct dm_struct *dm -+); -+ -+void -+odm_stop_all_threads( -+ struct dm_struct *dm -+); -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm.mk b/drivers/staging/rtl8723cs/hal/phydm/phydm.mk -new file mode 100644 -index 000000000000..dcf919909781 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm.mk -@@ -0,0 +1,248 @@ -+EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/phydm -+ -+_PHYDM_FILES := hal/phydm/phydm_debug.o \ -+ hal/phydm/phydm_antdiv.o\ -+ hal/phydm/phydm_soml.o\ -+ hal/phydm/phydm_smt_ant.o\ -+ hal/phydm/phydm_antdect.o\ -+ hal/phydm/phydm_interface.o\ -+ hal/phydm/phydm_phystatus.o\ -+ hal/phydm/phydm_hwconfig.o\ -+ hal/phydm/phydm.o\ -+ hal/phydm/phydm_dig.o\ -+ hal/phydm/phydm_pathdiv.o\ -+ hal/phydm/phydm_rainfo.o\ -+ hal/phydm/phydm_dynamictxpower.o\ -+ hal/phydm/phydm_adaptivity.o\ -+ hal/phydm/phydm_cfotracking.o\ -+ hal/phydm/phydm_noisemonitor.o\ -+ hal/phydm/phydm_beamforming.o\ -+ hal/phydm/phydm_direct_bf.o\ -+ hal/phydm/phydm_dfs.o\ -+ hal/phydm/txbf/halcomtxbf.o\ -+ hal/phydm/txbf/haltxbfinterface.o\ -+ hal/phydm/txbf/phydm_hal_txbf_api.o\ -+ hal/phydm/phydm_adc_sampling.o\ -+ hal/phydm/phydm_ccx.o\ -+ hal/phydm/phydm_psd.o\ -+ hal/phydm/phydm_primary_cca.o\ -+ hal/phydm/phydm_cck_pd.o\ -+ hal/phydm/phydm_rssi_monitor.o\ -+ hal/phydm/phydm_auto_dbg.o\ -+ hal/phydm/phydm_math_lib.o\ -+ hal/phydm/phydm_api.o\ -+ hal/phydm/phydm_pow_train.o\ -+ hal/phydm/phydm_lna_sat.o\ -+ hal/phydm/phydm_pmac_tx_setting.o\ -+ hal/phydm/phydm_mp.o\ -+ hal/phydm/phydm_cck_rx_pathdiv.o\ -+ hal/phydm/halrf/halrf.o\ -+ hal/phydm/halrf/halrf_debug.o\ -+ hal/phydm/halrf/halphyrf_ce.o\ -+ hal/phydm/halrf/halrf_powertracking_ce.o\ -+ hal/phydm/halrf/halrf_powertracking.o\ -+ hal/phydm/halrf/halrf_kfree.o\ -+ hal/phydm/halrf/halrf_psd.o -+ -+ifeq ($(CONFIG_RTL8188E), y) -+RTL871X = rtl8188e -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188e_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8188e_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8188e_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8188e_ce.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8188e.o\ -+ hal/phydm/$(RTL871X)/hal8188erateadaptive.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8188e.o -+endif -+ -+ifeq ($(CONFIG_RTL8192E), y) -+RTL871X = rtl8192e -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192e_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8192e_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8192e_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8192e_ce.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8192e.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8192e.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8812A), y) -+RTL871X = rtl8812a -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8812a_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8812a_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8812a_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8812a_ce.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8812a.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8812a.o\ -+ hal/phydm/txbf/haltxbfjaguar.o -+endif -+ -+ifeq ($(CONFIG_RTL8821A), y) -+RTL871X = rtl8821a -+_PHYDM_FILES += hal/phydm/rtl8821a/halhwimg8821a_mac.o\ -+ hal/phydm/rtl8821a/halhwimg8821a_bb.o\ -+ hal/phydm/rtl8821a/halhwimg8821a_rf.o\ -+ hal/phydm/halrf/rtl8812a/halrf_8812a_ce.o\ -+ hal/phydm/halrf/rtl8821a/halrf_8821a_ce.o\ -+ hal/phydm/rtl8821a/phydm_regconfig8821a.o\ -+ hal/phydm/rtl8821a/phydm_rtl8821a.o\ -+ hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.o\ -+ hal/phydm/txbf/haltxbfjaguar.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8723B), y) -+RTL871X = rtl8723b -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723b_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8723b_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8723b_rf.o\ -+ hal/phydm/$(RTL871X)/halhwimg8723b_mp.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8723b.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8723b_ce.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8723b.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8814A), y) -+RTL871X = rtl8814a -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8814a_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8814a_mac.o\ -+ hal/phydm/halrf/$(RTL871X)/halhwimg8814a_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8814a.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8814a.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8814a_ce.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8814a.o\ -+ hal/phydm/txbf/haltxbf8814a.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8723C), y) -+RTL871X = rtl8703b -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8703b_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8703b_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8703b_rf.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8703b.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8703b.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8703b.o -+endif -+ -+ifeq ($(CONFIG_RTL8723D), y) -+RTL871X = rtl8723d -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723d_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8723d_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8723d_rf.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8723d.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8723d.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8723d.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8710B), y) -+RTL871X = rtl8710b -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8710b_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8710b_mac.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8710b.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8710b.o\ -+ hal/phydm/halrf/$(RTL871X)/halhwimg8710b_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8710b.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8188F), y) -+RTL871X = rtl8188f -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188f_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8188f_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8188f_rf.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8188f.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8188f.o \ -+ hal/phydm/$(RTL871X)/phydm_rtl8188f.o -+endif -+ -+ifeq ($(CONFIG_RTL8822B), y) -+RTL871X = rtl8822b -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8822b_bb.o \ -+ hal/phydm/$(RTL871X)/halhwimg8822b_mac.o \ -+ hal/phydm/halrf/$(RTL871X)/halrf_8822b.o \ -+ hal/phydm/$(RTL871X)/phydm_hal_api8822b.o \ -+ hal/phydm/halrf/$(RTL871X)/halhwimg8822b_rf.o \ -+ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8822b.o \ -+ hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8822b.o \ -+ hal/phydm/$(RTL871X)/phydm_regconfig8822b.o \ -+ hal/phydm/$(RTL871X)/phydm_rtl8822b.o -+ -+_PHYDM_FILES += hal/phydm/txbf/haltxbf8822b.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8821C), y) -+RTL871X = rtl8821c -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8821c_bb.o \ -+ hal/phydm/$(RTL871X)/halhwimg8821c_mac.o \ -+ hal/phydm/$(RTL871X)/phydm_hal_api8821c.o \ -+ hal/phydm/$(RTL871X)/phydm_regconfig8821c.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8821c.o\ -+ hal/phydm/halrf/$(RTL871X)/halhwimg8821c_rf.o \ -+ hal/phydm/halrf/$(RTL871X)/halrf_8821c.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8821c.o -+endif -+ifeq ($(CONFIG_RTL8192F), y) -+RTL871X = rtl8192f -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192f_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8192f_mac.o\ -+ hal/phydm/$(RTL871X)/phydm_hal_api8192f.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8192f.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8192f.o\ -+ hal/phydm/halrf/$(RTL871X)/halhwimg8192f_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8192f.o -+endif -+ -+ifeq ($(CONFIG_RTL8198F), y) -+RTL871X = rtl8198f -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8198f_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8198f_mac.o\ -+ hal/phydm/$(RTL871X)/phydm_hal_api8198f.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8198f.o\ -+ hal/phydm/halrf/$(RTL871X)/halhwimg8198f_rf.o -+endif -+ -+ifeq ($(CONFIG_RTL8822C), y) -+RTL871X = rtl8822c -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8822c_bb.o\ -+ hal/phydm/$(RTL871X)/phydm_hal_api8822c.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8822c.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8822c.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8822c.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8822c.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_tssi_8822c.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_dpk_8822c.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_txgapk_8822c.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8822c.o\ -+ hal/phydm/halrf/$(RTL871X)/halhwimg8822c_rf.o -+endif -+ -+ifeq ($(CONFIG_RTL8814B), y) -+RTL871X = rtl8814b -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8814b_bb.o\ -+ hal/phydm/$(RTL871X)/phydm_hal_api8814b.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8814b.o\ -+ hal/phydm/$(RTL871X)/phydm_extraagc8814b.o\ -+ hal/phydm/halrf/$(RTL871X)/halhwimg8814b_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8814b.o \ -+ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8814b.o \ -+ hal/phydm/halrf/$(RTL871X)/halrf_dpk_8814b.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8814b.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_txgapk_8814b.o -+endif -+ifeq ($(CONFIG_RTL8723F), y) -+RTL871X = rtl8723f -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723f_bb.o\ -+ hal/phydm/$(RTL871X)/phydm_hal_api8723f.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8723f.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8723f.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8723f.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8723f.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_tssi_8723f.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_dpk_8723f.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8723f.o\ -+ hal/phydm/halrf/$(RTL871X)/halhwimg8723f_rf.o -+endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_adaptivity.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_adaptivity.c -new file mode 100644 -index 000000000000..4cf4ee0bffb0 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_adaptivity.c -@@ -0,0 +1,845 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ #if WPP_SOFTWARE_TRACE -+ #include "PhyDM_Adaptivity.tmh" -+ #endif -+#endif -+#ifdef PHYDM_SUPPORT_ADAPTIVITY -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+boolean -+phydm_check_channel_plan(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ void *adapter = dm->adapter; -+ PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; -+ -+ if (mgnt_info->RegEnableAdaptivity != 2) -+ return false; -+ -+ if (!dm->carrier_sense_enable) { /*@check domain Code for adaptivity or CarrierSense*/ -+ if ((*dm->band_type == ODM_BAND_5G) && -+ !(adapt->regulation_5g == REGULATION_ETSI || adapt->regulation_5g == REGULATION_WW)) { -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "adaptivity skip 5G domain code : %d\n", -+ adapt->regulation_5g); -+ return true; -+ } else if ((*dm->band_type == ODM_BAND_2_4G) && -+ !(adapt->regulation_2g == REGULATION_ETSI || adapt->regulation_2g == REGULATION_WW)) { -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "adaptivity skip 2.4G domain code : %d\n", -+ adapt->regulation_2g); -+ return true; -+ } else if ((*dm->band_type != ODM_BAND_2_4G) && (*dm->band_type != ODM_BAND_5G)) { -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "adaptivity neither 2G nor 5G band, return\n"); -+ return true; -+ } -+ } else { -+ if ((*dm->band_type == ODM_BAND_5G) && -+ !(adapt->regulation_5g == REGULATION_MKK || adapt->regulation_5g == REGULATION_WW)) { -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "CarrierSense skip 5G domain code : %d\n", -+ adapt->regulation_5g); -+ return true; -+ } else if ((*dm->band_type == ODM_BAND_2_4G) && -+ !(adapt->regulation_2g == REGULATION_MKK || adapt->regulation_2g == REGULATION_WW)) { -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "CarrierSense skip 2.4G domain code : %d\n", -+ adapt->regulation_2g); -+ return true; -+ } else if ((*dm->band_type != ODM_BAND_2_4G) && (*dm->band_type != ODM_BAND_5G)) { -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "CarrierSense neither 2G nor 5G band, return\n"); -+ return true; -+ } -+ } -+ -+ return false; -+} -+ -+boolean -+phydm_soft_ap_special_set(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ boolean disable_ap_adapt_setting = false; -+ -+ if (dm->soft_ap_mode != NULL) { -+ if (*dm->soft_ap_mode != 0 && -+ (dm->soft_ap_special_setting & BIT(0))) -+ disable_ap_adapt_setting = true; -+ else -+ disable_ap_adapt_setting = false; -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "soft_ap_setting = %x, soft_ap = %d, dis_ap_adapt = %d\n", -+ dm->soft_ap_special_setting, *dm->soft_ap_mode, -+ disable_ap_adapt_setting); -+ } -+ -+ return disable_ap_adapt_setting; -+} -+ -+boolean -+phydm_ap_num_check(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ boolean dis_adapt = false; -+ -+ if (dm->ap_total_num > adapt->ap_num_th) -+ dis_adapt = true; -+ else -+ dis_adapt = false; -+ -+ PHYDM_DBG(dm, DBG_ADPTVTY, "AP total num = %d, AP num threshold = %d\n", -+ dm->ap_total_num, adapt->ap_num_th); -+ return dis_adapt; -+} -+ -+void phydm_check_adaptivity(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ boolean disable_adapt = false; -+ -+ if (!adapt->mode_cvrt_en) -+ return; -+ -+ if (phydm_check_channel_plan(dm) || phydm_ap_num_check(dm) || -+ phydm_soft_ap_special_set(dm)) -+ disable_adapt = true; -+ -+ if (*dm->edcca_mode == PHYDM_EDCCA_ADAPT_MODE && disable_adapt) -+ *dm->edcca_mode = PHYDM_EDCCA_NORMAL_MODE; -+ else if (*dm->edcca_mode == PHYDM_EDCCA_NORMAL_MODE && !disable_adapt) -+ *dm->edcca_mode = PHYDM_EDCCA_ADAPT_MODE; -+} -+ -+void phydm_set_l2h_th_ini_win(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /*@ [New Format: JGR3]IGI-idx:45 = RSSI:35 = -65dBm*/ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ if (dm->support_ic_type & ODM_RTL8822C) -+ dm->th_l2h_ini = 45; -+ else if (dm->support_ic_type & ODM_RTL8814B) -+ dm->th_l2h_ini = 49; -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ /*@ [Old Format] -11+base(50) = IGI_idx:39 = RSSI:29 = -71dBm*/ -+ if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8812)) { -+ dm->th_l2h_ini = -17; -+ } else { -+ if (*dm->band_type == ODM_BAND_5G) -+ dm->th_l2h_ini = -14; -+ else if (*dm->band_type == ODM_BAND_2_4G) -+ dm->th_l2h_ini = -9; -+ } -+ } else { /*ODM_IC_11N_SERIES*/ -+ dm->th_l2h_ini = -9; -+ } -+} -+#endif -+ -+void phydm_dig_up_bound_lmt_en(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ -+ if (*dm->edcca_mode != PHYDM_EDCCA_ADAPT_MODE || -+ !dm->is_linked) { -+ adapt->igi_up_bound_lmt_cnt = 0; -+ adapt->igi_lmt_en = false; -+ return; -+ } -+ -+ if (dm->total_tp > 1) { -+ adapt->igi_lmt_en = true; -+ adapt->igi_up_bound_lmt_cnt = adapt->igi_up_bound_lmt_val; -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "TP >1, Start limit IGI upper bound\n"); -+ } else { -+ if (adapt->igi_up_bound_lmt_cnt == 0) -+ adapt->igi_lmt_en = false; -+ else -+ adapt->igi_up_bound_lmt_cnt--; -+ } -+ -+ PHYDM_DBG(dm, DBG_ADPTVTY, "IGI_lmt_cnt = %d\n", -+ adapt->igi_up_bound_lmt_cnt); -+} -+ -+void phydm_set_edcca_threshold(void *dm_void, s8 H2L, s8 L2H) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ odm_set_bb_reg(dm, R_0x84c, MASKBYTE2, (u8)L2H + 0x80); -+ odm_set_bb_reg(dm, R_0x84c, MASKBYTE3, (u8)H2L + 0x80); -+ } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ odm_set_bb_reg(dm, R_0xc4c, MASKBYTE0, (u8)L2H); -+ odm_set_bb_reg(dm, R_0xc4c, MASKBYTE2, (u8)H2L); -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ odm_set_bb_reg(dm, R_0x8a4, MASKBYTE0, (u8)L2H); -+ odm_set_bb_reg(dm, R_0x8a4, MASKBYTE1, (u8)H2L); -+ } -+} -+ -+void phydm_mac_edcca_state(void *dm_void, enum phydm_mac_edcca_type state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (state == PHYDM_IGNORE_EDCCA) { -+ /*@ignore EDCCA*/ -+ odm_set_mac_reg(dm, R_0x520, BIT(15), 1); -+ /*@enable EDCCA count down*/ -+ odm_set_mac_reg(dm, R_0x524, BIT(11), 0); -+ } else { /*@don't set MAC ignore EDCCA signal*/ -+ /*@don't ignore EDCCA*/ -+ odm_set_mac_reg(dm, R_0x520, BIT(15), 0); -+ /*@disable EDCCA count down*/ -+ odm_set_mac_reg(dm, R_0x524, BIT(11), 1); -+ } -+ PHYDM_DBG(dm, DBG_ADPTVTY, "EDCCA enable state = %d\n", state); -+} -+ -+void phydm_search_pwdb_lower_bound(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ u32 value32 = 0, reg_value32 = 0; -+ u8 cnt = 0, try_count = 0; -+ u8 tx_edcca1 = 0; -+ boolean is_adjust = true; -+ s8 th_l2h, th_h2l, igi_target_dc = 0x32; -+ s8 diff = 0; -+ s8 IGI = adapt->igi_base + 30 + dm->th_l2h_ini - dm->th_edcca_hl_diff; -+ -+ halrf_rf_lna_setting(dm, HALRF_LNA_DISABLE); -+ diff = igi_target_dc - IGI; -+ th_l2h = dm->th_l2h_ini + diff; -+ if (th_l2h > 10) -+ th_l2h = 10; -+ -+ th_h2l = th_l2h - dm->th_edcca_hl_diff; -+ phydm_set_edcca_threshold(dm, th_h2l, th_l2h); -+ ODM_delay_ms(30); -+ -+ while (is_adjust) { -+ /*@check CCA status*/ -+ /*set debug port to 0x0*/ -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x0)) { -+ reg_value32 = phydm_get_bb_dbg_port_val(dm); -+ -+ while (reg_value32 & BIT(3) && try_count < 3) { -+ ODM_delay_ms(3); -+ try_count = try_count + 1; -+ reg_value32 = phydm_get_bb_dbg_port_val(dm); -+ } -+ phydm_release_bb_dbg_port(dm); -+ try_count = 0; -+ } -+ -+ /*@count EDCCA signal = 1 times*/ -+ for (cnt = 0; cnt < 20; cnt++) { -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, -+ adapt->adaptivity_dbg_port)) { -+ value32 = phydm_get_bb_dbg_port_val(dm); -+ phydm_release_bb_dbg_port(dm); -+ } -+ -+ if (value32 & BIT(30) && dm->support_ic_type & -+ (ODM_RTL8723B | ODM_RTL8188E)) -+ tx_edcca1 = tx_edcca1 + 1; -+ else if (value32 & BIT(29)) -+ tx_edcca1 = tx_edcca1 + 1; -+ } -+ -+ if (tx_edcca1 > 1) { -+ IGI = IGI - 1; -+ th_l2h = th_l2h + 1; -+ if (th_l2h > 10) -+ th_l2h = 10; -+ -+ th_h2l = th_l2h - dm->th_edcca_hl_diff; -+ phydm_set_edcca_threshold(dm, th_h2l, th_l2h); -+ tx_edcca1 = 0; -+ if (th_l2h == 10) -+ is_adjust = false; -+ -+ } else { -+ is_adjust = false; -+ } -+ } -+ -+ adapt->adapt_igi_up = IGI - ADAPT_DC_BACKOFF; -+ adapt->h2l_lb = th_h2l + ADAPT_DC_BACKOFF; -+ adapt->l2h_lb = th_l2h + ADAPT_DC_BACKOFF; -+ -+ halrf_rf_lna_setting(dm, HALRF_LNA_ENABLE); -+ phydm_set_edcca_threshold(dm, 0x7f, 0x7f); /*resume to no link state*/ -+} -+ -+boolean phydm_re_search_condition(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; -+ u8 adaptivity_igi_upper = adaptivity->adapt_igi_up + ADAPT_DC_BACKOFF; -+ -+ if (adaptivity_igi_upper <= 0x26) -+ return true; -+ else -+ return false; -+} -+ -+void phydm_set_l2h_th_ini(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /*@ [New Format: JGR3]IGI-idx:45 = RSSI:35 = -65dBm*/ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ if (dm->support_ic_type & ODM_RTL8822C) -+ dm->th_l2h_ini = 45; -+ else if (dm->support_ic_type & ODM_RTL8814B) -+ dm->th_l2h_ini = 49; -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ /*@ [Old Format] -11+base(50) = IGI_idx:39 = RSSI:29 = -71dBm*/ -+ if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8812)) -+ dm->th_l2h_ini = -17; -+ else -+ dm->th_l2h_ini = -14; -+ } else { /*ODM_IC_11N_SERIES*/ -+ if (dm->support_ic_type & ODM_RTL8721D) -+ dm->th_l2h_ini = -14; -+ else -+ dm->th_l2h_ini = -11; -+ } -+} -+ -+void phydm_set_l2h_th_ini_carrier_sense(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ dm->th_l2h_ini = 60; /*@ -50dBm*/ -+ else -+ dm->th_l2h_ini = 10; /*@ -50dBm*/ -+} -+ -+void phydm_set_forgetting_factor(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (*dm->edcca_mode != PHYDM_EDCCA_ADAPT_MODE) -+ return; -+ -+ if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A | -+ ODM_RTL8195B)) -+ odm_set_bb_reg(dm, R_0x8a0, BIT(1) | BIT(0), 0); -+} -+ -+void phydm_edcca_decision_opt(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (*dm->edcca_mode != PHYDM_EDCCA_ADAPT_MODE) -+ return; -+ -+ if (dm->support_ic_type & ODM_RTL8822B) -+ odm_set_bb_reg(dm, R_0x8dc, BIT(5), 0x1); -+ else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) -+ odm_set_bb_reg(dm, R_0xce8, BIT(13), 0x1); -+ else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ odm_set_bb_reg(dm, R_0x844, BIT(30) | BIT(29), 0x0); -+} -+ -+void phydm_adaptivity_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ char help[] = "-h"; -+ u32 dm_value[10] = {0}; -+ u8 i = 0, input_idx = 0; -+ u32 reg_value32 = 0; -+ s8 h2l_diff = 0; -+ -+ for (i = 0; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); -+ input_idx++; -+ } -+ if (strcmp(input[1], help) == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Show adaptivity message: {0}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Enter debug mode: {1} {th_l2h_ini} {th_edcca_hl_diff}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Leave debug mode: {2}\n"); -+ goto out; -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ if (dm_value[0] == PHYDM_ADAPT_DEBUG) { -+ adaptivity->debug_mode = true; -+ if (dm_value[1] != 0) -+ dm->th_l2h_ini = (s8)dm_value[1]; -+ if (dm_value[2] != 0) -+ dm->th_edcca_hl_diff = (s8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "th_l2h_ini = %d, th_edcca_hl_diff = %d\n", -+ dm->th_l2h_ini, dm->th_edcca_hl_diff); -+ } else if (dm_value[0] == PHYDM_ADAPT_RESUME) { -+ adaptivity->debug_mode = false; -+ dm->th_l2h_ini = adaptivity->th_l2h_ini_backup; -+ dm->th_edcca_hl_diff = adaptivity->th_edcca_hl_diff_backup; -+ } else if (dm_value[0] == PHYDM_ADAPT_MSG) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "debug_mode = %s, th_l2h_ini = %d\n", -+ (adaptivity->debug_mode ? "TRUE" : "FALSE"), -+ dm->th_l2h_ini); -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ reg_value32 = odm_get_bb_reg(dm, R_0x84c, MASKDWORD); -+ h2l_diff = (s8)((0x00ff0000 & reg_value32) >> 16) - -+ (s8)((0xff000000 & reg_value32) >> 24); -+ } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ reg_value32 = odm_get_bb_reg(dm, R_0xc4c, MASKDWORD); -+ h2l_diff = (s8)(0x000000ff & reg_value32) - -+ (s8)((0x00ff0000 & reg_value32) >> 16); -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ reg_value32 = odm_get_bb_reg(dm, R_0x8a4, MASKDWORD); -+ h2l_diff = (s8)(0x000000ff & reg_value32) - -+ (s8)((0x0000ff00 & reg_value32) >> 8); -+ } -+ -+ if (h2l_diff == 7) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "adaptivity enable\n"); -+ else -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "adaptivity disable\n"); -+ } -+ -+out: -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_set_edcca_val(void *dm_void, u32 *val_buf, u8 val_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (val_len != 2) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[Error][adaptivity]Need val_len = 2\n"); -+ return; -+ } -+ phydm_set_edcca_threshold(dm, (s8)val_buf[1], (s8)val_buf[0]); -+} -+ -+boolean phydm_edcca_abort(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter = dm->adapter; -+ u32 is_fw_in_psmode = false; -+#endif -+ -+ if (!(dm->support_ability & ODM_BB_ADAPTIVITY)) { -+ PHYDM_DBG(dm, DBG_ADPTVTY, "adaptivity disable\n"); -+ return true; -+ } -+ -+ if (dm->pause_ability & ODM_BB_ADAPTIVITY) { -+ PHYDM_DBG(dm, DBG_ADPTVTY, "Return: Pause ADPTVTY in LV=%d\n", -+ dm->pause_lv_table.lv_adapt); -+ return true; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ ((PADAPTER)adapter)->HalFunc.GetHwRegHandler(adapter, -+ HW_VAR_FW_PSMODE_STATUS, -+ (u8 *)(&is_fw_in_psmode)); -+ -+ /*@Disable EDCCA while under LPS mode, added by Roger, 2012.09.14.*/ -+ if (is_fw_in_psmode) -+ return true; -+#endif -+ -+ return false; -+} -+ -+void phydm_edcca_thre_calc_jgr3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ u8 igi = dig_t->cur_ig_value; -+ s8 th_l2h = 0, th_h2l = 0; -+ -+ if (*dm->edcca_mode == PHYDM_EDCCA_ADAPT_MODE) { -+ /*prevent pwdB clipping and result in Miss Detection*/ -+ adapt->l2h_dyn_min = (u8)(dm->th_l2h_ini - ADC_BACKOFF); -+ -+ if (igi < adapt->l2h_dyn_min) -+ th_l2h = igi + ADC_BACKOFF; -+ else -+ th_l2h = dm->th_l2h_ini; -+ -+ th_h2l = th_l2h - dm->th_edcca_hl_diff; -+ } else { -+ th_l2h = MAX_2(igi + TH_L2H_DIFF_IGI, EDCCA_TH_L2H_LB); -+ th_h2l = th_l2h - EDCCA_HL_DIFF_NORMAL; -+ } -+ adapt->th_l2h = th_l2h; -+ adapt->th_h2l = th_h2l; -+ -+ phydm_set_edcca_threshold(dm, adapt->th_h2l, adapt->th_l2h); -+} -+ -+void phydm_edcca_thre_calc(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ u8 igi = dig_t->cur_ig_value; -+ s8 th_l2h = 0, th_h2l = 0; -+ s8 diff = 0, igi_target = adapt->igi_base; -+ -+ if (dm->support_ic_type & ODM_IC_PWDB_EDCCA) { -+ /*@fix EDCCA hang issue*/ -+ if (dm->support_ic_type & ODM_RTL8812) { -+ /*@ADC_mask disable*/ -+ odm_set_bb_reg(dm, R_0x800, BIT(10), 1); -+ /*@ADC_mask enable*/ -+ odm_set_bb_reg(dm, R_0x800, BIT(10), 0); -+ } -+ -+ if (*dm->edcca_mode == PHYDM_EDCCA_ADAPT_MODE) { -+ /*@Limit IGI upper bound for adaptivity*/ -+ phydm_dig_up_bound_lmt_en(dm); -+ diff = igi_target - (s8)igi; -+ th_l2h = dm->th_l2h_ini + diff; -+ if (th_l2h > 10) -+ th_l2h = 10; -+ -+ th_h2l = th_l2h - dm->th_edcca_hl_diff; -+ } else { -+ th_l2h = 70 - igi; -+ th_h2l = th_l2h - EDCCA_HL_DIFF_NORMAL; -+ } -+ /*replace lower bound to prevent EDCCA always equal 1*/ -+ if (th_h2l < adapt->h2l_lb) -+ th_h2l = adapt->h2l_lb; -+ if (th_l2h < adapt->l2h_lb) -+ th_l2h = adapt->l2h_lb; -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "adapt_igi_up=0x%x, l2h_lb = %d dBm, h2l_lb = %d dBm\n", -+ adapt->adapt_igi_up, -+ IGI_2_DBM(adapt->l2h_lb + adapt->adapt_igi_up), -+ IGI_2_DBM(adapt->h2l_lb + adapt->adapt_igi_up)); -+ } else { /* < JGR2 & N*/ -+ if (*dm->edcca_mode == PHYDM_EDCCA_ADAPT_MODE) { -+ /*need to consider PwdB upper bound for 8814 later IC*/ -+ adapt->l2h_dyn_min = (u8)(dm->th_l2h_ini + igi_target); -+ -+ if (igi < adapt->l2h_dyn_min) -+ th_l2h = igi; -+ else -+ th_l2h = adapt->l2h_dyn_min; -+ -+ th_h2l = th_l2h - dm->th_edcca_hl_diff; -+ } else { -+ th_l2h = MAX_2(igi + TH_L2H_DIFF_IGI, EDCCA_TH_L2H_LB); -+ th_h2l = th_l2h - EDCCA_HL_DIFF_NORMAL; -+ } -+ } -+ -+ adapt->th_l2h = th_l2h; -+ adapt->th_h2l = th_h2l; -+ -+ phydm_set_edcca_threshold(dm, adapt->th_h2l, adapt->th_l2h); -+} -+#endif -+ -+void phydm_set_edcca_threshold_api(void *dm_void) -+{ -+#ifdef PHYDM_SUPPORT_ADAPTIVITY -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ -+ if (*dm->edcca_mode != PHYDM_EDCCA_ADAPT_MODE) -+ return; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_edcca_thre_calc_jgr3(dm); -+ else -+ phydm_edcca_thre_calc(dm); -+ -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "API :IGI = 0x%x, th_l2h = %d, th_h2l = %d\n", -+ dm->dm_dig_table.cur_ig_value, adapt->th_l2h, adapt->th_h2l); -+#endif -+} -+ -+void phydm_adaptivity_info_init(void *dm_void, enum phydm_adapinfo cmn_info, -+ u32 value) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; -+ -+ switch (cmn_info) { -+ case PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE: -+ dm->carrier_sense_enable = (boolean)value; -+ break; -+ case PHYDM_ADAPINFO_TH_L2H_INI: -+ dm->th_l2h_ini = (s8)value; -+ break; -+ case PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF: -+ dm->th_edcca_hl_diff = (s8)value; -+ break; -+ case PHYDM_ADAPINFO_AP_NUM_TH: -+ adaptivity->ap_num_th = (u8)value; -+ break; -+ case PHYDM_ADAPINFO_SWITCH_TH_L2H_INI_IN_BAND: -+ adaptivity->switch_th_l2h_ini_in_band = (u8)value; -+ break; -+ default: -+ break; -+ } -+} -+ -+void phydm_adaptivity_info_update(void *dm_void, enum phydm_adapinfo cmn_info, -+ u32 value) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ -+ /*This init variable may be changed in run time.*/ -+ switch (cmn_info) { -+ case PHYDM_ADAPINFO_DOMAIN_CODE_2G: -+ adapt->regulation_2g = (u8)value; -+ break; -+ case PHYDM_ADAPINFO_DOMAIN_CODE_5G: -+ adapt->regulation_5g = (u8)value; -+ break; -+ default: -+ break; -+ } -+} -+ -+void phydm_adaptivity_init(void *dm_void) -+{ -+#ifdef PHYDM_SUPPORT_ADAPTIVITY -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; -+ -+ /* @[Config Adaptivity]*/ -+ if (!dm->edcca_mode) { -+ pr_debug("[%s] warning!\n", __func__); -+ dm->edcca_mode = &dm->u8_dummy; -+ dm->support_ability &= ~ODM_BB_ADAPTIVITY; -+ return; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (!dm->carrier_sense_enable) { -+ if (dm->th_l2h_ini == 0 && -+ !adaptivity->switch_th_l2h_ini_in_band) -+ phydm_set_l2h_th_ini(dm); -+ } else { -+ phydm_set_l2h_th_ini_carrier_sense(dm); -+ } -+ -+ if (dm->th_edcca_hl_diff == 0) -+ dm->th_edcca_hl_diff = 7; -+ -+ if (dm->wifi_test & RT_WIFI_LOGO) -+ dm->support_ability &= ~ODM_BB_ADAPTIVITY; -+ -+ if (*dm->edcca_mode == PHYDM_EDCCA_ADAPT_MODE) -+ adaptivity->mode_cvrt_en = true; -+ else -+ adaptivity->mode_cvrt_en = false; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ if (!dm->carrier_sense_enable) { -+ if (dm->th_l2h_ini == 0) -+ phydm_set_l2h_th_ini(dm); -+ } else { -+ phydm_set_l2h_th_ini_carrier_sense(dm); -+ } -+ -+ if (dm->th_edcca_hl_diff == 0) -+ dm->th_edcca_hl_diff = 7; -+ -+ if (dm->wifi_test || *dm->mp_mode) -+ dm->support_ability &= ~ODM_BB_ADAPTIVITY; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ if (dm->carrier_sense_enable) { -+ phydm_set_l2h_th_ini_carrier_sense(dm); -+ dm->th_edcca_hl_diff = 7; -+ } else { -+ dm->th_l2h_ini = dm->TH_L2H_default; /*set by mib*/ -+ dm->th_edcca_hl_diff = dm->th_edcca_hl_diff_default; -+ } -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ if (!dm->carrier_sense_enable) { -+ if (dm->th_l2h_ini == 0) -+ phydm_set_l2h_th_ini(dm); -+ } else { -+ phydm_set_l2h_th_ini_carrier_sense(dm); -+ } -+ -+ if (dm->th_edcca_hl_diff == 0) -+ dm->th_edcca_hl_diff = 7; -+#endif -+ -+ adaptivity->debug_mode = false; -+ adaptivity->th_l2h_ini_backup = dm->th_l2h_ini; -+ adaptivity->th_edcca_hl_diff_backup = dm->th_edcca_hl_diff; -+ adaptivity->igi_base = 0x32; -+ adaptivity->adapt_igi_up = 0; -+ adaptivity->h2l_lb = 0; -+ adaptivity->l2h_lb = 0; -+ adaptivity->l2h_dyn_min = 0; -+ adaptivity->th_l2h = 0x7f; -+ adaptivity->th_h2l = 0x7f; -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) -+ adaptivity->adaptivity_dbg_port = 0x208; -+ else if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ adaptivity->adaptivity_dbg_port = 0x209; -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES && -+ !(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) { -+ if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) { -+ /*set to page B1*/ -+ odm_set_bb_reg(dm, R_0xe28, BIT(30), 0x1); -+ /*@0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ -+ odm_set_bb_reg(dm, R_0xbc0, BIT(27) | BIT(26), 0x1); -+ odm_set_bb_reg(dm, R_0xe28, BIT(30), 0x0); -+ } else { -+ /*@0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ -+ odm_set_bb_reg(dm, R_0xe24, BIT(21) | BIT(20), 0x1); -+ } -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES && -+ !(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) { -+ /*@0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/ -+ odm_set_bb_reg(dm, R_0x944, BIT(29) | BIT(28), 0x1); -+ } -+ -+ if (dm->support_ic_type & ODM_IC_PWDB_EDCCA) { -+ phydm_search_pwdb_lower_bound(dm); -+ if (phydm_re_search_condition(dm)) -+ phydm_search_pwdb_lower_bound(dm); -+ } else { -+ /*resume to no link state*/ -+ phydm_set_edcca_threshold(dm, 0x7f, 0x7f); -+ } -+ -+ /*@whether to ignore EDCCA*/ -+ phydm_mac_edcca_state(dm, PHYDM_DONT_IGNORE_EDCCA); -+ -+ /*@forgetting factor setting*/ -+ phydm_set_forgetting_factor(dm); -+ -+ /*@EDCCA behavior based on maximum or mean power*/ -+ phydm_edcca_decision_opt(dm); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ adaptivity->igi_up_bound_lmt_val = 180; -+#else -+ adaptivity->igi_up_bound_lmt_val = 90; -+#endif -+ adaptivity->igi_up_bound_lmt_cnt = 0; -+ adaptivity->igi_lmt_en = false; -+#endif -+} -+ -+void phydm_adaptivity(void *dm_void) -+{ -+#ifdef PHYDM_SUPPORT_ADAPTIVITY -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ if (phydm_edcca_abort(dm)) -+ return; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ phydm_check_adaptivity(dm); /*@Check adaptivity enable*/ -+ -+ if (!dm->carrier_sense_enable && -+ !adapt->debug_mode && -+ adapt->switch_th_l2h_ini_in_band) -+ phydm_set_l2h_th_ini_win(dm); -+#endif -+ -+ PHYDM_DBG(dm, DBG_ADPTVTY, "%s ====>\n", __func__); -+ PHYDM_DBG(dm, DBG_ADPTVTY, "mode = %s, debug_mode = %d\n", -+ (*dm->edcca_mode ? -+ (dm->carrier_sense_enable ? -+ "CARRIER SENSE" : -+ "ADAPTIVITY") : -+ "NORMAL"), -+ adapt->debug_mode); -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_edcca_thre_calc_jgr3(dm); -+ else -+ phydm_edcca_thre_calc(dm); -+ -+ if (*dm->edcca_mode == PHYDM_EDCCA_ADAPT_MODE) -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "th_l2h_ini = %d, th_edcca_hl_diff = %d\n", -+ dm->th_l2h_ini, dm->th_edcca_hl_diff); -+ if (dm->support_ic_type & ODM_IC_PWDB_EDCCA) -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "IGI = 0x%x, th_l2h = %d dBm, th_h2l = %d dBm\n", -+ dig_t->cur_ig_value, -+ IGI_2_DBM(adapt->th_l2h + dig_t->cur_ig_value), -+ IGI_2_DBM(adapt->th_h2l + dig_t->cur_ig_value)); -+ else -+ PHYDM_DBG(dm, DBG_ADPTVTY, -+ "IGI = 0x%x, th_l2h = %d dBm, th_h2l = %d dBm\n", -+ dig_t->cur_ig_value, -+ IGI_2_DBM(adapt->th_l2h), -+ IGI_2_DBM(adapt->th_h2l)); -+#endif -+} -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_adaptivity.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_adaptivity.h -new file mode 100644 -index 000000000000..f125fb1f79ca ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_adaptivity.h -@@ -0,0 +1,126 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMADAPTIVITY_H__ -+#define __PHYDMADAPTIVITY_H__ -+ -+#define ADAPTIVITY_VERSION "9.7.07" /*@20190321 changed by Kevin, -+ *add 8721D threshold l2h init -+ */ -+#define ADC_BACKOFF 12 -+#define EDCCA_TH_L2H_LB 48 -+#define TH_L2H_DIFF_IGI 8 -+#define EDCCA_HL_DIFF_NORMAL 8 -+#define IGI_2_DBM(igi) (igi - 110) -+/*@ [PHYDM-337][Old IC] EDCCA TH = IGI + REG setting*/ -+#define ODM_IC_PWDB_EDCCA (ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E |\ -+ ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8812) -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP)) -+ #define ADAPT_DC_BACKOFF 2 -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ #define ADAPT_DC_BACKOFF 4 -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ #define ADAPT_DC_BACKOFF 0 -+#endif -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+enum phydm_regulation_type { -+ REGULATION_FCC = 0, -+ REGULATION_MKK = 1, -+ REGULATION_ETSI = 2, -+ REGULATION_WW = 3, -+ MAX_REGULATION_NUM = 4 -+}; -+#endif -+ -+enum phydm_edcca_mode { -+ PHYDM_EDCCA_NORMAL_MODE = 0, -+ PHYDM_EDCCA_ADAPT_MODE = 1 -+}; -+ -+enum phydm_adapinfo { -+ PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE = 0, -+ PHYDM_ADAPINFO_TH_L2H_INI, -+ PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, -+ PHYDM_ADAPINFO_AP_NUM_TH, -+ PHYDM_ADAPINFO_DOMAIN_CODE_2G, -+ PHYDM_ADAPINFO_DOMAIN_CODE_5G, -+ PHYDM_ADAPINFO_SWITCH_TH_L2H_INI_IN_BAND -+}; -+ -+enum phydm_mac_edcca_type { -+ PHYDM_IGNORE_EDCCA = 0, -+ PHYDM_DONT_IGNORE_EDCCA = 1 -+}; -+ -+enum phydm_adaptivity_debug_mode { -+ PHYDM_ADAPT_MSG = 0, -+ PHYDM_ADAPT_DEBUG = 1, -+ PHYDM_ADAPT_RESUME = 2, -+}; -+ -+struct phydm_adaptivity_struct { -+ boolean mode_cvrt_en; -+ s8 th_l2h_ini_backup; -+ s8 th_edcca_hl_diff_backup; -+ s8 igi_base; -+ s8 h2l_lb; -+ s8 l2h_lb; -+ u8 ap_num_th; -+ u8 l2h_dyn_min; -+ u32 adaptivity_dbg_port; /*N:0x208, AC:0x209*/ -+ u8 debug_mode; -+ u16 igi_up_bound_lmt_cnt; /*@When igi_up_bound_lmt_cnt !=0, limit IGI upper bound to "adapt_igi_up"*/ -+ u16 igi_up_bound_lmt_val; /*@max value of igi_up_bound_lmt_cnt*/ -+ boolean igi_lmt_en; -+ u8 adapt_igi_up; -+ u32 rvrt_val[2]; /*@all rvrt_val for pause API must set to u32*/ -+ s8 th_l2h; -+ s8 th_h2l; -+ u8 regulation_2g; -+ u8 regulation_5g; -+ u8 switch_th_l2h_ini_in_band; -+}; -+ -+#ifdef PHYDM_SUPPORT_ADAPTIVITY -+void phydm_adaptivity_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void phydm_set_edcca_val(void *dm_void, u32 *val_buf, u8 val_len); -+#endif -+ -+void phydm_set_edcca_threshold_api(void *dm_void); -+ -+void phydm_adaptivity_info_init(void *dm_void, enum phydm_adapinfo cmn_info, -+ u32 value); -+ -+void phydm_adaptivity_info_update(void *dm_void, enum phydm_adapinfo cmn_info, -+ u32 value); -+ -+void phydm_adaptivity_init(void *dm_void); -+ -+void phydm_adaptivity(void *dm_void); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_adc_sampling.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_adc_sampling.c -new file mode 100644 -index 000000000000..bbbf9befb728 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_adc_sampling.c -@@ -0,0 +1,1647 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if (PHYDM_LA_MODE_SUPPORT) -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ #if (RTL8197F_SUPPORT || RTL8822B_SUPPORT || RTL8192F_SUPPORT) -+ #include "rtl8197f/Hal8197FPhyReg.h" -+ #include "WlanHAL/HalMac88XX/halmac_reg2.h" -+ #else -+ #include "WlanHAL/HalHeader/HalComReg.h" -+ #endif -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ #if WPP_SOFTWARE_TRACE -+ #include "phydm_adc_sampling.tmh" -+ #endif -+#endif -+ -+#if RTL8814B_SUPPORT -+boolean phydm_la_finish_addr_recover_8814B(void *dm_void, u32 *finish_addr) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ boolean recover_success; -+ -+ if (dm->support_ic_type != ODM_RTL8814B) -+ return false; -+ -+ if (smp->la_buff_mode == ADCSMP_BUFF_HALF) { -+ if (*finish_addr < 0x4000) /*0~0x4000*/ -+ *finish_addr += 0x8000; -+ -+ recover_success = true; -+ } else { -+ if (*finish_addr >= 0x4000 && *finish_addr < 0x8000) -+ recover_success = true; -+ else -+ recover_success = false; -+ } -+ pr_debug("[8814B] recover_success=(%d)\n", recover_success); -+ -+ return recover_success; -+} -+#endif -+ -+#if RTL8198F_SUPPORT -+void phydm_la_pre_run(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct rt_adcsmp_string *buf = &smp->adc_smp_buf; -+ u8 i = 0; -+ u8 tmp = 0; -+ u8 target_polling_bit = BIT(1); -+ -+ if (!(dm->support_ic_type & ODM_RTL8198F)) -+ return; -+ -+ if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) -+ return; -+ -+ /*pre run */ -+ /*force to bb trigger*/ -+ odm_set_mac_reg(dm, R_0x7c0, BIT(3), 0); -+ /*dma_trig_and(AND1) output 1*/ -+ odm_set_bb_reg(dm, R_0x1ce4, 0xf0000000, 0x0); -+ /*r_dma_trigger_AND1_inv = 1*/ -+ odm_set_bb_reg(dm, R_0x1ce8, BIT5, 1); /*@AND 1 val*/ -+ /* polling bit for BB ADC mode */ -+ odm_set_mac_reg(dm, R_0x7c0, BIT(1), 1); -+ -+ pr_debug("buf[end:start]=(0x%x~0x%x)\n", buf->end_pos, buf->start_pos); -+ -+ do { -+ tmp = odm_read_1byte(dm, R_0x7c0); -+ if ((tmp & target_polling_bit) == false) { -+ pr_debug("LA pre-run fail.\n"); -+ phydm_la_stop(dm); -+ phydm_release_bb_dbg_port(dm); -+ } else { -+ ODM_delay_ms(100); -+ pr_debug("LA pre-run while_cnt = %d.\n", i); -+ i++; -+ } -+ } while (i < 3); -+ -+ /*r_dma_trigger_AND1_inv = 0*/ -+ odm_set_bb_reg(dm, R_0x1ce8, BIT5, 0); /*@AND 1 val*/ -+ -+ if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) -+ odm_set_mac_reg(dm, R_0x7c0, BIT(3), 1); -+} -+#endif -+ -+#if (RTL8821C_SUPPORT || RTL8195B_SUPPORT) -+void -+phydm_la_clk_en(void *dm_void, boolean enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 val = (enable) ? 1 : 0; -+ -+ if (!(dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C))) -+ return; -+ -+ if (dm->support_ic_type == ODM_RTL8821C && -+ dm->cut_version == ODM_CUT_A) -+ return; -+ -+ odm_set_bb_reg(dm, R_0x95c, BIT(23), val); -+} -+#endif -+ -+#if (RTL8723F_SUPPORT) -+void -+phydm_la_mac_clk_en(void *dm_void, boolean enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 val = (enable) ? 1 : 0; -+ -+ if (!(dm->support_ic_type & ODM_RTL8723F)) -+ return; -+ -+ odm_set_mac_reg(dm, R_0x1008, BIT(1), val); -+} -+#endif -+ -+#if (RTL8197F_SUPPORT) -+void -+phydm_la_stop_dma_8197f(void *dm_void, enum phydm_backup_type opt) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ -+ if (dm->support_ic_type != ODM_RTL8197F) -+ return; -+ -+ if (opt == PHYDM_BACKUP) { -+ /*Stop DMA*/ -+ smp->backup_dma = odm_get_mac_reg(dm, R_0x300, 0xffff); -+ odm_set_mac_reg(dm, R_0x300, 0x7fff, 0x7fff); -+ } else { /*restore*/ -+ /*Resume DMA*/ -+ odm_set_mac_reg(dm, R_0x300, 0x7fff, smp->backup_dma); -+ } -+} -+#endif -+ -+#ifdef PHYDM_COMPILE_LA_STORE_IN_IMEM -+void -+phydm_la_mv_data_2_tx_buffer(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct rt_adcsmp_string *buf = &smp->adc_smp_buf; -+ -+ if (!(dm->support_ic_type & PHYDM_LA_STORE_IN_IMEM_IC)) -+ return; -+ -+ pr_debug("GetTxPktBuf from iMEM\n"); -+ odm_set_mac_reg(dm, R_0x7c0, BIT(0), 0x0); /*Disable LA mode HW block*/ -+ -+ /* 98F LA memory loccation is separate from normal -+ * driver use, DMA is no longer required to stop -+ */ -+ #if (RTL8197F_SUPPORT) -+ phydm_la_stop_dma_8197f(dm, PHYDM_BACKUP); -+ #endif -+ -+ /* @move LA mode content from IMEM to TxPktBuffer -+ * Source : OCPBASE_IMEM 0x00000000 -+ * Destination : OCPBASE_TXBUF 0x18780000 -+ * Length : 64K -+ */ -+ GET_HAL_INTERFACE(dm->priv)->init_ddma_handler(dm->priv, -+ OCPBASE_IMEM, -+ OCPBASE_TXBUF -+ + buf->start_pos, -+ 0x10000); -+} -+#endif -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ -+void phydm_la_bb_adv_reset_jgr3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct la_adv_trig *adv = &smp->adv_trig_table; -+ -+ odm_memory_set(dm, adv, 0, sizeof(struct la_adv_trig)); -+ -+} -+ -+void phydm_la_bb_adv_trig_setting_jgr3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct la_adv_trig *adv = &smp->adv_trig_table; -+ -+ pr_debug(" *ADV BB-trig = %d\n", adv->la_adv_bbtrigger_en); -+ -+ if (!adv->la_adv_bbtrigger_en) { /*normal LA mode & back to default*/ -+ /*@AND0*/ -+ odm_set_bb_reg(dm, R_0x1ce4, BIT(27), 0); -+ -+ /*@AND1*/ -+ odm_set_bb_reg(dm, R_0x1ce4, MASKH4BITS, 0); -+ odm_set_bb_reg(dm, R_0x1ce8, BIT(5), 0); /*@AND 1 inv*/ -+ /*@AND2*/ -+ odm_set_bb_reg(dm, R_0x1ce8, 0x3c0, 0); -+ odm_set_bb_reg(dm, R_0x1ce8, BIT(15), 0); /*@AND 2 inv*/ -+ /*@AND3*/ -+ odm_set_bb_reg(dm, R_0x1ce8, 0xf0000, 0); -+ odm_set_bb_reg(dm, R_0x1ce8, BIT(25), 0); /*@AND 3 inv*/ -+ /*@AND4*/ -+ odm_set_bb_reg(dm, R_0x1cf0, MASKDWORD, 0); /*@AND 4 mask en*/ -+ odm_set_bb_reg(dm, R_0x1ce8, BIT(26), 0); /*@AND 4 inv*/ -+ } else { -+ /*@AND0 */ -+ /*path 1 default: enable ori. BB trigger*/ -+ odm_set_bb_reg(dm, R_0x1ce4, BIT(27), -+ (adv->la_ori_bb_dis ? 1 : 0)); -+ -+ /* @AND1 */ -+ odm_set_bb_reg(dm, R_0x1ce8, BIT(5), adv->la_and1_inv); -+ odm_set_bb_reg(dm, R_0x1ce4, MASKH4BITS, adv->la_and1_sel); -+ odm_set_bb_reg(dm, R_0x1ce8, 0x1f, adv->la_and1_val); -+ -+ /*@AND2 */ -+ odm_set_bb_reg(dm, R_0x1ce8, BIT(15), adv->la_and2_inv); -+ odm_set_bb_reg(dm, R_0x1ce8, 0x3c0, adv->la_and2_sel); -+ odm_set_bb_reg(dm, R_0x1ce8, 0x7c00, adv->la_and2_val); -+ -+ /*@AND3 */ -+ odm_set_bb_reg(dm, R_0x1ce8, BIT(25), adv->la_and3_inv); -+ odm_set_bb_reg(dm, R_0x1ce8, 0xf0000, adv->la_and3_sel); -+ odm_set_bb_reg(dm, R_0x1ce8, 0x1f00000, adv->la_and3_val); -+ -+ /*@AND4 */ -+ odm_set_bb_reg(dm, R_0x1ce8, BIT(26), adv->la_and4_inv); -+ odm_set_bb_reg(dm, R_0x1cf0, MASKDWORD, adv->la_and4_mask); -+ odm_set_bb_reg(dm, R_0x1cec, MASKDWORD, adv->la_and4_bitmap); -+ } -+} -+ -+void phydm_la_bb_adv_cmd_show_jgr3(void *dm_void, u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct la_adv_trig *adv = &smp->adv_trig_table; -+ -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ " *And0 Disable=%d\n", adv->la_ori_bb_dis); -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ " *And1{sel,val,inv}={0x%x,0x%x,%d}\n *And2{sel,val,inv}={0x%x,0x%x,%d}\n *And3{sel,val,inv}={0x%x,0x%x,%d}\n", -+ adv->la_and1_sel, adv->la_and1_val, adv->la_and1_inv, -+ adv->la_and2_sel, adv->la_and2_val, adv->la_and2_inv, -+ adv->la_and3_sel, adv->la_and3_val, adv->la_and3_inv); -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ " *And4{mask,bitmap,inv}={0x%x,0x%x,%d}\n", -+ adv->la_and4_mask, adv->la_and4_bitmap, adv->la_and4_inv); -+} -+ -+void phydm_la_bb_adv_cmd_jgr3(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct la_adv_trig *adv = &smp->adv_trig_table; -+ u32 var1[10] = {0}; -+ u32 adv_trig_en; -+ -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) -+ return; -+ -+ if ((strcmp(input[2], "show") == 0)) { -+ phydm_la_bb_adv_cmd_show_jgr3(dm, _used, output, _out_len); -+ return; -+ } -+ -+ PHYDM_SSCANF(input[2], DCMD_HEX, &var1[0]); -+ PHYDM_SSCANF(input[3], DCMD_HEX, &var1[1]); -+ PHYDM_SSCANF(input[4], DCMD_HEX, &var1[2]); -+ PHYDM_SSCANF(input[5], DCMD_HEX, &var1[3]); -+ PHYDM_SSCANF(input[6], DCMD_HEX, &var1[4]); -+ -+ adv_trig_en = var1[0]; -+ -+ if (adv_trig_en != 1) { -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "Back to Ori-BB-trig\n"); -+ phydm_la_bb_adv_reset_jgr3(dm); -+ return; -+ } -+ -+ adv->la_adv_bbtrigger_en = true; -+ -+ if (var1[1] == 0) { -+ adv->la_ori_bb_dis = (boolean)var1[2]; -+ } else if (var1[1] == 1) { -+ adv->la_and1_sel = (u8)var1[2]; -+ adv->la_and1_val = (u8)var1[3]; -+ adv->la_and1_inv = (boolean)var1[4]; -+ } else if (var1[1] == 2) { -+ adv->la_and2_sel = (u8)var1[2]; -+ adv->la_and2_val = (u8)var1[3]; -+ adv->la_and2_inv = (boolean)var1[4]; -+ } else if (var1[1] == 3) { -+ adv->la_and3_sel = (u8)var1[2]; -+ adv->la_and3_val = (u8)var1[3]; -+ adv->la_and2_inv = (boolean)var1[4]; -+ } else if (var1[1] == 4) { -+ adv->la_and4_mask = var1[2]; -+ adv->la_and4_bitmap = var1[3]; -+ adv->la_and4_inv = (boolean)var1[4]; -+ } -+ -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "[Adv_trig_en=%d]\n\n", adv_trig_en); -+ -+ phydm_la_bb_adv_cmd_show_jgr3(dm, _used, output, _out_len); -+} -+ -+void phydm_la_cmd_fast_jgr3(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct la_adv_trig *adv = &smp->adv_trig_table; -+ enum auto_detection_state ad_mode; -+ const u8 ofdm_codeword[8] = {0xb, 0xf, 0xa, 0xe, 0x9, 0xd, 0x8, 0xc}; -+ u32 codeword; -+ u8 rate_idx; -+ u32 trig_time_cca = 0; -+ s32 val_sign32_tmp = 0; -+ u32 var[10] = {0}; -+ u8 bw = *dm->band_width; -+ -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) { -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "Only Support for JGR-3 ICs\n"); -+ return; -+ } -+ -+ if (bw > 2) { -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "Not Support for BW > %dM\n", 20 << bw); -+ return; -+ } -+ -+ PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var[0]); -+ PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var[1]); -+ PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var[2]); -+ -+ trig_time_cca = ((smp->smp_number_max >> (bw + 1)) / 10) -+ - (2 << (2 - bw)) - (2 - bw); -+ -+ if (var[0] < 10) { -+ /*=== [Type: 0 ~ 10] : CCA P-edge trigger ==========================*/ -+ /*--- Basic Trigger Setting --------------------------------*/ -+ smp->la_trig_mode = 1; -+ smp->la_trig_sig_sel = 2; -+ smp->la_trigger_time = trig_time_cca; -+ smp->la_mac_mask_or_hdr_sel = 0; -+ smp->la_trigger_edge = 0; -+ smp->la_smp_rate = 2 - bw; -+ smp->la_count = 0; -+ if (var[0] == 0) { /*AGC*/ -+ smp->la_dma_type = 5; -+ smp->la_dbg_port = 0x870; -+ } else if (var[0] == 1) { /*EVM*/ -+ smp->la_dma_type = 4; -+ smp->la_dbg_port = 0x392; -+ } else if (var[0] == 2) { /*SNR*/ -+ smp->la_dma_type = 4; -+ if (var[1] == 0) -+ smp->la_dbg_port = 0x89e; -+ else -+ smp->la_dbg_port = 0xa9e; -+ } else if (var[0] == 3) { /*CFO*/ -+ smp->la_dma_type = 4; -+ if (var[1] == 0) -+ smp->la_dbg_port = 0x88c; -+ else -+ smp->la_dbg_port = 0xa8c; -+ } else if (var[0] == 4) { /*ADC*/ -+ if (var[1] == 0) { -+ smp->la_dma_type = 0; -+ smp->la_dbg_port = 0x880; -+ } else { -+ smp->la_dma_type = 1; -+ smp->la_dbg_port = 0xa80; -+ } -+ } -+ /*--- Adv-Trigger Setting------------------------------------*/ -+ adv->la_adv_bbtrigger_en = false; -+ } else if (var[0] < 20) { -+ /*=== [Type: 10 ~ 19]: RX-EVM Trigger ===============================*/ -+ /*--- Basic Trigger Setting ---------------------------------*/ -+ smp->la_trig_mode = 0; -+ smp->la_trig_sig_sel = 0; -+ smp->la_mac_mask_or_hdr_sel = 0; -+ smp->la_trigger_edge = 0; -+ smp->la_smp_rate = 2 - bw; -+ smp->la_count = 0; -+ smp->la_dma_type = 4; -+ smp->la_dbg_port = 0x392; -+ -+ /*--- Adv-Trigger Setting -----------------------------------*/ -+ phydm_la_bb_adv_reset_jgr3(dm); -+ adv->la_adv_bbtrigger_en = true; -+ -+ /*And[0]*/ -+ adv->la_ori_bb_dis = true; -+ -+ /*And[1]*/ -+ adv->la_and1_inv = 0; -+ adv->la_and1_sel = 4; /*RX-state*/ -+ if (var[2] == 0) { -+ /*L-preamble 8+8+4 = 20*/ -+ smp->la_trigger_time = trig_time_cca - 20; -+ /*Legacy Data*/ -+ adv->la_and1_val = 5; -+ } else if (var[2] == 1) { -+ /*HT-preamble (8+8+4) + (8+4+4*Nrx) = 32 + Nrx * 4*/ -+ smp->la_trigger_time = trig_time_cca - 32 - -+ (dm->num_rf_path * 4); -+ /*HT Data*/ -+ adv->la_and1_val = 18; -+ } else { -+ /*VHT-preamble (8+8+4) + (8+4+4*Nrx) +4 = 36 + Nrx * 4*/ -+ smp->la_trigger_time = trig_time_cca - 36 - -+ (dm->num_rf_path * 4); -+ /*VHT Data*/ -+ adv->la_and1_val = 18; -+ } -+ -+ /*And[2]*/ -+ adv->la_and2_inv = 0; -+ adv->la_and2_sel = 0; /*Disable*/ -+ -+ /*And[3]*/ -+ adv->la_and2_inv = 0; -+ adv->la_and3_sel = 0; /*Disable*/ -+ -+ /*And[4]*/ -+ adv->la_and4_inv = 0; -+ -+ if (var[0] == 11) { -+ /*[>= -X dB]*/ -+ if (var[1] == 2) { -+ adv->la_and4_bitmap = 0; -+ adv->la_and4_mask = 0x1; -+ } else if (var[1] == 4) { -+ adv->la_and4_bitmap = 0; -+ adv->la_and4_mask = 0x3; -+ } else if (var[1] == 8) { -+ adv->la_and4_bitmap = 0; -+ adv->la_and4_mask = 0x7; -+ } else if (var[1] == 16) { -+ adv->la_and4_bitmap = 0; -+ adv->la_and4_mask = 0xf; -+ } else if (var[1] == 32) { -+ adv->la_and4_bitmap = 0; -+ adv->la_and4_mask = 0x1f; -+ } else if (var[1] == 64) { -+ adv->la_and4_bitmap = 0; -+ adv->la_and4_mask = 0x3f; -+ } else { -+ PDM_SNPF(*_out_len, *_used, output + *_used, -+ *_out_len - *_used, -+ "Not Support >= -%d dB\n", var[1]); -+ return; -+ } -+ } else if (var[0] == 10) { -+ /*[<= -X dB]*/ -+ if (var[1] == 2) { -+ adv->la_and4_bitmap = 0x7e; -+ adv->la_and4_mask = 0x7e; -+ } else if (var[1] == 4) { -+ adv->la_and4_bitmap = 0x7c; -+ adv->la_and4_mask = 0x7c; -+ } else if (var[1] == 8) { -+ adv->la_and4_bitmap = 0x78; -+ adv->la_and4_mask = 0x78; -+ } else if (var[1] == 16) { -+ adv->la_and4_bitmap = 0x70; -+ adv->la_and4_mask = 0x70; -+ } else if (var[1] == 32) { -+ adv->la_and4_bitmap = 0x60; -+ adv->la_and4_mask = 0x60; -+ } else if (var[1] == 64) { -+ adv->la_and4_bitmap = 0x40; -+ adv->la_and4_mask = 0x40; -+ } else { -+ PDM_SNPF(*_out_len, *_used, output + *_used, -+ *_out_len - *_used, -+ "Not Support <= -%d dB\n", var[1]); -+ return; -+ } -+ } else if (var[0] == 12) { -+ /*[= -X dB]*/ -+ val_sign32_tmp = 0 - (s32)var[1]; -+ adv->la_and4_bitmap = (u32)(val_sign32_tmp & 0x7f); -+ adv->la_and4_mask = 0x7f; -+ } -+ } else if (var[0] < 30) { -+ /*=== [Type: 20 ~ 29]: RX-Rate Trigger ==============================*/ -+ /*--- Basic Trigger Setting ---------------------------------*/ -+ smp->la_trig_mode = 0; -+ smp->la_trig_sig_sel = 0; -+ smp->la_mac_mask_or_hdr_sel = 0; -+ smp->la_trigger_edge = 0; -+ smp->la_smp_rate = 2 - bw; -+ smp->la_count = 0; -+ smp->la_dma_type = 4; -+ -+ rate_idx = (u8)var[1]; -+ -+ /*--- Adv-Trigger Setting -----------------------------------*/ -+ phydm_la_bb_adv_reset_jgr3(dm); -+ adv->la_adv_bbtrigger_en = true; -+ -+ /*And[0]*/ -+ adv->la_ori_bb_dis = true; -+ -+ /*And[1]*/ -+ adv->la_and1_inv = 0; -+ adv->la_and1_sel = 4; /*RX-state*/ -+ -+ if (rate_idx <= ODM_RATE54M && rate_idx >= ODM_RATE6M) { -+ ad_mode = AD_LEGACY_MODE; -+ codeword = (u32)ofdm_codeword[rate_idx - ODM_RATE6M]; -+ smp->la_dbg_port = 0x3a9; -+ /*L-preamble 8+8 = 16*/ -+ smp->la_trigger_time = trig_time_cca - 20; -+ /*Legacy Data*/ -+ adv->la_and1_val = 5; -+ } else if (rate_idx <= ODM_RATEMCS31) { -+ ad_mode = AD_HT_MODE; -+ codeword = (u32)(rate_idx - ODM_RATEMCS0); -+ smp->la_dbg_port = 0x3aa; -+ /*HT-preamble (8+8+4) + (8+4+4*Nrx) = 32 + Nrx * 4*/ -+ smp->la_trigger_time = trig_time_cca - 32 - -+ (dm->num_rf_path * 4); -+ /*HT,VHT Data*/ -+ adv->la_and1_val = 18; -+ } else if (rate_idx <= ODM_RATEVHTSS4MCS9) { -+ ad_mode = AD_VHT_MODE; -+ codeword = (u32)phydm_rate_order_compute(dm, rate_idx); -+ codeword--; -+ smp->la_dbg_port = 0x3ab; -+ /*VHT-preamble (8+8+4) + (8+4+4*Nrx) = 36 + Nrx * 4*/ -+ smp->la_trigger_time = trig_time_cca - 36 - -+ (dm->num_rf_path * 4); -+ /*HT,VHT Data*/ -+ adv->la_and1_val = 18; -+ } else { -+ PDM_SNPF(*_out_len, *_used, output + *_used, -+ *_out_len - *_used, -+ "Not Support\n"); -+ return; -+ } -+ -+ /*And[2]*/ -+ adv->la_and2_inv = 0; -+ adv->la_and2_sel = 0; /*Disable*/ -+ -+ /*And[3]*/ -+ adv->la_and2_inv = 0; -+ adv->la_and3_sel = 0; /*Disable*/ -+ -+ /*And[4]*/ -+ adv->la_and4_inv = 0; -+ -+ if (var[0] == 20) { -+ if (ad_mode == AD_LEGACY_MODE) { -+ adv->la_and4_bitmap = codeword; -+ adv->la_and4_mask = 0x3000000f; -+ } else if (ad_mode == AD_HT_MODE) { -+ adv->la_and4_bitmap = (2 << 28) | codeword; -+ adv->la_and4_mask = 0x3000003f; -+ } else { /* AD_VHT_MODE*/ -+ adv->la_and4_bitmap = (1 << 28) | -+ (codeword << 4); -+ adv->la_and4_mask = 0x300000f0; -+ } -+ } else { -+ PDM_SNPF(*_out_len, *_used, output + *_used, -+ *_out_len - *_used, -+ "Not Support\n"); -+ return; -+ } -+ } else { -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "Not Support\n"); -+ return; -+ } -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "[Basic-Trigger]\n"); -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ " *echo lamode 1 %d %d %d %d %d %x %d %d %d\n\n", -+ smp->la_trig_mode, smp->la_trig_sig_sel, smp->la_dma_type, -+ smp->la_trigger_time, smp->la_mac_mask_or_hdr_sel, -+ smp->la_dbg_port, smp->la_trigger_edge, smp->la_smp_rate, -+ smp->la_count); -+ pr_debug("echo lamode 1 %d %d %d %d %d %x %d %d %d\n\n", -+ smp->la_trig_mode, smp->la_trig_sig_sel, smp->la_dma_type, -+ smp->la_trigger_time, smp->la_mac_mask_or_hdr_sel, -+ smp->la_dbg_port, smp->la_trigger_edge, smp->la_smp_rate, -+ smp->la_count); -+ -+ if (adv->la_adv_bbtrigger_en) { -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "[Adv-Trigger]\n"); -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ " *And0 Disable=%d\n", adv->la_ori_bb_dis); -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ " *And1{sel,val,inv}={0x%x,0x%x,%d}\n *And2{sel,val,inv}={0x%x,0x%x,%d}\n *And3{sel,val,inv}={0x%x,0x%x,%d}\n", -+ adv->la_and1_sel, adv->la_and1_val, adv->la_and1_inv, -+ adv->la_and2_sel, adv->la_and2_val, adv->la_and2_inv, -+ adv->la_and3_sel, adv->la_and3_val, adv->la_and3_inv); -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ " *And4{mask,bitmap,inv}={0x%x,0x%x,%d}\n", -+ adv->la_and4_mask, adv->la_and4_bitmap, -+ adv->la_and4_inv); -+ } -+ phydm_la_set(dm); -+} -+ -+#endif -+ -+void -+phydm_la_buffer_print(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct rt_adcsmp_string *buf = &smp->adc_smp_buf; -+ u64 la_pattern_msb, la_pattern_lsb; -+ u64 la_pattern, la_pattern_part; -+ s64 tmp_s64; -+ u64 mask = 0xffffffff; -+ u8 mask_length = 0; -+ u32 i; -+ u32 idx; -+ u32 var[10] = {0}; -+ -+ if (!buf->octet || buf->length == 0 || buf->length < smp->smp_number) -+ return; -+ -+ PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var[0]); -+ PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var[1]); -+ PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var[2]); -+ PHYDM_SSCANF(input[5], DCMD_DECIMAL, &var[3]); -+ -+ pr_debug("echo lamode 1 %d %d %d %d %d %x %d %d %d\n\n", -+ smp->la_trig_mode, smp->la_trig_sig_sel, smp->la_dma_type, -+ smp->la_trigger_time, smp->la_mac_mask_or_hdr_sel, -+ smp->la_dbg_port, smp->la_trigger_edge, smp->la_smp_rate, -+ smp->la_count); -+ pr_debug("[LA Data Dump] smp_number = %d\n", smp->smp_number); -+ pr_debug("Dump_Start\n"); -+ -+ if (var[0] == 0) { -+ for (i = 0; i < smp->smp_number; i++) { -+ idx = i << 1; -+ pr_debug("%08x%08x\n", buf->octet[idx], -+ buf->octet[idx + 1]); -+ } -+ } else if (var[0] == 1) { -+ /*------------------------*/ -+ if (var[1] == 0) -+ pr_debug("[Hex]\n"); -+ else if (var[1] == 1) -+ pr_debug("[Dec unsigned]\n"); -+ else if (var[1] == 2) -+ pr_debug("[Dec signed]\n"); -+ -+ pr_debug("BIT[%d:%d]\n", var[3], var[2]); -+ -+ if (var[2] > var[3]) { -+ pr_debug("[Warning] BIT_L > BIT_H\n"); -+ return; -+ } -+ -+ mask_length = (u8)(var[3] - var[2] + 1); -+ mask = phydm_gen_bitmask(mask_length) << var[2]; -+ /*------------------------*/ -+ for (i = 0; i < smp->smp_number; i++) { -+ idx = i << 1; -+ la_pattern_msb = (u64)buf->octet[idx]; -+ la_pattern_lsb = (u64)buf->octet[idx + 1]; -+ la_pattern = (la_pattern_msb << 32) | la_pattern_lsb; -+ la_pattern_part = (la_pattern & mask) >> var[2]; -+ -+ if (var[1] == 0) { -+ pr_debug("0x%llx\n", la_pattern_part); -+ } else if (var[1] == 1) { -+ pr_debug("%llu\n", la_pattern_part); -+ } else if (var[1] == 2) { -+ tmp_s64 = phydm_cnvrt_2_sign_64(la_pattern_part, -+ mask_length); -+ pr_debug("%lld\n", tmp_s64); -+ } -+ } -+ } -+ pr_debug("Dump_End\n\n"); -+} -+ -+void -+phydm_la_buffer_release(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct rt_adcsmp_string *buf = &smp->adc_smp_buf; -+ -+ if (buf->length != 0x0) { -+ odm_free_memory(dm, buf->octet, buf->length); -+ buf->length = 0x0; -+ } -+} -+ -+boolean -+phydm_la_buffer_allocate(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ #endif -+ struct rt_adcsmp_string *buf = &smp->adc_smp_buf; -+ boolean ret = true; -+ -+ pr_debug("[LA mode BufferAllocate]\n"); -+ -+ if (buf->length == 0) { -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (PlatformAllocateMemoryWithZero(adapter, (void **)& -+ buf->octet, -+ buf->buffer_size) != -+ RT_STATUS_SUCCESS) -+ ret = false; -+ #else -+ odm_allocate_memory(dm, (void **)&buf->octet, buf->buffer_size); -+ -+ if (!buf->octet) -+ ret = false; -+ #endif -+ -+ if (ret) -+ buf->length = buf->buffer_size; -+ } -+ -+ return ret; -+} -+ -+void phydm_la_access_tx_pkt_buf(void *dm_void, u32 addr, u32 buff_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct rt_adcsmp_string *buf = &smp->adc_smp_buf; -+ u32 page; -+ u32 data_l = 0, data_h = 0; -+ -+ #if (RTL8192F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8192F) { -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ indirect_access_sdram_8192f(dm->adapter, TX_PACKET_BUFFER, -+ TRUE, (u16)addr >> 3, 0, -+ &data_h, &data_l); -+ #else -+ odm_write_1byte(dm, R_0x0106, 0x69); -+ odm_set_mac_reg(dm, R_0x0140, MASKDWORD, addr >> 3); -+ data_l = odm_get_mac_reg(dm, R_0x0144, MASKDWORD); -+ data_h = odm_get_mac_reg(dm, R_0x0148, MASKDWORD); -+ odm_write_1byte(dm, R_0x0106, 0x0); -+ #endif -+ } else -+ #endif -+ { -+ /* Reg140=0x780+(addr>>12), -+ * addr=0x30~0x3F, total 16 pages -+ */ -+ page = addr >> 12; -+ -+ if (page != smp->txff_page) { -+ smp->txff_page = page; -+ odm_set_mac_reg(dm, R_0x0140, MASKLWORD, 0x780 + page); -+ } -+ data_l = odm_read_4byte(dm, R_0x8000 + (addr & 0xfff)); -+ data_h = odm_read_4byte(dm, R_0x8000 + (addr & 0xfff) + 4); -+ } -+ -+ buf->octet[buff_idx] = data_h; -+ buf->octet[buff_idx + 1] = data_l; -+ -+ /*@==== [Print LA Patterns] ==========================================*/ -+ if (smp->is_la_print) -+ pr_debug("%08x%08x\n", data_h, data_l); -+} -+ -+void phydm_la_get_tx_pkt_buf(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct rt_adcsmp_string *buf = &smp->adc_smp_buf; -+ u32 i = 0, value32 = 0; -+ u32 addr = 0, finish_addr = 0; /* @(unit: 8Byte)*/ -+ boolean is_round_up = false; -+ u32 addr_8byte = 0; -+ u32 round_up_point = 0; -+ #if (RTL8814B_SUPPORT) -+ boolean recover_success = true; -+ #endif -+ -+ odm_memory_set(dm, buf->octet, 0, buf->length); -+ pr_debug("GetTxPktBuf\n"); -+ -+ /*@==== [Get LA Report] ==============================================*/ -+ if (dm->support_ic_type & ODM_RTL8192F) { -+ value32 = odm_read_4byte(dm, R_0x7f0); -+ is_round_up = (boolean)((value32 & BIT(31)) >> 31); -+ finish_addr = (value32 & 0x7FFF8000) >> 15; /*@16 bit (unit: 8Byte)*/ -+ } else { -+ odm_write_1byte(dm, R_0x0106, 0x69); -+ value32 = odm_read_4byte(dm, R_0x7c0); -+ is_round_up = (boolean)((value32 & BIT(31)) >> 31); -+ -+ if (dm->support_ic_type & PHYDM_LA_STORE_IN_IMEM_IC) -+ finish_addr = (value32 & 0x7FFF8000) >> 15; /*@16 bit (unit: 8Byte)*/ -+ else -+ finish_addr = (value32 & 0x7FFF0000) >> 16; /*@15bit (unit: 8Byte)*/ -+ } -+ -+ #if (RTL8814B_SUPPORT) -+ recover_success = phydm_la_finish_addr_recover_8814B(dm, &finish_addr); -+ #endif -+ -+ pr_debug("start_addr = ((0x%x)), end_addr = ((0x%x)), buffer_size = ((0x%x))\n", -+ buf->start_pos, buf->end_pos, buf->buffer_size); -+ if (is_round_up) { -+ pr_debug("buf_start(0x%x)|----2---->|finish_addr(0x%x)|----1---->|buf_end(0x%x)\n", -+ buf->start_pos, finish_addr << 3, buf->end_pos); -+ addr = (finish_addr + 2) << 3; /*+1 or +2 ??*/ -+ round_up_point = (buf->end_pos - addr) >> 3; /*@Byte to 8Byte*/ -+ smp->smp_number = smp->smp_number_max; -+ pr_debug("is_round_up=(%d), round_up_point=(%d), 0x7c0/0x7F0=(0x%x), smp_number=(%d)\n", -+ is_round_up, round_up_point, value32, smp->smp_number); -+ } else { -+ pr_debug("buf_start(0x%x)|------->|finish_addr(0x%x) |buf_end(0x%x)\n", -+ buf->start_pos, finish_addr << 3, buf->end_pos); -+ addr = buf->start_pos; -+ addr_8byte = addr >> 3; -+ smp->smp_number = DIFF_2(addr_8byte, finish_addr); -+ -+ pr_debug("is_round_up=(%d), smp_number=(%d)\n", -+ is_round_up, smp->smp_number); -+ } -+ -+ /*@==== [Get LA Patterns in TXFF] ====================================*/ -+ pr_debug("Dump_Start\n"); -+ #ifdef PHYDM_COMPILE_LA_STORE_IN_IMEM -+ phydm_la_mv_data_2_tx_buffer(dm); -+ #endif -+ -+ #if (RTL8814B_SUPPORT) -+ if ((dm->support_ic_type & ODM_RTL8814B) && !recover_success) { -+ addr = buf->start_pos; -+ smp->smp_number = smp->smp_number_max; -+ } -+ #endif -+ -+ for (i = 0; i < smp->smp_number; i++) { -+ phydm_la_access_tx_pkt_buf(dm, addr, i << 1); -+ addr += 8; -+ -+ if (addr >= buf->end_pos) -+ addr = buf->start_pos; /*Ring buffer*/ -+ } -+ -+ #if (RTL8197F_SUPPORT) -+ phydm_la_stop_dma_8197f(dm, PHYDM_RESTORE); -+ #endif -+ pr_debug("Dump_End\n"); -+} -+ -+void phydm_la_set_trig_src(void *dm_void, u8 la_trig_mode) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 reg = (dm->support_ic_type == ODM_RTL8192F) ? R_0x7f0 : R_0x7c0; -+ -+ if (la_trig_mode == PHYDM_ADC_MAC_TRIG) -+ odm_set_mac_reg(dm, reg, BIT(3), 1); -+ else -+ odm_set_mac_reg(dm, reg, BIT(3), 0); -+} -+ -+void phydm_la_set_mac_iq_dump(void *dm_void, boolean impossible_trig_condi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ u32 reg_value = 0; -+ u32 reg1 = 0, reg2 = 0, reg3 = 0; -+ -+ if (dm->support_ic_type & ODM_RTL8192F) { -+ reg1 = R_0x7f0; -+ reg2 = R_0x7f4; -+ reg3 = R_0x7f8; -+ } else { -+ reg1 = R_0x7c0; -+ reg2 = R_0x7c4; -+ reg3 = R_0x7c8; -+ } -+ -+ odm_write_1byte(dm, reg1, 0); /*@clear all reg1*/ -+ /*@Enable LA mode HW block*/ -+ odm_set_mac_reg(dm, reg1, BIT(0), 1); -+ -+ #if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8723F) -+ phydm_la_mac_clk_en(dm, true); -+ #endif -+ -+ if (smp->la_trig_mode == PHYDM_MAC_TRIG) { -+ smp->la_dump_mode = LA_MAC_DBG_DUMP; -+ /*polling bit for MAC mode*/ -+ odm_set_mac_reg(dm, reg1, BIT(2), 1); -+ /*trigger mode for MAC*/ -+ odm_set_mac_reg(dm, reg1, 0x18, smp->la_trigger_edge); -+ pr_debug("[MAC_trig] ref_mask=(0x%x), ref_value=(0x%x), dbg_port =(0x%x)\n", -+ smp->la_mac_mask_or_hdr_sel, smp->la_trig_sig_sel, -+ smp->la_dbg_port); -+ /*@[Set MAC Debug Port]*/ -+ odm_set_mac_reg(dm, R_0xf4, BIT(16), 1); -+ odm_set_mac_reg(dm, R_0x38, 0xff0000, smp->la_dbg_port); -+ odm_set_mac_reg(dm, reg2, MASKDWORD, -+ smp->la_mac_mask_or_hdr_sel); -+ odm_set_mac_reg(dm, reg3, MASKDWORD, smp->la_trig_sig_sel); -+ } else { -+ smp->la_dump_mode = LA_BB_ADC_DUMP; -+ -+ if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) { -+ /*polling bit for MAC trigger event*/ -+ if (impossible_trig_condi) -+ phydm_la_set_trig_src(dm, PHYDM_ADC_BB_TRIG); -+ else -+ phydm_la_set_trig_src(dm, PHYDM_ADC_MAC_TRIG); -+ -+ odm_set_mac_reg(dm, reg1, 0xc0, smp->la_trig_sig_sel); -+ -+ if (smp->la_trig_sig_sel == ADCSMP_TRIG_REG) { -+ /* @manual trigger reg1[5] = 0->1*/ -+ odm_set_mac_reg(dm, reg1, BIT(5), 1); -+ } -+ } -+ /*polling bit for BB ADC mode*/ -+ odm_set_mac_reg(dm, reg1, BIT(1), 1); -+ } -+ -+ reg_value = odm_get_mac_reg(dm, reg1, 0xff); -+ pr_debug("4. [Set MAC IQ dump] 0x%x[7:0]=(0x%x)\n", reg1, reg_value); -+ -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, -+ ("4. [Set MAC IQ dump] 0x%x[7:0]=(0x%x)\n", reg1, -+ reg_value)); -+ #endif -+} -+ -+void phydm_la_set_bb_dbg_port(void *dm_void, boolean impossible_trig_condi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ -+ u8 trig_mode = smp->la_trig_mode; -+ u32 trig_sel = smp->la_trig_sig_sel; -+ u32 dbg_port = smp->la_dbg_port; -+ -+ if (trig_mode == PHYDM_MAC_TRIG) -+ trig_sel = 0; /*@ignore this setting*/ -+ -+ /*set BB debug port*/ -+ if (impossible_trig_condi) { -+ dbg_port = 0xf; -+ trig_sel = 0; -+ pr_debug("[BB Setting] fake-trigger!\n"); -+ } -+ -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port)) { -+ pr_debug(" *Set dbg_port=(0x%x)\n", dbg_port); -+ } else { -+ dbg_port = phydm_get_bb_dbg_port_idx(dm); -+ pr_debug("[Set dbg_port fail!] Curr-DbgPort=0x%x\n", dbg_port); -+ } -+ -+ /*@debug port bit*/ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ odm_set_bb_reg(dm, R_0x95c, 0x1f, trig_sel); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ odm_set_bb_reg(dm, R_0x1ce4, 0x3e000, trig_sel); -+ #endif -+ } else { -+ odm_set_bb_reg(dm, R_0x9a0, 0x1f, trig_sel); -+ } -+ -+ if (smp->la_trig_mode == PHYDM_ADC_BB_TRIG) { -+ pr_debug(" *Set dbg_port[BIT] = %d\n", trig_sel); -+ -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, -+ (" *Set dbg_port[BIT] = %d\n", trig_sel)); -+ #endif -+ } -+} -+ -+void phydm_la_set_bb(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ -+ u8 trig_mode = smp->la_trig_mode; -+ u8 edge = smp->la_trigger_edge; -+ u8 smp_rate = smp->la_smp_rate; -+ u8 dma_type = smp->la_dma_type; -+ u32 dbg_port_hdr_sel = 0; -+ char *trig_mode_word = NULL; -+ -+ pr_debug("3. [BB Setting] mode=(%d), Edge=(%s), smp_rate=(%dM), Dma_type=(%d)\n", -+ trig_mode, -+ (edge == 0) ? "P" : "N", 80 >> smp_rate, dma_type); -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ if (trig_mode == PHYDM_ADC_RF0_TRIG) -+ dbg_port_hdr_sel = 9; /*@DBGOUT_RFC_a[31:0]*/ -+ else if (trig_mode == PHYDM_ADC_RF1_TRIG) -+ dbg_port_hdr_sel = 8; /*@DBGOUT_RFC_b[31:0]*/ -+ else if ((trig_mode == PHYDM_ADC_BB_TRIG) || -+ (trig_mode == PHYDM_ADC_MAC_TRIG)) { -+ if (smp->la_mac_mask_or_hdr_sel <= 0xf) -+ dbg_port_hdr_sel = smp->la_mac_mask_or_hdr_sel; -+ else -+ dbg_port_hdr_sel = 0; -+ } -+ -+ phydm_bb_dbg_port_header_sel(dm, dbg_port_hdr_sel); -+ -+ odm_set_bb_reg(dm, R_0x8b4, BIT(7), 1);/*@update rpt every pkt*/ -+ odm_set_bb_reg(dm, R_0x95c, 0xf00, dma_type); -+ /*@0: posedge, 1: negedge*/ -+ odm_set_bb_reg(dm, R_0x95c, BIT(31), edge); -+ odm_set_bb_reg(dm, R_0x95c, 0xe0, smp_rate); -+ /* @(0:) '80MHz' -+ * (1:) '40MHz' -+ * (2:) '20MHz' -+ * (3:) '10MHz' -+ * (4:) '5MHz' -+ * (5:) '2.5MHz' -+ * (6:) '1.25MHz' -+ * (7:) '160MHz (for BW160 ic)' -+ */ -+ #if (RTL8821C_SUPPORT || RTL8195B_SUPPORT) -+ phydm_la_clk_en(dm, true); -+ #endif -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ odm_set_bb_reg(dm, R_0x1eb4, BIT(23), 0x1);/*@update rpt every pkt*/ -+ /*@MAC-PHY timing*/ -+ odm_set_bb_reg(dm, R_0x1ce4, BIT(7) | BIT(6), 0); -+ odm_set_bb_reg(dm, R_0x1cf4, BIT(23), 1); /*@LA mode on*/ -+ odm_set_bb_reg(dm, R_0x1ce4, 0x3f, dma_type); -+ /*@0: posedge, 1: negedge ??*/ -+ odm_set_bb_reg(dm, R_0x1ce4, BIT(26), edge); -+ odm_set_bb_reg(dm, R_0x1ce4, 0x700, smp_rate); -+ -+ phydm_la_bb_adv_trig_setting_jgr3(dm); -+ #endif -+ } else { -+ if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) -+ odm_set_bb_reg(dm, R_0xd00, BIT(26), 0x1); /*@update rpt every pkt*/ -+ -+ #if (RTL8192F_SUPPORT) -+ if ((dm->support_ic_type & ODM_RTL8192F)) -+ /*@LA reset HW block enable for true-mac asic*/ -+ odm_set_bb_reg(dm, R_0x9a0, BIT(15), 1); -+ #endif -+ -+ odm_set_bb_reg(dm, R_0x9a0, 0xf00, dma_type); -+ /*@0: posedge, 1: negedge*/ -+ odm_set_bb_reg(dm, R_0x9a0, BIT(31), edge); -+ odm_set_bb_reg(dm, R_0x9a0, 0xe0, smp_rate); -+ /* @(0:) '80MHz' -+ * (1:) '40MHz' -+ * (2:) '20MHz' -+ * (3:) '10MHz' -+ * (4:) '5MHz' -+ * (5:) '2.5MHz' -+ * (6:) '1.25MHz' -+ * (7:) '160MHz (for BW160 ic)' -+ */ -+ } -+} -+ -+void phydm_la_set_mac_trigger_time(void *dm_void, u32 trigger_time_mu_sec) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 time_unit_num = 0; -+ u32 unit = 0; -+ -+ if (trigger_time_mu_sec < 128) -+ unit = 0; /*unit: 1mu sec*/ -+ else if (trigger_time_mu_sec < 256) -+ unit = 1; /*unit: 2mu sec*/ -+ else if (trigger_time_mu_sec < 512) -+ unit = 2; /*unit: 4mu sec*/ -+ else if (trigger_time_mu_sec < 1024) -+ unit = 3; /*unit: 8mu sec*/ -+ else if (trigger_time_mu_sec < 2048) -+ unit = 4; /*unit: 16mu sec*/ -+ else if (trigger_time_mu_sec < 4096) -+ unit = 5; /*unit: 32mu sec*/ -+ else if (trigger_time_mu_sec < 8192) -+ unit = 6; /*unit: 64mu sec*/ -+ else if (trigger_time_mu_sec < 16384) -+ if (dm->support_ic_type & ODM_RTL8723F) -+ unit = 7; /*unit: 128mu sec*/ -+ -+ time_unit_num = (u8)(trigger_time_mu_sec >> unit); -+ -+ pr_debug("2. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", -+ time_unit_num, unit); -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ( -+ "3. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", -+ time_unit_num, unit)); -+ #endif -+ -+ if (dm->support_ic_type & ODM_RTL8192F) { -+ odm_set_mac_reg(dm, R_0x7fc, BIT(2) | BIT(1) | BIT(0), unit); -+ odm_set_mac_reg(dm, R_0x7f0, 0x7f00, (time_unit_num & 0x7f)); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_RTL8814B) { -+ odm_set_mac_reg(dm, R_0x7cc, BIT(20) | BIT(19) | BIT(18), unit); -+ odm_set_mac_reg(dm, R_0x7c0, 0x7f00, (time_unit_num & 0x7f)); -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ odm_set_mac_reg(dm, R_0x7cc, BIT(18) | BIT(17) | BIT(16), unit); -+ odm_set_mac_reg(dm, R_0x7c0, 0x7f00, (time_unit_num & 0x7f)); -+ #endif -+ } else { -+ odm_set_mac_reg(dm, R_0x7cc, BIT(20) | BIT(19) | BIT(18), unit); -+ odm_set_mac_reg(dm, R_0x7c0, 0x7f00, (time_unit_num & 0x7f)); -+ } -+} -+ -+void phydm_la_set_buff_mode(void *dm_void, enum la_buff_mode mode) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct rt_adcsmp_string *buf = &smp->adc_smp_buf; -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ struct rtl8192cd_priv *priv = dm->priv; -+ u8 normal_LA_on = priv->pmib->miscEntry.normal_LA_on; -+#endif -+ u32 buff_size_base = 0; -+ u32 end_pos_tmp = 0; -+ -+ smp->la_buff_mode = mode; -+ switch (dm->support_ic_type) { -+ case ODM_RTL8814A: -+ buff_size_base = 0x10000; -+ end_pos_tmp = 0x40000; -+ break; -+ case ODM_RTL8822B: -+ case ODM_RTL8822C: -+ case ODM_RTL8812F: -+ buff_size_base = 0x20000; /*@WIN: TX_FIFO_SIZE_LA_8822C*/ -+ end_pos_tmp = 0x40000; -+ break; -+ case ODM_RTL8814B: -+ buff_size_base = 0x30000; -+ end_pos_tmp = 0x60000; -+ break; -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ case ODM_RTL8197F: -+ case ODM_RTL8198F: -+ case ODM_RTL8197G: -+ buff_size_base = 0x10000; -+ end_pos_tmp = (normal_LA_on == 1) ? 0x20000 : 0x10000; -+ break; -+#endif -+ case ODM_RTL8192F: -+ buff_size_base = 0xE000; -+ end_pos_tmp = 0x10000; -+ break; -+ case ODM_RTL8821C: -+ buff_size_base = 0x8000; -+ end_pos_tmp = 0x10000; -+ break; -+ case ODM_RTL8195B: -+ buff_size_base = 0x4000; -+ end_pos_tmp = 0x8000; -+ break; -+ case ODM_RTL8723F: -+ buff_size_base = 0x20000; -+ end_pos_tmp = 0x60000; -+ break; -+ default: -+ pr_debug("[%s] Warning!", __func__); -+ break; -+ } -+ -+ buf->buffer_size = buff_size_base; -+ -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ if (mode == ADCSMP_BUFF_HALF) { -+ odm_set_mac_reg(dm, R_0x7cc, BIT(21), 0); -+ } else { -+ buf->buffer_size = buf->buffer_size << 1; -+ odm_set_mac_reg(dm, R_0x7cc, BIT(21), 1); -+ } -+ } else if (dm->support_ic_type & FULL_BUFF_MODE_SUPPORT) { -+ if (mode == ADCSMP_BUFF_HALF) { -+ odm_set_mac_reg(dm, R_0x7cc, BIT(30), 0); -+ } else { -+ buf->buffer_size = buf->buffer_size << 1; -+ odm_set_mac_reg(dm, R_0x7cc, BIT(30), 1); -+ } -+ } -+ -+ buf->end_pos = end_pos_tmp; -+ buf->start_pos = end_pos_tmp - buf->buffer_size; -+ smp->smp_number_max = buf->buffer_size >> 3; -+ -+ pr_debug("start_addr=(0x%x), end_addr=(0x%x), buffer_size=(0x%x), smp_number_max=(%d)\n", -+ buf->start_pos, buf->end_pos, buf->buffer_size, -+ smp->smp_number_max); -+} -+ -+void phydm_la_adc_smp_start(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ u8 tmp_u1b = 0; -+ u8 i = 0; -+ u8 polling_bit = 0; -+ u8 bkp_val = 0; -+ boolean polling_ok = false; -+ boolean impossible_trig_condi = (smp->en_fake_trig) ? true : false; -+ -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, -+ ("1. [BB Setting] Mode=(%d), DbgPort=(0x%x), Edge=(%d), SmpRate=(%d), Trig_Sel=(0x%x), Dma_type=(%d)\n", -+ smp->la_trig_mode, smp->la_dbg_port, smp->la_trigger_edge, -+ smp->la_smp_rate, smp->la_trig_sig_sel, smp->la_dma_type)); -+ #endif -+ pr_debug("1. [BB Setting] trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x)), Dma_type = ((%d))\n", -+ smp->la_trig_mode, smp->la_dbg_port, smp->la_trigger_edge, -+ smp->la_smp_rate, smp->la_trig_sig_sel, smp->la_dma_type); -+ -+ if(dm->support_ic_type & ODM_RTL8723F) -+ bkp_val = (u8)odm_get_mac_reg(dm, R_0x1008, BIT(1)); -+ -+ phydm_la_set_mac_trigger_time(dm, smp->la_trigger_time); -+ phydm_la_set_bb(dm); -+ phydm_la_set_bb_dbg_port(dm, impossible_trig_condi); -+ phydm_la_set_mac_iq_dump(dm, impossible_trig_condi); -+ -+ #if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ watchdog_stop(dm->priv); -+ #endif -+ -+ if (impossible_trig_condi) { -+ ODM_delay_ms(100); -+ phydm_la_set_bb_dbg_port(dm, false); -+ -+ if (smp->la_trig_mode == PHYDM_ADC_MAC_TRIG) { -+ phydm_la_set_trig_src(dm, PHYDM_ADC_MAC_TRIG); -+ } -+ } -+#if RTL8198F_SUPPORT -+ phydm_la_pre_run(dm); -+#endif -+ polling_bit = (smp->la_dump_mode == LA_BB_ADC_DUMP) ? BIT(1) : BIT(2); -+ do { /*Polling time always use 100ms, when it exceed 2s, break loop*/ -+ if (dm->support_ic_type & ODM_RTL8192F) -+ tmp_u1b = odm_read_1byte(dm, R_0x7f0); -+ else -+ tmp_u1b = odm_read_1byte(dm, R_0x7c0); -+ -+ pr_debug("[%d] polling rpt=((0x%x))\n", i, tmp_u1b); -+ -+ if (smp->adc_smp_state != ADCSMP_STATE_SET) { -+ pr_debug("[state Error] state != ADCSMP_STATE_SET\n"); -+ break; -+ -+ } else if (tmp_u1b & polling_bit) { -+ ODM_delay_ms(100); -+ i++; -+ continue; -+ } else { -+ pr_debug("[LA Query OK] polling_bit=%d\n", polling_bit); -+ polling_ok = true; -+ break; -+ } -+ } while (i < 20); -+ -+ if (smp->adc_smp_state == ADCSMP_STATE_SET) { -+ if (polling_ok) -+ phydm_la_get_tx_pkt_buf(dm); -+ else -+ pr_debug("[Polling timeout]\n"); -+ } -+ -+ #if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ watchdog_resume(dm->priv); -+ #endif -+ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ if (smp->adc_smp_state == ADCSMP_STATE_SET) -+ smp->adc_smp_state = ADCSMP_STATE_QUERY; -+ #endif -+ -+ pr_debug("[LA mode] la_count = ((%d))\n", smp->la_count); -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, -+ ("[LA mode] la_count = ((%d))\n", smp->la_count)); -+ #endif -+ -+ phydm_la_stop(dm); -+ -+ if (smp->la_count == 0) { -+ pr_debug("LA Dump finished ---------->\n\n\n"); -+ phydm_release_bb_dbg_port(dm); -+ -+ #if (RTL8821C_SUPPORT || RTL8195B_SUPPORT) -+ phydm_la_clk_en(dm, false); -+ #endif -+ #if (RTL8723F_SUPPORT) -+ if(dm->support_ic_type & ODM_RTL8723F) -+ phydm_la_mac_clk_en(dm, (bkp_val == 1) ? true : false); -+ #endif -+ } else { -+ smp->la_count--; -+ pr_debug("LA Dump more ---------->\n\n\n"); -+ phydm_la_set(dm); -+ } -+} -+ -+void phydm_la_set(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean is_set_success = true; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ -+ if (smp->adc_smp_state != ADCSMP_STATE_IDLE) -+ is_set_success = false; -+ else if (smp->adc_smp_buf.length == 0) -+ is_set_success = phydm_la_buffer_allocate(dm); -+ -+ if (!is_set_success) { -+ pr_debug("[LA Set Fail] LA_State=(%d)\n", smp->adc_smp_state); -+ return; -+ } -+ -+ smp->adc_smp_state = ADCSMP_STATE_SET; -+ -+ pr_debug("[LA Set Success] LA_State=(%d)\n", smp->adc_smp_state); -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ pr_debug("ADCSmp_work_item_index=(%d)\n", smp->la_work_item_index); -+ -+ if (smp->la_work_item_index != 0) { -+ odm_schedule_work_item(&smp->adc_smp_work_item_1); -+ smp->la_work_item_index = 0; -+ } else { -+ odm_schedule_work_item(&smp->adc_smp_work_item); -+ smp->la_work_item_index = 1; -+ } -+#else -+ phydm_la_adc_smp_start(dm); -+#endif -+} -+ -+void phydm_la_cmd(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_LA_MODE)) -+ return; -+ -+#ifdef PHYDM_COMPILE_LA_STORE_IN_IMEM -+ if (dm->support_ic_type & PHYDM_LA_STORE_IN_IMEM_IC) { -+ if (dm->is_download_fw) -+ return; -+ } -+ #if RTL8198F_SUPPORT -+ if (dm->support_ic_type & ODM_RTL8198F) { -+ if (!*dm->mp_mode && !dm->priv->pmib->miscEntry.normal_LA_on) { -+ pr_debug("plz re-set normal_LA_on = 1 & DnUp.\n"); -+ return; -+ } -+ } -+ #endif -+#endif -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ /*@dbg_print("echo cmd input_num = %d\n", input_num);*/ -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "=====[LA Mode Help] =============================\n"); -+ /*Trigger*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "BB_trig: 1 0 {DbgPort Bit} {DMA#} {TrigTime} {DbgPort_head(Jgr2)}\n\t{DbgPort} {Edge: 0(P),1(N)} {f_smp:80 >> N} {Capture num}\n\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "MAC_trig: 1 1 {0-ok/1-fail/2-cca} {DMA#} {TrigTime} {DbgPort_head(Jgr2)}\n\t{DbgPort} {N/A} {f_smp:80 >> N} {Cpture num}\n\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "All: {En} {0:ADC_BB_trig,1:ADC MAC_trig,2:RF0,3:RF1,4:MAC}\n\t{BB:dbg_port[bit],BB_MAC:0-ok/1-fail/2-cca,MAC:ref} {DMA#} {TrigTime}\n\t{DbgPort_head/ref_mask} {dbg_port} {0:P_Edge, 1:N_Edge} {SpRate:0-80M,1-40M,2-20M} {Capture num}\n\n"); -+ /*Adv-Trig*/ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "adv show\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "adv {adv_trig_en} {0:And[0]_disable} {en}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "adv {adv_trig_en} {1~3: And[3:0]} {Sel} {Val} {Inv}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "adv {adv_trig_en} {4: And[4]} {BitMask} {BitVal} {Inv}\n\n"); -+ #endif -+ /*Setting*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "set {1:tx_buff_size} {0: half, 1:full}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "set {2:Fake Trigger} {en}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "set {3:Auto Print} {en}\n\n"); -+ /*Print*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "print {0: all(Hex)}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "print {1: partial} {0:hex 1:dec 2: s-dec} {bit_L} {bit_H}\n\n"); -+ -+ /*Fast Trigger*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fast {0: CCA trig & AGC Dbg Port}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fast {1: CCA trig & EVM Dbg Port}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fast {2: CCA trig & SNR Dbg Port}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fast {3: CCA trig & CFO Dbg Port}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fast {4: CCA trig & ADC output Dbg Port}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fast {10: EVM>=-X dB, 11: EVM<=-X dB} {X=2/4/8/16/32/64} {0:Lgcy, 1:HT}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fast {12: EVM=-X dB} {X} {0:Lgcy, 1:HT}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fast {20: RX-rate-idx=X} {X}\n"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "=================================================\n"); -+ } else if ((strcmp(input[1], "print") == 0)) { -+ phydm_la_buffer_print(dm, input, &used, output, &out_len); -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if ((strcmp(input[1], "fast") == 0)) { -+ phydm_la_cmd_fast_jgr3(dm, input, &used, output, &out_len); -+ -+ } else if ((strcmp(input[1], "adv") == 0)) { -+ phydm_la_bb_adv_cmd_jgr3(dm, input, &used, output, &out_len); -+#endif -+ } else if ((strcmp(input[1], "set") == 0)) { -+ PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]); -+ -+ if (var1[1] == 1) { -+ PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); -+ phydm_la_set_buff_mode(dm, (enum la_buff_mode)var1[2]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Buff_mode=(%d/2)\n", smp->la_buff_mode + 1); -+ } else if (var1[1] == 2) { -+ PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); -+ smp->en_fake_trig = (boolean)var1[2]; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "en_fake_trig=(%d)\n", smp->en_fake_trig); -+ } else if (var1[1] == 3) { -+ PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); -+ smp->is_la_print = (boolean)var1[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Auto print=(%d)\n", smp->is_la_print); -+ } -+ } else if (var1[0] == 1) { -+ PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]); -+ -+ smp->la_trig_mode = (u8)var1[1]; -+ -+ if (smp->la_trig_mode == PHYDM_MAC_TRIG) -+ PHYDM_SSCANF(input[3], DCMD_HEX, &var1[2]); -+ else -+ PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); -+ smp->la_trig_sig_sel = var1[2]; -+ -+ PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[3]); -+ PHYDM_SSCANF(input[5], DCMD_DECIMAL, &var1[4]); -+ PHYDM_SSCANF(input[6], DCMD_HEX, &var1[5]); -+ PHYDM_SSCANF(input[7], DCMD_HEX, &var1[6]); -+ PHYDM_SSCANF(input[8], DCMD_DECIMAL, &var1[7]); -+ PHYDM_SSCANF(input[9], DCMD_DECIMAL, &var1[8]); -+ PHYDM_SSCANF(input[10], DCMD_DECIMAL, &var1[9]); -+ -+ smp->la_dma_type = (u8)var1[3]; -+ smp->la_trigger_time = var1[4]; /*unit: us*/ -+ smp->la_mac_mask_or_hdr_sel = var1[5]; -+ smp->la_dbg_port = var1[6]; -+ smp->la_trigger_edge = (u8)var1[7]; -+ smp->la_smp_rate = (u8)(var1[8] & 0x7); -+ smp->la_count = var1[9]; -+ -+ pr_debug("echo lamode %d %d %d %d %d %d %x %d %d %d\n", -+ var1[0], var1[1], var1[2], var1[3], var1[4], -+ var1[5], var1[6], var1[7], var1[8], var1[9]); -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, -+ ("echo lamode %d %d %d %d %d %d %x %d %d %d\n", -+ var1[0], var1[1], var1[2], var1[3], -+ var1[4], var1[5], var1[6], var1[7], -+ var1[8], var1[9])); -+ #endif -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "a.En= ((1)), b.mode = ((%d)), c.Trig_Sel = ((0x%x)), d.Dma_type = ((%d))\n", -+ smp->la_trig_mode, smp->la_trig_sig_sel, -+ smp->la_dma_type); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "e.Trig_Time = ((%dus)), f.Dbg_head/mac_ref_mask = ((0x%x)), g.dbg_port = ((0x%x))\n", -+ smp->la_trigger_time, -+ smp->la_mac_mask_or_hdr_sel, smp->la_dbg_port); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "h.Trig_edge = ((%d)), i.smp rate = ((%d MHz)), j.Cap_num = ((%d))\n", -+ smp->la_trigger_edge, (80 >> smp->la_smp_rate), -+ smp->la_count); -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "k.en_new_bbtrigger = ((%d))\n", -+ smp->adv_trig_table.la_adv_bbtrigger_en); -+ #endif -+ -+ phydm_la_set(dm); -+ } else { -+ phydm_la_stop(dm); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Disable LA mode\n"); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_la_stop(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ -+ smp->adc_smp_state = ADCSMP_STATE_IDLE; -+} -+ -+void phydm_la_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ struct rt_adcsmp_string *buf = &smp->adc_smp_buf; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_LA_MODE)) -+ return; -+ -+ smp->adc_smp_state = ADCSMP_STATE_IDLE; -+ smp->is_la_print = true; -+ smp->en_fake_trig = false; -+ smp->txff_page = 0xffffffff; -+ phydm_la_set_buff_mode(dm, ADCSMP_BUFF_HALF); -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ phydm_la_bb_adv_reset_jgr3(dm); -+ #endif -+} -+ -+void adc_smp_de_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_LA_MODE)) -+ return; -+ -+ phydm_la_stop(dm); -+ phydm_la_buffer_release(dm); -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+void adc_smp_work_item_callback(void *context) -+{ -+ void *adapter = (void *)context; -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ struct rt_adcsmp *smp = &dm->adcsmp; -+ -+ pr_debug("[WorkItem Call back] LA_State=(%d)\n", smp->adc_smp_state); -+ phydm_la_adc_smp_start(dm); -+} -+#endif -+#endif /*@endif PHYDM_LA_MODE_SUPPORT*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_adc_sampling.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_adc_sampling.h -new file mode 100644 -index 000000000000..0e00e2719664 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_adc_sampling.h -@@ -0,0 +1,172 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __INC_ADCSMP_H -+#define __INC_ADCSMP_H -+ -+#if (PHYDM_LA_MODE_SUPPORT) -+ -+/* 2020.07.03 [8723F] Fix SD4 compile error*/ -+#define DYNAMIC_LA_MODE "4.2" -+ -+/* @1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+#if (RTL8197F_SUPPORT || RTL8198F_SUPPORT || RTL8197G_SUPPORT) -+ #define PHYDM_COMPILE_LA_STORE_IN_IMEM -+#endif -+#endif -+ -+#define PHYDM_LA_STORE_IN_IMEM_IC (ODM_RTL8197F | ODM_RTL8198F | ODM_RTL8197G) -+ -+#define FULL_BUFF_MODE_SUPPORT (ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8822C |\ -+ ODM_RTL8812F | ODM_RTL8814B) -+ -+/* @ ============================================================ -+ * enumrate -+ * ============================================================ -+ */ -+enum la_dump_mode { -+ LA_BB_ADC_DUMP = 0, -+ LA_MAC_DBG_DUMP = 1 -+}; -+ -+enum rt_adcsmp_trig_sel { -+ PHYDM_ADC_BB_TRIG = 0, -+ PHYDM_ADC_MAC_TRIG = 1, -+ PHYDM_ADC_RF0_TRIG = 2, -+ PHYDM_ADC_RF1_TRIG = 3, -+ PHYDM_MAC_TRIG = 4 -+}; -+ -+enum rt_adcsmp_trig_sig_sel { -+ ADCSMP_TRIG_CRCOK = 0, -+ ADCSMP_TRIG_CRCFAIL = 1, -+ ADCSMP_TRIG_CCA = 2, -+ ADCSMP_TRIG_REG = 3 -+}; -+ -+enum rt_adcsmp_state { -+ ADCSMP_STATE_IDLE = 0, -+ ADCSMP_STATE_SET = 1, -+ ADCSMP_STATE_QUERY = 2 -+}; -+ -+enum la_buff_mode { -+ ADCSMP_BUFF_HALF = 0, -+ ADCSMP_BUFF_ALL = 1 /*Only use in MP Driver*/ -+}; -+ -+/* @ ============================================================ -+ * structure -+ * ============================================================ -+ */ -+ -+struct rt_adcsmp_string { -+ u32 *octet; -+ u32 length; -+ u32 buffer_size; -+ u32 start_pos; -+ u32 end_pos; /*@buf addr*/ -+}; -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+struct la_adv_trig { -+ boolean la_adv_bbtrigger_en; -+ boolean la_ori_bb_dis; -+ u8 la_and1_sel; -+ u8 la_and1_val; -+ boolean la_and1_inv; -+ u8 la_and2_sel; -+ u8 la_and2_val; -+ boolean la_and2_inv; -+ u8 la_and3_sel; -+ u8 la_and3_val; -+ boolean la_and3_inv; -+ u32 la_and4_mask; -+ u32 la_and4_bitmap; -+ boolean la_and4_inv; -+}; -+#endif -+ -+struct rt_adcsmp { -+ struct rt_adcsmp_string adc_smp_buf; -+ enum rt_adcsmp_state adc_smp_state; -+ enum la_buff_mode la_buff_mode; -+ enum la_dump_mode la_dump_mode; -+ u8 la_trig_mode; -+ u32 la_trig_sig_sel; -+ u8 la_dma_type; -+ u32 la_trigger_time; -+ /*@1.BB mode: Dbg port header sel, 2.MAC mode: for reference mask*/ -+ u32 la_mac_mask_or_hdr_sel; -+ u32 la_dbg_port; -+ u8 la_trigger_edge; -+ u8 la_smp_rate; -+ u32 la_count; -+ u32 smp_number; -+ u32 smp_number_max; -+ u32 txff_page; -+ boolean is_la_print; -+ boolean en_fake_trig; -+#if (RTL8197F_SUPPORT) -+ u32 backup_dma; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ u8 la_work_item_index; -+ RT_WORK_ITEM adc_smp_work_item; -+ RT_WORK_ITEM adc_smp_work_item_1; -+#endif -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ struct la_adv_trig adv_trig_table; -+#endif -+}; -+ -+/* @ ============================================================ -+ * Function Prototype -+ * ============================================================ -+ */ -+ -+void phydm_la_set(void *dm_void); -+ -+void phydm_la_cmd(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len); -+ -+void phydm_la_stop(void *dm_void); -+ -+void phydm_la_init(void *dm_void); -+ -+void adc_smp_de_init(void *dm_void); -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+void adc_smp_work_item_callback(void *context); -+#endif -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_antdect.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_antdect.c -new file mode 100644 -index 000000000000..a3213896ccdb ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_antdect.c -@@ -0,0 +1,888 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/* ************************************************************ -+ * include files -+ * ************************************************************ */ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef CONFIG_ANT_DETECTION -+ -+/* @IS_ANT_DETECT_SUPPORT_SINGLE_TONE(adapter) -+ * IS_ANT_DETECT_SUPPORT_RSSI(adapter) -+ * IS_ANT_DETECT_SUPPORT_PSD(adapter) */ -+ -+/* @1 [1. Single Tone method] =================================================== */ -+ -+/*@ -+ * Description: -+ * Set Single/Dual Antenna default setting for products that do not do detection in advance. -+ * -+ * Added by Joseph, 2012.03.22 -+ * */ -+void odm_sw_ant_div_construct_scan_chnl( -+ void *adapter, -+ u8 scan_chnl) -+{ -+} -+ -+u8 odm_sw_ant_div_select_scan_chnl( -+ void *adapter) -+{ -+ return 0; -+} -+ -+void odm_single_dual_antenna_default_setting( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; -+ void *adapter = dm->adapter; -+ -+ u8 bt_ant_num = BT_GetPgAntNum(adapter); -+ /* Set default antenna A and B status */ -+ if (bt_ant_num == 2) { -+ dm_swat_table->ANTA_ON = true; -+ dm_swat_table->ANTB_ON = true; -+ -+ } else if (bt_ant_num == 1) { -+ /* Set antenna A as default */ -+ dm_swat_table->ANTA_ON = true; -+ dm_swat_table->ANTB_ON = false; -+ -+ } else -+ RT_ASSERT(false, ("Incorrect antenna number!!\n")); -+} -+ -+/* @2 8723A ANT DETECT -+ * -+ * Description: -+ * Implement IQK single tone for RF DPK loopback and BB PSD scanning. -+ * This function is cooperated with BB team Neil. -+ * -+ * Added by Roger, 2011.12.15 -+ * */ -+boolean -+odm_single_dual_antenna_detection( -+ void *dm_void, -+ u8 mode) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; -+ u32 current_channel, rf_loop_reg; -+ u8 n; -+ u32 reg88c, regc08, reg874, regc50, reg948, regb2c, reg92c, reg930, reg064, afe_rrx_wait_cca; -+ u8 initial_gain = 0x5a; -+ u32 PSD_report_tmp; -+ u32 ant_a_report = 0x0, ant_b_report = 0x0, ant_0_report = 0x0; -+ boolean is_result = true; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s============>\n", __func__); -+ -+ if (!(dm->support_ic_type & ODM_RTL8723B)) -+ return is_result; -+ -+ /* Retrieve antenna detection registry info, added by Roger, 2012.11.27. */ -+ if (!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(((PADAPTER)adapter))) -+ return is_result; -+ -+ /* @1 Backup Current RF/BB Settings */ -+ -+ current_channel = odm_get_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK); -+ rf_loop_reg = odm_get_rf_reg(dm, RF_PATH_A, RF_0x00, RFREGOFFSETMASK); -+ if (dm->support_ic_type & ODM_RTL8723B) { -+ reg92c = odm_get_bb_reg(dm, REG_DPDT_CONTROL, MASKDWORD); -+ reg930 = odm_get_bb_reg(dm, rfe_ctrl_anta_src, MASKDWORD); -+ reg948 = odm_get_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD); -+ regb2c = odm_get_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD); -+ reg064 = odm_get_mac_reg(dm, REG_SYM_WLBT_PAPE_SEL, BIT(29)); -+ odm_set_bb_reg(dm, REG_DPDT_CONTROL, 0x3, 0x1); -+ odm_set_bb_reg(dm, rfe_ctrl_anta_src, 0xff, 0x77); -+ odm_set_mac_reg(dm, REG_SYM_WLBT_PAPE_SEL, BIT(29), 0x1); /* @dbg 7 */ -+ odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0x3c0, 0x0); /* @dbg 8 */ -+ odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, BIT(31), 0x0); -+ } -+ -+ ODM_delay_us(10); -+ -+ /* Store A path Register 88c, c08, 874, c50 */ -+ reg88c = odm_get_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD); -+ regc08 = odm_get_bb_reg(dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD); -+ reg874 = odm_get_bb_reg(dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD); -+ regc50 = odm_get_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD); -+ -+ /* Store AFE Registers */ -+ if (dm->support_ic_type & ODM_RTL8723B) -+ afe_rrx_wait_cca = odm_get_bb_reg(dm, REG_RX_WAIT_CCA, MASKDWORD); -+ -+ /* Set PSD 128 pts */ -+ odm_set_bb_reg(dm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* @128 pts */ -+ -+ /* To SET CH1 to do */ -+ odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK, 0x7401); /* @channel 1 */ -+ -+ /* @AFE all on step */ -+ if (dm->support_ic_type & ODM_RTL8723B) -+ odm_set_bb_reg(dm, REG_RX_WAIT_CCA, MASKDWORD, 0x01c00016); -+ -+ /* @3 wire Disable */ -+ odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD, 0xCCF000C0); -+ -+ /* @BB IQK setting */ -+ odm_set_bb_reg(dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, 0x000800E4); -+ odm_set_bb_reg(dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, 0x22208000); -+ -+ /* @IQK setting tone@ 4.34Mhz */ -+ odm_set_bb_reg(dm, REG_TX_IQK_TONE_A, MASKDWORD, 0x10008C1C); -+ odm_set_bb_reg(dm, REG_TX_IQK, MASKDWORD, 0x01007c00); -+ -+ /* Page B init */ -+ odm_set_bb_reg(dm, REG_CONFIG_ANT_A, MASKDWORD, 0x00080000); -+ odm_set_bb_reg(dm, REG_CONFIG_ANT_A, MASKDWORD, 0x0f600000); -+ odm_set_bb_reg(dm, REG_RX_IQK, MASKDWORD, 0x01004800); -+ odm_set_bb_reg(dm, REG_RX_IQK_TONE_A, MASKDWORD, 0x10008c1f); -+ if (dm->support_ic_type & ODM_RTL8723B) { -+ odm_set_bb_reg(dm, REG_TX_IQK_PI_A, MASKDWORD, 0x82150016); -+ odm_set_bb_reg(dm, REG_RX_IQK_PI_A, MASKDWORD, 0x28150016); -+ } -+ odm_set_bb_reg(dm, REG_IQK_AGC_RSP, MASKDWORD, 0x001028d0); -+ odm_set_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, 0x7f, initial_gain); -+ -+ /* @IQK Single tone start */ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x808000); -+ odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000); -+ odm_set_bb_reg(dm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000); -+ -+ ODM_delay_us(10000); -+ -+ /* PSD report of antenna A */ -+ PSD_report_tmp = 0x0; -+ for (n = 0; n < 2; n++) { -+ PSD_report_tmp = phydm_get_psd_data(dm, 14, initial_gain); -+ if (PSD_report_tmp > ant_a_report) -+ ant_a_report = PSD_report_tmp; -+ } -+ -+ /* @change to Antenna B */ -+ if (dm->support_ic_type & ODM_RTL8723B) { -+ odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0xfff, 0x280); -+ odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, BIT(31), 0x1); -+ } -+ -+ ODM_delay_us(10); -+ -+ /* PSD report of antenna B */ -+ PSD_report_tmp = 0x0; -+ for (n = 0; n < 2; n++) { -+ PSD_report_tmp = phydm_get_psd_data(dm, 14, initial_gain); -+ if (PSD_report_tmp > ant_b_report) -+ ant_b_report = PSD_report_tmp; -+ } -+ -+ /* @Close IQK Single Tone function */ -+ odm_set_bb_reg(dm, REG_FPGA0_IQK, 0xffffff00, 0x000000); -+ -+ /* @1 Return to antanna A */ -+ if (dm->support_ic_type & ODM_RTL8723B) { -+ /* @external DPDT */ -+ odm_set_bb_reg(dm, REG_DPDT_CONTROL, MASKDWORD, reg92c); -+ -+ /* @internal S0/S1 */ -+ odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD, reg948); -+ odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD, regb2c); -+ odm_set_bb_reg(dm, rfe_ctrl_anta_src, MASKDWORD, reg930); -+ odm_set_mac_reg(dm, REG_SYM_WLBT_PAPE_SEL, BIT(29), reg064); -+ } -+ -+ odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD, reg88c); -+ odm_set_bb_reg(dm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, regc08); -+ odm_set_bb_reg(dm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, reg874); -+ odm_set_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, 0x7F, 0x40); -+ odm_set_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD, regc50); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, current_channel); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x00, RFREGOFFSETMASK, rf_loop_reg); -+ -+ /* Reload AFE Registers */ -+ if (dm->support_ic_type & ODM_RTL8723B) -+ odm_set_bb_reg(dm, REG_RX_WAIT_CCA, MASKDWORD, afe_rrx_wait_cca); -+ -+ if (dm->support_ic_type & ODM_RTL8723B) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "psd_report_A[%d]= %d\n", 2416, -+ ant_a_report); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "psd_report_B[%d]= %d\n", 2416, -+ ant_b_report); -+ -+ /* @2 Test ant B based on ant A is ON */ -+ if (ant_a_report >= 100 && ant_b_report >= 100 && ant_a_report <= 135 && ant_b_report <= 135) { -+ u8 TH1 = 2, TH2 = 6; -+ -+ if ((ant_a_report - ant_b_report < TH1) || (ant_b_report - ant_a_report < TH1)) { -+ dm_swat_table->ANTA_ON = true; -+ dm_swat_table->ANTB_ON = true; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Dual Antenna\n", -+ __func__); -+ } else if (((ant_a_report - ant_b_report >= TH1) && (ant_a_report - ant_b_report <= TH2)) || -+ ((ant_b_report - ant_a_report >= TH1) && (ant_b_report - ant_a_report <= TH2))) { -+ dm_swat_table->ANTA_ON = false; -+ dm_swat_table->ANTB_ON = false; -+ is_result = false; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "%s: Need to check again\n", -+ __func__); -+ } else { -+ dm_swat_table->ANTA_ON = true; -+ dm_swat_table->ANTB_ON = false; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "%s: Single Antenna\n", __func__); -+ } -+ dm->ant_detected_info.is_ant_detected = true; -+ dm->ant_detected_info.db_for_ant_a = ant_a_report; -+ dm->ant_detected_info.db_for_ant_b = ant_b_report; -+ dm->ant_detected_info.db_for_ant_o = ant_0_report; -+ -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "return false!!\n"); -+ is_result = false; -+ } -+ } -+ return is_result; -+} -+ -+/* @1 [2. Scan AP RSSI method] ================================================== */ -+ -+boolean -+odm_sw_ant_div_check_before_link( -+ void *dm_void) -+{ -+#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) -+ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ //PMGNT_INFO mgnt_info = &adapter->MgntInfo; -+ PMGNT_INFO mgnt_info = &(((PADAPTER)(adapter))->MgntInfo); -+ struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ s8 score = 0; -+ PRT_WLAN_BSS p_tmp_bss_desc, p_test_bss_desc; -+ u8 power_target_L = 9, power_target_H = 16; -+ u8 tmp_power_diff = 0, power_diff = 0, avg_power_diff = 0, max_power_diff = 0, min_power_diff = 0xff; -+ u16 index, counter = 0; -+ static u8 scan_channel; -+ u32 tmp_swas_no_link_bk_reg948; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "ANTA_ON = (( %d )) , ANTB_ON = (( %d ))\n", -+ dm->dm_swat_table.ANTA_ON, dm->dm_swat_table.ANTB_ON); -+ -+ /* @if(HP id) */ -+ { -+ if (dm->dm_swat_table.rssi_ant_dect_result == true && dm->support_ic_type == ODM_RTL8723B) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "8723B RSSI-based Antenna Detection is done\n"); -+ return false; -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8723B) { -+ if (dm_swat_table->swas_no_link_bk_reg948 == 0xff) -+ dm_swat_table->swas_no_link_bk_reg948 = odm_read_4byte(dm, REG_S0_S1_PATH_SWITCH); -+ } -+ } -+ -+ if (dm->adapter == NULL) { /* @For BSOD when plug/unplug fast. //By YJ,120413 */ -+ /* The ODM structure is not initialized. */ -+ return false; -+ } -+ -+ /* Retrieve antenna detection registry info, added by Roger, 2012.11.27. */ -+ if (!IS_ANT_DETECT_SUPPORT_RSSI(((PADAPTER)adapter))) -+ return false; -+ else -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Antenna Detection: RSSI method\n"); -+ -+ /* Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. */ -+ odm_acquire_spin_lock(dm, RT_RF_STATE_SPINLOCK); -+ if (hal_data->eRFPowerState != eRfOn || mgnt_info->RFChangeInProgress || mgnt_info->bMediaConnect) { -+ odm_release_spin_lock(dm, RT_RF_STATE_SPINLOCK); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "%s: rf_change_in_progress(%x), e_rf_power_state(%x)\n", -+ __func__, mgnt_info->RFChangeInProgress, -+ hal_data->eRFPowerState); -+ -+ dm_swat_table->swas_no_link_state = 0; -+ -+ return false; -+ } else -+ odm_release_spin_lock(dm, RT_RF_STATE_SPINLOCK); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "dm_swat_table->swas_no_link_state = %d\n", -+ dm_swat_table->swas_no_link_state); -+ /* @1 Run AntDiv mechanism "Before Link" part. */ -+ if (dm_swat_table->swas_no_link_state == 0) { -+ /* @1 Prepare to do Scan again to check current antenna state. */ -+ -+ /* Set check state to next step. */ -+ dm_swat_table->swas_no_link_state = 1; -+ -+ /* @Copy Current Scan list. */ -+ mgnt_info->tmpNumBssDesc = mgnt_info->NumBssDesc; -+ PlatformMoveMemory((void *)mgnt_info->tmpbssDesc, (void *)mgnt_info->bssDesc, sizeof(RT_WLAN_BSS) * MAX_BSS_DESC); -+ -+ /* @Go back to scan function again. */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Scan one more time\n", -+ __func__); -+ mgnt_info->ScanStep = 0; -+ mgnt_info->bScanAntDetect = true; -+ scan_channel = odm_sw_ant_div_select_scan_chnl(adapter); -+ -+ if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) { -+ if (fat_tab->rx_idle_ant == MAIN_ANT) -+ odm_update_rx_idle_ant(dm, AUX_ANT); -+ else -+ odm_update_rx_idle_ant(dm, MAIN_ANT); -+ if (scan_channel == 0) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "%s: No AP List Avaiable, Using ant(%s)\n", -+ __func__, -+ (fat_tab->rx_idle_ant == MAIN_ANT) ? -+ "AUX_ANT" : "MAIN_ANT"); -+ -+ if (IS_5G_WIRELESS_MODE(mgnt_info->dot11CurrentWirelessMode)) { -+ dm_swat_table->ant_5g = fat_tab->rx_idle_ant; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "dm_swat_table->ant_5g=%s\n", (fat_tab->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ } else { -+ dm_swat_table->ant_2g = fat_tab->rx_idle_ant; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "dm_swat_table->ant_2g=%s\n", (fat_tab->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ } -+ return false; -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "%s: Change to %s for testing.\n", __func__, -+ ((fat_tab->rx_idle_ant == MAIN_ANT) ? -+ "MAIN_ANT" : "AUX_ANT")); -+ } else if (dm->support_ic_type & (ODM_RTL8723B)) { -+ /*Switch Antenna to another one.*/ -+ -+ tmp_swas_no_link_bk_reg948 = odm_read_4byte(dm, REG_S0_S1_PATH_SWITCH); -+ -+ if (dm_swat_table->cur_antenna == MAIN_ANT && tmp_swas_no_link_bk_reg948 == 0x200) { -+ odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0xfff, 0x280); -+ odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, BIT(31), 0x1); -+ dm_swat_table->cur_antenna = AUX_ANT; -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Reg[948]= (( %x )) was in wrong state\n", -+ tmp_swas_no_link_bk_reg948); -+ return false; -+ } -+ ODM_delay_us(10); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "%s: Change to (( %s-ant)) for testing.\n", -+ __func__, -+ (dm_swat_table->cur_antenna == MAIN_ANT) ? -+ "MAIN" : "AUX"); -+ } -+ -+ odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel); -+ PlatformSetTimer(adapter, &mgnt_info->ScanTimer, 5); -+ -+ return true; -+ } else { /* @dm_swat_table->swas_no_link_state == 1 */ -+ /* @1 ScanComple() is called after antenna swiched. */ -+ /* @1 Check scan result and determine which antenna is going */ -+ /* @1 to be used. */ -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, " tmp_num_bss_desc= (( %d ))\n", -+ mgnt_info->tmpNumBssDesc); /* @debug for Dino */ -+ -+ for (index = 0; index < mgnt_info->tmpNumBssDesc; index++) { -+ p_tmp_bss_desc = &mgnt_info->tmpbssDesc[index]; /* @Antenna 1 */ -+ p_test_bss_desc = &mgnt_info->bssDesc[index]; /* @Antenna 2 */ -+ -+ if (PlatformCompareMemory(p_test_bss_desc->bdBssIdBuf, p_tmp_bss_desc->bdBssIdBuf, 6) != 0) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "%s: ERROR!! This shall not happen.\n", -+ __func__); -+ continue; -+ } -+ -+ if (dm->support_ic_type != ODM_RTL8723B) { -+ if (p_tmp_bss_desc->ChannelNumber == scan_channel) { -+ if (p_tmp_bss_desc->RecvSignalPower > p_test_bss_desc->RecvSignalPower) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Compare scan entry: score++\n", __func__); -+ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower); -+ -+ score++; -+ PlatformMoveMemory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS)); -+ } else if (p_tmp_bss_desc->RecvSignalPower < p_test_bss_desc->RecvSignalPower) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Compare scan entry: score--\n", __func__); -+ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower); -+ score--; -+ } else { -+ if (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp < 5000) { -+ RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "at ch %d, Original: %d, Test: %d\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "The 2nd Antenna didn't get this AP\n\n"); -+ } -+ } -+ } -+ } else { /* @8723B */ -+ if (p_tmp_bss_desc->ChannelNumber == scan_channel) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "channel_number == scan_channel->(( %d ))\n", p_tmp_bss_desc->ChannelNumber); -+ -+ if (p_tmp_bss_desc->RecvSignalPower > p_test_bss_desc->RecvSignalPower) { /* Pow(Ant1) > Pow(Ant2) */ -+ counter++; -+ tmp_power_diff = (u8)(p_tmp_bss_desc->RecvSignalPower - p_test_bss_desc->RecvSignalPower); -+ power_diff = power_diff + tmp_power_diff; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower); -+ PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "SSID:", p_tmp_bss_desc->bdSsIdBuf); -+ PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "BSSID:", p_tmp_bss_desc->bdSsIdBuf); -+ -+#if 0 -+ /* PHYDM_DBG(dm,DBG_ANT_DIV, "tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d))\n", tmp_power_diff,max_power_diff,min_power_diff); */ -+#endif -+ if (tmp_power_diff > max_power_diff) -+ max_power_diff = tmp_power_diff; -+ if (tmp_power_diff < min_power_diff) -+ min_power_diff = tmp_power_diff; -+#if 0 -+ /* PHYDM_DBG(dm,DBG_ANT_DIV, "max_power_diff: (( %d)),min_power_diff: (( %d))\n",max_power_diff,min_power_diff); */ -+#endif -+ -+ PlatformMoveMemory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS)); -+ } else if (p_test_bss_desc->RecvSignalPower > p_tmp_bss_desc->RecvSignalPower) { /* Pow(Ant1) < Pow(Ant2) */ -+ counter++; -+ tmp_power_diff = (u8)(p_test_bss_desc->RecvSignalPower - p_tmp_bss_desc->RecvSignalPower); -+ power_diff = power_diff + tmp_power_diff; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower); -+ PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "SSID:", p_tmp_bss_desc->bdSsIdBuf); -+ PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "BSSID:", p_tmp_bss_desc->bdSsIdBuf); -+ if (tmp_power_diff > max_power_diff) -+ max_power_diff = tmp_power_diff; -+ if (tmp_power_diff < min_power_diff) -+ min_power_diff = tmp_power_diff; -+ } else { /* Pow(Ant1) = Pow(Ant2) */ -+ if (p_test_bss_desc->bdTstamp > p_tmp_bss_desc->bdTstamp) { /* Stamp(Ant1) < Stamp(Ant2) */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "time_diff: %lld\n", (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp) / 1000); -+ if (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp > 5000) { -+ counter++; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower); -+ PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "SSID:", p_tmp_bss_desc->bdSsIdBuf); -+ PHYDM_PRINT_ADDR(dm, DBG_ANT_DIV, "BSSID:", p_tmp_bss_desc->bdSsIdBuf); -+ min_power_diff = 0; -+ } -+ } else -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Error !!!]: Time_diff: %lld\n", (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp) / 1000); -+ } -+ } -+ } -+ } -+ -+ if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) { -+ if (mgnt_info->NumBssDesc != 0 && score < 0) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "%s: Using ant(%s)\n", __func__, -+ (fat_tab->rx_idle_ant == MAIN_ANT) ? -+ "MAIN_ANT" : "AUX_ANT"); -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "%s: Remain ant(%s)\n", __func__, -+ (fat_tab->rx_idle_ant == MAIN_ANT) ? -+ "AUX_ANT" : "MAIN_ANT"); -+ -+ if (fat_tab->rx_idle_ant == MAIN_ANT) -+ odm_update_rx_idle_ant(dm, AUX_ANT); -+ else -+ odm_update_rx_idle_ant(dm, MAIN_ANT); -+ } -+ -+ if (IS_5G_WIRELESS_MODE(mgnt_info->dot11CurrentWirelessMode)) { -+ dm_swat_table->ant_5g = fat_tab->rx_idle_ant; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "dm_swat_table->ant_5g=%s\n", -+ (fat_tab->rx_idle_ant == MAIN_ANT) ? -+ "MAIN_ANT" : "AUX_ANT"); -+ } else { -+ dm_swat_table->ant_2g = fat_tab->rx_idle_ant; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "dm_swat_table->ant_2g=%s\n", -+ (fat_tab->rx_idle_ant == MAIN_ANT) ? -+ "MAIN_ANT" : "AUX_ANT"); -+ } -+ } else if (dm->support_ic_type == ODM_RTL8723B) { -+ if (counter == 0) { -+ if (dm->dm_swat_table.pre_aux_fail_detec == false) { -+ dm->dm_swat_table.pre_aux_fail_detec = true; -+ dm->dm_swat_table.rssi_ant_dect_result = false; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "counter=(( 0 )) , [[ Cannot find any AP with Aux-ant ]] -> Scan Target-channel again\n"); -+ -+ /* @3 [ Scan again ] */ -+ odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel); -+ PlatformSetTimer(adapter, &mgnt_info->ScanTimer, 5); -+ return true; -+ } else { /* pre_aux_fail_detec == true */ -+ /* @2 [ Single Antenna ] */ -+ dm->dm_swat_table.pre_aux_fail_detec = false; -+ dm->dm_swat_table.rssi_ant_dect_result = true; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "counter=(( 0 )) , [[ Still cannot find any AP ]]\n"); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Single antenna\n", __func__); -+ } -+ dm->dm_swat_table.aux_fail_detec_counter++; -+ } else { -+ dm->dm_swat_table.pre_aux_fail_detec = false; -+ -+ if (counter == 3) { -+ avg_power_diff = ((power_diff - max_power_diff - min_power_diff) >> 1) + ((max_power_diff + min_power_diff) >> 2); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "counter: (( %d )) , power_diff: (( %d ))\n", counter, power_diff); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ counter==3 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d ))\n", avg_power_diff, max_power_diff, min_power_diff); -+ } else if (counter >= 4) { -+ avg_power_diff = (power_diff - max_power_diff - min_power_diff) / (counter - 2); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "counter: (( %d )) , power_diff: (( %d ))\n", counter, power_diff); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ counter>=4 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d ))\n", avg_power_diff, max_power_diff, min_power_diff); -+ -+ } else { /* @counter==1,2 */ -+ avg_power_diff = power_diff / counter; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "avg_power_diff: (( %d )) , counter: (( %d )) , power_diff: (( %d ))\n", avg_power_diff, counter, power_diff); -+ } -+ -+ /* @2 [ Retry ] */ -+ if (avg_power_diff >= power_target_L && avg_power_diff <= power_target_H) { -+ dm->dm_swat_table.retry_counter++; -+ -+ if (dm->dm_swat_table.retry_counter <= 3) { -+ dm->dm_swat_table.rssi_ant_dect_result = false; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[[ Low confidence result ]] avg_power_diff= (( %d )) -> Scan Target-channel again ]]\n", avg_power_diff); -+ -+ /* @3 [ Scan again ] */ -+ odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel); -+ PlatformSetTimer(adapter, &mgnt_info->ScanTimer, 5); -+ return true; -+ } else { -+ dm->dm_swat_table.rssi_ant_dect_result = true; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[[ Still Low confidence result ]] (( retry_counter > 3 ))\n"); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Single antenna\n", __func__); -+ } -+ } -+ /* @2 [ Dual Antenna ] */ -+ else if ((mgnt_info->NumBssDesc != 0) && (avg_power_diff < power_target_L)) { -+ dm->dm_swat_table.rssi_ant_dect_result = true; -+ if (dm->dm_swat_table.ANTB_ON == false) { -+ dm->dm_swat_table.ANTA_ON = true; -+ dm->dm_swat_table.ANTB_ON = true; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Dual antenna\n", __func__); -+ dm->dm_swat_table.dual_ant_counter++; -+ -+ /* set bt coexDM from 1ant coexDM to 2ant coexDM */ -+ BT_SetBtCoexAntNum(adapter, BT_COEX_ANT_TYPE_DETECTED, 2); -+ -+ /* @3 [ Init antenna diversity ] */ -+ dm->support_ability |= ODM_BB_ANT_DIV; -+ odm_ant_div_init(dm); -+ } -+ /* @2 [ Single Antenna ] */ -+ else if (avg_power_diff > power_target_H) { -+ dm->dm_swat_table.rssi_ant_dect_result = true; -+ if (dm->dm_swat_table.ANTB_ON == true) { -+ dm->dm_swat_table.ANTA_ON = true; -+ dm->dm_swat_table.ANTB_ON = false; -+#if 0 -+ /* @bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 1); */ -+#endif -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s: Single antenna\n", __func__); -+ dm->dm_swat_table.single_ant_counter++; -+ } -+ } -+#if 0 -+ /* PHYDM_DBG(dm,DBG_ANT_DIV, "is_result=(( %d ))\n",dm->dm_swat_table.rssi_ant_dect_result); */ -+#endif -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "dual_ant_counter = (( %d )), single_ant_counter = (( %d )) , retry_counter = (( %d )) , aux_fail_detec_counter = (( %d ))\n\n\n", -+ dm->dm_swat_table.dual_ant_counter, -+ dm->dm_swat_table.single_ant_counter, -+ dm->dm_swat_table.retry_counter, -+ dm->dm_swat_table.aux_fail_detec_counter); -+ -+ /* @2 recover the antenna setting */ -+ -+ if (dm->dm_swat_table.ANTB_ON == false) -+ odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, 0xfff, (dm_swat_table->swas_no_link_bk_reg948)); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "is_result=(( %d )), Recover Reg[948]= (( %x ))\n\n", -+ dm->dm_swat_table.rssi_ant_dect_result, -+ dm_swat_table->swas_no_link_bk_reg948); -+ } -+ -+ /* @Check state reset to default and wait for next time. */ -+ dm_swat_table->swas_no_link_state = 0; -+ mgnt_info->bScanAntDetect = false; -+ -+ return false; -+ } -+ -+#else -+ return false; -+#endif -+ -+ return false; -+} -+ -+/* @1 [3. PSD method] ========================================================== */ -+void odm_single_dual_antenna_detection_psd( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 channel_ori; -+ u8 initial_gain = 0x36; -+ u8 tone_idx; -+ u8 tone_lenth_1 = 7, tone_lenth_2 = 4; -+ u16 tone_idx_1[7] = {88, 104, 120, 8, 24, 40, 56}; -+ u16 tone_idx_2[4] = {8, 24, 40, 56}; -+ u32 psd_report_main[11] = {0}, psd_report_aux[11] = {0}; -+ /* u8 tone_lenth_1=4, tone_lenth_2=2; */ -+ /* u16 tone_idx_1[4]={88, 120, 24, 56}; */ -+ /* u16 tone_idx_2[2]={ 24, 56}; */ -+ /* u32 psd_report_main[6]={0}, psd_report_aux[6]={0}; */ -+ -+ u32 PSD_report_temp, max_psd_report_main = 0, max_psd_report_aux = 0; -+ u32 PSD_power_threshold; -+ u32 main_psd_result = 0, aux_psd_result = 0; -+ u32 regc50, reg948, regb2c, regc14, reg908; -+ u32 i = 0, test_num = 8; -+ -+ if (dm->support_ic_type != ODM_RTL8723B) -+ return; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s============>\n", __func__); -+ -+ /* @2 [ Backup Current RF/BB Settings ] */ -+ -+ channel_ori = odm_get_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK); -+ reg948 = odm_get_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD); -+ regb2c = odm_get_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD); -+ regc50 = odm_get_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD); -+ regc14 = odm_get_bb_reg(dm, R_0xc14, MASKDWORD); -+ reg908 = odm_get_bb_reg(dm, R_0x908, MASKDWORD); -+ -+ /* @2 [ setting for doing PSD function (CH4)] */ -+ odm_set_bb_reg(dm, REG_FPGA0_RFMOD, BIT(24), 0); /* @disable whole CCK block */ -+ odm_write_1byte(dm, REG_TXPAUSE, 0xFF); /* Turn off TX -> Pause TX Queue */ -+ odm_set_bb_reg(dm, R_0xc14, MASKDWORD, 0x0); /* @[ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */ -+ -+ /* PHYTXON while loop */ -+ odm_set_bb_reg(dm, R_0x908, MASKDWORD, 0x803); -+ while (odm_get_bb_reg(dm, R_0xdf4, BIT(6))) { -+ i++; -+ if (i > 1000000) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Wait in %s() more than %d times!\n", -+ __FUNCTION__, i); -+ break; -+ } -+ } -+ -+ odm_set_bb_reg(dm, R_0xc50, 0x7f, initial_gain); -+ odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); /* Set RF to CH4 & 40M */ -+ odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf); /* @3 wire Disable 88c[23:20]=0xf */ -+ odm_set_bb_reg(dm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* 128 pt */ /* Set PSD 128 ptss */ -+ ODM_delay_us(3000); -+ -+ /* @2 [ Doing PSD Function in (CH4)] */ -+ -+ /* @Antenna A */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Main-ant (CH4)\n"); -+ odm_set_bb_reg(dm, R_0x948, 0xfff, 0x200); -+ ODM_delay_us(10); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "dbg\n"); -+ for (i = 0; i < test_num; i++) { -+ for (tone_idx = 0; tone_idx < tone_lenth_1; tone_idx++) { -+ PSD_report_temp = phydm_get_psd_data(dm, tone_idx_1[tone_idx], initial_gain); -+ /* @if( PSD_report_temp>psd_report_main[tone_idx] ) */ -+ psd_report_main[tone_idx] += PSD_report_temp; -+ } -+ } -+ /* @Antenna B */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Aux-ant (CH4)\n"); -+ odm_set_bb_reg(dm, R_0x948, 0xfff, 0x280); -+ ODM_delay_us(10); -+ for (i = 0; i < test_num; i++) { -+ for (tone_idx = 0; tone_idx < tone_lenth_1; tone_idx++) { -+ PSD_report_temp = phydm_get_psd_data(dm, tone_idx_1[tone_idx], initial_gain); -+ /* @if( PSD_report_temp>psd_report_aux[tone_idx] ) */ -+ psd_report_aux[tone_idx] += PSD_report_temp; -+ } -+ } -+ /* @2 [ Doing PSD Function in (CH8)] */ -+ -+ odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0); /* @3 wire enable 88c[23:20]=0x0 */ -+ ODM_delay_us(3000); -+ -+ odm_set_bb_reg(dm, R_0xc50, 0x7f, initial_gain); -+ odm_set_rf_reg(dm, RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); /* Set RF to CH8 & 40M */ -+ -+ odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf); /* @3 wire Disable 88c[23:20]=0xf */ -+ ODM_delay_us(3000); -+ -+ /* @Antenna A */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Main-ant (CH8)\n"); -+ odm_set_bb_reg(dm, R_0x948, 0xfff, 0x200); -+ ODM_delay_us(10); -+ -+ for (i = 0; i < test_num; i++) { -+ for (tone_idx = 0; tone_idx < tone_lenth_2; tone_idx++) { -+ PSD_report_temp = phydm_get_psd_data(dm, tone_idx_2[tone_idx], initial_gain); -+ /* @if( PSD_report_temp>psd_report_main[tone_idx] ) */ -+ psd_report_main[tone_lenth_1 + tone_idx] += PSD_report_temp; -+ } -+ } -+ -+ /* @Antenna B */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Switch to Aux-ant (CH8)\n"); -+ odm_set_bb_reg(dm, R_0x948, 0xfff, 0x280); -+ ODM_delay_us(10); -+ -+ for (i = 0; i < test_num; i++) { -+ for (tone_idx = 0; tone_idx < tone_lenth_2; tone_idx++) { -+ PSD_report_temp = phydm_get_psd_data(dm, tone_idx_2[tone_idx], initial_gain); -+ /* @if( PSD_report_temp>psd_report_aux[tone_idx] ) */ -+ psd_report_aux[tone_lenth_1 + tone_idx] += PSD_report_temp; -+ } -+ } -+ -+ /* @2 [ Calculate Result ] */ -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "\nMain PSD Result: (ALL)\n"); -+ for (tone_idx = 0; tone_idx < (tone_lenth_1 + tone_lenth_2); tone_idx++) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Tone-%d]: %d,\n", (tone_idx + 1), -+ psd_report_main[tone_idx]); -+ main_psd_result += psd_report_main[tone_idx]; -+ if (psd_report_main[tone_idx] > max_psd_report_main) -+ max_psd_report_main = psd_report_main[tone_idx]; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "--------------------------- \nTotal_Main= (( %d ))\n", -+ main_psd_result); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "MAX_Main = (( %d ))\n", -+ max_psd_report_main); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "\nAux PSD Result: (ALL)\n"); -+ for (tone_idx = 0; tone_idx < (tone_lenth_1 + tone_lenth_2); tone_idx++) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Tone-%d]: %d,\n", (tone_idx + 1), -+ psd_report_aux[tone_idx]); -+ aux_psd_result += psd_report_aux[tone_idx]; -+ if (psd_report_aux[tone_idx] > max_psd_report_aux) -+ max_psd_report_aux = psd_report_aux[tone_idx]; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "--------------------------- \nTotal_Aux= (( %d ))\n", -+ aux_psd_result); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "MAX_Aux = (( %d ))\n\n", -+ max_psd_report_aux); -+ -+ /* @main_psd_result=main_psd_result-max_psd_report_main; */ -+ /* @aux_psd_result=aux_psd_result-max_psd_report_aux; */ -+ PSD_power_threshold = (main_psd_result * 7) >> 3; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Main_result, Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n", -+ main_psd_result, aux_psd_result, PSD_power_threshold); -+ -+ /* @3 [ Dual Antenna ] */ -+ if (aux_psd_result >= PSD_power_threshold) { -+ if (dm->dm_swat_table.ANTB_ON == false) { -+ dm->dm_swat_table.ANTA_ON = true; -+ dm->dm_swat_table.ANTB_ON = true; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "odm_sw_ant_div_check_before_link(): Dual antenna\n"); -+ -+#if 0 -+ /* set bt coexDM from 1ant coexDM to 2ant coexDM */ -+ /* @bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 2); */ -+#endif -+ -+ /* @Init antenna diversity */ -+ dm->support_ability |= ODM_BB_ANT_DIV; -+ odm_ant_div_init(dm); -+ } -+ /* @3 [ Single Antenna ] */ -+ else { -+ if (dm->dm_swat_table.ANTB_ON == true) { -+ dm->dm_swat_table.ANTA_ON = true; -+ dm->dm_swat_table.ANTB_ON = false; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "odm_sw_ant_div_check_before_link(): Single antenna\n"); -+ } -+ -+ /* @2 [ Recover all parameters ] */ -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, channel_ori); -+ odm_set_bb_reg(dm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0); /* @3 wire enable 88c[23:20]=0x0 */ -+ odm_set_bb_reg(dm, R_0xc50, 0x7f, regc50); -+ -+ odm_set_bb_reg(dm, REG_S0_S1_PATH_SWITCH, MASKDWORD, reg948); -+ odm_set_bb_reg(dm, REG_AGC_TABLE_SELECT, MASKDWORD, regb2c); -+ -+ odm_set_bb_reg(dm, REG_FPGA0_RFMOD, BIT(24), 1); /* @enable whole CCK block */ -+ odm_write_1byte(dm, REG_TXPAUSE, 0x0); /* Turn on TX */ /* Resume TX Queue */ -+ odm_set_bb_reg(dm, R_0xc14, MASKDWORD, regc14); /* @[ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA] */ -+ odm_set_bb_reg(dm, R_0x908, MASKDWORD, reg908); -+ -+ return; -+} -+ -+void odm_sw_ant_detect_init(void *dm_void) -+{ -+#if (RTL8723B_SUPPORT == 1) -+ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; -+ -+ if (dm->support_ic_type != ODM_RTL8723B) -+ return; -+ -+ /* @dm_swat_table->pre_antenna = MAIN_ANT; */ -+ /* @dm_swat_table->cur_antenna = MAIN_ANT; */ -+ dm_swat_table->swas_no_link_state = 0; -+ dm_swat_table->pre_aux_fail_detec = false; -+ dm_swat_table->swas_no_link_bk_reg948 = 0xff; -+ -+#ifdef CONFIG_PSD_TOOL -+ phydm_psd_init(dm); -+#endif -+#endif -+} -+#endif -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_antdect.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_antdect.h -new file mode 100644 -index 000000000000..f7fc75f185ab ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_antdect.h -@@ -0,0 +1,78 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMANTDECT_H__ -+#define __PHYDMANTDECT_H__ -+ -+#define ANTDECT_VERSION "2.1" -+ -+#if (defined(CONFIG_ANT_DETECTION)) -+/* @#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) */ -+/* @ANT Test */ -+#define ANTTESTALL 0x00 /*@ant A or B will be Testing*/ -+#define ANTTESTA 0x01 /*@ant A will be Testing*/ -+#define ANTTESTB 0x02 /*@ant B will be testing*/ -+ -+#define MAX_ANTENNA_DETECTION_CNT 10 -+ -+struct _ANT_DETECTED_INFO { -+ boolean is_ant_detected; -+ u32 db_for_ant_a; -+ u32 db_for_ant_b; -+ u32 db_for_ant_o; -+}; -+ -+enum dm_swas { -+ antenna_a = 1, -+ antenna_b = 2, -+ antenna_max = 3, -+}; -+ -+/* @1 [1. Single Tone method] =================================================== */ -+ -+void odm_single_dual_antenna_default_setting( -+ void *dm_void); -+ -+boolean -+odm_single_dual_antenna_detection( -+ void *dm_void, -+ u8 mode); -+ -+/* @1 [2. Scan AP RSSI method] ================================================== */ -+ -+#define sw_ant_div_check_before_link odm_sw_ant_div_check_before_link -+ -+boolean -+odm_sw_ant_div_check_before_link( -+ void *dm_void); -+ -+/* @1 [3. PSD method] ========================================================== */ -+ -+void odm_single_dual_antenna_detection_psd( -+ void *dm_void); -+ -+void odm_sw_ant_detect_init(void *dm_void); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_antdiv.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_antdiv.c -new file mode 100644 -index 000000000000..5be61b63d73a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_antdiv.c -@@ -0,0 +1,6552 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/************************************************************* -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+/******************************************************* -+ * when antenna test utility is on or some testing need to disable antenna -+ * diversity call this function to disable all ODM related mechanisms which -+ * will switch antenna. -+ ***************************************************** -+ */ -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+#if (RTL8710C_SUPPORT == 1) -+void odm_s0s1_sw_ant_div_init_8710c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***8710C AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"); -+ /*MAC setting*/ -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0xdc, HAL_READ32(SYSTEM_CTRL_BASE, R_0xdc) | BIT18 | BIT17 | BIT16); -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0xac, HAL_READ32(SYSTEM_CTRL_BASE, R_0xac) | BIT24 | BIT6); -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0x10, 0x307); -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0x08, 0x80000111); -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0x1208, 0x800000); -+ -+ /* Status init */ -+ fat_tab->is_become_linked = false; -+ swat_tab->try_flag = SWAW_STEP_INIT; -+ swat_tab->double_chk_flag = 0; -+ swat_tab->cur_antenna = MAIN_ANT; -+ swat_tab->pre_ant = MAIN_ANT; -+ dm->antdiv_counter = CONFIG_ANTDIV_PERIOD; -+} -+ -+void odm_trx_hw_ant_div_init_8710c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[8710C] AntDiv_Init => ant_div_type=[CG_TRX_HW_ANTDIV]\n"); -+ odm_set_mac_reg(dm, R_0x74, BIT(13) | BIT(12), 1); -+ odm_set_mac_reg(dm, R_0x74, BIT(4), 1); -+ -+ /*@BT Coexistence*/ -+ /*@keep antsel_map when GNT_BT = 1*/ -+ odm_set_bb_reg(dm, R_0x864, BIT(12), 1); -+ -+ /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ -+ odm_set_bb_reg(dm, R_0x874, BIT(23), 1); -+ odm_set_bb_reg(dm, R_0x930, 0xF00, 8); /* RFE CTRL_2 ANTSEL0 */ -+ -+ odm_set_bb_reg(dm, R_0x870, BIT(8), 0); -+ odm_set_bb_reg(dm, R_0x804, BIT(8), 0); /* r_keep_rfpin */ -+ -+ /*@Mapping Table*/ -+ //odm_set_bb_reg(dm, R_0x864, BIT2|BIT1|BIT0, 2); -+ odm_set_bb_reg(dm, R_0x944, 0xFFFF, 0xffff); -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1); -+ /*@antenna training */ -+ odm_set_bb_reg(dm, R_0xe08, BIT(16), 0); -+ -+ //need to check!!!!!!!!!! -+ /* Set WLBB_SEL_RF_ON 1 if RXFIR_PWDB > 0xCcc[3:0] */ -+ odm_set_bb_reg(dm, R_0xccc, BIT(12), 0); -+ /* @Low-to-High threshold for WLBB_SEL_RF_ON when OFDM enable */ -+ odm_set_bb_reg(dm, R_0xccc, 0x0F, 0x01); -+ /* @High-to-Low threshold for WLBB_SEL_RF_ON when OFDM enable */ -+ odm_set_bb_reg(dm, R_0xccc, 0xF0, 0x0); -+ /* @b Low-to-High threshold for WLBB_SEL_RF_ON when OFDM disable (CCK)*/ -+ odm_set_bb_reg(dm, R_0xabc, 0xFF, 0x06); -+ /* @High-to-Low threshold for WLBB_SEL_RF_ON when OFDM disable (CCK) */ -+ odm_set_bb_reg(dm, R_0xabc, 0xFF00, 0x00); -+ -+ /*OFDM HW AntDiv Parameters*/ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0x80); -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x00); -+ odm_set_bb_reg(dm, R_0xc5c, BIT(20) | BIT(19) | BIT(18), 0x04); -+ -+ /*@CCK HW AntDiv Parameters*/ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); -+ odm_set_bb_reg(dm, R_0xaa8, BIT(8), 0); -+ -+ odm_set_bb_reg(dm, R_0xa0c, 0x0F, 0xf); -+ odm_set_bb_reg(dm, R_0xa14, 0x1F, 0xf); -+ odm_set_bb_reg(dm, R_0xa10, BIT(13), 0x1); -+ odm_set_bb_reg(dm, R_0xa74, BIT(8), 0x0); -+ odm_set_bb_reg(dm, R_0xb34, BIT(30), 0x1); -+} -+void odm_update_rx_idle_ant_8710c(void *dm_void, u8 ant, u32 default_ant, -+ u32 optional_ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ void *adapter = dm->adapter; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***odm_update_rx_idle_ant_8710c!!!\n"); -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ if (default_ant == 0x0) -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0x1210,0x800000); -+ else -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0x1214,0x800000); -+ -+ fat_tab->rx_idle_ant = ant; -+ }else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant); -+ /*@Default RX*/ -+ odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); -+ /*@Optional RX*/ -+ odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant); -+ /*@Default TX*/ -+ fat_tab->rx_idle_ant = ant; -+ } -+} -+#endif -+ -+#if (RTL8721D_SUPPORT == 1) -+ -+void odm_update_rx_idle_ant_8721d(void *dm_void, u8 ant, u32 default_ant, -+ u32 optional_ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant); -+ /*@Default RX*/ -+ odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); -+ /*@Optional RX*/ -+ odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant); -+ /*@Default TX*/ -+ fat_tab->rx_idle_ant = ant; -+} -+ -+void odm_trx_hw_ant_div_init_8721d(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[8721D] AntDiv_Init => ant_div_type=[CG_TRX_HW_ANTDIV]\n"); -+ -+ /*@BT Coexistence*/ -+ /*@keep antsel_map when GNT_BT = 1*/ -+ odm_set_bb_reg(dm, R_0x864, BIT(12), 1); -+ /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ -+ odm_set_bb_reg(dm, R_0x874, BIT(23), 0); -+ /* @Disable hw antsw & fast_train.antsw when BT TX/RX */ -+ odm_set_bb_reg(dm, R_0xe64, 0xFFFF0000, 0x000c); -+ -+ switch (dm->antdiv_gpio) { -+ case ANTDIV_GPIO_PA2PA4: { -+ PAD_CMD(_PA_2, ENABLE); -+ Pinmux_Config(_PA_2, PINMUX_FUNCTION_RFE); -+ PAD_CMD(_PA_4, ENABLE); -+ Pinmux_Config(_PA_4, PINMUX_FUNCTION_RFE); -+ break; -+ } -+ case ANTDIV_GPIO_PA5PA6: { -+ PAD_CMD(_PA_5, ENABLE); -+ Pinmux_Config(_PA_5, PINMUX_FUNCTION_RFE); -+ PAD_CMD(_PA_6, ENABLE); -+ Pinmux_Config(_PA_6, PINMUX_FUNCTION_RFE); -+ break; -+ } -+ case ANTDIV_GPIO_PA12PA13: { -+ PAD_CMD(_PA_12, ENABLE); -+ Pinmux_Config(_PA_12, PINMUX_FUNCTION_RFE); -+ PAD_CMD(_PA_13, ENABLE); -+ Pinmux_Config(_PA_13, PINMUX_FUNCTION_RFE); -+ break; -+ } -+ case ANTDIV_GPIO_PA14PA15: { -+ PAD_CMD(_PA_14, ENABLE); -+ Pinmux_Config(_PA_14, PINMUX_FUNCTION_RFE); -+ PAD_CMD(_PA_15, ENABLE); -+ Pinmux_Config(_PA_15, PINMUX_FUNCTION_RFE); -+ break; -+ } -+ case ANTDIV_GPIO_PA16PA17: { -+ PAD_CMD(_PA_16, ENABLE); -+ Pinmux_Config(_PA_16, PINMUX_FUNCTION_RFE); -+ PAD_CMD(_PA_17, ENABLE); -+ Pinmux_Config(_PA_17, PINMUX_FUNCTION_RFE); -+ break; -+ } -+ case ANTDIV_GPIO_PB1PB2: { -+ PAD_CMD(_PB_1, ENABLE); -+ Pinmux_Config(_PB_1, PINMUX_FUNCTION_RFE); -+ PAD_CMD(_PB_2, ENABLE); -+ Pinmux_Config(_PB_2, PINMUX_FUNCTION_RFE); -+ break; -+ } -+ case ANTDIV_GPIO_PB26PB29: { -+ PAD_CMD(_PB_26, ENABLE); -+ Pinmux_Config(_PB_26, PINMUX_FUNCTION_RFE); -+ PAD_CMD(_PB_29, ENABLE); -+ Pinmux_Config(_PB_29, PINMUX_FUNCTION_RFE); -+ break; -+ } -+ case ANTDIV_GPIO_PB1PB2PB26:{ -+ PAD_CMD(_PB_1, ENABLE); -+ Pinmux_Config(_PB_1, PINMUX_FUNCTION_RFE); -+ PAD_CMD(_PB_2, ENABLE); -+ Pinmux_Config(_PB_2, PINMUX_FUNCTION_RFE); -+ PAD_CMD(_PB_26, ENABLE); -+ Pinmux_Config(_PB_26, PINMUX_FUNCTION_RFE); -+ break; -+ } -+ default: { -+ } -+ } -+ -+ if (dm->antdiv_gpio == ANTDIV_GPIO_PA12PA13 || -+ dm->antdiv_gpio == ANTDIV_GPIO_PA14PA15 || -+ dm->antdiv_gpio == ANTDIV_GPIO_PA16PA17 || -+ dm->antdiv_gpio == ANTDIV_GPIO_PB1PB2) { -+ /* ANT_SEL_P, ANT_SEL_N */ -+ odm_set_bb_reg(dm, R_0x930, 0xF, 8); -+ odm_set_bb_reg(dm, R_0x930, 0xF0, 8); -+ odm_set_bb_reg(dm, R_0x92c, BIT(1) | BIT(0), 2); -+ odm_set_bb_reg(dm, R_0x944, 0x00000003, 0x3); -+ } else if (dm->antdiv_gpio == ANTDIV_GPIO_PA2PA4 || -+ dm->antdiv_gpio == ANTDIV_GPIO_PA5PA6 || -+ dm->antdiv_gpio == ANTDIV_GPIO_PB26PB29) { -+ /* TRSW_P, TRSW_N */ -+ odm_set_bb_reg(dm, R_0x930, 0xF00, 8); -+ odm_set_bb_reg(dm, R_0x930, 0xF000, 8); -+ odm_set_bb_reg(dm, R_0x92c, BIT(3) | BIT(2), 2); -+ odm_set_bb_reg(dm, R_0x944, 0x0000000C, 0x3); -+ } -+ else if(dm->antdiv_gpio == ANTDIV_GPIO_PB1PB2PB26){ -+ /* 3 antenna diversity for AmebaD only */ -+ odm_set_bb_reg(dm, R_0x930, 0xF, 8); -+ odm_set_bb_reg(dm, R_0x930, 0xF0, 9); -+ odm_set_bb_reg(dm, R_0x930, 0xF00,0xa); /* set the RFE control table to select antenna*/ -+ odm_set_bb_reg(dm, R_0x944, 0x00000007, 0x7); -+ } -+ -+ u32 sysreg208 = HAL_READ32(SYSTEM_CTRL_BASE_LP, REG_LP_FUNC_EN0); -+ -+ sysreg208 |= BIT(28); -+ HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_LP_FUNC_EN0, sysreg208); -+ -+ u32 sysreg344 = -+ HAL_READ32(SYSTEM_CTRL_BASE_LP, REG_AUDIO_SHARE_PAD_CTRL); -+ -+ sysreg344 |= BIT(9); -+ HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_AUDIO_SHARE_PAD_CTRL, sysreg344); -+ -+ u32 sysreg280 = HAL_READ32(SYSTEM_CTRL_BASE_LP, REG_LP_SYSPLL_CTRL0); -+ -+ sysreg280 |= 0x7; -+ HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_LP_SYSPLL_CTRL0, sysreg280); -+ -+ sysreg344 |= BIT(8); -+ HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_AUDIO_SHARE_PAD_CTRL, sysreg344); -+ -+ sysreg344 |= BIT(0); -+ HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_AUDIO_SHARE_PAD_CTRL, sysreg344); -+ -+ odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); -+ odm_set_bb_reg(dm, R_0x804, 0xF00, 1); /* r_keep_rfpin */ -+ -+ /*PTA setting: WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL)*/ -+ /*odm_set_bb_reg(dm, R_0x948, BIT6, 0);*/ -+ /*odm_set_bb_reg(dm, R_0x948, BIT8, 0);*/ -+ /*@GNT_WL tx*/ -+ odm_set_bb_reg(dm, R_0x950, BIT(29), 0); -+ -+ /*@Mapping Table*/ -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1); -+ if (dm->antdiv_gpio == ANTDIV_GPIO_PB1PB2PB26) { -+ odm_set_bb_reg(dm, R_0x914, 0x00000F, 0x1); -+ odm_set_bb_reg(dm, R_0x914, 0x000F00, 0x2); -+ odm_set_bb_reg(dm, R_0x914, 0x0F0000, 0x4); -+ } -+ /* odm_set_bb_reg(dm, R_0x864, BIT5|BIT4|BIT3, 0); */ -+ /* odm_set_bb_reg(dm, R_0x864, BIT8|BIT7|BIT6, 1); */ -+ -+ /* Set WLBB_SEL_RF_ON 1 if RXFIR_PWDB > 0xCcc[3:0] */ -+ odm_set_bb_reg(dm, R_0xccc, BIT(12), 0); -+ /* @Low-to-High threshold for WLBB_SEL_RF_ON */ -+ /*when OFDM enable */ -+ odm_set_bb_reg(dm, R_0xccc, 0x0F, 0x01); -+ /* @High-to-Low threshold for WLBB_SEL_RF_ON */ -+ /* when OFDM enable */ -+ odm_set_bb_reg(dm, R_0xccc, 0xF0, 0x0); -+ /* @b Low-to-High threshold for WLBB_SEL_RF_ON*/ -+ /*when OFDM disable ( only CCK ) */ -+ odm_set_bb_reg(dm, R_0xabc, 0xFF, 0x06); -+ /* @High-to-Low threshold for WLBB_SEL_RF_ON*/ -+ /* when OFDM disable ( only CCK ) */ -+ odm_set_bb_reg(dm, R_0xabc, 0xFF00, 0x00); -+ -+ /*OFDM HW AntDiv Parameters*/ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xa0); -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x00); -+ odm_set_bb_reg(dm, R_0xc5c, BIT(20) | BIT(19) | BIT(18), 0x04); -+ -+ /*@CCK HW AntDiv Parameters*/ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 0); -+ odm_set_bb_reg(dm, R_0xaa8, BIT(8), 0); -+ -+ odm_set_bb_reg(dm, R_0xa0c, 0x0F, 0xf); -+ odm_set_bb_reg(dm, R_0xa14, 0x1F, 0x8); -+ odm_set_bb_reg(dm, R_0xa10, BIT(13), 0x1); -+ odm_set_bb_reg(dm, R_0xa74, BIT(8), 0x0); -+ odm_set_bb_reg(dm, R_0xb34, BIT(30), 0x1); -+ -+ /*@disable antenna training */ -+ odm_set_bb_reg(dm, R_0xe08, BIT(16), 0); -+ odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); -+} -+#endif -+ -+void odm_stop_antenna_switch_dm(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ /* @disable ODM antenna diversity */ -+ dm->support_ability &= ~ODM_BB_ANT_DIV; -+#if (RTL8710C_SUPPORT == 1) -+ dm->support_ability |= ODM_BB_ANT_DIV; -+#endif -+ if (fat_tab->div_path_type == ANT_PATH_A) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ else if (fat_tab->div_path_type == ANT_PATH_B) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B); -+ else if (fat_tab->div_path_type == ANT_PATH_AB) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB); -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "STOP Antenna Diversity\n"); -+} -+ -+void phydm_enable_antenna_diversity(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ dm->support_ability |= ODM_BB_ANT_DIV; -+ dm->antdiv_select = 0; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "AntDiv is enabled & Re-Init AntDiv\n"); -+ odm_antenna_diversity_init(dm); -+} -+ -+void odm_set_ant_config(void *dm_void, u8 ant_setting /* @0=A, 1=B, 2=C,...*/) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type == ODM_RTL8723B) { -+ if (ant_setting == 0) /* @ant A*/ -+ odm_set_bb_reg(dm, R_0x948, MASKDWORD, 0x00000000); -+ else if (ant_setting == 1) -+ odm_set_bb_reg(dm, R_0x948, MASKDWORD, 0x00000280); -+ } else if (dm->support_ic_type == ODM_RTL8723D) { -+ if (ant_setting == 0) /* @ant A*/ -+ odm_set_bb_reg(dm, R_0x948, MASKLWORD, 0x0000); -+ else if (ant_setting == 1) -+ odm_set_bb_reg(dm, R_0x948, MASKLWORD, 0x0280); -+ } -+} -+ -+/* ****************************************************** */ -+ -+void odm_sw_ant_div_rest_after_link(void *dm_void) -+{ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u32 i; -+ -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ swat_tab->try_flag = SWAW_STEP_INIT; -+ swat_tab->rssi_trying = 0; -+ swat_tab->double_chk_flag = 0; -+ fat_tab->rx_idle_ant = MAIN_ANT; -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) -+ phydm_antdiv_reset_statistic(dm, i); -+ } -+ -+#endif -+} -+ -+void phydm_n_on_off(void *dm_void, u8 swch, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ if (path == ANT_PATH_A) { -+ odm_set_bb_reg(dm, R_0xc50, BIT(7), swch); -+ } else if (path == ANT_PATH_B) { -+ odm_set_bb_reg(dm, R_0xc58, BIT(7), swch); -+ } else if (path == ANT_PATH_AB) { -+ odm_set_bb_reg(dm, R_0xc50, BIT(7), swch); -+ odm_set_bb_reg(dm, R_0xc58, BIT(7), swch); -+ } -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); -+#if (RTL8723D_SUPPORT == 1) -+ /*@Mingzhi 2017-05-08*/ -+ if (dm->support_ic_type == ODM_RTL8723D) { -+ if (swch == ANTDIV_ON) { -+ odm_set_bb_reg(dm, R_0xce0, BIT(1), 1); -+ odm_set_bb_reg(dm, R_0x948, BIT(6), 1); -+ /*@1:HW ctrl 0:SW ctrl*/ -+ } else { -+ odm_set_bb_reg(dm, R_0xce0, BIT(1), 0); -+ odm_set_bb_reg(dm, R_0x948, BIT(6), 0); -+ /*@1:HW ctrl 0:SW ctrl*/ -+ } -+ } -+#endif -+} -+ -+void phydm_ac_on_off(void *dm_void, u8 swch, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ if (dm->support_ic_type & ODM_RTL8812) { -+ odm_set_bb_reg(dm, R_0xc50, BIT(7), swch); -+ /* OFDM AntDiv function block enable */ -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); -+ /* @CCK AntDiv function block enable */ -+ } else if (dm->support_ic_type & ODM_RTL8822B) { -+ odm_set_bb_reg(dm, R_0x800, BIT(25), swch); -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); -+ if (path == ANT_PATH_A) { -+ odm_set_bb_reg(dm, R_0xc50, BIT(7), swch); -+ } else if (path == ANT_PATH_B) { -+ odm_set_bb_reg(dm, R_0xe50, BIT(7), swch); -+ } else if (path == ANT_PATH_AB) { -+ odm_set_bb_reg(dm, R_0xc50, BIT(7), swch); -+ odm_set_bb_reg(dm, R_0xe50, BIT(7), swch); -+ } -+ } else { -+ odm_set_bb_reg(dm, R_0x8d4, BIT(24), swch); -+ /* OFDM AntDiv function block enable */ -+ -+ if (dm->cut_version >= ODM_CUT_C && -+ dm->support_ic_type == ODM_RTL8821 && -+ dm->ant_div_type != S0S1_SW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "(Turn %s) CCK HW-AntDiv\n", -+ (swch == ANTDIV_ON) ? "ON" : "OFF"); -+ odm_set_bb_reg(dm, R_0x800, BIT(25), swch); -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); -+ /* @CCK AntDiv function block enable */ -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "(Turn %s) CCK HW-AntDiv\n", -+ (swch == ANTDIV_ON) ? "ON" : "OFF"); -+ odm_set_bb_reg(dm, R_0x800, BIT(25), swch); -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); -+ /* @CCK AntDiv function block enable */ -+ } -+ } -+} -+ -+void phydm_jgr3_on_off(void *dm_void, u8 swch, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ odm_set_bb_reg(dm, R_0x8a0, BIT(17), swch); -+ /* OFDM AntDiv function block enable */ -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), swch); -+ /* @CCK AntDiv function block enable */ -+} -+ -+void odm_ant_div_on_off(void *dm_void, u8 swch, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ if (fat_tab->ant_div_on_off != swch) { -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) -+ return; -+ -+ if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "(( Turn %s )) N-Series HW-AntDiv block\n", -+ (swch == ANTDIV_ON) ? "ON" : "OFF"); -+ phydm_n_on_off(dm, swch, path); -+ -+ } else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "(( Turn %s )) AC-Series HW-AntDiv block\n", -+ (swch == ANTDIV_ON) ? "ON" : "OFF"); -+ phydm_ac_on_off(dm, swch, path); -+ } else if (dm->support_ic_type & ODM_JGR3_ANTDIV_SUPPORT) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "(( Turn %s )) JGR3 HW-AntDiv block\n", -+ (swch == ANTDIV_ON) ? "ON" : "OFF"); -+ phydm_jgr3_on_off(dm, swch, path); -+ } -+ } -+ fat_tab->ant_div_on_off = swch; -+} -+ -+void odm_tx_by_tx_desc_or_reg(void *dm_void, u8 swch) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u8 enable; -+ -+ if (fat_tab->b_fix_tx_ant == NO_FIX_TX_ANT) -+ enable = (swch == TX_BY_DESC) ? 1 : 0; -+ else -+ enable = 0; /*@Force TX by Reg*/ -+ -+ if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) { -+ if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) -+ odm_set_bb_reg(dm, R_0x80c, BIT(21), enable); -+ else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) -+ odm_set_bb_reg(dm, R_0x900, BIT(18), enable); -+ else if (dm->support_ic_type & ODM_JGR3_ANTDIV_SUPPORT) -+ odm_set_bb_reg(dm, R_0x186c, BIT(1), enable); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[AntDiv] TX_Ant_BY (( %s ))\n", -+ (enable == TX_BY_DESC) ? "DESC" : "REG"); -+ } -+} -+ -+void phydm_antdiv_reset_statistic(void *dm_void, u32 macid) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ fat_tab->main_sum[macid] = 0; -+ fat_tab->aux_sum[macid] = 0; -+ fat_tab->main_cnt[macid] = 0; -+ fat_tab->aux_cnt[macid] = 0; -+ fat_tab->main_sum_cck[macid] = 0; -+ fat_tab->aux_sum_cck[macid] = 0; -+ fat_tab->main_cnt_cck[macid] = 0; -+ fat_tab->aux_cnt_cck[macid] = 0; -+} -+ -+void phydm_fast_training_enable(void *dm_void, u8 swch) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 enable; -+ -+ if (swch == FAT_ON) -+ enable = 1; -+ else -+ enable = 0; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Fast ant Training_en = ((%d))\n", enable); -+ -+ if (dm->support_ic_type == ODM_RTL8188E) { -+ odm_set_bb_reg(dm, R_0xe08, BIT(16), enable); -+ /*@enable fast training*/ -+ } else if (dm->support_ic_type == ODM_RTL8192E) { -+ odm_set_bb_reg(dm, R_0xb34, BIT(28), enable); -+ /*@enable fast training (path-A)*/ -+#if 0 -+ odm_set_bb_reg(dm, R_0xb34, BIT(29), enable); -+ /*enable fast training (path-B)*/ -+#endif -+ } else if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8822B)) { -+ odm_set_bb_reg(dm, R_0x900, BIT(19), enable); -+ /*@enable fast training */ -+ } -+} -+ -+void phydm_keep_rx_ack_ant_by_tx_ant_time(void *dm_void, u32 time) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /* Timming issue: keep Rx ant after tx for ACK ( time x 3.2 mu sec)*/ -+ if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) -+ odm_set_bb_reg(dm, R_0xe20, 0xf00000, time); -+ else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) -+ odm_set_bb_reg(dm, R_0x818, 0xf00000, time); -+} -+ -+void phydm_update_rx_idle_ac(void *dm_void, u8 ant, u32 default_ant, -+ u32 optional_ant, u32 default_tx_ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ u16 value16 = odm_read_2byte(dm, ODM_REG_TRMUX_11AC + 2); -+ /* @2014/01/14 MH/Luke.Lee Add direct write for register 0xc0a to */ -+ /* @prevnt incorrect 0xc08 bit0-15.We still not know why it is changed*/ -+ value16 &= ~(BIT(11) | BIT(10) | BIT(9) | BIT(8) | BIT(7) | BIT(6) | -+ BIT(5) | BIT(4) | BIT(3)); -+ value16 |= ((u16)default_ant << 3); -+ value16 |= ((u16)optional_ant << 6); -+ value16 |= ((u16)default_tx_ant << 9); -+ odm_write_2byte(dm, ODM_REG_TRMUX_11AC + 2, value16); -+#if 0 -+ odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, 0x380000, default_ant); -+ /* @Default RX */ -+ odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, 0x1c00000, optional_ant); -+ /* Optional RX */ -+ odm_set_bb_reg(dm, ODM_REG_TRMUX_11AC, 0xe000000, default_ant); -+ /* @Default TX */ -+#endif -+} -+ -+void phydm_update_rx_idle_n(void *dm_void, u8 ant, u32 default_ant, -+ u32 optional_ant, u32 default_tx_ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 value32; -+ -+ if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F)) { -+ odm_set_bb_reg(dm, R_0xb38, 0x38, default_ant); -+ /* @Default RX */ -+ odm_set_bb_reg(dm, R_0xb38, 0x1c0, optional_ant); -+ /* Optional RX */ -+ odm_set_bb_reg(dm, R_0x860, 0x7000, default_ant); -+ /* @Default TX */ -+#if (RTL8723B_SUPPORT == 1) -+ } else if (dm->support_ic_type == ODM_RTL8723B) { -+ value32 = odm_get_bb_reg(dm, R_0x948, 0xFFF); -+ -+ if (value32 != 0x280) -+ odm_update_rx_idle_ant_8723b(dm, ant, default_ant, -+ optional_ant); -+ else -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to 0x948 = 0x280\n"); -+#endif -+ -+#if (RTL8723D_SUPPORT == 1) /*@Mingzhi 2017-05-08*/ -+ } else if (dm->support_ic_type == ODM_RTL8723D) { -+ phydm_set_tx_ant_pwr_8723d(dm, ant); -+ odm_update_rx_idle_ant_8723d(dm, ant, default_ant, -+ optional_ant); -+#endif -+ -+#if (RTL8721D_SUPPORT == 1) -+ } else if (dm->support_ic_type == ODM_RTL8721D) { -+ odm_update_rx_idle_ant_8721d(dm, ant, default_ant, -+ optional_ant); -+#endif -+ -+#if (RTL8710C_SUPPORT == 1) -+ } else if (dm->support_ic_type == ODM_RTL8710C) { -+ odm_update_rx_idle_ant_8710c(dm, ant, default_ant, -+ optional_ant); -+#endif -+ -+ } else { -+/*@8188E & 8188F*/ -+/*@ if (dm->support_ic_type == ODM_RTL8723D) {*/ -+/*#if (RTL8723D_SUPPORT == 1)*/ -+/* phydm_set_tx_ant_pwr_8723d(dm, ant);*/ -+/*#endif*/ -+/* }*/ -+#if (RTL8188F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188F) -+ phydm_update_rx_idle_antenna_8188F(dm, default_ant); -+#endif -+ -+ odm_set_bb_reg(dm, R_0x864, 0x38, default_ant);/*@Default RX*/ -+ odm_set_bb_reg(dm, R_0x864, 0x1c0, optional_ant); -+ /*Optional RX*/ -+ odm_set_bb_reg(dm, R_0x860, 0x7000, default_tx_ant); -+ /*@Default TX*/ -+ } -+} -+ -+void phydm_update_rx_idle_jgr3(void *dm_void, u8 ant, u32 default_ant, -+ u32 optional_ant, u32 default_tx_ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 value32; -+ -+ odm_set_bb_reg(dm, R_0x1884, 0xf0, default_ant);/*@Default RX*/ -+ odm_set_bb_reg(dm, R_0x1884, 0xf00, optional_ant); -+ /*Optional RX*/ -+ odm_set_bb_reg(dm, R_0x1884, 0xf000, default_tx_ant); -+ /*@Default TX*/ -+} -+void odm_update_rx_idle_ant(void *dm_void, u8 ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u32 default_ant, optional_ant, value32, default_tx_ant; -+ -+ if (fat_tab->rx_idle_ant != ant) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-ant ] rx_idle_ant =%s\n", -+ (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ -+ if (!(dm->support_ic_type & ODM_RTL8723B)) -+ fat_tab->rx_idle_ant = ant; -+ -+ if (ant == MAIN_ANT) { -+ default_ant = ANT1_2G; -+ optional_ant = ANT2_2G; -+ } else { -+ default_ant = ANT2_2G; -+ optional_ant = ANT1_2G; -+ } -+ -+ if (fat_tab->b_fix_tx_ant != NO_FIX_TX_ANT) -+ default_tx_ant = (fat_tab->b_fix_tx_ant == -+ FIX_TX_AT_MAIN) ? 0 : 1; -+ else -+ default_tx_ant = default_ant; -+ -+ if (dm->support_ic_type & ODM_N_ANTDIV_SUPPORT) { -+ phydm_update_rx_idle_n(dm, ant, default_ant, -+ optional_ant, default_tx_ant); -+ } else if (dm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) { -+ phydm_update_rx_idle_ac(dm, ant, default_ant, -+ optional_ant, default_tx_ant); -+ } else if (dm->support_ic_type & ODM_JGR3_ANTDIV_SUPPORT) { -+ phydm_update_rx_idle_jgr3(dm, ant, default_ant, -+ optional_ant, default_tx_ant); -+ } -+ /*PathA Resp Tx*/ -+ if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | -+ ODM_RTL8814A | ODM_RTL8195B)) -+ odm_set_mac_reg(dm, R_0x6d8, 0x7, default_tx_ant); -+ else if (dm->support_ic_type == ODM_RTL8188E) -+ odm_set_mac_reg(dm, R_0x6d8, 0xc0, default_tx_ant); -+ else if (dm->support_ic_type & ODM_JGR3_ANTDIV_SUPPORT) -+ odm_set_mac_reg(dm, R_0x6f8, 0xf, default_tx_ant); -+ else -+ odm_set_mac_reg(dm, R_0x6d8, 0x700, default_tx_ant); -+ -+ } else { /* @fat_tab->rx_idle_ant == ant */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Stay in Ori-ant ] rx_idle_ant =%s\n", -+ (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ fat_tab->rx_idle_ant = ant; -+ } -+} -+ -+#if (RTL8721D_SUPPORT) -+void odm_update_rx_idle_ant_sp3t(void *dm_void, u8 ant) /* added by Jiao Qi on May.25,2020, for AmebaD SP3T only */ -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u32 default_ant, optional_ant, value32, default_tx_ant; -+ -+ if (!(dm->support_ic_type & ODM_RTL8723B)) -+ fat_tab->rx_idle_ant = ant; -+ -+ default_ant = fat_tab->ant_idx_vec[0]-1; -+ optional_ant = fat_tab->ant_idx_vec[1]-1; -+ -+ if(fat_tab->b_fix_tx_ant != NO_FIX_TX_ANT) -+ default_tx_ant = (fat_tab->b_fix_tx_ant == -+ FIX_TX_AT_MAIN) ? 0 : 1; -+ else -+ default_tx_ant = default_ant; -+ -+ odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant); -+ /*@Default RX*/ -+ odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); -+ /*@Optional RX*/ -+ odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant); -+ /*@Default TX*/ -+ -+ /*PathA Resp Tx*/ -+ if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | -+ ODM_RTL8814A)) -+ odm_set_mac_reg(dm, R_0x6d8, 0x7, default_tx_ant); -+ else if (dm->support_ic_type == ODM_RTL8188E) -+ odm_set_mac_reg(dm, R_0x6d8, 0xc0, default_tx_ant); -+ else -+ odm_set_mac_reg(dm, R_0x6d8, 0x700, default_tx_ant); -+ -+} -+#endif -+void phydm_update_rx_idle_ant_pathb(void *dm_void, u8 ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u32 default_ant, optional_ant, value32, default_tx_ant; -+ -+ if (fat_tab->rx_idle_ant2 != ant) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-ant2 ] rx_idle_ant2 =%s\n", -+ (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ if (ant == MAIN_ANT) { -+ default_ant = ANT1_2G; -+ optional_ant = ANT2_2G; -+ } else { -+ default_ant = ANT2_2G; -+ optional_ant = ANT1_2G; -+ } -+ -+ if (fat_tab->b_fix_tx_ant != NO_FIX_TX_ANT) -+ default_tx_ant = (fat_tab->b_fix_tx_ant == -+ FIX_TX_AT_MAIN) ? 0 : 1; -+ else -+ default_tx_ant = default_ant; -+ if (dm->support_ic_type & ODM_RTL8822B) { -+ u16 v16 = odm_read_2byte(dm, ODM_REG_ANT_11AC_B + 2); -+ -+ v16 &= ~(0xff8);/*0xE08[11:3]*/ -+ v16 |= ((u16)default_ant << 3); -+ v16 |= ((u16)optional_ant << 6); -+ v16 |= ((u16)default_tx_ant << 9); -+ odm_write_2byte(dm, ODM_REG_ANT_11AC_B + 2, v16); -+ odm_set_mac_reg(dm, R_0x6d8, 0x38, default_tx_ant); -+ /*PathB Resp Tx*/ -+ } -+ } else { -+ /* fat_tab->rx_idle_ant2 == ant */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Stay Ori Ant] rx_idle_ant2 = %s\n", -+ (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ fat_tab->rx_idle_ant2 = ant; -+ } -+} -+ -+void phydm_set_antdiv_val(void *dm_void, u32 *val_buf, u8 val_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ability & ODM_BB_ANT_DIV)) -+ return; -+ -+ if (val_len != 1) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[Error][antdiv]Need val_len=1\n"); -+ return; -+ } -+ -+ odm_update_rx_idle_ant(dm, (u8)(*val_buf)); -+} -+ -+void odm_update_tx_ant(void *dm_void, u8 ant, u32 mac_id) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u8 tx_ant; -+ -+ if (fat_tab->b_fix_tx_ant != NO_FIX_TX_ANT) -+ ant = (fat_tab->b_fix_tx_ant == FIX_TX_AT_MAIN) ? -+ MAIN_ANT : AUX_ANT; -+ -+ if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) -+ tx_ant = ant; -+ else { -+ if (ant == MAIN_ANT) -+ tx_ant = ANT1_2G; -+ else -+ tx_ant = ANT2_2G; -+ } -+#if (RTL8721D_SUPPORT) -+ if (dm->antdiv_gpio != ANTDIV_GPIO_PB1PB2PB26) { -+ if (ant == MAIN_ANT) -+ tx_ant = ANT1_2G; -+ else -+ tx_ant = ANT2_2G; -+ } -+ else -+ tx_ant = fat_tab->ant_idx_vec[0]-1; -+#endif -+ fat_tab->antsel_a[mac_id] = tx_ant & BIT(0); -+ fat_tab->antsel_b[mac_id] = (tx_ant & BIT(1)) >> 1; -+ fat_tab->antsel_c[mac_id] = (tx_ant & BIT(2)) >> 2; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Set TX-DESC value]: mac_id:(( %d )), tx_ant = (( %s ))\n", -+ mac_id, (ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+#if 0 -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "antsel_tr_mux=(( 3'b%d%d%d ))\n", -+ fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], -+ fat_tab->antsel_a[mac_id]); -+#endif -+} -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+void odm_bdc_init( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "\n[ BDC Initialization......]\n"); -+ dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; -+ dm_bdc_table->bdc_mode = BDC_MODE_NULL; -+ dm_bdc_table->bdc_try_flag = 0; -+ dm_bdc_table->bd_ccoex_type_wbfer = 0; -+ dm->bdc_holdstate = 0xff; -+ -+ if (dm->support_ic_type == ODM_RTL8192E) { -+ odm_set_bb_reg(dm, R_0xd7c, 0x0FFFFFFF, 0x1081008); -+ odm_set_bb_reg(dm, R_0xd80, 0x0FFFFFFF, 0); -+ } else if (dm->support_ic_type == ODM_RTL8812) { -+ odm_set_bb_reg(dm, R_0x9b0, 0x0FFFFFFF, 0x1081008); -+ /* @0x9b0[30:0] = 01081008 */ -+ odm_set_bb_reg(dm, R_0x9b4, 0x0FFFFFFF, 0); -+ /* @0x9b4[31:0] = 00000000 */ -+ } -+} -+ -+void odm_CSI_on_off( -+ void *dm_void, -+ u8 CSI_en) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ if (CSI_en == CSI_ON) { -+ if (dm->support_ic_type == ODM_RTL8192E) -+ odm_set_mac_reg(dm, R_0xd84, BIT(11), 1); -+ /* @0xd84[11]=1 */ -+ else if (dm->support_ic_type == ODM_RTL8812) -+ odm_set_mac_reg(dm, R_0x9b0, BIT(31), 1); -+ /* @0x9b0[31]=1 */ -+ -+ } else if (CSI_en == CSI_OFF) { -+ if (dm->support_ic_type == ODM_RTL8192E) -+ odm_set_mac_reg(dm, R_0xd84, BIT(11), 0); -+ /* @0xd84[11]=0 */ -+ else if (dm->support_ic_type == ODM_RTL8812) -+ odm_set_mac_reg(dm, R_0x9b0, BIT(31), 0); -+ /* @0x9b0[31]=0 */ -+ } -+} -+ -+void odm_bd_ccoex_type_with_bfer_client( -+ void *dm_void, -+ u8 swch) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; -+ u8 bd_ccoex_type_wbfer; -+ -+ if (swch == DIVON_CSIOFF) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[BDCcoexType: 1] {DIV,CSI} ={1,0}\n"); -+ bd_ccoex_type_wbfer = 1; -+ -+ if (bd_ccoex_type_wbfer != dm_bdc_table->bd_ccoex_type_wbfer) { -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); -+ odm_CSI_on_off(dm, CSI_OFF); -+ dm_bdc_table->bd_ccoex_type_wbfer = 1; -+ } -+ } else if (swch == DIVOFF_CSION) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[BDCcoexType: 2] {DIV,CSI} ={0,1}\n"); -+ bd_ccoex_type_wbfer = 2; -+ -+ if (bd_ccoex_type_wbfer != dm_bdc_table->bd_ccoex_type_wbfer) { -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ odm_CSI_on_off(dm, CSI_ON); -+ dm_bdc_table->bd_ccoex_type_wbfer = 2; -+ } -+ } -+} -+ -+void odm_bf_ant_div_mode_arbitration( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; -+ u8 current_bdc_mode; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ PHYDM_DBG(dm, DBG_ANT_DIV, "\n"); -+ -+ /* @2 mode 1 */ -+ if (dm_bdc_table->num_txbfee_client != 0 && -+ dm_bdc_table->num_txbfer_client == 0) { -+ current_bdc_mode = BDC_MODE_1; -+ -+ if (current_bdc_mode != dm_bdc_table->bdc_mode) { -+ dm_bdc_table->bdc_mode = BDC_MODE_1; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); -+ dm_bdc_table->bdc_rx_idle_update_counter = 1; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode1 ))\n"); -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Antdiv + BF coextance mode] : (( Mode1 ))\n"); -+ } -+ /* @2 mode 2 */ -+ else if ((dm_bdc_table->num_txbfee_client == 0) && -+ (dm_bdc_table->num_txbfer_client != 0)) { -+ current_bdc_mode = BDC_MODE_2; -+ -+ if (current_bdc_mode != dm_bdc_table->bdc_mode) { -+ dm_bdc_table->bdc_mode = BDC_MODE_2; -+ dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; -+ dm_bdc_table->bdc_try_flag = 0; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode2 ))\n"); -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Antdiv + BF coextance mode] : (( Mode2 ))\n"); -+ } -+ /* @2 mode 3 */ -+ else if ((dm_bdc_table->num_txbfee_client != 0) && -+ (dm_bdc_table->num_txbfer_client != 0)) { -+ current_bdc_mode = BDC_MODE_3; -+ -+ if (current_bdc_mode != dm_bdc_table->bdc_mode) { -+ dm_bdc_table->bdc_mode = BDC_MODE_3; -+ dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; -+ dm_bdc_table->bdc_try_flag = 0; -+ dm_bdc_table->bdc_rx_idle_update_counter = 1; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode3 ))\n"); -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Antdiv + BF coextance mode] : (( Mode3 ))\n"); -+ } -+ /* @2 mode 4 */ -+ else if ((dm_bdc_table->num_txbfee_client == 0) && -+ (dm_bdc_table->num_txbfer_client == 0)) { -+ current_bdc_mode = BDC_MODE_4; -+ -+ if (current_bdc_mode != dm_bdc_table->bdc_mode) { -+ dm_bdc_table->bdc_mode = BDC_MODE_4; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Change to (( Mode4 ))\n"); -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Antdiv + BF coextance mode] : (( Mode4 ))\n"); -+ } -+#endif -+} -+ -+void odm_div_train_state_setting( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "\n*****[S T A R T ]***** [2-0. DIV_TRAIN_STATE]\n"); -+ dm_bdc_table->bdc_try_counter = 2; -+ dm_bdc_table->bdc_try_flag = 1; -+ dm_bdc_table->BDC_state = bdc_bfer_train_state; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); -+} -+ -+void odm_bd_ccoex_bfee_rx_div_arbitration( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; -+ boolean stop_bf_flag; -+ u8 bdc_active_mode; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***{ num_BFee, num_BFer, num_client} = (( %d , %d , %d))\n", -+ dm_bdc_table->num_txbfee_client, -+ dm_bdc_table->num_txbfer_client, dm_bdc_table->num_client); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***{ num_BF_tars, num_DIV_tars } = (( %d , %d ))\n", -+ dm_bdc_table->num_bf_tar, dm_bdc_table->num_div_tar); -+ -+ /* @2 [ MIB control ] */ -+ if (dm->bdc_holdstate == 2) { -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); -+ dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Force in [ BF STATE]\n"); -+ return; -+ } else if (dm->bdc_holdstate == 1) { -+ dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Force in [ DIV STATE]\n"); -+ return; -+ } -+ -+ /* @------------------------------------------------------------ */ -+ -+ /* @2 mode 2 & 3 */ -+ if (dm_bdc_table->bdc_mode == BDC_MODE_2 || -+ dm_bdc_table->bdc_mode == BDC_MODE_3) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "\n{ Try_flag, Try_counter } = { %d , %d }\n", -+ dm_bdc_table->bdc_try_flag, -+ dm_bdc_table->bdc_try_counter); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "BDCcoexType = (( %d ))\n\n", -+ dm_bdc_table->bd_ccoex_type_wbfer); -+ -+ /* @All Client have Bfer-Cap------------------------------- */ -+ if (dm_bdc_table->num_txbfer_client == dm_bdc_table->num_client) { -+ /* @BFer STA Only?: yes */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "BFer STA only? (( Yes ))\n"); -+ dm_bdc_table->bdc_try_flag = 0; -+ dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); -+ return; -+ } else -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "BFer STA only? (( No ))\n"); -+ if (dm_bdc_table->is_all_bf_sta_idle == false && dm_bdc_table->is_all_div_sta_idle == true) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "All DIV-STA are idle, but BF-STA not\n"); -+ dm_bdc_table->bdc_try_flag = 0; -+ dm_bdc_table->BDC_state = bdc_bfer_train_state; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); -+ return; -+ } else if (dm_bdc_table->is_all_bf_sta_idle == true && dm_bdc_table->is_all_div_sta_idle == false) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "All BF-STA are idle, but DIV-STA not\n"); -+ dm_bdc_table->bdc_try_flag = 0; -+ dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); -+ return; -+ } -+ -+ /* Select active mode-------------------------------------- */ -+ if (dm_bdc_table->num_bf_tar == 0) { /* Selsect_1, Selsect_2 */ -+ if (dm_bdc_table->num_div_tar == 0) { /* Selsect_3 */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Select active mode (( 1 ))\n"); -+ dm_bdc_table->bdc_active_mode = 1; -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Select active mode (( 2 ))\n"); -+ dm_bdc_table->bdc_active_mode = 2; -+ } -+ dm_bdc_table->bdc_try_flag = 0; -+ dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); -+ return; -+ } else { /* num_bf_tar > 0 */ -+ if (dm_bdc_table->num_div_tar == 0) { /* Selsect_3 */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Select active mode (( 3 ))\n"); -+ dm_bdc_table->bdc_active_mode = 3; -+ dm_bdc_table->bdc_try_flag = 0; -+ dm_bdc_table->BDC_state = bdc_bfer_train_state; -+ odm_bd_ccoex_type_with_bfer_client(dm, -+ DIVOFF_CSION) -+ ; -+ return; -+ } else { /* Selsect_4 */ -+ bdc_active_mode = 4; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Select active mode (( 4 ))\n"); -+ -+ if (bdc_active_mode != dm_bdc_table->bdc_active_mode) { -+ dm_bdc_table->bdc_active_mode = 4; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Change to active mode (( 4 )) & return!!!\n"); -+ return; -+ } -+ } -+ } -+ -+#if 1 -+ if (dm->bdc_holdstate == 0xff) { -+ dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Force in [ DIV STATE]\n"); -+ return; -+ } -+#endif -+ -+ /* @Does Client number changed ? ------------------------------- */ -+ if (dm_bdc_table->num_client != dm_bdc_table->pre_num_client) { -+ dm_bdc_table->bdc_try_flag = 0; -+ dm_bdc_table->BDC_state = BDC_DIV_TRAIN_STATE; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ The number of client has been changed !!!] return to (( BDC_DIV_TRAIN_STATE ))\n"); -+ } -+ dm_bdc_table->pre_num_client = dm_bdc_table->num_client; -+ -+ if (dm_bdc_table->bdc_try_flag == 0) { -+ /* @2 DIV_TRAIN_STATE (mode 2-0) */ -+ if (dm_bdc_table->BDC_state == BDC_DIV_TRAIN_STATE) -+ odm_div_train_state_setting(dm); -+ /* @2 BFer_TRAIN_STATE (mode 2-1) */ -+ else if (dm_bdc_table->BDC_state == bdc_bfer_train_state) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*****[2-1. BFer_TRAIN_STATE ]*****\n"); -+ -+#if 0 -+ /* @if(dm_bdc_table->num_bf_tar==0) */ -+ /* @{ */ -+ /* PHYDM_DBG(dm,DBG_ANT_DIV, "BF_tars exist? : (( No )), [ bdc_bfer_train_state ] >> [BDC_DIV_TRAIN_STATE]\n"); */ -+ /* odm_div_train_state_setting( dm); */ -+ /* @} */ -+ /* else */ /* num_bf_tar != 0 */ -+ /* @{ */ -+#endif -+ dm_bdc_table->bdc_try_counter = 2; -+ dm_bdc_table->bdc_try_flag = 1; -+ dm_bdc_table->BDC_state = BDC_DECISION_STATE; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "BF_tars exist? : (( Yes )), [ bdc_bfer_train_state ] >> [BDC_DECISION_STATE]\n"); -+ /* @} */ -+ } -+ /* @2 DECISION_STATE (mode 2-2) */ -+ else if (dm_bdc_table->BDC_state == BDC_DECISION_STATE) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*****[2-2. DECISION_STATE]*****\n"); -+#if 0 -+ /* @if(dm_bdc_table->num_bf_tar==0) */ -+ /* @{ */ -+ /* ODM_AntDiv_Printk(("BF_tars exist? : (( No )), [ DECISION_STATE ] >> [BDC_DIV_TRAIN_STATE]\n")); */ -+ /* odm_div_train_state_setting( dm); */ -+ /* @} */ -+ /* else */ /* num_bf_tar != 0 */ -+ /* @{ */ -+#endif -+ if (dm_bdc_table->BF_pass == false || dm_bdc_table->DIV_pass == false) -+ stop_bf_flag = true; -+ else -+ stop_bf_flag = false; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "BF_tars exist? : (( Yes )), {BF_pass, DIV_pass, stop_bf_flag } = { %d, %d, %d }\n", -+ dm_bdc_table->BF_pass, -+ dm_bdc_table->DIV_pass, stop_bf_flag); -+ -+ if (stop_bf_flag == true) { /* @DIV_en */ -+ dm_bdc_table->bdc_hold_counter = 10; /* @20 */ -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); -+ dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ stop_bf_flag= ((true)), BDC_DECISION_STATE ] >> [BDC_DIV_HOLD_STATE]\n"); -+ } else { /* @BF_en */ -+ dm_bdc_table->bdc_hold_counter = 10; /* @20 */ -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); -+ dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[stop_bf_flag= ((false)), BDC_DECISION_STATE ] >> [BDC_BF_HOLD_STATE]\n"); -+ } -+ /* @} */ -+ } -+ /* @2 BF-HOLD_STATE (mode 2-3) */ -+ else if (dm_bdc_table->BDC_state == BDC_BF_HOLD_STATE) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*****[2-3. BF_HOLD_STATE ]*****\n"); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "bdc_hold_counter = (( %d ))\n", -+ dm_bdc_table->bdc_hold_counter); -+ -+ if (dm_bdc_table->bdc_hold_counter == 1) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n"); -+ odm_div_train_state_setting(dm); -+ } else { -+ dm_bdc_table->bdc_hold_counter--; -+ -+#if 0 -+ /* @if(dm_bdc_table->num_bf_tar==0) */ -+ /* @{ */ -+ /* PHYDM_DBG(dm,DBG_ANT_DIV, "BF_tars exist? : (( No )), [ BDC_BF_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n"); */ -+ /* odm_div_train_state_setting( dm); */ -+ /* @} */ -+ /* else */ /* num_bf_tar != 0 */ -+ /* @{ */ -+ /* PHYDM_DBG(dm,DBG_ANT_DIV, "BF_tars exist? : (( Yes ))\n"); */ -+#endif -+ dm_bdc_table->BDC_state = BDC_BF_HOLD_STATE; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVOFF_CSION); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_BF_HOLD_STATE ] >> [BDC_BF_HOLD_STATE]\n"); -+ /* @} */ -+ } -+ } -+ /* @2 DIV-HOLD_STATE (mode 2-4) */ -+ else if (dm_bdc_table->BDC_state == BDC_DIV_HOLD_STATE) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*****[2-4. DIV_HOLD_STATE ]*****\n"); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "bdc_hold_counter = (( %d ))\n", -+ dm_bdc_table->bdc_hold_counter); -+ -+ if (dm_bdc_table->bdc_hold_counter == 1) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_TRAIN_STATE]\n"); -+ odm_div_train_state_setting(dm); -+ } else { -+ dm_bdc_table->bdc_hold_counter--; -+ dm_bdc_table->BDC_state = BDC_DIV_HOLD_STATE; -+ odm_bd_ccoex_type_with_bfer_client(dm, DIVON_CSIOFF); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ BDC_DIV_HOLD_STATE ] >> [BDC_DIV_HOLD_STATE]\n"); -+ } -+ } -+ -+ } else if (dm_bdc_table->bdc_try_flag == 1) { -+ /* @2 Set Training counter */ -+ if (dm_bdc_table->bdc_try_counter > 1) { -+ dm_bdc_table->bdc_try_counter--; -+ if (dm_bdc_table->bdc_try_counter == 1) -+ dm_bdc_table->bdc_try_flag = 0; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Training !!\n"); -+ /* return ; */ -+ } -+ } -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "\n[end]\n"); -+ -+#endif /* @#if(DM_ODM_SUPPORT_TYPE == ODM_AP) */ -+} -+ -+#endif -+#endif /* @#ifdef PHYDM_BEAMFORMING_SUPPORT*/ -+ -+#if (RTL8188E_SUPPORT == 1) -+ -+void odm_rx_hw_ant_div_init_88e(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 value32; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* @MAC setting */ -+ value32 = odm_get_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD); -+ odm_set_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD, -+ value32 | (BIT(23) | BIT(25))); -+ /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ -+ /* Pin Settings */ -+ odm_set_bb_reg(dm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0); -+ /* reg870[8]=1'b0, reg870[9]=1'b0 */ -+ /* antsel antselb by HW */ -+ odm_set_bb_reg(dm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); -+ /* reg864[10]=1'b0 */ /* antsel2 by HW */ -+ odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(22), 1); -+ /* regb2c[22]=1'b0 */ /* disable CS/CG switch */ -+ odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); -+ /* regb2c[31]=1'b1 */ /* output at CG only */ -+ /* OFDM Settings */ -+ odm_set_bb_reg(dm, ODM_REG_ANTDIV_PARA1_11N, MASKDWORD, 0x000000a0); -+ /* @CCK Settings */ -+ odm_set_bb_reg(dm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); -+ /* @Fix CCK PHY status report issue */ -+ odm_set_bb_reg(dm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); -+ /* @CCK complete HW AntDiv within 64 samples */ -+ -+ odm_set_bb_reg(dm, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0001); -+ /* @antenna mapping table */ -+ -+ fat_tab->enable_ctrl_frame_antdiv = 1; -+} -+ -+void odm_trx_hw_ant_div_init_88e(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 value32; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* @MAC setting */ -+ value32 = odm_get_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD); -+ odm_set_mac_reg(dm, ODM_REG_ANTSEL_PIN_11N, MASKDWORD, -+ value32 | (BIT(23) | BIT(25))); -+ /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ -+ /* Pin Settings */ -+ odm_set_bb_reg(dm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0); -+ /* reg870[8]=1'b0, reg870[9]=1'b0 */ -+ /* antsel antselb by HW */ -+ odm_set_bb_reg(dm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); -+ /* reg864[10]=1'b0 */ /* antsel2 by HW */ -+ odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(22), 0); -+ /* regb2c[22]=1'b0 */ /* disable CS/CG switch */ -+ odm_set_bb_reg(dm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); -+ /* regb2c[31]=1'b1 */ /* output at CG only */ -+ /* OFDM Settings */ -+ odm_set_bb_reg(dm, ODM_REG_ANTDIV_PARA1_11N, MASKDWORD, 0x000000a0); -+ /* @CCK Settings */ -+ odm_set_bb_reg(dm, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); -+ /* @Fix CCK PHY status report issue */ -+ odm_set_bb_reg(dm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); -+ /* @CCK complete HW AntDiv within 64 samples */ -+ -+ /* @antenna mapping table */ -+ if (!dm->is_mp_chip) { /* testchip */ -+ odm_set_bb_reg(dm, ODM_REG_RX_DEFAULT_A_11N, 0x700, 1); -+ /* Reg858[10:8]=3'b001 */ -+ odm_set_bb_reg(dm, ODM_REG_RX_DEFAULT_A_11N, 0x3800, 2); -+ /* Reg858[13:11]=3'b010 */ -+ } else /* @MPchip */ -+ odm_set_bb_reg(dm, ODM_REG_ANT_MAPPING1_11N, MASKDWORD, 0x0201); -+ /*Reg914=3'b010, Reg915=3'b001*/ -+ -+ fat_tab->enable_ctrl_frame_antdiv = 1; -+} -+ -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+void odm_smart_hw_ant_div_init_88e( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 value32, i; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***8188E AntDiv_Init => ant_div_type=[CG_TRX_SMART_ANTDIV]\n"); -+ -+#if 0 -+ if (*dm->mp_mode == true) { -+ PHYDM_DBG(dm, ODM_COMP_INIT, "dm->ant_div_type: %d\n", -+ dm->ant_div_type); -+ return; -+ } -+#endif -+ -+ fat_tab->train_idx = 0; -+ fat_tab->fat_state = FAT_PREPARE_STATE; -+ -+ dm->fat_comb_a = 5; -+ dm->antdiv_intvl = 0x64; /* @100ms */ -+ -+ for (i = 0; i < 6; i++) -+ fat_tab->bssid[i] = 0; -+ for (i = 0; i < (dm->fat_comb_a); i++) { -+ fat_tab->ant_sum_rssi[i] = 0; -+ fat_tab->ant_rssi_cnt[i] = 0; -+ fat_tab->ant_ave_rssi[i] = 0; -+ } -+ -+ /* @MAC setting */ -+ value32 = odm_get_mac_reg(dm, R_0x4c, MASKDWORD); -+ odm_set_mac_reg(dm, R_0x4c, MASKDWORD, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ -+ value32 = odm_get_mac_reg(dm, R_0x7b4, MASKDWORD); -+ odm_set_mac_reg(dm, R_0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17))); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */ -+ /* value32 = platform_efio_read_4byte(adapter, 0x7B4); */ -+ /* platform_efio_write_4byte(adapter, 0x7b4, value32|BIT(18)); */ /* append MACID in reponse packet */ -+ -+ /* @Match MAC ADDR */ -+ odm_set_mac_reg(dm, R_0x7b4, 0xFFFF, 0); -+ odm_set_mac_reg(dm, R_0x7b0, MASKDWORD, 0); -+ -+ odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); /* reg870[8]=1'b0, reg870[9]=1'b0 */ /* antsel antselb by HW */ -+ odm_set_bb_reg(dm, R_0x864, BIT(10), 0); /* reg864[10]=1'b0 */ /* antsel2 by HW */ -+ odm_set_bb_reg(dm, R_0xb2c, BIT(22), 0); /* regb2c[22]=1'b0 */ /* disable CS/CG switch */ -+ odm_set_bb_reg(dm, R_0xb2c, BIT(31), 0); /* regb2c[31]=1'b1 */ /* output at CS only */ -+ odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x000000a0); -+ -+ /* @antenna mapping table */ -+ if (dm->fat_comb_a == 2) { -+ if (!dm->is_mp_chip) { /* testchip */ -+ odm_set_bb_reg(dm, R_0x858, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */ -+ odm_set_bb_reg(dm, R_0x858, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */ -+ } else { /* @MPchip */ -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 1); -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 2); -+ } -+ } else { -+ if (!dm->is_mp_chip) { /* testchip */ -+ odm_set_bb_reg(dm, R_0x858, BIT(10) | BIT(9) | BIT(8), 0); /* Reg858[10:8]=3'b000 */ -+ odm_set_bb_reg(dm, R_0x858, BIT(13) | BIT(12) | BIT(11), 1); /* Reg858[13:11]=3'b001 */ -+ odm_set_bb_reg(dm, R_0x878, BIT(16), 0); -+ odm_set_bb_reg(dm, R_0x858, BIT(15) | BIT(14), 2); /* @(Reg878[0],Reg858[14:15])=3'b010 */ -+ odm_set_bb_reg(dm, R_0x878, BIT(19) | BIT(18) | BIT(17), 3); /* Reg878[3:1]=3b'011 */ -+ odm_set_bb_reg(dm, R_0x878, BIT(22) | BIT(21) | BIT(20), 4); /* Reg878[6:4]=3b'100 */ -+ odm_set_bb_reg(dm, R_0x878, BIT(25) | BIT(24) | BIT(23), 5); /* Reg878[9:7]=3b'101 */ -+ odm_set_bb_reg(dm, R_0x878, BIT(28) | BIT(27) | BIT(26), 6); /* Reg878[12:10]=3b'110 */ -+ odm_set_bb_reg(dm, R_0x878, BIT(31) | BIT(30) | BIT(29), 7); /* Reg878[15:13]=3b'111 */ -+ } else { /* @MPchip */ -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 4); /* @0: 3b'000 */ -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 2); /* @1: 3b'001 */ -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE2, 0); /* @2: 3b'010 */ -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE3, 1); /* @3: 3b'011 */ -+ odm_set_bb_reg(dm, R_0x918, MASKBYTE0, 3); /* @4: 3b'100 */ -+ odm_set_bb_reg(dm, R_0x918, MASKBYTE1, 5); /* @5: 3b'101 */ -+ odm_set_bb_reg(dm, R_0x918, MASKBYTE2, 6); /* @6: 3b'110 */ -+ odm_set_bb_reg(dm, R_0x918, MASKBYTE3, 255); /* @7: 3b'111 */ -+ } -+ } -+ -+ /* @Default ant setting when no fast training */ -+ odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), 0); /* @Default RX */ -+ odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), 1); /* Optional RX */ -+ odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), 0); /* @Default TX */ -+ -+ /* @Enter Traing state */ -+ odm_set_bb_reg(dm, R_0x864, BIT(2) | BIT(1) | BIT(0), (dm->fat_comb_a - 1)); /* reg864[2:0]=3'd6 */ /* ant combination=reg864[2:0]+1 */ -+ -+#if 0 -+ /* SW Control */ -+ /* phy_set_bb_reg(adapter, 0x864, BIT10, 1); */ -+ /* phy_set_bb_reg(adapter, 0x870, BIT9, 1); */ -+ /* phy_set_bb_reg(adapter, 0x870, BIT8, 1); */ -+ /* phy_set_bb_reg(adapter, 0x864, BIT11, 1); */ -+ /* phy_set_bb_reg(adapter, 0x860, BIT9, 0); */ -+ /* phy_set_bb_reg(adapter, 0x860, BIT8, 0); */ -+#endif -+} -+#endif -+ -+#endif /* @#if (RTL8188E_SUPPORT == 1) */ -+ -+#if (RTL8192E_SUPPORT == 1) -+void odm_rx_hw_ant_div_init_92e(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+#if 0 -+ if (*dm->mp_mode == true) { -+ odm_ant_div_on_off(dm, ANTDIV_OFF); -+ odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); -+ /* r_rxdiv_enable_anta regc50[8]=1'b0 0: control by c50[9] */ -+ odm_set_bb_reg(dm, R_0xc50, BIT(9), 1); -+ /* @1:CG, 0:CS */ -+ return; -+ } -+#endif -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* Pin Settings */ -+ odm_set_bb_reg(dm, R_0x870, BIT(8), 0); -+ /* reg870[8]=1'b0, antsel is controled by HWs */ -+ odm_set_bb_reg(dm, R_0xc50, BIT(8), 1); -+ /* regc50[8]=1'b1 CS/CG switching is controled by HWs*/ -+ -+ /* @Mapping table */ -+ odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100); -+ /* @antenna mapping table */ -+ -+ /* OFDM Settings */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */ -+ -+ /* @CCK Settings */ -+ odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); -+ /* Select which path to receive for CCK_1 & CCK_2 */ -+ odm_set_bb_reg(dm, R_0xb34, BIT(30), 0); -+ /* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* @Fix CCK PHY status report issue */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); -+ /* @CCK complete HW AntDiv within 64 samples */ -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ phydm_evm_sw_antdiv_init(dm); -+#endif -+} -+ -+void odm_trx_hw_ant_div_init_92e(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if 0 -+ if (*dm->mp_mode == true) { -+ odm_ant_div_on_off(dm, ANTDIV_OFF); -+ odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); /* r_rxdiv_enable_anta regc50[8]=1'b0 0: control by c50[9] */ -+ odm_set_bb_reg(dm, R_0xc50, BIT(9), 1); /* @1:CG, 0:CS */ -+ return; -+ } -+#endif -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* @3 --RFE pin setting--------- */ -+ /* @[MAC] */ -+ odm_set_mac_reg(dm, R_0x38, BIT(11), 1); -+ /* @DBG PAD Driving control (GPIO 8) */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); /* path-A, RFE_CTRL_3 */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(29), 1); /* path-A, RFE_CTRL_8 */ -+ /* @[BB] */ -+ odm_set_bb_reg(dm, R_0x944, BIT(3), 1); /* RFE_buffer */ -+ odm_set_bb_reg(dm, R_0x944, BIT(8), 1); -+ odm_set_bb_reg(dm, R_0x940, BIT(7) | BIT(6), 0x0); -+ /* r_rfe_path_sel_ (RFE_CTRL_3) */ -+ odm_set_bb_reg(dm, R_0x940, BIT(17) | BIT(16), 0x0); -+ /* r_rfe_path_sel_ (RFE_CTRL_8) */ -+ odm_set_bb_reg(dm, R_0x944, BIT(31), 0); /* RFE_buffer */ -+ odm_set_bb_reg(dm, R_0x92c, BIT(3), 0); /* rfe_inv (RFE_CTRL_3) */ -+ odm_set_bb_reg(dm, R_0x92c, BIT(8), 1); /* rfe_inv (RFE_CTRL_8) */ -+ odm_set_bb_reg(dm, R_0x930, 0xF000, 0x8); /* path-A, RFE_CTRL_3 */ -+ odm_set_bb_reg(dm, R_0x934, 0xF, 0x8); /* path-A, RFE_CTRL_8 */ -+ /* @3 ------------------------- */ -+ -+ /* Pin Settings */ -+ odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); -+ /* path-A */ /* disable CS/CG switch */ -+ -+#if 0 -+ /* @Let it follows PHY_REG for bit9 setting */ -+ if (dm->priv->pshare->rf_ft_var.use_ext_pa || -+ dm->priv->pshare->rf_ft_var.use_ext_lna) -+ odm_set_bb_reg(dm, R_0xc50, BIT(9), 1);/* path-A output at CS */ -+ else -+ odm_set_bb_reg(dm, R_0xc50, BIT(9), 0); -+ /* path-A output at CG ->normal power */ -+#endif -+ -+ odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); -+ /* path-A*/ /* antsel antselb by HW */ -+ odm_set_bb_reg(dm, R_0xb38, BIT(10), 0);/* path-A*/ /* antsel2 by HW */ -+ -+ /* @Mapping table */ -+ odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100); -+ /* @antenna mapping table */ -+ -+ /* OFDM Settings */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */ -+ -+ /* @CCK Settings */ -+ odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); -+ /* Select which path to receive for CCK_1 & CCK_2 */ -+ odm_set_bb_reg(dm, R_0xb34, BIT(30), 0); -+ /* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* @Fix CCK PHY status report issue */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); -+ /* @CCK complete HW AntDiv within 64 samples */ -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ phydm_evm_sw_antdiv_init(dm); -+#endif -+} -+ -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+void odm_smart_hw_ant_div_init_92e( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***8192E AntDiv_Init => ant_div_type=[CG_TRX_SMART_ANTDIV]\n"); -+} -+#endif -+ -+#endif /* @#if (RTL8192E_SUPPORT == 1) */ -+ -+#if (RTL8192F_SUPPORT == 1) -+void odm_rx_hw_ant_div_init_92f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* Pin Settings */ -+ odm_set_bb_reg(dm, R_0x870, BIT(8), 0); -+ /* reg870[8]=1'b0, "antsel" is controlled by HWs */ -+ odm_set_bb_reg(dm, R_0xc50, BIT(8), 1); -+ /* regc50[8]=1'b1, " CS/CG switching" is controlled by HWs */ -+ -+ /* @Mapping table */ -+ odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100); -+ /* @antenna mapping table */ -+ -+ /* OFDM Settings */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */ -+ -+ /* @CCK Settings */ -+ odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); -+ /* Select which path to receive for CCK_1 & CCK_2 */ -+ odm_set_bb_reg(dm, R_0xb34, BIT(30), 0); -+ /* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* @Fix CCK PHY status report issue */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); -+ /* @CCK complete HW AntDiv within 64 samples */ -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ phydm_evm_sw_antdiv_init(dm); -+#endif -+} -+ -+void odm_trx_hw_ant_div_init_92f(void *dm_void) -+ -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ /* @3 --RFE pin setting--------- */ -+ /* @[MAC] */ -+ odm_set_mac_reg(dm, R_0x1048, BIT(0), 1); -+ /* @DBG PAD Driving control (gpioA_0) */ -+ odm_set_mac_reg(dm, R_0x1048, BIT(1), 1); -+ /* @DBG PAD Driving control (gpioA_1) */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); -+ odm_set_mac_reg(dm, R_0x1038, BIT(25) | BIT(24) | BIT(23), 0); -+ /* @gpioA_0,gpioA_1*/ -+ odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); -+ /* @[BB] */ -+ odm_set_bb_reg(dm, R_0x944, BIT(8), 1); /* output enable */ -+ odm_set_bb_reg(dm, R_0x944, BIT(9), 1); -+ odm_set_bb_reg(dm, R_0x940, BIT(16) | BIT(17), 0x0); -+ /* r_rfe_path_sel_ (RFE_CTRL_8) */ -+ odm_set_bb_reg(dm, R_0x940, BIT(18) | BIT(19), 0x0); -+ /* r_rfe_path_sel_ (RFE_CTRL_9) */ -+ odm_set_bb_reg(dm, R_0x944, BIT(31), 0); /* RFE_buffer_en */ -+ odm_set_bb_reg(dm, R_0x92c, BIT(8), 0); /* rfe_inv (RFE_CTRL_8) */ -+ odm_set_bb_reg(dm, R_0x92c, BIT(9), 1); /* rfe_inv (RFE_CTRL_9) */ -+ odm_set_bb_reg(dm, R_0x934, 0xF, 0x8); /* path-A, RFE_CTRL_8 */ -+ odm_set_bb_reg(dm, R_0x934, 0xF0, 0x8); /* path-A, RFE_CTRL_9 */ -+ /* @3 ------------------------- */ -+ -+ /* Pin Settings */ -+ odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); -+ /* path-A,disable CS/CG switch */ -+ odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); -+ /* path-A*, antsel antselb by HW */ -+ odm_set_bb_reg(dm, R_0xb38, BIT(10), 0); /* path-A ,antsel2 by HW */ -+ -+ /* @Mapping table */ -+ odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100); -+ /* @antenna mapping table */ -+ -+ /* OFDM Settings */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */ -+ -+ /* @CCK Settings */ -+ odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); -+ /* Select which path to receive for CCK_1 & CCK_2 */ -+ odm_set_bb_reg(dm, R_0xb34, BIT(30), 0); -+ /* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* @Fix CCK PHY status report issue */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); -+ /* @CCK complete HW AntDiv within 64 samples */ -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ phydm_evm_sw_antdiv_init(dm); -+#endif -+} -+ -+#endif /* @#if (RTL8192F_SUPPORT == 1) */ -+ -+#if (RTL8822B_SUPPORT == 1) -+void phydm_trx_hw_ant_div_init_22b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* Pin Settings */ -+ odm_set_bb_reg(dm, R_0xcb8, BIT(21) | BIT(20), 0x1); -+ odm_set_bb_reg(dm, R_0xcb8, BIT(23) | BIT(22), 0x1); -+ odm_set_bb_reg(dm, R_0xc1c, BIT(7) | BIT(6), 0x0); -+ /* @------------------------- */ -+ -+ /* @Mapping table */ -+ /* @antenna mapping table */ -+ odm_set_bb_reg(dm, R_0xca4, 0xFFFF, 0x0100); -+ -+ /* OFDM Settings */ -+ /* thershold */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); -+ /* @bias */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x0); -+ odm_set_bb_reg(dm, R_0x668, BIT(3), 0x1); -+ -+ /* @CCK Settings */ -+ /* Select which path to receive for CCK_1 & CCK_2 */ -+ odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); -+ /* @Fix CCK PHY status report issue */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* @CCK complete HW AntDiv within 64 samples */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); -+ /* @BT Coexistence */ -+ /* @keep antsel_map when GNT_BT = 1 */ -+ odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); -+ /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ -+ odm_set_bb_reg(dm, R_0x804, BIT(4), 1); -+ /* response TX ant by RX ant */ -+ odm_set_mac_reg(dm, R_0x668, BIT(3), 1); -+#if (defined(CONFIG_2T4R_ANTENNA)) -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***8822B AntDiv_Init => 2T4R case\n"); -+ /* Pin Settings */ -+ odm_set_bb_reg(dm, R_0xeb8, BIT(21) | BIT(20), 0x1); -+ odm_set_bb_reg(dm, R_0xeb8, BIT(23) | BIT(22), 0x1); -+ odm_set_bb_reg(dm, R_0xe1c, BIT(7) | BIT(6), 0x0); -+ /* @BT Coexistence */ -+ odm_set_bb_reg(dm, R_0xeac, BIT(9), 1); -+ /* @keep antsel_map when GNT_BT = 1 */ -+ /* Mapping table */ -+ /* antenna mapping table */ -+ odm_set_bb_reg(dm, R_0xea4, 0xFFFF, 0x0100); -+ /*odm_set_bb_reg(dm, R_0x900, 0x30000, 0x3);*/ -+#endif -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ phydm_evm_sw_antdiv_init(dm); -+#endif -+} -+#endif /* @#if (RTL8822B_SUPPORT == 1) */ -+ -+#if (RTL8197F_SUPPORT == 1) -+void phydm_rx_hw_ant_div_init_97f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+#if 0 -+ if (*dm->mp_mode == true) { -+ odm_ant_div_on_off(dm, ANTDIV_OFF); -+ odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); -+ /* r_rxdiv_enable_anta regc50[8]=1'b0 0: control by c50[9] */ -+ odm_set_bb_reg(dm, R_0xc50, BIT(9), 1); /* @1:CG, 0:CS */ -+ return; -+ } -+#endif -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* Pin Settings */ -+ odm_set_bb_reg(dm, R_0x870, BIT(8), 0); -+ /* reg870[8]=1'b0, */ /* "antsel" is controlled by HWs */ -+ odm_set_bb_reg(dm, R_0xc50, BIT(8), 1); -+ /* regc50[8]=1'b1 *//*"CS/CG switching" is controlled by HWs */ -+ -+ /* @Mapping table */ -+ odm_set_bb_reg(dm, R_0x914, 0xFFFF, 0x0100); -+ /* @antenna mapping table */ -+ -+ /* OFDM Settings */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x0); /* @bias */ -+ -+ /* @CCK Settings */ -+ odm_set_bb_reg(dm, R_0xa04, 0xF000000, 0); -+ /* Select which path to receive for CCK_1 & CCK_2 */ -+ odm_set_bb_reg(dm, R_0xb34, BIT(30), 0); -+ /* @(92E) ANTSEL_CCK_opt = r_en_antsel_cck? ANTSEL_CCK: 1'b0 */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* @Fix CCK PHY status report issue */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); -+ /* @CCK complete HW AntDiv within 64 samples */ -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ phydm_evm_sw_antdiv_init(dm); -+#endif -+} -+#endif //#if (RTL8197F_SUPPORT == 1) -+ -+#if (RTL8197G_SUPPORT == 1) -+void phydm_rx_hw_ant_div_init_97g(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* Pin Settings */ -+ odm_set_bb_reg(dm, R_0x1884, BIT(23), 0); -+ /* reg1844[23]=1'b0 *//*"CS/CG switching" is controlled by HWs*/ -+ odm_set_bb_reg(dm, R_0x1884, BIT(16), 1); -+ /* reg1844[16]=1'b1 *//*"antsel" is controlled by HWs*/ -+ -+ /* @Mapping table */ -+ odm_set_bb_reg(dm, R_0x1870, 0xFFFF, 0x0100); -+ /* @antenna mapping table */ -+ -+ /* OFDM Settings */ -+ odm_set_bb_reg(dm, R_0x1938, 0xFFE0, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0x1938, 0x7FF0000, 0x0); /* @bias */ -+ -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ phydm_evm_sw_antdiv_init(dm); -+#endif -+} -+#endif //#if (RTL8197F_SUPPORT == 1) -+ -+#if (RTL8723D_SUPPORT == 1) -+void odm_trx_hw_ant_div_init_8723d(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /*@BT Coexistence*/ -+ /*@keep antsel_map when GNT_BT = 1*/ -+ odm_set_bb_reg(dm, R_0x864, BIT(12), 1); -+ /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ -+ odm_set_bb_reg(dm, R_0x874, BIT(23), 0); -+ /* @Disable hw antsw & fast_train.antsw when BT TX/RX */ -+ odm_set_bb_reg(dm, R_0xe64, 0xFFFF0000, 0x000c); -+ -+ odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); -+#if 0 -+ /*PTA setting: WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL)*/ -+ /*odm_set_bb_reg(dm, R_0x948, BIT6, 0);*/ -+ /*odm_set_bb_reg(dm, R_0x948, BIT8, 0);*/ -+#endif -+ /*@GNT_WL tx*/ -+ odm_set_bb_reg(dm, R_0x950, BIT(29), 0); -+ -+ /*@Mapping Table*/ -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 3); -+#if 0 -+ /* odm_set_bb_reg(dm, R_0x864, BIT5|BIT4|BIT3, 0); */ -+ /* odm_set_bb_reg(dm, R_0x864, BIT8|BIT7|BIT6, 1); */ -+#endif -+ -+ /* Set WLBB_SEL_RF_ON 1 if RXFIR_PWDB > 0xCcc[3:0] */ -+ odm_set_bb_reg(dm, R_0xccc, BIT(12), 0); -+ /* @Low-to-High threshold for WLBB_SEL_RF_ON when OFDM enable */ -+ odm_set_bb_reg(dm, R_0xccc, 0x0F, 0x01); -+ /* @High-to-Low threshold for WLBB_SEL_RF_ON when OFDM enable */ -+ odm_set_bb_reg(dm, R_0xccc, 0xF0, 0x0); -+ /* @b Low-to-High threshold for WLBB_SEL_RF_ON when OFDM disable (CCK)*/ -+ odm_set_bb_reg(dm, R_0xabc, 0xFF, 0x06); -+ /* @High-to-Low threshold for WLBB_SEL_RF_ON when OFDM disable (CCK) */ -+ odm_set_bb_reg(dm, R_0xabc, 0xFF00, 0x00); -+ -+ /*OFDM HW AntDiv Parameters*/ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xa0); -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x00); -+ odm_set_bb_reg(dm, R_0xc5c, BIT(20) | BIT(19) | BIT(18), 0x04); -+ -+ /*@CCK HW AntDiv Parameters*/ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); -+ odm_set_bb_reg(dm, R_0xaa8, BIT(8), 0); -+ -+ odm_set_bb_reg(dm, R_0xa0c, 0x0F, 0xf); -+ odm_set_bb_reg(dm, R_0xa14, 0x1F, 0x8); -+ odm_set_bb_reg(dm, R_0xa10, BIT(13), 0x1); -+ odm_set_bb_reg(dm, R_0xa74, BIT(8), 0x0); -+ odm_set_bb_reg(dm, R_0xb34, BIT(30), 0x1); -+ -+ /*@disable antenna training */ -+ odm_set_bb_reg(dm, R_0xe08, BIT(16), 0); -+ odm_set_bb_reg(dm, R_0xc50, BIT(8), 0); -+} -+/*@Mingzhi 2017-05-08*/ -+ -+void odm_s0s1_sw_ant_div_init_8723d(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***8723D AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"); -+ -+ /*@keep antsel_map when GNT_BT = 1*/ -+ odm_set_bb_reg(dm, R_0x864, BIT(12), 1); -+ -+ /* @Disable antsw when GNT_BT=1 */ -+ odm_set_bb_reg(dm, R_0x874, BIT(23), 0); -+ -+ /* @Mapping Table */ -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1); -+ -+ /* Output Pin Settings */ -+#if 0 -+ /* odm_set_bb_reg(dm, R_0x948, BIT6, 0x1); */ -+#endif -+ odm_set_bb_reg(dm, R_0x870, BIT(8), 1); -+ odm_set_bb_reg(dm, R_0x870, BIT(9), 1); -+ -+ /* Status init */ -+ fat_tab->is_become_linked = false; -+ swat_tab->try_flag = SWAW_STEP_INIT; -+ swat_tab->double_chk_flag = 0; -+ swat_tab->cur_antenna = MAIN_ANT; -+ swat_tab->pre_ant = MAIN_ANT; -+ dm->antdiv_counter = CONFIG_ANTDIV_PERIOD; -+ -+ /* @2 [--For HW Bug setting] */ -+ odm_set_bb_reg(dm, R_0x80c, BIT(21), 0); /* TX ant by Reg */ -+} -+ -+void odm_update_rx_idle_ant_8723d(void *dm_void, u8 ant, u32 default_ant, -+ u32 optional_ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ void *adapter = dm->adapter; -+ u8 count = 0; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ /*score board to BT ,a002:WL to do ant-div*/ -+ odm_set_mac_reg(dm, R_0xa8, MASKHWORD, 0xa002); -+ ODM_delay_us(50); -+#endif -+#if 0 -+ /* odm_set_bb_reg(dm, R_0x948, BIT(6), 0x1); */ -+#endif -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ odm_set_bb_reg(dm, R_0x860, BIT(8), default_ant); -+ odm_set_bb_reg(dm, R_0x860, BIT(9), default_ant); -+ } -+ odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant); -+ /*@Default RX*/ -+ odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); -+ /*Optional RX*/ -+ odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant); -+ /*@Default TX*/ -+ fat_tab->rx_idle_ant = ant; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ /*score board to BT ,a000:WL@S1 a001:WL@S0*/ -+ if (default_ant == ANT1_2G) -+ odm_set_mac_reg(dm, R_0xa8, MASKHWORD, 0xa000); -+ else -+ odm_set_mac_reg(dm, R_0xa8, MASKHWORD, 0xa001); -+#endif -+} -+ -+void phydm_set_tx_ant_pwr_8723d(void *dm_void, u8 ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ void *adapter = dm->adapter; -+ -+ fat_tab->rx_idle_ant = ant; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ ((PADAPTER)adapter)->HalFunc.SetTxPowerLevelHandler(adapter, *dm->channel); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ rtw_hal_set_tx_power_level(adapter, *dm->channel); -+#endif -+} -+#endif -+ -+#if (RTL8723B_SUPPORT == 1) -+void odm_trx_hw_ant_div_init_8723b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***8723B AntDiv_Init => ant_div_type=[CG_TRX_HW_ANTDIV(DPDT)]\n"); -+ -+ /* @Mapping Table */ -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1); -+ -+ /* OFDM HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF, 0xa0); /* thershold */ -+ odm_set_bb_reg(dm, R_0xca4, 0x7FF000, 0x00); /* @bias */ -+ -+ /* @CCK HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* patch for clk from 88M to 80M */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); -+ /* @do 64 samples */ -+ -+ /* @BT Coexistence */ -+ odm_set_bb_reg(dm, R_0x864, BIT(12), 0); -+ /* @keep antsel_map when GNT_BT = 1 */ -+ odm_set_bb_reg(dm, R_0x874, BIT(23), 0); -+ /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ -+ -+ /* Output Pin Settings */ -+ odm_set_bb_reg(dm, R_0x870, BIT(8), 0); -+ -+ odm_set_bb_reg(dm, R_0x948, BIT(6), 0); -+ /* WL_BB_SEL_BTG_TRXG_anta, (1: HW CTRL 0: SW CTRL) */ -+ odm_set_bb_reg(dm, R_0x948, BIT(7), 0); -+ -+ odm_set_mac_reg(dm, R_0x40, BIT(3), 1); -+ odm_set_mac_reg(dm, R_0x38, BIT(11), 1); -+ odm_set_mac_reg(dm, R_0x4c, BIT(24) | BIT(23), 2); -+ /* select DPDT_P and DPDT_N as output pin */ -+ -+ odm_set_bb_reg(dm, R_0x944, BIT(0) | BIT(1), 3); /* @in/out */ -+ odm_set_bb_reg(dm, R_0x944, BIT(31), 0); -+ -+ odm_set_bb_reg(dm, R_0x92c, BIT(1), 0); /* @DPDT_P non-inverse */ -+ odm_set_bb_reg(dm, R_0x92c, BIT(0), 1); /* @DPDT_N inverse */ -+ -+ odm_set_bb_reg(dm, R_0x930, 0xF0, 8); /* @DPDT_P = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0x930, 0xF, 8); /* @DPDT_N = ANTSEL[0] */ -+ -+ /* @2 [--For HW Bug setting] */ -+ if (dm->ant_type == ODM_AUTO_ANT) -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); -+ /* @CCK AntDiv function block enable */ -+} -+ -+void odm_s0s1_sw_ant_div_init_8723b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***8723B AntDiv_Init => ant_div_type=[ S0S1_SW_AntDiv]\n"); -+ -+ /* @Mapping Table */ -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0x914, MASKBYTE1, 1); -+ -+#if 0 -+ /* Output Pin Settings */ -+ /* odm_set_bb_reg(dm, R_0x948, BIT6, 0x1); */ -+#endif -+ odm_set_bb_reg(dm, R_0x870, BIT(9) | BIT(8), 0); -+ -+ fat_tab->is_become_linked = false; -+ swat_tab->try_flag = SWAW_STEP_INIT; -+ swat_tab->double_chk_flag = 0; -+ -+ /* @2 [--For HW Bug setting] */ -+ odm_set_bb_reg(dm, R_0x80c, BIT(21), 0); /* TX ant by Reg */ -+} -+ -+void odm_update_rx_idle_ant_8723b( -+ void *dm_void, -+ u8 ant, -+ u32 default_ant, -+ u32 optional_ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ void *adapter = dm->adapter; -+ u8 count = 0; -+ /*u8 u1_temp;*/ -+ /*u8 h2c_parameter;*/ -+ -+ if (!dm->is_linked && dm->ant_type == ODM_AUTO_ANT) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to no link\n"); -+ return; -+ } -+ -+#if 0 -+ /* Send H2C command to FW */ -+ /* @Enable wifi calibration */ -+ h2c_parameter = true; -+ odm_fill_h2c_cmd(dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter); -+ -+ /* @Check if H2C command sucess or not (0x1e6) */ -+ u1_temp = odm_read_1byte(dm, 0x1e6); -+ while ((u1_temp != 0x1) && (count < 100)) { -+ ODM_delay_us(10); -+ u1_temp = odm_read_1byte(dm, 0x1e6); -+ count++; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-ant ] 8723B: H2C command status = %d, count = %d\n", -+ u1_temp, count); -+ -+ if (u1_temp == 0x1) { -+ /* @Check if BT is doing IQK (0x1e7) */ -+ count = 0; -+ u1_temp = odm_read_1byte(dm, 0x1e7); -+ while ((!(u1_temp & BIT(0))) && (count < 100)) { -+ ODM_delay_us(50); -+ u1_temp = odm_read_1byte(dm, 0x1e7); -+ count++; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-ant ] 8723B: BT IQK status = %d, count = %d\n", -+ u1_temp, count); -+ -+ if (u1_temp & BIT(0)) { -+ odm_set_bb_reg(dm, R_0x948, BIT(6), 0x1); -+ odm_set_bb_reg(dm, R_0x948, BIT(9), default_ant); -+ odm_set_bb_reg(dm, R_0x864, 0x38, default_ant); -+ /* @Default RX */ -+ odm_set_bb_reg(dm, R_0x864, 0x1c0, optional_ant); -+ /* @Optional RX */ -+ odm_set_bb_reg(dm, R_0x860, 0x7000, default_ant); -+ /* @Default TX */ -+ fat_tab->rx_idle_ant = ant; -+ -+ /* Set TX AGC by S0/S1 */ -+ /* Need to consider Linux driver */ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ adapter->hal_func.set_tx_power_level_handler(adapter, *dm->channel); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ rtw_hal_set_tx_power_level(adapter, *dm->channel); -+#endif -+ -+ /* Set IQC by S0/S1 */ -+ odm_set_iqc_by_rfpath(dm, default_ant); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-ant ] 8723B: Success to set RX antenna\n"); -+ } else -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to BT IQK\n"); -+ } else -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to H2C command fail\n"); -+ -+ /* Send H2C command to FW */ -+ /* @Disable wifi calibration */ -+ h2c_parameter = false; -+ odm_fill_h2c_cmd(dm, ODM_H2C_WIFI_CALIBRATION, 1, &h2c_parameter); -+#else -+ -+ odm_set_bb_reg(dm, R_0x948, BIT(6), 0x1); -+ odm_set_bb_reg(dm, R_0x948, BIT(9), default_ant); -+ odm_set_bb_reg(dm, R_0x864, BIT(5) | BIT(4) | BIT(3), default_ant); -+ /*@Default RX*/ -+ odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), optional_ant); -+ /*Optional RX*/ -+ odm_set_bb_reg(dm, R_0x860, BIT(14) | BIT(13) | BIT(12), default_ant); -+ /*@Default TX*/ -+ fat_tab->rx_idle_ant = ant; -+ -+/* Set TX AGC by S0/S1 */ -+/* Need to consider Linux driver */ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ ((PADAPTER)adapter)->HalFunc.SetTxPowerLevelHandler(adapter, *dm->channel); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ rtw_hal_set_tx_power_level(adapter, *dm->channel); -+#endif -+ -+ /* Set IQC by S0/S1 */ -+ odm_set_iqc_by_rfpath(dm, default_ant); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-ant ] 8723B: Success to set RX antenna\n"); -+ -+#endif -+} -+ -+boolean -+phydm_is_bt_enable_8723b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 bt_state; -+#if 0 -+ /*u32 reg75;*/ -+ -+ /*reg75 = odm_get_bb_reg(dm, R_0x74, BIT8);*/ -+ /*odm_set_bb_reg(dm, R_0x74, BIT8, 0x0);*/ -+#endif -+ odm_set_bb_reg(dm, R_0xa0, BIT(24) | BIT(25) | BIT(26), 0x5); -+ bt_state = odm_get_bb_reg(dm, R_0xa0, 0xf); -+#if 0 -+ /*odm_set_bb_reg(dm, R_0x74, BIT8, reg75);*/ -+#endif -+ -+ if (bt_state == 4 || bt_state == 7 || bt_state == 9 || bt_state == 13) -+ return true; -+ else -+ return false; -+} -+#endif /* @#if (RTL8723B_SUPPORT == 1) */ -+ -+#if (RTL8821A_SUPPORT == 1) -+ -+void odm_trx_hw_ant_div_init_8821a(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* Output Pin Settings */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); -+ -+ odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */ -+ odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */ -+ -+ odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0); -+ -+ odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); -+ /* select DPDT_P and DPDT_N as output pin */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */ -+ odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */ -+ -+ /* @Mapping Table */ -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); -+ -+ /* OFDM HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x10); /* @bias */ -+ -+ /* @CCK HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* patch for clk from 88M to 80M */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ -+ -+ odm_set_bb_reg(dm, R_0x800, BIT(25), 0); -+ /* @ANTSEL_CCK sent to the smart_antenna circuit */ -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); -+ /* @CCK AntDiv function block enable */ -+ -+ /* @BT Coexistence */ -+ odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); -+ /* @keep antsel_map when GNT_BT = 1 */ -+ odm_set_bb_reg(dm, R_0x804, BIT(4), 1); -+ /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ -+ -+ odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); -+ /* settling time of antdiv by RF LNA = 100ns */ -+ -+ /* response TX ant by RX ant */ -+ odm_set_mac_reg(dm, R_0x668, BIT(3), 1); -+} -+ -+void odm_s0s1_sw_ant_div_init_8821a(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* Output Pin Settings */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); -+ -+ odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */ -+ odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */ -+ -+ odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0); -+ -+ odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); -+ /* select DPDT_P and DPDT_N as output pin */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */ -+ odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */ -+ -+ /* @Mapping Table */ -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); -+ -+ /* OFDM HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x10); /* @bias */ -+ -+ /* @CCK HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* patch for clk from 88M to 80M */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ -+ -+ odm_set_bb_reg(dm, R_0x800, BIT(25), 0); -+ /* @ANTSEL_CCK sent to the smart_antenna circuit */ -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); -+ /* @CCK AntDiv function block enable */ -+ -+ /* @BT Coexistence */ -+ odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); -+ /* @keep antsel_map when GNT_BT = 1 */ -+ odm_set_bb_reg(dm, R_0x804, BIT(4), 1); -+ /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ -+ -+ odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); -+ /* settling time of antdiv by RF LNA = 100ns */ -+ -+ /* response TX ant by RX ant */ -+ odm_set_mac_reg(dm, R_0x668, BIT(3), 1); -+ -+ odm_set_bb_reg(dm, R_0x900, BIT(18), 0); -+ -+ swat_tab->try_flag = SWAW_STEP_INIT; -+ swat_tab->double_chk_flag = 0; -+ swat_tab->cur_antenna = MAIN_ANT; -+ swat_tab->pre_ant = MAIN_ANT; -+ swat_tab->swas_no_link_state = 0; -+} -+#endif /* @#if (RTL8821A_SUPPORT == 1) */ -+ -+#if (RTL8821C_SUPPORT == 1) -+void odm_trx_hw_ant_div_init_8821c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ /* Output Pin Settings */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); -+ -+ odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */ -+ odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */ -+ -+ odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0); -+ -+ odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); -+ /* select DPDT_P and DPDT_N as output pin */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */ -+ odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */ -+ -+ /* @Mapping Table */ -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); -+ -+ /* OFDM HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x10); /* @bias */ -+ -+ /* @CCK HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* patch for clk from 88M to 80M */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ -+ -+ odm_set_bb_reg(dm, R_0x800, BIT(25), 0); -+ /* @ANTSEL_CCK sent to the smart_antenna circuit */ -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); -+ /* @CCK AntDiv function block enable */ -+ -+ /* @BT Coexistence */ -+ odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); -+ /* @keep antsel_map when GNT_BT = 1 */ -+ odm_set_bb_reg(dm, R_0x804, BIT(4), 1); -+ /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ -+ -+ /* Timming issue */ -+ odm_set_bb_reg(dm, R_0x818, BIT(23) | BIT(22) | BIT(21) | BIT(20), 0); -+ /*@keep antidx after tx for ACK ( unit x 3.2 mu sec)*/ -+ odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); -+ /* settling time of antdiv by RF LNA = 100ns */ -+ -+ /* response TX ant by RX ant */ -+ odm_set_mac_reg(dm, R_0x668, BIT(3), 1); -+} -+ -+void phydm_s0s1_sw_ant_div_init_8821c(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* Output Pin Settings */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); -+ -+ odm_set_mac_reg(dm, R_0x64, BIT(29), 1); /* PAPE by WLAN control */ -+ odm_set_mac_reg(dm, R_0x64, BIT(28), 1); /* @LNAON by WLAN control */ -+ -+ odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0); -+ -+ odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); -+ /* select DPDT_P and DPDT_N as output pin */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); /* @by WLAN control */ -+ odm_set_bb_reg(dm, R_0xcb4, 0xF, 8); /* @DPDT_P = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb4, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(29), 0); /* @DPDT_P non-inverse */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(28), 1); /* @DPDT_N inverse */ -+ -+ /* @Mapping Table */ -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); -+ -+ /* OFDM HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x00); /* @bias */ -+ -+ /* @CCK HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* patch for clk from 88M to 80M */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ -+ -+ odm_set_bb_reg(dm, R_0x800, BIT(25), 0); -+ /* @ANTSEL_CCK sent to the smart_antenna circuit */ -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); -+ /* @CCK AntDiv function block enable */ -+ -+ /* @BT Coexistence */ -+ odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); -+ /* @keep antsel_map when GNT_BT = 1 */ -+ odm_set_bb_reg(dm, R_0x804, BIT(4), 1); -+ /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ -+ -+ odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); -+ /* settling time of antdiv by RF LNA = 100ns */ -+ -+ /* response TX ant by RX ant */ -+ odm_set_mac_reg(dm, R_0x668, BIT(3), 1); -+ -+ odm_set_bb_reg(dm, R_0x900, BIT(18), 0); -+ -+ swat_tab->try_flag = SWAW_STEP_INIT; -+ swat_tab->double_chk_flag = 0; -+ swat_tab->cur_antenna = MAIN_ANT; -+ swat_tab->pre_ant = MAIN_ANT; -+ swat_tab->swas_no_link_state = 0; -+} -+#endif /* @#if (RTL8821C_SUPPORT == 1) */ -+ -+#if (RTL8195B_SUPPORT == 1) -+void odm_trx_hw_ant_div_init_8195b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ odm_set_bb_reg(dm, R_0xcb8, BIT(16), 0); -+ /*RFE control pin 0,1*/ -+ odm_set_bb_reg(dm, R_0xcb0, 0xF, 8); /* @DPDT_P = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb0, 0xF0, 8); /* @DPDT_N = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(20), 0); /* @DPDT_P non-inverse */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(21), 1); /* @DPDT_N inverse */ -+ -+ /* @Mapping Table */ -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); -+ -+ /* OFDM HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x10); /* @bias */ -+ -+ /* @CCK HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* patch for clk from 88M to 80M */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ -+ -+ odm_set_bb_reg(dm, R_0x800, BIT(25), 0); -+ /* @ANTSEL_CCK sent to the smart_antenna circuit */ -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); -+ /* @CCK AntDiv function block enable */ -+ -+ /* @BT Coexistence */ -+ odm_set_bb_reg(dm, R_0xcac, BIT(9), 1); -+ /* @keep antsel_map when GNT_BT = 1 */ -+ odm_set_bb_reg(dm, R_0x804, BIT(4), 1); -+ /* @Disable hw antsw & fast_train.antsw when GNT_BT=1 */ -+ -+ /* Timming issue */ -+ odm_set_bb_reg(dm, R_0x818, BIT(23) | BIT(22) | BIT(21) | BIT(20), 0); -+ /*@keep antidx after tx for ACK ( unit x 3.2 mu sec)*/ -+ odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); -+ /* settling time of antdiv by RF LNA = 100ns */ -+ -+ /* response TX ant by RX ant */ -+ odm_set_mac_reg(dm, R_0x668, BIT(3), 1); -+} -+#endif /* @#if (RTL8195B_SUPPORT == 1) */ -+ -+#if (RTL8881A_SUPPORT == 1) -+void odm_trx_hw_ant_div_init_8881a(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* Output Pin Settings */ -+ /* @[SPDT related] */ -+ odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); -+ odm_set_mac_reg(dm, R_0x4c, BIT(26), 0); -+ odm_set_bb_reg(dm, R_0xcb4, BIT(31), 0); /* @delay buffer */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(22), 0); -+ odm_set_bb_reg(dm, R_0xcb4, BIT(24), 1); -+ odm_set_bb_reg(dm, R_0xcb0, 0xF00, 8); /* @DPDT_P = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb0, 0xF0000, 8); /* @DPDT_N = ANTSEL[0] */ -+ -+ /* @Mapping Table */ -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); -+ -+ /* OFDM HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x0); /* @bias */ -+ odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); -+ /* settling time of antdiv by RF LNA = 100ns */ -+ -+ /* @CCK HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* patch for clk from 88M to 80M */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ -+ -+ /* @2 [--For HW Bug setting] */ -+ -+ odm_set_bb_reg(dm, R_0x900, BIT(18), 0); -+ /* TX ant by Reg *//* A-cut bug */ -+} -+ -+#endif /* @#if (RTL8881A_SUPPORT == 1) */ -+ -+#if (RTL8812A_SUPPORT == 1) -+void odm_trx_hw_ant_div_init_8812a(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+ /* @3 */ /* @3 --RFE pin setting--------- */ -+ /* @[BB] */ -+ odm_set_bb_reg(dm, R_0x900, BIT(10) | BIT(9) | BIT(8), 0x0); -+ /* @disable SW switch */ -+ odm_set_bb_reg(dm, R_0x900, BIT(17) | BIT(16), 0x0); -+ odm_set_bb_reg(dm, R_0x974, BIT(7) | BIT(6), 0x3); /* @in/out */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(31), 0); /* @delay buffer */ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(26), 0); -+ odm_set_bb_reg(dm, R_0xcb4, BIT(27), 1); -+ odm_set_bb_reg(dm, R_0xcb0, 0xF000000, 8); /* @DPDT_P = ANTSEL[0] */ -+ odm_set_bb_reg(dm, R_0xcb0, 0xF0000000, 8); /* @DPDT_N = ANTSEL[0] */ -+ /* @3 ------------------------- */ -+ -+ /* @Mapping Table */ -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE0, 0); -+ odm_set_bb_reg(dm, R_0xca4, MASKBYTE1, 1); -+ -+ /* OFDM HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF, 0xA0); /* thershold */ -+ odm_set_bb_reg(dm, R_0x8d4, 0x7FF000, 0x0); /* @bias */ -+ odm_set_bb_reg(dm, R_0x8cc, BIT(20) | BIT(19) | BIT(18), 3); -+ /* settling time of antdiv by RF LNA = 100ns */ -+ -+ /* @CCK HW AntDiv Parameters */ -+ odm_set_bb_reg(dm, R_0xa74, BIT(7), 1); -+ /* patch for clk from 88M to 80M */ -+ odm_set_bb_reg(dm, R_0xa0c, BIT(4), 1); /* @do 64 samples */ -+ -+ /* @2 [--For HW Bug setting] */ -+ -+ odm_set_bb_reg(dm, R_0x900, BIT(18), 0); -+ /* TX ant by Reg */ /* A-cut bug */ -+} -+ -+#endif /* @#if (RTL8812A_SUPPORT == 1) */ -+ -+#if (RTL8188F_SUPPORT == 1) -+void odm_s0s1_sw_ant_div_init_8188f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s]=====>\n", __func__); -+ -+#if 0 -+ /*@GPIO setting*/ -+ /*odm_set_mac_reg(dm, R_0x64, BIT(18), 0); */ -+ /*odm_set_mac_reg(dm, R_0x44, BIT(28)|BIT(27), 0);*/ -+ /*odm_set_mac_reg(dm, R_0x44, BIT(20) | BIT(19), 0x3);*/ -+ /*enable_output for P_GPIO[4:3]*/ -+ /*odm_set_mac_reg(dm, R_0x44, BIT(12)|BIT(11), 0);*/ /*output value*/ -+ /*odm_set_mac_reg(dm, R_0x40, BIT(1)|BIT(0), 0);*/ /*GPIO function*/ -+#endif -+ -+ if (dm->support_ic_type == ODM_RTL8188F) { -+ if (dm->support_interface == ODM_ITRF_USB) -+ odm_set_mac_reg(dm, R_0x44, BIT(20) | BIT(19), 0x3); -+ /*@enable_output for P_GPIO[4:3]*/ -+ else if (dm->support_interface == ODM_ITRF_SDIO) -+ odm_set_mac_reg(dm, R_0x44, BIT(18), 0x1); -+ /*@enable_output for P_GPIO[2]*/ -+ } -+ -+ fat_tab->is_become_linked = false; -+ swat_tab->try_flag = SWAW_STEP_INIT; -+ swat_tab->double_chk_flag = 0; -+} -+ -+void phydm_update_rx_idle_antenna_8188F(void *dm_void, u32 default_ant) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 codeword; -+ -+ if (dm->support_ic_type == ODM_RTL8188F) { -+ if (dm->support_interface == ODM_ITRF_USB) { -+ if (default_ant == ANT1_2G) -+ codeword = 1; /*@2'b01*/ -+ else -+ codeword = 2; /*@2'b10*/ -+ odm_set_mac_reg(dm, R_0x44, 0x1800, codeword); -+ /*@GPIO[4:3] output value*/ -+ } else if (dm->support_interface == ODM_ITRF_SDIO) { -+ if (default_ant == ANT1_2G) { -+ codeword = 0; /*@1'b0*/ -+ odm_set_bb_reg(dm, R_0x870, 0x300, 0x3); -+ odm_set_bb_reg(dm, R_0x860, 0x300, 0x1); -+ } else { -+ codeword = 1; /*@1'b1*/ -+ odm_set_bb_reg(dm, R_0x870, 0x300, 0x3); -+ odm_set_bb_reg(dm, R_0x860, 0x300, 0x2); -+ } -+ odm_set_mac_reg(dm, R_0x44, BIT(10), codeword); -+ /*@GPIO[2] output value*/ -+ } -+ } -+} -+#endif -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+void phydm_rx_rate_for_antdiv(void *dm_void, void *pkt_info_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ u8 data_rate = 0; -+ -+ pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ data_rate = pktinfo->data_rate & 0x7f; -+ -+ if (!fat_tab->get_stats) -+ return; -+ -+ if (fat_tab->antsel_rx_keep_0 == ANT1_2G) { -+ if (data_rate >= ODM_RATEMCS0 && -+ data_rate <= ODM_RATEMCS15) -+ fat_tab->main_ht_cnt[data_rate - ODM_RATEMCS0]++; -+ else if (data_rate >= ODM_RATEVHTSS1MCS0 && -+ data_rate <= ODM_RATEVHTSS2MCS9) -+ fat_tab->main_vht_cnt[data_rate - ODM_RATEVHTSS1MCS0]++; -+ } else { /*ANT2_2G*/ -+ if (data_rate >= ODM_RATEMCS0 && -+ data_rate <= ODM_RATEMCS15) -+ fat_tab->aux_ht_cnt[data_rate - ODM_RATEMCS0]++; -+ else if (data_rate >= ODM_RATEVHTSS1MCS0 && -+ data_rate <= ODM_RATEVHTSS2MCS9) -+ fat_tab->aux_vht_cnt[data_rate - ODM_RATEVHTSS1MCS0]++; -+ } -+} -+ -+void phydm_antdiv_reset_rx_rate(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ odm_memory_set(dm, &fat_tab->main_ht_cnt[0], 0, HT_IDX * 2); -+ odm_memory_set(dm, &fat_tab->aux_ht_cnt[0], 0, HT_IDX * 2); -+ odm_memory_set(dm, &fat_tab->main_vht_cnt[0], 0, VHT_IDX * 2); -+ odm_memory_set(dm, &fat_tab->aux_vht_cnt[0], 0, VHT_IDX * 2); -+} -+ -+void phydm_statistics_evm_1ss(void *dm_void, void *phy_info_void, -+ u8 antsel_tr_mux, u32 id, u32 utility) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct phydm_phyinfo_struct *phy_info = NULL; -+ -+ phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ if (antsel_tr_mux == ANT1_2G) { -+ fat_tab->main_evm_sum[id] += ((phy_info->rx_mimo_evm_dbm[0]) -+ << 5); -+ fat_tab->main_evm_cnt[id]++; -+ } else { -+ fat_tab->aux_evm_sum[id] += ((phy_info->rx_mimo_evm_dbm[0]) -+ << 5); -+ fat_tab->aux_evm_cnt[id]++; -+ } -+} -+ -+void phydm_statistics_evm_2ss(void *dm_void, void *phy_info_void, -+ u8 antsel_tr_mux, u32 id, u32 utility) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct phydm_phyinfo_struct *phy_info = NULL; -+ -+ phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ if (antsel_tr_mux == ANT1_2G) { -+ fat_tab->main_evm_2ss_sum[id][0] += phy_info->rx_mimo_evm_dbm[0] -+ << 5; -+ fat_tab->main_evm_2ss_sum[id][1] += phy_info->rx_mimo_evm_dbm[1] -+ << 5; -+ fat_tab->main_evm_2ss_cnt[id]++; -+ -+ } else { -+ fat_tab->aux_evm_2ss_sum[id][0] += (phy_info->rx_mimo_evm_dbm[0] -+ << 5); -+ fat_tab->aux_evm_2ss_sum[id][1] += (phy_info->rx_mimo_evm_dbm[1] -+ << 5); -+ fat_tab->aux_evm_2ss_cnt[id]++; -+ } -+} -+ -+void phydm_evm_sw_antdiv_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ /*@EVM enhance AntDiv method init----------------*/ -+ fat_tab->evm_method_enable = 0; -+ fat_tab->fat_state = NORMAL_STATE_MIAN; -+ fat_tab->fat_state_cnt = 0; -+ fat_tab->pre_antdiv_rssi = 0; -+ -+ dm->antdiv_intvl = 30; -+ dm->antdiv_delay = 20; -+ dm->antdiv_train_num = 4; -+ if (dm->support_ic_type & ODM_RTL8192E) -+ odm_set_bb_reg(dm, R_0x910, 0x3f, 0xf); -+ dm->antdiv_evm_en = 1; -+ /*@dm->antdiv_period=1;*/ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ dm->evm_antdiv_period = 1; -+#else -+ dm->evm_antdiv_period = 3; -+#endif -+ dm->stop_antdiv_rssi_th = 3; -+ dm->stop_antdiv_tp_th = 80; -+ dm->antdiv_tp_period = 3; -+ dm->stop_antdiv_tp_diff_th = 5; -+} -+ -+void odm_evm_fast_ant_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ fat_tab->evm_method_enable = 0; -+ if (fat_tab->div_path_type == ANT_PATH_A) -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); -+ else if (fat_tab->div_path_type == ANT_PATH_B) -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B); -+ else if (fat_tab->div_path_type == ANT_PATH_AB) -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_AB); -+ fat_tab->fat_state = NORMAL_STATE_MIAN; -+ fat_tab->fat_state_cnt = 0; -+ dm->antdiv_period = 0; -+ odm_set_mac_reg(dm, R_0x608, BIT(8), 0); -+} -+ -+void odm_evm_enhance_ant_div(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 main_rssi, aux_rssi; -+ u32 main_crc_utility = 0, aux_crc_utility = 0, utility_ratio = 1; -+ u32 main_evm, aux_evm, diff_rssi = 0, diff_EVM = 0; -+ u32 main_2ss_evm[2], aux_2ss_evm[2]; -+ u32 main_1ss_evm, aux_1ss_evm; -+ u32 main_2ss_evm_sum, aux_2ss_evm_sum; -+ u8 score_EVM = 0, score_CRC = 0; -+ u8 rssi_larger_ant = 0; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u32 value32, i, mac_id; -+ boolean main_above1 = false, aux_above1 = false; -+ boolean force_antenna = false; -+ struct cmn_sta_info *sta; -+ u32 main_tp_avg, aux_tp_avg; -+ u8 curr_rssi, rssi_diff; -+ u32 tp_diff, tp_diff_avg; -+ u16 main_max_cnt = 0, aux_max_cnt = 0; -+ u16 main_max_idx = 0, aux_max_idx = 0; -+ u16 main_cnt_all = 0, aux_cnt_all = 0; -+ u8 rate_num = dm->num_rf_path; -+ u8 rate_ss_shift = 0; -+ u8 tp_diff_return = 0, tp_return = 0, rssi_return = 0; -+ u8 target_ant_evm_1ss, target_ant_evm_2ss; -+ u8 decision_evm_ss; -+ u8 next_ant; -+ -+ fat_tab->target_ant_enhance = 0xFF; -+ -+ if ((dm->support_ic_type & ODM_EVM_ANTDIV_IC)) { -+ if (dm->is_one_entry_only) { -+#if 0 -+ /* PHYDM_DBG(dm,DBG_ANT_DIV, "[One Client only]\n"); */ -+#endif -+ mac_id = dm->one_entry_macid; -+ sta = dm->phydm_sta_info[mac_id]; -+ -+ main_rssi = (fat_tab->main_cnt[mac_id] != 0) ? (fat_tab->main_sum[mac_id] / fat_tab->main_cnt[mac_id]) : 0; -+ aux_rssi = (fat_tab->aux_cnt[mac_id] != 0) ? (fat_tab->aux_sum[mac_id] / fat_tab->aux_cnt[mac_id]) : 0; -+ -+ if ((main_rssi == 0 && aux_rssi != 0 && aux_rssi >= FORCE_RSSI_DIFF) || (main_rssi != 0 && aux_rssi == 0 && main_rssi >= FORCE_RSSI_DIFF)) -+ diff_rssi = FORCE_RSSI_DIFF; -+ else if (main_rssi != 0 && aux_rssi != 0) -+ diff_rssi = (main_rssi >= aux_rssi) ? (main_rssi - aux_rssi) : (aux_rssi - main_rssi); -+ -+ if (main_rssi >= aux_rssi) -+ rssi_larger_ant = MAIN_ANT; -+ else -+ rssi_larger_ant = AUX_ANT; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Main_Cnt=(( %d )), main_rssi=(( %d ))\n", -+ fat_tab->main_cnt[mac_id], main_rssi); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Aux_Cnt=(( %d )), aux_rssi=(( %d ))\n", -+ fat_tab->aux_cnt[mac_id], aux_rssi); -+ -+ if (((main_rssi >= evm_rssi_th_high || aux_rssi >= evm_rssi_th_high) || fat_tab->evm_method_enable == 1) -+ /* @&& (diff_rssi <= FORCE_RSSI_DIFF + 1) */ -+ ) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "> TH_H || evm_method_enable==1\n"); -+ -+ if ((main_rssi >= evm_rssi_th_low || aux_rssi >= evm_rssi_th_low)) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "> TH_L, fat_state_cnt =((%d))\n", fat_tab->fat_state_cnt); -+ -+ /*Traning state: 0(alt) 1(ori) 2(alt) 3(ori)============================================================*/ -+ if (fat_tab->fat_state_cnt < (dm->antdiv_train_num << 1)) { -+ if (fat_tab->fat_state_cnt == 0) { -+ /*Reset EVM 1SS Method */ -+ fat_tab->main_evm_sum[mac_id] = 0; -+ fat_tab->aux_evm_sum[mac_id] = 0; -+ fat_tab->main_evm_cnt[mac_id] = 0; -+ fat_tab->aux_evm_cnt[mac_id] = 0; -+ /*Reset EVM 2SS Method */ -+ fat_tab->main_evm_2ss_sum[mac_id][0] = 0; -+ fat_tab->main_evm_2ss_sum[mac_id][1] = 0; -+ fat_tab->aux_evm_2ss_sum[mac_id][0] = 0; -+ fat_tab->aux_evm_2ss_sum[mac_id][1] = 0; -+ fat_tab->main_evm_2ss_cnt[mac_id] = 0; -+ fat_tab->aux_evm_2ss_cnt[mac_id] = 0; -+ -+ /*Reset TP Method */ -+ fat_tab->main_tp = 0; -+ fat_tab->aux_tp = 0; -+ fat_tab->main_tp_cnt = 0; -+ fat_tab->aux_tp_cnt = 0; -+ phydm_antdiv_reset_rx_rate(dm); -+ -+ /*Reset CRC Method */ -+ fat_tab->main_crc32_ok_cnt = 0; -+ fat_tab->main_crc32_fail_cnt = 0; -+ fat_tab->aux_crc32_ok_cnt = 0; -+ fat_tab->aux_crc32_fail_cnt = 0; -+ -+#ifdef SKIP_EVM_ANTDIV_TRAINING_PATCH -+ if ((*dm->band_width == CHANNEL_WIDTH_20) && sta->mimo_type == RF_2T2R) { -+ /*@1. Skip training: RSSI*/ -+#if 0 -+ /*PHYDM_DBG(pDM_Odm,DBG_ANT_DIV, "TargetAnt_enhance=((%d)), RxIdleAnt=((%d))\n", pDM_FatTable->TargetAnt_enhance, pDM_FatTable->RxIdleAnt);*/ -+#endif -+ curr_rssi = (u8)((fat_tab->rx_idle_ant == MAIN_ANT) ? main_rssi : aux_rssi); -+ rssi_diff = (curr_rssi > fat_tab->pre_antdiv_rssi) ? (curr_rssi - fat_tab->pre_antdiv_rssi) : (fat_tab->pre_antdiv_rssi - curr_rssi); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[1] rssi_return, curr_rssi=((%d)), pre_rssi=((%d))\n", curr_rssi, fat_tab->pre_antdiv_rssi); -+ -+ fat_tab->pre_antdiv_rssi = curr_rssi; -+ if (rssi_diff < dm->stop_antdiv_rssi_th && curr_rssi != 0) -+ rssi_return = 1; -+ -+ /*@2. Skip training: TP Diff*/ -+ tp_diff = (dm->rx_tp > fat_tab->pre_antdiv_tp) ? (dm->rx_tp - fat_tab->pre_antdiv_tp) : (fat_tab->pre_antdiv_tp - dm->rx_tp); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[2] tp_diff_return, curr_tp=((%d)), pre_tp=((%d))\n", dm->rx_tp, fat_tab->pre_antdiv_tp); -+ fat_tab->pre_antdiv_tp = dm->rx_tp; -+ if ((tp_diff < (u32)(dm->stop_antdiv_tp_diff_th) && dm->rx_tp != 0)) -+ tp_diff_return = 1; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[3] tp_return, curr_rx_tp=((%d))\n", dm->rx_tp); -+ /*@3. Skip training: TP*/ -+ if (dm->rx_tp >= (u32)(dm->stop_antdiv_tp_th)) -+ tp_return = 1; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[4] Return {rssi, tp_diff, tp} = {%d, %d, %d}\n", rssi_return, tp_diff_return, tp_return); -+ /*@4. Joint Return Decision*/ -+ if (tp_return) { -+ if (tp_diff_return || rssi_diff) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "***Return EVM SW AntDiv\n"); -+ return; -+ } -+ } -+ } -+#endif -+ -+ fat_tab->evm_method_enable = 1; -+ if (fat_tab->div_path_type == ANT_PATH_A) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ else if (fat_tab->div_path_type == ANT_PATH_B) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B); -+ else if (fat_tab->div_path_type == ANT_PATH_AB) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB); -+ dm->antdiv_period = dm->evm_antdiv_period; -+ odm_set_mac_reg(dm, R_0x608, BIT(8), 1); /*RCR accepts CRC32-Error packets*/ -+ fat_tab->fat_state_cnt++; -+ fat_tab->get_stats = false; -+ next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? MAIN_ANT : AUX_ANT; -+ odm_update_rx_idle_ant(dm, next_ant); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Antdiv Delay ]\n"); -+ odm_set_timer(dm, &dm->evm_fast_ant_training_timer, dm->antdiv_delay); //ms -+ } else if ((fat_tab->fat_state_cnt % 2) != 0) { -+ fat_tab->fat_state_cnt++; -+ fat_tab->get_stats = true; -+ odm_set_timer(dm, &dm->evm_fast_ant_training_timer, dm->antdiv_intvl); //ms -+ } else if ((fat_tab->fat_state_cnt % 2) == 0) { -+ fat_tab->fat_state_cnt++; -+ fat_tab->get_stats = false; -+ next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT; -+ odm_update_rx_idle_ant(dm, next_ant); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Antdiv Delay ]\n"); -+ odm_set_timer(dm, &dm->evm_fast_ant_training_timer, dm->antdiv_delay); //ms -+ } -+ } -+ /*@Decision state: 4==============================================================*/ -+ else { -+ fat_tab->get_stats = false; -+ fat_tab->fat_state_cnt = 0; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Decisoin state ]\n"); -+ -+/* @3 [CRC32 statistic] */ -+#if 0 -+ if ((fat_tab->main_crc32_ok_cnt > (fat_tab->aux_crc32_ok_cnt << 1)) || (diff_rssi >= 40 && rssi_larger_ant == MAIN_ANT)) { -+ fat_tab->target_ant_crc32 = MAIN_ANT; -+ force_antenna = true; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "CRC32 Force Main\n"); -+ } else if ((fat_tab->aux_crc32_ok_cnt > ((fat_tab->main_crc32_ok_cnt) << 1)) || ((diff_rssi >= 40) && (rssi_larger_ant == AUX_ANT))) { -+ fat_tab->target_ant_crc32 = AUX_ANT; -+ force_antenna = true; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "CRC32 Force Aux\n"); -+ } else -+#endif -+ { -+ if (fat_tab->main_crc32_fail_cnt <= 5) -+ fat_tab->main_crc32_fail_cnt = 5; -+ -+ if (fat_tab->aux_crc32_fail_cnt <= 5) -+ fat_tab->aux_crc32_fail_cnt = 5; -+ -+ if (fat_tab->main_crc32_ok_cnt > fat_tab->main_crc32_fail_cnt) -+ main_above1 = true; -+ -+ if (fat_tab->aux_crc32_ok_cnt > fat_tab->aux_crc32_fail_cnt) -+ aux_above1 = true; -+ -+ if (main_above1 == true && aux_above1 == false) { -+ force_antenna = true; -+ fat_tab->target_ant_crc32 = MAIN_ANT; -+ } else if (main_above1 == false && aux_above1 == true) { -+ force_antenna = true; -+ fat_tab->target_ant_crc32 = AUX_ANT; -+ } else if (main_above1 == true && aux_above1 == true) { -+ main_crc_utility = ((fat_tab->main_crc32_ok_cnt) << 7) / fat_tab->main_crc32_fail_cnt; -+ aux_crc_utility = ((fat_tab->aux_crc32_ok_cnt) << 7) / fat_tab->aux_crc32_fail_cnt; -+ fat_tab->target_ant_crc32 = (main_crc_utility == aux_crc_utility) ? (fat_tab->pre_target_ant_enhance) : ((main_crc_utility >= aux_crc_utility) ? MAIN_ANT : AUX_ANT); -+ -+ if (main_crc_utility != 0 && aux_crc_utility != 0) { -+ if (main_crc_utility >= aux_crc_utility) -+ utility_ratio = (main_crc_utility << 1) / aux_crc_utility; -+ else -+ utility_ratio = (aux_crc_utility << 1) / main_crc_utility; -+ } -+ } else if (main_above1 == false && aux_above1 == false) { -+ if (fat_tab->main_crc32_ok_cnt == 0) -+ fat_tab->main_crc32_ok_cnt = 1; -+ if (fat_tab->aux_crc32_ok_cnt == 0) -+ fat_tab->aux_crc32_ok_cnt = 1; -+ -+ main_crc_utility = ((fat_tab->main_crc32_fail_cnt) << 7) / fat_tab->main_crc32_ok_cnt; -+ aux_crc_utility = ((fat_tab->aux_crc32_fail_cnt) << 7) / fat_tab->aux_crc32_ok_cnt; -+ fat_tab->target_ant_crc32 = (main_crc_utility == aux_crc_utility) ? (fat_tab->pre_target_ant_enhance) : ((main_crc_utility <= aux_crc_utility) ? MAIN_ANT : AUX_ANT); -+ -+ if (main_crc_utility != 0 && aux_crc_utility != 0) { -+ if (main_crc_utility >= aux_crc_utility) -+ utility_ratio = (main_crc_utility << 1) / (aux_crc_utility); -+ else -+ utility_ratio = (aux_crc_utility << 1) / (main_crc_utility); -+ } -+ } -+ } -+ odm_set_mac_reg(dm, R_0x608, BIT(8), 0); /* NOT Accept CRC32 Error packets. */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "MAIN_CRC: Ok=((%d)), Fail = ((%d)), Utility = ((%d))\n", fat_tab->main_crc32_ok_cnt, fat_tab->main_crc32_fail_cnt, main_crc_utility); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "AUX__CRC: Ok=((%d)), Fail = ((%d)), Utility = ((%d))\n", fat_tab->aux_crc32_ok_cnt, fat_tab->aux_crc32_fail_cnt, aux_crc_utility); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "***1.TargetAnt_CRC32 = ((%s))\n", (fat_tab->target_ant_crc32 == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ -+ for (i = 0; i < HT_IDX; i++) { -+ main_cnt_all += fat_tab->main_ht_cnt[i]; -+ aux_cnt_all += fat_tab->aux_ht_cnt[i]; -+ -+ if (fat_tab->main_ht_cnt[i] > main_max_cnt) { -+ main_max_cnt = fat_tab->main_ht_cnt[i]; -+ main_max_idx = i; -+ } -+ -+ if (fat_tab->aux_ht_cnt[i] > aux_max_cnt) { -+ aux_max_cnt = fat_tab->aux_ht_cnt[i]; -+ aux_max_idx = i; -+ } -+ } -+ -+ for (i = 0; i < rate_num; i++) { -+ rate_ss_shift = (i << 3); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "*main_ht_cnt HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (rate_ss_shift), (rate_ss_shift + 7), -+ fat_tab->main_ht_cnt[rate_ss_shift + 0], fat_tab->main_ht_cnt[rate_ss_shift + 1], -+ fat_tab->main_ht_cnt[rate_ss_shift + 2], fat_tab->main_ht_cnt[rate_ss_shift + 3], -+ fat_tab->main_ht_cnt[rate_ss_shift + 4], fat_tab->main_ht_cnt[rate_ss_shift + 5], -+ fat_tab->main_ht_cnt[rate_ss_shift + 6], fat_tab->main_ht_cnt[rate_ss_shift + 7]); -+ } -+ -+ for (i = 0; i < rate_num; i++) { -+ rate_ss_shift = (i << 3); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "*aux_ht_cnt HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (rate_ss_shift), (rate_ss_shift + 7), -+ fat_tab->aux_ht_cnt[rate_ss_shift + 0], fat_tab->aux_ht_cnt[rate_ss_shift + 1], -+ fat_tab->aux_ht_cnt[rate_ss_shift + 2], fat_tab->aux_ht_cnt[rate_ss_shift + 3], -+ fat_tab->aux_ht_cnt[rate_ss_shift + 4], fat_tab->aux_ht_cnt[rate_ss_shift + 5], -+ fat_tab->aux_ht_cnt[rate_ss_shift + 6], fat_tab->aux_ht_cnt[rate_ss_shift + 7]); -+ } -+ -+ /* @3 [EVM statistic] */ -+ /*@1SS EVM*/ -+ main_1ss_evm = (fat_tab->main_evm_cnt[mac_id] != 0) ? (fat_tab->main_evm_sum[mac_id] / fat_tab->main_evm_cnt[mac_id]) : 0; -+ aux_1ss_evm = (fat_tab->aux_evm_cnt[mac_id] != 0) ? (fat_tab->aux_evm_sum[mac_id] / fat_tab->aux_evm_cnt[mac_id]) : 0; -+ target_ant_evm_1ss = (main_1ss_evm == aux_1ss_evm) ? (fat_tab->pre_target_ant_enhance) : ((main_1ss_evm >= aux_1ss_evm) ? MAIN_ANT : AUX_ANT); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main1ss_EVM= (( %d ))\n", fat_tab->main_evm_cnt[mac_id], main_1ss_evm); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_1ss_EVM = (( %d ))\n", fat_tab->aux_evm_cnt[mac_id], aux_1ss_evm); -+ -+ /*@2SS EVM*/ -+ main_2ss_evm[0] = (fat_tab->main_evm_2ss_cnt[mac_id] != 0) ? (fat_tab->main_evm_2ss_sum[mac_id][0] / fat_tab->main_evm_2ss_cnt[mac_id]) : 0; -+ main_2ss_evm[1] = (fat_tab->main_evm_2ss_cnt[mac_id] != 0) ? (fat_tab->main_evm_2ss_sum[mac_id][1] / fat_tab->main_evm_2ss_cnt[mac_id]) : 0; -+ main_2ss_evm_sum = main_2ss_evm[0] + main_2ss_evm[1]; -+ -+ aux_2ss_evm[0] = (fat_tab->aux_evm_2ss_cnt[mac_id] != 0) ? (fat_tab->aux_evm_2ss_sum[mac_id][0] / fat_tab->aux_evm_2ss_cnt[mac_id]) : 0; -+ aux_2ss_evm[1] = (fat_tab->aux_evm_2ss_cnt[mac_id] != 0) ? (fat_tab->aux_evm_2ss_sum[mac_id][1] / fat_tab->aux_evm_2ss_cnt[mac_id]) : 0; -+ aux_2ss_evm_sum = aux_2ss_evm[0] + aux_2ss_evm[1]; -+ -+ target_ant_evm_2ss = (main_2ss_evm_sum == aux_2ss_evm_sum) ? (fat_tab->pre_target_ant_enhance) : ((main_2ss_evm_sum >= aux_2ss_evm_sum) ? MAIN_ANT : AUX_ANT); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main2ss_EVM{A,B,Sum} = {%d, %d, %d}\n", -+ fat_tab->main_evm_2ss_cnt[mac_id], main_2ss_evm[0], main_2ss_evm[1], main_2ss_evm_sum); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_2ss_EVM{A,B,Sum} = {%d, %d, %d}\n", -+ fat_tab->aux_evm_2ss_cnt[mac_id], aux_2ss_evm[0], aux_2ss_evm[1], aux_2ss_evm_sum); -+ -+ if ((main_2ss_evm_sum + aux_2ss_evm_sum) != 0) { -+ decision_evm_ss = 2; -+ main_evm = main_2ss_evm_sum; -+ aux_evm = aux_2ss_evm_sum; -+ fat_tab->target_ant_evm = target_ant_evm_2ss; -+ } else { -+ decision_evm_ss = 1; -+ main_evm = main_1ss_evm; -+ aux_evm = aux_1ss_evm; -+ fat_tab->target_ant_evm = target_ant_evm_1ss; -+ } -+ -+ if ((main_evm == 0 || aux_evm == 0)) -+ diff_EVM = 100; -+ else if (main_evm >= aux_evm) -+ diff_EVM = main_evm - aux_evm; -+ else -+ diff_EVM = aux_evm - main_evm; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "***2.TargetAnt_EVM((%d-ss)) = ((%s))\n", decision_evm_ss, (fat_tab->target_ant_evm == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ -+ //3 [TP statistic] -+ main_tp_avg = (fat_tab->main_tp_cnt != 0) ? (fat_tab->main_tp / fat_tab->main_tp_cnt) : 0; -+ aux_tp_avg = (fat_tab->aux_tp_cnt != 0) ? (fat_tab->aux_tp / fat_tab->aux_tp_cnt) : 0; -+ tp_diff_avg = DIFF_2(main_tp_avg, aux_tp_avg); -+ fat_tab->target_ant_tp = (tp_diff_avg < 100) ? (fat_tab->pre_target_ant_enhance) : ((main_tp_avg >= aux_tp_avg) ? MAIN_ANT : AUX_ANT); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Main_TP = ((%d))\n", fat_tab->main_tp_cnt, main_tp_avg); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Cnt = ((%d)), Aux_TP = ((%d))\n", fat_tab->aux_tp_cnt, aux_tp_avg); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "***3.TargetAnt_TP = ((%s))\n", (fat_tab->target_ant_tp == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ -+ /*Reset TP Method */ -+ fat_tab->main_tp = 0; -+ fat_tab->aux_tp = 0; -+ fat_tab->main_tp_cnt = 0; -+ fat_tab->aux_tp_cnt = 0; -+ -+ /* @2 [ Decision state ] */ -+ #if 1 -+ if (main_max_idx == aux_max_idx && ((main_cnt_all + aux_cnt_all) != 0)) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Decision EVM, main_max_idx = ((MCS%d)), aux_max_idx = ((MCS%d))\n", main_max_idx, aux_max_idx); -+ fat_tab->target_ant_enhance = fat_tab->target_ant_evm; -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Decision TP, main_max_idx = ((MCS%d)), aux_max_idx = ((MCS%d))\n", main_max_idx, aux_max_idx); -+ fat_tab->target_ant_enhance = fat_tab->target_ant_tp; -+ } -+ #else -+ if (fat_tab->target_ant_evm == fat_tab->target_ant_crc32) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 1, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM); -+ -+ if ((utility_ratio < 2 && force_antenna == false) && diff_EVM <= 30) -+ fat_tab->target_ant_enhance = fat_tab->pre_target_ant_enhance; -+ else -+ fat_tab->target_ant_enhance = fat_tab->target_ant_evm; -+ } -+ #if 0 -+ else if ((diff_EVM <= 50 && (utility_ratio > 4 && force_antenna == false)) || (force_antenna == true)) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 2, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM); -+ fat_tab->target_ant_enhance = fat_tab->target_ant_crc32; -+ } -+ #endif -+ else if (diff_EVM >= 20) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 3, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM); -+ fat_tab->target_ant_enhance = fat_tab->target_ant_evm; -+ } else if (utility_ratio >= 6 && force_antenna == false) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 4, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM); -+ fat_tab->target_ant_enhance = fat_tab->target_ant_crc32; -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Decision type 5, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM); -+ -+ if (force_antenna == true) -+ score_CRC = 2; -+ else if (utility_ratio >= 5) /*@>2.5*/ -+ score_CRC = 2; -+ else if (utility_ratio >= 4) /*@>2*/ -+ score_CRC = 1; -+ else -+ score_CRC = 0; -+ -+ if (diff_EVM >= 15) -+ score_EVM = 3; -+ else if (diff_EVM >= 10) -+ score_EVM = 2; -+ else if (diff_EVM >= 5) -+ score_EVM = 1; -+ else -+ score_EVM = 0; -+ -+ if (score_CRC > score_EVM) -+ fat_tab->target_ant_enhance = fat_tab->target_ant_crc32; -+ else if (score_CRC < score_EVM) -+ fat_tab->target_ant_enhance = fat_tab->target_ant_evm; -+ else -+ fat_tab->target_ant_enhance = fat_tab->pre_target_ant_enhance; -+ } -+ #endif -+ fat_tab->pre_target_ant_enhance = fat_tab->target_ant_enhance; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "*** 4.TargetAnt_enhance = (( %s ))******\n", (fat_tab->target_ant_enhance == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ } -+ } else { /* RSSI< = evm_rssi_th_low */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ TH_L ]\n"); -+ odm_evm_fast_ant_reset(dm); -+ } -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[escape from> TH_H || evm_method_enable==1]\n"); -+ odm_evm_fast_ant_reset(dm); -+ } -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[multi-Client]\n"); -+ odm_evm_fast_ant_reset(dm); -+ } -+ } -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phydm_evm_antdiv_callback( -+ struct phydm_timer_list *timer) -+{ -+ void *adapter = (void *)timer->Adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+ #if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ #if USE_WORKITEM -+ odm_schedule_work_item(&dm->phydm_evm_antdiv_workitem); -+ #else -+ { -+ odm_hw_ant_div(dm); -+ } -+ #endif -+ #else -+ odm_schedule_work_item(&dm->phydm_evm_antdiv_workitem); -+ #endif -+} -+ -+void phydm_evm_antdiv_workitem_callback( -+ void *context) -+{ -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+ odm_hw_ant_div(dm); -+} -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+void phydm_evm_antdiv_callback(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *padapter = dm->adapter; -+ -+ if (*dm->is_net_closed) -+ return; -+ if (dm->support_interface == ODM_ITRF_PCIE) { -+ odm_hw_ant_div(dm); -+ } else { -+ /* @Can't do I/O in timer callback*/ -+ phydm_run_in_thread_cmd(dm, -+ phydm_evm_antdiv_workitem_callback, -+ padapter); -+ } -+} -+ -+void phydm_evm_antdiv_workitem_callback(void *context) -+{ -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->odmpriv; -+ -+ odm_hw_ant_div(dm); -+} -+ -+#else -+void phydm_evm_antdiv_callback( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "******AntDiv_Callback******\n"); -+ odm_hw_ant_div(dm); -+} -+#endif -+ -+#endif -+ -+void odm_hw_ant_div(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 i, min_max_rssi = 0xFF, ant_div_max_rssi = 0, max_rssi = 0; -+ u32 main_rssi, aux_rssi, mian_cnt, aux_cnt, local_max_rssi; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u8 rx_idle_ant = fat_tab->rx_idle_ant, target_ant = 7; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct cmn_sta_info *sta; -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; -+ u32 TH1 = 500000; -+ u32 TH2 = 10000000; -+ u32 ma_rx_temp, degrade_TP_temp, improve_TP_temp; -+ u8 monitor_rssi_threshold = 30; -+ -+ dm_bdc_table->BF_pass = true; -+ dm_bdc_table->DIV_pass = true; -+ dm_bdc_table->is_all_div_sta_idle = true; -+ dm_bdc_table->is_all_bf_sta_idle = true; -+ dm_bdc_table->num_bf_tar = 0; -+ dm_bdc_table->num_div_tar = 0; -+ dm_bdc_table->num_client = 0; -+#endif -+#endif -+ -+ if (!dm->is_linked) { /* @is_linked==False */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n"); -+ -+ if (fat_tab->is_become_linked) { -+ if (fat_tab->div_path_type == ANT_PATH_A) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ else if (fat_tab->div_path_type == ANT_PATH_B) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B); -+ else if (fat_tab->div_path_type == ANT_PATH_AB) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB); -+ odm_update_rx_idle_ant(dm, MAIN_ANT); -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ dm->antdiv_period = 0; -+ -+ fat_tab->is_become_linked = dm->is_linked; -+ } -+ return; -+ } else { -+ if (!fat_tab->is_become_linked) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n"); -+ if (fat_tab->div_path_type == ANT_PATH_A) -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); -+ else if (fat_tab->div_path_type == ANT_PATH_B) -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B); -+ else if (fat_tab->div_path_type == ANT_PATH_AB) -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_AB); -+ #if 0 -+ /*odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC);*/ -+ -+ /* @if(dm->support_ic_type == ODM_RTL8821 ) */ -+ /* odm_set_bb_reg(dm, R_0x800, BIT(25), 0); */ -+ /* CCK AntDiv function disable */ -+ -+ /* @#if(DM_ODM_SUPPORT_TYPE == ODM_AP) */ -+ /* @else if(dm->support_ic_type == ODM_RTL8881A) */ -+ /* odm_set_bb_reg(dm, R_0x800, BIT(25), 0); */ -+ /* CCK AntDiv function disable */ -+ /* @#endif */ -+ -+ /* @else if(dm->support_ic_type == ODM_RTL8723B ||*/ -+ /* @dm->support_ic_type == ODM_RTL8812) */ -+ /* odm_set_bb_reg(dm, R_0xa00, BIT(15), 0); */ -+ /* CCK AntDiv function disable */ -+ #endif -+ -+ fat_tab->is_become_linked = dm->is_linked; -+ -+ if (dm->support_ic_type == ODM_RTL8723B && -+ dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ odm_set_bb_reg(dm, R_0x930, 0xF0, 8); -+ /* @DPDT_P = ANTSEL[0] for 8723B AntDiv */ -+ odm_set_bb_reg(dm, R_0x930, 0xF, 8); -+ /* @DPDT_N = ANTSEL[0] */ -+ } -+ -+ /* @ BDC Init */ -+ #ifdef PHYDM_BEAMFORMING_SUPPORT -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ odm_bdc_init(dm); -+ #endif -+ #endif -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ odm_evm_fast_ant_reset(dm); -+ #endif -+ } -+ } -+ -+ if (!(*fat_tab->p_force_tx_by_desc)) { -+ if (dm->is_one_entry_only) -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ else -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); -+ } -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ if (dm->antdiv_evm_en == 1) { -+ odm_evm_enhance_ant_div(dm); -+ if (fat_tab->fat_state_cnt != 0) -+ return; -+ } else -+ odm_evm_fast_ant_reset(dm); -+#endif -+ -+/* @2 BDC mode Arbitration */ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (dm->antdiv_evm_en == 0 || fat_tab->evm_method_enable == 0) -+ odm_bf_ant_div_mode_arbitration(dm); -+#endif -+#endif -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ sta = dm->phydm_sta_info[i]; -+ if (!is_sta_active(sta)) { -+ phydm_antdiv_reset_statistic(dm, i); -+ continue; -+ } -+ -+ /* @2 Caculate RSSI per Antenna */ -+ if (fat_tab->main_cnt[i] != 0 || fat_tab->aux_cnt[i] != 0) { -+ mian_cnt = fat_tab->main_cnt[i]; -+ aux_cnt = fat_tab->aux_cnt[i]; -+ main_rssi = (mian_cnt != 0) ? -+ (fat_tab->main_sum[i] / mian_cnt) : 0; -+ aux_rssi = (aux_cnt != 0) ? -+ (fat_tab->aux_sum[i] / aux_cnt) : 0; -+ target_ant = (mian_cnt == aux_cnt) ? -+ fat_tab->rx_idle_ant : -+ ((mian_cnt >= aux_cnt) ? -+ fat_tab->ant_idx_vec[0]:fat_tab->ant_idx_vec[1]); -+ /*Use counter number for OFDM*/ -+ -+ } else { /*@CCK only case*/ -+ mian_cnt = fat_tab->main_cnt_cck[i]; -+ aux_cnt = fat_tab->aux_cnt_cck[i]; -+ main_rssi = (mian_cnt != 0) ? -+ (fat_tab->main_sum_cck[i] / mian_cnt) : 0; -+ aux_rssi = (aux_cnt != 0) ? -+ (fat_tab->aux_sum_cck[i] / aux_cnt) : 0; -+ target_ant = (main_rssi == aux_rssi) ? -+ fat_tab->rx_idle_ant : -+ ((main_rssi >= aux_rssi) ? -+ fat_tab->ant_idx_vec[0]:fat_tab->ant_idx_vec[1]); -+ /*Use RSSI for CCK only case*/ -+ } -+#if (RTL8721D_SUPPORT) -+ if(dm->antdiv_gpio == ANTDIV_GPIO_PB1PB2PB26) { /* added by Jiao Qi on May.25,2020, only for 3 antenna diversity */ -+ u8 tmp; -+ if(target_ant == fat_tab->ant_idx_vec[0]){/* switch the second & third ant index */ -+ tmp = fat_tab->ant_idx_vec[1]; -+ fat_tab->ant_idx_vec[1] = fat_tab->ant_idx_vec[2]; -+ fat_tab->ant_idx_vec[2] = tmp; -+ }else{ -+ /* switch the first & second ant index */ -+ tmp = fat_tab->ant_idx_vec[0]; -+ fat_tab->ant_idx_vec[0] = fat_tab->ant_idx_vec[1]; -+ fat_tab->ant_idx_vec[1] = tmp; -+ /* switch the second & third ant index */ -+ tmp = fat_tab->ant_idx_vec[1]; -+ fat_tab->ant_idx_vec[1] = fat_tab->ant_idx_vec[2]; -+ fat_tab->ant_idx_vec[2] = tmp; -+ } -+ } -+#endif -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*** Client[ %d ] : Main_Cnt = (( %d )) , CCK_Main_Cnt = (( %d )) , main_rssi= (( %d ))\n", -+ i, fat_tab->main_cnt[i], -+ fat_tab->main_cnt_cck[i], main_rssi); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*** Client[ %d ] : Aux_Cnt = (( %d )) , CCK_Aux_Cnt = (( %d )) , aux_rssi = (( %d ))\n", -+ i, fat_tab->aux_cnt[i], -+ fat_tab->aux_cnt_cck[i], aux_rssi); -+ -+ local_max_rssi = (main_rssi > aux_rssi) ? main_rssi : aux_rssi; -+ /* @ Select max_rssi for DIG */ -+ if (local_max_rssi > ant_div_max_rssi && local_max_rssi < 40) -+ ant_div_max_rssi = local_max_rssi; -+ if (local_max_rssi > max_rssi) -+ max_rssi = local_max_rssi; -+ -+ /* @ Select RX Idle Antenna */ -+ if (local_max_rssi != 0 && local_max_rssi < min_max_rssi) { -+ rx_idle_ant = target_ant; -+ min_max_rssi = local_max_rssi; -+ } -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ if (dm->antdiv_evm_en == 1) { -+ if (fat_tab->target_ant_enhance != 0xFF) { -+ target_ant = fat_tab->target_ant_enhance; -+ rx_idle_ant = fat_tab->target_ant_enhance; -+ } -+ } -+#endif -+ -+ /* @2 Select TX Antenna */ -+ if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) { -+ #ifdef PHYDM_BEAMFORMING_SUPPORT -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (dm_bdc_table->w_bfee_client[i] == 0) -+ #endif -+ #endif -+ { -+ odm_update_tx_ant(dm, target_ant, i); -+ } -+ } -+ -+/* @------------------------------------------------------------ */ -+ -+ #ifdef PHYDM_BEAMFORMING_SUPPORT -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ dm_bdc_table->num_client++; -+ -+ if (dm_bdc_table->bdc_mode == BDC_MODE_2 || dm_bdc_table->bdc_mode == BDC_MODE_3) { -+ /* @2 Byte counter */ -+ -+ ma_rx_temp = sta->rx_moving_average_tp; /* RX TP ( bit /sec) */ -+ -+ if (dm_bdc_table->BDC_state == bdc_bfer_train_state) -+ dm_bdc_table->MA_rx_TP_DIV[i] = ma_rx_temp; -+ else -+ dm_bdc_table->MA_rx_TP[i] = ma_rx_temp; -+ -+ if (ma_rx_temp < TH2 && ma_rx_temp > TH1 && local_max_rssi <= monitor_rssi_threshold) { -+ if (dm_bdc_table->w_bfer_client[i] == 1) { /* @Bfer_Target */ -+ dm_bdc_table->num_bf_tar++; -+ -+ if (dm_bdc_table->BDC_state == BDC_DECISION_STATE && dm_bdc_table->bdc_try_flag == 0) { -+ improve_TP_temp = (dm_bdc_table->MA_rx_TP_DIV[i] * 9) >> 3; /* @* 1.125 */ -+ dm_bdc_table->BF_pass = (dm_bdc_table->MA_rx_TP[i] > improve_TP_temp) ? true : false; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : { MA_rx_TP,improve_TP_temp, MA_rx_TP_DIV, BF_pass}={ %d, %d, %d , %d }\n", i, dm_bdc_table->MA_rx_TP[i], improve_TP_temp, dm_bdc_table->MA_rx_TP_DIV[i], dm_bdc_table->BF_pass); -+ } -+ } else { /* @DIV_Target */ -+ dm_bdc_table->num_div_tar++; -+ -+ if (dm_bdc_table->BDC_state == BDC_DECISION_STATE && dm_bdc_table->bdc_try_flag == 0) { -+ degrade_TP_temp = (dm_bdc_table->MA_rx_TP_DIV[i] * 5) >> 3; /* @* 0.625 */ -+ dm_bdc_table->DIV_pass = (dm_bdc_table->MA_rx_TP[i] > degrade_TP_temp) ? true : false; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : { MA_rx_TP, degrade_TP_temp, MA_rx_TP_DIV, DIV_pass}=\n{ %d, %d, %d , %d }\n", i, dm_bdc_table->MA_rx_TP[i], degrade_TP_temp, dm_bdc_table->MA_rx_TP_DIV[i], dm_bdc_table->DIV_pass); -+ } -+ } -+ } -+ -+ if (ma_rx_temp > TH1) { -+ if (dm_bdc_table->w_bfer_client[i] == 1) /* @Bfer_Target */ -+ dm_bdc_table->is_all_bf_sta_idle = false; -+ else /* @DIV_Target */ -+ dm_bdc_table->is_all_div_sta_idle = false; -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*** Client[ %d ] : { BFmeeCap, BFmerCap} = { %d , %d }\n", -+ i, dm_bdc_table->w_bfee_client[i], -+ dm_bdc_table->w_bfer_client[i]); -+ -+ if (dm_bdc_table->BDC_state == bdc_bfer_train_state) -+ PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : MA_rx_TP_DIV = (( %d ))\n", i, dm_bdc_table->MA_rx_TP_DIV[i]); -+ -+ else -+ PHYDM_DBG(dm, DBG_ANT_DIV, "*** Client[ %d ] : MA_rx_TP = (( %d ))\n", i, dm_bdc_table->MA_rx_TP[i]); -+ } -+ #endif -+ #endif -+ -+ #ifdef PHYDM_BEAMFORMING_SUPPORT -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (dm_bdc_table->bdc_try_flag == 0) -+ #endif -+ #endif -+ { -+ phydm_antdiv_reset_statistic(dm, i); -+ } -+ } -+ -+/* @2 Set RX Idle Antenna & TX Antenna(Because of HW Bug ) */ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ PHYDM_DBG(dm, DBG_ANT_DIV, "*** rx_idle_ant = (( %s ))\n", -+ (rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (dm_bdc_table->bdc_mode == BDC_MODE_1 || dm_bdc_table->bdc_mode == BDC_MODE_3) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*** bdc_rx_idle_update_counter = (( %d ))\n", -+ dm_bdc_table->bdc_rx_idle_update_counter); -+ -+ if (dm_bdc_table->bdc_rx_idle_update_counter == 1) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***Update RxIdle Antenna!!!\n"); -+ dm_bdc_table->bdc_rx_idle_update_counter = 30; -+ odm_update_rx_idle_ant(dm, rx_idle_ant); -+ } else { -+ dm_bdc_table->bdc_rx_idle_update_counter--; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***NOT update RxIdle Antenna because of BF ( need to fix TX-ant)\n"); -+ } -+ } else -+#endif -+#endif -+ odm_update_rx_idle_ant(dm, rx_idle_ant); -+#else -+#if (RTL8721D_SUPPORT) -+if (dm->antdiv_gpio == ANTDIV_GPIO_PB1PB2PB26) { -+ if(odm_get_bb_reg(dm,R_0xc50,0x80) || odm_get_bb_reg(dm, R_0xa00, 0x8000)) -+ odm_update_rx_idle_ant_sp3t(dm, rx_idle_ant); -+} -+else -+#endif -+ odm_update_rx_idle_ant(dm, rx_idle_ant); -+ -+#endif /* @#if(DM_ODM_SUPPORT_TYPE == ODM_AP) */ -+ -+/* @2 BDC Main Algorithm */ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (dm->antdiv_evm_en == 0 || fat_tab->evm_method_enable == 0) -+ odm_bd_ccoex_bfee_rx_div_arbitration(dm); -+ -+ dm_bdc_table->num_txbfee_client = 0; -+ dm_bdc_table->num_txbfer_client = 0; -+#endif -+#endif -+ -+ if (ant_div_max_rssi == 0) -+ dig_t->ant_div_rssi_max = dm->rssi_min; -+ else -+ dig_t->ant_div_rssi_max = ant_div_max_rssi; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "***AntDiv End***\n\n"); -+} -+ -+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ -+void odm_s0s1_sw_ant_div_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ fat_tab->is_become_linked = false; -+ swat_tab->try_flag = SWAW_STEP_INIT; -+ swat_tab->double_chk_flag = 0; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s: fat_tab->is_become_linked = %d\n", -+ __func__, fat_tab->is_become_linked); -+} -+ -+void phydm_sw_antdiv_train_time(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ u8 high_traffic_train_time_u = 0x32, high_traffic_train_time_l = 0; -+ u8 low_traffic_train_time_u = 200, low_traffic_train_time_l = 0; -+ u8 train_time_temp; -+ -+ if (dm->traffic_load == TRAFFIC_HIGH) { -+ train_time_temp = swat_tab->train_time; -+ -+ if (swat_tab->train_time_flag == 3) { -+ high_traffic_train_time_l = 0xa; -+ -+ if (train_time_temp <= 16) -+ train_time_temp = high_traffic_train_time_l; -+ else -+ train_time_temp -= 16; -+ -+ } else if (swat_tab->train_time_flag == 2) { -+ train_time_temp -= 8; -+ high_traffic_train_time_l = 0xf; -+ } else if (swat_tab->train_time_flag == 1) { -+ train_time_temp -= 4; -+ high_traffic_train_time_l = 0x1e; -+ } else if (swat_tab->train_time_flag == 0) { -+ train_time_temp += 8; -+ high_traffic_train_time_l = 0x28; -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8188F) { -+ if (dm->support_interface == ODM_ITRF_SDIO) -+ high_traffic_train_time_l += 0xa; -+ } -+ -+ /* @-- */ -+ if (train_time_temp > high_traffic_train_time_u) -+ train_time_temp = high_traffic_train_time_u; -+ -+ else if (train_time_temp < high_traffic_train_time_l) -+ train_time_temp = high_traffic_train_time_l; -+ -+ swat_tab->train_time = train_time_temp; /*@10ms~200ms*/ -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "train_time_flag=((%d)), train_time=((%d))\n", -+ swat_tab->train_time_flag, -+ swat_tab->train_time); -+ -+ } else if ((dm->traffic_load == TRAFFIC_MID) || -+ (dm->traffic_load == TRAFFIC_LOW)) { -+ train_time_temp = swat_tab->train_time; -+ -+ if (swat_tab->train_time_flag == 3) { -+ low_traffic_train_time_l = 10; -+ if (train_time_temp < 50) -+ train_time_temp = low_traffic_train_time_l; -+ else -+ train_time_temp -= 50; -+ } else if (swat_tab->train_time_flag == 2) { -+ train_time_temp -= 30; -+ low_traffic_train_time_l = 36; -+ } else if (swat_tab->train_time_flag == 1) { -+ train_time_temp -= 10; -+ low_traffic_train_time_l = 40; -+ } else { -+ train_time_temp += 10; -+ low_traffic_train_time_l = 50; -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8188F) { -+ if (dm->support_interface == ODM_ITRF_SDIO) -+ low_traffic_train_time_l += 10; -+ } -+ -+ /* @-- */ -+ if (train_time_temp >= low_traffic_train_time_u) -+ train_time_temp = low_traffic_train_time_u; -+ -+ else if (train_time_temp <= low_traffic_train_time_l) -+ train_time_temp = low_traffic_train_time_l; -+ -+ swat_tab->train_time = train_time_temp; /*@10ms~200ms*/ -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "train_time_flag=((%d)) , train_time=((%d))\n", -+ swat_tab->train_time_flag, swat_tab->train_time); -+ -+ } else { -+ swat_tab->train_time = 0xc8; /*@200ms*/ -+ } -+} -+ -+void phydm_sw_antdiv_decision(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u32 i, min_max_rssi = 0xFF, local_max_rssi, local_min_rssi; -+ u32 main_rssi, aux_rssi; -+ u8 rx_idle_ant = swat_tab->pre_ant; -+ u8 target_ant = swat_tab->pre_ant, next_ant = 0; -+ struct cmn_sta_info *entry = NULL; -+ u32 main_cnt = 0, aux_cnt = 0, main_sum = 0, aux_sum = 0; -+ u32 main_ctrl_cnt = 0, aux_ctrl_cnt = 0; -+ boolean is_by_ctrl_frame = false; -+ boolean cond_23d_main, cond_23d_aux; -+ u64 pkt_cnt_total = 0; -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ entry = dm->phydm_sta_info[i]; -+ if (!is_sta_active(entry)) { -+ phydm_antdiv_reset_statistic(dm, i); -+ continue; -+ } -+ -+ /* @2 Caculate RSSI per Antenna */ -+ if (fat_tab->main_cnt[i] != 0 || fat_tab->aux_cnt[i] != 0) { -+ main_cnt = (u32)fat_tab->main_cnt[i]; -+ aux_cnt = (u32)fat_tab->aux_cnt[i]; -+ main_rssi = (main_cnt != 0) ? -+ (fat_tab->main_sum[i] / main_cnt) : 0; -+ aux_rssi = (aux_cnt != 0) ? -+ (fat_tab->aux_sum[i] / aux_cnt) : 0; -+ if (dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8710C) { -+ cond_23d_main = (aux_cnt > main_cnt) && -+ ((main_rssi - aux_rssi < 5) || -+ (aux_rssi > main_rssi)); -+ cond_23d_aux = (main_cnt > aux_cnt) && -+ ((aux_rssi - main_rssi < 5) || -+ (main_rssi > aux_rssi)); -+ if (swat_tab->pre_ant == MAIN_ANT) { -+ if (main_cnt == 0) -+ target_ant = (aux_cnt != 0) ? -+ AUX_ANT : -+ swat_tab->pre_ant; -+ else -+ target_ant = cond_23d_main ? -+ AUX_ANT : -+ swat_tab->pre_ant; -+ } else { -+ if (aux_cnt == 0) -+ target_ant = (main_cnt != 0) ? -+ MAIN_ANT : -+ swat_tab->pre_ant; -+ else -+ target_ant = cond_23d_aux ? -+ MAIN_ANT : -+ swat_tab->pre_ant; -+ } -+ } else { -+ if (swat_tab->pre_ant == MAIN_ANT) { -+ target_ant = (aux_rssi > main_rssi) ? -+ AUX_ANT : -+ swat_tab->pre_ant; -+ } else if (swat_tab->pre_ant == AUX_ANT) { -+ target_ant = (main_rssi > aux_rssi) ? -+ MAIN_ANT : -+ swat_tab->pre_ant; -+ } -+ } -+ } else { /*@CCK only case*/ -+ main_cnt = fat_tab->main_cnt_cck[i]; -+ aux_cnt = fat_tab->aux_cnt_cck[i]; -+ main_rssi = (main_cnt != 0) ? -+ (fat_tab->main_sum_cck[i] / main_cnt) : 0; -+ aux_rssi = (aux_cnt != 0) ? -+ (fat_tab->aux_sum_cck[i] / aux_cnt) : 0; -+ target_ant = (main_rssi == aux_rssi) ? -+ swat_tab->pre_ant : -+ ((main_rssi >= aux_rssi) ? -+ MAIN_ANT : AUX_ANT); -+ /*Use RSSI for CCK only case*/ -+ } -+ local_max_rssi = (main_rssi >= aux_rssi) ? main_rssi : aux_rssi; -+ local_min_rssi = (main_rssi >= aux_rssi) ? aux_rssi : main_rssi; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*** CCK_counter_main = (( %d )) , CCK_counter_aux= (( %d ))\n", -+ fat_tab->main_cnt_cck[i], fat_tab->aux_cnt_cck[i]); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*** OFDM_counter_main = (( %d )) , OFDM_counter_aux= (( %d ))\n", -+ fat_tab->main_cnt[i], fat_tab->aux_cnt[i]); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*** main_Cnt = (( %d )) , aux_Cnt = (( %d ))\n", -+ main_cnt, aux_cnt); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*** main_rssi= (( %d )) , aux_rssi = (( %d ))\n", -+ main_rssi, aux_rssi); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*** MAC ID:[ %d ] , target_ant = (( %s ))\n", i, -+ (target_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -+ -+ /* @2 Select RX Idle Antenna */ -+ -+ if (local_max_rssi != 0 && local_max_rssi < min_max_rssi) { -+ rx_idle_ant = target_ant; -+ min_max_rssi = local_max_rssi; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "*** local_max_rssi-local_min_rssi = ((%d))\n", -+ (local_max_rssi - local_min_rssi)); -+ -+ if ((local_max_rssi - local_min_rssi) > 8) { -+ if (local_min_rssi != 0) { -+ swat_tab->train_time_flag = 3; -+ } else { -+ if (min_max_rssi > RSSI_CHECK_THRESHOLD) -+ swat_tab->train_time_flag = 0; -+ else -+ swat_tab->train_time_flag = 3; -+ } -+ } else if ((local_max_rssi - local_min_rssi) > 5) { -+ swat_tab->train_time_flag = 2; -+ } else if ((local_max_rssi - local_min_rssi) > 2) { -+ swat_tab->train_time_flag = 1; -+ } else { -+ swat_tab->train_time_flag = 0; -+ } -+ } -+ -+ /* @2 Select TX Antenna */ -+ if (target_ant == MAIN_ANT) -+ fat_tab->antsel_a[i] = ANT1_2G; -+ else -+ fat_tab->antsel_a[i] = ANT2_2G; -+ -+ phydm_antdiv_reset_statistic(dm, i); -+ pkt_cnt_total += (main_cnt + aux_cnt); -+ } -+ -+ if (swat_tab->is_sw_ant_div_by_ctrl_frame) { -+ odm_s0s1_sw_ant_div_by_ctrl_frame(dm, SWAW_STEP_DETERMINE); -+ is_by_ctrl_frame = true; -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Control frame packet counter = %d, data frame packet counter = %llu\n", -+ swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame, pkt_cnt_total); -+ -+ if (min_max_rssi == 0xff || ((pkt_cnt_total < -+ (swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame >> 1)) && -+ dm->phy_dbg_info.num_qry_beacon_pkt < 2)) { -+ min_max_rssi = 0; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Check RSSI of control frame because min_max_rssi == 0xff\n"); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "is_by_ctrl_frame = %d\n", -+ is_by_ctrl_frame); -+ -+ if (is_by_ctrl_frame) { -+ main_ctrl_cnt = fat_tab->main_ctrl_cnt; -+ aux_ctrl_cnt = fat_tab->aux_ctrl_cnt; -+ main_rssi = (main_ctrl_cnt != 0) ? -+ (fat_tab->main_ctrl_sum / main_ctrl_cnt) : -+ 0; -+ aux_rssi = (aux_ctrl_cnt != 0) ? -+ (fat_tab->aux_ctrl_sum / aux_ctrl_cnt) : 0; -+ -+ if (main_ctrl_cnt <= 1 && -+ fat_tab->cck_ctrl_frame_cnt_main >= 1) -+ main_rssi = 0; -+ -+ if (aux_ctrl_cnt <= 1 && -+ fat_tab->cck_ctrl_frame_cnt_aux >= 1) -+ aux_rssi = 0; -+ -+ if (main_rssi != 0 || aux_rssi != 0) { -+ rx_idle_ant = (main_rssi == aux_rssi) ? -+ swat_tab->pre_ant : -+ ((main_rssi >= aux_rssi) ? -+ MAIN_ANT : AUX_ANT); -+ local_max_rssi = (main_rssi >= aux_rssi) ? -+ main_rssi : aux_rssi; -+ local_min_rssi = (main_rssi >= aux_rssi) ? -+ aux_rssi : main_rssi; -+ -+ if ((local_max_rssi - local_min_rssi) > 8) -+ swat_tab->train_time_flag = 3; -+ else if ((local_max_rssi - local_min_rssi) > 5) -+ swat_tab->train_time_flag = 2; -+ else if ((local_max_rssi - local_min_rssi) > 2) -+ swat_tab->train_time_flag = 1; -+ else -+ swat_tab->train_time_flag = 0; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Control frame: main_rssi = %d, aux_rssi = %d\n", -+ main_rssi, aux_rssi); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "rx_idle_ant decided by control frame = %s\n", -+ (rx_idle_ant == MAIN_ANT ? -+ "MAIN" : "AUX")); -+ } -+ } -+ } -+ -+ fat_tab->min_max_rssi = min_max_rssi; -+ swat_tab->try_flag = SWAW_STEP_PEEK; -+ -+ if (swat_tab->double_chk_flag == 1) { -+ swat_tab->double_chk_flag = 0; -+ -+ if (fat_tab->min_max_rssi > RSSI_CHECK_THRESHOLD) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ " [Double check] min_max_rssi ((%d)) > %d again!!\n", -+ fat_tab->min_max_rssi, RSSI_CHECK_THRESHOLD); -+ -+ odm_update_rx_idle_ant(dm, rx_idle_ant); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[reset try_flag = 0] Training accomplished !!!]\n\n\n"); -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ " [Double check] min_max_rssi ((%d)) <= %d !!\n", -+ fat_tab->min_max_rssi, RSSI_CHECK_THRESHOLD); -+ -+ next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? -+ AUX_ANT : MAIN_ANT; -+ swat_tab->try_flag = SWAW_STEP_PEEK; -+ swat_tab->reset_idx = RSSI_CHECK_RESET_PERIOD; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[set try_flag=0] Normal state: Need to tryg again!!\n\n\n"); -+ } -+ } else { -+ if (fat_tab->min_max_rssi < RSSI_CHECK_THRESHOLD) -+ swat_tab->reset_idx = RSSI_CHECK_RESET_PERIOD; -+ -+ swat_tab->pre_ant = rx_idle_ant; -+ odm_update_rx_idle_ant(dm, rx_idle_ant); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[reset try_flag = 0] Training accomplished !!!]\n\n\n"); -+ } -+} -+ -+void odm_s0s1_sw_ant_div(void *dm_void, u8 step) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u32 value32; -+ u8 next_ant = 0; -+ -+ if (!dm->is_linked) { /* @is_linked==False */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n"); -+ if (fat_tab->is_become_linked == true) { -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ if (dm->support_ic_type == ODM_RTL8723B) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Set REG 948[9:6]=0x0\n"); -+ odm_set_bb_reg(dm, R_0x948, 0x3c0, 0x0); -+ } -+ fat_tab->is_become_linked = dm->is_linked; -+ } -+ return; -+ } else { -+ if (fat_tab->is_become_linked == false) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n"); -+ -+ if (dm->support_ic_type == ODM_RTL8723B) { -+ value32 = odm_get_bb_reg(dm, R_0x864, 0x38); -+ -+#if (RTL8723B_SUPPORT == 1) -+ if (value32 == 0x0) -+ odm_update_rx_idle_ant_8723b(dm, -+ MAIN_ANT, -+ ANT1_2G, -+ ANT2_2G); -+ else if (value32 == 0x1) -+ odm_update_rx_idle_ant_8723b(dm, -+ AUX_ANT, -+ ANT2_2G, -+ ANT1_2G); -+#endif -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "8723B: First link! Force antenna to %s\n", -+ (value32 == 0x0 ? "MAIN" : "AUX")); -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8723D) { -+ value32 = odm_get_bb_reg(dm, R_0x864, 0x38); -+#if (RTL8723D_SUPPORT == 1) -+ if (value32 == 0x0) -+ odm_update_rx_idle_ant_8723d(dm, -+ MAIN_ANT, -+ ANT1_2G, -+ ANT2_2G); -+ else if (value32 == 0x1) -+ odm_update_rx_idle_ant_8723d(dm, -+ AUX_ANT, -+ ANT2_2G, -+ ANT1_2G); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "8723D: First link! Force antenna to %s\n", -+ (value32 == 0x0 ? "MAIN" : "AUX")); -+#endif -+ } -+ if (dm->support_ic_type == ODM_RTL8710C) { -+#if (RTL8710C_SUPPORT == 1) -+ value32 = (HAL_READ32(SYSTEM_CTRL_BASE, R_0x121c) & 0x800000); -+ if (value32 == 0x0) -+ odm_update_rx_idle_ant_8710c(dm, -+ MAIN_ANT, -+ ANT1_2G, -+ ANT2_2G); -+ else if (value32 == 0x1) -+ odm_update_rx_idle_ant_8710c(dm, -+ AUX_ANT, -+ ANT2_2G, -+ ANT1_2G); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "8710C: First link! Force antenna to %s\n", -+ (value32 == 0x0 ? "MAIN" : "AUX")); -+#endif -+ } -+ fat_tab->is_become_linked = dm->is_linked; -+ } -+ } -+ -+ if (!(*fat_tab->p_force_tx_by_desc)) { -+ if (dm->is_one_entry_only == true) -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ else -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[%d] { try_flag=(( %d )), step=(( %d )), double_chk_flag = (( %d )) }\n", -+ __LINE__, swat_tab->try_flag, step, -+ swat_tab->double_chk_flag); -+ -+ /* @ Handling step mismatch condition. */ -+ /* @ Peak step is not finished at last time. */ -+ /* @ Recover the variable and check again. */ -+ if (step != swat_tab->try_flag) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[step != try_flag] Need to Reset After Link\n"); -+ odm_sw_ant_div_rest_after_link(dm); -+ } -+ -+ if (swat_tab->try_flag == SWAW_STEP_INIT) { -+ swat_tab->try_flag = SWAW_STEP_PEEK; -+ swat_tab->train_time_flag = 0; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[set try_flag = 0] Prepare for peek!\n\n"); -+ return; -+ -+ } else { -+ /* @1 Normal state (Begin Trying) */ -+ if (swat_tab->try_flag == SWAW_STEP_PEEK) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "TxOkCnt=(( %llu )), RxOkCnt=(( %llu )), traffic_load = (%d))\n", -+ dm->cur_tx_ok_cnt, dm->cur_rx_ok_cnt, -+ dm->traffic_load); -+ phydm_sw_antdiv_train_time(dm); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Current min_max_rssi is ((%d))\n", -+ fat_tab->min_max_rssi); -+ -+ /* @---reset index--- */ -+ if (swat_tab->reset_idx >= RSSI_CHECK_RESET_PERIOD) { -+ fat_tab->min_max_rssi = 0; -+ swat_tab->reset_idx = 0; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, "reset_idx = (( %d ))\n", -+ swat_tab->reset_idx); -+ -+ swat_tab->reset_idx++; -+ -+ /* @---double check flag--- */ -+ if (fat_tab->min_max_rssi > RSSI_CHECK_THRESHOLD && -+ swat_tab->double_chk_flag == 0) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ " min_max_rssi is ((%d)), and > %d\n", -+ fat_tab->min_max_rssi, -+ RSSI_CHECK_THRESHOLD); -+ -+ swat_tab->double_chk_flag = 1; -+ swat_tab->try_flag = SWAW_STEP_DETERMINE; -+ swat_tab->rssi_trying = 0; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Test the current ant for (( %d )) ms again\n", -+ swat_tab->train_time); -+ odm_update_rx_idle_ant(dm, -+ fat_tab->rx_idle_ant); -+ odm_set_timer(dm, &swat_tab->sw_antdiv_timer, -+ swat_tab->train_time); /*@ms*/ -+ return; -+ } -+ -+ next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? -+ AUX_ANT : MAIN_ANT; -+ -+ swat_tab->try_flag = SWAW_STEP_DETERMINE; -+ -+ if (swat_tab->reset_idx <= 1) -+ swat_tab->rssi_trying = 2; -+ else -+ swat_tab->rssi_trying = 1; -+ -+ odm_s0s1_sw_ant_div_by_ctrl_frame(dm, SWAW_STEP_PEEK); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[set try_flag=1] Normal state: Begin Trying!!\n"); -+ -+ } else if ((swat_tab->try_flag == SWAW_STEP_DETERMINE) && -+ (swat_tab->double_chk_flag == 0)) { -+ next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? -+ AUX_ANT : MAIN_ANT; -+ swat_tab->rssi_trying--; -+ } -+ -+ /* @1 Decision state */ -+ if (swat_tab->try_flag == SWAW_STEP_DETERMINE && -+ swat_tab->rssi_trying == 0) { -+ phydm_sw_antdiv_decision(dm); -+ return; -+ } -+ } -+ -+ /* @1 4.Change TRX antenna */ -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "rssi_trying = (( %d )), ant: (( %s )) >>> (( %s ))\n", -+ swat_tab->rssi_trying, -+ (fat_tab->rx_idle_ant == MAIN_ANT ? "MAIN" : "AUX"), -+ (next_ant == MAIN_ANT ? "MAIN" : "AUX")); -+ -+ odm_update_rx_idle_ant(dm, next_ant); -+ -+ /* @1 5.Reset Statistics */ -+ -+ fat_tab->rx_idle_ant = next_ant; -+ -+ if (dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8710C) { -+ -+ if (fat_tab->rx_idle_ant == MAIN_ANT) { -+ fat_tab->main_sum[0] = 0; -+ fat_tab->main_cnt[0] = 0; -+ fat_tab->main_sum_cck[0] = 0; -+ fat_tab->main_cnt_cck[0] = 0; -+ } else { -+ fat_tab->aux_sum[0] = 0; -+ fat_tab->aux_cnt[0] = 0; -+ fat_tab->aux_sum_cck[0] = 0; -+ fat_tab->aux_cnt_cck[0] = 0; -+ } -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8188F) { -+ if (dm->support_interface == ODM_ITRF_SDIO) { -+ ODM_delay_us(200); -+ -+ if (fat_tab->rx_idle_ant == MAIN_ANT) { -+ fat_tab->main_sum[0] = 0; -+ fat_tab->main_cnt[0] = 0; -+ fat_tab->main_sum_cck[0] = 0; -+ fat_tab->main_cnt_cck[0] = 0; -+ } else { -+ fat_tab->aux_sum[0] = 0; -+ fat_tab->aux_cnt[0] = 0; -+ fat_tab->aux_sum_cck[0] = 0; -+ fat_tab->aux_cnt_cck[0] = 0; -+ } -+ } -+ } -+ /* @1 6.Set next timer (Trying state) */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, " Test ((%s)) ant for (( %d )) ms\n", -+ (next_ant == MAIN_ANT ? "MAIN" : "AUX"), -+ swat_tab->train_time); -+ odm_set_timer(dm, &swat_tab->sw_antdiv_timer, swat_tab->train_time); -+ /*@ms*/ -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void odm_sw_antdiv_callback(struct phydm_timer_list *timer) -+{ -+ void *adapter = (void *)timer->Adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct sw_antenna_switch *swat_tab = &hal_data->DM_OutSrc.dm_swat_table; -+ -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+#if USE_WORKITEM -+ odm_schedule_work_item(&swat_tab->phydm_sw_antenna_switch_workitem); -+#else -+ { -+#if 0 -+ /* @dbg_print("SW_antdiv_Callback"); */ -+#endif -+ odm_s0s1_sw_ant_div(&hal_data->DM_OutSrc, SWAW_STEP_DETERMINE); -+ } -+#endif -+#else -+ odm_schedule_work_item(&swat_tab->phydm_sw_antenna_switch_workitem); -+#endif -+} -+ -+void odm_sw_antdiv_workitem_callback(void *context) -+{ -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ -+#if 0 -+ /* @dbg_print("SW_antdiv_Workitem_Callback"); */ -+#endif -+ odm_s0s1_sw_ant_div(&hal_data->DM_OutSrc, SWAW_STEP_DETERMINE); -+} -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+void odm_sw_antdiv_workitem_callback(void *context) -+{ -+ void * -+ adapter = (void *)context; -+ HAL_DATA_TYPE -+ *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ -+#if 0 -+ /*@dbg_print("SW_antdiv_Workitem_Callback");*/ -+#endif -+ odm_s0s1_sw_ant_div(&hal_data->odmpriv, SWAW_STEP_DETERMINE); -+} -+ -+void odm_sw_antdiv_callback(void *function_context) -+{ -+ struct dm_struct *dm = (struct dm_struct *)function_context; -+ void *padapter = dm->adapter; -+ if (*dm->is_net_closed == true) -+ return; -+ -+#if 0 /* @Can't do I/O in timer callback*/ -+ odm_s0s1_sw_ant_div(dm, SWAW_STEP_DETERMINE); -+#else -+ rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback, -+ padapter); -+#endif -+} -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+void odm_sw_antdiv_callback(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "******AntDiv_Callback******\n"); -+ odm_s0s1_sw_ant_div(dm, SWAW_STEP_DETERMINE); -+} -+#endif -+ -+void odm_s0s1_sw_ant_div_by_ctrl_frame(void *dm_void, u8 step) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ switch (step) { -+ case SWAW_STEP_PEEK: -+ swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame = 0; -+ swat_tab->is_sw_ant_div_by_ctrl_frame = true; -+ fat_tab->main_ctrl_cnt = 0; -+ fat_tab->aux_ctrl_cnt = 0; -+ fat_tab->main_ctrl_sum = 0; -+ fat_tab->aux_ctrl_sum = 0; -+ fat_tab->cck_ctrl_frame_cnt_main = 0; -+ fat_tab->cck_ctrl_frame_cnt_aux = 0; -+ fat_tab->ofdm_ctrl_frame_cnt_main = 0; -+ fat_tab->ofdm_ctrl_frame_cnt_aux = 0; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "odm_S0S1_SwAntDivForAPMode(): Start peek and reset counter\n"); -+ break; -+ case SWAW_STEP_DETERMINE: -+ swat_tab->is_sw_ant_div_by_ctrl_frame = false; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "odm_S0S1_SwAntDivForAPMode(): Stop peek\n"); -+ break; -+ default: -+ swat_tab->is_sw_ant_div_by_ctrl_frame = false; -+ break; -+ } -+} -+ -+void odm_antsel_statistics_ctrl(void *dm_void, u8 antsel_tr_mux, -+ u32 rx_pwdb_all) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ if (antsel_tr_mux == ANT1_2G) { -+ fat_tab->main_ctrl_sum += rx_pwdb_all; -+ fat_tab->main_ctrl_cnt++; -+ } else { -+ fat_tab->aux_ctrl_sum += rx_pwdb_all; -+ fat_tab->aux_ctrl_cnt++; -+ } -+} -+ -+void odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(void *dm_void, -+ void *phy_info_void, -+ void *pkt_info_void -+ /* struct phydm_phyinfo_struct* phy_info, */ -+ /* struct phydm_perpkt_info_struct* pktinfo */ -+ ) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_phyinfo_struct *phy_info = NULL; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u8 rssi_cck; -+ -+ phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ -+ if (!(dm->support_ability & ODM_BB_ANT_DIV)) -+ return; -+ -+ if (dm->ant_div_type != S0S1_SW_ANTDIV) -+ return; -+ -+ /* @In try state */ -+ if (!swat_tab->is_sw_ant_div_by_ctrl_frame) -+ return; -+ -+ /* No HW error and match receiver address */ -+ if (!pktinfo->is_to_self) -+ return; -+ -+ swat_tab->pkt_cnt_sw_ant_div_by_ctrl_frame++; -+ -+ if (pktinfo->is_cck_rate) { -+ rssi_cck = phy_info->rx_mimo_signal_strength[RF_PATH_A]; -+ fat_tab->antsel_rx_keep_0 = (fat_tab->rx_idle_ant == MAIN_ANT) ? -+ ANT1_2G : ANT2_2G; -+ -+ if (fat_tab->antsel_rx_keep_0 == ANT1_2G) -+ fat_tab->cck_ctrl_frame_cnt_main++; -+ else -+ fat_tab->cck_ctrl_frame_cnt_aux++; -+ -+ odm_antsel_statistics_ctrl(dm, fat_tab->antsel_rx_keep_0, -+ rssi_cck); -+ } else { -+ fat_tab->antsel_rx_keep_0 = (fat_tab->rx_idle_ant == MAIN_ANT) ? -+ ANT1_2G : ANT2_2G; -+ -+ if (fat_tab->antsel_rx_keep_0 == ANT1_2G) -+ fat_tab->ofdm_ctrl_frame_cnt_main++; -+ else -+ fat_tab->ofdm_ctrl_frame_cnt_aux++; -+ -+ odm_antsel_statistics_ctrl(dm, fat_tab->antsel_rx_keep_0, -+ phy_info->rx_pwdb_all); -+ } -+} -+ -+#endif /* @#if (RTL8723B_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) */ -+ -+void odm_set_next_mac_addr_target(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct cmn_sta_info *entry; -+ u32 value32, i; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "%s ==>\n", __func__); -+ -+ if (dm->is_linked) { -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ if ((fat_tab->train_idx + 1) == ODM_ASSOCIATE_ENTRY_NUM) -+ fat_tab->train_idx = 0; -+ else -+ fat_tab->train_idx++; -+ -+ entry = dm->phydm_sta_info[fat_tab->train_idx]; -+ -+ if (is_sta_active(entry)) { -+ /*@Match MAC ADDR*/ -+ value32 = (entry->mac_addr[5] << 8) | entry->mac_addr[4]; -+ -+ odm_set_mac_reg(dm, R_0x7b4, 0xFFFF, value32); /*@0x7b4~0x7b5*/ -+ -+ value32 = (entry->mac_addr[3] << 24) | (entry->mac_addr[2] << 16) | (entry->mac_addr[1] << 8) | entry->mac_addr[0]; -+ -+ odm_set_mac_reg(dm, R_0x7b0, MASKDWORD, value32); /*@0x7b0~0x7b3*/ -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "fat_tab->train_idx=%d\n", -+ fat_tab->train_idx); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Training MAC addr = %x:%x:%x:%x:%x:%x\n", -+ entry->mac_addr[5], -+ entry->mac_addr[4], -+ entry->mac_addr[3], -+ entry->mac_addr[2], -+ entry->mac_addr[1], -+ entry->mac_addr[0]); -+ -+ break; -+ } -+ } -+ } -+} -+ -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ -+void odm_fast_ant_training( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ u32 max_rssi_path_a = 0, pckcnt_path_a = 0; -+ u8 i, target_ant_path_a = 0; -+ boolean is_pkt_filter_macth_path_a = false; -+#if (RTL8192E_SUPPORT == 1) -+ u32 max_rssi_path_b = 0, pckcnt_path_b = 0; -+ u8 target_ant_path_b = 0; -+ boolean is_pkt_filter_macth_path_b = false; -+#endif -+ -+ if (!dm->is_linked) { /* @is_linked==False */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n"); -+ -+ if (fat_tab->is_become_linked == true) { -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ phydm_fast_training_enable(dm, FAT_OFF); -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ fat_tab->is_become_linked = dm->is_linked; -+ } -+ return; -+ } else { -+ if (fat_tab->is_become_linked == false) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked!!!]\n"); -+ fat_tab->is_become_linked = dm->is_linked; -+ } -+ } -+ -+ if (!(*fat_tab->p_force_tx_by_desc)) { -+ if (dm->is_one_entry_only == true) -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ else -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8188E) -+ odm_set_bb_reg(dm, R_0x864, BIT(2) | BIT(1) | BIT(0), ((dm->fat_comb_a) - 1)); -+#if (RTL8192E_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8192E) { -+ odm_set_bb_reg(dm, R_0xb38, BIT(2) | BIT(1) | BIT(0), ((dm->fat_comb_a) - 1)); /* path-A */ /* ant combination=regB38[2:0]+1 */ -+ odm_set_bb_reg(dm, R_0xb38, BIT(18) | BIT(17) | BIT(16), ((dm->fat_comb_b) - 1)); /* path-B */ /* ant combination=regB38[18:16]+1 */ -+ } -+#endif -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "==>%s\n", __func__); -+ -+ /* @1 TRAINING STATE */ -+ if (fat_tab->fat_state == FAT_TRAINING_STATE) { -+ /* @2 Caculate RSSI per Antenna */ -+ -+ /* @3 [path-A]--------------------------- */ -+ for (i = 0; i < (dm->fat_comb_a); i++) { /* @i : antenna index */ -+ if (fat_tab->ant_rssi_cnt[i] == 0) -+ fat_tab->ant_ave_rssi[i] = 0; -+ else { -+ fat_tab->ant_ave_rssi[i] = fat_tab->ant_sum_rssi[i] / fat_tab->ant_rssi_cnt[i]; -+ is_pkt_filter_macth_path_a = true; -+ } -+ -+ if (fat_tab->ant_ave_rssi[i] > max_rssi_path_a) { -+ max_rssi_path_a = fat_tab->ant_ave_rssi[i]; -+ pckcnt_path_a = fat_tab->ant_rssi_cnt[i]; -+ target_ant_path_a = i; -+ } else if (fat_tab->ant_ave_rssi[i] == max_rssi_path_a) { -+ if (fat_tab->ant_rssi_cnt[i] > pckcnt_path_a) { -+ max_rssi_path_a = fat_tab->ant_ave_rssi[i]; -+ pckcnt_path_a = fat_tab->ant_rssi_cnt[i]; -+ target_ant_path_a = i; -+ } -+ } -+ -+ PHYDM_DBG( -+ "*** ant-index : [ %d ], counter = (( %d )), Avg RSSI = (( %d ))\n", -+ i, fat_tab->ant_rssi_cnt[i], -+ fat_tab->ant_ave_rssi[i]); -+ } -+ -+#if 0 -+#if (RTL8192E_SUPPORT == 1) -+ /* @3 [path-B]--------------------------- */ -+ for (i = 0; i < (dm->fat_comb_b); i++) { -+ if (fat_tab->antRSSIcnt_pathB[i] == 0) -+ fat_tab->antAveRSSI_pathB[i] = 0; -+ else { /* @(ant_rssi_cnt[i] != 0) */ -+ fat_tab->antAveRSSI_pathB[i] = fat_tab->antSumRSSI_pathB[i] / fat_tab->antRSSIcnt_pathB[i]; -+ is_pkt_filter_macth_path_b = true; -+ } -+ if (fat_tab->antAveRSSI_pathB[i] > max_rssi_path_b) { -+ max_rssi_path_b = fat_tab->antAveRSSI_pathB[i]; -+ pckcnt_path_b = fat_tab->antRSSIcnt_pathB[i]; -+ target_ant_path_b = (u8)i; -+ } -+ if (fat_tab->antAveRSSI_pathB[i] == max_rssi_path_b) { -+ if (fat_tab->antRSSIcnt_pathB > pckcnt_path_b) { -+ max_rssi_path_b = fat_tab->antAveRSSI_pathB[i]; -+ target_ant_path_b = (u8)i; -+ } -+ } -+ if (dm->fat_print_rssi == 1) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***{path-B}: Sum RSSI[%d] = (( %d )), cnt RSSI [%d] = (( %d )), Avg RSSI[%d] = (( %d ))\n", -+ i, fat_tab->antSumRSSI_pathB[i], i, -+ fat_tab->antRSSIcnt_pathB[i], i, -+ fat_tab->antAveRSSI_pathB[i]); -+ } -+ } -+#endif -+#endif -+ -+ /* @1 DECISION STATE */ -+ -+ /* @2 Select TRX Antenna */ -+ -+ phydm_fast_training_enable(dm, FAT_OFF); -+ -+ /* @3 [path-A]--------------------------- */ -+ if (is_pkt_filter_macth_path_a == false) { -+#if 0 -+ /* PHYDM_DBG(dm,DBG_ANT_DIV, "{path-A}: None Packet is matched\n"); */ -+#endif -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "{path-A}: None Packet is matched\n"); -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ } else { -+ PHYDM_DBG( -+ "target_ant_path_a = (( %d )) , max_rssi_path_a = (( %d ))\n", -+ target_ant_path_a, max_rssi_path_a); -+ -+ /* @3 [ update RX-optional ant ] Default RX is Omni, Optional RX is the best decision by FAT */ -+ if (dm->support_ic_type == ODM_RTL8188E) -+ odm_set_bb_reg(dm, R_0x864, BIT(8) | BIT(7) | BIT(6), target_ant_path_a); -+ else if (dm->support_ic_type == ODM_RTL8192E) -+ odm_set_bb_reg(dm, R_0xb38, BIT(8) | BIT(7) | BIT(6), target_ant_path_a); /* Optional RX [pth-A] */ -+ -+ /* @3 [ update TX ant ] */ -+ odm_update_tx_ant(dm, target_ant_path_a, (fat_tab->train_idx)); -+ -+ if (target_ant_path_a == 0) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ } -+#if 0 -+#if (RTL8192E_SUPPORT == 1) -+ /* @3 [path-B]--------------------------- */ -+ if (is_pkt_filter_macth_path_b == false) { -+ if (dm->fat_print_rssi == 1) -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***[%d]{path-B}: None Packet is matched\n\n\n", -+ __LINE__); -+ } else { -+ if (dm->fat_print_rssi == 1) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ " ***target_ant_path_b = (( %d )) *** max_rssi = (( %d ))***\n\n\n", -+ target_ant_path_b, max_rssi_path_b); -+ } -+ odm_set_bb_reg(dm, R_0xb38, BIT(21) | BIT20 | BIT19, target_ant_path_b); /* @Default RX is Omni, Optional RX is the best decision by FAT */ -+ odm_set_bb_reg(dm, R_0x80c, BIT(21), 1); /* Reg80c[21]=1'b1 //from TX Info */ -+ -+ fat_tab->antsel_pathB[fat_tab->train_idx] = target_ant_path_b; -+ } -+#endif -+#endif -+ -+ /* @2 Reset counter */ -+ for (i = 0; i < (dm->fat_comb_a); i++) { -+ fat_tab->ant_sum_rssi[i] = 0; -+ fat_tab->ant_rssi_cnt[i] = 0; -+ } -+ /*@ -+ #if (RTL8192E_SUPPORT == 1) -+ for(i=0; i<=(dm->fat_comb_b); i++) -+ { -+ fat_tab->antSumRSSI_pathB[i] = 0; -+ fat_tab->antRSSIcnt_pathB[i] = 0; -+ } -+ #endif -+ */ -+ -+ fat_tab->fat_state = FAT_PREPARE_STATE; -+ return; -+ } -+ -+ /* @1 NORMAL STATE */ -+ if (fat_tab->fat_state == FAT_PREPARE_STATE) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ Start Prepare state ]\n"); -+ -+ odm_set_next_mac_addr_target(dm); -+ -+ /* @2 Prepare Training */ -+ fat_tab->fat_state = FAT_TRAINING_STATE; -+ phydm_fast_training_enable(dm, FAT_ON); -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); -+ /* @enable HW AntDiv */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Start Training state]\n"); -+ -+ odm_set_timer(dm, &dm->fast_ant_training_timer, dm->antdiv_intvl); /* @ms */ -+ } -+} -+ -+void odm_fast_ant_training_callback( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ if (*(dm->is_net_closed) == true) -+ return; -+#endif -+ -+#if USE_WORKITEM -+ odm_schedule_work_item(&dm->fast_ant_training_workitem); -+#else -+ PHYDM_DBG(dm, DBG_ANT_DIV, "******%s******\n", __func__); -+ odm_fast_ant_training(dm); -+#endif -+} -+ -+void odm_fast_ant_training_work_item_callback( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "******%s******\n", __func__); -+ odm_fast_ant_training(dm); -+} -+ -+#endif -+ -+void odm_ant_div_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct sw_antenna_switch *swat_tab = &dm->dm_swat_table; -+ u8 i; -+ if (!(dm->support_ability & ODM_BB_ANT_DIV)) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] Not Support Antenna Diversity Function\n"); -+ return; -+ } -+/* @--- */ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_2G) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[2G AntDiv Init]: Only Support 2G Antenna Diversity Function\n"); -+ if (!(dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC)) -+ return; -+ } else if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_5G) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[5G AntDiv Init]: Only Support 5G Antenna Diversity Function\n"); -+ if (!(dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC)) -+ return; -+ } else if (fat_tab->ant_div_2g_5g == (ODM_ANTDIV_2G | ODM_ANTDIV_5G)) -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[2G & 5G AntDiv Init]:Support Both 2G & 5G Antenna Diversity Function\n"); -+ -+#endif -+ /* @--- */ -+ -+ /* @2 [--General---] */ -+ dm->antdiv_period = 0; -+ -+ fat_tab->is_become_linked = false; -+ fat_tab->ant_div_on_off = 0xff; -+ -+ for(i=0;i<3;i++) -+ fat_tab->ant_idx_vec[i]=i+1; /* initialize ant_idx_vec for SP3T */ -+ -+ -+/* @3 - AP - */ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ odm_bdc_init(dm); -+#endif -+#endif -+ -+/* @3 - WIN - */ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ swat_tab->ant_5g = MAIN_ANT; -+ swat_tab->ant_2g = MAIN_ANT; -+//#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+// swat_tab->ant_2g = MAIN_ANT; -+#endif -+ -+ /* @2 [---Set MAIN_ANT as default antenna if Auto-ant enable---] */ -+ if (fat_tab->div_path_type == ANT_PATH_A) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ else if (fat_tab->div_path_type == ANT_PATH_B) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B); -+ else if (fat_tab->div_path_type == ANT_PATH_AB) -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_AB); -+ -+ dm->ant_type = ODM_AUTO_ANT; -+ -+ fat_tab->rx_idle_ant = 0xff; -+ -+ if (dm->support_ic_type == ODM_RTL8710C) { -+ /* Soft ware*/ -+#if (RTL8710C_SUPPORT == 1) -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0xdc, HAL_READ32(SYSTEM_CTRL_BASE, R_0xdc) | BIT18 | BIT17 | BIT16); -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0xac, HAL_READ32(SYSTEM_CTRL_BASE, R_0xac) | BIT24 | BIT6); -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0x10, 0x307);// 1: enable gpio db32 clock , 1: enable gpio pclock -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0x08, 0x80000111); -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0x1208, 0x800000); -+ } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0xdc, HAL_READ32(SYSTEM_CTRL_BASE, R_0xdc) | BIT18 | BIT17); -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0xdc, HAL_READ32(SYSTEM_CTRL_BASE, R_0xdc) & (~BIT16)); -+ HAL_WRITE32(SYSTEM_CTRL_BASE, R_0xac, HAL_READ32(SYSTEM_CTRL_BASE, R_0xac) | BIT24 | BIT6); -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8710C Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+#endif -+ } -+ -+ /*to make RX-idle-antenna will be updated absolutly*/ -+ odm_update_rx_idle_ant(dm, MAIN_ANT); -+ phydm_keep_rx_ack_ant_by_tx_ant_time(dm, 0); -+ /* Timming issue: keep Rx ant after tx for ACK(5 x 3.2 mu = 16mu sec)*/ -+ -+ /* @2 [---Set TX Antenna---] */ -+ if (!fat_tab->p_force_tx_by_desc) { -+ fat_tab->force_tx_by_desc = 0; -+ fat_tab->p_force_tx_by_desc = &fat_tab->force_tx_by_desc; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, "p_force_tx_by_desc = %d\n", -+ *fat_tab->p_force_tx_by_desc); -+ -+ if (*fat_tab->p_force_tx_by_desc) -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); -+ else -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ -+ /* @2 [--88E---] */ -+ if (dm->support_ic_type == ODM_RTL8188E) { -+#if (RTL8188E_SUPPORT == 1) -+ /* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ -+ /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ -+ /* @dm->ant_div_type = CG_TRX_SMART_ANTDIV; */ -+ -+ if (dm->ant_div_type != CGCS_RX_HW_ANTDIV && -+ dm->ant_div_type != CG_TRX_HW_ANTDIV && -+ dm->ant_div_type != CG_TRX_SMART_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 88E Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ -+ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) -+ odm_rx_hw_ant_div_init_88e(dm); -+ else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) -+ odm_trx_hw_ant_div_init_88e(dm); -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) -+ odm_smart_hw_ant_div_init_88e(dm); -+#endif -+#endif -+ } -+ -+/* @2 [--92E---] */ -+#if (RTL8192E_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8192E) { -+ /* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ -+ /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ -+ /* @dm->ant_div_type = CG_TRX_SMART_ANTDIV; */ -+ -+ if (dm->ant_div_type != CGCS_RX_HW_ANTDIV && -+ dm->ant_div_type != CG_TRX_HW_ANTDIV && -+ dm->ant_div_type != CG_TRX_SMART_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8192E Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ -+ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) -+ odm_rx_hw_ant_div_init_92e(dm); -+ else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) -+ odm_trx_hw_ant_div_init_92e(dm); -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) -+ odm_smart_hw_ant_div_init_92e(dm); -+#endif -+ } -+#endif -+ -+ /* @2 [--92F---] */ -+#if (RTL8192F_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8192F) { -+ /* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ -+ /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ -+ /* @dm->ant_div_type = CG_TRX_SMART_ANTDIV; */ -+ -+ if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) { -+ if (dm->ant_div_type != CG_TRX_HW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8192F Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ } -+ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) -+ odm_rx_hw_ant_div_init_92f(dm); -+ else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) -+ odm_trx_hw_ant_div_init_92f(dm); -+ } -+#endif -+ -+#if (RTL8197F_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8197F) { -+ dm->ant_div_type = CGCS_RX_HW_ANTDIV; -+ -+ if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8197F Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ phydm_rx_hw_ant_div_init_97f(dm); -+ } -+#endif -+ -+#if (RTL8197G_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8197G) { -+ dm->ant_div_type = CGCS_RX_HW_ANTDIV; -+ -+ if (dm->ant_div_type != CGCS_RX_HW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8197F Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ phydm_rx_hw_ant_div_init_97g(dm); -+ } -+#endif -+/* @2 [--8723B---] */ -+#if (RTL8723B_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8723B) { -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ -+ -+ if (dm->ant_div_type != S0S1_SW_ANTDIV && -+ dm->ant_div_type != CG_TRX_HW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8723B Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) -+ odm_s0s1_sw_ant_div_init_8723b(dm); -+ else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) -+ odm_trx_hw_ant_div_init_8723b(dm); -+ } -+#endif -+/*@2 [--8723D---]*/ -+#if (RTL8723D_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8723D) { -+ if (fat_tab->p_default_s0_s1 == NULL) { -+ fat_tab->default_s0_s1 = 1; -+ fat_tab->p_default_s0_s1 = &fat_tab->default_s0_s1; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, "default_s0_s1 = %d\n", -+ *fat_tab->p_default_s0_s1); -+ -+ if (*fat_tab->p_default_s0_s1 == true) -+ odm_update_rx_idle_ant(dm, MAIN_ANT); -+ else -+ odm_update_rx_idle_ant(dm, AUX_ANT); -+ -+ if (dm->ant_div_type == S0S1_TRX_HW_ANTDIV) -+ odm_trx_hw_ant_div_init_8723d(dm); -+ else if (dm->ant_div_type == S0S1_SW_ANTDIV) -+ odm_s0s1_sw_ant_div_init_8723d(dm); -+ else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8723D Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ } -+#endif -+#if (RTL8710C_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8710C) { -+ if (dm->ant_div_type == CG_TRX_HW_ANTDIV) -+ odm_trx_hw_ant_div_init_8710c(dm); -+ else if(dm->ant_div_type == S0S1_SW_ANTDIV){ -+ if (fat_tab->p_default_s0_s1 == NULL){ -+ fat_tab->default_s0_s1 = 1; -+ fat_tab->p_default_s0_s1 = &fat_tab->default_s0_s1; -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, "default_s0_s1 = %d\n", -+ *fat_tab->p_default_s0_s1); -+ if (*fat_tab->p_default_s0_s1 == true) -+ odm_update_rx_idle_ant(dm, MAIN_ANT); -+ else -+ odm_update_rx_idle_ant(dm, AUX_ANT); -+ odm_s0s1_sw_ant_div_init_8710c(dm); -+ } -+ } -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8721D) { -+ /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ -+ -+ if (dm->ant_div_type != CG_TRX_HW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8721D Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ if (dm->ant_div_type == CG_TRX_HW_ANTDIV) -+ odm_trx_hw_ant_div_init_8721d(dm); -+ } -+#endif -+/* @2 [--8811A 8821A---] */ -+#if (RTL8821A_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8821) { -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ dm->ant_div_type = HL_SW_SMART_ANT_TYPE1; -+ -+ if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { -+ odm_trx_hw_ant_div_init_8821a(dm); -+ phydm_hl_smart_ant_type1_init_8821a(dm); -+ } else -+#endif -+ { -+#ifdef ODM_CONFIG_BT_COEXIST -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+#else -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+#endif -+ -+ if (dm->ant_div_type != CG_TRX_HW_ANTDIV && -+ dm->ant_div_type != S0S1_SW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8821A & 8811A Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ if (dm->ant_div_type == CG_TRX_HW_ANTDIV) -+ odm_trx_hw_ant_div_init_8821a(dm); -+ else if (dm->ant_div_type == S0S1_SW_ANTDIV) -+ odm_s0s1_sw_ant_div_init_8821a(dm); -+ } -+ } -+#endif -+ -+/* @2 [--8821C---] */ -+#if (RTL8821C_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8821C) { -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ if (dm->ant_div_type != S0S1_SW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8821C Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ phydm_s0s1_sw_ant_div_init_8821c(dm); -+ odm_trx_hw_ant_div_init_8821c(dm); -+ } -+#endif -+ -+/* @2 [--8195B---] */ -+#if (RTL8195B_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8195B) { -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+ if (dm->ant_div_type != CG_TRX_HW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8821C Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ odm_trx_hw_ant_div_init_8195b(dm); -+ } -+#endif -+ -+/* @2 [--8881A---] */ -+#if (RTL8881A_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8881A) { -+ /* @dm->ant_div_type = CGCS_RX_HW_ANTDIV; */ -+ /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ -+ -+ if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ odm_trx_hw_ant_div_init_8881a(dm); -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8881A Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ -+ odm_trx_hw_ant_div_init_8881a(dm); -+ } -+#endif -+ -+/* @2 [--8812---] */ -+#if (RTL8812A_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8812) { -+ /* @dm->ant_div_type = CG_TRX_HW_ANTDIV; */ -+ -+ if (dm->ant_div_type != CG_TRX_HW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8812A Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ odm_trx_hw_ant_div_init_8812a(dm); -+ } -+#endif -+ -+/*@[--8188F---]*/ -+#if (RTL8188F_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8188F) { -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ odm_s0s1_sw_ant_div_init_8188f(dm); -+ } -+#endif -+ -+/*@[--8822B---]*/ -+#if (RTL8822B_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8822B) { -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+ -+ if (dm->ant_div_type != CG_TRX_HW_ANTDIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] 8822B Not Supprrt This AntDiv type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ return; -+ } -+ phydm_trx_hw_ant_div_init_22b(dm); -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 -+ dm->ant_div_type = HL_SW_SMART_ANT_TYPE2; -+ -+ if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE2) -+ phydm_hl_smart_ant_type2_init_8822b(dm); -+#endif -+ } -+#endif -+ -+/*@PHYDM_DBG(dm, DBG_ANT_DIV, "*** support_ic_type=[%lu]\n",*/ -+/*dm->support_ic_type);*/ -+/*PHYDM_DBG(dm, DBG_ANT_DIV, "*** AntDiv support_ability=[%lu]\n",*/ -+/* (dm->support_ability & ODM_BB_ANT_DIV)>>6);*/ -+/*PHYDM_DBG(dm, DBG_ANT_DIV, "*** AntDiv type=[%d]\n",dm->ant_div_type);*/ -+} -+ -+void odm_ant_div(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+#if (defined(CONFIG_HL_SMART_ANTENNA)) -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+#endif -+ -+ if (!(dm->support_ability & ODM_BB_ANT_DIV)) -+ return; -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ if (dm->is_linked) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "tp_active_occur=((%d)), evm_method_enable=((%d))\n", -+ dm->tp_active_occur, fat_tab->evm_method_enable); -+ -+ if (dm->tp_active_occur == 1 && -+ fat_tab->evm_method_enable == 1) { -+ fat_tab->idx_ant_div_counter_5g = dm->antdiv_period; -+ fat_tab->idx_ant_div_counter_2g = dm->antdiv_period; -+ } -+ } -+#endif -+ -+ if (*dm->band_type == ODM_BAND_5G) { -+ if (fat_tab->idx_ant_div_counter_5g < dm->antdiv_period) { -+ fat_tab->idx_ant_div_counter_5g++; -+ return; -+ } else -+ fat_tab->idx_ant_div_counter_5g = 0; -+ } else if (*dm->band_type == ODM_BAND_2_4G) { -+ if (fat_tab->idx_ant_div_counter_2g < dm->antdiv_period) { -+ fat_tab->idx_ant_div_counter_2g++; -+ return; -+ } else -+ fat_tab->idx_ant_div_counter_2g = 0; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN || DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+ if (fat_tab->enable_ctrl_frame_antdiv) { -+ if (dm->data_frame_num <= 10 && dm->is_linked) -+ fat_tab->use_ctrl_frame_antdiv = 1; -+ else -+ fat_tab->use_ctrl_frame_antdiv = 0; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "use_ctrl_frame_antdiv = (( %d )), data_frame_num = (( %d ))\n", -+ fat_tab->use_ctrl_frame_antdiv, dm->data_frame_num); -+ dm->data_frame_num = 0; -+ } -+ -+ { -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ -+ enum beamforming_cap beamform_cap = phydm_get_beamform_cap(dm); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "is_bt_continuous_turn = ((%d))\n", -+ dm->is_bt_continuous_turn); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ AntDiv Beam Cap ] cap= ((%d))\n", beamform_cap); -+ if (!dm->is_bt_continuous_turn) { -+ if ((beamform_cap & BEAMFORMEE_CAP) && -+ (!(*fat_tab->is_no_csi_feedback))) { -+ /* @BFmee On && Div On->Div Off */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ AntDiv : OFF ] BFmee ==1; cap= ((%d))\n", -+ beamform_cap); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ AntDiv BF] is_no_csi_feedback= ((%d))\n", -+ *(fat_tab->is_no_csi_feedback)); -+ if (fat_tab->fix_ant_bfee == 0) { -+ odm_ant_div_on_off(dm, ANTDIV_OFF, -+ ANT_PATH_A); -+ fat_tab->fix_ant_bfee = 1; -+ } -+ return; -+ } else { /* @BFmee Off && Div Off->Div On */ -+ if (fat_tab->fix_ant_bfee == 1 && -+ dm->is_linked) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ AntDiv : ON ] BFmee ==0; cap=((%d))\n", -+ beamform_cap); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ AntDiv BF] is_no_csi_feedback= ((%d))\n", -+ *fat_tab->is_no_csi_feedback); -+ if (dm->ant_div_type != S0S1_SW_ANTDIV) -+ odm_ant_div_on_off(dm, ANTDIV_ON -+ , ANT_PATH_A) -+ ; -+ fat_tab->fix_ant_bfee = 0; -+ } -+ } -+ } else { -+ if (fat_tab->div_path_type == ANT_PATH_A) -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); -+ else if (fat_tab->div_path_type == ANT_PATH_B) -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B); -+ else if (fat_tab->div_path_type == ANT_PATH_AB) -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_AB); -+ } -+#endif -+ } -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ /* @----------just for fool proof */ -+ -+ if (dm->antdiv_rssi) -+ dm->debug_components |= DBG_ANT_DIV; -+ else -+ dm->debug_components &= ~DBG_ANT_DIV; -+ -+ if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_2G) { -+ if (!(dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC)) -+ return; -+ } else if (fat_tab->ant_div_2g_5g == ODM_ANTDIV_5G) { -+ if (!(dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC)) -+ return; -+ } -+#endif -+ -+ /* @---------- */ -+ -+ if (dm->antdiv_select == 1) -+ dm->ant_type = ODM_FIX_MAIN_ANT; -+ else if (dm->antdiv_select == 2) -+ dm->ant_type = ODM_FIX_AUX_ANT; -+ else { /* @if (dm->antdiv_select==0) */ -+ dm->ant_type = ODM_AUTO_ANT; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ /*Stop Antenna diversity for CMW500 testing case*/ -+ if (dm->consecutive_idlel_time >= 10) { -+ dm->ant_type = ODM_FIX_MAIN_ANT; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[AntDiv: OFF] No TP case, consecutive_idlel_time=((%d))\n", -+ dm->consecutive_idlel_time); -+ } -+#endif -+ } -+ -+ /*PHYDM_DBG(dm, DBG_ANT_DIV,"ant_type= (%d), pre_ant_type= (%d)\n",*/ -+ /*dm->ant_type,dm->pre_ant_type); */ -+ -+ if (dm->ant_type != ODM_AUTO_ANT) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Fix Antenna at (( %s ))\n", -+ (dm->ant_type == ODM_FIX_MAIN_ANT) ? "MAIN" : "AUX"); -+ -+ if (dm->ant_type != dm->pre_ant_type) { -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ -+ if (dm->ant_type == ODM_FIX_MAIN_ANT) -+ odm_update_rx_idle_ant(dm, MAIN_ANT); -+ else if (dm->ant_type == ODM_FIX_AUX_ANT) -+ odm_update_rx_idle_ant(dm, AUX_ANT); -+ } -+ dm->pre_ant_type = dm->ant_type; -+ return; -+ } else { -+ if (dm->ant_type != dm->pre_ant_type) { -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); -+ } -+ dm->pre_ant_type = dm->ant_type; -+ } -+#if (defined(CONFIG_2T4R_ANTENNA)) -+ if (dm->ant_type2 != ODM_AUTO_ANT) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "PathB Fix Ant at (( %s ))\n", -+ (dm->ant_type2 == ODM_FIX_MAIN_ANT) ? "MAIN" : "AUX"); -+ -+ if (dm->ant_type2 != dm->pre_ant_type2) { -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_B); -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ -+ if (dm->ant_type2 == ODM_FIX_MAIN_ANT) -+ phydm_update_rx_idle_ant_pathb(dm, MAIN_ANT); -+ else if (dm->ant_type2 == ODM_FIX_AUX_ANT) -+ phydm_update_rx_idle_ant_pathb(dm, AUX_ANT); -+ } -+ dm->pre_ant_type2 = dm->ant_type2; -+ return; -+ } -+ if (dm->ant_type2 != dm->pre_ant_type2) { -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_B); -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); -+ } -+ dm->pre_ant_type2 = dm->ant_type2; -+ -+#endif -+ -+/*@ ----------------------------------------------- */ -+/*@ [--8188E--] */ -+ if (dm->support_ic_type == ODM_RTL8188E) { -+#if (RTL8188E_SUPPORT == 1) -+ if (dm->ant_div_type == CG_TRX_HW_ANTDIV || -+ dm->ant_div_type == CGCS_RX_HW_ANTDIV) -+ odm_hw_ant_div(dm); -+ -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ -+ (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) -+ odm_fast_ant_training(dm); -+#endif -+ -+#endif -+ } -+/*@ [--8192E--] */ -+#if (RTL8192E_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8192E) { -+ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV || -+ dm->ant_div_type == CG_TRX_HW_ANTDIV) -+ odm_hw_ant_div(dm); -+ -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ -+ (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ else if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) -+ odm_fast_ant_training(dm); -+#endif -+ } -+#endif -+/*@ [--8197F--] */ -+#if (RTL8197F_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8197F) { -+ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) -+ odm_hw_ant_div(dm); -+ } -+#endif -+ -+/*@ [--8197G--] */ -+#if (RTL8197G_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8197G) { -+ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) -+ odm_hw_ant_div(dm); -+ } -+#endif -+ -+#if (RTL8723B_SUPPORT == 1) -+/*@ [--8723B---] */ -+ else if (dm->support_ic_type == ODM_RTL8723B) { -+ if (phydm_is_bt_enable_8723b(dm)) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[BT is enable!!!]\n"); -+ if (fat_tab->is_become_linked == true) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Set REG 948[9:6]=0x0\n"); -+ if (dm->support_ic_type == ODM_RTL8723B) -+ odm_set_bb_reg(dm, R_0x948, 0x3c0, 0x0) -+ ; -+ -+ fat_tab->is_become_linked = false; -+ } -+ } else { -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); -+ #endif -+ } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) -+ odm_hw_ant_div(dm); -+ } -+ } -+#endif -+/*@ [--8723D--]*/ -+#if (RTL8723D_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8723D) { -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ if (dm->antdiv_counter == CONFIG_ANTDIV_PERIOD) { -+ odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); -+ dm->antdiv_counter--; -+ } else { -+ dm->antdiv_counter--; -+ } -+ if (dm->antdiv_counter == 0) -+ dm->antdiv_counter = CONFIG_ANTDIV_PERIOD; -+ #endif -+ } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ odm_hw_ant_div(dm); -+ } -+ } -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8721D) { -+ if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ odm_hw_ant_div(dm); -+ } -+ } -+#endif -+#if (RTL8710C_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8710C) { -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ if (dm->antdiv_counter == CONFIG_ANTDIV_PERIOD) { -+ odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); -+ dm->antdiv_counter--; -+ } else { -+ dm->antdiv_counter--; -+ } -+ if (dm->antdiv_counter == 0) -+ dm->antdiv_counter = CONFIG_ANTDIV_PERIOD; -+ #endif -+ } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ odm_hw_ant_div(dm); -+ } -+ } -+#endif -+/*@ [--8821A--] */ -+#if (RTL8821A_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8821) { -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { -+ if (sat_tab->fix_beam_pattern_en != 0) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ " [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", -+ sat_tab->fix_beam_pattern_codeword); -+ /*return;*/ -+ } else { -+ odm_fast_ant_training_hl_smart_antenna_type1(dm); -+ } -+ -+ } else -+ #endif -+ { -+ #ifdef ODM_CONFIG_BT_COEXIST -+ if (!dm->bt_info_table.is_bt_enabled) { /*@BT disabled*/ -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ " [S0S1_SW_ANTDIV] -> [CG_TRX_HW_ANTDIV]\n"); -+ /*odm_set_bb_reg(dm, 0x8d4, BIT24, 1);*/ -+ if (fat_tab->is_become_linked == true) -+ odm_ant_div_on_off(dm, -+ ANTDIV_ON, -+ ANT_PATH_A); -+ } -+ -+ } else { /*@BT enabled*/ -+ -+ if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ " [CG_TRX_HW_ANTDIV] -> [S0S1_SW_ANTDIV]\n"); -+ /*odm_set_bb_reg(dm, 0x8d4, BIT24, 0);*/ -+ odm_ant_div_on_off(dm, ANTDIV_OFF, -+ ANT_PATH_A); -+ } -+ } -+ #endif -+ -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); -+ #endif -+ } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ odm_hw_ant_div(dm); -+ } -+ } -+ } -+#endif -+ -+/*@ [--8821C--] */ -+#if (RTL8821C_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8821C) { -+ if (!dm->is_bt_continuous_turn) { -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "is_bt_continuous_turn = ((%d)) ==> SW AntDiv\n", -+ dm->is_bt_continuous_turn); -+ -+ } else { -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "is_bt_continuous_turn = ((%d)) ==> HW AntDiv\n", -+ dm->is_bt_continuous_turn); -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); -+ } -+ -+ if (fat_tab->force_antdiv_type) -+ dm->ant_div_type = fat_tab->antdiv_type_dbg; -+ -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); -+ #endif -+ } else if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); -+ odm_hw_ant_div(dm); -+ } -+ } -+#endif -+ -+/* @ [--8195B--] */ -+#if (RTL8195B_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8195B) { -+ if (dm->ant_div_type == CG_TRX_HW_ANTDIV) { -+ odm_hw_ant_div(dm); -+ } -+ } -+#endif -+ -+/* @ [--8881A--] */ -+#if (RTL8881A_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8881A) -+ odm_hw_ant_div(dm); -+#endif -+ -+/*@ [--8812A--] */ -+#if (RTL8812A_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8812) -+ odm_hw_ant_div(dm); -+#endif -+ -+#if (RTL8188F_SUPPORT == 1) -+/*@ [--8188F--]*/ -+ else if (dm->support_ic_type == ODM_RTL8188F) { -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_s0s1_sw_ant_div(dm, SWAW_STEP_PEEK); -+ #endif -+ } -+#endif -+ -+/*@ [--8822B--]*/ -+#if (RTL8822B_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8822B) { -+ if (dm->ant_div_type == CG_TRX_HW_ANTDIV) -+ odm_hw_ant_div(dm); -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 -+ if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE2) { -+ if (sat_tab->fix_beam_pattern_en != 0) -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ " [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", -+ sat_tab->fix_beam_pattern_codeword); -+ else -+ phydm_fast_ant_training_hl_smart_antenna_type2(dm); -+ } -+ #endif -+ } -+#endif -+} -+ -+void odm_antsel_statistics(void *dm_void, void *phy_info_void, -+ u8 antsel_tr_mux, u32 mac_id, u32 utility, u8 method, -+ u8 is_cck_rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct phydm_phyinfo_struct *phy_info = NULL; -+ -+ phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ -+ if (method == RSSI_METHOD) { -+ if (is_cck_rate) { -+ if (antsel_tr_mux == fat_tab->ant_idx_vec[0]-1) { -+ /*to prevent u16 overflow, max(RSSI)=100, 65435+100 = 65535 (u16)*/ -+ if (fat_tab->main_sum_cck[mac_id] > 65435) -+ return; -+ -+ fat_tab->main_sum_cck[mac_id] += (u16)utility; -+ fat_tab->main_cnt_cck[mac_id]++; -+ } else { -+ if (fat_tab->aux_sum_cck[mac_id] > 65435) -+ return; -+ -+ fat_tab->aux_sum_cck[mac_id] += (u16)utility; -+ fat_tab->aux_cnt_cck[mac_id]++; -+ } -+ -+ } else { /*ofdm rate*/ -+ -+ if (antsel_tr_mux == fat_tab->ant_idx_vec[0]-1) { -+ if (fat_tab->main_sum[mac_id] > 65435) -+ return; -+ -+ fat_tab->main_sum[mac_id] += (u16)utility; -+ fat_tab->main_cnt[mac_id]++; -+ } else { -+ if (fat_tab->aux_sum[mac_id] > 65435) -+ return; -+ -+ fat_tab->aux_sum[mac_id] += (u16)utility; -+ fat_tab->aux_cnt[mac_id]++; -+ } -+ } -+ } -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ else if (method == EVM_METHOD) { -+ if (!fat_tab->get_stats) -+ return; -+ -+ if (dm->rate_ss == 1) { -+ phydm_statistics_evm_1ss(dm, phy_info, antsel_tr_mux, -+ mac_id, utility); -+ } else { /*@>= 2SS*/ -+ phydm_statistics_evm_2ss(dm, phy_info, antsel_tr_mux, -+ mac_id, utility); -+ } -+ -+ } else if (method == CRC32_METHOD) { -+ if (antsel_tr_mux == ANT1_2G) { -+ fat_tab->main_crc32_ok_cnt += utility; -+ fat_tab->main_crc32_fail_cnt++; -+ } else { -+ fat_tab->aux_crc32_ok_cnt += utility; -+ fat_tab->aux_crc32_fail_cnt++; -+ } -+ -+ } else if (method == TP_METHOD) { -+ if (!fat_tab->get_stats) -+ return; -+ if (utility <= ODM_RATEMCS15 && utility >= ODM_RATEMCS0) { -+ if (antsel_tr_mux == ANT1_2G) { -+ fat_tab->main_tp += (phy_rate_table[utility]) -+ << 5; -+ fat_tab->main_tp_cnt++; -+ } else { -+ fat_tab->aux_tp += (phy_rate_table[utility]) -+ << 5; -+ fat_tab->aux_tp_cnt++; -+ } -+ } -+ } -+#endif -+} -+ -+void odm_process_rssi_smart(void *dm_void, void *phy_info_void, -+ void *pkt_info_void, u8 rx_power_ant0) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_phyinfo_struct *phy_info = NULL; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ -+ if ((dm->support_ic_type & ODM_SMART_ANT_SUPPORT) && -+ pktinfo->is_packet_to_self && -+ fat_tab->fat_state == FAT_TRAINING_STATE) { -+ /* @(pktinfo->is_packet_match_bssid && (!pktinfo->is_packet_beacon)) */ -+ u8 antsel_tr_mux; -+ -+ antsel_tr_mux = (fat_tab->antsel_rx_keep_2 << 2) | -+ (fat_tab->antsel_rx_keep_1 << 1) | -+ fat_tab->antsel_rx_keep_0; -+ fat_tab->ant_sum_rssi[antsel_tr_mux] += rx_power_ant0; -+ fat_tab->ant_rssi_cnt[antsel_tr_mux]++; -+ } -+} -+ -+void odm_process_rssi_normal(void *dm_void, void *phy_info_void, -+ void *pkt_info_void, u8 rx_pwr0) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_phyinfo_struct *phy_info = NULL; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u8 rx_evm0, rx_evm1; -+ boolean b_main; -+ -+ phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ rx_evm0 = phy_info->rx_mimo_signal_quality[0]; -+ rx_evm1 = phy_info->rx_mimo_signal_quality[1]; -+ -+ if (!(pktinfo->is_packet_to_self || fat_tab->use_ctrl_frame_antdiv)) -+ return; -+ -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) { -+ if (pktinfo->is_cck_rate || -+ dm->support_ic_type == ODM_RTL8188F || dm->support_ic_type == ODM_RTL8710C) { -+ -+ b_main = (fat_tab->rx_idle_ant == MAIN_ANT); -+ fat_tab->antsel_rx_keep_0 = b_main ? ANT1_2G : ANT2_2G; -+ } -+ -+ odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, -+ pktinfo->station_id, rx_pwr0, RSSI_METHOD, -+ pktinfo->is_cck_rate); -+ } else { -+ odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, -+ pktinfo->station_id, rx_pwr0, RSSI_METHOD, -+ pktinfo->is_cck_rate); -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ if (!(dm->support_ic_type & ODM_EVM_ANTDIV_IC)) -+ return; -+ if (pktinfo->is_cck_rate) -+ return; -+ -+ odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, -+ pktinfo->station_id, rx_evm0, EVM_METHOD, -+ pktinfo->is_cck_rate); -+ odm_antsel_statistics(dm, phy_info, fat_tab->antsel_rx_keep_0, -+ pktinfo->station_id, pktinfo->data_rate, -+ TP_METHOD, pktinfo->is_cck_rate); -+ #endif -+ } -+} -+ -+void odm_process_rssi_for_ant_div(void *dm_void, void *phy_info_void, -+ void *pkt_info_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_phyinfo_struct *phy_info = NULL; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+#if (defined(CONFIG_HL_SMART_ANTENNA)) -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ u32 beam_tmp; -+ u8 next_ant; -+ u8 train_pkt_number; -+#endif -+ boolean b_main; -+ u8 rx_power_ant0, rx_power_ant1; -+ u8 rx_evm_ant0, rx_evm_ant1; -+ u8 rssi_avg; -+ u64 rssi_linear = 0; -+ -+ phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ rx_power_ant0 = phy_info->rx_mimo_signal_strength[0]; -+ rx_power_ant1 = phy_info->rx_mimo_signal_strength[1]; -+ rx_evm_ant0 = phy_info->rx_mimo_signal_quality[0]; -+ rx_evm_ant1 = phy_info->rx_mimo_signal_quality[1]; -+ -+ if ((dm->support_ic_type & ODM_IC_2SS) && !pktinfo->is_cck_rate) { -+ if (rx_power_ant1 < 100) { -+ rssi_linear = phydm_db_2_linear(rx_power_ant0) + -+ phydm_db_2_linear(rx_power_ant1); -+ /* @Rounding and removing fractional bits */ -+ rssi_linear = (rssi_linear + -+ (1 << (FRAC_BITS - 1))) >> FRAC_BITS; -+ /* @Calculate average RSSI */ -+ rssi_linear = DIVIDED_2(rssi_linear); -+ /* @averaged PWDB */ -+ rssi_avg = (u8)odm_convert_to_db(rssi_linear); -+ } -+ -+ } else { -+ rx_power_ant0 = (u8)phy_info->rx_pwdb_all; -+ rssi_avg = rx_power_ant0; -+ } -+ -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 -+ if ((dm->ant_div_type == HL_SW_SMART_ANT_TYPE2) && (fat_tab->fat_state == FAT_TRAINING_STATE)) -+ phydm_process_rssi_for_hb_smtant_type2(dm, phy_info, pktinfo, rssi_avg); /*@for 8822B*/ -+ else -+#endif -+ -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+#ifdef CONFIG_FAT_PATCH -+ if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1 && fat_tab->fat_state == FAT_TRAINING_STATE) { -+ /*@[Beacon]*/ -+ if (pktinfo->is_packet_beacon) { -+ sat_tab->beacon_counter++; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "MatchBSSID_beacon_counter = ((%d))\n", -+ sat_tab->beacon_counter); -+ -+ if (sat_tab->beacon_counter >= sat_tab->pre_beacon_counter + 2) { -+ if (sat_tab->ant_num > 1) { -+ next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT; -+ odm_update_rx_idle_ant(dm, next_ant); -+ } -+ -+ sat_tab->update_beam_idx++; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n", -+ sat_tab->pre_beacon_counter, -+ sat_tab->pkt_counter, -+ sat_tab->update_beam_idx); -+ -+ sat_tab->pre_beacon_counter = sat_tab->beacon_counter; -+ sat_tab->pkt_counter = 0; -+ } -+ } -+ /*@[data]*/ -+ else if (pktinfo->is_packet_to_self) { -+ if (sat_tab->pkt_skip_statistic_en == 0) { -+ /*@ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "StaID[%d]: antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", -+ pktinfo->station_id, fat_tab->antsel_rx_keep_0, fat_tab->hw_antsw_occur, sat_tab->fast_training_beam_num, rx_power_ant0); -+ */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "ID[%d][pkt_cnt = %d]: {ANT, Beam} = {%d, %d}, RSSI = ((%d))\n", -+ pktinfo->station_id, -+ sat_tab->pkt_counter, -+ fat_tab->antsel_rx_keep_0, -+ sat_tab->fast_training_beam_num, -+ rx_power_ant0); -+ -+ sat_tab->pkt_rssi_sum[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num] += rx_power_ant0; -+ sat_tab->pkt_rssi_cnt[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num]++; -+ sat_tab->pkt_counter++; -+ -+#if 1 -+ train_pkt_number = sat_tab->beam_train_cnt[fat_tab->rx_idle_ant - 1][sat_tab->fast_training_beam_num]; -+#else -+ train_pkt_number = sat_tab->per_beam_training_pkt_num; -+#endif -+ -+ /*Swich Antenna erery N pkts*/ -+ if (sat_tab->pkt_counter == train_pkt_number) { -+ if (sat_tab->ant_num > 1) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "packet enugh ((%d ))pkts ---> Switch antenna\n", train_pkt_number); -+ next_ant = (fat_tab->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT; -+ odm_update_rx_idle_ant(dm, next_ant); -+ } -+ -+ sat_tab->update_beam_idx++; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "pre_beacon_counter = ((%d)), update_beam_idx_counter = ((%d))\n", -+ sat_tab->pre_beacon_counter, sat_tab->update_beam_idx); -+ -+ sat_tab->pre_beacon_counter = sat_tab->beacon_counter; -+ sat_tab->pkt_counter = 0; -+ } -+ } -+ } -+ -+ /*Swich Beam after switch "sat_tab->ant_num" antennas*/ -+ if (sat_tab->update_beam_idx == sat_tab->ant_num) { -+ sat_tab->update_beam_idx = 0; -+ sat_tab->pkt_counter = 0; -+ beam_tmp = sat_tab->fast_training_beam_num; -+ -+ if (sat_tab->fast_training_beam_num >= (sat_tab->beam_patten_num_each_ant - 1)) { -+ fat_tab->fat_state = FAT_DECISION_STATE; -+ -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ odm_fast_ant_training_hl_smart_antenna_type1(dm); -+#endif -+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) -+ odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem); -+#endif -+ -+ } else { -+ sat_tab->fast_training_beam_num++; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Update Beam_num (( %d )) -> (( %d ))\n", -+ beam_tmp, -+ sat_tab->fast_training_beam_num); -+ phydm_set_all_ant_same_beam_num(dm); -+ -+ fat_tab->fat_state = FAT_TRAINING_STATE; -+ } -+ } -+ } -+#else -+ -+ if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { -+ if ((dm->support_ic_type & ODM_HL_SMART_ANT_TYPE1_SUPPORT) && -+ pktinfo->is_packet_to_self && -+ fat_tab->fat_state == FAT_TRAINING_STATE) { -+ if (sat_tab->pkt_skip_statistic_en == 0) { -+ /*@ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "StaID[%d]: antsel_pathA = ((%d)), hw_antsw_occur = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", -+ pktinfo->station_id, fat_tab->antsel_rx_keep_0, fat_tab->hw_antsw_occur, sat_tab->fast_training_beam_num, rx_power_ant0); -+ */ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "StaID[%d]: antsel_pathA = ((%d)), is_packet_to_self = ((%d)), Beam_num = ((%d)), RSSI = ((%d))\n", -+ pktinfo->station_id, -+ fat_tab->antsel_rx_keep_0, -+ pktinfo->is_packet_to_self, -+ sat_tab->fast_training_beam_num, -+ rx_power_ant0); -+ -+ sat_tab->pkt_rssi_sum[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num] += rx_power_ant0; -+ sat_tab->pkt_rssi_cnt[fat_tab->antsel_rx_keep_0][sat_tab->fast_training_beam_num]++; -+ sat_tab->pkt_counter++; -+ -+ /*swich beam every N pkt*/ -+ if (sat_tab->pkt_counter >= sat_tab->per_beam_training_pkt_num) { -+ sat_tab->pkt_counter = 0; -+ beam_tmp = sat_tab->fast_training_beam_num; -+ -+ if (sat_tab->fast_training_beam_num >= (sat_tab->beam_patten_num_each_ant - 1)) { -+ fat_tab->fat_state = FAT_DECISION_STATE; -+ -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ odm_fast_ant_training_hl_smart_antenna_type1(dm); -+#endif -+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) -+ odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem); -+#endif -+ -+ } else { -+ sat_tab->fast_training_beam_num++; -+ phydm_set_all_ant_same_beam_num(dm); -+ -+ fat_tab->fat_state = FAT_TRAINING_STATE; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Update Beam_num (( %d )) -> (( %d ))\n", beam_tmp, sat_tab->fast_training_beam_num); -+ } -+ } -+ } -+ } -+ } -+#endif -+ else -+#endif -+ if (dm->ant_div_type == CG_TRX_SMART_ANTDIV) { -+ odm_process_rssi_smart(dm, phy_info, pktinfo, -+ rx_power_ant0); -+ } else { /* @ant_div_type != CG_TRX_SMART_ANTDIV */ -+ odm_process_rssi_normal(dm, phy_info, pktinfo, -+ rx_power_ant0); -+ } -+#if 0 -+/* PHYDM_DBG(dm,DBG_ANT_DIV,"is_cck_rate=%d, pwdb_all=%d\n", -+ * pktinfo->is_cck_rate, phy_info->rx_pwdb_all); -+ * PHYDM_DBG(dm,DBG_ANT_DIV,"antsel_tr_mux=3'b%d%d%d\n", -+ * fat_tab->antsel_rx_keep_2, fat_tab->antsel_rx_keep_1, -+ * fat_tab->antsel_rx_keep_0); -+ */ -+#endif -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) -+void odm_set_tx_ant_by_tx_info(void *dm_void, u8 *desc, u8 mac_id) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ if (!(dm->support_ability & ODM_BB_ANT_DIV)) -+ return; -+ -+ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) -+ return; -+ -+ if (dm->support_ic_type == (ODM_RTL8723B | ODM_RTL8721D)) { -+#if (RTL8723B_SUPPORT == 1 || RTL8721D_SUPPORT == 1) -+ SET_TX_DESC_ANTSEL_A_8723B(desc, fat_tab->antsel_a[mac_id]); -+/*PHYDM_DBG(dm,DBG_ANT_DIV, -+ * "[8723B] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", -+ * mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], -+ * fat_tab->antsel_a[mac_id]); -+ */ -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8821) { -+#if (RTL8821A_SUPPORT == 1) -+ SET_TX_DESC_ANTSEL_A_8812(desc, fat_tab->antsel_a[mac_id]); -+/*PHYDM_DBG(dm,DBG_ANT_DIV, -+ * "[8821A] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", -+ * mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], -+ * fat_tab->antsel_a[mac_id]); -+ */ -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8188E) { -+#if (RTL8188E_SUPPORT == 1) -+ SET_TX_DESC_ANTSEL_A_88E(desc, fat_tab->antsel_a[mac_id]); -+ SET_TX_DESC_ANTSEL_B_88E(desc, fat_tab->antsel_b[mac_id]); -+ SET_TX_DESC_ANTSEL_C_88E(desc, fat_tab->antsel_c[mac_id]); -+/*PHYDM_DBG(dm,DBG_ANT_DIV, -+ * "[8188E] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", -+ * mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], -+ * fat_tab->antsel_a[mac_id]); -+ */ -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8821C) { -+#if (RTL8821C_SUPPORT == 1) -+ SET_TX_DESC_ANTSEL_A_8821C(desc, fat_tab->antsel_a[mac_id]); -+/*PHYDM_DBG(dm,DBG_ANT_DIV, -+ * "[8821C] SetTxAntByTxInfo_WIN: mac_id=%d, antsel_tr_mux=3'b%d%d%d\n", -+ * mac_id, fat_tab->antsel_c[mac_id], fat_tab->antsel_b[mac_id], -+ * fat_tab->antsel_a[mac_id]); -+ */ -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8195B) { -+#if (RTL8195B_SUPPORT == 1) -+ SET_TX_DESC_ANTSEL_A_8195B(desc, fat_tab->antsel_a[mac_id]); -+#endif -+ } else if (dm->support_ic_type == ODM_RTL8822B) { -+#if (RTL8822B_SUPPORT == 1) -+ SET_TX_DESC_ANTSEL_A_8822B(desc, fat_tab->antsel_a[mac_id]); -+#endif -+ -+ } -+} -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+void odm_set_tx_ant_by_tx_info( -+ struct rtl8192cd_priv *priv, -+ struct tx_desc *pdesc, -+ unsigned short aid) -+{ -+ struct dm_struct *dm = GET_PDM_ODM(priv); /*@&(priv->pshare->_dmODM);*/ -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ -+ if (!(dm->support_ability & ODM_BB_ANT_DIV)) -+ return; -+ -+ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) -+ return; -+ -+ if (dm->support_ic_type == ODM_RTL8881A) { -+#if 0 -+ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__); */ -+#endif -+ pdesc->Dword6 &= set_desc(~(BIT(18) | BIT(17) | BIT(16))); -+ pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16); -+ } else if (dm->support_ic_type == ODM_RTL8192E) { -+#if 0 -+ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8192E******\n",__FUNCTION__,__LINE__); */ -+#endif -+ pdesc->Dword6 &= set_desc(~(BIT(18) | BIT(17) | BIT(16))); -+ pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16); -+ } else if (dm->support_ic_type == ODM_RTL8197F) { -+#if 0 -+ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8192E******\n",__FUNCTION__,__LINE__); */ -+#endif -+ pdesc->Dword6 &= set_desc(~(BIT(17) | BIT(16))); -+ pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16); -+ } else if (dm->support_ic_type == ODM_RTL8822B) { -+ pdesc->Dword6 &= set_desc(~(BIT(17) | BIT(16))); -+ pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16); -+ } else if (dm->support_ic_type == ODM_RTL8188E) { -+#if 0 -+ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8188E******\n",__FUNCTION__,__LINE__);*/ -+#endif -+ pdesc->Dword2 &= set_desc(~BIT(24)); -+ pdesc->Dword2 &= set_desc(~BIT(25)); -+ pdesc->Dword7 &= set_desc(~BIT(29)); -+ -+ pdesc->Dword2 |= set_desc(fat_tab->antsel_a[aid] << 24); -+ pdesc->Dword2 |= set_desc(fat_tab->antsel_b[aid] << 25); -+ pdesc->Dword7 |= set_desc(fat_tab->antsel_c[aid] << 29); -+ -+ } else if (dm->support_ic_type == ODM_RTL8812) { -+ /*@[path-A]*/ -+#if 0 -+ /*panic_printk("[%s] [%d] ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__);*/ -+#endif -+ -+ pdesc->Dword6 &= set_desc(~BIT(16)); -+ pdesc->Dword6 &= set_desc(~BIT(17)); -+ pdesc->Dword6 &= set_desc(~BIT(18)); -+ -+ pdesc->Dword6 |= set_desc(fat_tab->antsel_a[aid] << 16); -+ pdesc->Dword6 |= set_desc(fat_tab->antsel_b[aid] << 17); -+ pdesc->Dword6 |= set_desc(fat_tab->antsel_c[aid] << 18); -+ } -+} -+ -+#if 1 /*@def CONFIG_WLAN_HAL*/ -+void odm_set_tx_ant_by_tx_info_hal( -+ struct rtl8192cd_priv *priv, -+ void *pdesc_data, -+ u16 aid) -+{ -+ struct dm_struct *dm = GET_PDM_ODM(priv); /*@&(priv->pshare->_dmODM);*/ -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ PTX_DESC_DATA_88XX pdescdata = (PTX_DESC_DATA_88XX)pdesc_data; -+ -+ if (!(dm->support_ability & ODM_BB_ANT_DIV)) -+ return; -+ -+ if (dm->ant_div_type == CGCS_RX_HW_ANTDIV) -+ return; -+ -+ if (dm->support_ic_type & (ODM_RTL8881A | ODM_RTL8192E | ODM_RTL8814A | -+ ODM_RTL8197F | ODM_RTL8822B)) { -+#if 0 -+ /*panic_printk("[%s] [%d] **odm_set_tx_ant_by_tx_info_hal**\n", -+ * __FUNCTION__,__LINE__); -+ */ -+#endif -+ pdescdata->ant_sel = 1; -+ pdescdata->ant_sel_a = fat_tab->antsel_a[aid]; -+ } -+} -+#endif /*@#ifdef CONFIG_WLAN_HAL*/ -+ -+#endif -+ -+void odm_ant_div_config(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ PHYDM_DBG(dm, DBG_ANT_DIV, "WIN Config Antenna Diversity\n"); -+ /*@ -+ if(dm->support_ic_type==ODM_RTL8723B) -+ { -+ if((!dm->swat_tab.ANTA_ON || !dm->swat_tab.ANTB_ON)) -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ } -+ */ -+ #if (defined(CONFIG_2T3R_ANTENNA)) -+ #if (RTL8822B_SUPPORT == 1) -+ dm->rfe_type = ANT_2T3R_RFE_TYPE; -+ #endif -+ #endif -+ -+ #if (defined(CONFIG_2T4R_ANTENNA)) -+ #if (RTL8822B_SUPPORT == 1) -+ dm->rfe_type = ANT_2T4R_RFE_TYPE; -+ #endif -+ #endif -+ -+ if (dm->support_ic_type == ODM_RTL8723D) -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "CE Config Antenna Diversity\n"); -+ -+ if (dm->support_ic_type == ODM_RTL8723B) -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ -+ if (dm->support_ic_type == ODM_RTL8723D) -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "IOT Config Antenna Diversity\n"); -+ -+ if (dm->support_ic_type == ODM_RTL8721D) -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+ if (dm->support_ic_type == ODM_RTL8710C){ -+ if(dm->cut_version > ODM_CUT_C) -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+ else -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ } -+ -+#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "AP Config Antenna Diversity\n"); -+ -+ /* @2 [ NOT_SUPPORT_ANTDIV ] */ -+#if (defined(CONFIG_NOT_SUPPORT_ANTDIV)) -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Disable AntDiv function] : Not Support 2.4G & 5G Antenna Diversity\n"); -+ -+ /* @2 [ 2G&5G_SUPPORT_ANTDIV ] */ -+#elif (defined(CONFIG_2G5G_SUPPORT_ANTDIV)) -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Enable AntDiv function] : 2.4G & 5G Support Antenna Diversity Simultaneously\n"); -+ fat_tab->ant_div_2g_5g = (ODM_ANTDIV_2G | ODM_ANTDIV_5G); -+ -+ if (dm->support_ic_type & ODM_ANTDIV_SUPPORT) -+ dm->support_ability |= ODM_BB_ANT_DIV; -+ if (*dm->band_type == ODM_BAND_5G) { -+ #if (defined(CONFIG_5G_CGCS_RX_DIVERSITY)) -+ dm->ant_div_type = CGCS_RX_HW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); -+ panic_printk("[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); -+ #elif (defined(CONFIG_5G_CG_TRX_DIVERSITY) ||\ -+ defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); -+ panic_printk("[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); -+ #elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) -+ dm->ant_div_type = CG_TRX_SMART_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 5G] : AntDiv type = CG_SMART_ANTDIV\n"); -+ #elif (defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY)) -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 5G] : AntDiv type = S0S1_SW_ANTDIV\n"); -+ #endif -+ } else if (*dm->band_type == ODM_BAND_2_4G) { -+ #if (defined(CONFIG_2G_CGCS_RX_DIVERSITY)) -+ dm->ant_div_type = CGCS_RX_HW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 2.4G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); -+ #elif (defined(CONFIG_2G_CG_TRX_DIVERSITY) ||\ -+ defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)) -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 2.4G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); -+ #elif (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ dm->ant_div_type = CG_TRX_SMART_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 2.4G] : AntDiv type = CG_SMART_ANTDIV\n"); -+ #elif (defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY)) -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 2.4G] : AntDiv type = S0S1_SW_ANTDIV\n"); -+ #endif -+ } -+ -+ /* @2 [ 5G_SUPPORT_ANTDIV ] */ -+#elif (defined(CONFIG_5G_SUPPORT_ANTDIV)) -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"); -+ panic_printk("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"); -+ fat_tab->ant_div_2g_5g = (ODM_ANTDIV_5G); -+ if (*dm->band_type == ODM_BAND_5G) { -+ if (dm->support_ic_type & ODM_ANTDIV_5G_SUPPORT_IC) -+ dm->support_ability |= ODM_BB_ANT_DIV; -+ #if (defined(CONFIG_5G_CGCS_RX_DIVERSITY)) -+ dm->ant_div_type = CGCS_RX_HW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); -+ panic_printk("[ 5G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); -+ #elif (defined(CONFIG_5G_CG_TRX_DIVERSITY)) -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+ panic_printk("[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 5G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); -+ #elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) -+ dm->ant_div_type = CG_TRX_SMART_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 5G] : AntDiv type = CG_SMART_ANTDIV\n"); -+ #elif (defined(CONFIG_5G_S0S1_SW_ANT_DIVERSITY)) -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 5G] : AntDiv type = S0S1_SW_ANTDIV\n"); -+ #endif -+ } else if (*dm->band_type == ODM_BAND_2_4G) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Not Support 2G ant_div_type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ } -+ -+ /* @2 [ 2G_SUPPORT_ANTDIV ] */ -+#elif (defined(CONFIG_2G_SUPPORT_ANTDIV)) -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Enable AntDiv function] : Only 2.4G Support Antenna Diversity\n"); -+ fat_tab->ant_div_2g_5g = (ODM_ANTDIV_2G); -+ if (*dm->band_type == ODM_BAND_2_4G) { -+ if (dm->support_ic_type & ODM_ANTDIV_2G_SUPPORT_IC) -+ dm->support_ability |= ODM_BB_ANT_DIV; -+ #if (defined(CONFIG_2G_CGCS_RX_DIVERSITY)) -+ dm->ant_div_type = CGCS_RX_HW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 2.4G] : AntDiv type = CGCS_RX_HW_ANTDIV\n"); -+ #elif (defined(CONFIG_2G_CG_TRX_DIVERSITY)) -+ dm->ant_div_type = CG_TRX_HW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 2.4G] : AntDiv type = CG_TRX_HW_ANTDIV\n"); -+ #elif (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ dm->ant_div_type = CG_TRX_SMART_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 2.4G] : AntDiv type = CG_SMART_ANTDIV\n"); -+ #elif (defined(CONFIG_2G_S0S1_SW_ANT_DIVERSITY)) -+ dm->ant_div_type = S0S1_SW_ANTDIV; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ 2.4G] : AntDiv type = S0S1_SW_ANTDIV\n"); -+ #endif -+ } else if (*dm->band_type == ODM_BAND_5G) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Not Support 5G ant_div_type\n"); -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ } -+#endif -+ -+ if (!(dm->support_ic_type & ODM_ANTDIV_SUPPORT_IC)) { -+ fat_tab->ant_div_2g_5g = 0; -+ dm->support_ability &= ~(ODM_BB_ANT_DIV); -+ } -+#endif -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[AntDiv Config Info] AntDiv_SupportAbility = (( %x ))\n", -+ ((dm->support_ability & ODM_BB_ANT_DIV) ? 1 : 0)); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[AntDiv Config Info] be_fix_tx_ant = ((%d))\n", -+ dm->dm_fat_table.b_fix_tx_ant); -+} -+ -+void odm_ant_div_timers(void *dm_void, u8 state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ if (state == INIT_ANTDIV_TIMMER) { -+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_initialize_timer(dm, -+ &dm->dm_swat_table.sw_antdiv_timer, -+ (void *)odm_sw_antdiv_callback, NULL, -+ "sw_antdiv_timer"); -+#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ -+ (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ odm_initialize_timer(dm, &dm->fast_ant_training_timer, -+ (void *)odm_fast_ant_training_callback, -+ NULL, "fast_ant_training_timer"); -+#endif -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ odm_initialize_timer(dm, &dm->evm_fast_ant_training_timer, -+ (void *)phydm_evm_antdiv_callback, NULL, -+ "evm_fast_ant_training_timer"); -+#endif -+ } else if (state == CANCEL_ANTDIV_TIMMER) { -+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_cancel_timer(dm, -+ &dm->dm_swat_table.sw_antdiv_timer); -+#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ -+ (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ odm_cancel_timer(dm, &dm->fast_ant_training_timer); -+#endif -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ odm_cancel_timer(dm, &dm->evm_fast_ant_training_timer); -+#endif -+ } else if (state == RELEASE_ANTDIV_TIMMER) { -+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_release_timer(dm, -+ &dm->dm_swat_table.sw_antdiv_timer); -+#elif (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ -+ (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ odm_release_timer(dm, &dm->fast_ant_training_timer); -+#endif -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ odm_release_timer(dm, &dm->evm_fast_ant_training_timer); -+#endif -+ } -+} -+ -+void phydm_antdiv_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 dm_value[10] = {0}; -+ char help[] = "-h"; -+ u8 i, input_idx = 0; -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); -+ input_idx++; -+ } -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{1} {0:auto, 1:fix main, 2:fix auto}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{2} {antdiv_period}\n"); -+ #if (RTL8821C_SUPPORT == 1) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{3} {en} {0:Default, 1:HW_Div, 2:SW_Div}\n"); -+ #endif -+ -+ } else if (dm_value[0] == 1) { -+ /*@fixed or auto antenna*/ -+ if (dm_value[1] == 0) { -+ dm->ant_type = ODM_AUTO_ANT; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "AntDiv: Auto\n"); -+ } else if (dm_value[1] == 1) { -+ dm->ant_type = ODM_FIX_MAIN_ANT; -+ -+ #if (RTL8710C_SUPPORT == 1) -+ dm->antdiv_select = 1; -+ #endif -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "AntDiv: Fix Main\n"); -+ } else if (dm_value[1] == 2) { -+ dm->ant_type = ODM_FIX_AUX_ANT; -+ -+ #if (RTL8710C_SUPPORT == 1) -+ dm->antdiv_select = 2; -+ #endif -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "AntDiv: Fix Aux\n"); -+ } -+ -+ if (dm->ant_type != ODM_AUTO_ANT) { -+ odm_stop_antenna_switch_dm(dm); -+ if (dm->ant_type == ODM_FIX_MAIN_ANT) -+ odm_update_rx_idle_ant(dm, MAIN_ANT); -+ else if (dm->ant_type == ODM_FIX_AUX_ANT) -+ odm_update_rx_idle_ant(dm, AUX_ANT); -+ } else { -+ phydm_enable_antenna_diversity(dm); -+ } -+ dm->pre_ant_type = dm->ant_type; -+ } else if (dm_value[0] == 2) { -+ /*@dynamic period for AntDiv*/ -+ dm->antdiv_period = (u8)dm_value[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "AntDiv_period=((%d))\n", dm->antdiv_period); -+ } -+ #if (RTL8821C_SUPPORT == 1) -+ else if (dm_value[0] == 3 && -+ dm->support_ic_type == ODM_RTL8821C) { -+ /*Only for 8821C*/ -+ if (dm_value[1] == 0) { -+ fat_tab->force_antdiv_type = false; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[8821C] AntDiv: Default\n"); -+ } else if (dm_value[1] == 1) { -+ fat_tab->force_antdiv_type = true; -+ fat_tab->antdiv_type_dbg = CG_TRX_HW_ANTDIV; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[8821C] AntDiv: HW diversity\n"); -+ } else if (dm_value[1] == 2) { -+ fat_tab->force_antdiv_type = true; -+ fat_tab->antdiv_type_dbg = S0S1_SW_ANTDIV; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[8821C] AntDiv: SW diversity\n"); -+ } -+ } -+ #endif -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ else if (dm_value[0] == 4) { -+ if (dm_value[1] == 0) { -+ /*@init parameters for EVM AntDiv*/ -+ phydm_evm_sw_antdiv_init(dm); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "init evm antdiv parameters\n"); -+ } else if (dm_value[1] == 1) { -+ /*training number for EVM AntDiv*/ -+ dm->antdiv_train_num = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "antdiv_train_num = ((%d))\n", -+ dm->antdiv_train_num); -+ } else if (dm_value[1] == 2) { -+ /*training interval for EVM AntDiv*/ -+ dm->antdiv_intvl = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "antdiv_intvl = ((%d))\n", -+ dm->antdiv_intvl); -+ } else if (dm_value[1] == 3) { -+ /*@function period for EVM AntDiv*/ -+ dm->evm_antdiv_period = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "evm_antdiv_period = ((%d))\n", -+ dm->evm_antdiv_period); -+ } else if (dm_value[1] == 100) {/*show parameters*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "ant_type = ((%d))\n", dm->ant_type); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "antdiv_train_num = ((%d))\n", -+ dm->antdiv_train_num); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "antdiv_intvl = ((%d))\n", -+ dm->antdiv_intvl); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "evm_antdiv_period = ((%d))\n", -+ dm->evm_antdiv_period); -+ } -+ } -+ #ifdef CONFIG_2T4R_ANTENNA -+ else if (dm_value[0] == 5) { /*Only for 8822B 2T4R case*/ -+ -+ if (dm_value[1] == 0) { -+ dm->ant_type2 = ODM_AUTO_ANT; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "AntDiv: PathB Auto\n"); -+ } else if (dm_value[1] == 1) { -+ dm->ant_type2 = ODM_FIX_MAIN_ANT; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "AntDiv: PathB Fix Main\n"); -+ } else if (dm_value[1] == 2) { -+ dm->ant_type2 = ODM_FIX_AUX_ANT; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "AntDiv: PathB Fix Aux\n"); -+ } -+ -+ if (dm->ant_type2 != ODM_AUTO_ANT) { -+ odm_stop_antenna_switch_dm(dm); -+ if (dm->ant_type2 == ODM_FIX_MAIN_ANT) -+ phydm_update_rx_idle_ant_pathb(dm, MAIN_ANT); -+ else if (dm->ant_type2 == ODM_FIX_AUX_ANT) -+ phydm_update_rx_idle_ant_pathb(dm, AUX_ANT); -+ } else { -+ phydm_enable_antenna_diversity(dm); -+ } -+ dm->pre_ant_type2 = dm->ant_type2; -+ } -+ #endif -+ #endif -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void odm_ant_div_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ability & ODM_BB_ANT_DIV)) -+ return; -+ -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ if (dm->ant_div_type == S0S1_SW_ANTDIV) -+ odm_s0s1_sw_ant_div_reset(dm); -+ #endif -+} -+ -+void odm_antenna_diversity_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_ant_div_config(dm); -+ odm_ant_div_init(dm); -+} -+ -+void odm_antenna_diversity(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (*dm->mp_mode) -+ return; -+ -+ if (!(dm->support_ability & ODM_BB_ANT_DIV)) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Return!!!] Not Support Antenna Diversity Function\n"); -+ return; -+ } -+ -+ if (dm->pause_ability & ODM_BB_ANT_DIV) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Return: Pause AntDIv in LV=%d\n", -+ dm->pause_lv_table.lv_antdiv); -+ return; -+ } -+ -+ odm_ant_div(dm); -+} -+#endif /*@#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY*/ -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_antdiv.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_antdiv.h -new file mode 100644 -index 000000000000..df6d60521267 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_antdiv.h -@@ -0,0 +1,547 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMANTDIV_H__ -+#define __PHYDMANTDIV_H__ -+ -+/*@#define ANTDIV_VERSION "2.0" //2014.11.04*/ -+/*@#define ANTDIV_VERSION "2.1" //2015.01.13 Dino*/ -+/*@#define ANTDIV_VERSION "2.2" 2015.01.16 Dino*/ -+/*@#define ANTDIV_VERSION "3.1" 2015.07.29 YuChen,remove 92c 92d 8723a*/ -+/*@#define ANTDIV_VERSION "3.2" 2015.08.11 Stanley, disable antenna*/ -+ /*@diversity when BT is enable for 8723B*/ -+/*@#define ANTDIV_VERSION "3.3" 2015.08.12 Stanley. 8723B does not*/ -+ /*@need to check the antenna is control by BT,*/ -+ /*@because antenna diversity only works when */ -+ /*@BT is disable or radio off*/ -+/*@#define ANTDIV_VERSION "3.4" 2015.08.28 Dino 1.Add 8821A Smart */ -+ /*@Antenna 2. Add 8188F SW S0S1 Antenna*/ -+ /*@Diversity*/ -+/*@#define ANTDIV_VERSION "3.5" 2015.10.07 Stanley Always check antenna*/ -+ /*@detection result from BT-coex. for 8723B,*/ -+ /*@not from PHYDM*/ -+/*@#define ANTDIV_VERSION "3.6"*/ /*@2015.11.16 Stanley */ -+/*@#define ANTDIV_VERSION "3.7" 2015.11.20 Dino Add SmartAnt FAT Patch */ -+/*@#define ANTDIV_VERSION "3.8" 2015.12.21 Dino, Add SmartAnt dynamic*/ -+ /*@training packet num */ -+/*@#define ANTDIV_VERSION "3.9" 2016.01.05 Dino, Add SmartAnt cmd for*/ -+ /*@converting single & two smtant, and add cmd*/ -+ /*@for adjust truth table */ -+#define ANTDIV_VERSION "4.0" /*@2017.05.25 Mark, Add SW antenna diversity*/ -+ /*@for 8821c because HW transient issue */ -+ -+/* @1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+ -+#define ANTDIV_INIT 0xff -+#define MAIN_ANT 1 /*@ant A or ant Main or S1*/ -+#define AUX_ANT 2 /*@AntB or ant Aux or S0*/ -+#define MAX_ANT 3 /* @3 for AP using*/ -+ -+#define ANT1_2G 0 -+/* @= ANT2_5G for 8723D BTG S1 RX S0S1 diversity for 8723D, TX fixed at S1 */ -+#define ANT2_2G 1 -+/* @= ANT1_5G for 8723D BTG S0 RX S0S1 diversity for 8723D, TX fixed at S1 */ -+/*smart antenna*/ -+#define SUPPORT_RF_PATH_NUM 4 -+#define SUPPORT_BEAM_PATTERN_NUM 4 -+#define NUM_ANTENNA_8821A 2 -+ -+#define SUPPORT_BEAM_SET_PATTERN_NUM 16 -+ -+#define NO_FIX_TX_ANT 0 -+#define FIX_TX_AT_MAIN 1 -+#define FIX_AUX_AT_MAIN 2 -+ -+/* @Antenna Diversty Control type */ -+#define ODM_AUTO_ANT 0 -+#define ODM_FIX_MAIN_ANT 1 -+#define ODM_FIX_AUX_ANT 2 -+ -+#define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B |\ -+ ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8195A |\ -+ ODM_RTL8197F | ODM_RTL8721D | ODM_RTL8710C) -+#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 |\ -+ ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814B |\ -+ ODM_RTL8195B) -+#define ODM_JGR3_ANTDIV_SUPPORT ODM_RTL8197G -+#define ODM_ANTDIV_SUPPORT (ODM_N_ANTDIV_SUPPORT | ODM_AC_ANTDIV_SUPPORT |\ -+ ODM_JGR3_ANTDIV_SUPPORT) -+#define ODM_SMART_ANT_SUPPORT (ODM_RTL8188E | ODM_RTL8192E) -+#define ODM_HL_SMART_ANT_TYPE1_SUPPORT (ODM_RTL8821 | ODM_RTL8822B) -+ -+#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B |\ -+ ODM_RTL8881A | ODM_RTL8188F | ODM_RTL8723D |\ -+ ODM_RTL8197F | ODM_RTL8197G) -+#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 |\ -+ ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8195B) -+ -+#define ODM_ANTDIV_SUPPORT_IC (ODM_ANTDIV_2G_SUPPORT_IC | ODM_ANTDIV_5G_SUPPORT_IC) -+ -+#define ODM_EVM_ANTDIV_IC (ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8822B |\ -+ ODM_RTL8197G) -+ -+#define ODM_ANTDIV_2G BIT(0) -+#define ODM_ANTDIV_5G BIT(1) -+ -+#define ANTDIV_ON 1 -+#define ANTDIV_OFF 0 -+ -+#define ANT_PATH_A 0 -+#define ANT_PATH_B 1 -+#define ANT_PATH_AB 2 -+ -+#define FAT_ON 1 -+#define FAT_OFF 0 -+ -+#define TX_BY_DESC 1 -+#define TX_BY_REG 0 -+ -+#define RSSI_METHOD 0 -+#define EVM_METHOD 1 -+#define CRC32_METHOD 2 -+#define TP_METHOD 3 -+ -+#define INIT_ANTDIV_TIMMER 0 -+#define CANCEL_ANTDIV_TIMMER 1 -+#define RELEASE_ANTDIV_TIMMER 2 -+ -+#define CRC32_FAIL 1 -+#define CRC32_OK 0 -+ -+#define evm_rssi_th_high 25 -+#define evm_rssi_th_low 20 -+ -+#define NORMAL_STATE_MIAN 1 -+#define NORMAL_STATE_AUX 2 -+#define TRAINING_STATE 3 -+ -+#define FORCE_RSSI_DIFF 10 -+ -+#define HT_IDX 16 -+#define VHT_IDX 20 -+ -+#define CSI_ON 1 -+#define CSI_OFF 0 -+ -+#define DIVON_CSIOFF 1 -+#define DIVOFF_CSION 2 -+ -+#define BDC_DIV_TRAIN_STATE 0 -+#define bdc_bfer_train_state 1 -+#define BDC_DECISION_STATE 2 -+#define BDC_BF_HOLD_STATE 3 -+#define BDC_DIV_HOLD_STATE 4 -+ -+#define BDC_MODE_1 1 -+#define BDC_MODE_2 2 -+#define BDC_MODE_3 3 -+#define BDC_MODE_4 4 -+#define BDC_MODE_NULL 0xff -+ -+/*SW S0S1 antenna diversity*/ -+#define SWAW_STEP_INIT 0xff -+#define SWAW_STEP_PEEK 0 -+#define SWAW_STEP_DETERMINE 1 -+ -+#define RSSI_CHECK_RESET_PERIOD 10 -+#define RSSI_CHECK_THRESHOLD 50 -+ -+/*@Hong Lin Smart antenna*/ -+#define HL_SMTANT_2WIRE_DATA_LEN 24 -+ -+#if (RTL8723D_SUPPORT == 1 || RTL8710C_SUPPORT == 1) -+ #ifndef CONFIG_ANTDIV_PERIOD -+ #define CONFIG_ANTDIV_PERIOD 1 -+ #endif -+#endif -+/* @1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+ -+ -+struct sw_antenna_switch { -+ u8 double_chk_flag; -+ /*@If current antenna RSSI > "RSSI_CHECK_THRESHOLD", than*/ -+ /*@check this antenna again*/ -+ u8 try_flag; -+ s32 pre_rssi; -+ u8 cur_antenna; -+ u8 pre_ant; -+ u8 rssi_trying; -+ u8 reset_idx; -+ u8 train_time; -+ u8 train_time_flag; -+ /*@base on RSSI difference between two antennas*/ -+ struct phydm_timer_list sw_antdiv_timer; -+ u32 pkt_cnt_sw_ant_div_by_ctrl_frame; -+ boolean is_sw_ant_div_by_ctrl_frame; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if USE_WORKITEM -+ RT_WORK_ITEM phydm_sw_antenna_switch_workitem; -+#endif -+#endif -+ -+ /* @AntDect (Before link Antenna Switch check) need to be moved*/ -+ u16 single_ant_counter; -+ u16 dual_ant_counter; -+ u16 aux_fail_detec_counter; -+ u16 retry_counter; -+ u8 swas_no_link_state; -+ u32 swas_no_link_bk_reg948; -+ boolean ANTA_ON; /*To indicate ant A is or not*/ -+ boolean ANTB_ON; /*@To indicate ant B is on or not*/ -+ boolean pre_aux_fail_detec; -+ boolean rssi_ant_dect_result; -+ u8 ant_5g; -+ u8 ant_2g; -+}; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+struct _BF_DIV_COEX_ { -+ boolean w_bfer_client[ODM_ASSOCIATE_ENTRY_NUM]; -+ boolean w_bfee_client[ODM_ASSOCIATE_ENTRY_NUM]; -+ u32 MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM]; -+ u32 MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM]; -+ -+ u8 bd_ccoex_type_wbfer; -+ u8 num_txbfee_client; -+ u8 num_txbfer_client; -+ u8 bdc_try_counter; -+ u8 bdc_hold_counter; -+ u8 bdc_mode; -+ u8 bdc_active_mode; -+ u8 BDC_state; -+ u8 bdc_rx_idle_update_counter; -+ u8 num_client; -+ u8 pre_num_client; -+ u8 num_bf_tar; -+ u8 num_div_tar; -+ -+ boolean is_all_div_sta_idle; -+ boolean is_all_bf_sta_idle; -+ boolean bdc_try_flag; -+ boolean BF_pass; -+ boolean DIV_pass; -+}; -+#endif -+#endif -+ -+struct phydm_fat_struct { -+ u8 bssid[6]; -+ u8 antsel_rx_keep_0; -+ u8 antsel_rx_keep_1; -+ u8 antsel_rx_keep_2; -+ u8 antsel_rx_keep_3; -+ u32 ant_sum_rssi[7]; -+ u32 ant_rssi_cnt[7]; -+ u32 ant_ave_rssi[7]; -+ u8 fat_state; -+ u8 fat_state_cnt; -+ u32 train_idx; -+ u8 antsel_a[ODM_ASSOCIATE_ENTRY_NUM]; -+ u8 antsel_b[ODM_ASSOCIATE_ENTRY_NUM]; -+ u8 antsel_c[ODM_ASSOCIATE_ENTRY_NUM]; -+ u16 main_ht_cnt[HT_IDX]; -+ u16 aux_ht_cnt[HT_IDX]; -+ u16 main_vht_cnt[VHT_IDX]; -+ u16 aux_vht_cnt[VHT_IDX]; -+ u16 main_sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u16 aux_sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u16 main_cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u16 aux_cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u16 main_sum_cck[ODM_ASSOCIATE_ENTRY_NUM]; -+ u16 aux_sum_cck[ODM_ASSOCIATE_ENTRY_NUM]; -+ u16 main_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM]; -+ u16 aux_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM]; -+ u8 rx_idle_ant; -+ u8 rx_idle_ant2; -+ u32 rvrt_val; /*all rvrt_val for pause API must set to u32*/ -+ u8 ant_div_on_off; -+ u8 div_path_type; -+ boolean is_become_linked; -+ boolean get_stats; -+ u32 min_max_rssi; -+ u8 idx_ant_div_counter_2g; -+ u8 idx_ant_div_counter_5g; -+ u8 ant_div_2g_5g; -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ /*@For 1SS RX phy rate*/ -+ u32 main_evm_sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u32 aux_evm_sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u32 main_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u32 aux_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ -+ /*@For 2SS RX phy rate*/ -+ u32 main_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2];/*@2SS with A1+B*/ -+ u32 aux_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2];/*@2SS with A2+B*/ -+ u32 main_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u32 aux_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ -+ boolean evm_method_enable; -+ u8 target_ant_evm; -+ u8 target_ant_crc32; -+ u8 target_ant_tp; -+ u8 target_ant_enhance; -+ u8 pre_target_ant_enhance; -+ u16 main_mpdu_ok_cnt; -+ u16 aux_mpdu_ok_cnt; -+ -+ u32 crc32_ok_cnt; -+ u32 crc32_fail_cnt; -+ u32 main_crc32_ok_cnt; -+ u32 aux_crc32_ok_cnt; -+ u32 main_crc32_fail_cnt; -+ u32 aux_crc32_fail_cnt; -+ -+ u32 main_tp; -+ u32 aux_tp; -+ u32 main_tp_cnt; -+ u32 aux_tp_cnt; -+ -+ u8 pre_antdiv_rssi; -+ u8 pre_antdiv_tp; -+#endif -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) -+ u32 cck_ctrl_frame_cnt_main; -+ u32 cck_ctrl_frame_cnt_aux; -+ u32 ofdm_ctrl_frame_cnt_main; -+ u32 ofdm_ctrl_frame_cnt_aux; -+ u32 main_ctrl_sum; -+ u32 aux_ctrl_sum; -+ u32 main_ctrl_cnt; -+ u32 aux_ctrl_cnt; -+#endif -+ -+ u8 b_fix_tx_ant; -+ boolean fix_ant_bfee; -+ boolean enable_ctrl_frame_antdiv; -+ boolean use_ctrl_frame_antdiv; -+ boolean *is_no_csi_feedback; -+ boolean force_antdiv_type; -+ u8 antdiv_type_dbg; -+ u8 hw_antsw_occur; -+ u8 *p_force_tx_by_desc; -+ u8 force_tx_by_desc; -+ /*@A temp value, will hook to driver team's outer parameter later*/ -+ u8 *p_default_s0_s1; -+ u8 default_s0_s1; -+ u8 ant_idx_vec[3]; /* for SP3T only, added by Jiao Qi on June.6,2020*/ -+ -+ -+}; -+ -+/* @1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ */ -+ -+enum fat_state /*@Fast antenna training*/ -+{ -+ FAT_BEFORE_LINK_STATE = 0, -+ FAT_PREPARE_STATE = 1, -+ FAT_TRAINING_STATE = 2, -+ FAT_DECISION_STATE = 3 -+}; -+ -+enum ant_div_type { -+ NO_ANTDIV = 0xFF, -+ CG_TRX_HW_ANTDIV = 0x01, -+ CGCS_RX_HW_ANTDIV = 0x02, -+ FIXED_HW_ANTDIV = 0x03, -+ CG_TRX_SMART_ANTDIV = 0x04, -+ CGCS_RX_SW_ANTDIV = 0x05, -+ S0S1_SW_ANTDIV = 0x06, /*@8723B intrnal switch S0 S1*/ -+ S0S1_TRX_HW_ANTDIV = 0x07, /*TRX S0S1 diversity for 8723D*/ -+ HL_SW_SMART_ANT_TYPE1 = 0x10, -+ /*@Hong-Lin Smart antenna use for 8821AE which is a 2 ant. entitys,*/ -+ /*@and each ant. is equipped with 4 antenna patterns*/ -+ HL_SW_SMART_ANT_TYPE2 = 0x11 -+ /*@Hong-Bo Smart antenna use for 8822B which is a 2 ant. entitys*/ -+}; -+ -+/* @1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ */ -+ -+void odm_stop_antenna_switch_dm(void *dm_void); -+ -+void phydm_enable_antenna_diversity(void *dm_void); -+ -+void odm_set_ant_config(void *dm_void, u8 ant_setting /* @0=A, 1=B, 2=C,....*/ -+ ); -+ -+#define sw_ant_div_rest_after_link odm_sw_ant_div_rest_after_link -+ -+void odm_sw_ant_div_rest_after_link(void *dm_void); -+ -+void odm_ant_div_on_off(void *dm_void, u8 swch, u8 path); -+ -+void odm_tx_by_tx_desc_or_reg(void *dm_void, u8 swch); -+ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ -+void phydm_antdiv_reset_statistic(void *dm_void, u32 macid); -+ -+void odm_update_rx_idle_ant(void *dm_void, u8 ant); -+ -+void odm_update_rx_idle_ant_sp3t(void *dm_void, u8 ant); -+ -+void phydm_update_rx_idle_ant_pathb(void *dm_void, u8 ant); -+ -+void phydm_set_antdiv_val(void *dm_void, u32 *val_buf, u8 val_len); -+ -+#if (RTL8723B_SUPPORT == 1) -+void odm_update_rx_idle_ant_8723b(void *dm_void, u8 ant, u32 default_ant, -+ u32 optional_ant); -+#endif -+ -+#if (RTL8188F_SUPPORT == 1) -+void phydm_update_rx_idle_antenna_8188F(void *dm_void, u32 default_ant); -+#endif -+ -+#if (RTL8723D_SUPPORT == 1) -+ -+void phydm_set_tx_ant_pwr_8723d(void *dm_void, u8 ant); -+ -+void odm_update_rx_idle_ant_8723d(void *dm_void, u8 ant, u32 default_ant, -+ u32 optional_ant); -+ -+#endif -+ -+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void odm_sw_antdiv_callback(struct phydm_timer_list *timer); -+ -+void odm_sw_antdiv_workitem_callback(void *context); -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+void odm_sw_antdiv_workitem_callback(void *context); -+ -+void odm_sw_antdiv_callback(void *function_context); -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ -+void odm_sw_antdiv_callback(void *dm_void); -+ -+#endif -+ -+void odm_s0s1_sw_ant_div_by_ctrl_frame(void *dm_void, u8 step); -+ -+void odm_antsel_statistics_ctrl(void *dm_void, u8 antsel_tr_mux, -+ u32 rx_pwdb_all); -+ -+void odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(void *dm_void, -+ void *phy_info_void, -+ void *pkt_info_void); -+ -+#endif -+ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+void phydm_evm_sw_antdiv_init(void *dm_void); -+ -+void phydm_rx_rate_for_antdiv(void *dm_void, void *pkt_info_void); -+ -+void phydm_antdiv_reset_rx_rate(void *dm_void); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phydm_evm_antdiv_callback(struct phydm_timer_list *timer); -+ -+void phydm_evm_antdiv_workitem_callback(void *context); -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+void phydm_evm_antdiv_callback(void *dm_void); -+ -+void phydm_evm_antdiv_workitem_callback(void *context); -+ -+#else -+void phydm_evm_antdiv_callback(void *dm_void); -+#endif -+ -+#endif -+ -+void odm_hw_ant_div(void *dm_void); -+ -+#if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) ||\ -+ (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+void odm_fast_ant_training( -+ void *dm_void); -+ -+void odm_fast_ant_training_callback(void *dm_void); -+ -+void odm_fast_ant_training_work_item_callback(void *dm_void); -+#endif -+ -+void odm_ant_div_init(void *dm_void); -+ -+void odm_ant_div(void *dm_void); -+ -+void odm_antsel_statistics(void *dm_void, void *phy_info_void, -+ u8 antsel_tr_mux, u32 mac_id, u32 utility, u8 method, -+ u8 is_cck_rate); -+ -+void odm_process_rssi_for_ant_div(void *dm_void, void *phy_info_void, -+ void *pkt_info_void); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+void odm_set_tx_ant_by_tx_info(void *dm_void, u8 *desc, u8 mac_id); -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+struct tx_desc; -+/*@declared tx_desc here or compile error happened when enabled 8822B*/ -+ -+void odm_set_tx_ant_by_tx_info(struct rtl8192cd_priv *priv, -+ struct tx_desc *pdesc, unsigned short aid); -+ -+#if 1 /*@def def CONFIG_WLAN_HAL*/ -+void odm_set_tx_ant_by_tx_info_hal(struct rtl8192cd_priv *priv, -+ void *pdesc_data, u16 aid); -+#endif /*@#ifdef CONFIG_WLAN_HAL*/ -+#endif -+ -+void odm_ant_div_config(void *dm_void); -+ -+void odm_ant_div_timers(void *dm_void, u8 state); -+ -+void phydm_antdiv_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void odm_ant_div_reset(void *dm_void); -+ -+void odm_antenna_diversity_init(void *dm_void); -+ -+void odm_antenna_diversity(void *dm_void); -+#endif /*@#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY*/ -+#endif /*@#ifndef __ODMANTDIV_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_api.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_api.c -new file mode 100644 -index 000000000000..a5e736db1e67 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_api.c -@@ -0,0 +1,3763 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ * ************************************************************ -+ */ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+enum channel_width phydm_rxsc_2_bw(void *dm_void, u8 rxsc) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ enum channel_width bw = 0; -+ -+ /* @Check RX bandwidth */ -+ if (rxsc == 0) -+ bw = *dm->band_width; /*@full bw*/ -+ else if (rxsc >= 1 && rxsc <= 8) -+ bw = CHANNEL_WIDTH_20; -+ else if (rxsc >= 9 && rxsc <= 12) -+ bw = CHANNEL_WIDTH_40; -+ else /*if (rxsc >= 13)*/ -+ bw = CHANNEL_WIDTH_80; -+ -+ return bw; -+} -+ -+void phydm_reset_bb_hw_cnt(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /*@ Reset all counter when 1 */ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ #if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ odm_set_bb_reg(dm, R_0x2a44, BIT(21), 0); -+ odm_set_bb_reg(dm, R_0x2a44, BIT(21), 1); -+ } -+ #endif -+ odm_set_bb_reg(dm, R_0x1eb4, BIT(25), 1); -+ odm_set_bb_reg(dm, R_0x1eb4, BIT(25), 0); -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ /*@ Reset all counter when 1 (including PMAC and PHY)*/ -+ /* Reset Page F counter*/ -+ odm_set_bb_reg(dm, R_0xb58, BIT(0), 1); -+ odm_set_bb_reg(dm, R_0xb58, BIT(0), 0); -+ } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ odm_set_bb_reg(dm, R_0xf14, BIT(16), 0x1); -+ odm_set_bb_reg(dm, R_0xf14, BIT(16), 0x0); -+ } -+} -+ -+void phydm_dynamic_ant_weighting(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#ifdef DYN_ANT_WEIGHTING_SUPPORT -+ #if (RTL8197F_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8197F)) -+ phydm_dynamic_ant_weighting_8197f(dm); -+ #endif -+ -+ #if (RTL8812A_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8812)) { -+ phydm_dynamic_ant_weighting_8812a(dm); -+ } -+ #endif -+ -+ #if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8822B)) -+ phydm_dynamic_ant_weighting_8822b(dm); -+ #endif -+#endif -+} -+ -+#ifdef DYN_ANT_WEIGHTING_SUPPORT -+void phydm_ant_weight_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ if (!(dm->support_ic_type & -+ (ODM_RTL8192F | ODM_RTL8822B | ODM_RTL8812 | ODM_RTL8197F))) { -+ return; -+ } -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "echo dis_dym_ant_weighting {0/1}\n"); -+ -+ } else { -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if (var1[0] == 1) { -+ dm->is_disable_dym_ant_weighting = 1; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Disable dyn-ant-weighting\n"); -+ } else { -+ dm->is_disable_dym_ant_weighting = 0; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Enable dyn-ant-weighting\n"); -+ } -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -+ -+void phydm_trx_antenna_setting_init(void *dm_void, u8 num_rf_path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rx_ant = 0, tx_ant = 0; -+ u8 path_bitmap = 1; -+ -+ path_bitmap = (u8)phydm_gen_bitmask(num_rf_path); -+ -+ /*PHYDM_DBG(dm, ODM_COMP_INIT, "path_bitmap=0x%x\n", path_bitmap);*/ -+ -+ dm->tx_ant_status = path_bitmap; -+ dm->rx_ant_status = path_bitmap; -+ -+ if (num_rf_path == PDM_1SS) -+ return; -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & -+ (ODM_RTL8192F | ODM_RTL8192E | ODM_RTL8197F)) { -+ dm->rx_ant_status = (u8)odm_get_bb_reg(dm, R_0xc04, 0x3); -+ dm->tx_ant_status = (u8)odm_get_bb_reg(dm, R_0x90c, 0x3); -+ } else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8814A)) { -+ dm->rx_ant_status = (u8)odm_get_bb_reg(dm, R_0x808, 0xf); -+ dm->tx_ant_status = (u8)odm_get_bb_reg(dm, R_0x80c, 0xf); -+ } -+ #endif -+ /* @trx_ant_status are already updated in trx mode API in JGR3 ICs */ -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "[%s]ant_status{tx,rx}={0x%x, 0x%x}\n", -+ __func__, dm->tx_ant_status, dm->rx_ant_status); -+} -+ -+void phydm_config_ofdm_tx_path(void *dm_void, enum bb_path path) -+{ -+#if (RTL8192E_SUPPORT || RTL8192F_SUPPORT || RTL8812A_SUPPORT) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 ofdm_tx_path = 0x33; -+ -+ if (dm->num_rf_path == PDM_1SS) -+ return; -+ -+ switch (dm->support_ic_type) { -+ #if (RTL8192E_SUPPORT || RTL8192F_SUPPORT) -+ case ODM_RTL8192E: -+ case ODM_RTL8192F: -+ if (path == BB_PATH_A) -+ odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x81121313); -+ else if (path == BB_PATH_B) -+ odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x82221323); -+ else if (path == BB_PATH_AB) -+ odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x83321333); -+ -+ break; -+ #endif -+ -+ #if (RTL8812A_SUPPORT) -+ case ODM_RTL8812: -+ if (path == BB_PATH_A) -+ ofdm_tx_path = 0x11; -+ else if (path == BB_PATH_B) -+ ofdm_tx_path = 0x22; -+ else if (path == BB_PATH_AB) -+ ofdm_tx_path = 0x33; -+ -+ odm_set_bb_reg(dm, R_0x80c, 0xff00, ofdm_tx_path); -+ -+ break; -+ #endif -+ -+ default: -+ break; -+ } -+#endif -+} -+ -+void phydm_config_ofdm_rx_path(void *dm_void, enum bb_path path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 val = 0; -+ -+ if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8192F)) { -+#if (RTL8192E_SUPPORT || RTL8192F_SUPPORT) -+ if (path == BB_PATH_A) -+ val = 1; -+ else if (path == BB_PATH_B) -+ val = 2; -+ else if (path == BB_PATH_AB) -+ val = 3; -+ -+ odm_set_bb_reg(dm, R_0xc04, 0xff, ((val << 4) | val)); -+ odm_set_bb_reg(dm, R_0xd04, 0xf, val); -+#endif -+ } -+#if (RTL8812A_SUPPORT || RTL8822B_SUPPORT) -+ else if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8822B)) { -+ if (path == BB_PATH_A) -+ val = 1; -+ else if (path == BB_PATH_B) -+ val = 2; -+ else if (path == BB_PATH_AB) -+ val = 3; -+ -+ odm_set_bb_reg(dm, R_0x808, MASKBYTE0, ((val << 4) | val)); -+ } -+#endif -+} -+ -+void phydm_config_cck_rx_antenna_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & ODM_IC_1SS) -+ return; -+ -+ /*@CCK 2R CCA parameters*/ -+ odm_set_bb_reg(dm, R_0xa00, BIT(15), 0x0); /*@Disable Ant diversity*/ -+ odm_set_bb_reg(dm, R_0xa70, BIT(7), 0); /*@Concurrent CCA at LSB & USB*/ -+ odm_set_bb_reg(dm, R_0xa74, BIT(8), 0); /*RX path diversity enable*/ -+ odm_set_bb_reg(dm, R_0xa14, BIT(7), 0); /*r_en_mrc_antsel*/ -+ odm_set_bb_reg(dm, R_0xa20, (BIT(5) | BIT(4)), 1); /*@MBC weighting*/ -+ -+ if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8192F)) -+ odm_set_bb_reg(dm, R_0xa08, BIT(28), 1); /*r_cck_2nd_sel_eco*/ -+ else if (dm->support_ic_type & ODM_RTL8814A) -+ odm_set_bb_reg(dm, R_0xa84, BIT(28), 1); /*@2R CCA only*/ -+#endif -+} -+ -+void phydm_config_cck_rx_path(void *dm_void, enum bb_path path) -+{ -+#if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 path_div_select = 0; -+ u8 cck_path[2] = {0}; -+ u8 en_2R_path = 0; -+ u8 en_2R_mrc = 0; -+ u8 i = 0, j = 0; -+ u8 num_enable_path = 0; -+ u8 cck_mrc_max_path = 2; -+ -+ if (dm->support_ic_type & ODM_IC_1SS) -+ return; -+ -+ for (i = 0; i < 4; i++) { -+ if (path & BIT(i)) { /*@ex: PHYDM_ABCD*/ -+ num_enable_path++; -+ cck_path[j] = i; -+ j++; -+ } -+ if (num_enable_path >= cck_mrc_max_path) -+ break; -+ } -+ -+ if (num_enable_path > 1) { -+ path_div_select = 1; -+ en_2R_path = 1; -+ en_2R_mrc = 1; -+ } else { -+ path_div_select = 0; -+ en_2R_path = 0; -+ en_2R_mrc = 0; -+ } -+ /*@CCK_1 input signal path*/ -+ odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), cck_path[0]); -+ /*@CCK_2 input signal path*/ -+ odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), cck_path[1]); -+ /*@enable Rx path diversity*/ -+ odm_set_bb_reg(dm, R_0xa74, BIT(8), path_div_select); -+ /*@enable 2R Rx path*/ -+ odm_set_bb_reg(dm, R_0xa2c, BIT(18), en_2R_path); -+ /*@enable 2R MRC*/ -+ odm_set_bb_reg(dm, R_0xa2c, BIT(22), en_2R_mrc); -+ if (dm->support_ic_type & (ODM_RTL8192F | ODM_RTL8197F)) { -+ if (path == BB_PATH_A) { -+ odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 0); -+ odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 0); -+ odm_set_bb_reg(dm, R_0xa74, BIT(8), 0); -+ odm_set_bb_reg(dm, R_0xa2c, (BIT(18) | BIT(17)), 0); -+ odm_set_bb_reg(dm, R_0xa2c, (BIT(22) | BIT(21)), 0); -+ } else if (path == BB_PATH_B) {/*@for DC cancellation*/ -+ odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 1); -+ odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 1); -+ odm_set_bb_reg(dm, R_0xa74, BIT(8), 0); -+ odm_set_bb_reg(dm, R_0xa2c, (BIT(18) | BIT(17)), 0); -+ odm_set_bb_reg(dm, R_0xa2c, (BIT(22) | BIT(21)), 0); -+ } else if (path == BB_PATH_AB) { -+ odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 0); -+ odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 1); -+ odm_set_bb_reg(dm, R_0xa74, BIT(8), 1); -+ odm_set_bb_reg(dm, R_0xa2c, (BIT(18) | BIT(17)), 1); -+ odm_set_bb_reg(dm, R_0xa2c, (BIT(22) | BIT(21)), 1); -+ } -+ } else if (dm->support_ic_type & ODM_RTL8822B) { -+ if (path == BB_PATH_A) { -+ odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 0); -+ odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 0); -+ } else { -+ odm_set_bb_reg(dm, R_0xa04, (BIT(27) | BIT(26)), 1); -+ odm_set_bb_reg(dm, R_0xa04, (BIT(25) | BIT(24)), 1); -+ } -+ } -+ -+#endif -+} -+ -+void phydm_config_cck_tx_path(void *dm_void, enum bb_path path) -+{ -+#if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (path == BB_PATH_A) -+ odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x8); -+ else if (path == BB_PATH_B) -+ odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x4); -+ else /*if (path == BB_PATH_AB)*/ -+ odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0xc); -+#endif -+} -+ -+void phydm_config_trx_path_v2(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8197G_SUPPORT ||\ -+ RTL8812F_SUPPORT || RTL8198F_SUPPORT) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 val[10] = {0}; -+ char help[] = "-h"; -+ u8 i = 0, input_idx = 0; -+ enum bb_path tx_path, rx_path, tx_path_ctrl; -+ boolean dbg_mode_en; -+ -+ if (!(dm->support_ic_type & -+ (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F | ODM_RTL8822C | -+ ODM_RTL8814B | ODM_RTL8812F | ODM_RTL8197G | ODM_RTL8198F))) -+ return; -+ -+ for (i = 0; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &val[i]); -+ input_idx++; -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ dbg_mode_en = (boolean)val[0]; -+ tx_path = (enum bb_path)val[1]; -+ rx_path = (enum bb_path)val[2]; -+ tx_path_ctrl = (enum bb_path)val[3]; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8822B | -+ ODM_RTL8192F)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{en} {tx_path} {rx_path} {ff:auto, else:1ss_tx_path}\n" -+ ); -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{en} {tx_path} {rx_path} {is_tx_2_path}\n"); -+ } -+ -+ } else if (dbg_mode_en) { -+ dm->is_disable_phy_api = false; -+ phydm_api_trx_mode(dm, tx_path, rx_path, tx_path_ctrl); -+ dm->is_disable_phy_api = true; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "T/RX path = 0x%x/0x%x, tx_path_ctrl=%d\n", -+ tx_path, rx_path, tx_path_ctrl); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "T/RX path_en={0x%x, 0x%x}, tx_1ss=%d\n", -+ dm->tx_ant_status, dm->rx_ant_status, -+ dm->tx_1ss_status); -+ } else { -+ dm->is_disable_phy_api = false; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Disable API debug mode\n"); -+ } -+#endif -+} -+ -+void phydm_config_trx_path_v1(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+#if (RTL8192E_SUPPORT || RTL8812A_SUPPORT) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 val[10] = {0}; -+ char help[] = "-h"; -+ u8 i = 0, input_idx = 0; -+ -+ if (!(dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812))) -+ return; -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &val[i]); -+ input_idx++; -+ } -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{0:CCK, 1:OFDM} {1:TX, 2:RX} {1:path_A, 2:path_B, 3:path_AB}\n"); -+ -+ *_used = used; -+ *_out_len = out_len; -+ return; -+ -+ } else if (val[0] == 0) { -+ /* @CCK */ -+ if (val[1] == 1) { /*TX*/ -+ if (val[2] == 1) -+ phydm_config_cck_tx_path(dm, BB_PATH_A); -+ else if (val[2] == 2) -+ phydm_config_cck_tx_path(dm, BB_PATH_B); -+ else if (val[2] == 3) -+ phydm_config_cck_tx_path(dm, BB_PATH_AB); -+ } else if (val[1] == 2) { /*RX*/ -+ -+ phydm_config_cck_rx_antenna_init(dm); -+ -+ if (val[2] == 1) -+ phydm_config_cck_rx_path(dm, BB_PATH_A); -+ else if (val[2] == 2) -+ phydm_config_cck_rx_path(dm, BB_PATH_B); -+ else if (val[2] == 3) -+ phydm_config_cck_rx_path(dm, BB_PATH_AB); -+ } -+ } -+ /* OFDM */ -+ else if (val[0] == 1) { -+ if (val[1] == 1) /*TX*/ -+ phydm_config_ofdm_tx_path(dm, val[2]); -+ else if (val[1] == 2) /*RX*/ -+ phydm_config_ofdm_rx_path(dm, val[2]); -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "PHYDM Set path [%s] [%s] = [%s%s%s%s]\n", -+ (val[0] == 1) ? "OFDM" : "CCK", -+ (val[1] == 1) ? "TX" : "RX", -+ (val[2] & 0x1) ? "A" : "", (val[2] & 0x2) ? "B" : "", -+ (val[2] & 0x4) ? "C" : "", -+ (val[2] & 0x8) ? "D" : ""); -+ -+ *_used = used; -+ *_out_len = out_len; -+#endif -+} -+ -+void phydm_config_trx_path(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812)) { -+ #if (RTL8192E_SUPPORT || RTL8812A_SUPPORT) -+ phydm_config_trx_path_v1(dm, input, _used, output, _out_len); -+ #endif -+ } else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | -+ ODM_RTL8192F | ODM_RTL8822C | ODM_RTL8812F | -+ ODM_RTL8197G | ODM_RTL8814B | ODM_RTL8198F)) { -+ #if (RTL8822B_SUPPORT || RTL8197F_SUPPORT ||\ -+ RTL8192F_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8814B_SUPPORT || RTL8812F_SUPPORT ||\ -+ RTL8197G_SUPPORT || RTL8198F_SUPPORT) -+ phydm_config_trx_path_v2(dm, input, _used, output, _out_len); -+ #endif -+ } -+} -+ -+void phydm_tx_2path(void *dm_void) -+{ -+#if (defined(PHYDM_COMPILE_IC_2SS)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ enum bb_path rx_path = (enum bb_path)dm->rx_ant_status; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__); -+ -+ -+ if (!(dm->support_ic_type & ODM_IC_2SS)) -+ return; -+ -+ #if (RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8197F_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8197G_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F | -+ ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) -+ phydm_api_trx_mode(dm, BB_PATH_AB, rx_path, BB_PATH_AB); -+ #endif -+ -+ #if (RTL8812A_SUPPORT || RTL8192E_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) { -+ phydm_config_cck_tx_path(dm, BB_PATH_AB); -+ phydm_config_ofdm_tx_path(dm, BB_PATH_AB); -+ } -+ #endif -+#endif -+} -+ -+void phydm_stop_3_wire(void *dm_void, u8 set_type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (set_type == PHYDM_SET) { -+ /*@[Stop 3-wires]*/ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ odm_set_bb_reg(dm, R_0x180c, 0x3, 0x0); -+ odm_set_bb_reg(dm, R_0x180c, BIT(28), 0x1); -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) { -+ odm_set_bb_reg(dm, R_0x410c, 0x3, 0x0); -+ odm_set_bb_reg(dm, R_0x410c, BIT(28), 0x1); -+ } -+ #endif -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { -+ odm_set_bb_reg(dm, R_0x520c, 0x3, 0x0); -+ odm_set_bb_reg(dm, R_0x520c, BIT(28), 0x1); -+ odm_set_bb_reg(dm, R_0x530c, 0x3, 0x0); -+ odm_set_bb_reg(dm, R_0x530c, BIT(28), 0x1); -+ } -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ odm_set_bb_reg(dm, R_0xc00, 0xf, 0x4); -+ odm_set_bb_reg(dm, R_0xe00, 0xf, 0x4); -+ } else { -+ odm_set_bb_reg(dm, R_0x88c, 0xf00000, 0xf); -+ } -+ -+ } else { /*@if (set_type == PHYDM_REVERT)*/ -+ -+ /*@[Start 3-wires]*/ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ odm_set_bb_reg(dm, R_0x180c, 0x3, 0x3); -+ odm_set_bb_reg(dm, R_0x180c, BIT(28), 0x1); -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) { -+ odm_set_bb_reg(dm, R_0x410c, 0x3, 0x3); -+ odm_set_bb_reg(dm, R_0x410c, BIT(28), 0x1); -+ } -+ #endif -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { -+ odm_set_bb_reg(dm, R_0x520c, 0x3, 0x3); -+ odm_set_bb_reg(dm, R_0x520c, BIT(28), 0x1); -+ odm_set_bb_reg(dm, R_0x530c, 0x3, 0x3); -+ odm_set_bb_reg(dm, R_0x530c, BIT(28), 0x1); -+ } -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ odm_set_bb_reg(dm, R_0xc00, 0xf, 0x7); -+ odm_set_bb_reg(dm, R_0xe00, 0xf, 0x7); -+ } else { -+ odm_set_bb_reg(dm, R_0x88c, 0xf00000, 0x0); -+ } -+ } -+} -+ -+u8 phydm_stop_ic_trx(void *dm_void, u8 set_type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_api_stuc *api = &dm->api_table; -+ u8 i = 0; -+ boolean trx_idle_success = false; -+ u32 dbg_port_value = 0; -+ -+ if (set_type == PHYDM_SET) { -+ /*[Stop TRX]---------------------------------------------------------*/ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ #if (RTL8723F_SUPPORT) -+ /*Judy 2020-0515*/ -+ /*set debug port to 0x0*/ -+ if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, 0x0)) -+ return PHYDM_SET_FAIL; -+ #endif -+ for (i = 0; i < 100; i++) { -+ dbg_port_value = odm_get_bb_reg(dm, R_0x2db4, -+ MASKDWORD); -+ /* BB idle */ -+ if ((dbg_port_value & 0x1FFEFF3F) == 0 && -+ (dbg_port_value & 0xC0010000) == -+ 0xC0010000) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Stop trx wait for (%d) times\n", -+ i); -+ -+ trx_idle_success = true; -+ break; -+ } -+ } -+ } else { -+ /*set debug port to 0x0*/ -+ if (!phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, 0x0)) -+ return PHYDM_SET_FAIL; -+ for (i = 0; i < 100; i++) { -+ dbg_port_value = phydm_get_bb_dbg_port_val(dm); -+ /* PHYTXON && CCA_all */ -+ if (dm->support_ic_type & (ODM_RTL8721D | -+ ODM_RTL8710B | ODM_RTL8710C | -+ ODM_RTL8188F | ODM_RTL8723D)) { -+ if ((dbg_port_value & -+ (BIT(20) | BIT(15))) == 0) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Stop trx wait for (%d) times\n", -+ i); -+ -+ trx_idle_success = true; -+ break; -+ } -+ } else { -+ if ((dbg_port_value & -+ (BIT(17) | BIT(3))) == 0) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Stop trx wait for (%d) times\n", -+ i); -+ -+ trx_idle_success = true; -+ break; -+ } -+ } -+ ODM_delay_ms(1); -+ } -+ phydm_release_bb_dbg_port(dm); -+ } -+ -+ if (trx_idle_success) { -+ api->tx_queue_bitmap = odm_read_1byte(dm, R_0x522); -+ -+ /*pause all TX queue*/ -+ odm_set_mac_reg(dm, R_0x520, 0xff0000, 0xff); -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ /*disable OFDM RX CCA*/ -+ odm_set_bb_reg(dm, R_0x1d58, 0xff8, 0x1ff); -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ /*disable OFDM RX CCA*/ -+ odm_set_bb_reg(dm, R_0x838, BIT(1), 1); -+ } else { -+ api->rxiqc_reg1 = odm_read_4byte(dm, R_0xc14); -+ api->rxiqc_reg2 = odm_read_4byte(dm, R_0xc1c); -+ /* [ Set IQK Matrix = 0 ] -+ * equivalent to [ Turn off CCA] -+ */ -+ odm_set_bb_reg(dm, R_0xc14, MASKDWORD, 0x0); -+ odm_set_bb_reg(dm, R_0xc1c, MASKDWORD, 0x0); -+ } -+ phydm_dis_cck_trx(dm, PHYDM_SET); -+ } else { -+ return PHYDM_SET_FAIL; -+ } -+ -+ return PHYDM_SET_SUCCESS; -+ -+ } else { /*@if (set_type == PHYDM_REVERT)*/ -+ /*Release all TX queue*/ -+ odm_write_1byte(dm, R_0x522, api->tx_queue_bitmap); -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ /*@enable OFDM RX CCA*/ -+ odm_set_bb_reg(dm, R_0x1d58, 0xff8, 0x0); -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ /*@enable OFDM RX CCA*/ -+ odm_set_bb_reg(dm, R_0x838, BIT(1), 0); -+ } else { -+ /* @[Set IQK Matrix = 0] equivalent to [ Turn off CCA]*/ -+ odm_write_4byte(dm, R_0xc14, api->rxiqc_reg1); -+ odm_write_4byte(dm, R_0xc1c, api->rxiqc_reg2); -+ } -+ phydm_dis_cck_trx(dm, PHYDM_REVERT); -+ return PHYDM_SET_SUCCESS; -+ } -+} -+ -+void phydm_dis_cck_trx(void *dm_void, u8 set_type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_api_stuc *api = &dm->api_table; -+ -+ if (set_type == PHYDM_SET) { -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ if(dm->support_ic_type & ODM_RTL8723F) { -+ api->ccktx_path = 1; -+ /* @disable CCK CCA */ -+ odm_set_bb_reg(dm, R_0x2a24, BIT(13), 0x1); -+ /* @disable CCK Tx */ -+ odm_set_bb_reg(dm, R_0x2a00, BIT(1), 0x1); -+ } else { -+ api->ccktx_path = (u8)odm_get_bb_reg(dm, R_0x1a04, -+ 0xf0000000); -+ /* @CCK RxIQ weighting = [0,0] */ -+ odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x3); -+ /* @disable CCK Tx */ -+ odm_set_bb_reg(dm, R_0x1a04, 0xf0000000, 0x0); -+ } -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ api->ccktx_path = (u8)odm_get_bb_reg(dm, R_0xa04, -+ 0xf0000000); -+ /* @disable CCK block */ -+ odm_set_bb_reg(dm, R_0x808, BIT(28), 0); -+ /* @disable CCK Tx */ -+ odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x0); -+ } else { -+ api->ccktx_path = (u8)odm_get_bb_reg(dm, R_0xa04, -+ 0xf0000000); -+ /* @disable whole CCK block */ -+ odm_set_bb_reg(dm, R_0x800, BIT(24), 0); -+ /* @disable CCK Tx */ -+ odm_set_bb_reg(dm, R_0xa04, 0xf0000000, 0x0); -+ } -+ } else if (set_type == PHYDM_REVERT) { -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ if(dm->support_ic_type & ODM_RTL8723F) { -+ /* @enable CCK CCA */ -+ odm_set_bb_reg(dm, R_0x2a24, BIT(13), 0x0); -+ /* @enable CCK Tx */ -+ odm_set_bb_reg(dm, R_0x2a00, BIT(1), 0x0); -+ } else { -+ /* @CCK RxIQ weighting = [1,1] */ -+ odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x0); -+ /* @enable CCK Tx */ -+ odm_set_bb_reg(dm, R_0x1a04, 0xf0000000, -+ api->ccktx_path); -+ } -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ /* @enable CCK block */ -+ odm_set_bb_reg(dm, R_0x808, BIT(28), 1); -+ /* @enable CCK Tx */ -+ odm_set_bb_reg(dm, R_0xa04, 0xf0000000, -+ api->ccktx_path); -+ } else { -+ /* @enable whole CCK block */ -+ odm_set_bb_reg(dm, R_0x800, BIT(24), 1); -+ /* @enable CCK Tx */ -+ odm_set_bb_reg(dm, R_0xa04, 0xf0000000, -+ api->ccktx_path); -+ } -+ } -+} -+ -+void phydm_bw_fixed_enable(void *dm_void, u8 enable) -+{ -+#ifdef CONFIG_BW_INDICATION -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean val = (enable == FUNC_ENABLE) ? 1 : 0; -+ -+ if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8195B)) -+ odm_set_bb_reg(dm, R_0x840, BIT(4), val); -+ else if (dm->support_ic_type & ODM_RTL8822C) -+ odm_set_bb_reg(dm, R_0x878, BIT(28), val); -+#endif -+} -+ -+void phydm_bw_fixed_setting(void *dm_void) -+{ -+#ifdef CONFIG_BW_INDICATION -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_api_stuc *api = &dm->api_table; -+ u8 bw = *dm->band_width; -+ u32 reg = 0, reg_mask = 0, reg_value = 0; -+ -+ if (!(dm->support_ic_type & ODM_DYM_BW_INDICATION_SUPPORT)) -+ return; -+ -+ if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | -+ ODM_RTL8195B)) { -+ reg = R_0x840; -+ reg_mask = 0xf; -+ reg_value = api->pri_ch_idx; -+ } else if (dm->support_ic_type & ODM_RTL8822C) { -+ reg = R_0x878; -+ reg_mask = 0xc0000000; -+ reg_value = 0x0; -+ } -+ -+ switch (bw) { -+ case CHANNEL_WIDTH_80: -+ odm_set_bb_reg(dm, reg, reg_mask, reg_value); -+ break; -+ case CHANNEL_WIDTH_40: -+ odm_set_bb_reg(dm, reg, reg_mask, reg_value); -+ break; -+ default: -+ odm_set_bb_reg(dm, reg, reg_mask, 0x0); -+ } -+ -+ phydm_bw_fixed_enable(dm, FUNC_ENABLE); -+#endif -+} -+ -+void phydm_set_ext_switch(void *dm_void, u32 ext_ant_switch) -+{ -+#if (RTL8821A_SUPPORT || RTL8881A_SUPPORT) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A))) -+ return; -+ -+ /*Output Pin Settings*/ -+ -+ /*select DPDT_P and DPDT_N as output pin*/ -+ odm_set_mac_reg(dm, R_0x4c, BIT(23), 0); -+ -+ /*@by WLAN control*/ -+ odm_set_mac_reg(dm, R_0x4c, BIT(24), 1); -+ -+ /*@DPDT_N = 1b'0*/ /*@DPDT_P = 1b'0*/ -+ odm_set_bb_reg(dm, R_0xcb4, 0xFF, 77); -+ -+ if (ext_ant_switch == 1) { /*@2b'01*/ -+ odm_set_bb_reg(dm, R_0xcb4, (BIT(29) | BIT(28)), 1); -+ PHYDM_DBG(dm, ODM_COMP_API, "8821A ant swh=2b'01\n"); -+ } else if (ext_ant_switch == 2) { /*@2b'10*/ -+ odm_set_bb_reg(dm, R_0xcb4, BIT(29) | BIT(28), 2); -+ PHYDM_DBG(dm, ODM_COMP_API, "*8821A ant swh=2b'10\n"); -+ } -+#endif -+} -+ -+void phydm_csi_mask_enable(void *dm_void, u32 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean en = false; -+ -+ en = (enable == FUNC_ENABLE) ? true : false; -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ odm_set_bb_reg(dm, R_0xd2c, BIT(28), en); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Enable CSI Mask: Reg 0xD2C[28] = ((0x%x))\n", en); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ odm_set_bb_reg(dm, R_0xc0c, BIT(3), en); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Enable CSI Mask: Reg 0xc0c[3] = ((0x%x))\n", en); -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ odm_set_bb_reg(dm, R_0x874, BIT(0), en); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Enable CSI Mask: Reg 0x874[0] = ((0x%x))\n", en); -+ } -+} -+ -+void phydm_clean_all_csi_mask(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ odm_set_bb_reg(dm, R_0xd40, MASKDWORD, 0); -+ odm_set_bb_reg(dm, R_0xd44, MASKDWORD, 0); -+ odm_set_bb_reg(dm, R_0xd48, MASKDWORD, 0); -+ odm_set_bb_reg(dm, R_0xd4c, MASKDWORD, 0); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ u8 i = 0, idx_lmt = 0; -+ -+ if (dm->support_ic_type & -+ (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) -+ idx_lmt = 127; -+ else /*@for IC supporting 80 + 80*/ -+ idx_lmt = 255; -+ -+ odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x3); -+ odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x1); -+ for (i = 0; i < idx_lmt; i++) { -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, i); -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE0, 0x0); -+ } -+ odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x0); -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ odm_set_bb_reg(dm, R_0x880, MASKDWORD, 0); -+ odm_set_bb_reg(dm, R_0x884, MASKDWORD, 0); -+ odm_set_bb_reg(dm, R_0x888, MASKDWORD, 0); -+ odm_set_bb_reg(dm, R_0x88c, MASKDWORD, 0); -+ odm_set_bb_reg(dm, R_0x890, MASKDWORD, 0); -+ odm_set_bb_reg(dm, R_0x894, MASKDWORD, 0); -+ odm_set_bb_reg(dm, R_0x898, MASKDWORD, 0); -+ odm_set_bb_reg(dm, R_0x89c, MASKDWORD, 0); -+ } -+} -+ -+void phydm_set_csi_mask(void *dm_void, u32 tone_idx_tmp, u8 tone_direction) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 byte_offset = 0, bit_offset = 0; -+ u32 target_reg = 0; -+ u8 reg_tmp_value = 0; -+ u32 tone_num = 64; -+ u32 tone_num_shift = 0; -+ u32 csi_mask_reg_p = 0, csi_mask_reg_n = 0; -+ -+ /* @calculate real tone idx*/ -+ if ((tone_idx_tmp % 10) >= 5) -+ tone_idx_tmp += 10; -+ -+ tone_idx_tmp = (tone_idx_tmp / 10); -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ tone_num = 64; -+ csi_mask_reg_p = 0xD40; -+ csi_mask_reg_n = 0xD48; -+ -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ tone_num = 128; -+ csi_mask_reg_p = 0x880; -+ csi_mask_reg_n = 0x890; -+ } -+ -+ if (tone_direction == FREQ_POSITIVE) { -+ if (tone_idx_tmp >= (tone_num - 1)) -+ tone_idx_tmp = (tone_num - 1); -+ -+ byte_offset = (u8)(tone_idx_tmp >> 3); -+ bit_offset = (u8)(tone_idx_tmp & 0x7); -+ target_reg = csi_mask_reg_p + byte_offset; -+ -+ } else { -+ tone_num_shift = tone_num; -+ -+ if (tone_idx_tmp >= tone_num) -+ tone_idx_tmp = tone_num; -+ -+ tone_idx_tmp = tone_num - tone_idx_tmp; -+ -+ byte_offset = (u8)(tone_idx_tmp >> 3); -+ bit_offset = (u8)(tone_idx_tmp & 0x7); -+ target_reg = csi_mask_reg_n + byte_offset; -+ } -+ -+ reg_tmp_value = odm_read_1byte(dm, target_reg); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Pre Mask tone idx[%d]: Reg0x%x = ((0x%x))\n", -+ (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value); -+ reg_tmp_value |= BIT(bit_offset); -+ odm_write_1byte(dm, target_reg, reg_tmp_value); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask tone idx[%d]: Reg0x%x = ((0x%x))\n", -+ (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value); -+} -+ -+void phydm_set_nbi_reg(void *dm_void, u32 tone_idx_tmp, u32 bw) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ /*tone_idx X 10*/ -+ u32 nbi_128[NBI_128TONE] = {25, 55, 85, 115, 135, -+ 155, 185, 205, 225, 245, -+ 265, 285, 305, 335, 355, -+ 375, 395, 415, 435, 455, -+ 485, 505, 525, 555, 585, 615, 635}; -+ /*tone_idx X 10*/ -+ u32 nbi_256[NBI_256TONE] = {25, 55, 85, 115, 135, -+ 155, 175, 195, 225, 245, -+ 265, 285, 305, 325, 345, -+ 365, 385, 405, 425, 445, -+ 465, 485, 505, 525, 545, -+ 565, 585, 605, 625, 645, -+ 665, 695, 715, 735, 755, -+ 775, 795, 815, 835, 855, -+ 875, 895, 915, 935, 955, -+ 975, 995, 1015, 1035, 1055, -+ 1085, 1105, 1125, 1145, 1175, -+ 1195, 1225, 1255, 1275}; -+ u32 reg_idx = 0; -+ u32 i; -+ u8 nbi_table_idx = FFT_128_TYPE; -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ nbi_table_idx = FFT_128_TYPE; -+ } else if (dm->support_ic_type & ODM_IC_11AC_1_SERIES) { -+ nbi_table_idx = FFT_256_TYPE; -+ } else if (dm->support_ic_type & ODM_IC_11AC_2_SERIES) { -+ if (bw == 80) -+ nbi_table_idx = FFT_256_TYPE; -+ else /*@20M, 40M*/ -+ nbi_table_idx = FFT_128_TYPE; -+ } -+ -+ if (nbi_table_idx == FFT_128_TYPE) { -+ for (i = 0; i < NBI_128TONE; i++) { -+ if (tone_idx_tmp < nbi_128[i]) { -+ reg_idx = i + 1; -+ break; -+ } -+ } -+ -+ } else if (nbi_table_idx == FFT_256_TYPE) { -+ for (i = 0; i < NBI_256TONE; i++) { -+ if (tone_idx_tmp < nbi_256[i]) { -+ reg_idx = i + 1; -+ break; -+ } -+ } -+ } -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ odm_set_bb_reg(dm, R_0xc40, 0x1f000000, reg_idx); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set tone idx: Reg0xC40[28:24] = ((0x%x))\n", -+ reg_idx); -+ } else { -+ odm_set_bb_reg(dm, R_0x87c, 0xfc000, reg_idx); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set tone idx: Reg0x87C[19:14] = ((0x%x))\n", -+ reg_idx); -+ } -+} -+ -+void phydm_nbi_enable(void *dm_void, u32 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 val = 0; -+ -+ val = (enable == FUNC_ENABLE) ? 1 : 0; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "Enable NBI=%d\n", val); -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ if (dm->support_ic_type & (ODM_RTL8192F | ODM_RTL8197F)) { -+ val = (enable == FUNC_ENABLE) ? 0xf : 0; -+ odm_set_bb_reg(dm, R_0xc50, 0xf000000, val); -+ } else { -+ odm_set_bb_reg(dm, R_0xc40, BIT(9), val); -+ } -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | -+ ODM_RTL8195B)) { -+ odm_set_bb_reg(dm, R_0x87c, BIT(13), val); -+ odm_set_bb_reg(dm, R_0xc20, BIT(28), val); -+ if (dm->rf_type > RF_1T1R) -+ odm_set_bb_reg(dm, R_0xe20, BIT(28), val); -+ } else { -+ odm_set_bb_reg(dm, R_0x87c, BIT(13), val); -+ } -+ } -+} -+ -+u8 phydm_find_fc(void *dm_void, u32 channel, u32 bw, u32 second_ch, u32 *fc_in) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 fc = *fc_in; -+ u32 start_ch_per_40m[NUM_START_CH_40M] = {36, 44, 52, 60, 100, -+ 108, 116, 124, 132, 140, -+ 149, 157, 165, 173}; -+ u32 start_ch_per_80m[NUM_START_CH_80M] = {36, 52, 100, 116, 132, -+ 149, 165}; -+ u32 *start_ch = &start_ch_per_40m[0]; -+ u32 num_start_channel = NUM_START_CH_40M; -+ u32 channel_offset = 0; -+ u32 i; -+ -+ /*@2.4G*/ -+ if (channel <= 14 && channel > 0) { -+ if (bw == 80) -+ return PHYDM_SET_FAIL; -+ -+ fc = 2412 + (channel - 1) * 5; -+ -+ if (bw == 40 && second_ch == PHYDM_ABOVE) { -+ if (channel >= 10) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "CH = ((%d)), Scnd_CH = ((%d)) Error setting\n", -+ channel, second_ch); -+ return PHYDM_SET_FAIL; -+ } -+ fc += 10; -+ } else if (bw == 40 && (second_ch == PHYDM_BELOW)) { -+ if (channel <= 2) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "CH = ((%d)), Scnd_CH = ((%d)) Error setting\n", -+ channel, second_ch); -+ return PHYDM_SET_FAIL; -+ } -+ fc -= 10; -+ } -+ } -+ /*@5G*/ -+ else if (channel >= 36 && channel <= 177) { -+ if (bw != 20) { -+ if (bw == 40) { -+ num_start_channel = NUM_START_CH_40M; -+ start_ch = &start_ch_per_40m[0]; -+ channel_offset = CH_OFFSET_40M; -+ } else if (bw == 80) { -+ num_start_channel = NUM_START_CH_80M; -+ start_ch = &start_ch_per_80m[0]; -+ channel_offset = CH_OFFSET_80M; -+ } -+ -+ for (i = 0; i < (num_start_channel - 1); i++) { -+ if (channel < start_ch[i + 1]) { -+ channel = start_ch[i] + channel_offset; -+ break; -+ } -+ } -+ PHYDM_DBG(dm, ODM_COMP_API, "Mod_CH = ((%d))\n", -+ channel); -+ } -+ -+ fc = 5180 + (channel - 36) * 5; -+ -+ } else { -+ PHYDM_DBG(dm, ODM_COMP_API, "CH = ((%d)) Error setting\n", -+ channel); -+ return PHYDM_SET_FAIL; -+ } -+ -+ *fc_in = fc; -+ -+ return PHYDM_SET_SUCCESS; -+} -+ -+u8 phydm_find_intf_distance(void *dm_void, u32 bw, u32 fc, u32 f_interference, -+ u32 *tone_idx_tmp_in) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 bw_up = 0, bw_low = 0; -+ u32 int_distance = 0; -+ u32 tone_idx_tmp = 0; -+ u8 set_result = PHYDM_SET_NO_NEED; -+ -+ bw_up = fc + bw / 2; -+ bw_low = fc - bw / 2; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[f_l, fc, fh] = [ %d, %d, %d ], f_int = ((%d))\n", bw_low, -+ fc, bw_up, f_interference); -+ -+ if (f_interference >= bw_low && f_interference <= bw_up) { -+ int_distance = DIFF_2(fc, f_interference); -+ /*@10*(int_distance /0.3125)*/ -+ tone_idx_tmp = (int_distance << 5); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "int_distance = ((%d MHz)) Mhz, tone_idx_tmp = ((%d.%d))\n", -+ int_distance, tone_idx_tmp / 10, -+ tone_idx_tmp % 10); -+ *tone_idx_tmp_in = tone_idx_tmp; -+ set_result = PHYDM_SET_SUCCESS; -+ } -+ -+ return set_result; -+} -+ -+u8 phydm_csi_mask_setting(void *dm_void, u32 enable, u32 ch, u32 bw, -+ u32 f_intf, u32 sec_ch) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 fc = 2412; -+ u8 direction = FREQ_POSITIVE; -+ u32 tone_idx = 0; -+ u8 set_result = PHYDM_SET_SUCCESS; -+ u8 rpt = 0; -+ -+ if (enable == FUNC_DISABLE) { -+ set_result = PHYDM_SET_SUCCESS; -+ phydm_clean_all_csi_mask(dm); -+ -+ } else { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[Set CSI MASK_] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", -+ ch, bw, f_intf, -+ (((bw == 20) || (ch > 14)) ? "Don't care" : -+ (sec_ch == PHYDM_ABOVE) ? "H" : "L")); -+ -+ /*@calculate fc*/ -+ if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) { -+ set_result = PHYDM_SET_FAIL; -+ } else { -+ /*@calculate interference distance*/ -+ rpt = phydm_find_intf_distance(dm, bw, fc, f_intf, -+ &tone_idx); -+ if (rpt == PHYDM_SET_SUCCESS) { -+ if (f_intf >= fc) -+ direction = FREQ_POSITIVE; -+ else -+ direction = FREQ_NEGATIVE; -+ -+ phydm_set_csi_mask(dm, tone_idx, direction); -+ set_result = PHYDM_SET_SUCCESS; -+ } else { -+ set_result = PHYDM_SET_NO_NEED; -+ } -+ } -+ } -+ -+ if (set_result == PHYDM_SET_SUCCESS) -+ phydm_csi_mask_enable(dm, enable); -+ else -+ phydm_csi_mask_enable(dm, FUNC_DISABLE); -+ -+ return set_result; -+} -+ -+boolean phydm_spur_case_mapping(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 channel = *dm->channel, bw = *dm->band_width; -+ boolean mapping_result = false; -+#if (RTL8814B_SUPPORT == 1) -+ if (channel == 153 && bw == CHANNEL_WIDTH_20) { -+ odm_set_bb_reg(dm, R_0x804, BIT(31), 0); -+ odm_set_bb_reg(dm, R_0xc00, BIT(25) | BIT(24), 0); -+ mapping_result = true; -+ } else if (channel == 151 && bw == CHANNEL_WIDTH_40) { -+ odm_set_bb_reg(dm, R_0x804, BIT(31), 0); -+ odm_set_bb_reg(dm, R_0xc00, BIT(25) | BIT(24), 0); -+ mapping_result = true; -+ } else if (channel == 155 && bw == CHANNEL_WIDTH_80) { -+ odm_set_bb_reg(dm, R_0x804, BIT(31), 0); -+ odm_set_bb_reg(dm, R_0xc00, BIT(25) | BIT(24), 0); -+ mapping_result = true; -+ } else { -+ odm_set_bb_reg(dm, R_0x804, BIT(31), 1); -+ odm_set_bb_reg(dm, R_0xc00, BIT(25) | BIT(24), 1); -+ } -+#endif -+ return mapping_result; -+} -+ -+enum odm_rf_band phydm_ch_to_rf_band(void *dm_void, u8 central_ch) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ enum odm_rf_band rf_band = ODM_RF_BAND_5G_LOW; -+ -+ if (central_ch <= 14) -+ rf_band = ODM_RF_BAND_2G; -+ else if (central_ch >= 36 && central_ch <= 64) -+ rf_band = ODM_RF_BAND_5G_LOW; -+ else if ((central_ch >= 100) && (central_ch <= 144)) -+ rf_band = ODM_RF_BAND_5G_MID; -+ else if (central_ch >= 149) -+ rf_band = ODM_RF_BAND_5G_HIGH; -+ else -+ PHYDM_DBG(dm, ODM_COMP_API, "mapping channel to band fail\n"); -+ -+ return rf_band; -+} -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+u32 phydm_rf_psd_jgr3(void *dm_void, u8 path, u32 tone_idx) -+{ -+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 reg_1b04 = 0, reg_1b08 = 0, reg_1b0c_11_10 = 0; -+ u32 reg_1b14 = 0, reg_1b18 = 0, reg_1b1c = 0; -+ u32 reg_1b28 = 0; -+ u32 reg_1bcc_5_0 = 0; -+ u32 reg_1b2c_27_16 = 0, reg_1b34 = 0, reg_1bd4 = 0; -+ u32 reg_180c = 0, reg_410c = 0, reg_520c = 0, reg_530c = 0; -+ u32 igi = 0; -+ u32 i = 0; -+ u32 psd_val = 0, psd_val_msb = 0, psd_val_lsb = 0, psd_max = 0; -+ u32 psd_status_temp = 0; -+ u16 poll_cnt = 0; -+ -+ /*read and record the ori. value*/ -+ reg_1b04 = odm_get_bb_reg(dm, R_0x1b04, MASKDWORD); -+ reg_1b08 = odm_get_bb_reg(dm, R_0x1b08, MASKDWORD); -+ reg_1b0c_11_10 = odm_get_bb_reg(dm, R_0x1b0c, 0xc00); -+ reg_1b14 = odm_get_bb_reg(dm, R_0x1b14, MASKDWORD); -+ reg_1b18 = odm_get_bb_reg(dm, R_0x1b18, MASKDWORD); -+ reg_1b1c = odm_get_bb_reg(dm, R_0x1b1c, MASKDWORD); -+ reg_1b28 = odm_get_bb_reg(dm, R_0x1b28, MASKDWORD); -+ reg_1bcc_5_0 = odm_get_bb_reg(dm, R_0x1bcc, 0x3f); -+ reg_1b2c_27_16 = odm_get_bb_reg(dm, R_0x1b2c, 0xfff0000); -+ reg_1b34 = odm_get_bb_reg(dm, R_0x1b34, MASKDWORD); -+ reg_1bd4 = odm_get_bb_reg(dm, R_0x1bd4, MASKDWORD); -+ igi = odm_get_bb_reg(dm, R_0x1d70, MASKDWORD); -+ reg_180c = odm_get_bb_reg(dm, R_0x180c, 0x3); -+ reg_410c = odm_get_bb_reg(dm, R_0x410c, 0x3); -+ reg_520c = odm_get_bb_reg(dm, R_0x520c, 0x3); -+ reg_530c = odm_get_bb_reg(dm, R_0x530c, 0x3); -+ -+ /*rf psd reg setting*/ -+ odm_set_bb_reg(dm, R_0x1b00, 0x6, path); /*path is RF_path*/ -+ odm_set_bb_reg(dm, R_0x1b04, MASKDWORD, 0x0); -+ odm_set_bb_reg(dm, R_0x1b08, MASKDWORD, 0x80); -+ odm_set_bb_reg(dm, R_0x1b0c, 0xc00, 0x3); -+ odm_set_bb_reg(dm, R_0x1b14, MASKDWORD, 0x0); -+ odm_set_bb_reg(dm, R_0x1b18, MASKDWORD, 0x1); -+/*#if (DM_ODM_SUPPORT_TYPE == ODM_AP)*/ -+ odm_set_bb_reg(dm, R_0x1b1c, MASKDWORD, 0x82103D21); -+/*#else*/ -+ /*odm_set_bb_reg(dm, R_0x1b1c, MASKDWORD, 0x821A3D21);*/ -+/*#endif*/ -+ odm_set_bb_reg(dm, R_0x1b28, MASKDWORD, 0x0); -+ odm_set_bb_reg(dm, R_0x1bcc, 0x3f, 0x3f); -+ odm_set_bb_reg(dm, R_0x8a0, 0xf, 0x0); /* AGC off */ -+ odm_set_bb_reg(dm, R_0x1d70, MASKDWORD, 0x20202020); -+ -+ for (i = tone_idx - 1; i <= tone_idx + 1; i++) { -+ /*set psd tone_idx for detection*/ -+ odm_set_bb_reg(dm, R_0x1b2c, 0xfff0000, i); -+ /*one shot for RXIQK psd*/ -+ odm_set_bb_reg(dm, R_0x1b34, MASKDWORD, 0x1); -+ odm_set_bb_reg(dm, R_0x1b34, MASKDWORD, 0x0); -+ -+ if (dm->support_ic_type & ODM_RTL8814B) -+ for (poll_cnt = 0; poll_cnt < 20; poll_cnt++) { -+ odm_set_bb_reg(dm, R_0x1bd4, 0x3f0000, 0x2b); -+ psd_status_temp = odm_get_bb_reg(dm, R_0x1bfc, -+ BIT(1)); -+ if (!psd_status_temp) -+ ODM_delay_us(10); -+ else -+ break; -+ } -+ else -+ ODM_delay_us(250); -+ -+ /*read RxIQK power*/ -+ odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001); -+ if (dm->support_ic_type & ODM_RTL8814B) -+ psd_val_msb = odm_get_bb_reg(dm, R_0x1bfc, 0x7ff0000); -+ else if (dm->support_ic_type & ODM_RTL8198F) -+ psd_val_msb = odm_get_bb_reg(dm, R_0x1bfc, 0x1f0000); -+ -+ odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001); -+ psd_val_lsb = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD); -+ if (dm->support_ic_type & ODM_RTL8814B) -+ psd_val = (psd_val_msb << 21) + (psd_val_lsb >> 11); -+ else if (dm->support_ic_type & ODM_RTL8198F) -+ psd_val = (psd_val_msb << 27) + (psd_val_lsb >> 5); -+ -+ if (psd_val > psd_max) -+ psd_max = psd_val; -+ } -+ -+ /*refill the ori. value*/ -+ odm_set_bb_reg(dm, R_0x1b00, 0x6, path); -+ odm_set_bb_reg(dm, R_0x1b04, MASKDWORD, reg_1b04); -+ odm_set_bb_reg(dm, R_0x1b08, MASKDWORD, reg_1b08); -+ odm_set_bb_reg(dm, R_0x1b0c, 0xc00, reg_1b0c_11_10); -+ odm_set_bb_reg(dm, R_0x1b14, MASKDWORD, reg_1b14); -+ odm_set_bb_reg(dm, R_0x1b18, MASKDWORD, reg_1b18); -+ odm_set_bb_reg(dm, R_0x1b1c, MASKDWORD, reg_1b1c); -+ odm_set_bb_reg(dm, R_0x1b28, MASKDWORD, reg_1b28); -+ odm_set_bb_reg(dm, R_0x1bcc, 0x3f, reg_1bcc_5_0); -+ odm_set_bb_reg(dm, R_0x1b2c, 0xfff0000, reg_1b2c_27_16); -+ odm_set_bb_reg(dm, R_0x1b34, MASKDWORD, reg_1b34); -+ odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, reg_1bd4); -+ odm_set_bb_reg(dm, R_0x8a0, 0xf, 0xf); /* AGC on */ -+ odm_set_bb_reg(dm, R_0x1d70, MASKDWORD, igi); -+ PHYDM_DBG(dm, ODM_COMP_API, "psd_max %d\n", psd_max); -+ -+ return psd_max; -+#else -+ return 0; -+#endif -+} -+ -+u8 phydm_find_intf_distance_jgr3(void *dm_void, u32 bw, u32 fc, -+ u32 f_interference, u32 *tone_idx_tmp_in) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 bw_up = 0, bw_low = 0; -+ u32 int_distance = 0; -+ u32 tone_idx_tmp = 0; -+ u8 set_result = PHYDM_SET_NO_NEED; -+ u8 channel = *dm->channel; -+ -+ bw_up = 1000 * (fc + bw / 2); -+ bw_low = 1000 * (fc - bw / 2); -+ fc = 1000 * fc; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[f_l, fc, fh] = [ %d, %d, %d ], f_int = ((%d))\n", bw_low, -+ fc, bw_up, f_interference); -+ -+ if (f_interference >= bw_low && f_interference <= bw_up) { -+ int_distance = DIFF_2(fc, f_interference); -+ /*@10*(int_distance /0.3125)*/ -+ if (channel < 15 && -+ (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8198F))) -+ tone_idx_tmp = int_distance / 312; -+ else -+ tone_idx_tmp = ((int_distance + 156) / 312); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "int_distance = ((%d)) , tone_idx_tmp = ((%d))\n", -+ int_distance, tone_idx_tmp); -+ *tone_idx_tmp_in = tone_idx_tmp; -+ set_result = PHYDM_SET_SUCCESS; -+ } -+ -+ return set_result; -+} -+ -+u8 phydm_csi_mask_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw, -+ u32 f_intf, u32 sec_ch, u8 wgt) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 fc = 2412; -+ u8 direction = FREQ_POSITIVE; -+ u32 tone_idx = 0; -+ u8 set_result = PHYDM_SET_SUCCESS; -+ u8 rpt = 0; -+ -+ if (enable == FUNC_DISABLE) { -+ phydm_csi_mask_enable(dm, FUNC_ENABLE); -+ phydm_clean_all_csi_mask(dm); -+ phydm_csi_mask_enable(dm, FUNC_DISABLE); -+ set_result = PHYDM_SET_SUCCESS; -+ } else { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[Set CSI MASK] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s)), wgt = ((%d))\n", -+ ch, bw, f_intf, -+ (((bw == 20) || (ch > 14)) ? "Don't care" : -+ (sec_ch == PHYDM_ABOVE) ? "H" : "L"), wgt); -+ -+ /*@calculate fc*/ -+ if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) { -+ set_result = PHYDM_SET_FAIL; -+ } else { -+ /*@calculate interference distance*/ -+ rpt = phydm_find_intf_distance_jgr3(dm, bw, fc, f_intf, -+ &tone_idx); -+ if (rpt == PHYDM_SET_SUCCESS) { -+ if (f_intf >= 1000 * fc) -+ direction = FREQ_POSITIVE; -+ else -+ direction = FREQ_NEGATIVE; -+ -+ phydm_csi_mask_enable(dm, FUNC_ENABLE); -+ phydm_set_csi_mask_jgr3(dm, tone_idx, direction, -+ wgt); -+ set_result = PHYDM_SET_SUCCESS; -+ } else { -+ set_result = PHYDM_SET_NO_NEED; -+ } -+ } -+ if (!(set_result == PHYDM_SET_SUCCESS)) -+ phydm_csi_mask_enable(dm, FUNC_DISABLE); -+ } -+ -+ return set_result; -+} -+ -+void phydm_set_csi_mask_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction, -+ u8 wgt) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 multi_tone_idx_tmp = 0; -+ u32 reg_tmp = 0; -+ u32 tone_num = 64; -+ u32 table_addr = 0; -+ u32 addr = 0; -+ u8 rf_bw = 0; -+ u8 value = 0; -+ u8 channel = *dm->channel; -+ -+ rf_bw = odm_read_1byte(dm, R_0x9b0); -+ if (((rf_bw & 0xc) >> 2) == 0x2) -+ tone_num = 128; /* @RF80 : tone(-1) at tone_idx=255 */ -+ else -+ tone_num = 64; /* @RF20/40 : tone(-1) at tone_idx=127 */ -+ -+ if (tone_direction == FREQ_POSITIVE) { -+ if (tone_idx_tmp >= (tone_num - 1)) -+ tone_idx_tmp = (tone_num - 1); -+ } else { -+ if (tone_idx_tmp >= tone_num) -+ tone_idx_tmp = tone_num; -+ -+ tone_idx_tmp = (tone_num << 1) - tone_idx_tmp; -+ } -+ table_addr = tone_idx_tmp >> 1; -+ -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Pre Mask tone idx[%d]: Reg0x1d94 = ((0x%x))\n", -+ tone_idx_tmp, reg_tmp); -+ odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x3); -+ odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x1); -+ -+ if (channel < 15 && -+ (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8198F))) { -+ if (tone_idx_tmp % 2 == 1) { -+ if (tone_direction == FREQ_POSITIVE) { -+ /*===Tone 1===*/ -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, -+ (table_addr & 0xff)); -+ value = (BIT(3) | (wgt & 0x7)) << 4; -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask tone 1 idx[%d]: Reg0x1d94 = ((0x%x))\n", -+ tone_idx_tmp, reg_tmp); -+ /*===Tone 2===*/ -+ value = 0; -+ multi_tone_idx_tmp = tone_idx_tmp + 1; -+ table_addr = multi_tone_idx_tmp >> 1; -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, -+ (table_addr & 0xff)); -+ value = (BIT(3) | (wgt & 0x7)); -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask tone 2 idx[%d]: Reg0x1d94 = ((0x%x))\n", -+ tone_idx_tmp, reg_tmp); -+ } else { -+ /*===Tone 1 & 2===*/ -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, -+ (table_addr & 0xff)); -+ value = ((BIT(3) | (wgt & 0x7)) << 4) | -+ (BIT(3) | (wgt & 0x7)); -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask tone 1 & 2 idx[%d]: Reg0x1d94 = ((0x%x))\n", -+ tone_idx_tmp, reg_tmp); -+ } -+ } else { -+ if (tone_direction == FREQ_POSITIVE) { -+ /*===Tone 1 & 2===*/ -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, -+ (table_addr & 0xff)); -+ value = ((BIT(3) | (wgt & 0x7)) << 4) | -+ (BIT(3) | (wgt & 0x7)); -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask tone 1 & 2 idx[%d]: Reg0x1d94 = ((0x%x))\n", -+ tone_idx_tmp, reg_tmp); -+ } else { -+ /*===Tone 1===*/ -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, -+ (table_addr & 0xff)); -+ value = (BIT(3) | (wgt & 0x7)); -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask tone 1 idx[%d]: Reg0x1d94 = ((0x%x))\n", -+ tone_idx_tmp, reg_tmp); -+ -+ /*===Tone 2===*/ -+ value = 0; -+ multi_tone_idx_tmp = tone_idx_tmp - 1; -+ table_addr = multi_tone_idx_tmp >> 1; -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, -+ (table_addr & 0xff)); -+ value = (BIT(3) | (wgt & 0x7)) << 4; -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask tone 2 idx[%d]: Reg0x1d94 = ((0x%x))\n", -+ tone_idx_tmp, reg_tmp); -+ } -+ } -+ } else { -+ if ((dm->support_ic_type & (ODM_RTL8814B)) && -+ phydm_spur_case_mapping(dm)) { -+ if (!(tone_idx_tmp % 2)) { -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, -+ (table_addr & 0xff)); -+ value = ((BIT(3) | (((wgt + 4) <= 7 ? (wgt + -+ 4) : 7) & 0x7)) << 4) | (BIT(3) | -+ (wgt & 0x7)); -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask tone idx[%d]: Reg0x1d94 = ((0x%x))\n", -+ tone_idx_tmp, reg_tmp); -+ if (tone_idx_tmp == 0) -+ table_addr = tone_num - 1; -+ else -+ table_addr = table_addr - 1; -+ if (tone_idx_tmp != tone_num) { -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, -+ (table_addr & 0xff)); -+ value = (BIT(3) | (((wgt + 4) <= 7 ? -+ (wgt + 4) : 7) & 0x7)) << 4; -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, -+ value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask Reg0x1d94 = ((0x%x))\n", -+ reg_tmp); -+ } -+ } else { -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, -+ (table_addr & 0xff)); -+ value = ((BIT(3) | (wgt & 0x7)) << 4) | -+ (BIT(3) | (((wgt + 4) <= 7 ? (wgt + -+ 4) : 7) & 0x7)); -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask tone idx[%d]: Reg0x1d94 = ((0x%x))\n", -+ tone_idx_tmp, reg_tmp); -+ if (tone_idx_tmp == (tone_num << 1) - 1) -+ table_addr = 0; -+ else -+ table_addr = table_addr + 1; -+ if (tone_idx_tmp != tone_num - 1) { -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, -+ (table_addr & 0xff)); -+ value = (BIT(3) | (((wgt + 4) <= 7 ? -+ (wgt + 4) : 7) & 0x7)); -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, -+ value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask Reg0x1d94 = ((0x%x))\n", -+ reg_tmp); -+ } -+ } -+ } else { -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, (table_addr & -+ 0xff)); -+ if (tone_idx_tmp % 2) -+ value = (BIT(3) | (wgt & 0x7)) << 4; -+ else -+ value = BIT(3) | (wgt & 0x7); -+ -+ odm_set_bb_reg(dm, R_0x1d94, 0xff, value); -+ reg_tmp = odm_read_4byte(dm, R_0x1d94); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "New Mask tone idx[%d]: Reg0x1d94 = ((0x%x))\n", -+ tone_idx_tmp, reg_tmp); -+ } -+ } -+ odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x0); -+} -+ -+void phydm_nbi_reset_jgr3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_set_bb_reg(dm, R_0x818, BIT(3), 1); -+ odm_set_bb_reg(dm, R_0x1d3c, 0x78000000, 0); -+ odm_set_bb_reg(dm, R_0x818, BIT(3), 0); -+ odm_set_bb_reg(dm, R_0x818, BIT(11), 0); -+ #if RTL8814B_SUPPORT -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ odm_set_bb_reg(dm, R_0x1944, 0x300, 0x3); -+ odm_set_bb_reg(dm, R_0x4044, 0x300, 0x3); -+ odm_set_bb_reg(dm, R_0x5044, 0x300, 0x3); -+ odm_set_bb_reg(dm, R_0x5144, 0x300, 0x3); -+ odm_set_bb_reg(dm, R_0x810, 0xf, 0x0); -+ odm_set_bb_reg(dm, R_0x810, 0xf0000, 0x0); -+ odm_set_bb_reg(dm, R_0xc24, MASKDWORD, 0x406000ff); -+ } -+ #endif -+} -+ -+u8 phydm_nbi_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf, -+ u32 sec_ch, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 fc = 2412; -+ u8 direction = FREQ_POSITIVE; -+ u32 tone_idx = 0; -+ u8 set_result = PHYDM_SET_SUCCESS; -+ u8 rpt = 0; -+ -+ if (enable == FUNC_DISABLE) { -+ phydm_nbi_reset_jgr3(dm); -+ set_result = PHYDM_SET_SUCCESS; -+ } else { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[Set NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", -+ ch, bw, f_intf, -+ (((sec_ch == PHYDM_DONT_CARE) || (bw == 20) || -+ (ch > 14)) ? "Don't care" : -+ (sec_ch == PHYDM_ABOVE) ? "H" : "L")); -+ -+ /*@calculate fc*/ -+ if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) { -+ set_result = PHYDM_SET_FAIL; -+ } else { -+ /*@calculate interference distance*/ -+ rpt = phydm_find_intf_distance_jgr3(dm, bw, fc, f_intf, -+ &tone_idx); -+ if (rpt == PHYDM_SET_SUCCESS) { -+ if (f_intf >= 1000 * fc) -+ direction = FREQ_POSITIVE; -+ else -+ direction = FREQ_NEGATIVE; -+ -+ phydm_set_nbi_reg_jgr3(dm, tone_idx, direction, -+ path); -+ set_result = PHYDM_SET_SUCCESS; -+ } else { -+ set_result = PHYDM_SET_NO_NEED; -+ } -+ } -+ } -+ -+ if (set_result == PHYDM_SET_SUCCESS) -+ phydm_nbi_enable_jgr3(dm, enable, path); -+ else -+ phydm_nbi_enable_jgr3(dm, FUNC_DISABLE, path); -+ -+ if (dm->support_ic_type & ODM_RTL8814B) -+ odm_set_bb_reg(dm, R_0x1d3c, BIT(19), 0); -+ -+ return set_result; -+} -+ -+void phydm_set_nbi_reg_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction, -+ u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 reg_tmp_value = 0; -+ u32 tone_num = 64; -+ u32 addr = 0; -+ u8 rf_bw = 0; -+ -+ rf_bw = odm_read_1byte(dm, R_0x9b0); -+ if (((rf_bw & 0xc) >> 2) == 0x2) -+ tone_num = 128; /* RF80 : tone-1 at tone_idx=255 */ -+ else -+ tone_num = 64; /* RF20/40 : tone-1 at tone_idx=127 */ -+ -+ if (tone_direction == FREQ_POSITIVE) { -+ if (tone_idx_tmp >= (tone_num - 1)) -+ tone_idx_tmp = (tone_num - 1); -+ } else { -+ if (tone_idx_tmp >= tone_num) -+ tone_idx_tmp = tone_num; -+ -+ tone_idx_tmp = (tone_num << 1) - tone_idx_tmp; -+ } -+ /*Mark the tone idx for Packet detection*/ -+ #if RTL8814B_SUPPORT -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ odm_set_bb_reg(dm, R_0xc24, 0xff, 0xff); -+ if ((*dm->channel == 5) && -+ (*dm->band_width == CHANNEL_WIDTH_40)) -+ odm_set_bb_reg(dm, R_0xc24, 0xff00, 0x1a); -+ else -+ odm_set_bb_reg(dm, R_0xc24, 0xff00, tone_idx_tmp); -+ } -+ #endif -+ switch (path) { -+ case RF_PATH_A: -+ odm_set_bb_reg(dm, R_0x1944, 0x001FF000, tone_idx_tmp); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set tone idx[%d]:PATH-A = ((0x%x))\n", -+ tone_idx_tmp, tone_idx_tmp); -+ break; -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case RF_PATH_B: -+ odm_set_bb_reg(dm, R_0x4044, 0x001FF000, tone_idx_tmp); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set tone idx[%d]:PATH-B = ((0x%x))\n", -+ tone_idx_tmp, tone_idx_tmp); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case RF_PATH_C: -+ odm_set_bb_reg(dm, R_0x5044, 0x001FF000, tone_idx_tmp); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set tone idx[%d]:PATH-C = ((0x%x))\n", -+ tone_idx_tmp, tone_idx_tmp); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case RF_PATH_D: -+ odm_set_bb_reg(dm, R_0x5144, 0x001FF000, tone_idx_tmp); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "Set tone idx[%d]:PATH-D = ((0x%x))\n", -+ tone_idx_tmp, tone_idx_tmp); -+ break; -+ #endif -+ default: -+ break; -+ } -+} -+ -+void phydm_nbi_enable_jgr3(void *dm_void, u32 enable, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean val = false; -+ -+ val = (enable == FUNC_ENABLE) ? true : false; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "Enable NBI=%d\n", val); -+ -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ odm_set_bb_reg(dm, R_0x1d3c, BIT(19), val); -+ odm_set_bb_reg(dm, R_0x818, BIT(3), val); -+ } else if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F)) { -+ odm_set_bb_reg(dm, R_0x818, BIT(3), !val); -+ } -+ odm_set_bb_reg(dm, R_0x818, BIT(11), val); -+ odm_set_bb_reg(dm, R_0x1d3c, 0x78000000, 0xf); -+ -+ if (enable == FUNC_ENABLE) { -+ switch (path) { -+ case RF_PATH_A: -+ odm_set_bb_reg(dm, R_0x1940, BIT(31), val); -+ break; -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case RF_PATH_B: -+ odm_set_bb_reg(dm, R_0x4040, BIT(31), val); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case RF_PATH_C: -+ odm_set_bb_reg(dm, R_0x5040, BIT(31), val); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case RF_PATH_D: -+ odm_set_bb_reg(dm, R_0x5140, BIT(31), val); -+ break; -+ #endif -+ default: -+ break; -+ } -+ } else { -+ odm_set_bb_reg(dm, R_0x1940, BIT(31), val); -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ odm_set_bb_reg(dm, R_0x4040, BIT(31), val); -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ odm_set_bb_reg(dm, R_0x5040, BIT(31), val); -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ odm_set_bb_reg(dm, R_0x5140, BIT(31), val); -+ #endif -+ #if RTL8812F_SUPPORT -+ if (dm->support_ic_type & ODM_RTL8812F) { -+ odm_set_bb_reg(dm, R_0x818, BIT(3), val); -+ odm_set_bb_reg(dm, R_0x1d3c, 0x78000000, 0x0); -+ } -+ #endif -+ } -+} -+ -+u8 phydm_phystat_rpt_jgr3(void *dm_void, enum phystat_rpt info, -+ enum rf_path ant_path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ s8 evm_org, cfo_org, rxsnr_org; -+ u8 i, return_info = 0, tmp_lsb = 0, tmp_msb = 0, tmp_info = 0; -+ -+ /* Update the status for each pkt */ -+ odm_set_bb_reg(dm, R_0x8c4, 0xfff000, 0x448); -+ odm_set_bb_reg(dm, R_0x8c0, MASKLWORD, 0x4001); -+ /* PHY status Page1 */ -+ odm_set_bb_reg(dm, R_0x8c0, 0x3C00000, 0x1); -+ /*choose debug port for phystatus */ -+ odm_set_bb_reg(dm, R_0x1c3c, 0xFFF00, 0x380); -+ -+ if (info == PHY_PWDB) { -+ /* Choose the report of the diff path */ -+ if (ant_path == RF_PATH_A) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x1); -+ else if (ant_path == RF_PATH_B) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x2); -+ else if (ant_path == RF_PATH_C) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x3); -+ else if (ant_path == RF_PATH_D) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x4); -+ } else if (info == PHY_EVM) { -+ /* Choose the report of the diff path */ -+ if (ant_path == RF_PATH_A) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x10); -+ else if (ant_path == RF_PATH_B) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x11); -+ else if (ant_path == RF_PATH_C) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x12); -+ else if (ant_path == RF_PATH_D) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x13); -+ return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff); -+ } else if (info == PHY_CFO) { -+ /* Choose the report of the diff path */ -+ if (ant_path == RF_PATH_A) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x14); -+ else if (ant_path == RF_PATH_B) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x15); -+ else if (ant_path == RF_PATH_C) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x16); -+ else if (ant_path == RF_PATH_D) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x17); -+ return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff); -+ } else if (info == PHY_RXSNR) { -+ /* Choose the report of the diff path */ -+ if (ant_path == RF_PATH_A) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x18); -+ else if (ant_path == RF_PATH_B) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x19); -+ else if (ant_path == RF_PATH_C) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x1a); -+ else if (ant_path == RF_PATH_D) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x1b); -+ return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff); -+ } else if (info == PHY_LGAIN) { -+ /* choose page */ -+ odm_set_bb_reg(dm, R_0x8c0, 0x3c00000, 0x2); -+ /* Choose the report of the diff path */ -+ if (ant_path == RF_PATH_A) { -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xd); -+ tmp_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0x3f); -+ return_info = tmp_info; -+ } else if (ant_path == RF_PATH_B) { -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xd); -+ tmp_lsb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xc0); -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xe); -+ tmp_msb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xf); -+ tmp_info |= (tmp_msb << 2) | tmp_lsb; -+ return_info = tmp_info; -+ } else if (ant_path == RF_PATH_C) { -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xe); -+ tmp_lsb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xf0); -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0xf); -+ tmp_msb = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0x3); -+ tmp_info |= (tmp_msb << 4) | tmp_lsb; -+ return_info = tmp_info; -+ } else if (ant_path == RF_PATH_D) { -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x10); -+ tmp_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0x3f); -+ return_info = tmp_info; -+ } -+ } else if (info == PHY_HT_AAGC_GAIN) { -+ /* choose page */ -+ odm_set_bb_reg(dm, R_0x8c0, 0x3c00000, 0x2); -+ /* Choose the report of the diff path */ -+ if (ant_path == RF_PATH_A) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x12); -+ else if (ant_path == RF_PATH_B) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x13); -+ else if (ant_path == RF_PATH_C) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x14); -+ else if (ant_path == RF_PATH_D) -+ odm_set_bb_reg(dm, R_0x8c4, 0x3ff, 0x15); -+ return_info = (u8)odm_get_bb_reg(dm, R_0x2dbc, 0xff); -+ } -+ return return_info; -+} -+ -+void phydm_ex_hal8814b_wifi_only_hw_config(void *dm_void) -+{ -+ /*BB control*/ -+ /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);*/ -+ /*SW control*/ -+ /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0xff, 0x77);*/ -+ /*antenna mux switch */ -+ /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x974, 0x300, 0x3);*/ -+ -+ /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1990, 0x300, 0x0);*/ -+ -+ /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x80000, 0x0);*/ -+ /*switch to WL side controller and gnt_wl gnt_bt debug signal */ -+ /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0xff000000, 0x0e);*/ -+ /*gnt_wl=1 , gnt_bt=0*/ -+ /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, -+ * 0x7700); -+ */ -+ /*halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, -+ * 0xc00f0038); -+ */ -+} -+ -+void phydm_user_position_for_sniffer(void *dm_void, u8 user_position) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /* user position valid */ -+ odm_set_bb_reg(dm, R_0xa68, BIT(17), 1); -+ /* Select user seat from pmac */ -+ odm_set_bb_reg(dm, R_0xa68, BIT(16), 1); -+ /*user seat*/ -+ odm_set_bb_reg(dm, R_0xa68, (BIT(19) | BIT(18)), user_position); -+} -+ -+boolean -+phydm_bb_ctrl_txagc_ofst_jgr3(void *dm_void, s8 pw_offset, /*@(unit: dB)*/ -+ u8 add_half_db /*@(+0.5 dB)*/) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ s8 pw_idx = pw_offset * 4; /*@ 7Bit, 0.25dB unit*/ -+ -+ if (pw_offset < -16 || pw_offset > 15) { -+ pr_debug("[Warning][%s]Ofst error=%d", __func__, pw_offset); -+ return false; -+ } -+ -+ if (add_half_db) -+ pw_idx += 2; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "Pw_ofst=0x%x\n", pw_idx); -+ -+ odm_set_bb_reg(dm, R_0x18a0, 0x3f, pw_idx); -+ -+ if (dm->num_rf_path >= 2) -+ odm_set_bb_reg(dm, R_0x41a0, 0x3f, pw_idx); -+ -+ if (dm->num_rf_path >= 3) -+ odm_set_bb_reg(dm, R_0x52a0, 0x3f, pw_idx); -+ -+ if (dm->num_rf_path >= 4) -+ odm_set_bb_reg(dm, R_0x53a0, 0x3f, pw_idx); -+ -+ return true; -+} -+ -+#endif -+u8 phydm_nbi_setting(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf, -+ u32 sec_ch) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 fc = 2412; -+ u8 direction = FREQ_POSITIVE; -+ u32 tone_idx = 0; -+ u8 set_result = PHYDM_SET_SUCCESS; -+ u8 rpt = 0; -+ -+ if (enable == FUNC_DISABLE) { -+ set_result = PHYDM_SET_SUCCESS; -+ } else { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "[Set NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", -+ ch, bw, f_intf, -+ (((sec_ch == PHYDM_DONT_CARE) || (bw == 20) || -+ (ch > 14)) ? "Don't care" : -+ (sec_ch == PHYDM_ABOVE) ? "H" : "L")); -+ -+ /*@calculate fc*/ -+ if (phydm_find_fc(dm, ch, bw, sec_ch, &fc) == PHYDM_SET_FAIL) { -+ set_result = PHYDM_SET_FAIL; -+ } else { -+ /*@calculate interference distance*/ -+ rpt = phydm_find_intf_distance(dm, bw, fc, f_intf, -+ &tone_idx); -+ if (rpt == PHYDM_SET_SUCCESS) { -+ if (f_intf >= fc) -+ direction = FREQ_POSITIVE; -+ else -+ direction = FREQ_NEGATIVE; -+ -+ phydm_set_nbi_reg(dm, tone_idx, bw); -+ -+ set_result = PHYDM_SET_SUCCESS; -+ } else { -+ set_result = PHYDM_SET_NO_NEED; -+ } -+ } -+ } -+ -+ if (set_result == PHYDM_SET_SUCCESS) -+ phydm_nbi_enable(dm, enable); -+ else -+ phydm_nbi_enable(dm, FUNC_DISABLE); -+ -+ return set_result; -+} -+ -+void phydm_nbi_debug(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 val[10] = {0}; -+ char help[] = "-h"; -+ u8 i = 0, input_idx = 0, idx_lmt = 0; -+ u32 enable = 0; /*@function enable*/ -+ u32 ch = 0; -+ u32 bw = 0; -+ u32 f_int = 0; /*@interference frequency*/ -+ u32 sec_ch = 0; /*secondary channel*/ -+ u8 rpt = 0; -+ u8 path = 0; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ idx_lmt = 6; -+ else -+ idx_lmt = 5; -+ for (i = 0; i < idx_lmt; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]); -+ input_idx++; -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ enable = val[0]; -+ ch = val[1]; -+ bw = val[2]; -+ f_int = val[3]; -+ sec_ch = val[4]; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ path = (u8)val[5]; -+ #endif -+ -+ if ((strcmp(input[1], help) == 0)) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(khz)} {Scnd_CH(L=1, H=2)} {Path:A~D(0~3)}\n"); -+ else -+ #endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(khz)} {Scnd_CH(L=1, H=2)}\n"); -+ *_used = used; -+ *_out_len = out_len; -+ return; -+ } else if (val[0] == FUNC_ENABLE) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Enable NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", -+ ch, bw, f_int, -+ ((sec_ch == PHYDM_DONT_CARE) || -+ (bw == 20) || (ch > 14)) ? "Don't care" : -+ ((sec_ch == PHYDM_ABOVE) ? "H" : "L")); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ rpt = phydm_nbi_setting_jgr3(dm, enable, ch, bw, f_int, -+ sec_ch, path); -+ else -+ #endif -+ rpt = phydm_nbi_setting(dm, enable, ch, bw, f_int, -+ sec_ch); -+ } else if (val[0] == FUNC_DISABLE) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Disable NBI]\n"); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ rpt = phydm_nbi_setting_jgr3(dm, enable, ch, bw, f_int, -+ sec_ch, path); -+ else -+ #endif -+ rpt = phydm_nbi_setting(dm, enable, ch, bw, f_int, -+ sec_ch); -+ } else { -+ rpt = PHYDM_SET_FAIL; -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[NBI set result: %s]\n", -+ (rpt == PHYDM_SET_SUCCESS) ? "Success" : -+ ((rpt == PHYDM_SET_NO_NEED) ? "No need" : "Error")); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_csi_debug(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 val[10] = {0}; -+ char help[] = "-h"; -+ u8 i = 0, input_idx = 0, idx_lmt = 0; -+ u32 enable = 0; /*@function enable*/ -+ u32 ch = 0; -+ u32 bw = 0; -+ u32 f_int = 0; /*@interference frequency*/ -+ u32 sec_ch = 0; /*secondary channel*/ -+ u8 rpt = 0; -+ u8 wgt = 0; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ idx_lmt = 6; -+ else -+ idx_lmt = 5; -+ -+ for (i = 0; i < idx_lmt; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]); -+ input_idx++; -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ enable = val[0]; -+ ch = val[1]; -+ bw = val[2]; -+ f_int = val[3]; -+ sec_ch = val[4]; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ wgt = (u8)val[5]; -+ #endif -+ -+ if ((strcmp(input[1], help) == 0)) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(KHz)} {Scnd_CH(L=1, H=2)}\n{wgt:(7:3/4),(6~1: 1/2 ~ 1/64),(0:0)}\n"); -+ else -+ #endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{en:1 Dis:2} {ch} {BW:20/40/80} {f_intf(Mhz)} {Scnd_CH(L=1, H=2)}\n"); -+ -+ *_used = used; -+ *_out_len = out_len; -+ return; -+ -+ } else if (val[0] == FUNC_ENABLE) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Enable CSI MASK] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n", -+ ch, bw, f_int, -+ (ch > 14) ? "Don't care" : -+ (((sec_ch == PHYDM_DONT_CARE) || -+ (bw == 20) || (ch > 14)) ? "H" : "L")); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ rpt = phydm_csi_mask_setting_jgr3(dm, enable, ch, bw, -+ f_int, sec_ch, wgt); -+ else -+ #endif -+ rpt = phydm_csi_mask_setting(dm, enable, ch, bw, f_int, -+ sec_ch); -+ } else if (val[0] == FUNC_DISABLE) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Disable CSI MASK]\n"); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ rpt = phydm_csi_mask_setting_jgr3(dm, enable, ch, bw, -+ f_int, sec_ch, wgt); -+ else -+ #endif -+ rpt = phydm_csi_mask_setting(dm, enable, ch, bw, f_int, -+ sec_ch); -+ } else { -+ rpt = PHYDM_SET_FAIL; -+ } -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[CSI MASK set result: %s]\n", -+ (rpt == PHYDM_SET_SUCCESS) ? "Success" : -+ ((rpt == PHYDM_SET_NO_NEED) ? "No need" : "Error")); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_stop_ck320(void *dm_void, u8 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 val = enable ? 1 : 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ odm_set_bb_reg(dm, R_0x8b4, BIT(6), val); -+ } else { -+ if (dm->support_ic_type & ODM_IC_N_2SS) /*N-2SS*/ -+ odm_set_bb_reg(dm, R_0x87c, BIT(29), val); -+ else /*N-1SS*/ -+ odm_set_bb_reg(dm, R_0x87c, BIT(31), val); -+ } -+} -+ -+boolean -+phydm_bb_ctrl_txagc_ofst(void *dm_void, s8 pw_offset, /*@(unit: dB)*/ -+ u8 add_half_db /*@(+0.5 dB)*/) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ s8 pw_idx; -+ u8 offset_bit_num = 0; -+ -+ if (dm->support_ic_type & N_IC_TX_OFFEST_5_BIT) { -+ /*@ 5Bit, 0.5dB unit*/ -+ if (pw_offset < -8 || pw_offset > 7) { -+ pr_debug("[Warning][%s] Ofst=%d", __func__, pw_offset); -+ return false; -+ } -+ offset_bit_num = 5; -+ } else { -+ if (pw_offset < -16 || pw_offset > 15) { -+ pr_debug("[Warning][%s] Ofst=%d", __func__, pw_offset); -+ return false; -+ } -+ if (dm->support_ic_type & N_IC_TX_OFFEST_7_BIT) { -+ /*@ 7Bit, 0.25dB unit*/ -+ offset_bit_num = 7; -+ } else { -+ /*@ 6Bit, 0.5dB unit*/ -+ offset_bit_num = 6; -+ } -+ } -+ -+ pw_idx = (offset_bit_num == 7) ? pw_offset * 4 : pw_offset * 2; -+ -+ if (add_half_db) -+ pw_idx = (offset_bit_num == 7) ? pw_idx + 2 : pw_idx + 1; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "Pw_ofst=0x%x\n", pw_idx); -+ -+ switch (dm->ic_ip_series) { -+ case PHYDM_IC_AC: -+ odm_set_bb_reg(dm, R_0x8b4, 0x3f, pw_idx); /*6Bit*/ -+ break; -+ case PHYDM_IC_N: -+ if (offset_bit_num == 5) { -+ odm_set_bb_reg(dm, R_0x80c, 0x1f00, pw_idx); -+ if (dm->num_rf_path >= 2) -+ odm_set_bb_reg(dm, R_0x80c, 0x3e000, pw_idx); -+ } else if (offset_bit_num == 6) { -+ odm_set_bb_reg(dm, R_0x80c, 0x3f00, pw_idx); -+ if (dm->num_rf_path >= 2) -+ odm_set_bb_reg(dm, R_0x80c, 0xfc000, pw_idx); -+ } else { /*7Bit*/ -+ odm_set_bb_reg(dm, R_0x80c, 0x7f00, pw_idx); -+ if (dm->num_rf_path >= 2) -+ odm_set_bb_reg(dm, R_0x80c, 0x3f8000, pw_idx); -+ } -+ break; -+ } -+ return true; -+} -+ -+boolean -+phydm_set_bb_txagc_offset(void *dm_void, s8 pw_offset, /*@(unit: dB)*/ -+ u8 add_half_db /*@(+0.5 dB)*/) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean rpt = false; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "power_offset=%d, add_half_db =%d\n", -+ pw_offset, add_half_db); -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ rpt = phydm_bb_ctrl_txagc_ofst_jgr3(dm, pw_offset, add_half_db); -+ } else -+#endif -+ { -+ rpt = phydm_bb_ctrl_txagc_ofst(dm, pw_offset, add_half_db); -+ } -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "TX AGC Offset set_success=%d", rpt); -+ -+ return rpt; -+} -+ -+#ifdef PHYDM_COMMON_API_SUPPORT -+void phydm_reset_txagc(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 r_txagc_cck[4] = {R_0x18a0, R_0x41a0, R_0x52a0, R_0x53a0}; -+ u32 r_txagc_ofdm[4] = {R_0x18e8, R_0x41e8, R_0x52e8, R_0x53e8}; -+ u32 r_txagc_diff = R_0x3a00; -+ u8 i = 0; -+ -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) { -+ PHYDM_DBG(dm, ODM_COMP_API, "Only for JGR3 ICs!\n"); -+ return; -+ } -+ -+ for (i = RF_PATH_A; i < dm->num_rf_path; i++) { -+ odm_set_bb_reg(dm, r_txagc_cck[i], 0x7f0000, 0x0); -+ odm_set_bb_reg(dm, r_txagc_ofdm[i], 0x1fc00, 0x0); -+ } -+ -+ for (i = 0; i <= ODM_RATEVHTSS4MCS6; i = i + 4) -+ odm_set_bb_reg(dm, r_txagc_diff + i, MASKDWORD, 0x0); -+} -+boolean -+phydm_api_shift_txagc(void *dm_void, u32 pwr_offset, enum rf_path path, -+ boolean is_positive) { -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean ret = false; -+ u32 txagc_cck = 0; -+ u32 txagc_ofdm = 0; -+ u32 r_txagc_ofdm[4] = {R_0x18e8, R_0x41e8, R_0x52e8, R_0x53e8}; -+ u32 r_txagc_cck[4] = {R_0x18a0, R_0x41a0, R_0x52a0, R_0x53a0}; -+ -+ #if (RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8197G_SUPPORT) -+ if (dm->support_ic_type & -+ (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) { -+ if (path > RF_PATH_B) { -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, "Unsupported path (%d)\n", -+ path); -+ return false; -+ } -+ txagc_cck = (u8)odm_get_bb_reg(dm, r_txagc_cck[path], -+ 0x7F0000); -+ txagc_ofdm = (u8)odm_get_bb_reg(dm, r_txagc_ofdm[path], -+ 0x1FC00); -+ if (is_positive) { -+ if (((txagc_cck + pwr_offset) > 127) || -+ ((txagc_ofdm + pwr_offset) > 127)) -+ return false; -+ -+ txagc_cck += pwr_offset; -+ txagc_ofdm += pwr_offset; -+ } else { -+ if (pwr_offset > txagc_cck || pwr_offset > txagc_ofdm) -+ return false; -+ -+ txagc_cck -= pwr_offset; -+ txagc_ofdm -= pwr_offset; -+ } -+ #if (RTL8822C_SUPPORT) -+ ret = config_phydm_write_txagc_ref_8822c(dm, (u8)txagc_cck, -+ path, PDM_CCK); -+ ret &= config_phydm_write_txagc_ref_8822c(dm, (u8)txagc_ofdm, -+ path, PDM_OFDM); -+ #endif -+ #if (RTL8812F_SUPPORT) -+ ret = config_phydm_write_txagc_ref_8812f(dm, (u8)txagc_cck, -+ path, PDM_CCK); -+ ret &= config_phydm_write_txagc_ref_8812f(dm, (u8)txagc_ofdm, -+ path, PDM_OFDM); -+ #endif -+ #if (RTL8197G_SUPPORT) -+ ret = config_phydm_write_txagc_ref_8197g(dm, (u8)txagc_cck, -+ path, PDM_CCK); -+ ret &= config_phydm_write_txagc_ref_8197g(dm, (u8)txagc_ofdm, -+ path, PDM_OFDM); -+ #endif -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, -+ "%s: path-%d txagc_cck_ref=%x txagc_ofdm_ref=0x%x\n", -+ __func__, path, txagc_cck, txagc_ofdm); -+ } -+ #endif -+ -+ #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) { -+ if (path > RF_PATH_D) { -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, "Unsupported path (%d)\n", -+ path); -+ return false; -+ } -+ txagc_cck = (u8)odm_get_bb_reg(dm, r_txagc_cck[path], -+ 0x7F0000); -+ txagc_ofdm = (u8)odm_get_bb_reg(dm, r_txagc_ofdm[path], -+ 0x1FC00); -+ if (is_positive) { -+ if (((txagc_cck + pwr_offset) > 127) || -+ ((txagc_ofdm + pwr_offset) > 127)) -+ return false; -+ -+ txagc_cck += pwr_offset; -+ txagc_ofdm += pwr_offset; -+ } else { -+ if (pwr_offset > txagc_cck || pwr_offset > txagc_ofdm) -+ return false; -+ -+ txagc_cck -= pwr_offset; -+ txagc_ofdm -= pwr_offset; -+ } -+ #if (RTL8198F_SUPPORT) -+ ret = config_phydm_write_txagc_ref_8198f(dm, (u8)txagc_cck, -+ path, PDM_CCK); -+ ret &= config_phydm_write_txagc_ref_8198f(dm, (u8)txagc_ofdm, -+ path, PDM_OFDM); -+ #endif -+ #if (RTL8814B_SUPPORT) -+ ret = config_phydm_write_txagc_ref_8814b(dm, (u8)txagc_cck, -+ path, PDM_CCK); -+ ret &= config_phydm_write_txagc_ref_8814b(dm, (u8)txagc_ofdm, -+ path, PDM_OFDM); -+ #endif -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, -+ "%s: path-%d txagc_cck_ref=%x txagc_ofdm_ref=0x%x\n", -+ __func__, path, txagc_cck, txagc_ofdm); -+ } -+ #endif -+ -+ #if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8723F)) { -+ if (path > RF_PATH_A) { -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, "Unsupported path (%d)\n", -+ path); -+ return false; -+ } -+ txagc_cck = (u8)odm_get_bb_reg(dm, r_txagc_cck[path], -+ 0x7F0000); -+ txagc_ofdm = (u8)odm_get_bb_reg(dm, r_txagc_ofdm[path], -+ 0x1FC00); -+ if (is_positive) { -+ if (((txagc_cck + pwr_offset) > 127) || -+ ((txagc_ofdm + pwr_offset) > 127)) -+ return false; -+ -+ txagc_cck += pwr_offset; -+ txagc_ofdm += pwr_offset; -+ } else { -+ if (pwr_offset > txagc_cck || pwr_offset > txagc_ofdm) -+ return false; -+ -+ txagc_cck -= pwr_offset; -+ txagc_ofdm -= pwr_offset; -+ } -+ #if (RTL8723F_SUPPORT) -+ ret = config_phydm_write_txagc_ref_8723f(dm, (u8)txagc_cck, -+ path, PDM_CCK); -+ ret &= config_phydm_write_txagc_ref_8723f(dm, (u8)txagc_ofdm, -+ path, PDM_OFDM); -+ #endif -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, -+ "%s: path-%d txagc_cck_ref=%x txagc_ofdm_ref=0x%x\n", -+ __func__, path, txagc_cck, txagc_ofdm); -+ } -+ #endif -+ -+ return ret; -+} -+ -+boolean -+phydm_api_set_txagc(void *dm_void, u32 pwr_idx, enum rf_path path, -+ u8 rate, boolean is_single_rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean ret = false; -+ #if (RTL8198F_SUPPORT || RTL8822C_SUPPORT || RTL8812F_SUPPORT ||\ -+ RTL8814B_SUPPORT || RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+ u8 base = 0; -+ u8 txagc_tmp = 0; -+ s8 pw_by_rate_tmp = 0; -+ s8 pw_by_rate_new = 0; -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ u8 i = 0; -+ #endif -+ -+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8195B_SUPPORT) -+ if (dm->support_ic_type & -+ (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) { -+ if (is_single_rate) { -+ #if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8822B) -+ ret = phydm_write_txagc_1byte_8822b(dm, pwr_idx, -+ path, rate); -+ #endif -+ -+ #if (RTL8821C_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8821C) -+ ret = phydm_write_txagc_1byte_8821c(dm, pwr_idx, -+ path, rate); -+ #endif -+ -+ #if (RTL8195B_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8195B) -+ ret = phydm_write_txagc_1byte_8195b(dm, pwr_idx, -+ path, rate); -+ #endif -+ -+ #if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ set_current_tx_agc(dm->priv, path, rate, (u8)pwr_idx); -+ #endif -+ -+ } else { -+ #if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8822B) -+ ret = config_phydm_write_txagc_8822b(dm, -+ pwr_idx, -+ path, -+ rate); -+ #endif -+ -+ #if (RTL8821C_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8821C) -+ ret = config_phydm_write_txagc_8821c(dm, -+ pwr_idx, -+ path, -+ rate); -+ #endif -+ -+ #if (RTL8195B_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8195B) -+ ret = config_phydm_write_txagc_8195b(dm, -+ pwr_idx, -+ path, -+ rate); -+ #endif -+ -+ #if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ for (i = 0; i < 4; i++) -+ set_current_tx_agc(dm->priv, path, (rate + i), -+ (u8)pwr_idx); -+ #endif -+ } -+ } -+#endif -+ -+#if (RTL8198F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8198F) { -+ if (rate < 0x4) -+ txagc_tmp = config_phydm_read_txagc_8198f(dm, path, -+ rate, -+ PDM_CCK); -+ else -+ txagc_tmp = config_phydm_read_txagc_8198f(dm, path, -+ rate, -+ PDM_OFDM); -+ -+ pw_by_rate_tmp = config_phydm_read_txagc_diff_8198f(dm, rate); -+ base = txagc_tmp - pw_by_rate_tmp; -+ base = base & 0x7f; -+ if (DIFF_2((pwr_idx & 0x7f), base) > 64 || pwr_idx > 127) -+ return false; -+ -+ pw_by_rate_new = (s8)(pwr_idx - base); -+ ret = phydm_write_txagc_1byte_8198f(dm, pw_by_rate_new, rate); -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, -+ "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", -+ __func__, path, rate, base, pw_by_rate_new); -+ } -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8822C) { -+ if (rate < 0x4) -+ txagc_tmp = config_phydm_read_txagc_8822c(dm, path, -+ rate, -+ PDM_CCK); -+ else -+ txagc_tmp = config_phydm_read_txagc_8822c(dm, path, -+ rate, -+ PDM_OFDM); -+ -+ pw_by_rate_tmp = config_phydm_read_txagc_diff_8822c(dm, rate); -+ base = txagc_tmp - pw_by_rate_tmp; -+ base = base & 0x7f; -+ if (DIFF_2((pwr_idx & 0x7f), base) > 63 || pwr_idx > 127) -+ return false; -+ -+ pw_by_rate_new = (s8)(pwr_idx - base); -+ ret = phydm_write_txagc_1byte_8822c(dm, pw_by_rate_new, rate); -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, -+ "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", -+ __func__, path, rate, base, pw_by_rate_new); -+ } -+#endif -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ if (rate < 0x4) -+ txagc_tmp = config_phydm_read_txagc_8814b(dm, path, -+ rate, -+ PDM_CCK); -+ else -+ txagc_tmp = config_phydm_read_txagc_8814b(dm, path, -+ rate, -+ PDM_OFDM); -+ -+ pw_by_rate_tmp = config_phydm_read_txagc_diff_8814b(dm, rate); -+ base = txagc_tmp - pw_by_rate_tmp; -+ base = base & 0x7f; -+ if (DIFF_2((pwr_idx & 0x7f), base) > 64) -+ return false; -+ -+ pw_by_rate_new = (s8)(pwr_idx - base); -+ ret = phydm_write_txagc_1byte_8814b(dm, pw_by_rate_new, rate); -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, -+ "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", -+ __func__, path, rate, base, pw_by_rate_new); -+ } -+#endif -+ -+#if (RTL8812F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8812F) { -+ if (rate < 0x4) -+ txagc_tmp = config_phydm_read_txagc_8812f(dm, path, -+ rate, -+ PDM_CCK); -+ else -+ txagc_tmp = config_phydm_read_txagc_8812f(dm, path, -+ rate, -+ PDM_OFDM); -+ -+ pw_by_rate_tmp = config_phydm_read_txagc_diff_8812f(dm, rate); -+ base = txagc_tmp - pw_by_rate_tmp; -+ base = base & 0x7f; -+ if (DIFF_2((pwr_idx & 0x7f), base) > 63 || pwr_idx > 127) -+ return false; -+ -+ pw_by_rate_new = (s8)(pwr_idx - base); -+ ret = phydm_write_txagc_1byte_8812f(dm, pw_by_rate_new, rate); -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, -+ "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", -+ __func__, path, rate, base, pw_by_rate_new); -+ } -+#endif -+ -+#if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197G) { -+ if (rate < 0x4) -+ txagc_tmp = config_phydm_read_txagc_8197g(dm, path, -+ rate, -+ PDM_CCK); -+ else -+ txagc_tmp = config_phydm_read_txagc_8197g(dm, path, -+ rate, -+ PDM_OFDM); -+ -+ pw_by_rate_tmp = config_phydm_read_txagc_diff_8197g(dm, rate); -+ base = txagc_tmp - pw_by_rate_tmp; -+ base = base & 0x7f; -+ if (DIFF_2((pwr_idx & 0x7f), base) > 63 || pwr_idx > 127) -+ return false; -+ -+ pw_by_rate_new = (s8)(pwr_idx - base); -+ ret = phydm_write_txagc_1byte_8197g(dm, pw_by_rate_new, rate); -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, -+ "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", -+ __func__, path, rate, base, pw_by_rate_new); -+ } -+#endif -+#if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ if (rate < 0x4) -+ txagc_tmp = config_phydm_read_txagc_8723f(dm, path, -+ rate, -+ PDM_CCK); -+ else -+ txagc_tmp = config_phydm_read_txagc_8723f(dm, path, -+ rate, -+ PDM_OFDM); -+ -+ pw_by_rate_tmp = config_phydm_read_txagc_diff_8723f(dm, rate); -+ base = txagc_tmp - pw_by_rate_tmp; -+ base = base & 0x7f; -+ if (DIFF_2((pwr_idx & 0x7f), base) > 63 || pwr_idx > 127) -+ return false; -+ -+ pw_by_rate_new = (s8)(pwr_idx - base); -+ ret = phydm_write_txagc_1byte_8723f(dm, pw_by_rate_new, rate); -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, -+ "%s: path-%d rate_idx=%x base=0x%x new_diff=0x%x\n", -+ __func__, path, rate, base, pw_by_rate_new); -+ } -+#endif -+ -+#if (RTL8197F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197F) -+ ret = config_phydm_write_txagc_8197f(dm, pwr_idx, path, rate); -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8192F) -+ ret = config_phydm_write_txagc_8192f(dm, pwr_idx, path, rate); -+#endif -+ -+#if (RTL8721D_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8721D) -+ ret = config_phydm_write_txagc_8721d(dm, pwr_idx, path, rate); -+#endif -+#if (RTL8710C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8710C) -+ ret = config_phydm_write_txagc_8710c(dm, pwr_idx, path, rate); -+#endif -+ return ret; -+} -+ -+u8 phydm_api_get_txagc(void *dm_void, enum rf_path path, u8 hw_rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 ret = 0; -+ -+#if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8822B) -+ ret = config_phydm_read_txagc_8822b(dm, path, hw_rate); -+#endif -+ -+#if (RTL8197F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197F) -+ ret = config_phydm_read_txagc_8197f(dm, path, hw_rate); -+#endif -+ -+#if (RTL8821C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8821C) -+ ret = config_phydm_read_txagc_8821c(dm, path, hw_rate); -+#endif -+ -+#if (RTL8195B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8195B) -+ ret = config_phydm_read_txagc_8195b(dm, path, hw_rate); -+#endif -+ -+/*@jj add 20170822*/ -+#if (RTL8192F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8192F) -+ ret = config_phydm_read_txagc_8192f(dm, path, hw_rate); -+#endif -+ -+#if (RTL8198F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8198F) { -+ if (hw_rate < 0x4) { -+ ret = config_phydm_read_txagc_8198f(dm, path, hw_rate, -+ PDM_CCK); -+ } else { -+ ret = config_phydm_read_txagc_8198f(dm, path, hw_rate, -+ PDM_OFDM); -+ } -+ } -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8822C) { -+ if (hw_rate < 0x4) { -+ ret = config_phydm_read_txagc_8822c(dm, path, hw_rate, -+ PDM_CCK); -+ } else { -+ ret = config_phydm_read_txagc_8822c(dm, path, hw_rate, -+ PDM_OFDM); -+ } -+ } -+#endif -+ -+#if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ if (hw_rate < 0x4) { -+ ret = config_phydm_read_txagc_8723f(dm, path, hw_rate, -+ PDM_CCK); -+ } else { -+ ret = config_phydm_read_txagc_8723f(dm, path, hw_rate, -+ PDM_OFDM); -+ } -+ } -+#endif -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ if (hw_rate < 0x4) { -+ ret = config_phydm_read_txagc_8814b(dm, path, hw_rate, -+ PDM_CCK); -+ } else { -+ ret = config_phydm_read_txagc_8814b(dm, path, hw_rate, -+ PDM_OFDM); -+ } -+ } -+#endif -+ -+#if (RTL8812F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8812F) { -+ if (hw_rate < 0x4) { -+ ret = config_phydm_read_txagc_8812f(dm, path, hw_rate, -+ PDM_CCK); -+ } else { -+ ret = config_phydm_read_txagc_8812f(dm, path, hw_rate, -+ PDM_OFDM); -+ } -+ } -+#endif -+ -+#if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197G) { -+ if (hw_rate < 0x4) { -+ ret = config_phydm_read_txagc_8197g(dm, path, -+ hw_rate, -+ PDM_CCK); -+ } else { -+ ret = config_phydm_read_txagc_8197g(dm, path, -+ hw_rate, -+ PDM_OFDM); -+ } -+ } -+#endif -+ -+#if (RTL8721D_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8721D) -+ ret = config_phydm_read_txagc_8721d(dm, path, hw_rate); -+#endif -+#if (RTL8710C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8710C) -+ ret = config_phydm_read_txagc_8710c(dm, path, hw_rate); -+#endif -+ return ret; -+} -+ -+#if (RTL8822C_SUPPORT) -+void phydm_shift_rxagc_table(void *dm_void, boolean is_pos_shift, u8 sft) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ u8 j = 0; -+ u32 reg = 0; -+ u16 max_rf_gain = 0; -+ u16 min_rf_gain = 0; -+ -+ dm->is_agc_tab_pos_shift = is_pos_shift; -+ dm->agc_table_shift = sft; -+ -+ for (i = 0; i <= dm->agc_table_cnt; i++) { -+ max_rf_gain = dm->agc_rf_gain_ori[i][0]; -+ min_rf_gain = dm->agc_rf_gain_ori[i][63]; -+ -+ if (dm->support_ic_type & ODM_RTL8822C) -+ dm->l_bnd_detect[i] = false; -+ -+ for (j = 0; j < 64; j++) { -+ if (is_pos_shift) { -+ if (j < sft) -+ reg = (max_rf_gain & 0x3ff); -+ else -+ reg = (dm->agc_rf_gain_ori[i][j - sft] & -+ 0x3ff); -+ } else { -+ if (j > 63 - sft) -+ reg = (min_rf_gain & 0x3ff); -+ -+ else -+ reg = (dm->agc_rf_gain_ori[i][j + sft] & -+ 0x3ff); -+ } -+ dm->agc_rf_gain[i][j] = (u16)(reg & 0x3ff); -+ -+ reg |= (j & 0x3f) << 16;/*mp_gain_idx*/ -+ reg |= (i & 0xf) << 22;/*table*/ -+ reg |= BIT(29) | BIT(28);/*write en*/ -+ odm_set_bb_reg(dm, R_0x1d90, MASKDWORD, reg); -+ } -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8822C) -+ odm_set_bb_reg(dm, R_0x828, 0xf8, L_BND_DEFAULT_8822C); -+} -+#endif -+ -+boolean -+phydm_api_switch_bw_channel(void *dm_void, u8 ch, u8 pri_ch, -+ enum channel_width bw) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean ret = false; -+ -+ switch (dm->support_ic_type) { -+#if (RTL8822B_SUPPORT) -+ case ODM_RTL8822B: -+ ret = config_phydm_switch_channel_bw_8822b(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8197F_SUPPORT) -+ case ODM_RTL8197F: -+ ret = config_phydm_switch_channel_bw_8197f(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8821C_SUPPORT) -+ case ODM_RTL8821C: -+ ret = config_phydm_switch_channel_bw_8821c(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8195B_SUPPORT) -+ case ODM_RTL8195B: -+ ret = config_phydm_switch_channel_bw_8195b(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ case ODM_RTL8192F: -+ ret = config_phydm_switch_channel_bw_8192f(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8198F_SUPPORT) -+ case ODM_RTL8198F: -+ ret = config_phydm_switch_channel_bw_8198f(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ case ODM_RTL8822C: -+ ret = config_phydm_switch_channel_bw_8822c(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8723F_SUPPORT) -+ case ODM_RTL8723F: -+ ret = config_phydm_switch_channel_bw_8723f(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8814B_SUPPORT) -+ case ODM_RTL8814B: -+ ret = config_phydm_switch_channel_bw_8814b(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8812F_SUPPORT) -+ case ODM_RTL8812F: -+ ret = config_phydm_switch_channel_bw_8812f(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8197G_SUPPORT) -+ case ODM_RTL8197G: -+ ret = config_phydm_switch_channel_bw_8197g(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+#if (RTL8721D_SUPPORT) -+ case ODM_RTL8721D: -+ ret = config_phydm_switch_channel_bw_8721d(dm, ch, pri_ch, bw); -+ break; -+#endif -+#if (RTL8710C_SUPPORT) -+ case ODM_RTL8710C: -+ ret = config_phydm_switch_channel_bw_8710c(dm, ch, pri_ch, bw); -+ break; -+#endif -+ -+ default: -+ break; -+ } -+ return ret; -+} -+ -+boolean -+phydm_api_trx_mode(void *dm_void, enum bb_path tx_path, enum bb_path rx_path, -+ enum bb_path tx_path_ctrl) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean ret = false; -+ boolean is_2tx = false; -+ -+ if (tx_path_ctrl == BB_PATH_AB) -+ is_2tx = true; -+ -+ switch (dm->support_ic_type) { -+ #if (RTL8822B_SUPPORT) -+ case ODM_RTL8822B: -+ ret = config_phydm_trx_mode_8822b(dm, tx_path, rx_path, -+ tx_path_ctrl); -+ break; -+ #endif -+ -+ #if (RTL8197F_SUPPORT) -+ case ODM_RTL8197F: -+ ret = config_phydm_trx_mode_8197f(dm, tx_path, rx_path, is_2tx); -+ break; -+ #endif -+ -+ #if (RTL8192F_SUPPORT) -+ case ODM_RTL8192F: -+ ret = config_phydm_trx_mode_8192f(dm, tx_path, rx_path, -+ tx_path_ctrl); -+ break; -+ #endif -+ -+ #if (RTL8198F_SUPPORT) -+ case ODM_RTL8198F: -+ ret = config_phydm_trx_mode_8198f(dm, tx_path, rx_path, is_2tx); -+ break; -+ #endif -+ -+ #if (RTL8814B_SUPPORT) -+ case ODM_RTL8814B: -+ ret = config_phydm_trx_mode_8814b(dm, tx_path, rx_path); -+ break; -+ #endif -+ -+ #if (RTL8822C_SUPPORT) -+ case ODM_RTL8822C: -+ ret = config_phydm_trx_mode_8822c(dm, tx_path, rx_path, -+ tx_path_ctrl); -+ break; -+ #endif -+ -+ #if (RTL8812F_SUPPORT) -+ case ODM_RTL8812F: -+ ret = config_phydm_trx_mode_8812f(dm, tx_path, rx_path, is_2tx); -+ break; -+ #endif -+ -+ #if (RTL8197G_SUPPORT) -+ case ODM_RTL8197G: -+ ret = config_phydm_trx_mode_8197g(dm, tx_path, rx_path, is_2tx); -+ break; -+ #endif -+ -+ #if (RTL8721D_SUPPORT) -+ case ODM_RTL8721D: -+ ret = config_phydm_trx_mode_8721d(dm, tx_path, rx_path, is_2tx); -+ break; -+ #endif -+ -+ #if (RTL8710C_SUPPORT) -+ case ODM_RTL8710C: -+ ret = config_phydm_trx_mode_8710c(dm, tx_path, rx_path, is_2tx); -+ break; -+ #endif -+ } -+ return ret; -+} -+#endif -+ -+#ifdef PHYDM_COMMON_API_NOT_SUPPORT -+u8 config_phydm_read_txagc_n(void *dm_void, enum rf_path path, u8 hw_rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 read_back_data = INVALID_TXAGC_DATA; -+ u32 reg_txagc; -+ u32 reg_mask; -+ /* This function is for 92E/88E etc... */ -+ /* @Input need to be HW rate index, not driver rate index!!!! */ -+ -+ /* @Error handling */ -+ if (path > RF_PATH_B || hw_rate > ODM_RATEMCS15) { -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, "%s: unsupported path (%d)\n", -+ __func__, path); -+ return INVALID_TXAGC_DATA; -+ } -+ -+ if (path == RF_PATH_A) { -+ switch (hw_rate) { -+ case ODM_RATE1M: -+ reg_txagc = R_0xe08; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATE2M: -+ reg_txagc = R_0x86c; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATE5_5M: -+ reg_txagc = R_0x86c; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATE11M: -+ reg_txagc = R_0x86c; -+ reg_mask = 0x7f000000; -+ break; -+ -+ case ODM_RATE6M: -+ reg_txagc = R_0xe00; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATE9M: -+ reg_txagc = R_0xe00; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATE12M: -+ reg_txagc = R_0xe00; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATE18M: -+ reg_txagc = R_0xe00; -+ reg_mask = 0x7f000000; -+ break; -+ case ODM_RATE24M: -+ reg_txagc = R_0xe04; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATE36M: -+ reg_txagc = R_0xe04; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATE48M: -+ reg_txagc = R_0xe04; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATE54M: -+ reg_txagc = R_0xe04; -+ reg_mask = 0x7f000000; -+ break; -+ -+ case ODM_RATEMCS0: -+ reg_txagc = R_0xe10; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATEMCS1: -+ reg_txagc = R_0xe10; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATEMCS2: -+ reg_txagc = R_0xe10; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATEMCS3: -+ reg_txagc = R_0xe10; -+ reg_mask = 0x7f000000; -+ break; -+ case ODM_RATEMCS4: -+ reg_txagc = R_0xe14; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATEMCS5: -+ reg_txagc = R_0xe14; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATEMCS6: -+ reg_txagc = R_0xe14; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATEMCS7: -+ reg_txagc = R_0xe14; -+ reg_mask = 0x7f000000; -+ break; -+ case ODM_RATEMCS8: -+ reg_txagc = R_0xe18; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATEMCS9: -+ reg_txagc = R_0xe18; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATEMCS10: -+ reg_txagc = R_0xe18; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATEMCS11: -+ reg_txagc = R_0xe18; -+ reg_mask = 0x7f000000; -+ break; -+ case ODM_RATEMCS12: -+ reg_txagc = R_0xe1c; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATEMCS13: -+ reg_txagc = R_0xe1c; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATEMCS14: -+ reg_txagc = R_0xe1c; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATEMCS15: -+ reg_txagc = R_0xe1c; -+ reg_mask = 0x7f000000; -+ break; -+ -+ default: -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, "Invalid HWrate!\n"); -+ break; -+ } -+ } else if (path == RF_PATH_B) { -+ switch (hw_rate) { -+ case ODM_RATE1M: -+ reg_txagc = R_0x838; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATE2M: -+ reg_txagc = R_0x838; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATE5_5M: -+ reg_txagc = R_0x838; -+ reg_mask = 0x7f000000; -+ break; -+ case ODM_RATE11M: -+ reg_txagc = R_0x86c; -+ reg_mask = 0x0000007f; -+ break; -+ -+ case ODM_RATE6M: -+ reg_txagc = R_0x830; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATE9M: -+ reg_txagc = R_0x830; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATE12M: -+ reg_txagc = R_0x830; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATE18M: -+ reg_txagc = R_0x830; -+ reg_mask = 0x7f000000; -+ break; -+ case ODM_RATE24M: -+ reg_txagc = R_0x834; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATE36M: -+ reg_txagc = R_0x834; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATE48M: -+ reg_txagc = R_0x834; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATE54M: -+ reg_txagc = R_0x834; -+ reg_mask = 0x7f000000; -+ break; -+ -+ case ODM_RATEMCS0: -+ reg_txagc = R_0x83c; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATEMCS1: -+ reg_txagc = R_0x83c; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATEMCS2: -+ reg_txagc = R_0x83c; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATEMCS3: -+ reg_txagc = R_0x83c; -+ reg_mask = 0x7f000000; -+ break; -+ case ODM_RATEMCS4: -+ reg_txagc = R_0x848; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATEMCS5: -+ reg_txagc = R_0x848; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATEMCS6: -+ reg_txagc = R_0x848; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATEMCS7: -+ reg_txagc = R_0x848; -+ reg_mask = 0x7f000000; -+ break; -+ -+ case ODM_RATEMCS8: -+ reg_txagc = R_0x84c; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATEMCS9: -+ reg_txagc = R_0x84c; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATEMCS10: -+ reg_txagc = R_0x84c; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATEMCS11: -+ reg_txagc = R_0x84c; -+ reg_mask = 0x7f000000; -+ break; -+ case ODM_RATEMCS12: -+ reg_txagc = R_0x868; -+ reg_mask = 0x0000007f; -+ break; -+ case ODM_RATEMCS13: -+ reg_txagc = R_0x868; -+ reg_mask = 0x00007f00; -+ break; -+ case ODM_RATEMCS14: -+ reg_txagc = R_0x868; -+ reg_mask = 0x007f0000; -+ break; -+ case ODM_RATEMCS15: -+ reg_txagc = R_0x868; -+ reg_mask = 0x7f000000; -+ break; -+ -+ default: -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, "Invalid HWrate!\n"); -+ break; -+ } -+ } else { -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, "Invalid RF path!!\n"); -+ } -+ read_back_data = (u8)odm_get_bb_reg(dm, reg_txagc, reg_mask); -+ PHYDM_DBG(dm, ODM_PHY_CONFIG, "%s: path-%d rate index 0x%x = 0x%x\n", -+ __func__, path, hw_rate, read_back_data); -+ return read_back_data; -+} -+#endif -+ -+#ifdef CONFIG_MCC_DM -+#ifdef DYN_ANT_WEIGHTING_SUPPORT -+void phydm_set_weighting_cmn(struct dm_struct *dm) -+{ -+ PHYDM_DBG(dm, DBG_COMP_MCC, "%s\n", __func__); -+ odm_set_bb_reg(dm, 0xc04, (BIT(18) | BIT(21)), 0x0); -+ odm_set_bb_reg(dm, 0xe04, (BIT(18) | BIT(21)), 0x0); -+} -+ -+void phydm_set_weighting_mcc(u8 b_equal_weighting, void *dm_void, u8 port) -+{ -+ /*u8 reg_8;*/ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ u8 val_0x98e, val_0x98f, val_0x81b; -+ u32 temp_reg; -+ -+ PHYDM_DBG(dm, DBG_COMP_MCC, "ant_weighting_mcc, port = %d\n", port); -+ if (b_equal_weighting) { -+ temp_reg = odm_get_bb_reg(dm, 0x98c, 0x00ff0000); -+ val_0x98e = (u8)(temp_reg >> 16) & 0xc0; -+ temp_reg = odm_get_bb_reg(dm, 0x98c, 0xff000000); -+ val_0x98f = (u8)(temp_reg >> 24) & 0x7f; -+ temp_reg = odm_get_bb_reg(dm, 0x818, 0xff000000); -+ val_0x81b = (u8)(temp_reg >> 24) & 0xfd; -+ PHYDM_DBG(dm, DBG_COMP_MCC, "Equal weighting ,rssi_min = %d\n", -+ dm->rssi_min); -+ /*equal weighting*/ -+ } else { -+ val_0x98e = 0x44; -+ val_0x98f = 0x43; -+ temp_reg = odm_get_bb_reg(dm, 0x818, 0xff000000); -+ val_0x81b = (u8)(temp_reg >> 24) | BIT(2); -+ PHYDM_DBG(dm, DBG_COMP_MCC, "AGC weighting ,rssi_min = %d\n", -+ dm->rssi_min); -+ /*fix sec_min_wgt = 1/2*/ -+ } -+ mcc_dm->mcc_reg_id[2] = 0x2; -+ mcc_dm->mcc_dm_reg[2] = 0x98e; -+ mcc_dm->mcc_dm_val[2][port] = val_0x98e; -+ -+ mcc_dm->mcc_reg_id[3] = 0x3; -+ mcc_dm->mcc_dm_reg[3] = 0x98f; -+ mcc_dm->mcc_dm_val[3][port] = val_0x98f; -+ -+ mcc_dm->mcc_reg_id[4] = 0x4; -+ mcc_dm->mcc_dm_reg[4] = 0x81b; -+ mcc_dm->mcc_dm_val[4][port] = val_0x81b; -+} -+ -+void phydm_dyn_ant_dec_mcc(u8 port, u8 rssi_in, void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rssi_l2h = 43, rssi_h2l = 37; -+ -+ if (rssi_in == 0xff) -+ phydm_set_weighting_mcc(FALSE, dm, port); -+ else if (rssi_in >= rssi_l2h) -+ phydm_set_weighting_mcc(TRUE, dm, port); -+ else if (rssi_in <= rssi_h2l) -+ phydm_set_weighting_mcc(FALSE, dm, port); -+} -+ -+void phydm_dynamic_ant_weighting_mcc_8822b(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ u8 i; -+ -+ phydm_set_weighting_cmn(dm); -+ for (i = 0; i <= 1; i++) -+ phydm_dyn_ant_dec_mcc(i, mcc_dm->mcc_rssi[i], dm); -+} -+#endif /*#ifdef DYN_ANT_WEIGHTING_SUPPORT*/ -+ -+void phydm_mcc_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ u8 i; -+ -+ /*PHYDM_DBG(dm, DBG_COMP_MCC, ("MCC init\n"));*/ -+ PHYDM_DBG(dm, DBG_COMP_MCC, "MCC init\n"); -+ for (i = 0; i < MCC_DM_REG_NUM; i++) { -+ mcc_dm->mcc_reg_id[i] = 0xff; -+ mcc_dm->mcc_dm_reg[i] = 0; -+ mcc_dm->mcc_dm_val[i][0] = 0; -+ mcc_dm->mcc_dm_val[i][1] = 0; -+ } -+ for (i = 0; i < NUM_STA; i++) { -+ mcc_dm->sta_macid[0][i] = 0xff; -+ mcc_dm->sta_macid[1][i] = 0xff; -+ } -+ /* Function init */ -+ dm->is_stop_dym_ant_weighting = 0; -+} -+ -+u8 phydm_check(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ struct cmn_sta_info *p_entry = NULL; -+ u8 shift = 0; -+ u8 i = 0; -+ u8 j = 0; -+ u8 rssi_min[2] = {0xff, 0xff}; -+ u8 sta_num = 8; -+ u8 mcc_macid = 0; -+ -+ for (i = 0; i <= 1; i++) { -+ for (j = 0; j < sta_num; j++) { -+ if (mcc_dm->sta_macid[i][j] != 0xff) { -+ mcc_macid = mcc_dm->sta_macid[i][j]; -+ p_entry = dm->phydm_sta_info[mcc_macid]; -+ if (!p_entry) { -+ PHYDM_DBG(dm, DBG_COMP_MCC, -+ "PEntry NULL(mac=%d)\n", -+ mcc_dm->sta_macid[i][j]); -+ return _FAIL; -+ } -+ PHYDM_DBG(dm, DBG_COMP_MCC, -+ "undec_smoothed_pwdb=%d\n", -+ p_entry->rssi_stat.rssi); -+ if (p_entry->rssi_stat.rssi < rssi_min[i]) -+ rssi_min[i] = p_entry->rssi_stat.rssi; -+ } -+ } -+ } -+ mcc_dm->mcc_rssi[0] = (u8)rssi_min[0]; -+ mcc_dm->mcc_rssi[1] = (u8)rssi_min[1]; -+ return _SUCCESS; -+} -+ -+void phydm_mcc_h2ccmd_rst(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ u8 i; -+ u8 regid; -+ u8 h2c_mcc[H2C_MAX_LENGTH]; -+ -+ /* RST MCC */ -+ for (i = 0; i < H2C_MAX_LENGTH; i++) -+ h2c_mcc[i] = 0xff; -+ h2c_mcc[0] = 0x00; -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_MCC, H2C_MAX_LENGTH, h2c_mcc); -+ PHYDM_DBG(dm, DBG_COMP_MCC, "MCC H2C RST\n"); -+} -+ -+void phydm_mcc_h2ccmd(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ u8 i; -+ u8 regid; -+ u8 h2c_mcc[H2C_MAX_LENGTH]; -+ -+ if (mcc_dm->mcc_rf_ch[0] == 0xff && mcc_dm->mcc_rf_ch[1] == 0xff) { -+ PHYDM_DBG(dm, DBG_COMP_MCC, "MCC channel Error\n"); -+ return; -+ } -+ /* Set Channel number */ -+ for (i = 0; i < H2C_MAX_LENGTH; i++) -+ h2c_mcc[i] = 0xff; -+ h2c_mcc[0] = 0xe0; -+ h2c_mcc[1] = (u8)(mcc_dm->mcc_rf_ch[0]); -+ h2c_mcc[2] = (u8)(mcc_dm->mcc_rf_ch[0] >> 8); -+ h2c_mcc[3] = (u8)(mcc_dm->mcc_rf_ch[1]); -+ h2c_mcc[4] = (u8)(mcc_dm->mcc_rf_ch[1] >> 8); -+ h2c_mcc[5] = 0xff; -+ h2c_mcc[6] = 0xff; -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_MCC, H2C_MAX_LENGTH, h2c_mcc); -+ PHYDM_DBG(dm, DBG_COMP_MCC, -+ "MCC H2C SetCH: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ h2c_mcc[0], h2c_mcc[1], h2c_mcc[2], h2c_mcc[3], -+ h2c_mcc[4], h2c_mcc[5], h2c_mcc[6]); -+ -+ /* Set Reg and value*/ -+ for (i = 0; i < H2C_MAX_LENGTH; i++) -+ h2c_mcc[i] = 0xff; -+ -+ for (i = 0; i < MCC_DM_REG_NUM; i++) { -+ regid = mcc_dm->mcc_reg_id[i]; -+ if (regid != 0xff) { -+ h2c_mcc[0] = 0xa0 | (regid & 0x1f); -+ h2c_mcc[1] = (u8)(mcc_dm->mcc_dm_reg[i]); -+ h2c_mcc[2] = (u8)(mcc_dm->mcc_dm_reg[i] >> 8); -+ h2c_mcc[3] = mcc_dm->mcc_dm_val[i][0]; -+ h2c_mcc[4] = mcc_dm->mcc_dm_val[i][1]; -+ h2c_mcc[5] = 0xff; -+ h2c_mcc[6] = 0xff; -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_MCC, H2C_MAX_LENGTH, -+ h2c_mcc); -+ PHYDM_DBG(dm, DBG_COMP_MCC, -+ "MCC H2C: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ h2c_mcc[0], h2c_mcc[1], h2c_mcc[2], -+ h2c_mcc[3], h2c_mcc[4], -+ h2c_mcc[5], h2c_mcc[6]); -+ } -+ } -+} -+ -+void phydm_mcc_ctrl(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ PHYDM_DBG(dm, DBG_COMP_MCC, "MCC status: %x\n", mcc_dm->mcc_status); -+ /*MCC stage no change*/ -+ if (mcc_dm->mcc_status == mcc_dm->mcc_pre_status) -+ return; -+ /*Not in MCC stage*/ -+ if (mcc_dm->mcc_status == 0) { -+ /* Enable normal Ant-weighting */ -+ dm->is_stop_dym_ant_weighting = 0; -+ /* Enable normal DIG */ -+ odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, 0x20); -+ } else { -+ /* Disable normal Ant-weighting */ -+ dm->is_stop_dym_ant_weighting = 1; -+ /* Enable normal DIG */ -+ odm_pause_dig(dm, PHYDM_PAUSE_NO_SET, PHYDM_PAUSE_LEVEL_1, -+ 0x20); -+ } -+ if (mcc_dm->mcc_status == 0 && mcc_dm->mcc_pre_status != 0) -+ phydm_mcc_init(dm); -+ mcc_dm->mcc_pre_status = mcc_dm->mcc_status; -+ } -+ -+void phydm_fill_mcccmd(void *dm_void, u8 regid, u16 reg_add, -+ u8 val0, u8 val1) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ -+ mcc_dm->mcc_reg_id[regid] = regid; -+ mcc_dm->mcc_dm_reg[regid] = reg_add; -+ mcc_dm->mcc_dm_val[regid][0] = val0; -+ mcc_dm->mcc_dm_val[regid][1] = val1; -+} -+ -+void phydm_mcc_switch(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ s8 ret; -+ -+ phydm_mcc_ctrl(dm); -+ if (mcc_dm->mcc_status == 0) {/*Not in MCC stage*/ -+ phydm_mcc_h2ccmd_rst(dm); -+ return; -+ } -+ PHYDM_DBG(dm, DBG_COMP_MCC, "MCC switch\n"); -+ ret = phydm_check(dm); -+ if (ret == _FAIL) { -+ PHYDM_DBG(dm, DBG_COMP_MCC, "MCC check fail\n"); -+ return; -+ } -+ /* Set IGI*/ -+ phydm_mcc_igi_cal(dm); -+ -+ /* Set Antenna Gain*/ -+#if (RTL8822B_SUPPORT == 1) -+ phydm_dynamic_ant_weighting_mcc_8822b(dm); -+#endif -+ /* Set H2C Cmd*/ -+ phydm_mcc_h2ccmd(dm); -+} -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phydm_normal_driver_rx_sniffer( -+ struct dm_struct *dm, -+ u8 *desc, -+ PRT_RFD_STATUS rt_rfd_status, -+ u8 *drv_info, -+ u8 phy_status) -+{ -+#if (defined(CONFIG_PHYDM_RX_SNIFFER_PARSING)) -+ u32 *msg; -+ u16 seq_num; -+ -+ if (rt_rfd_status->packet_report_type != NORMAL_RX) -+ return; -+ -+ if (!dm->is_linked) { -+ if (rt_rfd_status->is_hw_error) -+ return; -+ } -+ -+ if (phy_status == true) { -+ if (dm->rx_pkt_type == type_block_ack || -+ dm->rx_pkt_type == type_rts || dm->rx_pkt_type == type_cts) -+ seq_num = 0; -+ else -+ seq_num = rt_rfd_status->seq_num; -+ -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, -+ "%04d , %01s, rate=0x%02x, L=%04d , %s , %s", -+ seq_num, -+ /*rt_rfd_status->mac_id,*/ -+ (rt_rfd_status->is_crc ? "C" : -+ rt_rfd_status->is_ampdu ? "A" : "_"), -+ rt_rfd_status->data_rate, -+ rt_rfd_status->length, -+ ((rt_rfd_status->band_width == 0) ? "20M" : -+ ((rt_rfd_status->band_width == 1) ? "40M" : "80M")), -+ (rt_rfd_status->is_ldpc ? "LDP" : "BCC")); -+ -+ if (dm->rx_pkt_type == type_asoc_req) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "AS_REQ"); -+ else if (dm->rx_pkt_type == type_asoc_rsp) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "AS_RSP"); -+ else if (dm->rx_pkt_type == type_probe_req) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "PR_REQ"); -+ else if (dm->rx_pkt_type == type_probe_rsp) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "PR_RSP"); -+ else if (dm->rx_pkt_type == type_deauth) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "DEAUTH"); -+ else if (dm->rx_pkt_type == type_beacon) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "BEACON"); -+ else if (dm->rx_pkt_type == type_block_ack_req) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "BA_REQ"); -+ else if (dm->rx_pkt_type == type_rts) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__RTS_"); -+ else if (dm->rx_pkt_type == type_cts) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__CTS_"); -+ else if (dm->rx_pkt_type == type_ack) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__ACK_"); -+ else if (dm->rx_pkt_type == type_block_ack) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "__BA__"); -+ else if (dm->rx_pkt_type == type_data) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "_DATA_"); -+ else if (dm->rx_pkt_type == type_data_ack) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "Data_Ack"); -+ else if (dm->rx_pkt_type == type_qos_data) -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [%s]", "QoS_Data"); -+ else -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [0x%x]", -+ dm->rx_pkt_type); -+ -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, " , [RSSI=%d,%d,%d,%d ]", -+ dm->rssi_a, -+ dm->rssi_b, -+ dm->rssi_c, -+ dm->rssi_d); -+ -+ msg = (u32 *)drv_info; -+ -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, -+ " , P-STS[28:0]=%08x-%08x-%08x-%08x-%08x-%08x-%08x\n", -+ msg[6], msg[5], msg[4], msg[3], -+ msg[2], msg[1], msg[1]); -+ } else { -+ PHYDM_DBG_F(dm, ODM_COMP_SNIFFER, -+ "%04d , %01s, rate=0x%02x, L=%04d , %s , %s\n", -+ rt_rfd_status->seq_num, -+ /*rt_rfd_status->mac_id,*/ -+ (rt_rfd_status->is_crc ? "C" : -+ (rt_rfd_status->is_ampdu) ? "A" : "_"), -+ rt_rfd_status->data_rate, -+ rt_rfd_status->length, -+ ((rt_rfd_status->band_width == 0) ? "20M" : -+ ((rt_rfd_status->band_width == 1) ? "40M" : "80M")), -+ (rt_rfd_status->is_ldpc ? "LDP" : "BCC")); -+ } -+ -+#endif -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_api.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_api.h -new file mode 100644 -index 000000000000..a27b72514b59 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_api.h -@@ -0,0 +1,228 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_API_H__ -+#define __PHYDM_API_H__ -+ -+/* 2019.10.22 Add get/shift rxagc API for 8822C*/ -+#define PHYDM_API_VERSION "2.3" -+ -+/* @1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+#define N_IC_TX_OFFEST_5_BIT (ODM_RTL8188E | ODM_RTL8192E) -+ -+#define N_IC_TX_OFFEST_6_BIT (ODM_RTL8723D | ODM_RTL8197F | ODM_RTL8710B |\ -+ ODM_RTL8723B | ODM_RTL8703B | ODM_RTL8195A |\ -+ ODM_RTL8188F) -+ -+#define N_IC_TX_OFFEST_7_BIT (ODM_RTL8721D | ODM_RTL8710C) -+ -+#define CN_CNT_MAX 10 /*@max condition number threshold*/ -+ -+#define FUNC_ENABLE 1 -+#define FUNC_DISABLE 2 -+ -+/*@NBI API------------------------------------*/ -+#define NBI_128TONE 27 /*register table size*/ -+#define NBI_256TONE 59 /*register table size*/ -+ -+#define NUM_START_CH_80M 7 -+#define NUM_START_CH_40M 14 -+ -+#define CH_OFFSET_40M 2 -+#define CH_OFFSET_80M 6 -+ -+#define FFT_128_TYPE 1 -+#define FFT_256_TYPE 2 -+ -+#define FREQ_POSITIVE 1 -+#define FREQ_NEGATIVE 2 -+/*@------------------------------------------------*/ -+ -+enum phystat_rpt { -+ PHY_PWDB = 0, -+ PHY_EVM = 1, -+ PHY_CFO = 2, -+ PHY_RXSNR = 3, -+ PHY_LGAIN = 4, -+ PHY_HT_AAGC_GAIN = 5, -+}; -+ -+#ifndef PHYDM_COMMON_API_SUPPORT -+#define INVALID_RF_DATA 0xffffffff -+#define INVALID_TXAGC_DATA 0xff -+#endif -+ -+/* @1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+ -+struct phydm_api_stuc { -+ u32 rxiqc_reg1; /*N-mode: for pathA REG0xc14*/ -+ u32 rxiqc_reg2; /*N-mode: for pathB REG0xc1c*/ -+ u8 tx_queue_bitmap; /*REG0x520[23:16]*/ -+ u8 ccktx_path; -+ u8 pri_ch_idx; -+}; -+ -+/* @1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ */ -+ -+/* @1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ */ -+enum channel_width phydm_rxsc_2_bw(void *dm_void, u8 rxsc); -+ -+void phydm_reset_bb_hw_cnt(void *dm_void); -+ -+void phydm_dynamic_ant_weighting(void *dm_void); -+ -+#ifdef DYN_ANT_WEIGHTING_SUPPORT -+void phydm_ant_weight_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#endif -+ -+void phydm_trx_antenna_setting_init(void *dm_void, u8 num_rf_path); -+ -+void phydm_config_ofdm_rx_path(void *dm_void, enum bb_path path); -+ -+void phydm_config_cck_rx_path(void *dm_void, enum bb_path path); -+ -+void phydm_config_cck_rx_antenna_init(void *dm_void); -+ -+void phydm_config_trx_path(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void phydm_config_ofdm_tx_path(void *dm_void, enum bb_path path); -+ -+void phydm_config_cck_tx_path(void *dm_void, enum bb_path path); -+ -+void phydm_tx_2path(void *dm_void); -+ -+void phydm_stop_3_wire(void *dm_void, u8 set_type); -+ -+u8 phydm_stop_ic_trx(void *dm_void, u8 set_type); -+ -+void phydm_dis_cck_trx(void *dm_void, u8 set_type); -+ -+void phydm_bw_fixed_enable(void *dm_void, u8 enable); -+ -+void phydm_bw_fixed_setting(void *dm_void); -+ -+void phydm_set_ext_switch(void *dm_void, u32 ext_ant_switch); -+ -+void phydm_nbi_enable(void *dm_void, u32 enable); -+ -+u8 phydm_csi_mask_setting(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf, -+ u32 sec_ch); -+ -+u8 phydm_nbi_setting(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf, -+ u32 sec_ch); -+ -+void phydm_nbi_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void phydm_csi_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void phydm_stop_ck320(void *dm_void, u8 enable); -+ -+boolean -+phydm_set_bb_txagc_offset(void *dm_void, s8 power_offset, u8 add_half_db); -+ -+boolean phydm_spur_case_mapping(void *dm_void); -+ -+enum odm_rf_band phydm_ch_to_rf_band(void *dm_void, u8 central_ch); -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+u32 phydm_rf_psd_jgr3(void *dm_void, u8 path, u32 tone_idx); -+ -+u8 phydm_csi_mask_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw, -+ u32 f_intf, u32 sec_ch, u8 wgt); -+ -+void phydm_set_csi_mask_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction, -+ u8 wgt); -+ -+u8 phydm_nbi_setting_jgr3(void *dm_void, u32 enable, u32 ch, u32 bw, u32 f_intf, -+ u32 sec_ch, u8 path); -+ -+void phydm_set_nbi_reg_jgr3(void *dm_void, u32 tone_idx_tmp, u8 tone_direction, -+ u8 path); -+ -+void phydm_nbi_enable_jgr3(void *dm_void, u32 enable, u8 path); -+ -+u8 phydm_phystat_rpt_jgr3(void *dm_void, enum phystat_rpt info, -+ enum rf_path ant_path); -+void phydm_user_position_for_sniffer(void *dm_void, u8 user_position); -+ -+#endif -+ -+#ifdef PHYDM_COMMON_API_SUPPORT -+void phydm_reset_txagc(void *dm_void); -+ -+boolean -+phydm_api_shift_txagc(void *dm_void, u32 pwr_offset, enum rf_path path, -+ boolean is_positive); -+boolean -+phydm_api_set_txagc(void *dm_void, u32 power_index, enum rf_path path, -+ u8 hw_rate, boolean is_single_rate); -+ -+u8 phydm_api_get_txagc(void *dm_void, enum rf_path path, u8 hw_rate); -+ -+#if (RTL8822C_SUPPORT) -+void phydm_shift_rxagc_table(void *dm_void, boolean shift_up, u8 shift); -+#endif -+ -+boolean -+phydm_api_switch_bw_channel(void *dm_void, u8 central_ch, u8 primary_ch_idx, -+ enum channel_width bandwidth); -+ -+boolean -+phydm_api_trx_mode(void *dm_void, enum bb_path tx_path, enum bb_path rx_path, -+ enum bb_path tx_path_ctrl); -+ -+#endif -+ -+#ifdef PHYDM_COMMON_API_NOT_SUPPORT -+u8 config_phydm_read_txagc_n(void *dm_void, enum rf_path path, u8 hw_rate); -+#endif -+ -+#ifdef CONFIG_MCC_DM -+#ifdef DYN_ANT_WEIGHTING_SUPPORT -+void phydm_dynamic_ant_weighting_mcc_8822b(void *dm_void); -+#endif /*#ifdef DYN_ANT_WEIGHTING_SUPPORT*/ -+void phydm_fill_mcccmd(void *dm_void, u8 regid, u16 reg_add, -+ u8 val0, u8 val1); -+u8 phydm_check(void *dm_void); -+void phydm_mcc_init(void *dm_void); -+void phydm_mcc_switch(void *dm_void); -+#endif /*#ifdef CONFIG_MCC_DM*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_auto_dbg.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_auto_dbg.c -new file mode 100644 -index 000000000000..203764d7c4ec ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_auto_dbg.c -@@ -0,0 +1,725 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/************************************************************* -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef PHYDM_AUTO_DEGBUG -+ -+void phydm_check_hang_reset( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; -+ -+ atd_t->dbg_step = 0; -+ atd_t->auto_dbg_type = AUTO_DBG_STOP; -+ phydm_pause_dm_watchdog(dm, PHYDM_RESUME); -+ dm->debug_components &= (~ODM_COMP_API); -+} -+ -+void phydm_check_hang_init( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; -+ -+ atd_t->dbg_step = 0; -+ atd_t->auto_dbg_type = AUTO_DBG_STOP; -+ phydm_pause_dm_watchdog(dm, PHYDM_RESUME); -+} -+ -+#if (ODM_IC_11N_SERIES_SUPPORT == 1) -+void phydm_auto_check_hang_engine_n( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; -+ struct n_dbgport_803 dbgport_803 = {0}; -+ u32 value32_tmp = 0, value32_tmp_2 = 0; -+ u8 i; -+ u32 curr_dbg_port_val[DBGPORT_CHK_NUM] = {0, 0, 0, 0, 0, 0}; -+ u16 curr_ofdm_t_cnt; -+ u16 curr_ofdm_r_cnt; -+ u16 curr_cck_t_cnt; -+ u16 curr_cck_r_cnt; -+ u16 curr_ofdm_crc_error_cnt; -+ u16 curr_cck_crc_error_cnt; -+ u16 diff_ofdm_t_cnt; -+ u16 diff_ofdm_r_cnt; -+ u16 diff_cck_t_cnt; -+ u16 diff_cck_r_cnt; -+ u16 diff_ofdm_crc_error_cnt; -+ u16 diff_cck_crc_error_cnt; -+ u8 rf_mode; -+ -+ if (atd_t->auto_dbg_type == AUTO_DBG_STOP) -+ return; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ phydm_check_hang_reset(dm); -+ return; -+ } -+ -+ if (atd_t->dbg_step == 0) { -+ pr_debug("dbg_step=0\n\n"); -+ -+ /*Reset all packet counter*/ -+ odm_set_bb_reg(dm, R_0xf14, BIT(16), 1); -+ odm_set_bb_reg(dm, R_0xf14, BIT(16), 0); -+ -+ } else if (atd_t->dbg_step == 1) { -+ pr_debug("dbg_step=1\n\n"); -+ -+ /*Check packet counter Register*/ -+ atd_t->ofdm_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9cc, MASKHWORD); -+ atd_t->ofdm_r_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, MASKLWORD); -+ atd_t->ofdm_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, -+ MASKHWORD); -+ -+ atd_t->cck_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9d0, MASKHWORD); -+ atd_t->cck_r_cnt = (u16)odm_get_bb_reg(dm, R_0xfa0, MASKHWORD); -+ atd_t->cck_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf84, -+ 0x3fff); -+ -+ /*Check Debug Port*/ -+ for (i = 0; i < DBGPORT_CHK_NUM; i++) { -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, -+ (u32)atd_t->dbg_port_table[i]) -+ ) { -+ atd_t->dbg_port_val[i] = -+ phydm_get_bb_dbg_port_val(dm); -+ phydm_release_bb_dbg_port(dm); -+ } -+ } -+ -+ } else if (atd_t->dbg_step == 2) { -+ pr_debug("dbg_step=2\n\n"); -+ -+ /*Check packet counter Register*/ -+ curr_ofdm_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9cc, MASKHWORD); -+ curr_ofdm_r_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, MASKLWORD); -+ curr_ofdm_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, -+ MASKHWORD); -+ -+ curr_cck_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9d0, MASKHWORD); -+ curr_cck_r_cnt = (u16)odm_get_bb_reg(dm, R_0xfa0, MASKHWORD); -+ curr_cck_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf84, -+ 0x3fff); -+ -+ /*Check Debug Port*/ -+ for (i = 0; i < DBGPORT_CHK_NUM; i++) { -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, -+ (u32)atd_t->dbg_port_table[i]) -+ ) { -+ curr_dbg_port_val[i] = -+ phydm_get_bb_dbg_port_val(dm); -+ phydm_release_bb_dbg_port(dm); -+ } -+ } -+ -+ /*=== Make check hang decision ===============================*/ -+ pr_debug("Check Hang Decision\n\n"); -+ -+ /* ----- Check RF Register -----------------------------------*/ -+ for (i = 0; i < dm->num_rf_path; i++) { -+ rf_mode = (u8)odm_get_rf_reg(dm, i, RF_0x0, 0xf0000); -+ pr_debug("RF0x0[%d] = 0x%x\n", i, rf_mode); -+ if (rf_mode > 3) { -+ pr_debug("Incorrect RF mode\n"); -+ pr_debug("ReasonCode:RHN-1\n"); -+ } -+ } -+ value32_tmp = odm_get_rf_reg(dm, 0, RF_0xb0, 0xf0000); -+ if (dm->support_ic_type == ODM_RTL8188E) { -+ if (value32_tmp != 0xff8c8) { -+ pr_debug("ReasonCode:RHN-3\n"); -+ } -+ } -+ /* ----- Check BB Register ----------------------------------*/ -+ /*BB mode table*/ -+ value32_tmp = odm_get_bb_reg(dm, R_0x824, 0xe); -+ value32_tmp_2 = odm_get_bb_reg(dm, R_0x82c, 0xe); -+ pr_debug("BB TX mode table {A, B}= {%d, %d}\n", -+ value32_tmp, value32_tmp_2); -+ -+ if (value32_tmp > 3 || value32_tmp_2 > 3) { -+ pr_debug("ReasonCode:RHN-2\n"); -+ } -+ -+ value32_tmp = odm_get_bb_reg(dm, R_0x824, 0x700000); -+ value32_tmp_2 = odm_get_bb_reg(dm, R_0x82c, 0x700000); -+ pr_debug("BB RX mode table {A, B}= {%d, %d}\n", value32_tmp, -+ value32_tmp_2); -+ -+ if (value32_tmp > 3 || value32_tmp_2 > 3) { -+ pr_debug("ReasonCode:RHN-2\n"); -+ } -+ -+ /*BB HW Block*/ -+ value32_tmp = odm_get_bb_reg(dm, R_0x800, MASKDWORD); -+ -+ if (!(value32_tmp & BIT(24))) { -+ pr_debug("Reg0x800[24] = 0, CCK BLK is disabled\n"); -+ pr_debug("ReasonCode: THN-3\n"); -+ } -+ -+ if (!(value32_tmp & BIT(25))) { -+ pr_debug("Reg0x800[24] = 0, OFDM BLK is disabled\n"); -+ pr_debug("ReasonCode:THN-3\n"); -+ } -+ -+ /*BB Continue TX*/ -+ value32_tmp = odm_get_bb_reg(dm, R_0xd00, 0x70000000); -+ pr_debug("Continue TX=%d\n", value32_tmp); -+ if (value32_tmp != 0) { -+ pr_debug("ReasonCode: THN-4\n"); -+ } -+ -+ /* ----- Check Packet Counter --------------------------------*/ -+ diff_ofdm_t_cnt = curr_ofdm_t_cnt - atd_t->ofdm_t_cnt; -+ diff_ofdm_r_cnt = curr_ofdm_r_cnt - atd_t->ofdm_r_cnt; -+ diff_ofdm_crc_error_cnt = curr_ofdm_crc_error_cnt - -+ atd_t->ofdm_crc_error_cnt; -+ -+ diff_cck_t_cnt = curr_cck_t_cnt - atd_t->cck_t_cnt; -+ diff_cck_r_cnt = curr_cck_r_cnt - atd_t->cck_r_cnt; -+ diff_cck_crc_error_cnt = curr_cck_crc_error_cnt - -+ atd_t->cck_crc_error_cnt; -+ -+ pr_debug("OFDM[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n", -+ atd_t->ofdm_t_cnt, atd_t->ofdm_r_cnt, -+ atd_t->ofdm_crc_error_cnt); -+ pr_debug("OFDM[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n", -+ curr_ofdm_t_cnt, curr_ofdm_r_cnt, -+ curr_ofdm_crc_error_cnt); -+ pr_debug("OFDM_diff {TX, RX, CRC_error} = {%d, %d, %d}\n", -+ diff_ofdm_t_cnt, diff_ofdm_r_cnt, -+ diff_ofdm_crc_error_cnt); -+ -+ pr_debug("CCK[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n", -+ atd_t->cck_t_cnt, atd_t->cck_r_cnt, -+ atd_t->cck_crc_error_cnt); -+ pr_debug("CCK[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n", -+ curr_cck_t_cnt, curr_cck_r_cnt, -+ curr_cck_crc_error_cnt); -+ pr_debug("CCK_diff {TX, RX, CRC_error} = {%d, %d, %d}\n", -+ diff_cck_t_cnt, diff_cck_r_cnt, -+ diff_cck_crc_error_cnt); -+ -+ /* ----- Check Dbg Port --------------------------------*/ -+ -+ for (i = 0; i < DBGPORT_CHK_NUM; i++) { -+ pr_debug("Dbg_port=((0x%x))\n", -+ atd_t->dbg_port_table[i]); -+ pr_debug("Val{pre, curr}={0x%x, 0x%x}\n", -+ atd_t->dbg_port_val[i], curr_dbg_port_val[i]); -+ -+ if (atd_t->dbg_port_table[i] == 0) { -+ if (atd_t->dbg_port_val[i] == -+ curr_dbg_port_val[i]) { -+ pr_debug("BB state hang\n"); -+ pr_debug("ReasonCode:\n"); -+ } -+ -+ } else if (atd_t->dbg_port_table[i] == 0x803) { -+ if (atd_t->dbg_port_val[i] == -+ curr_dbg_port_val[i]) { -+ /* dbgport_803 = */ -+ /* (struct n_dbgport_803 ) */ -+ /* (atd_t->dbg_port_val[i]); */ -+ odm_move_memory(dm, &dbgport_803, -+ &atd_t->dbg_port_val[i], -+ sizeof(struct n_dbgport_803)); -+ pr_debug("RSTB{BB, GLB, OFDM}={%d, %d,%d}\n", -+ dbgport_803.bb_rst_b, -+ dbgport_803.glb_rst_b, -+ dbgport_803.ofdm_rst_b); -+ pr_debug("{ofdm_tx_en, cck_tx_en, phy_tx_on}={%d, %d, %d}\n", -+ dbgport_803.ofdm_tx_en, -+ dbgport_803.cck_tx_en, -+ dbgport_803.phy_tx_on); -+ pr_debug("CCA_PP{OFDM, CCK}={%d, %d}\n", -+ dbgport_803.ofdm_cca_pp, -+ dbgport_803.cck_cca_pp); -+ -+ if (dbgport_803.phy_tx_on) -+ pr_debug("Maybe TX Hang\n"); -+ else if (dbgport_803.ofdm_cca_pp || -+ dbgport_803.cck_cca_pp) -+ pr_debug("Maybe RX Hang\n"); -+ } -+ -+ } else if (atd_t->dbg_port_table[i] == 0x208) { -+ if ((atd_t->dbg_port_val[i] & BIT(30)) && -+ (curr_dbg_port_val[i] & BIT(30))) { -+ pr_debug("EDCCA Pause TX\n"); -+ pr_debug("ReasonCode: THN-2\n"); -+ } -+ -+ } else if (atd_t->dbg_port_table[i] == 0xab0) { -+ /* atd_t->dbg_port_val[i] & 0xffffff == 0 */ -+ /* curr_dbg_port_val[i] & 0xffffff == 0 */ -+ if (((atd_t->dbg_port_val[i] & -+ MASK24BITS) == 0) || -+ ((curr_dbg_port_val[i] & -+ MASK24BITS) == 0)) { -+ pr_debug("Wrong L-SIG formate\n"); -+ pr_debug("ReasonCode: THN-1\n"); -+ } -+ } -+ } -+ -+ phydm_check_hang_reset(dm); -+ } -+ -+ atd_t->dbg_step++; -+} -+ -+void phydm_bb_auto_check_hang_start_n( -+ void *dm_void, -+ u32 *_used, -+ char *output, -+ u32 *_out_len) -+{ -+ u32 value32 = 0; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ return; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "PHYDM auto check hang (N-series) is started, Please check the system log\n"); -+ -+ dm->debug_components |= ODM_COMP_API; -+ atd_t->auto_dbg_type = AUTO_DBG_CHECK_HANG; -+ atd_t->dbg_step = 0; -+ -+ phydm_pause_dm_watchdog(dm, PHYDM_PAUSE); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_dbg_port_dump_n(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ u32 value32 = 0; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ return; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "not support now\n"); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#endif -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT == 1) -+void phydm_dbg_port_dump_ac(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ u32 value32 = 0; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) -+ return; -+ -+ value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "rptreg of sc/bw/ht/...", value32); -+ -+ if (dm->support_ic_type & ODM_RTL8822B) -+ odm_set_bb_reg(dm, R_0x198c, BIT(2) | BIT(1) | BIT(0), 7); -+ -+ /* dbg_port = basic state machine */ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x000); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "basic state machine", value32); -+ } -+ -+ /* dbg_port = state machine */ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x007); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "state machine", value32); -+ } -+ -+ /* dbg_port = CCA-related*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x204); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "CCA-related", value32); -+ } -+ -+ /* dbg_port = edcca/rxd*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x278); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "edcca/rxd", value32); -+ } -+ -+ /* dbg_port = rx_state/mux_state/ADC_MASK_OFDM*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x290); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", -+ "rx_state/mux_state/ADC_MASK_OFDM", value32); -+ } -+ -+ /* dbg_port = bf-related*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x2B2); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "bf-related", value32); -+ } -+ -+ /* dbg_port = bf-related*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x2B8); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "bf-related", value32); -+ } -+ -+ /* dbg_port = txon/rxd*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA03); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "txon/rxd", value32); -+ } -+ -+ /* dbg_port = l_rate/l_length*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA0B); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "l_rate/l_length", value32); -+ } -+ -+ /* dbg_port = rxd/rxd_hit*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA0D); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "rxd/rxd_hit", value32); -+ } -+ -+ /* dbg_port = dis_cca*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAA0); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "dis_cca", value32); -+ } -+ -+ /* dbg_port = tx*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAB0); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "tx", value32); -+ } -+ -+ /* dbg_port = rx plcp*/ -+ { -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD0); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "rx plcp", value32); -+ -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD1); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "rx plcp", value32); -+ -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD2); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "rx plcp", value32); -+ -+ odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD3); -+ value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "0x8fc", value32); -+ -+ value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = 0x%x", "rx plcp", value32); -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+void phydm_dbg_port_dump_jgr3(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ /*u32 dbg_port_idx_all[3] = {0x000, 0x001, 0x002};*/ -+ u32 val = 0; -+ u32 dbg_port_idx = 0; -+ u32 i = 0; -+ -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) -+ return; -+ -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "%-17s = %s\n", "DbgPort index", "Value"); -+ -+#if 0 -+ /*0x000/0x001/0x002*/ -+ for (i = 0; i < 3; i++) { -+ dbg_port_idx = dbg_port_idx_all[i]; -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port_idx)) { -+ val = phydm_get_bb_dbg_port_val(dm); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "0x%-15x = 0x%x\n", dbg_port_idx, val); -+ phydm_release_bb_dbg_port(dm); -+ } -+ } -+#endif -+ for (dbg_port_idx = 0x0; dbg_port_idx <= 0xfff; dbg_port_idx++) { -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port_idx)) { -+ val = phydm_get_bb_dbg_port_val(dm); -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, -+ "0x%-15x = 0x%x\n", dbg_port_idx, val); -+ phydm_release_bb_dbg_port(dm); -+ } -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -+ -+void phydm_dbg_port_dump(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "------ BB debug port start ------\n"); -+ -+ switch (dm->ic_ip_series) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ case PHYDM_IC_JGR3: -+ phydm_dbg_port_dump_jgr3(dm, &used, output, &out_len); -+ break; -+ #endif -+ -+ #if (ODM_IC_11AC_SERIES_SUPPORT == 1) -+ case PHYDM_IC_AC: -+ phydm_dbg_port_dump_ac(dm, &used, output, &out_len); -+ break; -+ #endif -+ -+ #if (ODM_IC_11N_SERIES_SUPPORT == 1) -+ case PHYDM_IC_N: -+ phydm_dbg_port_dump_n(dm, &used, output, &out_len); -+ break; -+ #endif -+ -+ default: -+ break; -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_auto_dbg_console( -+ void *dm_void, -+ char input[][16], -+ u32 *_used, -+ char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "hang: {1} {1:Show DbgPort, 2:Auto check hang}\n"); -+ return; -+ } else if (var1[0] == 1) { -+ PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]); -+ if (var1[1] == 1) { -+ phydm_dbg_port_dump(dm, &used, output, &out_len); -+ } else if (var1[1] == 2) { -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "Not support\n"); -+ } else { -+ #if (ODM_IC_11N_SERIES_SUPPORT == 1) -+ phydm_bb_auto_check_hang_start_n(dm, &used, -+ output, -+ &out_len); -+ #else -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "Not support\n"); -+ #endif -+ } -+ } -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_auto_dbg_engine(void *dm_void) -+{ -+ u32 value32 = 0; -+ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; -+ -+ if (atd_t->auto_dbg_type == AUTO_DBG_STOP) -+ return; -+ -+ pr_debug("%s ======>\n", __func__); -+ -+ if (atd_t->auto_dbg_type == AUTO_DBG_CHECK_HANG) { -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ pr_debug("Not Support\n"); -+ } else { -+ #if (ODM_IC_11N_SERIES_SUPPORT == 1) -+ phydm_auto_check_hang_engine_n(dm); -+ #else -+ pr_debug("Not Support\n"); -+ #endif -+ } -+ -+ } else if (atd_t->auto_dbg_type == AUTO_DBG_CHECK_RA) { -+ pr_debug("Not Support\n"); -+ } -+} -+ -+void phydm_auto_dbg_engine_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table; -+ u16 dbg_port_table[DBGPORT_CHK_NUM] = {0x0, 0x803, 0x208, 0xab0, -+ 0xab1, 0xab2}; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__); -+ -+ odm_move_memory(dm, &atd_t->dbg_port_table[0], -+ &dbg_port_table[0], (DBGPORT_CHK_NUM * 2)); -+ -+ phydm_check_hang_init(dm); -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_auto_dbg.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_auto_dbg.h -new file mode 100644 -index 000000000000..78bde627f83c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_auto_dbg.h -@@ -0,0 +1,115 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_AUTO_DBG_H__ -+#define __PHYDM_AUTO_DBG_H__ -+ -+#define AUTO_DBG_VERSION "1.0" /* @2017.05.015 Dino, Add phydm_auto_dbg.h*/ -+ -+/* @1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+ -+#define AUTO_CHK_HANG_STEP_MAX 3 -+#define DBGPORT_CHK_NUM 6 -+ -+#ifdef PHYDM_AUTO_DEGBUG -+ -+/* @1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ */ -+ -+enum auto_dbg_type_e { -+ AUTO_DBG_STOP = 0, -+ AUTO_DBG_CHECK_HANG = 1, -+ AUTO_DBG_CHECK_RA = 2, -+ AUTO_DBG_CHECK_DIG = 3 -+}; -+ -+/* @1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+ -+struct n_dbgport_803 { -+ /*@BYTE 3*/ -+ u8 bb_rst_b : 1; -+ u8 glb_rst_b : 1; -+ u8 zero_1bit_1 : 1; -+ u8 ofdm_rst_b : 1; -+ u8 cck_txpe : 1; -+ u8 ofdm_txpe : 1; -+ u8 phy_tx_on : 1; -+ u8 tdrdy : 1; -+ /*@BYTE 2*/ -+ u8 txd : 8; -+ /*@BYTE 1*/ -+ u8 cck_cca_pp : 1; -+ u8 ofdm_cca_pp : 1; -+ u8 rx_rst : 1; -+ u8 rdrdy : 1; -+ u8 rxd_7_4 : 4; -+ /*@BYTE 0*/ -+ u8 rxd_3_0 : 4; -+ u8 ofdm_tx_en : 1; -+ u8 cck_tx_en : 1; -+ u8 zero_1bit_2 : 1; -+ u8 clk_80m : 1; -+}; -+ -+struct phydm_auto_dbg_struct { -+ enum auto_dbg_type_e auto_dbg_type; -+ u8 dbg_step; -+ u16 dbg_port_table[DBGPORT_CHK_NUM]; -+ u32 dbg_port_val[DBGPORT_CHK_NUM]; -+ u16 ofdm_t_cnt; -+ u16 ofdm_r_cnt; -+ u16 cck_t_cnt; -+ u16 cck_r_cnt; -+ u16 ofdm_crc_error_cnt; -+ u16 cck_crc_error_cnt; -+}; -+ -+/* @1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ */ -+ -+void phydm_dbg_port_dump(void *dm_void, u32 *used, char *output, u32 *out_len); -+ -+void phydm_auto_dbg_console( -+ void *dm_void, -+ char input[][16], -+ u32 *_used, -+ char *output, -+ u32 *_out_len); -+ -+void phydm_auto_dbg_engine(void *dm_void); -+ -+void phydm_auto_dbg_engine_init(void *dm_void); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_beamforming.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_beamforming.c -new file mode 100644 -index 000000000000..1c055c8b9fb8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_beamforming.c -@@ -0,0 +1,1989 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #if WPP_SOFTWARE_TRACE -+ #include "phydm_beamforming.tmh" -+ #endif -+#endif -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ -+void phydm_get_txbf_device_num( -+ void *dm_void, -+ u8 macid) -+{ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*@For BDC*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; -+ struct bf_cmn_info *bf = NULL; -+ struct _BF_DIV_COEX_ *dm_bdc_table = &dm->dm_bdc_table; -+ u8 act_as_bfer = 0; -+ u8 act_as_bfee = 0; -+ -+ if (!(dm->support_ability & ODM_BB_ANT_DIV)) -+ return; -+ -+ if (is_sta_active(sta)) { -+ bf = &(sta->bf_info); -+ } else { -+ PHYDM_DBG(dm, DBG_TXBF, "[Warning] %s invalid sta_info\n", -+ __func__); -+ return; -+ } -+ -+ if (sta->support_wireless_set & WIRELESS_VHT) { -+ if (bf->vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMEE_ENABLE) -+ act_as_bfer = 1; -+ -+ if (bf->vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMER_ENABLE) -+ act_as_bfee = 1; -+ -+ } else if (sta->support_wireless_set & WIRELESS_HT) { -+ if (bf->ht_beamform_cap & BEAMFORMING_HT_BEAMFORMEE_ENABLE) -+ act_as_bfer = 1; -+ -+ if (bf->ht_beamform_cap & BEAMFORMING_HT_BEAMFORMER_ENABLE) -+ act_as_bfee = 1; -+ } -+ -+ if (act_as_bfer) -+ { /* Our Device act as BFer */ -+ dm_bdc_table->w_bfee_client[macid] = true; -+ dm_bdc_table->num_txbfee_client++; -+ } -+ else -+ dm_bdc_table->w_bfee_client[macid] = false; -+ -+ if (act_as_bfee) -+ { /* Our Device act as BFee */ -+ dm_bdc_table->w_bfer_client[macid] = true; -+ dm_bdc_table->num_txbfer_client++; -+ } -+ else -+ dm_bdc_table->w_bfer_client[macid] = false; -+ -+#endif -+#endif -+} -+ -+struct _RT_BEAMFORM_STAINFO * -+phydm_sta_info_init(struct dm_struct *dm, u16 sta_idx, u8 *my_mac_addr) -+{ -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORM_STAINFO *entry = &beam_info->beamform_sta_info; -+ struct cmn_sta_info *cmn_sta = dm->phydm_sta_info[sta_idx]; -+ //void *adapter = dm->adapter; -+ ADAPTER * adapter = dm->adapter; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PMGNT_INFO p_MgntInfo = &((adapter)->MgntInfo); -+ PRT_HIGH_THROUGHPUT p_ht_info = GET_HT_INFO(p_MgntInfo); -+ PRT_VERY_HIGH_THROUGHPUT p_vht_info = GET_VHT_INFO(p_MgntInfo); -+#endif -+ -+ if (!is_sta_active(cmn_sta)) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s => sta_info(mac_id:%d) failed\n", -+ __func__, sta_idx); -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ rtw_warn_on(1); -+ #endif -+ -+ return entry; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ /*odm_move_memory(dm, (PVOID)(entry->my_mac_addr),*/ -+ /*(PVOID)(adapter->CurrentAddress), 6);*/ -+ odm_move_memory(dm, entry->my_mac_addr, my_mac_addr, 6); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ /*odm_move_memory(dm, entry->my_mac_addr,*/ -+ /*adapter_mac_addr(sta->padapter), 6);*/ -+ odm_move_memory(dm, entry->my_mac_addr, my_mac_addr, 6); -+#endif -+ -+ entry->aid = cmn_sta->aid; -+ entry->ra = cmn_sta->mac_addr; -+ entry->mac_id = cmn_sta->mac_id; -+ entry->bw = cmn_sta->bw_mode; -+ entry->cur_beamform = cmn_sta->bf_info.ht_beamform_cap; -+ entry->ht_beamform_cap = cmn_sta->bf_info.ht_beamform_cap; -+ -+#if ODM_IC_11AC_SERIES_SUPPORT -+ if (cmn_sta->support_wireless_set & WIRELESS_VHT) { -+ entry->cur_beamform_vht = cmn_sta->bf_info.vht_beamform_cap; -+ entry->vht_beamform_cap = cmn_sta->bf_info.vht_beamform_cap; -+ } -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*To Be Removed */ -+ entry->ht_beamform_cap = p_ht_info->HtBeamformCap; /*To Be Removed*/ -+ entry->vht_beamform_cap = p_vht_info->VhtBeamformCap; /*To Be Removed*/ -+ -+ if (sta_idx == 0) { /*@client mode*/ -+ #if ODM_IC_11AC_SERIES_SUPPORT -+ if (cmn_sta->support_wireless_set & WIRELESS_VHT) -+ entry->cur_beamform_vht = p_vht_info->VhtCurBeamform; -+ #endif -+ } -+#endif -+ -+ PHYDM_DBG(dm, DBG_TXBF, "wireless_set = 0x%x, staidx = %d\n", -+ cmn_sta->support_wireless_set, sta_idx); -+ PHYDM_DBG(dm, DBG_TXBF, -+ "entry->cur_beamform = 0x%x, entry->cur_beamform_vht = 0x%x\n", -+ entry->cur_beamform, entry->cur_beamform_vht); -+ return entry; -+} -+void phydm_sta_info_update( -+ struct dm_struct *dm, -+ u16 sta_idx, -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry) -+{ -+ struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; -+ -+ if (!is_sta_active(sta)) -+ return; -+ -+ sta->bf_info.p_aid = beamform_entry->p_aid; -+ sta->bf_info.g_id = beamform_entry->g_id; -+} -+ -+struct _RT_BEAMFORMEE_ENTRY * -+phydm_beamforming_get_bfee_entry_by_addr( -+ void *dm_void, -+ u8 *RA, -+ u8 *idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ if (beam_info->beamformee_entry[i].is_used && (eq_mac_addr(RA, beam_info->beamformee_entry[i].mac_addr))) { -+ *idx = i; -+ return &beam_info->beamformee_entry[i]; -+ } -+ } -+ -+ return NULL; -+} -+ -+struct _RT_BEAMFORMER_ENTRY * -+phydm_beamforming_get_bfer_entry_by_addr( -+ void *dm_void, -+ u8 *TA, -+ u8 *idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { -+ if (beam_info->beamformer_entry[i].is_used && (eq_mac_addr(TA, beam_info->beamformer_entry[i].mac_addr))) { -+ *idx = i; -+ return &beam_info->beamformer_entry[i]; -+ } -+ } -+ -+ return NULL; -+} -+ -+struct _RT_BEAMFORMEE_ENTRY * -+phydm_beamforming_get_entry_by_mac_id( -+ void *dm_void, -+ u8 mac_id, -+ u8 *idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ if (beam_info->beamformee_entry[i].is_used && mac_id == beam_info->beamformee_entry[i].mac_id) { -+ *idx = i; -+ return &beam_info->beamformee_entry[i]; -+ } -+ } -+ -+ return NULL; -+} -+ -+enum beamforming_cap -+phydm_beamforming_get_entry_beam_cap_by_mac_id( -+ void *dm_void, -+ u8 mac_id) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ enum beamforming_cap beamform_entry_cap = BEAMFORMING_CAP_NONE; -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ if (beam_info->beamformee_entry[i].is_used && mac_id == beam_info->beamformee_entry[i].mac_id) { -+ beamform_entry_cap = beam_info->beamformee_entry[i].beamform_entry_cap; -+ i = BEAMFORMEE_ENTRY_NUM; -+ } -+ } -+ -+ return beamform_entry_cap; -+} -+ -+struct _RT_BEAMFORMEE_ENTRY * -+phydm_beamforming_get_free_bfee_entry( -+ void *dm_void, -+ u8 *idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ if (beam_info->beamformee_entry[i].is_used == false) { -+ *idx = i; -+ return &beam_info->beamformee_entry[i]; -+ } -+ } -+ return NULL; -+} -+ -+struct _RT_BEAMFORMER_ENTRY * -+phydm_beamforming_get_free_bfer_entry( -+ void *dm_void, -+ u8 *idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s ===>\n", __func__); -+ -+ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { -+ if (beam_info->beamformer_entry[i].is_used == false) { -+ *idx = i; -+ return &beam_info->beamformer_entry[i]; -+ } -+ } -+ return NULL; -+} -+ -+/*@ -+ * Description: Get the first entry index of MU Beamformee. -+ * -+ * Return value: index of the first MU sta. -+ * -+ * 2015.05.25. Created by tynli. -+ * -+ */ -+u8 phydm_beamforming_get_first_mu_bfee_entry_idx( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 idx = 0xFF; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ boolean is_found = false; -+ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ if (beam_info->beamformee_entry[idx].is_used && beam_info->beamformee_entry[idx].is_mu_sta) { -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] idx=%d!\n", __func__, -+ idx); -+ is_found = true; -+ break; -+ } -+ } -+ -+ if (!is_found) -+ idx = 0xFF; -+ -+ return idx; -+} -+ -+/*@Add SU BFee and MU BFee*/ -+struct _RT_BEAMFORMEE_ENTRY * -+beamforming_add_bfee_entry( -+ void *dm_void, -+ struct _RT_BEAMFORM_STAINFO *sta, -+ enum beamforming_cap beamform_cap, -+ u8 num_of_sounding_dim, -+ u8 comp_steering_num_of_bfer, -+ u8 *idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMEE_ENTRY *entry = phydm_beamforming_get_free_bfee_entry(dm, idx); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ if (entry != NULL) { -+ entry->is_used = true; -+ entry->aid = sta->aid; -+ entry->mac_id = sta->mac_id; -+ entry->sound_bw = sta->bw; -+ odm_move_memory(dm, entry->my_mac_addr, sta->my_mac_addr, 6); -+ -+ if (phydm_acting_determine(dm, phydm_acting_as_ap)) { -+ /*@BSSID[44:47] xor BSSID[40:43]*/ -+ u16 bssid = ((sta->my_mac_addr[5] & 0xf0) >> 4) ^ (sta->my_mac_addr[5] & 0xf); -+ /*@(dec(A) + dec(B)*32) mod 512*/ -+ entry->p_aid = (sta->aid + bssid * 32) & 0x1ff; -+ entry->g_id = 63; -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s: BFee P_AID addressed to STA=%d\n", -+ __func__, entry->p_aid); -+ } else if (phydm_acting_determine(dm, phydm_acting_as_ibss)) { -+ /*@ad hoc mode*/ -+ entry->p_aid = 0; -+ entry->g_id = 63; -+ PHYDM_DBG(dm, DBG_TXBF, "%s: BFee P_AID as IBSS=%d\n", -+ __func__, entry->p_aid); -+ } else { -+ /*@client mode*/ -+ entry->p_aid = sta->ra[5]; -+ /*@BSSID[39:47]*/ -+ entry->p_aid = (entry->p_aid << 1) | (sta->ra[4] >> 7); -+ entry->g_id = 0; -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s: BFee P_AID addressed to AP=0x%X\n", -+ __func__, entry->p_aid); -+ } -+ cp_mac_addr(entry->mac_addr, sta->ra); -+ entry->is_txbf = false; -+ entry->is_sound = false; -+ entry->sound_period = 400; -+ entry->beamform_entry_cap = beamform_cap; -+ entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ -+ /* @entry->log_seq = 0xff; Move to beamforming_add_bfer_entry*/ -+ /* @entry->log_retry_cnt = 0; Move to beamforming_add_bfer_entry*/ -+ /* @entry->LogSuccessCnt = 0; Move to beamforming_add_bfer_entry*/ -+ -+ entry->log_status_fail_cnt = 0; -+ -+ entry->num_of_sounding_dim = num_of_sounding_dim; -+ entry->comp_steering_num_of_bfer = comp_steering_num_of_bfer; -+ -+ if (beamform_cap & BEAMFORMER_CAP_VHT_MU) { -+ dm->beamforming_info.beamformee_mu_cnt += 1; -+ entry->is_mu_sta = true; -+ dm->beamforming_info.first_mu_bfee_index = phydm_beamforming_get_first_mu_bfee_entry_idx(dm); -+ } else if (beamform_cap & (BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP_HT_EXPLICIT)) { -+ dm->beamforming_info.beamformee_su_cnt += 1; -+ entry->is_mu_sta = false; -+ } -+ -+ return entry; -+ } else -+ return NULL; -+} -+ -+/*@Add SU BFee and MU BFer*/ -+struct _RT_BEAMFORMER_ENTRY * -+beamforming_add_bfer_entry( -+ void *dm_void, -+ struct _RT_BEAMFORM_STAINFO *sta, -+ enum beamforming_cap beamform_cap, -+ u8 num_of_sounding_dim, -+ u8 *idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMER_ENTRY *entry = phydm_beamforming_get_free_bfer_entry(dm, idx); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ if (entry != NULL) { -+ entry->is_used = true; -+ odm_move_memory(dm, entry->my_mac_addr, sta->my_mac_addr, 6); -+ if (phydm_acting_determine(dm, phydm_acting_as_ap)) { -+ /*@BSSID[44:47] xor BSSID[40:43]*/ -+ u16 bssid = ((sta->my_mac_addr[5] & 0xf0) >> 4) ^ (sta->my_mac_addr[5] & 0xf); -+ -+ entry->p_aid = (sta->aid + bssid * 32) & 0x1ff; -+ entry->g_id = 63; -+ /*@(dec(A) + dec(B)*32) mod 512*/ -+ } else if (phydm_acting_determine(dm, phydm_acting_as_ibss)) { -+ entry->p_aid = 0; -+ entry->g_id = 63; -+ } else { -+ entry->p_aid = sta->ra[5]; -+ /*@BSSID[39:47]*/ -+ entry->p_aid = (entry->p_aid << 1) | (sta->ra[4] >> 7); -+ entry->g_id = 0; -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s: P_AID addressed to AP=0x%X\n", __func__, -+ entry->p_aid); -+ } -+ -+ cp_mac_addr(entry->mac_addr, sta->ra); -+ entry->beamform_entry_cap = beamform_cap; -+ -+ entry->pre_log_seq = 0; /*@Modified by Jeffery @2015-04-13*/ -+ entry->log_seq = 0; /*@Modified by Jeffery @2014-10-29*/ -+ entry->log_retry_cnt = 0; /*@Modified by Jeffery @2014-10-29*/ -+ entry->log_success = 0; /*@log_success is NOT needed to be accumulated, so LogSuccessCnt->log_success, 2015-04-13, Jeffery*/ -+ entry->clock_reset_times = 0; /*@Modified by Jeffery @2015-04-13*/ -+ -+ entry->num_of_sounding_dim = num_of_sounding_dim; -+ -+ if (beamform_cap & BEAMFORMEE_CAP_VHT_MU) { -+ dm->beamforming_info.beamformer_mu_cnt += 1; -+ entry->is_mu_ap = true; -+ entry->aid = sta->aid; -+ } else if (beamform_cap & (BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP_HT_EXPLICIT)) { -+ dm->beamforming_info.beamformer_su_cnt += 1; -+ entry->is_mu_ap = false; -+ } -+ -+ return entry; -+ } else -+ return NULL; -+} -+ -+/* Used for beamforming_start_v1 */ -+void phydm_beamforming_ndpa_rate( -+ void *dm_void, -+ enum channel_width BW, -+ u8 rate) -+{ -+ u16 ndpa_rate = rate; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ if (ndpa_rate == 0) { -+ if (dm->rssi_min > 30) /* @link RSSI > 30% */ -+ ndpa_rate = ODM_RATE24M; -+ else -+ ndpa_rate = ODM_RATE6M; -+ } -+ -+ if (ndpa_rate < ODM_RATEMCS0) -+ BW = (enum channel_width)CHANNEL_WIDTH_20; -+ -+ ndpa_rate = (ndpa_rate << 8) | BW; -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_RATE, (u8 *)&ndpa_rate); -+} -+ -+/* Used for beamforming_start_sw and beamforming_start_fw */ -+void phydm_beamforming_dym_ndpa_rate( -+ void *dm_void) -+{ -+ u16 ndpa_rate = ODM_RATE6M, BW; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ ndpa_rate = ODM_RATE6M; -+ BW = CHANNEL_WIDTH_20; -+ -+ ndpa_rate = ndpa_rate << 8 | BW; -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_RATE, (u8 *)&ndpa_rate); -+ PHYDM_DBG(dm, DBG_TXBF, "%s End, NDPA rate = 0x%X\n", __func__, -+ ndpa_rate); -+} -+ -+/*@ -+* SW Sounding : SW Timer unit 1ms -+* HW Timer unit (1/32000) s 32k is clock. -+* FW Sounding : FW Timer unit 10ms -+*/ -+void beamforming_dym_period( -+ void *dm_void, -+ u8 status) -+{ -+ u8 idx; -+ boolean is_change_period = false; -+ u16 sound_period_sw, sound_period_fw; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; -+ -+ struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx]; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ /* @3 TODO per-client throughput caculation. */ -+ -+ if ((*dm->current_tx_tp + *dm->current_rx_tp > 2) && (entry->log_status_fail_cnt <= 20 || status)) { -+ sound_period_sw = 40; /* @40ms */ -+ sound_period_fw = 40; /* @From H2C cmd, unit = 10ms */ -+ } else { -+ sound_period_sw = 4000; /* @4s */ -+ sound_period_fw = 400; -+ } -+ PHYDM_DBG(dm, DBG_TXBF, "[%s]sound_period_sw=%d, sound_period_fw=%d\n", -+ __func__, sound_period_sw, sound_period_fw); -+ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ beamform_entry = beam_info->beamformee_entry + idx; -+ -+ if (beamform_entry->default_csi_cnt > 20) { -+ /*@Modified by David*/ -+ sound_period_sw = 4000; -+ sound_period_fw = 400; -+ } -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] period = %d\n", __func__, -+ sound_period_sw); -+ if ((beamform_entry->beamform_entry_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) == 0) -+ continue; -+ -+ if (sound_info->sound_mode == SOUNDING_FW_VHT_TIMER || sound_info->sound_mode == SOUNDING_FW_HT_TIMER) { -+ if (beamform_entry->sound_period != sound_period_fw) { -+ beamform_entry->sound_period = sound_period_fw; -+ is_change_period = true; /*Only FW sounding need to send H2C packet to change sound period. */ -+ } -+ } else if (beamform_entry->sound_period != sound_period_sw) -+ beamform_entry->sound_period = sound_period_sw; -+ } -+ -+ if (is_change_period) -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx); -+} -+ -+boolean -+beamforming_send_ht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ enum channel_width BW, -+ u8 q_idx) -+{ -+ boolean ret = true; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (q_idx == BEACON_QUEUE) -+ ret = send_fw_ht_ndpa_packet(dm, RA, BW); -+ else -+ ret = send_sw_ht_ndpa_packet(dm, RA, BW); -+ -+ return ret; -+} -+ -+boolean -+beamforming_send_vht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ u16 AID, -+ enum channel_width BW, -+ u8 q_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ boolean ret = true; -+ -+ hal_com_txbf_set(dm, TXBF_SET_GET_TX_RATE, NULL); -+ -+ if (beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7 && beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9 && !beam_info->snding3ss) -+ PHYDM_DBG(dm, DBG_TXBF, "@%s: 3SS VHT 789 don't sounding\n", -+ __func__); -+ -+ else { -+ if (q_idx == BEACON_QUEUE) /* Send to reserved page => FW NDPA */ -+ ret = send_fw_vht_ndpa_packet(dm, RA, AID, BW); -+ else { -+#ifdef SUPPORT_MU_BF -+#if (SUPPORT_MU_BF == 1) -+ beam_info->is_mu_sounding = true; -+ ret = send_sw_vht_mu_ndpa_packet(dm, BW); -+#else -+ beam_info->is_mu_sounding = false; -+ ret = send_sw_vht_ndpa_packet(dm, RA, AID, BW); -+#endif -+#else -+ beam_info->is_mu_sounding = false; -+ ret = send_sw_vht_ndpa_packet(dm, RA, AID, BW); -+#endif -+ } -+ } -+ return ret; -+} -+ -+enum beamforming_notify_state -+phydm_beamfomring_is_sounding( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beam_info, -+ u8 *idx) -+{ -+ enum beamforming_notify_state is_sounding = BEAMFORMING_NOTIFY_NONE; -+ struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ /*@if(( Beamforming_GetBeamCap(beam_info) & BEAMFORMER_CAP) == 0)*/ -+ /*@is_sounding = BEAMFORMING_NOTIFY_RESET;*/ -+ if (beam_oid_info.sound_oid_mode == sounding_stop_all_timer) { -+ is_sounding = BEAMFORMING_NOTIFY_RESET; -+ goto out; -+ } -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "@%s: BFee Entry %d is_used=%d, is_sound=%d\n", -+ __func__, i, beam_info->beamformee_entry[i].is_used, -+ beam_info->beamformee_entry[i].is_sound); -+ if (beam_info->beamformee_entry[i].is_used && !beam_info->beamformee_entry[i].is_sound) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s: Add BFee entry %d\n", -+ __func__, i); -+ *idx = i; -+ if (beam_info->beamformee_entry[i].is_mu_sta) -+ is_sounding = BEAMFORMEE_NOTIFY_ADD_MU; -+ else -+ is_sounding = BEAMFORMEE_NOTIFY_ADD_SU; -+ } -+ -+ if (!beam_info->beamformee_entry[i].is_used && beam_info->beamformee_entry[i].is_sound) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s: Delete BFee entry %d\n", -+ __func__, i); -+ *idx = i; -+ if (beam_info->beamformee_entry[i].is_mu_sta) -+ is_sounding = BEAMFORMEE_NOTIFY_DELETE_MU; -+ else -+ is_sounding = BEAMFORMEE_NOTIFY_DELETE_SU; -+ } -+ } -+ -+out: -+ PHYDM_DBG(dm, DBG_TXBF, "%s End, is_sounding = %d\n", __func__, -+ is_sounding); -+ return is_sounding; -+} -+ -+/* This function is unused */ -+u8 phydm_beamforming_sounding_idx( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beam_info) -+{ -+ u8 idx = 0; -+ struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ if (beam_oid_info.sound_oid_mode == SOUNDING_SW_HT_TIMER || beam_oid_info.sound_oid_mode == SOUNDING_SW_VHT_TIMER || -+ beam_oid_info.sound_oid_mode == SOUNDING_HW_HT_TIMER || beam_oid_info.sound_oid_mode == SOUNDING_HW_VHT_TIMER) -+ idx = beam_oid_info.sound_oid_idx; -+ else { -+ u8 i; -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ if (beam_info->beamformee_entry[i].is_used && !beam_info->beamformee_entry[i].is_sound) { -+ idx = i; -+ break; -+ } -+ } -+ } -+ -+ return idx; -+} -+ -+enum sounding_mode -+phydm_beamforming_sounding_mode( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beam_info, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 support_interface = dm->support_interface; -+ -+ struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx]; -+ struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; -+ enum sounding_mode mode = beam_oid_info.sound_oid_mode; -+ -+ if (beam_oid_info.sound_oid_mode == SOUNDING_SW_VHT_TIMER || beam_oid_info.sound_oid_mode == SOUNDING_HW_VHT_TIMER) { -+ if (beam_entry.beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) -+ mode = beam_oid_info.sound_oid_mode; -+ else -+ mode = sounding_stop_all_timer; -+ } else if (beam_oid_info.sound_oid_mode == SOUNDING_SW_HT_TIMER || beam_oid_info.sound_oid_mode == SOUNDING_HW_HT_TIMER) { -+ if (beam_entry.beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) -+ mode = beam_oid_info.sound_oid_mode; -+ else -+ mode = sounding_stop_all_timer; -+ } else if (beam_entry.beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) { -+ if (support_interface == ODM_ITRF_USB && !(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))) -+ mode = SOUNDING_FW_VHT_TIMER; -+ else -+ mode = SOUNDING_SW_VHT_TIMER; -+ } else if (beam_entry.beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) { -+ if (support_interface == ODM_ITRF_USB && !(dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))) -+ mode = SOUNDING_FW_HT_TIMER; -+ else -+ mode = SOUNDING_SW_HT_TIMER; -+ } else -+ mode = sounding_stop_all_timer; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] support_interface=%d, mode=%d\n", -+ __func__, support_interface, mode); -+ -+ return mode; -+} -+ -+u16 phydm_beamforming_sounding_time( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beam_info, -+ enum sounding_mode mode, -+ u8 idx) -+{ -+ u16 sounding_time = 0xffff; -+ struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx]; -+ struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ if (mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_HW_VHT_TIMER) -+ sounding_time = beam_oid_info.sound_oid_period * 32; -+ else if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_SW_VHT_TIMER) -+ /*@Modified by David*/ -+ sounding_time = beam_entry.sound_period; /*@beam_oid_info.sound_oid_period;*/ -+ else -+ sounding_time = beam_entry.sound_period; -+ -+ return sounding_time; -+} -+ -+enum channel_width -+phydm_beamforming_sounding_bw( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beam_info, -+ enum sounding_mode mode, -+ u8 idx) -+{ -+ enum channel_width sounding_bw = CHANNEL_WIDTH_20; -+ struct _RT_BEAMFORMEE_ENTRY beam_entry = beam_info->beamformee_entry[idx]; -+ struct _RT_BEAMFORMING_OID_INFO beam_oid_info = beam_info->beamforming_oid_info; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_HW_VHT_TIMER) -+ sounding_bw = beam_oid_info.sound_oid_bw; -+ else if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_SW_VHT_TIMER) -+ /*@Modified by David*/ -+ sounding_bw = beam_entry.sound_bw; /*@beam_oid_info.sound_oid_bw;*/ -+ else -+ sounding_bw = beam_entry.sound_bw; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s, sounding_bw=0x%X\n", __func__, -+ sounding_bw); -+ -+ return sounding_bw; -+} -+ -+boolean -+phydm_beamforming_select_beam_entry( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beam_info) -+{ -+ struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /*@entry.is_sound is different between first and latter NDPA, and should not be used as BFee entry selection*/ -+ /*@BTW, latter modification should sync to the selection mechanism of AP/ADSL instead of the fixed sound_idx.*/ -+ sound_info->sound_idx = phydm_beamforming_sounding_idx(dm, beam_info); -+ /*sound_info->sound_idx = 0;*/ -+ -+ if (sound_info->sound_idx < BEAMFORMEE_ENTRY_NUM) -+ sound_info->sound_mode = phydm_beamforming_sounding_mode(dm, beam_info, sound_info->sound_idx); -+ else -+ sound_info->sound_mode = sounding_stop_all_timer; -+ -+ if (sounding_stop_all_timer == sound_info->sound_mode) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] Return because of sounding_stop_all_timer\n", -+ __func__); -+ return false; -+ } else { -+ sound_info->sound_bw = phydm_beamforming_sounding_bw(dm, beam_info, sound_info->sound_mode, sound_info->sound_idx); -+ sound_info->sound_period = phydm_beamforming_sounding_time(dm, beam_info, sound_info->sound_mode, sound_info->sound_idx); -+ return true; -+ } -+} -+ -+/*SU BFee Entry Only*/ -+boolean -+phydm_beamforming_start_period( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean ret = true; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; -+ -+ phydm_beamforming_dym_ndpa_rate(dm); -+ -+ phydm_beamforming_select_beam_entry(dm, beam_info); /* @Modified */ -+ -+ if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER) -+ odm_set_timer(dm, &beam_info->beamforming_timer, sound_info->sound_period); -+ else if (sound_info->sound_mode == SOUNDING_HW_VHT_TIMER || sound_info->sound_mode == SOUNDING_HW_HT_TIMER || -+ sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER) { -+ HAL_HW_TIMER_TYPE timer_type = HAL_TIMER_TXBF; -+ u32 val = (sound_info->sound_period | (timer_type << 16)); -+ -+ /* @HW timer stop: All IC has the same setting */ -+ phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type)); -+ /* odm_write_1byte(dm, 0x15F, 0); */ -+ /* @HW timer init: All IC has the same setting, but 92E & 8812A only write 2 bytes */ -+ phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_INIT, (u8 *)(&val)); -+ /* odm_write_1byte(dm, 0x164, 1); */ -+ /* odm_write_4byte(dm, 0x15C, val); */ -+ /* @HW timer start: All IC has the same setting */ -+ phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_START, (u8 *)(&timer_type)); -+ /* odm_write_1byte(dm, 0x15F, 0x5); */ -+ } else if (sound_info->sound_mode == SOUNDING_FW_VHT_TIMER || sound_info->sound_mode == SOUNDING_FW_HT_TIMER) -+ ret = beamforming_start_fw(dm, sound_info->sound_idx); -+ else -+ ret = false; -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] sound_idx=%d, sound_mode=%d, sound_bw=%d, sound_period=%d\n", -+ __func__, sound_info->sound_idx, sound_info->sound_mode, -+ sound_info->sound_bw, sound_info->sound_period); -+ -+ return ret; -+} -+ -+/* Used after beamforming_leave, and will clear the setting of the "already deleted" entry -+ *SU BFee Entry Only*/ -+void phydm_beamforming_end_period_sw( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ /*void *adapter = dm->adapter;*/ -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; -+ -+ HAL_HW_TIMER_TYPE timer_type = HAL_TIMER_TXBF; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER) -+ odm_cancel_timer(dm, &beam_info->beamforming_timer); -+ else if (sound_info->sound_mode == SOUNDING_HW_VHT_TIMER || sound_info->sound_mode == SOUNDING_HW_HT_TIMER || -+ sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER) -+ /*@HW timer stop: All IC has the same setting*/ -+ phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type)); -+ /*odm_write_1byte(dm, 0x15F, 0);*/ -+} -+ -+void phydm_beamforming_end_period_fw( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 idx = 0; -+ -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s]\n", __func__); -+} -+ -+/*SU BFee Entry Only*/ -+void phydm_beamforming_clear_entry_sw( -+ void *dm_void, -+ boolean is_delete, -+ u8 delete_idx) -+{ -+ u8 idx = 0; -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ if (is_delete) { -+ if (delete_idx < BEAMFORMEE_ENTRY_NUM) { -+ beamform_entry = beam_info->beamformee_entry + delete_idx; -+ if (!(!beamform_entry->is_used && beamform_entry->is_sound)) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] SW delete_idx is wrong!!!!!\n", -+ __func__); -+ return; -+ } -+ } -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] SW delete BFee entry %d\n", -+ __func__, delete_idx); -+ if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) { -+ beamform_entry->is_beamforming_in_progress = false; -+ beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ } else if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&delete_idx); -+ } -+ beamform_entry->is_sound = false; -+ return; -+ } -+ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ beamform_entry = beam_info->beamformee_entry + idx; -+ -+ /*Used after is_sounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/ -+ /*This function is mainly used in case "beam_oid_info.sound_oid_mode == sounding_stop_all_timer".*/ -+ /*@However, setting oid doesn't delete entries (is_used is still true), new entries may fail to be added in.*/ -+ -+ if (!beamform_entry->is_sound) -+ continue; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] SW reset BFee entry %d\n", -+ __func__, idx); -+ /*@ -+ * If End procedure is -+ * 1. Between (Send NDPA, C2H packet return), reset state to initialized. -+ * After C2H packet return , status bit will be set to zero. -+ * -+ * 2. After C2H packet, then reset state to initialized and clear status bit. -+ */ -+ -+ if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ phydm_beamforming_end_sw(dm, 0); -+ else if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&idx); -+ } -+ -+ beamform_entry->is_sound = false; -+ } -+} -+ -+void phydm_beamforming_clear_entry_fw( -+ void *dm_void, -+ boolean is_delete, -+ u8 delete_idx) -+{ -+ u8 idx = 0; -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ if (is_delete) { -+ if (delete_idx < BEAMFORMEE_ENTRY_NUM) { -+ beamform_entry = beam_info->beamformee_entry + delete_idx; -+ -+ if (!(!beamform_entry->is_used && beamform_entry->is_sound)) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] FW delete_idx is wrong!!!!!\n", -+ __func__); -+ return; -+ } -+ } -+ PHYDM_DBG(dm, DBG_TXBF, "%s: FW delete BFee entry %d\n", -+ __func__, delete_idx); -+ beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_UNINITIALIZE; -+ beamform_entry->is_sound = false; -+ } else { -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ beamform_entry = beam_info->beamformee_entry + idx; -+ -+ /*Used after is_sounding=RESET, and will clear the setting of "ever sounded" entry, which is not necessarily be deleted.*/ -+ /*This function is mainly used in case "beam_oid_info.sound_oid_mode == sounding_stop_all_timer".*/ -+ /*@However, setting oid doesn't delete entries (is_used is still true), new entries may fail to be added in.*/ -+ -+ if (beamform_entry->is_sound) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s]FW reset BFee entry %d\n", -+ __func__, idx); -+ /*@ -+ * If End procedure is -+ * 1. Between (Send NDPA, C2H packet return), reset state to initialized. -+ * After C2H packet return , status bit will be set to zero. -+ * -+ * 2. After C2H packet, then reset state to initialized and clear status bit. -+ */ -+ -+ beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ beamform_entry->is_sound = false; -+ } -+ } -+ } -+} -+ -+/*@ -+* Called : -+* 1. Add and delete entry : beamforming_enter/beamforming_leave -+* 2. FW trigger : Beamforming_SetTxBFen -+* 3. Set OID_RT_BEAMFORMING_PERIOD : beamforming_control_v2 -+*/ -+void phydm_beamforming_notify( -+ void *dm_void) -+{ -+ u8 idx = BEAMFORMEE_ENTRY_NUM; -+ enum beamforming_notify_state is_sounding = BEAMFORMING_NOTIFY_NONE; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_SOUNDING_INFO *sound_info = &beam_info->sounding_info; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ is_sounding = phydm_beamfomring_is_sounding(dm, beam_info, &idx); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s, Before notify, is_sounding=%d, idx=%d\n", -+ __func__, is_sounding, idx); -+ PHYDM_DBG(dm, DBG_TXBF, "%s: beam_info->beamformee_su_cnt = %d\n", -+ __func__, beam_info->beamformee_su_cnt); -+ -+ switch (is_sounding) { -+ case BEAMFORMEE_NOTIFY_ADD_SU: -+ PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_ADD_SU\n", -+ __func__); -+ phydm_beamforming_start_period(dm); -+ break; -+ -+ case BEAMFORMEE_NOTIFY_DELETE_SU: -+ PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_DELETE_SU\n", -+ __func__); -+ if (sound_info->sound_mode == SOUNDING_FW_HT_TIMER || sound_info->sound_mode == SOUNDING_FW_VHT_TIMER) { -+ phydm_beamforming_clear_entry_fw(dm, true, idx); -+ if (beam_info->beamformee_su_cnt == 0) { /* @For 2->1 entry, we should not cancel SW timer */ -+ phydm_beamforming_end_period_fw(dm); -+ PHYDM_DBG(dm, DBG_TXBF, "%s: No BFee left\n", -+ __func__); -+ } -+ } else { -+ phydm_beamforming_clear_entry_sw(dm, true, idx); -+ if (beam_info->beamformee_su_cnt == 0) { /* @For 2->1 entry, we should not cancel SW timer */ -+ phydm_beamforming_end_period_sw(dm); -+ PHYDM_DBG(dm, DBG_TXBF, "%s: No BFee left\n", -+ __func__); -+ } -+ } -+ break; -+ -+ case BEAMFORMEE_NOTIFY_ADD_MU: -+ PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_ADD_MU\n", -+ __func__); -+ if (beam_info->beamformee_mu_cnt == 2) { -+ /*@if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER) -+ odm_set_timer(dm, &beam_info->beamforming_timer, sound_info->sound_period);*/ -+ odm_set_timer(dm, &beam_info->beamforming_timer, 1000); /*@Do MU sounding every 1sec*/ -+ } else -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s: Less or larger than 2 MU STAs, not to set timer\n", -+ __func__); -+ break; -+ -+ case BEAMFORMEE_NOTIFY_DELETE_MU: -+ PHYDM_DBG(dm, DBG_TXBF, "%s: BEAMFORMEE_NOTIFY_DELETE_MU\n", -+ __func__); -+ if (beam_info->beamformee_mu_cnt == 1) { -+ /*@if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER)*/ { -+ odm_cancel_timer(dm, &beam_info->beamforming_timer); -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s: Less than 2 MU STAs, stop sounding\n", -+ __func__); -+ } -+ } -+ break; -+ -+ case BEAMFORMING_NOTIFY_RESET: -+ if (sound_info->sound_mode == SOUNDING_FW_HT_TIMER || sound_info->sound_mode == SOUNDING_FW_VHT_TIMER) { -+ phydm_beamforming_clear_entry_fw(dm, false, idx); -+ phydm_beamforming_end_period_fw(dm); -+ } else { -+ phydm_beamforming_clear_entry_sw(dm, false, idx); -+ phydm_beamforming_end_period_sw(dm); -+ } -+ -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+boolean -+beamforming_init_entry(void *dm_void, u16 sta_idx, u8 *bfer_bfee_idx, -+ u8 *my_mac_addr) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *cmn_sta = dm->phydm_sta_info[sta_idx]; -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; -+ struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL; -+ struct _RT_BEAMFORM_STAINFO *sta = NULL; -+ enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE; -+ u8 bfer_idx = 0xF, bfee_idx = 0xF; -+ u8 num_of_sounding_dim = 0, comp_steering_num_of_bfer = 0; -+ -+ if (!is_sta_active(cmn_sta)) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s => sta_info(mac_id:%d) failed\n", -+ __func__, sta_idx); -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ rtw_warn_on(1); -+ #endif -+ return false; -+ } -+ -+ sta = phydm_sta_info_init(dm, sta_idx, my_mac_addr); -+ /*The current setting does not support Beaforming*/ -+ if (BEAMFORMING_CAP_NONE == sta->ht_beamform_cap && BEAMFORMING_CAP_NONE == sta->vht_beamform_cap) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "The configuration disabled Beamforming! Skip...\n"); -+ return false; -+ } -+ -+ if (!(cmn_sta->support_wireless_set & (WIRELESS_VHT | WIRELESS_HT))) -+ return false; -+ else { -+ if (cmn_sta->support_wireless_set & WIRELESS_HT) { /*@HT*/ -+ if (TEST_FLAG(sta->cur_beamform, BEAMFORMING_HT_BEAMFORMER_ENABLE)) { /*We are Beamformee because the STA is Beamformer*/ -+ beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_HT_EXPLICIT); -+ num_of_sounding_dim = (sta->cur_beamform & BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP) >> 6; -+ } -+ /*We are Beamformer because the STA is Beamformee*/ -+ if (TEST_FLAG(sta->cur_beamform, BEAMFORMING_HT_BEAMFORMEE_ENABLE) || -+ TEST_FLAG(sta->ht_beamform_cap, BEAMFORMING_HT_BEAMFORMER_TEST)) { -+ beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_HT_EXPLICIT); -+ comp_steering_num_of_bfer = (sta->cur_beamform & BEAMFORMING_HT_BEAMFORMER_STEER_NUM) >> 4; -+ } -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] HT cur_beamform=0x%X, beamform_cap=0x%X\n", -+ __func__, sta->cur_beamform, beamform_cap); -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] HT num_of_sounding_dim=%d, comp_steering_num_of_bfer=%d\n", -+ __func__, num_of_sounding_dim, -+ comp_steering_num_of_bfer); -+ } -+#if (ODM_IC_11AC_SERIES_SUPPORT == 1) -+ if (cmn_sta->support_wireless_set & WIRELESS_VHT) { /*VHT*/ -+ -+ /* We are Beamformee because the STA is SU Beamformer*/ -+ if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) { -+ beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_VHT_SU); -+ num_of_sounding_dim = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12; -+ } -+ /* We are Beamformer because the STA is SU Beamformee*/ -+ if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) || -+ TEST_FLAG(sta->vht_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { -+ beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_VHT_SU); -+ comp_steering_num_of_bfer = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8; -+ } -+ /* We are Beamformee because the STA is MU Beamformer*/ -+ if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) { -+ beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP_VHT_MU); -+ num_of_sounding_dim = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM) >> 12; -+ } -+ /* We are Beamformer because the STA is MU Beamformee*/ -+ if (phydm_acting_determine(dm, phydm_acting_as_ap)) { /* Only AP mode supports to act an MU beamformer */ -+ if (TEST_FLAG(sta->cur_beamform_vht, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE) || -+ TEST_FLAG(sta->vht_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_TEST)) { -+ beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP_VHT_MU); -+ comp_steering_num_of_bfer = (sta->cur_beamform_vht & BEAMFORMING_VHT_BEAMFORMER_STS_CAP) >> 8; -+ } -+ } -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s]VHT cur_beamform_vht=0x%X, beamform_cap=0x%X\n", -+ __func__, sta->cur_beamform_vht, -+ beamform_cap); -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s]VHT num_of_sounding_dim=0x%X, comp_steering_num_of_bfer=0x%X\n", -+ __func__, num_of_sounding_dim, -+ comp_steering_num_of_bfer); -+ } -+#endif -+ } -+ -+ if (beamform_cap == BEAMFORMING_CAP_NONE) -+ return false; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Self BF Entry Cap = 0x%02X\n", __func__, -+ beamform_cap); -+ -+ /*We are BFee, so the entry is BFer*/ -+ if (beamform_cap & (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP_HT_EXPLICIT)) { -+ beamformer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, sta->ra, &bfer_idx); -+ -+ if (beamformer_entry == NULL) { -+ beamformer_entry = beamforming_add_bfer_entry(dm, sta, beamform_cap, num_of_sounding_dim, &bfer_idx); -+ if (beamformer_entry == NULL) -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s]Not enough BFer entry!!!!!\n", -+ __func__); -+ } -+ } -+ -+ /*We are BFer, so the entry is BFee*/ -+ if (beamform_cap & (BEAMFORMER_CAP_VHT_MU | BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP_HT_EXPLICIT)) { -+ beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, sta->ra, &bfee_idx); -+ -+ /*@if BFeeIdx = 0xF, that represent for no matched MACID among all linked entrys */ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Get BFee entry 0x%X by address\n", -+ __func__, bfee_idx); -+ if (beamform_entry == NULL) { -+ beamform_entry = beamforming_add_bfee_entry(dm, sta, beamform_cap, num_of_sounding_dim, comp_steering_num_of_bfer, &bfee_idx); -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s]: sta->AID=%d, sta->mac_id=%d\n", -+ __func__, sta->aid, sta->mac_id); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s]: Add BFee entry %d\n", -+ __func__, bfee_idx); -+ -+ if (beamform_entry == NULL) -+ return false; -+ else -+ beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; -+ } else { -+ /*@Entry has been created. If entry is initialing or progressing then errors occur.*/ -+ if (beamform_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && -+ beamform_entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) -+ return false; -+ else -+ beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZEING; -+ } -+ beamform_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ phydm_sta_info_update(dm, sta_idx, beamform_entry); -+ } -+ -+ *bfer_bfee_idx = (bfer_idx << 4) | bfee_idx; -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] End: bfer_idx=0x%X, bfee_idx=0x%X, bfer_bfee_idx=0x%X\n", -+ __func__, bfer_idx, bfee_idx, *bfer_bfee_idx); -+ -+ return true; -+} -+ -+void beamforming_deinit_entry( -+ void *dm_void, -+ u8 *RA) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 idx = 0; -+ -+ struct _RT_BEAMFORMER_ENTRY *bfer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, RA, &idx); -+ struct _RT_BEAMFORMEE_ENTRY *bfee_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ boolean ret = false; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ if (bfee_entry != NULL) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s, bfee_entry\n", __func__); -+ bfee_entry->is_used = false; -+ bfee_entry->beamform_entry_cap = BEAMFORMING_CAP_NONE; -+ bfee_entry->is_beamforming_in_progress = false; -+ if (bfee_entry->is_mu_sta) { -+ dm->beamforming_info.beamformee_mu_cnt -= 1; -+ dm->beamforming_info.first_mu_bfee_index = phydm_beamforming_get_first_mu_bfee_entry_idx(dm); -+ } else -+ dm->beamforming_info.beamformee_su_cnt -= 1; -+ ret = true; -+ } -+ -+ if (bfer_entry != NULL) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s, bfer_entry\n", __func__); -+ bfer_entry->is_used = false; -+ bfer_entry->beamform_entry_cap = BEAMFORMING_CAP_NONE; -+ if (bfer_entry->is_mu_ap) -+ dm->beamforming_info.beamformer_mu_cnt -= 1; -+ else -+ dm->beamforming_info.beamformer_su_cnt -= 1; -+ ret = true; -+ } -+ -+ if (ret == true) -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_LEAVE, (u8 *)&idx); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s End, idx = 0x%X\n", __func__, idx); -+} -+ -+boolean -+beamforming_start_v1( -+ void *dm_void, -+ u8 *RA, -+ boolean mode, -+ enum channel_width BW, -+ u8 rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 idx = 0; -+ struct _RT_BEAMFORMEE_ENTRY *entry; -+ boolean ret = true; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ -+ if (entry->is_used == false) { -+ entry->is_beamforming_in_progress = false; -+ return false; -+ } else { -+ if (entry->is_beamforming_in_progress) -+ return false; -+ -+ entry->is_beamforming_in_progress = true; -+ -+ if (mode == 1) { -+ if (!(entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) { -+ entry->is_beamforming_in_progress = false; -+ return false; -+ } -+ } else if (mode == 0) { -+ if (!(entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)) { -+ entry->is_beamforming_in_progress = false; -+ return false; -+ } -+ } -+ -+ if (entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ entry->is_beamforming_in_progress = false; -+ return false; -+ } else { -+ entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING; -+ entry->is_sound = true; -+ } -+ } -+ -+ entry->sound_bw = BW; -+ beam_info->beamformee_cur_idx = idx; -+ phydm_beamforming_ndpa_rate(dm, BW, rate); -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, (u8 *)&idx); -+ -+ if (mode == 1) -+ ret = beamforming_send_ht_ndpa_packet(dm, RA, BW, NORMAL_QUEUE); -+ else -+ ret = beamforming_send_vht_ndpa_packet(dm, RA, entry->aid, BW, NORMAL_QUEUE); -+ -+ if (ret == false) { -+ beamforming_leave(dm, RA); -+ entry->is_beamforming_in_progress = false; -+ return false; -+ } -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s idx %d\n", __func__, idx); -+ return true; -+} -+ -+boolean -+beamforming_start_sw( -+ void *dm_void, -+ u8 idx, -+ u8 mode, -+ enum channel_width BW) -+{ -+ u8 *ra = NULL; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMEE_ENTRY *entry; -+ boolean ret = true; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+#ifdef SUPPORT_MU_BF -+#if (SUPPORT_MU_BF == 1) -+ u8 i, poll_sta_cnt = 0; -+ boolean is_get_first_bfee = false; -+#endif -+#endif -+ -+ if (beam_info->is_mu_sounding) { -+ beam_info->is_mu_sounding_in_progress = true; -+ entry = &beam_info->beamformee_entry[idx]; -+ ra = entry->mac_addr; -+ -+ } else { -+ entry = &beam_info->beamformee_entry[idx]; -+ -+ if (entry->is_used == false) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "Skip Beamforming, no entry for idx =%d\n", -+ idx); -+ entry->is_beamforming_in_progress = false; -+ return false; -+ } -+ -+ if (entry->is_beamforming_in_progress) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "is_beamforming_in_progress, skip...\n"); -+ return false; -+ } -+ -+ entry->is_beamforming_in_progress = true; -+ ra = entry->mac_addr; -+ -+ if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_AUTO_HT_TIMER) { -+ if (!(entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) { -+ entry->is_beamforming_in_progress = false; -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s Return by not support BEAMFORMER_CAP_HT_EXPLICIT <==\n", -+ __func__); -+ return false; -+ } -+ } else if (mode == SOUNDING_SW_VHT_TIMER || mode == SOUNDING_HW_VHT_TIMER || mode == SOUNDING_AUTO_VHT_TIMER) { -+ if (!(entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)) { -+ entry->is_beamforming_in_progress = false; -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s Return by not support BEAMFORMER_CAP_VHT_SU <==\n", -+ __func__); -+ return false; -+ } -+ } -+ if (entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_INITIALIZED && entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ entry->is_beamforming_in_progress = false; -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s Return by incorrect beamform_entry_state(%d) <==\n", -+ __func__, entry->beamform_entry_state); -+ return false; -+ } else { -+ entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING; -+ entry->is_sound = true; -+ } -+ -+ beam_info->beamformee_cur_idx = idx; -+ } -+ -+ /*@2014.12.22 Luke: Need to be checked*/ -+ /*@GET_TXBF_INFO(adapter)->fTxbfSet(adapter, TXBF_SET_SOUNDING_STATUS, (u8*)&idx);*/ -+ -+ if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_AUTO_HT_TIMER) -+ ret = beamforming_send_ht_ndpa_packet(dm, ra, BW, NORMAL_QUEUE); -+ else -+ ret = beamforming_send_vht_ndpa_packet(dm, ra, entry->aid, BW, NORMAL_QUEUE); -+ -+ if (ret == false) { -+ beamforming_leave(dm, ra); -+ entry->is_beamforming_in_progress = false; -+ return false; -+ } -+ -+/*@-------------------------- -+ * Send BF Report Poll for MU BF -+ --------------------------*/ -+#ifdef SUPPORT_MU_BF -+#if (SUPPORT_MU_BF == 1) -+ if (beam_info->beamformee_mu_cnt <= 1) -+ goto out; -+ -+ /* @More than 1 MU STA*/ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ entry = &beam_info->beamformee_entry[i]; -+ if (!entry->is_mu_sta) -+ continue; -+ -+ if (!is_get_first_bfee) { -+ is_get_first_bfee = true; -+ continue; -+ } -+ -+ poll_sta_cnt++; -+ if (poll_sta_cnt == (beam_info->beamformee_mu_cnt - 1)) /* The last STA*/ -+ send_sw_vht_bf_report_poll(dm, entry->mac_addr, true); -+ else -+ send_sw_vht_bf_report_poll(dm, entry->mac_addr, false); -+ } -+out: -+#endif -+#endif -+ return true; -+} -+ -+boolean -+beamforming_start_fw( -+ void *dm_void, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMEE_ENTRY *entry; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ entry = &beam_info->beamformee_entry[idx]; -+ if (entry->is_used == false) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "Skip Beamforming, no entry for idx =%d\n", idx); -+ return false; -+ } -+ -+ entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSING; -+ entry->is_sound = true; -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_FW_NDPA, (u8 *)&idx); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] End, idx=0x%X\n", __func__, idx); -+ return true; -+} -+ -+void beamforming_check_sounding_success( -+ void *dm_void, -+ boolean status) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx]; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[David]@%s Start!\n", __func__); -+ -+ if (status == 1) { -+ if (entry->log_status_fail_cnt == 21) -+ beamforming_dym_period(dm, status); -+ entry->log_status_fail_cnt = 0; -+ } else if (entry->log_status_fail_cnt <= 20) { -+ entry->log_status_fail_cnt++; -+ PHYDM_DBG(dm, DBG_TXBF, "%s log_status_fail_cnt %d\n", __func__, -+ entry->log_status_fail_cnt); -+ } -+ if (entry->log_status_fail_cnt > 20) { -+ entry->log_status_fail_cnt = 21; -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s log_status_fail_cnt > 20, Stop SOUNDING\n", -+ __func__); -+ beamforming_dym_period(dm, status); -+ } -+} -+ -+void phydm_beamforming_end_sw( -+ void *dm_void, -+ boolean status) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *entry = &beam_info->beamformee_entry[beam_info->beamformee_cur_idx]; -+ -+ if (beam_info->is_mu_sounding) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s: MU sounding done\n", __func__); -+ beam_info->is_mu_sounding_in_progress = false; -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, -+ (u8 *)&beam_info->beamformee_cur_idx); -+ } else { -+ if (entry->beamform_entry_state != BEAMFORMING_ENTRY_STATE_PROGRESSING) { -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] BeamformStatus %d\n", -+ __func__, entry->beamform_entry_state); -+ return; -+ } -+ -+ if (beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7 && beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9 && !beam_info->snding3ss) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] VHT3SS 7,8,9, do not apply V matrix.\n", -+ __func__); -+ entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, -+ (u8 *)&beam_info->beamformee_cur_idx); -+ } else if (status == 1) { -+ entry->log_status_fail_cnt = 0; -+ entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_STATUS, -+ (u8 *)&beam_info->beamformee_cur_idx); -+ } else { -+ entry->log_status_fail_cnt++; -+ entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED; -+ hal_com_txbf_set(dm, TXBF_SET_TX_PATH_RESET, -+ (u8 *)&beam_info->beamformee_cur_idx); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] log_status_fail_cnt %d\n", -+ __func__, entry->log_status_fail_cnt); -+ } -+ -+ if (entry->log_status_fail_cnt > 50) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s log_status_fail_cnt > 50, Stop SOUNDING\n", -+ __func__); -+ entry->is_sound = false; -+ beamforming_deinit_entry(dm, entry->mac_addr); -+ -+ /*@Modified by David - Every action of deleting entry should follow by Notify*/ -+ phydm_beamforming_notify(dm); -+ } -+ -+ entry->is_beamforming_in_progress = false; -+ } -+ PHYDM_DBG(dm, DBG_TXBF, "%s: status=%d\n", __func__, status); -+} -+ -+void beamforming_timer_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *dm_void -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ void *context -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ void *adapter = (void *)context; -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->odmpriv; -+#endif -+ boolean ret = false; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ struct _RT_BEAMFORMEE_ENTRY *entry = &(beam_info->beamformee_entry[beam_info->beamformee_cur_idx]); -+ struct _RT_SOUNDING_INFO *sound_info = &(beam_info->sounding_info); -+ boolean is_beamforming_in_progress; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ if (beam_info->is_mu_sounding) -+ is_beamforming_in_progress = beam_info->is_mu_sounding_in_progress; -+ else -+ is_beamforming_in_progress = entry->is_beamforming_in_progress; -+ -+ if (is_beamforming_in_progress) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "is_beamforming_in_progress, reset it\n"); -+ phydm_beamforming_end_sw(dm, 0); -+ } -+ -+ ret = phydm_beamforming_select_beam_entry(dm, beam_info); -+#if (SUPPORT_MU_BF == 1) -+ if (ret && beam_info->beamformee_mu_cnt > 1) -+ ret = 1; -+ else -+ ret = 0; -+#endif -+ if (ret) -+ ret = beamforming_start_sw(dm, sound_info->sound_idx, sound_info->sound_mode, sound_info->sound_bw); -+ else -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s, Error value return from BeamformingStart_V2\n", -+ __func__); -+ -+ if (beam_info->beamformee_su_cnt != 0 || beam_info->beamformee_mu_cnt > 1) { -+ if (sound_info->sound_mode == SOUNDING_SW_VHT_TIMER || sound_info->sound_mode == SOUNDING_SW_HT_TIMER) -+ odm_set_timer(dm, &beam_info->beamforming_timer, sound_info->sound_period); -+ else { -+ u32 val = (sound_info->sound_period << 16) | HAL_TIMER_TXBF; -+ phydm_set_hw_reg_handler_interface(dm, HW_VAR_HW_REG_TIMER_RESTART, (u8 *)(&val)); -+ } -+ } -+} -+ -+void beamforming_sw_timer_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct phydm_timer_list *timer -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ void *function_context -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter = (void *)timer->Adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ beamforming_timer_callback(dm); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ struct dm_struct *dm = (struct dm_struct *)function_context; -+ void *adapter = dm->adapter; -+ -+ if (*dm->is_net_closed == true) -+ return; -+ phydm_run_in_thread_cmd(dm, beamforming_timer_callback, adapter); -+#endif -+} -+ -+void phydm_beamforming_init( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMING_OID_INFO *beam_oid_info = &beam_info->beamforming_oid_info; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ -+#ifdef BEAMFORMING_VERSION_1 -+ if (hal_data->beamforming_version != BEAMFORMING_VERSION_1) { -+ return; -+ } -+#endif -+#endif -+ -+ beam_oid_info->sound_oid_mode = SOUNDING_STOP_OID_TIMER; -+ PHYDM_DBG(dm, DBG_TXBF, "%s mode (%d)\n", __func__, -+ beam_oid_info->sound_oid_mode); -+ -+ beam_info->beamformee_su_cnt = 0; -+ beam_info->beamformer_su_cnt = 0; -+ beam_info->beamformee_mu_cnt = 0; -+ beam_info->beamformer_mu_cnt = 0; -+ beam_info->beamformee_mu_reg_maping = 0; -+ beam_info->mu_ap_index = 0; -+ beam_info->is_mu_sounding = false; -+ beam_info->first_mu_bfee_index = 0xFF; -+ beam_info->apply_v_matrix = true; -+ beam_info->snding3ss = false; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ beam_info->source_adapter = dm->adapter; -+#endif -+ hal_com_txbf_beamform_init(dm); -+} -+ -+boolean -+phydm_acting_determine( -+ void *dm_void, -+ enum phydm_acting_type type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean ret = false; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter = dm->beamforming_info.source_adapter; -+#else -+ struct _ADAPTER *adapter = dm->adapter; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (type == phydm_acting_as_ap) -+ ret = ACTING_AS_AP(adapter); -+ else if (type == phydm_acting_as_ibss) -+ ret = ACTING_AS_IBSS(((PADAPTER)(adapter))); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; -+ -+ if (type == phydm_acting_as_ap) -+ ret = check_fwstate(pmlmepriv, WIFI_AP_STATE); -+ else if (type == phydm_acting_as_ibss) -+ ret = check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+#endif -+ -+ return ret; -+} -+ -+void beamforming_enter(void *dm_void, u16 sta_idx, u8 *my_mac_addr) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 bfer_bfee_idx = 0xff; -+ -+ if (beamforming_init_entry(dm, sta_idx, &bfer_bfee_idx, my_mac_addr)) -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_ENTER, (u8 *)&bfer_bfee_idx); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] End!\n", __func__); -+} -+ -+void beamforming_leave( -+ void *dm_void, -+ u8 *RA) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (RA != NULL) { -+ beamforming_deinit_entry(dm, RA); -+ phydm_beamforming_notify(dm); -+ } -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] End!!\n", __func__); -+} -+ -+enum beamforming_cap -+phydm_beamforming_get_beam_cap( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beam_info) -+{ -+ u8 i; -+ boolean is_self_beamformer = false; -+ boolean is_self_beamformee = false; -+ struct _RT_BEAMFORMEE_ENTRY beamformee_entry; -+ struct _RT_BEAMFORMER_ENTRY beamformer_entry; -+ enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ beamformee_entry = beam_info->beamformee_entry[i]; -+ -+ if (beamformee_entry.is_used) { -+ is_self_beamformer = true; -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] BFee entry %d is_used=true\n", __func__, -+ i); -+ break; -+ } -+ } -+ -+ for (i = 0; i < BEAMFORMER_ENTRY_NUM; i++) { -+ beamformer_entry = beam_info->beamformer_entry[i]; -+ -+ if (beamformer_entry.is_used) { -+ is_self_beamformee = true; -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s]: BFer entry %d is_used=true\n", -+ __func__, i); -+ break; -+ } -+ } -+ -+ if (is_self_beamformer) -+ beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMER_CAP); -+ if (is_self_beamformee) -+ beamform_cap = (enum beamforming_cap)(beamform_cap | BEAMFORMEE_CAP); -+ -+ return beamform_cap; -+} -+ -+boolean -+beamforming_control_v1( -+ void *dm_void, -+ u8 *RA, -+ u8 AID, -+ u8 mode, -+ enum channel_width BW, -+ u8 rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean ret = true; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "AID (%d), mode (%d), BW (%d)\n", AID, mode, -+ BW); -+ -+ switch (mode) { -+ case 0: -+ ret = beamforming_start_v1(dm, RA, 0, BW, rate); -+ break; -+ case 1: -+ ret = beamforming_start_v1(dm, RA, 1, BW, rate); -+ break; -+ case 2: -+ phydm_beamforming_ndpa_rate(dm, BW, rate); -+ ret = beamforming_send_vht_ndpa_packet(dm, RA, AID, BW, NORMAL_QUEUE); -+ break; -+ case 3: -+ phydm_beamforming_ndpa_rate(dm, BW, rate); -+ ret = beamforming_send_ht_ndpa_packet(dm, RA, BW, NORMAL_QUEUE); -+ break; -+ } -+ return ret; -+} -+ -+/*Only OID uses this function*/ -+boolean -+phydm_beamforming_control_v2( -+ void *dm_void, -+ u8 idx, -+ u8 mode, -+ enum channel_width BW, -+ u16 period) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMING_OID_INFO *beam_oid_info = &beam_info->beamforming_oid_info; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ PHYDM_DBG(dm, DBG_TXBF, "idx (%d), mode (%d), BW (%d), period (%d)\n", -+ idx, mode, BW, period); -+ -+ beam_oid_info->sound_oid_idx = idx; -+ beam_oid_info->sound_oid_mode = (enum sounding_mode)mode; -+ beam_oid_info->sound_oid_bw = BW; -+ beam_oid_info->sound_oid_period = period; -+ -+ phydm_beamforming_notify(dm); -+ -+ return true; -+} -+ -+void phydm_beamforming_watchdog( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s Start!\n", __func__); -+ -+ if (beam_info->beamformee_su_cnt == 0) -+ return; -+ -+ beamforming_dym_period(dm, 0); -+} -+enum beamforming_cap -+phydm_get_beamform_cap( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = NULL; -+ struct bf_cmn_info *bf_info = NULL; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ void *adapter = dm->adapter; -+ enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE; -+ u8 macid; -+ u8 ht_curbeamformcap = 0; -+ u16 vht_curbeamformcap = 0; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PMGNT_INFO p_MgntInfo = &(((PADAPTER)(adapter))->MgntInfo); -+ PRT_VERY_HIGH_THROUGHPUT p_vht_info = GET_VHT_INFO(p_MgntInfo); -+ PRT_HIGH_THROUGHPUT p_ht_info = GET_HT_INFO(p_MgntInfo); -+ -+ ht_curbeamformcap = p_ht_info->HtCurBeamform; -+ vht_curbeamformcap = p_vht_info->VhtCurBeamform; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[%s] WIN ht_curcap = %d ; vht_curcap = %d\n", __func__, -+ ht_curbeamformcap, vht_curbeamformcap); -+ -+ if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) /*We are Beamformee because the STA is Beamformer*/ -+ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_HT_EXPLICIT | BEAMFORMEE_CAP)); -+ -+ /*We are Beamformer because the STA is Beamformee*/ -+ if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) -+ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP)); -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT == 1) -+ -+ /* We are Beamformee because the STA is SU Beamformer*/ -+ if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) -+ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP)); -+ -+ /* We are Beamformer because the STA is SU Beamformee*/ -+ if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) -+ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP)); -+ -+ /* We are Beamformee because the STA is MU Beamformer*/ -+ if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) -+ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP)); -+#endif -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+ for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { -+ sta = dm->phydm_sta_info[macid]; -+ -+ if (!is_sta_active(sta)) -+ continue; -+ -+ bf_info = &sta->bf_info; -+ vht_curbeamformcap = bf_info->vht_beamform_cap; -+ ht_curbeamformcap = bf_info->ht_beamform_cap; -+ -+ if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMER_ENABLE)) /*We are Beamformee because the STA is Beamformer*/ -+ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_HT_EXPLICIT | BEAMFORMEE_CAP)); -+ -+ /*We are Beamformer because the STA is Beamformee*/ -+ if (TEST_FLAG(ht_curbeamformcap, BEAMFORMING_HT_BEAMFORMEE_ENABLE)) -+ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP)); -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT == 1) -+ /* We are Beamformee because the STA is SU Beamformer*/ -+ if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) -+ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP)); -+ -+ /* We are Beamformer because the STA is SU Beamformee*/ -+ if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) -+ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP)); -+ -+ /* We are Beamformee because the STA is MU Beamformer*/ -+ if (TEST_FLAG(vht_curbeamformcap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)) -+ beamform_cap = (enum beamforming_cap)(beamform_cap | (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP)); -+#endif -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[%s] CE ht_curcap = %d ; vht_curcap = %d\n", -+ __func__, ht_curbeamformcap, vht_curbeamformcap); -+ -+#endif -+ -+ return beamform_cap; -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_beamforming.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_beamforming.h -new file mode 100644 -index 000000000000..efb53e3099da ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_beamforming.h -@@ -0,0 +1,363 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __INC_PHYDM_BEAMFORMING_H -+#define __INC_PHYDM_BEAMFORMING_H -+ -+/*@Beamforming Related*/ -+#include "txbf/halcomtxbf.h" -+#include "txbf/haltxbfjaguar.h" -+#include "txbf/haltxbf8192e.h" -+#include "txbf/haltxbf8814a.h" -+#include "txbf/haltxbf8822b.h" -+#include "txbf/haltxbfinterface.h" -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+#define eq_mac_addr(a, b) (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0) -+#define cp_mac_addr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5]) -+ -+#endif -+ -+#define MAX_BEAMFORMEE_SU 2 -+#define MAX_BEAMFORMER_SU 2 -+#if ((RTL8822B_SUPPORT == 1) || (RTL8812F_SUPPORT == 1)) -+#define MAX_BEAMFORMEE_MU 6 -+#define MAX_BEAMFORMER_MU 1 -+#else -+#define MAX_BEAMFORMEE_MU 0 -+#define MAX_BEAMFORMER_MU 0 -+#endif -+ -+#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU) -+#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU) -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+/*@for different naming between WIN and CE*/ -+#define BEACON_QUEUE BCN_QUEUE_INX -+#define NORMAL_QUEUE MGT_QUEUE_INX -+#define RT_DISABLE_FUNC RTW_DISABLE_FUNC -+#define RT_ENABLE_FUNC RTW_ENABLE_FUNC -+#endif -+ -+enum beamforming_entry_state { -+ BEAMFORMING_ENTRY_STATE_UNINITIALIZE, -+ BEAMFORMING_ENTRY_STATE_INITIALIZEING, -+ BEAMFORMING_ENTRY_STATE_INITIALIZED, -+ BEAMFORMING_ENTRY_STATE_PROGRESSING, -+ BEAMFORMING_ENTRY_STATE_PROGRESSED -+}; -+ -+enum beamforming_notify_state { -+ BEAMFORMING_NOTIFY_NONE, -+ BEAMFORMING_NOTIFY_ADD, -+ BEAMFORMING_NOTIFY_DELETE, -+ BEAMFORMEE_NOTIFY_ADD_SU, -+ BEAMFORMEE_NOTIFY_DELETE_SU, -+ BEAMFORMEE_NOTIFY_ADD_MU, -+ BEAMFORMEE_NOTIFY_DELETE_MU, -+ BEAMFORMING_NOTIFY_RESET -+}; -+ -+enum beamforming_cap { -+ BEAMFORMING_CAP_NONE = 0x0, -+ BEAMFORMER_CAP_HT_EXPLICIT = BIT(1), -+ BEAMFORMEE_CAP_HT_EXPLICIT = BIT(2), -+ BEAMFORMER_CAP_VHT_SU = BIT(5), /* @Self has er Cap, because Reg er & peer ee */ -+ BEAMFORMEE_CAP_VHT_SU = BIT(6), /* @Self has ee Cap, because Reg ee & peer er */ -+ BEAMFORMER_CAP_VHT_MU = BIT(7), /* @Self has er Cap, because Reg er & peer ee */ -+ BEAMFORMEE_CAP_VHT_MU = BIT(8), /* @Self has ee Cap, because Reg ee & peer er */ -+ BEAMFORMER_CAP = BIT(9), -+ BEAMFORMEE_CAP = BIT(10), -+}; -+ -+enum sounding_mode { -+ SOUNDING_SW_VHT_TIMER = 0x0, -+ SOUNDING_SW_HT_TIMER = 0x1, -+ sounding_stop_all_timer = 0x2, -+ SOUNDING_HW_VHT_TIMER = 0x3, -+ SOUNDING_HW_HT_TIMER = 0x4, -+ SOUNDING_STOP_OID_TIMER = 0x5, -+ SOUNDING_AUTO_VHT_TIMER = 0x6, -+ SOUNDING_AUTO_HT_TIMER = 0x7, -+ SOUNDING_FW_VHT_TIMER = 0x8, -+ SOUNDING_FW_HT_TIMER = 0x9, -+}; -+ -+struct _RT_BEAMFORM_STAINFO { -+ u8 *ra; -+ u16 aid; -+ u16 mac_id; -+ u8 my_mac_addr[6]; -+ /*WIRELESS_MODE wireless_mode;*/ -+ enum channel_width bw; -+ enum beamforming_cap beamform_cap; -+ u8 ht_beamform_cap; -+ u16 vht_beamform_cap; -+ u8 cur_beamform; -+ u16 cur_beamform_vht; -+}; -+ -+struct _RT_BEAMFORMEE_ENTRY { -+ boolean is_used; -+ boolean is_txbf; -+ boolean is_sound; -+ u16 aid; /*Used to construct AID field of NDPA packet.*/ -+ u16 mac_id; /*Used to Set Reg42C in IBSS mode. */ -+ u16 p_aid; /*@Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ -+ u8 g_id; /*Used to fill Tx DESC*/ -+ u8 my_mac_addr[6]; -+ u8 mac_addr[6]; /*@Used to fill Reg6E4 to fill Mac address of CSI report frame.*/ -+ enum channel_width sound_bw; /*Sounding band_width*/ -+ u16 sound_period; -+ enum beamforming_cap beamform_entry_cap; -+ enum beamforming_entry_state beamform_entry_state; -+ boolean is_beamforming_in_progress; -+ /*@u8 log_seq; // Move to _RT_BEAMFORMER_ENTRY*/ -+ /*@u16 log_retry_cnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/ -+ /*@u16 LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/ -+ u16 log_status_fail_cnt : 5; /* @0~21 */ -+ u16 default_csi_cnt : 5; /* @0~21 */ -+ u8 csi_matrix[327]; -+ u16 csi_matrix_len; -+ u8 num_of_sounding_dim; -+ u8 comp_steering_num_of_bfer; -+ u8 su_reg_index; -+ /*@For MU-MIMO*/ -+ boolean is_mu_sta; -+ u8 mu_reg_index; -+ u8 gid_valid[8]; -+ u8 user_position[16]; -+}; -+ -+struct _RT_BEAMFORMER_ENTRY { -+ boolean is_used; -+ /*P_AID of BFer entry is probably not used*/ -+ u16 p_aid; /*@Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ -+ u8 g_id; -+ u8 my_mac_addr[6]; -+ u8 mac_addr[6]; -+ enum beamforming_cap beamform_entry_cap; -+ u8 num_of_sounding_dim; -+ u8 clock_reset_times; /*@Modified by Jeffery @2015-04-10*/ -+ u8 pre_log_seq; /*@Modified by Jeffery @2015-03-30*/ -+ u8 log_seq; /*@Modified by Jeffery @2014-10-29*/ -+ u16 log_retry_cnt : 3; /*@Modified by Jeffery @2014-10-29*/ -+ u16 log_success : 2; /*@Modified by Jeffery @2014-10-29*/ -+ u8 su_reg_index; -+ /*@For MU-MIMO*/ -+ boolean is_mu_ap; -+ u8 gid_valid[8]; -+ u8 user_position[16]; -+ u16 aid; -+}; -+ -+struct _RT_SOUNDING_INFO { -+ u8 sound_idx; -+ enum channel_width sound_bw; -+ enum sounding_mode sound_mode; -+ u16 sound_period; -+}; -+ -+struct _RT_BEAMFORMING_OID_INFO { -+ u8 sound_oid_idx; -+ enum channel_width sound_oid_bw; -+ enum sounding_mode sound_oid_mode; -+ u16 sound_oid_period; -+}; -+ -+struct _RT_BEAMFORMING_INFO { -+ enum beamforming_cap beamform_cap; -+ struct _RT_BEAMFORMEE_ENTRY beamformee_entry[BEAMFORMEE_ENTRY_NUM]; -+ struct _RT_BEAMFORMER_ENTRY beamformer_entry[BEAMFORMER_ENTRY_NUM]; -+ struct _RT_BEAMFORM_STAINFO beamform_sta_info; -+ u8 beamformee_cur_idx; -+ struct phydm_timer_list beamforming_timer; -+ struct phydm_timer_list mu_timer; -+ struct _RT_SOUNDING_INFO sounding_info; -+ struct _RT_BEAMFORMING_OID_INFO beamforming_oid_info; -+ struct _HAL_TXBF_INFO txbf_info; -+ u8 sounding_sequence; -+ u8 beamformee_su_cnt; -+ u8 beamformer_su_cnt; -+ u32 beamformee_su_reg_maping; -+ u32 beamformer_su_reg_maping; -+ /*@For MU-MINO*/ -+ u8 beamformee_mu_cnt; -+ u8 beamformer_mu_cnt; -+ u32 beamformee_mu_reg_maping; -+ u8 mu_ap_index; -+ boolean is_mu_sounding; -+ u8 first_mu_bfee_index; -+ boolean is_mu_sounding_in_progress; -+ boolean dbg_disable_mu_tx; -+ boolean apply_v_matrix; -+ boolean snding3ss; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *source_adapter; -+#endif -+ /* @Control register */ -+ u32 reg_mu_tx_ctrl; /* @For USB/SDIO interfaces aync I/O */ -+ u8 tx_bf_data_rate; -+ u8 last_usb_hub; -+}; -+ -+void phydm_get_txbf_device_num( -+ void *dm_void, -+ u8 macid); -+ -+struct _RT_NDPA_STA_INFO { -+ u16 aid : 12; -+ u16 feedback_type : 1; -+ u16 nc_index : 3; -+}; -+ -+enum phydm_acting_type { -+ phydm_acting_as_ibss = 0, -+ phydm_acting_as_ap = 1 -+}; -+ -+enum beamforming_cap -+phydm_beamforming_get_entry_beam_cap_by_mac_id( -+ void *dm_void, -+ u8 mac_id); -+ -+struct _RT_BEAMFORMEE_ENTRY * -+phydm_beamforming_get_bfee_entry_by_addr( -+ void *dm_void, -+ u8 *RA, -+ u8 *idx); -+ -+struct _RT_BEAMFORMER_ENTRY * -+phydm_beamforming_get_bfer_entry_by_addr( -+ void *dm_void, -+ u8 *TA, -+ u8 *idx); -+ -+void phydm_beamforming_notify( -+ void *dm_void); -+ -+boolean -+phydm_acting_determine( -+ void *dm_void, -+ enum phydm_acting_type type); -+ -+void beamforming_enter(void *dm_void, u16 sta_idx, u8 *my_mac_addr); -+ -+void beamforming_leave( -+ void *dm_void, -+ u8 *RA); -+ -+boolean -+beamforming_start_fw( -+ void *dm_void, -+ u8 idx); -+ -+void beamforming_check_sounding_success( -+ void *dm_void, -+ boolean status); -+ -+void phydm_beamforming_end_sw( -+ void *dm_void, -+ boolean status); -+ -+void beamforming_timer_callback( -+ void *dm_void); -+ -+void phydm_beamforming_init( -+ void *dm_void); -+ -+enum beamforming_cap -+phydm_beamforming_get_beam_cap( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beam_info); -+ -+enum beamforming_cap -+phydm_get_beamform_cap( -+ void *dm_void); -+ -+boolean -+beamforming_control_v1( -+ void *dm_void, -+ u8 *RA, -+ u8 AID, -+ u8 mode, -+ enum channel_width BW, -+ u8 rate); -+ -+boolean -+phydm_beamforming_control_v2( -+ void *dm_void, -+ u8 idx, -+ u8 mode, -+ enum channel_width BW, -+ u16 period); -+ -+void phydm_beamforming_watchdog( -+ void *dm_void); -+ -+void beamforming_sw_timer_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct phydm_timer_list *timer -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ void *function_context -+#endif -+ ); -+ -+boolean -+beamforming_send_ht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ enum channel_width BW, -+ u8 q_idx); -+ -+boolean -+beamforming_send_vht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ u16 AID, -+ enum channel_width BW, -+ u8 q_idx); -+ -+#else -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP)) -+#define beamforming_gid_paid(adapter, tcb) -+#define phydm_acting_determine(dm, type) false -+#define beamforming_enter(dm, sta_idx, my_mac_addr) -+#define beamforming_leave(dm, RA) -+#define beamforming_end_fw(dm) -+#define beamforming_control_v1(dm, RA, AID, mode, BW, rate) true -+#define beamforming_control_v2(dm, idx, mode, BW, period) true -+#define phydm_beamforming_end_sw(dm, _status) -+#define beamforming_timer_callback(dm) -+#define phydm_beamforming_init(dm) -+#define phydm_beamforming_control_v2(dm, _idx, _mode, _BW, _period) false -+#define beamforming_watchdog(dm) -+#define phydm_beamforming_watchdog(dm) -+#endif /*@(DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))*/ -+#endif /*@#ifdef PHYDM_BEAMFORMING_SUPPORT*/ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_pd.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_pd.c -new file mode 100644 -index 000000000000..c1c5be1dcd0f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_pd.c -@@ -0,0 +1,1906 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef PHYDM_SUPPORT_CCKPD -+#ifdef PHYDM_COMPILE_CCKPD_TYPE1 -+void phydm_write_cck_pd_type1(void *dm_void, u8 cca_th) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "[%s] cck_cca_th=((0x%x))\n", -+ __func__, cca_th); -+ -+ odm_write_1byte(dm, R_0xa0a, cca_th); -+ cckpd_t->cur_cck_cca_thres = cca_th; -+} -+ -+void phydm_set_cckpd_lv_type1(void *dm_void, enum cckpd_lv lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u8 pd_th = 0; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv); -+ -+ if (cckpd_t->cck_pd_lv == lv) { -+ PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv); -+ return; -+ } -+ -+ cckpd_t->cck_pd_lv = lv; -+ cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; -+ -+ if (lv == CCK_PD_LV_4) -+ pd_th = 0xed; -+ else if (lv == CCK_PD_LV_3) -+ pd_th = 0xdd; -+ else if (lv == CCK_PD_LV_2) -+ pd_th = 0xcd; -+ else if (lv == CCK_PD_LV_1) -+ pd_th = 0x83; -+ else if (lv == CCK_PD_LV_0) -+ pd_th = 0x40; -+ -+ phydm_write_cck_pd_type1(dm, pd_th); -+} -+ -+void phydm_cckpd_type1(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ enum cckpd_lv lv = CCK_PD_LV_INIT; -+ boolean is_update = true; -+ -+ if (dm->is_linked) { -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ if (dm->rssi_min > 60) { -+ lv = CCK_PD_LV_3; -+ } else if (dm->rssi_min > 35) { -+ lv = CCK_PD_LV_2; -+ } else if (dm->rssi_min > 20) { -+ if (cckpd_t->cck_fa_ma > 500) -+ lv = CCK_PD_LV_2; -+ else if (cckpd_t->cck_fa_ma < 250) -+ lv = CCK_PD_LV_1; -+ else -+ is_update = false; -+ } else { /*RSSI < 20*/ -+ lv = CCK_PD_LV_1; -+ } -+ #else /*ODM_AP*/ -+ if (dig_t->cur_ig_value > 0x32) -+ lv = CCK_PD_LV_4; -+ else if (dig_t->cur_ig_value > 0x2a) -+ lv = CCK_PD_LV_3; -+ else if (dig_t->cur_ig_value > 0x24) -+ lv = CCK_PD_LV_2; -+ else -+ lv = CCK_PD_LV_1; -+ #endif -+ } else { -+ if (cckpd_t->cck_fa_ma > 1000) -+ lv = CCK_PD_LV_1; -+ else if (cckpd_t->cck_fa_ma < 500) -+ lv = CCK_PD_LV_0; -+ else -+ is_update = false; -+ } -+ -+ /*[Abnormal case] =================================================*/ -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ /*@HP 22B LPS power consumption issue & [PCIE-1596]*/ -+ if (dm->hp_hw_id && dm->traffic_load == TRAFFIC_ULTRA_LOW) { -+ lv = CCK_PD_LV_0; -+ PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case1\n"); -+ } else if ((dm->p_advance_ota & PHYDM_ASUS_OTA_SETTING) && -+ cckpd_t->cck_fa_ma > 200 && dm->rssi_min <= 20) { -+ lv = CCK_PD_LV_1; -+ cckpd_t->cck_pd_lv = lv; -+ phydm_write_cck_pd_type1(dm, 0xc3); /*@for ASUS OTA test*/ -+ is_update = false; -+ PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case2\n"); -+ } -+ #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ #ifdef MCR_WIRELESS_EXTEND -+ lv = CCK_PD_LV_2; -+ cckpd_t->cck_pd_lv = lv; -+ phydm_write_cck_pd_type1(dm, 0x43); -+ is_update = false; -+ PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case3\n"); -+ #endif -+ #endif -+ /*=================================================================*/ -+ -+ if (is_update) -+ phydm_set_cckpd_lv_type1(dm, lv); -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "is_linked=%d, lv=%d, pd_th=0x%x\n\n", -+ dm->is_linked, cckpd_t->cck_pd_lv, -+ cckpd_t->cur_cck_cca_thres); -+} -+#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE1*/ -+ -+#ifdef PHYDM_COMPILE_CCKPD_TYPE2 -+void phydm_write_cck_pd_type2(void *dm_void, u8 cca_th, u8 cca_th_aaa) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "[%s] pd_th=0x%x, cs_ratio=0x%x\n", -+ __func__, cca_th, cca_th_aaa); -+ -+ odm_set_bb_reg(dm, R_0xa08, 0x3f0000, cca_th); -+ odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, cca_th_aaa); -+ cckpd_t->cur_cck_cca_thres = cca_th; -+ cckpd_t->cck_cca_th_aaa = cca_th_aaa; -+} -+ -+void phydm_set_cckpd_lv_type2(void *dm_void, enum cckpd_lv lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u8 pd_th = 0, cs_ratio = 0, cs_2r_offset = 0; -+ u8 cck_n_rx = 1; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv); -+ -+ /*@r_mrx & r_cca_mrc*/ -+ cck_n_rx = (odm_get_bb_reg(dm, R_0xa2c, BIT(18)) && -+ odm_get_bb_reg(dm, R_0xa2c, BIT(22))) ? 2 : 1; -+ -+ if (cckpd_t->cck_pd_lv == lv && cckpd_t->cck_n_rx == cck_n_rx) { -+ PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv); -+ return; -+ } -+ -+ cckpd_t->cck_n_rx = cck_n_rx; -+ cckpd_t->cck_pd_lv = lv; -+ cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; -+ -+ if (lv == CCK_PD_LV_4) { -+ cs_ratio = cckpd_t->aaa_default + 8; -+ cs_2r_offset = 5; -+ pd_th = 0xd; -+ } else if (lv == CCK_PD_LV_3) { -+ cs_ratio = cckpd_t->aaa_default + 6; -+ cs_2r_offset = 4; -+ pd_th = 0xd; -+ } else if (lv == CCK_PD_LV_2) { -+ cs_ratio = cckpd_t->aaa_default + 4; -+ cs_2r_offset = 3; -+ pd_th = 0xd; -+ } else if (lv == CCK_PD_LV_1) { -+ cs_ratio = cckpd_t->aaa_default + 2; -+ cs_2r_offset = 1; -+ pd_th = 0x7; -+ } else if (lv == CCK_PD_LV_0) { -+ cs_ratio = cckpd_t->aaa_default; -+ cs_2r_offset = 0; -+ pd_th = 0x3; -+ } -+ -+ if (cckpd_t->cck_n_rx == 2) { -+ if (cs_ratio >= cs_2r_offset) -+ cs_ratio = cs_ratio - cs_2r_offset; -+ else -+ cs_ratio = 0; -+ } -+ phydm_write_cck_pd_type2(dm, pd_th, cs_ratio); -+} -+ -+#if 0 -+void phydm_set_cckpd_lv_type2_bcn(void *dm_void, enum cckpd_lv lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u8 pd_th = 0, cs_ratio = 0, cs_2r_offset = 0; -+ u8 cck_n_rx = 1; -+ u8 cs_ratio_pre = 0; -+ u8 bcn_cnt = dm->phy_dbg_info.beacon_cnt_in_period; //BCN CNT -+ u8 ofst = 0; -+ u8 ofst_direc = 0; //0:+, 1:- -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv); -+ -+ /*@r_mrx & r_cca_mrc*/ -+ cck_n_rx = (odm_get_bb_reg(dm, R_0xa2c, BIT(18)) && -+ odm_get_bb_reg(dm, R_0xa2c, BIT(22))) ? 2 : 1; -+ cs_ratio_pre = (u8)((odm_get_bb_reg(dm, R_0xaa8, 0x1f0000))); -+ PHYDM_DBG(dm, DBG_CCKPD, "BCN: %d, pre CS ratio: 0x%x\n", bcn_cnt, -+ cs_ratio_pre); -+ -+ if (cckpd_t->cck_pd_lv == lv && cckpd_t->cck_n_rx == cck_n_rx && -+ (bcn_cnt >= 10 && bcn_cnt < 14)) { -+ PHYDM_DBG(dm, DBG_CCKPD, "BCN ok, stay lv=%d, cs ratio=0x%x\n", -+ lv, cs_ratio_pre); -+ return; -+ } -+ -+ cckpd_t->cck_n_rx = cck_n_rx; -+ cckpd_t->cck_pd_lv = lv; -+ cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; -+ -+ if (lv == CCK_PD_LV_4) { -+ cs_ratio = cckpd_t->aaa_default + 8; -+ cs_2r_offset = 5; -+ pd_th = 0xd; -+ } else if (lv == CCK_PD_LV_3) { -+ cs_ratio = cckpd_t->aaa_default + 6; -+ cs_2r_offset = 4; -+ pd_th = 0xd; -+ } else if (lv == CCK_PD_LV_2) { -+ cs_ratio = cckpd_t->aaa_default + 4; -+ cs_2r_offset = 3; -+ pd_th = 0xd; -+ } else if (lv == CCK_PD_LV_1) { -+ cs_ratio = cckpd_t->aaa_default + 2; -+ cs_2r_offset = 1; -+ pd_th = 0x7; -+ } else if (lv == CCK_PD_LV_0) { -+ cs_ratio = cckpd_t->aaa_default; -+ cs_2r_offset = 0; -+ pd_th = 0x3; -+ } -+ -+ if (cckpd_t->cck_n_rx == 2) { -+ if (cs_ratio >= cs_2r_offset) -+ cs_ratio = cs_ratio - cs_2r_offset; -+ else -+ cs_ratio = 0; -+ } -+ -+ if (bcn_cnt >= 18) { -+ ofst_direc = 0; -+ ofst = 0x2; -+ } else if (bcn_cnt >= 14) { -+ ofst_direc = 0; -+ ofst = 0x1; -+ } else if (bcn_cnt >= 10) { -+ ofst_direc = 0; -+ ofst = 0x0; -+ } else if (bcn_cnt >= 5) { -+ ofst_direc = 1; -+ ofst = 0x3; -+ } else { -+ ofst_direc = 1; -+ ofst = 0x4; -+ } -+ PHYDM_DBG(dm, DBG_CCKPD, "bcn:(%d), ofst:(%s%d)\n", bcn_cnt, -+ ((ofst_direc) ? "-" : "+"), ofst); -+ -+ if (ofst_direc == 0) -+ cs_ratio = cs_ratio + ofst; -+ else -+ cs_ratio = cs_ratio - ofst; -+ -+ if (cs_ratio == cs_ratio_pre) { -+ PHYDM_DBG(dm, DBG_CCKPD, "Same cs ratio, lv=%d cs_ratio=0x%x\n", -+ lv, cs_ratio); -+ return; -+ } -+ phydm_write_cck_pd_type2(dm, pd_th, cs_ratio); -+} -+#endif -+ -+void phydm_cckpd_type2(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ enum cckpd_lv lv = CCK_PD_LV_INIT; -+ u8 igi = dig_t->cur_ig_value; -+ u8 rssi_min = dm->rssi_min; -+ boolean is_update = true; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ -+ if (dm->is_linked) { -+ if (igi > 0x38 && rssi_min > 32) { -+ lv = CCK_PD_LV_4; -+ } else if (igi > 0x2a && rssi_min > 32) { -+ lv = CCK_PD_LV_3; -+ } else if (igi > 0x24 || (rssi_min > 24 && rssi_min <= 30)) { -+ lv = CCK_PD_LV_2; -+ } else if (igi <= 0x24 || rssi_min < 22) { -+ if (cckpd_t->cck_fa_ma > 1000) { -+ lv = CCK_PD_LV_1; -+ } else if (cckpd_t->cck_fa_ma < 500) { -+ lv = CCK_PD_LV_0; -+ } else { -+ is_update = false; -+ } -+ } else { -+ is_update = false; -+ } -+ } else { -+ if (cckpd_t->cck_fa_ma > 1000) { -+ lv = CCK_PD_LV_1; -+ } else if (cckpd_t->cck_fa_ma < 500) { -+ lv = CCK_PD_LV_0; -+ } else { -+ is_update = false; -+ } -+ } -+ -+ /*[Abnormal case] =================================================*/ -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ /*@21C Miracast lag issue & [PCIE-3298]*/ -+ if (dm->support_ic_type & ODM_RTL8821C && rssi_min > 60) { -+ lv = CCK_PD_LV_4; -+ cckpd_t->cck_pd_lv = lv; -+ phydm_write_cck_pd_type2(dm, 0x1d, (cckpd_t->aaa_default + 8)); -+ is_update = false; -+ PHYDM_DBG(dm, DBG_CCKPD, "CCKPD Abnormal case1\n"); -+ } -+ #endif -+ /*=================================================================*/ -+ -+ if (is_update) { -+ phydm_set_cckpd_lv_type2(dm, lv); -+ } -+ -+ PHYDM_DBG(dm, DBG_CCKPD, -+ "is_linked=%d, lv=%d, n_rx=%d, cs_ratio=0x%x, pd_th=0x%x\n\n", -+ dm->is_linked, cckpd_t->cck_pd_lv, cckpd_t->cck_n_rx, -+ cckpd_t->cck_cca_th_aaa, cckpd_t->cur_cck_cca_thres); -+} -+#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE2*/ -+ -+#ifdef PHYDM_COMPILE_CCKPD_TYPE3 -+void phydm_write_cck_pd_type3(void *dm_void, u8 pd_th, u8 cs_ratio, -+ enum cckpd_mode mode) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, -+ "[%s] mode=%d, pd_th=0x%x, cs_ratio=0x%x\n", __func__, -+ mode, pd_th, cs_ratio); -+ -+ switch (mode) { -+ case CCK_BW20_1R: /*RFBW20_1R*/ -+ { -+ cckpd_t->cur_cck_pd_20m_1r = pd_th; -+ cckpd_t->cur_cck_cs_ratio_20m_1r = cs_ratio; -+ odm_set_bb_reg(dm, R_0xac8, 0xff, pd_th); -+ odm_set_bb_reg(dm, R_0xad0, 0x1f, cs_ratio); -+ } break; -+ case CCK_BW20_2R: /*RFBW20_2R*/ -+ { -+ cckpd_t->cur_cck_pd_20m_2r = pd_th; -+ cckpd_t->cur_cck_cs_ratio_20m_2r = cs_ratio; -+ odm_set_bb_reg(dm, R_0xac8, 0xff00, pd_th); -+ odm_set_bb_reg(dm, R_0xad0, 0x3e0, cs_ratio); -+ } break; -+ case CCK_BW40_1R: /*RFBW40_1R*/ -+ { -+ cckpd_t->cur_cck_pd_40m_1r = pd_th; -+ cckpd_t->cur_cck_cs_ratio_40m_1r = cs_ratio; -+ odm_set_bb_reg(dm, R_0xacc, 0xff, pd_th); -+ odm_set_bb_reg(dm, R_0xad0, 0x1f00000, cs_ratio); -+ } break; -+ case CCK_BW40_2R: /*RFBW40_2R*/ -+ { -+ cckpd_t->cur_cck_pd_40m_2r = pd_th; -+ cckpd_t->cur_cck_cs_ratio_40m_2r = cs_ratio; -+ odm_set_bb_reg(dm, R_0xacc, 0xff00, pd_th); -+ odm_set_bb_reg(dm, R_0xad0, 0x3e000000, cs_ratio); -+ } break; -+ -+ default: -+ /*@pr_debug("[%s] warning!\n", __func__);*/ -+ break; -+ } -+} -+ -+void phydm_set_cckpd_lv_type3(void *dm_void, enum cckpd_lv lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ enum cckpd_mode cck_mode = CCK_BW20_2R; -+ enum channel_width cck_bw = CHANNEL_WIDTH_20; -+ u8 cck_n_rx = 1; -+ u8 pd_th; -+ u8 cs_ratio; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv); -+ -+ /*[Check Nrx]*/ -+ cck_n_rx = (odm_get_bb_reg(dm, R_0xa2c, BIT(17))) ? 2 : 1; -+ -+ /*[Check BW]*/ -+ if (odm_get_bb_reg(dm, R_0x800, BIT(0))) -+ cck_bw = CHANNEL_WIDTH_40; -+ else -+ cck_bw = CHANNEL_WIDTH_20; -+ -+ /*[Check LV]*/ -+ if (cckpd_t->cck_pd_lv == lv && -+ cckpd_t->cck_n_rx == cck_n_rx && -+ cckpd_t->cck_bw == cck_bw) { -+ PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv); -+ return; -+ } -+ -+ cckpd_t->cck_bw = cck_bw; -+ cckpd_t->cck_n_rx = cck_n_rx; -+ cckpd_t->cck_pd_lv = lv; -+ cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; -+ -+ if (cck_n_rx == 2) { -+ if (cck_bw == CHANNEL_WIDTH_20) { -+ pd_th = cckpd_t->cck_pd_20m_2r; -+ cs_ratio = cckpd_t->cck_cs_ratio_20m_2r; -+ cck_mode = CCK_BW20_2R; -+ } else { -+ pd_th = cckpd_t->cck_pd_40m_2r; -+ cs_ratio = cckpd_t->cck_cs_ratio_40m_2r; -+ cck_mode = CCK_BW40_2R; -+ } -+ } else { -+ if (cck_bw == CHANNEL_WIDTH_20) { -+ pd_th = cckpd_t->cck_pd_20m_1r; -+ cs_ratio = cckpd_t->cck_cs_ratio_20m_1r; -+ cck_mode = CCK_BW20_1R; -+ } else { -+ pd_th = cckpd_t->cck_pd_40m_1r; -+ cs_ratio = cckpd_t->cck_cs_ratio_40m_1r; -+ cck_mode = CCK_BW40_1R; -+ } -+ } -+ -+ if (lv == CCK_PD_LV_4) { -+ if (cck_n_rx == 2) { -+ pd_th += 4; -+ cs_ratio += 2; -+ } else { -+ pd_th += 4; -+ cs_ratio += 3; -+ } -+ } else if (lv == CCK_PD_LV_3) { -+ if (cck_n_rx == 2) { -+ pd_th += 3; -+ cs_ratio += 1; -+ } else { -+ pd_th += 3; -+ cs_ratio += 2; -+ } -+ } else if (lv == CCK_PD_LV_2) { -+ pd_th += 2; -+ cs_ratio += 1; -+ } else if (lv == CCK_PD_LV_1) { -+ pd_th += 1; -+ cs_ratio += 1; -+ } -+ -+ phydm_write_cck_pd_type3(dm, pd_th, cs_ratio, cck_mode); -+} -+ -+void phydm_cckpd_type3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ enum cckpd_lv lv = CCK_PD_LV_INIT; -+ u8 igi = dm->dm_dig_table.cur_ig_value; -+ boolean is_update = true; -+ u8 pd_th = 0; -+ u8 cs_ratio = 0; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ -+ if (dm->is_linked) { -+ if (igi > 0x38 && dm->rssi_min > 32) { -+ lv = CCK_PD_LV_4; -+ } else if ((igi > 0x2a) && (dm->rssi_min > 32)) { -+ lv = CCK_PD_LV_3; -+ } else if ((igi > 0x24) || -+ (dm->rssi_min > 24 && dm->rssi_min <= 30)) { -+ lv = CCK_PD_LV_2; -+ } else if ((igi <= 0x24) || (dm->rssi_min < 22)) { -+ if (cckpd_t->cck_fa_ma > 1000) -+ lv = CCK_PD_LV_1; -+ else if (cckpd_t->cck_fa_ma < 500) -+ lv = CCK_PD_LV_0; -+ else -+ is_update = false; -+ } -+ } else { -+ if (cckpd_t->cck_fa_ma > 1000) -+ lv = CCK_PD_LV_1; -+ else if (cckpd_t->cck_fa_ma < 500) -+ lv = CCK_PD_LV_0; -+ else -+ is_update = false; -+ } -+ -+ if (is_update) -+ phydm_set_cckpd_lv_type3(dm, lv); -+ -+ if (cckpd_t->cck_n_rx == 2) { -+ if (cckpd_t->cck_bw == CHANNEL_WIDTH_20) { -+ pd_th = cckpd_t->cur_cck_pd_20m_2r; -+ cs_ratio = cckpd_t->cur_cck_cs_ratio_20m_2r; -+ } else { -+ pd_th = cckpd_t->cur_cck_pd_40m_2r; -+ cs_ratio = cckpd_t->cur_cck_cs_ratio_40m_2r; -+ } -+ } else { -+ if (cckpd_t->cck_bw == CHANNEL_WIDTH_20) { -+ pd_th = cckpd_t->cur_cck_pd_20m_1r; -+ cs_ratio = cckpd_t->cur_cck_cs_ratio_20m_1r; -+ } else { -+ pd_th = cckpd_t->cur_cck_pd_40m_1r; -+ cs_ratio = cckpd_t->cur_cck_cs_ratio_40m_1r; -+ } -+ } -+ PHYDM_DBG(dm, DBG_CCKPD, -+ "[%dR][%dM] is_linked=%d, lv=%d, cs_ratio=0x%x, pd_th=0x%x\n\n", -+ cckpd_t->cck_n_rx, 20 << cckpd_t->cck_bw, dm->is_linked, -+ cckpd_t->cck_pd_lv, cs_ratio, pd_th); -+} -+ -+void phydm_cck_pd_init_type3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u32 reg_tmp = 0; -+ -+ /*Get Default value*/ -+ cckpd_t->cck_pd_20m_1r = (u8)odm_get_bb_reg(dm, R_0xac8, 0xff); -+ cckpd_t->cck_pd_20m_2r = (u8)odm_get_bb_reg(dm, R_0xac8, 0xff00); -+ cckpd_t->cck_pd_40m_1r = (u8)odm_get_bb_reg(dm, R_0xacc, 0xff); -+ cckpd_t->cck_pd_40m_2r = (u8)odm_get_bb_reg(dm, R_0xacc, 0xff00); -+ -+ reg_tmp = odm_get_bb_reg(dm, R_0xad0, MASKDWORD); -+ cckpd_t->cck_cs_ratio_20m_1r = (u8)(reg_tmp & 0x1f); -+ cckpd_t->cck_cs_ratio_20m_2r = (u8)((reg_tmp & 0x3e0) >> 5); -+ cckpd_t->cck_cs_ratio_40m_1r = (u8)((reg_tmp & 0x1f00000) >> 20); -+ cckpd_t->cck_cs_ratio_40m_2r = (u8)((reg_tmp & 0x3e000000) >> 25); -+} -+#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE3*/ -+ -+#ifdef PHYDM_COMPILE_CCKPD_TYPE4 -+void phydm_write_cck_pd_type4(void *dm_void, enum cckpd_lv lv, -+ enum cckpd_mode mode) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u32 val = 0; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "write CCK CCA parameters(CS_ratio & PD)\n"); -+ switch (mode) { -+ case CCK_BW20_1R: /*RFBW20_1R*/ -+ { -+ val = cckpd_t->cckpd_jgr3[0][0][0][lv]; -+ odm_set_bb_reg(dm, R_0x1ac8, 0xff, val); -+ val = cckpd_t->cckpd_jgr3[0][0][1][lv]; -+ odm_set_bb_reg(dm, R_0x1ad0, 0x1f, val); -+ } break; -+ case CCK_BW40_1R: /*RFBW40_1R*/ -+ { -+ val = cckpd_t->cckpd_jgr3[1][0][0][lv]; -+ odm_set_bb_reg(dm, R_0x1acc, 0xff, val); -+ val = cckpd_t->cckpd_jgr3[1][0][1][lv]; -+ odm_set_bb_reg(dm, R_0x1ad0, 0x01F00000, val); -+ } break; -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case CCK_BW20_2R: /*RFBW20_2R*/ -+ { -+ val = cckpd_t->cckpd_jgr3[0][1][0][lv]; -+ odm_set_bb_reg(dm, R_0x1ac8, 0xff00, val); -+ val = cckpd_t->cckpd_jgr3[0][1][1][lv]; -+ odm_set_bb_reg(dm, R_0x1ad0, 0x3e0, val); -+ } break; -+ case CCK_BW40_2R: /*RFBW40_2R*/ -+ { -+ val = cckpd_t->cckpd_jgr3[1][1][0][lv]; -+ odm_set_bb_reg(dm, R_0x1acc, 0xff00, val); -+ val = cckpd_t->cckpd_jgr3[1][1][1][lv]; -+ odm_set_bb_reg(dm, R_0x1ad0, 0x3E000000, val); -+ } break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case CCK_BW20_3R: /*RFBW20_3R*/ -+ { -+ val = cckpd_t->cckpd_jgr3[0][2][0][lv]; -+ odm_set_bb_reg(dm, R_0x1ac8, 0xff0000, val); -+ val = cckpd_t->cckpd_jgr3[0][2][1][lv]; -+ odm_set_bb_reg(dm, R_0x1ad0, 0x7c00, val); -+ } break; -+ case CCK_BW40_3R: /*RFBW40_3R*/ -+ { -+ val = cckpd_t->cckpd_jgr3[1][2][0][lv]; -+ odm_set_bb_reg(dm, R_0x1acc, 0xff0000, val); -+ val = cckpd_t->cckpd_jgr3[1][2][1][lv] & 0x3; -+ odm_set_bb_reg(dm, R_0x1ad0, 0xC0000000, val); -+ val = (cckpd_t->cckpd_jgr3[1][2][1][lv] & 0x1c) >> 2; -+ odm_set_bb_reg(dm, R_0x1ad4, 0x7, val); -+ } break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case CCK_BW20_4R: /*RFBW20_4R*/ -+ { -+ val = cckpd_t->cckpd_jgr3[0][3][0][lv]; -+ odm_set_bb_reg(dm, R_0x1ac8, 0xff000000, val); -+ val = cckpd_t->cckpd_jgr3[0][3][1][lv]; -+ odm_set_bb_reg(dm, R_0x1ad0, 0xF8000, val); -+ } break; -+ case CCK_BW40_4R: /*RFBW40_4R*/ -+ { -+ val = cckpd_t->cckpd_jgr3[1][3][0][lv]; -+ odm_set_bb_reg(dm, R_0x1acc, 0xff000000, val); -+ val = cckpd_t->cckpd_jgr3[1][3][1][lv]; -+ odm_set_bb_reg(dm, R_0x1ad4, 0xf8, val); -+ } break; -+ #endif -+ default: -+ /*@pr_debug("[%s] warning!\n", __func__);*/ -+ break; -+ } -+} -+ -+void phydm_set_cck_pd_lv_type4(void *dm_void, enum cckpd_lv lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ enum cckpd_mode cck_mode = CCK_BW20_2R; -+ enum channel_width cck_bw = CHANNEL_WIDTH_20; -+ u8 cck_n_rx = 0; -+ u32 val = 0; -+ /*u32 val_dbg = 0;*/ -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv); -+ -+ /*[Check Nrx]*/ -+ cck_n_rx = (u8)odm_get_bb_reg(dm, R_0x1a2c, 0x60000) + 1; -+ -+ /*[Check BW]*/ -+ val = odm_get_bb_reg(dm, R_0x9b0, 0xc); -+ if (val == 0) -+ cck_bw = CHANNEL_WIDTH_20; -+ else if (val == 1) -+ cck_bw = CHANNEL_WIDTH_40; -+ else -+ cck_bw = CHANNEL_WIDTH_80; -+ -+ /*[Check LV]*/ -+ if (cckpd_t->cck_pd_lv == lv && -+ cckpd_t->cck_n_rx == cck_n_rx && -+ cckpd_t->cck_bw == cck_bw) { -+ PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv); -+ return; -+ } -+ -+ cckpd_t->cck_bw = cck_bw; -+ cckpd_t->cck_n_rx = cck_n_rx; -+ cckpd_t->cck_pd_lv = lv; -+ cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; -+ -+ switch (cck_n_rx) { -+ case 1: /*1R*/ -+ { -+ if (cck_bw == CHANNEL_WIDTH_20) -+ cck_mode = CCK_BW20_1R; -+ else if (cck_bw == CHANNEL_WIDTH_40) -+ cck_mode = CCK_BW40_1R; -+ } break; -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case 2: /*2R*/ -+ { -+ if (cck_bw == CHANNEL_WIDTH_20) -+ cck_mode = CCK_BW20_2R; -+ else if (cck_bw == CHANNEL_WIDTH_40) -+ cck_mode = CCK_BW40_2R; -+ } break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case 3: /*3R*/ -+ { -+ if (cck_bw == CHANNEL_WIDTH_20) -+ cck_mode = CCK_BW20_3R; -+ else if (cck_bw == CHANNEL_WIDTH_40) -+ cck_mode = CCK_BW40_3R; -+ } break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case 4: /*4R*/ -+ { -+ if (cck_bw == CHANNEL_WIDTH_20) -+ cck_mode = CCK_BW20_4R; -+ else if (cck_bw == CHANNEL_WIDTH_40) -+ cck_mode = CCK_BW40_4R; -+ } break; -+ #endif -+ default: -+ /*@pr_debug("[%s] warning!\n", __func__);*/ -+ break; -+ } -+ phydm_write_cck_pd_type4(dm, lv, cck_mode); -+} -+ -+void phydm_read_cckpd_para_type4(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u8 bw = 0; /*r_RX_RF_BW*/ -+ u8 n_rx = 0; -+ u8 curr_cck_pd_t[2][4][2]; -+ u32 reg0 = 0; -+ u32 reg1 = 0; -+ u32 reg2 = 0; -+ u32 reg3 = 0; -+ -+ if (!(dm->debug_components & DBG_CCKPD)) -+ return; -+ -+ bw = (u8)odm_get_bb_reg(dm, R_0x9b0, 0xc); -+ n_rx = (u8)odm_get_bb_reg(dm, R_0x1a2c, 0x60000) + 1; -+ -+ reg0 = odm_get_bb_reg(dm, R_0x1ac8, MASKDWORD); -+ reg1 = odm_get_bb_reg(dm, R_0x1acc, MASKDWORD); -+ reg2 = odm_get_bb_reg(dm, R_0x1ad0, MASKDWORD); -+ reg3 = odm_get_bb_reg(dm, R_0x1ad4, MASKDWORD); -+ curr_cck_pd_t[0][0][0] = (u8)(reg0 & 0x000000ff); -+ curr_cck_pd_t[1][0][0] = (u8)(reg1 & 0x000000ff); -+ curr_cck_pd_t[0][0][1] = (u8)(reg2 & 0x0000001f); -+ curr_cck_pd_t[1][0][1] = (u8)((reg2 & 0x01f00000) >> 20); -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) { -+ curr_cck_pd_t[0][1][0] = (u8)((reg0 & 0x0000ff00) >> 8); -+ curr_cck_pd_t[1][1][0] = (u8)((reg1 & 0x0000ff00) >> 8); -+ curr_cck_pd_t[0][1][1] = (u8)((reg2 & 0x000003E0) >> 5); -+ curr_cck_pd_t[1][1][1] = (u8)((reg2 & 0x3E000000) >> 25); -+ } -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS) { -+ curr_cck_pd_t[0][2][0] = (u8)((reg0 & 0x00ff0000) >> 16); -+ curr_cck_pd_t[1][2][0] = (u8)((reg1 & 0x00ff0000) >> 16); -+ curr_cck_pd_t[0][2][1] = (u8)((reg2 & 0x00007C00) >> 10); -+ curr_cck_pd_t[1][2][1] = (u8)((reg2 & 0xC0000000) >> 30) | -+ (u8)((reg3 & 0x00000007) << 2); -+ } -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { -+ curr_cck_pd_t[0][3][0] = (u8)((reg0 & 0xff000000) >> 24); -+ curr_cck_pd_t[1][3][0] = (u8)((reg1 & 0xff000000) >> 24); -+ curr_cck_pd_t[0][3][1] = (u8)((reg2 & 0x000F8000) >> 15); -+ curr_cck_pd_t[1][3][1] = (u8)((reg3 & 0x000000F8) >> 3); -+ } -+ #endif -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "bw=%dM, Nrx=%d\n", 20 << bw, n_rx); -+ PHYDM_DBG(dm, DBG_CCKPD, "lv=%d, readback CS_th=0x%x, PD th=0x%x\n", -+ cckpd_t->cck_pd_lv, -+ curr_cck_pd_t[bw][n_rx - 1][1], -+ curr_cck_pd_t[bw][n_rx - 1][0]); -+} -+ -+void phydm_cckpd_type4(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u8 igi = dm->dm_dig_table.cur_ig_value; -+ enum cckpd_lv lv = 0; -+ boolean is_update = true; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ -+ if (dm->is_linked) { -+ PHYDM_DBG(dm, DBG_CCKPD, "Linked!!!\n"); -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ if (dm->rssi_min > 40) { -+ lv = CCK_PD_LV_4; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 1\n"); -+ } else if (dm->rssi_min > 32) { -+ lv = CCK_PD_LV_3; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 2\n"); -+ } else if (dm->rssi_min > 24) { -+ lv = CCK_PD_LV_2; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 3\n"); -+ } else { -+ if (cckpd_t->cck_fa_ma > 1000) { -+ lv = CCK_PD_LV_1; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 4-1\n"); -+ } else if (cckpd_t->cck_fa_ma < 500) { -+ lv = CCK_PD_LV_0; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 4-2\n"); -+ } else { -+ is_update = false; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 4-3\n"); -+ } -+ } -+ #else /*ODM_AP*/ -+ if (igi > 0x38 && dm->rssi_min > 32) { -+ lv = CCK_PD_LV_4; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 1\n"); -+ } else if (igi > 0x2a && dm->rssi_min > 32) { -+ lv = CCK_PD_LV_3; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 2\n"); -+ } else if (igi > 0x24 || dm->rssi_min > 24) { -+ lv = CCK_PD_LV_2; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 3\n"); -+ } else { -+ if (cckpd_t->cck_fa_ma > 1000) { -+ lv = CCK_PD_LV_1; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 4-1\n"); -+ } else if (cckpd_t->cck_fa_ma < 500) { -+ lv = CCK_PD_LV_0; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 4-2\n"); -+ } else { -+ is_update = false; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 4-3\n"); -+ } -+ } -+ #endif -+ } else { -+ PHYDM_DBG(dm, DBG_CCKPD, "UnLinked!!!\n"); -+ if (cckpd_t->cck_fa_ma > 1000) { -+ lv = CCK_PD_LV_1; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 1\n"); -+ } else if (cckpd_t->cck_fa_ma < 500) { -+ lv = CCK_PD_LV_0; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 2\n"); -+ } else { -+ is_update = false; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 3\n"); -+ } -+ } -+ -+ if (is_update) { -+ phydm_set_cck_pd_lv_type4(dm, lv); -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "setting CS_th = 0x%x, PD th = 0x%x\n", -+ cckpd_t->cckpd_jgr3[cckpd_t->cck_bw] -+ [cckpd_t->cck_n_rx - 1][1][lv], -+ cckpd_t->cckpd_jgr3[cckpd_t->cck_bw] -+ [cckpd_t->cck_n_rx - 1][0][lv]); -+ } -+ phydm_read_cckpd_para_type4(dm); -+} -+ -+void phydm_cck_pd_init_type4(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u32 reg0 = 0; -+ u32 reg1 = 0; -+ u32 reg2 = 0; -+ u32 reg3 = 0; -+ u8 pw_step = 0; -+ u8 cs_step = 0; -+ u8 cck_bw = 0; /*r_RX_RF_BW*/ -+ u8 cck_n_rx = 0; -+ u8 val = 0; -+ u8 i = 0; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "[%s]======>\n", __func__); -+ -+ #if 0 -+ /*@ -+ *cckpd_t[0][0][0][0] = 1ac8[7:0] r_PD_lim_RFBW20_1R -+ *cckpd_t[0][1][0][0] = 1ac8[15:8] r_PD_lim_RFBW20_2R -+ *cckpd_t[0][2][0][0] = 1ac8[23:16] r_PD_lim_RFBW20_3R -+ *cckpd_t[0][3][0][0] = 1ac8[31:24] r_PD_lim_RFBW20_4R -+ *cckpd_t[1][0][0][0] = 1acc[7:0] r_PD_lim_RFBW40_1R -+ *cckpd_t[1][1][0][0] = 1acc[15:8] r_PD_lim_RFBW40_2R -+ *cckpd_t[1][2][0][0] = 1acc[23:16] r_PD_lim_RFBW40_3R -+ *cckpd_t[1][3][0][0] = 1acc[31:24] r_PD_lim_RFBW40_4R -+ * -+ * -+ *cckpd_t[0][0][1][0] = 1ad0[4:0] r_CS_ratio_RFBW20_1R[4:0] -+ *cckpd_t[0][1][1][0] = 1ad0[9:5] r_CS_ratio_RFBW20_2R[4:0] -+ *cckpd_t[0][2][1][0] = 1ad0[14:10] r_CS_ratio_RFBW20_3R[4:0] -+ *cckpd_t[0][3][1][0] = 1ad0[19:15] r_CS_ratio_RFBW20_4R[4:0] -+ *cckpd_t[1][0][1][0] = 1ad0[24:20] r_CS_ratio_RFBW40_1R[4:0] -+ *cckpd_t[1][1][1][0] = 1ad0[29:25] r_CS_ratio_RFBW40_2R[4:0] -+ *cckpd_t[1][2][1][0] = 1ad0[31:30] r_CS_ratio_RFBW40_3R[1:0] -+ * 1ad4[2:0] r_CS_ratio_RFBW40_3R[4:2] -+ *cckpd_t[1][3][1][0] = 1ad4[7:3] r_CS_ratio_RFBW40_4R[4:0] -+ */ -+ #endif -+ /*[Check Nrx]*/ -+ cck_n_rx = (u8)odm_get_bb_reg(dm, R_0x1a2c, 0x60000) + 1; -+ -+ /*[Check BW]*/ -+ val = (u8)odm_get_bb_reg(dm, R_0x9b0, 0xc); -+ if (val == 0) -+ cck_bw = CHANNEL_WIDTH_20; -+ else if (val == 1) -+ cck_bw = CHANNEL_WIDTH_40; -+ else -+ cck_bw = CHANNEL_WIDTH_80; -+ -+ cckpd_t->cck_bw = cck_bw; -+ cckpd_t->cck_n_rx = cck_n_rx; -+ reg0 = odm_get_bb_reg(dm, R_0x1ac8, MASKDWORD); -+ reg1 = odm_get_bb_reg(dm, R_0x1acc, MASKDWORD); -+ reg2 = odm_get_bb_reg(dm, R_0x1ad0, MASKDWORD); -+ reg3 = odm_get_bb_reg(dm, R_0x1ad4, MASKDWORD); -+ -+ for (i = 0 ; i < CCK_PD_LV_MAX ; i++) { -+ pw_step = i * 2; -+ cs_step = i * 2; -+ -+ #if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197G) { -+ pw_step = i; -+ cs_step = i; -+ if (i > CCK_PD_LV_3) { -+ pw_step = 3; -+ cs_step = 3; -+ } -+ } -+ #endif -+ -+ #if (RTL8822C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8822C) { -+ if (i == CCK_PD_LV_1) { -+ pw_step = 9; /*IGI-19.2:0x11=d'17*/ -+ cs_step = 0; -+ } else if (i == CCK_PD_LV_2) { -+ pw_step = 12; /*IGI-15.5:0x14=d'20*/ -+ cs_step = 1; -+ } else if (i == CCK_PD_LV_3) { -+ pw_step = 14; /*IGI-14:0x16=d'22*/ -+ cs_step = 1; -+ } else if (i == CCK_PD_LV_4) { -+ pw_step = 17; /*IGI-12:0x19=d'25*/ -+ cs_step = 1; -+ } -+ } -+ #endif -+ -+ val = (u8)(reg0 & 0x000000ff) + pw_step; -+ PHYDM_DBG(dm, DBG_CCKPD, "lvl %d val = %x\n\n", i, val); -+ cckpd_t->cckpd_jgr3[0][0][0][i] = val; -+ -+ val = (u8)(reg1 & 0x000000ff) + pw_step; -+ cckpd_t->cckpd_jgr3[1][0][0][i] = val; -+ -+ val = (u8)(reg2 & 0x0000001f) + cs_step; -+ cckpd_t->cckpd_jgr3[0][0][1][i] = val; -+ -+ val = (u8)((reg2 & 0x01f00000) >> 20) + cs_step; -+ cckpd_t->cckpd_jgr3[1][0][1][i] = val; -+ -+ #ifdef PHYDM_COMPILE_ABOVE_2SS -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) { -+ val = (u8)((reg0 & 0x0000ff00) >> 8) + pw_step; -+ cckpd_t->cckpd_jgr3[0][1][0][i] = val; -+ -+ val = (u8)((reg1 & 0x0000ff00) >> 8) + pw_step; -+ cckpd_t->cckpd_jgr3[1][1][0][i] = val; -+ -+ val = (u8)((reg2 & 0x000003e0) >> 5) + cs_step; -+ cckpd_t->cckpd_jgr3[0][1][1][i] = val; -+ -+ val = (u8)((reg2 & 0x3e000000) >> 25) + cs_step; -+ cckpd_t->cckpd_jgr3[1][1][1][i] = val; -+ } -+ #endif -+ -+ #ifdef PHYDM_COMPILE_ABOVE_3SS -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS) { -+ val = (u8)((reg0 & 0x00ff0000) >> 16) + pw_step; -+ cckpd_t->cckpd_jgr3[0][2][0][i] = val; -+ -+ val = (u8)((reg1 & 0x00ff0000) >> 16) + pw_step; -+ cckpd_t->cckpd_jgr3[1][2][0][i] = val; -+ val = (u8)((reg2 & 0x00007c00) >> 10) + cs_step; -+ cckpd_t->cckpd_jgr3[0][2][1][i] = val; -+ val = (u8)(((reg2 & 0xc0000000) >> 30) | -+ ((reg3 & 0x7) << 3)) + cs_step; -+ cckpd_t->cckpd_jgr3[1][2][1][i] = val; -+ } -+ #endif -+ -+ #ifdef PHYDM_COMPILE_ABOVE_4SS -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { -+ val = (u8)((reg0 & 0xff000000) >> 24) + pw_step; -+ cckpd_t->cckpd_jgr3[0][3][0][i] = val; -+ -+ val = (u8)((reg1 & 0xff000000) >> 24) + pw_step; -+ cckpd_t->cckpd_jgr3[1][3][0][i] = val; -+ -+ val = (u8)((reg2 & 0x000f8000) >> 15) + cs_step; -+ cckpd_t->cckpd_jgr3[0][3][1][i] = val; -+ -+ val = (u8)((reg3 & 0x000000f8) >> 3) + cs_step; -+ cckpd_t->cckpd_jgr3[1][3][1][i] = val; -+ } -+ #endif -+ } -+} -+ -+void phydm_invalid_cckpd_type4(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u8 val = 0; -+ u8 i = 0; -+ u8 j = 0; -+ u8 k = 0; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "[%s]======>\n", __func__); -+ -+ for (i = 0; i < CCK_PD_LV_MAX; i++) { -+ for (j = 0; j < 2; j++) { -+ for (k = 0; k < dm->num_rf_path; k++) { -+ val = cckpd_t->cckpd_jgr3[j][k][1][i]; -+ if (val == INVALID_CS_RATIO_0) -+ cckpd_t->cckpd_jgr3[j][k][1][i] = 0x1c; -+ else if (val == INVALID_CS_RATIO_1) -+ cckpd_t->cckpd_jgr3[j][k][1][i] = 0x1e; -+ else if (val > MAXVALID_CS_RATIO) -+ cckpd_t->cckpd_jgr3[j][k][1][i] = -+ MAXVALID_CS_RATIO; -+ } -+ } -+ -+ #if (RTL8198F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8198F) { -+ val = cckpd_t->cckpd_jgr3[0][3][1][i]; -+ if (i == CCK_PD_LV_1 && val > 0x10) -+ cckpd_t->cckpd_jgr3[0][3][1][i] = 0x10; -+ else if (i == CCK_PD_LV_2 && val > 0x10) -+ cckpd_t->cckpd_jgr3[0][3][1][i] = 0x10; -+ else if (i == CCK_PD_LV_3 && val > 0x10) -+ cckpd_t->cckpd_jgr3[0][3][1][i] = 0x10; -+ else if (i == CCK_PD_LV_4 && val > 0x10) -+ cckpd_t->cckpd_jgr3[0][3][1][i] = 0x10; -+ val = cckpd_t->cckpd_jgr3[1][3][1][i]; -+ if (i == CCK_PD_LV_1 && val > 0xF) -+ cckpd_t->cckpd_jgr3[1][3][1][i] = 0xF; -+ else if (i == CCK_PD_LV_2 && val > 0xF) -+ cckpd_t->cckpd_jgr3[1][3][1][i] = 0xF; -+ else if (i == CCK_PD_LV_3 && val > 0xF) -+ cckpd_t->cckpd_jgr3[1][3][1][i] = 0xF; -+ else if (i == CCK_PD_LV_4 && val > 0xF) -+ cckpd_t->cckpd_jgr3[1][3][1][i] = 0xF; -+ } -+ #endif -+ } -+} -+ -+#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE4*/ -+ -+ -+#ifdef PHYDM_COMPILE_CCKPD_TYPE5 -+void phydm_write_cck_pd_type5(void *dm_void, enum cckpd_lv lv, -+ enum cckpd_mode mode) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u32 val = 0; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "write CCK CCA parameters(CS_ratio & PD)\n"); -+ switch (mode) { -+ case CCK_BW20_1R: /*RFBW20_1R*/ -+ { -+ val = cckpd_t->cck_pd_table_jgr3[0][0][0][lv]; -+ odm_set_bb_reg(dm, R_0x1a30, 0x1f, val); -+ val = cckpd_t->cck_pd_table_jgr3[0][0][1][lv]; -+ odm_set_bb_reg(dm, R_0x1a20, 0x1f, val); -+ } break; -+ case CCK_BW40_1R: /*RFBW40_1R*/ -+ { -+ val = cckpd_t->cck_pd_table_jgr3[1][0][0][lv]; -+ odm_set_bb_reg(dm, R_0x1a34, 0x1f, val); -+ val = cckpd_t->cck_pd_table_jgr3[1][0][1][lv]; -+ odm_set_bb_reg(dm, R_0x1a24, 0x1f, val); -+ } break; -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case CCK_BW20_2R: /*RFBW20_2R*/ -+ { -+ val = cckpd_t->cck_pd_table_jgr3[0][1][0][lv]; -+ odm_set_bb_reg(dm, R_0x1a30, 0x3e0, val); -+ val = cckpd_t->cck_pd_table_jgr3[0][1][1][lv]; -+ odm_set_bb_reg(dm, R_0x1a20, 0x3e0, val); -+ } break; -+ case CCK_BW40_2R: /*RFBW40_2R*/ -+ { -+ val = cckpd_t->cck_pd_table_jgr3[1][1][0][lv]; -+ odm_set_bb_reg(dm, R_0x1a34, 0x3e0, val); -+ val = cckpd_t->cck_pd_table_jgr3[1][1][1][lv]; -+ odm_set_bb_reg(dm, R_0x1a24, 0x3e0, val); -+ } break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case CCK_BW20_3R: /*RFBW20_3R*/ -+ { -+ val = cckpd_t->cck_pd_table_jgr3[0][2][0][lv]; -+ odm_set_bb_reg(dm, R_0x1a30, 0x7c00, val); -+ val = cckpd_t->cck_pd_table_jgr3[0][2][1][lv]; -+ odm_set_bb_reg(dm, R_0x1a20, 0x7c00, val); -+ } break; -+ case CCK_BW40_3R: /*RFBW40_3R*/ -+ { -+ val = cckpd_t->cck_pd_table_jgr3[1][2][0][lv]; -+ odm_set_bb_reg(dm, R_0x1a34, 0x7c00, val); -+ val = cckpd_t->cck_pd_table_jgr3[1][2][1][lv]; -+ odm_set_bb_reg(dm, R_0x1a24, 0x7c00, val); -+ } break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case CCK_BW20_4R: /*RFBW20_4R*/ -+ { -+ val = cckpd_t->cck_pd_table_jgr3[0][3][0][lv]; -+ odm_set_bb_reg(dm, R_0x1a30, 0xF8000, val); -+ val = cckpd_t->cck_pd_table_jgr3[0][3][1][lv]; -+ odm_set_bb_reg(dm, R_0x1a20, 0xF8000, val); -+ } break; -+ case CCK_BW40_4R: /*RFBW40_4R*/ -+ { -+ val = cckpd_t->cck_pd_table_jgr3[1][3][0][lv]; -+ odm_set_bb_reg(dm, R_0x1a34, 0xF8000, val); -+ val = cckpd_t->cck_pd_table_jgr3[1][3][1][lv]; -+ odm_set_bb_reg(dm, R_0x1a24, 0xF8000, val); -+ } break; -+ #endif -+ default: -+ /*@pr_debug("[%s] warning!\n", __func__);*/ -+ break; -+ } -+} -+ -+ -+void phydm_set_cck_pd_lv_type5(void *dm_void, enum cckpd_lv lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ enum cckpd_mode cck_mode = CCK_BW20_1R; -+ enum channel_width cck_bw = CHANNEL_WIDTH_20; -+ u8 cck_n_rx = 0; -+ u32 val = 0; -+ /*u32 val_dbg = 0;*/ -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_CCKPD, "lv: (%d) -> (%d)\n", cckpd_t->cck_pd_lv, lv); -+ -+ /*[Check Nrx] for 8723F*/ -+ cck_n_rx = 1; -+ -+ /*[Check BW]*/ -+ val = odm_get_bb_reg(dm, R_0x9b0, 0xc); -+ if (val == 0) -+ cck_bw = CHANNEL_WIDTH_20; -+ else if (val == 1) -+ cck_bw = CHANNEL_WIDTH_40; -+ else -+ cck_bw = CHANNEL_WIDTH_80; -+ -+ /*[Check LV]*/ -+ if (cckpd_t->cck_pd_lv == lv && -+ cckpd_t->cck_n_rx == cck_n_rx && -+ cckpd_t->cck_bw == cck_bw) { -+ PHYDM_DBG(dm, DBG_CCKPD, "stay in lv=%d\n", lv); -+ return; -+ } -+ cckpd_t->cck_bw = cck_bw; -+ cckpd_t->cck_n_rx = cck_n_rx; -+ cckpd_t->cck_pd_lv = lv; -+ cckpd_t->cck_fa_ma = CCK_FA_MA_RESET; -+ -+ switch (cck_n_rx) { -+ case 1: /*1R*/ -+ { -+ if (cck_bw == CHANNEL_WIDTH_20) -+ cck_mode = CCK_BW20_1R; -+ else if (cck_bw == CHANNEL_WIDTH_40) -+ cck_mode = CCK_BW40_1R; -+ } break; -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case 2: /*2R*/ -+ { -+ if (cck_bw == CHANNEL_WIDTH_20) -+ cck_mode = CCK_BW20_2R; -+ else if (cck_bw == CHANNEL_WIDTH_40) -+ cck_mode = CCK_BW40_2R; -+ } break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case 3: /*3R*/ -+ { -+ if (cck_bw == CHANNEL_WIDTH_20) -+ cck_mode = CCK_BW20_3R; -+ else if (cck_bw == CHANNEL_WIDTH_40) -+ cck_mode = CCK_BW40_3R; -+ } break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case 4: /*4R*/ -+ { -+ if (cck_bw == CHANNEL_WIDTH_20) -+ cck_mode = CCK_BW20_4R; -+ else if (cck_bw == CHANNEL_WIDTH_40) -+ cck_mode = CCK_BW40_4R; -+ } break; -+ #endif -+ default: -+ /*@pr_debug("[%s] warning!\n", __func__);*/ -+ break; -+ } -+ -+ -+ -+phydm_write_cck_pd_type5(dm, lv, cck_mode); -+} -+ -+void phydm_read_cckpd_para_type5(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u8 bw = 0; /*r_RX_RF_BW*/ -+ u8 n_rx = 0; -+ u8 curr_cck_pd_t[2][4][2]; -+ u32 reg0 = 0; -+ u32 reg1 = 0; -+ u32 reg2 = 0; -+ u32 reg3 = 0; -+ -+ bw = (u8)odm_get_bb_reg(dm, R_0x9b0, 0xc); -+ -+ reg0 = odm_get_bb_reg(dm, R_0x1a30, MASKDWORD); -+ reg1 = odm_get_bb_reg(dm, R_0x1a34, MASKDWORD); -+ reg2 = odm_get_bb_reg(dm, R_0x1a20, MASKDWORD); -+ reg3 = odm_get_bb_reg(dm, R_0x1a24, MASKDWORD); -+ curr_cck_pd_t[0][0][0] = (u8)(reg0 & 0x0000001f); -+ curr_cck_pd_t[1][0][0] = (u8)(reg1 & 0x0000001f); -+ curr_cck_pd_t[0][0][1] = (u8)(reg2 & 0x0000001f); -+ curr_cck_pd_t[1][0][1] = (u8)(reg3 & 0x0000001f); -+ n_rx = 1; -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) { -+ curr_cck_pd_t[0][1][0] = (u8)((reg0 & 0x000003E0) >> 5); -+ curr_cck_pd_t[1][1][0] = (u8)((reg1 & 0x000003E0) >> 5); -+ curr_cck_pd_t[0][1][1] = (u8)((reg2 & 0x000003E0) >> 5); -+ curr_cck_pd_t[1][1][1] = (u8)((reg3 & 0x000003E0) >> 5); -+ n_rx = 2; -+ } -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS) { -+ curr_cck_pd_t[0][2][0] = (u8)((reg0 & 0x00007C00) >> 10); -+ curr_cck_pd_t[1][2][0] = (u8)((reg1 & 0x00007C00) >> 10); -+ curr_cck_pd_t[0][2][1] = (u8)((reg2 & 0x00007C00) >> 10); -+ curr_cck_pd_t[1][2][1] = (u8)((reg3 & 0x00007C00) >> 10); -+ n_rx = 3; -+ } -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { -+ curr_cck_pd_t[0][3][0] = (u8)((reg0 & 0x000F8000) >> 15); -+ curr_cck_pd_t[1][3][0] = (u8)((reg1 & 0x000F8000) >> 15); -+ curr_cck_pd_t[0][3][1] = (u8)((reg2 & 0x000F8000) >> 15); -+ curr_cck_pd_t[1][3][1] = (u8)((reg3 & 0x000F8000) >> 15); -+ n_rx = 4; -+ } -+ #endif -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "bw=%dM, Nrx=%d\n", 20 << bw, n_rx); -+ PHYDM_DBG(dm, DBG_CCKPD, "lv=%d, readback CS_th=0x%x, PD th=0x%x\n", -+ cckpd_t->cck_pd_lv, -+ curr_cck_pd_t[bw][n_rx - 1][1], -+ curr_cck_pd_t[bw][n_rx - 1][0]); -+} -+ -+void phydm_cckpd_type5(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u8 igi = dm->dm_dig_table.cur_ig_value; -+ enum cckpd_lv lv = 0; -+ boolean is_update = true; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ -+ if (dm->is_linked) { -+ PHYDM_DBG(dm, DBG_CCKPD, "Linked!!!\n"); -+ if (dm->rssi_min > 40) { -+ lv = CCK_PD_LV_4; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 1\n"); -+ } else if (dm->rssi_min > 32) { -+ lv = CCK_PD_LV_3; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 2\n"); -+ } else if (dm->rssi_min > 24) { -+ lv = CCK_PD_LV_2; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 3\n"); -+ } else { -+ if (cckpd_t->cck_fa_ma > 1000) { -+ lv = CCK_PD_LV_1; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 4-1\n"); -+ } else if (cckpd_t->cck_fa_ma < 500) { -+ lv = CCK_PD_LV_0; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 4-2\n"); -+ } else { -+ is_update = false; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 4-3\n"); -+ } -+ } -+ } else { -+ PHYDM_DBG(dm, DBG_CCKPD, "UnLinked!!!\n"); -+ if (cckpd_t->cck_fa_ma > 1000) { -+ lv = CCK_PD_LV_1; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 1\n"); -+ } else if (cckpd_t->cck_fa_ma < 500) { -+ lv = CCK_PD_LV_0; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 2\n"); -+ } else { -+ is_update = false; -+ PHYDM_DBG(dm, DBG_CCKPD, "Order 3\n"); -+ } -+ } -+ -+ if (is_update) { -+ phydm_set_cck_pd_lv_type5(dm, lv); -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "setting CS_th = 0x%x, PD th = 0x%x\n", -+ cckpd_t->cck_pd_table_jgr3[cckpd_t->cck_bw] -+ [cckpd_t->cck_n_rx - 1][1][lv], -+ cckpd_t->cck_pd_table_jgr3[cckpd_t->cck_bw] -+ [cckpd_t->cck_n_rx - 1][0][lv]); -+ } -+ -+ phydm_read_cckpd_para_type5(dm); -+} -+ -+void phydm_cck_pd_init_type5(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u32 reg0 = 0; -+ u32 reg1 = 0; -+ u32 reg2 = 0; -+ u32 reg3 = 0; -+ u8 pw_step = 0; -+ u8 cs_step = 0; -+ u8 cck_bw = 0; /*r_RX_RF_BW*/ -+ u8 cck_n_rx = 0; -+ u8 val = 0; -+ u8 i = 0; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "[%s]======>\n", __func__); -+ #if 0 -+ /*@ -+ *cckpd_t[0][0][0][0] = 1a30[4:0] r_PD_lim_RFBW20_1R -+ *cckpd_t[0][1][0][0] = 1a30[9:5] r_PD_lim_RFBW20_2R -+ *cckpd_t[0][2][0][0] = 1a30[14:10] r_PD_lim_RFBW20_3R -+ *cckpd_t[0][3][0][0] = 1a30[19:15] r_PD_lim_RFBW20_4R -+ *cckpd_t[1][0][0][0] = 1a34[4:0] r_PD_lim_RFBW40_1R -+ *cckpd_t[1][1][0][0] = 1a34[9:5] r_PD_lim_RFBW40_2R -+ *cckpd_t[1][2][0][0] = 1a34[14:10] r_PD_lim_RFBW40_3R -+ *cckpd_t[1][3][0][0] = 1a34[19:15] r_PD_lim_RFBW40_4R -+ * -+ * -+ *cckpd_t[0][0][1][0] = 1a20[4:0] r_CS_ratio_RFBW20_1R -+ *cckpd_t[0][1][1][0] = 1a20[9:5] r_CS_ratio_RFBW20_2R -+ *cckpd_t[0][2][1][0] = 1a20[14:10] r_CS_ratio_RFBW20_3R -+ *cckpd_t[0][3][1][0] = 1a20[19:15] r_CS_ratio_RFBW20_4R -+ *cckpd_t[1][0][1][0] = 1a24[4:0] r_CS_ratio_RFBW40_1R -+ *cckpd_t[1][1][1][0] = 1a24[9:5] r_CS_ratio_RFBW40_2R -+ *cckpd_t[1][2][1][0] = 1a24[14:10] r_CS_ratio_RFBW40_3R -+ *cckpd_t[1][3][1][0] = 1a24[19:15] r_CS_ratio_RFBW40_4R -+ */ -+ #endif -+ /*[Check Nrx]*/ -+ cck_n_rx = 1; -+ -+ /*[Check BW]*/ -+ val = (u8)odm_get_bb_reg(dm, R_0x9b0, 0xc); -+ if (val == 0) -+ cck_bw = CHANNEL_WIDTH_20; -+ else if (val == 1) -+ cck_bw = CHANNEL_WIDTH_40; -+ else -+ cck_bw = CHANNEL_WIDTH_80; -+ -+ cckpd_t->cck_bw = cck_bw; -+ reg0 = odm_get_bb_reg(dm, R_0x1a30, MASKDWORD); -+ reg1 = odm_get_bb_reg(dm, R_0x1a34, MASKDWORD); -+ reg2 = odm_get_bb_reg(dm, R_0x1a20, MASKDWORD); -+ reg3 = odm_get_bb_reg(dm, R_0x1a24, MASKDWORD); -+ -+ for (i = 0 ; i < CCK_PD_LV_MAX ; i++) { -+ pw_step = i * 2; -+ cs_step = i * 2; -+ -+ #if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ if (i == CCK_PD_LV_1) { -+ pw_step = 9; /*IGI-19.2:0x11=d'17*/ -+ cs_step = 0; -+ } else if (i == CCK_PD_LV_2) { -+ pw_step = 12; /*IGI-15.5:0x14=d'20*/ -+ cs_step = 1; -+ } else if (i == CCK_PD_LV_3) { -+ pw_step = 14; /*IGI-14:0x16=d'22*/ -+ cs_step = 1; -+ } else if (i == CCK_PD_LV_4) { -+ pw_step = 17; /*IGI-12:0x19=d'25*/ -+ cs_step = 1; -+ } -+ } -+ #endif -+ val = (u8)(reg0 & 0x0000001F) + pw_step; -+ PHYDM_DBG(dm, DBG_CCKPD, "lvl %d val = %x\n\n", i, val); -+ cckpd_t->cck_pd_table_jgr3[0][0][0][i] = val; -+ -+ val = (u8)(reg1 & 0x0000001F) + pw_step; -+ cckpd_t->cck_pd_table_jgr3[1][0][0][i] = val; -+ -+ val = (u8)(reg2 & 0x0000001F) + cs_step; -+ cckpd_t->cck_pd_table_jgr3[0][0][1][i] = val; -+ -+ val = (u8)(reg3 & 0x0000001F) + cs_step; -+ cckpd_t->cck_pd_table_jgr3[1][0][1][i] = val; -+ -+ #ifdef PHYDM_COMPILE_ABOVE_2SS -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) { -+ val = (u8)((reg0 & 0x000003E0) >> 5) + pw_step; -+ cckpd_t->cck_pd_table_jgr3[0][1][0][i] = val; -+ -+ val = (u8)((reg1 & 0x000003E0) >> 5) + pw_step; -+ cckpd_t->cck_pd_table_jgr3[1][1][0][i] = val; -+ -+ val = (u8)((reg2 & 0x000003E0) >> 5) + cs_step; -+ cckpd_t->cck_pd_table_jgr3[0][1][1][i] = val; -+ -+ val = (u8)((reg3 & 0x000003E0) >> 5) + cs_step; -+ cckpd_t->cck_pd_table_jgr3[1][1][1][i] = val; -+ -+ cck_n_rx = 2; -+ } -+ #endif -+ #ifdef PHYDM_COMPILE_ABOVE_3SS -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS) { -+ val = (u8)((reg0 & 0x00007C00) >> 10) + pw_step; -+ cckpd_t->cck_pd_table_jgr3[0][2][0][i] = val; -+ -+ val = (u8)((reg1 & 0x00007C00) >> 10) + pw_step; -+ cckpd_t->cck_pd_table_jgr3[1][2][0][i] = val; -+ -+ val = (u8)((reg2 & 0x00007C00) >> 10) + cs_step; -+ cckpd_t->cck_pd_table_jgr3[0][2][1][i] = val; -+ -+ val = (u8)((reg3 & 0x00007C00) >> 10) + cs_step; -+ cckpd_t->cck_pd_table_jgr3[1][2][1][i] = val; -+ -+ cck_n_rx = 3; -+ } -+ #endif -+ -+ #ifdef PHYDM_COMPILE_ABOVE_4SS -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { -+ val = (u8)((reg0 & 0x000F8000) >> 15) + pw_step; -+ cckpd_t->cck_pd_table_jgr3[0][3][0][i] = val; -+ -+ val = (u8)((reg1 & 0x000F8000) >> 15) + pw_step; -+ cckpd_t->cck_pd_table_jgr3[1][3][0][i] = val; -+ -+ val = (u8)((reg2 & 0x000F8000) >> 15) + cs_step; -+ cckpd_t->cck_pd_table_jgr3[0][3][1][i] = val; -+ -+ val = (u8)((reg3 & 0x000F8000) >> 15) + cs_step; -+ cckpd_t->cck_pd_table_jgr3[1][3][1][i] = val; -+ -+ cck_n_rx = 4; -+ } -+ #endif -+ } -+ cckpd_t->cck_n_rx = cck_n_rx; -+} -+ -+ -+ -+ -+#endif /*#ifdef PHYDM_COMPILE_CCKPD_TYPE5*/ -+ -+ -+ -+ -+void phydm_set_cckpd_val(void *dm_void, u32 *val_buf, u8 val_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ enum cckpd_lv lv; -+ -+ if (val_len != 1) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[Error][CCKPD]Need val_len=1\n"); -+ return; -+ } -+ -+ lv = (enum cckpd_lv)val_buf[0]; -+ -+ if (lv > CCK_PD_LV_4) { -+ pr_debug("[%s] warning! lv=%d\n", __func__, lv); -+ return; -+ } -+ -+ switch (cckpd_t->cckpd_hw_type) { -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE1 -+ case 1: -+ phydm_set_cckpd_lv_type1(dm, lv); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE2 -+ case 2: -+ phydm_set_cckpd_lv_type2(dm, lv); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE3 -+ case 3: -+ phydm_set_cckpd_lv_type3(dm, lv); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE4 -+ case 4: -+ phydm_set_cck_pd_lv_type4(dm, lv); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE5 -+ case 5: -+ phydm_set_cck_pd_lv_type5(dm, lv); -+ break; -+ #endif -+ default: -+ pr_debug("[%s]warning\n", __func__); -+ break; -+ } -+} -+ -+boolean -+phydm_stop_cck_pd_th(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ability & ODM_BB_FA_CNT)) { -+ PHYDM_DBG(dm, DBG_CCKPD, "Not Support:ODM_BB_FA_CNT disable\n"); -+ return true; -+ } -+ -+ if (!(dm->support_ability & ODM_BB_CCK_PD)) { -+ PHYDM_DBG(dm, DBG_CCKPD, "Not Support:ODM_BB_CCK_PD disable\n"); -+ return true; -+ } -+ -+ if (dm->pause_ability & ODM_BB_CCK_PD) { -+ PHYDM_DBG(dm, DBG_CCKPD, "Return: Pause CCKPD in LV=%d\n", -+ dm->pause_lv_table.lv_cckpd); -+ return true; -+ } -+ -+ if (dm->is_linked && (*dm->channel > 36)) { -+ PHYDM_DBG(dm, DBG_CCKPD, "Return: 5G CH=%d\n", *dm->channel); -+ return true; -+ } -+ return false; -+} -+ -+void phydm_cck_pd_th(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ u32 cck_fa = fa_t->cnt_cck_fail; -+ #ifdef PHYDM_TDMA_DIG_SUPPORT -+ struct phydm_fa_acc_struct *fa_acc_t = &dm->false_alm_cnt_acc; -+ #endif -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "[%s] ======>\n", __func__); -+ -+ if (phydm_stop_cck_pd_th(dm)) -+ return; -+ -+ #ifdef PHYDM_TDMA_DIG_SUPPORT -+ if (dm->original_dig_restore) -+ cck_fa = fa_t->cnt_cck_fail; -+ else -+ cck_fa = fa_acc_t->cnt_cck_fail_1sec; -+ #endif -+ -+ if (cckpd_t->cck_fa_ma == CCK_FA_MA_RESET) -+ cckpd_t->cck_fa_ma = cck_fa; -+ else -+ cckpd_t->cck_fa_ma = (cckpd_t->cck_fa_ma * 3 + cck_fa) >> 2; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, -+ "IGI=0x%x, rssi_min=%d, cck_fa=%d, cck_fa_ma=%d\n", -+ dm->dm_dig_table.cur_ig_value, dm->rssi_min, -+ cck_fa, cckpd_t->cck_fa_ma); -+ -+ switch (cckpd_t->cckpd_hw_type) { -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE1 -+ case 1: -+ phydm_cckpd_type1(dm); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE2 -+ case 2: -+ phydm_cckpd_type2(dm); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE3 -+ case 3: -+ phydm_cckpd_type3(dm); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE4 -+ case 4: -+ #ifdef PHYDM_DCC_ENHANCE -+ if (dm->dm_dcc_info.dcc_en) -+ phydm_cckpd_type4_dcc(dm); -+ else -+ #endif -+ phydm_cckpd_type4(dm); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE5 -+ case 5: -+ phydm_cckpd_type5(dm); -+ break; -+ #endif -+ default: -+ pr_debug("[%s]warning\n", __func__); -+ break; -+ } -+} -+ -+void phydm_cck_pd_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ -+ if (*dm->mp_mode) -+ return; -+ -+ if (dm->support_ic_type & CCK_PD_IC_TYPE1) -+ cckpd_t->cckpd_hw_type = 1; -+ else if (dm->support_ic_type & CCK_PD_IC_TYPE2) -+ cckpd_t->cckpd_hw_type = 2; -+ else if (dm->support_ic_type & CCK_PD_IC_TYPE3) -+ cckpd_t->cckpd_hw_type = 3; -+ else if (dm->support_ic_type & CCK_PD_IC_TYPE4) -+ cckpd_t->cckpd_hw_type = 4; -+ -+ if (dm->support_ic_type & CCK_PD_IC_TYPE5) -+ cckpd_t->cckpd_hw_type = 5; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "[%s] cckpd_hw_type=%d\n", -+ __func__, cckpd_t->cckpd_hw_type); -+ -+ cckpd_t->cck_pd_lv = CCK_PD_LV_INIT; -+ cckpd_t->cck_n_rx = 0xff; -+ cckpd_t->cck_bw = CHANNEL_WIDTH_MAX; -+ cckpd_t->cck_fa_th[1] = 400; -+ cckpd_t->cck_fa_th[0] = 200; -+ -+ switch (cckpd_t->cckpd_hw_type) { -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE1 -+ case 1: -+ phydm_set_cckpd_lv_type1(dm, CCK_PD_LV_1); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE2 -+ case 2: -+ cckpd_t->aaa_default = odm_read_1byte(dm, 0xaaa) & 0x1f; -+ phydm_set_cckpd_lv_type2(dm, CCK_PD_LV_1); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE3 -+ case 3: -+ phydm_cck_pd_init_type3(dm); -+ phydm_set_cckpd_lv_type3(dm, CCK_PD_LV_1); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE4 -+ case 4: -+ phydm_cck_pd_init_type4(dm); -+ phydm_invalid_cckpd_type4(dm); -+ phydm_set_cck_pd_lv_type4(dm, CCK_PD_LV_1); -+ break; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE5 -+ case 5: -+ phydm_cck_pd_init_type5(dm); -+ break; -+ #endif -+ default: -+ pr_debug("[%s]warning\n", __func__); -+ break; -+ } -+} -+ -+#ifdef PHYDM_DCC_ENHANCE -+ -+void phydm_cckpd_type4_dcc(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ enum cckpd_lv lv_curr = cckpd_t->cck_pd_lv; -+ enum phydm_cck_pd_trend trend = CCKPD_STABLE; -+ u8 th_ofst = 0; -+ u16 lv_up_th, lv_down_th; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "%s ======>\n", __func__); -+ -+ if (!dm->is_linked) -+ th_ofst = 1; -+ -+ lv_up_th = (cckpd_t->cck_fa_th[1]) << th_ofst; -+ lv_down_th = (cckpd_t->cck_fa_th[0]) << th_ofst; -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "th{Up, Down}: {%d, %d}\n", -+ lv_up_th, lv_down_th); -+ -+ if (cckpd_t->cck_fa_ma > lv_up_th) { -+ if (lv_curr <= CCK_PD_LV_3) { -+ lv_curr++; -+ trend = CCKPD_INCREASING; -+ } else { -+ lv_curr = CCK_PD_LV_4; -+ } -+ } else if (cckpd_t->cck_fa_ma < lv_down_th) { -+ if (lv_curr >= CCK_PD_LV_1) { -+ lv_curr--; -+ trend = CCKPD_DECREASING; -+ } else { -+ lv_curr = CCK_PD_LV_0; -+ } -+ } -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "lv: %d->%d\n", cckpd_t->cck_pd_lv, lv_curr); -+#if 1 -+ if (trend != CCKPD_STABLE) { -+ phydm_set_cck_pd_lv_type4(dm, lv_curr); -+ -+ PHYDM_DBG(dm, DBG_CCKPD, "setting CS_th = 0x%x, PD th = 0x%x\n", -+ cckpd_t->cckpd_jgr3[cckpd_t->cck_bw] -+ [cckpd_t->cck_n_rx - 1][1][lv_curr], -+ cckpd_t->cckpd_jgr3[cckpd_t->cck_bw] -+ [cckpd_t->cck_n_rx - 1][0][lv_curr]); -+ } -+ phydm_read_cckpd_para_type4(dm); -+#endif -+} -+ -+boolean phydm_do_cckpd(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ if (dig_t->igi_trend == DIG_INCREASING) -+ return false; -+ -+ return true; -+} -+ -+void phydm_dig_cckpd_coex(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dcc_struct *dcc = &dm->dm_dcc_info; -+ -+ if (*dm->channel > 36) { -+ phydm_dig(dm); -+ return; -+ } else if (!dcc->dcc_en) { -+ phydm_dig(dm); -+ phydm_cck_pd_th(dm); -+ return; -+ } -+ -+ dcc->dig_execute_cnt++; -+ PHYDM_DBG(dm, DBG_CCKPD, "DCC_cnt: %d\n", dcc->dig_execute_cnt); -+ -+ if (dcc->dig_execute_cnt % dcc->dcc_ratio) { -+ PHYDM_DBG(dm, DBG_CCKPD, "DCC: DIG\n"); -+ phydm_dig(dm); -+ } else { -+ if (phydm_do_cckpd(dm)) { -+ PHYDM_DBG(dm, DBG_CCKPD, "DCC: CCKPD\n"); -+ dcc->dcc_mode = DCC_CCK_PD; -+ phydm_cck_pd_th(dm); -+ } else { -+ PHYDM_DBG(dm, DBG_CCKPD, "DCC: Boost_DIG\n"); -+ dcc->dcc_mode = DCC_DIG; -+ phydm_dig(dm); -+ } -+ } -+} -+ -+void phydm_dig_cckpd_coex_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_dcc_struct *dcc = &dm->dm_dcc_info; -+ -+ dcc->dcc_mode = DCC_DIG; -+ dcc->dcc_en = false; -+ dcc->dig_execute_cnt = 0; -+ dcc->dcc_ratio = 2; -+} -+ -+void phydm_dig_cckpd_coex_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cckpd_struct *cckpd_t = &dm->dm_cckpd_table; -+ struct phydm_dcc_struct *dcc = &dm->dm_dcc_info; -+ char help[] = "-h"; -+ u32 var[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ -+ for (i = 0; i < 3; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var[i]); -+ } -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Enable: en {0/1}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DCC_ratio: ratio {x}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "threshold: th {Down_th} {Up_th}\n"); -+ } else if ((strcmp(input[1], "en") == 0)) { -+ dcc->dcc_en = (var[1]) ? true : false; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "en=%d\n", dcc->dcc_en); -+ } else if ((strcmp(input[1], "ratio") == 0)) { -+ dcc->dcc_ratio = (u8)var[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Ratio=%d\n", dcc->dcc_ratio); -+ } else if ((strcmp(input[1], "th") == 0)) { -+ cckpd_t->cck_fa_th[1] = (u16)var[2]; -+ cckpd_t->cck_fa_th[0] = (u16)var[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "th{Down, Up}: {%d, %d}\n", -+ cckpd_t->cck_fa_th[0], cckpd_t->cck_fa_th[1]); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#endif -+#endif /*#ifdef PHYDM_SUPPORT_CCKPD*/ -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_pd.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_pd.h -new file mode 100644 -index 000000000000..f1b2d8c64af9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_pd.h -@@ -0,0 +1,201 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_CCK_PD_H__ -+#define __PHYDM_CCK_PD_H__ -+ -+/* 2019.12.25 decrease CS_ratio in 8822C due to Lenovo test result(PCIE-5136).*/ -+#define CCK_PD_VERSION "4.0" -+ -+/*@ -+ * 1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+#define CCK_FA_MA_RESET 0xffffffff -+ -+#define INVALID_CS_RATIO_0 0x1b /* @ only for type4 ICs*/ -+#define INVALID_CS_RATIO_1 0x1d /* @ only for type4 ICs*/ -+#define MAXVALID_CS_RATIO 0x1f -+/*@Run time flag of CCK_PD HW type*/ -+#define CCK_PD_IC_TYPE1 (ODM_RTL8188E | ODM_RTL8812 | ODM_RTL8821 |\ -+ ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8814A |\ -+ ODM_RTL8881A | ODM_RTL8822B | ODM_RTL8703B |\ -+ ODM_RTL8195A | ODM_RTL8188F) -+ -+#define CCK_PD_IC_TYPE2 (ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8723D |\ -+ ODM_RTL8710B | ODM_RTL8195B) /*extend 0xaaa*/ -+ -+#define CCK_PD_IC_TYPE3 (ODM_RTL8192F | ODM_RTL8721D | ODM_RTL8710C) -+/*@extend for different bw & path*/ -+ -+#define CCK_PD_IC_TYPE4 ODM_IC_JGR3_SERIES /*@extend for different bw & path*/ -+#define CCK_PD_IC_TYPE5 (ODM_RTL8723F) /*@extend for different CR*/ -+ -+/*@Compile time flag of CCK_PD HW type*/ -+#if (RTL8188E_SUPPORT || RTL8812A_SUPPORT || RTL8821A_SUPPORT ||\ -+ RTL8192E_SUPPORT || RTL8723B_SUPPORT || RTL8814A_SUPPORT ||\ -+ RTL8881A_SUPPORT || RTL8822B_SUPPORT || RTL8703B_SUPPORT ||\ -+ RTL8195A_SUPPORT || RTL8188F_SUPPORT) -+ #define PHYDM_COMPILE_CCKPD_TYPE1 /*@only 0xa0a*/ -+#endif -+ -+#if (RTL8197F_SUPPORT || RTL8821C_SUPPORT || RTL8723D_SUPPORT ||\ -+ RTL8710B_SUPPORT || RTL8195B_SUPPORT) -+ #define PHYDM_COMPILE_CCKPD_TYPE2 /*@extend 0xaaa*/ -+#endif -+ -+#if (RTL8192F_SUPPORT || RTL8721D_SUPPORT || RTL8710C_SUPPORT) -+ #define PHYDM_COMPILE_CCKPD_TYPE3 /*@extend for different & path*/ -+#endif -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ #define PHYDM_COMPILE_CCKPD_TYPE4 /*@extend for different bw & path*/ -+#endif -+#if (RTL8723F_SUPPORT) -+ #define PHYDM_COMPILE_CCKPD_TYPE5 /*@extend for different & path*/ -+#endif -+ -+/*@ -+ * 1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ */ -+enum cckpd_lv { -+ CCK_PD_LV_INIT = 0xff, -+ CCK_PD_LV_0 = 0, -+ CCK_PD_LV_1 = 1, -+ CCK_PD_LV_2 = 2, -+ CCK_PD_LV_3 = 3, -+ CCK_PD_LV_4 = 4, -+ CCK_PD_LV_MAX = 5 -+}; -+ -+enum cckpd_mode { -+ CCK_BW20_1R = 0, -+ CCK_BW20_2R = 1, -+ CCK_BW20_3R = 2, -+ CCK_BW20_4R = 3, -+ CCK_BW40_1R = 4, -+ CCK_BW40_2R = 5, -+ CCK_BW40_3R = 6, -+ CCK_BW40_4R = 7 -+}; -+ -+enum dcc_mode { -+ DCC_DIG = 0, -+ DCC_CCK_PD = 1 -+}; -+ -+enum phydm_cck_pd_trend { -+ CCKPD_STABLE = 0, -+ CCKPD_INCREASING = 1, -+ CCKPD_DECREASING = 2 -+}; -+ -+/*@ -+ * 1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+ -+#ifdef PHYDM_SUPPORT_CCKPD -+ -+#ifdef PHYDM_DCC_ENHANCE -+struct phydm_dcc_struct { /*DIG CCK_PD coexistence*/ -+ boolean dcc_en; -+ enum dcc_mode dcc_mode; -+ u32 dig_execute_cnt; -+ u8 dcc_ratio; -+}; -+#endif -+ -+struct phydm_cckpd_struct { -+ u8 cckpd_hw_type; -+ u8 cur_cck_cca_thres; /*@current cck_pd value 0xa0a*/ -+ u32 cck_fa_ma; -+ u32 rvrt_val; /*all rvrt_val for pause API must set to u32*/ -+ u8 pause_lv; -+ u8 cck_n_rx; -+ u16 cck_fa_th[2]; -+ enum channel_width cck_bw; -+ enum cckpd_lv cck_pd_lv; -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE2 -+ u8 cck_cca_th_aaa; /*@current cs_ratio value 0xaaa*/ -+ u8 aaa_default; /*@Init cs_ratio value - 0xaaa*/ -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE3 -+ /*Default value*/ -+ u8 cck_pd_20m_1r; -+ u8 cck_pd_20m_2r; -+ u8 cck_pd_40m_1r; -+ u8 cck_pd_40m_2r; -+ u8 cck_cs_ratio_20m_1r; -+ u8 cck_cs_ratio_20m_2r; -+ u8 cck_cs_ratio_40m_1r; -+ u8 cck_cs_ratio_40m_2r; -+ /*Current value*/ -+ u8 cur_cck_pd_20m_1r; -+ u8 cur_cck_pd_20m_2r; -+ u8 cur_cck_pd_40m_1r; -+ u8 cur_cck_pd_40m_2r; -+ u8 cur_cck_cs_ratio_20m_1r; -+ u8 cur_cck_cs_ratio_20m_2r; -+ u8 cur_cck_cs_ratio_40m_1r; -+ u8 cur_cck_cs_ratio_40m_2r; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE4 -+ /*@[bw][nrx][0:PD/1:CS][lv]*/ -+ u8 cckpd_jgr3[2][4][2][CCK_PD_LV_MAX]; -+ #endif -+ #ifdef PHYDM_COMPILE_CCKPD_TYPE5 -+ /*@[bw][nrx][0:PD/1:CS][lv]*/ -+ u8 cck_pd_table_jgr3[2][4][2][CCK_PD_LV_MAX]; -+ #endif -+}; -+#endif -+ -+/*@ -+ * 1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ */ -+void phydm_set_cckpd_val(void *dm_void, u32 *val_buf, u8 val_len); -+ -+void phydm_cck_pd_th(void *dm_void); -+ -+void phydm_cck_pd_init(void *dm_void); -+ -+#ifdef PHYDM_DCC_ENHANCE -+void phydm_cckpd_type4_dcc(void *dm_void); -+ -+void phydm_dig_cckpd_coex(void *dm_void); -+ -+void phydm_dig_cckpd_coex_init(void *dm_void); -+ -+void phydm_dig_cckpd_coex_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_rx_pathdiv.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_rx_pathdiv.c -new file mode 100644 -index 000000000000..3106f19395c8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_rx_pathdiv.c -@@ -0,0 +1,163 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT /* @PHYDM-342*/ -+void phydm_cck_rx_pathdiv_manaul(void *dm_void, boolean en_cck_rx_pathdiv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /* @Can not apply for 98F/14B/97G from DD YC*/ -+ if (en_cck_rx_pathdiv) { -+ odm_set_bb_reg(dm, R_0x1a14, BIT(7), 0x0); -+ odm_set_bb_reg(dm, R_0x1a74, BIT(8), 0x1); -+ } else { -+ odm_set_bb_reg(dm, R_0x1a14, BIT(7), 0x1); -+ odm_set_bb_reg(dm, R_0x1a74, BIT(8), 0x0); -+ } -+} -+ -+void phydm_cck_rx_pathdiv_watchdog(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cck_rx_pathdiv *cckrx_t = &dm->dm_cck_rx_pathdiv_table; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ u8 rssi_th = 0; -+ u32 rssi_a = 0, rssi_b = 0, rssi_avg = 0; -+ -+ if (!cckrx_t->en_cck_rx_pathdiv) -+ return; -+ -+ rssi_a = PHYDM_DIV(cckrx_t->path_a_sum, cckrx_t->path_a_cnt); -+ rssi_b = PHYDM_DIV(cckrx_t->path_b_sum, cckrx_t->path_b_cnt); -+ rssi_avg = (rssi_a + rssi_b) >> 1; -+ -+ pr_debug("Rx-A:%d, Rx-B:%d, avg:%d\n", rssi_a, rssi_b, rssi_avg); -+ -+ cckrx_t->path_a_cnt = 0; -+ cckrx_t->path_a_sum = 0; -+ cckrx_t->path_b_cnt = 0; -+ cckrx_t->path_b_sum = 0; -+ -+ if (fa_t->cnt_all >= 100) -+ rssi_th = cckrx_t->rssi_fa_th; -+ else -+ rssi_th = cckrx_t->rssi_th; -+ -+ if (dm->phy_dbg_info.num_qry_beacon_pkt > 14 && rssi_avg <= rssi_th) -+ phydm_cck_rx_pathdiv_manaul(dm, true); -+ else -+ phydm_cck_rx_pathdiv_manaul(dm, false); -+} -+ -+void phydm_cck_rx_pathdiv_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cck_rx_pathdiv *cckrx_t = &dm->dm_cck_rx_pathdiv_table; -+ -+ cckrx_t->en_cck_rx_pathdiv = false; -+ cckrx_t->path_a_cnt = 0; -+ cckrx_t->path_a_sum = 0; -+ cckrx_t->path_b_cnt = 0; -+ cckrx_t->path_b_sum = 0; -+ cckrx_t->rssi_fa_th = 45; -+ cckrx_t->rssi_th = 25; -+} -+ -+void phydm_process_rssi_for_cck_rx_pathdiv(void *dm_void, void *phy_info_void, -+ void *pkt_info_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_phyinfo_struct *phy_info = NULL; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ struct phydm_cck_rx_pathdiv *cckrx_t = &dm->dm_cck_rx_pathdiv_table; -+ -+ phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ -+ if (!(pktinfo->is_packet_to_self || pktinfo->is_packet_match_bssid)) -+ return; -+ -+ if (pktinfo->is_cck_rate) -+ return; -+ -+ cckrx_t->path_a_sum += phy_info->rx_mimo_signal_strength[0]; -+ cckrx_t->path_a_cnt++; -+ -+ cckrx_t->path_b_sum += phy_info->rx_mimo_signal_strength[1]; -+ cckrx_t->path_b_cnt++; -+} -+ -+void phydm_cck_rx_pathdiv_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cck_rx_pathdiv *cckrx_t = &dm->dm_cck_rx_pathdiv_table; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ -+ if (!(dm->support_ic_type & ODM_RTL8822C)) -+ return; -+ -+ for (i = 0; i < 3; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ } -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "CCK rx pathdiv manual on: {1} {En}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "CCK rx pathdiv watchdog on: {2} {En}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "CCK rx pathdiv rssi_th : {3} {th} {fa_th}\n"); -+ } else if (var1[0] == 1) { -+ if (var1[1] == 1) -+ phydm_cck_rx_pathdiv_manaul(dm, true); -+ else -+ phydm_cck_rx_pathdiv_manaul(dm, false); -+ } else if (var1[0] == 2) { -+ if (var1[1] == 1) { -+ cckrx_t->en_cck_rx_pathdiv = true; -+ } else { -+ cckrx_t->en_cck_rx_pathdiv = false; -+ phydm_cck_rx_pathdiv_manaul(dm, false); -+ } -+ } else if (var1[0] == 3) { -+ cckrx_t->rssi_th = (u8)var1[1]; -+ cckrx_t->rssi_fa_th = (u8)var1[2]; -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_rx_pathdiv.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_rx_pathdiv.h -new file mode 100644 -index 000000000000..952bcf5f987e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_cck_rx_pathdiv.h -@@ -0,0 +1,67 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_CCK_RX_PATHDIV_H__ -+#define __PHYDM_CCK_RX_PATHDIV_H__ -+ -+#define CCK_RX_PATHDIV_VERSION "1.1" -+ -+/* @1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+/* @1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+struct phydm_cck_rx_pathdiv { -+ boolean en_cck_rx_pathdiv; -+ u32 path_a_sum; -+ u32 path_b_sum; -+ u16 path_a_cnt; -+ u16 path_b_cnt; -+ u8 rssi_fa_th; -+ u8 rssi_th; -+}; -+ -+/* @1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ */ -+ -+/* @1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ */ -+void phydm_cck_rx_pathdiv_watchdog(void *dm_void); -+ -+void phydm_cck_rx_pathdiv_init(void *dm_void); -+ -+void phydm_process_rssi_for_cck_rx_pathdiv(void *dm_void, void *phy_info_void, -+ void *pkt_info_void); -+ -+void phydm_cck_rx_pathdiv_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_ccx.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_ccx.c -new file mode 100644 -index 000000000000..1b8493dbbde9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_ccx.c -@@ -0,0 +1,3290 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+void phydm_ccx_hw_restart(void *dm_void) -+ /*@Will Restart NHM/CLM/FAHM simultaneously*/ -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 reg1 = 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ reg1 = R_0x994; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ reg1 = R_0x1e60; -+ #endif -+ else -+ reg1 = R_0x890; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ /*@disable NHM,CLM, FAHM*/ -+ odm_set_bb_reg(dm, reg1, 0x7, 0x0); -+ odm_set_bb_reg(dm, reg1, BIT(8), 0x0); -+ odm_set_bb_reg(dm, reg1, BIT(8), 0x1); -+} -+ -+#ifdef FAHM_SUPPORT -+ -+void phydm_fahm_racing_release(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 value32 = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "fahm_racing_release : lv:(%d)->(0)\n", -+ ccx->fahm_set_lv); -+ -+ ccx->fahm_ongoing = false; -+ ccx->fahm_set_lv = FAHM_RELEASE; -+ -+ if (!(ccx->fahm_app == FAHM_BACKGROUND || ccx->fahm_app == FAHM_ACS)) -+ phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, -+ PHYDM_PAUSE_LEVEL_1, 1, &value32); -+ -+ ccx->fahm_app = FAHM_BACKGROUND; -+} -+ -+u8 phydm_fahm_racing_ctrl(void *dm_void, enum phydm_fahm_level lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 set_result = PHYDM_SET_SUCCESS; -+ /*acquire to control FAHM API*/ -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "fahm_ongoing=%d, lv:(%d)->(%d)\n", -+ ccx->fahm_ongoing, ccx->fahm_set_lv, lv); -+ if (ccx->fahm_ongoing) { -+ if (lv <= ccx->fahm_set_lv) { -+ set_result = PHYDM_SET_FAIL; -+ } else { -+ phydm_ccx_hw_restart(dm); -+ ccx->fahm_ongoing = false; -+ } -+ } -+ -+ if (set_result) -+ ccx->fahm_set_lv = lv; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "fahm racing success=%d\n", set_result); -+ return set_result; -+} -+ -+void phydm_fahm_trigger(void *dm_void) -+{ /*@unit (4us)*/ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 reg = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ switch (dm->ic_ip_series) { -+ case PHYDM_IC_JGR3: -+ reg = R_0x1e60; -+ break; -+ case PHYDM_IC_AC: -+ reg = R_0x994; -+ break; -+ case PHYDM_IC_N: -+ reg = R_0x890; -+ break; -+ default: -+ break; -+ } -+ -+ odm_set_bb_reg(dm, reg, BIT(2), 0); -+ odm_set_bb_reg(dm, reg, BIT(2), 1); -+ -+ ccx->fahm_trigger_time = dm->phydm_sys_up_time; -+ ccx->fahm_rpt_stamp++; -+ ccx->fahm_ongoing = true; -+} -+ -+boolean -+phydm_fahm_check_rdy(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean is_ready = false; -+ u32 reg = 0, reg_bit = 0; -+ -+ switch (dm->ic_ip_series) { -+ case PHYDM_IC_JGR3: -+ reg = R_0x2d84; -+ reg_bit = 31; -+ break; -+ case PHYDM_IC_AC: -+ reg = R_0x1f98; -+ reg_bit = 31; -+ break; -+ case PHYDM_IC_N: -+ reg = R_0x9f0; -+ reg_bit = 31; -+ break; -+ default: -+ break; -+ } -+ -+ if (odm_get_bb_reg(dm, reg, BIT(reg_bit))) -+ is_ready = true; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "FAHM rdy=%d\n", is_ready); -+ -+ return is_ready; -+} -+ -+u8 phydm_fahm_cal_wgt_avg(void *dm_void, u8 start_i, u8 end_i, u16 r_sum, -+ u16 period) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 i = 0; -+ u32 pwr_tmp = 0; -+ u8 pwr = 0; -+ u32 fahm_valid = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ if (r_sum == 0) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "rpt_sum = 0, don't need to update\n"); -+ return 0x0; -+ } else if (end_i > NHM_RPT_NUM - 1) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "[WARNING]end_i is larger than 11!!\n"); -+ return 0x0; -+ } -+ -+ for (i = start_i; i <= end_i; i++) { -+ if (i == 0) -+ pwr_tmp += ccx->fahm_result[0] * -+ MAX_2(ccx->fahm_th[0] - 2, 0); -+ else if (i == (NHM_RPT_NUM - 1)) -+ pwr_tmp += ccx->fahm_result[NHM_RPT_NUM - 1] * -+ (ccx->fahm_th[NHM_TH_NUM - 1] + 2); -+ else -+ pwr_tmp += ccx->fahm_result[i] * -+ (ccx->fahm_th[i - 1] + ccx->fahm_th[i]) >> 1; -+ } -+ -+ /* protection for the case of minus pwr(RSSI)*/ -+ pwr = (u8)(NTH_TH_2_RSSI(MAX_2(PHYDM_DIV(pwr_tmp, r_sum), 20))); -+ fahm_valid = PHYDM_DIV(r_sum * 100, period); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "valid: ((%d)) percent, pwr(RSSI)=((%d))\n", -+ fahm_valid, pwr); -+ -+ return pwr; -+} -+ -+void phydm_fahm_get_utility(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ -+ if (ccx->fahm_rpt_sum >= ccx->fahm_result[0]) { -+ ccx->fahm_pwr = phydm_fahm_cal_wgt_avg(dm, 0, NHM_RPT_NUM - 1, -+ ccx->fahm_rpt_sum, -+ ccx->fahm_period); -+ } else { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[warning] fahm_rpt_sum invalid\n"); -+ ccx->fahm_pwr = 0; -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "fahm_pwr=%d\n", ccx->fahm_pwr); -+} -+ -+boolean -+phydm_fahm_get_result(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 value32 = 0; -+ u16 denom; /*fahm_denominator packet count*/ -+ u32 reg1 = 0; -+ u32 reg2 = 0; -+ u8 i = 0; -+ u32 fahm_rpt_sum_tmp = 0; -+ -+ switch (dm->ic_ip_series) { -+ case PHYDM_IC_JGR3: -+ reg1 = R_0x2d6c; -+ reg2 = R_0x2d84; -+ break; -+ case PHYDM_IC_AC: -+ reg1 = R_0x1f80; -+ reg2 = R_0x1f98; -+ break; -+ case PHYDM_IC_N: -+ reg1 = R_0x9d8; -+ reg2 = R_0x9f0; -+ break; -+ default: -+ break; -+ } -+ -+ if (!(phydm_fahm_check_rdy(dm))) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get FAHM report Fail\n"); -+ phydm_fahm_racing_release(dm); -+ return false; -+ } -+ -+ /*@Get FAHM Denominator*/ -+ denom = (u16)odm_get_bb_reg(dm, reg2, MASKLWORD); -+ -+ if (ccx->fahm_period >= 65530) -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "FAHM denominator = %d, valid: %d percent\n", denom, -+ (denom * 100) >> 16); -+ -+ /*Get FAHM numerator and sum all fahm_result*/ -+ for (i = 0; i < 6; i++) { -+ value32 = odm_get_bb_reg(dm, reg1 + (i << 2), MASKDWORD); -+ ccx->fahm_result[i * 2] = (u16)(value32 & MASKLWORD); -+ ccx->fahm_result[i * 2 + 1] = (u16)((value32 & MASKHWORD) >> 16); -+ fahm_rpt_sum_tmp = (u32)(fahm_rpt_sum_tmp + -+ ccx->fahm_result[i * 2] + -+ ccx->fahm_result[i * 2 + 1]); -+ } -+ -+ ccx->fahm_rpt_sum = (u16)fahm_rpt_sum_tmp; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "FAHM_Rpt[%d](H->L)[%d %d %d %d %d %d %d %d %d %d %d %d]\n", -+ ccx->fahm_rpt_stamp, ccx->fahm_result[11], -+ ccx->fahm_result[10], ccx->fahm_result[9], -+ ccx->fahm_result[8], ccx->fahm_result[7], ccx->fahm_result[6], -+ ccx->fahm_result[5], ccx->fahm_result[4], ccx->fahm_result[3], -+ ccx->fahm_result[2], ccx->fahm_result[1], -+ ccx->fahm_result[0]); -+ -+ phydm_fahm_racing_release(dm); -+ -+ if (fahm_rpt_sum_tmp > 0xffff) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "[Warning] Invalid FAHM RPT, total=%d\n", -+ fahm_rpt_sum_tmp); -+ return false; -+ } -+ -+ return true; -+} -+ -+void phydm_fahm_set_th_reg(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 val = 0; -+ -+ /*Set FAHM threshold*/ /*Unit: PWdB U(8,1)*/ -+ switch (dm->ic_ip_series) { -+ case PHYDM_IC_JGR3: -+ val = BYTE_2_DWORD(ccx->fahm_th[3], ccx->fahm_th[2], -+ ccx->fahm_th[1], ccx->fahm_th[0]); -+ odm_set_bb_reg(dm, R_0x1e50, MASKDWORD, val); -+ val = BYTE_2_DWORD(ccx->fahm_th[7], ccx->fahm_th[6], -+ ccx->fahm_th[5], ccx->fahm_th[4]); -+ odm_set_bb_reg(dm, R_0x1e54, MASKDWORD, val); -+ val = BYTE_2_DWORD(0, ccx->fahm_th[10], ccx->fahm_th[9], -+ ccx->fahm_th[8]); -+ odm_set_bb_reg(dm, R_0x1e58, 0xffffff, val); -+ break; -+ case PHYDM_IC_AC: -+ val = BYTE_2_DWORD(0, ccx->fahm_th[2], ccx->fahm_th[1], -+ ccx->fahm_th[0]); -+ odm_set_bb_reg(dm, R_0x1c38, 0xffffff00, val); -+ val = BYTE_2_DWORD(0, ccx->fahm_th[5], ccx->fahm_th[4], -+ ccx->fahm_th[3]); -+ odm_set_bb_reg(dm, R_0x1c78, 0xffffff00, val); -+ val = BYTE_2_DWORD(0, 0, ccx->fahm_th[7], ccx->fahm_th[6]); -+ odm_set_bb_reg(dm, R_0x1c7c, 0xffff0000, val); -+ val = BYTE_2_DWORD(0, ccx->fahm_th[10], ccx->fahm_th[9], -+ ccx->fahm_th[8]); -+ odm_set_bb_reg(dm, R_0x1cb8, 0xffffff00, val); -+ break; -+ case PHYDM_IC_N: -+ val = BYTE_2_DWORD(ccx->fahm_th[3], ccx->fahm_th[2], -+ ccx->fahm_th[1], ccx->fahm_th[0]); -+ odm_set_bb_reg(dm, R_0x970, MASKDWORD, val); -+ val = BYTE_2_DWORD(ccx->fahm_th[7], ccx->fahm_th[6], -+ ccx->fahm_th[5], ccx->fahm_th[4]); -+ odm_set_bb_reg(dm, R_0x974, MASKDWORD, val); -+ val = BYTE_2_DWORD(0, ccx->fahm_th[10], ccx->fahm_th[9], -+ ccx->fahm_th[8]); -+ odm_set_bb_reg(dm, R_0x978, 0xffffff, val); -+ break; -+ default: -+ break; -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Update FAHM_th[H->L]=[%d %d %d %d %d %d %d %d %d %d %d]\n", -+ ccx->fahm_th[10], ccx->fahm_th[9], ccx->fahm_th[8], -+ ccx->fahm_th[7], ccx->fahm_th[6], ccx->fahm_th[5], -+ ccx->fahm_th[4], ccx->fahm_th[3], ccx->fahm_th[2], -+ ccx->fahm_th[1], ccx->fahm_th[0]); -+} -+ -+boolean -+phydm_fahm_th_update_chk(void *dm_void, enum fahm_application fahm_app, -+ u8 *fahm_th, u32 *igi_new, boolean en_1db_mode, -+ u8 fahm_th0_manual) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ boolean is_update = false; -+ u8 igi_curr = phydm_get_igi(dm, BB_PATH_A); -+ u8 i = 0; -+ u8 th_tmp = igi_curr - CCA_CAP; -+ u8 th_step = 2; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "fahm_th_update_chk : App=%d, fahm_igi=0x%x, igi_curr=0x%x\n", -+ fahm_app, ccx->fahm_igi, igi_curr); -+ -+ if (igi_curr < 0x10) /* Protect for invalid IGI*/ -+ return false; -+ -+ switch (fahm_app) { -+ case FAHM_BACKGROUND: /*Get IGI from driver parameter(cur_ig_value)*/ -+ if (ccx->fahm_igi != igi_curr || ccx->fahm_app != fahm_app) { -+ is_update = true; -+ *igi_new = (u32)igi_curr; -+ -+ fahm_th[0] = (u8)IGI_2_NHM_TH(th_tmp); -+ -+ for (i = 1; i <= 10; i++) -+ fahm_th[i] = fahm_th[0] + -+ IGI_2_NHM_TH(th_step * i); -+ -+ } -+ break; -+ case FAHM_ACS: -+ if (ccx->fahm_igi != igi_curr || ccx->fahm_app != fahm_app) { -+ is_update = true; -+ *igi_new = (u32)igi_curr; -+ fahm_th[0] = (u8)IGI_2_NHM_TH(igi_curr - CCA_CAP); -+ for (i = 1; i <= 10; i++) -+ fahm_th[i] = fahm_th[0] + IGI_2_NHM_TH(2 * i); -+ } -+ break; -+ case FAHM_DBG: /*Get IGI from register*/ -+ igi_curr = phydm_get_igi(dm, BB_PATH_A); -+ if (ccx->fahm_igi != igi_curr || ccx->fahm_app != fahm_app) { -+ is_update = true; -+ *igi_new = (u32)igi_curr; -+ if (en_1db_mode) { -+ fahm_th[0] = (u8)IGI_2_NHM_TH(fahm_th0_manual + -+ 10); -+ th_step = 1; -+ } else { -+ fahm_th[0] = (u8)IGI_2_NHM_TH(igi_curr - -+ CCA_CAP); -+ } -+ -+ for (i = 1; i <= 10; i++) -+ fahm_th[i] = fahm_th[0] + -+ IGI_2_NHM_TH(th_step * i); -+ } -+ break; -+ } -+ -+ if (is_update) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[Update FAHM_TH] igi_RSSI=%d\n", -+ IGI_2_RSSI(*igi_new)); -+ -+ for (i = 0; i < NHM_TH_NUM; i++) -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "FAHM_th[%d](RSSI) = %d\n", -+ i, NTH_TH_2_RSSI(fahm_th[i])); -+ } else { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "No need to update FAHM_TH\n"); -+ } -+ return is_update; -+} -+ -+void phydm_fahm_set(void *dm_void, enum fahm_opt_fa inclu_fa, -+ enum fahm_opt_crc32_ok inclu_crc32_ok, -+ enum fahm_opt_crc32_err inclu_crc32_err, -+ enum fahm_application app, u16 period, boolean en_1db_mode, -+ u8 th0_manual) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 fahm_th[NHM_TH_NUM] = {0}; -+ u32 igi = 0x20; -+ u32 reg1 = 0, reg2 = 0, reg3 = 0; -+ u32 val_tmp = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "incld{fa, crc32_ok, crc32_err}={%d, %d, %d}, period=%d\n", -+ inclu_fa, inclu_crc32_ok, inclu_crc32_err, period); -+ -+ switch (dm->ic_ip_series) { -+ case PHYDM_IC_JGR3: -+ reg1 = R_0x1e60; -+ reg2 = R_0x1e58; -+ reg3 = R_0x1e5c; -+ break; -+ case PHYDM_IC_AC: -+ reg1 = R_0x994; -+ reg2 = R_0x1cf8; -+ break; -+ case PHYDM_IC_N: -+ reg1 = R_0x890; -+ reg2 = R_0x978; -+ reg3 = R_0x97c; -+ break; -+ default: -+ break; -+ } -+ -+ /*Set enable fa, ignore crc32 ok, ignore crc32 err*/ -+ if (inclu_fa != ccx->fahm_incld_fa || -+ inclu_crc32_ok != ccx->fahm_incld_crc32_ok || -+ inclu_crc32_err != ccx->fahm_incld_crc32_err) { -+ val_tmp = (u32)((inclu_crc32_err << 2) | (inclu_crc32_ok << 1) | -+ inclu_fa); -+ odm_set_bb_reg(dm, reg1, 0xe0, val_tmp); -+ ccx->fahm_incld_fa = inclu_fa; -+ ccx->fahm_incld_crc32_ok = inclu_crc32_ok; -+ ccx->fahm_incld_crc32_err = inclu_crc32_err; -+ } -+ -+ /*Set FAHM period*/ -+ if (period != ccx->fahm_period) { -+ switch (dm->ic_ip_series) { -+ case PHYDM_IC_AC: -+ odm_set_bb_reg(dm, reg2, 0xffff00, period); -+ break; -+ case PHYDM_IC_JGR3: -+ case PHYDM_IC_N: -+ odm_set_bb_reg(dm, reg2, 0xff000000, (period & 0xff)); -+ odm_set_bb_reg(dm, reg3, 0xff, (period & 0xff00) >> 8); -+ break; -+ default: -+ break; -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Update FAHM period ((%d)) -> ((%d))\n", -+ ccx->fahm_period, period); -+ -+ ccx->fahm_period = period; -+ } -+ -+ /*Set FAHM threshold*/ -+ if (phydm_fahm_th_update_chk(dm, app, &fahm_th[0], &igi, en_1db_mode, -+ th0_manual)) { -+ /*Pause IGI*/ -+ if (app == FAHM_BACKGROUND || app == FAHM_ACS) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "DIG Free Run\n"); -+ } else if (phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, -+ PHYDM_PAUSE_LEVEL_1, 1, &igi) -+ == PAUSE_FAIL) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "pause DIG Fail\n"); -+ return; -+ } else { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "pause DIG=0x%x\n", igi); -+ } -+ ccx->fahm_app = app; -+ ccx->fahm_igi = (u8)igi; -+ odm_move_memory(dm, &ccx->fahm_th[0], &fahm_th, NHM_TH_NUM); -+ -+ /*Set FAHM th*/ -+ phydm_fahm_set_th_reg(dm); -+ } -+} -+ -+boolean -+phydm_fahm_mntr_set(void *dm_void, struct fahm_para_info *para) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 fahm_time = 0; /*unit: 4us*/ -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ if (para->mntr_time == 0) -+ return false; -+ -+ if (para->lv >= FAHM_MAX_NUM) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Wrong LV=%d\n", para->lv); -+ return false; -+ } -+ -+ if (phydm_fahm_racing_ctrl(dm, para->lv) == PHYDM_SET_FAIL) -+ return false; -+ -+ if (para->mntr_time >= 262) -+ fahm_time = NHM_PERIOD_MAX; -+ else -+ fahm_time = para->mntr_time * MS_TO_4US_RATIO; -+ -+ phydm_fahm_set(dm, para->incld_fa, para->incld_crc32_ok, -+ para->incld_crc32_err, para->app, fahm_time, -+ para->en_1db_mode, para->th0_manual); -+ -+ return true; -+} -+ -+boolean -+phydm_fahm_mntr_chk(void *dm_void, u16 monitor_time /*unit ms*/) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ struct fahm_para_info para = {0}; -+ boolean fahm_chk_result = false; -+ boolean fahm_polling_result = false; -+ u32 sys_return_time = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ if (ccx->fahm_manual_ctrl) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "FAHM in manual ctrl\n"); -+ return fahm_chk_result; -+ } -+ sys_return_time = ccx->fahm_trigger_time + MAX_ENV_MNTR_TIME; -+ if (ccx->fahm_app != FAHM_BACKGROUND && -+ (sys_return_time > dm->phydm_sys_up_time)) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "fahm_app=%d, trigger_time %d, sys_time=%d\n", -+ ccx->fahm_app, ccx->fahm_trigger_time, -+ dm->phydm_sys_up_time); -+ -+ return fahm_chk_result; -+ } -+ -+ /*[FAHM get result & calculate Utility]---------------------------*/ -+ fahm_polling_result = phydm_fahm_get_result(dm); -+ if (fahm_polling_result) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get FAHM_rpt success\n"); -+ phydm_fahm_get_utility(dm); -+ } -+ -+ /*[FAHM trigger setting]------------------------------------------*/ -+ para.incld_fa = FAHM_INCLUDE_FA; -+ para.incld_crc32_ok = FAHM_EXCLUDE_CRC32_OK; -+ para.incld_crc32_err = FAHM_EXCLUDE_CRC32_ERR; -+ para.app = FAHM_BACKGROUND; -+ para.lv = FAHM_LV_1; -+ para.en_1db_mode = false; -+ para.mntr_time = monitor_time; -+ -+ fahm_chk_result = phydm_fahm_mntr_set(dm, ¶); -+ -+ return fahm_chk_result; -+} -+ -+void phydm_fahm_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 denum_sel = 0; -+ u32 reg = 0; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_FAHM)) -+ return; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ ccx->fahm_app = FAHM_BACKGROUND; -+ ccx->fahm_igi = 0xff; -+ -+ /*Set FAHM threshold*/ -+ ccx->fahm_ongoing = false; -+ ccx->fahm_set_lv = FAHM_RELEASE; -+ -+ if (phydm_fahm_th_update_chk(dm, ccx->fahm_app, &ccx->fahm_th[0], -+ (u32 *)&ccx->fahm_igi, false, 0)) -+ phydm_fahm_set_th_reg(dm); -+ -+ ccx->fahm_period = 0; -+ -+ ccx->fahm_incld_fa = FAHM_FA_INIT; -+ ccx->fahm_incld_crc32_ok = FAHM_CRC32_OK_INIT; -+ ccx->fahm_incld_crc32_err = FAHM_CRC32_ERR_INIT; -+ -+ ccx->fahm_manual_ctrl = 0; -+ ccx->fahm_rpt_stamp = 0; -+ -+ switch (dm->ic_ip_series) { -+ case PHYDM_IC_JGR3: -+ reg = R_0x1e60; -+ break; -+ case PHYDM_IC_AC: -+ reg = R_0x994; -+ break; -+ case PHYDM_IC_N: -+ reg = R_0x890; -+ break; -+ default: -+ break; -+ } -+ -+ /*enable CCK/OFDM CRC32 check*/ -+ odm_set_bb_reg(dm, reg, 0x18, 0x3); -+ /*denominator:FA/CRC32_OK/CRC32_ERR*/ -+ odm_set_bb_reg(dm, reg, 0x7000, 0x7); -+} -+ -+void phydm_fahm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ struct fahm_para_info para = {0}; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u16 result_tmp = 0; -+ u8 i = 0; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_FAHM)) -+ return; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "FAHM Basic-Trigger 262ms: {1}\n"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "FAHM Adv-Trigger: {2} {Include FA} {Include CRC32 ok} {Include CRC32 Err}\n {App:1 for dbg} {LV:1~4} {0~262ms}, 1dB mode :{en} {t[0](RSSI)}\n"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "FAHM Get Result: {100}\n"); -+ } else if (var1[0] == 100) { /*Get FAHM results*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "IGI=0x%x, rpt_stamp=%d\n", ccx->fahm_igi, -+ ccx->fahm_rpt_stamp); -+ -+ if (phydm_fahm_get_result(dm)) { -+ for (i = 0; i < NHM_RPT_NUM; i++) { -+ result_tmp = ccx->fahm_result[i]; -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "fahm_rpt[%d] = %d (%d percent)\n", -+ i, result_tmp, -+ (((result_tmp * 100) + 32768) >> 16)); -+ } -+ phydm_fahm_get_utility(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fahm_pwr=%d\n", ccx->fahm_pwr); -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Get FAHM_rpt Fail\n"); -+ } -+ ccx->fahm_manual_ctrl = 0; -+ } else { /*FAMH trigger*/ -+ ccx->fahm_manual_ctrl = 1; -+ -+ for (i = 1; i < 9; i++) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ -+ if (var1[0] == 1) { -+ para.incld_fa = FAHM_INCLUDE_FA; -+ para.incld_crc32_ok = FAHM_EXCLUDE_CRC32_OK; -+ para.incld_crc32_err = FAHM_EXCLUDE_CRC32_ERR; -+ para.app = FAHM_DBG; -+ para.lv = FAHM_LV_4; -+ para.mntr_time = 262; -+ para.en_1db_mode = false; -+ para.th0_manual = 0; -+ } else { -+ para.incld_fa = (enum fahm_opt_fa)var1[1]; -+ para.incld_crc32_ok = (enum fahm_opt_crc32_ok)var1[2]; -+ para.incld_crc32_err = (enum fahm_opt_crc32_err)var1[3]; -+ para.app = (enum fahm_application)var1[4]; -+ para.lv = (enum phydm_fahm_level)var1[5]; -+ para.mntr_time = (u16)var1[6]; -+ para.en_1db_mode = (boolean)var1[7]; -+ para.th0_manual = (u8)var1[8]; -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fa=%d, crc32_ok=%d, crc32_err=%d, app=%d, lv=%d, time=%d ms\n", -+ para.incld_fa, para.incld_crc32_ok, -+ para.incld_crc32_err, para.app, para.lv, -+ para.mntr_time); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "en_1db_mode=%d, th0(for 1db mode)=%d\n", -+ para.en_1db_mode, para.th0_manual); -+ -+ if (phydm_fahm_mntr_set(dm, ¶)) -+ phydm_fahm_trigger(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "IGI=0x%x, rpt_stamp=%d\n", ccx->fahm_igi, -+ ccx->fahm_rpt_stamp); -+ -+ for (i = 0; i < NHM_TH_NUM; i++) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "FAHM_th[%d] RSSI = %d\n", i, -+ NTH_TH_2_RSSI(ccx->fahm_th[i])); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_fahm_watchdog(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ boolean fahm_chk_ok = false; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_FAHM)) -+ return; -+ -+ fahm_chk_ok = phydm_fahm_mntr_chk(dm, 262); -+ -+ if (fahm_chk_ok) -+ phydm_fahm_trigger(dm); -+} -+ -+ -+#endif /*#ifdef FAHM_SUPPORT*/ -+ -+#ifdef NHM_SUPPORT -+ -+void phydm_nhm_racing_release(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 value32 = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "lv:(%d)->(0)\n", ccx->nhm_set_lv); -+ -+ ccx->nhm_ongoing = false; -+ ccx->nhm_set_lv = NHM_RELEASE; -+ -+ if (!(ccx->nhm_app == NHM_BACKGROUND || ccx->nhm_app == NHM_ACS)) { -+ phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, -+ PHYDM_PAUSE_LEVEL_1, 1, &value32); -+ } -+ -+ ccx->nhm_app = NHM_BACKGROUND; -+} -+ -+u8 phydm_nhm_racing_ctrl(void *dm_void, enum phydm_nhm_level nhm_lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 set_result = PHYDM_SET_SUCCESS; -+ /*@acquire to control NHM API*/ -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_ongoing=%d, lv:(%d)->(%d)\n", -+ ccx->nhm_ongoing, ccx->nhm_set_lv, nhm_lv); -+ if (ccx->nhm_ongoing) { -+ if (nhm_lv <= ccx->nhm_set_lv) { -+ set_result = PHYDM_SET_FAIL; -+ } else { -+ phydm_ccx_hw_restart(dm); -+ ccx->nhm_ongoing = false; -+ } -+ } -+ -+ if (set_result) -+ ccx->nhm_set_lv = nhm_lv; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm racing success=%d\n", set_result); -+ return set_result; -+} -+ -+void phydm_nhm_trigger(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 nhm_reg1 = 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ nhm_reg1 = R_0x994; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ nhm_reg1 = R_0x1e60; -+ #endif -+ else -+ nhm_reg1 = R_0x890; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ /* @Trigger NHM*/ -+ pdm_set_reg(dm, nhm_reg1, BIT(1), 0); -+ pdm_set_reg(dm, nhm_reg1, BIT(1), 1); -+ ccx->nhm_trigger_time = dm->phydm_sys_up_time; -+ ccx->nhm_rpt_stamp++; -+ ccx->nhm_ongoing = true; -+} -+ -+boolean -+phydm_nhm_check_rdy(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean is_ready = false; -+ u32 reg1 = 0, reg1_bit = 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ reg1 = R_0xfb4; -+ reg1_bit = 16; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ reg1 = R_0x2d4c; -+ reg1_bit = 16; -+ #endif -+ } else { -+ reg1 = R_0x8b4; -+ if (dm->support_ic_type & (ODM_RTL8710B | ODM_RTL8721D | -+ ODM_RTL8710C)) -+ reg1_bit = 25; -+ else -+ reg1_bit = 17; -+ } -+ if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) -+ is_ready = true; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM rdy=%d\n", is_ready); -+ -+ return is_ready; -+} -+ -+void phydm_nhm_cal_wgt(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 i = 0; -+ -+ for (i = 0; i < NHM_RPT_NUM; i++) { -+ if (i == 0) -+ ccx->nhm_wgt[0] = (u8)(MAX_2(ccx->nhm_th[0] - 2, 0)); -+ else if (i == (NHM_RPT_NUM - 1)) -+ ccx->nhm_wgt[NHM_RPT_NUM - 1] = (u8)(ccx->nhm_th[NHM_TH_NUM - 1] + 2); -+ else -+ ccx->nhm_wgt[i] = (u8)((ccx->nhm_th[i - 1] + ccx->nhm_th[i]) >> 1); -+ } -+} -+ -+u8 phydm_nhm_cal_wgt_avg(void *dm_void, u8 start_i, u8 end_i, u8 n_sum) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 i = 0; -+ u32 noise_tmp = 0; -+ u8 noise = 0; -+ u32 nhm_valid = 0; -+ -+ if (n_sum == 0) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "n_sum = 0, don't need to update noise\n"); -+ return 0x0; -+ } else if (end_i > NHM_RPT_NUM - 1) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "[WARNING]end_i is larger than 11!!\n"); -+ return 0x0; -+ } -+ -+ for (i = start_i; i <= end_i; i++) -+ noise_tmp += ccx->nhm_result[i] * ccx->nhm_wgt[i]; -+ -+ /* protection for the case of minus noise(RSSI)*/ -+ noise = (u8)(NTH_TH_2_RSSI(MAX_2(PHYDM_DIV(noise_tmp, n_sum), 20))); -+ nhm_valid = (n_sum * 100) >> 8; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "cal wgt_avg : valid: ((%d)) percent, noise(RSSI)=((%d))\n", -+ nhm_valid, noise); -+ -+ return noise; -+} -+ -+u8 phydm_nhm_cal_nhm_env(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 first_idx = 0; -+ u8 nhm_env = 0; -+ u8 i = 0; -+ -+ nhm_env = ccx->nhm_rpt_sum; -+ -+ /*search first cluster*/ -+ for (i = 0; i < NHM_RPT_NUM; i++) { -+ if (ccx->nhm_result[i]) { -+ first_idx = i; -+ break; -+ } -+ } -+ -+ /*exclude first cluster under -80dBm*/ -+ for (i = 0; i < 4; i++) { -+ if (((first_idx + i) < NHM_RPT_NUM) && -+ (ccx->nhm_wgt[first_idx + i] <= NHM_IC_NOISE_TH)) -+ nhm_env -= ccx->nhm_result[first_idx + i]; -+ } -+ -+ /*exclude nhm_rpt[0] above -80dBm*/ -+ if (ccx->nhm_wgt[0] > NHM_IC_NOISE_TH) -+ nhm_env -= ccx->nhm_result[0]; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "cal nhm_env: first_idx=%d, nhm_env=%d\n", -+ first_idx, nhm_env); -+ -+ return nhm_env; -+} -+ -+void phydm_nhm_get_utility(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 nhm_rpt_non_0 = 0; -+ u8 nhm_rpt_non_11 = 0; -+ u8 nhm_env = 0; -+ -+ if (ccx->nhm_rpt_sum >= ccx->nhm_result[0]) { -+ phydm_nhm_cal_wgt(dm); -+ -+ nhm_rpt_non_0 = ccx->nhm_rpt_sum - ccx->nhm_result[0]; -+ nhm_rpt_non_11 = ccx->nhm_rpt_sum - ccx->nhm_result[11]; -+ /*exclude nhm_r[0] above -80dBm or first cluster under -80dBm*/ -+ nhm_env = phydm_nhm_cal_nhm_env(dm); -+ ccx->nhm_ratio = (nhm_rpt_non_0 * 100) >> 8; -+ ccx->nhm_env_ratio = (nhm_env * 100) >> 8; -+ ccx->nhm_level_valid = (nhm_rpt_non_11 * 100) >> 8; -+ ccx->nhm_level = phydm_nhm_cal_wgt_avg(dm, 0, NHM_RPT_NUM - 2, -+ nhm_rpt_non_11); -+ ccx->nhm_pwr = phydm_nhm_cal_wgt_avg(dm, 0, NHM_RPT_NUM - 1, -+ ccx->nhm_rpt_sum); -+ } else { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[warning] nhm_rpt_sum invalid\n"); -+ ccx->nhm_ratio = 0; -+ ccx->nhm_env_ratio = 0; -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "nhm_ratio=%d, nhm_env_ratio=%d, nhm_level=%d, nhm_pwr=%d\n", -+ ccx->nhm_ratio, ccx->nhm_env_ratio, ccx->nhm_level, -+ ccx->nhm_pwr); -+} -+ -+boolean -+phydm_nhm_get_result(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 value32 = 0; -+ u8 i = 0; -+ u32 nhm_reg1 = 0; -+ u16 nhm_rpt_sum_tmp = 0; -+ u16 nhm_duration = 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ nhm_reg1 = R_0x994; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ nhm_reg1 = R_0x1e60; -+ #endif -+ else -+ nhm_reg1 = R_0x890; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ if (!(dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | -+ ODM_RTL8197G | ODM_RTL8723F))) -+ pdm_set_reg(dm, nhm_reg1, BIT(1), 0); -+ -+ if (!(phydm_nhm_check_rdy(dm))) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get NHM report Fail\n"); -+ phydm_nhm_racing_release(dm); -+ return false; -+ } -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ value32 = odm_read_4byte(dm, R_0xfa8); -+ odm_move_memory(dm, &ccx->nhm_result[0], &value32, 4); -+ -+ value32 = odm_read_4byte(dm, R_0xfac); -+ odm_move_memory(dm, &ccx->nhm_result[4], &value32, 4); -+ -+ value32 = odm_read_4byte(dm, R_0xfb0); -+ odm_move_memory(dm, &ccx->nhm_result[8], &value32, 4); -+ -+ /*@Get NHM duration*/ -+ value32 = odm_read_4byte(dm, R_0xfb4); -+ nhm_duration = (u16)(value32 & MASKLWORD); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ value32 = odm_read_4byte(dm, R_0x2d40); -+ odm_move_memory(dm, &ccx->nhm_result[0], &value32, 4); -+ -+ value32 = odm_read_4byte(dm, R_0x2d44); -+ odm_move_memory(dm, &ccx->nhm_result[4], &value32, 4); -+ -+ value32 = odm_read_4byte(dm, R_0x2d48); -+ odm_move_memory(dm, &ccx->nhm_result[8], &value32, 4); -+ -+ /*@Get NHM duration*/ -+ value32 = odm_read_4byte(dm, R_0x2d4c); -+ nhm_duration = (u16)(value32 & MASKLWORD); -+ #endif -+ } else { -+ value32 = odm_read_4byte(dm, R_0x8d8); -+ odm_move_memory(dm, &ccx->nhm_result[0], &value32, 4); -+ -+ value32 = odm_read_4byte(dm, R_0x8dc); -+ odm_move_memory(dm, &ccx->nhm_result[4], &value32, 4); -+ -+ value32 = odm_get_bb_reg(dm, R_0x8d0, 0xffff0000); -+ odm_move_memory(dm, &ccx->nhm_result[8], &value32, 2); -+ -+ value32 = odm_read_4byte(dm, R_0x8d4); -+ -+ ccx->nhm_result[10] = (u8)((value32 & MASKBYTE2) >> 16); -+ ccx->nhm_result[11] = (u8)((value32 & MASKBYTE3) >> 24); -+ -+ /*@Get NHM duration*/ -+ nhm_duration = (u16)(value32 & MASKLWORD); -+ } -+ -+ /* sum all nhm_result */ -+ if (ccx->nhm_period >= 65530) -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "NHM valid time = %d, valid: %d percent\n", -+ nhm_duration, (nhm_duration * 100) >> 16); -+ -+ for (i = 0; i < NHM_RPT_NUM; i++) -+ nhm_rpt_sum_tmp = (u16)(nhm_rpt_sum_tmp + ccx->nhm_result[i]); -+ -+ ccx->nhm_rpt_sum = (u8)nhm_rpt_sum_tmp; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "NHM_Rpt[%d](H->L)[%d %d %d %d %d %d %d %d %d %d %d %d]\n", -+ ccx->nhm_rpt_stamp, ccx->nhm_result[11], ccx->nhm_result[10], -+ ccx->nhm_result[9], ccx->nhm_result[8], ccx->nhm_result[7], -+ ccx->nhm_result[6], ccx->nhm_result[5], ccx->nhm_result[4], -+ ccx->nhm_result[3], ccx->nhm_result[2], ccx->nhm_result[1], -+ ccx->nhm_result[0]); -+ -+ phydm_nhm_racing_release(dm); -+ -+ if (nhm_rpt_sum_tmp > 255) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "[Warning] Invalid NHM RPT, total=%d\n", -+ nhm_rpt_sum_tmp); -+ return false; -+ } -+ -+ return true; -+} -+ -+void phydm_nhm_set_th_reg(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 reg1 = 0, reg2 = 0, reg3 = 0, reg4 = 0, reg4_bit = 0; -+ u32 val = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ reg1 = R_0x994; -+ reg2 = R_0x998; -+ reg3 = R_0x99c; -+ reg4 = R_0x9a0; -+ reg4_bit = MASKBYTE0; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ reg1 = R_0x1e60; -+ reg2 = R_0x1e44; -+ reg3 = R_0x1e48; -+ reg4 = R_0x1e5c; -+ reg4_bit = MASKBYTE2; -+ #endif -+ } else { -+ reg1 = R_0x890; -+ reg2 = R_0x898; -+ reg3 = R_0x89c; -+ reg4 = R_0xe28; -+ reg4_bit = MASKBYTE0; -+ } -+ -+ /*Set NHM threshold*/ /*Unit: PWdB U(8,1)*/ -+ val = BYTE_2_DWORD(ccx->nhm_th[3], ccx->nhm_th[2], -+ ccx->nhm_th[1], ccx->nhm_th[0]); -+ pdm_set_reg(dm, reg2, MASKDWORD, val); -+ val = BYTE_2_DWORD(ccx->nhm_th[7], ccx->nhm_th[6], -+ ccx->nhm_th[5], ccx->nhm_th[4]); -+ pdm_set_reg(dm, reg3, MASKDWORD, val); -+ pdm_set_reg(dm, reg4, reg4_bit, ccx->nhm_th[8]); -+ val = BYTE_2_DWORD(0, 0, ccx->nhm_th[10], ccx->nhm_th[9]); -+ pdm_set_reg(dm, reg1, 0xffff0000, val); -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Update NHM_th[H->L]=[%d %d %d %d %d %d %d %d %d %d %d]\n", -+ ccx->nhm_th[10], ccx->nhm_th[9], ccx->nhm_th[8], -+ ccx->nhm_th[7], ccx->nhm_th[6], ccx->nhm_th[5], -+ ccx->nhm_th[4], ccx->nhm_th[3], ccx->nhm_th[2], -+ ccx->nhm_th[1], ccx->nhm_th[0]); -+} -+ -+boolean -+phydm_nhm_th_update_chk(void *dm_void, enum nhm_application nhm_app, u8 *nhm_th, -+ u32 *igi_new, boolean en_1db_mode, u8 nhm_th0_manual) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ boolean is_update = false; -+ u8 igi_curr = phydm_get_igi(dm, BB_PATH_A); -+ u8 nhm_igi_th_11k_low[NHM_TH_NUM] = {0x12, 0x15, 0x18, 0x1b, 0x1e, -+ 0x23, 0x28, 0x2c, 0x78, -+ 0x78, 0x78}; -+ u8 nhm_igi_th_11k_high[NHM_TH_NUM] = {0x1e, 0x23, 0x28, 0x2d, 0x32, -+ 0x37, 0x78, 0x78, 0x78, 0x78, -+ 0x78}; -+ u8 nhm_igi_th_xbox[NHM_TH_NUM] = {0x1a, 0x2c, 0x2e, 0x30, 0x32, 0x34, -+ 0x36, 0x38, 0x3a, 0x3c, 0x3d}; -+ u8 i = 0; -+ u8 th_tmp = igi_curr - CCA_CAP; -+ u8 th_step = 2; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "App=%d, nhm_igi=0x%x, igi_curr=0x%x\n", -+ nhm_app, ccx->nhm_igi, igi_curr); -+ -+ if (igi_curr < 0x10) /* Protect for invalid IGI*/ -+ return false; -+ -+ switch (nhm_app) { -+ case NHM_BACKGROUND: /* @Get IGI form driver parameter(cur_ig_value)*/ -+ if (ccx->nhm_igi != igi_curr || ccx->nhm_app != nhm_app) { -+ is_update = true; -+ *igi_new = (u32)igi_curr; -+ -+ #ifdef NHM_DYM_PW_TH_SUPPORT -+ if (ccx->nhm_dym_pw_th_en) { -+ th_tmp = MAX_2(igi_curr - DYM_PWTH_CCA_CAP, 0); -+ th_step = 3; -+ } -+ #endif -+ -+ nhm_th[0] = (u8)IGI_2_NHM_TH(th_tmp); -+ -+ for (i = 1; i <= 10; i++) -+ nhm_th[i] = nhm_th[0] + -+ IGI_2_NHM_TH(th_step * i); -+ -+ } -+ break; -+ -+ case NHM_ACS: -+ if (ccx->nhm_igi != igi_curr || ccx->nhm_app != nhm_app) { -+ is_update = true; -+ *igi_new = (u32)igi_curr; -+ nhm_th[0] = (u8)IGI_2_NHM_TH(igi_curr - CCA_CAP); -+ for (i = 1; i <= 10; i++) -+ nhm_th[i] = nhm_th[0] + IGI_2_NHM_TH(2 * i); -+ } -+ break; -+ -+ case IEEE_11K_HIGH: -+ is_update = true; -+ *igi_new = 0x2c; -+ for (i = 0; i < NHM_TH_NUM; i++) -+ nhm_th[i] = IGI_2_NHM_TH(nhm_igi_th_11k_high[i]); -+ break; -+ -+ case IEEE_11K_LOW: -+ is_update = true; -+ *igi_new = 0x20; -+ for (i = 0; i < NHM_TH_NUM; i++) -+ nhm_th[i] = IGI_2_NHM_TH(nhm_igi_th_11k_low[i]); -+ break; -+ -+ case INTEL_XBOX: -+ is_update = true; -+ *igi_new = 0x36; -+ for (i = 0; i < NHM_TH_NUM; i++) -+ nhm_th[i] = IGI_2_NHM_TH(nhm_igi_th_xbox[i]); -+ break; -+ -+ case NHM_DBG: /*@Get IGI form register*/ -+ igi_curr = phydm_get_igi(dm, BB_PATH_A); -+ if (ccx->nhm_igi != igi_curr || ccx->nhm_app != nhm_app) { -+ is_update = true; -+ *igi_new = (u32)igi_curr; -+ if (en_1db_mode) { -+ nhm_th[0] = (u8)IGI_2_NHM_TH(nhm_th0_manual + -+ 10); -+ th_step = 1; -+ } else { -+ nhm_th[0] = (u8)IGI_2_NHM_TH(igi_curr - -+ CCA_CAP); -+ } -+ -+ for (i = 1; i <= 10; i++) -+ nhm_th[i] = nhm_th[0] + IGI_2_NHM_TH(th_step * -+ i); -+ } -+ break; -+ } -+ -+ if (is_update) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[Update NHM_TH] igi_RSSI=%d\n", -+ IGI_2_RSSI(*igi_new)); -+ -+ for (i = 0; i < NHM_TH_NUM; i++) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM_th[%d](RSSI) = %d\n", -+ i, NTH_TH_2_RSSI(nhm_th[i])); -+ } -+ } else { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "No need to update NHM_TH\n"); -+ } -+ return is_update; -+} -+ -+void phydm_nhm_set(void *dm_void, enum nhm_option_txon_all include_tx, -+ enum nhm_option_cca_all include_cca, -+ enum nhm_divider_opt_all divi_opt, -+ enum nhm_application nhm_app, u16 period, -+ boolean en_1db_mode, u8 nhm_th0_manual) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 nhm_th[NHM_TH_NUM] = {0}; -+ u32 igi = 0x20; -+ u32 reg1 = 0, reg2 = 0; -+ u32 val_tmp = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "incld{tx, cca}={%d, %d}, divi_opt=%d, period=%d\n", -+ include_tx, include_cca, divi_opt, period); -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ reg1 = R_0x994; -+ reg2 = R_0x990; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ reg1 = R_0x1e60; -+ reg2 = R_0x1e40; -+ #endif -+ } else { -+ reg1 = R_0x890; -+ reg2 = R_0x894; -+ } -+ -+ /*Set disable_ignore_cca, disable_ignore_txon, ccx_en*/ -+ if (include_tx != ccx->nhm_include_txon || -+ include_cca != ccx->nhm_include_cca || -+ divi_opt != ccx->nhm_divider_opt) { -+ /* some old ic is not supported on NHM divider option */ -+ if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8723B | -+ ODM_RTL8195A | ODM_RTL8192E)) { -+ val_tmp = (u32)((include_tx << 2) | -+ (include_cca << 1) | 1); -+ pdm_set_reg(dm, reg1, 0x700, val_tmp); -+ } else { -+ val_tmp = (u32)BIT_2_BYTE(divi_opt, include_tx, -+ include_cca, 1); -+ pdm_set_reg(dm, reg1, 0xf00, val_tmp); -+ } -+ ccx->nhm_include_txon = include_tx; -+ ccx->nhm_include_cca = include_cca; -+ ccx->nhm_divider_opt = divi_opt; -+ } -+ -+ /*Set NHM period*/ -+ if (period != ccx->nhm_period) { -+ pdm_set_reg(dm, reg2, MASKHWORD, period); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Update NHM period ((%d)) -> ((%d))\n", -+ ccx->nhm_period, period); -+ -+ ccx->nhm_period = period; -+ } -+ -+ /*Set NHM threshold*/ -+ if (phydm_nhm_th_update_chk(dm, nhm_app, &nhm_th[0], &igi, -+ en_1db_mode, nhm_th0_manual)) { -+ /*Pause IGI*/ -+ if (nhm_app == NHM_BACKGROUND || nhm_app == NHM_ACS) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "DIG Free Run\n"); -+ } else if (phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, -+ PHYDM_PAUSE_LEVEL_1, 1, &igi) -+ == PAUSE_FAIL) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "pause DIG Fail\n"); -+ return; -+ } else { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "pause DIG=0x%x\n", igi); -+ } -+ ccx->nhm_app = nhm_app; -+ ccx->nhm_igi = (u8)igi; -+ odm_move_memory(dm, &ccx->nhm_th[0], &nhm_th, NHM_TH_NUM); -+ -+ /*Set NHM th*/ -+ phydm_nhm_set_th_reg(dm); -+ } -+} -+ -+boolean -+phydm_nhm_mntr_set(void *dm_void, struct nhm_para_info *nhm_para) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 nhm_time = 0; /*unit: 4us*/ -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ if (nhm_para->mntr_time == 0) -+ return false; -+ -+ if (nhm_para->nhm_lv >= NHM_MAX_NUM) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Wrong LV=%d\n", nhm_para->nhm_lv); -+ return false; -+ } -+ -+ if (phydm_nhm_racing_ctrl(dm, nhm_para->nhm_lv) == PHYDM_SET_FAIL) -+ return false; -+ -+ if (nhm_para->mntr_time >= 262) -+ nhm_time = NHM_PERIOD_MAX; -+ else -+ nhm_time = nhm_para->mntr_time * MS_TO_4US_RATIO; -+ -+ phydm_nhm_set(dm, nhm_para->incld_txon, nhm_para->incld_cca, -+ nhm_para->div_opt, nhm_para->nhm_app, nhm_time, -+ nhm_para->en_1db_mode, nhm_para->nhm_th0_manual); -+ -+ return true; -+} -+ -+#ifdef NHM_DYM_PW_TH_SUPPORT -+void -+phydm_nhm_restore_pw_th(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ -+ odm_set_bb_reg(dm, R_0x82c, 0x3f, ccx->pw_th_rf20_ori); -+} -+ -+void -+phydm_nhm_set_pw_th(void *dm_void, u8 noise, boolean chk_succ) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ boolean not_update = false; -+ u8 pw_th_rf20_new = 0; -+ u8 pw_th_u_bnd = 0; -+ s8 noise_diff = 0; -+ u8 point_mean = 15; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ if (*dm->band_width != CHANNEL_WIDTH_20 || -+ *dm->band_type == ODM_BAND_5G) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "bandwidth=((%d)), band=((%d))\n", -+ *dm->band_width, *dm->band_type); -+ phydm_nhm_restore_pw_th(dm); -+ return; -+ } -+ -+ if (chk_succ) { -+ noise_diff = noise - (ccx->nhm_igi - 10); -+ pw_th_u_bnd = (u8)(noise_diff + 32 + point_mean); -+ -+ pw_th_u_bnd = MIN_2(pw_th_u_bnd, ccx->nhm_pw_th_max); -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "noise_diff=((%d)), max=((%d)), pw_th_u_bnd=((%d))\n", -+ noise_diff, ccx->nhm_pw_th_max, pw_th_u_bnd); -+ -+ if (pw_th_u_bnd > ccx->pw_th_rf20_cur) { -+ pw_th_rf20_new = ccx->pw_th_rf20_cur + 1; -+ } else if (pw_th_u_bnd < ccx->pw_th_rf20_cur) { -+ if (ccx->pw_th_rf20_cur > ccx->pw_th_rf20_ori) -+ pw_th_rf20_new = ccx->pw_th_rf20_cur - 1; -+ else /*ccx->pw_th_rf20_cur == ccx->pw_th_ori*/ -+ not_update = true; -+ } else {/*pw_th_u_bnd == ccx->pw_th_rf20_cur*/ -+ not_update = true; -+ } -+ } else { -+ if (ccx->pw_th_rf20_cur > ccx->pw_th_rf20_ori) -+ pw_th_rf20_new = ccx->pw_th_rf20_cur - 1; -+ else /*ccx->pw_th_rf20_cur == ccx->pw_th_ori*/ -+ not_update = true; -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "pw_th_cur=((%d)), pw_th_new=((%d))\n", -+ ccx->pw_th_rf20_cur, pw_th_rf20_new); -+ -+ if (!not_update) { -+ odm_set_bb_reg(dm, R_0x82c, 0x3f, pw_th_rf20_new); -+ ccx->pw_th_rf20_cur = pw_th_rf20_new; -+ } -+} -+ -+void -+phydm_nhm_dym_pw_th(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 i = 0; -+ u8 n_sum = 0; -+ u8 noise = 0; -+ boolean chk_succ = false; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ for (i = 0; i < NHM_RPT_NUM - 3; i++) { -+ n_sum = ccx->nhm_result[i] + ccx->nhm_result[i + 1] + -+ ccx->nhm_result[i + 2] + ccx->nhm_result[i + 3]; -+ if (n_sum >= ccx->nhm_sl_pw_th) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Do sl[%d:%d]\n", i, i + 3); -+ chk_succ = true; -+ noise = phydm_nhm_cal_wgt_avg(dm, i, i + 3, n_sum); -+ break; -+ } -+ } -+ -+ if (!chk_succ) -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "SL method failed!\n"); -+ -+ phydm_nhm_set_pw_th(dm, noise, chk_succ); -+} -+ -+boolean -+phydm_nhm_dym_pw_th_en(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ struct phydm_iot_center *iot_table = &dm->iot_table; -+ -+ if (!(dm->support_ic_type & ODM_RTL8822C)) -+ return false; -+ -+ if (ccx->dym_pwth_manual_ctrl) -+ return true; -+ -+ if (dm->iot_table.phydm_patch_id == 0x100f0401 || -+ iot_table->patch_id_100f0401) { -+ return true; -+ } else if (ccx->nhm_dym_pw_th_en) { -+ phydm_nhm_restore_pw_th(dm); -+ return false; -+ } else { -+ return false; -+ } -+} -+#endif -+ -+/*Environment Monitor*/ -+boolean -+phydm_nhm_mntr_chk(void *dm_void, u16 monitor_time /*unit ms*/) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ struct nhm_para_info nhm_para = {0}; -+ boolean nhm_chk_result = false; -+ boolean nhm_polling_result = false; -+ u32 sys_return_time = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ if (ccx->nhm_manual_ctrl) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "NHM in manual ctrl\n"); -+ return nhm_chk_result; -+ } -+ sys_return_time = ccx->nhm_trigger_time + MAX_ENV_MNTR_TIME; -+ if (ccx->nhm_app != NHM_BACKGROUND && -+ (sys_return_time > dm->phydm_sys_up_time)) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "nhm_app=%d, trigger_time %d, sys_time=%d\n", -+ ccx->nhm_app, ccx->nhm_trigger_time, -+ dm->phydm_sys_up_time); -+ -+ return nhm_chk_result; -+ } -+ -+ /*[NHM get result & calculate Utility----------------------------*/ -+ nhm_polling_result = phydm_nhm_get_result(dm); -+ if (nhm_polling_result) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get NHM_rpt success\n"); -+ phydm_nhm_get_utility(dm); -+ } -+ -+ #ifdef NHM_DYM_PW_TH_SUPPORT -+ ccx->nhm_dym_pw_th_en = phydm_nhm_dym_pw_th_en(dm); -+ if (ccx->nhm_dym_pw_th_en) { -+ if (nhm_polling_result) -+ phydm_nhm_dym_pw_th(dm); -+ else -+ phydm_nhm_set_pw_th(dm, 0x0, false); -+ } -+ #endif -+ -+ /*[NHM trigger setting]------------------------------------------*/ -+ nhm_para.incld_txon = NHM_EXCLUDE_TXON; -+ nhm_para.incld_cca = NHM_EXCLUDE_CCA; -+ nhm_para.div_opt = NHM_CNT_ALL; -+ nhm_para.nhm_app = NHM_BACKGROUND; -+ nhm_para.nhm_lv = NHM_LV_1; -+ nhm_para.en_1db_mode = false; -+ nhm_para.mntr_time = monitor_time; -+ -+ #ifdef NHM_DYM_PW_TH_SUPPORT -+ if (ccx->nhm_dym_pw_th_en) { -+ nhm_para.div_opt = NHM_VALID; -+ nhm_para.mntr_time = monitor_time >> ccx->nhm_period_decre; -+ } -+ #endif -+ -+ nhm_chk_result = phydm_nhm_mntr_set(dm, &nhm_para); -+ -+ return nhm_chk_result; -+} -+ -+void phydm_nhm_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "cur_igi=0x%x\n", -+ dm->dm_dig_table.cur_ig_value); -+ -+ ccx->nhm_app = NHM_BACKGROUND; -+ ccx->nhm_igi = 0xff; -+ -+ /*Set NHM threshold*/ -+ ccx->nhm_ongoing = false; -+ ccx->nhm_set_lv = NHM_RELEASE; -+ -+ if (phydm_nhm_th_update_chk(dm, ccx->nhm_app, &ccx->nhm_th[0], -+ (u32 *)&ccx->nhm_igi, false, 0)) -+ phydm_nhm_set_th_reg(dm); -+ -+ ccx->nhm_period = 0; -+ -+ ccx->nhm_include_cca = NHM_CCA_INIT; -+ ccx->nhm_include_txon = NHM_TXON_INIT; -+ ccx->nhm_divider_opt = NHM_CNT_INIT; -+ -+ ccx->nhm_manual_ctrl = 0; -+ ccx->nhm_rpt_stamp = 0; -+ -+ #ifdef NHM_DYM_PW_TH_SUPPORT -+ if (dm->support_ic_type & ODM_RTL8822C) { -+ ccx->nhm_dym_pw_th_en = false; -+ ccx->pw_th_rf20_ori = (u8)odm_get_bb_reg(dm, R_0x82c, 0x3f); -+ ccx->pw_th_rf20_cur = ccx->pw_th_rf20_ori; -+ ccx->nhm_pw_th_max = 63; -+ ccx->nhm_sl_pw_th = 100; /*39%*/ -+ ccx->nhm_period_decre = 1; -+ ccx->dym_pwth_manual_ctrl = false; -+ } -+ #endif -+} -+ -+void phydm_nhm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ struct nhm_para_info nhm_para = {0}; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 result_tmp = 0; -+ u8 i = 0; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "NHM Basic-Trigger 262ms: {1}\n"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "NHM Adv-Trigger: {2} {Include TXON} {Include CCA}\n{0:Cnt_all, 1:Cnt valid} {App:5 for dbg} {LV:1~4} {0~262ms}, 1dB mode :{en} {t[0](RSSI)}\n"); -+ #ifdef NHM_DYM_PW_TH_SUPPORT -+ if (dm->support_ic_type & ODM_RTL8822C) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "NHM dym_pw_th: {3} {0:off}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "NHM dym_pw_th: {3} {1:on} {max} {period_decre} {sl_th}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "NHM dym_pw_th: {3} {2:fast on}\n"); -+ } -+ #endif -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "NHM Get Result: {100}\n"); -+ } else if (var1[0] == 100) { /*Get NHM results*/ -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "IGI=0x%x, rpt_stamp=%d\n", ccx->nhm_igi, -+ ccx->nhm_rpt_stamp); -+ -+ if (phydm_nhm_get_result(dm)) { -+ for (i = 0; i < NHM_RPT_NUM; i++) { -+ result_tmp = ccx->nhm_result[i]; -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "nhm_rpt[%d] = %d (%d percent)\n", -+ i, result_tmp, -+ (((result_tmp * 100) + 128) >> 8)); -+ } -+ phydm_nhm_get_utility(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "NHM_noise: valid: %d percent, noise(RSSI) = %d\n", -+ ccx->nhm_level_valid, ccx->nhm_level); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "NHM_pwr: nhm_pwr (RSSI) = %d\n", ccx->nhm_pwr); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "ratio: nhm_ratio=%d, nhm_env_ratio=%d\n", -+ ccx->nhm_ratio, ccx->nhm_env_ratio); -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Get NHM_rpt Fail\n"); -+ } -+ ccx->nhm_manual_ctrl = 0; -+ #ifdef NHM_DYM_PW_TH_SUPPORT -+ } else if (var1[0] == 3) { /*NMH dym_pw_th*/ -+ if (dm->support_ic_type & ODM_RTL8822C) { -+ for (i = 1; i < 7; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var1[i]); -+ } -+ -+ if (var1[1] == 1) { -+ ccx->nhm_dym_pw_th_en = true; -+ ccx->nhm_pw_th_max = (u8)var1[2]; -+ ccx->nhm_period_decre = (u8)var1[3]; -+ ccx->nhm_sl_pw_th = (u8)var1[4]; -+ ccx->dym_pwth_manual_ctrl = true; -+ } else if (var1[1] == 2) { -+ ccx->nhm_dym_pw_th_en = true; -+ ccx->nhm_pw_th_max = 63; -+ ccx->nhm_period_decre = 1; -+ ccx->nhm_sl_pw_th = 100; -+ ccx->dym_pwth_manual_ctrl = true; -+ } else { -+ ccx->nhm_dym_pw_th_en = false; -+ phydm_nhm_restore_pw_th(dm); -+ ccx->dym_pwth_manual_ctrl = false; -+ } -+ } -+ #endif -+ } else { /*NMH trigger*/ -+ ccx->nhm_manual_ctrl = 1; -+ -+ for (i = 1; i < 9; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var1[i]); -+ } -+ -+ if (var1[0] == 1) { -+ nhm_para.incld_txon = NHM_EXCLUDE_TXON; -+ nhm_para.incld_cca = NHM_EXCLUDE_CCA; -+ nhm_para.div_opt = NHM_CNT_ALL; -+ nhm_para.nhm_app = NHM_DBG; -+ nhm_para.nhm_lv = NHM_LV_4; -+ nhm_para.mntr_time = 262; -+ nhm_para.en_1db_mode = false; -+ nhm_para.nhm_th0_manual = 0; -+ } else { -+ nhm_para.incld_txon = (enum nhm_option_txon_all)var1[1]; -+ nhm_para.incld_cca = (enum nhm_option_cca_all)var1[2]; -+ nhm_para.div_opt = (enum nhm_divider_opt_all)var1[3]; -+ nhm_para.nhm_app = (enum nhm_application)var1[4]; -+ nhm_para.nhm_lv = (enum phydm_nhm_level)var1[5]; -+ nhm_para.mntr_time = (u16)var1[6]; -+ nhm_para.en_1db_mode = (boolean)var1[7]; -+ nhm_para.nhm_th0_manual = (u8)var1[8]; -+ -+ /*some old ic is not supported on NHM divider option */ -+ if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8723B | -+ ODM_RTL8195A | ODM_RTL8192E)) { -+ nhm_para.div_opt = NHM_CNT_ALL; -+ } -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "txon=%d, cca=%d, dev=%d, app=%d, lv=%d, time=%d ms\n", -+ nhm_para.incld_txon, nhm_para.incld_cca, -+ nhm_para.div_opt, nhm_para.nhm_app, -+ nhm_para.nhm_lv, nhm_para.mntr_time); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "en_1db_mode=%d, th0(for 1db mode)=%d\n", -+ nhm_para.en_1db_mode, nhm_para.nhm_th0_manual); -+ -+ if (phydm_nhm_mntr_set(dm, &nhm_para)) -+ phydm_nhm_trigger(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "IGI=0x%x, rpt_stamp=%d\n", ccx->nhm_igi, -+ ccx->nhm_rpt_stamp); -+ -+ for (i = 0; i < NHM_TH_NUM; i++) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "NHM_th[%d] RSSI = %d\n", i, -+ NTH_TH_2_RSSI(ccx->nhm_th[i])); -+ } -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#endif /*@#ifdef NHM_SUPPORT*/ -+ -+#ifdef CLM_SUPPORT -+ -+void phydm_clm_racing_release(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "lv:(%d)->(0)\n", ccx->clm_set_lv); -+ -+ ccx->clm_ongoing = false; -+ ccx->clm_set_lv = CLM_RELEASE; -+ ccx->clm_app = CLM_BACKGROUND; -+} -+ -+u8 phydm_clm_racing_ctrl(void *dm_void, enum phydm_clm_level clm_lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 set_result = PHYDM_SET_SUCCESS; -+ /*@acquire to control CLM API*/ -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_ongoing=%d, lv:(%d)->(%d)\n", -+ ccx->clm_ongoing, ccx->clm_set_lv, clm_lv); -+ if (ccx->clm_ongoing) { -+ if (clm_lv <= ccx->clm_set_lv) { -+ set_result = PHYDM_SET_FAIL; -+ } else { -+ phydm_ccx_hw_restart(dm); -+ ccx->clm_ongoing = false; -+ } -+ } -+ -+ if (set_result) -+ ccx->clm_set_lv = clm_lv; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "clm racing success=%d\n", set_result); -+ return set_result; -+} -+ -+void phydm_clm_c2h_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx_info = &dm->dm_ccx_info; -+ u8 clm_report = cmd_buf[0]; -+ /*@u8 clm_report_idx = cmd_buf[1];*/ -+ -+ if (cmd_len >= 12) -+ return; -+ -+ ccx_info->clm_fw_result_acc += clm_report; -+ ccx_info->clm_fw_result_cnt++; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%d] clm_report= %d\n", -+ ccx_info->clm_fw_result_cnt, clm_report); -+} -+ -+void phydm_clm_h2c(void *dm_void, u16 obs_time, u8 fw_clm_en) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 h2c_val[H2C_MAX_LENGTH] = {0}; -+ u8 i = 0; -+ u8 obs_time_idx = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "obs_time_index=%d *4 us\n", obs_time); -+ -+ for (i = 1; i <= 16; i++) { -+ if (obs_time & BIT(16 - i)) { -+ obs_time_idx = 16 - i; -+ break; -+ } -+ } -+#if 0 -+ obs_time = (2 ^ 16 - 1)~(2 ^ 15) => obs_time_idx = 15 (65535 ~32768) -+ obs_time = (2 ^ 15 - 1)~(2 ^ 14) => obs_time_idx = 14 -+ ... -+ ... -+ ... -+ obs_time = (2 ^ 1 - 1)~(2 ^ 0) => obs_time_idx = 0 -+ -+#endif -+ -+ h2c_val[0] = obs_time_idx | (((fw_clm_en) ? 1 : 0) << 7); -+ h2c_val[1] = CLM_MAX_REPORT_TIME; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "PHYDM h2c[0x4d]=0x%x %x %x %x %x %x %x\n", -+ h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], -+ h2c_val[1], h2c_val[0]); -+ -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_CLM_MNTR, H2C_MAX_LENGTH, h2c_val); -+} -+ -+void phydm_clm_setting(void *dm_void, u16 clm_period /*@4us sample 1 time*/) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ -+ if (ccx->clm_period != clm_period) { -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ odm_set_bb_reg(dm, R_0x990, MASKLWORD, clm_period); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ odm_set_bb_reg(dm, R_0x1e40, MASKLWORD, clm_period); -+ #endif -+ else if (dm->support_ic_type & ODM_IC_11N_SERIES) -+ odm_set_bb_reg(dm, R_0x894, MASKLWORD, clm_period); -+ -+ ccx->clm_period = clm_period; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Update CLM period ((%d)) -> ((%d))\n", -+ ccx->clm_period, clm_period); -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Set CLM period=%d * 4us\n", -+ ccx->clm_period); -+} -+ -+void phydm_clm_trigger(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 reg1 = 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ reg1 = R_0x994; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ reg1 = R_0x1e60; -+ #endif -+ else -+ reg1 = R_0x890; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ odm_set_bb_reg(dm, reg1, BIT(0), 0x0); -+ odm_set_bb_reg(dm, reg1, BIT(0), 0x1); -+ -+ ccx->clm_trigger_time = dm->phydm_sys_up_time; -+ ccx->clm_rpt_stamp++; -+ ccx->clm_ongoing = true; -+} -+ -+boolean -+phydm_clm_check_rdy(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean is_ready = false; -+ u32 reg1 = 0, reg1_bit = 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ reg1 = R_0xfa4; -+ reg1_bit = 16; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ reg1 = R_0x2d88; -+ reg1_bit = 16; -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ if (dm->support_ic_type & (ODM_RTL8710B | ODM_RTL8721D | -+ ODM_RTL8710C)) { -+ reg1 = R_0x8b4; -+ reg1_bit = 24; -+ } else { -+ reg1 = R_0x8b4; -+ reg1_bit = 16; -+ } -+ } -+ if (odm_get_bb_reg(dm, reg1, BIT(reg1_bit))) -+ is_ready = true; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM rdy=%d\n", is_ready); -+ -+ return is_ready; -+} -+ -+void phydm_clm_get_utility(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 clm_result_tmp; -+ -+ if (ccx->clm_period == 0) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[warning] clm_period = 0\n"); -+ ccx->clm_ratio = 0; -+ } else if (ccx->clm_period >= 65530) { -+ clm_result_tmp = (u32)(ccx->clm_result * 100); -+ ccx->clm_ratio = (u8)((clm_result_tmp + (1 << 15)) >> 16); -+ } else { -+ clm_result_tmp = (u32)(ccx->clm_result * 100); -+ ccx->clm_ratio = (u8)(clm_result_tmp / (u32)ccx->clm_period); -+ } -+} -+ -+boolean -+phydm_clm_get_result(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx_info = &dm->dm_ccx_info; -+ u32 reg1 = 0; -+ u32 val = 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ reg1 = R_0x994; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ reg1 = R_0x1e60; -+ #endif -+ else -+ reg1 = R_0x890; -+ if (!(dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | -+ ODM_RTL8197G | ODM_RTL8723F))) -+ odm_set_bb_reg(dm, reg1, BIT(0), 0x0); -+ if (!(phydm_clm_check_rdy(dm))) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get CLM report Fail\n"); -+ phydm_clm_racing_release(dm); -+ return false; -+ } -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ val = odm_get_bb_reg(dm, R_0xfa4, MASKLWORD); -+ ccx_info->clm_result = (u16)val; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ val = odm_get_bb_reg(dm, R_0x2d88, MASKLWORD); -+ ccx_info->clm_result = (u16)val; -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ val = odm_get_bb_reg(dm, R_0x8d0, MASKLWORD); -+ ccx_info->clm_result = (u16)val; -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM result = %d *4 us\n", -+ ccx_info->clm_result); -+ phydm_clm_racing_release(dm); -+ return true; -+} -+ -+void phydm_clm_mntr_fw(void *dm_void, u16 monitor_time /*unit ms*/) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 val = 0; -+ -+ /*@[Get CLM report]*/ -+ if (ccx->clm_fw_result_cnt != 0) { -+ val = ccx->clm_fw_result_acc / ccx->clm_fw_result_cnt; -+ ccx->clm_ratio = (u8)val; -+ } else { -+ ccx->clm_ratio = 0; -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n", -+ ccx->clm_fw_result_acc, ccx->clm_fw_result_cnt); -+ -+ ccx->clm_fw_result_acc = 0; -+ ccx->clm_fw_result_cnt = 0; -+ -+ /*@[CLM trigger]*/ -+ if (monitor_time >= 262) -+ ccx->clm_period = 65535; -+ else -+ ccx->clm_period = monitor_time * MS_TO_4US_RATIO; -+ -+ phydm_clm_h2c(dm, ccx->clm_period, true); -+} -+ -+boolean -+phydm_clm_mntr_set(void *dm_void, struct clm_para_info *clm_para) -+{ -+ /*@Driver Monitor CLM*/ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u16 clm_period = 0; -+ -+ if (clm_para->mntr_time == 0) -+ return false; -+ -+ if (clm_para->clm_lv >= CLM_MAX_NUM) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[WARNING] Wrong LV=%d\n", -+ clm_para->clm_lv); -+ return false; -+ } -+ -+ if (phydm_clm_racing_ctrl(dm, clm_para->clm_lv) == PHYDM_SET_FAIL) -+ return false; -+ -+ if (clm_para->mntr_time >= 262) -+ clm_period = CLM_PERIOD_MAX; -+ else -+ clm_period = clm_para->mntr_time * MS_TO_4US_RATIO; -+ -+ ccx->clm_app = clm_para->clm_app; -+ phydm_clm_setting(dm, clm_period); -+ -+ return true; -+} -+ -+boolean -+phydm_clm_mntr_chk(void *dm_void, u16 monitor_time /*unit ms*/) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ struct clm_para_info clm_para = {0}; -+ boolean clm_chk_result = false; -+ u32 sys_return_time = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__); -+ if (ccx->clm_manual_ctrl) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "CLM in manual ctrl\n"); -+ return clm_chk_result; -+ } -+ -+ sys_return_time = ccx->clm_trigger_time + MAX_ENV_MNTR_TIME; -+ -+ if (ccx->clm_app != CLM_BACKGROUND && -+ sys_return_time > dm->phydm_sys_up_time) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "trigger_time %d, sys_time=%d\n", -+ ccx->clm_trigger_time, dm->phydm_sys_up_time); -+ -+ return clm_chk_result; -+ } -+ -+ clm_para.clm_app = CLM_BACKGROUND; -+ clm_para.clm_lv = CLM_LV_1; -+ clm_para.mntr_time = monitor_time; -+ if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) { -+ /*@[Get CLM report]*/ -+ if (phydm_clm_get_result(dm)) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get CLM_rpt success\n"); -+ phydm_clm_get_utility(dm); -+ } -+ -+ /*@[CLM trigger]----------------------------------------------*/ -+ if (phydm_clm_mntr_set(dm, &clm_para)) -+ clm_chk_result = true; -+ } else { -+ phydm_clm_mntr_fw(dm, monitor_time); -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_ratio=%d\n", ccx->clm_ratio); -+ -+ /*@PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_chk_result=%d\n",clm_chk_result);*/ -+ -+ return clm_chk_result; -+} -+ -+void phydm_set_clm_mntr_mode(void *dm_void, enum clm_monitor_mode mode) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx_info = &dm->dm_ccx_info; -+ -+ if (ccx_info->clm_mntr_mode != mode) { -+ ccx_info->clm_mntr_mode = mode; -+ phydm_ccx_hw_restart(dm); -+ -+ if (mode == CLM_DRIVER_MNTR) -+ phydm_clm_h2c(dm, CLM_PERIOD_MAX, 0); -+ } -+} -+ -+void phydm_clm_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ ccx->clm_ongoing = false; -+ ccx->clm_manual_ctrl = 0; -+ ccx->clm_mntr_mode = CLM_DRIVER_MNTR; -+ ccx->clm_period = 0; -+ ccx->clm_rpt_stamp = 0; -+ phydm_clm_setting(dm, 65535); -+} -+ -+void phydm_clm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ struct clm_para_info clm_para = {0}; -+ u32 i; -+ -+ for (i = 0; i < 4; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ } -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "CLM Driver Basic-Trigger 262ms: {1}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "CLM Driver Adv-Trigger: {2} {app} {LV} {0~262ms}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "CLM FW Trigger: {3} {1:drv, 2:fw}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "CLM Get Result: {100}\n"); -+ } else if (var1[0] == 100) { /* @Get CLM results */ -+ -+ if (phydm_clm_get_result(dm)) -+ phydm_clm_get_utility(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "clm_rpt_stamp=%d\n", ccx->clm_rpt_stamp); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "clm_ratio:((%d percent)) = (%d us/ %d us)\n", -+ ccx->clm_ratio, ccx->clm_result << 2, -+ ccx->clm_period << 2); -+ -+ ccx->clm_manual_ctrl = 0; -+ } else if (var1[0] == 3) { -+ phydm_set_clm_mntr_mode(dm, (enum clm_monitor_mode)var1[1]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "CLM mode: %s mode\n", -+ ((ccx->clm_mntr_mode == CLM_FW_MNTR) ? "FW" : "Drv")); -+ } else { /* Set & trigger CLM */ -+ ccx->clm_manual_ctrl = 1; -+ -+ if (var1[0] == 1) { -+ clm_para.clm_app = CLM_BACKGROUND; -+ clm_para.clm_lv = CLM_LV_4; -+ clm_para.mntr_time = 262; -+ ccx->clm_mntr_mode = CLM_DRIVER_MNTR; -+ } else if (var1[0] == 2) { -+ clm_para.clm_app = (enum clm_application)var1[1]; -+ clm_para.clm_lv = (enum phydm_clm_level)var1[2]; -+ ccx->clm_mntr_mode = CLM_DRIVER_MNTR; -+ clm_para.mntr_time = (u16)var1[3]; -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "app=%d, lv=%d, mode=%s, time=%d ms\n", -+ clm_para.clm_app, clm_para.clm_lv, -+ ((ccx->clm_mntr_mode == CLM_FW_MNTR) ? "FW" : -+ "driver"), clm_para.mntr_time); -+ -+ if (phydm_clm_mntr_set(dm, &clm_para)) -+ phydm_clm_trigger(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "clm_rpt_stamp=%d\n", ccx->clm_rpt_stamp); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#endif /*@#ifdef CLM_SUPPORT*/ -+ -+u8 phydm_env_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para, -+ struct clm_para_info *clm_para, -+ struct env_trig_rpt *trig_rpt) -+{ -+ u8 trigger_result = 0; -+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ boolean nhm_set_ok = false; -+ boolean clm_set_ok = false; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__); -+ -+ /*@[NHM]*/ -+ nhm_set_ok = phydm_nhm_mntr_set(dm, nhm_para); -+ -+ /*@[CLM]*/ -+ if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) { -+ clm_set_ok = phydm_clm_mntr_set(dm, clm_para); -+ } else if (ccx->clm_mntr_mode == CLM_FW_MNTR) { -+ phydm_clm_h2c(dm, CLM_PERIOD_MAX, true); -+ trigger_result |= CLM_SUCCESS; -+ } -+ -+ if (nhm_set_ok) { -+ phydm_nhm_trigger(dm); -+ trigger_result |= NHM_SUCCESS; -+ } -+ -+ if (clm_set_ok) { -+ phydm_clm_trigger(dm); -+ trigger_result |= CLM_SUCCESS; -+ } -+ -+ /*@monitor for the test duration*/ -+ ccx->start_time = odm_get_current_time(dm); -+ -+ trig_rpt->nhm_rpt_stamp = ccx->nhm_rpt_stamp; -+ trig_rpt->clm_rpt_stamp = ccx->clm_rpt_stamp; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_rpt_stamp=%d, clm_rpt_stamp=%d,\n\n", -+ trig_rpt->nhm_rpt_stamp, trig_rpt->clm_rpt_stamp); -+#endif -+ return trigger_result; -+} -+ -+u8 phydm_env_mntr_result(void *dm_void, struct env_mntr_rpt *rpt) -+{ -+ u8 env_mntr_rpt = 0; -+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u64 progressing_time = 0; -+ u32 val_tmp = 0; -+ -+ /*@monitor for the test duration*/ -+ progressing_time = odm_get_progressing_time(dm, ccx->start_time); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "env_time=%lld\n", progressing_time); -+ -+ /*@Get NHM result*/ -+ if (phydm_nhm_get_result(dm)) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get NHM_rpt success\n"); -+ phydm_nhm_get_utility(dm); -+ rpt->nhm_ratio = ccx->nhm_ratio; -+ rpt->nhm_env_ratio = ccx->nhm_env_ratio; -+ rpt->nhm_noise_pwr = ccx->nhm_level; -+ rpt->nhm_pwr = ccx->nhm_pwr; -+ env_mntr_rpt |= NHM_SUCCESS; -+ -+ odm_move_memory(dm, &rpt->nhm_result[0], -+ &ccx->nhm_result[0], NHM_RPT_NUM); -+ } else { -+ rpt->nhm_ratio = ENV_MNTR_FAIL; -+ rpt->nhm_env_ratio = ENV_MNTR_FAIL; -+ } -+ -+ /*@Get CLM result*/ -+ if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) { -+ if (phydm_clm_get_result(dm)) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get CLM_rpt success\n"); -+ phydm_clm_get_utility(dm); -+ env_mntr_rpt |= CLM_SUCCESS; -+ rpt->clm_ratio = ccx->clm_ratio; -+ } else { -+ rpt->clm_ratio = ENV_MNTR_FAIL; -+ } -+ -+ } else { -+ if (ccx->clm_fw_result_cnt != 0) { -+ val_tmp = ccx->clm_fw_result_acc -+ / ccx->clm_fw_result_cnt; -+ ccx->clm_ratio = (u8)val_tmp; -+ } else { -+ ccx->clm_ratio = 0; -+ } -+ -+ rpt->clm_ratio = ccx->clm_ratio; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n", -+ ccx->clm_fw_result_acc, ccx->clm_fw_result_cnt); -+ -+ ccx->clm_fw_result_acc = 0; -+ ccx->clm_fw_result_cnt = 0; -+ env_mntr_rpt |= CLM_SUCCESS; -+ } -+ -+ rpt->nhm_rpt_stamp = ccx->nhm_rpt_stamp; -+ rpt->clm_rpt_stamp = ccx->clm_rpt_stamp; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "IGI=0x%x, nhm_ratio=%d, nhm_env_ratio=%d, clm_ratio=%d, nhm_rpt_stamp=%d, clm_rpt_stamp=%d\n\n", -+ ccx->nhm_igi, rpt->nhm_ratio, rpt->nhm_env_ratio, -+ rpt->clm_ratio, rpt->nhm_rpt_stamp, rpt->clm_rpt_stamp); -+#endif -+ return env_mntr_rpt; -+} -+ -+/*@Environment Monitor*/ -+void phydm_env_mntr_watchdog(void *dm_void) -+{ -+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ boolean nhm_chk_ok = false; -+ boolean clm_chk_ok = false; -+ -+ if (!(dm->support_ability & ODM_BB_ENV_MONITOR)) -+ return; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ nhm_chk_ok = phydm_nhm_mntr_chk(dm, 262); /*@monitor 262ms*/ -+ clm_chk_ok = phydm_clm_mntr_chk(dm, 262); /*@monitor 262ms*/ -+ -+ /*@PHYDM_DBG(dm, DBG_ENV_MNTR, "nhm_chk_ok %d\n\n",nhm_chk_ok);*/ -+ /*@PHYDM_DBG(dm, DBG_ENV_MNTR, "clm_chk_ok %d\n\n",clm_chk_ok);*/ -+ -+ if (nhm_chk_ok) -+ phydm_nhm_trigger(dm); -+ -+ if (clm_chk_ok) -+ phydm_clm_trigger(dm); -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Summary: nhm_ratio=((%d)) clm_ratio=((%d))\n\n", -+ ccx->nhm_ratio, ccx->clm_ratio); -+ -+ #ifdef FAHM_SUPPORT -+ phydm_fahm_watchdog(dm); -+ #endif -+#endif -+} -+ -+void phydm_env_monitor_init(void *dm_void) -+{ -+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ phydm_ccx_hw_restart(dm); -+ phydm_nhm_init(dm); -+ phydm_clm_init(dm); -+ #ifdef FAHM_SUPPORT -+ phydm_fahm_init(dm); -+ #endif -+#endif -+} -+ -+void phydm_env_mntr_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ struct clm_para_info clm_para = {0}; -+ struct nhm_para_info nhm_para = {0}; -+ struct env_mntr_rpt rpt = {0}; -+ struct env_trig_rpt trig_rpt = {0}; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 set_result = 0; -+ u8 i = 0; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Basic-Trigger 262ms: {1}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Get Result: {100}\n"); -+ } else if (var1[0] == 100) { /* Get results */ -+ set_result = phydm_env_mntr_result(dm, &rpt); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set Result=%d\n nhm_ratio=%d nhm_env_ratio=%d clm_ratio=%d\n nhm_rpt_stamp=%d, clm_rpt_stamp=%d,\n", -+ set_result, rpt.nhm_ratio, rpt.nhm_env_ratio, -+ rpt.clm_ratio, rpt.nhm_rpt_stamp, rpt.clm_rpt_stamp); -+ -+ for (i = 0; i <= 11; i++) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "nhm_rpt[%d] = %d (%d percent)\n", i, -+ rpt.nhm_result[i], -+ (((rpt.nhm_result[i] * 100) + 128) >> 8)); -+ } -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[NHM] valid: %d percent, noise(RSSI) = %d\n", -+ ccx->nhm_level_valid, ccx->nhm_level); -+ } else { /* Set & trigger*/ -+ /*nhm para*/ -+ nhm_para.incld_txon = NHM_EXCLUDE_TXON; -+ nhm_para.incld_cca = NHM_EXCLUDE_CCA; -+ nhm_para.div_opt = NHM_CNT_ALL; -+ nhm_para.nhm_app = NHM_ACS; -+ nhm_para.nhm_lv = NHM_LV_2; -+ nhm_para.mntr_time = 262; -+ nhm_para.en_1db_mode = false; -+ -+ /*clm para*/ -+ clm_para.clm_app = CLM_ACS; -+ clm_para.clm_lv = CLM_LV_2; -+ clm_para.mntr_time = 262; -+ -+ set_result = phydm_env_mntr_trigger(dm, &nhm_para, -+ &clm_para, &trig_rpt); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set Result=%d, nhm_rpt_stamp=%d, clm_rpt_stamp=%d\n", -+ set_result, trig_rpt.nhm_rpt_stamp, -+ trig_rpt.clm_rpt_stamp); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#ifdef IFS_CLM_SUPPORT -+void phydm_ifs_clm_restart(void *dm_void) -+ /*Will Restart IFS CLM simultaneously*/ -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 reg1 = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ /*restart IFS_CLM*/ -+ odm_set_bb_reg(dm, R_0x1ee4, BIT(29), 0x0); -+ odm_set_bb_reg(dm, R_0x1ee4, BIT(29), 0x1); -+} -+ -+void phydm_ifs_clm_racing_release(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "ifs clm lv:(%d)->(0)\n", -+ ccx->ifs_clm_set_lv); -+ -+ ccx->ifs_clm_ongoing = false; -+ ccx->ifs_clm_set_lv = IFS_CLM_RELEASE; -+ ccx->ifs_clm_app = IFS_CLM_BACKGROUND; -+} -+ -+u8 phydm_ifs_clm_racing_ctrl(void *dm_void, enum phydm_ifs_clm_level ifs_clm_lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 set_result = PHYDM_SET_SUCCESS; -+ /*acquire to control IFS CLM API*/ -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "ifs clm_ongoing=%d, lv:(%d)->(%d)\n", -+ ccx->ifs_clm_ongoing, ccx->ifs_clm_set_lv, ifs_clm_lv); -+ if (ccx->ifs_clm_ongoing) { -+ if (ifs_clm_lv <= ccx->ifs_clm_set_lv) { -+ set_result = PHYDM_SET_FAIL; -+ } else { -+ phydm_ifs_clm_restart(dm); -+ ccx->ifs_clm_ongoing = false; -+ } -+ } -+ -+ if (set_result) -+ ccx->ifs_clm_set_lv = ifs_clm_lv; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "ifs clm racing success=%d\n", set_result); -+ return set_result; -+} -+ -+void phydm_ifs_clm_trigger(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ /*Trigger IFS_CLM*/ -+ pdm_set_reg(dm, R_0x1ee4, BIT(29), 0); -+ pdm_set_reg(dm, R_0x1ee4, BIT(29), 1); -+ ccx->ifs_clm_trigger_time = dm->phydm_sys_up_time; -+ ccx->ifs_clm_rpt_stamp++; -+ ccx->ifs_clm_ongoing = true; -+} -+ -+void phydm_ifs_clm_get_utility(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 numerator = 0; -+ u16 denominator = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ denominator = ccx->ifs_clm_period; -+ numerator = ccx->ifs_clm_tx * 100; -+ ccx->ifs_clm_tx_ratio = (u8)PHYDM_DIV(numerator, denominator); -+ numerator = ccx->ifs_clm_edcca_excl_cca * 100; -+ ccx->ifs_clm_edcca_excl_cca_ratio = (u8)PHYDM_DIV(numerator, -+ denominator); -+ numerator = (ccx->ifs_clm_cckfa + ccx->ifs_clm_ofdmfa) * 100; -+ ccx->ifs_clm_fa_ratio = (u8)PHYDM_DIV(numerator, denominator); -+ numerator = (ccx->ifs_clm_cckcca_excl_fa + -+ ccx->ifs_clm_ofdmcca_excl_fa) * 100; -+ ccx->ifs_clm_cca_excl_fa_ratio = (u8)PHYDM_DIV(numerator, denominator); -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Tx_ratio = %d, EDCCA_exclude_CCA_ratio = %d \n", -+ ccx->ifs_clm_tx_ratio, ccx->ifs_clm_edcca_excl_cca_ratio); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "FA_ratio = %d, CCA_exclude_FA_ratio = %d \n", -+ ccx->ifs_clm_fa_ratio, ccx->ifs_clm_cca_excl_fa_ratio); -+} -+ -+void phydm_ifs_clm_get_result(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 value32 = 0; -+ u8 i = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ /*Enhance CLM result*/ -+ value32 = odm_get_bb_reg(dm, R_0x2e60, MASKDWORD); -+ ccx->ifs_clm_tx = (u16)(value32 & MASKLWORD); -+ ccx->ifs_clm_edcca_excl_cca = (u16)((value32 & MASKHWORD) >> 16); -+ value32 = odm_get_bb_reg(dm, R_0x2e64, MASKDWORD); -+ ccx->ifs_clm_ofdmfa = (u16)(value32 & MASKLWORD); -+ ccx->ifs_clm_ofdmcca_excl_fa = (u16)((value32 & MASKHWORD) >> 16); -+ value32 = odm_get_bb_reg(dm, R_0x2e68, MASKDWORD); -+ ccx->ifs_clm_cckfa = (u16)(value32 & MASKLWORD); -+ ccx->ifs_clm_cckcca_excl_fa = (u16)((value32 & MASKHWORD) >> 16); -+ value32 = odm_get_bb_reg(dm, R_0x2e6c, MASKDWORD); -+ ccx->ifs_clm_total_cca = (u16)(value32 & MASKLWORD); -+ -+ /* IFS result */ -+ value32 = odm_get_bb_reg(dm, R_0x2e70, MASKDWORD); -+ odm_move_memory(dm, &ccx->ifs_clm_his[0], &value32, 4); -+ value32 = odm_get_bb_reg(dm, R_0x2e74, MASKDWORD); -+ ccx->ifs_clm_avg[0] = (u16)(value32 & MASKLWORD); -+ ccx->ifs_clm_avg[1] = (u16)((value32 & MASKHWORD) >> 16); -+ value32 = odm_get_bb_reg(dm, R_0x2e78, MASKDWORD); -+ ccx->ifs_clm_avg[2] = (u16)(value32 & MASKLWORD); -+ ccx->ifs_clm_avg[3] = (u16)((value32 & MASKHWORD) >> 16); -+ value32 = odm_get_bb_reg(dm, R_0x2e7c, MASKDWORD); -+ ccx->ifs_clm_avg_cca[0] = (u16)(value32 & MASKLWORD); -+ ccx->ifs_clm_avg_cca[1] = (u16)((value32 & MASKHWORD) >> 16); -+ value32 = odm_get_bb_reg(dm, R_0x2e80, MASKDWORD); -+ ccx->ifs_clm_avg_cca[2] = (u16)(value32 & MASKLWORD); -+ ccx->ifs_clm_avg_cca[3] = (u16)((value32 & MASKHWORD) >> 16); -+ -+ /* Print Result */ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "ECLM_Rpt[%d]: \nTx = %d, EDCCA_exclude_CCA = %d \n", -+ ccx->ifs_clm_rpt_stamp, ccx->ifs_clm_tx, -+ ccx->ifs_clm_edcca_excl_cca); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "[FA_cnt] {CCK, OFDM} = {%d, %d}\n", -+ ccx->ifs_clm_cckfa, ccx->ifs_clm_ofdmfa); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "[CCA_exclude_FA_cnt] {CCK, OFDM} = {%d, %d}\n", -+ ccx->ifs_clm_cckcca_excl_fa, ccx->ifs_clm_ofdmcca_excl_fa); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "CCATotal = %d\n", ccx->ifs_clm_total_cca); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Time:[his, avg, avg_cca]\n"); -+ for (i = 0; i < IFS_CLM_NUM; i++) -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "T%d:[%d, %d, %d]\n", i + 1, -+ ccx->ifs_clm_his[i], ccx->ifs_clm_avg[i], -+ ccx->ifs_clm_avg_cca[i]); -+ -+ phydm_ifs_clm_racing_release(dm); -+ -+ return; -+} -+ -+void phydm_ifs_clm_set_th_reg(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 i = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ /*Set IFS period TH*/ -+ odm_set_bb_reg(dm, R_0x1ed4, BIT(31), ccx->ifs_clm_th_en[0]); -+ odm_set_bb_reg(dm, R_0x1ed8, BIT(31), ccx->ifs_clm_th_en[1]); -+ odm_set_bb_reg(dm, R_0x1edc, BIT(31), ccx->ifs_clm_th_en[2]); -+ odm_set_bb_reg(dm, R_0x1ee0, BIT(31), ccx->ifs_clm_th_en[3]); -+ odm_set_bb_reg(dm, R_0x1ed4, 0x7fff0000, ccx->ifs_clm_th_low[0]); -+ odm_set_bb_reg(dm, R_0x1ed8, 0x7fff0000, ccx->ifs_clm_th_low[1]); -+ odm_set_bb_reg(dm, R_0x1edc, 0x7fff0000, ccx->ifs_clm_th_low[2]); -+ odm_set_bb_reg(dm, R_0x1ee0, 0x7fff0000, ccx->ifs_clm_th_low[3]); -+ odm_set_bb_reg(dm, R_0x1ed4, MASKLWORD, ccx->ifs_clm_th_high[0]); -+ odm_set_bb_reg(dm, R_0x1ed8, MASKLWORD, ccx->ifs_clm_th_high[1]); -+ odm_set_bb_reg(dm, R_0x1edc, MASKLWORD, ccx->ifs_clm_th_high[2]); -+ odm_set_bb_reg(dm, R_0x1ee0, MASKLWORD, ccx->ifs_clm_th_high[3]); -+ -+ for (i = 0; i < IFS_CLM_NUM; i++) -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Update IFS_CLM_th%d[High Low] : [%d %d]\n", i + 1, -+ ccx->ifs_clm_th_high[i], ccx->ifs_clm_th_low[i]); -+} -+ -+boolean phydm_ifs_clm_th_update_chk(void *dm_void, -+ enum ifs_clm_application ifs_clm_app, -+ boolean *ifs_clm_th_en, u16 *ifs_clm_th_low, -+ u16 *ifs_clm_th_high, s16 th_shift) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ boolean is_update = false; -+ u16 ifs_clm_th_low_bg[IFS_CLM_NUM] = {12, 5, 2, 0}; -+ u16 ifs_clm_th_high_bg[IFS_CLM_NUM] = {64, 12, 5, 2}; -+ u8 i = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "App=%d, th_shift=%d\n", ifs_clm_app, -+ th_shift); -+ -+ switch (ifs_clm_app) { -+ case IFS_CLM_BACKGROUND: -+ case IFS_CLM_ACS: -+ case IFS_CLM_HP_TAS: -+ if (ccx->ifs_clm_app != ifs_clm_app || th_shift != 0) { -+ is_update = true; -+ -+ for (i = 0; i < IFS_CLM_NUM; i++) { -+ ifs_clm_th_en[i] = true; -+ ifs_clm_th_low[i] = ifs_clm_th_low_bg[i]; -+ ifs_clm_th_high[i] = ifs_clm_th_high_bg[i]; -+ } -+ } -+ break; -+ case IFS_CLM_DBG: -+ if (ccx->ifs_clm_app != ifs_clm_app || th_shift != 0) { -+ is_update = true; -+ -+ for (i = 0; i < IFS_CLM_NUM; i++) { -+ ifs_clm_th_en[i] = true; -+ ifs_clm_th_low[i] = MAX_2(ccx->ifs_clm_th_low[i] + -+ th_shift, 0); -+ ifs_clm_th_high[i] = MAX_2(ccx->ifs_clm_th_high[i] + -+ th_shift, 0); -+ } -+ } -+ break; -+ default: -+ break; -+ } -+ -+ if (is_update) -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[Update IFS_TH]\n"); -+ else -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "No need to update IFS_TH\n"); -+ -+ return is_update; -+} -+ -+void phydm_ifs_clm_set(void *dm_void, enum ifs_clm_application ifs_clm_app, -+ u16 period, u8 ctrl_unit, s16 th_shift) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ boolean ifs_clm_th_en[IFS_CLM_NUM] = {0}; -+ u16 ifs_clm_th_low[IFS_CLM_NUM] = {0}; -+ u16 ifs_clm_th_high[IFS_CLM_NUM] = {0}; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "period=%d, ctrl_unit=%d\n", period, -+ ctrl_unit); -+ -+ /*Set Unit*/ -+ if (ctrl_unit != ccx->ifs_clm_ctrl_unit) { -+ odm_set_bb_reg(dm, R_0x1ee4, 0xc0000000, ctrl_unit); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Update IFS_CLM unit ((%d)) -> ((%d))\n", -+ ccx->ifs_clm_ctrl_unit, ctrl_unit); -+ ccx->ifs_clm_ctrl_unit = ctrl_unit; -+ } -+ -+ /*Set Duration*/ -+ if (period != ccx->ifs_clm_period) { -+ odm_set_bb_reg(dm, R_0x1eec, 0xc0000000, (period & 0x3)); -+ odm_set_bb_reg(dm, R_0x1ef0, 0xfe000000, ((period >> 2) & -+ 0x7f)); -+ odm_set_bb_reg(dm, R_0x1ef4, 0xc0000000, ((period >> 9) & -+ 0x3)); -+ odm_set_bb_reg(dm, R_0x1ef8, 0x3e000000, ((period >> 11) & -+ 0x1f)); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Update IFS_CLM period ((%d)) -> ((%d))\n", -+ ccx->ifs_clm_period, period); -+ ccx->ifs_clm_period = period; -+ } -+ -+ /*Set IFS CLM threshold*/ -+ if (phydm_ifs_clm_th_update_chk(dm, ifs_clm_app, &ifs_clm_th_en[0], -+ &ifs_clm_th_low[0], &ifs_clm_th_high[0], -+ th_shift)) { -+ -+ ccx->ifs_clm_app = ifs_clm_app; -+ odm_move_memory(dm, &ccx->ifs_clm_th_en[0], &ifs_clm_th_en, -+ IFS_CLM_NUM); -+ odm_move_memory(dm, &ccx->ifs_clm_th_low[0], &ifs_clm_th_low, -+ IFS_CLM_NUM); -+ odm_move_memory(dm, &ccx->ifs_clm_th_high[0], &ifs_clm_th_high, -+ IFS_CLM_NUM); -+ -+ phydm_ifs_clm_set_th_reg(dm); -+ } -+} -+ -+boolean -+phydm_ifs_clm_mntr_set(void *dm_void, struct ifs_clm_para_info *ifs_clm_para) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 ifs_clm_time = 0; /*unit: 4/8/12/16us*/ -+ u8 unit = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ if (ifs_clm_para->mntr_time == 0) -+ return false; -+ -+ if (ifs_clm_para->ifs_clm_lv >= IFS_CLM_MAX_NUM) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Wrong LV=%d\n", -+ ifs_clm_para->ifs_clm_lv); -+ return false; -+ } -+ -+ if (phydm_ifs_clm_racing_ctrl(dm, ifs_clm_para->ifs_clm_lv) == PHYDM_SET_FAIL) -+ return false; -+ -+ if (ifs_clm_para->mntr_time >= 1048) { -+ unit = IFS_CLM_16; -+ ifs_clm_time = IFS_CLM_PERIOD_MAX; /*65535 * 16us = 1048ms*/ -+ } else if (ifs_clm_para->mntr_time >= 786) {/*65535 * 12us = 786 ms*/ -+ unit = IFS_CLM_16; -+ ifs_clm_time = PHYDM_DIV(ifs_clm_para->mntr_time * MS_TO_US, 16); -+ } else if (ifs_clm_para->mntr_time >= 524) { -+ unit = IFS_CLM_12; -+ ifs_clm_time = PHYDM_DIV(ifs_clm_para->mntr_time * MS_TO_US, 12); -+ } else if (ifs_clm_para->mntr_time >= 262) { -+ unit = IFS_CLM_8; -+ ifs_clm_time = PHYDM_DIV(ifs_clm_para->mntr_time * MS_TO_US, 8); -+ } else { -+ unit = IFS_CLM_4; -+ ifs_clm_time = PHYDM_DIV(ifs_clm_para->mntr_time * MS_TO_US, 4); -+ } -+ -+ phydm_ifs_clm_set(dm, ifs_clm_para->ifs_clm_app, ifs_clm_time, unit, -+ ifs_clm_para->th_shift); -+ -+ return true; -+} -+ -+boolean -+phydm_ifs_clm_mntr_chk(void *dm_void, u16 monitor_time /*unit ms*/) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ struct ifs_clm_para_info ifs_clm_para = {0}; -+ boolean ifs_clm_chk_result = false; -+ u32 sys_return_time = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ if (ccx->ifs_clm_manual_ctrl) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "IFS CLM in manual ctrl\n"); -+ return ifs_clm_chk_result; -+ } -+ -+ sys_return_time = ccx->ifs_clm_trigger_time + MAX_ENV_MNTR_TIME; -+ if (ccx->ifs_clm_app != IFS_CLM_BACKGROUND && -+ (sys_return_time > dm->phydm_sys_up_time)) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "ifs_clm_app=%d, trigger_time %d, sys_time=%d\n", -+ ccx->ifs_clm_app, ccx->ifs_clm_trigger_time, -+ dm->phydm_sys_up_time); -+ -+ return ifs_clm_chk_result; -+ } -+ -+ /*[IFS CLM get result ------------------------------------]*/ -+ phydm_ifs_clm_get_result(dm); -+ phydm_ifs_clm_get_utility(dm); -+ -+ /*[IFS CLM trigger setting]------------------------------------------*/ -+ ifs_clm_para.ifs_clm_app = IFS_CLM_BACKGROUND; -+ ifs_clm_para.ifs_clm_lv = IFS_CLM_LV_1; -+ ifs_clm_para.mntr_time = monitor_time; -+ ifs_clm_para.th_shift = 0; -+ -+ ifs_clm_chk_result = phydm_ifs_clm_mntr_set(dm, &ifs_clm_para); -+ -+ return ifs_clm_chk_result; -+} -+ -+void phydm_ifs_clm_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ -+ ccx->ifs_clm_app = IFS_CLM_BACKGROUND; -+ -+ /*Set IFS threshold*/ -+ ccx->ifs_clm_ongoing = false; -+ ccx->ifs_clm_set_lv = IFS_CLM_RELEASE; -+ -+ if (phydm_ifs_clm_th_update_chk(dm, ccx->ifs_clm_app, -+ &ccx->ifs_clm_th_en[0], -+ &ccx->ifs_clm_th_low[0], -+ &ccx->ifs_clm_th_high[0], 0xffff)) -+ phydm_ifs_clm_set_th_reg(dm); -+ -+ ccx->ifs_clm_period = 0; -+ ccx->ifs_clm_ctrl_unit = IFS_CLM_INIT; -+ ccx->ifs_clm_manual_ctrl = 0; -+ ccx->ifs_clm_rpt_stamp = 0; -+} -+ -+void phydm_ifs_clm_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ struct ifs_clm_para_info ifs_clm_para; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 result_tmp = 0; -+ u8 i = 0; -+ u16 th_shift = 0; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_IFS_CLM)) -+ return; -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var1[i]); -+ } -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "IFS_CLM Basic-Trigger 960ms: {1}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "IFS_CLM Adv-Trigger: {2} {App:3 for dbg} {LV:1~4} {0~2096ms} {th_shift}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "IFS_CLM Get Result: {100}\n"); -+ } else if (var1[0] == 100) { /*Get IFS_CLM results*/ -+ phydm_ifs_clm_get_result(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "ECLM_Rpt[%d]: \nTx = %d \nEDCCA_exclude_CCA = %d\n", -+ ccx->ifs_clm_rpt_stamp, ccx->ifs_clm_tx, -+ ccx->ifs_clm_edcca_excl_cca); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[FA_cnt] {CCK, OFDM} = {%d, %d}\n", -+ ccx->ifs_clm_cckfa, ccx->ifs_clm_ofdmfa); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[CCA_exclude_FA_cnt] {CCK, OFDM} = {%d, %d}\n", -+ ccx->ifs_clm_cckcca_excl_fa, -+ ccx->ifs_clm_ofdmcca_excl_fa); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "CCATotal = %d\n", ccx->ifs_clm_total_cca); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Time:[his, avg, avg_cca]\n"); -+ for (i = 0; i < IFS_CLM_NUM; i++) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "T%d:[%d, %d, %d]\n", i + 1, -+ ccx->ifs_clm_his[i], ccx->ifs_clm_avg[i], -+ ccx->ifs_clm_avg_cca[i]); -+ -+ phydm_ifs_clm_get_utility(dm); -+ -+ ccx->ifs_clm_manual_ctrl = 0; -+ } else { /*IFS_CLM trigger*/ -+ ccx->ifs_clm_manual_ctrl = 1; -+ -+ if (var1[0] == 1) { -+ ifs_clm_para.ifs_clm_app = IFS_CLM_DBG; -+ ifs_clm_para.ifs_clm_lv = IFS_CLM_LV_4; -+ ifs_clm_para.mntr_time = 960; -+ ifs_clm_para.th_shift = 0; -+ } else { -+ ifs_clm_para.ifs_clm_app = (enum ifs_clm_application)var1[1]; -+ ifs_clm_para.ifs_clm_lv = (enum phydm_ifs_clm_level)var1[2]; -+ ifs_clm_para.mntr_time = (u16)var1[3]; -+ ifs_clm_para.th_shift = (s16)var1[4]; -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "app=%d, lv=%d, time=%d ms, th_shift=%s%d\n", -+ ifs_clm_para.ifs_clm_app, ifs_clm_para.ifs_clm_lv, -+ ifs_clm_para.mntr_time, -+ (ifs_clm_para.th_shift > 0) ? "+" : "-", -+ ifs_clm_para.th_shift); -+ -+ if (phydm_ifs_clm_mntr_set(dm, &ifs_clm_para) == PHYDM_SET_SUCCESS) -+ phydm_ifs_clm_trigger(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "rpt_stamp=%d\n", ccx->ifs_clm_rpt_stamp); -+ for (i = 0; i < IFS_CLM_NUM; i++) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "IFS_CLM_th%d[High Low] : [%d %d]\n", i + 1, -+ ccx->ifs_clm_th_high[i], -+ ccx->ifs_clm_th_low[i]); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -+ -+u8 phydm_enhance_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para, -+ struct clm_para_info *clm_para, -+ struct fahm_para_info *fahm_para, -+ struct ifs_clm_para_info *ifs_clm_para, -+ struct enhance_mntr_trig_rpt *trig_rpt) -+{ -+ u8 trigger_result = 0; -+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT) && defined(FAHM_SUPPORT) && defined(IFS_CLM_SUPPORT)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ boolean nhm_set_ok = false; -+ boolean clm_set_ok = false; -+ boolean fahm_set_ok = false; -+ boolean ifs_clm_set_ok = false; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_FAHM) || -+ !(dm->support_ic_type & PHYDM_IC_SUPPORT_IFS_CLM)) -+ return trigger_result; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__); -+ -+ nhm_set_ok = phydm_nhm_mntr_set(dm, nhm_para); -+ -+ if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) { -+ clm_set_ok = phydm_clm_mntr_set(dm, clm_para); -+ } else if (ccx->clm_mntr_mode == CLM_FW_MNTR) { -+ phydm_clm_h2c(dm, CLM_PERIOD_MAX, true); -+ trigger_result |= CLM_SUCCESS; -+ } -+ -+ fahm_set_ok = phydm_fahm_mntr_set(dm, fahm_para); -+ -+ ifs_clm_set_ok = phydm_ifs_clm_mntr_set(dm, ifs_clm_para); -+ -+ if (nhm_set_ok) { -+ phydm_nhm_trigger(dm); -+ trigger_result |= NHM_SUCCESS; -+ } -+ -+ if (clm_set_ok) { -+ phydm_clm_trigger(dm); -+ trigger_result |= CLM_SUCCESS; -+ } -+ -+ if (fahm_set_ok) { -+ phydm_fahm_trigger(dm); -+ trigger_result |= FAHM_SUCCESS; -+ } -+ -+ if (ifs_clm_set_ok) { -+ phydm_ifs_clm_trigger(dm); -+ trigger_result |= IFS_CLM_SUCCESS; -+ } -+ -+ /*monitor for the test duration*/ -+ ccx->start_time = odm_get_current_time(dm); -+ -+ trig_rpt->nhm_rpt_stamp = ccx->nhm_rpt_stamp; -+ trig_rpt->clm_rpt_stamp = ccx->clm_rpt_stamp; -+ trig_rpt->fahm_rpt_stamp = ccx->fahm_rpt_stamp; -+ trig_rpt->ifs_clm_rpt_stamp = ccx->ifs_clm_rpt_stamp; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "rpt_stamp{NHM, CLM, FAHM, IFS_CLM}={%d, %d, %d, %d}\n\n", -+ trig_rpt->nhm_rpt_stamp, trig_rpt->clm_rpt_stamp, -+ trig_rpt->fahm_rpt_stamp, trig_rpt->ifs_clm_rpt_stamp); -+ -+#endif -+ return trigger_result; -+} -+ -+u8 phydm_enhance_mntr_result(void *dm_void, struct enhance_mntr_rpt *rpt) -+{ -+ u8 enhance_mntr_rpt = 0; -+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT) && defined(FAHM_SUPPORT) && defined(IFS_CLM_SUPPORT)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u64 progressing_time = 0; -+ u32 val_tmp = 0; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_FAHM) || -+ !(dm->support_ic_type & PHYDM_IC_SUPPORT_IFS_CLM)) -+ return enhance_mntr_rpt; -+ -+ /*monitor for the test duration*/ -+ progressing_time = odm_get_progressing_time(dm, ccx->start_time); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s] ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "enhance_mntr_time=%lld\n", -+ progressing_time); -+ -+ /*Get NHM result*/ -+ if (phydm_nhm_get_result(dm)) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get NHM_rpt success\n"); -+ phydm_nhm_get_utility(dm); -+ rpt->nhm_ratio = ccx->nhm_ratio; -+ rpt->nhm_env_ratio = ccx->nhm_env_ratio; -+ rpt->nhm_noise_pwr = ccx->nhm_level; -+ rpt->nhm_pwr = ccx->nhm_pwr; -+ enhance_mntr_rpt |= NHM_SUCCESS; -+ -+ odm_move_memory(dm, &rpt->nhm_result[0], -+ &ccx->nhm_result[0], NHM_RPT_NUM); -+ } else { -+ rpt->nhm_ratio = ENV_MNTR_FAIL; -+ rpt->nhm_env_ratio = ENV_MNTR_FAIL; -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "[NHM]rpt_stamp=%d, IGI=0x%x, ratio=%d, env_ratio=%d, noise_pwr=%d, pwr=%d\n", -+ rpt->nhm_rpt_stamp, ccx->nhm_igi, rpt->nhm_ratio, -+ rpt->nhm_env_ratio, rpt->nhm_noise_pwr, rpt->nhm_pwr); -+ -+ /*Get CLM result*/ -+ if (ccx->clm_mntr_mode == CLM_DRIVER_MNTR) { -+ if (phydm_clm_get_result(dm)) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get CLM_rpt success\n"); -+ phydm_clm_get_utility(dm); -+ enhance_mntr_rpt |= CLM_SUCCESS; -+ rpt->clm_ratio = ccx->clm_ratio; -+ } else { -+ rpt->clm_ratio = ENV_MNTR_FAIL; -+ } -+ } else { -+ if (ccx->clm_fw_result_cnt != 0) { -+ val_tmp = ccx->clm_fw_result_acc -+ / ccx->clm_fw_result_cnt; -+ ccx->clm_ratio = (u8)val_tmp; -+ } else { -+ ccx->clm_ratio = 0; -+ } -+ rpt->clm_ratio = ccx->clm_ratio; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "clm_fw_result_acc=%d, clm_fw_result_cnt=%d\n", -+ ccx->clm_fw_result_acc, ccx->clm_fw_result_cnt); -+ -+ ccx->clm_fw_result_acc = 0; -+ ccx->clm_fw_result_cnt = 0; -+ enhance_mntr_rpt |= CLM_SUCCESS; -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[CLM]rpt_stamp=%d, ratio=%d\n", -+ rpt->clm_rpt_stamp, rpt->clm_ratio); -+ -+ /*Get FAHM result*/ -+ if (phydm_fahm_get_result(dm)) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Get FAHM_rpt success\n"); -+ phydm_fahm_get_utility(dm); -+ rpt->fahm_pwr = ccx->fahm_pwr; -+ enhance_mntr_rpt |= FAHM_SUCCESS; -+ -+ odm_move_memory(dm, &rpt->fahm_result[0], -+ &ccx->fahm_result[0], NHM_RPT_NUM * 2); -+ } else { -+ rpt->fahm_pwr = 0; -+ } -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[FAHM]rpt_stamp=%d, IGI=0x%x, pwr=%d\n", -+ rpt->fahm_rpt_stamp, ccx->fahm_igi, rpt->fahm_pwr); -+ -+ /*Get IFS_CLM result*/ -+ phydm_ifs_clm_get_result(dm); -+ phydm_ifs_clm_get_utility(dm); -+ rpt->ifs_clm_tx_ratio = ccx->ifs_clm_tx_ratio; -+ rpt->ifs_clm_edcca_excl_cca_ratio = ccx->ifs_clm_edcca_excl_cca_ratio; -+ rpt->ifs_clm_fa_ratio = ccx->ifs_clm_fa_ratio; -+ rpt->ifs_clm_cca_excl_fa_ratio = ccx->ifs_clm_cca_excl_fa_ratio; -+ rpt->ifs_clm_rpt_stamp = ccx->ifs_clm_rpt_stamp; -+ enhance_mntr_rpt |= IFS_CLM_SUCCESS; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "[IFS_CLM]rpt_stamp = %d, Tx_ratio = %d, EDCCA_exclude_CCA_ratio = %d\n", -+ ccx->ifs_clm_rpt_stamp, ccx->ifs_clm_tx_ratio, -+ ccx->ifs_clm_edcca_excl_cca_ratio); -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "FA_ratio = %d, CCA_exclude_FA_ratio = %d\n", -+ ccx->ifs_clm_fa_ratio, ccx->ifs_clm_cca_excl_fa_ratio); -+ -+ rpt->nhm_rpt_stamp = ccx->nhm_rpt_stamp; -+ rpt->clm_rpt_stamp = ccx->clm_rpt_stamp; -+ rpt->fahm_rpt_stamp = ccx->fahm_rpt_stamp; -+ rpt->ifs_clm_rpt_stamp = ccx->ifs_clm_rpt_stamp; -+#endif -+ return enhance_mntr_rpt; -+} -+ -+void phydm_enhance_mntr_watchdog(void *dm_void) -+{ -+#ifdef IFS_CLM_SUPPORT -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ boolean ifs_clm_chk_ok = false; -+ -+ if (!(dm->support_ability & ODM_BB_ENV_MONITOR)) -+ return; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_IFS_CLM)) -+ return; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ ifs_clm_chk_ok = phydm_ifs_clm_mntr_chk(dm, 960); /*monitor 960ms*/ -+ -+ if (ifs_clm_chk_ok) -+ phydm_ifs_clm_trigger(dm); -+#endif -+} -+ -+void phydm_enhance_monitor_init(void *dm_void) -+{ -+#ifdef IFS_CLM_SUPPORT -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_IFS_CLM)) -+ return; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "[%s]===>\n", __func__); -+ phydm_ifs_clm_restart(dm); -+ phydm_ifs_clm_init(dm); -+#endif -+} -+ -+void phydm_enhance_mntr_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+#if (defined(NHM_SUPPORT) && defined(CLM_SUPPORT) && defined(FAHM_SUPPORT) && defined(IFS_CLM_SUPPORT)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ struct nhm_para_info nhm_para = {0}; -+ struct clm_para_info clm_para = {0}; -+ struct fahm_para_info fahm_para = {0}; -+ struct ifs_clm_para_info ifs_clm_para = {0}; -+ struct enhance_mntr_rpt rpt = {0}; -+ struct enhance_mntr_trig_rpt trig_rpt = {0}; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u8 set_result = 0; -+ u8 i = 0; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_SUPPORT_FAHM) || -+ !(dm->support_ic_type & PHYDM_IC_SUPPORT_IFS_CLM)) -+ return; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Basic-Trigger 960ms for ifs_clm, 262ms for others: {1}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Get Result: {100}\n"); -+ } else if (var1[0] == 100) { /* Get results */ -+ set_result = phydm_enhance_mntr_result(dm, &rpt); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set Result=%d, rpt_stamp{NHM, CLM, FAHM, IFS_CLM}={%d, %d, %d, %d}\n", -+ set_result, rpt.nhm_rpt_stamp, rpt.clm_rpt_stamp, -+ rpt.fahm_rpt_stamp, rpt.ifs_clm_rpt_stamp); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "nhm_IGI=0x%x, nhm_ratio=%d, ,nhm_env_ratio=%d, noise_pwr=%d, pwr=%d\n", -+ ccx->nhm_igi, rpt.nhm_ratio, rpt.nhm_env_ratio, -+ rpt.nhm_noise_pwr, rpt.nhm_pwr); -+ -+ for (i = 0; i <= 11; i++) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "nhm_rpt[%d] = %d (%d percent)\n", i, -+ rpt.nhm_result[i], -+ (((rpt.nhm_result[i] * 100) + 128) >> 8)); -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "clm_ratio=%d, fahm_IGI=0x%x, fahm_pwr=%d\n", -+ rpt.clm_ratio, ccx->fahm_igi, rpt.fahm_pwr); -+ -+ for (i = 0; i <= 11; i++) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fahm_rpt[%d] = %d (%d percent)\n", i, -+ rpt.fahm_result[i], -+ (((rpt.fahm_result[i] * 100) + 32768) >> 16)); -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "ifs_clm_Tx_ratio = %d, ifs_clm_EDCCA_exclude_CCA_ratio = %d \n", -+ rpt.ifs_clm_tx_ratio, -+ rpt.ifs_clm_edcca_excl_cca_ratio); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "ifs_clm_FA_ratio = %d, ifs_clm_CCA_exclude_FA_ratio = %d \n", -+ rpt.ifs_clm_fa_ratio, rpt.ifs_clm_cca_excl_fa_ratio); -+ } else { /* Set & trigger*/ -+ /*nhm para*/ -+ nhm_para.incld_txon = NHM_EXCLUDE_TXON; -+ nhm_para.incld_cca = NHM_EXCLUDE_CCA; -+ nhm_para.div_opt = NHM_CNT_ALL; -+ nhm_para.nhm_app = NHM_ACS; -+ nhm_para.nhm_lv = NHM_LV_2; -+ nhm_para.mntr_time = 262; -+ nhm_para.en_1db_mode = false; -+ -+ /*clm para*/ -+ clm_para.clm_app = CLM_ACS; -+ clm_para.clm_lv = CLM_LV_2; -+ clm_para.mntr_time = 262; -+ -+ /*fahm para*/ -+ fahm_para.incld_fa = FAHM_INCLUDE_FA; -+ fahm_para.incld_crc32_ok = FAHM_EXCLUDE_CRC32_OK; -+ fahm_para.incld_crc32_err = FAHM_EXCLUDE_CRC32_ERR; -+ fahm_para.app = FAHM_ACS; -+ fahm_para.lv = FAHM_LV_2; -+ fahm_para.mntr_time = 262; -+ fahm_para.en_1db_mode = false; -+ -+ ifs_clm_para.ifs_clm_app = IFS_CLM_ACS; -+ ifs_clm_para.ifs_clm_lv = IFS_CLM_LV_2; -+ ifs_clm_para.mntr_time = 960; -+ ifs_clm_para.th_shift = 0; -+ -+ set_result = phydm_enhance_mntr_trigger(dm, &nhm_para, -+ &clm_para, &fahm_para, -+ &ifs_clm_para, -+ &trig_rpt); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set Result=%d, rpt_stamp{NHM, CLM, FAHM, IFS_CLM}={%d, %d ,%d, %d}\n", -+ set_result, trig_rpt.nhm_rpt_stamp, -+ trig_rpt.clm_rpt_stamp, trig_rpt.fahm_rpt_stamp, -+ trig_rpt.ifs_clm_rpt_stamp); -+ } -+ *_used = used; -+ *_out_len = out_len; -+#endif -+} -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_ccx.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_ccx.h -new file mode 100644 -index 000000000000..a125a1685555 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_ccx.h -@@ -0,0 +1,428 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMCCX_H__ -+#define __PHYDMCCX_H__ -+ -+/* 2020.07.21 Fix 8723F compile warning and remove 8723f in dym_pw_th(this machanism is WA patch only for 8822C ASUS)*/ -+#define CCX_VERSION "4.4" -+ -+/* @1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+#define CCX_EN 1 -+ -+#define MAX_ENV_MNTR_TIME 8 /*second*/ -+#define MS_TO_US 1000 -+#define MS_TO_4US_RATIO 250 -+#define CCA_CAP 14 -+#define CLM_MAX_REPORT_TIME 10 -+#define CLM_PERIOD_MAX 65535 -+#define IFS_CLM_PERIOD_MAX 65535 -+#define NHM_PERIOD_MAX 65534 -+#define NHM_TH_NUM 11 /*threshold number of NHM/FAHM*/ -+#define NHM_RPT_NUM 12 -+#define NHM_IC_NOISE_TH 60 /*60/2 - 10 = 20 = -80 dBm*/ -+#define IFS_CLM_NUM 4 -+#ifdef NHM_DYM_PW_TH_SUPPORT -+#define DYM_PWTH_CCA_CAP 24 -+#endif -+ -+#define IGI_2_NHM_TH(igi) ((igi) << 1)/*NHM/FAHM threshold = IGI * 2*/ -+#define NTH_TH_2_RSSI(th) ((th >> 1) - 10) -+ -+#define NHM_SUCCESS BIT(0) -+#define CLM_SUCCESS BIT(1) -+#define FAHM_SUCCESS BIT(2) -+#define IFS_CLM_SUCCESS BIT(3) -+#define ENV_MNTR_FAIL 0xff -+ -+/* @1 ============================================================ -+ * 1 enumrate -+ * 1 ============================================================ -+ */ -+enum phydm_clm_level { -+ CLM_RELEASE = 0, -+ CLM_LV_1 = 1, /* @Low Priority function */ -+ CLM_LV_2 = 2, /* @Middle Priority function */ -+ CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ -+ CLM_LV_4 = 4, /* @Debug function (the highest priority) */ -+ CLM_MAX_NUM = 5 -+}; -+ -+enum phydm_nhm_level { -+ NHM_RELEASE = 0, -+ NHM_LV_1 = 1, /* @Low Priority function */ -+ NHM_LV_2 = 2, /* @Middle Priority function */ -+ NHM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ -+ NHM_LV_4 = 4, /* @Debug function (the highest priority) */ -+ NHM_MAX_NUM = 5 -+}; -+ -+enum phydm_fahm_level { -+ FAHM_RELEASE = 0, -+ FAHM_LV_1 = 1, /* Low Priority function */ -+ FAHM_LV_2 = 2, /* Middle Priority function */ -+ FAHM_LV_3 = 3, /* High priority function (ex: Check hang function) */ -+ FAHM_LV_4 = 4, /* Debug function (the highest priority) */ -+ FAHM_MAX_NUM = 5 -+}; -+ -+enum phydm_ifs_clm_level { -+ IFS_CLM_RELEASE = 0, -+ IFS_CLM_LV_1 = 1, /* @Low Priority function */ -+ IFS_CLM_LV_2 = 2, /* @Middle Priority function */ -+ IFS_CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ -+ IFS_CLM_LV_4 = 4, /* @Debug function (the highest priority) */ -+ IFS_CLM_MAX_NUM = 5 -+}; -+ -+enum nhm_divider_opt_all { -+ NHM_CNT_ALL = 0, /*nhm SUM report <= 255*/ -+ NHM_VALID = 1, /*nhm SUM report = 255*/ -+ NHM_CNT_INIT -+}; -+ -+enum nhm_setting { -+ SET_NHM_SETTING, -+ STORE_NHM_SETTING, -+ RESTORE_NHM_SETTING -+}; -+ -+enum nhm_option_cca_all { -+ NHM_EXCLUDE_CCA = 0, -+ NHM_INCLUDE_CCA = 1, -+ NHM_CCA_INIT -+}; -+ -+enum nhm_option_txon_all { -+ NHM_EXCLUDE_TXON = 0, -+ NHM_INCLUDE_TXON = 1, -+ NHM_TXON_INIT -+}; -+ -+enum nhm_application { -+ NHM_BACKGROUND = 0,/*@default*/ -+ NHM_ACS = 1, -+ IEEE_11K_HIGH = 2, -+ IEEE_11K_LOW = 3, -+ INTEL_XBOX = 4, -+ NHM_DBG = 5, /*@manual trigger*/ -+}; -+ -+enum clm_application { -+ CLM_BACKGROUND = 0,/*@default*/ -+ CLM_ACS = 1, -+}; -+ -+enum fahm_opt_fa { -+ FAHM_EXCLUDE_FA = 0, -+ FAHM_INCLUDE_FA = 1, -+ FAHM_FA_INIT -+}; -+ -+enum fahm_opt_crc32_ok { -+ FAHM_EXCLUDE_CRC32_OK = 0, -+ FAHM_INCLUDE_CRC32_OK = 1, -+ FAHM_CRC32_OK_INIT -+}; -+ -+enum fahm_opt_crc32_err { -+ FAHM_EXCLUDE_CRC32_ERR = 0, -+ FAHM_INCLUDE_CRC32_ERR = 1, -+ FAHM_CRC32_ERR_INIT -+}; -+ -+enum fahm_application { -+ FAHM_BACKGROUND = 0,/*default*/ -+ FAHM_ACS = 1, -+ FAHM_DBG = 2, /*manual trigger*/ -+}; -+ -+enum ifs_clm_application { -+ IFS_CLM_BACKGROUND = 0,/*default*/ -+ IFS_CLM_ACS = 1, -+ IFS_CLM_HP_TAS = 2, -+ IFS_CLM_DBG = 3, -+}; -+ -+enum clm_monitor_mode { -+ CLM_DRIVER_MNTR = 1, -+ CLM_FW_MNTR = 2 -+}; -+ -+enum phydm_ifs_clm_unit { -+ IFS_CLM_4 = 0, /*4us*/ -+ IFS_CLM_8 = 1, /*8us*/ -+ IFS_CLM_12 = 2, /*12us*/ -+ IFS_CLM_16 = 3, /*16us*/ -+ IFS_CLM_INIT -+}; -+ -+/* @1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+struct env_trig_rpt { -+ u8 nhm_rpt_stamp; -+ u8 clm_rpt_stamp; -+}; -+ -+struct env_mntr_rpt { -+ u8 nhm_ratio; -+ u8 nhm_env_ratio; /*exclude nhm_r[0] above -80dBm or first cluster under -80dBm*/ -+ u8 nhm_result[NHM_RPT_NUM]; -+ u8 clm_ratio; -+ u8 nhm_rpt_stamp; -+ u8 clm_rpt_stamp; -+ u8 nhm_noise_pwr; /*including r[0]~r[10]*/ -+ u8 nhm_pwr; /*including r[0]~r[11]*/ -+}; -+ -+struct enhance_mntr_trig_rpt { -+ u8 nhm_rpt_stamp; -+ u8 clm_rpt_stamp; -+ u8 fahm_rpt_stamp; -+ u8 ifs_clm_rpt_stamp; -+}; -+ -+struct enhance_mntr_rpt { -+ u8 nhm_ratio; -+ u8 nhm_env_ratio; /*exclude nhm_r[0] above -80dBm or first cluster under -80dBm*/ -+ u8 nhm_result[NHM_RPT_NUM]; -+ u8 clm_ratio; -+ u8 nhm_rpt_stamp; -+ u8 clm_rpt_stamp; -+ u8 nhm_noise_pwr; /*including r[0]~r[10]*/ -+ u8 nhm_pwr; /*including r[0]~r[11]*/ -+ u16 fahm_result[NHM_RPT_NUM]; -+ u8 fahm_rpt_stamp; -+ u8 fahm_pwr; -+ u8 ifs_clm_rpt_stamp; -+ u8 ifs_clm_tx_ratio; -+ u8 ifs_clm_edcca_excl_cca_ratio; -+ u8 ifs_clm_fa_ratio; -+ u8 ifs_clm_cca_excl_fa_ratio; -+}; -+ -+struct nhm_para_info { -+ enum nhm_option_txon_all incld_txon; /*@Include TX on*/ -+ enum nhm_option_cca_all incld_cca; /*@Include CCA*/ -+ enum nhm_divider_opt_all div_opt; /*@divider option*/ -+ enum nhm_application nhm_app; -+ enum phydm_nhm_level nhm_lv; -+ u16 mntr_time; /*@0~262 unit ms*/ -+ boolean en_1db_mode; -+ u8 nhm_th0_manual; /* for 1-db mode*/ -+}; -+ -+struct clm_para_info { -+ enum clm_application clm_app; -+ enum phydm_clm_level clm_lv; -+ u16 mntr_time; /*@0~262 unit ms*/ -+}; -+ -+struct fahm_para_info { -+ enum fahm_opt_fa incld_fa; -+ enum fahm_opt_crc32_ok incld_crc32_ok; -+ enum fahm_opt_crc32_err incld_crc32_err; -+ enum fahm_application app; -+ enum phydm_fahm_level lv; -+ u16 mntr_time; /*0~262 unit ms*/ -+ boolean en_1db_mode; -+ u8 th0_manual;/* for 1-db mode*/ -+}; -+ -+struct ifs_clm_para_info { -+ enum ifs_clm_application ifs_clm_app; -+ enum phydm_ifs_clm_level ifs_clm_lv; -+ enum phydm_ifs_clm_unit ifs_clm_ctrl_unit; /*unit*/ -+ u16 mntr_time; /*ms*/ -+ boolean ifs_clm_th_en[IFS_CLM_NUM]; -+ u16 ifs_clm_th_low[IFS_CLM_NUM]; -+ u16 ifs_clm_th_high[IFS_CLM_NUM]; -+ s16 th_shift; -+}; -+ -+struct ccx_info { -+ u32 nhm_trigger_time; -+ u32 clm_trigger_time; -+ u32 fahm_trigger_time; -+ u32 ifs_clm_trigger_time; -+ u64 start_time; /*@monitor for the test duration*/ -+#ifdef NHM_SUPPORT -+ enum nhm_application nhm_app; -+ enum nhm_option_txon_all nhm_include_txon; -+ enum nhm_option_cca_all nhm_include_cca; -+ enum nhm_divider_opt_all nhm_divider_opt; -+ /*Report*/ -+ u8 nhm_th[NHM_TH_NUM]; -+ u8 nhm_result[NHM_RPT_NUM]; -+ u8 nhm_wgt[NHM_RPT_NUM]; -+ u16 nhm_period; /* @4us per unit */ -+ u8 nhm_igi; -+ u8 nhm_manual_ctrl; -+ u8 nhm_ratio; /*@1% per nuit, it means the interference igi can't overcome.*/ -+ u8 nhm_env_ratio; /*exclude nhm_r[0] above -80dBm or first cluster under -80dBm*/ -+ u8 nhm_rpt_sum; -+ u8 nhm_set_lv; -+ boolean nhm_ongoing; -+ u8 nhm_rpt_stamp; -+ u8 nhm_level; /*including r[0]~r[10]*/ -+ u8 nhm_level_valid; -+ u8 nhm_pwr; /*including r[0]~r[11]*/ -+#ifdef NHM_DYM_PW_TH_SUPPORT -+ boolean nhm_dym_pw_th_en; -+ boolean dym_pwth_manual_ctrl; -+ u8 pw_th_rf20_ori; -+ u8 pw_th_rf20_cur; -+ u8 nhm_pw_th_max; -+ u8 nhm_period_decre; -+ u8 nhm_sl_pw_th; -+#endif -+#endif -+ -+#ifdef CLM_SUPPORT -+ enum clm_application clm_app; -+ u8 clm_manual_ctrl; -+ u8 clm_set_lv; -+ boolean clm_ongoing; -+ u16 clm_period; /* @4us per unit */ -+ u16 clm_result; -+ u8 clm_ratio; -+ u32 clm_fw_result_acc; -+ u8 clm_fw_result_cnt; -+ enum clm_monitor_mode clm_mntr_mode; -+ u8 clm_rpt_stamp; -+#endif -+#ifdef FAHM_SUPPORT -+ enum fahm_application fahm_app; -+ enum fahm_opt_fa fahm_incld_fa; -+ enum fahm_opt_crc32_ok fahm_incld_crc32_ok; -+ enum fahm_opt_crc32_err fahm_incld_crc32_err; -+ boolean fahm_ongoing; -+ u8 fahm_nume_sel; /*@fahm_numerator_sel: select {FA, CRCOK, CRC_fail} */ -+ u8 fahm_denom_sel; /*@fahm_denominator_sel: select {FA, CRCOK, CRC_fail} */ -+ u8 fahm_th[NHM_TH_NUM]; -+ u16 fahm_result[NHM_RPT_NUM]; -+ u16 fahm_period; /*unit: 4us*/ -+ u8 fahm_igi; -+ u8 fahm_manual_ctrl; -+ u16 fahm_rpt_sum; -+ u8 fahm_set_lv; -+ u8 fahm_rpt_stamp; -+ u8 fahm_pwr; /*including r[0]~r[11]*/ -+#endif -+#ifdef IFS_CLM_SUPPORT -+ enum ifs_clm_application ifs_clm_app; -+ /*Control*/ -+ enum phydm_ifs_clm_unit ifs_clm_ctrl_unit; /*4,8,12,16us per unit*/ -+ u16 ifs_clm_period; -+ boolean ifs_clm_th_en[IFS_CLM_NUM]; -+ u16 ifs_clm_th_low[IFS_CLM_NUM]; -+ u16 ifs_clm_th_high[IFS_CLM_NUM]; -+ /*Flow control*/ -+ u8 ifs_clm_set_lv; -+ u8 ifs_clm_manual_ctrl; -+ boolean ifs_clm_ongoing; -+ /*Report*/ -+ u8 ifs_clm_rpt_stamp; -+ u16 ifs_clm_tx; -+ u16 ifs_clm_edcca_excl_cca; -+ u16 ifs_clm_ofdmfa; -+ u16 ifs_clm_ofdmcca_excl_fa; -+ u16 ifs_clm_cckfa; -+ u16 ifs_clm_cckcca_excl_fa; -+ u8 ifs_clm_his[IFS_CLM_NUM]; /*trx_neg_edge to CCA/FA posedge per times*/ -+ u16 ifs_clm_total_cca; -+ u16 ifs_clm_avg[IFS_CLM_NUM]; /*4,8,12,16us per unit*/ -+ u16 ifs_clm_avg_cca[IFS_CLM_NUM]; /*4,8,12,16us per unit*/ -+ u8 ifs_clm_tx_ratio; -+ u8 ifs_clm_edcca_excl_cca_ratio; -+ u8 ifs_clm_fa_ratio; -+ u8 ifs_clm_cca_excl_fa_ratio; -+#endif -+}; -+ -+/* @1 ============================================================ -+ * 1 Function Prototype -+ * 1 ============================================================ -+ */ -+ -+#ifdef FAHM_SUPPORT -+void phydm_fahm_init(void *dm_void); -+ -+void phydm_fahm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len); -+#endif -+ -+#ifdef NHM_SUPPORT -+void phydm_nhm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len); -+u8 phydm_get_igi(void *dm_void, enum bb_path path); -+#endif -+ -+#ifdef CLM_SUPPORT -+void phydm_clm_c2h_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); -+ -+void phydm_clm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len); -+#endif -+ -+u8 phydm_env_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para, -+ struct clm_para_info *clm_para, -+ struct env_trig_rpt *rpt); -+ -+u8 phydm_env_mntr_result(void *dm_void, struct env_mntr_rpt *rpt); -+ -+void phydm_env_mntr_watchdog(void *dm_void); -+ -+void phydm_env_monitor_init(void *dm_void); -+ -+void phydm_env_mntr_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+#ifdef IFS_CLM_SUPPORT -+void phydm_ifs_clm_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#endif -+ -+u8 phydm_enhance_mntr_trigger(void *dm_void, -+ struct nhm_para_info *nhm_para, -+ struct clm_para_info *clm_para, -+ struct fahm_para_info *fahm_para, -+ struct ifs_clm_para_info *ifs_clm_para, -+ struct enhance_mntr_trig_rpt *trig_rpt); -+ -+u8 phydm_enhance_mntr_result(void *dm_void, struct enhance_mntr_rpt *rpt); -+ -+void phydm_enhance_mntr_watchdog(void *dm_void); -+ -+void phydm_enhance_monitor_init(void *dm_void); -+ -+void phydm_enhance_mntr_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_cfotracking.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_cfotracking.c -new file mode 100644 -index 000000000000..748556bf7065 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_cfotracking.c -@@ -0,0 +1,623 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+s32 phydm_get_cfo_hz(void *dm_void, u32 val, u8 bit_num, u8 frac_num) -+{ -+ s32 val_s = 0; -+ -+ val_s = phydm_cnvrt_2_sign(val, bit_num); -+ -+ if (frac_num == 10) /*@ (X*312500)/1024 ~= X*305*/ -+ val_s *= 305; -+ else if (frac_num == 11) /*@ (X*312500)/2048 ~= X*152*/ -+ val_s *= 152; -+ else if (frac_num == 12) /*@ (X*312500)/4096 ~= X*76*/ -+ val_s *= 76; -+ -+ return val_s; -+} -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT) -+void phydm_get_cfo_info_ac(void *dm_void, struct phydm_cfo_rpt *cfo) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ u32 val[4] = {0}; -+ u32 val_1[4] = {0}; -+ u32 val_2[4] = {0}; -+ u32 val_tmp = 0; -+ -+ val[0] = odm_read_4byte(dm, R_0xd0c); -+ val_1[0] = odm_read_4byte(dm, R_0xd10); -+ val_2[0] = odm_get_bb_reg(dm, R_0xd14, 0x1fff0000); -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ val[1] = odm_read_4byte(dm, R_0xd4c); -+ val_1[1] = odm_read_4byte(dm, R_0xd50); -+ val_2[1] = odm_get_bb_reg(dm, R_0xd54, 0x1fff0000); -+ #endif -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ val[2] = odm_read_4byte(dm, R_0xd8c); -+ val_1[2] = odm_read_4byte(dm, R_0xd90); -+ val_2[2] = odm_get_bb_reg(dm, R_0xd94, 0x1fff0000); -+ #endif -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ val[3] = odm_read_4byte(dm, R_0xdcc); -+ val_1[3] = odm_read_4byte(dm, R_0xdd0); -+ val_2[3] = odm_get_bb_reg(dm, R_0xdd4, 0x1fff0000); -+ #endif -+ -+ for (i = 0; i < dm->num_rf_path; i++) { -+ val_tmp = val[i] & 0xfff; /*@ Short CFO, S(12,11)*/ -+ cfo->cfo_rpt_s[i] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); -+ -+ val_tmp = val[i] >> 16; /*@ Long CFO, S(13,12)*/ -+ cfo->cfo_rpt_l[i] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); -+ -+ val_tmp = val_1[i] & 0x7ff; /*@ SCFO, S(11,10)*/ -+ cfo->cfo_rpt_sec[i] = phydm_get_cfo_hz(dm, val_tmp, 11, 10); -+ -+ val_tmp = val_1[i] >> 16; /*@ Acq CFO, S(13,12)*/ -+ cfo->cfo_rpt_acq[i] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); -+ -+ val_tmp = val_2[i]; /*@ End CFO, S(13,12)*/ -+ cfo->cfo_rpt_end[i] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); -+ } -+} -+#endif -+ -+#if (ODM_IC_11N_SERIES_SUPPORT) -+void phydm_get_cfo_info_n(void *dm_void, struct phydm_cfo_rpt *cfo) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 val[5] = {0}; -+ u32 val_tmp = 0; -+ -+ odm_set_bb_reg(dm, R_0xd00, BIT(26), 1); -+ -+ val[0] = odm_read_4byte(dm, R_0xdac); /*@ Short CFO*/ -+ val[1] = odm_read_4byte(dm, R_0xdb0); /*@ Long CFO*/ -+ val[2] = odm_read_4byte(dm, R_0xdb8); /*@ Sec CFO*/ -+ val[3] = odm_read_4byte(dm, R_0xde0); /*@ Acq CFO*/ -+ val[4] = odm_read_4byte(dm, R_0xdbc); /*@ End CFO*/ -+ -+ /*@[path-A]*/ -+ if (dm->support_ic_type & (ODM_RTL8721D | ODM_RTL8710C)) { -+ val_tmp = (val[0] & 0x0fff0000) >> 16; /*@ Short CFO, S(12,11)*/ -+ cfo->cfo_rpt_s[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); -+ val_tmp = (val[1] & 0x0fff0000) >> 16; /*@ Long CFO, S(12,11)*/ -+ cfo->cfo_rpt_l[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); -+ val_tmp = (val[2] & 0x0fff0000) >> 16; /*@ Sec CFO, S(12,11)*/ -+ cfo->cfo_rpt_sec[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); -+ val_tmp = (val[3] & 0x0fff0000) >> 16; /*@ Acq CFO, S(12,11)*/ -+ cfo->cfo_rpt_acq[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); -+ val_tmp = (val[4] & 0x0fff0000) >> 16; /*@ Acq CFO, S(12,11)*/ -+ cfo->cfo_rpt_end[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); -+ } else { -+ val_tmp = (val[0] & 0x0fff0000) >> 16; /*@ Short CFO, S(12,11)*/ -+ cfo->cfo_rpt_s[0] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); -+ val_tmp = (val[1] & 0x1fff0000) >> 16; /*@ Long CFO, S(13,12)*/ -+ cfo->cfo_rpt_l[0] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); -+ val_tmp = (val[2] & 0x7ff0000) >> 16; /*@ Sec CFO, S(11,10)*/ -+ cfo->cfo_rpt_sec[0] = phydm_get_cfo_hz(dm, val_tmp, 11, 10); -+ val_tmp = (val[3] & 0x1fff0000) >> 16; /*@ Acq CFO, S(13,12)*/ -+ cfo->cfo_rpt_acq[0] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); -+ val_tmp = (val[4] & 0x1fff0000) >> 16; /*@ Acq CFO, S(13,12)*/ -+ cfo->cfo_rpt_end[0] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); -+ } -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ /*@[path-B]*/ -+ val_tmp = val[0] & 0xfff; /*@ Short CFO, S(12,11)*/ -+ cfo->cfo_rpt_s[1] = phydm_get_cfo_hz(dm, val_tmp, 12, 11); -+ val_tmp = val[1] & 0x1fff; /*@ Long CFO, S(13,12)*/ -+ cfo->cfo_rpt_l[1] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); -+ val_tmp = val[2] & 0x7ff; /*@ Sec CFO, S(11,10)*/ -+ cfo->cfo_rpt_sec[1] = phydm_get_cfo_hz(dm, val_tmp, 11, 10); -+ val_tmp = val[3] & 0x1fff; /*@ Acq CFO, S(13,12)*/ -+ cfo->cfo_rpt_acq[1] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); -+ val_tmp = val[4] & 0x1fff; /*@ Acq CFO, S(13,12)*/ -+ cfo->cfo_rpt_end[1] = phydm_get_cfo_hz(dm, val_tmp, 13, 12); -+ #endif -+} -+ -+void phydm_set_atc_status(void *dm_void, boolean atc_status) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; -+ u32 reg_tmp = 0; -+ u32 mask_tmp = 0; -+ -+ PHYDM_DBG(dm, DBG_CFO_TRK, "[%s]ATC_en=%d\n", __func__, atc_status); -+ -+ if (cfo_track->is_atc_status == atc_status) -+ return; -+ -+ reg_tmp = ODM_REG(BB_ATC, dm); -+ mask_tmp = ODM_BIT(BB_ATC, dm); -+ odm_set_bb_reg(dm, reg_tmp, mask_tmp, atc_status); -+ cfo_track->is_atc_status = atc_status; -+} -+ -+boolean -+phydm_get_atc_status(void *dm_void) -+{ -+ boolean atc_status = false; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 reg_tmp = 0; -+ u32 mask_tmp = 0; -+ -+ reg_tmp = ODM_REG(BB_ATC, dm); -+ mask_tmp = ODM_BIT(BB_ATC, dm); -+ -+ atc_status = (boolean)odm_get_bb_reg(dm, reg_tmp, mask_tmp); -+ -+ PHYDM_DBG(dm, DBG_CFO_TRK, "[%s]atc_status=%d\n", __func__, atc_status); -+ return atc_status; -+} -+#endif -+ -+void phydm_get_cfo_info(void *dm_void, struct phydm_cfo_rpt *cfo) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ switch (dm->ic_ip_series) { -+ #if (ODM_IC_11N_SERIES_SUPPORT) -+ case PHYDM_IC_N: -+ phydm_get_cfo_info_n(dm, cfo); -+ break; -+ #endif -+ #if (ODM_IC_11AC_SERIES_SUPPORT) -+ case PHYDM_IC_AC: -+ phydm_get_cfo_info_ac(dm, cfo); -+ break; -+ #endif -+ default: -+ break; -+ } -+} -+ -+boolean -+phydm_set_crystal_cap_reg(void *dm_void, u8 crystal_cap) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; -+ u32 reg_val = 0; -+ -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | -+ ODM_RTL8195B | ODM_RTL8812F | ODM_RTL8721D | ODM_RTL8710C|ODM_RTL8723F)) { -+ crystal_cap &= 0x7F; -+ reg_val = crystal_cap | (crystal_cap << 7); -+ } else { -+ crystal_cap &= 0x3F; -+ reg_val = crystal_cap | (crystal_cap << 6); -+ } -+ -+ cfo_track->crystal_cap = crystal_cap; -+ -+ if (dm->support_ic_type & (ODM_RTL8188E | ODM_RTL8188F)) { -+ #if (RTL8188E_SUPPORT || RTL8188F_SUPPORT) -+ /* write 0x24[22:17] = 0x24[16:11] = crystal_cap */ -+ odm_set_mac_reg(dm, R_0x24, 0x7ff800, reg_val); -+ #endif -+ } -+ #if (RTL8812A_SUPPORT) -+ else if (dm->support_ic_type & ODM_RTL8812) { -+ /* write 0x2C[30:25] = 0x2C[24:19] = crystal_cap */ -+ odm_set_mac_reg(dm, R_0x2c, 0x7FF80000, reg_val); -+ } -+ #endif -+ #if (RTL8703B_SUPPORT || RTL8723B_SUPPORT || RTL8192E_SUPPORT ||\ -+ RTL8821A_SUPPORT || RTL8723D_SUPPORT) -+ else if ((dm->support_ic_type & -+ (ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8192E | ODM_RTL8821 | -+ ODM_RTL8723D))) { -+ /* @0x2C[23:18] = 0x2C[17:12] = crystal_cap */ -+ odm_set_mac_reg(dm, R_0x2c, 0x00FFF000, reg_val); -+ } -+ #endif -+ #if (RTL8814A_SUPPORT) -+ else if (dm->support_ic_type & ODM_RTL8814A) { -+ /* write 0x2C[26:21] = 0x2C[20:15] = crystal_cap */ -+ odm_set_mac_reg(dm, R_0x2c, 0x07FF8000, reg_val); -+ } -+ #endif -+ #if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8197F_SUPPORT ||\ -+ RTL8192F_SUPPORT || RTL8197G_SUPPORT || RTL8198F_SUPPORT) -+ else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | -+ ODM_RTL8197F | ODM_RTL8192F | ODM_RTL8197G | ODM_RTL8198F)) { -+ /* write 0x24[30:25] = 0x28[6:1] = crystal_cap */ -+ odm_set_mac_reg(dm, R_0x24, 0x7e000000, crystal_cap); -+ odm_set_mac_reg(dm, R_0x28, 0x7e, crystal_cap); -+ } -+ #endif -+ #if (RTL8710B_SUPPORT) -+ else if (dm->support_ic_type & (ODM_RTL8710B)) { -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ /* write 0x60[29:24] = 0x60[23:18] = crystal_cap */ -+ HAL_SetSYSOnReg(dm->adapter, R_0x60, 0x3FFC0000, reg_val); -+ #endif -+ } -+ #endif -+ #if (RTL8195B_SUPPORT) -+ else if (dm->support_ic_type & ODM_RTL8195B) { -+ phydm_set_crystalcap(dm, (u8)(reg_val & 0x7f)); -+ } -+ #endif -+ #if (RTL8721D_SUPPORT) -+ else if (dm->support_ic_type & (ODM_RTL8721D)) { -+ /* write 0x4800_0228[30:24] crystal_cap */ -+ /*HAL_SetSYSOnReg(dm->adapter, */ -+ /*REG_SYS_XTAL_8721d, 0x7F000000, crystal_cap);*/ -+ u32 temp_val = HAL_READ32(SYSTEM_CTRL_BASE_LP, -+ REG_SYS_EFUSE_SYSCFG2); -+ temp_val = ((crystal_cap << 24) & 0x7F000000) -+ | (temp_val & (~0x7F000000)); -+ HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_SYS_EFUSE_SYSCFG2, -+ temp_val); -+ } -+ #endif -+ #if (RTL8710C_SUPPORT) -+ else if (dm->support_ic_type & (ODM_RTL8710C)) { -+ /* write MAC reg 0x28[13:7][6:0] crystal_cap */ -+ phydm_set_crystalcap(dm, (u8)(reg_val & 0x7f)); -+ } -+ #endif -+ #if (RTL8723F_SUPPORT) -+ else if (dm->support_ic_type & ODM_RTL8723F) { -+ /* write 0x103c[23:17] = 0x103c[16:10] = crystal_cap */ -+ odm_set_mac_reg(dm, R_0x103c, 0x00FFFC00, reg_val); -+ } -+ #endif -+#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT) -+ else if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | -+ ODM_RTL8812F)) { -+ /* write 0x1040[23:17] = 0x1040[16:10] = crystal_cap */ -+ odm_set_mac_reg(dm, R_0x1040, 0x00FFFC00, reg_val); -+ } else { -+ return false; -+ } -+#endif -+ return true; -+} -+ -+void phydm_set_crystal_cap(void *dm_void, u8 crystal_cap) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; -+ -+ if (cfo_track->crystal_cap == crystal_cap) -+ return; -+ -+ if (phydm_set_crystal_cap_reg(dm, crystal_cap)) -+ PHYDM_DBG(dm, DBG_CFO_TRK, "Set crystal_cap = 0x%x\n", -+ cfo_track->crystal_cap); -+ else -+ PHYDM_DBG(dm, DBG_CFO_TRK, "Set fail\n"); -+} -+ -+void phydm_cfo_tracking_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; -+ -+ PHYDM_DBG(dm, DBG_CFO_TRK, "%s ======>\n", __func__); -+ -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8195B | -+ ODM_RTL8812F|ODM_RTL8723F)) -+ cfo_track->def_x_cap = cfo_track->crystal_cap_default & 0x7f; -+ else -+ cfo_track->def_x_cap = cfo_track->crystal_cap_default & 0x3f; -+ -+ cfo_track->is_adjust = true; -+ -+ if (cfo_track->crystal_cap > cfo_track->def_x_cap) { -+ phydm_set_crystal_cap(dm, cfo_track->crystal_cap - 1); -+ PHYDM_DBG(dm, DBG_CFO_TRK, "approch to Init-val (0x%x)\n", -+ cfo_track->crystal_cap); -+ -+ } else if (cfo_track->crystal_cap < cfo_track->def_x_cap) { -+ phydm_set_crystal_cap(dm, cfo_track->crystal_cap + 1); -+ PHYDM_DBG(dm, DBG_CFO_TRK, "approch to init-val 0x%x\n", -+ cfo_track->crystal_cap); -+ } -+ -+#if ODM_IC_11N_SERIES_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) -+ phydm_set_atc_status(dm, true); -+#endif -+#endif -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_AP)) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ /*Disable advance time for CFO residual*/ -+ odm_set_bb_reg(dm, R_0xc2c, BIT29, 0x0); -+ } -+#endif -+#endif -+} -+ -+void phydm_cfo_tracking_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; -+ -+ PHYDM_DBG(dm, DBG_CFO_TRK, "[%s]=========>\n", __func__); -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8195B | -+ ODM_RTL8812F|ODM_RTL8723F)) -+ cfo_track->crystal_cap = cfo_track->crystal_cap_default & 0x7f; -+ else -+ cfo_track->crystal_cap = cfo_track->crystal_cap_default & 0x3f; -+ -+ cfo_track->def_x_cap = cfo_track->crystal_cap; -+ cfo_track->is_adjust = true; -+ PHYDM_DBG(dm, DBG_CFO_TRK, "crystal_cap=0x%x\n", cfo_track->def_x_cap); -+ -+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT) -+ /* @Crystal cap. control by WiFi */ -+ if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) -+ odm_set_mac_reg(dm, R_0x10, 0x40, 0x1); -+#endif -+} -+ -+void phydm_cfo_tracking(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; -+ s32 cfo_avg = 0, cfo_path_sum = 0, cfo_abs = 0; -+ u32 cfo_rpt_sum = 0, cfo_khz_avg[4] = {0}; -+ s8 crystal_cap = cfo_track->crystal_cap; -+ u8 i = 0, valid_path_cnt = 0; -+ -+ if (!(dm->support_ability & ODM_BB_CFO_TRACKING)) -+ return; -+ -+ PHYDM_DBG(dm, DBG_CFO_TRK, "%s ======>\n", __func__); -+ -+ if (!dm->is_linked || !dm->is_one_entry_only) { -+ phydm_cfo_tracking_reset(dm); -+ PHYDM_DBG(dm, DBG_CFO_TRK, "is_linked=%d, one_entry_only=%d\n", -+ dm->is_linked, dm->is_one_entry_only); -+ -+ } else { -+ /* No new packet */ -+ if (cfo_track->packet_count == cfo_track->packet_count_pre) { -+ PHYDM_DBG(dm, DBG_CFO_TRK, "Pkt cnt doesn't change\n"); -+ return; -+ } -+ cfo_track->packet_count_pre = cfo_track->packet_count; -+ -+ /*@Calculate CFO */ -+ for (i = 0; i < dm->num_rf_path; i++) { -+ if (!(dm->rx_ant_status & BIT(i))) -+ continue; -+ -+ valid_path_cnt++; -+ -+ if (cfo_track->CFO_tail[i] < 0) -+ cfo_abs = 0 - cfo_track->CFO_tail[i]; -+ else -+ cfo_abs = cfo_track->CFO_tail[i]; -+ -+ cfo_rpt_sum = (u32)CFO_HW_RPT_2_KHZ(cfo_abs); -+ cfo_khz_avg[i] = PHYDM_DIV(cfo_rpt_sum, -+ cfo_track->CFO_cnt[i]); -+ -+ PHYDM_DBG(dm, DBG_CFO_TRK, -+ "[Path-%d] CFO_sum=((%d)), cnt=((%d)), CFO_avg=((%s%d))kHz\n", -+ i, cfo_rpt_sum, cfo_track->CFO_cnt[i], -+ ((cfo_track->CFO_tail[i] < 0) ? "-" : " "), -+ cfo_khz_avg[i]); -+ -+ if (cfo_track->CFO_tail[i] < 0) -+ cfo_path_sum += (0 - (s32)cfo_khz_avg[i]); -+ else -+ cfo_path_sum += (s32)cfo_khz_avg[i]; -+ } -+ -+ if (valid_path_cnt >= 2) -+ cfo_avg = cfo_path_sum / valid_path_cnt; -+ else -+ cfo_avg = cfo_path_sum; -+ -+ cfo_track->CFO_ave_pre = cfo_avg; -+ -+ PHYDM_DBG(dm, DBG_CFO_TRK, "path_cnt=%d, CFO_avg_path=%d kHz\n", -+ valid_path_cnt, cfo_avg); -+ -+ /*reset counter*/ -+ for (i = 0; i < dm->num_rf_path; i++) { -+ cfo_track->CFO_tail[i] = 0; -+ cfo_track->CFO_cnt[i] = 0; -+ } -+ -+ /* To adjust crystal cap or not */ -+ if (!cfo_track->is_adjust) { -+ if (cfo_avg > CFO_TRK_ENABLE_TH || -+ cfo_avg < (-CFO_TRK_ENABLE_TH)) -+ cfo_track->is_adjust = true; -+ } else { -+ if (cfo_avg <= CFO_TRK_STOP_TH && -+ cfo_avg >= (-CFO_TRK_STOP_TH)) -+ cfo_track->is_adjust = false; -+ } -+ -+ #ifdef ODM_CONFIG_BT_COEXIST -+ /*@BT case: Disable CFO tracking */ -+ if (dm->bt_info_table.is_bt_enabled) { -+ cfo_track->is_adjust = false; -+ phydm_set_crystal_cap(dm, cfo_track->def_x_cap); -+ PHYDM_DBG(dm, DBG_CFO_TRK, "[BT]Disable CFO_track\n"); -+ } -+ #endif -+ -+ /*@Adjust Crystal Cap. */ -+ if (cfo_track->is_adjust) { -+ if (cfo_avg > CFO_TRK_STOP_TH) -+ crystal_cap += 1; -+ else if (cfo_avg < (-CFO_TRK_STOP_TH)) -+ crystal_cap -= 1; -+ -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B | -+ ODM_RTL8195B | ODM_RTL8812F|ODM_RTL8723F)) { -+ if (crystal_cap > 0x7F) -+ crystal_cap = 0x7F; -+ } else { -+ if (crystal_cap > 0x3F) -+ crystal_cap = 0x3F; -+ } -+ if (crystal_cap < 0) -+ crystal_cap = 0; -+ -+ phydm_set_crystal_cap(dm, (u8)crystal_cap); -+ } -+ -+ PHYDM_DBG(dm, DBG_CFO_TRK, "X_cap{Curr,Default}={0x%x,0x%x}\n", -+ cfo_track->crystal_cap, cfo_track->def_x_cap); -+ -+ /* @Dynamic ATC switch */ -+ #if ODM_IC_11N_SERIES_SUPPORT -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ if (cfo_avg < CFO_TH_ATC && cfo_avg > -CFO_TH_ATC) -+ phydm_set_atc_status(dm, false); -+ else -+ phydm_set_atc_status(dm, true); -+ -+ } -+ #endif -+ #endif -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_AP)) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ //Disable advance time for CFO residual -+ odm_set_bb_reg(dm, R_0xc2c, BIT29, 0x0); -+ } -+ #endif -+ #endif -+ } -+} -+ -+void phydm_parsing_cfo(void *dm_void, void *pktinfo_void, s8 *pcfotail, -+ u8 num_ss) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; -+ boolean valid_info = false; -+ u8 i = 0; -+ -+ if (!(dm->support_ability & ODM_BB_CFO_TRACKING)) -+ return; -+ -+ pktinfo = (struct phydm_perpkt_info_struct *)pktinfo_void; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) -+ if (pktinfo->is_packet_match_bssid) -+ valid_info = true; -+#else -+ if (dm->number_active_client == 1) -+ valid_info = true; -+#endif -+ if (valid_info) { -+ if (num_ss > dm->num_rf_path) /*@For fool proof*/ -+ num_ss = dm->num_rf_path; -+ #if 0 -+ PHYDM_DBG(dm, DBG_CFO_TRK, "num_ss=%d, num_rf_path=%d\n", -+ num_ss, dm->num_rf_path); -+ #endif -+ -+ /* @ Update CFO report for path-A & path-B */ -+ /* Only paht-A and path-B have CFO tail and short CFO */ -+ for (i = 0; i < dm->num_rf_path; i++) { -+ if (!(dm->rx_ant_status & BIT(i))) -+ continue; -+ cfo_track->CFO_tail[i] += pcfotail[i]; -+ cfo_track->CFO_cnt[i]++; -+ #if 0 -+ PHYDM_DBG(dm, DBG_CFO_TRK, -+ "[ID %d][path %d][rate 0x%x] CFO_tail = ((%d)), CFO_tail_sum = ((%d)), CFO_cnt = ((%d))\n", -+ pktinfo->station_id, i, pktinfo->data_rate, -+ pcfotail[i], cfo_track->CFO_tail[i], -+ cfo_track->CFO_cnt[i]); -+ #endif -+ } -+ -+ /* @ Update packet counter */ -+ if (cfo_track->packet_count == 0xffffffff) -+ cfo_track->packet_count = 0; -+ else -+ cfo_track->packet_count++; -+ } -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phy_Init_crystal_capacity(void *dm_void, u8 crystal_cap) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!phydm_set_crystal_cap_reg(dm, crystal_cap)) -+ RT_TRACE_F(COMP_INIT, DBG_SERIOUS, -+ ("Crystal is not initialized!\n")); -+} -+#endif -+ -+void phydm_cfo_tracking_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cfo_track_struct *cfo_track = &dm->dm_cfo_track; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "set Xcap: {1}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "show Xcap: {100}\n"); -+ } else { -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if (var1[0] == 1) { -+ PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]); -+ phydm_set_crystal_cap(dm, (u8)var1[1]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set X_cap=0x%x\n", cfo_track->crystal_cap); -+ } else if (var1[0] == 100) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "X_cap=0x%x\n", cfo_track->crystal_cap); -+ } -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_cfotracking.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_cfotracking.h -new file mode 100644 -index 000000000000..253f3ba3eabe ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_cfotracking.h -@@ -0,0 +1,74 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMCFOTRACK_H__ -+#define __PHYDMCFOTRACK_H__ -+ -+/* 2019.03.28 fix 8197G crystal_cap register address*/ -+#define CFO_TRACKING_VERSION "2.4" -+ -+#define CFO_TRK_ENABLE_TH 20 /* @kHz enable CFO_Track threshold*/ -+#define CFO_TRK_STOP_TH 10 /* @kHz disable CFO_Track threshold*/ -+#define CFO_TH_ATC 80 /* @kHz */ -+ -+struct phydm_cfo_track_struct { -+ boolean is_atc_status; -+ boolean is_adjust; /*@already modify crystal cap*/ -+ u8 crystal_cap; -+ u8 crystal_cap_default; -+ u8 def_x_cap; -+ s32 CFO_tail[4]; -+ u32 CFO_cnt[4]; -+ s32 CFO_ave_pre; -+ u32 packet_count; -+ u32 packet_count_pre; -+}; -+ -+struct phydm_cfo_rpt { -+ s32 cfo_rpt_s[PHYDM_MAX_RF_PATH]; -+ s32 cfo_rpt_l[PHYDM_MAX_RF_PATH]; -+ s32 cfo_rpt_acq[PHYDM_MAX_RF_PATH]; -+ s32 cfo_rpt_sec[PHYDM_MAX_RF_PATH]; -+ s32 cfo_rpt_end[PHYDM_MAX_RF_PATH]; -+}; -+ -+void phydm_get_cfo_info(void *dm_void, struct phydm_cfo_rpt *cfo); -+ -+boolean phydm_set_crystal_cap_reg(void *dm_void, u8 crystal_cap); -+ -+void phydm_set_crystal_cap(void *dm_void, u8 crystal_cap); -+ -+void phydm_cfo_tracking_init(void *dm_void); -+ -+void phydm_cfo_tracking(void *dm_void); -+ -+void phydm_parsing_cfo(void *dm_void, void *pktinfo_void, s8 *pcfotail, -+ u8 num_ss); -+void phydm_cfo_tracking_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phy_Init_crystal_capacity(void *dm_void, u8 crystal_cap); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_debug.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_debug.c -new file mode 100644 -index 000000000000..5b28ca28b22c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_debug.c -@@ -0,0 +1,6156 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+void phydm_init_debug_setting(struct dm_struct *dm) -+{ -+ dm->fw_debug_components = 0; -+ dm->debug_components = -+ -+#if DBG -+ /*@BB Functions*/ -+ /*@DBG_DIG |*/ -+ /*@DBG_RA_MASK |*/ -+ /*@DBG_DYN_TXPWR |*/ -+ /*@DBG_FA_CNT |*/ -+ /*@DBG_RSSI_MNTR |*/ -+ /*@DBG_CCKPD |*/ -+ /*@DBG_ANT_DIV |*/ -+ /*@DBG_SMT_ANT |*/ -+ /*@DBG_PWR_TRAIN |*/ -+ /*@DBG_RA |*/ -+ /*@DBG_PATH_DIV |*/ -+ /*@DBG_DFS |*/ -+ /*@DBG_DYN_ARFR |*/ -+ /*@DBG_ADPTVTY |*/ -+ /*@DBG_CFO_TRK |*/ -+ /*@DBG_ENV_MNTR |*/ -+ /*@DBG_PRI_CCA |*/ -+ /*@DBG_ADPTV_SOML |*/ -+ /*@DBG_LNA_SAT_CHK |*/ -+ /*@DBG_PHY_STATUS |*/ -+ /*@DBG_TMP |*/ -+ /*@DBG_FW_TRACE |*/ -+ /*@DBG_TXBF |*/ -+ /*@DBG_COMMON_FLOW |*/ -+ /*@ODM_PHY_CONFIG |*/ -+ /*@ODM_COMP_INIT |*/ -+ /*@DBG_CMN |*/ -+ /*@ODM_COMP_API |*/ -+#endif -+ 0; -+ -+ dm->fw_buff_is_enpty = true; -+ dm->pre_c2h_seq = 0; -+ dm->c2h_cmd_start = 0; -+ dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD; -+ dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD; -+ phydm_reset_rx_rate_distribution(dm); -+} -+ -+void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ odm_set_bb_reg(dm, R_0x8f8, 0x3c00000, header_idx); -+ -+ /*@ -+ * header_idx: -+ * (0:) '{ofdm_dbg[31:0]}' -+ * (1:) '{cca,crc32_fail,dbg_ofdm[29:0]}' -+ * (2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}' -+ * (3:) '{cca,crc32_ok,dbg_ofdm[29:0]}' -+ * (4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}' -+ * (5:) '{dbg_iqk_anta}' -+ * (6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}' -+ * (7:) '{dbg_iqk_antb}' -+ * (8:) '{DBGOUT_RFC_b[31:0]}' -+ * (9:) '{DBGOUT_RFC_a[31:0]}' -+ * (a:) '{dbg_ofdm}' -+ * (b:) '{dbg_cck}' -+ */ -+ } -+} -+ -+void phydm_bb_dbg_port_clock_en(void *dm_void, u8 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 reg_value = 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_2_SERIES) { -+ /*@enable/disable debug port clock, for power saving*/ -+ reg_value = enable ? 0x7 : 0; -+ odm_set_bb_reg(dm, R_0x198c, 0x7, reg_value); -+ } -+} -+ -+u32 phydm_get_bb_dbg_port_idx(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 val = 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ phydm_bb_dbg_port_clock_en(dm, true); -+ val = odm_get_bb_reg(dm, R_0x8fc, MASKDWORD); -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ val = odm_get_bb_reg(dm, R_0x1c3c, 0xfff00); -+ } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/ -+ val = odm_get_bb_reg(dm, R_0x908, MASKDWORD); -+ } -+ return val; -+} -+ -+u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 dbg_port_result = false; -+ -+ if (curr_dbg_priority > dm->pre_dbg_priority) { -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ phydm_bb_dbg_port_clock_en(dm, true); -+ -+ odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, debug_port); -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ odm_set_bb_reg(dm, R_0x1c3c, 0xfff00, debug_port); -+ } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/ -+ odm_set_bb_reg(dm, R_0x908, MASKDWORD, debug_port); -+ } -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n", -+ debug_port, curr_dbg_priority, dm->pre_dbg_priority); -+ dm->pre_dbg_priority = curr_dbg_priority; -+ dbg_port_result = true; -+ } -+ -+ return dbg_port_result; -+} -+ -+void phydm_release_bb_dbg_port(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ phydm_bb_dbg_port_clock_en(dm, false); -+ phydm_bb_dbg_port_header_sel(dm, 0); -+ -+ dm->pre_dbg_priority = DBGPORT_RELEASE; -+ PHYDM_DBG(dm, ODM_COMP_API, "Release BB dbg_port\n"); -+} -+ -+u32 phydm_get_bb_dbg_port_val(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 dbg_port_value = 0; -+ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ dbg_port_value = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD); -+ else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ dbg_port_value = odm_get_bb_reg(dm, R_0x2dbc, MASKDWORD); -+ else /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/ -+ dbg_port_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD); -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "dbg_port_value = 0x%x\n", dbg_port_value); -+ return dbg_port_value; -+} -+ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+#if (ODM_IC_11N_SERIES_SUPPORT) -+void phydm_bb_hw_dbg_info_n(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 value32 = 0, value32_1 = 0; -+ u8 rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0; -+ u8 rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0; -+ s8 rxevm_0 = 0, rxevm_1 = 0; -+ #if 1 -+ struct phydm_cfo_rpt cfo; -+ u8 i = 0; -+ #else -+ s32 short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0; -+ s32 scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0; -+ s32 cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0; -+ #endif -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n", -+ "BB Report Info"); -+ -+ /*@AGC result*/ -+ value32 = odm_get_bb_reg(dm, R_0xdd0, MASKDWORD); -+ rf_gain_a = (u8)(value32 & 0x3f); -+ rf_gain_a = rf_gain_a << 1; -+ -+ rf_gain_b = (u8)((value32 >> 8) & 0x3f); -+ rf_gain_b = rf_gain_b << 1; -+ -+ rf_gain_c = (u8)((value32 >> 16) & 0x3f); -+ rf_gain_c = rf_gain_c << 1; -+ -+ rf_gain_d = (u8)((value32 >> 24) & 0x3f); -+ rf_gain_d = rf_gain_d << 1; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", -+ rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d); -+ -+ /*SNR report*/ -+ value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD); -+ rx_snr_a = (u8)(value32 & 0xff); -+ rx_snr_a = rx_snr_a >> 1; -+ -+ rx_snr_b = (u8)((value32 >> 8) & 0xff); -+ rx_snr_b = rx_snr_b >> 1; -+ -+ rx_snr_c = (u8)((value32 >> 16) & 0xff); -+ rx_snr_c = rx_snr_c >> 1; -+ -+ rx_snr_d = (u8)((value32 >> 24) & 0xff); -+ rx_snr_d = rx_snr_d >> 1; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", -+ rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d); -+ -+ /* PostFFT related info*/ -+ value32 = odm_get_bb_reg(dm, R_0xdd8, MASKDWORD); -+ -+ rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16); -+ rxevm_0 /= 2; -+ if (rxevm_0 < -63) -+ rxevm_0 = 0; -+ -+ rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24); -+ rxevm_1 /= 2; -+ if (rxevm_1 < -63) -+ rxevm_1 = 0; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1); -+ -+#if 1 -+ phydm_get_cfo_info(dm, &cfo); -+ for (i = 0; i < dm->num_rf_path; i++) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}", -+ "CFO", i, "{S, L, Sec, Acq, End}", -+ cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i], -+ cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]); -+ } -+#else -+ /*@CFO Report Info*/ -+ odm_set_bb_reg(dm, R_0xd00, BIT(26), 1); -+ -+ /*Short CFO*/ -+ value32 = odm_get_bb_reg(dm, R_0xdac, MASKDWORD); -+ value32_1 = odm_get_bb_reg(dm, R_0xdb0, MASKDWORD); -+ -+ short_cfo_b = (s32)(value32 & 0xfff); /*S(12,11)*/ -+ short_cfo_a = (s32)((value32 & 0x0fff0000) >> 16); -+ -+ long_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/ -+ long_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16); -+ -+ /*SFO 2's to dec*/ -+ if (short_cfo_a > 2047) -+ short_cfo_a = short_cfo_a - 4096; -+ if (short_cfo_b > 2047) -+ short_cfo_b = short_cfo_b - 4096; -+ -+ short_cfo_a = (short_cfo_a * 312500) / 2048; -+ short_cfo_b = (short_cfo_b * 312500) / 2048; -+ -+ /*@LFO 2's to dec*/ -+ -+ if (long_cfo_a > 4095) -+ long_cfo_a = long_cfo_a - 8192; -+ -+ if (long_cfo_b > 4095) -+ long_cfo_b = long_cfo_b - 8192; -+ -+ long_cfo_a = long_cfo_a * 312500 / 4096; -+ long_cfo_b = long_cfo_b * 312500 / 4096; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s", -+ "CFO Report Info"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "Short CFO(Hz) ", short_cfo_a, -+ short_cfo_b); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "Long CFO(Hz) ", long_cfo_a, -+ long_cfo_b); -+ -+ /*SCFO*/ -+ value32 = odm_get_bb_reg(dm, R_0xdb8, MASKDWORD); -+ value32_1 = odm_get_bb_reg(dm, R_0xdb4, MASKDWORD); -+ -+ scfo_b = (s32)(value32 & 0x7ff); /*S(11,10)*/ -+ scfo_a = (s32)((value32 & 0x07ff0000) >> 16); -+ -+ if (scfo_a > 1023) -+ scfo_a = scfo_a - 2048; -+ -+ if (scfo_b > 1023) -+ scfo_b = scfo_b - 2048; -+ -+ scfo_a = scfo_a * 312500 / 1024; -+ scfo_b = scfo_b * 312500 / 1024; -+ -+ avg_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/ -+ avg_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16); -+ -+ if (avg_cfo_a > 4095) -+ avg_cfo_a = avg_cfo_a - 8192; -+ -+ if (avg_cfo_b > 4095) -+ avg_cfo_b = avg_cfo_b - 8192; -+ -+ avg_cfo_a = avg_cfo_a * 312500 / 4096; -+ avg_cfo_b = avg_cfo_b * 312500 / 4096; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "value SCFO(Hz) ", scfo_a, -+ scfo_b); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "Avg CFO(Hz) ", avg_cfo_a, -+ avg_cfo_b); -+ -+ value32 = odm_get_bb_reg(dm, R_0xdbc, MASKDWORD); -+ value32_1 = odm_get_bb_reg(dm, R_0xde0, MASKDWORD); -+ -+ cfo_end_b = (s32)(value32 & 0x1fff); /*S(13,12)*/ -+ cfo_end_a = (s32)((value32 & 0x1fff0000) >> 16); -+ -+ if (cfo_end_a > 4095) -+ cfo_end_a = cfo_end_a - 8192; -+ -+ if (cfo_end_b > 4095) -+ cfo_end_b = cfo_end_b - 8192; -+ -+ cfo_end_a = cfo_end_a * 312500 / 4096; -+ cfo_end_b = cfo_end_b * 312500 / 4096; -+ -+ acq_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/ -+ acq_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16); -+ -+ if (acq_cfo_a > 4095) -+ acq_cfo_a = acq_cfo_a - 8192; -+ -+ if (acq_cfo_b > 4095) -+ acq_cfo_b = acq_cfo_b - 8192; -+ -+ acq_cfo_a = acq_cfo_a * 312500 / 4096; -+ acq_cfo_b = acq_cfo_b * 312500 / 4096; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "End CFO(Hz) ", cfo_end_a, -+ cfo_end_b); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "ACQ CFO(Hz) ", acq_cfo_a, -+ acq_cfo_b); -+#endif -+} -+#endif -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT) -+#if (RTL8822B_SUPPORT) -+void phydm_bb_hw_dbg_info_8822b(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 condi_num = 0; -+ u8 i = 0; -+ -+ if (!(dm->support_ic_type == ODM_RTL8822B)) -+ return; -+ -+ condi_num = phydm_get_condi_num_8822b(dm); -+ phydm_get_condi_num_acc_8822b(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d.%.4d", "condi_num", -+ condi_num >> 4, phydm_show_fraction_num(condi_num & 0xf, 4)); -+ -+ for (i = 0; i < CN_CNT_MAX; i++) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n Tone_num[CN>%d]%-21s = %d", -+ i, " ", dm->phy_dbg_info.condi_num_cdf[i]); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -+ -+void phydm_bb_hw_dbg_info_ac(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ char *tmp_string = NULL; -+ u8 rx_ht_bw, rx_vht_bw, rxsc, rx_ht, bw_idx = 0; -+ static u8 v_rx_bw; -+ u32 value32, value32_1, value32_2, value32_3; -+ struct phydm_cfo_rpt cfo; -+ u8 i = 0; -+ static u8 tail, parity, rsv, vrsv, smooth, htsound, agg; -+ static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts; -+ static u8 vtxops, vrsv2, vbrsv, bf, vbcrc; -+ static u16 h_length, htcrc8, length; -+ static u16 vpaid; -+ static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail; -+ static u8 hmcss, hrx_bw; -+ u8 pwdb; -+ s8 rxevm_0, rxevm_1, rxevm_2; -+ u8 rf_gain[4]; -+ u8 rx_snr[4]; -+ s32 sig_power; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n", -+ "BB Report Info"); -+ -+ /*@ [BW & Mode] =====================================================*/ -+ -+ value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD); -+ rx_ht = (u8)((value32 & 0x180) >> 7); -+ -+ if (rx_ht == AD_VHT_MODE) { -+ tmp_string = "VHT"; -+ bw_idx = (u8)((value32 >> 1) & 0x3); -+ } else if (rx_ht == AD_HT_MODE) { -+ tmp_string = "HT"; -+ bw_idx = (u8)(value32 & 0x1); -+ } else { -+ tmp_string = "Legacy"; -+ bw_idx = 0; -+ } -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s %s %dM", "mode", tmp_string, (20 << bw_idx)); -+ -+ if (rx_ht != AD_LEGACY_MODE) { -+ rxsc = (u8)(value32 & 0x78); -+ -+ if (rxsc == 0) -+ tmp_string = "duplicate/full bw"; -+ else if (rxsc == 1) -+ tmp_string = "usc20-1"; -+ else if (rxsc == 2) -+ tmp_string = "lsc20-1"; -+ else if (rxsc == 3) -+ tmp_string = "usc20-2"; -+ else if (rxsc == 4) -+ tmp_string = "lsc20-2"; -+ else if (rxsc == 9) -+ tmp_string = "usc40"; -+ else if (rxsc == 10) -+ tmp_string = "lsc40"; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-35s", tmp_string); -+ } -+ -+ /*@ [RX signal power and AGC related info] ==========================*/ -+ -+ pwdb = (u8)odm_get_bb_reg(dm, R_0xf90, MASKBYTE1); -+ sig_power = -110 + (pwdb >> 1); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power); -+ -+ value32 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD); -+ rx_snr[RF_PATH_A] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/ -+ rf_gain[RF_PATH_A] = (s8)(((value32 & MASKBYTE1) >> 8) * 2); -+ -+ value32 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD); -+ rx_snr[RF_PATH_B] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/ -+ rf_gain[RF_PATH_B] = (s8)(((value32 & MASKBYTE1) >> 8) * 2); -+ -+ value32 = odm_get_bb_reg(dm, R_0xd94, MASKDWORD); -+ rx_snr[RF_PATH_C] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/ -+ rf_gain[RF_PATH_C] = (s8)(((value32 & MASKBYTE1) >> 8) * 2); -+ -+ value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD); -+ rx_snr[RF_PATH_D] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/ -+ rf_gain[RF_PATH_D] = (s8)(((value32 & MASKBYTE1) >> 8) * 2); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", -+ rf_gain[RF_PATH_A], rf_gain[RF_PATH_B], -+ rf_gain[RF_PATH_C], rf_gain[RF_PATH_D]); -+ -+ /*@ [RX counter Info] ===============================================*/ -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d", "OFDM CCA cnt", -+ odm_get_bb_reg(dm, R_0xf08, 0xFFFF0000)); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d", "OFDM SBD Fail cnt", -+ odm_get_bb_reg(dm, R_0xfd0, 0xFFFF)); -+ -+ value32 = odm_get_bb_reg(dm, R_0xfc4, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt", -+ value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d", "CCK CCA cnt", -+ odm_get_bb_reg(dm, R_0xfcc, 0xFFFF)); -+ -+ value32 = odm_get_bb_reg(dm, R_0xfbc, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", -+ "LSIG (parity Fail/rate Illegal) cnt", value32 & 0xFFFF, -+ ((value32 & 0xFFFF0000) >> 16)); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt", -+ odm_get_bb_reg(dm, R_0xfc0, (0xFFFF0000 >> 16)), -+ odm_get_bb_reg(dm, R_0xfc8, 0xFFFF)); -+ -+ /*@ [PostFFT Info] =================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD); -+ rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16); -+ rxevm_0 /= 2; -+ if (rxevm_0 < -63) -+ rxevm_0 = 0; -+ -+ rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24); -+ rxevm_1 /= 2; -+ value32 = odm_get_bb_reg(dm, R_0xf88, MASKDWORD); -+ rxevm_2 = (s8)((value32 & MASKBYTE2) >> 16); -+ rxevm_2 /= 2; -+ -+ if (rxevm_1 < -63) -+ rxevm_1 = 0; -+ if (rxevm_2 < -63) -+ rxevm_2 = 0; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", rxevm_0, -+ rxevm_1, rxevm_2); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D dB)", -+ rx_snr[RF_PATH_A], rx_snr[RF_PATH_B], -+ rx_snr[RF_PATH_C], rx_snr[RF_PATH_D]); -+ -+ value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32 & 0xFFFF, -+ ((value32 & 0xFFFF0000) >> 16)); -+ -+ /*@ [CFO Report Info] ===============================================*/ -+ phydm_get_cfo_info(dm, &cfo); -+ for (i = 0; i < dm->num_rf_path; i++) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}", -+ "CFO", i, "{S, L, Sec, Acq, End}", -+ cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i], -+ cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]); -+ } -+ -+ /*@ [L-SIG Content] =================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0xf20, MASKDWORD); -+ -+ tail = (u8)((value32 & 0xfc0000) >> 18);/*@[23:18]*/ -+ parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/ -+ length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/ -+ rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/ -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s", -+ "L-SIG"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d M", "rate", -+ phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f))); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length, -+ parity); -+ -+ if (rx_ht == AD_HT_MODE) { -+ /*@ [HT SIG 1] ======================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD); -+ -+ hmcss = (u8)(value32 & 0x7F); -+ hrx_bw = (u8)((value32 & 0x80) >> 7); -+ h_length = (u16)((value32 & 0x0fff00) >> 8); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s", "HT-SIG1"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d / %d", "MCS/BW/length", -+ hmcss, hrx_bw, h_length); -+ /*@ [HT SIG 2] ======================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD); -+ smooth = (u8)(value32 & 0x01); -+ htsound = (u8)((value32 & 0x02) >> 1); -+ rsv = (u8)((value32 & 0x04) >> 2); -+ agg = (u8)((value32 & 0x08) >> 3); -+ stbc = (u8)((value32 & 0x30) >> 4); -+ fec = (u8)((value32 & 0x40) >> 6); -+ sgi = (u8)((value32 & 0x80) >> 7); -+ htltf = (u8)((value32 & 0x300) >> 8); -+ htcrc8 = (u16)((value32 & 0x3fc00) >> 10); -+ tail = (u8)((value32 & 0xfc0000) >> 18); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s", -+ "HT-SIG2"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %x / %x / %x / %x / %x", -+ "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC", -+ smooth, htsound, rsv, agg, stbc, fec); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %x / %x / %x", -+ "SGI/E-HT-LTFs/CRC/tail", -+ sgi, htltf, htcrc8, tail); -+ } else if (rx_ht == AD_VHT_MODE) { -+ /*@ [VHT SIG A1] ====================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD); -+ -+ v_rx_bw = (u8)(value32 & 0x03); -+ vrsv = (u8)((value32 & 0x04) >> 2); -+ vstbc = (u8)((value32 & 0x08) >> 3); -+ vgid = (u8)((value32 & 0x3f0) >> 4); -+ v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1); -+ vpaid = (u16)((value32 & 0x3fe000) >> 13); -+ vtxops = (u8)((value32 & 0x400000) >> 22); -+ vrsv2 = (u8)((value32 & 0x800000) >> 23); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s", -+ "VHT-SIG-A1"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x", -+ "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw, -+ vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2); -+ -+ /*@ [VHT SIG A2] ====================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD); -+ -+ /* @sgi=(u8)(value32&0x01); */ -+ sgiext = (u8)(value32 & 0x03); -+ /* @fec = (u8)(value32&0x04); */ -+ fecext = (u8)((value32 & 0x0C) >> 2); -+ -+ v_mcss = (u8)((value32 & 0xf0) >> 4); -+ bf = (u8)((value32 & 0x100) >> 8); -+ vrsv = (u8)((value32 & 0x200) >> 9); -+ vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10); -+ v_tail = (u8)((value32 & 0xfc0000) >> 18); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s", "VHT-SIG-A2"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x", -+ "SGI/FEC/MCS/BF/Rsv/CRC/tail", -+ sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail); -+ -+ /*@ [VHT SIG B] ====================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0xf34, MASKDWORD); -+ -+ #if 0 -+ v_length = (u16)(value32 & 0x1fffff); -+ vbrsv = (u8)((value32 & 0x600000) >> 21); -+ vb_tail = (u16)((value32 & 0x1f800000) >> 23); -+ vbcrc = (u8)((value32 & 0x80000000) >> 31); -+ #endif -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s", "VHT-SIG-B"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x", -+ "Codeword", value32); -+ -+ #if 0 -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %x / %x / %x", -+ "length/Rsv/tail/CRC", -+ v_length, vbrsv, vb_tail, vbcrc); -+ #endif -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+void phydm_bb_hw_dbg_info_jgr3(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ char *tmp_string = NULL; -+ u8 rx_ht_bw = 0, rx_vht_bw = 0, rx_ht = 0; -+ static u8 v_rx_bw; -+ u32 value32 = 0; -+ u8 i = 0; -+ static u8 tail, parity, rsv, vrsv, smooth, htsound, agg; -+ static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts; -+ static u8 vtxops, vrsv2, vbrsv, bf, vbcrc; -+ static u16 h_length, htcrc8, length; -+ static u16 vpaid; -+ static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail; -+ static u8 hmcss, hrx_bw; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n", -+ "BB Report Info"); -+ -+ /*@ [Mode] =====================================================*/ -+ -+ value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD); -+ rx_ht = (u8)((value32 & 0xC0000) >> 18); -+ if (rx_ht == AD_VHT_MODE) -+ tmp_string = "VHT"; -+ else if (rx_ht == AD_HT_MODE) -+ tmp_string = "HT"; -+ else -+ tmp_string = "Legacy"; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s %s", "mode", tmp_string); -+ /*@ [RX counter Info] ===============================================*/ -+ -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d", "CCK CCA cnt", -+ odm_get_bb_reg(dm, R_0x2aa0, 0xFFFF)); -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d", "CCK CCA cnt", -+ odm_get_bb_reg(dm, R_0x2c08, 0xFFFF)); -+ } -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d", "OFDM CCA cnt", -+ odm_get_bb_reg(dm, R_0x2c08, 0xFFFF0000)); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d", "OFDM SBD Fail cnt", -+ odm_get_bb_reg(dm, R_0x2d20, 0xFFFF0000)); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", -+ "LSIG (parity Fail/rate Illegal) cnt", -+ odm_get_bb_reg(dm, R_0x2d04, 0xFFFF0000), -+ odm_get_bb_reg(dm, R_0x2d08, 0xFFFF)); -+ -+ value32 = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt", -+ value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)); -+ -+ value32 = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt", -+ value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)); -+ /*@ [L-SIG Content] =================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD); -+ -+ parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/ -+ length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/ -+ rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/ -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s", -+ "L-SIG"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d M", "rate", -+ phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f))); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length, -+ parity); -+ -+ if (rx_ht == AD_HT_MODE) { -+ /*@ [HT SIG 1] ======================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD); -+ -+ hmcss = (u8)(value32 & 0x7F); -+ hrx_bw = (u8)((value32 & 0x80) >> 7); -+ h_length = (u16)((value32 & 0x0fff00) >> 8); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s", "HT-SIG1"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %d / %d / %d", "MCS/BW/length", -+ hmcss, hrx_bw, h_length); -+ /*@ [HT SIG 2] ======================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD); -+ smooth = (u8)(value32 & 0x01); -+ htsound = (u8)((value32 & 0x02) >> 1); -+ rsv = (u8)((value32 & 0x04) >> 2); -+ agg = (u8)((value32 & 0x08) >> 3); -+ stbc = (u8)((value32 & 0x30) >> 4); -+ fec = (u8)((value32 & 0x40) >> 6); -+ sgi = (u8)((value32 & 0x80) >> 7); -+ htltf = (u8)((value32 & 0x300) >> 8); -+ htcrc8 = (u16)((value32 & 0x3fc00) >> 10); -+ tail = (u8)((value32 & 0xfc0000) >> 18); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s", -+ "HT-SIG2"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %x / %x / %x / %x / %x", -+ "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC", -+ smooth, htsound, rsv, agg, stbc, fec); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %x / %x / %x", -+ "SGI/E-HT-LTFs/CRC/tail", -+ sgi, htltf, htcrc8, tail); -+ } else if (rx_ht == AD_VHT_MODE) { -+ /*@ [VHT SIG A1] ====================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD); -+ -+ v_rx_bw = (u8)(value32 & 0x03); -+ vrsv = (u8)((value32 & 0x04) >> 2); -+ vstbc = (u8)((value32 & 0x08) >> 3); -+ vgid = (u8)((value32 & 0x3f0) >> 4); -+ v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1); -+ vpaid = (u16)((value32 & 0x3fe000) >> 13); -+ vtxops = (u8)((value32 & 0x400000) >> 22); -+ vrsv2 = (u8)((value32 & 0x800000) >> 23); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s", -+ "VHT-SIG-A1"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x", -+ "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw, -+ vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2); -+ -+ /*@ [VHT SIG A2] ====================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD); -+ -+ /* @sgi=(u8)(value32&0x01); */ -+ sgiext = (u8)(value32 & 0x03); -+ /* @fec = (u8)(value32&0x04); */ -+ fecext = (u8)((value32 & 0x0C) >> 2); -+ -+ v_mcss = (u8)((value32 & 0xf0) >> 4); -+ bf = (u8)((value32 & 0x100) >> 8); -+ vrsv = (u8)((value32 & 0x200) >> 9); -+ vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10); -+ v_tail = (u8)((value32 & 0xfc0000) >> 18); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s", "VHT-SIG-A2"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x", -+ "SGI/FEC/MCS/BF/Rsv/CRC/tail", -+ sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail); -+ -+ /*@ [VHT SIG B] ====================================================*/ -+ value32 = odm_get_bb_reg(dm, R_0x2c34, MASKDWORD); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s", "VHT-SIG-B"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x", -+ "Codeword", value32); -+ -+ if (v_rx_bw == 0) { -+ v_length = (u16)(value32 & 0x1ffff); -+ vbrsv = (u8)((value32 & 0xE0000) >> 17); -+ vb_tail = (u16)((value32 & 0x03F00000) >> 20); -+ } else if (v_rx_bw == 1) { -+ v_length = (u16)(value32 & 0x7FFFF); -+ vbrsv = (u8)((value32 & 0x180000) >> 19); -+ vb_tail = (u16)((value32 & 0x07E00000) >> 21); -+ } else if (v_rx_bw == 2) { -+ v_length = (u16)(value32 & 0x1fffff); -+ vbrsv = (u8)((value32 & 0x600000) >> 21); -+ vb_tail = (u16)((value32 & 0x1f800000) >> 23); -+ } -+ vbcrc = (u8)((value32 & 0x80000000) >> 31); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n %-35s = %x / %x / %x / %x", -+ "length/Rsv/tail/CRC", -+ v_length, vbrsv, vb_tail, vbcrc); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -+ -+u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig) -+{ -+ u8 rate_idx = 0xff; -+ -+ switch (rate_idx_l_sig) { -+ case 0x0b: -+ rate_idx = 6; -+ break; -+ case 0x0f: -+ rate_idx = 9; -+ break; -+ case 0x0a: -+ rate_idx = 12; -+ break; -+ case 0x0e: -+ rate_idx = 18; -+ break; -+ case 0x09: -+ rate_idx = 24; -+ break; -+ case 0x0d: -+ rate_idx = 36; -+ break; -+ case 0x08: -+ rate_idx = 48; -+ break; -+ case 0x0c: -+ rate_idx = 54; -+ break; -+ default: -+ rate_idx = 0xff; -+ break; -+ } -+ -+ return rate_idx; -+} -+ -+void phydm_bb_hw_dbg_info(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ switch (dm->ic_ip_series) { -+ #if (ODM_IC_11N_SERIES_SUPPORT) -+ case PHYDM_IC_N: -+ phydm_bb_hw_dbg_info_n(dm, &used, output, &out_len); -+ break; -+ #endif -+ -+ #if (ODM_IC_11AC_SERIES_SUPPORT) -+ case PHYDM_IC_AC: -+ phydm_bb_hw_dbg_info_ac(dm, &used, output, &out_len); -+ phydm_reset_bb_hw_cnt(dm); -+ #if (RTL8822B_SUPPORT) -+ phydm_bb_hw_dbg_info_8822b(dm, &used, output, &out_len); -+ #endif -+ break; -+ #endif -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ case PHYDM_IC_JGR3: -+ phydm_bb_hw_dbg_info_jgr3(dm, &used, output, &out_len); -+ phydm_reset_bb_hw_cnt(dm); -+ break; -+ #endif -+ default: -+ break; -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+void phydm_dm_summary_cli_win(void *dm_void, char *buf, u8 macid) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track; -+ struct cmn_sta_info *sta = NULL; -+ struct ra_sta_info *ra = NULL; -+ struct dtp_info *dtp = NULL; -+ u64 comp = dm->support_ability; -+ u64 pause_comp = dm->pause_ability; -+ -+ if (!dm->is_linked) { -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "[%s]No Link !!!\n", __func__); -+ RT_PRINT(buf); -+ return; -+ } -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n", -+ ((comp & ODM_BB_DIG) ? -+ ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."), -+ "DIG", -+ dig_t->cur_ig_value, -+ dig_t->rx_gain_range_min, dig_t->rx_gain_range_max, -+ dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]); -+ RT_PRINT(buf); -+ -+ sta = dm->phydm_sta_info[macid]; -+ if (is_sta_active(sta)) { -+ ra = &sta->ra_info; -+ dtp = &sta->dtp_stat; -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n", -+ ((comp & ODM_BB_RA_MASK) ? -+ ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."), -+ "RaMask", -+ ra->rssi_level, ra->ramask); -+ RT_PRINT(buf); -+ -+ #ifdef CONFIG_DYNAMIC_TX_TWR -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "02.(%s) %-12s: pwr_lv=%d\n", -+ ((comp & ODM_BB_DYNAMIC_TXPWR) ? -+ ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."), -+ "DynTxPwr", -+ dtp->sta_tx_high_power_lvl); -+ RT_PRINT(buf); -+ #endif -+ } -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "05.(%s) %-12s: cck_pd_lv=%d\n", -+ ((comp & ODM_BB_CCK_PD) ? -+ ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."), -+ "CCK_PD", dm->dm_cckpd_table.cck_pd_lv); -+ RT_PRINT(buf); -+ -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "06.(%s) %-12s: div_type=%d, curr_ant=%s\n", -+ ((comp & ODM_BB_ANT_DIV) ? -+ ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."), -+ "ANT_DIV", -+ dm->ant_div_type, -+ (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX"); -+ RT_PRINT(buf); -+#endif -+ -+#ifdef PHYDM_POWER_TRAINING_SUPPORT -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "08.(%s) %-12s: PT_score=%d, disable_PT=%d\n", -+ ((comp & ODM_BB_PWR_TRAIN) ? -+ ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."), -+ "PwrTrain", -+ dm->pow_train_table.pow_train_score, -+ dm->is_disable_power_training); -+ RT_PRINT(buf); -+#endif -+ -+#ifdef CONFIG_PHYDM_DFS_MASTER -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n", -+ ((comp & ODM_BB_DFS) ? -+ ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."), -+ "DFS", -+ dm->dfs.dbg_mode, dm->dfs_region_domain); -+ RT_PRINT(buf); -+#endif -+#ifdef PHYDM_SUPPORT_ADAPTIVITY -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n", -+ ((comp & ODM_BB_ADAPTIVITY) ? -+ ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."), -+ "Adaptivity", -+ dm->adaptivity.th_l2h, dm->adaptivity.th_h2l, -+ dm->false_alm_cnt.edcca_flag); -+ RT_PRINT(buf); -+#endif -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n", -+ ((comp & ODM_BB_CFO_TRACKING) ? -+ ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."), -+ "CfoTrack", -+ cfo_t->CFO_ave_pre, -+ ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"), -+ DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap)); -+ RT_PRINT(buf); -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "15.(%s) %-12s: ratio{nhm, clm}={%d, %d}, level{valid, RSSI}={%d, %d}\n", -+ ((comp & ODM_BB_ENV_MONITOR) ? -+ ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."), -+ "EnvMntr", -+ dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio, -+ dm->dm_ccx_info.nhm_level_valid, dm->dm_ccx_info.nhm_level); -+ RT_PRINT(buf); -+#ifdef PHYDM_PRIMARY_CCA -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "16.(%s) %-12s: CCA @ (%s SB)\n", -+ ((comp & ODM_BB_PRIMARY_CCA) ? -+ ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."), -+ "PriCCA", -+ ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" : -+ ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U"))); -+ RT_PRINT(buf); -+#endif -+#ifdef CONFIG_ADAPTIVE_SOML -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "17.(%s) %-12s: soml_en = %s\n", -+ ((comp & ODM_BB_ADAPTIVE_SOML) ? -+ ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."), -+ "A-SOML", -+ (dm->dm_soml_table.soml_last_state == SOML_ON) ? -+ "ON" : "OFF"); -+ RT_PRINT(buf); -+#endif -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "18.(%s) %-12s:\n", -+ ((comp & ODM_BB_LNA_SAT_CHK) ? -+ ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."), -+ "LNA_SAT_CHK"); -+ RT_PRINT(buf); -+#endif -+} -+ -+void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track; -+ struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info_win_bkp; -+ struct phydm_phystatus_statistic *dbg_s = &dbg->physts_statistic_info; -+ struct phydm_phystatus_avg *dbg_avg = &dbg->phystatus_statistic_avg; -+ -+ char *rate_type = NULL; -+ u8 tmp_rssi_avg[4]; -+ u8 tmp_snr_avg[4]; -+ u8 tmp_evm_avg[4]; -+ u32 tmp_cnt = 0; -+ u8 macid, target_macid = 0; -+ u8 i = 0; -+ u8 rate_num = dm->num_rf_path; -+ u8 ss_ofst = 0; -+ struct cmn_sta_info *entry = NULL; -+ char dbg_buf[PHYDM_SNPRINT_SIZE] = {0}; -+ -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n PHYDM Common Dbg Msg --------->"); -+ RT_PRINT(buf); -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n System up time=%d", dm->phydm_sys_up_time); -+ RT_PRINT(buf); -+ -+ if (dm->is_linked) { -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n ID=((%d)), BW=((%d)), fc=((CH-%d))", -+ dm->curr_station_id, 20 << *dm->band_width, *dm->channel); -+ RT_PRINT(buf); -+ -+ if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) && -+ (dm->support_ic_type & ODM_IC_11N_SERIES)) { -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Primary CCA at ((%s SB))", -+ (*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" : "L"); -+ RT_PRINT(buf); -+ } -+ -+ if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) { -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}", -+ dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1], -+ dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]); -+ RT_PRINT(buf); -+ } else { -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}", -+ dm->cck_lna_idx, dm->cck_vga_idx); -+ RT_PRINT(buf); -+ } -+ -+ phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE); -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)", -+ (dm->rssi_a == 0xff) ? 0 : dm->rssi_a, -+ (dm->rssi_b == 0xff) ? 0 : dm->rssi_b, -+ (dm->rssi_c == 0xff) ? 0 : dm->rssi_c, -+ (dm->rssi_d == 0xff) ? 0 : dm->rssi_d, -+ dbg_buf, dm->rx_rate); -+ RT_PRINT(buf); -+ -+ phydm_print_rate_2_buff(dm, dm->phy_dbg_info.beacon_phy_rate, dbg_buf, PHYDM_SNPRINT_SIZE); -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Beacon_cnt=%d, rate_idx:%s (0x%x)", -+ dm->phy_dbg_info.beacon_cnt_in_period, -+ dbg_buf, -+ dm->phy_dbg_info.beacon_phy_rate); -+ RT_PRINT(buf); -+ -+ /*Show phydm_rx_rate_distribution;*/ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [RxRate Cnt] =============>"); -+ RT_PRINT(buf); -+ -+ /*@======CCK=================================================*/ -+ if (*dm->channel <= 14) { -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * CCK = {%d, %d, %d, %d}", -+ dbg->num_qry_legacy_pkt[0], dbg->num_qry_legacy_pkt[1], -+ dbg->num_qry_legacy_pkt[2], dbg->num_qry_legacy_pkt[3]); -+ RT_PRINT(buf); -+ } -+ /*@======OFDM================================================*/ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}", -+ dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5], -+ dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7], -+ dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9], -+ dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]); -+ RT_PRINT(buf); -+ -+ /*@======HT==================================================*/ -+ if (dbg->ht_pkt_not_zero) { -+ for (i = 0; i < rate_num; i++) { -+ ss_ofst = (i << 3); -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}", -+ (ss_ofst), (ss_ofst + 7), -+ dbg->num_qry_ht_pkt[ss_ofst + 0], dbg->num_qry_ht_pkt[ss_ofst + 1], -+ dbg->num_qry_ht_pkt[ss_ofst + 2], dbg->num_qry_ht_pkt[ss_ofst + 3], -+ dbg->num_qry_ht_pkt[ss_ofst + 4], dbg->num_qry_ht_pkt[ss_ofst + 5], -+ dbg->num_qry_ht_pkt[ss_ofst + 6], dbg->num_qry_ht_pkt[ss_ofst + 7]); -+ RT_PRINT(buf); -+ } -+ -+ if (dbg->low_bw_20_occur) { -+ for (i = 0; i < rate_num; i++) { -+ ss_ofst = (i << 3); -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}", -+ (ss_ofst), (ss_ofst + 7), -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7]); -+ RT_PRINT(buf); -+ } -+ } -+ } -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ /*@======VHT=================================================*/ -+ if (dbg->vht_pkt_not_zero) { -+ for (i = 0; i < rate_num; i++) { -+ ss_ofst = 10 * i; -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}", -+ (i + 1), -+ dbg->num_qry_vht_pkt[ss_ofst + 0], dbg->num_qry_vht_pkt[ss_ofst + 1], -+ dbg->num_qry_vht_pkt[ss_ofst + 2], dbg->num_qry_vht_pkt[ss_ofst + 3], -+ dbg->num_qry_vht_pkt[ss_ofst + 4], dbg->num_qry_vht_pkt[ss_ofst + 5], -+ dbg->num_qry_vht_pkt[ss_ofst + 6], dbg->num_qry_vht_pkt[ss_ofst + 7], -+ dbg->num_qry_vht_pkt[ss_ofst + 8], dbg->num_qry_vht_pkt[ss_ofst + 9]); -+ RT_PRINT(buf); -+ } -+ -+ if (dbg->low_bw_20_occur) { -+ for (i = 0; i < rate_num; i++) { -+ ss_ofst = 10 * i; -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}", -+ (i + 1), -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 8], dbg->num_qry_pkt_sc_20m[ss_ofst + 9]); -+ RT_PRINT(buf); -+ } -+ } -+ -+ if (dbg->low_bw_40_occur) { -+ for (i = 0; i < rate_num; i++) { -+ ss_ofst = 10 * i; -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}", -+ (i + 1), -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 0], dbg->num_qry_pkt_sc_40m[ss_ofst + 1], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 2], dbg->num_qry_pkt_sc_40m[ss_ofst + 3], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 4], dbg->num_qry_pkt_sc_40m[ss_ofst + 5], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 6], dbg->num_qry_pkt_sc_40m[ss_ofst + 7], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 8], dbg->num_qry_pkt_sc_40m[ss_ofst + 9]); -+ RT_PRINT(buf); -+ } -+ } -+ } -+#endif -+ -+ //1 Show phydm_avg_phystatus_val -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n [Avg PHY Statistic] ==============>\n"); -+ RT_PRINT(buf); -+ -+ /*===[Beacon]===*/ -+ switch (dm->num_rf_path) { -+#if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case 4: -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0], -+ dbg_avg->rssi_beacon_avg[1], -+ dbg_avg->rssi_beacon_avg[2], -+ dbg_avg->rssi_beacon_avg[3]); -+ break; -+#endif -+#if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case 3: -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0], -+ dbg_avg->rssi_beacon_avg[1], -+ dbg_avg->rssi_beacon_avg[2]); -+ break; -+#endif -+#if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case 2: -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0], -+ dbg_avg->rssi_beacon_avg[1]); -+ break; -+#endif -+ default: -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0]); -+ break; -+ } -+ RT_PRINT(buf); -+ -+ /*===[CCK]===*/ -+ switch (dm->num_rf_path) { -+#ifdef PHYSTS_3RD_TYPE_SUPPORT -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case 4: -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, -+ dbg_avg->rssi_cck_avg, -+ dbg_avg->rssi_cck_avg_abv_2ss[0], -+ dbg_avg->rssi_cck_avg_abv_2ss[1], -+ dbg_avg->rssi_cck_avg_abv_2ss[2]); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case 3: -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, -+ dbg_avg->rssi_cck_avg, -+ dbg_avg->rssi_cck_avg_abv_2ss[0], -+ dbg_avg->rssi_cck_avg_abv_2ss[1]); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case 2: -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, -+ dbg_avg->rssi_cck_avg, -+ dbg_avg->rssi_cck_avg_abv_2ss[0]); -+ break; -+ #endif -+#endif -+ default: -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, -+ dbg_avg->rssi_cck_avg); -+ break; -+ } -+ RT_PRINT(buf); -+ -+ for (i = 0; i <= 4; i++) { -+ if (i > dm->num_rf_path) -+ break; -+ -+ odm_memory_set(dm, tmp_rssi_avg, 0, 4); -+ odm_memory_set(dm, tmp_snr_avg, 0, 4); -+ odm_memory_set(dm, tmp_evm_avg, 0, 4); -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ if (i == 4) { -+ rate_type = "[4-SS]"; -+ tmp_cnt = dbg_s->rssi_4ss_cnt; -+ odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_4ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_4ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg, 4); -+ } else -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ if (i == 3) { -+ rate_type = "[3-SS]"; -+ tmp_cnt = dbg_s->rssi_3ss_cnt; -+ odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_3ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_3ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_3ss_avg, 3); -+ } else -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (i == 2) { -+ rate_type = "[2-SS]"; -+ tmp_cnt = dbg_s->rssi_2ss_cnt; -+ odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_2ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_2ss_avg, 2); -+ } else -+ #endif -+ if (i == 1) { -+ rate_type = "[1-SS]"; -+ tmp_cnt = dbg_s->rssi_1ss_cnt; -+ odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_1ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_1ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_1ss_avg, 1); -+ } else { -+ rate_type = "[L-OFDM]"; -+ tmp_cnt = dbg_s->rssi_ofdm_cnt; -+ odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_ofdm_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_ofdm_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_ofdm_avg, 1); -+ } -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n", -+ rate_type, tmp_cnt, -+ tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], tmp_rssi_avg[3], -+ tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2], tmp_snr_avg[3], -+ tmp_evm_avg[0], tmp_evm_avg[1], tmp_evm_avg[2], tmp_evm_avg[3]); -+ RT_PRINT(buf); -+ } -+ /*@----------------------------------------------------------*/ -+ -+ /*Print TX rate*/ -+ for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { -+ entry = dm->phydm_sta_info[macid]; -+ -+ if (is_sta_active(entry)) { -+ phydm_print_rate_2_buff(dm, entry->ra_info.curr_tx_rate, dbg_buf, PHYDM_SNPRINT_SIZE); -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n TxRate[%d]=%s (0x%x)", macid, dbg_buf, entry->ra_info.curr_tx_rate); -+ RT_PRINT(buf); -+ target_macid = macid; -+ break; -+ } -+ } -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))", -+ dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load); -+ RT_PRINT(buf); -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n CFO_avg=((%d kHz)), CFO_traking = ((%s%d))", -+ cfo_t->CFO_ave_pre, -+ ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"), -+ DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap)); -+ RT_PRINT(buf); -+ -+ /* @Condition number */ -+ #if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Condi_Num=((%d.%.4d))", -+ dm->phy_dbg_info.condi_num >> 4, -+ phydm_show_fraction_num(dm->phy_dbg_info.condi_num & 0xf, 4)); -+ RT_PRINT(buf); -+ } -+ #endif -+ -+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT)) -+ /*STBC or LDPC pkt*/ -+ if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC | -+ PHYSTS_3RD_TYPE_IC)) -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Coding: LDPC=((%s)), STBC=((%s))", -+ (dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N", -+ (dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N"); -+ RT_PRINT(buf); -+#endif -+ -+ } else { -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n No Link !!!"); -+ RT_PRINT(buf); -+ } -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}", -+ fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all); -+ RT_PRINT(buf); -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}", -+ fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all); -+ RT_PRINT(buf); -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n [OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d", -+ fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal, -+ fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail); -+ RT_PRINT(buf); -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [HT FA] CRC8=%d, MCS=%d", -+ fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail); -+ RT_PRINT(buf); -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) { -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n [VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d", -+ fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb, -+ fa_t->cnt_mcs_fail_vht); -+ RT_PRINT(buf); -+ } -+#endif -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n [CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}", -+ fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok, -+ fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok, -+ fa_t->cnt_crc32_ok_all); -+ RT_PRINT(buf); -+ -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n [CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}", -+ fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error, -+ fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error, -+ fa_t->cnt_crc32_error_all); -+ RT_PRINT(buf); -+ -+ if (fa_t->ofdm2_rate_idx) { -+ phydm_print_rate_2_buff(dm, fa_t->ofdm2_rate_idx, -+ dbg_buf, PHYDM_SNPRINT_SIZE); -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n [OFDM:%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)", -+ dbg_buf, fa_t->cnt_ofdm2_crc32_error, -+ fa_t->cnt_ofdm2_crc32_ok, fa_t->ofdm2_pcr); -+ RT_PRINT(buf); -+ } -+ -+ if (fa_t->ht2_rate_idx) { -+ phydm_print_rate_2_buff(dm, fa_t->ht2_rate_idx, dbg_buf, -+ PHYDM_SNPRINT_SIZE); -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n [HT :%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)", -+ dbg_buf, fa_t->cnt_ht2_crc32_error, -+ fa_t->cnt_ht2_crc32_ok, fa_t->ht2_pcr); -+ RT_PRINT(buf); -+ } -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) { -+ if (fa_t->vht2_rate_idx) { -+ phydm_print_rate_2_buff(dm, fa_t->vht2_rate_idx, -+ dbg_buf, PHYDM_SNPRINT_SIZE); -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n [VHT :%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)", -+ dbg_buf, fa_t->cnt_vht2_crc32_error, -+ fa_t->cnt_vht2_crc32_ok, fa_t->vht2_pcr); -+ RT_PRINT(buf); -+ } -+ } -+#endif -+ -+ if (dm->support_ic_type & (ODM_IC_11N_SERIES | ODM_IC_11AC_SERIES)) -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n", -+ dm->is_linked, dm->number_linked_client, dm->rssi_min, -+ dm->dm_dig_table.cur_ig_value, dm->noisy_decision); -+ else -+ RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, -+ "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x\n", -+ dm->is_linked, dm->number_linked_client, dm->rssi_min, -+ dm->dm_dig_table.cur_ig_value); -+ -+ RT_PRINT(buf); -+ -+ phydm_dm_summary_cli_win(dm, buf, target_macid); -+} -+ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+void phydm_sbd_check( -+ struct dm_struct *dm) -+{ -+ static u32 pkt_cnt; -+ static boolean sbd_state; -+ u32 sym_count, count, value32; -+ -+ if (sbd_state == 0) { -+ pkt_cnt++; -+ /*read SBD conter once every 5 packets*/ -+ if (pkt_cnt % 5 == 0) { -+ odm_set_timer(dm, &dm->sbdcnt_timer, 0); /*@ms*/ -+ sbd_state = 1; -+ } -+ } else { /*read counter*/ -+ value32 = odm_get_bb_reg(dm, R_0xf98, MASKDWORD); -+ sym_count = (value32 & 0x7C000000) >> 26; -+ count = (value32 & 0x3F00000) >> 20; -+ pr_debug("#SBD# sym_count %d count %d\n", sym_count, count); -+ sbd_state = 0; -+ } -+} -+#endif -+ -+void phydm_sbd_callback( -+ struct phydm_timer_list *timer) -+{ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+ void *adapter = timer->Adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+#if USE_WORKITEM -+ odm_schedule_work_item(&dm->sbdcnt_workitem); -+#else -+ phydm_sbd_check(dm); -+#endif -+#endif -+} -+ -+void phydm_sbd_workitem_callback( -+ void *context) -+{ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+ phydm_sbd_check(dm); -+#endif -+} -+#endif -+ -+void phydm_reset_rx_rate_distribution(struct dm_struct *dm) -+{ -+ struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; -+ -+ odm_memory_set(dm, &dbg->num_qry_legacy_pkt[0], 0, -+ (LEGACY_RATE_NUM * 2)); -+ odm_memory_set(dm, &dbg->num_qry_ht_pkt[0], 0, -+ (HT_RATE_NUM * 2)); -+ odm_memory_set(dm, &dbg->num_qry_pkt_sc_20m[0], 0, -+ (LOW_BW_RATE_NUM * 2)); -+ -+ dbg->ht_pkt_not_zero = false; -+ dbg->low_bw_20_occur = false; -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ odm_memory_set(dm, &dbg->num_qry_vht_pkt[0], 0, VHT_RATE_NUM * 2); -+ odm_memory_set(dm, &dbg->num_qry_pkt_sc_40m[0], 0, LOW_BW_RATE_NUM * 2); -+ #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) || (defined(PHYSTS_3RD_TYPE_SUPPORT)) -+ odm_memory_set(dm, &dbg->num_mu_vht_pkt[0], 0, VHT_RATE_NUM * 2); -+ #endif -+ dbg->vht_pkt_not_zero = false; -+ dbg->low_bw_40_occur = false; -+#endif -+} -+ -+void phydm_rx_rate_distribution(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; -+ u8 i = 0; -+ u8 rate_num = dm->num_rf_path, ss_ofst = 0; -+ -+ PHYDM_DBG(dm, DBG_CMN, "[RxRate Cnt] =============>\n"); -+ -+ /*@======CCK=========================================================*/ -+ if (*dm->channel <= 14) { -+ PHYDM_DBG(dm, DBG_CMN, "* CCK = {%d, %d, %d, %d}\n", -+ dbg->num_qry_legacy_pkt[0], -+ dbg->num_qry_legacy_pkt[1], -+ dbg->num_qry_legacy_pkt[2], -+ dbg->num_qry_legacy_pkt[3]); -+ } -+ /*@======OFDM========================================================*/ -+ PHYDM_DBG(dm, DBG_CMN, "* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5], -+ dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7], -+ dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9], -+ dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]); -+ -+ /*@======HT==========================================================*/ -+ if (dbg->ht_pkt_not_zero) { -+ for (i = 0; i < rate_num; i++) { -+ ss_ofst = (i << 3); -+ -+ PHYDM_DBG(dm, DBG_CMN, -+ "* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (ss_ofst), (ss_ofst + 7), -+ dbg->num_qry_ht_pkt[ss_ofst + 0], -+ dbg->num_qry_ht_pkt[ss_ofst + 1], -+ dbg->num_qry_ht_pkt[ss_ofst + 2], -+ dbg->num_qry_ht_pkt[ss_ofst + 3], -+ dbg->num_qry_ht_pkt[ss_ofst + 4], -+ dbg->num_qry_ht_pkt[ss_ofst + 5], -+ dbg->num_qry_ht_pkt[ss_ofst + 6], -+ dbg->num_qry_ht_pkt[ss_ofst + 7]); -+ } -+ -+ if (dbg->low_bw_20_occur) { -+ for (i = 0; i < rate_num; i++) { -+ ss_ofst = (i << 3); -+ -+ PHYDM_DBG(dm, DBG_CMN, -+ "* [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (ss_ofst), (ss_ofst + 7), -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 0], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 1], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 2], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 3], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 4], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 5], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 6], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 7]); -+ } -+ } -+ } -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ /*@======VHT==========================================================*/ -+ if (dbg->vht_pkt_not_zero) { -+ for (i = 0; i < rate_num; i++) { -+ ss_ofst = 10 * i; -+ -+ PHYDM_DBG(dm, DBG_CMN, -+ "* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (i + 1), -+ dbg->num_qry_vht_pkt[ss_ofst + 0], -+ dbg->num_qry_vht_pkt[ss_ofst + 1], -+ dbg->num_qry_vht_pkt[ss_ofst + 2], -+ dbg->num_qry_vht_pkt[ss_ofst + 3], -+ dbg->num_qry_vht_pkt[ss_ofst + 4], -+ dbg->num_qry_vht_pkt[ss_ofst + 5], -+ dbg->num_qry_vht_pkt[ss_ofst + 6], -+ dbg->num_qry_vht_pkt[ss_ofst + 7], -+ dbg->num_qry_vht_pkt[ss_ofst + 8], -+ dbg->num_qry_vht_pkt[ss_ofst + 9]); -+ } -+ -+ if (dbg->low_bw_20_occur) { -+ for (i = 0; i < rate_num; i++) { -+ ss_ofst = 10 * i; -+ -+ PHYDM_DBG(dm, DBG_CMN, -+ "*[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (i + 1), -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 0], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 1], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 2], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 3], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 4], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 5], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 6], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 7], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 8], -+ dbg->num_qry_pkt_sc_20m[ss_ofst + 9]); -+ } -+ } -+ -+ if (dbg->low_bw_40_occur) { -+ for (i = 0; i < rate_num; i++) { -+ ss_ofst = 10 * i; -+ -+ PHYDM_DBG(dm, DBG_CMN, -+ "*[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (i + 1), -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 0], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 1], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 2], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 3], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 4], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 5], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 6], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 7], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 8], -+ dbg->num_qry_pkt_sc_40m[ss_ofst + 9]); -+ } -+ } -+ } -+#endif -+} -+ -+u16 phydm_rx_utility(void *dm_void, u16 avg_phy_rate, u8 rx_max_ss, -+ enum channel_width bw) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; -+ u16 utility_primitive = 0, utility = 0; -+ -+ if (dbg->ht_pkt_not_zero) { -+ /*@ MCS7 20M: tp = 65, 1000/65 = 15.38, 65*15.5 = 1007*/ -+ utility_primitive = avg_phy_rate * 15 + (avg_phy_rate >> 1); -+ } -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ else if (dbg->vht_pkt_not_zero) { -+ /*@ VHT 1SS MCS9(fake) 20M: tp = 90, 1000/90 = 11.11, 65*11.125 = 1001*/ -+ utility_primitive = avg_phy_rate * 11 + (avg_phy_rate >> 3); -+ } -+#endif -+ else { -+ /*@ 54M, 1000/54 = 18.5, 54*18.5 = 999*/ -+ utility_primitive = avg_phy_rate * 18 + (avg_phy_rate >> 1); -+ } -+ -+ utility = (utility_primitive / rx_max_ss) >> bw; -+ -+ if (utility > 1000) -+ utility = 1000; -+ -+ return utility; -+} -+ -+u16 phydm_rx_avg_phy_rate(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; -+ u8 i = 0, rate_num = 0, rate_base = 0; -+ u16 rate = 0, avg_phy_rate = 0; -+ u32 pkt_cnt = 0, phy_rate_sum = 0; -+ -+ if (dbg->ht_pkt_not_zero) { -+ rate_num = HT_RATE_NUM; -+ rate_base = ODM_RATEMCS0; -+ for (i = 0; i < rate_num; i++) { -+ rate = phy_rate_table[i + rate_base] << *dm->band_width; -+ phy_rate_sum += dbg->num_qry_ht_pkt[i] * rate; -+ pkt_cnt += dbg->num_qry_ht_pkt[i]; -+ } -+ } -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ else if (dbg->vht_pkt_not_zero) { -+ rate_num = VHT_RATE_NUM; -+ rate_base = ODM_RATEVHTSS1MCS0; -+ for (i = 0; i < rate_num; i++) { -+ rate = phy_rate_table[i + rate_base] << *dm->band_width; -+ phy_rate_sum += dbg->num_qry_vht_pkt[i] * rate; -+ pkt_cnt += dbg->num_qry_vht_pkt[i]; -+ } -+ } -+#endif -+ else { -+ for (i = ODM_RATE1M; i <= ODM_RATE54M; i++) { -+ /*SKIP 1M & 6M for beacon case*/ -+ if (*dm->channel < 36 && i == ODM_RATE1M) -+ continue; -+ -+ if (*dm->channel >= 36 && i == ODM_RATE6M) -+ continue; -+ -+ rate = phy_rate_table[i]; -+ phy_rate_sum += dbg->num_qry_legacy_pkt[i] * rate; -+ pkt_cnt += dbg->num_qry_legacy_pkt[i]; -+ } -+ } -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ if (dbg->low_bw_40_occur) { -+ for (i = 0; i < LOW_BW_RATE_NUM; i++) { -+ rate = phy_rate_table[i + rate_base] -+ << CHANNEL_WIDTH_40; -+ phy_rate_sum += dbg->num_qry_pkt_sc_40m[i] * rate; -+ pkt_cnt += dbg->num_qry_pkt_sc_40m[i]; -+ } -+ } -+#endif -+ -+ if (dbg->low_bw_20_occur) { -+ for (i = 0; i < LOW_BW_RATE_NUM; i++) { -+ rate = phy_rate_table[i + rate_base]; -+ phy_rate_sum += dbg->num_qry_pkt_sc_20m[i] * rate; -+ pkt_cnt += dbg->num_qry_pkt_sc_20m[i]; -+ } -+ } -+ -+ avg_phy_rate = (pkt_cnt == 0) ? 0 : (u16)(phy_rate_sum / pkt_cnt); -+ -+ return avg_phy_rate; -+} -+ -+void phydm_print_hist_2_buf(void *dm_void, u16 *val, u16 len, char *buf, -+ u16 buf_size) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (len == PHY_HIST_SIZE) { -+ PHYDM_SNPRINTF(buf, buf_size, -+ "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]", -+ val[0], val[1], val[2], val[3], val[4], -+ val[5], val[6], val[7], val[8], val[9], -+ val[10], val[11]); -+ } else if (len == (PHY_HIST_SIZE - 1)) { -+ PHYDM_SNPRINTF(buf, buf_size, -+ "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]", -+ val[0], val[1], val[2], val[3], val[4], -+ val[5], val[6], val[7], val[8], val[9], -+ val[10]); -+ } -+} -+ -+void phydm_nss_hitogram(void *dm_void, enum PDM_RATE_TYPE rate_type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; -+ char buf[PHYDM_SNPRINT_SIZE] = {0}; -+ u16 buf_size = PHYDM_SNPRINT_SIZE; -+ u16 h_size = PHY_HIST_SIZE; -+ u16 *evm_hist = &dbg_s->evm_1ss_hist[0]; -+ u16 *snr_hist = &dbg_s->snr_1ss_hist[0]; -+ u8 i = 0; -+ u8 ss = phydm_rate_type_2_num_ss(dm, rate_type); -+ -+ for (i = 0; i < ss; i++) { -+ if (rate_type == PDM_1SS) { -+ evm_hist = &dbg_s->evm_1ss_hist[0]; -+ snr_hist = &dbg_s->snr_1ss_hist[0]; -+ } else if (rate_type == PDM_2SS) { -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ evm_hist = &dbg_s->evm_2ss_hist[i][0]; -+ snr_hist = &dbg_s->snr_2ss_hist[i][0]; -+ #endif -+ } else if (rate_type == PDM_3SS) { -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ evm_hist = &dbg_s->evm_3ss_hist[i][0]; -+ snr_hist = &dbg_s->snr_3ss_hist[i][0]; -+ #endif -+ } else if (rate_type == PDM_4SS) { -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ evm_hist = &dbg_s->evm_4ss_hist[i][0]; -+ snr_hist = &dbg_s->snr_4ss_hist[i][0]; -+ #endif -+ } -+ -+ phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size); -+ PHYDM_DBG(dm, DBG_CMN, "[%d-SS][EVM][%d]=%s\n", ss, i, buf); -+ phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size); -+ PHYDM_DBG(dm, DBG_CMN, "[%d-SS][SNR][%d]=%s\n", ss, i, buf); -+ } -+} -+ -+#ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+void phydm_show_cn_hitogram(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; -+ u16 th_tmp[PHY_HIST_TH_SIZE]; -+ char buf[PHYDM_SNPRINT_SIZE] = {0}; -+ u8 i = 0; -+ u16 *cn_hist = NULL; -+ u32 cn_avg = 0; -+ -+ if (!dm->pkt_proc_struct.physts_auto_swch_en) -+ return; -+ -+ if (dm->num_rf_path == 1) -+ return; -+ -+ PHYDM_DBG(dm, DBG_CMN, "[Condition number Histogram] ========>\n"); -+/*@===[Threshold]=============================================================*/ -+ for (i = 0; i < PHY_HIST_TH_SIZE; i++) -+ th_tmp[i] = dbg_i->cn_hist_th[i] >> 1; -+ -+ phydm_print_hist_2_buf(dm, th_tmp, -+ PHY_HIST_TH_SIZE, buf, PHYDM_SNPRINT_SIZE); -+ PHYDM_DBG(dm, DBG_CMN, "%-24s=%s\n", "[CN_TH]", buf); -+ -+/*@===[Histogram]=============================================================*/ -+ -+ for (i = 1; i <= dm->num_rf_path; i++) { -+ if (dbg_s->p4_cnt[i] == 0) -+ continue; -+ -+ cn_avg = PHYDM_DIV((dbg_s->cn_sum[i] + -+ (dbg_s->p4_cnt[i] >> 1)) << 2, -+ dbg_s->p4_cnt[i]); /*u(8,1)<<2 -> u(10,3)*/ -+ -+ cn_hist = &dbg_s->cn_hist[i][0]; -+ phydm_print_hist_2_buf(dm, cn_hist, -+ PHY_HIST_SIZE, buf, PHYDM_SNPRINT_SIZE); -+ PHYDM_DBG(dm, DBG_CMN, "[%d-SS]%s=(avg:%d.%4d)%s\n", -+ i + 1, "[CN]", cn_avg >> 3, -+ phydm_show_fraction_num(cn_avg & 0x7, 3), buf); -+ } -+} -+#endif -+ -+void phydm_show_phy_hitogram(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; -+ char buf[PHYDM_SNPRINT_SIZE] = {0}; -+ u16 buf_size = PHYDM_SNPRINT_SIZE; -+ u16 th_size = PHY_HIST_SIZE - 1; -+ u8 i = 0; -+ -+ PHYDM_DBG(dm, DBG_CMN, "[PHY Histogram] ==============>\n"); -+/*@===[Threshold]=============================================================*/ -+ phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size); -+ PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[EVM_TH]", buf); -+ -+ phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size); -+ PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[SNR_TH]", buf); -+/*@===[OFDM]==================================================================*/ -+ if (dbg_s->rssi_ofdm_cnt) { -+ phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE, -+ buf, buf_size); -+ PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][EVM]", buf); -+ -+ phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE, -+ buf, buf_size); -+ PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][SNR]", buf); -+ } -+/*@===[1-SS]==================================================================*/ -+ if (dbg_s->rssi_1ss_cnt) -+ phydm_nss_hitogram(dm, PDM_1SS); -+/*@===[2-SS]==================================================================*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if ((dm->support_ic_type & PHYDM_IC_ABOVE_2SS) && dbg_s->rssi_2ss_cnt) -+ phydm_nss_hitogram(dm, PDM_2SS); -+ #endif -+/*@===[3-SS]==================================================================*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ if ((dm->support_ic_type & PHYDM_IC_ABOVE_3SS) && dbg_s->rssi_3ss_cnt) -+ phydm_nss_hitogram(dm, PDM_3SS); -+ #endif -+/*@===[4-SS]==================================================================*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS && dbg_s->rssi_4ss_cnt) -+ phydm_nss_hitogram(dm, PDM_4SS); -+ #endif -+} -+ -+void phydm_avg_phy_val_nss(void *dm_void, u8 nss) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; -+ struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg; -+ char *rate_type = NULL; -+ u32 *tmp_cnt = NULL; -+ u8 *tmp_rssi_avg = NULL; -+ u32 *tmp_rssi_sum = NULL; -+ u8 *tmp_snr_avg = NULL; -+ u32 *tmp_snr_sum = NULL; -+ u8 *tmp_evm_avg = NULL; -+ u32 *tmp_evm_sum = NULL; -+ u8 evm_rpt_show[RF_PATH_MEM_SIZE]; -+ u8 i = 0; -+ -+ odm_memory_set(dm, &evm_rpt_show[0], 0, RF_PATH_MEM_SIZE); -+ -+ switch (nss) { -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case 4: -+ rate_type = "[4-SS]"; -+ tmp_cnt = &dbg_s->rssi_4ss_cnt; -+ tmp_rssi_avg = &dbg_avg->rssi_4ss_avg[0]; -+ tmp_snr_avg = &dbg_avg->snr_4ss_avg[0]; -+ tmp_rssi_sum = &dbg_s->rssi_4ss_sum[0]; -+ tmp_snr_sum = &dbg_s->snr_4ss_sum[0]; -+ tmp_evm_avg = &dbg_avg->evm_4ss_avg[0]; -+ tmp_evm_sum = &dbg_s->evm_4ss_sum[0]; -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case 3: -+ rate_type = "[3-SS]"; -+ tmp_cnt = &dbg_s->rssi_3ss_cnt; -+ tmp_rssi_avg = &dbg_avg->rssi_3ss_avg[0]; -+ tmp_snr_avg = &dbg_avg->snr_3ss_avg[0]; -+ tmp_rssi_sum = &dbg_s->rssi_3ss_sum[0]; -+ tmp_snr_sum = &dbg_s->snr_3ss_sum[0]; -+ tmp_evm_avg = &dbg_avg->evm_3ss_avg[0]; -+ tmp_evm_sum = &dbg_s->evm_3ss_sum[0]; -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case 2: -+ rate_type = "[2-SS]"; -+ tmp_cnt = &dbg_s->rssi_2ss_cnt; -+ tmp_rssi_avg = &dbg_avg->rssi_2ss_avg[0]; -+ tmp_snr_avg = &dbg_avg->snr_2ss_avg[0]; -+ tmp_rssi_sum = &dbg_s->rssi_2ss_sum[0]; -+ tmp_snr_sum = &dbg_s->snr_2ss_sum[0]; -+ tmp_evm_avg = &dbg_avg->evm_2ss_avg[0]; -+ tmp_evm_sum = &dbg_s->evm_2ss_sum[0]; -+ break; -+ #endif -+ case 1: -+ rate_type = "[1-SS]"; -+ tmp_cnt = &dbg_s->rssi_1ss_cnt; -+ tmp_rssi_avg = &dbg_avg->rssi_1ss_avg[0]; -+ tmp_snr_avg = &dbg_avg->snr_1ss_avg[0]; -+ tmp_rssi_sum = &dbg_s->rssi_1ss_sum[0]; -+ tmp_snr_sum = &dbg_s->snr_1ss_sum[0]; -+ tmp_evm_avg = &dbg_avg->evm_1ss_avg; -+ tmp_evm_sum = &dbg_s->evm_1ss_sum; -+ break; -+ case 0: -+ rate_type = "[L-OFDM]"; -+ tmp_cnt = &dbg_s->rssi_ofdm_cnt; -+ tmp_rssi_avg = &dbg_avg->rssi_ofdm_avg[0]; -+ tmp_snr_avg = &dbg_avg->snr_ofdm_avg[0]; -+ tmp_rssi_sum = &dbg_s->rssi_ofdm_sum[0]; -+ tmp_snr_sum = &dbg_s->snr_ofdm_sum[0]; -+ tmp_evm_avg = &dbg_avg->evm_ofdm_avg; -+ tmp_evm_sum = &dbg_s->evm_ofdm_sum; -+ break; -+ default: -+ PHYDM_DBG(dm, DBG_CMN, "[warning] %s\n", __func__); -+ return; -+ } -+ -+ if (*tmp_cnt != 0) { -+ for (i = 0; i < dm->num_rf_path; i++) { -+ tmp_rssi_avg[i] = (u8)(tmp_rssi_sum[i] / *tmp_cnt); -+ tmp_snr_avg[i] = (u8)(tmp_snr_sum[i] / *tmp_cnt); -+ } -+ -+ if (nss == 0 || nss == 1) { -+ *tmp_evm_avg = (u8)(*tmp_evm_sum / *tmp_cnt); -+ evm_rpt_show[0] = *tmp_evm_avg; -+ } else { -+ for (i = 0; i < nss; i++) { -+ tmp_evm_avg[i] = (u8)(tmp_evm_sum[i] / -+ *tmp_cnt); -+ evm_rpt_show[i] = tmp_evm_avg[i]; -+ } -+ } -+ } -+ -+#if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ PHYDM_DBG(dm, DBG_CMN, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n", -+ rate_type, *tmp_cnt, -+ tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], -+ tmp_rssi_avg[3], tmp_snr_avg[0], tmp_snr_avg[1], -+ tmp_snr_avg[2], tmp_snr_avg[3], evm_rpt_show[0], -+ evm_rpt_show[1], evm_rpt_show[2], evm_rpt_show[3]); -+#elif (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ PHYDM_DBG(dm, DBG_CMN, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d}\n", -+ rate_type, *tmp_cnt, -+ tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], -+ tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2], -+ evm_rpt_show[0], evm_rpt_show[1], evm_rpt_show[2]); -+#elif (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ PHYDM_DBG(dm, DBG_CMN, -+ "* %-8s Cnt= ((%.3d)) RSSI:{%.2d, %.2d} SNR:{%.2d, %.2d} EVM:{-%.2d, -%.2d}\n", -+ rate_type, *tmp_cnt, -+ tmp_rssi_avg[0], tmp_rssi_avg[1], -+ tmp_snr_avg[0], tmp_snr_avg[1], -+ evm_rpt_show[0], evm_rpt_show[1]); -+#else -+ PHYDM_DBG(dm, DBG_CMN, -+ "* %-8s Cnt= ((%.3d)) RSSI:{%.2d} SNR:{%.2d} EVM:{-%.2d}\n", -+ rate_type, *tmp_cnt, -+ tmp_rssi_avg[0], tmp_snr_avg[0], evm_rpt_show[0]); -+#endif -+} -+ -+void phydm_get_avg_phystatus_val(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; -+ struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg; -+ u32 avg_tmp = 0; -+ u8 i = 0; -+ -+ PHYDM_DBG(dm, DBG_CMN, "[PHY Avg] ==============>\n"); -+ phydm_reset_phystatus_avg(dm); -+ -+ /*@===[Beacon]===*/ -+ if (dbg_s->rssi_beacon_cnt) { -+ for (i = 0; i < dm->num_rf_path; i++) { -+ avg_tmp = dbg_s->rssi_beacon_sum[i] / -+ dbg_s->rssi_beacon_cnt; -+ dbg_avg->rssi_beacon_avg[i] = (u8)avg_tmp; -+ } -+ } -+ -+ switch (dm->num_rf_path) { -+#if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case 4: -+ PHYDM_DBG(dm, DBG_CMN, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0], -+ dbg_avg->rssi_beacon_avg[1], -+ dbg_avg->rssi_beacon_avg[2], -+ dbg_avg->rssi_beacon_avg[3]); -+ break; -+#endif -+#if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case 3: -+ PHYDM_DBG(dm, DBG_CMN, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0], -+ dbg_avg->rssi_beacon_avg[1], -+ dbg_avg->rssi_beacon_avg[2]); -+ break; -+#endif -+#if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case 2: -+ PHYDM_DBG(dm, DBG_CMN, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0], -+ dbg_avg->rssi_beacon_avg[1]); -+ break; -+#endif -+ default: -+ PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0]); -+ break; -+ } -+ -+ /*@===[CCK]===*/ -+ if (dbg_s->rssi_cck_cnt) { -+ dbg_avg->rssi_cck_avg = (u8)(dbg_s->rssi_cck_sum / -+ dbg_s->rssi_cck_cnt); -+ #if (defined(PHYSTS_3RD_TYPE_SUPPORT) && defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) { -+ for (i = 0; i < dm->num_rf_path - 1; i++) { -+ avg_tmp = dbg_s->rssi_cck_sum_abv_2ss[i] / -+ dbg_s->rssi_cck_cnt; -+ dbg_avg->rssi_cck_avg_abv_2ss[i] = (u8)avg_tmp; -+ } -+ } -+ #endif -+ } -+ -+ switch (dm->num_rf_path) { -+#ifdef PHYSTS_3RD_TYPE_SUPPORT -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case 4: -+ PHYDM_DBG(dm, DBG_CMN, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg, -+ dbg_avg->rssi_cck_avg_abv_2ss[0], -+ dbg_avg->rssi_cck_avg_abv_2ss[1], -+ dbg_avg->rssi_cck_avg_abv_2ss[2]); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case 3: -+ PHYDM_DBG(dm, DBG_CMN, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg, -+ dbg_avg->rssi_cck_avg_abv_2ss[0], -+ dbg_avg->rssi_cck_avg_abv_2ss[1]); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case 2: -+ PHYDM_DBG(dm, DBG_CMN, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg, -+ dbg_avg->rssi_cck_avg_abv_2ss[0]); -+ break; -+ #endif -+#endif -+ default: -+ PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg); -+ break; -+ } -+ -+ for (i = 0; i <= dm->num_rf_path; i++) -+ phydm_avg_phy_val_nss(dm, i); -+} -+ -+void phydm_get_phy_statistic(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[dm->one_entry_macid]; -+ enum channel_width bw; -+ u16 avg_phy_rate = 0; -+ u16 utility = 0; -+ u8 rx_ss = 1; -+ -+ avg_phy_rate = phydm_rx_avg_phy_rate(dm); -+ -+ if (dm->is_one_entry_only && is_sta_active(sta)) { -+ rx_ss = phydm_get_rx_stream_num(dm, sta->mimo_type); -+ bw = sta->bw_mode; -+ utility = phydm_rx_utility(dm, avg_phy_rate, rx_ss, bw); -+ } -+ PHYDM_DBG(dm, DBG_CMN, "Avg_rx_rate = %d, rx_utility=( %d / 1000 )\n", -+ avg_phy_rate, utility); -+ -+ phydm_rx_rate_distribution(dm); -+ phydm_reset_rx_rate_distribution(dm); -+ -+ phydm_show_phy_hitogram(dm); -+ #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ phydm_show_cn_hitogram(dm); -+ #endif -+ phydm_get_avg_phystatus_val(dm); -+ phydm_reset_phystatus_statistic(dm); -+}; -+ -+void phydm_basic_dbg_msg_linked(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track; -+ struct odm_phy_dbg_info *dbg_t = &dm->phy_dbg_info; -+ u16 macid, client_cnt = 0; -+ u8 rate = 0; -+ struct cmn_sta_info *entry = NULL; -+ char dbg_buf[PHYDM_SNPRINT_SIZE] = {0}; -+ struct phydm_cfo_rpt cfo; -+ u8 i = 0; -+ -+ PHYDM_DBG(dm, DBG_CMN, "ID=((%d)), BW=((%d)), fc=((CH-%d))\n", -+ dm->curr_station_id, 20 << *dm->band_width, *dm->channel); -+ -+ #ifdef ODM_IC_11N_SERIES_SUPPORT -+ #ifdef PHYDM_PRIMARY_CCA -+ if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) && -+ (dm->support_ic_type & ODM_IC_11N_SERIES) && -+ (dm->support_ability & ODM_BB_PRIMARY_CCA)) { -+ PHYDM_DBG(dm, DBG_CMN, "Primary CCA at ((%s SB))\n", -+ ((*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" : -+ "L")); -+ } -+ #endif -+ #endif -+ -+ if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) { -+ PHYDM_DBG(dm, DBG_CMN, "[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n", -+ dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1], -+ dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]); -+ } else { -+ PHYDM_DBG(dm, DBG_CMN, "[CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}\n", -+ dm->cck_lna_idx, dm->cck_vga_idx); -+ } -+ -+ phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE); -+ PHYDM_DBG(dm, DBG_CMN, "RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)\n", -+ (dm->rssi_a == 0xff) ? 0 : dm->rssi_a, -+ (dm->rssi_b == 0xff) ? 0 : dm->rssi_b, -+ (dm->rssi_c == 0xff) ? 0 : dm->rssi_c, -+ (dm->rssi_d == 0xff) ? 0 : dm->rssi_d, -+ dbg_buf, dm->rx_rate); -+ -+ rate = dbg_t->beacon_phy_rate; -+ phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE); -+ -+ PHYDM_DBG(dm, DBG_CMN, "Beacon_cnt=%d, rate_idx=%s (0x%x)\n", -+ dbg_t->num_qry_beacon_pkt, dbg_buf, dbg_t->beacon_phy_rate); -+ -+ phydm_get_phy_statistic(dm); -+ -+ PHYDM_DBG(dm, DBG_CMN, -+ "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n", -+ dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80); -+ -+ /*Print TX rate*/ -+ for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { -+ entry = dm->phydm_sta_info[macid]; -+ -+ if (!is_sta_active(entry)) -+ continue; -+ -+ rate = entry->ra_info.curr_tx_rate; -+ phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE); -+ PHYDM_DBG(dm, DBG_CMN, "TxRate[%d]=%s (0x%x)\n", -+ macid, dbg_buf, entry->ra_info.curr_tx_rate); -+ -+ client_cnt++; -+ -+ if (client_cnt >= dm->number_linked_client) -+ break; -+ } -+ -+ PHYDM_DBG(dm, DBG_CMN, -+ "TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n", -+ dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load); -+ -+ PHYDM_DBG(dm, DBG_CMN, "CFO_avg=((%d kHz)), CFO_traking = ((%s%d))\n", -+ cfo_t->CFO_ave_pre, -+ ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"), -+ DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap)); -+ -+ /* @CFO report */ -+ switch (dm->ic_ip_series) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ case PHYDM_IC_JGR3: -+ PHYDM_DBG(dm, DBG_CMN, "cfo_tail = {%d, %d, %d, %d}\n", -+ dbg_t->cfo_tail[0], dbg_t->cfo_tail[1], -+ dbg_t->cfo_tail[2], dbg_t->cfo_tail[3]); -+ break; -+ #endif -+ default: -+ phydm_get_cfo_info(dm, &cfo); -+ for (i = 0; i < dm->num_rf_path; i++) { -+ PHYDM_DBG(dm, DBG_CMN, -+ "CFO[%d] {S, L, Sec, Acq, End} = {%d, %d, %d, %d, %d}\n", -+ i, cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], -+ cfo.cfo_rpt_sec[i], cfo.cfo_rpt_acq[i], -+ cfo.cfo_rpt_end[i]); -+ } -+ break; -+ } -+ -+/* @Condition number */ -+#if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%.4d)), %d\n", -+ dbg_t->condi_num >> 4, -+ phydm_show_fraction_num(dbg_t->condi_num & 0xf, 4), -+ dbg_t->condi_num); -+ } -+#endif -+#ifdef PHYSTS_3RD_TYPE_SUPPORT -+ if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) { -+ PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%4d dB))\n", -+ dbg_t->condi_num >> 1, -+ phydm_show_fraction_num(dbg_t->condi_num & 0x1, 1)); -+ } -+#endif -+ -+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT)) -+ /*STBC or LDPC pkt*/ -+ if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC)) -+ PHYDM_DBG(dm, DBG_CMN, "Coding: LDPC=((%s)), STBC=((%s))\n", -+ (dbg_t->is_ldpc_pkt) ? "Y" : "N", -+ (dbg_t->is_stbc_pkt) ? "Y" : "N"); -+#endif -+ -+#if (RTL8822C_SUPPORT || RTL8723F_SUPPORT) -+ /*Beamformed pkt*/ -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8723F)) -+ PHYDM_DBG(dm, DBG_CMN, "Beamformed=((%s))\n", -+ (dm->is_beamformed) ? "Y" : "N"); -+#endif -+} -+ -+void phydm_dm_summary(void *dm_void, u8 macid) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track; -+ struct cmn_sta_info *sta = NULL; -+ struct ra_sta_info *ra = NULL; -+ struct dtp_info *dtp = NULL; -+ u64 comp = dm->support_ability; -+ u64 pause_comp = dm->pause_ability; -+ -+ if (!(dm->debug_components & DBG_DM_SUMMARY)) -+ return; -+ -+ if (!dm->is_linked) { -+ pr_debug("[%s]No Link !!!\n", __func__); -+ return; -+ } -+ -+ sta = dm->phydm_sta_info[macid]; -+ -+ if (!is_sta_active(sta)) { -+ pr_debug("[Warning] %s invalid STA, macid=%d\n", -+ __func__, macid); -+ return; -+ } -+ -+ ra = &sta->ra_info; -+ dtp = &sta->dtp_stat; -+ pr_debug("[%s]===========>\n", __func__); -+ -+ pr_debug("00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n", -+ ((comp & ODM_BB_DIG) ? -+ ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."), -+ "DIG", -+ dig_t->cur_ig_value, -+ dig_t->rx_gain_range_min, dig_t->rx_gain_range_max, -+ dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]); -+ -+ pr_debug("01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n", -+ ((comp & ODM_BB_RA_MASK) ? -+ ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."), -+ "RaMask", -+ ra->rssi_level, ra->ramask); -+ -+#ifdef CONFIG_DYNAMIC_TX_TWR -+ pr_debug("02.(%s) %-12s: pwr_lv=%d\n", -+ ((comp & ODM_BB_DYNAMIC_TXPWR) ? -+ ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."), -+ "DynTxPwr", -+ dtp->sta_tx_high_power_lvl); -+#endif -+ -+ pr_debug("05.(%s) %-12s: cck_pd_lv=%d\n", -+ ((comp & ODM_BB_CCK_PD) ? -+ ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."), -+ "CCK_PD", dm->dm_cckpd_table.cck_pd_lv); -+ -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ pr_debug("06.(%s) %-12s: div_type=%d, curr_ant=%s\n", -+ ((comp & ODM_BB_ANT_DIV) ? -+ ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."), -+ "ANT_DIV", -+ dm->ant_div_type, -+ (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX"); -+#endif -+ -+#ifdef PHYDM_POWER_TRAINING_SUPPORT -+ pr_debug("08.(%s) %-12s: PT_score=%d, disable_PT=%d\n", -+ ((comp & ODM_BB_PWR_TRAIN) ? -+ ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."), -+ "PwrTrain", -+ dm->pow_train_table.pow_train_score, -+ dm->is_disable_power_training); -+#endif -+ -+#ifdef CONFIG_PHYDM_DFS_MASTER -+ pr_debug("11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n", -+ ((comp & ODM_BB_DFS) ? -+ ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."), -+ "DFS", -+ dm->dfs.dbg_mode, dm->dfs_region_domain); -+#endif -+#ifdef PHYDM_SUPPORT_ADAPTIVITY -+ pr_debug("13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n", -+ ((comp & ODM_BB_ADAPTIVITY) ? -+ ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."), -+ "Adaptivity", -+ dm->adaptivity.th_l2h, dm->adaptivity.th_h2l, -+ dm->false_alm_cnt.edcca_flag); -+#endif -+ pr_debug("14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n", -+ ((comp & ODM_BB_CFO_TRACKING) ? -+ ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."), -+ "CfoTrack", -+ cfo_t->CFO_ave_pre, -+ ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"), -+ DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap)); -+ -+ pr_debug("15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n", -+ ((comp & ODM_BB_ENV_MONITOR) ? -+ ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."), -+ "EnvMntr", -+ dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio); -+ -+#ifdef PHYDM_PRIMARY_CCA -+ pr_debug("16.(%s) %-12s: CCA @ (%s SB)\n", -+ ((comp & ODM_BB_PRIMARY_CCA) ? -+ ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."), -+ "PriCCA", -+ ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" : -+ ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U"))); -+#endif -+#ifdef CONFIG_ADAPTIVE_SOML -+ pr_debug("17.(%s) %-12s: soml_en = %s\n", -+ ((comp & ODM_BB_ADAPTIVE_SOML) ? -+ ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."), -+ "A-SOML", -+ (dm->dm_soml_table.soml_last_state == SOML_ON) ? -+ "ON" : "OFF"); -+#endif -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ pr_debug("18.(%s) %-12s:\n", -+ ((comp & ODM_BB_LNA_SAT_CHK) ? -+ ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."), -+ "LNA_SAT_CHK"); -+#endif -+} -+ -+void phydm_basic_dbg_message(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct odm_phy_dbg_info *dbg_b = &dm->phy_dbg_info_win_bkp; -+ #endif -+ #ifdef NHM_SUPPORT -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ #endif -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ /* backup memory*/ -+ odm_move_memory(dm, dbg_b, dbg, sizeof(struct odm_phy_dbg_info)); -+ #endif -+ -+ if (!(dm->debug_components & DBG_CMN)) { -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ /* reset rx rate distribution*/ -+ phydm_reset_rx_rate_distribution(dm); -+ /* cal & reset avg of rssi/snr/evm*/ -+ phydm_get_avg_phystatus_val(dm); -+ /* reset sum of rssi/snr/evm*/ -+ phydm_reset_phystatus_statistic(dm); -+ #endif -+ return; -+ } -+ -+ if (dm->cmn_dbg_msg_cnt >= dm->cmn_dbg_msg_period) { -+ dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD; -+ } else { -+ dm->cmn_dbg_msg_cnt += PHYDM_WATCH_DOG_PERIOD; -+ return; -+ } -+ -+ PHYDM_DBG(dm, DBG_CMN, "[%s] System up time: ((%d sec))---->\n", -+ __func__, dm->phydm_sys_up_time); -+ -+ if (dm->is_linked) -+ phydm_basic_dbg_msg_linked(dm); -+ else -+ PHYDM_DBG(dm, DBG_CMN, "No Link !!!\n"); -+ -+ PHYDM_DBG(dm, DBG_CMN, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", -+ fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all); -+ PHYDM_DBG(dm, DBG_CMN, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", -+ fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all); -+ PHYDM_DBG(dm, DBG_CMN, -+ "[OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d\n", -+ fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal, -+ fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail); -+ PHYDM_DBG(dm, DBG_CMN, "[HT FA] CRC8=%d, MCS=%d\n", -+ fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail); -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) { -+ PHYDM_DBG(dm, DBG_CMN, -+ "[VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d\n", -+ fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb, -+ fa_t->cnt_mcs_fail_vht); -+ } -+#endif -+ PHYDM_DBG(dm, DBG_CMN, -+ "[CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n", -+ fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok, -+ fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok, -+ fa_t->cnt_crc32_ok_all); -+ PHYDM_DBG(dm, DBG_CMN, -+ "[CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n", -+ fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error, -+ fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error, -+ fa_t->cnt_crc32_error_all); -+ -+ if (dm->support_ic_type & (ODM_IC_11N_SERIES | ODM_IC_11AC_SERIES)) -+ PHYDM_DBG(dm, DBG_CMN, -+ "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n", -+ dm->is_linked, dm->number_linked_client, dm->rssi_min, -+ dm->dm_dig_table.cur_ig_value, dm->noisy_decision); -+ else -+ PHYDM_DBG(dm, DBG_CMN, -+ "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x\n", -+ dm->is_linked, dm->number_linked_client, dm->rssi_min, -+ dm->dm_dig_table.cur_ig_value); -+ -+#ifdef NHM_SUPPORT -+ if (dm->support_ability & ODM_BB_ENV_MONITOR) { -+ PHYDM_DBG(dm, DBG_CMN, -+ "[NHM] valid: %d percent, noise(RSSI) = %d\n", -+ ccx->nhm_level_valid, ccx->nhm_level); -+ } -+#endif -+} -+ -+void phydm_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char *cut = NULL; -+ char *ic_type = NULL; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 date = 0; -+ char *commit_by = NULL; -+ u32 release_ver = 0; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n", -+ "% Basic Profile %"); -+ -+ if (dm->support_ic_type == ODM_RTL8188E) { -+#if (RTL8188E_SUPPORT) -+ ic_type = "RTL8188E"; -+ date = RELEASE_DATE_8188E; -+ commit_by = COMMIT_BY_8188E; -+ release_ver = RELEASE_VERSION_8188E; -+#endif -+#if (RTL8812A_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8812) { -+ ic_type = "RTL8812A"; -+ date = RELEASE_DATE_8812A; -+ commit_by = COMMIT_BY_8812A; -+ release_ver = RELEASE_VERSION_8812A; -+#endif -+#if (RTL8821A_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8821) { -+ ic_type = "RTL8821A"; -+ date = RELEASE_DATE_8821A; -+ commit_by = COMMIT_BY_8821A; -+ release_ver = RELEASE_VERSION_8821A; -+#endif -+#if (RTL8192E_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8192E) { -+ ic_type = "RTL8192E"; -+ date = RELEASE_DATE_8192E; -+ commit_by = COMMIT_BY_8192E; -+ release_ver = RELEASE_VERSION_8192E; -+#endif -+#if (RTL8723B_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8723B) { -+ ic_type = "RTL8723B"; -+ date = RELEASE_DATE_8723B; -+ commit_by = COMMIT_BY_8723B; -+ release_ver = RELEASE_VERSION_8723B; -+#endif -+#if (RTL8814A_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8814A) { -+ ic_type = "RTL8814A"; -+ date = RELEASE_DATE_8814A; -+ commit_by = COMMIT_BY_8814A; -+ release_ver = RELEASE_VERSION_8814A; -+#endif -+#if (RTL8881A_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8881A) { -+ ic_type = "RTL8881A"; -+#endif -+#if (RTL8822B_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8822B) { -+ ic_type = "RTL8822B"; -+ date = RELEASE_DATE_8822B; -+ commit_by = COMMIT_BY_8822B; -+ release_ver = RELEASE_VERSION_8822B; -+#endif -+#if (RTL8197F_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8197F) { -+ ic_type = "RTL8197F"; -+ date = RELEASE_DATE_8197F; -+ commit_by = COMMIT_BY_8197F; -+ release_ver = RELEASE_VERSION_8197F; -+#endif -+#if (RTL8703B_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8703B) { -+ ic_type = "RTL8703B"; -+ date = RELEASE_DATE_8703B; -+ commit_by = COMMIT_BY_8703B; -+ release_ver = RELEASE_VERSION_8703B; -+#endif -+#if (RTL8195A_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8195A) { -+ ic_type = "RTL8195A"; -+#endif -+#if (RTL8188F_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8188F) { -+ ic_type = "RTL8188F"; -+ date = RELEASE_DATE_8188F; -+ commit_by = COMMIT_BY_8188F; -+ release_ver = RELEASE_VERSION_8188F; -+#endif -+#if (RTL8723D_SUPPORT) -+ } else if (dm->support_ic_type == ODM_RTL8723D) { -+ ic_type = "RTL8723D"; -+ date = RELEASE_DATE_8723D; -+ commit_by = COMMIT_BY_8723D; -+ release_ver = RELEASE_VERSION_8723D; -+#endif -+ } -+ -+/* @JJ ADD 20161014 */ -+#if (RTL8710B_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8710B) { -+ ic_type = "RTL8710B"; -+ date = RELEASE_DATE_8710B; -+ commit_by = COMMIT_BY_8710B; -+ release_ver = RELEASE_VERSION_8710B; -+ } -+#endif -+ -+#if (RTL8721D_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8721D) { -+ ic_type = "RTL8721D"; -+ date = RELEASE_DATE_8721D; -+ commit_by = COMMIT_BY_8721D; -+ release_ver = RELEASE_VERSION_8721D; -+ } -+#endif -+ -+#if (RTL8710C_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8710C) { -+ ic_type = "RTL8710C"; -+ date = RELEASE_DATE_8710C; -+ commit_by = COMMIT_BY_8710C; -+ release_ver = RELEASE_VERSION_8710C; -+ } -+#endif -+ -+#if (RTL8821C_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8821C) { -+ ic_type = "RTL8821C"; -+ date = RELEASE_DATE_8821C; -+ commit_by = COMMIT_BY_8821C; -+ release_ver = RELEASE_VERSION_8821C; -+ } -+#endif -+ -+/*@jj add 20170822*/ -+#if (RTL8192F_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8192F) { -+ ic_type = "RTL8192F"; -+ date = RELEASE_DATE_8192F; -+ commit_by = COMMIT_BY_8192F; -+ release_ver = RELEASE_VERSION_8192F; -+ } -+#endif -+ -+#if (RTL8198F_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8198F) { -+ ic_type = "RTL8198F"; -+ date = RELEASE_DATE_8198F; -+ commit_by = COMMIT_BY_8198F; -+ release_ver = RELEASE_VERSION_8198F; -+ } -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8822C) { -+ ic_type = "RTL8822C"; -+ date = RELEASE_DATE_8822C; -+ commit_by = COMMIT_BY_8822C; -+ release_ver = RELEASE_VERSION_8822C; -+ } -+#endif -+ -+#if (RTL8723F_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8723F) { -+ ic_type = "RTL8723F"; -+ date = RELEASE_DATE_8723F; -+ commit_by = COMMIT_BY_8723F; -+ release_ver = RELEASE_VERSION_8723F; -+ } -+#endif -+#if (RTL8812F_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8812F) { -+ ic_type = "RTL8812F"; -+ date = RELEASE_DATE_8812F; -+ commit_by = COMMIT_BY_8812F; -+ release_ver = RELEASE_VERSION_8812F; -+ } -+#endif -+ -+#if (RTL8197G_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8197G) { -+ ic_type = "RTL8197G"; -+ date = RELEASE_DATE_8197G; -+ commit_by = COMMIT_BY_8197G; -+ release_ver = RELEASE_VERSION_8197G; -+ } -+#endif -+ -+#if (RTL8814B_SUPPORT) -+ else if (dm->support_ic_type == ODM_RTL8814B) { -+ ic_type = "RTL8814B"; -+ date = RELEASE_DATE_8814B; -+ commit_by = COMMIT_BY_8814B; -+ release_ver = RELEASE_VERSION_8814B; -+ } -+#endif -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-35s: %s (MP Chip: %s)\n", "IC type", ic_type, -+ dm->is_mp_chip ? "Yes" : "No"); -+ -+ if (dm->cut_version == ODM_CUT_A) -+ cut = "A"; -+ else if (dm->cut_version == ODM_CUT_B) -+ cut = "B"; -+ else if (dm->cut_version == ODM_CUT_C) -+ cut = "C"; -+ else if (dm->cut_version == ODM_CUT_D) -+ cut = "D"; -+ else if (dm->cut_version == ODM_CUT_E) -+ cut = "E"; -+ else if (dm->cut_version == ODM_CUT_F) -+ cut = "F"; -+ else if (dm->cut_version == ODM_CUT_G) -+ cut = "G"; -+ else if (dm->cut_version == ODM_CUT_H) -+ cut = "H"; -+ else if (dm->cut_version == ODM_CUT_I) -+ cut = "I"; -+ else if (dm->cut_version == ODM_CUT_J) -+ cut = "J"; -+ else if (dm->cut_version == ODM_CUT_K) -+ cut = "K"; -+ else if (dm->cut_version == ODM_CUT_L) -+ cut = "L"; -+ else if (dm->cut_version == ODM_CUT_M) -+ cut = "M"; -+ else if (dm->cut_version == ODM_CUT_N) -+ cut = "N"; -+ else if (dm->cut_version == ODM_CUT_O) -+ cut = "O"; -+ else if (dm->cut_version == ODM_CUT_TEST) -+ cut = "TEST"; -+ else -+ cut = "UNKNOWN"; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n", -+ "RFE type", dm->rfe_type); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "CART_Ver", cut); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n", -+ "PHY Para Ver", odm_get_hw_img_version(dm)); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n", -+ "PHY Para Commit date", date); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "PHY Para Commit by", commit_by); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n", -+ "PHY Para Release Ver", release_ver); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-35s: %d (Subversion: %d)\n", "FW Ver", dm->fw_version, -+ dm->fw_sub_version); -+ -+ /* @1 PHY DM version List */ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n", -+ "% PHYDM version %"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "Code base", PHYDM_CODE_BASE); -+#ifdef PHYDM_SVN_REV -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "PHYDM SVN Ver", PHYDM_SVN_REV); -+#endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "Release Date", PHYDM_RELEASE_DATE); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "Adaptivity", ADAPTIVITY_VERSION); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "DIG", DIG_VERSION); -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "CFO Tracking", CFO_TRACKING_VERSION); -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "AntDiv", ANTDIV_VERSION); -+#endif -+#ifdef CONFIG_DYNAMIC_TX_TWR -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "Dynamic TxPower", DYNAMIC_TXPWR_VERSION); -+#endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "RA Info", RAINFO_VERSION); -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "AntDetect", ANTDECT_VERSION); -+#endif -+#ifdef CONFIG_PATH_DIVERSITY -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "PathDiv", PATHDIV_VERSION); -+#endif -+#ifdef CONFIG_ADAPTIVE_SOML -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "Adaptive SOML", ADAPTIVE_SOML_VERSION); -+#endif -+#if (PHYDM_LA_MODE_SUPPORT) -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "LA mode", DYNAMIC_LA_MODE); -+#endif -+#ifdef PHYDM_PRIMARY_CCA -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "Primary CCA", PRIMARYCCA_VERSION); -+#endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n", -+ "DFS", DFS_VERSION); -+ -+#if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8822B) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-35s: %s\n", "PHY config 8822B", -+ PHY_CONFIG_VERSION_8822B); -+ -+#endif -+#if (RTL8197F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197F) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-35s: %s\n", "PHY config 8197F", -+ PHY_CONFIG_VERSION_8197F); -+#endif -+ -+/*@jj add 20170822*/ -+#if (RTL8192F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8192F) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-35s: %s\n", "PHY config 8192F", -+ PHY_CONFIG_VERSION_8192F); -+#endif -+#if (RTL8721D_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8721D) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-35s: %s\n", "PHY config 8721D", -+ PHY_CONFIG_VERSION_8721D); -+#endif -+ -+#if (RTL8710C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8710C) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-35s: %s\n", "PHY config 8710C", -+ PHY_CONFIG_VERSION_8710C); -+#endif -+ -+ *_used = used; -+ *_out_len = out_len; -+ -+#endif /*@#if CONFIG_PHYDM_DEBUG_FUNCTION*/ -+} -+ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+void phydm_fw_trace_en_h2c(void *dm_void, boolean enable, -+ u32 fw_dbg_comp, u32 monitor_mode, u32 macid) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 h2c_parameter[7] = {0}; -+ u8 cmd_length; -+ -+ if (dm->support_ic_type & PHYDM_IC_3081_SERIES) { -+ h2c_parameter[0] = enable; -+ h2c_parameter[1] = (u8)(fw_dbg_comp & MASKBYTE0); -+ h2c_parameter[2] = (u8)((fw_dbg_comp & MASKBYTE1) >> 8); -+ h2c_parameter[3] = (u8)((fw_dbg_comp & MASKBYTE2) >> 16); -+ h2c_parameter[4] = (u8)((fw_dbg_comp & MASKBYTE3) >> 24); -+ h2c_parameter[5] = (u8)monitor_mode; -+ h2c_parameter[6] = (u8)macid; -+ cmd_length = 7; -+ -+ } else { -+ h2c_parameter[0] = enable; -+ h2c_parameter[1] = (u8)monitor_mode; -+ h2c_parameter[2] = (u8)macid; -+ cmd_length = 3; -+ } -+ -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n", -+ enable, monitor_mode, macid); -+ -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter); -+} -+ -+void phydm_get_per_path_txagc(void *dm_void, u8 path, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rate_idx = 0; -+ u8 txagc = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+#ifdef PHYDM_COMMON_API_SUPPORT -+ if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) -+ return; -+ -+ if (dm->num_rf_path == 1 && path > RF_PATH_A) -+ return; -+ else if (dm->num_rf_path == 2 && path > RF_PATH_B) -+ return; -+ else if (dm->num_rf_path == 3 && path > RF_PATH_C) -+ return; -+ else if (dm->num_rf_path == 4 && path > RF_PATH_D) -+ return; -+ -+ for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) { -+ if (!(dm->support_ic_type & PHYDM_IC_ABOVE_3SS) && -+ ((rate_idx >= ODM_RATEMCS16 && -+ rate_idx < ODM_RATEVHTSS1MCS0) || -+ rate_idx >= ODM_RATEVHTSS3MCS0)) -+ continue; -+ -+ if (rate_idx == ODM_RATE1M) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-35s\n", "CCK====>"); -+ else if (rate_idx == ODM_RATE6M) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n %-35s\n", "OFDM====>"); -+ else if (rate_idx == ODM_RATEMCS0) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n %-35s\n", "HT 1ss====>"); -+ else if (rate_idx == ODM_RATEMCS8) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n %-35s\n", "HT 2ss====>"); -+ else if (rate_idx == ODM_RATEMCS16) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n %-35s\n", "HT 3ss====>"); -+ else if (rate_idx == ODM_RATEMCS24) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n %-35s\n", "HT 4ss====>"); -+ else if (rate_idx == ODM_RATEVHTSS1MCS0) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n %-35s\n", "VHT 1ss====>"); -+ else if (rate_idx == ODM_RATEVHTSS2MCS0) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n %-35s\n", "VHT 2ss====>"); -+ else if (rate_idx == ODM_RATEVHTSS3MCS0) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n %-35s\n", "VHT 3ss====>"); -+ else if (rate_idx == ODM_RATEVHTSS4MCS0) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n %-35s\n", "VHT 4ss====>"); -+ -+ txagc = phydm_api_get_txagc(dm, (enum rf_path)path, rate_idx); -+ if (config_phydm_read_txagc_check(txagc)) -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, " 0x%02x ", txagc); -+ else -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, " 0x%s ", "xx"); -+ } -+#endif -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_get_txagc(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ -+ #if (RTL8822C_SUPPORT) -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "Disabled DPD rate mask: 0x%x\n", -+ dm->dis_dpd_rate); -+ #endif -+ -+ for (i = RF_PATH_A; i < dm->num_rf_path; i++) { -+ if (i == RF_PATH_A) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-35s\n", "path-A===================="); -+ else if (i == RF_PATH_B) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n%-35s\n", "path-B===================="); -+ else if (i == RF_PATH_C) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n%-35s\n", "path-C===================="); -+ else if (i == RF_PATH_D) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n%-35s\n", "path-D===================="); -+ -+ phydm_get_per_path_txagc(dm, i, &used, output, &out_len); -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_set_txagc(void *dm_void, u32 *const val, u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ u32 pow = 0; /*power index*/ -+ u8 vht_start_rate = ODM_RATEVHTSS1MCS0; -+ boolean rpt = true; -+ enum rf_path path = RF_PATH_A; -+ -+/*@val[1] = path*/ -+/*@val[2] = hw_rate*/ -+/*@val[3] = power_index*/ -+ -+#ifdef PHYDM_COMMON_API_SUPPORT -+ if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) -+ return; -+ -+ path = (enum rf_path)val[1]; -+ -+ if (val[1] >= dm->num_rf_path) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Write path-%d rate_idx-0x%x fail\n", val[1], val[2]); -+ } else if ((u8)val[2] != 0xff) { -+ if (phydm_api_set_txagc(dm, val[3], path, (u8)val[2], true)) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Write path-%d rate_idx-0x%x = 0x%x\n", -+ val[1], val[2], val[3]); -+ else -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Write path-%d rate index-0x%x fail\n", -+ val[1], val[2]); -+ } else { -+ -+ if (dm->support_ic_type & -+ (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) { -+ pow = (val[3] & 0x3f); -+ pow = BYTE_DUPLICATE_2_DWORD(pow); -+ -+ for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4) -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); -+ } else if (dm->support_ic_type & -+ (ODM_RTL8197F | ODM_RTL8192F)) { -+ pow = (val[3] & 0x3f); -+ for (i = 0; i <= ODM_RATEMCS15; i++) -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); -+ } else if (dm->support_ic_type & ODM_RTL8198F) { -+ pow = (val[3] & 0x7f); -+ for (i = 0; i <= ODM_RATEVHTSS4MCS9; i++) -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); -+ } else if (dm->support_ic_type & -+ (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) { -+ pow = (val[3] & 0x7f); -+ for (i = 0; i <= ODM_RATEMCS15; i++) -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); -+ for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); -+ } else if (dm->support_ic_type & -+ (ODM_RTL8721D | ODM_RTL8710C)) { -+ pow = (val[3] & 0x3f); -+ for (i = 0; i <= ODM_RATEMCS7; i++) -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); -+ } else if (dm->support_ic_type &(ODM_RTL8723F)) { -+ pow = (val[3] & 0x7f); -+ for (i = 0; i <= ODM_RATEMCS7; i++) -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 0); -+ } -+ -+ if (rpt) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Write all TXAGC of path-%d = 0x%x\n", -+ val[1], val[3]); -+ else -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Write all TXAGC of path-%d fail\n", val[1]); -+ } -+ -+#endif -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_shift_txagc(void *dm_void, u32 *const val, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ u32 pow = 0; /*Power index*/ -+ boolean rpt = true; -+ u8 vht_start_rate = ODM_RATEVHTSS1MCS0; -+ enum rf_path path = RF_PATH_A; -+ -+#ifdef PHYDM_COMMON_API_SUPPORT -+ if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) -+ return; -+ -+ if (val[1] >= dm->num_rf_path) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Write path-%d fail\n", val[1]); -+ return; -+ } -+ -+ path = (enum rf_path)val[1]; -+ -+ if ((u8)val[2] == 0) { -+ /*@{0:-, 1:+} {Pwr Offset}*/ -+ if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) { -+ for (i = 0; i <= ODM_RATEMCS7; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) - val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) - val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ } else if (dm->support_ic_type & (ODM_RTL8822B)) { -+ for (i = 0; i <= ODM_RATEMCS15; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) - val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) - val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ } else if (dm->support_ic_type & -+ (ODM_RTL8197F | ODM_RTL8192F)) { -+ for (i = 0; i <= ODM_RATEMCS15; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) - val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ rpt &= phydm_api_shift_txagc(dm, val[3], path, 0); -+ } else if (dm->support_ic_type & -+ (ODM_RTL8721D | ODM_RTL8710C)) { -+ for (i = 0; i <= ODM_RATEMCS7; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) - val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ } -+ } else if ((u8)val[2] == 1) { -+ /*@{0:-, 1:+} {Pwr Offset}*/ -+ if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) { -+ for (i = 0; i <= ODM_RATEMCS7; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) + val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) + val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ } else if (dm->support_ic_type & (ODM_RTL8822B)) { -+ for (i = 0; i <= ODM_RATEMCS15; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) + val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) + val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ } else if (dm->support_ic_type & -+ (ODM_RTL8197F | ODM_RTL8192F)) { -+ for (i = 0; i <= ODM_RATEMCS15; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) + val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ } else if (dm->support_ic_type & (ODM_RTL8721D | -+ ODM_RTL8710C)) { -+ for (i = 0; i <= ODM_RATEMCS7; i++) { -+ pow = phydm_api_get_txagc(dm, path, i) + val[3]; -+ rpt &= phydm_api_set_txagc(dm, pow, path, i, 1); -+ } -+ } else if (dm->support_ic_type & -+ (ODM_RTL8822C | ODM_RTL8814B | -+ ODM_RTL8812F | ODM_RTL8197G | ODM_RTL8723F)) { -+ rpt &= phydm_api_shift_txagc(dm, val[3], path, 1); -+ } -+ } -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[All rate] Set Path-%d Pow_idx: %s %d\n", -+ val[1], (val[2] ? "+" : "-"), val[3]); -+ else -+ #endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[All rate] Set Path-%d Pow_idx: %s %d(%d.%s dB)\n", -+ val[1], (val[2] ? "+" : "-"), val[3], val[3] >> 1, -+ ((val[3] & 1) ? "5" : "0")); -+ -+#endif -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_set_txagc_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 var1[10] = {0}; -+ char help[] = "-h"; -+ u8 i = 0, input_idx = 0; -+ -+ for (i = 0; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); -+ input_idx++; -+ } -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{Dis:0, En:1} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{Pwr Shift(All rate):2} {pathA~D(0~3)} {0:-, 1:+} {Pwr Offset(Hex)}\n"); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{reset all rate ref/diff to 0x0:0xff}\n"); -+ #endif -+ } else if (var1[0] == 0) { -+ dm->is_disable_phy_api = false; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Disable API debug mode\n"); -+ } else if (var1[0] == 1) { -+ dm->is_disable_phy_api = false; -+ #ifdef CONFIG_TXAGC_DEBUG_8822C -+ config_phydm_write_txagc_8822c(dm, var1[3], -+ (enum rf_path)var1[1], -+ (u8)var1[2]); -+ #elif (defined(CONFIG_TXAGC_DEBUG_8814B)) -+ config_phydm_write_txagc_8814b(dm, var1[3], -+ (enum rf_path)var1[1], -+ (u8)var1[2]); -+ #else -+ phydm_set_txagc(dm, (u32 *)var1, &used, output, &out_len); -+ #endif -+ dm->is_disable_phy_api = true; -+ } else if (var1[0] == 2) { -+ PHYDM_SSCANF(input[4], DCMD_HEX, &var1[3]); -+ dm->is_disable_phy_api = false; -+ phydm_shift_txagc(dm, (u32 *)var1, &used, output, &out_len); -+ dm->is_disable_phy_api = true; -+ } -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ else if (var1[0] == 0xff) { -+ dm->is_disable_phy_api = false; -+ phydm_reset_txagc(dm); -+ dm->is_disable_phy_api = true; -+ } -+ #endif -+ #ifdef CONFIG_TXAGC_DEBUG_8822C -+ else if (var1[0] == 3) { -+ dm->is_disable_phy_api = false; -+ phydm_txagc_tab_buff_show_8822c(dm); -+ dm->is_disable_phy_api = true; -+ } else if (var1[0] == 4) { -+ dm->is_disable_phy_api = false; -+ config_phydm_set_txagc_to_hw_8822c(dm); -+ dm->is_disable_phy_api = true; -+ } -+ #elif (defined(CONFIG_TXAGC_DEBUG_8814B)) -+ else if (var1[0] == 3) { -+ dm->is_disable_phy_api = false; -+ phydm_txagc_tab_buff_show_8814b(dm); -+ dm->is_disable_phy_api = true; -+ } else if (var1[0] == 4) { -+ dm->is_disable_phy_api = false; -+ config_phydm_set_txagc_to_hw_8814b(dm); -+ dm->is_disable_phy_api = true; -+ } -+ #endif -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_cmn_msg_setting(void *dm_void, u32 *val, u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ if (val[1] == 1) { -+ dm->cmn_dbg_msg_period = (u8)val[2]; -+ -+ if (dm->cmn_dbg_msg_period < PHYDM_WATCH_DOG_PERIOD) -+ dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "cmn_dbg_msg_period=%d\n", dm->cmn_dbg_msg_period); -+ } -+ -+#ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ if (val[1] == 1) -+ phydm_physts_auto_switch_jgr3_set(dm, true, BIT(4) | BIT(1)); -+ else -+ phydm_physts_auto_switch_jgr3_set(dm, false, BIT(1)); -+#endif -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_debug_trace(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u64 pre_debug_components, one = 1; -+ u64 comp = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 val[10] = {0}; -+ u8 i = 0; -+ -+ for (i = 0; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]); -+ } -+ comp = dm->debug_components; -+ pre_debug_components = dm->debug_components; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\n================================\n"); -+ if (val[0] == 100) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[DBG MSG] Component Selection\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "================================\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "00. (( %s ))DIG\n", -+ ((comp & DBG_DIG) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "01. (( %s ))RA_MASK\n", -+ ((comp & DBG_RA_MASK) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "02. (( %s ))DYN_TXPWR\n", -+ ((comp & DBG_DYN_TXPWR) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "03. (( %s ))FA_CNT\n", -+ ((comp & DBG_FA_CNT) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "04. (( %s ))RSSI_MNTR\n", -+ ((comp & DBG_RSSI_MNTR) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "05. (( %s ))CCKPD\n", -+ ((comp & DBG_CCKPD) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "06. (( %s ))ANT_DIV\n", -+ ((comp & DBG_ANT_DIV) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "07. (( %s ))SMT_ANT\n", -+ ((comp & DBG_SMT_ANT) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "08. (( %s ))PWR_TRAIN\n", -+ ((comp & DBG_PWR_TRAIN) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "09. (( %s ))RA\n", -+ ((comp & DBG_RA) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "10. (( %s ))PATH_DIV\n", -+ ((comp & DBG_PATH_DIV) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "11. (( %s ))DFS\n", -+ ((comp & DBG_DFS) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "12. (( %s ))DYN_ARFR\n", -+ ((comp & DBG_DYN_ARFR) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "13. (( %s ))ADAPTIVITY\n", -+ ((comp & DBG_ADPTVTY) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "14. (( %s ))CFO_TRK\n", -+ ((comp & DBG_CFO_TRK) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "15. (( %s ))ENV_MNTR\n", -+ ((comp & DBG_ENV_MNTR) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "16. (( %s ))PRI_CCA\n", -+ ((comp & DBG_PRI_CCA) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "17. (( %s ))ADPTV_SOML\n", -+ ((comp & DBG_ADPTV_SOML) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "18. (( %s ))LNA_SAT_CHK\n", -+ ((comp & DBG_LNA_SAT_CHK) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "20. (( %s ))PHY_STATUS\n", -+ ((comp & DBG_PHY_STATUS) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "21. (( %s ))TMP\n", -+ ((comp & DBG_TMP) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "22. (( %s ))FW_DBG_TRACE\n", -+ ((comp & DBG_FW_TRACE) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "23. (( %s ))TXBF\n", -+ ((comp & DBG_TXBF) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "24. (( %s ))COMMON_FLOW\n", -+ ((comp & DBG_COMMON_FLOW) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "28. (( %s ))PHY_CONFIG\n", -+ ((comp & ODM_PHY_CONFIG) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "29. (( %s ))INIT\n", -+ ((comp & ODM_COMP_INIT) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "30. (( %s ))COMMON\n", -+ ((comp & DBG_CMN) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "31. (( %s ))API\n", -+ ((comp & ODM_COMP_API) ? ("V") : ("."))); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "================================\n"); -+ -+ } else if (val[0] == 101) { -+ dm->debug_components = 0; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Disable all debug components\n"); -+ } else { -+ if (val[1] == 1) /*@enable*/ -+ dm->debug_components |= (one << val[0]); -+ else if (val[1] == 2) /*@disable*/ -+ dm->debug_components &= ~(one << val[0]); -+ else -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Warning] 1:on, 2:off\n"); -+ -+ if ((BIT(val[0]) == DBG_PHY_STATUS) && val[1] == 1) { -+ dm->phy_dbg_info.show_phy_sts_all_pkt = (u8)val[2]; -+ dm->phy_dbg_info.show_phy_sts_max_cnt = (u16)val[3]; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "show_all_pkt=%d, show_max_num=%d\n\n", -+ dm->phy_dbg_info.show_phy_sts_all_pkt, -+ dm->phy_dbg_info.show_phy_sts_max_cnt); -+ -+ } else if (BIT(val[0]) == DBG_CMN) { -+ phydm_cmn_msg_setting(dm, val, &used, output, &out_len); -+ } -+ } -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pre-DbgComponents = 0x%llx\n", pre_debug_components); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Curr-DbgComponents = 0x%llx\n", dm->debug_components); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "================================\n"); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_fw_debug_trace(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 val[10] = {0}; -+ u8 i, input_idx = 0; -+ char help[] = "-h"; -+ u32 pre_fw_debug_components = 0, one = 1; -+ u32 comp = 0; -+ -+ for (i = 0; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]); -+ input_idx++; -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ pre_fw_debug_components = dm->fw_debug_components; -+ comp = dm->fw_debug_components; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{dbg_comp} {1:en, 2:dis} {mode} {macid}\n"); -+ } else { -+ if (val[0] == 101) { -+ dm->fw_debug_components = 0; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%s\n", "Clear all fw debug components"); -+ } else { -+ if (val[1] == 1) /*@enable*/ -+ dm->fw_debug_components |= (one << val[0]); -+ else if (val[1] == 2) /*@disable*/ -+ dm->fw_debug_components &= ~(one << val[0]); -+ else -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "%s\n", -+ "[Warning!!!] 1:enable, 2:disable"); -+ } -+ -+ comp = dm->fw_debug_components; -+ -+ if (comp == 0) { -+ dm->debug_components &= ~DBG_FW_TRACE; -+ /*@H2C to enable C2H Msg*/ -+ phydm_fw_trace_en_h2c(dm, false, comp, val[2], val[3]); -+ } else { -+ dm->debug_components |= DBG_FW_TRACE; -+ /*@H2C to enable C2H Msg*/ -+ phydm_fw_trace_en_h2c(dm, true, comp, val[2], val[3]); -+ } -+ } -+} -+ -+#if (ODM_IC_11N_SERIES_SUPPORT) -+void phydm_dump_bb_reg_n(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 addr = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ /*@For Nseries IC we only need to dump page8 to pageF using 3 digits*/ -+ for (addr = 0x800; addr < 0xfff; addr += 4) { -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "0x%03x 0x%08x\n", -+ addr, odm_get_bb_reg(dm, addr, MASKDWORD)); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT) -+void phydm_dump_bb_reg_ac(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 addr = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ for (addr = 0x800; addr < 0xfff; addr += 4) { -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "0x%04x 0x%08x\n", -+ addr, odm_get_bb_reg(dm, addr, MASKDWORD)); -+ } -+ -+ if (!(dm->support_ic_type & -+ (ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C | ODM_RTL8195B))) -+ goto rpt_reg; -+ -+ if (dm->rf_type > RF_2T2R) { -+ for (addr = 0x1800; addr < 0x18ff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%04x 0x%08x\n", -+ addr, -+ odm_get_bb_reg(dm, addr, MASKDWORD)); -+ } -+ -+ if (dm->rf_type > RF_3T3R) { -+ for (addr = 0x1a00; addr < 0x1aff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%04x 0x%08x\n", -+ addr, -+ odm_get_bb_reg(dm, addr, MASKDWORD)); -+ } -+ -+ for (addr = 0x1900; addr < 0x19ff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "0x%04x 0x%08x\n", -+ addr, odm_get_bb_reg(dm, addr, MASKDWORD)); -+ -+ for (addr = 0x1c00; addr < 0x1cff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "0x%04x 0x%08x\n", -+ addr, odm_get_bb_reg(dm, addr, MASKDWORD)); -+ -+ for (addr = 0x1f00; addr < 0x1fff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "0x%04x 0x%08x\n", -+ addr, odm_get_bb_reg(dm, addr, MASKDWORD)); -+ -+rpt_reg: -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#endif -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+void phydm_dump_bb_reg_jgr3(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 addr = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ for (addr = 0x800; addr < 0xdff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%04x 0x%08x\n", addr, -+ odm_get_bb_reg(dm, addr, MASKDWORD)); -+ -+ for (addr = 0x1800; addr < 0x1aff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%04x 0x%08x\n", addr, -+ odm_get_bb_reg(dm, addr, MASKDWORD)); -+ -+ for (addr = 0x1c00; addr < 0x1eff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%04x 0x%08x\n", addr, -+ odm_get_bb_reg(dm, addr, MASKDWORD)); -+ -+ #if (defined(RTL8723F_SUPPORT)) -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ for (addr = 0x2a00; addr < 0x2a5c; addr += 4) { -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%04x 0x%08x\n", -+ addr, -+ odm_get_bb_reg(dm, addr, -+ MASKDWORD)); -+ } -+ } -+ #endif -+ -+ for (addr = 0x4000; addr < 0x41ff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%04x 0x%08x\n", addr, -+ odm_get_bb_reg(dm, addr, MASKDWORD)); -+ -+ #if (defined(RTL8723F_SUPPORT)) -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ for (addr = 0x4300; addr < 0x43bf; addr += 4) { -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%04x 0x%08x\n", -+ addr, -+ odm_get_bb_reg(dm, addr, -+ MASKDWORD)); -+ } -+ } -+ #endif -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_dump_bb_reg2_jgr3(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 addr = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) -+ return; -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { -+ for (addr = 0x5000; addr < 0x53ff; addr += 4) { -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%04x 0x%08x\n", -+ addr, -+ odm_get_bb_reg(dm, addr, MASKDWORD)); -+ } -+ } -+ #endif -+ -+ /* @Do not change the order of page-2C/2D*/ -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "------ BB report-register start ------\n"); -+ -+ #if (defined(RTL8723F_SUPPORT)) -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ for (addr = 0x2aa0; addr < 0x2aff; addr += 4) { -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%04x 0x%08x\n", -+ addr, -+ odm_get_bb_reg(dm, addr, MASKDWORD)); -+ } -+ } -+ #endif -+ -+ for (addr = 0x2c00; addr < 0x2dff; addr += 4) { -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "0x%04x 0x%08x\n", -+ addr, odm_get_bb_reg(dm, addr, MASKDWORD)); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_get_per_path_anapar_jgr3(void *dm_void, u8 path, u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 state = 0; -+ u8 state_bp = 0; -+ u32 control_bb = 0; -+ u32 control_pow = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 reg_idx = 0; -+ u32 dbgport_idx = 0; -+ u32 dbgport_val = 0; -+ -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "path-%d:\n", path); -+ -+ if (path == RF_PATH_A) { -+ reg_idx = R_0x1830; -+ dbgport_idx = 0x9F0; -+ } else if (path == RF_PATH_B) { -+ reg_idx = R_0x4130; -+ dbgport_idx = 0xBF0; -+ } else if (path == RF_PATH_C) { -+ reg_idx = R_0x5230; -+ dbgport_idx = 0xDF0; -+ } else if (path == RF_PATH_D) { -+ reg_idx = R_0x5330; -+ dbgport_idx = 0xFF0; -+ } -+ -+ state_bp = (u8)odm_get_bb_reg(dm, reg_idx, 0xf00000); -+ odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x5); /* @read en*/ -+ -+ for (state = 0; state <= 0xf; state++) { -+ odm_set_bb_reg(dm, reg_idx, 0xF00000, state); -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) { -+ dbgport_val = phydm_get_bb_dbg_port_val(dm); -+ phydm_release_bb_dbg_port(dm); -+ } else { -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, -+ "state:0x%x = read dbg_port error!\n", -+ state); -+ } -+ control_bb = (dbgport_val & 0xFFFF0) >> 4; -+ control_pow = dbgport_val & 0xF; -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "state:0x%x = control_bb:0x%x pow_bb:0x%x\n", -+ state, control_bb, control_pow); -+ } -+ odm_set_bb_reg(dm, reg_idx, 0xf00000, state_bp); -+ odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x6); /* @write en*/ -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_get_csi_table_jgr3(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 table_idx = 0; -+ u8 table_val = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 dbgport_idx = 0x39e; -+ u32 dbgport_val = 0; -+ -+ /*enable clk*/ -+ odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x3); -+ /*enable read table*/ -+ odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x2); -+ -+ for (table_idx = 0; table_idx < 128; table_idx++) { -+ odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, table_idx); -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) { -+ dbgport_val = phydm_get_bb_dbg_port_val(dm); -+ phydm_release_bb_dbg_port(dm); -+ } else { -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, -+ "table_idx:0x%x = read dbg_port error!\n", -+ table_idx); -+ } -+ table_val = dbgport_val >> 24; -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "table_idx: 0x%x = 0x%x\n", -+ table_idx, table_val); -+ } -+ /*enable write table*/ -+ odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x1); -+ /*disable clk*/ -+ odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x0); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#endif -+ -+void phydm_dump_bb_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "BB==========\n"); -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "------ BB control register start ------\n"); -+ -+ switch (dm->ic_ip_series) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ case PHYDM_IC_JGR3: -+ phydm_dump_bb_reg_jgr3(dm, &used, output, &out_len); -+ break; -+ #endif -+ -+ #if (ODM_IC_11AC_SERIES_SUPPORT) -+ case PHYDM_IC_AC: -+ phydm_dump_bb_reg_ac(dm, &used, output, &out_len); -+ break; -+ #endif -+ -+ #if (ODM_IC_11N_SERIES_SUPPORT) -+ case PHYDM_IC_N: -+ phydm_dump_bb_reg_n(dm, &used, output, &out_len); -+ break; -+ #endif -+ -+ default: -+ break; -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_dump_rf_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 addr = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 reg = 0; -+ -+ /* @dump RF register */ -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "RF-A==========\n"); -+ -+ for (addr = 0; addr <= 0xFF; addr++) { -+ reg = odm_get_rf_reg(dm, RF_PATH_A, addr, RFREG_MASK); -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "0x%02x 0x%05x\n", addr, reg); -+ } -+ -+#ifdef PHYDM_COMPILE_ABOVE_2SS -+ if (dm->rf_type > RF_1T1R) { -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "RF-B==========\n"); -+ -+ for (addr = 0; addr <= 0xFF; addr++) { -+ reg = odm_get_rf_reg(dm, RF_PATH_B, addr, RFREG_MASK); -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%02x 0x%05x\n", -+ addr, reg); -+ } -+ } -+#endif -+ -+#ifdef PHYDM_COMPILE_ABOVE_3SS -+ if (dm->rf_type > RF_2T2R) { -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "RF-C==========\n"); -+ -+ for (addr = 0; addr <= 0xFF; addr++) { -+ reg = odm_get_rf_reg(dm, RF_PATH_C, addr, RFREG_MASK); -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%02x 0x%05x\n", -+ addr, reg); -+ } -+ } -+#endif -+ -+#ifdef PHYDM_COMPILE_ABOVE_4SS -+ if (dm->rf_type > RF_3T3R) { -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "RF-D==========\n"); -+ -+ for (addr = 0; addr <= 0xFF; addr++) { -+ reg = odm_get_rf_reg(dm, RF_PATH_D, addr, RFREG_MASK); -+ PDM_VAST_SNPF(out_len, used, output + used, -+ out_len - used, "0x%02x 0x%05x\n", -+ addr, reg); -+ } -+ } -+#endif -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_dump_mac_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 addr = 0; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ /* @dump MAC register */ -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "MAC==========\n"); -+ -+ for (addr = 0; addr < 0x7ff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "0x%04x 0x%08x\n", -+ addr, odm_get_bb_reg(dm, addr, MASKDWORD)); -+ -+ for (addr = 0x1000; addr < 0x17ff; addr += 4) -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "0x%04x 0x%08x\n", -+ addr, odm_get_bb_reg(dm, addr, MASKDWORD)); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_dump_reg(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 addr = 0; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if ((strcmp(input[1], help) == 0)) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "dumpreg {0:all, 1:BB, 2:RF, 3:MAC 4:BB2 for jgr3}\n"); -+ else -+ #endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "dumpreg {0:all, 1:BB, 2:RF, 3:MAC}\n"); -+ } else if (var1[0] == 0) { -+ phydm_dump_mac_reg(dm, &used, output, &out_len); -+ phydm_dump_bb_reg(dm, &used, output, &out_len); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->ic_ip_series == PHYDM_IC_JGR3) -+ phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len); -+ #endif -+ -+ phydm_dump_rf_reg(dm, &used, output, &out_len); -+ } else if (var1[0] == 1) { -+ phydm_dump_bb_reg(dm, &used, output, &out_len); -+ } else if (var1[0] == 2) { -+ phydm_dump_rf_reg(dm, &used, output, &out_len); -+ } else if (var1[0] == 3) { -+ phydm_dump_mac_reg(dm, &used, output, &out_len); -+ } else if (var1[0] == 4) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->ic_ip_series == PHYDM_IC_JGR3) -+ phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len); -+ #endif -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_enable_big_jump(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+#if (RTL8822B_SUPPORT) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ u32 dm_value[10] = {0}; -+ u8 i, input_idx = 0; -+ u32 val; -+ -+ if (!(dm->support_ic_type & ODM_RTL8822B)) -+ return; -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); -+ input_idx++; -+ } -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ if (dm_value[0] == 0) { -+ dm->dm_dig_table.enable_adjust_big_jump = false; -+ -+ val = (dig_t->big_jump_step3 << 5) | -+ (dig_t->big_jump_step2 << 3) | -+ dig_t->big_jump_step1; -+ -+ odm_set_bb_reg(dm, R_0x8c8, 0xfe, val); -+ } else { -+ dm->dm_dig_table.enable_adjust_big_jump = true; -+ } -+#endif -+} -+ -+void phydm_show_rx_rate(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8814B_SUPPORT ||\ -+ RTL8195B_SUPPORT || RTL8822C_SUPPORT || RTL8723F_SUPPORT) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 var1[10] = {0}; -+ char help[] = "-h"; -+ u8 i, input_idx = 0; -+ -+ for (i = 0; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); -+ input_idx++; -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{1: show Rx rate, 0:reset counter}\n"); -+ *_used = used; -+ *_out_len = out_len; -+ return; -+ -+ } else if (var1[0] == 0) { -+ phydm_reset_rx_rate_distribution(dm); -+ *_used = used; -+ *_out_len = out_len; -+ return; -+ } -+ -+ /* @==Show SU Rate====================================================*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "=====Rx SU rate Statistics=====\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[SU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n", -+ dbg->num_qry_vht_pkt[0], dbg->num_qry_vht_pkt[1], -+ dbg->num_qry_vht_pkt[2], dbg->num_qry_vht_pkt[3], -+ dbg->num_qry_vht_pkt[4], dbg->num_qry_vht_pkt[5], -+ dbg->num_qry_vht_pkt[6], dbg->num_qry_vht_pkt[7], -+ dbg->num_qry_vht_pkt[8], dbg->num_qry_vht_pkt[9]); -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[SU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n", -+ dbg->num_qry_vht_pkt[10], dbg->num_qry_vht_pkt[11], -+ dbg->num_qry_vht_pkt[12], dbg->num_qry_vht_pkt[13], -+ dbg->num_qry_vht_pkt[14], dbg->num_qry_vht_pkt[15], -+ dbg->num_qry_vht_pkt[16], dbg->num_qry_vht_pkt[17], -+ dbg->num_qry_vht_pkt[18], dbg->num_qry_vht_pkt[19]); -+ } -+ #endif -+ /* @==Show MU Rate====================================================*/ -+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) || (defined(PHYSTS_3RD_TYPE_SUPPORT)) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "=====Rx MU rate Statistics=====\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[MU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n", -+ dbg->num_mu_vht_pkt[0], dbg->num_mu_vht_pkt[1], -+ dbg->num_mu_vht_pkt[2], dbg->num_mu_vht_pkt[3], -+ dbg->num_mu_vht_pkt[4], dbg->num_mu_vht_pkt[5], -+ dbg->num_mu_vht_pkt[6], dbg->num_mu_vht_pkt[7], -+ dbg->num_mu_vht_pkt[8], dbg->num_mu_vht_pkt[9]); -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[MU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n", -+ dbg->num_mu_vht_pkt[10], dbg->num_mu_vht_pkt[11], -+ dbg->num_mu_vht_pkt[12], dbg->num_mu_vht_pkt[13], -+ dbg->num_mu_vht_pkt[14], dbg->num_mu_vht_pkt[15], -+ dbg->num_mu_vht_pkt[16], dbg->num_mu_vht_pkt[17], -+ dbg->num_mu_vht_pkt[18], dbg->num_mu_vht_pkt[19]); -+ } -+ #endif -+#endif -+ *_used = used; -+ *_out_len = out_len; -+#endif -+} -+ -+void phydm_per_tone_evm(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i, j; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 var1[4] = {0}; -+ u32 val, tone_num, round; -+ s8 rxevm_0, rxevm_1; -+ s32 avg_num, evm_tone_0[256] = {0}, evm_tone_1[256] = {0}; -+ s32 rxevm_sum_0, rxevm_sum_1; -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ pr_debug("n series not support yet !\n"); -+ return; -+ } -+ -+ for (i = 0; i < 4; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ } -+ -+ avg_num = var1[0]; -+ round = var1[1]; -+ -+ if (!dm->is_linked) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "No Link !!\n"); -+ -+ *_used = used; -+ *_out_len = out_len; -+ -+ return; -+ } -+ -+ pr_debug("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", dm->curr_station_id, -+ 20 << *dm->band_width, *dm->channel); -+ pr_debug("avg_num =((%d)), round =((%d))\n", avg_num, round); -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ watchdog_stop(dm->priv); -+#endif -+ for (j = 0; j < round; j++) { -+ pr_debug("\nround((%d))\n", (j + 1)); -+ if (*dm->band_width == CHANNEL_WIDTH_20) { -+ for (tone_num = 228; tone_num <= 255; tone_num++) { -+ odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); -+ rxevm_sum_0 = 0; -+ rxevm_sum_1 = 0; -+ for (i = 0; i < avg_num; i++) { -+ val = odm_read_4byte(dm, R_0xf8c); -+ -+ rxevm_0 = (s8)((val & MASKBYTE2) >> 16); -+ rxevm_0 = (rxevm_0 / 2); -+ if (rxevm_0 < -63) -+ rxevm_0 = 0; -+ -+ rxevm_1 = (s8)((val & MASKBYTE3) >> 24); -+ rxevm_1 = (rxevm_1 / 2); -+ if (rxevm_1 < -63) -+ rxevm_1 = 0; -+ rxevm_sum_0 += rxevm_0; -+ rxevm_sum_1 += rxevm_1; -+ ODM_delay_ms(1); -+ } -+ evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); -+ evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); -+ pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n", -+ (256 - tone_num), evm_tone_0[tone_num], -+ evm_tone_1[tone_num]); -+ } -+ -+ for (tone_num = 1; tone_num <= 28; tone_num++) { -+ odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); -+ rxevm_sum_0 = 0; -+ rxevm_sum_1 = 0; -+ for (i = 0; i < avg_num; i++) { -+ val = odm_read_4byte(dm, R_0xf8c); -+ -+ rxevm_0 = (s8)((val & MASKBYTE2) >> 16); -+ rxevm_0 = (rxevm_0 / 2); -+ if (rxevm_0 < -63) -+ rxevm_0 = 0; -+ -+ rxevm_1 = (s8)((val & MASKBYTE3) >> 24); -+ rxevm_1 = (rxevm_1 / 2); -+ if (rxevm_1 < -63) -+ rxevm_1 = 0; -+ rxevm_sum_0 += rxevm_0; -+ rxevm_sum_1 += rxevm_1; -+ ODM_delay_ms(1); -+ } -+ evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); -+ evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); -+ pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n", -+ tone_num, evm_tone_0[tone_num], -+ evm_tone_1[tone_num]); -+ } -+ } else if (*dm->band_width == CHANNEL_WIDTH_40) { -+ for (tone_num = 198; tone_num <= 254; tone_num++) { -+ odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); -+ rxevm_sum_0 = 0; -+ rxevm_sum_1 = 0; -+ for (i = 0; i < avg_num; i++) { -+ val = odm_read_4byte(dm, R_0xf8c); -+ -+ rxevm_0 = (s8)((val & MASKBYTE2) >> 16); -+ rxevm_0 = (rxevm_0 / 2); -+ if (rxevm_0 < -63) -+ rxevm_0 = 0; -+ -+ rxevm_1 = (s8)((val & MASKBYTE3) >> 24); -+ rxevm_1 = (rxevm_1 / 2); -+ if (rxevm_1 < -63) -+ rxevm_1 = 0; -+ -+ rxevm_sum_0 += rxevm_0; -+ rxevm_sum_1 += rxevm_1; -+ ODM_delay_ms(1); -+ } -+ evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); -+ evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); -+ pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n", -+ (256 - tone_num), evm_tone_0[tone_num], -+ evm_tone_1[tone_num]); -+ } -+ -+ for (tone_num = 2; tone_num <= 58; tone_num++) { -+ odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); -+ rxevm_sum_0 = 0; -+ rxevm_sum_1 = 0; -+ for (i = 0; i < avg_num; i++) { -+ val = odm_read_4byte(dm, R_0xf8c); -+ -+ rxevm_0 = (s8)((val & MASKBYTE2) >> 16); -+ rxevm_0 = (rxevm_0 / 2); -+ if (rxevm_0 < -63) -+ rxevm_0 = 0; -+ -+ rxevm_1 = (s8)((val & MASKBYTE3) >> 24); -+ rxevm_1 = (rxevm_1 / 2); -+ if (rxevm_1 < -63) -+ rxevm_1 = 0; -+ rxevm_sum_0 += rxevm_0; -+ rxevm_sum_1 += rxevm_1; -+ ODM_delay_ms(1); -+ } -+ evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); -+ evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); -+ pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n", -+ tone_num, evm_tone_0[tone_num], -+ evm_tone_1[tone_num]); -+ } -+ } else if (*dm->band_width == CHANNEL_WIDTH_80) { -+ for (tone_num = 134; tone_num <= 254; tone_num++) { -+ odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); -+ rxevm_sum_0 = 0; -+ rxevm_sum_1 = 0; -+ for (i = 0; i < avg_num; i++) { -+ val = odm_read_4byte(dm, R_0xf8c); -+ -+ rxevm_0 = (s8)((val & MASKBYTE2) >> 16); -+ rxevm_0 = (rxevm_0 / 2); -+ if (rxevm_0 < -63) -+ rxevm_0 = 0; -+ -+ rxevm_1 = (s8)((val & MASKBYTE3) >> 24); -+ rxevm_1 = (rxevm_1 / 2); -+ if (rxevm_1 < -63) -+ rxevm_1 = 0; -+ rxevm_sum_0 += rxevm_0; -+ rxevm_sum_1 += rxevm_1; -+ ODM_delay_ms(1); -+ } -+ evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); -+ evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); -+ pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n", -+ (256 - tone_num), evm_tone_0[tone_num], -+ evm_tone_1[tone_num]); -+ } -+ -+ for (tone_num = 2; tone_num <= 122; tone_num++) { -+ odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num); -+ rxevm_sum_0 = 0; -+ rxevm_sum_1 = 0; -+ for (i = 0; i < avg_num; i++) { -+ val = odm_read_4byte(dm, R_0xf8c); -+ -+ rxevm_0 = (s8)((val & MASKBYTE2) >> 16); -+ rxevm_0 = (rxevm_0 / 2); -+ if (rxevm_0 < -63) -+ rxevm_0 = 0; -+ -+ rxevm_1 = (s8)((val & MASKBYTE3) >> 24); -+ rxevm_1 = (rxevm_1 / 2); -+ if (rxevm_1 < -63) -+ rxevm_1 = 0; -+ rxevm_sum_0 += rxevm_0; -+ rxevm_sum_1 += rxevm_1; -+ ODM_delay_ms(1); -+ } -+ evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num); -+ evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num); -+ pr_debug("Tone(%-3d) RXEVM (1ss/2ss)=%d, %d\n", -+ tone_num, evm_tone_0[tone_num], -+ evm_tone_1[tone_num]); -+ } -+ } -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_bw_ch_adjust(void *dm_void, char input[][16], -+ u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i; -+ boolean is_enable_dbg_mode; -+ u8 central_ch, primary_ch_idx; -+ enum channel_width bw; -+ -+#ifdef PHYDM_COMMON_API_SUPPORT -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{en} {CH} {pr_ch_idx 1/2/3/4/9/10} {0:20M,1:40M,2:80M}\n"); -+ goto out; -+ } -+ -+ if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Not support this API\n"); -+ goto out; -+ } -+ -+ for (i = 0; i < 4; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ } -+ -+ is_enable_dbg_mode = (boolean)var1[0]; -+ central_ch = (u8)var1[1]; -+ primary_ch_idx = (u8)var1[2]; -+ bw = (enum channel_width)var1[3]; -+ -+ if (is_enable_dbg_mode) { -+ dm->is_disable_phy_api = false; -+ phydm_api_switch_bw_channel(dm, central_ch, primary_ch_idx, bw); -+ dm->is_disable_phy_api = true; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "central_ch = %d, primary_ch_idx = %d, bw = %d\n", -+ central_ch, primary_ch_idx, bw); -+ } -+out: -+#endif -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_ext_rf_element_ctrl(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 val[10] = {0}; -+ u8 i = 0, input_idx = 0; -+ -+ for (i = 0; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]); -+ input_idx++; -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ if (val[0] == 1) /*@ext switch*/ { -+ phydm_set_ext_switch(dm, val[1]); -+ } -+} -+ -+void phydm_print_dbgport(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 dbg_port_value = 0; -+ u8 val[32]; -+ u8 tmp = 0; -+ u8 i; -+ -+ if (strcmp(input[1], help) == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{dbg_port_idx}\n"); -+ goto out; -+ } -+ -+ PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]); -+ -+ dm->debug_components |= ODM_COMP_API; -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, var1[0])) { -+ dbg_port_value = phydm_get_bb_dbg_port_val(dm); -+ phydm_release_bb_dbg_port(dm); -+ -+ for (i = 0; i < 32; i++) -+ val[i] = (u8)((dbg_port_value & BIT(i)) >> i); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Dbg Port[0x%x] = ((0x%x))\n", var1[0], -+ dbg_port_value); -+ -+ for (i = 4; i != 0; i--) { -+ tmp = 8 * (i - 1); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "val[%d:%d] = 8b'%d %d %d %d %d %d %d %d\n", -+ tmp + 7, tmp, val[tmp + 7], val[tmp + 6], -+ val[tmp + 5], val[tmp + 4], val[tmp + 3], -+ val[tmp + 2], val[tmp + 1], val[tmp + 0]); -+ } -+ } -+ dm->debug_components &= (~ODM_COMP_API); -+out: -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_get_anapar_table(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ enum rf_path i = RF_PATH_A; -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) -+ return; -+ -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "------ Analog parameters start ------\n"); -+ -+ for (i = RF_PATH_A; i < (enum rf_path)dm->num_rf_path; i++) -+ phydm_get_per_path_anapar_jgr3(dm, i, &used, output, &out_len); -+#endif -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_get_csi_table(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) -+ return; -+ -+ PDM_VAST_SNPF(out_len, used, output + used, out_len - used, -+ "------ CSI Table Parsing start ------\n"); -+ -+ phydm_get_csi_table_jgr3(dm, &used, output, &out_len); -+#endif -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_dd_dbg_dump(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "dump: {1}\n"); -+ return; -+ } else if (var1[0] == 1) { -+ /*[Reg]*/ -+ phydm_dump_mac_reg(dm, &used, output, &out_len); -+ phydm_dump_bb_reg(dm, &used, output, &out_len); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->ic_ip_series == PHYDM_IC_JGR3) -+ phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len); -+ #endif -+ -+ phydm_dump_rf_reg(dm, &used, output, &out_len); -+ /*[Dbg Port]*/ -+ #ifdef PHYDM_AUTO_DEGBUG -+ phydm_dbg_port_dump(dm, &used, output, &out_len); -+ #endif -+ /*[Analog Parameters]*/ -+ phydm_get_anapar_table(dm, &used, output, &out_len); -+ } -+} -+ -+void phydm_nss_hitogram_mp(void *dm_void, enum PDM_RATE_TYPE rate_type, -+ u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ char buf[PHYDM_SNPRINT_SIZE] = {0}; -+ u16 buf_size = PHYDM_SNPRINT_SIZE; -+ u16 h_size = PHY_HIST_SIZE; -+ u16 *evm_hist = &dbg_s->evm_1ss_hist[0]; -+ u16 *snr_hist = &dbg_s->snr_1ss_hist[0]; -+ u8 i = 0; -+ u8 ss = phydm_rate_type_2_num_ss(dm, rate_type); -+ -+ if (rate_type == PDM_OFDM) { -+ phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE, -+ buf, buf_size); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-14s=%s\n", "[OFDM][EVM]", buf); -+ -+ phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE, -+ buf, buf_size); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-14s=%s\n", "[OFDM][SNR]", buf); -+ -+ *_used = used; -+ *_out_len = out_len; -+ return; -+ } -+ -+ for (i = 0; i < ss; i++) { -+ if (rate_type == PDM_1SS) { -+ evm_hist = &dbg_s->evm_1ss_hist[0]; -+ snr_hist = &dbg_s->snr_1ss_hist[0]; -+ } else if (rate_type == PDM_2SS) { -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ evm_hist = &dbg_s->evm_2ss_hist[i][0]; -+ snr_hist = &dbg_s->snr_2ss_hist[i][0]; -+ #endif -+ } else if (rate_type == PDM_3SS) { -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ evm_hist = &dbg_s->evm_3ss_hist[i][0]; -+ snr_hist = &dbg_s->snr_3ss_hist[i][0]; -+ #endif -+ } else if (rate_type == PDM_4SS) { -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ evm_hist = &dbg_s->evm_4ss_hist[i][0]; -+ snr_hist = &dbg_s->snr_4ss_hist[i][0]; -+ #endif -+ } -+ -+ phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[%d-SS][EVM][%d]=%s\n", ss, i, buf); -+ phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[%d-SS][SNR][%d]=%s\n", ss, i, buf); -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_mp_dbg(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; -+ struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg; -+ char *rate_type = NULL; -+ u8 tmp_rssi_avg[4]; -+ u8 tmp_snr_avg[4]; -+ u8 tmp_evm_avg[4]; -+ u32 tmp_cnt = 0; -+ char buf[PHYDM_SNPRINT_SIZE] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 var1[10] = {0}; -+ u16 buf_size = PHYDM_SNPRINT_SIZE; -+ u16 th_size = PHY_HIST_SIZE - 1; -+ u8 i = 0; -+ -+ if (!(*dm->mp_mode)) -+ return; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "BW=((%d)), fc=((CH-%d))\n", -+ 20 << *dm->band_width, *dm->channel); -+ -+ /*@===[PHY Histogram]================================================*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[PHY Histogram] ==============>\n"); -+ /*@===[Threshold]===*/ -+ phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-16s=%s\n", "[EVM_TH]", buf); -+ phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%-16s=%s\n", "[SNR_TH]", buf); -+ /*@===[OFDM]===*/ -+ phydm_nss_hitogram_mp(dm, PDM_OFDM, &used, output, &out_len); -+ /*@===[1-SS]===*/ -+ phydm_nss_hitogram_mp(dm, PDM_1SS, &used, output, &out_len); -+ /*@===[2-SS]===*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) -+ phydm_nss_hitogram_mp(dm, PDM_2SS, &used, output, &out_len); -+ #endif -+ /*@===[3-SS]===*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS) -+ phydm_nss_hitogram_mp(dm, PDM_3SS, &used, output, &out_len); -+ #endif -+ /*@===[4-SS]===*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) -+ phydm_nss_hitogram_mp(dm, PDM_4SS, &used, output, &out_len); -+ #endif -+ /*@===[PHY Avg]======================================================*/ -+ phydm_get_avg_phystatus_val(dm); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[PHY Avg] ==============>\n"); -+ -+ phydm_get_avg_phystatus_val(dm); -+ -+ switch (dm->num_rf_path) { -+#if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case 4: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0], -+ dbg_avg->rssi_beacon_avg[1], -+ dbg_avg->rssi_beacon_avg[2], -+ dbg_avg->rssi_beacon_avg[3]); -+ break; -+#endif -+#if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case 3: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0], -+ dbg_avg->rssi_beacon_avg[1], -+ dbg_avg->rssi_beacon_avg[2]); -+ break; -+#endif -+#if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case 2: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0], -+ dbg_avg->rssi_beacon_avg[1]); -+ break; -+#endif -+ default: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", -+ "[Beacon]", dbg_s->rssi_beacon_cnt, -+ dbg_avg->rssi_beacon_avg[0]); -+ break; -+ } -+ -+ switch (dm->num_rf_path) { -+#ifdef PHYSTS_3RD_TYPE_SUPPORT -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case 4: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, -+ dbg_avg->rssi_cck_avg, -+ dbg_avg->rssi_cck_avg_abv_2ss[0], -+ dbg_avg->rssi_cck_avg_abv_2ss[1], -+ dbg_avg->rssi_cck_avg_abv_2ss[2]); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case 3: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, -+ dbg_avg->rssi_cck_avg, -+ dbg_avg->rssi_cck_avg_abv_2ss[0], -+ dbg_avg->rssi_cck_avg_abv_2ss[1]); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case 2: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, -+ dbg_avg->rssi_cck_avg, -+ dbg_avg->rssi_cck_avg_abv_2ss[0]); -+ break; -+ #endif -+#endif -+ default: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n", -+ "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg); -+ break; -+ } -+ -+ for (i = 0; i <= 4; i++) { -+ if (i > dm->num_rf_path) -+ break; -+ -+ odm_memory_set(dm, tmp_rssi_avg, 0, 4); -+ odm_memory_set(dm, tmp_snr_avg, 0, 4); -+ odm_memory_set(dm, tmp_evm_avg, 0, 4); -+ -+ switch (i) { -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case 4: -+ rate_type = "[4-SS]"; -+ tmp_cnt = dbg_s->rssi_4ss_cnt; -+ odm_move_memory(dm, tmp_rssi_avg, -+ dbg_avg->rssi_4ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_snr_avg, -+ dbg_avg->snr_4ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg, -+ 4); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case 3: -+ rate_type = "[3-SS]"; -+ tmp_cnt = dbg_s->rssi_3ss_cnt; -+ odm_move_memory(dm, tmp_rssi_avg, -+ dbg_avg->rssi_3ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_snr_avg, -+ dbg_avg->snr_3ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_evm_avg, -+ dbg_avg->evm_3ss_avg, 3); -+ break; -+ #endif -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case 2: -+ rate_type = "[2-SS]"; -+ tmp_cnt = dbg_s->rssi_2ss_cnt; -+ odm_move_memory(dm, tmp_rssi_avg, -+ dbg_avg->rssi_2ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg, -+ dm->num_rf_path); -+ odm_move_memory(dm, tmp_evm_avg, -+ dbg_avg->evm_2ss_avg, 2); -+ break; -+ #endif -+ case 1: -+ rate_type = "[1-SS]"; -+ tmp_cnt = dbg_s->rssi_1ss_cnt; -+ odm_move_memory(dm, tmp_rssi_avg, -+ dbg_avg->rssi_1ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_snr_avg, -+ dbg_avg->snr_1ss_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_evm_avg, -+ &dbg_avg->evm_1ss_avg, 1); -+ break; -+ default: -+ rate_type = "[L-OFDM]"; -+ tmp_cnt = dbg_s->rssi_ofdm_cnt; -+ odm_move_memory(dm, tmp_rssi_avg, -+ dbg_avg->rssi_ofdm_avg, -+ dm->num_rf_path); -+ odm_move_memory(dm, tmp_snr_avg, -+ dbg_avg->snr_ofdm_avg, dm->num_rf_path); -+ odm_move_memory(dm, tmp_evm_avg, -+ &dbg_avg->evm_ofdm_avg, 1); -+ break; -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n", -+ rate_type, tmp_cnt, -+ tmp_rssi_avg[0], tmp_rssi_avg[1], -+ tmp_rssi_avg[2], tmp_rssi_avg[3], -+ tmp_snr_avg[0], tmp_snr_avg[1], -+ tmp_snr_avg[2], tmp_snr_avg[3], -+ tmp_evm_avg[0], tmp_evm_avg[1], -+ tmp_evm_avg[2], tmp_evm_avg[3]); -+ } -+ -+ phydm_reset_phystatus_statistic(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n", -+ dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_reg_monitor(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ boolean en_mntr = false; -+ u8 i = 0; -+ -+ for (i = 0; i < 7; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ } -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "reg_mntr {en} {0:all, 1:BB, 2:RF, 3:MAC 4:1/2/4 byte}\n"); -+ } else { -+ if (var1[0] == 1) -+ en_mntr = true; -+ else -+ en_mntr = false; -+ -+ if (var1[1] == 0) { -+ dm->en_reg_mntr_bb = en_mntr; -+ dm->en_reg_mntr_rf = en_mntr; -+ dm->en_reg_mntr_mac = en_mntr; -+ dm->en_reg_mntr_byte = en_mntr; -+ } else if (var1[1] == 1) { -+ dm->en_reg_mntr_bb = en_mntr; -+ } else if (var1[1] == 2) { -+ dm->en_reg_mntr_rf = en_mntr; -+ } else if (var1[1] == 3) { -+ dm->en_reg_mntr_mac = en_mntr; -+ } else if (var1[1] == 4) { -+ dm->en_reg_mntr_byte = en_mntr; -+ } -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "en: BB:%d, RF:%d, MAC:%d, byte:%d\n", dm->en_reg_mntr_bb, -+ dm->en_reg_mntr_rf, dm->en_reg_mntr_mac, dm->en_reg_mntr_byte); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#if (RTL8822C_SUPPORT) -+u16 phydm_get_agc_rf_gain(void *dm_void, boolean is_mod, u8 tab, u8 mp_gain_i) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 rf_gain = 0x0; -+ -+ if (is_mod) -+ rf_gain = dm->agc_rf_gain[tab][mp_gain_i]; -+ else -+ rf_gain = dm->agc_rf_gain_ori[tab][mp_gain_i]; -+ -+ return rf_gain; -+} -+#endif -+ -+void phydm_get_rxagc_table_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 tab = 0; -+ boolean is_modified = false; -+ u8 mp_gain = 0; -+ u16 rf_gain = 0; -+ u8 i = 0; -+ -+#if (RTL8822C_SUPPORT) -+ if (!(dm->support_ic_type & ODM_RTL8822C)) -+ return; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "get rxagc table : {0:ori, 1:modified} {table:0~15} {mp_gain_idx:0~63, all:0xff}\n"); -+ } else { -+ for (i = 0; i < 3; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); -+ } -+ -+ is_modified = (boolean)var1[0]; -+ tab = (u8)var1[1]; -+ mp_gain = (u8)var1[2]; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "agc_table_cnt:%d, is_agc_tab_pos_shift:%d, agc_table_shift:%d\n", -+ dm->agc_table_cnt, dm->is_agc_tab_pos_shift, -+ dm->agc_table_shift); -+ -+ if (mp_gain == 0xff) { -+ for (i = 0; i < 64; i++) { -+ rf_gain = phydm_get_agc_rf_gain(dm, is_modified, -+ tab, i); -+ -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "agc_table:%d, mp_gain_idx:0x%x, rf_gain_idx:0x%x\n", -+ tab, i, rf_gain); -+ } -+ } else { -+ rf_gain = phydm_get_agc_rf_gain(dm, is_modified, tab, -+ mp_gain); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "agc_table:%d, mp_gain_idx:0x%x, rf_gain_idx:0x%x\n", -+ tab, mp_gain, rf_gain); -+ } -+ } -+#endif -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_shift_rxagc_table_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ u16 value_db = 0; -+ -+#if (RTL8822C_SUPPORT) -+ if (!(dm->support_ic_type & ODM_RTL8822C)) -+ return; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "shift rxagc table : {0:-, 1:+} {value(0~63, unit:2dB)}\n"); -+ } else { -+ for (i = 0; i < 3; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var1[i]); -+ } -+ -+ if ((u8)var1[1] > 63) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Do not enter the value larger than 63!\n"); -+ } else { -+ phydm_shift_rxagc_table(dm, (boolean)var1[0], -+ (u8)var1[1]); -+ -+ value_db = (u8)var1[1] << 1; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "shift %s%d dB gain\n", -+ (((boolean)var1[0]) ? "+" : "-"), value_db); -+ } -+ } -+#endif -+} -+ -+#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT) -+void phydm_spur_detect_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 i; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{0: Auto spur detect(NBI+CSI), 1:NBI always ON/ CSI Auto,"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "2: CSI always On/ NBI Auto, 3: Disable, 4: CSI & NBI ON}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{If CSI always ON (Mode 2 or 4) -> CSI wgt manual(0~7)}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{5: Adjust CSI weight threshold} {0:-,1:+} {th offset}\n"); -+ } else { -+ for (i = 0; i < 10; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var1[i]); -+ } -+ -+ if (var1[0] == 1) { -+ dm->dsde_sel = DET_NBI; -+ } else if (var1[0] == 2) { -+ dm->dsde_sel = DET_CSI; -+ } else if (var1[0] == 3) { -+ dm->dsde_sel = DET_DISABLE; -+ } else if (var1[0] == 4) { -+ dm->dsde_sel = DET_CSI_NBI_EN; -+ } else if (var1[0] == 0) { -+ dm->dsde_sel = DET_AUTO; -+ } else if (var1[0] == 5) { -+ if (var1[1] == 0) -+ for (i = 0; i < 5; i++) -+ dm->csi_wgt_th_db[i] -= (u8)var1[2]; -+ else if (var1[1] == 1) -+ for (i = 0; i < 5; i++) -+ dm->csi_wgt_th_db[i] += (u8)var1[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, "current csi weight threshold:\n"); -+ for (i = 0; i < 5; i++) -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "----%2d", -+ dm->csi_wgt_th_db[i]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, "\n"); -+ for (i = 0; i < 5; i++) -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "--%d--|", i); -+ PDM_SNPF(out_len, used, output + used, out_len - used, "\n"); -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Spur detection mode invalid!\n"); -+ return; -+ } -+ if (var1[0] < 5) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "spur detect mode = %d\n", dm->dsde_sel); -+ -+ if (dm->dsde_sel == DET_CSI_NBI_EN) { -+ if (var1[1] < 8) { -+ dm->csi_wgt = (u8)var1[1]; -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "CSI wgt %d\n", -+ dm->csi_wgt); -+ } else { -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "CSI wgt setting invalid. Please set the correct wgt!\n"); -+ return; -+ } -+ } -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -+ -+struct phydm_command { -+ char name[16]; -+ u8 id; -+}; -+ -+enum PHYDM_CMD_ID { -+ PHYDM_HELP, -+ PHYDM_DEMO, -+ PHYDM_RF_CMD, -+ PHYDM_DIG, -+ PHYDM_RA, -+ PHYDM_PROFILE, -+ PHYDM_ANTDIV, -+ PHYDM_PATHDIV, -+ PHYDM_DEBUG, -+ PHYDM_MP_DEBUG, -+ PHYDM_FW_DEBUG, -+ PHYDM_SUPPORT_ABILITY, -+ PHYDM_GET_TXAGC, -+ PHYDM_SET_TXAGC, -+ PHYDM_SMART_ANT, -+ PHYDM_CH_BW, -+ PHYDM_TRX_PATH, -+ PHYDM_LA_MODE, -+ PHYDM_DUMP_REG, -+ PHYDM_AUTO_DBG, -+ PHYDM_DD_DBG, -+ PHYDM_BIG_JUMP, -+ PHYDM_SHOW_RXRATE, -+ PHYDM_NBI_EN, -+ PHYDM_CSI_MASK_EN, -+ PHYDM_DFS_DEBUG, -+ PHYDM_DFS_HIST, -+ PHYDM_NHM, -+ PHYDM_CLM, -+ PHYDM_FAHM, -+ PHYDM_ENV_MNTR, -+ PHYDM_BB_INFO, -+ //PHYDM_TXBF, -+ PHYDM_H2C, -+ PHYDM_EXT_RF_E_CTRL, -+ PHYDM_ADAPTIVE_SOML, -+ PHYDM_PSD, -+ PHYDM_DEBUG_PORT, -+ PHYDM_DIS_HTSTF_CONTROL, -+ PHYDM_CFO_TRK, -+ PHYDM_ADAPTIVITY_DEBUG, -+ PHYDM_DIS_DYM_ANT_WEIGHTING, -+ PHYDM_FORECE_PT_STATE, -+ PHYDM_STA_INFO, -+ PHYDM_PAUSE_FUNC, -+ PHYDM_PER_TONE_EVM, -+ PHYDM_DYN_TXPWR, -+ PHYDM_LNA_SAT, -+ PHYDM_ANAPAR, -+ PHYDM_CCK_RX_PATHDIV, -+ PHYDM_BEAM_FORMING, -+ PHYDM_REG_MONITOR, -+#if RTL8814B_SUPPORT -+ PHYDM_SPUR_DETECT, -+#endif -+ PHYDM_PHY_STATUS, -+ PHYDM_CRC32_CNT, -+ PHYDM_DCC, -+#ifdef PHYDM_HW_IGI -+ PHYDM_HWIGI, -+#endif -+#ifdef PHYDM_HW_SWITCH_AGC_TAB -+ PHYDM_HW_AGCTAB, -+#endif -+ PHYDM_PMAC_TX, -+ PHYDM_GET_RXAGC, -+ PHYDM_SHIFT_RXAGC, -+ PHYDM_IFS_CLM, -+ PHYDM_ENHANCE_MNTR, -+ PHYDM_CSI_DBG -+}; -+ -+struct phydm_command phy_dm_ary[] = { -+ {"-h", PHYDM_HELP}, /*@do not move this element to other position*/ -+ {"demo", PHYDM_DEMO}, /*@do not move this element to other position*/ -+ {"rf", PHYDM_RF_CMD}, -+ {"dig", PHYDM_DIG}, -+ {"ra", PHYDM_RA}, -+ {"profile", PHYDM_PROFILE}, -+ {"antdiv", PHYDM_ANTDIV}, -+ {"pathdiv", PHYDM_PATHDIV}, -+ {"dbg", PHYDM_DEBUG}, -+ {"mp_dbg", PHYDM_MP_DEBUG}, -+ {"fw_dbg", PHYDM_FW_DEBUG}, -+ {"ability", PHYDM_SUPPORT_ABILITY}, -+ {"get_txagc", PHYDM_GET_TXAGC}, -+ {"set_txagc", PHYDM_SET_TXAGC}, -+ {"smtant", PHYDM_SMART_ANT}, -+ {"ch_bw", PHYDM_CH_BW}, -+ {"trxpath", PHYDM_TRX_PATH}, -+ {"lamode", PHYDM_LA_MODE}, -+ {"dumpreg", PHYDM_DUMP_REG}, -+ {"auto_dbg", PHYDM_AUTO_DBG}, -+ {"dd_dbg", PHYDM_DD_DBG}, -+ {"bigjump", PHYDM_BIG_JUMP}, -+ {"rxrate", PHYDM_SHOW_RXRATE}, -+ {"nbi", PHYDM_NBI_EN}, -+ {"csi_mask", PHYDM_CSI_MASK_EN}, -+ {"dfs", PHYDM_DFS_DEBUG}, -+ {"dfs_hist", PHYDM_DFS_HIST}, -+ {"nhm", PHYDM_NHM}, -+ {"clm", PHYDM_CLM}, -+ {"fahm", PHYDM_FAHM}, -+ {"env_mntr", PHYDM_ENV_MNTR}, -+ {"bbinfo", PHYDM_BB_INFO}, -+ /*{"txbf", PHYDM_TXBF},*/ -+ {"h2c", PHYDM_H2C}, -+ {"ext_rfe", PHYDM_EXT_RF_E_CTRL}, -+ {"soml", PHYDM_ADAPTIVE_SOML}, -+ {"psd", PHYDM_PSD}, -+ {"dbgport", PHYDM_DEBUG_PORT}, -+ {"dis_htstf", PHYDM_DIS_HTSTF_CONTROL}, -+ {"cfo_trk", PHYDM_CFO_TRK}, -+ {"adapt_debug", PHYDM_ADAPTIVITY_DEBUG}, -+ {"dis_dym_ant_wgt", PHYDM_DIS_DYM_ANT_WEIGHTING}, -+ {"force_pt_state", PHYDM_FORECE_PT_STATE}, -+ {"sta_info", PHYDM_STA_INFO}, -+ {"pause", PHYDM_PAUSE_FUNC}, -+ {"evm", PHYDM_PER_TONE_EVM}, -+ {"dyn_txpwr", PHYDM_DYN_TXPWR}, -+ {"lna_sat", PHYDM_LNA_SAT}, -+ {"anapar", PHYDM_ANAPAR}, -+ {"cck_rx_pathdiv", PHYDM_CCK_RX_PATHDIV}, -+ {"bf", PHYDM_BEAM_FORMING}, -+ {"reg_mntr", PHYDM_REG_MONITOR}, -+#if RTL8814B_SUPPORT -+ {"spur_detect", PHYDM_SPUR_DETECT}, -+#endif -+ {"physts", PHYDM_PHY_STATUS}, -+ {"crc32_cnt", PHYDM_CRC32_CNT}, -+#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT -+ {"pmac_tx", PHYDM_PMAC_TX}, -+#endif -+#ifdef PHYDM_HW_IGI -+ {"hwigi", PHYDM_HWIGI}, -+#endif -+#ifdef PHYDM_HW_SWITCH_AGC_TAB -+ {"hw_agctab", PHYDM_HW_AGCTAB}, -+#endif -+ {"dcc", PHYDM_DCC}, -+ {"get_rxagc", PHYDM_GET_RXAGC}, -+ {"shift_rxagc", PHYDM_SHIFT_RXAGC}, -+ {"ifs_clm", PHYDM_IFS_CLM}, -+ {"enh_mntr", PHYDM_ENHANCE_MNTR}, -+ {"csi_dbg", PHYDM_CSI_DBG} -+ }; -+ -+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ -+ -+void phydm_cmd_parser(struct dm_struct *dm, char input[][MAX_ARGV], -+ u32 input_num, u8 flag, char *output, u32 out_len) -+{ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+ u32 used = 0; -+ u8 id = 0; -+ u32 var1[10] = {0}; -+ u32 i; -+ u32 phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct phydm_command); -+ -+ if (flag == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "GET, nothing to print\n"); -+ return; -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, "\n"); -+ -+ /* Parsing Cmd ID */ -+ if (input_num) { -+ for (i = 0; i < phydm_ary_size; i++) { -+ if (strcmp(phy_dm_ary[i].name, input[0]) == 0) { -+ id = phy_dm_ary[i].id; -+ break; -+ } -+ } -+ if (i == phydm_ary_size) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "PHYDM command not found!\n"); -+ return; -+ } -+ } -+ -+ switch (id) { -+ case PHYDM_HELP: { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "BB cmd ==>\n"); -+ -+ for (i = 0; i < phydm_ary_size - 2; i++) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " %-5d: %s\n", i, phy_dm_ary[i + 2].name); -+ } break; -+ -+ case PHYDM_DEMO: { /*@echo demo 10 0x3a z abcde >cmd*/ -+ u32 directory = 0; -+ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP)) -+ char char_temp; -+ #else -+ u32 char_temp = ' '; -+ #endif -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Decimal value = %d\n", directory); -+ PHYDM_SSCANF(input[2], DCMD_HEX, &directory); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Hex value = 0x%x\n", directory); -+ PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Char = %c\n", char_temp); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "String = %s\n", input[4]); -+ } break; -+ case PHYDM_RF_CMD: -+ halrf_cmd_parser(dm, input, &used, output, &out_len, input_num); -+ break; -+ -+ case PHYDM_DIG: -+ phydm_dig_debug(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_RA: -+ phydm_ra_debug(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_ANTDIV: -+ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ phydm_antdiv_debug(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_PATHDIV: -+ #if (defined(CONFIG_PATH_DIVERSITY)) -+ phydm_pathdiv_debug(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_DEBUG: -+ phydm_debug_trace(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_MP_DEBUG: -+ phydm_mp_dbg(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_FW_DEBUG: -+ phydm_fw_debug_trace(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_SUPPORT_ABILITY: -+ phydm_supportability_en(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_SMART_ANT: -+ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 -+ phydm_hl_smt_ant_dbg_type2(dm, input, &used, output, &out_len); -+ #elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) -+ phydm_hl_smart_ant_debug(dm, input, &used, output, &out_len); -+ #endif -+ -+ #elif (defined(CONFIG_CUMITEK_SMART_ANTENNA)) -+ phydm_cumitek_smt_ant_debug(dm, input, &used, output, &out_len); -+ #endif -+ -+ break; -+ -+ case PHYDM_CH_BW: -+ phydm_bw_ch_adjust(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_PROFILE: -+ phydm_basic_profile(dm, &used, output, &out_len); -+ break; -+ -+ case PHYDM_GET_TXAGC: -+ phydm_get_txagc(dm, &used, output, &out_len); -+ break; -+ -+ case PHYDM_SET_TXAGC: -+ phydm_set_txagc_dbg(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_TRX_PATH: -+ phydm_config_trx_path(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_LA_MODE: -+ #if (PHYDM_LA_MODE_SUPPORT) -+ phydm_la_cmd(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_DUMP_REG: -+ phydm_dump_reg(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_BIG_JUMP: -+ phydm_enable_big_jump(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_AUTO_DBG: -+ #ifdef PHYDM_AUTO_DEGBUG -+ phydm_auto_dbg_console(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_DD_DBG: -+ phydm_dd_dbg_dump(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_SHOW_RXRATE: -+ phydm_show_rx_rate(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_NBI_EN: -+ phydm_nbi_debug(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_CSI_MASK_EN: -+ phydm_csi_debug(dm, input, &used, output, &out_len); -+ break; -+ -+ #ifdef CONFIG_PHYDM_DFS_MASTER -+ case PHYDM_DFS_DEBUG: -+ phydm_dfs_debug(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_DFS_HIST: -+ phydm_dfs_hist_dbg(dm, input, &used, output, &out_len); -+ break; -+ #endif -+ -+ case PHYDM_NHM: -+ #ifdef NHM_SUPPORT -+ phydm_nhm_dbg(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_CLM: -+ #ifdef CLM_SUPPORT -+ phydm_clm_dbg(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ #ifdef FAHM_SUPPORT -+ case PHYDM_FAHM: -+ phydm_fahm_dbg(dm, input, &used, output, &out_len); -+ break; -+ #endif -+ -+ case PHYDM_ENV_MNTR: -+ phydm_env_mntr_dbg(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_BB_INFO: -+ phydm_bb_hw_dbg_info(dm, input, &used, output, &out_len); -+ break; -+ /* -+ case PHYDM_TXBF: { -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ #ifdef PHYDM_BEAMFORMING_SUPPORT -+ struct _RT_BEAMFORMING_INFO *beamforming_info = NULL; -+ -+ beamforming_info = &dm->beamforming_info; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ if (var1[0] == 0) { -+ beamforming_info->apply_v_matrix = false; -+ beamforming_info->snding3ss = true; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n dont apply V matrix and 3SS 789 snding\n"); -+ } else if (var1[0] == 1) { -+ beamforming_info->apply_v_matrix = true; -+ beamforming_info->snding3ss = true; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n apply V matrix and 3SS 789 snding\n"); -+ } else if (var1[0] == 2) { -+ beamforming_info->apply_v_matrix = true; -+ beamforming_info->snding3ss = false; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n default txbf setting\n"); -+ } else -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "\r\n unknown cmd!!\n"); -+ #endif -+ #endif -+ } break; -+ */ -+ case PHYDM_H2C: -+ phydm_h2C_debug(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_EXT_RF_E_CTRL: -+ phydm_ext_rf_element_ctrl(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_ADAPTIVE_SOML: -+ #ifdef CONFIG_ADAPTIVE_SOML -+ phydm_soml_debug(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_PSD: -+ -+ #ifdef CONFIG_PSD_TOOL -+ phydm_psd_debug(dm, input, &used, output, &out_len); -+ #endif -+ -+ break; -+ -+ case PHYDM_DEBUG_PORT: -+ phydm_print_dbgport(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_DIS_HTSTF_CONTROL: { -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if (var1[0] == 1) { -+ /* setting being false is for debug */ -+ dm->bhtstfdisabled = true; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Dynamic HT-STF Gain Control is Disable\n"); -+ } else { -+ /* @default setting should be true, -+ * always be dynamic control -+ */ -+ dm->bhtstfdisabled = false; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Dynamic HT-STF Gain Control is Enable\n"); -+ } -+ } break; -+ -+ case PHYDM_CFO_TRK: -+ phydm_cfo_tracking_debug(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_ADAPTIVITY_DEBUG: -+ #ifdef PHYDM_SUPPORT_ADAPTIVITY -+ phydm_adaptivity_debug(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_DIS_DYM_ANT_WEIGHTING: -+ #ifdef DYN_ANT_WEIGHTING_SUPPORT -+ phydm_ant_weight_dbg(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_FORECE_PT_STATE: -+ #ifdef PHYDM_POWER_TRAINING_SUPPORT -+ phydm_pow_train_debug(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_STA_INFO: -+ phydm_show_sta_info(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_PAUSE_FUNC: -+ phydm_pause_func_console(dm, input, &used, output, &out_len); -+ break; -+ -+ case PHYDM_PER_TONE_EVM: -+ phydm_per_tone_evm(dm, input, &used, output, &out_len); -+ break; -+ -+ #ifdef CONFIG_DYNAMIC_TX_TWR -+ case PHYDM_DYN_TXPWR: -+ phydm_dtp_debug(dm, input, &used, output, &out_len); -+ break; -+ #endif -+ -+ case PHYDM_LNA_SAT: -+ #ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ phydm_lna_sat_debug(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_ANAPAR: -+ phydm_get_anapar_table(dm, &used, output, &out_len); -+ break; -+ case PHYDM_CCK_RX_PATHDIV: -+ #ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT -+ phydm_cck_rx_pathdiv_dbg(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ -+ case PHYDM_BEAM_FORMING: -+ #ifdef CONFIG_BB_TXBF_API -+ phydm_bf_debug(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ case PHYDM_REG_MONITOR: -+ phydm_reg_monitor(dm, input, &used, output, &out_len); -+ break; -+ -+#if RTL8814B_SUPPORT -+ case PHYDM_SPUR_DETECT: -+ phydm_spur_detect_dbg(dm, input, &used, output, &out_len); -+ break; -+#endif -+ case PHYDM_CRC32_CNT: -+ phydm_crc32_cnt_dbg(dm, input, &used, output, &out_len); -+ break; -+ case PHYDM_PHY_STATUS: -+ phydm_physts_dbg(dm, input, &used, output, &out_len); -+ break; -+#ifdef PHYDM_DCC_ENHANCE -+ case PHYDM_DCC: -+ phydm_dig_cckpd_coex_dbg(dm, input, &used, output, &out_len); -+ break; -+#endif -+#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT -+ case PHYDM_PMAC_TX: -+ phydm_pmac_tx_dbg(dm, input, &used, output, &out_len); -+ break; -+#endif -+#ifdef PHYDM_HW_IGI -+ case PHYDM_HWIGI: -+ phydm_hwigi_dbg(dm, input, &used, output, &out_len); -+ break; -+#endif -+#ifdef PHYDM_HW_SWITCH_AGC_TAB -+ case PHYDM_HW_AGCTAB: -+ phydm_auto_agc_tab_debug(dm, input, &used, output, &out_len); -+ break; -+#endif -+ case PHYDM_GET_RXAGC: -+ phydm_get_rxagc_table_dbg(dm, input, &used, output, &out_len); -+ break; -+ case PHYDM_SHIFT_RXAGC: -+ phydm_shift_rxagc_table_dbg(dm, input, &used, output, &out_len); -+ break; -+ case PHYDM_IFS_CLM: -+ #ifdef IFS_CLM_SUPPORT -+ phydm_ifs_clm_dbg(dm, input, &used, output, &out_len); -+ #endif -+ break; -+ case PHYDM_ENHANCE_MNTR: -+ phydm_enhance_mntr_dbg(dm, input, &used, output, &out_len); -+ break; -+ case PHYDM_CSI_DBG: -+ phydm_get_csi_table(dm, &used, output, &out_len); -+ break; -+ default: -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Do not support this command\n"); -+ break; -+ } -+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ -+} -+ -+#if defined __ECOS || defined __ICCARM__ -+#ifndef strsep -+char *strsep(char **s, const char *ct) -+{ -+ char *sbegin = *s; -+ char *end; -+ -+ if (!sbegin) -+ return NULL; -+ -+ end = strpbrk(sbegin, ct); -+ if (end) -+ *end++ = '\0'; -+ *s = end; -+ return sbegin; -+} -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP | ODM_IOT)) -+s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag, -+ char *output, u32 out_len) -+{ -+ char *token; -+ u32 argc = 0; -+ char argv[MAX_ARGC][MAX_ARGV]; -+ -+ do { -+ token = strsep(&input, ", "); -+ if (token) { -+ if (strlen(token) <= MAX_ARGV) -+ strcpy(argv[argc], token); -+ -+ argc++; -+ } else { -+ break; -+ } -+ } while (argc < MAX_ARGC); -+ -+ if (argc == 1) -+ argv[0][strlen(argv[0]) - 1] = '\0'; -+ -+ phydm_cmd_parser(dm, argv, argc, flag, output, out_len); -+ -+ return 0; -+} -+#endif -+ -+void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) -+{ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /*@u8 debug_trace_11byte[60];*/ -+ u8 freg_num, c2h_seq, buf_0 = 0; -+ -+ if (!(dm->support_ic_type & PHYDM_IC_3081_SERIES)) -+ return; -+ -+ if (cmd_len > 12 || cmd_len == 0) { -+ pr_debug("[Warning] Error C2H cmd_len=%d\n", cmd_len); -+ return; -+ } -+ -+ buf_0 = cmd_buf[0]; -+ freg_num = (buf_0 & 0xf); -+ c2h_seq = (buf_0 & 0xf0) >> 4; -+ -+ #if 0 -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW debug message] freg_num = (( %d )), c2h_seq=(( %d ))\n", -+ freg_num, c2h_seq); -+ -+ strncpy(debug_trace_11byte, &cmd_buf[1], (cmd_len - 1)); -+ debug_trace_11byte[cmd_len - 1] = '\0'; -+ PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] %s\n", -+ debug_trace_11byte); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] cmd_len = (( %d ))\n", -+ cmd_len); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] c2h_cmd_start=((%d))\n", -+ dm->c2h_cmd_start); -+ -+ PHYDM_DBG(dm, DBG_FW_TRACE, "pre_seq = (( %d )), current_seq=((%d))\n", -+ dm->pre_c2h_seq, c2h_seq); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "fw_buff_is_enpty = (( %d ))\n", -+ dm->fw_buff_is_enpty); -+ #endif -+ -+ if (c2h_seq != dm->pre_c2h_seq && dm->fw_buff_is_enpty == false) { -+ dm->fw_debug_trace[dm->c2h_cmd_start] = '\0'; -+ PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Dbg Queue Overflow] %s\n", -+ dm->fw_debug_trace); -+ dm->c2h_cmd_start = 0; -+ } -+ -+ if ((cmd_len - 1) > (60 - dm->c2h_cmd_start)) { -+ dm->fw_debug_trace[dm->c2h_cmd_start] = '\0'; -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW Dbg Queue error: wrong C2H length] %s\n", -+ dm->fw_debug_trace); -+ dm->c2h_cmd_start = 0; -+ return; -+ } -+ -+ strncpy((char *)&dm->fw_debug_trace[dm->c2h_cmd_start], -+ (char *)&cmd_buf[1], (cmd_len - 1)); -+ dm->c2h_cmd_start += (cmd_len - 1); -+ dm->fw_buff_is_enpty = false; -+ -+ if (freg_num == 0 || dm->c2h_cmd_start >= 60) { -+ if (dm->c2h_cmd_start < 60) -+ dm->fw_debug_trace[dm->c2h_cmd_start] = '\0'; -+ else -+ dm->fw_debug_trace[59] = '\0'; -+ -+ PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n", -+ dm->fw_debug_trace); -+ -+ dm->c2h_cmd_start = 0; -+ dm->fw_buff_is_enpty = true; -+ } -+ -+ dm->pre_c2h_seq = c2h_seq; -+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ -+} -+ -+void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len) -+{ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 function = buffer[0]; -+ u8 dbg_num = buffer[1]; -+ u16 content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]); -+ u16 content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]); -+ u16 content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]); -+ u16 content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]); -+ u16 content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]); -+ -+ if (cmd_len > 12) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW Msg] Invalid cmd length (( %d )) >12\n", -+ cmd_len); -+/*@--------------------------------------------*/ -+#ifdef CONFIG_RA_FW_DBG_CODE -+ if (function == RATE_DECISION) { -+ if (dbg_num == 0) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n", -+ content_1, content_2); -+ else if (content_0 == 2) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n", -+ content_1, content_2, content_3, -+ content_4); -+ else if (content_0 == 3) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n", -+ content_1, content_2, content_3, -+ content_4); -+ } else if (dbg_num == 1) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n", -+ content_1, content_2, content_3, -+ content_4); -+ else if (content_0 == 2) { -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))", -+ content_1, content_2, content_3, -+ content_4); -+ phydm_print_rate(dm, (u8)content_4, -+ DBG_FW_TRACE); -+ } else if (content_0 == 3) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] penality_idx=(( %d ))\n", -+ content_1); -+ else if (content_0 == 4) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] RSSI=(( %d )), ra_stage = (( %d ))\n", -+ content_1, content_2); -+ } else if (dbg_num == 3) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", -+ content_1, content_2, content_3, -+ content_4); -+ else if (content_0 == 2) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", -+ content_1, content_2, content_3, -+ content_4); -+ else if (content_0 == 3) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] Fast_RA (( UP )) ((rate Down Hold)) RA_CNT=((%d))\n", -+ content_1); -+ else if (content_0 == 4) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n", -+ content_1); -+ else if (content_0 == 8) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n", -+ content_1); -+ } else if (dbg_num == 4) { -+ if (content_0 == 3) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] RER_CNT PCR_ori =(( %d )), ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n", -+ content_1, content_2, content_3, -+ content_4); -+ else if (content_0 == 4) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n", -+ ((content_1) ? "+" : "-"), content_2, -+ content_3, content_4); -+ else if (content_0 == 5) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n", -+ content_1, content_2, content_3, -+ content_4); -+ } else if (dbg_num == 5) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] (( UP)) Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n", -+ content_1, content_2, content_3, -+ content_4); -+ else if (content_0 == 2) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] ((DOWN)) Nsc=(( %d )), N_Low=(( %d ))\n", -+ content_1, content_2); -+ else if (content_0 == 3) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n", -+ content_1, content_2, content_3, -+ content_4); -+ } else if (dbg_num == 0x60) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n", -+ content_1, content_2); -+ else if (content_0 == 4) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n", -+ content_1, content_2, content_3, -+ content_4); -+ else if (content_0 == 5) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n", -+ content_1, content_2, content_3, -+ content_4); -+ } -+ } else if (function == INIT_RA_TABLE) { -+ if (dbg_num == 3) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n", -+ content_0); -+ } else if (function == RATE_UP) { -+ if (dbg_num == 2) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][RateUp] ((Highest rate->return)), macid=((%d)) Nsc=((%d))\n", -+ content_1, content_2); -+ } else if (dbg_num == 5) { -+ if (content_0 == 0) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][RateUp] ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n", -+ content_1, content_2, content_3, -+ content_4); -+ else if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][RateUp] ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n", -+ content_1, content_2, content_3, -+ content_4); -+ } -+ } else if (function == RATE_DOWN) { -+ if (dbg_num == 5) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][RateDownStep] ((rate Down)), macid=((%d)), rate1=((0x%x)), rate2=((0x%x)), BW=((%d))\n", -+ content_1, content_2, content_3, -+ content_4); -+ } -+ } else if (function == TRY_DONE) { -+ if (dbg_num == 1) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n", -+ content_1, content_2); -+ } else if (dbg_num == 2) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][Try Done] ((try)) macid=((%d)), Try_Done_cnt=((%d)), rate_2=((%d)), try_succes=((%d))\n", -+ content_1, content_2, content_3, -+ content_4); -+ } -+ } else if (function == RA_H2C) { -+ if (dbg_num == 1) { -+ if (content_0 == 0) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][H2C=0x49] fw_trace_en=((%d)), mode =((%d)), macid=((%d))\n", -+ content_1, content_2, content_3); -+ } -+ } else if (function == F_RATE_AP_RPT) { -+ if (dbg_num == 1) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n", -+ content_3); -+ } else if (dbg_num == 2) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][AP RPT] RTY_all=((%d))\n", -+ content_1); -+ } else if (dbg_num == 3) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n", -+ content_3, content_1, content_2); -+ } else if (dbg_num == 4) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n", -+ content_3, content_1, content_2); -+ } else if (dbg_num == 5) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n", -+ content_3, content_1, content_2); -+ } else if (dbg_num == 6) { -+ if (content_0 == 1) -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n", -+ content_3, content_1, content_2); -+ } -+ } else if (function == DBC_FW_CLM) { -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][CLM][%d, %d] = {%d, %d, %d, %d}\n", dbg_num, -+ content_0, content_1, content_2, content_3, -+ content_4); -+ } else { -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", -+ function, dbg_num, content_0, content_1, content_2, -+ content_3, content_4); -+ } -+#else -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function, -+ dbg_num, content_0, content_1, content_2, content_3, -+ content_4); -+#endif -+/*@--------------------------------------------*/ -+ -+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ -+} -+ -+void phydm_fw_trace_handler_8051(void *dm_void, u8 *buffer, u8 cmd_len) -+{ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ int i = 0; -+ u8 extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0; -+ u8 extend_c2h_dbg_seq = 0; -+ u8 fw_debug_trace[128]; -+ u8 *extend_c2h_dbg_content = 0; -+ -+ if (cmd_len > 127) -+ return; -+ -+ extend_c2h_sub_id = buffer[0]; -+ extend_c2h_dbg_len = buffer[1]; -+ extend_c2h_dbg_content = buffer + 2; /*@DbgSeq+DbgContent for show HEX*/ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n", -+ extend_c2h_sub_id, extend_c2h_dbg_len)); -+ -+ RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", extend_c2h_dbg_content, cmd_len - 2); -+#endif -+ -+go_backfor_aggre_dbg_pkt: -+ i = 0; -+ extend_c2h_dbg_seq = buffer[2]; -+ extend_c2h_dbg_content = buffer + 3; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq)); -+#endif -+ -+ for (;; i++) { -+ fw_debug_trace[i] = extend_c2h_dbg_content[i]; -+ if (extend_c2h_dbg_content[i + 1] == '\0') { -+ fw_debug_trace[i + 1] = '\0'; -+ PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s", -+ &fw_debug_trace[0]); -+ break; -+ } else if (extend_c2h_dbg_content[i] == '\n') { -+ fw_debug_trace[i + 1] = '\0'; -+ PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s", -+ &fw_debug_trace[0]); -+ buffer = extend_c2h_dbg_content + i + 3; -+ goto go_backfor_aggre_dbg_pkt; -+ } -+ } -+#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/ -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_debug.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_debug.h -new file mode 100644 -index 000000000000..06e809b57458 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_debug.h -@@ -0,0 +1,484 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __ODM_DBG_H__ -+#define __ODM_DBG_H__ -+ -+/*#define DEBUG_VERSION "1.1"*/ /*2015.07.29 YuChen*/ -+/*#define DEBUG_VERSION "1.2"*/ /*2015.08.28 Dino*/ -+/*#define DEBUG_VERSION "1.3"*/ /*2016.04.28 YuChen*/ -+/*#define DEBUG_VERSION "1.4"*/ /*2017.03.13 Dino*/ -+/*#define DEBUG_VERSION "2.0"*/ /*2018.01.10 Dino*/ -+/*2020.07.03 fix cck report bug due to 8723F coding error*/ -+#define DEBUG_VERSION "4.6" -+ -+/*@ -+ * ============================================================ -+ * Definition -+ * ============================================================ -+ */ -+ -+/*@FW DBG MSG*/ -+#define RATE_DECISION 1 -+#define INIT_RA_TABLE 2 -+#define RATE_UP 4 -+#define RATE_DOWN 8 -+#define TRY_DONE 16 -+#define RA_H2C 32 -+#define F_RATE_AP_RPT 64 -+#define DBC_FW_CLM 9 -+ -+#define PHYDM_SNPRINT_SIZE 64 -+/* @---------------------------------------------------------------------------- -+ * Define the tracing components -+ * -+ * ----------------------------------------------------------------------------- -+ * BB FW Functions -+ */ -+#define PHYDM_FW_COMP_RA BIT(0) -+#define PHYDM_FW_COMP_MU BIT(1) -+#define PHYDM_FW_COMP_PATH_DIV BIT(2) -+#define PHYDM_FW_COMP_PT BIT(3) -+ -+/*@------------------------Export Marco Definition---------------------------*/ -+ -+#define config_phydm_read_txagc_check(data) (data != INVALID_TXAGC_DATA) -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #if (DBG_CMD_SUPPORT == 1) -+ extern VOID DCMD_Printf(const char *pMsg); -+ #else -+ #define DCMD_Printf(_pMsg) -+ #endif -+ -+ #if OS_WIN_FROM_WIN10(OS_VERSION) -+ #define pr_debug(fmt, ...) DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, fmt, ##__VA_ARGS__) -+ #else -+ #define pr_debug DbgPrint -+ #endif -+ -+ #define dcmd_printf DCMD_Printf -+ #define dcmd_scanf DCMD_Scanf -+ #define RT_PRINTK pr_debug -+ #define PRINT_MAX_SIZE 512 -+ #define PHYDM_SNPRINTF RT_SPRINTF -+ #define PHYDM_TRACE(_MSG_) EXhalPHYDMoutsrc_Print(_MSG_) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ #define PHYDM_SNPRINTF snprintf -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #undef pr_debug -+ #define pr_debug printk -+ #define RT_PRINTK(fmt, args...) pr_debug(fmt, ## args) -+ #define RT_DISP(dbgtype, dbgflag, printstr) -+ #define RT_TRACE(adapter, comp, drv_level, fmt, args...) \ -+ RTW_INFO(fmt, ## args) -+ #define PHYDM_SNPRINTF snprintf -+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ #define pr_debug(fmt, args...) RTW_PRINT_MSG(fmt, ## args) -+ #define RT_DEBUG(comp, drv_level, fmt, args...) \ -+ RTW_PRINT_MSG(fmt, ## args) -+ #define PHYDM_SNPRINTF snprintf -+#else -+ #define pr_debug panic_printk -+ /*@#define RT_PRINTK(fmt, args...) pr_debug("%s(): " fmt, __FUNCTION__, ## args);*/ -+ #define RT_PRINTK(fmt, args...) pr_debug(fmt, ## args) -+ #define PHYDM_SNPRINTF snprintf -+#endif -+ -+#ifndef ASSERT -+ #define ASSERT(expr) -+#endif -+ -+#if DBG -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+#define PHYDM_DBG(dm, comp, fmt, args...) \ -+ do { \ -+ if ((comp) & dm->debug_components) { \ -+ pr_debug("[PHYDM] "); \ -+ RT_PRINTK(fmt, ## args); \ -+ } \ -+ } while (0) -+ -+#define PHYDM_DBG_F(dm, comp, fmt, args...) \ -+ do { \ -+ if ((comp) & dm->debug_components) { \ -+ RT_PRINTK(fmt, ## args); \ -+ } \ -+ } while (0) -+ -+#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) \ -+ do { \ -+ if ((comp) & dm->debug_components) { \ -+ int __i; \ -+ u8 *__ptr = (u8 *)addr; \ -+ pr_debug("[PHYDM] "); \ -+ pr_debug(title_str); \ -+ pr_debug(" "); \ -+ for (__i = 0; __i < 6; __i++) \ -+ pr_debug("%02X%s", __ptr[__i], (__i == 5) ? "" : "-");\ -+ pr_debug("\n"); \ -+ } \ -+ } while (0) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+static __inline void PHYDM_DBG(PDM_ODM_T dm, int comp, char *fmt, ...) -+{ -+ RT_STATUS rt_status; -+ va_list args; -+ char buf[PRINT_MAX_SIZE] = {0}; -+ -+ if ((comp & dm->debug_components) == 0) -+ return; -+ -+ if (fmt == NULL) -+ return; -+ -+ va_start(args, fmt); -+ rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args); -+ va_end(args); -+ -+ if (rt_status != RT_STATUS_SUCCESS) { -+ DbgPrint("Failed (%d) to print message to buffer\n", rt_status); -+ return; -+ } -+ -+ #if OS_WIN_FROM_WIN10(OS_VERSION) -+ DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, "%s", buf); -+ #else -+ DbgPrint("%s", buf); -+ #endif -+} -+ -+static __inline void PHYDM_DBG_F(PDM_ODM_T dm, int comp, char *fmt, ...) -+{ -+ RT_STATUS rt_status; -+ va_list args; -+ char buf[PRINT_MAX_SIZE] = {0}; -+ -+ if ((comp & dm->debug_components) == 0) -+ return; -+ -+ if (fmt == NULL) -+ return; -+ -+ va_start(args, fmt); -+ rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args); -+ va_end(args); -+ -+ if (rt_status != RT_STATUS_SUCCESS) { -+ /*@DbgPrint("DM Print Fail\n");*/ -+ return; -+ } -+ -+ #if OS_WIN_FROM_WIN10(OS_VERSION) -+ DbgPrintEx(DPFLTR_IHVNETWORK_ID, DPFLTR_ERROR_LEVEL, "%s", buf); -+ #else -+ DbgPrint("%s", buf); -+ #endif -+} -+ -+#define PHYDM_PRINT_ADDR(p_dm, comp, title_str, ptr) \ -+ do { \ -+ if ((comp) & p_dm->debug_components) { \ -+ \ -+ int __i; \ -+ u8 *__ptr = (u8 *)ptr; \ -+ pr_debug("[PHYDM] "); \ -+ pr_debug(title_str); \ -+ pr_debug(" "); \ -+ for (__i = 0; __i < 6; __i++) \ -+ pr_debug("%02X%s", __ptr[__i], (__i == 5) ? "" : "-"); \ -+ pr_debug("\n"); \ -+ } \ -+ } while (0) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ -+#define PHYDM_DBG(dm, comp, fmt, args...) \ -+ do { \ -+ if ((comp) & dm->debug_components) { \ -+ RT_DEBUG(COMP_PHYDM, \ -+ DBG_DMESG, "[PHYDM] " fmt, ##args); \ -+ } \ -+ } while (0) -+ -+#define PHYDM_DBG_F(dm, comp, fmt, args...) \ -+ do { \ -+ if ((comp) & dm->debug_components) { \ -+ RT_DEBUG(COMP_PHYDM, \ -+ DBG_DMESG, fmt, ##args); \ -+ } \ -+ } while (0) -+ -+#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) \ -+ do { \ -+ if ((comp) & dm->debug_components) { \ -+ RT_DEBUG(COMP_PHYDM, \ -+ DBG_DMESG, "[PHYDM] " title_str "%pM\n", \ -+ addr); \ -+ } \ -+ } while (0) -+ -+#elif defined(DM_ODM_CE_MAC80211_V2) -+ -+#define PHYDM_DBG(dm, comp, fmt, args...) -+#define PHYDM_DBG_F(dm, comp, fmt, args...) -+#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) -+ -+#else -+ -+#define PHYDM_DBG(dm, comp, fmt, args...) \ -+ do { \ -+ struct dm_struct *__dm = (dm); \ -+ if ((comp) & __dm->debug_components) { \ -+ RT_TRACE(((struct rtl_priv *)__dm->adapter),\ -+ COMP_PHYDM, DBG_DMESG, \ -+ "[PHYDM] " fmt, ##args); \ -+ } \ -+ } while (0) -+ -+#define PHYDM_DBG_F(dm, comp, fmt, args...) \ -+ do { \ -+ struct dm_struct *__dm = (dm); \ -+ if ((comp) & __dm->debug_components) { \ -+ RT_TRACE(((struct rtl_priv *)__dm->adapter),\ -+ COMP_PHYDM, DBG_DMESG, fmt, ##args); \ -+ } \ -+ } while (0) -+ -+#define PHYDM_PRINT_ADDR(dm, comp, title_str, addr) \ -+ do { \ -+ struct dm_struct *__dm = (dm); \ -+ if ((comp) & __dm->debug_components) { \ -+ RT_TRACE(((struct rtl_priv *)__dm->adapter),\ -+ COMP_PHYDM, DBG_DMESG, \ -+ "[PHYDM] " title_str "%pM\n", addr);\ -+ } \ -+ } while (0) -+#endif -+ -+#else /*@#if DBG*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+static __inline void PHYDM_DBG(struct dm_struct *dm, int comp, char *fmt, ...) -+{ -+ RT_STATUS rt_status; -+ va_list args; -+ char buf[PRINT_MAX_SIZE] = {0}; -+ -+ if ((comp & dm->debug_components) == 0) -+ return; -+ -+ if (fmt == NULL) -+ return; -+ -+ va_start(args, fmt); -+ rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args); -+ va_end(args); -+ -+ if (rt_status != RT_STATUS_SUCCESS) { -+ DbgPrint("Failed (%d) to print message to buffer\n", rt_status); -+ return; -+ } -+ -+ PHYDM_TRACE(buf); -+} -+static __inline void PHYDM_DBG_F(struct dm_struct *dm, int comp, char *fmt, ...) -+{ -+} -+#else -+#define PHYDM_DBG(dm, comp, fmt, args...) -+#define PHYDM_DBG_F(dm, comp, fmt, args...) -+#endif -+#define PHYDM_PRINT_ADDR(dm, comp, title_str, ptr) -+ -+#endif -+ -+#define DBGPORT_PRI_3 3 /*@Debug function (the highest priority)*/ -+#define DBGPORT_PRI_2 2 /*@Check hang function & Strong function*/ -+#define DBGPORT_PRI_1 1 /*Watch dog function*/ -+#define DBGPORT_RELEASE 0 /*@Init value (the lowest priority)*/ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#define PHYDM_DBGPRINT 0 -+#define PHYDM_SSCANF(x, y, z) dcmd_scanf(x, y, z) -+#define PDM_VAST_SNPF PDM_SNPF -+#if (PHYDM_DBGPRINT == 1) -+#define PDM_SNPF(msg) \ -+ do {\ -+ rsprintf msg;\ -+ pr_debug("%s", output);\ -+ } while (0) -+#else -+ -+static __inline void PDM_SNPF(u32 out_len, u32 used, char *buff, int len, -+ char *fmt, ...) -+{ -+ RT_STATUS rt_status; -+ va_list args; -+ char buf[PRINT_MAX_SIZE] = {0}; -+ -+ if (fmt == NULL) -+ return; -+ -+ va_start(args, fmt); -+ rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args); -+ va_end(args); -+ -+ if (rt_status != RT_STATUS_SUCCESS) { -+ /*@DbgPrint("DM Print Fail\n");*/ -+ return; -+ } -+ -+ DCMD_Printf(buf); -+} -+ -+ -+ -+#endif /*@#if (PHYDM_DBGPRINT == 1)*/ -+#else /*@(DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))*/ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) || defined(__OSK__) -+ #define PHYDM_DBGPRINT 0 -+ #else -+ #define PHYDM_DBGPRINT 1 -+ #endif -+#define MAX_ARGC 20 -+#define MAX_ARGV 16 -+#define DCMD_DECIMAL "%d" -+#define DCMD_CHAR "%c" -+#define DCMD_HEX "%x" -+ -+#define PHYDM_SSCANF(x, y, z) sscanf(x, y, z) -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) RT_PRINTK(fmt, ## args) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) \ -+ do { \ -+ RT_DEBUG(COMP_PHYDM, DBG_DMESG, fmt, ##args); \ -+ } while (0) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) -+#else -+#define PDM_VAST_SNPF(out_len, used, buff, len, fmt, args...) \ -+ RT_TRACE(((struct rtl_priv *)dm->adapter), COMP_PHYDM, \ -+ DBG_DMESG, fmt, ##args) -+#endif -+ -+#if (PHYDM_DBGPRINT == 1) -+#define PDM_SNPF(out_len, used, buff, len, fmt, args...) \ -+ do { \ -+ snprintf(buff, len, fmt, ##args); \ -+ pr_debug("%s", output); \ -+ } while (0) -+#else -+#define PDM_SNPF(out_len, used, buff, len, fmt, args...) \ -+ do { \ -+ u32 *__pdm_snpf_u = &(used); \ -+ if (out_len > *__pdm_snpf_u) \ -+ *__pdm_snpf_u += snprintf(buff, len, fmt, ##args);\ -+ } while (0) -+#endif -+#endif -+/* @1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ */ -+ -+enum auto_detection_state { /*@Fast antenna training*/ -+ AD_LEGACY_MODE = 0, -+ AD_HT_MODE = 1, -+ AD_VHT_MODE = 2 -+}; -+ -+/*@ -+ * ============================================================ -+ * 1 structure -+ * ============================================================ -+ */ -+ -+#ifdef CONFIG_PHYDM_DEBUG_FUNCTION -+u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig); -+#endif -+ -+void phydm_init_debug_setting(struct dm_struct *dm); -+ -+void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx); -+ -+u32 phydm_get_bb_dbg_port_idx(void *dm_void); -+ -+u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port); -+ -+void phydm_release_bb_dbg_port(void *dm_void); -+ -+u32 phydm_get_bb_dbg_port_val(void *dm_void); -+ -+void phydm_reset_rx_rate_distribution(struct dm_struct *dm); -+ -+void phydm_rx_rate_distribution(void *dm_void); -+ -+u16 phydm_rx_avg_phy_rate(void *dm_void); -+ -+void phydm_show_phy_hitogram(void *dm_void); -+ -+void phydm_get_avg_phystatus_val(void *dm_void); -+ -+void phydm_get_phy_statistic(void *dm_void); -+ -+void phydm_dm_summary(void *dm_void, u8 macid); -+ -+void phydm_basic_dbg_message(void *dm_void); -+ -+void phydm_basic_profile(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len); -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP)) -+s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag, -+ char *output, u32 out_len); -+#endif -+void phydm_cmd_parser(struct dm_struct *dm, char input[][16], u32 input_num, -+ u8 flag, char *output, u32 out_len); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf); -+ -+void phydm_sbd_check( -+ struct dm_struct *dm); -+ -+void phydm_sbd_callback( -+ struct phydm_timer_list *timer); -+ -+void phydm_sbd_workitem_callback( -+ void *context); -+#endif -+ -+void phydm_fw_trace_en_h2c(void *dm_void, boolean enable, -+ u32 fw_debug_component, u32 monitor_mode, u32 macid); -+ -+void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); -+ -+void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len); -+ -+void phydm_fw_trace_handler_8051(void *dm_void, u8 *cmd_buf, u8 cmd_len); -+ -+#endif /* @__ODM_DBG_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_dfs.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_dfs.c -new file mode 100644 -index 000000000000..0384148d8bb5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_dfs.c -@@ -0,0 +1,2193 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@ -+ * ============================================================ -+ * include files -+ * ============================================================ -+ */ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if defined(CONFIG_PHYDM_DFS_MASTER) -+ -+boolean phydm_dfs_is_meteorology_channel(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ u8 ch = *dm->channel; -+ u8 bw = *dm->band_width; -+ -+ return ((bw == CHANNEL_WIDTH_80 && (ch) >= 116 && (ch) <= 128) || -+ (bw == CHANNEL_WIDTH_40 && (ch) >= 116 && (ch) <= 128) || -+ (bw == CHANNEL_WIDTH_20 && (ch) >= 120 && (ch) <= 128)); -+} -+ -+void phydm_dfs_segment_distinguish(void *dm_void, enum rf_syn syn_path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ic_type & (ODM_RTL8814B))) -+ return; -+ if (syn_path == RF_SYN1) -+ dm->seg1_dfs_flag = 1; -+ else -+ dm->seg1_dfs_flag = 0; -+} -+ -+void phydm_dfs_segment_flag_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ic_type & (ODM_RTL8814B))) -+ return; -+ if (dm->seg1_dfs_flag) -+ dm->seg1_dfs_flag = 0; -+} -+ -+void phydm_radar_detect_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8822C | ODM_RTL8812F | -+ ODM_RTL8197G | ODM_RTL8723F)) { -+ odm_set_bb_reg(dm, R_0xa40, BIT(15), 0); -+ odm_set_bb_reg(dm, R_0xa40, BIT(15), 1); -+ #if (RTL8721D_SUPPORT) -+ } else if (dm->support_ic_type & (ODM_RTL8721D)) { -+ odm_set_bb_reg(dm, R_0xf58, BIT(29), 0); -+ odm_set_bb_reg(dm, R_0xf58, BIT(29), 1); -+ #endif -+ } else if (dm->support_ic_type & (ODM_RTL8814B)) { -+ if (dm->seg1_dfs_flag == 1) { -+ odm_set_bb_reg(dm, R_0xa6c, BIT(0), 0); -+ odm_set_bb_reg(dm, R_0xa6c, BIT(0), 1); -+ return; -+ } -+ odm_set_bb_reg(dm, R_0xa40, BIT(15), 0); -+ odm_set_bb_reg(dm, R_0xa40, BIT(15), 1); -+ } else { -+ odm_set_bb_reg(dm, R_0x924, BIT(15), 0); -+ odm_set_bb_reg(dm, R_0x924, BIT(15), 1); -+ } -+} -+ -+void phydm_radar_detect_disable(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8822C | ODM_RTL8812F | -+ ODM_RTL8197G | ODM_RTL8723F)) -+ odm_set_bb_reg(dm, R_0xa40, BIT(15), 0); -+ else if (dm->support_ic_type & (ODM_RTL8814B)) { -+ if (dm->seg1_dfs_flag == 1) { -+ odm_set_bb_reg(dm, R_0xa6c, BIT(0), 0); -+ dm->seg1_dfs_flag = 0; -+ return; -+ } -+ odm_set_bb_reg(dm, R_0xa40, BIT(15), 0); -+ } -+ #if (RTL8721D_SUPPORT) -+ else if (dm->support_ic_type & (ODM_RTL8721D)) -+ odm_set_bb_reg(dm, R_0xf58, BIT(29), 0); -+ #endif -+ else -+ odm_set_bb_reg(dm, R_0x924, BIT(15), 0); -+ -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+} -+ -+static void phydm_radar_detect_with_dbg_parm(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_RTL8721D) { -+ odm_set_bb_reg(dm, R_0xf54, MASKDWORD, -+ dm->radar_detect_reg_f54); -+ odm_set_bb_reg(dm, R_0xf58, MASKDWORD, -+ dm->radar_detect_reg_f58); -+ odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, -+ dm->radar_detect_reg_f5c); -+ odm_set_bb_reg(dm, R_0xf70, MASKDWORD, -+ dm->radar_detect_reg_f70); -+ odm_set_bb_reg(dm, R_0xf74, MASKDWORD, -+ dm->radar_detect_reg_f74); -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ odm_set_bb_reg(dm, R_0xa40, MASKDWORD, -+ dm->radar_detect_reg_a40); -+ odm_set_bb_reg(dm, R_0xa44, MASKDWORD, -+ dm->radar_detect_reg_a44); -+ odm_set_bb_reg(dm, R_0xa48, MASKDWORD, -+ dm->radar_detect_reg_a48); -+ odm_set_bb_reg(dm, R_0xa4c, MASKDWORD, -+ dm->radar_detect_reg_a4c); -+ odm_set_bb_reg(dm, R_0xa50, MASKDWORD, -+ dm->radar_detect_reg_a50); -+ odm_set_bb_reg(dm, R_0xa54, MASKDWORD, -+ dm->radar_detect_reg_a54); -+ } else { -+ odm_set_bb_reg(dm, R_0x918, MASKDWORD, -+ dm->radar_detect_reg_918); -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ dm->radar_detect_reg_91c); -+ odm_set_bb_reg(dm, R_0x920, MASKDWORD, -+ dm->radar_detect_reg_920); -+ odm_set_bb_reg(dm, R_0x924, MASKDWORD, -+ dm->radar_detect_reg_924); -+ } -+} -+ -+/* @Init radar detection parameters, called after ch, bw is set */ -+ -+void phydm_radar_detect_enable(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _DFS_STATISTICS *dfs = &dm->dfs; -+ u8 region_domain = dm->dfs_region_domain; -+ u8 c_channel = *dm->channel; -+ u8 band_width = *dm->band_width; -+ u8 enable = 0, i; -+ u8 short_pw_upperbound = 0; -+ -+ PHYDM_DBG(dm, DBG_DFS, "test, region_domain = %d\n", region_domain); -+ if (region_domain == PHYDM_DFS_DOMAIN_UNKNOWN) { -+ PHYDM_DBG(dm, DBG_DFS, "PHYDM_DFS_DOMAIN_UNKNOWN\n"); -+ goto exit; -+ } -+ -+ if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8812 | ODM_RTL8881A)) { -+ odm_set_bb_reg(dm, R_0x814, 0x3fffffff, 0x04cc4d10); -+ odm_set_bb_reg(dm, R_0x834, MASKBYTE0, 0x06); -+ -+ if (dm->radar_detect_dbg_parm_en) { -+ phydm_radar_detect_with_dbg_parm(dm); -+ enable = 1; -+ goto exit; -+ } -+ -+ if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { -+ odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c17ecdf); -+ odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x01528500); -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, 0x0fa21a20); -+ odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0f69204); -+ -+ } else if (region_domain == PHYDM_DFS_DOMAIN_MKK) { -+ odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x01528500); -+ odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0d67234); -+ -+ if (c_channel >= 52 && c_channel <= 64) { -+ odm_set_bb_reg(dm, R_0x918, MASKDWORD, -+ 0x1c16ecdf); -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ 0x0f141a20); -+ } else { -+ odm_set_bb_reg(dm, R_0x918, MASKDWORD, -+ 0x1c16acdf); -+ if (band_width == CHANNEL_WIDTH_20) -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ 0x64721a20); -+ else -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ 0x68721a20); -+ } -+ -+ } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { -+ odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c16acdf); -+ odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x01528500); -+ odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0d67231); -+ if (band_width == CHANNEL_WIDTH_20) -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ 0x64741a20); -+ else -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ 0x68741a20); -+ -+ } else { -+ /* not supported */ -+ PHYDM_DBG(dm, DBG_DFS, -+ "Unsupported dfs_region_domain:%d\n", -+ region_domain); -+ goto exit; -+ } -+ -+ } else if (dm->support_ic_type & -+ (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) { -+ -+ odm_set_bb_reg(dm, R_0x814, 0x3fffffff, 0x04cc4d10); -+ odm_set_bb_reg(dm, R_0x834, MASKBYTE0, 0x06); -+ -+ /* @8822B only, when BW = 20M, DFIR output is 40Mhz, -+ * but DFS input is 80MMHz, so it need to upgrade to 80MHz -+ */ -+ if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) { -+ if (band_width == CHANNEL_WIDTH_20) -+ odm_set_bb_reg(dm, R_0x1984, BIT(26), 1); -+ else -+ odm_set_bb_reg(dm, R_0x1984, BIT(26), 0); -+ } -+ -+ if (dm->radar_detect_dbg_parm_en) { -+ phydm_radar_detect_with_dbg_parm(dm); -+ enable = 1; -+ goto exit; -+ } -+ -+ if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { -+ odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c16acdf); -+ odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x095a8500); -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, 0x0fc01a1f); -+ odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0f57204); -+ -+ } else if (region_domain == PHYDM_DFS_DOMAIN_MKK) { -+ odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x095a8500); -+ odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe0d67234); -+ -+ if (c_channel >= 52 && c_channel <= 64) { -+ odm_set_bb_reg(dm, R_0x918, MASKDWORD, -+ 0x1c16ecdf); -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ 0x0f141a1f); -+ } else { -+ odm_set_bb_reg(dm, R_0x918, MASKDWORD, -+ 0x1c166cdf); -+ if (band_width == CHANNEL_WIDTH_20) -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ 0x64721a1f); -+ else -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ 0x68721a1f); -+ } -+ -+ } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { -+ odm_set_bb_reg(dm, R_0x918, MASKDWORD, 0x1c176cdf); -+ odm_set_bb_reg(dm, R_0x924, MASKDWORD, 0x095a8400); -+ odm_set_bb_reg(dm, R_0x920, MASKDWORD, 0xe076d231); -+ if (band_width == CHANNEL_WIDTH_20) -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ 0x64901a1f); -+ else -+ odm_set_bb_reg(dm, R_0x91c, MASKDWORD, -+ 0x62901a1f); -+ -+ } else { -+ /* not supported */ -+ PHYDM_DBG(dm, DBG_DFS, -+ "Unsupported dfs_region_domain:%d\n", -+ region_domain); -+ goto exit; -+ } -+ /*RXHP low corner will extend the pulse width, -+ *so we need to increase the upper bound. -+ */ -+ if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) { -+ if (odm_get_bb_reg(dm, 0x8d8, -+ BIT28 | BIT27 | BIT26) == 0) { -+ short_pw_upperbound = -+ (u8)odm_get_bb_reg(dm, 0x91c, -+ BIT23 | BIT22 | -+ BIT21 | BIT20); -+ if ((short_pw_upperbound + 4) > 15) -+ odm_set_bb_reg(dm, 0x91c, -+ BIT23 | BIT22 | -+ BIT21 | BIT20, 15); -+ else -+ odm_set_bb_reg(dm, 0x91c, -+ BIT23 | BIT22 | -+ BIT21 | BIT20, -+ short_pw_upperbound + 4); -+ } -+ /*@if peak index -1~+1, use original NB method*/ -+ odm_set_bb_reg(dm, 0x19e4, 0x003C0000, 13); -+ odm_set_bb_reg(dm, 0x924, 0x70000, 0); -+ } -+ -+ if (dm->support_ic_type & (ODM_RTL8881A)) -+ odm_set_bb_reg(dm, 0xb00, 0xc0000000, 3); -+ -+ /*@for 8814 new dfs mechanism setting*/ -+ if (dm->support_ic_type & -+ (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) { -+ /*Turn off dfs scaling factor*/ -+ odm_set_bb_reg(dm, 0x19e4, 0x1fff, 0x0c00); -+ /*NonDC peak_th = 2times DC peak_th*/ -+ odm_set_bb_reg(dm, 0x19e4, 0x30000, 1); -+ /*power for debug and auto test flow latch after ST*/ -+ odm_set_bb_reg(dm, 0x9f8, 0xc0000000, 3); -+ -+ /*@low pulse width radar pattern will cause wrong drop*/ -+ /*@disable peak index should the same -+ *during the same short pulse (new mechan) -+ */ -+ odm_set_bb_reg(dm, 0x9f4, 0x80000000, 0); -+ -+ /*@disable peak index should the same -+ *during the same short pulse (old mechan) -+ */ -+ odm_set_bb_reg(dm, 0x924, 0x20000000, 0); -+ -+ /*@if peak index diff >=2, then drop the result*/ -+ odm_set_bb_reg(dm, 0x19e4, 0xe000, 2); -+ if (region_domain == 2) { -+ if ((c_channel >= 52) && (c_channel <= 64)) { -+ /*pulse width hist th setting*/ -+ /*th1=2*04us*/ -+ odm_set_bb_reg(dm, 0x19e4, -+ 0xff000000, 2); -+ /*th2 = 3*0.4us, th3 = 4*0.4us -+ *th4 = 7*0.4, th5 = 34*0.4 -+ */ -+ odm_set_bb_reg(dm, 0x19e8, -+ MASKDWORD, 0x22070403); -+ -+ /*PRI hist th setting*/ -+ /*th1=42*32us*/ -+ odm_set_bb_reg(dm, 0x19b8, -+ 0x00007f80, 42); -+ /*th2=47*32us, th3=115*32us, -+ *th4=123*32us, th5=130*32us -+ */ -+ odm_set_bb_reg(dm, 0x19ec, -+ MASKDWORD, 0x827b732f); -+ } else { -+ /*pulse width hist th setting*/ -+ /*th1=2*04us*/ -+ odm_set_bb_reg(dm, 0x19e4, -+ 0xff000000, 1); -+ /*th2 = 13*0.4us, th3 = 26*0.4us -+ *th4 = 75*0.4us, th5 = 255*0.4us -+ */ -+ odm_set_bb_reg(dm, 0x19e8, -+ MASKDWORD, 0xff4b1a0d); -+ /*PRI hist th setting*/ -+ /*th1=4*32us*/ -+ -+ odm_set_bb_reg(dm, 0x19b8, -+ 0x00007f80, 4); -+ /*th2=8*32us, th3=16*32us, -+ *th4=32*32us, th5=128*32=4096us -+ */ -+ odm_set_bb_reg(dm, 0x19ec, -+ MASKDWORD, 0x80201008); -+ } -+ } -+ /*@ETSI*/ -+ else if (region_domain == 3) { -+ /*pulse width hist th setting*/ -+ /*th1=2*04us*/ -+ odm_set_bb_reg(dm, 0x19e4, 0xff000000, 1); -+ odm_set_bb_reg(dm, 0x19e8, -+ MASKDWORD, 0x68260d06); -+ /*PRI hist th setting*/ -+ /*th1=7*32us*/ -+ odm_set_bb_reg(dm, 0x19b8, 0x00007f80, 7); -+ /*th2=40*32us, th3=80*32us, -+ *th4=110*32us, th5=157*32=5024 -+ */ -+ odm_set_bb_reg(dm, 0x19ec, -+ MASKDWORD, 0xc06e2010); -+ } -+ /*@FCC*/ -+ else if (region_domain == 1) { -+ /*pulse width hist th setting*/ -+ /*th1=2*04us*/ -+ odm_set_bb_reg(dm, 0x19e4, 0xff000000, 2); -+ /*th2 = 13*0.4us, th3 = 26*0.4us, -+ *th4 = 75*0.4us, th5 = 255*0.4us -+ */ -+ odm_set_bb_reg(dm, 0x19e8, -+ MASKDWORD, 0xff4b1a0d); -+ -+ /*PRI hist th setting*/ -+ /*th1=4*32us*/ -+ odm_set_bb_reg(dm, 0x19b8, 0x00007f80, 4); -+ /*th2=8*32us, th3=21*32us, -+ *th4=32*32us, th5=96*32=3072 -+ */ -+ if (band_width == CHANNEL_WIDTH_20) -+ odm_set_bb_reg(dm, 0x19ec, -+ MASKDWORD, 0x60282010); -+ else -+ odm_set_bb_reg(dm, 0x19ec, -+ MASKDWORD, 0x60282420); -+ } else { -+ } -+ } -+ } else if (dm->support_ic_type & -+ ODM_IC_JGR3_SERIES) { -+ if (dm->radar_detect_dbg_parm_en) { -+ phydm_radar_detect_with_dbg_parm(dm); -+ enable = 1; -+ goto exit; -+ } -+ if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { -+ odm_set_bb_reg(dm, R_0xa40, MASKDWORD, 0xb359c5bd); -+ if (dm->support_ic_type & (ODM_RTL8814B)) { -+ if (dm->seg1_dfs_flag == 1) -+ odm_set_bb_reg(dm, R_0xa6c, BIT(0), 1); -+ } -+ odm_set_bb_reg(dm, R_0xa44, MASKDWORD, 0x3033bebd); -+ odm_set_bb_reg(dm, R_0xa48, MASKDWORD, 0x2a521254); -+ odm_set_bb_reg(dm, R_0xa4c, MASKDWORD, 0xa2533345); -+ odm_set_bb_reg(dm, R_0xa50, MASKDWORD, 0x605be003); -+ odm_set_bb_reg(dm, R_0xa54, MASKDWORD, 0x500089e8); -+ } else if (region_domain == PHYDM_DFS_DOMAIN_MKK) { -+ odm_set_bb_reg(dm, R_0xa40, MASKDWORD, 0xb359c5bd); -+ if (dm->support_ic_type & (ODM_RTL8814B)) { -+ if (dm->seg1_dfs_flag == 1) -+ odm_set_bb_reg(dm, R_0xa6c, BIT(0), 1); -+ } -+ odm_set_bb_reg(dm, R_0xa44, MASKDWORD, 0x3033bebd); -+ odm_set_bb_reg(dm, R_0xa48, MASKDWORD, 0x2a521254); -+ odm_set_bb_reg(dm, R_0xa4c, MASKDWORD, 0xa2533345); -+ odm_set_bb_reg(dm, R_0xa50, MASKDWORD, 0x605be003); -+ odm_set_bb_reg(dm, R_0xa54, MASKDWORD, 0x500089e8); -+ } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { -+ odm_set_bb_reg(dm, R_0xa40, MASKDWORD, 0xb359c5bd); -+ if (dm->support_ic_type & (ODM_RTL8814B)) { -+ if (dm->seg1_dfs_flag == 1) -+ odm_set_bb_reg(dm, R_0xa6c, BIT(0), 1); -+ } -+ odm_set_bb_reg(dm, R_0xa44, MASKDWORD, 0x3033bebd); -+ odm_set_bb_reg(dm, R_0xa48, MASKDWORD, 0x2a521254); -+ odm_set_bb_reg(dm, R_0xa4c, MASKDWORD, 0xa2533345); -+ odm_set_bb_reg(dm, R_0xa50, MASKDWORD, 0x605be003); -+ odm_set_bb_reg(dm, R_0xa54, MASKDWORD, 0x500089e8); -+ } else { -+ /* not supported */ -+ PHYDM_DBG(dm, DBG_DFS, -+ "Unsupported dfs_region_domain:%d\n", -+ region_domain); -+ goto exit; -+ } -+ #if (RTL8721D_SUPPORT) -+ } else if (dm->support_ic_type & ODM_RTL8721D) { -+ odm_set_bb_reg(dm, R_0x814, 0x3fffffff, 0x04cc4d10); -+ /*CCA MASK*/ -+ odm_set_bb_reg(dm, R_0xc38, 0x07c00000, 0x06); -+ /*CCA Threshold*/ -+ odm_set_bb_reg(dm, R_0xc3c, 0x00000007, 0x0); -+ -+ if (dm->radar_detect_dbg_parm_en) { -+ phydm_radar_detect_with_dbg_parm(dm); -+ enable = 1; -+ goto exit; -+ } -+ -+ if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { -+ odm_set_bb_reg(dm, R_0xf54, MASKDWORD, 0x230006a8); -+ odm_set_bb_reg(dm, R_0xf58, MASKDWORD, 0x354cd7dd); -+ odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, 0x9984ab25); -+ odm_set_bb_reg(dm, R_0xf70, MASKDWORD, 0xbd9fab98); -+ odm_set_bb_reg(dm, R_0xf74, MASKDWORD, 0xcc45029f); -+ -+ } else if (region_domain == PHYDM_DFS_DOMAIN_MKK) { -+ odm_set_bb_reg(dm, R_0xf54, MASKDWORD, 0x230006a8); -+ odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, 0x9984ab25); -+ odm_set_bb_reg(dm, R_0xf70, MASKDWORD, 0xbd9fb398); -+ odm_set_bb_reg(dm, R_0xf74, MASKDWORD, 0xcc450e9d); -+ -+ if (c_channel >= 52 && c_channel <= 64) { -+ odm_set_bb_reg(dm, R_0xf58, MASKDWORD, -+ 0x354cd7fd); -+ } else { -+ odm_set_bb_reg(dm, R_0xf58, MASKDWORD, -+ 0x354cd7bd); -+ } -+ } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { -+ odm_set_bb_reg(dm, R_0xf54, MASKDWORD, 0x230006a8); -+ odm_set_bb_reg(dm, R_0xf58, MASKDWORD, 0x3558d7bd); -+ odm_set_bb_reg(dm, R_0xf5c, MASKDWORD, 0x9984ab35); -+ odm_set_bb_reg(dm, R_0xf70, MASKDWORD, 0xbd9fb398); -+ odm_set_bb_reg(dm, R_0xf74, MASKDWORD, 0xcc444e9d); -+ } else { -+ /* not supported */ -+ PHYDM_DBG(dm, DBG_DFS, -+ "Unsupported dfs_region_domain:%d\n", -+ region_domain); -+ goto exit; -+ } -+ -+ /*if peak index -1~+1, use original NB method*/ -+ odm_set_bb_reg(dm, R_0xf70, 0x00070000, 0x7); -+ odm_set_bb_reg(dm, R_0xf74, 0x000c0000, 0); -+ -+ /*Turn off dfs scaling factor*/ -+ odm_set_bb_reg(dm, R_0xf70, 0x00080000, 0x0); -+ /*NonDC peak_th = 2times DC peak_th*/ -+ odm_set_bb_reg(dm, R_0xf58, 0x00007800, 1); -+ -+ /*low pulse width radar pattern will cause wrong drop*/ -+ /*disable peak index should the same*/ -+ /*during the same short pulse (new mechan)*/ -+ odm_set_bb_reg(dm, R_0xf70, 0x00100000, 0x0); -+ /*if peak index diff >=2, then drop the result*/ -+ odm_set_bb_reg(dm, R_0xf70, 0x30000000, 0x2); -+ #endif -+ } else { -+ /*not supported IC type*/ -+ PHYDM_DBG(dm, DBG_DFS, "Unsupported IC type:%d\n", -+ dm->support_ic_type); -+ goto exit; -+ } -+ -+ enable = 1; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0xa40, 0x00007f00); -+ dfs->pwdb_th_cur = (u8)odm_get_bb_reg(dm, R_0xa50, 0x000000f0); -+ dfs->peak_th = (u8)odm_get_bb_reg(dm, R_0xa48, 0x00c00000); -+ dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xa50, -+ 0x00f00000); -+ dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xa4c, -+ 0xf0000000); -+ dfs->peak_window = (u8)odm_get_bb_reg(dm, R_0xa40, 0x00030000); -+ dfs->three_peak_opt = (u8)odm_get_bb_reg(dm, R_0xa40, -+ 0x30000000); -+ dfs->three_peak_th2 = (u8)odm_get_bb_reg(dm, R_0xa44, -+ 0x00000007); -+ #if (RTL8721D_SUPPORT) -+ } else if (dm->support_ic_type & (ODM_RTL8721D)) { -+ dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0xf54, -+ 0x0000001f) << 2); -+ dfs->st_l2h_cur += (u8)odm_get_bb_reg(dm, R_0xf58, 0xc0000000); -+ dfs->pwdb_th_cur = (u8)odm_get_bb_reg(dm, R_0xf70, 0x03c00000); -+ dfs->peak_th = (u8)odm_get_bb_reg(dm, R_0xf5c, 0x00000030); -+ dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xf70, -+ 0x00007800); -+ dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0xf74, -+ 0x0000000f); -+ dfs->peak_window = (u8)odm_get_bb_reg(dm, R_0xf58, 0x18000000); -+ dfs->three_peak_opt = (u8)odm_get_bb_reg(dm, R_0xf58, -+ 0x00030000); -+ dfs->three_peak_th2 = (u8)odm_get_bb_reg(dm, -+ R_0xf58, 0x00007c00); -+ #endif -+ } else { -+ dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0x91c, 0x000000ff); -+ dfs->pwdb_th_cur = (u8)odm_get_bb_reg(dm, R_0x918, 0x00001f00); -+ dfs->peak_th = (u8)odm_get_bb_reg(dm, R_0x918, 0x00030000); -+ dfs->short_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0x920, -+ 0x000f0000); -+ dfs->long_pulse_cnt_th = (u8)odm_get_bb_reg(dm, R_0x920, -+ 0x00f00000); -+ dfs->peak_window = (u8)odm_get_bb_reg(dm, R_0x920, 0x00000300); -+ dfs->three_peak_opt = (u8)odm_get_bb_reg(dm, 0x924, 0x00000180); -+ dfs->three_peak_th2 = (u8)odm_get_bb_reg(dm, 0x924, 0x00007000); -+ } -+ -+ phydm_dfs_parameter_init(dm); -+ -+exit: -+ if (enable) { -+ phydm_radar_detect_reset(dm); -+ PHYDM_DBG(dm, DBG_DFS, "on cch:%u, bw:%u\n", c_channel, -+ band_width); -+ } else -+ phydm_radar_detect_disable(dm); -+} -+ -+void phydm_dfs_parameter_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _DFS_STATISTICS *dfs = &dm->dfs; -+ -+ u8 i; -+ for (i = 0; i < 5; i++) { -+ dfs->pulse_flag_hist[i] = 0; -+ dfs->pulse_type_hist[i] = 0; -+ dfs->radar_det_mask_hist[i] = 0; -+ dfs->fa_inc_hist[i] = 0; -+ } -+ -+ /*@for dfs mode*/ -+ dfs->force_TP_mode = 0; -+ dfs->sw_trigger_mode = 0; -+ dfs->det_print = 0; -+ dfs->det_print2 = 0; -+ dfs->print_hist_rpt = 0; -+ if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) -+ dfs->hist_cond_on = 1; -+ else -+ dfs->hist_cond_on = 0; -+ -+ /*@for dynamic dfs*/ -+ dfs->pwdb_th = 8; -+ dfs->fa_mask_th = 30 * (dfs->dfs_polling_time) / 100; -+ dfs->st_l2h_min = 0x20; -+ dfs->st_l2h_max = 0x4e; -+ dfs->pwdb_scalar_factor = 12; -+ -+ /*@for dfs histogram*/ -+ dfs->pri_hist_th = 5; -+ dfs->pri_sum_g1_th = 9; -+ dfs->pri_sum_g5_th = 5; -+ dfs->pri_sum_g1_fcc_th = 4; /*@FCC Type6*/ -+ dfs->pri_sum_g3_fcc_th = 6; -+ dfs->pri_sum_safe_th = 50; -+ dfs->pri_sum_safe_fcc_th = 110; /*@30 for AP*/ -+ dfs->pri_sum_type4_th = 16; -+ dfs->pri_sum_type6_th = 12; -+ dfs->pri_sum_g5_under_g1_th = 4; -+ dfs->pri_pw_diff_th = 4; -+ dfs->pri_pw_diff_fcc_th = 8; -+ dfs->pri_pw_diff_fcc_idle_th = 2; -+ dfs->pri_pw_diff_w53_th = 10; -+ dfs->pw_std_th = 7; /*@FCC Type4*/ -+ dfs->pw_std_idle_th = 10; -+ dfs->pri_std_th = 6; /*@FCC Type3,4,6*/ -+ dfs->pri_std_idle_th = 10; -+ dfs->pri_type1_upp_fcc_th = 110; -+ dfs->pri_type1_low_fcc_th = 50; -+ dfs->pri_type1_cen_fcc_th = 70; -+ dfs->pw_g0_th = 8; -+ dfs->pw_long_lower_th = 6; /*@7->6*/ -+ dfs->pri_long_upper_th = 30; -+ dfs->pw_long_lower_20m_th = 7; /*@7 for AP*/ -+ dfs->pw_long_sum_upper_th = 60; -+ dfs->type4_pw_max_cnt = 7; -+ dfs->type4_safe_pri_sum_th = 5; -+} -+ -+void phydm_dfs_dynamic_setting( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _DFS_STATISTICS *dfs = &dm->dfs; -+ -+ u8 peak_th_cur = 0, short_pulse_cnt_th_cur = 0; -+ u8 long_pulse_cnt_th_cur = 0, three_peak_opt_cur = 0; -+ u8 three_peak_th2_cur = 0; -+ u8 peak_window_cur = 0; -+ u8 region_domain = dm->dfs_region_domain; -+ u8 c_channel = *dm->channel; -+ -+ if (dm->rx_tp + dm->tx_tp <= 2) { -+ dfs->idle_mode = 1; -+ if (dfs->force_TP_mode) -+ dfs->idle_mode = 0; -+ } else { -+ dfs->idle_mode = 0; -+ } -+ -+ if (dfs->idle_mode == 1) { /*@idle (no traffic)*/ -+ peak_th_cur = 3; -+ short_pulse_cnt_th_cur = 6; -+ long_pulse_cnt_th_cur = 9; -+ peak_window_cur = 2; -+ three_peak_opt_cur = 0; -+ three_peak_th2_cur = 2; -+ if (region_domain == PHYDM_DFS_DOMAIN_MKK) { -+ if (c_channel >= 52 && c_channel <= 64) { -+ short_pulse_cnt_th_cur = 14; -+ long_pulse_cnt_th_cur = 15; -+ three_peak_th2_cur = 0; -+ } else { -+ short_pulse_cnt_th_cur = 6; -+ three_peak_th2_cur = 0; -+ long_pulse_cnt_th_cur = 10; -+ } -+ } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { -+ three_peak_th2_cur = 0; -+ } else if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { -+ long_pulse_cnt_th_cur = 15; -+ if (phydm_dfs_is_meteorology_channel(dm)) { -+ /*need to add check cac end condition*/ -+ peak_th_cur = 2; -+ three_peak_opt_cur = 0; -+ three_peak_th2_cur = 0; -+ short_pulse_cnt_th_cur = 7; -+ } else { -+ three_peak_opt_cur = 0; -+ three_peak_th2_cur = 0; -+ short_pulse_cnt_th_cur = 7; -+ } -+ } else /*@default: FCC*/ -+ three_peak_th2_cur = 0; -+ -+ } else { /*@in service (with TP)*/ -+ peak_th_cur = 2; -+ short_pulse_cnt_th_cur = 6; -+ long_pulse_cnt_th_cur = 7; -+ peak_window_cur = 2; -+ three_peak_opt_cur = 0; -+ three_peak_th2_cur = 2; -+ if (region_domain == PHYDM_DFS_DOMAIN_MKK) { -+ if (c_channel >= 52 && c_channel <= 64) { -+ long_pulse_cnt_th_cur = 15; -+ /*@for high duty cycle*/ -+ short_pulse_cnt_th_cur = 5; -+ three_peak_th2_cur = 0; -+ } else { -+ three_peak_opt_cur = 0; -+ three_peak_th2_cur = 0; -+ long_pulse_cnt_th_cur = 8; -+ } -+ } else if (region_domain == PHYDM_DFS_DOMAIN_FCC) { -+ long_pulse_cnt_th_cur = 5; /*for 80M FCC*/ -+ short_pulse_cnt_th_cur = 5; /*for 80M FCC*/ -+ } else if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { -+ long_pulse_cnt_th_cur = 15; -+ short_pulse_cnt_th_cur = 5; -+ three_peak_opt_cur = 0; -+ } -+ } -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ if (dfs->peak_th != peak_th_cur) -+ odm_set_bb_reg(dm, R_0xa48, 0x00c00000, peak_th_cur); -+ if (dfs->short_pulse_cnt_th != short_pulse_cnt_th_cur) -+ odm_set_bb_reg(dm, R_0xa50, 0x00f00000, -+ short_pulse_cnt_th_cur); -+ if (dfs->long_pulse_cnt_th != long_pulse_cnt_th_cur) -+ odm_set_bb_reg(dm, R_0xa4c, 0xf0000000, -+ long_pulse_cnt_th_cur); -+ if (dfs->peak_window != peak_window_cur) -+ odm_set_bb_reg(dm, R_0xa40, 0x00030000, -+ peak_window_cur); -+ if (dfs->three_peak_opt != three_peak_opt_cur) -+ odm_set_bb_reg(dm, R_0xa40, 0x30000000, -+ three_peak_opt_cur); -+ if (dfs->three_peak_th2 != three_peak_th2_cur) -+ odm_set_bb_reg(dm, R_0xa44, 0x00000007, -+ three_peak_th2_cur); -+ #if (RTL8721D_SUPPORT) -+ } else if (dm->support_ic_type & (ODM_RTL8721D)) { -+ if (dfs->peak_th != peak_th_cur) -+ odm_set_bb_reg(dm, R_0xf5c, 0x00000030, peak_th_cur); -+ if (dfs->short_pulse_cnt_th != short_pulse_cnt_th_cur) -+ odm_set_bb_reg(dm, R_0xf70, 0x00007800, -+ short_pulse_cnt_th_cur); -+ if (dfs->long_pulse_cnt_th != long_pulse_cnt_th_cur) -+ odm_set_bb_reg(dm, R_0xf74, 0x0000000f, -+ long_pulse_cnt_th_cur); -+ if (dfs->peak_window != peak_window_cur) -+ odm_set_bb_reg(dm, R_0xf58, 0x18000000, -+ peak_window_cur); -+ if (dfs->three_peak_opt != three_peak_opt_cur) -+ odm_set_bb_reg(dm, R_0xf58, 0x00030000, -+ three_peak_opt_cur); -+ if (dfs->three_peak_th2 != three_peak_th2_cur) -+ odm_set_bb_reg(dm, R_0xf58, 0x00007c00, -+ three_peak_th2_cur); -+ #endif -+ } else { -+ if (dfs->peak_th != peak_th_cur) -+ odm_set_bb_reg(dm, R_0x918, 0x00030000, peak_th_cur); -+ if (dfs->short_pulse_cnt_th != short_pulse_cnt_th_cur) -+ odm_set_bb_reg(dm, R_0x920, 0x000f0000, -+ short_pulse_cnt_th_cur); -+ if (dfs->long_pulse_cnt_th != long_pulse_cnt_th_cur) -+ odm_set_bb_reg(dm, R_0x920, 0x00f00000, -+ long_pulse_cnt_th_cur); -+ if (dfs->peak_window != peak_window_cur) -+ odm_set_bb_reg(dm, R_0x920, 0x00000300, -+ peak_window_cur); -+ if (dfs->three_peak_opt != three_peak_opt_cur) -+ odm_set_bb_reg(dm, R_0x924, 0x00000180, -+ three_peak_opt_cur); -+ if (dfs->three_peak_th2 != three_peak_th2_cur) -+ odm_set_bb_reg(dm, R_0x924, 0x00007000, -+ three_peak_th2_cur); -+ } -+ -+ dfs->peak_th = peak_th_cur; -+ dfs->short_pulse_cnt_th = short_pulse_cnt_th_cur; -+ dfs->long_pulse_cnt_th = long_pulse_cnt_th_cur; -+ dfs->peak_window = peak_window_cur; -+ dfs->three_peak_opt = three_peak_opt_cur; -+ dfs->three_peak_th2 = three_peak_th2_cur; -+} -+ -+boolean -+phydm_radar_detect_dm_check( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _DFS_STATISTICS *dfs = &dm->dfs; -+ u8 region_domain = dm->dfs_region_domain, index = 0; -+ -+ u16 i = 0, j = 0, fa_count_cur = 0, fa_count_inc = 0; -+ u16 total_fa_in_hist = 0, total_pulse_count_inc = 0; -+ u16 short_pulse_cnt_inc = 0, short_pulse_cnt_cur = 0; -+ u16 long_pulse_cnt_inc = 0, long_pulse_cnt_cur = 0; -+ u32 regf98_value = 0, reg918_value = 0, reg91c_value = 0; -+ u32 reg920_value = 0, reg924_value = 0, radar_rpt_reg_value = 0; -+ u32 regf54_value = 0, regf58_value = 0, regf5c_value = 0; -+ u32 regdf4_value = 0, regf70_value = 0, regf74_value = 0; -+ #if (RTL8812F_SUPPORT || RTL8822C_SUPPORT || RTL8814B_SUPPORT) -+ u32 rega40_value = 0, rega44_value = 0, rega48_value = 0; -+ u32 rega4c_value = 0, rega50_value = 0, rega54_value = 0; -+ #endif -+ #if (RTL8721D_SUPPORT) -+ u32 reg908_value = 0, regdf4_value = 0; -+ u32 regf54_value = 0, regf58_value = 0, regf5c_value = 0; -+ u32 regf70_value = 0, regf74_value = 0; -+ #endif -+ boolean tri_short_pulse = 0, tri_long_pulse = 0, radar_type = 0; -+ boolean fault_flag_det = 0, fault_flag_psd = 0, fa_flag = 0; -+ boolean radar_detected = 0; -+ u8 st_l2h_new = 0, fa_mask_th = 0, k = 0, sum = 0; -+ u8 c_channel = *dm->channel; -+ -+ /*@Get FA count during past 100ms, R_0xf48 for AC series*/ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ fa_count_cur = (u16)odm_get_bb_reg(dm, R_0x2d00, MASKLWORD); -+ #if (RTL8721D_SUPPORT) -+ else if (dm->support_ic_type & (ODM_RTL8721D)) { -+ fa_count_cur = (u16)odm_get_bb_reg(dm, -+ ODM_REG_OFDM_FA_TYPE2_11N, -+ MASKHWORD); -+ fa_count_cur += (u16)odm_get_bb_reg(dm, -+ ODM_REG_OFDM_FA_TYPE3_11N, -+ MASKLWORD); -+ fa_count_cur += (u16)odm_get_bb_reg(dm, -+ ODM_REG_OFDM_FA_TYPE3_11N, -+ MASKHWORD); -+ fa_count_cur += (u16)odm_get_bb_reg(dm, -+ ODM_REG_OFDM_FA_TYPE4_11N, -+ MASKLWORD); -+ fa_count_cur += (u16)odm_get_bb_reg(dm, -+ ODM_REG_OFDM_FA_TYPE1_11N, -+ MASKLWORD); -+ fa_count_cur += (u16)odm_get_bb_reg(dm, -+ ODM_REG_OFDM_FA_TYPE1_11N, -+ MASKHWORD); -+ } -+ #endif -+ else -+ fa_count_cur = (u16)odm_get_bb_reg(dm, R_0xf48, 0x0000ffff); -+ -+ if (dfs->fa_count_pre == 0) -+ fa_count_inc = 0; -+ else if (fa_count_cur >= dfs->fa_count_pre) -+ fa_count_inc = fa_count_cur - dfs->fa_count_pre; -+ else -+ fa_count_inc = fa_count_cur; -+ dfs->fa_count_pre = fa_count_cur; -+ -+ dfs->fa_inc_hist[dfs->mask_idx] = fa_count_inc; -+ -+ for (i = 0; i < 5; i++) -+ total_fa_in_hist = total_fa_in_hist + dfs->fa_inc_hist[i]; -+ -+ if (dfs->mask_idx >= 2) -+ index = dfs->mask_idx - 2; -+ else -+ index = 5 + dfs->mask_idx - 2; -+ -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8822C | ODM_RTL8812F | -+ ODM_RTL8197G| ODM_RTL8723F)) { -+ radar_rpt_reg_value = odm_get_bb_reg(dm, R_0x2e00, 0xffffffff); -+ short_pulse_cnt_cur = (u16)((radar_rpt_reg_value & 0x000ff800) -+ >> 11); -+ long_pulse_cnt_cur = (u16)((radar_rpt_reg_value & 0x0fc00000) -+ >> 22); -+ #if (RTL8721D_SUPPORT) -+ } else if (dm->support_ic_type & (ODM_RTL8721D)) { -+ reg908_value = (u32)odm_get_bb_reg(dm, R_0x908, MASKDWORD); -+ odm_set_bb_reg(dm, R_0x908, MASKDWORD, 0x254); -+ regdf4_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD); -+ short_pulse_cnt_cur = (u16)((regdf4_value & 0x000ff000) >> 12); -+ long_pulse_cnt_cur = (u16)((regdf4_value & 0x0fc00000) >> 22); -+ -+ tri_short_pulse = (regdf4_value & BIT(20)) ? 1 : 0; -+ tri_long_pulse = (regdf4_value & BIT(28)) ? 1 : 0; -+ if (tri_short_pulse || tri_long_pulse) { -+ odm_set_bb_reg(dm, R_0xf58, BIT(29), 0); -+ odm_set_bb_reg(dm, R_0xf58, BIT(29), 1); -+ } -+ #endif -+ } else if (dm->support_ic_type & (ODM_RTL8814B)) { -+ if (dm->seg1_dfs_flag == 1) -+ radar_rpt_reg_value = odm_get_bb_reg(dm, R_0x2e20, -+ 0xffffffff); -+ else -+ radar_rpt_reg_value = odm_get_bb_reg(dm, R_0x2e00, -+ 0xffffffff); -+ short_pulse_cnt_cur = (u16)((radar_rpt_reg_value & 0x000ff800) -+ >> 11); -+ long_pulse_cnt_cur = (u16)((radar_rpt_reg_value & 0x0fc00000) -+ >> 22); -+ } else { -+ regf98_value = odm_get_bb_reg(dm, R_0xf98, 0xffffffff); -+ short_pulse_cnt_cur = (u16)(regf98_value & 0x000000ff); -+ long_pulse_cnt_cur = (u16)((regf98_value & 0x0000ff00) >> 8); -+ } -+ -+ /*@Get short pulse count, need carefully handle the counter overflow*/ -+ if (short_pulse_cnt_cur >= dfs->short_pulse_cnt_pre) { -+ short_pulse_cnt_inc = short_pulse_cnt_cur - -+ dfs->short_pulse_cnt_pre; -+ } else { -+ short_pulse_cnt_inc = short_pulse_cnt_cur; -+ } -+ dfs->short_pulse_cnt_pre = short_pulse_cnt_cur; -+ -+ /*@Get long pulse count, need carefully handle the counter overflow*/ -+ if (long_pulse_cnt_cur >= dfs->long_pulse_cnt_pre) { -+ long_pulse_cnt_inc = long_pulse_cnt_cur - -+ dfs->long_pulse_cnt_pre; -+ } else { -+ long_pulse_cnt_inc = long_pulse_cnt_cur; -+ } -+ dfs->long_pulse_cnt_pre = long_pulse_cnt_cur; -+ -+ total_pulse_count_inc = short_pulse_cnt_inc + long_pulse_cnt_inc; -+ -+ if (dfs->det_print) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "===============================================\n"); -+ PHYDM_DBG(dm, DBG_DFS, "FA_count_inc[%d]\n", fa_count_inc); -+ if (dm->support_ic_type & (ODM_RTL8721D)) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "Init_Gain[%x] st_l2h_cur[%x] 0xdf4[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n", -+ dfs->igi_cur, dfs->st_l2h_cur, regdf4_value, -+ short_pulse_cnt_inc, long_pulse_cnt_inc); -+ regf54_value = odm_get_bb_reg(dm, R_0xf54, MASKDWORD); -+ regf58_value = odm_get_bb_reg(dm, R_0xf58, MASKDWORD); -+ regf5c_value = odm_get_bb_reg(dm, R_0xf5c, MASKDWORD); -+ regf70_value = odm_get_bb_reg(dm, R_0xf70, MASKDWORD); -+ regf74_value = odm_get_bb_reg(dm, R_0xf74, MASKDWORD); -+ PHYDM_DBG(dm, DBG_DFS, -+ "0xf54[%08x] 0xf58[%08x] 0xf5c[%08x] 0xf70[%08x] 0xf74[%08x]\n", -+ regf54_value, regf58_value, regf5c_value, -+ regf70_value, regf74_value); -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "Init_Gain[%x] st_l2h_cur[%x] 0x2dbc[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n", -+ dfs->igi_cur, dfs->st_l2h_cur, -+ radar_rpt_reg_value, short_pulse_cnt_inc, -+ long_pulse_cnt_inc); -+ #if (RTL8812F_SUPPORT || RTL8822C_SUPPORT || RTL8814B_SUPPORT) -+ rega40_value = odm_get_bb_reg(dm, R_0xa40, MASKDWORD); -+ rega44_value = odm_get_bb_reg(dm, R_0xa44, MASKDWORD); -+ rega48_value = odm_get_bb_reg(dm, R_0xa48, MASKDWORD); -+ rega4c_value = odm_get_bb_reg(dm, R_0xa4c, MASKDWORD); -+ rega50_value = odm_get_bb_reg(dm, R_0xa50, MASKDWORD); -+ rega54_value = odm_get_bb_reg(dm, R_0xa54, MASKDWORD); -+ PHYDM_DBG(dm, DBG_DFS, -+ "0xa40[%08x] 0xa44[%08x] 0xa48[%08x] 0xa4c[%08x] 0xa50[%08x] 0xa54[%08x]\n", -+ rega40_value, rega44_value, rega48_value, -+ rega4c_value, rega50_value, rega54_value); -+ #endif -+ } else { -+ PHYDM_DBG(dm, DBG_DFS, -+ "Init_Gain[%x] 0x91c[%x] 0xf98[%08x] short_pulse_cnt_inc[%d] long_pulse_cnt_inc[%d]\n", -+ dfs->igi_cur, dfs->st_l2h_cur, regf98_value, -+ short_pulse_cnt_inc, long_pulse_cnt_inc); -+ reg918_value = odm_get_bb_reg(dm, R_0x918, -+ 0xffffffff); -+ reg91c_value = odm_get_bb_reg(dm, R_0x91c, -+ 0xffffffff); -+ reg920_value = odm_get_bb_reg(dm, R_0x920, -+ 0xffffffff); -+ reg924_value = odm_get_bb_reg(dm, R_0x924, -+ 0xffffffff); -+ PHYDM_DBG(dm, DBG_DFS, -+ "0x918[%08x] 0x91c[%08x] 0x920[%08x] 0x924[%08x]\n", -+ reg918_value, reg91c_value, -+ reg920_value, reg924_value); -+ } -+ PHYDM_DBG(dm, DBG_DFS, "Throughput: %dMbps\n", -+ (dm->rx_tp + dm->tx_tp)); -+ -+ PHYDM_DBG(dm, DBG_DFS, -+ "dfs_regdomain = %d, dbg_mode = %d, idle_mode = %d, print_hist_rpt = %d, hist_cond_on = %d\n", -+ region_domain, dfs->dbg_mode, -+ dfs->idle_mode, dfs->print_hist_rpt, -+ dfs->hist_cond_on); -+ } -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ tri_short_pulse = (radar_rpt_reg_value & BIT(20)) ? 1 : 0; -+ tri_long_pulse = (radar_rpt_reg_value & BIT(28)) ? 1 : 0; -+ } else { -+ tri_short_pulse = (regf98_value & BIT(17)) ? 1 : 0; -+ tri_long_pulse = (regf98_value & BIT(19)) ? 1 : 0; -+ } -+ -+ if (tri_short_pulse) { -+ phydm_radar_detect_reset(dm); -+ } -+ if (tri_long_pulse) { -+ phydm_radar_detect_reset(dm); -+ if (region_domain == PHYDM_DFS_DOMAIN_MKK) { -+ if (c_channel >= 52 && c_channel <= 64) { -+ tri_long_pulse = 0; -+ } -+ } -+ if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { -+ tri_long_pulse = 0; -+ } -+ } -+ -+ st_l2h_new = dfs->st_l2h_cur; -+ dfs->pulse_flag_hist[dfs->mask_idx] = tri_short_pulse | tri_long_pulse; -+ dfs->pulse_type_hist[dfs->mask_idx] = (tri_long_pulse) ? 1 : 0; -+ -+ /* PSD(not ready) */ -+ -+ fault_flag_det = 0; -+ fault_flag_psd = 0; -+ fa_flag = 0; -+ if (region_domain == PHYDM_DFS_DOMAIN_ETSI) { -+ fa_mask_th = dfs->fa_mask_th + 20; -+ } else { -+ fa_mask_th = dfs->fa_mask_th; -+ } -+ if (total_fa_in_hist >= fa_mask_th || dfs->igi_cur >= 0x30) { -+ /* st_l2h_new = dfs->st_l2h_max; */ -+ dfs->radar_det_mask_hist[index] = 1; -+ if (dfs->pulse_flag_hist[index] == 1) { -+ dfs->pulse_flag_hist[index] = 0; -+ if (dfs->det_print2) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "Radar is masked : FA mask\n"); -+ } -+ } -+ fa_flag = 1; -+ } else { -+ dfs->radar_det_mask_hist[index] = 0; -+ } -+ -+ if (dfs->det_print) { -+ PHYDM_DBG(dm, DBG_DFS, "mask_idx: %d\n", dfs->mask_idx); -+ PHYDM_DBG(dm, DBG_DFS, "radar_det_mask_hist: "); -+ for (i = 0; i < 5; i++) -+ PHYDM_DBG(dm, DBG_DFS, "%d ", -+ dfs->radar_det_mask_hist[i]); -+ PHYDM_DBG(dm, DBG_DFS, "pulse_flag_hist: "); -+ for (i = 0; i < 5; i++) -+ PHYDM_DBG(dm, DBG_DFS, "%d ", dfs->pulse_flag_hist[i]); -+ PHYDM_DBG(dm, DBG_DFS, "fa_inc_hist: "); -+ for (i = 0; i < 5; i++) -+ PHYDM_DBG(dm, DBG_DFS, "%d ", dfs->fa_inc_hist[i]); -+ PHYDM_DBG(dm, DBG_DFS, -+ "\nfa_mask_th: %d, total_fa_in_hist: %d ", -+ fa_mask_th, total_fa_in_hist); -+ } -+ -+ sum = 0; -+ for (k = 0; k < 5; k++) { -+ if (dfs->radar_det_mask_hist[k] == 1) -+ sum++; -+ } -+ -+ if (dfs->mask_hist_checked <= 5) -+ dfs->mask_hist_checked++; -+ -+ if (dfs->mask_hist_checked >= 5 && dfs->pulse_flag_hist[index]) { -+ if (sum <= 2) { -+ if (dfs->hist_cond_on) { -+ /*return the value from hist_radar_detected*/ -+ radar_detected = phydm_dfs_hist_log(dm, index); -+ } else { -+ if (dfs->pulse_type_hist[index] == 0) -+ dfs->radar_type = 0; -+ else if (dfs->pulse_type_hist[index] == 1) -+ dfs->radar_type = 1; -+ radar_detected = 1; -+ PHYDM_DBG(dm, DBG_DFS, -+ "Detected type %d radar signal!\n", -+ dfs->radar_type); -+ } -+ } else { -+ fault_flag_det = 1; -+ if (dfs->det_print2) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "Radar is masked : mask_hist large than thd\n"); -+ } -+ } -+ } -+ -+ dfs->mask_idx++; -+ if (dfs->mask_idx == 5) -+ dfs->mask_idx = 0; -+ -+ if (fault_flag_det == 0 && fault_flag_psd == 0 && fa_flag == 0) { -+ if (dfs->igi_cur < 0x30) { -+ st_l2h_new = dfs->st_l2h_min; -+ } -+ } -+ -+ if (st_l2h_new != dfs->st_l2h_cur) { -+ if (st_l2h_new < dfs->st_l2h_min) { -+ dfs->st_l2h_cur = dfs->st_l2h_min; -+ } else if (st_l2h_new > dfs->st_l2h_max) -+ dfs->st_l2h_cur = dfs->st_l2h_max; -+ else -+ dfs->st_l2h_cur = st_l2h_new; -+ /*odm_set_bb_reg(dm, R_0x91c, 0xff, dfs->st_l2h_cur);*/ -+ -+ dfs->pwdb_th_cur = ((int)dfs->st_l2h_cur - (int)dfs->igi_cur) -+ / 2 + dfs->pwdb_scalar_factor; -+ -+ /*@limit the pwdb value to absolute lower bound 8*/ -+ dfs->pwdb_th_cur = MAX_2(dfs->pwdb_th_cur, (int)dfs->pwdb_th); -+ -+ /*@limit the pwdb value to absolute upper bound 0x1f*/ -+ dfs->pwdb_th_cur = MIN_2(dfs->pwdb_th_cur, 0x1f); -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ odm_set_bb_reg(dm, R_0xa50, 0x000000f0, -+ dfs->pwdb_th_cur); -+ #if (RTL8721D_SUPPORT) -+ else if (dm->support_ic_type & ODM_RTL8721D) { -+ odm_set_bb_reg(dm, R_0xf54, 0x0000001f, -+ ((dfs->st_l2h_cur & 0x0000007c) >> 2)); -+ odm_set_bb_reg(dm, R_0xf58, 0xc0000000, -+ (dfs->st_l2h_cur & 0x00000003)); -+ odm_set_bb_reg(dm, R_0xf70, 0x03c00000, -+ dfs->pwdb_th_cur); -+ } -+ #endif -+ else -+ odm_set_bb_reg(dm, R_0x918, 0x00001f00, -+ dfs->pwdb_th_cur); -+ } -+ -+ if (dfs->det_print) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "fault_flag_det[%d], fault_flag_psd[%d], DFS_detected [%d]\n", -+ fault_flag_det, fault_flag_psd, radar_detected); -+ } -+ #if (RTL8721D_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8721D)) -+ odm_set_bb_reg(dm, R_0x908, MASKDWORD, reg908_value); -+ #endif -+ -+ return radar_detected; -+} -+ -+#if (RTL8814A_SUPPORT || RTL8822B_SUPPORT || RTL8821C_SUPPORT) -+void phydm_dfs_histogram_radar_distinguish( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _DFS_STATISTICS *dfs = &dm->dfs; -+ u8 region_domain = dm->dfs_region_domain; -+ u8 c_channel = *dm->channel; -+ u8 band_width = *dm->band_width; -+ -+ u8 dfs_pw_thd1 = 0, dfs_pw_thd2 = 0, dfs_pw_thd3 = 0; -+ u8 dfs_pw_thd4 = 0, dfs_pw_thd5 = 0; -+ u8 dfs_pri_thd1 = 0, dfs_pri_thd2 = 0, dfs_pri_thd3 = 0; -+ u8 dfs_pri_thd4 = 0, dfs_pri_thd5 = 0; -+ u8 pri_th = 0, i = 0; -+ u8 max_pri_idx = 0, max_pw_idx = 0, max_pri_cnt_th = 0; -+ u8 max_pri_cnt_fcc_g1_th = 0, max_pri_cnt_fcc_g3_th = 0; -+ u8 safe_pri_pw_diff_th = 0, safe_pri_pw_diff_fcc_th = 0; -+ u8 safe_pri_pw_diff_w53_th = 0, safe_pri_pw_diff_fcc_idle_th = 0; -+ u8 j = 0; -+ u32 dfs_hist1_pw = 0, dfs_hist2_pw = 0, g_pw[6] = {0}; -+ u32 dfs_hist1_pri = 0, dfs_hist2_pri = 0, g_pri[6] = {0}; -+ u8 pw_sum_g0g5 = 0, pw_sum_g1g2g3g4 = 0; -+ u8 pri_sum_g0g5 = 0, pri_sum_g1g2g3g4 = 0; -+ u16 pw_sum_ss_g1g2g3g4 = 0, pri_sum_ss_g1g2g3g4 = 0; -+ u8 max_pri_cnt = 0, max_pw_cnt = 0; -+ #if (RTL8721D_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8721D)) -+ return; -+ #endif -+ -+ /*read pulse width hist report*/ -+ odm_set_bb_reg(dm, 0x19e4, BIT(22) | BIT(23), 0x1); -+ dfs_hist1_pw = odm_get_bb_reg(dm, 0xf5c, 0xffffffff); -+ dfs_hist2_pw = odm_get_bb_reg(dm, 0xf74, 0xffffffff); -+ -+ g_pw[0] = (unsigned int)((dfs_hist2_pw & 0xff000000) >> 24); -+ g_pw[1] = (unsigned int)((dfs_hist2_pw & 0x00ff0000) >> 16); -+ g_pw[2] = (unsigned int)((dfs_hist2_pw & 0x0000ff00) >> 8); -+ g_pw[3] = (unsigned int)dfs_hist2_pw & 0x000000ff; -+ g_pw[4] = (unsigned int)((dfs_hist1_pw & 0xff000000) >> 24); -+ g_pw[5] = (unsigned int)((dfs_hist1_pw & 0x00ff0000) >> 16); -+ -+ /*read pulse repetition interval hist report*/ -+ odm_set_bb_reg(dm, 0x19e4, BIT(22) | BIT(23), 0x3); -+ dfs_hist1_pri = odm_get_bb_reg(dm, 0xf5c, 0xffffffff); -+ dfs_hist2_pri = odm_get_bb_reg(dm, 0xf74, 0xffffffff); -+ odm_set_bb_reg(dm, 0x19b4, 0x10000000, 1); /*reset histo report*/ -+ odm_set_bb_reg(dm, 0x19b4, 0x10000000, 0); /*@continue histo report*/ -+ -+ g_pri[0] = (unsigned int)((dfs_hist2_pri & 0xff000000) >> 24); -+ g_pri[1] = (unsigned int)((dfs_hist2_pri & 0x00ff0000) >> 16); -+ g_pri[2] = (unsigned int)((dfs_hist2_pri & 0x0000ff00) >> 8); -+ g_pri[3] = (unsigned int)dfs_hist2_pri & 0x000000ff; -+ g_pri[4] = (unsigned int)((dfs_hist1_pri & 0xff000000) >> 24); -+ g_pri[5] = (unsigned int)((dfs_hist1_pri & 0x00ff0000) >> 16); -+ -+ dfs->pri_cond1 = 0; -+ dfs->pri_cond2 = 0; -+ dfs->pri_cond3 = 0; -+ dfs->pri_cond4 = 0; -+ dfs->pri_cond5 = 0; -+ dfs->pw_cond1 = 0; -+ dfs->pw_cond2 = 0; -+ dfs->pw_cond3 = 0; -+ dfs->pri_type3_4_cond1 = 0; /*@for ETSI*/ -+ dfs->pri_type3_4_cond2 = 0; /*@for ETSI*/ -+ dfs->pw_long_cond1 = 0; /*@for long radar*/ -+ dfs->pw_long_cond2 = 0; /*@for long radar*/ -+ dfs->pri_long_cond1 = 0; /*@for long radar*/ -+ dfs->pw_flag = 0; -+ dfs->pri_flag = 0; -+ dfs->pri_type3_4_flag = 0; /*@for ETSI*/ -+ dfs->long_radar_flag = 0; -+ dfs->pw_std = 0; /*The std(var) of reasonable num of pw group*/ -+ dfs->pri_std = 0; /*The std(var) of reasonable num of pri group*/ -+ -+ for (i = 0; i < 6; i++) { -+ dfs->pw_hold_sum[i] = 0; -+ dfs->pri_hold_sum[i] = 0; -+ } -+ -+ if (dfs->idle_mode == 1) -+ pri_th = dfs->pri_hist_th; -+ else -+ pri_th = dfs->pri_hist_th - 1; -+ -+ for (i = 0; i < 6; i++) { -+ dfs->pw_hold[dfs->hist_idx][i] = (u8)g_pw[i]; -+ dfs->pri_hold[dfs->hist_idx][i] = (u8)g_pri[i]; -+ /*@collect whole histogram report may take some time -+ *so we add the counter of 2 time slots in FCC and ETSI -+ */ -+ dfs->pw_hold_sum[i] = dfs->pw_hold_sum[i] + -+ dfs->pw_hold[(dfs->hist_idx + 1) % 3][i] + -+ dfs->pw_hold[(dfs->hist_idx + 2) % 3][i]; -+ dfs->pri_hold_sum[i] = dfs->pri_hold_sum[i] + -+ dfs->pri_hold[(dfs->hist_idx + 1) % 3][i] + -+ dfs->pri_hold[(dfs->hist_idx + 2) % 3][i]; -+ } -+ /*@For long radar type*/ -+ for (j = 1; j < 4; j++) { -+ dfs->pw_long_hold_sum[i] = dfs->pw_long_hold_sum[i] + -+ dfs->pw_hold[(dfs->hist_long_idx + j) % 4][i]; -+ dfs->pri_long_hold_sum[i] = dfs->pri_long_hold_sum[i] + -+ dfs->pri_hold[(dfs->hist_long_idx + j) % 4][i]; -+ } -+ -+ dfs->hist_idx++; -+ if (dfs->hist_idx == 3) -+ dfs->hist_idx = 0; -+ dfs->hist_long_idx++; -+ if (dfs->hist_long_idx == 4) -+ dfs->hist_long_idx = 0; -+ -+ max_pri_cnt = 0; -+ max_pri_idx = 0; -+ max_pw_cnt = 0; -+ max_pw_idx = 0; -+ max_pri_cnt_th = dfs->pri_sum_g1_th; -+ max_pri_cnt_fcc_g1_th = dfs->pri_sum_g1_fcc_th; -+ max_pri_cnt_fcc_g3_th = dfs->pri_sum_g3_fcc_th; -+ safe_pri_pw_diff_th = dfs->pri_pw_diff_th; -+ safe_pri_pw_diff_fcc_th = dfs->pri_pw_diff_fcc_th; -+ safe_pri_pw_diff_fcc_idle_th = dfs->pri_pw_diff_fcc_idle_th; -+ safe_pri_pw_diff_w53_th = dfs->pri_pw_diff_w53_th; -+ -+ /*@g1 to g4 is the reseasonable range of pri and pw*/ -+ for (i = 1; i <= 4; i++) { -+ if (dfs->pri_hold_sum[i] > max_pri_cnt) { -+ max_pri_cnt = dfs->pri_hold_sum[i]; -+ max_pri_idx = i; -+ } -+ if (dfs->pw_hold_sum[i] > max_pw_cnt) { -+ max_pw_cnt = dfs->pw_hold_sum[i]; -+ max_pw_idx = i; -+ } -+ if (dfs->pri_hold_sum[i] >= pri_th) -+ dfs->pri_cond1 = 1; -+ } -+ -+ pri_sum_g0g5 = dfs->pri_hold_sum[0]; -+ if (pri_sum_g0g5 == 0) -+ pri_sum_g0g5 = 1; -+ pri_sum_g1g2g3g4 = dfs->pri_hold_sum[1] + dfs->pri_hold_sum[2] -+ + dfs->pri_hold_sum[3] + dfs->pri_hold_sum[4]; -+ -+ /*pw will reduce because of dc, so we do not treat g0 as illegal group*/ -+ pw_sum_g0g5 = dfs->pw_hold_sum[5]; -+ if (pw_sum_g0g5 == 0) -+ pw_sum_g0g5 = 1; -+ pw_sum_g1g2g3g4 = dfs->pw_hold_sum[1] + dfs->pw_hold_sum[2] + -+ dfs->pw_hold_sum[3] + dfs->pw_hold_sum[4]; -+ -+ /*@Calculate the variation from g1 to g4*/ -+ for (i = 1; i < 5; i++) { -+ /*Sum of square*/ -+ pw_sum_ss_g1g2g3g4 = pw_sum_ss_g1g2g3g4 + -+ (dfs->pw_hold_sum[i] - (pw_sum_g1g2g3g4 / 4)) * -+ (dfs->pw_hold_sum[i] - (pw_sum_g1g2g3g4 / 4)); -+ pri_sum_ss_g1g2g3g4 = pri_sum_ss_g1g2g3g4 + -+ (dfs->pri_hold_sum[i] - (pri_sum_g1g2g3g4 / 4)) * -+ (dfs->pri_hold_sum[i] - (pri_sum_g1g2g3g4 / 4)); -+ } -+ /*The value may less than the normal variance, -+ *since the variable type is int (not float) -+ */ -+ dfs->pw_std = (u8)(pw_sum_ss_g1g2g3g4 / 4); -+ dfs->pri_std = (u8)(pri_sum_ss_g1g2g3g4 / 4); -+ -+ if (region_domain == 1) { -+ dfs->pri_type3_4_flag = 1; /*@ETSI flag*/ -+ -+ /*(OTA) Cancel long PRI case*/ -+ dfs->pri_cond2 = 1; -+ -+ /*reasonable group shouldn't large*/ -+ if ((pri_sum_g0g5 + pri_sum_g1g2g3g4) / pri_sum_g0g5 > 2 && -+ pri_sum_g1g2g3g4 <= dfs->pri_sum_safe_fcc_th) -+ dfs->pri_cond3 = 1; -+ -+ /*@Cancel the condition that the abs between pri and pw*/ -+ if (dfs->pri_std >= dfs->pri_std_th) -+ dfs->pri_cond4 = 1; -+ else if (max_pri_idx == 1 && -+ max_pri_cnt >= max_pri_cnt_fcc_g1_th) -+ dfs->pri_cond4 = 1; -+ -+ /*(OTA) Cancel the condition (type 3,4 distinction)*/ -+ dfs->pri_cond5 = 1; -+ -+ if (dfs->pri_cond1 && dfs->pri_cond2 && dfs->pri_cond3 && -+ dfs->pri_cond4 && dfs->pri_cond5) -+ dfs->pri_flag = 1; -+ -+ /* PW judgment conditions for short radar type */ -+ /*ratio of reasonable and illegal group && g5 should be zero*/ -+ if (((pw_sum_g0g5 + pw_sum_g1g2g3g4) / pw_sum_g0g5 > 2) && -+ (dfs->pw_hold_sum[5] <= 1)) -+ dfs->pw_cond1 = 1; -+ /*unreasonable group*/ -+ if (dfs->pw_hold_sum[4] == 0 && dfs->pw_hold_sum[5] == 0) -+ dfs->pw_cond2 = 1; -+ /*pw's std (short radar) should be large(=7)*/ -+ if (dfs->pw_std >= dfs->pw_std_th) -+ dfs->pw_cond3 = 1; -+ if (dfs->pw_cond1 && dfs->pw_cond2 && dfs->pw_cond3) -+ dfs->pw_flag = 1; -+ -+ /* @Judgment conditions of long radar type */ -+ if (band_width == CHANNEL_WIDTH_20) { -+ if (dfs->pw_long_hold_sum[4] >= -+ dfs->pw_long_lower_20m_th) -+ dfs->pw_long_cond1 = 1; -+ } else{ -+ if (dfs->pw_long_hold_sum[4] >= dfs->pw_long_lower_th) -+ dfs->pw_long_cond1 = 1; -+ } -+ /* @Disable the condition that dfs->pw_long_hold_sum[1] */ -+ if (dfs->pw_long_hold_sum[2] + dfs->pw_long_hold_sum[3] + -+ dfs->pw_long_hold_sum[4] <= dfs->pw_long_sum_upper_th && -+ dfs->pw_long_hold_sum[2] <= dfs->pw_long_hold_sum[4] && -+ dfs->pw_long_hold_sum[3] <= dfs->pw_long_hold_sum[4]) -+ dfs->pw_long_cond2 = 1; -+ /*@g4 should be large for long radar*/ -+ if (dfs->pri_long_hold_sum[4] <= dfs->pri_long_upper_th) -+ dfs->pri_long_cond1 = 1; -+ if (dfs->pw_long_cond1 && dfs->pw_long_cond2 && -+ dfs->pri_long_cond1) -+ dfs->long_radar_flag = 1; -+ } else if (region_domain == 2) { -+ dfs->pri_type3_4_flag = 1; /*@ETSI flag*/ -+ -+ /*PRI judgment conditions for short radar type*/ -+ if ((pri_sum_g0g5 + pri_sum_g1g2g3g4) / pri_sum_g0g5 > 2) -+ dfs->pri_cond2 = 1; -+ -+ /*reasonable group shouldn't too large*/ -+ if (pri_sum_g1g2g3g4 <= dfs->pri_sum_safe_fcc_th) -+ dfs->pri_cond3 = 1; -+ -+ /*Cancel the abs diff between pri and pw for idle mode (thr=2)*/ -+ dfs->pri_cond4 = 1; -+ -+ if (dfs->idle_mode == 1) { -+ if (dfs->pri_std >= dfs->pri_std_idle_th) { -+ if (max_pw_idx == 3 && -+ pri_sum_g1g2g3g4 <= dfs->pri_sum_type4_th){ -+ /*To distinguish between type 4 radar and false detection*/ -+ dfs->pri_cond5 = 1; -+ } else if (max_pw_idx == 1 && -+ pri_sum_g1g2g3g4 >= -+ dfs->pri_sum_type6_th) { -+ /*To distinguish between type 6 radar and false detection*/ -+ dfs->pri_cond5 = 1; -+ } else { -+ /*pri variation of short radar should be large (idle mode)*/ -+ dfs->pri_cond5 = 1; -+ } -+ } -+ } else { -+ /*pri variation of short radar should be large (TP mode)*/ -+ if (dfs->pri_std >= dfs->pri_std_th) -+ dfs->pri_cond5 = 1; -+ } -+ -+ if (dfs->pri_cond1 && dfs->pri_cond2 && dfs->pri_cond3 && -+ dfs->pri_cond4 && dfs->pri_cond5) -+ dfs->pri_flag = 1; -+ -+ /* PW judgment conditions for short radar type */ -+ if (((pw_sum_g0g5 + pw_sum_g1g2g3g4) / pw_sum_g0g5 > 2) && -+ (dfs->pw_hold_sum[5] <= 1)) -+ /*ratio of reasonable and illegal group && g5 should be zero*/ -+ dfs->pw_cond1 = 1; -+ -+ if ((c_channel >= 52) && (c_channel <= 64)) -+ dfs->pw_cond2 = 1; -+ /*unreasonable group shouldn't too large*/ -+ else if (dfs->pw_hold_sum[0] <= dfs->pw_g0_th) -+ dfs->pw_cond2 = 1; -+ -+ if (dfs->idle_mode == 1) { -+ /*pw variation of short radar should be large (idle mode)*/ -+ if (dfs->pw_std >= dfs->pw_std_idle_th) -+ dfs->pw_cond3 = 1; -+ } else { -+ /*pw variation of short radar should be large (TP mode)*/ -+ if (dfs->pw_std >= dfs->pw_std_th) -+ dfs->pw_cond3 = 1; -+ } -+ if (dfs->pw_cond1 && dfs->pw_cond2 && dfs->pw_cond3) -+ dfs->pw_flag = 1; -+ -+ /* @Judgment conditions of long radar type */ -+ if (band_width == CHANNEL_WIDTH_20) { -+ if (dfs->pw_long_hold_sum[4] >= -+ dfs->pw_long_lower_20m_th) -+ dfs->pw_long_cond1 = 1; -+ } else{ -+ if (dfs->pw_long_hold_sum[4] >= dfs->pw_long_lower_th) -+ dfs->pw_long_cond1 = 1; -+ } -+ if (dfs->pw_long_hold_sum[1] + dfs->pw_long_hold_sum[2] + -+ dfs->pw_long_hold_sum[3] + dfs->pw_long_hold_sum[4] -+ <= dfs->pw_long_sum_upper_th) -+ dfs->pw_long_cond2 = 1; -+ /*@g4 should be large for long radar*/ -+ if (dfs->pri_long_hold_sum[4] <= dfs->pri_long_upper_th) -+ dfs->pri_long_cond1 = 1; -+ if (dfs->pw_long_cond1 && -+ dfs->pw_long_cond2 && dfs->pri_long_cond1) -+ dfs->long_radar_flag = 1; -+ } else if (region_domain == 3) { -+ /*ratio of reasonable group and illegal group */ -+ if ((pri_sum_g0g5 + pri_sum_g1g2g3g4) / pri_sum_g0g5 > 2) -+ dfs->pri_cond2 = 1; -+ -+ if (pri_sum_g1g2g3g4 <= dfs->pri_sum_safe_th) -+ dfs->pri_cond3 = 1; -+ -+ /*@Cancel the condition that the abs between pri and pw*/ -+ dfs->pri_cond4 = 1; -+ -+ if (dfs->pri_hold_sum[5] <= dfs->pri_sum_g5_th) -+ dfs->pri_cond5 = 1; -+ -+ if (band_width == CHANNEL_WIDTH_40) { -+ if (max_pw_idx == 4) { -+ if (max_pw_cnt >= dfs->type4_pw_max_cnt && -+ pri_sum_g1g2g3g4 >= -+ dfs->type4_safe_pri_sum_th) { -+ dfs->pri_cond1 = 1; -+ dfs->pri_cond4 = 1; -+ dfs->pri_type3_4_cond1 = 1; -+ } -+ } -+ } -+ -+ if (dfs->pri_cond1 && dfs->pri_cond2 && -+ dfs->pri_cond3 && dfs->pri_cond4 && dfs->pri_cond5) -+ dfs->pri_flag = 1; -+ -+ if (((pw_sum_g0g5 + pw_sum_g1g2g3g4) / pw_sum_g0g5 > 2)) -+ dfs->pw_flag = 1; -+ -+ /*@max num pri group is g1 means radar type3 or type4*/ -+ if (max_pri_idx == 1) { -+ if (max_pri_cnt >= max_pri_cnt_th) -+ dfs->pri_type3_4_cond1 = 1; -+ if (dfs->pri_hold_sum[4] <= -+ dfs->pri_sum_g5_under_g1_th && -+ dfs->pri_hold_sum[5] <= dfs->pri_sum_g5_under_g1_th) -+ dfs->pri_type3_4_cond2 = 1; -+ } else { -+ dfs->pri_type3_4_cond1 = 1; -+ dfs->pri_type3_4_cond2 = 1; -+ } -+ if (dfs->pri_type3_4_cond1 && dfs->pri_type3_4_cond2) -+ dfs->pri_type3_4_flag = 1; -+ } else { -+ } -+ -+ if (dfs->print_hist_rpt) { -+ dfs_pw_thd1 = (u8)odm_get_bb_reg(dm, 0x19e4, 0xff000000); -+ dfs_pw_thd2 = (u8)odm_get_bb_reg(dm, 0x19e8, 0x000000ff); -+ dfs_pw_thd3 = (u8)odm_get_bb_reg(dm, 0x19e8, 0x0000ff00); -+ dfs_pw_thd4 = (u8)odm_get_bb_reg(dm, 0x19e8, 0x00ff0000); -+ dfs_pw_thd5 = (u8)odm_get_bb_reg(dm, 0x19e8, 0xff000000); -+ -+ dfs_pri_thd1 = (u8)odm_get_bb_reg(dm, 0x19b8, 0x7F80); -+ dfs_pri_thd2 = (u8)odm_get_bb_reg(dm, 0x19ec, 0x000000ff); -+ dfs_pri_thd3 = (u8)odm_get_bb_reg(dm, 0x19ec, 0x0000ff00); -+ dfs_pri_thd4 = (u8)odm_get_bb_reg(dm, 0x19ec, 0x00ff0000); -+ dfs_pri_thd5 = (u8)odm_get_bb_reg(dm, 0x19ec, 0xff000000); -+ -+ PHYDM_DBG(dm, DBG_DFS, "\ndfs_pw_thd=%d %d %d %d %d\n", -+ dfs_pw_thd1, dfs_pw_thd2, dfs_pw_thd3, -+ dfs_pw_thd4, dfs_pw_thd5); -+ PHYDM_DBG(dm, DBG_DFS, "-----pulse width hist-----\n"); -+ PHYDM_DBG(dm, DBG_DFS, "dfs_hist_pw=%x %x\n", -+ dfs_hist1_pw, dfs_hist2_pw); -+ PHYDM_DBG(dm, DBG_DFS, "g_pw_hist = %x %x %x %x %x %x\n", -+ g_pw[0], g_pw[1], g_pw[2], g_pw[3], -+ g_pw[4], g_pw[5]); -+ PHYDM_DBG(dm, DBG_DFS, "dfs_pri_thd=%d %d %d %d %d\n", -+ dfs_pri_thd1, dfs_pri_thd2, dfs_pri_thd3, -+ dfs_pri_thd4, dfs_pri_thd5); -+ PHYDM_DBG(dm, DBG_DFS, "-----pulse interval hist-----\n"); -+ PHYDM_DBG(dm, DBG_DFS, "dfs_hist_pri=%x %x\n", -+ dfs_hist1_pri, dfs_hist2_pri); -+ PHYDM_DBG(dm, DBG_DFS, -+ "g_pri_hist = %x %x %x %x %x %x, pw_flag = %d, pri_flag = %d\n", -+ g_pri[0], g_pri[1], g_pri[2], g_pri[3], g_pri[4], -+ g_pri[5], dfs->pw_flag, dfs->pri_flag); -+ if (region_domain == 1 || region_domain == 3) { -+ PHYDM_DBG(dm, DBG_DFS, "hist_idx= %d\n", -+ (dfs->hist_idx + 2) % 3); -+ } else { -+ PHYDM_DBG(dm, DBG_DFS, "hist_idx= %d\n", -+ (dfs->hist_idx + 3) % 4); -+ } -+ PHYDM_DBG(dm, DBG_DFS, "hist_long_idx= %d\n", -+ (dfs->hist_long_idx + 299) % 300); -+ PHYDM_DBG(dm, DBG_DFS, -+ "pw_sum_g0g5 = %d, pw_sum_g1g2g3g4 = %d\n", -+ pw_sum_g0g5, pw_sum_g1g2g3g4); -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_sum_g0g5 = %d, pri_sum_g1g2g3g4 = %d\n", -+ pri_sum_g0g5, pri_sum_g1g2g3g4); -+ PHYDM_DBG(dm, DBG_DFS, "pw_hold_sum = %d %d %d %d %d %d\n", -+ dfs->pw_hold_sum[0], dfs->pw_hold_sum[1], -+ dfs->pw_hold_sum[2], dfs->pw_hold_sum[3], -+ dfs->pw_hold_sum[4], dfs->pw_hold_sum[5]); -+ PHYDM_DBG(dm, DBG_DFS, "pri_hold_sum = %d %d %d %d %d %d\n", -+ dfs->pri_hold_sum[0], dfs->pri_hold_sum[1], -+ dfs->pri_hold_sum[2], dfs->pri_hold_sum[3], -+ dfs->pri_hold_sum[4], dfs->pri_hold_sum[5]); -+ PHYDM_DBG(dm, DBG_DFS, "pw_long_hold_sum = %d %d %d %d %d %d\n", -+ dfs->pw_long_hold_sum[0], dfs->pw_long_hold_sum[1], -+ dfs->pw_long_hold_sum[2], dfs->pw_long_hold_sum[3], -+ dfs->pw_long_hold_sum[4], dfs->pw_long_hold_sum[5]); -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_long_hold_sum = %d %d %d %d %d %d\n", -+ dfs->pri_long_hold_sum[0], dfs->pri_long_hold_sum[1], -+ dfs->pri_long_hold_sum[2], dfs->pri_long_hold_sum[3], -+ dfs->pri_long_hold_sum[4], dfs->pri_long_hold_sum[5]); -+ PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n", dfs->idle_mode); -+ PHYDM_DBG(dm, DBG_DFS, "pw_standard = %d\n", dfs->pw_std); -+ PHYDM_DBG(dm, DBG_DFS, "pri_standard = %d\n", dfs->pri_std); -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_cond1 = %d, pri_cond2 = %d, pri_cond3 = %d, pri_cond4 = %d, pri_cond5 = %d\n", -+ dfs->pri_cond1, dfs->pri_cond2, dfs->pri_cond3, -+ dfs->pri_cond4, dfs->pri_cond5); -+ PHYDM_DBG(dm, DBG_DFS, -+ "bandwidth = %d, pri_th = %d, max_pri_cnt_th = %d, safe_pri_pw_diff_th = %d\n", -+ band_width, pri_th, max_pri_cnt_th, -+ safe_pri_pw_diff_th); -+ } -+} -+#endif -+boolean phydm_dfs_hist_log(void *dm_void, u8 index) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _DFS_STATISTICS *dfs = &dm->dfs; -+ u8 i = 0, j = 0; -+ boolean hist_radar_detected = 0; -+ -+ if (dfs->pulse_type_hist[index] == 0) { -+ dfs->radar_type = 0; -+ if (dfs->pw_flag && dfs->pri_flag && -+ dfs->pri_type3_4_flag) { -+ hist_radar_detected = 1; -+ PHYDM_DBG(dm, DBG_DFS, -+ "Detected type %d radar signal!\n", -+ dfs->radar_type); -+ if (dfs->det_print2) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "hist_idx= %d\n", -+ (dfs->hist_idx + 3) % 4); -+ for (j = 0; j < 4; j++) { -+ for (i = 0; i < 6; i++) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_hold = %d ", -+ dfs->pri_hold[j][i]); -+ } -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+ } -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+ for (j = 0; j < 4; j++) { -+ for (i = 0; i < 6; i++) { -+ PHYDM_DBG(dm, DBG_DFS, "pw_hold = %d ", -+ dfs->pw_hold[j][i]); -+ } -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+ } -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+ PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n", -+ dfs->idle_mode); -+ PHYDM_DBG(dm, DBG_DFS, -+ "pw_hold_sum = %d %d %d %d %d %d\n", -+ dfs->pw_hold_sum[0], -+ dfs->pw_hold_sum[1], -+ dfs->pw_hold_sum[2], -+ dfs->pw_hold_sum[3], -+ dfs->pw_hold_sum[4], -+ dfs->pw_hold_sum[5]); -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_hold_sum = %d %d %d %d %d %d\n", -+ dfs->pri_hold_sum[0], -+ dfs->pri_hold_sum[1], -+ dfs->pri_hold_sum[2], -+ dfs->pri_hold_sum[3], -+ dfs->pri_hold_sum[4], -+ dfs->pri_hold_sum[5]); -+ } -+ } else { -+ if (dfs->det_print2) { -+ if (dfs->pulse_flag_hist[index] && -+ dfs->pri_flag == 0) { -+ PHYDM_DBG(dm, DBG_DFS, "pri_variation = %d\n", -+ dfs->pri_std); -+ PHYDM_DBG(dm, DBG_DFS, -+ "PRI criterion is not satisfied!\n"); -+ if (dfs->pri_cond1 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_cond1 is not satisfied!\n"); -+ if (dfs->pri_cond2 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_cond2 is not satisfied!\n"); -+ if (dfs->pri_cond3 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_cond3 is not satisfied!\n"); -+ if (dfs->pri_cond4 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_cond4 is not satisfied!\n"); -+ if (dfs->pri_cond5 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_cond5 is not satisfied!\n"); -+ } -+ if (dfs->pulse_flag_hist[index] && -+ dfs->pw_flag == 0) { -+ PHYDM_DBG(dm, DBG_DFS, "pw_variation = %d\n", -+ dfs->pw_std); -+ PHYDM_DBG(dm, DBG_DFS, -+ "PW criterion is not satisfied!\n"); -+ if (dfs->pw_cond1 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pw_cond1 is not satisfied!\n"); -+ if (dfs->pw_cond2 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pw_cond2 is not satisfied!\n"); -+ if (dfs->pw_cond3 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pw_cond3 is not satisfied!\n"); -+ } -+ if (dfs->pulse_flag_hist[index] && -+ (dfs->pri_type3_4_flag == 0)) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_type3_4 criterion is not satisfied!\n"); -+ if (dfs->pri_type3_4_cond1 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_type3_4_cond1 is not satisfied!\n"); -+ if (dfs->pri_type3_4_cond2 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_type3_4_cond2 is not satisfied!\n"); -+ } -+ PHYDM_DBG(dm, DBG_DFS, "hist_idx= %d\n", -+ (dfs->hist_idx + 3) % 4); -+ for (j = 0; j < 4; j++) { -+ for (i = 0; i < 6; i++) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_hold = %d ", -+ dfs->pri_hold[j][i]); -+ } -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+ } -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+ for (j = 0; j < 4; j++) { -+ for (i = 0; i < 6; i++) -+ PHYDM_DBG(dm, DBG_DFS, -+ "pw_hold = %d ", -+ dfs->pw_hold[j][i]); -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+ } -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+ PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n", -+ dfs->idle_mode); -+ PHYDM_DBG(dm, DBG_DFS, -+ "pw_hold_sum = %d %d %d %d %d %d\n", -+ dfs->pw_hold_sum[0], dfs->pw_hold_sum[1], -+ dfs->pw_hold_sum[2], dfs->pw_hold_sum[3], -+ dfs->pw_hold_sum[4], dfs->pw_hold_sum[5]); -+ PHYDM_DBG(dm, DBG_DFS, -+ "pri_hold_sum = %d %d %d %d %d %d\n", -+ dfs->pri_hold_sum[0], dfs->pri_hold_sum[1], -+ dfs->pri_hold_sum[2], dfs->pri_hold_sum[3], -+ dfs->pri_hold_sum[4], dfs->pri_hold_sum[5]); -+ } -+ } -+ } else { -+ dfs->radar_type = 1; -+ if (dfs->det_print2) { -+ PHYDM_DBG(dm, DBG_DFS, "\n"); -+ PHYDM_DBG(dm, DBG_DFS, "idle_mode = %d\n", -+ dfs->idle_mode); -+ } -+ /* @Long radar should satisfy three conditions */ -+ if (dfs->long_radar_flag == 1) { -+ hist_radar_detected = 1; -+ PHYDM_DBG(dm, DBG_DFS, -+ "Detected type %d radar signal!\n", -+ dfs->radar_type); -+ } else { -+ if (dfs->det_print2) { -+ if (dfs->pw_long_cond1 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "--pw_long_cond1 is not satisfied!--\n"); -+ if (dfs->pw_long_cond2 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "--pw_long_cond2 is not satisfied!--\n"); -+ if (dfs->pri_long_cond1 == 0) -+ PHYDM_DBG(dm, DBG_DFS, -+ "--pri_long_cond1 is not satisfied!--\n"); -+ } -+ } -+ } -+ return hist_radar_detected; -+} -+ -+boolean phydm_radar_detect(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _DFS_STATISTICS *dfs = &dm->dfs; -+ boolean radar_detected = false; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ dfs->igi_cur = (u8)odm_get_bb_reg(dm, R_0x1d70, 0x0000007f); -+ dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0xa40, 0x00007f00); -+ #if (RTL8721D_SUPPORT) -+ } else if (dm->support_ic_type & (ODM_RTL8721D)) { -+ dfs->st_l2h_cur = (u8)(odm_get_bb_reg(dm, R_0xf54, -+ 0x0000001f) << 2); -+ dfs->st_l2h_cur += (u8)odm_get_bb_reg(dm, R_0xf58, 0xc0000000); -+ #endif -+ } else { -+ dfs->igi_cur = (u8)odm_get_bb_reg(dm, R_0xc50, 0x0000007f); -+ dfs->st_l2h_cur = (u8)odm_get_bb_reg(dm, R_0x91c, 0x000000ff); -+ } -+ -+ /* @dynamic pwdb calibration */ -+ if (dfs->igi_pre != dfs->igi_cur) { -+ dfs->pwdb_th_cur = ((int)dfs->st_l2h_cur - (int)dfs->igi_cur) -+ / 2 + dfs->pwdb_scalar_factor; -+ -+ /* @limit the pwdb value to absolute lower bound 0xa */ -+ dfs->pwdb_th_cur = MAX_2(dfs->pwdb_th_cur, (int)dfs->pwdb_th); -+ /* @limit the pwdb value to absolute upper bound 0x1f */ -+ dfs->pwdb_th_cur = MIN_2(dfs->pwdb_th_cur, 0x1f); -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ odm_set_bb_reg(dm, R_0xa50, 0x000000f0, -+ dfs->pwdb_th_cur); -+ #if (RTL8721D_SUPPORT) -+ else if (dm->support_ic_type & (ODM_RTL8721D)) -+ odm_set_bb_reg(dm, R_0xf70, 0x03c00000, -+ dfs->pwdb_th_cur); -+ #endif -+ else -+ odm_set_bb_reg(dm, R_0x918, 0x00001f00, -+ dfs->pwdb_th_cur); -+ } -+ dfs->igi_pre = dfs->igi_cur; -+ -+ phydm_dfs_dynamic_setting(dm); -+ #if (RTL8814A_SUPPORT || RTL8822B_SUPPORT || RTL8821C_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) -+ phydm_dfs_histogram_radar_distinguish(dm); -+ #endif -+ radar_detected = phydm_radar_detect_dm_check(dm); -+ -+ if (radar_detected) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "Radar detect: %d\n", radar_detected); -+ phydm_radar_detect_reset(dm); -+ if (dfs->dbg_mode == 1) { -+ PHYDM_DBG(dm, DBG_DFS, -+ "Radar is detected in DFS dbg mode.\n"); -+ radar_detected = 0; -+ } -+ } -+ -+ if (dfs->sw_trigger_mode) { -+ radar_detected = 1; -+ PHYDM_DBG(dm, DBG_DFS, -+ "Radar is detected in DFS SW trigger mode.\n"); -+ } -+ -+ return radar_detected; -+} -+ -+void phydm_dfs_hist_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _DFS_STATISTICS *dfs = &dm->dfs; -+ char help[] = "-h"; -+ u32 argv[5] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{0} pri_hist_th = %d\n", dfs->pri_hist_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{1} pri_sum_g1_th = %d\n", dfs->pri_sum_g1_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{2} pri_sum_g5_th = %d\n", dfs->pri_sum_g5_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{3} pri_sum_g1_fcc_th = %d\n", -+ dfs->pri_sum_g1_fcc_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{4} pri_sum_g3_fcc_th = %d\n", -+ dfs->pri_sum_g3_fcc_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{5} pri_sum_safe_fcc_th = %d\n", -+ dfs->pri_sum_safe_fcc_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{6} pri_sum_type4_th = %d\n", dfs->pri_sum_type4_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{7} pri_sum_type6_th = %d\n", dfs->pri_sum_type6_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{8} pri_sum_safe_th = %d\n", dfs->pri_sum_safe_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{9} pri_sum_g5_under_g1_th = %d\n", -+ dfs->pri_sum_g5_under_g1_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{10} pri_pw_diff_th = %d\n", dfs->pri_pw_diff_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{11} pri_pw_diff_fcc_th = %d\n", -+ dfs->pri_pw_diff_fcc_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{12} pri_pw_diff_fcc_idle_th = %d\n", -+ dfs->pri_pw_diff_fcc_idle_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{13} pri_pw_diff_w53_th = %d\n", -+ dfs->pri_pw_diff_w53_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{14} pri_type1_low_fcc_th = %d\n", -+ dfs->pri_type1_low_fcc_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{15} pri_type1_upp_fcc_th = %d\n", -+ dfs->pri_type1_upp_fcc_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{16} pri_type1_cen_fcc_th = %d\n", -+ dfs->pri_type1_cen_fcc_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{17} pw_g0_th = %d\n", dfs->pw_g0_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{18} pw_long_lower_20m_th = %d\n", -+ dfs->pw_long_lower_20m_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{19} pw_long_lower_th = %d\n", -+ dfs->pw_long_lower_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{20} pri_long_upper_th = %d\n", -+ dfs->pri_long_upper_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{21} pw_long_sum_upper_th = %d\n", -+ dfs->pw_long_sum_upper_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{22} pw_std_th = %d\n", dfs->pw_std_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{23} pw_std_idle_th = %d\n", dfs->pw_std_idle_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{24} pri_std_th = %d\n", dfs->pri_std_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{25} pri_std_idle_th = %d\n", dfs->pri_std_idle_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{26} type4_pw_max_cnt = %d\n", dfs->type4_pw_max_cnt); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{27} type4_safe_pri_sum_th = %d\n", -+ dfs->type4_safe_pri_sum_th); -+ } else { -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &argv[0]); -+ -+ for (i = 1; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &argv[i]); -+ } -+ if (argv[0] == 0) { -+ dfs->pri_hist_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_hist_th = %d\n", -+ dfs->pri_hist_th); -+ } else if (argv[0] == 1) { -+ dfs->pri_sum_g1_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_sum_g1_th = %d\n", -+ dfs->pri_sum_g1_th); -+ } else if (argv[0] == 2) { -+ dfs->pri_sum_g5_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_sum_g5_th = %d\n", -+ dfs->pri_sum_g5_th); -+ } else if (argv[0] == 3) { -+ dfs->pri_sum_g1_fcc_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_sum_g1_fcc_th = %d\n", -+ dfs->pri_sum_g1_fcc_th); -+ } else if (argv[0] == 4) { -+ dfs->pri_sum_g3_fcc_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_sum_g3_fcc_th = %d\n", -+ dfs->pri_sum_g3_fcc_th); -+ } else if (argv[0] == 5) { -+ dfs->pri_sum_safe_fcc_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_sum_safe_fcc_th = %d\n", -+ dfs->pri_sum_safe_fcc_th); -+ } else if (argv[0] == 6) { -+ dfs->pri_sum_type4_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_sum_type4_th = %d\n", -+ dfs->pri_sum_type4_th); -+ } else if (argv[0] == 7) { -+ dfs->pri_sum_type6_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_sum_type6_th = %d\n", -+ dfs->pri_sum_type6_th); -+ } else if (argv[0] == 8) { -+ dfs->pri_sum_safe_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_sum_safe_th = %d\n", -+ dfs->pri_sum_safe_th); -+ } else if (argv[0] == 9) { -+ dfs->pri_sum_g5_under_g1_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_sum_g5_under_g1_th = %d\n", -+ dfs->pri_sum_g5_under_g1_th); -+ } else if (argv[0] == 10) { -+ dfs->pri_pw_diff_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_pw_diff_th = %d\n", -+ dfs->pri_pw_diff_th); -+ } else if (argv[0] == 11) { -+ dfs->pri_pw_diff_fcc_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_pw_diff_fcc_th = %d\n", -+ dfs->pri_pw_diff_fcc_th); -+ } else if (argv[0] == 12) { -+ dfs->pri_pw_diff_fcc_idle_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_pw_diff_fcc_idle_th = %d\n", -+ dfs->pri_pw_diff_fcc_idle_th); -+ } else if (argv[0] == 13) { -+ dfs->pri_pw_diff_w53_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_pw_diff_w53_th = %d\n", -+ dfs->pri_pw_diff_w53_th); -+ } else if (argv[0] == 14) { -+ dfs->pri_type1_low_fcc_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_type1_low_fcc_th = %d\n", -+ dfs->pri_type1_low_fcc_th); -+ } else if (argv[0] == 15) { -+ dfs->pri_type1_upp_fcc_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_type1_upp_fcc_th = %d\n", -+ dfs->pri_type1_upp_fcc_th); -+ } else if (argv[0] == 16) { -+ dfs->pri_type1_cen_fcc_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_type1_cen_fcc_th = %d\n", -+ dfs->pri_type1_cen_fcc_th); -+ } else if (argv[0] == 17) { -+ dfs->pw_g0_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pw_g0_th = %d\n", -+ dfs->pw_g0_th); -+ } else if (argv[0] == 18) { -+ dfs->pw_long_lower_20m_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pw_long_lower_20m_th = %d\n", -+ dfs->pw_long_lower_20m_th); -+ } else if (argv[0] == 19) { -+ dfs->pw_long_lower_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pw_long_lower_th = %d\n", -+ dfs->pw_long_lower_th); -+ } else if (argv[0] == 20) { -+ dfs->pri_long_upper_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_long_upper_th = %d\n", -+ dfs->pri_long_upper_th); -+ } else if (argv[0] == 21) { -+ dfs->pw_long_sum_upper_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pw_long_sum_upper_th = %d\n", -+ dfs->pw_long_sum_upper_th); -+ } else if (argv[0] == 22) { -+ dfs->pw_std_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pw_std_th = %d\n", -+ dfs->pw_std_th); -+ } else if (argv[0] == 23) { -+ dfs->pw_std_idle_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pw_std_idle_th = %d\n", -+ dfs->pw_std_idle_th); -+ } else if (argv[0] == 24) { -+ dfs->pri_std_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_std_th = %d\n", -+ dfs->pri_std_th); -+ } else if (argv[0] == 25) { -+ dfs->pri_std_idle_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pri_std_idle_th = %d\n", -+ dfs->pri_std_idle_th); -+ } else if (argv[0] == 26) { -+ dfs->type4_pw_max_cnt = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "type4_pw_max_cnt = %d\n", -+ dfs->type4_pw_max_cnt); -+ } else if (argv[0] == 27) { -+ dfs->type4_safe_pri_sum_th = (u8)argv[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "type4_safe_pri_sum_th = %d\n", -+ dfs->type4_safe_pri_sum_th); -+ } -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_dfs_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _DFS_STATISTICS *dfs = &dm->dfs; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 argv[10] = {0}; -+ u8 i, input_idx = 0; -+ -+ for (i = 0; i < 7; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &argv[i]); -+ input_idx++; -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ dfs->dbg_mode = (boolean)argv[0]; -+ dfs->sw_trigger_mode = (boolean)argv[1]; -+ dfs->force_TP_mode = (boolean)argv[2]; -+ dfs->det_print = (boolean)argv[3]; -+ dfs->det_print2 = (boolean)argv[4]; -+ dfs->print_hist_rpt = (boolean)argv[5]; -+ dfs->hist_cond_on = (boolean)argv[6]; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "dbg_mode: %d, sw_trigger_mode: %d, force_TP_mode: %d, det_print: %d,det_print2: %d, print_hist_rpt: %d, hist_cond_on: %d\n", -+ dfs->dbg_mode, dfs->sw_trigger_mode, dfs->force_TP_mode, -+ dfs->det_print, dfs->det_print2, dfs->print_hist_rpt, -+ dfs->hist_cond_on); -+} -+ -+u8 phydm_dfs_polling_time(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _DFS_STATISTICS *dfs = &dm->dfs; -+ -+ if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) -+ dfs->dfs_polling_time = 40; -+ else -+ dfs->dfs_polling_time = 100; -+ -+ return dfs->dfs_polling_time; -+} -+ -+#endif /* @defined(CONFIG_PHYDM_DFS_MASTER) */ -+ -+boolean -+phydm_is_dfs_band(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (((*dm->channel >= 52) && (*dm->channel <= 64)) || -+ ((*dm->channel >= 100) && (*dm->channel <= 144))) -+ return true; -+ else -+ return false; -+} -+ -+boolean -+phydm_dfs_master_enabled(void *dm_void) -+{ -+#ifdef CONFIG_PHYDM_DFS_MASTER -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean ret_val = false; -+ -+ if (dm->dfs_master_enabled) /*pointer protection*/ -+ ret_val = *dm->dfs_master_enabled ? true : false; -+ -+ return ret_val; -+#else -+ return false; -+#endif -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+void phydm_dfs_ap_reset_radar_detect_counter_and_flag(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /* @Clear Radar Counter and Radar flag */ -+ odm_set_bb_reg(dm, R_0xa40, BIT(15), 0); -+ odm_set_bb_reg(dm, R_0xa40, BIT(15), 1); -+ -+ /* RT_TRACE(COMP_DFS, DBG_LOUD, ("[DFS], After reset radar counter, 0xcf8 = 0x%x, 0xcf4 = 0x%x\n", */ -+ /* PHY_QueryBBReg(Adapter, 0xcf8, bMaskDWord), */ -+ /* PHY_QueryBBReg(Adapter, 0xcf4, bMaskDWord))); */ -+} -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_dfs.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_dfs.h -new file mode 100644 -index 000000000000..fabc640e73b3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_dfs.h -@@ -0,0 +1,191 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_DFS_H__ -+#define __PHYDM_DFS_H__ -+ -+#define DFS_VERSION "1.1" -+ -+/*@ -+ * ============================================================ -+ * Definition -+ * ============================================================ -+ */ -+ -+/*@ -+ * ============================================================ -+ * 1 structure -+ * ============================================================ -+ */ -+ -+struct _DFS_STATISTICS { -+ u8 mask_idx; -+ u8 igi_cur; -+ u8 igi_pre; -+ u8 st_l2h_cur; -+ u16 fa_count_pre; -+ u16 fa_inc_hist[5]; -+ u16 short_pulse_cnt_pre; -+ u16 long_pulse_cnt_pre; -+ u8 pwdb_th; -+ u8 pwdb_th_cur; -+ u8 pwdb_scalar_factor; -+ u8 peak_th; -+ u8 short_pulse_cnt_th; -+ u8 long_pulse_cnt_th; -+ u8 peak_window; -+ u8 three_peak_opt; -+ u8 three_peak_th2; -+ u8 fa_mask_th; -+ u8 st_l2h_max; -+ u8 st_l2h_min; -+ u8 dfs_polling_time; -+ u8 mask_hist_checked : 3; -+ boolean pulse_flag_hist[5]; -+ boolean pulse_type_hist[5]; -+ boolean radar_det_mask_hist[5]; -+ boolean idle_mode; -+ boolean force_TP_mode; -+ boolean dbg_mode; -+ boolean sw_trigger_mode; -+ boolean det_print; -+ boolean det_print2; -+ boolean radar_type; -+ boolean print_hist_rpt; -+ boolean hist_cond_on; -+ /*@dfs histogram*/ -+ boolean pri_cond1; -+ boolean pri_cond2; -+ boolean pri_cond3; -+ boolean pri_cond4; -+ boolean pri_cond5; -+ boolean pw_cond1; -+ boolean pw_cond2; -+ boolean pw_cond3; -+ boolean pri_type3_4_cond1; /*@for ETSI*/ -+ boolean pri_type3_4_cond2; /*@for ETSI*/ -+ boolean pw_long_cond1; /*@for long radar*/ -+ boolean pw_long_cond2; /*@for long radar*/ -+ boolean pri_long_cond1; /*@for long radar*/ -+ boolean pw_flag; -+ boolean pri_flag; -+ boolean pri_type3_4_flag; /*@for ETSI*/ -+ boolean long_radar_flag; -+ u8 pri_hold_sum[6]; -+ u8 pw_hold_sum[6]; -+ u8 pri_long_hold_sum[6]; -+ u8 pw_long_hold_sum[6]; -+ u8 hist_idx; -+ u8 hist_long_idx; -+ u8 pw_hold[4][6]; -+ u8 pri_hold[4][6]; -+ u8 pw_std; /*@The std(var) of reasonable num of pw group*/ -+ u8 pri_std;/*@The std(var) of reasonable num of pri group*/ -+ /*@dfs histogram threshold*/ -+ u8 pri_hist_th : 3; -+ u8 pri_sum_g1_th : 4; -+ u8 pri_sum_g5_th : 4; -+ u8 pri_sum_g1_fcc_th : 3; -+ u8 pri_sum_g3_fcc_th : 3; -+ u8 pri_sum_safe_fcc_th : 7; -+ u8 pri_sum_type4_th : 5; -+ u8 pri_sum_type6_th : 5; -+ u8 pri_sum_safe_th : 6; -+ u8 pri_sum_g5_under_g1_th : 3; -+ u8 pri_pw_diff_th : 3; -+ u8 pri_pw_diff_fcc_th : 4; -+ u8 pri_pw_diff_fcc_idle_th : 2; -+ u8 pri_pw_diff_w53_th : 4; -+ u8 pri_type1_low_fcc_th : 7; -+ u8 pri_type1_upp_fcc_th : 7; -+ u8 pri_type1_cen_fcc_th : 7; -+ u8 pw_g0_th : 4; -+ u8 pw_long_lower_20m_th : 4; -+ u8 pw_long_lower_th : 3; -+ u8 pri_long_upper_th : 6; -+ u8 pw_long_sum_upper_th : 7; -+ u8 pw_std_th : 4; -+ u8 pw_std_idle_th : 4; -+ u8 pri_std_th : 4; -+ u8 pri_std_idle_th : 4; -+ u8 type4_pw_max_cnt : 4; -+ u8 type4_safe_pri_sum_th : 3; -+}; -+ -+/*@ -+ * ============================================================ -+ * enumeration -+ * ============================================================ -+ */ -+ -+enum phydm_dfs_region_domain { -+ PHYDM_DFS_DOMAIN_UNKNOWN = 0, -+ PHYDM_DFS_DOMAIN_FCC = 1, -+ PHYDM_DFS_DOMAIN_MKK = 2, -+ PHYDM_DFS_DOMAIN_ETSI = 3, -+}; -+ -+/*@ -+ * ============================================================ -+ * function prototype -+ * ============================================================ -+ */ -+#if defined(CONFIG_PHYDM_DFS_MASTER) -+void phydm_radar_detect_reset(void *dm_void); -+void phydm_radar_detect_disable(void *dm_void); -+void phydm_radar_detect_enable(void *dm_void); -+boolean phydm_radar_detect(void *dm_void); -+void phydm_dfs_histogram_radar_distinguish(void *dm_void); -+boolean phydm_dfs_hist_log(void *dm_void, u8 index); -+void phydm_dfs_parameter_init(void *dm_void); -+void phydm_dfs_hist_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+void phydm_dfs_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+u8 phydm_dfs_polling_time(void *dm_void); -+#endif /* @defined(CONFIG_PHYDM_DFS_MASTER) */ -+ -+boolean -+phydm_dfs_is_meteorology_channel(void *dm_void); -+ -+void -+phydm_dfs_segment_distinguish(void *dm_void, enum rf_syn syn_path); -+ -+void -+phydm_dfs_segment_flag_reset(void *dm_void); -+ -+boolean -+phydm_is_dfs_band(void *dm_void); -+ -+boolean -+phydm_dfs_master_enabled(void *dm_void); -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+void phydm_dfs_ap_reset_radar_detect_counter_and_flag(void *dm_void); -+#endif -+#endif -+ -+#endif /*@#ifndef __PHYDM_DFS_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_dig.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_dig.c -new file mode 100644 -index 000000000000..cb654c6e7ff2 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_dig.c -@@ -0,0 +1,3516 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ * ************************************************************ -+ */ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef CFG_DIG_DAMPING_CHK -+void phydm_dig_recorder_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__); -+ -+ odm_memory_set(dm, &dig_rc->igi_bitmap, 0, -+ sizeof(struct phydm_dig_recorder_strcut)); -+} -+ -+void phydm_dig_recorder(void *dm_void, u8 igi_curr, -+ u32 fa_cnt) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; -+ u8 igi_pre = dig_rc->igi_history[0]; -+ u8 igi_up = 0; -+ -+ if (!dm->is_linked) -+ return; -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__); -+ -+ if (dm->first_connect) { -+ phydm_dig_recorder_reset(dm); -+ dig_rc->igi_history[0] = igi_curr; -+ dig_rc->fa_history[0] = fa_cnt; -+ return; -+ } -+ -+ if (igi_curr % 2) -+ igi_curr--; -+ -+ igi_pre = dig_rc->igi_history[0]; -+ igi_up = (igi_curr > igi_pre) ? 1 : 0; -+ dig_rc->igi_bitmap = ((dig_rc->igi_bitmap << 1) & 0xfe) | igi_up; -+ -+ dig_rc->igi_history[3] = dig_rc->igi_history[2]; -+ dig_rc->igi_history[2] = dig_rc->igi_history[1]; -+ dig_rc->igi_history[1] = dig_rc->igi_history[0]; -+ dig_rc->igi_history[0] = igi_curr; -+ -+ dig_rc->fa_history[3] = dig_rc->fa_history[2]; -+ dig_rc->fa_history[2] = dig_rc->fa_history[1]; -+ dig_rc->fa_history[1] = dig_rc->fa_history[0]; -+ dig_rc->fa_history[0] = fa_cnt; -+ -+ PHYDM_DBG(dm, DBG_DIG, "igi_history[3:0] = {0x%x, 0x%x, 0x%x, 0x%x}\n", -+ dig_rc->igi_history[3], dig_rc->igi_history[2], -+ dig_rc->igi_history[1], dig_rc->igi_history[0]); -+ PHYDM_DBG(dm, DBG_DIG, "fa_history[3:0] = {%d, %d, %d, %d}\n", -+ dig_rc->fa_history[3], dig_rc->fa_history[2], -+ dig_rc->fa_history[1], dig_rc->fa_history[0]); -+ PHYDM_DBG(dm, DBG_DIG, "igi_bitmap = {%d, %d, %d, %d} = 0x%x\n", -+ (u8)((dig_rc->igi_bitmap & BIT(3)) >> 3), -+ (u8)((dig_rc->igi_bitmap & BIT(2)) >> 2), -+ (u8)((dig_rc->igi_bitmap & BIT(1)) >> 1), -+ (u8)(dig_rc->igi_bitmap & BIT(0)), -+ dig_rc->igi_bitmap); -+} -+ -+void phydm_dig_damping_chk(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; -+ u8 igi_bitmap_4bit = dig_rc->igi_bitmap & 0xf; -+ u8 diff1 = 0, diff2 = 0; -+ u32 fa_low_th = dig_t->fa_th[0]; -+ u32 fa_high_th = dig_t->fa_th[1]; -+ u32 fa_high_th2 = dig_t->fa_th[2]; -+ u8 fa_pattern_match = 0; -+ u32 time_tmp = 0; -+ -+ if (!dm->is_linked) -+ return; -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__); -+ -+ /*@== Release Damping ================================================*/ -+ if (dig_rc->damping_limit_en) { -+ PHYDM_DBG(dm, DBG_DIG, -+ "[Damping Limit!] limit_time=%d, phydm_sys_up_time=%d\n", -+ dig_rc->limit_time, dm->phydm_sys_up_time); -+ -+ time_tmp = dig_rc->limit_time + DIG_LIMIT_PERIOD; -+ -+ if (DIFF_2(dm->rssi_min, dig_rc->limit_rssi) > 3 || -+ time_tmp < dm->phydm_sys_up_time) { -+ dig_rc->damping_limit_en = 0; -+ PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, limit_rssi=%d\n", -+ dm->rssi_min, dig_rc->limit_rssi); -+ } -+ return; -+ } -+ -+ /*@== Damping Pattern Check===========================================*/ -+ PHYDM_DBG(dm, DBG_DIG, "fa_th{H, L}= {%d,%d}\n", fa_high_th, fa_low_th); -+ -+ switch (igi_bitmap_4bit) { -+ case 0x5: -+ /*@ 4b'0101 -+ * IGI:[3]down(0x24)->[2]up(0x26)->[1]down(0x24)->[0]up(0x26)->[new](Lock @ 0x26) -+ * FA: [3] >high1 ->[2] [1] >high1 ->[0] [new] [2]up(0x28)->[1]down(0x24)->[0]up(0x28)->[new](Lock @ 0x28) -+ * FA: [3] >high2 ->[2] [1] >high2 ->[0] [new] igi_history[0] > dig_rc->igi_history[1]) -+ diff1 = dig_rc->igi_history[0] - dig_rc->igi_history[1]; -+ -+ if (dig_rc->igi_history[2] > dig_rc->igi_history[3]) -+ diff2 = dig_rc->igi_history[2] - dig_rc->igi_history[3]; -+ -+ if (dig_rc->fa_history[0] < fa_low_th && -+ dig_rc->fa_history[1] > fa_high_th && -+ dig_rc->fa_history[2] < fa_low_th && -+ dig_rc->fa_history[3] > fa_high_th) { -+ /*@Check each fa element*/ -+ fa_pattern_match = 1; -+ } -+ break; -+ case 0x9: -+ /*@ 4b'1001 -+ * IGI:[3]up(0x28)->[2]down(0x26)->[1]down(0x24)->[0]up(0x28)->[new](Lock @ 0x28) -+ * FA: [3] [2] [1] >high2 ->[0] [new] igi_history[0] > dig_rc->igi_history[1]) -+ diff1 = dig_rc->igi_history[0] - dig_rc->igi_history[1]; -+ -+ if (dig_rc->igi_history[2] < dig_rc->igi_history[3]) -+ diff2 = dig_rc->igi_history[3] - dig_rc->igi_history[2]; -+ -+ if (dig_rc->fa_history[0] < fa_low_th && -+ dig_rc->fa_history[1] > fa_high_th2 && -+ dig_rc->fa_history[2] < fa_low_th && -+ dig_rc->fa_history[3] < fa_low_th) { -+ /*@Check each fa element*/ -+ fa_pattern_match = 1; -+ } -+ break; -+ default: -+ break; -+ } -+ -+ if (diff1 >= 2 && diff2 >= 2 && fa_pattern_match) { -+ dig_rc->damping_limit_en = 1; -+ dig_rc->damping_limit_val = dig_rc->igi_history[0]; -+ dig_rc->limit_time = dm->phydm_sys_up_time; -+ dig_rc->limit_rssi = dm->rssi_min; -+ -+ PHYDM_DBG(dm, DBG_DIG, -+ "[Start damping_limit!] IGI_dyn_min=0x%x, limit_time=%d, limit_rssi=%d\n", -+ dig_rc->damping_limit_val, -+ dig_rc->limit_time, dig_rc->limit_rssi); -+ } -+ -+ PHYDM_DBG(dm, DBG_DIG, "damping_limit=%d\n", dig_rc->damping_limit_en); -+} -+#endif -+ -+void phydm_fa_threshold_check(void *dm_void, boolean is_dfs_band) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ if (dig_t->is_dbg_fa_th) { -+ PHYDM_DBG(dm, DBG_DIG, "Manual Fix FA_th\n"); -+ } else if (dm->is_linked) { -+ if (dm->rssi_min < 20) { /*@[PHYDM-252]*/ -+ dig_t->fa_th[0] = 500; -+ dig_t->fa_th[1] = 750; -+ dig_t->fa_th[2] = 1000; -+ } else if (((dm->rx_tp >> 2) > dm->tx_tp) && /*Test RX TP*/ -+ (dm->rx_tp < 10) && (dm->rx_tp > 1)) { /*TP=1~10Mb*/ -+ dig_t->fa_th[0] = 125; -+ dig_t->fa_th[1] = 250; -+ dig_t->fa_th[2] = 500; -+ } else { -+ dig_t->fa_th[0] = 250; -+ dig_t->fa_th[1] = 500; -+ dig_t->fa_th[2] = 750; -+ } -+ } else { -+ if (is_dfs_band) { /* @For DFS band and no link */ -+ -+ dig_t->fa_th[0] = 250; -+ dig_t->fa_th[1] = 1000; -+ dig_t->fa_th[2] = 2000; -+ } else { -+ dig_t->fa_th[0] = 2000; -+ dig_t->fa_th[1] = 4000; -+ dig_t->fa_th[2] = 5000; -+ } -+ } -+ -+ PHYDM_DBG(dm, DBG_DIG, "FA_th={%d,%d,%d}\n", dig_t->fa_th[0], -+ dig_t->fa_th[1], dig_t->fa_th[2]); -+} -+ -+void phydm_set_big_jump_step(void *dm_void, u8 curr_igi) -+{ -+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ u8 step1[8] = {24, 30, 40, 50, 60, 70, 80, 90}; -+ u8 big_jump_lmt = dig_t->big_jump_lmt[dig_t->agc_table_idx]; -+ u8 i; -+ -+ if (dig_t->enable_adjust_big_jump == 0) -+ return; -+ -+ for (i = 0; i <= dig_t->big_jump_step1; i++) { -+ if ((curr_igi + step1[i]) > big_jump_lmt) { -+ if (i != 0) -+ i = i - 1; -+ break; -+ } else if (i == dig_t->big_jump_step1) { -+ break; -+ } -+ } -+ if (dm->support_ic_type & ODM_RTL8822B) -+ odm_set_bb_reg(dm, R_0x8c8, 0xe, i); -+ else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) -+ odm_set_bb_reg(dm, ODM_REG_BB_AGC_SET_2_11N, 0xe, i); -+ -+ PHYDM_DBG(dm, DBG_DIG, "Bigjump = %d (ori = 0x%x), LMT=0x%x\n", i, -+ dig_t->big_jump_step1, big_jump_lmt); -+#endif -+} -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+void phydm_write_dig_reg_jgr3(void *dm_void, u8 igi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); -+ -+ /* Set IGI value */ -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) -+ return; -+ -+ odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_11AC, igi); -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) -+ odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_B_11AC3, igi); -+ #endif -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { -+ odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_C_11AC3, igi); -+ odm_set_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_D_11AC3, igi); -+ } -+ #endif -+} -+ -+u8 phydm_get_igi_reg_val_jgr3(void *dm_void, enum bb_path path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 val = 0; -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); -+ -+ /* Set IGI value */ -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) -+ return (u8)val; -+ -+ if (path == BB_PATH_A) -+ val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_11AC); -+#if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ else if (path == BB_PATH_B) -+ val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_B_11AC3); -+#endif -+ -+#if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ else if (path == BB_PATH_C) -+ val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_C_11AC3); -+#endif -+ -+#if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ else if (path == BB_PATH_D) -+ val = odm_get_bb_reg(dm, R_0x1d70, ODM_BIT_IGI_D_11AC3); -+#endif -+ return (u8)val; -+} -+ -+void phydm_fa_cnt_statistics_jgr3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ u32 ret_value = 0; -+ u32 cck_enable = 0; -+ -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) -+ return; -+ -+ ret_value = odm_get_bb_reg(dm, R_0x2d20, MASKDWORD); -+ fa_t->cnt_fast_fsync = ret_value & 0xffff; -+ fa_t->cnt_sb_search_fail = (ret_value & 0xffff0000) >> 16; -+ -+ ret_value = odm_get_bb_reg(dm, R_0x2d04, MASKDWORD); -+ fa_t->cnt_parity_fail = (ret_value & 0xffff0000) >> 16; -+ -+ ret_value = odm_get_bb_reg(dm, R_0x2d08, MASKDWORD); -+ fa_t->cnt_rate_illegal = ret_value & 0xffff; -+ fa_t->cnt_crc8_fail = (ret_value & 0xffff0000) >> 16; -+ -+ ret_value = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD); -+ fa_t->cnt_mcs_fail = ret_value & 0xffff; -+ -+ /* read CCK CRC32 counter */ -+ if (dm->support_ic_type & ODM_RTL8723F) -+ ret_value = odm_get_bb_reg(dm, R_0x2aac, MASKDWORD); -+ else -+ ret_value = odm_get_bb_reg(dm, R_0x2c04, MASKDWORD); -+ fa_t->cnt_cck_crc32_ok = ret_value & 0xffff; -+ fa_t->cnt_cck_crc32_error = (ret_value & 0xffff0000) >> 16; -+ -+ /* read OFDM CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, R_0x2c14, MASKDWORD); -+ fa_t->cnt_ofdm_crc32_ok = ret_value & 0xffff; -+ fa_t->cnt_ofdm_crc32_error = (ret_value & 0xffff0000) >> 16; -+ -+ /* read OFDM2 CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, R_0x2c1c, MASKDWORD); -+ fa_t->cnt_ofdm2_crc32_ok = ret_value & 0xffff; -+ fa_t->cnt_ofdm2_crc32_error = (ret_value & 0xffff0000) >> 16; -+ -+ /* read HT CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, R_0x2c10, MASKDWORD); -+ fa_t->cnt_ht_crc32_ok = ret_value & 0xffff; -+ fa_t->cnt_ht_crc32_error = (ret_value & 0xffff0000) >> 16; -+ -+ /* read HT2 CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, R_0x2c18, MASKDWORD); -+ fa_t->cnt_ht2_crc32_ok = ret_value & 0xffff; -+ fa_t->cnt_ht2_crc32_error = (ret_value & 0xffff0000) >> 16; -+ -+ /*for VHT part */ -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | -+ ODM_RTL8814B)) { -+ /*read VHT CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, R_0x2c0c, MASKDWORD); -+ fa_t->cnt_vht_crc32_ok = ret_value & 0xffff; -+ fa_t->cnt_vht_crc32_error = (ret_value & 0xffff0000) >> 16; -+ -+ /*read VHT2 CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, R_0x2c54, MASKDWORD); -+ fa_t->cnt_vht2_crc32_ok = ret_value & 0xffff; -+ fa_t->cnt_vht2_crc32_error = (ret_value & 0xffff0000) >> 16; -+ -+ ret_value = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD); -+ fa_t->cnt_mcs_fail_vht = (ret_value & 0xffff0000) >> 16; -+ -+ ret_value = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD); -+ fa_t->cnt_crc8_fail_vhta = ret_value & 0xffff; -+ fa_t->cnt_crc8_fail_vhtb = (ret_value & 0xffff0000) >> 16; -+ } else { -+ fa_t->cnt_vht_crc32_error = 0; -+ fa_t->cnt_vht_crc32_ok = 0; -+ fa_t->cnt_vht2_crc32_error = 0; -+ fa_t->cnt_vht2_crc32_ok = 0; -+ fa_t->cnt_mcs_fail_vht = 0; -+ fa_t->cnt_crc8_fail_vhta = 0; -+ fa_t->cnt_crc8_fail_vhtb = 0; -+ } -+ -+ /* @calculate OFDM FA counter instead of reading brk_cnt*/ -+ fa_t->cnt_ofdm_fail = fa_t->cnt_parity_fail + fa_t->cnt_rate_illegal + -+ fa_t->cnt_crc8_fail + fa_t->cnt_mcs_fail + -+ fa_t->cnt_fast_fsync + fa_t->cnt_sb_search_fail + -+ fa_t->cnt_mcs_fail_vht + fa_t->cnt_crc8_fail_vhta; -+ -+ /* Read CCK FA counter */ -+ if (dm->support_ic_type & ODM_RTL8723F){ -+ ret_value= odm_get_bb_reg(dm, R_0x2aa8, MASKLWORD); -+ fa_t->cnt_cck_fail=(ret_value&0xffff)+((ret_value&0xffff0000)>>16); -+ } -+ else -+ fa_t->cnt_cck_fail = odm_get_bb_reg(dm, R_0x1a5c, MASKLWORD); -+ -+ /* read CCK/OFDM CCA counter */ -+ ret_value = odm_get_bb_reg(dm, R_0x2c08, MASKDWORD); -+ fa_t->cnt_ofdm_cca = ((ret_value & 0xffff0000) >> 16); -+ if (dm->support_ic_type & ODM_RTL8723F) -+ ret_value = odm_get_bb_reg(dm, R_0x2aa0, MASKDWORD); -+ fa_t->cnt_cck_cca = ret_value & 0xffff; -+ -+ /* @CCK RxIQ weighting = 1 => 0x1a14[9:8]=0x0 */ -+ if (dm->support_ic_type & ODM_RTL8723F) -+ cck_enable = odm_get_bb_reg(dm, R_0x2a24, BIT(13)); -+ else -+ cck_enable = odm_get_bb_reg(dm, R_0x1a14, 0x300); -+ -+ if (cck_enable == 0x0) { /* @if(*dm->band_type == ODM_BAND_2_4G) */ -+ fa_t->cnt_all = fa_t->cnt_ofdm_fail + fa_t->cnt_cck_fail; -+ fa_t->cnt_cca_all = fa_t->cnt_cck_cca + fa_t->cnt_ofdm_cca; -+ } else { -+ fa_t->cnt_all = fa_t->cnt_ofdm_fail; -+ fa_t->cnt_cca_all = fa_t->cnt_ofdm_cca; -+ } -+} -+ -+#endif -+ -+void phydm_write_dig_reg_c50(void *dm_void, u8 igi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); -+ -+ odm_set_bb_reg(dm, ODM_REG(IGI_A, dm), ODM_BIT(IGI, dm), igi); -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS) -+ odm_set_bb_reg(dm, ODM_REG(IGI_B, dm), ODM_BIT(IGI, dm), igi); -+ #endif -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) { -+ odm_set_bb_reg(dm, ODM_REG(IGI_C, dm), ODM_BIT(IGI, dm), igi); -+ odm_set_bb_reg(dm, ODM_REG(IGI_D, dm), ODM_BIT(IGI, dm), igi); -+ } -+ #endif -+} -+ -+void phydm_write_dig_reg(void *dm_void, u8 igi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ u8 rf_gain = 0; -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_write_dig_reg_jgr3(dm, igi); -+ else -+ #endif -+ phydm_write_dig_reg_c50(dm, igi); -+ -+ #if (RTL8721D_SUPPORT) -+ if (dm->invalid_mode) { -+ if (igi <= 0x10) -+ rf_gain = 0xfa; -+ else if (igi <= 0x40) -+ rf_gain = 0xe3 + 0x20 - (igi >> 1); -+ else if (igi <= 0x50) -+ rf_gain = 0xcb - (igi >> 1); -+ else if (igi <= 0x5e) -+ rf_gain = 0x92 - (igi >> 1); -+ else if (igi <= 0x64) -+ rf_gain = 0x74 - (igi >> 1); -+ else -+ rf_gain = (0x3d > (igi >> 1)) ? (0x3d - (igi >> 1)) : 0; -+ odm_set_bb_reg(dm, R_0x850, 0x1fe0, rf_gain); -+ } -+ #endif -+ -+ if (igi == dig_t->cur_ig_value) -+ dig_t->igi_trend = DIG_STABLE; -+ else if (igi > dig_t->cur_ig_value) -+ dig_t->igi_trend = DIG_INCREASING; -+ else -+ dig_t->igi_trend = DIG_DECREASING; -+ -+ PHYDM_DBG(dm, DBG_DIG, "Update IGI:0x%x -> 0x%x\n", -+ dig_t->cur_ig_value, igi); -+ -+ dig_t->cur_ig_value = igi; -+} -+ -+void odm_write_dig(void *dm_void, u8 new_igi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); -+ -+ /* @1 Check IGI by upper bound */ -+ if (adaptivity->igi_lmt_en && -+ new_igi > adaptivity->adapt_igi_up && dm->is_linked) { -+ new_igi = adaptivity->adapt_igi_up; -+ -+ PHYDM_DBG(dm, DBG_DIG, "Force Adaptivity Up-bound=((0x%x))\n", -+ new_igi); -+ } -+ -+ #if (RTL8192F_SUPPORT) -+ if ((dm->support_ic_type & ODM_RTL8192F) && -+ dm->cut_version == ODM_CUT_A && -+ new_igi > 0x38) { -+ new_igi = 0x38; -+ PHYDM_DBG(dm, DBG_DIG, -+ "Force 92F Adaptivity Up-bound=((0x%x))\n", new_igi); -+ } -+ #endif -+ -+ if (dig_t->cur_ig_value != new_igi) { -+ #if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) -+ /* @Modify big jump step for 8822B and 8197F */ -+ if (dm->support_ic_type & -+ (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F)) -+ phydm_set_big_jump_step(dm, new_igi); -+ #endif -+ -+ #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) -+ /* Set IGI value of CCK for new CCK AGC */ -+ if (dm->cck_new_agc && -+ (dm->support_ic_type & PHYSTS_2ND_TYPE_IC)) -+ odm_set_bb_reg(dm, R_0xa0c, 0x3f00, (new_igi >> 1)); -+ #endif -+ -+ /*@Add by YuChen for USB IO too slow issue*/ -+ if (!(dm->support_ic_type & ODM_IC_PWDB_EDCCA)) { -+ if (*dm->edcca_mode == PHYDM_EDCCA_ADAPT_MODE && -+ new_igi < dig_t->cur_ig_value) { -+ dig_t->cur_ig_value = new_igi; -+ phydm_adaptivity(dm); -+ } -+ } else { -+ if (*dm->edcca_mode == PHYDM_EDCCA_ADAPT_MODE && -+ new_igi > dig_t->cur_ig_value) { -+ dig_t->cur_ig_value = new_igi; -+ phydm_adaptivity(dm); -+ } -+ } -+ phydm_write_dig_reg(dm, new_igi); -+ } else { -+ dig_t->igi_trend = DIG_STABLE; -+ } -+ -+ PHYDM_DBG(dm, DBG_DIG, "[%s]New_igi=((0x%x))\n\n", -+ ((dig_t->igi_trend == DIG_STABLE) ? "=" : -+ ((dig_t->igi_trend == DIG_INCREASING) ? "+" : "-")), -+ new_igi); -+} -+ -+u8 phydm_get_igi_reg_val(void *dm_void, enum bb_path path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 val = 0; -+ u32 bit_map = ODM_BIT(IGI, dm); -+ -+ switch (path) { -+ case BB_PATH_A: -+ val = odm_get_bb_reg(dm, ODM_REG(IGI_A, dm), bit_map); -+ break; -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ case BB_PATH_B: -+ val = odm_get_bb_reg(dm, ODM_REG(IGI_B, dm), bit_map); -+ break; -+ #endif -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ case BB_PATH_C: -+ val = odm_get_bb_reg(dm, ODM_REG(IGI_C, dm), bit_map); -+ break; -+ #endif -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ case BB_PATH_D: -+ val = odm_get_bb_reg(dm, ODM_REG(IGI_D, dm), bit_map); -+ break; -+ #endif -+ -+ default: -+ break; -+ } -+ -+ return (u8)val; -+} -+ -+u8 phydm_get_igi(void *dm_void, enum bb_path path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 val = 0; -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ val = phydm_get_igi_reg_val_jgr3(dm, path); -+ else -+ #endif -+ val = phydm_get_igi_reg_val(dm, path); -+ -+ return val; -+} -+ -+void phydm_set_dig_val(void *dm_void, u32 *val_buf, u8 val_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (val_len != 1) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[Error][DIG]Need val_len=1\n"); -+ return; -+ } -+ -+ odm_write_dig(dm, (u8)(*val_buf)); -+} -+ -+void odm_pause_dig(void *dm_void, enum phydm_pause_type type, -+ enum phydm_pause_level lv, u8 igi_input) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rpt = false; -+ u32 igi = (u32)igi_input; -+ -+ PHYDM_DBG(dm, DBG_DIG, "[%s]type=%d, LV=%d, igi=0x%x\n", __func__, type, -+ lv, igi); -+ -+ switch (type) { -+ case PHYDM_PAUSE: -+ case PHYDM_PAUSE_NO_SET: { -+ rpt = phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, lv, 1, &igi); -+ break; -+ } -+ -+ case PHYDM_RESUME: { -+ rpt = phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, lv, 1, &igi); -+ break; -+ } -+ default: -+ PHYDM_DBG(dm, DBG_DIG, "Wrong type\n"); -+ break; -+ } -+ -+ PHYDM_DBG(dm, DBG_DIG, "DIG pause_result=%d\n", rpt); -+} -+ -+boolean -+phydm_dig_abort(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+#endif -+ -+ /* support_ability */ -+ if ((!(dm->support_ability & ODM_BB_FA_CNT)) || -+ (!(dm->support_ability & ODM_BB_DIG))) { -+ PHYDM_DBG(dm, DBG_DIG, "[DIG] Not Support\n"); -+ return true; -+ } -+ -+ if (dm->pause_ability & ODM_BB_DIG) { -+ PHYDM_DBG(dm, DBG_DIG, "Return: Pause DIG in LV=%d\n", -+ dm->pause_lv_table.lv_dig); -+ return true; -+ } -+ -+ if (*dm->is_scan_in_process) { -+ PHYDM_DBG(dm, DBG_DIG, "Return: Scan in process\n"); -+ return true; -+ } -+ -+ if (dm->dm_dig_table.fw_dig_enable) { -+ PHYDM_DBG(dm, DBG_DIG, "Return: FW DIG enable\n"); -+ return true; -+ } -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if OS_WIN_FROM_WIN7(OS_VERSION) -+ if (IsAPModeExist(adapter) && ((PADAPTER)(adapter))->bInHctTest) { -+ PHYDM_DBG(dm, DBG_DIG, " Return: Is AP mode or In HCT Test\n"); -+ return true; -+ } -+#endif -+#endif -+ -+ return false; -+} -+ -+#ifdef PHYDM_HW_IGI -+#ifdef BB_RAM_SUPPORT -+void phydm_rd_hwigi_pre_setting(void *dm_void, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 igi_ofst = 0x0; -+ u32 t1, t2, t3 = 0x0; -+ -+ igi_ofst = (u8)odm_get_bb_reg(dm, R_0x1e80, MASKBYTE0); -+ t1 = odm_get_bb_reg(dm, R_0x1e80, MASKBYTE1) * 400; -+ t2 = odm_get_bb_reg(dm, R_0x1e80, MASKBYTE2) * 400; -+ t3 = odm_get_bb_reg(dm, R_0x1e80, MASKBYTE3) * 400; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "igi_offset:0x%x, t1:%d(ns), t2:%d(ns), t3:%d(ns)\n", -+ igi_ofst, t1, t2, t3); -+} -+ -+void phydm_set_hwigi_pre_setting(void *dm_void, u8 igi_ofst, u8 t1, u8 t2, -+ u8 t3) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 reg_0x1e80 = 0; -+ -+ reg_0x1e80 = igi_ofst + (t1 << 8) + (t2 << 16) + (t3 << 24); -+ odm_set_bb_reg(dm, R_0x1e80, MASKDWORD, reg_0x1e80); -+} -+ -+void phydm_rd_hwigi_table(void *dm_void, u8 macid, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ boolean hwigi_en = false; -+ u8 hwigi = 0x0; -+ u8 hwigi_rx_offset = 0x0; -+ u32 reg_0x1e84 = 0x0; -+ -+ reg_0x1e84 |= (macid & 0x3f) << 24; /*macid*/ -+ reg_0x1e84 |= BIT(31); /*read_en*/ -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, reg_0x1e84); -+ -+ hwigi_en = (boolean)odm_get_bb_reg(dm, R_0x2de8, BIT(15)); -+ hwigi = (u8)odm_get_bb_reg(dm, R_0x2de8, 0x7f00); -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, 0x0); /* disable rd/wt*/ -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "(macid:%d) hwigi_en:%d, hwigi:0x%x\n", macid, hwigi_en, -+ hwigi); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_wt_hwigi_table(void *dm_void, u8 macid, boolean hwigi_en, u8 hwigi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bb_ram_per_sta *dm_ram_per_sta = NULL; -+ u32 reg_0x1e84 = 0; -+ -+ if (macid > 63) -+ macid = 63; -+ -+ dm_ram_per_sta = &dm->p_bb_ram_ctrl.pram_sta_ctrl[macid]; -+ dm_ram_per_sta->hw_igi_en = hwigi_en; -+ dm_ram_per_sta->hw_igi = hwigi; -+ -+ reg_0x1e84 = (dm_ram_per_sta->tx_pwr_offset0_en << 15) + -+ ((dm_ram_per_sta->tx_pwr_offset0 & 0x7f) << 8) + -+ (dm_ram_per_sta->tx_pwr_offset1_en << 23) + -+ ((dm_ram_per_sta->tx_pwr_offset1 & 0x7f) << 16); -+ -+ reg_0x1e84 |= (hwigi_en << 7) + (hwigi & 0x7f); -+ reg_0x1e84 |= (macid & 0x3f) << 24;/*macid*/ -+ reg_0x1e84 |= BIT(30); /*write_en*/ -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, reg_0x1e84); -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, 0x80000000); /*read_en*/ -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, 0x0); /*disable rd/wt*/ -+} -+ -+void phydm_rst_hwigi(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bb_ram_per_sta *dm_ram_per_sta = NULL; -+ u32 reg_0x1e84 = 0; -+ u8 i = 0; -+ -+ PHYDM_DBG(dm, DBG_DIG, "reset hwigi!\n"); -+ -+ for (i = 0; i < 64; i++) { -+ dm_ram_per_sta = &dm->p_bb_ram_ctrl.pram_sta_ctrl[i]; -+ dm_ram_per_sta->hw_igi_en = false; -+ dm_ram_per_sta->hw_igi = 0x0; -+ -+ reg_0x1e84 = (dm_ram_per_sta->tx_pwr_offset0_en << 15) + -+ ((dm_ram_per_sta->tx_pwr_offset0 & 0x7f) << 8) + -+ (dm_ram_per_sta->tx_pwr_offset1_en << 23) + -+ ((dm_ram_per_sta->tx_pwr_offset1 & 0x7f) << 16); -+ -+ reg_0x1e84 |= (i & 0x3f) << 24; -+ reg_0x1e84 |= BIT(30); -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, reg_0x1e84); -+ } -+ -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, 0x80000000); -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, 0x0); -+} -+ -+void phydm_hwigi_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bb_ram_ctrl *bb_ctrl = &dm->p_bb_ram_ctrl; -+ u8 igi_ofst = 0x0; -+ u8 t1 = 0x0; -+ u8 t2 = 0x0; -+ u8 t3 = 0x0; -+ -+ t1 = 0x55; /*34 us*/ -+ t3 = 0x55; /*34 us*/ -+ -+ bb_ctrl->hwigi_watchdog_en = false; -+ phydm_set_hwigi_pre_setting(dm, igi_ofst, t1, t2, t3); -+} -+ -+void phydm_hwigi(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = NULL; -+ struct phydm_bb_ram_per_sta *dm_ram_per_sta = NULL; -+ struct rssi_info *rssi = NULL; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_bb_ram_ctrl *bb_ctrl = &dm->p_bb_ram_ctrl; -+ u8 sta_cnt = 0; -+ u8 i = 0; -+ u8 hwigi = 0x0; -+ u8 macid = 0; -+ u8 macid_cnt = 0; -+ u64 macid_cur = 0; -+ u64 macid_diff = 0; -+ u64 macid_mask = 0; -+ -+ if (!(bb_ctrl->hwigi_watchdog_en)) { -+ return; -+ } -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ sta = dm->phydm_sta_info[i]; -+ if (is_sta_active(sta)) { -+ sta_cnt++; -+ -+ if (sta->mac_id > 63) -+ macid = 63; -+ else -+ macid = sta->mac_id; -+ -+ dm_ram_per_sta = &bb_ctrl->pram_sta_ctrl[macid]; -+ rssi = &sta->rssi_stat; -+ macid_mask = (u64)BIT(sta->mac_id); -+ bb_ctrl->hwigi_macid_is_linked |= macid_mask; -+ macid_cur |= macid_mask; -+ PHYDM_DBG(dm, DBG_DIG, -+ "STA_id=%d, MACID=%d, RSSI=%d, hwigi_en=%d, hwigi=0x%x\n", -+ i, sta->mac_id, rssi->rssi, -+ dm_ram_per_sta->hw_igi_en, -+ dm_ram_per_sta->hw_igi); -+ -+ hwigi = MAX_2((u8)(rssi->rssi + 10), -+ dig_t->cur_ig_value); -+ -+ if (hwigi > DIG_MAX_PERFORMANCE_MODE) -+ hwigi = DIG_MAX_PERFORMANCE_MODE; -+ else if (hwigi < DIG_MIN_PERFORMANCE) -+ hwigi = DIG_MIN_PERFORMANCE; -+ -+ if (dm_ram_per_sta->hw_igi == hwigi) { -+ PHYDM_DBG(dm, DBG_DIG, -+ "hwigi not change!\n"); -+ } else { -+ -+ PHYDM_DBG(dm, DBG_DIG, -+ "hwigi update: ((0x%x)) -> ((0x%x))\n", -+ dm_ram_per_sta->hw_igi, hwigi); -+ -+ phydm_wt_hwigi_table(dm, sta->mac_id, true, hwigi); -+ } -+ -+ if (sta_cnt == dm->number_linked_client) -+ break; -+ } -+ } -+ macid_diff = bb_ctrl->hwigi_macid_is_linked ^ macid_cur; -+ if (macid_diff) -+ bb_ctrl->hwigi_macid_is_linked &= ~macid_diff; -+ while (macid_diff) { -+ if (macid_diff & 0x1) -+ phydm_wt_hwigi_table(dm, macid_cnt, false, 0x0); -+ macid_cnt++; -+ macid_diff >>= 1; -+ } -+} -+ -+void phydm_hwigi_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bb_ram_ctrl *bb_ctrl = &dm->p_bb_ram_ctrl; -+ char help[] = "-h"; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 var1[7] = {0}; -+ u8 i = 0; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Disable/Enable watchdog : {0/1}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set hwigi pre-setting: {2} {IGI offset} {T1(after data tx)} {T2(after Rx)} {T3(after rsp tx)}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set hwigi table: {3} {en} {value} {macid}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Read hwigi : {4} {macid(0~63), 255:all}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Reset all hwigi : {5}\n"); -+ } else { -+ for (i = 0; i < 7; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var1[i]); -+ } -+ switch (var1[0]) { -+ case 0: -+ case 1: -+ bb_ctrl->hwigi_watchdog_en = (var1[0]) ? true : false; -+ break; -+ case 2: -+ phydm_set_hwigi_pre_setting(dm, (u8)var1[1], -+ (u8)var1[2], (u8)var1[3], -+ (u8)var1[4]); -+ break; -+ case 3: -+ phydm_wt_hwigi_table(dm, (u8)var1[3], (boolean)var1[1], -+ (boolean)var1[2]); -+ break; -+ case 4: -+ phydm_rd_hwigi_pre_setting(dm, &used, output, &out_len); -+ if ((u8)var1[1] == 0xff) -+ for (i = 0; i < 64; i++) -+ phydm_rd_hwigi_table(dm, i, &used, -+ output, &out_len); -+ else -+ phydm_rd_hwigi_table(dm, (u8)var1[1], &used, -+ output, &out_len); -+ break; -+ case 5: -+ phydm_rst_hwigi(dm); -+ break; -+ } -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -+#endif -+ -+void phydm_dig_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ struct phydm_fa_struct *false_alm_cnt = &dm->false_alm_cnt; -+#endif -+ u32 ret_value = 0; -+ u8 i; -+ -+ dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE; -+ dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; -+ dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; -+ -+ dig_t->cur_ig_value = phydm_get_igi(dm, BB_PATH_A); -+ -+ dig_t->fa_th[0] = 250; -+ dig_t->fa_th[1] = 500; -+ dig_t->fa_th[2] = 750; -+ dig_t->is_dbg_fa_th = false; -+ dig_t->igi_dyn_up_hit = false; -+ dig_t->fw_dig_enable = false; -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ /* @For RTL8881A */ -+ false_alm_cnt->cnt_ofdm_fail_pre = 0; -+#endif -+ -+ dig_t->rx_gain_range_max = DIG_MAX_BALANCE_MODE; -+ dig_t->rx_gain_range_min = dig_t->cur_ig_value; -+ -+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) -+ if (dm->support_ic_type & -+ (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F)) { -+ dig_t->enable_adjust_big_jump = 1; -+ -+ if (dm->support_ic_type & ODM_RTL8822B) -+ ret_value = odm_get_bb_reg(dm, R_0x8c8, MASKLWORD); -+ else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) -+ ret_value = odm_get_bb_reg(dm, R_0xc74, MASKLWORD); -+ -+ dig_t->big_jump_step1 = (u8)(ret_value & 0xe) >> 1; -+ dig_t->big_jump_step2 = (u8)(ret_value & 0x30) >> 4; -+ dig_t->big_jump_step3 = (u8)(ret_value & 0xc0) >> 6; -+ -+ for (i = 0; i < sizeof(dig_t->big_jump_lmt); i++) { -+ if (dig_t->big_jump_lmt[i] == 0) -+ dig_t->big_jump_lmt[i] = 0x64; -+ /* Set -10dBm as default value */ -+ } -+ } -+#endif -+ -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ dm->original_dig_restore = true; -+ dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES; -+ dm->tdma_dig_timer_ms = DIG_TIMER_MS; -+ #endif -+ dig_t->tdma_force_l_igi = 0xff; -+ dig_t->tdma_force_h_igi = 0xff; -+#endif -+#ifdef CFG_DIG_DAMPING_CHK -+ phydm_dig_recorder_reset(dm); -+ dig_t->dig_dl_en = 1; -+#endif -+ -+#ifdef PHYDM_HW_IGI -+ phydm_hwigi_init(dm); -+#endif -+} -+void phydm_dig_abs_boundary_decision(struct dm_struct *dm, boolean is_dfs_band) -+{ -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_adaptivity_struct *adapt = &dm->adaptivity; -+ -+ if (is_dfs_band) { -+ if (*dm->band_width == CHANNEL_WIDTH_20){ -+ if (dm->support_ic_type & -+ (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B)){ -+ if (odm_get_bb_reg(dm, R_0x8d8, BIT(27)) == 1) -+ dig_t->dm_dig_min = DIG_MIN_DFS + 2; -+ else -+ dig_t->dm_dig_min = DIG_MIN_DFS; -+ } -+ else -+ dig_t->dm_dig_min = DIG_MIN_DFS; -+ } -+ else -+ dig_t->dm_dig_min = DIG_MIN_DFS; -+ -+ dig_t->dig_max_of_min = DIG_MIN_DFS; -+ dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE; -+ } else if (!dm->is_linked) { -+ dig_t->dm_dig_max = DIG_MAX_COVERAGR; -+ dig_t->dm_dig_min = DIG_MIN_COVERAGE; -+ } else { -+ if (*dm->bb_op_mode == PHYDM_BALANCE_MODE) { -+ /*service > 2 devices*/ -+ dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE; -+ #if (DIG_HW == 1) -+ dig_t->dig_max_of_min = DIG_MIN_COVERAGE; -+ #else -+ dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; -+ #endif -+ } else if (*dm->bb_op_mode == PHYDM_PERFORMANCE_MODE) { -+ /*service 1 devices*/ -+ if (*dm->edcca_mode == PHYDM_EDCCA_ADAPT_MODE && -+ dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) -+ /*dig_max shouldn't be too high because of adaptivity*/ -+ dig_t->dm_dig_max = -+ MIN_2((adapt->th_l2h + 40), -+ DIG_MAX_PERFORMANCE_MODE); -+ else -+ dig_t->dm_dig_max = DIG_MAX_PERFORMANCE_MODE; -+ -+ dig_t->dig_max_of_min = DIG_MAX_OF_MIN_PERFORMANCE_MODE; -+ } -+ -+ if (dm->support_ic_type & -+ (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B)) -+ dig_t->dm_dig_min = 0x1c; -+ else if (dm->support_ic_type & ODM_RTL8197F) -+ dig_t->dm_dig_min = 0x1e; /*@For HW setting*/ -+ else -+ dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; -+ } -+ -+ PHYDM_DBG(dm, DBG_DIG, "Abs{Max, Min}={0x%x, 0x%x}, Max_of_min=0x%x\n", -+ dig_t->dm_dig_max, dig_t->dm_dig_min, dig_t->dig_max_of_min); -+} -+ -+void phydm_dig_dym_boundary_decision(struct dm_struct *dm, boolean is_dfs_band) -+{ -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+#ifdef CFG_DIG_DAMPING_CHK -+ struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; -+#endif -+ u8 offset = 15, tmp_max = 0; -+ u8 max_of_rssi_min = 0; -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s ======>\n", __func__); -+ -+ if (!dm->is_linked) { -+ /*@if no link, always stay at lower bound*/ -+ dig_t->rx_gain_range_max = dig_t->dig_max_of_min; -+ dig_t->rx_gain_range_min = dig_t->dm_dig_min; -+ -+ PHYDM_DBG(dm, DBG_DIG, "No-Link, Dyn{Max, Min}={0x%x, 0x%x}\n", -+ dig_t->rx_gain_range_max, dig_t->rx_gain_range_min); -+ return; -+ } -+ -+ PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, ofst=%d\n", dm->rssi_min, offset); -+ -+ /* @DIG lower bound */ -+ if (is_dfs_band) -+ dig_t->rx_gain_range_min = dig_t->dm_dig_min; -+ else if (dm->rssi_min > dig_t->dig_max_of_min) -+ dig_t->rx_gain_range_min = dig_t->dig_max_of_min; -+ else if (dm->rssi_min < dig_t->dm_dig_min) -+ dig_t->rx_gain_range_min = dig_t->dm_dig_min; -+ else -+ dig_t->rx_gain_range_min = dm->rssi_min; -+ -+#ifdef CFG_DIG_DAMPING_CHK -+ /*@Limit Dyn min by damping*/ -+ if (dig_t->dig_dl_en && -+ dig_rc->damping_limit_en && -+ dig_t->rx_gain_range_min < dig_rc->damping_limit_val) { -+ PHYDM_DBG(dm, DBG_DIG, -+ "[Limit by Damping] Dig_dyn_min=0x%x -> 0x%x\n", -+ dig_t->rx_gain_range_min, dig_rc->damping_limit_val); -+ -+ dig_t->rx_gain_range_min = dig_rc->damping_limit_val; -+ } -+#endif -+ -+ /* @DIG upper bound */ -+ tmp_max = dig_t->rx_gain_range_min + offset; -+ if (dig_t->rx_gain_range_min != dm->rssi_min) { -+ max_of_rssi_min = dm->rssi_min + offset; -+ if (tmp_max > max_of_rssi_min) -+ tmp_max = max_of_rssi_min; -+ } -+ -+ if (tmp_max > dig_t->dm_dig_max) -+ dig_t->rx_gain_range_max = dig_t->dm_dig_max; -+ else if (tmp_max < dig_t->dm_dig_min) -+ dig_t->rx_gain_range_max = dig_t->dm_dig_min; -+ else -+ dig_t->rx_gain_range_max = tmp_max; -+ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ /* @1 Force Lower Bound for AntDiv */ -+ if (!dm->is_one_entry_only && -+ (dm->support_ability & ODM_BB_ANT_DIV) && -+ (dm->ant_div_type == CG_TRX_HW_ANTDIV || -+ dm->ant_div_type == CG_TRX_SMART_ANTDIV)) { -+ if (dig_t->ant_div_rssi_max > dig_t->dig_max_of_min) -+ dig_t->rx_gain_range_min = dig_t->dig_max_of_min; -+ else -+ dig_t->rx_gain_range_min = (u8)dig_t->ant_div_rssi_max; -+ -+ PHYDM_DBG(dm, DBG_DIG, "Force Dyn-Min=0x%x, RSSI_max=0x%x\n", -+ dig_t->rx_gain_range_min, dig_t->ant_div_rssi_max); -+ } -+ #endif -+ -+ PHYDM_DBG(dm, DBG_DIG, "Dyn{Max, Min}={0x%x, 0x%x}\n", -+ dig_t->rx_gain_range_max, dig_t->rx_gain_range_min); -+} -+ -+void phydm_dig_abnormal_case(struct dm_struct *dm) -+{ -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ /* @Abnormal lower bound case */ -+ if (dig_t->rx_gain_range_min > dig_t->rx_gain_range_max) -+ dig_t->rx_gain_range_min = dig_t->rx_gain_range_max; -+ -+ PHYDM_DBG(dm, DBG_DIG, "Abnoraml checked {Max, Min}={0x%x, 0x%x}\n", -+ dig_t->rx_gain_range_max, dig_t->rx_gain_range_min); -+} -+ -+u8 phydm_new_igi_by_fa(struct dm_struct *dm, u8 igi, u32 fa_cnt, u8 *step_size) -+{ -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ if (fa_cnt > dig_t->fa_th[2]) -+ igi = igi + step_size[0]; -+ else if (fa_cnt > dig_t->fa_th[1]) -+ igi = igi + step_size[1]; -+ else if (fa_cnt < dig_t->fa_th[0]) -+ igi = igi - step_size[2]; -+ -+ return igi; -+} -+ -+u8 phydm_get_new_igi(struct dm_struct *dm, u8 igi, u32 fa_cnt, -+ boolean is_dfs_band) -+{ -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ u8 step[3] = {0}; -+ -+ if (dm->is_linked) { -+ if (dm->pre_rssi_min <= dm->rssi_min) { -+ PHYDM_DBG(dm, DBG_DIG, "pre_rssi_min <= rssi_min\n"); -+ step[0] = 2; -+ step[1] = 1; -+ step[2] = 2; -+ } else { -+ step[0] = 4; -+ step[1] = 2; -+ step[2] = 2; -+ } -+ } else { -+ step[0] = 2; -+ step[1] = 1; -+ step[2] = 2; -+ } -+ -+ PHYDM_DBG(dm, DBG_DIG, "step = {-%d, +%d, +%d}\n", step[2], step[1], -+ step[0]); -+ -+ if (dm->first_connect) { -+ if (is_dfs_band) { -+ if (dm->rssi_min > DIG_MAX_DFS) -+ igi = DIG_MAX_DFS; -+ else -+ igi = dm->rssi_min; -+ PHYDM_DBG(dm, DBG_DIG, "DFS band:IgiMax=0x%x\n", -+ dig_t->rx_gain_range_max); -+ } else { -+ igi = dig_t->rx_gain_range_min; -+ } -+ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ #if (RTL8812A_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8812) -+ odm_config_bb_with_header_file(dm, -+ CONFIG_BB_AGC_TAB_DIFF); -+ #endif -+ #endif -+ PHYDM_DBG(dm, DBG_DIG, "First connect: foce IGI=0x%x\n", igi); -+ } else if (dm->is_linked) { -+ PHYDM_DBG(dm, DBG_DIG, "Adjust IGI @ linked\n"); -+ /* @4 Abnormal # beacon case */ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ if (dm->phy_dbg_info.num_qry_beacon_pkt < 5 && -+ fa_cnt < DM_DIG_FA_TH1 && dm->bsta_state && -+ dm->support_ic_type != ODM_RTL8723D && -+ dm->support_ic_type != ODM_RTL8822C) { -+ dig_t->rx_gain_range_min = 0x1c; -+ igi = dig_t->rx_gain_range_min; -+ PHYDM_DBG(dm, DBG_DIG, "Beacon_num=%d,force igi=0x%x\n", -+ dm->phy_dbg_info.num_qry_beacon_pkt, igi); -+ } else { -+ igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step); -+ } -+ #else -+ igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step); -+ #endif -+ } else { -+ /* @2 Before link */ -+ PHYDM_DBG(dm, DBG_DIG, "Adjust IGI before link\n"); -+ -+ if (dm->first_disconnect) { -+ igi = dig_t->dm_dig_min; -+ PHYDM_DBG(dm, DBG_DIG, -+ "First disconnect:foce IGI to lower bound\n"); -+ } else { -+ PHYDM_DBG(dm, DBG_DIG, "Pre_IGI=((0x%x)), FA=((%d))\n", -+ igi, fa_cnt); -+ -+ igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step); -+ } -+ } -+ -+ /*@Check IGI by dyn-upper/lower bound */ -+ if (igi < dig_t->rx_gain_range_min) -+ igi = dig_t->rx_gain_range_min; -+ -+ if (igi >= dig_t->rx_gain_range_max) { -+ igi = dig_t->rx_gain_range_max; -+ dig_t->igi_dyn_up_hit = true; -+ } else { -+ dig_t->igi_dyn_up_hit = false; -+ } -+ PHYDM_DBG(dm, DBG_DIG, "igi_dyn_up_hit=%d\n", -+ dig_t->igi_dyn_up_hit); -+ -+ PHYDM_DBG(dm, DBG_DIG, "fa_cnt = %d, IGI: 0x%x -> 0x%x\n", -+ fa_cnt, dig_t->cur_ig_value, igi); -+ -+ return igi; -+} -+ -+boolean phydm_dig_dfs_mode_en(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean dfs_mode_en = false; -+ -+ /* @Modify lower bound for DFS band */ -+ if (dm->is_dfs_band) { -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ dfs_mode_en = true; -+ #else -+ if (phydm_dfs_master_enabled(dm)) -+ dfs_mode_en = true; -+ #endif -+ PHYDM_DBG(dm, DBG_DIG, "In DFS band\n"); -+ } -+ return dfs_mode_en; -+} -+ -+void phydm_dig(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_fa_struct *fa = &dm->false_alm_cnt; -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+ struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc; -+#endif -+ u8 igi = dig_t->cur_ig_value; -+ u8 new_igi = 0x20; -+ u32 fa_cnt = fa->cnt_all; -+ boolean dfs_mode_en = false; -+ -+#ifdef PHYDM_DCC_ENHANCE -+ if (dm->dm_dcc_info.dcc_en) -+ fa_cnt = fa->cnt_ofdm_fail; /*OFDM FA only*/ -+#endif -+ -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+ if (!(dm->original_dig_restore)) { -+ if (dig_t->cur_ig_value_tdma == 0) -+ dig_t->cur_ig_value_tdma = dig_t->cur_ig_value; -+ -+ igi = dig_t->cur_ig_value_tdma; -+ fa_cnt = falm_cnt_acc->cnt_all_1sec; -+ } -+#endif -+ -+ if (phydm_dig_abort(dm)) { -+ dig_t->cur_ig_value = phydm_get_igi(dm, BB_PATH_A); -+ return; -+ } -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s Start===>\n", __func__); -+ PHYDM_DBG(dm, DBG_DIG, -+ "is_linked=%d, RSSI=%d, 1stConnect=%d, 1stDisconnect=%d\n", -+ dm->is_linked, dm->rssi_min, -+ dm->first_connect, dm->first_disconnect); -+ -+ PHYDM_DBG(dm, DBG_DIG, "DIG ((%s)) mode\n", -+ (*dm->bb_op_mode ? "Balance" : "Performance")); -+ -+ /*@DFS mode enable check*/ -+ dfs_mode_en = phydm_dig_dfs_mode_en(dm); -+ -+#ifdef CFG_DIG_DAMPING_CHK -+ /*Record IGI History*/ -+ phydm_dig_recorder(dm, igi, fa_cnt); -+ -+ /*@DIG Damping Check*/ -+ phydm_dig_damping_chk(dm); -+#endif -+ -+ /*@Absolute Boundary Decision */ -+ phydm_dig_abs_boundary_decision(dm, dfs_mode_en); -+ -+ /*@Dynamic Boundary Decision*/ -+ phydm_dig_dym_boundary_decision(dm, dfs_mode_en); -+ -+ /*@Abnormal case check*/ -+ phydm_dig_abnormal_case(dm); -+ -+ /*@FA threshold decision */ -+ phydm_fa_threshold_check(dm, dfs_mode_en); -+ -+ /*Select new IGI by FA */ -+ new_igi = phydm_get_new_igi(dm, igi, fa_cnt, dfs_mode_en); -+ -+ /* @1 Update status */ -+ #ifdef PHYDM_TDMA_DIG_SUPPORT -+ if (!(dm->original_dig_restore)) { -+ dig_t->cur_ig_value_tdma = new_igi; -+ /*@It is possible fa_acc_1sec_tsf >= */ -+ /*@1sec while tdma_dig_state == 0*/ -+ if (dig_t->tdma_dig_state != 0) -+ odm_write_dig(dm, dig_t->cur_ig_value_tdma); -+ } else -+ #endif -+ odm_write_dig(dm, new_igi); -+} -+ -+void phydm_dig_lps_32k(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 current_igi = dm->rssi_min; -+ -+ odm_write_dig(dm, current_igi); -+} -+ -+void phydm_dig_by_rssi_lps(void *dm_void) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT)) -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *falm_cnt; -+ -+ u8 rssi_lower = DIG_MIN_LPS; /* @0x1E or 0x1C */ -+ u8 current_igi = dm->rssi_min; -+ -+ falm_cnt = &dm->false_alm_cnt; -+ if (phydm_dig_abort(dm)) -+ return; -+ -+ current_igi = current_igi + RSSI_OFFSET_DIG_LPS; -+ PHYDM_DBG(dm, DBG_DIG, "%s==>\n", __func__); -+ -+ /* Using FW PS mode to make IGI */ -+ /* @Adjust by FA in LPS MODE */ -+ if (falm_cnt->cnt_all > DM_DIG_FA_TH2_LPS) -+ current_igi = current_igi + 4; -+ else if (falm_cnt->cnt_all > DM_DIG_FA_TH1_LPS) -+ current_igi = current_igi + 2; -+ else if (falm_cnt->cnt_all < DM_DIG_FA_TH0_LPS) -+ current_igi = current_igi - 2; -+ -+ /* @Lower bound checking */ -+ -+ /* RSSI Lower bound check */ -+ if ((dm->rssi_min - 10) > DIG_MIN_LPS) -+ rssi_lower = (dm->rssi_min - 10); -+ else -+ rssi_lower = DIG_MIN_LPS; -+ -+ /* Upper and Lower Bound checking */ -+ if (current_igi > DIG_MAX_LPS) -+ current_igi = DIG_MAX_LPS; -+ else if (current_igi < rssi_lower) -+ current_igi = rssi_lower; -+ -+ PHYDM_DBG(dm, DBG_DIG, "fa_cnt_all=%d, rssi_min=%d, curr_igi=0x%x\n", -+ falm_cnt->cnt_all, dm->rssi_min, current_igi); -+ odm_write_dig(dm, current_igi); -+#endif -+} -+ -+void phydm_get_dig_coverage(void *dm_void, u8 *max, u8 *min) -+{ -+ *min = DIG_MIN_COVERAGE; -+ *max = DIG_MAX_PERFORMANCE_MODE; -+} -+ -+u8 phydm_get_igi_for_target_pin_scan(void *dm_void, u8 rssi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 igi = 0; -+ u8 max = 0; -+ u8 min = 0; -+ -+ igi = rssi + 10; -+ -+ phydm_get_dig_coverage(dm, &max, &min); -+ -+ if (igi > max) -+ igi = max; -+ else if (igi < min) -+ igi = min; -+ -+ return igi; -+} -+ -+/* @3============================================================ -+ * 3 FASLE ALARM CHECK -+ * 3============================================================ -+ */ -+void phydm_false_alarm_counter_reg_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc; -+#endif -+ u32 false_alm_cnt = 0; -+ -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+ if (!(dm->original_dig_restore)) { -+ if (dig_t->cur_ig_value_tdma == 0) -+ dig_t->cur_ig_value_tdma = dig_t->cur_ig_value; -+ -+ false_alm_cnt = falm_cnt_acc->cnt_all_1sec; -+ } else -+#endif -+ { -+ false_alm_cnt = falm_cnt->cnt_all; -+ } -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ /* @reset CCK FA and CCA counter */ -+ odm_set_bb_reg(dm, R_0x2a44, BIT(21), 0); -+ odm_set_bb_reg(dm, R_0x2a44, BIT(21), 1); -+ } else { -+ /* @reset CCK FA counter */ -+ odm_set_bb_reg(dm, R_0x1a2c, BIT(15) | BIT(14), 0); -+ odm_set_bb_reg(dm, R_0x1a2c, BIT(15) | BIT(14), 2); -+ -+ /* @reset CCK CCA counter */ -+ odm_set_bb_reg(dm, R_0x1a2c, BIT(13) | BIT(12), 0); -+ odm_set_bb_reg(dm, R_0x1a2c, BIT(13) | BIT(12), 2); -+ } -+ /* @Disable common rx clk gating => WLANBB-1106*/ -+ odm_set_bb_reg(dm, R_0x1d2c, BIT(31), 0); -+ /* @reset OFDM CCA counter, OFDM FA counter*/ -+ phydm_reset_bb_hw_cnt(dm); -+ /* @Enable common rx clk gating => WLANBB-1106*/ -+ odm_set_bb_reg(dm, R_0x1d2c, BIT(31), 1); -+ } -+#endif -+#if (ODM_IC_11N_SERIES_SUPPORT) -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ /* @reset false alarm counter registers*/ -+ odm_set_bb_reg(dm, R_0xc0c, BIT(31), 1); -+ odm_set_bb_reg(dm, R_0xc0c, BIT(31), 0); -+ odm_set_bb_reg(dm, R_0xd00, BIT(27), 1); -+ odm_set_bb_reg(dm, R_0xd00, BIT(27), 0); -+ -+ /* @update ofdm counter*/ -+ /* @update page C counter*/ -+ odm_set_bb_reg(dm, R_0xc00, BIT(31), 0); -+ /* @update page D counter*/ -+ odm_set_bb_reg(dm, R_0xd00, BIT(31), 0); -+ -+ /* @reset CCK CCA counter*/ -+ odm_set_bb_reg(dm, R_0xa2c, BIT(13) | BIT(12), 0); -+ odm_set_bb_reg(dm, R_0xa2c, BIT(13) | BIT(12), 2); -+ -+ /* @reset CCK FA counter*/ -+ odm_set_bb_reg(dm, R_0xa2c, BIT(15) | BIT(14), 0); -+ odm_set_bb_reg(dm, R_0xa2c, BIT(15) | BIT(14), 2); -+ -+ /* @reset CRC32 counter*/ -+ odm_set_bb_reg(dm, R_0xf14, BIT(16), 1); -+ odm_set_bb_reg(dm, R_0xf14, BIT(16), 0); -+ } -+#endif /* @#if (ODM_IC_11N_SERIES_SUPPORT) */ -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT) -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ #if (RTL8881A_SUPPORT) -+ /* @Reset FA counter by enable/disable OFDM */ -+ if ((dm->support_ic_type == ODM_RTL8881A) && -+ false_alm_cnt->cnt_ofdm_fail_pre >= 0x7fff) { -+ /* reset OFDM */ -+ odm_set_bb_reg(dm, R_0x808, BIT(29), 0); -+ odm_set_bb_reg(dm, R_0x808, BIT(29), 1); -+ false_alm_cnt->cnt_ofdm_fail_pre = 0; -+ PHYDM_DBG(dm, DBG_FA_CNT, "Reset FA_cnt\n"); -+ } -+ #endif /* @#if (RTL8881A_SUPPORT) */ -+ -+ /* @reset OFDM FA countner */ -+ odm_set_bb_reg(dm, R_0x9a4, BIT(17), 1); -+ odm_set_bb_reg(dm, R_0x9a4, BIT(17), 0); -+ -+ /* @reset CCK FA counter */ -+ odm_set_bb_reg(dm, R_0xa2c, BIT(15), 0); -+ odm_set_bb_reg(dm, R_0xa2c, BIT(15), 1); -+ -+ /* @reset CCA counter */ -+ phydm_reset_bb_hw_cnt(dm); -+ } -+#endif /* @#if (ODM_IC_11AC_SERIES_SUPPORT) */ -+} -+ -+void phydm_false_alarm_counter_reg_hold(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_RTL8723F) -+ return; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ /* @hold cck counter */ -+ odm_set_bb_reg(dm, R_0x1a2c, BIT(12), 1); -+ odm_set_bb_reg(dm, R_0x1a2c, BIT(14), 1); -+ } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ /*@hold ofdm counter*/ -+ /*@hold page C counter*/ -+ odm_set_bb_reg(dm, R_0xc00, BIT(31), 1); -+ /*@hold page D counter*/ -+ odm_set_bb_reg(dm, R_0xd00, BIT(31), 1); -+ -+ /*@hold cck counter*/ -+ odm_set_bb_reg(dm, R_0xa2c, BIT(12), 1); -+ odm_set_bb_reg(dm, R_0xa2c, BIT(14), 1); -+ } -+} -+ -+#if (ODM_IC_11N_SERIES_SUPPORT) -+void phydm_fa_cnt_statistics_n(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ u32 reg = 0; -+ -+ if (!(dm->support_ic_type & ODM_IC_11N_SERIES)) -+ return; -+ -+ /* @hold ofdm & cck counter */ -+ phydm_false_alarm_counter_reg_hold(dm); -+ -+ reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE1_11N, MASKDWORD); -+ fa_t->cnt_fast_fsync = (reg & 0xffff); -+ fa_t->cnt_sb_search_fail = ((reg & 0xffff0000) >> 16); -+ -+ reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE2_11N, MASKDWORD); -+ fa_t->cnt_ofdm_cca = (reg & 0xffff); -+ fa_t->cnt_parity_fail = ((reg & 0xffff0000) >> 16); -+ -+ reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE3_11N, MASKDWORD); -+ fa_t->cnt_rate_illegal = (reg & 0xffff); -+ fa_t->cnt_crc8_fail = ((reg & 0xffff0000) >> 16); -+ -+ reg = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE4_11N, MASKDWORD); -+ fa_t->cnt_mcs_fail = (reg & 0xffff); -+ -+ fa_t->cnt_ofdm_fail = -+ fa_t->cnt_parity_fail + fa_t->cnt_rate_illegal + -+ fa_t->cnt_crc8_fail + fa_t->cnt_mcs_fail + -+ fa_t->cnt_fast_fsync + fa_t->cnt_sb_search_fail; -+ -+ /* read CCK CRC32 counter */ -+ fa_t->cnt_cck_crc32_error = odm_get_bb_reg(dm, R_0xf84, MASKDWORD); -+ fa_t->cnt_cck_crc32_ok = odm_get_bb_reg(dm, R_0xf88, MASKDWORD); -+ -+ /* read OFDM CRC32 counter */ -+ reg = odm_get_bb_reg(dm, ODM_REG_OFDM_CRC32_CNT_11N, MASKDWORD); -+ fa_t->cnt_ofdm_crc32_error = (reg & 0xffff0000) >> 16; -+ fa_t->cnt_ofdm_crc32_ok = reg & 0xffff; -+ -+ /* read OFDM2 CRC32 counter */ -+ reg = odm_get_bb_reg(dm, R_0xf9c, MASKDWORD); -+ fa_t->cnt_ofdm_crc32_error = (reg & 0xffff0000) >> 16; -+ fa_t->cnt_ofdm2_crc32_ok = reg & 0xffff; -+ -+ /* read HT CRC32 counter */ -+ reg = odm_get_bb_reg(dm, ODM_REG_HT_CRC32_CNT_11N, MASKDWORD); -+ fa_t->cnt_ht_crc32_error = (reg & 0xffff0000) >> 16; -+ fa_t->cnt_ht_crc32_ok = reg & 0xffff; -+ -+ /* read HT2 CRC32 counter */ -+ reg = odm_get_bb_reg(dm, R_0xf98, MASKDWORD); -+ fa_t->cnt_ht_crc32_error = (reg & 0xffff0000) >> 16; -+ fa_t->cnt_ht2_crc32_ok = reg & 0xffff; -+ -+ /* read VHT CRC32 counter */ -+ fa_t->cnt_vht_crc32_error = 0; -+ fa_t->cnt_vht_crc32_ok = 0; -+ -+ #if (RTL8723D_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8723D) { -+ /* read HT CRC32 agg counter */ -+ reg = odm_get_bb_reg(dm, R_0xfb8, MASKDWORD); -+ fa_t->cnt_ht_crc32_error_agg = (reg & 0xffff0000) >> 16; -+ fa_t->cnt_ht_crc32_ok_agg = reg & 0xffff; -+ } -+ #endif -+ -+ #if (RTL8188E_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8188E) { -+ reg = odm_get_bb_reg(dm, ODM_REG_SC_CNT_11N, MASKDWORD); -+ fa_t->cnt_bw_lsc = (reg & 0xffff); -+ fa_t->cnt_bw_usc = ((reg & 0xffff0000) >> 16); -+ } -+ #endif -+ -+ reg = odm_get_bb_reg(dm, ODM_REG_CCK_FA_LSB_11N, MASKBYTE0); -+ fa_t->cnt_cck_fail = reg; -+ -+ reg = odm_get_bb_reg(dm, ODM_REG_CCK_FA_MSB_11N, MASKBYTE3); -+ fa_t->cnt_cck_fail += (reg & 0xff) << 8; -+ -+ reg = odm_get_bb_reg(dm, ODM_REG_CCK_CCA_CNT_11N, MASKDWORD); -+ fa_t->cnt_cck_cca = ((reg & 0xFF) << 8) | ((reg & 0xFF00) >> 8); -+ -+ fa_t->cnt_all_pre = fa_t->cnt_all; -+ -+ fa_t->cnt_all = fa_t->cnt_fast_fsync + -+ fa_t->cnt_sb_search_fail + -+ fa_t->cnt_parity_fail + -+ fa_t->cnt_rate_illegal + -+ fa_t->cnt_crc8_fail + -+ fa_t->cnt_mcs_fail + -+ fa_t->cnt_cck_fail; -+ -+ fa_t->cnt_cca_all = fa_t->cnt_ofdm_cca + fa_t->cnt_cck_cca; -+} -+#endif -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT) -+void phydm_fa_cnt_statistics_ac(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ u32 ret_value = 0; -+ u32 cck_enable = 0; -+ -+ if (!(dm->support_ic_type & ODM_IC_11AC_SERIES)) -+ return; -+ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE1_11AC, MASKDWORD); -+ fa_t->cnt_fast_fsync = (ret_value & 0xffff0000) >> 16; -+ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE2_11AC, MASKDWORD); -+ fa_t->cnt_sb_search_fail = ret_value & 0xffff; -+ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE3_11AC, MASKDWORD); -+ fa_t->cnt_parity_fail = ret_value & 0xffff; -+ fa_t->cnt_rate_illegal = (ret_value & 0xffff0000) >> 16; -+ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE4_11AC, MASKDWORD); -+ fa_t->cnt_crc8_fail = ret_value & 0xffff; -+ fa_t->cnt_mcs_fail = (ret_value & 0xffff0000) >> 16; -+ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE5_11AC, MASKDWORD); -+ fa_t->cnt_crc8_fail_vhta = ret_value & 0xffff; -+ fa_t->cnt_crc8_fail_vhtb = ret_value & 0xffff0000 >> 16; -+ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_FA_TYPE6_11AC, MASKDWORD); -+ fa_t->cnt_mcs_fail_vht = ret_value & 0xffff; -+ -+ /* read OFDM FA counter */ -+ fa_t->cnt_ofdm_fail = odm_get_bb_reg(dm, R_0xf48, MASKLWORD); -+ -+ /* Read CCK FA counter */ -+ fa_t->cnt_cck_fail = odm_get_bb_reg(dm, ODM_REG_CCK_FA_11AC, MASKLWORD); -+ -+ /* read CCK/OFDM CCA counter */ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_CCA_CNT_11AC, MASKDWORD); -+ fa_t->cnt_ofdm_cca = (ret_value & 0xffff0000) >> 16; -+ fa_t->cnt_cck_cca = ret_value & 0xffff; -+ -+ /* read CCK CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_CCK_CRC32_CNT_11AC, MASKDWORD); -+ fa_t->cnt_cck_crc32_error = (ret_value & 0xffff0000) >> 16; -+ fa_t->cnt_cck_crc32_ok = ret_value & 0xffff; -+ -+ /* read OFDM CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_OFDM_CRC32_CNT_11AC, MASKDWORD); -+ fa_t->cnt_ofdm_crc32_error = (ret_value & 0xffff0000) >> 16; -+ fa_t->cnt_ofdm_crc32_ok = ret_value & 0xffff; -+ -+ /* read OFDM2 CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, R_0xf1c, MASKDWORD); -+ fa_t->cnt_ofdm2_crc32_ok = ret_value & 0xffff; -+ fa_t->cnt_ofdm2_crc32_error = (ret_value & 0xffff0000) >> 16; -+ -+ /* read HT CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_HT_CRC32_CNT_11AC, MASKDWORD); -+ fa_t->cnt_ht_crc32_error = (ret_value & 0xffff0000) >> 16; -+ fa_t->cnt_ht_crc32_ok = ret_value & 0xffff; -+ -+ /* read HT2 CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, R_0xf18, MASKDWORD); -+ fa_t->cnt_ht2_crc32_ok = ret_value & 0xffff; -+ fa_t->cnt_ht2_crc32_error = (ret_value & 0xffff0000) >> 16; -+ -+ /* read VHT CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, ODM_REG_VHT_CRC32_CNT_11AC, MASKDWORD); -+ fa_t->cnt_vht_crc32_error = (ret_value & 0xffff0000) >> 16; -+ fa_t->cnt_vht_crc32_ok = ret_value & 0xffff; -+ -+ /*read VHT2 CRC32 counter */ -+ ret_value = odm_get_bb_reg(dm, R_0xf54, MASKDWORD); -+ fa_t->cnt_vht2_crc32_ok = ret_value & 0xffff; -+ fa_t->cnt_vht2_crc32_error = (ret_value & 0xffff0000) >> 16; -+ -+ #if (RTL8881A_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8881A) { -+ u32 tmp = 0; -+ -+ if (fa_t->cnt_ofdm_fail >= fa_t->cnt_ofdm_fail_pre) { -+ tmp = fa_t->cnt_ofdm_fail_pre; -+ fa_t->cnt_ofdm_fail_pre = fa_t->cnt_ofdm_fail; -+ fa_t->cnt_ofdm_fail = fa_t->cnt_ofdm_fail - tmp; -+ } else { -+ fa_t->cnt_ofdm_fail_pre = fa_t->cnt_ofdm_fail; -+ } -+ -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[8881]cnt_ofdm_fail{curr,pre}={%d,%d}\n", -+ fa_t->cnt_ofdm_fail_pre, tmp); -+ } -+ #endif -+ -+ cck_enable = odm_get_bb_reg(dm, ODM_REG_BB_RX_PATH_11AC, BIT(28)); -+ -+ if (cck_enable) { /* @if(*dm->band_type == ODM_BAND_2_4G) */ -+ fa_t->cnt_all = fa_t->cnt_ofdm_fail + fa_t->cnt_cck_fail; -+ fa_t->cnt_cca_all = fa_t->cnt_cck_cca + fa_t->cnt_ofdm_cca; -+ } else { -+ fa_t->cnt_all = fa_t->cnt_ofdm_fail; -+ fa_t->cnt_cca_all = fa_t->cnt_ofdm_cca; -+ } -+} -+#endif -+ -+u32 phydm_get_edcca_report(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ u32 dbg_port = dm->adaptivity.adaptivity_dbg_port; -+ u32 val = 0; -+ -+ if (dm->support_ic_type & ODM_RTL8723D) { -+ val = odm_get_bb_reg(dm, R_0x9a0, BIT(29)); -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ val = odm_get_bb_reg(dm, R_0x2d38, BIT(24)); -+ } else if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, dbg_port)) { -+ if (dm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E)) -+ val = (phydm_get_bb_dbg_port_val(dm) & BIT(30)) >> 30; -+ else -+ val = (phydm_get_bb_dbg_port_val(dm) & BIT(29)) >> 29; -+ phydm_release_bb_dbg_port(dm); -+ } -+ -+ return val; -+} -+ -+void phydm_get_dbg_port_info(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ fa_t->dbg_port0 = odm_get_bb_reg(dm, R_0x2db4, MASKDWORD); -+ } else { -+ /*set debug port to 0x0*/ -+ if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_1, 0x0)) { -+ fa_t->dbg_port0 = phydm_get_bb_dbg_port_val(dm); -+ phydm_release_bb_dbg_port(dm); -+ } -+ } -+ -+ fa_t->edcca_flag = (boolean)phydm_get_edcca_report(dm); -+ -+ PHYDM_DBG(dm, DBG_FA_CNT, "FA_Cnt: Dbg port 0x0 = 0x%x, EDCCA = %d\n", -+ fa_t->dbg_port0, fa_t->edcca_flag); -+} -+ -+void phydm_set_crc32_cnt2_rate(void *dm_void, u8 rate_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ boolean is_ofdm_rate = phydm_is_ofdm_rate(dm, rate_idx); -+ boolean is_ht_rate = phydm_is_ht_rate(dm, rate_idx); -+ boolean is_vht_rate = phydm_is_vht_rate(dm, rate_idx); -+ u32 reg_addr = 0x0; -+ u32 ofdm_rate_bitmask = 0x0; -+ u32 ht_mcs_bitmask = 0x0; -+ u32 vht_mcs_bitmask = 0x0; -+ u32 vht_ss_bitmask = 0x0; -+ u8 rate = 0x0; -+ u8 ss = 0x0; -+ -+ if (!is_ofdm_rate && !is_ht_rate && !is_vht_rate) -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[FA CNT] rate_idx = (0x%x) is not supported !\n", -+ rate_idx); -+ -+ switch (dm->ic_ip_series) { -+ case PHYDM_IC_N: -+ reg_addr = R_0xf04; -+ ofdm_rate_bitmask = 0x0000f000; -+ ht_mcs_bitmask = 0x007f0000; -+ break; -+ case PHYDM_IC_AC: -+ reg_addr = R_0xb04; -+ ofdm_rate_bitmask = 0x0000f000; -+ ht_mcs_bitmask = 0x007f0000; -+ vht_mcs_bitmask = 0x0f000000; -+ vht_ss_bitmask = 0x30000000; -+ break; -+ case PHYDM_IC_JGR3: -+ reg_addr = R_0x1eb8; -+ ofdm_rate_bitmask = 0x00000f00; -+ ht_mcs_bitmask = 0x007f0000; -+ vht_mcs_bitmask = 0x0000f000; -+ vht_ss_bitmask = 0x000000c0; -+ break; -+ default: -+ break; -+ } -+ -+ if (is_ofdm_rate) { -+ rate = phydm_legacy_rate_2_spec_rate(dm, rate_idx); -+ -+ odm_set_bb_reg(dm, reg_addr, ofdm_rate_bitmask, rate); -+ fa_t->ofdm2_rate_idx = rate_idx; -+ } else if (is_ht_rate) { -+ rate = phydm_rate_2_rate_digit(dm, rate_idx); -+ -+ odm_set_bb_reg(dm, reg_addr, ht_mcs_bitmask, rate); -+ fa_t->ht2_rate_idx = rate_idx; -+ } else if (is_vht_rate) { -+ rate = phydm_rate_2_rate_digit(dm, rate_idx); -+ ss = phydm_rate_to_num_ss(dm, rate_idx); -+ -+ odm_set_bb_reg(dm, reg_addr, vht_mcs_bitmask, rate); -+ odm_set_bb_reg(dm, reg_addr, vht_ss_bitmask, ss - 1); -+ fa_t->vht2_rate_idx = rate_idx; -+ } -+} -+ -+void phydm_false_alarm_counter_statistics(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *fa_t = &dm->false_alm_cnt; -+ char dbg_buf[PHYDM_SNPRINT_SIZE] = {0}; -+ u32 tmp = 0; -+ -+ if (!(dm->support_ability & ODM_BB_FA_CNT)) -+ return; -+ -+ PHYDM_DBG(dm, DBG_FA_CNT, "%s======>\n", __func__); -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ phydm_fa_cnt_statistics_jgr3(dm); -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ #if (ODM_IC_11N_SERIES_SUPPORT) -+ phydm_fa_cnt_statistics_n(dm); -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ #if (ODM_IC_11AC_SERIES_SUPPORT) -+ phydm_fa_cnt_statistics_ac(dm); -+ #endif -+ } -+ -+ phydm_get_dbg_port_info(dm); -+ phydm_false_alarm_counter_reg_reset(dm_void); -+ -+ fa_t->time_fa_all = fa_t->cnt_fast_fsync * 12 + -+ fa_t->cnt_sb_search_fail * 12 + -+ fa_t->cnt_parity_fail * 28 + -+ fa_t->cnt_rate_illegal * 28 + -+ fa_t->cnt_crc8_fail * 20 + -+ fa_t->cnt_crc8_fail_vhta * 28 + -+ fa_t->cnt_mcs_fail_vht * 36 + -+ fa_t->cnt_mcs_fail * 32 + -+ fa_t->cnt_cck_fail * 80; -+ -+ fa_t->cnt_crc32_error_all = fa_t->cnt_vht_crc32_error + -+ fa_t->cnt_ht_crc32_error + -+ fa_t->cnt_ofdm_crc32_error + -+ fa_t->cnt_cck_crc32_error; -+ -+ fa_t->cnt_crc32_ok_all = fa_t->cnt_vht_crc32_ok + -+ fa_t->cnt_ht_crc32_ok + -+ fa_t->cnt_ofdm_crc32_ok + -+ fa_t->cnt_cck_crc32_ok; -+ -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", -+ fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all); -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", -+ fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all); -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d\n", -+ fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal, -+ fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail); -+ PHYDM_DBG(dm, DBG_FA_CNT, "[HT FA] CRC8=%d, MCS=%d\n", -+ fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail); -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) { -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d\n", -+ fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb, -+ fa_t->cnt_mcs_fail_vht); -+ } -+#endif -+ -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n", -+ fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok, -+ fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok, -+ fa_t->cnt_crc32_ok_all); -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n", -+ fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error, -+ fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error, -+ fa_t->cnt_crc32_error_all); -+ -+ if (fa_t->ofdm2_rate_idx) { -+ tmp = fa_t->cnt_ofdm2_crc32_error + fa_t->cnt_ofdm2_crc32_ok; -+ fa_t->ofdm2_pcr = (u8)PHYDM_DIV(fa_t->cnt_ofdm2_crc32_ok * 100, -+ tmp); -+ phydm_print_rate_2_buff(dm, fa_t->ofdm2_rate_idx, dbg_buf, -+ PHYDM_SNPRINT_SIZE); -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[OFDM:%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)\n", -+ dbg_buf, fa_t->cnt_ofdm2_crc32_error, -+ fa_t->cnt_ofdm2_crc32_ok, fa_t->ofdm2_pcr); -+ } else { -+ phydm_set_crc32_cnt2_rate(dm, ODM_RATE6M); -+ } -+ -+ if (fa_t->ht2_rate_idx) { -+ tmp = fa_t->cnt_ht2_crc32_error + fa_t->cnt_ht2_crc32_ok; -+ fa_t->ht2_pcr = (u8)PHYDM_DIV(fa_t->cnt_ht2_crc32_ok * 100, -+ tmp); -+ phydm_print_rate_2_buff(dm, fa_t->ht2_rate_idx, dbg_buf, -+ PHYDM_SNPRINT_SIZE); -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[HT:%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)\n", -+ dbg_buf, fa_t->cnt_ht2_crc32_error, -+ fa_t->cnt_ht2_crc32_ok, fa_t->ht2_pcr); -+ } else { -+ phydm_set_crc32_cnt2_rate(dm, ODM_RATEMCS0); -+ } -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) { -+ if (fa_t->vht2_rate_idx) { -+ tmp = fa_t->cnt_vht2_crc32_error + -+ fa_t->cnt_vht2_crc32_ok; -+ fa_t->vht2_pcr = (u8)PHYDM_DIV(fa_t->cnt_vht2_crc32_ok * -+ 100, tmp); -+ phydm_print_rate_2_buff(dm, fa_t->vht2_rate_idx, -+ dbg_buf, PHYDM_SNPRINT_SIZE); -+ PHYDM_DBG(dm, DBG_FA_CNT, -+ "[VHT:%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)\n", -+ dbg_buf, fa_t->cnt_vht2_crc32_error, -+ fa_t->cnt_vht2_crc32_ok, fa_t->vht2_pcr); -+ } else { -+ phydm_set_crc32_cnt2_rate(dm, ODM_RATEVHTSS1MCS0); -+ } -+ } -+#endif -+} -+ -+void phydm_fill_fw_dig_info(void *dm_void, boolean *enable, -+ u8 *para4, u8 *para8) { -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ dig_t->fw_dig_enable = *enable; -+ para8[0] = dig_t->rx_gain_range_max; -+ para8[1] = dig_t->rx_gain_range_min; -+ para8[2] = dm->number_linked_client; -+ para4[0] = (u8)DIG_LPS_MODE; -+} -+ -+void phydm_crc32_cnt_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ u8 rate = 0x0; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[CRC32 Cnt] {rate_idx}\n"); -+ } else { -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ rate = (u8)var1[0]; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{rate}={0x%x}", rate); -+ -+ phydm_set_crc32_cnt2_rate(dm, rate); -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+void phydm_set_tdma_dig_timer(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 delta_time_us = dm->tdma_dig_timer_ms * 1000; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ u32 timeout = 0; -+ u32 current_time_stamp, diff_time_stamp, regb0 = 0; -+ -+ /*some IC has no FREERUN_CUNT register, like 92E*/ -+ if (dm->support_ic_type & ODM_RTL8197F) -+ current_time_stamp = odm_get_bb_reg(dm, R_0x568, 0xffffffff); -+ else -+ return; -+ -+ timeout = current_time_stamp + delta_time_us; -+ -+ diff_time_stamp = current_time_stamp - dig_t->cur_timestamp; -+ dig_t->pre_timestamp = dig_t->cur_timestamp; -+ dig_t->cur_timestamp = current_time_stamp; -+ -+ /*@HIMR0, it shows HW interrupt mask*/ -+ regb0 = odm_get_bb_reg(dm, R_0xb0, 0xffffffff); -+ -+ PHYDM_DBG(dm, DBG_DIG, "Set next timer\n"); -+ PHYDM_DBG(dm, DBG_DIG, -+ "curr_time_stamp=%d, delta_time_us=%d\n", -+ current_time_stamp, delta_time_us); -+ PHYDM_DBG(dm, DBG_DIG, -+ "timeout=%d, diff_time_stamp=%d, Reg0xb0 = 0x%x\n", -+ timeout, diff_time_stamp, regb0); -+ -+ if (dm->support_ic_type & ODM_RTL8197F) /*REG_PS_TIMER2*/ -+ odm_set_bb_reg(dm, R_0x588, 0xffffffff, timeout); -+ else { -+ PHYDM_DBG(dm, DBG_DIG, "NOT 97F, NOT start\n"); -+ return; -+ } -+} -+ -+void phydm_tdma_dig_timer_check(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ PHYDM_DBG(dm, DBG_DIG, "tdma_dig_cnt=%d, pre_tdma_dig_cnt=%d\n", -+ dig_t->tdma_dig_cnt, dig_t->pre_tdma_dig_cnt); -+ -+ if (dig_t->tdma_dig_cnt == 0 || -+ dig_t->tdma_dig_cnt == dig_t->pre_tdma_dig_cnt) { -+ if (dm->support_ability & ODM_BB_DIG) { -+#ifdef IS_USE_NEW_TDMA -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B | -+ ODM_RTL8812F | ODM_RTL8822B | ODM_RTL8192F | -+ ODM_RTL8821C | ODM_RTL8197G | ODM_RTL8822C | -+ ODM_RTL8723D| ODM_RTL8723F)) { -+ PHYDM_DBG(dm, DBG_DIG, -+ "Check fail, Restart timer\n\n"); -+ phydm_false_alarm_counter_reset(dm); -+ odm_set_timer(dm, &dm->tdma_dig_timer, -+ dm->tdma_dig_timer_ms); -+ } else { -+ PHYDM_DBG(dm, DBG_DIG, -+ "Not support TDMADIG, no SW timer\n"); -+ } -+#else -+ /*@if interrupt mask info is got.*/ -+ /*Reg0xb0 is no longer needed*/ -+#if 0 -+ /*regb0 = odm_get_bb_reg(dm, R_0xb0, bMaskDWord);*/ -+#endif -+ PHYDM_DBG(dm, DBG_DIG, -+ "Check fail, Mask[0]=0x%x, restart timer\n", -+ *dm->interrupt_mask); -+ -+ phydm_tdma_dig_add_interrupt_mask_handler(dm); -+ phydm_enable_rx_related_interrupt_handler(dm); -+ phydm_set_tdma_dig_timer(dm); -+#endif -+ } -+ } else { -+ PHYDM_DBG(dm, DBG_DIG, "Check pass, update pre_tdma_dig_cnt\n"); -+ } -+ -+ dig_t->pre_tdma_dig_cnt = dig_t->tdma_dig_cnt; -+} -+ -+/*@different IC/team may use different timer for tdma-dig*/ -+void phydm_tdma_dig_add_interrupt_mask_handler(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (DM_ODM_SUPPORT_TYPE == (ODM_AP)) -+ if (dm->support_ic_type & ODM_RTL8197F) { -+ /*@HAL_INT_TYPE_PSTIMEOUT2*/ -+ phydm_add_interrupt_mask_handler(dm, HAL_INT_TYPE_PSTIMEOUT2); -+ } -+#elif (DM_ODM_SUPPORT_TYPE == (ODM_WIN)) -+#elif (DM_ODM_SUPPORT_TYPE == (ODM_CE)) -+#endif -+} -+ -+/* will be triggered by HW timer*/ -+void phydm_tdma_dig(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; -+ u32 reg_c50 = 0; -+ -+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8821C_SUPPORT) -+#ifdef IS_USE_NEW_TDMA -+ if (dm->support_ic_type & -+ (ODM_RTL8198F | ODM_RTL8814B | ODM_RTL8812F | ODM_RTL8822B | -+ ODM_RTL8192F | ODM_RTL8821C)) { -+ PHYDM_DBG(dm, DBG_DIG, "98F/14B/12F/22B/92F/21C, new tdma\n"); -+ return; -+ } -+#endif -+#endif -+ reg_c50 = odm_get_bb_reg(dm, R_0xc50, MASKBYTE0); -+ -+ dig_t->tdma_dig_state = -+ dig_t->tdma_dig_cnt % dm->tdma_dig_state_number; -+ -+ PHYDM_DBG(dm, DBG_DIG, "tdma_dig_state=%d, regc50=0x%x\n", -+ dig_t->tdma_dig_state, reg_c50); -+ -+ dig_t->tdma_dig_cnt++; -+ -+ if (dig_t->tdma_dig_state == 1) { -+ /* update IGI from tdma_dig_state == 0*/ -+ if (dig_t->cur_ig_value_tdma == 0) -+ dig_t->cur_ig_value_tdma = dig_t->cur_ig_value; -+ -+ odm_write_dig(dm, dig_t->cur_ig_value_tdma); -+ phydm_tdma_false_alarm_counter_check(dm); -+ PHYDM_DBG(dm, DBG_DIG, "tdma_dig_state=%d, reset FA counter\n", -+ dig_t->tdma_dig_state); -+ -+ } else if (dig_t->tdma_dig_state == 0) { -+ /* update dig_t->CurIGValue,*/ -+ /* @it may different from dig_t->cur_ig_value_tdma */ -+ /* TDMA IGI upperbond @ L-state = */ -+ /* rf_ft_var.tdma_dig_low_upper_bond = 0x26 */ -+ -+ if (dig_t->cur_ig_value >= dm->tdma_dig_low_upper_bond) -+ dig_t->low_ig_value = dm->tdma_dig_low_upper_bond; -+ else -+ dig_t->low_ig_value = dig_t->cur_ig_value; -+ -+ odm_write_dig(dm, dig_t->low_ig_value); -+ phydm_tdma_false_alarm_counter_check(dm); -+ } else { -+ phydm_tdma_false_alarm_counter_check(dm); -+ } -+} -+ -+/*@============================================================*/ -+/*@FASLE ALARM CHECK*/ -+/*@============================================================*/ -+void phydm_tdma_false_alarm_counter_check(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; -+ struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ boolean rssi_dump_en = 0; -+ u32 timestamp = 0; -+ u8 tdma_dig_state_number = 0; -+ u32 start_th = 0; -+ -+ if (dig_t->tdma_dig_state == 1) -+ phydm_false_alarm_counter_reset(dm); -+ /* Reset FalseAlarmCounterStatistics */ -+ /* @fa_acc_1sec_tsf = fa_acc_1sec_tsf, keep */ -+ /* @fa_end_tsf = fa_start_tsf = TSF */ -+ else { -+ phydm_false_alarm_counter_statistics(dm); -+ if (dm->support_ic_type & ODM_RTL8197F) /*REG_FREERUN_CNT*/ -+ timestamp = odm_get_bb_reg(dm, R_0x568, bMaskDWord); -+ else { -+ PHYDM_DBG(dm, DBG_DIG, "NOT 97F! NOT start\n"); -+ return; -+ } -+ dig_t->fa_end_timestamp = timestamp; -+ dig_t->fa_acc_1sec_timestamp += -+ (dig_t->fa_end_timestamp - dig_t->fa_start_timestamp); -+ -+ /*prevent dumb*/ -+ if (dm->tdma_dig_state_number == 1) -+ dm->tdma_dig_state_number = 2; -+ -+ tdma_dig_state_number = dm->tdma_dig_state_number; -+ dig_t->sec_factor = -+ tdma_dig_state_number / (tdma_dig_state_number - 1); -+ -+ /*@1sec = 1000000us*/ -+ if (dig_t->sec_factor) -+ start_th = (u32)(1000000 / dig_t->sec_factor); -+ -+ if (dig_t->fa_acc_1sec_timestamp >= start_th) { -+ rssi_dump_en = 1; -+ phydm_false_alarm_counter_acc(dm, rssi_dump_en); -+ PHYDM_DBG(dm, DBG_DIG, -+ "sec_factor=%d, total FA=%d, is_linked=%d\n", -+ dig_t->sec_factor, falm_cnt_acc->cnt_all, -+ dm->is_linked); -+ -+ phydm_noisy_detection(dm); -+ #ifdef PHYDM_SUPPORT_CCKPD -+ phydm_cck_pd_th(dm); -+ #endif -+ phydm_dig(dm); -+ phydm_false_alarm_counter_acc_reset(dm); -+ -+ /* Reset FalseAlarmCounterStatistics */ -+ /* @fa_end_tsf = fa_start_tsf = TSF, keep */ -+ /* @fa_acc_1sec_tsf = 0 */ -+ phydm_false_alarm_counter_reset(dm); -+ } else { -+ phydm_false_alarm_counter_acc(dm, rssi_dump_en); -+ } -+ } -+} -+ -+void phydm_false_alarm_counter_acc(void *dm_void, boolean rssi_dump_en) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; -+ struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ falm_cnt_acc->cnt_parity_fail += falm_cnt->cnt_parity_fail; -+ falm_cnt_acc->cnt_rate_illegal += falm_cnt->cnt_rate_illegal; -+ falm_cnt_acc->cnt_crc8_fail += falm_cnt->cnt_crc8_fail; -+ falm_cnt_acc->cnt_mcs_fail += falm_cnt->cnt_mcs_fail; -+ falm_cnt_acc->cnt_ofdm_fail += falm_cnt->cnt_ofdm_fail; -+ falm_cnt_acc->cnt_cck_fail += falm_cnt->cnt_cck_fail; -+ falm_cnt_acc->cnt_all += falm_cnt->cnt_all; -+ falm_cnt_acc->cnt_fast_fsync += falm_cnt->cnt_fast_fsync; -+ falm_cnt_acc->cnt_sb_search_fail += falm_cnt->cnt_sb_search_fail; -+ falm_cnt_acc->cnt_ofdm_cca += falm_cnt->cnt_ofdm_cca; -+ falm_cnt_acc->cnt_cck_cca += falm_cnt->cnt_cck_cca; -+ falm_cnt_acc->cnt_cca_all += falm_cnt->cnt_cca_all; -+ falm_cnt_acc->cnt_cck_crc32_error += falm_cnt->cnt_cck_crc32_error; -+ falm_cnt_acc->cnt_cck_crc32_ok += falm_cnt->cnt_cck_crc32_ok; -+ falm_cnt_acc->cnt_ofdm_crc32_error += falm_cnt->cnt_ofdm_crc32_error; -+ falm_cnt_acc->cnt_ofdm_crc32_ok += falm_cnt->cnt_ofdm_crc32_ok; -+ falm_cnt_acc->cnt_ht_crc32_error += falm_cnt->cnt_ht_crc32_error; -+ falm_cnt_acc->cnt_ht_crc32_ok += falm_cnt->cnt_ht_crc32_ok; -+ falm_cnt_acc->cnt_vht_crc32_error += falm_cnt->cnt_vht_crc32_error; -+ falm_cnt_acc->cnt_vht_crc32_ok += falm_cnt->cnt_vht_crc32_ok; -+ falm_cnt_acc->cnt_crc32_error_all += falm_cnt->cnt_crc32_error_all; -+ falm_cnt_acc->cnt_crc32_ok_all += falm_cnt->cnt_crc32_ok_all; -+ -+ if (rssi_dump_en == 1) { -+ falm_cnt_acc->cnt_all_1sec = -+ falm_cnt_acc->cnt_all * dig_t->sec_factor; -+ falm_cnt_acc->cnt_cca_all_1sec = -+ falm_cnt_acc->cnt_cca_all * dig_t->sec_factor; -+ falm_cnt_acc->cnt_cck_fail_1sec = -+ falm_cnt_acc->cnt_cck_fail * dig_t->sec_factor; -+ } -+} -+ -+void phydm_false_alarm_counter_acc_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_acc_struct *falm_cnt_acc = NULL; -+ -+#ifdef IS_USE_NEW_TDMA -+ struct phydm_fa_acc_struct *falm_cnt_acc_low = NULL; -+ u32 tmp_cca_1sec = 0; -+ u32 tmp_fa_1sec = 0; -+ -+ /*@clear L-fa_acc struct*/ -+ falm_cnt_acc_low = &dm->false_alm_cnt_acc_low; -+ tmp_cca_1sec = falm_cnt_acc_low->cnt_cca_all_1sec; -+ tmp_fa_1sec = falm_cnt_acc_low->cnt_all_1sec; -+ odm_memory_set(dm, falm_cnt_acc_low, 0, sizeof(dm->false_alm_cnt_acc)); -+ falm_cnt_acc_low->cnt_cca_all_1sec = tmp_cca_1sec; -+ falm_cnt_acc_low->cnt_all_1sec = tmp_fa_1sec; -+ -+ /*@clear H-fa_acc struct*/ -+ falm_cnt_acc = &dm->false_alm_cnt_acc; -+ tmp_cca_1sec = falm_cnt_acc->cnt_cca_all_1sec; -+ tmp_fa_1sec = falm_cnt_acc->cnt_all_1sec; -+ odm_memory_set(dm, falm_cnt_acc, 0, sizeof(dm->false_alm_cnt_acc)); -+ falm_cnt_acc->cnt_cca_all_1sec = tmp_cca_1sec; -+ falm_cnt_acc->cnt_all_1sec = tmp_fa_1sec; -+#else -+ falm_cnt_acc = &dm->false_alm_cnt_acc; -+ /* @Cnt_all_for_rssi_dump & Cnt_CCA_all_for_rssi_dump */ -+ /* @do NOT need to be reset */ -+ odm_memory_set(dm, falm_cnt_acc, 0, sizeof(falm_cnt_acc)); -+#endif -+} -+ -+void phydm_false_alarm_counter_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *falm_cnt; -+ struct phydm_dig_struct *dig_t; -+ u32 timestamp; -+ -+ falm_cnt = &dm->false_alm_cnt; -+ dig_t = &dm->dm_dig_table; -+ -+ memset(falm_cnt, 0, sizeof(dm->false_alm_cnt)); -+ phydm_false_alarm_counter_reg_reset(dm); -+ -+#ifdef IS_USE_NEW_TDMA -+ return; -+#endif -+ if (dig_t->tdma_dig_state != 1) -+ dig_t->fa_acc_1sec_timestamp = 0; -+ else -+ dig_t->fa_acc_1sec_timestamp = dig_t->fa_acc_1sec_timestamp; -+ -+ /*REG_FREERUN_CNT*/ -+ timestamp = odm_get_bb_reg(dm, R_0x568, bMaskDWord); -+ dig_t->fa_start_timestamp = timestamp; -+ dig_t->fa_end_timestamp = timestamp; -+} -+ -+void phydm_tdma_dig_para_upd(void *dm_void, enum upd_type type, u8 input) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ switch (type) { -+ case ENABLE_TDMA: -+ dm->original_dig_restore = !((boolean)input); -+ break; -+ case MODE_DECISION: -+ if (input == (u8)MODE_PERFORMANCE) -+ dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES + 2; -+ else if (input == (u8)MODE_COVERAGE) -+ dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES; -+ else -+ dm->tdma_dig_state_number = DIG_NUM_OF_TDMA_STATES; -+ break; -+ } -+} -+ -+#ifdef IS_USE_NEW_TDMA -+#if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) -+static void pre_phydm_tdma_dig_cbk(unsigned long task_dm) -+{ -+ struct dm_struct *dm = (struct dm_struct *)task_dm; -+ struct rtl8192cd_priv *priv = dm->priv; -+ struct priv_shared_info *pshare = priv->pshare; -+ -+ if (!(priv->drv_state & DRV_STATE_OPEN)) -+ return; -+ -+ if (pshare->bDriverStopped || pshare->bSurpriseRemoved) { -+ printk("[%s] bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", -+ __FUNCTION__, pshare->bDriverStopped, -+ pshare->bSurpriseRemoved); -+ return; -+ } -+ -+ rtw_enqueue_timer_event(priv, &pshare->tdma_dig_event, -+ ENQUEUE_TO_TAIL); -+} -+ -+void phydm_tdma_dig_timers_usb(void *dm_void, u8 state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ if (state == INIT_TDMA_DIG_TIMMER) { -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+ init_timer(&dm->tdma_dig_timer); -+ dm->tdma_dig_timer.data = (unsigned long)dm; -+ dm->tdma_dig_timer.function = pre_phydm_tdma_dig_cbk; -+ INIT_TIMER_EVENT_ENTRY(&priv->pshare->tdma_dig_event, -+ phydm_tdma_dig_cbk, -+ (unsigned long)dm); -+ } else if (state == CANCEL_TDMA_DIG_TIMMER) { -+ odm_cancel_timer(dm, &dm->tdma_dig_timer); -+ } else if (state == RELEASE_TDMA_DIG_TIMMER) { -+ odm_release_timer(dm, &dm->tdma_dig_timer); -+ } -+} -+#endif /* defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) */ -+ -+void phydm_tdma_dig_timers(void *dm_void, u8 state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+#if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+ if (priv->hci_type == RTL_HCI_USB) { -+ phydm_tdma_dig_timers_usb(dm_void, state); -+ return; -+ } -+#endif /* defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) */ -+ -+ if (state == INIT_TDMA_DIG_TIMMER) -+ odm_initialize_timer(dm, &dm->tdma_dig_timer, -+ (void *)phydm_tdma_dig_cbk, -+ NULL, "phydm_tdma_dig_timer"); -+ else if (state == CANCEL_TDMA_DIG_TIMMER) -+ odm_cancel_timer(dm, &dm->tdma_dig_timer); -+ else if (state == RELEASE_TDMA_DIG_TIMMER) -+ odm_release_timer(dm, &dm->tdma_dig_timer); -+} -+ -+u8 get_new_igi_bound(struct dm_struct *dm, u8 igi, u32 fa_cnt, u8 *rx_gain_max, -+ u8 *rx_gain_min, boolean is_dfs_band) -+{ -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ u8 step[3] = {0}; -+ u8 cur_igi = igi; -+ -+ if (dm->is_linked) { -+ if (dm->pre_rssi_min <= dm->rssi_min) { -+ PHYDM_DBG(dm, DBG_DIG, "pre_rssi_min <= rssi_min\n"); -+ step[0] = 2; -+ step[1] = 1; -+ step[2] = 2; -+ } else { -+ step[0] = 4; -+ step[1] = 2; -+ step[2] = 2; -+ } -+ } else { -+ step[0] = 2; -+ step[1] = 1; -+ step[2] = 2; -+ } -+ -+ PHYDM_DBG(dm, DBG_DIG, "step = {-%d, +%d, +%d}\n", step[2], step[1], -+ step[0]); -+ -+ if (dm->first_connect) { -+ if (is_dfs_band) { -+ if (dm->rssi_min > DIG_MAX_DFS) -+ igi = DIG_MAX_DFS; -+ else -+ igi = dm->rssi_min; -+ PHYDM_DBG(dm, DBG_DIG, "DFS band:IgiMax=0x%x\n", -+ *rx_gain_max); -+ } else { -+ igi = *rx_gain_min; -+ } -+ -+ #if 0 -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ #if (RTL8812A_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8812) -+ odm_config_bb_with_header_file(dm, -+ CONFIG_BB_AGC_TAB_DIFF); -+ #endif -+ #endif -+ #endif -+ PHYDM_DBG(dm, DBG_DIG, "First connect: foce IGI=0x%x\n", igi); -+ } else { -+ /* @2 Before link */ -+ PHYDM_DBG(dm, DBG_DIG, "Adjust IGI before link\n"); -+ -+ if (dm->first_disconnect) { -+ igi = dig_t->dm_dig_min; -+ PHYDM_DBG(dm, DBG_DIG, -+ "First disconnect:foce IGI to lower bound\n"); -+ } else { -+ PHYDM_DBG(dm, DBG_DIG, "Pre_IGI=((0x%x)), FA=((%d))\n", -+ igi, fa_cnt); -+ -+ igi = phydm_new_igi_by_fa(dm, igi, fa_cnt, step); -+ } -+ } -+ /*@Check IGI by dyn-upper/lower bound */ -+ if (igi < *rx_gain_min) -+ igi = *rx_gain_min; -+ -+ if (igi > *rx_gain_max) -+ igi = *rx_gain_max; -+ -+ PHYDM_DBG(dm, DBG_DIG, "fa_cnt = %d, IGI: 0x%x -> 0x%x\n", -+ fa_cnt, cur_igi, igi); -+ -+ return igi; -+} -+ -+void phydm_write_tdma_dig(void *dm_void, u8 new_igi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_adaptivity_struct *adaptivity = &dm->adaptivity; -+ -+ PHYDM_DBG(dm, DBG_DIG, "%s===>\n", __func__); -+#if 0 -+ /* @1 Check IGI by upper bound */ -+ if (adaptivity->igi_lmt_en && -+ new_igi > adaptivity->adapt_igi_up && dm->is_linked) { -+ new_igi = adaptivity->adapt_igi_up; -+ -+ PHYDM_DBG(dm, DBG_DIG, "Force Adaptivity Up-bound=((0x%x))\n", -+ new_igi); -+ } -+#endif -+ phydm_write_dig_reg(dm, new_igi); -+ -+ PHYDM_DBG(dm, DBG_DIG, "New %s-IGI=((0x%x))\n", -+ (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE) ? "L" : "H", -+ new_igi); -+} -+ -+void phydm_tdma_dig_new(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ if (phydm_dig_abort(dm) || dm->original_dig_restore) -+ return; -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG, "timer callback =======> tdma_dig_state=%d\n"); -+ * dig_t->tdma_dig_state); -+ *PHYDM_DBG(dm, DBG_DIG, "tdma_h_igi=0x%x, tdma_l_igi=0x%x\n", -+ * dig_t->cur_ig_value_tdma, -+ * dig_t->low_ig_value); -+ */ -+ phydm_tdma_fa_cnt_chk(dm); -+ -+ /*@prevent dumb*/ -+ if (dm->tdma_dig_state_number < 2) -+ dm->tdma_dig_state_number = 2; -+ -+ /*@update state*/ -+ dig_t->tdma_dig_cnt++; -+ dig_t->tdma_dig_state = dig_t->tdma_dig_cnt % dm->tdma_dig_state_number; -+ -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG, "enter state %d, dig count %d\n", -+ * dig_t->tdma_dig_state, dig_t->tdma_dig_cnt); -+ */ -+ -+ if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE) -+ odm_write_dig(dm, dig_t->low_ig_value); -+ else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE) -+ odm_write_dig(dm, dig_t->cur_ig_value_tdma); -+ -+ odm_set_timer(dm, &dm->tdma_dig_timer, dm->tdma_dig_timer_ms); -+} -+ -+/*@callback function triggered by SW timer*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phydm_tdma_dig_cbk(struct phydm_timer_list *timer) -+{ -+ void *adapter = (void *)timer->Adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrcs; -+ -+ #if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ #if USE_WORKITEM -+ odm_schedule_work_item(&dm->phydm_tdma_dig_workitem); -+ #else -+ phydm_tdma_dig_new(dm); -+ #endif -+ #else -+ odm_schedule_work_item(&dm->phydm_tdma_dig_workitem); -+ #endif -+} -+ -+void phydm_tdma_dig_workitem_callback(void *context) -+{ -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+ phydm_tdma_dig_new(dm); -+} -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+void phydm_tdma_dig_cbk(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *padapter = dm->adapter; -+ -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ phydm_tdma_dig_workitem_callback(dm); -+ /* @Can't do I/O in timer callback*/ -+ else -+ phydm_run_in_thread_cmd(dm, phydm_tdma_dig_workitem_callback, -+ dm); -+} -+ -+void phydm_tdma_dig_workitem_callback(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ if (phydm_dig_abort(dm) || (dm->original_dig_restore)) -+ return; -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG, "timer callback =======> tdma_dig_state=%d\n"); -+ * dig_t->tdma_dig_state); -+ *PHYDM_DBG(dm, DBG_DIG, "tdma_h_igi=0x%x, tdma_l_igi=0x%x\n", -+ * dig_t->cur_ig_value_tdma, -+ * dig_t->low_ig_value); -+ */ -+ phydm_tdma_fa_cnt_chk(dm); -+ -+ /*@prevent dumb*/ -+ if (dm->tdma_dig_state_number < 2) -+ dm->tdma_dig_state_number = 2; -+ -+ /*@update state*/ -+ dig_t->tdma_dig_cnt++; -+ dig_t->tdma_dig_state = dig_t->tdma_dig_cnt % dm->tdma_dig_state_number; -+ -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG, "enter state %d, dig count %d\n", -+ * dig_t->tdma_dig_state, dig_t->tdma_dig_cnt); -+ */ -+ -+ if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE) -+ odm_write_dig(dm, dig_t->low_ig_value); -+ else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE) -+ odm_write_dig(dm, dig_t->cur_ig_value_tdma); -+ -+ odm_set_timer(dm, &dm->tdma_dig_timer, dm->tdma_dig_timer_ms); -+} -+#else -+void phydm_tdma_dig_cbk(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ -+ if (phydm_dig_abort(dm) || dm->original_dig_restore) -+ return; -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG, "timer callback =======> tdma_dig_state=%d\n"); -+ * dig_t->tdma_dig_state); -+ *PHYDM_DBG(dm, DBG_DIG, "tdma_h_igi=0x%x, tdma_l_igi=0x%x\n", -+ * dig_t->cur_ig_value_tdma, -+ * dig_t->low_ig_value); -+ */ -+ phydm_tdma_fa_cnt_chk(dm); -+ -+ /*@prevent dumb*/ -+ if (dm->tdma_dig_state_number < 2) -+ dm->tdma_dig_state_number = 2; -+ -+ /*@update state*/ -+ dig_t->tdma_dig_cnt++; -+ dig_t->tdma_dig_state = dig_t->tdma_dig_cnt % dm->tdma_dig_state_number; -+ -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG, "enter state %d, dig count %d\n", -+ * dig_t->tdma_dig_state, dig_t->tdma_dig_cnt); -+ */ -+ -+ if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE) -+ phydm_write_tdma_dig(dm, dig_t->low_ig_value); -+ else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE) -+ phydm_write_tdma_dig(dm, dig_t->cur_ig_value_tdma); -+ -+ odm_set_timer(dm, &dm->tdma_dig_timer, dm->tdma_dig_timer_ms); -+} -+#endif -+/*@============================================================*/ -+/*@FASLE ALARM CHECK*/ -+/*@============================================================*/ -+void phydm_tdma_fa_cnt_chk(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; -+ struct phydm_fa_acc_struct *fa_t_acc = &dm->false_alm_cnt_acc; -+ struct phydm_fa_acc_struct *fa_t_acc_low = &dm->false_alm_cnt_acc_low; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ boolean tdma_dig_block_1sec_flag = false; -+ u32 timestamp = 0; -+ u8 states_per_block = dm->tdma_dig_state_number; -+ u8 cur_tdma_dig_state = 0; -+ u32 start_th = 0; -+ u8 state_diff = 0; -+ u32 tdma_dig_block_period_ms = 0; -+ u32 tdma_dig_block_cnt_thd = 0; -+ u32 timestamp_diff = 0; -+ -+ /*@calculate duration of a tdma block*/ -+ tdma_dig_block_period_ms = dm->tdma_dig_timer_ms * states_per_block; -+ -+ /*@ -+ *caution!ONE_SEC_MS must be divisible by tdma_dig_block_period_ms, -+ *or FA will be fewer. -+ */ -+ tdma_dig_block_cnt_thd = ONE_SEC_MS / tdma_dig_block_period_ms; -+ -+ /*@tdma_dig_state == 0, collect H-state FA, else, collect L-state FA*/ -+ if (dig_t->tdma_dig_state == TDMA_DIG_LOW_STATE) -+ cur_tdma_dig_state = TDMA_DIG_LOW_STATE; -+ else if (dig_t->tdma_dig_state >= TDMA_DIG_HIGH_STATE) -+ cur_tdma_dig_state = TDMA_DIG_HIGH_STATE; -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG, "in state %d, dig count %d\n", -+ * cur_tdma_dig_state, dig_t->tdma_dig_cnt); -+ */ -+ if (cur_tdma_dig_state == 0) { -+ /*@L-state indicates next block*/ -+ dig_t->tdma_dig_block_cnt++; -+ -+ /*@1sec dump check*/ -+ if (dig_t->tdma_dig_block_cnt >= tdma_dig_block_cnt_thd) -+ tdma_dig_block_1sec_flag = true; -+ -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG,"[L-state] tdma_dig_block_cnt=%d\n", -+ * dig_t->tdma_dig_block_cnt); -+ */ -+ -+ /*@collect FA till this block end*/ -+ phydm_false_alarm_counter_statistics(dm); -+ phydm_fa_cnt_acc(dm, tdma_dig_block_1sec_flag, -+ cur_tdma_dig_state); -+ /*@1s L-FA collect end*/ -+ -+ /*@1sec dump reached*/ -+ if (tdma_dig_block_1sec_flag) { -+ /*@L-DIG*/ -+ phydm_noisy_detection(dm); -+ #ifdef PHYDM_SUPPORT_CCKPD -+ phydm_cck_pd_th(dm); -+ #endif -+ PHYDM_DBG(dm, DBG_DIG, "run tdma L-state dig ====>\n"); -+ phydm_tdma_low_dig(dm); -+ PHYDM_DBG(dm, DBG_DIG, "\n\n"); -+ } -+ } else if (cur_tdma_dig_state == 1) { -+ /*@1sec dump check*/ -+ if (dig_t->tdma_dig_block_cnt >= tdma_dig_block_cnt_thd) -+ tdma_dig_block_1sec_flag = true; -+ -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG,"[H-state] tdma_dig_block_cnt=%d\n", -+ * dig_t->tdma_dig_block_cnt); -+ */ -+ -+ /*@collect FA till this block end*/ -+ phydm_false_alarm_counter_statistics(dm); -+ phydm_fa_cnt_acc(dm, tdma_dig_block_1sec_flag, -+ cur_tdma_dig_state); -+ /*@1s H-FA collect end*/ -+ -+ /*@1sec dump reached*/ -+ state_diff = dm->tdma_dig_state_number - dig_t->tdma_dig_state; -+ if (tdma_dig_block_1sec_flag && state_diff == 1) { -+ /*@H-DIG*/ -+ phydm_noisy_detection(dm); -+ #ifdef PHYDM_SUPPORT_CCKPD -+ phydm_cck_pd_th(dm); -+ #endif -+ PHYDM_DBG(dm, DBG_DIG, "run tdma H-state dig ====>\n"); -+ phydm_tdma_high_dig(dm); -+ PHYDM_DBG(dm, DBG_DIG, "\n\n"); -+ PHYDM_DBG(dm, DBG_DIG, "1 sec reached, is_linked=%d\n", -+ dm->is_linked); -+ PHYDM_DBG(dm, DBG_DIG, "1 sec L-CCA=%d, L-FA=%d\n", -+ fa_t_acc_low->cnt_cca_all_1sec, -+ fa_t_acc_low->cnt_all_1sec); -+ PHYDM_DBG(dm, DBG_DIG, "1 sec H-CCA=%d, H-FA=%d\n", -+ fa_t_acc->cnt_cca_all_1sec, -+ fa_t_acc->cnt_all_1sec); -+ PHYDM_DBG(dm, DBG_DIG, -+ "1 sec TOTAL-CCA=%d, TOTAL-FA=%d\n\n", -+ fa_t_acc->cnt_cca_all + -+ fa_t_acc_low->cnt_cca_all, -+ fa_t_acc->cnt_all + fa_t_acc_low->cnt_all); -+ -+ /*@Reset AccFalseAlarmCounterStatistics */ -+ phydm_false_alarm_counter_acc_reset(dm); -+ dig_t->tdma_dig_block_cnt = 0; -+ } -+ } -+ /*@Reset FalseAlarmCounterStatistics */ -+ phydm_false_alarm_counter_reset(dm); -+} -+ -+void phydm_tdma_low_dig(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; -+ struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc_low; -+#ifdef CFG_DIG_DAMPING_CHK -+ struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; -+#endif -+ u8 igi = dig_t->cur_ig_value; -+ u8 new_igi = 0x20; -+ u8 tdma_l_igi = dig_t->low_ig_value; -+ u8 tdma_l_dym_min = dig_t->tdma_rx_gain_min[TDMA_DIG_LOW_STATE]; -+ u8 tdma_l_dym_max = dig_t->tdma_rx_gain_max[TDMA_DIG_LOW_STATE]; -+ u32 fa_cnt = falm_cnt->cnt_all; -+ boolean dfs_mode_en = false, is_performance = true; -+ u8 rssi_min = dm->rssi_min; -+ u8 igi_upper_rssi_min = 0; -+ u8 offset = 15; -+ -+ if (!(dm->original_dig_restore)) { -+ if (tdma_l_igi == 0) -+ tdma_l_igi = igi; -+ -+ fa_cnt = falm_cnt_acc->cnt_all_1sec; -+ } -+ -+ if (phydm_dig_abort(dm)) { -+ dig_t->low_ig_value = phydm_get_igi(dm, BB_PATH_A); -+ return; -+ } -+ -+ /*@Mode Decision*/ -+ dfs_mode_en = false; -+ is_performance = true; -+ -+ /* @Abs Boundary Decision*/ -+ dig_t->dm_dig_max = DIG_MAX_COVERAGR; //0x26 -+ dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; //0x20 -+ dig_t->dig_max_of_min = DIG_MAX_OF_MIN_COVERAGE; //0x22 -+ -+ if (dm->is_dfs_band) { -+ if (*dm->band_width == CHANNEL_WIDTH_20){ -+ if (dm->support_ic_type & -+ (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B)){ -+ if (odm_get_bb_reg(dm, R_0x8d8, BIT(27)) == 1) -+ dig_t->dm_dig_min = DIG_MIN_DFS + 2; -+ else -+ dig_t->dm_dig_min = DIG_MIN_DFS; -+ } -+ else -+ dig_t->dm_dig_min = DIG_MIN_DFS; -+ } -+ else -+ dig_t->dm_dig_min = DIG_MIN_DFS; -+ -+ } else { -+ #if 0 -+ if (dm->support_ic_type & -+ (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B)) -+ dig_t->dm_dig_min = 0x1c; -+ else if (dm->support_ic_type & ODM_RTL8197F) -+ dig_t->dm_dig_min = 0x1e; /*@For HW setting*/ -+ #endif -+ } -+ -+ PHYDM_DBG(dm, DBG_DIG, "Abs{Max, Min}={0x%x, 0x%x}, Max_of_min=0x%x\n", -+ dig_t->dm_dig_max, dig_t->dm_dig_min, dig_t->dig_max_of_min); -+ -+ /* @Dyn Boundary by RSSI*/ -+ if (!dm->is_linked) { -+ /*@if no link, always stay at lower bound*/ -+ tdma_l_dym_max = 0x26; -+ tdma_l_dym_min = dig_t->dm_dig_min; -+ -+ PHYDM_DBG(dm, DBG_DIG, "No-Link, Dyn{Max, Min}={0x%x, 0x%x}\n", -+ tdma_l_dym_max, tdma_l_dym_min); -+ } else { -+ PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, ofst=%d\n", -+ dm->rssi_min, offset); -+ -+ /* @DIG lower bound in L-state*/ -+ tdma_l_dym_min = dig_t->dm_dig_min; -+ if (dm->is_dfs_band) -+ tdma_l_dym_min = DIG_MIN_DFS; -+ /*@ -+ *#ifdef CFG_DIG_DAMPING_CHK -+ *@Limit Dyn min by damping -+ *if (dig_t->dig_dl_en && -+ * dig_rc->damping_limit_en && -+ * tdma_l_dym_min < dig_rc->damping_limit_val) { -+ * PHYDM_DBG(dm, DBG_DIG, -+ * "[Limit by Damping] dyn_min=0x%x -> 0x%x\n", -+ * tdma_l_dym_min, dig_rc->damping_limit_val); -+ * -+ * tdma_l_dym_min = dig_rc->damping_limit_val; -+ *} -+ *#endif -+ */ -+ -+ /*@DIG upper bound in L-state*/ -+ igi_upper_rssi_min = rssi_min + offset; -+ if (igi_upper_rssi_min > dig_t->dm_dig_max) -+ tdma_l_dym_max = dig_t->dm_dig_max; -+ else if (igi_upper_rssi_min < dig_t->dm_dig_min) -+ tdma_l_dym_max = dig_t->dm_dig_min; -+ else -+ tdma_l_dym_max = igi_upper_rssi_min; -+ -+ /* @1 Force Lower Bound for AntDiv */ -+ /*@ -+ *if (!dm->is_one_entry_only && -+ *(dm->support_ability & ODM_BB_ANT_DIV) && -+ *(dm->ant_div_type == CG_TRX_HW_ANTDIV || -+ *dm->ant_div_type == CG_TRX_SMART_ANTDIV)) { -+ *if (dig_t->ant_div_rssi_max > dig_t->dig_max_of_min) -+ * dig_t->rx_gain_range_min = dig_t->dig_max_of_min; -+ *else -+ * dig_t->rx_gain_range_min = (u8)dig_t->ant_div_rssi_max; -+ * -+ *PHYDM_DBG(dm, DBG_DIG, "Force Dyn-Min=0x%x, RSSI_max=0x%x\n", -+ * dig_t->rx_gain_range_min, dig_t->ant_div_rssi_max); -+ *} -+ */ -+ -+ PHYDM_DBG(dm, DBG_DIG, "Dyn{Max, Min}={0x%x, 0x%x}\n", -+ tdma_l_dym_max, tdma_l_dym_min); -+ } -+ -+ /*@Abnormal Case Check*/ -+ /*@Abnormal lower bound case*/ -+ if (tdma_l_dym_min > tdma_l_dym_max) -+ tdma_l_dym_min = tdma_l_dym_max; -+ -+ PHYDM_DBG(dm, DBG_DIG, -+ "Abnoraml chk, force {Max, Min}={0x%x, 0x%x}\n", -+ tdma_l_dym_max, tdma_l_dym_min); -+ -+ /*@False Alarm Threshold Decision*/ -+ phydm_fa_threshold_check(dm, dfs_mode_en); -+ -+ /*@Adjust Initial Gain by False Alarm*/ -+ /*Select new IGI by FA */ -+ if (!(dm->original_dig_restore)) { -+ tdma_l_igi = get_new_igi_bound(dm, tdma_l_igi, fa_cnt, -+ &tdma_l_dym_max, -+ &tdma_l_dym_min, -+ dfs_mode_en); -+ } else { -+ new_igi = phydm_get_new_igi(dm, igi, fa_cnt, dfs_mode_en); -+ } -+ -+ /*Update status*/ -+ if (!(dm->original_dig_restore)) { -+ if (dig_t->tdma_force_l_igi == 0xff) -+ dig_t->low_ig_value = tdma_l_igi; -+ else -+ dig_t->low_ig_value = dig_t->tdma_force_l_igi; -+ dig_t->tdma_rx_gain_min[TDMA_DIG_LOW_STATE] = tdma_l_dym_min; -+ dig_t->tdma_rx_gain_max[TDMA_DIG_LOW_STATE] = tdma_l_dym_max; -+#if 0 -+ /*odm_write_dig(dm, tdma_l_igi);*/ -+#endif -+ } else { -+ odm_write_dig(dm, new_igi); -+ } -+} -+ -+void phydm_tdma_high_dig(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; -+ struct phydm_fa_acc_struct *falm_cnt_acc = &dm->false_alm_cnt_acc; -+#ifdef CFG_DIG_DAMPING_CHK -+ struct phydm_dig_recorder_strcut *dig_rc = &dig_t->dig_recorder_t; -+#endif -+ u8 igi = dig_t->cur_ig_value; -+ u8 new_igi = 0x20; -+ u8 tdma_h_igi = dig_t->cur_ig_value_tdma; -+ u8 tdma_h_dym_min = dig_t->tdma_rx_gain_min[TDMA_DIG_HIGH_STATE]; -+ u8 tdma_h_dym_max = dig_t->tdma_rx_gain_max[TDMA_DIG_HIGH_STATE]; -+ u32 fa_cnt = falm_cnt->cnt_all; -+ boolean dfs_mode_en = false, is_performance = true; -+ u8 rssi_min = dm->rssi_min; -+ u8 igi_upper_rssi_min = 0; -+ u8 offset = 15; -+ -+ if (!(dm->original_dig_restore)) { -+ if (tdma_h_igi == 0) -+ tdma_h_igi = igi; -+ -+ fa_cnt = falm_cnt_acc->cnt_all_1sec; -+ } -+ -+ if (phydm_dig_abort(dm)) { -+ dig_t->cur_ig_value_tdma = phydm_get_igi(dm, BB_PATH_A); -+ return; -+ } -+ -+ /*@Mode Decision*/ -+ dfs_mode_en = false; -+ is_performance = true; -+ -+ /*@Abs Boundary Decision*/ -+ dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; // 0x2a -+ -+ if (!dm->is_linked) { -+ dig_t->dm_dig_max = DIG_MAX_COVERAGR; -+ dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; // 0x20 -+ } else if (dm->is_dfs_band) { -+ if (*dm->band_width == CHANNEL_WIDTH_20){ -+ if (dm->support_ic_type & -+ (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B)){ -+ if (odm_get_bb_reg(dm, R_0x8d8, BIT(27)) == 1) -+ dig_t->dm_dig_min = DIG_MIN_DFS + 2; -+ else -+ dig_t->dm_dig_min = DIG_MIN_DFS; -+ } -+ else -+ dig_t->dm_dig_min = DIG_MIN_DFS; -+ } -+ else -+ dig_t->dm_dig_min = DIG_MIN_DFS; -+ -+ dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; -+ dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE; -+ } else { -+ if (*dm->bb_op_mode == PHYDM_BALANCE_MODE) { -+ /*service > 2 devices*/ -+ dig_t->dm_dig_max = DIG_MAX_BALANCE_MODE; -+ #if (DIG_HW == 1) -+ dig_t->dig_max_of_min = DIG_MIN_COVERAGE; -+ #else -+ dig_t->dig_max_of_min = DIG_MAX_OF_MIN_BALANCE_MODE; -+ #endif -+ } else if (*dm->bb_op_mode == PHYDM_PERFORMANCE_MODE) { -+ /*service 1 devices*/ -+ dig_t->dm_dig_max = DIG_MAX_PERFORMANCE_MODE; -+ dig_t->dig_max_of_min = DIG_MAX_OF_MIN_PERFORMANCE_MODE; -+ } -+ -+ #if 0 -+ if (dm->support_ic_type & -+ (ODM_RTL8814A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8822B)) -+ dig_t->dm_dig_min = 0x1c; -+ else if (dm->support_ic_type & ODM_RTL8197F) -+ dig_t->dm_dig_min = 0x1e; /*@For HW setting*/ -+ else -+ #endif -+ dig_t->dm_dig_min = DIG_MIN_PERFORMANCE; -+ } -+ PHYDM_DBG(dm, DBG_DIG, "Abs{Max, Min}={0x%x, 0x%x}, Max_of_min=0x%x\n", -+ dig_t->dm_dig_max, dig_t->dm_dig_min, dig_t->dig_max_of_min); -+ -+ /*@Dyn Boundary by RSSI*/ -+ if (!dm->is_linked) { -+ /*@if no link, always stay at lower bound*/ -+ tdma_h_dym_max = dig_t->dig_max_of_min; -+ tdma_h_dym_min = dig_t->dm_dig_min; -+ -+ PHYDM_DBG(dm, DBG_DIG, "No-Link, Dyn{Max, Min}={0x%x, 0x%x}\n", -+ tdma_h_dym_max, tdma_h_dym_min); -+ } else { -+ PHYDM_DBG(dm, DBG_DIG, "rssi_min=%d, ofst=%d\n", -+ dm->rssi_min, offset); -+ -+ /* @DIG lower bound in H-state*/ -+ if (dm->is_dfs_band) -+ tdma_h_dym_min = DIG_MIN_DFS; -+ else if (rssi_min < dig_t->dm_dig_min) -+ tdma_h_dym_min = dig_t->dm_dig_min; -+ else -+ tdma_h_dym_min = rssi_min; // turbo not considered yet -+ -+#ifdef CFG_DIG_DAMPING_CHK -+ /*@Limit Dyn min by damping*/ -+ if (dig_t->dig_dl_en && -+ dig_rc->damping_limit_en && -+ tdma_h_dym_min < dig_rc->damping_limit_val) { -+ PHYDM_DBG(dm, DBG_DIG, -+ "[Limit by Damping] dyn_min=0x%x -> 0x%x\n", -+ tdma_h_dym_min, dig_rc->damping_limit_val); -+ -+ tdma_h_dym_min = dig_rc->damping_limit_val; -+ } -+#endif -+ -+ /*@DIG upper bound in H-state*/ -+ igi_upper_rssi_min = rssi_min + offset; -+ if (igi_upper_rssi_min > dig_t->dm_dig_max) -+ tdma_h_dym_max = dig_t->dm_dig_max; -+ else -+ tdma_h_dym_max = igi_upper_rssi_min; -+ -+ /* @1 Force Lower Bound for AntDiv */ -+ /*@ -+ *if (!dm->is_one_entry_only && -+ *(dm->support_ability & ODM_BB_ANT_DIV) && -+ *(dm->ant_div_type == CG_TRX_HW_ANTDIV || -+ *dm->ant_div_type == CG_TRX_SMART_ANTDIV)) { -+ * if (dig_t->ant_div_rssi_max > dig_t->dig_max_of_min) -+ * dig_t->rx_gain_range_min = dig_t->dig_max_of_min; -+ * else -+ * dig_t->rx_gain_range_min = (u8)dig_t->ant_div_rssi_max; -+ */ -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG, "Force Dyn-Min=0x%x, RSSI_max=0x%x\n", -+ * dig_t->rx_gain_range_min, dig_t->ant_div_rssi_max); -+ *} -+ */ -+ PHYDM_DBG(dm, DBG_DIG, "Dyn{Max, Min}={0x%x, 0x%x}\n", -+ tdma_h_dym_max, tdma_h_dym_min); -+ } -+ -+ /*@Abnormal Case Check*/ -+ /*@Abnormal low higher bound case*/ -+ if (tdma_h_dym_max < dig_t->dm_dig_min) -+ tdma_h_dym_max = dig_t->dm_dig_min; -+ /*@Abnormal lower bound case*/ -+ if (tdma_h_dym_min > tdma_h_dym_max) -+ tdma_h_dym_min = tdma_h_dym_max; -+ -+ PHYDM_DBG(dm, DBG_DIG, "Abnoraml chk, force {Max, Min}={0x%x, 0x%x}\n", -+ tdma_h_dym_max, tdma_h_dym_min); -+ -+ /*@False Alarm Threshold Decision*/ -+ phydm_fa_threshold_check(dm, dfs_mode_en); -+ -+ /*@Adjust Initial Gain by False Alarm*/ -+ /*Select new IGI by FA */ -+ if (!(dm->original_dig_restore)) { -+ tdma_h_igi = get_new_igi_bound(dm, tdma_h_igi, fa_cnt, -+ &tdma_h_dym_max, -+ &tdma_h_dym_min, -+ dfs_mode_en); -+ } else { -+ new_igi = phydm_get_new_igi(dm, igi, fa_cnt, dfs_mode_en); -+ } -+ -+ /*Update status*/ -+ if (!(dm->original_dig_restore)) { -+ if (dig_t->tdma_force_h_igi == 0xff) -+ dig_t->cur_ig_value_tdma = tdma_h_igi; -+ else -+ dig_t->cur_ig_value_tdma = dig_t->tdma_force_h_igi; -+ dig_t->tdma_rx_gain_min[TDMA_DIG_HIGH_STATE] = tdma_h_dym_min; -+ dig_t->tdma_rx_gain_max[TDMA_DIG_HIGH_STATE] = tdma_h_dym_max; -+#if 0 -+ /*odm_write_dig(dm, tdma_h_igi);*/ -+#endif -+ } else { -+ odm_write_dig(dm, new_igi); -+ } -+} -+ -+void phydm_fa_cnt_acc(void *dm_void, boolean tdma_dig_block_1sec_flag, -+ u8 cur_tdma_dig_state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fa_struct *falm_cnt = &dm->false_alm_cnt; -+ struct phydm_fa_acc_struct *falm_cnt_acc = NULL; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ u8 factor_num = 0; -+ u8 factor_denum = 1; -+ u8 total_state_number = 0; -+ -+ if (cur_tdma_dig_state == TDMA_DIG_LOW_STATE) -+ falm_cnt_acc = &dm->false_alm_cnt_acc_low; -+ else if (cur_tdma_dig_state == TDMA_DIG_HIGH_STATE) -+ -+ falm_cnt_acc = &dm->false_alm_cnt_acc; -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG, -+ * "[%s] ==> dig_state=%d, one_sec=%d\n", __func__, -+ * cur_tdma_dig_state, tdma_dig_block_1sec_flag); -+ */ -+ falm_cnt_acc->cnt_parity_fail += falm_cnt->cnt_parity_fail; -+ falm_cnt_acc->cnt_rate_illegal += falm_cnt->cnt_rate_illegal; -+ falm_cnt_acc->cnt_crc8_fail += falm_cnt->cnt_crc8_fail; -+ falm_cnt_acc->cnt_mcs_fail += falm_cnt->cnt_mcs_fail; -+ falm_cnt_acc->cnt_ofdm_fail += falm_cnt->cnt_ofdm_fail; -+ falm_cnt_acc->cnt_cck_fail += falm_cnt->cnt_cck_fail; -+ falm_cnt_acc->cnt_all += falm_cnt->cnt_all; -+ falm_cnt_acc->cnt_fast_fsync += falm_cnt->cnt_fast_fsync; -+ falm_cnt_acc->cnt_sb_search_fail += falm_cnt->cnt_sb_search_fail; -+ falm_cnt_acc->cnt_ofdm_cca += falm_cnt->cnt_ofdm_cca; -+ falm_cnt_acc->cnt_cck_cca += falm_cnt->cnt_cck_cca; -+ falm_cnt_acc->cnt_cca_all += falm_cnt->cnt_cca_all; -+ falm_cnt_acc->cnt_cck_crc32_error += falm_cnt->cnt_cck_crc32_error; -+ falm_cnt_acc->cnt_cck_crc32_ok += falm_cnt->cnt_cck_crc32_ok; -+ falm_cnt_acc->cnt_ofdm_crc32_error += falm_cnt->cnt_ofdm_crc32_error; -+ falm_cnt_acc->cnt_ofdm_crc32_ok += falm_cnt->cnt_ofdm_crc32_ok; -+ falm_cnt_acc->cnt_ht_crc32_error += falm_cnt->cnt_ht_crc32_error; -+ falm_cnt_acc->cnt_ht_crc32_ok += falm_cnt->cnt_ht_crc32_ok; -+ falm_cnt_acc->cnt_vht_crc32_error += falm_cnt->cnt_vht_crc32_error; -+ falm_cnt_acc->cnt_vht_crc32_ok += falm_cnt->cnt_vht_crc32_ok; -+ falm_cnt_acc->cnt_crc32_error_all += falm_cnt->cnt_crc32_error_all; -+ falm_cnt_acc->cnt_crc32_ok_all += falm_cnt->cnt_crc32_ok_all; -+ -+ /*@ -+ *PHYDM_DBG(dm, DBG_DIG, -+ * "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", -+ * falm_cnt->cnt_cck_cca, -+ * falm_cnt->cnt_ofdm_cca, -+ * falm_cnt->cnt_cca_all); -+ *PHYDM_DBG(dm, DBG_DIG, -+ * "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", -+ * falm_cnt->cnt_cck_fail, -+ * falm_cnt->cnt_ofdm_fail, -+ * falm_cnt->cnt_all); -+ */ -+ if (tdma_dig_block_1sec_flag) { -+ total_state_number = dm->tdma_dig_state_number; -+ -+ if (cur_tdma_dig_state == TDMA_DIG_HIGH_STATE) { -+ factor_num = total_state_number; -+ factor_denum = total_state_number - 1; -+ } else if (cur_tdma_dig_state == TDMA_DIG_LOW_STATE) { -+ factor_num = total_state_number; -+ factor_denum = 1; -+ } -+ -+ falm_cnt_acc->cnt_all_1sec = -+ falm_cnt_acc->cnt_all * factor_num / factor_denum; -+ falm_cnt_acc->cnt_cca_all_1sec = -+ falm_cnt_acc->cnt_cca_all * factor_num / factor_denum; -+ falm_cnt_acc->cnt_cck_fail_1sec = -+ falm_cnt_acc->cnt_cck_fail * factor_num / factor_denum; -+ -+ PHYDM_DBG(dm, DBG_DIG, -+ "[ACC CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n", -+ falm_cnt_acc->cnt_cck_cca, -+ falm_cnt_acc->cnt_ofdm_cca, -+ falm_cnt_acc->cnt_cca_all); -+ PHYDM_DBG(dm, DBG_DIG, -+ "[ACC FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n\n", -+ falm_cnt_acc->cnt_cck_fail, -+ falm_cnt_acc->cnt_ofdm_fail, -+ falm_cnt_acc->cnt_all); -+ -+ } -+} -+#endif /*@#ifdef IS_USE_NEW_TDMA*/ -+#endif /*@#ifdef PHYDM_TDMA_DIG_SUPPORT*/ -+ -+void phydm_dig_debug(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{0} {en} fa_th[0] fa_th[1] fa_th[2]\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{1} {Damping Limit en}\n"); -+ #ifdef PHYDM_TDMA_DIG_SUPPORT -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{2} {original_dig_restore = %d}\n", -+ dm->original_dig_restore); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{3} {tdma_dig_timer_ms = %d}\n", -+ dm->tdma_dig_timer_ms); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{4} {tdma_dig_state_number = %d}\n", -+ dm->tdma_dig_state_number); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{5} {0:L-state,1:H-state} {force IGI} (L,H)=(%2x,%2x)\n", -+ dig_t->tdma_force_l_igi, dig_t->tdma_force_h_igi); -+ #endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{6} {fw_dig_en}\n"); -+ } else { -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ for (i = 1; i < 10; i++) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ -+ if (var1[0] == 0) { -+ if (var1[1] == 1) { -+ dig_t->is_dbg_fa_th = true; -+ dig_t->fa_th[0] = (u16)var1[2]; -+ dig_t->fa_th[1] = (u16)var1[3]; -+ dig_t->fa_th[2] = (u16)var1[4]; -+ -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "Set DIG fa_th[0:2]= {%d, %d, %d}\n", -+ dig_t->fa_th[0], dig_t->fa_th[1], -+ dig_t->fa_th[2]); -+ } else { -+ dig_t->is_dbg_fa_th = false; -+ } -+ #ifdef PHYDM_TDMA_DIG_SUPPORT -+ } else if (var1[0] == 2) { -+ dm->original_dig_restore = (u8)var1[1]; -+ if (dm->original_dig_restore == 1) { -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "Disable TDMA-DIG\n"); -+ } else { -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "Enable TDMA-DIG\n"); -+ } -+ } else if (var1[0] == 3) { -+ dm->tdma_dig_timer_ms = (u8)var1[1]; -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "tdma_dig_timer_ms = %d\n", -+ dm->tdma_dig_timer_ms); -+ } else if (var1[0] == 4) { -+ dm->tdma_dig_state_number = (u8)var1[1]; -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, "tdma_dig_state_number = %d\n", -+ dm->tdma_dig_state_number); -+ } else if (var1[0] == 5) { -+ PHYDM_SSCANF(input[3], DCMD_HEX, &var1[2]); -+ if (var1[1] == 0) { -+ dig_t->tdma_force_l_igi = (u8)var1[2]; -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "force L-state IGI = %2x\n", -+ dig_t->tdma_force_l_igi); -+ } else if (var1[1] == 1) { -+ dig_t->tdma_force_h_igi = (u8)var1[2]; -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "force H-state IGI = %2x\n", -+ dig_t->tdma_force_h_igi); -+ } -+ #endif -+ } -+ -+ #ifdef CFG_DIG_DAMPING_CHK -+ else if (var1[0] == 1) { -+ dig_t->dig_dl_en = (u8)var1[1]; -+ /*@*/ -+ } -+ #endif -+ else if (var1[0] == 6) { -+ phydm_fw_dm_ctrl_en(dm, F00_DIG, (boolean)var1[1]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "fw_dig_enable = %2x\n", dig_t->fw_dig_enable); -+ } -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#ifdef CONFIG_MCC_DM -+#if (RTL8822B_SUPPORT || RTL8822C_SUPPORT|| RTL8723F_SUPPORT) -+void phydm_mcc_igi_clr(void *dm_void, u8 clr_port) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ -+ mcc_dm->mcc_rssi[clr_port] = 0xff; -+ mcc_dm->mcc_dm_val[0][clr_port] = 0xff; /* 0xc50 clr */ -+ mcc_dm->mcc_dm_val[1][clr_port] = 0xff; /* 0xe50 clr */ -+} -+ -+void phydm_mcc_igi_chk(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ -+ if (mcc_dm->mcc_dm_val[0][0] == 0xff && -+ mcc_dm->mcc_dm_val[0][1] == 0xff) { -+ mcc_dm->mcc_dm_reg[0] = 0xffff; -+ mcc_dm->mcc_reg_id[0] = 0xff; -+ } -+ if (mcc_dm->mcc_dm_val[1][0] == 0xff && -+ mcc_dm->mcc_dm_val[1][1] == 0xff) { -+ mcc_dm->mcc_dm_reg[1] = 0xffff; -+ mcc_dm->mcc_reg_id[1] = 0xff; -+ } -+} -+ -+void phydm_mcc_igi_cal(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _phydm_mcc_dm_ *mcc_dm = &dm->mcc_dm; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ u8 shift = 0; -+ u8 igi_val0, igi_val1; -+ -+ if (mcc_dm->mcc_rssi[0] == 0xff) -+ phydm_mcc_igi_clr(dm, 0); -+ if (mcc_dm->mcc_rssi[1] == 0xff) -+ phydm_mcc_igi_clr(dm, 1); -+ phydm_mcc_igi_chk(dm); -+ igi_val0 = mcc_dm->mcc_rssi[0] - shift; -+ igi_val1 = mcc_dm->mcc_rssi[1] - shift; -+ -+ if (igi_val0 < DIG_MIN_PERFORMANCE) -+ igi_val0 = DIG_MIN_PERFORMANCE; -+ -+ if (igi_val1 < DIG_MIN_PERFORMANCE) -+ igi_val1 = DIG_MIN_PERFORMANCE; -+ -+ switch (dm->ic_ip_series) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ case PHYDM_IC_JGR3: -+ phydm_fill_mcccmd(dm, 0, R_0x1d70, igi_val0, igi_val1); -+ phydm_fill_mcccmd(dm, 1, R_0x1d70 + 1, igi_val0, igi_val1); -+ break; -+ #endif -+ default: -+ phydm_fill_mcccmd(dm, 0, R_0xc50, igi_val0, igi_val1); -+ phydm_fill_mcccmd(dm, 1, R_0xe50, igi_val0, igi_val1); -+ break; -+ } -+ -+ PHYDM_DBG(dm, DBG_COMP_MCC, "RSSI_min: %d %d, MCC_igi: %d %d\n", -+ mcc_dm->mcc_rssi[0], mcc_dm->mcc_rssi[1], -+ mcc_dm->mcc_dm_val[0][0], mcc_dm->mcc_dm_val[0][1]); -+} -+#endif /*#if (RTL8822B_SUPPORT)*/ -+#endif /*#ifdef CONFIG_MCC_DM*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_dig.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_dig.h -new file mode 100644 -index 000000000000..9d5586fc48e9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_dig.h -@@ -0,0 +1,380 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMDIG_H__ -+#define __PHYDMDIG_H__ -+ -+/* 2019.10.25 remove redundant code*/ -+#define DIG_VERSION "3.7" -+ -+#define DIG_HW 0 -+#define DIG_LIMIT_PERIOD 60 /*60 sec*/ -+ -+/*@--------------------Define ---------------------------------------*/ -+ -+/*@=== [DIG Boundary] ========================================*/ -+/*@DIG coverage mode*/ -+#define DIG_MAX_COVERAGR 0x26 -+#define DIG_MIN_COVERAGE 0x1c -+#define DIG_MAX_OF_MIN_COVERAGE 0x22 -+ -+/*@[DIG Balance mode]*/ -+#if (DIG_HW == 1) -+#define DIG_MAX_BALANCE_MODE 0x32 -+#else -+#define DIG_MAX_BALANCE_MODE 0x3e -+#endif -+#define DIG_MAX_OF_MIN_BALANCE_MODE 0x2a -+ -+/*@[DIG Performance mode]*/ -+#define DIG_MAX_PERFORMANCE_MODE 0x5a -+#define DIG_MAX_OF_MIN_PERFORMANCE_MODE 0x40 /*@[WLANBB-871]*/ -+#define DIG_MIN_PERFORMANCE 0x20 -+ -+/*@DIG DFS function*/ -+#define DIG_MAX_DFS 0x28 -+#define DIG_MIN_DFS 0x20 -+ -+/*@DIG LPS function*/ -+#define DIG_MAX_LPS 0x3e -+#define DIG_MIN_LPS 0x20 -+ -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+#define DIG_NUM_OF_TDMA_STATES 2 /*@L, H state*/ -+#define DIG_TIMER_MS 250 -+#define ONE_SEC_MS 1000 -+#endif -+ -+/*@=== [DIG FA Threshold] ======================================*/ -+ -+/*Normal*/ -+#define DM_DIG_FA_TH0 500 -+#define DM_DIG_FA_TH1 750 -+ -+/*@LPS*/ -+#define DM_DIG_FA_TH0_LPS 4 /* @-> 4 lps */ -+#define DM_DIG_FA_TH1_LPS 15 /* @-> 15 lps */ -+#define DM_DIG_FA_TH2_LPS 30 /* @-> 30 lps */ -+ -+#define RSSI_OFFSET_DIG_LPS 5 -+#define DIG_RECORD_NUM 4 -+ -+/*@--------------------Enum-----------------------------------*/ -+enum phydm_dig_mode { -+ PHYDM_DIG_PERFORAMNCE_MODE = 0, -+ PHYDM_DIG_COVERAGE_MODE = 1, -+}; -+ -+enum phydm_dig_trend { -+ DIG_STABLE = 0, -+ DIG_INCREASING = 1, -+ DIG_DECREASING = 2 -+}; -+ -+enum phydm_fw_dig_mode_e { -+ DIG_PERFORMANCE_MODE = 0, -+ DIG_COVERAGE_MODE = 1, -+ DIG_LPS_MODE = 2 -+}; -+ -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+enum upd_type { -+ ENABLE_TDMA, -+ MODE_DECISION -+}; -+ -+enum tdma_opmode { -+ MODE_PERFORMANCE = 1, -+ MODE_COVERAGE = 2 -+}; -+ -+#ifdef IS_USE_NEW_TDMA -+enum tdma_dig_timer { -+ INIT_TDMA_DIG_TIMMER, -+ CANCEL_TDMA_DIG_TIMMER, -+ RELEASE_TDMA_DIG_TIMMER -+}; -+ -+enum tdma_dig_state { -+ TDMA_DIG_LOW_STATE = 0, -+ TDMA_DIG_HIGH_STATE = 1, -+ NORMAL_DIG = 2 -+}; -+#endif -+#endif -+ -+/*@--------------------Define Struct-----------------------------------*/ -+#ifdef CFG_DIG_DAMPING_CHK -+struct phydm_dig_recorder_strcut { -+ u8 igi_bitmap; /*@Don't add any new parameter before this*/ -+ u8 igi_history[DIG_RECORD_NUM]; -+ u32 fa_history[DIG_RECORD_NUM]; -+ u8 damping_limit_en; -+ u8 damping_limit_val; /*@Limit IGI_dyn_min*/ -+ u32 limit_time; -+ u8 limit_rssi; -+}; -+#endif -+ -+struct phydm_mcc_dig { -+ u8 mcc_rssi_A; -+ u8 mcc_rssi_B; -+}; -+ -+struct phydm_dig_struct { -+#ifdef CFG_DIG_DAMPING_CHK -+ struct phydm_dig_recorder_strcut dig_recorder_t; -+ u8 dig_dl_en; /*@damping limit function enable*/ -+#endif -+ boolean fw_dig_enable; -+ boolean is_dbg_fa_th; -+ u8 cur_ig_value; -+ boolean igi_dyn_up_hit; -+ u8 igi_trend; -+ u32 rvrt_val; /*all rvrt_val for pause API must set to u32*/ -+ u8 igi_backup; -+ u8 rx_gain_range_max; /*@dig_dynamic_max*/ -+ u8 rx_gain_range_min; /*@dig_dynamic_min*/ -+ u8 dm_dig_max; /*@Absolutly upper bound*/ -+ u8 dm_dig_min; /*@Absolutly lower bound*/ -+ u8 dig_max_of_min; /*@Absolutly max of min*/ -+ u32 ant_div_rssi_max; -+ u8 *is_p2p_in_process; -+ u16 fa_th[3]; -+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8198F_SUPPORT || RTL8192F_SUPPORT || RTL8195B_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8721D_SUPPORT ||\ -+ RTL8710C_SUPPORT || RTL8812F_SUPPORT || RTL8197G_SUPPORT ||\ -+ RTL8723F_SUPPORT) -+ u8 rf_gain_idx; -+ u8 agc_table_idx; -+ u8 big_jump_lmt[16]; -+ u8 enable_adjust_big_jump:1; -+ u8 big_jump_step1:3; -+ u8 big_jump_step2:2; -+ u8 big_jump_step3:2; -+#endif -+ u8 upcheck_init_val; -+ u8 lv0_ratio_reciprocal; -+ u8 lv1_ratio_reciprocal; -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+ u8 cur_ig_value_tdma; -+ u8 low_ig_value; -+ u8 tdma_dig_state; /*@To distinguish which state is now.(L-sate or H-state)*/ -+ u8 tdma_dig_cnt; /*@for phydm_tdma_dig_timer_check use*/ -+ u8 pre_tdma_dig_cnt; -+ u8 sec_factor; -+ u32 cur_timestamp; -+ u32 pre_timestamp; -+ u32 fa_start_timestamp; -+ u32 fa_end_timestamp; -+ u32 fa_acc_1sec_timestamp; -+#ifdef IS_USE_NEW_TDMA -+ u8 tdma_dig_block_cnt;/*@for 1 second dump indicator use*/ -+ /*@dynamic upper bound for L/H state*/ -+ u8 tdma_rx_gain_max[DIG_NUM_OF_TDMA_STATES]; -+ /*@dynamic lower bound for L/H state*/ -+ u8 tdma_rx_gain_min[DIG_NUM_OF_TDMA_STATES]; -+ /*To distinguish current state(L-sate or H-state)*/ -+#endif -+ u8 tdma_force_l_igi; -+ u8 tdma_force_h_igi; -+#endif -+}; -+ -+struct phydm_fa_struct { -+ u32 cnt_parity_fail; -+ u32 cnt_rate_illegal; -+ u32 cnt_crc8_fail; -+ u32 cnt_crc8_fail_vhta; -+ u32 cnt_crc8_fail_vhtb; -+ u32 cnt_mcs_fail; -+ u32 cnt_mcs_fail_vht; -+ u32 cnt_ofdm_fail; -+ u32 cnt_ofdm_fail_pre; /* @For RTL8881A */ -+ u32 cnt_cck_fail; -+ u32 cnt_all; -+ u32 cnt_all_accumulated; -+ u32 cnt_all_pre; -+ u32 cnt_fast_fsync; -+ u32 cnt_sb_search_fail; -+ u32 cnt_ofdm_cca; -+ u32 cnt_cck_cca; -+ u32 cnt_cca_all; -+ u32 cnt_bw_usc; -+ u32 cnt_bw_lsc; -+ u32 cnt_cck_crc32_error; -+ u32 cnt_cck_crc32_ok; -+ u32 cnt_ofdm_crc32_error; -+ u32 cnt_ofdm_crc32_ok; -+ u32 cnt_ht_crc32_error; -+ u32 cnt_ht_crc32_ok; -+ u32 cnt_ht_crc32_error_agg; -+ u32 cnt_ht_crc32_ok_agg; -+ u32 cnt_vht_crc32_error; -+ u32 cnt_vht_crc32_ok; -+ u32 cnt_crc32_error_all; -+ u32 cnt_crc32_ok_all; -+ u32 time_fa_all; -+ boolean cck_block_enable; -+ boolean ofdm_block_enable; -+ u32 dbg_port0; -+ boolean edcca_flag; -+ u8 ofdm2_rate_idx; -+ u32 cnt_ofdm2_crc32_error; -+ u32 cnt_ofdm2_crc32_ok; -+ u8 ofdm2_pcr; -+ u8 ht2_rate_idx; -+ u32 cnt_ht2_crc32_error; -+ u32 cnt_ht2_crc32_ok; -+ u8 ht2_pcr; -+ u8 vht2_rate_idx; -+ u32 cnt_vht2_crc32_error; -+ u32 cnt_vht2_crc32_ok; -+ u8 vht2_pcr; -+ -+}; -+ -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+struct phydm_fa_acc_struct { -+ u32 cnt_parity_fail; -+ u32 cnt_rate_illegal; -+ u32 cnt_crc8_fail; -+ u32 cnt_mcs_fail; -+ u32 cnt_ofdm_fail; -+ u32 cnt_ofdm_fail_pre; /*@For RTL8881A*/ -+ u32 cnt_cck_fail; -+ u32 cnt_all; -+ u32 cnt_all_pre; -+ u32 cnt_fast_fsync; -+ u32 cnt_sb_search_fail; -+ u32 cnt_ofdm_cca; -+ u32 cnt_cck_cca; -+ u32 cnt_cca_all; -+ u32 cnt_cck_crc32_error; -+ u32 cnt_cck_crc32_ok; -+ u32 cnt_ofdm_crc32_error; -+ u32 cnt_ofdm_crc32_ok; -+ u32 cnt_ht_crc32_error; -+ u32 cnt_ht_crc32_ok; -+ u32 cnt_vht_crc32_error; -+ u32 cnt_vht_crc32_ok; -+ u32 cnt_crc32_error_all; -+ u32 cnt_crc32_ok_all; -+ u32 cnt_all_1sec; -+ u32 cnt_cca_all_1sec; -+ u32 cnt_cck_fail_1sec; -+}; -+ -+#endif /*@#ifdef PHYDM_TDMA_DIG_SUPPORT*/ -+ -+/*@--------------------Function declaration-----------------------------*/ -+void phydm_write_dig_reg(void *dm_void, u8 igi); -+ -+void odm_write_dig(void *dm_void, u8 current_igi); -+ -+u8 phydm_get_igi(void *dm_void, enum bb_path path); -+ -+void phydm_set_dig_val(void *dm_void, u32 *val_buf, u8 val_len); -+ -+void odm_pause_dig(void *dm_void, enum phydm_pause_type pause_type, -+ enum phydm_pause_level pause_level, u8 igi_value); -+ -+#ifdef PHYDM_HW_IGI -+void phydm_hwigi(void *dm_void); -+ -+void phydm_hwigi_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#endif -+ -+void phydm_dig_init(void *dm_void); -+ -+void phydm_dig(void *dm_void); -+ -+void phydm_dig_lps_32k(void *dm_void); -+ -+void phydm_dig_by_rssi_lps(void *dm_void); -+ -+void phydm_get_dig_coverage(void *dm_void, u8 *max, u8 *min); -+ -+u8 phydm_get_igi_for_target_pin_scan(void *dm_void, u8 rssi); -+ -+void phydm_false_alarm_counter_statistics(void *dm_void); -+ -+u32 phydm_get_edcca_report(void * dm_void); -+ -+#ifdef PHYDM_TDMA_DIG_SUPPORT -+void phydm_set_tdma_dig_timer(void *dm_void); -+ -+void phydm_tdma_dig_timer_check(void *dm_void); -+ -+void phydm_tdma_dig(void *dm_void); -+ -+void phydm_tdma_false_alarm_counter_check(void *dm_void); -+ -+void phydm_tdma_dig_add_interrupt_mask_handler(void *dm_void); -+ -+void phydm_false_alarm_counter_reset(void *dm_void); -+ -+void phydm_false_alarm_counter_acc(void *dm_void, boolean rssi_dump_en); -+ -+void phydm_false_alarm_counter_acc_reset(void *dm_void); -+ -+void phydm_tdma_dig_para_upd(void *dm_void, enum upd_type type, u8 input); -+ -+#ifdef IS_USE_NEW_TDMA -+void phydm_tdma_dig_timers(void *dm_void, u8 state); -+ -+void phydm_tdma_dig_cbk(void *dm_void); -+ -+void phydm_tdma_dig_workitem_callback(void *dm_void); -+ -+void phydm_tdma_fa_cnt_chk(void *dm_void); -+ -+void phydm_tdma_low_dig(void *dm_void); -+ -+void phydm_tdma_high_dig(void *dm_void); -+ -+void phydm_fa_cnt_acc(void *dm_void, boolean rssi_dump_en, -+ u8 cur_tdma_dig_state); -+#endif /*@#ifdef IS_USE_NEW_TDMA*/ -+#endif /*@#ifdef PHYDM_TDMA_DIG_SUPPORT*/ -+ -+void phydm_set_ofdm_agc_tab(void *dm_void, u8 tab_sel); -+ -+void phydm_dig_debug(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len); -+ -+void phydm_fill_fw_dig_info(void *dm_void, boolean *enable, -+ u8 *para4, u8 *para8); -+ -+void phydm_crc32_cnt_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+#ifdef CONFIG_MCC_DM -+void phydm_mcc_igi_cal(void *dm_void); -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_direct_bf.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_direct_bf.c -new file mode 100644 -index 000000000000..55dd2f8dacca ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_direct_bf.c -@@ -0,0 +1,366 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ***************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+#ifdef CONFIG_DIRECTIONAL_BF -+#ifdef PHYDM_COMPILE_IC_2SS -+void phydm_iq_gen_en(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ enum rf_path i = RF_PATH_A; -+ enum rf_path path = RF_PATH_A; -+ -+ #if (ODM_IC_11AC_SERIES_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8822B) { -+ for (i = RF_PATH_A; i <= RF_PATH_B; i++) { -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, path, RF_0xef, BIT(19), 0x1); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, path, RF_0x33, 0xF, 3); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, path, RF_0x3e, 0xfffff, 0x00036); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, path, RF_0x3f, 0xfffff, 0x5AFCE); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, path, RF_0xef, BIT(19), 0x0); -+ } -+ } -+ #endif -+ -+ #if (ODM_IC_11N_SERIES_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8192F) { -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); -+ /* Path A */ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x08000); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0005f); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x01042); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0004f); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x71fc2); -+ /* Path B */ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x08000); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x00050); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x01042); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x00040); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x71fc2); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); -+ } -+ #endif -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_RTL8197G) { -+ /*RF mode table write enable*/ -+ /* Path A */ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x000cf); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x71fc2); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); -+ -+ /* Path B */ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x000cf); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x71fc2); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x08000); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x000ef); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x01042); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); -+ } -+ #endif -+ -+} -+ -+void phydm_dis_cdd(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ #if (ODM_IC_11AC_SERIES_SUPPORT) -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ odm_set_bb_reg(dm, R_0x808, 0x3ffff00, 0); -+ odm_set_bb_reg(dm, R_0x9ac, 0x1fff, 0); -+ odm_set_bb_reg(dm, R_0x9ac, BIT(13), 1); -+ } -+ #endif -+ #if (ODM_IC_11N_SERIES_SUPPORT) -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ odm_set_bb_reg(dm, R_0x90c, 0xffffffff, 0x83321333); -+ /* Set Tx delay setting for CCK pathA,B*/ -+ odm_set_bb_reg(dm, R_0xa2c, 0xf0000000, 0); -+ /*Enable Tx CDD for HT part when spatial expansion is applied*/ -+ odm_set_bb_reg(dm, R_0xd00, BIT(8), 0); -+ /* Tx CDD for Legacy*/ -+ odm_set_bb_reg(dm, R_0xd04, 0xf0000, 0); -+ /* Tx CDD for non-HT*/ -+ odm_set_bb_reg(dm, R_0xd0c, 0x3c0, 0); -+ /* Tx CDD for HT SS1*/ -+ odm_set_bb_reg(dm, R_0xd0c, 0xf8000, 0); -+ } -+ #endif -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ /* Tx CDD for Legacy Preamble*/ -+ odm_set_bb_reg(dm, R_0x1cc0, 0xffffffff, 0x24800000); -+ /* Tx CDD for HT Preamble*/ -+ odm_set_bb_reg(dm, R_0x1cb0, 0xffffffff, 0); -+ } -+ #endif -+} -+ -+void phydm_pathb_q_matrix_rotate_en(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ phydm_iq_gen_en(dm); -+ -+ /*#ifdef PHYDM_COMMON_API_SUPPORT*/ -+ /*path selection is controlled by driver*/ -+ #if 0 -+ if (!phydm_api_trx_mode(dm, BB_PATH_AB, BB_PATH_AB, BB_PATH_AB)) -+ return; -+ #endif -+ -+ phydm_dis_cdd(dm); -+ phydm_pathb_q_matrix_rotate(dm, 0); -+ -+ #if (ODM_IC_11AC_SERIES_SUPPORT) -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ /*Set Q matrix r_v11 =1*/ -+ odm_set_bb_reg(dm, R_0x195c, MASKDWORD, 0x40000); -+ /*Set Q matrix enable*/ -+ odm_set_bb_reg(dm, R_0x191c, BIT(7), 1); -+ } -+ #endif -+} -+ -+void phydm_pathb_q_matrix_rotate(void *dm_void, u16 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ #if (ODM_IC_11AC_SERIES_SUPPORT) -+ u32 phase_table_0[ANGLE_NUM] = {0x40000, 0x376CF, 0x20000, 0x00000, -+ 0xFE0000, 0xFC8930, 0xFC0000, -+ 0xFC8930, 0xFDFFFF, 0x000000, -+ 0x020000, 0x0376CF}; -+ u32 phase_table_1[ANGLE_NUM] = {0x00000, 0x1FFFF, 0x376CF, 0x40000, -+ 0x0376CF, 0x01FFFF, 0x000000, -+ 0xFDFFFF, 0xFC8930, 0xFC0000, -+ 0xFC8930, 0xFDFFFF}; -+ #endif -+ #if (ODM_IC_11N_SERIES_SUPPORT) -+ u32 phase_table_n_0[ANGLE_NUM] = {0x00, 0x0B, 0x02, 0x00, 0x02, 0x02, -+ 0x04, 0x02, 0x0D, 0x09, 0x04, 0x0B}; -+ u32 phase_table_n_1[ANGLE_NUM] = {0x40000100, 0x377F00DD, 0x201D8880, -+ 0x00000000, 0xE01D8B80, 0xC8BF0322, -+ 0xC000FF00, 0xC8BF0322, 0xDFE2777F, -+ 0xFFC003FF, 0x20227480, 0x377F00DD}; -+ u32 phase_table_n_2[ANGLE_NUM] = {0x00, 0x1E, 0x3C, 0x4C, 0x3C, 0x1E, -+ 0x0F, 0xD2, 0xC3, 0xC4, 0xC3, 0xD2}; -+ #endif -+ if (idx >= ANGLE_NUM) { -+ pr_debug("[%s]warning Phase Set Error: %d\n", __func__, idx); -+ return; -+ } -+ -+ switch (dm->ic_ip_series) { -+ #if (ODM_IC_11AC_SERIES_SUPPORT == 1) -+ case PHYDM_IC_AC: -+ /*Set Q matrix r_v21*/ -+ odm_set_bb_reg(dm, R_0x1954, 0xffffff, phase_table_0[idx]); -+ odm_set_bb_reg(dm, R_0x1950, 0xffffff, phase_table_1[idx]); -+ break; -+ #endif -+ -+ #if (ODM_IC_11N_SERIES_SUPPORT == 1) -+ case PHYDM_IC_N: -+ /*Set Q matrix r_v21*/ -+ odm_set_bb_reg(dm, R_0xc4c, 0xff000000, phase_table_n_0[idx]); -+ odm_set_bb_reg(dm, R_0xc88, 0xffffffff, phase_table_n_1[idx]); -+ odm_set_bb_reg(dm, R_0xc9c, 0xff000000, phase_table_n_2[idx]); -+ break; -+ #endif -+ -+ default: -+ break; -+ } -+} -+ -+/*Before use this API, Fill correct Tx Des. and Disable STBC in advance*/ -+void phydm_set_direct_bfer(void *dm_void, u16 phs_idx, u8 su_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8822B) { -+#if 0 -+ u8 phi[13] = {0x0, 0x5, 0xa, 0xf, 0x15, 0x1a, 0x1f, 0x25, -+ 0x2a, 0x2f, 0x35, 0x3a, 0x0}; -+ u8 psi[13] = {0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, -+ 0x7, 0x7, 0x7, 0x7}; -+ u16 psiphi[13] = {0x1c0, 0x1c5, 0x1ca, 0x1cf, 0x1d5, 0x1da, -+ 0x1df, 0x1e5, 0x1ea, 0x1ef, 0x1f5, 0x1fa, -+ 0x1c0}; //{Psi_4bit, Phi_6bit} of 0~360 -+#endif -+ u16 ns[3] = {52, 108, 234}; //20/40/80 MHz subcarrier number -+ u16 psiphi[13] = {0x1c0, 0x1c5, 0x1ca, 0x1cf, 0x1d5, 0x1da, -+ 0x1df, 0x1e5, 0x1ea, 0x1ef, 0x1f5, 0x1fa, -+ 0x1c0}; //{Psi_4bit, Phi_6bit} of 0~360 -+ u16 psiphiR; -+ u8 i; -+ u8 snr = 0x12; // for 1SS BF -+ u8 nc = 0x0; //bit 2-0 -+ u8 nr = 0x1; //bit 5-3 -+ u8 ng = 0x0; //bit 7-6 -+ u8 cb = 0x1; //bit 9-8; 1 => phi:6, psi:4; -+ u32 bw = odm_get_bb_reg(dm, R_0x8ac, 0x3); //bit 11-10 -+ u8 userid = su_idx; //bit 12 -+ u32 csi_report = 0x0; -+ u32 ndp_bw = odm_get_bb_reg(dm, R_0x8ac, 0x3); //bit 11-10 -+ u8 ndp_sc = 0; //bit 11-10 -+ u32 ndp_info = 0x0; -+ -+ u16 mem_num = 0; -+ u8 mem_move = 0; -+ u8 mem_sel = 0; -+ u16 mem_addr = 0; -+ u32 dw0, dw1; -+ u64 vm_info = 0; -+ u64 temp = 0; -+ u8 vm_cnt = 0; -+ -+ mem_num = ((8 + (6 + 4) * ns[bw]) >> 6) + 1; // SU codebook 1 -+ -+ /* setting NDP BW/SC info*/ -+ ndp_info = (ndp_bw & 0x3) | (ndp_bw & 0x3) << 6 | -+ (ndp_bw & 0x3) << 12 | (ndp_sc & 0xf) << 2 | -+ (ndp_sc & 0xf) << 8 | (ndp_sc & 0xf) << 14; -+ odm_set_bb_reg(dm, R_0xb58, 0x000FFFFC, ndp_info); -+ odm_set_bb_reg(dm, R_0x19f8, 0x00010000, 1); -+ ODM_delay_ms(1); // delay 1ms -+ odm_set_bb_reg(dm, R_0x19f8, 0x00010000, 0); -+ -+ /* setting CSI report info*/ -+ csi_report = (userid & 0x1) << 12 | (bw & 0x3) << 10 | -+ (cb & 0x3) << 8 | (ng & 0x3) << 6 | -+ (nr & 0x7) << 3 | (nc & 0x7); -+ odm_set_bb_reg(dm, R_0x72c, 0x1FFF, csi_report); -+ odm_set_bb_reg(dm, R_0x71c, 0x80000000, 1); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] direct BF csi report 0x%x\n", -+ __func__, csi_report); -+ /*========================*/ -+ -+ odm_set_bb_reg(dm, R_0x19b8, 0x40, 1); //0x19b8[6]:1 to csi_rpt -+ odm_set_bb_reg(dm, R_0x19e0, 0x3FC0, 0xFF); //gated_clk off -+ odm_set_bb_reg(dm, R_0x9e8, 0x2000000, 1); //abnormal txbf -+ odm_set_bb_reg(dm, R_0x9e8, 0x1000000, 0); //read phi psi -+ odm_set_bb_reg(dm, R_0x9e8, 0x70000000, su_idx); //SU user 0 -+ odm_set_bb_reg(dm, R_0x1910, 0x8000, 0); //BFer -+ -+ dw0 = 0; // for 0x9ec -+ dw1 = 0; // for 0x1900 -+ mem_addr = 0; -+ mem_sel = 0; -+ mem_move = 0; -+ vm_info = vm_info | (snr & 0xff); //V matrix info -+ vm_cnt = 8; // V matrix length counter -+ psiphiR = (psiphi[phs_idx] & 0x3ff); -+ -+ while (mem_addr < mem_num) { -+ while (vm_cnt <= 32) { -+ // shift only max. 32 bit -+ if (vm_cnt >= 20) { -+ temp = psiphiR << 20; -+ temp = temp << (vm_cnt - 20); -+ } else { -+ temp = psiphiR << vm_cnt; -+ } -+ vm_info |= temp; -+ vm_cnt += 10; -+ } -+ if (mem_sel == 0) { -+ dw0 = vm_info & 0xffffffff; -+ vm_info = vm_info >> 32; -+ vm_cnt -= 32; -+ mem_sel = 1; -+ mem_move = 0; -+ } else { -+ dw1 = vm_info & 0xffffffff; -+ vm_info = vm_info >> 32; -+ vm_cnt -= 32; -+ mem_sel = 0; -+ mem_move = 1; -+ } -+ if (mem_move == 1) { -+ odm_set_bb_reg(dm, 0x9e8, 0x1000000, 0); -+ //read phi psi -+ odm_set_bb_reg(dm, 0x1910, 0x3FF0000, -+ mem_addr); -+ odm_set_bb_reg(dm, 0x09ec, 0xFFFFFFFF, dw0); -+ odm_set_bb_reg(dm, 0x1900, 0xFFFFFFFF, dw1); -+ odm_set_bb_reg(dm, 0x9e8, 0x1000000, 1); -+ //write phi psi -+ mem_move = 0; -+ mem_addr += 1; -+ } -+ } -+ odm_set_bb_reg(dm, 0x9e8, 0x2000000, 0); //normal txbf -+ } -+#endif -+} //end function -+ -+/*Before use this API, Disable STBC in advance*/ -+/*only 1SS rate can improve performance*/ -+void phydm_set_direct_bfer_txdesc_en(void *dm_void, u8 enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197G) { -+ phydm_iq_gen_en(dm); -+ -+ /*#ifdef PHYDM_COMMON_API_SUPPORT*/ -+ /*path selection is controlled by driver, use 1ss 2Tx*/ -+ #if 0 -+ if (!phydm_api_trx_mode(dm, BB_PATH_AB, BB_PATH_AB, BB_PATH_AB)) -+ return; -+ #endif -+ -+ phydm_dis_cdd(dm); -+ if (enable) -+ odm_set_bb_reg(dm, R_0x1d90, 0x8000, 1); -+ else -+ odm_set_bb_reg(dm, R_0x1d90, 0x8000, 0); -+ } -+#endif -+} //end function -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_direct_bf.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_direct_bf.h -new file mode 100644 -index 000000000000..c9c4c4bed628 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_direct_bf.h -@@ -0,0 +1,44 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_DIR_BF_H__ -+#define __PHYDM_DIR_BF_H__ -+ -+#ifdef CONFIG_DIRECTIONAL_BF -+#define ANGLE_NUM 12 -+ -+/*@ -+ * ============================================================ -+ * function prototype -+ * ============================================================ -+ */ -+void phydm_iq_gen_en(void *dm_void); -+void phydm_dis_cdd(void *dm_void); -+void phydm_pathb_q_matrix_rotate_en(void *dm_void); -+void phydm_pathb_q_matrix_rotate(void *dm_void, u16 idx); -+void phydm_set_direct_bfer(void *dm_void, u16 phs_idx, u8 su_idx); -+void phydm_set_direct_bfer_txdesc_en(void *dm_void, u8 enable); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_dynamictxpower.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_dynamictxpower.c -new file mode 100644 -index 000000000000..2ccbd1ae822f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_dynamictxpower.c -@@ -0,0 +1,795 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/************************************************************* -+ * include files -+ ************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef CONFIG_DYNAMIC_TX_TWR -+#ifdef BB_RAM_SUPPORT -+void phydm_rd_reg_pwr(void *dm_void, u32 *_used, char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ boolean pwr_ofst0_en = false; -+ boolean pwr_ofst1_en = false; -+ s8 pwr_ofst0 = 0; -+ s8 pwr_ofst1 = 0; -+ -+ pwr_ofst0_en = (boolean)odm_get_bb_reg(dm, R_0x1e70, BIT(23)); -+ pwr_ofst1_en = (boolean)odm_get_bb_reg(dm, R_0x1e70, BIT(31)); -+ pwr_ofst0 = (s8)odm_get_bb_reg(dm, R_0x1e70, 0x7f0000); -+ pwr_ofst1 = (s8)odm_get_bb_reg(dm, R_0x1e70, 0x7f000000); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "reg0: en:%d, pwr_ofst:0x%x, reg1: en:%d, pwr_ofst:0x%x\n", -+ pwr_ofst0_en, pwr_ofst0, pwr_ofst1_en, pwr_ofst1); -+ -+ *_used = used; -+ *_out_len = out_len; -+}; -+ -+void phydm_wt_reg_pwr(void *dm_void, boolean is_ofst1, boolean pwr_ofst_en, -+ s8 pwr_ofst) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bb_ram_ctrl *bb_ctrl = &dm->p_bb_ram_ctrl; -+ u8 reg_0x1e70 = 0; -+ -+ if (!is_ofst1) { -+ bb_ctrl->tx_pwr_ofst_reg0_en = pwr_ofst_en; -+ bb_ctrl->tx_pwr_ofst_reg0 = pwr_ofst; -+ -+ reg_0x1e70 |= (pwr_ofst_en << 7) + (pwr_ofst & 0x7f); -+ odm_set_bb_reg(dm, R_0x1e70, 0x00ff0000, reg_0x1e70); -+ } else { -+ bb_ctrl->tx_pwr_ofst_reg1_en = pwr_ofst_en; -+ bb_ctrl->tx_pwr_ofst_reg1 = pwr_ofst; -+ -+ reg_0x1e70 |= (pwr_ofst_en << 7) + (pwr_ofst & 0x7f); -+ odm_set_bb_reg(dm, R_0x1e70, 0xff000000, reg_0x1e70); -+ } -+}; -+ -+void phydm_rd_ram_pwr(void *dm_void, u8 macid, u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ boolean pwr_ofst0_en = false; -+ boolean pwr_ofst1_en = false; -+ s8 pwr_ofst0 = 0; -+ s8 pwr_ofst1 = 0; -+ u32 reg_0x1e84 = 0; -+ -+ reg_0x1e84 |= (macid & 0x3f) << 24; /* macid*/ -+ reg_0x1e84 |= BIT(31); /* read_en*/ -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, reg_0x1e84); -+ -+ pwr_ofst0_en = (boolean)odm_get_bb_reg(dm, R_0x2de8, BIT(23)); -+ pwr_ofst1_en = (boolean)odm_get_bb_reg(dm, R_0x2de8, BIT(31)); -+ pwr_ofst0 = (s8)odm_get_bb_reg(dm, R_0x2de8, 0x7f0000); -+ pwr_ofst1 = (s8)odm_get_bb_reg(dm, R_0x2de8, 0x7f000000); -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, 0x0); /* disable rd/wt*/ -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "(macid:%d) ram0: en:%d, pwr_ofst:0x%x, ram1: en:%d, pwr_ofst:0x%x\n", -+ macid, pwr_ofst0_en, pwr_ofst0, pwr_ofst1_en, pwr_ofst1); -+ -+ *_used = used; -+ *_out_len = out_len; -+}; -+ -+void phydm_wt_ram_pwr(void *dm_void, u8 macid, boolean is_ofst1, -+ boolean pwr_ofst_en, s8 pwr_ofst) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bb_ram_per_sta *dm_ram_per_sta = NULL; -+ u32 reg_0x1e84 = 0; -+ boolean pwr_ofst_ano_en = false; -+ s8 pwr_ofst_ano = 0; -+ -+ if (macid > 63) -+ macid = 63; -+ -+ dm_ram_per_sta = &dm->p_bb_ram_ctrl.pram_sta_ctrl[macid]; -+ reg_0x1e84 = (dm_ram_per_sta->hw_igi_en << 7) + dm_ram_per_sta->hw_igi; -+ if (!is_ofst1) { -+ dm_ram_per_sta->tx_pwr_offset0_en = pwr_ofst_en; -+ dm_ram_per_sta->tx_pwr_offset0 = pwr_ofst; -+ -+ pwr_ofst_ano_en = dm_ram_per_sta->tx_pwr_offset1_en; -+ pwr_ofst_ano = dm_ram_per_sta->tx_pwr_offset1; -+ -+ reg_0x1e84 |= (pwr_ofst_en << 15) + ((pwr_ofst & 0x7f) << 8) + -+ (pwr_ofst_ano_en << 23) + -+ ((pwr_ofst_ano & 0x7f) << 16); -+ } else { -+ dm_ram_per_sta->tx_pwr_offset1_en = pwr_ofst_en; -+ dm_ram_per_sta->tx_pwr_offset1 = pwr_ofst; -+ -+ pwr_ofst_ano_en = dm_ram_per_sta->tx_pwr_offset0_en; -+ pwr_ofst_ano = dm_ram_per_sta->tx_pwr_offset0; -+ -+ reg_0x1e84 |= (pwr_ofst_ano_en << 15) + -+ ((pwr_ofst_ano & 0x7f) << 8) + -+ (pwr_ofst_en << 23) + ((pwr_ofst & 0x7f) << 16); -+ } -+ reg_0x1e84 |= (macid & 0x3f) << 24;/* macid*/ -+ reg_0x1e84 |= BIT(30); /* write_en*/ -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, reg_0x1e84); -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, 0x80000000); /* read_en*/ -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, 0x0); /* disable rd/wt*/ -+}; -+ -+void phydm_rst_ram_pwr(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bb_ram_per_sta *dm_ram_per_sta = NULL; -+ u32 reg_0x1e84 = 0; -+ u8 i = 0; -+ -+ for (i = 0; i < 64; i++) { -+ dm_ram_per_sta = &dm->p_bb_ram_ctrl.pram_sta_ctrl[i]; -+ dm_ram_per_sta->tx_pwr_offset0_en = false; -+ dm_ram_per_sta->tx_pwr_offset1_en = false; -+ dm_ram_per_sta->tx_pwr_offset0 = 0x0; -+ dm_ram_per_sta->tx_pwr_offset1 = 0x0; -+ reg_0x1e84 = (dm_ram_per_sta->hw_igi_en << 7) + -+ dm_ram_per_sta->hw_igi; -+ reg_0x1e84 |= (i & 0x3f) << 24; -+ reg_0x1e84 |= BIT(30); -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, reg_0x1e84); -+ } -+ -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, 0x80000000); -+ odm_set_bb_reg(dm, R_0x1e84, MASKDWORD, 0x0); -+}; -+ -+u8 phydm_pwr_lv_mapping_2nd(u8 tx_pwr_lv) -+{ -+ if (tx_pwr_lv == tx_high_pwr_level_level3) -+ return PHYDM_2ND_OFFSET_MINUS_11DB; -+ else if (tx_pwr_lv == tx_high_pwr_level_level2) -+ return PHYDM_2ND_OFFSET_MINUS_7DB; -+ else if (tx_pwr_lv == tx_high_pwr_level_level1) -+ return PHYDM_2ND_OFFSET_MINUS_3DB; -+ else -+ return PHYDM_2ND_OFFSET_ZERO; -+} -+ -+void phydm_pwr_lv_ctrl(void *dm_void, u8 macid, u8 tx_pwr_lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ s8 pwr_offset = 0; -+ -+ if (tx_pwr_lv == tx_high_pwr_level_level3) -+ pwr_offset = PHYDM_BBRAM_OFFSET_MINUS_11DB; -+ else if (tx_pwr_lv == tx_high_pwr_level_level2) -+ pwr_offset = PHYDM_BBRAM_OFFSET_MINUS_7DB; -+ else if (tx_pwr_lv == tx_high_pwr_level_level1) -+ pwr_offset = PHYDM_BBRAM_OFFSET_MINUS_3DB; -+ else -+ pwr_offset = PHYDM_BBRAM_OFFSET_ZERO; -+ -+ phydm_wt_ram_pwr(dm, macid, RAM_PWR_OFST0, true, pwr_offset); -+} -+ -+void phydm_dtp_fill_cmninfo_2nd(void *dm_void, u8 sta_id, u8 dtp_lvl) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[sta_id]; -+ struct dtp_info *dtp = NULL; -+ -+ if (!is_sta_active(sta)) -+ return; -+ -+ dtp = &dm->phydm_sta_info[sta_id]->dtp_stat; -+ dtp->dyn_tx_power = phydm_pwr_lv_mapping_2nd(dtp_lvl); -+ phydm_pwr_lv_ctrl(dm, sta->mac_id, dtp_lvl); -+ -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "Fill cmninfo TxPwr: sta_id=(%d), macid=(%d), PwrLv (%d)\n", -+ sta_id, sta->mac_id, dtp->dyn_tx_power); -+} -+ -+void phydm_dtp_init_2nd(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) -+ return; -+ -+ #if (RTL8822C_SUPPORT || RTL8812F_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F)) { -+ phydm_rst_ram_pwr(dm); -+ /* rsp tx use type 0*/ -+ odm_set_mac_reg(dm, R_0x6d8, BIT(19) | BIT(18), RAM_PWR_OFST0); -+ } -+ #endif -+}; -+#endif -+ -+boolean -+phydm_check_rates(void *dm_void, u8 rate_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 check_rate_bitmap0 = 0x08080808; /* @check CCK11M, OFDM54M, MCS7, MCS15*/ -+ u32 check_rate_bitmap1 = 0x80200808; /* @check MCS23, MCS31, VHT1SS M9, VHT2SS M9*/ -+ u32 check_rate_bitmap2 = 0x00080200; /* @check VHT3SS M9, VHT4SS M9*/ -+ u32 bitmap_result; -+ -+#if (RTL8822B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8822B) { -+ check_rate_bitmap2 &= 0; -+ check_rate_bitmap1 &= 0xfffff000; -+ check_rate_bitmap0 &= 0x0fffffff; -+ } -+#endif -+#if (RTL8197F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197F) { -+ check_rate_bitmap2 &= 0; -+ check_rate_bitmap1 &= 0; -+ check_rate_bitmap0 &= 0x0fffffff; -+ } -+#endif -+#if (RTL8192E_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8192E) { -+ check_rate_bitmap2 &= 0; -+ check_rate_bitmap1 &= 0; -+ check_rate_bitmap0 &= 0x0fffffff; -+ } -+#endif -+#if (RTL8192F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8192F) { -+ check_rate_bitmap2 &= 0; -+ check_rate_bitmap1 &= 0; -+ check_rate_bitmap0 &= 0x0fffffff; -+ } -+#endif -+#if (RTL8721D_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8721D) { -+ check_rate_bitmap2 &= 0; -+ check_rate_bitmap1 &= 0; -+ check_rate_bitmap0 &= 0x000fffff; -+ } -+#endif -+#if (RTL8821C_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8821C) { -+ check_rate_bitmap2 &= 0; -+ check_rate_bitmap1 &= 0x003ff000; -+ check_rate_bitmap0 &= 0x000fffff; -+ } -+#endif -+ if (rate_idx >= 64) -+ bitmap_result = BIT(rate_idx - 64) & check_rate_bitmap2; -+ else if (rate_idx >= 32) -+ bitmap_result = BIT(rate_idx - 32) & check_rate_bitmap1; -+ else if (rate_idx <= 31) -+ bitmap_result = BIT(rate_idx) & check_rate_bitmap0; -+ -+ if (bitmap_result != 0) -+ return true; -+ else -+ return false; -+} -+ -+enum rf_path -+phydm_check_paths(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ enum rf_path max_path = RF_PATH_A; -+ -+ if (dm->num_rf_path == 1) -+ max_path = RF_PATH_A; -+ if (dm->num_rf_path == 2) -+ max_path = RF_PATH_B; -+ if (dm->num_rf_path == 3) -+ max_path = RF_PATH_C; -+ if (dm->num_rf_path == 4) -+ max_path = RF_PATH_D; -+ -+ return max_path; -+} -+ -+#ifdef PHYDM_COMMON_API_NOT_SUPPORT -+u8 phydm_dtp_get_txagc(void *dm_void, enum rf_path path, u8 hw_rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 ret = 0xff; -+ -+ ret = config_phydm_read_txagc_n(dm, path, hw_rate); -+ -+ return ret; -+} -+#endif -+ -+u8 phydm_search_min_power_index(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ enum rf_path path; -+ enum rf_path max_path; -+ u8 min_gain_index = 0x3f; -+ u8 gain_index = 0; -+ u8 i; -+ -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, "%s\n", __func__); -+ max_path = phydm_check_paths(dm); -+ for (path = 0; path <= max_path; path++) -+ for (i = 0; i < 84; i++) -+ if (phydm_check_rates(dm, i)) { -+ -+ if (dm->support_ic_type & PHYDM_COMMON_API_IC) { -+ #ifdef PHYDM_COMMON_API_SUPPORT -+ /*97F,8822B,92F,8821C*/ -+ gain_index = phydm_api_get_txagc(dm, path, i); -+ #endif -+ } else { -+ /*92E*/ -+ #ifdef PHYDM_COMMON_API_NOT_SUPPORT -+ gain_index = phydm_dtp_get_txagc(dm, path, i); -+ #endif -+ } -+ -+ if (gain_index == 0xff) { -+ min_gain_index = 0x20; -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "Error Gain idx!! Rewite to: ((%d))\n", -+ min_gain_index); -+ break; -+ } -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "Support Rate: ((%d)) -> Gain idx: ((%d))\n", -+ i, gain_index); -+ if (gain_index < min_gain_index) -+ min_gain_index = gain_index; -+ } -+ return min_gain_index; -+} -+ -+void phydm_dynamic_tx_power_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ -+ dm->last_dtp_lvl = tx_high_pwr_level_normal; -+ dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal; -+ -+ switch (dm->ic_ip_series) { -+ #ifdef BB_RAM_SUPPORT -+ case PHYDM_IC_JGR3: -+ dm->set_pwr_th[0] = TX_PWR_NEAR_FIELD_TH_JGR3_LVL1; -+ dm->set_pwr_th[1] = TX_PWR_NEAR_FIELD_TH_JGR3_LVL2; -+ dm->set_pwr_th[2] = TX_PWR_NEAR_FIELD_TH_JGR3_LVL3; -+ phydm_dtp_init_2nd(dm); -+ break; -+ #endif -+ default: -+ for (i = 0; i < 3; i++) -+ dm->enhance_pwr_th[i] = 0xff; -+ -+ dm->set_pwr_th[0] = TX_POWER_NEAR_FIELD_THRESH_LVL1; -+ dm->set_pwr_th[1] = TX_POWER_NEAR_FIELD_THRESH_LVL2; -+ dm->set_pwr_th[2] = 0xff; -+ dm->min_power_index = phydm_search_min_power_index(dm); -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, "DTP init: Min Gain idx: ((%d))\n", -+ dm->min_power_index); -+ break; -+ } -+} -+ -+void phydm_noisy_enhance_hp_th(void *dm_void, u8 noisy_state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (noisy_state == 0) { -+ dm->enhance_pwr_th[0] = dm->set_pwr_th[0]; -+ dm->enhance_pwr_th[1] = dm->set_pwr_th[1]; -+ dm->enhance_pwr_th[2] = dm->set_pwr_th[2]; -+ } else { -+ dm->enhance_pwr_th[0] = dm->set_pwr_th[0] + 8; -+ dm->enhance_pwr_th[1] = dm->set_pwr_th[1] + 5; -+ dm->enhance_pwr_th[2] = dm->set_pwr_th[2]; -+ } -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "DTP hp_enhance_th: Lv1_th =%d ,Lv2_th = %d ,Lv3_th = %d\n", -+ dm->enhance_pwr_th[0], dm->enhance_pwr_th[1], -+ dm->enhance_pwr_th[2]); -+} -+ -+u8 phydm_pwr_lvl_check(void *dm_void, u8 input_rssi, u8 last_pwr_lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 th[DTP_POWER_LEVEL_SIZE]; -+ u8 i; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ for (i = 0; i < DTP_POWER_LEVEL_SIZE; i++) -+ th[i] = dm->set_pwr_th[i]; -+ -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "Ori-DTP th: Lv1_th = %d, Lv2_th = %d, Lv3_th = %d\n", -+ th[0], th[1], th[2]); -+ -+ for (i = 0; i < DTP_POWER_LEVEL_SIZE; i++) { -+ if (i >= (last_pwr_lv)) -+ th[i] += DTP_FLOOR_UP_GAP; -+ } -+ -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "Mod-DTP th: Lv1_th = %d, Lv2_th = %d, Lv3_th = %d\n", -+ th[0], th[1], th[2]); -+ } else { -+ for (i = 0; i < DTP_POWER_LEVEL_SIZE; i++) -+ th[i] = dm->enhance_pwr_th[i]; -+ for (i = 0; i < DTP_POWER_LEVEL_SIZE; i++) { -+ if (i >= (last_pwr_lv)) -+ th[i] += DTP_FLOOR_UP_GAP; -+ } -+ } -+ -+ if (input_rssi >= th[2]) -+ return tx_high_pwr_level_level3; -+ else if (input_rssi < th[2] && input_rssi >= th[1]) -+ return tx_high_pwr_level_level2; -+ else if (input_rssi < th[1] && input_rssi >= th[0]) -+ return tx_high_pwr_level_level1; -+ else -+ return tx_high_pwr_level_normal; -+} -+ -+u8 phydm_pwr_lv_mapping(u8 tx_pwr_lv) -+{ -+ if (tx_pwr_lv == tx_high_pwr_level_level3) -+ return PHYDM_OFFSET_MINUS_11DB; -+ else if (tx_pwr_lv == tx_high_pwr_level_level2) -+ return PHYDM_OFFSET_MINUS_7DB; -+ else if (tx_pwr_lv == tx_high_pwr_level_level1) -+ return PHYDM_OFFSET_MINUS_3DB; -+ else -+ return PHYDM_OFFSET_ZERO; -+} -+ -+void phydm_dynamic_response_power(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rpwr = 0; -+ -+ if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) -+ return; -+ -+ if (dm->dynamic_tx_high_power_lvl == dm->last_dtp_lvl) { -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, "RespPwr not change\n"); -+ return; -+ } -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "RespPwr update_DTP_lv: ((%d)) -> ((%d))\n", dm->last_dtp_lvl, -+ dm->dynamic_tx_high_power_lvl); -+ dm->last_dtp_lvl = dm->dynamic_tx_high_power_lvl; -+ rpwr = phydm_pwr_lv_mapping(dm->dynamic_tx_high_power_lvl); -+ odm_set_mac_reg(dm, ODM_REG_RESP_TX_11AC, BIT(20) | BIT(19) | BIT(18), -+ rpwr); -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, "RespPwr Set TxPwr: Lv (%d)\n", -+ dm->dynamic_tx_high_power_lvl); -+} -+ -+void phydm_dtp_fill_cmninfo(void *dm_void, u8 sta_id, u8 dtp_lvl) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[sta_id]; -+ struct dtp_info *dtp = NULL; -+ -+ if (!is_sta_active(sta)) -+ return; -+ -+ dtp = &sta->dtp_stat; -+ dtp->dyn_tx_power = phydm_pwr_lv_mapping(dtp_lvl); -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "Fill cmninfo TxPwr: sta_id=(%d), macid=(%d), PwrLv (%d)\n", -+ sta_id, sta->mac_id, dtp->dyn_tx_power); -+} -+ -+void phydm_dtp_per_sta(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = NULL; -+ struct dtp_info *dtp = NULL; -+ struct rssi_info *rssi = NULL; -+ struct phydm_bb_ram_ctrl *bb_ctrl = &dm->p_bb_ram_ctrl; -+ u8 sta_cnt = 0; -+ u8 i = 0; -+ u8 curr_pwr_lv = 0; -+ u8 last_pwr_lv = 0; -+ u8 mac_id_cnt = 0; -+ u64 macid_cur = 0; -+ u64 macid_diff = 0; -+ u64 macid_mask = 0; -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ sta = dm->phydm_sta_info[i]; -+ if (is_sta_active(sta)) { -+ sta_cnt++; -+ -+ dtp = &sta->dtp_stat; -+ rssi = &sta->rssi_stat; -+ macid_mask = (u64)BIT(sta->mac_id); -+ if (!(bb_ctrl->macid_is_linked & macid_mask)) -+ dtp->sta_last_dtp_lvl = tx_high_pwr_level_normal; -+ -+ last_pwr_lv = dtp->sta_last_dtp_lvl; -+ curr_pwr_lv = phydm_pwr_lvl_check(dm, rssi->rssi, -+ last_pwr_lv); -+ dtp->sta_tx_high_power_lvl = curr_pwr_lv; -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "STA_id=%d, MACID=%d , RSSI: %d , GetPwrLv: %d\n", -+ i, sta->mac_id, rssi->rssi, curr_pwr_lv); -+ -+ bb_ctrl->macid_is_linked |= macid_mask; -+ macid_cur |= macid_mask; -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "macid_is_linked: (0x%llx), macid_cur: (0x%llx)\n", -+ bb_ctrl->macid_is_linked, macid_cur); -+ -+ if (curr_pwr_lv == last_pwr_lv && dtp->sta_is_alive) { -+ dtp->sta_tx_high_power_lvl = last_pwr_lv; -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "DTP_lv not change: ((%d))\n", -+ curr_pwr_lv); -+ } else { -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "DTP_lv update: ((%d)) -> ((%d))\n", -+ last_pwr_lv, curr_pwr_lv); -+ -+ dtp->sta_last_dtp_lvl = curr_pwr_lv; -+ -+ switch (dm->ic_ip_series) { -+ #ifdef BB_RAM_SUPPORT -+ case PHYDM_IC_JGR3: -+ phydm_dtp_fill_cmninfo_2nd(dm, i, curr_pwr_lv); -+ break; -+ #endif -+ default: -+ phydm_dtp_fill_cmninfo(dm, i, curr_pwr_lv); -+ break; -+ } -+ if(!dtp->sta_is_alive) -+ dtp->sta_is_alive = true; -+ } -+ -+ if (sta_cnt == dm->number_linked_client) -+ break; -+ } -+ } -+ -+ macid_diff = bb_ctrl->macid_is_linked ^ macid_cur; -+ if (macid_diff) -+ bb_ctrl->macid_is_linked &= ~macid_diff; -+ while (macid_diff) { -+ if (macid_diff & 0x1) -+ phydm_pwr_lv_ctrl(dm, mac_id_cnt, tx_high_pwr_level_normal); -+ mac_id_cnt++; -+ macid_diff >>= 1; -+ } -+} -+ -+void odm_set_dyntxpwr(void *dm_void, u8 *desc, u8 sta_id) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[sta_id]; -+ struct dtp_info *dtp = NULL; -+ -+ if (!is_sta_active(sta)) -+ return; -+ dtp = &sta->dtp_stat; -+ -+ if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) -+ return; -+ -+ if (dm->fill_desc_dyntxpwr) -+ dm->fill_desc_dyntxpwr(dm, desc, dtp->dyn_tx_power); -+ else -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "%s: fill_desc_dyntxpwr is null!\n", __func__); -+ -+ if (dtp->last_tx_power != dtp->dyn_tx_power) { -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "%s: last_offset=%d, txpwr_offset=%d\n", __func__, -+ dtp->last_tx_power, dtp->dyn_tx_power); -+ dtp->last_tx_power = dtp->dyn_tx_power; -+ } -+} -+ -+void phydm_dtp_debug(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[7] = {0}; -+ u8 set_pwr_th1, set_pwr_th2, set_pwr_th3; -+ u8 i = 0; -+ #ifdef BB_RAM_SUPPORT -+ s8 pwr_ofst_tmp = 0x0; -+ #endif -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set DTP threhosld: {1} {Lv1_th} {Lv2_th} {Lv3_th}\n"); -+ #ifdef BB_RAM_SUPPORT -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set pwr_tx_offset: {2} {0:reg 1:macid} {en} {offset 0/1} {0:-, 1:+} {Pwr Offset} {macid}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Read pwr_tx_offset : {3} {0:reg 1:macid} {macid(0~63), 255:all}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Reset all ram pwr_tx_offset : {4}\n"); -+ #endif -+ } else { -+ for (i = 0; i < 7; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var1[i]); -+ } -+ switch (var1[0]) { -+ case 1: -+ for (i = 0; i < 3; i++) { -+ if (var1[i] == 0 || var1[i] > 100) -+ dm->set_pwr_th[i] = 0xff; -+ else -+ dm->set_pwr_th[i] = (u8)var1[1 + i]; -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DTP_TH[0:2] = {%d, %d, %d}\n", -+ dm->set_pwr_th[0], dm->set_pwr_th[1], -+ dm->set_pwr_th[2]); -+ break; -+ #ifdef BB_RAM_SUPPORT -+ case 2: -+ if ((boolean)var1[4]) -+ pwr_ofst_tmp = (s8)var1[5]; -+ else -+ pwr_ofst_tmp = 0x0 - (s8)var1[5]; -+ -+ if ((boolean)var1[1]) -+ phydm_wt_ram_pwr(dm, (u8)var1[6], -+ (boolean)var1[3], -+ (boolean)var1[2], -+ pwr_ofst_tmp); -+ else -+ phydm_wt_reg_pwr(dm, (boolean)var1[3], -+ (boolean)var1[2], -+ pwr_ofst_tmp); -+ break; -+ case 3: -+ if ((boolean)var1[1]) { -+ if ((u8)var1[2] == 0xff) -+ for (i = 0; i < 64; i++) -+ phydm_rd_ram_pwr(dm, i, &used, -+ output, -+ &out_len); -+ else -+ phydm_rd_ram_pwr(dm, (u8)var1[2], &used, -+ output, &out_len); -+ } else { -+ phydm_rd_reg_pwr(dm, &used, output, &out_len); -+ } -+ break; -+ case 4: -+ phydm_rst_ram_pwr(dm); -+ break; -+ #endif -+ } -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_dynamic_tx_power(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = NULL; -+ u8 i = 0; -+ -+ u8 rssi_min = dm->rssi_min; -+ u8 rssi_tmp = 0; -+ -+ if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) -+ return; -+ -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) { -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, -+ "[%s] RSSI_min = %d, Noisy_dec = %d\n", __func__, -+ rssi_min, dm->noisy_decision); -+ phydm_noisy_enhance_hp_th(dm, dm->noisy_decision); -+ /* Response Power */ -+ dm->dynamic_tx_high_power_lvl = phydm_pwr_lvl_check(dm, -+ rssi_min, -+ dm->last_dtp_lvl); -+ phydm_dynamic_response_power(dm); -+ } -+ /* Per STA Tx power */ -+ phydm_dtp_per_sta(dm); -+} -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+void phydm_dynamic_tx_power_init_win(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); -+ -+ mgnt_info->bDynamicTxPowerEnable = false; -+ #if DEV_BUS_TYPE == RT_USB_INTERFACE -+ if (RT_GetInterfaceSelection((PADAPTER)adapter) == -+ INTF_SEL1_USB_High_Power) { -+ mgnt_info->bDynamicTxPowerEnable = true; -+ } -+ #endif -+ -+ hal_data->LastDTPLvl = tx_high_pwr_level_normal; -+ hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal; -+ -+ PHYDM_DBG(dm, DBG_DYN_TXPWR, "[%s] DTP=%d\n", __func__, -+ mgnt_info->bDynamicTxPowerEnable); -+} -+ -+void phydm_dynamic_tx_power_win(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR)) -+ return; -+ -+ #if (RTL8814A_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8814A) -+ odm_dynamic_tx_power_8814a(dm); -+ #endif -+ -+ #if (RTL8821A_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8821) { -+ void *adapter = dm->adapter; -+ PMGNT_INFO mgnt_info = GetDefaultMgntInfo((PADAPTER)adapter); -+ -+ if (mgnt_info->RegRspPwr == 1) { -+ if (dm->rssi_min > 60) { -+ /*Resp TXAGC offset = -3dB*/ -+ odm_set_mac_reg(dm, R_0x6d8, 0x1C0000, 1); -+ } else if (dm->rssi_min < 55) { -+ /*Resp TXAGC offset = 0dB*/ -+ odm_set_mac_reg(dm, R_0x6d8, 0x1C0000, 0); -+ } -+ } -+ } -+ #endif -+} -+#endif /*@#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ -+#endif /* @#ifdef CONFIG_DYNAMIC_TX_TWR */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_dynamictxpower.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_dynamictxpower.h -new file mode 100644 -index 000000000000..88be431f421b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_dynamictxpower.h -@@ -0,0 +1,142 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMDYNAMICTXPOWER_H__ -+#define __PHYDMDYNAMICTXPOWER_H__ -+ -+#ifdef CONFIG_DYNAMIC_TX_TWR -+/* @============================================================ -+ * Definition -+ * ============================================================ -+ */ -+ -+/* 2020.6.23, Let gain_idx be initialized to 0 for linux compile warning*/ -+#define DYNAMIC_TXPWR_VERSION "2.1" -+ -+#define DTP_POWER_LEVEL_SIZE 3 -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 -+#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60 -+#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 -+#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 -+#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60 -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL3 80 -+#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL2 63 -+#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL1 55 -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL3 90 -+#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL2 85 -+#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL1 80 -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL3 90 -+#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL2 85 -+#define TX_PWR_NEAR_FIELD_TH_JGR3_LVL1 80 -+#endif -+ -+#define tx_high_pwr_level_normal 0 -+#define tx_high_pwr_level_level1 1 -+#define tx_high_pwr_level_level2 2 -+#define tx_high_pwr_level_level3 3 -+#define tx_high_pwr_level_unchange 4 -+#define DTP_FLOOR_UP_GAP 3 -+ -+/* @============================================================ -+ * enumrate -+ * ============================================================ -+ */ -+enum phydm_dtp_power_offset { -+ PHYDM_OFFSET_ZERO = 0, -+ PHYDM_OFFSET_MINUS_3DB = 1, -+ PHYDM_OFFSET_MINUS_7DB = 2, -+ PHYDM_OFFSET_MINUS_11DB = 3, -+ PHYDM_OFFSET_ADD_3DB = 4, -+ PHYDM_OFFSET_ADD_6DB = 5 -+}; -+ -+enum phydm_dtp_power_offset_2nd { -+ PHYDM_2ND_OFFSET_ZERO = 0, -+ PHYDM_2ND_OFFSET_MINUS_3DB = 1, -+ PHYDM_2ND_OFFSET_MINUS_7DB = 2, -+ PHYDM_2ND_OFFSET_MINUS_11DB = 3 -+}; -+ -+enum phydm_dtp_power_offset_bbram { -+ /*@ HW min use 1dB*/ -+ PHYDM_BBRAM_OFFSET_ZERO = 0, -+ PHYDM_BBRAM_OFFSET_MINUS_3DB = -3, -+ PHYDM_BBRAM_OFFSET_MINUS_7DB = -7, -+ PHYDM_BBRAM_OFFSET_MINUS_11DB = -11 -+}; -+ -+enum phydm_dtp_power_pkt_type { -+ RAM_PWR_OFST0 = 0, -+ RAM_PWR_OFST1 = 1, -+ REG_PWR_OFST0 = 2, -+ REG_PWR_OFST1 = 3 -+}; -+ -+/* @============================================================ -+ * structure -+ * ============================================================ -+ */ -+ -+/* @============================================================ -+ * Function Prototype -+ * ============================================================ -+ */ -+ -+extern void -+odm_set_dyntxpwr(void *dm_void, u8 *desc, u8 mac_id); -+ -+void phydm_dynamic_tx_power(void *dm_void); -+ -+void phydm_dynamic_tx_power_init(void *dm_void); -+ -+void phydm_dtp_debug(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len); -+ -+void phydm_rd_reg_pwr(void *dm_void, u32 *_used, char *output, u32 *_out_len); -+ -+void phydm_wt_reg_pwr(void *dm_void, boolean is_ofst1, boolean pwr_ofst_en, -+ s8 pwr_ofst); -+ -+void phydm_wt_ram_pwr(void *dm_void, u8 macid, boolean is_ofst1, -+ boolean pwr_ofst_en, s8 pwr_ofst); -+ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void odm_dynamic_tx_power_win(void *dm_void); -+#endif -+ -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_features.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_features.h -new file mode 100644 -index 000000000000..bbbc9edabc8d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_features.h -@@ -0,0 +1,82 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_FEATURES_H__ -+#define __PHYDM_FEATURES_H__ -+ -+#define CONFIG_RUN_IN_DRV -+#define ODM_DC_CANCELLATION_SUPPORT (ODM_RTL8188F | \ -+ ODM_RTL8710B | \ -+ ODM_RTL8192F | \ -+ ODM_RTL8821C | \ -+ ODM_RTL8822B | \ -+ ODM_RTL8721D | \ -+ ODM_RTL8723D | \ -+ ODM_RTL8710C) -+#define ODM_RECEIVER_BLOCKING_SUPPORT (ODM_RTL8188E | ODM_RTL8192E) -+#define ODM_DYM_BW_INDICATION_SUPPORT (ODM_RTL8821C | \ -+ ODM_RTL8822B | \ -+ ODM_RTL8822C) -+ -+/*@20170103 YuChen add for FW API*/ -+#define PHYDM_FW_API_ENABLE_8822B 1 -+#define PHYDM_FW_API_FUNC_ENABLE_8822B 1 -+#define PHYDM_FW_API_ENABLE_8821C 1 -+#define PHYDM_FW_API_FUNC_ENABLE_8821C 1 -+#define PHYDM_FW_API_ENABLE_8195B 1 -+#define PHYDM_FW_API_FUNC_ENABLE_8195B 1 -+#define PHYDM_FW_API_ENABLE_8198F 1 -+#define PHYDM_FW_API_FUNC_ENABLE_8198F 1 -+#define PHYDM_FW_API_ENABLE_8822C 1 -+#define PHYDM_FW_API_FUNC_ENABLE_8822C 1 -+#define PHYDM_FW_API_ENABLE_8814B 1 -+#define PHYDM_FW_API_FUNC_ENABLE_8814B 1 -+#define PHYDM_FW_API_ENABLE_8812F 1 -+#define PHYDM_FW_API_FUNC_ENABLE_8812F 1 -+#define PHYDM_FW_API_ENABLE_8197G 1 -+#define PHYDM_FW_API_FUNC_ENABLE_8197G 1 -+#define PHYDM_FW_API_ENABLE_8723F 1 -+#define PHYDM_FW_API_FUNC_ENABLE_8723F 1 -+ -+#define CONFIG_POWERSAVING 0 -+ -+#ifdef BEAMFORMING_SUPPORT -+#if (BEAMFORMING_SUPPORT) -+ #define PHYDM_BEAMFORMING_SUPPORT -+#endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "phydm_features_win.h" -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "phydm_features_ce.h" -+ /*@#include "phydm_features_ce2_kernel.h"*/ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "phydm_features_ap.h" -+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ #include "phydm_features_iot.h" -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_features_ap.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_features_ap.h -new file mode 100644 -index 000000000000..38a0eebc993a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_features_ap.h -@@ -0,0 +1,227 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_FEATURES_AP_H__ -+#define __PHYDM_FEATURES_AP_H__ -+ -+#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\ -+ RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8814B_SUPPORT ||\ -+ RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_LA_MODE_SUPPORT 1 -+#else -+ #define PHYDM_LA_MODE_SUPPORT 0 -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\ -+ RTL8192F_SUPPORT) -+ #define DYN_ANT_WEIGHTING_SUPPORT -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8198F_SUPPORT || RTL8814B_SUPPORT ||\ -+ RTL8197G_SUPPORT || RTL8812F_SUPPORT || RTL8723F_SUPPORT) -+ #define FAHM_SUPPORT -+#endif -+ -+#if (RTL8197G_SUPPORT || RTL8812F_SUPPORT || RTL8723F_SUPPORT) -+ #define IFS_CLM_SUPPORT -+#endif -+ #define NHM_SUPPORT -+ #define CLM_SUPPORT -+ -+#if (RTL8812F_SUPPORT) -+ /*#define PHYDM_PHYSTAUS_AUTO_SWITCH*/ -+#endif -+ -+#if (RTL8197F_SUPPORT) -+ /*#define PHYDM_TDMA_DIG_SUPPORT*/ -+#endif -+ -+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT ||\ -+ RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_TDMA_DIG_SUPPORT 1 -+ #ifdef PHYDM_TDMA_DIG_SUPPORT -+ #define IS_USE_NEW_TDMA /*new tdma dig test*/ -+ #endif -+#endif -+ -+#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT ||\ -+ RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT) -+ #define PHYDM_LNA_SAT_CHK_SUPPORT -+ #ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ -+ #if (RTL8197F_SUPPORT) -+ /*#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/ -+ #endif -+ -+ #if (RTL8822B_SUPPORT) -+ /*#define PHYDM_LNA_SAT_CHK_TYPE2*/ -+ #endif -+ -+ #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8812F_SUPPORT) -+ #define PHYDM_LNA_SAT_CHK_TYPE1 -+ #endif -+ #endif -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ /*#define PHYDM_POWER_TRAINING_SUPPORT*/ -+#endif -+ -+#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8812F_SUPPORT || RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_PMAC_TX_SETTING_SUPPORT -+#endif -+ -+#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8812F_SUPPORT || RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_MP_SUPPORT -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ #define PHYDM_TXA_CALIBRATION -+#endif -+ -+#if (RTL8188E_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) -+ #define PHYDM_PRIMARY_CCA -+#endif -+ -+#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8192F_SUPPORT) -+ #define PHYDM_DC_CANCELLATION -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) -+ #define CONFIG_ADAPTIVE_SOML -+#endif -+ -+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\ -+ RTL8192E_SUPPORT || RTL8723B_SUPPORT) -+ /*#define CONFIG_RA_FW_DBG_CODE*/ -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ /*#define CONFIG_8912F_SPUR_CALIBRATION*/ -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+ /* #define CONFIG_8822B_SPUR_CALIBRATION */ -+#endif -+ -+#if (RTL8197G_SUPPORT) -+ #define CONFIG_DIRECTIONAL_BF -+#endif -+ -+#if (RTL8197G_SUPPORT || RTL8812F_SUPPORT || RTL8814B_SUPPORT) -+ #define CONFIG_DYNAMIC_TX_TWR -+#endif -+ -+#if (RTL8197G_SUPPORT || RTL8812F_SUPPORT) -+ #define PHYDM_HW_IGI -+#endif -+ -+#if (RTL8197G_SUPPORT || RTL8812F_SUPPORT) -+ #define CONFIG_DYNAMIC_TXCOLLISION_TH -+#endif -+ -+/*#define CONFIG_PSD_TOOL*/ -+#define PHYDM_SUPPORT_CCKPD -+#define PHYDM_SUPPORT_ADAPTIVITY -+/*#define CONFIG_PATH_DIVERSITY*/ -+/*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -+/*#define CONFIG_RA_DYNAMIC_RATE_ID*/ -+#define CONFIG_BB_TXBF_API -+/*#define ODM_CONFIG_BT_COEXIST*/ -+#define PHYDM_SUPPORT_RSSI_MONITOR -+#if !defined(CONFIG_DISABLE_PHYDM_DEBUG_FUNCTION) -+ #define CONFIG_PHYDM_DEBUG_FUNCTION -+#endif -+ -+/* [ Configure Antenna Diversity ] */ -+#if (RTL8188F_SUPPORT) -+ #ifdef CONFIG_ANTENNA_DIVERSITY -+ #define CONFIG_PHYDM_ANTENNA_DIVERSITY -+ #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ #endif -+#endif -+ -+#if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH) || defined(CONFIG_RTL_8197F_ANT_SWITCH) || defined(CONFIG_RTL_8197G_ANT_SWITCH) -+ #define CONFIG_PHYDM_ANTENNA_DIVERSITY -+ #define ODM_EVM_ENHANCE_ANTDIV -+ /*#define SKIP_EVM_ANTDIV_TRAINING_PATCH*/ -+ -+ /*----------*/ -+ #ifdef CONFIG_NO_2G_DIVERSITY_8197F -+ #define CONFIG_NO_2G_DIVERSITY -+ #elif defined(CONFIG_2G_CGCS_RX_DIVERSITY_8197F) -+ #define CONFIG_2G_CGCS_RX_DIVERSITY -+ #elif defined(CONFIG_2G_CG_TRX_DIVERSITY_8197F) -+ #define CONFIG_2G_CG_TRX_DIVERSITY -+ #endif -+ -+ /*----------*/ -+ #ifdef CONFIG_NO_2G_DIVERSITY_8197G -+ #define CONFIG_NO_2G_DIVERSITY -+ #elif defined(CONFIG_2G_CGCS_RX_DIVERSITY_8197G) -+ #define CONFIG_2G_CGCS_RX_DIVERSITY -+ #elif defined(CONFIG_2G_CG_TRX_DIVERSITY_8197G) -+ #define CONFIG_2G_CG_TRX_DIVERSITY -+ #endif -+ -+ #if (!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) -+ #define CONFIG_NO_2G_DIVERSITY -+ #endif -+ -+ #ifdef CONFIG_NO_5G_DIVERSITY_8881A -+ #define CONFIG_NO_5G_DIVERSITY -+ #elif defined(CONFIG_5G_CGCS_RX_DIVERSITY_8881A) -+ #define CONFIG_5G_CGCS_RX_DIVERSITY -+ #elif defined(CONFIG_5G_CG_TRX_DIVERSITY_8881A) -+ #define CONFIG_5G_CG_TRX_DIVERSITY -+ #elif defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) -+ #define CONFIG_2G5G_CG_TRX_DIVERSITY -+ #endif -+ #if (!defined(CONFIG_NO_5G_DIVERSITY) && !defined(CONFIG_5G_CGCS_RX_DIVERSITY) && !defined(CONFIG_5G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY) && !defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) -+ #define CONFIG_NO_5G_DIVERSITY -+ #endif -+ /*----------*/ -+ #if (defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY)) -+ #define CONFIG_NOT_SUPPORT_ANTDIV -+ #elif (!defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY)) -+ #define CONFIG_2G_SUPPORT_ANTDIV -+ #elif (defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY)) -+ #define CONFIG_5G_SUPPORT_ANTDIV -+ #elif ((!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY)) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY)) -+ #define CONFIG_2G5G_SUPPORT_ANTDIV -+ #endif -+ /*----------*/ -+#endif /*Antenna Diveristy*/ -+ -+/*[SmartAntenna]*/ -+/*#define CONFIG_SMART_ANTENNA*/ -+#ifdef CONFIG_SMART_ANTENNA -+ /*#define CONFIG_CUMITEK_SMART_ANTENNA*/ -+#endif -+#define CFG_DIG_DAMPING_CHK -+/* --------------------------------------------------*/ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ #if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\ -+ RTL8814B_SUPPORT || RTL8812F_SUPPORT) -+ #define DRIVER_BEAMFORMING_VERSION2 -+ #endif -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_features_ce.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_features_ce.h -new file mode 100644 -index 000000000000..5c11753e1bfa ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_features_ce.h -@@ -0,0 +1,245 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_FEATURES_CE_H__ -+#define __PHYDM_FEATURES_CE_H__ -+ -+#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\ -+ RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_LA_MODE_SUPPORT 1 -+#else -+ #define PHYDM_LA_MODE_SUPPORT 0 -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\ -+ RTL8192F_SUPPORT) -+ #define DYN_ANT_WEIGHTING_SUPPORT -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8814B_SUPPORT || RTL8723F_SUPPORT) -+ #define FAHM_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT || RTL8723F_SUPPORT) -+ #define IFS_CLM_SUPPORT -+#endif -+ #define NHM_SUPPORT -+ #define CLM_SUPPORT -+ -+#if (RTL8822C_SUPPORT) -+ #define NHM_DYM_PW_TH_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ /*@#define PHYDM_PHYSTAUS_AUTO_SWITCH*/ -+#endif -+ -+/*@#define PHYDM_TDMA_DIG_SUPPORT*/ -+ -+#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8723D_SUPPORT ) -+ #ifdef CONFIG_TDMADIG -+ #define PHYDM_TDMA_DIG_SUPPORT -+ #ifdef PHYDM_TDMA_DIG_SUPPORT -+ #define IS_USE_NEW_TDMA /*new tdma dig test*/ -+ #endif -+ #endif -+#endif -+ -+#if (RTL8814B_SUPPORT) -+ /*@#define PHYDM_TDMA_DIG_SUPPORT*/ -+ #ifdef PHYDM_TDMA_DIG_SUPPORT -+ /*@#define IS_USE_NEW_TDMA*/ /*new tdma dig test*/ -+ #endif -+#endif -+ -+#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT || RTL8814B_SUPPORT) -+ /*@#define PHYDM_LNA_SAT_CHK_SUPPORT*/ -+ #ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ -+ #if (RTL8197F_SUPPORT) -+ /*@#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/ -+ #endif -+ -+ #if (RTL8822B_SUPPORT) -+ /*@#define PHYDM_LNA_SAT_CHK_TYPE2*/ -+ #endif -+ -+ #if (RTL8814B_SUPPORT) -+ /*@#define PHYDM_LNA_SAT_CHK_TYPE1*/ -+ #endif -+ #endif -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8723D_SUPPORT) -+ #define PHYDM_POWER_TRAINING_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_PMAC_TX_SETTING_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_MP_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ #define PHYDM_CCK_RX_PATHDIV_SUPPORT -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ #define PHYDM_TXA_CALIBRATION -+#endif -+ -+#if (RTL8188E_SUPPORT) -+ #define PHYDM_PRIMARY_CCA -+#endif -+ -+#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8192F_SUPPORT) -+ #define PHYDM_DC_CANCELLATION -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) -+ #define CONFIG_ADAPTIVE_SOML -+#endif -+ -+#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT) -+ #define CONFIG_RECEIVER_BLOCKING -+#endif -+ -+#if (RTL8821C_SUPPORT || RTL8822C_SUPPORT || RTL8822B_SUPPORT) -+ #define CONFIG_BW_INDICATION -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ /*#define CONFIG_8912F_SPUR_CALIBRATION*/ -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ #define CONFIG_8822B_SPUR_CALIBRATION -+#endif -+ -+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR -+#define CONFIG_DYNAMIC_TX_TWR -+#endif -+#if (RTL8822C_SUPPORT) -+#define PHYDM_HW_IGI -+#endif -+#define PHYDM_SUPPORT_CCKPD -+#define PHYDM_SUPPORT_ADAPTIVITY -+ -+/*@Antenna Diversity*/ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ #define CONFIG_PHYDM_ANTENNA_DIVERSITY -+ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ -+ #if (RTL8723B_SUPPORT || RTL8821A_SUPPORT ||\ -+ RTL8188F_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8723D_SUPPORT) -+ #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ #endif -+ -+ #if (RTL8821A_SUPPORT) -+ /*@#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ -+ #endif -+ -+ #if (RTL8822B_SUPPORT) -+ /*@#define CONFIG_HL_SMART_ANTENNA_TYPE2*/ -+ #endif -+ -+ #endif -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8822C_SUPPORT || RTL8192F_SUPPORT) -+ #define CONFIG_PATH_DIVERSITY -+#endif -+ -+/*@[SmartAntenna]*/ -+/*@#define CONFIG_SMART_ANTENNA*/ -+#ifdef CONFIG_SMART_ANTENNA -+ /*@#define CONFIG_CUMITEK_SMART_ANTENNA*/ -+#endif -+/* @--------------------------------------------------*/ -+ -+#ifdef CONFIG_DFS_MASTER -+ #define CONFIG_PHYDM_DFS_MASTER -+#endif -+ -+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\ -+ RTL8192E_SUPPORT || RTL8723B_SUPPORT) -+ /*@#define CONFIG_RA_FW_DBG_CODE*/ -+#endif -+ -+#define CONFIG_PSD_TOOL -+/*@#define CONFIG_ANT_DETECTION*/ -+/*@#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -+#define CONFIG_BB_TXBF_API -+#define CONFIG_PHYDM_DEBUG_FUNCTION -+ -+#ifdef CONFIG_BT_COEXIST -+ #define ODM_CONFIG_BT_COEXIST -+#endif -+#define PHYDM_SUPPORT_RSSI_MONITOR -+#define PHYDM_AUTO_DEGBUG -+#define CFG_DIG_DAMPING_CHK -+ -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ #if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8192E_SUPPORT ||\ -+ RTL8814A_SUPPORT || RTL8881A_SUPPORT) -+ #define PHYDM_BEAMFORMING_VERSION1 -+ #endif -+ #if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8814B_SUPPORT) -+ #define DRIVER_BEAMFORMING_VERSION2 -+ #endif -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8822C_SUPPORT) -+ #ifdef CONFIG_MCC_MODE -+ #define CONFIG_MCC_DM -+ #endif -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ #ifdef CONFIG_DYNAMIC_BYPASS_MODE -+ #define CONFIG_DYNAMIC_BYPASS -+ #endif -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT) -+ #define CONFIG_DIRECTIONAL_BF -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ #define CONFIG_MU_RSOML -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_features_ce2_kernel.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_features_ce2_kernel.h -new file mode 100644 -index 000000000000..c206ea605892 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_features_ce2_kernel.h -@@ -0,0 +1,84 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_FEATURES_CE_H__ -+#define __PHYDM_FEATURES_CE_H__ -+ -+#define PHYDM_LA_MODE_SUPPORT 0 -+ -+#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\ -+ RTL8192F_SUPPORT) -+ #define DYN_ANT_WEIGHTING_SUPPORT -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT) -+ #define FAHM_SUPPORT -+#endif -+ #define NHM_SUPPORT -+ #define CLM_SUPPORT -+ -+#if (RTL8822B_SUPPORT) -+ #define PHYDM_TXA_CALIBRATION -+#endif -+ -+#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8192F_SUPPORT) -+ #define PHYDM_DC_CANCELLATION -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ /*#define CONFIG_8912F_SPUR_CALIBRATION*/ -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+ /* #define CONFIG_8822B_SPUR_CALIBRATION */ -+#endif -+ -+#define PHYDM_SUPPORT_CCKPD -+#define PHYDM_SUPPORT_ADAPTIVITY -+ -+#ifdef CONFIG_DFS_MASTER -+ #define CONFIG_PHYDM_DFS_MASTER -+#endif -+ -+#define CONFIG_BB_TXBF_API -+#define CONFIG_PHYDM_DEBUG_FUNCTION -+ -+#ifdef CONFIG_BT_COEXIST -+ #define ODM_CONFIG_BT_COEXIST -+#endif -+#define PHYDM_SUPPORT_RSSI_MONITOR -+#define CFG_DIG_DAMPING_CHK -+ -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ #if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8814B_SUPPORT) -+ #define DRIVER_BEAMFORMING_VERSION2 -+ #endif -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_features_iot.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_features_iot.h -new file mode 100644 -index 000000000000..ce8793eb6ae4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_features_iot.h -@@ -0,0 +1,177 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_FEATURES_IOT_H__ -+#define __PHYDM_FEATURES_IOT_H__ -+ -+#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\ -+ RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8195B_SUPPORT) -+ #define PHYDM_LA_MODE_SUPPORT 1 -+#else -+ #define PHYDM_LA_MODE_SUPPORT 0 -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\ -+ RTL8192F_SUPPORT) -+ #define DYN_ANT_WEIGHTING_SUPPORT -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT) -+ #define FAHM_SUPPORT -+#endif -+ #define NHM_SUPPORT -+ #define CLM_SUPPORT -+ -+/*#define PHYDM_TDMA_DIG_SUPPORT*/ -+ -+#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT) -+ /*#define PHYDM_LNA_SAT_CHK_SUPPORT*/ -+ #ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ #if (RTL8197F_SUPPORT) -+ /*#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/ -+ #endif -+ -+ #if (RTL8822B_SUPPORT) -+ /*#define PHYDM_LNA_SAT_CHK_TYPE2*/ -+ #endif -+ #endif -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8721D_SUPPORT || RTL8710C_SUPPORT) -+ #define PHYDM_POWER_TRAINING_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ /* #define PHYDM_PMAC_TX_SETTING_SUPPORT */ -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ /* #define PHYDM_MP_SUPPORT */ -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ #define PHYDM_TXA_CALIBRATION -+#endif -+ -+#if (RTL8188E_SUPPORT) -+ #define PHYDM_PRIMARY_CCA -+#endif -+ -+#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8721D_SUPPORT || RTL8710C_SUPPORT) -+ #define PHYDM_DC_CANCELLATION -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) -+ #define CONFIG_ADAPTIVE_SOML -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ /*#define CONFIG_DYNAMIC_RX_PATH*/ -+#endif -+ -+#if (RTL8822B_SUPPORT == 1) -+ /* #define CONFIG_8822B_SPUR_CALIBRATION */ -+#endif -+ -+#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT) -+ #define CONFIG_RECEIVER_BLOCKING -+#endif -+ -+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR -+#define CONFIG_DYNAMIC_TX_TWR -+#endif -+#define PHYDM_SUPPORT_CCKPD -+#define PHYDM_SUPPORT_ADAPTIVITY -+ -+/*Antenna Diversity*/ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ #define CONFIG_PHYDM_ANTENNA_DIVERSITY -+ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ -+ #if (RTL8723B_SUPPORT || RTL8821A_SUPPORT ||\ -+ RTL8188F_SUPPORT || RTL8821C_SUPPORT || RTL8195B_SUPPORT) -+ #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ #endif -+ -+ #if (RTL8710C_SUPPORT) -+ //#define CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ #endif -+ -+ #if (RTL8821A_SUPPORT) -+ /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ -+ #endif -+ -+ #if (RTL8822B_SUPPORT) -+ /*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/ -+ #endif -+ #endif -+#endif -+ -+/*[SmartAntenna]*/ -+/*#define CONFIG_SMART_ANTENNA*/ -+#ifdef CONFIG_SMART_ANTENNA -+ /*#define CONFIG_CUMITEK_SMART_ANTENNA*/ -+#endif -+/* --------------------------------------------------*/ -+ -+#ifdef CONFIG_DFS_MASTER -+ #define CONFIG_PHYDM_DFS_MASTER -+#endif -+ -+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\ -+ RTL8192E_SUPPORT || RTL8723B_SUPPORT) -+ /*#define CONFIG_RA_FW_DBG_CODE*/ -+#endif -+ -+#define CONFIG_PSD_TOOL -+/*#define CONFIG_RA_DBG_CMD*/ -+/*#define CONFIG_ANT_DETECTION*/ -+/*#define CONFIG_PATH_DIVERSITY*/ -+/*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -+//#define CONFIG_BB_TXBF_API -+#if DBG -+#define CONFIG_PHYDM_DEBUG_FUNCTION -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+ #define ODM_CONFIG_BT_COEXIST -+#endif -+#define PHYDM_SUPPORT_RSSI_MONITOR -+/*#define PHYDM_AUTO_DEGBUG*/ -+#define CFG_DIG_DAMPING_CHK -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ #if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8814B_SUPPORT) -+ #define DRIVER_BEAMFORMING_VERSION2 -+ #define CONFIG_BB_TXBF_API -+ #endif -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_features_win.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_features_win.h -new file mode 100644 -index 000000000000..824699e6200c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_features_win.h -@@ -0,0 +1,215 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_FEATURES_WIN_H__ -+#define __PHYDM_FEATURES_WIN_H__ -+ -+#if (RTL8814A_SUPPORT || RTL8821C_SUPPORT || RTL8822B_SUPPORT ||\ -+ RTL8197F_SUPPORT || RTL8192F_SUPPORT || RTL8198F_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_LA_MODE_SUPPORT 1 -+#else -+ #define PHYDM_LA_MODE_SUPPORT 0 -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8812A_SUPPORT || RTL8197F_SUPPORT ||\ -+ RTL8192F_SUPPORT) -+ #define DYN_ANT_WEIGHTING_SUPPORT -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8814B_SUPPORT || RTL8723F_SUPPORT) -+ #define FAHM_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT || RTL8723F_SUPPORT) -+ #define IFS_CLM_SUPPORT -+#endif -+ #define NHM_SUPPORT -+ #define CLM_SUPPORT -+ -+#if (RTL8822C_SUPPORT) -+ #define NHM_DYM_PW_TH_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ #define PHYDM_PHYSTAUS_AUTO_SWITCH -+#endif -+ -+/*#define PHYDM_TDMA_DIG_SUPPORT*/ -+ -+#if (RTL8814B_SUPPORT) -+ /*#define PHYDM_TDMA_DIG_SUPPORT*/ -+ #ifdef PHYDM_TDMA_DIG_SUPPORT -+ /*#define IS_USE_NEW_TDMA*/ /*new tdma dig test*/ -+ #endif -+#endif -+ -+#if (RTL8197F_SUPPORT || RTL8822B_SUPPORT || RTL8814B_SUPPORT) -+ /*#define PHYDM_LNA_SAT_CHK_SUPPORT*/ -+ #ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ -+ #if (RTL8197F_SUPPORT) -+ /*#define PHYDM_LNA_SAT_CHK_SUPPORT_TYPE1*/ -+ #endif -+ -+ #if (RTL8822B_SUPPORT) -+ /*#define PHYDM_LNA_SAT_CHK_TYPE2*/ -+ #endif -+ -+ #if (RTL8814B_SUPPORT) -+ /*#define PHYDM_LNA_SAT_CHK_TYPE1*/ -+ #endif -+ #endif -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8710B_SUPPORT || RTL8723D_SUPPORT ||\ -+ RTL8192F_SUPPORT) -+ #define PHYDM_POWER_TRAINING_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_PMAC_TX_SETTING_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT || RTL8814B_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_MP_SUPPORT -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ #define PHYDM_CCK_RX_PATHDIV_SUPPORT -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ #define PHYDM_TXA_CALIBRATION -+#endif -+ -+#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT) -+ #define PHYDM_PRIMARY_CCA -+#endif -+ -+#if (RTL8188F_SUPPORT || RTL8710B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8192F_SUPPORT) -+ #define PHYDM_DC_CANCELLATION -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT) -+ #define CONFIG_ADAPTIVE_SOML -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ #define CONFIG_8912F_SPUR_CALIBRATION -+#endif -+ -+/*Antenna Diversity*/ -+#define CONFIG_PHYDM_ANTENNA_DIVERSITY -+#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ -+ #if (RTL8723B_SUPPORT || RTL8821A_SUPPORT || RTL8188F_SUPPORT ||\ -+ RTL8821C_SUPPORT || RTL8723D_SUPPORT) -+ #define CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ #endif -+ -+ #if (RTL8822B_SUPPORT) -+ /*#define ODM_EVM_ENHANCE_ANTDIV*/ -+ /*#define CONFIG_2T3R_ANTENNA*/ -+ /*#define CONFIG_2T4R_ANTENNA*/ -+ #endif -+ -+ /* --[SmtAnt]-----------------------------------------*/ -+ #if (RTL8821A_SUPPORT) -+ /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ -+ #define CONFIG_FAT_PATCH -+ #endif -+ -+ #if (RTL8822B_SUPPORT) -+ /*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/ -+ #endif -+ -+ #if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1) || defined(CONFIG_HL_SMART_ANTENNA_TYPE2)) -+ #define CONFIG_HL_SMART_ANTENNA -+ #endif -+ -+ /* --------------------------------------------------*/ -+ -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8822C_SUPPORT || RTL8192F_SUPPORT) -+ #define CONFIG_PATH_DIVERSITY -+#endif -+ -+/*[SmartAntenna]*/ -+#define CONFIG_SMART_ANTENNA -+#ifdef CONFIG_SMART_ANTENNA -+ /*#define CONFIG_CUMITEK_SMART_ANTENNA*/ -+#endif -+ /* --------------------------------------------------*/ -+ -+#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT) -+ #define CONFIG_RECEIVER_BLOCKING -+#endif -+ -+#if (RTL8821C_SUPPORT || RTL8822C_SUPPORT || RTL8822B_SUPPORT) -+ #define CONFIG_BW_INDICATION -+#endif -+ -+#if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8881A_SUPPORT ||\ -+ RTL8192E_SUPPORT || RTL8723B_SUPPORT) -+ #define CONFIG_RA_FW_DBG_CODE -+#endif -+ -+/* #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR */ -+#define CONFIG_DYNAMIC_TX_TWR -+/* #endif */ -+#if (RTL8822C_SUPPORT) -+#define PHYDM_HW_IGI -+#endif -+#define CONFIG_PSD_TOOL -+#define PHYDM_SUPPORT_ADAPTIVITY -+#define PHYDM_SUPPORT_CCKPD -+#if (defined(PHYDM_SUPPORT_CCKPD) && RTL8822C_SUPPORT) -+ #define PHYDM_DCC_ENHANCE -+#endif -+/*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -+#define CONFIG_ANT_DETECTION -+#define CONFIG_BB_TXBF_API -+#define ODM_CONFIG_BT_COEXIST -+#define CONFIG_PHYDM_DFS_MASTER -+#define PHYDM_SUPPORT_RSSI_MONITOR -+#define PHYDM_AUTO_DEGBUG -+#define CONFIG_PHYDM_DEBUG_FUNCTION -+#define CFG_DIG_DAMPING_CHK -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ #if (RTL8812A_SUPPORT || RTL8821A_SUPPORT || RTL8192E_SUPPORT ||\ -+ RTL8814A_SUPPORT || RTL8881A_SUPPORT) -+ #define PHYDM_BEAMFORMING_VERSION1 -+ #endif -+ #if (RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8198F_SUPPORT ||\ -+ RTL8822C_SUPPORT || RTL8814B_SUPPORT) -+ #define DRIVER_BEAMFORMING_VERSION2 -+ #endif -+#endif -+ -+#if (RTL8822B_SUPPORT || RTL8192F_SUPPORT) -+ /*#define CONFIG_DIRECTIONAL_BF*/ -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ #define CONFIG_MU_RSOML -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_hwconfig.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_hwconfig.c -new file mode 100644 -index 000000000000..1e3589183974 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_hwconfig.c -@@ -0,0 +1,1674 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm)) -+#define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm)) -+ -+#if (PHYDM_TESTCHIP_SUPPORT == 1) -+#define READ_AND_CONFIG(ic, txt) \ -+ do { \ -+ if (dm->is_mp_chip) \ -+ READ_AND_CONFIG_MP(ic, txt); \ -+ else \ -+ READ_AND_CONFIG_TC(ic, txt); \ -+ } while (0) -+#else -+#define READ_AND_CONFIG READ_AND_CONFIG_MP -+#endif -+ -+#define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt()) -+#define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt()) -+ -+#if (PHYDM_TESTCHIP_SUPPORT == 1) -+#define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt)) -+#else -+#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt) -+#endif -+ -+enum hal_status -+odm_config_rf_with_header_file(struct dm_struct *dm, -+ enum odm_rf_config_type config_type, -+ u8 e_rf_path) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; -+#endif -+ enum hal_status result = HAL_STATUS_SUCCESS; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__, -+ (dm->is_mp_chip) ? "MPChip" : "TestChip"); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", -+ dm->support_platform, dm->support_interface, dm->board_type); -+ -+/* @1 AP doesn't use PHYDM power tracking table in these ICs */ -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if (RTL8812A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8812) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8812a, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8812a, _radiob); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ if ((hal_data->EEPROMSVID == 0x17AA && hal_data->EEPROMSMID == 0xA811) || -+ (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0xA812) || -+ (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0x8812)) -+ READ_AND_CONFIG_MP(8812a, _txpwr_lmt_hm812a03); -+ else -+#endif -+ READ_AND_CONFIG_MP(8812a, _txpwr_lmt); -+ } -+ } -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8821a, _radioa); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ if (dm->support_interface == ODM_ITRF_USB) { -+ if (dm->ext_pa_5g || dm->ext_lna_5g) -+ READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_fem); -+ else -+ READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_ipa); -+ } else { -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (mgnt_info->CustomerID == RT_CID_8821AE_ASUS_MB) -+ READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_8mm); -+ else if (mgnt_info->CustomerID == RT_CID_ASUS_NB) -+ READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_5mm); -+ else -+#endif -+ READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a); -+ } -+ } -+ } -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8192E) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8192e, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8192e, _radiob); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/ -+ HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ -+ if ((hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8192) || -+ (hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8193)) -+ READ_AND_CONFIG_MP(8192e, _txpwr_lmt_8192e_sar_5mm); -+ else -+#endif -+ READ_AND_CONFIG_MP(8192e, _txpwr_lmt); -+ } -+ } -+#endif -+#if (RTL8723D_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8723D) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8723d, _radioa); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ READ_AND_CONFIG_MP(8723d, _txpwr_lmt); -+ } -+ } -+#endif -+/* @JJ ADD 20161014 */ -+#if (RTL8710B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8710B) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8710b, _radioa); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) -+ READ_AND_CONFIG_MP(8710b, _txpwr_lmt); -+ } -+#endif -+ -+#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */ -+/* @1 All platforms support */ -+#if (RTL8188E_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188E) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8188e, _radioa); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) -+ READ_AND_CONFIG_MP(8188e, _txpwr_lmt); -+ } -+#endif -+#if (RTL8723B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8723B) { -+ if (config_type == CONFIG_RF_RADIO) -+ READ_AND_CONFIG_MP(8723b, _radioa); -+ else if (config_type == CONFIG_RF_TXPWR_LMT) -+ READ_AND_CONFIG_MP(8723b, _txpwr_lmt); -+ } -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8814A) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8814a, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8814a, _radiob); -+ else if (e_rf_path == RF_PATH_C) -+ READ_AND_CONFIG_MP(8814a, _radioc); -+ else if (e_rf_path == RF_PATH_D) -+ READ_AND_CONFIG_MP(8814a, _radiod); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type0); -+ else if (dm->rfe_type == 1) -+ READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type1); -+ else if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type2); -+ else if (dm->rfe_type == 3) -+ READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type3); -+ else if (dm->rfe_type == 5) -+ READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type5); -+ else if (dm->rfe_type == 7) -+ READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type7); -+ else if (dm->rfe_type == 8) -+ READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type8); -+ else -+ READ_AND_CONFIG_MP(8814a, _txpwr_lmt); -+ } -+ } -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8703B) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8703b, _radioa); -+ } -+ } -+#endif -+#if (RTL8188F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188F) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8188f, _radioa); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) -+ READ_AND_CONFIG_MP(8188f, _txpwr_lmt); -+ } -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8822b, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8822b, _radiob); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ if (dm->rfe_type == 5) -+ READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type5); -+ else if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type2); -+ else if (dm->rfe_type == 3) -+ READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type3); -+ else if (dm->rfe_type == 4) -+ READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type4); -+ else if (dm->rfe_type == 12) -+ READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type12); -+ else if (dm->rfe_type == 15) -+ READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type15); -+ else if (dm->rfe_type == 16) -+ READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type16); -+ else if (dm->rfe_type == 17) -+ READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type17); -+ else if (dm->rfe_type == 18) -+ READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type18); -+ //else if (dm->rfe_type == 19) -+ //READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type19); -+ else -+ READ_AND_CONFIG_MP(8822b, _txpwr_lmt); -+ } -+ } -+#endif -+ -+#if (RTL8197F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197F) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8197f, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8197f, _radiob); -+ } -+ } -+#endif -+/*@jj add 20170822*/ -+#if (RTL8192F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8192F) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8192f, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8192f, _radiob); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type0); -+ else if (dm->rfe_type == 1) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type1); -+ else if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type2); -+ else if (dm->rfe_type == 3) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type3); -+ else if (dm->rfe_type == 4) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type4); -+ else if (dm->rfe_type == 5) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type5); -+ else if (dm->rfe_type == 6) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type6); -+ else if (dm->rfe_type == 7) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type7); -+ else if (dm->rfe_type == 8) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type8); -+ else if (dm->rfe_type == 9) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type9); -+ else if (dm->rfe_type == 10) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type10); -+ else if (dm->rfe_type == 11) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type11); -+ else if (dm->rfe_type == 12) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type12); -+ else if (dm->rfe_type == 13) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type13); -+ else if (dm->rfe_type == 14) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type14); -+ else if (dm->rfe_type == 15) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type15); -+ else if (dm->rfe_type == 16) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type16); -+ else if (dm->rfe_type == 17) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type17); -+ else if (dm->rfe_type == 18) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type18); -+ else if (dm->rfe_type == 19) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type19); -+ else if (dm->rfe_type == 20) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type20); -+ else if (dm->rfe_type == 21) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type21); -+ else if (dm->rfe_type == 22) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type22); -+ else if (dm->rfe_type == 23) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type23); -+ else if (dm->rfe_type == 24) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type24); -+ else if (dm->rfe_type == 25) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type25); -+ else if (dm->rfe_type == 26) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type26); -+ else if (dm->rfe_type == 27) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type27); -+ else if (dm->rfe_type == 28) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type28); -+ else if (dm->rfe_type == 29) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type29); -+ else if (dm->rfe_type == 30) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type30); -+ else if (dm->rfe_type == 31) -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type31); -+ else -+ READ_AND_CONFIG_MP(8192f, _txpwr_lmt); -+ } -+ } -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8721D) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8721d, _radioa); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ if (dm->power_voltage == ODM_POWER_18V) -+ READ_AND_CONFIG_MP(8721d, _txpwr_lmt_type0); -+ else -+ READ_AND_CONFIG_MP(8721d, _txpwr_lmt_type1); -+ } -+ } -+#endif -+ -+#if (RTL8710C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8710C) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8710c, _radioa); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) -+ READ_AND_CONFIG_MP(8710c, _txpwr_lmt); -+ } -+#endif -+ -+#if (RTL8821C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821C) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG(8821c, _radioa); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ READ_AND_CONFIG(8821c, _txpwr_lmt); -+ } -+ } -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195B) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG(8195b, _radioa); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ READ_AND_CONFIG(8195b, _txpwr_lmt); -+ } -+ } -+#endif -+#if (RTL8198F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8198F) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8198f, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8198f, _radiob); -+ else if (e_rf_path == RF_PATH_C) -+ READ_AND_CONFIG_MP(8198f, _radioc); -+ else if (e_rf_path == RF_PATH_D) -+ READ_AND_CONFIG_MP(8198f, _radiod); -+ } -+ } -+#endif -+/*#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8814b, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8814b, _radiob); -+ else if (e_rf_path == RF_PATH_C) -+ READ_AND_CONFIG_MP(8814b, _radioc); -+ else if (e_rf_path == RF_PATH_D) -+ READ_AND_CONFIG_MP(8814b, _radiod); -+ } -+ } -+#endif -+*/ -+#if (RTL8822C_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8822c, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8822c, _radiob); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ if (dm->rfe_type == 5) -+ READ_AND_CONFIG_MP(8822c, _txpwr_lmt_type5); -+ else -+ READ_AND_CONFIG_MP(8822c, _txpwr_lmt); -+ } -+ } -+#endif -+#if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8723F) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8723f, _radioa); -+ if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8723f, _radiob); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ READ_AND_CONFIG_MP(8723f, _txpwr_lmt); -+ } -+ } -+#endif -+#if (RTL8812F_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8812F) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8812f, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8812f, _radiob); -+ } -+ } -+#endif -+#if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8197G) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8197g, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8197g, _radiob); -+ } -+ } -+#endif -+ -+ /*8814B need review, when phydm has related files*/ -+ #if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ if (config_type == CONFIG_RF_RADIO) { -+ if (e_rf_path == RF_PATH_A) -+ READ_AND_CONFIG_MP(8814b, _radioa); -+ else if (e_rf_path == RF_PATH_B) -+ READ_AND_CONFIG_MP(8814b, _radiob); -+ else if (e_rf_path == RF_PATH_C) -+ READ_AND_CONFIG_MP(8814b, _radioc); -+ else if (e_rf_path == RF_PATH_D) -+ READ_AND_CONFIG_MP(8814b, _radiod); -+ } -+ if (config_type == CONFIG_RF_SYN_RADIO) { -+ if (e_rf_path == RF_SYN0) -+ READ_AND_CONFIG_MP(8814b, _radiosyn0); -+ else if (e_rf_path == RF_SYN1) -+ READ_AND_CONFIG_MP(8814b, _radiosyn1); -+ } else if (config_type == CONFIG_RF_TXPWR_LMT) { -+ READ_AND_CONFIG_MP(8814b, _txpwr_lmt); -+ } -+ } -+ #endif -+ -+ if (config_type == CONFIG_RF_RADIO) { -+ if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) { -+ result = phydm_set_reg_by_fw(dm, -+ PHYDM_HALMAC_CMD_END, -+ 0, -+ 0, -+ 0, -+ (enum rf_path)0, -+ 0); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "rf param offload end!result = %d", result); -+ } -+ } -+ -+ return result; -+} -+ -+enum hal_status -+odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm) -+{ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__, -+ (dm->is_mp_chip) ? "MPChip" : "TestChip"); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", -+ dm->support_platform, dm->support_interface, dm->board_type); -+ -+/* @1 AP doesn't use PHYDM power tracking table in these ICs */ -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if RTL8821A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8821) { -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8821a, _txpowertrack_pcie); -+ else if (dm->support_interface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8821a, _txpowertrack_usb); -+ else if (dm->support_interface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8821a, _txpowertrack_sdio); -+ } -+#endif -+#if RTL8812A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8812) { -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8812a, _txpowertrack_pcie); -+ else if (dm->support_interface == ODM_ITRF_USB) { -+ if (dm->rfe_type == 3 && dm->is_mp_chip) -+ READ_AND_CONFIG_MP(8812a, _txpowertrack_rfe3); -+ else -+ READ_AND_CONFIG_MP(8812a, _txpowertrack_usb); -+ } -+ } -+#endif -+#if RTL8192E_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8192E) { -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8192e, _txpowertrack_pcie); -+ else if (dm->support_interface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8192e, _txpowertrack_usb); -+ else if (dm->support_interface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8192e, _txpowertrack_sdio); -+ } -+#endif -+#if RTL8723D_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8723D) { -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8723d, _txpowertrack_pcie); -+ else if (dm->support_interface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8723d, _txpowertrack_usb); -+ else if (dm->support_interface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8723d, _txpowertrack_sdio); -+ -+ READ_AND_CONFIG_MP(8723d, _txxtaltrack); -+ } -+#endif -+/* @JJ ADD 20161014 */ -+#if RTL8710B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8710B) { -+ if (dm->package_type == 1) -+ READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_smic); -+ else if (dm->package_type == 5) -+ READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_umc); -+ -+ READ_AND_CONFIG_MP(8710b, _txxtaltrack); -+ } -+#endif -+#if RTL8188E_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8188E) { -+ if (odm_get_mac_reg(dm, R_0xf0, 0xF000) >= 8) { /*@if 0xF0[15:12] >= 8, SMIC*/ -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie_icut); -+ else if (dm->support_interface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8188e, _txpowertrack_usb_icut); -+ else if (dm->support_interface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio_icut); -+ } else { /*@else 0xF0[15:12] < 8, TSMC*/ -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie); -+ else if (dm->support_interface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8188e, _txpowertrack_usb); -+ else if (dm->support_interface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio); -+ } -+ } -+#endif -+#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */ -+/* @1 All platforms support */ -+#if RTL8723B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8723B) { -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ READ_AND_CONFIG_MP(8723b, _txpowertrack_pcie); -+ else if (dm->support_interface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8723b, _txpowertrack_usb); -+ else if (dm->support_interface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8723b, _txpowertrack_sdio); -+ } -+#endif -+#if RTL8814A_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8814A) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8814a, _txpowertrack_type0); -+ else if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8814a, _txpowertrack_type2); -+ else if (dm->rfe_type == 5) -+ READ_AND_CONFIG_MP(8814a, _txpowertrack_type5); -+ else if (dm->rfe_type == 7) -+ READ_AND_CONFIG_MP(8814a, _txpowertrack_type7); -+ else if (dm->rfe_type == 8) -+ READ_AND_CONFIG_MP(8814a, _txpowertrack_type8); -+ else -+ READ_AND_CONFIG_MP(8814a, _txpowertrack); -+ -+ READ_AND_CONFIG_MP(8814a, _txpowertssi); -+ } -+#endif -+#if RTL8703B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8703B) { -+ if (dm->support_interface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8703b, _txpowertrack_usb); -+ else if (dm->support_interface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8703b, _txpowertrack_sdio); -+ -+ READ_AND_CONFIG_MP(8703b, _txxtaltrack); -+ } -+#endif -+#if RTL8188F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8188F) { -+ if (dm->support_interface == ODM_ITRF_USB) -+ READ_AND_CONFIG_MP(8188f, _txpowertrack_usb); -+ else if (dm->support_interface == ODM_ITRF_SDIO) -+ READ_AND_CONFIG_MP(8188f, _txpowertrack_sdio); -+ } -+#endif -+#if RTL8822B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type0); -+ else if (dm->rfe_type == 1) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type1); -+ else if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type2); -+ else if ((dm->rfe_type == 3) || (dm->rfe_type == 5)) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type3_type5); -+ else if (dm->rfe_type == 4) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type4); -+ else if (dm->rfe_type == 6) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type6); -+ else if (dm->rfe_type == 7) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type7); -+ else if (dm->rfe_type == 8) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type8); -+ else if (dm->rfe_type == 9) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type9); -+ else if (dm->rfe_type == 10) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type10); -+ else if (dm->rfe_type == 11) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type11); -+ else if (dm->rfe_type == 12) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type12); -+ else if (dm->rfe_type == 13) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type13); -+ else if (dm->rfe_type == 14) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type14); -+ else if (dm->rfe_type == 15) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type15); -+ else if (dm->rfe_type == 16) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type16); -+ else if (dm->rfe_type == 17) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type17); -+ else if (dm->rfe_type == 18) -+ READ_AND_CONFIG_MP(8822b, _txpowertrack_type18); -+ //else if (dm->rfe_type == 19) -+ //READ_AND_CONFIG_MP(8822b, _txpowertrack_type19); -+ else -+ READ_AND_CONFIG_MP(8822b, _txpowertrack); -+ } -+#endif -+#if RTL8197F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8197F) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8197f, _txpowertrack_type0); -+ else if (dm->rfe_type == 1) -+ READ_AND_CONFIG_MP(8197f, _txpowertrack_type1); -+ else -+ READ_AND_CONFIG_MP(8197f, _txpowertrack); -+ } -+#endif -+/*@jj add 20170822*/ -+#if RTL8192F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8192F) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type0); -+ else if (dm->rfe_type == 1) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type1); -+ else if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type2); -+ else if (dm->rfe_type == 3) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type3); -+ else if (dm->rfe_type == 4) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type4); -+ else if (dm->rfe_type == 5) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type5); -+ else if (dm->rfe_type == 6) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type6); -+ else if (dm->rfe_type == 7) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type7); -+ else if (dm->rfe_type == 8) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type8); -+ else if (dm->rfe_type == 9) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type9); -+ else if (dm->rfe_type == 10) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type10); -+ else if (dm->rfe_type == 11) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type11); -+ else if (dm->rfe_type == 12) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type12); -+ else if (dm->rfe_type == 13) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type13); -+ else if (dm->rfe_type == 14) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type14); -+ else if (dm->rfe_type == 15) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type15); -+ else if (dm->rfe_type == 16) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type16); -+ else if (dm->rfe_type == 17) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type17); -+ else if (dm->rfe_type == 18) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type18); -+ else if (dm->rfe_type == 19) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type19); -+ else if (dm->rfe_type == 20) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type20); -+ else if (dm->rfe_type == 21) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type21); -+ else if (dm->rfe_type == 22) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type22); -+ else if (dm->rfe_type == 23) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type23); -+ else if (dm->rfe_type == 24) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type24); -+ else if (dm->rfe_type == 25) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type25); -+ else if (dm->rfe_type == 26) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type26); -+ else if (dm->rfe_type == 27) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type27); -+ else if (dm->rfe_type == 28) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type28); -+ else if (dm->rfe_type == 29) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type29); -+ else if (dm->rfe_type == 30) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type30); -+ else if (dm->rfe_type == 31) -+ READ_AND_CONFIG_MP(8192f, _txpowertrack_type31); -+ else -+ READ_AND_CONFIG_MP(8192f, _txpowertrack); -+ -+ READ_AND_CONFIG_MP(8192f, _txxtaltrack); -+ } -+#endif -+ -+#if RTL8721D_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8721D) { -+ #if 0 -+ if (dm->package_type == 1) -+ READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_smic); -+ else if (dm->package_type == 5) -+ READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_umc); -+ #endif -+ READ_AND_CONFIG_MP(8721d, _txpowertrack); -+ READ_AND_CONFIG_MP(8721d, _txxtaltrack); -+ } -+#endif -+ -+#if RTL8710C_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8710C) { -+ #if 0 -+ if (dm->package_type == 1) -+ READ_AND_CONFIG_MP(8710c, _txpowertrack_qfn48m_smic); -+ else if (dm->package_type == 5) -+ READ_AND_CONFIG_MP(8710c, _txpowertrack_qfn48m_umc); -+ #endif -+ READ_AND_CONFIG_MP(8710c, _txpowertrack); -+ READ_AND_CONFIG_MP(8710c, _txxtaltrack); -+ } -+#endif -+ -+#if RTL8821C_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8821C) { -+ if (dm->rfe_type == 0x5) -+ READ_AND_CONFIG(8821c, _txpowertrack_type0x28); -+ else if (dm->rfe_type == 0x4) -+ READ_AND_CONFIG(8821c, _txpowertrack_type0x20); -+ else -+ READ_AND_CONFIG(8821c, _txpowertrack); -+ } -+#endif -+ -+#if RTL8198F_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8198F) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8198f, _txpowertrack_type0); -+ else if (dm->rfe_type == 1) -+ READ_AND_CONFIG_MP(8198f, _txpowertrack_type1); -+ else if (dm->rfe_type == 3) -+ READ_AND_CONFIG_MP(8198f, _txpowertrack_type3); -+ else -+ READ_AND_CONFIG_MP(8198f, _txpowertrack); -+ } -+#endif -+ -+#if RTL8195B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8195B) { -+ if (dm->package_type == 1) { -+ READ_AND_CONFIG_MP(8195b, _txpowertrack_pkg1); -+ READ_AND_CONFIG_MP(8195b, _txxtaltrack_pkg1); -+ } else { -+ READ_AND_CONFIG_MP(8195b, _txpowertrack); -+ READ_AND_CONFIG_MP(8195b, _txxtaltrack); -+ } -+ } -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ if (dm->en_tssi_mode) -+ READ_AND_CONFIG_MP(8822c, _txpowertracktssi); -+ else -+ READ_AND_CONFIG_MP(8822c, _txpowertrack); -+ } -+#endif -+ -+#if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8723F) -+ READ_AND_CONFIG_MP(8723f, _txpowertrack); -+#endif -+#if (RTL8812F_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8812F) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8812f, _txpowertrack_type0); -+ else if (dm->rfe_type == 1) -+ READ_AND_CONFIG_MP(8812f, _txpowertrack_type1); -+ else if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8812f, _txpowertrack_type2); -+ else if (dm->rfe_type == 3) -+ READ_AND_CONFIG_MP(8812f, _txpowertrack_type3); -+ else if (dm->rfe_type == 4) -+ READ_AND_CONFIG_MP(8812f, _txpowertrack_type4); -+ else -+ READ_AND_CONFIG_MP(8812f, _txpowertrack); -+ } -+#endif -+ -+#if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8197G) -+ READ_AND_CONFIG_MP(8197g, _txpowertrack); -+#endif -+ -+#if RTL8814B_SUPPORT -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8814b, _txpowertrack_type0); -+ else if (dm->rfe_type == 1) -+ READ_AND_CONFIG_MP(8814b, _txpowertrack_type1); -+ else if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8814b, _txpowertrack_type2); -+#if 0 -+ else if (dm->rfe_type == 3) -+ READ_AND_CONFIG_MP(8814b, _txpowertrack_type3); -+ else if (dm->rfe_type == 6) -+ READ_AND_CONFIG_MP(8814b, _txpowertrack_type6); -+#endif -+ else -+ READ_AND_CONFIG_MP(8814b, _txpowertrack); -+ } -+#endif -+ -+ return HAL_STATUS_SUCCESS; -+} -+ -+enum hal_status -+odm_config_bb_with_header_file(struct dm_struct *dm, -+ enum odm_bb_config_type config_type) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo; -+#endif -+ enum hal_status result = HAL_STATUS_SUCCESS; -+ -+/* @1 AP doesn't use PHYDM initialization in these ICs */ -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if (RTL8812A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8812) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8812a, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8812a, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) { -+ if (dm->rfe_type == 3 && dm->is_mp_chip) -+ READ_AND_CONFIG_MP(8812a, _phy_reg_pg_asus); -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ else if (mgnt_info->CustomerID == RT_CID_WNC_NEC && dm->is_mp_chip) -+ READ_AND_CONFIG_MP(8812a, _phy_reg_pg_nec); -+#if RT_PLATFORM == PLATFORM_MACOSX -+ /*@{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/ -+ else if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) -+ READ_AND_CONFIG_MP(8812a, _phy_reg_pg_dni); -+ /* TP-Link T4UH, Isaiah 2015-03-16*/ -+ else if (mgnt_info->CustomerID == RT_CID_TPLINK_HPWR) { -+ pr_debug("RT_CID_TPLINK_HPWR:: _PHY_REG_PG_TPLINK\n"); -+ READ_AND_CONFIG_MP(8812a, _phy_reg_pg_tplink); -+ } -+#endif -+#endif -+ else -+ READ_AND_CONFIG_MP(8812a, _phy_reg_pg); -+ } else if (config_type == CONFIG_BB_PHY_REG_MP) -+ READ_AND_CONFIG_MP(8812a, _phy_reg_mp); -+ else if (config_type == CONFIG_BB_AGC_TAB_DIFF) { -+ dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD; -+ /*@AGC_TAB DIFF dont support FW offload*/ -+ if ((*dm->channel >= 36) && (*dm->channel <= 64)) -+ AGC_DIFF_CONFIG_MP(8812a, lb); -+ else if (*dm->channel >= 100) -+ AGC_DIFF_CONFIG_MP(8812a, hb); -+ } -+ } -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8821a, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8821a, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) { -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ -+ if ((hal_data->EEPROMSVID == 0x1043 && hal_data->EEPROMSMID == 0x207F)) -+ READ_AND_CONFIG_MP(8821a, _phy_reg_pg_e202_sa); -+ else -+#endif -+#if (RT_PLATFORM == PLATFORM_MACOSX) -+ /*@ for BUFFALO pwr by rate table */ -+ if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) { -+ /*@ for BUFFALO pwr by rate table (JP/US)*/ -+ if (mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G) -+ READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us); -+ else -+ READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp); -+ } else -+#endif -+#endif -+ READ_AND_CONFIG_MP(8821a, _phy_reg_pg); -+ } -+ } -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8192E) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8192e, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8192e, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8192e, _phy_reg_pg); -+ } -+#endif -+#if (RTL8723D_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8723D) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8723d, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8723d, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8723d, _phy_reg_pg); -+ } -+#endif -+/* @JJ ADD 20161014 */ -+#if (RTL8710B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8710B) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8710b, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8710b, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8710b, _phy_reg_pg); -+ } -+#endif -+ -+#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */ -+/* @1 All platforms support */ -+#if (RTL8188E_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188E) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8188e, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8188e, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8188e, _phy_reg_pg); -+ } -+#endif -+#if (RTL8723B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8723B) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8723b, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8723b, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8723b, _phy_reg_pg); -+ } -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8814A) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8814a, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8814a, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type0); -+ else if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type2); -+ else if (dm->rfe_type == 3) -+ READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type3); -+ else if (dm->rfe_type == 4) -+ READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type4); -+ else if (dm->rfe_type == 5) -+ READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type5); -+ else if (dm->rfe_type == 7) -+ READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type7); -+ else if (dm->rfe_type == 8) -+ READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type8); -+ else -+ READ_AND_CONFIG_MP(8814a, _phy_reg_pg); -+ } else if (config_type == CONFIG_BB_PHY_REG_MP) -+ READ_AND_CONFIG_MP(8814a, _phy_reg_mp); -+ } -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8703B) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8703b, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8703b, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8703b, _phy_reg_pg); -+ } -+#endif -+#if (RTL8188F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188F) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8188f, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8188f, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8188f, _phy_reg_pg); -+ } -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ if (config_type == CONFIG_BB_PHY_REG) { -+ READ_AND_CONFIG_MP(8822b, _phy_reg); -+ } else if (config_type == CONFIG_BB_AGC_TAB) { -+ READ_AND_CONFIG_MP(8822b, _agc_tab); -+ } else if (config_type == CONFIG_BB_PHY_REG_PG) { -+ if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type2); -+ else if (dm->rfe_type == 3) -+ READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type3); -+ else if (dm->rfe_type == 4) -+ READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type4); -+ else if (dm->rfe_type == 5) -+ READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type5); -+ else if (dm->rfe_type == 12) -+ READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type12); -+ else if (dm->rfe_type == 15) -+ READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type15); -+ else if (dm->rfe_type == 16) -+ READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type16); -+ else if (dm->rfe_type == 17) -+ READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type17); -+ else if (dm->rfe_type == 18) -+ READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type18); -+ //else if (dm->rfe_type == 19) -+ //READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type19); -+ else -+ READ_AND_CONFIG_MP(8822b, _phy_reg_pg); -+ } -+ } -+#endif -+ -+#if (RTL8197F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197F) { -+ if (config_type == CONFIG_BB_PHY_REG) { -+ READ_AND_CONFIG_MP(8197f, _phy_reg); -+ if (dm->cut_version == ODM_CUT_A) -+ phydm_phypara_a_cut(dm); -+ } else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8197f, _agc_tab); -+ } -+#endif -+/*@jj add 20170822*/ -+#if (RTL8192F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8192F) { -+ if (config_type == CONFIG_BB_PHY_REG) { -+ READ_AND_CONFIG_MP(8192f, _phy_reg); -+ } else if (config_type == CONFIG_BB_AGC_TAB) { -+ READ_AND_CONFIG_MP(8192f, _agc_tab); -+ } else if (config_type == CONFIG_BB_PHY_REG_PG) { -+ if (dm->rfe_type == 0) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type0); -+ else if (dm->rfe_type == 1) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type1); -+ else if (dm->rfe_type == 2) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type2); -+ else if (dm->rfe_type == 3) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type3); -+ else if (dm->rfe_type == 4) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type4); -+ else if (dm->rfe_type == 5) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type5); -+ else if (dm->rfe_type == 6) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type6); -+ else if (dm->rfe_type == 7) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type7); -+ else if (dm->rfe_type == 8) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type8); -+ else if (dm->rfe_type == 9) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type9); -+ else if (dm->rfe_type == 10) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type10); -+ else if (dm->rfe_type == 11) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type11); -+ else if (dm->rfe_type == 12) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type12); -+ else if (dm->rfe_type == 13) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type13); -+ else if (dm->rfe_type == 14) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type14); -+ else if (dm->rfe_type == 15) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type15); -+ else if (dm->rfe_type == 16) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type16); -+ else if (dm->rfe_type == 17) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type17); -+ else if (dm->rfe_type == 18) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type18); -+ else if (dm->rfe_type == 19) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type19); -+ else if (dm->rfe_type == 20) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type20); -+ else if (dm->rfe_type == 21) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type21); -+ else if (dm->rfe_type == 22) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type22); -+ else if (dm->rfe_type == 23) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type23); -+ else if (dm->rfe_type == 24) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type24); -+ else if (dm->rfe_type == 25) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type25); -+ else if (dm->rfe_type == 26) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type26); -+ else if (dm->rfe_type == 27) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type27); -+ else if (dm->rfe_type == 28) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type28); -+ else if (dm->rfe_type == 29) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type29); -+ else if (dm->rfe_type == 30) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type30); -+ else if (dm->rfe_type == 31) -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type31); -+ else -+ READ_AND_CONFIG_MP(8192f, _phy_reg_pg); -+ } -+ } -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8721D) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8721d, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8721d, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) { -+ if (dm->power_voltage == ODM_POWER_18V) -+ READ_AND_CONFIG_MP(8721d, _phy_reg_pg_type0); -+ else -+ READ_AND_CONFIG_MP(8721d, _phy_reg_pg_type1); -+ } -+ } -+#endif -+ -+#if (RTL8710C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8710C) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8710c, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8710c, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG_MP(8710c, _phy_reg_pg); -+ } -+#endif -+ -+#if (RTL8821C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821C) { -+ if (config_type == CONFIG_BB_PHY_REG) { -+ READ_AND_CONFIG(8821c, _phy_reg); -+ } else if (config_type == CONFIG_BB_AGC_TAB) { -+ READ_AND_CONFIG(8821c, _agc_tab); -+ /* @According to RFEtype, choosing correct AGC table*/ -+ if (dm->default_rf_set_8821c == SWITCH_TO_BTG) -+ AGC_DIFF_CONFIG_MP(8821c, btg); -+ } else if (config_type == CONFIG_BB_PHY_REG_PG) { -+ if (dm->rfe_type == 0x5) -+ READ_AND_CONFIG(8821c, _phy_reg_pg_type0x28); -+ else -+ READ_AND_CONFIG(8821c, _phy_reg_pg); -+ } else if (config_type == CONFIG_BB_AGC_TAB_DIFF) { -+ dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD; -+ /*@AGC_TAB DIFF dont support FW offload*/ -+ if (dm->current_rf_set_8821c == SWITCH_TO_BTG) -+ AGC_DIFF_CONFIG_MP(8821c, btg); -+ else if (dm->current_rf_set_8821c == SWITCH_TO_WLG) -+ AGC_DIFF_CONFIG_MP(8821c, wlg); -+ } else if (config_type == CONFIG_BB_PHY_REG_MP) { -+ READ_AND_CONFIG(8821c, _phy_reg_mp); -+ } -+ } -+#endif -+ -+#if (RTL8195A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195A) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG(8195a, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG(8195a, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG(8195a, _phy_reg_pg); -+ } -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195B) { -+ if (config_type == CONFIG_BB_PHY_REG) { -+ READ_AND_CONFIG(8195b, _phy_reg); -+ } else if (config_type == CONFIG_BB_AGC_TAB) { -+ READ_AND_CONFIG(8195b, _agc_tab); -+ } else if (config_type == CONFIG_BB_PHY_REG_PG) { -+ READ_AND_CONFIG(8195b, _phy_reg_pg); -+ } else if (config_type == CONFIG_BB_PHY_REG_MP) { -+ if (dm->package_type == 1) -+ odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, 0x10); -+ else -+ odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, 0x12); -+ } -+ } -+#endif -+#if (RTL8198F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8198F) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8198f, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8198f, _agc_tab); -+ } -+#endif -+#if (RTL8814B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8814b, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8814b, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) { -+ if (dm->rfe_type == 1) -+ READ_AND_CONFIG(8814b, _phy_reg_pg_type1); -+ else -+ READ_AND_CONFIG(8814b, _phy_reg_pg); -+ } -+ } -+#endif -+#if (RTL8822C_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8822c, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8822c, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG(8822c, _phy_reg_pg); -+ } -+#endif -+#if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8723F) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8723f, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8723f, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG(8723f, _phy_reg_pg); -+ } -+#endif -+#if (RTL8812F_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8812F) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8812f, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8812f, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG(8812f, _phy_reg_pg); -+ } -+#endif -+#if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8197G) { -+ if (config_type == CONFIG_BB_PHY_REG) -+ READ_AND_CONFIG_MP(8197g, _phy_reg); -+ else if (config_type == CONFIG_BB_AGC_TAB) -+ READ_AND_CONFIG_MP(8197g, _agc_tab); -+ else if (config_type == CONFIG_BB_PHY_REG_PG) -+ READ_AND_CONFIG(8197g, _phy_reg_pg); -+ } -+#endif -+ -+ if (config_type == CONFIG_BB_PHY_REG || -+ config_type == CONFIG_BB_AGC_TAB) -+ if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) { -+ result = phydm_set_reg_by_fw(dm, -+ PHYDM_HALMAC_CMD_END, -+ 0, -+ 0, -+ 0, -+ (enum rf_path)0, -+ 0); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "phy param offload end!result = %d", result); -+ } -+ -+ return result; -+} -+ -+enum hal_status -+odm_config_mac_with_header_file(struct dm_struct *dm) -+{ -+ enum hal_status result = HAL_STATUS_SUCCESS; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__, -+ (dm->is_mp_chip) ? "MPChip" : "TestChip"); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", -+ dm->support_platform, dm->support_interface, dm->board_type); -+ -+#ifdef PHYDM_IC_HALMAC_PARAM_SUPPORT -+ if (dm->support_ic_type & PHYDM_IC_SUPPORT_HALMAC_PARAM_OFFLOAD) { -+ PHYDM_DBG(dm, ODM_COMP_INIT, "MAC para-package in HALMAC\n"); -+ return result; -+ } -+#endif -+ -+/* @1 AP doesn't use PHYDM initialization in these ICs */ -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if (RTL8812A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8812) -+ READ_AND_CONFIG_MP(8812a, _mac_reg); -+#endif -+#if (RTL8821A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821) -+ READ_AND_CONFIG_MP(8821a, _mac_reg); -+#endif -+#if (RTL8192E_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8192E) -+ READ_AND_CONFIG_MP(8192e, _mac_reg); -+#endif -+#if (RTL8723D_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8723D) -+ READ_AND_CONFIG_MP(8723d, _mac_reg); -+#endif -+#if (RTL8710B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8710B) -+ READ_AND_CONFIG_MP(8710b, _mac_reg); -+#endif -+#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */ -+ -+/* @1 All platforms support */ -+#if (RTL8188E_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188E) -+ READ_AND_CONFIG_MP(8188e, _mac_reg); -+#endif -+#if (RTL8723B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8723B) -+ READ_AND_CONFIG_MP(8723b, _mac_reg); -+#endif -+#if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8814A) -+ READ_AND_CONFIG_MP(8814a, _mac_reg); -+#endif -+#if (RTL8703B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8703B) -+ READ_AND_CONFIG_MP(8703b, _mac_reg); -+#endif -+#if (RTL8188F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188F) -+ READ_AND_CONFIG_MP(8188f, _mac_reg); -+#endif -+#if (RTL8822B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822B) -+ READ_AND_CONFIG_MP(8822b, _mac_reg); -+#endif -+#if (RTL8197F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197F) -+ READ_AND_CONFIG_MP(8197f, _mac_reg); -+#endif -+#if (RTL8192F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8192F) -+ READ_AND_CONFIG_MP(8192f, _mac_reg); -+#endif -+#if (RTL8721D_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8721D) -+ READ_AND_CONFIG_MP(8721d, _mac_reg); -+#endif -+ -+#if (RTL8710C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8710C) -+ READ_AND_CONFIG_MP(8710c, _mac_reg); -+#endif -+ -+#if (RTL8821C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821C) -+ READ_AND_CONFIG(8821c, _mac_reg); -+#endif -+#if (RTL8195A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195A) -+ READ_AND_CONFIG_MP(8195a, _mac_reg); -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195B) -+ READ_AND_CONFIG_MP(8195b, _mac_reg); -+#endif -+#if (RTL8198F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8198F) -+ READ_AND_CONFIG_MP(8198f, _mac_reg); -+#endif -+#if (RTL8197G_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197G) -+ READ_AND_CONFIG_MP(8197g, _mac_reg); -+#endif -+ -+ if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) { -+ result = phydm_set_reg_by_fw(dm, -+ PHYDM_HALMAC_CMD_END, -+ 0, -+ 0, -+ 0, -+ (enum rf_path)0, -+ 0); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "mac param offload end!result = %d", result); -+ } -+ -+ return result; -+} -+ -+u32 odm_get_hw_img_version(struct dm_struct *dm) -+{ -+ u32 version = 0; -+ -+ switch (dm->support_ic_type) { -+/* @1 AP doesn't use PHYDM initialization in these ICs */ -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if (RTL8821A_SUPPORT) -+ case ODM_RTL8821: -+ version = odm_get_version_mp_8821a_phy_reg(); -+ break; -+#endif -+#if (RTL8192E_SUPPORT) -+ case ODM_RTL8192E: -+ version = odm_get_version_mp_8192e_phy_reg(); -+ break; -+#endif -+#if (RTL8812A_SUPPORT) -+ case ODM_RTL8812: -+ version = odm_get_version_mp_8812a_phy_reg(); -+ break; -+#endif -+#endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */ -+#if (RTL8723D_SUPPORT) -+ case ODM_RTL8723D: -+ version = odm_get_version_mp_8723d_phy_reg(); -+ break; -+#endif -+#if (RTL8710B_SUPPORT) -+ case ODM_RTL8710B: -+ version = odm_get_version_mp_8710b_phy_reg(); -+ break; -+#endif -+#if (RTL8188E_SUPPORT) -+ case ODM_RTL8188E: -+ version = odm_get_version_mp_8188e_phy_reg(); -+ break; -+#endif -+#if (RTL8723B_SUPPORT) -+ case ODM_RTL8723B: -+ version = odm_get_version_mp_8723b_phy_reg(); -+ break; -+#endif -+#if (RTL8814A_SUPPORT) -+ case ODM_RTL8814A: -+ version = odm_get_version_mp_8814a_phy_reg(); -+ break; -+#endif -+#if (RTL8703B_SUPPORT) -+ case ODM_RTL8703B: -+ version = odm_get_version_mp_8703b_phy_reg(); -+ break; -+#endif -+#if (RTL8188F_SUPPORT) -+ case ODM_RTL8188F: -+ version = odm_get_version_mp_8188f_phy_reg(); -+ break; -+#endif -+#if (RTL8822B_SUPPORT) -+ case ODM_RTL8822B: -+ version = odm_get_version_mp_8822b_phy_reg(); -+ break; -+#endif -+#if (RTL8197F_SUPPORT) -+ case ODM_RTL8197F: -+ version = odm_get_version_mp_8197f_phy_reg(); -+ break; -+#endif -+ -+#if (RTL8192F_SUPPORT) -+ case ODM_RTL8192F: -+ version = odm_get_version_mp_8192f_phy_reg(); -+ break; -+#endif -+#if (RTL8721D_SUPPORT) -+ case ODM_RTL8721D: -+ version = odm_get_version_mp_8721d_phy_reg(); -+ break; -+#endif -+#if (RTL8710C_SUPPORT) -+ case ODM_RTL8710C: -+ version = GET_VERSION_MP(8710c, _mac_reg); -+#endif -+#if (RTL8821C_SUPPORT) -+ case ODM_RTL8821C: -+ version = odm_get_version_mp_8821c_phy_reg(); -+ break; -+#endif -+#if (RTL8195B_SUPPORT) -+ case ODM_RTL8195B: -+ version = odm_get_version_mp_8195b_phy_reg(); -+ break; -+#endif -+#if (RTL8198F_SUPPORT) -+ case ODM_RTL8198F: -+ version = odm_get_version_mp_8198f_phy_reg(); -+ break; -+#endif -+#if (RTL8822C_SUPPORT) -+ case ODM_RTL8822C: -+ version = odm_get_version_mp_8822c_phy_reg(); -+ break; -+#endif -+#if (RTL8812F_SUPPORT) -+ case ODM_RTL8812F: -+ version = odm_get_version_mp_8812f_phy_reg(); -+ break; -+#endif -+#if (RTL8197G_SUPPORT) -+ case ODM_RTL8197G: -+ version = odm_get_version_mp_8197g_phy_reg(); -+ break; -+#endif -+#if (RTL8723F_SUPPORT) -+ case ODM_RTL8723F: -+ version = odm_get_version_mp_8723f_phy_reg(); -+ break; -+#endif -+#if (RTL8814B_SUPPORT) -+ case ODM_RTL8814B: -+ version = odm_get_version_mp_8814b_phy_reg(); -+ break; -+#endif -+ } -+ -+ return version; -+} -+ -+u32 query_phydm_trx_capability(struct dm_struct *dm) -+{ -+ u32 value32 = 0xFFFFFFFF; -+ -+#if (RTL8821C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821C) -+ value32 = query_phydm_trx_capability_8821c(dm); -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195B) -+ value32 = query_phydm_trx_capability_8195b(dm); -+#endif -+ return value32; -+} -+ -+u32 query_phydm_stbc_capability(struct dm_struct *dm) -+{ -+ u32 value32 = 0xFFFFFFFF; -+ -+#if (RTL8821C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821C) -+ value32 = query_phydm_stbc_capability_8821c(dm); -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195B) -+ value32 = query_phydm_stbc_capability_8195b(dm); -+#endif -+ -+ return value32; -+} -+ -+u32 query_phydm_ldpc_capability(struct dm_struct *dm) -+{ -+ u32 value32 = 0xFFFFFFFF; -+ -+#if (RTL8821C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821C) -+ value32 = query_phydm_ldpc_capability_8821c(dm); -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195B) -+ value32 = query_phydm_ldpc_capability_8195b(dm); -+#endif -+ return value32; -+} -+ -+u32 query_phydm_txbf_parameters(struct dm_struct *dm) -+{ -+ u32 value32 = 0xFFFFFFFF; -+ -+#if (RTL8821C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821C) -+ value32 = query_phydm_txbf_parameters_8821c(dm); -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195B) -+ value32 = query_phydm_txbf_parameters_8195b(dm); -+#endif -+ return value32; -+} -+ -+u32 query_phydm_txbf_capability(struct dm_struct *dm) -+{ -+ u32 value32 = 0xFFFFFFFF; -+ -+#if (RTL8821C_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8821C) -+ value32 = query_phydm_txbf_capability_8821c(dm); -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8195B) -+ value32 = query_phydm_txbf_capability_8195b(dm); -+#endif -+ return value32; -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_hwconfig.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_hwconfig.h -new file mode 100644 -index 000000000000..7c4d1e38cba4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_hwconfig.h -@@ -0,0 +1,79 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __HALHWOUTSRC_H__ -+#define __HALHWOUTSRC_H__ -+ -+/*@--------------------------Define -------------------------------------------*/ -+#define AGC_DIFF_CONFIG_MP(ic, band) \ -+ (odm_read_and_config_mp_##ic##_agc_tab_diff(dm, \ -+ array_mp_##ic##_agc_tab_diff_##band, \ -+ sizeof(array_mp_##ic##_agc_tab_diff_##band) / sizeof(u32))) -+#define AGC_DIFF_CONFIG_TC(ic, band) \ -+ (odm_read_and_config_tc_##ic##_agc_tab_diff(dm, \ -+ array_tc_##ic##_agc_tab_diff_##band, \ -+ sizeof(array_tc_##ic##_agc_tab_diff_##band) / sizeof(u32))) -+#if defined(DM_ODM_CE_MAC80211) -+#else -+#define AGC_DIFF_CONFIG(ic, band) \ -+ do { \ -+ if (dm->is_mp_chip) \ -+ AGC_DIFF_CONFIG_MP(ic, band); \ -+ else \ -+ AGC_DIFF_CONFIG_TC(ic, band); \ -+ } while (0) -+#endif -+/*@************************************************************ -+ * structure and define -+ ************************************************************/ -+ -+enum hal_status -+odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm); -+ -+enum hal_status -+odm_config_rf_with_header_file(struct dm_struct *dm, -+ enum odm_rf_config_type config_type, -+ u8 e_rf_path); -+ -+enum hal_status -+odm_config_bb_with_header_file(struct dm_struct *dm, -+ enum odm_bb_config_type config_type); -+ -+enum hal_status -+odm_config_mac_with_header_file(struct dm_struct *dm); -+ -+u32 odm_get_hw_img_version(struct dm_struct *dm); -+ -+u32 query_phydm_trx_capability(struct dm_struct *dm); -+ -+u32 query_phydm_stbc_capability(struct dm_struct *dm); -+ -+u32 query_phydm_ldpc_capability(struct dm_struct *dm); -+ -+u32 query_phydm_txbf_parameters(struct dm_struct *dm); -+ -+u32 query_phydm_txbf_capability(struct dm_struct *dm); -+ -+#endif /*@#ifndef __HALHWOUTSRC_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_interface.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_interface.c -new file mode 100644 -index 000000000000..7a0c42805950 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_interface.c -@@ -0,0 +1,1480 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+/*@ -+ * ODM IO Relative API. -+ */ -+ -+u8 odm_read_1byte(struct dm_struct *dm, u32 reg_addr) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ struct rtl8192cd_priv *priv = dm->priv; -+ return RTL_R8(reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ return rtl_read_byte(rtlpriv, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ return rtw_read8(rtwdev, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ void *adapter = dm->adapter; -+ return rtw_read8(adapter, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ return PlatformEFIORead1Byte(adapter, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ return rtw_read8(adapter, reg_addr); -+#endif -+} -+ -+u16 odm_read_2byte(struct dm_struct *dm, u32 reg_addr) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ struct rtl8192cd_priv *priv = dm->priv; -+ return RTL_R16(reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ return rtl_read_word(rtlpriv, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ return rtw_read16(rtwdev, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ void *adapter = dm->adapter; -+ return rtw_read16(adapter, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ return PlatformEFIORead2Byte(adapter, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ return rtw_read16(adapter, reg_addr); -+#endif -+} -+ -+u32 odm_read_4byte(struct dm_struct *dm, u32 reg_addr) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ struct rtl8192cd_priv *priv = dm->priv; -+ return RTL_R32(reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ return rtl_read_dword(rtlpriv, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ return rtw_read32(rtwdev, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ void *adapter = dm->adapter; -+ return rtw_read32(adapter, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ return PlatformEFIORead4Byte(adapter, reg_addr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ return rtw_read32(adapter, reg_addr); -+#endif -+} -+ -+void odm_write_1byte(struct dm_struct *dm, u32 reg_addr, u8 data) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ struct rtl8192cd_priv *priv = dm->priv; -+ RTL_W8(reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ rtl_write_byte(rtlpriv, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ rtw_write8(rtwdev, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ void *adapter = dm->adapter; -+ rtw_write8(adapter, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PlatformEFIOWrite1Byte(adapter, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ rtw_write8(adapter, reg_addr, data); -+#endif -+ -+ if (dm->en_reg_mntr_byte) -+ pr_debug("1byte:addr=0x%x, data=0x%x\n", reg_addr, data); -+} -+ -+void odm_write_2byte(struct dm_struct *dm, u32 reg_addr, u16 data) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ struct rtl8192cd_priv *priv = dm->priv; -+ RTL_W16(reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ rtl_write_word(rtlpriv, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ rtw_write16(rtwdev, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ void *adapter = dm->adapter; -+ rtw_write16(adapter, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PlatformEFIOWrite2Byte(adapter, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ rtw_write16(adapter, reg_addr, data); -+#endif -+ -+ if (dm->en_reg_mntr_byte) -+ pr_debug("2byte:addr=0x%x, data=0x%x\n", reg_addr, data); -+} -+ -+void odm_write_4byte(struct dm_struct *dm, u32 reg_addr, u32 data) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ struct rtl8192cd_priv *priv = dm->priv; -+ RTL_W32(reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ rtl_write_dword(rtlpriv, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ rtw_write32(rtwdev, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ void *adapter = dm->adapter; -+ rtw_write32(adapter, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PlatformEFIOWrite4Byte(adapter, reg_addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ rtw_write32(adapter, reg_addr, data); -+#endif -+ -+ if (dm->en_reg_mntr_byte) -+ pr_debug("4byte:addr=0x%x, data=0x%x\n", reg_addr, data); -+} -+ -+void odm_set_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, u32 data) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ phy_set_bb_reg(dm->priv, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PHY_SetBBReg(adapter, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ rtw_set_reg_with_mask(rtwdev, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data); -+#else -+ phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data); -+#endif -+ -+ if (dm->en_reg_mntr_mac) -+ pr_debug("MAC:addr=0x%x, mask=0x%x, data=0x%x\n", -+ reg_addr, bit_mask, data); -+} -+ -+u32 odm_get_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ return phy_query_bb_reg(dm->priv, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ return PHY_QueryMacReg(dm->adapter, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ return rtw_get_reg_with_mask(rtwdev, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ return phy_query_bb_reg(dm->adapter, reg_addr, bit_mask); -+#else -+ return phy_query_mac_reg(dm->adapter, reg_addr, bit_mask); -+#endif -+} -+ -+void odm_set_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, u32 data) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ phy_set_bb_reg(dm->priv, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PHY_SetBBReg(adapter, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ rtw_set_reg_with_mask(rtwdev, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data); -+#else -+ phy_set_bb_reg(dm->adapter, reg_addr, bit_mask, data); -+#endif -+ -+ if (dm->en_reg_mntr_bb) -+ pr_debug("BB:addr=0x%x, mask=0x%x, data=0x%x\n", -+ reg_addr, bit_mask, data); -+} -+ -+u32 odm_get_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ return phy_query_bb_reg(dm->priv, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ return PHY_QueryBBReg(adapter, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ return rtw_get_reg_with_mask(rtwdev, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ return phy_query_bb_reg(dm->adapter, reg_addr, bit_mask); -+#else -+ return phy_query_bb_reg(dm->adapter, reg_addr, bit_mask); -+#endif -+} -+ -+void odm_set_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr, -+ u32 bit_mask, u32 data) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ phy_set_rf_reg(dm->priv, e_rf_path, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PHY_SetRFReg(adapter, e_rf_path, reg_addr, bit_mask, data); -+ ODM_delay_us(2); -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ rtl_set_rfreg(rtlpriv->hw, e_rf_path, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ rtw_write_rf(rtwdev, e_rf_path, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ phy_set_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ phy_set_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask, data); -+ ODM_delay_us(2); -+#endif -+ -+ if (dm->en_reg_mntr_rf) -+ pr_debug("RF:path=0x%x, addr=0x%x, mask=0x%x, data=0x%x\n", -+ e_rf_path, reg_addr, bit_mask, data); -+} -+ -+u32 odm_get_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr, -+ u32 bit_mask) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ return phy_query_rf_reg(dm->priv, e_rf_path, reg_addr, bit_mask, 1); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ return PHY_QueryRFReg(adapter, e_rf_path, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ return rtl_get_rfreg(rtlpriv->hw, e_rf_path, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ return rtw_read_rf(rtwdev, e_rf_path, reg_addr, bit_mask); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ return phy_query_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask); -+#else -+ return phy_query_rf_reg(dm->adapter, e_rf_path, reg_addr, bit_mask); -+#endif -+} -+ -+enum hal_status -+phydm_set_reg_by_fw(struct dm_struct *dm, enum phydm_halmac_param config_type, -+ u32 offset, u32 data, u32 mask, enum rf_path e_rf_path, -+ u32 delay_time) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ return HAL_MAC_Config_PHY_WriteNByte(dm, -+ config_type, -+ offset, -+ data, -+ mask, -+ e_rf_path, -+ delay_time); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n"); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ return -ENOTSUPP; -+#else -+ return rtw_phydm_cfg_phy_para(dm, -+ config_type, -+ offset, -+ data, -+ mask, -+ e_rf_path, -+ delay_time); -+#endif -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n"); -+#endif -+} -+ -+/*@ -+ * ODM Memory relative API. -+ */ -+void odm_allocate_memory(struct dm_struct *dm, void **ptr, u32 length) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ *ptr = kmalloc(length, GFP_ATOMIC); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ *ptr = kmalloc(length, GFP_ATOMIC); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ *ptr = kmalloc(length, GFP_ATOMIC); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ *ptr = rtw_zvmalloc(length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PlatformAllocateMemory(adapter, ptr, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ *ptr = rtw_zvmalloc(length); -+#endif -+} -+ -+/* @length could be ignored, used to detect memory leakage. */ -+void odm_free_memory(struct dm_struct *dm, void *ptr, u32 length) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ kfree(ptr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ kfree(ptr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ kfree(ptr); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_vmfree(ptr, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ /* struct void* adapter = dm->adapter; */ -+ PlatformFreeMemory(ptr, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_vmfree(ptr, length); -+#endif -+} -+ -+void odm_move_memory(struct dm_struct *dm, void *dest, void *src, u32 length) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ memcpy(dest, src, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ memcpy(dest, src, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ memcpy(dest, src, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ _rtw_memcpy(dest, src, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformMoveMemory(dest, src, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_memcpy(dest, src, length); -+#endif -+} -+ -+void odm_memory_set(struct dm_struct *dm, void *pbuf, s8 value, u32 length) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ memset(pbuf, value, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ memset(pbuf, value, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ memset(pbuf, value, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ _rtw_memset(pbuf, value, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformFillMemory(pbuf, length, value); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_memset(pbuf, value, length); -+#endif -+} -+ -+s32 odm_compare_memory(struct dm_struct *dm, void *buf1, void *buf2, u32 length) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ return memcmp(buf1, buf2, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ return memcmp(buf1, buf2, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ return memcmp(buf1, buf2, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ return _rtw_memcmp(buf1, buf2, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ return PlatformCompareMemory(buf1, buf2, length); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ return rtw_memcmp(buf1, buf2, length); -+#endif -+} -+ -+/*@ -+ * ODM MISC relative API. -+ */ -+void odm_acquire_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ rtl_odm_acquirespinlock(rtlpriv, type); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ spin_lock(&rtwdev->hal.dm_lock); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ void *adapter = dm->adapter; -+ rtw_odm_acquirespinlock(adapter, type); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PlatformAcquireSpinLock(adapter, type); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ rtw_odm_acquirespinlock(adapter, type); -+#endif -+} -+ -+void odm_release_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+ -+ rtl_odm_releasespinlock(rtlpriv, type); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ -+ spin_unlock(&rtwdev->hal.dm_lock); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ void *adapter = dm->adapter; -+ rtw_odm_releasespinlock(adapter, type); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PlatformReleaseSpinLock(adapter, type); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ rtw_odm_releasespinlock(adapter, type); -+#endif -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+/*@ -+ * Work item relative API. FOr MP driver only~! -+ * */ -+void odm_initialize_work_item( -+ struct dm_struct *dm, -+ PRT_WORK_ITEM work_item, -+ RT_WORKITEM_CALL_BACK callback, -+ void *context, -+ const char *id) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PlatformInitializeWorkItem(adapter, work_item, callback, context, id); -+#endif -+} -+ -+void odm_start_work_item( -+ PRT_WORK_ITEM p_rt_work_item) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformStartWorkItem(p_rt_work_item); -+#endif -+} -+ -+void odm_stop_work_item( -+ PRT_WORK_ITEM p_rt_work_item) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformStopWorkItem(p_rt_work_item); -+#endif -+} -+ -+void odm_free_work_item( -+ PRT_WORK_ITEM p_rt_work_item) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformFreeWorkItem(p_rt_work_item); -+#endif -+} -+ -+void odm_schedule_work_item( -+ PRT_WORK_ITEM p_rt_work_item) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformScheduleWorkItem(p_rt_work_item); -+#endif -+} -+ -+boolean -+odm_is_work_item_scheduled( -+ PRT_WORK_ITEM p_rt_work_item) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ return PlatformIsWorkItemScheduled(p_rt_work_item); -+#endif -+} -+#endif -+ -+/*@ -+ * ODM Timer relative API. -+ */ -+ -+void ODM_delay_ms(u32 ms) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ delay_ms(ms); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ mdelay(ms); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ mdelay(ms); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_mdelay_os(ms); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ delay_ms(ms); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_mdelay_os(ms); -+#endif -+} -+ -+void ODM_delay_us(u32 us) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ delay_us(us); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ udelay(us); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ udelay(us); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_udelay_os(us); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformStallExecution(us); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_udelay_os(us); -+#endif -+} -+ -+void ODM_sleep_ms(u32 ms) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ delay_ms(ms); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ msleep(ms); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ msleep(ms); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_msleep_os(ms); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ delay_ms(ms); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_msleep_os(ms); -+#endif -+} -+ -+void ODM_sleep_us(u32 us) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ delay_us(us); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ usleep_range(us, us + 1); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ usleep_range(us, us + 1); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ rtw_usleep_os(us); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PlatformStallExecution(us); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_usleep_os(us); -+#endif -+} -+ -+void odm_set_timer(struct dm_struct *dm, struct phydm_timer_list *timer, -+ u32 ms_delay) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ mod_timer(timer, jiffies + RTL_MILISECONDS_TO_JIFFIES(ms_delay)); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ mod_timer(timer, jiffies + msecs_to_jiffies(ms_delay)); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ mod_timer(&timer->timer, jiffies + msecs_to_jiffies(ms_delay)); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ _set_timer(timer, ms_delay); /* @ms */ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PlatformSetTimer(adapter, timer, ms_delay); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_set_timer(timer, ms_delay); /* @ms */ -+#endif -+} -+ -+void odm_initialize_timer(struct dm_struct *dm, struct phydm_timer_list *timer, -+ void *call_back_func, void *context, -+ const char *sz_id) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ init_timer(timer); -+ timer->function = call_back_func; -+ timer->data = (unsigned long)dm; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ timer_setup(timer, call_back_func, 0); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ struct _ADAPTER *adapter = dm->adapter; -+ -+ _init_timer(timer, adapter->pnetdev, call_back_func, dm); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ -+ PlatformInitializeTimer(adapter, timer, (RT_TIMER_CALL_BACK)call_back_func, context, sz_id); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ struct _ADAPTER *adapter = dm->adapter; -+ -+ rtw_init_timer(timer, adapter->pnetdev, (TIMER_FUN)call_back_func, dm, NULL); -+#endif -+} -+ -+void odm_cancel_timer(struct dm_struct *dm, struct phydm_timer_list *timer) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ del_timer(timer); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ del_timer(timer); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ del_timer(&timer->timer); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ _cancel_timer_ex(timer); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PlatformCancelTimer(adapter, timer); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_cancel_timer(timer); -+#endif -+} -+ -+void odm_release_timer(struct dm_struct *dm, struct phydm_timer_list *timer) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ void *adapter = dm->adapter; -+ -+ /* @<20120301, Kordan> If the initilization fails, -+ * InitializeAdapterXxx will return regardless of InitHalDm. -+ * Hence, uninitialized timers cause BSOD when the driver -+ * releases resources since the init fail. -+ */ -+ if (timer == 0) { -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "[%s] Timer is NULL! Please check!\n", __func__); -+ return; -+ } -+ -+ PlatformReleaseTimer(adapter, timer); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_del_timer(timer); -+#endif -+} -+ -+u8 phydm_trans_h2c_id(struct dm_struct *dm, u8 phydm_h2c_id) -+{ -+ u8 platform_h2c_id = phydm_h2c_id; -+ -+ switch (phydm_h2c_id) { -+ /* @1 [0] */ -+ case ODM_H2C_RSSI_REPORT: -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ #if (RTL8188E_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188E) -+ platform_h2c_id = H2C_88E_RSSI_REPORT; -+ else -+ #endif -+ platform_h2c_id = H2C_RSSI_REPORT; -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ platform_h2c_id = H2C_RSSI_SETTING; -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -+#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)) /*@jj add 20170822*/ -+ if (dm->support_ic_type & (ODM_RTL8881A | ODM_RTL8192E | ODM_RTL8192F | PHYDM_IC_3081_SERIES)) -+ platform_h2c_id = H2C_88XX_RSSI_REPORT; -+ else -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8812) -+ platform_h2c_id = H2C_8812_RSSI_REPORT; -+ else -+#endif -+ { -+ } -+#endif -+ -+ break; -+ -+ /* @1 [3] */ -+ case ODM_H2C_WIFI_CALIBRATION: -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ platform_h2c_id = H2C_WIFI_CALIBRATION; -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+#if (RTL8723B_SUPPORT == 1) -+ platform_h2c_id = H2C_8723B_BT_WLAN_CALIBRATION; -+#endif -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -+#endif -+ break; -+ -+ /* @1 [4] */ -+ case ODM_H2C_IQ_CALIBRATION: -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ platform_h2c_id = H2C_IQ_CALIBRATION; -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -+ platform_h2c_id = H2C_8812_IQ_CALIBRATION; -+#endif -+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -+#endif -+ -+ break; -+ /* @1 [5] */ -+ case ODM_H2C_RA_PARA_ADJUST: -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ platform_h2c_id = H2C_RA_PARA_ADJUST; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -+ platform_h2c_id = H2C_8812_RA_PARA_ADJUST; -+#elif ((RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)) -+ platform_h2c_id = H2C_RA_PARA_ADJUST; -+#elif (RTL8192E_SUPPORT == 1) -+ platform_h2c_id = H2C_8192E_RA_PARA_ADJUST; -+#elif (RTL8723B_SUPPORT == 1) -+ platform_h2c_id = H2C_8723B_RA_PARA_ADJUST; -+#endif -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -+#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)) /*@jj add 20170822*/ -+ if (dm->support_ic_type & (ODM_RTL8881A | ODM_RTL8192E | ODM_RTL8192F | PHYDM_IC_3081_SERIES)) -+ platform_h2c_id = H2C_88XX_RA_PARA_ADJUST; -+ else -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8812) -+ platform_h2c_id = H2C_8812_RA_PARA_ADJUST; -+ else -+#endif -+ { -+ } -+#endif -+ -+ break; -+ -+ /* @1 [6] */ -+ case PHYDM_H2C_DYNAMIC_TX_PATH: -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ #if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8814A) -+ platform_h2c_id = H2C_8814A_DYNAMIC_TX_PATH; -+ #endif -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+#if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8814A) -+ platform_h2c_id = H2C_DYNAMIC_TX_PATH; -+#endif -+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -+#if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8814A) -+ platform_h2c_id = H2C_88XX_DYNAMIC_TX_PATH; -+#endif -+ -+#endif -+ -+ break; -+ -+ /* @[7]*/ -+ case PHYDM_H2C_FW_TRACE_EN: -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ -+ platform_h2c_id = H2C_FW_TRACE_EN; -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+ platform_h2c_id = 0x49; -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -+#if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)) /*@jj add 20170822*/ -+ if (dm->support_ic_type & (ODM_RTL8881A | ODM_RTL8192E | ODM_RTL8192F | PHYDM_IC_3081_SERIES)) -+ platform_h2c_id = H2C_88XX_FW_TRACE_EN; -+ else -+#endif -+#if (RTL8812A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8812) -+ platform_h2c_id = H2C_8812_FW_TRACE_EN; -+ else -+#endif -+ { -+ } -+ -+#endif -+ -+ break; -+ -+ case PHYDM_H2C_TXBF: -+#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1)) -+ if (dm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812)) -+ platform_h2c_id = 0x41; /*@H2C_TxBF*/ -+#endif -+ break; -+ -+ case PHYDM_H2C_MU: -+#if (RTL8822B_SUPPORT == 1) -+ platform_h2c_id = 0x4a; /*@H2C_MU*/ -+#endif -+ break; -+ -+ default: -+ platform_h2c_id = phydm_h2c_id; -+ break; -+ } -+ -+ return platform_h2c_id; -+} -+ -+/*@ODM FW relative API.*/ -+ -+void odm_fill_h2c_cmd(struct dm_struct *dm, u8 phydm_h2c_id, u32 cmd_len, -+ u8 *cmd_buf) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ struct rtw_dev *rtwdev = dm->adapter; -+ u8 cmd_id, cmd_class; -+ u8 h2c_pkt[8]; -+#else -+ void *adapter = dm->adapter; -+#endif -+ u8 h2c_id = phydm_trans_h2c_id(dm, phydm_h2c_id); -+ -+ PHYDM_DBG(dm, DBG_RA, "[H2C] h2c_id=((0x%x))\n", h2c_id); -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ if (dm->support_ic_type == ODM_RTL8188E) { -+ if (!dm->ra_support88e) -+ FillH2CCmd88E(adapter, h2c_id, cmd_len, cmd_buf); -+ } else if (dm->support_ic_type == ODM_RTL8814A) -+ FillH2CCmd8814A(adapter, h2c_id, cmd_len, cmd_buf); -+ else if (dm->support_ic_type == ODM_RTL8822B) -+ FillH2CCmd8822B(adapter, h2c_id, cmd_len, cmd_buf); -+ else -+ FillH2CCmd(adapter, h2c_id, cmd_len, cmd_buf); -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ -+ #ifdef DM_ODM_CE_MAC80211 -+ rtlpriv->cfg->ops->fill_h2c_cmd(rtlpriv->hw, h2c_id, cmd_len, cmd_buf); -+ #elif defined(DM_ODM_CE_MAC80211_V2) -+ cmd_id = phydm_h2c_id & 0x1f; -+ cmd_class = (phydm_h2c_id >> RTW_H2C_CLASS_OFFSET) & 0x7; -+ memcpy(h2c_pkt + 1, cmd_buf, 7); -+ h2c_pkt[0] = phydm_h2c_id; -+ rtw_fw_send_h2c_packet(rtwdev, h2c_pkt, cmd_id, cmd_class); -+ /* TODO: implement fill h2c command for rtwlan */ -+ #else -+ rtw_hal_fill_h2c_cmd(adapter, h2c_id, cmd_len, cmd_buf); -+ #endif -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ -+ #if (RTL8812A_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8812) { -+ fill_h2c_cmd8812(dm->priv, h2c_id, cmd_len, cmd_buf); -+ } else -+ #endif -+ { -+ GET_HAL_INTERFACE(dm->priv)->fill_h2c_cmd_handler(dm->priv, h2c_id, cmd_len, cmd_buf); -+ } -+ -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ rtw_hal_fill_h2c_cmd(adapter, h2c_id, cmd_len, cmd_buf); -+ -+#endif -+} -+ -+u8 phydm_c2H_content_parsing(void *dm_void, u8 c2h_cmd_id, u8 c2h_cmd_len, -+ u8 *tmp_buf) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter = dm->adapter; -+#endif -+ u8 extend_c2h_sub_id = 0; -+ u8 find_c2h_cmd = true; -+ -+ if (c2h_cmd_len > 12 || c2h_cmd_len == 0) { -+ pr_debug("[Warning] Error C2H ID=%d, len=%d\n", -+ c2h_cmd_id, c2h_cmd_len); -+ -+ find_c2h_cmd = false; -+ return find_c2h_cmd; -+ } -+ -+ switch (c2h_cmd_id) { -+ case PHYDM_C2H_DBG: -+ phydm_fw_trace_handler(dm, tmp_buf, c2h_cmd_len); -+ break; -+ -+ case PHYDM_C2H_RA_RPT: -+ phydm_c2h_ra_report_handler(dm, tmp_buf, c2h_cmd_len); -+ break; -+ -+ case PHYDM_C2H_RA_PARA_RPT: -+ odm_c2h_ra_para_report_handler(dm, tmp_buf, c2h_cmd_len); -+ break; -+#ifdef CONFIG_PATH_DIVERSITY -+ case PHYDM_C2H_DYNAMIC_TX_PATH_RPT: -+ if (dm->support_ic_type & (ODM_RTL8814A)) -+ phydm_c2h_dtp_handler(dm, tmp_buf, c2h_cmd_len); -+ break; -+#endif -+ -+ case PHYDM_C2H_IQK_FINISH: -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821)) { -+ RT_TRACE(COMP_MP, DBG_LOUD, ("== FW IQK Finish ==\n")); -+ odm_acquire_spin_lock(dm, RT_IQK_SPINLOCK); -+ dm->rf_calibrate_info.is_iqk_in_progress = false; -+ odm_release_spin_lock(dm, RT_IQK_SPINLOCK); -+ dm->rf_calibrate_info.iqk_progressing_time = 0; -+ dm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(dm, dm->rf_calibrate_info.iqk_start_time); -+ } -+ -+#endif -+ break; -+ -+ case PHYDM_C2H_CLM_MONITOR: -+ phydm_clm_c2h_report_handler(dm, tmp_buf, c2h_cmd_len); -+ break; -+ -+ case PHYDM_C2H_DBG_CODE: -+ phydm_fw_trace_handler_code(dm, tmp_buf, c2h_cmd_len); -+ break; -+ -+ case PHYDM_C2H_EXTEND: -+ extend_c2h_sub_id = tmp_buf[0]; -+ if (extend_c2h_sub_id == PHYDM_EXTEND_C2H_DBG_PRINT) -+ phydm_fw_trace_handler_8051(dm, tmp_buf, c2h_cmd_len); -+ -+ break; -+ -+ default: -+ find_c2h_cmd = false; -+ break; -+ } -+ -+ return find_c2h_cmd; -+} -+ -+u64 odm_get_current_time(struct dm_struct *dm) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ return (u64)rtw_get_current_time(); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ return jiffies; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ return jiffies; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ return rtw_get_current_time(); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ return PlatformGetCurrentTime(); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ return rtw_get_current_time(); -+#endif -+} -+ -+u64 odm_get_progressing_time(struct dm_struct *dm, u64 start_time) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ return rtw_get_passing_time_ms((u32)start_time); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ return jiffies_to_msecs(jiffies - start_time); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ return jiffies_to_msecs(jiffies - start_time); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ return rtw_get_passing_time_ms((systime)start_time); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ return ((PlatformGetCurrentTime() - start_time) >> 10); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ return rtw_get_passing_time_ms(start_time); -+#endif -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) && \ -+ (!defined(DM_ODM_CE_MAC80211) && !defined(DM_ODM_CE_MAC80211_V2)) -+ -+void phydm_set_hw_reg_handler_interface(struct dm_struct *dm, u8 RegName, -+ u8 *val) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ struct _ADAPTER *adapter = dm->adapter; -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ ((PADAPTER)adapter)->HalFunc.SetHwRegHandler(adapter, RegName, val); -+#else -+ adapter->hal_func.set_hw_reg_handler(adapter, RegName, val); -+#endif -+ -+#endif -+} -+ -+void phydm_get_hal_def_var_handler_interface(struct dm_struct *dm, -+ enum _HAL_DEF_VARIABLE e_variable, -+ void *value) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ struct _ADAPTER *adapter = dm->adapter; -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ ((PADAPTER)adapter)->HalFunc.GetHalDefVarHandler(adapter, e_variable, value); -+#else -+ adapter->hal_func.get_hal_def_var_handler(adapter, e_variable, value); -+#endif -+ -+#endif -+} -+ -+#endif -+ -+void odm_set_tx_power_index_by_rate_section(struct dm_struct *dm, -+ enum rf_path path, u8 ch, -+ u8 section) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ PHY_SetTxPowerIndexByRateSection(adapter, path, ch, section); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ void *adapter = dm->adapter; -+ -+ phy_set_tx_power_index_by_rs(adapter, ch, path, section); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ phy_set_tx_power_index_by_rate_section(dm->adapter, path, ch, section); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ PHY_SetTxPowerIndexByRateSection(adapter, path, ch, section); -+#endif -+} -+ -+u8 odm_get_tx_power_index(struct dm_struct *dm, enum rf_path path, u8 rate, -+ u8 bw, u8 ch) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ -+ return PHY_GetTxPowerIndex(dm->adapter, path, rate, (CHANNEL_WIDTH)bw, ch); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ void *adapter = dm->adapter; -+ -+ return phy_get_tx_power_index(adapter, path, rate, bw, ch); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ void *adapter = dm->adapter; -+ -+ return phy_get_tx_power_index(adapter, path, rate, bw, ch); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ return phy_get_tx_power_index(dm->adapter, path, rate, bw, ch); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ return PHY_GetTxPowerIndex(dm->adapter, path, rate, bw, ch); -+#endif -+} -+ -+u8 odm_efuse_one_byte_read(struct dm_struct *dm, u16 addr, u8 *data, -+ boolean b_pseu_do_test) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ -+ return (u8)EFUSE_OneByteRead(adapter, addr, data, b_pseu_do_test); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ void *adapter = dm->adapter; -+ -+ return rtl_efuse_onebyte_read(adapter, addr, data, b_pseu_do_test); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ return -1; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ return efuse_onebyte_read(dm->adapter, addr, data, b_pseu_do_test); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP) -+ return Efuse_OneByteRead(dm, addr, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ return (u8)efuse_OneByteRead(adapter, addr, data, b_pseu_do_test); -+#endif -+} -+ -+void odm_efuse_logical_map_read(struct dm_struct *dm, u8 type, u16 offset, -+ u32 *data) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ void *adapter = dm->adapter; -+ -+ EFUSE_ShadowRead(adapter, type, offset, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ void *adapter = dm->adapter; -+ -+ rtl_efuse_logical_map_read(adapter, type, offset, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ efuse_logical_map_read(dm->adapter, type, offset, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ void *adapter = dm->adapter; -+ -+ EFUSE_ShadowRead(adapter, type, offset, data); -+#endif -+} -+ -+enum hal_status -+odm_iq_calibrate_by_fw(struct dm_struct *dm, u8 clear, u8 segment) -+{ -+ enum hal_status iqk_result = HAL_STATUS_FAILURE; -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ struct _ADAPTER *adapter = dm->adapter; -+ -+ if (HAL_MAC_FWIQK_Trigger(&GET_HAL_MAC_INFO(adapter), clear, segment) == 0) -+ iqk_result = HAL_STATUS_SUCCESS; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ void *adapter = dm->adapter; -+ -+ iqk_result = rtl_phydm_fw_iqk(adapter, clear, segment); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+#else -+ iqk_result = rtw_phydm_fw_iqk(dm, clear, segment); -+#endif -+#elif (DM_ODM_SUPPORT_TYPE & ODM_IOT) -+ iqk_result = rtw_phydm_fw_iqk(dm, clear, segment); -+#endif -+ return iqk_result; -+} -+ -+enum hal_status -+odm_dpk_by_fw(struct dm_struct *dm) -+{ -+ enum hal_status dpk_result = HAL_STATUS_FAILURE; -+#if 0 -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ struct _ADAPTER *adapter = dm->adapter; -+ -+ if (hal_mac_fwdpk_trigger(&GET_HAL_MAC_INFO(adapter)) == 0) -+ dpk_result = HAL_STATUS_SUCCESS; -+#else -+ dpk_result = rtw_phydm_fw_dpk(dm); -+#endif -+ -+#endif -+ return dpk_result; -+} -+ -+void phydm_cmn_sta_info_hook(struct dm_struct *dm, u8 mac_id, -+ struct cmn_sta_info *pcmn_sta_info) -+{ -+ dm->phydm_sta_info[mac_id] = pcmn_sta_info; -+ -+ if (is_sta_active(pcmn_sta_info)) -+ dm->phydm_macid_table[pcmn_sta_info->mac_id] = mac_id; -+} -+ -+void phydm_macid2sta_idx_table(struct dm_struct *dm, u8 entry_idx, -+ struct cmn_sta_info *pcmn_sta_info) -+{ -+ if (is_sta_active(pcmn_sta_info)) -+ dm->phydm_macid_table[pcmn_sta_info->mac_id] = entry_idx; -+} -+ -+void phydm_add_interrupt_mask_handler(struct dm_struct *dm, u8 interrupt_type) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+ #if IS_EXIST_PCI || IS_EXIST_EMBEDDED -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ GET_HAL_INTERFACE(priv)->AddInterruptMaskHandler(priv, -+ interrupt_type) -+ ; -+ #endif -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#endif -+} -+ -+void phydm_enable_rx_related_interrupt_handler(struct dm_struct *dm) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+ #if IS_EXIST_PCI || IS_EXIST_EMBEDDED -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ GET_HAL_INTERFACE(priv)->EnableRxRelatedInterruptHandler(priv); -+ #endif -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#endif -+} -+ -+void phydm_iqk_wait(struct dm_struct *dm, u32 timeout) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n"); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+#else -+ void *adapter = dm->adapter; -+ -+ rtl8812_iqk_wait(adapter, timeout); -+#endif -+#endif -+} -+ -+u8 phydm_get_hwrate_to_mrate(struct dm_struct *dm, u8 rate) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ return HwRateToMRate(rate); -+#endif -+ return 0; -+} -+ -+void phydm_set_crystalcap(struct dm_struct *dm, u8 crystal_cap) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ ROM_odm_SetCrystalCap(dm, crystal_cap); -+#endif -+} -+ -+void phydm_run_in_thread_cmd(struct dm_struct *dm, void (*func)(void *), -+ void *context) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ PHYDM_DBG(dm, DBG_CMN, "Not support for CE MAC80211 driver!\n"); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ void *adapter = dm->adapter; -+ -+ rtw_run_in_thread_cmd(adapter, func, context); -+#endif -+} -+ -+u8 phydm_get_tx_rate(struct dm_struct *dm) -+{ -+ struct _hal_rf_ *rf = &dm->rf_table; -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ struct _ADAPTER *adapter = dm->adapter; -+#endif -+ u8 tx_rate = 0xff; -+ u8 mpt_rate_index = 0; -+ -+ if (*dm->mp_mode == 1) { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+#if (MP_DRIVER == 1) -+ PMPT_CONTEXT p_mpt_ctx = &adapter->MptCtx; -+ -+ tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex); -+#endif -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+#ifdef CONFIG_MP_INCLUDED -+ if (rf->mp_rate_index) -+ mpt_rate_index = *rf->mp_rate_index; -+ -+ tx_rate = mpt_to_mgnt_rate(mpt_rate_index); -+#endif -+#endif -+#endif -+ } else { -+ u16 rate = *dm->forced_data_rate; -+ -+ if (!rate) { /*auto rate*/ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ struct _ADAPTER *adapter = dm->adapter; -+ -+ tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ tx_rate = dm->tx_rate; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ if (dm->number_linked_client != 0) -+ tx_rate = hw_rate_to_m_rate(dm->tx_rate); -+ else -+ tx_rate = rf->p_rate_index; -+#endif -+ } else { /*force rate*/ -+ tx_rate = (u8)rate; -+ } -+ } -+ -+ return tx_rate; -+} -+ -+u8 phydm_get_tx_power_dbm(struct dm_struct *dm, u8 rf_path, -+ u8 rate, u8 bandwidth, u8 channel) -+{ -+ u8 tx_power_dbm = 0; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct _ADAPTER *adapter = dm->adapter; -+ tx_power_dbm = PHY_GetTxPowerFinalAbsoluteValue(adapter, rf_path, rate, bandwidth, channel); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ tx_power_dbm = phy_get_tx_power_final_absolute_value(dm->adapter, rf_path, rate, bandwidth, channel); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ tx_power_dbm = PHY_GetTxPowerFinalAbsoluteValue(dm, rf_path, rate, bandwidth, channel); -+#endif -+ return tx_power_dbm; -+} -+ -+s16 phydm_get_tx_power_mdbm(struct dm_struct *dm, u8 rf_path, -+ u8 rate, u8 bandwidth, u8 channel) -+{ -+ s16 tx_power_dbm = 0; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct _ADAPTER *adapter = dm->adapter; -+ tx_power_dbm = PHY_GetTxPowerFinalAbsoluteValuemdBm(adapter, rf_path, rate, bandwidth, channel); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ tx_power_dbm = rtw_odm_get_tx_power_mbm(dm, rf_path, rate, bandwidth, channel); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ tx_power_dbm = PHY_GetTxPowerFinalAbsoluteValuembm(dm, rf_path, rate, bandwidth, channel); -+#endif -+ return tx_power_dbm; -+} -+ -+u32 phydm_rfe_ctrl_gpio(struct dm_struct *dm, u8 gpio_num) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ return rtw_phydm_rfe_ctrl_gpio(dm->adapter, gpio_num); -+#endif -+ return 0; -+} -+ -+u64 phydm_division64(u64 x, u64 y) -+{ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ do_div(x, y); -+ return x; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ return x / y; -+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ return rtw_division64(x, y); -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_interface.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_interface.h -new file mode 100644 -index 000000000000..2c75a23c77aa ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_interface.h -@@ -0,0 +1,328 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __ODM_INTERFACE_H__ -+#define __ODM_INTERFACE_H__ -+ -+#define INTERFACE_VERSION "1.2" -+ -+#define pdm_set_reg odm_set_bb_reg -+ -+/*@=========== Constant/Structure/Enum/... Define*/ -+ -+enum phydm_h2c_cmd { -+ PHYDM_H2C_RA_MASK = 0x40, -+ PHYDM_H2C_TXBF = 0x41, -+ ODM_H2C_RSSI_REPORT = 0x42, -+ ODM_H2C_IQ_CALIBRATION = 0x45, -+ PHYDM_RA_MASK_ABOVE_3SS = 0x46, -+ ODM_H2C_RA_PARA_ADJUST = 0x47, -+ PHYDM_H2C_DYNAMIC_TX_PATH = 0x48, -+ PHYDM_H2C_FW_TRACE_EN = 0x49, -+ ODM_H2C_WIFI_CALIBRATION = 0x6d, -+ PHYDM_H2C_MU = 0x4a, -+ PHYDM_H2C_FW_GENERAL_INIT = 0x4c, -+ PHYDM_H2C_FW_CLM_MNTR = 0x4d, -+ PHYDM_H2C_MCC = 0x4f, -+ PHYDM_H2C_RESP_TX_PATH_CTRL = 0x50, -+ PHYDM_H2C_RESP_TX_ANT_CTRL = 0x51, -+ PHYDM_H2C_FW_DM_CTRL = 0x55, -+ ODM_MAX_H2CCMD -+}; -+ -+enum phydm_c2h_evt { -+ PHYDM_C2H_DBG = 0, -+ PHYDM_C2H_LB = 1, -+ PHYDM_C2H_XBF = 2, -+ PHYDM_C2H_TX_REPORT = 3, -+ PHYDM_C2H_INFO = 9, -+ PHYDM_C2H_BT_MP = 11, -+ PHYDM_C2H_RA_RPT = 12, -+ PHYDM_C2H_RA_PARA_RPT = 14, -+ PHYDM_C2H_DYNAMIC_TX_PATH_RPT = 15, -+ PHYDM_C2H_IQK_FINISH = 17, /*@0x11*/ -+ PHYDM_C2H_CLM_MONITOR = 0x2a, -+ PHYDM_C2H_DBG_CODE = 0xFE, -+ PHYDM_C2H_EXTEND = 0xFF, -+}; -+ -+enum phydm_extend_c2h_evt { -+ PHYDM_EXTEND_C2H_DBG_PRINT = 0 -+ -+}; -+ -+enum phydm_halmac_param { -+ PHYDM_HALMAC_CMD_MAC_W8 = 0, -+ PHYDM_HALMAC_CMD_MAC_W16 = 1, -+ PHYDM_HALMAC_CMD_MAC_W32 = 2, -+ PHYDM_HALMAC_CMD_BB_W8, -+ PHYDM_HALMAC_CMD_BB_W16, -+ PHYDM_HALMAC_CMD_BB_W32, -+ PHYDM_HALMAC_CMD_RF_W, -+ PHYDM_HALMAC_CMD_DELAY_US, -+ PHYDM_HALMAC_CMD_DELAY_MS, -+ PHYDM_HALMAC_CMD_END = 0XFF, -+}; -+ -+/*@=========== Macro Define*/ -+ -+#define _reg_all(_name) ODM_##_name -+#define _reg_ic(_name, _ic) ODM_##_name##_ic -+#define _bit_all(_name) BIT_##_name -+#define _bit_ic(_name, _ic) BIT_##_name##_ic -+ -+#if defined(DM_ODM_CE_MAC80211) -+#define ODM_BIT(name, dm) \ -+ ((dm->support_ic_type & ODM_IC_11N_SERIES) ? \ -+ ODM_BIT_##name##_11N : ODM_BIT_##name##_11AC) -+ -+#define ODM_REG(name, dm) \ -+ ((dm->support_ic_type & ODM_IC_11N_SERIES) ? \ -+ ODM_REG_##name##_11N : ODM_REG_##name##_11AC) -+#else -+#define _reg_11N(_name) ODM_REG_##_name##_11N -+#define _reg_11AC(_name) ODM_REG_##_name##_11AC -+#define _bit_11N(_name) ODM_BIT_##_name##_11N -+#define _bit_11AC(_name) ODM_BIT_##_name##_11AC -+ -+#ifdef __ECOS -+#define _rtk_cat(_name, _ic_type, _func) \ -+ ( \ -+ ((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \ -+ _func##_11AC(_name)) -+#else -+ -+#define _cat(_name, _ic_type, _func) \ -+ ( \ -+ ((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \ -+ _func##_11AC(_name)) -+#endif -+/*@ -+ * only sample code -+ *#define _cat(_name, _ic_type, _func) \ -+ * ( \ -+ * ((_ic_type) & ODM_RTL8188E) ? _func##_ic(_name, _8188E) :\ -+ * _func##_ic(_name, _8195) \ -+ * ) -+ */ -+ -+/* @_name: name of register or bit. -+ * Example: "ODM_REG(R_A_AGC_CORE1, dm)" -+ * gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", -+ * depends on support_ic_type. -+ */ -+#ifdef __ECOS -+ #define ODM_REG(_name, _pdm_odm) \ -+ _rtk_cat(_name, _pdm_odm->support_ic_type, _reg) -+ #define ODM_BIT(_name, _pdm_odm) \ -+ _rtk_cat(_name, _pdm_odm->support_ic_type, _bit) -+#else -+ #define ODM_REG(_name, _pdm_odm) \ -+ _cat(_name, _pdm_odm->support_ic_type, _reg) -+ #define ODM_BIT(_name, _pdm_odm) \ -+ _cat(_name, _pdm_odm->support_ic_type, _bit) -+#endif -+ -+#endif -+/*@ -+ * =========== Extern Variable ??? It should be forbidden. -+ */ -+ -+/*@ -+ * =========== EXtern Function Prototype -+ */ -+ -+u8 odm_read_1byte(struct dm_struct *dm, u32 reg_addr); -+ -+u16 odm_read_2byte(struct dm_struct *dm, u32 reg_addr); -+ -+u32 odm_read_4byte(struct dm_struct *dm, u32 reg_addr); -+ -+void odm_write_1byte(struct dm_struct *dm, u32 reg_addr, u8 data); -+ -+void odm_write_2byte(struct dm_struct *dm, u32 reg_addr, u16 data); -+ -+void odm_write_4byte(struct dm_struct *dm, u32 reg_addr, u32 data); -+ -+void odm_set_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, -+ u32 data); -+ -+u32 odm_get_mac_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask); -+ -+void odm_set_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask, u32 data); -+ -+u32 odm_get_bb_reg(struct dm_struct *dm, u32 reg_addr, u32 bit_mask); -+ -+void odm_set_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr, -+ u32 bit_mask, u32 data); -+ -+u32 odm_get_rf_reg(struct dm_struct *dm, u8 e_rf_path, u32 reg_addr, -+ u32 bit_mask); -+ -+/*@ -+ * Memory Relative Function. -+ */ -+void odm_allocate_memory(struct dm_struct *dm, void **ptr, u32 length); -+void odm_free_memory(struct dm_struct *dm, void *ptr, u32 length); -+ -+void odm_move_memory(struct dm_struct *dm, void *dest, void *src, u32 length); -+ -+s32 odm_compare_memory(struct dm_struct *dm, void *buf1, void *buf2, -+ u32 length); -+ -+void odm_memory_set(struct dm_struct *dm, void *pbuf, s8 value, u32 length); -+ -+/*@ -+ * ODM MISC-spin lock relative API. -+ */ -+void odm_acquire_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type); -+ -+void odm_release_spin_lock(struct dm_struct *dm, enum rt_spinlock_type type); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+/*@ -+ * ODM MISC-workitem relative API. -+ */ -+void odm_initialize_work_item( -+ struct dm_struct *dm, -+ PRT_WORK_ITEM p_rt_work_item, -+ RT_WORKITEM_CALL_BACK rt_work_item_callback, -+ void *context, -+ const char *sz_id); -+ -+void odm_start_work_item( -+ PRT_WORK_ITEM p_rt_work_item); -+ -+void odm_stop_work_item( -+ PRT_WORK_ITEM p_rt_work_item); -+ -+void odm_free_work_item( -+ PRT_WORK_ITEM p_rt_work_item); -+ -+void odm_schedule_work_item( -+ PRT_WORK_ITEM p_rt_work_item); -+ -+boolean -+odm_is_work_item_scheduled( -+ PRT_WORK_ITEM p_rt_work_item); -+#endif -+ -+/*@ -+ * ODM Timer relative API. -+ */ -+void ODM_delay_ms(u32 ms); -+ -+void ODM_delay_us(u32 us); -+ -+void ODM_sleep_ms(u32 ms); -+ -+void ODM_sleep_us(u32 us); -+ -+void odm_set_timer(struct dm_struct *dm, struct phydm_timer_list *timer, -+ u32 ms_delay); -+ -+void odm_initialize_timer(struct dm_struct *dm, struct phydm_timer_list *timer, -+ void *call_back_func, void *context, -+ const char *sz_id); -+ -+void odm_cancel_timer(struct dm_struct *dm, struct phydm_timer_list *timer); -+ -+void odm_release_timer(struct dm_struct *dm, struct phydm_timer_list *timer); -+ -+/*ODM FW relative API.*/ -+ -+enum hal_status -+phydm_set_reg_by_fw(struct dm_struct *dm, enum phydm_halmac_param config_type, -+ u32 offset, u32 data, u32 mask, enum rf_path e_rf_path, -+ u32 delay_time); -+ -+void odm_fill_h2c_cmd(struct dm_struct *dm, u8 element_id, u32 cmd_len, -+ u8 *cmd_buffer); -+ -+u8 phydm_c2H_content_parsing(void *dm_void, u8 c2h_cmd_id, u8 c2h_cmd_len, -+ u8 *tmp_buf); -+ -+u64 odm_get_current_time(struct dm_struct *dm); -+u64 odm_get_progressing_time(struct dm_struct *dm, u64 start_time); -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) && \ -+ (!defined(DM_ODM_CE_MAC80211) && !defined(DM_ODM_CE_MAC80211_V2)) -+ -+void phydm_set_hw_reg_handler_interface(struct dm_struct *dm, u8 reg_Name, -+ u8 *val); -+ -+void phydm_get_hal_def_var_handler_interface(struct dm_struct *dm, -+ enum _HAL_DEF_VARIABLE e_variable, -+ void *value); -+ -+#endif -+ -+void odm_set_tx_power_index_by_rate_section(struct dm_struct *dm, -+ enum rf_path path, u8 channel, -+ u8 rate_section); -+ -+u8 odm_get_tx_power_index(struct dm_struct *dm, enum rf_path path, u8 tx_rate, -+ u8 band_width, u8 channel); -+ -+u8 odm_efuse_one_byte_read(struct dm_struct *dm, u16 addr, u8 *data, -+ boolean b_pseu_do_test); -+ -+void odm_efuse_logical_map_read(struct dm_struct *dm, u8 type, u16 offset, -+ u32 *data); -+ -+enum hal_status -+odm_iq_calibrate_by_fw(struct dm_struct *dm, u8 clear, u8 segment); -+ -+enum hal_status -+odm_dpk_by_fw(struct dm_struct *dm); -+ -+void phydm_cmn_sta_info_hook(struct dm_struct *dm, u8 index, -+ struct cmn_sta_info *pcmn_sta_info); -+ -+void phydm_macid2sta_idx_table(struct dm_struct *dm, u8 entry_idx, -+ struct cmn_sta_info *pcmn_sta_info); -+ -+void phydm_add_interrupt_mask_handler(struct dm_struct *dm, u8 interrupt_type); -+ -+void phydm_enable_rx_related_interrupt_handler(struct dm_struct *dm); -+ -+void phydm_iqk_wait(struct dm_struct *dm, u32 timeout); -+u8 phydm_get_hwrate_to_mrate(struct dm_struct *dm, u8 rate); -+ -+void phydm_set_crystalcap(struct dm_struct *dm, u8 crystal_cap); -+void phydm_run_in_thread_cmd(struct dm_struct *dm, void (*func)(void *), -+ void *context); -+u8 phydm_get_tx_rate(struct dm_struct *dm); -+u8 phydm_get_tx_power_dbm(struct dm_struct *dm, u8 rf_path, -+ u8 rate, u8 bandwidth, u8 channel); -+ -+s16 phydm_get_tx_power_mdbm(struct dm_struct *dm, u8 rf_path, -+ u8 rate, u8 bandwidth, u8 channel); -+ -+u32 phydm_rfe_ctrl_gpio(struct dm_struct *dm, u8 gpio_num); -+ -+u64 phydm_division64(u64 x, u64 y); -+ -+#endif /* @__ODM_INTERFACE_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_lna_sat.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_lna_sat.c -new file mode 100644 -index 000000000000..f48ae5c798d6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_lna_sat.c -@@ -0,0 +1,1688 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/************************************************************* -+ * include files -+ * *************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+ -+#ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+void phydm_lna_sat_chk_init( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); -+ -+ lna_info->check_time = 0; -+ lna_info->sat_cnt_acc_patha = 0; -+ lna_info->sat_cnt_acc_pathb = 0; -+ #ifdef PHYDM_IC_ABOVE_3SS -+ lna_info->sat_cnt_acc_pathc = 0; -+ #endif -+ #ifdef PHYDM_IC_ABOVE_4SS -+ lna_info->sat_cnt_acc_pathd = 0; -+ #endif -+ lna_info->cur_sat_status = 0; -+ lna_info->pre_sat_status = 0; -+ lna_info->cur_timer_check_cnt = 0; -+ lna_info->pre_timer_check_cnt = 0; -+ -+ #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) -+ phydm_lna_sat_chk_bb_init(dm); -+ #endif -+} -+ -+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+void phydm_lna_sat_chk_bb_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info; -+ -+ boolean disable_bb_switch_tab = false; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); -+ -+ /*@set table switch mux r_6table_sel_anten*/ -+ odm_set_bb_reg(dm, 0x18ac, BIT(8), 0); -+ -+ /*@tab decision when idle*/ -+ odm_set_bb_reg(dm, 0x18ac, BIT(16), disable_bb_switch_tab); -+ odm_set_bb_reg(dm, 0x41ac, BIT(16), disable_bb_switch_tab); -+ odm_set_bb_reg(dm, 0x52ac, BIT(16), disable_bb_switch_tab); -+ odm_set_bb_reg(dm, 0x53ac, BIT(16), disable_bb_switch_tab); -+ /*@tab decision when ofdmcca*/ -+ odm_set_bb_reg(dm, 0x18ac, BIT(17), disable_bb_switch_tab); -+ odm_set_bb_reg(dm, 0x41ac, BIT(17), disable_bb_switch_tab); -+ odm_set_bb_reg(dm, 0x52ac, BIT(17), disable_bb_switch_tab); -+ odm_set_bb_reg(dm, 0x53ac, BIT(17), disable_bb_switch_tab); -+} -+ -+void phydm_set_ofdm_agc_tab_path( -+ void *dm_void, -+ u8 tab_sel, -+ enum rf_path path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "set AGC Tab%d\n", tab_sel); -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "r_6table_sel_anten = 0x%x\n", -+ odm_get_bb_reg(dm, 0x18ac, BIT(8))); -+ } -+ -+ if (dm->support_ic_type & ODM_RTL8198F) { -+ /*@table sel:0/2, mapping 2 to 1 */ -+ if (tab_sel == OFDM_AGC_TAB_0) { -+ odm_set_bb_reg(dm, 0x18ac, BIT(4), 0); -+ odm_set_bb_reg(dm, 0x41ac, BIT(4), 0); -+ odm_set_bb_reg(dm, 0x52ac, BIT(4), 0); -+ odm_set_bb_reg(dm, 0x53ac, BIT(4), 0); -+ } else if (tab_sel == OFDM_AGC_TAB_2) { -+ odm_set_bb_reg(dm, 0x18ac, BIT(4), 1); -+ odm_set_bb_reg(dm, 0x41ac, BIT(4), 1); -+ odm_set_bb_reg(dm, 0x52ac, BIT(4), 1); -+ odm_set_bb_reg(dm, 0x53ac, BIT(4), 1); -+ } else { -+ odm_set_bb_reg(dm, 0x18ac, BIT(4), 0); -+ odm_set_bb_reg(dm, 0x41ac, BIT(4), 0); -+ odm_set_bb_reg(dm, 0x52ac, BIT(4), 0); -+ odm_set_bb_reg(dm, 0x53ac, BIT(4), 0); -+ } -+ } else if (dm->support_ic_type & ODM_RTL8814B) { -+ if (tab_sel == OFDM_AGC_TAB_0) { -+ odm_set_bb_reg(dm, 0x18ac, 0xf0, 0); -+ odm_set_bb_reg(dm, 0x41ac, 0xf0, 0); -+ odm_set_bb_reg(dm, 0x52ac, 0xf0, 0); -+ odm_set_bb_reg(dm, 0x53ac, 0xf0, 0); -+ } else if (tab_sel == OFDM_AGC_TAB_2) { -+ odm_set_bb_reg(dm, 0x18ac, 0xf0, 2); -+ odm_set_bb_reg(dm, 0x41ac, 0xf0, 2); -+ odm_set_bb_reg(dm, 0x52ac, 0xf0, 2); -+ odm_set_bb_reg(dm, 0x53ac, 0xf0, 2); -+ } else { -+ odm_set_bb_reg(dm, 0x18ac, 0xf0, 0); -+ odm_set_bb_reg(dm, 0x41ac, 0xf0, 0); -+ odm_set_bb_reg(dm, 0x52ac, 0xf0, 0); -+ odm_set_bb_reg(dm, 0x53ac, 0xf0, 0); -+ } -+ } -+} -+ -+u8 phydm_get_ofdm_agc_tab_path( -+ void *dm_void, -+ enum rf_path path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 tab_sel = 0; -+ -+ if (dm->support_ic_type & ODM_RTL8198F) { -+ tab_sel = (u8)odm_get_bb_reg(dm, R_0x18ac, BIT(4)); -+ if (tab_sel == 0) -+ tab_sel = OFDM_AGC_TAB_0; -+ else if (tab_sel == 1) -+ tab_sel = OFDM_AGC_TAB_2; -+ } else if (dm->support_ic_type & ODM_RTL8814B) { -+ tab_sel = (u8)odm_get_bb_reg(dm, R_0x18ac, 0xf0); -+ if (tab_sel == 0) -+ tab_sel = OFDM_AGC_TAB_0; -+ else if (tab_sel == 2) -+ tab_sel = OFDM_AGC_TAB_2; -+ } -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "get path %d AGC Tab %d\n", -+ path, tab_sel); -+ return tab_sel; -+} -+#endif /*@#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)*/ -+ -+void phydm_set_ofdm_agc_tab( -+ void *dm_void, -+ u8 tab_sel) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /*@table sel:0/2, 1 is used for CCK */ -+ if (tab_sel == OFDM_AGC_TAB_0) -+ odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_0); -+ else if (tab_sel == OFDM_AGC_TAB_2) -+ odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_2); -+ else -+ odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_0); -+} -+ -+u8 phydm_get_ofdm_agc_tab( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ return (u8)odm_get_bb_reg(dm, R_0xc70, 0x1e00); -+} -+ -+void phydm_lna_sat_chk( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_dig_struct *dig_t = &dm->dm_dig_table; -+ struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info; -+ u8 igi_rssi_min; -+ u8 rssi_min = dm->rssi_min; -+ u32 sat_status_a, sat_status_b; -+ #ifdef PHYDM_IC_ABOVE_3SS -+ u32 sat_status_c; -+ #endif -+ #ifdef PHYDM_IC_ABOVE_4SS -+ u32 sat_status_d; -+ #endif -+ u8 igi_restore = dig_t->cur_ig_value; -+ u8 i, chk_cnt = lna_info->chk_cnt; -+ u32 lna_sat_cnt_thd = 0; -+ u8 agc_tab; -+ u32 max_check_time = 0; -+ /*@use rssi_max if rssi_min is not stable;*/ -+ /*@rssi_min = dm->rssi_max;*/ -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__); -+ -+ if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Func disable\n"); -+ return; -+ } -+ -+ if (lna_info->is_disable_lna_sat_chk) { -+ phydm_lna_sat_chk_init(dm); -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "disable_lna_sat_chk\n"); -+ return; -+ } -+ -+ /*@move igi to target pin of rssi_min */ -+ if (rssi_min == 0 || rssi_min == 0xff) { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "rssi_min=%d, set AGC Tab0\n", rssi_min); -+ /*@adapt agc table 0*/ -+ phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); -+ phydm_lna_sat_chk_init(dm); -+ return; -+ } else if (rssi_min % 2 != 0) { -+ igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI - 1; -+ } else { -+ igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI; -+ } -+ -+ if ((lna_info->chk_period > 0) && (lna_info->chk_period <= ONE_SEC_MS)) -+ max_check_time = chk_cnt * (ONE_SEC_MS / (lna_info->chk_period)) * 5; -+ else -+ max_check_time = chk_cnt * 5; -+ -+ lna_sat_cnt_thd = (max_check_time * lna_info->chk_duty_cycle) / 100; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "check_time=%d, rssi_min=%d, igi_rssi_min=0x%x\nchk_cnt=%d, chk_period=%d, max_check_time=%d, lna_sat_cnt_thd=%d\n", -+ lna_info->check_time, -+ rssi_min, -+ igi_rssi_min, -+ chk_cnt, -+ lna_info->chk_period, -+ max_check_time, -+ lna_sat_cnt_thd); -+ -+ odm_write_dig(dm, igi_rssi_min); -+ -+ /*@adapt agc table 0 check saturation status*/ -+ #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) -+ phydm_set_ofdm_agc_tab_path(dm, OFDM_AGC_TAB_0, RF_PATH_A); -+ else -+ #endif -+ phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); -+ /*@open rf power detection ckt & set detection range */ -+#if (RTL8198F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8198F) { -+ /*@set rf detection range (threshold)*/ -+ config_phydm_write_rf_reg_8198f(dm, RF_PATH_A, 0x85, -+ 0x3f, 0x3f); -+ config_phydm_write_rf_reg_8198f(dm, RF_PATH_B, 0x85, -+ 0x3f, 0x3f); -+ config_phydm_write_rf_reg_8198f(dm, RF_PATH_C, 0x85, -+ 0x3f, 0x3f); -+ config_phydm_write_rf_reg_8198f(dm, RF_PATH_D, 0x85, -+ 0x3f, 0x3f); -+ /*@open rf power detection ckt*/ -+ config_phydm_write_rf_reg_8198f(dm, RF_PATH_A, 0x86, 0x10, 1); -+ config_phydm_write_rf_reg_8198f(dm, RF_PATH_B, 0x86, 0x10, 1); -+ config_phydm_write_rf_reg_8198f(dm, RF_PATH_C, 0x86, 0x10, 1); -+ config_phydm_write_rf_reg_8198f(dm, RF_PATH_D, 0x86, 0x10, 1); -+ } -+#elif (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ /*@set rf detection range (threshold)*/ -+ config_phydm_write_rf_reg_8814b(dm, RF_PATH_A, 0x8B, 0x3, 0x3); -+ config_phydm_write_rf_reg_8814b(dm, RF_PATH_B, 0x8B, 0x3, 0x3); -+ config_phydm_write_rf_reg_8814b(dm, RF_PATH_C, 0x8B, 0x3, 0x3); -+ config_phydm_write_rf_reg_8814b(dm, RF_PATH_D, 0x8B, 0x3, 0x3); -+ /*@open rf power detection ckt*/ -+ config_phydm_write_rf_reg_8814b(dm, RF_PATH_A, 0x8B, 0x4, 1); -+ config_phydm_write_rf_reg_8814b(dm, RF_PATH_B, 0x8B, 0x4, 1); -+ config_phydm_write_rf_reg_8814b(dm, RF_PATH_C, 0x8B, 0x4, 1); -+ config_phydm_write_rf_reg_8814b(dm, RF_PATH_D, 0x8B, 0x4, 1); -+ } -+#else -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x86, 0x1f, 0x10); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x86, 0x1f, 0x10); -+ #ifdef PHYDM_IC_ABOVE_3SS -+ odm_set_rf_reg(dm, RF_PATH_C, RF_0x86, 0x1f, 0x10); -+ #endif -+ #ifdef PHYDM_IC_ABOVE_4SS -+ odm_set_rf_reg(dm, RF_PATH_D, RF_0x86, 0x1f, 0x10); -+ #endif -+#endif -+ -+ /*@check saturation status*/ -+ for (i = 0; i < chk_cnt; i++) { -+#if (RTL8198F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8198F) { -+ sat_status_a = config_phydm_read_rf_reg_8198f(dm, RF_PATH_A, -+ RF_0xae, -+ 0xe0000); -+ sat_status_b = config_phydm_read_rf_reg_8198f(dm, RF_PATH_B, -+ RF_0xae, -+ 0xe0000); -+ sat_status_c = config_phydm_read_rf_reg_8198f(dm, RF_PATH_C, -+ RF_0xae, -+ 0xe0000); -+ sat_status_d = config_phydm_read_rf_reg_8198f(dm, RF_PATH_D, -+ RF_0xae, -+ 0xe0000); -+ } -+#elif (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ /*@read peak detector info from 8814B rf reg*/ -+ sat_status_a = config_phydm_read_rf_reg_8814b(dm, RF_PATH_A, -+ RF_0xae, -+ 0xc0000); -+ sat_status_b = config_phydm_read_rf_reg_8814b(dm, RF_PATH_B, -+ RF_0xae, -+ 0xc0000); -+ sat_status_c = config_phydm_read_rf_reg_8814b(dm, RF_PATH_C, -+ RF_0xae, -+ 0xc0000); -+ sat_status_d = config_phydm_read_rf_reg_8814b(dm, RF_PATH_D, -+ RF_0xae, -+ 0xc0000); -+ } -+#else -+ sat_status_a = odm_get_rf_reg(dm, RF_PATH_A, RF_0xae, 0xc0000); -+ sat_status_b = odm_get_rf_reg(dm, RF_PATH_B, RF_0xae, 0xc0000); -+ #ifdef PHYDM_IC_ABOVE_3SS -+ sat_status_c = odm_get_rf_reg(dm, RF_PATH_C, RF_0xae, 0xc0000); -+ #endif -+ #ifdef PHYDM_IC_ABOVE_4SS -+ sat_status_d = odm_get_rf_reg(dm, RF_PATH_D, RF_0xae, 0xc0000); -+ #endif -+#endif -+ -+ if (sat_status_a != 0) -+ lna_info->sat_cnt_acc_patha++; -+ if (sat_status_b != 0) -+ lna_info->sat_cnt_acc_pathb++; -+ #ifdef PHYDM_IC_ABOVE_3SS -+ if (sat_status_c != 0) -+ lna_info->sat_cnt_acc_pathc++; -+ #endif -+ #ifdef PHYDM_IC_ABOVE_4SS -+ if (sat_status_d != 0) -+ lna_info->sat_cnt_acc_pathd++; -+ #endif -+ -+ if (lna_info->sat_cnt_acc_patha >= lna_sat_cnt_thd || -+ lna_info->sat_cnt_acc_pathb >= lna_sat_cnt_thd || -+ #ifdef PHYDM_IC_ABOVE_3SS -+ lna_info->sat_cnt_acc_pathc >= lna_sat_cnt_thd || -+ #endif -+ #ifdef PHYDM_IC_ABOVE_4SS -+ lna_info->sat_cnt_acc_pathd >= lna_sat_cnt_thd || -+ #endif -+ 0) { -+ lna_info->cur_sat_status = 1; -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "cur_sat_status=%d, check_time=%d\n", -+ lna_info->cur_sat_status, -+ lna_info->check_time); -+ break; -+ } -+ lna_info->cur_sat_status = 0; -+ } -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "cur_sat_status=%d, pre_sat_status=%d, sat_cnt_acc_patha=%d, sat_cnt_acc_pathb=%d\n", -+ lna_info->cur_sat_status, -+ lna_info->pre_sat_status, -+ lna_info->sat_cnt_acc_patha, -+ lna_info->sat_cnt_acc_pathb); -+ -+ #ifdef PHYDM_IC_ABOVE_4SS -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "cur_sat_status=%d, pre_sat_status=%d, sat_cnt_acc_pathc=%d, sat_cnt_acc_pathd=%d\n", -+ lna_info->cur_sat_status, -+ lna_info->pre_sat_status, -+ lna_info->sat_cnt_acc_pathc, -+ lna_info->sat_cnt_acc_pathd); -+ #endif -+ /*@agc table decision*/ -+ if (lna_info->cur_sat_status) { -+ if (!lna_info->dis_agc_table_swh) -+ #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) -+ phydm_set_ofdm_agc_tab_path(dm, -+ OFDM_AGC_TAB_2, -+ RF_PATH_A); -+ else -+ #endif -+ phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_2); -+ else -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "disable set to AGC Tab%d\n", OFDM_AGC_TAB_2); -+ lna_info->check_time = 0; -+ lna_info->sat_cnt_acc_patha = 0; -+ lna_info->sat_cnt_acc_pathb = 0; -+ #ifdef PHYDM_IC_ABOVE_3SS -+ lna_info->sat_cnt_acc_pathc = 0; -+ #endif -+ #ifdef PHYDM_IC_ABOVE_4SS -+ lna_info->sat_cnt_acc_pathd = 0; -+ #endif -+ lna_info->pre_sat_status = lna_info->cur_sat_status; -+ -+ } else if (lna_info->check_time <= (max_check_time - 1)) { -+ if (lna_info->pre_sat_status && !lna_info->dis_agc_table_swh) -+ #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) -+ phydm_set_ofdm_agc_tab_path(dm, -+ OFDM_AGC_TAB_2, -+ RF_PATH_A); -+ else -+ #endif -+ phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_2); -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ckeck time not reached\n"); -+ if (lna_info->dis_agc_table_swh) -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "disable set to AGC Tab%d\n", OFDM_AGC_TAB_2); -+ lna_info->check_time++; -+ -+ } else if (lna_info->check_time >= max_check_time) { -+ if (!lna_info->dis_agc_table_swh) -+ #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) -+ phydm_set_ofdm_agc_tab_path(dm, -+ OFDM_AGC_TAB_0, -+ RF_PATH_A); -+ else -+ #endif -+ phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ckeck time reached\n"); -+ if (lna_info->dis_agc_table_swh) -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "disable set to AGC Tab%d\n", OFDM_AGC_TAB_0); -+ lna_info->check_time = 0; -+ lna_info->sat_cnt_acc_patha = 0; -+ lna_info->sat_cnt_acc_pathb = 0; -+ #ifdef PHYDM_IC_ABOVE_3SS -+ lna_info->sat_cnt_acc_pathc = 0; -+ #endif -+ #ifdef PHYDM_IC_ABOVE_4SS -+ lna_info->sat_cnt_acc_pathd = 0; -+ #endif -+ lna_info->pre_sat_status = lna_info->cur_sat_status; -+ } -+ -+ #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) -+ agc_tab = phydm_get_ofdm_agc_tab_path(dm, RF_PATH_A); -+ else -+ #endif -+ agc_tab = phydm_get_ofdm_agc_tab(dm); -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "use AGC tab %d\n", agc_tab); -+ -+ /*@restore previous igi*/ -+ odm_write_dig(dm, igi_restore); -+ lna_info->cur_timer_check_cnt++; -+ odm_set_timer(dm, &lna_info->phydm_lna_sat_chk_timer, -+ lna_info->chk_period); -+} -+ -+void phydm_lna_sat_chk_callback( -+ void *dm_void -+ -+ ) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__); -+ phydm_lna_sat_chk(dm); -+} -+ -+void phydm_lna_sat_chk_timers( -+ void *dm_void, -+ u8 state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info; -+ -+ if (state == INIT_LNA_SAT_CHK_TIMMER) { -+ odm_initialize_timer(dm, -+ &lna_info->phydm_lna_sat_chk_timer, -+ (void *)phydm_lna_sat_chk_callback, NULL, -+ "phydm_lna_sat_chk_timer"); -+ } else if (state == CANCEL_LNA_SAT_CHK_TIMMER) { -+ odm_cancel_timer(dm, &lna_info->phydm_lna_sat_chk_timer); -+ } else if (state == RELEASE_LNA_SAT_CHK_TIMMER) { -+ odm_release_timer(dm, &lna_info->phydm_lna_sat_chk_timer); -+ } -+} -+ -+void phydm_lna_sat_chk_watchdog_type1( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info; -+ -+ u8 rssi_min = dm->rssi_min; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); -+ -+ if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "func disable\n"); -+ return; -+ } -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "pre_timer_check_cnt=%d, cur_timer_check_cnt=%d\n", -+ lna_info->pre_timer_check_cnt, -+ lna_info->cur_timer_check_cnt); -+ -+ if (lna_info->is_disable_lna_sat_chk) { -+ phydm_lna_sat_chk_init(dm); -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "is_disable_lna_sat_chk=%d, return\n", -+ lna_info->is_disable_lna_sat_chk); -+ return; -+ } -+ -+ if (rssi_min == 0 || rssi_min == 0xff) { -+ /*@adapt agc table 0 */ -+ phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0); -+ phydm_lna_sat_chk_init(dm); -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "rssi_min=%d, return\n", rssi_min); -+ return; -+ } -+ -+ if (lna_info->cur_timer_check_cnt == lna_info->pre_timer_check_cnt) { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "fail, restart timer\n"); -+ odm_set_timer(dm, &lna_info->phydm_lna_sat_chk_timer, -+ lna_info->chk_period); -+ } else { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Timer check pass\n"); -+ } -+ lna_info->pre_timer_check_cnt = lna_info->cur_timer_check_cnt; -+} -+ -+#endif /*@#ifdef PHYDM_LNA_SAT_CHK_TYPE1*/ -+ -+#ifdef PHYDM_LNA_SAT_CHK_TYPE2 -+ -+void phydm_bubble_sort( -+ void *dm_void, -+ u8 *array, -+ u16 array_length) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 i, j; -+ u8 temp; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); -+ for (i = 0; i < (array_length - 1); i++) { -+ for (j = (i + 1); j < (array_length); j++) { -+ if (array[i] > array[j]) { -+ temp = array[i]; -+ array[i] = array[j]; -+ array[j] = temp; -+ } -+ } -+ } -+} -+ -+void phydm_lna_sat_chk_type2_init( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ u8 real_shift = pinfo->total_bit_shift; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); -+ -+ pinfo->total_cnt_snr = 1 << real_shift; -+ pinfo->is_sm_done = TRUE; -+ pinfo->is_snr_done = FALSE; -+ pinfo->cur_snr_mean = 0; -+ pinfo->cur_snr_var = 0; -+ pinfo->cur_lower_snr_mean = 0; -+ pinfo->pre_snr_mean = 0; -+ pinfo->pre_snr_var = 0; -+ pinfo->pre_lower_snr_mean = 0; -+ pinfo->nxt_state = ORI_TABLE_MONITOR; -+ pinfo->pre_state = ORI_TABLE_MONITOR; -+} -+ -+void phydm_snr_collect( -+ void *dm_void, -+ u8 rx_snr) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ -+ if (pinfo->is_sm_done) { -+ /* @adapt only path-A for calculation */ -+ pinfo->snr_statistic[pinfo->cnt_snr_statistic] = rx_snr; -+ -+ if (pinfo->cnt_snr_statistic == (pinfo->total_cnt_snr - 1)) { -+ pinfo->is_snr_done = TRUE; -+ pinfo->cnt_snr_statistic = 0; -+ } else { -+ pinfo->cnt_snr_statistic++; -+ } -+ } else { -+ return; -+ } -+} -+ -+void phydm_parsing_snr(void *dm_void, void *pktinfo_void, s8 *rx_snr) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_t = &dm->dm_lna_sat_info; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ u8 target_macid = dm->rssi_min_macid; -+ -+ if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) -+ return; -+ -+ pktinfo = (struct phydm_perpkt_info_struct *)pktinfo_void; -+ -+ if (!pktinfo->is_packet_match_bssid) -+ return; -+ -+ if (lna_t->force_traget_macid != 0) -+ target_macid = lna_t->force_traget_macid; -+ -+ if (target_macid != pktinfo->station_id) -+ return; -+ -+ phydm_snr_collect(dm, rx_snr[0]); /*path-A B C D???*/ -+} -+ -+void phydm_snr_data_processing( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ u8 real_shift = pinfo->total_bit_shift; -+ u16 total_snr_cnt = pinfo->total_cnt_snr; -+ u16 total_loop_cnt = (total_snr_cnt - 1), i; -+ u32 temp; -+ u32 sum_snr_statistic = 0; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "total_loop_cnt=%d\n", total_loop_cnt); -+ -+ for (i = 0; (i <= total_loop_cnt); i++) { -+ if (pinfo->is_snr_detail_en) { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "snr[%d]=%d\n", i, pinfo->snr_statistic[i]); -+ } -+ -+ sum_snr_statistic += (u32)(pinfo->snr_statistic[i]); -+ -+ pinfo->snr_statistic_sqr[i] = (u16)(pinfo->snr_statistic[i] * pinfo->snr_statistic[i]); -+ } -+ -+ phydm_bubble_sort(dm, pinfo->snr_statistic, pinfo->total_cnt_snr); -+ -+ /*update SNR's cur mean*/ -+ pinfo->cur_snr_mean = (sum_snr_statistic >> real_shift); -+ -+ for (i = 0; (i <= total_loop_cnt); i++) { -+ if (pinfo->snr_statistic[i] >= pinfo->cur_snr_mean) -+ temp = pinfo->snr_statistic[i] - pinfo->cur_snr_mean; -+ else -+ temp = pinfo->cur_snr_mean - pinfo->snr_statistic[i]; -+ -+ pinfo->cur_snr_var += (temp * temp); -+ } -+ -+ /*update SNR's VAR*/ -+ pinfo->cur_snr_var = (pinfo->cur_snr_var >> real_shift); -+ -+ /*@acquire lower SNR's statistics*/ -+ temp = 0; -+ pinfo->cnt_lower_snr_statistic = (total_snr_cnt >> pinfo->lwr_snr_ratio_bit_shift); -+ pinfo->cnt_lower_snr_statistic = MAX_2(pinfo->cnt_lower_snr_statistic, SNR_RPT_MAX); -+ -+ for (i = 0; i < pinfo->cnt_lower_snr_statistic; i++) -+ temp += pinfo->snr_statistic[i]; -+ -+ pinfo->cur_lower_snr_mean = temp >> (real_shift - pinfo->lwr_snr_ratio_bit_shift); -+} -+ -+boolean phydm_is_snr_improve( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ boolean is_snr_improve; -+ u8 cur_state = pinfo->nxt_state; -+ u32 cur_mean = pinfo->cur_snr_mean; -+ u32 pre_mean = pinfo->pre_snr_mean; -+ u32 cur_lower_mean = pinfo->cur_lower_snr_mean; -+ u32 pre_lower_mean = pinfo->pre_lower_snr_mean; -+ u32 cur_var = pinfo->cur_snr_var; -+ -+ /*special case, zero VAR, interference is gone*/ -+ /*@make sure pre_var is larger enough*/ -+ if (cur_state == SAT_TABLE_MONITOR || -+ cur_state == ORI_TABLE_TRAINING) { -+ if (cur_mean >= pre_mean) { -+ if (cur_var == 0) -+ return true; -+ } -+ } -+#if 0 -+ /*special case, mean degrade less than VAR improvement*/ -+ /*@make sure pre_var is larger enough*/ -+ if (cur_state == ORI_TABLE_MONITOR && -+ cur_mean < pre_mean && -+ cur_var < pre_var) { -+ diff_mean = pre_mean - cur_mean; -+ diff_var = pre_var - cur_var; -+ return (diff_var > (2 * diff_mean * diff_mean)) ? true : false; -+ } -+ -+#endif -+ if (cur_lower_mean >= (pre_lower_mean + pinfo->delta_snr_mean)) -+ is_snr_improve = true; -+ else -+ is_snr_improve = false; -+#if 0 -+/* @condition refine, mean is bigger enough or VAR is smaller enough*/ -+/* @1. from mean's view, mean improve delta_snr_mean(2), VAR not degrade lot*/ -+ if (cur_mean > (pre_mean + pinfo->delta_snr_mean)) { -+ is_mean_improve = TRUE; -+ is_var_improve = (cur_var <= pre_var + dm->delta_snr_var) -+ ? TRUE : FALSE; -+ -+ } else if (cur_var + dm->delta_snr_var <= pre_var) { -+ is_var_improve = TRUE; -+ is_mean_improve = ((cur_mean + 1) >= pre_mean) ? TRUE : FALSE; -+ } else { -+ return false; -+ } -+#endif -+ return is_snr_improve; -+} -+ -+boolean phydm_is_snr_degrade( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ u32 cur_lower_mean = pinfo->cur_lower_snr_mean; -+ u32 pre_lower_mean = pinfo->pre_lower_snr_mean; -+ boolean is_degrade; -+ -+ if (cur_lower_mean <= (pre_lower_mean - pinfo->delta_snr_mean)) -+ is_degrade = TRUE; -+ else -+ is_degrade = FALSE; -+#if 0 -+ is_mean_dgrade = (pinfo->cur_snr_mean + pinfo->delta_snr_mean <= pinfo->pre_snr_mean) ? TRUE : FALSE; -+ is_var_degrade = (pinfo->cur_snr_var > (pinfo->pre_snr_var + pinfo->delta_snr_mean)) ? TRUE : FALSE; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d\n", -+ __func__, -+ pinfo->cur_snr_mean, -+ pinfo->pre_snr_mean, -+ pinfo->cur_snr_var, -+ pinfo->pre_snr_var); -+ -+ return (is_mean_dgrade & is_var_degrade); -+#endif -+ return is_degrade; -+} -+ -+boolean phydm_is_large_var( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ boolean is_large_var = (pinfo->cur_snr_var >= pinfo->snr_var_thd) ? TRUE : FALSE; -+ -+ return is_large_var; -+} -+ -+void phydm_update_pre_status( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ -+ pinfo->pre_lower_snr_mean = pinfo->cur_lower_snr_mean; -+ pinfo->pre_snr_mean = pinfo->cur_snr_mean; -+ pinfo->pre_snr_var = pinfo->cur_snr_var; -+} -+ -+void phydm_ori_table_monitor( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ -+ if (phydm_is_large_var(dm)) { -+ pinfo->nxt_state = SAT_TABLE_TRAINING; -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); -+ } else { -+ pinfo->nxt_state = ORI_TABLE_MONITOR; -+ /*switch to anti-sat table*/ -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); -+ } -+ phydm_update_pre_status(dm); -+ pinfo->pre_state = ORI_TABLE_MONITOR; -+} -+ -+void phydm_sat_table_training( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ -+ #if 0 -+ if pre_state = ORI_TABLE_MONITOR || SAT_TABLE_TRY_FAIL, -+ /*@"pre" adapt ori-table, "cur" adapt sat-table*/ -+ /*@adapt ori table*/ -+ if (pinfo->pre_state == ORI_TABLE_MONITOR) { -+ pinfo->nxt_state = SAT_TABLE_TRAINING; -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); -+ } else { -+ #endif -+ if (phydm_is_snr_improve(dm)) { -+ pinfo->nxt_state = SAT_TABLE_MONITOR; -+ } else { -+ pinfo->nxt_state = SAT_TABLE_TRY_FAIL; -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); -+ } -+ /*@}*/ -+ -+ phydm_update_pre_status(dm); -+ pinfo->pre_state = SAT_TABLE_TRAINING; -+} -+ -+void phydm_sat_table_try_fail( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ -+ /* @if pre_state = SAT_TABLE_TRAINING, "pre" adapt sat-table, "cur" adapt ori-table */ -+ /* @if pre_state = SAT_TABLE_TRY_FAIL, "pre" adapt ori-table, "cur" adapt ori-table */ -+ -+ if (phydm_is_large_var(dm)) { -+ if (phydm_is_snr_degrade(dm)) { -+ pinfo->nxt_state = SAT_TABLE_TRAINING; -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); -+ } else { -+ pinfo->nxt_state = SAT_TABLE_TRY_FAIL; -+ } -+ } else { -+ pinfo->nxt_state = ORI_TABLE_MONITOR; -+ } -+ phydm_update_pre_status(dm); -+ pinfo->pre_state = SAT_TABLE_TRY_FAIL; -+} -+ -+void phydm_sat_table_monitor( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ -+ if (phydm_is_snr_improve(dm)) { -+ pinfo->sat_table_monitor_times = 0; -+ -+ /* @if pre_state = SAT_TABLE_MONITOR, "pre" adapt sat-table, "cur" adapt sat-table */ -+ if (pinfo->pre_state == SAT_TABLE_MONITOR) { -+ pinfo->nxt_state = ORI_TABLE_TRAINING; -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); -+ //phydm_update_pre_status(dm); -+ } else { -+ pinfo->nxt_state = SAT_TABLE_MONITOR; -+ } -+ -+ /* @if pre_state = SAT_TABLE_TRAINING, "pre" adapt sat-table, "cur" adapt sat-table */ -+ /* @if pre_state = ORI_TABLE_TRAINING, "pre" adapt ori-table, "cur" adapt sat-table */ -+ /*pre_state above is no need to update*/ -+ } else { -+ if (pinfo->sat_table_monitor_times == pinfo->force_change_period) { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s: sat_table_monitor_times=%d\n", -+ __func__, pinfo->sat_table_monitor_times); -+ -+ pinfo->nxt_state = ORI_TABLE_TRAINING; -+ pinfo->sat_table_monitor_times = 0; -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); -+ } else { -+ pinfo->nxt_state = SAT_TABLE_MONITOR; -+ pinfo->sat_table_monitor_times++; -+ } -+ } -+ phydm_update_pre_status(dm); -+ pinfo->pre_state = SAT_TABLE_MONITOR; -+} -+ -+void phydm_ori_table_training( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ -+ /* pre_state = SAT_TABLE_MONITOR, "pre" adapt sat-table, "cur" adapt ori-table */ -+ -+ if (phydm_is_snr_degrade(dm) == FALSE) { -+ pinfo->nxt_state = ORI_TABLE_MONITOR; -+ } else { -+ if (pinfo->pre_snr_var == 0) -+ pinfo->nxt_state = ORI_TABLE_TRY_FAIL; -+ else -+ pinfo->nxt_state = SAT_TABLE_MONITOR; -+ -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); -+ } -+ phydm_update_pre_status(dm); -+ pinfo->pre_state = ORI_TABLE_TRAINING; -+} -+ -+void phydm_ori_table_try_fail( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ -+ if (pinfo->pre_state == ORI_TABLE_TRY_FAIL) { -+ if (phydm_is_snr_improve(dm)) { -+ pinfo->nxt_state = ORI_TABLE_TRAINING; -+ pinfo->ori_table_try_fail_times = 0; -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); -+ } else { -+ if (pinfo->ori_table_try_fail_times == pinfo->force_change_period) { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "%s: ori_table_try_fail_times=%d\n", __func__, pinfo->ori_table_try_fail_times); -+ -+ pinfo->nxt_state = ORI_TABLE_TRY_FAIL; -+ pinfo->ori_table_try_fail_times = 0; -+ phydm_update_pre_status(dm); -+ } else { -+ pinfo->nxt_state = ORI_TABLE_TRY_FAIL; -+ pinfo->ori_table_try_fail_times++; -+ phydm_update_pre_status(dm); -+ //config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); -+ } -+ } -+ } else { -+ pinfo->nxt_state = ORI_TABLE_TRY_FAIL; -+ pinfo->ori_table_try_fail_times = 0; -+ phydm_update_pre_status(dm); -+ //config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); -+ } -+ -+#if 0 -+ if (phydm_is_large_var(dm)) { -+ if (phydm_is_snr_degrade(dm)) { -+ pinfo->nxt_state = SAT_TABLE_TRAINING; -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); -+ } else { -+ pinfo->nxt_state = SAT_TABLE_TRY_FAIL; -+ } -+ } else { -+ pinfo->nxt_state = ORI_TABLE_MONITOR; -+ } -+ -+ phydm_update_pre_status(dm); -+#endif -+ pinfo->pre_state = ORI_TABLE_TRY_FAIL; -+} -+ -+char *phydm_lna_sat_state_msg( -+ void *dm_void, -+ IN u8 state) -+{ -+ char *dbg_message; -+ -+ switch (state) { -+ case ORI_TABLE_MONITOR: -+ dbg_message = "ORI_TABLE_MONITOR"; -+ break; -+ -+ case SAT_TABLE_TRAINING: -+ dbg_message = "SAT_TABLE_TRAINING"; -+ break; -+ -+ case SAT_TABLE_TRY_FAIL: -+ dbg_message = "SAT_TABLE_TRY_FAIL"; -+ break; -+ -+ case SAT_TABLE_MONITOR: -+ dbg_message = "SAT_TABLE_MONITOR"; -+ break; -+ -+ case ORI_TABLE_TRAINING: -+ dbg_message = "ORI_TABLE_TRAINING"; -+ break; -+ -+ case ORI_TABLE_TRY_FAIL: -+ dbg_message = "ORI_TABLE_TRY_FAIL"; -+ break; -+ -+ default: -+ dbg_message = "ORI_TABLE_MONITOR"; -+ break; -+ } -+ -+ return dbg_message; -+} -+ -+void phydm_lna_sat_type2_sm( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info; -+ u8 state = pinfo->nxt_state; -+ u8 agc_tab = (u8)odm_get_bb_reg(dm, 0x958, 0x1f); -+ char *dbg_message, *nxt_dbg_message; -+ u8 real_shift = pinfo->total_bit_shift; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n\n%s ==>\n", __func__); -+ -+ if ((dm->support_ic_type & ODM_RTL8822B) == FALSE) { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ODM_BB_LNA_SAT_CHK_TYPE2 only support 22B.\n"); -+ return; -+ } -+ -+ if ((dm->support_ability & ODM_BB_LNA_SAT_CHK) == FALSE) { -+ phydm_lna_sat_chk_type2_init(dm); -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ODM_BB_LNA_SAT_CHK_TYPE2 is NOT supported, cur table=%d\n", agc_tab); -+ return; -+ } -+ -+ if (pinfo->is_snr_done) -+ phydm_snr_data_processing(dm); -+ else -+ return; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "cur agc table %d\n", agc_tab); -+ -+ if (pinfo->is_force_lna_sat_table != AUTO_AGC_TABLE) { -+ /*reset state machine*/ -+ pinfo->nxt_state = ORI_TABLE_MONITOR; -+ if (pinfo->is_snr_done) { -+ if (pinfo->is_force_lna_sat_table == DEFAULT_AGC_TABLE) -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); -+ else if (pinfo->is_force_lna_sat_table == LNA_SAT_AGC_TABLE) -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE); -+ else -+ config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE); -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d,cur_lower_mean=%d, pre_lower_mean=%d, cnt_lower_snr=%d\n", -+ __func__, -+ pinfo->cur_snr_mean, -+ pinfo->pre_snr_mean, -+ pinfo->cur_snr_var, -+ pinfo->pre_snr_var, -+ pinfo->cur_lower_snr_mean, -+ pinfo->pre_lower_snr_mean, -+ pinfo->cnt_lower_snr_statistic); -+ -+ pinfo->is_snr_done = FALSE; -+ pinfo->is_sm_done = TRUE; -+ phydm_update_pre_status(dm); -+ } else { -+ return; -+ } -+ } else if (pinfo->is_snr_done) { -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d,cur_lower_mean=%d, pre_lower_mean=%d, cnt_lower_snr=%d\n", -+ __func__, -+ pinfo->cur_snr_mean, -+ pinfo->pre_snr_mean, -+ pinfo->cur_snr_var, -+ pinfo->pre_snr_var, -+ pinfo->cur_lower_snr_mean, -+ pinfo->pre_lower_snr_mean, -+ pinfo->cnt_lower_snr_statistic); -+ -+ switch (state) { -+ case ORI_TABLE_MONITOR: -+ dbg_message = "ORI_TABLE_MONITOR"; -+ phydm_ori_table_monitor(dm); -+ break; -+ -+ case SAT_TABLE_TRAINING: -+ dbg_message = "SAT_TABLE_TRAINING"; -+ phydm_sat_table_training(dm); -+ break; -+ -+ case SAT_TABLE_TRY_FAIL: -+ dbg_message = "SAT_TABLE_TRY_FAIL"; -+ phydm_sat_table_try_fail(dm); -+ break; -+ -+ case SAT_TABLE_MONITOR: -+ dbg_message = "SAT_TABLE_MONITOR"; -+ phydm_sat_table_monitor(dm); -+ break; -+ -+ case ORI_TABLE_TRAINING: -+ dbg_message = "ORI_TABLE_TRAINING"; -+ phydm_ori_table_training(dm); -+ break; -+ -+ case ORI_TABLE_TRY_FAIL: -+ dbg_message = "ORI_TABLE_TRAINING"; -+ phydm_ori_table_try_fail(dm); -+ break; -+ -+ default: -+ dbg_message = "ORI_TABLE_MONITOR"; -+ phydm_ori_table_monitor(dm); -+ break; -+ } -+ -+ dbg_message = phydm_lna_sat_state_msg(dm, state); -+ nxt_dbg_message = phydm_lna_sat_state_msg(dm, pinfo->nxt_state); -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "state: [%s]->[%s]\n", -+ dbg_message, nxt_dbg_message); -+ -+ pinfo->is_snr_done = FALSE; -+ pinfo->is_sm_done = TRUE; -+ pinfo->total_cnt_snr = 1 << real_shift; -+ -+ } else { -+ return; -+ } -+} -+#endif /*@#ifdef PHYDM_LNA_SAT_CHK_TYPE2*/ -+ -+#ifdef PHYDM_HW_SWITCH_AGC_TAB -+u32 phydm_get_lna_pd_reg(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 rf_pd_reg = RF_0x8b; -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ if (*dm->channel <= 14) -+ rf_pd_reg = RF_0x87; -+ else -+ rf_pd_reg = RF_0x8b; -+ } -+#endif -+ return rf_pd_reg; -+} -+ -+u32 phydm_get_lna_pd_en_mask(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 rf_pd_en_msk = BIT(2); -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ if (*dm->channel <= 14) -+ rf_pd_en_msk = BIT(4); -+ else -+ rf_pd_en_msk = BIT(2); -+ } -+#endif -+ return rf_pd_en_msk; -+} -+ -+boolean phydm_get_lna_pd_en(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 rf_pd_reg = RF_0x8b; -+ u32 rf_pd_en_msk = BIT(2); -+ u32 pd_en = 0; -+ -+ rf_pd_reg = phydm_get_lna_pd_reg(dm); -+ rf_pd_en_msk = phydm_get_lna_pd_en_mask(dm); -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ pd_en = config_phydm_read_rf_reg_8814b(dm, RF_PATH_A, -+ rf_pd_reg, -+ rf_pd_en_msk); -+#endif -+ return (boolean)pd_en; -+} -+ -+void phydm_set_lna_pd_en(void *dm_void, boolean lna_pd_en) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ enum rf_path i = RF_PATH_A; -+ u32 rf_pd_reg = RF_0x8b; -+ u32 rf_pd_en_msk = BIT(2); -+ -+ rf_pd_reg = phydm_get_lna_pd_reg(dm); -+ rf_pd_en_msk = phydm_get_lna_pd_en_mask(dm); -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ for (i = RF_PATH_A; i < MAX_PATH_NUM_8814B; i++) -+ config_phydm_write_rf_reg_8814b(dm, i, -+ rf_pd_reg, -+ rf_pd_en_msk, -+ (u8)lna_pd_en); -+#endif -+} -+ -+u32 phydm_get_lna_pd_th_mask(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 rf_pd_th_msk = 0x3; -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ rf_pd_th_msk = 0x3; -+#endif -+ return rf_pd_th_msk; -+} -+ -+enum lna_pd_th_level phydm_get_lna_pd_th_lv(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 rf_pd_reg = RF_0x8b; -+ u32 rf_pd_th_msk = 0x3; -+ u32 pd_th_lv = 0x0; -+ -+ rf_pd_reg = phydm_get_lna_pd_reg(dm); -+ rf_pd_th_msk = phydm_get_lna_pd_th_mask(dm); -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ pd_th_lv = config_phydm_read_rf_reg_8814b(dm, RF_PATH_A, -+ rf_pd_reg, -+ rf_pd_th_msk); -+#endif -+ return (enum lna_pd_th_level)pd_th_lv; -+} -+ -+void phydm_set_lna_pd_th_lv(void *dm_void, -+ enum lna_pd_th_level lna_pd_th_lv) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ enum rf_path i = RF_PATH_A; -+ u32 rf_pd_reg = RF_0x8b; -+ u32 rf_pd_th_msk = 0x3; -+ -+ rf_pd_reg = phydm_get_lna_pd_reg(dm); -+ rf_pd_th_msk = phydm_get_lna_pd_th_mask(dm); -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ for (i = RF_PATH_A; i < MAX_PATH_NUM_8814B; i++) -+ config_phydm_write_rf_reg_8814b(dm, i, -+ rf_pd_reg, -+ rf_pd_th_msk, -+ lna_pd_th_lv); -+#endif -+} -+ -+u32 phydm_get_sat_agc_tab_version(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ return odm_get_version_mp_8814b_extra_agc_tab(); -+#endif -+ return 0; -+} -+ -+boolean phydm_get_auto_agc_config(void *dm_void, -+ enum agc_tab_switch_state state_sel) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 state_en = 0; -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ switch (state_sel) { -+ case AGC_SWH_IDLE: -+ state_en = odm_get_bb_reg(dm, R_0x18ac, BIT(16)); -+ break; -+ case AGC_SWH_OFDM: -+ state_en = odm_get_bb_reg(dm, R_0x18ac, BIT(17)); -+ break; -+ case AGC_SWH_CCK: -+ state_en = odm_get_bb_reg(dm, R_0x18ac, BIT(18)); -+ break; -+ default: -+ state_en = 0; -+ break; -+ } -+#endif -+ return (boolean)state_en; -+} -+ -+boolean phydm_is_auto_agc_on(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean state_on = false; -+ -+ state_on = ((phydm_get_auto_agc_config(dm, AGC_SWH_IDLE) || -+ phydm_get_auto_agc_config(dm, AGC_SWH_CCK) || -+ phydm_get_auto_agc_config(dm, AGC_SWH_OFDM)) && -+ phydm_get_lna_pd_en(dm)); -+ -+ return state_on; -+} -+ -+void phydm_config_auto_agc(void *dm_void, -+ boolean idle_en, -+ boolean cck_cca_en, -+ boolean ofdm_cca_en) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 hwagc_opt = 0; -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ~ODM_RTL8814B) -+ return; -+ -+ if (idle_en) -+ hwagc_opt |= BIT(0); -+ else -+ hwagc_opt &= ~BIT(0); -+ if (ofdm_cca_en) -+ hwagc_opt |= BIT(1); -+ else -+ hwagc_opt &= ~BIT(1); -+ if (cck_cca_en) -+ hwagc_opt |= BIT(2); -+ else -+ hwagc_opt &= ~BIT(2); -+ -+ odm_set_bb_reg(dm, R_0x18ac, BIT(18) | BIT(17) | BIT(16), hwagc_opt); -+#ifdef PHYDM_COMPILE_ABOVE_2SS -+ odm_set_bb_reg(dm, R_0x41ac, BIT(18) | BIT(17) | BIT(16), hwagc_opt); -+#endif -+#ifdef PHYDM_COMPILE_ABOVE_3SS -+ odm_set_bb_reg(dm, R_0x52ac, BIT(18) | BIT(17) | BIT(16), hwagc_opt); -+#endif -+#ifdef PHYDM_COMPILE_ABOVE_4SS -+ odm_set_bb_reg(dm, R_0x53ac, BIT(18) | BIT(17) | BIT(16), hwagc_opt); -+#endif -+#endif -+} -+ -+void phydm_auto_agc_tab_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ phydm_set_lna_pd_th_lv(dm, 0x0); -+ phydm_config_auto_agc(dm, true, false, true); -+ phydm_set_lna_pd_en(dm, true); -+} -+ -+void phydm_auto_agc_tab_off(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ phydm_config_auto_agc(dm, false, false, false); -+ phydm_set_lna_pd_en(dm, false); -+} -+ -+void phydm_switch_sat_agc_by_band(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info; -+ -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) -+ odm_config_mp_8814b_extra_agc_tab(dm, lna_sat->cur_rf_band); -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ pr_debug("%s ==> switch to band%d\n", __func__, lna_sat->cur_rf_band); -+#else -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==> switch to band%d\n", -+ __func__, lna_sat->cur_rf_band); -+#endif -+} -+ -+void phydm_auto_agc_tab_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info; -+ u8 channel = *dm->channel; -+ -+ lna_sat->cur_rf_band = phydm_ch_to_rf_band(dm, channel); -+ phydm_switch_sat_agc_by_band(dm); -+ -+ if ((dm->support_ability & ODM_BB_LNA_SAT_CHK)) { -+ phydm_auto_agc_tab_reset(dm); -+ lna_sat->hw_swh_tab_on = true; -+ } else { -+ phydm_auto_agc_tab_off(dm); -+ lna_sat->hw_swh_tab_on = false; -+ } -+} -+ -+void phydm_auto_agc_tab_watchdog(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info; -+ boolean hw_swh_on = false; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); -+ -+ if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) { -+ if (lna_sat->hw_swh_tab_on) { -+ phydm_auto_agc_tab_off(dm); -+ lna_sat->hw_swh_tab_on = false; -+ } -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Disabled LNA sat. check\n"); -+ return; -+ } -+ -+ if (!lna_sat->hw_swh_tab_on) -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, -+ "[WARNING] HW switch AGC Tab not fully enabled\n"); -+} -+ -+void phydm_auto_agc_tab_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i; -+ u8 agc_tab = 0; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "LNA sat. AGC Tab version : %d\n", -+ phydm_get_sat_agc_tab_version(dm)); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Enable LNA peak detector : {0} {lna_pd_en = %d}\n", -+ phydm_get_lna_pd_en(dm)); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set LNA peak detector lv : {1} {lna_pd_th_lv = %d}\n", -+ phydm_get_lna_pd_th_lv(dm)); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Config hw switch AGC tab : {2} {hw_swh_en_rx_idle} {hw_swh_en_cck_cca} {hw_swh_en_ofdm_cca} = (%d, %d, %d)\n", -+ phydm_get_auto_agc_config(dm, AGC_SWH_IDLE), -+ phydm_get_auto_agc_config(dm, AGC_SWH_CCK), -+ phydm_get_auto_agc_config(dm, AGC_SWH_OFDM)); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Reset to default setting : {3}\n", -+ phydm_get_auto_agc_config(dm, AGC_SWH_IDLE), -+ phydm_get_auto_agc_config(dm, AGC_SWH_CCK), -+ phydm_get_auto_agc_config(dm, AGC_SWH_OFDM)); -+ -+ } else { -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ for (i = 1; i < 10; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var1[i]); -+ } -+ -+ if (var1[0] == 0) { -+ phydm_set_lna_pd_en(dm, (boolean)var1[1]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "set lna_pd_en = %d\n", -+ (u8)phydm_get_lna_pd_en(dm)); -+ } else if (var1[0] == 1) { -+ phydm_set_lna_pd_th_lv(dm, (u8)var1[1]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "set lna_pd_th_lv = %d\n", -+ phydm_get_lna_pd_th_lv(dm)); -+ } else if (var1[0] == 2) { -+ phydm_config_auto_agc(dm, (boolean)var1[1], -+ (boolean)var1[2], -+ (boolean)var1[3]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "set hw switch agc tab en: (rx_idle, cck_cca, ofdm_cca) = (%d, %d, %d)\n", -+ phydm_get_auto_agc_config(dm, AGC_SWH_IDLE), -+ phydm_get_auto_agc_config(dm, AGC_SWH_CCK), -+ phydm_get_auto_agc_config(dm, AGC_SWH_OFDM)); -+ } else if (var1[0] == 3) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "reset to default settings\n"); -+ phydm_auto_agc_tab_reset(dm); -+ } -+ lna_sat->hw_swh_tab_on = phydm_is_auto_agc_on(dm); -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif /*@#ifdef PHYDM_HW_SWITCH_AGC_TAB*/ -+ -+void phydm_lna_sat_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_t = &dm->dm_lna_sat_info; -+ char help[] = "-h"; -+ char monitor[] = "-m"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i; -+ u8 agc_tab = 0; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "monitor: -m\n"); -+ #ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{0} {lna_sat_chk_en}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{1} {agc_table_switch_en}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{2} {chk_cnt per callback}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{3} {chk_period(ms)}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{4} {chk_duty_cycle(%)}\n"); -+ #endif -+ } else if ((strcmp(input[1], monitor) == 0)) { -+#ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+ #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) -+ agc_tab = phydm_get_ofdm_agc_tab_path(dm, RF_PATH_A); -+ else -+ #endif -+ agc_tab = phydm_get_ofdm_agc_tab(dm); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "%s%d, %s%d, %s%d, %s%d\n", -+ "check_time = ", lna_t->check_time, -+ "pre_sat_status = ", lna_t->pre_sat_status, -+ "cur_sat_status = ", lna_t->cur_sat_status, -+ "current AGC tab = ", agc_tab); -+#endif -+ } else { -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ for (i = 1; i < 10; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var1[i]); -+ } -+ #ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+ if (var1[0] == 0) { -+ if (var1[1] == 1) -+ lna_t->is_disable_lna_sat_chk = false; -+ else if (var1[1] == 0) -+ lna_t->is_disable_lna_sat_chk = true; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "dis_lna_sat_chk=%d\n", -+ lna_t->is_disable_lna_sat_chk); -+ } else if (var1[0] == 1) { -+ if (var1[1] == 1) -+ lna_t->dis_agc_table_swh = false; -+ else if (var1[1] == 0) -+ lna_t->dis_agc_table_swh = true; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "dis_agc_table_swh=%d\n", -+ lna_t->dis_agc_table_swh); -+ -+ } else if (var1[0] == 2) { -+ lna_t->chk_cnt = (u8)var1[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "chk_cnt=%d\n", lna_t->chk_cnt); -+ } else if (var1[0] == 3) { -+ lna_t->chk_period = var1[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "chk_period=%d\n", lna_t->chk_period); -+ } else if (var1[0] == 4) { -+ lna_t->chk_duty_cycle = (u8)var1[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "chk_duty_cycle=%d\n", -+ lna_t->chk_duty_cycle); -+ } -+ #endif -+ #ifdef PHYDM_LNA_SAT_CHK_TYPE2 -+ if (var1[0] == 1) -+ lna_t->force_traget_macid = var1[1]; -+ #endif -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_lna_sat_chk_watchdog(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info; -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__); -+ -+ if (lna_sat->lna_sat_type == LNA_SAT_WITH_PEAK_DET) { -+ #ifdef PHYDM_HW_SWITCH_AGC_TAB -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ phydm_auto_agc_tab_watchdog(dm); -+ return; -+ } -+ #endif -+ #ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+ if (dm->support_ic_type & -+ (ODM_RTL8197F | ODM_RTL8198F | ODM_RTL8814B)) { -+ phydm_lna_sat_chk_watchdog_type1(dm); -+ return; -+ } -+ #endif -+ } else if (lna_sat->lna_sat_type == LNA_SAT_WITH_TRAIN) { -+ #ifdef PHYDM_LNA_SAT_CHK_TYPE2 -+ return; -+ #endif -+ } -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "support_ic_type match fail, return\n"); -+} -+ -+void phydm_lna_sat_config(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info; -+ -+ lna_sat->lna_sat_type = 0; -+ #if (RTL8822B_SUPPORT == 1) -+ if (dm->support_ic_type & (ODM_RTL8822B)) -+ lna_sat->lna_sat_type = LNA_SAT_WITH_TRAIN; -+ #endif -+ -+ #if (RTL8197F_SUPPORT || RTL8192F_SUPPORT || \ -+ RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+ if (dm->support_ic_type & -+ (ODM_RTL8197F | ODM_RTL8192F | ODM_RTL8198F | ODM_RTL8814B)) -+ lna_sat->lna_sat_type = LNA_SAT_WITH_PEAK_DET; -+ #endif -+ -+ PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "[%s] lna_sat_type=%d\n", -+ __func__, lna_sat->lna_sat_type); -+} -+ -+void phydm_lna_sat_check_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info; -+ -+ /*@2018.04.17 Johnson*/ -+ phydm_lna_sat_config(dm); -+ #ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+ lna_sat->chk_period = LNA_CHK_PERIOD; -+ lna_sat->chk_cnt = LNA_CHK_CNT; -+ lna_sat->chk_duty_cycle = LNA_CHK_DUTY_CYCLE; -+ lna_sat->dis_agc_table_swh = false; -+ #endif -+ /*@2018.04.17 Johnson end*/ -+ -+ if (lna_sat->lna_sat_type == LNA_SAT_WITH_PEAK_DET) { -+ #ifdef PHYDM_HW_SWITCH_AGC_TAB -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ phydm_auto_agc_tab_init(dm); -+ return; -+ } -+ #endif -+ #ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+ phydm_lna_sat_chk_init(dm); -+ #endif -+ } else if (lna_sat->lna_sat_type == LNA_SAT_WITH_TRAIN) { -+ #ifdef PHYDM_LNA_SAT_CHK_TYPE2 -+ phydm_lna_sat_chk_type2_init(dm); -+ #endif -+ } -+} -+ -+#endif /*@#ifdef PHYDM_LNA_SAT_CHK_SUPPORT*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_lna_sat.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_lna_sat.h -new file mode 100644 -index 000000000000..69a9349969c2 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_lna_sat.h -@@ -0,0 +1,196 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_LNA_SAT_H__ -+#define __PHYDM_LNA_SAT_H__ -+#ifdef PHYDM_LNA_SAT_CHK_SUPPORT -+/* @1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+ -+#define LNA_SAT_VERSION "1.1" -+ -+/*@LNA saturation check*/ -+#define OFDM_AGC_TAB_0 0 -+#define OFDM_AGC_TAB_2 2 -+ -+#define DIFF_RSSI_TO_IGI 10 -+#define ONE_SEC_MS 1000 -+ -+#define LNA_CHK_PERIOD 100 /*@ms*/ -+#define LNA_CHK_CNT 10 /*@checks per callback*/ -+#define LNA_CHK_DUTY_CYCLE 5 /*@percentage*/ -+ -+#define DELTA_STD 2 -+#define DELTA_MEAN 2 -+#define SNR_STATISTIC_SHIFT 8 -+#define SNR_RPT_MAX 256 -+ -+/* @1 ============================================================ -+ * 1 enumrate -+ * 1 ============================================================ -+ */ -+ -+enum lna_sat_timer_state { -+ INIT_LNA_SAT_CHK_TIMMER, -+ CANCEL_LNA_SAT_CHK_TIMMER, -+ RELEASE_LNA_SAT_CHK_TIMMER -+}; -+ -+#ifdef PHYDM_LNA_SAT_CHK_TYPE2 -+enum lna_sat_chk_type2_status { -+ ORI_TABLE_MONITOR, -+ ORI_TABLE_TRAINING, -+ SAT_TABLE_MONITOR, -+ SAT_TABLE_TRAINING, -+ SAT_TABLE_TRY_FAIL, -+ ORI_TABLE_TRY_FAIL -+}; -+ -+#endif -+ -+enum lna_sat_type { -+ LNA_SAT_WITH_PEAK_DET = 1, /*type1*/ -+ LNA_SAT_WITH_TRAIN = 2, /*type2*/ -+}; -+ -+#ifdef PHYDM_HW_SWITCH_AGC_TAB -+enum lna_pd_th_level { -+ LNA_PD_TH_LEVEL0 = 0, -+ LNA_PD_TH_LEVEL1 = 1, -+ LNA_PD_TH_LEVEL2 = 2, -+ LNA_PD_TH_LEVEL3 = 3 -+}; -+ -+enum agc_tab_switch_state { -+ AGC_SWH_IDLE, -+ AGC_SWH_CCK, -+ AGC_SWH_OFDM -+}; -+#endif -+ -+/* @1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+ -+struct phydm_lna_sat_t { -+#ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+ u8 chk_cnt; -+ u8 chk_duty_cycle; -+ u32 chk_period;/*@ms*/ -+ boolean is_disable_lna_sat_chk; -+ boolean dis_agc_table_swh; -+#endif -+#ifdef PHYDM_LNA_SAT_CHK_TYPE2 -+ u8 force_traget_macid; -+ u32 snr_var_thd; -+ u32 delta_snr_mean; -+ u16 ori_table_try_fail_times; -+ u16 cnt_lower_snr_statistic; -+ u16 sat_table_monitor_times; -+ u16 force_change_period; -+ u8 is_snr_detail_en; -+ u8 is_force_lna_sat_table; -+ u8 lwr_snr_ratio_bit_shift; -+ u8 cnt_snr_statistic; -+ u16 snr_statistic_sqr[SNR_RPT_MAX]; -+ u8 snr_statistic[SNR_RPT_MAX]; -+ u8 is_sm_done; -+ u8 is_snr_done; -+ u32 cur_snr_var; -+ u8 total_bit_shift; -+ u8 total_cnt_snr; -+ u32 cur_snr_mean; -+ u8 cur_snr_var0; -+ u32 cur_lower_snr_mean; -+ u32 pre_snr_mean; -+ u32 pre_snr_var; -+ u32 pre_lower_snr_mean; -+ u8 nxt_state; -+ u8 pre_state; -+#endif -+ enum lna_sat_type lna_sat_type; -+ u32 sat_cnt_acc_patha; -+ u32 sat_cnt_acc_pathb; -+#ifdef PHYDM_IC_ABOVE_3SS -+ u32 sat_cnt_acc_pathc; -+#endif -+#ifdef PHYDM_IC_ABOVE_4SS -+ u32 sat_cnt_acc_pathd; -+#endif -+ u32 check_time; -+ boolean pre_sat_status; -+ boolean cur_sat_status; -+#ifdef PHYDM_HW_SWITCH_AGC_TAB -+ boolean hw_swh_tab_on; -+ enum odm_rf_band cur_rf_band; -+#endif -+ struct phydm_timer_list phydm_lna_sat_chk_timer; -+ u32 cur_timer_check_cnt; -+ u32 pre_timer_check_cnt; -+}; -+ -+/* @1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ */ -+void phydm_lna_sat_chk_init(void *dm_void); -+ -+u8 phydm_get_ofdm_agc_tab(void *dm_void); -+ -+void phydm_lna_sat_chk(void *dm_void); -+ -+void phydm_lna_sat_chk_timers(void *dm_void, u8 state); -+ -+#ifdef PHYDM_LNA_SAT_CHK_TYPE1 -+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT) -+void phydm_lna_sat_chk_bb_init(void *dm_void); -+ -+void phydm_set_ofdm_agc_tab_path(void *dm_void, -+ u8 tab_sel, enum rf_path path); -+ -+u8 phydm_get_ofdm_agc_tab_path(void *dm_void, enum rf_path path); -+#endif /*@#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)*/ -+#endif -+ -+#ifdef PHYDM_LNA_SAT_CHK_TYPE2 -+void phydm_parsing_snr(void *dm_void, void *pktinfo_void, s8 *rx_snr); -+#endif -+ -+void phydm_lna_sat_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void phydm_lna_sat_chk_watchdog(void *dm_void); -+ -+void phydm_lna_sat_check_init(void *dm_void); -+ -+#ifdef PHYDM_HW_SWITCH_AGC_TAB -+void phydm_auto_agc_tab_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#endif -+#endif /*@#if (PHYDM_LNA_SAT_CHK_SUPPORT == 1)*/ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_math_lib.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_math_lib.c -new file mode 100644 -index 000000000000..c6c1035af055 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_math_lib.c -@@ -0,0 +1,290 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+const u32 db_invert_table[12][8] = { -+ {10, 13, 16, 20, 25, 32, 40, 50}, /* @U(32,3) */ -+ {64, 80, 101, 128, 160, 201, 256, 318}, /* @U(32,3) */ -+ {401, 505, 635, 800, 1007, 1268, 1596, 2010}, /* @U(32,3) */ -+ {316, 398, 501, 631, 794, 1000, 1259, 1585}, /* @U(32,0) */ -+ {1995, 2512, 3162, 3981, 5012, 6310, 7943, 10000}, /* @U(32,0) */ -+ {12589, 15849, 19953, 25119, 31623, 39811, 50119, 63098}, /* @U(32,0) */ -+ {79433, 100000, 125893, 158489, 199526, 251189, 316228, -+ 398107}, /* @U(32,0) */ -+ {501187, 630957, 794328, 1000000, 1258925, 1584893, 1995262, -+ 2511886}, /* @U(32,0) */ -+ {3162278, 3981072, 5011872, 6309573, 7943282, 1000000, 12589254, -+ 15848932}, /* @U(32,0) */ -+ {19952623, 25118864, 31622777, 39810717, 50118723, 63095734, -+ 79432823, 100000000}, /* @U(32,0) */ -+ {125892541, 158489319, 199526232, 251188643, 316227766, 398107171, -+ 501187234, 630957345}, /* @U(32,0) */ -+ {794328235, 1000000000, 1258925412, 1584893192, 1995262315, -+ 2511886432U, 3162277660U, 3981071706U} }; /* @U(32,0) */ -+ -+/*Y = 10*log(X)*/ -+s32 odm_pwdb_conversion(s32 X, u32 total_bit, u32 decimal_bit) -+{ -+ s32 Y, integer = 0, decimal = 0; -+ u32 i; -+ -+ if (X == 0) -+ X = 1; /* @log2(x), x can't be 0 */ -+ -+ for (i = (total_bit - 1); i > 0; i--) { -+ if (X & BIT(i)) { -+ integer = i; -+ if (i > 0) { -+ /*decimal is 0.5dB*3=1.5dB~=2dB */ -+ decimal = (X & BIT(i - 1)) ? 2 : 0; -+ } -+ break; -+ } -+ } -+ -+ Y = 3 * (integer - decimal_bit) + decimal; /* @10*log(x)=3*log2(x), */ -+ -+ return Y; -+} -+ -+s32 odm_sign_conversion(s32 value, u32 total_bit) -+{ -+ if (value & BIT(total_bit - 1)) -+ value -= BIT(total_bit); -+ -+ return value; -+} -+ -+/*threshold must form low to high*/ -+u16 phydm_find_intrvl(void *dm_void, u16 val, u16 *threshold, u16 th_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 i = 0; -+ u16 ret_val = 0; -+ u16 max_th = threshold[th_len - 1]; -+ -+ for (i = 0; i < th_len; i++) { -+ if (val < threshold[i]) { -+ ret_val = i; -+ break; -+ } else if (val >= max_th) { -+ ret_val = th_len; -+ break; -+ } -+ } -+ -+ return ret_val; -+} -+ -+void phydm_seq_sorting(void *dm_void, u32 *value, u32 *rank_idx, u32 *idx_out, -+ u8 seq_length) -+{ -+ u8 i = 0, j = 0; -+ u32 tmp_a, tmp_b; -+ u32 tmp_idx_a, tmp_idx_b; -+ -+ for (i = 0; i < seq_length; i++) -+ rank_idx[i] = i; -+ -+ for (i = 0; i < (seq_length - 1); i++) { -+ for (j = 0; j < (seq_length - 1 - i); j++) { -+ tmp_a = value[j]; -+ tmp_b = value[j + 1]; -+ -+ tmp_idx_a = rank_idx[j]; -+ tmp_idx_b = rank_idx[j + 1]; -+ -+ if (tmp_a < tmp_b) { -+ value[j] = tmp_b; -+ value[j + 1] = tmp_a; -+ -+ rank_idx[j] = tmp_idx_b; -+ rank_idx[j + 1] = tmp_idx_a; -+ } -+ } -+ } -+ -+ for (i = 0; i < seq_length; i++) -+ idx_out[rank_idx[i]] = i + 1; -+} -+ -+u32 odm_convert_to_db(u64 value) -+{ -+ u8 i; -+ u8 j; -+ u32 dB; -+ -+ if (value >= db_invert_table[11][7]) -+ return 96; /* @maximum 96 dB */ -+ -+ for (i = 0; i < 12; i++) { -+ if (i <= 2 && (value << FRAC_BITS) <= db_invert_table[i][7]) -+ break; -+ else if (i > 2 && value <= db_invert_table[i][7]) -+ break; -+ } -+ -+ for (j = 0; j < 8; j++) { -+ if (i <= 2 && (value << FRAC_BITS) <= db_invert_table[i][j]) -+ break; -+ else if (i > 2 && i < 12 && value <= db_invert_table[i][j]) -+ break; -+ } -+ -+ /*special cases*/ -+ if (j == 0 && i == 0) -+ goto end; -+ -+ if (i == 3 && j == 0) { -+ if (db_invert_table[3][0] - value > -+ value - (db_invert_table[2][7] >> FRAC_BITS)) { -+ i = 2; -+ j = 7; -+ } -+ goto end; -+ } -+ -+ if (i < 3) -+ value = value << FRAC_BITS; /*@elements of row 0~2 shift left*/ -+ -+ /*compare difference to get precise dB*/ -+ if (j == 0) { -+ if (db_invert_table[i][j] - value > -+ value - db_invert_table[i - 1][7]) { -+ i = i - 1; -+ j = 7; -+ } -+ } else { -+ if (db_invert_table[i][j] - value > -+ value - db_invert_table[i][j - 1]) { -+ j = j - 1; -+ } -+ } -+end: -+ dB = (i << 3) + j + 1; -+ -+ return dB; -+} -+ -+u64 phydm_db_2_linear(u32 value) -+{ -+ u8 i = 0; -+ u8 j = 0; -+ u64 linear = 0; -+ -+ value = value & 0xFF; -+ -+ /* @1dB~96dB */ -+ if (value > 96) { -+ value = 96; -+ } else if (value < 1) { -+ linear = 1; -+ return linear; -+ } -+ -+ i = (u8)((value - 1) >> 3); -+ j = (u8)(value - 1) - (i << 3); -+ -+ linear = db_invert_table[i][j]; -+ -+ if (i > 2) -+ linear = linear << FRAC_BITS; -+ -+ return linear; -+} -+ -+u16 phydm_show_fraction_num(u32 frac_val, u8 bit_num) -+{ -+ u8 i = 0; -+ u16 val = 0; -+ u16 base = 5000; -+ -+ for (i = bit_num; i > 0; i--) { -+ if (frac_val & BIT(i - 1)) -+ val += (base >> (bit_num - i)); -+ } -+ return val; -+} -+ -+u16 phydm_ones_num_in_bitmap(u64 val, u8 size) -+{ -+ u8 i = 0; -+ u8 ones_num = 0; -+ -+ for (i = 0; i < size; i++) { -+ if (val & BIT(0)) -+ ones_num++; -+ -+ val = val >> 1; -+ } -+ -+ return ones_num; -+} -+ -+u64 phydm_gen_bitmask(u8 mask_num) -+{ -+ u8 i = 0; -+ u64 bitmask = 0; -+ -+ if (mask_num > 64) -+ return 1; -+ -+ for (i = 0; i < mask_num; i++) -+ bitmask = (bitmask << 1) | BIT(0); -+ -+ return bitmask; -+} -+ -+s32 phydm_cnvrt_2_sign(u32 val, u8 bit_num) -+{ -+ if (bit_num >= 32) -+ return (s32)val; -+ -+ if (val & BIT(bit_num - 1)) /*Sign BIT*/ -+ val -= (1 << bit_num); /*@2's*/ -+ -+ return val; -+} -+ -+s64 phydm_cnvrt_2_sign_64(u64 val, u8 bit_num) -+{ -+ u64 one = 1; -+ s64 val_sign = (s64)val; -+ -+ if (bit_num >= 64) -+ return (s64)val; -+ -+ if (val & (one << (bit_num - 1))) /*Sign BIT*/ -+ val_sign = val - (one << bit_num); /*@2's*/ -+ -+ return val_sign; -+} -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_math_lib.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_math_lib.h -new file mode 100644 -index 000000000000..a96ae5ee4826 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_math_lib.h -@@ -0,0 +1,120 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_MATH_LIB_H__ -+#define __PHYDM_MATH_LIB_H__ -+ -+/* @2019.01.24 remove linear2db debug log*/ -+#define AUTO_MATH_LIB_VERSION "1.2" -+ -+/*@ -+ * 1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+ -+#define PHYDM_DIV(a, b) ((b) ? ((a) / (b)) : 0) -+#define DIVIDED_2(X) ((X) >> 1) -+/*@1/3 ~ 11/32*/ -+#if defined(DM_ODM_CE_MAC80211) -+#define DIVIDED_3(X) ({ \ -+ u32 div_3_tmp = (X); \ -+ (((div_3_tmp) + ((div_3_tmp) << 1) + ((div_3_tmp) << 3)) >> 5); }) -+#else -+#define DIVIDED_3(X) (((X) + ((X) << 1) + ((X) << 3)) >> 5) -+#endif -+#define DIVIDED_4(X) ((X) >> 2) -+ -+/*Store Ori Value*/ -+#if defined(DM_ODM_CE_MAC80211) -+#define WEIGHTING_AVG(v1, w1, v2, w2) \ -+ __WEIGHTING_AVG(v1, w1, v2, w2, typeof(v1), typeof(w1), typeof(v2), \ -+ typeof(w2)) -+#define __WEIGHTING_AVG(v1, w1, v2, w2, t1, t2, t3, t4) ({ \ -+ t1 __w_a_v1 = (v1); \ -+ t2 __w_a_w1 = (w1); \ -+ t3 __w_a_v2 = (v2); \ -+ t4 __w_a_w2 = (w2); \ -+ ((__w_a_v1) * (__w_a_w1) + (__w_a_v2) * (__w_a_w2)) \ -+ / ((__w_a_w2) + (__w_a_w1)); }) -+#else -+#define WEIGHTING_AVG(v1, w1, v2, w2) \ -+ (((v1) * (w1) + (v2) * (w2)) / ((w2) + (w1))) -+#endif -+ -+/*Store 2^ma x Value*/ -+#if defined(DM_ODM_CE_MAC80211) -+#define MA_ACC(old, new_val, ma) ({ \ -+ s16 __ma_acc_o = (old); \ -+ (__ma_acc_o) - ((__ma_acc_o) >> (ma)) + (new_val); }) -+#define GET_MA_VAL(val, ma) ({ \ -+ s16 __get_ma_tmp = (ma);\ -+ ((val) + (1 << ((__get_ma_tmp) - 1))) >> (__get_ma_tmp); }) -+#else -+#define MA_ACC(old, new_val, ma) ((old) - ((old) >> (ma)) + (new_val)) -+#define GET_MA_VAL(val, ma) (((val) + (1 << ((ma) - 1))) >> (ma)) -+#endif -+#define FRAC_BITS 3 -+/*@ -+ * 1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ */ -+ -+/*@ -+ * 1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+ -+/*@ -+ * 1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ */ -+ -+s32 odm_pwdb_conversion(s32 X, u32 total_bit, u32 decimal_bit); -+ -+s32 odm_sign_conversion(s32 value, u32 total_bit); -+ -+u16 phydm_find_intrvl(void *dm_void, u16 val, u16 *threshold, u16 th_len); -+ -+void phydm_seq_sorting(void *dm_void, u32 *value, u32 *rank_idx, u32 *idx_out, -+ u8 seq_length); -+ -+u32 odm_convert_to_db(u64 value); -+ -+u64 phydm_db_2_linear(u32 value); -+ -+u16 phydm_show_fraction_num(u32 frac_val, u8 bit_num); -+ -+u16 phydm_ones_num_in_bitmap(u64 val, u8 size); -+ -+u64 phydm_gen_bitmask(u8 mask_num); -+ -+s32 phydm_cnvrt_2_sign(u32 val, u8 bit_num); -+ -+s64 phydm_cnvrt_2_sign_64(u64 val, u8 bit_num); -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_mp.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_mp.c -new file mode 100644 -index 000000000000..4b2bd52faabd ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_mp.c -@@ -0,0 +1,408 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef PHYDM_MP_SUPPORT -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ -+void phydm_mp_set_single_tone_jgr3(void *dm_void, boolean is_single_tone, -+ u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_mp *mp = &dm->dm_mp_table; -+ u8 start = RF_PATH_A, end = RF_PATH_A; -+ u8 i = 0; -+ u8 central_ch = 0; -+ boolean is_2g_ch = false; -+ -+ switch (path) { -+ case RF_PATH_A: -+ case RF_PATH_B: -+ case RF_PATH_C: -+ case RF_PATH_D: -+ start = path; -+ end = path; -+ break; -+ case RF_PATH_AB: -+ start = RF_PATH_A; -+ end = RF_PATH_B; -+ break; -+#if (defined(PHYDM_COMPILE_IC_4SS)) -+ case RF_PATH_AC: -+ start = RF_PATH_A; -+ end = RF_PATH_C; -+ break; -+ case RF_PATH_AD: -+ start = RF_PATH_A; -+ end = RF_PATH_D; -+ break; -+ case RF_PATH_BC: -+ start = RF_PATH_B; -+ end = RF_PATH_C; -+ break; -+ case RF_PATH_BD: -+ start = RF_PATH_B; -+ end = RF_PATH_D; -+ break; -+ case RF_PATH_CD: -+ start = RF_PATH_C; -+ end = RF_PATH_D; -+ break; -+ case RF_PATH_ABC: -+ start = RF_PATH_A; -+ end = RF_PATH_C; -+ break; -+ case RF_PATH_ABD: -+ start = RF_PATH_A; -+ end = RF_PATH_D; -+ break; -+ case RF_PATH_ACD: -+ start = RF_PATH_A; -+ end = RF_PATH_D; -+ break; -+ case RF_PATH_BCD: -+ start = RF_PATH_B; -+ end = RF_PATH_D; -+ break; -+ case RF_PATH_ABCD: -+ start = RF_PATH_A; -+ end = RF_PATH_D; -+ break; -+#endif -+ } -+ -+ central_ch = (u8)odm_get_rf_reg(dm, RF_PATH_A, RF_0x18, 0xff); -+ is_2g_ch = (central_ch <= 14) ? true : false; -+ -+ if (is_single_tone) { -+ /*Disable CCA*/ -+ if (is_2g_ch) { /*CCK RxIQ weighting = [0,0]*/ -+ if(dm->support_ic_type & ODM_RTL8723F) { -+ odm_set_bb_reg(dm, R_0x2a24, BIT(13), 0x1); /*CCK*/ -+ } else { -+ odm_set_bb_reg(dm, R_0x1a9c, BIT(20), 0x0); -+ odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x3); -+ } -+ } -+ odm_set_bb_reg(dm, R_0x1d58, 0xff8, 0x1ff); /*OFDM*/ -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x5, BIT(0), 0x0); -+ for (i = start; i <= end; i++) { -+ mp->rf0[i] = odm_get_rf_reg(dm, i, RF_0x0, RFREG_MASK); -+ /*Tx mode: RF0x00[19:16]=4'b0010 */ -+ odm_set_rf_reg(dm, i, RF_0x0, 0xF0000, 0x2); -+ /*Lowest RF gain index: RF_0x1[5:0] TX power*/ -+ mp->rf1[i] = odm_get_rf_reg(dm, i, RF_0x1, RFREG_MASK); -+ odm_set_rf_reg(dm, i, RF_0x1, 0x3f, 0x0);//TX power -+ /*RF LO enabled */ -+ odm_set_rf_reg(dm, i, RF_0x58, BIT(1), 0x1); -+ } -+ } else { -+ for (i = start; i <= end; i++) { -+ mp->rf0[i] = odm_get_rf_reg(dm, i, RF_0x0, RFREG_MASK); -+ /*Tx mode: RF0x00[19:16]=4'b0010 */ -+ odm_set_rf_reg(dm, i, RF_0x0, 0xF0000, 0x2); -+ /*Lowest RF gain index: RF_0x0[4:0] = 0*/ -+ odm_set_rf_reg(dm, i, RF_0x0, 0x1f, 0x0); -+ /*RF LO enabled */ -+ odm_set_rf_reg(dm, i, RF_0x58, BIT(1), 0x1); -+ } -+ } -+ -+ #if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ mp->rf0_syn[RF_SYN0] = config_phydm_read_syn_reg_8814b( -+ dm, RF_SYN0, RF_0x0, RFREG_MASK); -+ /*Lowest RF gain index: RF_0x0[4:0] = 0x0*/ -+ config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x0, -+ 0x1f, 0x0); -+ /*RF LO enabled */ -+ config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x58, -+ BIT(1), 0x1); -+ /*SYN1*/ -+ if (*dm->band_width == CHANNEL_WIDTH_80_80) { -+ mp->rf0_syn[RF_SYN1] = config_phydm_read_syn_reg_8814b( -+ dm, RF_SYN1, RF_0x0, -+ RFREG_MASK); -+ config_phydm_write_rf_syn_8814b(dm, RF_SYN1, -+ RF_0x0, 0x1f, -+ 0x0); -+ config_phydm_write_rf_syn_8814b(dm, RF_SYN1, -+ RF_0x58, BIT(1), -+ 0x1); -+ } -+ } -+ #endif -+ } else { -+ /*Enable CCA*/ -+ if (is_2g_ch) { /*CCK RxIQ weighting = [1,1]*/ -+ if(dm->support_ic_type & ODM_RTL8723F) { -+ odm_set_bb_reg(dm, R_0x2a24, BIT(13), 0x0); /*CCK*/ -+ } else { -+ odm_set_bb_reg(dm, R_0x1a9c, BIT(20), 0x1); -+ odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x0); -+ } -+ } -+ odm_set_bb_reg(dm, R_0x1d58, 0xff8, 0x0); /*OFDM*/ -+ -+ if(dm->support_ic_type & ODM_RTL8723F) { -+ for (i = start; i <= end; i++) { -+ odm_set_rf_reg(dm, i, RF_0x0, RFREG_MASK, mp->rf0[i]); -+ odm_set_rf_reg(dm, i, RF_0x1, RFREG_MASK, mp->rf1[i]); -+ /*RF LO disabled */ -+ odm_set_rf_reg(dm, i, RF_0x58, BIT(1), 0x0); -+ } -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x5, BIT(0), 0x1); -+ } else { -+ for (i = start; i <= end; i++) { -+ odm_set_rf_reg(dm, i, RF_0x0, RFREG_MASK, mp->rf0[i]); -+ /*RF LO disabled */ -+ odm_set_rf_reg(dm, i, RF_0x58, BIT(1), 0x0); -+ } -+ } -+ #if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8814B) { -+ config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x0, -+ RFREG_MASK, -+ mp->rf0_syn[RF_SYN0]); -+ config_phydm_write_rf_syn_8814b(dm, RF_SYN0, RF_0x58, -+ BIT(1), 0x0); -+ /*SYN1*/ -+ if (*dm->band_width == CHANNEL_WIDTH_80_80) { -+ config_phydm_write_rf_syn_8814b(dm, RF_SYN1, -+ RF_0x0, -+ RFREG_MASK, -+ mp->rf0_syn[RF_SYN1]); -+ config_phydm_write_rf_syn_8814b(dm, RF_SYN1, -+ RF_0x58, BIT(1), -+ 0x0); -+ } -+ } -+ #endif -+ } -+} -+ -+void phydm_mp_set_carrier_supp_jgr3(void *dm_void, boolean is_carrier_supp, -+ u32 rate_index) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_mp *mp = &dm->dm_mp_table; -+ -+ if (is_carrier_supp) { -+ if (phydm_is_cck_rate(dm, (u8)rate_index)) { -+ /*if CCK block on? */ -+ if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(1))) -+ odm_set_bb_reg(dm, R_0x1c3c, BIT(1), 1); -+ -+ if(dm->support_ic_type & ODM_RTL8723F){ -+ /* @Carrier suppress tx */ -+ odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x1); -+ /*turn off scramble setting */ -+ odm_set_bb_reg(dm, R_0x2a04, BIT(5), 0x1); -+ /*Set CCK Tx Test Rate, set TxRate to 2Mbps */ -+ odm_set_bb_reg(dm, R_0x2a08, 0x300000, 0x1); -+ /* BB and PMAC cont tx */ -+ odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); -+ odm_set_bb_reg(dm, R_0x2a00, BIT(28), 0x1); -+ /* TX CCK ON */ -+ odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); -+ odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); -+ } -+ else { -+ /*Turn Off All Test mode */ -+ odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x0); -+ -+ /*transmit mode */ -+ odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x2); -+ /*turn off scramble setting */ -+ odm_set_bb_reg(dm, R_0x1a00, BIT(3), 0x0); -+ /*Set CCK Tx Test Rate, set TxRate to 1Mbps */ -+ odm_set_bb_reg(dm, R_0x1a00, 0x3000, 0x0); -+ } -+ } -+ } else { /*Stop Carrier Suppression. */ -+ if (phydm_is_cck_rate(dm, (u8)rate_index)) { -+ if(dm->support_ic_type & ODM_RTL8723F) { -+ /* TX Stop */ -+ odm_set_bb_reg(dm, R_0x2a00, BIT(0), 0x1); -+ /* Clear BB cont tx */ -+ odm_set_bb_reg(dm, R_0x2a00, BIT(28), 0x0); -+ /* Clear PMAC cont tx */ -+ odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); -+ /* Clear TX Stop */ -+ odm_set_bb_reg(dm, R_0x2a00, BIT(0), 0x0); -+ /* normal mode */ -+ odm_set_bb_reg(dm, R_0x2a08, BIT(18), 0x0); -+ /* turn on scramble setting */ -+ odm_set_bb_reg(dm, R_0x2a04, BIT(5), 0x0); -+ } -+ else { -+ /*normal mode */ -+ odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x0); -+ /*turn on scramble setting */ -+ odm_set_bb_reg(dm, R_0x1a00, BIT(3), 0x1); -+ } -+ /*BB Reset */ -+ odm_set_bb_reg(dm, R_0x1d0c, BIT(16), 0x0); -+ odm_set_bb_reg(dm, R_0x1d0c, BIT(16), 0x1); -+ } -+ } -+} -+ -+void phydm_mp_set_single_carrier_jgr3(void *dm_void, boolean is_single_carrier) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_mp *mp = &dm->dm_mp_table; -+ -+ if (is_single_carrier) { -+ /*1. if OFDM block on? */ -+ if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(0))) -+ odm_set_bb_reg(dm, R_0x1c3c, BIT(0), 1); -+ -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ /*3. turn on scramble setting */ -+ odm_set_bb_reg(dm, R_0x2a04, BIT(5), 0); -+ /*4. Turn On single carrier. */ -+ odm_set_bb_reg(dm, R_0x1ca4, 0x7, OFDM_SINGLE_CARRIER); -+ } -+ else { -+ /*2. set CCK test mode off, set to CCK normal mode */ -+ odm_set_bb_reg(dm, R_0x1a00, 0x3, 0); -+ /*3. turn on scramble setting */ -+ odm_set_bb_reg(dm, R_0x1a00, BIT(3), 1); -+ /*4. Turn On single carrier. */ -+ odm_set_bb_reg(dm, R_0x1ca4, 0x7, OFDM_SINGLE_CARRIER); -+ } -+ } else { -+ /*Turn off all test modes. */ -+ odm_set_bb_reg(dm, R_0x1ca4, 0x7, OFDM_OFF); -+ -+ /*Delay 10 ms */ -+ ODM_delay_ms(10); -+ -+ /*BB Reset*/ -+ odm_set_bb_reg(dm, R_0x1d0c, BIT(16), 0x0); -+ odm_set_bb_reg(dm, R_0x1d0c, BIT(16), 0x1); -+ } -+} -+ -+void phydm_mp_get_tx_ok_jgr3(void *dm_void, u32 rate_index) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_mp *mp = &dm->dm_mp_table; -+ -+ if (phydm_is_cck_rate(dm, (u8)rate_index)) -+ mp->tx_phy_ok_cnt = odm_get_bb_reg(dm, R_0x2de4, MASKLWORD); -+ else -+ mp->tx_phy_ok_cnt = odm_get_bb_reg(dm, R_0x2de0, MASKLWORD); -+} -+ -+void phydm_mp_get_rx_ok_jgr3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_mp *mp = &dm->dm_mp_table; -+ -+ u32 cck_ok = 0, ofdm_ok = 0, ht_ok = 0, vht_ok = 0; -+ u32 cck_err = 0, ofdm_err = 0, ht_err = 0, vht_err = 0; -+ if(dm->support_ic_type & ODM_RTL8723F) -+ cck_ok = odm_get_bb_reg(dm, R_0x2aac, MASKLWORD); -+ else -+ cck_ok = odm_get_bb_reg(dm, R_0x2c04, MASKLWORD); -+ ofdm_ok = odm_get_bb_reg(dm, R_0x2c14, MASKLWORD); -+ ht_ok = odm_get_bb_reg(dm, R_0x2c10, MASKLWORD); -+ vht_ok = odm_get_bb_reg(dm, R_0x2c0c, MASKLWORD); -+ if(dm->support_ic_type & ODM_RTL8723F) -+ cck_err = odm_get_bb_reg(dm, R_0x2aac, MASKHWORD); -+ else -+ cck_err = odm_get_bb_reg(dm, R_0x2c04, MASKHWORD); -+ ofdm_err = odm_get_bb_reg(dm, R_0x2c14, MASKHWORD); -+ ht_err = odm_get_bb_reg(dm, R_0x2c10, MASKHWORD); -+ vht_err = odm_get_bb_reg(dm, R_0x2c0c, MASKHWORD); -+ -+ mp->rx_phy_ok_cnt = cck_ok + ofdm_ok + ht_ok + vht_ok; -+ mp->rx_phy_crc_err_cnt = cck_err + ofdm_err + ht_err + vht_err; -+ mp->io_value = (u32)mp->rx_phy_ok_cnt; -+} -+#endif -+void phydm_mp_set_crystal_cap(void *dm_void, u8 crystal_cap) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ phydm_set_crystal_cap(dm, crystal_cap); -+} -+ -+void phydm_mp_set_single_tone(void *dm_void, boolean is_single_tone, u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_mp_set_single_tone_jgr3(dm, is_single_tone, path); -+} -+ -+void phydm_mp_set_carrier_supp(void *dm_void, boolean is_carrier_supp, -+ u32 rate_index) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_mp_set_carrier_supp_jgr3(dm, is_carrier_supp, rate_index); -+} -+ -+void phydm_mp_set_single_carrier(void *dm_void, boolean is_single_carrier) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_mp_set_single_carrier_jgr3(dm, is_single_carrier); -+} -+void phydm_mp_reset_rx_counters_phy(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ phydm_reset_bb_hw_cnt(dm); -+} -+ -+void phydm_mp_get_tx_ok(void *dm_void, u32 rate_index) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_mp_get_tx_ok_jgr3(dm, rate_index); -+} -+ -+void phydm_mp_get_rx_ok(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_mp_get_rx_ok_jgr3(dm); -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_mp.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_mp.h -new file mode 100644 -index 000000000000..5805a0378e4a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_mp.h -@@ -0,0 +1,83 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_MP_H__ -+#define __PHYDM_MP_H__ -+ -+/*2020.04.27 Refine single tone Tx flow*/ -+#define MP_VERSION "1.5" -+ -+/* @1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+/* @1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+struct phydm_mp { -+ /*Rx OK count, statistics used in Mass Production Test.*/ -+ u64 tx_phy_ok_cnt; -+ u64 rx_phy_ok_cnt; -+ /*Rx CRC32 error count, statistics used in Mass Production Test.*/ -+ u64 rx_phy_crc_err_cnt; -+ /*The Value of IO operation is depend of MptActType.*/ -+ u32 io_value; -+ u32 rf0[RF_PATH_MEM_SIZE]; -+ #if (RTL8814B_SUPPORT) -+ u32 rf0_syn[2]; -+ #endif -+ u32 rf1[RF_PATH_MEM_SIZE]; -+}; -+ -+/* @1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ */ -+enum TX_MODE_OFDM { -+ OFDM_OFF = 0, -+ OFDM_CONT_TX = 1, -+ OFDM_SINGLE_CARRIER = 2, -+ OFDM_SINGLE_TONE = 4, -+}; -+/* @1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ */ -+void phydm_mp_set_crystal_cap(void *dm_void, u8 crystal_cap); -+ -+void phydm_mp_set_single_tone(void *dm_void, boolean is_single_tone, u8 path); -+ -+void phydm_mp_set_carrier_supp(void *dm_void, boolean is_carrier_supp, -+ u32 rate_index); -+ -+void phydm_mp_set_single_carrier(void *dm_void, boolean is_single_carrier); -+ -+void phydm_mp_reset_rx_counters_phy(void *dm_void); -+ -+void phydm_mp_get_tx_ok(void *dm_void, u32 rate_index); -+ -+void phydm_mp_get_rx_ok(void *dm_void); -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_noisemonitor.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_noisemonitor.c -new file mode 100644 -index 000000000000..d2e95cfa0233 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_noisemonitor.c -@@ -0,0 +1,467 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/************************************************************* -+ * include files -+ ************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+/************************************************** -+ * This function is for inband noise test utility only -+ * To obtain the inband noise level(dbm), do the following. -+ * 1. disable DIG and Power Saving -+ * 2. Set initial gain = 0x1a -+ * 3. Stop updating idle time pwer report (for driver read) -+ * - 0x80c[25] -+ * -+ *************************************************/ -+ -+void phydm_set_noise_data_sum(struct noise_level *noise_data, u8 max_rf_path) -+{ -+ u8 i = 0; -+ -+ for (i = RF_PATH_A; i < max_rf_path; i++) { -+ if (noise_data->valid_cnt[i]) -+ noise_data->sum[i] /= noise_data->valid_cnt[i]; -+ else -+ noise_data->sum[i] = 0; -+ } -+} -+ -+#if (ODM_IC_11N_SERIES_SUPPORT) -+s16 odm_inband_noise_monitor_n(struct dm_struct *dm, u8 is_pause_dig, u8 igi, -+ u32 max_time) -+{ -+ u32 tmp4b; -+ u8 max_rf_path = 0, i = 0; -+ u8 reg_c50, reg_c58, valid_done = 0; -+ struct noise_level noise_data; -+ u64 start = 0, func_start = 0, func_end = 0; -+ s8 val_s8 = 0; -+ -+ func_start = odm_get_current_time(dm); -+ dm->noise_level.noise_all = 0; -+ -+ if (dm->rf_type == RF_1T2R || dm->rf_type == RF_2T2R) -+ max_rf_path = 2; -+ else -+ max_rf_path = 1; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "odm_DebugControlInbandNoise_Nseries() ==>\n"); -+ -+ odm_memory_set(dm, &noise_data, 0, sizeof(struct noise_level)); -+ /* step 1. Disable DIG && Set initial gain. */ -+ -+ if (is_pause_dig) -+ odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi); -+ -+ /* step 3. Get noise power level */ -+ start = odm_get_current_time(dm); -+ while (1) { -+ /* Stop updating idle time pwer report (for driver read) */ -+ odm_set_bb_reg(dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 1); -+ -+ /* Read Noise Floor Report */ -+ tmp4b = odm_get_bb_reg(dm, R_0x8f8, MASKDWORD); -+ -+ /* update idle time pwer report per 5us */ -+ odm_set_bb_reg(dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 0); -+ -+ ODM_delay_us(5); -+ -+ noise_data.value[RF_PATH_A] = (u8)(tmp4b & 0xff); -+ noise_data.value[RF_PATH_B] = (u8)((tmp4b & 0xff00) >> 8); -+ -+ for (i = RF_PATH_A; i < max_rf_path; i++) { -+ noise_data.sval[i] = (s8)noise_data.value[i]; -+ noise_data.sval[i] /= 2; -+ } -+ -+ for (i = RF_PATH_A; i < max_rf_path; i++) { -+ if (noise_data.valid_cnt[i] >= VALID_CNT) -+ continue; -+ -+ noise_data.valid_cnt[i]++; -+ noise_data.sum[i] += noise_data.sval[i]; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "rf_path:%d Valid sval=%d\n", i, -+ noise_data.sval[i]); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d,\n", -+ noise_data.sum[i]); -+ if (noise_data.valid_cnt[i] == VALID_CNT) -+ valid_done++; -+ } -+ if (valid_done == max_rf_path || -+ (odm_get_progressing_time(dm, start) > max_time)) { -+ phydm_set_noise_data_sum(&noise_data, max_rf_path); -+ break; -+ } -+ } -+ reg_c50 = (u8)odm_get_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKBYTE0); -+ reg_c50 &= ~BIT(7); -+ val_s8 = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]); -+ dm->noise_level.noise[RF_PATH_A] = val_s8; -+ dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_A]; -+ -+ if (max_rf_path == 2) { -+ reg_c58 = (u8)odm_get_bb_reg(dm, R_0xc58, MASKBYTE0); -+ reg_c58 &= ~BIT(7); -+ val_s8 = (s8)(-110 + reg_c58 + noise_data.sum[RF_PATH_B]); -+ dm->noise_level.noise[RF_PATH_B] = val_s8; -+ dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_B]; -+ } -+ dm->noise_level.noise_all /= max_rf_path; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "noise_a = %d, noise_b = %d, noise_all = %d\n", -+ dm->noise_level.noise[RF_PATH_A], -+ dm->noise_level.noise[RF_PATH_B], dm->noise_level.noise_all); -+ -+ /* step 4. Recover the Dig */ -+ if (is_pause_dig) -+ odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi); -+ func_end = odm_get_progressing_time(dm, func_start); -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "end\n"); -+ return dm->noise_level.noise_all; -+} -+#endif -+ -+#if (ODM_IC_11AC_SERIES_SUPPORT) -+s16 phydm_idle_noise_measure_ac(struct dm_struct *dm, u8 pause_dig, -+ u8 igi, u32 max_time) -+{ -+ u32 tmp4b; -+ u8 max_rf_path = 0, i = 0; -+ u8 reg_c50, reg_e50, valid_done = 0; -+ u64 start = 0, func_start = 0, func_end = 0; -+ struct noise_level noise_data; -+ s8 val_s8 = 0; -+ -+ func_start = odm_get_current_time(dm); -+ dm->noise_level.noise_all = 0; -+ -+ if (dm->rf_type == RF_1T2R || dm->rf_type == RF_2T2R) -+ max_rf_path = 2; -+ else -+ max_rf_path = 1; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "%s==>\n", __func__); -+ -+ odm_memory_set(dm, &noise_data, 0, sizeof(struct noise_level)); -+ -+ /*Step 1. Disable DIG && Set initial gain.*/ -+ -+ if (pause_dig) -+ odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi); -+ -+ /*Step 2. Get noise power level*/ -+ start = odm_get_current_time(dm); -+ -+ while (1) { -+ /*Stop updating idle time pwer report (for driver read)*/ -+ odm_set_bb_reg(dm, R_0x9e4, BIT(30), 0x1); -+ -+ /*Read Noise Floor Report*/ -+ tmp4b = odm_get_bb_reg(dm, R_0xff0, MASKDWORD); -+ -+ /*update idle time pwer report per 5us*/ -+ odm_set_bb_reg(dm, R_0x9e4, BIT(30), 0x0); -+ -+ ODM_delay_us(5); -+ -+ noise_data.value[RF_PATH_A] = (u8)(tmp4b & 0xff); -+ noise_data.value[RF_PATH_B] = (u8)((tmp4b & 0xff00) >> 8); -+ -+ for (i = RF_PATH_A; i < max_rf_path; i++) { -+ noise_data.sval[i] = (s8)noise_data.value[i]; -+ noise_data.sval[i] = noise_data.sval[i] >> 1; -+ } -+ -+ for (i = RF_PATH_A; i < max_rf_path; i++) { -+ if (noise_data.valid_cnt[i] >= VALID_CNT) -+ continue; -+ -+ noise_data.valid_cnt[i]++; -+ noise_data.sum[i] += noise_data.sval[i]; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Path:%d Valid sval = %d\n", -+ i, noise_data.sval[i]); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d\n", -+ noise_data.sum[i]); -+ if (noise_data.valid_cnt[i] == VALID_CNT) -+ valid_done++; -+ } -+ -+ if (valid_done == max_rf_path || -+ (odm_get_progressing_time(dm, start) > max_time)) { -+ phydm_set_noise_data_sum(&noise_data, max_rf_path); -+ break; -+ } -+ } -+ reg_c50 = (u8)odm_get_bb_reg(dm, R_0xc50, MASKBYTE0); -+ reg_c50 &= ~BIT(7); -+ val_s8 = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]); -+ dm->noise_level.noise[RF_PATH_A] = val_s8; -+ dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_A]; -+ -+ if (max_rf_path == 2) { -+ reg_e50 = (u8)odm_get_bb_reg(dm, R_0xe50, MASKBYTE0); -+ reg_e50 &= ~BIT(7); -+ val_s8 = (s8)(-110 + reg_e50 + noise_data.sum[RF_PATH_B]); -+ dm->noise_level.noise[RF_PATH_B] = val_s8; -+ dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_B]; -+ } -+ dm->noise_level.noise_all /= max_rf_path; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "noise_a = %d, noise_b = %d, noise_all = %d\n", -+ dm->noise_level.noise[RF_PATH_A], -+ dm->noise_level.noise[RF_PATH_B], dm->noise_level.noise_all); -+ -+ /*Step 3. Recover the Dig*/ -+ if (pause_dig) -+ odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi); -+ func_end = odm_get_progressing_time(dm, func_start); -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "end\n"); -+ return dm->noise_level.noise_all; -+} -+ -+s16 odm_inband_noise_monitor_ac(struct dm_struct *dm, u8 pause_dig, u8 igi, -+ u32 max_time) -+{ -+ s32 rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/ -+ s32 value32, pwdb_A = 0, sval, noise, sum = 0; -+ boolean pd_flag; -+ u8 valid_cnt = 0; -+ u8 invalid_cnt = 0; -+ u64 start = 0, func_start = 0, func_end = 0, proc_time = 0; -+ s32 val_s32 = 0; -+ s16 rpt = 0; -+ u8 val_u8 = 0; -+ -+ if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) { -+ rpt = phydm_idle_noise_measure_ac(dm, pause_dig, igi, max_time); -+ return rpt; -+ } -+ -+ if (!(dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A))) -+ return 0; -+ -+ func_start = odm_get_current_time(dm); -+ dm->noise_level.noise_all = 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "%s ==>\n", __func__); -+ -+ /* step 1. Disable DIG && Set initial gain. */ -+ if (pause_dig) -+ odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi); -+ -+ /* step 3. Get noise power level */ -+ start = odm_get_current_time(dm); -+ -+ /* step 3. Get noise power level */ -+ while (1) { -+ /*Set IGI=0x1C */ -+ odm_write_dig(dm, 0x1C); -+ /*stop CK320&CK88 */ -+ odm_set_bb_reg(dm, R_0x8b4, BIT(6), 1); -+ /*Read path-A */ -+ /*set debug port*/ -+ odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, 0x200); -+ /*read debug port*/ -+ value32 = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD); -+ /*rxi_buf_anta=RegFA0[19:10]*/ -+ rxi_buf_anta = (value32 & 0xFFC00) >> 10; -+ rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/ -+ -+ pd_flag = (boolean)((value32 & BIT(31)) >> 31); -+ -+ /*Not in packet detection period or Tx state */ -+ if (!pd_flag || rxi_buf_anta != 0x200) { -+ /*sign conversion*/ -+ rxi_buf_anta = odm_sign_conversion(rxi_buf_anta, 10); -+ rxq_buf_anta = odm_sign_conversion(rxq_buf_anta, 10); -+ -+ val_s32 = rxi_buf_anta * rxi_buf_anta + -+ rxq_buf_anta * rxq_buf_anta; -+ /*S(10,9)*S(10,9)=S(20,18)*/ -+ pwdb_A = odm_pwdb_conversion(val_s32, 20, 18); -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n", -+ pwdb_A, rxi_buf_anta & 0x3FF, -+ rxq_buf_anta & 0x3FF); -+ } -+ /*Start CK320&CK88*/ -+ odm_set_bb_reg(dm, R_0x8b4, BIT(6), 0); -+ /*@BB Reset*/ -+ val_u8 = odm_read_1byte(dm, 0x02) & (~BIT(0)); -+ odm_write_1byte(dm, 0x02, val_u8); -+ val_u8 = odm_read_1byte(dm, 0x02) | BIT(0); -+ odm_write_1byte(dm, 0x02, val_u8); -+ /*PMAC Reset*/ -+ val_u8 = odm_read_1byte(dm, 0xB03) & (~BIT(0)); -+ odm_write_1byte(dm, 0xB03, val_u8); -+ val_u8 = odm_read_1byte(dm, 0xB03) | BIT(0); -+ odm_write_1byte(dm, 0xB03, val_u8); -+ /*@CCK Reset*/ -+ if (odm_read_1byte(dm, 0x80B) & BIT(4)) { -+ val_u8 = odm_read_1byte(dm, 0x80B) & (~BIT(4)); -+ odm_write_1byte(dm, 0x80B, val_u8); -+ val_u8 = odm_read_1byte(dm, 0x80B) | BIT(4); -+ odm_write_1byte(dm, 0x80B, val_u8); -+ } -+ -+ sval = pwdb_A; -+ -+ if ((sval < 0 && sval >= -27) && valid_cnt < VALID_CNT) { -+ valid_cnt++; -+ sum += sval; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Valid sval = %d\n", sval); -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d,\n", sum); -+ if (valid_cnt >= VALID_CNT || -+ (odm_get_progressing_time(dm, start) > max_time)) { -+ sum /= VALID_CNT; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "After divided, sum = %d\n", sum); -+ break; -+ } -+ } else { -+ /*Invalid sval and return -110 dBm*/ -+ invalid_cnt++; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "Invalid sval\n"); -+ if (invalid_cnt >= VALID_CNT + 5) { -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "Invalid count > TH, Return -110, Break!!\n"); -+ return -110; -+ } -+ } -+ } -+ -+ /*@ADC backoff is 12dB,*/ -+ /*Ptarget=0x1C-110=-82dBm*/ -+ noise = sum + 12 + 0x1C - 110; -+ -+ /*Offset*/ -+ noise = noise - 3; -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "noise = %d\n", noise); -+ dm->noise_level.noise_all = (s16)noise; -+ -+ /* step 4. Recover the Dig*/ -+ if (pause_dig) -+ odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi); -+ -+ func_end = odm_get_progressing_time(dm, func_start); -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, "%s <==\n", __func__); -+ -+ return dm->noise_level.noise_all; -+} -+#endif -+ -+s16 odm_inband_noise_monitor(void *dm_void, u8 pause_dig, u8 igi, -+ u32 max_time) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ s16 val = 0; -+ -+ igi = 0x32; -+ -+ /* since HW ability is about +15~-35, -+ * we fix IGI = -60 for maximum coverage -+ */ -+ #if (ODM_IC_11AC_SERIES_SUPPORT) -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) -+ val = odm_inband_noise_monitor_ac(dm, pause_dig, igi, max_time); -+ #endif -+ -+ #if (ODM_IC_11N_SERIES_SUPPORT) -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) -+ val = odm_inband_noise_monitor_n(dm, pause_dig, igi, max_time); -+ #endif -+ -+ return val; -+} -+ -+void phydm_noisy_detection(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 total_fa_cnt, total_cca_cnt; -+ u32 score = 0, i, score_smooth; -+ -+ total_cca_cnt = dm->false_alm_cnt.cnt_cca_all; -+ total_fa_cnt = dm->false_alm_cnt.cnt_all; -+ -+#if 0 -+ if (total_fa_cnt * 16 >= total_cca_cnt * 14) /* @87.5 */ -+ ; -+ else if (total_fa_cnt * 16 >= total_cca_cnt * 12) /* @75 */ -+ ; -+ else if (total_fa_cnt * 16 >= total_cca_cnt * 10) /* @56.25 */ -+ ; -+ else if (total_fa_cnt * 16 >= total_cca_cnt * 8) /* @50 */ -+ ; -+ else if (total_fa_cnt * 16 >= total_cca_cnt * 7) /* @43.75 */ -+ ; -+ else if (total_fa_cnt * 16 >= total_cca_cnt * 6) /* @37.5 */ -+ ; -+ else if (total_fa_cnt * 16 >= total_cca_cnt * 5) /* @31.25% */ -+ ; -+ else if (total_fa_cnt * 16 >= total_cca_cnt * 4) /* @25% */ -+ ; -+ else if (total_fa_cnt * 16 >= total_cca_cnt * 3) /* @18.75% */ -+ ; -+ else if (total_fa_cnt * 16 >= total_cca_cnt * 2) /* @12.5% */ -+ ; -+ else if (total_fa_cnt * 16 >= total_cca_cnt * 1) /* @6.25% */ -+ ; -+#endif -+ for (i = 0; i <= 16; i++) { -+ if (total_fa_cnt * 16 >= total_cca_cnt * (16 - i)) { -+ score = 16 - i; -+ break; -+ } -+ } -+ -+ /* noisy_decision_smooth = noisy_decision_smooth>>1 + (score<<3)>>1; */ -+ dm->noisy_decision_smooth = (dm->noisy_decision_smooth >> 1) + -+ (score << 2); -+ -+ /* Round the noisy_decision_smooth: +"3" comes from (2^3)/2-1 */ -+ if (total_cca_cnt >= 300) -+ score_smooth = (dm->noisy_decision_smooth + 3) >> 3; -+ else -+ score_smooth = 0; -+ -+ dm->noisy_decision = (score_smooth >= 3) ? 1 : 0; -+ -+ PHYDM_DBG(dm, DBG_ENV_MNTR, -+ "[NoisyDetection] CCA_cnt=%d,FA_cnt=%d, noisy_dec_smooth=%d, score=%d, score_smooth=%d, noisy_dec=%d\n", -+ total_cca_cnt, total_fa_cnt, dm->noisy_decision_smooth, score, -+ score_smooth, dm->noisy_decision); -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_noisemonitor.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_noisemonitor.h -new file mode 100644 -index 000000000000..507285adb5bb ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_noisemonitor.h -@@ -0,0 +1,48 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#ifndef __ODMNOISEMONITOR_H__ -+#define __ODMNOISEMONITOR_H__ -+ -+#define VALID_CNT 5 -+ -+struct noise_level { -+ u8 value[PHYDM_MAX_RF_PATH]; -+ s8 sval[PHYDM_MAX_RF_PATH]; -+ s32 sum[PHYDM_MAX_RF_PATH]; -+ u8 valid[PHYDM_MAX_RF_PATH]; -+ u8 valid_cnt[PHYDM_MAX_RF_PATH]; -+}; -+ -+struct odm_noise_monitor { -+ s8 noise[PHYDM_MAX_RF_PATH]; -+ s16 noise_all; -+}; -+ -+s16 odm_inband_noise_monitor(void *dm_void, u8 is_pause_dig, u8 igi_value, -+ u32 max_time); -+ -+void phydm_noisy_detection(void *dm_void); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_pathdiv.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_pathdiv.c -new file mode 100644 -index 000000000000..a6b347cf75b2 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_pathdiv.c -@@ -0,0 +1,1113 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/************************************************************* -+ * include files -+ ************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef CONFIG_PATH_DIVERSITY -+#if RTL8814A_SUPPORT -+void phydm_dtp_fix_tx_path( -+ void *dm_void, -+ u8 path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ u8 i, num_enable_path = 0; -+ -+ if (path == p_div->pre_tx_path) -+ return; -+ else -+ p_div->pre_tx_path = path; -+ -+ odm_set_bb_reg(dm, R_0x93c, BIT(18) | BIT(19), 3); -+ -+ for (i = 0; i < 4; i++) { -+ if (path & BIT(i)) -+ num_enable_path++; -+ } -+ PHYDM_DBG(dm, DBG_PATH_DIV, " number of turn-on path : (( %d ))\n", -+ num_enable_path); -+ -+ if (num_enable_path == 1) { -+ odm_set_bb_reg(dm, R_0x93c, 0xf00000, path); -+ -+ if (path == BB_PATH_A) { /* @1-1 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( A ))\n"); -+ odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); -+ } else if (path == BB_PATH_B) { /* @1-2 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( B ))\n"); -+ odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0); -+ } else if (path == BB_PATH_C) { /* @1-3 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( C ))\n"); -+ odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 0); -+ -+ } else if (path == BB_PATH_D) { /* @1-4 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path (( D ))\n"); -+ odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 0); -+ } -+ -+ } else if (num_enable_path == 2) { -+ odm_set_bb_reg(dm, R_0x93c, 0xf00000, path); -+ odm_set_bb_reg(dm, R_0x940, 0xf0, path); -+ -+ if (path == (BB_PATH_AB)) { /* @2-1 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ " Turn on path (( A B ))\n"); -+ /* set for 1ss */ -+ odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); -+ odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 1); -+ /* set for 2ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 1); -+ } else if (path == BB_PATH_AC) { /* @2-2 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ " Turn on path (( A C ))\n"); -+ /* set for 1ss */ -+ odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); -+ odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1); -+ /* set for 2ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1); -+ } else if (path == BB_PATH_AD) { /* @2-3 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ " Turn on path (( A D ))\n"); -+ /* set for 1ss */ -+ odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); -+ odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 1); -+ /* set for 2ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 1); -+ } else if (path == BB_PATH_BC) { /* @2-4 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ " Turn on path (( B C ))\n"); -+ /* set for 1ss */ -+ odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0); -+ odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1); -+ /* set for 2ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1); -+ } else if (path == BB_PATH_BD) { /* @2-5 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ " Turn on path (( B D ))\n"); -+ /* set for 1ss */ -+ odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0); -+ odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 1); -+ /* set for 2ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 1); -+ } else if (path == BB_PATH_CD) { /* @2-6 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ " Turn on path (( C D ))\n"); -+ /* set for 1ss */ -+ odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 0); -+ odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 1); -+ /* set for 2ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 1); -+ } -+ -+ } else if (num_enable_path == 3) { -+ odm_set_bb_reg(dm, R_0x93c, 0xf00000, path); -+ odm_set_bb_reg(dm, R_0x940, 0xf0, path); -+ odm_set_bb_reg(dm, R_0x940, 0xf0000, path); -+ -+ if (path == BB_PATH_ABC) { /* @3-1 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ " Turn on path (( A B C))\n"); -+ /* set for 1ss */ -+ odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); -+ odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 1); -+ odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 2); -+ /* set for 2ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 1); -+ odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 2); -+ /* set for 3ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(21) | BIT(20), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(23) | BIT(22), 1); -+ odm_set_bb_reg(dm, R_0x940, BIT(25) | BIT(24), 2); -+ } else if (path == BB_PATH_ABD) { /* @3-2 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ " Turn on path (( A B D ))\n"); -+ /* set for 1ss */ -+ odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); -+ odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 1); -+ odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 2); -+ /* set for 2ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 1); -+ odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 2); -+ /* set for 3ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(21) | BIT(20), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(23) | BIT(22), 1); -+ odm_set_bb_reg(dm, R_0x940, BIT(27) | BIT(26), 2); -+ -+ } else if (path == BB_PATH_ACD) { /* @3-3 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ " Turn on path (( A C D ))\n"); -+ /* set for 1ss */ -+ odm_set_bb_reg(dm, R_0x93c, BIT(25) | BIT(24), 0); -+ odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1); -+ odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 2); -+ /* set for 2ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(9) | BIT(8), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1); -+ odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 2); -+ /* set for 3ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(21) | BIT(20), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(25) | BIT(24), 1); -+ odm_set_bb_reg(dm, R_0x940, BIT(27) | BIT(26), 2); -+ } else if (path == BB_PATH_BCD) { /* @3-4 */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ " Turn on path (( B C D))\n"); -+ /* set for 1ss */ -+ odm_set_bb_reg(dm, R_0x93c, BIT(27) | BIT(26), 0); -+ odm_set_bb_reg(dm, R_0x93c, BIT(29) | BIT(28), 1); -+ odm_set_bb_reg(dm, R_0x93c, BIT(31) | BIT(30), 2); -+ /* set for 2ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(11) | BIT(10), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(13) | BIT(12), 1); -+ odm_set_bb_reg(dm, R_0x940, BIT(15) | BIT(14), 2); -+ /* set for 3ss */ -+ odm_set_bb_reg(dm, R_0x940, BIT(23) | BIT(22), 0); -+ odm_set_bb_reg(dm, R_0x940, BIT(25) | BIT(24), 1); -+ odm_set_bb_reg(dm, R_0x940, BIT(27) | BIT(26), 2); -+ } -+ } else if (num_enable_path == 4) -+ PHYDM_DBG(dm, DBG_PATH_DIV, " Turn on path ((A B C D))\n"); -+} -+ -+void phydm_find_default_path( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ u32 rssi_a = 0, rssi_b = 0, rssi_c = 0, rssi_d = 0, rssi_bcd = 0; -+ u32 rssi_total_a = 0, rssi_total_b = 0; -+ u32 rssi_total_c = 0, rssi_total_d = 0; -+ -+ /* @2 Default path Selection By RSSI */ -+ -+ rssi_a = (p_div->path_a_cnt_all > 0) ? -+ (p_div->path_a_sum_all / p_div->path_a_cnt_all) : 0; -+ rssi_b = (p_div->path_b_cnt_all > 0) ? -+ (p_div->path_b_sum_all / p_div->path_b_cnt_all) : 0; -+ rssi_c = (p_div->path_c_cnt_all > 0) ? -+ (p_div->path_c_sum_all / p_div->path_c_cnt_all) : 0; -+ rssi_d = (p_div->path_d_cnt_all > 0) ? -+ (p_div->path_d_sum_all / p_div->path_d_cnt_all) : 0; -+ -+ p_div->path_a_sum_all = 0; -+ p_div->path_a_cnt_all = 0; -+ p_div->path_b_sum_all = 0; -+ p_div->path_b_cnt_all = 0; -+ p_div->path_c_sum_all = 0; -+ p_div->path_c_cnt_all = 0; -+ p_div->path_d_sum_all = 0; -+ p_div->path_d_cnt_all = 0; -+ -+ if (p_div->use_path_a_as_default_ant == 1) { -+ rssi_bcd = (rssi_b + rssi_c + rssi_d) / 3; -+ -+ if ((rssi_a + ANT_DECT_RSSI_TH) > rssi_bcd) { -+ p_div->is_path_a_exist = true; -+ p_div->default_path = PATH_A; -+ } else { -+ p_div->is_path_a_exist = false; -+ } -+ } else { -+ if (rssi_a >= rssi_b && -+ rssi_a >= rssi_c && -+ rssi_a >= rssi_d) -+ p_div->default_path = PATH_A; -+ else if ((rssi_b >= rssi_c) && (rssi_b >= rssi_d)) -+ p_div->default_path = PATH_B; -+ else if (rssi_c >= rssi_d) -+ p_div->default_path = PATH_C; -+ else -+ p_div->default_path = PATH_D; -+ } -+} -+ -+void phydm_candidate_dtp_update( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ -+ p_div->num_candidate = 3; -+ -+ if (p_div->use_path_a_as_default_ant == 1) { -+ if (p_div->num_tx_path == 3) { -+ if (p_div->is_path_a_exist) { -+ p_div->ant_candidate_1 = BB_PATH_ABC; -+ p_div->ant_candidate_2 = BB_PATH_ABD; -+ p_div->ant_candidate_3 = BB_PATH_ACD; -+ } else { /* use path BCD */ -+ p_div->num_candidate = 1; -+ phydm_dtp_fix_tx_path(dm, BB_PATH_BCD); -+ return; -+ } -+ } else if (p_div->num_tx_path == 2) { -+ if (p_div->is_path_a_exist) { -+ p_div->ant_candidate_1 = BB_PATH_AB; -+ p_div->ant_candidate_2 = BB_PATH_AC; -+ p_div->ant_candidate_3 = BB_PATH_AD; -+ } else { -+ p_div->ant_candidate_1 = BB_PATH_BC; -+ p_div->ant_candidate_2 = BB_PATH_BD; -+ p_div->ant_candidate_3 = BB_PATH_CD; -+ } -+ } -+ } else { -+ /* @2 3 TX mode */ -+ if (p_div->num_tx_path == 3) { /* @choose 3 ant form 4 */ -+ if (p_div->default_path == PATH_A) { -+ /* @choose 2 ant form 3 */ -+ p_div->ant_candidate_1 = BB_PATH_ABC; -+ p_div->ant_candidate_2 = BB_PATH_ABD; -+ p_div->ant_candidate_3 = BB_PATH_ACD; -+ } else if (p_div->default_path == PATH_B) { -+ p_div->ant_candidate_1 = BB_PATH_ABC; -+ p_div->ant_candidate_2 = BB_PATH_ABD; -+ p_div->ant_candidate_3 = BB_PATH_BCD; -+ } else if (p_div->default_path == PATH_C) { -+ p_div->ant_candidate_1 = BB_PATH_ABC; -+ p_div->ant_candidate_2 = BB_PATH_ACD; -+ p_div->ant_candidate_3 = BB_PATH_BCD; -+ } else if (p_div->default_path == PATH_D) { -+ p_div->ant_candidate_1 = BB_PATH_ABD; -+ p_div->ant_candidate_2 = BB_PATH_ACD; -+ p_div->ant_candidate_3 = BB_PATH_BCD; -+ } -+ } -+ -+ /* @2 2 TX mode */ -+ else if (p_div->num_tx_path == 2) { /* @choose 2 ant form 4 */ -+ if (p_div->default_path == PATH_A) { -+ /* @choose 2 ant form 3 */ -+ p_div->ant_candidate_1 = BB_PATH_AB; -+ p_div->ant_candidate_2 = BB_PATH_AC; -+ p_div->ant_candidate_3 = BB_PATH_AD; -+ } else if (p_div->default_path == PATH_B) { -+ p_div->ant_candidate_1 = BB_PATH_AB; -+ p_div->ant_candidate_2 = BB_PATH_BC; -+ p_div->ant_candidate_3 = BB_PATH_BD; -+ } else if (p_div->default_path == PATH_C) { -+ p_div->ant_candidate_1 = BB_PATH_AC; -+ p_div->ant_candidate_2 = BB_PATH_BC; -+ p_div->ant_candidate_3 = BB_PATH_CD; -+ } else if (p_div->default_path == PATH_D) { -+ p_div->ant_candidate_1 = BB_PATH_AD; -+ p_div->ant_candidate_2 = BB_PATH_BD; -+ p_div->ant_candidate_3 = BB_PATH_CD; -+ } -+ } -+ } -+} -+ -+void phydm_dynamic_tx_path( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ -+ struct sta_info *entry; -+ u32 i; -+ u8 num_client = 0; -+ u8 h2c_parameter[6] = {0}; -+ -+ if (!dm->is_linked) { /* @is_linked==False */ -+ PHYDM_DBG(dm, DBG_PATH_DIV, "DTP_8814 [No Link!!!]\n"); -+ -+ if (p_div->is_become_linked) { -+ PHYDM_DBG(dm, DBG_PATH_DIV, "[Be disconnected]---->\n"); -+ p_div->is_become_linked = dm->is_linked; -+ } -+ return; -+ } else { -+ if (!p_div->is_become_linked) { -+ PHYDM_DBG(dm, DBG_PATH_DIV, " [Be Linked !!!]----->\n"); -+ p_div->is_become_linked = dm->is_linked; -+ } -+ } -+ -+ /* @2 [period CTRL] */ -+ if (p_div->dtp_period >= 2) { -+ p_div->dtp_period = 0; -+ } else { -+ p_div->dtp_period++; -+ return; -+ } -+ -+ /* @2 [Fix path] */ -+ if (dm->path_select != PHYDM_AUTO_PATH) -+ return; -+ -+/* @2 [Check Bfer] */ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ { -+ enum beamforming_cap beamform_cap = (dm->beamforming_info.beamform_cap); -+ -+ if (beamform_cap & BEAMFORMER_CAP) { /* @BFmer On && Div On->Div Off */ -+ if (p_div->fix_path_bfer == 0) { -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ "[ PathDiv : OFF ] BFmer ==1\n"); -+ p_div->fix_path_bfer = 1; -+ } -+ return; -+ } else { /* @BFmer Off && Div Off->Div On */ -+ if (p_div->fix_path_bfer == 1) { -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ "[ PathDiv : ON ] BFmer ==0\n"); -+ p_div->fix_path_bfer = 0; -+ } -+ } -+ } -+#endif -+#endif -+ -+ if (p_div->use_path_a_as_default_ant == 1) { -+ phydm_find_default_path(dm); -+ phydm_candidate_dtp_update(dm); -+ } else { -+ if (p_div->phydm_dtp_state == PHYDM_DTP_INIT) { -+ phydm_find_default_path(dm); -+ phydm_candidate_dtp_update(dm); -+ p_div->phydm_dtp_state = PHYDM_DTP_RUNNING_1; -+ } -+ -+ else if (p_div->phydm_dtp_state == PHYDM_DTP_RUNNING_1) { -+ p_div->dtp_check_patha_counter++; -+ -+ if (p_div->dtp_check_patha_counter >= -+ NUM_RESET_DTP_PERIOD) { -+ p_div->dtp_check_patha_counter = 0; -+ p_div->phydm_dtp_state = PHYDM_DTP_INIT; -+ } -+#if 0 -+ /* @2 Search space update */ -+ else { -+ /* @1. find the worst candidate */ -+ -+ -+ /* @2. repalce the worst candidate */ -+ } -+#endif -+ } -+ } -+ -+ /* @2 Dynamic path Selection H2C */ -+ -+ if (p_div->num_candidate == 1) { -+ return; -+ } else { -+ h2c_parameter[0] = p_div->num_candidate; -+ h2c_parameter[1] = p_div->num_tx_path; -+ h2c_parameter[2] = p_div->ant_candidate_1; -+ h2c_parameter[3] = p_div->ant_candidate_2; -+ h2c_parameter[4] = p_div->ant_candidate_3; -+ -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_DYNAMIC_TX_PATH, 6, h2c_parameter); -+ } -+} -+ -+void phydm_dynamic_tx_path_init( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ void *adapter = dm->adapter; -+ u8 search_space_2[NUM_CHOOSE2_FROM4] = {BB_PATH_AB, BB_PATH_AC, BB_PATH_AD, BB_PATH_BC, BB_PATH_BD, BB_PATH_CD}; -+ u8 search_space_3[NUM_CHOOSE3_FROM4] = {BB_PATH_BCD, BB_PATH_ACD, BB_PATH_ABD, BB_PATH_ABC}; -+ -+#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN) && USB_SWITCH_SUPPORT) -+ p_div->is_u3_mode = (*dm->hub_usb_mode == 2) ? 1 : 0; -+ PHYDM_DBG(dm, DBG_PATH_DIV, "[WIN USB] is_u3_mode = (( %d ))\n", -+ p_div->is_u3_mode); -+#else -+ p_div->is_u3_mode = 1; -+#endif -+ PHYDM_DBG(dm, DBG_PATH_DIV, "Dynamic TX path Init 8814\n"); -+ -+ memcpy(&p_div->search_space_2[0], &search_space_2[0], -+ NUM_CHOOSE2_FROM4); -+ memcpy(&p_div->search_space_3[0], &search_space_3[0], -+ NUM_CHOOSE3_FROM4); -+ -+ p_div->use_path_a_as_default_ant = 1; -+ p_div->phydm_dtp_state = PHYDM_DTP_INIT; -+ dm->path_select = PHYDM_AUTO_PATH; -+ p_div->phydm_path_div_type = PHYDM_4R_PATH_DIV; -+ -+ if (p_div->is_u3_mode) { -+ p_div->num_tx_path = 3; -+ phydm_dtp_fix_tx_path(dm, BB_PATH_BCD); /* @3TX Set Init TX path*/ -+ -+ } else { -+ p_div->num_tx_path = 2; -+ phydm_dtp_fix_tx_path(dm, BB_PATH_BC); /* @2TX // Set Init TX path*/ -+ } -+} -+ -+void phydm_process_rssi_for_path_div_8814a(void *dm_void, void *phy_info_void, -+ void *pkt_info_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_phyinfo_struct *phy_info = NULL; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ -+ phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ -+ if (!(pktinfo->is_packet_to_self || pktinfo->is_packet_match_bssid)) -+ return; -+ -+ if (pktinfo->data_rate <= ODM_RATE11M) -+ return; -+ -+ if (p_div->phydm_path_div_type == PHYDM_4R_PATH_DIV) { -+ p_div->path_a_sum_all += phy_info->rx_mimo_signal_strength[0]; -+ p_div->path_a_cnt_all++; -+ -+ p_div->path_b_sum_all += phy_info->rx_mimo_signal_strength[1]; -+ p_div->path_b_cnt_all++; -+ -+ p_div->path_c_sum_all += phy_info->rx_mimo_signal_strength[2]; -+ p_div->path_c_cnt_all++; -+ -+ p_div->path_d_sum_all += phy_info->rx_mimo_signal_strength[3]; -+ p_div->path_d_cnt_all++; -+ } -+} -+ -+void phydm_pathdiv_debug_8814a(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 dm_value[10] = {0}; -+ u8 i, input_idx = 0; -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); -+ input_idx++; -+ } -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ dm->path_select = (u8)(dm_value[0] & 0xf); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Path_select = (( 0x%x ))\n", dm->path_select); -+ -+ /* @2 [Fix path] */ -+ if (dm->path_select != PHYDM_AUTO_PATH) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Turn on path [%s%s%s%s]\n", -+ ((dm->path_select) & 0x1) ? "A" : "", -+ ((dm->path_select) & 0x2) ? "B" : "", -+ ((dm->path_select) & 0x4) ? "C" : "", -+ ((dm->path_select) & 0x8) ? "D" : ""); -+ -+ phydm_dtp_fix_tx_path(dm, dm->path_select); -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, "%s\n", -+ "Auto path"); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#endif /* @#if RTL8814A_SUPPORT */ -+ -+#if RTL8812A_SUPPORT -+void phydm_update_tx_path_8812a(void *dm_void, enum bb_path path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ -+ if (p_div->default_tx_path != path) { -+ PHYDM_DBG(dm, DBG_PATH_DIV, "Need to Update Tx path\n"); -+ -+ if (path == BB_PATH_A) { -+ /*Tx by Reg*/ -+ odm_set_bb_reg(dm, R_0x80c, 0xFFF0, 0x111); -+ /*Resp Tx by Txinfo*/ -+ odm_set_bb_reg(dm, R_0x6d8, 0xc0, 1); -+ } else { -+ /*Tx by Reg*/ -+ odm_set_bb_reg(dm, R_0x80c, 0xFFF0, 0x222); -+ /*Resp Tx by Txinfo*/ -+ odm_set_bb_reg(dm, R_0x6d8, 0xc0, 2); -+ } -+ } -+ p_div->default_tx_path = path; -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, "path=%s\n", -+ (path == BB_PATH_A) ? "A" : "B"); -+} -+ -+void phydm_path_diversity_init_8812a(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ u32 i; -+ -+ odm_set_bb_reg(dm, R_0x80c, BIT(29), 1); /* Tx path from Reg */ -+ odm_set_bb_reg(dm, R_0x80c, 0xFFF0, 0x111); /* Tx by Reg */ -+ odm_set_bb_reg(dm, R_0x6d8, BIT(7) | BIT6, 1); /* Resp Tx by Txinfo */ -+ phydm_set_tx_path_by_bb_reg(dm, RF_PATH_A); -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) -+ p_div->path_sel[i] = 1; /* TxInfo default at path-A */ -+} -+#endif -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+void phydm_set_resp_tx_path_by_fw_jgr3(void *dm_void, u8 macid, -+ enum bb_path path, boolean enable) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ u8 h2c_para[7] = {0}; -+ u8 path_map[4] = {0}; /* tx logic map*/ -+ u8 num_enable_path = 0; -+ u8 n_tx_path_ctrl_map = 0; -+ u8 i = 0, n_sts = 0; -+ -+ /*Response TX is controlled in FW ctrl info*/ -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] =====>\n", __func__); -+ -+ if (enable) { -+ n_tx_path_ctrl_map = path; -+ -+ for (i = 0; i < 4; i++) { -+ path_map[i] = 0; -+ if (path & BIT(i)) -+ num_enable_path++; -+ } -+ -+ for (i = 0; i < 4; i++) { -+ if (path & BIT(i)) { -+ path_map[i] = n_sts; -+ n_sts++; -+ -+ if (n_sts == num_enable_path) -+ break; -+ } -+ } -+ } -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, "ctrl_map=0x%x Map[D:A]={%d, %d, %d, %d}\n", -+ n_tx_path_ctrl_map, -+ path_map[3], path_map[2], path_map[1], path_map[0]); -+ -+ h2c_para[0] = macid; -+ h2c_para[1] = n_tx_path_ctrl_map; -+ h2c_para[2] = (path_map[3] << 6) | (path_map[2] << 4) | -+ (path_map[1] << 2) | path_map[0]; -+ -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_DYNAMIC_TX_PATH, 7, h2c_para); -+} -+ -+void phydm_get_tx_path_txdesc_jgr3(void *dm_void, u8 macid, -+ struct path_txdesc_ctrl *desc) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ u8 ant_map_a = 0, ant_map_b = 0; -+ u8 ntx_map = 0; -+ -+ if (p_div->path_sel[macid] == BB_PATH_A) { -+ desc->ant_map_a = 0; /*offest24[23:22]*/ -+ desc->ant_map_b = 0; /*offest24[25:24]*/ -+ desc->ntx_map = BB_PATH_A; /*offest28[23:20]*/ -+ } else if (p_div->path_sel[macid] == BB_PATH_B) { -+ desc->ant_map_a = 0; /*offest24[23:22]*/ -+ desc->ant_map_b = 0; /*offest24[25:24]*/ -+ desc->ntx_map = BB_PATH_B; /*offest28[23:20]*/ -+ } else { -+ desc->ant_map_a = 0; /*offest24[23:22]*/ -+ desc->ant_map_b = 1; /*offest24[25:24]*/ -+ desc->ntx_map = BB_PATH_AB; /*offest28[23:20]*/ -+ } -+} -+#endif -+ -+void phydm_tx_path_by_mac_or_reg(void *dm_void, enum phydm_path_ctrl ctrl) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] ctrl=%s\n", -+ __func__, (ctrl == TX_PATH_BY_REG) ? "REG" : "DESC"); -+ -+ if (ctrl == p_div->tx_path_ctrl) -+ return; -+ -+ p_div->tx_path_ctrl = ctrl; -+ -+ switch (dm->support_ic_type) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ case ODM_RTL8822B: -+ case ODM_RTL8822C: -+ case ODM_RTL8812F: -+ case ODM_RTL8197G: -+ if (ctrl == TX_PATH_BY_REG) { -+ odm_set_bb_reg(dm, R_0x1e24, BIT(16), 0); /*OFDM*/ -+ odm_set_bb_reg(dm, R_0x1a84, 0xe0, 0); /*CCK*/ -+ } else { -+ odm_set_bb_reg(dm, R_0x1e24, BIT(16), 1); /*OFDM*/ -+ odm_set_bb_reg(dm, R_0x1a84, 0xe0, 7); /*CCK*/ -+ } -+ -+ break; -+ #endif -+ #if 0 /*(RTL8822B_SUPPORT)*/ /*@ HW Bug*/ -+ case ODM_RTL8822B: -+ if (ctrl == TX_PATH_BY_REG) { -+ odm_set_bb_reg(dm, R_0x93c, BIT(18), 0); -+ odm_set_bb_reg(dm, R_0xa84, 0xe0, 0); /*CCK*/ -+ } else { -+ odm_set_bb_reg(dm, R_0x93c, BIT(18), 1); -+ odm_set_bb_reg(dm, R_0xa84, 0xe0, 7); /*CCK*/ -+ } -+ -+ break; -+ #endif -+ default: -+ break; -+ } -+} -+ -+void phydm_fix_1ss_tx_path_by_bb_reg(void *dm_void, -+ enum bb_path tx_path_sel_1ss, -+ enum bb_path tx_path_sel_cck) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ -+ if (tx_path_sel_1ss != BB_PATH_AUTO) { -+ p_div->ofdm_fix_path_en = true; -+ p_div->ofdm_fix_path_sel = tx_path_sel_1ss; -+ } else { -+ p_div->ofdm_fix_path_en = false; -+ p_div->ofdm_fix_path_sel = dm->tx_1ss_status; -+ } -+ -+ if (tx_path_sel_cck != BB_PATH_AUTO) { -+ p_div->cck_fix_path_en = true; -+ p_div->cck_fix_path_sel = tx_path_sel_cck; -+ } else { -+ p_div->cck_fix_path_en = false; -+ p_div->cck_fix_path_sel = dm->tx_1ss_status; -+ } -+ -+ p_div->force_update = true; -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ "{OFDM_fix_en=%d, path=%d} {CCK_fix_en=%d, path=%d}\n", -+ p_div->ofdm_fix_path_en, p_div->ofdm_fix_path_sel, -+ p_div->cck_fix_path_en, p_div->cck_fix_path_sel); -+} -+ -+void phydm_set_tx_path_by_bb_reg(void *dm_void, enum bb_path tx_path_sel_1ss) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ enum bb_path tx_path_sel_cck = tx_path_sel_1ss; -+ -+ if (!p_div->force_update) { -+ if (tx_path_sel_1ss == p_div->default_tx_path) { -+ PHYDM_DBG(dm, DBG_PATH_DIV, "Stay in TX path=%s\n", -+ (tx_path_sel_1ss == BB_PATH_A) ? "A" : "B"); -+ return; -+ } -+ } -+ p_div->force_update = false; -+ -+ p_div->default_tx_path = tx_path_sel_1ss; -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, "Switch TX path=%s\n", -+ (tx_path_sel_1ss == BB_PATH_A) ? "A" : "B"); -+ -+ /*Adv-ctrl mode*/ -+ if (p_div->cck_fix_path_en) { -+ PHYDM_DBG(dm, DBG_PATH_DIV, "Fix CCK TX path=%d\n", -+ p_div->cck_fix_path_sel); -+ tx_path_sel_cck = p_div->cck_fix_path_sel; -+ } -+ -+ if (p_div->ofdm_fix_path_en) { -+ PHYDM_DBG(dm, DBG_PATH_DIV, "Fix OFDM TX path=%d\n", -+ p_div->ofdm_fix_path_sel); -+ tx_path_sel_1ss = p_div->ofdm_fix_path_sel; -+ } -+ -+ switch (dm->support_ic_type) { -+ #if RTL8822C_SUPPORT -+ case ODM_RTL8822C: -+ phydm_config_tx_path_8822c(dm, dm->tx_2ss_status, -+ tx_path_sel_1ss, tx_path_sel_cck); -+ break; -+ #endif -+ -+ #if RTL8822B_SUPPORT -+ case ODM_RTL8822B: -+ if (dm->tx_ant_status != BB_PATH_AB) -+ return; -+ -+ phydm_config_tx_path_8822b(dm, BB_PATH_AB, -+ tx_path_sel_1ss, tx_path_sel_cck); -+ break; -+ #endif -+ -+ #if RTL8192F_SUPPORT -+ case ODM_RTL8192F: -+ if (dm->tx_ant_status != BB_PATH_AB) -+ return; -+ -+ phydm_config_tx_path_8192f(dm, BB_PATH_AB, -+ tx_path_sel_1ss, tx_path_sel_cck); -+ break; -+ #endif -+ -+ #if RTL8812A_SUPPORT -+ case ODM_RTL8812: -+ phydm_update_tx_path_8812a(dm, tx_path_sel_1ss); -+ break; -+ #endif -+ default: -+ break; -+ } -+} -+ -+void phydm_tx_path_diversity_2ss(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ struct cmn_sta_info *sta; -+ enum bb_path default_tx_path = BB_PATH_A, path = BB_PATH_A; -+ u32 rssi_a = 0, rssi_b = 0; -+ u32 local_max_rssi, glb_min_rssi = 0xff; -+ u8 i = 0; -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] =======>\n", __func__); -+ -+ if (!dm->is_linked) { -+ if (dm->first_disconnect) -+ phydm_tx_path_by_mac_or_reg(dm, TX_PATH_BY_REG); -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, "No Link\n"); -+ return; -+ } -+ -+ #if 0/*def PHYDM_IC_JGR3_SERIES_SUPPORT*/ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ if (dm->is_one_entry_only || p_div->cck_fix_path_en || -+ p_div->ofdm_fix_path_en) -+ phydm_tx_path_by_mac_or_reg(dm, TX_PATH_BY_REG); -+ else -+ phydm_tx_path_by_mac_or_reg(dm, TX_PATH_BY_DESC); -+ } -+ #endif -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ sta = dm->phydm_sta_info[i]; -+ if (!is_sta_active(sta)) -+ continue; -+ -+ /* 2 Caculate RSSI per path */ -+ rssi_a = PHYDM_DIV(p_div->path_a_sum[i], p_div->path_a_cnt[i]); -+ rssi_b = PHYDM_DIV(p_div->path_b_sum[i], p_div->path_b_cnt[i]); -+ -+ if (rssi_a == rssi_b) -+ path = p_div->default_tx_path; -+ else -+ path = (rssi_a > rssi_b) ? BB_PATH_A : BB_PATH_B; -+ -+ local_max_rssi = (rssi_a > rssi_b) ? rssi_a : rssi_b; -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ "[%d]PathA sum=%d, cnt=%d, avg_rssi=%d\n", -+ i, p_div->path_a_sum[i], -+ p_div->path_a_cnt[i], rssi_a); -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ "[%d]PathB sum=%d, cnt=%d, avg_rssi=%d\n", -+ i, p_div->path_b_sum[i], -+ p_div->path_b_cnt[i], rssi_b); -+ -+ /*Select default Tx path */ -+ if (local_max_rssi < glb_min_rssi) { -+ glb_min_rssi = local_max_rssi; -+ default_tx_path = path; -+ } -+ -+ if (p_div->path_sel[i] != path) { -+ p_div->path_sel[i] = path; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_set_resp_tx_path_by_fw_jgr3(dm, i, -+ path, true); -+ #endif -+ } -+ -+ p_div->path_a_cnt[i] = 0; -+ p_div->path_a_sum[i] = 0; -+ p_div->path_b_cnt[i] = 0; -+ p_div->path_b_sum[i] = 0; -+ } -+ -+ /* 2 Update default Tx path */ -+ phydm_set_tx_path_by_bb_reg(dm, default_tx_path); -+ PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] end\n\n", __func__); -+} -+ -+void phydm_tx_path_diversity(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ -+ p_div->path_div_in_progress = false; -+ -+ if (!(dm->support_ability & ODM_BB_PATH_DIV)) -+ return; -+ -+ if (p_div->stop_path_div) { -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ "stop_path_div=1, tx_1ss_status=%d\n", -+ dm->tx_1ss_status); -+ return; -+ } -+ -+ switch (dm->support_ic_type) { -+ #ifdef PHYDM_CONFIG_PATH_DIV_V2 -+ case ODM_RTL8822B: -+ case ODM_RTL8822C: -+ case ODM_RTL8192F: -+ case ODM_RTL8812F: -+ case ODM_RTL8197G: -+ if (dm->rx_ant_status != BB_PATH_AB) { -+ PHYDM_DBG(dm, DBG_PATH_DIV, -+ "[Return] tx_Path_en=%d, rx_Path_en=%d\n", -+ dm->tx_ant_status, dm->rx_ant_status); -+ return; -+ } -+ -+ p_div->path_div_in_progress = true; -+ phydm_tx_path_diversity_2ss(dm); -+ break; -+ #endif -+ -+ #if (RTL8812A_SUPPORT) -+ case ODM_RTL8812: -+ phydm_tx_path_diversity_2ss(dm); -+ break; -+ #endif -+ -+ #if RTL8814A_SUPPORT -+ case ODM_RTL8814A: -+ phydm_dynamic_tx_path(dm); -+ break; -+ #endif -+ } -+} -+ -+void phydm_tx_path_diversity_init_v2(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ u32 i = 0; -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, "[%s] ====>\n", __func__); -+ -+ /*BB_PATH_AB is a invalid value used for init state*/ -+ p_div->default_tx_path = BB_PATH_A; -+ p_div->tx_path_ctrl = TX_PATH_CTRL_INIT; -+ p_div->path_div_in_progress = false; -+ -+ p_div->cck_fix_path_en = false; -+ p_div->ofdm_fix_path_en = false; -+ p_div->force_update = false; -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) -+ p_div->path_sel[i] = BB_PATH_A; /* TxInfo default at path-A */ -+ -+ phydm_tx_path_by_mac_or_reg(dm, TX_PATH_BY_REG); -+} -+ -+void phydm_tx_path_diversity_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ability & ODM_BB_PATH_DIV)) -+ return; -+ -+ switch (dm->support_ic_type) { -+ #ifdef PHYDM_CONFIG_PATH_DIV_V2 -+ case ODM_RTL8822C: -+ case ODM_RTL8822B: -+ case ODM_RTL8192F: -+ case ODM_RTL8812F: -+ case ODM_RTL8197G: -+ phydm_tx_path_diversity_init_v2(dm); /*@ After 8822B*/ -+ break; -+ #endif -+ -+ #if RTL8812A_SUPPORT -+ case ODM_RTL8812: -+ phydm_path_diversity_init_8812a(dm); -+ break; -+ #endif -+ -+ #if RTL8814A_SUPPORT -+ case ODM_RTL8814A: -+ phydm_dynamic_tx_path_init(dm); -+ break; -+ #endif -+ } -+} -+ -+void phydm_process_rssi_for_path_div(void *dm_void, void *phy_info_void, -+ void *pkt_info_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_phyinfo_struct *phy_info = NULL; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ u8 id = 0; -+ -+ phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ -+ if (!(pktinfo->is_packet_to_self || pktinfo->is_packet_match_bssid)) -+ return; -+ -+ if (pktinfo->is_cck_rate) -+ return; -+ -+ id = pktinfo->station_id; -+ p_div->path_a_sum[id] += phy_info->rx_mimo_signal_strength[0]; -+ p_div->path_a_cnt[id]++; -+ -+ p_div->path_b_sum[id] += phy_info->rx_mimo_signal_strength[1]; -+ p_div->path_b_cnt[id]++; -+} -+ -+void phydm_pathdiv_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ char help[] = "-h"; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 val[10] = {0}; -+ u8 i, input_idx = 0; -+ -+ for (i = 0; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &val[i]); -+ input_idx++; -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ PHYDM_SSCANF(input[1], DCMD_HEX, &val[0]); -+ PHYDM_SSCANF(input[2], DCMD_HEX, &val[1]); -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{1:TX Ctrl Sig} {0:BB, 1:MAC}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{2:BB Default TX REG} {path}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{3:MAC DESC TX} {path} {macid}\n"); -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{4:MAC Resp TX} {path} {macid}\n"); -+ #endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{5:Fix 1ss path} {ofdm path} {cck path}\n"); -+ } else if (val[0] == 1) { -+ phydm_tx_path_by_mac_or_reg(dm, (enum phydm_path_ctrl)val[1]); -+ } else if (val[0] == 2) { -+ phydm_set_tx_path_by_bb_reg(dm, (enum bb_path)val[1]); -+ } else if (val[0] == 3) { -+ p_div->path_sel[val[2]] = (enum bb_path)val[1]; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ } else if (val[0] == 4) { -+ phydm_set_resp_tx_path_by_fw_jgr3(dm, (u8)val[2], -+ (enum bb_path)val[1], true); -+ #endif -+ } else if (val[0] == 5) { -+ phydm_fix_1ss_tx_path_by_bb_reg(dm, (enum bb_path)val[1], -+ (enum bb_path)val[2]); -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_c2h_dtp_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ODM_PATH_DIVERSITY_ *p_div = &dm->dm_path_div; -+ -+ u8 macid = cmd_buf[0]; -+ u8 target = cmd_buf[1]; -+ u8 nsc_1 = cmd_buf[2]; -+ u8 nsc_2 = cmd_buf[3]; -+ u8 nsc_3 = cmd_buf[4]; -+ -+ PHYDM_DBG(dm, DBG_PATH_DIV, "Target_candidate = (( %d ))\n", target); -+/*@ -+ if( (nsc_1 >= nsc_2) && (nsc_1 >= nsc_3)) -+ { -+ phydm_dtp_fix_tx_path(dm, p_div->ant_candidate_1); -+ } -+ else if( nsc_2 >= nsc_3) -+ { -+ phydm_dtp_fix_tx_path(dm, p_div->ant_candidate_2); -+ } -+ else -+ { -+ phydm_dtp_fix_tx_path(dm, p_div->ant_candidate_3); -+ } -+ */ -+} -+ -+#endif /* @#ifdef CONFIG_PATH_DIVERSITY */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_pathdiv.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_pathdiv.h -new file mode 100644 -index 000000000000..ee3438252f64 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_pathdiv.h -@@ -0,0 +1,145 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMPATHDIV_H__ -+#define __PHYDMPATHDIV_H__ -+ -+#ifdef CONFIG_PATH_DIVERSITY -+/* @2019.03.07 open resp tx path h2c only for 1ss status*/ -+#define PATHDIV_VERSION "4.4" -+ -+#if (RTL8192F_SUPPORT || RTL8822B_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8812F_SUPPORT || RTL8197G_SUPPORT) -+ #define PHYDM_CONFIG_PATH_DIV_V2 -+#endif -+ -+#define USE_PATH_A_AS_DEFAULT_ANT /* @for 8814 dynamic TX path selection */ -+ -+#define NUM_RESET_DTP_PERIOD 5 -+#define ANT_DECT_RSSI_TH 3 -+ -+#define PATH_A 1 -+#define PATH_B 2 -+#define PATH_C 3 -+#define PATH_D 4 -+ -+#define PHYDM_AUTO_PATH 0 -+#define PHYDM_FIX_PATH 1 -+ -+#define NUM_CHOOSE2_FROM4 6 -+#define NUM_CHOOSE3_FROM4 4 -+ -+enum phydm_dtp_state { -+ PHYDM_DTP_INIT = 1, -+ PHYDM_DTP_RUNNING_1 -+}; -+ -+enum phydm_path_div_type { -+ PHYDM_2R_PATH_DIV = 1, -+ PHYDM_4R_PATH_DIV = 2 -+}; -+ -+enum phydm_path_ctrl { -+ TX_PATH_BY_REG = 0, -+ TX_PATH_BY_DESC = 1, -+ TX_PATH_CTRL_INIT -+}; -+ -+struct path_txdesc_ctrl { -+ u8 ant_map_a : 2; -+ u8 ant_map_b : 2; -+ u8 ntx_map : 4; -+}; -+ -+struct _ODM_PATH_DIVERSITY_ { -+ boolean stop_path_div; /*@Limit by enabled path number*/ -+ boolean path_div_in_progress; -+ boolean cck_fix_path_en; /*@ BB Reg for Adv-Ctrl (or debug mode)*/ -+ boolean ofdm_fix_path_en; /*@ BB Reg for Adv-Ctrl (or debug mode)*/ -+ enum bb_path cck_fix_path_sel; /*@ BB Reg for Adv-Ctrl (or debug mode)*/ -+ enum bb_path ofdm_fix_path_sel;/*@ BB Reg for Adv-Ctrl (or debug mode)*/ -+ enum phydm_path_ctrl tx_path_ctrl; -+ enum bb_path default_tx_path; -+ enum bb_path path_sel[ODM_ASSOCIATE_ENTRY_NUM]; -+ u32 path_a_sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u32 path_b_sum[ODM_ASSOCIATE_ENTRY_NUM]; -+ u16 path_a_cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u16 path_b_cnt[ODM_ASSOCIATE_ENTRY_NUM]; -+ u8 phydm_path_div_type; -+ boolean force_update; -+#if RTL8814A_SUPPORT -+ -+ u32 path_a_sum_all; -+ u32 path_b_sum_all; -+ u32 path_c_sum_all; -+ u32 path_d_sum_all; -+ -+ u32 path_a_cnt_all; -+ u32 path_b_cnt_all; -+ u32 path_c_cnt_all; -+ u32 path_d_cnt_all; -+ -+ u8 dtp_period; -+ boolean is_become_linked; -+ boolean is_u3_mode; -+ u8 num_tx_path; -+ u8 default_path; -+ u8 num_candidate; -+ u8 ant_candidate_1; -+ u8 ant_candidate_2; -+ u8 ant_candidate_3; -+ u8 phydm_dtp_state; -+ u8 dtp_check_patha_counter; -+ boolean fix_path_bfer; -+ u8 search_space_2[NUM_CHOOSE2_FROM4]; -+ u8 search_space_3[NUM_CHOOSE3_FROM4]; -+ -+ u8 pre_tx_path; -+ u8 use_path_a_as_default_ant; -+ boolean is_path_a_exist; -+ -+#endif -+}; -+ -+void phydm_set_tx_path_by_bb_reg(void *dm_void, enum bb_path tx_path_sel_1ss); -+ -+void phydm_get_tx_path_txdesc_jgr3(void *dm_void, u8 macid, -+ struct path_txdesc_ctrl *desc); -+ -+void phydm_c2h_dtp_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); -+ -+void phydm_tx_path_diversity_init(void *dm_void); -+ -+void phydm_tx_path_diversity(void *dm_void); -+ -+void phydm_process_rssi_for_path_div(void *dm_void, void *phy_info_void, -+ void *pkt_info_void); -+ -+void phydm_pathdiv_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+#endif /* @#ifdef CONFIG_PATH_DIVERSITY */ -+#endif /* @#ifndef __PHYDMPATHDIV_H__ */ -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_phystatus.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_phystatus.c -new file mode 100644 -index 000000000000..7d7ecd7c6a83 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_phystatus.c -@@ -0,0 +1,3245 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef PHYDM_COMPILE_MU -+u8 phydm_get_gid(struct dm_struct *dm, u8 *phy_status_inf) -+{ -+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) -+ struct phy_sts_rpt_jgr2_type1 *rpt_jgr2 = NULL; -+#endif -+#ifdef PHYSTS_3RD_TYPE_SUPPORT -+ struct phy_sts_rpt_jgr3_type1 *rpt_jgr3 = NULL; -+#endif -+ u8 gid = 0; -+ -+ if (dm->ic_phy_sts_type == PHYDM_PHYSTS_TYPE_1) -+ return 0; -+ -+ if ((*phy_status_inf & 0xf) != 1) -+ return 0; -+ -+ switch (dm->ic_phy_sts_type) { -+ #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) -+ case PHYDM_PHYSTS_TYPE_2: -+ rpt_jgr2 = (struct phy_sts_rpt_jgr2_type1 *)phy_status_inf; -+ gid = rpt_jgr2->gid; -+ break; -+ #endif -+ #ifdef PHYSTS_3RD_TYPE_SUPPORT -+ case PHYDM_PHYSTS_TYPE_3: -+ rpt_jgr3 = (struct phy_sts_rpt_jgr3_type1 *)phy_status_inf; -+ gid = rpt_jgr3->gid; -+ break; -+ #endif -+ default: -+ break; -+ } -+ -+ return gid; -+} -+#endif -+ -+void phydm_rx_statistic_cal(struct dm_struct *dm, -+ struct phydm_phyinfo_struct *phy_info, -+ u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo) -+{ -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ struct phydm_bf_rate_info_jgr3 *bfrateinfo = &dm->bf_rate_info_jgr3; -+#endif -+ -+ u8 rate = (pktinfo->data_rate & 0x7f); -+ u8 bw_idx = phy_info->band_width; -+ u8 offset = 0; -+ u8 gid = 0; -+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT)) -+ u8 val = 0; -+#endif -+ #ifdef PHYDM_COMPILE_MU -+ u8 is_mu_pkt = 0; -+ #endif -+ -+ if (rate <= ODM_RATE54M) { -+ dbg_i->num_qry_legacy_pkt[rate]++; -+ } else if (rate <= ODM_RATEMCS31) { -+ dbg_i->ht_pkt_not_zero = true; -+ offset = rate - ODM_RATEMCS0; -+ -+ if (offset > (HT_RATE_NUM - 1)) -+ offset = HT_RATE_NUM - 1; -+ -+ if (dm->support_ic_type & -+ (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC)) { -+ if (bw_idx == *dm->band_width) { -+ dbg_i->num_qry_ht_pkt[offset]++; -+ -+ } else if (bw_idx == CHANNEL_WIDTH_20) { -+ dbg_i->num_qry_pkt_sc_20m[offset]++; -+ dbg_i->low_bw_20_occur = true; -+ } -+ } else { -+ dbg_i->num_qry_ht_pkt[offset]++; -+ } -+ } -+#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT)) -+ else if (rate <= ODM_RATEVHTSS4MCS9) { -+ offset = rate - ODM_RATEVHTSS1MCS0; -+ -+ if (offset > (VHT_RATE_NUM - 1)) -+ offset = VHT_RATE_NUM - 1; -+ -+ #ifdef PHYDM_COMPILE_MU -+ gid = phydm_get_gid(dm, phy_status_inf); -+ -+ if (gid != 0 && gid != 63) -+ is_mu_pkt = true; -+ -+ if (is_mu_pkt) { -+ #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT ||\ -+ (defined(PHYSTS_3RD_TYPE_SUPPORT))) -+ dbg_i->num_mu_vht_pkt[offset]++; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ bfrateinfo->num_mu_vht_pkt[offset]++; -+ #endif -+ #else -+ dbg_i->num_qry_vht_pkt[offset]++; /*@for debug*/ -+ #endif -+ } else -+ #endif -+ { -+ dbg_i->vht_pkt_not_zero = true; -+ -+ if (dm->support_ic_type & -+ (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC)) { -+ if (bw_idx == *dm->band_width) { -+ dbg_i->num_qry_vht_pkt[offset]++; -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ bfrateinfo->num_qry_vht_pkt[offset]++; -+ #endif -+ -+ } else if (bw_idx == CHANNEL_WIDTH_20) { -+ dbg_i->num_qry_pkt_sc_20m[offset]++; -+ dbg_i->low_bw_20_occur = true; -+ } else {/*@if (bw_idx == CHANNEL_WIDTH_40)*/ -+ dbg_i->num_qry_pkt_sc_40m[offset]++; -+ dbg_i->low_bw_40_occur = true; -+ } -+ } else { -+ dbg_i->num_qry_vht_pkt[offset]++; -+ } -+ } -+ -+ #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT ||\ -+ (defined(PHYSTS_3RD_TYPE_SUPPORT))) -+ if (pktinfo->ppdu_cnt < 4) { -+ val = rate; -+ -+ #ifdef PHYDM_COMPILE_MU -+ if (is_mu_pkt) -+ val |= BIT(7); -+ #endif -+ -+ dbg_i->num_of_ppdu[pktinfo->ppdu_cnt] = val; -+ dbg_i->gid_num[pktinfo->ppdu_cnt] = gid; -+ } -+ #endif -+ } -+#endif -+} -+ -+void phydm_reset_phystatus_avg(struct dm_struct *dm) -+{ -+ struct phydm_phystatus_avg *dbg_avg = NULL; -+ -+ dbg_avg = &dm->phy_dbg_info.phystatus_statistic_avg; -+ odm_memory_set(dm, &dbg_avg->rssi_cck_avg, 0, -+ sizeof(struct phydm_phystatus_avg)); -+} -+ -+void phydm_reset_phystatus_statistic(struct dm_struct *dm) -+{ -+ struct phydm_phystatus_statistic *dbg_s = NULL; -+ -+ dbg_s = &dm->phy_dbg_info.physts_statistic_info; -+ -+ odm_memory_set(dm, &dbg_s->rssi_cck_sum, 0, -+ sizeof(struct phydm_phystatus_statistic)); -+} -+ -+void phydm_reset_phy_info(struct dm_struct *dm, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ u8 i = 0; -+ -+ odm_memory_set(dm, &phy_info->physts_rpt_valid, 0, -+ sizeof(struct phydm_phyinfo_struct)); -+ -+ phy_info->rx_power = -110; -+ phy_info->recv_signal_power = -110; -+ -+ for (i = 0; i < dm->num_rf_path; i++) -+ phy_info->rx_pwr[i] = -110; -+} -+ -+void phydm_avg_rssi_evm_snr(void *dm_void, -+ struct phydm_phyinfo_struct *phy_info, -+ struct phydm_perpkt_info_struct *pktinfo) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; -+ u8 *rssi = phy_info->rx_mimo_signal_strength; -+ u8 *evm = phy_info->rx_mimo_evm_dbm; -+ s8 *snr = phy_info->rx_snr; -+ u32 size = PHYSTS_PATH_NUM; /*size of path=4*/ -+ u16 size_th = PHY_HIST_SIZE - 1; /*size of threshold*/ -+ u16 val = 0, intvl = 0; -+ u8 i = 0; -+ -+ if (pktinfo->is_packet_beacon) { -+ for (i = 0; i < dm->num_rf_path; i++) -+ dbg_s->rssi_beacon_sum[i] += rssi[i]; -+ -+ dbg_s->rssi_beacon_cnt++; -+ } -+ -+ if (pktinfo->data_rate <= ODM_RATE11M) { -+ /*RSSI*/ -+ dbg_s->rssi_cck_sum += rssi[0]; -+ #if (defined(PHYSTS_3RD_TYPE_SUPPORT) && defined(PHYDM_COMPILE_ABOVE_2SS)) -+ if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) { -+ for (i = 1; i < dm->num_rf_path; i++) -+ dbg_s->rssi_cck_sum_abv_2ss[i - 1] += rssi[i]; -+ } -+ #endif -+ dbg_s->rssi_cck_cnt++; -+ } else if (pktinfo->data_rate <= ODM_RATE54M) { -+ for (i = 0; i < dm->num_rf_path; i++) { -+ /*SNR & RSSI*/ -+ dbg_s->snr_ofdm_sum[i] += snr[i]; -+ dbg_s->rssi_ofdm_sum[i] += rssi[i]; -+ } -+ /*@evm*/ -+ dbg_s->evm_ofdm_sum += evm[0]; -+ dbg_s->rssi_ofdm_cnt++; -+ -+ val = (u16)evm[0]; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, size_th); -+ dbg_s->evm_ofdm_hist[intvl]++; -+ -+ val = (u16)snr[0]; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, size_th); -+ dbg_s->snr_ofdm_hist[intvl]++; -+ -+ } else if (pktinfo->rate_ss == 1) { -+/*@===[1-SS]==================================================================*/ -+ for (i = 0; i < dm->num_rf_path; i++) { -+ /*SNR & RSSI*/ -+ dbg_s->snr_1ss_sum[i] += snr[i]; -+ dbg_s->rssi_1ss_sum[i] += rssi[i]; -+ } -+ -+ /*@evm*/ -+ dbg_s->evm_1ss_sum += evm[0]; -+ /*@EVM Histogram*/ -+ val = (u16)evm[0]; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, size_th); -+ dbg_s->evm_1ss_hist[intvl]++; -+ -+ /*SNR Histogram*/ -+ val = (u16)snr[0]; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, size_th); -+ dbg_s->snr_1ss_hist[intvl]++; -+ -+ dbg_s->rssi_1ss_cnt++; -+ } else if (pktinfo->rate_ss == 2) { -+/*@===[2-SS]==================================================================*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ for (i = 0; i < dm->num_rf_path; i++) { -+ /*SNR & RSSI*/ -+ dbg_s->snr_2ss_sum[i] += snr[i]; -+ dbg_s->rssi_2ss_sum[i] += rssi[i]; -+ } -+ -+ for (i = 0; i < pktinfo->rate_ss; i++) { -+ /*@evm*/ -+ dbg_s->evm_2ss_sum[i] += evm[i]; -+ /*@EVM Histogram*/ -+ val = (u16)evm[i]; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, -+ size_th); -+ dbg_s->evm_2ss_hist[i][intvl]++; -+ -+ /*SNR Histogram*/ -+ val = (u16)snr[i]; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, -+ size_th); -+ dbg_s->snr_2ss_hist[i][intvl]++; -+ } -+ dbg_s->rssi_2ss_cnt++; -+ #endif -+ } else if (pktinfo->rate_ss == 3) { -+/*@===[3-SS]==================================================================*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ for (i = 0; i < dm->num_rf_path; i++) { -+ /*SNR & RSSI*/ -+ dbg_s->snr_3ss_sum[i] += snr[i]; -+ dbg_s->rssi_3ss_sum[i] += rssi[i]; -+ } -+ -+ for (i = 0; i < pktinfo->rate_ss; i++) { -+ /*@evm*/ -+ dbg_s->evm_3ss_sum[i] += evm[i]; -+ /*@EVM Histogram*/ -+ val = (u16)evm[i]; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, -+ size_th); -+ dbg_s->evm_3ss_hist[i][intvl]++; -+ -+ /*SNR Histogram*/ -+ val = (u16)snr[i]; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, -+ size_th); -+ dbg_s->snr_3ss_hist[i][intvl]++; -+ } -+ dbg_s->rssi_3ss_cnt++; -+ #endif -+ } else if (pktinfo->rate_ss == 4) { -+/*@===[4-SS]==================================================================*/ -+ #if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ for (i = 0; i < dm->num_rf_path; i++) { -+ /*SNR & RSSI*/ -+ dbg_s->snr_4ss_sum[i] += snr[i]; -+ dbg_s->rssi_4ss_sum[i] += rssi[i]; -+ } -+ -+ for (i = 0; i < pktinfo->rate_ss; i++) { -+ /*@evm*/ -+ dbg_s->evm_4ss_sum[i] += evm[i]; -+ -+ /*@EVM Histogram*/ -+ val = (u16)evm[i]; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->evm_hist_th, -+ size_th); -+ dbg_s->evm_4ss_hist[i][intvl]++; -+ -+ /*SNR Histogram*/ -+ val = (u16)snr[i]; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->snr_hist_th, -+ size_th); -+ dbg_s->snr_4ss_hist[i][intvl]++; -+ } -+ dbg_s->rssi_4ss_cnt++; -+ #endif -+ } -+} -+ -+void phydm_avg_phystatus_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ u16 snr_hist_th[PHY_HIST_TH_SIZE] = {5, 8, 11, 14, 17, 20, 23, 26, -+ 29, 32, 35}; -+ u16 evm_hist_th[PHY_HIST_TH_SIZE] = {5, 8, 11, 14, 17, 20, 23, 26, -+ 29, 32, 35}; -+ #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ u16 cn_hist_th[PHY_HIST_TH_SIZE] = {2, 3, 4, 5, 6, 8, 10, -+ 12, 14, 16, 18}; -+ #endif -+ u32 size = PHY_HIST_TH_SIZE * 2; -+ u8 i = 0; -+ -+ odm_move_memory(dm, dbg_i->snr_hist_th, snr_hist_th, size); -+ odm_move_memory(dm, dbg_i->evm_hist_th, evm_hist_th, size); -+ #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ dm->pkt_proc_struct.physts_auto_swch_en = false; -+ for (i = 0; i < PHY_HIST_TH_SIZE; i++) -+ dbg_i->cn_hist_th[i] = cn_hist_th[i] << 1; -+ #endif -+} -+ -+u8 phydm_get_signal_quality(struct phydm_phyinfo_struct *phy_info, -+ struct dm_struct *dm, -+ struct phy_status_rpt_8192cd *phy_sts) -+{ -+ u8 sq_rpt; -+ u8 result = 0; -+ -+ if (phy_info->rx_pwdb_all > 40 && !dm->is_in_hct_test) { -+ result = 100; -+ } else { -+ sq_rpt = phy_sts->cck_sig_qual_ofdm_pwdb_all; -+ -+ if (sq_rpt > 64) -+ result = 0; -+ else if (sq_rpt < 20) -+ result = 100; -+ else -+ result = ((64 - sq_rpt) * 100) / 44; -+ } -+ -+ return result; -+} -+ -+u8 phydm_pw_2_percent(s8 ant_power) -+{ -+ if ((ant_power <= -100) || ant_power >= 20) -+ return 0; -+ else if (ant_power >= 0) -+ return 100; -+ else -+ return 100 + ant_power; -+} -+ -+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+void phydm_process_signal_strength(struct dm_struct *dm, -+ struct phydm_phyinfo_struct *phy_info, -+ struct phydm_perpkt_info_struct *pktinfo) -+{ -+ boolean is_cck_rate = 0; -+ u8 avg_rssi = 0, tmp_rssi = 0, best_rssi = 0, second_rssi = 0; -+ u8 ss = 0; /*signal strenth after scale mapping*/ -+ u8 pwdb = phy_info->rx_pwdb_all; -+ u8 i; -+ -+ is_cck_rate = (pktinfo->data_rate <= ODM_RATE11M) ? true : false; -+ -+ /*use the best two RSSI only*/ -+ for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { -+ tmp_rssi = phy_info->rx_mimo_signal_strength[i]; -+ -+ /*@Get the best two RSSI*/ -+ if (tmp_rssi > best_rssi && tmp_rssi > second_rssi) { -+ second_rssi = best_rssi; -+ best_rssi = tmp_rssi; -+ } else if (tmp_rssi > second_rssi && tmp_rssi <= best_rssi) { -+ second_rssi = tmp_rssi; -+ } -+ } -+ -+ if (best_rssi == 0) -+ return; -+ -+ if (pktinfo->rate_ss == 1) -+ avg_rssi = best_rssi; -+ else -+ avg_rssi = (best_rssi + second_rssi) >> 1; -+ -+ /* Update signal strength to UI, -+ * and phy_info->rx_pwdb_all is the maximum RSSI of all path -+ */ -+ if (dm->support_ic_type & (PHYSTS_3RD_TYPE_IC | PHYSTS_2ND_TYPE_IC)) -+ ss = SignalScaleProc(dm->adapter, pwdb, false, false); -+ else -+ ss = SignalScaleProc(dm->adapter, pwdb, true, is_cck_rate); -+ -+ phy_info->signal_strength = ss; -+} -+ -+static u8 phydm_sq_patch_lenovo( -+ struct dm_struct *dm, -+ u8 is_cck_rate, -+ u8 pwdb_all, -+ u8 path, -+ u8 RSSI) -+{ -+ u8 sq = 0; -+ -+ if (is_cck_rate) { -+ if (dm->support_ic_type & ODM_RTL8192E) { -+/*@ -+ * -+ * Expected signal strength and bars indication at Lenovo lab. 2013.04.11 -+ * 802.11n, 802.11b, 802.11g only at channel 6 -+ * -+ * Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm) -+ * 50 5 -49 -+ * 55 5 -49 -+ * 60 5 -50 -+ * 65 5 -51 -+ * 70 5 -52 -+ * 75 5 -54 -+ * 80 5 -55 -+ * 85 4 -60 -+ * 90 3 -63 -+ * 95 3 -65 -+ * 100 2 -67 -+ * 102 2 -67 -+ * 104 1 -70 -+ */ -+ if (pwdb_all >= 50) -+ sq = 100; -+ else if (pwdb_all >= 35 && pwdb_all < 50) -+ sq = 80; -+ else if (pwdb_all >= 31 && pwdb_all < 35) -+ sq = 60; -+ else if (pwdb_all >= 22 && pwdb_all < 31) -+ sq = 40; -+ else if (pwdb_all >= 18 && pwdb_all < 22) -+ sq = 20; -+ else -+ sq = 10; -+ } else { -+ if (pwdb_all >= 50) -+ sq = 100; -+ else if (pwdb_all >= 35 && pwdb_all < 50) -+ sq = 80; -+ else if (pwdb_all >= 22 && pwdb_all < 35) -+ sq = 60; -+ else if (pwdb_all >= 18 && pwdb_all < 22) -+ sq = 40; -+ else -+ sq = 10; -+ } -+ -+ } else { -+ /* OFDM rate */ -+ -+ if (dm->support_ic_type & ODM_RTL8192E) { -+ if (RSSI >= 45) -+ sq = 100; -+ else if (RSSI >= 22 && RSSI < 45) -+ sq = 80; -+ else if (RSSI >= 18 && RSSI < 22) -+ sq = 40; -+ else -+ sq = 20; -+ } else { -+ if (RSSI >= 45) -+ sq = 100; -+ else if (RSSI >= 22 && RSSI < 45) -+ sq = 80; -+ else if (RSSI >= 18 && RSSI < 22) -+ sq = 40; -+ else -+ sq = 20; -+ } -+ } -+ return sq; -+} -+ -+static u8 phydm_sq_patch_rt_cid_819x_acer( -+ struct dm_struct *dm, -+ u8 is_cck_rate, -+ u8 pwdb_all, -+ u8 path, -+ u8 RSSI) -+{ -+ u8 sq = 0; -+ -+ if (is_cck_rate) { -+#if OS_WIN_FROM_WIN8(OS_VERSION) -+ if (pwdb_all >= 50) -+ sq = 100; -+ else if (pwdb_all >= 35 && pwdb_all < 50) -+ sq = 80; -+ else if (pwdb_all >= 30 && pwdb_all < 35) -+ sq = 60; -+ else if (pwdb_all >= 25 && pwdb_all < 30) -+ sq = 40; -+ else if (pwdb_all >= 20 && pwdb_all < 25) -+ sq = 20; -+ else -+ sq = 10; -+#else -+ if (pwdb_all >= 50) -+ sq = 100; -+ else if (pwdb_all >= 35 && pwdb_all < 50) -+ sq = 80; -+ else if (pwdb_all >= 30 && pwdb_all < 35) -+ sq = 60; -+ else if (pwdb_all >= 25 && pwdb_all < 30) -+ sq = 40; -+ else if (pwdb_all >= 20 && pwdb_all < 25) -+ sq = 20; -+ else -+ sq = 10; -+ -+ /* @Abnormal case, do not indicate the value above 20 on Win7 */ -+ if (pwdb_all == 0) -+ sq = 20; -+#endif -+ -+ } else { -+ /* OFDM rate */ -+ if (dm->support_ic_type & ODM_RTL8192E) { -+ if (RSSI >= 45) -+ sq = 100; -+ else if (RSSI >= 22 && RSSI < 45) -+ sq = 80; -+ else if (RSSI >= 18 && RSSI < 22) -+ sq = 40; -+ else -+ sq = 20; -+ } else { -+ if (RSSI >= 35) -+ sq = 100; -+ else if (RSSI >= 30 && RSSI < 35) -+ sq = 80; -+ else if (RSSI >= 25 && RSSI < 30) -+ sq = 40; -+ else -+ sq = 20; -+ } -+ } -+ return sq; -+} -+#endif -+ -+static u8 -+phydm_evm_2_percent(s8 value) -+{ -+ /* @-33dB~0dB to 0%~99% */ -+ s8 ret_val; -+ -+ ret_val = value; -+ ret_val /= 2; -+ -+/*@dbg_print("value=%d\n", value);*/ -+#ifdef ODM_EVM_ENHANCE_ANTDIV -+ if (ret_val >= 0) -+ ret_val = 0; -+ -+ if (ret_val <= -40) -+ ret_val = -40; -+ -+ ret_val = 0 - ret_val; -+ ret_val *= 3; -+#else -+ if (ret_val >= 0) -+ ret_val = 0; -+ -+ if (ret_val <= -33) -+ ret_val = -33; -+ -+ ret_val = 0 - ret_val; -+ ret_val *= 3; -+ -+ if (ret_val == 99) -+ ret_val = 100; -+#endif -+ -+ return (u8)ret_val; -+} -+ -+s8 phydm_cck_rssi_convert(struct dm_struct *dm, u16 lna_idx, u8 vga_idx) -+{ -+ /*@phydm_get_cck_rssi_table_from_reg*/ -+ return (dm->cck_lna_gain_table[lna_idx] - (vga_idx << 1)); -+} -+ -+void phydm_get_cck_rssi_table_from_reg(struct dm_struct *dm) -+{ -+ u8 used_lna_idx_tmp; -+ u32 reg_0xa80 = 0x7431, reg_0xabc = 0xcbe5edfd; -+ u32 val = 0; -+ u8 i; -+ -+ /*@example: {-53, -43, -33, -27, -19, -13, -3, 1}*/ -+ /*@{0xCB, 0xD5, 0xDF, 0xE5, 0xED, 0xF3, 0xFD, 0x2}*/ -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "CCK LNA Gain table init\n"); -+ -+ if (!(dm->support_ic_type & ODM_RTL8197F)) -+ return; -+ -+ reg_0xa80 = odm_get_bb_reg(dm, R_0xa80, 0xFFFF); -+ reg_0xabc = odm_get_bb_reg(dm, R_0xabc, MASKDWORD); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "reg_0xa80 = 0x%x\n", reg_0xa80); -+ PHYDM_DBG(dm, ODM_COMP_INIT, "reg_0xabc = 0x%x\n", reg_0xabc); -+ -+ for (i = 0; i <= 3; i++) { -+ used_lna_idx_tmp = (u8)((reg_0xa80 >> (4 * i)) & 0x7); -+ val = (reg_0xabc >> (8 * i)) & 0xff; -+ dm->cck_lna_gain_table[used_lna_idx_tmp] = (s8)val; -+ } -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "cck_lna_gain_table = {%d,%d,%d,%d,%d,%d,%d,%d}\n", -+ dm->cck_lna_gain_table[0], dm->cck_lna_gain_table[1], -+ dm->cck_lna_gain_table[2], dm->cck_lna_gain_table[3], -+ dm->cck_lna_gain_table[4], dm->cck_lna_gain_table[5], -+ dm->cck_lna_gain_table[6], dm->cck_lna_gain_table[7]); -+} -+ -+s8 phydm_get_cck_rssi(void *dm_void, u8 lna_idx, u8 vga_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ s8 rx_pow = 0; -+ -+ switch (dm->support_ic_type) { -+ #if (RTL8197F_SUPPORT) -+ case ODM_RTL8197F: -+ rx_pow = phydm_cck_rssi_convert(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8723D_SUPPORT) -+ case ODM_RTL8723D: -+ rx_pow = phydm_cckrssi_8723d(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8710B_SUPPORT) -+ case ODM_RTL8710B: -+ rx_pow = phydm_cckrssi_8710b(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8721D_SUPPORT) -+ case ODM_RTL8721D: -+ rx_pow = phydm_cckrssi_8721d(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8710C_SUPPORT) -+ case ODM_RTL8710C: -+ rx_pow = phydm_cckrssi_8710c(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8192F_SUPPORT) -+ case ODM_RTL8192F: -+ rx_pow = phydm_cckrssi_8192f(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8821C_SUPPORT) -+ case ODM_RTL8821C: -+ rx_pow = phydm_cck_rssi_8821c(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8195B_SUPPORT) -+ case ODM_RTL8195B: -+ rx_pow = phydm_cck_rssi_8195B(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8188E_SUPPORT) -+ case ODM_RTL8188E: -+ rx_pow = phydm_cck_rssi_8188e(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8192E_SUPPORT) -+ case ODM_RTL8192E: -+ rx_pow = phydm_cck_rssi_8192e(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8723B_SUPPORT) -+ case ODM_RTL8723B: -+ rx_pow = phydm_cck_rssi_8723b(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8703B_SUPPORT) -+ case ODM_RTL8703B: -+ rx_pow = phydm_cck_rssi_8703b(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8188F_SUPPORT) -+ case ODM_RTL8188F: -+ rx_pow = phydm_cck_rssi_8188f(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8195A_SUPPORT) -+ case ODM_RTL8195A: -+ rx_pow = phydm_cck_rssi_8195a(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8812A_SUPPORT) -+ case ODM_RTL8812: -+ rx_pow = phydm_cck_rssi_8812a(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8821A_SUPPORT || RTL8881A_SUPPORT) -+ case ODM_RTL8821: -+ case ODM_RTL8881A: -+ rx_pow = phydm_cck_rssi_8821a(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ #if (RTL8814A_SUPPORT) -+ case ODM_RTL8814A: -+ rx_pow = phydm_cck_rssi_8814a(dm, lna_idx, vga_idx); -+ break; -+ #endif -+ -+ default: -+ break; -+ } -+ -+ return rx_pow; -+} -+ -+#if (ODM_IC_11N_SERIES_SUPPORT) -+void phydm_phy_sts_n_parsing(struct dm_struct *dm, -+ struct phydm_phyinfo_struct *phy_info, -+ u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo) -+{ -+ u8 i = 0; -+ s8 rx_pwr[4], rx_pwr_all = 0; -+ u8 EVM, pwdb_all = 0, pwdb_all_bt = 0; -+ u8 RSSI, total_rssi = 0; -+ u8 rf_rx_num = 0; -+ u8 lna_idx = 0; -+ u8 vga_idx = 0; -+ u8 cck_agc_rpt; -+ s8 evm_tmp = 0; -+ u8 sq = 0; -+ u8 val_tmp = 0; -+ s8 val_s8 = 0; -+ struct phy_status_rpt_8192cd *phy_sts = NULL; -+ -+ phy_sts = (struct phy_status_rpt_8192cd *)phy_status_inf; -+ -+ if (pktinfo->is_cck_rate) { -+ cck_agc_rpt = phy_sts->cck_agc_rpt_ofdm_cfosho_a; -+ -+ /*@3 bit LNA*/ -+ lna_idx = ((cck_agc_rpt & 0xE0) >> 5); -+ vga_idx = (cck_agc_rpt & 0x1F); -+ -+ #if (RTL8703B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8703B) && -+ dm->cck_agc_report_type == 1) { -+ /*@4 bit LNA*/ -+ if (phy_sts->cck_rpt_b_ofdm_cfosho_b & BIT(7)) -+ val_tmp = 1; -+ else -+ val_tmp = 0; -+ lna_idx = (val_tmp << 3) | lna_idx; -+ } -+ #endif -+ -+ rx_pwr_all = phydm_get_cck_rssi(dm, lna_idx, vga_idx); -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, -+ "ext_lna_gain (( %d )), lna_idx: (( 0x%x )), vga_idx: (( 0x%x )), rx_pwr_all: (( %d ))\n", -+ dm->ext_lna_gain, lna_idx, vga_idx, rx_pwr_all); -+ -+ if (dm->board_type & ODM_BOARD_EXT_LNA) -+ rx_pwr_all -= dm->ext_lna_gain; -+ -+ pwdb_all = phydm_pw_2_percent(rx_pwr_all); -+ -+ if (pktinfo->is_to_self) { -+ dm->cck_lna_idx = lna_idx; -+ dm->cck_vga_idx = vga_idx; -+ } -+ -+ phy_info->rx_pwdb_all = pwdb_all; -+ phy_info->bt_rx_rssi_percentage = pwdb_all; -+ phy_info->recv_signal_power = rx_pwr_all; -+ -+ /* @(3) Get Signal Quality (EVM) */ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) -+ sq = phydm_sq_patch_lenovo(dm, pktinfo->is_cck_rate, pwdb_all, 0, 0); -+ else if (dm->iot_table.win_patch_id == RT_CID_819X_ACER) -+ sq = phydm_sq_patch_rt_cid_819x_acer(dm, pktinfo->is_cck_rate, pwdb_all, 0, 0); -+ else -+ #endif -+ sq = phydm_get_signal_quality(phy_info, dm, phy_sts); -+ -+ /* @dbg_print("cck sq = %d\n", sq); */ -+ -+ phy_info->signal_quality = sq; -+ phy_info->rx_mimo_signal_quality[RF_PATH_A] = sq; -+ phy_info->rx_mimo_signal_quality[RF_PATH_B] = -1; -+ -+ for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { -+ if (i == 0) -+ phy_info->rx_mimo_signal_strength[0] = pwdb_all; -+ else -+ phy_info->rx_mimo_signal_strength[i] = 0; -+ } -+ } else { /* @2 is OFDM rate */ -+ -+ /* @(1)Get RSSI for HT rate */ -+ -+ for (i = RF_PATH_A; i < dm->num_rf_path; i++) { -+ if (dm->rf_path_rx_enable & BIT(i)) -+ rf_rx_num++; -+ -+ val_s8 = phy_sts->path_agc[i].gain & 0x3F; -+ rx_pwr[i] = (val_s8 * 2) - 110; -+ -+ if (pktinfo->is_to_self) -+ dm->ofdm_agc_idx[i] = val_s8; -+ -+ phy_info->rx_pwr[i] = rx_pwr[i]; -+ RSSI = phydm_pw_2_percent(rx_pwr[i]); -+ total_rssi += RSSI; -+ -+ phy_info->rx_mimo_signal_strength[i] = (u8)RSSI; -+ -+ /* @Get Rx snr value in DB */ -+ val_s8 = (s8)(phy_sts->path_rxsnr[i] / 2); -+ phy_info->rx_snr[i] = val_s8; -+ -+ /* Record Signal Strength for next packet */ -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (i == RF_PATH_A) { -+ if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) { -+ phy_info->signal_quality = phydm_sq_patch_lenovo(dm, pktinfo->is_cck_rate, pwdb_all, i, RSSI); -+ } else if (dm->iot_table.win_patch_id == RT_CID_819X_ACER) -+ phy_info->signal_quality = phydm_sq_patch_rt_cid_819x_acer(dm, pktinfo->is_cck_rate, pwdb_all, 0, RSSI); -+ } -+ #endif -+ } -+ -+ /* @(2)PWDB, Average PWDB calculated by hardware (for RA) */ -+ val_s8 = phy_sts->cck_sig_qual_ofdm_pwdb_all >> 1; -+ rx_pwr_all = (val_s8 & 0x7f) - 110; -+ -+ pwdb_all = phydm_pw_2_percent(rx_pwr_all); -+ pwdb_all_bt = pwdb_all; -+ -+ phy_info->rx_pwdb_all = pwdb_all; -+ phy_info->bt_rx_rssi_percentage = pwdb_all_bt; -+ phy_info->rx_power = rx_pwr_all; -+ phy_info->recv_signal_power = rx_pwr_all; -+ -+ /* @(3)EVM of HT rate */ -+ for (i = 0; i < pktinfo->rate_ss; i++) { -+ /* @Do not use shift operation like "rx_evmX >>= 1" -+ * because the compilor of free build environment -+ * fill most significant bit to "zero" when doing shifting -+ * operation which may change a negative -+ * value to positive one, then the dbm value -+ * (which is supposed to be negative) is not correct anymore. -+ */ -+ if (i >= PHYDM_MAX_RF_PATH_N) -+ break; -+ -+ EVM = phydm_evm_2_percent(phy_sts->stream_rxevm[i]); -+ -+ /*@Fill value in RFD, Get the 1st spatial stream only*/ -+ if (i == RF_PATH_A) -+ phy_info->signal_quality = (u8)(EVM & 0xff); -+ -+ phy_info->rx_mimo_signal_quality[i] = (u8)(EVM & 0xff); -+ -+ if (phy_sts->stream_rxevm[i] < 0) -+ evm_tmp = 0 - phy_sts->stream_rxevm[i]; -+ -+ if (evm_tmp == 64) -+ evm_tmp = 0; -+ -+ phy_info->rx_mimo_evm_dbm[i] = (u8)evm_tmp; -+ } -+ phydm_parsing_cfo(dm, pktinfo, -+ phy_sts->path_cfotail, pktinfo->rate_ss); -+ } -+ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->ant_sel; -+ dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->ant_sel_b; -+ dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antsel_rx_keep_2; -+ #endif -+} -+#endif -+ -+#if ODM_IC_11AC_SERIES_SUPPORT -+static s16 -+phydm_cfo(s8 value) -+{ -+ s16 ret_val; -+ -+ if (value < 0) { -+ ret_val = 0 - value; -+ ret_val = (ret_val << 1) + (ret_val >> 1); /*@2.5~=312.5/2^7 */ -+ ret_val = ret_val | BIT(12); /*set bit12 as 1 for negative cfo*/ -+ } else { -+ ret_val = value; -+ ret_val = (ret_val << 1) + (ret_val >> 1); /* @*2.5~=312.5/2^7*/ -+ } -+ return ret_val; -+} -+ -+static u8 -+phydm_evm_dbm(s8 value) -+{ -+ s8 ret_val = value; -+ -+ /* @-33dB~0dB to 33dB ~ 0dB */ -+ if (ret_val == -128) -+ ret_val = 127; -+ else if (ret_val < 0) -+ ret_val = 0 - ret_val; -+ -+ ret_val = ret_val >> 1; -+ return (u8)ret_val; -+} -+ -+void phydm_rx_physts_bw_parsing(struct phydm_phyinfo_struct *phy_info, -+ struct phydm_perpkt_info_struct * -+ pktinfo, -+ struct phy_status_rpt_8812 * -+ phy_sts) -+{ -+ if (pktinfo->data_rate > ODM_RATE54M) { -+ switch (phy_sts->r_RFMOD) { -+ case 1: -+ if (phy_sts->sub_chnl == 0) -+ phy_info->band_width = 1; -+ else -+ phy_info->band_width = 0; -+ break; -+ -+ case 2: -+ if (phy_sts->sub_chnl == 0) -+ phy_info->band_width = 2; -+ else if (phy_sts->sub_chnl == 9 || -+ phy_sts->sub_chnl == 10) -+ phy_info->band_width = 1; -+ else -+ phy_info->band_width = 0; -+ break; -+ -+ default: -+ case 0: -+ phy_info->band_width = 0; -+ break; -+ } -+ } -+} -+ -+void phydm_get_sq(struct dm_struct *dm, struct phydm_phyinfo_struct *phy_info, -+ u8 is_cck_rate) -+{ -+ u8 sq = 0; -+ u8 pwdb_all = phy_info->rx_pwdb_all; /*precentage*/ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ u8 rssi = phy_info->rx_mimo_signal_strength[0]; -+ #endif -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (dm->iot_table.win_patch_id == RT_CID_819X_LENOVO) { -+ if (is_cck_rate) -+ sq = phydm_sq_patch_lenovo(dm, 1, pwdb_all, 0, 0); -+ else -+ sq = phydm_sq_patch_lenovo(dm, 0, pwdb_all, 0, rssi); -+ } else -+ #endif -+ { -+ if (is_cck_rate) { -+ if (pwdb_all > 40 && !dm->is_in_hct_test) { -+ sq = 100; -+ } else { -+ if (pwdb_all > 64) -+ sq = 0; -+ else if (pwdb_all < 20) -+ sq = 100; -+ else -+ sq = ((64 - pwdb_all) * 100) / 44; -+ } -+ } else { -+ sq = phy_info->rx_mimo_signal_quality[0]; -+ } -+ } -+ -+#if 0 -+ /* @dbg_print("cck sq = %d\n", sq); */ -+#endif -+ phy_info->signal_quality = sq; -+} -+ -+void phydm_rx_physts_1st_type(struct dm_struct *dm, -+ struct phydm_phyinfo_struct *phy_info, -+ u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo) -+{ -+ u8 i = 0; -+ s8 rx_pwr_db = 0; -+ u8 val = 0; /*tmp value*/ -+ s8 val_s8 = 0; /*tmp value*/ -+ u8 rssi = 0; /*pre path RSSI*/ -+ u8 rf_rx_num = 0; -+ u8 lna_idx = 0, vga_idx = 0; -+ u8 cck_agc_rpt = 0; -+ struct phy_status_rpt_8812 *phy_sts = NULL; -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ #endif -+ -+ phy_sts = (struct phy_status_rpt_8812 *)phy_status_inf; -+ phydm_rx_physts_bw_parsing(phy_info, pktinfo, phy_sts); -+ -+ /* @== [CCK rate] ====================================================*/ -+ if (pktinfo->is_cck_rate) { -+ cck_agc_rpt = phy_sts->cfosho[0]; -+ lna_idx = (cck_agc_rpt & 0xE0) >> 5; -+ vga_idx = cck_agc_rpt & 0x1F; -+ -+ rx_pwr_db = phydm_get_cck_rssi(dm, lna_idx, vga_idx); -+ rssi = phydm_pw_2_percent(rx_pwr_db); -+ -+ if (dm->support_ic_type == ODM_RTL8812 && -+ !dm->is_cck_high_power) { -+ if (rssi >= 80) { -+ rssi = ((rssi - 80) << 1) + -+ ((rssi - 80) >> 1) + 80; -+ } else if ((rssi <= 78) && (rssi >= 20)) { -+ rssi += 3; -+ } -+ } -+ dm->cck_lna_idx = lna_idx; -+ dm->cck_vga_idx = vga_idx; -+ -+ phy_info->rx_pwdb_all = rssi; -+ phy_info->rx_mimo_signal_strength[0] = rssi; -+ } else { -+ /* @== [OFDM rate] ===================================================*/ -+ for (i = RF_PATH_A; i < dm->num_rf_path; i++) { -+ /*@[RSSI]*/ -+ if (dm->rf_path_rx_enable & BIT(i)) -+ rf_rx_num++; -+ -+ if (i < RF_PATH_C) -+ val = phy_sts->gain_trsw[i]; -+ else -+ val = phy_sts->gain_trsw_cd[i - 2]; -+ -+ phy_info->rx_pwr[i] = (val & 0x7F) - 110; -+ rssi = phydm_pw_2_percent(phy_info->rx_pwr[i]); -+ phy_info->rx_mimo_signal_strength[i] = rssi; -+ -+ /*@[SNR]*/ -+ if (i < RF_PATH_C) -+ val_s8 = phy_sts->rxsnr[i]; -+ else if (dm->support_ic_type & (ODM_RTL8814A)) -+ val_s8 = (s8)phy_sts->csi_current[i - 2]; -+ -+ phy_info->rx_snr[i] = val_s8 >> 1; -+ -+ /*@[CFO_short & CFO_tail]*/ -+ if (i < RF_PATH_C) { -+ val_s8 = phy_sts->cfosho[i]; -+ phy_info->cfo_short[i] = phydm_cfo(val_s8); -+ val_s8 = phy_sts->cfotail[i]; -+ phy_info->cfo_tail[i] = phydm_cfo(val_s8); -+ } -+ -+ if (i < RF_PATH_C && pktinfo->is_to_self) -+ dm->ofdm_agc_idx[i] = phy_sts->gain_trsw[i]; -+ } -+ -+ /* @== [PWDB] ========================================================*/ -+ -+ /*@(Avg PWDB calculated by hardware*/ -+ if (!dm->is_mp_chip) /*@8812, 8821*/ -+ val = phy_sts->pwdb_all; -+ else -+ val = phy_sts->pwdb_all >> 1; /*old fomula*/ -+ -+ rx_pwr_db = (val & 0x7f) - 110; -+ phy_info->rx_pwdb_all = phydm_pw_2_percent(rx_pwr_db); -+ -+ /*@(4)EVM of OFDM rate*/ -+ for (i = 0; i < pktinfo->rate_ss; i++) { -+ if (!pktinfo->is_cck_rate && -+ pktinfo->data_rate <= ODM_RATE54M) { -+ val_s8 = phy_sts->sigevm; -+ } else if (i < RF_PATH_C) { -+ if (phy_sts->rxevm[i] == -128) -+ phy_sts->rxevm[i] = -25; -+ -+ val_s8 = phy_sts->rxevm[i]; -+ } else { -+ if (phy_sts->rxevm_cd[i - 2] == -128) -+ phy_sts->rxevm_cd[i - 2] = -25; -+ -+ val_s8 = phy_sts->rxevm_cd[i - 2]; -+ } -+ /*@[EVM to 0~100%]*/ -+ val = phydm_evm_2_percent(val_s8); -+ phy_info->rx_mimo_signal_quality[i] = val; -+ /*@[EVM dBm]*/ -+ phy_info->rx_mimo_evm_dbm[i] = phydm_evm_dbm(val_s8); -+ } -+ phydm_parsing_cfo(dm, pktinfo, -+ phy_sts->cfotail, pktinfo->rate_ss); -+ } -+ -+ /* @== [General Info] ================================================*/ -+ -+ phy_info->rx_power = rx_pwr_db; -+ phy_info->bt_rx_rssi_percentage = phy_info->rx_pwdb_all; -+ phy_info->recv_signal_power = phy_info->rx_power; -+ phydm_get_sq(dm, phy_info, pktinfo->is_cck_rate); -+ -+ dm->rx_pwdb_ave = dm->rx_pwdb_ave + phy_info->rx_pwdb_all; -+ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ fat_tab->hw_antsw_occur = phy_sts->hw_antsw_occur; -+ dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_anta; -+ dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_antb; -+ dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_antc; -+ dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_antd; -+ #endif -+} -+ -+#endif -+ -+void phydm_reset_rssi_for_dm(struct dm_struct *dm, u8 station_id) -+{ -+ struct cmn_sta_info *sta; -+ -+ sta = dm->phydm_sta_info[station_id]; -+ -+ if (!is_sta_active(sta)) -+ return; -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "Reset RSSI for macid = (( %d ))\n", -+ station_id); -+ -+ sta->rssi_stat.rssi_cck = -1; -+ sta->rssi_stat.rssi_ofdm = -1; -+ sta->rssi_stat.rssi = -1; -+ sta->rssi_stat.ofdm_pkt_cnt = 0; -+ sta->rssi_stat.cck_pkt_cnt = 0; -+ sta->rssi_stat.cck_sum_power = 0; -+ sta->rssi_stat.is_send_rssi = RA_RSSI_STATE_INIT; -+ sta->rssi_stat.packet_map = 0; -+ sta->rssi_stat.valid_bit = 0; -+} -+ -+#if (ODM_IC_11N_SERIES_SUPPORT || ODM_IC_11AC_SERIES_SUPPORT) -+ -+s32 phydm_get_rssi_8814_ofdm(struct dm_struct *dm, u8 *rssi_in) -+{ -+ s32 rssi_avg; -+ u8 rx_count = 0; -+ u64 rssi_linear = 0; -+ -+ if (dm->rx_ant_status & BB_PATH_A) { -+ rx_count++; -+ rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_A]); -+ } -+ -+ if (dm->rx_ant_status & BB_PATH_B) { -+ rx_count++; -+ rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_B]); -+ } -+ -+ if (dm->rx_ant_status & BB_PATH_C) { -+ rx_count++; -+ rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_C]); -+ } -+ -+ if (dm->rx_ant_status & BB_PATH_D) { -+ rx_count++; -+ rssi_linear += phydm_db_2_linear(rssi_in[RF_PATH_D]); -+ } -+ -+ /* @Rounding and removing fractional bits */ -+ rssi_linear = (rssi_linear + (1 << (FRAC_BITS - 1))) >> FRAC_BITS; -+ -+ /* @Calculate average RSSI */ -+ switch (rx_count) { -+ case 2: -+ rssi_linear = DIVIDED_2(rssi_linear); -+ break; -+ case 3: -+ rssi_linear = DIVIDED_3(rssi_linear); -+ break; -+ case 4: -+ rssi_linear = DIVIDED_4(rssi_linear); -+ break; -+ } -+ rssi_avg = odm_convert_to_db(rssi_linear); -+ -+ return rssi_avg; -+} -+ -+void phydm_process_rssi_for_dm(struct dm_struct *dm, -+ struct phydm_phyinfo_struct *phy_info, -+ struct phydm_perpkt_info_struct *pktinfo) -+{ -+ s32 rssi_ave = 0; /*@average among all paths*/ -+ s8 rssi_all = 0; /*@average value of CCK & OFDM*/ -+ s8 rssi_cck_tmp = 0, rssi_ofdm_tmp = 0; -+ u8 i = 0; -+ u8 rssi_max = 0, rssi_min = 0; -+ u32 w1 = 0, w2 = 0; /*weighting*/ -+ u8 send_rssi_2_fw = 0; -+ u8 *rssi_tmp = NULL; -+ struct cmn_sta_info *sta = NULL; -+ struct rssi_info *rssi_t = NULL; -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ #endif -+ #endif -+ -+ if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM) -+ return; -+ -+ #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY -+ odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(dm, phy_info, pktinfo); -+ #endif -+ -+ sta = dm->phydm_sta_info[pktinfo->station_id]; -+ -+ if (!is_sta_active(sta)) -+ return; -+ -+ rssi_t = &sta->rssi_stat; -+ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -+ if ((dm->support_ability & ODM_BB_ANT_DIV) && -+ fat_tab->enable_ctrl_frame_antdiv) { -+ if (pktinfo->is_packet_match_bssid) -+ dm->data_frame_num++; -+ -+ if (fat_tab->use_ctrl_frame_antdiv) { -+ if (!pktinfo->is_to_self) /*@data frame + CTRL frame*/ -+ return; -+ } else { -+ /*@data frame only*/ -+ if (!pktinfo->is_packet_match_bssid) -+ return; -+ } -+ } else -+ #endif -+ #endif -+ { -+ if (!pktinfo->is_packet_match_bssid) /*@data frame only*/ -+ return; -+ } -+ -+ if (pktinfo->is_packet_beacon) { -+ dm->phy_dbg_info.num_qry_beacon_pkt++; -+ dm->phy_dbg_info.beacon_phy_rate = pktinfo->data_rate; -+ } -+ -+ /* @--------------Statistic for antenna/path diversity--------------- */ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ if (dm->antdiv_evm_en) -+ phydm_rx_rate_for_antdiv(dm, pktinfo); -+ #endif -+ -+ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ if (dm->support_ability & ODM_BB_ANT_DIV) -+ odm_process_rssi_for_ant_div(dm, phy_info, pktinfo); -+ #endif -+ -+ #if (defined(CONFIG_PATH_DIVERSITY)) -+ if (dm->support_ability & ODM_BB_PATH_DIV) -+ phydm_process_rssi_for_path_div(dm, phy_info, pktinfo); -+ #endif -+ /* @----------------------------------------------------------------- */ -+ -+ rssi_cck_tmp = rssi_t->rssi_cck; -+ rssi_ofdm_tmp = rssi_t->rssi_ofdm; -+ rssi_all = rssi_t->rssi; -+ -+ if (!(pktinfo->is_packet_to_self || pktinfo->is_packet_beacon)) -+ return; -+ -+ if (!pktinfo->is_cck_rate) { -+/* @=== [ofdm RSSI] ======================================================== */ -+ rssi_tmp = phy_info->rx_mimo_signal_strength; -+ -+ #if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type & (ODM_RTL8814A)) { -+ rssi_ave = phydm_get_rssi_8814_ofdm(dm, rssi_tmp); -+ } else -+ #endif -+ { -+ if (rssi_tmp[RF_PATH_B] == 0) { -+ rssi_ave = rssi_tmp[RF_PATH_A]; -+ } else { -+ if (rssi_tmp[RF_PATH_A] > rssi_tmp[RF_PATH_B]) { -+ rssi_max = rssi_tmp[RF_PATH_A]; -+ rssi_min = rssi_tmp[RF_PATH_B]; -+ } else { -+ rssi_max = rssi_tmp[RF_PATH_B]; -+ rssi_min = rssi_tmp[RF_PATH_A]; -+ } -+ if ((rssi_max - rssi_min) < 3) -+ rssi_ave = rssi_max; -+ else if ((rssi_max - rssi_min) < 6) -+ rssi_ave = rssi_max - 1; -+ else if ((rssi_max - rssi_min) < 10) -+ rssi_ave = rssi_max - 2; -+ else -+ rssi_ave = rssi_max - 3; -+ } -+ } -+ -+ /* OFDM MA RSSI */ -+ if (rssi_ofdm_tmp <= 0) { /* @initialize */ -+ rssi_ofdm_tmp = (s8)phy_info->rx_pwdb_all; -+ } else { -+ rssi_ofdm_tmp = (s8)WEIGHTING_AVG(rssi_ofdm_tmp, -+ (1 << RSSI_MA) - 1, -+ rssi_ave, 1); -+ if (phy_info->rx_pwdb_all > (u32)rssi_ofdm_tmp) -+ rssi_ofdm_tmp++; -+ } -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "rssi_ofdm=%d\n", rssi_ofdm_tmp); -+ } else { -+/* @=== [cck RSSI] ========================================================= */ -+ rssi_ave = phy_info->rx_pwdb_all; -+ -+ if (rssi_t->cck_pkt_cnt <= 63) -+ rssi_t->cck_pkt_cnt++; -+ -+ /* @1 Process CCK RSSI */ -+ if (rssi_cck_tmp <= 0) { /* @initialize */ -+ rssi_cck_tmp = (s8)phy_info->rx_pwdb_all; -+ rssi_t->cck_sum_power = (u16)phy_info->rx_pwdb_all; -+ rssi_t->cck_pkt_cnt = 1; /*reset*/ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "[1]CCK_INIT\n"); -+ } else if (rssi_t->cck_pkt_cnt <= CCK_RSSI_INIT_COUNT) { -+ rssi_t->cck_sum_power = rssi_t->cck_sum_power + -+ (u16)phy_info->rx_pwdb_all; -+ -+ rssi_cck_tmp = rssi_t->cck_sum_power / -+ rssi_t->cck_pkt_cnt; -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, -+ "[2]SumPow=%d, cck_pkt=%d\n", -+ rssi_t->cck_sum_power, rssi_t->cck_pkt_cnt); -+ } else { -+ rssi_cck_tmp = (s8)WEIGHTING_AVG(rssi_cck_tmp, -+ (1 << RSSI_MA) - 1, -+ phy_info->rx_pwdb_all, -+ 1); -+ if (phy_info->rx_pwdb_all > (u32)rssi_cck_tmp) -+ rssi_cck_tmp++; -+ } -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "rssi_cck=%d\n", rssi_cck_tmp); -+ } -+ -+/* @=== [ofdm + cck weighting RSSI] ========================================= */ -+ if (!pktinfo->is_cck_rate) { -+ if (rssi_t->ofdm_pkt_cnt < 8 && !(rssi_t->packet_map & BIT(7))) -+ rssi_t->ofdm_pkt_cnt++; /*OFDM packet cnt in bitmap*/ -+ -+ rssi_t->packet_map = (rssi_t->packet_map << 1) | BIT(0); -+ } else { -+ if (rssi_t->ofdm_pkt_cnt > 0 && rssi_t->packet_map & BIT(7)) -+ rssi_t->ofdm_pkt_cnt--; -+ -+ rssi_t->packet_map = rssi_t->packet_map << 1; -+ } -+ -+ if (rssi_t->ofdm_pkt_cnt == 8) { -+ rssi_all = rssi_ofdm_tmp; -+ } else { -+ if (rssi_t->valid_bit < 8) -+ rssi_t->valid_bit++; -+ -+ if (rssi_t->valid_bit == 8) { -+ if (rssi_t->ofdm_pkt_cnt > 4) -+ w1 = 64; -+ else -+ w1 = (u32)(rssi_t->ofdm_pkt_cnt << 4); -+ -+ w2 = 64 - w1; -+ -+ rssi_all = (s8)((w1 * (u32)rssi_ofdm_tmp + -+ w2 * (u32)rssi_cck_tmp) >> 6); -+ } else if (rssi_t->valid_bit != 0) { /*@(valid_bit > 8)*/ -+ w1 = (u32)rssi_t->ofdm_pkt_cnt; -+ w2 = (u32)(rssi_t->valid_bit - rssi_t->ofdm_pkt_cnt); -+ rssi_all = (s8)WEIGHTING_AVG((u32)rssi_ofdm_tmp, w1, -+ (u32)rssi_cck_tmp, w2); -+ } else { -+ rssi_all = 0; -+ } -+ } -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "rssi=%d,w1=%d,w2=%d\n", rssi_all, w1, w2); -+ -+ if ((rssi_t->ofdm_pkt_cnt >= 1 || rssi_t->cck_pkt_cnt >= 5) && -+ rssi_t->is_send_rssi == RA_RSSI_STATE_INIT) { -+ send_rssi_2_fw = 1; -+ rssi_t->is_send_rssi = RA_RSSI_STATE_SEND; -+ } -+ -+ rssi_t->rssi_cck = rssi_cck_tmp; -+ rssi_t->rssi_ofdm = rssi_ofdm_tmp; -+ rssi_t->rssi = rssi_all; -+ -+ if (send_rssi_2_fw) { /* Trigger init rate by RSSI */ -+ if (rssi_t->ofdm_pkt_cnt != 0) -+ rssi_t->rssi = rssi_ofdm_tmp; -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, -+ "[Send to FW] PWDB=%d, ofdm_pkt=%d, cck_pkt=%d\n", -+ rssi_all, rssi_t->ofdm_pkt_cnt, rssi_t->cck_pkt_cnt); -+ } -+ -+#if 0 -+ /* @dbg_print("ofdm_pkt=%d, weighting=%d\n", ofdm_pkt_cnt, weighting);*/ -+ /* @dbg_print("rssi_ofdm_tmp=%d, rssi_all=%d, rssi_cck_tmp=%d\n", */ -+ /* rssi_ofdm_tmp, rssi_all, rssi_cck_tmp); */ -+#endif -+} -+#endif -+ -+#ifdef PHYSTS_3RD_TYPE_SUPPORT -+#ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+void phydm_physts_auto_switch_jgr3_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct pkt_process_info *pkt_proc = &dm->pkt_proc_struct; -+ -+ pkt_proc->phy_ppdu_cnt = 0xff; -+ pkt_proc->mac_ppdu_cnt = 0xff; -+ pkt_proc->page_bitmap_record = 0; -+} -+ -+boolean phydm_physts_auto_switch_jgr3(void *dm_void, u8 *phy_sts, -+ struct phydm_perpkt_info_struct *pktinfo) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct pkt_process_info *pkt_proc = &dm->pkt_proc_struct; -+ boolean is_skip_physts_parsing = false; -+ u8 phy_sts_byte0 = (*phy_sts & 0xff); -+ u8 phy_ppdu_cnt_pre = 0, mac_ppdu_cnt_pre = 0; -+ u8 ppdu_phy_rate_pre = 0, ppdu_macid_pre = 0; -+ u8 page = phy_sts_byte0 & 0xf; -+ -+ if (!pkt_proc->physts_auto_swch_en) -+ return is_skip_physts_parsing; -+ -+ phy_ppdu_cnt_pre = pkt_proc->phy_ppdu_cnt; -+ mac_ppdu_cnt_pre = pkt_proc->mac_ppdu_cnt; -+ ppdu_phy_rate_pre = pkt_proc->ppdu_phy_rate; -+ ppdu_macid_pre = pkt_proc->ppdu_macid; -+ -+ pkt_proc->phy_ppdu_cnt = (phy_sts_byte0 & 0x30) >> 4; -+ pkt_proc->mac_ppdu_cnt = pktinfo->ppdu_cnt; -+ pkt_proc->ppdu_phy_rate = pktinfo->data_rate; -+ pkt_proc->ppdu_macid = pktinfo->station_id; -+ -+ PHYDM_DBG(dm, DBG_PHY_STATUS, -+ "[rate:0x%x] PPDU mac{pre, curr}= {%d, %d}, phy{pre, curr}= {%d, %d}\n", -+ pktinfo->data_rate, mac_ppdu_cnt_pre, pkt_proc->mac_ppdu_cnt, -+ phy_ppdu_cnt_pre, pkt_proc->phy_ppdu_cnt); -+ -+ if (pktinfo->data_rate < ODM_RATEMCS0) { -+ pkt_proc->page_bitmap_record = 0; -+ return is_skip_physts_parsing; -+ } -+ -+ if (ppdu_macid_pre == pkt_proc->ppdu_macid && -+ ppdu_phy_rate_pre == pkt_proc->ppdu_phy_rate && -+ phy_ppdu_cnt_pre == pkt_proc->phy_ppdu_cnt && -+ mac_ppdu_cnt_pre == pkt_proc->mac_ppdu_cnt) { -+ if (pkt_proc->page_bitmap_record & BIT(page)) { -+ /*@PHYDM_DBG(dm, DBG_PHY_STATUS, "collect page-%d enough\n", page);*/ -+ is_skip_physts_parsing = true; -+ } else if (pkt_proc->page_bitmap_record == -+ pkt_proc->page_bitmap_target) { -+ /*@PHYDM_DBG(dm, DBG_PHY_STATUS, "collect all enough\n");*/ -+ is_skip_physts_parsing = true; -+ } else { -+ /*@PHYDM_DBG(dm, DBG_PHY_STATUS, "update page-%d\n", page);*/ -+ pkt_proc->page_bitmap_record |= BIT(page); -+ } -+ pkt_proc->is_1st_mpdu = false; -+ } else { -+ /*@PHYDM_DBG(dm, DBG_PHY_STATUS, "[New Pkt] update page-%d\n", page);*/ -+ pkt_proc->page_bitmap_record = BIT(page); -+ pkt_proc->is_1st_mpdu = true; -+ } -+ -+ PHYDM_DBG(dm, DBG_PHY_STATUS, -+ "bitmap{record, target}= {0x%x, 0x%x}\n", -+ pkt_proc->page_bitmap_record, -+ pkt_proc->page_bitmap_target); -+ -+ return is_skip_physts_parsing; -+} -+ -+void phydm_physts_auto_switch_jgr3_set(void *dm_void, boolean enable, -+ u8 bitmap_en) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct pkt_process_info *pkt_proc = &dm->pkt_proc_struct; -+ u16 en_page_num = 1; -+ -+ if (!(dm->support_ic_type & PHYSTS_AUTO_SWITCH_IC)) -+ return; -+#if 0 -+ if (!(dm->support_ic_type & PHYSTS_3RD_TYPE_IC)) -+ return; -+#endif -+ pkt_proc->physts_auto_swch_en = enable; -+ pkt_proc->page_bitmap_target = bitmap_en; -+ phydm_physts_auto_switch_jgr3_reset(dm); -+ en_page_num = phydm_ones_num_in_bitmap((u64)bitmap_en, 8); -+ -+ PHYDM_DBG(dm, DBG_CMN, "[%s]en=%d, bitmap_en=%d, en_page_num=%d\n", -+ __func__, enable, bitmap_en, en_page_num); -+ -+ if (enable) { -+ /*@per MPDU latch & update phy-staatus*/ -+ odm_set_mac_reg(dm, R_0x60c, BIT(31), 1); -+ /*@Update Period (OFDM Symbol)*/ -+ odm_set_bb_reg(dm, R_0x8c0, 0xfc000, 3); -+ /*@switchin bitmap*/ -+ odm_set_bb_reg(dm, R_0x8c4, 0x7f80000, bitmap_en); -+ /*@mode 3*/ -+ odm_set_bb_reg(dm, R_0x8c4, (BIT(28) | BIT(27)), 3); -+ } else { -+ odm_set_mac_reg(dm, R_0x60c, BIT(31), 0); -+ odm_set_bb_reg(dm, R_0x8c0, 0xfc000, 0x1); -+ odm_set_bb_reg(dm, R_0x8c4, 0x7f80000, 0x2); -+ odm_set_bb_reg(dm, R_0x8c4, (BIT(28) | BIT(27)), 0); -+ } -+} -+ -+void phydm_avg_condi_num(void *dm_void, -+ struct phydm_phyinfo_struct *phy_info, -+ struct phydm_perpkt_info_struct *pktinfo) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info; -+ u16 size_th = PHY_HIST_SIZE - 1; /*size of threshold*/ -+ u16 val = 0, intvl = 0; -+ u8 arry_idx = 0; -+ -+ if (pktinfo->rate_ss == 1) -+ return; -+ -+ arry_idx = pktinfo->rate_ss - 1; -+ -+ dbg_s->p4_cnt[arry_idx]++; -+ dbg_s->cn_sum[arry_idx] += dbg_i->condition_num_seg0; -+ -+ /*CN Histogram*/ -+ val = (u16)dbg_i->condition_num_seg0; -+ intvl = phydm_find_intrvl(dm, val, dbg_i->cn_hist_th, size_th); -+ dbg_s->cn_hist[arry_idx][intvl]++; -+ -+ dbg_i->condi_num = (u32)dbg_i->condition_num_seg0; /*will remove*/ -+} -+#endif -+ -+void phydm_print_phystat_jgr3(struct dm_struct *dm, u8 *phy_sts, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ struct phy_sts_rpt_jgr3_type0 *rpt0 = NULL; -+ struct phy_sts_rpt_jgr3_type1 *rpt1 = NULL; -+ struct phy_sts_rpt_jgr3_type2_3 *rpt2 = NULL; -+ struct phy_sts_rpt_jgr3_type4 *rpt3 = NULL; -+ struct phy_sts_rpt_jgr3_type5 *rpt4 = NULL; -+ struct phy_sts_rpt_jgr3_type6 *rpt5 = NULL; -+ -+ struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; -+ u8 phy_status_page_num = (*phy_sts & 0xf); -+ u32 *phy_status_tmp = NULL; -+ u8 i = 0; -+ /*u32 size = PHY_STATUS_JRGUAR3_DW_LEN << 2;*/ -+ -+ if (!(dm->debug_components & DBG_PHY_STATUS)) -+ return; -+ -+ rpt0 = (struct phy_sts_rpt_jgr3_type0 *)phy_sts; -+ rpt1 = (struct phy_sts_rpt_jgr3_type1 *)phy_sts; -+ rpt2 = (struct phy_sts_rpt_jgr3_type2_3 *)phy_sts; -+ rpt3 = (struct phy_sts_rpt_jgr3_type4 *)phy_sts; -+ rpt4 = (struct phy_sts_rpt_jgr3_type5 *)phy_sts; -+ -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ rpt5 = (struct phy_sts_rpt_jgr3_type6 *)phy_sts; -+ -+ if (pktinfo->is_cck_rate) -+ phy_status_page_num = 0; -+ } -+ -+ phy_status_tmp = (u32 *)phy_sts; -+ -+ if (dbg->show_phy_sts_all_pkt == 0) { -+ if (!pktinfo->is_packet_match_bssid) -+ return; -+ } -+ -+ dbg->show_phy_sts_cnt++; -+ -+ if (dbg->show_phy_sts_max_cnt != SHOW_PHY_STATUS_UNLIMITED) { -+ if (dbg->show_phy_sts_cnt > dbg->show_phy_sts_max_cnt) -+ return; -+ } -+ -+ if (phy_status_page_num == 0) -+ pr_debug("Phy Status Rpt: CCK\n"); -+ else -+ pr_debug("Phy Status Rpt: OFDM_%d\n", phy_status_page_num); -+ -+ pr_debug("StaID=%d, RxRate = 0x%x match_bssid=%d, ppdu_cnt=%d\n", -+ pktinfo->station_id, pktinfo->data_rate, -+ pktinfo->is_packet_match_bssid, pktinfo->ppdu_cnt); -+ -+ for (i = 0; i < PHY_STATUS_JRGUAR3_DW_LEN; i++) -+ pr_debug("Offset[%d:%d] = 0x%x\n", -+ ((4 * i) + 3), (4 * i), phy_status_tmp[i]); -+ -+ if (phy_status_page_num == 0) { /* @CCK(default) */ -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ #if (RTL8723F_SUPPORT) -+ pr_debug("[0] Pop_idx=%d, Pkt_cnt=%d, Channel_msb=%d, AGC_table_path0=%d, TRSW_mux_keep=%d, HW_AntSW_occur_keep_cck=%d, Gnt_BT_keep_cnt=%d,Rssi_msb=%d\n", -+ rpt5->pop_idx, rpt5->pkt_cnt, -+ rpt5->channel_msb, rpt5->agc_table_a, -+ rpt5->trsw, rpt5->hw_antsw_occur_keep_cck, -+ rpt5->gnt_bt_keep_cck, rpt5->rssi_msb); -+ pr_debug("[4] Channel=%d, Antidx_CCK_keep=%d, Cck_mp_gain_idx_keep=%d\n", -+ rpt5->channel, rpt5->antidx_a, -+ rpt5->mp_gain_idx_a); -+ pr_debug("[8] Rssi=%d\n",rpt5->rssi); -+ pr_debug("[12] Avg_cfo=%d\n",rpt5->avg_cfo); -+ pr_debug("[16] Coarse_cfo=%d, Coarse_cfo_msb=%d, Avg_cfo_msb=%d, Evm_hdr=%d\n", -+ rpt5->coarse_cfo, rpt5->coarse_cfo_msb, -+ rpt5->avg_cfo_msb, rpt5->evm_hdr); -+ pr_debug("[20] Evm_pld=%d\n",rpt5->evm_pld); -+ #endif -+ } else { -+ pr_debug("[0] Pkt_cnt=%d, Channel_msb=%d, Pwdb_a=%d, Gain_a=%d, TRSW=%d, AGC_table_b=%d, AGC_table_c=%d,\n", -+ rpt0->pkt_cnt, rpt0->channel_msb, rpt0->pwdb_a, -+ rpt0->gain_a, rpt0->trsw, rpt0->agc_table_b, -+ rpt0->agc_table_c); -+ pr_debug("[4] Path_Sel_o=%d, Gnt_BT_keep_cnt=%d, HW_AntSW_occur_keep_cck=%d,\n Band=%d, Channel=%d, AGC_table_a=%d, l_RXSC=%d, AGC_table_d=%d\n", -+ rpt0->path_sel_o, rpt0->gnt_bt_keep_cck, -+ rpt0->hw_antsw_occur_keep_cck, rpt0->band, -+ rpt0->channel, rpt0->agc_table_a, rpt0->l_rxsc, -+ rpt0->agc_table_d); -+ pr_debug("[8] AntIdx={%d, %d, %d, %d}, Length=%d\n", -+ rpt0->antidx_d, rpt0->antidx_c, rpt0->antidx_b, -+ rpt0->antidx_a, rpt0->length); -+ pr_debug("[12] MF_off=%d, SQloss=%d, lockbit=%d, raterr=%d, rxrate=%d, lna_h_a=%d, CCK_BB_power_a=%d, lna_l_a=%d, vga_a=%d, sq=%d\n", -+ rpt0->mf_off, rpt0->sqloss, rpt0->lockbit, -+ rpt0->raterr, rpt0->rxrate, rpt0->lna_h_a, -+ rpt0->bb_power_a, rpt0->lna_l_a, rpt0->vga_a, -+ rpt0->signal_quality); -+ pr_debug("[16] Gain_b=%d, lna_h_b=%d, CCK_BB_power_b=%d, lna_l_b=%d, vga_b=%d, Pwdb_b=%d\n", -+ rpt0->gain_b, rpt0->lna_h_b, rpt0->bb_power_b, -+ rpt0->lna_l_b, rpt0->vga_b, rpt0->pwdb_b); -+ pr_debug("[20] Gain_c=%d, lna_h_c=%d, CCK_BB_power_c=%d, lna_l_c=%d, vga_c=%d, Pwdb_c=%d\n", -+ rpt0->gain_c, rpt0->lna_h_c, rpt0->bb_power_c, -+ rpt0->lna_l_c, rpt0->vga_c, rpt0->pwdb_c); -+ pr_debug("[24] Gain_d=%d, lna_h_d=%d, CCK_BB_power_d=%d, lna_l_d=%d, vga_d=%d, Pwdb_d=%d\n", -+ rpt0->gain_c, rpt0->lna_h_c, rpt0->bb_power_c, -+ rpt0->lna_l_c, rpt0->vga_c, rpt0->pwdb_c); -+ } -+ } else if (phy_status_page_num == 1) { -+ pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_pri_msb=%d, Pkt_cnt=%d,\n", -+ rpt1->pwdb_c, rpt1->pwdb_b, rpt1->pwdb_a, -+ rpt1->channel_pri_msb, rpt1->pkt_cnt); -+ pr_debug("[4] BF: %d, stbc=%d, ldpc=%d, gnt_bt=%d, band=%d, Ch_pri_lsb=%d, rxsc[ht, l]={%d, %d}, pwdb[D]=%d\n", -+ rpt1->beamformed, rpt1->stbc, rpt1->ldpc, rpt1->gnt_bt, -+ rpt1->band, rpt1->channel_pri_lsb, rpt1->ht_rxsc, -+ rpt1->l_rxsc, rpt1->pwdb_d); -+ pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, HW_AntSW_occur[D:A]={%d, %d, %d, %d}, Channel_sec[msb,lsb]={%d, %d}\n", -+ rpt1->antidx_d, rpt1->antidx_c, -+ rpt1->antidx_b, rpt1->antidx_a, -+ rpt1->hw_antsw_occur_d, rpt1->hw_antsw_occur_c, -+ rpt1->hw_antsw_occur_b, rpt1->hw_antsw_occur_a, -+ rpt1->channel_sec_msb, rpt1->channel_sec_lsb); -+ pr_debug("[12] GID=%d, PAID[msb,lsb]={%d,%d}\n", -+ rpt1->gid, rpt1->paid_msb, rpt1->paid); -+ pr_debug("[16] RX_EVM[D:A]={%d, %d, %d, %d}\n", -+ rpt1->rxevm[3], rpt1->rxevm[2], -+ rpt1->rxevm[1], rpt1->rxevm[0]); -+ pr_debug("[20] CFO_tail[D:A]={%d, %d, %d, %d}\n", -+ rpt1->cfo_tail[3], rpt1->cfo_tail[2], -+ rpt1->cfo_tail[1], rpt1->cfo_tail[0]); -+ pr_debug("[24] RX_SNR[D:A]={%d, %d, %d, %d}\n\n", -+ rpt1->rxsnr[3], rpt1->rxsnr[2], -+ rpt1->rxsnr[1], rpt1->rxsnr[0]); -+ } else if (phy_status_page_num == 2 || phy_status_page_num == 3) { -+ pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_mdb=%d, Pkt_cnt=%d\n", -+ rpt2->pwdb[2], rpt2->pwdb[1], rpt2->pwdb[0], -+ rpt2->channel_msb, rpt2->pkt_cnt); -+ pr_debug("[4] BF=%d, STBC=%d, LDPC=%d, Gnt_BT=%d, band=%d, CH_lsb=%d, rxsc[ht, l]={%d, %d}, pwdb_D=%d\n", -+ rpt2->beamformed, rpt2->stbc, rpt2->ldpc, rpt2->gnt_bt, -+ rpt2->band, rpt2->channel_lsb, -+ rpt2->ht_rxsc, rpt2->l_rxsc, rpt2->pwdb[3]); -+ pr_debug("[8] AgcTab[D:A]={%d, %d, %d, %d}, pwed_th=%d, shift_l_map=%d\n", -+ rpt2->agc_table_d, rpt2->agc_table_c, -+ rpt2->agc_table_b, rpt2->agc_table_a, -+ rpt2->pwed_th, rpt2->shift_l_map); -+ pr_debug("[12] AvgNoisePowerdB=%d, mp_gain_c[msb, lsb]={%d, %d}, mp_gain_b[msb, lsb]={%d, %d}, mp_gain_a=%d, cnt_cca2agc_rdy=%d\n", -+ rpt2->avg_noise_pwr_lsb, rpt2->mp_gain_c_msb, -+ rpt2->mp_gain_c_lsb, rpt2->mp_gain_b_msb, -+ rpt2->mp_gain_b_lsb, rpt2->mp_gain_a, -+ rpt2->cnt_cca2agc_rdy); -+ pr_debug("[16] HT AAGC gain[B:A]={%d, %d}, AAGC step[D:A]={%d, %d, %d, %d}, IsFreqSelectFadimg=%d, mp_gain_d=%d\n", -+ rpt2->ht_aagc_gain[1], rpt2->ht_aagc_gain[0], -+ rpt2->aagc_step_d, rpt2->aagc_step_c, -+ rpt2->aagc_step_b, rpt2->aagc_step_a, -+ rpt2->is_freq_select_fading, rpt2->mp_gain_d); -+ pr_debug("[20] DAGC gain ant[B:A]={%d, %d}, HT AAGC gain[D:C]={%d, %d}\n", -+ rpt2->dagc_gain[1], rpt2->dagc_gain[0], -+ rpt2->ht_aagc_gain[3], rpt2->ht_aagc_gain[2]); -+ pr_debug("[24] AvgNoisePwerdB=%d, syn_count[msb, lsb]={%d, %d}, counter=%d, DAGC gain ant[D:C]={%d, %d}\n", -+ rpt2->avg_noise_pwr_msb, rpt2->syn_count_msb, -+ rpt2->syn_count_lsb, rpt2->counter, -+ rpt2->dagc_gain[3], rpt2->dagc_gain[2]); -+ } else if (phy_status_page_num == 4) { /*type 4*/ -+ pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_mdb=%d, Pkt_cnt=%d\n", -+ rpt3->pwdb[2], rpt3->pwdb[1], rpt3->pwdb[0], -+ rpt3->channel_msb, rpt3->pkt_cnt); -+ pr_debug("[4] BF=%d, STBC=%d, LDPC=%d, GNT_BT=%d, band=%d, CH_pri=%d, rxsc[ht, l]={%d, %d}, pwdb_D=%d\n", -+ rpt3->beamformed, rpt3->stbc, rpt3->ldpc, rpt3->gnt_bt, -+ rpt3->band, rpt3->channel_lsb, rpt3->ht_rxsc, -+ rpt3->l_rxsc, rpt3->pwdb[3]); -+ pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, HW_AntSW_occur[D:A]={%d, %d, %d, %d}, Training_done[D:A]={%d, %d, %d, %d},\n BadToneCnt_CN_excess_0=%d, BadToneCnt_min_eign_0=%d\n", -+ rpt3->antidx_d, rpt3->antidx_c, -+ rpt3->antidx_b, rpt3->antidx_a, -+ rpt3->hw_antsw_occur_d, rpt3->hw_antsw_occur_c, -+ rpt3->hw_antsw_occur_b, rpt3->hw_antsw_occur_a, -+ rpt3->training_done_d, rpt3->training_done_c, -+ rpt3->training_done_b, rpt3->training_done_a, -+ rpt3->bad_tone_cnt_cn_excess_0, -+ rpt3->bad_tone_cnt_min_eign_0); -+ pr_debug("[12] avg_cond_num_1=%d, avg_cond_num_0=%d, bad_tone_cnt_cn_excess_1=%d,\n bad_tone_cnt_min_eign_1=%d, Tx_pkt_cnt=%d\n", -+ ((rpt3->avg_cond_num_1_msb << 1) | -+ rpt3->avg_cond_num_1_lsb), -+ rpt3->avg_cond_num_0, rpt3->bad_tone_cnt_cn_excess_1, -+ rpt3->bad_tone_cnt_min_eign_1, rpt3->tx_pkt_cnt); -+ pr_debug("[16] Stream RXEVM[D:A]={%d, %d, %d, %d}\n", -+ rpt3->rxevm[3], rpt3->rxevm[2], -+ rpt3->rxevm[1], rpt3->rxevm[0]); -+ pr_debug("[20] Eigenvalue[D:A]={%d, %d, %d, %d}\n", -+ rpt3->eigenvalue[3], rpt3->eigenvalue[2], -+ rpt3->eigenvalue[1], rpt3->eigenvalue[0]); -+ pr_debug("[24] RX SNR[D:A]={%d, %d, %d, %d}\n", -+ rpt3->rxsnr[3], rpt3->rxsnr[2], -+ rpt3->rxsnr[1], rpt3->rxsnr[0]); -+ } else if (phy_status_page_num == 5) { /*type 5*/ -+ pr_debug("[0] pwdb[C:A]={%d, %d, %d}, Channel_mdb=%d, Pkt_cnt=%d\n", -+ rpt4->pwdb[2], rpt4->pwdb[1], rpt4->pwdb[0], -+ rpt4->channel_msb, rpt4->pkt_cnt); -+ pr_debug("[4] BF=%d, STBC=%d, LDPC=%d, GNT_BT=%d, band=%d, CH_pri=%d, rxsc[ht, l]={%d, %d}, pwdb_D=%d\n", -+ rpt4->beamformed, rpt4->stbc, rpt4->ldpc, rpt4->gnt_bt, -+ rpt4->band, rpt4->channel_lsb, rpt4->ht_rxsc, -+ rpt4->l_rxsc, rpt4->pwdb[3]); -+ pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, HW_AntSW_occur[D:A]={%d, %d, %d, %d}\n", -+ rpt4->antidx_d, rpt4->antidx_c, -+ rpt4->antidx_b, rpt4->antidx_a, -+ rpt4->hw_antsw_occur_d, rpt4->hw_antsw_occur_c, -+ rpt4->hw_antsw_occur_b, rpt4->hw_antsw_occur_a); -+ pr_debug("[12] Inf_posD[1,0]={%d, %d}, Inf_posC[1,0]={%d, %d}, Inf_posB[1,0]={%d, %d}, Inf_posA[1,0]={%d, %d}, Tx_pkt_cnt=%d\n", -+ rpt4->inf_pos_1_D_flg, rpt4->inf_pos_0_D_flg, -+ rpt4->inf_pos_1_C_flg, rpt4->inf_pos_0_C_flg, -+ rpt4->inf_pos_1_B_flg, rpt4->inf_pos_0_B_flg, -+ rpt4->inf_pos_1_A_flg, rpt4->inf_pos_0_A_flg, -+ rpt4->tx_pkt_cnt); -+ pr_debug("[16] Inf_pos_B[1,0]={%d, %d}, Inf_pos_A[1,0]={%d, %d}\n", -+ rpt4->inf_pos_1_b, rpt4->inf_pos_0_b, -+ rpt4->inf_pos_1_a, rpt4->inf_pos_0_a); -+ pr_debug("[20] Inf_pos_D[1,0]={%d, %d}, Inf_pos_C[1,0]={%d, %d}\n", -+ rpt4->inf_pos_1_d, rpt4->inf_pos_0_d, -+ rpt4->inf_pos_1_c, rpt4->inf_pos_0_c); -+ } -+} -+ -+void phydm_reset_phy_info_jgr3(struct dm_struct *phydm, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ u8 i; -+ -+ phy_info->rx_pwdb_all = 0; -+ phy_info->signal_quality = 0; -+ phy_info->band_width = 0; -+ phy_info->rx_count = 0; -+ phy_info->rx_power = -110; -+ phy_info->recv_signal_power = -110; -+ phy_info->bt_rx_rssi_percentage = 0; -+ phy_info->signal_strength = 0; -+ phy_info->channel = 0; -+ phy_info->is_mu_packet = 0; -+ phy_info->is_beamformed = 0; -+ phy_info->rxsc = 0; -+ -+ for (i = 0; i < 4; i++) { -+ phy_info->rx_mimo_signal_strength[i] = 0; -+ phy_info->rx_mimo_signal_quality[i] = 0; -+ phy_info->rx_mimo_evm_dbm[i] = 0; -+ phy_info->cfo_short[i] = 0; -+ phy_info->cfo_tail[i] = 0; -+ phy_info->rx_pwr[i] = -110; -+ phy_info->rx_snr[i] = 0; -+ } -+} -+ -+#if 0 -+void phydm_per_path_info_3rd(u8 rx_path, s8 pwr, s8 rx_evm, s8 cfo_tail, -+ s8 rx_snr, struct phydm_phyinfo_struct *phy_info) -+{ -+ u8 evm_dbm = 0; -+ u8 evm_percentage = 0; -+ -+ /* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */ -+ -+ evm_dbm = (rx_evm == -128) ? 0 : ((u8)(0 - rx_evm) >> 1); -+ evm_percentage = (evm_dbm >= 34) ? 100 : evm_dbm * 3; -+ -+ phy_info->rx_pwr[rx_path] = pwr; -+ -+ /*@CFO(kHz) = CFO_tail * 312.5(kHz) / 2^7 ~= CFO tail * 5/2 (kHz)*/ -+ phy_info->cfo_tail[rx_path] = (cfo_tail * 5) >> 1; -+ phy_info->rx_mimo_evm_dbm[rx_path] = evm_dbm; -+ phy_info->rx_mimo_signal_strength[rx_path] = phydm_pw_2_percent(pwr); -+ phy_info->rx_mimo_signal_quality[rx_path] = evm_percentage; -+ phy_info->rx_snr[rx_path] = rx_snr >> 1; -+} -+ -+void phydm_common_phy_info_jgr3(s8 rx_power, u8 channel, boolean is_beamformed, -+ boolean is_mu_packet, u8 bandwidth, -+ u8 signal_quality, u8 rxsc, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ phy_info->rx_power = rx_power; /* RSSI in dB */ -+ phy_info->recv_signal_power = rx_power; /* RSSI in dB */ -+ phy_info->channel = channel; /* @channel number */ -+ phy_info->is_beamformed = is_beamformed; /* @apply BF */ -+ phy_info->is_mu_packet = is_mu_packet; /* @MU packet */ -+ phy_info->rxsc = rxsc; -+ -+ phy_info->rx_pwdb_all = phydm_pw_2_percent(rx_power); /*percentage */ -+ phy_info->signal_quality = signal_quality; /* signal quality */ -+ phy_info->band_width = bandwidth; /* @bandwidth */ -+} -+#endif -+ -+void phydm_get_physts_0_jgr3(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ /* type 0 is used for cck packet */ -+ struct phy_sts_rpt_jgr3_type0 *phy_sts = NULL; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ u8 sq = 0, i, rx_cnt = 0; -+ s8 rx_power[4], pwdb; -+ s8 rx_pwr_db_max = -120; -+ -+ phy_sts = (struct phy_sts_rpt_jgr3_type0 *)phy_status_inf; -+ -+ #if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197G) { -+ if (dm->rx_ant_status == BB_PATH_B) { -+ phy_sts->pwdb_b = phy_sts->pwdb_a; -+ phy_sts->gain_b = phy_sts->gain_a; -+ phy_sts->pwdb_a = 0; -+ phy_sts->gain_a = 0; -+ } -+ } -+ #endif -+ -+ rx_power[0] = phy_sts->pwdb_a; -+ rx_power[1] = phy_sts->pwdb_b; -+ rx_power[2] = phy_sts->pwdb_c; -+ rx_power[3] = phy_sts->pwdb_d; -+ -+ #if (RTL8822C_SUPPORT || RTL8197G_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8197G)) { -+ struct phydm_physts *physts_table = &dm->dm_physts_table; -+ if (phy_sts->gain_a < physts_table->cck_gi_l_bnd) -+ rx_power[0] += ((physts_table->cck_gi_l_bnd - -+ phy_sts->gain_a) << 1); -+ else if (phy_sts->gain_a > physts_table->cck_gi_u_bnd) -+ rx_power[0] -= ((phy_sts->gain_a - -+ physts_table->cck_gi_u_bnd) << 1); -+ -+ if (phy_sts->gain_b < physts_table->cck_gi_l_bnd) -+ rx_power[1] += ((physts_table->cck_gi_l_bnd - -+ phy_sts->gain_b) << 1); -+ else if (phy_sts->gain_b > physts_table->cck_gi_u_bnd) -+ rx_power[1] -= ((phy_sts->gain_b - -+ physts_table->cck_gi_u_bnd) << 1); -+ } -+ #endif -+ -+ /* @Update per-path information */ -+ for (i = RF_PATH_A; i < dm->num_rf_path; i++) { -+ if ((dm->rx_ant_status & BIT(i)) == 0) -+ continue; -+ -+ rx_cnt++; /* @check the number of the ant */ -+ -+ if (rx_cnt > dm->num_rf_path) -+ break; -+ -+ if (pktinfo->is_to_self) -+ dm->ofdm_agc_idx[i] = rx_power[i]; -+ -+ /* @Setting the RX power: agc_idx -110 dBm*/ -+ pwdb = rx_power[i] - 110; -+ -+ phy_info->rx_pwr[i] = pwdb; -+ phy_info->rx_mimo_signal_strength[i] = phydm_pw_2_percent(pwdb); -+ -+ /* search maximum pwdb */ -+ if (pwdb > rx_pwr_db_max) -+ rx_pwr_db_max = pwdb; -+ } -+ -+ /* @Calculate Signal Quality*/ -+ if (phy_sts->signal_quality >= 64) { -+ sq = 0; -+ } else if (phy_sts->signal_quality <= 20) { -+ sq = 100; -+ } else { -+ /* @mapping to 2~99% */ -+ sq = 64 - phy_sts->signal_quality; -+ sq = ((sq << 3) + sq) >> 2; -+ } -+ -+ /* @Modify CCK PWDB if old AGC */ -+ if (!dm->cck_new_agc) { -+ u8 lna_idx[4], vga_idx[4]; -+ -+ lna_idx[0] = ((phy_sts->lna_h_a << 3) | phy_sts->lna_l_a); -+ vga_idx[0] = phy_sts->vga_a; -+ lna_idx[1] = ((phy_sts->lna_h_b << 3) | phy_sts->lna_l_b); -+ vga_idx[1] = phy_sts->vga_b; -+ lna_idx[2] = ((phy_sts->lna_h_c << 3) | phy_sts->lna_l_c); -+ vga_idx[2] = phy_sts->vga_c; -+ lna_idx[3] = ((phy_sts->lna_h_d << 3) | phy_sts->lna_l_d); -+ vga_idx[3] = phy_sts->vga_d; -+ } -+ -+ /*@CCK no STBC and LDPC*/ -+ dbg_i->is_ldpc_pkt = false; -+ dbg_i->is_stbc_pkt = false; -+ -+ /*cck channel has hw bug, [WLANBB-1429]*/ -+ phy_info->channel = 0; -+ phy_info->rx_power = rx_pwr_db_max; -+ phy_info->recv_signal_power = rx_pwr_db_max; -+ phy_info->is_beamformed = false; -+ phy_info->is_mu_packet = false; -+ phy_info->rxsc = phy_sts->l_rxsc; -+ phy_info->rx_pwdb_all = phydm_pw_2_percent(rx_pwr_db_max); -+ phy_info->signal_quality = sq; -+ phy_info->band_width = CHANNEL_WIDTH_20; -+ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a; -+ dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b; -+ dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c; -+ dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d; -+ #endif -+} -+ -+void phydm_get_physts_1_others_jgr3(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ struct phy_sts_rpt_jgr3_type1 *phy_sts = NULL; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ s8 evm = 0; -+ u8 i; -+ s8 sq = 0; -+ -+ phy_sts = (struct phy_sts_rpt_jgr3_type1 *)phy_status_inf; -+ -+ /* SNR: S(8,1), EVM: S(8,1), CFO: S(8,7) */ -+ -+ for (i = RF_PATH_A; i < dm->num_rf_path; i++) { -+ if ((dm->rx_ant_status & BIT(i)) == 0) -+ continue; -+ -+ evm = phy_sts->rxevm[i]; -+ evm = (evm == -128) ? 0 : ((0 - evm) >> 1); -+ sq = (evm >= 34) ? 100 : evm * 3; /* @Convert EVM to 0~100%*/ -+ -+ phy_info->rx_mimo_evm_dbm[i] = (u8)evm; -+ phy_info->rx_mimo_signal_quality[i] = sq; -+ phy_info->rx_snr[i] = phy_sts->rxsnr[i] >> 1; -+ /*@CFO(kHz) = CFO_tail*312.5(kHz)/2^7 ~= CFO tail * 5/2 (kHz)*/ -+ phy_info->cfo_tail[i] = (phy_sts->cfo_tail[i] * 5) >> 1; -+ dbg_i->cfo_tail[i] = (phy_sts->cfo_tail[i] * 5) >> 1; -+ } -+ phy_info->signal_quality = phy_info->rx_mimo_signal_quality[0]; -+ -+ if (phy_sts->gid != 0 && phy_sts->gid != 63) { -+ phy_info->is_mu_packet = true; -+ dbg_i->num_qry_mu_pkt++; -+ } else { -+ phy_info->is_mu_packet = false; -+ } -+ -+ phydm_parsing_cfo(dm, pktinfo, phy_sts->cfo_tail, pktinfo->rate_ss); -+ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a; -+ dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b; -+ dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c; -+ dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d; -+#endif -+} -+ -+void phydm_get_physts_2_others_jgr3(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ /* type 2 & 3 is used for ofdm packet */ -+ struct phy_sts_rpt_jgr3_type2_3 *phy_sts = NULL; -+} -+ -+void phydm_get_physts_4_others_jgr3(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ struct phy_sts_rpt_jgr3_type4 *phy_sts = NULL; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ s8 evm = 0; -+ u8 i; -+ s8 sq = 0; -+ -+ phy_sts = (struct phy_sts_rpt_jgr3_type4 *)phy_status_inf; -+ -+ /* SNR: S(8,1), EVM: S(8,1), CFO: S(8,7) */ -+ -+ for (i = RF_PATH_A; i < dm->num_rf_path; i++) { -+ if ((dm->rx_ant_status & BIT(i)) == 0) -+ continue; -+ -+ evm = phy_sts->rxevm[i]; -+ evm = (evm == -128) ? 0 : ((0 - evm) >> 1); -+ sq = (evm >= 34) ? 100 : evm * 3; /* @Convert EVM to 0~100%*/ -+ -+ phy_info->rx_mimo_evm_dbm[i] = (u8)evm; -+ phy_info->rx_mimo_signal_quality[i] = sq; -+ phy_info->rx_snr[i] = phy_sts->rxsnr[i] >> 1; -+ } -+ phy_info->signal_quality = phy_info->rx_mimo_signal_quality[0]; -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a; -+ dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b; -+ dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c; -+ dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d; -+#endif -+ odm_move_memory(dm, dbg_i->eigen_val, phy_sts->eigenvalue, 4); -+ dbg_i->condition_num_seg0 = phy_sts->avg_cond_num_0; -+} -+ -+void phydm_get_physts_5_others_jgr3(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ struct phy_sts_rpt_jgr3_type5 *phy_sts = NULL; -+ -+} -+#if (RTL8723F_SUPPORT) -+void phydm_get_physts_6_jgr3(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ /* type 0 is used for cck packet */ -+ struct phy_sts_rpt_jgr3_type6 *phy_sts = NULL; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ u8 sq = 0, i, rx_cnt = 0; -+ s8 rx_power[4], pwdb; -+ s8 rx_pwr_db_max = -120; -+ u8 evm = 0; -+ phy_sts = (struct phy_sts_rpt_jgr3_type6 *)phy_status_inf; -+ /* judy_add_8723F_0512 */ -+ /* rssi S(11,3) */ -+ rx_power[0] = (s8)((phy_sts->rssi_msb << 5) + (phy_sts->rssi >> 3)); -+ /* @Update per-path information */ -+ for (i = RF_PATH_A; i < dm->num_rf_path; i++) { -+ if ((dm->rx_ant_status & BIT(i)) == 0) -+ continue; -+ -+ rx_cnt++; /* @check the number of the ant */ -+ -+ if (rx_cnt > dm->num_rf_path) -+ break; -+ -+ if (pktinfo->is_to_self) -+ dm->ofdm_agc_idx[i] = rx_power[i]+110; -+ -+ /* @Setting the RX power: agc_idx dBm*/ -+ pwdb = rx_power[i]; -+ -+ phy_info->rx_pwr[i] = pwdb; -+ phy_info->rx_mimo_signal_strength[i] = phydm_pw_2_percent(pwdb); -+ -+ /* search maximum pwdb */ -+ if (pwdb > rx_pwr_db_max) -+ rx_pwr_db_max = pwdb; -+ } -+ -+ /* @Calculate EVM U(8,2)*/ -+ evm = phy_sts->evm_pld >> 2; -+ if (pktinfo->data_rate > ODM_RATE2M) -+ phy_info->rx_cck_evm = (u8)(evm - 10);/* @5_5M/11M*/ -+ else -+ phy_info->rx_cck_evm = (u8)(evm - 12);/* @1M/2M*/ -+ -+ sq = (phy_info->rx_cck_evm >= 34) ? 100 : phy_info->rx_cck_evm * 3; -+ phy_info->signal_quality = sq; -+ /*@CCK no STBC and LDPC*/ -+ dbg_i->is_ldpc_pkt = false; -+ dbg_i->is_stbc_pkt = false; -+ -+ /*cck channel has hw bug, [WLANBB-1429]*/ -+ phy_info->channel = 0; -+ phy_info->rx_power = rx_pwr_db_max; -+ phy_info->recv_signal_power = rx_pwr_db_max; -+ phy_info->is_beamformed = false; -+ phy_info->is_mu_packet = false; -+ phy_info->rx_pwdb_all = phydm_pw_2_percent(rx_pwr_db_max); -+ phy_info->band_width = CHANNEL_WIDTH_20; -+ -+ //phydm_parsing_cfo(dm, pktinfo, phy_sts->avg_cfo, pktinfo->rate_ss); -+ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a; -+ dm->dm_fat_table.antsel_rx_keep_1 = 0; -+ dm->dm_fat_table.antsel_rx_keep_2 = 0; -+ dm->dm_fat_table.antsel_rx_keep_3 = 0; -+ #endif -+} -+#endif -+void phydm_get_physts_ofdm_cmn_jgr3(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ struct phy_sts_rpt_jgr3_ofdm_cmn *phy_sts = NULL; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ s8 rx_pwr_db_max = -120; -+ s8 pwdb = 0; -+ u8 i, rx_cnt = 0; -+ -+ phy_sts = (struct phy_sts_rpt_jgr3_ofdm_cmn *)phy_status_inf; -+ -+ /* Parsing Offset0 & 4*/ -+ for (i = RF_PATH_A; i < dm->num_rf_path; i++) { -+ if ((dm->rx_ant_status & BIT(i)) == 0) -+ continue; -+ -+ rx_cnt++; /* @check the number of the ant */ -+ -+ pwdb = (s8)phy_sts->pwdb[i] - 110; /*@dB*/ -+ -+ if (pktinfo->is_to_self) -+ dm->ofdm_agc_idx[i] = phy_sts->pwdb[i]; -+ -+ /* search maximum pwdb */ -+ if (pwdb > rx_pwr_db_max) -+ rx_pwr_db_max = pwdb; -+ -+ phy_info->rx_pwr[i] = pwdb; -+ phy_info->rx_mimo_signal_strength[i] = phydm_pw_2_percent(pwdb); -+ } -+ -+ phy_info->rx_count = (rx_cnt > 0) ? rx_cnt - 1 : 0; /*from 1~4 to 0~3 */ -+ phy_info->rx_power = rx_pwr_db_max; -+ phy_info->rx_pwdb_all = phydm_pw_2_percent(rx_pwr_db_max); -+ phy_info->recv_signal_power = rx_pwr_db_max; -+ phy_info->channel = phy_sts->channel_lsb; -+ phy_info->is_beamformed = (boolean)phy_sts->beamformed; -+ phy_info->rxsc = (PHYDM_IS_LEGACY_RATE(pktinfo->data_rate)) ? -+ phy_sts->l_rxsc : phy_sts->ht_rxsc; -+ phy_info->band_width = phydm_rxsc_2_bw(dm, phy_info->rxsc); -+ -+ dbg_i->is_ldpc_pkt = phy_sts->ldpc; -+ dbg_i->is_stbc_pkt = phy_sts->stbc; -+ dbg_i->num_qry_bf_pkt += phy_sts->beamformed; -+} -+ -+void phydm_process_dm_rssi_jgr3(struct dm_struct *dm, -+ struct phydm_phyinfo_struct *phy_info, -+ struct phydm_perpkt_info_struct *pktinfo) -+{ -+ struct cmn_sta_info *sta = NULL; -+ struct rssi_info *rssi_t = NULL; -+ u8 rssi_tmp = 0; -+ u64 rssi_linear = 0; -+ s16 rssi_db = 0; -+ u8 i = 0; -+ u8 rx_count = 0; -+ -+ #if (defined(PHYDM_CCK_RX_PATHDIV_SUPPORT)) -+ struct phydm_cck_rx_pathdiv *cckrx_t = &dm->dm_cck_rx_pathdiv_table; -+ #endif -+ -+ /*@[Step4]*/ -+ if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM) -+ return; -+ -+ sta = dm->phydm_sta_info[pktinfo->station_id]; -+ -+ if (!is_sta_active(sta)) -+ return; -+ -+ if (!pktinfo->is_packet_match_bssid) /*@data frame only*/ -+ return; -+ -+ if (!(pktinfo->is_packet_to_self) && !(pktinfo->is_packet_beacon)) -+ return; -+ -+ if (pktinfo->is_packet_beacon) { -+ dm->phy_dbg_info.num_qry_beacon_pkt++; -+ dm->phy_dbg_info.beacon_phy_rate = pktinfo->data_rate; -+ } -+ -+ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ if (dm->support_ability & ODM_BB_ANT_DIV) -+ odm_process_rssi_for_ant_div(dm, phy_info, pktinfo); -+ #endif -+ -+ #ifdef ODM_EVM_ENHANCE_ANTDIV -+ phydm_rx_rate_for_antdiv(dm, pktinfo); -+ #endif -+ -+ #if (defined(CONFIG_PATH_DIVERSITY)) -+ if (dm->support_ability & ODM_BB_PATH_DIV) -+ phydm_process_rssi_for_path_div(dm, phy_info, pktinfo); -+ #endif -+ -+ #if (defined(PHYDM_CCK_RX_PATHDIV_SUPPORT)) -+ if (cckrx_t->en_cck_rx_pathdiv) -+ phydm_process_rssi_for_cck_rx_pathdiv(dm, phy_info, pktinfo); -+ #endif -+ -+ rssi_t = &sta->rssi_stat; -+ -+ for (i = 0; i < dm->num_rf_path; i++) { -+ rssi_tmp = phy_info->rx_mimo_signal_strength[i]; -+ if (rssi_tmp != 0) { -+ rx_count++; -+ rssi_linear += phydm_db_2_linear(rssi_tmp); -+ } -+ } -+ /* @Rounding and removing fractional bits */ -+ rssi_linear = (rssi_linear + (1 << (FRAC_BITS - 1))) >> FRAC_BITS; -+ -+ switch (rx_count) { -+ case 2: -+ rssi_linear = DIVIDED_2(rssi_linear); -+ break; -+ case 3: -+ rssi_linear = DIVIDED_3(rssi_linear); -+ break; -+ case 4: -+ rssi_linear = DIVIDED_4(rssi_linear); -+ break; -+ } -+ -+ rssi_db = (s16)odm_convert_to_db(rssi_linear); -+ -+ if (rssi_t->rssi_acc == 0) { -+ rssi_t->rssi_acc = (s16)(rssi_db << RSSI_MA); -+ rssi_t->rssi = (s8)(rssi_db); -+ } else { -+ rssi_t->rssi_acc = MA_ACC(rssi_t->rssi_acc, rssi_db, RSSI_MA); -+ rssi_t->rssi = (s8)GET_MA_VAL(rssi_t->rssi_acc, RSSI_MA); -+ } -+ -+ if (pktinfo->is_cck_rate) -+ rssi_t->rssi_cck = (s8)rssi_db; -+ else -+ rssi_t->rssi_ofdm = (s8)rssi_db; -+} -+ -+void phydm_rx_physts_jgr3(void *dm_void, u8 *phy_sts, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 phy_status_type = (*phy_sts & 0xf); -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ if (pktinfo->data_rate <= ODM_RATE11M) -+ phy_status_type = 6; -+ } -+ /*@[Step 2]*/ -+ /*phydm_reset_phy_info_jgr3(dm, phy_info);*/ /* @Memory reset */ -+ -+ /* Phy status parsing */ -+ switch (phy_status_type) { -+ case 0: /*@CCK*/ -+ phydm_get_physts_0_jgr3(dm, phy_sts, pktinfo, phy_info); -+ break; -+ case 1: -+ phydm_get_physts_ofdm_cmn_jgr3(dm, phy_sts, pktinfo, phy_info); -+ phydm_get_physts_1_others_jgr3(dm, phy_sts, pktinfo, phy_info); -+ break; -+ case 2: -+ case 3: -+ phydm_get_physts_ofdm_cmn_jgr3(dm, phy_sts, pktinfo, phy_info); -+ phydm_get_physts_2_others_jgr3(dm, phy_sts, pktinfo, phy_info); -+ break; -+ case 4: -+ phydm_get_physts_ofdm_cmn_jgr3(dm, phy_sts, pktinfo, phy_info); -+ phydm_get_physts_4_others_jgr3(dm, phy_sts, pktinfo, phy_info); -+ break; -+ case 5: -+ phydm_get_physts_ofdm_cmn_jgr3(dm, phy_sts, pktinfo, phy_info); -+ phydm_get_physts_5_others_jgr3(dm, phy_sts, pktinfo, phy_info); -+ break; -+#if (RTL8723F_SUPPORT) -+ case 6: -+ phydm_get_physts_6_jgr3(dm, phy_sts, pktinfo, phy_info); -+ break; -+#endif -+ default: -+ break; -+ } -+ -+#if 0 -+ PHYDM_DBG(dm, DBG_PHY_STATUS, "RSSI: {%d, %d}\n", -+ phy_info->rx_mimo_signal_strength[0], -+ phy_info->rx_mimo_signal_strength[1]); -+ PHYDM_DBG(dm, DBG_PHY_STATUS, "rxdb: {%d, %d}\n", -+ phy_info->rx_pwr[0], phy_info->rx_pwr[1]); -+ PHYDM_DBG(dm, DBG_PHY_STATUS, "EVM: {%d, %d}\n", -+ phy_info->rx_mimo_evm_dbm[0], phy_info->rx_mimo_evm_dbm[1]); -+ PHYDM_DBG(dm, DBG_PHY_STATUS, "SQ: {%d, %d}\n", -+ phy_info->rx_mimo_signal_quality[0], -+ phy_info->rx_mimo_signal_quality[1]); -+ PHYDM_DBG(dm, DBG_PHY_STATUS, "SNR: {%d, %d}\n", -+ phy_info->rx_snr[0], phy_info->rx_snr[1]); -+ PHYDM_DBG(dm, DBG_PHY_STATUS, "CFO: {%d, %d}\n", -+ phy_info->cfo_tail[0], phy_info->cfo_tail[1]); -+ PHYDM_DBG(dm, DBG_PHY_STATUS, -+ "rx_pwdb_all = %d, rx_power = %d, recv_signal_power = %d\n", -+ phy_info->rx_pwdb_all, phy_info->rx_power, -+ phy_info->recv_signal_power); -+ PHYDM_DBG(dm, DBG_PHY_STATUS, "signal_quality = %d\n", -+ phy_info->signal_quality); -+ PHYDM_DBG(dm, DBG_PHY_STATUS, -+ "is_beamformed = %d, is_mu_packet = %d, rx_count = %d\n", -+ phy_info->is_beamformed, phy_info->is_mu_packet, -+ phy_info->rx_count); -+ PHYDM_DBG(dm, DBG_PHY_STATUS, -+ "channel = %d, rxsc = %d, band_width = %d\n", -+ phy_info->channel, phy_info->rxsc, phy_info->band_width); -+#endif -+ -+ /*@[Step 1]*/ -+ phydm_print_phystat_jgr3(dm, phy_sts, pktinfo, phy_info); -+} -+ -+#endif -+ -+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) -+/* @For 8822B only!! need to move to FW finally */ -+/*@==============================================*/ -+ -+boolean -+phydm_query_is_mu_api(struct dm_struct *phydm, u8 ppdu_idx, u8 *p_data_rate, -+ u8 *p_gid) -+{ -+ u8 data_rate = 0, gid = 0; -+ boolean is_mu = false; -+ -+ data_rate = phydm->phy_dbg_info.num_of_ppdu[ppdu_idx]; -+ gid = phydm->phy_dbg_info.gid_num[ppdu_idx]; -+ -+ if (data_rate & BIT(7)) { -+ is_mu = true; -+ data_rate = data_rate & ~(BIT(7)); -+ } else { -+ is_mu = false; -+ } -+ -+ *p_data_rate = data_rate; -+ *p_gid = gid; -+ -+ return is_mu; -+} -+ -+void phydm_print_phy_sts_jgr2(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ struct phy_sts_rpt_jgr2_type0 *rpt0 = NULL; -+ struct phy_sts_rpt_jgr2_type1 *rpt = NULL; -+ struct phy_sts_rpt_jgr2_type2 *rpt2 = NULL; -+ struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; -+ u8 phy_status_page_num = (*phy_status_inf & 0xf); -+ u32 phy_status[PHY_STATUS_JRGUAR2_DW_LEN] = {0}; -+ u8 i; -+ u32 size = PHY_STATUS_JRGUAR2_DW_LEN << 2; -+ -+ rpt0 = (struct phy_sts_rpt_jgr2_type0 *)phy_status_inf; -+ rpt = (struct phy_sts_rpt_jgr2_type1 *)phy_status_inf; -+ rpt2 = (struct phy_sts_rpt_jgr2_type2 *)phy_status_inf; -+ -+ odm_move_memory(dm, phy_status, phy_status_inf, size); -+ -+ if (!(dm->debug_components & DBG_PHY_STATUS)) -+ return; -+ -+ if (dbg->show_phy_sts_all_pkt == 0) { -+ if (!pktinfo->is_packet_match_bssid) -+ return; -+ } -+ -+ dbg->show_phy_sts_cnt++; -+ #if 0 -+ dbg_print("cnt=%d, max=%d\n", -+ dbg->show_phy_sts_cnt, dbg->show_phy_sts_max_cnt); -+ #endif -+ -+ if (dbg->show_phy_sts_max_cnt != SHOW_PHY_STATUS_UNLIMITED) { -+ if (dbg->show_phy_sts_cnt > dbg->show_phy_sts_max_cnt) -+ return; -+ } -+ -+ pr_debug("Phy Status Rpt: OFDM_%d\n", phy_status_page_num); -+ pr_debug("StaID=%d, RxRate = 0x%x match_bssid=%d\n", -+ pktinfo->station_id, pktinfo->data_rate, -+ pktinfo->is_packet_match_bssid); -+ -+ for (i = 0; i < PHY_STATUS_JRGUAR2_DW_LEN; i++) -+ pr_debug("Offset[%d:%d] = 0x%x\n", -+ ((4 * i) + 3), (4 * i), phy_status[i]); -+ -+ if (phy_status_page_num == 0) { -+ pr_debug("[0] TRSW=%d, MP_gain_idx=%d, pwdb=%d\n", -+ rpt0->trsw, rpt0->gain, rpt0->pwdb); -+ pr_debug("[4] band=%d, CH=%d, agc_table = %d, rxsc = %d\n", -+ rpt0->band, rpt0->channel, -+ rpt0->agc_table, rpt0->rxsc); -+ pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, LSIG_len=%d\n", -+ rpt0->antidx_d, rpt0->antidx_c, rpt0->antidx_b, -+ rpt0->antidx_a, rpt0->length); -+ pr_debug("[12] lna_h=%d, bb_pwr=%d, lna_l=%d, vga=%d, sq=%d\n", -+ rpt0->lna_h, rpt0->bb_power, rpt0->lna_l, -+ rpt0->vga, rpt0->signal_quality); -+ -+ } else if (phy_status_page_num == 1) { -+ pr_debug("[0] pwdb[D:A]={%d, %d, %d, %d}\n", -+ rpt->pwdb[3], rpt->pwdb[2], -+ rpt->pwdb[1], rpt->pwdb[0]); -+ pr_debug("[4] BF: %d, ldpc=%d, stbc=%d, g_bt=%d, antsw=%d, band=%d, CH=%d, rxsc[ht, l]={%d, %d}\n", -+ rpt->beamformed, rpt->ldpc, rpt->stbc, rpt->gnt_bt, -+ rpt->hw_antsw_occu, rpt->band, rpt->channel, -+ rpt->ht_rxsc, rpt->l_rxsc); -+ pr_debug("[8] AntIdx[D:A]={%d, %d, %d, %d}, LSIG_len=%d\n", -+ rpt->antidx_d, rpt->antidx_c, rpt->antidx_b, -+ rpt->antidx_a, rpt->lsig_length); -+ pr_debug("[12] rf_mode=%d, NBI=%d, Intf_pos=%d, GID=%d, PAID=%d\n", -+ rpt->rf_mode, rpt->nb_intf_flag, -+ (rpt->intf_pos + (rpt->intf_pos_msb << 8)), rpt->gid, -+ (rpt->paid + (rpt->paid_msb << 8))); -+ pr_debug("[16] EVM[D:A]={%d, %d, %d, %d}\n", -+ rpt->rxevm[3], rpt->rxevm[2], -+ rpt->rxevm[1], rpt->rxevm[0]); -+ pr_debug("[20] CFO[D:A]={%d, %d, %d, %d}\n", -+ rpt->cfo_tail[3], rpt->cfo_tail[2], rpt->cfo_tail[1], -+ rpt->cfo_tail[0]); -+ pr_debug("[24] SNR[D:A]={%d, %d, %d, %d}\n\n", -+ rpt->rxsnr[3], rpt->rxsnr[2], rpt->rxsnr[1], -+ rpt->rxsnr[0]); -+ -+ } else if (phy_status_page_num == 2) { -+ pr_debug("[0] pwdb[D:A]={%d, %d, %d, %d}\n", -+ rpt2->pwdb[3], rpt2->pwdb[2], rpt2->pwdb[1], -+ rpt2->pwdb[0]); -+ pr_debug("[4] BF: %d, ldpc=%d, stbc=%d, g_bt=%d, antsw=%d, band=%d, CH=%d, rxsc[ht,l]={%d, %d}\n", -+ rpt2->beamformed, rpt2->ldpc, rpt2->stbc, rpt2->gnt_bt, -+ rpt2->hw_antsw_occu, rpt2->band, rpt2->channel, -+ rpt2->ht_rxsc, rpt2->l_rxsc); -+ pr_debug("[8] AgcTab[D:A]={%d, %d, %d, %d}, cnt_pw2cca=%d, shift_l_map=%d\n", -+ rpt2->agc_table_d, rpt2->agc_table_c, -+ rpt2->agc_table_b, rpt2->agc_table_a, -+ rpt2->cnt_pw2cca, rpt2->shift_l_map); -+ pr_debug("[12] (TRSW|Gain)[D:A]={%d %d, %d %d, %d %d, %d %d}, cnt_cca2agc_rdy=%d\n", -+ rpt2->trsw_d, rpt2->gain_d, rpt2->trsw_c, rpt2->gain_c, -+ rpt2->trsw_b, rpt2->gain_b, rpt2->trsw_a, -+ rpt2->gain_a, rpt2->cnt_cca2agc_rdy); -+ pr_debug("[16] AAGC step[D:A]={%d, %d, %d, %d} HT AAGC gain[D:A]={%d, %d, %d, %d}\n", -+ rpt2->aagc_step_d, rpt2->aagc_step_c, -+ rpt2->aagc_step_b, rpt2->aagc_step_a, -+ rpt2->ht_aagc_gain[3], rpt2->ht_aagc_gain[2], -+ rpt2->ht_aagc_gain[1], rpt2->ht_aagc_gain[0]); -+ pr_debug("[20] DAGC gain[D:A]={%d, %d, %d, %d}\n", -+ rpt2->dagc_gain[3], -+ rpt2->dagc_gain[2], rpt2->dagc_gain[1], -+ rpt2->dagc_gain[0]); -+ pr_debug("[24] syn_cnt: %d, Cnt=%d\n\n", -+ rpt2->syn_count, rpt2->counter); -+ } -+} -+ -+void phydm_set_per_path_phy_info(u8 rx_path, s8 pwr, s8 rx_evm, s8 cfo_tail, -+ s8 rx_snr, u8 ant_idx, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ u8 evm_dbm = 0; -+ u8 evm_percentage = 0; -+ -+ /* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */ -+ -+ if (rx_evm < 0) { -+ /* @Calculate EVM in dBm */ -+ evm_dbm = ((u8)(0 - rx_evm) >> 1); -+ -+ if (evm_dbm == 64) -+ evm_dbm = 0; /*@if 1SS rate, evm_dbm [2nd stream] =64*/ -+ -+ if (evm_dbm != 0) { -+ /* @Convert EVM to 0%~100% percentage */ -+ if (evm_dbm >= 34) -+ evm_percentage = 100; -+ else -+ evm_percentage = (evm_dbm << 1) + (evm_dbm); -+ } -+ } -+ -+ phy_info->rx_pwr[rx_path] = pwr; -+ -+ /*@CFO(kHz) = CFO_tail * 312.5(kHz) / 2^7 ~= CFO tail * 5/2 (kHz)*/ -+ phy_info->cfo_tail[rx_path] = (cfo_tail * 5) >> 1; -+ phy_info->rx_mimo_evm_dbm[rx_path] = evm_dbm; -+ phy_info->rx_mimo_signal_strength[rx_path] = phydm_pw_2_percent(pwr); -+ phy_info->rx_mimo_signal_quality[rx_path] = evm_percentage; -+ phy_info->rx_snr[rx_path] = rx_snr >> 1; -+ phy_info->ant_idx[rx_path] = ant_idx; -+ -+#if 0 -+ if (!pktinfo->is_packet_match_bssid) -+ return; -+ -+ dbg_print("path (%d)--------\n", rx_path); -+ dbg_print("rx_pwr = %d, Signal strength = %d\n", -+ phy_info->rx_pwr[rx_path], -+ phy_info->rx_mimo_signal_strength[rx_path]); -+ dbg_print("evm_dbm = %d, Signal quality = %d\n", -+ phy_info->rx_mimo_evm_dbm[rx_path], -+ phy_info->rx_mimo_signal_quality[rx_path]); -+ dbg_print("CFO = %d, SNR = %d\n", -+ phy_info->cfo_tail[rx_path], phy_info->rx_snr[rx_path]); -+ -+#endif -+} -+ -+void phydm_set_common_phy_info(s8 rx_power, u8 channel, boolean is_beamformed, -+ boolean is_mu_packet, u8 bandwidth, -+ u8 signal_quality, u8 rxsc, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ phy_info->rx_power = rx_power; /* RSSI in dB */ -+ phy_info->recv_signal_power = rx_power; /* RSSI in dB */ -+ phy_info->channel = channel; /* @channel number */ -+ phy_info->is_beamformed = is_beamformed; /* @apply BF */ -+ phy_info->is_mu_packet = is_mu_packet; /* @MU packet */ -+ phy_info->rxsc = rxsc; -+ -+ /* RSSI in percentage */ -+ phy_info->rx_pwdb_all = phydm_pw_2_percent(rx_power); -+ phy_info->signal_quality = signal_quality; /* signal quality */ -+ phy_info->band_width = bandwidth; /* @bandwidth */ -+ -+#if 0 -+ if (!pktinfo->is_packet_match_bssid) -+ return; -+ -+ dbg_print("rx_pwdb_all = %d, rx_power = %d, recv_signal_power = %d\n", -+ phy_info->rx_pwdb_all, phy_info->rx_power, -+ phy_info->recv_signal_power); -+ dbg_print("signal_quality = %d\n", phy_info->signal_quality); -+ dbg_print("is_beamformed = %d, is_mu_packet = %d, rx_count = %d\n", -+ phy_info->is_beamformed, phy_info->is_mu_packet, -+ phy_info->rx_count + 1); -+ dbg_print("channel = %d, rxsc = %d, band_width = %d\n", channel, -+ rxsc, bandwidth); -+ -+#endif -+} -+ -+void phydm_get_phy_sts_type0(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ /* type 0 is used for cck packet */ -+ struct phy_sts_rpt_jgr2_type0 *phy_sts = NULL; -+ u8 sq = 0; -+ s8 rx_pow = 0; -+ u8 lna_idx = 0, vga_idx = 0; -+ u8 ant_idx; -+ -+ phy_sts = (struct phy_sts_rpt_jgr2_type0 *)phy_status_inf; -+ rx_pow = phy_sts->pwdb - 110; -+ -+ /* Fill in per-path antenna index */ -+ ant_idx = phy_sts->antidx_a; -+ -+ if (dm->support_ic_type & ODM_RTL8723D) { -+ #if (RTL8723D_SUPPORT) -+ rx_pow = phy_sts->pwdb - 97; -+ #endif -+ } -+ #if (RTL8821C_SUPPORT) -+ else if (dm->support_ic_type & ODM_RTL8821C) { -+ if (phy_sts->pwdb >= -57) -+ rx_pow = phy_sts->pwdb - 100; -+ else -+ rx_pow = phy_sts->pwdb - 102; -+ } -+ #endif -+ -+ if (pktinfo->is_to_self) { -+ dm->ofdm_agc_idx[0] = phy_sts->pwdb; -+ dm->ofdm_agc_idx[1] = 0; -+ dm->ofdm_agc_idx[2] = 0; -+ dm->ofdm_agc_idx[3] = 0; -+ } -+ -+ /* @Calculate Signal Quality*/ -+ if (phy_sts->signal_quality >= 64) { -+ sq = 0; -+ } else if (phy_sts->signal_quality <= 20) { -+ sq = 100; -+ } else { -+ /* @mapping to 2~99% */ -+ sq = 64 - phy_sts->signal_quality; -+ sq = ((sq << 3) + sq) >> 2; -+ } -+ -+ /* @Get RSSI for old CCK AGC */ -+ if (!dm->cck_new_agc) { -+ vga_idx = phy_sts->vga; -+ -+ if (dm->support_ic_type & ODM_RTL8197F) { -+ /*@3bit LNA*/ -+ lna_idx = phy_sts->lna_l; -+ } else { -+ /*@4bit LNA*/ -+ lna_idx = (phy_sts->lna_h << 3) | phy_sts->lna_l; -+ } -+ rx_pow = phydm_get_cck_rssi(dm, lna_idx, vga_idx); -+ } -+ -+ /* @Confirm CCK RSSI */ -+ #if (RTL8197F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8197F) { -+ u8 bb_pwr_th_l = 5; /* round( 31*0.15 ) */ -+ u8 bb_pwr_th_h = 27; /* round( 31*0.85 ) */ -+ -+ if (phy_sts->bb_power < bb_pwr_th_l || -+ phy_sts->bb_power > bb_pwr_th_h) -+ rx_pow = 0; /* @Error RSSI for CCK ; set 100*/ -+ } -+ #endif -+ -+ /*@CCK no STBC and LDPC*/ -+ dm->phy_dbg_info.is_ldpc_pkt = false; -+ dm->phy_dbg_info.is_stbc_pkt = false; -+ -+ /* Update Common information */ -+ phydm_set_common_phy_info(rx_pow, phy_sts->channel, false, -+ false, CHANNEL_WIDTH_20, sq, -+ phy_sts->rxsc, phy_info); -+ /* Update CCK pwdb */ -+ phydm_set_per_path_phy_info(RF_PATH_A, rx_pow, 0, 0, 0, ant_idx, -+ phy_info); -+ -+ #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY -+ dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a; -+ dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b; -+ dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c; -+ dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d; -+ #endif -+} -+ -+void phydm_get_phy_sts_type1(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ /* type 1 is used for ofdm packet */ -+ struct phy_sts_rpt_jgr2_type1 *phy_sts = NULL; -+ struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info; -+ s8 rx_pwr_db = -120; -+ s8 rx_pwr = 0; -+ u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0; -+ boolean is_mu; -+ u8 ant_idx[4]; -+ -+ phy_sts = (struct phy_sts_rpt_jgr2_type1 *)phy_status_inf; -+ -+ /* Fill in per-path antenna index */ -+ ant_idx[0] = phy_sts->antidx_a; -+ ant_idx[1] = phy_sts->antidx_b; -+ ant_idx[2] = phy_sts->antidx_c; -+ ant_idx[3] = phy_sts->antidx_d; -+ -+ /* Update per-path information */ -+ for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { -+ if (!(dm->rx_ant_status & BIT(i))) -+ continue; -+ rx_count++; -+ -+ if (rx_count > dm->num_rf_path) -+ break; -+ -+ /* Update per-path information -+ * (RSSI_dB RSSI_percentage EVM SNR CFO sq) -+ */ -+ /* @EVM report is reported by stream, not path */ -+ rx_pwr = phy_sts->pwdb[i] - 110; /* per-path pwdb(dB)*/ -+ -+ if (pktinfo->is_to_self) -+ dm->ofdm_agc_idx[i] = phy_sts->pwdb[i]; -+ -+ phydm_set_per_path_phy_info(i, rx_pwr, -+ phy_sts->rxevm[rx_count - 1], -+ phy_sts->cfo_tail[i], -+ phy_sts->rxsnr[i], -+ ant_idx[i], phy_info); -+ /* search maximum pwdb */ -+ if (rx_pwr > rx_pwr_db) -+ rx_pwr_db = rx_pwr; -+ } -+ -+ /* @mapping RX counter from 1~4 to 0~3 */ -+ if (rx_count > 0) -+ phy_info->rx_count = rx_count - 1; -+ -+ /* @Check if MU packet or not */ -+ if (phy_sts->gid != 0 && phy_sts->gid != 63) { -+ is_mu = true; -+ dbg_i->num_qry_mu_pkt++; -+ } else { -+ is_mu = false; -+ } -+ -+ /* @count BF packet */ -+ dbg_i->num_qry_bf_pkt = dbg_i->num_qry_bf_pkt + phy_sts->beamformed; -+ -+ /*STBC or LDPC pkt*/ -+ dbg_i->is_ldpc_pkt = phy_sts->ldpc; -+ dbg_i->is_stbc_pkt = phy_sts->stbc; -+ -+ /* @Check sub-channel */ -+ if (pktinfo->data_rate > ODM_RATE11M && -+ pktinfo->data_rate < ODM_RATEMCS0) -+ rxsc = phy_sts->l_rxsc; -+ else -+ rxsc = phy_sts->ht_rxsc; -+ -+ /* @Check RX bandwidth */ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ if (rxsc >= 1 && rxsc <= 8) -+ bw = CHANNEL_WIDTH_20; -+ else if ((rxsc >= 9) && (rxsc <= 12)) -+ bw = CHANNEL_WIDTH_40; -+ else if (rxsc >= 13) -+ bw = CHANNEL_WIDTH_80; -+ else -+ bw = phy_sts->rf_mode; -+ -+ } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ if (phy_sts->rf_mode == 0) -+ bw = CHANNEL_WIDTH_20; -+ else if ((rxsc == 1) || (rxsc == 2)) -+ bw = CHANNEL_WIDTH_20; -+ else -+ bw = CHANNEL_WIDTH_40; -+ } -+ -+ /* Update packet information */ -+ phydm_set_common_phy_info(rx_pwr_db, phy_sts->channel, -+ (boolean)phy_sts->beamformed, is_mu, bw, -+ phy_info->rx_mimo_signal_quality[0], -+ rxsc, phy_info); -+ -+ phydm_parsing_cfo(dm, pktinfo, phy_sts->cfo_tail, pktinfo->rate_ss); -+ #ifdef PHYDM_LNA_SAT_CHK_TYPE2 -+ phydm_parsing_snr(dm, pktinfo, phy_sts->rxsnr); -+ #endif -+ -+ #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ dm->dm_fat_table.antsel_rx_keep_0 = phy_sts->antidx_a; -+ dm->dm_fat_table.antsel_rx_keep_1 = phy_sts->antidx_b; -+ dm->dm_fat_table.antsel_rx_keep_2 = phy_sts->antidx_c; -+ dm->dm_fat_table.antsel_rx_keep_3 = phy_sts->antidx_d; -+ #endif -+} -+ -+void phydm_get_phy_sts_type2(struct dm_struct *dm, u8 *phy_status_inf, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ struct phy_sts_rpt_jgr2_type2 *phy_sts = NULL; -+ s8 rx_pwr_db_max = -120; -+ s8 rx_pwr = 0; -+ u8 i, rxsc, bw = CHANNEL_WIDTH_20, rx_count = 0; -+ -+ phy_sts = (struct phy_sts_rpt_jgr2_type2 *)phy_status_inf; -+ -+ for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { -+ if (!(dm->rx_ant_status & BIT(i))) -+ continue; -+ rx_count++; -+ -+ if (rx_count > dm->num_rf_path) -+ break; -+ -+ /* Update per-path information*/ -+ /* RSSI_dB, RSSI_percentage, EVM, SNR, CFO, sq */ -+ #if (RTL8197F_SUPPORT) -+ if ((dm->support_ic_type & ODM_RTL8197F) && -+ phy_sts->pwdb[i] == 0x7f) { /*@97f workaround*/ -+ -+ if (i == RF_PATH_A) { -+ rx_pwr = (phy_sts->gain_a) << 1; -+ rx_pwr = rx_pwr - 110; -+ } else if (i == RF_PATH_B) { -+ rx_pwr = (phy_sts->gain_b) << 1; -+ rx_pwr = rx_pwr - 110; -+ } else { -+ rx_pwr = 0; -+ } -+ } else -+ #endif -+ rx_pwr = phy_sts->pwdb[i] - 110; /*@dBm*/ -+ -+ phydm_set_per_path_phy_info(i, rx_pwr, 0, 0, 0, 0, phy_info); -+ -+ if (rx_pwr > rx_pwr_db_max) /* search max pwdb */ -+ rx_pwr_db_max = rx_pwr; -+ } -+ -+ /* @mapping RX counter from 1~4 to 0~3 */ -+ if (rx_count > 0) -+ phy_info->rx_count = rx_count - 1; -+ -+ /* @Check RX sub-channel */ -+ if (pktinfo->data_rate > ODM_RATE11M && -+ pktinfo->data_rate < ODM_RATEMCS0) -+ rxsc = phy_sts->l_rxsc; -+ else -+ rxsc = phy_sts->ht_rxsc; -+ -+ /*STBC or LDPC pkt*/ -+ dm->phy_dbg_info.is_ldpc_pkt = phy_sts->ldpc; -+ dm->phy_dbg_info.is_stbc_pkt = phy_sts->stbc; -+ -+ /* @Check RX bandwidth */ -+ /* @BW information of sc=0 is useless, -+ *because there is no information of RF mode -+ */ -+ if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ if (rxsc >= 1 && rxsc <= 8) -+ bw = CHANNEL_WIDTH_20; -+ else if ((rxsc >= 9) && (rxsc <= 12)) -+ bw = CHANNEL_WIDTH_40; -+ else if (rxsc >= 13) -+ bw = CHANNEL_WIDTH_80; -+ -+ } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ if (rxsc == 3) -+ bw = CHANNEL_WIDTH_40; -+ else if ((rxsc == 1) || (rxsc == 2)) -+ bw = CHANNEL_WIDTH_20; -+ } -+ -+ /* Update packet information */ -+ phydm_set_common_phy_info(rx_pwr_db_max, phy_sts->channel, -+ (boolean)phy_sts->beamformed, -+ false, bw, 0, rxsc, phy_info); -+} -+ -+void phydm_process_rssi_for_dm_2nd_type(struct dm_struct *dm, -+ struct phydm_phyinfo_struct *phy_info, -+ struct phydm_perpkt_info_struct *pktinfo -+ ) -+{ -+ struct cmn_sta_info *sta = NULL; -+ struct rssi_info *rssi_t = NULL; -+ u8 rssi_tmp = 0; -+ u64 rssi_linear = 0; -+ s16 rssi_db = 0; -+ u8 i = 0; -+ -+ if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM) -+ return; -+ -+ sta = dm->phydm_sta_info[pktinfo->station_id]; -+ -+ if (!is_sta_active(sta)) -+ return; -+ -+ if (!pktinfo->is_packet_match_bssid) /*@data frame only*/ -+ return; -+ -+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) -+ if (dm->support_ability & ODM_BB_ANT_DIV) -+ odm_process_rssi_for_ant_div(dm, phy_info, pktinfo); -+#endif -+ -+#if (defined(CONFIG_PATH_DIVERSITY)) -+ if (dm->support_ability & ODM_BB_PATH_DIV) -+ phydm_process_rssi_for_path_div(dm, phy_info, pktinfo); -+#endif -+ -+#ifdef CONFIG_ADAPTIVE_SOML -+ phydm_rx_qam_for_soml(dm, pktinfo); -+ phydm_rx_rate_for_soml(dm, pktinfo); -+#endif -+ -+ if (!(pktinfo->is_packet_to_self) && !(pktinfo->is_packet_beacon)) -+ return; -+ -+ if (pktinfo->is_packet_beacon) { -+ dm->phy_dbg_info.num_qry_beacon_pkt++; -+ dm->phy_dbg_info.beacon_phy_rate = pktinfo->data_rate; -+ } -+ -+ rssi_t = &sta->rssi_stat; -+ -+ for (i = RF_PATH_A; i < PHYDM_MAX_RF_PATH; i++) { -+ rssi_tmp = phy_info->rx_mimo_signal_strength[i]; -+ if (rssi_tmp != 0) -+ rssi_linear += phydm_db_2_linear(rssi_tmp); -+ } -+ /* @Rounding and removing fractional bits */ -+ rssi_linear = (rssi_linear + (1 << (FRAC_BITS - 1))) >> FRAC_BITS; -+ -+ switch (phy_info->rx_count + 1) { -+ case 2: -+ rssi_linear = DIVIDED_2(rssi_linear); -+ break; -+ case 3: -+ rssi_linear = DIVIDED_3(rssi_linear); -+ break; -+ case 4: -+ rssi_linear = DIVIDED_4(rssi_linear); -+ break; -+ } -+ -+ rssi_db = (s16)odm_convert_to_db(rssi_linear); -+ -+ if (rssi_t->rssi_acc == 0) { -+ rssi_t->rssi_acc = (s16)(rssi_db << RSSI_MA); -+ rssi_t->rssi = (s8)(rssi_db); -+ } else { -+ rssi_t->rssi_acc = MA_ACC(rssi_t->rssi_acc, rssi_db, RSSI_MA); -+ rssi_t->rssi = (s8)GET_MA_VAL(rssi_t->rssi_acc, RSSI_MA); -+ } -+ -+ if (pktinfo->is_cck_rate) -+ rssi_t->rssi_cck = (s8)rssi_db; -+ else -+ rssi_t->rssi_ofdm = (s8)rssi_db; -+} -+ -+void phydm_rx_physts_2nd_type(void *dm_void, u8 *phy_sts, -+ struct phydm_perpkt_info_struct *pktinfo, -+ struct phydm_phyinfo_struct *phy_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 page = (*phy_sts & 0xf); -+ -+ /* Phy status parsing */ -+ switch (page) { -+ case 0: /*@CCK*/ -+ phydm_get_phy_sts_type0(dm, phy_sts, pktinfo, phy_info); -+ break; -+ case 1: -+ phydm_get_phy_sts_type1(dm, phy_sts, pktinfo, phy_info); -+ break; -+ case 2: -+ phydm_get_phy_sts_type2(dm, phy_sts, pktinfo, phy_info); -+ break; -+ default: -+ break; -+ } -+ -+#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8195B_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) -+ phydm_print_phy_sts_jgr2(dm, phy_sts, pktinfo, phy_info); -+#endif -+} -+ -+/*@==============================================*/ -+#endif -+ -+boolean odm_phy_status_query(struct dm_struct *dm, -+ struct phydm_phyinfo_struct *phy_info, -+ u8 *phy_sts, -+ struct phydm_perpkt_info_struct *pktinfo) -+{ -+#ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ struct pkt_process_info *pkt_proc = &dm->pkt_proc_struct; -+ boolean auto_swch_en = dm->pkt_proc_struct.physts_auto_swch_en; -+#endif -+ u8 rate = pktinfo->data_rate; -+ u8 page = (*phy_sts & 0xf); -+ -+ pktinfo->is_cck_rate = PHYDM_IS_CCK_RATE(rate); -+ pktinfo->rate_ss = phydm_rate_to_num_ss(dm, rate); -+ dm->rate_ss = pktinfo->rate_ss; /*@For AP EVM SW antenna diversity use*/ -+ -+ if (pktinfo->is_cck_rate) -+ dm->phy_dbg_info.num_qry_phy_status_cck++; -+ else -+ dm->phy_dbg_info.num_qry_phy_status_ofdm++; -+ -+ /*Reset phy_info*/ -+ phydm_reset_phy_info(dm, phy_info); -+ -+ if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) { -+ #ifdef PHYSTS_3RD_TYPE_SUPPORT -+ #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ if (phydm_physts_auto_switch_jgr3(dm, phy_sts, pktinfo)) { -+ PHYDM_DBG(dm, DBG_PHY_STATUS, "SKIP parsing\n"); -+ phy_info->physts_rpt_valid = false; -+ return false; -+ } -+ #endif -+ phydm_rx_physts_jgr3(dm, phy_sts, pktinfo, phy_info); -+ phydm_process_dm_rssi_jgr3(dm, phy_info, pktinfo); -+ #endif -+ } else if (dm->support_ic_type & PHYSTS_2ND_TYPE_IC) { -+ #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) -+ phydm_rx_physts_2nd_type(dm, phy_sts, pktinfo, phy_info); -+ phydm_process_rssi_for_dm_2nd_type(dm, phy_info, pktinfo); -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ #if ODM_IC_11AC_SERIES_SUPPORT -+ phydm_rx_physts_1st_type(dm, phy_info, phy_sts, pktinfo); -+ phydm_process_rssi_for_dm(dm, phy_info, pktinfo); -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ #if ODM_IC_11N_SERIES_SUPPORT -+ phydm_phy_sts_n_parsing(dm, phy_info, phy_sts, pktinfo); -+ phydm_process_rssi_for_dm(dm, phy_info, pktinfo); -+ #endif -+ } -+ phy_info->signal_strength = phy_info->rx_pwdb_all; -+ #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ phydm_process_signal_strength(dm, phy_info, pktinfo); -+ #endif -+ -+ /*For basic debug message*/ -+ if (pktinfo->is_packet_match_bssid || *dm->mp_mode) { -+ dm->curr_station_id = pktinfo->station_id; -+ dm->rx_rate = rate; -+ dm->rssi_a = phy_info->rx_mimo_signal_strength[RF_PATH_A]; -+ dm->rssi_b = phy_info->rx_mimo_signal_strength[RF_PATH_B]; -+ dm->rssi_c = phy_info->rx_mimo_signal_strength[RF_PATH_C]; -+ dm->rssi_d = phy_info->rx_mimo_signal_strength[RF_PATH_D]; -+ -+ if (rate >= ODM_RATE6M && rate <= ODM_RATE54M) -+ dm->rxsc_l = (s8)phy_info->rxsc; -+ else if (phy_info->band_width == CHANNEL_WIDTH_20) -+ dm->rxsc_20 = (s8)phy_info->rxsc; -+ else if (phy_info->band_width == CHANNEL_WIDTH_40) -+ dm->rxsc_40 = (s8)phy_info->rxsc; -+ else if (phy_info->band_width == CHANNEL_WIDTH_80) -+ dm->rxsc_80 = (s8)phy_info->rxsc; -+ -+ #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ if (auto_swch_en && page == 4 && pktinfo->rate_ss > 1) -+ phydm_avg_condi_num(dm, phy_info, pktinfo); -+ -+ if (!auto_swch_en || -+ (pkt_proc->is_1st_mpdu || PHYDM_IS_LEGACY_RATE(rate))) -+ #endif -+ { -+ phydm_avg_rssi_evm_snr(dm, phy_info, pktinfo); -+ phydm_rx_statistic_cal(dm, phy_info, phy_sts, pktinfo); -+ } -+ } -+ -+ phy_info->physts_rpt_valid = true; -+ return true; -+} -+ -+void phydm_rx_phy_status_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info; -+ -+ dbg->show_phy_sts_all_pkt = 0; -+ dbg->show_phy_sts_max_cnt = 1; -+ dbg->show_phy_sts_cnt = 0; -+ -+ phydm_avg_phystatus_init(dm); -+ -+ #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ dm->pkt_proc_struct.physts_auto_swch_en = false; -+ #endif -+} -+ -+void phydm_physts_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ boolean enable; -+ u32 var[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ -+ for (i = 0; i < 3; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var[i]); -+ } -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Page Auto Switching: swh {en} {bitmap(hex)}\n"); -+ } else if ((strcmp(input[1], "swh") == 0)) { -+ #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+ PHYDM_SSCANF(input[3], DCMD_HEX, &var[2]); -+ enable = (boolean)var[1]; -+ phydm_physts_auto_switch_jgr3_set(dm, enable, (u8)var[2]); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Page Auto Switching: en=%d, bitmap=0x%x\n", -+ enable, var[2]); -+ #endif -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_phystatus.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_phystatus.h -new file mode 100644 -index 000000000000..c65b6245f83e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_phystatus.h -@@ -0,0 +1,1250 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_PHYSTATUS_H__ -+#define __PHYDM_PHYSTATUS_H__ -+ -+/* 2020.07.03 fix cck report bug due to 8723F coding error*/ -+#define PHYSTS_VERSION "1.2" -+ -+/*@--------------------------Define ------------------------------------------*/ -+#define CCK_RSSI_INIT_COUNT 5 -+ -+#define RA_RSSI_STATE_INIT 0 -+#define RA_RSSI_STATE_SEND 1 -+#define RA_RSSI_STATE_HOLD 2 -+ -+#if defined(DM_ODM_CE_MAC80211) -+#define CFO_HW_RPT_2_KHZ(val) ({ \ -+ s32 cfo_hw_rpt_2_khz_tmp = (val); \ -+ (cfo_hw_rpt_2_khz_tmp << 1) + (cfo_hw_rpt_2_khz_tmp >> 1); \ -+ }) -+#else -+#define CFO_HW_RPT_2_KHZ(val) ((val << 1) + (val >> 1)) -+#endif -+ -+/* @(X* 312.5 Khz)>>7 ~= X*2.5 Khz= (X<<1 + X>>1)Khz */ -+ -+#define IGI_2_RSSI(igi) (igi - 10) -+ -+#define PHY_STATUS_JRGUAR2_DW_LEN 7 /* @7*4 = 28 Byte */ -+#define PHY_STATUS_JRGUAR3_DW_LEN 7 /* @7*4 = 28 Byte */ -+#define SHOW_PHY_STATUS_UNLIMITED 0 -+#define RSSI_MA 4 /*moving average factor for RSSI: 2^4=16 */ -+ -+#define PHYSTS_PATH_NUM 4 -+ -+/*@************************************************************ -+ * structure and define -+ ************************************************************/ -+ -+__PACK struct phy_rx_agc_info { -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 gain : 7, trsw : 1; -+#else -+ u8 trsw : 1, gain : 7; -+#endif -+}; -+ -+__PACK struct phy_status_rpt_8192cd { -+ struct phy_rx_agc_info path_agc[2]; -+ u8 ch_corr[2]; -+ u8 cck_sig_qual_ofdm_pwdb_all; -+ u8 cck_agc_rpt_ofdm_cfosho_a; -+ u8 cck_rpt_b_ofdm_cfosho_b; -+ u8 rsvd_1;/*@ch_corr_msb;*/ -+ u8 noise_power_db_msb; -+ s8 path_cfotail[2]; -+ u8 pcts_mask[2]; -+ s8 stream_rxevm[2]; -+ u8 path_rxsnr[2]; -+ u8 noise_power_db_lsb; -+ u8 rsvd_2[3]; -+ u8 stream_csi[2]; -+ u8 stream_target_csi[2]; -+ s8 sig_evm; -+ u8 rsvd_3; -+ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antsel_rx_keep_2: 1; /*@ex_intf_flg:1;*/ -+ u8 sgi_en: 1; -+ u8 rxsc: 2; -+ u8 idle_long: 1; -+ u8 r_ant_train_en: 1; -+ u8 ant_sel_b: 1; -+ u8 ant_sel: 1; -+#else /*@_BIG_ENDIAN_ */ -+ u8 ant_sel: 1; -+ u8 ant_sel_b: 1; -+ u8 r_ant_train_en: 1; -+ u8 idle_long: 1; -+ u8 rxsc: 2; -+ u8 sgi_en: 1; -+ u8 antsel_rx_keep_2: 1;/*@ex_intf_flg:1;*/ -+#endif -+}; -+ -+struct phy_status_rpt_8812 { -+ /* @DWORD 0*/ -+ u8 gain_trsw[2]; /*path-A and path-B {TRSW, gain[6:0] }*/ -+ u8 chl_num_LSB; /*@channel number[7:0]*/ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 chl_num_MSB : 2; /*@channel number[9:8]*/ -+ u8 sub_chnl : 4; /*sub-channel location[3:0]*/ -+ u8 r_RFMOD : 2; /*RF mode[1:0]*/ -+#else /*@_BIG_ENDIAN_ */ -+ u8 r_RFMOD : 2; -+ u8 sub_chnl : 4; -+ u8 chl_num_MSB : 2; -+#endif -+ -+ /* @DWORD 1*/ -+ u8 pwdb_all; /*@CCK signal quality / OFDM pwdb all*/ -+ s8 cfosho[2]; /*@CCK AGC report and CCK_BB_Power*/ -+ /*OFDM path-A and path-B short CFO*/ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 resvd_0 : 6; -+ u8 bt_RF_ch_MSB : 2; /*@8812A:2'b0 8814A: bt rf channel keep[7:6]*/ -+#else /*@_BIG_ENDIAN_*/ -+ u8 bt_RF_ch_MSB : 2; -+ u8 resvd_0 : 6; -+#endif -+ -+/* @DWORD 2*/ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 ant_div_sw_a : 1; /*@8812A: ant_div_sw_a 8814A: 1'b0*/ -+ u8 ant_div_sw_b : 1; /*@8812A: ant_div_sw_b 8814A: 1'b0*/ -+ u8 bt_RF_ch_LSB : 6; /*@8812A: 6'b0 8814A: bt rf channel keep[5:0]*/ -+#else /*@_BIG_ENDIAN_ */ -+ u8 bt_RF_ch_LSB : 6; -+ u8 ant_div_sw_b : 1; -+ u8 ant_div_sw_a : 1; -+#endif -+ s8 cfotail[2]; /*@DW2 byte 1 DW2 byte 2 path-A and path-B CFO tail*/ -+ u8 PCTS_MSK_RPT_0; /*PCTS mask report[7:0]*/ -+ u8 PCTS_MSK_RPT_1; /*PCTS mask report[15:8]*/ -+ -+ /* @DWORD 3*/ -+ s8 rxevm[2]; /*@DW3 byte 1 DW3 byte 2 stream 1 and stream 2 RX EVM*/ -+ s8 rxsnr[2]; /*@DW3 byte 3 DW4 byte 0 path-A and path-B RX SNR*/ -+ -+ /* @DWORD 4*/ -+ u8 PCTS_MSK_RPT_2; /*PCTS mask report[23:16]*/ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 PCTS_MSK_RPT_3 : 6; /*PCTS mask report[29:24]*/ -+ u8 pcts_rpt_valid : 1; /*pcts_rpt_valid*/ -+ u8 resvd_1 : 1; /*@1'b0*/ -+#else /*@_BIG_ENDIAN_*/ -+ u8 resvd_1 : 1; -+ u8 pcts_rpt_valid : 1; -+ u8 PCTS_MSK_RPT_3 : 6; -+#endif -+ s8 rxevm_cd[2]; /*@8812A: 16'b0*/ -+ /*@8814A: stream 3 and stream 4 RX EVM*/ -+ /* @DWORD 5*/ -+ u8 csi_current[2]; /*@8812A: stream 1 and 2 CSI*/ -+ /*@8814A: path-C and path-D RX SNR*/ -+ u8 gain_trsw_cd[2]; /*path-C and path-D {TRSW, gain[6:0] }*/ -+ -+ /* @DWORD 6*/ -+ s8 sigevm; /*signal field EVM*/ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_antc : 3; /*@8812A: 3'b0 8814A: antidx_antc[2:0]*/ -+ u8 antidx_antd : 3; /*@8812A: 3'b0 8814A: antidx_antd[2:0]*/ -+ u8 dpdt_ctrl_keep : 1; /*@8812A: 1'b0 8814A: dpdt_ctrl_keep*/ -+ u8 GNT_BT_keep : 1; /*@8812A: 1'b0 8814A: GNT_BT_keep*/ -+#else /*@_BIG_ENDIAN_*/ -+ u8 GNT_BT_keep : 1; -+ u8 dpdt_ctrl_keep : 1; -+ u8 antidx_antd : 3; -+ u8 antidx_antc : 3; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_anta : 3; /*@antidx_anta[2:0]*/ -+ u8 antidx_antb : 3; /*@antidx_antb[2:0]*/ -+ u8 hw_antsw_occur : 2; /*@1'b0*/ -+#else /*@_BIG_ENDIAN_*/ -+ u8 hw_antsw_occur : 2; -+ u8 antidx_antb : 3; -+ u8 antidx_anta : 3; -+#endif -+}; -+ -+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) -+ -+__PACK struct phy_sts_rpt_jgr2_type0 { -+ /* @DW0 */ -+ u8 page_num; -+ u8 pwdb; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 gain : 6; -+ u8 rsvd_0 : 1; -+ u8 trsw : 1; -+#else -+ u8 trsw : 1; -+ u8 rsvd_0 : 1; -+ u8 gain : 6; -+#endif -+ u8 rsvd_1; -+ -+ /* @DW1 */ -+ u8 rsvd_2; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 rxsc : 4; -+ u8 agc_table : 4; -+#else -+ u8 agc_table : 4; -+ u8 rxsc : 4; -+#endif -+ u8 channel; -+ u8 band; -+ -+ /* @DW2 */ -+ u16 length; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_a : 3; -+ u8 antidx_b : 3; -+ u8 rsvd_3 : 2; -+ u8 antidx_c : 3; -+ u8 antidx_d : 3; -+ u8 rsvd_4 : 2; -+#else -+ u8 rsvd_3 : 2; -+ u8 antidx_b : 3; -+ u8 antidx_a : 3; -+ u8 rsvd_4 : 2; -+ u8 antidx_d : 3; -+ u8 antidx_c : 3; -+#endif -+ -+ /* @DW3 */ -+ u8 signal_quality; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 vga : 5; -+ u8 lna_l : 3; -+ u8 bb_power : 6; -+ u8 rsvd_9 : 1; -+ u8 lna_h : 1; -+#else -+ u8 lna_l : 3; -+ u8 vga : 5; -+ u8 lna_h : 1; -+ u8 rsvd_9 : 1; -+ u8 bb_power : 6; -+#endif -+ u8 rsvd_5; -+ -+ /* @DW4 */ -+ u32 rsvd_6; -+ -+ /* @DW5 */ -+ u32 rsvd_7; -+ -+ /* @DW6 */ -+ u32 rsvd_8; -+}; -+ -+__PACK struct phy_sts_rpt_jgr2_type1 { -+ /* @DW0 and DW1 */ -+ u8 page_num; -+ u8 pwdb[4]; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 l_rxsc : 4; -+ u8 ht_rxsc : 4; -+#else -+ u8 ht_rxsc : 4; -+ u8 l_rxsc : 4; -+#endif -+ u8 channel; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 band : 2; -+ u8 rsvd_0 : 1; -+ u8 hw_antsw_occu : 1; -+ u8 gnt_bt : 1; -+ u8 ldpc : 1; -+ u8 stbc : 1; -+ u8 beamformed : 1; -+#else -+ u8 beamformed : 1; -+ u8 stbc : 1; -+ u8 ldpc : 1; -+ u8 gnt_bt : 1; -+ u8 hw_antsw_occu : 1; -+ u8 rsvd_0 : 1; -+ u8 band : 2; -+#endif -+ -+ /* @DW2 */ -+ u16 lsig_length; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_a : 3; -+ u8 antidx_b : 3; -+ u8 rsvd_1 : 2; -+ u8 antidx_c : 3; -+ u8 antidx_d : 3; -+ u8 rsvd_2 : 2; -+#else -+ u8 rsvd_1 : 2; -+ u8 antidx_b : 3; -+ u8 antidx_a : 3; -+ u8 rsvd_2 : 2; -+ u8 antidx_d : 3; -+ u8 antidx_c : 3; -+#endif -+ -+ /* @DW3 */ -+ u8 paid; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 paid_msb : 1; -+ u8 gid : 6; -+ u8 rsvd_3 : 1; -+#else -+ u8 rsvd_3 : 1; -+ u8 gid : 6; -+ u8 paid_msb : 1; -+#endif -+ u8 intf_pos; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 intf_pos_msb : 1; -+ u8 rsvd_4 : 2; -+ u8 nb_intf_flag : 1; -+ u8 rf_mode : 2; -+ u8 rsvd_5 : 2; -+#else -+ u8 rsvd_5 : 2; -+ u8 rf_mode : 2; -+ u8 nb_intf_flag : 1; -+ u8 rsvd_4 : 2; -+ u8 intf_pos_msb : 1; -+#endif -+ -+ /* @DW4 */ -+ s8 rxevm[4]; /* s(8,1) */ -+ -+ /* @DW5 */ -+ s8 cfo_tail[4]; /* s(8,7) */ -+ -+ /* @DW6 */ -+ s8 rxsnr[4]; /* s(8,1) */ -+}; -+ -+__PACK struct phy_sts_rpt_jgr2_type2 { -+ /* @DW0 ane DW1 */ -+ u8 page_num; -+ u8 pwdb[4]; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 l_rxsc : 4; -+ u8 ht_rxsc : 4; -+#else -+ u8 ht_rxsc : 4; -+ u8 l_rxsc : 4; -+#endif -+ u8 channel; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 band : 2; -+ u8 rsvd_0 : 1; -+ u8 hw_antsw_occu : 1; -+ u8 gnt_bt : 1; -+ u8 ldpc : 1; -+ u8 stbc : 1; -+ u8 beamformed : 1; -+#else -+ u8 beamformed : 1; -+ u8 stbc : 1; -+ u8 ldpc : 1; -+ u8 gnt_bt : 1; -+ u8 hw_antsw_occu : 1; -+ u8 rsvd_0 : 1; -+ u8 band : 2; -+#endif -+ -+/* @DW2 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 shift_l_map : 6; -+ u8 rsvd_1 : 2; -+#else -+ u8 rsvd_1 : 2; -+ u8 shift_l_map : 6; -+#endif -+ u8 cnt_pw2cca; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 agc_table_a : 4; -+ u8 agc_table_b : 4; -+ u8 agc_table_c : 4; -+ u8 agc_table_d : 4; -+#else -+ u8 agc_table_b : 4; -+ u8 agc_table_a : 4; -+ u8 agc_table_d : 4; -+ u8 agc_table_c : 4; -+#endif -+ -+ /* @DW3 ~ DW6*/ -+ u8 cnt_cca2agc_rdy; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 gain_a : 6; -+ u8 rsvd_2 : 1; -+ u8 trsw_a : 1; -+ u8 gain_b : 6; -+ u8 rsvd_3 : 1; -+ u8 trsw_b : 1; -+ u8 gain_c : 6; -+ u8 rsvd_4 : 1; -+ u8 trsw_c : 1; -+ u8 gain_d : 6; -+ u8 rsvd_5 : 1; -+ u8 trsw_d : 1; -+ u8 aagc_step_a : 2; -+ u8 aagc_step_b : 2; -+ u8 aagc_step_c : 2; -+ u8 aagc_step_d : 2; -+#else -+ u8 trsw_a : 1; -+ u8 rsvd_2 : 1; -+ u8 gain_a : 6; -+ u8 trsw_b : 1; -+ u8 rsvd_3 : 1; -+ u8 gain_b : 6; -+ u8 trsw_c : 1; -+ u8 rsvd_4 : 1; -+ u8 gain_c : 6; -+ u8 trsw_d : 1; -+ u8 rsvd_5 : 1; -+ u8 gain_d : 6; -+ u8 aagc_step_d : 2; -+ u8 aagc_step_c : 2; -+ u8 aagc_step_b : 2; -+ u8 aagc_step_a : 2; -+#endif -+ u8 ht_aagc_gain[4]; -+ u8 dagc_gain[4]; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 counter : 6; -+ u8 rsvd_6 : 2; -+ u8 syn_count : 5; -+ u8 rsvd_7 : 3; -+#else -+ u8 rsvd_6 : 2; -+ u8 counter : 6; -+ u8 rsvd_7 : 3; -+ u8 syn_count : 5; -+#endif -+}; -+#endif -+ -+/*@==============================================*/ -+#ifdef PHYSTS_3RD_TYPE_SUPPORT -+__PACK struct phy_sts_rpt_jgr3_type0 { -+/* @DW0 : Offset 0 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 page_num : 4; -+ u8 pkt_cnt : 2; -+ u8 channel_msb : 2; -+#else -+ u8 channel_msb : 2; -+ u8 pkt_cnt : 2; -+ u8 page_num : 4; -+#endif -+ u8 pwdb_a; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 gain_a : 6; -+ u8 rsvd_0 : 1; -+ u8 trsw : 1; -+#else -+ u8 trsw : 1; -+ u8 rsvd_0 : 1; -+ u8 gain_a : 6; -+#endif -+ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 agc_table_b : 4; -+ u8 agc_table_c : 4; -+#else -+ u8 agc_table_c : 4; -+ u8 agc_table_b : 4; -+#endif -+ -+/* @DW1 : Offset 4 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 rsvd_1 : 4; -+ u8 agc_table_d : 4; -+#else -+ u8 agc_table_d : 4; -+ u8 rsvd_1 : 4; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 l_rxsc : 4; -+ u8 agc_table_a : 4; -+#else -+ u8 agc_table_a : 4; -+ u8 l_rxsc : 4; -+#endif -+ u8 channel; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 band : 2; -+ u8 rsvd_2_1 : 1; -+ u8 hw_antsw_occur_keep_cck : 1; -+ u8 gnt_bt_keep_cck : 1; -+ u8 rsvd_2_2 : 1; -+ u8 path_sel_o : 2; -+#else -+ u8 path_sel_o : 2; -+ u8 rsvd_2_2 : 1; -+ u8 gnt_bt_keep_cck : 1; -+ u8 hw_antsw_occur_keep_cck : 1; -+ u8 rsvd_2_1 : 1; -+ u8 band : 2; -+#endif -+ -+ /* @DW2 : Offset 8 */ -+ u16 length; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_a : 4; -+ u8 antidx_b : 4; -+#else -+ u8 antidx_b : 4; -+ u8 antidx_a : 4; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_c : 4; -+ u8 antidx_d : 4; -+#else -+ u8 antidx_d : 4; -+ u8 antidx_c : 4; -+#endif -+ -+ /* @DW3 : Offset 12 */ -+ u8 signal_quality; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 vga_a : 5; -+ u8 lna_l_a : 3; -+#else -+ u8 lna_l_a : 3; -+ u8 vga_a : 5; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 bb_power_a : 6; -+ u8 rsvd_3_1 : 1; -+ u8 lna_h_a : 1; -+#else -+ -+ u8 lna_h_a : 1; -+ u8 rsvd_3_1 : 1; -+ u8 bb_power_a : 6; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 rxrate : 2; -+ u8 raterr : 1; -+ u8 lockbit : 1; -+ u8 sqloss : 1; -+ u8 mf_off : 1; -+ u8 rsvd_3_2 : 2; -+#else -+ u8 rsvd_3_2 : 2; -+ u8 mf_off : 1; -+ u8 sqloss : 1; -+ u8 lockbit : 1; -+ u8 raterr : 1; -+ u8 rxrate : 2; -+#endif -+ -+ /* @DW4 : Offset 16 */ -+ u8 pwdb_b; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 vga_b : 5; -+ u8 lna_l_b : 3; -+#else -+ u8 lna_l_b : 3; -+ u8 vga_b : 5; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 bb_power_b : 6; -+ u8 rsvd_4_1 : 1; -+ u8 lna_h_b : 1; -+#else -+ u8 lna_h_b : 1; -+ u8 rsvd_4_1 : 1; -+ u8 bb_power_b : 6; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 gain_b : 6; -+ u8 rsvd_4_2 : 2; -+#else -+ u8 rsvd_4_2 : 2; -+ u8 gain_b : 6; -+#endif -+ -+ /* @DW5 : Offset 20 */ -+ u8 pwdb_c; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 vga_c : 5; -+ u8 lna_l_c : 3; -+#else -+ u8 lna_l_c : 3; -+ u8 vga_c : 5; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 bb_power_c : 6; -+ u8 rsvd_5_1 : 1; -+ u8 lna_h_c : 1; -+#else -+ u8 lna_h_c : 1; -+ u8 rsvd_5_1 : 1; -+ u8 bb_power_c : 6; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 gain_c : 6; -+ u8 rsvd_5_2 : 2; -+#else -+ u8 rsvd_5_2 : 2; -+ u8 gain_c : 6; -+#endif -+ -+ /* @DW6 : Offset 24 */ -+ u8 pwdb_d; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 vga_d : 5; -+ u8 lna_l_d : 3; -+#else -+ u8 lna_l_d : 3; -+ u8 vga_d : 5; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 bb_power_d : 6; -+ u8 rsvd_6_1 : 1; -+ u8 lna_h_d : 1; -+#else -+ u8 lna_h_d : 1; -+ u8 rsvd_6_1 : 1; -+ u8 bb_power_d : 6; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 gain_d : 6; -+ u8 rsvd_6_2 : 2; -+#else -+ u8 rsvd_6_2 : 2; -+ u8 gain_d : 6; -+#endif -+}; -+#if(RTL8723F_SUPPORT) -+__PACK struct phy_sts_rpt_jgr3_type6 { -+ /* judy_add_8723F_0512 */ -+/* @DW0 : Offset 0 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 pop_idx : 4; -+ u8 pkt_cnt : 2; -+ u8 channel_msb : 2; -+#else -+ u8 channel_msb : 2; -+ u8 pkt_cnt : 2; -+ u8 pop_idx : 4; -+#endif -+ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 agc_table_a : 4; -+ u8 rsvd_0 : 4; -+#else -+ u8 rsvd_0 : 4; -+ u8 agc_table_a : 4; -+#endif -+ u8 rsvd_1 : 8; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 trsw : 1; -+ u8 hw_antsw_occur_keep_cck : 1; -+ u8 gnt_bt_keep_cck : 1; -+ u8 rssi_msb : 3; -+ u8 rsvd_2 : 2; -+#else -+ u8 rsvd_2 : 2; -+ u8 rssi_msb : 3; -+ u8 gnt_bt_keep_cck : 1; -+ u8 hw_antsw_occur_keep_cck : 1; -+ u8 trsw : 1; -+#endif -+ -+/* @DW1 : Offset 4 */ -+ u8 channel; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_a : 4; -+ u8 rsvd_2_1 : 4; -+#else -+ u8 rsvd_2_1 : 4; -+ u8 antidx_a : 4; -+#endif -+ u8 rsvd_2_2; -+ u8 mp_gain_idx_a; -+ -+/* @DW2 : Offset 8 */ -+ u16 rsvd_3_1; -+ u8 rsvd_4_1; -+ u8 rssi; -+ -+/* @DW3 : Offset 12 */ -+ u16 rsvd_4_2; -+ u8 rsvd_5_1; -+ u8 avg_cfo; -+/* @DW4 : Offset 16 */ -+ u8 coarse_cfo; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 coarse_cfo_msb : 4; -+ u8 avg_cfo_msb : 4; -+#else -+ u8 avg_cfo_msb : 4; -+ u8 coarse_cfo_msb : 4; -+#endif -+ u8 evm_hdr; -+ u8 evm_pld; -+/* @DW5 : Offset 20 */ -+ u32 rsvd_6_1; -+ u32 rsvd_7_1; -+}; -+#endif -+__PACK struct phy_sts_rpt_jgr3_type1 { -+/* @DW0 : Offset 0 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 page_num : 4; -+ u8 pkt_cnt : 2; -+ u8 channel_pri_msb : 2; -+#else -+ u8 channel_pri_msb : 2; -+ u8 pkt_cnt : 2; -+ u8 page_num : 4; -+#endif -+ u8 pwdb_a; -+ u8 pwdb_b; -+ u8 pwdb_c; -+ -+ /* @DW1 : Offset 4 */ -+ u8 pwdb_d; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 l_rxsc : 4; -+ u8 ht_rxsc : 4; -+#else -+ u8 ht_rxsc : 4; -+ u8 l_rxsc : 4; -+#endif -+ u8 channel_pri_lsb; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 band : 2; -+ u8 rsvd_0 : 2; -+ u8 gnt_bt : 1; -+ u8 ldpc : 1; -+ u8 stbc : 1; -+ u8 beamformed : 1; -+#else -+ u8 beamformed : 1; -+ u8 stbc : 1; -+ u8 ldpc : 1; -+ u8 gnt_bt : 1; -+ u8 rsvd_0 : 2; -+ u8 band : 2; -+#endif -+ -+ /* @DW2 : Offset 8 */ -+ u8 channel_sec_lsb; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 channel_sec_msb : 2; -+ u8 rsvd_1 : 2; -+ u8 hw_antsw_occur_a : 1; -+ u8 hw_antsw_occur_b : 1; -+ u8 hw_antsw_occur_c : 1; -+ u8 hw_antsw_occur_d : 1; -+#else -+ u8 hw_antsw_occur_d : 1; -+ u8 hw_antsw_occur_c : 1; -+ u8 hw_antsw_occur_b : 1; -+ u8 hw_antsw_occur_a : 1; -+ u8 rsvd_1 : 2; -+ u8 channel_sec_msb : 2; -+ -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_a : 4; -+ u8 antidx_b : 4; -+#else -+ u8 antidx_b : 4; -+ u8 antidx_a : 4; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_c : 4; -+ u8 antidx_d : 4; -+#else -+ u8 antidx_d : 4; -+ u8 antidx_c : 4; -+#endif -+ -+ /* @DW3 : Offset 12 */ -+ u8 paid; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 paid_msb : 1; -+ u8 gid : 6; -+ u8 rsvd_3 : 1; -+#else -+ u8 rsvd_3 : 1; -+ u8 gid : 6; -+ u8 paid_msb : 1; -+#endif -+ u16 rsvd_4; -+#if 0 -+ /*@ -+ u8 rsvd_4; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 rsvd_5: 6; -+ u8 rf_mode: 2; -+#else -+ u8 rf_mode: 2; -+ u8 rsvd_5: 6; -+#endif -+*/ -+#endif -+ /* @DW4 : Offset 16 */ -+ s8 rxevm[4]; /* s(8,1) */ -+ -+ /* @DW5 : Offset 20 */ -+ s8 cfo_tail[4]; /* s(8,7) */ -+ -+ /* @DW6 : Offset 24 */ -+ s8 rxsnr[4]; /* s(8,1) */ -+}; -+ -+__PACK struct phy_sts_rpt_jgr3_type2_3 { -+/* Type2 is primary channel & type3 is secondary channel */ -+/* @DW0 and DW1: Offest 0 and Offset 4 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 page_num : 4; -+ u8 pkt_cnt : 2; -+ u8 channel_msb : 2; -+#else -+ u8 channel_msb : 2; -+ u8 pkt_cnt : 2; -+ u8 page_num : 4; -+#endif -+ u8 pwdb[4]; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 l_rxsc : 4; -+ u8 ht_rxsc : 4; -+#else -+ u8 ht_rxsc : 4; -+ u8 l_rxsc : 4; -+#endif -+ u8 channel_lsb; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 band : 2; -+ u8 rsvd_0 : 2; -+ u8 gnt_bt : 1; -+ u8 ldpc : 1; -+ u8 stbc : 1; -+ u8 beamformed : 1; -+#else -+ u8 beamformed : 1; -+ u8 stbc : 1; -+ u8 ldpc : 1; -+ u8 gnt_bt : 1; -+ u8 rsvd_0 : 2; -+ u8 band : 2; -+#endif -+ -+/* @DW2 : Offset 8 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 shift_l_map : 6; -+ u8 rsvd_1 : 2; -+#else -+ u8 rsvd_1 : 2; -+ u8 shift_l_map : 6; -+#endif -+ s8 pwed_th; /* @dynamic energy threshold S(8,2) */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 agc_table_a : 4; -+ u8 agc_table_b : 4; -+#else -+ u8 agc_table_b : 4; -+ u8 agc_table_a : 4; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 agc_table_c : 4; -+ u8 agc_table_d : 4; -+#else -+ u8 agc_table_d : 4; -+ u8 agc_table_c : 4; -+#endif -+ -+ /* @DW3 : Offset 12 */ -+ u8 cnt_cca2agc_rdy; /* Time(ns) = cnt_cca2agc_ready*25 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 mp_gain_a : 6; -+ u8 mp_gain_b_lsb : 2; -+#else -+ u8 mp_gain_b_lsb : 2; -+ u8 mp_gain_a : 6; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 mp_gain_b_msb : 4; -+ u8 mp_gain_c_lsb : 4; -+#else -+ u8 mp_gain_c_lsb : 4; -+ u8 mp_gain_b_msb : 4; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 mp_gain_c_msb : 2; -+ u8 avg_noise_pwr_lsb : 4; -+ u8 rsvd_3 : 2; -+ /* u8 r_rfmod:2; */ -+#else -+ /* u8 r_rfmod:2; */ -+ u8 rsvd_3 : 2; -+ u8 avg_noise_pwr_lsb : 4; -+ u8 mp_gain_c_msb : 2; -+#endif -+ /* @DW4 ~ 5: offset 16 ~20 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 mp_gain_d : 6; -+ u8 is_freq_select_fading : 1; -+ u8 rsvd_2 : 1; -+#else -+ u8 rsvd_2 : 1; -+ u8 is_freq_select_fading : 1; -+ u8 mp_gain_d : 6; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 aagc_step_a : 2; -+ u8 aagc_step_b : 2; -+ u8 aagc_step_c : 2; -+ u8 aagc_step_d : 2; -+#else -+ u8 aagc_step_d : 2; -+ u8 aagc_step_c : 2; -+ u8 aagc_step_b : 2; -+ u8 aagc_step_a : 2; -+#endif -+ u8 ht_aagc_gain[4]; -+ u8 dagc_gain[4]; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 counter : 6; -+ u8 syn_count_lsb : 2; -+#else -+ u8 syn_count_lsb : 2; -+ u8 counter : 6; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 syn_count_msb : 3; -+ u8 avg_noise_pwr_msb : 5; -+#else -+ u8 avg_noise_pwr_msb : 5; -+ u8 syn_count_msb : 3; -+#endif -+}; -+ -+__PACK struct phy_sts_rpt_jgr3_type4 { -+/* smart antenna */ -+/* @DW0 and DW1 : offset 0 and 4 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 page_num : 4; -+ u8 pkt_cnt : 2; -+ u8 channel_msb : 2; -+#else -+ u8 channel_msb : 2; -+ u8 pkt_cnt : 2; -+ u8 page_num : 4; -+#endif -+ u8 pwdb[4]; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 l_rxsc : 4; -+ u8 ht_rxsc : 4; -+#else -+ u8 ht_rxsc : 4; -+ u8 l_rxsc : 4; -+#endif -+ u8 channel_lsb; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 band : 2; -+ u8 rsvd_0 : 2; -+ u8 gnt_bt : 1; -+ u8 ldpc : 1; -+ u8 stbc : 1; -+ u8 beamformed : 1; -+#else -+ u8 beamformed : 1; -+ u8 stbc : 1; -+ u8 ldpc : 1; -+ u8 gnt_bt : 1; -+ u8 rsvd_0 : 1; -+ u8 band : 2; -+#endif -+ -+/* @DW2 : offset 8 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 bad_tone_cnt_min_eign_0 : 4; -+ u8 bad_tone_cnt_cn_excess_0 : 4; -+#else -+ u8 bad_tone_cnt_cn_excess_0 : 4; -+ u8 bad_tone_cnt_min_eign_0 : 4; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 training_done_a : 1; -+ u8 training_done_b : 1; -+ u8 training_done_c : 1; -+ u8 training_done_d : 1; -+ u8 hw_antsw_occur_a : 1; -+ u8 hw_antsw_occur_b : 1; -+ u8 hw_antsw_occur_c : 1; -+ u8 hw_antsw_occur_d : 1; -+#else -+ u8 hw_antsw_occur_d : 1; -+ u8 hw_antsw_occur_c : 1; -+ u8 hw_antsw_occur_b : 1; -+ u8 hw_antsw_occur_a : 1; -+ u8 training_done_d : 1; -+ u8 training_done_c : 1; -+ u8 training_done_b : 1; -+ u8 training_done_a : 1; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_a : 4; -+ u8 antidx_b : 4; -+#else -+ u8 antidx_b : 4; -+ u8 antidx_a : 4; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_c : 4; -+ u8 antidx_d : 4; -+#else -+ u8 antidx_d : 4; -+ u8 antidx_c : 4; -+#endif -+/* @DW3 : offset 12 */ -+ u8 tx_pkt_cnt; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 bad_tone_cnt_min_eign_1 : 4; -+ u8 bad_tone_cnt_cn_excess_1 : 4; -+#else -+ u8 bad_tone_cnt_cn_excess_1 : 4; -+ u8 bad_tone_cnt_min_eign_1 : 4; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 avg_cond_num_0 : 7; -+ u8 avg_cond_num_1_lsb : 1; -+#else -+ u8 avg_cond_num_1_lsb : 1; -+ u8 avg_cond_num_0 : 7; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 avg_cond_num_1_msb : 6; -+ u8 rsvd_1 : 2; -+#else -+ u8 rsvd_1 : 2; -+ u8 avg_cond_num_1_msb : 6; -+#endif -+ -+ /* @DW4 : offset 16 */ -+ s8 rxevm[4]; /* s(8,1) */ -+ -+ /* @DW5 : offset 20 */ -+ u8 eigenvalue[4]; /* @eigenvalue or eigenvalue of seg0 (in dB) */ -+ -+ /* @DW6 : ofset 24 */ -+ s8 rxsnr[4]; /* s(8,1) */ -+}; -+ -+__PACK struct phy_sts_rpt_jgr3_type5 { -+/* @Debug */ -+/* @DW0 ane DW1 : offset 0 and 4 */ -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 page_num : 4; -+ u8 pkt_cnt : 2; -+ u8 channel_msb : 2; -+#else -+ u8 channel_msb : 2; -+ u8 pkt_cnt : 2; -+ u8 page_num : 4; -+#endif -+ u8 pwdb[4]; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 l_rxsc : 4; -+ u8 ht_rxsc : 4; -+#else -+ u8 ht_rxsc : 4; -+ u8 l_rxsc : 4; -+#endif -+ u8 channel_lsb; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 band : 2; -+ u8 rsvd_0 : 2; -+ u8 gnt_bt : 1; -+ u8 ldpc : 1; -+ u8 stbc : 1; -+ u8 beamformed : 1; -+#else -+ u8 beamformed : 1; -+ u8 stbc : 1; -+ u8 ldpc : 1; -+ u8 gnt_bt : 1; -+ u8 rsvd_0 : 2; -+ u8 band : 2; -+#endif -+ /* @DW2 : offset 8 */ -+ u8 rsvd_1; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 rsvd_2 : 4; -+ u8 hw_antsw_occur_a : 1; -+ u8 hw_antsw_occur_b : 1; -+ u8 hw_antsw_occur_c : 1; -+ u8 hw_antsw_occur_d : 1; -+#else -+ u8 hw_antsw_occur_d : 1; -+ u8 hw_antsw_occur_c : 1; -+ u8 hw_antsw_occur_b : 1; -+ u8 hw_antsw_occur_a : 1; -+ u8 rsvd_2 : 4; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_a : 4; -+ u8 antidx_b : 4; -+#else -+ u8 antidx_b : 4; -+ u8 antidx_a : 4; -+#endif -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 antidx_c : 4; -+ u8 antidx_d : 4; -+#else -+ u8 antidx_d : 4; -+ u8 antidx_c : 4; -+#endif -+ /* @DW3 : offset 12 */ -+ u8 tx_pkt_cnt; -+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 inf_pos_0_A_flg : 1; -+ u8 inf_pos_1_A_flg : 1; -+ u8 inf_pos_0_B_flg : 1; -+ u8 inf_pos_1_B_flg : 1; -+ u8 inf_pos_0_C_flg : 1; -+ u8 inf_pos_1_C_flg : 1; -+ u8 inf_pos_0_D_flg : 1; -+ u8 inf_pos_1_D_flg : 1; -+#else -+ u8 inf_pos_1_D_flg : 1; -+ u8 inf_pos_0_D_flg : 1; -+ u8 inf_pos_1_C_flg : 1; -+ u8 inf_pos_0_C_flg : 1; -+ u8 inf_pos_1_B_flg : 1; -+ u8 inf_pos_0_B_flg : 1; -+ u8 inf_pos_1_A_flg : 1; -+ u8 inf_pos_0_A_flg : 1; -+#endif -+ u8 rsvd_3; -+ u8 rsvd_4; -+ /* @DW4 : offset 16 */ -+ u8 inf_pos_0_a; -+ u8 inf_pos_1_a; -+ u8 inf_pos_0_b; -+ u8 inf_pos_1_b; -+ /* @DW5 : offset 20 */ -+ u8 inf_pos_0_c; -+ u8 inf_pos_1_c; -+ u8 inf_pos_0_d; -+ u8 inf_pos_1_d; -+}; -+ -+__PACK struct phy_sts_rpt_jgr3_ofdm_cmn { -+ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 page_num : 4; -+ u8 pkt_cnt : 2; -+ u8 channel_msb : 2; -+ #else -+ u8 channel_msb : 2; -+ u8 pkt_cnt : 2; -+ u8 page_num : 4; -+ #endif -+ u8 pwdb[4]; -+ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 l_rxsc : 4; -+ u8 ht_rxsc : 4; -+ #else -+ u8 ht_rxsc : 4; -+ u8 l_rxsc : 4; -+ #endif -+ u8 channel_lsb; -+ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) -+ u8 band : 2; -+ u8 rsvd_0 : 2; -+ u8 gnt_bt : 1; -+ u8 ldpc : 1; -+ u8 stbc : 1; -+ u8 beamformed : 1; -+ #else -+ u8 beamformed : 1; -+ u8 stbc : 1; -+ u8 ldpc : 1; -+ u8 gnt_bt : 1; -+ u8 rsvd_0 : 1; -+ u8 band : 2; -+ #endif -+}; -+#endif /*@#ifdef PHYSTS_3RD_TYPE_SUPPORT*/ -+ -+#ifdef PHYDM_PHYSTAUS_AUTO_SWITCH -+void phydm_physts_auto_switch_jgr3_set(void *dm_void, boolean enable, -+ u8 bitmap_en); -+#endif -+ -+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) -+boolean -+phydm_query_is_mu_api(struct dm_struct *phydm, u8 ppdu_idx, u8 *p_data_rate, -+ u8 *p_gid); -+#endif -+ -+void phydm_reset_phystatus_avg(struct dm_struct *dm); -+ -+void phydm_reset_phystatus_statistic(struct dm_struct *dm); -+ -+void phydm_reset_rssi_for_dm(struct dm_struct *dm, u8 station_id); -+ -+void phydm_get_cck_rssi_table_from_reg(struct dm_struct *dm); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phydm_normal_driver_rx_sniffer( -+ struct dm_struct *dm, -+ u8 *desc, -+ PRT_RFD_STATUS rt_rfd_status, -+ u8 *drv_info, -+ u8 phy_status); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+s32 phydm_signal_scale_mapping(struct dm_struct *dm, s32 curr_sig); -+#endif -+ -+boolean odm_phy_status_query(struct dm_struct *dm, -+ struct phydm_phyinfo_struct *phy_info, -+ u8 *phy_sts, -+ struct phydm_perpkt_info_struct *pktinfo); -+ -+void phydm_rx_phy_status_init(void *dm_void); -+ -+void phydm_physts_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+#endif /*@#ifndef __HALHWOUTSRC_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_pmac_tx_setting.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_pmac_tx_setting.c -new file mode 100644 -index 000000000000..296f39c39975 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_pmac_tx_setting.c -@@ -0,0 +1,584 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef PHYDM_PMAC_TX_SETTING_SUPPORT -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+void phydm_start_cck_cont_tx_jgr3(void *dm_void, -+ struct phydm_pmac_info *tx_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ u8 rate = tx_info->tx_rate; /* HW rate */ -+ -+ /* if CCK block on? */ -+ if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(1))) -+ odm_set_bb_reg(dm, R_0x1c3c, BIT(1), 0x1); -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ odm_set_bb_reg(dm, R_0x2a08, BIT(21)|BIT(20), rate); -+ odm_set_bb_reg(dm, R_0x2a04, BIT(5), 0x0); /* turn on scrambler*/ -+ } else { -+ /* Turn Off All Test mode */ -+ odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x0); -+ -+ odm_set_bb_reg(dm, R_0x1a00, 0x3000, rate); -+ odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x2); /* transmit mode */ -+ odm_set_bb_reg(dm, R_0x1a00, BIT(3), 0x1); /* turn on scrambler*/ -+ -+ /* Fix rate selection issue */ -+ odm_set_bb_reg(dm, R_0x1a70, BIT(14), 0x1); -+ /* set RX weighting for path I & Q to 0 */ -+ odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x3); -+ /* set loopback mode */ -+ odm_set_bb_reg(dm, R_0x1c3c, BIT(4), 0x1); -+ } -+ pmac_tx->cck_cont_tx = true; -+ pmac_tx->ofdm_cont_tx = false; -+} -+ -+void phydm_stop_cck_cont_tx_jgr3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ -+ pmac_tx->cck_cont_tx = false; -+ pmac_tx->ofdm_cont_tx = false; -+ -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ /* @Disable pmac tx_en*/ -+ odm_set_bb_reg(dm, R_0x2a04, BIT(5), 0x0); /* turn on scrambler*/ -+ } else { -+ odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x0); /* normal mode */ -+ odm_set_bb_reg(dm, R_0x1a00, BIT(3), 0x1); /* turn on scrambler*/ -+ -+ /* back to default */ -+ odm_set_bb_reg(dm, R_0x1a70, BIT(14), 0x0); -+ odm_set_bb_reg(dm, R_0x1a14, 0x300, 0x0); -+ odm_set_bb_reg(dm, R_0x1c3c, BIT(4), 0x0); -+ } -+ /* BB Reset */ -+ odm_set_bb_reg(dm, R_0x1d0c, BIT(16), 0x0); -+ odm_set_bb_reg(dm, R_0x1d0c, BIT(16), 0x1); -+} -+ -+void phydm_start_ofdm_cont_tx_jgr3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ -+ /* 1. if OFDM block on */ -+ if (!odm_get_bb_reg(dm, R_0x1c3c, BIT(0))) -+ odm_set_bb_reg(dm, R_0x1c3c, BIT(0), 0x1); -+ if (!(dm->support_ic_type & ODM_RTL8723F)) { -+ -+ /* 2. set CCK test mode off, set to CCK normal mode */ -+ odm_set_bb_reg(dm, R_0x1a00, 0x3, 0x0); -+ -+ /* 3. turn on scramble setting */ -+ odm_set_bb_reg(dm, R_0x1a00, BIT(3), 0x1); -+ } -+ /* 4. Turn On Continue Tx and turn off the other test modes. */ -+ odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x1); -+ -+ pmac_tx->cck_cont_tx = false; -+ pmac_tx->ofdm_cont_tx = true; -+} -+ -+void phydm_stop_ofdm_cont_tx_jgr3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ -+ pmac_tx->cck_cont_tx = false; -+ pmac_tx->ofdm_cont_tx = false; -+ -+ /* Turn Off All Test mode */ -+ odm_set_bb_reg(dm, R_0x1ca4, 0x7, 0x0); -+ -+ /* Delay 10 ms */ -+ ODM_delay_ms(10); -+ -+ /* BB Reset */ -+ odm_set_bb_reg(dm, R_0x1d0c, BIT(16), 0x0); -+ odm_set_bb_reg(dm, R_0x1d0c, BIT(16), 0x1); -+} -+ -+void phydm_stop_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ u32 tmp = 0; -+ -+ odm_set_bb_reg(dm, R_0x1e70, 0xf, 0x2); /* TX Stop */ -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ if (tx_info->mode == CONT_TX) { -+ if (pmac_tx->is_cck_rate) { -+ /* TX Stop */ -+ odm_set_bb_reg(dm, R_0x2a00, BIT(0), 0x1); -+ /* Clear BB cont tx */ -+ odm_set_bb_reg(dm, R_0x2a00, BIT(28), 0x0); -+ /* Clear PMAC cont tx */ -+ odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x0); -+ /* Clear TX Stop */ -+ odm_set_bb_reg(dm, R_0x2a00, BIT(0), 0x0); -+ phydm_stop_cck_cont_tx_jgr3(dm); -+ } else -+ phydm_stop_ofdm_cont_tx_jgr3(dm); -+ } else { -+ if (pmac_tx->is_cck_rate) { -+ /* packet_count = 0x1 */ -+ odm_set_bb_reg(dm, R_0x2a04, 0x03ff0000, 0x1); -+ /* @Disable pmac tx_en*/ -+ odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); -+ /* @Enable pmac tx_en*/ -+ odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); -+ phydm_stop_cck_cont_tx_jgr3(dm); -+ } -+ } -+ }else { -+ if (tx_info->mode == CONT_TX) { -+ if (pmac_tx->is_cck_rate) -+ phydm_stop_cck_cont_tx_jgr3(dm); -+ else -+ phydm_stop_ofdm_cont_tx_jgr3(dm); -+ } -+ } -+} -+ -+void phydm_set_mac_phy_txinfo_jgr3(void *dm_void, -+ struct phydm_pmac_info *tx_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ u32 tmp = 0; -+ -+ odm_set_bb_reg(dm, R_0xa58, 0x003f8000, tx_info->tx_rate); -+ -+ /*0x900[1] ndp_sound */ -+ odm_set_bb_reg(dm, R_0x900, BIT(1), tx_info->ndp_sound); -+ -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ tx_info->m_stbc = tx_info->m_stbc - 1; -+ #endif -+ /*0x900[27:24] txsc [29:28] bw [31:30] m_stbc */ -+ tmp = (tx_info->tx_sc) | ((tx_info->bw) << 4) | -+ ((tx_info->m_stbc) << 6); -+ odm_set_bb_reg(dm, R_0x900, 0xff000000, tmp); -+ -+ if (tx_info->tx_sc == 1) /*upper*/ -+ odm_set_bb_reg(dm, R_0x1ae0, 0x7000, 0x5); -+ else if (tx_info->tx_sc == 2) /*lower*/ -+ odm_set_bb_reg(dm, R_0x1ae0, 0x7000, 0x6); -+ else /* duplicate*/ -+ odm_set_bb_reg(dm, R_0x1ae0, 0x7000, 0x0); -+ -+ if (pmac_tx->is_ht_rate) { -+ odm_set_bb_reg(dm, R_0x900, BIT(0), 0x1); -+ odm_set_bb_reg(dm, R_0x900, BIT(2), 0x0); -+ } else if (pmac_tx->is_vht_rate) { -+ odm_set_bb_reg(dm, R_0x900, BIT(0), 0x0); -+ odm_set_bb_reg(dm, R_0x900, BIT(2), 0x1); -+ } else { -+ odm_set_bb_reg(dm, R_0x900, BIT(0), 0x0); -+ odm_set_bb_reg(dm, R_0x900, BIT(2), 0x0); -+ } -+ -+ /* for TX interval */ -+ odm_set_bb_reg(dm, R_0x9b8, MASKHWORD, tx_info->packet_period); -+} -+ -+void phydm_set_sig_jgr3(void *dm_void, struct phydm_pmac_info *tx_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ u32 tmp = 0; -+ -+ if (pmac_tx->is_cck_rate) -+ return; -+ -+ odm_set_bb_reg(dm, R_0x1eb4, 0xfffff, tx_info->packet_count); -+ -+ /* L-SIG */ -+ tmp = BYTE_2_DWORD(0, tx_info->lsig[2], tx_info->lsig[1], -+ tx_info->lsig[0]); -+ odm_set_bb_reg(dm, R_0x908, 0xffffff, tmp); -+ if (pmac_tx->is_ht_rate) { -+ /* HT SIG */ -+ tmp = BYTE_2_DWORD(0, tx_info->ht_sig[2], tx_info->ht_sig[1], -+ tx_info->ht_sig[0]); -+ odm_set_bb_reg(dm, R_0x90c, 0xffffff, tmp); -+ tmp = BYTE_2_DWORD(0, tx_info->ht_sig[5], tx_info->ht_sig[4], -+ tx_info->ht_sig[3]); -+ odm_set_bb_reg(dm, R_0x910, 0xffffff, tmp); -+ } else if (pmac_tx->is_vht_rate) { -+ /* VHT SIG A/B/serv_field/delimiter */ -+ tmp = BYTE_2_DWORD(0, tx_info->vht_sig_a[2], -+ tx_info->vht_sig_a[1], -+ tx_info->vht_sig_a[0]); -+ odm_set_bb_reg(dm, R_0x90c, 0xffffff, tmp); -+ tmp = BYTE_2_DWORD(0, tx_info->vht_sig_a[5], -+ tx_info->vht_sig_a[4], -+ tx_info->vht_sig_a[3]); -+ odm_set_bb_reg(dm, R_0x910, 0xffffff, tmp); -+ tmp = BYTE_2_DWORD(tx_info->vht_sig_b[3], tx_info->vht_sig_b[2], -+ tx_info->vht_sig_b[1], -+ tx_info->vht_sig_b[0]); -+ odm_set_bb_reg(dm, R_0x914, 0x1fffffff, tmp); -+ odm_set_bb_reg(dm, R_0x938, 0xff00, tx_info->vht_sig_b_crc); -+ -+ tmp = BYTE_2_DWORD(tx_info->vht_delimiter[3], -+ tx_info->vht_delimiter[2], -+ tx_info->vht_delimiter[1], -+ tx_info->vht_delimiter[0]); -+ odm_set_bb_reg(dm, R_0x940, MASKDWORD, tmp); -+ } -+} -+ -+void phydm_set_cck_preamble_hdr_jgr3(void *dm_void, -+ struct phydm_pmac_info *tx_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ u32 tmp = 0; -+ u8 rate = tx_info->tx_rate; /* HW rate */ -+ -+ if (!pmac_tx->is_cck_rate) -+ return; -+ -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ #if (RTL8723F_SUPPORT) -+ odm_set_bb_reg(dm, R_0x2a04, 0x03ff0000, tx_info->packet_count); -+ odm_set_bb_reg(dm, R_0x2a08, BIT(22), tx_info->service_field_bit2); -+ odm_set_bb_reg(dm, R_0x2a08, BIT(21) | BIT(20), rate); -+ odm_set_bb_reg(dm, R_0x2a08, 0x1ffff, tx_info->packet_length); -+ /* turn on scrambler */ -+ odm_set_bb_reg(dm, R_0x2a04, BIT(5), 0x0); -+ -+ if (tx_info->is_short_preamble) -+ odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x1); -+ else -+ odm_set_bb_reg(dm, R_0x2a08, BIT(19), 0x0); -+ #endif -+ } else { -+ tmp = tx_info->packet_count | (tx_info->sfd << 16); -+ odm_set_bb_reg(dm, R_0x1e64, MASKDWORD, tmp); -+ tmp = tx_info->signal_field | (tx_info->service_field << 8) | -+ (tx_info->length << 16); -+ odm_set_bb_reg(dm, R_0x1e68, MASKDWORD, tmp); -+ tmp = BYTE_2_DWORD(0, 0, tx_info->crc16[1], tx_info->crc16[0]); -+ odm_set_bb_reg(dm, R_0x1e6c, MASKLWORD, tmp); -+ -+ if (tx_info->is_short_preamble) -+ odm_set_bb_reg(dm, R_0x1e6c, BIT(16), 0x0); -+ else -+ odm_set_bb_reg(dm, R_0x1e6c, BIT(16), 0x1); -+ } -+} -+ -+void phydm_set_mode_jgr3(void *dm_void, struct phydm_pmac_info *tx_info, -+ enum phydm_pmac_mode mode) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ -+ if (mode == CONT_TX) { -+ tx_info->packet_count = 1; -+ -+ if (pmac_tx->is_cck_rate) -+ phydm_start_cck_cont_tx_jgr3(dm, tx_info); -+ else -+ phydm_start_ofdm_cont_tx_jgr3(dm); -+ } -+} -+ -+void phydm_set_pmac_txon_jgr3(void *dm_void, struct phydm_pmac_info *tx_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ -+ odm_set_bb_reg(dm, R_0x1d08, BIT(0), 0x1); /*Turn on PMAC */ -+ -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ if (pmac_tx->is_cck_rate) { -+ if (tx_info->mode == CONT_TX) { -+ /* BB and PMAC cont tx */ -+ odm_set_bb_reg(dm, R_0x2a08, BIT(17), 0x1); -+ odm_set_bb_reg(dm, R_0x2a00, BIT(28), 0x1); -+ } -+ /* TX CCK ON */ -+ odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x0); -+ odm_set_bb_reg(dm, R_0x2a08, BIT(31), 0x1); -+ } else { -+ odm_set_bb_reg(dm, R_0x1e70, 0xf, 0x0); /*TX Ofdm OFF */ -+ odm_set_bb_reg(dm, R_0x1e70, 0xf, 0x4); /*TX Ofdm ON */ -+ } -+ } else { -+ /*mac scramble seed setting, only in 8198F */ -+ #if (RTL8198F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8198F) -+ if (!odm_get_bb_reg(dm, R_0x1d10, BIT(16))) -+ odm_set_bb_reg(dm, R_0x1d10, BIT(16), 0x1); -+ #endif -+ -+ if (pmac_tx->is_cck_rate){ -+ odm_set_bb_reg(dm, R_0x1e70, 0xf, 0x8); /*TX CCK ON */ -+ odm_set_bb_reg(dm, R_0x1a84, BIT(31), 0x0); -+ } else { -+ odm_set_bb_reg(dm, R_0x1e70, 0xf, 0x4); /*TX Ofdm ON */ -+ } -+ } -+} -+ -+void phydm_set_pmac_tx_jgr3(void *dm_void, struct phydm_pmac_info *tx_info, -+ enum rf_path mpt_rf_path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_tx *pmac_tx = &dm->dm_pmac_tx_table; -+ -+ pmac_tx->is_cck_rate = phydm_is_cck_rate(dm, tx_info->tx_rate); -+ pmac_tx->is_ofdm_rate = phydm_is_ofdm_rate(dm, tx_info->tx_rate); -+ pmac_tx->is_ht_rate = phydm_is_ht_rate(dm, tx_info->tx_rate); -+ pmac_tx->is_vht_rate = phydm_is_vht_rate(dm, tx_info->tx_rate); -+ pmac_tx->path = mpt_rf_path; -+ -+ if (!tx_info->en_pmac_tx) { -+ phydm_stop_pmac_tx_jgr3(dm, tx_info); -+ return; -+ } -+ -+ phydm_set_mode_jgr3(dm, tx_info, tx_info->mode); -+ -+ if (pmac_tx->is_cck_rate) -+ phydm_set_cck_preamble_hdr_jgr3(dm, tx_info); -+ else -+ phydm_set_sig_jgr3(dm, tx_info); -+ -+ phydm_set_mac_phy_txinfo_jgr3(dm, tx_info); -+ phydm_set_pmac_txon_jgr3(dm, tx_info); -+} -+ -+void phydm_set_tmac_tx_jgr3(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /* Turn on TMAC */ -+ if (odm_get_bb_reg(dm, R_0x1d08, BIT(0))) -+ odm_set_bb_reg(dm, R_0x1d08, BIT(0), 0x0); -+ -+ /* mac scramble seed setting, only in 8198F */ -+ #if (RTL8198F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8198F) -+ if (odm_get_bb_reg(dm, R_0x1d10, BIT(16))) -+ odm_set_bb_reg(dm, R_0x1d10, BIT(16), 0x0); -+ #endif -+ -+ /* Turn on TMAC CCK */ -+ if (!(dm->support_ic_type & ODM_RTL8723F)) { -+ if (!odm_get_bb_reg(dm, R_0x1a84, BIT(31))) -+ odm_set_bb_reg(dm, R_0x1a84, BIT(31), 0x1); -+ } -+} -+#endif -+ -+void phydm_start_cck_cont_tx(void *dm_void, struct phydm_pmac_info *tx_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_start_cck_cont_tx_jgr3(dm, tx_info); -+ #endif -+} -+ -+void phydm_stop_cck_cont_tx(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_stop_cck_cont_tx_jgr3(dm); -+ #endif -+} -+ -+void phydm_start_ofdm_cont_tx(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_start_ofdm_cont_tx_jgr3(dm); -+ #endif -+} -+ -+void phydm_stop_ofdm_cont_tx(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_stop_ofdm_cont_tx_jgr3(dm); -+ #endif -+} -+ -+void phydm_set_pmac_tx(void *dm_void, struct phydm_pmac_info *tx_info, -+ enum rf_path mpt_rf_path) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_set_pmac_tx_jgr3(dm, tx_info, mpt_rf_path); -+ #endif -+} -+ -+void phydm_set_tmac_tx(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ phydm_set_tmac_tx_jgr3(dm); -+ #endif -+} -+ -+void phydm_pmac_tx_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pmac_info tx_info; -+ char help[] = "-h"; -+ char dbg_buf[PHYDM_SNPRINT_SIZE] = {0}; -+ u32 var[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ u32 tx_cnt = 0x0; -+ u8 poll_cnt = 0x0; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var[0]); -+ -+ if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES)) -+ return; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[pmac_tx] basic : {1} {rate_idx}(only 1M & 6M) {count}\n"); -+ } else { -+ for (i = 1; i < 7; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var[i]); -+ } -+ } -+ -+ tx_info.en_pmac_tx = true; -+ tx_info.mode = PKTS_TX; -+ tx_info.ndp_sound = false; -+ tx_info.bw = CHANNEL_WIDTH_20; -+ tx_info.tx_sc = 0x0; /*duplicate*/ -+ tx_info.m_stbc = 0x0; /*disable*/ -+ tx_info.packet_period = 2000; /*d'500 us*/ -+ tx_info.tx_rate = (u8)var[1]; -+ tx_info.packet_count = (u32)var[2]; -+ -+ if (tx_info.tx_rate == ODM_RATE1M) { -+ tx_info.signal_field = 0xa; /*rate = 1M*/ -+ tx_info.service_field = 0x0; -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ tx_info.service_field_bit2= 0x1; -+ tx_info.packet_length = 1000; /*1000 bytes*/ -+ } -+ tx_info.length = 8000; /*d'8000 us=1000 bytes*/ -+ tx_info.crc16[0] = 0x60; -+ tx_info.crc16[1] = 0x8e; -+ /*long preamble*/ -+ tx_info.is_short_preamble = false; -+ tx_info.sfd = 0xf3a0; -+ } else if (tx_info.tx_rate == ODM_RATE6M) { -+ /*l-sig[3:0] = rate = 6M = 0xb*/ -+ /*l-sig[16:5] = length = 1000 bytes*/ -+ /*l-sig[17] = parity = 1*/ -+ tx_info.lsig[0] = 0xb; -+ tx_info.lsig[1] = 0x7d; -+ tx_info.lsig[2] = 0x2; -+ } -+ phydm_print_rate_2_buff(dm, tx_info.tx_rate, dbg_buf, -+ PHYDM_SNPRINT_SIZE); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "rate=%s, count=%d, pkt_interval=500(us), length=1000(bytes)\n", -+ dbg_buf, tx_info.packet_count); -+ -+ if (phydm_stop_ic_trx(dm, PHYDM_SET) == PHYDM_SET_FAIL) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "check trx idle failed, please try again.\n"); -+ return; -+ } -+ -+ phydm_reset_bb_hw_cnt(dm); -+ phydm_set_pmac_tx_jgr3(dm, &tx_info, RF_PATH_A); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pmac_tx enabled, please wait for tx_cnt = %d\n", -+ tx_info.packet_count); -+ while (1) { -+ if (phydm_is_cck_rate(dm, tx_info.tx_rate)) -+ tx_cnt = odm_get_bb_reg(dm, R_0x2de4, -+ MASKLWORD); -+ else -+ tx_cnt = odm_get_bb_reg(dm, R_0x2de0, -+ MASKLWORD); -+ -+ if (tx_cnt >= tx_info.packet_count || poll_cnt >= 10) -+ break; -+ -+ ODM_delay_ms(100); -+ poll_cnt++; -+ } -+ -+ if (tx_cnt < tx_info.packet_count) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "polling time out(1s), tx_cnt = %d\n", tx_cnt); -+ else -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "pmac_tx finished, poll_cnt = %d\n", poll_cnt); -+ -+ tx_info.en_pmac_tx = false; -+ phydm_set_pmac_tx(dm, &tx_info, RF_PATH_A); -+ phydm_set_tmac_tx(dm); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Stop pmac_tx and turn on true mac mode.\n"); -+ -+ phydm_stop_ic_trx(dm, PHYDM_REVERT); -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+#endif -\ No newline at end of file -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_pmac_tx_setting.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_pmac_tx_setting.h -new file mode 100644 -index 000000000000..532219ba66b1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_pmac_tx_setting.h -@@ -0,0 +1,111 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_PMAC_TX_SETTING_H__ -+#define __PHYDM_PMAC_TX_SETTING_H__ -+ -+/*2020.03.16 Fix TxInfo content in B mode*/ -+#define PMAC_TX_SETTING_VERSION "2.1" -+ -+/* 1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+ -+/* 1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+struct phydm_pmac_info { -+ u8 en_pmac_tx:1; /*0: disable pmac 1: enable pmac */ -+ u8 mode:3; /*0: Packet TX 3:Continuous TX */ -+ u8 tx_rate; /*should be HW rate*/ -+ u8 tx_sc; -+ u8 is_short_preamble:1; -+ u8 ndp_sound:1; -+ u8 bw:3; /* 0:20 1:40 2:80Mhz */ -+ u8 m_stbc; /* bSTBC + 1 for WIN/CE, bSTBC for others*/ -+ u16 packet_period; -+ u32 packet_count; -+ u32 packet_length; -+ u8 packet_pattern; -+ u16 sfd; -+ u8 signal_field; -+ u8 service_field; -+ u8 service_field_bit2:1; -+ u16 length; -+ u8 crc16[2]; -+ u8 lsig[3]; -+ u8 ht_sig[6]; -+ u8 vht_sig_a[6]; -+ u8 vht_sig_b[4]; -+ u8 vht_sig_b_crc; -+ u8 vht_delimiter[4]; -+}; -+ -+struct phydm_pmac_tx { -+ boolean is_cck_rate; -+ boolean is_ofdm_rate; -+ boolean is_ht_rate; -+ boolean is_vht_rate; -+ boolean cck_cont_tx; -+ boolean ofdm_cont_tx; -+ u8 path; -+}; -+ -+/* 1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ */ -+ -+enum phydm_pmac_mode { -+ NONE_TEST, -+ PKTS_TX, -+ PKTS_RX, -+ CONT_TX, -+ OFDM_SINGLE_TONE_TX, -+ CCK_CARRIER_SIPPRESSION_TX -+}; -+ -+/* 1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ */ -+void phydm_start_cck_cont_tx(void *dm_void, struct phydm_pmac_info *tx_info); -+ -+void phydm_stop_cck_cont_tx(void *dm_void); -+ -+void phydm_start_ofdm_cont_tx(void *dm_void); -+ -+void phydm_stop_ofdm_cont_tx(void *dm_void); -+ -+void phydm_set_pmac_tx(void *dm_void, struct phydm_pmac_info *tx_info, -+ enum rf_path mpt_rf_path); -+ -+void phydm_set_tmac_tx(void *dm_void); -+ -+void phydm_pmac_tx_dbg(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_pow_train.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_pow_train.c -new file mode 100644 -index 000000000000..56bc2411d252 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_pow_train.c -@@ -0,0 +1,171 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/************************************************************* -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef PHYDM_POWER_TRAINING_SUPPORT -+void phydm_reset_pt_para(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pow_train_stuc *pt_t = &dm->pow_train_table; -+ -+ pt_t->pow_train_score = 0; -+} -+ -+void phydm_update_power_training_state(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pow_train_stuc *pt_t = &dm->pow_train_table; -+ struct phydm_fa_struct *fa_cnt = &dm->false_alm_cnt; -+ struct ccx_info *ccx = &dm->dm_ccx_info; -+ u32 pt_score_tmp = ENABLE_PT_SCORE; -+ u32 crc_ok_cnt = 0; -+ u32 cca_cnt = 0; -+ -+ /*@is_disable_power_training is the key to H2C to disable/enable PT*/ -+ /*@if is_disable_power_training == 1, it will use largest power*/ -+ if (!(dm->support_ability & ODM_BB_PWR_TRAIN) || !dm->is_linked) { -+ dm->is_disable_power_training = true; -+ phydm_reset_pt_para(dm); -+ return; -+ } -+ -+ PHYDM_DBG(dm, DBG_PWR_TRAIN, "%s ======>\n", __func__); -+ -+ if (pt_t->pt_state == DISABLE_POW_TRAIN) { -+ dm->is_disable_power_training = true; -+ phydm_reset_pt_para(dm); -+ PHYDM_DBG(dm, DBG_PWR_TRAIN, "Disable PT\n"); -+ return; -+ -+ } else if (pt_t->pt_state == ENABLE_POW_TRAIN) { -+ dm->is_disable_power_training = false; -+ phydm_reset_pt_para(dm); -+ PHYDM_DBG(dm, DBG_PWR_TRAIN, "Enable PT\n"); -+ return; -+ -+ } else if (pt_t->pt_state == DYNAMIC_POW_TRAIN) { -+ PHYDM_DBG(dm, DBG_PWR_TRAIN, "Dynamic PT\n"); -+ -+ /* @Compute score */ -+ crc_ok_cnt = dm->phy_dbg_info.num_qry_phy_status_ofdm + -+ dm->phy_dbg_info.num_qry_phy_status_cck; -+ cca_cnt = fa_cnt->cnt_cca_all; -+#if 0 -+ if (crc_ok_cnt > cca_cnt) { /*invalid situation*/ -+ pt_score_tmp = KEEP_PRE_PT_SCORE; -+ return; -+ } else if ((crc_ok_cnt + (crc_ok_cnt >> 1)) <= cca_cnt) { -+ /* @???crc_ok <= (2/3)*cca */ -+ pt_score_tmp = DISABLE_PT_SCORE; -+ dm->is_disable_power_training = true; -+ } else if ((crc_ok_cnt + (crc_ok_cnt >> 2)) <= cca_cnt) { -+ /* @???crc_ok <= (4/5)*cca */ -+ pt_score_tmp = KEEP_PRE_PT_SCORE; -+ } else { -+ /* @???crc_ok > (4/5)*cca */ -+ pt_score_tmp = ENABLE_PT_SCORE; -+ dm->is_disable_power_training = false; -+ } -+#endif -+ if (ccx->nhm_ratio > 10) { -+ pt_score_tmp = DISABLE_PT_SCORE; -+ dm->is_disable_power_training = true; -+ } else if (ccx->nhm_ratio < 5) { -+ pt_score_tmp = ENABLE_PT_SCORE; -+ dm->is_disable_power_training = false; -+ } else { -+ pt_score_tmp = KEEP_PRE_PT_SCORE; -+ } -+ -+ PHYDM_DBG(dm, DBG_PWR_TRAIN, -+ "pkt_cnt{ofdm,cck,all} = {%d, %d, %d}, cnt_cca_all=%d\n", -+ dm->phy_dbg_info.num_qry_phy_status_ofdm, -+ dm->phy_dbg_info.num_qry_phy_status_cck, -+ crc_ok_cnt, cca_cnt); -+ -+ PHYDM_DBG(dm, DBG_PWR_TRAIN, "pt_score_tmp=%d\n", pt_score_tmp); -+ -+ /* smoothing */ -+ pt_t->pow_train_score = (pt_score_tmp << 4) + -+ (pt_t->pow_train_score >> 1) + -+ (pt_t->pow_train_score >> 2); -+ -+ pt_score_tmp = (pt_t->pow_train_score + 32) >> 6; -+ -+ PHYDM_DBG(dm, DBG_PWR_TRAIN, -+ "pow_train_score = %d, score after smoothing = %d, is_disable_PT = %d\n", -+ pt_t->pow_train_score, pt_score_tmp, -+ dm->is_disable_power_training); -+ } else { -+ PHYDM_DBG(dm, DBG_PWR_TRAIN, "[%s]warning\n", __func__); -+ } -+} -+ -+void phydm_pow_train_debug( -+ void *dm_void, -+ char input[][16], -+ u32 *_used, -+ char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pow_train_stuc *pt_t = &dm->pow_train_table; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 i; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{0: Auto PT, 1:enable, 2: disable}\n"); -+ } else { -+ for (i = 0; i < 10; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]); -+ } -+ -+ if (var1[0] == 0) -+ pt_t->pt_state = DYNAMIC_POW_TRAIN; -+ else if (var1[0] == 1) -+ pt_t->pt_state = ENABLE_POW_TRAIN; -+ else if (var1[0] == 2) -+ pt_t->pt_state = DISABLE_POW_TRAIN; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "PT state = %d\n", pt_t->pt_state); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_pow_train.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_pow_train.h -new file mode 100644 -index 000000000000..f966607aa48e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_pow_train.h -@@ -0,0 +1,84 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_POW_TRAIN_H__ -+#define __PHYDM_POW_TRAIN_H__ -+ -+#define POW_TRAIN_VERSION "1.0" /* @2017.07.0141 Dino, Add phydm_pow_train.h*/ -+ -+/**************************************************************** -+ * 1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ ***************************************************************/ -+ -+#ifdef PHYDM_POWER_TRAINING_SUPPORT -+/**************************************************************** -+ * 1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ ***************************************************************/ -+ -+struct phydm_pow_train_stuc { -+ u8 pt_state; -+ u32 pow_train_score; -+}; -+ -+/**************************************************************** -+ * 1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ ***************************************************************/ -+ -+enum pow_train_state { -+ DYNAMIC_POW_TRAIN = 0, -+ ENABLE_POW_TRAIN = 1, -+ DISABLE_POW_TRAIN = 2 -+}; -+ -+enum power_training_score { -+ DISABLE_PT_SCORE = 0, -+ KEEP_PRE_PT_SCORE = 1, -+ ENABLE_PT_SCORE = 2 -+}; -+ -+/**************************************************************** -+ * 1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ ***************************************************************/ -+ -+void phydm_update_power_training_state( -+ void *dm_void); -+ -+void phydm_pow_train_debug( -+ void *dm_void, -+ char input[][16], -+ u32 *_used, -+ char *output, -+ u32 *_out_len); -+ -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_pre_define.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_pre_define.h -new file mode 100644 -index 000000000000..f3fdfaf6c104 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_pre_define.h -@@ -0,0 +1,1020 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMPREDEFINE_H__ -+#define __PHYDMPREDEFINE_H__ -+ -+/**************************************************************** -+ * 1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ ***************************************************************/ -+ -+#define PHYDM_CODE_BASE "PHYDM_V049" -+#define PHYDM_RELEASE_DATE "20200720.0" -+ -+/*PHYDM API status*/ -+#define PHYDM_SET_FAIL 0 -+#define PHYDM_SET_SUCCESS 1 -+#define PHYDM_SET_NO_NEED 3 -+ -+/*PHYDM Set/Revert*/ -+#define PHYDM_SET 1 -+#define PHYDM_REVERT 2 -+ -+/* @Max path of IC */ -+/*N-IC*/ -+#define MAX_PATH_NUM_8188E 1 -+#define MAX_PATH_NUM_8188F 1 -+#define MAX_PATH_NUM_8710B 1 -+#define MAX_PATH_NUM_8723B 1 -+#define MAX_PATH_NUM_8723D 1 -+#define MAX_PATH_NUM_8703B 1 -+#define MAX_PATH_NUM_8192E 2 -+#define MAX_PATH_NUM_8192F 2 -+#define MAX_PATH_NUM_8197F 2 -+#define MAX_PATH_NUM_8198F 4 -+#define MAX_PATH_NUM_8197G 2 -+#define MAX_PATH_NUM_8721D 1 -+#define MAX_PATH_NUM_8710C 1 -+#define MAX_PATH_NUM_8723F 2 -+ -+/*@AC-IC*/ -+#define MAX_PATH_NUM_8821A 1 -+#define MAX_PATH_NUM_8881A 1 -+#define MAX_PATH_NUM_8821C 1 -+#define MAX_PATH_NUM_8195B 1 -+#define MAX_PATH_NUM_8812A 2 -+#define MAX_PATH_NUM_8822B 2 -+#define MAX_PATH_NUM_8822C 2 -+#define MAX_PATH_NUM_8814A 4 -+#define MAX_PATH_NUM_8814B 4 -+#define MAX_PATH_NUM_8814C 4 -+#define MAX_PATH_NUM_8195B 1 -+#define MAX_PATH_NUM_8812F 2 -+ -+/* @Max RF path */ -+#define PHYDM_MAX_RF_PATH_N 2 /*@For old N-series IC*/ -+#define PHYDM_MAX_RF_PATH 4 -+ -+/* number of entry */ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ #ifdef DM_ODM_CE_MAC80211 -+ /* @defined in wifi.h (32+1) */ -+ #else -+ #define ASSOCIATE_ENTRY_NUM MACID_NUM_SW_LIMIT /* @Max size of asoc_entry[].*/ -+ #endif -+ #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM -+#elif(DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ #define ASSOCIATE_ENTRY_NUM NUM_STAT -+ #define ODM_ASSOCIATE_ENTRY_NUM (ASSOCIATE_ENTRY_NUM + 1) -+#elif(DM_ODM_SUPPORT_TYPE & (ODM_IOT)) -+ #ifdef CONFIG_CONCURRENT_MODE -+ #define ASSOCIATE_ENTRY_NUM NUM_STA + 2 /*@2 is for station mod*/ -+ #else -+ #define ASSOCIATE_ENTRY_NUM NUM_STA /*@8 is for max size of asoc_entry[].*/ -+ #endif -+ #define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM -+#else -+ #define ODM_ASSOCIATE_ENTRY_NUM (((ASSOCIATE_ENTRY_NUM + 1) * 3) + 1) -+#endif -+ -+/* @-----MGN rate--------------------------------- */ -+ -+enum PDM_RATE_TYPE { -+ PDM_1SS = 1, /*VHT/HT 1SS*/ -+ PDM_2SS = 2, /*VHT/HT 2SS*/ -+ PDM_3SS = 3, /*VHT/HT 3SS*/ -+ PDM_4SS = 4, /*VHT/HT 4SS*/ -+ PDM_CCK = 11, /*@B*/ -+ PDM_OFDM = 12 /*@G*/ -+}; -+ -+enum ODM_MGN_RATE { -+ ODM_MGN_1M = 0x02, -+ ODM_MGN_2M = 0x04, -+ ODM_MGN_5_5M = 0x0B, -+ ODM_MGN_6M = 0x0C, -+ ODM_MGN_9M = 0x12, -+ ODM_MGN_11M = 0x16, -+ ODM_MGN_12M = 0x18, -+ ODM_MGN_18M = 0x24, -+ ODM_MGN_24M = 0x30, -+ ODM_MGN_36M = 0x48, -+ ODM_MGN_48M = 0x60, -+ ODM_MGN_54M = 0x6C, -+ ODM_MGN_MCS32 = 0x7F, -+ ODM_MGN_MCS0 = 0x80, -+ ODM_MGN_MCS1, -+ ODM_MGN_MCS2, -+ ODM_MGN_MCS3, -+ ODM_MGN_MCS4, -+ ODM_MGN_MCS5, -+ ODM_MGN_MCS6, -+ ODM_MGN_MCS7 = 0x87, -+ ODM_MGN_MCS8, -+ ODM_MGN_MCS9, -+ ODM_MGN_MCS10, -+ ODM_MGN_MCS11, -+ ODM_MGN_MCS12, -+ ODM_MGN_MCS13, -+ ODM_MGN_MCS14, -+ ODM_MGN_MCS15, -+ ODM_MGN_MCS16 = 0x90, -+ ODM_MGN_MCS17, -+ ODM_MGN_MCS18, -+ ODM_MGN_MCS19, -+ ODM_MGN_MCS20, -+ ODM_MGN_MCS21, -+ ODM_MGN_MCS22, -+ ODM_MGN_MCS23, -+ ODM_MGN_MCS24 = 0x98, -+ ODM_MGN_MCS25, -+ ODM_MGN_MCS26, -+ ODM_MGN_MCS27, -+ ODM_MGN_MCS28, -+ ODM_MGN_MCS29, -+ ODM_MGN_MCS30, -+ ODM_MGN_MCS31, -+ ODM_MGN_VHT1SS_MCS0 = 0xa0, -+ ODM_MGN_VHT1SS_MCS1, -+ ODM_MGN_VHT1SS_MCS2, -+ ODM_MGN_VHT1SS_MCS3, -+ ODM_MGN_VHT1SS_MCS4, -+ ODM_MGN_VHT1SS_MCS5, -+ ODM_MGN_VHT1SS_MCS6, -+ ODM_MGN_VHT1SS_MCS7, -+ ODM_MGN_VHT1SS_MCS8, -+ ODM_MGN_VHT1SS_MCS9, -+ ODM_MGN_VHT2SS_MCS0 = 0xaa, -+ ODM_MGN_VHT2SS_MCS1 = 0xab, -+ ODM_MGN_VHT2SS_MCS2, -+ ODM_MGN_VHT2SS_MCS3, -+ ODM_MGN_VHT2SS_MCS4, -+ ODM_MGN_VHT2SS_MCS5 = 0xaf, -+ ODM_MGN_VHT2SS_MCS6 = 0xb0, -+ ODM_MGN_VHT2SS_MCS7, -+ ODM_MGN_VHT2SS_MCS8, -+ ODM_MGN_VHT2SS_MCS9 = 0xb3, -+ ODM_MGN_VHT3SS_MCS0 = 0xb4, -+ ODM_MGN_VHT3SS_MCS1, -+ ODM_MGN_VHT3SS_MCS2, -+ ODM_MGN_VHT3SS_MCS3, -+ ODM_MGN_VHT3SS_MCS4, -+ ODM_MGN_VHT3SS_MCS5, -+ ODM_MGN_VHT3SS_MCS6, -+ ODM_MGN_VHT3SS_MCS7 = 0xbb, -+ ODM_MGN_VHT3SS_MCS8 = 0xbc, -+ ODM_MGN_VHT3SS_MCS9 = 0xbd, -+ ODM_MGN_VHT4SS_MCS0 = 0xbe, -+ ODM_MGN_VHT4SS_MCS1, -+ ODM_MGN_VHT4SS_MCS2, -+ ODM_MGN_VHT4SS_MCS3, -+ ODM_MGN_VHT4SS_MCS4, -+ ODM_MGN_VHT4SS_MCS5, -+ ODM_MGN_VHT4SS_MCS6, -+ ODM_MGN_VHT4SS_MCS7, -+ ODM_MGN_VHT4SS_MCS8, -+ ODM_MGN_VHT4SS_MCS9 = 0xc7, -+ ODM_MGN_UNKNOWN -+}; -+ -+#define ODM_MGN_MCS0_SG 0xc0 -+#define ODM_MGN_MCS1_SG 0xc1 -+#define ODM_MGN_MCS2_SG 0xc2 -+#define ODM_MGN_MCS3_SG 0xc3 -+#define ODM_MGN_MCS4_SG 0xc4 -+#define ODM_MGN_MCS5_SG 0xc5 -+#define ODM_MGN_MCS6_SG 0xc6 -+#define ODM_MGN_MCS7_SG 0xc7 -+#define ODM_MGN_MCS8_SG 0xc8 -+#define ODM_MGN_MCS9_SG 0xc9 -+#define ODM_MGN_MCS10_SG 0xca -+#define ODM_MGN_MCS11_SG 0xcb -+#define ODM_MGN_MCS12_SG 0xcc -+#define ODM_MGN_MCS13_SG 0xcd -+#define ODM_MGN_MCS14_SG 0xce -+#define ODM_MGN_MCS15_SG 0xcf -+ -+/* @-----DESC rate--------------------------------- */ -+ -+#define ODM_RATEMCS15_SG 0x1c -+#define ODM_RATEMCS32 0x20 -+ -+enum phydm_ctrl_info_rate { -+ ODM_RATE1M = 0x00, -+ ODM_RATE2M = 0x01, -+ ODM_RATE5_5M = 0x02, -+ ODM_RATE11M = 0x03, -+/* OFDM Rates, TxHT = 0 */ -+ ODM_RATE6M = 0x04, -+ ODM_RATE9M = 0x05, -+ ODM_RATE12M = 0x06, -+ ODM_RATE18M = 0x07, -+ ODM_RATE24M = 0x08, -+ ODM_RATE36M = 0x09, -+ ODM_RATE48M = 0x0A, -+ ODM_RATE54M = 0x0B, -+/* @MCS Rates, TxHT = 1 */ -+ ODM_RATEMCS0 = 0x0C, -+ ODM_RATEMCS1 = 0x0D, -+ ODM_RATEMCS2 = 0x0E, -+ ODM_RATEMCS3 = 0x0F, -+ ODM_RATEMCS4 = 0x10, -+ ODM_RATEMCS5 = 0x11, -+ ODM_RATEMCS6 = 0x12, -+ ODM_RATEMCS7 = 0x13, -+ ODM_RATEMCS8 = 0x14, -+ ODM_RATEMCS9 = 0x15, -+ ODM_RATEMCS10 = 0x16, -+ ODM_RATEMCS11 = 0x17, -+ ODM_RATEMCS12 = 0x18, -+ ODM_RATEMCS13 = 0x19, -+ ODM_RATEMCS14 = 0x1A, -+ ODM_RATEMCS15 = 0x1B, -+ ODM_RATEMCS16 = 0x1C, -+ ODM_RATEMCS17 = 0x1D, -+ ODM_RATEMCS18 = 0x1E, -+ ODM_RATEMCS19 = 0x1F, -+ ODM_RATEMCS20 = 0x20, -+ ODM_RATEMCS21 = 0x21, -+ ODM_RATEMCS22 = 0x22, -+ ODM_RATEMCS23 = 0x23, -+ ODM_RATEMCS24 = 0x24, -+ ODM_RATEMCS25 = 0x25, -+ ODM_RATEMCS26 = 0x26, -+ ODM_RATEMCS27 = 0x27, -+ ODM_RATEMCS28 = 0x28, -+ ODM_RATEMCS29 = 0x29, -+ ODM_RATEMCS30 = 0x2A, -+ ODM_RATEMCS31 = 0x2B, -+ ODM_RATEVHTSS1MCS0 = 0x2C, -+ ODM_RATEVHTSS1MCS1 = 0x2D, -+ ODM_RATEVHTSS1MCS2 = 0x2E, -+ ODM_RATEVHTSS1MCS3 = 0x2F, -+ ODM_RATEVHTSS1MCS4 = 0x30, -+ ODM_RATEVHTSS1MCS5 = 0x31, -+ ODM_RATEVHTSS1MCS6 = 0x32, -+ ODM_RATEVHTSS1MCS7 = 0x33, -+ ODM_RATEVHTSS1MCS8 = 0x34, -+ ODM_RATEVHTSS1MCS9 = 0x35, -+ ODM_RATEVHTSS2MCS0 = 0x36, -+ ODM_RATEVHTSS2MCS1 = 0x37, -+ ODM_RATEVHTSS2MCS2 = 0x38, -+ ODM_RATEVHTSS2MCS3 = 0x39, -+ ODM_RATEVHTSS2MCS4 = 0x3A, -+ ODM_RATEVHTSS2MCS5 = 0x3B, -+ ODM_RATEVHTSS2MCS6 = 0x3C, -+ ODM_RATEVHTSS2MCS7 = 0x3D, -+ ODM_RATEVHTSS2MCS8 = 0x3E, -+ ODM_RATEVHTSS2MCS9 = 0x3F, -+ ODM_RATEVHTSS3MCS0 = 0x40, -+ ODM_RATEVHTSS3MCS1 = 0x41, -+ ODM_RATEVHTSS3MCS2 = 0x42, -+ ODM_RATEVHTSS3MCS3 = 0x43, -+ ODM_RATEVHTSS3MCS4 = 0x44, -+ ODM_RATEVHTSS3MCS5 = 0x45, -+ ODM_RATEVHTSS3MCS6 = 0x46, -+ ODM_RATEVHTSS3MCS7 = 0x47, -+ ODM_RATEVHTSS3MCS8 = 0x48, -+ ODM_RATEVHTSS3MCS9 = 0x49, -+ ODM_RATEVHTSS4MCS0 = 0x4A, -+ ODM_RATEVHTSS4MCS1 = 0x4B, -+ ODM_RATEVHTSS4MCS2 = 0x4C, -+ ODM_RATEVHTSS4MCS3 = 0x4D, -+ ODM_RATEVHTSS4MCS4 = 0x4E, -+ ODM_RATEVHTSS4MCS5 = 0x4F, -+ ODM_RATEVHTSS4MCS6 = 0x50, -+ ODM_RATEVHTSS4MCS7 = 0x51, -+ ODM_RATEVHTSS4MCS8 = 0x52, -+ ODM_RATEVHTSS4MCS9 = 0x53, -+}; -+ -+enum phydm_legacy_spec_rate { -+ PHYDM_SPEC_RATE_6M = 0xb, -+ PHYDM_SPEC_RATE_9M = 0xf, -+ PHYDM_SPEC_RATE_12M = 0xa, -+ PHYDM_SPEC_RATE_18M = 0xe, -+ PHYDM_SPEC_RATE_24M = 0x9, -+ PHYDM_SPEC_RATE_36M = 0xd, -+ PHYDM_SPEC_RATE_48M = 0x8, -+ PHYDM_SPEC_RATE_54M = 0xc -+}; -+ -+#define NUM_RATE_AC_4SS (ODM_RATEVHTSS4MCS9 + 1) -+#define NUM_RATE_AC_3SS (ODM_RATEVHTSS3MCS9 + 1) -+#define NUM_RATE_AC_2SS (ODM_RATEVHTSS2MCS9 + 1) -+#define NUM_RATE_AC_1SS (ODM_RATEVHTSS1MCS9 + 1) -+#define NUM_RATE_N_4SS (ODM_RATEMCS31 + 1) -+#define NUM_RATE_N_3SS (ODM_RATEMCS23 + 1) -+#define NUM_RATE_N_2SS (ODM_RATEMCS15 + 1) -+#define NUM_RATE_N_1SS (ODM_RATEMCS7 + 1) -+ -+/*Define from larger rate size to small rate size, DO NOT change the position*/ -+/*[AC-4SS]*/ -+#if (RTL8814B_SUPPORT) -+ #define PHY_NUM_RATE_IDX NUM_RATE_AC_4SS -+/*[AC-3SS]*/ -+#elif (RTL8814A_SUPPORT) -+ #define PHY_NUM_RATE_IDX NUM_RATE_AC_3SS -+/*[AC-2SS]*/ -+#elif (RTL8812A_SUPPORT || RTL8822B_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8812F_SUPPORT) -+ #define PHY_NUM_RATE_IDX NUM_RATE_AC_2SS -+/*[AC-1SS]*/ -+#elif (RTL8881A_SUPPORT || RTL8821A_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8195B_SUPPORT) -+ #define PHY_NUM_RATE_IDX NUM_RATE_AC_1SS -+/*[N-4SS]*/ -+#elif (RTL8198F_SUPPORT) -+ #define PHY_NUM_RATE_IDX NUM_RATE_N_4SS -+/*[N-2SS]*/ -+#elif (RTL8192E_SUPPORT || RTL8197F_SUPPORT || RTL8192F_SUPPORT ||\ -+ RTL8197G_SUPPORT) -+ #define PHY_NUM_RATE_IDX NUM_RATE_N_2SS -+/*[N-1SS]*/ -+#elif (RTL8723B_SUPPORT || RTL8703B_SUPPORT || RTL8188E_SUPPORT || \ -+ RTL8188F_SUPPORT || RTL8723D_SUPPORT || RTL8195A_SUPPORT ||\ -+ RTL8710B_SUPPORT || RTL8721D_SUPPORT || RTL8710C_SUPPORT || RTL8723F_SUPPORT) -+ #define PHY_NUM_RATE_IDX NUM_RATE_N_1SS -+#else -+ #define PHY_NUM_RATE_IDX NUM_RATE_AC_4SS -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #define CONFIG_SFW_SUPPORTED -+#endif -+ -+/**************************************************************** -+ * 1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ ***************************************************************/ -+ -+/* ODM_CMNINFO_INTERFACE */ -+enum odm_interface { -+ ODM_ITRF_PCIE = 0x1, -+ ODM_ITRF_USB = 0x2, -+ ODM_ITRF_SDIO = 0x4, -+ ODM_ITRF_ALL = 0x7, -+}; -+ -+enum phydm_api_host { -+ RUN_IN_FW = 0, -+ RUN_IN_DRIVER = 1, -+}; -+ -+/*@========[Run time IC flag] ===================================*/ -+ -+enum phydm_ic { -+ ODM_RTL8188E = BIT(0), -+ ODM_RTL8812 = BIT(1), -+ ODM_RTL8821 = BIT(2), -+ ODM_RTL8192E = BIT(3), -+ ODM_RTL8723B = BIT(4), -+ ODM_RTL8814A = BIT(5), -+ ODM_RTL8881A = BIT(6), -+ ODM_RTL8822B = BIT(7), -+ ODM_RTL8703B = BIT(8), -+ ODM_RTL8195A = BIT(9), -+ ODM_RTL8188F = BIT(10), -+ ODM_RTL8723D = BIT(11), -+ ODM_RTL8197F = BIT(12), -+ ODM_RTL8821C = BIT(13), -+ ODM_RTL8814B = BIT(14), -+ ODM_RTL8198F = BIT(15), -+ ODM_RTL8710B = BIT(16), -+ ODM_RTL8192F = BIT(17), -+ ODM_RTL8822C = BIT(18), -+ ODM_RTL8195B = BIT(19), -+ ODM_RTL8812F = BIT(20), -+ ODM_RTL8197G = BIT(21), -+ ODM_RTL8721D = BIT(22), -+ ODM_RTL8710C = BIT(23), -+ ODM_RTL8723F = BIT(24) -+}; -+ -+#define ODM_IC_N_1SS (ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8723B |\ -+ ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8195A |\ -+ ODM_RTL8710B | ODM_RTL8721D | ODM_RTL8710C) -+#define ODM_IC_N_2SS (ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8192F) -+#define ODM_IC_N_3SS 0 -+#define ODM_IC_N_4SS 0 -+ -+#define ODM_IC_AC_1SS (ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8821C |\ -+ ODM_RTL8195B) -+#define ODM_IC_AC_2SS (ODM_RTL8812 | ODM_RTL8822B) -+#define ODM_IC_AC_3SS 0 -+#define ODM_IC_AC_4SS (ODM_RTL8814A) -+ -+#define ODM_IC_JGR3_1SS (ODM_RTL8723F) -+#define ODM_IC_JGR3_2SS (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G) -+#define ODM_IC_JGR3_3SS 0 -+#define ODM_IC_JGR3_4SS (ODM_RTL8198F | ODM_RTL8814B) -+ -+/*@====the following macro DO NOT need to update when adding a new IC======= */ -+#define ODM_IC_1SS (ODM_IC_N_1SS | ODM_IC_AC_1SS | ODM_IC_JGR3_1SS) -+#define ODM_IC_2SS (ODM_IC_N_2SS | ODM_IC_AC_2SS | ODM_IC_JGR3_2SS) -+#define ODM_IC_3SS (ODM_IC_N_3SS | ODM_IC_AC_3SS | ODM_IC_JGR3_3SS) -+#define ODM_IC_4SS (ODM_IC_N_4SS | ODM_IC_AC_4SS | ODM_IC_JGR3_4SS) -+ -+#define PHYDM_IC_ABOVE_1SS (ODM_IC_1SS | ODM_IC_2SS | ODM_IC_3SS |\ -+ ODM_IC_4SS) -+#define PHYDM_IC_ABOVE_2SS (ODM_IC_2SS | ODM_IC_3SS | ODM_IC_4SS) -+#define PHYDM_IC_ABOVE_3SS (ODM_IC_3SS | ODM_IC_4SS) -+#define PHYDM_IC_ABOVE_4SS ODM_IC_4SS -+ -+#define ODM_IC_11N_SERIES (ODM_IC_N_1SS | ODM_IC_N_2SS | ODM_IC_N_3SS |\ -+ ODM_IC_N_4SS) -+#define ODM_IC_11AC_SERIES (ODM_IC_AC_1SS | ODM_IC_AC_2SS |\ -+ ODM_IC_AC_3SS | ODM_IC_AC_4SS) -+#define ODM_IC_JGR3_SERIES (ODM_IC_JGR3_1SS | ODM_IC_JGR3_2SS |\ -+ ODM_IC_JGR3_3SS | ODM_IC_JGR3_4SS) -+/*@====================================================*/ -+ -+#define ODM_IC_11AC_1_SERIES (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A) -+#define ODM_IC_11AC_2_SERIES (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C |\ -+ ODM_RTL8195B) -+ -+/*@[Phy status type]*/ -+#define PHYSTS_2ND_TYPE_IC (ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8723D |\ -+ ODM_RTL8821C | ODM_RTL8710B | ODM_RTL8195B |\ -+ ODM_RTL8192F | ODM_RTL8721D | ODM_RTL8710C) -+#define PHYSTS_3RD_TYPE_IC (ODM_RTL8198F | ODM_RTL8814B | ODM_RTL8822C |\ -+ ODM_RTL8812F | ODM_RTL8197G | ODM_RTL8723F) -+/*@[FW Type]*/ -+#define PHYDM_IC_8051_SERIES (ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821 |\ -+ ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8703B |\ -+ ODM_RTL8188F | ODM_RTL8192F | ODM_RTL8721D |\ -+ ODM_RTL8710C) -+#define PHYDM_IC_3081_SERIES (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F |\ -+ ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8198F |\ -+ ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8814B |\ -+ ODM_RTL8197G | ODM_RTL8723F) -+/*@[LA mode]*/ -+#define PHYDM_IC_SUPPORT_LA_MODE (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F |\ -+ ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8198F |\ -+ ODM_RTL8192F | ODM_RTL8822C | ODM_RTL8812F |\ -+ ODM_RTL8195B | ODM_RTL8814B | ODM_RTL8197G | ODM_RTL8723F) -+/*@[BF]*/ -+#define ODM_IC_TXBF_SUPPORT (ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 |\ -+ ODM_RTL8814A | ODM_RTL8881A | ODM_RTL8822B |\ -+ ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8195B |\ -+ ODM_RTL8198F | ODM_RTL8822C | ODM_RTL8812F |\ -+ ODM_RTL8814B | ODM_RTL8197G) -+#define PHYDM_IC_SUPPORT_MU_BFEE (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814B |\ -+ ODM_RTL8195B | ODM_RTL8198F | ODM_RTL8822C |\ -+ ODM_RTL8812F | ODM_RTL8723F) -+#define PHYDM_IC_SUPPORT_MU_BFER (ODM_RTL8822B | ODM_RTL8814B | ODM_RTL8198F |\ -+ ODM_RTL8822C | ODM_RTL8812F) -+ -+#define PHYDM_IC_SUPPORT_MU (PHYDM_IC_SUPPORT_MU_BFEE |\ -+ PHYDM_IC_SUPPORT_MU_BFER) -+/*@[PHYDM API]*/ -+#define CMN_API_SUPPORT_IC (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F |\ -+ ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8822C |\ -+ ODM_RTL8198F | ODM_RTL8812F | ODM_RTL8814B |\ -+ ODM_RTL8197G | ODM_RTL8721D | ODM_RTL8710C | ODM_RTL8723F) -+ -+/* fw offload ability*/ -+#define PHYDM_IC_SUPPORT_FW_PARAM_OFFLOAD (ODM_RTL8814A | ODM_RTL8822B |\ -+ ODM_RTL8821C | ODM_RTL8822C) -+ -+/* halmac offload ability*/ -+#define PHYDM_IC_SUPPORT_HALMAC_PARAM_OFFLOAD (ODM_RTL8822C | ODM_RTL8812F |\ -+ ODM_RTL8814B | ODM_RTL8723F) -+ -+/*[CCX]*/ -+#define PHYDM_IC_SUPPORT_FAHM (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8198F |\ -+ ODM_RTL8814B | ODM_RTL8822C | ODM_RTL8812F |\ -+ ODM_RTL8197G | ODM_RTL8723F) -+#define PHYDM_IC_SUPPORT_IFS_CLM (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G | ODM_RTL8723F) -+ -+/*[ARFR]*/ -+/*for MAC HW control rate_id=0~12 and 2.4g vht mode(1ss/2ss) support*/ -+#define PHYDM_IC_RATEID_IDX_TYPE2 (ODM_RTL8822B | ODM_RTL8822C | ODM_RTL8195B |\ -+ ODM_RTL8821C) -+ -+/*@========[Compile time IC flag] ========================*/ -+/*@========[AC-3/AC/N Support] ===========================*/ -+ -+#if (RTL8814B_SUPPORT || RTL8198F_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8812F_SUPPORT || RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYDM_IC_JGR3_SERIES_SUPPORT -+ #if (RTL8814B_SUPPORT || RTL8822C_SUPPORT || RTL8812F_SUPPORT) -+ #define PHYDM_IC_JGR3_80M_SUPPORT -+ #endif -+#endif -+ -+#if (RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8814B_SUPPORT ||\ -+ RTL8723F_SUPPORT) -+ #define PHYDM_IC_HALMAC_PARAM_SUPPORT -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+ #ifdef RTK_AC_SUPPORT -+ #define ODM_IC_11AC_SERIES_SUPPORT 1 -+ #else -+ #define ODM_IC_11AC_SERIES_SUPPORT 0 -+ #endif -+ -+ #define ODM_IC_11N_SERIES_SUPPORT 1 -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+ #define ODM_IC_11AC_SERIES_SUPPORT 1 -+ #define ODM_IC_11N_SERIES_SUPPORT 1 -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ -+ #define ODM_IC_11AC_SERIES_SUPPORT 1 -+ #define ODM_IC_11N_SERIES_SUPPORT 1 -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+ -+ #define ODM_IC_11AC_SERIES_SUPPORT 1 -+ #define ODM_IC_11N_SERIES_SUPPORT 1 -+ -+#else /*ODM_CE*/ -+ -+ #if (RTL8188E_SUPPORT || RTL8723B_SUPPORT || RTL8192E_SUPPORT ||\ -+ RTL8195A_SUPPORT || RTL8703B_SUPPORT || RTL8188F_SUPPORT ||\ -+ RTL8723D_SUPPORT || RTL8197F_SUPPORT || RTL8710B_SUPPORT ||\ -+ RTL8192F_SUPPORT || RTL8721D_SUPPORT || RTL8710C_SUPPORT) -+ #define ODM_IC_11N_SERIES_SUPPORT 1 -+ #define ODM_IC_11AC_SERIES_SUPPORT 0 -+ #else -+ #define ODM_IC_11N_SERIES_SUPPORT 0 -+ #define ODM_IC_11AC_SERIES_SUPPORT 1 -+ #endif -+#endif -+ -+/*@===IC SS Compile Flag, prepare for code size reduction==============*/ -+#if (RTL8188E_SUPPORT || RTL8188F_SUPPORT || RTL8723B_SUPPORT ||\ -+ RTL8703B_SUPPORT || RTL8723D_SUPPORT || RTL8881A_SUPPORT ||\ -+ RTL8821A_SUPPORT || RTL8821C_SUPPORT || RTL8195A_SUPPORT ||\ -+ RTL8710B_SUPPORT || RTL8195B_SUPPORT || RTL8721D_SUPPORT ||\ -+ RTL8710C_SUPPORT || RTL8723F_SUPPORT) -+ -+ #define PHYDM_COMPILE_IC_1SS -+#endif -+ -+#if (RTL8192E_SUPPORT || RTL8197F_SUPPORT || RTL8812A_SUPPORT ||\ -+ RTL8822B_SUPPORT || RTL8192F_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8812F_SUPPORT || RTL8197G_SUPPORT) -+ #define PHYDM_COMPILE_IC_2SS -+#endif -+ -+/*@#define PHYDM_COMPILE_IC_3SS*/ -+ -+#if ((RTL8814B_SUPPORT) || (RTL8814A_SUPPORT) || (RTL8198F_SUPPORT)) -+ #define PHYDM_COMPILE_IC_4SS -+#endif -+ -+/*@==[ABOVE N-SS COMPILE FLAG]=================================================*/ -+#if (defined(PHYDM_COMPILE_IC_1SS) || defined(PHYDM_COMPILE_IC_2SS) ||\ -+ defined(PHYDM_COMPILE_IC_3SS) || defined(PHYDM_COMPILE_IC_4SS)) -+ #define PHYDM_COMPILE_ABOVE_1SS -+#endif -+ -+#if (defined(PHYDM_COMPILE_IC_2SS) || defined(PHYDM_COMPILE_IC_3SS) ||\ -+ defined(PHYDM_COMPILE_IC_4SS)) -+ #define PHYDM_COMPILE_ABOVE_2SS -+#endif -+ -+#if (defined(PHYDM_COMPILE_IC_3SS) || defined(PHYDM_COMPILE_IC_4SS)) -+ #define PHYDM_COMPILE_ABOVE_3SS -+#endif -+ -+#if (defined(PHYDM_COMPILE_IC_4SS)) -+ #define PHYDM_COMPILE_ABOVE_4SS -+#endif -+ -+/*@==[Max RF path number among all compiled ICs]==============================*/ -+/*@ ex: support 8814B & 8821C => size=4 */ -+/*@ ex: support 8822C & 8821C => size=2 */ -+#if (defined(PHYDM_COMPILE_IC_4SS)) -+ #define RF_PATH_MEM_SIZE 4 -+#elif (defined(PHYDM_COMPILE_IC_3SS)) -+ #define RF_PATH_MEM_SIZE 3 -+#elif (defined(PHYDM_COMPILE_IC_2SS)) -+ #define RF_PATH_MEM_SIZE 2 -+#else -+ #define RF_PATH_MEM_SIZE 1 -+#endif -+ -+/*@========[New Phy-Status Support] ========================*/ -+#if (RTL8197F_SUPPORT || RTL8723D_SUPPORT || RTL8822B_SUPPORT ||\ -+ RTL8821C_SUPPORT || RTL8710B_SUPPORT || RTL8195B_SUPPORT ||\ -+ RTL8192F_SUPPORT || RTL8721D_SUPPORT || RTL8710C_SUPPORT) -+ #define ODM_PHY_STATUS_NEW_TYPE_SUPPORT 1 -+#else -+ #define ODM_PHY_STATUS_NEW_TYPE_SUPPORT 0 -+#endif -+ -+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8812F_SUPPORT || RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+ #define PHYSTS_3RD_TYPE_SUPPORT -+#endif -+ -+#ifdef PHYSTS_3RD_TYPE_SUPPORT -+ #define PHYSTS_AUTO_SWITCH_IC (ODM_RTL8822C) -+#endif -+ -+#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8812F_SUPPORT || RTL8197G_SUPPORT || RTL8723F_SUPPORT) -+ #define BB_RAM_SUPPORT -+#endif -+ -+#if (RTL8821C_SUPPORT || RTL8822B_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8812F_SUPPORT || RTL8814B_SUPPORT || RTL8195B_SUPPORT ||\ -+ RTL8198F_SUPPORT) -+ #define PHYDM_COMPILE_MU -+#endif -+ -+#if (RTL8822B_SUPPORT) -+ #define CONFIG_MU_JAGUAR_2 -+#endif -+ -+#if (RTL8814B_SUPPORT || RTL8822C_SUPPORT || RTL8812F_SUPPORT) -+ #define CONFIG_MU_JAGUAR_3 -+#endif -+ -+#if (defined(CONFIG_MU_JAGUAR_2) || defined(CONFIG_MU_JAGUAR_3)) -+ #if (RTL8814B_SUPPORT) -+ #define MU_EX_MACID 76 -+ #elif (RTL8822B_SUPPORT || RTL8822C_SUPPORT || RTL8812F_SUPPORT) -+ #define MU_EX_MACID 30 -+ #endif -+#endif -+/*@============================================================================*/ -+ -+#if (RTL8822B_SUPPORT || RTL8197F_SUPPORT || RTL8821C_SUPPORT ||\ -+ RTL8192F_SUPPORT || RTL8195B_SUPPORT || RTL8822C_SUPPORT ||\ -+ RTL8198F_SUPPORT || RTL8812F_SUPPORT || RTL8814B_SUPPORT ||\ -+ RTL8197G_SUPPORT || RTL8721D_SUPPORT || RTL8710C_SUPPORT || RTL8723F_SUPPORT) -+#define PHYDM_COMMON_API_SUPPORT -+#endif -+ -+#define PHYDM_COMMON_API_IC (ODM_IC_JGR3_SERIES | ODM_RTL8822B |\ -+ ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8192F | ODM_RTL8195B |\ -+ ODM_RTL8721D | ODM_RTL8710C) -+ -+#if (RTL8188E_SUPPORT || RTL8192E_SUPPORT || RTL8821A_SUPPORT ||\ -+ RTL8812A_SUPPORT || RTL8723B_SUPPORT || RTL8703B_SUPPORT ||\ -+ RTL8195A_SUPPORT || RTL8814A_SUPPORT) -+#define PHYDM_COMMON_API_NOT_SUPPORT -+#endif -+ -+#if (RTL8821C_SUPPORT || RTL8197F_SUPPORT || RTL8197G_SUPPORT) -+ #define CONFIG_RFE_BY_HW_INFO -+#endif -+ -+#define CCK_RATE_NUM 4 -+#define OFDM_RATE_NUM 8 -+ -+#define LEGACY_RATE_NUM 12 -+ -+#define HT_RATE_NUM_4SS 32 -+#define VHT_RATE_NUM_4SS 40 -+ -+#define HT_RATE_NUM_3SS 24 -+#define VHT_RATE_NUM_3SS 30 -+ -+#define HT_RATE_NUM_2SS 16 -+#define VHT_RATE_NUM_2SS 20 -+ -+#define HT_RATE_NUM_1SS 8 -+#define VHT_RATE_NUM_1SS 10 -+#if (defined(PHYDM_COMPILE_ABOVE_4SS)) -+ #define HT_RATE_NUM HT_RATE_NUM_4SS -+ #define VHT_RATE_NUM VHT_RATE_NUM_4SS -+#elif (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ #define HT_RATE_NUM HT_RATE_NUM_3SS -+ #define VHT_RATE_NUM VHT_RATE_NUM_3SS -+#elif (defined(PHYDM_COMPILE_ABOVE_2SS)) -+ #define HT_RATE_NUM HT_RATE_NUM_2SS -+ #define VHT_RATE_NUM VHT_RATE_NUM_2SS -+#else -+ #define HT_RATE_NUM HT_RATE_NUM_1SS -+ #define VHT_RATE_NUM VHT_RATE_NUM_1SS -+#endif -+ -+#define LOW_BW_RATE_NUM VHT_RATE_NUM -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#define SECOND_CH_AT_LSB 2 /*@primary CH @ MSB, SD4: HAL_PRIME_CHNL_OFFSET_UPPER*/ -+#define SECOND_CH_AT_USB 1 /*@primary CH @ LSB, SD4: HAL_PRIME_CHNL_OFFSET_LOWER*/ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#define SECOND_CH_AT_LSB 2 /*@primary CH @ MSB, SD7: HAL_PRIME_CHNL_OFFSET_UPPER*/ -+#define SECOND_CH_AT_USB 1 /*@primary CH @ LSB, SD7: HAL_PRIME_CHNL_OFFSET_LOWER*/ -+#else /*if (DM_ODM_SUPPORT_TYPE == ODM_AP)*/ -+#define SECOND_CH_AT_LSB 1 /*@primary CH @ MSB, SD8: HT_2NDCH_OFFSET_BELOW*/ -+#define SECOND_CH_AT_USB 2 /*@primary CH @ LSB, SD8: HT_2NDCH_OFFSET_ABOVE*/ -+#endif -+ -+enum phydm_ic_ip { -+ PHYDM_IC_N = 0, -+ PHYDM_IC_AC = 1, -+ PHYDM_IC_JGR3 = 2 -+}; -+ -+enum phydm_phy_sts_type { -+ PHYDM_PHYSTS_TYPE_1 = 1, -+ PHYDM_PHYSTS_TYPE_2 = 2, -+ PHYDM_PHYSTS_TYPE_3 = 3 -+}; -+ -+/* ODM_CMNINFO_CUT_VER */ -+enum odm_cut_version { -+ ODM_CUT_A = 0, -+ ODM_CUT_B = 1, -+ ODM_CUT_C = 2, -+ ODM_CUT_D = 3, -+ ODM_CUT_E = 4, -+ ODM_CUT_F = 5, -+ ODM_CUT_G = 6, -+ ODM_CUT_H = 7, -+ ODM_CUT_I = 8, -+ ODM_CUT_J = 9, -+ ODM_CUT_K = 10, -+ ODM_CUT_L = 11, -+ ODM_CUT_M = 12, -+ ODM_CUT_N = 13, -+ ODM_CUT_O = 14, -+ ODM_CUT_TEST = 15, -+}; -+ -+/* ODM_CMNINFO_FAB_VER */ -+enum odm_fab { -+ ODM_TSMC = 0, -+ ODM_UMC = 1, -+}; -+ -+/* ODM_CMNINFO_OP_MODE */ -+enum odm_operation_mode { -+ ODM_NO_LINK = BIT(0), -+ ODM_LINK = BIT(1), -+ ODM_SCAN = BIT(2), -+ ODM_POWERSAVE = BIT(3), -+ ODM_AP_MODE = BIT(4), -+ ODM_CLIENT_MODE = BIT(5), -+ ODM_AD_HOC = BIT(6), -+ ODM_WIFI_DIRECT = BIT(7), -+ ODM_WIFI_DISPLAY = BIT(8), -+}; -+ -+/* ODM_CMNINFO_WM_MODE */ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+enum odm_wireless_mode { -+ ODM_WM_UNKNOW = 0x0, -+ ODM_WM_B = BIT(0), -+ ODM_WM_G = BIT(1), -+ ODM_WM_A = BIT(2), -+ ODM_WM_N24G = BIT(3), -+ ODM_WM_N5G = BIT(4), -+ ODM_WM_AUTO = BIT(5), -+ ODM_WM_AC = BIT(6), -+}; -+#else -+enum odm_wireless_mode { -+ ODM_WM_UNKNOWN = 0x00,/*@0x0*/ -+ ODM_WM_A = BIT(0), /* @0x1*/ -+ ODM_WM_B = BIT(1), /* @0x2*/ -+ ODM_WM_G = BIT(2),/* @0x4*/ -+ ODM_WM_AUTO = BIT(3),/* @0x8*/ -+ ODM_WM_N24G = BIT(4),/* @0x10*/ -+ ODM_WM_N5G = BIT(5),/* @0x20*/ -+ ODM_WM_AC_5G = BIT(6),/* @0x40*/ -+ ODM_WM_AC_24G = BIT(7),/* @0x80*/ -+ ODM_WM_AC_ONLY = BIT(8),/* @0x100*/ -+ ODM_WM_MAX = BIT(11)/* @0x800*/ -+ -+}; -+#endif -+ -+/* ODM_CMNINFO_BAND */ -+enum odm_band_type { -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ ODM_BAND_2_4G = BIT(0), -+ ODM_BAND_5G = BIT(1), -+#else -+ ODM_BAND_2_4G = 0, -+ ODM_BAND_5G, -+ ODM_BAND_ON_BOTH, -+ ODM_BANDMAX -+#endif -+}; -+ -+enum odm_rf_band { -+ ODM_RF_BAND_2G = 0, -+ ODM_RF_BAND_5G_LOW = 1, -+ ODM_RF_BAND_5G_MID = 2, -+ ODM_RF_BAND_5G_HIGH = 3, -+}; -+ -+/* ODM_CMNINFO_SEC_CHNL_OFFSET */ -+enum phydm_sec_chnl_offset { -+ PHYDM_DONT_CARE = 0, -+ PHYDM_BELOW = 1, -+ PHYDM_ABOVE = 2 -+}; -+ -+/* ODM_CMNINFO_SEC_MODE */ -+enum odm_security { -+ ODM_SEC_OPEN = 0, -+ ODM_SEC_WEP40 = 1, -+ ODM_SEC_TKIP = 2, -+ ODM_SEC_RESERVE = 3, -+ ODM_SEC_AESCCMP = 4, -+ ODM_SEC_WEP104 = 5, -+ ODM_WEP_WPA_MIXED = 6, /* WEP + WPA */ -+ ODM_SEC_SMS4 = 7, -+}; -+ -+/* ODM_CMNINFO_CHNL */ -+ -+/* ODM_CMNINFO_BOARD_TYPE */ -+enum odm_board_type { -+ ODM_BOARD_DEFAULT = 0, /* The DEFAULT case. */ -+ ODM_BOARD_MINICARD = BIT(0), /* @0 = non-mini card, 1= mini card. */ -+ ODM_BOARD_SLIM = BIT(1), /* @0 = non-slim card, 1 = slim card */ -+ ODM_BOARD_BT = BIT(2), /* @0 = without BT card, 1 = with BT */ -+ ODM_BOARD_EXT_PA = BIT(3), /* @0 = no 2G ext-PA, 1 = existing 2G ext-PA */ -+ ODM_BOARD_EXT_LNA = BIT(4), /* @0 = no 2G ext-LNA, 1 = existing 2G ext-LNA */ -+ ODM_BOARD_EXT_TRSW = BIT(5), /* @0 = no ext-TRSW, 1 = existing ext-TRSW */ -+ ODM_BOARD_EXT_PA_5G = BIT(6), /* @0 = no 5G ext-PA, 1 = existing 5G ext-PA */ -+ ODM_BOARD_EXT_LNA_5G = BIT(7), /* @0 = no 5G ext-LNA, 1 = existing 5G ext-LNA */ -+}; -+ -+enum odm_package_type { -+ ODM_PACKAGE_DEFAULT = 0, -+ ODM_PACKAGE_QFN68 = BIT(0), -+ ODM_PACKAGE_TFBGA90 = BIT(1), -+ ODM_PACKAGE_TFBGA79 = BIT(2), -+}; -+ -+enum odm_type_gpa { -+ TYPE_GPA0 = 0x0000, -+ TYPE_GPA1 = 0x0055, -+ TYPE_GPA2 = 0x00AA, -+ TYPE_GPA3 = 0x00FF, -+ TYPE_GPA4 = 0x5500, -+ TYPE_GPA5 = 0x5555, -+ TYPE_GPA6 = 0x55AA, -+ TYPE_GPA7 = 0x55FF, -+ TYPE_GPA8 = 0xAA00, -+ TYPE_GPA9 = 0xAA55, -+ TYPE_GPA10 = 0xAAAA, -+ TYPE_GPA11 = 0xAAFF, -+ TYPE_GPA12 = 0xFF00, -+ TYPE_GPA13 = 0xFF55, -+ TYPE_GPA14 = 0xFFAA, -+ TYPE_GPA15 = 0xFFFF, -+}; -+ -+enum odm_type_apa { -+ TYPE_APA0 = 0x0000, -+ TYPE_APA1 = 0x0055, -+ TYPE_APA2 = 0x00AA, -+ TYPE_APA3 = 0x00FF, -+ TYPE_APA4 = 0x5500, -+ TYPE_APA5 = 0x5555, -+ TYPE_APA6 = 0x55AA, -+ TYPE_APA7 = 0x55FF, -+ TYPE_APA8 = 0xAA00, -+ TYPE_APA9 = 0xAA55, -+ TYPE_APA10 = 0xAAAA, -+ TYPE_APA11 = 0xAAFF, -+ TYPE_APA12 = 0xFF00, -+ TYPE_APA13 = 0xFF55, -+ TYPE_APA14 = 0xFFAA, -+ TYPE_APA15 = 0xFFFF, -+}; -+ -+enum odm_type_glna { -+ TYPE_GLNA0 = 0x0000, -+ TYPE_GLNA1 = 0x0055, -+ TYPE_GLNA2 = 0x00AA, -+ TYPE_GLNA3 = 0x00FF, -+ TYPE_GLNA4 = 0x5500, -+ TYPE_GLNA5 = 0x5555, -+ TYPE_GLNA6 = 0x55AA, -+ TYPE_GLNA7 = 0x55FF, -+ TYPE_GLNA8 = 0xAA00, -+ TYPE_GLNA9 = 0xAA55, -+ TYPE_GLNA10 = 0xAAAA, -+ TYPE_GLNA11 = 0xAAFF, -+ TYPE_GLNA12 = 0xFF00, -+ TYPE_GLNA13 = 0xFF55, -+ TYPE_GLNA14 = 0xFFAA, -+ TYPE_GLNA15 = 0xFFFF, -+}; -+ -+enum odm_type_alna { -+ TYPE_ALNA0 = 0x0000, -+ TYPE_ALNA1 = 0x0055, -+ TYPE_ALNA2 = 0x00AA, -+ TYPE_ALNA3 = 0x00FF, -+ TYPE_ALNA4 = 0x5500, -+ TYPE_ALNA5 = 0x5555, -+ TYPE_ALNA6 = 0x55AA, -+ TYPE_ALNA7 = 0x55FF, -+ TYPE_ALNA8 = 0xAA00, -+ TYPE_ALNA9 = 0xAA55, -+ TYPE_ALNA10 = 0xAAAA, -+ TYPE_ALNA11 = 0xAAFF, -+ TYPE_ALNA12 = 0xFF00, -+ TYPE_ALNA13 = 0xFF55, -+ TYPE_ALNA14 = 0xFFAA, -+ TYPE_ALNA15 = 0xFFFF, -+}; -+ -+#if (RTL8721D_SUPPORT) -+/* ODM_CMNINFO_POWER_VOLTAGE */ -+enum odm_power_voltage { -+ ODM_POWER_18V = 0, -+ ODM_POWER_33V = 1, -+}; -+ -+/* ODM_CMNINFO_ANTDIV_GPIO */ -+enum odm_antdiv_gpio { -+ ANTDIV_GPIO_PA2PA4 = 0, -+ ANTDIV_GPIO_PA5PA6 = 1, -+ ANTDIV_GPIO_PA12PA13 = 2, -+ ANTDIV_GPIO_PA14PA15 = 3, -+ ANTDIV_GPIO_PA16PA17 = 4, -+ ANTDIV_GPIO_PB1PB2 = 5, -+ ANTDIV_GPIO_PB26PB29 = 6, -+ ANTDIV_GPIO_PB1PB2PB26 = 7, // add by Jiao Qi for AmebaD SP3T only -+}; -+ -+/* ODM_CMNINFO_PEAK_DETECT_MODE */ -+enum odm_peak_detect_mode { -+ ODM_PD_DIS = 0, -+ ODM_PD_ENG = 1, -+ ODM_PD_ENA = 2, -+ ODM_PD_ENALL = 3, -+}; -+#endif -+ -+#define PAUSE_FAIL 0 -+#define PAUSE_SUCCESS 1 -+ -+enum odm_parameter_init { -+ ODM_PRE_SETTING = 0, -+ ODM_POST_SETTING = 1, -+ ODM_INIT_FW_SETTING = 2, -+ ODM_PRE_RF_SET = 3, -+ ODM_POST_RF_SET = 4 -+}; -+ -+enum phydm_pause_type { -+ PHYDM_PAUSE = 1, /*Pause & Set new value*/ -+ PHYDM_PAUSE_NO_SET = 2, /*Pause & Stay in current value*/ -+ PHYDM_RESUME = 3 -+}; -+ -+enum phydm_backup_type { -+ PHYDM_BACKUP = 1, -+ PHYDM_RESTORE = 2 -+}; -+ -+enum phydm_pause_level { -+ PHYDM_PAUSE_RELEASE = -1, -+ PHYDM_PAUSE_LEVEL_0 = 0, /* @Low Priority function */ -+ PHYDM_PAUSE_LEVEL_1 = 1, /* @Middle Priority function */ -+ PHYDM_PAUSE_LEVEL_2 = 2, /* @High priority function (ex: Check hang function) */ -+ PHYDM_PAUSE_LEVEL_3 = 3, /* @Debug function (the highest priority) */ -+ PHYDM_PAUSE_MAX_NUM = 4 -+}; -+ -+enum phydm_dis_hw_fun { -+ HW_FUN_DIS = 0, /*@Disable a cetain HW function & backup the original value*/ -+ HW_FUN_RESUME = 1 /*Revert */ -+}; -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_precomp.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_precomp.h -new file mode 100644 -index 000000000000..c30584e6ec7b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_precomp.h -@@ -0,0 +1,651 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __ODM_PRECOMP_H__ -+#define __ODM_PRECOMP_H__ -+ -+#include "phydm_types.h" -+#include "halrf/halrf_features.h" -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "Precomp.h" /* @We need to include mp_precomp.h due to batch file setting. */ -+#else -+ #define TEST_FALG___ 1 -+#endif -+ -+/* @2 Config Flags and Structs - defined by each ODM type */ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "../8192cd_cfg.h" -+ #include "../odm_inc.h" -+ -+ #include "../8192cd.h" -+ #include "../8192cd_util.h" -+ #include "../8192cd_hw.h" -+ #ifdef _BIG_ENDIAN_ -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG -+ #else -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE -+ #endif -+ -+ #include "../8192cd_headers.h" -+ #include "../8192cd_debug.h" -+ -+ #if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) -+ #define INIT_TIMER_EVENT_ENTRY(_entry, _func, _data) \ -+ do { \ -+ _rtw_init_listhead(&(_entry)->list); \ -+ (_entry)->data = (_data); \ -+ (_entry)->function = (_func); \ -+ } while (0) -+ #endif -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #ifdef DM_ODM_CE_MAC80211 -+ #include "../wifi.h" -+ #include "rtl_phydm.h" -+ #elif defined(DM_ODM_CE_MAC80211_V2) -+ #include "../main.h" -+ #include "../hw.h" -+ #include "../fw.h" -+ #endif -+ #define __PACK -+ #define __WLAN_ATTRIB_PACK__ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "mp_precomp.h" -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE -+ #define __PACK -+ #define __WLAN_ATTRIB_PACK__ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ #include -+ #include -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE -+ #define __PACK -+#endif -+ -+/* @2 OutSrc Header Files */ -+ -+#include "phydm.h" -+#include "phydm_hwconfig.h" -+#include "phydm_phystatus.h" -+#include "phydm_debug.h" -+#include "phydm_regdefine11ac.h" -+#include "phydm_regdefine11n.h" -+#include "phydm_interface.h" -+#include "phydm_reg.h" -+#include "halrf/halrf_debug.h" -+ -+#ifndef RTL8188E_SUPPORT -+ #define RTL8188E_SUPPORT 0 -+#endif -+#ifndef RTL8812A_SUPPORT -+ #define RTL8812A_SUPPORT 0 -+#endif -+#ifndef RTL8821A_SUPPORT -+ #define RTL8821A_SUPPORT 0 -+#endif -+#ifndef RTL8192E_SUPPORT -+ #define RTL8192E_SUPPORT 0 -+#endif -+#ifndef RTL8723B_SUPPORT -+ #define RTL8723B_SUPPORT 0 -+#endif -+#ifndef RTL8814A_SUPPORT -+ #define RTL8814A_SUPPORT 0 -+#endif -+#ifndef RTL8881A_SUPPORT -+ #define RTL8881A_SUPPORT 0 -+#endif -+#ifndef RTL8822B_SUPPORT -+ #define RTL8822B_SUPPORT 0 -+#endif -+#ifndef RTL8703B_SUPPORT -+ #define RTL8703B_SUPPORT 0 -+#endif -+#ifndef RTL8195A_SUPPORT -+ #define RTL8195A_SUPPORT 0 -+#endif -+#ifndef RTL8188F_SUPPORT -+ #define RTL8188F_SUPPORT 0 -+#endif -+#ifndef RTL8723D_SUPPORT -+ #define RTL8723D_SUPPORT 0 -+#endif -+#ifndef RTL8197F_SUPPORT -+ #define RTL8197F_SUPPORT 0 -+#endif -+#ifndef RTL8821C_SUPPORT -+ #define RTL8821C_SUPPORT 0 -+#endif -+#ifndef RTL8814B_SUPPORT -+ #define RTL8814B_SUPPORT 0 -+#endif -+#ifndef RTL8198F_SUPPORT -+ #define RTL8198F_SUPPORT 0 -+#endif -+#ifndef RTL8710B_SUPPORT -+ #define RTL8710B_SUPPORT 0 -+#endif -+#ifndef RTL8192F_SUPPORT -+ #define RTL8192F_SUPPORT 0 -+#endif -+#ifndef RTL8822C_SUPPORT -+ #define RTL8822C_SUPPORT 0 -+#endif -+#ifndef RTL8195B_SUPPORT -+ #define RTL8195B_SUPPORT 0 -+#endif -+#ifndef RTL8812F_SUPPORT -+ #define RTL8812F_SUPPORT 0 -+#endif -+#ifndef RTL8197G_SUPPORT -+ #define RTL8197G_SUPPORT 0 -+#endif -+#ifndef RTL8721D_SUPPORT -+ #define RTL8721D_SUPPORT 0 -+#endif -+#ifndef RTL8710C_SUPPORT -+ #define RTL8710C_SUPPORT 0 -+#endif -+#ifndef RTL8723F_SUPPORT -+ #define RTL8723F_SUPPORT 0 -+#endif -+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && \ -+ (!defined(DM_ODM_CE_MAC80211) && !defined(DM_ODM_CE_MAC80211_V2)) -+ -+void phy_set_tx_power_limit( -+ struct dm_struct *dm, -+ u8 *regulation, -+ u8 *band, -+ u8 *bandwidth, -+ u8 *rate_section, -+ u8 *rf_path, -+ u8 *channel, -+ u8 *power_limit); -+ -+void phy_set_tx_power_limit_ex(struct dm_struct *dm, u8 regulation, u8 band, -+ u8 bandwidth, u8 rate_section, u8 rf_path, -+ u8 channel, s8 power_limit); -+ -+enum hal_status -+rtw_phydm_fw_iqk( -+ struct dm_struct *dm, -+ u8 clear, -+ u8 segment); -+ -+enum hal_status -+rtw_phydm_fw_dpk( -+ struct dm_struct *dm); -+ -+enum hal_status -+rtw_phydm_cfg_phy_para( -+ struct dm_struct *dm, -+ enum phydm_halmac_param config_type, -+ u32 offset, -+ u32 data, -+ u32 mask, -+ enum rf_path e_rf_path, -+ u32 delay_time); -+ -+#endif -+ -+#if RTL8188E_SUPPORT == 1 -+ #define RTL8188E_T_SUPPORT 1 -+ #ifdef CONFIG_SFW_SUPPORTED -+ #define RTL8188E_S_SUPPORT 1 -+ #else -+ #define RTL8188E_S_SUPPORT 0 -+ #endif -+ -+ #include "rtl8188e/hal8188erateadaptive.h" /* @for RA,Power training */ -+ #include "rtl8188e/halhwimg8188e_mac.h" -+ #include "rtl8188e/halhwimg8188e_rf.h" -+ #include "rtl8188e/halhwimg8188e_bb.h" -+ #include "rtl8188e/phydm_regconfig8188e.h" -+ #include "rtl8188e/phydm_rtl8188e.h" -+ #include "rtl8188e/hal8188ereg.h" -+ #include "rtl8188e/version_rtl8188e.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8188e_hal.h" -+ #include "halrf/rtl8188e/halrf_8188e_ce.h" -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "halrf/rtl8188e/halrf_8188e_win.h" -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "halrf/rtl8188e/halrf_8188e_ap.h" -+ #endif -+#endif /* @88E END */ -+ -+#if (RTL8192E_SUPPORT == 1) -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "halrf/rtl8192e/halrf_8192e_win.h" /*@FOR_8192E_IQK*/ -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "halrf/rtl8192e/halrf_8192e_ap.h" /*@FOR_8192E_IQK*/ -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "halrf/rtl8192e/halrf_8192e_ce.h" /*@FOR_8192E_IQK*/ -+ #endif -+ -+ #include "rtl8192e/phydm_rtl8192e.h" /* @FOR_8192E_IQK */ -+ #include "rtl8192e/version_rtl8192e.h" -+ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ #include "rtl8192e/halhwimg8192e_bb.h" -+ #include "rtl8192e/halhwimg8192e_mac.h" -+ #include "rtl8192e/halhwimg8192e_rf.h" -+ #include "rtl8192e/phydm_regconfig8192e.h" -+ #include "rtl8192e/hal8192ereg.h" -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8192e_hal.h" -+ #endif -+#endif /* @92E END */ -+ -+#if (RTL8812A_SUPPORT == 1) -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "halrf/rtl8812a/halrf_8812a_win.h" -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "halrf/rtl8812a/halrf_8812a_ap.h" -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "halrf/rtl8812a/halrf_8812a_ce.h" -+ #endif -+ -+ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ #include "rtl8812a/halhwimg8812a_bb.h" -+ #include "rtl8812a/halhwimg8812a_mac.h" -+ #include "rtl8812a/halhwimg8812a_rf.h" -+ #include "rtl8812a/phydm_regconfig8812a.h" -+ #endif -+ #include "rtl8812a/phydm_rtl8812a.h" -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8812a_hal.h" -+ #endif -+ #include "rtl8812a/version_rtl8812a.h" -+ -+#endif /* @8812 END */ -+ -+#if (RTL8814A_SUPPORT == 1) -+ -+ #include "rtl8814a/halhwimg8814a_mac.h" -+ #include "rtl8814a/halhwimg8814a_bb.h" -+ #include "rtl8814a/version_rtl8814a.h" -+ #include "rtl8814a/phydm_rtl8814a.h" -+ #include "halrf/rtl8814a/halhwimg8814a_rf.h" -+ #include "halrf/rtl8814a/version_rtl8814a_rf.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "halrf/rtl8814a/halrf_8814a_win.h" -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "halrf/rtl8814a/halrf_8814a_ce.h" -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "halrf/rtl8814a/halrf_8814a_ap.h" -+ #endif -+ #include "rtl8814a/phydm_regconfig8814a.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8814a_hal.h" -+ #include "halrf/rtl8814a/halrf_iqk_8814a.h" -+ #endif -+#endif /* @8814 END */ -+ -+#if (RTL8881A_SUPPORT == 1)/* @FOR_8881_IQK */ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "halrf/rtl8821a/halrf_iqk_8821a_win.h" -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "halrf/rtl8821a/halrf_iqk_8821a_ce.h" -+ #else -+ #include "halrf/rtl8821a/halrf_iqk_8821a_ap.h" -+ #endif -+#endif -+ -+#if (RTL8723B_SUPPORT == 1) -+ #include "rtl8723b/halhwimg8723b_mac.h" -+ #include "rtl8723b/halhwimg8723b_rf.h" -+ #include "rtl8723b/halhwimg8723b_bb.h" -+ #include "rtl8723b/phydm_regconfig8723b.h" -+ #include "rtl8723b/phydm_rtl8723b.h" -+ #include "rtl8723b/hal8723breg.h" -+ #include "rtl8723b/version_rtl8723b.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "halrf/rtl8723b/halrf_8723b_win.h" -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "halrf/rtl8723b/halrf_8723b_ce.h" -+ #include "rtl8723b/halhwimg8723b_mp.h" -+ #include "rtl8723b_hal.h" -+ #else -+ #include "halrf/rtl8723b/halrf_8723b_ap.h" -+ #endif -+#endif -+ -+#if (RTL8821A_SUPPORT == 1) -+ #include "rtl8821a/halhwimg8821a_mac.h" -+ #include "rtl8821a/halhwimg8821a_rf.h" -+ #include "rtl8821a/halhwimg8821a_bb.h" -+ #include "rtl8821a/phydm_regconfig8821a.h" -+ #include "rtl8821a/phydm_rtl8821a.h" -+ #include "rtl8821a/version_rtl8821a.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #include "halrf/rtl8821a/halrf_8821a_win.h" -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "halrf/rtl8821a/halrf_8821a_ce.h" -+ #include "halrf/rtl8821a/halrf_iqk_8821a_ce.h"/*@for IQK*/ -+ #include "halrf/rtl8812a/halrf_8812a_ce.h"/*@for IQK,LCK,Power-tracking*/ -+ #include "rtl8812a_hal.h" -+ #else -+ #endif -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) -+#include "../halmac/halmac_reg2.h" -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211_V2) -+#include "../halmac/halmac_reg2.h" -+#endif -+ -+ -+#if (RTL8822B_SUPPORT == 1) -+ #include "rtl8822b/halhwimg8822b_mac.h" -+ #include "rtl8822b/halhwimg8822b_bb.h" -+ #include "rtl8822b/phydm_regconfig8822b.h" -+ #include "halrf/rtl8822b/halrf_8822b.h" -+ #include "halrf/rtl8822b/halhwimg8822b_rf.h" -+ #include "halrf/rtl8822b/version_rtl8822b_rf.h" -+ #include "rtl8822b/phydm_rtl8822b.h" -+ #include "rtl8822b/phydm_hal_api8822b.h" -+ #include "rtl8822b/version_rtl8822b.h" -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #ifdef DM_ODM_CE_MAC80211 -+ #include "../halmac/halmac_reg_8822b.h" -+ #elif defined(DM_ODM_CE_MAC80211_V2) -+ #include "../halmac/halmac_reg_8822b.h" -+ #else -+ #include /* @struct HAL_DATA_TYPE */ -+ #include /* @RX_SMOOTH_FACTOR, reg definition and etc.*/ -+ #endif -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #endif -+ -+#endif -+ -+#if (RTL8703B_SUPPORT == 1) -+ #include "rtl8703b/phydm_rtl8703b.h" -+ #include "rtl8703b/phydm_regconfig8703b.h" -+ #include "rtl8703b/halhwimg8703b_mac.h" -+ #include "rtl8703b/halhwimg8703b_rf.h" -+ #include "rtl8703b/halhwimg8703b_bb.h" -+ #include "halrf/rtl8703b/halrf_8703b.h" -+ #include "rtl8703b/version_rtl8703b.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8703b_hal.h" -+ #endif -+#endif -+ -+#if (RTL8188F_SUPPORT == 1) -+ #include "rtl8188f/halhwimg8188f_mac.h" -+ #include "rtl8188f/halhwimg8188f_rf.h" -+ #include "rtl8188f/halhwimg8188f_bb.h" -+ #include "rtl8188f/hal8188freg.h" -+ #include "rtl8188f/phydm_rtl8188f.h" -+ #include "rtl8188f/phydm_regconfig8188f.h" -+ #include "halrf/rtl8188f/halrf_8188f.h" /*@for IQK,LCK,Power-tracking*/ -+ #include "rtl8188f/version_rtl8188f.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8188f_hal.h" -+ #endif -+#endif -+ -+#if (RTL8723D_SUPPORT == 1) -+ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ -+ #include "rtl8723d/halhwimg8723d_bb.h" -+ #include "rtl8723d/halhwimg8723d_mac.h" -+ #include "rtl8723d/halhwimg8723d_rf.h" -+ #include "rtl8723d/phydm_regconfig8723d.h" -+ #include "rtl8723d/hal8723dreg.h" -+ #include "rtl8723d/phydm_rtl8723d.h" -+ #include "halrf/rtl8723d/halrf_8723d.h" -+ #include "rtl8723d/version_rtl8723d.h" -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #ifdef DM_ODM_CE_MAC80211 -+ #else -+ #include "rtl8723d_hal.h" -+ #endif -+ #endif -+#endif /* @8723D End */ -+ -+#if (RTL8710B_SUPPORT == 1) -+ #if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+ -+ #include "rtl8710b/halhwimg8710b_bb.h" -+ #include "rtl8710b/halhwimg8710b_mac.h" -+ #include "rtl8710b/phydm_regconfig8710b.h" -+ #include "rtl8710b/hal8710breg.h" -+ #include "rtl8710b/phydm_rtl8710b.h" -+ #include "halrf/rtl8710b/halrf_8710b.h" -+ #include "halrf/rtl8710b/halhwimg8710b_rf.h" -+ #include "halrf/rtl8710b/version_rtl8710b_rf.h" -+ #include "rtl8710b/version_rtl8710b.h" -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8710b_hal.h" -+ #endif -+#endif /* @8710B End */ -+ -+#if (RTL8197F_SUPPORT == 1) -+ #include "rtl8197f/halhwimg8197f_mac.h" -+ #include "rtl8197f/halhwimg8197f_bb.h" -+ #include "rtl8197f/phydm_hal_api8197f.h" -+ #include "rtl8197f/version_rtl8197f.h" -+ #include "rtl8197f/phydm_rtl8197f.h" -+ #include "rtl8197f/phydm_regconfig8197f.h" -+ #include "halrf/rtl8197f/halrf_8197f.h" -+ #include "halrf/rtl8197f/halrf_iqk_8197f.h" -+ #include "halrf/rtl8197f/halrf_dpk_8197f.h" -+ #include "halrf/rtl8197f/halhwimg8197f_rf.h" -+ #include "halrf/rtl8197f/version_rtl8197f_rf.h" -+#endif -+ -+#if (RTL8821C_SUPPORT == 1) -+ #include "rtl8821c/phydm_hal_api8821c.h" -+ #include "rtl8821c/halhwimg8821c_mac.h" -+ #include "rtl8821c/halhwimg8821c_bb.h" -+ #include "rtl8821c/phydm_regconfig8821c.h" -+ #include "rtl8821c/phydm_rtl8821c.h" -+ #include "halrf/rtl8821c/halrf_8821c.h" -+ #include "halrf/rtl8821c/halhwimg8821c_rf.h" -+ #include "halrf/rtl8821c/version_rtl8821c_rf.h" -+ #include "rtl8821c/version_rtl8821c.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #ifdef DM_ODM_CE_MAC80211 -+ #include "../halmac/halmac_reg_8821c.h" -+ #else -+ #include "rtl8821c_hal.h" -+ #endif -+ #endif -+#endif -+ -+#if (RTL8192F_SUPPORT == 1) -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8192f_hal.h"/*need to before rf.h*/ -+ #endif -+ #include "rtl8192f/halhwimg8192f_mac.h" -+ #include "rtl8192f/halhwimg8192f_bb.h" -+ #include "rtl8192f/phydm_hal_api8192f.h" -+ #include "rtl8192f/version_rtl8192f.h" -+ #include "rtl8192f/phydm_rtl8192f.h" -+ #include "rtl8192f/phydm_regconfig8192f.h" -+ #include "halrf/rtl8192f/halrf_8192f.h" -+ #include "halrf/rtl8192f/halhwimg8192f_rf.h" -+ #include "halrf/rtl8192f/version_rtl8192f_rf.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "halrf/rtl8192f/halrf_dpk_8192f.h" -+ #endif -+#endif -+ -+#if (RTL8721D_SUPPORT == 1) -+ #include "halrf/rtl8721d/halrf_btiqk_8721d.h" -+ #include "halrf/rtl8721d/halrf_rfk_init_8721d.h" -+ #include "halrf/rtl8721d/halrf_dpk_8721d.h" -+ #include "halrf/rtl8721d/halrf_8721d.h" -+ #include "halrf/rtl8721d/halhwimg8721d_rf.h" -+ #include "halrf/rtl8721d/version_rtl8721d_rf.h" -+ #include "rtl8721d/phydm_hal_api8721d.h" -+ #include "rtl8721d/phydm_regconfig8721d.h" -+ #include "rtl8721d/halhwimg8721d_mac.h" -+ #include "rtl8721d/halhwimg8721d_bb.h" -+ #include "rtl8721d/version_rtl8721d.h" -+ #include "rtl8721d/phydm_rtl8721d.h" -+ #include "rtl8721d/hal8721dreg.h" -+ #include -+ #if 0 -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8721d_hal.h" -+ #endif -+ #endif -+#endif -+ -+#if (RTL8710C_SUPPORT == 1) -+ #include "halrf/rtl8710c/halrf_8710c.h" -+ #include "halrf/rtl8710c/halhwimg8710c_rf.h" -+ //#include "halrf/rtl8710c/version_rtl8710c_rf.h" -+ #include "rtl8710c/phydm_hal_api8710c.h" -+ #include "rtl8710c/phydm_regconfig8710c.h" -+ #include "rtl8710c/halhwimg8710c_mac.h" -+ #include "rtl8710c/halhwimg8710c_bb.h" -+ #include "rtl8710c/version_rtl8710c.h" -+ #include "rtl8710c/phydm_rtl8710c.h" -+ //#include "rtl8710c/hal87100creg.h" -+ #include /*@HAL_DATA_TYPE*/ -+ #if 0 -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "halrf/rtl8710c/halrf_dpk_8710c.h" -+ #endif -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include "rtl8710c_hal.h" -+ #endif -+ #endif -+#endif -+ -+#if (RTL8195B_SUPPORT == 1) -+ #include "halrf/rtl8195b/halrf_8195b.h" -+ #include "halrf/rtl8195b/halhwimg8195b_rf.h" -+ #include "halrf/rtl8195b/version_rtl8195b_rf.h" -+ #include "rtl8195b/phydm_hal_api8195b.h" -+ #include "rtl8195b/phydm_regconfig8195b.h" -+ #include "rtl8195b/halhwimg8195b_mac.h" -+ #include "rtl8195b/halhwimg8195b_bb.h" -+ #include "rtl8195b/version_rtl8195b.h" -+ #include /*@HAL_DATA_TYPE*/ -+#endif -+ -+#if (RTL8198F_SUPPORT == 1) -+ #include "rtl8198f/phydm_regconfig8198f.h" -+ #include "rtl8198f/phydm_hal_api8198f.h" -+ #include "rtl8198f/halhwimg8198f_mac.h" -+ #include "rtl8198f/halhwimg8198f_bb.h" -+ #include "rtl8198f/version_rtl8198f.h" -+ #include "halrf/rtl8198f/halrf_8198f.h" -+ #include "halrf/rtl8198f/halrf_iqk_8198f.h" -+ #include "halrf/rtl8198f/halhwimg8198f_rf.h" -+ #include "halrf/rtl8198f/version_rtl8198f_rf.h" -+#endif -+ -+#if (RTL8822C_SUPPORT) -+ #include "rtl8822c/halhwimg8822c_bb.h" -+ #include "rtl8822c/phydm_regconfig8822c.h" -+ #include "rtl8822c/phydm_hal_api8822c.h" -+ #include "rtl8822c/version_rtl8822c.h" -+ #include "rtl8822c/phydm_rtl8822c.h" -+ #include "halrf/rtl8822c/halrf_8822c.h" -+ #include "halrf/rtl8822c/halhwimg8822c_rf.h" -+ #include "halrf/rtl8822c/version_rtl8822c_rf.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ /* @struct HAL_DATA_TYPE */ -+ #include -+ /* @RX_SMOOTH_FACTOR, reg definition and etc.*/ -+ #include -+ #endif -+#endif -+#if (RTL8814B_SUPPORT == 1) -+ #include "rtl8814b/halhwimg8814b_bb.h" -+ #include "rtl8814b/phydm_regconfig8814b.h" -+ #include "halrf/rtl8814b/halrf_8814b.h" -+ #include "halrf/rtl8814b/halhwimg8814b_rf.h" -+ #include "halrf/rtl8814b/version_rtl8814b_rf.h" -+ #include "rtl8814b/phydm_hal_api8814b.h" -+ #include "rtl8814b/version_rtl8814b.h" -+ #include "rtl8814b/phydm_extraagc8814b.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include /* @struct HAL_DATA_TYPE */ -+ #include /* @RX_SMOOTH_FACTOR, reg definition and etc.*/ -+ #endif -+#endif -+#if (RTL8812F_SUPPORT) -+ #include "rtl8812f/halhwimg8812f_bb.h" -+ #include "rtl8812f/phydm_regconfig8812f.h" -+ #include "halrf/rtl8812f/halrf_8812f.h" -+ #include "halrf/rtl8812f/halhwimg8812f_rf.h" -+ #include "halrf/rtl8812f/version_rtl8812f_rf.h" -+ #include "rtl8812f/phydm_hal_api8812f.h" -+ #include "rtl8812f/version_rtl8812f.h" -+ #include "rtl8812f/phydm_rtl8812f.h" -+#endif -+#if (RTL8197G_SUPPORT) -+ #include "rtl8197g/halhwimg8197g_bb.h" -+ #include "rtl8197g/halhwimg8197g_mac.h" -+ #include "rtl8197g/phydm_regconfig8197g.h" -+ #include "halrf/rtl8197g/halrf_8197g.h" -+ #include "halrf/rtl8197g/halhwimg8197g_rf.h" -+ #include "halrf/rtl8197g/version_rtl8197g_rf.h" -+ #include "rtl8197g/phydm_hal_api8197g.h" -+ #include "rtl8197g/version_rtl8197g.h" -+ #include "rtl8197g/phydm_rtl8197g.h" -+#endif -+#if (RTL8723F_SUPPORT) -+ #include "rtl8723f/halhwimg8723f_bb.h" -+ #include "rtl8723f/halhwimg8723f_mac.h" -+ #include "rtl8723f/phydm_regconfig8723f.h" -+ #include "halrf/rtl8723f/halrf_8723f.h" -+ #include "halrf/rtl8723f/halhwimg8723f_rf.h" -+ #include "halrf/rtl8723f/version_rtl8723f_rf.h" -+ #include "halrf/rtl8723f/halrf_iqk_8723f.h" -+ #include "halrf/rtl8723f/halrf_dpk_8723f.h" -+ #include "halrf/rtl8723f/halrf_tssi_8723f.h" -+ #include "halrf/rtl8723f/halrf_rfk_init_8723f.h" -+ #include "rtl8723f/phydm_hal_api8723f.h" -+ #include "rtl8723f/version_rtl8723f.h" -+ #include "rtl8723f/phydm_rtl8723f.h" -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ /* @struct HAL_DATA_TYPE */ -+ #include -+ /* @RX_SMOOTH_FACTOR, reg definition and etc.*/ -+ #include -+ #endif -+#endif -+#endif /* @__ODM_PRECOMP_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_primary_cca.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_primary_cca.c -new file mode 100644 -index 000000000000..dec6c5365f08 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_primary_cca.c -@@ -0,0 +1,173 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/************************************************************* -+ * include files -+ ************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+#ifdef PHYDM_PRIMARY_CCA -+ -+void phydm_write_dynamic_cca( -+ void *dm_void, -+ u8 curr_mf_state -+ -+ ) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca; -+ -+ if (pri_cca->mf_state == curr_mf_state) -+ return; -+ -+ if (dm->support_ic_type & ODM_IC_11N_SERIES) { -+ if (curr_mf_state == MF_USC_LSC) { -+ odm_set_bb_reg(dm, R_0xc6c, 0x180, MF_USC_LSC); -+ /*@40M OFDM MF CCA threshold*/ -+ odm_set_bb_reg(dm, R_0xc84, 0xf0000000, -+ pri_cca->cca_th_40m_bkp); -+ } else { -+ odm_set_bb_reg(dm, R_0xc6c, 0x180, curr_mf_state); -+ /*@40M OFDM MF CCA threshold*/ -+ odm_set_bb_reg(dm, R_0xc84, 0xf0000000, 0); -+ } -+ } -+ -+ pri_cca->mf_state = curr_mf_state; -+ PHYDM_DBG(dm, DBG_PRI_CCA, "Set CCA at ((%s SB)), 0xc6c[8:7]=((%d))\n", -+ ((curr_mf_state == MF_USC_LSC) ? "D" : -+ ((curr_mf_state == MF_LSC) ? "L" : "U")), curr_mf_state); -+} -+ -+void phydm_primary_cca_reset( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca; -+ -+ PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA] Reset\n"); -+ pri_cca->mf_state = 0xff; -+ pri_cca->pre_bw = (enum channel_width)0xff; -+ phydm_write_dynamic_cca(dm, MF_USC_LSC); -+} -+ -+void phydm_primary_cca_11n( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca; -+ enum channel_width curr_bw = (enum channel_width)*dm->band_width; -+ -+ if (!(dm->support_ability & ODM_BB_PRIMARY_CCA)) -+ return; -+ -+ if (!dm->is_linked) { -+ PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA][No Link!!!]\n"); -+ -+ if (pri_cca->pri_cca_is_become_linked) { -+ phydm_primary_cca_reset(dm); -+ pri_cca->pri_cca_is_become_linked = dm->is_linked; -+ } -+ return; -+ } else { -+ if (!pri_cca->pri_cca_is_become_linked) { -+ PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA][Linked !!!]\n"); -+ pri_cca->pri_cca_is_become_linked = dm->is_linked; -+ } -+ } -+ -+ if (curr_bw != pri_cca->pre_bw) { -+ PHYDM_DBG(dm, DBG_PRI_CCA, "[Primary CCA] start ==>\n"); -+ pri_cca->pre_bw = curr_bw; -+ -+ if (curr_bw == CHANNEL_WIDTH_40) { -+ if (*dm->sec_ch_offset == SECOND_CH_AT_LSB) { -+ /* Primary CH @ upper sideband*/ -+ PHYDM_DBG(dm, DBG_PRI_CCA, -+ "BW40M, Primary CH at USB\n"); -+ phydm_write_dynamic_cca(dm, MF_USC); -+ } else { -+ /*Primary CH @ lower sideband*/ -+ PHYDM_DBG(dm, DBG_PRI_CCA, -+ "BW40M, Primary CH at LSB\n"); -+ phydm_write_dynamic_cca(dm, MF_LSC); -+ } -+ } else { -+ PHYDM_DBG(dm, DBG_PRI_CCA, "Not BW40M, USB + LSB\n"); -+ phydm_primary_cca_reset(dm); -+ } -+ } -+} -+ -+boolean -+odm_dynamic_primary_cca_dup_rts(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca; -+ -+ return pri_cca->dup_rts_flag; -+} -+ -+void phydm_primary_cca_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_pricca_struct *pri_cca = &dm->dm_pri_cca; -+ -+ if (!(dm->support_ability & ODM_BB_PRIMARY_CCA)) -+ return; -+ -+ if (!(dm->support_ic_type & ODM_IC_11N_SERIES)) -+ return; -+ -+ PHYDM_DBG(dm, DBG_PRI_CCA, "[PriCCA] Init ==>\n"); -+#if (RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) -+ pri_cca->dup_rts_flag = 0; -+ pri_cca->intf_flag = 0; -+ pri_cca->intf_type = 0; -+ pri_cca->monitor_flag = 0; -+ pri_cca->pri_cca_flag = 0; -+ pri_cca->ch_offset = 0; -+#endif -+ pri_cca->mf_state = 0xff; -+ pri_cca->pre_bw = (enum channel_width)0xff; -+ pri_cca->cca_th_40m_bkp = (u8)odm_get_bb_reg(dm, R_0xc84, 0xf0000000); -+} -+ -+void phydm_primary_cca(void *dm_void) -+{ -+#ifdef PHYDM_PRIMARY_CCA -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ic_type & ODM_IC_11N_SERIES)) -+ return; -+ -+ if (!(dm->support_ability & ODM_BB_PRIMARY_CCA)) -+ return; -+ -+ phydm_primary_cca_11n(dm); -+ -+#endif -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_primary_cca.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_primary_cca.h -new file mode 100644 -index 000000000000..1978586f293d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_primary_cca.h -@@ -0,0 +1,76 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_PRIMARYCCA_H__ -+#define __PHYDM_PRIMARYCCA_H__ -+ -+#ifdef PHYDM_PRIMARY_CCA -+#define PRIMARYCCA_VERSION "2.0" -+ -+/*@============================================================*/ -+/*@Definition */ -+/*@============================================================*/ -+ -+#define OFDMCCA_TH 500 -+#define bw_ind_bias 500 -+#define PRI_CCA_MONITOR_TIME 30 -+ -+/*@============================================================*/ -+/*structure and define*/ -+/*@============================================================*/ -+enum primary_cca_ch_position { /*N-series REG0xc6c[8:7]*/ -+ MF_USC_LSC = 0, -+ MF_LSC = 1, -+ MF_USC = 2 -+}; -+ -+struct phydm_pricca_struct { -+ #if (RTL8188E_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) -+ u8 pri_cca_flag; -+ u8 intf_flag; -+ u8 intf_type; -+ u8 monitor_flag; -+ u8 ch_offset; -+ #endif -+ u8 dup_rts_flag; -+ u8 cca_th_40m_bkp; /*@c84[31:28]*/ -+ enum channel_width pre_bw; -+ u8 pri_cca_is_become_linked; -+ u8 mf_state; -+}; -+ -+/*@============================================================*/ -+/*@function prototype*/ -+/*@============================================================*/ -+void phydm_write_dynamic_cca(void *dm_void, u8 curr_mf_state); -+ -+boolean odm_dynamic_primary_cca_dup_rts(void *dm_void); -+ -+void phydm_primary_cca_init(void *dm_void); -+ -+void phydm_primary_cca(void *dm_void); -+#endif /*@#ifdef PHYDM_PRIMARY_CCA*/ -+#endif /*@#ifndef __PHYDM_PRIMARYCCA_H__*/ -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_psd.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_psd.c -new file mode 100644 -index 000000000000..8a19160b9079 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_psd.c -@@ -0,0 +1,564 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/****************************************************************************** -+ * include files -+ *****************************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef CONFIG_PSD_TOOL -+u32 phydm_get_psd_data(void *dm_void, u32 psd_tone_idx, u32 igi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct psd_info *dm_psd_table = &dm->dm_psd_table; -+ u32 psd_report = 0; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ #if(RTL8723F_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8723F)) { -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, 0x3ff80000, psd_tone_idx & 0x7ff); -+ /*PSD trigger start*/ -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(16), 1); -+ ODM_delay_us(10 << (dm_psd_table->fft_smp_point >> 7)); -+ /*PSD trigger stop*/ -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(16), 0); -+ } -+ #endif -+ #if 0 -+ odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); -+ odm_set_bb_reg(dm, R_0x1e88, BIT(27) | BIT(26), -+ psd_tone_idx >> 10); -+ /*PSD trigger start*/ -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(18), 1); -+ ODM_delay_us(10 << (dm_psd_table->fft_smp_point >> 7)); -+ /*PSD trigger stop*/ -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(18), 0); -+ #endif -+ } else if (dm->support_ic_type & (ODM_RTL8721D | -+ ODM_RTL8710C)) { -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, 0xfff, psd_tone_idx); -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(28), 1); -+ /*PSD trigger start*/ -+ ODM_delay_us(10 << (dm_psd_table->fft_smp_point >> 7)); -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(28), 0); -+ /*PSD trigger stop*/ -+ } else { -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, 0x3ff, psd_tone_idx); -+ /*PSD trigger start*/ -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(22), 1); -+ ODM_delay_us(10 << (dm_psd_table->fft_smp_point >> 7)); -+ /*PSD trigger stop*/ -+ odm_set_bb_reg(dm, dm_psd_table->psd_reg, BIT(22), 0); -+ } -+ -+ /*Get PSD Report*/ -+ if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8721D | -+ ODM_RTL8710C)) { -+ psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg, -+ 0xffffff); -+ psd_report = psd_report >> 5; -+ } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ #if(RTL8723F_SUPPORT) -+ if (dm->support_ic_type & (ODM_RTL8723F)) { -+ psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg, -+ 0x1ffffff); -+ } -+ #endif -+ #if 0 -+ psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg, -+ 0xffffff); -+ #endif -+ } else { -+ psd_report = odm_get_bb_reg(dm, dm_psd_table->psd_report_reg, -+ 0xffff); -+ } -+ psd_report = odm_convert_to_db((u64)psd_report) + igi; -+ -+ return psd_report; -+} -+ -+u8 psd_result_cali_tone_8821[7] = {21, 28, 33, 93, 98, 105, 127}; -+u8 psd_result_cali_val_8821[7] = {67, 69, 71, 72, 71, 69, 67}; -+ -+u8 phydm_psd(void *dm_void, u32 igi, u16 start_point, u16 stop_point) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct psd_info *dm_psd_table = &dm->dm_psd_table; -+ u32 i = 0, mod_tone_idx = 0; -+ u32 t = 0; -+ u16 fft_max_half_bw = 0; -+ u16 psd_fc_channel = dm_psd_table->psd_fc_channel; -+ u8 ag_rf_mode_reg = 0; -+ u8 is_5G = 0; -+ u32 psd_result_tmp = 0; -+ u8 psd_result = 0; -+ u8 psd_result_cali_tone[7] = {0}; -+ u8 psd_result_cali_val[7] = {0}; -+ u8 noise_idx = 0; -+ u8 set_result = 0; -+ u32 igi_tmp = 0x6e; -+ -+ if (dm->support_ic_type == ODM_RTL8821) { -+ odm_move_memory(dm, psd_result_cali_tone, -+ psd_result_cali_tone_8821, 7); -+ odm_move_memory(dm, psd_result_cali_val, -+ psd_result_cali_val_8821, 7); -+ } -+ -+ dm_psd_table->psd_in_progress = 1; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "PSD Start =>\n"); -+ -+ /* @[Stop DIG]*/ -+ /* @IGI target at 0dBm & make it can't CCA*/ -+ if (phydm_pause_func(dm, F00_DIG, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_3, 1, -+ &igi_tmp) == PAUSE_FAIL) { -+ return PHYDM_SET_FAIL; -+ } -+ -+ ODM_delay_us(10); -+ -+ if (phydm_stop_ic_trx(dm, PHYDM_SET) == PHYDM_SET_FAIL) { -+ phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_3, -+ 1, &igi_tmp); -+ return PHYDM_SET_FAIL; -+ } -+ -+ /* @[Set IGI]*/ -+ phydm_write_dig_reg(dm, (u8)igi); -+ -+ /* @[Backup RF Reg]*/ -+ dm_psd_table->rf_0x18_bkp = odm_get_rf_reg(dm, RF_PATH_A, RF_0x18, -+ RFREG_MASK); -+ dm_psd_table->rf_0x18_bkp_b = odm_get_rf_reg(dm, RF_PATH_B, RF_0x18, -+ RFREG_MASK); -+ -+ if (psd_fc_channel > 14) { -+ is_5G = 1; -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | -+ ODM_RTL8197G)) { -+ #if 0 -+ if (psd_fc_channel < 80) -+ ag_rf_mode_reg = 0x1; -+ else if (psd_fc_channel >= 80 && psd_fc_channel <= 140) -+ ag_rf_mode_reg = 0x3; -+ else if (psd_fc_channel > 140) -+ ag_rf_mode_reg = 0x5; -+ #endif -+ } else if (dm->support_ic_type & ODM_RTL8723F) { -+ if (psd_fc_channel < 80) -+ ag_rf_mode_reg = 0x1; -+ else if (psd_fc_channel >= 80 && psd_fc_channel <= 144) -+ ag_rf_mode_reg = 0x5; -+ else if (psd_fc_channel > 144) -+ ag_rf_mode_reg = 0x9; -+ } else if (dm->support_ic_type == ODM_RTL8721D) { -+ if (psd_fc_channel >= 36 && psd_fc_channel <= 64) -+ ag_rf_mode_reg = 0x1; -+ else if (psd_fc_channel >= 100 && psd_fc_channel <= 140) -+ ag_rf_mode_reg = 0x5; -+ else if (psd_fc_channel > 140) -+ ag_rf_mode_reg = 0x9; -+ } else { -+ if (psd_fc_channel >= 36 && psd_fc_channel <= 64) -+ ag_rf_mode_reg = 0x1; -+ else if (psd_fc_channel >= 100 && psd_fc_channel <= 140) -+ ag_rf_mode_reg = 0x3; -+ else if (psd_fc_channel > 140) -+ ag_rf_mode_reg = 0x5; -+ } -+ } -+ -+ /* Set RF fc*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0xff, psd_fc_channel); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0xff, psd_fc_channel); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x300, is_5G); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x300, is_5G); -+ if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8812F | -+ ODM_RTL8197G)) { -+ #if 0 -+ /* @2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x3000, -+ dm_psd_table->psd_bw_rf_reg); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x3000, -+ dm_psd_table->psd_bw_rf_reg); -+ /* Set RF ag fc mode*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x70000, -+ ag_rf_mode_reg); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x70000, -+ ag_rf_mode_reg); -+ #endif -+ } else if (dm->support_ic_type & ODM_RTL8723F) { -+ /* @2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x1c00, -+ dm_psd_table->psd_bw_rf_reg); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x1c00, -+ dm_psd_table->psd_bw_rf_reg); -+ /* Set RF ag fc mode*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x30000, 1); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0x30000, 1); -+ if(ag_rf_mode_reg == 1) { -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x19, 0xc0000, 0); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x19, 0xc0000, 0); -+ } -+ else if(ag_rf_mode_reg == 5){ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x19, 0xc0000, 1); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x19, 0xc0000, 1); -+ } -+ else { -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x19, 0xc0000, 2); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x19, 0xc0000, 2); -+ } -+ } else { -+ /* @2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ -+ if (dm->support_ic_type == ODM_RTL8721D) { -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0x1c00, -+ dm_psd_table->psd_bw_rf_reg); -+#if (RTL8710C_SUPPORT == 1) -+ } else if (dm->support_ic_type == ODM_RTL8710C) { -+ odm_set_rf_reg(dm, RF_PATH_A, -+ RF_0x18, 0x1c00, -+ dm_psd_table->psd_bw_rf_reg); -+#endif -+ } else { -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0xc00, -+ dm_psd_table->psd_bw_rf_reg); -+ } -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0xc00, -+ dm_psd_table->psd_bw_rf_reg); -+ /* Set RF ag fc mode*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, 0xf0000, -+ ag_rf_mode_reg); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, 0xf0000, -+ ag_rf_mode_reg); -+ } -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES){ -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ PHYDM_DBG(dm, ODM_COMP_API, "0x1d70=((0x%x))\n", -+ odm_get_bb_reg(dm, R_0x1d70, MASKDWORD)); -+ PHYDM_DBG(dm, ODM_COMP_API, "RF0x19=((0x%x))\n", -+ odm_get_rf_reg(dm, RF_PATH_A, RF_0x19, RFREG_MASK)); -+ } -+ } else -+ PHYDM_DBG(dm, ODM_COMP_API, "0xc50=((0x%x))\n", -+ odm_get_bb_reg(dm, R_0xc50, MASKDWORD)); -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "RF0x18=((0x%x))\n", -+ odm_get_rf_reg(dm, RF_PATH_A, RF_0x18, RFREG_MASK)); -+ -+ /* @[Stop 3-wires]*/ -+ phydm_stop_3_wire(dm, PHYDM_SET); -+ -+ ODM_delay_us(10); -+ -+ if (stop_point > (dm_psd_table->fft_smp_point - 1)) -+ stop_point = (dm_psd_table->fft_smp_point - 1); -+ -+ if (start_point > (dm_psd_table->fft_smp_point - 1)) -+ start_point = (dm_psd_table->fft_smp_point - 1); -+ -+ if (start_point > stop_point) -+ stop_point = start_point; -+ -+ for (i = start_point; i <= stop_point; i++) { -+ fft_max_half_bw = (dm_psd_table->fft_smp_point) >> 1; -+ -+ if (i < fft_max_half_bw) -+ mod_tone_idx = i + fft_max_half_bw; -+ else -+ mod_tone_idx = i - fft_max_half_bw; -+ -+ psd_result_tmp = 0; -+ for (t = 0; t < dm_psd_table->sw_avg_time; t++) -+ psd_result_tmp += phydm_get_psd_data(dm, mod_tone_idx, -+ igi); -+ psd_result = -+ (u8)((psd_result_tmp / dm_psd_table->sw_avg_time)) - -+ dm_psd_table->psd_pwr_common_offset; -+ -+ if (dm_psd_table->fft_smp_point == 128 && -+ dm_psd_table->noise_k_en) { -+ if (i > psd_result_cali_tone[noise_idx]) -+ noise_idx++; -+ -+ if (noise_idx > 6) -+ noise_idx = 6; -+ -+ if (psd_result >= psd_result_cali_val[noise_idx]) -+ psd_result = psd_result - -+ psd_result_cali_val[noise_idx]; -+ else -+ psd_result = 0; -+ -+ dm_psd_table->psd_result[i] = psd_result; -+ } -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "[%d] N_cali = %d, PSD = %d\n", -+ mod_tone_idx, psd_result_cali_val[noise_idx], -+ psd_result); -+ } -+ -+ /*@[Start 3-wires]*/ -+ phydm_stop_3_wire(dm, PHYDM_REVERT); -+ -+ ODM_delay_us(10); -+ -+ /*@[Revert Reg]*/ -+ set_result = phydm_stop_ic_trx(dm, PHYDM_REVERT); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x18, RFREG_MASK, -+ dm_psd_table->rf_0x18_bkp); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x18, RFREG_MASK, -+ dm_psd_table->rf_0x18_bkp_b); -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "PSD finished\n\n"); -+ -+ phydm_pause_func(dm, F00_DIG, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_3, 1, -+ &igi_tmp); -+ dm_psd_table->psd_in_progress = 0; -+ -+ return PHYDM_SET_SUCCESS; -+} -+ -+void phydm_psd_para_setting(void *dm_void, u8 sw_avg_time, u8 hw_avg_time, -+ u8 i_q_setting, u16 fft_smp_point, u8 ant_sel, -+ u8 psd_input, u8 channel, u8 noise_k_en) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct psd_info *dm_psd_table = &dm->dm_psd_table; -+ u8 fft_smp_point_idx = 0; -+ -+ dm_psd_table->fft_smp_point = fft_smp_point; -+ -+ if (sw_avg_time == 0) -+ sw_avg_time = 1; -+ -+ dm_psd_table->sw_avg_time = sw_avg_time; -+ dm_psd_table->psd_fc_channel = channel; -+ dm_psd_table->noise_k_en = noise_k_en; -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ if (fft_smp_point == 128) -+ fft_smp_point_idx = 3; -+ else if (fft_smp_point == 256) -+ fft_smp_point_idx = 2; -+ else if (fft_smp_point == 512) -+ fft_smp_point_idx = 1; -+ else if (fft_smp_point == 1024) -+ fft_smp_point_idx = 0; -+ } -+ else { -+ if (fft_smp_point == 128) -+ fft_smp_point_idx = 0; -+ else if (fft_smp_point == 256) -+ fft_smp_point_idx = 1; -+ else if (fft_smp_point == 512) -+ fft_smp_point_idx = 2; -+ else if (fft_smp_point == 1024) -+ fft_smp_point_idx = 3; -+ } -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ #if (RTL8723F_SUPPORT) -+ odm_set_bb_reg(dm, R_0x1e8c, BIT(12) | BIT(11), hw_avg_time); -+ odm_set_bb_reg(dm, R_0x1e8c, BIT(14) | BIT(13), -+ fft_smp_point_idx); -+ odm_set_bb_reg(dm, R_0x1e8c, BIT(18) | BIT(17), ant_sel); -+ odm_set_bb_reg(dm, R_0x1e88, BIT(25) | BIT(24), psd_input); -+ #else -+ #if 0 -+ odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); -+ odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); -+ -+ if (fft_smp_point == 4096) { -+ odm_set_bb_reg(dm, R_0x1e88, BIT(31) | BIT(30), 0x2); -+ } else if (fft_smp_point == 2048) { -+ odm_set_bb_reg(dm, R_0x1e88, BIT(31) | BIT(30), 0x1); -+ } else { -+ odm_set_bb_reg(dm, R_0x1e88, BIT(31) | BIT(30), 0x0); -+ odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), -+ fft_smp_point_idx); -+ } -+ odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); -+ odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); -+ #endif -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ odm_set_bb_reg(dm, R_0x910, BIT(11) | BIT(10), i_q_setting); -+ odm_set_bb_reg(dm, R_0x910, BIT(13) | BIT(12), hw_avg_time); -+ odm_set_bb_reg(dm, R_0x910, BIT(15) | BIT(14), -+ fft_smp_point_idx); -+ odm_set_bb_reg(dm, R_0x910, BIT(17) | BIT(16), ant_sel); -+ odm_set_bb_reg(dm, R_0x910, BIT(23), psd_input); -+ } else if (dm->support_ic_type & (ODM_RTL8721D | ODM_RTL8710C)) { -+ odm_set_bb_reg(dm, R_0x808, BIT(19) | BIT(18), i_q_setting); -+ odm_set_bb_reg(dm, R_0x808, BIT(21) | BIT(20), hw_avg_time); -+ odm_set_bb_reg(dm, R_0x808, BIT(23) | BIT(22), -+ fft_smp_point_idx); -+ odm_set_bb_reg(dm, R_0x804, BIT(5) | BIT(4), ant_sel); -+ odm_set_bb_reg(dm, R_0x80c, BIT(23), psd_input); -+ -+#if 0 -+ } else { /*ODM_IC_11N_SERIES*/ -+#endif -+ } -+ /*@bw = (*dm->band_width); //ODM_BW20M */ -+ /*@channel = *(dm->channel);*/ -+} -+ -+void phydm_psd_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct psd_info *dm_psd_table = &dm->dm_psd_table; -+ -+ PHYDM_DBG(dm, ODM_COMP_API, "PSD para init\n"); -+ -+ dm_psd_table->psd_in_progress = false; -+ -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { -+ #if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8723F) { -+ dm_psd_table->psd_reg = R_0x1e8c; -+ dm_psd_table->psd_report_reg = R_0x2d90; -+ -+ /*@2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ -+ dm_psd_table->psd_bw_rf_reg = 2; -+ } -+ #else -+ #if 0 -+ dm_psd_table->psd_reg = R_0x1e8c; -+ dm_psd_table->psd_report_reg = R_0x2d90; -+ -+ /*@2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ -+ dm_psd_table->psd_bw_rf_reg = 1; -+ #endif -+ -+ return; -+ #endif -+ } else if (dm->support_ic_type & ODM_IC_11AC_SERIES) { -+ dm_psd_table->psd_reg = R_0x910; -+ dm_psd_table->psd_report_reg = R_0xf44; -+ -+ /*@2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ -+ if (ODM_IC_11AC_2_SERIES) -+ dm_psd_table->psd_bw_rf_reg = 1; -+ else -+ dm_psd_table->psd_bw_rf_reg = 2; -+ } else { -+ dm_psd_table->psd_reg = R_0x808; -+ dm_psd_table->psd_report_reg = R_0x8b4; -+ /*@2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ -+ dm_psd_table->psd_bw_rf_reg = 2; -+ } -+ -+ dm_psd_table->psd_pwr_common_offset = 0; -+ -+ phydm_psd_para_setting(dm, 1, 2, 3, 128, 0, 0, 7, 0); -+#if 0 -+ /*phydm_psd(dm, 0x3c, 0, 127);*/ /* target at -50dBm */ -+#endif -+} -+ -+void phydm_psd_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u8 i = 0; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ #if (RTL8723F_SUPPORT) -+ if (dm->support_ic_type & ODM_RTL8723F) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{0} {sw_avg} {hw_avg 0:3} {1:I,2:Q,3:IQ} {fft_point: 128*(1:4)}\n{path_sel 0~3} {0:ADC, 1:rxdata_fir_in, 2:rx_nbi_nf_stage2} {CH} {noise_k}\n\n"); -+ #endif -+ #if 0 -+ if (dm->support_ic_type & ODM_IC_JGR3_SERIES) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{0} {sw_avg} {hw_avg 0:3} {1:I,2:Q,3:IQ} {fft_point: 128*(1:4) 2048 4096}\n{path_sel 0~3} {0:ADC, 1:rxdata_fir_in, 2:rx_nbi_nf_stage2} {CH} {noise_k}\n\n"); -+ else -+ #endif -+ #endif -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{0} {sw_avg} {hw_avg 0:3} {1:I,2:Q,3:IQ} {fft_point: 128*(1:4)} {path_sel 0~3} {0:ADC, 1:RXIQC} {CH} {noise_k}\n"); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{1} {IGI(hex)} {start_point} {stop_point}\n"); -+ goto out; -+ } -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]); -+ -+ if (var1[0] == 0) { -+ for (i = 1; i < 10; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, -+ &var1[i]); -+ } -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "sw_avg_time=((%d)), hw_avg_time=((%d)), IQ=((%d)), fft=((%d)), path=((%d)), input =((%d)) ch=((%d)), noise_k=((%d))\n", -+ var1[1], var1[2], var1[3], var1[4], var1[5], -+ var1[6], (u8)var1[7], (u8)var1[8]); -+ phydm_psd_para_setting(dm, (u8)var1[1], (u8)var1[2], -+ (u8)var1[3], (u16)var1[4], -+ (u8)var1[5], (u8)var1[6], -+ (u8)var1[7], (u8)var1[8]); -+ -+ } else if (var1[0] == 1) { -+ PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]); -+ PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]); -+ PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[3]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "IGI=((0x%x)), start_point=((%d)), stop_point=((%d))\n", -+ var1[1], var1[2], var1[3]); -+ dm->debug_components |= ODM_COMP_API; -+ if (phydm_psd(dm, var1[1], (u16)var1[2], (u16)var1[3]) == -+ PHYDM_SET_FAIL) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "PSD_SET_FAIL\n"); -+ dm->debug_components &= ~(ODM_COMP_API); -+ } -+ -+out: -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+u8 phydm_get_psd_result_table(void *dm_void, int index) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct psd_info *dm_psd_table = &dm->dm_psd_table; -+ u8 result = 0; -+ -+ if (index < 128) -+ result = dm_psd_table->psd_result[index]; -+ -+ return result; -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_psd.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_psd.h -new file mode 100644 -index 000000000000..dec384ab2b99 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_psd.h -@@ -0,0 +1,68 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMPSD_H__ -+#define __PHYDMPSD_H__ -+ -+/*@#define PSD_VERSION "1.0"*/ /*@2016.09.22 Dino*/ -+/*@2016.10.07 Dino, Add Option for PSD Tone index Selection */ -+/*@2019.04.26 Early return & "IF0" for JGR3 ICs */ -+#define PSD_VERSION "1.2" -+ -+#ifdef CONFIG_PSD_TOOL -+ -+ -+struct psd_info { -+ u8 psd_in_progress; -+ u32 psd_reg; -+ u32 psd_report_reg; -+ u8 psd_pwr_common_offset; -+ u16 sw_avg_time; -+ u16 fft_smp_point; -+ u32 rf_0x18_bkp; -+ u32 rf_0x18_bkp_b; -+ u16 psd_fc_channel; -+ u32 psd_bw_rf_reg; -+ u8 psd_result[128]; -+ u8 noise_k_en; -+}; -+ -+u32 phydm_get_psd_data(void *dm_void, u32 psd_tone_idx, u32 igi); -+ -+void phydm_psd_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+u8 phydm_psd(void *dm_void, u32 igi, u16 start_point, u16 stop_point); -+ -+void phydm_psd_para_setting(void *dm_void, u8 sw_avg_time, u8 hw_avg_time, -+ u8 i_q_setting, u16 fft_smp_point, u8 ant_sel, -+ u8 psd_input, u8 channel, u8 noise_k_en); -+ -+void phydm_psd_init(void *dm_void); -+ -+u8 phydm_get_psd_result_table(void *dm_void, int index); -+ -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_rainfo.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_rainfo.c -new file mode 100644 -index 000000000000..69738c98accb ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_rainfo.c -@@ -0,0 +1,2431 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+boolean phydm_is_vht_rate(void *dm_void, u8 rate) -+{ -+ return ((rate & 0x7f) >= ODM_RATEVHTSS1MCS0) ? true : false; -+} -+ -+boolean phydm_is_ht_rate(void *dm_void, u8 rate) -+{ -+ return (((rate & 0x7f) >= ODM_RATEMCS0) && -+ ((rate & 0x7f) <= ODM_RATEMCS31)) ? true : false; -+} -+ -+boolean phydm_is_ofdm_rate(void *dm_void, u8 rate) -+{ -+ return (((rate & 0x7f) >= ODM_RATE6M) && -+ ((rate & 0x7f) <= ODM_RATE54M)) ? true : false; -+} -+ -+boolean phydm_is_cck_rate(void *dm_void, u8 rate) -+{ -+ return ((rate & 0x7f) <= ODM_RATE11M) ? true : false; -+} -+ -+u8 phydm_legacy_rate_2_spec_rate(void *dm_void, u8 rate) -+{ -+ u8 rate_idx = 0x0; -+ u8 legacy_spec_rate_t[8] = {PHYDM_SPEC_RATE_6M, PHYDM_SPEC_RATE_9M, -+ PHYDM_SPEC_RATE_12M, PHYDM_SPEC_RATE_18M, -+ PHYDM_SPEC_RATE_24M, PHYDM_SPEC_RATE_36M, -+ PHYDM_SPEC_RATE_48M, PHYDM_SPEC_RATE_54M}; -+ -+ if ((rate >= ODM_RATE6M) && (rate <= ODM_RATE54M)) -+ rate_idx = rate - ODM_RATE6M; -+ return legacy_spec_rate_t[rate_idx]; -+} -+ -+u8 phydm_rate_2_rate_digit(void *dm_void, u8 rate) -+{ -+ u8 legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54}; -+ u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ -+ u8 rate_digit = 0; -+ -+ if (rate_idx >= ODM_RATEVHTSS1MCS0) -+ rate_digit = (rate_idx - ODM_RATEVHTSS1MCS0) % 10; -+ else if (rate_idx >= ODM_RATEMCS0) -+ rate_digit = (rate_idx - ODM_RATEMCS0); -+ else if (rate_idx <= ODM_RATE54M) -+ rate_digit = legacy_table[rate_idx]; -+ -+ return rate_digit; -+} -+ -+u8 phydm_rate_type_2_num_ss(void *dm_void, enum PDM_RATE_TYPE type) -+{ -+ u8 num_ss = 1; -+ -+ switch (type) { -+ case PDM_CCK: -+ case PDM_OFDM: -+ case PDM_1SS: -+ num_ss = 1; -+ break; -+ case PDM_2SS: -+ num_ss = 2; -+ break; -+ case PDM_3SS: -+ num_ss = 3; -+ break; -+ case PDM_4SS: -+ num_ss = 4; -+ break; -+ default: -+ break; -+ } -+ -+ return num_ss; -+} -+ -+u8 phydm_rate_to_num_ss(void *dm_void, u8 data_rate) -+{ -+ u8 num_ss = 1; -+ -+ if (data_rate <= ODM_RATE54M) -+ num_ss = 1; -+ else if (data_rate <= ODM_RATEMCS31) -+ num_ss = ((data_rate - ODM_RATEMCS0) >> 3) + 1; -+ else if (data_rate <= ODM_RATEVHTSS1MCS9) -+ num_ss = 1; -+ else if (data_rate <= ODM_RATEVHTSS2MCS9) -+ num_ss = 2; -+ else if (data_rate <= ODM_RATEVHTSS3MCS9) -+ num_ss = 3; -+ else if (data_rate <= ODM_RATEVHTSS4MCS9) -+ num_ss = 4; -+ -+ return num_ss; -+} -+ -+void phydm_h2C_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 dm_value[10] = {0}; -+ u8 i = 0, input_idx = 0; -+ u8 h2c_parameter[H2C_MAX_LENGTH] = {0}; -+ u8 phydm_h2c_id = 0; -+ -+ for (i = 0; i < 8; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); -+ input_idx++; -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ phydm_h2c_id = (u8)dm_value[0]; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Phydm Send H2C_ID (( 0x%x))\n", phydm_h2c_id); -+ -+ for (i = 0; i < H2C_MAX_LENGTH; i++) { -+ h2c_parameter[i] = (u8)dm_value[i + 1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "H2C: Byte[%d] = ((0x%x))\n", i, h2c_parameter[i]); -+ } -+ -+ odm_fill_h2c_cmd(dm, phydm_h2c_id, H2C_MAX_LENGTH, h2c_parameter); -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_fw_fix_rate(void *dm_void, u8 en, u8 macid, u8 bw, u8 rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 reg_u32_tmp; -+ -+ if (dm->support_ic_type & PHYDM_IC_8051_SERIES) { -+ reg_u32_tmp = (bw << 24) | (rate << 16) | (macid << 8) | en; -+ odm_set_mac_reg(dm, R_0x4a0, MASKDWORD, reg_u32_tmp); -+ -+ } else { -+ if (en == 1) -+ reg_u32_tmp = BYTE_2_DWORD(0x60, macid, bw, rate); -+ else -+ reg_u32_tmp = 0x40000000; -+ if (dm->support_ic_type & ODM_RTL8814B) -+ odm_set_mac_reg(dm, R_0x448, MASKDWORD, reg_u32_tmp); -+ else -+ odm_set_mac_reg(dm, R_0x450, MASKDWORD, reg_u32_tmp); -+ } -+ if (en == 1) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "FW fix TX rate[id =%d], %dM, Rate(%d)=", macid, -+ (20 << bw), rate); -+ phydm_print_rate(dm, rate, ODM_COMP_API); -+ } else { -+ PHYDM_DBG(dm, ODM_COMP_API, "Auto Rate\n"); -+ } -+} -+ -+void phydm_ra_debug(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ char help[] = "-h"; -+ u32 var[5] = {0}; -+ u8 macid = 0, bw = 0, rate = 0; -+ u8 tx_cls_en = 0, tx_cls_th = 0, tmp = 0; -+ u8 i = 0; -+ -+ for (i = 0; i < 5; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var[i]); -+ } -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{1} {0:-,1:+} {ofst}: set offset\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{1} {100}: show offset\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{2} {en} {macid} {bw} {rate}: fw fix rate\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{3} {en}: Dynamic RRSR\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{4} {0:pkt RA, 1:TBTT RA, 100:query RA mode}\n"); -+#ifdef CONFIG_DYNAMIC_TXCOLLISION_TH -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{5} {0:dis, 1:en}{th; 255:auto, xx:dB}: Tx CLS\n"); -+#endif -+ } else if (var[0] == 1) { /*@Adjust PCR offset*/ -+ -+ if (var[1] == 100) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Get] RA_ofst=((%s%d))\n", -+ ((ra_tab->ra_ofst_direc) ? "+" : "-"), -+ ra_tab->ra_th_ofst); -+ -+ } else if (var[1] == 0) { -+ ra_tab->ra_ofst_direc = 0; -+ ra_tab->ra_th_ofst = (u8)var[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Set] RA_ofst=((-%d))\n", ra_tab->ra_th_ofst); -+ } else if (var[1] == 1) { -+ ra_tab->ra_ofst_direc = 1; -+ ra_tab->ra_th_ofst = (u8)var[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Set] RA_ofst=((+%d))\n", ra_tab->ra_th_ofst); -+ } -+ -+ } else if (var[0] == 2) { /*@FW fix rate*/ -+ macid = (u8)var[2]; -+ bw = (u8)var[3]; -+ rate = (u8)var[4]; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[FW fix TX Rate] {en, macid,bw,rate}={%d, %d, %d, 0x%x}", -+ var[1], macid, bw, rate); -+ -+ phydm_fw_fix_rate(dm, (u8)var[1], macid, bw, rate); -+ } else if (var[0] == 3) { /*@Dynamic RRSR*/ -+ ra_tab->dynamic_rrsr_en = (boolean)var[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Dynamic RRSR] enable=%d", ra_tab->dynamic_rrsr_en); -+ } else if (var[0] == 4) { /*@RA trigger mode*/ -+ if (var[1] == 0 || var[1] == 1) -+ ra_tab->ra_trigger_mode = (u8)var[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[RA trigger] mode=%d\n", ra_tab->ra_trigger_mode); -+#ifdef CONFIG_DYNAMIC_TXCOLLISION_TH -+ } else if (var[0] == 5) { /*@Tx Collision Detection*/ -+ tx_cls_en = (u8)var[1]; -+ ra_tab->ra_tx_cls_th = (u8)var[2]; -+ tmp = (u8)var[2]; -+ tx_cls_th = (tmp < 50) ? 0 : (tmp > 81) ? 31 : tmp - 50; -+ if (tx_cls_en) { -+ odm_set_bb_reg(dm, R_0x8f8, BIT(16), 1); -+ if (ra_tab->ra_tx_cls_th != 255) { -+ phydm_tx_collsion_th_set(dm, tx_cls_th, -+ tx_cls_th); -+ } -+ -+ } else { -+ odm_set_bb_reg(dm, R_0x8f8, BIT(16), 0); -+ } -+ -+ if (tx_cls_en & ra_tab->ra_tx_cls_th != 255) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Tx Collision Detec] {en, th}={%d, %d}\n", -+ tx_cls_en, tx_cls_th + 50); -+ } else if (tx_cls_en & ra_tab->ra_tx_cls_th == 255) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Tx Collision Detec] {en, th}={%d, auto}\n", -+ tx_cls_en); -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Tx Collision Detec] {en, th}={%d, xx}\n", -+ tx_cls_en); -+ } -+#endif -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[Set] Error\n"); -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_ra_mask_report_h2c_trigger(void *dm_void, -+ struct ra_mask_rpt_trig *trig_rpt) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ -+ phydm_fw_trace_en_h2c(dm, true, 1, 2, trig_rpt->macid); -+ -+ trig_rpt->ra_mask_rpt_stamp = ra_tab->ra_mask_rpt_stamp; -+} -+void phydm_ra_mask_report_c2h_result(void *dm_void, struct ra_mask_rpt *rpt) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ u8 i = 0; -+ -+ rpt->ra_mask_rpt_stamp = ra_tab->ra_mask_rpt_stamp; -+ -+ odm_move_memory(dm, &rpt->ra_mask_buf[0], &ra_tab->ra_mask_buf[0], 8); -+} -+ -+void odm_c2h_ra_para_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ u8 mode = cmd_buf[0]; /*Retry Penalty, NH, NL*/ -+ u8 i; -+ -+ PHYDM_DBG(dm, DBG_FW_TRACE, "[%s] [mode: %d]----------------------->\n", -+ __func__, mode); -+ -+ if (mode == RADBG_DEBUG_MONITOR1) { -+ if (dm->support_ic_type & PHYDM_IC_3081_SERIES) { -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "RSSI =", -+ cmd_buf[1]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "rate =", -+ cmd_buf[2] & 0x7f); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "SGI =", -+ (cmd_buf[2] & 0x80) >> 7); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "BW =", -+ cmd_buf[3]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "BW_max =", -+ cmd_buf[4]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", -+ "multi_rate0 =", cmd_buf[5]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", -+ "multi_rate1 =", cmd_buf[6]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "DISRA =", -+ cmd_buf[7]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "VHT_EN =", -+ cmd_buf[8]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", -+ "SGI_support =", cmd_buf[9]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "try_ness =", -+ cmd_buf[10]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "pre_rate =", -+ cmd_buf[11]); -+ } else { -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "RSSI =", -+ cmd_buf[1]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %x\n", "BW =", -+ cmd_buf[2]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "DISRA =", -+ cmd_buf[3]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "VHT_EN =", -+ cmd_buf[4]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", -+ "Hightest rate =", cmd_buf[5]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", -+ "Lowest rate =", cmd_buf[6]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", -+ "SGI_support =", cmd_buf[7]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "Rate_ID =", -+ cmd_buf[8]); -+ } -+ } else if (mode == RADBG_DEBUG_MONITOR2) { -+ if (dm->support_ic_type & PHYDM_IC_3081_SERIES) { -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "rate_id =", -+ cmd_buf[1]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", -+ "highest_rate =", cmd_buf[2]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", -+ "lowest_rate =", cmd_buf[3]); -+ -+ for (i = 4; i <= 11; i++) -+ PHYDM_DBG(dm, DBG_FW_TRACE, "RAMASK = 0x%x\n", -+ cmd_buf[i]); -+ -+ odm_move_memory(dm, &ra_tab->ra_mask_buf[0], &cmd_buf[4], 8); -+ ra_tab->ra_mask_rpt_stamp++; -+ } else { -+ PHYDM_DBG(dm, DBG_FW_TRACE, -+ "%5s %x%x %x%x %x%x %x%x\n", "RA Mask:", -+ cmd_buf[8], cmd_buf[7], cmd_buf[6], -+ cmd_buf[5], cmd_buf[4], cmd_buf[3], -+ cmd_buf[2], cmd_buf[1]); -+ } -+ } else if (mode == RADBG_DEBUG_MONITOR3) { -+ for (i = 0; i < (cmd_len - 1); i++) -+ PHYDM_DBG(dm, DBG_FW_TRACE, "content[%d] = %d\n", i, -+ cmd_buf[1 + i]); -+ } else if (mode == RADBG_DEBUG_MONITOR4) -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s {%d.%d}\n", "RA version =", -+ cmd_buf[1], cmd_buf[2]); -+ else if (mode == RADBG_DEBUG_MONITOR5) { -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "Current rate =", -+ cmd_buf[1]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "Retry ratio =", -+ cmd_buf[2]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s %d\n", "rate down ratio =", -+ cmd_buf[3]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x\n", "highest rate =", -+ cmd_buf[4]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s {0x%x 0x%x}\n", "Muti-try =", -+ cmd_buf[5], cmd_buf[6]); -+ PHYDM_DBG(dm, DBG_FW_TRACE, "%5s 0x%x%x%x%x%x\n", "RA mask =", -+ cmd_buf[11], cmd_buf[10], cmd_buf[9], cmd_buf[8], -+ cmd_buf[7]); -+ } -+ PHYDM_DBG(dm, DBG_FW_TRACE, "-------------------------------\n"); -+} -+ -+void phydm_ra_dynamic_retry_count(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ability & ODM_BB_DYNAMIC_ARFR)) -+ return; -+ -+ /*PHYDM_DBG(dm, DBG_RA, "dm->pre_b_noisy = %d\n", dm->pre_b_noisy );*/ -+ -+ if (dm->pre_b_noisy != dm->noisy_decision) { -+ if (dm->noisy_decision) { -+ PHYDM_DBG(dm, DBG_DYN_ARFR, "Noisy Env. RA fallback\n"); -+ odm_set_mac_reg(dm, R_0x430, MASKDWORD, 0x0); -+ odm_set_mac_reg(dm, R_0x434, MASKDWORD, 0x04030201); -+ } else { -+ PHYDM_DBG(dm, DBG_DYN_ARFR, "Clean Env. RA fallback\n"); -+ odm_set_mac_reg(dm, R_0x430, MASKDWORD, 0x01000000); -+ odm_set_mac_reg(dm, R_0x434, MASKDWORD, 0x06050402); -+ } -+ dm->pre_b_noisy = dm->noisy_decision; -+ } -+} -+ -+void phydm_print_rate(void *dm_void, u8 rate, u32 dbg_component) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ -+ boolean vht_en = phydm_is_vht_rate(dm, rate_idx); -+ u8 b_sgi = (rate & 0x80) >> 7; -+ u8 rate_ss = phydm_rate_to_num_ss(dm, rate_idx); -+ u8 rate_digit = phydm_rate_2_rate_digit(dm, rate_idx); -+ -+ PHYDM_DBG_F(dm, dbg_component, "( %s%s%s%s%s%d%s%s)\n", -+ (vht_en && (rate_ss == 1)) ? "VHT 1ss " : "", -+ (vht_en && (rate_ss == 2)) ? "VHT 2ss " : "", -+ (vht_en && (rate_ss == 3)) ? "VHT 3ss " : "", -+ (vht_en && (rate_ss == 4)) ? "VHT 4ss " : "", -+ (rate_idx >= ODM_RATEMCS0) ? "MCS " : "", -+ rate_digit, -+ (b_sgi) ? "-S" : " ", -+ (rate_idx >= ODM_RATEMCS0) ? "" : "M"); -+} -+ -+void phydm_print_rate_2_buff(void *dm_void, u8 rate, char *buf, u16 buf_size) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ -+ boolean vht_en = phydm_is_vht_rate(dm, rate_idx); -+ u8 b_sgi = (rate & 0x80) >> 7; -+ u8 rate_ss = phydm_rate_to_num_ss(dm, rate_idx); -+ u8 rate_digit = phydm_rate_2_rate_digit(dm, rate_idx); -+ -+ PHYDM_SNPRINTF(buf, buf_size, "( %s%s%s%s%s%d%s%s)", -+ (vht_en && (rate_ss == 1)) ? "VHT 1ss " : "", -+ (vht_en && (rate_ss == 2)) ? "VHT 2ss " : "", -+ (vht_en && (rate_ss == 3)) ? "VHT 3ss " : "", -+ (vht_en && (rate_ss == 4)) ? "VHT 4ss " : "", -+ (rate_idx >= ODM_RATEMCS0) ? "MCS " : "", -+ rate_digit, -+ (b_sgi) ? "-S" : " ", -+ (rate_idx >= ODM_RATEMCS0) ? "" : "M"); -+} -+ -+void phydm_c2h_ra_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ struct cmn_sta_info *sta = NULL; -+ u8 macid = cmd_buf[1]; -+ u8 rate = cmd_buf[0]; -+ u8 ra_ratio = 0xff; -+ u8 curr_bw = 0xff; -+ u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ -+ u8 rate_order; -+ u8 gid_index = 0; -+ u8 txcls_rate = 0; -+ char dbg_buf[PHYDM_SNPRINT_SIZE] = {0}; -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ sta = dm->phydm_sta_info[dm->phydm_macid_table[macid]]; -+ #else -+ sta = dm->phydm_sta_info[macid]; -+ #endif -+ -+ if (cmd_len == 7) { -+ ra_ratio = cmd_buf[5]; -+ curr_bw = cmd_buf[6]; -+ PHYDM_DBG(dm, DBG_RA, "[%d] PER=%d\n", macid, ra_ratio); -+ } else if (cmd_len == 8) { -+ ra_ratio = cmd_buf[5]; -+ curr_bw = cmd_buf[6]; -+ txcls_rate = cmd_buf[7]; -+ PHYDM_DBG(dm, DBG_RA, "[%d] PER=%d TxCLS=%d\n", macid, ra_ratio, -+ txcls_rate); -+ } -+ -+ if (cmd_buf[3] != 0) { -+ if (cmd_buf[3] == 0xff) -+ PHYDM_DBG(dm, DBG_RA, "FW Fix Rate\n"); -+ else if (cmd_buf[3] == 1) -+ PHYDM_DBG(dm, DBG_RA, "Try Success\n"); -+ else if (cmd_buf[3] == 2) -+ PHYDM_DBG(dm, DBG_RA, "Try Fail & Again\n"); -+ else if (cmd_buf[3] == 3) -+ PHYDM_DBG(dm, DBG_RA, "Rate Back\n"); -+ else if (cmd_buf[3] == 4) -+ PHYDM_DBG(dm, DBG_RA, "Start rate by RSSI\n"); -+ else if (cmd_buf[3] == 5) -+ PHYDM_DBG(dm, DBG_RA, "Try rate\n"); -+ } -+ phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE); -+ PHYDM_DBG(dm, DBG_RA, "Tx Rate=%s (%d)\n", dbg_buf, rate); -+ -+#ifdef MU_EX_MACID -+ if (macid >= 128 && macid < (128 + MU_EX_MACID)) { -+ gid_index = macid - 128; -+ ra_tab->mu1_rate[gid_index] = rate; -+ } -+ if (macid >= ODM_ASSOCIATE_ENTRY_NUM) -+ return; -+#endif -+ if (is_sta_active(sta)) { -+ sta->ra_info.curr_tx_rate = rate; -+ sta->ra_info.curr_tx_bw = (enum channel_width)curr_bw; -+ sta->ra_info.curr_retry_ratio = ra_ratio; -+ } -+ -+ /*trigger power training*/ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ -+ rate_order = phydm_rate_order_compute(dm, rate_idx); -+ -+ if (dm->is_one_entry_only || -+ (rate_order > ra_tab->highest_client_tx_order && -+ ra_tab->power_tracking_flag == 1)) { -+ halrf_update_pwr_track(dm, rate_idx); -+ ra_tab->power_tracking_flag = 0; -+ } -+ -+#endif -+ -+#if 0 -+ /*trigger dynamic rate ID*/ -+ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) -+ phydm_update_rate_id(dm, rate, macid); -+#endif -+} -+ -+void odm_ra_post_action_on_assoc(void *dm_void) -+{ -+} -+ -+void phydm_modify_RA_PCR_threshold(void *dm_void, u8 ra_ofst_direc, -+ u8 ra_th_ofst) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ -+ ra_tab->ra_ofst_direc = ra_ofst_direc; -+ ra_tab->ra_th_ofst = ra_th_ofst; -+ PHYDM_DBG(dm, DBG_RA_MASK, "Set ra_th_offset=(( %s%d ))\n", -+ ((ra_ofst_direc) ? "+" : "-"), ra_th_ofst); -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ -+void phydm_gen_ramask_h2c_AP( -+ void *dm_void, -+ struct rtl8192cd_priv *priv, -+ struct sta_info *entry, -+ u8 rssi_level) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type == ODM_RTL8812) { -+ #if (RTL8812A_SUPPORT == 1) -+ UpdateHalRAMask8812(priv, entry, rssi_level); -+ #endif -+ } else if (dm->support_ic_type == ODM_RTL8188E) { -+ #if (RTL8188E_SUPPORT == 1) -+ #ifdef TXREPORT -+ add_RATid(priv, entry); -+ #endif -+ #endif -+ } else { -+ #ifdef CONFIG_WLAN_HAL -+ GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, entry, rssi_level); -+ #endif -+ } -+} -+ -+void phydm_update_hal_ra_mask( -+ void *dm_void, -+ u32 wireless_mode, -+ u8 rf_type, -+ u8 bw, -+ u8 mimo_ps_enable, -+ u8 disable_cck_rate, -+ u32 *ratr_bitmap_msb_in, -+ u32 *ratr_bitmap_lsb_in, -+ u8 tx_rate_level) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 ratr_bitmap = *ratr_bitmap_lsb_in; -+ u32 ratr_bitmap_msb = *ratr_bitmap_msb_in; -+ -+#if 0 -+ /*PHYDM_DBG(dm, DBG_RA_MASK, "phydm_rf_type = (( %x )), rf_type = (( %x ))\n", phydm_rf_type, rf_type);*/ -+#endif -+ PHYDM_DBG(dm, DBG_RA_MASK, -+ "Platfoem original RA Mask = (( 0x %x | %x ))\n", -+ ratr_bitmap_msb, ratr_bitmap); -+ -+ switch (wireless_mode) { -+ case PHYDM_WIRELESS_MODE_B: { -+ ratr_bitmap &= 0x0000000f; -+ } break; -+ -+ case PHYDM_WIRELESS_MODE_G: { -+ ratr_bitmap &= 0x00000ff5; -+ } break; -+ -+ case PHYDM_WIRELESS_MODE_A: { -+ ratr_bitmap &= 0x00000ff0; -+ } break; -+ -+ case PHYDM_WIRELESS_MODE_N_24G: -+ case PHYDM_WIRELESS_MODE_N_5G: { -+ if (mimo_ps_enable) -+ rf_type = RF_1T1R; -+ -+ if (rf_type == RF_1T1R) { -+ if (bw == CHANNEL_WIDTH_40) -+ ratr_bitmap &= 0x000ff015; -+ else -+ ratr_bitmap &= 0x000ff005; -+ } else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) { -+ if (bw == CHANNEL_WIDTH_40) -+ ratr_bitmap &= 0x0ffff015; -+ else -+ ratr_bitmap &= 0x0ffff005; -+ } else { /*@3T*/ -+ -+ ratr_bitmap &= 0xfffff015; -+ ratr_bitmap_msb &= 0xf; -+ } -+ } break; -+ -+ case PHYDM_WIRELESS_MODE_AC_24G: { -+ if (rf_type == RF_1T1R) { -+ ratr_bitmap &= 0x003ff015; -+ } else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) { -+ ratr_bitmap &= 0xfffff015; -+ } else { /*@3T*/ -+ -+ ratr_bitmap &= 0xfffff010; -+ ratr_bitmap_msb &= 0x3ff; -+ } -+ -+ if (bw == CHANNEL_WIDTH_20) { /*@AC 20MHz not support MCS9*/ -+ ratr_bitmap &= 0x7fdfffff; -+ ratr_bitmap_msb &= 0x1ff; -+ } -+ } break; -+ -+ case PHYDM_WIRELESS_MODE_AC_5G: { -+ if (rf_type == RF_1T1R) { -+ ratr_bitmap &= 0x003ff010; -+ } else if (rf_type == RF_2T2R || rf_type == RF_2T4R || rf_type == RF_2T3R) { -+ ratr_bitmap &= 0xfffff010; -+ } else { /*@3T*/ -+ -+ ratr_bitmap &= 0xfffff010; -+ ratr_bitmap_msb &= 0x3ff; -+ } -+ -+ if (bw == CHANNEL_WIDTH_20) { /*@AC 20MHz not support MCS9*/ -+ ratr_bitmap &= 0x7fdfffff; -+ ratr_bitmap_msb &= 0x1ff; -+ } -+ } break; -+ -+ default: -+ break; -+ } -+ -+ if (wireless_mode != PHYDM_WIRELESS_MODE_B) { -+ if (tx_rate_level == 0) -+ ratr_bitmap &= 0xffffffff; -+ else if (tx_rate_level == 1) -+ ratr_bitmap &= 0xfffffff0; -+ else if (tx_rate_level == 2) -+ ratr_bitmap &= 0xffffefe0; -+ else if (tx_rate_level == 3) -+ ratr_bitmap &= 0xffffcfc0; -+ else if (tx_rate_level == 4) -+ ratr_bitmap &= 0xffff8f80; -+ else if (tx_rate_level >= 5) -+ ratr_bitmap &= 0xffff0f00; -+ } -+ -+ if (disable_cck_rate) -+ ratr_bitmap &= 0xfffffff0; -+ -+ PHYDM_DBG(dm, DBG_RA_MASK, -+ "wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x )), MimoPs_en = (( %d )), tx_rate_level= (( 0x%x ))\n", -+ wireless_mode, rf_type, bw, mimo_ps_enable, tx_rate_level); -+ -+#if 0 -+ /*PHYDM_DBG(dm, DBG_RA_MASK, "111 Phydm modified RA Mask = (( 0x %x | %x ))\n", ratr_bitmap_msb, ratr_bitmap);*/ -+#endif -+ -+ *ratr_bitmap_lsb_in = ratr_bitmap; -+ *ratr_bitmap_msb_in = ratr_bitmap_msb; -+ PHYDM_DBG(dm, DBG_RA_MASK, -+ "Phydm modified RA Mask = (( 0x %x | %x ))\n", -+ *ratr_bitmap_msb_in, *ratr_bitmap_lsb_in); -+} -+ -+#endif -+ -+void phydm_rate_adaptive_mask_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_t = &dm->dm_ra_table; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PADAPTER adapter = dm->adapter; -+ PMGNT_INFO mgnt_info = &(adapter->MgntInfo); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)dm->adapter)); -+ -+ if (mgnt_info->DM_Type == dm_type_by_driver) -+ hal_data->bUseRAMask = true; -+ else -+ hal_data->bUseRAMask = false; -+ -+#endif -+ -+ ra_t->ldpc_thres = 35; -+ ra_t->up_ramask_cnt = 0; -+ ra_t->up_ramask_cnt_tmp = 0; -+} -+ -+void phydm_refresh_rate_adaptive_mask(void *dm_void) -+{ -+/*@Will be removed*/ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ phydm_ra_mask_watchdog(dm); -+} -+ -+void phydm_show_sta_info(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = NULL; -+ struct ra_sta_info *ra = NULL; -+#ifdef CONFIG_BEAMFORMING -+ struct bf_cmn_info *bf = NULL; -+#endif -+ char help[] = "-h"; -+ u32 var[10] = {0}; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 i, sta_idx_start, sta_idx_end; -+ u8 tatal_sta_num = 0; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var[0]); -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "All STA: {1}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "STA[macid]: {2} {macid}\n"); -+ return; -+ } else if (var[0] == 1) { -+ sta_idx_start = 0; -+ sta_idx_end = ODM_ASSOCIATE_ENTRY_NUM; -+ } else if (var[0] == 2) { -+ sta_idx_start = var[1]; -+ sta_idx_end = var[1]; -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Warning input value!\n"); -+ return; -+ } -+ -+ for (i = sta_idx_start; i < sta_idx_end; i++) { -+ sta = dm->phydm_sta_info[i]; -+ -+ if (!is_sta_active(sta)) -+ continue; -+ -+ ra = &sta->ra_info; -+ #ifdef CONFIG_BEAMFORMING -+ bf = &sta->bf_info; -+ #endif -+ -+ tatal_sta_num++; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "==[sta_idx: %d][MACID: %d]============>\n", i, -+ sta->mac_id); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "AID:%d\n", sta->aid); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "ADDR:%x-%x-%x-%x-%x-%x\n", sta->mac_addr[5], -+ sta->mac_addr[4], sta->mac_addr[3], sta->mac_addr[2], -+ sta->mac_addr[1], sta->mac_addr[0]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "DM_ctrl:0x%x\n", sta->dm_ctrl); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "BW:%d, MIMO_Type:0x%x\n", sta->bw_mode, -+ sta->mimo_type); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "STBC_en:%d, LDPC_en=%d\n", sta->stbc_en, -+ sta->ldpc_en); -+ -+ /*@[RSSI Info]*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "RSSI{All, OFDM, CCK}={%d, %d, %d}\n", -+ sta->rssi_stat.rssi, sta->rssi_stat.rssi_ofdm, -+ sta->rssi_stat.rssi_cck); -+ -+ /*@[RA Info]*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Rate_ID:%d, RSSI_LV:%d, ra_bw:%d, SGI_en:%d\n", -+ ra->rate_id, ra->rssi_level, ra->ra_bw_mode, -+ ra->is_support_sgi); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "VHT_en:%d, Wireless_set=0x%x, sm_ps=%d\n", -+ ra->is_vht_enable, sta->support_wireless_set, -+ sta->sm_ps); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Dis{RA, PT}={%d, %d}, TxRx:%d, Noisy:%d\n", -+ ra->disable_ra, ra->disable_pt, ra->txrx_state, -+ ra->is_noisy); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "TX{Rate, BW}={0x%x, %d}, RTY:%d\n", ra->curr_tx_rate, -+ ra->curr_tx_bw, ra->curr_retry_ratio); -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "RA_Mask:0x%llx\n", ra->ramask); -+ -+ /*@[TP]*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "TP{TX,RX}={%d, %d}\n", sta->tx_moving_average_tp, -+ sta->rx_moving_average_tp); -+ -+#ifdef CONFIG_BEAMFORMING -+ /*@[Beamforming]*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "BF CAP{HT,VHT}={0x%x, 0x%x}\n", bf->ht_beamform_cap, -+ bf->vht_beamform_cap); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "BF {p_aid,g_id}={0x%x, 0x%x}\n\n", bf->p_aid, -+ bf->g_id); -+#endif -+ } -+ -+ if (tatal_sta_num == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "No Linked STA\n"); -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+u8 phydm_get_rx_stream_num(void *dm_void, enum rf_type type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rx_num = 1; -+ -+ if (type == RF_1T1R) -+ rx_num = 1; -+ else if (type == RF_2T2R || type == RF_1T2R) -+ rx_num = 2; -+ else if (type == RF_3T3R || type == RF_2T3R) -+ rx_num = 3; -+ else if (type == RF_4T4R || type == RF_3T4R || type == RF_2T4R) -+ rx_num = 4; -+ else -+ pr_debug("[Warrning] %s\n", __func__); -+ -+ return rx_num; -+} -+ -+u8 phydm_get_tx_stream_num(void *dm_void, enum rf_type type) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 tx_num = 1; -+ -+ if (type == RF_1T1R || type == RF_1T2R) -+ tx_num = 1; -+ else if (type == RF_2T2R || type == RF_2T3R || type == RF_2T4R) -+ tx_num = 2; -+ else if (type == RF_3T3R || type == RF_3T4R) -+ tx_num = 3; -+ else if (type == RF_4T4R) -+ tx_num = 4; -+ else -+ PHYDM_DBG(dm, DBG_RA, "[Warrning] no mimo_type is found\n"); -+ -+ return tx_num; -+} -+ -+u64 phydm_get_bb_mod_ra_mask(void *dm_void, u8 sta_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_iot_center *iot_table = &dm->iot_table; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; -+ struct ra_sta_info *ra = NULL; -+ enum channel_width bw = 0; -+ enum wireless_set wrls_mode = 0; -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ struct rtl8192cd_priv *priv = dm->priv; -+#endif -+ u8 tx_stream_num = 1; -+ u8 rssi_lv = 0; -+ u64 ra_mask_bitmap = 0; -+ -+ if (is_sta_active(sta)) { -+ ra = &sta->ra_info; -+ bw = ra->ra_bw_mode; -+ wrls_mode = sta->support_wireless_set; -+ tx_stream_num = phydm_get_tx_stream_num(dm, sta->mimo_type); -+ rssi_lv = ra->rssi_level; -+ ra_mask_bitmap = ra->ramask; -+ } else { -+ PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid STA\n", __func__); -+ return 0; -+ } -+ -+ PHYDM_DBG(dm, DBG_RA, "macid=%d ori_RA_Mask= 0x%llx\n", sta->mac_id, -+ ra_mask_bitmap); -+ PHYDM_DBG(dm, DBG_RA, -+ "wireless_mode=0x%x, tx_ss=%d, BW=%d, MimoPs=%d, rssi_lv=%d\n", -+ wrls_mode, tx_stream_num, bw, sta->sm_ps, rssi_lv); -+ -+ if (sta->sm_ps == SM_PS_STATIC) /*@mimo_ps_enable*/ -+ tx_stream_num = 1; -+ -+ /*@[Modify RA Mask by Wireless Mode]*/ -+ -+ if (wrls_mode == WIRELESS_CCK) { /*@B mode*/ -+ ra_mask_bitmap &= 0x0000000f; -+ } else if (wrls_mode == WIRELESS_OFDM) { /*@G mode*/ -+ ra_mask_bitmap &= 0x00000ff0; -+ } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM)) { /*@BG mode*/ -+ ra_mask_bitmap &= 0x00000ff5; -+ } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) { -+ /*N_2G*/ -+ if (tx_stream_num == 1) { -+ if (bw == CHANNEL_WIDTH_40) -+ ra_mask_bitmap &= 0x000ff015; -+ else -+ ra_mask_bitmap &= 0x000ff005; -+ } else if (tx_stream_num == 2) { -+ if (bw == CHANNEL_WIDTH_40) -+ ra_mask_bitmap &= 0x0ffff015; -+ else -+ ra_mask_bitmap &= 0x0ffff005; -+ } else if (tx_stream_num == 3) { -+ ra_mask_bitmap &= 0xffffff015; -+ } else { -+ ra_mask_bitmap &= 0xffffffff015; -+ } -+ } else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_HT)) { /*N_5G*/ -+ -+ if (tx_stream_num == 1) { -+ if (bw == CHANNEL_WIDTH_40) -+ ra_mask_bitmap &= 0x000ff030; -+ else -+ ra_mask_bitmap &= 0x000ff010; -+ } else if (tx_stream_num == 2) { -+ if (bw == CHANNEL_WIDTH_40) -+ ra_mask_bitmap &= 0x0ffff030; -+ else -+ ra_mask_bitmap &= 0x0ffff010; -+ } else if (tx_stream_num == 3) { -+ ra_mask_bitmap &= 0xffffff010; -+ } else { -+ ra_mask_bitmap &= 0xffffffff010; -+ } -+ } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT)) { -+ /*@AC_2G*/ -+ if (tx_stream_num == 1) -+ ra_mask_bitmap &= 0x003ff015; -+ else if (tx_stream_num == 2) -+ ra_mask_bitmap &= 0xfffff015; -+ else if (tx_stream_num == 3) -+ ra_mask_bitmap &= 0x3fffffff015; -+ else /*@AC_4SS 2G*/ -+ ra_mask_bitmap &= 0x000ffffffffff015; -+ if (bw == CHANNEL_WIDTH_20) { -+ /* @AC 20MHz doesn't support MCS9 except 3SS & 6SS*/ -+ ra_mask_bitmap &= 0x0007ffff7fdff015; -+ } else if (bw == CHANNEL_WIDTH_80) { -+ /* @AC 80MHz doesn't support 3SS MCS6*/ -+ ra_mask_bitmap &= 0x000fffbffffff015; -+ } -+ } else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_VHT)) { /*@AC_5G*/ -+ -+ if (tx_stream_num == 1) -+ ra_mask_bitmap &= 0x003ff010; -+ else if (tx_stream_num == 2) -+ ra_mask_bitmap &= 0xfffff010; -+ else if (tx_stream_num == 3) -+ ra_mask_bitmap &= 0x3fffffff010; -+ else /*@AC_4SS 5G*/ -+ ra_mask_bitmap &= 0x000ffffffffff010; -+ -+ if (bw == CHANNEL_WIDTH_20) { -+ /* @AC 20MHz doesn't support MCS9 except 3SS & 6SS*/ -+ ra_mask_bitmap &= 0x0007ffff7fdff010; -+ } else if (bw == CHANNEL_WIDTH_80) { -+ /* @AC 80MHz doesn't support 3SS MCS6*/ -+ ra_mask_bitmap &= 0x000fffbffffff010; -+ } else if (bw == CHANNEL_WIDTH_160) { -+ /* @AC 80M+80M doesn't support 3SS & 4SS*/ -+ ra_mask_bitmap &= 0xfffff010; -+ } -+ } else { -+ PHYDM_DBG(dm, DBG_RA, "[Warrning] RA mask is Not found\n"); -+ } -+ -+ PHYDM_DBG(dm, DBG_RA, "Mod by mode=0x%llx\n", ra_mask_bitmap); -+ -+#if ((DM_ODM_SUPPORT_TYPE == ODM_AP) && defined(PHYDM_IC_JGR3_SERIES_SUPPORT)) -+ if (priv->pshare->veriwave_sta_num > 0) { -+ PHYDM_DBG(dm, DBG_RA, "Mod by RSSI=0x%llx\n", ra_mask_bitmap); -+ return ra_mask_bitmap; -+ } -+#endif -+ /*@[Modify RA Mask by RSSI level]*/ -+ if (wrls_mode != WIRELESS_CCK) { -+ if (iot_table->patch_id_40010700) { -+ ra_mask_bitmap &= (rssi_lv == 0 ? -+ 0xffffffffffffffff : -+ 0xfffffffffffffff0); -+ return ra_mask_bitmap; -+ } -+ -+ if (rssi_lv == 0) -+ ra_mask_bitmap &= 0xffffffffffffffff; -+ else if (rssi_lv == 1) -+ ra_mask_bitmap &= 0xfffffffffffffff0; -+ else if (rssi_lv == 2) -+ ra_mask_bitmap &= 0xffffffffffffefe0; -+ else if (rssi_lv == 3) -+ ra_mask_bitmap &= 0xffffffffffffcfc0; -+ else if (rssi_lv == 4) -+ ra_mask_bitmap &= 0xffffffffffff8f80; -+ else if (rssi_lv >= 5) -+ ra_mask_bitmap &= 0xffffffffffff0f00; -+ } -+ PHYDM_DBG(dm, DBG_RA, "Mod by RSSI=0x%llx\n", ra_mask_bitmap); -+ -+ return ra_mask_bitmap; -+} -+ -+u8 phydm_get_rate_from_rssi_lv(void *dm_void, u8 sta_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; -+ struct ra_sta_info *ra = NULL; -+ enum wireless_set wrls_set = 0; -+ u8 rssi_lv = 0; -+ u8 rate_idx = 0; -+ u8 rate_ofst = 0; -+ -+ if (is_sta_active(sta)) { -+ ra = &sta->ra_info; -+ wrls_set = sta->support_wireless_set; -+ rssi_lv = ra->rssi_level; -+ } else { -+ pr_debug("[Warning] %s: invalid STA\n", __func__); -+ return 0; -+ } -+ -+ PHYDM_DBG(dm, DBG_RA, "[%s]macid=%d, wireless_set=0x%x, rssi_lv=%d\n", -+ __func__, sta->mac_id, wrls_set, rssi_lv); -+ -+ rate_ofst = (rssi_lv <= 1) ? 0 : (rssi_lv - 1); -+ -+ if (wrls_set & WIRELESS_VHT) { -+ rate_idx = ODM_RATEVHTSS1MCS0 + rate_ofst; -+ } else if (wrls_set & WIRELESS_HT) { -+ rate_idx = ODM_RATEMCS0 + rate_ofst; -+ } else if (wrls_set & WIRELESS_OFDM) { -+ rate_idx = ODM_RATE6M + rate_ofst; -+ } else { -+ rate_idx = ODM_RATE1M + rate_ofst; -+ -+ if (rate_idx > ODM_RATE11M) -+ rate_idx = ODM_RATE11M; -+ } -+ return rate_idx; -+} -+ -+u8 phydm_get_rate_id(void *dm_void, u8 sta_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; -+ struct ra_sta_info *ra = NULL; -+ enum channel_width bw = 0; -+ enum wireless_set wrls_mode = 0; -+ u8 tx_stream_num = 1; -+ u8 rate_id_idx = PHYDM_BGN_20M_1SS; -+ -+ if (is_sta_active(sta)) { -+ ra = &sta->ra_info; -+ bw = ra->ra_bw_mode; -+ wrls_mode = sta->support_wireless_set; -+ tx_stream_num = phydm_get_tx_stream_num(dm, sta->mimo_type); -+ -+ } else { -+ PHYDM_DBG(dm, DBG_RA, "[Warning] %s: invalid STA\n", __func__); -+ return 0; -+ } -+ -+ PHYDM_DBG(dm, DBG_RA, "macid=%d,wireless_set=0x%x,tx_SS_num=%d,BW=%d\n", -+ sta->mac_id, wrls_mode, tx_stream_num, bw); -+ -+ if (wrls_mode == WIRELESS_CCK) { -+ /*@B mode*/ -+ rate_id_idx = PHYDM_B_20M; -+ } else if (wrls_mode == WIRELESS_OFDM) { -+ /*@G mode*/ -+ rate_id_idx = PHYDM_G; -+ } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM)) { -+ /*@BG mode*/ -+ rate_id_idx = PHYDM_BG; -+ } else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_HT)) { -+ /*@GN mode*/ -+ if (tx_stream_num == 1) -+ rate_id_idx = PHYDM_GN_N1SS; -+ else if (tx_stream_num == 2) -+ rate_id_idx = PHYDM_GN_N2SS; -+ else if (tx_stream_num == 3) -+ rate_id_idx = PHYDM_ARFR5_N_3SS; -+ } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT)) { -+ /*@BGN mode*/ -+ if (bw == CHANNEL_WIDTH_40) { -+ if (tx_stream_num == 1) -+ rate_id_idx = PHYDM_BGN_40M_1SS; -+ else if (tx_stream_num == 2) -+ rate_id_idx = PHYDM_BGN_40M_2SS; -+ else if (tx_stream_num == 3) -+ rate_id_idx = PHYDM_ARFR5_N_3SS; -+ else if (tx_stream_num == 4) -+ rate_id_idx = PHYDM_ARFR7_N_4SS; -+ -+ } else { -+ if (tx_stream_num == 1) -+ rate_id_idx = PHYDM_BGN_20M_1SS; -+ else if (tx_stream_num == 2) -+ rate_id_idx = PHYDM_BGN_20M_2SS; -+ else if (tx_stream_num == 3) -+ rate_id_idx = PHYDM_ARFR5_N_3SS; -+ else if (tx_stream_num == 4) -+ rate_id_idx = PHYDM_ARFR7_N_4SS; -+ } -+ } else if (wrls_mode == (WIRELESS_OFDM | WIRELESS_VHT)) { -+ /*@AC mode*/ -+ if (bw == CHANNEL_WIDTH_160) { -+ if (tx_stream_num == 1) -+ rate_id_idx = PHYDM_ARFR1_AC_1SS; -+ else if (tx_stream_num == 2) -+ rate_id_idx = PHYDM_ARFR0_AC_2SS; -+ else if (tx_stream_num == 3) -+ rate_id_idx = PHYDM_ARFR0_AC_2SS; -+ else if (tx_stream_num == 4) -+ rate_id_idx = PHYDM_ARFR0_AC_2SS; -+ } else { -+ if (tx_stream_num == 1) -+ rate_id_idx = PHYDM_ARFR1_AC_1SS; -+ else if (tx_stream_num == 2) -+ rate_id_idx = PHYDM_ARFR0_AC_2SS; -+ else if (tx_stream_num == 3) -+ rate_id_idx = PHYDM_ARFR4_AC_3SS; -+ else if (tx_stream_num == 4) -+ rate_id_idx = PHYDM_ARFR6_AC_4SS; -+ } -+ } else if (wrls_mode == (WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT)) { -+ /*@AC 2.4G mode*/ -+ if (bw >= CHANNEL_WIDTH_80) { -+ if (tx_stream_num == 1) -+ rate_id_idx = PHYDM_ARFR1_AC_1SS; -+ else if (tx_stream_num == 2) -+ rate_id_idx = PHYDM_ARFR0_AC_2SS; -+ else if (tx_stream_num == 3) -+ rate_id_idx = PHYDM_ARFR4_AC_3SS; -+ else if (tx_stream_num == 4) -+ rate_id_idx = PHYDM_ARFR6_AC_4SS; -+ } else { -+ if (tx_stream_num == 1) { -+ if (dm->support_ic_type & PHYDM_IC_RATEID_IDX_TYPE2) -+ rate_id_idx = PHYDM_TYPE2_ARFR5_AC_2G_1SS; -+ else -+ rate_id_idx = PHYDM_ARFR2_AC_2G_1SS; -+ } else if (tx_stream_num == 2) { -+ if (dm->support_ic_type & PHYDM_IC_RATEID_IDX_TYPE2) -+ rate_id_idx = PHYDM_TYPE2_ARFR3_AC_2G_2SS; -+ else -+ rate_id_idx = PHYDM_ARFR3_AC_2G_2SS; -+ } else if (tx_stream_num == 3) { -+ rate_id_idx = PHYDM_ARFR4_AC_3SS; -+ } else if (tx_stream_num == 4) { -+ rate_id_idx = PHYDM_ARFR6_AC_4SS; -+ } -+ } -+ } else { -+ PHYDM_DBG(dm, DBG_RA, "[Warrning] No rate_id is found\n"); -+ rate_id_idx = 0; -+ } -+ -+ PHYDM_DBG(dm, DBG_RA, "Rate_ID=((0x%x))\n", rate_id_idx); -+ -+ return rate_id_idx; -+} -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+void phydm_ra_mode_selection(void *dm_void, u8 mode) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ u8 pre_mode = ra_tab->ra_trigger_mode; /* 0:pkt RA, 1:TBTT RA */ -+ -+ if (mode >= 2) { -+ PHYDM_DBG(dm, DBG_RA, "RA mode selection Fail\n"); -+ } else { -+ ra_tab->ra_trigger_mode = mode; -+ PHYDM_DBG(dm, DBG_RA, "RA mode, 0:pkt RA, 1:TBTT RA\n"); -+ PHYDM_DBG(dm, DBG_RA, "PreMode=%d,CurMode=%d\n", pre_mode, -+ mode); -+ } -+} -+#endif -+ -+void phydm_ra_h2c(void *dm_void, u8 sta_idx, u8 dis_ra, u8 dis_pt, -+ u8 no_update_bw, u8 init_ra_lv, u64 ra_mask) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; -+ struct ra_sta_info *ra = NULL; -+ u8 h2c_val[H2C_MAX_LENGTH] = {0}; -+ u8 rate_id_idx = 0; -+ -+ if (is_sta_active(sta)) { -+ ra = &sta->ra_info; -+ } else { -+ PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid sta_info\n", -+ __func__); -+ return; -+ } -+ -+ PHYDM_DBG(dm, DBG_RA, "%s ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_RA, "MACID=%d\n", sta->mac_id); -+ -+#ifdef PHYDM_POWER_TRAINING_SUPPORT -+ if ((dm->support_ability & ODM_BB_PWR_TRAIN) && !dm->is_disable_power_training) -+ dis_pt = false; -+ else -+ dis_pt = true; -+ -+#else -+ dis_pt= true; -+#endif -+ -+ rate_id_idx = ra->rate_id; -+ -+ /*for compatibility issues with FW RA [PHYDM-405]*/ -+ if (dm->support_ic_type & PHYDM_IC_RATEID_IDX_TYPE2) { -+ if (rate_id_idx == PHYDM_TYPE2_ARFR5_AC_2G_1SS) -+ rate_id_idx = PHYDM_ARFR2_AC_2G_1SS; -+ else if (rate_id_idx == PHYDM_TYPE2_ARFR3_AC_2G_2SS) -+ rate_id_idx = PHYDM_ARFR3_AC_2G_2SS; -+ } -+ -+ h2c_val[0] = sta->mac_id; -+ h2c_val[1] = (rate_id_idx & 0x1f) | ((init_ra_lv & 0x3) << 5) | -+ (ra->is_support_sgi << 7); -+ h2c_val[2] = (u8)((ra->ra_bw_mode) | (((sta->ldpc_en) ? 1 : 0) << 2) | -+ ((no_update_bw & 0x1) << 3) | -+ (ra->is_vht_enable << 4) | -+ ((dis_pt & 0x1) << 6) | ((dis_ra & 0x1) << 7)); -+ -+ h2c_val[3] = (u8)(ra_mask & 0xff); -+ h2c_val[4] = (u8)((ra_mask & 0xff00) >> 8); -+ h2c_val[5] = (u8)((ra_mask & 0xff0000) >> 16); -+ h2c_val[6] = (u8)((ra_mask & 0xff000000) >> 24); -+ -+ PHYDM_DBG(dm, DBG_RA, "PHYDM h2c[0x40]=0x%x %x %x %x %x %x %x\n", -+ h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], h2c_val[2], -+ h2c_val[1], h2c_val[0]); -+ -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_RA_MASK, H2C_MAX_LENGTH, h2c_val); -+ -+ #if (defined(PHYDM_COMPILE_ABOVE_3SS)) -+ if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) { -+ h2c_val[3] = (u8)((ra_mask >> 32) & 0x000000ff); -+ h2c_val[4] = (u8)(((ra_mask >> 32) & 0x0000ff00) >> 8); -+ h2c_val[5] = (u8)(((ra_mask >> 32) & 0x00ff0000) >> 16); -+ h2c_val[6] = (u8)(((ra_mask >> 32) & 0xff000000) >> 24); -+ -+ PHYDM_DBG(dm, DBG_RA, "h2c[0x46]=0x%x %x %x %x %x %x %x\n", -+ h2c_val[6], h2c_val[5], h2c_val[4], h2c_val[3], -+ h2c_val[2], h2c_val[1], h2c_val[0]); -+ -+ odm_fill_h2c_cmd(dm, PHYDM_RA_MASK_ABOVE_3SS, -+ H2C_MAX_LENGTH, h2c_val); -+ } -+ #endif -+} -+ -+void phydm_ra_registed(void *dm_void, u8 sta_idx, -+ /*@index of sta_info array, not MACID*/ -+ u8 rssi_from_assoc) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_t = &dm->dm_ra_table; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; -+ struct ra_sta_info *ra = NULL; -+ u8 init_ra_lv = 0; -+ u64 ra_mask = 0; -+ /*@SD7 STA_idx != macid*/ -+ /*@SD4,8 STA_idx == macid, */ -+ -+ PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__); -+ -+ if (is_sta_active(sta)) { -+ ra = &sta->ra_info; -+ PHYDM_DBG(dm, DBG_RA_MASK, "sta_idx=%d, macid=%d\n", sta_idx, -+ sta->mac_id); -+ } else { -+ PHYDM_DBG(dm, DBG_RA_MASK, "[Warning] %s invalid STA\n", -+ __func__); -+ PHYDM_DBG(dm, DBG_RA_MASK, "sta_idx=%d\n", sta_idx); -+ return; -+ } -+ -+ #if (RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188E) -+ ra->rate_id = phydm_get_rate_id_88e(dm, sta_idx); -+ else -+ #endif -+ { -+ ra->rate_id = phydm_get_rate_id(dm, sta_idx); -+ } -+ -+ ra_mask = phydm_get_bb_mod_ra_mask(dm, sta_idx); -+ -+ PHYDM_DBG(dm, DBG_RA_MASK, "rssi_assoc=%d\n", rssi_from_assoc); -+ -+ if (rssi_from_assoc > 40) -+ init_ra_lv = 1; -+ else if (rssi_from_assoc > 20) -+ init_ra_lv = 2; -+ else if (rssi_from_assoc > 1) -+ init_ra_lv = 3; -+ else -+ init_ra_lv = 0; -+ -+ if (ra_t->record_ra_info) -+ ra_t->record_ra_info(dm, sta_idx, sta, ra_mask); -+ -+ #if (RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8188E) -+ /*@Driver RA*/ -+ phydm_ra_update_8188e(dm, sta_idx, ra->rate_id, -+ (u32)ra_mask, ra->is_support_sgi); -+ else -+ #endif -+ { -+ /*@FW RA*/ -+ phydm_ra_h2c(dm, sta_idx, ra->disable_ra, ra->disable_pt, 0, -+ init_ra_lv, ra_mask); -+ } -+} -+ -+void phydm_ra_offline(void *dm_void, u8 sta_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_t = &dm->dm_ra_table; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[sta_idx]; -+ struct ra_sta_info *ra = NULL; -+ -+ if (is_sta_active(sta)) { -+ ra = &sta->ra_info; -+ } else { -+ PHYDM_DBG(dm, DBG_RA, "[Warning] %s invalid STA\n", __func__); -+ return; -+ } -+ -+ PHYDM_DBG(dm, DBG_RA, "%s ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_RA, "MACID=%d\n", sta->mac_id); -+ -+ odm_memory_set(dm, &ra->rate_id, 0, sizeof(struct ra_sta_info)); -+ ra->disable_ra = 1; -+ ra->disable_pt = 1; -+ -+ if (ra_t->record_ra_info) -+ ra_t->record_ra_info(dm, sta->mac_id, sta, 0); -+ -+ if (dm->support_ic_type != ODM_RTL8188E) -+ phydm_ra_h2c(dm, sta->mac_id, 1, 1, 0, 0, 0); -+} -+ -+void phydm_ra_mask_watchdog(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_t = &dm->dm_ra_table; -+ struct cmn_sta_info *sta = NULL; -+ struct ra_sta_info *ra = NULL; -+ boolean force_ra_mask_en = false; -+ u8 sta_idx; -+ u64 ra_mask; -+ u8 rssi_lv_new; -+ u8 rssi = 0; -+ -+ if (!(dm->support_ability & ODM_BB_RA_MASK)) -+ return; -+ -+ if (!dm->is_linked || (dm->phydm_sys_up_time % 2) == 1) -+ return; -+ -+ PHYDM_DBG(dm, DBG_RA_MASK, "%s ======>\n", __func__); -+ -+ ra_t->up_ramask_cnt++; -+ -+ if (ra_t->up_ramask_cnt >= FORCED_UPDATE_RAMASK_PERIOD) { -+ ra_t->up_ramask_cnt = 0; -+ force_ra_mask_en = true; -+ } -+ -+ for (sta_idx = 0; sta_idx < ODM_ASSOCIATE_ENTRY_NUM; sta_idx++) { -+ sta = dm->phydm_sta_info[sta_idx]; -+ -+ if (!is_sta_active(sta)) -+ continue; -+ -+ ra = &sta->ra_info; -+ -+ if (ra->disable_ra) -+ continue; -+ -+ PHYDM_DBG(dm, DBG_RA_MASK, "sta_idx=%d, macid=%d\n", sta_idx, -+ sta->mac_id); -+ -+ rssi = (u8)(sta->rssi_stat.rssi); -+ -+ /*@to be modified*/ -+ #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -+ if (dm->support_ic_type == ODM_RTL8812 || -+ (dm->support_ic_type == ODM_RTL8821 && -+ dm->cut_version == ODM_CUT_A) -+ ) { -+ if (rssi < ra_t->ldpc_thres) { -+ /*@LDPC TX enable*/ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ set_ra_ldpc_8812(sta, true); -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ MgntSet_TX_LDPC(dm->adapter, sta->mac_id, true); -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ /*to be added*/ -+ #endif -+ PHYDM_DBG(dm, DBG_RA_MASK, -+ "RSSI=%d, ldpc_en =TRUE\n", rssi); -+ -+ } else if (rssi > (ra_t->ldpc_thres + 3)) { -+ /*@LDPC TX disable*/ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ set_ra_ldpc_8812(sta, false); -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ MgntSet_TX_LDPC(dm->adapter, sta->mac_id, false); -+ #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ /*to be added*/ -+ #endif -+ PHYDM_DBG(dm, DBG_RA_MASK, -+ "RSSI=%d, ldpc_en =FALSE\n", rssi); -+ } -+ } -+ #endif -+ -+ rssi_lv_new = phydm_rssi_lv_dec(dm, (u32)rssi, ra->rssi_level); -+ -+ if (ra->rssi_level != rssi_lv_new || -+ (force_ra_mask_en && dm->number_linked_client < 10)) { -+ PHYDM_DBG(dm, DBG_RA_MASK, "RSSI LV:((%d))->((%d))\n", -+ ra->rssi_level, rssi_lv_new); -+ -+ ra->rssi_level = rssi_lv_new; -+ -+ ra_mask = phydm_get_bb_mod_ra_mask(dm, sta_idx); -+ -+ if (ra_t->record_ra_info) -+ ra_t->record_ra_info(dm, sta_idx, sta, ra_mask); -+ -+ #if (RTL8188E_SUPPORT) && (RATE_ADAPTIVE_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8188E) -+ /*@Driver RA*/ -+ phydm_ra_update_8188e(dm, sta_idx, ra->rate_id, -+ (u32)ra_mask, -+ ra->is_support_sgi); -+ else -+ #endif -+ { -+ /*@FW RA*/ -+ phydm_ra_h2c(dm, sta_idx, ra->disable_ra, -+ ra->disable_pt, 1, 0, ra_mask); -+ } -+ } -+ } -+} -+ -+u8 phydm_vht_en_mapping(void *dm_void, u32 wireless_mode) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 vht_en_out = 0; -+ -+ if (wireless_mode == PHYDM_WIRELESS_MODE_AC_5G || -+ wireless_mode == PHYDM_WIRELESS_MODE_AC_24G || -+ wireless_mode == PHYDM_WIRELESS_MODE_AC_ONLY) -+ vht_en_out = 1; -+ -+ PHYDM_DBG(dm, DBG_RA, "wireless_mode= (( 0x%x )), VHT_EN= (( %d ))\n", -+ wireless_mode, vht_en_out); -+ return vht_en_out; -+} -+ -+u8 phydm_rftype2rateid_2g_n20(void *dm_void, u8 rf_type) -+{ -+ u8 rate_id_idx = 0; -+ -+ if (rf_type == RF_1T1R) -+ rate_id_idx = PHYDM_BGN_20M_1SS; -+ else if (rf_type == RF_2T2R) -+ rate_id_idx = PHYDM_BGN_20M_2SS; -+ else if (rf_type == RF_3T3R) -+ rate_id_idx = PHYDM_ARFR5_N_3SS; -+ else -+ rate_id_idx = PHYDM_ARFR7_N_4SS; -+ return rate_id_idx; -+} -+ -+u8 phydm_rftype2rateid_2g_n40(void *dm_void, u8 rf_type) -+{ -+ u8 rate_id_idx = 0; -+ -+ if (rf_type == RF_1T1R) -+ rate_id_idx = PHYDM_BGN_40M_1SS; -+ else if (rf_type == RF_2T2R) -+ rate_id_idx = PHYDM_BGN_40M_2SS; -+ else if (rf_type == RF_3T3R) -+ rate_id_idx = PHYDM_ARFR5_N_3SS; -+ else -+ rate_id_idx = PHYDM_ARFR7_N_4SS; -+ return rate_id_idx; -+} -+ -+u8 phydm_rftype2rateid_5g_n(void *dm_void, u8 rf_type) -+{ -+ u8 rate_id_idx = 0; -+ -+ if (rf_type == RF_1T1R) -+ rate_id_idx = PHYDM_GN_N1SS; -+ else if (rf_type == RF_2T2R) -+ rate_id_idx = PHYDM_GN_N2SS; -+ else if (rf_type == RF_3T3R) -+ rate_id_idx = PHYDM_ARFR5_N_3SS; -+ else -+ rate_id_idx = PHYDM_ARFR7_N_4SS; -+ return rate_id_idx; -+} -+ -+u8 phydm_rftype2rateid_ac80(void *dm_void, u8 rf_type) -+{ -+ u8 rate_id_idx = 0; -+ -+ if (rf_type == RF_1T1R) -+ rate_id_idx = PHYDM_ARFR1_AC_1SS; -+ else if (rf_type == RF_2T2R) -+ rate_id_idx = PHYDM_ARFR0_AC_2SS; -+ else if (rf_type == RF_3T3R) -+ rate_id_idx = PHYDM_ARFR4_AC_3SS; -+ else -+ rate_id_idx = PHYDM_ARFR6_AC_4SS; -+ return rate_id_idx; -+} -+ -+u8 phydm_rftype2rateid_ac40(void *dm_void, u8 rf_type) -+{ -+ u8 rate_id_idx = 0; -+ -+ if (rf_type == RF_1T1R) -+ rate_id_idx = PHYDM_ARFR2_AC_2G_1SS; -+ else if (rf_type == RF_2T2R) -+ rate_id_idx = PHYDM_ARFR3_AC_2G_2SS; -+ else if (rf_type == RF_3T3R) -+ rate_id_idx = PHYDM_ARFR4_AC_3SS; -+ else -+ rate_id_idx = PHYDM_ARFR6_AC_4SS; -+ return rate_id_idx; -+} -+ -+u8 phydm_rate_id_mapping(void *dm_void, u32 wireless_mode, u8 rf_type, u8 bw) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rate_id_idx = 0; -+ -+ PHYDM_DBG(dm, DBG_RA, -+ "wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x ))\n", -+ wireless_mode, rf_type, bw); -+ -+ switch (wireless_mode) { -+ case PHYDM_WIRELESS_MODE_N_24G: -+ if (bw == CHANNEL_WIDTH_40) -+ rate_id_idx = phydm_rftype2rateid_2g_n40(dm, rf_type); -+ else -+ rate_id_idx = phydm_rftype2rateid_2g_n20(dm, rf_type); -+ break; -+ -+ case PHYDM_WIRELESS_MODE_N_5G: -+ rate_id_idx = phydm_rftype2rateid_5g_n(dm, rf_type); -+ break; -+ -+ case PHYDM_WIRELESS_MODE_G: -+ rate_id_idx = PHYDM_BG; -+ break; -+ -+ case PHYDM_WIRELESS_MODE_A: -+ rate_id_idx = PHYDM_G; -+ break; -+ -+ case PHYDM_WIRELESS_MODE_B: -+ rate_id_idx = PHYDM_B_20M; -+ break; -+ -+ case PHYDM_WIRELESS_MODE_AC_5G: -+ case PHYDM_WIRELESS_MODE_AC_ONLY: -+ rate_id_idx = phydm_rftype2rateid_ac80(dm, rf_type); -+ break; -+ -+ case PHYDM_WIRELESS_MODE_AC_24G: -+/*@Becareful to set "Lowest rate" while using PHYDM_ARFR4_AC_3SS in 2.4G/5G*/ -+ if (bw >= CHANNEL_WIDTH_80) -+ rate_id_idx = phydm_rftype2rateid_ac80(dm, rf_type); -+ else -+ rate_id_idx = phydm_rftype2rateid_ac40(dm, rf_type); -+ break; -+ -+ default: -+ rate_id_idx = 0; -+ break; -+ } -+ -+ PHYDM_DBG(dm, DBG_RA, "RA rate ID = (( 0x%x ))\n", rate_id_idx); -+ -+ return rate_id_idx; -+} -+ -+u8 phydm_rssi_lv_dec(void *dm_void, u32 rssi, u8 ratr_state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ /*@MCS0 ~ MCS4 , VHT1SS MCS0 ~ MCS4 , G 6M~24M*/ -+ u8 rssi_lv_t[RA_FLOOR_TABLE_SIZE] = {20, 34, 38, 42, 46, 50, 100}; -+ u8 new_rssi_lv = 0; -+ u8 i; -+ -+ PHYDM_DBG(dm, DBG_RA_MASK, -+ "curr RA level=(%d), Table_ori=[%d, %d, %d, %d, %d, %d]\n", -+ ratr_state, rssi_lv_t[0], rssi_lv_t[1], rssi_lv_t[2], -+ rssi_lv_t[3], rssi_lv_t[4], rssi_lv_t[5]); -+ -+ for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) { -+ if (i >= (ratr_state)) -+ rssi_lv_t[i] += RA_FLOOR_UP_GAP; -+ } -+ -+ PHYDM_DBG(dm, DBG_RA_MASK, -+ "RSSI=(%d), Table_mod=[%d, %d, %d, %d, %d, %d]\n", rssi, -+ rssi_lv_t[0], rssi_lv_t[1], rssi_lv_t[2], rssi_lv_t[3], -+ rssi_lv_t[4], rssi_lv_t[5]); -+ -+ for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) { -+ if (rssi < rssi_lv_t[i]) { -+ new_rssi_lv = i; -+ break; -+ } -+ } -+ return new_rssi_lv; -+} -+ -+enum phydm_qam_order phydm_get_ofdm_qam_order(void *dm_void, u8 rate_idx) -+{ -+ u8 tmp_idx = rate_idx; -+ enum phydm_qam_order qam_order = PHYDM_QAM_BPSK; -+ enum phydm_qam_order qam[10] = {PHYDM_QAM_BPSK, PHYDM_QAM_QPSK, -+ PHYDM_QAM_QPSK, PHYDM_QAM_16QAM, -+ PHYDM_QAM_16QAM, PHYDM_QAM_64QAM, -+ PHYDM_QAM_64QAM, PHYDM_QAM_64QAM, -+ PHYDM_QAM_256QAM, PHYDM_QAM_256QAM}; -+ -+ if (rate_idx <= ODM_RATE11M) -+ return PHYDM_QAM_CCK; -+ -+ if (rate_idx >= ODM_RATEVHTSS1MCS0) { -+ if (rate_idx >= ODM_RATEVHTSS4MCS0) -+ tmp_idx -= ODM_RATEVHTSS4MCS0; -+ else if (rate_idx >= ODM_RATEVHTSS3MCS0) -+ tmp_idx -= ODM_RATEVHTSS3MCS0; -+ else if (rate_idx >= ODM_RATEVHTSS2MCS0) -+ tmp_idx -= ODM_RATEVHTSS2MCS0; -+ else -+ tmp_idx -= ODM_RATEVHTSS1MCS0; -+ -+ qam_order = qam[tmp_idx]; -+ } else if (rate_idx >= ODM_RATEMCS0) { -+ if (rate_idx >= ODM_RATEMCS24) -+ tmp_idx -= ODM_RATEMCS24; -+ else if (rate_idx >= ODM_RATEMCS16) -+ tmp_idx -= ODM_RATEMCS16; -+ else if (rate_idx >= ODM_RATEMCS8) -+ tmp_idx -= ODM_RATEMCS8; -+ else -+ tmp_idx -= ODM_RATEMCS0; -+ -+ qam_order = qam[tmp_idx]; -+ } else { -+ if (rate_idx > ODM_RATE6M) { -+ tmp_idx -= ODM_RATE6M; -+ qam_order = qam[tmp_idx - 1]; -+ } else { -+ qam_order = PHYDM_QAM_BPSK; -+ } -+ } -+ -+ return qam_order; -+} -+ -+u8 phydm_rate_order_compute(void *dm_void, u8 rate_idx) -+{ -+ u8 rate_order = rate_idx & 0x7f; -+ -+ rate_idx &= 0x7f; -+ -+ if (rate_idx >= ODM_RATEVHTSS4MCS0) -+ rate_order -= ODM_RATEVHTSS4MCS0; -+ else if (rate_idx >= ODM_RATEVHTSS3MCS0) -+ rate_order -= ODM_RATEVHTSS3MCS0; -+ else if (rate_idx >= ODM_RATEVHTSS2MCS0) -+ rate_order -= ODM_RATEVHTSS2MCS0; -+ else if (rate_idx >= ODM_RATEVHTSS1MCS0) -+ rate_order -= ODM_RATEVHTSS1MCS0; -+ else if (rate_idx >= ODM_RATEMCS24) -+ rate_order -= ODM_RATEMCS24; -+ else if (rate_idx >= ODM_RATEMCS16) -+ rate_order -= ODM_RATEMCS16; -+ else if (rate_idx >= ODM_RATEMCS8) -+ rate_order -= ODM_RATEMCS8; -+ else if (rate_idx >= ODM_RATEMCS0) -+ rate_order -= ODM_RATEMCS0; -+ else if (rate_idx >= ODM_RATE6M) -+ rate_order -= ODM_RATE6M; -+ else -+ rate_order -= ODM_RATE1M; -+ -+ if (rate_idx >= ODM_RATEMCS0) -+ rate_order++; -+ -+ return rate_order; -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+u8 phydm_rate2ss(void *dm_void, u8 rate_idx) -+{ -+ u8 ret = 0xff; -+ u8 i, j; -+ u8 search_idx; -+ u32 ss_mapping_tab[4][3] = {{0x00000000, 0x003ff000, 0x000ff000}, -+ {0x00000000, 0xffc00000, 0x0ff00000}, -+ {0x000003ff, 0x0000000f, 0xf0000000}, -+ {0x000ffc00, 0x00000ff0, 0x00000000} }; -+ if (rate_idx < 32) { -+ search_idx = rate_idx; -+ j = 0; -+ } else if (rate_idx < 64) { -+ search_idx = rate_idx - 32; -+ j = 1; -+ } else { -+ search_idx = rate_idx - 64; -+ j = 2; -+ } -+ for (i = 0; i < 4; i++) -+ if (ss_mapping_tab[i][j] & BIT(search_idx)) -+ ret = i; -+ return ret; -+} -+ -+u8 phydm_rate2plcp(void *dm_void, u8 rate_idx) -+{ -+ u8 rate2ss = 0; -+ u8 ltftime = 0; -+ u8 plcptime = 0xff; -+ -+ if (rate_idx < ODM_RATE6M) { -+ plcptime = 192; -+ /* @CCK PLCP = 192us (long preamble) */ -+ } else if (rate_idx < ODM_RATEMCS0) { -+ plcptime = 20; -+ /* @LegOFDM PLCP = 20us */ -+ } else { -+ if (rate_idx < ODM_RATEVHTSS1MCS0) -+ plcptime = 32; -+ /* @HT mode PLCP = 20us + 12us + 4us x Nss */ -+ else -+ plcptime = 36; -+ /* VHT mode PLCP = 20us + 16us + 4us x Nss */ -+ rate2ss = phydm_rate2ss(dm_void, rate_idx); -+ if (rate2ss != 0xff) -+ ltftime = (rate2ss + 1) * 4; -+ else -+ return 0xff; -+ -+ plcptime += ltftime; -+ } -+ return plcptime; -+} -+ -+u8 phydm_get_plcp(void *dm_void, u16 macid) -+{ -+ u8 plcp_time = 0; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = NULL; -+ struct ra_sta_info *ra = NULL; -+ -+ sta = dm->phydm_sta_info[macid]; -+ ra = &sta->ra_info; -+ plcp_time = phydm_rate2plcp(dm, ra->curr_tx_rate); -+ return plcp_time; -+} -+#endif -+ -+void phydm_ra_common_info_update(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ struct cmn_sta_info *sta = NULL; -+ u16 macid; -+ u8 rate_order_tmp; -+ u8 rate_idx = 0; -+ u8 cnt = 0; -+ -+ ra_tab->highest_client_tx_order = 0; -+ ra_tab->power_tracking_flag = 1; -+ -+ if (!dm->number_linked_client) -+ return; -+ -+ for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) { -+ sta = dm->phydm_sta_info[macid]; -+ -+ if (!is_sta_active(sta)) -+ continue; -+ -+ rate_idx = sta->ra_info.curr_tx_rate & 0x7f; -+ rate_order_tmp = phydm_rate_order_compute(dm, rate_idx); -+ -+ if (rate_order_tmp >= ra_tab->highest_client_tx_order) { -+ ra_tab->highest_client_tx_order = rate_order_tmp; -+ ra_tab->highest_client_tx_rate_order = macid; -+ } -+ -+ cnt++; -+ -+ if (cnt == dm->number_linked_client) -+ break; -+ } -+ PHYDM_DBG(dm, DBG_RA, -+ "MACID[%d], Highest Tx order Update for power traking: %d\n", -+ ra_tab->highest_client_tx_rate_order, -+ ra_tab->highest_client_tx_order); -+} -+ -+void phydm_rrsr_set_register(void *dm_void, u32 rrsr_val) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_set_mac_reg(dm, R_0x440, 0xfffff, rrsr_val); -+} -+ -+void phydm_masked_rrsr_set_register(void *dm_void, u32 rrsr_val) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ -+ if (ra_tab->rrsr_val_curr == rrsr_val) -+ return; -+ -+ ra_tab->rrsr_val_curr = rrsr_val; -+ odm_set_mac_reg(dm, R_0x440, 0xfffff, rrsr_val); -+} -+ -+void phydm_rrsr_mask(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra = &dm->dm_ra_table; -+ struct cmn_sta_info *sta = NULL; -+ u8 rate_order = 0; -+ u8 rate_order_min = 0xff; -+ u32 rrsr_mask = 0, rrsr_mask_ofdm = 0; -+ u8 tx_rate_idx = 0; -+ u8 i = 0, sta_cnt = 0; -+ -+ if (!ra->dynamic_rrsr_en) -+ return; -+ -+ if (!dm->is_linked) { -+ phydm_masked_rrsr_set_register(dm, ra->rrsr_val_init); -+ return; -+ } -+ -+#if 1 -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ sta = dm->phydm_sta_info[i]; -+ if (!is_sta_active(sta)) -+ continue; -+ -+ sta_cnt++; -+ tx_rate_idx = sta->ra_info.curr_tx_rate & 0x7f; -+ rate_order = phydm_rate_order_compute(dm, tx_rate_idx); -+ if (rate_order < rate_order_min) -+ rate_order_min = rate_order; -+ -+ if (sta_cnt == dm->number_linked_client) -+ break; -+ } -+#else -+ sta = dm->phydm_sta_info[dm->rssi_min_macid]; -+ -+ if (!is_sta_active(sta)) { -+ PHYDM_DBG(dm, DBG_DYN_ARFR, "[Warning] %s invalid STA\n", -+ __func__); -+ return; -+ } -+ -+ rate_order = phydm_rate_order_compute(dm, sta->ra_info.curr_tx_rate); -+#endif -+ if (rate_order_min == 0) { -+ rrsr_mask = 0x1f; -+ } else { -+ rrsr_mask_ofdm = (u32)phydm_gen_bitmask(rate_order_min); -+ rrsr_mask = (rrsr_mask_ofdm << 4) | 0xf; -+ } -+ -+ /*ra->rrsr_val_init = 0x15d;*/ -+ -+ phydm_masked_rrsr_set_register(dm, ra->rrsr_val_init & rrsr_mask); -+ -+ PHYDM_DBG(dm, DBG_DYN_ARFR, -+ "tx{rate, rate_order_min}={0x%x, %d}, rrsr_init=0x%x, ofdm_rrsr_mask=0x%x, rrsr_val=0x%x\n", -+ tx_rate_idx, rate_order_min, ra->rrsr_val_init, -+ rrsr_mask, ra->rrsr_val_curr); -+} -+ -+void phydm_ra_info_watchdog(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ phydm_ra_common_info_update(dm); -+ phydm_ra_dynamic_retry_count(dm); -+ phydm_rrsr_mask(dm); -+ phydm_ra_mask_watchdog(dm); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ odm_refresh_basic_rate_mask(dm); -+#endif -+} -+ -+void phydm_rrsr_en(void *dm_void, boolean en_rrsr) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ -+ ra_tab->dynamic_rrsr_en = en_rrsr; -+} -+ -+void phydm_arfr_table_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & PHYDM_IC_RATEID_IDX_TYPE2) { -+ /*ARFR table3(2.4g ac 2ss) for rate_id = 16*/ -+ odm_set_mac_reg(dm, R_0x494, MASKDWORD, 0xfe01f015); -+ odm_set_mac_reg(dm, R_0x498, MASKDWORD, 0x40000000); -+ -+ /*ARFR table5(2.4g ac 1ss) for rate_id = 18*/ -+ odm_set_mac_reg(dm, R_0x4a4, MASKDWORD, 0x3ff015); -+ odm_set_mac_reg(dm, R_0x4a8, MASKDWORD, 0x40000000); -+ } -+} -+ -+void phydm_ra_info_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ -+ ra_tab->highest_client_tx_rate_order = 0; -+ ra_tab->highest_client_tx_order = 0; -+ ra_tab->ra_th_ofst = 0; -+ ra_tab->ra_ofst_direc = 0; -+ ra_tab->rrsr_val_init = odm_get_mac_reg(dm, R_0x440, MASKDWORD); -+ ra_tab->dynamic_rrsr_en = false; -+ ra_tab->ra_trigger_mode = 1; // default TBTT RA -+ ra_tab->ra_tx_cls_th = 255; -+#if (RTL8822B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ u32 ret_value; -+ -+ ret_value = odm_get_mac_reg(dm, R_0x4c8, MASKBYTE2); -+ odm_set_mac_reg(dm, R_0x4cc, MASKBYTE3, (ret_value - 1)); -+ } -+#endif -+ -+ #if 0 /*@CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -+ phydm_ra_dynamic_retry_limit_init(dm); -+ #endif -+ -+ #if 0 /*@CONFIG_RA_DYNAMIC_RATE_ID*/ -+ phydm_ra_dynamic_rate_id_init(dm); -+ #endif -+ -+ phydm_arfr_table_init(dm); -+ -+ phydm_rate_adaptive_mask_init(dm); -+} -+ -+u8 odm_find_rts_rate(void *dm_void, u8 tx_rate, boolean is_erp_protect) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 rts_ini_rate = ODM_RATE6M; -+ -+ if (is_erp_protect) { /* use CCK rate as RTS*/ -+ rts_ini_rate = ODM_RATE1M; -+ } else { -+ switch (tx_rate) { -+ case ODM_RATEVHTSS4MCS9: -+ case ODM_RATEVHTSS4MCS8: -+ case ODM_RATEVHTSS4MCS7: -+ case ODM_RATEVHTSS4MCS6: -+ case ODM_RATEVHTSS4MCS5: -+ case ODM_RATEVHTSS4MCS4: -+ case ODM_RATEVHTSS4MCS3: -+ case ODM_RATEVHTSS3MCS9: -+ case ODM_RATEVHTSS3MCS8: -+ case ODM_RATEVHTSS3MCS7: -+ case ODM_RATEVHTSS3MCS6: -+ case ODM_RATEVHTSS3MCS5: -+ case ODM_RATEVHTSS3MCS4: -+ case ODM_RATEVHTSS3MCS3: -+ case ODM_RATEVHTSS2MCS9: -+ case ODM_RATEVHTSS2MCS8: -+ case ODM_RATEVHTSS2MCS7: -+ case ODM_RATEVHTSS2MCS6: -+ case ODM_RATEVHTSS2MCS5: -+ case ODM_RATEVHTSS2MCS4: -+ case ODM_RATEVHTSS2MCS3: -+ case ODM_RATEVHTSS1MCS9: -+ case ODM_RATEVHTSS1MCS8: -+ case ODM_RATEVHTSS1MCS7: -+ case ODM_RATEVHTSS1MCS6: -+ case ODM_RATEVHTSS1MCS5: -+ case ODM_RATEVHTSS1MCS4: -+ case ODM_RATEVHTSS1MCS3: -+ case ODM_RATEMCS31: -+ case ODM_RATEMCS30: -+ case ODM_RATEMCS29: -+ case ODM_RATEMCS28: -+ case ODM_RATEMCS27: -+ case ODM_RATEMCS23: -+ case ODM_RATEMCS22: -+ case ODM_RATEMCS21: -+ case ODM_RATEMCS20: -+ case ODM_RATEMCS19: -+ case ODM_RATEMCS15: -+ case ODM_RATEMCS14: -+ case ODM_RATEMCS13: -+ case ODM_RATEMCS12: -+ case ODM_RATEMCS11: -+ case ODM_RATEMCS7: -+ case ODM_RATEMCS6: -+ case ODM_RATEMCS5: -+ case ODM_RATEMCS4: -+ case ODM_RATEMCS3: -+ case ODM_RATE54M: -+ case ODM_RATE48M: -+ case ODM_RATE36M: -+ case ODM_RATE24M: -+ rts_ini_rate = ODM_RATE24M; -+ break; -+ case ODM_RATEVHTSS4MCS2: -+ case ODM_RATEVHTSS4MCS1: -+ case ODM_RATEVHTSS3MCS2: -+ case ODM_RATEVHTSS3MCS1: -+ case ODM_RATEVHTSS2MCS2: -+ case ODM_RATEVHTSS2MCS1: -+ case ODM_RATEVHTSS1MCS2: -+ case ODM_RATEVHTSS1MCS1: -+ case ODM_RATEMCS26: -+ case ODM_RATEMCS25: -+ case ODM_RATEMCS18: -+ case ODM_RATEMCS17: -+ case ODM_RATEMCS10: -+ case ODM_RATEMCS9: -+ case ODM_RATEMCS2: -+ case ODM_RATEMCS1: -+ case ODM_RATE18M: -+ case ODM_RATE12M: -+ rts_ini_rate = ODM_RATE12M; -+ break; -+ case ODM_RATEVHTSS4MCS0: -+ case ODM_RATEVHTSS3MCS0: -+ case ODM_RATEVHTSS2MCS0: -+ case ODM_RATEVHTSS1MCS0: -+ case ODM_RATEMCS24: -+ case ODM_RATEMCS16: -+ case ODM_RATEMCS8: -+ case ODM_RATEMCS0: -+ case ODM_RATE9M: -+ case ODM_RATE6M: -+ rts_ini_rate = ODM_RATE6M; -+ break; -+ case ODM_RATE11M: -+ case ODM_RATE5_5M: -+ case ODM_RATE2M: -+ case ODM_RATE1M: -+ rts_ini_rate = ODM_RATE1M; -+ break; -+ default: -+ rts_ini_rate = ODM_RATE6M; -+ break; -+ } -+ } -+ -+ if (*dm->band_type == ODM_BAND_5G) { -+ if (rts_ini_rate < ODM_RATE6M) -+ rts_ini_rate = ODM_RATE6M; -+ } -+ return rts_ini_rate; -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+void odm_refresh_basic_rate_mask( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ static u8 stage = 0; -+ u8 cur_stage = 0; -+ OCTET_STRING os_rate_set; -+ PMGNT_INFO mgnt_info = GetDefaultMgntInfo(((PADAPTER)adapter)); -+ u8 rate_set[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M}; -+ -+ if (dm->support_ic_type != ODM_RTL8812 && dm->support_ic_type != ODM_RTL8821) -+ return; -+ -+ if (dm->is_linked == false) /* unlink Default port information */ -+ cur_stage = 0; -+ else if (dm->rssi_min < 40) /* @link RSSI < 40% */ -+ cur_stage = 1; -+ else if (dm->rssi_min > 45) /* @link RSSI > 45% */ -+ cur_stage = 3; -+ else -+ cur_stage = 2; /* @link 25% <= RSSI <= 30% */ -+ -+ if (cur_stage != stage) { -+ if (cur_stage == 1) { -+ FillOctetString(os_rate_set, rate_set, 5); -+ FilterSupportRate(mgnt_info->mBrates, &os_rate_set, false); -+ phydm_set_hw_reg_handler_interface(dm, HW_VAR_BASIC_RATE, (u8 *)&os_rate_set); -+ } else if (cur_stage == 3 && (stage == 1 || stage == 2)) -+ phydm_set_hw_reg_handler_interface(dm, HW_VAR_BASIC_RATE, (u8 *)(&mgnt_info->mBrates)); -+ } -+ -+ stage = cur_stage; -+} -+ -+#endif -+ -+#if 0 /*@CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -+ -+void phydm_retry_limit_table_bound( -+ void *dm_void, -+ u8 *retry_limit, -+ u8 offset) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ -+ if (*retry_limit > offset) { -+ *retry_limit -= offset; -+ -+ if (*retry_limit < ra_tab->retrylimit_low) -+ *retry_limit = ra_tab->retrylimit_low; -+ else if (*retry_limit > ra_tab->retrylimit_high) -+ *retry_limit = ra_tab->retrylimit_high; -+ } else -+ *retry_limit = ra_tab->retrylimit_low; -+} -+ -+void phydm_reset_retry_limit_table( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_t = &dm->dm_ra_table; -+ u8 i; -+ -+ u8 per_rate_retrylimit_table_20M[ODM_RATEMCS15 + 1] = { -+ 1, 1, 2, 4, /*@CCK*/ -+ 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ -+ 2, 4, 6, 8, 12, 18, 20, 22, /*@20M HT-1SS*/ -+ 2, 4, 6, 8, 12, 18, 20, 22 /*@20M HT-2SS*/ -+ }; -+ u8 per_rate_retrylimit_table_40M[ODM_RATEMCS15 + 1] = { -+ 1, 1, 2, 4, /*@CCK*/ -+ 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/ -+ 4, 8, 12, 16, 24, 32, 32, 32, /*@40M HT-1SS*/ -+ 4, 8, 12, 16, 24, 32, 32, 32 /*@40M HT-2SS*/ -+ }; -+ -+ memcpy(&ra_t->per_rate_retrylimit_20M[0], -+ &per_rate_retrylimit_table_20M[0], PHY_NUM_RATE_IDX); -+ memcpy(&ra_t->per_rate_retrylimit_40M[0], -+ &per_rate_retrylimit_table_40M[0], PHY_NUM_RATE_IDX); -+ -+ for (i = 0; i < PHY_NUM_RATE_IDX; i++) { -+ phydm_retry_limit_table_bound(dm, -+ &ra_t->per_rate_retrylimit_20M[i], -+ 0); -+ phydm_retry_limit_table_bound(dm, -+ &ra_t->per_rate_retrylimit_40M[i], -+ 0); -+ } -+} -+ -+void phydm_ra_dynamic_retry_limit_init( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ -+ ra_tab->retry_descend_num = RA_RETRY_DESCEND_NUM; -+ ra_tab->retrylimit_low = RA_RETRY_LIMIT_LOW; -+ ra_tab->retrylimit_high = RA_RETRY_LIMIT_HIGH; -+ -+ phydm_reset_retry_limit_table(dm); -+} -+ -+void phydm_ra_dynamic_retry_limit( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ u8 i, retry_offset; -+ u32 ma_rx_tp; -+ -+ if (dm->pre_number_active_client == dm->number_active_client) { -+ PHYDM_DBG(dm, DBG_RA, -+ "pre_number_active_client == number_active_client\n"); -+ return; -+ -+ } else { -+ if (dm->number_active_client == 1) { -+ phydm_reset_retry_limit_table(dm); -+ PHYDM_DBG(dm, DBG_RA, -+ "one client only->reset to default value\n"); -+ } else { -+ retry_offset = dm->number_active_client * ra_tab->retry_descend_num; -+ -+ for (i = 0; i < PHY_NUM_RATE_IDX; i++) { -+ phydm_retry_limit_table_bound(dm, -+ &ra_tab->per_rate_retrylimit_20M[i], -+ retry_offset); -+ phydm_retry_limit_table_bound(dm, -+ &ra_tab->per_rate_retrylimit_40M[i], -+ retry_offset); -+ } -+ } -+ } -+} -+#endif -+ -+#if 0 /*@CONFIG_RA_DYNAMIC_RATE_ID*/ -+void phydm_ra_dynamic_rate_id_on_assoc( -+ void *dm_void, -+ u8 wireless_mode, -+ u8 init_rate_id) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_RA, -+ "[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", -+ dm->rf_type, wireless_mode, init_rate_id); -+ -+ if (dm->rf_type == RF_2T2R || dm->rf_type == RF_2T3R || dm->rf_type == RF_2T4R) { -+ if ((dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) && -+ (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G))) { -+ PHYDM_DBG(dm, DBG_RA, -+ "[ON ASSOC] set N-2SS ARFR5 table\n"); -+ odm_set_mac_reg(dm, R_0x4a4, MASKDWORD, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ -+ odm_set_mac_reg(dm, R_0x4a8, MASKDWORD, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ -+ } else if ((dm->support_ic_type & (ODM_RTL8812)) && -+ (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY))) { -+ PHYDM_DBG(dm, DBG_RA, -+ "[ON ASSOC] set AC-2SS ARFR0 table\n"); -+ odm_set_mac_reg(dm, R_0x444, MASKDWORD, 0x0fff); /*@AC-2SS, ARFR0, rate_id = 0x9*/ -+ odm_set_mac_reg(dm, R_0x448, MASKDWORD, 0xff01f000); /*@AC-2SS, ARFR0, rate_id = 0x9*/ -+ } -+ } -+} -+ -+void phydm_ra_dynamic_rate_id_init( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E)) { -+ odm_set_mac_reg(dm, R_0x4a4, MASKDWORD, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/ -+ odm_set_mac_reg(dm, R_0x4a8, MASKDWORD, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/ -+ -+ odm_set_mac_reg(dm, R_0x444, MASKDWORD, 0x0fff); /*@AC-2SS, ARFR0, rate_id = 0x9*/ -+ odm_set_mac_reg(dm, R_0x448, MASKDWORD, 0xff01f000); /*@AC-2SS, ARFR0, rate_id = 0x9*/ -+ } -+} -+ -+void phydm_update_rate_id( -+ void *dm_void, -+ u8 rate, -+ u8 platform_macid) -+{ -+#if 0 -+ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ u8 current_tx_ss; -+ u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/ -+ enum wireless_set wireless_set; -+ u8 phydm_macid; -+ struct cmn_sta_info *sta; -+ -+#if 0 -+ if (rate_idx >= ODM_RATEVHTSS2MCS0) { -+ PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( VHT2SS-MCS%d ))\n", -+ platform_macid, (rate_idx - ODM_RATEVHTSS2MCS0)); -+ /*@dummy for SD4 check patch*/ -+ } else if (rate_idx >= ODM_RATEVHTSS1MCS0) { -+ PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( VHT1SS-MCS%d ))\n", -+ platform_macid, (rate_idx - ODM_RATEVHTSS1MCS0)); -+ /*@dummy for SD4 check patch*/ -+ } else if (rate_idx >= ODM_RATEMCS0) { -+ PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( HT-MCS%d ))\n", -+ platform_macid, (rate_idx - ODM_RATEMCS0)); -+ /*@dummy for SD4 check patch*/ -+ } else { -+ PHYDM_DBG(dm, DBG_RA, "rate[%d]: (( HT-MCS%d ))\n", -+ platform_macid, rate_idx); -+ /*@dummy for SD4 check patch*/ -+ } -+#endif -+ -+ phydm_macid = dm->phydm_macid_table[platform_macid]; -+ sta = dm->phydm_sta_info[phydm_macid]; -+ -+ if (is_sta_active(sta)) { -+ wireless_set = sta->support_wireless_set; -+ -+ if (dm->rf_type == RF_2T2R || dm->rf_type == RF_2T3R || dm->rf_type == RF_2T4R) { -+ if (wireless_set & WIRELESS_HT) { /*N mode*/ -+ if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*@2SS mode*/ -+ -+ sta->ra_info.rate_id = ARFR_5_RATE_ID; -+ PHYDM_DBG(dm, DBG_RA, "ARFR_5\n"); -+ } -+ } else if (wireless_set & WIRELESS_VHT) {/*@AC mode*/ -+ if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*@2SS mode*/ -+ -+ sta->ra_info.rate_id = ARFR_0_RATE_ID; -+ PHYDM_DBG(dm, DBG_RA, "ARFR_0\n"); -+ } -+ } else -+ sta->ra_info.rate_id = ARFR_0_RATE_ID; -+ -+ PHYDM_DBG(dm, DBG_RA, "UPdate_RateID[%d]: (( 0x%x ))\n", -+ platform_macid, sta->ra_info.rate_id); -+ } -+ } -+#endif -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_rainfo.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_rainfo.h -new file mode 100644 -index 000000000000..5cef3ce17c99 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_rainfo.h -@@ -0,0 +1,333 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMRAINFO_H__ -+#define __PHYDMRAINFO_H__ -+ -+/* 2020.08.05 Fix ARFR bug due to rate_id error for 2.4G VHT mode*/ -+#define RAINFO_VERSION "8.8" -+ -+#define FORCED_UPDATE_RAMASK_PERIOD 5 -+ -+#define H2C_MAX_LENGTH 7 -+ -+#define RA_FLOOR_UP_GAP 3 -+#define RA_FLOOR_TABLE_SIZE 7 -+ -+#define ACTIVE_TP_THRESHOLD 1 -+#define RA_RETRY_DESCEND_NUM 2 -+#define RA_RETRY_LIMIT_LOW 4 -+#define RA_RETRY_LIMIT_HIGH 32 -+ -+#define PHYDM_IS_LEGACY_RATE(rate) ((rate <= ODM_RATE54M) ? true : false) -+#define PHYDM_IS_CCK_RATE(rate) ((rate <= ODM_RATE11M) ? true : false) -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #define FIRST_MACID 1 -+#else -+ #define FIRST_MACID 0 -+#endif -+ -+/* @1 ============================================================ -+ * 1 enumrate -+ * 1 ============================================================ -+ */ -+ -+enum phydm_ra_dbg_para { -+ RADBG_PCR_TH_OFFSET = 0, -+ RADBG_RTY_PENALTY = 1, -+ RADBG_N_HIGH = 2, -+ RADBG_N_LOW = 3, -+ RADBG_TRATE_UP_TABLE = 4, -+ RADBG_TRATE_DOWN_TABLE = 5, -+ RADBG_TRYING_NECESSARY = 6, -+ RADBG_TDROPING_NECESSARY = 7, -+ RADBG_RATE_UP_RTY_RATIO = 8, -+ RADBG_RATE_DOWN_RTY_RATIO = 9, /* u8 */ -+ -+ RADBG_DEBUG_MONITOR1 = 0xc, -+ RADBG_DEBUG_MONITOR2 = 0xd, -+ RADBG_DEBUG_MONITOR3 = 0xe, -+ RADBG_DEBUG_MONITOR4 = 0xf, -+ RADBG_DEBUG_MONITOR5 = 0x10, -+ NUM_RA_PARA -+}; -+ -+enum phydm_wireless_mode { -+ PHYDM_WIRELESS_MODE_UNKNOWN = 0x00, -+ PHYDM_WIRELESS_MODE_A = 0x01, -+ PHYDM_WIRELESS_MODE_B = 0x02, -+ PHYDM_WIRELESS_MODE_G = 0x04, -+ PHYDM_WIRELESS_MODE_AUTO = 0x08, -+ PHYDM_WIRELESS_MODE_N_24G = 0x10, -+ PHYDM_WIRELESS_MODE_N_5G = 0x20, -+ PHYDM_WIRELESS_MODE_AC_5G = 0x40, -+ PHYDM_WIRELESS_MODE_AC_24G = 0x80, -+ PHYDM_WIRELESS_MODE_AC_ONLY = 0x100, -+ PHYDM_WIRELESS_MODE_MAX = 0x800, -+ PHYDM_WIRELESS_MODE_ALL = 0xFFFF -+}; -+ -+enum phydm_rateid_idx { -+ PHYDM_BGN_40M_2SS = 0, -+ PHYDM_BGN_40M_1SS = 1, -+ PHYDM_BGN_20M_2SS = 2, -+ PHYDM_BGN_20M_1SS = 3, -+ PHYDM_GN_N2SS = 4, -+ PHYDM_GN_N1SS = 5, -+ PHYDM_BG = 6, -+ PHYDM_G = 7, -+ PHYDM_B_20M = 8, -+ PHYDM_ARFR0_AC_2SS = 9, -+ PHYDM_ARFR1_AC_1SS = 10, -+ PHYDM_ARFR2_AC_2G_1SS = 11, -+ PHYDM_ARFR3_AC_2G_2SS = 12, -+ PHYDM_ARFR4_AC_3SS = 13, -+ PHYDM_ARFR5_N_3SS = 14, -+ PHYDM_ARFR7_N_4SS = 15, -+ PHYDM_ARFR6_AC_4SS = 16 -+}; -+ -+/*ARFR4(0x49c/0x4a0) can not be used because FW BT would use.*/ -+enum phydm_rateid_idx_type_2 { -+ PHYDM_TYPE2_AC_2SS = 9, -+ PHYDM_TYPE2_AC_1SS = 10, -+ PHYDM_TYPE2_MIX_1SS = 11, -+ PHYDM_TYPE2_MIX_2SS = 12, -+ PHYDM_TYPE2_ARFR3_AC_2G_2SS = 16, /*0x494/0x498*/ -+ PHYDM_TYPE2_ARFR5_AC_2G_1SS = 18 /*0x4a4/0x4a8*/ -+}; -+ -+enum phydm_qam_order { -+ PHYDM_QAM_CCK = 0, -+ PHYDM_QAM_BPSK = 1, -+ PHYDM_QAM_QPSK = 2, -+ PHYDM_QAM_16QAM = 3, -+ PHYDM_QAM_64QAM = 4, -+ PHYDM_QAM_256QAM = 5 -+}; -+ -+#if (RATE_ADAPTIVE_SUPPORT == 1)/* @88E RA */ -+ -+struct _phydm_txstatistic_ { -+ u32 hw_total_tx; -+ u32 hw_tx_success; -+ u32 hw_tx_rty; -+ u32 hw_tx_drop; -+}; -+ -+/* @1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+struct _odm_ra_info_ { -+ u8 rate_id; -+ u32 rate_mask; -+ u32 ra_use_rate; -+ u8 rate_sgi; -+ u8 rssi_sta_ra; -+ u8 pre_rssi_sta_ra; -+ u8 sgi_enable; -+ u8 decision_rate; -+ u8 pre_rate; -+ u8 highest_rate; -+ u8 lowest_rate; -+ u32 nsc_up; -+ u32 nsc_down; -+ u16 RTY[5]; -+ u32 TOTAL; -+ u16 DROP; -+ u8 active; -+ u16 rpt_time; -+ u8 ra_waiting_counter; -+ u8 ra_pending_counter; -+ u8 ra_drop_after_down; -+#if 1 /* POWER_TRAINING_ACTIVE == 1 */ /* For compile pass only~! */ -+ u8 pt_active; /* on or off */ -+ u8 pt_try_state; /* @0 trying state, 1 for decision state */ -+ u8 pt_stage; /* @0~6 */ -+ u8 pt_stop_count; /* Stop PT counter */ -+ u8 pt_pre_rate; /* @if rate change do PT */ -+ u8 pt_pre_rssi; /* @if RSSI change 5% do PT */ -+ u8 pt_mode_ss; /* @decide whitch rate should do PT */ -+ u8 ra_stage; /* @StageRA, decide how many times RA will be done between PT */ -+ u8 pt_smooth_factor; -+#endif -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) -+ u8 rate_down_counter; -+ u8 rate_up_counter; -+ u8 rate_direction; -+ u8 bounding_type; -+ u8 bounding_counter; -+ u8 bounding_learning_time; -+ u8 rate_down_start_time; -+#endif -+}; -+#endif -+ -+ -+struct ra_table { -+ #ifdef MU_EX_MACID -+ u8 mu1_rate[MU_EX_MACID]; -+ #endif -+ u8 highest_client_tx_order; -+ u16 highest_client_tx_rate_order; -+ u8 power_tracking_flag; -+ u8 ra_th_ofst; /*RA_threshold_offset*/ -+ u8 ra_ofst_direc; /*RA_offset_direction*/ -+ u8 up_ramask_cnt; /*@force update_ra_mask counter*/ -+ u8 up_ramask_cnt_tmp; /*@Just for debug, should be removed latter*/ -+ u32 rrsr_val_init; /*0x440*/ -+ u32 rrsr_val_curr; /*0x440*/ -+ boolean dynamic_rrsr_en; -+ u8 ra_trigger_mode; /*0: pkt RA, 1: TBTT RA*/ -+ u8 ra_tx_cls_th; /*255: auto, xx: in dB*/ -+#if 0 /*@CONFIG_RA_DYNAMIC_RTY_LIMIT*/ -+ u8 per_rate_retrylimit_20M[PHY_NUM_RATE_IDX]; -+ u8 per_rate_retrylimit_40M[PHY_NUM_RATE_IDX]; -+ u8 retry_descend_num; -+ u8 retrylimit_low; -+ u8 retrylimit_high; -+#endif -+ u8 ldpc_thres; /* @if RSSI > ldpc_th => switch from LPDC to BCC */ -+ void (*record_ra_info)(void *dm_void, u8 macid, -+ struct cmn_sta_info *sta, u64 ra_mask); -+ u8 ra_mask_rpt_stamp; -+ u8 ra_mask_buf[8]; -+}; -+ -+struct ra_mask_rpt_trig { -+ u8 ra_mask_rpt_stamp; -+ u8 macid; -+}; -+ -+struct ra_mask_rpt { -+ u8 ra_mask_rpt_stamp; -+ u8 ra_mask_buf[8]; -+}; -+ -+/* @1 ============================================================ -+ * 1 Function Prototype -+ * 1 ============================================================ -+ */ -+boolean phydm_is_cck_rate(void *dm_void, u8 rate); -+ -+boolean phydm_is_ofdm_rate(void *dm_void, u8 rate); -+ -+boolean phydm_is_ht_rate(void *dm_void, u8 rate); -+ -+boolean phydm_is_vht_rate(void *dm_void, u8 rate); -+ -+u8 phydm_legacy_rate_2_spec_rate(void *dm_void, u8 rate); -+ -+u8 phydm_rate_2_rate_digit(void *dm_void, u8 rate); -+ -+u8 phydm_rate_type_2_num_ss(void *dm_void, enum PDM_RATE_TYPE type); -+ -+u8 phydm_rate_to_num_ss(void *dm_void, u8 data_rate); -+ -+void phydm_h2C_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void phydm_ra_debug(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len); -+ -+void phydm_ra_mask_report_h2c_trigger(void *dm_void, -+ struct ra_mask_rpt_trig *trig_rpt); -+ -+void phydm_ra_mask_report_c2h_result(void *dm_void, struct ra_mask_rpt *rpt); -+ -+void odm_c2h_ra_para_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); -+ -+void phydm_print_rate(void *dm_void, u8 rate, u32 dbg_component); -+ -+void phydm_print_rate_2_buff(void *dm_void, u8 rate, char *buf, u16 buf_size); -+ -+void phydm_c2h_ra_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); -+ -+u8 phydm_rate_order_compute(void *dm_void, u8 rate_idx); -+ -+void phydm_rrsr_set_register(void *dm_void, u32 rrsr_val); -+ -+void phydm_ra_info_watchdog(void *dm_void); -+ -+void phydm_rrsr_en(void *dm_void, boolean en_rrsr); -+ -+void phydm_ra_info_init(void *dm_void); -+ -+void phydm_modify_RA_PCR_threshold(void *dm_void, u8 ra_ofst_direc, -+ u8 ra_th_ofst); -+ -+u8 phydm_vht_en_mapping(void *dm_void, u32 wireless_mode); -+ -+u8 phydm_rate_id_mapping(void *dm_void, u32 wireless_mode, u8 rf_type, u8 bw); -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+void phydm_update_hal_ra_mask( -+ void *dm_void, -+ u32 wireless_mode, -+ u8 rf_type, -+ u8 BW, -+ u8 mimo_ps_enable, -+ u8 disable_cck_rate, -+ u32 *ratr_bitmap_msb_in, -+ u32 *ratr_bitmap_in, -+ u8 tx_rate_level); -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+u8 phydm_get_plcp(void *dm_void, u16 macid); -+#endif -+ -+void phydm_refresh_rate_adaptive_mask(void *dm_void); -+ -+u8 phydm_get_rx_stream_num(void *dm_void, enum rf_type type); -+ -+u8 phydm_rssi_lv_dec(void *dm_void, u32 rssi, u8 ratr_state); -+ -+void odm_ra_post_action_on_assoc(void *dm); -+ -+u8 odm_find_rts_rate(void *dm_void, u8 tx_rate, boolean is_erp_protect); -+ -+void phydm_show_sta_info(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+u8 phydm_get_rate_from_rssi_lv(void *dm_void, u8 sta_idx); -+ -+void phydm_ra_registed(void *dm_void, u8 macid, u8 rssi_from_assoc); -+ -+void phydm_ra_offline(void *dm_void, u8 macid); -+ -+void phydm_ra_mask_watchdog(void *dm_void); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void odm_refresh_basic_rate_mask( -+ void *dm_void); -+#endif -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+void phydm_ra_mode_selection(void *dm_void, u8 mode); -+#endif -+ -+#endif /*@#ifndef __PHYDMRAINFO_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_reg.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_reg.h -new file mode 100644 -index 000000000000..0835f34bd4d6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_reg.h -@@ -0,0 +1,243 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+/************************************************************* -+ * File Name: odm_reg.h -+ * -+ * Description: -+ * -+ * This file is for general register definition. -+ * -+ * -+ ************************************************************/ -+#ifndef __HAL_ODM_REG_H__ -+#define __HAL_ODM_REG_H__ -+ -+/*@ -+ * Register Definition -+ * -+ */ -+ -+/* @MAC REG */ -+#define ODM_BB_RESET 0x002 -+#define ODM_DUMMY 0x4fe -+#define RF_T_METER_OLD 0x24 -+#define RF_T_METER_NEW 0x42 -+ -+#define ODM_EDCA_VO_PARAM 0x500 -+#define ODM_EDCA_VI_PARAM 0x504 -+#define ODM_EDCA_BE_PARAM 0x508 -+#define ODM_EDCA_BK_PARAM 0x50C -+#define ODM_TXPAUSE 0x522 -+ -+/* @LTE_COEX */ -+#define REG_LTECOEX_CTRL 0x07C0 -+#define REG_LTECOEX_WRITE_DATA 0x07C4 -+#define REG_LTECOEX_READ_DATA 0x07C8 -+#define REG_LTECOEX_PATH_CONTROL 0x70 -+ -+/* @BB REG */ -+#define ODM_FPGA_PHY0_PAGE8 0x800 -+#define ODM_PSD_SETTING 0x808 -+#define ODM_AFE_SETTING 0x818 -+#define ODM_TXAGC_B_6_18 0x830 -+#define ODM_TXAGC_B_24_54 0x834 -+#define ODM_TXAGC_B_MCS32_5 0x838 -+#define ODM_TXAGC_B_MCS0_MCS3 0x83c -+#define ODM_TXAGC_B_MCS4_MCS7 0x848 -+#define ODM_TXAGC_B_MCS8_MCS11 0x84c -+#define ODM_ANALOG_REGISTER 0x85c -+#define ODM_RF_INTERFACE_OUTPUT 0x860 -+#define ODM_TXAGC_B_MCS12_MCS15 0x868 -+#define ODM_TXAGC_B_11_A_2_11 0x86c -+#define ODM_AD_DA_LSB_MASK 0x874 -+#define ODM_ENABLE_3_WIRE 0x88c -+#define ODM_PSD_REPORT 0x8b4 -+#define ODM_R_ANT_SELECT 0x90c -+#define ODM_CCK_ANT_SELECT 0xa07 -+#define ODM_CCK_PD_THRESH 0xa0a -+#define ODM_CCK_RF_REG1 0xa11 -+#define ODM_CCK_MATCH_FILTER 0xa20 -+#define ODM_CCK_RAKE_MAC 0xa2e -+#define ODM_CCK_CNT_RESET 0xa2d -+#define ODM_CCK_TX_DIVERSITY 0xa2f -+#define ODM_CCK_FA_CNT_MSB 0xa5b -+#define ODM_CCK_FA_CNT_LSB 0xa5c -+#define ODM_CCK_NEW_FUNCTION 0xa75 -+#define ODM_OFDM_PHY0_PAGE_C 0xc00 -+#define ODM_OFDM_RX_ANT 0xc04 -+#define ODM_R_A_RXIQI 0xc14 -+#define ODM_R_A_AGC_CORE1 0xc50 -+#define ODM_R_A_AGC_CORE2 0xc54 -+#define ODM_R_B_AGC_CORE1 0xc58 -+#define ODM_R_AGC_PAR 0xc70 -+#define ODM_R_HTSTF_AGC_PAR 0xc7c -+#define ODM_TX_PWR_TRAINING_A 0xc90 -+#define ODM_TX_PWR_TRAINING_B 0xc98 -+#define ODM_OFDM_FA_CNT1 0xcf0 -+#define ODM_OFDM_PHY0_PAGE_D 0xd00 -+#define ODM_OFDM_FA_CNT2 0xda0 -+#define ODM_OFDM_FA_CNT3 0xda4 -+#define ODM_OFDM_FA_CNT4 0xda8 -+#define ODM_TXAGC_A_6_18 0xe00 -+#define ODM_TXAGC_A_24_54 0xe04 -+#define ODM_TXAGC_A_1_MCS32 0xe08 -+#define ODM_TXAGC_A_MCS0_MCS3 0xe10 -+#define ODM_TXAGC_A_MCS4_MCS7 0xe14 -+#define ODM_TXAGC_A_MCS8_MCS11 0xe18 -+#define ODM_TXAGC_A_MCS12_MCS15 0xe1c -+ -+/* RF REG */ -+#define ODM_GAIN_SETTING 0x00 -+#define ODM_CHANNEL 0x18 -+#define ODM_RF_T_METER 0x24 -+#define ODM_RF_T_METER_92D 0x42 -+#define ODM_RF_T_METER_88E 0x42 -+#define ODM_RF_T_METER_92E 0x42 -+#define ODM_RF_T_METER_8812 0x42 -+#define REG_RF_TX_GAIN_OFFSET 0x55 -+ -+/* @ant Detect Reg */ -+#define ODM_DPDT 0x300 -+ -+/* PSD Init */ -+#define ODM_PSDREG 0x808 -+ -+/* @92D path Div */ -+#define PATHDIV_REG 0xB30 -+#define PATHDIV_TRI 0xBA0 -+ -+ -+/*@ -+ * Bitmap Definition -+ */ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -+ /* TX AGC */ -+ #define REG_TX_AGC_A_CCK_11_CCK_1_JAGUAR 0xc20 -+ #define REG_TX_AGC_A_OFDM18_OFDM6_JAGUAR 0xc24 -+ #define REG_TX_AGC_A_OFDM54_OFDM24_JAGUAR 0xc28 -+ #define REG_TX_AGC_A_MCS3_MCS0_JAGUAR 0xc2c -+ #define REG_TX_AGC_A_MCS7_MCS4_JAGUAR 0xc30 -+ #define REG_TX_AGC_A_MCS11_MCS8_JAGUAR 0xc34 -+ #define REG_TX_AGC_A_MCS15_MCS12_JAGUAR 0xc38 -+ #define REG_TX_AGC_A_NSS1_INDEX3_NSS1_INDEX0_JAGUAR 0xc3c -+ #define REG_TX_AGC_A_NSS1_INDEX7_NSS1_INDEX4_JAGUAR 0xc40 -+ #define REG_TX_AGC_A_NSS2_INDEX1_NSS1_INDEX8_JAGUAR 0xc44 -+ #define REG_TX_AGC_A_NSS2_INDEX5_NSS2_INDEX2_JAGUAR 0xc48 -+ #define REG_TX_AGC_A_NSS2_INDEX9_NSS2_INDEX6_JAGUAR 0xc4c -+ #if defined(CONFIG_WLAN_HAL_8814AE) -+ #define REG_TX_AGC_A_MCS19_MCS16_JAGUAR 0xcd8 -+ #define REG_TX_AGC_A_MCS23_MCS20_JAGUAR 0xcdc -+ #define REG_TX_AGC_A_NSS3_INDEX3_NSS3_INDEX0_JAGUAR 0xce0 -+ #define REG_TX_AGC_A_NSS3_INDEX7_NSS3_INDEX4_JAGUAR 0xce4 -+ #define REG_TX_AGC_A_NSS3_INDEX9_NSS3_INDEX8_JAGUAR 0xce8 -+ #endif -+ #define REG_TX_AGC_B_CCK_11_CCK_1_JAGUAR 0xe20 -+ #define REG_TX_AGC_B_OFDM18_OFDM6_JAGUAR 0xe24 -+ #define REG_TX_AGC_B_OFDM54_OFDM24_JAGUAR 0xe28 -+ #define REG_TX_AGC_B_MCS3_MCS0_JAGUAR 0xe2c -+ #define REG_TX_AGC_B_MCS7_MCS4_JAGUAR 0xe30 -+ #define REG_TX_AGC_B_MCS11_MCS8_JAGUAR 0xe34 -+ #define REG_TX_AGC_B_MCS15_MCS12_JAGUAR 0xe38 -+ #define REG_TX_AGC_B_NSS1_INDEX3_NSS1_INDEX0_JAGUAR 0xe3c -+ #define REG_TX_AGC_B_NSS1_INDEX7_NSS1_INDEX4_JAGUAR 0xe40 -+ #define REG_TX_AGC_B_NSS2_INDEX1_NSS1_INDEX8_JAGUAR 0xe44 -+ #define REG_TX_AGC_B_NSS2_INDEX5_NSS2_INDEX2_JAGUAR 0xe48 -+ #define REG_TX_AGC_B_NSS2_INDEX9_NSS2_INDEX6_JAGUAR 0xe4c -+ #if defined(CONFIG_WLAN_HAL_8814AE) -+ #define REG_TX_AGC_B_MCS19_MCS16_JAGUAR 0xed8 -+ #define REG_TX_AGC_B_MCS23_MCS20_JAGUAR 0xedc -+ #define REG_TX_AGC_B_NSS3_INDEX3_NSS3_INDEX0_JAGUAR 0xee0 -+ #define REG_TX_AGC_B_NSS3_INDEX7_NSS3_INDEX4_JAGUAR 0xee4 -+ #define REG_TX_AGC_B_NSS3_INDEX9_NSS3_INDEX8_JAGUAR 0xee8 -+ #define REG_TX_AGC_C_CCK_11_CCK_1_JAGUAR 0x1820 -+ #define REG_TX_AGC_C_OFDM18_OFDM6_JAGUAR 0x1824 -+ #define REG_TX_AGC_C_OFDM54_OFDM24_JAGUAR 0x1828 -+ #define REG_TX_AGC_C_MCS3_MCS0_JAGUAR 0x182c -+ #define REG_TX_AGC_C_MCS7_MCS4_JAGUAR 0x1830 -+ #define REG_TX_AGC_C_MCS11_MCS8_JAGUAR 0x1834 -+ #define REG_TX_AGC_C_MCS15_MCS12_JAGUAR 0x1838 -+ #define REG_TX_AGC_C_NSS1_INDEX3_NSS1_INDEX0_JAGUAR 0x183c -+ #define REG_TX_AGC_C_NSS1_INDEX7_NSS1_INDEX4_JAGUAR 0x1840 -+ #define REG_TX_AGC_C_NSS2_INDEX1_NSS1_INDEX8_JAGUAR 0x1844 -+ #define REG_TX_AGC_C_NSS2_INDEX5_NSS2_INDEX2_JAGUAR 0x1848 -+ #define REG_TX_AGC_C_NSS2_INDEX9_NSS2_INDEX6_JAGUAR 0x184c -+ #define REG_TX_AGC_C_MCS19_MCS16_JAGUAR 0x18d8 -+ #define REG_TX_AGC_C_MCS23_MCS20_JAGUAR 0x18dc -+ #define REG_TX_AGC_C_NSS3_INDEX3_NSS3_INDEX0_JAGUAR 0x18e0 -+ #define REG_TX_AGC_C_NSS3_INDEX7_NSS3_INDEX4_JAGUAR 0x18e4 -+ #define REG_TX_AGC_C_NSS3_INDEX9_NSS3_INDEX8_JAGUAR 0x18e8 -+ #define REG_TX_AGC_D_CCK_11_CCK_1_JAGUAR 0x1a20 -+ #define REG_TX_AGC_D_OFDM18_OFDM6_JAGUAR 0x1a24 -+ #define REG_TX_AGC_D_OFDM54_OFDM24_JAGUAR 0x1a28 -+ #define REG_TX_AGC_D_MCS3_MCS0_JAGUAR 0x1a2c -+ #define REG_TX_AGC_D_MCS7_MCS4_JAGUAR 0x1a30 -+ #define REG_TX_AGC_D_MCS11_MCS8_JAGUAR 0x1a34 -+ #define REG_TX_AGC_D_MCS15_MCS12_JAGUAR 0x1a38 -+ #define REG_TX_AGC_D_NSS1_INDEX3_NSS1_INDEX0_JAGUAR 0x1a3c -+ #define REG_TX_AGC_D_NSS1_INDEX7_NSS1_INDEX4_JAGUAR 0x1a40 -+ #define REG_TX_AGC_D_NSS2_INDEX1_NSS1_INDEX8_JAGUAR 0x1a44 -+ #define REG_TX_AGC_D_NSS2_INDEX5_NSS2_INDEX2_JAGUAR 0x1a48 -+ #define REG_TX_AGC_D_NSS2_INDEX9_NSS2_INDEX6_JAGUAR 0x1a4c -+ #define REG_TX_AGC_D_MCS19_MCS16_JAGUAR 0x1ad8 -+ #define REG_TX_AGC_D_MCS23_MCS20_JAGUAR 0x1adc -+ #define REG_TX_AGC_D_NSS3_INDEX3_NSS3_INDEX0_JAGUAR 0x1ae0 -+ #define REG_TX_AGC_D_NSS3_INDEX7_NSS3_INDEX4_JAGUAR 0x1ae4 -+ #define REG_TX_AGC_D_NSS3_INDEX9_NSS3_INDEX8_JAGUAR 0x1ae8 -+ #endif -+ -+ #define is_tx_agc_byte0_jaguar 0xff -+ #define is_tx_agc_byte1_jaguar 0xff00 -+ #define is_tx_agc_byte2_jaguar 0xff0000 -+ #define is_tx_agc_byte3_jaguar 0xff000000 -+#if defined(CONFIG_WLAN_HAL_8198F) || defined(CONFIG_WLAN_HAL_8822CE) ||\ -+defined(CONFIG_WLAN_HAL_8814BE) || defined(CONFIG_WLAN_HAL_8812FE) ||\ -+defined(CONFIG_WLAN_HAL_8197G) -+ #define REG_TX_AGC_CCK_11_CCK_1_JAGUAR3 0x3a00 -+ #define REG_TX_AGC_OFDM_18_CCK_6_JAGUAR3 0x3a04 -+ #define REG_TX_AGC_OFDM_54_CCK_24_JAGUAR3 0x3a08 -+ #define REG_TX_AGC_MCS3_0_JAGUAR3 0x3a0c -+ #define REG_TX_AGC_MCS7_4_JAGUAR3 0x3a10 -+ #define REG_TX_AGC_MCS11_8_JAGUAR3 0x3a14 -+ #define REG_TX_AGC_MCS15_12_JAGUAR3 0x3a18 -+ #define REG_TX_AGC_MCS19_16_JAGUAR3 0x3a1c -+ #define REG_TX_AGC_MCS23_20_JAGUAR3 0x3a20 -+ #define REG_TX_AGC_MCS27_24_JAGUAR3 0x3a24 -+ #define REG_TX_AGC_MCS31_28_JAGUAR3 0x3a28 -+ #define REG_TX_AGC_VHT_Nss1_MCS3_0_JAGUAR3 0x3a2c -+ #define REG_TX_AGC_VHT_Nss1_MCS7_4_JAGUAR3 0x3a30 -+ #define REG_TX_AGC_VHT_NSS2_MCS1_NSS1_MCS8_JAGUAR3 0x3a34 -+ #define REG_TX_AGC_VHT_Nss2_MCS5_2_JAGUAR3 0x3a38 -+ #define REG_TX_AGC_VHT_Nss2_MCS9_6_JAGUAR3 0x3a3c -+ #define REG_TX_AGC_VHT_Nss3_MCS3_0_JAGUAR3 0x3a40 -+ #define REG_TX_AGC_VHT_Nss3_MCS7_4_JAGUAR3 0x3a44 -+ #define REG_TX_AGC_VHT_Nss4_MCS1_Nss3_MCS8_JAGUAR3 0x3a48 -+ #define REG_TX_AGC_VHT_Nss4_MCS5_2_JAGUAR3 0x3a4c -+ #define REG_TX_AGC_VHT_Nss4_MCS9_6_JAGUAR3 0x3a50 -+#endif -+#endif -+ -+#define BIT_FA_RESET BIT(0) -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_regdefine11ac.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_regdefine11ac.h -new file mode 100644 -index 000000000000..7824ac22ca21 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_regdefine11ac.h -@@ -0,0 +1,109 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __ODM_REGDEFINE11AC_H__ -+#define __ODM_REGDEFINE11AC_H__ -+ -+/* @2 RF REG LIST */ -+ -+ -+ -+/* @2 BB REG LIST */ -+/* PAGE 8 */ -+#define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 -+#define ODM_REG_BB_RX_PATH_11AC 0x808 -+#define ODM_REG_BB_TX_PATH_11AC 0x80c -+#define ODM_REG_BB_ATC_11AC 0x860 -+#define ODM_REG_EDCCA_POWER_CAL 0x8dc -+#define ODM_REG_DBG_RPT_11AC 0x8fc -+/* PAGE 9 */ -+#define ODM_REG_EDCCA_DOWN_OPT 0x900 -+#define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 -+#define odm_adc_trigger_jaguar2 0x95C /*@ADC sample mode*/ -+#define ODM_REG_OFDM_FA_RST_11AC 0x9A4 -+#define ODM_REG_CCX_PERIOD_11AC 0x990 -+#define ODM_REG_NHM_TH9_TH10_11AC 0x994 -+#define ODM_REG_CLM_11AC 0x994 -+#define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998 -+#define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c -+#define ODM_REG_NHM_TH8_11AC 0x9a0 -+#define ODM_REG_NHM_9E8_11AC 0x9e8 -+#define ODM_REG_CSI_CONTENT_VALUE 0x9b4 -+/* PAGE A */ -+#define ODM_REG_CCK_CCA_11AC 0xA0A -+#define ODM_REG_CCK_FA_RST_11AC 0xA2C -+#define ODM_REG_CCK_FA_11AC 0xA5C -+/* PAGE B */ -+#define ODM_REG_RST_RPT_11AC 0xB58 -+/* PAGE C */ -+#define ODM_REG_TRMUX_11AC 0xC08 -+#define ODM_REG_IGI_A_11AC 0xC50 -+/* PAGE E */ -+#define ODM_REG_IGI_B_11AC 0xE50 -+#define ODM_REG_ANT_11AC_B 0xE08 -+/* PAGE F */ -+#define ODM_REG_CCK_CRC32_CNT_11AC 0xF04 -+#define ODM_REG_CCK_CCA_CNT_11AC 0xF08 -+#define ODM_REG_VHT_CRC32_CNT_11AC 0xF0c -+#define ODM_REG_HT_CRC32_CNT_11AC 0xF10 -+#define ODM_REG_OFDM_CRC32_CNT_11AC 0xF14 -+#define ODM_REG_OFDM_FA_11AC 0xF48 -+#define ODM_REG_OFDM_FA_TYPE1_11AC 0xFCC -+#define ODM_REG_OFDM_FA_TYPE2_11AC 0xFD0 -+#define ODM_REG_OFDM_FA_TYPE3_11AC 0xFBC -+#define ODM_REG_OFDM_FA_TYPE4_11AC 0xFC0 -+#define ODM_REG_OFDM_FA_TYPE5_11AC 0xFC4 -+#define ODM_REG_OFDM_FA_TYPE6_11AC 0xFC8 -+#define ODM_REG_RPT_11AC 0xfa0 -+#define ODM_REG_CLM_RESULT_11AC 0xfa4 -+#define ODM_REG_NHM_CNT_11AC 0xfa8 -+#define ODM_REG_NHM_DUR_READY_11AC 0xfb4 -+ -+#define ODM_REG_NHM_CNT7_TO_CNT4_11AC 0xfac -+#define ODM_REG_NHM_CNT11_TO_CNT8_11AC 0xfb0 -+/* PAGE 18 */ -+#define ODM_REG_IGI_C_11AC 0x1850 -+/* PAGE 1A */ -+#define ODM_REG_IGI_D_11AC 0x1A50 -+ -+/* PAGE 1D */ -+#define ODM_REG_IGI_11AC3 0x1D70 -+ -+/* @2 MAC REG LIST */ -+#define ODM_REG_RESP_TX_11AC 0x6D8 -+ -+ -+ -+/* @DIG Related */ -+#define ODM_BIT_IGI_11AC 0x0000007F -+#define ODM_BIT_IGI_B_11AC3 0x00007F00 -+#define ODM_BIT_IGI_C_11AC3 0x007F0000 -+#define ODM_BIT_IGI_D_11AC3 0x7F000000 -+#define ODM_BIT_CCK_RPT_FORMAT_11AC BIT(16) -+#define ODM_BIT_BB_RX_PATH_11AC 0xF -+#define ODM_BIT_BB_TX_PATH_11AC 0xF -+#define ODM_BIT_BB_ATC_11AC BIT(14) -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_regdefine11n.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_regdefine11n.h -new file mode 100644 -index 000000000000..aa162327a5a4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_regdefine11n.h -@@ -0,0 +1,220 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __ODM_REGDEFINE11N_H__ -+#define __ODM_REGDEFINE11N_H__ -+ -+/* @2 RF REG LIST */ -+#define ODM_REG_RF_MODE_11N 0x00 -+#define ODM_REG_RF_0B_11N 0x0B -+#define ODM_REG_CHNBW_11N 0x18 -+#define ODM_REG_T_METER_11N 0x24 -+#define ODM_REG_RF_25_11N 0x25 -+#define ODM_REG_RF_26_11N 0x26 -+#define ODM_REG_RF_27_11N 0x27 -+#define ODM_REG_RF_2B_11N 0x2B -+#define ODM_REG_RF_2C_11N 0x2C -+#define ODM_REG_RXRF_A3_11N 0x3C -+#define ODM_REG_T_METER_92D_11N 0x42 -+#define ODM_REG_T_METER_88E_11N 0x42 -+#define ODM_REF_RF_DF_11N 0xDF -+ -+ -+ -+/* @2 BB REG LIST -+ * PAGE 8 -+ */ -+#define ODM_REG_BB_CTRL_11N 0x800 -+#define ODM_REG_RF_PIN_11N 0x804 -+#define ODM_REG_PSD_CTRL_11N 0x808 -+#define ODM_REG_TX_ANT_CTRL_11N 0x80C -+#define ODM_REG_BB_PWR_SAV5_11N 0x818 -+#define ODM_REG_CCK_RPT_FORMAT_11N 0x824 -+#define ODM_REG_CCK_RPT_FORMAT_11N_B 0x82C -+#define ODM_REG_RX_DEFAULT_A_11N 0x858 -+#define ODM_REG_RX_DEFAULT_B_11N 0x85A -+#define ODM_REG_BB_PWR_SAV3_11N 0x85C -+#define ODM_REG_ANTSEL_CTRL_11N 0x860 -+#define ODM_REG_RX_ANT_CTRL_11N 0x864 -+#define ODM_REG_PIN_CTRL_11N 0x870 -+#define ODM_REG_BB_PWR_SAV1_11N 0x874 -+#define ODM_REG_ANTSEL_PATH_11N 0x878 -+#define ODM_REG_BB_3WIRE_11N 0x88C -+#define ODM_REG_SC_CNT_11N 0x8C4 -+#define ODM_REG_PSD_DATA_11N 0x8B4 -+#define ODM_REG_CCX_PERIOD_11N 0x894 -+#define ODM_REG_NHM_TH9_TH10_11N 0x890 -+#define ODM_REG_CLM_11N 0x890 -+#define ODM_REG_NHM_TH3_TO_TH0_11N 0x898 -+#define ODM_REG_NHM_TH7_TO_TH4_11N 0x89c -+#define ODM_REG_NHM_TH8_11N 0xe28 -+#define ODM_REG_CLM_READY_11N 0x8b4 -+#define ODM_REG_CLM_RESULT_11N 0x8d0 -+#define ODM_REG_NHM_CNT_11N 0x8d8 -+ -+/* @For struct acs_info, Jeffery, 2014-12-26 */ -+#define ODM_REG_NHM_CNT7_TO_CNT4_11N 0x8dc -+#define ODM_REG_NHM_CNT9_TO_CNT8_11N 0x8d0 -+#define ODM_REG_NHM_CNT10_TO_CNT11_11N 0x8d4 -+ -+/* PAGE 9 */ -+#define ODM_REG_BB_CTRL_PAGE9_11N 0x900 -+#define ODM_REG_DBG_RPT_11N 0x908 -+#define ODM_REG_BB_TX_PATH_11N 0x90c -+#define ODM_REG_ANT_MAPPING1_11N 0x914 -+#define ODM_REG_ANT_MAPPING2_11N 0x918 -+#define ODM_REG_EDCCA_DOWN_OPT_11N 0x948 -+#define ODM_REG_RX_DFIR_MOD_97F 0x948 -+#define ODM_REG_SOML_97F 0x998 -+ -+/* PAGE A */ -+#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00 -+#define ODM_REG_CCK_ANT_SEL_11N 0xA04 -+#define ODM_REG_CCK_CCA_11N 0xA0A -+#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C -+#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10 -+#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14 -+#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22 -+#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23 -+#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24 -+#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25 -+#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26 -+#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27 -+#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28 -+#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29 -+#define ODM_REG_CCK_FA_RST_11N 0xA2C -+#define ODM_REG_CCK_FA_MSB_11N 0xA58 -+#define ODM_REG_CCK_FA_LSB_11N 0xA5C -+#define ODM_REG_CCK_CCA_CNT_11N 0xA60 -+#define ODM_REG_BB_PWR_SAV4_11N 0xA74 -+/* PAGE B */ -+#define ODM_REG_LNA_SWITCH_11N 0xB2C -+#define ODM_REG_PATH_SWITCH_11N 0xB30 -+#define ODM_REG_RSSI_CTRL_11N 0xB38 -+#define ODM_REG_CONFIG_ANTA_11N 0xB68 -+#define ODM_REG_RSSI_BT_11N 0xB9C -+#define ODM_REG_RXCK_RFMOD 0xBB0 -+#define ODM_REG_EDCCA_DCNF_97F 0xBC0 -+ -+/* PAGE C */ -+#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00 -+#define ODM_REG_BB_RX_PATH_11N 0xC04 -+#define ODM_REG_TRMUX_11N 0xC08 -+#define ODM_REG_OFDM_FA_RSTC_11N 0xC0C -+#define ODM_REG_DOWNSAM_FACTOR_11N 0xC10 -+#define ODM_REG_RXIQI_MATRIX_11N 0xC14 -+#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C -+#define ODM_REG_IGI_A_11N 0xC50 -+#define ODM_REG_ANTDIV_PARA2_11N 0xC54 -+#define ODM_REG_IGI_B_11N 0xC58 -+#define ODM_REG_ANTDIV_PARA3_11N 0xC5C -+#define ODM_REG_L1SBD_PD_CH_11N 0XC6C -+#define ODM_REG_BB_PWR_SAV2_11N 0xC70 -+#define ODM_REG_BB_AGC_SET_2_11N 0xc74 -+#define ODM_REG_RX_OFF_11N 0xC7C -+#define ODM_REG_TXIQK_MATRIXA_11N 0xC80 -+#define ODM_REG_TXIQK_MATRIXB_11N 0xC88 -+#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94 -+#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C -+#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0 -+#define ODM_REG_ANTDIV_PARA1_11N 0xCA4 -+#define ODM_REG_SMALL_BANDWIDTH_11N 0xCE4 -+#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0 -+/* PAGE D */ -+#define ODM_REG_OFDM_FA_RSTD_11N 0xD00 -+#define ODM_REG_BB_RX_ANT_11N 0xD04 -+#define ODM_REG_BB_ATC_11N 0xD2C -+#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0 -+#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4 -+#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8 -+#define ODM_REG_RPT_11N 0xDF4 -+/* PAGE E */ -+#define ODM_REG_TXAGC_A_6_18_11N 0xE00 -+#define ODM_REG_TXAGC_A_24_54_11N 0xE04 -+#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08 -+#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10 -+#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14 -+#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18 -+#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C -+#define ODM_REG_EDCCA_DCNF_11N 0xE24 -+#define ODM_REG_TAP_UPD_97F 0xE24 -+#define ODM_REG_FPGA0_IQK_11N 0xE28 -+#define ODM_REG_PAGE_B1_97F 0xE28 -+#define ODM_REG_TXIQK_TONE_A_11N 0xE30 -+#define ODM_REG_RXIQK_TONE_A_11N 0xE34 -+#define ODM_REG_TXIQK_PI_A_11N 0xE38 -+#define ODM_REG_RXIQK_PI_A_11N 0xE3C -+#define ODM_REG_TXIQK_11N 0xE40 -+#define ODM_REG_RXIQK_11N 0xE44 -+#define ODM_REG_IQK_AGC_PTS_11N 0xE48 -+#define ODM_REG_IQK_AGC_RSP_11N 0xE4C -+#define ODM_REG_BLUETOOTH_11N 0xE6C -+#define ODM_REG_RX_WAIT_CCA_11N 0xE70 -+#define ODM_REG_TX_CCK_RFON_11N 0xE74 -+#define ODM_REG_TX_CCK_BBON_11N 0xE78 -+#define ODM_REG_OFDM_RFON_11N 0xE7C -+#define ODM_REG_OFDM_BBON_11N 0xE80 -+#define ODM_REG_TX2RX_11N 0xE84 -+#define ODM_REG_TX2TX_11N 0xE88 -+#define ODM_REG_RX_CCK_11N 0xE8C -+#define ODM_REG_RX_OFDM_11N 0xED0 -+#define ODM_REG_RX_WAIT_RIFS_11N 0xED4 -+#define ODM_REG_RX2RX_11N 0xED8 -+#define ODM_REG_STANDBY_11N 0xEDC -+#define ODM_REG_SLEEP_11N 0xEE0 -+#define ODM_REG_PMPD_ANAEN_11N 0xEEC -+/* PAGE F */ -+#define ODM_REG_PAGE_F_RST_11N 0xF14 -+#define ODM_REG_IGI_C_11N 0xF84 -+#define ODM_REG_IGI_D_11N 0xF88 -+#define ODM_REG_CCK_CRC32_ERROR_CNT_11N 0xF84 -+#define ODM_REG_CCK_CRC32_OK_CNT_11N 0xF88 -+#define ODM_REG_HT_CRC32_CNT_11N 0xF90 -+#define ODM_REG_OFDM_CRC32_CNT_11N 0xF94 -+#define ODM_REG_HT_CRC32_CNT_11N_AGG 0xFB8 -+ -+/* @2 MAC REG LIST */ -+#define ODM_REG_BB_RST_11N 0x02 -+#define ODM_REG_ANTSEL_PIN_11N 0x4C -+#define ODM_REG_EARLY_MODE_11N 0x4D0 -+#define ODM_REG_RSSI_MONITOR_11N 0x4FE -+#define ODM_REG_EDCA_VO_11N 0x500 -+#define ODM_REG_EDCA_VI_11N 0x504 -+#define ODM_REG_EDCA_BE_11N 0x508 -+#define ODM_REG_EDCA_BK_11N 0x50C -+#define ODM_REG_TXPAUSE_11N 0x522 -+#define ODM_REG_RESP_TX_11N 0x6D8 -+#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0 -+#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4 -+ -+ -+/* @DIG Related */ -+#define ODM_BIT_IGI_11N 0x0000007F -+#define ODM_BIT_CCK_RPT_FORMAT_11N BIT(9) -+#define ODM_BIT_BB_RX_PATH_11N 0xF -+#define ODM_BIT_BB_TX_PATH_11N 0xF -+#define ODM_BIT_BB_ATC_11N BIT(11) -+#endif -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_regtable.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_regtable.h -new file mode 100644 -index 000000000000..8376d4adb73d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_regtable.h -@@ -0,0 +1,1109 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * -+ *****************************************************************************/ -+ -+#define R_0x0 0x0 -+#define R_0x00 0x00 -+#define R_0x08 0x08 -+#define R_0x0106 0x0106 -+#define R_0x0140 0x0140 -+#define R_0x0144 0x0144 -+#define R_0x0148 0x0148 -+#define R_0x040 0x040 -+#define R_0x10 0x10 -+#define R_0x100 0x100 -+#define R_0x1008 0x1008 -+#define R_0x1038 0x1038 -+#define R_0x103c 0x103c -+#define R_0x1040 0x1040 -+#define R_0x1048 0x1048 -+#define R_0x1080 0x1080 -+#define R_0x1208 0x1208 -+#define R_0x1210 0x1210 -+#define R_0x1214 0x1214 -+#define R_0x1218 0x1218 -+#define R_0x121c 0x121c -+#define R_0x14 0x14 -+#define R_0x14c0 0x14c0 -+#define R_0x14c4 0x14c4 -+#define R_0x14c8 0x14c8 -+#define R_0x14cc 0x14cc -+#define R_0x1518 0x1518 -+#define R_0x1684 0x1684 -+#define R_0x1688 0x1688 -+#define R_0x168c 0x168c -+#define R_0x1700 0x1700 -+#define R_0x1704 0x1704 -+#define R_0x1800 0x1800 -+#define R_0x1804 0x1804 -+#define R_0x1808 0x1808 -+#define R_0x180c 0x180c -+#define R_0x1810 0x1810 -+#define R_0x1814 0x1814 -+#define R_0x1818 0x1818 -+#define R_0x181c 0x181c -+#define R_0x1830 0x1830 -+#define R_0x1834 0x1834 -+#define R_0x1838 0x1838 -+#define R_0x183c 0x183c -+#define R_0x1840 0x1840 -+#define R_0x1844 0x1844 -+#define R_0x1848 0x1848 -+#define R_0x1860 0x1860 -+#define R_0x1864 0x1864 -+#define R_0x1868 0x1868 -+#define R_0x186c 0x186c -+#define R_0x1870 0x1870 -+#define R_0x1880 0x1880 -+#define R_0x1884 0x1884 -+#define R_0x188c 0x188c -+#define R_0x1894 0x1894 -+#define R_0x189c 0x189c -+#define R_0x18a0 0x18a0 -+#define R_0x18a4 0x18a4 -+#define R_0x18a8 0x18a8 -+#define R_0x18ac 0x18ac -+#define R_0x18e0 0x18e0 -+#define R_0x18e8 0x18e8 -+#define R_0x18ec 0x18ec -+#define R_0x18f0 0x18f0 -+#define R_0x18f8 0x18f8 -+#define R_0x18fc 0x18fc -+#define R_0x1900 0x1900 -+#define R_0x1904 0x1904 -+#define R_0x1908 0x1908 -+#define R_0x1910 0x1910 -+#define R_0x1918 0x1918 -+#define R_0x191c 0x191c -+#define R_0x1928 0x1928 -+#define R_0x1938 0x1938 -+#define R_0x1940 0x1940 -+#define R_0x1944 0x1944 -+#define R_0x1950 0x1950 -+#define R_0x1954 0x1954 -+#define R_0x195c 0x195c -+#define R_0x1970 0x1970 -+#define R_0x1984 0x1984 -+#define R_0x1988 0x1988 -+#define R_0x198c 0x198c -+#define R_0x1990 0x1990 -+#define R_0x1991 0x1991 -+#define R_0x1998 0x1998 -+#define R_0x19a8 0x19a8 -+#define R_0x19b8 0x19b8 -+#define R_0x19d4 0x19d4 -+#define R_0x19d8 0x19d8 -+#define R_0x19e0 0x19e0 -+#define R_0x19f0 0x19f0 -+#define R_0x19f8 0x19f8 -+#define R_0x1a00 0x1a00 -+#define R_0x1a04 0x1a04 -+#define R_0x1a08 0x1a08 -+#define R_0x1a0c 0x1a0c -+#define R_0x1a10 0x1a10 -+#define R_0x1a14 0x1a14 -+#define R_0x1a18 0x1a18 -+#define R_0x1a1c 0x1a1c -+#define R_0x1a20 0x1a20 -+#define R_0x1a24 0x1a24 -+#define R_0x1a28 0x1a28 -+#define R_0x1a2c 0x1a2c -+#define R_0x1a30 0x1a30 -+#define R_0x1a34 0x1a34 -+#define R_0x1a38 0x1a38 -+#define R_0x1a5c 0x1a5c -+#define R_0x1a70 0x1a70 -+#define R_0x1a74 0x1a74 -+#define R_0x1a80 0x1a80 -+#define R_0x1a84 0x1a84 -+#define R_0x1a8c 0x1a8c -+#define R_0x1a94 0x1a94 -+#define R_0x1a98 0x1a98 -+#define R_0x1a9c 0x1a9c -+#define R_0x1aa0 0x1aa0 -+#define R_0x1aa8 0x1aa8 -+#define R_0x1aac 0x1aac -+#define R_0x1ab0 0x1ab0 -+#define R_0x1abc 0x1abc -+#define R_0x1ac0 0x1ac0 -+#define R_0x1ac8 0x1ac8 -+#define R_0x1acc 0x1acc -+#define R_0x1ad0 0x1ad0 -+#define R_0x1ad4 0x1ad4 -+#define R_0x1ae0 0x1ae0 -+#define R_0x1ae8 0x1ae8 -+#define R_0x1aec 0x1aec -+#define R_0x1b00 0x1b00 -+#define R_0x1b04 0x1b04 -+#define R_0x1b08 0x1b08 -+#define R_0x1b0c 0x1b0c -+#define R_0x1b10 0x1b10 -+#define R_0x1b14 0x1b14 -+#define R_0x1b18 0x1b18 -+#define R_0x1b1c 0x1b1c -+#define R_0x1b20 0x1b20 -+#define R_0x1b23 0x1b23 -+#define R_0x1b24 0x1b24 -+#define R_0x1b28 0x1b28 -+#define R_0x1b2c 0x1b2c -+#define R_0x1b30 0x1b30 -+#define R_0x1b34 0x1b34 -+#define R_0x1b38 0x1b38 -+#define R_0x1b3c 0x1b3c -+#define R_0x1b40 0x1b40 -+#define R_0x1b44 0x1b44 -+#define R_0x1b48 0x1b48 -+#define R_0x1b4c 0x1b4c -+#define R_0x1b50 0x1b50 -+#define R_0x1b54 0x1b54 -+#define R_0x1b58 0x1b58 -+#define R_0x1b5c 0x1b5c -+#define R_0x1b60 0x1b60 -+#define R_0x1b64 0x1b64 -+#define R_0x1b67 0x1b67 -+#define R_0x1b68 0x1b68 -+#define R_0x1b6c 0x1b6c -+#define R_0x1b70 0x1b70 -+#define R_0x1b74 0x1b74 -+#define R_0x1b78 0x1b78 -+#define R_0x1b7c 0x1b7c -+#define R_0x1b80 0x1b80 -+#define R_0x1b83 0x1b83 -+#define R_0x1b84 0x1b84 -+#define R_0x1b88 0x1b88 -+#define R_0x1b8c 0x1b8c -+#define R_0x1b90 0x1b90 -+#define R_0x1b92 0x1b92 -+#define R_0x1b94 0x1b94 -+#define R_0x1b97 0x1b97 -+#define R_0x1b98 0x1b98 -+#define R_0x1b9c 0x1b9c -+#define R_0x1ba0 0x1ba0 -+#define R_0x1ba4 0x1ba4 -+#define R_0x1ba8 0x1ba8 -+#define R_0x1bac 0x1bac -+#define R_0x1bb0 0x1bb0 -+#define R_0x1bb4 0x1bb4 -+#define R_0x1bb8 0x1bb8 -+#define R_0x1bbc 0x1bbc -+#define R_0x1bc0 0x1bc0 -+#define R_0x1bc8 0x1bc8 -+#define R_0x1bca 0x1bca -+#define R_0x1bcb 0x1bcb -+#define R_0x1bcc 0x1bcc -+#define R_0x1bce 0x1bce -+#define R_0x1bd0 0x1bd0 -+#define R_0x1bd4 0x1bd4 -+#define R_0x1bd6 0x1bd6 -+#define R_0x1bd8 0x1bd8 -+#define R_0x1bdc 0x1bdc -+#define R_0x1be3 0x1be3 -+#define R_0x1be4 0x1be4 -+#define R_0x1be8 0x1be8 -+#define R_0x1beb 0x1beb -+#define R_0x1bec 0x1bec -+#define R_0x1bef 0x1bef -+#define R_0x1bf0 0x1bf0 -+#define R_0x1bf4 0x1bf4 -+#define R_0x1bf8 0x1bf8 -+#define R_0x1bfc 0x1bfc -+#define R_0x1c 0x1c -+#define R_0x1c20 0x1c20 -+#define R_0x1c24 0x1c24 -+#define R_0x1c28 0x1c28 -+#define R_0x1c2c 0x1c2c -+#define R_0x1c30 0x1c30 -+#define R_0x1c34 0x1c34 -+#define R_0x1c38 0x1c38 -+#define R_0x1c3c 0x1c3c -+#define R_0x1c64 0x1c64 -+#define R_0x1c68 0x1c68 -+#define R_0x1c6c 0x1c6c -+#define R_0x1c74 0x1c74 -+#define R_0x1c78 0x1c78 -+#define R_0x1c7c 0x1c7c -+#define R_0x1c80 0x1c80 -+#define R_0x1c90 0x1c90 -+#define R_0x1c94 0x1c94 -+#define R_0x1c98 0x1c98 -+#define R_0x1c9c 0x1c9c -+#define R_0x1ca0 0x1ca0 -+#define R_0x1ca4 0x1ca4 -+#define R_0x1cb0 0x1cb0 -+#define R_0x1cb8 0x1cb8 -+#define R_0x1cbc 0x1cbc -+#define R_0x1cc0 0x1cc0 -+#define R_0x1cd0 0x1cd0 -+#define R_0x1cd8 0x1cd8 -+#define R_0x1ce4 0x1ce4 -+#define R_0x1ce8 0x1ce8 -+#define R_0x1cec 0x1cec -+#define R_0x1cf0 0x1cf0 -+#define R_0x1cf4 0x1cf4 -+#define R_0x1cf8 0x1cf8 -+#define R_0x1d04 0x1d04 -+#define R_0x1d08 0x1d08 -+#define R_0x1d0c 0x1d0c -+#define R_0x1d10 0x1d10 -+#define R_0x1d2c 0x1d2c -+#define R_0x1d30 0x1d30 -+#define R_0x1d3c 0x1d3c -+#define R_0x1d40 0x1d40 -+#define R_0x1d44 0x1d44 -+#define R_0x1d48 0x1d48 -+#define R_0x1d58 0x1d58 -+#define R_0x1d60 0x1d60 -+#define R_0x1d6c 0x1d6c -+#define R_0x1d70 0x1d70 -+#define R_0x1d90 0x1d90 -+#define R_0x1d94 0x1d94 -+#define R_0x1d9c 0x1d9c -+#define R_0x1da4 0x1da4 -+#define R_0x1da8 0x1da8 -+#define R_0x1de8 0x1de8 -+#define R_0x1e14 0x1e14 -+#define R_0x1e18 0x1e18 -+#define R_0x1e1c 0x1e1c -+#define R_0x1e24 0x1e24 -+#define R_0x1e28 0x1e28 -+#define R_0x1e2c 0x1e2c -+#define R_0x1e28 0x1e28 -+#define R_0x1e30 0x1e30 -+#define R_0x1e40 0x1e40 -+#define R_0x1e44 0x1e44 -+#define R_0x1e48 0x1e48 -+#define R_0x1e4c 0x1e4c -+#define R_0x1e50 0x1e50 -+#define R_0x1e54 0x1e54 -+#define R_0x1e58 0x1e58 -+#define R_0x1e5c 0x1e5c -+#define R_0x1e60 0x1e60 -+#define R_0x1e64 0x1e64 -+#define R_0x1e68 0x1e68 -+#define R_0x1e6c 0x1e6c -+#define R_0x1e70 0x1e70 -+#define R_0x1e7c 0x1e7c -+#define R_0x1e80 0x1e80 -+#define R_0x1e84 0x1e84 -+#define R_0x1e88 0x1e88 -+#define R_0x1e8c 0x1e8c -+#define R_0x1ea4 0x1ea4 -+#define R_0x1eb4 0x1eb4 -+#define R_0x1eb8 0x1eb8 -+#define R_0x1ed4 0x1ed4 -+#define R_0x1ed8 0x1ed8 -+#define R_0x1edc 0x1edc -+#define R_0x1ee0 0x1ee0 -+#define R_0x1ee4 0x1ee4 -+#define R_0x1ee8 0x1ee8 -+#define R_0x1eec 0x1eec -+#define R_0x1ef0 0x1ef0 -+#define R_0x1ef4 0x1ef4 -+#define R_0x1ef8 0x1ef8 -+#define R_0x1efc 0x1efc -+#define R_0x1f80 0x1f80 -+#define R_0x1f98 0x1f98 -+#define R_0x24 0x24 -+#define R_0x28 0x28 -+#define R_0x2a00 0x2a00 -+#define R_0x2a04 0x2a04 -+#define R_0x2a08 0x2a08 -+#define R_0x2a24 0x2a24 -+#define R_0x2a38 0x2a38 -+#define R_0x2a3c 0x2a3c -+#define R_0x2a44 0x2a44 -+#define R_0x2aa0 0x2aa0 -+#define R_0x2aa8 0x2aa8 -+#define R_0x2aac 0x2aac -+#define R_0x2ad0 0x2ad0 -+#define R_0x2c 0x2c -+#define R_0x28a4 0x28a4 -+#define R_0x2c04 0x2c04 -+#define R_0x2c08 0x2c08 -+#define R_0x2c0c 0x2c0c -+#define R_0x2c10 0x2c10 -+#define R_0x2c14 0x2c14 -+#define R_0x2c18 0x2c18 -+#define R_0x2c1c 0x2c1c -+#define R_0x2c20 0x2c20 -+#define R_0x2c2c 0x2c2c -+#define R_0x2c30 0x2c30 -+#define R_0x2c34 0x2c34 -+#define R_0x2c54 0x2c54 -+#define R_0x2d00 0x2d00 -+#define R_0x2d04 0x2d04 -+#define R_0x2d08 0x2d08 -+#define R_0x2d0c 0x2d0c -+#define R_0x2d10 0x2d10 -+#define R_0x2d20 0x2d20 -+#define R_0x2d38 0x2d38 -+#define R_0x2d40 0x2d40 -+#define R_0x2d44 0x2d44 -+#define R_0x2d48 0x2d48 -+#define R_0x2d4c 0x2d4c -+#define R_0x2d6c 0x2d6c -+#define R_0x2d84 0x2d84 -+#define R_0x2d88 0x2d88 -+#define R_0x2d90 0x2d90 -+#define R_0x2d9c 0x2d9c -+#define R_0x2db4 0x2db4 -+#define R_0x2db8 0x2db8 -+#define R_0x2dbc 0x2dbc -+#define R_0x2de0 0x2de0 -+#define R_0x2de4 0x2de4 -+#define R_0x2de8 0x2de8 -+#define R_0x2e00 0x2e00 -+#define R_0x2e20 0x2e20 -+#define R_0x2e60 0x2e60 -+#define R_0x2e64 0x2e64 -+#define R_0x2e68 0x2e68 -+#define R_0x2e6c 0x2e6c -+#define R_0x2e70 0x2e70 -+#define R_0x2e74 0x2e74 -+#define R_0x2e78 0x2e78 -+#define R_0x2e7c 0x2e7c -+#define R_0x2e80 0x2e80 -+#define R_0x300 0x300 -+#define R_0x38 0x38 -+#define R_0x3a00 0x3a00 -+#define R_0x3a04 0x3a04 -+#define R_0x3a08 0x3a08 -+#define R_0x3a0c 0x3a0c -+#define R_0x3a10 0x3a10 -+#define R_0x3a14 0x3a14 -+#define R_0x3a18 0x3a18 -+#define R_0x3a1c 0x3a1c -+#define R_0x3a20 0x3a20 -+#define R_0x3a24 0x3a24 -+#define R_0x3a28 0x3a28 -+#define R_0x3a2c 0x3a2c -+#define R_0x3a30 0x3a30 -+#define R_0x3a34 0x3a34 -+#define R_0x3a38 0x3a38 -+#define R_0x3a3c 0x3a3c -+#define R_0x3a40 0x3a40 -+#define R_0x3a44 0x3a44 -+#define R_0x3a48 0x3a48 -+#define R_0x3a4c 0x3a4c -+#define R_0x3a50 0x3a50 -+#define R_0x3a54 0x3a54 -+#define R_0x3a58 0x3a58 -+#define R_0x3a5c 0x3a5c -+#define R_0x3a60 0x3a60 -+#define R_0x3a64 0x3a64 -+#define R_0x3a68 0x3a68 -+#define R_0x3a6c 0x3a6c -+#define R_0x3a70 0x3a70 -+#define R_0x3a74 0x3a74 -+#define R_0x3a78 0x3a78 -+#define R_0x3a7c 0x3a7c -+#define R_0x3a80 0x3a80 -+#define R_0x3a84 0x3a84 -+#define R_0x3a88 0x3a88 -+#define R_0x3a8c 0x3a8c -+#define R_0x3a90 0x3a90 -+#define R_0x3a94 0x3a94 -+#define R_0x3a98 0x3a98 -+#define R_0x3a9c 0x3a9c -+#define R_0x3aa0 0x3aa0 -+#define R_0x3aa4 0x3aa4 -+#define R_0x3c00 0x3c00 -+#define R_0x40 0x40 -+#define R_0x4000 0x4000 -+#define R_0x4008 0x4008 -+#define R_0x4018 0x4018 -+#define R_0x401c 0x401c -+#define R_0x4028 0x4028 -+#define R_0x4040 0x4040 -+#define R_0x4044 0x4044 -+#define R_0x4100 0x4100 -+#define R_0x4104 0x4104 -+#define R_0x4108 0x4108 -+#define R_0x410c 0x410c -+#define R_0x4110 0x4110 -+#define R_0x4114 0x4114 -+#define R_0x4118 0x4118 -+#define R_0x411c 0x411c -+#define R_0x4130 0x4130 -+#define R_0x4134 0x4134 -+#define R_0x4138 0x4138 -+#define R_0x413c 0x413c -+#define R_0x4140 0x4140 -+#define R_0x4144 0x4144 -+#define R_0x4148 0x4148 -+#define R_0x4160 0x4160 -+#define R_0x4164 0x4164 -+#define R_0x4168 0x4168 -+#define R_0x416c 0x416c -+#define R_0x4180 0x4180 -+#define R_0x419c 0x419c -+#define R_0x41a0 0x41a0 -+#define R_0x41a4 0x41a4 -+#define R_0x41a8 0x41a8 -+#define R_0x41ac 0x41ac -+#define R_0x41e0 0x41e0 -+#define R_0x41e8 0x41e8 -+#define R_0x41ec 0x41ec -+#define R_0x41f0 0x41f0 -+#define R_0x41f8 0x41f8 -+#define R_0x41fc 0x41fc -+#define R_0x42 0x42 -+#define R_0x430 0x430 -+#define R_0x434 0x434 -+#define R_0x42b0 0x42b0 -+#define R_0x42b4 0x42b4 -+#define R_0x4300 0x4300 -+#define R_0x4304 0x4304 -+#define R_0x4308 0x4308 -+#define R_0x430c 0x430c -+#define R_0x4310 0x4310 -+#define R_0x4314 0x4314 -+#define R_0x4318 0x4318 -+#define R_0x431c 0x431c -+#define R_0x4320 0x4320 -+#define R_0x4324 0x4324 -+#define R_0x4328 0x4328 -+#define R_0x432c 0x432c -+#define R_0x4330 0x4330 -+#define R_0x4334 0x4334 -+#define R_0x4338 0x4338 -+#define R_0x433c 0x433c -+#define R_0x4340 0x4340 -+#define R_0x4344 0x4344 -+#define R_0x4348 0x4348 -+#define R_0x434c 0x434c -+#define R_0x4350 0x4350 -+#define R_0x4354 0x4354 -+#define R_0x4358 0x4358 -+#define R_0x435c 0x435c -+#define R_0x4360 0x4360 -+#define R_0x4364 0x4364 -+#define R_0x4368 0x4368 -+#define R_0x436c 0x436c -+#define R_0x4370 0x4370 -+#define R_0x4374 0x4374 -+#define R_0x4378 0x4378 -+#define R_0x437c 0x437c -+#define R_0x4380 0x4380 -+#define R_0x4384 0x4384 -+#define R_0x4388 0x4388 -+#define R_0x438c 0x438c -+#define R_0x4390 0x4390 -+#define R_0x4394 0x4394 -+#define R_0x4398 0x4398 -+#define R_0x439c 0x439c -+#define R_0x43a0 0x43a0 -+#define R_0x43a4 0x43a4 -+#define R_0x43a8 0x43a8 -+#define R_0x43ac 0x43ac -+#define R_0x43b0 0x43b0 -+#define R_0x43b4 0x43b4 -+#define R_0x43b8 0x43b8 -+#define R_0x44 0x44 -+#define R_0x440 0x440 -+#define R_0x444 0x444 -+#define R_0x448 0x448 -+#define R_0x450 0x450 -+#define R_0x454 0x454 -+#define R_0x494 0x494 -+#define R_0x498 0x498 -+#define R_0x49c 0x49c -+#define R_0x4a0 0x4a0 -+#define R_0x4a4 0x4a4 -+#define R_0x4a8 0x4a8 -+#define R_0x4c 0x4c -+#define R_0x4c8 0x4c8 -+#define R_0x4cc 0x4cc -+#define R_0x45a4 0x45a4 -+#define R_0x4c00 0x4c00 -+#define R_0x5000 0x5000 -+#define R_0x5008 0x5008 -+#define R_0x5018 0x5018 -+#define R_0x501c 0x501c -+#define R_0x5028 0x5028 -+#define R_0x5040 0x5040 -+#define R_0x5044 0x5044 -+#define R_0x5100 0x5100 -+#define R_0x5108 0x5108 -+#define R_0x5118 0x5118 -+#define R_0x511c 0x511c -+#define R_0x5128 0x5128 -+#define R_0x5140 0x5140 -+#define R_0x5144 0x5144 -+#define R_0x520 0x520 -+#define R_0x5200 0x5200 -+#define R_0x520c 0x520c -+#define R_0x522 0x522 -+#define R_0x524 0x524 -+#define R_0x5230 0x5230 -+#define R_0x5234 0x5234 -+#define R_0x5238 0x5238 -+#define R_0x523c 0x523c -+#define R_0x5240 0x5240 -+#define R_0x5244 0x5244 -+#define R_0x5248 0x5248 -+#define R_0x526c 0x526c -+#define R_0x5280 0x5280 -+#define R_0x52a0 0x52a0 -+#define R_0x52a4 0x52a4 -+#define R_0x52ac 0x52ac -+#define R_0x52e8 0x52e8 -+#define R_0x5300 0x5300 -+#define R_0x530c 0x530c -+#define R_0x5330 0x5330 -+#define R_0x5334 0x5334 -+#define R_0x5338 0x5338 -+#define R_0x533c 0x533c -+#define R_0x5340 0x5340 -+#define R_0x5344 0x5344 -+#define R_0x5348 0x5348 -+#define R_0x536c 0x536c -+#define R_0x5380 0x5380 -+#define R_0x53a0 0x53a0 -+#define R_0x53a4 0x53a4 -+#define R_0x53ac 0x53ac -+#define R_0x53e8 0x53e8 -+#define R_0x550 0x550 -+#define R_0x551 0x551 -+#define R_0x568 0x568 -+#define R_0x588 0x588 -+#define R_0x60 0x60 -+#define R_0x604 0x604 -+#define R_0x608 0x608 -+#define R_0x60c 0x60c -+#define R_0x60f 0x60f -+#define R_0x64 0x64 -+#define R_0x66 0x66 -+#define R_0x660 0x660 -+#define R_0x668 0x668 -+#define R_0x688 0x688 -+#define R_0x6a0 0x6a0 -+#define R_0x6d8 0x6d8 -+#define R_0x6dc 0x6dc -+#define R_0x6f8 0x6f8 -+#define R_0x70 0x70 -+#define R_0x74 0x74 -+#define R_0x700 0x700 -+#define R_0x71c 0x71c -+#define R_0x72c 0x72c -+#define R_0x764 0x764 -+#define R_0x7b0 0x7b0 -+#define R_0x7b4 0x7b4 -+#define R_0x7c0 0x7c0 -+#define R_0x7c4 0x7c4 -+#define R_0x7c8 0x7c8 -+#define R_0x7cc 0x7cc -+#define R_0x7f0 0x7f0 -+#define R_0x7f4 0x7f4 -+#define R_0x7f8 0x7f8 -+#define R_0x7fc 0x7fc -+#define R_0x800 0x800 -+#define R_0x8000 0x8000 -+#define R_0x804 0x804 -+#define R_0x808 0x808 -+#define R_0x80c 0x80c -+#define R_0x810 0x810 -+#define R_0x814 0x814 -+#define R_0x818 0x818 -+#define R_0x81c 0x81c -+#define R_0x820 0x820 -+#define R_0x824 0x824 -+#define R_0x828 0x828 -+#define R_0x82c 0x82c -+#define R_0x830 0x830 -+#define R_0x834 0x834 -+#define R_0x838 0x838 -+#define R_0x83c 0x83c -+#define R_0x840 0x840 -+#define R_0x844 0x840 -+#define R_0x848 0x848 -+#define R_0x84c 0x84c -+#define R_0x850 0x850 -+#define R_0x854 0x854 -+#define R_0x858 0x858 -+#define R_0x85c 0x85c -+#define R_0x860 0x860 -+#define R_0x864 0x864 -+#define R_0x868 0x868 -+#define R_0x86c 0x86c -+#define R_0x870 0x870 -+#define R_0x874 0x874 -+#define R_0x878 0x878 -+#define R_0x87c 0x87c -+#define R_0x880 0x880 -+#define R_0x884 0x884 -+#define R_0x888 0x888 -+#define R_0x88c 0x88c -+#define R_0x890 0x890 -+#define R_0x894 0x894 -+#define R_0x898 0x898 -+#define R_0x89c 0x89c -+#define R_0x8a0 0x8a0 -+#define R_0x8a4 0x8a4 -+#define R_0x8ac 0x8ac -+#define R_0x8b4 0x8b4 -+#define R_0x8b8 0x8b8 -+#define R_0x8c0 0x8c0 -+#define R_0x8c4 0x8c4 -+#define R_0x8c8 0x8c8 -+#define R_0x8cc 0x8cc -+#define R_0x8d0 0x8d0 -+#define R_0x8d4 0x8d4 -+#define R_0x8d8 0x8d8 -+#define R_0x8dc 0x8dc -+#define R_0x8f0 0x8f0 -+#define R_0x8f8 0x8f8 -+#define R_0x8fc 0x8fc -+#define R_0x900 0x900 -+#define R_0x908 0x908 -+#define R_0x90c 0x90c -+#define R_0x910 0x910 -+#define R_0x914 0x914 -+#define R_0x918 0x918 -+#define R_0x91c 0x91c -+#define R_0x920 0x920 -+#define R_0x924 0x924 -+#define R_0x92c 0x92c -+#define R_0x930 0x930 -+#define R_0x934 0x934 -+#define R_0x938 0x938 -+#define R_0x93c 0x93c -+#define R_0x940 0x940 -+#define R_0x944 0x944 -+#define R_0x948 0x948 -+#define R_0x94c 0x94c -+#define R_0x950 0x950 -+#define R_0x954 0x954 -+#define R_0x958 0x958 -+#define R_0x95c 0x95c -+#define R_0x960 0x960 -+#define R_0x964 0x964 -+#define R_0x968 0x968 -+#define R_0x970 0x970 -+#define R_0x974 0x974 -+#define R_0x978 0x978 -+#define R_0x97c 0x97c -+#define R_0x980 0x980 -+#define R_0x988 0x988 -+#define R_0x98c 0x98c -+#define R_0x990 0x990 -+#define R_0x994 0x994 -+#define R_0x998 0x998 -+#define R_0x99c 0x99c -+#define R_0x9a0 0x9a0 -+#define R_0x9a4 0x9a4 -+#define R_0x9ac 0x9ac -+#define R_0x9b0 0x9b0 -+#define R_0x9b4 0x9b4 -+#define R_0x9b8 0x9b8 -+#define R_0x9cc 0x9cc -+#define R_0x9d0 0x9d0 -+#define R_0x9d8 0x9d8 -+#define R_0x9e4 0x9e4 -+#define R_0x9e8 0x9e8 -+#define R_0x9f0 0x9f0 -+#define R_0xa0 0xa0 -+#define R_0xa00 0xa00 -+#define R_0xa04 0xa04 -+#define R_0xa08 0xa08 -+#define R_0xa0a 0xa0a -+#define R_0xa0c 0xa0c -+#define R_0xa10 0xa10 -+#define R_0xa14 0xa14 -+#define R_0xa20 0xa20 -+#define R_0xa24 0xa24 -+#define R_0xa28 0xa28 -+#define R_0xa2c 0xa2c -+#define R_0xa40 0xa40 -+#define R_0xa44 0xa44 -+#define R_0xa48 0xa48 -+#define R_0xa4c 0xa4c -+#define R_0xa50 0xa50 -+#define R_0xa54 0xa54 -+#define R_0xa58 0xa58 -+#define R_0xa68 0xa68 -+#define R_0xa6c 0xa6c -+#define R_0xa70 0xa70 -+#define R_0xa74 0xa74 -+#define R_0xa78 0xa78 -+#define R_0xa8 0xa8 -+#define R_0xa80 0xa80 -+#define R_0xa84 0xa84 -+#define R_0xa98 0xa98 -+#define R_0xa9c 0xa9c -+#define R_0xaa8 0xaa8 -+#define R_0xaac 0xaac -+#define R_0xab4 0xab4 -+#define R_0xabc 0xabc -+#define R_0xac 0xac -+#define R_0xac8 0xac8 -+#define R_0xacc 0xacc -+#define R_0xad0 0xad0 -+#define R_0xb0 0xb0 -+#define R_0xb00 0xb00 -+#define R_0xb04 0xb04 -+#define R_0xb07 0xb07 -+#define R_0xb08 0xb08 -+#define R_0xb0c 0xb0c -+#define R_0xb10 0xb10 -+#define R_0xb14 0xb14 -+#define R_0xb18 0xb18 -+#define R_0xb1c 0xb1c -+#define R_0xb20 0xb20 -+#define R_0xb24 0xb24 -+#define R_0xb28 0xb28 -+#define R_0xb2a 0xb2a -+#define R_0xb2b 0xb2b -+#define R_0xb2c 0xb2c -+#define R_0xb30 0xb30 -+#define R_0xb34 0xb34 -+#define R_0xb38 0xb38 -+#define R_0xb3b 0xb3b -+#define R_0xb3c 0xb3c -+#define R_0xb40 0xb40 -+#define R_0xb44 0xb44 -+#define R_0xb48 0xb48 -+#define R_0xb54 0xb54 -+#define R_0xb58 0xb58 -+#define R_0xb60 0xb60 -+#define R_0xb64 0xb64 -+#define R_0xb68 0xb68 -+#define R_0xb6a 0xb6a -+#define R_0xb6b 0xb6b -+#define R_0xb6c 0xb6c -+#define R_0xb6e 0xb6e -+#define R_0xb70 0xb70 -+#define R_0xb74 0xb74 -+#define R_0xb77 0xb77 -+#define R_0xb78 0xb78 -+#define R_0xb7c 0xb7c -+#define R_0xb80 0xb80 -+#define R_0xb84 0xb84 -+#define R_0xb88 0xb88 -+#define R_0xb8c 0xb8c -+#define R_0xb90 0xb90 -+#define R_0xb94 0xb94 -+#define R_0xb98 0xb98 -+#define R_0xb9b 0xb9b -+#define R_0xb9c 0xb9c -+#define R_0xba0 0xba0 -+#define R_0xba4 0xba4 -+#define R_0xba8 0xba8 -+#define R_0xbac 0xbac -+#define R_0xbad 0xbad -+#define R_0xbc0 0xbc0 -+#define R_0xbc4 0xbc4 -+#define R_0xbc8 0xbc8 -+#define R_0xbcc 0xbcc -+#define R_0xbd8 0xbd8 -+#define R_0xbdc 0xbdc -+#define R_0xbe0 0xbe0 -+#define R_0xbe4 0xbe4 -+#define R_0xbe8 0xbe8 -+#define R_0xbec 0xbec -+#define R_0xbf0 0xbf0 -+#define R_0xbf4 0xbf4 -+#define R_0xbf8 0xbf8 -+#define R_0xc00 0xc00 -+#define R_0xc04 0xc04 -+#define R_0xc08 0xc08 -+#define R_0xc0c 0xc0c -+#define R_0xc10 0xc10 -+#define R_0xc14 0xc14 -+#define R_0xc18 0xc18 -+#define R_0xc1c 0xc1c -+#define R_0xc20 0xc20 -+#define R_0xc24 0xc24 -+#define R_0xc2c 0xc2c -+#define R_0xc30 0xc30 -+#define R_0xc34 0xc34 -+#define R_0xc38 0xc38 -+#define R_0xc3c 0xc3c -+#define R_0xc40 0xc40 -+#define R_0xc44 0xc44 -+#define R_0xc4c 0xc4c -+#define R_0xc50 0xc50 -+#define R_0xc54 0xc54 -+#define R_0xc58 0xc58 -+#define R_0xc5c 0xc5c -+#define R_0xc6c 0xc6c -+#define R_0xc70 0xc70 -+#define R_0xc74 0xc74 -+#define R_0xc78 0xc78 -+#define R_0xc7c 0xc7c -+#define R_0xc80 0xc80 -+#define R_0xc84 0xc84 -+#define R_0xc88 0xc88 -+#define R_0xc8c 0xc8c -+#define R_0xc90 0xc90 -+#define R_0xc94 0xc94 -+#define R_0xc9c 0xc9c -+#define R_0xca0 0xca0 -+#define R_0xca4 0xca4 -+#define R_0xca8 0xca8 -+#define R_0xcac 0xcac -+#define R_0xcb0 0xcb0 -+#define R_0xcb4 0xcb4 -+#define R_0xcb8 0xcb8 -+#define R_0xcbc 0xcbc -+#define R_0xcbd 0xcbd -+#define R_0xcbe 0xcbe -+#define R_0xcc0 0xcc0 -+#define R_0xcc4 0xcc4 -+#define R_0xcc8 0xcc8 -+#define R_0xccc 0xccc -+#define R_0xcd0 0xcd0 -+#define R_0xcd4 0xcd4 -+#define R_0xcd8 0xcd8 -+#define R_0xce0 0xce0 -+#define R_0xce4 0xce4 -+#define R_0xce8 0xce8 -+#define R_0xd00 0xd00 -+#define R_0xd04 0xd04 -+#define R_0xd08 0xd08 -+#define R_0xd0c 0xd0c -+#define R_0xd10 0xd10 -+#define R_0xd14 0xd14 -+#define R_0xd2c 0xd2c -+#define R_0xd30 0xd30 -+#define R_0xd40 0xd40 -+#define R_0xd44 0xd44 -+#define R_0xd48 0xd48 -+#define R_0xd4c 0xd4c -+#define R_0xd50 0xd50 -+#define R_0xd54 0xd54 -+#define R_0xd5c 0xd5c -+#define R_0xd6c 0xd6c -+#define R_0xd7c 0xd7c -+#define R_0xd80 0xd80 -+#define R_0xd84 0xd84 -+#define R_0xd8c 0xd8c -+#define R_0xd90 0xd90 -+#define R_0xd94 0xd94 -+#define R_0xdac 0xdac -+#define R_0xdb0 0xdb0 -+#define R_0xdb4 0xdb4 -+#define R_0xdb8 0xdb8 -+#define R_0xdbc 0xdbc -+#define R_0xdc 0xdc -+#define R_0xdcc 0xdcc -+#define R_0xdd0 0xdd0 -+#define R_0xdd4 0xdd4 -+#define R_0xdd8 0xdd8 -+#define R_0xde0 0xde0 -+#define R_0xdec 0xdec -+#define R_0xdf4 0xdf4 -+#define R_0xe00 0xe00 -+#define R_0xe04 0xe04 -+#define R_0xe08 0xe08 -+#define R_0xe10 0xe10 -+#define R_0xe14 0xe14 -+#define R_0xe18 0xe18 -+#define R_0xe1c 0xe1c -+#define R_0xe20 0xe20 -+#define R_0xe24 0xe24 -+#define R_0xe28 0xe28 -+#define R_0xe30 0xe30 -+#define R_0xe34 0xe34 -+#define R_0xe38 0xe38 -+#define R_0xe3c 0xe3c -+#define R_0xe40 0xe40 -+#define R_0xe44 0xe44 -+#define R_0xe48 0xe48 -+#define R_0xe4c 0xe4c -+#define R_0xe50 0xe50 -+#define R_0xe54 0xe54 -+#define R_0xe5c 0xe5c -+#define R_0xe64 0xe64 -+#define R_0xe6c 0xe6c -+#define R_0xe70 0xe70 -+#define R_0xe74 0xe74 -+#define R_0xe78 0xe78 -+#define R_0xe7c 0xe7c -+#define R_0xe80 0xe80 -+#define R_0xe84 0xe84 -+#define R_0xe88 0xe88 -+#define R_0xe8c 0xe8c -+#define R_0xe90 0xe90 -+#define R_0xe94 0xe94 -+#define R_0xe98 0xe98 -+#define R_0xe9c 0xe9c -+#define R_0xea0 0xea0 -+#define R_0xea4 0xea4 -+#define R_0xea8 0xea8 -+#define R_0xeac 0xeac -+#define R_0xeb0 0xeb0 -+#define R_0xeb4 0xeb4 -+#define R_0xeb8 0xeb8 -+#define R_0xebc 0xebc -+#define R_0xec 0xec -+#define R_0xec0 0xec0 -+#define R_0xec4 0xec4 -+#define R_0xec8 0xec8 -+#define R_0xecc 0xecc -+#define R_0xed0 0xed0 -+#define R_0xed4 0xed4 -+#define R_0xed8 0xed8 -+#define R_0xedc 0xedc -+#define R_0xee0 0xee0 -+#define R_0xee8 0xee8 -+#define R_0xeec 0xeec -+#define R_0xf0 0xf0 -+#define R_0xf00 0xf00 -+#define R_0xf04 0xf04 -+#define R_0xf08 0xf08 -+#define R_0xf0c 0xf0c -+#define R_0xf10 0xf10 -+#define R_0xf14 0xf14 -+#define R_0xf18 0xf18 -+#define R_0xf1c 0xf1c -+#define R_0xf20 0xf20 -+#define R_0xf24 0xf24 -+#define R_0xf2c 0xf2c -+#define R_0xf30 0xf30 -+#define R_0xf34 0xf34 -+#define R_0xf4 0xf4 -+#define R_0xf44 0xf44 -+#define R_0xf48 0xf48 -+#define R_0xf4c 0xf4c -+#define R_0xf50 0xf50 -+#define R_0xf54 0xf54 -+#define R_0xf58 0xf58 -+#define R_0xf5c 0xf5c -+#define R_0xf70 0xf70 -+#define R_0xf74 0xf74 -+#define R_0xf80 0xf80 -+#define R_0xf84 0xf84 -+#define R_0xf87 0xf87 -+#define R_0xf88 0xf88 -+#define R_0xf8c 0xf8c -+#define R_0xf90 0xf90 -+#define R_0xf94 0xf94 -+#define R_0xf98 0xf98 -+#define R_0xf9c 0xf9c -+#define R_0xfa0 0xfa0 -+#define R_0xfa4 0xfa4 -+#define R_0xfa8 0xfa8 -+#define R_0xfac 0xfac -+#define R_0xfb0 0xfb0 -+#define R_0xfb4 0xfb4 -+#define R_0xfb8 0xfb8 -+#define R_0xfbc 0xfbc -+#define R_0xfc0 0xfc0 -+#define R_0xfc4 0xfc4 -+#define R_0xfc8 0xfc8 -+#define R_0xfcc 0xfcc -+#define R_0xfd0 0xfd0 -+#define R_0xff0 0xff0 -+#define RF_0x0 0x0 -+#define RF_0x00 0x00 -+#define RF_0x08 0x08 -+#define RF_0x09 0x09 -+#define RF_0x0c 0x0c -+#define RF_0x0d 0x0d -+#define RF_0x1 0x1 -+#define RF_0x18 0x18 -+#define RF_0x19 0x19 -+#define RF_0x1a 0x1a -+#define RF_0x1bf0 0x1bf0 -+#define RF_0x2 0x2 -+#define RF_0x3 0x3 -+#define RF_0x1e 0x1e -+#define RF_0x1f 0x1f -+#define RF_0x20 0x20 -+#define RF_0x30 0x30 -+#define RF_0x31 0x31 -+#define RF_0x32 0x32 -+#define RF_0x33 0x33 -+#define RF_0x35 0x35 -+#define RF_0x3e 0x3e -+#define RF_0x3f 0x3f -+#define RF_0x4 0x4 -+#define RF_0x42 0x42 -+#define RF_0x43 0x43 -+#define RF_0x5 0x5 -+#define RF_0x51 0x51 -+#define RF_0x52 0x52 -+#define RF_0x53 0x53 -+#define RF_0x54 0x54 -+#define RF_0x55 0x55 -+#define RF_0x56 0x56 -+#define RF_0x57 0x57 -+#define RF_0x58 0x58 -+#define RF_0x5c 0x5c -+#define RF_0x5d 0x5d -+#define RF_0x60 0x60 -+#define RF_0x61 0x61 -+#define RF_0x63 0x63 -+#define RF_0x64 0x64 -+#define RF_0x65 0x65 -+#define RF_0x66 0x66 -+#define RF_0x67 0x67 -+#define RF_0x6d 0x6d -+#define RF_0x6e 0x6e -+#define RF_0x6f 0x6f -+#define RF_0x75 0x75 -+#define RF_0x76 0x76 -+#define RF_0x78 0x78 -+#define RF_0x7c 0x7c -+#define RF_0x7f 0x7f -+#define RF_0x8 0x8 -+#define RF_0x80 0x80 -+#define RF_0x81 0x81 -+#define RF_0x82 0x82 -+#define RF_0x83 0x83 -+#define RF_0x85 0x85 -+#define RF_0x86 0x86 -+#define RF_0x87 0x87 -+#define RF_0x8a 0x8a -+#define RF_0x8b 0x8b -+#define RF_0x8c 0x8c -+#define RF_0x8d 0x8d -+#define RF_0x8f 0x8f -+#define RF_0x93 0x93 -+#define RF_0x9e 0x9e -+#define RF_0x9f 0x9f -+#define RF_0xa3 0xa3 -+#define RF_0xa9 0xa9 -+#define RF_0xae 0xae -+#define RF_0xb0 0xb0 -+#define RF_0xb3 0xb3 -+#define RF_0xb4 0xb4 -+#define RF_0xb8 0xb8 -+#define RF_0xbc 0xbc -+#define RF_0xbe 0xbe -+#define RF_0xc4 0xc4 -+#define RF_0xc8 0xc8 -+#define RF_0xc9 0xc9 -+#define RF_0xca 0xca -+#define RF_0xcc 0xcc -+#define RF_0xd 0xd -+#define RF_0xdd 0xdd -+#define RF_0xde 0xde -+#define RF_0xdf 0xdf -+#define RF_0xed 0xed -+#define RF_0xee 0xee -+#define RF_0xef 0xef -+#define RF_0xf5 0xf5 -+#define RF_0xf6 0xf6 -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_rssi_monitor.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_rssi_monitor.c -new file mode 100644 -index 000000000000..1fde03691a1a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_rssi_monitor.c -@@ -0,0 +1,189 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/*@************************************************************ -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef PHYDM_SUPPORT_RSSI_MONITOR -+ -+void phydm_rssi_monitor_h2c(void *dm_void, u8 macid) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_t = &dm->dm_ra_table; -+ struct cmn_sta_info *sta = dm->phydm_sta_info[macid]; -+ struct ra_sta_info *ra = NULL; -+ #ifdef CONFIG_BEAMFORMING -+ struct bf_cmn_info *bf = NULL; -+ #endif -+ u8 h2c[H2C_MAX_LENGTH] = {0}; -+ u8 stbc_en, ldpc_en; -+ u8 bf_en = 0; -+ u8 is_rx, is_tx; -+ -+ if (is_sta_active(sta)) { -+ ra = &sta->ra_info; -+ } else { -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "[Warning] %s\n", __func__); -+ return; -+ } -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "%s ======>\n", __func__); -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "MACID=%d\n", sta->mac_id); -+ -+ is_rx = (ra->txrx_state == RX_STATE) ? 1 : 0; -+ is_tx = (ra->txrx_state == TX_STATE) ? 1 : 0; -+ stbc_en = (sta->stbc_en) ? 1 : 0; -+ ldpc_en = (sta->ldpc_en) ? 1 : 0; -+ -+ #ifdef CONFIG_BEAMFORMING -+ bf = &sta->bf_info; -+ -+ if ((bf->ht_beamform_cap & BEAMFORMING_HT_BEAMFORMEE_ENABLE) || -+ (bf->vht_beamform_cap & BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) -+ bf_en = 1; -+ #endif -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "RA_th_ofst=(( %s%d ))\n", -+ ((ra_t->ra_ofst_direc) ? "+" : "-"), ra_t->ra_th_ofst); -+ -+ h2c[0] = sta->mac_id; -+ h2c[1] = 0; -+ h2c[2] = sta->rssi_stat.rssi; -+ h2c[3] = is_rx | (stbc_en << 1) | -+ ((dm->noisy_decision & 0x1) << 2) | (bf_en << 6); -+ h2c[4] = (ra_t->ra_th_ofst & 0x7f) | -+ ((ra_t->ra_ofst_direc & 0x1) << 7); -+ h2c[5] = 0; -+ h2c[6] = ((ra_t->ra_trigger_mode) << 2); -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "PHYDM h2c[0x42]=0x%x %x %x %x %x %x %x\n", -+ h2c[6], h2c[5], h2c[4], h2c[3], h2c[2], h2c[1], h2c[0]); -+ -+ #if (RTL8188E_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8188E) -+ odm_ra_set_rssi_8188e(dm, sta->mac_id, sta->rssi_stat.rssi); -+ else -+ #endif -+ { -+ odm_fill_h2c_cmd(dm, ODM_H2C_RSSI_REPORT, H2C_MAX_LENGTH, h2c); -+ } -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+void phydm_sta_rssi_init(void *dm_void, u8 macid, u8 init_rssi) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta = NULL; -+ struct rssi_info *rssi_t = NULL; -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "%s ======>\n", __func__); -+ -+ sta = dm->phydm_sta_info[macid]; -+ rssi_t = &sta->rssi_stat; -+ -+ rssi_t->rssi_acc = (init_rssi << RSSI_MA); -+ rssi_t->rssi = init_rssi; -+} -+#endif -+void phydm_calculate_rssi_min_max(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct cmn_sta_info *sta; -+ s8 rssi_max_tmp = 0, rssi_min_tmp = 100; -+ u8 i; -+ u8 sta_cnt = 0; -+ -+ if (!dm->is_linked) -+ return; -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "%s ======>\n", __func__); -+ -+ for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { -+ sta = dm->phydm_sta_info[i]; -+ if (is_sta_active(sta)) { -+ sta_cnt++; -+ -+ if (sta->rssi_stat.rssi < rssi_min_tmp) { -+ rssi_min_tmp = sta->rssi_stat.rssi; -+ dm->rssi_min_macid = i; -+ } -+ -+ if (sta->rssi_stat.rssi > rssi_max_tmp) { -+ rssi_max_tmp = sta->rssi_stat.rssi; -+ dm->rssi_max_macid = i; -+ } -+ -+ /*@[Send RSSI to FW]*/ -+ if (!sta->ra_info.disable_ra) -+ phydm_rssi_monitor_h2c(dm, i); -+ -+ if (sta_cnt == dm->number_linked_client) -+ break; -+ } -+ } -+ dm->pre_rssi_min = dm->rssi_min; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (dm->number_linked_client == 0) -+ return; -+#endif -+ dm->rssi_max = (u8)rssi_max_tmp; -+ dm->rssi_min = (u8)rssi_min_tmp; -+} -+ -+void phydm_rssi_monitor_check(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ability & ODM_BB_RSSI_MONITOR)) -+ return; -+ -+ /*@for AP watchdog period = 1 sec*/ -+ if ((dm->phydm_sys_up_time % 2) == 1) -+ return; -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "%s ======>\n", __func__); -+ -+ phydm_calculate_rssi_min_max(dm); -+ -+ PHYDM_DBG(dm, DBG_RSSI_MNTR, "RSSI {max, min} = {%d, %d}\n", -+ dm->rssi_max, dm->rssi_min); -+} -+ -+void phydm_rssi_monitor_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ -+ dm->pre_rssi_min = 0; -+ dm->rssi_max = 0; -+ dm->rssi_min = 0; -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_rssi_monitor.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_rssi_monitor.h -new file mode 100644 -index 000000000000..b0f446ea292a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_rssi_monitor.h -@@ -0,0 +1,58 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDM_RSSI_MONITOR_H__ -+#define __PHYDM_RSSI_MONITOR_H__ -+ -+#define RSSI_MONITOR_VERSION "2.0" -+ -+/* @1 ============================================================ -+ * 1 Definition -+ * 1 ============================================================ -+ */ -+ -+/* @1 ============================================================ -+ * 1 structure -+ * 1 ============================================================ -+ */ -+ -+/* @1 ============================================================ -+ * 1 enumeration -+ * 1 ============================================================ -+ */ -+ -+/* @1 ============================================================ -+ * 1 function prototype -+ * 1 ============================================================ -+ */ -+ -+void phydm_rssi_monitor_check(void *dm_void); -+ -+void phydm_rssi_monitor_init(void *dm_void); -+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+void phydm_sta_rssi_init(void *dm_void, u8 macid, u8 init_rssi); -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_smt_ant.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_smt_ant.c -new file mode 100644 -index 000000000000..8e805b3ce2d0 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_smt_ant.c -@@ -0,0 +1,2277 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/* ************************************************************ -+ * include files -+ * ************************************************************ */ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+/******************************************************* -+ * when antenna test utility is on or some testing need to disable antenna diversity -+ * call this function to disable all ODM related mechanisms which will switch antenna. -+ ******************************************************/ -+#if (defined(CONFIG_SMART_ANTENNA)) -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+#if (RTL8198F_SUPPORT == 1) -+void phydm_smt_ant_init_98f(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 val = 0; -+ -+ #if 0 -+ odm_set_bb_reg(dm, R_0x1da4, 0x3c, 4); /*6.25*4 = 25ms*/ -+ odm_set_bb_reg(dm, R_0x1da4, BIT(6), 1); -+ odm_set_bb_reg(dm, R_0x1da4, BIT(7), 1); -+ #endif -+} -+#endif -+#endif -+ -+#if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) -+void phydm_cumitek_smt_ant_mapping_table_8822b( -+ void *dm_void, -+ u8 *table_path_a, -+ u8 *table_path_b) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 path_a_0to3_idx = 0; -+ u32 path_b_0to3_idx = 0; -+ u32 path_a_4to7_idx = 0; -+ u32 path_b_4to7_idx = 0; -+ -+ path_a_0to3_idx = ((table_path_a[3] & 0xf) << 24) | ((table_path_a[2] & 0xf) << 16) | ((table_path_a[1] & 0xf) << 8) | (table_path_a[0] & 0xf); -+ -+ path_b_0to3_idx = ((table_path_b[3] & 0xf) << 28) | ((table_path_b[2] & 0xf) << 20) | ((table_path_b[1] & 0xf) << 12) | ((table_path_b[0] & 0xf) << 4); -+ -+ path_a_4to7_idx = ((table_path_a[7] & 0xf) << 24) | ((table_path_a[6] & 0xf) << 16) | ((table_path_a[5] & 0xf) << 8) | (table_path_a[4] & 0xf); -+ -+ path_b_4to7_idx = ((table_path_b[7] & 0xf) << 28) | ((table_path_b[6] & 0xf) << 20) | ((table_path_b[5] & 0xf) << 12) | ((table_path_b[4] & 0xf) << 4); -+ -+#if 0 -+ /*PHYDM_DBG(dm, DBG_SMT_ANT, "mapping table{A, B} = {0x%x, 0x%x}\n", path_a_0to3_idx, path_b_0to3_idx);*/ -+#endif -+ -+ /*pathA*/ -+ odm_set_bb_reg(dm, R_0xca4, MASKDWORD, path_a_0to3_idx); /*@ant map 1*/ -+ odm_set_bb_reg(dm, R_0xca8, MASKDWORD, path_a_4to7_idx); /*@ant map 2*/ -+ -+ /*pathB*/ -+ odm_set_bb_reg(dm, R_0xea4, MASKDWORD, path_b_0to3_idx); /*@ant map 1*/ -+ odm_set_bb_reg(dm, R_0xea8, MASKDWORD, path_b_4to7_idx); /*@ant map 2*/ -+} -+ -+void phydm_cumitek_smt_ant_init_8822b( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant *smtant_table = &dm->smtant_table; -+ struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; -+ u32 value32; -+ -+ PHYDM_DBG(dm, DBG_SMT_ANT, "[8822B Cumitek SmtAnt Int]\n"); -+ -+ /*@========= MAC GPIO setting =================================*/ -+ -+ /* Pin, pin_name, RFE_CTRL_NUM*/ -+ -+ /* @A0, 55, 5G_TRSW, 3*/ -+ /* @A1, 52, 5G_TRSW, 0*/ -+ /* @A2, 25, 5G_TRSW, 8*/ -+ -+ /* @B0, 16, 5G_TRSW, 4*/ -+ /* @B1, 13, 5G_TRSW, 11*/ -+ /* @B2, 24, 5G_TRSW, 9*/ -+ -+ /*@for RFE_CTRL 8 & 9*/ -+ odm_set_mac_reg(dm, R_0x4c, BIT(24) | BIT(23), 2); -+ odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); -+ -+ /*@for RFE_CTRL 0*/ -+ odm_set_mac_reg(dm, R_0x4c, BIT(25), 0); -+ odm_set_mac_reg(dm, R_0x64, BIT(29), 1); -+ -+ /*@for RFE_CTRL 2 & 3*/ -+ odm_set_mac_reg(dm, R_0x4c, BIT(26), 0); -+ odm_set_mac_reg(dm, R_0x64, BIT(28), 1); -+ -+ /*@for RFE_CTRL 11*/ -+ odm_set_mac_reg(dm, R_0x40, BIT(3), 1); -+ -+ /*@0x604[25]=1 : 2bit mode for pathA&B&C&D*/ -+ /*@0x604[25]=0 : 3bit mode for pathA&B*/ -+ smtant_table->tx_desc_mode = 0; -+ odm_set_mac_reg(dm, R_0x604, BIT(25), (u32)smtant_table->tx_desc_mode); -+ -+ /*@========= BB RFE setting =================================*/ -+#if 0 -+ /*path A*/ -+ odm_set_bb_reg(dm, R_0x1990, BIT(3), 0); /*RFE_CTRL_3*/ /*A_0*/ -+ odm_set_bb_reg(dm, R_0xcbc, BIT(3), 0); /*@inv*/ -+ odm_set_bb_reg(dm, R_0xcb0, 0xf000, 8); -+ -+ odm_set_bb_reg(dm, R_0x1990, BIT(0), 0); /*RFE_CTRL_0*/ /*A_1*/ -+ odm_set_bb_reg(dm, R_0xcbc, BIT(0), 0); /*@inv*/ -+ odm_set_bb_reg(dm, R_0xcb0, 0xf, 0x9); -+ -+ odm_set_bb_reg(dm, R_0x1990, BIT(8), 0); /*RFE_CTRL_8*/ /*A_2*/ -+ odm_set_bb_reg(dm, R_0xcbc, BIT(8), 0); /*@inv*/ -+ odm_set_bb_reg(dm, R_0xcb4, 0xf, 0xa); -+ -+ -+ /*path B*/ -+ odm_set_bb_reg(dm, R_0x1990, BIT(4), 1); /*RFE_CTRL_4*/ /*B_0*/ -+ odm_set_bb_reg(dm, R_0xdbc, BIT(4), 0); /*@inv*/ -+ odm_set_bb_reg(dm, R_0xdb0, 0xf0000, 0xb); -+ -+ odm_set_bb_reg(dm, R_0x1990, BIT(11), 1); /*RFE_CTRL_11*/ /*B_1*/ -+ odm_set_bb_reg(dm, R_0xdbc, BIT(11), 0); /*@inv*/ -+ odm_set_bb_reg(dm, R_0xdb4, 0xf000, 0xc); -+ -+ odm_set_bb_reg(dm, R_0x1990, BIT(9), 1); /*RFE_CTRL_9*/ /*B_2*/ -+ odm_set_bb_reg(dm, R_0xdbc, BIT(9), 0); /*@inv*/ -+ odm_set_bb_reg(dm, R_0xdb4, 0xf0, 0xd); -+#endif -+ /*@========= BB SmtAnt setting =================================*/ -+ odm_set_mac_reg(dm, R_0x6d8, BIT(22) | BIT(21), 2); /*resp tx by register*/ -+ odm_set_mac_reg(dm, R_0x668, BIT(3), 1); -+ odm_set_bb_reg(dm, R_0x804, BIT(4), 0); /*@lathch antsel*/ -+ odm_set_bb_reg(dm, R_0x818, 0xf00000, 0); /*@keep tx by rx*/ -+ odm_set_bb_reg(dm, R_0x900, BIT(19), 0); /*@fast train*/ -+ odm_set_bb_reg(dm, R_0x900, BIT(18), 1); /*@1: by TXDESC*/ -+ -+ /*pathA*/ -+ odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x03020100); /*@ant map 1*/ -+ odm_set_bb_reg(dm, R_0xca8, MASKDWORD, 0x07060504); /*@ant map 2*/ -+ odm_set_bb_reg(dm, R_0xcac, BIT(9), 0); /*@keep antsel map by GNT_BT*/ -+ -+ /*pathB*/ -+ odm_set_bb_reg(dm, R_0xea4, MASKDWORD, 0x30201000); /*@ant map 1*/ -+ odm_set_bb_reg(dm, R_0xea8, MASKDWORD, 0x70605040); /*@ant map 2*/ -+ odm_set_bb_reg(dm, R_0xeac, BIT(9), 0); /*@keep antsel map by GNT_BT*/ -+} -+ -+void phydm_cumitek_smt_ant_init_8197f( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant *smtant_table = &dm->smtant_table; -+ struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; -+ u32 value32; -+ -+ PHYDM_DBG(dm, DBG_SMT_ANT, "[8197F Cumitek SmtAnt Int]\n"); -+ -+ /*@GPIO setting*/ -+} -+ -+void phydm_cumitek_smt_ant_init_8192f( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant *smtant_table = &dm->smtant_table; -+ struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; -+ u32 value32; -+ PHYDM_DBG(dm, DBG_SMT_ANT, "[8192F Cumitek SmtAnt Int]\n"); -+ -+ /*@GPIO setting*/ -+} -+ -+void phydm_cumitek_smt_tx_ant_update( -+ void *dm_void, -+ u8 tx_ant_idx_path_a, -+ u8 tx_ant_idx_path_b, -+ u32 mac_id) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant *smtant_table = &dm->smtant_table; -+ struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Cumitek] Set TX-ANT[%d] = (( A:0x%x , B:0x%x ))\n", mac_id, -+ tx_ant_idx_path_a, tx_ant_idx_path_b); -+ -+ /*path-A*/ -+ cumi_smtant_table->tx_ant_idx[0][mac_id] = tx_ant_idx_path_a; /*@fill this value into TXDESC*/ -+ -+ /*path-B*/ -+ cumi_smtant_table->tx_ant_idx[1][mac_id] = tx_ant_idx_path_b; /*@fill this value into TXDESC*/ -+} -+ -+void phydm_cumitek_smt_rx_default_ant_update( -+ void *dm_void, -+ u8 rx_ant_idx_path_a, -+ u8 rx_ant_idx_path_b) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant *smtant_table = &dm->smtant_table; -+ struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Cumitek] Set RX-ANT = (( A:0x%x, B:0x%x ))\n", -+ rx_ant_idx_path_a, rx_ant_idx_path_b); -+ -+ /*path-A*/ -+ if (cumi_smtant_table->rx_default_ant_idx[0] != rx_ant_idx_path_a) { -+ #if (RTL8822B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ odm_set_bb_reg(dm, R_0xc08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_a); /*@default RX antenna*/ -+ odm_set_mac_reg(dm, R_0x6d8, BIT(2) | BIT(1) | BIT(0), rx_ant_idx_path_a); /*@default response TX antenna*/ -+ } -+ #endif -+ -+ #if (RTL8197F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197F) { -+ } -+ #endif -+ -+ /*@jj add 20170822*/ -+ #if (RTL8192F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8192F) { -+ } -+ #endif -+ cumi_smtant_table->rx_default_ant_idx[0] = rx_ant_idx_path_a; -+ } -+ -+ /*path-B*/ -+ if (cumi_smtant_table->rx_default_ant_idx[1] != rx_ant_idx_path_b) { -+ #if (RTL8822B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ odm_set_bb_reg(dm, R_0xe08, BIT(21) | BIT(20) | BIT(19), rx_ant_idx_path_b); /*@default antenna*/ -+ odm_set_mac_reg(dm, R_0x6d8, BIT(5) | BIT(4) | BIT(3), rx_ant_idx_path_b); /*@default response TX antenna*/ -+ } -+ #endif -+ -+ #if (RTL8197F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197F) { -+ } -+ #endif -+ -+ /*@jj add 20170822*/ -+ #if (RTL8192F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8192F) { -+ } -+ #endif -+ cumi_smtant_table->rx_default_ant_idx[1] = rx_ant_idx_path_b; -+ } -+} -+ -+void phydm_cumitek_smt_ant_debug( -+ void *dm_void, -+ char input[][16], -+ u32 *_used, -+ char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant *smtant_table = &dm->smtant_table; -+ struct smt_ant_cumitek *cumi_smtant_table = &dm->smtant_table.cumi_smtant_table; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ char help[] = "-h"; -+ u32 dm_value[10] = {0}; -+ u8 i; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &dm_value[0]); -+ -+ if (strcmp(input[1], help) == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{1} {PathA rx_ant_idx} {pathB rx_ant_idx}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{2} {PathA tx_ant_idx} {pathB tx_ant_idx} {macid}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{3} {PathA mapping table} {PathB mapping table}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "{4} {txdesc_mode 0:3bit, 1:2bit}\n"); -+ -+ } else if (dm_value[0] == 1) { /*@fix rx_idle pattern*/ -+ -+ PHYDM_SSCANF(input[2], DCMD_DECIMAL, &dm_value[1]); -+ PHYDM_SSCANF(input[3], DCMD_DECIMAL, &dm_value[2]); -+ -+ phydm_cumitek_smt_rx_default_ant_update(dm, (u8)dm_value[1], (u8)dm_value[2]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "RX Ant{A, B}={%d, %d}\n", dm_value[1], dm_value[2]); -+ -+ } else if (dm_value[0] == 2) { /*@fix tx pattern*/ -+ -+ for (i = 1; i < 4; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]); -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "STA[%d] TX Ant{A, B}={%d, %d}\n", dm_value[3], -+ dm_value[1], dm_value[2]); -+ phydm_cumitek_smt_tx_ant_update(dm, (u8)dm_value[1], (u8)dm_value[2], (u8)dm_value[3]); -+ -+ } else if (dm_value[0] == 3) { -+ u8 table_path_a[8] = {0}; -+ u8 table_path_b[8] = {0}; -+ -+ for (i = 1; i < 4; i++) { -+ if (input[i + 1]) -+ PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]); -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Set Path-AB mapping table={%d, %d}\n", dm_value[1], -+ dm_value[2]); -+ -+ for (i = 0; i < 8; i++) { -+ table_path_a[i] = (u8)((dm_value[1] >> (4 * i)) & 0xf); -+ table_path_b[i] = (u8)((dm_value[2] >> (4 * i)) & 0xf); -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Ant_Table_A[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n", -+ table_path_a[7], table_path_a[6], table_path_a[5], -+ table_path_a[4], table_path_a[3], table_path_a[2], -+ table_path_a[1], table_path_a[0]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Ant_Table_B[7:0]={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n", -+ table_path_b[7], table_path_b[6], table_path_b[5], -+ table_path_b[4], table_path_b[3], table_path_b[2], -+ table_path_b[1], table_path_b[0]); -+ -+ phydm_cumitek_smt_ant_mapping_table_8822b(dm, &table_path_a[0], &table_path_b[0]); -+ -+ } else if (dm_value[0] == 4) { -+ smtant_table->tx_desc_mode = (u8)dm_value[1]; -+ odm_set_mac_reg(dm, R_0x604, BIT(25), (u32)smtant_table->tx_desc_mode); -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+#endif -+ -+#if (defined(CONFIG_HL_SMART_ANTENNA)) -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 -+ -+#if (RTL8822B_SUPPORT == 1) -+void phydm_hl_smart_ant_type2_init_8822b( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u8 j; -+ u8 rfu_codeword_table_init_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = { -+ {1, 1}, /*@0*/ -+ {1, 2}, -+ {2, 1}, -+ {2, 2}, -+ {4, 0}, -+ {5, 0}, -+ {6, 0}, -+ {7, 0}, -+ {8, 0}, /*@8*/ -+ {9, 0}, -+ {0xa, 0}, -+ {0xb, 0}, -+ {0xc, 0}, -+ {0xd, 0}, -+ {0xe, 0}, -+ {0xf, 0}}; -+ u8 rfu_codeword_table_init_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = { -+#if 1 -+ {9, 1}, /*@0*/ -+ {9, 9}, -+ {1, 9}, -+ {9, 6}, -+ {2, 1}, -+ {2, 9}, -+ {9, 2}, -+ {2, 2}, /*@8*/ -+ {6, 1}, -+ {6, 9}, -+ {2, 9}, -+ {2, 2}, -+ {6, 2}, -+ {6, 6}, -+ {2, 6}, -+ {1, 1} -+#else -+ {1, 1}, /*@0*/ -+ {9, 1}, -+ {9, 9}, -+ {1, 9}, -+ {1, 2}, -+ {9, 2}, -+ {9, 6}, -+ {1, 6}, -+ {2, 1}, /*@8*/ -+ {6, 1}, -+ {6, 9}, -+ {2, 9}, -+ {2, 2}, -+ {6, 2}, -+ {6, 6}, -+ {2, 6} -+#endif -+ }; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***RTK 8822B SmartAnt_Init: Hong-Bo SmrtAnt Type2]\n"); -+ -+ /* @---------------------------------------- */ -+ /* @GPIO 0-1 for Beam control */ -+ /* reg0x66[2:0]=0 */ -+ /* reg0x44[25:24] = 0 */ -+ /* reg0x44[23:16] enable_output for P_GPIO[7:0] */ -+ /* reg0x44[15:8] output_value for P_GPIO[7:0] */ -+ /* reg0x40[1:0] = 0 GPIO function */ -+ /* @------------------------------------------ */ -+ -+ odm_move_memory(dm, sat_tab->rfu_codeword_table_2g, rfu_codeword_table_init_2g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B)); -+ odm_move_memory(dm, sat_tab->rfu_codeword_table_5g, rfu_codeword_table_init_5g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B)); -+ -+ /*@GPIO setting*/ -+ odm_set_mac_reg(dm, R_0x64, (BIT(18) | BIT(17) | BIT(16)), 0); -+ odm_set_mac_reg(dm, R_0x44, BIT(25) | BIT(24), 0); /*@config P_GPIO[3:2] to data port*/ -+ odm_set_mac_reg(dm, R_0x44, BIT(17) | BIT(16), 0x3); /*@enable_output for P_GPIO[3:2]*/ -+#if 0 -+ /*odm_set_mac_reg(dm, R_0x44, BIT(9)|BIT(8), 0);*/ /*P_GPIO[3:2] output value*/ -+#endif -+ odm_set_mac_reg(dm, R_0x40, BIT(1) | BIT(0), 0); /*@GPIO function*/ -+ -+ /*@Hong_lin smart antenna HW setting*/ -+ sat_tab->rfu_protocol_type = 2; -+ sat_tab->rfu_protocol_delay_time = 45; -+ -+ sat_tab->rfu_codeword_total_bit_num = 16; /*@max=32bit*/ -+ sat_tab->rfu_each_ant_bit_num = 4; -+ -+ sat_tab->total_beam_set_num = 4; -+ sat_tab->total_beam_set_num_2g = 4; -+ sat_tab->total_beam_set_num_5g = 8; -+ -+#if DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ if (dm->support_interface == ODM_ITRF_SDIO) -+ sat_tab->latch_time = 100; /*@mu sec*/ -+#endif -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB) -+ sat_tab->latch_time = 100; /*@mu sec*/ -+#endif -+ sat_tab->pkt_skip_statistic_en = 0; -+ -+ sat_tab->ant_num = 2; -+ sat_tab->ant_num_total = MAX_PATH_NUM_8822B; -+ sat_tab->first_train_ant = MAIN_ANT; -+ -+ sat_tab->fix_beam_pattern_en = 0; -+ sat_tab->decision_holding_period = 0; -+ -+ /*@beam training setting*/ -+ sat_tab->pkt_counter = 0; -+ sat_tab->per_beam_training_pkt_num = 10; -+ -+ /*set default beam*/ -+ sat_tab->fast_training_beam_num = 0; -+ sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; -+ -+ for (j = 0; j < SUPPORT_BEAM_SET_PATTERN_NUM; j++) { -+ sat_tab->beam_set_avg_rssi_pre[j] = 0; -+ sat_tab->beam_set_train_val_diff[j] = 0; -+ sat_tab->beam_set_train_cnt[j] = 0; -+ } -+ phydm_set_rfu_beam_pattern_type2(dm); -+ fat_tab->fat_state = FAT_BEFORE_LINK_STATE; -+} -+#endif -+ -+u32 phydm_construct_hb_rfu_codeword_type2( -+ void *dm_void, -+ u32 beam_set_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ u32 sync_codeword = 0x7f; -+ u32 codeword = 0; -+ u32 data_tmp = 0; -+ u32 i; -+ -+ for (i = 0; i < sat_tab->ant_num_total; i++) { -+ if (*dm->band_type == ODM_BAND_5G) -+ data_tmp = sat_tab->rfu_codeword_table_5g[beam_set_idx][i]; -+ else -+ data_tmp = sat_tab->rfu_codeword_table_2g[beam_set_idx][i]; -+ -+ codeword |= (data_tmp << (i * sat_tab->rfu_each_ant_bit_num)); -+ } -+ -+ codeword = (codeword << 8) | sync_codeword; -+ -+ return codeword; -+} -+ -+void phydm_update_beam_pattern_type2( -+ void *dm_void, -+ u32 codeword, -+ u32 codeword_length) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ u8 i; -+ boolean beam_ctrl_signal; -+ u32 one = 0x1; -+ u32 reg44_tmp_p, reg44_tmp_n, reg44_ori; -+ u8 devide_num = 4; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Set codeword = ((0x%x))\n", codeword); -+ -+ reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); -+ reg44_tmp_p = reg44_ori; -+#if 0 -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_ori =0x%x\n", reg44_ori);*/ -+#endif -+ -+ /*@devide_num = (sat_tab->rfu_protocol_type == 2) ? 8 : 4;*/ -+ -+ for (i = 0; i <= (codeword_length - 1); i++) { -+ beam_ctrl_signal = (boolean)((codeword & BIT(i)) >> i); -+ -+ #if 1 -+ if (dm->debug_components & DBG_ANT_DIV) { -+ if (i == (codeword_length - 1)) -+ pr_debug("%d ]\n", beam_ctrl_signal); -+ else if (i == 0) -+ pr_debug("Start sending codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal); -+ else if ((i % devide_num) == (devide_num - 1)) -+ pr_debug("%d | ", beam_ctrl_signal); -+ else -+ pr_debug("%d ", beam_ctrl_signal); -+ } -+ #endif -+ -+ if (dm->support_ic_type == ODM_RTL8821) { -+ #if (RTL8821A_SUPPORT == 1) -+ reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*@clean bit 10 & 11*/ -+ reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10)); -+ reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10))); -+ -+#if 0 -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n);*/ -+#endif -+ odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); -+ odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); -+ #endif -+ } -+ #if (RTL8822B_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8822B) { -+ if (sat_tab->rfu_protocol_type == 2) { -+ reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*@clean bit 8*/ -+ reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*@get new clk high/low, exclusive-or*/ -+ -+ reg44_tmp_p |= (beam_ctrl_signal << 8); -+ -+ odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); -+ ODM_delay_us(sat_tab->rfu_protocol_delay_time); -+#if 0 -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal);*/ -+#endif -+ -+ } else { -+ reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*@clean bit 9 & 8*/ -+ reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8)); -+ reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8))); -+ -+#if 0 -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n); */ -+#endif -+ odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); -+ ODM_delay_us(10); -+ odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); -+ ODM_delay_us(10); -+ } -+ } -+ #endif -+ } -+} -+ -+void phydm_update_rx_idle_beam_type2( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ u32 i; -+ -+ sat_tab->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(dm, sat_tab->rx_idle_beam_set_idx); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-Beam ] BeamSet idx = ((%d))\n", -+ sat_tab->rx_idle_beam_set_idx); -+ -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -+#endif -+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) -+ odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); -+#if 0 -+ /*odm_stall_execution(1);*/ -+#endif -+#endif -+ -+ sat_tab->pre_codeword = sat_tab->update_beam_codeword; -+} -+ -+void phydm_hl_smt_ant_dbg_type2( -+ void *dm_void, -+ char input[][16], -+ u32 *_used, -+ char *output, -+ u32 *_out_len -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 one = 0x1; -+ u32 codeword_length = sat_tab->rfu_codeword_total_bit_num; -+ u32 beam_ctrl_signal, i; -+ u8 devide_num = 4; -+ char help[] = "-h"; -+ u32 dm_value[10] = {0}; -+ -+ PHYDM_SSCANF(input[1], DCMD_DECIMAL, &dm_value[0]); -+ PHYDM_SSCANF(input[2], DCMD_DECIMAL, &dm_value[1]); -+ PHYDM_SSCANF(input[3], DCMD_DECIMAL, &dm_value[2]); -+ PHYDM_SSCANF(input[4], DCMD_DECIMAL, &dm_value[3]); -+ PHYDM_SSCANF(input[5], DCMD_DECIMAL, &dm_value[4]); -+ -+ if (strcmp(input[1], help) == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " 1 {fix_en} {codeword(Hex)}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " 3 {Fix_training_num_en} {Per_beam_training_pkt_num} {Decision_holding_period}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " 5 {0:show, 1:2G, 2:5G} {beam_num} {idxA(Hex)} {idxB(Hex)}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " 7 {0:show, 1:2G, 2:5G} {total_beam_set_num}\n"); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ " 8 {0:show, 1:set} {RFU delay time(us)}\n"); -+ -+ } else if (dm_value[0] == 1) { /*@fix beam pattern*/ -+ -+ sat_tab->fix_beam_pattern_en = dm_value[1]; -+ -+ if (sat_tab->fix_beam_pattern_en == 1) { -+ PHYDM_SSCANF(input[3], DCMD_HEX, &dm_value[2]); -+ sat_tab->fix_beam_pattern_codeword = dm_value[2]; -+ -+ if (sat_tab->fix_beam_pattern_codeword > (one << codeword_length)) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n", -+ sat_tab->fix_beam_pattern_codeword, -+ codeword_length); -+ -+ (sat_tab->fix_beam_pattern_codeword) &= 0xffffff; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ SmartAnt ] Auto modify to (0x%x)\n", -+ sat_tab->fix_beam_pattern_codeword); -+ } -+ -+ sat_tab->update_beam_codeword = sat_tab->fix_beam_pattern_codeword; -+ -+ /*@---------------------------------------------------------*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Fix Beam Pattern\n"); -+ -+ /*@devide_num = (sat_tab->rfu_protocol_type == 2) ? 8 : 4;*/ -+ -+ for (i = 0; i <= (codeword_length - 1); i++) { -+ beam_ctrl_signal = (boolean)((sat_tab->update_beam_codeword & BIT(i)) >> i); -+ -+ if (i == (codeword_length - 1)) -+ PDM_SNPF(out_len, used, -+ output + used, -+ out_len - used, -+ "%d]\n", -+ beam_ctrl_signal); -+ else if (i == 0) -+ PDM_SNPF(out_len, used, -+ output + used, -+ out_len - used, -+ "Send Codeword[1:%d] to RFU -> [%d", -+ sat_tab->rfu_codeword_total_bit_num, -+ beam_ctrl_signal); -+ else if ((i % devide_num) == (devide_num - 1)) -+ PDM_SNPF(out_len, used, -+ output + used, -+ out_len - used, "%d|", -+ beam_ctrl_signal); -+ else -+ PDM_SNPF(out_len, used, -+ output + used, -+ out_len - used, "%d", -+ beam_ctrl_signal); -+ } -+/*@---------------------------------------------------------*/ -+ -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -+#endif -+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) -+ odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); -+#if 0 -+ /*odm_stall_execution(1);*/ -+#endif -+#endif -+ } else if (sat_tab->fix_beam_pattern_en == 0) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] Smart Antenna: Enable\n"); -+ -+ } else if (dm_value[0] == 2) { /*set latch time*/ -+ -+ sat_tab->latch_time = dm_value[1]; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] latch_time =0x%x\n", -+ sat_tab->latch_time); -+ } else if (dm_value[0] == 3) { -+ sat_tab->fix_training_num_en = dm_value[1]; -+ -+ if (sat_tab->fix_training_num_en == 1) { -+ sat_tab->per_beam_training_pkt_num = (u8)dm_value[2]; -+ sat_tab->decision_holding_period = (u8)dm_value[3]; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[SmtAnt] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n", -+ sat_tab->fix_training_num_en, -+ sat_tab->per_beam_training_pkt_num, -+ sat_tab->decision_holding_period); -+ -+ } else if (sat_tab->fix_training_num_en == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] AUTO per_beam_training_pkt_num\n"); -+ } -+ } else if (dm_value[0] == 4) { -+ #if 0 -+ if (dm_value[1] == 1) { -+ sat_tab->ant_num = 1; -+ sat_tab->first_train_ant = MAIN_ANT; -+ -+ } else if (dm_value[1] == 2) { -+ sat_tab->ant_num = 1; -+ sat_tab->first_train_ant = AUX_ANT; -+ -+ } else if (dm_value[1] == 3) { -+ sat_tab->ant_num = 2; -+ sat_tab->first_train_ant = MAIN_ANT; -+ } -+ -+ PDM_SNPF((output + used, out_len - used, -+ "[ SmartAnt ] Set ant Num = (( %d )), first_train_ant = (( %d ))\n", -+ sat_tab->ant_num, (sat_tab->first_train_ant - 1))); -+ #endif -+ } else if (dm_value[0] == 5) { /*set beam set table*/ -+ -+ PHYDM_SSCANF(input[4], DCMD_HEX, &dm_value[3]); -+ PHYDM_SSCANF(input[5], DCMD_HEX, &dm_value[4]); -+ -+ if (dm_value[1] == 1) { /*@2G*/ -+ if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) { -+ sat_tab->rfu_codeword_table_2g[dm_value[2]][0] = (u8)dm_value[3]; -+ sat_tab->rfu_codeword_table_2g[dm_value[2]][1] = (u8)dm_value[4]; -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "[SmtAnt] Set 2G Table[%d] = [A:0x%x, B:0x%x]\n", -+ dm_value[2], dm_value[3], dm_value[4]); -+ } -+ -+ } else if (dm_value[1] == 2) { /*@5G*/ -+ if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) { -+ sat_tab->rfu_codeword_table_5g[dm_value[2]][0] = (u8)dm_value[3]; -+ sat_tab->rfu_codeword_table_5g[dm_value[2]][1] = (u8)dm_value[4]; -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n", -+ dm_value[2], dm_value[3], dm_value[4]); -+ } -+ } else if (dm_value[1] == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[SmtAnt] 2G Beam Table==============>\n"); -+ for (i = 0; i < sat_tab->total_beam_set_num_2g; i++) { -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "2G Table[%d] = [A:0x%x, B:0x%x]\n", i, -+ sat_tab->rfu_codeword_table_2g[i][0], -+ sat_tab->rfu_codeword_table_2g[i][1]); -+ } -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[SmtAnt] 5G Beam Table==============>\n"); -+ for (i = 0; i < sat_tab->total_beam_set_num_5g; i++) { -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "5G Table[%d] = [A:0x%x, B:0x%x]\n", i, -+ sat_tab->rfu_codeword_table_5g[i][0], -+ sat_tab->rfu_codeword_table_5g[i][1]); -+ } -+ } -+ -+ } else if (dm_value[0] == 6) { -+#if 0 -+ if (dm_value[1] == 0) { -+ if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) { -+ sat_tab->rfu_codeword_table_5g[dm_value[2] ][0] = (u8)dm_value[3]; -+ sat_tab->rfu_codeword_table_5g[dm_value[2] ][1] = (u8)dm_value[4]; -+ PDM_SNPF((output + used, out_len - used, -+ "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n", -+ dm_value[2], dm_value[3], -+ dm_value[4])); -+ } -+ } else { -+ for (i = 0; i < sat_tab->total_beam_set_num_5g; i++) { -+ PDM_SNPF((output + used, out_len - used, -+ "[SmtAnt] Read 5G Table[%d] = [A:0x%x, B:0x%x]\n", -+ i, -+ sat_tab->rfu_codeword_table_5g[i][0], -+ sat_tab->rfu_codeword_table_5g[i][1])); -+ } -+ } -+#endif -+ } else if (dm_value[0] == 7) { -+ if (dm_value[1] == 1) { -+ sat_tab->total_beam_set_num_2g = (u8)(dm_value[2]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] total_beam_set_num_2g = ((%d))\n", -+ sat_tab->total_beam_set_num_2g); -+ -+ } else if (dm_value[1] == 2) { -+ sat_tab->total_beam_set_num_5g = (u8)(dm_value[2]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] total_beam_set_num_5g = ((%d))\n", -+ sat_tab->total_beam_set_num_5g); -+ } else if (dm_value[1] == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] Show total_beam_set_num{2g,5g} = {%d,%d}\n", -+ sat_tab->total_beam_set_num_2g, -+ sat_tab->total_beam_set_num_5g); -+ } -+ -+ } else if (dm_value[0] == 8) { -+ if (dm_value[1] == 1) { -+ sat_tab->rfu_protocol_delay_time = (u16)(dm_value[2]); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[SmtAnt] Set rfu_protocol_delay_time = ((%d))\n", -+ sat_tab->rfu_protocol_delay_time); -+ } else if (dm_value[1] == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[SmtAnt] Read rfu_protocol_delay_time = ((%d))\n", -+ sat_tab->rfu_protocol_delay_time); -+ } -+ } -+ -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_set_rfu_beam_pattern_type2( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ -+ if (dm->ant_div_type != HL_SW_SMART_ANT_TYPE2) -+ return; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Training beam_set index = (( 0x%x ))\n", -+ sat_tab->fast_training_beam_num); -+ sat_tab->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(dm, sat_tab->fast_training_beam_num); -+ -+ #if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -+ #endif -+ #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) -+ odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); -+#if 0 -+ /*odm_stall_execution(1);*/ -+#endif -+ #endif -+} -+ -+void phydm_fast_ant_training_hl_smart_antenna_type2( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; -+ u32 codeword = 0; -+ u8 i = 0, j = 0; -+ u8 avg_rssi_tmp; -+ u8 avg_rssi_tmp_ma; -+ u8 max_beam_ant_rssi = 0; -+ u8 rssi_target_beam = 0, target_beam_max_rssi = 0; -+ u8 evm1ss_target_beam = 0, evm2ss_target_beam = 0; -+ u32 target_beam_max_evm1ss = 0, target_beam_max_evm2ss = 0; -+ u32 beam_tmp; -+ u8 per_beam_val_diff_tmp = 0, training_pkt_num_offset; -+ u32 avg_evm2ss[2] = {0}, avg_evm2ss_sum = 0; -+ u32 avg_evm1ss = 0; -+ u32 beam_path_evm_2ss_cnt_all = 0; /*sum of all 2SS-pattern cnt*/ -+ u32 beam_path_evm_1ss_cnt_all = 0; /*sum of all 1SS-pattern cnt*/ -+ u8 decision_type; -+ -+ if (!dm->is_linked) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n"); -+ -+ if (fat_tab->is_become_linked == true) { -+ sat_tab->decision_holding_period = 0; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Link->no Link\n"); -+ fat_tab->fat_state = FAT_BEFORE_LINK_STATE; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "change to (( %d )) FAT_state\n", -+ fat_tab->fat_state); -+ fat_tab->is_become_linked = dm->is_linked; -+ } -+ return; -+ -+ } else { -+ if (fat_tab->is_become_linked == false) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n"); -+ -+ fat_tab->fat_state = FAT_PREPARE_STATE; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "change to (( %d )) FAT_state\n", -+ fat_tab->fat_state); -+ -+ /*sat_tab->fast_training_beam_num = 0;*/ -+ /*phydm_set_rfu_beam_pattern_type2(dm);*/ -+ -+ fat_tab->is_become_linked = dm->is_linked; -+ } -+ } -+ -+#if 0 -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "HL Smart ant Training: state (( %d ))\n", fat_tab->fat_state);*/ -+#endif -+ -+ /* @[DECISION STATE] */ -+ /*@=======================================================================================*/ -+ if (fat_tab->fat_state == FAT_DECISION_STATE) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ 3. In Decision state]\n"); -+ -+ /*@compute target beam in each antenna*/ -+ -+ for (j = 0; j < (sat_tab->total_beam_set_num); j++) { -+ /*@[Decision1: RSSI]-------------------------------------------------------------------*/ -+ if (sat_tab->statistic_pkt_cnt[j] == 0) { /*@if new RSSI = 0 -> MA_RSSI-=2*/ -+ avg_rssi_tmp = sat_tab->beam_set_avg_rssi_pre[j]; -+ avg_rssi_tmp = (avg_rssi_tmp >= 2) ? (avg_rssi_tmp - 2) : avg_rssi_tmp; -+ avg_rssi_tmp_ma = avg_rssi_tmp; -+ } else { -+ avg_rssi_tmp = (u8)((sat_tab->beam_set_rssi_avg_sum[j]) / (sat_tab->statistic_pkt_cnt[j])); -+ avg_rssi_tmp_ma = (avg_rssi_tmp + sat_tab->beam_set_avg_rssi_pre[j]) >> 1; -+ } -+ -+ sat_tab->beam_set_avg_rssi_pre[j] = avg_rssi_tmp; -+ -+ if (avg_rssi_tmp > target_beam_max_rssi) { -+ rssi_target_beam = j; -+ target_beam_max_rssi = avg_rssi_tmp; -+ } -+ -+ /*@[Decision2: EVM 2ss]-------------------------------------------------------------------*/ -+ if (sat_tab->beam_path_evm_2ss_cnt[j] != 0) { -+ avg_evm2ss[0] = sat_tab->beam_path_evm_2ss_sum[j][0] / sat_tab->beam_path_evm_2ss_cnt[j]; -+ avg_evm2ss[1] = sat_tab->beam_path_evm_2ss_sum[j][1] / sat_tab->beam_path_evm_2ss_cnt[j]; -+ avg_evm2ss_sum = avg_evm2ss[0] + avg_evm2ss[1]; -+ beam_path_evm_2ss_cnt_all += sat_tab->beam_path_evm_2ss_cnt[j]; -+ -+ sat_tab->beam_set_avg_evm_2ss_pre[j] = (u8)avg_evm2ss_sum; -+ } -+ -+ if (avg_evm2ss_sum > target_beam_max_evm2ss) { -+ evm2ss_target_beam = j; -+ target_beam_max_evm2ss = avg_evm2ss_sum; -+ } -+ -+ /*@[Decision3: EVM 1ss]-------------------------------------------------------------------*/ -+ if (sat_tab->beam_path_evm_1ss_cnt[j] != 0) { -+ avg_evm1ss = sat_tab->beam_path_evm_1ss_sum[j] / sat_tab->beam_path_evm_1ss_cnt[j]; -+ beam_path_evm_1ss_cnt_all += sat_tab->beam_path_evm_1ss_cnt[j]; -+ -+ sat_tab->beam_set_avg_evm_1ss_pre[j] = (u8)avg_evm1ss; -+ } -+ -+ if (avg_evm1ss > target_beam_max_evm1ss) { -+ evm1ss_target_beam = j; -+ target_beam_max_evm1ss = avg_evm1ss; -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Beam[%d] Pkt_cnt=(( %d )), avg{MA,rssi}={%d, %d}, EVM1={%d}, EVM2={%d, %d, %d}\n", -+ j, sat_tab->statistic_pkt_cnt[j], -+ avg_rssi_tmp_ma, avg_rssi_tmp, avg_evm1ss, -+ avg_evm2ss[0], avg_evm2ss[1], avg_evm2ss_sum); -+ -+ /*reset counter value*/ -+ sat_tab->beam_set_rssi_avg_sum[j] = 0; -+ sat_tab->beam_path_rssi_sum[j][0] = 0; -+ sat_tab->beam_path_rssi_sum[j][1] = 0; -+ sat_tab->statistic_pkt_cnt[j] = 0; -+ -+ sat_tab->beam_path_evm_2ss_sum[j][0] = 0; -+ sat_tab->beam_path_evm_2ss_sum[j][1] = 0; -+ sat_tab->beam_path_evm_2ss_cnt[j] = 0; -+ -+ sat_tab->beam_path_evm_1ss_sum[j] = 0; -+ sat_tab->beam_path_evm_1ss_cnt[j] = 0; -+ } -+ -+ /*@[Joint Decision]-------------------------------------------------------------------*/ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "--->1.[RSSI] Target Beam(( %d )) RSSI_max=((%d))\n", -+ rssi_target_beam, target_beam_max_rssi); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "--->2.[Evm2SS] Target Beam(( %d )) EVM2SS_max=((%d))\n", -+ evm2ss_target_beam, target_beam_max_evm2ss); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "--->3.[Evm1SS] Target Beam(( %d )) EVM1SS_max=((%d))\n", -+ evm1ss_target_beam, target_beam_max_evm1ss); -+ -+ if (target_beam_max_rssi <= 10) { -+ sat_tab->rx_idle_beam_set_idx = rssi_target_beam; -+ decision_type = 1; -+ } else { -+ if (beam_path_evm_2ss_cnt_all != 0) { -+ sat_tab->rx_idle_beam_set_idx = evm2ss_target_beam; -+ decision_type = 2; -+ } else if (beam_path_evm_1ss_cnt_all != 0) { -+ sat_tab->rx_idle_beam_set_idx = evm1ss_target_beam; -+ decision_type = 3; -+ } else { -+ sat_tab->rx_idle_beam_set_idx = rssi_target_beam; -+ decision_type = 1; -+ } -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "---> Decision_type=((%d)), Final Target Beam(( %d ))\n", -+ decision_type, sat_tab->rx_idle_beam_set_idx); -+ -+ /*@Calculate packet counter offset*/ -+ for (j = 0; j < (sat_tab->total_beam_set_num); j++) { -+ if (decision_type == 1) { -+ per_beam_val_diff_tmp = target_beam_max_rssi - sat_tab->beam_set_avg_rssi_pre[j]; -+ -+ } else if (decision_type == 2) { -+ per_beam_val_diff_tmp = ((u8)target_beam_max_evm2ss - sat_tab->beam_set_avg_evm_2ss_pre[j]) >> 1; -+ } else if (decision_type == 3) { -+ per_beam_val_diff_tmp = (u8)target_beam_max_evm1ss - sat_tab->beam_set_avg_evm_1ss_pre[j]; -+ } -+ sat_tab->beam_set_train_val_diff[j] = per_beam_val_diff_tmp; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Beam_Set[%d]: diff= ((%d))\n", j, -+ per_beam_val_diff_tmp); -+ } -+ -+ /*set beam in each antenna*/ -+ phydm_update_rx_idle_beam_type2(dm); -+ fat_tab->fat_state = FAT_PREPARE_STATE; -+ } -+ /* @[TRAINING STATE] */ -+ else if (fat_tab->fat_state == FAT_TRAINING_STATE) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2. In Training state]\n"); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "curr_beam_idx = (( %d )), pre_beam_idx = (( %d ))\n", -+ sat_tab->fast_training_beam_num, -+ sat_tab->pre_fast_training_beam_num); -+ -+ if (sat_tab->fast_training_beam_num > sat_tab->pre_fast_training_beam_num) -+ -+ sat_tab->force_update_beam_en = 0; -+ -+ else { -+ sat_tab->force_update_beam_en = 1; -+ -+ sat_tab->pkt_counter = 0; -+ beam_tmp = sat_tab->fast_training_beam_num; -+ if (sat_tab->fast_training_beam_num >= ((u32)sat_tab->total_beam_set_num - 1)) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Timeout Update] Beam_num (( %d )) -> (( decision ))\n", -+ sat_tab->fast_training_beam_num); -+ fat_tab->fat_state = FAT_DECISION_STATE; -+ phydm_fast_ant_training_hl_smart_antenna_type2(dm); -+ -+ } else { -+ sat_tab->fast_training_beam_num++; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Timeout Update] Beam_num (( %d )) -> (( %d ))\n", -+ beam_tmp, -+ sat_tab->fast_training_beam_num); -+ phydm_set_rfu_beam_pattern_type2(dm); -+ fat_tab->fat_state = FAT_TRAINING_STATE; -+ } -+ } -+ sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Update Pre_Beam =(( %d ))\n", -+ sat_tab->pre_fast_training_beam_num); -+ } -+ /* @[Prepare state] */ -+ /*@=======================================================================================*/ -+ else if (fat_tab->fat_state == FAT_PREPARE_STATE) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "\n\n[ 1. In Prepare state]\n"); -+ -+ if (dm->pre_traffic_load == dm->traffic_load) { -+ if (sat_tab->decision_holding_period != 0) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Holding_period = (( %d )), return!!!\n", -+ sat_tab->decision_holding_period); -+ sat_tab->decision_holding_period--; -+ return; -+ } -+ } -+ -+ /* Set training packet number*/ -+ if (sat_tab->fix_training_num_en == 0) { -+ switch (dm->traffic_load) { -+ case TRAFFIC_HIGH: -+ sat_tab->per_beam_training_pkt_num = 8; -+ sat_tab->decision_holding_period = 2; -+ break; -+ case TRAFFIC_MID: -+ sat_tab->per_beam_training_pkt_num = 6; -+ sat_tab->decision_holding_period = 3; -+ break; -+ case TRAFFIC_LOW: -+ sat_tab->per_beam_training_pkt_num = 3; /*ping 60000*/ -+ sat_tab->decision_holding_period = 4; -+ break; -+ case TRAFFIC_ULTRA_LOW: -+ sat_tab->per_beam_training_pkt_num = 1; -+ sat_tab->decision_holding_period = 6; -+ break; -+ default: -+ break; -+ } -+ } -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "TrafficLoad = (( %d )), Fix_beam = (( %d )), per_beam_training_pkt_num = (( %d )), decision_holding_period = ((%d))\n", -+ dm->traffic_load, sat_tab->fix_training_num_en, -+ sat_tab->per_beam_training_pkt_num, -+ sat_tab->decision_holding_period); -+ -+ /*@Beam_set number*/ -+ if (*dm->band_type == ODM_BAND_5G) { -+ sat_tab->total_beam_set_num = sat_tab->total_beam_set_num_5g; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "5G beam_set num = ((%d))\n", -+ sat_tab->total_beam_set_num); -+ } else { -+ sat_tab->total_beam_set_num = sat_tab->total_beam_set_num_2g; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "2G beam_set num = ((%d))\n", -+ sat_tab->total_beam_set_num); -+ } -+ -+ for (j = 0; j < (sat_tab->total_beam_set_num); j++) { -+ training_pkt_num_offset = sat_tab->beam_set_train_val_diff[j]; -+ -+ if (sat_tab->per_beam_training_pkt_num > training_pkt_num_offset) -+ sat_tab->beam_set_train_cnt[j] = sat_tab->per_beam_training_pkt_num - training_pkt_num_offset; -+ else -+ sat_tab->beam_set_train_cnt[j] = 1; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Beam_Set[ %d ] training_pkt_offset = ((%d)), training_pkt_num = ((%d))\n", -+ j, sat_tab->beam_set_train_val_diff[j], -+ sat_tab->beam_set_train_cnt[j]); -+ } -+ -+ sat_tab->pre_beacon_counter = sat_tab->beacon_counter; -+ sat_tab->update_beam_idx = 0; -+ sat_tab->pkt_counter = 0; -+ -+ sat_tab->fast_training_beam_num = 0; -+ phydm_set_rfu_beam_pattern_type2(dm); -+ sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; -+ fat_tab->fat_state = FAT_TRAINING_STATE; -+ } -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+void phydm_beam_switch_workitem_callback( -+ void *context) -+{ -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ -+#if DEV_BUS_TYPE != RT_PCI_INTERFACE -+ sat_tab->pkt_skip_statistic_en = 1; -+#endif -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", -+ sat_tab->pkt_skip_statistic_en); -+ -+ phydm_update_beam_pattern_type2(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -+ -+#if DEV_BUS_TYPE != RT_PCI_INTERFACE -+#if 0 -+ /*odm_stall_execution(sat_tab->latch_time);*/ -+#endif -+ sat_tab->pkt_skip_statistic_en = 0; -+#endif -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", -+ sat_tab->pkt_skip_statistic_en, sat_tab->latch_time); -+} -+ -+void phydm_beam_decision_workitem_callback( -+ void *context) -+{ -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ SmartAnt ] Beam decision Workitem Callback\n"); -+ phydm_fast_ant_training_hl_smart_antenna_type2(dm); -+} -+#endif -+ -+void phydm_process_rssi_for_hb_smtant_type2( -+ void *dm_void, -+ void *phy_info_void, -+ void *pkt_info_void, -+ u8 rssi_avg) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_phyinfo_struct *phy_info = (struct phydm_phyinfo_struct *)phy_info_void; -+ struct phydm_perpkt_info_struct *pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ u8 train_pkt_number; -+ u32 beam_tmp; -+ u8 rx_power_ant0 = phy_info->rx_mimo_signal_strength[0]; -+ u8 rx_power_ant1 = phy_info->rx_mimo_signal_strength[1]; -+ u8 rx_evm_ant0 = phy_info->rx_mimo_evm_dbm[0]; -+ u8 rx_evm_ant1 = phy_info->rx_mimo_evm_dbm[1]; -+ -+ /*@[Beacon]*/ -+ if (pktinfo->is_packet_beacon) { -+ sat_tab->beacon_counter++; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "MatchBSSID_beacon_counter = ((%d))\n", -+ sat_tab->beacon_counter); -+ -+ if (sat_tab->beacon_counter >= sat_tab->pre_beacon_counter + 2) { -+ sat_tab->update_beam_idx++; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n", -+ sat_tab->pre_beacon_counter, -+ sat_tab->pkt_counter, -+ sat_tab->update_beam_idx); -+ -+ sat_tab->pre_beacon_counter = sat_tab->beacon_counter; -+ sat_tab->pkt_counter = 0; -+ } -+ } -+ /*@[data]*/ -+ else if (pktinfo->is_packet_to_self) { -+ if (sat_tab->pkt_skip_statistic_en == 0) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "ID[%d] pkt_cnt=((%d)): Beam_set = ((%d)), RSSI{A,B,avg} = {%d, %d, %d}\n", -+ pktinfo->station_id, sat_tab->pkt_counter, -+ sat_tab->fast_training_beam_num, -+ rx_power_ant0, rx_power_ant1, rssi_avg); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Rate_ss = ((%d)), EVM{A,B} = {%d, %d}, RX Rate =", -+ pktinfo->rate_ss, rx_evm_ant0, rx_evm_ant1); -+ phydm_print_rate(dm, dm->rx_rate, DBG_ANT_DIV); -+ -+ if (sat_tab->pkt_counter >= 1) /*packet skip count*/ -+ { -+ sat_tab->beam_set_rssi_avg_sum[sat_tab->fast_training_beam_num] += rssi_avg; -+ sat_tab->statistic_pkt_cnt[sat_tab->fast_training_beam_num]++; -+ -+ sat_tab->beam_path_rssi_sum[sat_tab->fast_training_beam_num][0] += rx_power_ant0; -+ sat_tab->beam_path_rssi_sum[sat_tab->fast_training_beam_num][1] += rx_power_ant1; -+ -+ if (pktinfo->rate_ss == 2) { -+ sat_tab->beam_path_evm_2ss_sum[sat_tab->fast_training_beam_num][0] += rx_evm_ant0; -+ sat_tab->beam_path_evm_2ss_sum[sat_tab->fast_training_beam_num][1] += rx_evm_ant1; -+ sat_tab->beam_path_evm_2ss_cnt[sat_tab->fast_training_beam_num]++; -+ } else { -+ sat_tab->beam_path_evm_1ss_sum[sat_tab->fast_training_beam_num] += rx_evm_ant0; -+ sat_tab->beam_path_evm_1ss_cnt[sat_tab->fast_training_beam_num]++; -+ } -+ } -+ -+ sat_tab->pkt_counter++; -+ -+ train_pkt_number = sat_tab->beam_set_train_cnt[sat_tab->fast_training_beam_num]; -+ -+ if (sat_tab->pkt_counter >= train_pkt_number) { -+ sat_tab->update_beam_idx++; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "pre_beacon_counter = ((%d)), Update_new_beam = ((%d))\n", -+ sat_tab->pre_beacon_counter, -+ sat_tab->update_beam_idx); -+ -+ sat_tab->pre_beacon_counter = sat_tab->beacon_counter; -+ sat_tab->pkt_counter = 0; -+ } -+ } -+ } -+ -+ if (sat_tab->update_beam_idx > 0) { -+ sat_tab->update_beam_idx = 0; -+ -+ if (sat_tab->fast_training_beam_num >= ((u32)sat_tab->total_beam_set_num - 1)) { -+ fat_tab->fat_state = FAT_DECISION_STATE; -+ -+ #if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ phydm_fast_ant_training_hl_smart_antenna_type2(dm); /*@go to make decision*/ -+ #endif -+ #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) -+ odm_schedule_work_item(&sat_tab->hl_smart_antenna_decision_workitem); -+ #endif -+ -+ } else { -+ beam_tmp = sat_tab->fast_training_beam_num; -+ sat_tab->fast_training_beam_num++; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Update Beam_num (( %d )) -> (( %d ))\n", -+ beam_tmp, sat_tab->fast_training_beam_num); -+ phydm_set_rfu_beam_pattern_type2(dm); -+ sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; -+ -+ fat_tab->fat_state = FAT_TRAINING_STATE; -+ } -+ } -+} -+#endif -+ -+#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) -+ -+void phydm_hl_smart_ant_type1_init_8821a( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ u32 value32; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "***8821A SmartAnt_Init => ant_div_type=[Hong-Lin Smart ant Type1]\n"); -+ -+#if 0 -+ /* @---------------------------------------- */ -+ /* @GPIO 2-3 for Beam control */ -+ /* reg0x66[2]=0 */ -+ /* reg0x44[27:26] = 0 */ -+ /* reg0x44[23:16] enable_output for P_GPIO[7:0] */ -+ /* reg0x44[15:8] output_value for P_GPIO[7:0] */ -+ /* reg0x40[1:0] = 0 GPIO function */ -+ /* @------------------------------------------ */ -+#endif -+ -+ /*@GPIO setting*/ -+ odm_set_mac_reg(dm, R_0x64, BIT(18), 0); -+ odm_set_mac_reg(dm, R_0x44, BIT(27) | BIT(26), 0); -+ odm_set_mac_reg(dm, R_0x44, BIT(19) | BIT(18), 0x3); /*@enable_output for P_GPIO[3:2]*/ -+#if 0 -+ /*odm_set_mac_reg(dm, R_0x44, BIT(11)|BIT(10), 0);*/ /*output value*/ -+#endif -+ odm_set_mac_reg(dm, R_0x40, BIT(1) | BIT(0), 0); /*@GPIO function*/ -+ -+ /*@Hong_lin smart antenna HW setting*/ -+ sat_tab->rfu_codeword_total_bit_num = 24; /*@max=32*/ -+ sat_tab->rfu_each_ant_bit_num = 4; -+ sat_tab->beam_patten_num_each_ant = 4; -+ -+#if DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ sat_tab->latch_time = 100; /*@mu sec*/ -+#elif DEV_BUS_TYPE == RT_USB_INTERFACE -+ sat_tab->latch_time = 100; /*@mu sec*/ -+#endif -+ sat_tab->pkt_skip_statistic_en = 0; -+ -+ sat_tab->ant_num = 1; /*@max=8*/ -+ sat_tab->ant_num_total = NUM_ANTENNA_8821A; -+ sat_tab->first_train_ant = MAIN_ANT; -+ -+ sat_tab->rfu_codeword_table[0] = 0x0; -+ sat_tab->rfu_codeword_table[1] = 0x4; -+ sat_tab->rfu_codeword_table[2] = 0x8; -+ sat_tab->rfu_codeword_table[3] = 0xc; -+ -+ sat_tab->rfu_codeword_table_5g[0] = 0x1; -+ sat_tab->rfu_codeword_table_5g[1] = 0x2; -+ sat_tab->rfu_codeword_table_5g[2] = 0x4; -+ sat_tab->rfu_codeword_table_5g[3] = 0x8; -+ -+ sat_tab->fix_beam_pattern_en = 0; -+ sat_tab->decision_holding_period = 0; -+ -+ /*@beam training setting*/ -+ sat_tab->pkt_counter = 0; -+ sat_tab->per_beam_training_pkt_num = 10; -+ -+ /*set default beam*/ -+ sat_tab->fast_training_beam_num = 0; -+ sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; -+ phydm_set_all_ant_same_beam_num(dm); -+ -+ fat_tab->fat_state = FAT_BEFORE_LINK_STATE; -+ -+ odm_set_bb_reg(dm, R_0xca4, MASKDWORD, 0x01000100); -+ odm_set_bb_reg(dm, R_0xca8, MASKDWORD, 0x01000100); -+ -+ /*@[BB] FAT setting*/ -+ odm_set_bb_reg(dm, R_0xc08, BIT(18) | BIT(17) | BIT(16), sat_tab->ant_num); -+ odm_set_bb_reg(dm, R_0xc08, BIT(31), 0); /*@increase ant num every FAT period 0:+1, 1+2*/ -+ odm_set_bb_reg(dm, R_0x8c4, BIT(2) | BIT(1), 1); /*@change cca antenna timming threshold if no CCA occurred: 0:200ms / 1:100ms / 2:no use / 3: 300*/ -+ odm_set_bb_reg(dm, R_0x8c4, BIT(0), 1); /*@FAT_watchdog_en*/ -+ -+ value32 = odm_get_mac_reg(dm, R_0x7b4, MASKDWORD); -+ odm_set_mac_reg(dm, R_0x7b4, MASKDWORD, value32 | (BIT(16) | BIT(17))); /*Reg7B4[16]=1 enable antenna training */ -+ /*Reg7B4[17]=1 enable match MAC addr*/ -+ odm_set_mac_reg(dm, R_0x7b4, 0xFFFF, 0); /*@Match MAC ADDR*/ -+ odm_set_mac_reg(dm, R_0x7b0, MASKDWORD, 0); -+} -+ -+u32 phydm_construct_hl_beam_codeword( -+ void *dm_void, -+ u32 *beam_pattern_idx, -+ u32 ant_num) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ u32 codeword = 0; -+ u32 data_tmp; -+ u32 i; -+ u32 break_counter = 0; -+ -+ if (ant_num < 8) { -+ for (i = 0; i < (sat_tab->ant_num_total); i++) { -+#if 0 -+ /*PHYDM_DBG(dm,DBG_ANT_DIV, "beam_pattern_num[%x] = %x\n",i,beam_pattern_num[i] );*/ -+#endif -+ if ((i < (sat_tab->first_train_ant - 1)) || break_counter >= sat_tab->ant_num) { -+ data_tmp = 0; -+ } else { -+ break_counter++; -+ -+ if (beam_pattern_idx[i] == 0) { -+ if (*dm->band_type == ODM_BAND_5G) -+ data_tmp = sat_tab->rfu_codeword_table_5g[0]; -+ else -+ data_tmp = sat_tab->rfu_codeword_table[0]; -+ -+ } else if (beam_pattern_idx[i] == 1) { -+ if (*dm->band_type == ODM_BAND_5G) -+ data_tmp = sat_tab->rfu_codeword_table_5g[1]; -+ else -+ data_tmp = sat_tab->rfu_codeword_table[1]; -+ -+ } else if (beam_pattern_idx[i] == 2) { -+ if (*dm->band_type == ODM_BAND_5G) -+ data_tmp = sat_tab->rfu_codeword_table_5g[2]; -+ else -+ data_tmp = sat_tab->rfu_codeword_table[2]; -+ -+ } else if (beam_pattern_idx[i] == 3) { -+ if (*dm->band_type == ODM_BAND_5G) -+ data_tmp = sat_tab->rfu_codeword_table_5g[3]; -+ else -+ data_tmp = sat_tab->rfu_codeword_table[3]; -+ } -+ } -+ -+ codeword |= (data_tmp << (i * 4)); -+ } -+ } -+ -+ return codeword; -+} -+ -+void phydm_update_beam_pattern( -+ void *dm_void, -+ u32 codeword, -+ u32 codeword_length) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ u8 i; -+ boolean beam_ctrl_signal; -+ u32 one = 0x1; -+ u32 reg44_tmp_p, reg44_tmp_n, reg44_ori; -+ u8 devide_num = 4; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] Set Beam Pattern =0x%x\n", -+ codeword); -+ -+ reg44_ori = odm_get_mac_reg(dm, R_0x44, MASKDWORD); -+ reg44_tmp_p = reg44_ori; -+#if 0 -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_ori =0x%x\n", reg44_ori);*/ -+#endif -+ -+ devide_num = (sat_tab->rfu_protocol_type == 2) ? 6 : 4; -+ -+ for (i = 0; i <= (codeword_length - 1); i++) { -+ beam_ctrl_signal = (boolean)((codeword & BIT(i)) >> i); -+ -+ if (dm->debug_components & DBG_ANT_DIV) { -+ if (i == (codeword_length - 1)) -+ pr_debug("%d ]\n", beam_ctrl_signal); -+ else if (i == 0) -+ pr_debug("Send codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal); -+ else if ((i % devide_num) == (devide_num - 1)) -+ pr_debug("%d | ", beam_ctrl_signal); -+ else -+ pr_debug("%d ", beam_ctrl_signal); -+ } -+ -+ if (dm->support_ic_type == ODM_RTL8821) { -+ #if (RTL8821A_SUPPORT == 1) -+ reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT(10))); /*@clean bit 10 & 11*/ -+ reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10)); -+ reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10))); -+ -+#if 0 -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n);*/ -+#endif -+ odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); -+ odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); -+ #endif -+ } -+ #if (RTL8822B_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8822B) { -+ if (sat_tab->rfu_protocol_type == 2) { -+ reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*@clean bit 8*/ -+ reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*@get new clk high/low, exclusive-or*/ -+ -+ reg44_tmp_p |= (beam_ctrl_signal << 8); -+ -+ odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); -+ ODM_delay_us(10); -+#if 0 -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal);*/ -+#endif -+ -+ } else { -+ reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT(8))); /*@clean bit 9 & 8*/ -+ reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8)); -+ reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8))); -+ -+#if 0 -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n); */ -+#endif -+ odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_p); -+ ODM_delay_us(10); -+ odm_set_mac_reg(dm, R_0x44, MASKDWORD, reg44_tmp_n); -+ ODM_delay_us(10); -+ } -+ } -+ #endif -+ } -+} -+ -+void phydm_update_rx_idle_beam( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ u32 i; -+ -+ sat_tab->update_beam_codeword = phydm_construct_hl_beam_codeword(dm, -+ &sat_tab->rx_idle_beam[0], -+ sat_tab->ant_num); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Set target beam_pattern codeword = (( 0x%x ))\n", -+ sat_tab->update_beam_codeword); -+ -+ for (i = 0; i < (sat_tab->ant_num); i++) -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ Update Rx-Idle-Beam ] RxIdleBeam[%d] =%d\n", i, -+ sat_tab->rx_idle_beam[i]); -+ -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -+#endif -+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) -+ odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); -+#if 0 -+ /*odm_stall_execution(1);*/ -+#endif -+#endif -+ -+ sat_tab->pre_codeword = sat_tab->update_beam_codeword; -+} -+ -+void phydm_hl_smart_ant_debug( -+ void *dm_void, -+ char input[][16], -+ u32 *_used, -+ char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 one = 0x1; -+ u32 codeword_length = sat_tab->rfu_codeword_total_bit_num; -+ u32 beam_ctrl_signal, i; -+ u8 devide_num = 4; -+ -+ if (dm_value[0] == 1) { /*@fix beam pattern*/ -+ -+ sat_tab->fix_beam_pattern_en = dm_value[1]; -+ -+ if (sat_tab->fix_beam_pattern_en == 1) { -+ sat_tab->fix_beam_pattern_codeword = dm_value[2]; -+ -+ if (sat_tab->fix_beam_pattern_codeword > (one << codeword_length)) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n", -+ sat_tab->fix_beam_pattern_codeword, -+ codeword_length); -+ -+ (sat_tab->fix_beam_pattern_codeword) &= 0xffffff; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ SmartAnt ] Auto modify to (0x%x)\n", -+ sat_tab->fix_beam_pattern_codeword); -+ } -+ -+ sat_tab->update_beam_codeword = sat_tab->fix_beam_pattern_codeword; -+ -+ /*@---------------------------------------------------------*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "Fix Beam Pattern\n"); -+ -+ devide_num = (sat_tab->rfu_protocol_type == 2) ? 6 : 4; -+ -+ for (i = 0; i <= (codeword_length - 1); i++) { -+ beam_ctrl_signal = (boolean)((sat_tab->update_beam_codeword & BIT(i)) >> i); -+ -+ if (i == (codeword_length - 1)) -+ PDM_SNPF(out_len, used, -+ output + used, -+ out_len - used, -+ "%d]\n", -+ beam_ctrl_signal); -+ else if (i == 0) -+ PDM_SNPF(out_len, used, -+ output + used, -+ out_len - used, -+ "Send Codeword[1:24] to RFU -> [%d", -+ beam_ctrl_signal); -+ else if ((i % devide_num) == (devide_num - 1)) -+ PDM_SNPF(out_len, used, -+ output + used, -+ out_len - used, "%d|", -+ beam_ctrl_signal); -+ else -+ PDM_SNPF(out_len, used, -+ output + used, -+ out_len - used, "%d", -+ beam_ctrl_signal); -+ } -+/*@---------------------------------------------------------*/ -+ -+ #if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -+ #endif -+ #if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) -+ odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); -+#if 0 -+ /*odm_stall_execution(1);*/ -+#endif -+ #endif -+ } else if (sat_tab->fix_beam_pattern_en == 0) -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] Smart Antenna: Enable\n"); -+ -+ } else if (dm_value[0] == 2) { /*set latch time*/ -+ -+ sat_tab->latch_time = dm_value[1]; -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ SmartAnt ] latch_time =0x%x\n", -+ sat_tab->latch_time); -+ } else if (dm_value[0] == 3) { -+ sat_tab->fix_training_num_en = dm_value[1]; -+ -+ if (sat_tab->fix_training_num_en == 1) { -+ sat_tab->per_beam_training_pkt_num = (u8)dm_value[2]; -+ sat_tab->decision_holding_period = (u8)dm_value[3]; -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[SmartAnt][Dbg] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n", -+ sat_tab->fix_training_num_en, -+ sat_tab->per_beam_training_pkt_num, -+ sat_tab->decision_holding_period); -+ -+ } else if (sat_tab->fix_training_num_en == 0) { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] AUTO per_beam_training_pkt_num\n"); -+ } -+ } else if (dm_value[0] == 4) { -+ if (dm_value[1] == 1) { -+ sat_tab->ant_num = 1; -+ sat_tab->first_train_ant = MAIN_ANT; -+ -+ } else if (dm_value[1] == 2) { -+ sat_tab->ant_num = 1; -+ sat_tab->first_train_ant = AUX_ANT; -+ -+ } else if (dm_value[1] == 3) { -+ sat_tab->ant_num = 2; -+ sat_tab->first_train_ant = MAIN_ANT; -+ } -+ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] Set ant Num = (( %d )), first_train_ant = (( %d ))\n", -+ sat_tab->ant_num, (sat_tab->first_train_ant - 1)); -+ } else if (dm_value[0] == 5) { -+ if (dm_value[1] <= 3) { -+ sat_tab->rfu_codeword_table[dm_value[1]] = dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] Set Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n", -+ dm_value[1], dm_value[2]); -+ } else { -+ for (i = 0; i < 4; i++) { -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "[ SmartAnt ] Show Beam_2G: (( %d )), RFU codeword table = (( 0x%x ))\n", -+ i, sat_tab->rfu_codeword_table[i]); -+ } -+ } -+ } else if (dm_value[0] == 6) { -+ if (dm_value[1] <= 3) { -+ sat_tab->rfu_codeword_table_5g[dm_value[1]] = dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] Set Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n", -+ dm_value[1], dm_value[2]); -+ } else { -+ for (i = 0; i < 4; i++) { -+ PDM_SNPF(out_len, used, output + used, -+ out_len - used, -+ "[ SmartAnt ] Show Beam_5G: (( %d )), RFU codeword table = (( 0x%x ))\n", -+ i, sat_tab->rfu_codeword_table_5g[i]); -+ } -+ } -+ } else if (dm_value[0] == 7) { -+ if (dm_value[1] <= 4) { -+ sat_tab->beam_patten_num_each_ant = dm_value[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] Set Beam number = (( %d ))\n", -+ sat_tab->beam_patten_num_each_ant); -+ } else { -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "[ SmartAnt ] Show Beam number = (( %d ))\n", -+ sat_tab->beam_patten_num_each_ant); -+ } -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_set_all_ant_same_beam_num( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ -+ if (dm->ant_div_type == HL_SW_SMART_ANT_TYPE1) { /*@2ant for 8821A*/ -+ -+ sat_tab->rx_idle_beam[0] = sat_tab->fast_training_beam_num; -+ sat_tab->rx_idle_beam[1] = sat_tab->fast_training_beam_num; -+ } -+ -+ sat_tab->update_beam_codeword = phydm_construct_hl_beam_codeword(dm, -+ &sat_tab->rx_idle_beam[0], -+ sat_tab->ant_num); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ SmartAnt ] Set all ant beam_pattern: codeword = (( 0x%x ))\n", -+ sat_tab->update_beam_codeword); -+ -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -+#endif -+#if DEV_BUS_TYPE == RT_USB_INTERFACE || DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) -+ odm_schedule_work_item(&sat_tab->hl_smart_antenna_workitem); -+/*odm_stall_execution(1);*/ -+#endif -+} -+ -+void odm_fast_ant_training_hl_smart_antenna_type1( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ struct phydm_fat_struct *fat_tab = &dm->dm_fat_table; -+ struct sw_antenna_switch *dm_swat_table = &dm->dm_swat_table; -+ u32 codeword = 0, i, j; -+ u32 target_ant; -+ u32 avg_rssi_tmp, avg_rssi_tmp_ma; -+ u32 target_ant_beam_max_rssi[SUPPORT_RF_PATH_NUM] = {0}; -+ u32 max_beam_ant_rssi = 0; -+ u32 target_ant_beam[SUPPORT_RF_PATH_NUM] = {0}; -+ u32 beam_tmp; -+ u8 next_ant; -+ u32 rssi_sorting_seq[SUPPORT_BEAM_PATTERN_NUM] = {0}; -+ u32 rank_idx_seq[SUPPORT_BEAM_PATTERN_NUM] = {0}; -+ u32 rank_idx_out[SUPPORT_BEAM_PATTERN_NUM] = {0}; -+ u8 per_beam_rssi_diff_tmp = 0, training_pkt_num_offset; -+ u32 break_counter = 0; -+ u32 used_ant; -+ -+ if (!dm->is_linked) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[No Link!!!]\n"); -+ -+ if (fat_tab->is_become_linked == true) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Link->no Link\n"); -+ fat_tab->fat_state = FAT_BEFORE_LINK_STATE; -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "change to (( %d )) FAT_state\n", -+ fat_tab->fat_state); -+ -+ fat_tab->is_become_linked = dm->is_linked; -+ } -+ return; -+ -+ } else { -+ if (fat_tab->is_become_linked == false) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Linked !!!]\n"); -+ -+ fat_tab->fat_state = FAT_PREPARE_STATE; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "change to (( %d )) FAT_state\n", -+ fat_tab->fat_state); -+ -+#if 0 -+ /*sat_tab->fast_training_beam_num = 0;*/ -+ /*phydm_set_all_ant_same_beam_num(dm);*/ -+#endif -+ -+ fat_tab->is_become_linked = dm->is_linked; -+ } -+ } -+ -+ if (!(*fat_tab->p_force_tx_by_desc)) { -+ if (dm->is_one_entry_only == true) -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_REG); -+ else -+ odm_tx_by_tx_desc_or_reg(dm, TX_BY_DESC); -+ } -+ -+#if 0 -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "HL Smart ant Training: state (( %d ))\n", fat_tab->fat_state);*/ -+#endif -+ -+ /* @[DECISION STATE] */ -+ /*@=======================================================================================*/ -+ if (fat_tab->fat_state == FAT_DECISION_STATE) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ 3. In Decision state]\n"); -+ phydm_fast_training_enable(dm, FAT_OFF); -+ -+ break_counter = 0; -+ /*@compute target beam in each antenna*/ -+ for (i = (sat_tab->first_train_ant - 1); i < sat_tab->ant_num_total; i++) { -+ for (j = 0; j < (sat_tab->beam_patten_num_each_ant); j++) { -+ if (sat_tab->pkt_rssi_cnt[i][j] == 0) { -+ avg_rssi_tmp = sat_tab->pkt_rssi_pre[i][j]; -+ avg_rssi_tmp = (avg_rssi_tmp >= 2) ? (avg_rssi_tmp - 2) : avg_rssi_tmp; -+ avg_rssi_tmp_ma = avg_rssi_tmp; -+ } else { -+ avg_rssi_tmp = (sat_tab->pkt_rssi_sum[i][j]) / (sat_tab->pkt_rssi_cnt[i][j]); -+ avg_rssi_tmp_ma = (avg_rssi_tmp + sat_tab->pkt_rssi_pre[i][j]) >> 1; -+ } -+ -+ rssi_sorting_seq[j] = avg_rssi_tmp; -+ sat_tab->pkt_rssi_pre[i][j] = avg_rssi_tmp; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "ant[%d], Beam[%d]: pkt_cnt=(( %d )), avg_rssi_MA=(( %d )), avg_rssi=(( %d ))\n", -+ i, j, sat_tab->pkt_rssi_cnt[i][j], -+ avg_rssi_tmp_ma, avg_rssi_tmp); -+ -+ if (avg_rssi_tmp > target_ant_beam_max_rssi[i]) { -+ target_ant_beam[i] = j; -+ target_ant_beam_max_rssi[i] = avg_rssi_tmp; -+ } -+ -+ /*reset counter value*/ -+ sat_tab->pkt_rssi_sum[i][j] = 0; -+ sat_tab->pkt_rssi_cnt[i][j] = 0; -+ } -+ sat_tab->rx_idle_beam[i] = target_ant_beam[i]; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "---------> Target of ant[%d]: Beam_num-(( %d )) RSSI= ((%d))\n", -+ i, target_ant_beam[i], -+ target_ant_beam_max_rssi[i]); -+ -+#if 0 -+ /*sorting*/ -+ /*@ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Pre]rssi_sorting_seq = [%d, %d, %d, %d]\n", rssi_sorting_seq[0], rssi_sorting_seq[1], rssi_sorting_seq[2], rssi_sorting_seq[3]); -+ */ -+ -+ /*phydm_seq_sorting(dm, &rssi_sorting_seq[0], &rank_idx_seq[0], &rank_idx_out[0], SUPPORT_BEAM_PATTERN_NUM);*/ -+ -+ /*@ -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rssi_sorting_seq = [%d, %d, %d, %d]\n", rssi_sorting_seq[0], rssi_sorting_seq[1], rssi_sorting_seq[2], rssi_sorting_seq[3]); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rank_idx_seq = [%d, %d, %d, %d]\n", rank_idx_seq[0], rank_idx_seq[1], rank_idx_seq[2], rank_idx_seq[3]); -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[Post]rank_idx_out = [%d, %d, %d, %d]\n", rank_idx_out[0], rank_idx_out[1], rank_idx_out[2], rank_idx_out[3]); -+ */ -+#endif -+ -+ if (target_ant_beam_max_rssi[i] > max_beam_ant_rssi) { -+ target_ant = i; -+ max_beam_ant_rssi = target_ant_beam_max_rssi[i]; -+#if -+ /*PHYDM_DBG(dm, DBG_ANT_DIV, "Target of ant = (( %d )) max_beam_ant_rssi = (( %d ))\n", -+ target_ant, max_beam_ant_rssi);*/ -+#endif -+ } -+ break_counter++; -+ if (break_counter >= sat_tab->ant_num) -+ break; -+ } -+ -+#ifdef CONFIG_FAT_PATCH -+ break_counter = 0; -+ for (i = (sat_tab->first_train_ant - 1); i < sat_tab->ant_num_total; i++) { -+ for (j = 0; j < (sat_tab->beam_patten_num_each_ant); j++) { -+ per_beam_rssi_diff_tmp = (u8)(max_beam_ant_rssi - sat_tab->pkt_rssi_pre[i][j]); -+ sat_tab->beam_train_rssi_diff[i][j] = per_beam_rssi_diff_tmp; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "ant[%d], Beam[%d]: RSSI_diff= ((%d))\n", -+ i, j, per_beam_rssi_diff_tmp); -+ } -+ break_counter++; -+ if (break_counter >= sat_tab->ant_num) -+ break; -+ } -+#endif -+ -+ if (target_ant == 0) -+ target_ant = MAIN_ANT; -+ else if (target_ant == 1) -+ target_ant = AUX_ANT; -+ -+ if (sat_tab->ant_num > 1) { -+ /* @[ update RX ant ]*/ -+ odm_update_rx_idle_ant(dm, (u8)target_ant); -+ -+ /* @[ update TX ant ]*/ -+ odm_update_tx_ant(dm, (u8)target_ant, (fat_tab->train_idx)); -+ } -+ -+ /*set beam in each antenna*/ -+ phydm_update_rx_idle_beam(dm); -+ -+ odm_ant_div_on_off(dm, ANTDIV_ON, ANT_PATH_A); -+ fat_tab->fat_state = FAT_PREPARE_STATE; -+ return; -+ } -+ /* @[TRAINING STATE] */ -+ else if (fat_tab->fat_state == FAT_TRAINING_STATE) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "[ 2. In Training state]\n"); -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "fat_beam_n = (( %d )), pre_fat_beam_n = (( %d ))\n", -+ sat_tab->fast_training_beam_num, -+ sat_tab->pre_fast_training_beam_num); -+ -+ if (sat_tab->fast_training_beam_num > sat_tab->pre_fast_training_beam_num) -+ -+ sat_tab->force_update_beam_en = 0; -+ -+ else { -+ sat_tab->force_update_beam_en = 1; -+ -+ sat_tab->pkt_counter = 0; -+ beam_tmp = sat_tab->fast_training_beam_num; -+ if (sat_tab->fast_training_beam_num >= (sat_tab->beam_patten_num_each_ant - 1)) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Timeout Update] Beam_num (( %d )) -> (( decision ))\n", -+ sat_tab->fast_training_beam_num); -+ fat_tab->fat_state = FAT_DECISION_STATE; -+ odm_fast_ant_training_hl_smart_antenna_type1(dm); -+ -+ } else { -+ sat_tab->fast_training_beam_num++; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[Timeout Update] Beam_num (( %d )) -> (( %d ))\n", -+ beam_tmp, -+ sat_tab->fast_training_beam_num); -+ phydm_set_all_ant_same_beam_num(dm); -+ fat_tab->fat_state = FAT_TRAINING_STATE; -+ } -+ } -+ sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[prepare state] Update Pre_Beam =(( %d ))\n", -+ sat_tab->pre_fast_training_beam_num); -+ } -+ /* @[Prepare state] */ -+ /*@=======================================================================================*/ -+ else if (fat_tab->fat_state == FAT_PREPARE_STATE) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "\n\n[ 1. In Prepare state]\n"); -+ -+ if (dm->pre_traffic_load == dm->traffic_load) { -+ if (sat_tab->decision_holding_period != 0) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Holding_period = (( %d )), return!!!\n", -+ sat_tab->decision_holding_period); -+ sat_tab->decision_holding_period--; -+ return; -+ } -+ } -+ -+ /* Set training packet number*/ -+ if (sat_tab->fix_training_num_en == 0) { -+ switch (dm->traffic_load) { -+ case TRAFFIC_HIGH: -+ sat_tab->per_beam_training_pkt_num = 8; -+ sat_tab->decision_holding_period = 2; -+ break; -+ case TRAFFIC_MID: -+ sat_tab->per_beam_training_pkt_num = 6; -+ sat_tab->decision_holding_period = 3; -+ break; -+ case TRAFFIC_LOW: -+ sat_tab->per_beam_training_pkt_num = 3; /*ping 60000*/ -+ sat_tab->decision_holding_period = 4; -+ break; -+ case TRAFFIC_ULTRA_LOW: -+ sat_tab->per_beam_training_pkt_num = 1; -+ sat_tab->decision_holding_period = 6; -+ break; -+ default: -+ break; -+ } -+ } -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "Fix_training_en = (( %d )), training_pkt_num_base = (( %d )), holding_period = ((%d))\n", -+ sat_tab->fix_training_num_en, -+ sat_tab->per_beam_training_pkt_num, -+ sat_tab->decision_holding_period); -+ -+#ifdef CONFIG_FAT_PATCH -+ break_counter = 0; -+ for (i = (sat_tab->first_train_ant - 1); i < sat_tab->ant_num_total; i++) { -+ for (j = 0; j < (sat_tab->beam_patten_num_each_ant); j++) { -+ per_beam_rssi_diff_tmp = sat_tab->beam_train_rssi_diff[i][j]; -+ training_pkt_num_offset = per_beam_rssi_diff_tmp; -+ -+ if (sat_tab->per_beam_training_pkt_num > training_pkt_num_offset) -+ sat_tab->beam_train_cnt[i][j] = sat_tab->per_beam_training_pkt_num - training_pkt_num_offset; -+ else -+ sat_tab->beam_train_cnt[i][j] = 1; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "ant[%d]: Beam_num-(( %d )) training_pkt_num = ((%d))\n", -+ i, j, sat_tab->beam_train_cnt[i][j]); -+ } -+ break_counter++; -+ if (break_counter >= sat_tab->ant_num) -+ break; -+ } -+ -+ phydm_fast_training_enable(dm, FAT_OFF); -+ sat_tab->pre_beacon_counter = sat_tab->beacon_counter; -+ sat_tab->update_beam_idx = 0; -+ -+ if (*dm->band_type == ODM_BAND_5G) { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Set 5G ant\n"); -+ /*used_ant = (sat_tab->first_train_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;*/ -+ used_ant = sat_tab->first_train_ant; -+ } else { -+ PHYDM_DBG(dm, DBG_ANT_DIV, "Set 2.4G ant\n"); -+ used_ant = sat_tab->first_train_ant; -+ } -+ -+ odm_update_rx_idle_ant(dm, (u8)used_ant); -+ -+#else -+ /* Set training MAC addr. of target */ -+ odm_set_next_mac_addr_target(dm); -+ phydm_fast_training_enable(dm, FAT_ON); -+#endif -+ -+ odm_ant_div_on_off(dm, ANTDIV_OFF, ANT_PATH_A); -+ sat_tab->pkt_counter = 0; -+ sat_tab->fast_training_beam_num = 0; -+ phydm_set_all_ant_same_beam_num(dm); -+ sat_tab->pre_fast_training_beam_num = sat_tab->fast_training_beam_num; -+ fat_tab->fat_state = FAT_TRAINING_STATE; -+ } -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+void phydm_beam_switch_workitem_callback( -+ void *context) -+{ -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ struct smt_ant_honbo *sat_tab = &dm->dm_sat_table; -+ -+#if DEV_BUS_TYPE != RT_PCI_INTERFACE -+ sat_tab->pkt_skip_statistic_en = 1; -+#endif -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", -+ sat_tab->pkt_skip_statistic_en); -+ -+ phydm_update_beam_pattern(dm, sat_tab->update_beam_codeword, sat_tab->rfu_codeword_total_bit_num); -+ -+#if DEV_BUS_TYPE != RT_PCI_INTERFACE -+#if 0 -+ /*odm_stall_execution(sat_tab->latch_time);*/ -+#endif -+ sat_tab->pkt_skip_statistic_en = 0; -+#endif -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", -+ sat_tab->pkt_skip_statistic_en, sat_tab->latch_time); -+} -+ -+void phydm_beam_decision_workitem_callback( -+ void *context) -+{ -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+ PHYDM_DBG(dm, DBG_ANT_DIV, -+ "[ SmartAnt ] Beam decision Workitem Callback\n"); -+ odm_fast_ant_training_hl_smart_antenna_type1(dm); -+} -+#endif -+ -+#endif /*@#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/ -+ -+#endif /*@#ifdef CONFIG_HL_SMART_ANTENNA*/ -+ -+void phydm_smt_ant_config( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant *smtant_table = &dm->smtant_table; -+ -+#if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) -+ -+ dm->support_ability |= ODM_BB_SMT_ANT; -+ smtant_table->smt_ant_vendor = SMTANT_CUMITEK; -+ smtant_table->smt_ant_type = 1; -+#if (RTL8822B_SUPPORT == 1) -+ dm->rfe_type = SMTANT_TMP_RFE_TYPE; -+#endif -+#elif (defined(CONFIG_HL_SMART_ANTENNA)) -+ -+ dm->support_ability |= ODM_BB_SMT_ANT; -+ smtant_table->smt_ant_vendor = SMTANT_HON_BO; -+ -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ smtant_table->smt_ant_type = 1; -+#endif -+ -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 -+ smtant_table->smt_ant_type = 2; -+#endif -+#endif -+ -+ PHYDM_DBG(dm, DBG_SMT_ANT, -+ "[SmtAnt Config] Vendor=((%d)), Smt_ant_type =((%d))\n", -+ smtant_table->smt_ant_vendor, smtant_table->smt_ant_type); -+} -+ -+void phydm_smt_ant_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct smt_ant *smtant_table = &dm->smtant_table; -+ -+ phydm_smt_ant_config(dm); -+ -+ if (smtant_table->smt_ant_vendor == SMTANT_CUMITEK) { -+#if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) -+#if (RTL8822B_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8822B) -+ phydm_cumitek_smt_ant_init_8822b(dm); -+#endif -+ -+#if (RTL8197F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8197F) -+ phydm_cumitek_smt_ant_init_8197f(dm); -+#endif -+/*@jj add 20170822*/ -+#if (RTL8192F_SUPPORT == 1) -+ if (dm->support_ic_type == ODM_RTL8192F) -+ phydm_cumitek_smt_ant_init_8192f(dm); -+#endif -+#endif /*@#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))*/ -+ -+ } else if (smtant_table->smt_ant_vendor == SMTANT_HON_BO) { -+#if (defined(CONFIG_HL_SMART_ANTENNA)) -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ if (dm->support_ic_type == ODM_RTL8821) -+ phydm_hl_smart_ant_type1_init_8821a(dm); -+#endif -+ -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 -+ if (dm->support_ic_type == ODM_RTL8822B) -+ phydm_hl_smart_ant_type2_init_8822b(dm); -+#endif -+#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA))*/ -+ } -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_smt_ant.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_smt_ant.h -new file mode 100644 -index 000000000000..3a408c4c69e2 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_smt_ant.h -@@ -0,0 +1,210 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+#ifndef __PHYDMSMTANT_H__ -+#define __PHYDMSMTANT_H__ -+ -+/*@#define SMT_ANT_VERSION "1.1"*/ /*@2017.03.13*/ -+/*@#define SMT_ANT_VERSION "1.2"*/ /*@2017.03.28*/ -+#define SMT_ANT_VERSION "2.0" /* @Add Cumitek SmtAnt 2017.05.25*/ -+ -+#define SMTANT_RTK 1 -+#define SMTANT_HON_BO 2 -+#define SMTANT_CUMITEK 3 -+ -+#if (defined(CONFIG_SMART_ANTENNA)) -+ -+#if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) -+struct smt_ant_cumitek { -+ u8 tx_ant_idx[2][ODM_ASSOCIATE_ENTRY_NUM]; /*@[pathA~B] [MACID 0~128]*/ -+ u8 rx_default_ant_idx[2]; /*@[pathA~B]*/ -+}; -+#endif -+ -+#if (defined(CONFIG_HL_SMART_ANTENNA)) -+struct smt_ant_honbo { -+ u32 latch_time; -+ boolean pkt_skip_statistic_en; -+ u32 fix_beam_pattern_en; -+ u32 fix_training_num_en; -+ u32 fix_beam_pattern_codeword; -+ u32 update_beam_codeword; -+ u32 ant_num; /*number of "used" smart beam antenna*/ -+ u32 ant_num_total;/*number of "total" smart beam antenna*/ -+ u32 first_train_ant; /*@decide witch antenna to train first*/ -+ -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1 -+ u32 pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];/*@rssi of each path with a certain beam pattern*/ -+ u8 beam_train_rssi_diff[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM]; -+ u8 beam_train_cnt[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM]; -+ u32 rfu_codeword_table[4]; /*@2G beam truth table*/ -+ u32 rfu_codeword_table_5g[4]; /*@5G beam truth table*/ -+ u32 beam_patten_num_each_ant;/*@number of beam can be switched in each antenna*/ -+ u32 rx_idle_beam[SUPPORT_RF_PATH_NUM]; -+ u32 pkt_rssi_sum[8][SUPPORT_BEAM_PATTERN_NUM]; -+ u32 pkt_rssi_cnt[8][SUPPORT_BEAM_PATTERN_NUM]; -+ #endif -+ -+ u32 fast_training_beam_num;/*@current training beam_set index*/ -+ u32 pre_fast_training_beam_num;/*pre training beam_set index*/ -+ u32 rfu_codeword_total_bit_num; /* @total bit number of RFU protocol*/ -+ u32 rfu_each_ant_bit_num; /* @bit number of RFU protocol for each ant*/ -+ u8 per_beam_training_pkt_num; -+ u8 decision_holding_period; -+ -+ -+ u32 pre_codeword; -+ boolean force_update_beam_en; -+ u32 beacon_counter; -+ u32 pre_beacon_counter; -+ u8 pkt_counter; /*@packet number that each beam-set should be colected in training state*/ -+ u8 update_beam_idx; /*@the index announce that the beam can be updated*/ -+ u8 rfu_protocol_type; -+ u16 rfu_protocol_delay_time; -+ -+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_WORK_ITEM hl_smart_antenna_workitem; -+ RT_WORK_ITEM hl_smart_antenna_decision_workitem; -+ #endif -+ -+ -+ #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 -+ u8 beam_set_avg_rssi_pre[SUPPORT_BEAM_SET_PATTERN_NUM]; /*@avg pre_rssi of each beam set*/ -+ u8 beam_set_train_val_diff[SUPPORT_BEAM_SET_PATTERN_NUM]; /*@rssi of a beam pattern set, ex: a set = {ant1_beam=1, ant2_beam=3}*/ -+ u8 beam_set_train_cnt[SUPPORT_BEAM_SET_PATTERN_NUM]; /*@training pkt num of each beam set*/ -+ u32 beam_set_rssi_avg_sum[SUPPORT_BEAM_SET_PATTERN_NUM]; /*@RSSI_sum of avg(pathA,pathB) for each beam-set)*/ -+ u32 beam_path_rssi_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*@RSSI_sum of each path for each beam-set)*/ -+ -+ u8 beam_set_avg_evm_2ss_pre[SUPPORT_BEAM_SET_PATTERN_NUM]; -+ u32 beam_path_evm_2ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*@2SS evm_sum of each path for each beam-set)*/ -+ u32 beam_path_evm_2ss_cnt[SUPPORT_BEAM_SET_PATTERN_NUM]; -+ -+ u8 beam_set_avg_evm_1ss_pre[SUPPORT_BEAM_SET_PATTERN_NUM]; -+ u32 beam_path_evm_1ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM];/*@1SS evm_sum of each path for each beam-set)*/ -+ u32 beam_path_evm_1ss_cnt[SUPPORT_BEAM_SET_PATTERN_NUM]; -+ -+ u32 statistic_pkt_cnt[SUPPORT_BEAM_SET_PATTERN_NUM]; /*@statistic_pkt_cnt for SmtAnt make decision*/ -+ -+ u8 total_beam_set_num; /*@number of beam set can be switched*/ -+ u8 total_beam_set_num_2g;/*@number of beam set can be switched in 2G*/ -+ u8 total_beam_set_num_5g;/*@number of beam set can be switched in 5G*/ -+ -+ u8 rfu_codeword_table_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*@2G beam truth table*/ -+ u8 rfu_codeword_table_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*@5G beam truth table*/ -+ u8 rx_idle_beam_set_idx; /*the filanl decsion result*/ -+ #endif -+ -+ -+}; -+#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA))*/ -+ -+struct smt_ant { -+ u8 smt_ant_vendor; -+ u8 smt_ant_type; -+ u8 tx_desc_mode; /*@0:3 bit mode, 1:2 bit mode*/ -+ #if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) -+ struct smt_ant_cumitek cumi_smtant_table; -+ #endif -+}; -+ -+#if (defined(CONFIG_CUMITEK_SMART_ANTENNA)) -+void phydm_cumitek_smt_tx_ant_update( -+ void *dm_void, -+ u8 tx_ant_idx_path_a, -+ u8 tx_ant_idx_path_b, -+ u32 mac_id); -+ -+void phydm_cumitek_smt_rx_default_ant_update( -+ void *dm_void, -+ u8 rx_ant_idx_path_a, -+ u8 rx_ant_idx_path_b); -+ -+void phydm_cumitek_smt_ant_debug( -+ void *dm_void, -+ char input[][16], -+ u32 *_used, -+ char *output, -+ u32 *_out_len); -+ -+#endif -+ -+#if (defined(CONFIG_HL_SMART_ANTENNA)) -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phydm_beam_switch_workitem_callback( -+ void *context); -+ -+void phydm_beam_decision_workitem_callback( -+ void *context); -+#endif /*@#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/ -+ -+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2 -+void phydm_hl_smart_ant_type2_init_8822b( -+ void *dm_void); -+ -+void phydm_update_beam_pattern_type2( -+ void *dm_void, -+ u32 codeword, -+ u32 codeword_length); -+ -+void phydm_set_rfu_beam_pattern_type2( -+ void *dm_void); -+ -+void phydm_hl_smt_ant_dbg_type2( -+ void *dm_void, -+ char input[][16], -+ u32 *_used, -+ char *output, -+ u32 *_out_len); -+ -+void phydm_process_rssi_for_hb_smtant_type2( -+ void *dm_void, -+ void *phy_info_void, -+ void *pkt_info_void, -+ u8 rssi_avg); -+ -+#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))*/ -+ -+#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) -+ -+void phydm_update_beam_pattern( -+ void *dm_void, -+ u32 codeword, -+ u32 codeword_length); -+ -+void phydm_set_all_ant_same_beam_num( -+ void *dm_void); -+ -+void phydm_hl_smart_ant_debug( -+ void *dm_void, -+ char input[][16], -+ u32 *_used, -+ char *output, -+ u32 *_out_len); -+ -+#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))*/ -+#endif /*@#if (defined(CONFIG_HL_SMART_ANTENNA))*/ -+void phydm_smt_ant_init(void *dm_void); -+#endif /*@#if (defined(CONFIG_SMART_ANTENNA))*/ -+#endif -\ No newline at end of file -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_soml.c b/drivers/staging/rtl8723cs/hal/phydm/phydm_soml.c -new file mode 100644 -index 000000000000..cd4001afd0cf ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_soml.c -@@ -0,0 +1,1451 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+ -+/************************************************************* -+ * include files -+ ************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#ifdef CONFIG_ADAPTIVE_SOML -+ -+void phydm_dynamicsoftmletting(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 ret_val; -+ -+#if (RTL8822B_SUPPORT == 1) -+ if (!*dm->mp_mode) { -+ if (dm->support_ic_type & ODM_RTL8822B) { -+ if (!dm->is_linked | dm->iot_table.is_linked_cmw500) -+ return; -+ -+ if (dm->bsomlenabled) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "PHYDM_DynamicSoftMLSetting(): SoML has been enable, skip dynamic SoML switch\n"); -+ return; -+ } -+ -+ ret_val = odm_get_bb_reg(dm, R_0xf8c, MASKBYTE0); -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "PHYDM_DynamicSoftMLSetting(): Read 0xF8C = 0x%08X\n", -+ ret_val); -+ -+ if (ret_val < 0x16) { -+ PHYDM_DBG(dm, ODM_COMP_API, -+ "PHYDM_DynamicSoftMLSetting(): 0xF8C(== 0x%08X) < 0x16, enable SoML\n", -+ ret_val); -+ phydm_somlrxhp_setting(dm, true); -+#if 0 -+ /*odm_set_bb_reg(dm, R_0x19a8, MASKDWORD, 0xc10a0000);*/ -+#endif -+ dm->bsomlenabled = true; -+ } -+ } -+ } -+#endif -+} -+ -+void phydm_soml_on_off(void *dm_void, u8 swch) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ -+ if (swch == SOML_ON) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "(( Turn on )) SOML\n"); -+ -+ if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) -+ odm_set_bb_reg(dm, R_0x998, BIT(6), swch); -+#if (RTL8822B_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8822B) -+ phydm_somlrxhp_setting(dm, true); -+#endif -+ -+ } else if (swch == SOML_OFF) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "(( Turn off )) SOML\n"); -+ -+ if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) -+ odm_set_bb_reg(dm, R_0x998, BIT(6), swch); -+#if (RTL8822B_SUPPORT == 1) -+ else if (dm->support_ic_type == ODM_RTL8822B) -+ phydm_somlrxhp_setting(dm, false); -+#endif -+ } -+ soml_tab->soml_on_off = swch; -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phydm_adaptive_soml_callback(struct phydm_timer_list *timer) -+{ -+ void *adapter = (void *)timer->Adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ -+ #if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ #if USE_WORKITEM -+ odm_schedule_work_item(&soml_tab->phydm_adaptive_soml_workitem); -+ #else -+ { -+#if 0 -+ /*@dbg_print("%s\n",__func__);*/ -+#endif -+ phydm_adsl(dm); -+ } -+ #endif -+ #else -+ odm_schedule_work_item(&soml_tab->phydm_adaptive_soml_workitem); -+ #endif -+} -+ -+void phydm_adaptive_soml_workitem_callback(void *context) -+{ -+#ifdef CONFIG_ADAPTIVE_SOML -+ void *adapter = (void *)context; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+#if 0 -+ /*@dbg_print("%s\n",__func__);*/ -+#endif -+ phydm_adsl(dm); -+#endif -+} -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+void phydm_adaptive_soml_callback(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *padapter = dm->adapter; -+ -+ if (*dm->is_net_closed == true) -+ return; -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ phydm_adsl(dm); -+ else { -+ /* @Can't do I/O in timer callback*/ -+ phydm_run_in_thread_cmd(dm, -+ phydm_adaptive_soml_workitem_callback, -+ dm); -+ } -+} -+ -+void phydm_adaptive_soml_workitem_callback(void *context) -+{ -+ struct dm_struct *dm = (void *)context; -+ -+#if 0 -+ /*@dbg_print("%s\n",__func__);*/ -+#endif -+ phydm_adsl(dm); -+} -+ -+#else -+void phydm_adaptive_soml_callback(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "******SOML_Callback******\n"); -+ phydm_adsl(dm); -+} -+#endif -+ -+void phydm_rx_rate_for_soml(void *dm_void, void *pkt_info_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ u8 data_rate; -+ -+ pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ data_rate = (pktinfo->data_rate & 0x7f); -+ -+ if (pktinfo->data_rate >= ODM_RATEMCS0 && -+ pktinfo->data_rate <= ODM_RATEMCS31) -+ soml_tab->ht_cnt[data_rate - ODM_RATEMCS0]++; -+ else if ((pktinfo->data_rate >= ODM_RATEVHTSS1MCS0) && -+ (pktinfo->data_rate <= ODM_RATEVHTSS4MCS9)) -+ soml_tab->vht_cnt[data_rate - ODM_RATEVHTSS1MCS0]++; -+} -+ -+void phydm_rx_qam_for_soml(void *dm_void, void *pkt_info_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ struct phydm_perpkt_info_struct *pktinfo = NULL; -+ u8 date_rate; -+ -+ pktinfo = (struct phydm_perpkt_info_struct *)pkt_info_void; -+ date_rate = (pktinfo->data_rate & 0x7f); -+ if (soml_tab->soml_state_cnt < (soml_tab->soml_train_num << 1)) { -+ if (soml_tab->soml_on_off == SOML_ON) { -+ return; -+ } else if (soml_tab->soml_on_off == SOML_OFF) { -+ if (date_rate >= ODM_RATEMCS8 && -+ date_rate <= ODM_RATEMCS10) -+ soml_tab->num_ht_qam[BPSK_QPSK]++; -+ -+ else if ((date_rate >= ODM_RATEMCS11) && -+ (date_rate <= ODM_RATEMCS12)) -+ soml_tab->num_ht_qam[QAM16]++; -+ -+ else if ((date_rate >= ODM_RATEMCS13) && -+ (date_rate <= ODM_RATEMCS15)) -+ soml_tab->num_ht_qam[QAM64]++; -+ -+ else if ((date_rate >= ODM_RATEVHTSS2MCS0) && -+ (date_rate <= ODM_RATEVHTSS2MCS2)) -+ soml_tab->num_vht_qam[BPSK_QPSK]++; -+ -+ else if ((date_rate >= ODM_RATEVHTSS2MCS3) && -+ (date_rate <= ODM_RATEVHTSS2MCS4)) -+ soml_tab->num_vht_qam[QAM16]++; -+ -+ else if ((date_rate >= ODM_RATEVHTSS2MCS5) && -+ (date_rate <= ODM_RATEVHTSS2MCS5)) -+ soml_tab->num_vht_qam[QAM64]++; -+ -+ else if ((date_rate >= ODM_RATEVHTSS2MCS8) && -+ (date_rate <= ODM_RATEVHTSS2MCS9)) -+ soml_tab->num_vht_qam[QAM256]++; -+ } -+ } -+} -+ -+void phydm_soml_reset_rx_rate(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u8 order; -+ -+ for (order = 0; order < HT_RATE_IDX; order++) { -+ soml_tab->ht_cnt[order] = 0; -+ soml_tab->pre_ht_cnt[order] = 0; -+ soml_tab->ht_cnt_on[order] = 0; -+ soml_tab->ht_cnt_off[order] = 0; -+ soml_tab->ht_crc_ok_cnt_on[order] = 0; -+ soml_tab->ht_crc_fail_cnt_on[order] = 0; -+ soml_tab->ht_crc_ok_cnt_off[order] = 0; -+ soml_tab->ht_crc_fail_cnt_off[order] = 0; -+ } -+ -+ for (order = 0; order < VHT_RATE_IDX; order++) { -+ soml_tab->vht_cnt[order] = 0; -+ soml_tab->pre_vht_cnt[order] = 0; -+ soml_tab->vht_cnt_on[order] = 0; -+ soml_tab->vht_cnt_off[order] = 0; -+ soml_tab->vht_crc_ok_cnt_on[order] = 0; -+ soml_tab->vht_crc_fail_cnt_on[order] = 0; -+ soml_tab->vht_crc_ok_cnt_off[order] = 0; -+ soml_tab->vht_crc_fail_cnt_off[order] = 0; -+ } -+} -+ -+void phydm_soml_reset_qam(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u8 order; -+ -+ for (order = 0; order < HT_ORDER_TYPE; order++) -+ soml_tab->num_ht_qam[order] = 0; -+ -+ for (order = 0; order < VHT_ORDER_TYPE; order++) -+ soml_tab->num_vht_qam[order] = 0; -+} -+ -+void phydm_soml_cfo_process(void *dm_void, s32 *diff_a, s32 *diff_b) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 value32, value32_1, value32_2, value32_3; -+ s32 cfo_acq_a, cfo_acq_b, cfo_end_a, cfo_end_b; -+ -+ value32 = odm_get_bb_reg(dm, R_0xd10, MASKDWORD); -+ value32_1 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD); -+ value32_2 = odm_get_bb_reg(dm, R_0xd50, MASKDWORD); -+ value32_3 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD); -+ -+ cfo_acq_a = (s32)((value32 & 0x1fff0000) >> 16); -+ cfo_end_a = (s32)((value32_1 & 0x1fff0000) >> 16); -+ cfo_acq_b = (s32)((value32_2 & 0x1fff0000) >> 16); -+ cfo_end_b = (s32)((value32_3 & 0x1fff0000) >> 16); -+ -+ *diff_a = ((cfo_acq_a >= cfo_end_a) ? (cfo_acq_a - cfo_end_a) : -+ (cfo_end_a - cfo_acq_a)); -+ *diff_b = ((cfo_acq_b >= cfo_end_b) ? (cfo_acq_b - cfo_end_b) : -+ (cfo_end_b - cfo_acq_b)); -+ -+ *diff_a = ((*diff_a * 312) + (*diff_a >> 1)) >> 12; /* @312.5/2^12 */ -+ *diff_b = ((*diff_b * 312) + (*diff_b >> 1)) >> 12; /* @312.5/2^12 */ -+} -+ -+void phydm_soml_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u32 used = *_used; -+ u32 out_len = *_out_len; -+ u32 dm_value[10] = {0}; -+ u8 i = 0, input_idx = 0; -+ -+ if (!(dm->support_ability & ODM_BB_ADAPTIVE_SOML)) -+ return; -+ -+ for (i = 0; i < 5; i++) { -+ if (input[i + 1]) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]); -+ input_idx++; -+ } -+ } -+ -+ if (input_idx == 0) -+ return; -+ -+ if (dm_value[0] == 1) { /*Turn on/off SOML*/ -+ soml_tab->soml_select = (u8)dm_value[1]; -+ -+ } else if (dm_value[0] == 2) { /*training number for SOML*/ -+ -+ soml_tab->soml_train_num = (u8)dm_value[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "soml_train_num = ((%d))\n", -+ soml_tab->soml_train_num); -+ } else if (dm_value[0] == 3) { /*training interval for SOML*/ -+ -+ soml_tab->soml_intvl = (u8)dm_value[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "soml_intvl = ((%d))\n", soml_tab->soml_intvl); -+ } else if (dm_value[0] == 4) { /*@function period for SOML*/ -+ -+ soml_tab->soml_period = (u8)dm_value[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "soml_period = ((%d))\n", soml_tab->soml_period); -+ } else if (dm_value[0] == 5) { /*@delay_time for SOML*/ -+ -+ soml_tab->soml_delay_time = (u8)dm_value[1]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "soml_delay_time = ((%d))\n", -+ soml_tab->soml_delay_time); -+ } else if (dm_value[0] == 6) { /* @for SOML Rx QAM distribution th*/ -+ if (dm_value[1] == 256) { -+ soml_tab->qam256_dist_th = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "qam256_dist_th = ((%d))\n", -+ soml_tab->qam256_dist_th); -+ } else if (dm_value[1] == 64) { -+ soml_tab->qam64_dist_th = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "qam64_dist_th = ((%d))\n", -+ soml_tab->qam64_dist_th); -+ } else if (dm_value[1] == 16) { -+ soml_tab->qam16_dist_th = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "qam16_dist_th = ((%d))\n", -+ soml_tab->qam16_dist_th); -+ } else if (dm_value[1] == 4) { -+ soml_tab->bpsk_qpsk_dist_th = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "bpsk_qpsk_dist_th = ((%d))\n", -+ soml_tab->bpsk_qpsk_dist_th); -+ } -+ } else if (dm_value[0] == 7) { /* @for SOML cfo th*/ -+ if (dm_value[1] == 256) { -+ soml_tab->cfo_qam256_th = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "cfo_qam256_th = ((%d KHz))\n", -+ soml_tab->cfo_qam256_th); -+ } else if (dm_value[1] == 64) { -+ soml_tab->cfo_qam64_th = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "cfo_qam64_th = ((%d KHz))\n", -+ soml_tab->cfo_qam64_th); -+ } else if (dm_value[1] == 16) { -+ soml_tab->cfo_qam16_th = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "cfo_qam16_th = ((%d KHz))\n", -+ soml_tab->cfo_qam16_th); -+ } else if (dm_value[1] == 4) { -+ soml_tab->cfo_qpsk_th = (u8)dm_value[2]; -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "cfo_qpsk_th = ((%d KHz))\n", -+ soml_tab->cfo_qpsk_th); -+ } -+ } else if (dm_value[0] == 100) { -+ /*show parameters*/ -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "soml_select = ((%d))\n", soml_tab->soml_select); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "soml_train_num = ((%d))\n", -+ soml_tab->soml_train_num); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "soml_intvl = ((%d))\n", soml_tab->soml_intvl); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "soml_period = ((%d))\n", soml_tab->soml_period); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "soml_delay_time = ((%d))\n\n", -+ soml_tab->soml_delay_time); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "qam256_dist_th = ((%d)), qam64_dist_th = ((%d)), ", -+ soml_tab->qam256_dist_th, -+ soml_tab->qam64_dist_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "qam16_dist_th = ((%d)), bpsk_qpsk_dist_th = ((%d))\n", -+ soml_tab->qam16_dist_th, -+ soml_tab->bpsk_qpsk_dist_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "cfo_qam256_th = ((%d KHz)), cfo_qam64_th = ((%d KHz)), ", -+ soml_tab->cfo_qam256_th, -+ soml_tab->cfo_qam64_th); -+ PDM_SNPF(out_len, used, output + used, out_len - used, -+ "cfo_qam16_th = ((%d KHz)), cfo_qpsk_th = ((%d KHz))\n", -+ soml_tab->cfo_qam16_th, -+ soml_tab->cfo_qpsk_th); -+ } -+ *_used = used; -+ *_out_len = out_len; -+} -+ -+void phydm_soml_stats_ht_on(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u8 i, mcs0; -+ u16 num_bytes_diff, num_rate_diff; -+ -+ mcs0 = ODM_RATEMCS0; -+ for (i = mcs0; i <= ODM_RATEMCS15; i++) { -+ num_rate_diff = soml_tab->ht_cnt[i - mcs0] - -+ soml_tab->pre_ht_cnt[i - mcs0]; -+ soml_tab->ht_cnt_on[i - mcs0] += num_rate_diff; -+ soml_tab->pre_ht_cnt[i - mcs0] = soml_tab->ht_cnt[i - mcs0]; -+ num_bytes_diff = soml_tab->ht_byte[i - mcs0] - -+ soml_tab->pre_ht_byte[i - mcs0]; -+ soml_tab->ht_byte_on[i - mcs0] += num_bytes_diff; -+ soml_tab->pre_ht_byte[i - mcs0] = soml_tab->ht_byte[i - mcs0]; -+ } -+} -+ -+void phydm_soml_stats_ht_off(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u8 i, mcs0; -+ u16 num_bytes_diff, num_rate_diff; -+ -+ mcs0 = ODM_RATEMCS0; -+ for (i = mcs0; i <= ODM_RATEMCS15; i++) { -+ num_rate_diff = soml_tab->ht_cnt[i - mcs0] - -+ soml_tab->pre_ht_cnt[i - mcs0]; -+ soml_tab->ht_cnt_off[i - mcs0] += num_rate_diff; -+ soml_tab->pre_ht_cnt[i - mcs0] = soml_tab->ht_cnt[i - mcs0]; -+ num_bytes_diff = soml_tab->ht_byte[i - mcs0] - -+ soml_tab->pre_ht_byte[i - mcs0]; -+ soml_tab->ht_byte_off[i - mcs0] += num_bytes_diff; -+ soml_tab->pre_ht_byte[i - mcs0] = soml_tab->ht_byte[i - mcs0]; -+ } -+} -+ -+void phydm_soml_stats_vht_on(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u8 j, vht0; -+ u16 num_bytes_diff, num_rate_diff; -+ -+ vht0 = ODM_RATEVHTSS1MCS0; -+ for (j = vht0; j <= ODM_RATEVHTSS2MCS9; j++) { -+ num_rate_diff = soml_tab->vht_cnt[j - vht0] - -+ soml_tab->pre_vht_cnt[j - vht0]; -+ soml_tab->vht_cnt_on[j - vht0] += num_rate_diff; -+ soml_tab->pre_vht_cnt[j - vht0] = soml_tab->vht_cnt[j - vht0]; -+ num_bytes_diff = soml_tab->vht_byte[j - vht0] - -+ soml_tab->pre_vht_byte[j - vht0]; -+ soml_tab->vht_byte_on[j - vht0] += num_bytes_diff; -+ soml_tab->pre_vht_byte[j - vht0] = soml_tab->vht_byte[j - vht0]; -+ } -+} -+ -+void phydm_soml_stats_vht_off(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u8 j, vht0; -+ u16 num_bytes_diff, num_rate_diff; -+ -+ vht0 = ODM_RATEVHTSS1MCS0; -+ for (j = vht0; j <= ODM_RATEVHTSS2MCS9; j++) { -+ num_rate_diff = soml_tab->vht_cnt[j - vht0] - -+ soml_tab->pre_vht_cnt[j - vht0]; -+ soml_tab->vht_cnt_off[j - vht0] += num_rate_diff; -+ soml_tab->pre_vht_cnt[j - vht0] = soml_tab->vht_cnt[j - vht0]; -+ num_bytes_diff = soml_tab->vht_byte[j - vht0] - -+ soml_tab->pre_vht_byte[j - vht0]; -+ soml_tab->vht_byte_off[j - vht0] += num_bytes_diff; -+ soml_tab->pre_vht_byte[j - vht0] = soml_tab->vht_byte[j - vht0]; -+ } -+} -+ -+void phydm_soml_statistics(void *dm_void, u8 on_off_state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ -+ if (on_off_state == SOML_ON) { -+ if (*dm->channel <= 14) -+ phydm_soml_stats_ht_on(dm); -+ if (dm->support_ic_type == ODM_RTL8822B) -+ phydm_soml_stats_vht_on(dm); -+ } else if (on_off_state == SOML_OFF) { -+ if (*dm->channel <= 14) -+ phydm_soml_stats_ht_off(dm); -+ if (dm->support_ic_type == ODM_RTL8822B) -+ phydm_soml_stats_vht_off(dm); -+ } -+} -+ -+void phydm_adsl_init_state(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ -+ u8 next_on_off; -+ u16 ht_reset[HT_RATE_IDX] = {0}, vht_reset[VHT_RATE_IDX] = {0}; -+ u8 size = sizeof(ht_reset[0]); -+ -+ phydm_soml_reset_rx_rate(dm); -+ odm_move_memory(dm, soml_tab->ht_byte, ht_reset, -+ HT_RATE_IDX * size); -+ odm_move_memory(dm, soml_tab->ht_byte_on, ht_reset, -+ HT_RATE_IDX * size); -+ odm_move_memory(dm, soml_tab->ht_byte_off, ht_reset, -+ HT_RATE_IDX * size); -+ odm_move_memory(dm, soml_tab->vht_byte, vht_reset, -+ VHT_RATE_IDX * size); -+ odm_move_memory(dm, soml_tab->vht_byte_on, vht_reset, -+ VHT_RATE_IDX * size); -+ odm_move_memory(dm, soml_tab->vht_byte_off, vht_reset, -+ VHT_RATE_IDX * size); -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ soml_tab->cfo_cnt++; -+ phydm_soml_cfo_process(dm, -+ &soml_tab->cfo_diff_a, -+ &soml_tab->cfo_diff_b); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n", -+ soml_tab->cfo_cnt, soml_tab->cfo_diff_a, -+ soml_tab->cfo_diff_b); -+ soml_tab->cfo_diff_sum_a += soml_tab->cfo_diff_a; -+ soml_tab->cfo_diff_sum_b += soml_tab->cfo_diff_b; -+ } -+ -+ soml_tab->is_soml_method_enable = 1; -+ soml_tab->get_stats = false; -+ soml_tab->soml_state_cnt++; -+ next_on_off = (soml_tab->soml_on_off == SOML_ON) ? SOML_ON : SOML_OFF; -+ phydm_soml_on_off(dm, next_on_off); -+ odm_set_timer(dm, &soml_tab->phydm_adaptive_soml_timer, -+ soml_tab->soml_delay_time); /*@ms*/ -+} -+ -+void phydm_adsl_odd_state(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u16 ht_reset[HT_RATE_IDX] = {0}, vht_reset[VHT_RATE_IDX] = {0}; -+ u8 size = sizeof(ht_reset[0]); -+ -+ soml_tab->get_stats = true; -+ soml_tab->soml_state_cnt++; -+ odm_move_memory(dm, soml_tab->pre_ht_cnt, soml_tab->ht_cnt, -+ HT_RATE_IDX * size); -+ odm_move_memory(dm, soml_tab->pre_vht_cnt, soml_tab->vht_cnt, -+ VHT_RATE_IDX * size); -+ odm_move_memory(dm, soml_tab->pre_ht_byte, soml_tab->ht_byte, -+ HT_RATE_IDX * size); -+ odm_move_memory(dm, soml_tab->pre_vht_byte, soml_tab->vht_byte, -+ VHT_RATE_IDX * size); -+ -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ soml_tab->cfo_cnt++; -+ phydm_soml_cfo_process(dm, -+ &soml_tab->cfo_diff_a, -+ &soml_tab->cfo_diff_b); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n", -+ soml_tab->cfo_cnt, soml_tab->cfo_diff_a, -+ soml_tab->cfo_diff_b); -+ soml_tab->cfo_diff_sum_a += soml_tab->cfo_diff_a; -+ soml_tab->cfo_diff_sum_b += soml_tab->cfo_diff_b; -+ } -+ odm_set_timer(dm, &soml_tab->phydm_adaptive_soml_timer, -+ soml_tab->soml_intvl); /*@ms*/ -+} -+ -+void phydm_adsl_even_state(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u8 next_on_off; -+ -+ soml_tab->get_stats = false; -+ if (dm->support_ic_type == ODM_RTL8822B) { -+ soml_tab->cfo_cnt++; -+ phydm_soml_cfo_process(dm, -+ &soml_tab->cfo_diff_a, -+ &soml_tab->cfo_diff_b); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ (%d) cfo_diff_a = %d KHz; cfo_diff_b = %d KHz ]\n", -+ soml_tab->cfo_cnt, soml_tab->cfo_diff_a, -+ soml_tab->cfo_diff_b); -+ soml_tab->cfo_diff_sum_a += soml_tab->cfo_diff_a; -+ soml_tab->cfo_diff_sum_b += soml_tab->cfo_diff_b; -+ } -+ soml_tab->soml_state_cnt++; -+ phydm_soml_statistics(dm, soml_tab->soml_on_off); -+ next_on_off = (soml_tab->soml_on_off == SOML_ON) ? SOML_OFF : SOML_ON; -+ phydm_soml_on_off(dm, next_on_off); -+ odm_set_timer(dm, &soml_tab->phydm_adaptive_soml_timer, -+ soml_tab->soml_delay_time); /*@ms*/ -+} -+ -+void phydm_adsl_decision_state(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ boolean on_above = false, off_above = false; -+ u8 i, max_idx_on = 0, max_idx_off = 0; -+ u8 next_on_off = soml_tab->soml_last_state; -+ u8 mcs0 = ODM_RATEMCS0, vht0 = ODM_RATEVHTSS1MCS0; -+ u8 crc_taget = soml_tab->soml_last_state; -+ u8 rate_num = 1, ss_shift = 0; -+ u16 ht_ok_max_on = 0, ht_fail_max_on = 0, utility_on = 0; -+ u16 ht_ok_max_off = 0, ht_fail_max_off = 0, utility_off = 0; -+ u16 vht_ok_max_on = 0, vht_fail_max_on = 0; -+ u16 vht_ok_max_off = 0, vht_fail_max_off = 0; -+ u16 num_total_qam = 0; -+ u16 cnt_max_on = 0, cnt_max_off = 0; -+ u32 ht_total_cnt_on = 0, ht_total_cnt_off = 0; -+ u32 total_ht_rate_on = 0, total_ht_rate_off = 0; -+ u32 vht_total_cnt_on = 0, vht_total_cnt_off = 0; -+ u32 total_vht_rate_on = 0, total_vht_rate_off = 0; -+ u32 rate_per_pkt_on = 0, rate_per_pkt_off = 0; -+ s32 cfo_diff_avg_a, cfo_diff_avg_b; -+ u16 vht_phy_rate_table[] = { -+ /*@20M*/ -+ 6, 13, 19, 26, 39, 52, 58, 65, 78, 90, /*@1SS MCS0~9*/ -+ 13, 26, 39, 52, 78, 104, 117, 130, 156, 180 /*@2SSMCS0~9*/ -+ }; -+ -+ if (dm->support_ic_type & ODM_IC_1SS) -+ rate_num = 1; -+ #ifdef PHYDM_COMPILE_ABOVE_2SS -+ else if (dm->support_ic_type & ODM_IC_2SS) -+ rate_num = 2; -+ #endif -+ #ifdef PHYDM_COMPILE_ABOVE_3SS -+ else if (dm->support_ic_type & ODM_IC_3SS) -+ rate_num = 3; -+ #endif -+ #ifdef PHYDM_COMPILE_ABOVE_4SS -+ else if (dm->support_ic_type & ODM_IC_4SS) -+ rate_num = 4; -+ #endif -+ else -+ pr_debug("%s: mismatch IC type %x\n", __func__, -+ dm->support_ic_type); -+ soml_tab->get_stats = false; -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "[Decisoin state ]\n"); -+ phydm_soml_statistics(dm, soml_tab->soml_on_off); -+ if (*dm->channel <= 14) { -+ /* @[Search 1st and 2nd rate by counter] */ -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = (i << 3); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "*ht_cnt_on HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (ss_shift), (ss_shift + 7), -+ soml_tab->ht_cnt_on[ss_shift + 0], -+ soml_tab->ht_cnt_on[ss_shift + 1], -+ soml_tab->ht_cnt_on[ss_shift + 2], -+ soml_tab->ht_cnt_on[ss_shift + 3], -+ soml_tab->ht_cnt_on[ss_shift + 4], -+ soml_tab->ht_cnt_on[ss_shift + 5], -+ soml_tab->ht_cnt_on[ss_shift + 6], -+ soml_tab->ht_cnt_on[ss_shift + 7]); -+ } -+ -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = (i << 3); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "*ht_cnt_off HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (ss_shift), (ss_shift + 7), -+ soml_tab->ht_cnt_off[ss_shift + 0], -+ soml_tab->ht_cnt_off[ss_shift + 1], -+ soml_tab->ht_cnt_off[ss_shift + 2], -+ soml_tab->ht_cnt_off[ss_shift + 3], -+ soml_tab->ht_cnt_off[ss_shift + 4], -+ soml_tab->ht_cnt_off[ss_shift + 5], -+ soml_tab->ht_cnt_off[ss_shift + 6], -+ soml_tab->ht_cnt_off[ss_shift + 7]); -+ } -+ -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = (i << 3); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "*ht_crc_ok_cnt_on HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (ss_shift), (ss_shift + 7), -+ soml_tab->ht_crc_ok_cnt_on[ss_shift + 0], -+ soml_tab->ht_crc_ok_cnt_on[ss_shift + 1], -+ soml_tab->ht_crc_ok_cnt_on[ss_shift + 2], -+ soml_tab->ht_crc_ok_cnt_on[ss_shift + 3], -+ soml_tab->ht_crc_ok_cnt_on[ss_shift + 4], -+ soml_tab->ht_crc_ok_cnt_on[ss_shift + 5], -+ soml_tab->ht_crc_ok_cnt_on[ss_shift + 6], -+ soml_tab->ht_crc_ok_cnt_on[ss_shift + 7]); -+ } -+ -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = (i << 3); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "*ht_crc_fail_cnt_on HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (ss_shift), (ss_shift + 7), -+ soml_tab->ht_crc_fail_cnt_on[ss_shift + 0], -+ soml_tab->ht_crc_fail_cnt_on[ss_shift + 1], -+ soml_tab->ht_crc_fail_cnt_on[ss_shift + 2], -+ soml_tab->ht_crc_fail_cnt_on[ss_shift + 3], -+ soml_tab->ht_crc_fail_cnt_on[ss_shift + 4], -+ soml_tab->ht_crc_fail_cnt_on[ss_shift + 5], -+ soml_tab->ht_crc_fail_cnt_on[ss_shift + 6], -+ soml_tab->ht_crc_fail_cnt_on[ss_shift + 7]); -+ } -+ -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = (i << 3); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "*ht_crc_ok_cnt_off HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (ss_shift), (ss_shift + 7), -+ soml_tab->ht_crc_ok_cnt_off[ss_shift + 0], -+ soml_tab->ht_crc_ok_cnt_off[ss_shift + 1], -+ soml_tab->ht_crc_ok_cnt_off[ss_shift + 2], -+ soml_tab->ht_crc_ok_cnt_off[ss_shift + 3], -+ soml_tab->ht_crc_ok_cnt_off[ss_shift + 4], -+ soml_tab->ht_crc_ok_cnt_off[ss_shift + 5], -+ soml_tab->ht_crc_ok_cnt_off[ss_shift + 6], -+ soml_tab->ht_crc_ok_cnt_off[ss_shift + 7]); -+ } -+ -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = (i << 3); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "*ht_crc_fail_cnt_off HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (ss_shift), (ss_shift + 7), -+ soml_tab->ht_crc_fail_cnt_off[ss_shift + 0], -+ soml_tab->ht_crc_fail_cnt_off[ss_shift + 1], -+ soml_tab->ht_crc_fail_cnt_off[ss_shift + 2], -+ soml_tab->ht_crc_fail_cnt_off[ss_shift + 3], -+ soml_tab->ht_crc_fail_cnt_off[ss_shift + 4], -+ soml_tab->ht_crc_fail_cnt_off[ss_shift + 5], -+ soml_tab->ht_crc_fail_cnt_off[ss_shift + 6], -+ soml_tab->ht_crc_fail_cnt_off[ss_shift + 7]); -+ } -+ for (i = ODM_RATEMCS0; i <= ODM_RATEMCS15; i++) { -+ ht_total_cnt_on += soml_tab->ht_cnt_on[i - mcs0]; -+ ht_total_cnt_off += soml_tab->ht_cnt_off[i - mcs0]; -+ total_ht_rate_on += (soml_tab->ht_cnt_on[i - mcs0] * -+ phy_rate_table[i]); -+ total_ht_rate_off += (soml_tab->ht_cnt_off[i - mcs0] * -+ phy_rate_table[i]); -+ if (soml_tab->ht_cnt_on[i - mcs0] > cnt_max_on) { -+ cnt_max_on = soml_tab->ht_cnt_on[i - mcs0]; -+ max_idx_on = i - mcs0; -+ } -+ -+ if (soml_tab->ht_cnt_off[i - mcs0] > cnt_max_off) { -+ cnt_max_off = soml_tab->ht_cnt_off[i - mcs0]; -+ max_idx_off = i - mcs0; -+ } -+ } -+ total_ht_rate_on = total_ht_rate_on << 3; -+ total_ht_rate_off = total_ht_rate_off << 3; -+ rate_per_pkt_on = (ht_total_cnt_on != 0) ? -+ (total_ht_rate_on / ht_total_cnt_on) : 0; -+ rate_per_pkt_off = (ht_total_cnt_off != 0) ? -+ (total_ht_rate_off / ht_total_cnt_off) : 0; -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ ht_ok_max_on = soml_tab->ht_crc_ok_cnt_on[max_idx_on]; -+ ht_fail_max_on = soml_tab->ht_crc_fail_cnt_on[max_idx_on]; -+ ht_ok_max_off = soml_tab->ht_crc_ok_cnt_off[max_idx_off]; -+ ht_fail_max_off = soml_tab->ht_crc_fail_cnt_off[max_idx_off]; -+ -+ if (ht_fail_max_on == 0) -+ ht_fail_max_on = 1; -+ -+ if (ht_fail_max_off == 0) -+ ht_fail_max_off = 1; -+ -+ if (ht_ok_max_on > ht_fail_max_on) -+ on_above = true; -+ -+ if (ht_ok_max_off > ht_fail_max_off) -+ off_above = true; -+ -+ if (on_above && !off_above) { -+ crc_taget = SOML_ON; -+ } else if (!on_above && off_above) { -+ crc_taget = SOML_OFF; -+ } else if (on_above && off_above) { -+ utility_on = (ht_ok_max_on << 7) / ht_fail_max_on; -+ utility_off = (ht_ok_max_off << 7) / ht_fail_max_off; -+ crc_taget = (utility_on == utility_off) ? -+ (soml_tab->soml_last_state) : -+ ((utility_on > utility_off) ? SOML_ON : -+ SOML_OFF); -+ -+ } else if (!on_above && !off_above) { -+ if (ht_ok_max_on == 0) -+ ht_ok_max_on = 1; -+ if (ht_ok_max_off == 0) -+ ht_ok_max_off = 1; -+ utility_on = (ht_fail_max_on << 7) / ht_ok_max_on; -+ utility_off = (ht_fail_max_off << 7) / ht_ok_max_off; -+ crc_taget = (utility_on == utility_off) ? -+ (soml_tab->soml_last_state) : -+ ((utility_on < utility_off) ? SOML_ON : -+ SOML_OFF); -+ } -+ #endif -+ } else if (dm->support_ic_type == ODM_RTL8822B) { -+ cfo_diff_avg_a = soml_tab->cfo_diff_sum_a / soml_tab->cfo_cnt; -+ cfo_diff_avg_b = soml_tab->cfo_diff_sum_b / soml_tab->cfo_cnt; -+ soml_tab->cfo_diff_avg_a = (soml_tab->cfo_cnt != 0) ? -+ cfo_diff_avg_a : 0; -+ soml_tab->cfo_diff_avg_b = (soml_tab->cfo_cnt != 0) ? -+ cfo_diff_avg_b : 0; -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ cfo_diff_avg_a = %d KHz; cfo_diff_avg_b = %d KHz]\n", -+ soml_tab->cfo_diff_avg_a, -+ soml_tab->cfo_diff_avg_b); -+ for (i = 0; i < VHT_ORDER_TYPE; i++) -+ num_total_qam += soml_tab->num_vht_qam[i]; -+ -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ ((2SS)) BPSK_QPSK_count = %d ; 16QAM_count = %d ; 64QAM_count = %d ; 256QAM_count = %d ; num_total_qam = %d]\n", -+ soml_tab->num_vht_qam[BPSK_QPSK], -+ soml_tab->num_vht_qam[QAM16], -+ soml_tab->num_vht_qam[QAM64], -+ soml_tab->num_vht_qam[QAM256], -+ num_total_qam); -+ if (((soml_tab->num_vht_qam[QAM256] * 100) > -+ (num_total_qam * soml_tab->qam256_dist_th)) && -+ cfo_diff_avg_a > soml_tab->cfo_qam256_th && -+ cfo_diff_avg_b > soml_tab->cfo_qam256_th) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ QAM256_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", -+ soml_tab->qam256_dist_th, -+ soml_tab->cfo_qam256_th); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); -+ phydm_soml_on_off(dm, SOML_OFF); -+ return; -+ } else if (((soml_tab->num_vht_qam[QAM64] * 100) > -+ (num_total_qam * soml_tab->qam64_dist_th)) && -+ (cfo_diff_avg_a > soml_tab->cfo_qam64_th) && -+ (cfo_diff_avg_b > soml_tab->cfo_qam64_th)) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ QAM64_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", -+ soml_tab->qam64_dist_th, -+ soml_tab->cfo_qam64_th); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); -+ phydm_soml_on_off(dm, SOML_OFF); -+ return; -+ } else if (((soml_tab->num_vht_qam[QAM16] * 100) > -+ (num_total_qam * soml_tab->qam16_dist_th)) && -+ (cfo_diff_avg_a > soml_tab->cfo_qam16_th) && -+ (cfo_diff_avg_b > soml_tab->cfo_qam16_th)) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ QAM16_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", -+ soml_tab->qam16_dist_th, -+ soml_tab->cfo_qam16_th); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); -+ phydm_soml_on_off(dm, SOML_OFF); -+ return; -+ } else if (((soml_tab->num_vht_qam[BPSK_QPSK] * 100) > -+ (num_total_qam * soml_tab->bpsk_qpsk_dist_th)) && -+ (cfo_diff_avg_a > soml_tab->cfo_qpsk_th) && -+ (cfo_diff_avg_b > soml_tab->cfo_qpsk_th)) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ BPSK_QPSK_ratio > %d ; cfo_diff_avg_a > %d KHz ==> SOML_OFF]\n", -+ soml_tab->bpsk_qpsk_dist_th, -+ soml_tab->cfo_qpsk_th); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); -+ phydm_soml_on_off(dm, SOML_OFF); -+ return; -+ } -+ -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = 10 * i; -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ vht_cnt_on VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d} ]\n", -+ (i + 1), -+ soml_tab->vht_cnt_on[ss_shift + 0], -+ soml_tab->vht_cnt_on[ss_shift + 1], -+ soml_tab->vht_cnt_on[ss_shift + 2], -+ soml_tab->vht_cnt_on[ss_shift + 3], -+ soml_tab->vht_cnt_on[ss_shift + 4], -+ soml_tab->vht_cnt_on[ss_shift + 5], -+ soml_tab->vht_cnt_on[ss_shift + 6], -+ soml_tab->vht_cnt_on[ss_shift + 7], -+ soml_tab->vht_cnt_on[ss_shift + 8], -+ soml_tab->vht_cnt_on[ss_shift + 9]); -+ } -+ -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = 10 * i; -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ vht_cnt_off VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d} ]\n", -+ (i + 1), -+ soml_tab->vht_cnt_off[ss_shift + 0], -+ soml_tab->vht_cnt_off[ss_shift + 1], -+ soml_tab->vht_cnt_off[ss_shift + 2], -+ soml_tab->vht_cnt_off[ss_shift + 3], -+ soml_tab->vht_cnt_off[ss_shift + 4], -+ soml_tab->vht_cnt_off[ss_shift + 5], -+ soml_tab->vht_cnt_off[ss_shift + 6], -+ soml_tab->vht_cnt_off[ss_shift + 7], -+ soml_tab->vht_cnt_off[ss_shift + 8], -+ soml_tab->vht_cnt_off[ss_shift + 9]); -+ } -+ -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = 10 * i; -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "*vht_crc_ok_cnt_on VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (i + 1), -+ soml_tab->vht_crc_ok_cnt_on[ss_shift + 0], -+ soml_tab->vht_crc_ok_cnt_on[ss_shift + 1], -+ soml_tab->vht_crc_ok_cnt_on[ss_shift + 2], -+ soml_tab->vht_crc_ok_cnt_on[ss_shift + 3], -+ soml_tab->vht_crc_ok_cnt_on[ss_shift + 4], -+ soml_tab->vht_crc_ok_cnt_on[ss_shift + 5], -+ soml_tab->vht_crc_ok_cnt_on[ss_shift + 6], -+ soml_tab->vht_crc_ok_cnt_on[ss_shift + 7], -+ soml_tab->vht_crc_ok_cnt_on[ss_shift + 8], -+ soml_tab->vht_crc_ok_cnt_on[ss_shift + 9]); -+ } -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = 10 * i; -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "*vht_crc_fail_cnt_on VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (i + 1), -+ soml_tab->vht_crc_fail_cnt_on[ss_shift + 0], -+ soml_tab->vht_crc_fail_cnt_on[ss_shift + 1], -+ soml_tab->vht_crc_fail_cnt_on[ss_shift + 2], -+ soml_tab->vht_crc_fail_cnt_on[ss_shift + 3], -+ soml_tab->vht_crc_fail_cnt_on[ss_shift + 4], -+ soml_tab->vht_crc_fail_cnt_on[ss_shift + 5], -+ soml_tab->vht_crc_fail_cnt_on[ss_shift + 6], -+ soml_tab->vht_crc_fail_cnt_on[ss_shift + 7], -+ soml_tab->vht_crc_fail_cnt_on[ss_shift + 8], -+ soml_tab->vht_crc_fail_cnt_on[ss_shift + 9]); -+ } -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = 10 * i; -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "*vht_crc_ok_cnt_off VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (i + 1), -+ soml_tab->vht_crc_ok_cnt_off[ss_shift + 0], -+ soml_tab->vht_crc_ok_cnt_off[ss_shift + 1], -+ soml_tab->vht_crc_ok_cnt_off[ss_shift + 2], -+ soml_tab->vht_crc_ok_cnt_off[ss_shift + 3], -+ soml_tab->vht_crc_ok_cnt_off[ss_shift + 4], -+ soml_tab->vht_crc_ok_cnt_off[ss_shift + 5], -+ soml_tab->vht_crc_ok_cnt_off[ss_shift + 6], -+ soml_tab->vht_crc_ok_cnt_off[ss_shift + 7], -+ soml_tab->vht_crc_ok_cnt_off[ss_shift + 8], -+ soml_tab->vht_crc_ok_cnt_off[ss_shift + 9]); -+ } -+ for (i = 0; i < rate_num; i++) { -+ ss_shift = 10 * i; -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "*vht_crc_fail_cnt_off VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n", -+ (i + 1), -+ soml_tab->vht_crc_fail_cnt_off[ss_shift + 0], -+ soml_tab->vht_crc_fail_cnt_off[ss_shift + 1], -+ soml_tab->vht_crc_fail_cnt_off[ss_shift + 2], -+ soml_tab->vht_crc_fail_cnt_off[ss_shift + 3], -+ soml_tab->vht_crc_fail_cnt_off[ss_shift + 4], -+ soml_tab->vht_crc_fail_cnt_off[ss_shift + 5], -+ soml_tab->vht_crc_fail_cnt_off[ss_shift + 6], -+ soml_tab->vht_crc_fail_cnt_off[ss_shift + 7], -+ soml_tab->vht_crc_fail_cnt_off[ss_shift + 8], -+ soml_tab->vht_crc_fail_cnt_off[ss_shift + 9]); -+ } -+ -+ for (i = ODM_RATEVHTSS2MCS0; i <= ODM_RATEVHTSS2MCS9; i++) { -+ vht_total_cnt_on += soml_tab->vht_cnt_on[i - vht0]; -+ vht_total_cnt_off += soml_tab->vht_cnt_off[i - vht0]; -+ total_vht_rate_on += (soml_tab->vht_cnt_on[i - vht0] * -+ vht_phy_rate_table[i - vht0]); -+ total_vht_rate_off += (soml_tab->vht_cnt_off[i - vht0] * -+ vht_phy_rate_table[i - vht0]); -+ -+ if (soml_tab->vht_cnt_on[i - vht0] > cnt_max_on) { -+ cnt_max_on = soml_tab->vht_cnt_on[i - vht0]; -+ max_idx_on = i - vht0; -+ } -+ -+ if (soml_tab->vht_cnt_off[i - vht0] > cnt_max_off) { -+ cnt_max_off = soml_tab->vht_cnt_off[i - vht0]; -+ max_idx_off = i - vht0; -+ } -+ } -+ total_vht_rate_on = total_vht_rate_on << 3; -+ total_vht_rate_off = total_vht_rate_off << 3; -+ rate_per_pkt_on = (vht_total_cnt_on != 0) ? -+ (total_vht_rate_on / vht_total_cnt_on) : 0; -+ rate_per_pkt_off = (vht_total_cnt_off != 0) ? -+ (total_vht_rate_off / vht_total_cnt_off) : 0; -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ vht_ok_max_on = soml_tab->vht_crc_ok_cnt_on[max_idx_on]; -+ vht_fail_max_on = soml_tab->vht_crc_fail_cnt_on[max_idx_on]; -+ vht_ok_max_off = soml_tab->vht_crc_ok_cnt_off[max_idx_off]; -+ vht_fail_max_off = soml_tab->vht_crc_fail_cnt_off[max_idx_off]; -+ -+ if (vht_fail_max_on == 0) -+ vht_fail_max_on = 1; -+ -+ if (vht_fail_max_off == 0) -+ vht_fail_max_off = 1; -+ -+ if (vht_ok_max_on > vht_fail_max_on) -+ on_above = true; -+ -+ if (vht_ok_max_off > vht_fail_max_off) -+ off_above = true; -+ -+ if (on_above && !off_above) { -+ crc_taget = SOML_ON; -+ } else if (!on_above && off_above) { -+ crc_taget = SOML_OFF; -+ } else if (on_above && off_above) { -+ utility_on = (vht_ok_max_on << 7) / vht_fail_max_on; -+ utility_off = (vht_ok_max_off << 7) / vht_fail_max_off; -+ crc_taget = (utility_on == utility_off) ? -+ (soml_tab->soml_last_state) : -+ ((utility_on > utility_off) ? SOML_ON : -+ SOML_OFF); -+ -+ } else if (!on_above && !off_above) { -+ if (vht_ok_max_on == 0) -+ vht_ok_max_on = 1; -+ if (vht_ok_max_off == 0) -+ vht_ok_max_off = 1; -+ utility_on = (vht_fail_max_on << 7) / vht_ok_max_on; -+ utility_off = (vht_fail_max_off << 7) / vht_ok_max_off; -+ crc_taget = (utility_on == utility_off) ? -+ (soml_tab->soml_last_state) : -+ ((utility_on < utility_off) ? SOML_ON : -+ SOML_OFF); -+ } -+ #endif -+ -+ } -+ -+ /* @[Decision] */ -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ rate_per_pkt_on = %d ; rate_per_pkt_off = %d ]\n", -+ rate_per_pkt_on, rate_per_pkt_off); -+ #if (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ if (max_idx_on == max_idx_off && max_idx_on != 0) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ max_idx_on == max_idx_off ]\n"); -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ max_idx = %d, crc_utility_on = %d, crc_utility_off = %d, crc_target = %d]\n", -+ max_idx_on, utility_on, utility_off, -+ crc_taget); -+ next_on_off = crc_taget; -+ } else -+ #endif -+ if (rate_per_pkt_on > rate_per_pkt_off) { -+ next_on_off = SOML_ON; -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ rate_per_pkt_on > rate_per_pkt_off ==> SOML_ON ]\n"); -+ } else if (rate_per_pkt_on < rate_per_pkt_off) { -+ next_on_off = SOML_OFF; -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ rate_per_pkt_on < rate_per_pkt_off ==> SOML_OFF ]\n"); -+ } else { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ stay at soml_last_state ]\n"); -+ next_on_off = soml_tab->soml_last_state; -+ } -+ -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Final decisoin ] : "); -+ phydm_soml_on_off(dm, next_on_off); -+ soml_tab->soml_last_state = next_on_off; -+} -+ -+void phydm_adsl(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ -+ if (dm->support_ic_type & PHYDM_ADAPTIVE_SOML_IC) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "soml_state_cnt =((%d))\n", -+ soml_tab->soml_state_cnt); -+ /*Traning state: 0(alt) 1(ori) 2(alt) 3(ori)===============*/ -+ if (soml_tab->soml_state_cnt < -+ (soml_tab->soml_train_num << 1)) { -+ if (soml_tab->soml_state_cnt == 0) -+ phydm_adsl_init_state(dm); -+ else if ((soml_tab->soml_state_cnt % 2) != 0) -+ phydm_adsl_odd_state(dm); -+ else if ((soml_tab->soml_state_cnt % 2) == 0) -+ phydm_adsl_even_state(dm); -+ } else { -+ phydm_adsl_decision_state(dm); -+ } -+ } -+} -+ -+void phydm_adaptive_soml_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ -+ soml_tab->soml_state_cnt = 0; -+ soml_tab->is_soml_method_enable = 0; -+ soml_tab->soml_counter = 0; -+} -+ -+void phydm_set_adsl_val(void *dm_void, u32 *val_buf, u8 val_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (!(dm->support_ability & ODM_BB_ADAPTIVE_SOML)) -+ return; -+ -+ if (val_len != 1) { -+ PHYDM_DBG(dm, ODM_COMP_API, "[Error][ADSL]Need val_len=1\n"); -+ return; -+ } -+ -+ phydm_soml_on_off(dm, (u8)val_buf[1]); -+} -+ -+void phydm_soml_crc_acq(void *dm_void, u8 rate_id, boolean crc32, u32 length) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u8 offset = 0; -+ -+ if (!(dm->support_ability & ODM_BB_ADAPTIVE_SOML)) -+ return; -+ -+ if (!soml_tab->get_stats) -+ return; -+ if (length < 1400) -+ return; -+ -+ if (soml_tab->soml_on_off == SOML_ON) { -+ if (rate_id >= ODM_RATEMCS0 && rate_id <= ODM_RATEMCS15) { -+ offset = rate_id - ODM_RATEMCS0; -+ if (crc32 == CRC_OK) -+ soml_tab->ht_crc_ok_cnt_on[offset]++; -+ else if (crc32 == CRC_FAIL) -+ soml_tab->ht_crc_fail_cnt_on[offset]++; -+ } else if (rate_id >= ODM_RATEVHTSS1MCS0 && -+ rate_id <= ODM_RATEVHTSS2MCS9) { -+ offset = rate_id - ODM_RATEVHTSS1MCS0; -+ if (crc32 == CRC_OK) -+ soml_tab->vht_crc_ok_cnt_on[offset]++; -+ else if (crc32 == CRC_FAIL) -+ soml_tab->vht_crc_fail_cnt_on[offset]++; -+ } -+ } else if (soml_tab->soml_on_off == SOML_OFF) { -+ if (rate_id >= ODM_RATEMCS0 && rate_id <= ODM_RATEMCS15) { -+ offset = rate_id - ODM_RATEMCS0; -+ if (crc32 == CRC_OK) -+ soml_tab->ht_crc_ok_cnt_off[offset]++; -+ else if (crc32 == CRC_FAIL) -+ soml_tab->ht_crc_fail_cnt_off[offset]++; -+ } else if (rate_id >= ODM_RATEVHTSS1MCS0 && -+ rate_id <= ODM_RATEVHTSS2MCS9) { -+ offset = rate_id - ODM_RATEVHTSS1MCS0; -+ if (crc32 == CRC_OK) -+ soml_tab->vht_crc_ok_cnt_off[offset]++; -+ else if (crc32 == CRC_FAIL) -+ soml_tab->vht_crc_fail_cnt_off[offset]++; -+ } -+ } -+} -+ -+void phydm_soml_bytes_acq(void *dm_void, u8 rate_id, u32 length) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ u8 offset = 0; -+ -+ if (!(dm->support_ability & ODM_BB_ADAPTIVE_SOML)) -+ return; -+ -+ if (rate_id >= ODM_RATEMCS0 && rate_id <= ODM_RATEMCS31) { -+ offset = rate_id - ODM_RATEMCS0; -+ if (offset > (HT_RATE_IDX - 1)) -+ offset = HT_RATE_IDX - 1; -+ -+ soml_tab->ht_byte[offset] += (u16)length; -+ } else if (rate_id >= ODM_RATEVHTSS1MCS0 && -+ rate_id <= ODM_RATEVHTSS4MCS9) { -+ offset = rate_id - ODM_RATEVHTSS1MCS0; -+ if (offset > (VHT_RATE_IDX - 1)) -+ offset = VHT_RATE_IDX - 1; -+ -+ soml_tab->vht_byte[offset] += (u16)length; -+ } -+} -+ -+#if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) -+static void pre_phydm_adaptive_soml_callback(unsigned long task_dm) -+{ -+ struct dm_struct *dm = (struct dm_struct *)task_dm; -+ struct rtl8192cd_priv *priv = dm->priv; -+ struct priv_shared_info *pshare = priv->pshare; -+ -+ if (!(priv->drv_state & DRV_STATE_OPEN)) -+ return; -+ if (pshare->bDriverStopped || pshare->bSurpriseRemoved) { -+ printk("[%s] bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", -+ __FUNCTION__, pshare->bDriverStopped, -+ pshare->bSurpriseRemoved); -+ return; -+ } -+ -+ rtw_enqueue_timer_event(priv, &pshare->adaptive_soml_event, -+ ENQUEUE_TO_TAIL); -+} -+ -+void phydm_adaptive_soml_timers_usb(void *dm_void, u8 state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+ if (state == INIT_SOML_TIMMER) { -+ init_timer(&soml_tab->phydm_adaptive_soml_timer); -+ soml_tab->phydm_adaptive_soml_timer.data = (unsigned long)dm; -+ soml_tab->phydm_adaptive_soml_timer.function = pre_phydm_adaptive_soml_callback; -+ INIT_TIMER_EVENT_ENTRY(&priv->pshare->adaptive_soml_event, -+ phydm_adaptive_soml_callback, -+ (unsigned long)dm); -+ } else if (state == CANCEL_SOML_TIMMER) { -+ odm_cancel_timer(dm, &soml_tab->phydm_adaptive_soml_timer); -+ } else if (state == RELEASE_SOML_TIMMER) { -+ odm_release_timer(dm, &soml_tab->phydm_adaptive_soml_timer); -+ } -+} -+#endif /* defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) */ -+ -+void phydm_adaptive_soml_timers(void *dm_void, u8 state) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ -+ if (!(dm->support_ic_type & PHYDM_ADAPTIVE_SOML_IC)) -+ return; -+ -+#if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) -+ struct rtl8192cd_priv *priv = dm->priv; -+ -+ if (priv->hci_type == RTL_HCI_USB) { -+ phydm_adaptive_soml_timers_usb(dm_void, state); -+ } else -+#endif /* defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) */ -+ { -+ if (state == INIT_SOML_TIMMER) { -+ odm_initialize_timer(dm, &soml_tab->phydm_adaptive_soml_timer, -+ (void *)phydm_adaptive_soml_callback, NULL, -+ "phydm_adaptive_soml_timer"); -+ } else if (state == CANCEL_SOML_TIMMER) { -+ odm_cancel_timer(dm, &soml_tab->phydm_adaptive_soml_timer); -+ } else if (state == RELEASE_SOML_TIMMER) { -+ odm_release_timer(dm, &soml_tab->phydm_adaptive_soml_timer); -+ } -+ } -+} -+ -+void phydm_adaptive_soml_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+#if 0 -+ if (!(dm->support_ability & ODM_BB_ADAPTIVE_SOML)) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[Return] Not Support Adaptive SOML\n"); -+ return; -+ } -+#endif -+ -+ if (!(dm->support_ic_type & PHYDM_ADAPTIVE_SOML_IC)) -+ return; -+ -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "%s\n", __func__); -+ -+ soml_tab->soml_state_cnt = 0; -+ soml_tab->soml_delay_time = 40; -+ soml_tab->soml_intvl = 150; -+ soml_tab->soml_train_num = 4; -+ soml_tab->is_soml_method_enable = 0; -+ soml_tab->soml_counter = 0; -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ soml_tab->soml_period = 1; -+#else -+ soml_tab->soml_period = 4; -+#endif -+ soml_tab->soml_select = 0; -+ soml_tab->cfo_cnt = 0; -+ soml_tab->cfo_diff_sum_a = 0; -+ soml_tab->cfo_diff_sum_b = 0; -+ -+ soml_tab->cfo_qpsk_th = 94; -+ soml_tab->cfo_qam16_th = 38; -+ soml_tab->cfo_qam64_th = 17; -+ soml_tab->cfo_qam256_th = 7; -+ -+ soml_tab->bpsk_qpsk_dist_th = 20; -+ soml_tab->qam16_dist_th = 20; -+ soml_tab->qam64_dist_th = 20; -+ soml_tab->qam256_dist_th = 20; -+ -+ if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8192F)) -+ odm_set_bb_reg(dm, 0x988, BIT(25), 1); -+} -+ -+void phydm_adaptive_soml(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ -+ if (!(dm->support_ability & ODM_BB_ADAPTIVE_SOML)) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[Return!!!] Not Support Adaptive SOML Function\n"); -+ return; -+ } -+ -+ if (dm->pause_ability & ODM_BB_ADAPTIVE_SOML) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "Return: Pause ADSL in LV=%d\n", -+ dm->pause_lv_table.lv_adsl); -+ return; -+ } -+ -+ if (soml_tab->soml_counter < soml_tab->soml_period) { -+ soml_tab->soml_counter++; -+ return; -+ } -+ soml_tab->soml_counter = 0; -+ soml_tab->soml_state_cnt = 0; -+ soml_tab->cfo_cnt = 0; -+ soml_tab->cfo_diff_sum_a = 0; -+ soml_tab->cfo_diff_sum_b = 0; -+ -+ phydm_soml_reset_qam(dm); -+ -+ if (soml_tab->soml_select == 0) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, -+ "[ Adaptive SOML Training !!!]\n"); -+ } else if (soml_tab->soml_select == 1) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Stop Adaptive SOML !!!]\n"); -+ phydm_soml_on_off(dm, SOML_ON); -+ return; -+ } else if (soml_tab->soml_select == 2) { -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "[ Stop Adaptive SOML !!!]\n"); -+ phydm_soml_on_off(dm, SOML_OFF); -+ return; -+ } -+ -+ if (dm->support_ic_type & PHYDM_ADAPTIVE_SOML_IC) -+ phydm_adsl(dm); -+} -+ -+void phydm_enable_adaptive_soml(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "[%s]\n", __func__); -+ dm->support_ability |= ODM_BB_ADAPTIVE_SOML; -+ phydm_soml_on_off(dm, SOML_ON); -+} -+ -+void phydm_stop_adaptive_soml(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_ADPTV_SOML, "[%s]\n", __func__); -+ dm->support_ability &= ~ODM_BB_ADAPTIVE_SOML; -+ phydm_soml_on_off(dm, SOML_ON); -+} -+ -+void phydm_adaptive_soml_para_set(void *dm_void, u8 train_num, u8 intvl, -+ u8 period, u8 delay_time) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct adaptive_soml *soml_tab = &dm->dm_soml_table; -+ -+ soml_tab->soml_train_num = train_num; -+ soml_tab->soml_intvl = intvl; -+ soml_tab->soml_period = period; -+ soml_tab->soml_delay_time = delay_time; -+} -+#endif /* @end of CONFIG_ADAPTIVE_SOML*/ -+ -+void phydm_init_soft_ml_setting(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 soml_mask = BIT(31) | BIT(30) | BIT(29) | BIT(28); -+ -+#if (RTL8822B_SUPPORT == 1) -+ if (!*dm->mp_mode) { -+ if (dm->support_ic_type & ODM_RTL8822B) { -+#if 0 -+ /*odm_set_bb_reg(dm, R_0x19a8, MASKDWORD, 0xd10a0000);*/ -+#endif -+ phydm_somlrxhp_setting(dm, true); -+ dm->bsomlenabled = true; -+ } -+ } -+#endif -+#if (RTL8821C_SUPPORT == 1) -+ if (!*dm->mp_mode) { -+ if (dm->support_ic_type & ODM_RTL8821C) -+ odm_set_bb_reg(dm, R_0x19a8, soml_mask, 0xd); -+ } -+#endif -+#if (RTL8195B_SUPPORT == 1) -+ if (!*dm->mp_mode) { -+ if (dm->support_ic_type & ODM_RTL8195B) -+ odm_set_bb_reg(dm, R_0x19a8, soml_mask, 0xd); -+ } -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_soml.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_soml.h -new file mode 100644 -index 000000000000..e2c6e17c2ec8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_soml.h -@@ -0,0 +1,199 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#ifndef __PHYDMSOML_H__ -+#define __PHYDMSOML_H__ -+ -+/*@#define ADAPTIVE_SOML_VERSION "1.0" Byte counter version*/ -+#define ADAPTIVE_SOML_VERSION "2.0" /*@add avg. phy rate decision 20180126*/ -+ -+#define PHYDM_ADAPTIVE_SOML_IC (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8192F) -+/*@jj add 20170822*/ -+ -+#define INIT_SOML_TIMMER 0 -+#define CANCEL_SOML_TIMMER 1 -+#define RELEASE_SOML_TIMMER 2 -+ -+#define SOML_RSSI_TH_HIGH 25 -+#define SOML_RSSI_TH_LOW 20 -+ -+#define HT_RATE_IDX 16 -+#define VHT_RATE_IDX 20 -+ -+#define HT_ORDER_TYPE 3 -+#define VHT_ORDER_TYPE 4 -+ -+#define CRC_FAIL 1 -+#define CRC_OK 0 -+ -+#if 0 -+#define CFO_QPSK_TH 20 -+#define CFO_QAM16_TH 20 -+#define CFO_QAM64_TH 20 -+#define CFO_QAM256_TH 20 -+ -+#define BPSK_QPSK_DIST 20 -+#define QAM16_DIST 30 -+#define QAM64_DIST 30 -+#define QAM256_DIST 20 -+#endif -+#define HT_TYPE 1 -+#define VHT_TYPE 2 -+ -+#define SOML_ON 1 -+#define SOML_OFF 0 -+ -+#ifdef CONFIG_ADAPTIVE_SOML -+ -+struct adaptive_soml { -+ u32 rvrt_val; /*all rvrt_val for pause API must set to u32*/ -+ boolean is_soml_method_enable; -+ boolean get_stats; -+ u8 soml_on_off; -+ u8 soml_state_cnt; -+ u8 soml_delay_time; -+ u8 soml_intvl; -+ u8 soml_train_num; -+ u8 soml_counter; -+ u8 soml_period; -+ u8 soml_select; -+ u8 soml_last_state; -+ u8 cfo_qpsk_th; -+ u8 cfo_qam16_th; -+ u8 cfo_qam64_th; -+ u8 cfo_qam256_th; -+ u8 bpsk_qpsk_dist_th; -+ u8 qam16_dist_th; -+ u8 qam64_dist_th; -+ u8 qam256_dist_th; -+ u8 cfo_cnt; -+ s32 cfo_diff_a; -+ s32 cfo_diff_b; -+ s32 cfo_diff_sum_a; -+ s32 cfo_diff_sum_b; -+ s32 cfo_diff_avg_a; -+ s32 cfo_diff_avg_b; -+ u16 ht_cnt[HT_RATE_IDX]; -+ u16 pre_ht_cnt[HT_RATE_IDX]; -+ u16 ht_cnt_on[HT_RATE_IDX]; -+ u16 ht_cnt_off[HT_RATE_IDX]; -+ u16 ht_crc_ok_cnt_on[HT_RATE_IDX]; -+ u16 ht_crc_fail_cnt_on[HT_RATE_IDX]; -+ u16 ht_crc_ok_cnt_off[HT_RATE_IDX]; -+ u16 ht_crc_fail_cnt_off[HT_RATE_IDX]; -+ u16 vht_crc_ok_cnt_on[VHT_RATE_IDX]; -+ u16 vht_crc_fail_cnt_on[VHT_RATE_IDX]; -+ u16 vht_crc_ok_cnt_off[VHT_RATE_IDX]; -+ u16 vht_crc_fail_cnt_off[VHT_RATE_IDX]; -+ -+ u16 vht_cnt[VHT_RATE_IDX]; -+ u16 pre_vht_cnt[VHT_RATE_IDX]; -+ u16 vht_cnt_on[VHT_RATE_IDX]; -+ u16 vht_cnt_off[VHT_RATE_IDX]; -+ -+ u16 num_ht_qam[HT_ORDER_TYPE]; -+ u16 ht_byte[HT_RATE_IDX]; -+ u16 pre_ht_byte[HT_RATE_IDX]; -+ u16 ht_byte_on[HT_RATE_IDX]; -+ u16 ht_byte_off[HT_RATE_IDX]; -+ u16 num_vht_qam[VHT_ORDER_TYPE]; -+ u16 vht_byte[VHT_RATE_IDX]; -+ u16 pre_vht_byte[VHT_RATE_IDX]; -+ u16 vht_byte_on[VHT_RATE_IDX]; -+ u16 vht_byte_off[VHT_RATE_IDX]; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#if USE_WORKITEM -+ RT_WORK_ITEM phydm_adaptive_soml_workitem; -+#endif -+#endif -+ struct phydm_timer_list phydm_adaptive_soml_timer; -+ -+}; -+ -+enum qam_order { -+ BPSK_QPSK = 0, -+ QAM16 = 1, -+ QAM64 = 2, -+ QAM256 = 3 -+}; -+ -+void phydm_dynamicsoftmletting(void *dm_void); -+ -+void phydm_soml_on_off(void *dm_void, u8 swch); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void phydm_adaptive_soml_callback(struct phydm_timer_list *timer); -+ -+void phydm_adaptive_soml_workitem_callback(void *context); -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+void phydm_adaptive_soml_callback(void *dm_void); -+ -+void phydm_adaptive_soml_workitem_callback(void *context); -+ -+#else -+void phydm_adaptive_soml_callback(void *dm_void); -+#endif -+ -+void phydm_rx_rate_for_soml(void *dm_void, void *pkt_info_void); -+ -+void phydm_rx_qam_for_soml(void *dm_void, void *pkt_info_void); -+ -+void phydm_soml_reset_rx_rate(void *dm_void); -+ -+void phydm_soml_reset_qam(void *dm_void); -+ -+void phydm_soml_cfo_process(void *dm_void, s32 *diff_a, s32 *diff_b); -+ -+void phydm_soml_debug(void *dm_void, char input[][16], u32 *_used, -+ char *output, u32 *_out_len); -+ -+void phydm_soml_statistics(void *dm_void, u8 on_off_state); -+ -+void phydm_adsl(void *dm_void); -+ -+void phydm_adaptive_soml_reset(void *dm_void); -+ -+void phydm_set_adsl_val(void *dm_void, u32 *val_buf, u8 val_len); -+ -+void phydm_soml_crc_acq(void *dm_void, u8 rate_id, boolean crc32, u32 length); -+ -+void phydm_soml_bytes_acq(void *dm_void, u8 rate_id, u32 length); -+ -+void phydm_adaptive_soml_timers(void *dm_void, u8 state); -+ -+void phydm_adaptive_soml_init(void *dm_void); -+ -+void phydm_adaptive_soml(void *dm_void); -+ -+void phydm_enable_adaptive_soml(void *dm_void); -+ -+void phydm_stop_adaptive_soml(void *dm_void); -+ -+void phydm_adaptive_soml_para_set(void *dm_void, u8 train_num, u8 intvl, -+ u8 period, u8 delay_time); -+#endif -+void phydm_init_soft_ml_setting(void *dm_void); -+#endif /*@#ifndef __PHYDMSOML_H__*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/phydm_types.h b/drivers/staging/rtl8723cs/hal/phydm/phydm_types.h -new file mode 100644 -index 000000000000..4db8da5cf0b6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/phydm_types.h -@@ -0,0 +1,413 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#ifndef __ODM_TYPES_H__ -+#define __ODM_TYPES_H__ -+ -+/*Define Different SW team support*/ -+#define ODM_AP 0x01 /*BIT(0)*/ -+#define ODM_CE 0x04 /*BIT(2)*/ -+#define ODM_WIN 0x08 /*BIT(3)*/ -+#define ODM_ADSL 0x10 -+/*BIT(4)*/ /*already combine with ODM_AP, and is nouse now*/ -+#define ODM_IOT 0x20 /*BIT(5)*/ -+ -+/*For FW API*/ -+#define __iram_odm_func__ -+#define __odm_func__ -+#define __odm_func_aon__ -+ -+/*Deifne HW endian support*/ -+#define ODM_ENDIAN_BIG 0 -+#define ODM_ENDIAN_LITTLE 1 -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #define GET_PDM_ODM(__padapter) ((struct dm_struct*)(&(GET_HAL_DATA(__padapter))->DM_OutSrc)) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #define GET_PDM_ODM(__padapter) ((struct dm_struct *)(&(GET_HAL_DATA(__padapter))->odmpriv)) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #define GET_PDM_ODM(__padapter) ((struct dm_struct*)(&__padapter->pshare->_dmODM)) -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) -+ #if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) -+ /* enable PCI & USB HCI at the same time */ -+ #define RT_PCI_USB_INTERFACE 1 -+ #define RT_PCI_INTERFACE RT_PCI_USB_INTERFACE -+ #define RT_USB_INTERFACE RT_PCI_USB_INTERFACE -+ #define RT_SDIO_INTERFACE 3 -+ #else -+ #define RT_PCI_INTERFACE 1 -+ #define RT_USB_INTERFACE 2 -+ #define RT_SDIO_INTERFACE 3 -+ #endif -+#endif -+ -+enum hal_status { -+ HAL_STATUS_SUCCESS, -+ HAL_STATUS_FAILURE, -+#if 0 -+ RT_STATUS_PENDING, -+ RT_STATUS_RESOURCE, -+ RT_STATUS_INVALID_CONTEXT, -+ RT_STATUS_INVALID_PARAMETER, -+ RT_STATUS_NOT_SUPPORT, -+ RT_STATUS_OS_API_FAILED, -+#endif -+}; -+ -+#if (DM_ODM_SUPPORT_TYPE != ODM_WIN) -+ -+#define VISTA_USB_RX_REVISE 0 -+ -+/* -+ * Declare for ODM spin lock definition temporarily fro compile pass. -+ */ -+enum rt_spinlock_type { -+ RT_TX_SPINLOCK = 1, -+ RT_RX_SPINLOCK = 2, -+ RT_RM_SPINLOCK = 3, -+ RT_CAM_SPINLOCK = 4, -+ RT_SCAN_SPINLOCK = 5, -+ RT_LOG_SPINLOCK = 7, -+ RT_BW_SPINLOCK = 8, -+ RT_CHNLOP_SPINLOCK = 9, -+ RT_RF_OPERATE_SPINLOCK = 10, -+ RT_INITIAL_SPINLOCK = 11, -+ RT_RF_STATE_SPINLOCK = 12, -+ /* For RF state. Added by Bruce, 2007-10-30. */ -+#if VISTA_USB_RX_REVISE -+ RT_USBRX_CONTEXT_SPINLOCK = 13, -+ RT_USBRX_POSTPROC_SPINLOCK = 14, -+ /* protect data of adapter->IndicateW/ IndicateR */ -+#endif -+ /* Shall we define Ndis 6.2 SpinLock Here ? */ -+ RT_PORT_SPINLOCK = 16, -+ RT_VNIC_SPINLOCK = 17, -+ RT_HVL_SPINLOCK = 18, -+ RT_H2C_SPINLOCK = 20, -+ /* For H2C cmd. Added by tynli. 2009.11.09. */ -+ -+ rt_bt_data_spinlock = 25, -+ -+ RT_WAPI_OPTION_SPINLOCK = 26, -+ RT_WAPI_RX_SPINLOCK = 27, -+ -+ /* add for 92D CCK control issue */ -+ RT_CCK_PAGEA_SPINLOCK = 28, -+ RT_BUFFER_SPINLOCK = 29, -+ RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30, -+ RT_GEN_TEMP_BUF_SPINLOCK = 31, -+ RT_AWB_SPINLOCK = 32, -+ RT_FW_PS_SPINLOCK = 33, -+ RT_HW_TIMER_SPIN_LOCK = 34, -+ RT_MPT_WI_SPINLOCK = 35, -+ RT_P2P_SPIN_LOCK = 36, /* Protect P2P context */ -+ RT_DBG_SPIN_LOCK = 37, -+ RT_IQK_SPINLOCK = 38, -+ RT_PENDED_OID_SPINLOCK = 39, -+ RT_CHNLLIST_SPINLOCK = 40, -+ RT_INDIC_SPINLOCK = 41, /* protect indication */ -+ RT_RFD_SPINLOCK = 42, -+ RT_SYNC_IO_CNT_SPINLOCK = 43, -+ RT_LAST_SPINLOCK, -+}; -+ -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ #define sta_info _RT_WLAN_STA -+ #define __func__ __FUNCTION__ -+ #define PHYDM_TESTCHIP_SUPPORT TESTCHIP_SUPPORT -+ #define MASKH3BYTES 0xffffff00 -+ #define SUCCESS 0 -+ #define FAIL (-1) -+ -+ #define u8 u1Byte -+ #define s8 s1Byte -+ -+ #define u16 u2Byte -+ #define s16 s2Byte -+ -+ #define u32 u4Byte -+ #define s32 s4Byte -+ -+ #define u64 u8Byte -+ #define s64 s8Byte -+ -+ #define phydm_timer_list _RT_TIMER -+ -+ // for power limit table -+ enum odm_pw_lmt_regulation_type { -+ PW_LMT_REGU_FCC = 0, -+ PW_LMT_REGU_ETSI = 1, -+ PW_LMT_REGU_MKK = 2, -+ PW_LMT_REGU_WW13 = 3, -+ PW_LMT_REGU_IC = 4, -+ PW_LMT_REGU_KCC = 5, -+ PW_LMT_REGU_ACMA = 6, -+ PW_LMT_REGU_CHILE = 7, -+ PW_LMT_REGU_UKRAINE = 8, -+ PW_LMT_REGU_MEXICO = 9, -+ PW_LMT_REGU_CN = 10 -+ }; -+ -+ enum odm_pw_lmt_band_type { -+ PW_LMT_BAND_2_4G = 0, -+ PW_LMT_BAND_5G = 1 -+ }; -+ -+ enum odm_pw_lmt_bandwidth_type { -+ PW_LMT_BW_20M = 0, -+ PW_LMT_BW_40M = 1, -+ PW_LMT_BW_80M = 2, -+ PW_LMT_BW_160M = 3 -+ }; -+ -+ enum odm_pw_lmt_ratesection_type { -+ PW_LMT_RS_CCK = 0, -+ PW_LMT_RS_OFDM = 1, -+ PW_LMT_RS_HT = 2, -+ PW_LMT_RS_VHT = 3 -+ }; -+ -+ enum odm_pw_lmt_rfpath_type { -+ PW_LMT_PH_1T = 0, -+ PW_LMT_PH_2T = 1, -+ PW_LMT_PH_3T = 2, -+ PW_LMT_PH_4T = 3 -+ }; -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -+ #include "../typedef.h" -+ -+ #ifdef CONFIG_PCI_HCI -+ #if defined(CONFIG_RTL_TRIBAND_SUPPORT) && defined(CONFIG_USB_HCI) -+ #define DEV_BUS_TYPE RT_PCI_USB_INTERFACE -+ #else -+ #define DEV_BUS_TYPE RT_PCI_INTERFACE -+ #endif -+ #endif -+ -+ #if (defined(TESTCHIP_SUPPORT)) -+ #define PHYDM_TESTCHIP_SUPPORT 1 -+ #else -+ #define PHYDM_TESTCHIP_SUPPORT 0 -+ #endif -+ -+ #define sta_info stat_info -+ #define boolean bool -+ -+ #define phydm_timer_list timer_list -+ #if defined(__ECOS) -+ #define s64 s8Byte -+ #endif -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) -+ -+ #include -+ -+ #define DEV_BUS_TYPE RT_PCI_INTERFACE -+ -+ #if defined(__LITTLE_ENDIAN) -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE -+ #elif defined(__BIG_ENDIAN) -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG -+ #else -+ #error -+ #endif -+ -+ /* define useless flag to avoid compile warning */ -+ #define USE_WORKITEM 0 -+ #define FOR_BRAZIL_PRETEST 0 -+ #define FPGA_TWO_MAC_VERIFICATION 0 -+ #define RTL8881A_SUPPORT 0 -+ #define PHYDM_TESTCHIP_SUPPORT 0 -+ -+ -+ #define RATE_ADAPTIVE_SUPPORT 0 -+ #define POWER_TRAINING_ACTIVE 0 -+ -+ #define sta_info rtl_sta_info -+ #define boolean bool -+ -+ #define phydm_timer_list timer_list -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ #include -+ -+ #ifdef CONFIG_USB_HCI -+ #define DEV_BUS_TYPE RT_USB_INTERFACE -+ #elif defined(CONFIG_PCI_HCI) -+ #define DEV_BUS_TYPE RT_PCI_INTERFACE -+ #elif defined(CONFIG_SDIO_HCI) -+ #define DEV_BUS_TYPE RT_SDIO_INTERFACE -+ #elif defined(CONFIG_GSPI_HCI) -+ #define DEV_BUS_TYPE RT_SDIO_INTERFACE -+ #endif -+ -+ -+ #if defined(CONFIG_LITTLE_ENDIAN) -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE -+ #elif defined(CONFIG_BIG_ENDIAN) -+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG -+ #endif -+ -+ #define boolean bool -+ -+ #define SET_TX_DESC_ANTSEL_A_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc + 8, 24, 1, __value) -+ #define SET_TX_DESC_ANTSEL_B_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc + 8, 25, 1, __value) -+ #define SET_TX_DESC_ANTSEL_C_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc + 28, 29, 1, __value) -+ -+ /* define useless flag to avoid compile warning */ -+ #define USE_WORKITEM 0 -+ #define FOR_BRAZIL_PRETEST 0 -+ #define FPGA_TWO_MAC_VERIFICATION 0 -+ #define RTL8881A_SUPPORT 0 -+ -+ #if (defined(TESTCHIP_SUPPORT)) -+ #define PHYDM_TESTCHIP_SUPPORT 1 -+ #else -+ #define PHYDM_TESTCHIP_SUPPORT 0 -+ #endif -+ -+ #define phydm_timer_list rtw_timer_list -+ -+ // for power limit table -+ enum odm_pw_lmt_regulation_type { -+ PW_LMT_REGU_FCC = 0, -+ PW_LMT_REGU_ETSI = 1, -+ PW_LMT_REGU_MKK = 2, -+ PW_LMT_REGU_WW13 = 3, -+ PW_LMT_REGU_IC = 4, -+ PW_LMT_REGU_KCC = 5, -+ PW_LMT_REGU_ACMA = 6, -+ PW_LMT_REGU_CHILE = 7, -+ PW_LMT_REGU_UKRAINE = 8, -+ PW_LMT_REGU_MEXICO = 9, -+ PW_LMT_REGU_CN = 10 -+ }; -+ -+ enum odm_pw_lmt_band_type { -+ PW_LMT_BAND_2_4G = 0, -+ PW_LMT_BAND_5G = 1 -+ }; -+ -+ enum odm_pw_lmt_bandwidth_type { -+ PW_LMT_BW_20M = 0, -+ PW_LMT_BW_40M = 1, -+ PW_LMT_BW_80M = 2, -+ PW_LMT_BW_160M = 3 -+ }; -+ -+ enum odm_pw_lmt_ratesection_type { -+ PW_LMT_RS_CCK = 0, -+ PW_LMT_RS_OFDM = 1, -+ PW_LMT_RS_HT = 2, -+ PW_LMT_RS_VHT = 3 -+ }; -+ -+ enum odm_pw_lmt_rfpath_type { -+ PW_LMT_PH_1T = 0, -+ PW_LMT_PH_2T = 1, -+ PW_LMT_PH_3T = 2, -+ PW_LMT_PH_4T = 3 -+ }; -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ #define boolean bool -+ #define true _TRUE -+ #define false _FALSE -+ -+ // for power limit table -+ enum odm_pw_lmt_regulation_type { -+ PW_LMT_REGU_NULL = 0, -+ PW_LMT_REGU_FCC = 1, -+ PW_LMT_REGU_ETSI = 2, -+ PW_LMT_REGU_MKK = 3, -+ PW_LMT_REGU_WW13 = 4 -+ }; -+ -+ enum odm_pw_lmt_band_type { -+ PW_LMT_BAND_NULL = 0, -+ PW_LMT_BAND_2_4G = 1, -+ PW_LMT_BAND_5G = 2 -+ }; -+ -+ enum odm_pw_lmt_bandwidth_type { -+ PW_LMT_BW_NULL = 0, -+ PW_LMT_BW_20M = 1, -+ PW_LMT_BW_40M = 2, -+ PW_LMT_BW_80M = 3 -+ }; -+ -+ enum odm_pw_lmt_ratesection_type { -+ PW_LMT_RS_NULL = 0, -+ PW_LMT_RS_CCK = 1, -+ PW_LMT_RS_OFDM = 2, -+ PW_LMT_RS_HT = 3, -+ PW_LMT_RS_VHT = 4 -+ }; -+ -+ enum odm_pw_lmt_rfpath_type { -+ PW_LMT_PH_NULL = 0, -+ PW_LMT_PH_1T = 1, -+ PW_LMT_PH_2T = 2, -+ PW_LMT_PH_3T = 3, -+ PW_LMT_PH_4T = 4 -+ }; -+ -+ #define phydm_timer_list timer_list -+ -+#endif -+ -+#define READ_NEXT_PAIR(v1, v2, i) do { if (i + 2 >= array_len) break; i += 2; v1 = array[i]; v2 = array[i + 1]; } while (0) -+#define COND_ELSE 2 -+#define COND_ENDIF 3 -+ -+#define MASKBYTE0 0xff -+#define MASKBYTE1 0xff00 -+#define MASKBYTE2 0xff0000 -+#define MASKBYTE3 0xff000000 -+#define MASKHWORD 0xffff0000 -+#define MASKLWORD 0x0000ffff -+#define MASKDWORD 0xffffffff -+ -+#define MASK7BITS 0x7f -+#define MASK12BITS 0xfff -+#define MASKH4BITS 0xf0000000 -+#define MASK20BITS 0xfffff -+#define MASK24BITS 0xffffff -+#define MASKOFDM_D 0xffc00000 -+#define MASKCCK 0x3f3f3f3f -+ -+#define RFREGOFFSETMASK 0xfffff -+#define RFREG_MASK 0xfffff -+ -+#define MASKH3BYTES 0xffffff00 -+#define MASKL3BYTES 0x00ffffff -+#define MASKBYTE2HIGHNIBBLE 0x00f00000 -+#define MASKBYTE3LOWNIBBLE 0x0f000000 -+#define MASKL3BYTES 0x00ffffff -+ -+#endif /* __ODM_TYPES_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_bb.c b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_bb.c -new file mode 100644 -index 000000000000..f02e7ccdd659 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_bb.c -@@ -0,0 +1,823 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/*Image2HeaderVersion: 3.5.2*/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (RTL8703B_SUPPORT == 1) -+static boolean -+check_positive( -+ struct dm_struct *dm, -+ const u32 condition1, -+ const u32 condition2, -+ const u32 condition3, -+ const u32 condition4 -+) -+{ -+ u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ -+ ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ -+ ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ -+ ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ -+ ((dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/ -+ ((dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/ -+ ((dm->board_type & BIT(5)) >> 5) << 6; /* _TRSWT*/ -+ -+ u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; -+ -+ u8 cut_version_for_para = (dm->cut_version == ODM_CUT_A) ? 15 : dm->cut_version; -+ u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type; -+ -+ u32 driver1 = cut_version_for_para << 24 | -+ (dm->support_interface & 0xF0) << 16 | -+ dm->support_platform << 16 | -+ pkg_type_for_para << 12 | -+ (dm->support_interface & 0x0F) << 8 | -+ _board_type; -+ -+ u32 driver2 = (dm->type_glna & 0xFF) << 0 | -+ (dm->type_gpa & 0xFF) << 8 | -+ (dm->type_alna & 0xFF) << 16 | -+ (dm->type_apa & 0xFF) << 24; -+ -+ u32 driver3 = 0; -+ -+ u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | -+ (dm->type_gpa & 0xFF00) | -+ (dm->type_alna & 0xFF00) << 8 | -+ (dm->type_apa & 0xFF00) << 16; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", -+ __func__, cond1, cond2, cond3, cond4); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", -+ __func__, driver1, driver2, driver3, driver4); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ " (Platform, Interface) = (0x%X, 0x%X)\n", -+ dm->support_platform, dm->support_interface); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, -+ dm->package_type); -+ -+ -+ /*============== value Defined Check ===============*/ -+ /*QFN type [15:12] and cut version [27:24] need to do value check*/ -+ -+ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) -+ return false; -+ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) -+ return false; -+ -+ /*=============== Bit Defined Check ================*/ -+ /* We don't care [31:28] */ -+ -+ cond1 &= 0x00FF0FFF; -+ driver1 &= 0x00FF0FFF; -+ -+ if ((cond1 & driver1) == cond1) { -+ u32 bit_mask = 0; -+ -+ if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/ -+ return true; -+ -+ if ((cond1 & BIT(0)) != 0) /*GLNA*/ -+ bit_mask |= 0x000000FF; -+ if ((cond1 & BIT(1)) != 0) /*GPA*/ -+ bit_mask |= 0x0000FF00; -+ if ((cond1 & BIT(2)) != 0) /*ALNA*/ -+ bit_mask |= 0x00FF0000; -+ if ((cond1 & BIT(3)) != 0) /*APA*/ -+ bit_mask |= 0xFF000000; -+ -+ if (((cond2 & bit_mask) == (driver2 & bit_mask)) && ((cond4 & bit_mask) == (driver4 & bit_mask))) /* board_type of each RF path is matched*/ -+ return true; -+ else -+ return false; -+ } else -+ return false; -+} -+ -+/****************************************************************************** -+* agc_tab.TXT -+******************************************************************************/ -+ -+u32 array_mp_8703b_agc_tab[] = { -+ 0xC78, 0xFC000101, -+ 0xC78, 0xFB010101, -+ 0xC78, 0xFA020101, -+ 0xC78, 0xF9030101, -+ 0xC78, 0xF8040101, -+ 0xC78, 0xF7050101, -+ 0xC78, 0xF6060101, -+ 0xC78, 0xF5070101, -+ 0xC78, 0xF4080101, -+ 0xC78, 0xF3090101, -+ 0xC78, 0xF20A0101, -+ 0xC78, 0xF10B0101, -+ 0xC78, 0xF00C0101, -+ 0xC78, 0xEF0D0101, -+ 0xC78, 0xEE0E0101, -+ 0xC78, 0xED0F0101, -+ 0xC78, 0xEC100101, -+ 0xC78, 0xEB110101, -+ 0xC78, 0xEA120101, -+ 0xC78, 0xE9130101, -+ 0xC78, 0xE8140101, -+ 0xC78, 0xE7150101, -+ 0xC78, 0xE6160101, -+ 0xC78, 0xE5170101, -+ 0xC78, 0xE4180101, -+ 0xC78, 0xE3190101, -+ 0xC78, 0x661A0101, -+ 0xC78, 0x651B0101, -+ 0xC78, 0x641C0101, -+ 0xC78, 0x631D0101, -+ 0xC78, 0x071E0101, -+ 0xC78, 0x061F0101, -+ 0xC78, 0x05200101, -+ 0xC78, 0x04210101, -+ 0xC78, 0x03220101, -+ 0xC78, 0xE8230001, -+ 0xC78, 0xE7240001, -+ 0xC78, 0xE6250001, -+ 0xC78, 0xE5260001, -+ 0xC78, 0xE4270001, -+ 0xC78, 0x89280001, -+ 0xC78, 0x88290001, -+ 0xC78, 0x872A0001, -+ 0xC78, 0x862B0001, -+ 0xC78, 0x852C0001, -+ 0xC78, 0x482D0001, -+ 0xC78, 0x472E0001, -+ 0xC78, 0x462F0001, -+ 0xC78, 0x45300001, -+ 0xC78, 0x44310001, -+ 0xC78, 0x07320001, -+ 0xC78, 0x06330001, -+ 0xC78, 0x05340001, -+ 0xC78, 0x04350001, -+ 0xC78, 0x03360001, -+ 0xC78, 0x02370001, -+ 0xC78, 0x01380001, -+ 0xC78, 0x00390001, -+ 0xC78, 0x003A0001, -+ 0xC78, 0x003B0001, -+ 0xC78, 0x003C0001, -+ 0xC78, 0x003D0001, -+ 0xC78, 0x003E0001, -+ 0xC78, 0x003F0001, -+ 0xC78, 0x7F002001, -+ 0xC78, 0x7F012001, -+ 0xC78, 0x7F022001, -+ 0xC78, 0x7F032001, -+ 0xC78, 0x7F042001, -+ 0xC78, 0x7F052001, -+ 0xC78, 0x7F062001, -+ 0xC78, 0x7F072001, -+ 0xC78, 0x7F082001, -+ 0xC78, 0x7F092001, -+ 0xC78, 0x7F0A2001, -+ 0xC78, 0x7F0B2001, -+ 0xC78, 0x7F0C2001, -+ 0xC78, 0x7F0D2001, -+ 0xC78, 0x7F0E2001, -+ 0xC78, 0x7F0F2001, -+ 0xC78, 0x7F102001, -+ 0xC78, 0x7F112001, -+ 0xC78, 0x7E122001, -+ 0xC78, 0x7D132001, -+ 0xC78, 0x7C142001, -+ 0xC78, 0x7B152001, -+ 0xC78, 0x7A162001, -+ 0xC78, 0x79172001, -+ 0xC78, 0x78182001, -+ 0xC78, 0x77192001, -+ 0xC78, 0x761A2001, -+ 0xC78, 0x751B2001, -+ 0xC78, 0x741C2001, -+ 0xC78, 0x731D2001, -+ 0xC78, 0x721E2001, -+ 0xC78, 0x711F2001, -+ 0xC78, 0x70202001, -+ 0xC78, 0x6F212001, -+ 0xC78, 0x6E222001, -+ 0xC78, 0x6D232001, -+ 0xC78, 0x6C242001, -+ 0xC78, 0x6B252001, -+ 0xC78, 0x6A262001, -+ 0xC78, 0x69272001, -+ 0xC78, 0x68282001, -+ 0xC78, 0x67292001, -+ 0xC78, 0x662A2001, -+ 0xC78, 0x652B2001, -+ 0xC78, 0x642C2001, -+ 0xC78, 0x632D2001, -+ 0xC78, 0x622E2001, -+ 0xC78, 0x612F2001, -+ 0xC78, 0x60302001, -+ 0xC78, 0x42312001, -+ 0xC78, 0x41322001, -+ 0xC78, 0x40332001, -+ 0xC78, 0x23342001, -+ 0xC78, 0x22352001, -+ 0xC78, 0x21362001, -+ 0xC78, 0x20372001, -+ 0xC78, 0x00382001, -+ 0xC78, 0x02392001, -+ 0xC78, 0x013A2001, -+ 0xC78, 0x003B2001, -+ 0xC78, 0x003C2001, -+ 0xC78, 0x003D2001, -+ 0xC78, 0x003E2001, -+ 0xC78, 0x003F2001, -+ 0xC78, 0x7F003101, -+ 0xC78, 0x7F013101, -+ 0xC78, 0x7F023101, -+ 0xC78, 0x7F033101, -+ 0xC78, 0x7F043101, -+ 0xC78, 0x7F053101, -+ 0xC78, 0x7F063101, -+ 0xC78, 0x7E073101, -+ 0xC78, 0x7D083101, -+ 0xC78, 0x7C093101, -+ 0xC78, 0x7B0A3101, -+ 0xC78, 0x7A0B3101, -+ 0xC78, 0x790C3101, -+ 0xC78, 0x780D3101, -+ 0xC78, 0x770E3101, -+ 0xC78, 0x760F3101, -+ 0xC78, 0x75103101, -+ 0xC78, 0x74113101, -+ 0xC78, 0x73123101, -+ 0xC78, 0x72133101, -+ 0xC78, 0x71143101, -+ 0xC78, 0x70153101, -+ 0xC78, 0x6F163101, -+ 0xC78, 0x69173101, -+ 0xC78, 0x68183101, -+ 0xC78, 0x67193101, -+ 0xC78, 0x661A3101, -+ 0xC78, 0x651B3101, -+ 0xC78, 0x641C3101, -+ 0xC78, 0x631D3101, -+ 0xC78, 0x621E3101, -+ 0xC78, 0x611F3101, -+ 0xC78, 0x60203101, -+ 0xC78, 0x42213101, -+ 0xC78, 0x41223101, -+ 0xC78, 0x40233101, -+ 0xC78, 0x22243101, -+ 0xC78, 0x21253101, -+ 0xC78, 0x20263101, -+ 0xC78, 0x00273101, -+ 0xC78, 0x00283101, -+ 0xC78, 0x00293101, -+ 0xC78, 0x002A3101, -+ 0xC78, 0x002B3101, -+ 0xC78, 0x002C3101, -+ 0xC78, 0x002D3101, -+ 0xC78, 0x002E3101, -+ 0xC78, 0x002F3101, -+ 0xC78, 0x00303101, -+ 0xC78, 0x00313101, -+ 0xC78, 0x00323101, -+ 0xC78, 0x00333101, -+ 0xC78, 0x00343101, -+ 0xC78, 0x00353101, -+ 0xC78, 0x00363101, -+ 0xC78, 0x00373101, -+ 0xC78, 0x00383101, -+ 0xC78, 0x00393101, -+ 0xC78, 0x003A3101, -+ 0xC78, 0x003B3101, -+ 0xC78, 0x003C3101, -+ 0xC78, 0x003D3101, -+ 0xC78, 0x003E3101, -+ 0xC78, 0x003F3101, -+ 0xC78, 0xFA403101, -+ 0xC78, 0xF9413101, -+ 0xC78, 0xF8423101, -+ 0xC78, 0xF7433101, -+ 0xC78, 0xF6443101, -+ 0xC78, 0xF5453101, -+ 0xC78, 0xF4463101, -+ 0xC78, 0xF3473101, -+ 0xC78, 0xF2483101, -+ 0xC78, 0xE1493101, -+ 0xC78, 0xE04A3101, -+ 0xC78, 0xEF4B3101, -+ 0xC78, 0xEE4C3101, -+ 0xC78, 0xED4D3101, -+ 0xC78, 0xEC4E3101, -+ 0xC78, 0xEB4F3101, -+ 0xC78, 0xEA503101, -+ 0xC78, 0xE9513101, -+ 0xC78, 0xE8523101, -+ 0xC78, 0xE7533101, -+ 0xC78, 0xE6543101, -+ 0xC78, 0xE5553101, -+ 0xC78, 0xE4563101, -+ 0xC78, 0xE3573101, -+ 0xC78, 0xE2583101, -+ 0xC78, 0xE1593101, -+ 0xC78, 0xE05A3101, -+ 0xC78, 0xC25B3101, -+ 0xC78, 0xC15C3101, -+ 0xC78, 0xC05D3101, -+ 0xC78, 0x825E3101, -+ 0xC78, 0x815F3101, -+ 0xC78, 0x80603101, -+ 0xC78, 0x80613101, -+ 0xC78, 0x80623101, -+ 0xC78, 0x80633101, -+ 0xC78, 0x80643101, -+ 0xC78, 0x80653101, -+ 0xC78, 0x80663101, -+ 0xC78, 0x80673101, -+ 0xC78, 0x80683101, -+ 0xC78, 0x80693101, -+ 0xC78, 0x806A3101, -+ 0xC78, 0x806B3101, -+ 0xC78, 0x806C3101, -+ 0xC78, 0x806D3101, -+ 0xC78, 0x806E3101, -+ 0xC78, 0x806F3101, -+ 0xC78, 0x80703101, -+ 0xC78, 0x80713101, -+ 0xC78, 0x80723101, -+ 0xC78, 0x80733101, -+ 0xC78, 0x80743101, -+ 0xC78, 0x80753101, -+ 0xC78, 0x80763101, -+ 0xC78, 0x80773101, -+ 0xC78, 0x80783101, -+ 0xC78, 0x80793101, -+ 0xC78, 0x807A3101, -+ 0xC78, 0x807B3101, -+ 0xC78, 0x807C3101, -+ 0xC78, 0x807D3101, -+ 0xC78, 0x807E3101, -+ 0xC78, 0x807F3101, -+ 0xC78, 0xFF402001, -+ 0xC78, 0xFF412001, -+ 0xC78, 0xFF422001, -+ 0xC78, 0xFF432001, -+ 0xC78, 0xFF442001, -+ 0xC78, 0xFF452001, -+ 0xC78, 0xFF462001, -+ 0xC78, 0xFF472001, -+ 0xC78, 0xFF482001, -+ 0xC78, 0xFF492001, -+ 0xC78, 0xFF4A2001, -+ 0xC78, 0xFF4B2001, -+ 0xC78, 0xFF4C2001, -+ 0xC78, 0xFE4D2001, -+ 0xC78, 0xFD4E2001, -+ 0xC78, 0xFC4F2001, -+ 0xC78, 0xFB502001, -+ 0xC78, 0xFA512001, -+ 0xC78, 0xF9522001, -+ 0xC78, 0xF8532001, -+ 0xC78, 0xF7542001, -+ 0xC78, 0xF6552001, -+ 0xC78, 0xF5562001, -+ 0xC78, 0xF4572001, -+ 0xC78, 0xF3582001, -+ 0xC78, 0xF2592001, -+ 0xC78, 0xF15A2001, -+ 0xC78, 0xF05B2001, -+ 0xC78, 0xEF5C2001, -+ 0xC78, 0xEE5D2001, -+ 0xC78, 0xED5E2001, -+ 0xC78, 0xEC5F2001, -+ 0xC78, 0xEB602001, -+ 0xC78, 0xEA612001, -+ 0xC78, 0xE9622001, -+ 0xC78, 0xE8632001, -+ 0xC78, 0xE7642001, -+ 0xC78, 0xE6652001, -+ 0xC78, 0xE5662001, -+ 0xC78, 0xE4672001, -+ 0xC78, 0xE3682001, -+ 0xC78, 0xC5692001, -+ 0xC78, 0xC46A2001, -+ 0xC78, 0xC36B2001, -+ 0xC78, 0xA46C2001, -+ 0xC78, 0x846D2001, -+ 0xC78, 0x836E2001, -+ 0xC78, 0x826F2001, -+ 0xC78, 0x81702001, -+ 0xC78, 0x80712001, -+ 0xC78, 0x80722001, -+ 0xC78, 0x80732001, -+ 0xC78, 0x80742001, -+ 0xC78, 0x80752001, -+ 0xC78, 0x80762001, -+ 0xC78, 0x80772001, -+ 0xC78, 0x80782001, -+ 0xC78, 0x80792001, -+ 0xC78, 0x807A2001, -+ 0xC78, 0x807B2001, -+ 0xC78, 0x807C2001, -+ 0xC78, 0x807D2001, -+ 0xC78, 0x807E2001, -+ 0xC78, 0x807F2001, -+ 0xC50, 0x69553422, -+ 0xC50, 0x69553420, -+ -+}; -+ -+void -+odm_read_and_config_mp_8703b_agc_tab(struct dm_struct *dm) -+{ -+ u32 i = 0; -+ u8 c_cond; -+ boolean is_matched = true, is_skipped = false; -+ u32 array_len = sizeof(array_mp_8703b_agc_tab) / sizeof(u32); -+ u32 *array = array_mp_8703b_agc_tab; -+ -+ u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); -+ -+ while ((i + 1) < array_len) { -+ v1 = array[i]; -+ v2 = array[i + 1]; -+ -+ if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/ -+ if (v1 & BIT(31)) {/* positive condition*/ -+ c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); -+ if (c_cond == COND_ENDIF) {/*end*/ -+ is_matched = true; -+ is_skipped = false; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n"); -+ } else if (c_cond == COND_ELSE) { /*else*/ -+ is_matched = is_skipped ? false : true; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n"); -+ } else {/*if , else if*/ -+ pre_v1 = v1; -+ pre_v2 = v2; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n"); -+ } -+ } else if (v1 & BIT(30)) { /*negative condition*/ -+ if (is_skipped == false) { -+ if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { -+ is_matched = true; -+ is_skipped = true; -+ } else { -+ is_matched = false; -+ is_skipped = false; -+ } -+ } else -+ is_matched = false; -+ } -+ } else { -+ if (is_matched) -+ odm_config_bb_agc_8703b(dm, v1, MASKDWORD, v2); -+ } -+ i = i + 2; -+ } -+} -+ -+u32 -+odm_get_version_mp_8703b_agc_tab(void) -+{ -+ return 18; -+} -+ -+/****************************************************************************** -+* phy_reg.TXT -+******************************************************************************/ -+ -+u32 array_mp_8703b_phy_reg[] = { -+ 0x800, 0x83045700, -+ 0x804, 0x00000003, -+ 0x808, 0x0000FC00, -+ 0x80C, 0x0000000A, -+ 0x810, 0x10001331, -+ 0x814, 0x020C3D10, -+ 0x818, 0x02200385, -+ 0x81C, 0x00000000, -+ 0x820, 0x01000100, -+ 0x824, 0x00390204, -+ 0x828, 0x00000000, -+ 0x82C, 0x00000000, -+ 0x830, 0x00000000, -+ 0x834, 0x00000000, -+ 0x838, 0x00000000, -+ 0x83C, 0x00000000, -+ 0x840, 0x00010000, -+ 0x844, 0x00000000, -+ 0x848, 0x00000000, -+ 0x84C, 0x00000000, -+ 0x850, 0x00000000, -+ 0x854, 0x00000000, -+ 0x858, 0x569A11A9, -+ 0x85C, 0x01000014, -+ 0x860, 0x66F60110, -+ 0x864, 0x061F0649, -+ 0x868, 0x00000000, -+ 0x86C, 0x27272700, -+ 0x870, 0x07000760, -+ 0x874, 0x25004000, -+ 0x878, 0x00000808, -+ 0x87C, 0x004F0201, -+ 0x880, 0xB0000B1E, -+ 0x884, 0x00000001, -+ 0x888, 0x00000000, -+ 0x88C, 0xCCC000C0, -+ 0x890, 0x00000800, -+ 0x894, 0xFFFFFFFE, -+ 0x898, 0x40302010, -+ 0x89C, 0x00706050, -+ 0x900, 0x00000000, -+ 0x904, 0x00000023, -+ 0x908, 0x00000000, -+ 0x90C, 0x81121111, -+ 0x910, 0x00000002, -+ 0x914, 0x00000201, -+ 0x948, 0x99000000, -+ 0x94C, 0x00000010, -+ 0x950, 0x20003800, -+ 0x954, 0x4A880000, -+ 0x958, 0x4BC5D87A, -+ 0x95C, 0x04EB9B79, -+ 0xA00, 0x00D047C8, -+ 0xA04, 0x80FF800C, -+ 0xA08, 0x8C838300, -+ 0xA0C, 0x2E7F120F, -+ 0xA10, 0x9500BB78, -+ 0xA14, 0x1114D028, -+ 0xA18, 0x00881117, -+ 0xA1C, 0x89140F00, -+ 0xA20, 0xD1D80000, -+ 0xA24, 0x5A7DA0BD, -+ 0xA28, 0x0000223B, -+ 0xA2C, 0x00D30000, -+ 0xA70, 0x101FBF00, -+ 0xA74, 0x00000007, -+ 0xA78, 0x00008900, -+ 0xA7C, 0x225B0606, -+ 0xA80, 0x2180FA74, -+ 0xA84, 0x00120000, -+ 0xA88, 0x040C0000, -+ 0xA8C, 0x12345678, -+ 0xA90, 0xABCDEF00, -+ 0xA94, 0x001B1B89, -+ 0xA98, 0x05100000, -+ 0xA9C, 0x3F000000, -+ 0xAA0, 0x00000000, -+ 0xB2C, 0x00000000, -+ 0xC00, 0x48071D40, -+ 0xC04, 0x03A05611, -+ 0xC08, 0x000000E4, -+ 0xC0C, 0x6C6C6C6C, -+ 0xC10, 0x18800000, -+ 0xC14, 0x40000100, -+ 0xC18, 0x08800000, -+ 0xC1C, 0x40000100, -+ 0xC20, 0x00000000, -+ 0xC24, 0x00000000, -+ 0xC28, 0x00000000, -+ 0xC2C, 0x00000000, -+ 0xC30, 0x69E9AC4B, -+ 0xC34, 0x31000040, -+ 0xC38, 0x21688080, -+ 0xC3C, 0x000016CC, -+ 0xC40, 0x1F78403F, -+ 0xC44, 0x00010036, -+ 0xC48, 0xEC020107, -+ 0xC4C, 0x007F037F, -+ 0xC50, 0x69553420, -+ 0xC54, 0x43BC0094, -+ 0xC58, 0x00015967, -+ 0xC5C, 0x18250492, -+ 0xC60, 0x00000000, -+ 0xC64, 0x7112848B, -+ 0xC68, 0x47C07BFF, -+ 0xC6C, 0x00000036, -+ 0xC70, 0x2C7F000D, -+ 0xC74, 0x020600DB, -+ 0xC78, 0x0000001F, -+ 0xC7C, 0x00B91612, -+ 0xC80, 0x390000E4, -+ 0xC84, 0x19F60000, -+ 0xC88, 0x40000100, -+ 0xC8C, 0x20200000, -+ 0xC90, 0x00091521, -+ 0xC94, 0x00000000, -+ 0xC98, 0x00121820, -+ 0xC9C, 0x00007F7F, -+ 0xCA0, 0x00000000, -+ 0xCA4, 0x000300A0, -+ 0xCA8, 0x00000000, -+ 0xCAC, 0x00000000, -+ 0xCB0, 0x00000000, -+ 0xCB4, 0x00000000, -+ 0xCB8, 0x00000000, -+ 0xCBC, 0x28000000, -+ 0xCC0, 0x00000000, -+ 0xCC4, 0x00000000, -+ 0xCC8, 0x00000000, -+ 0xCCC, 0x00000000, -+ 0xCD0, 0x00000000, -+ 0xCD4, 0x00000000, -+ 0xCD8, 0x64B22427, -+ 0xCDC, 0x00766932, -+ 0xCE0, 0x00222222, -+ 0xCE4, 0x10000000, -+ 0xCE8, 0x37644302, -+ 0xCEC, 0x2F97D40C, -+ 0xD00, 0x00030740, -+ 0xD04, 0x40020401, -+ 0xD08, 0x0000907F, -+ 0xD0C, 0x20010201, -+ 0xD10, 0xA0633333, -+ 0xD14, 0x3333BC53, -+ 0xD18, 0x7A8F5B6F, -+ 0xD2C, 0xCB979975, -+ 0xD30, 0x00000000, -+ 0xD34, 0x80608000, -+ 0xD38, 0x98000000, -+ 0xD3C, 0x40127353, -+ 0xD40, 0x00000000, -+ 0xD44, 0x00000000, -+ 0xD48, 0x00000000, -+ 0xD4C, 0x00000000, -+ 0xD50, 0x6437140A, -+ 0xD54, 0x00000000, -+ 0xD58, 0x00000282, -+ 0xD5C, 0x30032064, -+ 0xD60, 0x4653DE68, -+ 0xD64, 0x04518A3C, -+ 0xD68, 0x00002101, -+ 0xE00, 0x2D2D2D2D, -+ 0xE04, 0x2D2D2D2D, -+ 0xE08, 0x0390272D, -+ 0xE10, 0x2D2D2D2D, -+ 0xE14, 0x2D2D2D2D, -+ 0xE18, 0x2D2D2D2D, -+ 0xE1C, 0x2D2D2D2D, -+ 0xE28, 0x00000000, -+ 0xE30, 0x1000DC1F, -+ 0xE34, 0x10008C1F, -+ 0xE38, 0x02140102, -+ 0xE3C, 0x681604C2, -+ 0xE40, 0x01007C00, -+ 0xE44, 0x01004800, -+ 0xE48, 0xFB000000, -+ 0xE4C, 0x000028D1, -+ 0xE50, 0x1000DC1F, -+ 0xE54, 0x10008C1F, -+ 0xE58, 0x02140102, -+ 0xE5C, 0x28160D05, -+ 0xE60, 0x00000048, -+ 0xE68, 0x001B25A4, -+ 0xE6C, 0x01C00014, -+ 0xE70, 0x01C00014, -+ 0xE74, 0x02000014, -+ 0xE78, 0x02000014, -+ 0xE7C, 0x02000014, -+ 0xE80, 0x02000014, -+ 0xE84, 0x01C00014, -+ 0xE88, 0x02000014, -+ 0xE8C, 0x01C00014, -+ 0xED0, 0x01C00014, -+ 0xED4, 0x01C00014, -+ 0xED8, 0x01C00014, -+ 0xEDC, 0x00000014, -+ 0xEE0, 0x00000014, -+ 0xEE8, 0x21555448, -+ 0xEEC, 0x03C00014, -+ 0xF14, 0x00000003, -+ 0xF4C, 0x00000000, -+ 0xF00, 0x00000300, -+ -+}; -+ -+void -+odm_read_and_config_mp_8703b_phy_reg(struct dm_struct *dm) -+{ -+ u32 i = 0; -+ u8 c_cond; -+ boolean is_matched = true, is_skipped = false; -+ u32 array_len = sizeof(array_mp_8703b_phy_reg) / sizeof(u32); -+ u32 *array = array_mp_8703b_phy_reg; -+ -+ u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); -+ -+ while ((i + 1) < array_len) { -+ v1 = array[i]; -+ v2 = array[i + 1]; -+ -+ if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/ -+ if (v1 & BIT(31)) {/* positive condition*/ -+ c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); -+ if (c_cond == COND_ENDIF) {/*end*/ -+ is_matched = true; -+ is_skipped = false; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n"); -+ } else if (c_cond == COND_ELSE) { /*else*/ -+ is_matched = is_skipped ? false : true; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n"); -+ } else {/*if , else if*/ -+ pre_v1 = v1; -+ pre_v2 = v2; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n"); -+ } -+ } else if (v1 & BIT(30)) { /*negative condition*/ -+ if (is_skipped == false) { -+ if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { -+ is_matched = true; -+ is_skipped = true; -+ } else { -+ is_matched = false; -+ is_skipped = false; -+ } -+ } else -+ is_matched = false; -+ } -+ } else { -+ if (is_matched) -+ odm_config_bb_phy_8703b(dm, v1, MASKDWORD, v2); -+ } -+ i = i + 2; -+ } -+} -+ -+u32 -+odm_get_version_mp_8703b_phy_reg(void) -+{ -+ return 18; -+} -+ -+/****************************************************************************** -+* phy_reg_pg.TXT -+******************************************************************************/ -+ -+u32 array_mp_8703b_phy_reg_pg[] = { -+ 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003200, -+ 0, 0, 0, 0x0000086c, 0xffffff00, 0x32323200, -+ 0, 0, 0, 0x00000e00, 0xffffffff, 0x34363636, -+ 0, 0, 0, 0x00000e04, 0xffffffff, 0x28303234, -+ 0, 0, 0, 0x00000e10, 0xffffffff, 0x30343434, -+ 0, 0, 0, 0x00000e14, 0xffffffff, 0x26262830 -+}; -+ -+void -+odm_read_and_config_mp_8703b_phy_reg_pg(struct dm_struct *dm) -+{ -+ u32 i = 0; -+ u32 array_len = sizeof(array_mp_8703b_phy_reg_pg) / sizeof(u32); -+ u32 *array = array_mp_8703b_phy_reg_pg; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ -+ PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); -+ hal_data->nLinesReadPwrByRate = array_len / 6; -+#endif -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); -+ -+ dm->phy_reg_pg_version = 1; -+ dm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; -+ -+ for (i = 0; i < array_len; i += 6) { -+ u32 v1 = array[i]; -+ u32 v2 = array[i + 1]; -+ u32 v3 = array[i + 2]; -+ u32 v4 = array[i + 3]; -+ u32 v5 = array[i + 4]; -+ u32 v6 = array[i + 5]; -+ -+ odm_config_bb_phy_reg_pg_8703b(dm, v1, v2, v3, v4, v5, v6); -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", -+ (v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6); -+#endif -+ } -+} -+ -+ -+ -+#endif /* end of HWIMG_SUPPORT*/ -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_bb.h b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_bb.h -new file mode 100644 -index 000000000000..1fcd6f99fd68 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_bb.h -@@ -0,0 +1,51 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/*Image2HeaderVersion: 3.5.2*/ -+#if (RTL8703B_SUPPORT == 1) -+#ifndef __INC_MP_BB_HW_IMG_8703B_H -+#define __INC_MP_BB_HW_IMG_8703B_H -+ -+ -+/****************************************************************************** -+* agc_tab.TXT -+******************************************************************************/ -+ -+void -+odm_read_and_config_mp_8703b_agc_tab( /* tc: Test Chip, mp: mp Chip*/ -+ struct dm_struct *dm); -+u32 odm_get_version_mp_8703b_agc_tab(void); -+ -+/****************************************************************************** -+* phy_reg.TXT -+******************************************************************************/ -+ -+void -+odm_read_and_config_mp_8703b_phy_reg( /* tc: Test Chip, mp: mp Chip*/ -+ struct dm_struct *dm); -+u32 odm_get_version_mp_8703b_phy_reg(void); -+ -+/****************************************************************************** -+* phy_reg_pg.TXT -+******************************************************************************/ -+ -+void -+odm_read_and_config_mp_8703b_phy_reg_pg( /* tc: Test Chip, mp: mp Chip*/ -+ struct dm_struct *dm); -+u32 odm_get_version_mp_8703b_phy_reg_pg(void); -+ -+#endif -+#endif /* end of HWIMG_SUPPORT*/ -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_mac.c b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_mac.c -new file mode 100644 -index 000000000000..28d474a151a6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_mac.c -@@ -0,0 +1,288 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/*Image2HeaderVersion: 3.5.2*/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (RTL8703B_SUPPORT == 1) -+static boolean -+check_positive( -+ struct dm_struct *dm, -+ const u32 condition1, -+ const u32 condition2, -+ const u32 condition3, -+ const u32 condition4 -+) -+{ -+ u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ -+ ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ -+ ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ -+ ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ -+ ((dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/ -+ ((dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/ -+ ((dm->board_type & BIT(5)) >> 5) << 6; /* _TRSWT*/ -+ -+ u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; -+ -+ u8 cut_version_for_para = (dm->cut_version == ODM_CUT_A) ? 15 : dm->cut_version; -+ u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type; -+ -+ u32 driver1 = cut_version_for_para << 24 | -+ (dm->support_interface & 0xF0) << 16 | -+ dm->support_platform << 16 | -+ pkg_type_for_para << 12 | -+ (dm->support_interface & 0x0F) << 8 | -+ _board_type; -+ -+ u32 driver2 = (dm->type_glna & 0xFF) << 0 | -+ (dm->type_gpa & 0xFF) << 8 | -+ (dm->type_alna & 0xFF) << 16 | -+ (dm->type_apa & 0xFF) << 24; -+ -+ u32 driver3 = 0; -+ -+ u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | -+ (dm->type_gpa & 0xFF00) | -+ (dm->type_alna & 0xFF00) << 8 | -+ (dm->type_apa & 0xFF00) << 16; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", -+ __func__, cond1, cond2, cond3, cond4); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", -+ __func__, driver1, driver2, driver3, driver4); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ " (Platform, Interface) = (0x%X, 0x%X)\n", -+ dm->support_platform, dm->support_interface); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, -+ dm->package_type); -+ -+ -+ /*============== value Defined Check ===============*/ -+ /*QFN type [15:12] and cut version [27:24] need to do value check*/ -+ -+ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) -+ return false; -+ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) -+ return false; -+ -+ /*=============== Bit Defined Check ================*/ -+ /* We don't care [31:28] */ -+ -+ cond1 &= 0x00FF0FFF; -+ driver1 &= 0x00FF0FFF; -+ -+ if ((cond1 & driver1) == cond1) { -+ u32 bit_mask = 0; -+ -+ if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/ -+ return true; -+ -+ if ((cond1 & BIT(0)) != 0) /*GLNA*/ -+ bit_mask |= 0x000000FF; -+ if ((cond1 & BIT(1)) != 0) /*GPA*/ -+ bit_mask |= 0x0000FF00; -+ if ((cond1 & BIT(2)) != 0) /*ALNA*/ -+ bit_mask |= 0x00FF0000; -+ if ((cond1 & BIT(3)) != 0) /*APA*/ -+ bit_mask |= 0xFF000000; -+ -+ if (((cond2 & bit_mask) == (driver2 & bit_mask)) && ((cond4 & bit_mask) == (driver4 & bit_mask))) /* board_type of each RF path is matched*/ -+ return true; -+ else -+ return false; -+ } else -+ return false; -+} -+ -+/****************************************************************************** -+* mac_reg.TXT -+******************************************************************************/ -+ -+u32 array_mp_8703b_mac_reg[] = { -+ 0x02F, 0x00000030, -+ 0x035, 0x00000000, -+ 0x067, 0x00000002, -+ 0x092, 0x00000080, -+ 0x421, 0x0000000F, -+ 0x428, 0x0000000A, -+ 0x429, 0x00000010, -+ 0x430, 0x00000000, -+ 0x431, 0x00000000, -+ 0x432, 0x00000000, -+ 0x433, 0x00000001, -+ 0x434, 0x00000002, -+ 0x435, 0x00000003, -+ 0x436, 0x00000005, -+ 0x437, 0x00000007, -+ 0x438, 0x00000000, -+ 0x439, 0x00000000, -+ 0x43A, 0x00000000, -+ 0x43B, 0x00000001, -+ 0x43C, 0x00000002, -+ 0x43D, 0x00000003, -+ 0x43E, 0x00000005, -+ 0x43F, 0x00000007, -+ 0x440, 0x0000005D, -+ 0x441, 0x00000001, -+ 0x442, 0x00000000, -+ 0x444, 0x00000010, -+ 0x445, 0x00000000, -+ 0x446, 0x00000000, -+ 0x447, 0x00000000, -+ 0x448, 0x00000000, -+ 0x449, 0x000000F0, -+ 0x44A, 0x0000000F, -+ 0x44B, 0x0000003E, -+ 0x44C, 0x00000010, -+ 0x44D, 0x00000000, -+ 0x44E, 0x00000000, -+ 0x44F, 0x00000000, -+ 0x450, 0x00000000, -+ 0x451, 0x000000F0, -+ 0x452, 0x0000000F, -+ 0x453, 0x00000000, -+ 0x456, 0x0000005E, -+ 0x460, 0x00000066, -+ 0x461, 0x00000066, -+ 0x4C8, 0x000000FF, -+ 0x4C9, 0x00000008, -+ 0x4CC, 0x000000FF, -+ 0x4CD, 0x000000FF, -+ 0x4CE, 0x00000001, -+ 0x500, 0x00000026, -+ 0x501, 0x000000A2, -+ 0x502, 0x0000002F, -+ 0x503, 0x00000000, -+ 0x504, 0x00000028, -+ 0x505, 0x000000A3, -+ 0x506, 0x0000005E, -+ 0x507, 0x00000000, -+ 0x508, 0x0000002B, -+ 0x509, 0x000000A4, -+ 0x50A, 0x0000005E, -+ 0x50B, 0x00000000, -+ 0x50C, 0x0000004F, -+ 0x50D, 0x000000A4, -+ 0x50E, 0x00000000, -+ 0x50F, 0x00000000, -+ 0x512, 0x0000001C, -+ 0x514, 0x0000000A, -+ 0x516, 0x0000000A, -+ 0x525, 0x0000004F, -+ 0x550, 0x00000010, -+ 0x551, 0x00000010, -+ 0x559, 0x00000002, -+ 0x55C, 0x00000028, -+ 0x55D, 0x000000FF, -+ 0x605, 0x00000030, -+ 0x608, 0x0000000E, -+ 0x609, 0x0000002A, -+ 0x620, 0x000000FF, -+ 0x621, 0x000000FF, -+ 0x622, 0x000000FF, -+ 0x623, 0x000000FF, -+ 0x624, 0x000000FF, -+ 0x625, 0x000000FF, -+ 0x626, 0x000000FF, -+ 0x627, 0x000000FF, -+ 0x638, 0x00000028, -+ 0x63C, 0x0000000A, -+ 0x63D, 0x0000000A, -+ 0x63E, 0x0000000C, -+ 0x63F, 0x0000000C, -+ 0x640, 0x00000040, -+ 0x642, 0x00000040, -+ 0x643, 0x00000000, -+ 0x652, 0x000000C8, -+ 0x66A, 0x000000B0, -+ 0x66E, 0x00000005, -+ 0x700, 0x00000021, -+ 0x701, 0x00000043, -+ 0x702, 0x00000065, -+ 0x703, 0x00000087, -+ 0x708, 0x00000021, -+ 0x709, 0x00000043, -+ 0x70A, 0x00000065, -+ 0x70B, 0x00000087, -+ 0x765, 0x00000018, -+ 0x76E, 0x00000004, -+ -+}; -+ -+void -+odm_read_and_config_mp_8703b_mac_reg(struct dm_struct *dm) -+{ -+ u32 i = 0; -+ u8 c_cond; -+ boolean is_matched = true, is_skipped = false; -+ u32 array_len = sizeof(array_mp_8703b_mac_reg) / sizeof(u32); -+ u32 *array = array_mp_8703b_mac_reg; -+ -+ u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); -+ -+ while ((i + 1) < array_len) { -+ v1 = array[i]; -+ v2 = array[i + 1]; -+ -+ if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/ -+ if (v1 & BIT(31)) {/* positive condition*/ -+ c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); -+ if (c_cond == COND_ENDIF) {/*end*/ -+ is_matched = true; -+ is_skipped = false; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n"); -+ } else if (c_cond == COND_ELSE) { /*else*/ -+ is_matched = is_skipped ? false : true; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n"); -+ } else {/*if , else if*/ -+ pre_v1 = v1; -+ pre_v2 = v2; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n"); -+ } -+ } else if (v1 & BIT(30)) { /*negative condition*/ -+ if (is_skipped == false) { -+ if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { -+ is_matched = true; -+ is_skipped = true; -+ } else { -+ is_matched = false; -+ is_skipped = false; -+ } -+ } else -+ is_matched = false; -+ } -+ } else { -+ if (is_matched) -+ odm_config_mac_8703b(dm, v1, (u8)v2); -+ } -+ i = i + 2; -+ } -+} -+ -+u32 -+odm_get_version_mp_8703b_mac_reg(void) -+{ -+ return 18; -+} -+ -+#endif /* end of HWIMG_SUPPORT*/ -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_mac.h b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_mac.h -new file mode 100644 -index 000000000000..365c40aed6c6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_mac.h -@@ -0,0 +1,33 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/*Image2HeaderVersion: 3.5.2*/ -+#if (RTL8703B_SUPPORT == 1) -+#ifndef __INC_MP_MAC_HW_IMG_8703B_H -+#define __INC_MP_MAC_HW_IMG_8703B_H -+ -+ -+/****************************************************************************** -+* mac_reg.TXT -+******************************************************************************/ -+ -+void -+odm_read_and_config_mp_8703b_mac_reg( /* tc: Test Chip, mp: mp Chip*/ -+ struct dm_struct *dm); -+u32 odm_get_version_mp_8703b_mac_reg(void); -+ -+#endif -+#endif /* end of HWIMG_SUPPORT*/ -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_rf.c b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_rf.c -new file mode 100644 -index 000000000000..dae9e05b6f99 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_rf.c -@@ -0,0 +1,997 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/*Image2HeaderVersion: 3.5.2*/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (RTL8703B_SUPPORT == 1) -+static boolean -+check_positive( -+ struct dm_struct *dm, -+ const u32 condition1, -+ const u32 condition2, -+ const u32 condition3, -+ const u32 condition4 -+) -+{ -+ u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ -+ ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ -+ ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ -+ ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ -+ ((dm->board_type & BIT(2)) >> 2) << 4 | /* _BT*/ -+ ((dm->board_type & BIT(1)) >> 1) << 5 | /* _NGFF*/ -+ ((dm->board_type & BIT(5)) >> 5) << 6; /* _TRSWT*/ -+ -+ u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; -+ -+ u8 cut_version_for_para = (dm->cut_version == ODM_CUT_A) ? 15 : dm->cut_version; -+ u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type; -+ -+ u32 driver1 = cut_version_for_para << 24 | -+ (dm->support_interface & 0xF0) << 16 | -+ dm->support_platform << 16 | -+ pkg_type_for_para << 12 | -+ (dm->support_interface & 0x0F) << 8 | -+ _board_type; -+ -+ u32 driver2 = (dm->type_glna & 0xFF) << 0 | -+ (dm->type_gpa & 0xFF) << 8 | -+ (dm->type_alna & 0xFF) << 16 | -+ (dm->type_apa & 0xFF) << 24; -+ -+ u32 driver3 = 0; -+ -+ u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | -+ (dm->type_gpa & 0xFF00) | -+ (dm->type_alna & 0xFF00) << 8 | -+ (dm->type_apa & 0xFF00) << 16; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> %s (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", -+ __func__, cond1, cond2, cond3, cond4); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> %s (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", -+ __func__, driver1, driver2, driver3, driver4); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ " (Platform, Interface) = (0x%X, 0x%X)\n", -+ dm->support_platform, dm->support_interface); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, -+ dm->package_type); -+ -+ -+ /*============== value Defined Check ===============*/ -+ /*QFN type [15:12] and cut version [27:24] need to do value check*/ -+ -+ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) -+ return false; -+ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) -+ return false; -+ -+ /*=============== Bit Defined Check ================*/ -+ /* We don't care [31:28] */ -+ -+ cond1 &= 0x00FF0FFF; -+ driver1 &= 0x00FF0FFF; -+ -+ if ((cond1 & driver1) == cond1) { -+ u32 bit_mask = 0; -+ -+ if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/ -+ return true; -+ -+ if ((cond1 & BIT(0)) != 0) /*GLNA*/ -+ bit_mask |= 0x000000FF; -+ if ((cond1 & BIT(1)) != 0) /*GPA*/ -+ bit_mask |= 0x0000FF00; -+ if ((cond1 & BIT(2)) != 0) /*ALNA*/ -+ bit_mask |= 0x00FF0000; -+ if ((cond1 & BIT(3)) != 0) /*APA*/ -+ bit_mask |= 0xFF000000; -+ -+ if (((cond2 & bit_mask) == (driver2 & bit_mask)) && ((cond4 & bit_mask) == (driver4 & bit_mask))) /* board_type of each RF path is matched*/ -+ return true; -+ else -+ return false; -+ } else -+ return false; -+} -+ -+/****************************************************************************** -+* radioa.TXT -+******************************************************************************/ -+ -+u32 array_mp_8703b_radioa[] = { -+ 0x018, 0x00008C01, -+ 0x0B5, 0x0008C050, -+ 0x0B1, 0x00054258, -+ 0x0B2, 0x00054C00, -+ 0x030, 0x00018000, -+ 0x031, 0x00000027, -+ 0x032, 0x000A7F07, -+ 0x030, 0x00020000, -+ 0x031, 0x00000027, -+ 0x032, 0x000E7D87, -+ 0x01C, 0x000F8635, -+ 0x0EF, 0x00080000, -+ 0x030, 0x00008000, -+ 0x031, 0x00000004, -+ 0x032, 0x00006105, -+ 0x0EF, 0x00000000, -+ 0x0EF, 0x00000400, -+ 0x041, 0x0000BD54, -+ 0x041, 0x00003DD4, -+ 0x041, 0x0000FDD4, -+ 0x0EF, 0x00000000, -+ 0x0DF, 0x00000600, -+ 0x050, 0x0000C6DB, -+ 0x051, 0x00004505, -+ 0x052, 0x0000E31D, -+ 0x053, 0x00040579, -+ 0x054, 0x00000000, -+ 0x055, 0x0008206E, -+ 0x056, 0x00040000, -+ 0x0EF, 0x00000100, -+ 0x034, 0x0000ADD7, -+ 0x034, 0x00009DD4, -+ 0x034, 0x00008DD1, -+ 0x034, 0x00007DCE, -+ 0x034, 0x00006DCB, -+ 0x034, 0x00005CCE, -+ 0x034, 0x000048CD, -+ 0x034, 0x000034CC, -+ 0x034, 0x0000244F, -+ 0x034, 0x0000144C, -+ 0x034, 0x0000004E, -+ 0x0EF, 0x00000000, -+ 0x0EF, 0x00002000, -+ 0x03B, 0x0003801F, -+ 0x03B, 0x00030002, -+ 0x03B, 0x00028001, -+ 0x03B, 0x00020000, -+ 0x03B, 0x00018003, -+ 0x03B, 0x00010002, -+ 0x03B, 0x00008001, -+ 0x03B, 0x00000000, -+ 0x0EF, 0x00000000, -+ 0x082, 0x000C0000, -+ 0x083, 0x000AF025, -+ 0x01E, 0x00000C08, -+ -+}; -+ -+void -+odm_read_and_config_mp_8703b_radioa(struct dm_struct *dm) -+{ -+ u32 i = 0; -+ u8 c_cond; -+ boolean is_matched = true, is_skipped = false; -+ u32 array_len = sizeof(array_mp_8703b_radioa) / sizeof(u32); -+ u32 *array = array_mp_8703b_radioa; -+ -+ u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); -+ -+ while ((i + 1) < array_len) { -+ v1 = array[i]; -+ v2 = array[i + 1]; -+ -+ if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/ -+ if (v1 & BIT(31)) {/* positive condition*/ -+ c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); -+ if (c_cond == COND_ENDIF) {/*end*/ -+ is_matched = true; -+ is_skipped = false; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n"); -+ } else if (c_cond == COND_ELSE) { /*else*/ -+ is_matched = is_skipped ? false : true; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n"); -+ } else {/*if , else if*/ -+ pre_v1 = v1; -+ pre_v2 = v2; -+ PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n"); -+ } -+ } else if (v1 & BIT(30)) { /*negative condition*/ -+ if (is_skipped == false) { -+ if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { -+ is_matched = true; -+ is_skipped = true; -+ } else { -+ is_matched = false; -+ is_skipped = false; -+ } -+ } else -+ is_matched = false; -+ } -+ } else { -+ if (is_matched) -+ odm_config_rf_radio_a_8703b(dm, v1, v2); -+ } -+ i = i + 2; -+ } -+} -+ -+u32 -+odm_get_version_mp_8703b_radioa(void) -+{ -+ return 18; -+} -+ -+/****************************************************************************** -+* txpowertrack_sdio.TXT -+******************************************************************************/ -+ -+#if DEV_BUS_TYPE == RT_SDIO_INTERFACE -+u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_8703b[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+}; -+u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_sdio_8703b[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+}; -+u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_sdio_8703b[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+}; -+u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_sdio_8703b[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+}; -+u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_sdio_8703b[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_sdio_8703b[] = {0, 1, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15}; -+u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_sdio_8703b[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_8703b[] = {0, 1, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15}; -+u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_sdio_8703b[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_sdio_8703b[] = {0, 0, 1, 1, 2, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 7, 7, 8, 8, 8, 9, 10, 10, 10, 11, 11, 12, 12, 13, 13}; -+u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_8703b[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_8703b[] = {0, 0, 1, 1, 2, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 7, 7, 8, 8, 8, 9, 10, 10, 10, 11, 11, 12, 12, 13, 13}; -+#endif -+ -+void -+odm_read_and_config_mp_8703b_txpowertrack_sdio(struct dm_struct *dm) -+{ -+#if DEV_BUS_TYPE == RT_SDIO_INTERFACE -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8703b\n"); -+ -+ -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE); -+ -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE); -+ -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE * 3); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE * 3); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE * 3); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_8703b, DELTA_SWINGIDX_SIZE * 3); -+#endif -+} -+ -+/****************************************************************************** -+* txpowertrack_usb.TXT -+******************************************************************************/ -+ -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_8703b[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+}; -+u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_8703b[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+}; -+u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_8703b[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+ {0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18}, -+}; -+u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_usb_8703b[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, -+}; -+u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_usb_8703b[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_usb_8703b[] = {0, 1, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15}; -+u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_usb_8703b[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_8703b[] = {0, 1, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15}; -+u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_usb_8703b[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_usb_8703b[] = {0, 0, 1, 1, 2, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 7, 7, 8, 8, 8, 9, 10, 10, 10, 11, 11, 12, 12, 13, 13}; -+u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_8703b[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; -+u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_8703b[] = {0, 0, 1, 1, 2, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 7, 7, 8, 8, 8, 9, 10, 10, 10, 11, 11, 12, 12, 13, 13}; -+#endif -+ -+void -+odm_read_and_config_mp_8703b_txpowertrack_usb(struct dm_struct *dm) -+{ -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8703b\n"); -+ -+ -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE); -+ -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE); -+ -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE * 3); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE * 3); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE * 3); -+ odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_8703b, DELTA_SWINGIDX_SIZE * 3); -+#endif -+} -+ -+/****************************************************************************** -+* txpwr_lmt.TXT -+******************************************************************************/ -+ -+const char *array_mp_8703b_txpwr_lmt[] = { -+ "FCC", "2.4G", "20M", "CCK", "1T", "01", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "01", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "02", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "02", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "03", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "03", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "04", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "04", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "05", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "05", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "06", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "06", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "07", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "07", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "08", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "08", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "09", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "09", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "10", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "10", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "11", "30", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "11", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "12", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "13", "63", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "13", "26", -+ "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", -+ "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", -+ "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", -+ "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "01", "28", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "28", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "01", "28", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "02", "28", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "02", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "03", "32", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "03", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "04", "32", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "04", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "05", "32", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "05", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "06", "32", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "06", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "07", "32", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "07", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "08", "32", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "08", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "09", "32", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "09", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "10", "28", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "10", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "11", "28", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "11", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "12", "63", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "32", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "12", "32", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "13", "63", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "28", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "13", "28", -+ "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", -+ "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", -+ "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", -+ "FCC", "2.4G", "20M", "HT", "1T", "01", "26", -+ "ETSI", "2.4G", "20M", "HT", "1T", "01", "26", -+ "MKK", "2.4G", "20M", "HT", "1T", "01", "28", -+ "FCC", "2.4G", "20M", "HT", "1T", "02", "26", -+ "ETSI", "2.4G", "20M", "HT", "1T", "02", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "02", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "03", "32", -+ "ETSI", "2.4G", "20M", "HT", "1T", "03", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "03", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "04", "32", -+ "ETSI", "2.4G", "20M", "HT", "1T", "04", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "04", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "05", "32", -+ "ETSI", "2.4G", "20M", "HT", "1T", "05", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "05", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "06", "32", -+ "ETSI", "2.4G", "20M", "HT", "1T", "06", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "06", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "07", "32", -+ "ETSI", "2.4G", "20M", "HT", "1T", "07", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "07", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "08", "32", -+ "ETSI", "2.4G", "20M", "HT", "1T", "08", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "08", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "09", "32", -+ "ETSI", "2.4G", "20M", "HT", "1T", "09", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "09", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "10", "26", -+ "ETSI", "2.4G", "20M", "HT", "1T", "10", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "10", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "11", "26", -+ "ETSI", "2.4G", "20M", "HT", "1T", "11", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "11", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "12", "63", -+ "ETSI", "2.4G", "20M", "HT", "1T", "12", "32", -+ "MKK", "2.4G", "20M", "HT", "1T", "12", "32", -+ "FCC", "2.4G", "20M", "HT", "1T", "13", "63", -+ "ETSI", "2.4G", "20M", "HT", "1T", "13", "26", -+ "MKK", "2.4G", "20M", "HT", "1T", "13", "28", -+ "FCC", "2.4G", "20M", "HT", "1T", "14", "63", -+ "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", -+ "MKK", "2.4G", "20M", "HT", "1T", "14", "63", -+ "FCC", "2.4G", "20M", "HT", "2T", "01", "28", -+ "ETSI", "2.4G", "20M", "HT", "2T", "01", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "01", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "02", "28", -+ "ETSI", "2.4G", "20M", "HT", "2T", "02", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "02", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "03", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "03", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "03", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "04", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "04", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "04", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "05", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "05", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "05", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "06", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "06", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "06", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "07", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "07", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "07", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "08", "30", -+ "ETSI", "2.4G", "20M", "HT", "2T", "08", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "08", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "09", "28", -+ "ETSI", "2.4G", "20M", "HT", "2T", "09", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "09", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "10", "28", -+ "ETSI", "2.4G", "20M", "HT", "2T", "10", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "10", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "11", "28", -+ "ETSI", "2.4G", "20M", "HT", "2T", "11", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "11", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "12", "63", -+ "ETSI", "2.4G", "20M", "HT", "2T", "12", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "12", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "13", "63", -+ "ETSI", "2.4G", "20M", "HT", "2T", "13", "30", -+ "MKK", "2.4G", "20M", "HT", "2T", "13", "30", -+ "FCC", "2.4G", "20M", "HT", "2T", "14", "63", -+ "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", -+ "MKK", "2.4G", "20M", "HT", "2T", "14", "63", -+ "FCC", "2.4G", "40M", "HT", "1T", "01", "63", -+ "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", -+ "MKK", "2.4G", "40M", "HT", "1T", "01", "63", -+ "FCC", "2.4G", "40M", "HT", "1T", "02", "63", -+ "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", -+ "MKK", "2.4G", "40M", "HT", "1T", "02", "63", -+ "FCC", "2.4G", "40M", "HT", "1T", "03", "26", -+ "ETSI", "2.4G", "40M", "HT", "1T", "03", "26", -+ "MKK", "2.4G", "40M", "HT", "1T", "03", "26", -+ "FCC", "2.4G", "40M", "HT", "1T", "04", "26", -+ "ETSI", "2.4G", "40M", "HT", "1T", "04", "28", -+ "MKK", "2.4G", "40M", "HT", "1T", "04", "26", -+ "FCC", "2.4G", "40M", "HT", "1T", "05", "28", -+ "ETSI", "2.4G", "40M", "HT", "1T", "05", "28", -+ "MKK", "2.4G", "40M", "HT", "1T", "05", "26", -+ "FCC", "2.4G", "40M", "HT", "1T", "06", "28", -+ "ETSI", "2.4G", "40M", "HT", "1T", "06", "28", -+ "MKK", "2.4G", "40M", "HT", "1T", "06", "26", -+ "FCC", "2.4G", "40M", "HT", "1T", "07", "28", -+ "ETSI", "2.4G", "40M", "HT", "1T", "07", "28", -+ "MKK", "2.4G", "40M", "HT", "1T", "07", "26", -+ "FCC", "2.4G", "40M", "HT", "1T", "08", "26", -+ "ETSI", "2.4G", "40M", "HT", "1T", "08", "28", -+ "MKK", "2.4G", "40M", "HT", "1T", "08", "26", -+ "FCC", "2.4G", "40M", "HT", "1T", "09", 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"FCC", "5G", "20M", "HT", "2T", "36", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "36", "30", -+ "MKK", "5G", "20M", "HT", "2T", "36", "30", -+ "FCC", "5G", "20M", "HT", "2T", "40", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "40", "30", -+ "MKK", "5G", "20M", "HT", "2T", "40", "30", -+ "FCC", "5G", "20M", "HT", "2T", "44", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "44", "30", -+ "MKK", "5G", "20M", "HT", "2T", "44", "30", -+ "FCC", "5G", "20M", "HT", "2T", "48", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "48", "30", -+ "MKK", "5G", "20M", "HT", "2T", "48", "30", -+ "FCC", "5G", "20M", "HT", "2T", "52", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "52", "30", -+ "MKK", "5G", "20M", "HT", "2T", "52", "30", -+ "FCC", "5G", "20M", "HT", "2T", "56", "32", -+ "ETSI", "5G", "20M", "HT", "2T", "56", "30", -+ "MKK", "5G", "20M", "HT", "2T", "56", "30", -+ "FCC", "5G", "20M", "HT", "2T", "60", "30", -+ "ETSI", "5G", "20M", "HT", "2T", "60", "30", -+ "MKK", "5G", "20M", "HT", "2T", "60", "30", -+ "FCC", "5G", "20M", "HT", "2T", "64", "26", -+ "ETSI", "5G", "20M", "HT", "2T", "64", "30", -+ "MKK", "5G", "20M", "HT", "2T", "64", "30", -+ "FCC", "5G", "20M", "HT", "2T", "100", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "100", "30", -+ "MKK", "5G", "20M", "HT", "2T", "100", "30", -+ "FCC", "5G", "20M", "HT", "2T", "114", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "114", "30", -+ "MKK", "5G", "20M", "HT", "2T", "114", "30", -+ "FCC", "5G", "20M", "HT", "2T", "108", "30", -+ "ETSI", "5G", "20M", "HT", "2T", "108", "30", -+ "MKK", "5G", "20M", "HT", "2T", "108", "30", -+ "FCC", "5G", "20M", "HT", "2T", "112", "32", -+ "ETSI", "5G", "20M", "HT", "2T", "112", "30", -+ "MKK", "5G", "20M", "HT", "2T", "112", "30", -+ "FCC", "5G", "20M", "HT", "2T", "116", "32", -+ "ETSI", "5G", "20M", "HT", "2T", "116", "30", -+ "MKK", "5G", "20M", "HT", "2T", "116", "30", -+ "FCC", "5G", "20M", "HT", "2T", "120", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "120", "30", -+ "MKK", "5G", "20M", "HT", "2T", "120", "30", -+ "FCC", "5G", "20M", "HT", "2T", "124", "32", -+ "ETSI", "5G", "20M", "HT", "2T", "124", "30", -+ "MKK", "5G", "20M", "HT", "2T", "124", "30", -+ "FCC", "5G", "20M", "HT", "2T", "128", "30", -+ "ETSI", "5G", "20M", "HT", "2T", "128", "30", -+ "MKK", "5G", "20M", "HT", "2T", "128", "30", -+ "FCC", "5G", "20M", "HT", "2T", "132", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "132", "30", -+ "MKK", "5G", "20M", "HT", "2T", "132", "30", -+ "FCC", "5G", "20M", "HT", "2T", "136", "28", -+ "ETSI", "5G", "20M", "HT", "2T", "136", "30", -+ "MKK", "5G", "20M", "HT", "2T", "136", "30", -+ "FCC", "5G", "20M", "HT", "2T", "140", "26", -+ "ETSI", "5G", "20M", "HT", "2T", "140", "30", -+ "MKK", "5G", "20M", "HT", "2T", "140", "30", -+ "FCC", "5G", "20M", "HT", "2T", "149", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "149", "30", -+ "MKK", "5G", "20M", "HT", "2T", "149", "63", -+ "FCC", "5G", "20M", "HT", "2T", "153", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "153", "30", -+ "MKK", "5G", "20M", "HT", "2T", "153", "63", -+ "FCC", "5G", "20M", "HT", "2T", "157", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "157", "30", -+ "MKK", "5G", "20M", "HT", "2T", "157", "63", -+ "FCC", "5G", "20M", "HT", "2T", "161", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "161", "30", -+ "MKK", "5G", "20M", "HT", "2T", "161", "63", -+ "FCC", "5G", "20M", "HT", "2T", "165", "34", -+ "ETSI", "5G", "20M", "HT", "2T", "165", "30", -+ "MKK", "5G", "20M", "HT", "2T", "165", "63", -+ "FCC", "5G", "40M", "HT", "1T", "38", "30", -+ "ETSI", "5G", "40M", "HT", "1T", "38", "32", -+ "MKK", "5G", "40M", "HT", "1T", "38", "32", -+ "FCC", "5G", "40M", "HT", "1T", "46", "30", -+ "ETSI", "5G", "40M", "HT", "1T", "46", "32", -+ "MKK", "5G", "40M", "HT", "1T", "46", "32", -+ "FCC", "5G", "40M", "HT", "1T", "54", "32", -+ "ETSI", "5G", "40M", "HT", "1T", "54", "32", -+ "MKK", "5G", "40M", "HT", "1T", "54", "32", -+ "FCC", "5G", "40M", "HT", "1T", "62", "32", -+ "ETSI", "5G", "40M", "HT", "1T", "62", "32", -+ "MKK", "5G", "40M", "HT", "1T", "62", "32", -+ "FCC", "5G", "40M", "HT", "1T", "102", "28", -+ "ETSI", "5G", "40M", "HT", "1T", "102", "32", -+ "MKK", "5G", "40M", "HT", "1T", "102", "32", -+ "FCC", "5G", "40M", "HT", "1T", "110", "32", -+ "ETSI", "5G", "40M", "HT", "1T", "110", "32", -+ "MKK", "5G", "40M", "HT", "1T", "110", "32", -+ "FCC", "5G", "40M", "HT", "1T", "118", "34", -+ "ETSI", "5G", "40M", "HT", "1T", "118", "32", -+ "MKK", "5G", "40M", "HT", "1T", "118", "32", -+ "FCC", "5G", "40M", "HT", "1T", "126", "34", -+ "ETSI", "5G", "40M", "HT", "1T", "126", "32", -+ "MKK", "5G", "40M", "HT", "1T", "126", "32", -+ "FCC", "5G", "40M", "HT", "1T", "134", "32", -+ "ETSI", "5G", "40M", "HT", "1T", "134", "32", -+ "MKK", "5G", "40M", "HT", "1T", "134", "32", -+ "FCC", "5G", "40M", "HT", "1T", "151", "34", -+ "ETSI", "5G", "40M", "HT", "1T", "151", "32", -+ "MKK", "5G", "40M", "HT", "1T", "151", "63", -+ "FCC", "5G", "40M", "HT", "1T", "159", "34", -+ "ETSI", "5G", "40M", "HT", "1T", "159", "32", -+ "MKK", "5G", "40M", "HT", "1T", "159", "63", -+ "FCC", "5G", "40M", "HT", "2T", "38", "28", -+ "ETSI", "5G", "40M", "HT", "2T", "38", "30", -+ "MKK", "5G", "40M", "HT", "2T", "38", "30", -+ "FCC", "5G", "40M", "HT", "2T", "46", "28", -+ "ETSI", "5G", "40M", "HT", "2T", "46", "30", -+ "MKK", "5G", "40M", "HT", "2T", "46", "30", -+ "FCC", "5G", "40M", "HT", "2T", "54", "30", -+ "ETSI", "5G", "40M", "HT", "2T", "54", "30", -+ "MKK", "5G", "40M", "HT", "2T", "54", "30", -+ "FCC", "5G", "40M", "HT", "2T", "62", "30", -+ "ETSI", "5G", "40M", "HT", "2T", "62", "30", -+ "MKK", "5G", "40M", "HT", "2T", "62", "30", -+ "FCC", "5G", "40M", "HT", "2T", "102", "26", -+ "ETSI", "5G", "40M", "HT", "2T", "102", "30", -+ "MKK", "5G", "40M", "HT", "2T", "102", "30", -+ "FCC", "5G", "40M", "HT", "2T", "110", "30", -+ "ETSI", "5G", "40M", "HT", "2T", "110", "30", -+ "MKK", "5G", "40M", "HT", "2T", "110", "30", -+ "FCC", "5G", "40M", "HT", "2T", "118", "34", -+ "ETSI", "5G", "40M", "HT", "2T", "118", "30", -+ "MKK", "5G", "40M", "HT", "2T", "118", "30", -+ "FCC", "5G", "40M", "HT", "2T", "126", "32", -+ "ETSI", "5G", "40M", "HT", "2T", "126", "30", -+ "MKK", "5G", "40M", "HT", "2T", "126", "30", -+ "FCC", "5G", "40M", "HT", "2T", "134", "30", -+ "ETSI", "5G", "40M", "HT", "2T", "134", "30", -+ "MKK", "5G", "40M", "HT", "2T", "134", "30", -+ "FCC", "5G", "40M", "HT", "2T", "151", "34", -+ "ETSI", "5G", "40M", "HT", "2T", "151", "30", -+ "MKK", "5G", "40M", "HT", "2T", "151", "63", -+ "FCC", "5G", "40M", "HT", "2T", "159", "34", -+ "ETSI", "5G", "40M", "HT", "2T", "159", "30", -+ "MKK", "5G", "40M", "HT", "2T", "159", "63", -+ "FCC", "5G", "80M", "VHT", "1T", "42", "30", -+ "ETSI", "5G", "80M", "VHT", "1T", "42", "32", -+ "MKK", "5G", "80M", "VHT", "1T", "42", "32", -+ "FCC", "5G", "80M", "VHT", "1T", "58", "28", -+ "ETSI", "5G", "80M", "VHT", "1T", "58", "32", -+ "MKK", "5G", "80M", "VHT", "1T", "58", "32", -+ "FCC", "5G", "80M", "VHT", "1T", "106", "30", -+ "ETSI", "5G", "80M", "VHT", "1T", "106", "32", -+ "MKK", "5G", "80M", "VHT", "1T", "106", "32", -+ "FCC", "5G", "80M", "VHT", "1T", "122", "34", -+ "ETSI", "5G", "80M", "VHT", "1T", "122", "32", -+ "MKK", "5G", "80M", "VHT", "1T", "122", "32", -+ "FCC", "5G", "80M", "VHT", "1T", "155", "34", -+ "ETSI", "5G", "80M", "VHT", "1T", "155", "32", -+ "MKK", "5G", "80M", "VHT", "1T", "155", "63", -+ "FCC", "5G", "80M", "VHT", "2T", "42", "28", -+ "ETSI", "5G", "80M", "VHT", "2T", "42", "30", -+ "MKK", "5G", "80M", "VHT", "2T", "42", "30", -+ "FCC", "5G", "80M", "VHT", "2T", "58", "26", -+ "ETSI", "5G", "80M", "VHT", "2T", "58", "30", -+ "MKK", "5G", "80M", "VHT", "2T", "58", "30", -+ "FCC", "5G", "80M", "VHT", "2T", "106", "28", -+ "ETSI", "5G", "80M", "VHT", "2T", "106", "30", -+ "MKK", "5G", "80M", "VHT", "2T", "106", "30", -+ "FCC", "5G", "80M", "VHT", "2T", "122", "32", -+ "ETSI", "5G", "80M", "VHT", "2T", "122", "30", -+ "MKK", "5G", "80M", "VHT", "2T", "122", "30", -+ "FCC", "5G", "80M", "VHT", "2T", "155", "34", -+ "ETSI", "5G", "80M", "VHT", "2T", "155", "30", -+ "MKK", "5G", "80M", "VHT", "2T", "155", "63" -+}; -+ -+void -+odm_read_and_config_mp_8703b_txpwr_lmt(struct dm_struct *dm) -+{ -+ u32 i = 0; -+#if (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ u32 array_len = sizeof(array_mp_8703b_txpwr_lmt) / sizeof(u8); -+ u8 *array = (u8 *)array_mp_8703b_txpwr_lmt; -+#else -+ u32 array_len = sizeof(array_mp_8703b_txpwr_lmt) / sizeof(u8 *); -+ u8 **array = (u8 **)array_mp_8703b_txpwr_lmt; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter = dm->adapter; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ -+ PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); -+ hal_data->nLinesReadPwrLmt = array_len / 7; -+#endif -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===> %s\n", __func__); -+ -+ for (i = 0; i < array_len; i += 7) { -+#if (DM_ODM_SUPPORT_TYPE == ODM_IOT) -+ u8 regulation = array[i]; -+ u8 band = array[i + 1]; -+ u8 bandwidth = array[i + 2]; -+ u8 rate = array[i + 3]; -+ u8 rf_path = array[i + 4]; -+ u8 chnl = array[i + 5]; -+ u8 val = array[i + 6]; -+#else -+ u8 *regulation = array[i]; -+ u8 *band = array[i + 1]; -+ u8 *bandwidth = array[i + 2]; -+ u8 *rate = array[i + 3]; -+ u8 *rf_path = array[i + 4]; -+ u8 *chnl = array[i + 5]; -+ u8 *val = array[i + 6]; -+#endif -+ -+ odm_config_bb_txpwr_lmt_8703b(dm, regulation, band, bandwidth, rate, rf_path, chnl, val); -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", -+ regulation, band, bandwidth, rate, rf_path, chnl, val); -+#endif -+ } -+} -+ -+/****************************************************************************** -+* txxtaltrack.TXT -+******************************************************************************/ -+ -+s8 g_delta_swing_table_xtal_mp_n_txxtaltrack_8703b[] = {0, 0, 0, -1, -1, -1, -1, -2, -2, -2, -3, -3, -3, -3, -3, -4, -2, -2, -1, -1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1}; -+s8 g_delta_swing_table_xtal_mp_p_txxtaltrack_8703b[] = {0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 1, 0, -1, -1, -1, -2, -3, -7, -9, -10, -11, -14, -16, -18, -20, -22, -24, -26, -28, -30}; -+ -+void -+odm_read_and_config_mp_8703b_txxtaltrack(struct dm_struct *dm) -+{ -+ struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_mp_8703b\n"); -+ -+ -+ odm_move_memory(dm, cali_info->delta_swing_table_xtal_p, g_delta_swing_table_xtal_mp_p_txxtaltrack_8703b, DELTA_SWINGIDX_SIZE); -+ odm_move_memory(dm, cali_info->delta_swing_table_xtal_n, g_delta_swing_table_xtal_mp_n_txxtaltrack_8703b, DELTA_SWINGIDX_SIZE); -+} -+ -+#endif /* end of HWIMG_SUPPORT*/ -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_rf.h b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_rf.h -new file mode 100644 -index 000000000000..3f596a9c594a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/halhwimg8703b_rf.h -@@ -0,0 +1,69 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/*Image2HeaderVersion: 3.5.2*/ -+#if (RTL8703B_SUPPORT == 1) -+#ifndef __INC_MP_RF_HW_IMG_8703B_H -+#define __INC_MP_RF_HW_IMG_8703B_H -+ -+ -+/****************************************************************************** -+* radioa.TXT -+******************************************************************************/ -+ -+void -+odm_read_and_config_mp_8703b_radioa( /* tc: Test Chip, mp: mp Chip*/ -+ struct dm_struct *dm); -+u32 odm_get_version_mp_8703b_radioa(void); -+ -+/****************************************************************************** -+* txpowertrack_sdio.TXT -+******************************************************************************/ -+ -+void -+odm_read_and_config_mp_8703b_txpowertrack_sdio( /* tc: Test Chip, mp: mp Chip*/ -+ struct dm_struct *dm); -+u32 odm_get_version_mp_8703b_txpowertrack_sdio(void); -+ -+/****************************************************************************** -+* txpowertrack_usb.TXT -+******************************************************************************/ -+ -+void -+odm_read_and_config_mp_8703b_txpowertrack_usb( /* tc: Test Chip, mp: mp Chip*/ -+ struct dm_struct *dm); -+u32 odm_get_version_mp_8703b_txpowertrack_usb(void); -+ -+/****************************************************************************** -+* txpwr_lmt.TXT -+******************************************************************************/ -+ -+void -+odm_read_and_config_mp_8703b_txpwr_lmt( /* tc: Test Chip, mp: mp Chip*/ -+ struct dm_struct *dm); -+u32 odm_get_version_mp_8703b_txpwr_lmt(void); -+ -+/****************************************************************************** -+* txxtaltrack.TXT -+******************************************************************************/ -+ -+void -+odm_read_and_config_mp_8703b_txxtaltrack( /* tc: Test Chip, mp: mp Chip*/ -+ struct dm_struct *dm); -+u32 odm_get_version_mp_8703b_txxtaltrack(void); -+ -+#endif -+#endif /* end of HWIMG_SUPPORT*/ -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_regconfig8703b.c b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_regconfig8703b.c -new file mode 100644 -index 000000000000..b5808c7966f4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_regconfig8703b.c -@@ -0,0 +1,167 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#if (RTL8703B_SUPPORT == 1) -+ -+void odm_config_rf_reg_8703b(struct dm_struct *dm, u32 addr, u32 data, -+ enum rf_path RF_PATH, u32 reg_addr) -+{ -+ if (addr == 0xfe || addr == 0xffe) { -+#ifdef CONFIG_LONG_DELAY_ISSUE -+ ODM_sleep_ms(50); -+#else -+ ODM_delay_ms(50); -+#endif -+ } else { -+ odm_set_rf_reg(dm, RF_PATH, reg_addr, RFREGOFFSETMASK, data); -+ /* Add 1us delay between BB/RF register setting. */ -+ ODM_delay_us(1); -+ } -+} -+ -+void odm_config_rf_radio_a_8703b(struct dm_struct *dm, u32 addr, u32 data) -+{ -+ u32 content = 0x1000; /* RF_Content: radioa_txt */ -+ u32 maskfor_phy_set = (u32)(content & 0xE000); -+ -+ odm_config_rf_reg_8703b(dm, addr, data, RF_PATH_A, addr | maskfor_phy_set); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> odm_config_rf_with_header_file: [RadioA] %08X %08X\n", -+ addr, data); -+} -+ -+void odm_config_rf_radio_b_8703b(struct dm_struct *dm, u32 addr, u32 data) -+{ -+ u32 content = 0x1001; /* RF_Content: radiob_txt */ -+ u32 maskfor_phy_set = (u32)(content & 0xE000); -+ -+ odm_config_rf_reg_8703b(dm, addr, data, RF_PATH_B, addr | maskfor_phy_set); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> odm_config_rf_with_header_file: [RadioB] %08X %08X\n", -+ addr, data); -+} -+ -+void odm_config_rf_radio_c_8703b(struct dm_struct *dm, u32 addr, u32 data) -+{ -+ u32 content = 0x1001; /* RF_Content: radiob_txt */ -+ u32 maskfor_phy_set = (u32)(content & 0xE000); -+ -+ odm_config_rf_reg_8703b(dm, addr, data, RF_PATH_C, addr | maskfor_phy_set); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> odm_config_rf_with_header_file: [RadioC] %08X %08X\n", -+ addr, data); -+} -+ -+void odm_config_rf_radio_d_8703b(struct dm_struct *dm, u32 addr, u32 data) -+{ -+ u32 content = 0x1001; /* RF_Content: radiob_txt */ -+ u32 maskfor_phy_set = (u32)(content & 0xE000); -+ -+ odm_config_rf_reg_8703b(dm, addr, data, RF_PATH_D, addr | maskfor_phy_set); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> odm_config_rf_with_header_file: [RadioD] %08X %08X\n", -+ addr, data); -+} -+ -+void odm_config_mac_8703b(struct dm_struct *dm, u32 addr, u8 data) -+{ -+ odm_write_1byte(dm, addr, data); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> odm_config_mac_with_header_file: [MAC_REG] %08X %08X\n", -+ addr, data); -+} -+ -+void odm_config_bb_agc_8703b(struct dm_struct *dm, u32 addr, u32 bitmask, -+ u32 data) -+{ -+ odm_set_bb_reg(dm, addr, bitmask, data); -+ /* Add 1us delay between BB/RF register setting. */ -+ ODM_delay_us(1); -+ -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> odm_config_bb_with_header_file: [AGC_TAB] %08X %08X\n", -+ addr, data); -+} -+ -+void odm_config_bb_phy_reg_pg_8703b(struct dm_struct *dm, u32 band, u32 rf_path, -+ u32 tx_num, u32 addr, u32 bitmask, u32 data) -+{ -+ if (addr == 0xfe || addr == 0xffe) -+#ifdef CONFIG_LONG_DELAY_ISSUE -+ ODM_sleep_ms(50); -+#else -+ ODM_delay_ms(50); -+#endif -+ else { -+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ phy_store_tx_power_by_rate(dm->adapter, band, rf_path, tx_num, addr, bitmask, data); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PHY_StoreTxPowerByRate(dm->adapter, band, rf_path, tx_num, addr, bitmask, data); -+#endif -+ } -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X %08X\n", -+ addr, bitmask, data); -+} -+ -+void odm_config_bb_phy_8703b(struct dm_struct *dm, u32 addr, u32 bitmask, -+ u32 data) -+{ -+ if (addr == 0xfe) -+#ifdef CONFIG_LONG_DELAY_ISSUE -+ ODM_sleep_ms(50); -+#else -+ ODM_delay_ms(50); -+#endif -+ else if (addr == 0xfd) -+ ODM_delay_ms(5); -+ else if (addr == 0xfc) -+ ODM_delay_ms(1); -+ else if (addr == 0xfb) -+ ODM_delay_us(50); -+ else if (addr == 0xfa) -+ ODM_delay_us(5); -+ else if (addr == 0xf9) -+ ODM_delay_us(1); -+ else -+ odm_set_bb_reg(dm, addr, bitmask, data); -+ -+ /* Add 1us delay between BB/RF register setting. */ -+ ODM_delay_us(1); -+ PHYDM_DBG(dm, ODM_COMP_INIT, -+ "===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X\n", -+ addr, data); -+} -+ -+void odm_config_bb_txpwr_lmt_8703b(struct dm_struct *dm, u8 *regulation, -+ u8 *band, u8 *bandwidth, u8 *rate_section, -+ u8 *rf_path, u8 *channel, u8 *power_limit) -+{ -+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) -+ phy_set_tx_power_limit(dm, regulation, band, -+ bandwidth, rate_section, rf_path, channel, power_limit); -+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) -+ PHY_SetTxPowerLimit(dm, regulation, band, -+ bandwidth, rate_section, rf_path, channel, power_limit); -+#endif -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_regconfig8703b.h b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_regconfig8703b.h -new file mode 100644 -index 000000000000..bd2f649da520 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_regconfig8703b.h -@@ -0,0 +1,47 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_ODM_REGCONFIG_H_8703B -+#define __INC_ODM_REGCONFIG_H_8703B -+ -+#if (RTL8703B_SUPPORT == 1) -+ -+void odm_config_rf_reg_8703b(struct dm_struct *dm, u32 addr, u32 data, -+ enum rf_path RF_PATH, u32 reg_addr); -+ -+void odm_config_rf_radio_a_8703b(struct dm_struct *dm, u32 addr, u32 data); -+ -+void odm_config_rf_radio_b_8703b(struct dm_struct *dm, u32 addr, u32 data); -+ -+void odm_config_rf_radio_c_8703b(struct dm_struct *dm, u32 addr, u32 data); -+ -+void odm_config_rf_radio_d_8703b(struct dm_struct *dm, u32 addr, u32 data); -+ -+void odm_config_mac_8703b(struct dm_struct *dm, u32 addr, u8 data); -+ -+void odm_config_bb_agc_8703b(struct dm_struct *dm, u32 addr, u32 bitmask, -+ u32 data); -+ -+void odm_config_bb_phy_reg_pg_8703b(struct dm_struct *dm, u32 band, u32 rf_path, -+ u32 tx_num, u32 addr, u32 bitmask, -+ u32 data); -+ -+void odm_config_bb_phy_8703b(struct dm_struct *dm, u32 addr, u32 bitmask, -+ u32 data); -+ -+void odm_config_bb_txpwr_lmt_8703b(struct dm_struct *dm, u8 *regulation, -+ u8 *band, u8 *bandwidth, u8 *rate_section, -+ u8 *rf_path, u8 *channel, u8 *power_limit); -+#endif -+#endif /* end of SUPPORT */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_rtl8703b.c b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_rtl8703b.c -new file mode 100644 -index 000000000000..394f4640336c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_rtl8703b.c -@@ -0,0 +1,53 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+#if (RTL8703B_SUPPORT == 1) -+s8 phydm_cck_rssi_8703b(struct dm_struct *dm, u16 lna_idx, u8 vga_idx) -+{ -+ s8 rx_pwr_all = 0x00; -+ -+ switch (lna_idx) { -+ case 0xf: -+ rx_pwr_all = -48 - (2 * vga_idx); -+ break; -+ case 0xb: -+ rx_pwr_all = -42 - (2 * vga_idx); /*TBD*/ -+ break; -+ case 0xa: -+ rx_pwr_all = -36 - (2 * vga_idx); -+ break; -+ case 8: -+ rx_pwr_all = -32 - (2 * vga_idx); -+ break; -+ case 7: -+ rx_pwr_all = -19 - (2 * vga_idx); -+ break; -+ case 4: -+ rx_pwr_all = -6 - (2 * vga_idx); -+ break; -+ case 0: -+ rx_pwr_all = -2 - (2 * vga_idx); -+ break; -+ default: -+ /*rx_pwr_all = -53+(2*(31-vga_idx));*/ -+ /*dbg_print("wrong LNA index\n");*/ -+ break; -+ } -+ return rx_pwr_all; -+} -+#endif -+ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_rtl8703b.h b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_rtl8703b.h -new file mode 100644 -index 000000000000..28f9196cb47e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/phydm_rtl8703b.h -@@ -0,0 +1,21 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __ODM_RTL8703B_H__ -+#define __ODM_RTL8703B_H__ -+#if (RTL8703B_SUPPORT == 1) -+s8 phydm_cck_rssi_8703b(struct dm_struct *dm, u16 lna_idx, u8 vga_idx); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/version_rtl8703b.h b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/version_rtl8703b.h -new file mode 100644 -index 000000000000..b78e42fd0bc4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/rtl8703b/version_rtl8703b.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/*RTL8703B PHY Parameters*/ -+/* -+[Caution] -+ Since 01/Aug/2015, the commit rules will be simplified. -+ You do not need to fill up the version.h anymore, -+ only the maintenance supervisor fills it before formal release. -+*/ -+#define RELEASE_DATE_8703B 20170801 -+#define COMMIT_BY_8703B "BB_Dino" -+#define RELEASE_VERSION_8703B 18 -diff --git a/drivers/staging/rtl8723cs/hal/phydm/sd4_phydm_2_kernel.mk b/drivers/staging/rtl8723cs/hal/phydm/sd4_phydm_2_kernel.mk -new file mode 100644 -index 000000000000..09898476eded ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/sd4_phydm_2_kernel.mk -@@ -0,0 +1,188 @@ -+EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/phydm -+ -+_PHYDM_FILES := hal/phydm/phydm_debug.o \ -+ hal/phydm/phydm_interface.o\ -+ hal/phydm/phydm_phystatus.o\ -+ hal/phydm/phydm_hwconfig.o\ -+ hal/phydm/phydm.o\ -+ hal/phydm/phydm_dig.o\ -+ hal/phydm/phydm_rainfo.o\ -+ hal/phydm/phydm_adaptivity.o\ -+ hal/phydm/phydm_cfotracking.o\ -+ hal/phydm/phydm_noisemonitor.o\ -+ hal/phydm/phydm_beamforming.o\ -+ hal/phydm/phydm_dfs.o\ -+ hal/phydm/txbf/halcomtxbf.o\ -+ hal/phydm/txbf/haltxbfinterface.o\ -+ hal/phydm/txbf/phydm_hal_txbf_api.o\ -+ hal/phydm/phydm_ccx.o\ -+ hal/phydm/phydm_cck_pd.o\ -+ hal/phydm/phydm_rssi_monitor.o\ -+ hal/phydm/phydm_math_lib.o\ -+ hal/phydm/phydm_api.o\ -+ hal/phydm/halrf/halrf.o\ -+ hal/phydm/halrf/halrf_debug.o\ -+ hal/phydm/halrf/halphyrf_ce.o\ -+ hal/phydm/halrf/halrf_powertracking_ce.o\ -+ hal/phydm/halrf/halrf_powertracking.o\ -+ hal/phydm/halrf/halrf_kfree.o -+ -+ifeq ($(CONFIG_RTL8188E), y) -+RTL871X = rtl8188e -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188e_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8188e_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8188e_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8188e_ce.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8188e.o\ -+ hal/phydm/$(RTL871X)/hal8188erateadaptive.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8188e.o -+endif -+ -+ifeq ($(CONFIG_RTL8192E), y) -+RTL871X = rtl8192e -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192e_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8192e_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8192e_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8192e_ce.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8192e.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8192e.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8812A), y) -+RTL871X = rtl8812a -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8812a_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8812a_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8812a_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8812a_ce.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8812a.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8812a.o\ -+ hal/phydm/txbf/haltxbfjaguar.o -+endif -+ -+ifeq ($(CONFIG_RTL8821A), y) -+RTL871X = rtl8821a -+_PHYDM_FILES += hal/phydm/rtl8821a/halhwimg8821a_mac.o\ -+ hal/phydm/rtl8821a/halhwimg8821a_bb.o\ -+ hal/phydm/rtl8821a/halhwimg8821a_rf.o\ -+ hal/phydm/halrf/rtl8812a/halrf_8812a_ce.o\ -+ hal/phydm/halrf/rtl8821a/halrf_8821a_ce.o\ -+ hal/phydm/rtl8821a/phydm_regconfig8821a.o\ -+ hal/phydm/rtl8821a/phydm_rtl8821a.o\ -+ hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.o\ -+ hal/phydm/txbf/haltxbfjaguar.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8723B), y) -+RTL871X = rtl8723b -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723b_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8723b_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8723b_rf.o\ -+ hal/phydm/$(RTL871X)/halhwimg8723b_mp.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8723b.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8723b_ce.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8723b.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8814A), y) -+RTL871X = rtl8814a -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8814a_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8814a_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8814a_rf.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8814a.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8814a.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8814a_ce.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8814a.o\ -+ hal/phydm/txbf/haltxbf8814a.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8723C), y) -+RTL871X = rtl8703b -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8703b_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8703b_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8703b_rf.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8703b.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8703b.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8703b.o -+endif -+ -+ifeq ($(CONFIG_RTL8723D), y) -+RTL871X = rtl8723d -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723d_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8723d_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8723d_rf.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8723d.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8723d.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8723d.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8710B), y) -+RTL871X = rtl8710b -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8710b_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8710b_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8710b_rf.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8710b.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8710b.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8710b.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8188F), y) -+RTL871X = rtl8188f -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188f_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8188f_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8188f_rf.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8188f.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8188f.o \ -+ hal/phydm/$(RTL871X)/phydm_rtl8188f.o -+endif -+ -+ifeq ($(CONFIG_RTL8822B), y) -+RTL871X = rtl8822b -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8822b_bb.o \ -+ hal/phydm/$(RTL871X)/halhwimg8822b_mac.o \ -+ hal/phydm/$(RTL871X)/halhwimg8822b_rf.o \ -+ hal/phydm/halrf/$(RTL871X)/halrf_8822b.o \ -+ hal/phydm/$(RTL871X)/phydm_hal_api8822b.o \ -+ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8822b.o \ -+ hal/phydm/halrf/$(RTL871X)/halrf_rfk_init_8822b.o \ -+ hal/phydm/$(RTL871X)/phydm_regconfig8822b.o \ -+ hal/phydm/$(RTL871X)/phydm_rtl8822b.o -+ -+_PHYDM_FILES += hal/phydm/txbf/haltxbf8822b.o -+endif -+ -+ -+ifeq ($(CONFIG_RTL8821C), y) -+RTL871X = rtl8821c -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8821c_bb.o \ -+ hal/phydm/$(RTL871X)/halhwimg8821c_mac.o \ -+ hal/phydm/$(RTL871X)/halhwimg8821c_rf.o \ -+ hal/phydm/$(RTL871X)/phydm_hal_api8821c.o \ -+ hal/phydm/$(RTL871X)/phydm_regconfig8821c.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8821c.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_iqk_8821c.o -+endif -+ifeq ($(CONFIG_RTL8192F), y) -+RTL871X = rtl8192f -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192f_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8192f_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8192f_rf.o\ -+ hal/phydm/$(RTL871X)/phydm_hal_api8192f.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8192f.o\ -+ hal/phydm/$(RTL871X)/phydm_rtl8192f.o\ -+ hal/phydm/halrf/$(RTL871X)/halrf_8192f.o -+endif -+ -+ifeq ($(CONFIG_RTL8198F), y) -+RTL871X = rtl8198f -+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8198f_bb.o\ -+ hal/phydm/$(RTL871X)/halhwimg8198f_mac.o\ -+ hal/phydm/$(RTL871X)/halhwimg8198f_rf.o\ -+ hal/phydm/$(RTL871X)/phydm_hal_api8198f.o\ -+ hal/phydm/$(RTL871X)/phydm_regconfig8198f.o -+endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/halcomtxbf.c b/drivers/staging/rtl8723cs/hal/phydm/txbf/halcomtxbf.c -new file mode 100644 -index 000000000000..ae45a5b1a61a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/halcomtxbf.c -@@ -0,0 +1,520 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/*@************************************************************ -+ * Description: -+ * -+ * This file is for TXBF mechanism -+ * -+ ************************************************************/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+/*@Beamforming halcomtxbf API create by YuChen 2015/05*/ -+ -+void hal_com_txbf_beamform_init( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ boolean is_iqgen_setting_ok = false; -+ -+ if (dm->support_ic_type & ODM_RTL8814A) { -+ is_iqgen_setting_ok = phydm_beamforming_set_iqgen_8814A(dm); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] is_iqgen_setting_ok = %d\n", -+ __func__, is_iqgen_setting_ok); -+ } -+} -+ -+/*Only used for MU BFer Entry when get GID management frame (self as MU STA)*/ -+void hal_com_txbf_config_gtab( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->support_ic_type & ODM_RTL8822B) -+ hal_txbf_8822b_config_gtab(dm); -+} -+ -+void phydm_beamform_set_sounding_enter( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_enter_work_item)) -+ odm_schedule_work_item(&p_txbf_info->txbf_enter_work_item); -+#else -+ hal_com_txbf_enter_work_item_callback(dm); -+#endif -+} -+ -+void phydm_beamform_set_sounding_leave( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_leave_work_item)) -+ odm_schedule_work_item(&p_txbf_info->txbf_leave_work_item); -+#else -+ hal_com_txbf_leave_work_item_callback(dm); -+#endif -+} -+ -+void phydm_beamform_set_sounding_rate( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_rate_work_item)) -+ odm_schedule_work_item(&p_txbf_info->txbf_rate_work_item); -+#else -+ hal_com_txbf_rate_work_item_callback(dm); -+#endif -+} -+ -+void phydm_beamform_set_sounding_status( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_status_work_item)) -+ odm_schedule_work_item(&p_txbf_info->txbf_status_work_item); -+#else -+ hal_com_txbf_status_work_item_callback(dm); -+#endif -+} -+ -+void phydm_beamform_set_sounding_fw_ndpa( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ if (*dm->is_fw_dw_rsvd_page_in_progress) -+ odm_set_timer(dm, &p_txbf_info->txbf_fw_ndpa_timer, 5); -+ else -+ odm_schedule_work_item(&p_txbf_info->txbf_fw_ndpa_work_item); -+#else -+ hal_com_txbf_fw_ndpa_work_item_callback(dm); -+#endif -+} -+ -+void phydm_beamform_set_sounding_clk( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ if (!odm_is_work_item_scheduled(&p_txbf_info->txbf_clk_work_item)) -+ odm_schedule_work_item(&p_txbf_info->txbf_clk_work_item); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ phydm_run_in_thread_cmd(dm, hal_com_txbf_clk_work_item_callback, dm); -+#else -+ hal_com_txbf_clk_work_item_callback(dm); -+#endif -+} -+ -+void phydm_beamform_set_reset_tx_path( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ struct _RT_WORK_ITEM *pwi = &p_txbf_info->txbf_reset_tx_path_work_item; -+ -+ if (!odm_is_work_item_scheduled(pwi)) -+ odm_schedule_work_item(pwi); -+#else -+ hal_com_txbf_reset_tx_path_work_item_callback(dm); -+#endif -+} -+ -+void phydm_beamform_set_get_tx_rate( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ struct _RT_WORK_ITEM *pwi = &p_txbf_info->txbf_get_tx_rate_work_item; -+ -+ if (!odm_is_work_item_scheduled(pwi)) -+ odm_schedule_work_item(pwi); -+#else -+ hal_com_txbf_get_tx_rate_work_item_callback(dm); -+#endif -+} -+ -+void hal_com_txbf_enter_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#else -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#endif -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ u8 idx = p_txbf_info->txbf_idx; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821)) -+ hal_txbf_jaguar_enter(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8192E) -+ hal_txbf_8192e_enter(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8814A) -+ hal_txbf_8814a_enter(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8822B) -+ hal_txbf_8822b_enter(dm, idx); -+} -+ -+void hal_com_txbf_leave_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#else -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#endif -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ u8 idx = p_txbf_info->txbf_idx; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821)) -+ hal_txbf_jaguar_leave(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8192E) -+ hal_txbf_8192e_leave(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8814A) -+ hal_txbf_8814a_leave(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8822B) -+ hal_txbf_8822b_leave(dm, idx); -+} -+ -+void hal_com_txbf_fw_ndpa_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#else -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#endif -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ u8 idx = p_txbf_info->ndpa_idx; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821)) -+ hal_txbf_jaguar_fw_txbf(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8192E) -+ hal_txbf_8192e_fw_tx_bf(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8814A) -+ hal_txbf_8814a_fw_txbf(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8822B) -+ hal_txbf_8822b_fw_txbf(dm, idx); -+} -+ -+void hal_com_txbf_clk_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#else -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#endif -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (dm->support_ic_type & ODM_RTL8812) -+ hal_txbf_jaguar_clk_8812a(dm); -+} -+ -+void hal_com_txbf_rate_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#else -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#endif -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ u8 BW = p_txbf_info->BW; -+ u8 rate = p_txbf_info->rate; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (dm->support_ic_type & ODM_RTL8812) -+ hal_txbf_8812a_set_ndpa_rate(dm, BW, rate); -+ else if (dm->support_ic_type & ODM_RTL8192E) -+ hal_txbf_8192e_set_ndpa_rate(dm, BW, rate); -+ else if (dm->support_ic_type & ODM_RTL8814A) -+ hal_txbf_8814a_set_ndpa_rate(dm, BW, rate); -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void hal_com_txbf_fw_ndpa_timer_callback( -+ struct phydm_timer_list *timer) -+{ -+ void *adapter = (void *)timer->Adapter; -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (*dm->is_fw_dw_rsvd_page_in_progress) -+ odm_set_timer(dm, &(p_txbf_info->txbf_fw_ndpa_timer), 5); -+ else -+ odm_schedule_work_item(&(p_txbf_info->txbf_fw_ndpa_work_item)); -+} -+#endif -+ -+void hal_com_txbf_status_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#else -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#endif -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ u8 idx = p_txbf_info->txbf_idx; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821)) -+ hal_txbf_jaguar_status(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8192E) -+ hal_txbf_8192e_status(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8814A) -+ hal_txbf_8814a_status(dm, idx); -+ else if (dm->support_ic_type & ODM_RTL8822B) -+ hal_txbf_8822b_status(dm, idx); -+} -+ -+void hal_com_txbf_reset_tx_path_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#else -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#endif -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ u8 idx = p_txbf_info->txbf_idx; -+ -+ if (dm->support_ic_type & ODM_RTL8814A) -+ hal_txbf_8814a_reset_tx_path(dm, idx); -+} -+ -+void hal_com_txbf_get_tx_rate_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ) -+{ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+#else -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#endif -+ -+ if (dm->support_ic_type & ODM_RTL8814A) -+ hal_txbf_8814a_get_tx_rate(dm); -+} -+ -+boolean -+hal_com_txbf_set( -+ void *dm_void, -+ u8 set_type, -+ void *p_in_buf) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 *p_u1_tmp = (u8 *)p_in_buf; -+ struct _HAL_TXBF_INFO *p_txbf_info = &dm->beamforming_info.txbf_info; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] set_type = 0x%X\n", __func__, set_type); -+ -+ switch (set_type) { -+ case TXBF_SET_SOUNDING_ENTER: -+ p_txbf_info->txbf_idx = *p_u1_tmp; -+ phydm_beamform_set_sounding_enter(dm); -+ break; -+ -+ case TXBF_SET_SOUNDING_LEAVE: -+ p_txbf_info->txbf_idx = *p_u1_tmp; -+ phydm_beamform_set_sounding_leave(dm); -+ break; -+ -+ case TXBF_SET_SOUNDING_RATE: -+ p_txbf_info->BW = p_u1_tmp[0]; -+ p_txbf_info->rate = p_u1_tmp[1]; -+ phydm_beamform_set_sounding_rate(dm); -+ break; -+ -+ case TXBF_SET_SOUNDING_STATUS: -+ p_txbf_info->txbf_idx = *p_u1_tmp; -+ phydm_beamform_set_sounding_status(dm); -+ break; -+ -+ case TXBF_SET_SOUNDING_FW_NDPA: -+ p_txbf_info->ndpa_idx = *p_u1_tmp; -+ phydm_beamform_set_sounding_fw_ndpa(dm); -+ break; -+ -+ case TXBF_SET_SOUNDING_CLK: -+ phydm_beamform_set_sounding_clk(dm); -+ break; -+ -+ case TXBF_SET_TX_PATH_RESET: -+ p_txbf_info->txbf_idx = *p_u1_tmp; -+ phydm_beamform_set_reset_tx_path(dm); -+ break; -+ -+ case TXBF_SET_GET_TX_RATE: -+ phydm_beamform_set_get_tx_rate(dm); -+ break; -+ } -+ -+ return true; -+} -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+boolean -+hal_com_txbf_get( -+ void *adapter, -+ u8 get_type, -+ void *p_out_buf) -+{ -+ PHAL_DATA_TYPE hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ boolean *p_boolean = (boolean *)p_out_buf; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (get_type == TXBF_GET_EXPLICIT_BEAMFORMEE) { -+ if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(adapter)) -+ *p_boolean = false; -+ else if (/*@IS_HARDWARE_TYPE_8822B(adapter) ||*/ -+ IS_HARDWARE_TYPE_8821B(adapter) || -+ IS_HARDWARE_TYPE_8192E(adapter) || -+ IS_HARDWARE_TYPE_8192F(adapter) || -+ IS_HARDWARE_TYPE_JAGUAR(adapter) || -+ IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter) || -+ IS_HARDWARE_TYPE_JAGUAR3(adapter)) -+ *p_boolean = true; -+ else -+ *p_boolean = false; -+ } else if (get_type == TXBF_GET_EXPLICIT_BEAMFORMER) { -+ if (IS_HARDWARE_TYPE_OLDER_THAN_8812A(adapter)) -+ *p_boolean = false; -+ else if (/*@IS_HARDWARE_TYPE_8822B(adapter) ||*/ -+ IS_HARDWARE_TYPE_8821B(adapter) || -+ IS_HARDWARE_TYPE_8192E(adapter) || -+ IS_HARDWARE_TYPE_8192F(adapter) || -+ IS_HARDWARE_TYPE_JAGUAR(adapter) || -+ IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter) || -+ IS_HARDWARE_TYPE_JAGUAR3(adapter)) { -+ if (hal_data->RF_Type == RF_2T2R || -+ hal_data->RF_Type == RF_3T3R || -+ hal_data->RF_Type == RF_4T4R) -+ *p_boolean = true; -+ else -+ *p_boolean = false; -+ } else -+ *p_boolean = false; -+ } else if (get_type == TXBF_GET_MU_MIMO_STA) { -+#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) ||\ -+ (RTL8822C_SUPPORT == 1)) -+ if (IS_HARDWARE_TYPE_8822B(adapter) || -+ IS_HARDWARE_TYPE_8821C(adapter) || -+ IS_HARDWARE_TYPE_JAGUAR3(adapter)) -+ *p_boolean = true; -+ else -+#endif -+ *p_boolean = false; -+ -+ } else if (get_type == TXBF_GET_MU_MIMO_AP) { -+#if ((RTL8822B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1)) -+ if (IS_HARDWARE_TYPE_8822B(adapter) || -+ IS_HARDWARE_TYPE_JAGUAR3(adapter)) -+ *p_boolean = true; -+ else -+#endif -+ *p_boolean = false; -+ } -+ -+ return true; -+} -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/halcomtxbf.h b/drivers/staging/rtl8723cs/hal/phydm/txbf/halcomtxbf.h -new file mode 100644 -index 000000000000..5ad303394cba ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/halcomtxbf.h -@@ -0,0 +1,183 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#ifndef __HAL_COM_TXBF_H__ -+#define __HAL_COM_TXBF_H__ -+ -+#if 0 -+typedef bool -+(*TXBF_GET)( -+ void* adapter, -+ u8 get_type, -+ void* p_out_buf -+ ); -+ -+typedef bool -+(*TXBF_SET)( -+ void* adapter, -+ u8 set_type, -+ void* p_in_buf -+ ); -+#endif -+ -+enum txbf_set_type { -+ TXBF_SET_SOUNDING_ENTER, -+ TXBF_SET_SOUNDING_LEAVE, -+ TXBF_SET_SOUNDING_RATE, -+ TXBF_SET_SOUNDING_STATUS, -+ TXBF_SET_SOUNDING_FW_NDPA, -+ TXBF_SET_SOUNDING_CLK, -+ TXBF_SET_TX_PATH_RESET, -+ TXBF_SET_GET_TX_RATE -+}; -+ -+enum txbf_get_type { -+ TXBF_GET_EXPLICIT_BEAMFORMEE, -+ TXBF_GET_EXPLICIT_BEAMFORMER, -+ TXBF_GET_MU_MIMO_STA, -+ TXBF_GET_MU_MIMO_AP -+}; -+ -+/* @2 HAL TXBF related */ -+struct _HAL_TXBF_INFO { -+ u8 txbf_idx; -+ u8 ndpa_idx; -+ u8 BW; -+ u8 rate; -+ -+ struct phydm_timer_list txbf_fw_ndpa_timer; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_WORK_ITEM txbf_enter_work_item; -+ RT_WORK_ITEM txbf_leave_work_item; -+ RT_WORK_ITEM txbf_fw_ndpa_work_item; -+ RT_WORK_ITEM txbf_clk_work_item; -+ RT_WORK_ITEM txbf_status_work_item; -+ RT_WORK_ITEM txbf_rate_work_item; -+ RT_WORK_ITEM txbf_reset_tx_path_work_item; -+ RT_WORK_ITEM txbf_get_tx_rate_work_item; -+#endif -+}; -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ -+void hal_com_txbf_beamform_init( -+ void *dm_void); -+ -+void hal_com_txbf_config_gtab( -+ void *dm_void); -+ -+void hal_com_txbf_enter_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ); -+ -+void hal_com_txbf_leave_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ); -+ -+void hal_com_txbf_fw_ndpa_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ); -+ -+void hal_com_txbf_clk_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ); -+ -+void hal_com_txbf_reset_tx_path_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ); -+ -+void hal_com_txbf_get_tx_rate_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ); -+ -+void hal_com_txbf_rate_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ); -+ -+void hal_com_txbf_fw_ndpa_timer_callback( -+ struct phydm_timer_list *timer); -+ -+void hal_com_txbf_status_work_item_callback( -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ void *adapter -+#else -+ void *dm_void -+#endif -+ ); -+ -+boolean -+hal_com_txbf_set( -+ void *dm_void, -+ u8 set_type, -+ void *p_in_buf); -+ -+boolean -+hal_com_txbf_get( -+ void *adapter, -+ u8 get_type, -+ void *p_out_buf); -+ -+#else -+#define hal_com_txbf_beamform_init(dm_void) NULL -+#define hal_com_txbf_config_gtab(dm_void) NULL -+#define hal_com_txbf_enter_work_item_callback(_adapter) NULL -+#define hal_com_txbf_leave_work_item_callback(_adapter) NULL -+#define hal_com_txbf_fw_ndpa_work_item_callback(_adapter) NULL -+#define hal_com_txbf_clk_work_item_callback(_adapter) NULL -+#define hal_com_txbf_rate_work_item_callback(_adapter) NULL -+#define hal_com_txbf_fw_ndpa_timer_callback(_adapter) NULL -+#define hal_com_txbf_status_work_item_callback(_adapter) NULL -+#define hal_com_txbf_get(_adapter, _get_type, _pout_buf) -+ -+#endif -+ -+#endif /* @#ifndef __HAL_COM_TXBF_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8192e.c b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8192e.c -new file mode 100644 -index 000000000000..daac3e58aa3b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8192e.c -@@ -0,0 +1,384 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/************************************************************* -+ * Description: -+ * -+ * This file is for 8192E TXBF mechanism -+ * -+ ************************************************************/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if (RTL8192E_SUPPORT == 1) -+ -+void hal_txbf_8192e_set_ndpa_rate( -+ void *dm_void, -+ u8 BW, -+ u8 rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8192E, (rate << 2 | BW)); -+} -+ -+void hal_txbf_8192e_rf_mode( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beam_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (dm->rf_type == RF_1T1R) -+ return; -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/ -+ -+ if (beam_info->beamformee_su_cnt > 0) { -+ /*Path_A*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*Select RX mode 0x30=0x18000*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x77fc2); /*@Enable TXIQGEN in RX mode*/ -+ /*Path_B*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x77fc2); /*@Enable TXIQGEN in RX mode*/ -+ } else { -+ /*Path_A*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, 0x18000); /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0x77f82); /*@Disable TXIQGEN in RX mode*/ -+ /*Path_B*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, 0x18000); /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x0000f); /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0x77f82); /*@Disable TXIQGEN in RX mode*/ -+ } -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/ -+ -+ if (beam_info->beamformee_su_cnt > 0) { -+ odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x83321333); -+ odm_set_bb_reg(dm, R_0xa04, MASKBYTE3, 0xc1); -+ } else -+ odm_set_bb_reg(dm, R_0x90c, MASKDWORD, 0x81121313); -+} -+ -+void hal_txbf_8192e_fw_txbf_cmd( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 idx, period0 = 0, period1 = 0; -+ u8 PageNum0 = 0xFF, PageNum1 = 0xFF; -+ u8 u1_tx_bf_parm[3] = {0}; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ if (beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (idx == 0) { -+ if (beam_info->beamformee_entry[idx].is_sound) -+ PageNum0 = 0xFE; -+ else -+ PageNum0 = 0xFF; /* stop sounding */ -+ period0 = (u8)(beam_info->beamformee_entry[idx].sound_period); -+ } else if (idx == 1) { -+ if (beam_info->beamformee_entry[idx].is_sound) -+ PageNum1 = 0xFE; -+ else -+ PageNum1 = 0xFF; /* stop sounding */ -+ period1 = (u8)(beam_info->beamformee_entry[idx].sound_period); -+ } -+ } -+ } -+ -+ u1_tx_bf_parm[0] = PageNum0; -+ u1_tx_bf_parm[1] = PageNum1; -+ u1_tx_bf_parm[2] = (period1 << 4) | period0; -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm); -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", -+ __func__, PageNum0, period0, PageNum1, period1); -+} -+ -+void hal_txbf_8192e_download_ndpa( -+ void *dm_void, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 u1b_tmp = 0, tmp_reg422 = 0, head_page; -+ u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0; -+ boolean is_send_beacon = false; -+ u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; -+ /*@default reseved 1 page for the IC type which is undefined.*/ -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ *dm->is_fw_dw_rsvd_page_in_progress = true; -+#endif -+ if (idx == 0) -+ head_page = 0xFE; -+ else -+ head_page = 0xFE; -+ -+ phydm_get_hal_def_var_handler_interface(dm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy); -+ -+ /*Set REG_CR bit 8. DMA beacon by SW.*/ -+ u1b_tmp = odm_read_1byte(dm, REG_CR_8192E + 1); -+ odm_write_1byte(dm, REG_CR_8192E + 1, (u1b_tmp | BIT(0))); -+ -+ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ -+ tmp_reg422 = odm_read_1byte(dm, REG_FWHW_TXQ_CTRL_8192E + 2); -+ odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8192E + 2, tmp_reg422 & (~BIT(6))); -+ -+ if (tmp_reg422 & BIT(6)) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s There is an adapter is sending beacon.\n", -+ __func__); -+ is_send_beacon = true; -+ } -+ -+ /*TDECTRL[15:8] 0x209[7:0] = 0xFE/0xFD NDPA Head for TXDMA*/ -+ odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E + 1, head_page); -+ -+ do { -+ /*@Clear beacon valid check bit.*/ -+ bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E + 2); -+ odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E + 2, (bcn_valid_reg | BIT(0))); -+ -+ /* @download NDPA rsvd page. */ -+ beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE); -+ -+#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -+ if (dm->support_interface == ODM_ITRF_PCIE) { -+ u1b_tmp = odm_read_1byte(dm, REG_MGQ_TXBD_NUM_8192E + 3); -+ count = 0; -+ while ((count < 20) && (u1b_tmp & BIT(4))) { -+ count++; -+ ODM_delay_us(10); -+ u1b_tmp = odm_read_1byte(dm, REG_MGQ_TXBD_NUM_8192E + 3); -+ } -+ odm_write_1byte(dm, REG_MGQ_TXBD_NUM_8192E + 3, u1b_tmp | BIT(4)); -+ } -+#endif -+ -+ /*@check rsvd page download OK.*/ -+ bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E + 2); -+ count = 0; -+ while (!(bcn_valid_reg & BIT(0)) && count < 20) { -+ count++; -+ ODM_delay_us(10); -+ bcn_valid_reg = odm_read_1byte(dm, REG_DWBCN0_CTRL_8192E + 2); -+ } -+ dl_bcn_count++; -+ } while (!(bcn_valid_reg & BIT(0)) && dl_bcn_count < 5); -+ -+ if (!(bcn_valid_reg & BIT(0))) -+ PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n", -+ __func__); -+ -+ /*TDECTRL[15:8] 0x209[7:0] = 0xF9 Beacon Head for TXDMA*/ -+ odm_write_1byte(dm, REG_DWBCN0_CTRL_8192E + 1, tx_page_bndy); -+ -+ /*To make sure that if there exists an adapter which would like to send beacon.*/ -+ /*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ -+ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ -+ /*the beacon cannot be sent by HW.*/ -+ /*@2010.06.23. Added by tynli.*/ -+ if (is_send_beacon) -+ odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8192E + 2, tmp_reg422); -+ -+ /*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ -+ /*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ -+ u1b_tmp = odm_read_1byte(dm, REG_CR_8192E + 1); -+ odm_write_1byte(dm, REG_CR_8192E + 1, (u1b_tmp & (~BIT(0)))); -+ -+ p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ *dm->is_fw_dw_rsvd_page_in_progress = false; -+#endif -+} -+ -+void hal_txbf_8192e_enter( -+ void *dm_void, -+ u8 bfer_bfee_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; -+ u8 bfee_idx = (bfer_bfee_idx & 0xF); -+ u32 csi_param; -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY beamformee_entry; -+ struct _RT_BEAMFORMER_ENTRY beamformer_entry; -+ u16 sta_id = 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ hal_txbf_8192e_rf_mode(dm, beamforming_info); -+ -+ if (dm->rf_type == RF_2T2R) -+ odm_write_4byte(dm, 0xd80, 0x00000000); /*nc =2*/ -+ -+ if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) { -+ beamformer_entry = beamforming_info->beamformer_entry[bfer_idx]; -+ -+ /*Sounding protocol control*/ -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8192E, 0xCB); -+ -+ /*@MAC address/Partial AID of Beamformer*/ -+ if (bfer_idx == 0) { -+ for (i = 0; i < 6; i++) -+ odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8192E + i), beamformer_entry.mac_addr[i]); -+ } else { -+ for (i = 0; i < 6; i++) -+ odm_write_1byte(dm, (REG_ASSOCIATED_BFMER1_INFO_8192E + i), beamformer_entry.mac_addr[i]); -+ } -+ -+ /*@CSI report parameters of Beamformer Default use nc = 2*/ -+ csi_param = 0x03090309; -+ -+ odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW20_8192E, csi_param); -+ odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW40_8192E, csi_param); -+ odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW80_8192E, csi_param); -+ -+ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8192E + 3, 0x50); -+ } -+ -+ if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) { -+ beamformee_entry = beamforming_info->beamformee_entry[bfee_idx]; -+ -+ if (phydm_acting_determine(dm, phydm_acting_as_ibss)) -+ sta_id = beamformee_entry.mac_id; -+ else -+ sta_id = beamformee_entry.p_aid; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s], sta_id=0x%X\n", __func__, -+ sta_id); -+ -+ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ -+ if (bfee_idx == 0) { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8192E, sta_id); -+ odm_write_1byte(dm, REG_TXBF_CTRL_8192E + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8192E + 3) | BIT(4) | BIT(6) | BIT(7)); -+ } else -+ odm_write_2byte(dm, REG_TXBF_CTRL_8192E + 2, sta_id | BIT(12) | BIT(14) | BIT(15)); -+ -+ /*@CSI report parameters of Beamformee*/ -+ if (bfee_idx == 0) { -+ /*@Get BIT24 & BIT25*/ -+ u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 3) & 0x3; -+ -+ odm_write_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 3, tmp | 0x60); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E, sta_id | BIT(9)); -+ } else { -+ /*Set BIT25*/ -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 2, sta_id | 0xE200); -+ } -+ phydm_beamforming_notify(dm); -+ } -+} -+ -+void hal_txbf_8192e_leave( -+ void *dm_void, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ hal_txbf_8192e_rf_mode(dm, beam_info); -+ -+ /* @Clear P_AID of Beamformee -+ * Clear MAC addresss of Beamformer -+ * Clear Associated Bfmee Sel -+ */ -+ if (beam_info->beamform_cap == BEAMFORMING_CAP_NONE) -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8192E, 0xC8); -+ -+ if (idx == 0) { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8192E, 0); -+ odm_write_4byte(dm, REG_ASSOCIATED_BFMER0_INFO_8192E, 0); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMER0_INFO_8192E + 4, 0); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E, 0); -+ } else { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8192E + 2, odm_read_1byte(dm, REG_TXBF_CTRL_8192E + 2) & 0xF000); -+ odm_write_4byte(dm, REG_ASSOCIATED_BFMER1_INFO_8192E, 0); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMER1_INFO_8192E + 4, 0); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 2, odm_read_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8192E + 2) & 0x60); -+ } -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] idx %d\n", __func__, idx); -+} -+ -+void hal_txbf_8192e_status( -+ void *dm_void, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 beam_ctrl_val; -+ u32 beam_ctrl_reg; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY beamform_entry = beam_info->beamformee_entry[idx]; -+ -+ if (phydm_acting_determine(dm, phydm_acting_as_ibss)) -+ beam_ctrl_val = beamform_entry.mac_id; -+ else -+ beam_ctrl_val = beamform_entry.p_aid; -+ -+ if (idx == 0) -+ beam_ctrl_reg = REG_TXBF_CTRL_8192E; -+ else { -+ beam_ctrl_reg = REG_TXBF_CTRL_8192E + 2; -+ beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15); -+ } -+ -+ if (beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED && beam_info->apply_v_matrix == true) { -+ if (beamform_entry.sound_bw == CHANNEL_WIDTH_20) -+ beam_ctrl_val |= BIT(9); -+ else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40) -+ beam_ctrl_val |= BIT(10); -+ } else -+ beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11)); -+ -+ odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val); -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] idx %d beam_ctrl_reg %x beam_ctrl_val %x\n", __func__, -+ idx, beam_ctrl_reg, beam_ctrl_val); -+} -+ -+void hal_txbf_8192e_fw_tx_bf( -+ void *dm_void, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ hal_txbf_8192e_download_ndpa(dm, idx); -+ -+ hal_txbf_8192e_fw_txbf_cmd(dm); -+} -+ -+#endif /* @#if (RTL8192E_SUPPORT == 1)*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8192e.h b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8192e.h -new file mode 100644 -index 000000000000..9b0c8321f991 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8192e.h -@@ -0,0 +1,71 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#ifndef __HAL_TXBF_8192E_H__ -+#define __HAL_TXBF_8192E_H__ -+ -+#if (RTL8192E_SUPPORT == 1) -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ -+void hal_txbf_8192e_set_ndpa_rate( -+ void *dm_void, -+ u8 BW, -+ u8 rate); -+ -+void hal_txbf_8192e_enter( -+ void *dm_void, -+ u8 idx); -+ -+void hal_txbf_8192e_leave( -+ void *dm_void, -+ u8 idx); -+ -+void hal_txbf_8192e_status( -+ void *dm_void, -+ u8 idx); -+ -+void hal_txbf_8192e_fw_tx_bf( -+ void *dm_void, -+ u8 idx); -+#else -+ -+#define hal_txbf_8192e_set_ndpa_rate(dm_void, BW, rate) -+#define hal_txbf_8192e_enter(dm_void, idx) -+#define hal_txbf_8192e_leave(dm_void, idx) -+#define hal_txbf_8192e_status(dm_void, idx) -+#define hal_txbf_8192e_fw_tx_bf(dm_void, idx) -+ -+#endif -+ -+#else -+ -+#define hal_txbf_8192e_set_ndpa_rate(dm_void, BW, rate) -+#define hal_txbf_8192e_enter(dm_void, idx) -+#define hal_txbf_8192e_leave(dm_void, idx) -+#define hal_txbf_8192e_status(dm_void, idx) -+#define hal_txbf_8192e_fw_tx_bf(dm_void, idx) -+ -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8814a.c b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8814a.c -new file mode 100644 -index 000000000000..7ad6ca909b49 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8814a.c -@@ -0,0 +1,675 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/* ************************************************************ -+ * Description: -+ * -+ * This file is for 8814A TXBF mechanism -+ * -+ * ************************************************************ */ -+ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if (RTL8814A_SUPPORT == 1) -+ -+boolean -+phydm_beamforming_set_iqgen_8814A(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ u16 counter = 0; -+ u32 rf_mode[4]; -+ -+ for (i = RF_PATH_A; i < MAX_RF_PATH; i++) -+ odm_set_rf_reg(dm, i, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/ -+ -+ while (1) { -+ counter++; -+ for (i = RF_PATH_A; i < MAX_RF_PATH; i++) -+ odm_set_rf_reg(dm, i, RF_RCK_OS, 0xfffff, 0x18000); /*Select Rx mode*/ -+ -+ ODM_delay_us(2); -+ -+ for (i = RF_PATH_A; i < MAX_RF_PATH; i++) -+ rf_mode[i] = odm_get_rf_reg(dm, i, RF_RCK_OS, 0xfffff); -+ -+ if (rf_mode[0] == 0x18000 && rf_mode[1] == 0x18000 && rf_mode[2] == 0x18000 && rf_mode[3] == 0x18000) -+ break; -+ else if (counter == 100) { -+ PHYDM_DBG(dm, DBG_TXBF, "iqgen setting fail:8814A\n"); -+ return false; -+ } -+ } -+ -+ for (i = RF_PATH_A; i < MAX_RF_PATH; i++) { -+ odm_set_rf_reg(dm, i, RF_TXPA_G1, 0xfffff, 0xBE77F); /*Set Table data*/ -+ odm_set_rf_reg(dm, i, RF_TXPA_G2, 0xfffff, 0x226BF); /*@Enable TXIQGEN in Rx mode*/ -+ } -+ odm_set_rf_reg(dm, RF_PATH_A, RF_TXPA_G2, 0xfffff, 0xE26BF); /*@Enable TXIQGEN in Rx mode*/ -+ -+ for (i = RF_PATH_A; i < MAX_RF_PATH; i++) -+ odm_set_rf_reg(dm, i, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/ -+ -+ return true; -+} -+ -+void hal_txbf_8814a_set_ndpa_rate(void *dm_void, u8 BW, u8 rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8814A, BW); -+ odm_write_1byte(dm, REG_NDPA_RATE_8814A, (u8)rate); -+} -+#if 0 -+#define PHYDM_MEMORY_MAP_BUF_READ 0x8000 -+#define PHYDM_CTRL_INFO_PAGE 0x660 -+ -+void -+phydm_data_rate_8814a( -+ struct dm_struct *dm, -+ u8 mac_id, -+ u32 *data, -+ u8 data_len -+) -+{ -+ u8 i = 0; -+ u16 x_read_data_addr = 0; -+ -+ odm_write_2byte(dm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE); -+ x_read_data_addr = PHYDM_MEMORY_MAP_BUF_READ + mac_id * 32; /*@Ctrl Info: 32Bytes for each macid(n)*/ -+ -+ if (x_read_data_addr < PHYDM_MEMORY_MAP_BUF_READ || x_read_data_addr > 0x8FFF) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "x_read_data_addr(0x%x) is not correct!\n", -+ x_read_data_addr); -+ return; -+ } -+ -+ /* Read data */ -+ for (i = 0; i < data_len; i++) -+ *(data + i) = odm_read_2byte(dm, x_read_data_addr + i); -+} -+#endif -+ -+void hal_txbf_8814a_get_tx_rate(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *entry; -+ struct ra_table *ra_tab = &dm->dm_ra_table; -+ struct cmn_sta_info *sta = NULL; -+ u8 data_rate = 0xFF; -+ u8 macid = 0; -+ -+ entry = &(beam_info->beamformee_entry[beam_info->beamformee_cur_idx]); -+ macid = (u8)entry->mac_id; -+ -+ sta = dm->phydm_sta_info[macid]; -+ -+ if (is_sta_active(sta)) { -+ data_rate = (sta->ra_info.curr_tx_rate) & 0x7f; /*@Bit7 indicates SGI*/ -+ beam_info->tx_bf_data_rate = data_rate; -+ } -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] dm->tx_bf_data_rate = 0x%x\n", __func__, -+ beam_info->tx_bf_data_rate); -+} -+ -+void hal_txbf_8814a_reset_tx_path(void *dm_void, u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY beamformee_entry; -+ u8 nr_index = 0, tx_ss = 0; -+ -+ if (idx < BEAMFORMEE_ENTRY_NUM) -+ beamformee_entry = beamforming_info->beamformee_entry[idx]; -+ else -+ return; -+ -+ if (beamforming_info->last_usb_hub != (*dm->hub_usb_mode)) { -+ nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), beamformee_entry.comp_steering_num_of_bfer); -+ -+ if (*dm->hub_usb_mode == 2) { -+ if (dm->rf_type == RF_4T4R) -+ tx_ss = 0xf; -+ else if (dm->rf_type == RF_3T3R) -+ tx_ss = 0xe; -+ else -+ tx_ss = 0x6; -+ } else if (*dm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/ -+ tx_ss = 0x6; -+ else -+ tx_ss = 0x6; -+ -+ if (tx_ss == 0xf) { -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93f); -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKDWORD, 0x93f93f0); -+ } else if (tx_ss == 0xe) { -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93e); -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e93e0); -+ } else if (tx_ss == 0x6) { -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x936); -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360); -+ } -+ -+ if (idx == 0) { -+ switch (nr_index) { -+ case 0: -+ break; -+ -+ case 1: /*Nsts = 2 BC*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ -+ break; -+ -+ case 2: /*Nsts = 3 BCD*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ -+ break; -+ -+ default: /*nr>3, same as Case 3*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ -+ break; -+ } -+ } else { -+ switch (nr_index) { -+ case 0: -+ break; -+ -+ case 1: /*Nsts = 2 BC*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ -+ break; -+ -+ case 2: /*Nsts = 3 BCD*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ -+ break; -+ -+ default: /*nr>3, same as Case 3*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ -+ break; -+ } -+ } -+ -+ beamforming_info->last_usb_hub = *dm->hub_usb_mode; -+ } else -+ return; -+#endif -+} -+ -+u8 hal_txbf_8814a_get_ntx(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 ntx = 0, tx_ss = 3; -+ -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ tx_ss = *dm->hub_usb_mode; -+#endif -+ if (tx_ss == 3 || tx_ss == 2) { -+ if (dm->rf_type == RF_4T4R) -+ ntx = 3; -+ else if (dm->rf_type == RF_3T3R) -+ ntx = 2; -+ else -+ ntx = 1; -+ } else if (tx_ss == 1) /*USB 2.0 always 2Tx*/ -+ ntx = 1; -+ else -+ ntx = 1; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ntx = %d\n", __func__, ntx); -+ return ntx; -+} -+ -+u8 hal_txbf_8814a_get_nrx(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 nrx = 0; -+ -+ if (dm->rf_type == RF_4T4R) -+ nrx = 3; -+ else if (dm->rf_type == RF_3T3R) -+ nrx = 2; -+ else if (dm->rf_type == RF_2T2R) -+ nrx = 1; -+ else if (dm->rf_type == RF_2T3R) -+ nrx = 2; -+ else if (dm->rf_type == RF_2T4R) -+ nrx = 3; -+ else if (dm->rf_type == RF_1T1R) -+ nrx = 0; -+ else if (dm->rf_type == RF_1T2R) -+ nrx = 1; -+ else -+ nrx = 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] nrx = %d\n", __func__, nrx); -+ return nrx; -+} -+ -+void hal_txbf_8814a_rf_mode(void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beamforming_info, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 nr_index = 0; -+ u8 tx_ss = 3; /*@default use 3 Tx*/ -+ struct _RT_BEAMFORMEE_ENTRY beamformee_entry; -+ -+ if (idx < BEAMFORMEE_ENTRY_NUM) -+ beamformee_entry = beamforming_info->beamformee_entry[idx]; -+ else -+ return; -+ -+ nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), beamformee_entry.comp_steering_num_of_bfer); -+ -+ if (dm->rf_type == RF_1T1R) -+ return; -+ -+ if (beamforming_info->beamformee_su_cnt > 0) { -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ beamforming_info->last_usb_hub = *dm->hub_usb_mode; -+ tx_ss = *dm->hub_usb_mode; -+#endif -+ if (tx_ss == 3 || tx_ss == 2) { -+ if (dm->rf_type == RF_4T4R) -+ tx_ss = 0xf; -+ else if (dm->rf_type == RF_3T3R) -+ tx_ss = 0xe; -+ else -+ tx_ss = 0x6; -+ } else if (tx_ss == 1) /*USB 2.0 always 2Tx*/ -+ tx_ss = 0x6; -+ else -+ tx_ss = 0x6; -+ -+ if (tx_ss == 0xf) { -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93f); -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKDWORD, 0x93f93f0); -+ } else if (tx_ss == 0xe) { -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93e); -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e93e0); -+ } else if (tx_ss == 0x6) { -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x936); -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360); -+ } -+ -+ /*@for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT(28) | BIT29, 0x2); /*@enable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT30, 0x1); /*@if Nsts > Nc don't apply V matrix*/ -+ -+ if (idx == 0) { -+ switch (nr_index) { -+ case 0: -+ break; -+ -+ case 1: /*Nsts = 2 BC*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ -+ break; -+ -+ case 2: /*Nsts = 3 BCD*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ -+ break; -+ -+ default: /*nr>3, same as Case 3*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ -+ -+ break; -+ } -+ } else { -+ switch (nr_index) { -+ case 0: -+ break; -+ -+ case 1: /*Nsts = 2 BC*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/ -+ break; -+ -+ case 2: /*Nsts = 3 BCD*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/ -+ break; -+ -+ default: /*nr>3, same as Case 3*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/ -+ break; -+ } -+ } -+ } -+ -+ if (beamforming_info->beamformee_su_cnt == 0 && beamforming_info->beamformer_su_cnt == 0) { -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x932); /*set tx_path selection for 8814a BFer bug refine*/ -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e9360); -+ } -+} -+#if 0 -+void -+hal_txbf_8814a_download_ndpa( -+ void *dm_void, -+ u8 idx -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 u1b_tmp = 0, tmp_reg422 = 0; -+ u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0; -+ u16 head_page = 0x7FE; -+ boolean is_send_beacon = false; -+ u16 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*@default reseved 1 page for the IC type which is undefined.*/ -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; -+ void *adapter = dm->adapter; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ *dm->is_fw_dw_rsvd_page_in_progress = true; -+#endif -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ phydm_get_hal_def_var_handler_interface(dm, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy); -+ -+ /*Set REG_CR bit 8. DMA beacon by SW.*/ -+ u1b_tmp = odm_read_1byte(dm, REG_CR_8814A + 1); -+ odm_write_1byte(dm, REG_CR_8814A + 1, (u1b_tmp | BIT(0))); -+ -+ -+ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ -+ tmp_reg422 = odm_read_1byte(dm, REG_FWHW_TXQ_CTRL_8814A + 2); -+ odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422 & (~BIT(6))); -+ -+ if (tmp_reg422 & BIT(6)) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s: There is an adapter is sending beacon.\n", -+ __func__); -+ is_send_beacon = true; -+ } -+ -+ /*@0x204[11:0] Beacon Head for TXDMA*/ -+ odm_write_2byte(dm, REG_FIFOPAGE_CTRL_2_8814A, head_page); -+ -+ do { -+ /*@Clear beacon valid check bit.*/ -+ bcn_valid_reg = odm_read_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 1); -+ odm_write_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 1, (bcn_valid_reg | BIT(7))); -+ -+ /*@download NDPA rsvd page.*/ -+ if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) -+ beamforming_send_vht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE); -+ else -+ beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE); -+ -+ /*@check rsvd page download OK.*/ -+ bcn_valid_reg = odm_read_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 1); -+ count = 0; -+ while (!(bcn_valid_reg & BIT(7)) && count < 20) { -+ count++; -+ ODM_delay_ms(10); -+ bcn_valid_reg = odm_read_1byte(dm, REG_FIFOPAGE_CTRL_2_8814A + 2); -+ } -+ dl_bcn_count++; -+ } while (!(bcn_valid_reg & BIT(7)) && dl_bcn_count < 5); -+ -+ if (!(bcn_valid_reg & BIT(7))) -+ PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n", -+ __func__); -+ -+ /*@0x204[11:0] Beacon Head for TXDMA*/ -+ odm_write_2byte(dm, REG_FIFOPAGE_CTRL_2_8814A, tx_page_bndy); -+ -+ /*To make sure that if there exists an adapter which would like to send beacon.*/ -+ /*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ -+ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ -+ /*the beacon cannot be sent by HW.*/ -+ /*@2010.06.23. Added by tynli.*/ -+ if (is_send_beacon) -+ odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422); -+ -+ /*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ -+ /*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ -+ u1b_tmp = odm_read_1byte(dm, REG_CR_8814A + 1); -+ odm_write_1byte(dm, REG_CR_8814A + 1, (u1b_tmp & (~BIT(0)))); -+ -+ p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ *dm->is_fw_dw_rsvd_page_in_progress = false; -+#endif -+} -+ -+void -+hal_txbf_8814a_fw_txbf_cmd( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 idx, period = 0; -+ u8 PageNum0 = 0xFF, PageNum1 = 0xFF; -+ u8 u1_tx_bf_parm[3] = {0}; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ if (beam_info->beamformee_entry[idx].is_used && beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (beam_info->beamformee_entry[idx].is_sound) { -+ PageNum0 = 0xFE; -+ PageNum1 = 0x07; -+ period = (u8)(beam_info->beamformee_entry[idx].sound_period); -+ } else if (PageNum0 == 0xFF) { -+ PageNum0 = 0xFF; /*stop sounding*/ -+ PageNum1 = 0x0F; -+ } -+ } -+ } -+ -+ u1_tx_bf_parm[0] = PageNum0; -+ u1_tx_bf_parm[1] = PageNum1; -+ u1_tx_bf_parm[2] = period; -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm); -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] PageNum0 = %d, PageNum1 = %d period = %d\n", __func__, -+ PageNum0, PageNum1, period); -+} -+#endif -+void hal_txbf_8814a_enter(void *dm_void, u8 bfer_bfee_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; -+ u8 bfee_idx = (bfer_bfee_idx & 0xF); -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY beamformee_entry; -+ struct _RT_BEAMFORMER_ENTRY beamformer_entry; -+ u16 sta_id = 0, csi_param = 0; -+ u8 nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] bfer_idx=%d, bfee_idx=%d\n", __func__, -+ bfer_idx, bfee_idx); -+ odm_set_mac_reg(dm, REG_SND_PTCL_CTRL_8814A, MASKBYTE1 | MASKBYTE2, 0x0202); -+ -+ if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) { -+ beamformer_entry = beamforming_info->beamformer_entry[bfer_idx]; -+ /*Sounding protocol control*/ -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8814A, 0xDB); -+ -+ /*@MAC address/Partial AID of Beamformer*/ -+ if (bfer_idx == 0) { -+ for (i = 0; i < 6; i++) -+ odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), beamformer_entry.mac_addr[i]); -+ } else { -+ for (i = 0; i < 6; i++) -+ odm_write_1byte(dm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), beamformer_entry.mac_addr[i]); -+ } -+ -+ /*@CSI report parameters of Beamformer*/ -+ nc_index = hal_txbf_8814a_get_nrx(dm); /*@for 8814A nrx = 3(4 ant), min=0(1 ant)*/ -+ nr_index = beamformer_entry.num_of_sounding_dim; /*@0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/ -+ -+ grouping = 0; -+ -+ /*@for ac = 1, for n = 3*/ -+ if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU) -+ codebookinfo = 1; -+ else if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT) -+ codebookinfo = 3; -+ -+ coefficientsize = 3; -+ -+ csi_param = (u16)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (nr_index << 3) | (nc_index)); -+ -+ if (bfer_idx == 0) -+ odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8814A, csi_param); -+ else -+ odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8814A + 2, csi_param); -+ /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/ -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8814A + 3, 0x40); -+ } -+ -+ if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) { -+ beamformee_entry = beamforming_info->beamformee_entry[bfee_idx]; -+ -+ hal_txbf_8814a_rf_mode(dm, beamforming_info, bfee_idx); -+ -+ if (phydm_acting_determine(dm, phydm_acting_as_ibss)) -+ sta_id = beamformee_entry.mac_id; -+ else -+ sta_id = beamformee_entry.p_aid; -+ -+ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ -+ if (bfee_idx == 0) { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8814A, sta_id); -+ odm_write_1byte(dm, REG_TXBF_CTRL_8814A + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8814A + 3) | BIT(4) | BIT(6) | BIT(7)); -+ } else -+ odm_write_2byte(dm, REG_TXBF_CTRL_8814A + 2, sta_id | BIT(14) | BIT(15) | BIT(12)); -+ -+ /*@CSI report parameters of Beamformee*/ -+ if (bfee_idx == 0) { -+ /*@Get BIT24 & BIT25*/ -+ u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3; -+ -+ odm_write_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A, sta_id | BIT(9)); -+ } else -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, sta_id | 0xE200); /*Set BIT25*/ -+ -+ phydm_beamforming_notify(dm); -+ } -+} -+ -+void hal_txbf_8814a_leave(void *dm_void, u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMER_ENTRY beamformer_entry; -+ struct _RT_BEAMFORMEE_ENTRY beamformee_entry; -+ -+ if (idx < BEAMFORMER_ENTRY_NUM) { -+ beamformer_entry = beamforming_info->beamformer_entry[idx]; -+ beamformee_entry = beamforming_info->beamformee_entry[idx]; -+ } else -+ return; -+ -+ /*@Clear P_AID of Beamformee*/ -+ /*@Clear MAC address of Beamformer*/ -+ /*@Clear Associated Bfmee Sel*/ -+ -+ if (beamformer_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) { -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8814A, 0xD8); -+ if (idx == 0) { -+ odm_write_4byte(dm, REG_ASSOCIATED_BFMER0_INFO_8814A, 0); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMER0_INFO_8814A + 4, 0); -+ odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8814A, 0); -+ } else { -+ odm_write_4byte(dm, REG_ASSOCIATED_BFMER1_INFO_8814A, 0); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMER1_INFO_8814A + 4, 0); -+ odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8814A + 2, 0); -+ } -+ } -+ -+ if (beamformee_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) { -+ hal_txbf_8814a_rf_mode(dm, beamforming_info, idx); -+ if (idx == 0) { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8814A, 0x0); -+ odm_write_1byte(dm, REG_TXBF_CTRL_8814A + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8814A + 3) | BIT(4) | BIT(6) | BIT(7)); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A, 0); -+ } else { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8814A + 2, 0x0 | BIT(14) | BIT(15) | BIT(12)); -+ -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, odm_read_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2) & 0x60); -+ } -+ } -+} -+ -+void hal_txbf_8814a_status(void *dm_void, u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 beam_ctrl_val, tmp_val; -+ u32 beam_ctrl_reg; -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY beamform_entry; -+ -+ if (idx < BEAMFORMEE_ENTRY_NUM) -+ beamform_entry = beamforming_info->beamformee_entry[idx]; -+ else -+ return; -+ -+ if (phydm_acting_determine(dm, phydm_acting_as_ibss)) -+ beam_ctrl_val = beamform_entry.mac_id; -+ else -+ beam_ctrl_val = beamform_entry.p_aid; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "@%s, beamform_entry.beamform_entry_state = %d", -+ __func__, beamform_entry.beamform_entry_state); -+ -+ if (idx == 0) -+ beam_ctrl_reg = REG_TXBF_CTRL_8814A; -+ else { -+ beam_ctrl_reg = REG_TXBF_CTRL_8814A + 2; -+ beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15); -+ } -+ -+ if (beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED && beamforming_info->apply_v_matrix == true) { -+ if (beamform_entry.sound_bw == CHANNEL_WIDTH_20) -+ beam_ctrl_val |= BIT(9); -+ else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40) -+ beam_ctrl_val |= (BIT(9) | BIT(10)); -+ else if (beamform_entry.sound_bw == CHANNEL_WIDTH_80) -+ beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11)); -+ } else { -+ PHYDM_DBG(dm, DBG_TXBF, "@%s, Don't apply Vmatrix", __func__); -+ beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11)); -+ } -+ -+ odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val); -+ /*@disable NDP packet use beamforming */ -+ tmp_val = odm_read_2byte(dm, REG_TXBF_CTRL_8814A); -+ odm_write_2byte(dm, REG_TXBF_CTRL_8814A, tmp_val | BIT(15)); -+} -+ -+void hal_txbf_8814a_fw_txbf(void *dm_void, u8 idx) -+{ -+#if 0 -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ hal_txbf_8814a_download_ndpa(dm, idx); -+ -+ hal_txbf_8814a_fw_txbf_cmd(dm); -+#endif -+} -+ -+#endif /* @(RTL8814A_SUPPORT == 1)*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8814a.h b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8814a.h -new file mode 100644 -index 000000000000..61b33bbfbb9b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8814a.h -@@ -0,0 +1,77 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#ifndef __HAL_TXBF_8814A_H__ -+#define __HAL_TXBF_8814A_H__ -+ -+#if (RTL8814A_SUPPORT == 1) -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ -+boolean -+phydm_beamforming_set_iqgen_8814A(void *dm_void); -+ -+void hal_txbf_8814a_set_ndpa_rate(void *dm_void, u8 BW, u8 rate); -+ -+u8 hal_txbf_8814a_get_ntx(void *dm_void); -+ -+void hal_txbf_8814a_enter(void *dm_void, u8 idx); -+ -+void hal_txbf_8814a_leave(void *dm_void, u8 idx); -+ -+void hal_txbf_8814a_status(void *dm_void, u8 idx); -+ -+void hal_txbf_8814a_reset_tx_path(void *dm_void, u8 idx); -+ -+void hal_txbf_8814a_get_tx_rate(void *dm_void); -+ -+void hal_txbf_8814a_fw_txbf(void *dm_void, u8 idx); -+ -+#else -+ -+#define hal_txbf_8814a_set_ndpa_rate(dm_void, BW, rate) -+#define hal_txbf_8814a_get_ntx(dm_void) 0 -+#define hal_txbf_8814a_enter(dm_void, idx) -+#define hal_txbf_8814a_leave(dm_void, idx) -+#define hal_txbf_8814a_status(dm_void, idx) -+#define hal_txbf_8814a_reset_tx_path(dm_void, idx) -+#define hal_txbf_8814a_get_tx_rate(dm_void) -+#define hal_txbf_8814a_fw_txbf(dm_void, idx) -+#define phydm_beamforming_set_iqgen_8814A(dm_void) 0 -+ -+#endif -+ -+#else -+ -+#define hal_txbf_8814a_set_ndpa_rate(dm_void, BW, rate) -+#define hal_txbf_8814a_get_ntx(dm_void) 0 -+#define hal_txbf_8814a_enter(dm_void, idx) -+#define hal_txbf_8814a_leave(dm_void, idx) -+#define hal_txbf_8814a_status(dm_void, idx) -+#define hal_txbf_8814a_reset_tx_path(dm_void, idx) -+#define hal_txbf_8814a_get_tx_rate(dm_void) -+#define hal_txbf_8814a_fw_txbf(dm_void, idx) -+#define phydm_beamforming_set_iqgen_8814A(dm_void) 0 -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8822b.c b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8822b.c -new file mode 100644 -index 000000000000..a1d35c9b178d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8822b.c -@@ -0,0 +1,1088 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/*@============================================================*/ -+/* @Description: */ -+/* @*/ -+/* This file is for 8814A TXBF mechanism */ -+/* @*/ -+/*@============================================================*/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if (RTL8822B_SUPPORT == 1) -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ -+u8 hal_txbf_8822b_get_ntx( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 ntx = 0; -+ -+#if DEV_BUS_TYPE == RT_USB_INTERFACE -+ if (dm->support_interface == ODM_ITRF_USB) { -+ if (*dm->hub_usb_mode == 2) { /*USB3.0*/ -+ if (dm->rf_type == RF_4T4R) -+ ntx = 3; -+ else if (dm->rf_type == RF_3T3R) -+ ntx = 2; -+ else -+ ntx = 1; -+ } else if (*dm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/ -+ ntx = 1; -+ else -+ ntx = 1; -+ } else -+#endif -+ { -+ if (dm->rf_type == RF_4T4R) -+ ntx = 3; -+ else if (dm->rf_type == RF_3T3R) -+ ntx = 2; -+ else -+ ntx = 1; -+ } -+ -+ return ntx; -+} -+ -+u8 hal_txbf_8822b_get_nrx( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 nrx = 0; -+ -+ if (dm->rf_type == RF_4T4R) -+ nrx = 3; -+ else if (dm->rf_type == RF_3T3R) -+ nrx = 2; -+ else if (dm->rf_type == RF_2T2R) -+ nrx = 1; -+ else if (dm->rf_type == RF_2T3R) -+ nrx = 2; -+ else if (dm->rf_type == RF_2T4R) -+ nrx = 3; -+ else if (dm->rf_type == RF_1T1R) -+ nrx = 0; -+ else if (dm->rf_type == RF_1T2R) -+ nrx = 1; -+ else -+ nrx = 0; -+ -+ return nrx; -+} -+ -+/***************SU & MU BFee Entry********************/ -+void hal_txbf_8822b_rf_mode( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beamforming_info, -+ u8 idx) -+{ -+#if 0 -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i, nr_index = 0; -+ boolean is_self_beamformer = false; -+ boolean is_self_beamformee = false; -+ struct _RT_BEAMFORMEE_ENTRY beamformee_entry; -+ -+ if (idx < BEAMFORMEE_ENTRY_NUM) -+ beamformee_entry = beamforming_info->beamformee_entry[idx]; -+ else -+ return; -+ -+ if (dm->rf_type == RF_1T1R) -+ return; -+ -+ for (i = RF_PATH_A; i < RF_PATH_B; i++) { -+ odm_set_rf_reg(dm, (enum rf_path)i, rf_welut_jaguar, 0x80000, 0x1); -+ /*RF mode table write enable*/ -+ } -+ -+ if (beamforming_info->beamformee_su_cnt > 0 || beamforming_info->beamformee_mu_cnt > 0) { -+ for (i = RF_PATH_A; i < RF_PATH_B; i++) { -+ odm_set_rf_reg(dm, (enum rf_path)i, rf_mode_table_addr, 0xfffff, 0x18000); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, rf_mode_table_data0, 0xfffff, 0xBE77F); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, rf_mode_table_data1, 0xfffff, 0x226BF); -+ /*@Enable TXIQGEN in RX mode*/ -+ } -+ odm_set_rf_reg(dm, RF_PATH_A, rf_mode_table_data1, 0xfffff, 0xE26BF); -+ /*@Enable TXIQGEN in RX mode*/ -+ } -+ -+ for (i = RF_PATH_A; i < RF_PATH_B; i++) { -+ odm_set_rf_reg(dm, (enum rf_path)i, rf_welut_jaguar, 0x80000, 0x0); -+ /*RF mode table write disable*/ -+ } -+ -+ if (beamforming_info->beamformee_su_cnt > 0) { -+ /*@for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2); /*@enable BB TxBF ant mapping register*/ -+ -+ if (idx == 0) { -+ /*Nsts = 2 AB*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF0_8822B, 0xffff, 0x0433); -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); -+ /*odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2, MASKLWORD, 0x430);*/ -+ -+ } else {/*@IDX =1*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433); -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); -+ /*odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2, MASKLWORD, 0x430;*/ -+ } -+ } else { -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /*@1SS by path-A*/ -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8822B, MASKLWORD, 0x430); /*@2SS by path-A,B*/ -+ } -+ -+ if (beamforming_info->beamformee_mu_cnt > 0) { -+ /*@MU STAs share the common setting*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1); -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433); -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); -+ } -+#endif -+} -+#if 0 -+void -+hal_txbf_8822b_download_ndpa( -+ void *adapter, -+ u8 idx -+) -+{ -+ u8 u1b_tmp = 0, tmp_reg422 = 0; -+ u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0; -+ u16 head_page = 0x7FE; -+ boolean is_send_beacon = false; -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u16 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*@default reseved 1 page for the IC type which is undefined.*/ -+ struct _RT_BEAMFORMING_INFO *beam_info = GET_BEAMFORM_INFO(adapter); -+ struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; -+ -+ hal_data->is_fw_dw_rsvd_page_in_progress = true; -+ phydm_get_hal_def_var_handler_interface(dm, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy); -+ -+ /*Set REG_CR bit 8. DMA beacon by SW.*/ -+ u1b_tmp = platform_efio_read_1byte(adapter, REG_CR_8814A + 1); -+ platform_efio_write_1byte(adapter, REG_CR_8814A + 1, (u1b_tmp | BIT(0))); -+ -+ -+ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ -+ tmp_reg422 = platform_efio_read_1byte(adapter, REG_FWHW_TXQ_CTRL_8814A + 2); -+ platform_efio_write_1byte(adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422 & (~BIT(6))); -+ -+ if (tmp_reg422 & BIT(6)) { -+ RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an adapter is sending beacon.\n")); -+ is_send_beacon = true; -+ } -+ -+ /*@0x204[11:0] Beacon Head for TXDMA*/ -+ platform_efio_write_2byte(adapter, REG_FIFOPAGE_CTRL_2_8814A, head_page); -+ -+ do { -+ /*@Clear beacon valid check bit.*/ -+ bcn_valid_reg = platform_efio_read_1byte(adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); -+ platform_efio_write_1byte(adapter, REG_FIFOPAGE_CTRL_2_8814A + 1, (bcn_valid_reg | BIT(7))); -+ -+ /*@download NDPA rsvd page.*/ -+ if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) -+ beamforming_send_vht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE); -+ else -+ beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE); -+ -+ /*@check rsvd page download OK.*/ -+ bcn_valid_reg = platform_efio_read_1byte(adapter, REG_FIFOPAGE_CTRL_2_8814A + 1); -+ count = 0; -+ while (!(bcn_valid_reg & BIT(7)) && count < 20) { -+ count++; -+ delay_us(10); -+ bcn_valid_reg = platform_efio_read_1byte(adapter, REG_FIFOPAGE_CTRL_2_8814A + 2); -+ } -+ dl_bcn_count++; -+ } while (!(bcn_valid_reg & BIT(7)) && dl_bcn_count < 5); -+ -+ if (!(bcn_valid_reg & BIT(0))) -+ RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__)); -+ -+ /*@0x204[11:0] Beacon Head for TXDMA*/ -+ platform_efio_write_2byte(adapter, REG_FIFOPAGE_CTRL_2_8814A, tx_page_bndy); -+ -+ /*To make sure that if there exists an adapter which would like to send beacon.*/ -+ /*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ -+ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ -+ /*the beacon cannot be sent by HW.*/ -+ /*@2010.06.23. Added by tynli.*/ -+ if (is_send_beacon) -+ platform_efio_write_1byte(adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422); -+ -+ /*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ -+ /*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ -+ u1b_tmp = platform_efio_read_1byte(adapter, REG_CR_8814A + 1); -+ platform_efio_write_1byte(adapter, REG_CR_8814A + 1, (u1b_tmp & (~BIT(0)))); -+ -+ p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+ -+ hal_data->is_fw_dw_rsvd_page_in_progress = false; -+} -+ -+void -+hal_txbf_8822b_fw_txbf_cmd( -+ void *adapter -+) -+{ -+ u8 idx, period = 0; -+ u8 PageNum0 = 0xFF, PageNum1 = 0xFF; -+ u8 u1_tx_bf_parm[3] = {0}; -+ -+ PMGNT_INFO mgnt_info = &(adapter->MgntInfo); -+ struct _RT_BEAMFORMING_INFO *beam_info = GET_BEAMFORM_INFO(adapter); -+ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ if (beam_info->beamformee_entry[idx].is_used && beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (beam_info->beamformee_entry[idx].is_sound) { -+ PageNum0 = 0xFE; -+ PageNum1 = 0x07; -+ period = (u8)(beam_info->beamformee_entry[idx].sound_period); -+ } else if (PageNum0 == 0xFF) { -+ PageNum0 = 0xFF; /*stop sounding*/ -+ PageNum1 = 0x0F; -+ } -+ } -+ } -+ -+ u1_tx_bf_parm[0] = PageNum0; -+ u1_tx_bf_parm[1] = PageNum1; -+ u1_tx_bf_parm[2] = period; -+ fill_h2c_cmd(adapter, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm); -+ -+ RT_DISP(FBEAM, FBEAM_FUN, ("@%s End, PageNum0 = 0x%x, PageNum1 = 0x%x period = %d", __func__, PageNum0, PageNum1, period)); -+} -+#endif -+ -+#if 0 -+void -+hal_txbf_8822b_init( -+ void *dm_void -+) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 u1b_tmp; -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ void *adapter = dm->adapter; -+ -+ odm_set_bb_reg(dm, R_0x14c0, BIT(16), 1); /*@Enable P1 aggr new packet according to P0 transfer time*/ -+ odm_set_bb_reg(dm, R_0x14c0, BIT(15) | BIT14 | BIT13 | BIT12, 10); /*@MU Retry Limit*/ -+ odm_set_bb_reg(dm, R_0x14c0, BIT(7), 0); /*@Disable Tx MU-MIMO until sounding done*/ -+ odm_set_bb_reg(dm, R_0x14c0, 0x3F, 0); /* @Clear validity of MU STAs */ -+ odm_write_1byte(dm, 0x167c, 0x70); /*@MU-MIMO Option as default value*/ -+ odm_write_2byte(dm, 0x1680, 0); /*@MU-MIMO Control as default value*/ -+ -+ /* Set MU NDPA rate & BW source */ -+ /* @0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ -+ u1b_tmp = odm_read_1byte(dm, 0x42C); -+ odm_write_1byte(dm, REG_TXBF_CTRL_8822B, (u1b_tmp | BIT(6))); -+ /* @0x45F[7:0] = 0x10 (rate=OFDM_6M, BW20) */ -+ odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8822B, 0x10); -+ -+ /*Temp Settings*/ -+ odm_set_bb_reg(dm, R_0x6dc, 0x3F000000, 4); /*STA2's CSI rate is fixed at 6M*/ -+ odm_set_bb_reg(dm, R_0x1c94, MASKDWORD, 0xAFFFAFFF); /*@Grouping bitmap parameters*/ -+ -+ /* @Init HW variable */ -+ beamforming_info->reg_mu_tx_ctrl = odm_read_4byte(dm, 0x14c0); -+ -+ if (dm->rf_type == RF_2T2R) { /*@2T2R*/ -+ PHYDM_DBG(dm, DBG_TXBF, "%s: rf_type is 2T2R\n", __func__); -+ config_phydm_trx_mode_8822b(dm, (enum bb_path)3, -+ (enum bb_path)3, BB_PATH_AB; -+ } -+ -+#if (OMNIPEEK_SNIFFER_ENABLED == 1) -+ /* @Config HW to receive packet on the user position from registry for sniffer mode. */ -+ /* odm_set_bb_reg(dm, R_0xb00, BIT(9), 1);*/ /* For A-cut only. RegB00[9] = 1 (enable PMAC Rx) */ -+ odm_set_bb_reg(dm, R_0xb54, BIT(30), 1); /* RegB54[30] = 1 (force user position) */ -+ odm_set_bb_reg(dm, R_0xb54, (BIT(29) | BIT28), adapter->MgntInfo.sniff_user_position); /* RegB54[29:28] = user position (0~3) */ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "Set adapter->MgntInfo.sniff_user_position=%#X\n", -+ adapter->MgntInfo.sniff_user_position); -+#endif -+} -+#endif -+ -+void hal_txbf_8822b_enter( -+ void *dm_void, -+ u8 bfer_bfee_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; -+ u8 bfee_idx = (bfer_bfee_idx & 0xF); -+ u16 csi_param = 0; -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *p_beamformee_entry; -+ struct _RT_BEAMFORMER_ENTRY *beamformer_entry; -+ u16 value16, sta_id = 0; -+ u8 nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0; -+ u32 gid_valid, user_position_l, user_position_h; -+ u32 mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; -+ u8 u1b_tmp; -+ u32 u4b_tmp; -+ -+ RT_DISP(FBEAM, FBEAM_FUN, ("%s: bfer_bfee_idx=%d, bfer_idx=%d, bfee_idx=%d\n", __func__, bfer_bfee_idx, bfer_idx, bfee_idx)); -+ -+ /*************SU BFer Entry Init*************/ -+ if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) { -+ beamformer_entry = &beamforming_info->beamformer_entry[bfer_idx]; -+ beamformer_entry->is_mu_ap = false; -+ /*Sounding protocol control*/ -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xDB); -+ -+ for (i = 0; i < MAX_BEAMFORMER_SU; i++) { -+ if ((beamforming_info->beamformer_su_reg_maping & BIT(i)) == 0) { -+ beamforming_info->beamformer_su_reg_maping |= BIT(i); -+ beamformer_entry->su_reg_index = i; -+ break; -+ } -+ } -+ -+ /*@MAC address/Partial AID of Beamformer*/ -+ if (beamformer_entry->su_reg_index == 0) { -+ for (i = 0; i < 6; i++) -+ odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + i), beamformer_entry->mac_addr[i]); -+ } else { -+ for (i = 0; i < 6; i++) -+ odm_write_1byte(dm, (REG_ASSOCIATED_BFMER1_INFO_8822B + i), beamformer_entry->mac_addr[i]); -+ } -+ -+ /*@CSI report parameters of Beamformer*/ -+ nc_index = hal_txbf_8822b_get_nrx(dm); /*@for 8814A nrx = 3(4 ant), min=0(1 ant)*/ -+ nr_index = beamformer_entry->num_of_sounding_dim; /*@0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/ -+ -+ grouping = 0; -+ -+ /*@for ac = 1, for n = 3*/ -+ if (beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU) -+ codebookinfo = 1; -+ else if (beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT) -+ codebookinfo = 3; -+ -+ coefficientsize = 3; -+ -+ csi_param = (u16)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (nr_index << 3) | (nc_index)); -+ -+ if (bfer_idx == 0) -+ odm_write_2byte(dm, REG_TX_CSI_RPT_PARAM_BW20_8822B, csi_param); -+ else -+ odm_write_2byte(dm, REG_TX_CSI_RPT_PARAM_BW20_8822B + 2, csi_param); -+ /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/ -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B + 3, 0x70); -+ } -+ -+ /*************SU BFee Entry Init*************/ -+ if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) { -+ p_beamformee_entry = &beamforming_info->beamformee_entry[bfee_idx]; -+ p_beamformee_entry->is_mu_sta = false; -+ hal_txbf_8822b_rf_mode(dm, beamforming_info, bfee_idx); -+ -+ if (phydm_acting_determine(dm, phydm_acting_as_ibss)) -+ sta_id = p_beamformee_entry->mac_id; -+ else -+ sta_id = p_beamformee_entry->p_aid; -+ -+ for (i = 0; i < MAX_BEAMFORMEE_SU; i++) { -+ if ((beamforming_info->beamformee_su_reg_maping & BIT(i)) == 0) { -+ beamforming_info->beamformee_su_reg_maping |= BIT(i); -+ p_beamformee_entry->su_reg_index = i; -+ break; -+ } -+ } -+ -+ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ -+ if (p_beamformee_entry->su_reg_index == 0) { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8822B, sta_id); -+ odm_write_1byte(dm, REG_TXBF_CTRL_8822B + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8822B + 3) | BIT(4) | BIT(6) | BIT(7)); -+ } else -+ odm_write_2byte(dm, REG_TXBF_CTRL_8822B + 2, sta_id | BIT(14) | BIT(15) | BIT(12)); -+ -+ /*@CSI report parameters of Beamformee*/ -+ if (p_beamformee_entry->su_reg_index == 0) { -+ /*@Get BIT24 & BIT25*/ -+ u8 tmp = odm_read_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3) & 0x3; -+ -+ odm_write_1byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 3, tmp | 0x60); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B, sta_id | BIT(9)); -+ } else -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2, sta_id | 0xE200); /*Set BIT25*/ -+ -+ phydm_beamforming_notify(dm); -+ } -+ -+ /*************MU BFer Entry Init*************/ -+ if (beamforming_info->beamformer_mu_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) { -+ beamformer_entry = &beamforming_info->beamformer_entry[bfer_idx]; -+ beamforming_info->mu_ap_index = bfer_idx; -+ beamformer_entry->is_mu_ap = true; -+ for (i = 0; i < 8; i++) -+ beamformer_entry->gid_valid[i] = 0; -+ for (i = 0; i < 16; i++) -+ beamformer_entry->user_position[i] = 0; -+ -+ /*Sounding protocol control*/ -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xDB); -+ -+ /* @MAC address */ -+ for (i = 0; i < 6; i++) -+ odm_write_1byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + i), beamformer_entry->mac_addr[i]); -+ -+ /* Set partial AID */ -+ odm_write_2byte(dm, (REG_ASSOCIATED_BFMER0_INFO_8822B + 6), beamformer_entry->p_aid); -+ -+ /* @Fill our AID to 0x1680[11:0] and [13:12] = 2b'00, BF report segment select to 3895 bytes*/ -+ u1b_tmp = odm_read_1byte(dm, 0x1680); -+ u1b_tmp = (beamformer_entry->p_aid) & 0xFFF; -+ odm_write_1byte(dm, 0x1680, u1b_tmp); -+ -+ /* Set 80us for leaving ndp_rx_standby_state */ -+ odm_write_1byte(dm, 0x71B, 0x50); -+ -+ /* Set 0x6A0[14] = 1 to accept action_no_ack */ -+ u1b_tmp = odm_read_1byte(dm, REG_RXFLTMAP0_8822B + 1); -+ u1b_tmp |= 0x40; -+ odm_write_1byte(dm, REG_RXFLTMAP0_8822B + 1, u1b_tmp); -+ /* Set 0x6A2[5:4] = 1 to NDPA and BF report poll */ -+ u1b_tmp = odm_read_1byte(dm, REG_RXFLTMAP1_8822B); -+ u1b_tmp |= 0x30; -+ odm_write_1byte(dm, REG_RXFLTMAP1_8822B, u1b_tmp); -+ -+ /*@CSI report parameters of Beamformer*/ -+ nc_index = hal_txbf_8822b_get_nrx(dm); /* @Depend on RF type */ -+ nr_index = 1; /*@0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/ -+ grouping = 0; /*no grouping*/ -+ codebookinfo = 1; /*@7 bit for psi, 9 bit for phi*/ -+ coefficientsize = 0; /*This is nothing really matter*/ -+ csi_param = (u16)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (nr_index << 3) | (nc_index)); -+ odm_write_2byte(dm, 0x6F4, csi_param); -+ -+ /*@for B-cut*/ -+ odm_set_bb_reg(dm, R_0x6a0, BIT(20), 0); -+ odm_set_bb_reg(dm, R_0x688, BIT(20), 0); -+ } -+ -+ /*************MU BFee Entry Init*************/ -+ if (beamforming_info->beamformee_mu_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) { -+ p_beamformee_entry = &beamforming_info->beamformee_entry[bfee_idx]; -+ p_beamformee_entry->is_mu_sta = true; -+ for (i = 0; i < MAX_BEAMFORMEE_MU; i++) { -+ if ((beamforming_info->beamformee_mu_reg_maping & BIT(i)) == 0) { -+ beamforming_info->beamformee_mu_reg_maping |= BIT(i); -+ p_beamformee_entry->mu_reg_index = i; -+ break; -+ } -+ } -+ -+ if (p_beamformee_entry->mu_reg_index == 0xFF) { -+ /* There is no valid bit in beamformee_mu_reg_maping */ -+ RT_DISP(FBEAM, FBEAM_FUN, ("%s: ERROR! There is no valid bit in beamformee_mu_reg_maping!\n", __func__)); -+ return; -+ } -+ -+ /*User position table*/ -+ switch (p_beamformee_entry->mu_reg_index) { -+ case 0: -+ gid_valid = 0x7fe; -+ user_position_l = 0x111110; -+ user_position_h = 0x0; -+ break; -+ case 1: -+ gid_valid = 0x7f806; -+ user_position_l = 0x11000004; -+ user_position_h = 0x11; -+ break; -+ case 2: -+ gid_valid = 0x1f81818; -+ user_position_l = 0x400040; -+ user_position_h = 0x11100; -+ break; -+ case 3: -+ gid_valid = 0x1e186060; -+ user_position_l = 0x4000400; -+ user_position_h = 0x1100040; -+ break; -+ case 4: -+ gid_valid = 0x66618180; -+ user_position_l = 0x40004000; -+ user_position_h = 0x10040400; -+ break; -+ case 5: -+ gid_valid = 0x79860600; -+ user_position_l = 0x40000; -+ user_position_h = 0x4404004; -+ break; -+ } -+ -+ for (i = 0; i < 8; i++) { -+ if (i < 4) { -+ p_beamformee_entry->gid_valid[i] = (u8)(gid_valid & 0xFF); -+ gid_valid = (gid_valid >> 8); -+ } else -+ p_beamformee_entry->gid_valid[i] = 0; -+ } -+ for (i = 0; i < 16; i++) { -+ if (i < 4) -+ p_beamformee_entry->user_position[i] = (u8)((user_position_l >> (i * 8)) & 0xFF); -+ else if (i < 8) -+ p_beamformee_entry->user_position[i] = (u8)((user_position_h >> ((i - 4) * 8)) & 0xFF); -+ else -+ p_beamformee_entry->user_position[i] = 0; -+ } -+ -+ /*Sounding protocol control*/ -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xDB); -+ -+ /*select MU STA table*/ -+ beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10)); -+ beamforming_info->reg_mu_tx_ctrl |= (p_beamformee_entry->mu_reg_index << 8) & (BIT(8) | BIT(9) | BIT(10)); -+ odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); -+ -+ odm_set_bb_reg(dm, R_0x14c4, MASKDWORD, 0); /*Reset gid_valid table*/ -+ odm_set_bb_reg(dm, R_0x14c8, MASKDWORD, user_position_l); -+ odm_set_bb_reg(dm, R_0x14cc, MASKDWORD, user_position_h); -+ -+ /*set validity of MU STAs*/ -+ beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0; -+ beamforming_info->reg_mu_tx_ctrl |= beamforming_info->beamformee_mu_reg_maping & 0x3F; -+ odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "@%s, reg_mu_tx_ctrl = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", -+ __func__, beamforming_info->reg_mu_tx_ctrl, -+ user_position_l, user_position_h); -+ -+ value16 = odm_read_2byte(dm, mu_reg[p_beamformee_entry->mu_reg_index]); -+ value16 &= 0xFE00; /*@Clear PAID*/ -+ value16 |= BIT(9); /*@Enable MU BFee*/ -+ value16 |= p_beamformee_entry->p_aid; -+ odm_write_2byte(dm, mu_reg[p_beamformee_entry->mu_reg_index], value16); -+ -+ /* @0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */ -+ u1b_tmp = odm_read_1byte(dm, REG_TXBF_CTRL_8822B + 3); -+ u1b_tmp |= 0xD0; /* Set bit 28, 30, 31 to 3b'111*/ -+ odm_write_1byte(dm, REG_TXBF_CTRL_8822B + 3, u1b_tmp); -+ /* Set NDPA to 6M*/ -+ odm_write_1byte(dm, REG_NDPA_RATE_8822B, 0x4); -+ -+ u1b_tmp = odm_read_1byte(dm, REG_NDPA_OPT_CTRL_8822B); -+ u1b_tmp &= 0xFC; /* @Clear bit 0, 1*/ -+ odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8822B, u1b_tmp); -+ -+ u4b_tmp = odm_read_4byte(dm, REG_SND_PTCL_CTRL_8822B); -+ u4b_tmp = ((u4b_tmp & 0xFF0000FF) | 0x020200); /* Set [23:8] to 0x0202*/ -+ odm_write_4byte(dm, REG_SND_PTCL_CTRL_8822B, u4b_tmp); -+ -+ /* Set 0x6A0[14] = 1 to accept action_no_ack */ -+ u1b_tmp = odm_read_1byte(dm, REG_RXFLTMAP0_8822B + 1); -+ u1b_tmp |= 0x40; -+ odm_write_1byte(dm, REG_RXFLTMAP0_8822B + 1, u1b_tmp); -+ /* @End of MAC registers setting */ -+ -+ hal_txbf_8822b_rf_mode(dm, beamforming_info, bfee_idx); -+#if (SUPPORT_MU_BF == 1) -+ /*Special for plugfest*/ -+ delay_ms(50); /* wait for 4-way handshake ending*/ -+ send_sw_vht_gid_mgnt_frame(dm, p_beamformee_entry->mac_addr, bfee_idx); -+#endif -+ -+ phydm_beamforming_notify(dm); -+#if 1 -+ { -+ u32 ctrl_info_offset, index; -+ /*Set Ctrl Info*/ -+ odm_write_2byte(dm, 0x140, 0x660); -+ ctrl_info_offset = 0x8000 + 32 * p_beamformee_entry->mac_id; -+ /*Reset Ctrl Info*/ -+ for (index = 0; index < 8; index++) -+ odm_write_4byte(dm, ctrl_info_offset + index * 4, 0); -+ -+ odm_write_4byte(dm, ctrl_info_offset, (p_beamformee_entry->mu_reg_index + 1) << 16); -+ odm_write_1byte(dm, 0x81, 0x80); /*RPTBUF ready*/ -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "@%s, mac_id = %d, ctrl_info_offset = 0x%x, mu_reg_index = %x\n", -+ __func__, p_beamformee_entry->mac_id, -+ ctrl_info_offset, -+ p_beamformee_entry->mu_reg_index); -+ } -+#endif -+ } -+} -+ -+void hal_txbf_8822b_leave( -+ void *dm_void, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMER_ENTRY *beamformer_entry; -+ struct _RT_BEAMFORMEE_ENTRY *p_beamformee_entry; -+ u32 mu_reg[6] = {0x1684, 0x1686, 0x1688, 0x168a, 0x168c, 0x168e}; -+ -+ if (idx < BEAMFORMER_ENTRY_NUM) { -+ beamformer_entry = &beamforming_info->beamformer_entry[idx]; -+ p_beamformee_entry = &beamforming_info->beamformee_entry[idx]; -+ } else -+ return; -+ -+ /*@Clear P_AID of Beamformee*/ -+ /*@Clear MAC address of Beamformer*/ -+ /*@Clear Associated Bfmee Sel*/ -+ -+ if (beamformer_entry->beamform_entry_cap == BEAMFORMING_CAP_NONE) { -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8822B, 0xD8); -+ if (beamformer_entry->is_mu_ap == 0) { /*SU BFer */ -+ if (beamformer_entry->su_reg_index == 0) { -+ odm_write_4byte(dm, REG_ASSOCIATED_BFMER0_INFO_8822B, 0); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMER0_INFO_8822B + 4, 0); -+ odm_write_2byte(dm, REG_TX_CSI_RPT_PARAM_BW20_8822B, 0); -+ } else { -+ odm_write_4byte(dm, REG_ASSOCIATED_BFMER1_INFO_8822B, 0); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMER1_INFO_8822B + 4, 0); -+ odm_write_2byte(dm, REG_TX_CSI_RPT_PARAM_BW20_8822B + 2, 0); -+ } -+ beamforming_info->beamformer_su_reg_maping &= ~(BIT(beamformer_entry->su_reg_index)); -+ beamformer_entry->su_reg_index = 0xFF; -+ } else { /*@MU BFer */ -+ /*set validity of MU STA0 and MU STA1*/ -+ beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0; -+ odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); -+ -+ odm_memory_set(dm, beamformer_entry->gid_valid, 0, 8); -+ odm_memory_set(dm, beamformer_entry->user_position, 0, 16); -+ beamformer_entry->is_mu_ap = false; -+ } -+ } -+ -+ if (p_beamformee_entry->beamform_entry_cap == BEAMFORMING_CAP_NONE) { -+ hal_txbf_8822b_rf_mode(dm, beamforming_info, idx); -+ if (p_beamformee_entry->is_mu_sta == 0) { /*SU BFee*/ -+ if (p_beamformee_entry->su_reg_index == 0) { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8822B, 0x0); -+ odm_write_1byte(dm, REG_TXBF_CTRL_8822B + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8822B + 3) | BIT(4) | BIT(6) | BIT(7)); -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B, 0); -+ } else { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8822B + 2, 0x0 | BIT(14) | BIT(15) | BIT(12)); -+ -+ odm_write_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2, -+ odm_read_2byte(dm, REG_ASSOCIATED_BFMEE_SEL_8822B + 2) & 0x60); -+ } -+ beamforming_info->beamformee_su_reg_maping &= ~(BIT(p_beamformee_entry->su_reg_index)); -+ p_beamformee_entry->su_reg_index = 0xFF; -+ } else { /*@MU BFee */ -+ /*@Disable sending NDPA & BF-rpt-poll to this BFee*/ -+ odm_write_2byte(dm, mu_reg[p_beamformee_entry->mu_reg_index], 0); -+ /*set validity of MU STA*/ -+ beamforming_info->reg_mu_tx_ctrl &= ~(BIT(p_beamformee_entry->mu_reg_index)); -+ odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); -+ -+ p_beamformee_entry->is_mu_sta = false; -+ beamforming_info->beamformee_mu_reg_maping &= ~(BIT(p_beamformee_entry->mu_reg_index)); -+ p_beamformee_entry->mu_reg_index = 0xFF; -+ } -+ } -+} -+ -+/***********SU & MU BFee Entry Only when souding done****************/ -+void hal_txbf_8822b_status( -+ void *dm_void, -+ u8 beamform_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 beam_ctrl_val, tmp_val; -+ u32 beam_ctrl_reg; -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry; -+ boolean is_mu_sounding = beamforming_info->is_mu_sounding, is_bitmap_ready = false; -+ u16 bitmap; -+ u8 idx, gid, i; -+ u8 id1, id0; -+ u32 gid_valid[6] = {0}; -+ u32 value32; -+ boolean is_sounding_success[6] = {false}; -+ -+ if (beamform_idx < BEAMFORMEE_ENTRY_NUM) -+ beamform_entry = &beamforming_info->beamformee_entry[beamform_idx]; -+ else -+ return; -+ -+ /*SU sounding done */ -+ if (is_mu_sounding == false) { -+ if (phydm_acting_determine(dm, phydm_acting_as_ibss)) -+ beam_ctrl_val = beamform_entry->mac_id; -+ else -+ beam_ctrl_val = beamform_entry->p_aid; -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "@%s, beamform_entry.beamform_entry_state = %d", -+ __func__, beamform_entry->beamform_entry_state); -+ -+ if (beamform_entry->su_reg_index == 0) -+ beam_ctrl_reg = REG_TXBF_CTRL_8822B; -+ else { -+ beam_ctrl_reg = REG_TXBF_CTRL_8822B + 2; -+ beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15); -+ } -+ -+ if (beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (beamform_entry->sound_bw == CHANNEL_WIDTH_20) -+ beam_ctrl_val |= BIT(9); -+ else if (beamform_entry->sound_bw == CHANNEL_WIDTH_40) -+ beam_ctrl_val |= (BIT(9) | BIT(10)); -+ else if (beamform_entry->sound_bw == CHANNEL_WIDTH_80) -+ beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11)); -+ } else { -+ PHYDM_DBG(dm, DBG_TXBF, "@%s, Don't apply Vmatrix", -+ __func__); -+ beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11)); -+ } -+ -+ odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val); -+ /*@disable NDP packet use beamforming */ -+ tmp_val = odm_read_2byte(dm, REG_TXBF_CTRL_8822B); -+ odm_write_2byte(dm, REG_TXBF_CTRL_8822B, tmp_val | BIT(15)); -+ } else { -+ PHYDM_DBG(dm, DBG_TXBF, "@%s, MU Sounding Done\n", __func__); -+ /*@MU sounding done */ -+ if (1) { /* @(beamform_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { */ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "@%s, BEAMFORMING_ENTRY_STATE_PROGRESSED\n", -+ __func__); -+ -+ value32 = odm_get_bb_reg(dm, R_0x1684, MASKDWORD); -+ is_sounding_success[0] = (value32 & BIT(10)) ? 1 : 0; -+ is_sounding_success[1] = (value32 & BIT(26)) ? 1 : 0; -+ value32 = odm_get_bb_reg(dm, R_0x1688, MASKDWORD); -+ is_sounding_success[2] = (value32 & BIT(10)) ? 1 : 0; -+ is_sounding_success[3] = (value32 & BIT(26)) ? 1 : 0; -+ value32 = odm_get_bb_reg(dm, R_0x168c, MASKDWORD); -+ is_sounding_success[4] = (value32 & BIT(10)) ? 1 : 0; -+ is_sounding_success[5] = (value32 & BIT(26)) ? 1 : 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "@%s, is_sounding_success STA1:%d, STA2:%d, STA3:%d, STA4:%d, STA5:%d, STA6:%d\n", -+ __func__, is_sounding_success[0], -+ is_sounding_success[1], -+ is_sounding_success[2], -+ is_sounding_success[3], -+ is_sounding_success[4], -+ is_sounding_success[5]); -+ -+ value32 = odm_get_bb_reg(dm, R_0xf4c, 0xFFFF0000); -+ /* odm_set_bb_reg(dm, R_0x19e0, MASKHWORD, 0xFFFF);Let MAC ignore bitmap */ -+ -+ is_bitmap_ready = (boolean)((value32 & BIT(15)) >> 15); -+ bitmap = (u16)(value32 & 0x3FFF); -+ -+ for (idx = 0; idx < 15; idx++) { -+ if (idx < 5) { /*@bit0~4*/ -+ id0 = 0; -+ id1 = (u8)(idx + 1); -+ } else if (idx < 9) { /*@bit5~8*/ -+ id0 = 1; -+ id1 = (u8)(idx - 3); -+ } else if (idx < 12) { /*@bit9~11*/ -+ id0 = 2; -+ id1 = (u8)(idx - 6); -+ } else if (idx < 14) { /*@bit12~13*/ -+ id0 = 3; -+ id1 = (u8)(idx - 8); -+ } else { /*@bit14*/ -+ id0 = 4; -+ id1 = (u8)(idx - 9); -+ } -+ if (bitmap & BIT(idx)) { -+ /*Pair 1*/ -+ gid = (idx << 1) + 1; -+ gid_valid[id0] |= (BIT(gid)); -+ gid_valid[id1] |= (BIT(gid)); -+ /*Pair 2*/ -+ gid += 1; -+ gid_valid[id0] |= (BIT(gid)); -+ gid_valid[id1] |= (BIT(gid)); -+ } else { -+ /*Pair 1*/ -+ gid = (idx << 1) + 1; -+ gid_valid[id0] &= ~(BIT(gid)); -+ gid_valid[id1] &= ~(BIT(gid)); -+ /*Pair 2*/ -+ gid += 1; -+ gid_valid[id0] &= ~(BIT(gid)); -+ gid_valid[id1] &= ~(BIT(gid)); -+ } -+ } -+ -+ for (i = 0; i < BEAMFORMEE_ENTRY_NUM; i++) { -+ beamform_entry = &beamforming_info->beamformee_entry[i]; -+ if (beamform_entry->is_mu_sta && beamform_entry->mu_reg_index < 6) { -+ value32 = gid_valid[beamform_entry->mu_reg_index]; -+ for (idx = 0; idx < 4; idx++) { -+ beamform_entry->gid_valid[idx] = (u8)(value32 & 0xFF); -+ value32 = (value32 >> 8); -+ } -+ } -+ } -+ -+ for (idx = 0; idx < 6; idx++) { -+ beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10)); -+ beamforming_info->reg_mu_tx_ctrl |= ((idx << 8) & (BIT(8) | BIT(9) | BIT(10))); -+ odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); -+ odm_set_mac_reg(dm, R_0x14c4, MASKDWORD, gid_valid[idx]); /*set MU STA gid valid table*/ -+ } -+ -+ /*@Enable TxMU PPDU*/ -+ if (beamforming_info->dbg_disable_mu_tx == false) -+ beamforming_info->reg_mu_tx_ctrl |= BIT(7); -+ else -+ beamforming_info->reg_mu_tx_ctrl &= ~BIT(7); -+ odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); -+ } -+ } -+} -+ -+/*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/ -+void hal_txbf_8822b_config_gtab( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL; -+ u32 gid_valid = 0, user_position_l = 0, user_position_h = 0, i; -+ -+ if (beamforming_info->mu_ap_index < BEAMFORMER_ENTRY_NUM) -+ beamformer_entry = &beamforming_info->beamformer_entry[beamforming_info->mu_ap_index]; -+ else -+ return; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "%s==>\n", __func__); -+ -+ /*@For GID 0~31*/ -+ for (i = 0; i < 4; i++) -+ gid_valid |= (beamformer_entry->gid_valid[i] << (i << 3)); -+ for (i = 0; i < 8; i++) { -+ if (i < 4) -+ user_position_l |= (beamformer_entry->user_position[i] << (i << 3)); -+ else -+ user_position_h |= (beamformer_entry->user_position[i] << ((i - 4) << 3)); -+ } -+ /*select MU STA0 table*/ -+ beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10)); -+ odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); -+ odm_set_bb_reg(dm, R_0x14c4, MASKDWORD, gid_valid); -+ odm_set_bb_reg(dm, R_0x14c8, MASKDWORD, user_position_l); -+ odm_set_bb_reg(dm, R_0x14cc, MASKDWORD, user_position_h); -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s: STA0: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", -+ __func__, gid_valid, user_position_l, user_position_h); -+ -+ gid_valid = 0; -+ user_position_l = 0; -+ user_position_h = 0; -+ -+ /*@For GID 32~64*/ -+ for (i = 4; i < 8; i++) -+ gid_valid |= (beamformer_entry->gid_valid[i] << ((i - 4) << 3)); -+ for (i = 8; i < 16; i++) { -+ if (i < 4) -+ user_position_l |= (beamformer_entry->user_position[i] << ((i - 8) << 3)); -+ else -+ user_position_h |= (beamformer_entry->user_position[i] << ((i - 12) << 3)); -+ } -+ /*select MU STA1 table*/ -+ beamforming_info->reg_mu_tx_ctrl &= ~(BIT(8) | BIT(9) | BIT(10)); -+ beamforming_info->reg_mu_tx_ctrl |= BIT(8); -+ odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); -+ odm_set_bb_reg(dm, R_0x14c4, MASKDWORD, gid_valid); -+ odm_set_bb_reg(dm, R_0x14c8, MASKDWORD, user_position_l); -+ odm_set_bb_reg(dm, R_0x14cc, MASKDWORD, user_position_h); -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "%s: STA1: gid_valid = 0x%x, user_position_l = 0x%x, user_position_h = 0x%x\n", -+ __func__, gid_valid, user_position_l, user_position_h); -+ -+ /* Set validity of MU STA0 and MU STA1*/ -+ beamforming_info->reg_mu_tx_ctrl &= 0xFFFFFFC0; -+ beamforming_info->reg_mu_tx_ctrl |= 0x3; /* STA0, STA1*/ -+ odm_write_4byte(dm, 0x14c0, beamforming_info->reg_mu_tx_ctrl); -+} -+ -+#if 0 -+/*This function translate the bitmap to GTAB*/ -+void -+haltxbf8822b_gtab_translation( -+ struct dm_struct *dm -+) -+{ -+ u8 idx, gid; -+ u8 id1, id0; -+ u32 gid_valid[6] = {0}; -+ u32 user_position_lsb[6] = {0}; -+ u32 user_position_msb[6] = {0}; -+ -+ for (idx = 0; idx < 15; idx++) { -+ if (idx < 5) {/*@bit0~4*/ -+ id0 = 0; -+ id1 = (u8)(idx + 1); -+ } else if (idx < 9) { /*@bit5~8*/ -+ id0 = 1; -+ id1 = (u8)(idx - 3); -+ } else if (idx < 12) { /*@bit9~11*/ -+ id0 = 2; -+ id1 = (u8)(idx - 6); -+ } else if (idx < 14) { /*@bit12~13*/ -+ id0 = 3; -+ id1 = (u8)(idx - 8); -+ } else { /*@bit14*/ -+ id0 = 4; -+ id1 = (u8)(idx - 9); -+ } -+ -+ /*Pair 1*/ -+ gid = (idx << 1) + 1; -+ gid_valid[id0] |= (1 << gid); -+ gid_valid[id1] |= (1 << gid); -+ if (gid < 16) { -+ /*user_position_lsb[id0] |= (0 << (gid << 1));*/ -+ user_position_lsb[id1] |= (1 << (gid << 1)); -+ } else { -+ /*user_position_msb[id0] |= (0 << ((gid - 16) << 1));*/ -+ user_position_msb[id1] |= (1 << ((gid - 16) << 1)); -+ } -+ -+ /*Pair 2*/ -+ gid += 1; -+ gid_valid[id0] |= (1 << gid); -+ gid_valid[id1] |= (1 << gid); -+ if (gid < 16) { -+ user_position_lsb[id0] |= (1 << (gid << 1)); -+ /*user_position_lsb[id1] |= (0 << (gid << 1));*/ -+ } else { -+ user_position_msb[id0] |= (1 << ((gid - 16) << 1)); -+ /*user_position_msb[id1] |= (0 << ((gid - 16) << 1));*/ -+ } -+ } -+ -+ -+ for (idx = 0; idx < 6; idx++) { -+ /*@dbg_print("gid_valid[%d] = 0x%x\n", idx, gid_valid[idx]); -+ dbg_print("user_position[%d] = 0x%x %x\n", idx, user_position_msb[idx], user_position_lsb[idx]);*/ -+ } -+} -+#endif -+ -+void hal_txbf_8822b_fw_txbf( -+ void *dm_void, -+ u8 idx) -+{ -+#if 0 -+ struct _RT_BEAMFORMING_INFO *beam_info = GET_BEAMFORM_INFO(adapter); -+ struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; -+ -+ if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ hal_txbf_8822b_download_ndpa(adapter, idx); -+ -+ hal_txbf_8822b_fw_txbf_cmd(adapter); -+#endif -+} -+ -+#endif -+ -+#if (defined(CONFIG_BB_TXBF_API)) -+/*this function is only used for BFer*/ -+void phydm_8822btxbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i; -+ -+ if (dm->rf_type == RF_1T1R) -+ return; -+ -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ for (i = RF_PATH_A; i <= RF_PATH_B; i++) { -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), 0x1); /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 3); /*Select RX mode*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff, 0x00036); /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, 0x5AFCE); /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), 0x0); /*RF mode table write disable*/ -+ } -+ } -+ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(30), 1); /*@if Nsts > Nc, don't apply V matrix*/ -+ -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ /*@for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2); /*@enable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1); /*@ignore user since 8822B only 2Tx*/ -+ -+ /*Nsts = 2 AB*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433); -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); -+ -+ } else { -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x0); /*@enable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 0); /*@ignore user since 8822B only 2Tx*/ -+ -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /*@1SS by path-A*/ -+ odm_set_bb_reg(dm, REG_BB_TX_PATH_SEL_2_8822B, MASKLWORD, 0x430); /*@2SS by path-A,B*/ -+ } -+} -+ -+/*this function is for BFer bug workaround*/ -+void phydm_8822b_sutxbfer_workaroud(void *dm_void, boolean enable_su_bfer, -+ u8 nc, u8 nr, u8 ng, u8 CB, u8 BW, -+ boolean is_vht) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (enable_su_bfer) { -+ odm_set_bb_reg(dm, R_0x19f8, BIT(22) | BIT(21) | BIT(20), 0x1); -+ odm_set_bb_reg(dm, R_0x19f8, BIT(25) | BIT(24) | BIT(23), 0x0); -+ odm_set_bb_reg(dm, R_0x19f8, BIT(16), 0x1); -+ -+ if (is_vht) -+ odm_set_bb_reg(dm, R_0x19f0, BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0x1f); -+ else -+ odm_set_bb_reg(dm, R_0x19f0, BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0), 0x22); -+ -+ odm_set_bb_reg(dm, R_0x19f0, BIT(7) | BIT(6), nc); -+ odm_set_bb_reg(dm, R_0x19f0, BIT(9) | BIT(8), nr); -+ odm_set_bb_reg(dm, R_0x19f0, BIT(11) | BIT(10), ng); -+ odm_set_bb_reg(dm, R_0x19f0, BIT(13) | BIT(12), CB); -+ -+ odm_set_bb_reg(dm, R_0xb58, BIT(3) | BIT(2), BW); -+ odm_set_bb_reg(dm, R_0xb58, BIT(7) | BIT(6) | BIT(5) | BIT(4), 0x0); -+ odm_set_bb_reg(dm, R_0xb58, BIT(9) | BIT(8), BW); -+ odm_set_bb_reg(dm, R_0xb58, BIT(13) | BIT(12) | BIT(11) | BIT(10), 0x0); -+ } else { -+ odm_set_bb_reg(dm, R_0x19f8, BIT(16), 0x0); -+ } -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] enable_su_bfer = %d, is_vht = %d\n", -+ __func__, enable_su_bfer, is_vht); -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] nc = %d, nr = %d, ng = %d, CB = %d, BW = %d\n", -+ __func__, nc, nr, ng, CB, BW); -+} -+#endif -+#endif /* @(RTL8822B_SUPPORT == 1)*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8822b.h b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8822b.h -new file mode 100644 -index 000000000000..552fba2a7a27 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbf8822b.h -@@ -0,0 +1,78 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#ifndef __HAL_TXBF_8822B_H__ -+#define __HAL_TXBF_8822B_H__ -+ -+#if (RTL8822B_SUPPORT == 1) -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ -+void hal_txbf_8822b_enter( -+ void *dm_void, -+ u8 idx); -+ -+void hal_txbf_8822b_leave( -+ void *dm_void, -+ u8 idx); -+ -+void hal_txbf_8822b_status( -+ void *dm_void, -+ u8 beamform_idx); -+ -+void hal_txbf_8822b_config_gtab( -+ void *dm_void); -+ -+void hal_txbf_8822b_fw_txbf( -+ void *dm_void, -+ u8 idx); -+#else -+#define hal_txbf_8822b_enter(dm_void, idx) -+#define hal_txbf_8822b_leave(dm_void, idx) -+#define hal_txbf_8822b_status(dm_void, idx) -+#define hal_txbf_8822b_fw_txbf(dm_void, idx) -+#define hal_txbf_8822b_config_gtab(dm_void) -+ -+#endif -+ -+#if (defined(CONFIG_BB_TXBF_API)) -+void phydm_8822btxbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt); -+ -+void phydm_8822b_sutxbfer_workaroud(void *dm_void, boolean enable_su_bfer, -+ u8 nc, u8 nr, u8 ng, u8 CB, u8 BW, -+ boolean is_vht); -+ -+#else -+#define phydm_8822btxbf_rfmode(dm_void, su_bfee_cnt, mu_bfee_cnt) -+#define phydm_8822b_sutxbfer_workaroud(dm_void, enable_su_bfer, nc, nr, ng, CB, BW, is_vht) -+#endif -+ -+#else -+#define hal_txbf_8822b_enter(dm_void, idx) -+#define hal_txbf_8822b_leave(dm_void, idx) -+#define hal_txbf_8822b_status(dm_void, idx) -+#define hal_txbf_8822b_fw_txbf(dm_void, idx) -+#define hal_txbf_8822b_config_gtab(dm_void) -+ -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfinterface.c b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfinterface.c -new file mode 100644 -index 000000000000..c125fecadc6a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfinterface.c -@@ -0,0 +1,1484 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/************************************************************* -+ * Description: -+ * -+ * This file is for TXBF interface mechanism -+ * -+ ************************************************************/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+void beamforming_gid_paid( -+ void *adapter, -+ PRT_TCB tcb) -+{ -+ u8 RA[6] = {0}; -+ u8 *p_header = GET_FRAME_OF_FIRST_FRAG(adapter, tcb); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ -+ if (((PADAPTER)adapter)->HardwareType < HARDWARE_TYPE_RTL8192EE) -+ return; -+ else if (IS_WIRELESS_MODE_N((PADAPTER)adapter) == false) -+ return; -+ -+#if (SUPPORT_MU_BF == 1) -+ if (tcb->tx_bf_pkt_type == RT_BF_PKT_TYPE_BROADCAST_NDPA) { /* @MU NDPA */ -+#else -+ if (0) { -+#endif -+ /* @Fill G_ID and P_AID */ -+ tcb->G_ID = 63; -+ if (beam_info->first_mu_bfee_index < BEAMFORMEE_ENTRY_NUM) { -+ tcb->P_AID = beam_info->beamformee_entry[beam_info->first_mu_bfee_index].p_aid; -+ RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, tcb->G_ID, tcb->P_AID)); -+ } -+ } else { -+ GET_80211_HDR_ADDRESS1(p_header, &RA); -+ -+ /* VHT SU PPDU carrying one or more group addressed MPDUs or */ -+ /* Transmitting a VHT NDP intended for multiple recipients */ -+ if (MacAddr_isBcst(RA) || MacAddr_isMulticast(RA) || tcb->macId == MAC_ID_STATIC_FOR_BROADCAST_MULTICAST) { -+ tcb->G_ID = 63; -+ tcb->P_AID = 0; -+ } else if (ACTING_AS_AP(adapter)) { -+ u16 AID = (u16)(MacIdGetOwnerAssociatedClientAID(adapter, tcb->macId) & 0x1ff); /*@AID[0:8]*/ -+ -+ /*RT_DISP(FBEAM, FBEAM_FUN, ("@%s tcb->mac_id=0x%X, AID=0x%X\n", __func__, tcb->mac_id, AID));*/ -+ tcb->G_ID = 63; -+ -+ if (AID == 0) /*@A PPDU sent by an AP to a non associated STA*/ -+ tcb->P_AID = 0; -+ else { /*Sent by an AP and addressed to a STA associated with that AP*/ -+ u16 BSSID = 0; -+ GET_80211_HDR_ADDRESS2(p_header, &RA); -+ BSSID = ((RA[5] & 0xf0) >> 4) ^ (RA[5] & 0xf); /*@BSSID[44:47] xor BSSID[40:43]*/ -+ tcb->P_AID = (AID + BSSID * 32) & 0x1ff; /*@(dec(A) + dec(B)*32) mod 512*/ -+ } -+ } else if (ACTING_AS_IBSS(((PADAPTER)adapter))) { -+ tcb->G_ID = 63; -+ /*P_AID for infrasturcture mode; MACID for ad-hoc mode. */ -+ tcb->P_AID = tcb->macId; -+ } else if (MgntLinkStatusQuery(adapter)) { /*@Addressed to AP*/ -+ tcb->G_ID = 0; -+ GET_80211_HDR_ADDRESS1(p_header, &RA); -+ tcb->P_AID = RA[5]; /*RA[39:47]*/ -+ tcb->P_AID = (tcb->P_AID << 1) | (RA[4] >> 7); -+ } else { -+ tcb->G_ID = 63; -+ tcb->P_AID = 0; -+ } -+ /*RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, tcb->G_ID, tcb->P_AID));*/ -+ } -+} -+ -+enum rt_status -+beamforming_get_report_frame( -+ void *adapter, -+ PRT_RFD rfd, -+ POCTET_STRING p_pdu_os) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; -+ u8 *p_mimo_ctrl_field, p_csi_matrix; -+ u8 idx, nc, nr, CH_W; -+ u16 csi_matrix_len = 0; -+ -+ ACT_PKT_TYPE pkt_type = ACT_PKT_TYPE_UNKNOWN; -+ -+ /* @Memory comparison to see if CSI report is the same with previous one */ -+ beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, Frame_Addr2(*p_pdu_os), &idx); -+ -+ if (beamform_entry == NULL) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s: Cannot find entry by addr\n", -+ __func__); -+ return RT_STATUS_FAILURE; -+ } -+ -+ pkt_type = PacketGetActionFrameType(p_pdu_os); -+ -+ /* @-@ Modified by David */ -+ if (pkt_type == ACT_PKT_VHT_COMPRESSED_BEAMFORMING) { -+ p_mimo_ctrl_field = p_pdu_os->Octet + 26; -+ nc = ((*p_mimo_ctrl_field) & 0x7) + 1; -+ nr = (((*p_mimo_ctrl_field) & 0x38) >> 3) + 1; -+ CH_W = (((*p_mimo_ctrl_field) & 0xC0) >> 6); -+ /*p_csi_matrix = p_mimo_ctrl_field + 3 + nc;*/ /* 24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */ -+ csi_matrix_len = p_pdu_os->Length - 26 - 3 - nc; -+ } else if (pkt_type == ACT_PKT_HT_COMPRESSED_BEAMFORMING) { -+ p_mimo_ctrl_field = p_pdu_os->Octet + 26; -+ nc = ((*p_mimo_ctrl_field) & 0x3) + 1; -+ nr = (((*p_mimo_ctrl_field) & 0xC) >> 2) + 1; -+ CH_W = (((*p_mimo_ctrl_field) & 0x10) >> 4); -+ /*p_csi_matrix = p_mimo_ctrl_field + 6 + nr;*/ /* 24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */ -+ csi_matrix_len = p_pdu_os->Length - 26 - 6 - nr; -+ } else -+ return RT_STATUS_SUCCESS; -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] idx=%d, pkt type=%d, nc=%d, nr=%d, CH_W=%d\n", __func__, -+ idx, pkt_type, nc, nr, CH_W); -+ -+ return RT_STATUS_SUCCESS; -+} -+ -+void construct_ht_ndpa_packet( -+ // 2017/11 MH PHYDM compile. But why need to use windows maco? -+ // For all linux code, it should be useless? -+ //void *adapter = dm->adapter; -+ ADAPTER * adapter, -+ //void *adapter, -+ u8 *RA, -+ u8 *buffer, -+ u32 *p_length, -+ enum channel_width BW) -+{ -+ u16 duration = 0; -+ PMGNT_INFO mgnt_info = &(((PADAPTER)adapter)->MgntInfo); -+ //PMGNT_INFO mgnt_info = &((MGNT_INFO)(((PADAPTER)adapter)->MgntInfo)); -+ OCTET_STRING p_ndpa_frame, action_content; -+ u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; -+ -+ PlatformZeroMemory(buffer, 32); -+ -+ SET_80211_HDR_FRAME_CONTROL(buffer, 0); -+ -+ SET_80211_HDR_ORDER(buffer, 1); -+ SET_80211_HDR_TYPE_AND_SUBTYPE(buffer, Type_Action_No_Ack); -+ -+ SET_80211_HDR_ADDRESS1(buffer, RA); -+ SET_80211_HDR_ADDRESS2(buffer, ((PADAPTER)adapter)->CurrentAddress); -+ SET_80211_HDR_ADDRESS3(buffer, ((PMGNT_INFO)mgnt_info)->Bssid); -+ -+ duration = 2 * a_SifsTime + 40; -+ -+ if (BW == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ -+ SET_80211_HDR_DURATION(buffer, duration); -+ -+ /* @HT control field */ -+ SET_HT_CTRL_CSI_STEERING(buffer + sMacHdrLng, 3); -+ SET_HT_CTRL_NDP_ANNOUNCEMENT(buffer + sMacHdrLng, 1); -+ -+ FillOctetString(p_ndpa_frame, buffer, sMacHdrLng + sHTCLng); -+ -+ FillOctetString(action_content, action_hdr, 4); -+ PacketAppendData(&p_ndpa_frame, action_content); -+ -+ *p_length = 32; -+} -+ -+boolean -+send_fw_ht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ enum channel_width BW) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ PRT_TCB tcb; -+ PRT_TX_LOCAL_BUFFER p_buf; -+ boolean ret = true; -+ u32 buf_len; -+ u8 *buf_addr; -+ u8 desc_len = 0, idx = 0, ndp_tx_rate; -+ void *p_def_adapter = GetDefaultAdapter(((PADAPTER)adapter)); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (beamform_entry == NULL) -+ return false; -+ -+ ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, -+ ndp_tx_rate); -+ PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetFWBuffer(p_def_adapter, &tcb, &p_buf)) { -+#if (DEV_BUS_TYPE != RT_PCI_INTERFACE) -+ desc_len = ((PADAPTER)adapter)->HWDescHeadLength - hal_data->USBALLDummyLength; -+#endif -+ buf_addr = p_buf->Buffer.VirtualAddress + desc_len; -+ -+ construct_ht_ndpa_packet( -+ adapter, -+ RA, -+ buf_addr, -+ &buf_len, -+ BW); -+ -+ tcb->PacketLength = buf_len + desc_len; -+ -+ tcb->bTxEnableSwCalcDur = true; -+ -+ tcb->BWOfPacket = BW; -+ -+ if (ACTING_AS_IBSS(((PADAPTER)adapter)) || ACTING_AS_AP(((PADAPTER)adapter))) -+ tcb->G_ID = 63; -+ -+ tcb->P_AID = beamform_entry->p_aid; -+ tcb->DataRate = ndp_tx_rate; /*rate of NDP decide by nr*/ -+ -+ ((PADAPTER)adapter)->HalFunc.CmdSendPacketHandler(((PADAPTER)adapter), tcb, p_buf, tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false); -+ } else -+ ret = false; -+ -+ PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength); -+ -+ return ret; -+} -+ -+boolean -+send_sw_ht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ enum channel_width BW) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ PRT_TCB tcb; -+ PRT_TX_LOCAL_BUFFER p_buf; -+ boolean ret = true; -+ u8 idx = 0, ndp_tx_rate = 0; -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, -+ ndp_tx_rate); -+ -+ PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetBuffer(adapter, &tcb, &p_buf)) { -+ construct_ht_ndpa_packet( -+ adapter, -+ RA, -+ p_buf->Buffer.VirtualAddress, -+ &tcb->PacketLength, -+ BW); -+ -+ tcb->bTxEnableSwCalcDur = true; -+ -+ tcb->BWOfPacket = BW; -+ -+ MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate); -+ } else -+ ret = false; -+ -+ PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength); -+ -+ return ret; -+} -+ -+void construct_vht_ndpa_packet( -+ struct dm_struct *dm, -+ u8 *RA, -+ u16 AID, -+ u8 *buffer, -+ u32 *p_length, -+ enum channel_width BW) -+{ -+ u16 duration = 0; -+ u8 sequence = 0; -+ u8 *p_ndpa_frame = buffer; -+ struct _RT_NDPA_STA_INFO sta_info; -+ // 2017/11 MH PHYDM compile. But why need to use windows maco? -+ // For all linux code, it should be useless? -+ //void *adapter = dm->adapter; -+ ADAPTER * adapter = (PADAPTER)(dm->adapter); -+ u8 idx = 0; -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ /* @Frame control. */ -+ SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0); -+ SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA); -+ -+ SET_80211_HDR_ADDRESS1(p_ndpa_frame, RA); -+ SET_80211_HDR_ADDRESS2(p_ndpa_frame, beamform_entry->my_mac_addr); -+ -+ // 2017/11 MH PHYDM compile. But why need to use windows maco? -+ // For all linux code, it should be useless? -+ duration = 2 * a_SifsTime + 44; -+ -+ if (BW == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if (BW == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ -+ SET_80211_HDR_DURATION(p_ndpa_frame, duration); -+ -+ sequence = *(dm->sounding_seq) << 2; -+ odm_move_memory(dm, p_ndpa_frame + 16, &sequence, 1); -+ -+ if (phydm_acting_determine(dm, phydm_acting_as_ibss) || phydm_acting_determine(dm, phydm_acting_as_ap) == false) -+ AID = 0; -+ -+ sta_info.aid = AID; -+ sta_info.feedback_type = 0; -+ sta_info.nc_index = 0; -+ -+ odm_move_memory(dm, p_ndpa_frame + 17, (u8 *)&sta_info, 2); -+ -+ *p_length = 19; -+} -+ -+boolean -+send_fw_vht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ u16 AID, -+ enum channel_width BW) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ PRT_TCB tcb; -+ PRT_TX_LOCAL_BUFFER p_buf; -+ boolean ret = true; -+ u32 buf_len; -+ u8 *buf_addr; -+ u8 desc_len = 0, idx = 0, ndp_tx_rate = 0; -+ void *p_def_adapter = GetDefaultAdapter(((PADAPTER)adapter)); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (beamform_entry == NULL) -+ return false; -+ -+ ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, -+ ndp_tx_rate); -+ -+ PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetFWBuffer(p_def_adapter, &tcb, &p_buf)) { -+#if (DEV_BUS_TYPE != RT_PCI_INTERFACE) -+ desc_len = ((PADAPTER)adapter)->HWDescHeadLength - hal_data->USBALLDummyLength; -+#endif -+ buf_addr = p_buf->Buffer.VirtualAddress + desc_len; -+ -+ construct_vht_ndpa_packet( -+ dm, -+ RA, -+ AID, -+ buf_addr, -+ &buf_len, -+ BW); -+ -+ tcb->PacketLength = buf_len + desc_len; -+ -+ tcb->bTxEnableSwCalcDur = true; -+ -+ tcb->BWOfPacket = BW; -+ -+ if (phydm_acting_determine(dm, phydm_acting_as_ibss) || phydm_acting_determine(dm, phydm_acting_as_ap)) -+ tcb->G_ID = 63; -+ -+ tcb->P_AID = beamform_entry->p_aid; -+ tcb->DataRate = ndp_tx_rate; /*@decide by nr*/ -+ -+ ((PADAPTER)adapter)->HalFunc.CmdSendPacketHandler(adapter, tcb, p_buf, tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false); -+ } else -+ ret = false; -+ -+ PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] End, ret=%d\n", __func__, ret); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength); -+ -+ return ret; -+} -+ -+boolean -+send_sw_vht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ u16 AID, -+ enum channel_width BW) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ void *adapter = dm->adapter; -+ PRT_TCB tcb; -+ PRT_TX_LOCAL_BUFFER p_buf; -+ boolean ret = true; -+ u8 idx = 0, ndp_tx_rate = 0; -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ -+ ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, -+ ndp_tx_rate); -+ -+ PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetBuffer(adapter, &tcb, &p_buf)) { -+ construct_vht_ndpa_packet( -+ dm, -+ RA, -+ AID, -+ p_buf->Buffer.VirtualAddress, -+ &tcb->PacketLength, -+ BW); -+ -+ tcb->bTxEnableSwCalcDur = true; -+ tcb->BWOfPacket = BW; -+ -+ /*rate of NDP decide by nr*/ -+ MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate); -+ } else -+ ret = false; -+ -+ PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength); -+ -+ return ret; -+} -+ -+#ifdef SUPPORT_MU_BF -+#if (SUPPORT_MU_BF == 1) -+/*@ -+ * Description: On VHT GID management frame by an MU beamformee. -+ * -+ * 2015.05.20. Created by tynli. -+ */ -+enum rt_status -+beamforming_get_vht_gid_mgnt_frame( -+ void *adapter, -+ PRT_RFD rfd, -+ POCTET_STRING p_pdu_os) -+{ -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); -+ struct dm_struct *dm = &hal_data->DM_OutSrc; -+ enum rt_status rt_status = RT_STATUS_SUCCESS; -+ u8 *p_buffer = NULL; -+ u8 *p_raddr = NULL; -+ u8 mem_status[8] = {0}, user_pos[16] = {0}; -+ u8 idx; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ struct _RT_BEAMFORMER_ENTRY *beamform_entry = &beam_info->beamformer_entry[beam_info->mu_ap_index]; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] On VHT GID mgnt frame!\n", __func__); -+ -+ /* @Check length*/ -+ if (p_pdu_os->length < (FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY + 16)) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s: Invalid length (%d)\n", __func__, -+ p_pdu_os->length); -+ return RT_STATUS_INVALID_LENGTH; -+ } -+ -+ /* @Check RA*/ -+ p_raddr = (u8 *)(p_pdu_os->Octet) + 4; -+ if (!eq_mac_addr(p_raddr, adapter->CurrentAddress)) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s: Drop because of RA error.\n", -+ __func__); -+ return RT_STATUS_PKT_DROP; -+ } -+ -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "On VHT GID Mgnt Frame ==>:\n", p_pdu_os->Octet, p_pdu_os->length); -+ -+ /*Parsing Membership status array*/ -+ p_buffer = p_pdu_os->Octet + FRAME_OFFSET_VHT_GID_MGNT_MEMBERSHIP_STATUS_ARRAY; -+ for (idx = 0; idx < 8; idx++) { -+ mem_status[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(p_buffer + idx); -+ beamform_entry->gid_valid[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(p_buffer + idx); -+ } -+ -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "mem_status: ", mem_status, 8); -+ -+ /* Parsing User Position array*/ -+ p_buffer = p_pdu_os->Octet + FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY; -+ for (idx = 0; idx < 16; idx++) { -+ user_pos[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(p_buffer + idx); -+ beamform_entry->user_position[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(p_buffer + idx); -+ } -+ -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "user_pos: ", user_pos, 16); -+ -+ /* @Group ID detail printed*/ -+ { -+ u8 i, j; -+ u8 tmp_val; -+ u16 tmp_val2; -+ -+ for (i = 0; i < 8; i++) { -+ tmp_val = mem_status[i]; -+ tmp_val2 = ((user_pos[i * 2 + 1] << 8) & 0xFF00) + (user_pos[i * 2] & 0xFF); -+ for (j = 0; j < 8; j++) { -+ if ((tmp_val >> j) & BIT(0)) { -+ PHYDM_DBG(dm, DBG_TXBF, "Use Group ID (%d), User Position (%d)\n", -+ (i * 8 + j), (tmp_val2 >> 2 * j) & 0x3); -+ } -+ } -+ } -+ } -+ -+ /* @Indicate GID frame to IHV service. */ -+ { -+ u8 indibuffer[24] = {0}; -+ u8 indioffset = 0; -+ -+ PlatformMoveMemory(indibuffer + indioffset, beamform_entry->gid_valid, 8); -+ indioffset += 8; -+ PlatformMoveMemory(indibuffer + indioffset, beamform_entry->user_position, 16); -+ indioffset += 16; -+ -+ PlatformIndicateCustomStatus( -+ adapter, -+ RT_CUSTOM_EVENT_VHT_RECV_GID_MGNT_FRAME, -+ RT_CUSTOM_INDI_TARGET_IHV, -+ indibuffer, -+ indioffset); -+ } -+ -+ /* @Config HW GID table */ -+ hal_com_txbf_config_gtab(dm); -+ -+ return rt_status; -+} -+ -+/*@ -+ * Description: Construct VHT Group ID (GID) management frame. -+ * -+ * 2015.05.20. Created by tynli. -+ */ -+void construct_vht_gid_mgnt_frame( -+ struct dm_struct *dm, -+ u8 *RA, -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry, -+ u8 *buffer, -+ u32 *p_length -+ -+ ) -+{ -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ void *adapter = beam_info->source_adapter; -+ OCTET_STRING os_ftm_frame, tmp; -+ -+ FillOctetString(os_ftm_frame, buffer, 0); -+ *p_length = 0; -+ -+ ConstructMaFrameHdr( -+ adapter, -+ RA, -+ ACT_CAT_VHT, -+ ACT_VHT_GROUPID_MANAGEMENT, -+ &os_ftm_frame); -+ -+ /* @Membership status array*/ -+ FillOctetString(tmp, beamform_entry->gid_valid, 8); -+ PacketAppendData(&os_ftm_frame, tmp); -+ -+ /* User Position array*/ -+ FillOctetString(tmp, beamform_entry->user_position, 16); -+ PacketAppendData(&os_ftm_frame, tmp); -+ -+ *p_length = os_ftm_frame.length; -+ -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "construct_vht_gid_mgnt_frame():\n", buffer, *p_length); -+} -+ -+boolean -+send_sw_vht_gid_mgnt_frame( -+ void *dm_void, -+ u8 *RA, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ PRT_TCB tcb; -+ PRT_TX_LOCAL_BUFFER p_buf; -+ boolean ret = true; -+ u8 data_rate = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = &beam_info->beamformee_entry[idx]; -+ void *adapter = beam_info->source_adapter; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetBuffer(adapter, &tcb, &p_buf)) { -+ construct_vht_gid_mgnt_frame( -+ dm, -+ RA, -+ beamform_entry, -+ p_buf->Buffer.VirtualAddress, -+ &tcb->PacketLength); -+ -+ tcb->bw_of_packet = CHANNEL_WIDTH_20; -+ data_rate = MGN_6M; -+ MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, data_rate); -+ } else -+ ret = false; -+ -+ PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength); -+ -+ return ret; -+} -+ -+/*@ -+ * Description: Construct VHT beamforming report poll. -+ * -+ * 2015.05.20. Created by tynli. -+ */ -+void construct_vht_bf_report_poll( -+ struct dm_struct *dm, -+ u8 *RA, -+ u8 *buffer, -+ u32 *p_length) -+{ -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ void *adapter = beam_info->source_adapter; -+ u8 *p_bf_rpt_poll = buffer; -+ -+ /* @Frame control*/ -+ SET_80211_HDR_FRAME_CONTROL(p_bf_rpt_poll, 0); -+ SET_80211_HDR_TYPE_AND_SUBTYPE(p_bf_rpt_poll, Type_Beamforming_Report_Poll); -+ -+ /* @duration*/ -+ SET_80211_HDR_DURATION(p_bf_rpt_poll, 100); -+ -+ /* RA*/ -+ SET_VHT_BF_REPORT_POLL_RA(p_bf_rpt_poll, RA); -+ -+ /* TA*/ -+ SET_VHT_BF_REPORT_POLL_TA(p_bf_rpt_poll, adapter->CurrentAddress); -+ -+ /* @Feedback Segment Retransmission Bitmap*/ -+ SET_VHT_BF_REPORT_POLL_FEEDBACK_SEG_RETRAN_BITMAP(p_bf_rpt_poll, 0xFF); -+ -+ *p_length = 17; -+ -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "construct_vht_bf_report_poll():\n", buffer, *p_length); -+} -+ -+boolean -+send_sw_vht_bf_report_poll( -+ void *dm_void, -+ u8 *RA, -+ boolean is_final_poll) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ PRT_TCB tcb; -+ PRT_TX_LOCAL_BUFFER p_buf; -+ boolean ret = true; -+ u8 idx = 0, data_rate = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ void *adapter = beam_info->source_adapter; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetBuffer(adapter, &tcb, &p_buf)) { -+ construct_vht_bf_report_poll( -+ dm, -+ RA, -+ p_buf->Buffer.VirtualAddress, -+ &tcb->PacketLength); -+ -+ tcb->bTxEnableSwCalcDur = true; /* @ need?*/ -+ tcb->BWOfPacket = CHANNEL_WIDTH_20; -+ -+ if (is_final_poll) -+ tcb->TxBFPktType = RT_BF_PKT_TYPE_FINAL_BF_REPORT_POLL; -+ else -+ tcb->TxBFPktType = RT_BF_PKT_TYPE_BF_REPORT_POLL; -+ -+ data_rate = MGN_6M; /* @Legacy OFDM rate*/ -+ MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, data_rate); -+ } else -+ ret = false; -+ -+ PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "send_sw_vht_bf_report_poll:\n", -+ p_buf->Buffer.VirtualAddress, tcb->PacketLength); -+ -+ return ret; -+} -+ -+/*@ -+ * Description: Construct VHT MU NDPA packet. -+ * We should combine this function with construct_vht_ndpa_packet() in the future. -+ * -+ * 2015.05.21. Created by tynli. -+ */ -+void construct_vht_mu_ndpa_packet( -+ struct dm_struct *dm, -+ enum channel_width BW, -+ u8 *buffer, -+ u32 *p_length) -+{ -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ void *adapter = beam_info->source_adapter; -+ u16 duration = 0; -+ u8 sequence = 0; -+ u8 *p_ndpa_frame = buffer; -+ struct _RT_NDPA_STA_INFO sta_info; -+ u8 idx; -+ u8 dest_addr[6] = {0}; -+ struct _RT_BEAMFORMEE_ENTRY *entry = NULL; -+ -+ /* @Fill the first MU BFee entry (STA1) MAC addr to destination address then -+ HW will change A1 to broadcast addr. 2015.05.28. Suggested by SD1 Chunchu. */ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ entry = &(beam_info->beamformee_entry[idx]); -+ if (entry->is_mu_sta) { -+ cp_mac_addr(dest_addr, entry->mac_addr); -+ break; -+ } -+ } -+ if (entry == NULL) -+ return; -+ -+ /* @Frame control.*/ -+ SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0); -+ SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA); -+ -+ SET_80211_HDR_ADDRESS1(p_ndpa_frame, dest_addr); -+ SET_80211_HDR_ADDRESS2(p_ndpa_frame, entry->my_mac_addr); -+ -+ /*@--------------------------------------------*/ -+ /* @ Need to modify "duration" to MU consideration. */ -+ duration = 2 * a_SifsTime + 44; -+ -+ if (BW == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if (BW == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ /*@--------------------------------------------*/ -+ -+ SET_80211_HDR_DURATION(p_ndpa_frame, duration); -+ -+ sequence = *(dm->sounding_seq) << 2; -+ odm_move_memory(dm, p_ndpa_frame + 16, &sequence, 1); -+ -+ *p_length = 17; -+ -+ /* @Construct STA info. for multiple STAs*/ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ entry = &(beam_info->beamformee_entry[idx]); -+ if (entry->is_mu_sta) { -+ sta_info.aid = entry->AID; -+ sta_info.feedback_type = 1; /* @1'b1: MU*/ -+ sta_info.nc_index = 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] Get beamformee_entry idx(%d), AID =%d\n", -+ __func__, idx, entry->AID); -+ -+ odm_move_memory(dm, p_ndpa_frame + (*p_length), (u8 *)&sta_info, 2); -+ *p_length += 2; -+ } -+ } -+} -+ -+boolean -+send_sw_vht_mu_ndpa_packet( -+ void *dm_void, -+ enum channel_width BW) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ PRT_TCB tcb; -+ PRT_TX_LOCAL_BUFFER p_buf; -+ boolean ret = true; -+ u8 ndp_tx_rate = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ void *adapter = beam_info->source_adapter; -+ -+ ndp_tx_rate = MGN_VHT2SS_MCS0; -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, -+ ndp_tx_rate); -+ -+ PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetBuffer(adapter, &tcb, &p_buf)) { -+ construct_vht_mu_ndpa_packet( -+ dm, -+ BW, -+ p_buf->Buffer.VirtualAddress, -+ &tcb->PacketLength); -+ -+ tcb->bTxEnableSwCalcDur = true; -+ tcb->BWOfPacket = BW; -+ tcb->TxBFPktType = RT_BF_PKT_TYPE_BROADCAST_NDPA; -+ -+ /*rate of NDP decide by nr*/ -+ MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate); -+ } else -+ ret = false; -+ -+ PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength); -+ -+ return ret; -+} -+ -+void dbg_construct_vht_mundpa_packet( -+ struct dm_struct *dm, -+ enum channel_width BW, -+ u8 *buffer, -+ u32 *p_length) -+{ -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ void *adapter = beam_info->source_adapter; -+ u16 duration = 0; -+ u8 sequence = 0; -+ u8 *p_ndpa_frame = buffer; -+ struct _RT_NDPA_STA_INFO sta_info; -+ u8 idx; -+ u8 dest_addr[6] = {0}; -+ struct _RT_BEAMFORMEE_ENTRY *entry = NULL; -+ -+ boolean is_STA1 = false; -+ -+ /* @Fill the first MU BFee entry (STA1) MAC addr to destination address then -+ HW will change A1 to broadcast addr. 2015.05.28. Suggested by SD1 Chunchu. */ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ entry = &(beam_info->beamformee_entry[idx]); -+ if (entry->is_mu_sta) { -+ if (is_STA1 == false) { -+ is_STA1 = true; -+ continue; -+ } else { -+ cp_mac_addr(dest_addr, entry->mac_addr); -+ break; -+ } -+ } -+ } -+ -+ /* @Frame control.*/ -+ SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0); -+ SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA); -+ -+ SET_80211_HDR_ADDRESS1(p_ndpa_frame, dest_addr); -+ SET_80211_HDR_ADDRESS2(p_ndpa_frame, dm->CurrentAddress); -+ -+ /*@--------------------------------------------*/ -+ /* @ Need to modify "duration" to MU consideration. */ -+ duration = 2 * a_SifsTime + 44; -+ -+ if (BW == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if (BW == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ /*@--------------------------------------------*/ -+ -+ SET_80211_HDR_DURATION(p_ndpa_frame, duration); -+ -+ sequence = *(dm->sounding_seq) << 2; -+ odm_move_memory(dm, p_ndpa_frame + 16, &sequence, 1); -+ -+ *p_length = 17; -+ -+ /*STA2's STA Info*/ -+ sta_info.aid = entry->aid; -+ sta_info.feedback_type = 1; /* @1'b1: MU */ -+ sta_info.nc_index = 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Get beamformee_entry idx(%d), AID =%d\n", -+ __func__, idx, entry->aid); -+ -+ odm_move_memory(dm, p_ndpa_frame + (*p_length), (u8 *)&sta_info, 2); -+ *p_length += 2; -+} -+ -+boolean -+dbg_send_sw_vht_mundpa_packet( -+ void *dm_void, -+ enum channel_width BW) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ PRT_TCB tcb; -+ PRT_TX_LOCAL_BUFFER p_buf; -+ boolean ret = true; -+ u8 ndp_tx_rate = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ void *adapter = beam_info->source_adapter; -+ -+ ndp_tx_rate = MGN_VHT2SS_MCS0; -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, -+ ndp_tx_rate); -+ -+ PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (MgntGetBuffer(adapter, &tcb, &p_buf)) { -+ dbg_construct_vht_mundpa_packet( -+ dm, -+ BW, -+ p_buf->Buffer.VirtualAddress, -+ &tcb->PacketLength); -+ -+ tcb->bTxEnableSwCalcDur = true; -+ tcb->BWOfPacket = BW; -+ tcb->TxBFPktType = RT_BF_PKT_TYPE_UNICAST_NDPA; -+ -+ /*rate of NDP decide by nr*/ -+ MgntSendPacket(adapter, tcb, p_buf, tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate); -+ } else -+ ret = false; -+ -+ PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK); -+ -+ if (ret) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, tcb->PacketLength); -+ -+ return ret; -+} -+ -+#endif /*@#if (SUPPORT_MU_BF == 1)*/ -+#endif /*@#ifdef SUPPORT_MU_BF*/ -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+u32 beamforming_get_report_frame( -+ void *dm_void, -+ union recv_frame *precv_frame) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u32 ret = _SUCCESS; -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = NULL; -+ u8 *pframe = precv_frame->u.hdr.rx_data; -+ u32 frame_len = precv_frame->u.hdr.len; -+ u8 *TA; -+ u8 idx, offset; -+ -+ /*@Memory comparison to see if CSI report is the same with previous one*/ -+ TA = get_addr2_ptr(pframe); -+ beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, TA, &idx); -+ if (beamform_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) -+ offset = 31; /*@24+(1+1+3)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(nc=2)*/ -+ else if (beamform_entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT) -+ offset = 34; /*@24+(1+1+6)+2 MAC header+(Category+ActionCode+MIMOControlField)+SNR(nc=2)*/ -+ else -+ return ret; -+ -+ return ret; -+} -+ -+boolean -+send_fw_ht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ enum channel_width BW) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ADAPTER *adapter = dm->adapter; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; -+ u8 *pframe; -+ u16 *fctrl; -+ u16 duration = 0; -+ u8 a_sifs_time = 0, ndp_tx_rate = 0, idx = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", -+ __func__); -+ return false; -+ } -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(adapter, pattrib); -+ -+ pattrib->qsel = QSLT_BEACON; -+ ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, -+ ndp_tx_rate); -+ pattrib->rate = ndp_tx_rate; -+ pattrib->bwmode = BW; -+ pattrib->order = 1; -+ pattrib->subtype = WIFI_ACTION_NOACK; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ set_order_bit(pframe); -+ set_frame_sub_type(pframe, WIFI_ACTION_NOACK); -+ -+ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, beamform_entry->my_mac_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ if (pmlmeext->cur_wireless_mode == WIRELESS_11B) -+ a_sifs_time = 10; -+ else -+ a_sifs_time = 16; -+ -+ duration = 2 * a_sifs_time + 40; -+ -+ if (BW == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ -+ set_duration(pframe, duration); -+ -+ /* @HT control field */ -+ SET_HT_CTRL_CSI_STEERING(pframe + 24, 3); -+ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe + 24, 1); -+ -+ _rtw_memcpy(pframe + 28, action_hdr, 4); -+ -+ pattrib->pktlen = 32; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(adapter, pmgntframe); -+ -+ return true; -+} -+ -+boolean -+send_sw_ht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ enum channel_width BW) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ADAPTER *adapter = dm->adapter; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c}; -+ u8 *pframe; -+ u16 *fctrl; -+ u16 duration = 0; -+ u8 a_sifs_time = 0, ndp_tx_rate = 0, idx = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ -+ ndp_tx_rate = beamforming_get_htndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", -+ __func__); -+ return false; -+ } -+ -+ /*update attribute*/ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(adapter, pattrib); -+ pattrib->qsel = QSLT_MGNT; -+ pattrib->rate = ndp_tx_rate; -+ pattrib->bwmode = BW; -+ pattrib->order = 1; -+ pattrib->subtype = WIFI_ACTION_NOACK; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ set_order_bit(pframe); -+ set_frame_sub_type(pframe, WIFI_ACTION_NOACK); -+ -+ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, beamform_entry->my_mac_addr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ if (pmlmeext->cur_wireless_mode == WIRELESS_11B) -+ a_sifs_time = 10; -+ else -+ a_sifs_time = 16; -+ -+ duration = 2 * a_sifs_time + 40; -+ -+ if (BW == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ -+ set_duration(pframe, duration); -+ -+ /*@HT control field*/ -+ SET_HT_CTRL_CSI_STEERING(pframe + 24, 3); -+ SET_HT_CTRL_NDP_ANNOUNCEMENT(pframe + 24, 1); -+ -+ _rtw_memcpy(pframe + 28, action_hdr, 4); -+ -+ pattrib->pktlen = 32; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(adapter, pmgntframe); -+ -+ return true; -+} -+ -+boolean -+send_fw_vht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ u16 AID, -+ enum channel_width BW) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ADAPTER *adapter = dm->adapter; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ u8 *pframe; -+ u16 *fctrl; -+ u16 duration = 0; -+ u8 sequence = 0, a_sifs_time = 0, ndp_tx_rate = 0, idx = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ struct _RT_NDPA_STA_INFO sta_info; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", -+ __func__); -+ return false; -+ } -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ _rtw_memcpy(pattrib->ra, RA, ETH_ALEN); -+ update_mgntframe_attrib(adapter, pattrib); -+ -+ pattrib->qsel = QSLT_BEACON; -+ ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, -+ ndp_tx_rate); -+ pattrib->rate = ndp_tx_rate; -+ pattrib->bwmode = BW; -+ pattrib->subtype = WIFI_NDPA; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ set_frame_sub_type(pframe, WIFI_NDPA); -+ -+ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, beamform_entry->my_mac_addr, ETH_ALEN); -+ -+ if (is_supported_5g(pmlmeext->cur_wireless_mode) || is_supported_ht(pmlmeext->cur_wireless_mode)) -+ a_sifs_time = 16; -+ else -+ a_sifs_time = 10; -+ -+ duration = 2 * a_sifs_time + 44; -+ -+ if (BW == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if (BW == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ -+ set_duration(pframe, duration); -+ -+ sequence = beam_info->sounding_sequence << 2; -+ if (beam_info->sounding_sequence >= 0x3f) -+ beam_info->sounding_sequence = 0; -+ else -+ beam_info->sounding_sequence++; -+ -+ _rtw_memcpy(pframe + 16, &sequence, 1); -+ -+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) -+ AID = 0; -+ -+ sta_info.aid = AID; -+ sta_info.feedback_type = 0; -+ sta_info.nc_index = 0; -+ -+ _rtw_memcpy(pframe + 17, (u8 *)&sta_info, 2); -+ -+ pattrib->pktlen = 19; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(adapter, pmgntframe); -+ -+ return true; -+} -+ -+boolean -+send_sw_vht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ u16 AID, -+ enum channel_width BW) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _ADAPTER *adapter = dm->adapter; -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ struct _RT_NDPA_STA_INFO ndpa_sta_info; -+ u8 ndp_tx_rate = 0, sequence = 0, a_sifs_time = 0, idx = 0; -+ u8 *pframe; -+ u16 *fctrl; -+ u16 duration = 0; -+ struct _RT_BEAMFORMING_INFO *beam_info = &(dm->beamforming_info); -+ struct _RT_BEAMFORMEE_ENTRY *beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(dm, RA, &idx); -+ -+ ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(dm, beamform_entry->comp_steering_num_of_bfer); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ndp_tx_rate =%d\n", __func__, -+ ndp_tx_rate); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ -+ if (pmgntframe == NULL) { -+ PHYDM_DBG(dm, DBG_TXBF, "%s, alloc mgnt frame fail\n", -+ __func__); -+ return false; -+ } -+ -+ /*update attribute*/ -+ pattrib = &pmgntframe->attrib; -+ _rtw_memcpy(pattrib->ra, RA, ETH_ALEN); -+ update_mgntframe_attrib(adapter, pattrib); -+ pattrib->qsel = QSLT_MGNT; -+ pattrib->rate = ndp_tx_rate; -+ pattrib->bwmode = BW; -+ pattrib->subtype = WIFI_NDPA; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &pwlanhdr->frame_ctl; -+ *(fctrl) = 0; -+ -+ set_frame_sub_type(pframe, WIFI_NDPA); -+ -+ _rtw_memcpy(pwlanhdr->addr1, RA, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, beamform_entry->my_mac_addr, ETH_ALEN); -+ -+ if (is_supported_5g(pmlmeext->cur_wireless_mode) || is_supported_ht(pmlmeext->cur_wireless_mode)) -+ a_sifs_time = 16; -+ else -+ a_sifs_time = 10; -+ -+ duration = 2 * a_sifs_time + 44; -+ -+ if (BW == CHANNEL_WIDTH_80) -+ duration += 40; -+ else if (BW == CHANNEL_WIDTH_40) -+ duration += 87; -+ else -+ duration += 180; -+ -+ set_duration(pframe, duration); -+ -+ sequence = beam_info->sounding_sequence << 2; -+ if (beam_info->sounding_sequence >= 0x3f) -+ beam_info->sounding_sequence = 0; -+ else -+ beam_info->sounding_sequence++; -+ -+ _rtw_memcpy(pframe + 16, &sequence, 1); -+ if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) -+ AID = 0; -+ -+ ndpa_sta_info.aid = AID; -+ ndpa_sta_info.feedback_type = 0; -+ ndpa_sta_info.nc_index = 0; -+ -+ _rtw_memcpy(pframe + 17, (u8 *)&ndpa_sta_info, 2); -+ -+ pattrib->pktlen = 19; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(adapter, pmgntframe); -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] [%d]\n", __func__, __LINE__); -+ -+ return true; -+} -+ -+#endif -+ -+void beamforming_get_ndpa_frame( -+ void *dm_void, -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ OCTET_STRING pdu_os -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ union recv_frame *precv_frame -+#endif -+ ) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 *TA; -+ u8 idx, sequence; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ u8 *p_ndpa_frame = pdu_os.Octet; -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ u8 *p_ndpa_frame = precv_frame->u.hdr.rx_data; -+#endif -+ struct _RT_BEAMFORMER_ENTRY *beamformer_entry = NULL; /*@Modified By Jeffery @2014-10-29*/ -+ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_DISP_DATA(FBEAM, FBEAM_DATA, "beamforming_get_ndpa_frame\n", -+ pdu_os.Octet, pdu_os.Length); -+ if (IsCtrlNDPA(p_ndpa_frame) == false) -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ if (get_frame_sub_type(p_ndpa_frame) != WIFI_NDPA) -+#endif -+ return; -+ else if (!(dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))) { -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] not 8812 or 8821A, return\n", -+ __func__); -+ return; -+ } -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ TA = Frame_Addr2(pdu_os); -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ TA = get_addr2_ptr(p_ndpa_frame); -+#endif -+ /*Remove signaling TA. */ -+ TA[0] = TA[0] & 0xFE; -+ -+ beamformer_entry = phydm_beamforming_get_bfer_entry_by_addr(dm, TA, &idx); /* @Modified By Jeffery @2014-10-29 */ -+ -+ /*@Break options for Clock Reset*/ -+ if (beamformer_entry == NULL) -+ return; -+ else if (!(beamformer_entry->beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU)) -+ return; -+ /*@log_success: As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is NO LONGER needed !2015-04-10, Jeffery*/ -+ /*@clock_reset_times: While BFer entry always doesn't receive our CSI, clock will reset again and again.So clock_reset_times is limited to 5 times.2015-04-13, Jeffery*/ -+ else if ((beamformer_entry->log_success == 1) || (beamformer_entry->clock_reset_times == 5)) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] log_seq=%d, pre_log_seq=%d, log_retry_cnt=%d, log_success=%d, clock_reset_times=%d, clock reset is no longer needed.\n", -+ __func__, beamformer_entry->log_seq, -+ beamformer_entry->pre_log_seq, -+ beamformer_entry->log_retry_cnt, -+ beamformer_entry->log_success, -+ beamformer_entry->clock_reset_times); -+ -+ return; -+ } -+ -+ sequence = (p_ndpa_frame[16]) >> 2; -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] Start, sequence=%d, log_seq=%d, pre_log_seq=%d, log_retry_cnt=%d, clock_reset_times=%d, log_success=%d\n", -+ __func__, sequence, beamformer_entry->log_seq, -+ beamformer_entry->pre_log_seq, -+ beamformer_entry->log_retry_cnt, -+ beamformer_entry->clock_reset_times, -+ beamformer_entry->log_success); -+ -+ if (beamformer_entry->log_seq != 0 && beamformer_entry->pre_log_seq != 0) { -+ /*Success condition*/ -+ if (beamformer_entry->log_seq != sequence && beamformer_entry->pre_log_seq != beamformer_entry->log_seq) { -+ /* @break option for clcok reset, 2015-03-30, Jeffery */ -+ beamformer_entry->log_retry_cnt = 0; -+ /*@As long as 8812A receive NDPA and feedback CSI succeed once, clock reset is no longer needed.*/ -+ /*That is, log_success is NOT needed to be reset to zero, 2015-04-13, Jeffery*/ -+ beamformer_entry->log_success = 1; -+ -+ } else { /*@Fail condition*/ -+ -+ if (beamformer_entry->log_retry_cnt == 5) { -+ beamformer_entry->clock_reset_times++; -+ beamformer_entry->log_retry_cnt = 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] Clock Reset!!! clock_reset_times=%d\n", -+ __func__, -+ beamformer_entry->clock_reset_times); -+ hal_com_txbf_set(dm, TXBF_SET_SOUNDING_CLK, NULL); -+ -+ } else -+ beamformer_entry->log_retry_cnt++; -+ } -+ } -+ -+ /*Update log_seq & pre_log_seq*/ -+ beamformer_entry->pre_log_seq = beamformer_entry->log_seq; -+ beamformer_entry->log_seq = sequence; -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfinterface.h b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfinterface.h -new file mode 100644 -index 000000000000..b97aa349e702 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfinterface.h -@@ -0,0 +1,167 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#ifndef __HAL_TXBF_INTERFACE_H__ -+#define __HAL_TXBF_INTERFACE_H__ -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ -+#define a_SifsTime ((IS_WIRELESS_MODE_5G(adapter) || IS_WIRELESS_MODE_N_24G(adapter)) ? 16 : 10) -+ -+void beamforming_gid_paid( -+ void *adapter, -+ PRT_TCB tcb); -+ -+enum rt_status -+beamforming_get_report_frame( -+ void *adapter, -+ PRT_RFD rfd, -+ POCTET_STRING p_pdu_os); -+ -+void beamforming_get_ndpa_frame( -+ void *dm_void, -+ OCTET_STRING pdu_os); -+ -+boolean -+send_fw_ht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ enum channel_width BW); -+ -+boolean -+send_fw_vht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ u16 AID, -+ enum channel_width BW); -+ -+boolean -+send_sw_vht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ u16 AID, -+ enum channel_width BW); -+ -+boolean -+send_sw_ht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ enum channel_width BW); -+ -+#if (SUPPORT_MU_BF == 1) -+enum rt_status -+beamforming_get_vht_gid_mgnt_frame( -+ void *adapter, -+ PRT_RFD rfd, -+ POCTET_STRING p_pdu_os); -+ -+boolean -+send_sw_vht_gid_mgnt_frame( -+ void *dm_void, -+ u8 *RA, -+ u8 idx); -+ -+boolean -+send_sw_vht_bf_report_poll( -+ void *dm_void, -+ u8 *RA, -+ boolean is_final_poll); -+ -+boolean -+send_sw_vht_mu_ndpa_packet( -+ void *dm_void, -+ enum channel_width BW); -+#else -+#define beamforming_get_vht_gid_mgnt_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE -+#define send_sw_vht_gid_mgnt_frame(dm_void, RA) -+#define send_sw_vht_bf_report_poll(dm_void, RA, is_final_poll) -+#define send_sw_vht_mu_ndpa_packet(dm_void, BW) -+#endif -+ -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ -+u32 beamforming_get_report_frame( -+ void *dm_void, -+ union recv_frame *precv_frame); -+ -+boolean -+send_fw_ht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ enum channel_width BW); -+ -+boolean -+send_sw_ht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ enum channel_width BW); -+ -+boolean -+send_fw_vht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ u16 AID, -+ enum channel_width BW); -+ -+boolean -+send_sw_vht_ndpa_packet( -+ void *dm_void, -+ u8 *RA, -+ u16 AID, -+ enum channel_width BW); -+#endif -+ -+void beamforming_get_ndpa_frame( -+ void *dm_void, -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ OCTET_STRING pdu_os -+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -+ union recv_frame *precv_frame -+#endif -+ ); -+ -+boolean -+dbg_send_sw_vht_mundpa_packet( -+ void *dm_void, -+ enum channel_width BW); -+ -+#else -+#define beamforming_get_ndpa_frame(dm, _pdu_os) -+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -+#define beamforming_get_report_frame(adapter, precv_frame) RT_STATUS_FAILURE -+#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+#define beamforming_get_report_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE -+#define beamforming_get_vht_gid_mgnt_frame(adapter, rfd, p_pdu_os) RT_STATUS_FAILURE -+#endif -+#define send_fw_ht_ndpa_packet(dm_void, RA, BW) -+#define send_sw_ht_ndpa_packet(dm_void, RA, BW) -+#define send_fw_vht_ndpa_packet(dm_void, RA, AID, BW) -+#define send_sw_vht_ndpa_packet(dm_void, RA, AID, BW) -+#define send_sw_vht_gid_mgnt_frame(dm_void, RA, idx) -+#define send_sw_vht_bf_report_poll(dm_void, RA, is_final_poll) -+#define send_sw_vht_mu_ndpa_packet(dm_void, BW) -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfjaguar.c b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfjaguar.c -new file mode 100644 -index 000000000000..6f1892837ada ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfjaguar.c -@@ -0,0 +1,509 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/************************************************************* -+ * Description: -+ * -+ * This file is for 8812/8821/8811 TXBF mechanism -+ * -+ ************************************************************/ -+#include "mp_precomp.h" -+#include "../phydm_precomp.h" -+ -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -+void hal_txbf_8812a_set_ndpa_rate( -+ void *dm_void, -+ u8 BW, -+ u8 rate) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ odm_write_1byte(dm, REG_NDPA_OPT_CTRL_8812A, (rate << 2 | BW)); -+} -+ -+void hal_txbf_jaguar_rf_mode( -+ void *dm_void, -+ struct _RT_BEAMFORMING_INFO *beam_info) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ if (dm->rf_type == RF_1T1R) -+ return; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] set TxIQGen\n", __func__); -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x1); /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x1); /*RF mode table write enable*/ -+ -+ if (beam_info->beamformee_su_cnt > 0) { -+ /* Paath_A */ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0x78000, 0x3); /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0xE26BF); /*@Enable TXIQGEN in RX mode*/ -+ /* Path_B */ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0x78000, 0x3); /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0xE26BF); /*@Enable TXIQGEN in RX mode*/ -+ } else { -+ /* Paath_A */ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0x78000, 0x3); /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, 0xC26BF); /*@Disable TXIQGEN in RX mode*/ -+ /* Path_B */ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0x78000, 0x3); /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, 0xC26BF); /*@Disable TXIQGEN in RX mode*/ -+ } -+ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, 0x80000, 0x0); /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, 0x80000, 0x0); /*RF mode table write disable*/ -+ -+ if (beam_info->beamformee_su_cnt > 0) -+ odm_set_bb_reg(dm, R_0x80c, MASKBYTE1, 0x33); -+ else -+ odm_set_bb_reg(dm, R_0x80c, MASKBYTE1, 0x11); -+} -+ -+void hal_txbf_jaguar_download_ndpa( -+ void *dm_void, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 u1b_tmp = 0, tmp_reg422 = 0, head_page; -+ u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0; -+ boolean is_send_beacon = false; -+ u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*@default reseved 1 page for the IC type which is undefined.*/ -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; -+ void *adapter = dm->adapter; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ *dm->is_fw_dw_rsvd_page_in_progress = true; -+#endif -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ /* if (idx == 0) head_page = 0xFE; */ -+ /* else head_page = 0xFE;*/ -+ head_page = 0xFE; -+ -+ phydm_get_hal_def_var_handler_interface(dm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy); -+ -+ /*Set REG_CR bit 8. DMA beacon by SW.*/ -+ u1b_tmp = odm_read_1byte(dm, REG_CR_8812A + 1); -+ odm_write_1byte(dm, REG_CR_8812A + 1, (u1b_tmp | BIT(0))); -+ -+ /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/ -+ tmp_reg422 = odm_read_1byte(dm, REG_FWHW_TXQ_CTRL_8812A + 2); -+ odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422 & (~BIT(6))); -+ -+ if (tmp_reg422 & BIT(6)) { -+ PHYDM_DBG(dm, DBG_TXBF, -+ "SetBeamformDownloadNDPA_8812(): There is an adapter is sending beacon.\n"); -+ is_send_beacon = true; -+ } -+ -+ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ -+ odm_write_1byte(dm, REG_TDECTRL_8812A + 1, head_page); -+ -+ do { -+ /*@Clear beacon valid check bit.*/ -+ bcn_valid_reg = odm_read_1byte(dm, REG_TDECTRL_8812A + 2); -+ odm_write_1byte(dm, REG_TDECTRL_8812A + 2, (bcn_valid_reg | BIT(0))); -+ -+ /*@download NDPA rsvd page.*/ -+ if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU) -+ beamforming_send_vht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->aid, p_beam_entry->sound_bw, BEACON_QUEUE); -+ else -+ beamforming_send_ht_ndpa_packet(dm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE); -+ -+ /*@check rsvd page download OK.*/ -+ bcn_valid_reg = odm_read_1byte(dm, REG_TDECTRL_8812A + 2); -+ count = 0; -+ while (!(bcn_valid_reg & BIT(0)) && count < 20) { -+ count++; -+ ODM_delay_ms(10); -+ bcn_valid_reg = odm_read_1byte(dm, REG_TDECTRL_8812A + 2); -+ } -+ dl_bcn_count++; -+ } while (!(bcn_valid_reg & BIT(0)) && dl_bcn_count < 5); -+ -+ if (!(bcn_valid_reg & BIT(0))) -+ PHYDM_DBG(dm, DBG_TXBF, "%s Download RSVD page failed!\n", -+ __func__); -+ -+ /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/ -+ odm_write_1byte(dm, REG_TDECTRL_8812A + 1, tx_page_bndy); -+ -+ /*To make sure that if there exists an adapter which would like to send beacon.*/ -+ /*@If exists, the origianl value of 0x422[6] will be 1, we should check this to*/ -+ /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/ -+ /*the beacon cannot be sent by HW.*/ -+ /*@2010.06.23. Added by tynli.*/ -+ if (is_send_beacon) -+ odm_write_1byte(dm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422); -+ -+ /*@Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/ -+ /*@Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/ -+ u1b_tmp = odm_read_1byte(dm, REG_CR_8812A + 1); -+ odm_write_1byte(dm, REG_CR_8812A + 1, (u1b_tmp & (~BIT(0)))); -+ -+ p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ *dm->is_fw_dw_rsvd_page_in_progress = false; -+#endif -+} -+ -+void hal_txbf_jaguar_fw_txbf_cmd( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 idx, period0 = 0, period1 = 0; -+ u8 PageNum0 = 0xFF, PageNum1 = 0xFF; -+ u8 u1_tx_bf_parm[3] = {0}; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) { -+ /*@Modified by David*/ -+ if (beam_info->beamformee_entry[idx].is_used && beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) { -+ if (idx == 0) { -+ if (beam_info->beamformee_entry[idx].is_sound) -+ PageNum0 = 0xFE; -+ else -+ PageNum0 = 0xFF; /*stop sounding*/ -+ period0 = (u8)(beam_info->beamformee_entry[idx].sound_period); -+ } else if (idx == 1) { -+ if (beam_info->beamformee_entry[idx].is_sound) -+ PageNum1 = 0xFE; -+ else -+ PageNum1 = 0xFF; /*stop sounding*/ -+ period1 = (u8)(beam_info->beamformee_entry[idx].sound_period); -+ } -+ } -+ } -+ -+ u1_tx_bf_parm[0] = PageNum0; -+ u1_tx_bf_parm[1] = PageNum1; -+ u1_tx_bf_parm[2] = (period1 << 4) | period0; -+ odm_fill_h2c_cmd(dm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm); -+ -+ PHYDM_DBG(dm, DBG_TXBF, -+ "[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", -+ __func__, PageNum0, period0, PageNum1, period1); -+} -+ -+void hal_txbf_jaguar_enter( -+ void *dm_void, -+ u8 bfer_bfee_idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i = 0; -+ u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4; -+ u8 bfee_idx = (bfer_bfee_idx & 0xF); -+ u32 csi_param; -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY beamformee_entry; -+ struct _RT_BEAMFORMER_ENTRY beamformer_entry; -+ u16 sta_id = 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s]Start!\n", __func__); -+ -+ hal_txbf_jaguar_rf_mode(dm, beamforming_info); -+ -+ if (dm->rf_type == RF_2T2R) -+ odm_set_bb_reg(dm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x00000000); /*nc =2*/ -+ else -+ odm_set_bb_reg(dm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x01081008); /*nc =1*/ -+ -+ if (beamforming_info->beamformer_su_cnt > 0 && bfer_idx < BEAMFORMER_ENTRY_NUM) { -+ beamformer_entry = beamforming_info->beamformer_entry[bfer_idx]; -+ -+ /*Sounding protocol control*/ -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A, 0xCB); -+ -+ /*@MAC address/Partial AID of Beamformer*/ -+ if (bfer_idx == 0) { -+ for (i = 0; i < 6; i++) -+ odm_write_1byte(dm, (REG_BFMER0_INFO_8812A + i), beamformer_entry.mac_addr[i]); -+ /*@CSI report use legacy ofdm so don't need to fill P_AID. */ -+ /*platform_efio_write_2byte(adapter, REG_BFMER0_INFO_8812A+6, beamform_entry.P_AID); */ -+ } else { -+ for (i = 0; i < 6; i++) -+ odm_write_1byte(dm, (REG_BFMER1_INFO_8812A + i), beamformer_entry.mac_addr[i]); -+ /*@CSI report use legacy ofdm so don't need to fill P_AID.*/ -+ /*platform_efio_write_2byte(adapter, REG_BFMER1_INFO_8812A+6, beamform_entry.P_AID);*/ -+ } -+ -+ /*@CSI report parameters of Beamformee*/ -+ if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU) { -+ if (dm->rf_type == RF_2T2R) -+ csi_param = 0x01090109; -+ else -+ csi_param = 0x01080108; -+ } else { -+ if (dm->rf_type == RF_2T2R) -+ csi_param = 0x03090309; -+ else -+ csi_param = 0x03080308; -+ } -+ -+ odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW20_8812A, csi_param); -+ odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW40_8812A, csi_param); -+ odm_write_4byte(dm, REG_CSI_RPT_PARAM_BW80_8812A, csi_param); -+ -+ /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/ -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A + 3, 0x50); -+ } -+ -+ if (beamforming_info->beamformee_su_cnt > 0 && bfee_idx < BEAMFORMEE_ENTRY_NUM) { -+ beamformee_entry = beamforming_info->beamformee_entry[bfee_idx]; -+ -+ if (phydm_acting_determine(dm, phydm_acting_as_ibss)) -+ sta_id = beamformee_entry.mac_id; -+ else -+ sta_id = beamformee_entry.p_aid; -+ -+ /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/ -+ if (bfee_idx == 0) { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8812A, sta_id); -+ odm_write_1byte(dm, REG_TXBF_CTRL_8812A + 3, odm_read_1byte(dm, REG_TXBF_CTRL_8812A + 3) | BIT(4) | BIT(6) | BIT(7)); -+ } else -+ odm_write_2byte(dm, REG_TXBF_CTRL_8812A + 2, sta_id | BIT(12) | BIT(14) | BIT(15)); -+ -+ /*@CSI report parameters of Beamformee*/ -+ if (bfee_idx == 0) { -+ /*@Get BIT24 & BIT25*/ -+ u8 tmp = odm_read_1byte(dm, REG_BFMEE_SEL_8812A + 3) & 0x3; -+ -+ odm_write_1byte(dm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60); -+ odm_write_2byte(dm, REG_BFMEE_SEL_8812A, sta_id | BIT(9)); -+ } else { -+ /*Set BIT25*/ -+ odm_write_2byte(dm, REG_BFMEE_SEL_8812A + 2, sta_id | 0xE200); -+ } -+ phydm_beamforming_notify(dm); -+ } -+} -+ -+void hal_txbf_jaguar_leave( -+ void *dm_void, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beamforming_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMER_ENTRY beamformer_entry; -+ struct _RT_BEAMFORMEE_ENTRY beamformee_entry; -+ -+ if (idx < BEAMFORMER_ENTRY_NUM) { -+ beamformer_entry = beamforming_info->beamformer_entry[idx]; -+ beamformee_entry = beamforming_info->beamformee_entry[idx]; -+ } else -+ return; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s]Start!, IDx = %d\n", __func__, idx); -+ -+ /*@Clear P_AID of Beamformee*/ -+ /*@Clear MAC address of Beamformer*/ -+ /*@Clear Associated Bfmee Sel*/ -+ -+ if (beamformer_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) { -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A, 0xC8); -+ if (idx == 0) { -+ odm_write_4byte(dm, REG_BFMER0_INFO_8812A, 0); -+ odm_write_2byte(dm, REG_BFMER0_INFO_8812A + 4, 0); -+ odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8812A, 0); -+ odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW40_8812A, 0); -+ odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW80_8812A, 0); -+ } else { -+ odm_write_4byte(dm, REG_BFMER1_INFO_8812A, 0); -+ odm_write_2byte(dm, REG_BFMER1_INFO_8812A + 4, 0); -+ odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW20_8812A, 0); -+ odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW40_8812A, 0); -+ odm_write_2byte(dm, REG_CSI_RPT_PARAM_BW80_8812A, 0); -+ } -+ } -+ -+ if (beamformee_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) { -+ hal_txbf_jaguar_rf_mode(dm, beamforming_info); -+ if (idx == 0) { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8812A, 0x0); -+ odm_write_2byte(dm, REG_BFMEE_SEL_8812A, 0); -+ } else { -+ odm_write_2byte(dm, REG_TXBF_CTRL_8812A + 2, odm_read_2byte(dm, REG_TXBF_CTRL_8812A + 2) & 0xF000); -+ odm_write_2byte(dm, REG_BFMEE_SEL_8812A + 2, odm_read_2byte(dm, REG_BFMEE_SEL_8812A + 2) & 0x60); -+ } -+ } -+} -+ -+void hal_txbf_jaguar_status( -+ void *dm_void, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 beam_ctrl_val; -+ u32 beam_ctrl_reg; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY beamform_entry = beam_info->beamformee_entry[idx]; -+ -+ if (phydm_acting_determine(dm, phydm_acting_as_ibss)) -+ beam_ctrl_val = beamform_entry.mac_id; -+ else -+ beam_ctrl_val = beamform_entry.p_aid; -+ -+ if (idx == 0) -+ beam_ctrl_reg = REG_TXBF_CTRL_8812A; -+ else { -+ beam_ctrl_reg = REG_TXBF_CTRL_8812A + 2; -+ beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15); -+ } -+ -+ if (beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED && beam_info->apply_v_matrix == true) { -+ if (beamform_entry.sound_bw == CHANNEL_WIDTH_20) -+ beam_ctrl_val |= BIT(9); -+ else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40) -+ beam_ctrl_val |= (BIT(9) | BIT(10)); -+ else if (beamform_entry.sound_bw == CHANNEL_WIDTH_80) -+ beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11)); -+ } else -+ beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11)); -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] beam_ctrl_val = 0x%x!\n", __func__, -+ beam_ctrl_val); -+ -+ odm_write_2byte(dm, beam_ctrl_reg, beam_ctrl_val); -+} -+ -+void hal_txbf_jaguar_fw_txbf( -+ void *dm_void, -+ u8 idx) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = beam_info->beamformee_entry + idx; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) -+ hal_txbf_jaguar_download_ndpa(dm, idx); -+ -+ hal_txbf_jaguar_fw_txbf_cmd(dm); -+} -+ -+void hal_txbf_jaguar_patch( -+ void *dm_void, -+ u8 operation) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct _RT_BEAMFORMING_INFO *beam_info = &dm->beamforming_info; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (beam_info->beamform_cap == BEAMFORMING_CAP_NONE) -+ return; -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ if (operation == SCAN_OPT_BACKUP_BAND0) -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A, 0xC8); -+ else if (operation == SCAN_OPT_RESTORE) -+ odm_write_1byte(dm, REG_SND_PTCL_CTRL_8812A, 0xCB); -+#endif -+} -+ -+void hal_txbf_jaguar_clk_8812a( -+ void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u16 u2btmp; -+ u8 count = 0, u1btmp; -+ void *adapter = dm->adapter; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] Start!\n", __func__); -+ -+ if (*dm->is_scan_in_process) { -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] return by Scan\n", __func__); -+ return; -+ } -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ /*Stop PCIe TxDMA*/ -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ odm_write_1byte(dm, REG_PCIE_CTRL_REG_8812A + 1, 0xFE); -+#endif -+ -+/*Stop Usb TxDMA*/ -+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -+ RT_DISABLE_FUNC((PADAPTER)adapter, DF_TX_BIT); -+ PlatformReturnAllPendingTxPackets(adapter); -+#else -+ rtw_write_port_cancel(adapter); -+#endif -+ -+ /*Wait TXFF empty*/ -+ for (count = 0; count < 100; count++) { -+ u2btmp = odm_read_2byte(dm, REG_TXPKT_EMPTY_8812A); -+ u2btmp = u2btmp & 0xfff; -+ if (u2btmp != 0xfff) { -+ ODM_delay_ms(10); -+ continue; -+ } else -+ break; -+ } -+ -+ /*TX pause*/ -+ odm_write_1byte(dm, REG_TXPAUSE_8812A, 0xFF); -+ -+ /*Wait TX state Machine OK*/ -+ for (count = 0; count < 100; count++) { -+ if (odm_read_4byte(dm, REG_SCH_TXCMD_8812A) != 0) -+ continue; -+ else -+ break; -+ } -+ -+ /*Stop RX DMA path*/ -+ u1btmp = odm_read_1byte(dm, REG_RXDMA_CONTROL_8812A); -+ odm_write_1byte(dm, REG_RXDMA_CONTROL_8812A, u1btmp | BIT(2)); -+ -+ for (count = 0; count < 100; count++) { -+ u1btmp = odm_read_1byte(dm, REG_RXDMA_CONTROL_8812A); -+ if (u1btmp & BIT(1)) -+ break; -+ else -+ ODM_delay_ms(10); -+ } -+ -+ /*@Disable clock*/ -+ odm_write_1byte(dm, REG_SYS_CLKR_8812A + 1, 0xf0); -+ /*@Disable 320M*/ -+ odm_write_1byte(dm, REG_AFE_PLL_CTRL_8812A + 3, 0x8); -+ /*@Enable 320M*/ -+ odm_write_1byte(dm, REG_AFE_PLL_CTRL_8812A + 3, 0xa); -+ /*@Enable clock*/ -+ odm_write_1byte(dm, REG_SYS_CLKR_8812A + 1, 0xfc); -+ -+ /*Release Tx pause*/ -+ odm_write_1byte(dm, REG_TXPAUSE_8812A, 0); -+ -+ /*@Enable RX DMA path*/ -+ u1btmp = odm_read_1byte(dm, REG_RXDMA_CONTROL_8812A); -+ odm_write_1byte(dm, REG_RXDMA_CONTROL_8812A, u1btmp & (~BIT(2))); -+#if DEV_BUS_TYPE == RT_PCI_INTERFACE -+ /*@Enable PCIe TxDMA*/ -+ if (dm->support_interface == ODM_ITRF_PCIE) -+ odm_write_1byte(dm, REG_PCIE_CTRL_REG_8812A + 1, 0); -+#endif -+ /*Start Usb TxDMA*/ -+ RT_ENABLE_FUNC((PADAPTER)adapter, DF_TX_BIT); -+} -+ -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfjaguar.h b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfjaguar.h -new file mode 100644 -index 000000000000..2c9a623baf18 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/haltxbfjaguar.h -@@ -0,0 +1,78 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#ifndef __HAL_TXBF_JAGUAR_H__ -+#define __HAL_TXBF_JAGUAR_H__ -+#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1)) -+#ifdef PHYDM_BEAMFORMING_SUPPORT -+ -+void hal_txbf_8812a_set_ndpa_rate( -+ void *dm_void, -+ u8 BW, -+ u8 rate); -+ -+void hal_txbf_jaguar_enter( -+ void *dm_void, -+ u8 idx); -+ -+void hal_txbf_jaguar_leave( -+ void *dm_void, -+ u8 idx); -+ -+void hal_txbf_jaguar_status( -+ void *dm_void, -+ u8 idx); -+ -+void hal_txbf_jaguar_fw_txbf( -+ void *dm_void, -+ u8 idx); -+ -+void hal_txbf_jaguar_patch( -+ void *dm_void, -+ u8 operation); -+ -+void hal_txbf_jaguar_clk_8812a( -+ void *dm_void); -+#else -+ -+#define hal_txbf_8812a_set_ndpa_rate(dm_void, BW, rate) -+#define hal_txbf_jaguar_enter(dm_void, idx) -+#define hal_txbf_jaguar_leave(dm_void, idx) -+#define hal_txbf_jaguar_status(dm_void, idx) -+#define hal_txbf_jaguar_fw_txbf(dm_void, idx) -+#define hal_txbf_jaguar_patch(dm_void, operation) -+#define hal_txbf_jaguar_clk_8812a(dm_void) -+#endif -+#else -+ -+#define hal_txbf_8812a_set_ndpa_rate(dm_void, BW, rate) -+#define hal_txbf_jaguar_enter(dm_void, idx) -+#define hal_txbf_jaguar_leave(dm_void, idx) -+#define hal_txbf_jaguar_status(dm_void, idx) -+#define hal_txbf_jaguar_fw_txbf(dm_void, idx) -+#define hal_txbf_jaguar_patch(dm_void, operation) -+#define hal_txbf_jaguar_clk_8812a(dm_void) -+#endif -+ -+#endif /* @#ifndef __HAL_TXBF_JAGUAR_H__ */ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/phydm_hal_txbf_api.c b/drivers/staging/rtl8723cs/hal/phydm/txbf/phydm_hal_txbf_api.c -new file mode 100644 -index 000000000000..33a7e71ff3f8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/phydm_hal_txbf_api.c -@@ -0,0 +1,759 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include "mp_precomp.h" -+#include "phydm_precomp.h" -+ -+#if (defined(CONFIG_BB_TXBF_API)) -+#if (RTL8822B_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8812F_SUPPORT == 1 ||\ -+ RTL8822C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 || RTL8814B_SUPPORT == 1) -+/*@Add by YuChen for 8822B MU-MIMO API*/ -+ -+/*this function is only used for BFer*/ -+u8 phydm_get_ndpa_rate(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 ndpa_rate = ODM_RATE6M; -+ -+ if (dm->rssi_min >= 30) /*@link RSSI > 30%*/ -+ ndpa_rate = ODM_RATE24M; -+ else if (dm->rssi_min <= 25) -+ ndpa_rate = ODM_RATE6M; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] ndpa_rate = 0x%x\n", __func__, ndpa_rate); -+ -+ return ndpa_rate; -+} -+ -+/*this function is only used for BFer*/ -+u8 phydm_get_beamforming_sounding_info(void *dm_void, u16 *throughput, -+ u8 total_bfee_num, u8 *tx_rate) -+{ -+ u8 idx = 0; -+ u8 snddecision = 0xff; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ for (idx = 0; idx < total_bfee_num; idx++) { -+ if (dm->support_ic_type & (ODM_RTL8814A)) { -+ if ((tx_rate[idx] >= ODM_RATEVHTSS3MCS7 && -+ tx_rate[idx] <= ODM_RATEVHTSS3MCS9)) -+ snddecision = snddecision & ~(1 << idx); -+ } else if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8822C | -+ ODM_RTL8812 | ODM_RTL8192F)) { -+ if ((tx_rate[idx] >= ODM_RATEVHTSS2MCS7 && -+ tx_rate[idx] <= ODM_RATEVHTSS2MCS9)) -+ snddecision = snddecision & ~(1 << idx); -+ } else if (dm->support_ic_type & (ODM_RTL8814B)) { -+ if ((tx_rate[idx] >= ODM_RATEVHTSS4MCS7 && -+ tx_rate[idx] <= ODM_RATEVHTSS4MCS9)) -+ snddecision = snddecision & ~(1 << idx); -+ } -+ } -+ -+ for (idx = 0; idx < total_bfee_num; idx++) { -+ if (throughput[idx] <= 10) -+ snddecision = snddecision & ~(1 << idx); -+ } -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] soundingdecision = 0x%x\n", __func__, -+ snddecision); -+ -+ return snddecision; -+} -+ -+/*this function is only used for BFer*/ -+u8 phydm_get_mu_bfee_snding_decision(void *dm_void, u16 throughput) -+{ -+ u8 snding_score = 0; -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /*throughput unit is Mbps*/ -+ if (throughput >= 500) -+ snding_score = 100; -+ else if (throughput >= 450) -+ snding_score = 90; -+ else if (throughput >= 400) -+ snding_score = 80; -+ else if (throughput >= 350) -+ snding_score = 70; -+ else if (throughput >= 300) -+ snding_score = 60; -+ else if (throughput >= 250) -+ snding_score = 50; -+ else if (throughput >= 200) -+ snding_score = 40; -+ else if (throughput >= 150) -+ snding_score = 30; -+ else if (throughput >= 100) -+ snding_score = 20; -+ else if (throughput >= 50) -+ snding_score = 10; -+ else -+ snding_score = 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[%s] snding_score = 0x%x\n", __func__, -+ snding_score); -+ -+ return snding_score; -+} -+ -+#endif -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+u8 beamforming_get_htndp_tx_rate(void *dm_void, u8 bfer_str_num) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 nr_index = 0; -+ u8 ndp_tx_rate; -+/*@Find nr*/ -+#if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814A) -+ nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), bfer_str_num); -+ else -+ nr_index = tx_bf_nr(1, bfer_str_num); -+ -+ switch (nr_index) { -+ case 1: -+ ndp_tx_rate = ODM_MGN_MCS8; -+ break; -+ -+ case 2: -+ ndp_tx_rate = ODM_MGN_MCS16; -+ break; -+ -+ case 3: -+ ndp_tx_rate = ODM_MGN_MCS24; -+ break; -+ -+ default: -+ ndp_tx_rate = ODM_MGN_MCS8; -+ break; -+ } -+#else -+ ndp_tx_rate = ODM_MGN_MCS8; -+#endif -+ -+ return ndp_tx_rate; -+} -+ -+u8 beamforming_get_vht_ndp_tx_rate(void *dm_void, u8 bfer_str_num) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 nr_index = 0; -+ u8 ndp_tx_rate; -+/*@Find nr*/ -+#if (RTL8814A_SUPPORT == 1) -+ if (dm->support_ic_type & ODM_RTL8814A) -+ nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(dm), bfer_str_num); -+ else -+ nr_index = tx_bf_nr(1, bfer_str_num); -+ -+ switch (nr_index) { -+ case 1: -+ ndp_tx_rate = ODM_MGN_VHT2SS_MCS0; -+ break; -+ -+ case 2: -+ ndp_tx_rate = ODM_MGN_VHT3SS_MCS0; -+ break; -+ -+ case 3: -+ ndp_tx_rate = ODM_MGN_VHT4SS_MCS0; -+ break; -+ -+ default: -+ ndp_tx_rate = ODM_MGN_VHT2SS_MCS0; -+ break; -+ } -+#else -+ ndp_tx_rate = ODM_MGN_VHT2SS_MCS0; -+#endif -+ -+ return ndp_tx_rate; -+} -+#endif -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+/*this function is only used for BFer*/ -+void phydm_txbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i; -+ -+ if (dm->rf_type == RF_1T1R) -+ return; -+#if (RTL8822C_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8822C) { -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ /*Path A ==================*/ -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(19), 0x1); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, 0xF, 3); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3e, 0x3, 0x2); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0xfffff, -+ 0x65AFF); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(19), 0x0); -+ -+ /*Path B ==================*/ -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, BIT(19), 0x1); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x33, 0xF, 3); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x3f, 0xfffff, -+ 0x996BF); -+ /*Select Standby mode*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x33, 0xF, 1); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x3f, 0xfffff, -+ 0x99230); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, BIT(19), 0x0); -+ } -+ -+ /*@if Nsts > Nc, don't apply V matrix*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); -+ -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ /*@enable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); -+ -+ /* logic mapping */ -+ /* TX BF logic map and TX path en for Nsts = 1~2 */ -+ odm_set_bb_reg(dm, R_0x820, 0xff, 0x33); -+ odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x404); -+ odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0x33); -+ odm_set_bb_reg(dm, R_0x1e30, 0xffff, 0x404); -+ } else { -+ /*@Disable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); -+ /*@1SS~2ss A, AB*/ -+ odm_set_bb_reg(dm, R_0x820, 0xff, 0x31); -+ odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x400); -+ } -+ } -+#endif -+#if (RTL8812F_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8812F) { -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ /*Path A ==================*/ -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(19), 0x1); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x33, 0xF, 3); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3e, 0x3, 0x3); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x3f, 0xfffff, -+ 0x61AFE); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(19), 0x0); -+ -+ /*Path B ==================*/ -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, BIT(19), 0x1); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x33, 0xF, 3); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x3f, 0xfffff, -+ 0xD86BF); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, BIT(19), 0x0); -+ } -+ -+ /*@if Nsts > Nc, don't apply V matrix*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); -+ -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ /*@enable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); -+ -+ /* logic mapping */ -+ /* TX BF logic map and TX path en for Nsts = 1~2 */ -+ odm_set_bb_reg(dm, R_0x820, 0xff, 0x33); -+ odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x404); -+ odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0x33); -+ odm_set_bb_reg(dm, R_0x1e30, 0xffff, 0x404); -+ } else { -+ /*@Disable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); -+ /*@1SS~2ss A, AB*/ -+ odm_set_bb_reg(dm, R_0x820, 0xff, 0x31); -+ odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x400); -+ } -+ } -+#endif -+#if (RTL8814B_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8814B) { -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ for (i = RF_PATH_A; i <= RF_PATH_D; i++) { -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, -+ BIT(19), 0x1); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, -+ 0xF, 2); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, -+ 0xfffff, 0x3fc); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, -+ 0xfffff, 0x280f7); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, -+ 0xF, 3); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, -+ 0xfffff, 0x365); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, -+ 0xfffff, 0xafcf7); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, -+ BIT(19), 0x0); -+ } -+ } -+ /*@if Nsts > Nc, don't apply V matrix*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); -+ -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ /*@enable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); -+ -+ /* logic mapping */ -+ /* TX BF logic map and TX path en for Nsts = 1~4 */ -+ //odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0xffff); -+ /*verification path-AC*/ -+ //odm_set_bb_reg(dm, R_0x1e30, 0xffffffff, 0xe4e4e4e4); -+ } else { -+ /*@Disable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); -+ /*@1SS~4ss A, AB, ABC, ABCD*/ -+ //odm_set_bb_reg(dm, R_0x820, 0xffff, 0xf731); -+ //odm_set_bb_reg(dm, R_0x1e2c, 0xffffffff, 0xe4240400); -+ } -+ } -+#endif -+#if (RTL8198F_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8198F) { -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ for (i = RF_PATH_A; i <= RF_PATH_D; i++) { -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, -+ BIT(19), 0x1); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x30, -+ 0xfffff, 0x18000); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x31, -+ 0xfffff, 0x4f); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x32, -+ 0xfffff, 0x71fc0); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, -+ BIT(19), 0x0); -+ } -+ } -+ /*@if Nsts > Nc, don't apply V matrix*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); -+ -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ /*@enable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); -+ -+ /* logic mapping */ -+ /* TX BF logic map and TX path en for Nsts = 1~4 */ -+ odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0xffff); -+ odm_set_bb_reg(dm, R_0x1e30, 0xffffffff, 0xe4e4e4e4); -+ } else { -+ /*@Disable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); -+ /*@1SS~4ss A, AB, ABC, ABCD*/ -+ odm_set_bb_reg(dm, R_0x820, 0xffff, 0xf731); -+ odm_set_bb_reg(dm, R_0x1e2c, 0xffffffff, 0xe4240400); -+ } -+ } -+#endif -+#if (RTL8197G_SUPPORT) -+ if (dm->support_ic_type == ODM_RTL8197G) { -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ /*Path A ==================*/ -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(19), 0x1); -+ /*Set RF Rx mode table*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x30, 0xfffff, -+ 0x18000); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x31, 0xfffff, -+ 0x000cf); -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0x32, 0xfffff, -+ 0x71fc2); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, RF_PATH_A, RF_0xef, BIT(19), 0x0); -+ -+ /*Path B ==================*/ -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, BIT(19), 0x1); -+ /*Set RF Rx mode table*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, -+ 0x18000); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, -+ 0x000cf); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, -+ 0x71fc2); -+ /*Set RF Standby mode table*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x30, 0xfffff, -+ 0x18000); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x31, 0xfffff, -+ 0x000ef); -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0x32, 0xfffff, -+ 0x01042); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, RF_PATH_B, RF_0xef, BIT(19), 0x0); -+ } -+ -+ /*@if Nsts > Nc, don't apply V matrix*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); -+ -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ /*@enable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); -+ -+ /* logic mapping */ -+ /* TX BF logic map and TX path en for Nsts = 1~2 */ -+ odm_set_bb_reg(dm, R_0x820, 0xff, 0x33); -+ odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x404); -+ odm_set_bb_reg(dm, R_0x820, 0xffff0000, 0x33); -+ odm_set_bb_reg(dm, R_0x1e30, 0xffff, 0x404); -+ } else { -+ /*@Disable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); -+ /*@1SS~2ss A, AB*/ -+ odm_set_bb_reg(dm, R_0x820, 0xff, 0x31); -+ odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0x400); -+ } -+ } -+#endif -+} -+ -+void phydm_mu_rsoml_reset(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bf_rate_info_jgr3 *rateinfo = &dm->bf_rate_info_jgr3; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s cnt reset\n", __func__); -+ -+ odm_memory_set(dm, &rateinfo->num_mu_vht_pkt[0], 0, VHT_RATE_NUM * 2); -+ odm_memory_set(dm, &rateinfo->num_qry_vht_pkt[0], 0, VHT_RATE_NUM * 2); -+} -+ -+void phydm_mu_rsoml_init(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bf_rate_info_jgr3 *rateinfo = &dm->bf_rate_info_jgr3; -+ u32 val = 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s\n", __func__); -+ -+ /*OFDM Tx*/ -+ val = odm_get_bb_reg(dm, R_0x820, MASKDWORD); -+ rateinfo->tx_path_en_ofdm_2sts = (u8)((val & 0xf0) >> 4); -+ rateinfo->tx_path_en_ofdm_1sts = (u8)(val & 0xf); -+ /*OFDM Rx*/ -+ rateinfo->rx_path_en_ofdm = (u8)odm_get_bb_reg(dm, R_0x824, 0xf0000); -+ -+ rateinfo->enable = 1; -+ rateinfo->mu_ratio_th = 30; -+ rateinfo->pre_mu_ratio = 0; -+ rateinfo->mu_set_trxpath = 0; -+ rateinfo->mu_been_iot = 0; -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] %s tx1ss=%d, tx2ss=%d, rx=%d\n", -+ __func__, rateinfo->tx_path_en_ofdm_1sts, -+ rateinfo->tx_path_en_ofdm_2sts, rateinfo->rx_path_en_ofdm); -+ -+ phydm_mu_rsoml_reset(dm); -+} -+ -+void phydm_mu_rsoml_decision(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bf_rate_info_jgr3 *rateinfo = &dm->bf_rate_info_jgr3; -+ struct phydm_iot_center *iot_table = &dm->iot_table; -+ u8 offset = 0; -+ u32 mu_ratio = 0; -+ u32 su_pkt = 0; -+ u32 mu_pkt = 0; -+ u32 total_pkt = 0; -+ -+ if (rateinfo->tx_path_en_ofdm_2sts != 3 || -+ rateinfo->rx_path_en_ofdm != 3) { -+ PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] Init Not 2T2R 22CE\n"); -+ return; -+ } -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML Decision eanble: %d\n", -+ rateinfo->enable); -+ -+ if (!rateinfo->enable) -+ return; -+ -+ for (offset = 0; offset < VHT_RATE_NUM; offset++) { -+ mu_pkt += rateinfo->num_mu_vht_pkt[offset]; -+ su_pkt += rateinfo->num_qry_vht_pkt[offset]; -+ } -+ total_pkt = su_pkt + mu_pkt; -+ -+ if (total_pkt == 0) -+ mu_ratio = 0; -+ else -+ mu_ratio = (mu_pkt * 100) / total_pkt; // unit:% -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] MU rx ratio: %d, total pkt: %d\n", -+ mu_ratio, total_pkt); -+ -+ if (mu_ratio > rateinfo->mu_ratio_th && -+ rateinfo->pre_mu_ratio > rateinfo->mu_ratio_th) { -+ PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); -+ } else if (mu_ratio <= rateinfo->mu_ratio_th && -+ rateinfo->pre_mu_ratio <= rateinfo->mu_ratio_th) { -+ PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML status remain\n"); -+ } else if (mu_ratio > rateinfo->mu_ratio_th) { -+ odm_set_bb_reg(dm, R_0xc00, BIT(26), 0); -+ PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML OFF\n"); -+ } else { -+ odm_set_bb_reg(dm, R_0xc00, BIT(26), 1); -+ PHYDM_DBG(dm, DBG_TXBF, "[MU RSOML] RSOML ON\n"); -+ } -+ -+ PHYDM_DBG(dm, DBG_TXBF, "[MU IOT] set_trxpath=%d, patch_10120200=%d\n", -+ rateinfo->mu_set_trxpath, iot_table->patch_id_10120200); -+ if (rateinfo->mu_set_trxpath && iot_table->patch_id_10120200) { -+ if (mu_ratio > rateinfo->mu_ratio_th) { -+ phydm_api_trx_mode(dm, BB_PATH_AB, BB_PATH_A, -+ BB_PATH_AUTO); -+ PHYDM_DBG(dm, DBG_TXBF, "[MU IOT] 22C IOT 2T1R\n"); -+ rateinfo->mu_been_iot = 1; -+ } else { -+ phydm_api_trx_mode(dm, BB_PATH_AB, BB_PATH_AB, -+ BB_PATH_AUTO); -+ PHYDM_DBG(dm, DBG_TXBF, "[MU IOT] 22C IOT 2T2R\n"); -+ rateinfo->mu_been_iot = 0; -+ } -+ } else if (rateinfo->mu_been_iot == 1) { -+ if (odm_get_bb_reg(dm, R_0x824, 0xf0000) == 1) { -+ phydm_api_trx_mode(dm, BB_PATH_AB, BB_PATH_AB, -+ BB_PATH_AUTO); -+ PHYDM_DBG(dm, DBG_TXBF, "[MU IOT] 22C IOT Restore\n"); -+ rateinfo->mu_been_iot = 0; -+ } -+ } -+ -+ rateinfo->pre_mu_ratio = mu_ratio; -+ phydm_mu_rsoml_reset(dm); -+} -+ -+ -+#if (RTL8814B_SUPPORT == 1) -+void phydm_txbf_80p80_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ u8 i; -+ -+ if (dm->rf_type == RF_1T1R) -+ return; -+ -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ for (i = RF_PATH_A; i <= RF_PATH_D; i += 3) { -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), -+ 0x1); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 2); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff, -+ 0x3fc); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, -+ 0x280f7); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 3); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff, -+ 0x365); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, -+ 0xafcf7); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), -+ 0x0); -+ } -+ for (i = RF_PATH_B; i <= RF_PATH_C; i++) { -+ /*RF mode table write enable*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), -+ 0x1); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 2); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, -+ 0x280c7); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, -+ 0x280c7); -+ /*Select RX mode*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x33, 0xF, 3); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3e, 0xfffff, -+ 0x365); -+ /*Set Table data*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0x3f, 0xfffff, -+ 0xafcc7); -+ /*RF mode table write disable*/ -+ odm_set_rf_reg(dm, (enum rf_path)i, RF_0xef, BIT(19), -+ 0x0); -+ } -+ } -+ /*@if Nsts > Nc, don't apply V matrix*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(11), 1); -+ -+ if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) { -+ /*@enable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x2); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(30), 1); -+ -+ /* logic mapping */ -+ /* TX BF logic map and TX path en for Nsts = 1~2 */ -+ odm_set_bb_reg(dm, R_0x820, 0xff0000, 0x33); /*seg0*/ -+ odm_set_bb_reg(dm, R_0x824, 0xff00, 0xcc); /*seg1*/ -+ odm_set_bb_reg(dm, R_0x1e30, 0xffff, 0xe4e4); -+ -+ } else { -+ /*@Disable BB TxBF ant mapping register*/ -+ odm_set_bb_reg(dm, R_0x1e24, BIT(28) | BIT29, 0x0); -+ odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0); -+ /*@1SS~2ss A, AB*/ -+ odm_set_bb_reg(dm, R_0x820, 0xff, 0x31); /*seg0*/ -+ odm_set_bb_reg(dm, R_0x824, 0xff, 0xc8); /*seg1*/ -+ odm_set_bb_reg(dm, R_0x1e2c, 0xffff, 0xe420); -+ } -+} -+#endif -+#endif /*PHYSTS_3RD_TYPE_IC*/ -+ -+void phydm_txbf_avoid_hang(void *dm_void) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ -+ /* avoid CCK CCA hang when the BF mode */ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ odm_set_bb_reg(dm, R_0x1e6c, 0x100000, 0x1); -+#endif -+ -+ /* avoid CCK CCA hang when the BFee mode for 92F */ -+#if (RTL8192F_SUPPORT == 1) -+ odm_set_bb_reg(dm, R_0xa70, 0xffff0000, 0x80ff); -+#endif -+} -+ -+void phydm_bf_debug(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len) -+{ -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ char help[] = "-h"; -+ u32 var1[3] = {0}; -+ u32 i; -+ -+ if ((strcmp(input[1], help) == 0)) { -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "{BF ver1 :0}, {NO applyV:0; applyV:1; default:2}\n"); -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "{MU RSOML:1}, {MU enable:1/0}, {MU Ratio:40}\n"); -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "{MU TRxPath:2}, {TRxPath enable:1/0}\n"); -+ return; -+ } -+ for (i = 0; i < 3; i++) { -+ PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]); -+ } -+ if (var1[0] == 0) { -+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) -+ #ifdef PHYDM_BEAMFORMING_SUPPORT -+ struct _RT_BEAMFORMING_INFO *beamforming_info = NULL; -+ -+ beamforming_info = &dm->beamforming_info; -+ -+ if (var1[1] == 0) { -+ beamforming_info->apply_v_matrix = false; -+ beamforming_info->snding3ss = true; -+ PDM_SNPF(*_out_len, *_used, output + *_used, -+ *_out_len - *_used, -+ "\r\n dont apply V matrix and 3SS 789 snding\n"); -+ } else if (var1[1] == 1) { -+ beamforming_info->apply_v_matrix = true; -+ beamforming_info->snding3ss = true; -+ PDM_SNPF(*_out_len, *_used, output + *_used, -+ *_out_len - *_used, -+ "\r\n apply V matrix and 3SS 789 snding\n"); -+ } else if (var1[1] == 2) { -+ beamforming_info->apply_v_matrix = true; -+ beamforming_info->snding3ss = false; -+ PDM_SNPF(*_out_len, *_used, output + *_used, -+ *_out_len - *_used, -+ "\r\n default txbf setting\n"); -+ } else { -+ PDM_SNPF(*_out_len, *_used, output + *_used, -+ *_out_len - *_used, -+ "\r\n unknown cmd!!\n"); -+ } -+ #endif -+ #endif -+ } else if (var1[0] == 1) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bf_rate_info_jgr3 *bfinfo = &dm->bf_rate_info_jgr3; -+ -+ bfinfo->enable = (u8)var1[1]; -+ bfinfo->mu_ratio_th = (u8)var1[2]; -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "[MU RSOML] enable= %d, MU ratio TH= %d\n", -+ bfinfo->enable, bfinfo->mu_ratio_th); -+ #endif -+ } else if (var1[0] == 2) { -+ #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+ struct dm_struct *dm = (struct dm_struct *)dm_void; -+ struct phydm_bf_rate_info_jgr3 *bfinfo = &dm->bf_rate_info_jgr3; -+ -+ bfinfo->mu_set_trxpath = (u8)var1[1]; -+ PDM_SNPF(*_out_len, *_used, output + *_used, *_out_len - *_used, -+ "[MU TRxPath] mu_set_trxpath = %d\n", -+ bfinfo->mu_set_trxpath); -+ #endif -+ } -+} -+ -+#endif /*CONFIG_BB_TXBF_API*/ -diff --git a/drivers/staging/rtl8723cs/hal/phydm/txbf/phydm_hal_txbf_api.h b/drivers/staging/rtl8723cs/hal/phydm/txbf/phydm_hal_txbf_api.h -new file mode 100644 -index 000000000000..15659ccb3ab8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/phydm/txbf/phydm_hal_txbf_api.h -@@ -0,0 +1,89 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * The full GNU General Public License is included in this distribution in the -+ * file called LICENSE. -+ * -+ * Contact Information: -+ * wlanfae -+ * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, -+ * Hsinchu 300, Taiwan. -+ * -+ * Larry Finger -+ * -+ *****************************************************************************/ -+#ifndef __PHYDM_HAL_TXBF_API_H__ -+#define __PHYDM_HAL_TXBF_API_H__ -+ -+#if (defined(CONFIG_BB_TXBF_API)) -+ -+#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -+#if defined(DM_ODM_CE_MAC80211) -+#define tx_bf_nr(a, b) ({ \ -+ u8 __tx_bf_nr_a = (a); \ -+ u8 __tx_bf_nr_b = (b); \ -+ ((__tx_bf_nr_a > __tx_bf_nr_b) ? (__tx_bf_nr_b) : (__tx_bf_nr_a)); }) -+#else -+#define tx_bf_nr(a, b) ((a > b) ? (b) : (a)) -+#endif -+ -+u8 beamforming_get_htndp_tx_rate(void *dm_void, u8 bfer_str_num); -+ -+u8 beamforming_get_vht_ndp_tx_rate(void *dm_void, u8 bfer_str_num); -+ -+#endif -+ -+#if (RTL8822B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8192F_SUPPORT == 1 ||\ -+ RTL8814B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 || RTL8812F_SUPPORT == 1) -+u8 phydm_get_beamforming_sounding_info(void *dm_void, u16 *throughput, -+ u8 total_bfee_num, u8 *tx_rate); -+u8 phydm_get_ndpa_rate(void *dm_void); -+ -+u8 phydm_get_mu_bfee_snding_decision(void *dm_void, u16 throughput); -+ -+#else -+#define phydm_get_beamforming_sounding_info(dm, tp, bfee_num, rate) 0 -+#define phydm_get_ndpa_rate(dm) -+#define phydm_get_mu_bfee_snding_decision(dm, tp) -+ -+#endif -+ -+#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT -+struct phydm_bf_rate_info_jgr3 { -+ u8 enable; -+ u8 mu_ratio_th; -+ u32 pre_mu_ratio; -+ u16 num_mu_vht_pkt[VHT_RATE_NUM]; -+ u16 num_qry_vht_pkt[VHT_RATE_NUM]; -+ boolean mu_set_trxpath; -+ u8 tx_path_en_ofdm_1sts; -+ u8 tx_path_en_ofdm_2sts; -+ u8 rx_path_en_ofdm; -+ boolean mu_been_iot; -+}; -+ -+/*this function is only used for BFer*/ -+void phydm_txbf_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt); -+void phydm_txbf_avoid_hang(void *dm_void); -+void phydm_mu_rsoml_init(void *dm_void); -+void phydm_mu_rsoml_decision(void *dm_void); -+ -+#if (RTL8814B_SUPPORT == 1) -+void phydm_txbf_80p80_rfmode(void *dm_void, u8 su_bfee_cnt, u8 mu_bfee_cnt); -+#endif -+ -+#endif /*#PHYDM_IC_JGR3_SERIES_SUPPORT*/ -+void phydm_bf_debug(void *dm_void, char input[][16], u32 *_used, char *output, -+ u32 *_out_len); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/Hal8703BPwrSeq.c b/drivers/staging/rtl8723cs/hal/rtl8703b/Hal8703BPwrSeq.c -new file mode 100644 -index 000000000000..0a3aeaf99e13 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/Hal8703BPwrSeq.c -@@ -0,0 +1,84 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) Semiconductor - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+#include "Hal8703BPwrSeq.h" -+ -+ -+/* -+ drivers should parse below arrays and do the corresponding actions -+*/ -+/* 3 Power on Array */ -+WLAN_PWR_CFG rtl8703B_power_on_flow[RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS + RTL8703B_TRANS_END_STEPS] = { -+ RTL8703B_TRANS_CARDEMU_TO_ACT -+ RTL8703B_TRANS_END -+}; -+ -+/* 3Radio off GPIO Array */ -+WLAN_PWR_CFG rtl8703B_radio_off_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_END_STEPS] = { -+ RTL8703B_TRANS_ACT_TO_CARDEMU -+ RTL8703B_TRANS_END -+}; -+ -+/* 3Card Disable Array */ -+WLAN_PWR_CFG rtl8703B_card_disable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8703B_TRANS_END_STEPS] = { -+ RTL8703B_TRANS_ACT_TO_CARDEMU -+ RTL8703B_TRANS_CARDEMU_TO_CARDDIS -+ RTL8703B_TRANS_END -+}; -+ -+/* 3 Card Enable Array */ -+WLAN_PWR_CFG rtl8703B_card_enable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8703B_TRANS_END_STEPS] = { -+ RTL8703B_TRANS_CARDDIS_TO_CARDEMU -+ RTL8703B_TRANS_CARDEMU_TO_ACT -+ RTL8703B_TRANS_END -+}; -+ -+/* 3Suspend Array */ -+WLAN_PWR_CFG rtl8703B_suspend_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS + RTL8703B_TRANS_END_STEPS] = { -+ RTL8703B_TRANS_ACT_TO_CARDEMU -+ RTL8703B_TRANS_CARDEMU_TO_SUS -+ RTL8703B_TRANS_END -+}; -+ -+/* 3 Resume Array */ -+WLAN_PWR_CFG rtl8703B_resume_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS + RTL8703B_TRANS_END_STEPS] = { -+ RTL8703B_TRANS_SUS_TO_CARDEMU -+ RTL8703B_TRANS_CARDEMU_TO_ACT -+ RTL8703B_TRANS_END -+}; -+ -+ -+ -+/* 3HWPDN Array */ -+WLAN_PWR_CFG rtl8703B_hwpdn_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8703B_TRANS_END_STEPS] = { -+ RTL8703B_TRANS_ACT_TO_CARDEMU -+ RTL8703B_TRANS_CARDEMU_TO_PDN -+ RTL8703B_TRANS_END -+}; -+ -+/* 3 Enter LPS */ -+WLAN_PWR_CFG rtl8703B_enter_lps_flow[RTL8703B_TRANS_ACT_TO_LPS_STEPS + RTL8703B_TRANS_END_STEPS] = { -+ /* FW behavior */ -+ RTL8703B_TRANS_ACT_TO_LPS -+ RTL8703B_TRANS_END -+}; -+ -+/* 3 Leave LPS */ -+WLAN_PWR_CFG rtl8703B_leave_lps_flow[RTL8703B_TRANS_LPS_TO_ACT_STEPS + RTL8703B_TRANS_END_STEPS] = { -+ /* FW behavior */ -+ RTL8703B_TRANS_LPS_TO_ACT -+ RTL8703B_TRANS_END -+}; -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/hal8703b_fw.c b/drivers/staging/rtl8723cs/hal/rtl8703b/hal8703b_fw.c -new file mode 100644 -index 000000000000..408250d57975 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/hal8703b_fw.c -@@ -0,0 +1,7973 @@ -+/****************************************************************************** -+* -+* Copyright(c) 2012 - 2017 Realtek Corporation. -+* -+* This program is free software; you can redistribute it and/or modify it -+* under the terms of version 2 of the GNU General Public License as -+* published by the Free Software Foundation. -+* -+* This program is distributed in the hope that it will be useful, but WITHOUT -+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+* more details. -+* -+******************************************************************************/ -+ -+#ifdef CONFIG_RTL8703B -+ -+#include "drv_types.h" -+ -+#ifdef LOAD_FW_HEADER_FROM_DRIVER -+ -+#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) -+ -+u8 array_mp_8703b_fw_ap[] = { -+0xB2, 0x03, 0x20, 0x00, 0x0B, 0x00, 0x00, 0x00, -+0x06, 0x11, 0x10, 0x25, 0xFA, 0x4D, 0x02, 0x00, -+0x25, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x02, 0x85, 0xB9, 0x02, 0xBB, 0x3A, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xA6, 0xBF, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xBB, 0xE6, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xBB, 0x3B, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xB6, 0xB3, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xBB, 0x93, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x02, 0x86, 0xD2, 0x02, 0x89, 0x0A, 0x02, 0x80, -+0x86, 0x02, 0x80, 0x89, 0x02, 0x80, 0x8C, 0x02, -+0x94, 0xE9, 0x02, 0x87, 0x72, 0x02, 0x80, 0x95, -+0x02, 0x80, 0x98, 0x02, 0x80, 0x9B, 0x02, 0x80, -+0x9E, 0x02, 0x80, 0xA1, 0x02, 0x80, 0xA4, 0x02, -+0x80, 0xA7, 0x02, 0x80, 0xAA, 0x02, 0x80, 0xAD, -+0x02, 0x80, 0xB0, 0x02, 0x8A, 0x7D, 0x02, 0x80, -+0xB6, 0x02, 0x80, 0xB9, 0x02, 0x80, 0xBC, 0x02, -+0x80, 0xBF, 0x02, 0x80, 0xC2, 0x02, 0x80, 0xC5, -+0x02, 0x80, 0xC8, 0x02, 0x80, 0xCB, 0x02, 0x80, -+0xCE, 0x02, 0x92, 0x78, 0x02, 0xCA, 0xBD, 0x02, -+0x80, 0xD7, 0x02, 0x80, 0xDA, 0x02, 0x80, 0xDD, -+0x02, 0x80, 0xE0, 0x02, 0x80, 0xE3, 0x02, 0x80, -+0xE6, 0x02, 0x80, 0xE9, 0x02, 0x80, 0xEC, 0x00, -+0x00, 0x00, 0x02, 0xCA, 0x06, 0x00, 0x00, 0x00, -+0x02, 0x80, 0xF8, 0x02, 0x80, 0xFB, 0x02, 0x80, -+0xFE, 0x02, 0x81, 0x01, 0x02, 0x81, 0x04, 0x02, -+0x81, 0x07, 0x02, 0x81, 0x0A, 0x02, 0x81, 0x0D, -+0x02, 0x81, 0x10, 0x02, 0x81, 0x13, 0x02, 0x81, -+0x16, 0x02, 0x81, 0x19, 0x02, 0x81, 0x1C, 0x02, -+0xC9, 0xAE, 0x02, 0x81, 0x22, 0x02, 0x81, 0x25, -+0x02, 0x81, 0x28, 0x02, 0x81, 0x2B, 0x02, 0xAB, -+0xF4, 0x02, 0x81, 0x31, 0x02, 0xA2, 0x7F, 0x02, -+0xAB, 0x54, 0x02, 0xAA, 0xF2, 0x02, 0x90, 0xEA, -+0x02, 0xC7, 0xBA, 0x02, 0x96, 0x47, 0x02, 0xCB, -+0x80, 0x02, 0x81, 0x49, 0x02, 0x81, 0x4C, 0x02, -+0x81, 0x4F, 0x02, 0x81, 0x52, 0x02, 0x81, 0x55, -+0x02, 0x81, 0x58, 0x02, 0x81, 0x5B, 0x02, 0x90, -+0xF5, 0x02, 0x81, 0x61, 0x02, 0x81, 0x64, 0x02, -+0xCC, 0x99, 0x02, 0x81, 0x6A, 0x02, 0x81, 0x6D, -+0x02, 0xBD, 0xCF, 0x02, 0xAB, 0xAC, 0x02, 0xCA, -+0xB1, 0x02, 0xBF, 0x1F, 0x00, 0x00, 0x00, 0x00, -+0x15, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x15, -+0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x05, 0xF0, -+0xFF, 0x0F, 0x00, 0x00, 0x00, 0x05, 0xF0, 0x0F, -+0x00, 0x00, 0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F, -+0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00, 0x00, -+0x00, 0x00, 0xF5, 0x0F, 0x00, 0x00, 0x00, 0x00, -+0x00, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, -+0x08, 0x03, 0x03, 0x00, 0x04, 0x09, 0x07, 0x03, -+0x03, 0x00, 0x04, 0x08, 0x06, 0x03, 0x02, 0x00, -+0x04, 0x08, 0x05, 0x03, 0x01, 0x00, 0x04, 0x0D, -+0x0A, 0x07, 0x05, 0x00, 0x08, 0x0C, 0x0A, 0x07, -+0x04, 0x00, 0x08, 0x0B, 0x0A, 0x06, 0x05, 0x00, -+0x08, 0x0B, 0x0A, 0x05, 0x03, 0x00, 0x08, 0x0B, -+0x0A, 0x03, 0x02, 0x00, 0x08, 0x14, 0x12, 0x0C, -+0x04, 0x00, 0x10, 0x14, 0x12, 0x09, 0x04, 0x00, -+0x10, 0x24, 0x22, 0x1C, 0x12, 0x00, 0x20, 0x24, -+0x22, 0x18, 0x0C, 0x00, 0x20, 0x24, 0x22, 0x14, -+0x06, 0x00, 0x20, 0x24, 0x22, 0x0F, 0x04, 0x00, -+0x20, 0x24, 0x21, 0x0A, 0x04, 0x00, 0x20, 0x23, -+0x21, 0x0C, 0x04, 0x00, 0x20, 0x23, 0x1F, 0x0A, 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-+0x01, 0x22, 0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, -+0x90, 0x01, 0xB8, 0xE5, 0x63, 0xF0, 0x7F, 0x00, -+0x22, 0xAC, 0x07, 0x90, 0x8A, 0x7F, 0x12, 0x87, -+0xE4, 0x30, 0xE0, 0x02, 0xA1, 0x4B, 0x90, 0x8A, -+0x7E, 0xE0, 0x30, 0xE0, 0x16, 0x90, 0x8A, 0xA0, -+0xE0, 0x24, 0x04, 0x90, 0x8A, 0x98, 0xF0, 0x90, -+0x8A, 0xA0, 0xE0, 0x24, 0x03, 0x90, 0x8A, 0x97, -+0xF0, 0x80, 0x0D, 0x90, 0x8A, 0x98, 0x74, 0x02, -+0xF0, 0x90, 0x8A, 0x97, 0x14, 0xF0, 0x0B, 0x0B, -+0x90, 0x8A, 0x97, 0xE0, 0xFA, 0x90, 0x8A, 0x96, -+0xE0, 0xD3, 0x9A, 0x50, 0x0D, 0x90, 0x8A, 0x8B, -+0xEB, 0xF0, 0x90, 0x8A, 0x98, 0xE0, 0xC3, 0x9D, -+0x80, 0x11, 0xC3, 0xED, 0x9A, 0x2B, 0x90, 0x8A, -+0x8B, 0xF0, 0x90, 0x8A, 0x97, 0xE0, 0xFF, 0xA3, -+0xE0, 0xC3, 0x9F, 0x2C, 0x90, 0x8A, 0x9B, 0xF0, -+0x90, 0x8A, 0x98, 0xE0, 0xFF, 0x24, 0x0A, 0xFD, -+0xE4, 0x33, 0xFC, 0x90, 0x8A, 0x9B, 0x12, 0xC7, -+0xAF, 0x40, 0x04, 0xEF, 0x24, 0x0A, 0xF0, 0x90, -+0x8A, 0x9B, 0xE0, 0xFF, 0x24, 0x23, 0xFD, 0xE4, -+0x33, 0xFC, 0x90, 0x8A, 0x8B, 0x12, 0xC7, 0xAF, -+0x40, 0x04, 0xEF, 0x24, 0x23, 0xF0, 0x90, 0x8A, -+0x9B, 0xE0, 0xFF, 0x7E, 0x00, 0x90, 0x8A, 0x8F, -+0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x05, 0x58, -+0xE0, 0x6F, 0x70, 0x01, 0xE4, 0x60, 0x02, 0xB1, -+0x5B, 0x80, 0x08, 0x90, 0x8A, 0x80, 0xE0, 0x44, -+0x01, 0xF0, 0x22, 0x90, 0x8A, 0x80, 0xE0, 0x54, -+0xFE, 0xF0, 0x22, 0x90, 0x8A, 0x8F, 0xA3, 0xE0, -+0x90, 0x05, 0x58, 0xF0, 0x22, 0xD3, 0x10, 0xAF, -+0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8A, 0x80, 0xE0, -+0xFE, 0xC3, 0x13, 0x30, 0xE0, 0x1F, 0x90, 0x91, -+0x69, 0x74, 0x1E, 0xF0, 0x90, 0x91, 0x77, 0x74, -+0x01, 0xF0, 0x90, 0x91, 0x6B, 0xEF, 0xF0, 0x7B, -+0x01, 0x7A, 0x91, 0x79, 0x69, 0x12, 0x5A, 0x18, -+0x7F, 0x04, 0x12, 0x87, 0x72, 0xD0, 0xD0, 0x92, -+0xAF, 0x22, 0xE0, 0x54, 0xFE, 0x4E, 0xFE, 0xF0, -+0xEF, 0x54, 0x02, 0xFF, 0xEE, 0x54, 0xFD, 0x4F, -+0x22, 0xE0, 0x90, 0x01, 0xBA, 0xF0, 0x90, 0x8A, -+0x85, 0xE0, 0x90, 0x01, 0xBB, 0x22, 0x74, 0x05, -+0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, -+0x22, 0xE4, 0x90, 0x8E, 0xF6, 0xF0, 0x90, 0x8F, -+0xAB, 0x22, 0x90, 0x91, 0x0E, 0xE0, 0xFF, 0x02, -+0x59, 0x1B, 0x7D, 0x01, 0x7F, 0x02, 0x02, 0x7B, -+0x53, 0x12, 0x7A, 0xA5, 0x90, 0x91, 0xAC, 0xE0, -+0x22, 0x90, 0x90, 0x05, 0x74, 0x06, 0xF0, 0xA3, -+0x22, 0xF0, 0x90, 0x00, 0x06, 0x02, 0x02, 0x1F, -+0xF0, 0x90, 0x00, 0x05, 0x02, 0x02, 0x1F, 0x00, -+0xD4, 0x96 -+}; -+ -+u32 array_length_mp_8703b_fw_ap = 19994; -+ -+#endif /*defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))*/ -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+ -+u8 array_mp_8703b_fw_nic[] = { -+0xB2, 0x03, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, -+0x06, 0x11, 0x10, 0x24, 0x22, 0x4F, 0x02, 0x00, -+0x25, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x02, 0x85, 0xB9, 0x02, 0xC4, 0x63, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xBD, 0xBE, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xC5, 0x2A, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xC4, 0x64, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xBA, 0xF7, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xC4, 0xD7, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x02, 0x86, 0xC5, 0x02, 0x8A, 0xF5, 0x02, 0x80, -+0x86, 0x02, 0x80, 0x89, 0x02, 0x87, 0x28, 0x02, -+0x8C, 0x48, 0x02, 0xB8, 0x63, 0x02, 0x80, 0x95, -+0x02, 0x80, 0x98, 0x02, 0x80, 0x9B, 0x02, 0x80, -+0x9E, 0x02, 0x80, 0xA1, 0x02, 0x80, 0xA4, 0x02, -+0x80, 0xA7, 0x02, 0x80, 0xAA, 0x02, 0x80, 0xAD, -+0x02, 0x80, 0xB0, 0x02, 0xA3, 0x0B, 0x02, 0x80, -+0xB6, 0x02, 0x80, 0xB9, 0x02, 0x80, 0xBC, 0x02, -+0x80, 0xBF, 0x02, 0x80, 0xC2, 0x02, 0x80, 0xC5, -+0x02, 0x80, 0xC8, 0x02, 0x80, 0xCB, 0x02, 0x80, -+0xCE, 0x02, 0x93, 0x7D, 0x02, 0xCA, 0x3B, 0x02, -+0x80, 0xD7, 0x02, 0x80, 0xDA, 0x02, 0x80, 0xDD, -+0x02, 0x80, 0xE0, 0x02, 0x80, 0xE3, 0x02, 0x80, -+0xE6, 0x02, 0x80, 0xE9, 0x02, 0x80, 0xEC, 0x00, -+0x00, 0x00, 0x02, 0xC9, 0x80, 0x00, 0x00, 0x00, -+0x02, 0x80, 0xF8, 0x02, 0x80, 0xFB, 0x02, 0x80, -+0xFE, 0x02, 0x81, 0x01, 0x02, 0x81, 0x04, 0x02, -+0x81, 0x07, 0x02, 0x81, 0x0A, 0x02, 0x81, 0x0D, -+0x02, 0x81, 0x10, 0x02, 0x81, 0x13, 0x02, 0x81, -+0x16, 0x02, 0x81, 0x19, 0x02, 0x81, 0x1C, 0x02, -+0xC6, 0xF4, 0x02, 0x81, 0x22, 0x02, 0x81, 0x25, -+0x02, 0x81, 0x28, 0x02, 0x81, 0x2B, 0x02, 0x95, -+0x93, 0x02, 0x81, 0x31, 0x02, 0xBA, 0x49, 0x02, -+0xC3, 0x35, 0x02, 0xAD, 0x44, 0x02, 0xAB, 0x7B, -+0x02, 0xC7, 0xD9, 0x02, 0x8D, 0xA8, 0x02, 0xCB, -+0x05, 0x02, 0x81, 0x49, 0x02, 0x81, 0x4C, 0x02, -+0x81, 0x4F, 0x02, 0x81, 0x52, 0x02, 0x81, 0x55, -+0x02, 0x81, 0x58, 0x02, 0x81, 0x5B, 0x02, 0xAA, -+0xB5, 0x02, 0x81, 0x61, 0x02, 0x81, 0x64, 0x02, -+0xCC, 0x24, 0x02, 0x81, 0x6A, 0x02, 0x81, 0x6D, -+0x02, 0xAC, 0x94, 0x02, 0xC3, 0x93, 0x02, 0xCA, -+0x2F, 0x02, 0x9E, 0xBD, 0x00, 0x00, 0x00, 0x00, -+0x15, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x15, -+0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x05, 0xF0, -+0xFF, 0x0F, 0x00, 0x00, 0x00, 0x05, 0xF0, 0x0F, -+0x00, 0x00, 0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F, -+0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00, 0x00, -+0x00, 0x00, 0xF5, 0x0F, 0x00, 0x00, 0x00, 0x00, -+0x00, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, -+0x08, 0x03, 0x03, 0x00, 0x04, 0x09, 0x07, 0x03, -+0x03, 0x00, 0x04, 0x08, 0x06, 0x03, 0x02, 0x00, -+0x04, 0x08, 0x05, 0x03, 0x01, 0x00, 0x04, 0x0D, -+0x0A, 0x07, 0x05, 0x00, 0x08, 0x0C, 0x0A, 0x07, -+0x04, 0x00, 0x08, 0x0B, 0x0A, 0x06, 0x05, 0x00, -+0x08, 0x0B, 0x0A, 0x05, 0x03, 0x00, 0x08, 0x0B, -+0x0A, 0x03, 0x02, 0x00, 0x08, 0x14, 0x12, 0x0C, -+0x04, 0x00, 0x10, 0x14, 0x12, 0x09, 0x04, 0x00, -+0x10, 0x24, 0x22, 0x1C, 0x12, 0x00, 0x20, 0x24, -+0x22, 0x18, 0x0C, 0x00, 0x20, 0x24, 0x22, 0x14, -+0x06, 0x00, 0x20, 0x24, 0x22, 0x0F, 0x04, 0x00, -+0x20, 0x24, 0x21, 0x0A, 0x04, 0x00, 0x20, 0x23, -+0x21, 0x0C, 0x04, 0x00, 0x20, 0x23, 0x1F, 0x0A, -+0x04, 0x00, 0x20, 0x22, 0x1F, 0x0F, 0x04, 0x00, -+0x20, 0x21, 0x1F, 0x16, 0x0C, 0x00, 0x20, 0x31, -+0x2F, 0x20, 0x14, 0x00, 0x30, 0x31, 0x2F, 0x18, -+0x10, 0x00, 0x30, 0x31, 0x2C, 0x18, 0x0C, 0x00, -+0x30, 0x31, 0x2A, 0x14, 0x0C, 0x00, 0x30, 0x31, -+0x28, 0x14, 0x00, 0x00, 0x30, 0x31, 0x24, 0x14, -+0x00, 0x00, 0x30, 0x31, 0x1E, 0x14, 0x00, 0x00, -+0x30, 0x04, 0x04, 0x04, 0x05, 0x08, 0x08, 0x09, -+0x09, 0x0C, 0x0E, 0x10, 0x12, 0x06, 0x0B, 0x0D, -+0x0E, 0x0F, 0x11, 0x12, 0x14, 0x00, 0x04, 0x00, -+0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x23, 0x00, -+0x2D, 0x00, 0x50, 0x00, 0x91, 0x00, 0xC3, 0x01, -+0x27, 0x01, 0x31, 0x01, 0x5E, 0x00, 0xC8, 0x00, -+0xF0, 0x00, 0xDC, 0x01, 0x5E, 0x01, 0x68, 0x01, -+0x9A, 0x01, 0xCC, 0x01, 0xEA, 0x02, 0x02, 0x04, -+0x08, 0x0C, 0x12, 0x18, 0x24, 0x30, 0x48, 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0x22, -+0xC4, 0x54, 0x0F, 0x90, 0x91, 0x22, 0xF0, 0x22, -+0xFE, 0x54, 0x03, 0xFD, 0xEE, 0x13, 0x13, 0x54, -+0x07, 0xFB, 0x22, 0xF0, 0x90, 0x00, 0x05, 0x02, -+0x02, 0x1F, 0x25, 0xE0, 0x24, 0x73, 0xF5, 0x82, -+0xE4, 0x34, 0x8D, 0x22, 0x25, 0xE0, 0x24, 0x93, -+0xF5, 0x82, 0xE4, 0x34, 0x8D, 0x22, 0x25, 0xE0, -+0x24, 0xC3, 0xF5, 0x82, 0xE4, 0x34, 0x8D, 0x22, -+0x90, 0x8F, 0x84, 0xE0, 0x14, 0x90, 0x8F, 0x86, -+0xF0, 0x22, 0xF0, 0x90, 0x8A, 0xEA, 0xE0, 0xC4, -+0x13, 0x54, 0x07, 0x22, 0x90, 0x00, 0x04, 0x02, -+0x03, 0x3E, 0x90, 0x8F, 0x85, 0xE0, 0x90, 0x05, -+0x73, 0xF0, 0x22, 0x90, 0x8A, 0xEE, 0xE0, 0xC4, -+0x13, 0x54, 0x07, 0x22, 0xFF, 0x12, 0x02, 0x06, -+0x54, 0x0F, 0xFD, 0x22, 0x7D, 0x02, 0x7F, 0x02, -+0x02, 0x7B, 0x53, 0xE0, 0x54, 0x03, 0x90, 0x8E, -+0xA6, 0xF0, 0x22, 0x90, 0x8A, 0x89, 0xE0, 0x90, -+0x05, 0x73, 0x22, 0x90, 0x8A, 0x87, 0xE0, 0x44, -+0x10, 0xF0, 0x22, 0x12, 0x86, 0x71, 0xD3, 0x02, -+0x03, 0xDA, 0x7D, 0x20, 0xE4, 0xFF, 0x02, 0x7A, -+0xEE, 0x7D, 0x01, 0xAF, 0x65, 0x02, 0x63, 0xA2, -+0xE5, 0x67, 0x90, 0x82, 0x9D, 0x93, 0xFF, 0x22, -+0xF5, 0x82, 0xE4, 0x34, 0x90, 0xF5, 0x83, 0x22, -+0x90, 0x90, 0x55, 0xE0, 0xFE, 0xA3, 0xE0, 0x22, -+0x90, 0x8A, 0x7E, 0xE0, 0x54, 0xF7, 0xF0, 0x22, -+0x90, 0x90, 0x05, 0x74, 0x06, 0xF0, 0xA3, 0x22, -+0xFF, 0x12, 0x02, 0x06, 0xFE, 0x54, 0x0F, 0x22, -+0x12, 0x02, 0x06, 0xC4, 0x54, 0x0F, 0xFF, 0x22, -+0x73, 0xD3 -+}; -+ -+u32 array_length_mp_8703b_fw_nic = 20290; -+ -+#ifdef CONFIG_WOWLAN -+ -+u8 array_mp_8703b_fw_wowlan[] = { -+0xB2, 0x03, 0x30, 0x00, 0x0B, 0x00, 0x00, 0x00, -+0x06, 0x11, 0x10, 0x25, 0x02, 0x5A, 0x02, 0x00, -+0x25, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x02, 0x86, 0x9E, 0x02, 0xB7, 0xF3, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xAD, 0x8A, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x02, 0xBF, 0xEA, 0x00, 0x00, -+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+0x00, 0x00, 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0x75, 0x5E, 0x11, 0x80, 0x18, 0x90, -+0x06, 0x62, 0xE0, 0x30, 0xE0, 0x0C, 0xE0, 0x54, -+0xFC, 0xFF, 0xBF, 0x80, 0x05, 0x75, 0x5E, 0x12, -+0x80, 0x05, 0x12, 0xAF, 0xE7, 0x80, 0x0E, 0x90, -+0x01, 0xB9, 0x74, 0x04, 0xF0, 0x90, 0x01, 0xB8, -+0xE5, 0x5E, 0xF0, 0x7F, 0x00, 0xD0, 0xD0, 0x92, -+0xAF, 0x22, 0x90, 0x02, 0x87, 0xE0, 0x60, 0x02, -+0x80, 0x08, 0x90, 0x01, 0x00, 0xE0, 0x64, 0x3F, -+0x60, 0x05, 0x75, 0x13, 0x01, 0x80, 0x41, 0x90, -+0x90, 0x04, 0xE0, 0x30, 0xE0, 0x0B, 0x90, 0x02, -+0x82, 0xE0, 0x60, 0x05, 0x75, 0x13, 0x02, 0x80, -+0x2F, 0x90, 0x90, 0x0F, 0xE0, 0x30, 0xE0, 0x05, -+0x75, 0x13, 0x08, 0x80, 0x23, 0x90, 0x02, 0x86, -+0xE0, 0x20, 0xE1, 0x02, 0x80, 0x07, 0x90, 0x02, -+0x86, 0xE0, 0x30, 0xE3, 0x05, 0x75, 0x13, 0x04, -+0x80, 0x0E, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x05, -+0x75, 0x13, 0x40, 0x80, 0x03, 0x02, 0xAF, 0xE7, -+0x90, 0x01, 0xB9, 0x74, 0x08, 0xF0, 0x90, 0x01, -+0xB8, 0xE5, 0x13, 0xF0, 0x7F, 0x00, 0x22, 0x90, -+0x8A, 0x7E, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0xA7, -+0x79, 0x22, 0xF9, 0xE4, 0x3A, 0x8B, 0x1B, 0xF5, -+0x1C, 0x89, 0x1D, 0x75, 0x1E, 0x04, 0x7B, 0x01, -+0x7A, 0x94, 0x79, 0x27, 0x12, 0x68, 0xAB, 0x90, -+0x94, 0x21, 0xE0, 0x75, 0xF0, 0x08, 0xA4, 0x22, -+0xF0, 0xA3, 0xEF, 0xF0, 0x74, 0x02, 0x2D, 0xF5, -+0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x54, -+0x0F, 0x33, 0x33, 0x33, 0x54, 0xF8, 0xFF, 0x74, -+0x03, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFB, 0xF5, -+0x83, 0xE0, 0x54, 0x03, 0x22, 0xE0, 0xFF, 0xAE, -+0x05, 0x74, 0x18, 0x2E, 0xF5, 0x82, 0xE4, 0x34, -+0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x00, 0x8B, -+0xE0, 0xD3, 0x94, 0x03, 0x74, 0x10, 0x2E, 0xF5, -+0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0x74, 0x04, -+0xF0, 0x22, 0x90, 0x93, 0x8F, 0xE0, 0x2F, 0xFF, -+0x90, 0x93, 0x8E, 0xE0, 0x34, 0x00, 0xFE, 0x90, -+0x94, 0x12, 0xF0, 0xA3, 0x22, 0x90, 0x93, 0x8B, -+0xE0, 0xFF, 0x24, 0x20, 0xF5, 0x82, 0xE4, 0x34, -+0x91, 0xF5, 0x83, 0xE0, 0xFE, 0x22, 0x90, 0x8A, -+0x75, 0xE0, 0x24, 0x01, 0xFF, 0x90, 0x8A, 0x74, -+0xE0, 0x34, 0x00, 0xFE, 0xC3, 0x22, 0x90, 0x90, -+0x04, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x22, -+0x90, 0x8F, 0xB2, 0xA3, 0xE0, 0x24, 0x04, 0xF5, -+0x82, 0xE4, 0x34, 0xFB, 0xF5, 0x83, 0xE0, 0x22, -+0xEE, 0x8F, 0xF0, 0x12, 0x02, 0xE7, 0x90, 0x8A, -+0x74, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, -+0x8F, 0xAE, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, -+0x90, 0x8A, 0x95, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, -+0x90, 0x8A, 0x9C, 0xE0, 0xFB, 0x22, 0xE0, 0x90, -+0x01, 0xBA, 0xF0, 0x90, 0x8A, 0x85, 0xE0, 0x90, -+0x01, 0xBB, 0x22, 0x90, 0x93, 0x67, 0xE0, 0xFD, -+0x90, 0x93, 0x66, 0xE0, 0x2D, 0x22, 0xFF, 0xEC, -+0x3E, 0x90, 0x93, 0x6D, 0xF0, 0xA3, 0xEF, 0xF0, -+0x22, 0x90, 0x94, 0x5D, 0xE0, 0xC3, 0x13, 0x90, -+0xFD, 0x10, 0xF0, 0x22, 0xCF, 0x34, 0x00, 0x90, -+0x93, 0x69, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x90, -+0x90, 0x04, 0xE0, 0x13, 0x13, 0x22, 0xFD, 0x12, -+0x7A, 0xDD, 0x90, 0x93, 0x89, 0xEF, 0xF0, 0x22, -+0x75, 0x1C, 0x91, 0x75, 0x1D, 0x1E, 0x75, 0x1E, -+0x02, 0x22, 0xF0, 0xEE, 0x54, 0x08, 0xFE, 0xEF, -+0x54, 0xF7, 0x4E, 0x22, 0xD2, 0xAF, 0xC2, 0xAF, -+0x90, 0x89, 0x7E, 0xE0, 0xFF, 0x22, 0x54, 0x10, -+0xFD, 0xEF, 0x54, 0xEF, 0x4D, 0xFF, 0x22, 0x54, -+0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x4D, 0xFF, 0x22, -+0x54, 0x04, 0xFD, 0xEF, 0x54, 0xFB, 0x4D, 0xFF, -+0x22, 0xF0, 0xEE, 0x54, 0x80, 0xFE, 0xEF, 0x54, -+0x7F, 0x22, 0x90, 0x8F, 0xAE, 0xE0, 0xFC, 0xA3, -+0xE0, 0xFD, 0x22, 0x90, 0x8F, 0xB0, 0xE0, 0xFE, -+0xA3, 0xE0, 0xFF, 0x22, 0xF0, 0xA3, 0xEF, 0xF0, -+0x90, 0x02, 0x87, 0xE0, 0x22, 0x90, 0x01, 0x1F, -+0xE0, 0xFE, 0x90, 0x01, 0x1E, 0x22, 0x90, 0x93, -+0x67, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0x90, -+0x94, 0x81, 0xE0, 0xFE, 0xA3, 0xE0, 0x22, 0x24, -+0x06, 0xFD, 0x12, 0x52, 0xBD, 0xEF, 0x22, 0x12, -+0x7A, 0xA5, 0x90, 0x94, 0xA4, 0xE0, 0x22, 0x00, -+0xB0, 0xD4 -+}; -+ -+u32 array_length_mp_8703b_fw_wowlan = 23074; -+ -+#endif /*CONFIG_WOWLAN*/ -+ -+#endif -+ -+#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/hal8703b_fw.h b/drivers/staging/rtl8723cs/hal/rtl8703b/hal8703b_fw.h -new file mode 100644 -index 000000000000..0eeb656df975 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/hal8703b_fw.h -@@ -0,0 +1,40 @@ -+/****************************************************************************** -+* -+* Copyright(c) 2012 - 2017 Realtek Corporation. -+* -+* This program is free software; you can redistribute it and/or modify it -+* under the terms of version 2 of the GNU General Public License as -+* published by the Free Software Foundation. -+* -+* This program is distributed in the hope that it will be useful, but WITHOUT -+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+* more details. -+* -+******************************************************************************/ -+ -+#ifdef CONFIG_RTL8703B -+ -+#ifndef _FW_HEADER_8703B_H -+#define _FW_HEADER_8703B_H -+ -+#ifdef LOAD_FW_HEADER_FROM_DRIVER -+#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) -+extern u8 array_mp_8703b_fw_ap[19994]; -+extern u32 array_length_mp_8703b_fw_ap; -+#endif -+ -+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) -+extern u8 array_mp_8703b_fw_nic[20290]; -+extern u32 array_length_mp_8703b_fw_nic; -+#ifdef CONFIG_WOWLAN -+extern u8 array_mp_8703b_fw_wowlan[23074]; -+extern u32 array_length_mp_8703b_fw_wowlan; -+#endif /*CONFIG_WOWLAN*/ -+#endif -+#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ -+ -+#endif -+ -+#endif -+ -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_cmd.c b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_cmd.c -new file mode 100644 -index 000000000000..6ed40ac07f71 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_cmd.c -@@ -0,0 +1,507 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTL8703B_CMD_C_ -+ -+#include -+#include "hal_com_h2c.h" -+ -+#define MAX_H2C_BOX_NUMS 4 -+#define MESSAGE_BOX_SIZE 4 -+ -+#define RTL8703B_MAX_CMD_LEN 7 -+#define RTL8703B_EX_MESSAGE_BOX_SIZE 4 -+ -+static u8 _is_fw_read_cmd_down(_adapter *padapter, u8 msgbox_num) -+{ -+ u8 read_down = _FALSE; -+ int retry_cnts = 100; -+ -+ u8 valid; -+ -+ /* RTW_INFO(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); */ -+ -+ do { -+ valid = rtw_read8(padapter, REG_HMETFR) & BIT(msgbox_num); -+ if (0 == valid) -+ read_down = _TRUE; -+ else -+ rtw_msleep_os(1); -+ } while ((!read_down) && (retry_cnts--)); -+ -+ return read_down; -+ -+} -+ -+ -+/***************************************** -+* H2C Msg format : -+*| 31 - 8 |7-5 | 4 - 0 | -+*| h2c_msg |Class |CMD_ID | -+*| 31-0 | -+*| Ext msg | -+* -+******************************************/ -+s32 FillH2CCmd8703B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) -+{ -+ u8 h2c_box_num; -+ u8 h2c[RTL8703B_MAX_CMD_LEN + 1] = {0}; -+ u32 msgbox_addr; -+ u32 msgbox_ex_addr = 0; -+ PHAL_DATA_TYPE pHalData; -+ u32 h2c_cmd = 0; -+ u32 h2c_cmd_ex = 0; -+ s32 ret = _FAIL; -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ -+ padapter = GET_PRIMARY_ADAPTER(padapter); -+ pHalData = GET_HAL_DATA(padapter); -+#ifdef DBG_CHECK_FW_PS_STATE -+#ifdef DBG_CHECK_FW_PS_STATE_H2C -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ RTW_INFO("%s: h2c doesn't leave 32k ElementID=%02x\n", __FUNCTION__, ElementID); -+ pdbgpriv->dbg_h2c_leave32k_fail_cnt++; -+ } -+ -+ /* RTW_INFO("H2C ElementID=%02x , pHalData->LastHMEBoxNum=%02x\n", ElementID, pHalData->LastHMEBoxNum); */ -+#endif /* DBG_CHECK_FW_PS_STATE_H2C */ -+#endif /* DBG_CHECK_FW_PS_STATE */ -+ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); -+ -+ if (!pCmdBuffer) -+ goto exit; -+ if (CmdLen > RTL8703B_MAX_CMD_LEN) -+ goto exit; -+ if (rtw_is_surprise_removed(padapter)) -+ goto exit; -+ -+ h2c[0] = ElementID; -+ _rtw_memcpy(h2c + 1, pCmdBuffer, CmdLen); -+ -+ /* pay attention to if race condition happened in H2C cmd setting. */ -+ do { -+ h2c_box_num = pHalData->LastHMEBoxNum; -+ -+ if (!_is_fw_read_cmd_down(padapter, h2c_box_num)) { -+ RTW_INFO(" fw read cmd failed...\n"); -+#ifdef DBG_CHECK_FW_PS_STATE -+ RTW_INFO("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n", rtw_read32(padapter, 0x1c0), rtw_read32(padapter, 0x1c4) -+ , rtw_read32(padapter, 0x1c8), rtw_read32(padapter, 0x1cc)); -+#endif /* DBG_CHECK_FW_PS_STATE */ -+ /* RTW_INFO(" 0x1c0: 0x%8x\n", rtw_read32(padapter, 0x1c0)); */ -+ /* RTW_INFO(" 0x1c4: 0x%8x\n", rtw_read32(padapter, 0x1c4)); */ -+ goto exit; -+ } -+ -+ /* Write Ext command (byte 4~7) */ -+ msgbox_ex_addr = REG_HMEBOX_EXT0_8703B + (h2c_box_num * RTL8703B_EX_MESSAGE_BOX_SIZE); -+ _rtw_memcpy((u8 *)(&h2c_cmd_ex), h2c + 4, RTL8703B_EX_MESSAGE_BOX_SIZE); -+ h2c_cmd_ex = le32_to_cpu(h2c_cmd_ex); -+ rtw_write32(padapter, msgbox_ex_addr, h2c_cmd_ex); -+ -+ /* Write command (byte 0~3) */ -+ msgbox_addr = REG_HMEBOX_0_8703B + (h2c_box_num * MESSAGE_BOX_SIZE); -+ _rtw_memcpy((u8 *)(&h2c_cmd), h2c, 4); -+ h2c_cmd = le32_to_cpu(h2c_cmd); -+ rtw_write32(padapter, msgbox_addr, h2c_cmd); -+ -+ /* RTW_INFO("MSG_BOX:%d, CmdLen(%d), CmdID(0x%x), reg:0x%x =>h2c_cmd:0x%.8x, reg:0x%x =>h2c_cmd_ex:0x%.8x\n" */ -+ /* ,pHalData->LastHMEBoxNum , CmdLen, ElementID, msgbox_addr, h2c_cmd, msgbox_ex_addr, h2c_cmd_ex); */ -+ -+ pHalData->LastHMEBoxNum = (h2c_box_num + 1) % MAX_H2C_BOX_NUMS; -+ -+ } while (0); -+ -+ ret = _SUCCESS; -+ -+exit: -+ -+ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); -+ -+ -+ return ret; -+} -+ -+/* -+ * Description: Get the reserved page number in Tx packet buffer. -+ * Retrun value: the page number. -+ * 2012.08.09, by tynli. -+ * */ -+u8 GetTxBufferRsvdPageNum8703B(_adapter *padapter, bool wowlan) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 RsvdPageNum = 0; -+ /* default reseved 1 page for the IC type which is undefined. */ -+ u8 TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8703B; -+ -+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&TxPageBndy); -+ -+ RsvdPageNum = LAST_ENTRY_OF_TX_PKT_BUFFER_8703B - TxPageBndy + 1; -+ -+ return RsvdPageNum; -+} -+ -+void rtl8703b_set_FwPwrMode_cmd(PADAPTER padapter, u8 psmode) -+{ -+ u8 smart_ps = 0; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ u8 u1H2CPwrModeParm[H2C_PWRMODE_LEN] = {0}; -+ u8 PowerState = 0, awake_intvl = 1, rlbm = 0; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *wdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ u8 allQueueUAPSD = 0; -+ -+ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ if (psmode == PS_MODE_DTIM) -+ psmode = PS_MODE_MAX; -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ -+ -+ if (pwrpriv->dtim > 0) -+ RTW_INFO("%s(): FW LPS mode = %d, SmartPS=%d, dtim=%d\n", __func__, psmode, pwrpriv->smart_ps, pwrpriv->dtim); -+ else -+ RTW_INFO("%s(): FW LPS mode = %d, SmartPS=%d\n", __func__, psmode, pwrpriv->smart_ps); -+ -+ if (psmode == PS_MODE_MIN) { -+ rlbm = 0; -+ awake_intvl = 2; -+ smart_ps = pwrpriv->smart_ps; -+ } else if (psmode == PS_MODE_MAX) { -+ rlbm = 1; -+ awake_intvl = 2; -+ smart_ps = pwrpriv->smart_ps; -+ } else if (psmode == PS_MODE_DTIM) { /* For WOWLAN LPS, DTIM = (awake_intvl - 1) */ -+ if (pwrpriv->dtim > 0 && pwrpriv->dtim < 16) -+ awake_intvl = pwrpriv->dtim + 1; /* DTIM = (awake_intvl - 1) */ -+ else -+ awake_intvl = 4;/* DTIM=3 */ -+ -+ -+ rlbm = 2; -+ smart_ps = pwrpriv->smart_ps; -+ } else { -+ rlbm = 2; -+ awake_intvl = 4; -+ smart_ps = pwrpriv->smart_ps; -+ } -+ -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(wdinfo, P2P_STATE_NONE)) { -+ awake_intvl = 2; -+ rlbm = 1; -+ } -+#endif /* CONFIG_P2P */ -+ -+ if (padapter->registrypriv.wifi_spec == 1) { -+ awake_intvl = 2; -+ rlbm = 1; -+ } -+ -+ if (psmode > 0) { -+#ifdef CONFIG_BT_COEXIST -+ if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE) -+ PowerState = rtw_btcoex_RpwmVal(padapter); -+ else -+#endif /* CONFIG_BT_COEXIST */ -+ PowerState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ -+ } else -+ PowerState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ -+ -+ SET_8703B_H2CCMD_PWRMODE_PARM_MODE(u1H2CPwrModeParm, (psmode > 0) ? 1 : 0); -+ SET_8703B_H2CCMD_PWRMODE_PARM_SMART_PS(u1H2CPwrModeParm, smart_ps); -+ SET_8703B_H2CCMD_PWRMODE_PARM_RLBM(u1H2CPwrModeParm, rlbm); -+ SET_8703B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1H2CPwrModeParm, awake_intvl); -+ SET_8703B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1H2CPwrModeParm, allQueueUAPSD); -+ SET_8703B_H2CCMD_PWRMODE_PARM_PWR_STATE(u1H2CPwrModeParm, PowerState); -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_RecordPwrMode(padapter, u1H2CPwrModeParm, H2C_PWRMODE_LEN); -+#endif /* CONFIG_BT_COEXIST */ -+ -+ RTW_DBG_DUMP("u1H2CPwrModeParm:", u1H2CPwrModeParm, H2C_PWRMODE_LEN); -+ -+ FillH2CCmd8703B(padapter, H2C_8703B_SET_PWR_MODE, H2C_PWRMODE_LEN, u1H2CPwrModeParm); -+} -+ -+void rtl8703b_set_FwPsTuneParam_cmd(PADAPTER padapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ u8 u1H2CPsTuneParm[H2C_PSTUNEPARAM_LEN] = {0}; -+ u8 bcn_to_limit = 10; /* 10 * 100 * awakeinterval (ms) */ -+ u8 dtim_timeout = 5; /* ms */ /* wait broadcast data timer */ -+ u8 ps_timeout = 20; /* ms */ /* Keep awake when tx */ -+ u8 dtim_period = 3; -+ -+ /* RTW_INFO("%s(): FW LPS mode = %d\n", __func__, psmode); */ -+ -+ SET_8703B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(u1H2CPsTuneParm, bcn_to_limit); -+ SET_8703B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(u1H2CPsTuneParm, dtim_timeout); -+ SET_8703B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(u1H2CPsTuneParm, ps_timeout); -+ SET_8703B_H2CCMD_PSTUNE_PARM_ADOPT(u1H2CPsTuneParm, 1); -+ SET_8703B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(u1H2CPsTuneParm, dtim_period); -+ -+ RTW_DBG_DUMP("u1H2CPsTuneParm:", u1H2CPsTuneParm, H2C_PSTUNEPARAM_LEN); -+ -+ FillH2CCmd8703B(padapter, H2C_8703B_PS_TUNING_PARA, H2C_PSTUNEPARAM_LEN, u1H2CPsTuneParm); -+} -+ -+void rtl8703b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param) -+{ -+ u8 u1H2CBtMpOperParm[H2C_BTMP_OPER_LEN] = {0}; -+ -+ -+ RTW_INFO("%s: idx=%d ver=%d reqnum=%d param1=0x%02x param2=0x%02x\n", __FUNCTION__, idx, ver, reqnum, param[0], param[1]); -+ -+ SET_8703B_H2CCMD_BT_MPOPER_VER(u1H2CBtMpOperParm, ver); -+ SET_8703B_H2CCMD_BT_MPOPER_REQNUM(u1H2CBtMpOperParm, reqnum); -+ SET_8703B_H2CCMD_BT_MPOPER_IDX(u1H2CBtMpOperParm, idx); -+ SET_8703B_H2CCMD_BT_MPOPER_PARAM1(u1H2CBtMpOperParm, param[0]); -+ SET_8703B_H2CCMD_BT_MPOPER_PARAM2(u1H2CBtMpOperParm, param[1]); -+ SET_8703B_H2CCMD_BT_MPOPER_PARAM3(u1H2CBtMpOperParm, param[2]); -+ -+ RTW_DBG_DUMP("u1H2CBtMpOperParm:", u1H2CBtMpOperParm, H2C_BTMP_OPER_LEN); -+ -+ FillH2CCmd8703B(padapter, H2C_8703B_BT_MP_OPER, H2C_BTMP_OPER_LEN, u1H2CBtMpOperParm); -+} -+ -+void rtl8703b_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param) -+{ -+ /* u8 cmd_param; */ /* BIT0:enable, BIT1:NoConnect32k */ -+ -+ RTW_INFO("%s()\n", __func__); -+ -+ FillH2CCmd8703B(padapter, H2C_8703B_INACTIVE_PS_, 1, &cmd_param); -+ -+} -+ -+void rtl8703b_download_rsvd_page(PADAPTER padapter, u8 mstatus) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ BOOLEAN bcn_valid = _FALSE; -+ u8 DLBcnCount = 0; -+ u32 poll = 0; -+ u8 RegFwHwTxQCtrl; -+ -+ -+ RTW_INFO("+" FUNC_ADPT_FMT ": hw_port=%d mstatus(%x)\n", -+ FUNC_ADPT_ARG(padapter), get_hw_port(padapter), mstatus); -+ -+ if (mstatus == RT_MEDIA_CONNECT) { -+ u8 bcn_ctrl = rtw_read8(padapter, REG_BCN_CTRL); -+ BOOLEAN bRecover = _FALSE; -+ u8 v8; -+ -+ /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */ -+ /* Suggested by filen. Added by tynli. */ -+ rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000 | pmlmeinfo->aid)); -+ -+ /* set REG_CR bit 8 */ -+ v8 = rtw_read8(padapter, REG_CR + 1); -+ v8 |= BIT(0); /* ENSWBCN */ -+ rtw_write8(padapter, REG_CR + 1, v8); -+ -+ /* Disable Hw protection for a time which revserd for Hw sending beacon. */ -+ /* Fix download reserved page packet fail that access collision with the protection time. */ -+ /* 2010.05.11. Added by tynli. */ -+ rtw_write8(padapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT); -+ -+ /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */ -+ RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2); -+ if (RegFwHwTxQCtrl & BIT(6)) -+ bRecover = _TRUE; -+ -+ /* To tell Hw the packet is not a real beacon frame. */ -+ RegFwHwTxQCtrl &= ~BIT(6); -+ rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl); -+ -+ /* Clear beacon valid check bit. */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); -+ rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL); -+ -+ DLBcnCount = 0; -+ poll = 0; -+ do { -+ /* download rsvd page. */ -+ rtw_hal_set_fw_rsvd_page(padapter, _FALSE); -+ DLBcnCount++; -+ do { -+ rtw_yield_os(); -+ /* rtw_mdelay_os(10); */ -+ /* check rsvd page download OK. */ -+ rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid)); -+ poll++; -+ } while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(padapter)); -+ -+ } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter)); -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ ; -+ else if (!bcn_valid) -+ RTW_ERR(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", -+ ADPT_ARG(padapter) , DLBcnCount, poll); -+ else { -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ -+ pwrctl->fw_psmode_iface_id = padapter->iface_id; -+ rtw_hal_set_fw_rsvd_page(padapter, _TRUE); -+ RTW_INFO(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n", -+ ADPT_ARG(padapter), DLBcnCount, poll); -+ } -+ -+ /* restore bcn_ctrl */ -+ rtw_write8(padapter, REG_BCN_CTRL, bcn_ctrl); -+ -+ /* To make sure that if there exists an adapter which would like to send beacon. */ -+ /* If exists, the origianl value of 0x422[6] will be 1, we should check this to */ -+ /* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ -+ /* the beacon cannot be sent by HW. */ -+ /* 2010.06.23. Added by tynli. */ -+ if (bRecover) { -+ RegFwHwTxQCtrl |= BIT(6); -+ rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl); -+ } -+ -+ /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */ -+#ifndef CONFIG_PCI_HCI -+ v8 = rtw_read8(padapter, REG_CR + 1); -+ v8 &= ~BIT(0); /* ~ENSWBCN */ -+ rtw_write8(padapter, REG_CR + 1, v8); -+#endif -+ } -+ -+} -+ -+ -+void rtl8703b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus) -+{ -+ if (mstatus == 1) -+ rtl8703b_download_rsvd_page(padapter, RT_MEDIA_CONNECT); -+} -+ -+#if 0 -+void rtl8703b_set_FwAPReqRPT_cmd(PADAPTER padapter, u32 need_ack) -+{ -+ u8 u1H2CApReqRptParm[H2C_AP_REQ_TXRPT_LEN] = {0}; -+ u8 macid1 = 1, macid2 = 0; -+ -+ RTW_INFO("%s(): need_ack = %d\n", __func__, need_ack); -+ -+ SET_8703B_H2CCMD_APREQRPT_PARM_MACID1(u1H2CApReqRptParm, macid1); -+ SET_8703B_H2CCMD_APREQRPT_PARM_MACID2(u1H2CApReqRptParm, macid2); -+ -+ RTW_DBG_DUMP("u1H2CApReqRptParm:", u1H2CApReqRptParm, H2C_AP_REQ_TXRPT_LEN); -+ FillH2CCmd8703B(padapter, H2C_8703B_AP_REQ_TXRPT, H2C_AP_REQ_TXRPT_LEN, u1H2CApReqRptParm); -+} -+ -+void rtl8703b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack) -+{ -+ rtl8703b_set_FwAPReqRPT_cmd(padapter, need_ack); -+} -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+void rtl8703b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter) -+{ -+ rtl8703b_download_rsvd_page(padapter, RT_MEDIA_CONNECT); -+} -+#endif /* CONFIG_BT_COEXIST */ -+ -+#ifdef CONFIG_P2P -+void rtl8703b_set_p2p_ps_offload_cmd(_adapter *padapter, u8 p2p_ps_state) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ struct P2P_PS_Offload_t *p2p_ps_offload = (struct P2P_PS_Offload_t *)(&pHalData->p2p_ps_offload); -+ u8 i; -+ -+ -+#if 1 -+ switch (p2p_ps_state) { -+ case P2P_PS_DISABLE: -+ RTW_INFO("P2P_PS_DISABLE\n"); -+ _rtw_memset(p2p_ps_offload, 0 , 1); -+ break; -+ case P2P_PS_ENABLE: -+ RTW_INFO("P2P_PS_ENABLE\n"); -+ /* update CTWindow value. */ -+ if (pwdinfo->ctwindow > 0) { -+ p2p_ps_offload->CTWindow_En = 1; -+ rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow); -+ } -+ -+ /* hw only support 2 set of NoA */ -+ for (i = 0 ; i < pwdinfo->noa_num ; i++) { -+ /* To control the register setting for which NOA */ -+ rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4)); -+ if (i == 0) -+ p2p_ps_offload->NoA0_En = 1; -+ else -+ p2p_ps_offload->NoA1_En = 1; -+ -+ /* config P2P NoA Descriptor Register */ -+ /* RTW_INFO("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); */ -+ rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); -+ -+ /* RTW_INFO("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); */ -+ rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); -+ -+ /* RTW_INFO("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); */ -+ rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); -+ -+ /* RTW_INFO("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); */ -+ rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]); -+ } -+ -+ if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) { -+ /* rst p2p circuit */ -+ rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); -+ -+ p2p_ps_offload->Offload_En = 1; -+ -+ if (pwdinfo->role == P2P_ROLE_GO) { -+ p2p_ps_offload->role = 1; -+ p2p_ps_offload->AllStaSleep = 0; -+ } else -+ p2p_ps_offload->role = 0; -+ -+ p2p_ps_offload->discovery = 0; -+ } -+ break; -+ case P2P_PS_SCAN: -+ RTW_INFO("P2P_PS_SCAN\n"); -+ p2p_ps_offload->discovery = 1; -+ break; -+ case P2P_PS_SCAN_DONE: -+ RTW_INFO("P2P_PS_SCAN_DONE\n"); -+ p2p_ps_offload->discovery = 0; -+ pwdinfo->p2p_ps_state = P2P_PS_ENABLE; -+ break; -+ default: -+ break; -+ } -+ -+ FillH2CCmd8703B(padapter, H2C_8703B_P2P_PS_OFFLOAD, 1, (u8 *)p2p_ps_offload); -+#endif -+ -+ -+} -+#endif /* CONFIG_P2P */ -+ -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_dm.c b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_dm.c -new file mode 100644 -index 000000000000..fece396bb4d7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_dm.c -@@ -0,0 +1,307 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/* ************************************************************ -+ * Description: -+ * -+ * This file is for 92CE/92CU dynamic mechanism only -+ * -+ * -+ * ************************************************************ */ -+#define _RTL8703B_DM_C_ -+ -+/* ************************************************************ -+ * include files -+ * ************************************************************ */ -+#include -+ -+/* ************************************************************ -+ * Global var -+ * ************************************************************ */ -+#ifdef CONFIG_SUPPORT_HW_WPS_PBC -+static void dm_CheckPbcGPIO(_adapter *padapter) -+{ -+ u8 tmp1byte; -+ u8 bPbcPressed = _FALSE; -+ -+ if (!padapter->registrypriv.hw_wps_pbc) -+ return; -+ -+#ifdef CONFIG_USB_HCI -+ tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); -+ tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT); -+ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */ -+ -+ tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); -+ rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */ -+ -+ tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); -+ tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); -+ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */ -+ -+ tmp1byte = rtw_read8(padapter, GPIO_IN); -+ -+ if (tmp1byte == 0xff) -+ return ; -+ -+ if (tmp1byte & HAL_8192C_HW_GPIO_WPS_BIT) -+ bPbcPressed = _TRUE; -+#else -+ tmp1byte = rtw_read8(padapter, GPIO_IN); -+ -+ if (tmp1byte == 0xff || padapter->init_adpt_in_progress) -+ return ; -+ -+ if ((tmp1byte & HAL_8192C_HW_GPIO_WPS_BIT) == 0) -+ bPbcPressed = _TRUE; -+#endif -+ -+ if (_TRUE == bPbcPressed) { -+ /* Here we only set bPbcPressed to true */ -+ /* After trigger PBC, the variable will be set to false */ -+ RTW_INFO("CheckPbcGPIO - PBC is pressed\n"); -+ rtw_request_wps_pbc_event(padapter); -+ } -+} -+#endif /* #ifdef CONFIG_SUPPORT_HW_WPS_PBC */ -+ -+ -+#ifdef CONFIG_PCI_HCI -+/* -+ * Description: -+ * Perform interrupt migration dynamically to reduce CPU utilization. -+ * -+ * Assumption: -+ * 1. Do not enable migration under WIFI test. -+ * -+ * Created by Roger, 2010.03.05. -+ * */ -+void -+dm_InterruptMigration( -+ PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -+ BOOLEAN bCurrentIntMt, bCurrentACIntDisable; -+ BOOLEAN IntMtToSet = _FALSE; -+ BOOLEAN ACIntToSet = _FALSE; -+ -+ -+ /* Retrieve current interrupt migration and Tx four ACs IMR settings first. */ -+ bCurrentIntMt = pHalData->bInterruptMigration; -+ bCurrentACIntDisable = pHalData->bDisableTxInt; -+ -+ /* */ -+ /* Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics */ -+ /* when interrupt migration is set before. 2010.03.05. */ -+ /* */ -+ if (!Adapter->registrypriv.wifi_spec && -+ (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) && -+ pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) { -+ IntMtToSet = _TRUE; -+ -+ /* To check whether we should disable Tx interrupt or not. */ -+ if (pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic) -+ ACIntToSet = _TRUE; -+ } -+ -+ /* Update current settings. */ -+ if (bCurrentIntMt != IntMtToSet) { -+ RTW_INFO("%s(): Update interrrupt migration(%d)\n", __FUNCTION__, IntMtToSet); -+ if (IntMtToSet) { -+ /* */ -+ /* Set interrrupt migration timer and corresponging Tx/Rx counter. */ -+ /* timer 25ns*0xfa0=100us for 0xf packets. */ -+ /* 2010.03.05. */ -+ /* */ -+ rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);/* 0x306:Rx, 0x307:Tx */ -+ pHalData->bInterruptMigration = IntMtToSet; -+ } else { -+ /* Reset all interrupt migration settings. */ -+ rtw_write32(Adapter, REG_INT_MIG, 0); -+ pHalData->bInterruptMigration = IntMtToSet; -+ } -+ } -+ -+#if 0 -+ if (bCurrentACIntDisable != ACIntToSet) { -+ RTW_INFO("%s(): Update AC interrrupt(%d)\n", __FUNCTION__, ACIntToSet); -+ if (ACIntToSet) { /* Disable four ACs interrupts. */ -+ /* */ -+ /* Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. */ -+ /* When extremely highly Rx OK occurs, we will disable Tx interrupts. */ -+ /* 2010.03.05. */ -+ /* */ -+ UpdateInterruptMask8192CE(Adapter, 0, RT_AC_INT_MASKS); -+ pHalData->bDisableTxInt = ACIntToSet; -+ } else { /* Enable four ACs interrupts. */ -+ UpdateInterruptMask8192CE(Adapter, RT_AC_INT_MASKS, 0); -+ pHalData->bDisableTxInt = ACIntToSet; -+ } -+ } -+#endif -+ -+} -+ -+#endif -+ -+/* -+ * Initialize GPIO setting registers -+ * */ -+#ifdef CONFIG_USB_HCI -+static void -+dm_InitGPIOSetting( -+ PADAPTER Adapter -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ -+ u8 tmp1byte; -+ -+ tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); -+ tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); -+ -+ rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); -+} -+#endif -+/* ************************************************************ -+ * functions -+ * ************************************************************ */ -+static void Init_ODM_ComInfo_8703b(PADAPTER Adapter) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -+ u8 cut_ver, fab_ver; -+ -+ Init_ODM_ComInfo(Adapter); -+ -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_PACKAGE_TYPE, pHalData->PackageType); -+ -+ fab_ver = ODM_TSMC; -+ cut_ver = GET_CVID_CUT_VERSION(pHalData->version_id); -+ -+ RTW_INFO("%s(): Fv=%d Cv=%d\n", __func__, fab_ver, cut_ver); -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_FAB_VER, fab_ver); -+ odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_CUT_VER, cut_ver); -+} -+ -+void -+rtl8703b_InitHalDm( -+ PADAPTER Adapter -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -+ -+#ifdef CONFIG_USB_HCI -+ dm_InitGPIOSetting(Adapter); -+#endif -+ rtw_phydm_init(Adapter); -+} -+ -+void -+rtl8703b_HalDmWatchDog( -+ PADAPTER Adapter -+) -+{ -+ BOOLEAN bFwCurrentInPSMode = _FALSE; -+ u8 bFwPSAwake = _TRUE; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); -+ u8 in_lps = _FALSE; -+ -+#ifdef CONFIG_MP_INCLUDED -+ /* #if MP_DRIVER */ -+ if (Adapter->registrypriv.mp_mode == 1 && Adapter->mppriv.mp_dm == 0) /* for MP power tracking */ -+ return; -+ /* #endif */ -+#endif -+ -+ if (!rtw_is_hw_init_completed(Adapter)) -+ goto skip_dm; -+ -+#ifdef CONFIG_LPS -+ bFwCurrentInPSMode = pwrpriv->bFwCurrentInPSMode; -+ rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, &bFwPSAwake); -+#endif -+ -+#ifdef CONFIG_P2P -+ /* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */ -+ /* modifed by thomas. 2011.06.11. */ -+ if (Adapter->wdinfo.p2p_ps_mode) -+ bFwPSAwake = _FALSE; -+#endif /* CONFIG_P2P */ -+ -+ -+ if ((rtw_is_hw_init_completed(Adapter)) -+ && ((!bFwCurrentInPSMode) && bFwPSAwake)) { -+ -+ rtw_hal_check_rxfifo_full(Adapter); -+ /* */ -+ /* Dynamically switch RTS/CTS protection. */ -+ /* */ -+ -+#ifdef CONFIG_PCI_HCI -+ /* 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. */ -+ /* Tx Migration settings. */ -+ /* dm_InterruptMigration(Adapter); */ -+ -+ /* if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) */ -+ /* PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); */ -+#endif -+ } -+ -+#ifdef CONFIG_DISABLE_ODM -+ goto skip_dm; -+#endif -+#ifdef CONFIG_LPS -+ if (pwrpriv->bLeisurePs && bFwCurrentInPSMode && pwrpriv->pwr_mode != PS_MODE_ACTIVE) -+ in_lps = _TRUE; -+#endif -+ -+ rtw_phydm_watchdog(Adapter, in_lps); -+ -+skip_dm: -+ -+ /* Check GPIO to determine current RF on/off and Pbc status. */ -+ /* Check Hardware Radio ON/OFF or not */ -+ /* if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) */ -+ /* { */ -+ /* RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO\n")); */ -+ /* dm_CheckRfCtrlGPIO(Adapter); */ -+ /* } */ -+#ifdef CONFIG_SUPPORT_HW_WPS_PBC -+ dm_CheckPbcGPIO(Adapter); -+#endif -+ return; -+} -+ -+void rtl8703b_init_dm_priv(PADAPTER Adapter) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ struct dm_struct *podmpriv = &pHalData->odmpriv; -+ Init_ODM_ComInfo_8703b(Adapter); -+ odm_init_all_timers(podmpriv); -+ -+} -+ -+void rtl8703b_deinit_dm_priv(PADAPTER Adapter) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ struct dm_struct *podmpriv = &pHalData->odmpriv; -+ -+ odm_cancel_all_timers(podmpriv); -+ -+} -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_hal_init.c b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_hal_init.c -new file mode 100644 -index 000000000000..dbbd42f128e8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_hal_init.c -@@ -0,0 +1,5565 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _HAL_INIT_C_ -+ -+#include -+#include "hal_com_h2c.h" -+#include -+#include "hal8703b_fw.h" -+#define FW_DOWNLOAD_SIZE_8703B 8192 -+ -+static void -+_FWDownloadEnable( -+ PADAPTER padapter, -+ BOOLEAN enable -+) -+{ -+ u8 tmp, count = 0; -+ -+ if (enable) { -+ /* 8051 enable */ -+ tmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1); -+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, tmp | 0x04); -+ -+ tmp = rtw_read8(padapter, REG_MCUFWDL); -+ rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01); -+ -+ do { -+ tmp = rtw_read8(padapter, REG_MCUFWDL); -+ if (tmp & 0x01) -+ break; -+ rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01); -+ rtw_msleep_os(1); -+ } while (count++ < 100); -+ if (count > 0) -+ RTW_INFO("%s: !!!!!!!!Write 0x80 Fail!: count = %d\n", __func__, count); -+ -+ /* 8051 reset */ -+ tmp = rtw_read8(padapter, REG_MCUFWDL + 2); -+ rtw_write8(padapter, REG_MCUFWDL + 2, tmp & 0xf7); -+ } else { -+ /* MCU firmware download disable. */ -+ tmp = rtw_read8(padapter, REG_MCUFWDL); -+ rtw_write8(padapter, REG_MCUFWDL, tmp & 0xfe); -+ } -+} -+ -+static int -+_BlockWrite( -+ PADAPTER padapter, -+ void *buffer, -+ u32 buffSize -+) -+{ -+ int ret = _SUCCESS; -+ -+ u32 blockSize_p1 = 4; /* (Default) Phase #1 : PCI muse use 4-byte write to download FW */ -+ u32 blockSize_p2 = 8; /* Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. */ -+ u32 blockSize_p3 = 1; /* Phase #3 : Use 1-byte, the remnant of FW image. */ -+ u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0; -+ u32 remainSize_p1 = 0, remainSize_p2 = 0; -+ u8 *bufferPtr = (u8 *)buffer; -+ u32 i = 0, offset = 0; -+#ifdef CONFIG_PCI_HCI -+ u8 remainFW[4] = {0, 0, 0, 0}; -+ u8 *p = NULL; -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ blockSize_p1 = 254; -+#endif -+ -+ /* printk("====>%s %d\n", __func__, __LINE__); */ -+ -+ /* 3 Phase #1 */ -+ blockCount_p1 = buffSize / blockSize_p1; -+ remainSize_p1 = buffSize % blockSize_p1; -+ -+ -+ -+ for (i = 0; i < blockCount_p1; i++) { -+#ifdef CONFIG_USB_HCI -+ ret = rtw_writeN(padapter, (FW_8703B_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1)); -+#else -+ ret = rtw_write32(padapter, (FW_8703B_START_ADDRESS + i * blockSize_p1), le32_to_cpu(*((u32 *)(bufferPtr + i * blockSize_p1)))); -+#endif -+ if (ret == _FAIL) { -+ printk("====>%s %d i:%d\n", __func__, __LINE__, i); -+ goto exit; -+ } -+ } -+ -+#ifdef CONFIG_PCI_HCI -+ p = (u8 *)((u32 *)(bufferPtr + blockCount_p1 * blockSize_p1)); -+ if (remainSize_p1) { -+ switch (remainSize_p1) { -+ case 0: -+ break; -+ case 3: -+ remainFW[2] = *(p + 2); -+ case 2: -+ remainFW[1] = *(p + 1); -+ case 1: -+ remainFW[0] = *(p); -+ ret = rtw_write32(padapter, (FW_8703B_START_ADDRESS + blockCount_p1 * blockSize_p1), -+ le32_to_cpu(*(u32 *)remainFW)); -+ } -+ return ret; -+ } -+#endif -+ -+ /* 3 Phase #2 */ -+ if (remainSize_p1) { -+ offset = blockCount_p1 * blockSize_p1; -+ -+ blockCount_p2 = remainSize_p1 / blockSize_p2; -+ remainSize_p2 = remainSize_p1 % blockSize_p2; -+ -+ -+ -+#ifdef CONFIG_USB_HCI -+ for (i = 0; i < blockCount_p2; i++) { -+ ret = rtw_writeN(padapter, (FW_8703B_START_ADDRESS + offset + i * blockSize_p2), blockSize_p2, (bufferPtr + offset + i * blockSize_p2)); -+ -+ if (ret == _FAIL) -+ goto exit; -+ } -+#endif -+ } -+ -+ /* 3 Phase #3 */ -+ if (remainSize_p2) { -+ offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2); -+ -+ blockCount_p3 = remainSize_p2 / blockSize_p3; -+ -+ -+ for (i = 0 ; i < blockCount_p3 ; i++) { -+ ret = rtw_write8(padapter, (FW_8703B_START_ADDRESS + offset + i), *(bufferPtr + offset + i)); -+ -+ if (ret == _FAIL) { -+ printk("====>%s %d i:%d\n", __func__, __LINE__, i); -+ goto exit; -+ } -+ } -+ } -+exit: -+ return ret; -+} -+ -+static int -+_PageWrite( -+ PADAPTER padapter, -+ u32 page, -+ void *buffer, -+ u32 size -+) -+{ -+ u8 value8; -+ u8 u8Page = (u8)(page & 0x07) ; -+ -+ value8 = (rtw_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page ; -+ rtw_write8(padapter, REG_MCUFWDL + 2, value8); -+ -+ return _BlockWrite(padapter, buffer, size); -+} -+#ifdef CONFIG_PCI_HCI -+static void -+_FillDummy( -+ u8 *pFwBuf, -+ u32 *pFwLen -+) -+{ -+ u32 FwLen = *pFwLen; -+ u8 remain = (u8)(FwLen % 4); -+ remain = (remain == 0) ? 0 : (4 - remain); -+ -+ while (remain > 0) { -+ pFwBuf[FwLen] = 0; -+ FwLen++; -+ remain--; -+ } -+ -+ *pFwLen = FwLen; -+} -+#endif -+static int -+_WriteFW( -+ PADAPTER padapter, -+ void *buffer, -+ u32 size -+) -+{ -+ /* Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */ -+ int ret = _SUCCESS; -+ u32 pageNums, remainSize ; -+ u32 page, offset; -+ u8 *bufferPtr = (u8 *)buffer; -+ -+#ifdef CONFIG_PCI_HCI -+ /* 20100120 Joseph: Add for 88CE normal chip. */ -+ /* Fill in zero to make firmware image to dword alignment. */ -+ _FillDummy(bufferPtr, &size); -+#endif -+ -+ pageNums = size / MAX_DLFW_PAGE_SIZE ; -+ /* RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4\n")); */ -+ remainSize = size % MAX_DLFW_PAGE_SIZE; -+ -+ for (page = 0; page < pageNums; page++) { -+ offset = page * MAX_DLFW_PAGE_SIZE; -+ ret = _PageWrite(padapter, page, bufferPtr + offset, MAX_DLFW_PAGE_SIZE); -+ -+ if (ret == _FAIL) { -+ printk("====>%s %d\n", __func__, __LINE__); -+ goto exit; -+ } -+ } -+ if (remainSize) { -+ offset = pageNums * MAX_DLFW_PAGE_SIZE; -+ page = pageNums; -+ ret = _PageWrite(padapter, page, bufferPtr + offset, remainSize); -+ -+ if (ret == _FAIL) { -+ printk("====>%s %d\n", __func__, __LINE__); -+ goto exit; -+ } -+ } -+ -+exit: -+ return ret; -+} -+ -+void _8051Reset8703(PADAPTER padapter) -+{ -+ u8 cpu_rst; -+ u8 io_rst; -+ -+#if 0 -+ io_rst = rtw_read8(padapter, REG_RSV_CTRL); -+ rtw_write8(padapter, REG_RSV_CTRL, io_rst & (~BIT1)); -+#endif -+ -+ /* Reset 8051(WLMCU) IO wrapper */ -+ /* 0x1c[8] = 0 */ -+ /* Suggested by Isaac@SD1 and Gimmy@SD1, coding by Lucas@20130624 */ -+ io_rst = rtw_read8(padapter, REG_RSV_CTRL + 1); -+ io_rst &= ~BIT(0); -+ rtw_write8(padapter, REG_RSV_CTRL + 1, io_rst); -+ -+ cpu_rst = rtw_read8(padapter, REG_SYS_FUNC_EN + 1); -+ cpu_rst &= ~BIT(2); -+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, cpu_rst); -+ -+#if 0 -+ io_rst = rtw_read8(padapter, REG_RSV_CTRL); -+ rtw_write8(padapter, REG_RSV_CTRL, io_rst & (~BIT1)); -+#endif -+ -+ /* Enable 8051 IO wrapper */ -+ /* 0x1c[8] = 1 */ -+ io_rst = rtw_read8(padapter, REG_RSV_CTRL + 1); -+ io_rst |= BIT(0); -+ rtw_write8(padapter, REG_RSV_CTRL + 1, io_rst); -+ -+ cpu_rst = rtw_read8(padapter, REG_SYS_FUNC_EN + 1); -+ cpu_rst |= BIT(2); -+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, cpu_rst); -+ -+ RTW_INFO("%s: Finish\n", __FUNCTION__); -+} -+ -+static s32 polling_fwdl_chksum(_adapter *adapter, u32 min_cnt, u32 timeout_ms) -+{ -+ s32 ret = _FAIL; -+ u32 value32; -+ systime start = rtw_get_current_time(); -+ u32 cnt = 0; -+ -+ /* polling CheckSum report */ -+ do { -+ cnt++; -+ value32 = rtw_read32(adapter, REG_MCUFWDL); -+ if (value32 & FWDL_ChkSum_rpt || RTW_CANNOT_IO(adapter)) -+ break; -+ rtw_yield_os(); -+ } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); -+ -+ if (!(value32 & FWDL_ChkSum_rpt)) -+ goto exit; -+ -+ if (rtw_fwdl_test_trigger_chksum_fail()) -+ goto exit; -+ -+ ret = _SUCCESS; -+ -+exit: -+ RTW_INFO("%s: Checksum report %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__ -+ , (ret == _SUCCESS) ? "OK" : "Fail", cnt, rtw_get_passing_time_ms(start), value32); -+ -+ return ret; -+} -+ -+static s32 _FWFreeToGo(_adapter *adapter, u32 min_cnt, u32 timeout_ms) -+{ -+ s32 ret = _FAIL; -+ u32 value32; -+ systime start = rtw_get_current_time(); -+ u32 cnt = 0; -+ u32 value_to_check = 0; -+ u32 value_expected = (MCUFWDL_RDY | FWDL_ChkSum_rpt | WINTINI_RDY | RAM_DL_SEL); -+ -+ value32 = rtw_read32(adapter, REG_MCUFWDL); -+ value32 |= MCUFWDL_RDY; -+ value32 &= ~WINTINI_RDY; -+ rtw_write32(adapter, REG_MCUFWDL, value32); -+ -+ _8051Reset8703(adapter); -+ -+ /* polling for FW ready */ -+ do { -+ cnt++; -+ value32 = rtw_read32(adapter, REG_MCUFWDL); -+ value_to_check = value32 & value_expected; -+ if ((value_to_check == value_expected) || RTW_CANNOT_IO(adapter)) -+ break; -+ rtw_yield_os(); -+ } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); -+ -+ if (value_to_check != value_expected) -+ goto exit; -+ -+ if (rtw_fwdl_test_trigger_wintint_rdy_fail()) -+ goto exit; -+ -+ ret = _SUCCESS; -+ -+exit: -+ RTW_INFO("%s: Polling FW ready %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__ -+ , (ret == _SUCCESS) ? "OK" : "Fail", cnt, rtw_get_passing_time_ms(start), value32); -+ -+ return ret; -+} -+ -+#define IS_FW_81xxC(padapter) (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0) -+ -+void rtl8703b_FirmwareSelfReset(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 u1bTmp; -+ u8 Delay = 100; -+ -+ if (!(IS_FW_81xxC(padapter) && -+ ((pHalData->firmware_version < 0x21) || -+ (pHalData->firmware_version == 0x21 && -+ pHalData->firmware_sub_version < 0x01)))) { /* after 88C Fw v33.1 */ -+ /* 0x1cf=0x20. Inform 8051 to reset. 2009.12.25. tynli_test */ -+ rtw_write8(padapter, REG_HMETFR + 3, 0x20); -+ -+ u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1); -+ while (u1bTmp & BIT2) { -+ Delay--; -+ if (Delay == 0) -+ break; -+ rtw_udelay_os(50); -+ u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1); -+ } -+ -+ if (Delay == 0) { -+ /* force firmware reset */ -+ u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1); -+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp & (~BIT2)); -+ } -+ } -+} -+ -+#ifdef CONFIG_FILE_FWIMG -+ extern char *rtw_fw_file_path; -+ extern char *rtw_fw_wow_file_path; -+ #ifdef CONFIG_MP_INCLUDED -+ extern char *rtw_fw_mp_bt_file_path; -+ #endif /* CONFIG_MP_INCLUDED */ -+ u8 FwBuffer[FW_8703B_SIZE]; -+#endif /* CONFIG_FILE_FWIMG */ -+ -+#ifdef CONFIG_MP_INCLUDED -+int _WriteBTFWtoTxPktBuf8703B( -+ PADAPTER Adapter, -+ void *buffer, -+ u32 FwBufLen, -+ u8 times -+) -+{ -+ int rtStatus = _SUCCESS; -+ /* u32 value32; */ -+ /* u8 numHQ, numLQ, numPubQ; */ /* , txpktbuf_bndy; */ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ /* PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); */ -+ u8 BcnValidReg; -+ u8 count = 0, DLBcnCount = 0; -+ u8 *FwbufferPtr = (u8 *)buffer; -+ /* PRT_TCB pTcb, ptempTcb; */ -+ /* PRT_TX_LOCAL_BUFFER pBuf; */ -+ -+ u8 *ReservedPagePacket = NULL; -+ u8 *pGenBufReservedPagePacket = NULL; -+ u32 TotalPktLen, txpktbuf_bndy; -+ /* u8 tmpReg422; */ -+ /* u8 u1bTmp; */ -+ u8 *pframe; -+ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ u8 txdesc_offset = TXDESC_OFFSET; -+ u8 val8, RegFwHwTxQCtrl; -+#ifdef CONFIG_PCI_HCI -+ u8 u1bTmp; -+#endif -+ -+#if 1/* #ifdef CONFIG_PCI_HCI */ -+ TotalPktLen = FwBufLen; -+#else -+ TotalPktLen = FwBufLen + pHalData->HWDescHeadLength; -+#endif -+ -+ if ((TotalPktLen + TXDESC_OFFSET) > MAX_CMDBUF_SZ) { -+ RTW_INFO(" WARNING %s => Total packet len = %d > MAX_CMDBUF_SZ:%d\n" -+ , __FUNCTION__, (TotalPktLen + TXDESC_OFFSET), MAX_CMDBUF_SZ); -+ return _FAIL; -+ } -+ -+ pGenBufReservedPagePacket = rtw_zmalloc(TotalPktLen);/* GetGenTempBuffer (Adapter, TotalPktLen); */ -+ if (!pGenBufReservedPagePacket) -+ return _FAIL; -+ -+ ReservedPagePacket = (u8 *)pGenBufReservedPagePacket; -+ -+ _rtw_memset(ReservedPagePacket, 0, TotalPktLen); -+ -+#if 1/* #ifdef CONFIG_PCI_HCI */ -+ _rtw_memcpy(ReservedPagePacket, FwbufferPtr, FwBufLen); -+ -+#else -+ PlatformMoveMemory(ReservedPagePacket + Adapter->HWDescHeadLength , FwbufferPtr, FwBufLen); -+#endif -+ -+ /* --------------------------------------------------------- */ -+ /* 1. Pause BCN */ -+ /* --------------------------------------------------------- */ -+ /* Set REG_CR bit 8. DMA beacon by SW. */ -+#ifdef CONFIG_PCI_HCI -+ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR + 1); -+ PlatformEFIOWrite1Byte(Adapter, REG_CR + 1, (u1bTmp | BIT0)); -+#else -+ /* Remove for temparaily because of the code on v2002 is not sync to MERGE_TMEP for USB/SDIO. */ -+ /* De not remove this part on MERGE_TEMP. by tynli. */ -+#endif -+ -+ /* Disable Hw protection for a time which revserd for Hw sending beacon. */ -+ /* Fix download reserved page packet fail that access collision with the protection time. */ -+ /* 2010.05.11. Added by tynli. */ -+ val8 = rtw_read8(Adapter, REG_BCN_CTRL); -+ val8 &= ~EN_BCN_FUNCTION; -+ val8 |= DIS_TSF_UDT; -+ rtw_write8(Adapter, REG_BCN_CTRL, val8); -+ -+#if 0/* #ifdef CONFIG_PCI_HCI */ -+ tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL + 2); -+ if (tmpReg422 & BIT6) -+ bRecover = TRUE; -+ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL + 2, tmpReg422 & (~BIT6)); -+#else -+ /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */ -+ RegFwHwTxQCtrl = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL + 2); -+ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl & (~BIT6)); -+#endif -+ -+ /* --------------------------------------------------------- */ -+ /* 2. Adjust LLT table to an even boundary. */ -+ /* --------------------------------------------------------- */ -+#if 0/* #ifdef CONFIG_SDIO_HCI */ -+ txpktbuf_bndy = 10; /* rsvd page start address should be an even value. */ -+ rtStatus = InitLLTTable8703BS(Adapter, txpktbuf_bndy); -+ if (RT_STATUS_SUCCESS != rtStatus) { -+ RTW_INFO("_CheckWLANFwPatchBTFwReady_8703B(): Failed to init LLT!\n"); -+ return RT_STATUS_FAILURE; -+ } -+ -+ /* Init Tx boundary. */ -+ PlatformEFIOWrite1Byte(Adapter, REG_DWBCN0_CTRL_8703B + 1, (u8)txpktbuf_bndy); -+#endif -+ -+ -+ /* --------------------------------------------------------- */ -+ /* 3. Write Fw to Tx packet buffer by reseverd page. */ -+ /* --------------------------------------------------------- */ -+ do { -+ /* download rsvd page. */ -+ /* Clear beacon valid check bit. */ -+ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL + 2); -+ PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL + 2, BcnValidReg & (~BIT(0))); -+ -+ /* BT patch is big, we should set 0x209 < 0x40 suggested from Gimmy */ -+ -+ PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL + 1, (0x90 - 0x20 * (times - 1))); -+ RTW_INFO("0x209:0x%x\n", PlatformEFIORead1Byte(Adapter, REG_TDECTRL + 1)); -+ -+#if 0 -+ /* Acquice TX spin lock before GetFwBuf and send the packet to prevent system deadlock. */ -+ /* Advertised by Roger. Added by tynli. 2010.02.22. */ -+ PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); -+ if (MgntGetFWBuffer(Adapter, &pTcb, &pBuf)) { -+ PlatformMoveMemory(pBuf->Buffer.VirtualAddress, ReservedPagePacket, TotalPktLen); -+ CmdSendPacket(Adapter, pTcb, pBuf, TotalPktLen, DESC_PACKET_TYPE_NORMAL, FALSE); -+ } else -+ dbgdump("SetFwRsvdPagePkt(): MgntGetFWBuffer FAIL!!!!!!!!.\n"); -+ PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); -+#else -+ /*--------------------------------------------------------- -+ tx reserved_page_packet -+ ----------------------------------------------------------*/ -+ pmgntframe = rtw_alloc_cmdxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ rtStatus = _FAIL; -+ goto exit; -+ } -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(Adapter, pattrib); -+ -+ pattrib->qsel = QSLT_BEACON; -+ pattrib->pktlen = pattrib->last_txcmdsz = FwBufLen ; -+ -+ /* _rtw_memset(pmgntframe->buf_addr, 0, TotalPktLen+txdesc_size); */ -+ /* pmgntframe->buf_addr = ReservedPagePacket ; */ -+ -+ _rtw_memcpy((u8 *)(pmgntframe->buf_addr + txdesc_offset), ReservedPagePacket, FwBufLen); -+ RTW_INFO("[%d]===>TotalPktLen + TXDESC_OFFSET TotalPacketLen:%d\n", DLBcnCount, (FwBufLen + txdesc_offset)); -+ -+#ifdef CONFIG_PCI_HCI -+ dump_mgntframe(Adapter, pmgntframe); -+#else -+ dump_mgntframe_and_wait(Adapter, pmgntframe, 100); -+#endif -+ -+#endif -+#if 1 -+ /* check rsvd page download OK. */ -+ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL + 2); -+ while (!(BcnValidReg & BIT(0)) && count < 200) { -+ count++; -+ /* PlatformSleepUs(10); */ -+ rtw_msleep_os(1); -+ BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_TDECTRL + 2); -+ } -+ DLBcnCount++; -+ /* RTW_INFO("##0x208:%08x,0x210=%08x\n",PlatformEFIORead4Byte(Adapter, REG_TDECTRL),PlatformEFIORead4Byte(Adapter, 0x210)); */ -+ -+ PlatformEFIOWrite1Byte(Adapter, REG_TDECTRL + 2, BcnValidReg); -+ -+ } while ((!(BcnValidReg & BIT(0))) && DLBcnCount < 5); -+ -+ -+#endif -+ if (DLBcnCount >= 5) { -+ RTW_INFO(" check rsvd page download OK DLBcnCount =%d\n", DLBcnCount); -+ rtStatus = _FAIL; -+ goto exit; -+ } -+ -+ if (!(BcnValidReg & BIT(0))) { -+ RTW_INFO("_WriteFWtoTxPktBuf(): 1 Download RSVD page failed!\n"); -+ rtStatus = _FAIL; -+ goto exit; -+ } -+ -+ /* --------------------------------------------------------- */ -+ /* 4. Set Tx boundary to the initial value */ -+ /* --------------------------------------------------------- */ -+ -+ -+ /* --------------------------------------------------------- */ -+ /* 5. Reset beacon setting to the initial value. */ -+ /* After _CheckWLANFwPatchBTFwReady(). */ -+ /* --------------------------------------------------------- */ -+ -+exit: -+ -+ if (pGenBufReservedPagePacket) { -+ RTW_INFO("_WriteBTFWtoTxPktBuf8703B => rtw_mfree pGenBufReservedPagePacket!\n"); -+ rtw_mfree((u8 *)pGenBufReservedPagePacket, TotalPktLen); -+ } -+ return rtStatus; -+} -+ -+ -+ -+/* -+ * Description: Determine the contents of H2C BT_FW_PATCH Command sent to FW. -+ * 2011.10.20 by tynli -+ * */ -+void -+SetFwBTFwPatchCmd( -+ PADAPTER Adapter, -+ u16 FwSize -+) -+{ -+ u8 u1BTFwPatchParm[H2C_BT_FW_PATCH_LEN] = {0}; -+ u8 addr0 = 0; -+ u8 addr1 = 0xa0; -+ u8 addr2 = 0x10; -+ u8 addr3 = 0x80; -+ -+ -+ SET_8703B_H2CCMD_BT_FW_PATCH_SIZE(u1BTFwPatchParm, FwSize); -+ SET_8703B_H2CCMD_BT_FW_PATCH_ADDR0(u1BTFwPatchParm, addr0); -+ SET_8703B_H2CCMD_BT_FW_PATCH_ADDR1(u1BTFwPatchParm, addr1); -+ SET_8703B_H2CCMD_BT_FW_PATCH_ADDR2(u1BTFwPatchParm, addr2); -+ SET_8703B_H2CCMD_BT_FW_PATCH_ADDR3(u1BTFwPatchParm, addr3); -+ -+ FillH2CCmd8703B(Adapter, H2C_8703B_BT_FW_PATCH, H2C_BT_FW_PATCH_LEN, u1BTFwPatchParm); -+ -+} -+ -+void -+SetFwBTPwrCmd( -+ PADAPTER Adapter, -+ u8 PwrIdx -+) -+{ -+ u8 u1BTPwrIdxParm[H2C_FORCE_BT_TXPWR_LEN] = {0}; -+ -+ SET_8703B_H2CCMD_BT_PWR_IDX(u1BTPwrIdxParm, PwrIdx); -+ -+ -+ FillH2CCmd8703B(Adapter, H2C_8703B_FORCE_BT_TXPWR, H2C_FORCE_BT_TXPWR_LEN, u1BTPwrIdxParm); -+} -+ -+/* -+ * Description: WLAN Fw will write BT Fw to BT XRAM and signal driver. -+ * -+ * 2011.10.20. by tynli. -+ * */ -+int -+_CheckWLANFwPatchBTFwReady( -+ PADAPTER Adapter, -+ BOOLEAN bRecover -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u32 count = 0; -+ u8 u1bTmp; -+ int ret = _FAIL; -+ -+ /* --------------------------------------------------------- */ -+ /* Check if BT FW patch procedure is ready. */ -+ /* --------------------------------------------------------- */ -+ do { -+ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_HMEBOX_DBG_0_8703B); -+ if ((u1bTmp & BIT6) || (u1bTmp & BIT7)) { -+ ret = _SUCCESS; -+ break; -+ } -+ -+ count++; -+ rtw_msleep_os(50); /* 50ms */ -+ } while (!((u1bTmp & BIT6) || (u1bTmp & BIT7)) && count < 50); -+ -+ -+ -+ -+ /* --------------------------------------------------------- */ -+ /* Reset beacon setting to the initial value. */ -+ /* --------------------------------------------------------- */ -+#if 0/* #ifdef CONFIG_PCI_HCI */ -+ if (LLT_table_init(Adapter, FALSE, 0) == RT_STATUS_FAILURE) { -+ dbgdump("Init self define for BT Fw patch LLT table fail.\n"); -+ /* return RT_STATUS_FAILURE; */ -+ } -+#endif -+ u1bTmp = rtw_read8(Adapter, REG_BCN_CTRL); -+ u1bTmp |= EN_BCN_FUNCTION; -+ u1bTmp &= ~DIS_TSF_UDT; -+ rtw_write8(Adapter, REG_BCN_CTRL, u1bTmp); -+ -+ /* To make sure that if there exists an adapter which would like to send beacon. */ -+ /* If exists, the origianl value of 0x422[6] will be 1, we should check this to */ -+ /* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ -+ /* the beacon cannot be sent by HW. */ -+ /* 2010.06.23. Added by tynli. */ -+ if (bRecover) { -+ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL + 2); -+ PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL + 2, (u1bTmp | BIT6)); -+ } -+ -+ /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */ -+ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR + 1); -+ PlatformEFIOWrite1Byte(Adapter, REG_CR + 1, (u1bTmp & (~BIT0))); -+ -+ return ret; -+} -+ -+int ReservedPage_Compare(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware, u32 BTPatchSize) -+{ -+ u8 temp, ret, lastBTsz; -+ u32 u1bTmp = 0, address_start = 0, count = 0, i = 0; -+ u8 *myBTFwBuffer = NULL; -+ -+ myBTFwBuffer = rtw_zmalloc(BTPatchSize); -+ if (myBTFwBuffer == NULL) { -+ RTW_INFO("%s can't be executed due to the failed malloc.\n", __FUNCTION__); -+ Adapter->mppriv.bTxBufCkFail = _TRUE; -+ return _FALSE; -+ } -+ -+ temp = rtw_read8(Adapter, 0x209); -+ -+ address_start = (temp * 128) / 8; -+ -+ rtw_write32(Adapter, 0x140, 0x00000000); -+ rtw_write32(Adapter, 0x144, 0x00000000); -+ rtw_write32(Adapter, 0x148, 0x00000000); -+ -+ rtw_write8(Adapter, 0x106, 0x69); -+ -+ for (i = 0; i < (BTPatchSize / 8); i++) { -+ rtw_write32(Adapter, 0x140, address_start + 5 + i) ; -+ -+ /* polling until reg 0x140[23]=1; */ -+ do { -+ u1bTmp = rtw_read32(Adapter, 0x140); -+ if (u1bTmp & BIT(23)) { -+ ret = _SUCCESS; -+ break; -+ } -+ count++; -+ RTW_INFO("0x140=%x, wait for 10 ms (%d) times.\n", u1bTmp, count); -+ rtw_msleep_os(10); /* 10ms */ -+ } while (!(u1bTmp & BIT(23)) && count < 50); -+ -+ myBTFwBuffer[i * 8 + 0] = rtw_read8(Adapter, 0x144); -+ myBTFwBuffer[i * 8 + 1] = rtw_read8(Adapter, 0x145); -+ myBTFwBuffer[i * 8 + 2] = rtw_read8(Adapter, 0x146); -+ myBTFwBuffer[i * 8 + 3] = rtw_read8(Adapter, 0x147); -+ myBTFwBuffer[i * 8 + 4] = rtw_read8(Adapter, 0x148); -+ myBTFwBuffer[i * 8 + 5] = rtw_read8(Adapter, 0x149); -+ myBTFwBuffer[i * 8 + 6] = rtw_read8(Adapter, 0x14a); -+ myBTFwBuffer[i * 8 + 7] = rtw_read8(Adapter, 0x14b); -+ } -+ -+ rtw_write32(Adapter, 0x140, address_start + 5 + BTPatchSize / 8) ; -+ -+ lastBTsz = BTPatchSize % 8; -+ -+ /* polling until reg 0x140[23]=1; */ -+ u1bTmp = 0; -+ count = 0; -+ do { -+ u1bTmp = rtw_read32(Adapter, 0x140); -+ if (u1bTmp & BIT(23)) { -+ ret = _SUCCESS; -+ break; -+ } -+ count++; -+ RTW_INFO("0x140=%x, wait for 10 ms (%d) times.\n", u1bTmp, count); -+ rtw_msleep_os(10); /* 10ms */ -+ } while (!(u1bTmp & BIT(23)) && count < 50); -+ -+ for (i = 0; i < lastBTsz; i++) -+ myBTFwBuffer[(BTPatchSize / 8) * 8 + i] = rtw_read8(Adapter, (0x144 + i)); -+ -+ -+ for (i = 0; i < BTPatchSize; i++) { -+ if (myBTFwBuffer[i] != pFirmware->szFwBuffer[i]) { -+ RTW_INFO(" In direct myBTFwBuffer[%d]=%x , pFirmware->szFwBuffer=%x\n", i, myBTFwBuffer[i], pFirmware->szFwBuffer[i]); -+ Adapter->mppriv.bTxBufCkFail = _TRUE; -+ break; -+ } -+ } -+ -+ if (myBTFwBuffer != NULL) -+ rtw_mfree(myBTFwBuffer, BTPatchSize); -+ -+ return _TRUE; -+} -+ -+/* As the size of bt firmware is more than 16k which is too big for some platforms, we divide it -+ * into four parts to transfer. The last parameter of _WriteBTFWtoTxPktBuf8703B is used to indicate -+ * the location of every part. We call the first 4096 byte of bt firmware as part 1, the second 4096 -+ * part as part 2, the third 4096 part as part 3, the remain as part 4. First we transform the part -+ * 4 and set the register 0x209 to 0x90, then the 32 bytes description are added to the head of part -+ * 4, and those bytes are putted at the location 0x90. Second we transform the part 3 and set the -+ * register 0x209 to 0x70. The 32 bytes description and part 3(4196 bytes) are putted at the location -+ * 0x70. It can contain 4196 bytes between 0x70 and 0x90. So the last 32 bytes os part 3 will cover the -+ * 32 bytes description of part4. Using this method, we can put the whole bt firmware to 0x30 and only -+ * has 32 bytes descrption at the head of part 1. -+*/ -+s32 FirmwareDownloadBT(PADAPTER padapter, PRT_MP_FIRMWARE pFirmware) -+{ -+ s32 rtStatus; -+ u8 *pBTFirmwareBuf; -+ u32 BTFirmwareLen; -+ u8 download_time; -+ s8 i; -+ BOOLEAN bRecover = _FALSE; -+ -+ rtStatus = _SUCCESS; -+ pBTFirmwareBuf = NULL; -+ BTFirmwareLen = 0; -+ -+#if 0 -+ /* */ -+ /* Patch BT Fw. Download BT RAM code to Tx packet buffer. */ -+ /* */ -+ if (padapter->bBTFWReady) { -+ RTW_INFO("%s: BT Firmware is ready!!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+#ifdef CONFIG_FILE_FWIMG -+ if (rtw_is_file_readable(rtw_fw_mp_bt_file_path) == _TRUE) { -+ RTW_INFO("%s: accquire MP BT FW from file:%s\n", __FUNCTION__, rtw_fw_mp_bt_file_path); -+ -+ rtStatus = rtw_retrieve_from_file(rtw_fw_mp_bt_file_path, FwBuffer, FW_8703B_SIZE); -+ BTFirmwareLen = rtStatus >= 0 ? rtStatus : 0; -+ pBTFirmwareBuf = FwBuffer; -+ } else -+#endif /* CONFIG_FILE_FWIMG */ -+ { -+#ifdef CONFIG_EMBEDDED_FWIMG -+ RTW_INFO("%s: Download MP BT FW from header\n", __FUNCTION__); -+ -+ pBTFirmwareBuf = (u8 *)Rtl8703BFwBTImgArray; -+ BTFirmwareLen = Rtl8703BFwBTImgArrayLength; -+ pFirmware->szFwBuffer = pBTFirmwareBuf; -+ pFirmware->ulFwLength = BTFirmwareLen; -+#endif /* CONFIG_EMBEDDED_FWIMG */ -+ } -+ -+ RTW_INFO("%s: MP BT Firmware size=%d\n", __FUNCTION__, BTFirmwareLen); -+ -+ /* for h2c cam here should be set to true */ -+ GET_HAL_DATA(padapter)->bFWReady = _TRUE; -+ -+ download_time = (BTFirmwareLen + 4095) / 4096; -+ RTW_INFO("%s: download_time is %d\n", __FUNCTION__, download_time); -+ -+ if (PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL + 2) & BIT6) -+ bRecover = TRUE; -+ -+ /* Download BT patch Fw. */ -+ for (i = (download_time - 1); i >= 0; i--) { -+ if (i == (download_time - 1)) { -+ rtStatus = _WriteBTFWtoTxPktBuf8703B(padapter, pBTFirmwareBuf + (4096 * i), (BTFirmwareLen - (4096 * i)), 1); -+ RTW_INFO("%s: start %d, len %d, time 1\n", __FUNCTION__, 4096 * i, BTFirmwareLen - (4096 * i)); -+ } else { -+ rtStatus = _WriteBTFWtoTxPktBuf8703B(padapter, pBTFirmwareBuf + (4096 * i), 4096, (download_time - i)); -+ RTW_INFO("%s: start %d, len 4096, time %d\n", __FUNCTION__, 4096 * i, download_time - i); -+ } -+ -+ if (rtStatus != _SUCCESS) { -+ RTW_INFO("%s: BT Firmware download to Tx packet buffer fail!\n", __FUNCTION__); -+ padapter->bBTFWReady = _FALSE; -+ return rtStatus; -+ } -+ } -+ -+ ReservedPage_Compare(padapter, pFirmware, BTFirmwareLen); -+ -+ padapter->bBTFWReady = _TRUE; -+ SetFwBTFwPatchCmd(padapter, (u16)BTFirmwareLen); -+ rtStatus = _CheckWLANFwPatchBTFwReady(padapter, bRecover); -+ -+ RTW_INFO("<===%s: return %s!\n", __FUNCTION__, rtStatus == _SUCCESS ? "SUCCESS" : "FAIL"); -+#endif -+ -+ return rtStatus; -+} -+#endif /* CONFIG_MP_INCLUDED */ -+ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+void rtl8703b_cal_txdesc_chksum(struct tx_desc *ptxdesc) -+{ -+ u16 *usPtr = (u16 *)ptxdesc; -+ u32 count; -+ u32 index; -+ u16 checksum = 0; -+ -+ -+ /* Clear first */ -+ ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); -+ -+ /* checksume is always calculated by first 32 bytes, */ -+ /* and it doesn't depend on TX DESC length. */ -+ /* Thomas,Lucas@SD4,20130515 */ -+ count = 16; -+ -+ for (index = 0; index < count; index++) -+ checksum ^= le16_to_cpu(*(usPtr + index)); -+ -+ ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff); -+} -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+u8 send_fw_packet(PADAPTER padapter, u8 *pRam_code, u32 length) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct xmit_buf xmit_buf_tmp; -+ struct submit_ctx sctx_tmp; -+ u8 *pTx_data_buffer = NULL; -+ u8 *pTmp_buffer = NULL; -+ u32 modify_ram_size; -+ u32 tmp_size, tmp_value; -+ u8 value8; -+ u32 i, counter; -+ u8 bRet; -+ u32 dwDataLength, writeLength; -+ -+ /* Due to SDIO can not send 32K packet */ -+ if (FW_DOWNLOAD_SIZE_8703B == length) -+ length--; -+ -+ modify_ram_size = length << 2; -+ pTx_data_buffer = rtw_zmalloc(modify_ram_size); -+ -+ if (NULL == pTx_data_buffer) { -+ RTW_INFO("Allocate buffer fail!!\n"); -+ return _FALSE; -+ } -+ -+ _rtw_memset(pTx_data_buffer, 0, modify_ram_size); -+ -+ /* Transfer to new format */ -+ tmp_size = length >> 1; -+ for (i = 0; i <= tmp_size; i++) { -+ *(pTx_data_buffer + i * 8) = *(pRam_code + i * 2); -+ *(pTx_data_buffer + i * 8 + 1) = *(pRam_code + i * 2 + 1); -+ } -+ -+ /* Gen TX_DESC */ -+ _rtw_memset(pTx_data_buffer, 0, TXDESC_SIZE); -+ pTmp_buffer = pTx_data_buffer; -+#if 0 -+ pTmp_buffer->qsel = BcnQsel; -+ pTmp_buffer->txpktsize = modify_ram_size - TXDESC_SIZE; -+ pTmp_buffer->offset = TXDESC_SIZE; -+#else -+ SET_TX_DESC_QUEUE_SEL_8703B(pTmp_buffer, QSLT_BEACON); -+ SET_TX_DESC_PKT_SIZE_8703B(pTmp_buffer, modify_ram_size - TXDESC_SIZE); -+ SET_TX_DESC_OFFSET_8703B(pTmp_buffer, TXDESC_SIZE); -+#endif -+ rtl8703b_cal_txdesc_chksum((struct tx_desc *)pTmp_buffer); -+ -+ -+ /* Send packet */ -+#if 0 -+ dwDataLength = modify_ram_size; -+ overlap.Offset = 0; -+ overlap.OffsetHigh = 0; -+ overlap.hEvent = CreateEvent(NULL, FALSE, FALSE, NULL); -+ bRet = WriteFile(HalVari.hFile_Queue[TX_BCNQ]->handle, pTx_data_buffer, dwDataLength, &writeLength, &overlap); -+ if (WaitForSingleObject(overlap.hEvent, INFINITE) == WAIT_OBJECT_0) { -+ -+ GetOverlappedResult(HalVari.hFile_Queue[TX_BCNQ]->handle, &overlap, &writeLength, FALSE); -+ if (writeLength != dwDataLength) { -+ TCHAR editbuf[100]; -+ sprintf(editbuf, "DL FW Length Err: Write length error:bRet %d writeLength %ld dwDataLength %ld, Error Code:%ld", bRet, writeLength, dwDataLength, GetLastError()); -+ AfxMessageBox(editbuf, MB_OK | MB_ICONERROR); -+ return FALSE; -+ } -+ } -+ CloseHandle(overlap.hEvent); -+#else -+ xmit_buf_tmp.pdata = pTx_data_buffer; -+ xmit_buf_tmp.len = modify_ram_size; -+ rtw_sctx_init(&sctx_tmp, 10); -+ xmit_buf_tmp.sctx = &sctx_tmp; -+ if (rtw_write_port(padapter, pdvobjpriv->Queue2Pipe[BCN_QUEUE_INX], xmit_buf_tmp.len, (u8 *)&xmit_buf_tmp) == _FAIL) { -+ RTW_INFO("rtw_write_port fail\n"); -+ return _FAIL; -+ } -+#endif -+ -+ /* check if DMA is OK */ -+ counter = 100; -+ do { -+ if (0 == counter) { -+ RTW_INFO("DMA time out!!\n"); -+ return _FALSE; -+ } -+ value8 = rtw_read8(padapter, REG_DWBCN0_CTRL_8703B + 2); -+ counter--; -+ } while (0 == (value8 & BIT(0))); -+ -+ rtw_write8(padapter, REG_DWBCN0_CTRL_8703B + 2, value8); -+ -+ /* Modify ram code by IO method */ -+ tmp_value = rtw_read8(padapter, REG_MCUFWDL + 1); -+ /* Disable DMA */ -+ rtw_write8(padapter, REG_MCUFWDL + 1, (u8)tmp_value & ~(BIT(5))); -+ tmp_value = (tmp_value >> 6) << 1; -+ /* Set page start address */ -+ rtw_write8(padapter, REG_MCUFWDL + 2, (rtw_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | tmp_value); -+ tmp_size = TXDESC_SIZE >> 2; /* 10bytes */ -+#if 0 -+ IO_Func.WriteRegister(0x1000, (u16)tmp_size, pRam_code); -+#else -+ _BlockWrite(padapter, pRam_code, tmp_size); -+#endif -+ -+ if (pTmp_buffer != NULL) -+ rtw_mfree((u8 *)pTmp_buffer, modify_ram_size); -+ -+ return _TRUE; -+} -+#endif /* CONFIG_SDIO_HCI */ -+ -+/* -+ * Description: -+ * Download 8192C firmware code. -+ * -+ * */ -+s32 rtl8703b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw) -+{ -+ s32 rtStatus = _SUCCESS; -+ u8 write_fw = 0; -+ systime fwdl_start_time; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ u8 *FwImage; -+ u32 FwImageLen; -+ u8 *pFwImageFileName; -+#ifdef CONFIG_WOWLAN -+ u8 *FwImageWoWLAN; -+ u32 FwImageWoWLANLen; -+#endif -+ u8 *pucMappedFile = NULL; -+ PRT_FIRMWARE_8703B pFirmware = NULL; -+ PRT_8703B_FIRMWARE_HDR pFwHdr = NULL; -+ u8 *pFirmwareBuf; -+ u32 FirmwareLen; -+#ifdef CONFIG_FILE_FWIMG -+ u8 *fwfilepath; -+#endif /* CONFIG_FILE_FWIMG */ -+ u8 value8; -+ u16 value16; -+ u32 value32; -+ u8 dma_iram_sel; -+ u16 new_chk_sum = 0; -+ u32 send_pkt_size, pkt_size_tmp; -+ u32 mem_offset; -+ u32 counter; -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ -+ -+ pFirmware = (PRT_FIRMWARE_8703B)rtw_zmalloc(sizeof(RT_FIRMWARE_8703B)); -+ -+ if (!pFirmware) { -+ rtStatus = _FAIL; -+ goto exit; -+ } -+ -+ { -+ u8 tmp_ps = 0, tmp_rf = 0; -+ tmp_ps = rtw_read8(padapter, 0xa3); -+ tmp_ps &= 0xf8; -+ tmp_ps |= 0x02; -+ /* 1. write 0xA3[:2:0] = 3b'010 */ -+ rtw_write8(padapter, 0xa3, tmp_ps); -+ /* 2. read power_state = 0xA0[1:0] */ -+ tmp_ps = rtw_read8(padapter, 0xa0); -+ tmp_ps &= 0x03; -+ if (tmp_ps != 0x01) { -+ RTW_INFO(FUNC_ADPT_FMT" tmp_ps=%x\n", FUNC_ADPT_ARG(padapter), tmp_ps); -+ pdbgpriv->dbg_downloadfw_pwr_state_cnt++; -+ } -+ } -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_PreLoadFirmware(padapter); -+#endif /* CONFIG_BT_COEXIST */ -+ -+#ifdef CONFIG_FILE_FWIMG -+#ifdef CONFIG_WOWLAN -+ if (bUsedWoWLANFw) -+ fwfilepath = rtw_fw_wow_file_path; -+ else -+#endif /* CONFIG_WOWLAN */ -+ { -+ fwfilepath = rtw_fw_file_path; -+ } -+#endif /* CONFIG_FILE_FWIMG */ -+ -+#ifdef CONFIG_FILE_FWIMG -+ if (rtw_is_file_readable(fwfilepath) == _TRUE) { -+ RTW_INFO("%s accquire FW from file:%s\n", __FUNCTION__, fwfilepath); -+ pFirmware->eFWSource = FW_SOURCE_IMG_FILE; -+ } else -+#endif /* CONFIG_FILE_FWIMG */ -+ { -+#ifdef CONFIG_EMBEDDED_FWIMG -+ pFirmware->eFWSource = FW_SOURCE_HEADER_FILE; -+#else /* !CONFIG_EMBEDDED_FWIMG */ -+ pFirmware->eFWSource = FW_SOURCE_IMG_FILE; /* We should decided by Reg. */ -+#endif /* !CONFIG_EMBEDDED_FWIMG */ -+ } -+ -+ switch (pFirmware->eFWSource) { -+ case FW_SOURCE_IMG_FILE: -+#ifdef CONFIG_FILE_FWIMG -+ rtStatus = rtw_retrieve_from_file(fwfilepath, FwBuffer, FW_8703B_SIZE); -+ pFirmware->ulFwLength = rtStatus >= 0 ? rtStatus : 0; -+ pFirmware->szFwBuffer = FwBuffer; -+#endif /* CONFIG_FILE_FWIMG */ -+ break; -+ -+ case FW_SOURCE_HEADER_FILE: -+ if (bUsedWoWLANFw) { -+ #ifdef CONFIG_WOWLAN -+ if (pwrpriv->wowlan_mode) { -+ pFirmware->szFwBuffer = array_mp_8703b_fw_wowlan; -+ pFirmware->ulFwLength = array_length_mp_8703b_fw_wowlan; -+ -+ RTW_INFO(" ===> %s fw: %s, size: %d\n", -+ __FUNCTION__, "WoWLAN", -+ pFirmware->ulFwLength); -+ } -+ #endif /*CONFIG_WOWLAN*/ -+ -+ #ifdef CONFIG_AP_WOWLAN -+ if (pwrpriv->wowlan_ap_mode) { -+ pFirmware->szFwBuffer = array_mp_8703b_fw_ap; -+ pFirmware->ulFwLength = array_length_mp_8703b_fw_ap; -+ -+ RTW_INFO(" ===> %s fw: %s, size: %d\n", -+ __FUNCTION__, "AP_WoWLAN", -+ pFirmware->ulFwLength); -+ } -+ #endif /* CONFIG_AP_WOWLAN */ -+ } else { -+ pFirmware->szFwBuffer = array_mp_8703b_fw_nic; -+ pFirmware->ulFwLength = array_length_mp_8703b_fw_nic; -+ RTW_INFO("%s fw: %s, size: %d\n", __FUNCTION__, "FW_NIC", pFirmware->ulFwLength); -+ } -+ break; -+ } -+ -+ if ((pFirmware->ulFwLength - 32) > FW_8703B_SIZE) { -+ rtStatus = _FAIL; -+ RTW_ERR("Firmware size:%u exceed %u\n", pFirmware->ulFwLength, FW_8703B_SIZE); -+ goto exit; -+ } -+ -+ pFirmwareBuf = pFirmware->szFwBuffer; -+ FirmwareLen = pFirmware->ulFwLength; -+ -+ /* To Check Fw header. Added by tynli. 2009.12.04. */ -+ pFwHdr = (PRT_8703B_FIRMWARE_HDR)pFirmwareBuf; -+ -+ pHalData->firmware_version = le16_to_cpu(pFwHdr->Version); -+ pHalData->firmware_sub_version = le16_to_cpu(pFwHdr->Subversion); -+ pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature); -+ -+ RTW_INFO("%s: fw_ver=%x fw_subver=%04x sig=0x%x, Month=%02x, Date=%02x, Hour=%02x, Minute=%02x\n", -+ __FUNCTION__, pHalData->firmware_version, pHalData->firmware_sub_version, pHalData->FirmwareSignature -+ , pFwHdr->Month, pFwHdr->Date, pFwHdr->Hour, pFwHdr->Minute); -+ -+ if (IS_FW_HEADER_EXIST_8703B(pFwHdr)) { -+ RTW_INFO("%s(): Shift for fw header!\n", __FUNCTION__); -+ /* Shift 32 bytes for FW header */ -+ pFirmwareBuf = pFirmwareBuf + 32; -+ FirmwareLen = FirmwareLen - 32; -+ } -+ -+ fwdl_start_time = rtw_get_current_time(); -+ -+#if 1 -+ RTW_INFO("%s by IO write!\n", __FUNCTION__); -+ -+ -+ /* To check if FW already exists before download FW */ -+ if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { -+ rtw_write8(padapter, REG_MCUFWDL, 0x00); -+ _8051Reset8703(padapter); -+ } -+ -+ _FWDownloadEnable(padapter, _TRUE); -+ -+ while (!RTW_CANNOT_IO(padapter) -+ && (write_fw++ < 3 || rtw_get_passing_time_ms(fwdl_start_time) < 500)) { -+ /* reset FWDL chksum */ -+ rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt); -+ -+ rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen); -+ if (rtStatus != _SUCCESS) -+ continue; -+ -+ rtStatus = polling_fwdl_chksum(padapter, 5, 50); -+ if (rtStatus == _SUCCESS) -+ break; -+ } -+#else -+ RTW_INFO("%s by Tx pkt write!\n", __FUNCTION__); -+ -+ if ((rtw_read8(padapter, REG_MCUFWDL) & MCUFWDL_RDY) == 0) { -+ /* DLFW use HIQ only */ -+ value32 = 0xFF | BIT(31); -+ rtw_write32(padapter, REG_RQPN, value32); -+ -+ /* Set beacon boundary to TXFIFO header */ -+ rtw_write8(padapter, REG_BCNQ_BDNY, 0); -+ rtw_write16(padapter, REG_DWBCN0_CTRL_8703B + 1, BIT(8)); -+ -+ /* SDIO need read this register before send packet */ -+ rtw_read32(padapter, 0x10250020); -+ -+ _FWDownloadEnable(padapter, _TRUE); -+ -+ /* Get original check sum */ -+ new_chk_sum = *(pFirmwareBuf + FirmwareLen - 2) | ((u16)*(pFirmwareBuf + FirmwareLen - 1) << 8); -+ -+ /* Send ram code flow */ -+ dma_iram_sel = 0; -+ mem_offset = 0; -+ pkt_size_tmp = FirmwareLen; -+ while (0 != pkt_size_tmp) { -+ if (pkt_size_tmp >= FW_DOWNLOAD_SIZE_8703B) { -+ send_pkt_size = FW_DOWNLOAD_SIZE_8703B; -+ /* Modify check sum value */ -+ new_chk_sum = (u16)(new_chk_sum ^ (((send_pkt_size - 1) << 2) - TXDESC_SIZE)); -+ } else { -+ send_pkt_size = pkt_size_tmp; -+ new_chk_sum = (u16)(new_chk_sum ^ ((send_pkt_size << 2) - TXDESC_SIZE)); -+ -+ } -+ -+ if (send_pkt_size == pkt_size_tmp) { -+ /* last partition packet, write new check sum to ram code file */ -+ *(pFirmwareBuf + FirmwareLen - 2) = new_chk_sum & 0xFF; -+ *(pFirmwareBuf + FirmwareLen - 1) = (new_chk_sum & 0xFF00) >> 8; -+ } -+ -+ /* IRAM select */ -+ rtw_write8(padapter, REG_MCUFWDL + 1, (rtw_read8(padapter, REG_MCUFWDL + 1) & 0x3F) | (dma_iram_sel << 6)); -+ /* Enable DMA */ -+ rtw_write8(padapter, REG_MCUFWDL + 1, rtw_read8(padapter, REG_MCUFWDL + 1) | BIT(5)); -+ -+ if (_FALSE == send_fw_packet(padapter, pFirmwareBuf + mem_offset, send_pkt_size)) { -+ RTW_INFO("%s: Send FW fail !\n", __FUNCTION__); -+ rtStatus = _FAIL; -+ goto DLFW_FAIL; -+ } -+ -+ dma_iram_sel++; -+ mem_offset += send_pkt_size; -+ pkt_size_tmp -= send_pkt_size; -+ } -+ } else { -+ RTW_INFO("%s: Downlad FW fail since MCUFWDL_RDY is not set!\n", __FUNCTION__); -+ rtStatus = _FAIL; -+ goto DLFW_FAIL; -+ } -+#endif -+ -+ _FWDownloadEnable(padapter, _FALSE); -+ -+ rtStatus = _FWFreeToGo(padapter, 10, 200); -+ if (_SUCCESS != rtStatus) -+ goto DLFW_FAIL; -+ -+ RTW_INFO("%s: DLFW OK !\n", __FUNCTION__); -+ -+DLFW_FAIL: -+ if (rtStatus == _FAIL) { -+ /* Disable FWDL_EN */ -+ value8 = rtw_read8(padapter, REG_MCUFWDL); -+ value8 = (value8 & ~(BIT(0)) & ~(BIT(1))); -+ rtw_write8(padapter, REG_MCUFWDL, value8); -+ } -+ -+ RTW_INFO("%s %s. write_fw:%u, %dms\n" -+ , __FUNCTION__, (rtStatus == _SUCCESS) ? "success" : "fail" -+ , write_fw -+ , rtw_get_passing_time_ms(fwdl_start_time) -+ ); -+ -+exit: -+ if (pFirmware) -+ rtw_mfree((u8 *)pFirmware, sizeof(RT_FIRMWARE_8703B)); -+ -+ rtl8703b_InitializeFirmwareVars(padapter); -+ -+ RTW_INFO(" <=== %s()\n", __FUNCTION__); -+ -+ return rtStatus; -+} -+ -+void rtl8703b_InitializeFirmwareVars(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ /* Init Fw LPS related. */ -+ adapter_to_pwrctl(padapter)->bFwCurrentInPSMode = _FALSE; -+ -+ /* Init H2C cmd. */ -+ rtw_write8(padapter, REG_HMETFR, 0x0f); -+ -+ /* Init H2C counter. by tynli. 2009.12.09. */ -+ pHalData->LastHMEBoxNum = 0; -+ /* pHalData->H2CQueueHead = 0; -+ * pHalData->H2CQueueTail = 0; -+ * pHalData->H2CStopInsertQueue = _FALSE; */ -+} -+ -+/* *********************************************************** -+ * Efuse related code -+ * *********************************************************** */ -+static u8 -+hal_EfuseSwitchToBank( -+ PADAPTER padapter, -+ u8 bank, -+ u8 bPseudoTest) -+{ -+ u8 bRet = _FALSE; -+ u32 value32 = 0; -+#ifdef HAL_EFUSE_MEMORY -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; -+#endif -+ -+ -+ RTW_INFO("%s: Efuse switch bank to %d\n", __FUNCTION__, bank); -+ if (bPseudoTest) { -+#ifdef HAL_EFUSE_MEMORY -+ pEfuseHal->fakeEfuseBank = bank; -+#else -+ fakeEfuseBank = bank; -+#endif -+ bRet = _TRUE; -+ } else { -+ value32 = rtw_read32(padapter, EFUSE_TEST); -+ bRet = _TRUE; -+ switch (bank) { -+ case 0: -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); -+ break; -+ case 1: -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0); -+ break; -+ case 2: -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1); -+ break; -+ case 3: -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2); -+ break; -+ default: -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); -+ bRet = _FALSE; -+ break; -+ } -+ rtw_write32(padapter, EFUSE_TEST, value32); -+ } -+ -+ return bRet; -+} -+ -+static void -+Hal_GetEfuseDefinition( -+ PADAPTER padapter, -+ u8 efuseType, -+ u8 type, -+ void *pOut, -+ u8 bPseudoTest) -+{ -+ switch (type) { -+ case TYPE_EFUSE_MAX_SECTION: { -+ u8 *pMax_section; -+ pMax_section = (u8 *)pOut; -+ -+ if (efuseType == EFUSE_WIFI) -+ *pMax_section = EFUSE_MAX_SECTION_8703B; -+ else -+ *pMax_section = EFUSE_BT_MAX_SECTION; -+ } -+ break; -+ -+ case TYPE_EFUSE_REAL_CONTENT_LEN: { -+ u16 *pu2Tmp; -+ pu2Tmp = (u16 *)pOut; -+ -+ if (efuseType == EFUSE_WIFI) -+ *pu2Tmp = EFUSE_REAL_CONTENT_LEN_8703B; -+ else -+ *pu2Tmp = EFUSE_BT_REAL_CONTENT_LEN; -+ } -+ break; -+ -+ case TYPE_AVAILABLE_EFUSE_BYTES_BANK: { -+ u16 *pu2Tmp; -+ pu2Tmp = (u16 *)pOut; -+ -+ if (efuseType == EFUSE_WIFI) -+ *pu2Tmp = (EFUSE_REAL_CONTENT_LEN_8703B - EFUSE_OOB_PROTECT_BYTES); -+ else -+ *pu2Tmp = (EFUSE_BT_REAL_BANK_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK); -+ } -+ break; -+ -+ case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: { -+ u16 *pu2Tmp; -+ pu2Tmp = (u16 *)pOut; -+ -+ if (efuseType == EFUSE_WIFI) -+ *pu2Tmp = (EFUSE_REAL_CONTENT_LEN_8703B - EFUSE_OOB_PROTECT_BYTES); -+ else -+ *pu2Tmp = (EFUSE_BT_REAL_CONTENT_LEN - (EFUSE_PROTECT_BYTES_BANK * 3)); -+ } -+ break; -+ -+ case TYPE_EFUSE_MAP_LEN: { -+ u16 *pu2Tmp; -+ pu2Tmp = (u16 *)pOut; -+ -+ if (efuseType == EFUSE_WIFI) -+ *pu2Tmp = EFUSE_MAP_LEN_8703B; -+ else -+ *pu2Tmp = EFUSE_BT_MAP_LEN; -+ } -+ break; -+ -+ case TYPE_EFUSE_PROTECT_BYTES_BANK: { -+ u8 *pu1Tmp; -+ pu1Tmp = (u8 *)pOut; -+ -+ if (efuseType == EFUSE_WIFI) -+ *pu1Tmp = EFUSE_OOB_PROTECT_BYTES; -+ else -+ *pu1Tmp = EFUSE_PROTECT_BYTES_BANK; -+ } -+ break; -+ -+ case TYPE_EFUSE_CONTENT_LEN_BANK: { -+ u16 *pu2Tmp; -+ pu2Tmp = (u16 *)pOut; -+ -+ if (efuseType == EFUSE_WIFI) -+ *pu2Tmp = EFUSE_REAL_CONTENT_LEN_8703B; -+ else -+ *pu2Tmp = EFUSE_BT_REAL_BANK_CONTENT_LEN; -+ } -+ break; -+ -+ default: { -+ u8 *pu1Tmp; -+ pu1Tmp = (u8 *)pOut; -+ *pu1Tmp = 0; -+ } -+ break; -+ } -+} -+ -+#define VOLTAGE_V25 0x03 -+#define LDOE25_SHIFT 28 -+ -+/* ***************************************************************** -+ * The following is for compile ok -+ * That should be merged with the original in the future -+ * ***************************************************************** */ -+#define EFUSE_ACCESS_ON_8703 0x69 /* For RTL8703 only. */ -+#define EFUSE_ACCESS_OFF_8703 0x00 /* For RTL8703 only. */ -+#define REG_EFUSE_ACCESS_8703 0x00CF /* Efuse access protection for RTL8703 */ -+ -+/* ***************************************************************** */ -+static void Hal_BT_EfusePowerSwitch( -+ PADAPTER padapter, -+ u8 bWrite, -+ u8 PwrState) -+{ -+ u8 tempval; -+ if (PwrState == _TRUE) { -+ /* enable BT power cut */ -+ /* 0x6A[14] = 1 */ -+ tempval = rtw_read8(padapter, 0x6B); -+ tempval |= BIT(6); -+ rtw_write8(padapter, 0x6B, tempval); -+ -+ /* Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay */ -+ /* So don't wirte 0x6A[14]=1 and 0x6A[15]=0 together! */ -+ rtw_usleep_os(100); -+ /* disable BT output isolation */ -+ /* 0x6A[15] = 0 */ -+ tempval = rtw_read8(padapter, 0x6B); -+ tempval &= ~BIT(7); -+ rtw_write8(padapter, 0x6B, tempval); -+ } else { -+ /* enable BT output isolation */ -+ /* 0x6A[15] = 1 */ -+ tempval = rtw_read8(padapter, 0x6B); -+ tempval |= BIT(7); -+ rtw_write8(padapter, 0x6B, tempval); -+ -+ /* Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay */ -+ /* So don't wirte 0x6A[14]=1 and 0x6A[15]=0 together! */ -+ -+ /* disable BT power cut */ -+ /* 0x6A[14] = 1 */ -+ tempval = rtw_read8(padapter, 0x6B); -+ tempval &= ~BIT(6); -+ rtw_write8(padapter, 0x6B, tempval); -+ } -+ -+} -+static void -+Hal_EfusePowerSwitch( -+ PADAPTER padapter, -+ u8 bWrite, -+ u8 PwrState) -+{ -+ u8 tempval; -+ u16 tmpV16; -+ -+ -+ if (PwrState == _TRUE) { -+ /* enable BT power cut 0x6A[14] = 1*/ -+ tempval = rtw_read8(padapter, 0x6B); -+ tempval |= BIT(6); -+ rtw_write8(padapter, 0x6B, tempval); -+#ifdef CONFIG_SDIO_HCI -+ /* To avoid cannot access efuse regsiters after disable/enable several times during DTM test. */ -+ /* Suggested by SD1 IsaacHsu. 2013.07.08, added by tynli. */ -+ tempval = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HSUS_CTRL); -+ if (tempval & BIT(0)) { /* SDIO local register is suspend */ -+ u8 count = 0; -+ -+ -+ tempval &= ~BIT(0); -+ rtw_write8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HSUS_CTRL, tempval); -+ -+ /* check 0x86[1:0]=10'2h, wait power state to leave suspend */ -+ do { -+ tempval = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HSUS_CTRL); -+ tempval &= 0x3; -+ if (tempval == 0x02) -+ break; -+ -+ count++; -+ if (count >= 100) -+ break; -+ -+ rtw_mdelay_os(10); -+ } while (1); -+ -+ if (count >= 100) { -+ RTW_INFO(FUNC_ADPT_FMT ": Leave SDIO local register suspend fail! Local 0x86=%#X\n", -+ FUNC_ADPT_ARG(padapter), tempval); -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT ": Leave SDIO local register suspend OK! Local 0x86=%#X\n", -+ FUNC_ADPT_ARG(padapter), tempval); -+ } -+ } -+#endif /* CONFIG_SDIO_HCI */ -+ -+ rtw_write8(padapter, REG_EFUSE_ACCESS_8703, EFUSE_ACCESS_ON_8703); -+ -+ /* Reset: 0x0000h[28], default valid */ -+ tmpV16 = rtw_read16(padapter, REG_SYS_FUNC_EN); -+ if (!(tmpV16 & FEN_ELDR)) { -+ tmpV16 |= FEN_ELDR ; -+ rtw_write16(padapter, REG_SYS_FUNC_EN, tmpV16); -+ } -+ -+ /* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid */ -+ tmpV16 = rtw_read16(padapter, REG_SYS_CLKR); -+ if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) { -+ tmpV16 |= (LOADER_CLK_EN | ANA8M) ; -+ rtw_write16(padapter, REG_SYS_CLKR, tmpV16); -+ } -+ -+ if (bWrite == _TRUE) { -+ /* Enable LDO 2.5V before read/write action */ -+ tempval = rtw_read8(padapter, EFUSE_TEST + 3); -+ tempval &= 0x0F; -+ /*tempval |= (VOLTAGE_V25 << 4);*/ -+ tempval |= 0x70; /* 0x34[30:28] = 0b'111, Use LDO 2.25V, Suggested by SD1 Morris & Victor*/ -+ rtw_write8(padapter, EFUSE_TEST + 3, (tempval | 0x80)); -+ -+ /* rtw_write8(padapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); */ -+ } -+ } else { -+ -+ /*enable BT output isolation 0x6A[15] = 1 */ -+ tempval = rtw_read8(padapter, 0x6B); -+ tempval |= BIT(7); -+ rtw_write8(padapter, 0x6B, tempval); -+ -+ rtw_write8(padapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF); -+ -+ if (bWrite == _TRUE) { -+ /* Disable LDO 2.5V after read/write action */ -+ tempval = rtw_read8(padapter, EFUSE_TEST + 3); -+ rtw_write8(padapter, EFUSE_TEST + 3, (tempval & 0x7F)); -+ } -+ -+ } -+} -+ -+static void -+hal_ReadEFuse_WiFi( -+ PADAPTER padapter, -+ u16 _offset, -+ u16 _size_byte, -+ u8 *pbuf, -+ u8 bPseudoTest) -+{ -+#ifdef HAL_EFUSE_MEMORY -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; -+#endif -+ u8 *efuseTbl = NULL; -+ u16 eFuse_Addr = 0; -+ u8 offset, wden; -+ u8 efuseHeader, efuseExtHdr, efuseData; -+ u16 i, total, used; -+ u8 efuse_usage = 0; -+ -+ /* RTW_INFO("YJ: ====>%s():_offset=%d _size_byte=%d bPseudoTest=%d\n", __func__, _offset, _size_byte, bPseudoTest); */ -+ /* */ -+ /* Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */ -+ /* */ -+ if ((_offset + _size_byte) > EFUSE_MAX_MAP_LEN) { -+ RTW_INFO("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte); -+ return; -+ } -+ -+ efuseTbl = (u8 *)rtw_malloc(EFUSE_MAX_MAP_LEN); -+ if (efuseTbl == NULL) { -+ RTW_INFO("%s: alloc efuseTbl fail!\n", __FUNCTION__); -+ return; -+ } -+ /* 0xff will be efuse default value instead of 0x00. */ -+ _rtw_memset(efuseTbl, 0xFF, EFUSE_MAX_MAP_LEN); -+ -+ -+#ifdef CONFIG_RTW_DEBUG -+ if (0) { -+ for (i = 0; i < 256; i++) -+ /* ReadEFuseByte(padapter, i, &efuseTbl[i], _FALSE); */ -+ efuse_OneByteRead(padapter, i, &efuseTbl[i], _FALSE); -+ RTW_INFO("Efuse Content:\n"); -+ for (i = 0; i < 256; i++) { -+ if (i % 16 == 0) -+ printk("\n"); -+ printk("%02X ", efuseTbl[i]); -+ } -+ printk("\n"); -+ } -+#endif -+ -+ -+ /* switch bank back to bank 0 for later BT and wifi use. */ -+ hal_EfuseSwitchToBank(padapter, 0, bPseudoTest); -+ -+ while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) { -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); */ -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); -+ if (efuseHeader == 0xFF) { -+ RTW_INFO("%s: data end at address=%#x\n", __FUNCTION__, eFuse_Addr - 1); -+ break; -+ } -+ /* RTW_INFO("%s: efuse[0x%X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseHeader); */ -+ -+ /* Check PG header for section num. */ -+ if (EXT_HEADER(efuseHeader)) { /* extended header */ -+ offset = GET_HDR_OFFSET_2_0(efuseHeader); -+ /* RTW_INFO("%s: extended header offset=0x%X\n", __FUNCTION__, offset); */ -+ -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); */ -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); -+ /* RTW_INFO("%s: efuse[0x%X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseExtHdr); */ -+ if (ALL_WORDS_DISABLED(efuseExtHdr)) -+ continue; -+ -+ offset |= ((efuseExtHdr & 0xF0) >> 1); -+ wden = (efuseExtHdr & 0x0F); -+ } else { -+ offset = ((efuseHeader >> 4) & 0x0f); -+ wden = (efuseHeader & 0x0f); -+ } -+ /* RTW_INFO("%s: Offset=%d Worden=0x%X\n", __FUNCTION__, offset, wden); */ -+ -+ if (offset < EFUSE_MAX_SECTION_8703B) { -+ u16 addr; -+ /* Get word enable value from PG header -+ * RTW_INFO("%s: Offset=%d Worden=0x%X\n", __FUNCTION__, offset, wden); */ -+ -+ addr = offset * PGPKT_DATA_SIZE; -+ for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { -+ /* Check word enable condition in the section */ -+ if (!(wden & (0x01 << i))) { -+ efuseData = 0; -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); */ -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData, bPseudoTest); -+ /* RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData); */ -+ efuseTbl[addr] = efuseData; -+ -+ efuseData = 0; -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); */ -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData, bPseudoTest); -+ /* RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr-1, efuseData); */ -+ efuseTbl[addr + 1] = efuseData; -+ } -+ addr += 2; -+ } -+ } else { -+ RTW_ERR("%s: offset(%d) is illegal!!\n", __FUNCTION__, offset); -+ eFuse_Addr += Efuse_CalculateWordCnts(wden) * 2; -+ } -+ } -+ -+ /* Copy from Efuse map to output pointer memory!!! */ -+ for (i = 0; i < _size_byte; i++) -+ pbuf[i] = efuseTbl[_offset + i]; -+ -+ /* Calculate Efuse utilization */ -+ total = 0; -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &total, bPseudoTest); -+ used = eFuse_Addr - 1; -+ if (total) -+ efuse_usage = (u8)((used * 100) / total); -+ else -+ efuse_usage = 100; -+ if (bPseudoTest) { -+#ifdef HAL_EFUSE_MEMORY -+ pEfuseHal->fakeEfuseUsedBytes = used; -+#else -+ fakeEfuseUsedBytes = used; -+#endif -+ } else { -+ rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8 *)&used); -+ rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_USAGE, (u8 *)&efuse_usage); -+ } -+ -+ if (efuseTbl) -+ rtw_mfree(efuseTbl, EFUSE_MAX_MAP_LEN); -+} -+ -+static void -+hal_ReadEFuse_BT( -+ PADAPTER padapter, -+ u16 _offset, -+ u16 _size_byte, -+ u8 *pbuf, -+ u8 bPseudoTest -+) -+{ -+#ifdef HAL_EFUSE_MEMORY -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; -+#endif -+ u8 *efuseTbl; -+ u8 bank; -+ u16 eFuse_Addr; -+ u8 efuseHeader, efuseExtHdr, efuseData; -+ u8 offset, wden; -+ u16 i, total, used; -+ u8 efuse_usage; -+ -+ -+ /* */ -+ /* Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */ -+ /* */ -+ if ((_offset + _size_byte) > EFUSE_BT_MAP_LEN) { -+ RTW_INFO("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte); -+ return; -+ } -+ -+ efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN); -+ if (efuseTbl == NULL) { -+ RTW_INFO("%s: efuseTbl malloc fail!\n", __FUNCTION__); -+ return; -+ } -+ /* 0xff will be efuse default value instead of 0x00. */ -+ _rtw_memset(efuseTbl, 0xFF, EFUSE_BT_MAP_LEN); -+ -+ total = 0; -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &total, bPseudoTest); -+ -+ for (bank = 1; bank < 3; bank++) { /* 8703b Max bake 0~2 */ -+ if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == _FALSE) { -+ RTW_INFO("%s: hal_EfuseSwitchToBank Fail!!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ eFuse_Addr = 0; -+ -+ while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) { -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); */ -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); -+ if (efuseHeader == 0xFF) -+ break; -+ RTW_INFO("%s: efuse[%#X]=0x%02x (header)\n", __FUNCTION__, (((bank - 1) * EFUSE_REAL_CONTENT_LEN_8703B) + eFuse_Addr - 1), efuseHeader); -+ -+ /* Check PG header for section num. */ -+ if (EXT_HEADER(efuseHeader)) { /* extended header */ -+ offset = GET_HDR_OFFSET_2_0(efuseHeader); -+ RTW_INFO("%s: extended header offset_2_0=0x%X\n", __FUNCTION__, offset); -+ -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); */ -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); -+ RTW_INFO("%s: efuse[%#X]=0x%02x (ext header)\n", __FUNCTION__, (((bank - 1) * EFUSE_REAL_CONTENT_LEN_8703B) + eFuse_Addr - 1), efuseExtHdr); -+ if (ALL_WORDS_DISABLED(efuseExtHdr)) -+ continue; -+ -+ offset |= ((efuseExtHdr & 0xF0) >> 1); -+ wden = (efuseExtHdr & 0x0F); -+ } else { -+ offset = ((efuseHeader >> 4) & 0x0f); -+ wden = (efuseHeader & 0x0f); -+ } -+ -+ if (offset < EFUSE_BT_MAX_SECTION) { -+ u16 addr; -+ -+ /* Get word enable value from PG header */ -+ RTW_INFO("%s: Offset=%d Worden=%#X\n", __FUNCTION__, offset, wden); -+ -+ addr = offset * PGPKT_DATA_SIZE; -+ for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { -+ /* Check word enable condition in the section */ -+ if (!(wden & (0x01 << i))) { -+ efuseData = 0; -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); */ -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData, bPseudoTest); -+ RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr - 1, efuseData); -+ efuseTbl[addr] = efuseData; -+ -+ efuseData = 0; -+ /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); */ -+ efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData, bPseudoTest); -+ RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr - 1, efuseData); -+ efuseTbl[addr + 1] = efuseData; -+ } -+ addr += 2; -+ } -+ } else { -+ RTW_INFO("%s: offset(%d) is illegal!!\n", __FUNCTION__, offset); -+ eFuse_Addr += Efuse_CalculateWordCnts(wden) * 2; -+ } -+ } -+ -+ if ((eFuse_Addr - 1) < total) { -+ RTW_INFO("%s: bank(%d) data end at %#x\n", __FUNCTION__, bank, eFuse_Addr - 1); -+ break; -+ } -+ } -+ -+ /* switch bank back to bank 0 for later BT and wifi use. */ -+ hal_EfuseSwitchToBank(padapter, 0, bPseudoTest); -+ -+ /* Copy from Efuse map to output pointer memory!!! */ -+ for (i = 0; i < _size_byte; i++) -+ pbuf[i] = efuseTbl[_offset + i]; -+ -+ /* */ -+ /* Calculate Efuse utilization. */ -+ /* */ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &total, bPseudoTest); -+ used = (EFUSE_BT_REAL_BANK_CONTENT_LEN * (bank - 1)) + eFuse_Addr - 1; -+ RTW_INFO("%s: bank(%d) data end at %#x ,used =%d\n", __FUNCTION__, bank, eFuse_Addr - 1, used); -+ efuse_usage = (u8)((used * 100) / total); -+ if (bPseudoTest) { -+#ifdef HAL_EFUSE_MEMORY -+ pEfuseHal->fakeBTEfuseUsedBytes = used; -+#else -+ fakeBTEfuseUsedBytes = used; -+#endif -+ } else { -+ rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8 *)&used); -+ rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BT_USAGE, (u8 *)&efuse_usage); -+ } -+ -+exit: -+ if (efuseTbl) -+ rtw_mfree(efuseTbl, EFUSE_BT_MAP_LEN); -+} -+ -+static void -+Hal_ReadEFuse( -+ PADAPTER padapter, -+ u8 efuseType, -+ u16 _offset, -+ u16 _size_byte, -+ u8 *pbuf, -+ u8 bPseudoTest) -+{ -+ if (efuseType == EFUSE_WIFI) -+ hal_ReadEFuse_WiFi(padapter, _offset, _size_byte, pbuf, bPseudoTest); -+ else -+ hal_ReadEFuse_BT(padapter, _offset, _size_byte, pbuf, bPseudoTest); -+} -+ -+static u16 -+hal_EfuseGetCurrentSize_WiFi( -+ PADAPTER padapter, -+ u8 bPseudoTest) -+{ -+#ifdef HAL_EFUSE_MEMORY -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; -+#endif -+ u16 efuse_addr = 0; -+ u16 start_addr = 0; /* for debug */ -+ u8 hoffset = 0, hworden = 0; -+ u8 efuse_data, word_cnts = 0; -+ u32 count = 0; /* for debug */ -+ -+ -+ if (bPseudoTest) { -+#ifdef HAL_EFUSE_MEMORY -+ efuse_addr = (u16)pEfuseHal->fakeEfuseUsedBytes; -+#else -+ efuse_addr = (u16)fakeEfuseUsedBytes; -+#endif -+ } else -+ rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); -+ start_addr = efuse_addr; -+ RTW_INFO("%s: start_efuse_addr=0x%X\n", __FUNCTION__, efuse_addr); -+ -+ /* switch bank back to bank 0 for later BT and wifi use. */ -+ hal_EfuseSwitchToBank(padapter, 0, bPseudoTest); -+ -+#if 0 /* for debug test */ -+ efuse_OneByteRead(padapter, 0x1FF, &efuse_data, bPseudoTest); -+ RTW_INFO(FUNC_ADPT_FMT ": efuse raw 0x1FF=0x%02X\n", -+ FUNC_ADPT_ARG(padapter), efuse_data); -+ efuse_data = 0xFF; -+#endif /* for debug test */ -+ -+ count = 0; -+ while (AVAILABLE_EFUSE_ADDR(efuse_addr)) { -+#if 1 -+ if (efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) == _FALSE) { -+ RTW_ERR("%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr); -+ goto error; -+ } -+#else -+ ReadEFuseByte(padapter, efuse_addr, &efuse_data, bPseudoTest); -+#endif -+ -+ if (efuse_data == 0xFF) -+ break; -+ -+ if ((start_addr != 0) && (efuse_addr == start_addr)) { -+ count++; -+ RTW_INFO(FUNC_ADPT_FMT ": [WARNING] efuse raw 0x%X=0x%02X not 0xFF!!(%d times)\n", -+ FUNC_ADPT_ARG(padapter), efuse_addr, efuse_data, count); -+ -+ efuse_data = 0xFF; -+ if (count < 4) { -+ /* try again! */ -+ -+ if (count > 2) { -+ /* try again form address 0 */ -+ efuse_addr = 0; -+ start_addr = 0; -+ } -+ -+ continue; -+ } -+ -+ goto error; -+ } -+ -+ if (EXT_HEADER(efuse_data)) { -+ hoffset = GET_HDR_OFFSET_2_0(efuse_data); -+ efuse_addr++; -+ efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest); -+ if (ALL_WORDS_DISABLED(efuse_data)) -+ continue; -+ -+ hoffset |= ((efuse_data & 0xF0) >> 1); -+ hworden = efuse_data & 0x0F; -+ } else { -+ hoffset = (efuse_data >> 4) & 0x0F; -+ hworden = efuse_data & 0x0F; -+ } -+ -+ word_cnts = Efuse_CalculateWordCnts(hworden); -+ efuse_addr += (word_cnts * 2) + 1; -+ } -+ -+ if (bPseudoTest) { -+#ifdef HAL_EFUSE_MEMORY -+ pEfuseHal->fakeEfuseUsedBytes = efuse_addr; -+#else -+ fakeEfuseUsedBytes = efuse_addr; -+#endif -+ } else -+ rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); -+ -+ goto exit; -+ -+error: -+ /* report max size to prevent wirte efuse */ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_addr, bPseudoTest); -+ -+exit: -+ RTW_INFO("%s: CurrentSize=%d\n", __FUNCTION__, efuse_addr); -+ -+ return efuse_addr; -+} -+ -+static u16 -+hal_EfuseGetCurrentSize_BT( -+ PADAPTER padapter, -+ u8 bPseudoTest) -+{ -+#ifdef HAL_EFUSE_MEMORY -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; -+#endif -+ u16 btusedbytes; -+ u16 efuse_addr; -+ u8 bank, startBank; -+ u8 hoffset = 0, hworden = 0; -+ u8 efuse_data, word_cnts = 0; -+ u16 retU2 = 0; -+ u8 bContinual = _TRUE; -+ -+ -+ if (bPseudoTest) { -+#ifdef HAL_EFUSE_MEMORY -+ btusedbytes = pEfuseHal->fakeBTEfuseUsedBytes; -+#else -+ btusedbytes = fakeBTEfuseUsedBytes; -+#endif -+ } else { -+ btusedbytes = 0; -+ rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8 *)&btusedbytes); -+ } -+ efuse_addr = (u16)((btusedbytes % EFUSE_BT_REAL_BANK_CONTENT_LEN)); -+ startBank = (u8)(1 + (btusedbytes / EFUSE_BT_REAL_BANK_CONTENT_LEN)); -+ -+ RTW_INFO("%s: start from bank=%d addr=0x%X\n", __FUNCTION__, startBank, efuse_addr); -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &retU2, bPseudoTest); -+ -+ for (bank = startBank; bank < 3; bank++) { -+ if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == _FALSE) { -+ RTW_ERR("%s: switch bank(%d) Fail!!\n", __FUNCTION__, bank); -+ /* bank = EFUSE_MAX_BANK; */ -+ break; -+ } -+ -+ /* only when bank is switched we have to reset the efuse_addr. */ -+ if (bank != startBank) -+ efuse_addr = 0; -+#if 1 -+ -+ while (AVAILABLE_EFUSE_ADDR(efuse_addr)) { -+ if (efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) == _FALSE) { -+ RTW_ERR("%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr); -+ /* bank = EFUSE_MAX_BANK; */ -+ break; -+ } -+ RTW_INFO("%s: efuse_OneByteRead ! addr=0x%X !efuse_data=0x%X! bank =%d\n", __FUNCTION__, efuse_addr, efuse_data, bank); -+ -+ if (efuse_data == 0xFF) -+ break; -+ -+ if (EXT_HEADER(efuse_data)) { -+ hoffset = GET_HDR_OFFSET_2_0(efuse_data); -+ efuse_addr++; -+ efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest); -+ RTW_INFO("%s: efuse_OneByteRead EXT_HEADER ! addr=0x%X !efuse_data=0x%X! bank =%d\n", __FUNCTION__, efuse_addr, efuse_data, bank); -+ -+ if (ALL_WORDS_DISABLED(efuse_data)) { -+ efuse_addr++; -+ continue; -+ } -+ -+ /* hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); */ -+ hoffset |= ((efuse_data & 0xF0) >> 1); -+ hworden = efuse_data & 0x0F; -+ } else { -+ hoffset = (efuse_data >> 4) & 0x0F; -+ hworden = efuse_data & 0x0F; -+ } -+ -+ RTW_INFO(FUNC_ADPT_FMT": Offset=%d Worden=%#X\n", -+ FUNC_ADPT_ARG(padapter), hoffset, hworden); -+ -+ word_cnts = Efuse_CalculateWordCnts(hworden); -+ /* read next header */ -+ efuse_addr += (word_cnts * 2) + 1; -+ } -+#else -+ while (bContinual && -+ efuse_OneByteRead(padapter, efuse_addr , &efuse_data, bPseudoTest) && -+ AVAILABLE_EFUSE_ADDR(efuse_addr)) { -+ if (efuse_data != 0xFF) { -+ if ((efuse_data & 0x1F) == 0x0F) { /* extended header */ -+ hoffset = efuse_data; -+ efuse_addr++; -+ efuse_OneByteRead(padapter, efuse_addr , &efuse_data, bPseudoTest); -+ if ((efuse_data & 0x0F) == 0x0F) { -+ efuse_addr++; -+ continue; -+ } else { -+ hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); -+ hworden = efuse_data & 0x0F; -+ } -+ } else { -+ hoffset = (efuse_data >> 4) & 0x0F; -+ hworden = efuse_data & 0x0F; -+ } -+ word_cnts = Efuse_CalculateWordCnts(hworden); -+ /* read next header */ -+ efuse_addr = efuse_addr + (word_cnts * 2) + 1; -+ } else -+ bContinual = _FALSE ; -+ } -+#endif -+ -+ -+ /* Check if we need to check next bank efuse */ -+ if (efuse_addr < retU2) { -+ break;/* don't need to check next bank. */ -+ } -+ } -+#if 0 -+ retU2 = ((bank - 1) * EFUSE_BT_REAL_BANK_CONTENT_LEN) + efuse_addr; -+ if (bPseudoTest) { -+#ifdef HAL_EFUSE_MEMORY -+ pEfuseHal->fakeBTEfuseUsedBytes = retU2; -+#else -+ fakeBTEfuseUsedBytes = retU2; -+#endif -+ } else -+ rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8 *)&retU2); -+#else -+ retU2 = ((bank - 1) * EFUSE_BT_REAL_BANK_CONTENT_LEN) + efuse_addr; -+ if (bPseudoTest) { -+ pEfuseHal->fakeBTEfuseUsedBytes = retU2; -+ /* RT_DISP(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT92C(), already use %u bytes\n", pEfuseHal->fakeBTEfuseUsedBytes)); */ -+ } else { -+ pEfuseHal->BTEfuseUsedBytes = retU2; -+ /* RT_DISP(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT92C(), already use %u bytes\n", pEfuseHal->BTEfuseUsedBytes)); */ -+ } -+#endif -+ -+ RTW_INFO("%s: CurrentSize=%d\n", __FUNCTION__, retU2); -+ return retU2; -+} -+ -+static u16 -+Hal_EfuseGetCurrentSize( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ u8 bPseudoTest) -+{ -+ u16 ret = 0; -+ -+ if (efuseType == EFUSE_WIFI) -+ ret = hal_EfuseGetCurrentSize_WiFi(pAdapter, bPseudoTest); -+ else -+ ret = hal_EfuseGetCurrentSize_BT(pAdapter, bPseudoTest); -+ -+ return ret; -+} -+ -+static u8 -+Hal_EfuseWordEnableDataWrite( -+ PADAPTER padapter, -+ u16 efuse_addr, -+ u8 word_en, -+ u8 *data, -+ u8 bPseudoTest) -+{ -+ u16 tmpaddr = 0; -+ u16 start_addr = efuse_addr; -+ u8 badworden = 0x0F; -+ u8 tmpdata[PGPKT_DATA_SIZE]; -+ -+ -+ /* RTW_INFO("%s: efuse_addr=%#x word_en=%#x\n", __FUNCTION__, efuse_addr, word_en); */ -+ _rtw_memset(tmpdata, 0xFF, PGPKT_DATA_SIZE); -+ -+ if (!(word_en & BIT(0))) { -+ tmpaddr = start_addr; -+ efuse_OneByteWrite(padapter, start_addr++, data[0], bPseudoTest); -+ efuse_OneByteWrite(padapter, start_addr++, data[1], bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 0); -+ efuse_OneByteRead(padapter, tmpaddr, &tmpdata[0], bPseudoTest); -+ efuse_OneByteRead(padapter, tmpaddr + 1, &tmpdata[1], bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 1); -+ if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1])) -+ badworden &= (~BIT(0)); -+ } -+ if (!(word_en & BIT(1))) { -+ tmpaddr = start_addr; -+ efuse_OneByteWrite(padapter, start_addr++, data[2], bPseudoTest); -+ efuse_OneByteWrite(padapter, start_addr++, data[3], bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 0); -+ efuse_OneByteRead(padapter, tmpaddr, &tmpdata[2], bPseudoTest); -+ efuse_OneByteRead(padapter, tmpaddr + 1, &tmpdata[3], bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 1); -+ if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3])) -+ badworden &= (~BIT(1)); -+ } -+ if (!(word_en & BIT(2))) { -+ tmpaddr = start_addr; -+ efuse_OneByteWrite(padapter, start_addr++, data[4], bPseudoTest); -+ efuse_OneByteWrite(padapter, start_addr++, data[5], bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 0); -+ efuse_OneByteRead(padapter, tmpaddr, &tmpdata[4], bPseudoTest); -+ efuse_OneByteRead(padapter, tmpaddr + 1, &tmpdata[5], bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 1); -+ if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5])) -+ badworden &= (~BIT(2)); -+ } -+ if (!(word_en & BIT(3))) { -+ tmpaddr = start_addr; -+ efuse_OneByteWrite(padapter, start_addr++, data[6], bPseudoTest); -+ efuse_OneByteWrite(padapter, start_addr++, data[7], bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 0); -+ efuse_OneByteRead(padapter, tmpaddr, &tmpdata[6], bPseudoTest); -+ efuse_OneByteRead(padapter, tmpaddr + 1, &tmpdata[7], bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 1); -+ if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7])) -+ badworden &= (~BIT(3)); -+ } -+ -+ return badworden; -+} -+ -+static s32 -+Hal_EfusePgPacketRead( -+ PADAPTER padapter, -+ u8 offset, -+ u8 *data, -+ u8 bPseudoTest) -+{ -+ u8 bDataEmpty = _TRUE; -+ u8 efuse_data, word_cnts = 0; -+ u16 efuse_addr = 0; -+ u8 hoffset = 0, hworden = 0; -+ u8 i; -+ u8 max_section = 0; -+ s32 ret; -+ -+ -+ if (data == NULL) -+ return _FALSE; -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, &max_section, bPseudoTest); -+ if (offset > max_section) { -+ RTW_INFO("%s: Packet offset(%d) is illegal(>%d)!\n", __FUNCTION__, offset, max_section); -+ return _FALSE; -+ } -+ -+ _rtw_memset(data, 0xFF, PGPKT_DATA_SIZE); -+ ret = _TRUE; -+ -+ /* */ -+ /* Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. */ -+ /* Skip dummy parts to prevent unexpected data read from Efuse. */ -+ /* By pass right now. 2009.02.19. */ -+ /* */ -+ while (AVAILABLE_EFUSE_ADDR(efuse_addr)) { -+ if (efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest) == _FALSE) { -+ ret = _FALSE; -+ break; -+ } -+ -+ if (efuse_data == 0xFF) -+ break; -+ -+ if (EXT_HEADER(efuse_data)) { -+ hoffset = GET_HDR_OFFSET_2_0(efuse_data); -+ efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest); -+ if (ALL_WORDS_DISABLED(efuse_data)) { -+ RTW_INFO("%s: Error!! All words disabled!\n", __FUNCTION__); -+ continue; -+ } -+ -+ hoffset |= ((efuse_data & 0xF0) >> 1); -+ hworden = efuse_data & 0x0F; -+ } else { -+ hoffset = (efuse_data >> 4) & 0x0F; -+ hworden = efuse_data & 0x0F; -+ } -+ -+ if (hoffset == offset) { -+ for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { -+ /* Check word enable condition in the section */ -+ if (!(hworden & (0x01 << i))) { -+ /* ReadEFuseByte(padapter, efuse_addr++, &efuse_data, bPseudoTest); */ -+ efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest); -+ /* RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, efuse_addr+tmpidx, efuse_data); */ -+ data[i * 2] = efuse_data; -+ -+ /* ReadEFuseByte(padapter, efuse_addr++, &efuse_data, bPseudoTest); */ -+ efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest); -+ /* RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, efuse_addr+tmpidx, efuse_data); */ -+ data[(i * 2) + 1] = efuse_data; -+ } -+ } -+ } else { -+ word_cnts = Efuse_CalculateWordCnts(hworden); -+ efuse_addr += word_cnts * 2; -+ } -+ } -+ -+ return ret; -+} -+ -+static u8 -+hal_EfusePgCheckAvailableAddr( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ u8 bPseudoTest) -+{ -+ u16 max_available = 0; -+ u16 current_size; -+ -+ -+ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &max_available, bPseudoTest); -+ /* RTW_INFO("%s: max_available=%d\n", __FUNCTION__, max_available); */ -+ -+ current_size = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); -+ if (current_size >= max_available) { -+ RTW_INFO("%s: Error!! current_size(%d)>max_available(%d)\n", __FUNCTION__, current_size, max_available); -+ return _FALSE; -+ } -+ return _TRUE; -+} -+ -+static void -+hal_EfuseConstructPGPkt( -+ u8 offset, -+ u8 word_en, -+ u8 *pData, -+ PPGPKT_STRUCT pTargetPkt) -+{ -+ _rtw_memset(pTargetPkt->data, 0xFF, PGPKT_DATA_SIZE); -+ pTargetPkt->offset = offset; -+ pTargetPkt->word_en = word_en; -+ efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); -+ pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); -+} -+ -+#if 0 -+static u8 -+wordEnMatched( -+ PPGPKT_STRUCT pTargetPkt, -+ PPGPKT_STRUCT pCurPkt, -+ u8 *pWden) -+{ -+ u8 match_word_en = 0x0F; /* default all words are disabled */ -+ u8 i; -+ -+ /* check if the same words are enabled both target and current PG packet */ -+ if (((pTargetPkt->word_en & BIT(0)) == 0) && -+ ((pCurPkt->word_en & BIT(0)) == 0)) { -+ match_word_en &= ~BIT(0); /* enable word 0 */ -+ } -+ if (((pTargetPkt->word_en & BIT(1)) == 0) && -+ ((pCurPkt->word_en & BIT(1)) == 0)) { -+ match_word_en &= ~BIT(1); /* enable word 1 */ -+ } -+ if (((pTargetPkt->word_en & BIT(2)) == 0) && -+ ((pCurPkt->word_en & BIT(2)) == 0)) { -+ match_word_en &= ~BIT(2); /* enable word 2 */ -+ } -+ if (((pTargetPkt->word_en & BIT(3)) == 0) && -+ ((pCurPkt->word_en & BIT(3)) == 0)) { -+ match_word_en &= ~BIT(3); /* enable word 3 */ -+ } -+ -+ *pWden = match_word_en; -+ -+ if (match_word_en != 0xf) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+static u8 -+hal_EfuseCheckIfDatafollowed( -+ PADAPTER pAdapter, -+ u8 word_cnts, -+ u16 startAddr, -+ u8 bPseudoTest) -+{ -+ u8 bRet = _FALSE; -+ u8 i, efuse_data; -+ -+ for (i = 0; i < (word_cnts * 2); i++) { -+ if (efuse_OneByteRead(pAdapter, (startAddr + i) , &efuse_data, bPseudoTest) == _FALSE) { -+ RTW_INFO("%s: efuse_OneByteRead FAIL!!\n", __FUNCTION__); -+ bRet = _TRUE; -+ break; -+ } -+ -+ if (efuse_data != 0xFF) { -+ bRet = _TRUE; -+ break; -+ } -+ } -+ -+ return bRet; -+} -+#endif -+ -+static u8 -+hal_EfusePartialWriteCheck( -+ PADAPTER padapter, -+ u8 efuseType, -+ u16 *pAddr, -+ PPGPKT_STRUCT pTargetPkt, -+ u8 bPseudoTest) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal; -+ u8 bRet = _FALSE; -+ u16 startAddr = 0, efuse_max_available_len = 0, efuse_max = 0; -+ u8 efuse_data = 0; -+#if 0 -+ u8 i, cur_header = 0; -+ u8 new_wden = 0, matched_wden = 0, badworden = 0; -+ PGPKT_STRUCT curPkt; -+#endif -+ -+ -+ EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_max_available_len, bPseudoTest); -+ EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_CONTENT_LEN_BANK, &efuse_max, bPseudoTest); -+ -+ if (efuseType == EFUSE_WIFI) { -+ if (bPseudoTest) { -+#ifdef HAL_EFUSE_MEMORY -+ startAddr = (u16)pEfuseHal->fakeEfuseUsedBytes; -+#else -+ startAddr = (u16)fakeEfuseUsedBytes; -+#endif -+ } else -+ rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); -+ } else { -+ if (bPseudoTest) { -+#ifdef HAL_EFUSE_MEMORY -+ startAddr = (u16)pEfuseHal->fakeBTEfuseUsedBytes; -+#else -+ startAddr = (u16)fakeBTEfuseUsedBytes; -+#endif -+ } else -+ rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8 *)&startAddr); -+ } -+ startAddr %= efuse_max; -+ RTW_INFO("%s: startAddr=%#X\n", __FUNCTION__, startAddr); -+ -+ while (1) { -+ if (startAddr >= efuse_max_available_len) { -+ bRet = _FALSE; -+ RTW_INFO("%s: startAddr(%d) >= efuse_max_available_len(%d)\n", -+ __FUNCTION__, startAddr, efuse_max_available_len); -+ break; -+ } -+ -+ if (efuse_OneByteRead(padapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) { -+#if 1 -+ bRet = _FALSE; -+ RTW_INFO("%s: Something Wrong! last bytes(%#X=0x%02X) is not 0xFF\n", -+ __FUNCTION__, startAddr, efuse_data); -+ break; -+#else -+ if (EXT_HEADER(efuse_data)) { -+ cur_header = efuse_data; -+ startAddr++; -+ efuse_OneByteRead(padapter, startAddr, &efuse_data, bPseudoTest); -+ if (ALL_WORDS_DISABLED(efuse_data)) { -+ RTW_INFO("%s: Error condition, all words disabled!", __FUNCTION__); -+ bRet = _FALSE; -+ break; -+ } else { -+ curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); -+ curPkt.word_en = efuse_data & 0x0F; -+ } -+ } else { -+ cur_header = efuse_data; -+ curPkt.offset = (cur_header >> 4) & 0x0F; -+ curPkt.word_en = cur_header & 0x0F; -+ } -+ -+ curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en); -+ /* if same header is found but no data followed */ -+ /* write some part of data followed by the header. */ -+ if ((curPkt.offset == pTargetPkt->offset) && -+ (hal_EfuseCheckIfDatafollowed(padapter, curPkt.word_cnts, startAddr + 1, bPseudoTest) == _FALSE) && -+ wordEnMatched(pTargetPkt, &curPkt, &matched_wden) == _TRUE) { -+ RTW_INFO("%s: Need to partial write data by the previous wrote header\n", __FUNCTION__); -+ /* Here to write partial data */ -+ badworden = Efuse_WordEnableDataWrite(padapter, startAddr + 1, matched_wden, pTargetPkt->data, bPseudoTest); -+ if (badworden != 0x0F) { -+ u32 PgWriteSuccess = 0; -+ /* if write fail on some words, write these bad words again */ -+ if (efuseType == EFUSE_WIFI) -+ PgWriteSuccess = Efuse_PgPacketWrite(padapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); -+ else -+ PgWriteSuccess = Efuse_PgPacketWrite_BT(padapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); -+ -+ if (!PgWriteSuccess) { -+ bRet = _FALSE; /* write fail, return */ -+ break; -+ } -+ } -+ /* partial write ok, update the target packet for later use */ -+ for (i = 0; i < 4; i++) { -+ if ((matched_wden & (0x1 << i)) == 0) { /* this word has been written */ -+ pTargetPkt->word_en |= (0x1 << i); /* disable the word */ -+ } -+ } -+ pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); -+ } -+ /* read from next header */ -+ startAddr = startAddr + (curPkt.word_cnts * 2) + 1; -+#endif -+ } else { -+ /* not used header, 0xff */ -+ *pAddr = startAddr; -+ /* RTW_INFO("%s: Started from unused header offset=%d\n", __FUNCTION__, startAddr)); */ -+ bRet = _TRUE; -+ break; -+ } -+ } -+ -+ return bRet; -+} -+ -+BOOLEAN -+hal_EfuseFixHeaderProcess( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ PPGPKT_STRUCT pFixPkt, -+ u16 *pAddr, -+ BOOLEAN bPseudoTest -+) -+{ -+ u8 originaldata[8], badworden=0; -+ u16 efuse_addr=*pAddr; -+ u32 PgWriteSuccess=0; -+ -+ _rtw_memset((void *)originaldata, 0xff, 8); -+ -+ if (Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) { -+ badworden = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest); -+ -+ if (badworden != 0xf) { -+ -+ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); -+ if (!PgWriteSuccess) -+ return FALSE; -+ else -+ efuse_addr = Hal_EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest); -+ } else { -+ efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; -+ } -+ } else { -+ efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; -+ } -+ -+ *pAddr = efuse_addr; -+ return TRUE; -+} -+ -+static u8 -+hal_EfusePgPacketWrite1ByteHeader( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ u16 *pAddr, -+ PPGPKT_STRUCT pTargetPkt, -+ u8 bPseudoTest) -+{ -+ u8 bRet = _FALSE; -+ u8 pg_header = 0, tmp_header = 0; -+ u16 efuse_addr = *pAddr; -+ u8 repeatcnt = 0; -+ -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en; -+ -+ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); -+ -+ phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); -+ -+ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); -+ -+ phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); -+ -+ while (tmp_header == 0xFF || pg_header != tmp_header) { -+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { -+ RTW_ERR("retry %d times fail!!\n", repeatcnt); -+ return _FALSE; -+ } -+ efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); -+ efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); -+ RTW_ERR("===>%s: Keep %d-th retrying,pg_header = 0x%X tmp_header = 0x%X\n", __FUNCTION__,repeatcnt, pg_header, tmp_header); -+ } -+ -+ if (pg_header == tmp_header) -+ bRet = _TRUE; -+ else { -+ PGPKT_STRUCT fixPkt; -+ -+ RTW_ERR(" pg_header(0x%X) != tmp_header(0x%X)\n", pg_header, tmp_header); -+ RTW_ERR("Error condition for fixed PG packet, need to cover the existed data: (Addr, Data) = (0x%X, 0x%X)\n", -+ efuse_addr, tmp_header); -+ fixPkt.offset = (tmp_header>>4) & 0x0F; -+ fixPkt.word_en = tmp_header & 0x0F; -+ fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); -+ if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) -+ return _FALSE; -+ } -+ -+ *pAddr = efuse_addr; -+ -+ return _TRUE; -+} -+ -+static u8 -+hal_EfusePgPacketWrite2ByteHeader( -+ PADAPTER padapter, -+ u8 efuseType, -+ u16 *pAddr, -+ PPGPKT_STRUCT pTargetPkt, -+ u8 bPseudoTest) -+{ -+ u16 efuse_addr, efuse_max_available_len = 0; -+ u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0; -+ u8 repeatcnt = 0; -+ -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &efuse_max_available_len, bPseudoTest); -+ -+ efuse_addr = *pAddr; -+ -+ if (efuse_addr >= efuse_max_available_len) { -+ RTW_INFO("%s: addr(%d) over avaliable(%d)!!\n", __FUNCTION__, efuse_addr, efuse_max_available_len); -+ return _FALSE; -+ } -+ -+ while (efuse_addr < efuse_max_available_len) { -+ pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; -+ efuse_OneByteWrite(padapter, efuse_addr, pg_header, bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 0); -+ efuse_OneByteRead(padapter, efuse_addr, &tmp_header, bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 1); -+ -+ while (tmp_header == 0xFF || pg_header != tmp_header) { -+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { -+ RTW_INFO("%s, Repeat over limit for pg_header!!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ -+ efuse_OneByteWrite(padapter, efuse_addr, pg_header, bPseudoTest); -+ efuse_OneByteRead(padapter, efuse_addr, &tmp_header, bPseudoTest); -+ } -+ -+ /*to write ext_header*/ -+ if (tmp_header == pg_header) { -+ efuse_addr++; -+ pg_header_temp = pg_header; -+ pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; -+ -+ efuse_OneByteWrite(padapter, efuse_addr, pg_header, bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 0); -+ efuse_OneByteRead(padapter, efuse_addr, &tmp_header, bPseudoTest); -+ phy_set_mac_reg(padapter, EFUSE_TEST, BIT26, 1); -+ -+ while (tmp_header == 0xFF || pg_header != tmp_header) { -+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { -+ RTW_INFO("%s, Repeat over limit for ext_header!!\n", __FUNCTION__); -+ return _FALSE; -+ } -+ -+ efuse_OneByteWrite(padapter, efuse_addr, pg_header, bPseudoTest); -+ efuse_OneByteRead(padapter, efuse_addr, &tmp_header, bPseudoTest); -+ } -+ -+ if ((tmp_header & 0x0F) == 0x0F) { -+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { -+ RTW_INFO("Repeat over limit for word_en!!\n"); -+ return _FALSE; -+ } else { -+ efuse_addr++; -+ continue; -+ } -+ } else if (pg_header != tmp_header) { -+ PGPKT_STRUCT fixPkt; -+ RTW_ERR("Error, efuse_PgPacketWrite2ByteHeader(), offset PG fail, need to cover the existed data!!\n"); -+ RTW_ERR("Error condition for offset PG fail, need to cover the existed data\n"); -+ fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1); -+ fixPkt.word_en = tmp_header & 0x0F; -+ fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); -+ if (!hal_EfuseFixHeaderProcess(padapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) -+ return _FALSE; -+ } else -+ break; -+ } else if ((tmp_header & 0x1F) == 0x0F) {/*wrong extended header*/ -+ efuse_addr += 2; -+ continue; -+ } -+ } -+ -+ *pAddr = efuse_addr; -+ -+ return _TRUE; -+} -+ -+static u8 -+hal_EfusePgPacketWriteHeader( -+ PADAPTER padapter, -+ u8 efuseType, -+ u16 *pAddr, -+ PPGPKT_STRUCT pTargetPkt, -+ u8 bPseudoTest) -+{ -+ u8 bRet = _FALSE; -+ -+ if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) -+ bRet = hal_EfusePgPacketWrite2ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest); -+ else -+ bRet = hal_EfusePgPacketWrite1ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest); -+ -+ return bRet; -+} -+ -+static u8 -+hal_EfusePgPacketWriteData( -+ PADAPTER pAdapter, -+ u8 efuseType, -+ u16 *pAddr, -+ PPGPKT_STRUCT pTargetPkt, -+ u8 bPseudoTest) -+{ -+ u16 efuse_addr; -+ u8 badworden; -+ u8 PgWriteSuccess = 0; -+ -+ -+ efuse_addr = *pAddr; -+ badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); -+ if (badworden == 0x0F) { -+ RTW_INFO("%s: OK!!\n", __FUNCTION__); -+ return _TRUE; -+ } else { /* Reorganize other pg packet */ -+ RTW_ERR ("Error, efuse_PgPacketWriteData(), wirte data fail!!\n"); -+ RTW_ERR ("efuse_PgPacketWriteData Fail!!\n"); -+ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); -+ if (!PgWriteSuccess) -+ return FALSE; -+ else -+ return TRUE; -+ } -+ -+ return _TRUE; -+} -+ -+static s32 -+Hal_EfusePgPacketWrite( -+ PADAPTER padapter, -+ u8 offset, -+ u8 word_en, -+ u8 *pData, -+ u8 bPseudoTest) -+{ -+ PGPKT_STRUCT targetPkt; -+ u16 startAddr = 0; -+ u8 efuseType = EFUSE_WIFI; -+ -+ if (!hal_EfusePgCheckAvailableAddr(padapter, efuseType, bPseudoTest)) -+ return _FALSE; -+ -+ hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); -+ -+ if (!hal_EfusePartialWriteCheck(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) -+ return _FALSE; -+ -+ if (!hal_EfusePgPacketWriteHeader(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) -+ return _FALSE; -+ -+ if (!hal_EfusePgPacketWriteData(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+static u8 -+Hal_EfusePgPacketWrite_BT( -+ PADAPTER pAdapter, -+ u8 offset, -+ u8 word_en, -+ u8 *pData, -+ u8 bPseudoTest) -+{ -+ PGPKT_STRUCT targetPkt; -+ u16 startAddr = 0; -+ u8 efuseType = EFUSE_BT; -+ -+ if (!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) -+ return _FALSE; -+ -+ hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); -+ -+ if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) -+ return _FALSE; -+ -+ if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) -+ return _FALSE; -+ -+ if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+ -+static void read_chip_version_8703b(PADAPTER padapter) -+{ -+ u32 value32; -+ HAL_DATA_TYPE *pHalData; -+ pHalData = GET_HAL_DATA(padapter); -+ -+ value32 = rtw_read32(padapter, REG_SYS_CFG); -+ pHalData->version_id.ICType = CHIP_8703B; -+ pHalData->version_id.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); -+ pHalData->version_id.RFType = RF_TYPE_1T1R; -+ pHalData->version_id.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); -+ pHalData->version_id.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /* IC version (CUT) */ -+ -+ /* For regulator mode. by tynli. 2011.01.14 */ -+ pHalData->RegulatorMode = ((value32 & SPS_SEL) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); -+ -+ value32 = rtw_read32(padapter, REG_GPIO_OUTSTS); -+ pHalData->version_id.ROMVer = ((value32 & RF_RL_ID) >> 20); /* ROM code version. */ -+ -+ /* For multi-function consideration. Added by Roger, 2010.10.06. */ -+ pHalData->MultiFunc = RT_MULTI_FUNC_NONE; -+ value32 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL); -+ pHalData->MultiFunc |= ((value32 & WL_FUNC_EN) ? RT_MULTI_FUNC_WIFI : 0); -+ pHalData->MultiFunc |= ((value32 & BT_FUNC_EN) ? RT_MULTI_FUNC_BT : 0); -+ pHalData->MultiFunc |= ((value32 & GPS_FUNC_EN) ? RT_MULTI_FUNC_GPS : 0); -+ pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT); -+ -+ -+#if 0 -+ /* mark for chage to use efuse */ -+ if (IS_B_CUT(pHalData->version_id) || IS_C_CUT(pHalData->version_id)) { -+ RTW_INFO(" IS_B/C_CUT SWR up 1 level !!!!!!!!!!!!!!!!!\n"); -+ phy_set_mac_reg(padapter, 0x14, BIT23 | BIT22 | BIT21 | BIT20, 0x5); /* MAC reg 0x14[23:20] = 4b'0101 (SWR 1.220V) */ -+ } else if (IS_D_CUT(pHalData->version_id)) -+ RTW_INFO(" IS_D_CUT SKIP SWR !!!!!!!!!!!!!!!!!\n"); -+#endif -+ -+#if 1 -+ dump_chip_info(pHalData->version_id); -+#endif -+ -+} -+ -+ -+void rtl8703b_InitBeaconParameters(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ u16 val16; -+ u8 val8; -+ -+ -+ val8 = DIS_TSF_UDT; -+ val16 = val8 | (val8 << 8); /* port0 and port1 */ -+#ifdef CONFIG_BT_COEXIST -+ /* Enable prot0 beacon function for PSTDMA */ -+ val16 |= EN_BCN_FUNCTION; -+#endif -+ rtw_write16(padapter, REG_BCN_CTRL, val16); -+ -+ /* TBTT setup time */ -+ rtw_write8(padapter, REG_TBTT_PROHIBIT, TBTT_PROHIBIT_SETUP_TIME); -+ -+ /* TBTT hold time: 0x540[19:8] */ -+ rtw_write8(padapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME_STOP_BCN & 0xFF); -+ rtw_write8(padapter, REG_TBTT_PROHIBIT + 2, -+ (rtw_read8(padapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME_STOP_BCN >> 8)); -+ -+ /* Firmware will control REG_DRVERLYINT when power saving is enable, */ -+ /* so don't set this register on STA mode. */ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _FALSE) -+ rtw_write8(padapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME_8703B); /* 5ms */ -+ rtw_write8(padapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME_8703B); /* 2ms */ -+ -+ /* Suggested by designer timchen. Change beacon AIFS to the largest number */ -+ /* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */ -+ rtw_write16(padapter, REG_BCNTCFG, 0x4413); -+ -+} -+ -+void rtl8703b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode) -+{ -+#ifdef CONFIG_ADHOC_WORKAROUND_SETTING -+ rtw_write8(padapter, REG_BCN_MAX_ERR, 0xFF); -+#else -+ /* rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10)); */ -+#endif -+} -+ -+void _InitBurstPktLen_8703BS(PADAPTER Adapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ rtw_write8(Adapter, 0x4c7, rtw_read8(Adapter, 0x4c7) | BIT(7)); /* enable single pkt ampdu */ -+ rtw_write8(Adapter, REG_RX_PKT_LIMIT_8703B, 0x18); /* for VHT packet length 11K */ -+ rtw_write8(Adapter, REG_MAX_AGGR_NUM_8703B, 0x1F); -+ rtw_write8(Adapter, REG_PIFS_8703B, 0x00); -+ rtw_write8(Adapter, REG_FWHW_TXQ_CTRL_8703B, rtw_read8(Adapter, REG_FWHW_TXQ_CTRL) & (~BIT(7))); -+ if (pHalData->AMPDUBurstMode) -+ rtw_write8(Adapter, REG_AMPDU_BURST_MODE_8703B, 0x5F); -+ rtw_write8(Adapter, REG_AMPDU_MAX_TIME_8703B, 0x70); -+ -+ /* ARFB table 9 for 11ac 5G 2SS */ -+ rtw_write32(Adapter, REG_ARFR0_8703B, 0x00000010); -+ if (IS_NORMAL_CHIP(pHalData->version_id)) -+ rtw_write32(Adapter, REG_ARFR0_8703B + 4, 0xfffff000); -+ else -+ rtw_write32(Adapter, REG_ARFR0_8703B + 4, 0x3e0ff000); -+ -+ /* ARFB table 10 for 11ac 5G 1SS */ -+ rtw_write32(Adapter, REG_ARFR1_8703B, 0x00000010); -+ rtw_write32(Adapter, REG_ARFR1_8703B + 4, 0x003ff000); -+} -+ -+void _InitLTECoex_8703BS(PADAPTER Adapter) -+{ -+ /* LTE COEX setting */ -+ rtw_write16(Adapter, REG_LTECOEX_WRITE_DATA, 0x7700); -+ rtw_write32(Adapter, REG_LTECOEX_CTRL, 0xc0020038); -+ rtw_write8(Adapter, 0x73, 0x04); -+} -+ -+void _InitMacAPLLSetting_8703B(PADAPTER Adapter) -+{ -+ u16 RegValue; -+ -+ RegValue = rtw_read16(Adapter, REG_AFE_CTRL_4_8703B); -+ RegValue |= BIT(4); -+ RegValue |= BIT(15); -+ rtw_write16(Adapter, REG_AFE_CTRL_4_8703B, RegValue); -+} -+ -+ -+static void _BeaconFunctionEnable(PADAPTER padapter, u8 Enable, u8 Linked) -+{ -+ rtw_write8(padapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB); -+ rtw_write8(padapter, REG_RD_CTRL + 1, 0x6F); -+} -+ -+static void rtl8703b_SetBeaconRelatedRegisters(PADAPTER padapter) -+{ -+ u8 val8; -+ u32 value32; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ u32 bcn_ctrl_reg; -+ -+ /* reset TSF, enable update TSF, correcting TSF On Beacon */ -+ -+ /* REG_MBSSID_BCN_SPACE */ -+ /* REG_BCNDMATIM */ -+ /* REG_ATIMWND */ -+ /* REG_TBTT_PROHIBIT */ -+ /* REG_DRVERLYINT */ -+ /* REG_BCN_MAX_ERR */ -+ /* REG_BCNTCFG */ /* (0x510) */ -+ /* REG_DUAL_TSF_RST */ -+ /* REG_BCN_CTRL */ /* (0x550) */ -+ -+ -+ bcn_ctrl_reg = REG_BCN_CTRL; -+#ifdef CONFIG_CONCURRENT_MODE -+ if (padapter->hw_port == HW_PORT1) -+ bcn_ctrl_reg = REG_BCN_CTRL_1; -+#endif -+ -+ /* */ -+ /* ATIM window */ -+ /* */ -+ rtw_write16(padapter, REG_ATIMWND, 2); -+ -+ /* */ -+ /* Beacon interval (in unit of TU). */ -+ /* */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)&pmlmeinfo->bcn_interval); -+ -+ rtl8703b_InitBeaconParameters(padapter); -+ -+ rtw_write8(padapter, REG_SLOT, 0x09); -+ -+ /* */ -+ /* Reset TSF Timer to zero, added by Roger. 2008.06.24 */ -+ /* */ -+ value32 = rtw_read32(padapter, REG_TCR); -+ value32 &= ~TSFRST; -+ rtw_write32(padapter, REG_TCR, value32); -+ -+ value32 |= TSFRST; -+ rtw_write32(padapter, REG_TCR, value32); -+ -+ /* NOTE: Fix test chip's bug (about contention windows's randomness) */ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE | WIFI_AP_STATE | WIFI_MESH_STATE) == _TRUE) { -+ rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); -+ rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); -+ } -+ -+ _BeaconFunctionEnable(padapter, _TRUE, _TRUE); -+ -+ ResumeTxBeacon(padapter); -+ val8 = rtw_read8(padapter, bcn_ctrl_reg); -+ val8 |= DIS_BCNQ_SUB; -+ rtw_write8(padapter, bcn_ctrl_reg, val8); -+} -+ -+void hal_notch_filter_8703b(_adapter *adapter, bool enable) -+{ -+ if (enable) { -+ RTW_INFO("Enable notch filter\n"); -+ rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) | BIT1); -+ } else { -+ RTW_INFO("Disable notch filter\n"); -+ rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT1); -+ } -+} -+ -+/* -+ * Description: In normal chip, we should send some packet to Hw which will be used by Fw -+ * in FW LPS mode. The function is to fill the Tx descriptor of this packets, then -+ * Fw can tell Hw to send these packet derectly. -+ * Added by tynli. 2009.10.15. -+ * -+ * type1:pspoll, type2:null */ -+void rtl8703b_fill_fake_txdesc( -+ PADAPTER padapter, -+ u8 *pDesc, -+ u32 BufferLen, -+ u8 IsPsPoll, -+ u8 IsBTQosNull, -+ u8 bDataFrame) -+{ -+ /* Clear all status */ -+ _rtw_memset(pDesc, 0, TXDESC_SIZE); -+ -+ SET_TX_DESC_FIRST_SEG_8703B(pDesc, 1); /* bFirstSeg; */ -+ SET_TX_DESC_LAST_SEG_8703B(pDesc, 1); /* bLastSeg; */ -+ -+ SET_TX_DESC_OFFSET_8703B(pDesc, 0x28); /* Offset = 32 */ -+ -+ SET_TX_DESC_PKT_SIZE_8703B(pDesc, BufferLen); /* Buffer size + command header */ -+ SET_TX_DESC_QUEUE_SEL_8703B(pDesc, QSLT_MGNT); /* Fixed queue of Mgnt queue */ -+ -+ /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */ -+ if (_TRUE == IsPsPoll) -+ SET_TX_DESC_NAV_USE_HDR_8703B(pDesc, 1); -+ else { -+ SET_TX_DESC_HWSEQ_EN_8703B(pDesc, 1); /* Hw set sequence number */ -+ SET_TX_DESC_HWSEQ_SEL_8703B(pDesc, 0); -+ } -+ -+ if (_TRUE == IsBTQosNull) -+ SET_TX_DESC_BT_INT_8703B(pDesc, 1); -+ -+ SET_TX_DESC_USE_RATE_8703B(pDesc, 1); /* use data rate which is set by Sw */ -+ SET_TX_DESC_OWN_8703B((u8 *)pDesc, 1); -+ -+ SET_TX_DESC_TX_RATE_8703B(pDesc, DESC8703B_RATE1M); -+ -+ /* */ -+ /* Encrypt the data frame if under security mode excepct null data. Suggested by CCW. */ -+ /* */ -+ if (_TRUE == bDataFrame) { -+ u32 EncAlg; -+ -+ EncAlg = padapter->securitypriv.dot11PrivacyAlgrthm; -+ switch (EncAlg) { -+ case _NO_PRIVACY_: -+ SET_TX_DESC_SEC_TYPE_8703B(pDesc, 0x0); -+ break; -+ case _WEP40_: -+ case _WEP104_: -+ case _TKIP_: -+ SET_TX_DESC_SEC_TYPE_8703B(pDesc, 0x1); -+ break; -+ case _SMS4_: -+ SET_TX_DESC_SEC_TYPE_8703B(pDesc, 0x2); -+ break; -+ case _AES_: -+ SET_TX_DESC_SEC_TYPE_8703B(pDesc, 0x3); -+ break; -+ default: -+ SET_TX_DESC_SEC_TYPE_8703B(pDesc, 0x0); -+ break; -+ } -+ } -+ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ /* USB interface drop packet if the checksum of descriptor isn't correct. */ -+ /* Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). */ -+ rtl8703b_cal_txdesc_chksum((struct tx_desc *)pDesc); -+#endif -+} -+ -+void rtl8703b_InitAntenna_Selection(PADAPTER padapter) -+{ -+#if 0 -+ PHAL_DATA_TYPE pHalData; -+ u8 val; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+#if 0 -+ val = rtw_read8(padapter, REG_LEDCFG2); -+ /* Let 8051 take control antenna settting */ -+ val |= BIT(7); /* DPDT_SEL_EN, 0x4C[23] */ -+ rtw_write8(padapter, REG_LEDCFG2, val); -+#else -+ /* TODO: <20130114, Kordan> The following setting is only for DPDT and Fixed board type. */ -+ /* TODO: A better solution is configure it according EFUSE during the run-time. */ -+ phy_set_mac_reg(padapter, 0x64, BIT20, 0x0); /* 0x66[4]=0 */ -+ phy_set_mac_reg(padapter, 0x64, BIT24, 0x0); /* 0x66[8]=0 */ -+ phy_set_mac_reg(padapter, 0x40, BIT4, 0x0); /* 0x40[4]=0 */ -+ phy_set_mac_reg(padapter, 0x40, BIT3, 0x1); /* 0x40[3]=1 */ -+ phy_set_mac_reg(padapter, 0x4C, BIT24, 0x1); /* 0x4C[24:23]=10 */ -+ phy_set_mac_reg(padapter, 0x4C, BIT23, 0x0); /* 0x4C[24:23]=10 */ -+ phy_set_bb_reg(padapter, 0x944, BIT1 | BIT0, 0x3); /* 0x944[1:0]=11 */ -+ phy_set_bb_reg(padapter, 0x930, bMaskByte0, 0x77); /* 0x930[7:0]=77 */ -+ phy_set_mac_reg(padapter, 0x38, BIT11, 0x1); /* 0x38[11]=1 */ -+#endif -+#endif -+} -+ -+void rtl8703b_CheckAntenna_Selection(PADAPTER padapter) -+{ -+#if 0 -+ PHAL_DATA_TYPE pHalData; -+ u8 val; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ val = rtw_read8(padapter, REG_LEDCFG2); -+ /* Let 8051 take control antenna settting */ -+ if (!(val & BIT(7))) { -+ val |= BIT(7); /* DPDT_SEL_EN, 0x4C[23] */ -+ rtw_write8(padapter, REG_LEDCFG2, val); -+ } -+#endif -+} -+void rtl8703b_DeinitAntenna_Selection(PADAPTER padapter) -+{ -+#if 0 -+ PHAL_DATA_TYPE pHalData; -+ u8 val; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ val = rtw_read8(padapter, REG_LEDCFG2); -+ /* Let 8051 take control antenna settting */ -+ val &= ~BIT(7); /* DPDT_SEL_EN, clear 0x4C[23] */ -+ rtw_write8(padapter, REG_LEDCFG2, val); -+#endif -+} -+ -+void init_hal_spec_8703b(_adapter *adapter) -+{ -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ -+ hal_spec->ic_name = "rtl8703b"; -+ hal_spec->macid_num = 16; -+ hal_spec->sec_cam_ent_num = 16; -+ hal_spec->sec_cap = 0; -+ hal_spec->macid_cap = MACID_DROP_INDIRECT; -+ hal_spec->macid_txrpt = 0x8100; -+ hal_spec->macid_txrpt_pgsz = 16; -+ -+ hal_spec->rfpath_num_2g = 1; -+ hal_spec->rfpath_num_5g = 0; -+ hal_spec->rf_reg_path_num = hal_spec->rf_reg_path_avail_num = 1; -+ hal_spec->rf_reg_trx_path_bmp = 0x11; -+ hal_spec->max_tx_cnt = 1; -+ -+ hal_spec->tx_nss_num = 1; -+ hal_spec->rx_nss_num = 1; -+ hal_spec->band_cap = BAND_CAP_2G; -+ hal_spec->bw_cap = BW_CAP_20M | BW_CAP_40M; -+ hal_spec->port_num = 2; -+ hal_spec->proto_cap = PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N; -+ -+ hal_spec->txgi_max = 63; -+ hal_spec->txgi_pdbm = 2; -+ -+ hal_spec->wl_func = 0 -+ | WL_FUNC_P2P -+ | WL_FUNC_MIRACAST -+ | WL_FUNC_TDLS -+ ; -+ -+ hal_spec->tx_aclt_unit_factor = 1; -+ -+ hal_spec->pg_txpwr_saddr = 0x10; -+ hal_spec->pg_txgi_diff_factor = 1; -+ -+ rtw_macid_ctl_init_sleep_reg(adapter_to_macidctl(adapter) -+ , REG_MACID_SLEEP, 0, 0, 0); -+} -+ -+void rtl8703b_init_default_value(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ u8 i; -+ pHalData = GET_HAL_DATA(padapter); -+ -+ /* init default value */ -+ pHalData->fw_ractrl = _FALSE; -+ if (!adapter_to_pwrctl(padapter)->bkeepfwalive) -+ pHalData->LastHMEBoxNum = 0; -+ -+ /* init phydm default value */ -+ pHalData->bIQKInitialized = _FALSE; -+ -+ /* init Efuse variables */ -+ pHalData->EfuseUsedBytes = 0; -+ pHalData->EfuseUsedPercentage = 0; -+#ifdef HAL_EFUSE_MEMORY -+ pHalData->EfuseHal.fakeEfuseBank = 0; -+ pHalData->EfuseHal.fakeEfuseUsedBytes = 0; -+ _rtw_memset(pHalData->EfuseHal.fakeEfuseContent, 0xFF, EFUSE_MAX_HW_SIZE); -+ _rtw_memset(pHalData->EfuseHal.fakeEfuseInitMap, 0xFF, EFUSE_MAX_MAP_LEN); -+ _rtw_memset(pHalData->EfuseHal.fakeEfuseModifiedMap, 0xFF, EFUSE_MAX_MAP_LEN); -+ pHalData->EfuseHal.BTEfuseUsedBytes = 0; -+ pHalData->EfuseHal.BTEfuseUsedPercentage = 0; -+ _rtw_memset(pHalData->EfuseHal.BTEfuseContent, 0xFF, EFUSE_MAX_BT_BANK * EFUSE_MAX_HW_SIZE); -+ _rtw_memset(pHalData->EfuseHal.BTEfuseInitMap, 0xFF, EFUSE_BT_MAX_MAP_LEN); -+ _rtw_memset(pHalData->EfuseHal.BTEfuseModifiedMap, 0xFF, EFUSE_BT_MAX_MAP_LEN); -+ pHalData->EfuseHal.fakeBTEfuseUsedBytes = 0; -+ _rtw_memset(pHalData->EfuseHal.fakeBTEfuseContent, 0xFF, EFUSE_MAX_BT_BANK * EFUSE_MAX_HW_SIZE); -+ _rtw_memset(pHalData->EfuseHal.fakeBTEfuseInitMap, 0xFF, EFUSE_BT_MAX_MAP_LEN); -+ _rtw_memset(pHalData->EfuseHal.fakeBTEfuseModifiedMap, 0xFF, EFUSE_BT_MAX_MAP_LEN); -+#endif -+} -+ -+u8 GetEEPROMSize8703B(PADAPTER padapter) -+{ -+ u8 size = 0; -+ u32 cr; -+ -+ cr = rtw_read16(padapter, REG_9346CR); -+ /* 6: EEPROM used is 93C46, 4: boot from E-Fuse. */ -+ size = (cr & BOOT_FROM_EEPROM) ? 6 : 4; -+ -+ RTW_INFO("EEPROM type is %s\n", size == 4 ? "E-FUSE" : "93C46"); -+ -+ return size; -+} -+ -+/* ------------------------------------------------------------------------- -+ * -+ * LLT R/W/Init function -+ * -+ * ------------------------------------------------------------------------- */ -+s32 rtl8703b_InitLLTTable(PADAPTER padapter) -+{ -+ systime start; -+ u32 passing_time; -+ u32 val32; -+ s32 ret; -+ -+ -+ ret = _FAIL; -+ -+ val32 = rtw_read32(padapter, REG_AUTO_LLT); -+ val32 |= BIT_AUTO_INIT_LLT; -+ rtw_write32(padapter, REG_AUTO_LLT, val32); -+ -+ start = rtw_get_current_time(); -+ -+ do { -+ val32 = rtw_read32(padapter, REG_AUTO_LLT); -+ if (!(val32 & BIT_AUTO_INIT_LLT)) { -+ ret = _SUCCESS; -+ break; -+ } -+ -+ passing_time = rtw_get_passing_time_ms(start); -+ if (passing_time > 1000) { -+ RTW_INFO("%s: FAIL!! REG_AUTO_LLT(0x%X)=%08x\n", -+ __FUNCTION__, REG_AUTO_LLT, val32); -+ break; -+ } -+ -+ rtw_usleep_os(2); -+ } while (1); -+ -+ return ret; -+} -+ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+void _DisableGPIO(PADAPTER padapter) -+{ -+#if 0 -+ /* ************************************** -+ * j. GPIO_PIN_CTRL 0x44[31:0]=0x000 -+ * k.Value = GPIO_PIN_CTRL[7:0] -+ * l. GPIO_PIN_CTRL 0x44[31:0] = 0x00FF0000 | (value <<8); write external PIN level -+ * m. GPIO_MUXCFG 0x42 [15:0] = 0x0780 -+ * n. LEDCFG 0x4C[15:0] = 0x8080 -+ * ************************************** */ -+#endif -+ u8 value8; -+ u16 value16; -+ u32 value32; -+ u32 u4bTmp; -+ -+ -+ /* 1. Disable GPIO[7:0] */ -+ rtw_write16(padapter, REG_GPIO_PIN_CTRL + 2, 0x0000); -+ value32 = rtw_read32(padapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF; -+ u4bTmp = value32 & 0x000000FF; -+ value32 |= ((u4bTmp << 8) | 0x00FF0000); -+ rtw_write32(padapter, REG_GPIO_PIN_CTRL, value32); -+ -+ -+ /* 2. Disable GPIO[10:8] */ -+ rtw_write8(padapter, REG_MAC_PINMUX_CFG, 0x00); -+ value16 = rtw_read16(padapter, REG_GPIO_IO_SEL) & 0xFF0F; -+ value8 = (u8)(value16 & 0x000F); -+ value16 |= ((value8 << 4) | 0x0780); -+ rtw_write16(padapter, REG_GPIO_IO_SEL, value16); -+ -+ -+ /* 3. Disable LED0 & 1 */ -+ rtw_write16(padapter, REG_LEDCFG0, 0x8080); -+ -+} /* end of _DisableGPIO() */ -+ -+void _DisableRFAFEAndResetBB8703B(PADAPTER padapter) -+{ -+#if 0 -+ /* ************************************* -+ * a. TXPAUSE 0x522[7:0] = 0xFF Pause MAC TX queue -+ * b. RF path 0 offset 0x00 = 0x00 disable RF -+ * c. APSD_CTRL 0x600[7:0] = 0x40 -+ * d. SYS_FUNC_EN 0x02[7:0] = 0x16 reset BB state machine -+ * e. SYS_FUNC_EN 0x02[7:0] = 0x14 reset BB state machine -+ * ************************************** */ -+#endif -+ enum rf_path eRFPath = RF_PATH_A, value8 = 0; -+ -+ rtw_write8(padapter, REG_TXPAUSE, 0xFF); -+ -+ phy_set_rf_reg(padapter, eRFPath, 0x0, bMaskByte0, 0x0); -+ -+ value8 |= APSDOFF; -+ rtw_write8(padapter, REG_APSD_CTRL, value8);/* 0x40 */ -+ -+ /* Set BB reset at first */ -+ value8 = 0 ; -+ value8 |= (FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn); -+ rtw_write8(padapter, REG_SYS_FUNC_EN, value8); /* 0x16 */ -+ -+ /* Set global reset. */ -+ value8 &= ~FEN_BB_GLB_RSTn; -+ rtw_write8(padapter, REG_SYS_FUNC_EN, value8); /* 0x14 */ -+ -+ /* 2010/08/12 MH We need to set BB/GLBAL reset to save power for SS mode. */ -+ -+} -+ -+void _DisableRFAFEAndResetBB(PADAPTER padapter) -+{ -+ _DisableRFAFEAndResetBB8703B(padapter); -+} -+ -+void _ResetDigitalProcedure1_8703B(PADAPTER padapter, BOOLEAN bWithoutHWSM) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (IS_FW_81xxC(padapter) && (pHalData->firmware_version <= 0x20)) { -+#if 0 -+#if 0 -+ /* **************************** */ -+ /* f. SYS_FUNC_EN 0x03[7:0]=0x54 reset MAC register, DCORE */ -+ /* g. MCUFWDL 0x80[7:0]=0 reset MCU ready status -+ * ***************************** */ -+#endif -+ u32 value32 = 0; -+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, 0x54); -+ rtw_write8(padapter, REG_MCUFWDL, 0); -+#else -+#if 0 -+ /* **************************** */ -+ /* f. MCUFWDL 0x80[7:0]=0 reset MCU ready status */ -+ /* g. SYS_FUNC_EN 0x02[10]= 0 reset MCU register, (8051 reset) */ -+ /* h. SYS_FUNC_EN 0x02[15-12]= 5 reset MAC register, DCORE */ -+ /* i. SYS_FUNC_EN 0x02[10]= 1 enable MCU register, (8051 enable) */ -+ /* ***************************** */ -+#endif -+ u16 valu16 = 0; -+ rtw_write8(padapter, REG_MCUFWDL, 0); -+ -+ valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN); -+ rtw_write16(padapter, REG_SYS_FUNC_EN, (valu16 & (~FEN_CPUEN)));/* reset MCU ,8051 */ -+ -+ valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN) & 0x0FFF; -+ rtw_write16(padapter, REG_SYS_FUNC_EN, (valu16 | (FEN_HWPDN | FEN_ELDR))); /* reset MAC */ -+ -+ valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN); -+ rtw_write16(padapter, REG_SYS_FUNC_EN, (valu16 | FEN_CPUEN));/* enable MCU ,8051 */ -+#endif -+ } else { -+ u8 retry_cnts = 0; -+ -+ /* 2010/08/12 MH For USB SS, we can not stop 8051 when we are trying to */ -+ /* enter IPS/HW&SW radio off. For S3/S4/S5/Disable, we can stop 8051 because */ -+ /* we will init FW when power on again. */ -+ /* if(!pDevice->RegUsbSS) */ -+ { /* If we want to SS mode, we can not reset 8051. */ -+ if (rtw_read8(padapter, REG_MCUFWDL) & BIT1) { -+ /* IF fw in RAM code, do reset */ -+ -+ -+ if (pHalData->bFWReady) { -+ /* 2010/08/25 MH Accordign to RD alfred's suggestion, we need to disable other */ -+ /* HRCV INT to influence 8051 reset. */ -+ rtw_write8(padapter, REG_FWIMR, 0x20); -+ /* 2011/02/15 MH According to Alex's suggestion, close mask to prevent incorrect FW write operation. */ -+ rtw_write8(padapter, REG_FTIMR, 0x00); -+ rtw_write8(padapter, REG_FSIMR, 0x00); -+ -+ rtw_write8(padapter, REG_HMETFR + 3, 0x20); /* 8051 reset by self */ -+ -+ while ((retry_cnts++ < 100) && (FEN_CPUEN & rtw_read16(padapter, REG_SYS_FUNC_EN))) { -+ rtw_udelay_os(50);/* us */ -+ /* 2010/08/25 For test only We keep on reset 5051 to prevent fail. */ -+ /* rtw_write8(padapter, REG_HMETFR+3, 0x20); */ /* 8051 reset by self */ -+ } -+ /* RT_ASSERT((retry_cnts < 100), ("8051 reset failed!\n")); */ -+ -+ if (retry_cnts >= 100) { -+ /* if 8051 reset fail we trigger GPIO 0 for LA */ -+ /* rtw_write32( padapter, */ -+ /* REG_GPIO_PIN_CTRL, */ -+ /* 0x00010100); */ -+ /* 2010/08/31 MH According to Filen's info, if 8051 reset fail, reset MAC directly. */ -+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, 0x50); /* Reset MAC and Enable 8051 */ -+ rtw_mdelay_os(10); -+ } -+ -+ } -+ } -+ -+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, 0x54); /* Reset MAC and Enable 8051 */ -+ rtw_write8(padapter, REG_MCUFWDL, 0); -+ } -+ } -+ -+ /* if(pDevice->RegUsbSS) */ -+ /* bWithoutHWSM = TRUE; */ /* Sugest by Filen and Issau. */ -+ -+ if (bWithoutHWSM) { -+ /* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); */ -+#if 0 -+ /* **************************** */ -+ /* Without HW auto state machine */ -+ /* g. SYS_CLKR 0x08[15:0] = 0x30A3 disable MAC clock */ -+ /* h. AFE_PLL_CTRL 0x28[7:0] = 0x80 disable AFE PLL */ -+ /* i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F gated AFE DIG_CLOCK */ -+ /* j. SYS_ISO_CTRL 0x00[7:0] = 0xF9 isolated digital to PON */ -+ /* ***************************** */ -+#endif -+ /* rtw_write16(padapter, REG_SYS_CLKR, 0x30A3); */ -+ /* if(!pDevice->RegUsbSS) */ -+ /* 2011/01/26 MH SD4 Scott suggest to fix UNC-B cut bug. */ -+ rtw_write16(padapter, REG_SYS_CLKR, 0x70A3); /* modify to 0x70A3 by Scott. */ -+ rtw_write8(padapter, REG_AFE_PLL_CTRL, 0x80); -+ rtw_write16(padapter, REG_AFE_XTAL_CTRL, 0x880F); -+ /* if(!pDevice->RegUsbSS) */ -+ rtw_write8(padapter, REG_SYS_ISO_CTRL, 0xF9); -+ } else { -+ /* Disable all RF/BB power */ -+ rtw_write8(padapter, REG_RF_CTRL, 0x00); -+ } -+ -+} -+ -+void _ResetDigitalProcedure1(PADAPTER padapter, BOOLEAN bWithoutHWSM) -+{ -+ _ResetDigitalProcedure1_8703B(padapter, bWithoutHWSM); -+} -+ -+void _ResetDigitalProcedure2(PADAPTER padapter) -+{ -+ /* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); */ -+#if 0 -+ /* **************************** -+ * k. SYS_FUNC_EN 0x03[7:0] = 0x44 disable ELDR runction -+ * l. SYS_CLKR 0x08[15:0] = 0x3083 disable ELDR clock -+ * m. SYS_ISO_CTRL 0x01[7:0] = 0x83 isolated ELDR to PON -+ * ***************************** */ -+#endif -+ /* rtw_write8(padapter, REG_SYS_FUNC_EN+1, 0x44); */ /* marked by Scott. */ -+ /* 2011/01/26 MH SD4 Scott suggest to fix UNC-B cut bug. */ -+ rtw_write16(padapter, REG_SYS_CLKR, 0x70a3); /* modify to 0x70a3 by Scott. */ -+ rtw_write8(padapter, REG_SYS_ISO_CTRL + 1, 0x82); /* modify to 0x82 by Scott. */ -+} -+ -+void _DisableAnalog(PADAPTER padapter, BOOLEAN bWithoutHWSM) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u16 value16 = 0; -+ u8 value8 = 0; -+ -+ -+ if (bWithoutHWSM) { -+#if 0 -+ /* **************************** */ -+ /* n. LDOA15_CTRL 0x20[7:0] = 0x04 disable A15 power */ -+ /* o. LDOV12D_CTRL 0x21[7:0] = 0x54 disable digital core power */ -+ /* r. When driver call disable, the ASIC will turn off remaining clock automatically */ -+ /* ***************************** */ -+#endif -+ -+ rtw_write8(padapter, REG_LDOA15_CTRL, 0x04); -+ /* rtw_write8(padapter, REG_LDOV12D_CTRL, 0x54); */ -+ -+ value8 = rtw_read8(padapter, REG_LDOV12D_CTRL); -+ value8 &= (~LDV12_EN); -+ rtw_write8(padapter, REG_LDOV12D_CTRL, value8); -+ } -+ -+#if 0 -+ /* **************************** */ -+ /* h. SPS0_CTRL 0x11[7:0] = 0x23 enter PFM mode */ -+ /* i. APS_FSMCO 0x04[15:0] = 0x4802 set USB suspend */ -+ /* ***************************** */ -+#endif -+ value8 = 0x23; -+ -+ rtw_write8(padapter, REG_SPS0_CTRL, value8); -+ -+ if (bWithoutHWSM) { -+ /* value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN); */ -+ /* 2010/08/31 According to Filen description, we need to use HW to shut down 8051 automatically. */ -+ /* Becasue suspend operatione need the asistance of 8051 to wait for 3ms. */ -+ value16 |= (APDM_HOST | AFSM_HSUS | PFM_ALDN); -+ } else -+ value16 |= (APDM_HOST | AFSM_HSUS | PFM_ALDN); -+ -+ rtw_write16(padapter, REG_APS_FSMCO, value16);/* 0x4802 */ -+ -+ rtw_write8(padapter, REG_RSV_CTRL, 0x0e); -+ -+#if 0 -+ /* tynli_test for suspend mode. */ -+ if (!bWithoutHWSM) -+ rtw_write8(padapter, 0xfe10, 0x19); -+#endif -+ -+} -+ -+/* HW Auto state machine */ -+s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU) -+{ -+ int rtStatus = _SUCCESS; -+ -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ return rtStatus; -+ -+ /* ==== RF Off Sequence ==== */ -+ _DisableRFAFEAndResetBB(padapter); -+ -+ /* ==== Reset digital sequence ====== */ -+ _ResetDigitalProcedure1(padapter, _FALSE); -+ -+ /* ==== Pull GPIO PIN to balance level and LED control ====== */ -+ _DisableGPIO(padapter); -+ -+ /* ==== Disable analog sequence === */ -+ _DisableAnalog(padapter, _FALSE); -+ -+ -+ return rtStatus; -+} -+ -+/* without HW Auto state machine */ -+s32 CardDisableWithoutHWSM(PADAPTER padapter) -+{ -+ s32 rtStatus = _SUCCESS; -+ -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ return rtStatus; -+ -+ -+ /* ==== RF Off Sequence ==== */ -+ _DisableRFAFEAndResetBB(padapter); -+ -+ /* ==== Reset digital sequence ====== */ -+ _ResetDigitalProcedure1(padapter, _TRUE); -+ -+ /* ==== Pull GPIO PIN to balance level and LED control ====== */ -+ _DisableGPIO(padapter); -+ -+ /* ==== Reset digital sequence ====== */ -+ _ResetDigitalProcedure2(padapter); -+ -+ /* ==== Disable analog sequence === */ -+ _DisableAnalog(padapter, _TRUE); -+ -+ return rtStatus; -+} -+#endif /* CONFIG_USB_HCI || CONFIG_SDIO_HCI || CONFIG_GSPI_HCI */ -+ -+void -+Hal_InitPGData( -+ PADAPTER padapter, -+ u8 *PROMContent) -+{ -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u32 i; -+ u16 value16; -+ -+ if (_FALSE == pHalData->bautoload_fail_flag) { -+ /* autoload OK. -+ * if (IS_BOOT_FROM_EEPROM(padapter)) */ -+ if (_TRUE == pHalData->EepromOrEfuse) { -+ /* Read all Content from EEPROM or EFUSE. */ -+ for (i = 0; i < HWSET_MAX_SIZE_8703B; i += 2) { -+ /* value16 = EF2Byte(ReadEEprom(pAdapter, (u16) (i>>1))); -+ * *((u16*)(&PROMContent[i])) = value16; */ -+ } -+ } else { -+ /* Read EFUSE real map to shadow. */ -+ EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); -+ } -+ } else { -+ /* autoload fail */ -+ /* pHalData->AutoloadFailFlag = _TRUE; */ -+ /* update to default value 0xFF */ -+ if (_FALSE == pHalData->EepromOrEfuse) -+ EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); -+ } -+ -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+ if (check_phy_efuse_tx_power_info_valid(padapter) == _FALSE) { -+ if (Hal_readPGDataFromConfigFile(padapter) != _SUCCESS) -+ RTW_ERR("invalid phy efuse and read from file fail, will use driver default!!\n"); -+ } -+#endif -+} -+ -+void -+Hal_EfuseParseIDCode( -+ PADAPTER padapter, -+ u8 *hwinfo -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u16 EEPROMId; -+ -+ -+ /* Checl 0x8129 again for making sure autoload status!! */ -+ EEPROMId = le16_to_cpu(*((u16 *)hwinfo)); -+ if (EEPROMId != RTL_EEPROM_ID) { -+ RTW_INFO("EEPROM ID(%#x) is invalid!!\n", EEPROMId); -+ pHalData->bautoload_fail_flag = _TRUE; -+ } else -+ pHalData->bautoload_fail_flag = _FALSE; -+ -+} -+void -+Hal_EfuseParseTxPowerInfo_8703B( -+ PADAPTER padapter, -+ u8 *PROMContent, -+ BOOLEAN AutoLoadFail -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ pHalData->txpwr_pg_mode = TXPWR_PG_WITH_PWR_IDX; -+ -+ /* 2010/10/19 MH Add Regulator recognize for CU. */ -+ if (!AutoLoadFail) { -+ pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_8703B] & 0x7); /* bit0~2 */ -+ if (PROMContent[EEPROM_RF_BOARD_OPTION_8703B] == 0xFF) -+ pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION & 0x7); /* bit0~2 */ -+ } else -+ pHalData->EEPROMRegulatory = 0; -+} -+ -+void -+Hal_EfuseParseBoardType_8703B( -+ PADAPTER Adapter, -+ u8 *PROMContent, -+ BOOLEAN AutoloadFail -+) -+{ -+ -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ if (!AutoloadFail) { -+ pHalData->InterfaceSel = (PROMContent[EEPROM_RF_BOARD_OPTION_8703B] & 0xE0) >> 5; -+ if (PROMContent[EEPROM_RF_BOARD_OPTION_8703B] == 0xFF) -+ pHalData->InterfaceSel = (EEPROM_DEFAULT_BOARD_OPTION & 0xE0) >> 5; -+ } else -+ pHalData->InterfaceSel = 0; -+ -+} -+ -+void -+Hal_EfuseParseBTCoexistInfo_8703B( -+ PADAPTER padapter, -+ u8 *hwinfo, -+ BOOLEAN AutoLoadFail -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ u8 tempval; -+ u32 tmpu4; -+ -+ if (!AutoLoadFail) { -+ tmpu4 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL); -+ if (tmpu4 & BT_FUNC_EN) -+ pHalData->EEPROMBluetoothCoexist = _TRUE; -+ else -+ pHalData->EEPROMBluetoothCoexist = _FALSE; -+ -+ pHalData->EEPROMBluetoothType = BT_RTL8703B; -+ -+ tempval = hwinfo[EEPROM_RF_BT_SETTING_8703B]; -+ if (tempval != 0xFF) { -+ pHalData->EEPROMBluetoothAntNum = tempval & BIT(0); -+#ifdef CONFIG_USB_HCI -+ /*if(rtw_get_intf_type(padapter) == RTW_USB)*/ -+ pHalData->ant_path = RF_PATH_B; /* s0 */ -+#else /* SDIO or PCIE */ -+ /* EFUSE_0xC3[6] == 0, S1(Main)-RF_PATH_A; */ -+ /* EFUSE_0xC3[6] == 1, S0(Aux)-RF_PATH_B */ -+ pHalData->ant_path = (tempval & BIT(6)) ? RF_PATH_B : RF_PATH_A; -+#endif -+ } else { -+ pHalData->EEPROMBluetoothAntNum = Ant_x1; -+#ifdef CONFIG_USB_HCI -+ pHalData->ant_path = RF_PATH_B;/* s0 */ -+#else -+ pHalData->ant_path = RF_PATH_A; -+#endif -+ } -+ } else { -+ if (padapter->registrypriv.mp_mode == 1) -+ pHalData->EEPROMBluetoothCoexist = _TRUE; -+ else -+ pHalData->EEPROMBluetoothCoexist = _FALSE; -+ pHalData->EEPROMBluetoothType = BT_RTL8703B; -+ pHalData->EEPROMBluetoothAntNum = Ant_x1; -+#ifdef CONFIG_USB_HCI -+ pHalData->ant_path = RF_PATH_B;/* s0 */ -+#else -+ pHalData->ant_path = RF_PATH_A; -+#endif -+ } -+ -+#ifdef CONFIG_BT_COEXIST -+ if (padapter->registrypriv.ant_num > 0) { -+ RTW_INFO("%s: Apply driver defined antenna number(%d) to replace origin(%d)\n", -+ __FUNCTION__, -+ padapter->registrypriv.ant_num, -+ pHalData->EEPROMBluetoothAntNum == Ant_x2 ? 2 : 1); -+ -+ switch (padapter->registrypriv.ant_num) { -+ case 1: -+ pHalData->EEPROMBluetoothAntNum = Ant_x1; -+ break; -+ case 2: -+ pHalData->EEPROMBluetoothAntNum = Ant_x2; -+ break; -+ default: -+ RTW_INFO("%s: Discard invalid driver defined antenna number(%d)!\n", -+ __FUNCTION__, padapter->registrypriv.ant_num); -+ break; -+ } -+ } -+#endif /* CONFIG_BT_COEXIST */ -+ -+ RTW_INFO("%s: %s BT-coex, ant_num=%d\n", -+ __FUNCTION__, -+ pHalData->EEPROMBluetoothCoexist == _TRUE ? "Enable" : "Disable", -+ pHalData->EEPROMBluetoothAntNum == Ant_x2 ? 2 : 1); -+} -+ -+void -+Hal_EfuseParseEEPROMVer_8703B( -+ PADAPTER padapter, -+ u8 *hwinfo, -+ BOOLEAN AutoLoadFail -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (!AutoLoadFail) -+ pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_8703B]; -+ else -+ pHalData->EEPROMVersion = 1; -+} -+ -+void -+Hal_EfuseParseVoltage_8703B( -+ PADAPTER pAdapter, -+ u8 *hwinfo, -+ BOOLEAN AutoLoadFail -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ /* _rtw_memcpy(pHalData->adjuseVoltageVal, &hwinfo[EEPROM_Voltage_ADDR_8703B], 1); */ -+ RTW_INFO("%s hwinfo[EEPROM_Voltage_ADDR_8703B] =%02x\n", __func__, hwinfo[EEPROM_Voltage_ADDR_8703B]); -+ pHalData->adjuseVoltageVal = (hwinfo[EEPROM_Voltage_ADDR_8703B] & 0xf0) >> 4 ; -+ RTW_INFO("%s pHalData->adjuseVoltageVal =%x\n", __func__, pHalData->adjuseVoltageVal); -+} -+ -+void -+Hal_EfuseParseChnlPlan_8703B( -+ PADAPTER padapter, -+ u8 *hwinfo, -+ BOOLEAN AutoLoadFail -+) -+{ -+ hal_com_config_channel_plan( -+ padapter -+ , hwinfo ? &hwinfo[EEPROM_COUNTRY_CODE_8703B] : NULL -+ , hwinfo ? hwinfo[EEPROM_ChannelPlan_8703B] : 0xFF -+ , padapter->registrypriv.alpha2 -+ , padapter->registrypriv.channel_plan -+ , AutoLoadFail -+ ); -+} -+ -+void -+Hal_EfuseParseCustomerID_8703B( -+ PADAPTER padapter, -+ u8 *hwinfo, -+ BOOLEAN AutoLoadFail -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (!AutoLoadFail) -+ pHalData->EEPROMCustomerID = hwinfo[EEPROM_CustomID_8703B]; -+ else -+ pHalData->EEPROMCustomerID = 0; -+} -+ -+void -+Hal_EfuseParseAntennaDiversity_8703B( -+ PADAPTER pAdapter, -+ u8 *hwinfo, -+ BOOLEAN AutoLoadFail -+) -+{ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); -+ struct registry_priv *registry_par = &pAdapter->registrypriv; -+ -+ if (pHalData->EEPROMBluetoothAntNum == Ant_x1) -+ pHalData->AntDivCfg = 0; -+ else { -+ if (registry_par->antdiv_cfg == 2) /* 0:OFF , 1:ON, 2:By EFUSE */ -+ pHalData->AntDivCfg = 1; -+ else -+ pHalData->AntDivCfg = registry_par->antdiv_cfg; -+ } -+ -+ /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */ -+ if (registry_par->antdiv_type == 0) { -+ pHalData->TRxAntDivType = hwinfo[EEPROM_RFE_OPTION_8703B]; -+ if (pHalData->TRxAntDivType == 0xFF) -+ pHalData->TRxAntDivType = S0S1_SW_ANTDIV;/* GetRegAntDivType(pAdapter); */ -+ else if (pHalData->TRxAntDivType == 0x10) -+ pHalData->TRxAntDivType = S0S1_SW_ANTDIV; /* intrnal switch S0S1 */ -+ else if (pHalData->TRxAntDivType == 0x11) -+ pHalData->TRxAntDivType = S0S1_SW_ANTDIV; /* intrnal switch S0S1 */ -+ else -+ RTW_INFO("%s: efuse[0x%x]=0x%02x is unknown type\n", -+ __FUNCTION__, EEPROM_RFE_OPTION_8703B, pHalData->TRxAntDivType); -+ } else { -+ pHalData->TRxAntDivType = registry_par->antdiv_type ;/* GetRegAntDivType(pAdapter); */ -+ } -+ -+ RTW_INFO("%s: AntDivCfg=%d, AntDivType=%d\n", -+ __FUNCTION__, pHalData->AntDivCfg, pHalData->TRxAntDivType); -+#endif -+} -+ -+void -+Hal_EfuseParseXtal_8703B( -+ PADAPTER pAdapter, -+ u8 *hwinfo, -+ BOOLEAN AutoLoadFail -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ -+ if (!AutoLoadFail) { -+ pHalData->crystal_cap = hwinfo[EEPROM_XTAL_8703B]; -+ if (pHalData->crystal_cap == 0xFF) -+ pHalData->crystal_cap = EEPROM_Default_CrystalCap_8703B; /* what value should 8812 set? */ -+ } else -+ pHalData->crystal_cap = EEPROM_Default_CrystalCap_8703B; -+} -+ -+ -+void -+Hal_EfuseParseThermalMeter_8703B( -+ PADAPTER padapter, -+ u8 *PROMContent, -+ u8 AutoLoadFail -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ /* */ -+ /* ThermalMeter from EEPROM */ -+ /* */ -+ if (_FALSE == AutoLoadFail) -+ pHalData->eeprom_thermal_meter = PROMContent[EEPROM_THERMAL_METER_8703B]; -+ else -+ pHalData->eeprom_thermal_meter = EEPROM_Default_ThermalMeter_8703B; -+ -+ if ((pHalData->eeprom_thermal_meter == 0xff) || (_TRUE == AutoLoadFail)) { -+ pHalData->odmpriv.rf_calibrate_info.is_apk_thermal_meter_ignore = _TRUE; -+ pHalData->eeprom_thermal_meter = EEPROM_Default_ThermalMeter_8703B; -+ } -+ -+} -+ -+ -+void Hal_ReadRFGainOffset( -+ PADAPTER Adapter, -+ u8 *PROMContent, -+ BOOLEAN AutoloadFail) -+{ -+#ifdef CONFIG_RF_POWER_TRIM -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct kfree_data_t *kfree_data = &pHalData->kfree_data; -+ u8 pg_pwrtrim = 0xFF, pg_therm = 0xFF; -+ -+ RTW_INFO("%s, Pwr Trim Enable config:%d\n", __func__, Adapter->registrypriv.RegPwrTrimEnable); -+ -+ if ((Adapter->registrypriv.RegPwrTrimEnable == 1) || !AutoloadFail) { -+ efuse_OneByteRead(Adapter, PPG_BB_GAIN_2G_TXA_OFFSET_8703B, &pg_pwrtrim, _FALSE); -+ efuse_OneByteRead(Adapter, PPG_THERMAL_OFFSET_8703B, &pg_therm, _FALSE); -+ -+ kfree_data->bb_gain[BB_GAIN_2G][RF_PATH_A] -+ = KFREE_BB_GAIN_2G_TX_OFFSET(pg_pwrtrim & PPG_BB_GAIN_2G_TX_OFFSET_MASK); -+ kfree_data->thermal -+ = KFREE_THERMAL_OFFSET(pg_therm & PPG_THERMAL_OFFSET_MASK); -+ -+ if (GET_PG_KFREE_ON_8703B(PROMContent) && PROMContent[0xc1] != 0xff) -+ kfree_data->flag |= KFREE_FLAG_ON; -+ if (GET_PG_KFREE_THERMAL_K_ON_8703B(PROMContent) && PROMContent[0xc8] != 0xff) -+ kfree_data->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ if (Adapter->registrypriv.RegPwrTrimEnable == 1) { -+ kfree_data->flag |= KFREE_FLAG_ON; -+ kfree_data->flag |= KFREE_FLAG_THERMAL_K_ON; -+ } -+ -+ if (kfree_data->flag & KFREE_FLAG_THERMAL_K_ON) -+ pHalData->eeprom_thermal_meter += kfree_data->thermal; -+ -+ RTW_INFO("kfree flag:%u\n", kfree_data->flag); -+ if (Adapter->registrypriv.RegPwrTrimEnable == 1 || kfree_data->flag & KFREE_FLAG_ON) -+ RTW_INFO("bb_gain:%d\n", kfree_data->bb_gain[BB_GAIN_2G][RF_PATH_A]); -+ if (Adapter->registrypriv.RegPwrTrimEnable == 1 || kfree_data->flag & KFREE_FLAG_THERMAL_K_ON) -+ RTW_INFO("thermal:%d\n", kfree_data->thermal); -+ -+#endif /*CONFIG_RF_POWER_TRIM */ -+ -+} -+ -+ -+u8 -+BWMapping_8703B( -+ PADAPTER Adapter, -+ struct pkt_attrib *pattrib -+) -+{ -+ u8 BWSettingOfDesc = 0; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ -+ /* RTW_INFO("BWMapping pHalData->current_channel_bw %d, pattrib->bwmode %d\n",pHalData->current_channel_bw,pattrib->bwmode); */ -+ -+ if (pHalData->current_channel_bw == CHANNEL_WIDTH_80) { -+ if (pattrib->bwmode == CHANNEL_WIDTH_80) -+ BWSettingOfDesc = 2; -+ else if (pattrib->bwmode == CHANNEL_WIDTH_40) -+ BWSettingOfDesc = 1; -+ else -+ BWSettingOfDesc = 0; -+ } else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40) { -+ if ((pattrib->bwmode == CHANNEL_WIDTH_40) || (pattrib->bwmode == CHANNEL_WIDTH_80)) -+ BWSettingOfDesc = 1; -+ else -+ BWSettingOfDesc = 0; -+ } else -+ BWSettingOfDesc = 0; -+ -+ /* if(pTcb->bBTTxPacket) */ -+ /* BWSettingOfDesc = 0; */ -+ -+ return BWSettingOfDesc; -+} -+ -+u8 SCMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib) -+{ -+ u8 SCSettingOfDesc = 0; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ -+ /* RTW_INFO("SCMapping: pHalData->current_channel_bw %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d\n",pHalData->current_channel_bw,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC); */ -+ -+ if (pHalData->current_channel_bw == CHANNEL_WIDTH_80) { -+ if (pattrib->bwmode == CHANNEL_WIDTH_80) -+ SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; -+ else if (pattrib->bwmode == CHANNEL_WIDTH_40) { -+ if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) -+ SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ; -+ else if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) -+ SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ; -+ else -+ RTW_INFO("SCMapping: DONOT CARE Mode Setting\n"); -+ } else { -+ if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) -+ SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ; -+ else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) -+ SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ; -+ else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) -+ SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ; -+ else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) -+ SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ; -+ else -+ RTW_INFO("SCMapping: DONOT CARE Mode Setting\n"); -+ } -+ } else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40) { -+ /* RTW_INFO("SCMapping: HT Case: pHalData->current_channel_bw %d, pHalData->nCur40MhzPrimeSC %d\n",pHalData->current_channel_bw,pHalData->nCur40MhzPrimeSC); */ -+ -+ if (pattrib->bwmode == CHANNEL_WIDTH_40) -+ SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; -+ else if (pattrib->bwmode == CHANNEL_WIDTH_20) { -+ if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) -+ SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ; -+ else if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) -+ SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ; -+ else -+ SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; -+ } -+ } else -+ SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; -+ -+ return SCSettingOfDesc; -+} -+ -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc) -+{ -+ if ((pattrib->encrypt > 0) && (!pattrib->bswenc) -+ && (pattrib->bmc_camid != INVALID_SEC_MAC_CAM_ID)) { -+ -+ SET_TX_DESC_EN_DESC_ID_8703B(ptxdesc, 1); -+ SET_TX_DESC_MACID_8703B(ptxdesc, pattrib->bmc_camid); -+ } -+} -+ -+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc) -+{ -+ SET_TX_DESC_USE_RATE_8703B(ptxdesc, 1); -+ SET_TX_DESC_TX_RATE_8703B(ptxdesc, MRateToHwRate(pattrib->rate)); -+ SET_TX_DESC_DISABLE_FB_8703B(ptxdesc, 1); -+} -+ -+static u8 fill_txdesc_sectype(struct pkt_attrib *pattrib) -+{ -+ u8 sectype = 0; -+ if ((pattrib->encrypt > 0) && !pattrib->bswenc) { -+ switch (pattrib->encrypt) { -+ /* SEC_TYPE */ -+ case _WEP40_: -+ case _WEP104_: -+ case _TKIP_: -+ case _TKIP_WTMIC_: -+ sectype = 1; -+ break; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ case _SMS4_: -+ sectype = 2; -+ break; -+#endif -+ case _AES_: -+ sectype = 3; -+ break; -+ -+ case _NO_PRIVACY_: -+ default: -+ break; -+ } -+ } -+ return sectype; -+} -+ -+static void fill_txdesc_vcs_8703b(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc) -+{ -+ /* RTW_INFO("cvs_mode=%d\n", pattrib->vcs_mode); */ -+ -+ if (pattrib->vcs_mode) { -+ switch (pattrib->vcs_mode) { -+ case RTS_CTS: -+ SET_TX_DESC_RTS_ENABLE_8703B(ptxdesc, 1); -+ SET_TX_DESC_HW_RTS_ENABLE_8703B(ptxdesc, 1); -+ break; -+ -+ case CTS_TO_SELF: -+ SET_TX_DESC_CTS2SELF_8703B(ptxdesc, 1); -+ break; -+ -+ case NONE_VCS: -+ default: -+ break; -+ } -+ -+ SET_TX_DESC_RTS_RATE_8703B(ptxdesc, 8); /* RTS Rate=24M */ -+ SET_TX_DESC_RTS_RATE_FB_LIMIT_8703B(ptxdesc, 0xF); -+ -+ if (padapter->mlmeextpriv.mlmext_info.preamble_mode == PREAMBLE_SHORT) -+ SET_TX_DESC_RTS_SHORT_8703B(ptxdesc, 1); -+ -+ /* Set RTS BW */ -+ if (pattrib->ht_en) -+ SET_TX_DESC_RTS_SC_8703B(ptxdesc, SCMapping_8703B(padapter, pattrib)); -+ } -+} -+ -+static void fill_txdesc_phy_8703b(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc) -+{ -+ /* RTW_INFO("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); */ -+ -+ if (pattrib->ht_en) { -+ SET_TX_DESC_DATA_BW_8703B(ptxdesc, BWMapping_8703B(padapter, pattrib)); -+ SET_TX_DESC_DATA_SC_8703B(ptxdesc, SCMapping_8703B(padapter, pattrib)); -+ } -+} -+ -+static void rtl8703b_fill_default_txdesc( -+ struct xmit_frame *pxmitframe, -+ u8 *pbuf) -+{ -+ PADAPTER padapter; -+ HAL_DATA_TYPE *pHalData; -+ struct mlme_ext_priv *pmlmeext; -+ struct mlme_ext_info *pmlmeinfo; -+ struct pkt_attrib *pattrib; -+ s32 bmcst; -+ -+ _rtw_memset(pbuf, 0, TXDESC_SIZE); -+ -+ padapter = pxmitframe->padapter; -+ pHalData = GET_HAL_DATA(padapter); -+ pmlmeext = &padapter->mlmeextpriv; -+ pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ pattrib = &pxmitframe->attrib; -+ bmcst = IS_MCAST(pattrib->ra); -+ -+ if (pxmitframe->frame_tag == DATA_FRAMETAG) { -+ u8 drv_userate = 0; -+ -+ SET_TX_DESC_MACID_8703B(pbuf, pattrib->mac_id); -+ SET_TX_DESC_RATE_ID_8703B(pbuf, pattrib->raid); -+ SET_TX_DESC_QUEUE_SEL_8703B(pbuf, pattrib->qsel); -+ SET_TX_DESC_SEQ_8703B(pbuf, pattrib->seqnum); -+ -+ SET_TX_DESC_SEC_TYPE_8703B(pbuf, fill_txdesc_sectype(pattrib)); -+ -+ if (bmcst) -+ fill_txdesc_force_bmc_camid(pattrib, pbuf); -+ -+ fill_txdesc_vcs_8703b(padapter, pattrib, pbuf); -+ -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) { -+ if (pattrib->icmp_pkt == 1 && padapter->registrypriv.wifi_spec == 1) -+ drv_userate = 1; -+ } -+#endif -+ -+ if ((pattrib->ether_type != 0x888e) && -+ (pattrib->ether_type != 0x0806) && -+ (pattrib->ether_type != 0x88B4) && -+ (pattrib->dhcp_pkt != 1) && -+ (drv_userate != 1) -+#ifdef CONFIG_AUTO_AP_MODE -+ && (pattrib->pctrl != _TRUE) -+#endif -+ ) { -+ /* Non EAP & ARP & DHCP type data packet */ -+ -+ if (pattrib->ampdu_en == _TRUE) { -+ SET_TX_DESC_AGG_ENABLE_8703B(pbuf, 1); -+ SET_TX_DESC_MAX_AGG_NUM_8703B(pbuf, 0x1F); -+ SET_TX_DESC_AMPDU_DENSITY_8703B(pbuf, pattrib->ampdu_spacing); -+ } else -+ SET_TX_DESC_AGG_BREAK_8703B(pbuf, 1); -+ -+ fill_txdesc_phy_8703b(padapter, pattrib, pbuf); -+ -+ SET_TX_DESC_DATA_RATE_FB_LIMIT_8703B(pbuf, 0x1F); -+ -+ if (pHalData->fw_ractrl == _FALSE) { -+ SET_TX_DESC_USE_RATE_8703B(pbuf, 1); -+ -+ if (pHalData->INIDATA_RATE[pattrib->mac_id] & BIT(7)) -+ SET_TX_DESC_DATA_SHORT_8703B(pbuf, 1); -+ -+ SET_TX_DESC_TX_RATE_8703B(pbuf, pHalData->INIDATA_RATE[pattrib->mac_id] & 0x7F); -+ } -+ -+ if (bmcst) -+ fill_txdesc_bmc_tx_rate(pattrib, pbuf); -+ -+ /* modify data rate by iwpriv */ -+ if (padapter->fix_rate != 0xFF) { -+ SET_TX_DESC_USE_RATE_8703B(pbuf, 1); -+ if (padapter->fix_rate & BIT(7)) -+ SET_TX_DESC_DATA_SHORT_8703B(pbuf, 1); -+ SET_TX_DESC_TX_RATE_8703B(pbuf, padapter->fix_rate & 0x7F); -+ if (!padapter->data_fb) -+ SET_TX_DESC_DISABLE_FB_8703B(pbuf, 1); -+ } -+ -+ if (pattrib->ldpc) -+ SET_TX_DESC_DATA_LDPC_8703B(pbuf, 1); -+ -+ if (pattrib->stbc) -+ SET_TX_DESC_DATA_STBC_8703B(pbuf, 1); -+ -+#ifdef CONFIG_CMCC_TEST -+ SET_TX_DESC_DATA_SHORT_8703B(pbuf, 1); /* use cck short premble */ -+#endif -+ } else { -+ /* EAP data packet and ARP packet. */ -+ /* Use the 1M data rate to send the EAP/ARP packet. */ -+ /* This will maybe make the handshake smooth. */ -+ -+ SET_TX_DESC_AGG_BREAK_8703B(pbuf, 1); -+ SET_TX_DESC_USE_RATE_8703B(pbuf, 1); -+ if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) -+ SET_TX_DESC_DATA_SHORT_8703B(pbuf, 1); -+#ifdef CONFIG_IP_R_MONITOR -+ if((pattrib->ether_type == ETH_P_ARP) && -+ (IsSupportedTxOFDM(padapter->registrypriv.wireless_mode))) -+ SET_TX_DESC_TX_RATE_8703B(pbuf, MRateToHwRate(IEEE80211_OFDM_RATE_6MB)); -+ else -+#endif/*CONFIG_IP_R_MONITOR*/ -+ SET_TX_DESC_TX_RATE_8703B(pbuf, MRateToHwRate(pmlmeext->tx_rate)); -+ -+ RTW_INFO(FUNC_ADPT_FMT ": SP Packet(0x%04X) rate=0x%x SeqNum = %d\n", -+ FUNC_ADPT_ARG(padapter), pattrib->ether_type, MRateToHwRate(pmlmeext->tx_rate), pattrib->seqnum); -+ } -+ -+#if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ SET_TX_DESC_USB_TXAGG_NUM_8703B(pbuf, pxmitframe->agg_num); -+#endif -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_XMIT_ACK -+ /* CCX-TXRPT ack for xmit mgmt frames. */ -+ if (pxmitframe->ack_report) { -+#ifdef DBG_CCX -+ RTW_INFO("%s set spe_rpt\n", __func__); -+#endif -+ SET_TX_DESC_SPE_RPT_8703B(pbuf, 1); -+ SET_TX_DESC_SW_DEFINE_8703B(pbuf, (u8)(GET_PRIMARY_ADAPTER(padapter)->xmitpriv.seq_no)); -+ } -+#endif /* CONFIG_XMIT_ACK */ -+#endif -+ } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) { -+ -+ SET_TX_DESC_MACID_8703B(pbuf, pattrib->mac_id); -+ SET_TX_DESC_QUEUE_SEL_8703B(pbuf, pattrib->qsel); -+ SET_TX_DESC_RATE_ID_8703B(pbuf, pattrib->raid); -+ SET_TX_DESC_SEQ_8703B(pbuf, pattrib->seqnum); -+ SET_TX_DESC_USE_RATE_8703B(pbuf, 1); -+ -+ SET_TX_DESC_MBSSID_8703B(pbuf, pattrib->mbssid & 0xF); -+ -+ SET_TX_DESC_RETRY_LIMIT_ENABLE_8703B(pbuf, 1); -+ if (pattrib->retry_ctrl == _TRUE) -+ SET_TX_DESC_DATA_RETRY_LIMIT_8703B(pbuf, 6); -+ else -+ SET_TX_DESC_DATA_RETRY_LIMIT_8703B(pbuf, 12); -+ -+ SET_TX_DESC_TX_RATE_8703B(pbuf, MRateToHwRate(pattrib->rate)); -+ -+#ifdef CONFIG_XMIT_ACK -+ /* CCX-TXRPT ack for xmit mgmt frames. */ -+ if (pxmitframe->ack_report) { -+#ifdef DBG_CCX -+ RTW_INFO("%s set spe_rpt\n", __FUNCTION__); -+#endif -+ SET_TX_DESC_SPE_RPT_8703B(pbuf, 1); -+ SET_TX_DESC_SW_DEFINE_8703B(pbuf, (u8)(GET_PRIMARY_ADAPTER(padapter)->xmitpriv.seq_no)); -+ } -+#endif /* CONFIG_XMIT_ACK */ -+ } else if (pxmitframe->frame_tag == TXAGG_FRAMETAG) { -+ } -+#ifdef CONFIG_MP_INCLUDED -+ else if (pxmitframe->frame_tag == MP_FRAMETAG) { -+ fill_txdesc_for_mp(padapter, pbuf); -+ } -+#endif -+ else { -+ -+ SET_TX_DESC_MACID_8703B(pbuf, pattrib->mac_id); -+ SET_TX_DESC_RATE_ID_8703B(pbuf, pattrib->raid); -+ SET_TX_DESC_QUEUE_SEL_8703B(pbuf, pattrib->qsel); -+ SET_TX_DESC_SEQ_8703B(pbuf, pattrib->seqnum); -+ SET_TX_DESC_USE_RATE_8703B(pbuf, 1); -+ SET_TX_DESC_TX_RATE_8703B(pbuf, MRateToHwRate(pmlmeext->tx_rate)); -+ } -+ -+ SET_TX_DESC_PKT_SIZE_8703B(pbuf, pattrib->last_txcmdsz); -+ -+ { -+ u8 pkt_offset, offset; -+ -+ pkt_offset = 0; -+ offset = TXDESC_SIZE; -+#ifdef CONFIG_USB_HCI -+ pkt_offset = pxmitframe->pkt_offset; -+ offset += (pxmitframe->pkt_offset >> 3); -+#endif /* CONFIG_USB_HCI */ -+ -+#ifdef CONFIG_TX_EARLY_MODE -+ if (pxmitframe->frame_tag == DATA_FRAMETAG) { -+ pkt_offset = 1; -+ offset += EARLY_MODE_INFO_SIZE; -+ } -+#endif /* CONFIG_TX_EARLY_MODE */ -+ -+ SET_TX_DESC_PKT_OFFSET_8703B(pbuf, pkt_offset); -+ SET_TX_DESC_OFFSET_8703B(pbuf, offset); -+ } -+ -+ if (bmcst) -+ SET_TX_DESC_BMC_8703B(pbuf, 1); -+ -+ /* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. */ -+ /* (1) The sequence number of each non-Qos frame / broadcast / multicast / */ -+ /* mgnt frame should be controled by Hw because Fw will also send null data */ -+ /* which we cannot control when Fw LPS enable. */ -+ /* --> default enable non-Qos data sequense number. 2010.06.23. by tynli. */ -+ /* (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. */ -+ /* (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. */ -+ /* 2010.06.23. Added by tynli. */ -+ if (!pattrib->qos_en) -+ SET_TX_DESC_HWSEQ_EN_8703B(pbuf, 1); -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ if (!bmcst && pattrib->psta) -+ odm_set_tx_ant_by_tx_info(adapter_to_phydm(padapter), pbuf, pattrib->psta->cmn.mac_id); -+#endif -+} -+ -+/* -+ * Description: -+ * -+ * Parameters: -+ * pxmitframe xmitframe -+ * pbuf where to fill tx desc -+ */ -+void rtl8703b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf) -+{ -+ rtl8703b_fill_default_txdesc(pxmitframe, pbuf); -+ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ rtl8703b_cal_txdesc_chksum((struct tx_desc *)pbuf); -+#endif -+} -+ -+static void hw_var_set_monitor(PADAPTER adapter, u8 variable, u8 *val) -+{ -+#ifdef CONFIG_WIFI_MONITOR -+ u32 tmp_32bit; -+ struct net_device *ndev = adapter->pnetdev; -+ struct mon_reg_backup *mon = &GET_HAL_DATA(adapter)->mon_backup; -+ -+ mon->known_rcr = 1; -+ rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)& mon->rcr); -+ -+ /* Receive all type */ -+ tmp_32bit = RCR_AAP | RCR_APP_PHYST_RXFF; -+ -+ if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) { -+ /* Append FCS */ -+ tmp_32bit |= RCR_APPFCS; -+ } -+ -+ rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)& tmp_32bit); -+ -+ /* Receive all data frames */ -+ mon->known_rxfilter = 1; -+ mon->rxfilter0 = rtw_read16(adapter, REG_RXFLTMAP0_8703B); -+ mon->rxfilter1 = rtw_read16(adapter, REG_RXFLTMAP1_8703B); -+ mon->rxfilter2 = rtw_read16(adapter, REG_RXFLTMAP2_8703B); -+ rtw_write16(adapter, REG_RXFLTMAP0_8703B, 0xFFFF); -+ rtw_write16(adapter, REG_RXFLTMAP1_8703B, 0xFFFF); -+ rtw_write16(adapter, REG_RXFLTMAP2_8703B, 0xFFFF); -+#endif /* CONFIG_WIFI_MONITOR */ -+} -+ -+static void hw_var_set_opmode(PADAPTER padapter, u8 variable, u8 *val) -+{ -+ u8 val8; -+ u8 mode = *((u8 *)val); -+ static u8 isMonitor = _FALSE; -+ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (isMonitor == _TRUE) { -+#ifdef CONFIG_WIFI_MONITOR -+ struct mon_reg_backup *backup = &GET_HAL_DATA(padapter)->mon_backup; -+ -+ if (backup->known_rcr) { -+ backup->known_rcr = 0; -+ rtw_hal_set_hwreg(padapter, HW_VAR_RCR, (u8 *)&backup->rcr); -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_ACTION_NONE); -+ } -+ if (backup->known_rxfilter) { -+ backup->known_rxfilter = 0; -+ rtw_write16(padapter, REG_RXFLTMAP0_8703B, backup->rxfilter0); -+ rtw_write16(padapter, REG_RXFLTMAP1_8703B, backup->rxfilter1); -+ rtw_write16(padapter, REG_RXFLTMAP2_8703B, backup->rxfilter2); -+ } -+#endif /* CONFIG_WIFI_MONITOR */ -+ isMonitor = _FALSE; -+ } -+ -+ if (mode == _HW_STATE_MONITOR_) { -+ isMonitor = _TRUE; -+ /* set net_type */ -+ Set_MSR(padapter, _HW_STATE_NOLINK_); -+ -+ hw_var_set_monitor(padapter, variable, val); -+ return; -+ } -+ rtw_hal_set_hwreg(padapter, HW_VAR_MAC_ADDR, adapter_mac_addr(padapter)); /* set mac addr to mac register */ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (padapter->hw_port == HW_PORT1) { -+ /* disable Port1 TSF update */ -+ rtw_iface_disable_tsf_update(padapter); -+ -+ Set_MSR(padapter, mode); -+ -+ RTW_INFO("#### %s()-%d hw_port(%d) mode=%d ####\n", -+ __func__, __LINE__, padapter->hw_port, mode); -+ -+ if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) { -+ if (!rtw_mi_get_ap_num(padapter) && !rtw_mi_get_mesh_num(padapter)) { -+ StopTxBeacon(padapter); -+#ifdef CONFIG_PCI_HCI -+ UpdateInterruptMask8703BE(padapter, 0, 0, RT_BCN_INT_MASKS, 0); -+#else /* !CONFIG_PCI_HCI */ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN -+ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT -+ rtw_write8(padapter, REG_DRVERLYINT, 0x05);/* restore early int time to 5ms */ -+ UpdateInterruptMask8703BU(padapter, _TRUE, 0, IMR_BCNDMAINT0_8703B); -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */ -+ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR -+ UpdateInterruptMask8703BU(padapter, _TRUE , 0, (IMR_TXBCN0ERR_8703B | IMR_TXBCN0OK_8703B)); -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */ -+ -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN */ -+#endif /* !CONFIG_PCI_HCI */ -+ } -+ -+ /* disable atim wnd and disable beacon function */ -+ rtw_write8(padapter, REG_BCN_CTRL_1, DIS_TSF_UDT | DIS_ATIM); -+ } else if (mode == _HW_STATE_ADHOC_) { -+ ResumeTxBeacon(padapter); -+ rtw_write8(padapter, REG_BCN_CTRL_1, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB); -+ } else if (mode == _HW_STATE_AP_) { -+#ifdef CONFIG_PCI_HCI -+ UpdateInterruptMask8703BE(padapter, RT_BCN_INT_MASKS, 0, 0, 0); -+#else /* !CONFIG_PCI_HCI */ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN -+ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT -+ UpdateInterruptMask8703BU(padapter, _TRUE, IMR_BCNDMAINT0_8703B, 0); -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */ -+ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR -+ UpdateInterruptMask8703BU(padapter, _TRUE, (IMR_TXBCN0ERR_8703B | IMR_TXBCN0OK_8703B), 0); -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */ -+ -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN */ -+#endif /* !CONFIG_PCI_HCI */ -+ -+ rtw_write8(padapter, REG_BCN_CTRL_1, DIS_TSF_UDT | DIS_BCNQ_SUB); -+ -+ /* enable to rx data frame */ -+ rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF); -+ /* enable to rx ps-poll */ -+ rtw_write16(padapter, REG_RXFLTMAP1, 0x0400); -+ -+ /* Beacon Control related register for first time */ -+ rtw_write8(padapter, REG_BCNDMATIM, 0x02); /* 2ms */ -+ -+ /* rtw_write8(padapter, REG_BCN_MAX_ERR, 0xFF); */ -+ rtw_write8(padapter, REG_ATIMWND_1, 0x0a); /* 10ms for port1 */ -+ -+ rtw_write16(padapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ -+ -+ /* reset TSF2 */ -+ rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(1)); -+ -+ /* enable BCN1 Function for if2 */ -+ /* don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received) */ -+ rtw_write8(padapter, REG_BCN_CTRL_1, (DIS_TSF_UDT | EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB)); -+ -+ /* SW_BCN_SEL - Port1 */ -+ /* rtw_write8(Adapter, REG_DWBCN1_CTRL_8192E+2, rtw_read8(Adapter, REG_DWBCN1_CTRL_8192E+2)|BIT4); */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL); -+ -+ /* select BCN on port 1 */ -+ rtw_write8(padapter, REG_CCK_CHECK_8703B, -+ (rtw_read8(padapter, REG_CCK_CHECK_8703B) | BIT_BCN_PORT_SEL)); -+ -+ if (!rtw_mi_buddy_check_mlmeinfo_state(padapter, WIFI_FW_ASSOC_SUCCESS)) { -+ val8 = rtw_read8(padapter, REG_BCN_CTRL); -+ val8 &= ~EN_BCN_FUNCTION; -+ rtw_write8(padapter, REG_BCN_CTRL, val8); -+ } -+ -+ /* BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked */ -+ /* rtw_write8(padapter, REG_BCN_CTRL_1, rtw_read8(padapter, REG_BCN_CTRL_1)|BIT(5)); */ -+ /* rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(3)); */ -+ -+ /* dis BCN0 ATIM WND if if1 is station */ -+ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | DIS_ATIM); -+ -+#ifdef CONFIG_TSF_RESET_OFFLOAD -+ /* Reset TSF for STA+AP concurrent mode */ -+ if (DEV_STA_LD_NUM(adapter_to_dvobj(padapter))) { -+ if (rtw_hal_reset_tsf(padapter, HW_PORT1) == _FAIL) -+ RTW_INFO("ERROR! %s()-%d: Reset port1 TSF fail\n", -+ __FUNCTION__, __LINE__); -+ } -+#endif /* CONFIG_TSF_RESET_OFFLOAD */ -+ } -+ } else /* else for port0 */ -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+#ifdef CONFIG_MI_WITH_MBSSID_CAM /*For Port0 - MBSS CAM*/ -+ hw_var_set_opmode_mbid(padapter, mode); -+#else -+ /* disable Port0 TSF update */ -+ rtw_iface_disable_tsf_update(padapter); -+ -+ /* set net_type */ -+ Set_MSR(padapter, mode); -+ RTW_INFO("#### %s() -%d hw_port(0) mode = %d ####\n", __func__, __LINE__, mode); -+ -+ if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) { -+#ifdef CONFIG_CONCURRENT_MODE -+ if (!rtw_mi_get_ap_num(padapter) && !rtw_mi_get_mesh_num(padapter)) -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ StopTxBeacon(padapter); -+#ifdef CONFIG_PCI_HCI -+ UpdateInterruptMask8703BE(padapter, 0, 0, RT_BCN_INT_MASKS, 0); -+#else /* !CONFIG_PCI_HCI */ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT -+ rtw_write8(padapter, REG_DRVERLYINT, 0x05); /* restore early int time to 5ms */ -+ UpdateInterruptMask8812AU(padapter, _TRUE, 0, IMR_BCNDMAINT0_8703B); -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */ -+ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR -+ UpdateInterruptMask8812AU(padapter, _TRUE , 0, (IMR_TXBCN0ERR_8703B | IMR_TXBCN0OK_8703B)); -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */ -+ -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN */ -+#endif /* !CONFIG_PCI_HCI */ -+ } -+ -+ /* disable atim wnd */ -+ rtw_write8(padapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_ATIM); -+ /* rtw_write8(padapter,REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION); */ -+ } else if (mode == _HW_STATE_ADHOC_) { -+ ResumeTxBeacon(padapter); -+ rtw_write8(padapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB); -+ } else if (mode == _HW_STATE_AP_) { -+#ifdef CONFIG_PCI_HCI -+ UpdateInterruptMask8703BE(padapter, RT_BCN_INT_MASKS, 0, 0, 0); -+#else /* !CONFIG_PCI_HCI */ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT -+ UpdateInterruptMask8703BU(padapter, _TRUE , IMR_BCNDMAINT0_8703B, 0); -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */ -+ -+#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR -+ UpdateInterruptMask8703BU(padapter, _TRUE , (IMR_TXBCN0ERR_8703B | IMR_TXBCN0OK_8703B), 0); -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */ -+ -+#endif /* CONFIG_INTERRUPT_BASED_TXBCN */ -+#endif -+ -+ rtw_write8(padapter, REG_BCN_CTRL, DIS_TSF_UDT | DIS_BCNQ_SUB); -+ -+ /* enable to rx data frame */ -+ rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF); -+ /* enable to rx ps-poll */ -+ rtw_write16(padapter, REG_RXFLTMAP1, 0x0400); -+ -+ /* Beacon Control related register for first time */ -+ rtw_write8(padapter, REG_BCNDMATIM, 0x02); /* 2ms */ -+ -+ /* rtw_write8(padapter, REG_BCN_MAX_ERR, 0xFF); */ -+ rtw_write8(padapter, REG_ATIMWND, 0x0a); /* 10ms */ -+ -+ rtw_write16(padapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ -+ -+ /* reset TSF */ -+ rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(0)); -+ -+ /* enable BCN0 Function for if1 */ -+ /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */ -+ rtw_write8(padapter, REG_BCN_CTRL, (DIS_TSF_UDT | EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB)); -+ -+ /* SW_BCN_SEL - Port0 */ -+ /* rtw_write8(Adapter, REG_DWBCN1_CTRL_8192E+2, rtw_read8(Adapter, REG_DWBCN1_CTRL_8192E+2) & ~BIT4); */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL); -+ -+ /* select BCN on port 0 */ -+ rtw_write8(padapter, REG_CCK_CHECK_8703B, -+ (rtw_read8(padapter, REG_CCK_CHECK_8703B) & ~BIT_BCN_PORT_SEL)); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (!rtw_mi_buddy_check_mlmeinfo_state(padapter, WIFI_FW_ASSOC_SUCCESS)) { -+ val8 = rtw_read8(padapter, REG_BCN_CTRL_1); -+ val8 &= ~EN_BCN_FUNCTION; -+ rtw_write8(padapter, REG_BCN_CTRL_1, val8); -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ /* dis BCN1 ATIM WND if if2 is station */ -+ val8 = rtw_read8(padapter, REG_BCN_CTRL_1); -+ val8 |= DIS_ATIM; -+ rtw_write8(padapter, REG_BCN_CTRL_1, val8); -+#ifdef CONFIG_TSF_RESET_OFFLOAD -+ /* Reset TSF for STA+AP concurrent mode */ -+ if (DEV_STA_LD_NUM(adapter_to_dvobj(padapter))) { -+ if (rtw_hal_reset_tsf(padapter, HW_PORT0) == _FAIL) -+ RTW_INFO("ERROR! %s()-%d: Reset port0 TSF fail\n", -+ __FUNCTION__, __LINE__); -+ } -+#endif /* CONFIG_TSF_RESET_OFFLOAD */ -+ } -+#endif -+ } -+} -+ -+void CCX_FwC2HTxRpt_8703b(PADAPTER padapter, u8 *pdata, u8 len) -+{ -+ u8 seq_no; -+ -+#define GET_8703B_C2H_TX_RPT_LIFE_TIME_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 6, 1) -+#define GET_8703B_C2H_TX_RPT_RETRY_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 7, 1) -+ -+ /* RTW_INFO("%s, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", __func__, */ -+ /* *pdata, *(pdata+1), *(pdata+2), *(pdata+3), *(pdata+4), *(pdata+5), *(pdata+6), *(pdata+7)); */ -+ -+ seq_no = *(pdata + 6); -+ -+#ifdef CONFIG_XMIT_ACK -+ if (GET_8703B_C2H_TX_RPT_RETRY_OVER(pdata) | GET_8703B_C2H_TX_RPT_LIFE_TIME_OVER(pdata)) -+ rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL); -+ /* -+ else if(seq_no != padapter->xmitpriv.seq_no) { -+ RTW_INFO("tx_seq_no=%d, rpt_seq_no=%d\n", padapter->xmitpriv.seq_no, seq_no); -+ rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL); -+ } -+ */ -+ else -+ rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_SUCCESS); -+#endif -+} -+ -+static s32 c2h_handler_8703b(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) -+{ -+ s32 ret = _SUCCESS; -+ -+ switch (id) { -+ case C2H_CCX_TX_RPT: -+ CCX_FwC2HTxRpt_8703b(adapter, payload, plen); -+ break; -+ default: -+ ret = _FAIL; -+ break; -+ } -+ -+ return ret; -+} -+ -+u8 SetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ u8 ret = _SUCCESS; -+ u8 val8; -+ u16 val16; -+ u32 val32; -+ -+ -+ switch (variable) { -+ case HW_VAR_SET_OPMODE: -+ hw_var_set_opmode(padapter, variable, val); -+ break; -+ -+ case HW_VAR_BASIC_RATE: -+ rtw_var_set_basic_rate(padapter, val); -+ break; -+ -+ case HW_VAR_TXPAUSE: -+ rtw_write8(padapter, REG_TXPAUSE, *val); -+ break; -+ -+ case HW_VAR_SLOT_TIME: -+ rtw_write8(padapter, REG_SLOT, *val); -+ break; -+ -+ case HW_VAR_RESP_SIFS: -+#if 0 -+ /* SIFS for OFDM Data ACK */ -+ rtw_write8(padapter, REG_SIFS_CTX + 1, val[0]); -+ /* SIFS for OFDM consecutive tx like CTS data! */ -+ rtw_write8(padapter, REG_SIFS_TRX + 1, val[1]); -+ -+ rtw_write8(padapter, REG_SPEC_SIFS + 1, val[0]); -+ rtw_write8(padapter, REG_MAC_SPEC_SIFS + 1, val[0]); -+ -+ /* 20100719 Joseph: Revise SIFS setting due to Hardware register definition change. */ -+ rtw_write8(padapter, REG_R2T_SIFS + 1, val[0]); -+ rtw_write8(padapter, REG_T2T_SIFS + 1, val[0]); -+ -+#else -+ /* SIFS_Timer = 0x0a0a0808; */ -+ /* RESP_SIFS for CCK */ -+ rtw_write8(padapter, REG_RESP_SIFS_CCK, val[0]); /* SIFS_T2T_CCK (0x08) */ -+ rtw_write8(padapter, REG_RESP_SIFS_CCK + 1, val[1]); /* SIFS_R2T_CCK(0x08) */ -+ /* RESP_SIFS for OFDM */ -+ rtw_write8(padapter, REG_RESP_SIFS_OFDM, val[2]); /* SIFS_T2T_OFDM (0x0a) */ -+ rtw_write8(padapter, REG_RESP_SIFS_OFDM + 1, val[3]); /* SIFS_R2T_OFDM(0x0a) */ -+#endif -+ break; -+ -+ case HW_VAR_ACK_PREAMBLE: { -+ u8 regTmp; -+ u8 bShortPreamble = *val; -+ -+ /* Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */ -+ /* regTmp = (pHalData->nCur40MhzPrimeSC)<<5; */ -+ regTmp = 0; -+ if (bShortPreamble) -+ regTmp |= 0x80; -+ rtw_write8(padapter, REG_RRSR + 2, regTmp); -+ } -+ break; -+ -+ case HW_VAR_CAM_INVALID_ALL: -+ rtw_write32(padapter, REG_CAMCMD, BIT(31) | BIT(30)); -+ break; -+ -+ case HW_VAR_AC_PARAM_VO: -+ rtw_write32(padapter, REG_EDCA_VO_PARAM, *((u32 *)val)); -+ break; -+ -+ case HW_VAR_AC_PARAM_VI: -+ rtw_write32(padapter, REG_EDCA_VI_PARAM, *((u32 *)val)); -+ break; -+ -+ case HW_VAR_AC_PARAM_BE: -+ pHalData->ac_param_be = ((u32 *)(val))[0]; -+ rtw_write32(padapter, REG_EDCA_BE_PARAM, *((u32 *)val)); -+ break; -+ -+ case HW_VAR_AC_PARAM_BK: -+ rtw_write32(padapter, REG_EDCA_BK_PARAM, *((u32 *)val)); -+ break; -+ -+ case HW_VAR_ACM_CTRL: { -+ u8 ctrl = *((u8 *)val); -+ u8 hwctrl = 0; -+ -+ if (ctrl != 0) { -+ hwctrl |= AcmHw_HwEn; -+ -+ if (ctrl & BIT(3)) /* BE */ -+ hwctrl |= AcmHw_BeqEn; -+ -+ if (ctrl & BIT(2)) /* VI */ -+ hwctrl |= AcmHw_ViqEn; -+ -+ if (ctrl & BIT(1)) /* VO */ -+ hwctrl |= AcmHw_VoqEn; -+ } -+ -+ RTW_INFO("[HW_VAR_ACM_CTRL] Write 0x%02X\n", hwctrl); -+ rtw_write8(padapter, REG_ACMHWCTRL, hwctrl); -+ } -+ break; -+#ifdef CONFIG_80211N_HT -+ case HW_VAR_AMPDU_FACTOR: { -+ u32 AMPDULen = (*((u8 *)val)); -+ -+ if (AMPDULen < HT_AGG_SIZE_32K) -+ AMPDULen = (0x2000 << (*((u8 *)val))) - 1; -+ else -+ AMPDULen = 0x7fff; -+ -+ rtw_write32(padapter, REG_AMPDU_MAX_LENGTH_8703B, AMPDULen); -+ } -+ break; -+#endif /* CONFIG_80211N_HT */ -+ case HW_VAR_H2C_FW_PWRMODE: { -+ u8 psmode = *val; -+ -+ /* if (psmode != PS_MODE_ACTIVE) { */ -+ /* rtl8703b_set_lowpwr_lps_cmd(padapter, _TRUE); */ -+ /* } else { */ -+ /* rtl8703b_set_lowpwr_lps_cmd(padapter, _FALSE); */ -+ /* } */ -+ rtl8703b_set_FwPwrMode_cmd(padapter, psmode); -+ } -+ break; -+ case HW_VAR_H2C_PS_TUNE_PARAM: -+ rtl8703b_set_FwPsTuneParam_cmd(padapter); -+ break; -+ -+ case HW_VAR_H2C_FW_JOINBSSRPT: -+ rtl8703b_set_FwJoinBssRpt_cmd(padapter, *val); -+ break; -+ case HW_VAR_DL_RSVD_PAGE: -+#ifdef CONFIG_BT_COEXIST -+ if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) -+ rtl8703b_download_BTCoex_AP_mode_rsvd_page(padapter); -+ else -+#endif /* CONFIG_BT_COEXIST */ -+ { -+ rtl8703b_download_rsvd_page(padapter, RT_MEDIA_CONNECT); -+ } -+ break; -+ -+#ifdef CONFIG_P2P -+ case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: -+ rtl8703b_set_p2p_ps_offload_cmd(padapter, *val); -+ break; -+#endif /* CONFIG_P2P */ -+ -+ case HW_VAR_EFUSE_USAGE: -+ pHalData->EfuseUsedPercentage = *val; -+ break; -+ -+ case HW_VAR_EFUSE_BYTES: -+ pHalData->EfuseUsedBytes = *((u16 *)val); -+ break; -+ -+ case HW_VAR_EFUSE_BT_USAGE: -+#ifdef HAL_EFUSE_MEMORY -+ pHalData->EfuseHal.BTEfuseUsedPercentage = *val; -+#endif -+ break; -+ -+ case HW_VAR_EFUSE_BT_BYTES: -+#ifdef HAL_EFUSE_MEMORY -+ pHalData->EfuseHal.BTEfuseUsedBytes = *((u16 *)val); -+#else -+ BTEfuseUsedBytes = *((u16 *)val); -+#endif -+ break; -+ -+ case HW_VAR_FIFO_CLEARN_UP: { -+#define RW_RELEASE_EN BIT(18) -+#define RXDMA_IDLE BIT(17) -+ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ u8 trycnt = 100; -+ -+ /* pause tx */ -+ rtw_write8(padapter, REG_TXPAUSE, 0xff); -+ -+ /* keep sn */ -+ padapter->xmitpriv.nqos_ssn = rtw_read16(padapter, REG_NQOS_SEQ); -+ -+ if (pwrpriv->bkeepfwalive != _TRUE) { -+ /* RX DMA stop */ -+ val32 = rtw_read32(padapter, REG_RXPKT_NUM); -+ val32 |= RW_RELEASE_EN; -+ rtw_write32(padapter, REG_RXPKT_NUM, val32); -+ do { -+ val32 = rtw_read32(padapter, REG_RXPKT_NUM); -+ val32 &= RXDMA_IDLE; -+ if (val32) -+ break; -+ -+ RTW_INFO("%s: [HW_VAR_FIFO_CLEARN_UP] val=%x times:%d\n", __FUNCTION__, val32, trycnt); -+ } while (--trycnt); -+ if (trycnt == 0) -+ RTW_INFO("[HW_VAR_FIFO_CLEARN_UP] Stop RX DMA failed......\n"); -+ -+ /* RQPN Load 0 */ -+ rtw_write16(padapter, REG_RQPN_NPQ, 0); -+ rtw_write32(padapter, REG_RQPN, 0x80000000); -+ rtw_mdelay_os(2); -+ } -+ } -+ break; -+ -+ case HW_VAR_RESTORE_HW_SEQ: -+ /* restore Sequence No. */ -+ rtw_write8(padapter, 0x4dc, padapter->xmitpriv.nqos_ssn); -+ break; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ case HW_VAR_CHECK_TXBUF: { -+ u32 i; -+ u8 RetryLimit = 0x01; -+ u32 reg_200, reg_204; -+ -+ val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit); -+ rtw_write16(padapter, REG_RETRY_LIMIT, val16); -+ -+ for (i = 0; i < 200; i++) { /* polling 200x10=2000 msec */ -+ reg_200 = rtw_read32(padapter, 0x200); -+ reg_204 = rtw_read32(padapter, 0x204); -+ if (reg_200 != reg_204) { -+ /* RTW_INFO("packet in tx packet buffer - 0x204=%x, 0x200=%x (%d)\n", rtw_read32(padapter, 0x204), rtw_read32(padapter, 0x200), i); */ -+ rtw_msleep_os(10); -+ } else { -+ RTW_INFO("[HW_VAR_CHECK_TXBUF] no packet in tx packet buffer (%d)\n", i); -+ break; -+ } -+ } -+ -+ if (reg_200 != reg_204) -+ RTW_INFO("packets in tx buffer - 0x204=%x, 0x200=%x\n", reg_204, reg_200); -+ -+ RetryLimit = RL_VAL_STA; -+ val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit); -+ rtw_write16(padapter, REG_RETRY_LIMIT, val16); -+ } -+ break; -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ case HW_VAR_NAV_UPPER: { -+ u32 usNavUpper = *((u32 *)val); -+ -+ if (usNavUpper > HAL_NAV_UPPER_UNIT_8703B * 0xFF) { -+ break; -+ } -+ -+ /* The value of ((usNavUpper + HAL_NAV_UPPER_UNIT_8703B - 1) / HAL_NAV_UPPER_UNIT_8703B) */ -+ /* is getting the upper integer. */ -+ usNavUpper = (usNavUpper + HAL_NAV_UPPER_UNIT_8703B - 1) / HAL_NAV_UPPER_UNIT_8703B; -+ rtw_write8(padapter, REG_NAV_UPPER, (u8)usNavUpper); -+ } -+ break; -+ -+ case HW_VAR_BCN_VALID: -+#ifdef CONFIG_CONCURRENT_MODE -+ if (padapter->hw_port == HW_PORT1) { -+ val8 = rtw_read8(padapter, REG_DWBCN1_CTRL_8703B + 2); -+ val8 |= BIT(0); -+ rtw_write8(padapter, REG_DWBCN1_CTRL_8703B + 2, val8); -+ } else -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */ -+ val8 = rtw_read8(padapter, REG_TDECTRL + 2); -+ val8 |= BIT(0); -+ rtw_write8(padapter, REG_TDECTRL + 2, val8); -+ } -+ break; -+ -+ case HW_VAR_DL_BCN_SEL: -+#ifdef CONFIG_CONCURRENT_MODE -+ if (padapter->hw_port == HW_PORT1) { -+ /* SW_BCN_SEL - Port1 */ -+ val8 = rtw_read8(padapter, REG_DWBCN1_CTRL_8703B + 2); -+ val8 |= BIT(4); -+ rtw_write8(padapter, REG_DWBCN1_CTRL_8703B + 2, val8); -+ } else -+#endif /* CONFIG_CONCURRENT_MODE */ -+ { -+ /* SW_BCN_SEL - Port0 */ -+ val8 = rtw_read8(padapter, REG_DWBCN1_CTRL_8703B + 2); -+ val8 &= ~BIT(4); -+ rtw_write8(padapter, REG_DWBCN1_CTRL_8703B + 2, val8); -+ } -+ break; -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ case HW_SET_GPIO_WL_CTRL: { -+ u8 enable = *val; -+ u8 value = rtw_read8(padapter, 0x4e); -+ if (enable && (value & BIT(6))) { -+ value &= ~BIT(6); -+ rtw_write8(padapter, 0x4e, value); -+ } else if (enable == _FALSE) { -+ value |= BIT(6); -+ rtw_write8(padapter, 0x4e, value); -+ } -+ RTW_INFO("%s: set WL control, 0x4E=0x%02X\n", -+ __func__, rtw_read8(padapter, 0x4e)); -+ } -+ break; -+#endif -+ -+ default: -+ ret = SetHwReg(padapter, variable, val); -+ break; -+ } -+ -+ return ret; -+} -+#ifdef CONFIG_PROC_DEBUG -+struct qinfo_8703b { -+ u32 head:8; -+ u32 pkt_num:7; -+ u32 tail:8; -+ u32 ac:2; -+ u32 macid:7; -+}; -+ -+struct bcn_qinfo_8703b { -+ u16 head:8; -+ u16 pkt_num:8; -+}; -+ -+void dump_qinfo_8703b(void *sel, struct qinfo_8703b *info, const char *tag) -+{ -+ /* if (info->pkt_num) */ -+ RTW_PRINT_SEL(sel, "%shead:0x%02x, tail:0x%02x, pkt_num:%u, macid:%u, ac:%u\n" -+ , tag ? tag : "", info->head, info->tail, info->pkt_num, info->macid, info->ac -+ ); -+} -+ -+void dump_bcn_qinfo_8703b(void *sel, struct bcn_qinfo_8703b *info, const char *tag) -+{ -+ /* if (info->pkt_num) */ -+ RTW_PRINT_SEL(sel, "%shead:0x%02x, pkt_num:%u\n" -+ , tag ? tag : "", info->head, info->pkt_num -+ ); -+} -+ -+void dump_mac_qinfo_8703b(void *sel, _adapter *adapter) -+{ -+ u32 q0_info; -+ u32 q1_info; -+ u32 q2_info; -+ u32 q3_info; -+ u32 q4_info; -+ u32 q5_info; -+ u32 q6_info; -+ u32 q7_info; -+ u32 mg_q_info; -+ u32 hi_q_info; -+ u16 bcn_q_info; -+ -+ q0_info = rtw_read32(adapter, REG_Q0_INFO); -+ q1_info = rtw_read32(adapter, REG_Q1_INFO); -+ q2_info = rtw_read32(adapter, REG_Q2_INFO); -+ q3_info = rtw_read32(adapter, REG_Q3_INFO); -+ q4_info = rtw_read32(adapter, REG_Q4_INFO); -+ q5_info = rtw_read32(adapter, REG_Q5_INFO); -+ q6_info = rtw_read32(adapter, REG_Q6_INFO); -+ q7_info = rtw_read32(adapter, REG_Q7_INFO); -+ mg_q_info = rtw_read32(adapter, REG_MGQ_INFO); -+ hi_q_info = rtw_read32(adapter, REG_HGQ_INFO); -+ bcn_q_info = rtw_read16(adapter, REG_BCNQ_INFO); -+ -+ dump_qinfo_8703b(sel, (struct qinfo_8703b *)&q0_info, "Q0 "); -+ dump_qinfo_8703b(sel, (struct qinfo_8703b *)&q1_info, "Q1 "); -+ dump_qinfo_8703b(sel, (struct qinfo_8703b *)&q2_info, "Q2 "); -+ dump_qinfo_8703b(sel, (struct qinfo_8703b *)&q3_info, "Q3 "); -+ dump_qinfo_8703b(sel, (struct qinfo_8703b *)&q4_info, "Q4 "); -+ dump_qinfo_8703b(sel, (struct qinfo_8703b *)&q5_info, "Q5 "); -+ dump_qinfo_8703b(sel, (struct qinfo_8703b *)&q6_info, "Q6 "); -+ dump_qinfo_8703b(sel, (struct qinfo_8703b *)&q7_info, "Q7 "); -+ dump_qinfo_8703b(sel, (struct qinfo_8703b *)&mg_q_info, "MG "); -+ dump_qinfo_8703b(sel, (struct qinfo_8703b *)&hi_q_info, "HI "); -+ dump_bcn_qinfo_8703b(sel, (struct bcn_qinfo_8703b *)&bcn_q_info, "BCN "); -+} -+ -+static void dump_mac_txfifo_8703b(void *sel, _adapter *adapter) -+{ -+ u32 rqpn, rqpn_npq; -+ u32 hpq, lpq, npq, epq, pubq; -+ -+ rqpn = rtw_read32(adapter, REG_FIFOPAGE); -+ rqpn_npq = rtw_read32(adapter, REG_RQPN_NPQ); -+ -+ hpq = (rqpn & 0xFF); -+ lpq = ((rqpn & 0xFF00)>>8); -+ pubq = ((rqpn & 0xFF0000)>>16); -+ npq = ((rqpn_npq & 0xFF00)>>8); -+ epq = ((rqpn_npq & 0xFF000000)>>24); -+ -+ RTW_PRINT_SEL(sel, "Tx: available page num: "); -+ if ((hpq == 0xEA) && (hpq == lpq) && (hpq == pubq)) -+ RTW_PRINT_SEL(sel, "N/A (reg val = 0xea)\n"); -+ else -+ RTW_PRINT_SEL(sel, "HPQ: %d, LPQ: %d, NPQ: %d, EPQ: %d, PUBQ: %d\n" -+ , hpq, lpq, npq, epq, pubq); -+} -+#endif -+ -+void GetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ u8 val8; -+ u16 val16; -+ u32 val32; -+ -+ -+ switch (variable) { -+ case HW_VAR_TXPAUSE: -+ *val = rtw_read8(padapter, REG_TXPAUSE); -+ break; -+ -+ case HW_VAR_BCN_VALID: -+#ifdef CONFIG_CONCURRENT_MODE -+ if (padapter->hw_port == HW_PORT1) { -+ val8 = rtw_read8(padapter, REG_DWBCN1_CTRL_8703B + 2); -+ *val = (BIT(0) & val8) ? _TRUE : _FALSE; -+ } else -+#endif -+ { -+ /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */ -+ val8 = rtw_read8(padapter, REG_TDECTRL + 2); -+ *val = (BIT(0) & val8) ? _TRUE : _FALSE; -+ } -+ break; -+ -+ case HW_VAR_EFUSE_USAGE: -+ *val = pHalData->EfuseUsedPercentage; -+ break; -+ -+ case HW_VAR_EFUSE_BYTES: -+ *((u16 *)val) = pHalData->EfuseUsedBytes; -+ break; -+ -+ case HW_VAR_EFUSE_BT_USAGE: -+#ifdef HAL_EFUSE_MEMORY -+ *val = pHalData->EfuseHal.BTEfuseUsedPercentage; -+#endif -+ break; -+ -+ case HW_VAR_EFUSE_BT_BYTES: -+#ifdef HAL_EFUSE_MEMORY -+ *((u16 *)val) = pHalData->EfuseHal.BTEfuseUsedBytes; -+#else -+ *((u16 *)val) = BTEfuseUsedBytes; -+#endif -+ break; -+ -+ case HW_VAR_CHK_HI_QUEUE_EMPTY: -+ val16 = rtw_read16(padapter, REG_TXPKT_EMPTY); -+ *val = (val16 & BIT(10)) ? _TRUE : _FALSE; -+ break; -+ case HW_VAR_CHK_MGQ_CPU_EMPTY: -+ val16 = rtw_read16(padapter, REG_TXPKT_EMPTY); -+ *val = (val16 & BIT(8)) ? _TRUE : _FALSE; -+ break; -+#ifdef CONFIG_WOWLAN -+ case HW_VAR_RPWM_TOG: -+ *val = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1) & BIT7; -+ break; -+ case HW_VAR_WAKEUP_REASON: -+ *val = rtw_read8(padapter, REG_WOWLAN_WAKE_REASON); -+ if (*val == 0xEA) -+ *val = 0; -+ break; -+ case HW_VAR_SYS_CLKR: -+ *val = rtw_read8(padapter, REG_SYS_CLKR); -+ break; -+#endif -+#ifdef CONFIG_PROC_DEBUG -+ case HW_VAR_DUMP_MAC_QUEUE_INFO: -+ dump_mac_qinfo_8703b(val, padapter); -+ break; -+ case HW_VAR_DUMP_MAC_TXFIFO: -+ dump_mac_txfifo_8703b(val, padapter); -+ break; -+#endif -+ default: -+ GetHwReg(padapter, variable, val); -+ break; -+ } -+} -+ -+/* -+ * Description: -+ * Change default setting of specified variable. -+ */ -+u8 SetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) -+{ -+ PHAL_DATA_TYPE pHalData; -+ u8 bResult; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ bResult = _SUCCESS; -+ -+ switch (variable) { -+ default: -+ bResult = SetHalDefVar(padapter, variable, pval); -+ break; -+ } -+ -+ return bResult; -+} -+ -+void hal_ra_info_dump(_adapter *padapter , void *sel) -+{ -+ int i; -+ u8 mac_id; -+ u32 cmd; -+ u32 ra_info1, ra_info2, bw_set; -+ u32 rate_mask1, rate_mask2; -+ u8 curr_tx_rate, curr_tx_sgi, hight_rate, lowest_rate; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ HAL_DATA_TYPE *HalData = GET_HAL_DATA(padapter); -+ -+ for (i = 0; i < macid_ctl->num; i++) { -+ -+ if (rtw_macid_is_used(macid_ctl, i) && !rtw_macid_is_bmc(macid_ctl, i)) { -+ -+ mac_id = (u8) i; -+ _RTW_PRINT_SEL(sel , "============ RA status check Mac_id:%d ===================\n", mac_id); -+ -+ cmd = 0x40000100 | mac_id; -+ rtw_write32(padapter, REG_HMEBOX_DBG_2_8703B, cmd); -+ rtw_msleep_os(10); -+ ra_info1 = rtw_read32(padapter, 0x2F0); -+ curr_tx_sgi = rtw_get_current_tx_sgi(padapter, macid_ctl->sta[mac_id]); -+ curr_tx_rate = rtw_get_current_tx_rate(padapter, macid_ctl->sta[mac_id]); -+ -+ _RTW_PRINT_SEL(sel , "[ ra_info1:0x%08x ] =>cur_tx_rate= %s,cur_sgi:%d\n", ra_info1, HDATA_RATE(curr_tx_rate), curr_tx_sgi); -+ _RTW_PRINT_SEL(sel , "[ ra_info1:0x%08x ] => PWRSTS = 0x%02x\n", ra_info1, (ra_info1 >> 8) & 0x07); -+ -+ cmd = 0x40000400 | mac_id; -+ rtw_write32(padapter, REG_HMEBOX_DBG_2_8703B, cmd); -+ rtw_msleep_os(10); -+ ra_info1 = rtw_read32(padapter, 0x2F0); -+ ra_info2 = rtw_read32(padapter, 0x2F4); -+ rate_mask1 = rtw_read32(padapter, 0x2F8); -+ rate_mask2 = rtw_read32(padapter, 0x2FC); -+ hight_rate = ra_info2 & 0xFF; -+ lowest_rate = (ra_info2 >> 8) & 0xFF; -+ bw_set = (ra_info1 >> 8) & 0xFF; -+ -+ _RTW_PRINT_SEL(sel , "[ ra_info1:0x%08x ] => VHT_EN=0x%02x, ", ra_info1, (ra_info1 >> 24) & 0xFF); -+ -+ -+ switch (bw_set) { -+ -+ case CHANNEL_WIDTH_20: -+ _RTW_PRINT_SEL(sel , "BW_setting=20M\n"); -+ break; -+ -+ case CHANNEL_WIDTH_40: -+ _RTW_PRINT_SEL(sel , "BW_setting=40M\n"); -+ break; -+ -+ case CHANNEL_WIDTH_80: -+ _RTW_PRINT_SEL(sel , "BW_setting=80M\n"); -+ break; -+ -+ case CHANNEL_WIDTH_160: -+ _RTW_PRINT_SEL(sel , "BW_setting=160M\n"); -+ break; -+ -+ default: -+ _RTW_PRINT_SEL(sel , "BW_setting=0x%02x\n", bw_set); -+ break; -+ -+ } -+ -+ _RTW_PRINT_SEL(sel , "[ ra_info1:0x%08x ] =>RSSI=%d, DISRA=0x%02x\n", -+ ra_info1, -+ ra_info1 & 0xFF, -+ (ra_info1 >> 16) & 0xFF); -+ -+ _RTW_PRINT_SEL(sel , "[ ra_info2:0x%08x ] =>hight_rate=%s, lowest_rate=%s, SGI=0x%02x, RateID=%d\n", -+ ra_info2, -+ HDATA_RATE(hight_rate), -+ HDATA_RATE(lowest_rate), -+ (ra_info2 >> 16) & 0xFF, -+ (ra_info2 >> 24) & 0xFF); -+ -+ _RTW_PRINT_SEL(sel , "rate_mask2=0x%08x, rate_mask1=0x%08x\n", rate_mask2, rate_mask1); -+ -+ } -+ } -+} -+ -+/* -+ * Description: -+ * Query setting of specified variable. -+ */ -+u8 GetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) -+{ -+ PHAL_DATA_TYPE pHalData; -+ u8 bResult; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ bResult = _SUCCESS; -+ -+ switch (variable) { -+ case HAL_DEF_MAX_RECVBUF_SZ: -+ *((u32 *)pval) = MAX_RECVBUF_SZ; -+ break; -+ -+ case HAL_DEF_RX_PACKET_OFFSET: -+ *((u32 *)pval) = RXDESC_SIZE + DRVINFO_SZ * 8; -+ break; -+ -+ case HW_VAR_MAX_RX_AMPDU_FACTOR: -+ /* Stanley@BB.SD3 suggests 16K can get stable performance */ -+ /* The experiment was done on SDIO interface */ -+ /* coding by Lucas@20130730 */ -+ *(HT_CAP_AMPDU_FACTOR *)pval = MAX_AMPDU_FACTOR_16K; -+ break; -+ case HW_VAR_BEST_AMPDU_DENSITY: -+ *((u32 *)pval) = AMPDU_DENSITY_VALUE_7; -+ break; -+ case HAL_DEF_TX_LDPC: -+ case HAL_DEF_RX_LDPC: -+ *((u8 *)pval) = _FALSE; -+ break; -+ case HAL_DEF_RX_STBC: -+ *((u8 *)pval) = 1; -+ break; -+ case HAL_DEF_EXPLICIT_BEAMFORMER: -+ case HAL_DEF_EXPLICIT_BEAMFORMEE: -+ *((u8 *)pval) = _FALSE; -+ break; -+ -+ case HW_DEF_RA_INFO_DUMP: -+ hal_ra_info_dump(padapter, pval); -+ break; -+ -+ case HAL_DEF_TX_PAGE_BOUNDARY: -+ if (!padapter->registrypriv.wifi_spec) -+ *(u8 *)pval = TX_PAGE_BOUNDARY_8703B; -+ else -+ *(u8 *)pval = WMM_NORMAL_TX_PAGE_BOUNDARY_8703B; -+ break; -+ case HAL_DEF_TX_PAGE_SIZE: -+ *((u32 *)pval) = PAGE_SIZE_128; -+ break; -+ case HAL_DEF_RX_DMA_SZ_WOW: -+ *(u32 *)pval = RX_DMA_SIZE_8703B - RESV_FMWF; -+ break; -+ case HAL_DEF_RX_DMA_SZ: -+ *(u32 *)pval = RX_DMA_BOUNDARY_8703B + 1; -+ break; -+ case HAL_DEF_RX_PAGE_SIZE: -+ *((u32 *)pval) = 8; -+ break; -+ default: -+ bResult = GetHalDefVar(padapter, variable, pval); -+ break; -+ } -+ -+ return bResult; -+} -+ -+#ifdef CONFIG_WOWLAN -+void Hal_DetectWoWMode(PADAPTER pAdapter) -+{ -+ adapter_to_pwrctl(pAdapter)->bSupportRemoteWakeup = _TRUE; -+ RTW_INFO("%s\n", __func__); -+} -+#endif /* CONFIG_WOWLAN */ -+ -+void rtl8703b_start_thread(_adapter *padapter) -+{ -+#if (defined CONFIG_SDIO_HCI) || (defined CONFIG_GSPI_HCI) -+#ifndef CONFIG_SDIO_TX_TASKLET -+ struct xmit_priv *xmitpriv = &padapter->xmitpriv; -+ -+ if (xmitpriv->SdioXmitThread == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT " start RTWHALXT\n", FUNC_ADPT_ARG(padapter)); -+ xmitpriv->SdioXmitThread = kthread_run(rtl8703bs_xmit_thread, padapter, "RTWHALXT"); -+ if (IS_ERR(xmitpriv->SdioXmitThread)) { -+ RTW_ERR("%s: start rtl8703bs_xmit_thread FAIL!!\n", __func__); -+ xmitpriv->SdioXmitThread = NULL; -+ } -+ } -+#endif -+#endif -+} -+ -+void rtl8703b_stop_thread(_adapter *padapter) -+{ -+#if (defined CONFIG_SDIO_HCI) || (defined CONFIG_GSPI_HCI) -+#ifndef CONFIG_SDIO_TX_TASKLET -+ struct xmit_priv *xmitpriv = &padapter->xmitpriv; -+ -+ /* stop xmit_buf_thread */ -+ if (xmitpriv->SdioXmitThread) { -+ _rtw_up_sema(&xmitpriv->SdioXmitSema); -+ rtw_thread_stop(xmitpriv->SdioXmitThread); -+ xmitpriv->SdioXmitThread = NULL; -+ } -+#endif -+#endif -+} -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+extern void check_bt_status_work(void *data); -+void rtl8703bs_init_checkbthang_workqueue(_adapter *adapter) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) -+ adapter->priv_checkbt_wq = alloc_workqueue("sdio_wq", 0, 0); -+#else -+ adapter->priv_checkbt_wq = create_workqueue("sdio_wq"); -+#endif -+ INIT_DELAYED_WORK(&adapter->checkbt_work, (void *)check_bt_status_work); -+} -+ -+void rtl8703bs_free_checkbthang_workqueue(_adapter *adapter) -+{ -+ if (adapter->priv_checkbt_wq) { -+ cancel_delayed_work_sync(&adapter->checkbt_work); -+ flush_workqueue(adapter->priv_checkbt_wq); -+ destroy_workqueue(adapter->priv_checkbt_wq); -+ adapter->priv_checkbt_wq = NULL; -+ } -+} -+ -+void rtl8703bs_cancle_checkbthang_workqueue(_adapter *adapter) -+{ -+ if (adapter->priv_checkbt_wq) -+ cancel_delayed_work_sync(&adapter->checkbt_work); -+} -+ -+void rtl8703bs_hal_check_bt_hang(_adapter *adapter) -+{ -+ if (adapter->priv_checkbt_wq) -+ queue_delayed_work(adapter->priv_checkbt_wq, &(adapter->checkbt_work), 0); -+} -+#endif -+ -+void rtl8703b_set_hal_ops(struct hal_ops *pHalFunc) -+{ -+ pHalFunc->dm_init = &rtl8703b_init_dm_priv; -+ pHalFunc->dm_deinit = &rtl8703b_deinit_dm_priv; -+ -+ pHalFunc->read_chip_version = read_chip_version_8703b; -+ -+ pHalFunc->set_chnl_bw_handler = &PHY_SetSwChnlBWMode8703B; -+ -+ pHalFunc->set_tx_power_level_handler = &PHY_SetTxPowerLevel8703B; -+ pHalFunc->set_tx_power_index_handler = PHY_SetTxPowerIndex_8703B; -+ pHalFunc->get_tx_power_index_handler = hal_com_get_txpwr_idx; -+ -+ pHalFunc->hal_dm_watchdog = &rtl8703b_HalDmWatchDog; -+ -+ pHalFunc->SetBeaconRelatedRegistersHandler = &rtl8703b_SetBeaconRelatedRegisters; -+ -+ pHalFunc->run_thread = &rtl8703b_start_thread; -+ pHalFunc->cancel_thread = &rtl8703b_stop_thread; -+ -+ pHalFunc->read_bbreg = &PHY_QueryBBReg_8703B; -+ pHalFunc->write_bbreg = &PHY_SetBBReg_8703B; -+ pHalFunc->read_rfreg = &PHY_QueryRFReg_8703B; -+ pHalFunc->write_rfreg = &PHY_SetRFReg_8703B; -+ -+ /* Efuse related function */ -+ pHalFunc->BTEfusePowerSwitch = &Hal_BT_EfusePowerSwitch; -+ pHalFunc->EfusePowerSwitch = &Hal_EfusePowerSwitch; -+ pHalFunc->ReadEFuse = &Hal_ReadEFuse; -+ pHalFunc->EFUSEGetEfuseDefinition = &Hal_GetEfuseDefinition; -+ pHalFunc->EfuseGetCurrentSize = &Hal_EfuseGetCurrentSize; -+ pHalFunc->Efuse_PgPacketRead = &Hal_EfusePgPacketRead; -+ pHalFunc->Efuse_PgPacketWrite = &Hal_EfusePgPacketWrite; -+ pHalFunc->Efuse_WordEnableDataWrite = &Hal_EfuseWordEnableDataWrite; -+ pHalFunc->Efuse_PgPacketWrite_BT = &Hal_EfusePgPacketWrite_BT; -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ pHalFunc->sreset_init_value = &sreset_init_value; -+ pHalFunc->sreset_reset_value = &sreset_reset_value; -+ pHalFunc->silentreset = &sreset_reset; -+ pHalFunc->sreset_xmit_status_check = &rtl8703b_sreset_xmit_status_check; -+ pHalFunc->sreset_linked_status_check = &rtl8703b_sreset_linked_status_check; -+ pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; -+ pHalFunc->sreset_inprogress = &sreset_inprogress; -+#endif -+ pHalFunc->GetHalODMVarHandler = GetHalODMVar; -+ pHalFunc->SetHalODMVarHandler = SetHalODMVar; -+ -+#ifdef CONFIG_XMIT_THREAD_MODE -+ pHalFunc->xmit_thread_handler = &hal_xmit_handler; -+#endif -+ pHalFunc->hal_notch_filter = &hal_notch_filter_8703b; -+ -+ pHalFunc->c2h_handler = c2h_handler_8703b; -+ -+ pHalFunc->fill_h2c_cmd = &FillH2CCmd8703B; -+ pHalFunc->fill_fake_txdesc = &rtl8703b_fill_fake_txdesc; -+ pHalFunc->fw_dl = &rtl8703b_FirmwareDownload; -+ pHalFunc->hal_get_tx_buff_rsvd_page_num = &GetTxBufferRsvdPageNum8703B; -+} -+ -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_phycfg.c b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_phycfg.c -new file mode 100644 -index 000000000000..b786c18a7b66 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_phycfg.c -@@ -0,0 +1,1282 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTL8703B_PHYCFG_C_ -+ -+#include -+ -+ -+/*---------------------------Define Local Constant---------------------------*/ -+/* Channel switch:The size of command tables for switch channel*/ -+#define MAX_PRECMD_CNT 16 -+#define MAX_RFDEPENDCMD_CNT 16 -+#define MAX_POSTCMD_CNT 16 -+ -+#define MAX_DOZE_WAITING_TIMES_9x 64 -+ -+/*---------------------------Define Local Constant---------------------------*/ -+ -+ -+/*------------------------Define global variable-----------------------------*/ -+ -+/*------------------------Define local variable------------------------------*/ -+ -+ -+/*--------------------Define export function prototype-----------------------*/ -+/* Please refer to header file -+ *--------------------Define export function prototype-----------------------*/ -+ -+/*----------------------------Function Body----------------------------------*/ -+/* -+ * 1. BB register R/W API -+ * */ -+ -+/** -+* Function: phy_CalculateBitShift -+* -+* OverView: Get shifted position of the BitMask -+* -+* Input: -+* u32 BitMask, -+* -+* Output: none -+* Return: u32 Return the shift bit bit position of the mask -+*/ -+static u32 -+phy_CalculateBitShift( -+ u32 BitMask -+) -+{ -+ u32 i; -+ -+ for (i = 0; i <= 31; i++) { -+ if (((BitMask >> i) & 0x1) == 1) -+ break; -+ } -+ -+ return i; -+} -+ -+ -+/** -+* Function: PHY_QueryBBReg -+* -+* OverView: Read "sepcific bits" from BB register -+* -+* Input: -+* PADAPTER Adapter, -+* u32 RegAddr, //The target address to be readback -+* u32 BitMask //The target bit position in the target address -+* //to be readback -+* Output: None -+* Return: u32 Data //The readback register value -+* Note: This function is equal to "GetRegSetting" in PHY programming guide -+*/ -+u32 -+PHY_QueryBBReg_8703B( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask -+) -+{ -+ u32 ReturnValue = 0, OriginalValue, BitShift; -+ u16 BBWaitCounter = 0; -+ -+#if (DISABLE_BB_RF == 1) -+ return 0; -+#endif -+ -+ -+ OriginalValue = rtw_read32(Adapter, RegAddr); -+ BitShift = phy_CalculateBitShift(BitMask); -+ ReturnValue = (OriginalValue & BitMask) >> BitShift; -+ -+ return ReturnValue; -+ -+} -+ -+ -+/** -+* Function: PHY_SetBBReg -+* -+* OverView: Write "Specific bits" to BB register (page 8~) -+* -+* Input: -+* PADAPTER Adapter, -+* u32 RegAddr, //The target address to be modified -+* u32 BitMask //The target bit position in the target address -+* //to be modified -+* u32 Data //The new register value in the target bit position -+* //of the target address -+* -+* Output: None -+* Return: None -+* Note: This function is equal to "PutRegSetting" in PHY programming guide -+*/ -+ -+void -+PHY_SetBBReg_8703B( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ /* u16 BBWaitCounter = 0; */ -+ u32 OriginalValue, BitShift; -+ -+#if (DISABLE_BB_RF == 1) -+ return; -+#endif -+ -+ -+ if (BitMask != bMaskDWord) { /* if not "double word" write */ -+ OriginalValue = rtw_read32(Adapter, RegAddr); -+ BitShift = phy_CalculateBitShift(BitMask); -+ Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask)); -+ } -+ -+ rtw_write32(Adapter, RegAddr, Data); -+ -+} -+ -+ -+/* -+ * 2. RF register R/W API -+ * */ -+static u32 -+phy_RFSerialRead_8703B( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset -+) -+{ -+ u32 retValue = 0; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; -+ u32 NewOffset; -+ u32 tmplong, tmplong2; -+ u8 RfPiEnable = 0; -+ u32 MaskforPhySet = 0; -+ int i = 0; -+ -+ _enter_critical_mutex(&(adapter_to_dvobj(Adapter)->rf_read_reg_mutex) , NULL); -+ /* */ -+ /* Make sure RF register offset is correct */ -+ /* */ -+ Offset &= 0xff; -+ -+ NewOffset = Offset; -+ -+ if (eRFPath == RF_PATH_A) { -+ tmplong2 = phy_query_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord); -+ tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset << 23) | bLSSIReadEdge; /* T65 RF */ -+ phy_set_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge)); -+ } else { -+ tmplong2 = phy_query_bb_reg(Adapter, rFPGA0_XB_HSSIParameter2 | MaskforPhySet, bMaskDWord); -+ tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset << 23) | bLSSIReadEdge; /* T65 RF */ -+ phy_set_bb_reg(Adapter, rFPGA0_XB_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge)); -+ } -+ -+ tmplong2 = phy_query_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord); -+ phy_set_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge)); -+ phy_set_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge); -+ -+ rtw_udelay_os(10); -+ -+ for (i = 0; i < 2; i++) -+ rtw_udelay_os(MAX_STALL_TIME); -+ rtw_udelay_os(10); -+ -+ if (eRFPath == RF_PATH_A) -+ RfPiEnable = (u8)phy_query_bb_reg(Adapter, rFPGA0_XA_HSSIParameter1 | MaskforPhySet, BIT8); -+ else if (eRFPath == RF_PATH_B) -+ RfPiEnable = (u8)phy_query_bb_reg(Adapter, rFPGA0_XB_HSSIParameter1 | MaskforPhySet, BIT8); -+ -+ if (RfPiEnable) { -+ /* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */ -+ retValue = phy_query_bb_reg(Adapter, pPhyReg->rfLSSIReadBackPi | MaskforPhySet, bLSSIReadBackData); -+ -+ /* RT_DISP(FINIT, INIT_RF, ("Readback from RF-PI : 0x%x\n", retValue)); */ -+ } else { -+ /* Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF */ -+ retValue = phy_query_bb_reg(Adapter, pPhyReg->rfLSSIReadBack | MaskforPhySet, bLSSIReadBackData); -+ -+ /* RT_DISP(FINIT, INIT_RF,("Readback from RF-SI : 0x%x\n", retValue)); */ -+ } -+ _exit_critical_mutex(&(adapter_to_dvobj(Adapter)->rf_read_reg_mutex) , NULL); -+ return retValue; -+ -+} -+ -+/** -+* Function: phy_RFSerialWrite_8703B -+* -+* OverView: Write data to RF register (page 8~) -+* -+* Input: -+* PADAPTER Adapter, -+ enum rf_path eRFPath, //Radio path of A/B/C/D -+* u32 Offset, //The target address to be read -+* u32 Data //The new register Data in the target bit position -+* //of the target to be read -+* -+* Output: None -+* Return: None -+* Note: Threre are three types of serial operations: -+* 1. Software serial write -+* 2. Hardware LSSI-Low Speed Serial Interface -+* 3. Hardware HSSI-High speed -+* serial write. Driver need to implement (1) and (2). -+* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() -+ * -+ * Note: For RF8256 only -+ * The total count of RTL8256(Zebra4) register is around 36 bit it only employs -+ * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) -+ * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration -+ * programming guide" for more details. -+ * Thus, we define a sub-finction for RTL8526 register address conversion -+ * =========================================================== -+ * Register Mode RegCTL[1] RegCTL[0] Note -+ * (Reg00[12]) (Reg00[10]) -+ * =========================================================== -+ * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) -+ * ------------------------------------------------------------------ -+ * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) -+ * ------------------------------------------------------------------ -+ * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) -+ * ------------------------------------------------------------------ -+ * -+ * 2008/09/02 MH Add 92S RF definition -+ * -+ * -+ * -+*/ -+static void -+phy_RFSerialWrite_8703B( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset, -+ u32 Data -+) -+{ -+ u32 DataAndAddr = 0; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; -+ u32 NewOffset; -+ -+ Offset &= 0xff; -+ -+ /* */ -+ /* Shadow Update */ -+ /* */ -+ /* PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); */ -+ -+ /* */ -+ /* Switch page for 8256 RF IC */ -+ /* */ -+ NewOffset = Offset; -+ -+ /* */ -+ /* Put write addr in [5:0] and write data in [31:16] */ -+ /* */ -+ /* DataAndAddr = (Data<<16) | (NewOffset&0x3f); */ -+ DataAndAddr = ((NewOffset << 20) | (Data & 0x000fffff)) & 0x0fffffff; /* T65 RF */ -+ -+ /* */ -+ /* Write Operation */ -+ /* */ -+ phy_set_bb_reg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); -+ /* RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); */ -+ -+} -+ -+ -+/** -+* Function: PHY_QueryRFReg -+* -+* OverView: Query "Specific bits" to RF register (page 8~) -+* -+* Input: -+* PADAPTER Adapter, -+ enum rf_path eRFPath, //Radio path of A/B/C/D -+* u32 RegAddr, //The target address to be read -+* u32 BitMask //The target bit position in the target address -+* //to be read -+* -+* Output: None -+* Return: u32 Readback value -+* Note: This function is equal to "GetRFRegSetting" in PHY programming guide -+*/ -+u32 -+PHY_QueryRFReg_8703B( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask -+) -+{ -+ u32 Original_Value, Readback_Value, BitShift; -+ -+#if (DISABLE_BB_RF == 1) -+ return 0; -+#endif -+ -+ Original_Value = phy_RFSerialRead_8703B(Adapter, eRFPath, RegAddr); -+ -+ BitShift = phy_CalculateBitShift(BitMask); -+ Readback_Value = (Original_Value & BitMask) >> BitShift; -+ -+ return Readback_Value; -+} -+ -+/** -+* Function: PHY_SetRFReg -+* -+* OverView: Write "Specific bits" to RF register (page 8~) -+* -+* Input: -+* PADAPTER Adapter, -+ enum rf_path eRFPath, //Radio path of A/B/C/D -+* u32 RegAddr, //The target address to be modified -+* u32 BitMask //The target bit position in the target address -+* //to be modified -+* u32 Data //The new register Data in the target bit position -+* //of the target address -+* -+* Output: None -+* Return: None -+* Note: This function is equal to "PutRFRegSetting" in PHY programming guide -+*/ -+void -+PHY_SetRFReg_8703B( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+) -+{ -+ u32 Original_Value, BitShift; -+ -+#if (DISABLE_BB_RF == 1) -+ return; -+#endif -+ -+ /* RF data is 12 bits only */ -+ if (BitMask != bRFRegOffsetMask) { -+ Original_Value = phy_RFSerialRead_8703B(Adapter, eRFPath, RegAddr); -+ BitShift = phy_CalculateBitShift(BitMask); -+ Data = ((Original_Value & (~BitMask)) | (Data << BitShift)); -+ } -+ -+ phy_RFSerialWrite_8703B(Adapter, eRFPath, RegAddr, Data); -+} -+ -+ -+/* -+ * 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. -+ * */ -+ -+ -+/*----------------------------------------------------------------------------- -+ * Function: PHY_MACConfig8192C -+ * -+ * Overview: Condig MAC by header file or parameter file. -+ * -+ * Input: NONE -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Revised History: -+ * When Who Remark -+ * 08/12/2008 MHC Create Version 0. -+ * -+ *---------------------------------------------------------------------------*/ -+s32 PHY_MACConfig8703B(PADAPTER Adapter) -+{ -+ int rtStatus = _SUCCESS; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ /* */ -+ /* Config MAC */ -+ /* */ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ rtStatus = phy_ConfigMACWithParaFile(Adapter, PHY_FILE_MAC_REG); -+ if (rtStatus == _FAIL) -+#endif -+ { -+#ifdef CONFIG_EMBEDDED_FWIMG -+ odm_config_mac_with_header_file(&pHalData->odmpriv); -+ rtStatus = _SUCCESS; -+#endif/* CONFIG_EMBEDDED_FWIMG */ -+ } -+ -+ return rtStatus; -+} -+ -+/** -+* Function: phy_InitBBRFRegisterDefinition -+* -+* OverView: Initialize Register definition offset for Radio Path A/B/C/D -+* -+* Input: -+* PADAPTER Adapter, -+* -+* Output: None -+* Return: None -+* Note: The initialization value is constant and it should never be changes -+*/ -+static void -+phy_InitBBRFRegisterDefinition( -+ PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ /* RF Interface Sowrtware Control */ -+ pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */ -+ pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) */ -+ -+ /* RF Interface Output (and Enable) */ -+ pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */ -+ pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x864 */ -+ -+ /* RF Interface (Output and) Enable */ -+ pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */ -+ pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) */ -+ -+ pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */ -+ pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; -+ -+ pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */ -+ pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */ -+ -+ /* Tranceiver Readback LSSI/HSPI mode */ -+ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; -+ pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; -+ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; -+ pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; -+ -+} -+ -+static int -+phy_BB8703b_Config_ParaFile( -+ PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ int rtStatus = _SUCCESS; -+ -+ /* */ -+ /* 1. Read PHY_REG.TXT BB INIT!! */ -+ /* */ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ if (phy_ConfigBBWithParaFile(Adapter, PHY_FILE_PHY_REG, CONFIG_BB_PHY_REG) == _FAIL) -+#endif -+ { -+#ifdef CONFIG_EMBEDDED_FWIMG -+ if (HAL_STATUS_SUCCESS != odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_PHY_REG)) -+ rtStatus = _FAIL; -+#endif -+ } -+ -+ if (rtStatus != _SUCCESS) { -+ RTW_INFO("%s():Write BB Reg Fail!!", __func__); -+ goto phy_BB8190_Config_ParaFile_Fail; -+ } -+ -+#if MP_DRIVER == 1 -+ if (Adapter->registrypriv.mp_mode == 1) { -+ /* */ -+ /* 1.1 Read PHY_REG_MP.TXT BB INIT!! */ -+ /* */ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ if (phy_ConfigBBWithMpParaFile(Adapter, PHY_FILE_PHY_REG_MP) == _FAIL) -+#endif -+ { -+#ifdef CONFIG_EMBEDDED_FWIMG -+ if (HAL_STATUS_SUCCESS != odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_PHY_REG_MP)) -+ rtStatus = _FAIL; -+#endif -+ } -+ -+ if (rtStatus != _SUCCESS) { -+ RTW_INFO("%s():Write BB Reg MP Fail!!", __func__); -+ goto phy_BB8190_Config_ParaFile_Fail; -+ } -+ } -+#endif /* #if (MP_DRIVER == 1) */ -+ -+ /* */ -+ /* 2. Read BB AGC table Initialization */ -+ /* */ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ if (phy_ConfigBBWithParaFile(Adapter, PHY_FILE_AGC_TAB, CONFIG_BB_AGC_TAB) == _FAIL) -+#endif -+ { -+#ifdef CONFIG_EMBEDDED_FWIMG -+ if (HAL_STATUS_SUCCESS != odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) -+ rtStatus = _FAIL; -+#endif -+ } -+ -+ if (rtStatus != _SUCCESS) { -+ RTW_INFO("%s():AGC Table Fail\n", __func__); -+ goto phy_BB8190_Config_ParaFile_Fail; -+ } -+ -+phy_BB8190_Config_ParaFile_Fail: -+ -+ return rtStatus; -+} -+ -+ -+int -+PHY_BBConfig8703B( -+ PADAPTER Adapter -+) -+{ -+ int rtStatus = _SUCCESS; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u16 RegVal; -+ u8 TmpU1B = 0; -+ u8 value8; -+ -+ phy_InitBBRFRegisterDefinition(Adapter); -+ -+ /* Enable BB and RF */ -+ RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); -+ -+ RegVal |= BIT13 | FEN_BB_GLB_RSTn | FEN_BBRSTB; -+ rtw_write16(Adapter, REG_SYS_FUNC_EN, RegVal); -+ -+ rtw_write8(Adapter, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB); -+ -+ rtw_usleep_os(10); -+ -+ phy_set_rf_reg(Adapter, RF_PATH_A, 0x1, 0xfffff, 0x780); -+ -+#if 0 -+ /* 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. */ -+ rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); -+ rtw_write8(Adapter, REG_AFE_PLL_CTRL + 1, 0xdb); -+#endif -+ -+ -+ -+ rtw_write8(Adapter, REG_AFE_XTAL_CTRL + 1, 0x80); -+ -+ /* */ -+ /* Config BB and AGC */ -+ /* */ -+ rtStatus = phy_BB8703b_Config_ParaFile(Adapter); -+ -+ if (rtw_phydm_set_crystal_cap(Adapter, pHalData->crystal_cap) == _FALSE) { -+ RTW_ERR("Init crystal_cap failed\n"); -+ rtw_warn_on(1); -+ rtStatus = _FAIL; -+ } -+ -+ return rtStatus; -+} -+ -+void phy_LCK_8703B( -+ PADAPTER Adapter -+) -+{ -+ phy_set_rf_reg(Adapter, RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFBE0); -+ phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x8C01); -+ rtw_mdelay_os(200); -+ phy_set_rf_reg(Adapter, RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFFE0); -+} -+ -+#if 0 -+/* Block & Path enable */ -+#define rOFDMCCKEN_Jaguar 0x808 /* OFDM/CCK block enable */ -+#define bOFDMEN_Jaguar 0x20000000 -+#define bCCKEN_Jaguar 0x10000000 -+#define rRxPath_Jaguar 0x808 /* Rx antenna */ -+#define bRxPath_Jaguar 0xff -+#define rTxPath_Jaguar 0x80c /* Tx antenna */ -+#define bTxPath_Jaguar 0x0fffffff -+#define rCCK_RX_Jaguar 0xa04 /* for cck rx path selection */ -+#define bCCK_RX_Jaguar 0x0c000000 -+#define rVhtlen_Use_Lsig_Jaguar 0x8c3 /* Use LSIG for VHT length */ -+void -+PHY_BB8703B_Config_1T( -+ PADAPTER Adapter -+) -+{ -+ /* BB OFDM RX Path_A */ -+ phy_set_bb_reg(Adapter, rRxPath_Jaguar, bRxPath_Jaguar, 0x11); -+ /* BB OFDM TX Path_A */ -+ phy_set_bb_reg(Adapter, rTxPath_Jaguar, bMaskLWord, 0x1111); -+ /* BB CCK R/Rx Path_A */ -+ phy_set_bb_reg(Adapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); -+ /* MCS support */ -+ phy_set_bb_reg(Adapter, 0x8bc, 0xc0000060, 0x4); -+ /* RF Path_B HSSI OFF */ -+ phy_set_bb_reg(Adapter, 0xe00, 0xf, 0x4); -+ /* RF Path_B Power Down */ -+ phy_set_bb_reg(Adapter, 0xe90, bMaskDWord, 0); -+ /* ADDA Path_B OFF */ -+ phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0); -+ phy_set_bb_reg(Adapter, 0xe64, bMaskDWord, 0); -+} -+#endif -+ -+int -+PHY_RFConfig8703B( -+ PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ int rtStatus = _SUCCESS; -+ -+ /* */ -+ /* RF config */ -+ /* */ -+ rtStatus = PHY_RF6052_Config8703B(Adapter); -+ -+ phy_LCK_8703B(Adapter); -+ /* PHY_BB8703B_Config_1T(Adapter); */ -+ -+ return rtStatus; -+} -+ -+/*----------------------------------------------------------------------------- -+ * Function: PHY_ConfigRFWithParaFile() -+ * -+ * Overview: This function read RF parameters from general file format, and do RF 3-wire -+ * -+ * Input: PADAPTER Adapter -+ * ps1Byte pFileName -+ * enum rf_path eRFPath -+ * -+ * Output: NONE -+ * -+ * Return: RT_STATUS_SUCCESS: configuration file exist -+ * -+ * Note: Delay may be required for RF configuration -+ *---------------------------------------------------------------------------*/ -+int -+PHY_ConfigRFWithParaFile_8703B( -+ PADAPTER Adapter, -+ u8 *pFileName, -+ enum rf_path eRFPath -+) -+{ -+ return _SUCCESS; -+} -+ -+/************************************************************************************************************** -+ * Description: -+ * The low-level interface to set TxAGC , called by both MP and Normal Driver. -+ * -+ * <20120830, Kordan> -+ **************************************************************************************************************/ -+ -+void -+PHY_SetTxPowerIndex_8703B( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+) -+{ -+ if (RFPath == RF_PATH_A || RFPath == RF_PATH_B) { -+ switch (Rate) { -+ case MGN_1M: -+ phy_set_bb_reg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex); -+ break; -+ case MGN_2M: -+ phy_set_bb_reg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex); -+ break; -+ case MGN_5_5M: -+ phy_set_bb_reg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte2, PowerIndex); -+ break; -+ case MGN_11M: -+ phy_set_bb_reg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte3, PowerIndex); -+ break; -+ -+ case MGN_6M: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Rate18_06, bMaskByte0, PowerIndex); -+ break; -+ case MGN_9M: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Rate18_06, bMaskByte1, PowerIndex); -+ break; -+ case MGN_12M: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Rate18_06, bMaskByte2, PowerIndex); -+ break; -+ case MGN_18M: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Rate18_06, bMaskByte3, PowerIndex); -+ break; -+ -+ case MGN_24M: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Rate54_24, bMaskByte0, PowerIndex); -+ break; -+ case MGN_36M: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Rate54_24, bMaskByte1, PowerIndex); -+ break; -+ case MGN_48M: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Rate54_24, bMaskByte2, PowerIndex); -+ break; -+ case MGN_54M: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Rate54_24, bMaskByte3, PowerIndex); -+ break; -+ -+ case MGN_MCS0: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte0, PowerIndex); -+ break; -+ case MGN_MCS1: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte1, PowerIndex); -+ break; -+ case MGN_MCS2: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte2, PowerIndex); -+ break; -+ case MGN_MCS3: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte3, PowerIndex); -+ break; -+ -+ case MGN_MCS4: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte0, PowerIndex); -+ break; -+ case MGN_MCS5: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte1, PowerIndex); -+ break; -+ case MGN_MCS6: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte2, PowerIndex); -+ break; -+ case MGN_MCS7: -+ phy_set_bb_reg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte3, PowerIndex); -+ break; -+ -+ default: -+ RTW_INFO("Invalid Rate!!\n"); -+ break; -+ } -+ } -+} -+ -+void -+PHY_SetTxPowerLevel8703B( -+ PADAPTER Adapter, -+ u8 Channel -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ u8 cur_antenna; -+ enum rf_path RFPath = RF_PATH_A; -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ rtw_hal_get_odm_var(Adapter, HAL_ODM_ANTDIV_SELECT, &cur_antenna, NULL); -+ -+ if (pHalData->AntDivCfg) /* antenna diversity Enable */ -+ RFPath = ((cur_antenna == MAIN_ANT) ? RF_PATH_A : RF_PATH_B); -+ else /* antenna diversity disable */ -+#endif -+ RFPath = pHalData->ant_path; -+ -+ -+ -+ phy_set_tx_power_level_by_path(Adapter, Channel, RFPath); -+ -+} -+ -+/* <20130321, VincentLan> A workaround to eliminate the 2440MHz & 2480MHz spur of 8703B. (Asked by Rock.) */ -+void -+phy_SpurCalibration_8703B( -+ PADAPTER pAdapter, -+ u8 ToChannel, -+ u8 threshold -+) -+{ -+ u32 freq[6] = {0xFCCD, 0xFC4D, 0xFFCD, 0xFF4D, 0xFCCD, 0xFF9A}; /* {chnl 5, 6, 7, 8, 13, 14} */ -+ u8 idx = 0; -+ u8 b_doNotch = FALSE; -+ u8 initial_gain; -+ BOOLEAN bHW_Ctrl = FALSE, bSW_Ctrl = FALSE, bHW_Ctrl_S1 = FALSE, bSW_Ctrl_S1 = FALSE; -+ u32 reg948; -+ -+ /* add for notch */ -+ u32 wlan_channel, CurrentChannel, Is40MHz; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ /* PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); */ -+ struct dm_struct *pDM_Odm = &(pHalData->odmpriv); -+ /* struct dm_struct *pDM_Odm = &pHalData->DM_OutSrc; */ -+ -+ /* check threshold */ -+ if (threshold <= 0x0) -+ threshold = 0x16; -+ -+ RTW_INFO("===>phy_SpurCalibration_8703B: Channel = %d\n", ToChannel); -+ -+ if (ToChannel == 5) -+ idx = 0; -+ else if (ToChannel == 6) -+ idx = 1; -+ else if (ToChannel == 7) -+ idx = 2; -+ else if (ToChannel == 8) -+ idx = 3; -+ else if (ToChannel == 13) -+ idx = 4; -+ else if (ToChannel == 14) -+ idx = 5; -+ else -+ idx = 10; -+ -+ reg948 = phy_query_bb_reg(pAdapter, rS0S1_PathSwitch, bMaskDWord); -+ if ((reg948 & BIT6) == 0x0) -+ bSW_Ctrl = TRUE; -+ else -+ bHW_Ctrl = TRUE; -+ -+ if (bHW_Ctrl) -+ bHW_Ctrl_S1 = (phy_query_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5 | BIT4 | BIT3) == 0x1) ? TRUE : FALSE; -+ else if (bSW_Ctrl) -+ bSW_Ctrl_S1 = ((reg948 & BIT9) == 0x0) ? TRUE : FALSE; -+ -+ /* If wlan at S1 (both HW control & SW control) and current channel=5,6,7,8,13,14 */ -+ if ((bHW_Ctrl_S1 || bSW_Ctrl_S1) && (idx <= 5)) { -+ initial_gain = (u8)(odm_get_bb_reg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0) & 0x7f); -+ odm_write_dig(pDM_Odm, 0x30); -+ phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, bMaskDWord, 0xccf000c0); /* disable 3-wire */ -+ -+ phy_set_bb_reg(pAdapter, rFPGA0_PSDFunction, bMaskDWord, freq[idx]); /* Setup PSD */ -+ phy_set_bb_reg(pAdapter, rFPGA0_PSDFunction, bMaskDWord, 0x400000 | freq[idx]); /* Start PSD */ -+ -+ rtw_msleep_os(30); -+ -+ if (phy_query_bb_reg(pAdapter, rFPGA0_PSDReport, bMaskDWord) >= threshold) -+ b_doNotch = TRUE; -+ -+ phy_set_bb_reg(pAdapter, rFPGA0_PSDFunction, bMaskDWord, freq[idx]); /* turn off PSD */ -+ phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, bMaskDWord, 0xccc000c0); /* enable 3-wire */ -+ odm_write_dig(pDM_Odm, initial_gain); -+ } -+ -+ /* --- Notch Filter --- Asked by Rock */ -+ if (b_doNotch) { -+ CurrentChannel = odm_get_rf_reg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); -+ wlan_channel = CurrentChannel & 0x0f; /* Get center frequency */ -+ -+ switch (wlan_channel) { /* Set notch filter */ -+ case 5: -+ case 13: -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT28 | BIT27 | BIT26 | BIT25 | BIT24, 0xB); -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ -+ odm_set_bb_reg(pDM_Odm, 0xD40, bMaskDWord, 0x06000000); -+ odm_set_bb_reg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD4C, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD2C, BIT28, 0x1); /* enable CSI mask */ -+ break; -+ case 6: -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT28 | BIT27 | BIT26 | BIT25 | BIT24, 0x4); -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ -+ odm_set_bb_reg(pDM_Odm, 0xD40, bMaskDWord, 0x00000600); -+ odm_set_bb_reg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD4C, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD2C, BIT28, 0x1); /* enable CSI mask */ -+ break; -+ case 7: -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT28 | BIT27 | BIT26 | BIT25 | BIT24, 0x3); -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ -+ odm_set_bb_reg(pDM_Odm, 0xD40, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD4C, bMaskDWord, 0x06000000); -+ odm_set_bb_reg(pDM_Odm, 0xD2C, BIT28, 0x1); /* enable CSI mask */ -+ break; -+ case 8: -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT28 | BIT27 | BIT26 | BIT25 | BIT24, 0xA); -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ -+ odm_set_bb_reg(pDM_Odm, 0xD40, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD4C, bMaskDWord, 0x00000380); -+ odm_set_bb_reg(pDM_Odm, 0xD2C, BIT28, 0x1); /* enable CSI mask */ -+ break; -+ case 14: -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT28 | BIT27 | BIT26 | BIT25 | BIT24, 0x5); -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ -+ odm_set_bb_reg(pDM_Odm, 0xD40, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD44, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD48, bMaskDWord, 0x00000000); -+ odm_set_bb_reg(pDM_Odm, 0xD4C, bMaskDWord, 0x00180000); -+ odm_set_bb_reg(pDM_Odm, 0xD2C, BIT28, 0x1); /* enable CSI mask */ -+ break; -+ default: -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /* disable notch filter */ -+ odm_set_bb_reg(pDM_Odm, 0xD2C, BIT28, 0x0); /* disable CSI mask function */ -+ break; -+ } /* switch(wlan_channel) */ -+ return; -+ } -+ -+ odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /* disable notch filter */ -+ odm_set_bb_reg(pDM_Odm, 0xD2C, BIT28, 0x0); /* disable CSI mask */ -+ -+} -+ -+void -+phy_SetRegBW_8703B( -+ PADAPTER Adapter, -+ enum channel_width CurrentBW -+) -+{ -+ u16 RegRfMod_BW, u2tmp = 0; -+ RegRfMod_BW = rtw_read16(Adapter, REG_TRXPTCL_CTL_8703B); -+ -+ switch (CurrentBW) { -+ case CHANNEL_WIDTH_20: -+ rtw_write16(Adapter, REG_TRXPTCL_CTL_8703B, (RegRfMod_BW & 0xFE7F)); /* BIT 7 = 0, BIT 8 = 0 */ -+ break; -+ -+ case CHANNEL_WIDTH_40: -+ u2tmp = RegRfMod_BW | BIT7; -+ rtw_write16(Adapter, REG_TRXPTCL_CTL_8703B, (u2tmp & 0xFEFF)); /* BIT 7 = 1, BIT 8 = 0 */ -+ break; -+ -+ case CHANNEL_WIDTH_80: -+ u2tmp = RegRfMod_BW | BIT8; -+ rtw_write16(Adapter, REG_TRXPTCL_CTL_8703B, (u2tmp & 0xFF7F)); /* BIT 7 = 0, BIT 8 = 1 */ -+ break; -+ -+ default: -+ RTW_INFO("phy_PostSetBWMode8703B(): unknown Bandwidth: %#X\n", CurrentBW); -+ break; -+ } -+} -+ -+u8 -+phy_GetSecondaryChnl_8703B( -+ PADAPTER Adapter -+) -+{ -+ u8 SCSettingOf40 = 0, SCSettingOf20 = 0; -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ -+ if (pHalData->current_channel_bw == CHANNEL_WIDTH_80) { -+ if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) -+ SCSettingOf40 = VHT_DATA_SC_40_LOWER_OF_80MHZ; -+ else if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) -+ SCSettingOf40 = VHT_DATA_SC_40_UPPER_OF_80MHZ; -+ -+ -+ if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) -+ SCSettingOf20 = VHT_DATA_SC_20_LOWEST_OF_80MHZ; -+ else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) -+ SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; -+ else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) -+ SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; -+ else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) -+ SCSettingOf20 = VHT_DATA_SC_20_UPPERST_OF_80MHZ; -+ -+ } else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40) { -+ -+ if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) -+ SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; -+ else if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) -+ SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; -+ -+ } -+ -+ return (SCSettingOf40 << 4) | SCSettingOf20; -+} -+ -+void -+phy_PostSetBwMode8703B( -+ PADAPTER Adapter -+) -+{ -+ u8 SubChnlNum = 0; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u8 u1TmpVal = 0; -+ -+ /* 3 Set Reg668 Reg440 BW */ -+ phy_SetRegBW_8703B(Adapter, pHalData->current_channel_bw); -+ -+ /* 3 Set Reg483 */ -+ SubChnlNum = phy_GetSecondaryChnl_8703B(Adapter); -+ rtw_write8(Adapter, REG_DATA_SC_8703B, SubChnlNum); -+ -+ /* 3 */ -+ /* 3 */ /* <2>Set PHY related register */ -+ /* 3 */ -+ switch (pHalData->current_channel_bw) { -+ /* 20 MHz channel*/ -+ case CHANNEL_WIDTH_20: -+ phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); -+ -+ phy_set_bb_reg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); -+ -+ /* phy_set_bb_reg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); */ -+ -+ phy_set_bb_reg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT31 | BIT30), 0x0); -+ -+ /* 8703B new Add */ -+ phy_set_bb_reg(Adapter, pHalData->RegForRecover[2].offset, bMaskDWord, pHalData->RegForRecover[2].value); -+ phy_set_bb_reg(Adapter, pHalData->RegForRecover[3].offset, bMaskDWord, pHalData->RegForRecover[3].value); -+ phy_set_rf_reg(Adapter, RF_PATH_A, pHalData->RegForRecover[4].offset, bRFRegOffsetMask, pHalData->RegForRecover[4].value); -+ -+ break; -+ -+ -+ /* 40 MHz channel*/ -+ case CHANNEL_WIDTH_40: -+ phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); -+ -+ phy_set_bb_reg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); -+ -+ /* 8703B new Add*/ -+ phy_set_bb_reg(Adapter, rBBrx_DFIR, bMaskDWord, 0x40100000); -+ phy_set_bb_reg(Adapter, rOFDM0_XATxAFE, bMaskDWord, 0x51F60000); -+ phy_set_rf_reg(Adapter, RF_PATH_A, 0x1E, bRFRegOffsetMask, 0x00C4C); -+ -+ /* Set Control channel to upper or lower. These settings are required only for 40MHz*/ -+ phy_set_bb_reg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC >> 1)); -+ -+ phy_set_bb_reg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); -+ -+ phy_set_bb_reg(Adapter, 0x818, (BIT26 | BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); -+ -+ u1TmpVal = rtw_read8(Adapter, REG_DATA_SC_8703B); -+ u1TmpVal &= 0xF0; -+ u1TmpVal |= ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); -+ rtw_write8(Adapter, REG_DATA_SC_8703B, u1TmpVal); -+ -+ break; -+ -+ -+ -+ default: -+ break; -+ -+ } -+ -+ /* 3<3>Set RF related register */ -+ PHY_RF6052SetBandwidth8703B(Adapter, pHalData->current_channel_bw); -+} -+ -+void -+phy_SwChnl8703B( -+ PADAPTER pAdapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); -+ u8 channelToSW = pHalData->current_channel; -+ u8 i = 0; -+ -+ if (pHalData->rf_chip == RF_PSEUDO_11N) { -+ RTW_INFO("phy_SwChnl8703B: return for PSEUDO\n"); -+ return; -+ } -+ -+ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff00) | channelToSW); -+ phy_set_rf_reg(pAdapter, RF_PATH_A, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]); -+ phy_set_rf_reg(pAdapter, RF_PATH_B, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]); -+ -+ /* BB Setting for some channels (requested by BB Neil) */ -+ switch (channelToSW) { -+ case 14: -+ /*Channel 14 in CCK, need to set 0xA26~0xA29 to 0 */ -+ phy_set_bb_reg(pAdapter, rCCK0_TxFilter2, bMaskHWord, 0); -+ phy_set_bb_reg(pAdapter, rCCK0_DebugPort, bMaskLWord, 0); -+ break; -+ default: -+ /*Normal setting for 8703B, just recover to the default setting. */ -+ /*This hardcore values refer to the parameter which BB team gave. */ -+ for (i = 0 ; i < 2 ; ++i) -+ phy_set_bb_reg(pAdapter, pHalData->RegForRecover[i].offset, bMaskDWord, pHalData->RegForRecover[i].value); -+ } -+ -+ phy_SpurCalibration_8703B(pAdapter, channelToSW, 0x16); -+ -+ RTW_INFO("===>phy_SwChnl8703B: Channel = %d\n", channelToSW); -+} -+ -+void -+phy_SwChnlAndSetBwMode8703B( -+ PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ if (Adapter->bNotifyChannelChange) { -+ RTW_INFO("[%s] bSwChnl=%d, ch=%d, bSetChnlBW=%d, bw=%d\n", -+ __FUNCTION__, -+ pHalData->bSwChnl, -+ pHalData->current_channel, -+ pHalData->bSetChnlBW, -+ pHalData->current_channel_bw); -+ } -+ -+ if (RTW_CANNOT_RUN(Adapter)) -+ return; -+ -+ if (pHalData->bSwChnl) { -+ phy_SwChnl8703B(Adapter); -+ pHalData->bSwChnl = _FALSE; -+ } -+ -+ if (pHalData->bSetChnlBW) { -+ phy_PostSetBwMode8703B(Adapter); -+ pHalData->bSetChnlBW = _FALSE; -+ } -+ -+ if (pHalData->bNeedIQK == _TRUE) { -+ if (pHalData->neediqk_24g == _TRUE) { -+ -+ halrf_iqk_trigger(&pHalData->odmpriv, _FALSE); -+ pHalData->bIQKInitialized = _TRUE; -+ pHalData->neediqk_24g = _FALSE; -+ } -+ pHalData->bNeedIQK = _FALSE; -+ } -+ -+ rtw_hal_set_tx_power_level(Adapter, pHalData->current_channel); -+} -+ -+void -+PHY_HandleSwChnlAndSetBW8703B( -+ PADAPTER Adapter, -+ BOOLEAN bSwitchChannel, -+ BOOLEAN bSetBandWidth, -+ u8 ChannelNum, -+ enum channel_width ChnlWidth, -+ EXTCHNL_OFFSET ExtChnlOffsetOf40MHz, -+ EXTCHNL_OFFSET ExtChnlOffsetOf80MHz, -+ u8 CenterFrequencyIndex1 -+) -+{ -+ /* static BOOLEAN bInitialzed = _FALSE; */ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ u8 tmpChannel = pHalData->current_channel; -+ enum channel_width tmpBW = pHalData->current_channel_bw; -+ u8 tmpnCur40MhzPrimeSC = pHalData->nCur40MhzPrimeSC; -+ u8 tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC; -+ u8 tmpCenterFrequencyIndex1 = pHalData->CurrentCenterFrequencyIndex1; -+ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; -+ -+ /* RTW_INFO("=> PHY_HandleSwChnlAndSetBW8812: bSwitchChannel %d, bSetBandWidth %d\n",bSwitchChannel,bSetBandWidth); */ -+ -+ /* check is swchnl or setbw */ -+ if (!bSwitchChannel && !bSetBandWidth) { -+ RTW_INFO("PHY_HandleSwChnlAndSetBW8812: not switch channel and not set bandwidth\n"); -+ return; -+ } -+ -+ /* skip change for channel or bandwidth is the same */ -+ if (bSwitchChannel) { -+ /* if(pHalData->current_channel != ChannelNum) */ -+ { -+ if (HAL_IsLegalChannel(Adapter, ChannelNum)) -+ pHalData->bSwChnl = _TRUE; -+ } -+ } -+ -+ if (bSetBandWidth) { -+#if 0 -+ if (bInitialzed == _FALSE) { -+ bInitialzed = _TRUE; -+ pHalData->bSetChnlBW = _TRUE; -+ } else if ((pHalData->current_channel_bw != ChnlWidth) || (pHalData->nCur40MhzPrimeSC != ExtChnlOffsetOf40MHz) || (pHalData->CurrentCenterFrequencyIndex1 != CenterFrequencyIndex1)) -+ pHalData->bSetChnlBW = _TRUE; -+#else -+ pHalData->bSetChnlBW = _TRUE; -+#endif -+ } -+ -+ if (!pHalData->bSetChnlBW && !pHalData->bSwChnl) { -+ /* RTW_INFO("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d\n",pHalData->bSwChnl,pHalData->bSetChnlBW); */ -+ return; -+ } -+ -+ -+ if (pHalData->bSwChnl) { -+ pHalData->current_channel = ChannelNum; -+ pHalData->CurrentCenterFrequencyIndex1 = ChannelNum; -+ } -+ -+ -+ if (pHalData->bSetChnlBW) { -+ pHalData->current_channel_bw = ChnlWidth; -+#if 0 -+ if (ExtChnlOffsetOf40MHz == EXTCHNL_OFFSET_LOWER) -+ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; -+ else if (ExtChnlOffsetOf40MHz == EXTCHNL_OFFSET_UPPER) -+ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; -+ else -+ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ -+ if (ExtChnlOffsetOf80MHz == EXTCHNL_OFFSET_LOWER) -+ pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; -+ else if (ExtChnlOffsetOf80MHz == EXTCHNL_OFFSET_UPPER) -+ pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; -+ else -+ pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+#else -+ pHalData->nCur40MhzPrimeSC = ExtChnlOffsetOf40MHz; -+ pHalData->nCur80MhzPrimeSC = ExtChnlOffsetOf80MHz; -+#endif -+ -+ pHalData->CurrentCenterFrequencyIndex1 = CenterFrequencyIndex1; -+ } -+ -+ /* Switch workitem or set timer to do switch channel or setbandwidth operation */ -+ if (!RTW_CANNOT_RUN(Adapter)) -+ phy_SwChnlAndSetBwMode8703B(Adapter); -+ else { -+ if (pHalData->bSwChnl) { -+ pHalData->current_channel = tmpChannel; -+ pHalData->CurrentCenterFrequencyIndex1 = tmpChannel; -+ } -+ if (pHalData->bSetChnlBW) { -+ pHalData->current_channel_bw = tmpBW; -+ pHalData->nCur40MhzPrimeSC = tmpnCur40MhzPrimeSC; -+ pHalData->nCur80MhzPrimeSC = tmpnCur80MhzPrimeSC; -+ pHalData->CurrentCenterFrequencyIndex1 = tmpCenterFrequencyIndex1; -+ } -+ } -+ -+ /* RTW_INFO("Channel %d ChannelBW %d ",pHalData->current_channel, pHalData->current_channel_bw); */ -+ /* RTW_INFO("40MhzPrimeSC %d 80MhzPrimeSC %d ",pHalData->nCur40MhzPrimeSC, pHalData->nCur80MhzPrimeSC); */ -+ /* RTW_INFO("CenterFrequencyIndex1 %d\n",pHalData->CurrentCenterFrequencyIndex1); */ -+ -+ /* RTW_INFO("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d\n",pHalData->bSwChnl,pHalData->bSetChnlBW); */ -+ -+} -+ -+void -+PHY_SetSwChnlBWMode8703B( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+) -+{ -+ /* RTW_INFO("%s()===>\n",__FUNCTION__); */ -+ -+ PHY_HandleSwChnlAndSetBW8703B(Adapter, _TRUE, _TRUE, channel, Bandwidth, Offset40, Offset80, channel); -+ -+ /* RTW_INFO("<==%s()\n",__FUNCTION__); */ -+} -\ No newline at end of file -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_rf6052.c b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_rf6052.c -new file mode 100644 -index 000000000000..198589f52891 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_rf6052.c -@@ -0,0 +1,232 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/****************************************************************************** -+ * -+ * -+ * Module: rtl8192c_rf6052.c ( Source C File) -+ * -+ * Note: Provide RF 6052 series relative API. -+ * -+ * Function: -+ * -+ * Export: -+ * -+ * Abbrev: -+ * -+ * History: -+ * Data Who Remark -+ * -+ * 09/25/2008 MHC Create initial version. -+ * 11/05/2008 MHC Add API for tw power setting. -+ * -+ * -+******************************************************************************/ -+ -+#include -+ -+/*---------------------------Define Local Constant---------------------------*/ -+/*---------------------------Define Local Constant---------------------------*/ -+ -+ -+/*------------------------Define global variable-----------------------------*/ -+/*------------------------Define global variable-----------------------------*/ -+ -+ -+/*------------------------Define local variable------------------------------*/ -+#ifdef CONFIG_RF_SHADOW_RW -+/* 2008/11/20 MH For Debug only, RF -+ * static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; */ -+static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; -+#endif -+/*------------------------Define local variable------------------------------*/ -+ -+/*----------------------------------------------------------------------------- -+ * Function: PHY_RF6052SetBandwidth() -+ * -+ * Overview: This function is called by SetBWModeCallback8190Pci() only -+ * -+ * Input: PADAPTER Adapter -+ * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M -+ * -+ * Output: NONE -+ * -+ * Return: NONE -+ * -+ * Note: For RF type 0222D -+ *---------------------------------------------------------------------------*/ -+void -+PHY_RF6052SetBandwidth8703B( -+ PADAPTER Adapter, -+ enum channel_width Bandwidth) /* 20M or 40M */ -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ switch (Bandwidth) { -+ case CHANNEL_WIDTH_20: -+ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11); -+ phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); -+ phy_set_rf_reg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); -+ break; -+ -+ case CHANNEL_WIDTH_40: -+ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10); -+ phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); -+ phy_set_rf_reg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); -+ break; -+ -+ default: -+ break; -+ } -+ -+} -+ -+static int -+phy_RF6052_Config_ParaFile( -+ PADAPTER Adapter -+) -+{ -+ u32 u4RegValue = 0; -+ enum rf_path eRFPath; -+ BB_REGISTER_DEFINITION_T *pPhyReg; -+ -+ int rtStatus = _SUCCESS; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); -+ -+ /* 3 */ /* ----------------------------------------------------------------- */ -+ /* 3 */ /* <2> Initialize RF */ -+ /* 3 */ /* ----------------------------------------------------------------- */ -+ for (eRFPath = RF_PATH_A; eRFPath < hal_spec->rf_reg_path_num; eRFPath++) { -+ -+ pPhyReg = &pHalData->PHYRegDef[eRFPath]; -+ -+ /*----Store original RFENV control type----*/ -+ switch (eRFPath) { -+ case RF_PATH_A: -+ case RF_PATH_C: -+ u4RegValue = phy_query_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); -+ break; -+ case RF_PATH_B: -+ case RF_PATH_D: -+ u4RegValue = phy_query_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16); -+ break; -+ default: -+ RTW_ERR("Invalid rf_path:%d\n", eRFPath); -+ break; -+ } -+ -+ /*----Set RF_ENV enable----*/ -+ phy_set_bb_reg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); -+ rtw_udelay_os(1);/* PlatformStallExecution(1); */ -+ -+ /*----Set RF_ENV output high----*/ -+ phy_set_bb_reg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); -+ rtw_udelay_os(1);/* PlatformStallExecution(1); */ -+ -+ /* Set bit number of Address and Data for RF register */ -+ phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */ -+ rtw_udelay_os(1);/* PlatformStallExecution(1); */ -+ -+ phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */ -+ rtw_udelay_os(1);/* PlatformStallExecution(1); */ -+ -+ /*----Initialize RF fom connfiguration file----*/ -+ switch (eRFPath) { -+ case RF_PATH_A: -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ if (PHY_ConfigRFWithParaFile(Adapter, PHY_FILE_RADIO_A, eRFPath) == _FAIL) -+#endif -+ { -+#ifdef CONFIG_EMBEDDED_FWIMG -+ if (odm_config_rf_with_header_file(&pHalData->odmpriv, CONFIG_RF_RADIO, eRFPath) == HAL_STATUS_FAILURE) -+ rtStatus = _FAIL; -+#endif -+ } -+ break; -+ case RF_PATH_B: -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ if (PHY_ConfigRFWithParaFile(Adapter, PHY_FILE_RADIO_B, eRFPath) == _FAIL) -+#endif -+ { -+#ifdef CONFIG_EMBEDDED_FWIMG -+ if (odm_config_rf_with_header_file(&pHalData->odmpriv, CONFIG_RF_RADIO, eRFPath) == HAL_STATUS_FAILURE) -+ rtStatus = _FAIL; -+#endif -+ } -+ break; -+ case RF_PATH_C: -+ break; -+ case RF_PATH_D: -+ break; -+ default: -+ RTW_ERR("Invalid rf_path:%d\n", eRFPath); -+ break; -+ } -+ -+ /*----Restore RFENV control type----*/; -+ switch (eRFPath) { -+ case RF_PATH_A: -+ case RF_PATH_C: -+ phy_set_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); -+ break; -+ case RF_PATH_B: -+ case RF_PATH_D: -+ phy_set_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue); -+ break; -+ default: -+ RTW_ERR("Invalid rf_path:%d\n", eRFPath); -+ break; -+ } -+ -+ if (rtStatus != _SUCCESS) { -+ goto phy_RF6052_Config_ParaFile_Fail; -+ } -+ -+ } -+ -+ /* 3 ----------------------------------------------------------------- */ -+ /* 3 Configuration of Tx Power Tracking */ -+ /* 3 ----------------------------------------------------------------- */ -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, PHY_FILE_TXPWR_TRACK) == _FAIL) -+#endif -+ { -+#ifdef CONFIG_EMBEDDED_FWIMG -+ odm_config_rf_with_tx_pwr_track_header_file(&pHalData->odmpriv); -+#endif -+ } -+ -+ return rtStatus; -+ -+phy_RF6052_Config_ParaFile_Fail: -+ return rtStatus; -+} -+ -+ -+int -+PHY_RF6052_Config8703B( -+ PADAPTER Adapter) -+{ -+ int rtStatus = _SUCCESS; -+ -+ /* */ -+ /* Config BB and RF */ -+ /* */ -+ rtStatus = phy_RF6052_Config_ParaFile(Adapter); -+ return rtStatus; -+} -+ -+/* End of HalRf6052.c */ -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_rxdesc.c b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_rxdesc.c -new file mode 100644 -index 000000000000..a8c4c58820bf ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_rxdesc.c -@@ -0,0 +1,63 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTL8703B_REDESC_C_ -+ -+#include -+ -+void rtl8703b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc) -+{ -+ struct rx_pkt_attrib *pattrib; -+ -+ -+ pattrib = &precvframe->u.hdr.attrib; -+ _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); -+ -+ pattrib->pkt_len = (u16)GET_RX_STATUS_DESC_PKT_LEN_8703B(pdesc); -+ pattrib->pkt_rpt_type = GET_RX_STATUS_DESC_RPT_SEL_8703B(pdesc) ? C2H_PACKET : NORMAL_RX; -+ -+ if (pattrib->pkt_rpt_type == NORMAL_RX) { -+ /* Offset 0 */ -+ pattrib->crc_err = (u8)GET_RX_STATUS_DESC_CRC32_8703B(pdesc); -+ pattrib->icv_err = (u8)GET_RX_STATUS_DESC_ICV_8703B(pdesc); -+ pattrib->drvinfo_sz = (u8)GET_RX_STATUS_DESC_DRVINFO_SIZE_8703B(pdesc) << 3; -+ pattrib->encrypt = (u8)GET_RX_STATUS_DESC_SECURITY_8703B(pdesc); -+ pattrib->qos = (u8)GET_RX_STATUS_DESC_QOS_8703B(pdesc); -+ pattrib->shift_sz = (u8)GET_RX_STATUS_DESC_SHIFT_8703B(pdesc); -+ pattrib->physt = (u8)GET_RX_STATUS_DESC_PHY_STATUS_8703B(pdesc); -+ pattrib->bdecrypted = (u8)GET_RX_STATUS_DESC_SWDEC_8703B(pdesc) ? 0 : 1; -+ -+ /* Offset 4 */ -+ pattrib->priority = (u8)GET_RX_STATUS_DESC_TID_8703B(pdesc); -+ pattrib->amsdu = (u8)GET_RX_STATUS_DESC_AMSDU_8703B(pdesc); -+ pattrib->mdata = (u8)GET_RX_STATUS_DESC_MORE_DATA_8703B(pdesc); -+ pattrib->mfrag = (u8)GET_RX_STATUS_DESC_MORE_FRAG_8703B(pdesc); -+ -+ /* Offset 8 */ -+ pattrib->seq_num = (u16)GET_RX_STATUS_DESC_SEQ_8703B(pdesc); -+ pattrib->frag_num = (u8)GET_RX_STATUS_DESC_FRAG_8703B(pdesc); -+ -+ /* Offset 12 */ -+ pattrib->data_rate = (u8)GET_RX_STATUS_DESC_RX_RATE_8703B(pdesc); -+ -+ /* Offset 16 */ -+ pattrib->sgi = (u8)GET_RX_STATUS_DESC_SPLCP_8703B(pdesc); -+ pattrib->ldpc = (u8)GET_RX_STATUS_DESC_LDPC_8703B(pdesc); -+ pattrib->stbc = (u8)GET_RX_STATUS_DESC_STBC_8703B(pdesc); -+ pattrib->bw = (u8)GET_RX_STATUS_DESC_BW_8703B(pdesc); -+ -+ /* Offset 20 */ -+ /* pattrib->tsfl=(u8)GET_RX_STATUS_DESC_TSFL_8703B(pdesc); */ -+ } -+} -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_sreset.c b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_sreset.c -new file mode 100644 -index 000000000000..4a7ab4c83b15 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/rtl8703b_sreset.c -@@ -0,0 +1,100 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTL8703B_SRESET_C_ -+ -+#include -+ -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+void rtl8703b_sreset_xmit_status_check(_adapter *padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ -+ systime current_time; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ unsigned int diff_time; -+ u32 txdma_status; -+ -+ txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS); -+ if (txdma_status != 0x00 && txdma_status != 0xeaeaeaea) { -+ RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); -+ rtw_hal_sreset_reset(padapter); -+ } -+ -+#ifdef CONFIG_USB_HCI -+ /* total xmit irp = 4 */ -+ /* RTW_INFO("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); */ -+ /* if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) */ -+ current_time = rtw_get_current_time(); -+ -+ if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { -+ -+ diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); -+ -+ if (diff_time > 2000) { -+ if (psrtpriv->last_tx_complete_time == 0) -+ psrtpriv->last_tx_complete_time = current_time; -+ else { -+ diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); -+ if (diff_time > 4000) { -+ -+ /* padapter->Wifi_Error_Status = WIFI_TX_HANG; */ -+ RTW_INFO("%s tx hang %s\n", __FUNCTION__, -+ (rtw_odm_adaptivity_needed(padapter)) ? "ODM_BB_ADAPTIVITY" : ""); -+ -+ if (!rtw_odm_adaptivity_needed(padapter)) -+ rtw_hal_sreset_reset(padapter); -+ } -+ } -+ } -+ } -+#endif /* #ifdef CONFIG_USB_HCI */ -+ -+ if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { -+ psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; -+ rtw_hal_sreset_reset(padapter); -+ return; -+ } -+} -+ -+void rtl8703b_sreset_linked_status_check(_adapter *padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+#if 0 -+ u32 regc50, regc58, reg824, reg800; -+ regc50 = rtw_read32(padapter, 0xc50); -+ regc58 = rtw_read32(padapter, 0xc58); -+ reg824 = rtw_read32(padapter, 0x824); -+ reg800 = rtw_read32(padapter, 0x800); -+ if (((regc50 & 0xFFFFFF00) != 0x69543400) || -+ ((regc58 & 0xFFFFFF00) != 0x69543400) || -+ (((reg824 & 0xFFFFFF00) != 0x00390000) && (((reg824 & 0xFFFFFF00) != 0x80390000))) || -+ (((reg800 & 0xFFFFFF00) != 0x03040000) && ((reg800 & 0xFFFFFF00) != 0x83040000))) { -+ RTW_INFO("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, -+ regc50, regc58, reg824, reg800); -+ rtw_hal_sreset_reset(padapter); -+ } -+#endif -+ -+ if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { -+ psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; -+ rtw_hal_sreset_reset(padapter); -+ return; -+ } -+} -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/rtl8703bs_led.c b/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/rtl8703bs_led.c -new file mode 100644 -index 000000000000..f6047ef79952 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/rtl8703bs_led.c -@@ -0,0 +1,123 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTL8703BS_LED_C_ -+ -+#include "rtl8703b_hal.h" -+#ifdef CONFIG_RTW_SW_LED -+ -+/* ******************************************************************************** -+ * LED object. -+ * ******************************************************************************** */ -+ -+ -+/* ******************************************************************************** -+ * Prototype of protected function. -+ * ******************************************************************************** */ -+ -+/* ******************************************************************************** -+ * LED_819xUsb routines. -+ * ******************************************************************************** */ -+ -+/* -+ * Description: -+ * Turn on LED according to LedPin specified. -+ * */ -+void -+SwLedOn_8703BS( -+ _adapter *padapter, -+ PLED_SDIO pLed -+) -+{ -+ u8 LedCfg; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ return; -+ -+ pLed->bLedOn = _TRUE; -+ -+} -+ -+ -+/* -+ * Description: -+ * Turn off LED according to LedPin specified. -+ * */ -+void -+SwLedOff_8703BS( -+ _adapter *padapter, -+ PLED_SDIO pLed -+) -+{ -+ u8 LedCfg; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ goto exit; -+ -+exit: -+ pLed->bLedOn = _FALSE; -+ -+} -+ -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+ -+/* ******************************************************************************** -+ * Default LED behavior. -+ * ******************************************************************************** */ -+ -+/* -+ * Description: -+ * Initialize all LED_871x objects. -+ * */ -+void -+rtl8703bs_InitSwLeds( -+ _adapter *padapter -+) -+{ -+#if 0 -+ struct led_priv *pledpriv = adapter_to_led(padapter); -+ -+ pledpriv->LedControlHandler = LedControlSDIO; -+ -+ pledpriv->SwLedOn = SwLedOn_8703BS; -+ pledpriv->SwLedOff = SwLedOff_8703BS; -+ -+ InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); -+ -+ InitLed871x(padapter, &(pledpriv->SwLed1), LED_PIN_LED1); -+#endif -+} -+ -+ -+/* -+ * Description: -+ * DeInitialize all LED_819xUsb objects. -+ * */ -+void -+rtl8703bs_DeInitSwLeds( -+ _adapter *padapter -+) -+{ -+#if 0 -+ struct led_priv *ledpriv = adapter_to_led(padapter); -+ -+ DeInitLed871x(&(ledpriv->SwLed0)); -+ DeInitLed871x(&(ledpriv->SwLed1)); -+#endif -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/rtl8703bs_recv.c b/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/rtl8703bs_recv.c -new file mode 100644 -index 000000000000..54ed0cfb1d1e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/rtl8703bs_recv.c -@@ -0,0 +1,476 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTL8703BS_RECV_C_ -+ -+#include -+ -+#ifdef CONFIG_SDIO_RX_COPY -+s32 rtl8703bs_recv_hdl(_adapter *padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ struct recv_priv *precvpriv; -+ struct recv_buf *precvbuf; -+ union recv_frame *precvframe; -+ struct recv_frame_hdr *phdr; -+ struct rx_pkt_attrib *pattrib; -+ u8 *ptr; -+ u32 pkt_len, pkt_offset; -+ u8 rx_report_sz = 0; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ precvpriv = &padapter->recvpriv; -+ -+ do { -+ precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue); -+ if (NULL == precvbuf) -+ break; -+ -+ ptr = precvbuf->pdata; -+ -+ while (ptr < precvbuf->ptail) { -+ precvframe = rtw_alloc_recvframe(&precvpriv->free_recv_queue); -+ if (precvframe == NULL) { -+ RTW_INFO("%s: no enough recv frame!\n", __FUNCTION__); -+ rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); -+ -+ return RTW_RFRAME_UNAVAIL; -+ } -+ -+ /* rx desc parsing */ -+ rtl8703b_query_rx_desc_status(precvframe, ptr); -+ -+ pattrib = &precvframe->u.hdr.attrib; -+ -+ /* fix Hardware RX data error, drop whole recv_buffer */ -+ if (!rtw_hal_rcr_check(padapter, RCR_ACRC32) && pattrib->crc_err) { -+#if !(MP_DRIVER == 1) -+ RTW_INFO("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); -+#endif -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ break; -+ } -+ -+ rx_report_sz = RXDESC_SIZE + pattrib->drvinfo_sz; -+ pkt_offset = rx_report_sz + pattrib->shift_sz + pattrib->pkt_len; -+ -+ if ((ptr + pkt_offset) > precvbuf->ptail) { -+ RTW_INFO("%s()-%d: : next pkt len(%p,%d) exceed ptail(%p)!\n", __FUNCTION__, __LINE__, ptr, pkt_offset, precvbuf->ptail); -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ break; -+ } -+ -+ if ((pattrib->crc_err) || (pattrib->icv_err)) { -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->registrypriv.mp_mode == 1) { -+ if ((check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _TRUE)) { /* &&(padapter->mppriv.check_mp_pkt == 0)) */ -+ if (pattrib->crc_err == 1) -+ padapter->mppriv.rx_crcerrpktcount++; -+ } -+ } else -+#endif -+ { -+ RTW_INFO("%s: crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); -+ } -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ } else { -+#ifdef CONFIG_RX_PACKET_APPEND_FCS -+ if (check_fwstate(&padapter->mlmepriv, WIFI_MONITOR_STATE) == _FALSE) -+ if ((pattrib->pkt_rpt_type == NORMAL_RX) && rtw_hal_rcr_check(padapter, RCR_APPFCS)) -+ pattrib->pkt_len -= IEEE80211_FCS_LEN; -+#endif -+ -+ if (rtw_os_alloc_recvframe(padapter, precvframe, -+ (ptr + rx_report_sz + pattrib->shift_sz), precvbuf->pskb) == _FAIL) { -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ break; -+ } -+ recvframe_put(precvframe, pattrib->pkt_len); -+ /* recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); */ -+ -+ /* move to drv info position */ -+ ptr += RXDESC_SIZE; -+ -+ /* update drv info */ -+ if (rtw_hal_rcr_check(padapter, RCR_APP_BA_SSN)) { -+ /* rtl8703s_update_bassn(padapter, pdrvinfo); */ -+ ptr += 4; -+ } -+ -+ if (pattrib->pkt_rpt_type == NORMAL_RX) { -+ /* skip the rx packet with abnormal length */ -+ if (pattrib->pkt_len < 14 || pattrib->pkt_len > 8192) { -+ RTW_INFO("skip abnormal rx packet(%d)\n", pattrib->pkt_len); -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ break; -+ } -+ -+ pre_recv_entry(precvframe, pattrib->physt ? ptr : NULL); -+ -+ } else { -+#ifdef CONFIG_FW_C2H_PKT -+ if (pattrib->pkt_rpt_type == C2H_PACKET) -+ rtw_hal_c2h_pkt_pre_hdl(padapter, precvframe->u.hdr.rx_data, pattrib->pkt_len); -+ else { -+ RTW_INFO("%s: [WARNNING] RX type(%d) not be handled!\n", -+ __FUNCTION__, pattrib->pkt_rpt_type); -+ } -+#endif -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ } -+ } -+ -+ pkt_offset = _RND8(pkt_offset); -+ precvbuf->pdata += pkt_offset; -+ ptr = precvbuf->pdata; -+ precvframe = NULL; -+ } -+ -+ rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); -+ } while (1); -+ -+#ifdef CONFIG_RTW_NAPI -+#ifdef CONFIG_RTW_NAPI_V2 -+ if (padapter->registrypriv.en_napi) { -+ struct dvobj_priv *d; -+ struct _ADAPTER *a; -+ u8 i; -+ -+ d = adapter_to_dvobj(padapter); -+ for (i = 0; i < d->iface_nums; i++) { -+ a = d->padapters[i]; -+ if (rtw_if_up(a) == _TRUE) -+ napi_schedule(&a->napi); -+ -+ } -+ } -+#endif /* CONFIG_RTW_NAPI_V2 */ -+#endif /* CONFIG_RTW_NAPI */ -+ -+ return _SUCCESS; -+ } -+ -+ static void rtl8703bs_recv_tasklet(void *priv) -+ { -+ _adapter *adapter = (_adapter *)priv; -+ s32 ret; -+ -+ ret = rtl8703bs_recv_hdl(adapter); -+ if (ret == RTW_RFRAME_UNAVAIL -+ || ret == RTW_RFRAME_PKT_UNAVAIL -+ ) { -+ /* schedule again and hope recvframe/packet is available next time. */ -+ #ifdef PLATFORM_LINUX -+ tasklet_schedule(&adapter->recvpriv.recv_tasklet); -+ #endif -+ } -+ } -+#else -+static void rtl8703bs_recv_tasklet(void *priv) -+{ -+ PADAPTER padapter; -+ PHAL_DATA_TYPE pHalData; -+ struct recv_priv *precvpriv; -+ struct recv_buf *precvbuf; -+ union recv_frame *precvframe; -+ struct recv_frame_hdr *phdr; -+ struct rx_pkt_attrib *pattrib; -+ u8 *ptr; -+ _pkt *ppkt; -+ u32 pkt_offset; -+ -+ padapter = (PADAPTER)priv; -+ pHalData = GET_HAL_DATA(padapter); -+ precvpriv = &padapter->recvpriv; -+ -+ do { -+ precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue); -+ if (NULL == precvbuf) -+ break; -+ -+ ptr = precvbuf->pdata; -+ -+ while (ptr < precvbuf->ptail) { -+ precvframe = rtw_alloc_recvframe(&precvpriv->free_recv_queue); -+ if (precvframe == NULL) { -+ rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); -+ -+ /* The case of can't allocte recvframe should be temporary, */ -+ /* schedule again and hope recvframe is available next time. */ -+#ifdef PLATFORM_LINUX -+ tasklet_schedule(&precvpriv->recv_tasklet); -+#endif -+ return; -+ } -+ -+ phdr = &precvframe->u.hdr; -+ pattrib = &phdr->attrib; -+ -+ rtl8703b_query_rx_desc_status(precvframe, ptr); -+ -+#if 0 -+ { -+ int i, len = 64; -+ u8 *pptr = ptr; -+ -+ if ((*(pptr + RXDESC_SIZE + pattrib->drvinfo_sz) != 0x80) && (*(pptr + RXDESC_SIZE + pattrib->drvinfo_sz) != 0x40)) { -+ RTW_INFO("##############RxDESC###############\n"); -+ for (i = 0; i < 32; i = i + 16) -+ RTW_INFO("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(pptr + i), -+ *(pptr + i + 1), *(pptr + i + 2) , *(pptr + i + 3) , *(pptr + i + 4), *(pptr + i + 5), *(pptr + i + 6), *(pptr + i + 7), *(pptr + i + 8), -+ *(pptr + i + 9), *(pptr + i + 10), -+ *(pptr + i + 11), *(pptr + i + 12), *(pptr + i + 13), *(pptr + i + 14), *(pptr + i + 15)); -+ -+ if (pattrib->pkt_len < 100) -+ len = pattrib->pkt_len; -+ pptr = ptr + RXDESC_SIZE + pattrib->drvinfo_sz; -+ RTW_INFO("##############Len=%d###############\n", pattrib->pkt_len); -+ for (i = 0; i < len; i = i + 16) -+ RTW_INFO("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(pptr + i), -+ *(pptr + i + 1), *(pptr + i + 2) , *(pptr + i + 3) , *(pptr + i + 4), *(pptr + i + 5), *(pptr + i + 6), *(pptr + i + 7), *(pptr + i + 8), -+ *(pptr + i + 9), *(pptr + i + 10), -+ *(pptr + i + 11), *(pptr + i + 12), *(pptr + i + 13), *(pptr + i + 14), *(pptr + i + 15)); -+ RTW_INFO("#############################\n"); -+ } -+ } -+#endif -+ -+ /* fix Hardware RX data error, drop whole recv_buffer */ -+ if (!rtw_hal_rcr_check(padapter, RCR_ACRC32) && pattrib->crc_err) { -+ RTW_INFO("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ break; -+ } -+ -+ pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->pkt_len; -+#if 0 /* reduce check to speed up */ -+ if ((ptr + pkt_offset) > precvbuf->ptail) { -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ break; -+ } -+#endif -+ -+ if ((pattrib->crc_err) || (pattrib->icv_err)) { -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->registrypriv.mp_mode == 1) { -+ if ((check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _TRUE)) { /* &&(padapter->mppriv.check_mp_pkt == 0)) */ -+ if (pattrib->crc_err == 1) -+ padapter->mppriv.rx_crcerrpktcount++; -+ } -+ } else -+#endif -+ { -+ RTW_INFO("%s: crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); -+ } -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ } else { -+ ppkt = rtw_skb_clone(precvbuf->pskb); -+ if (ppkt == NULL) { -+ RTW_INFO("%s: no enough memory to allocate SKB!\n", __FUNCTION__); -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); -+ -+ /* The case of can't allocte skb is serious and may never be recovered, */ -+ /* once bDriverStopped is enable, this task should be stopped. */ -+ if (!rtw_is_drv_stopped(padapter)) { -+#ifdef PLATFORM_LINUX -+ tasklet_schedule(&precvpriv->recv_tasklet); -+#endif -+ } -+ -+ return; -+ } -+ -+ phdr->pkt = ppkt; -+ phdr->len = 0; -+ phdr->rx_head = precvbuf->phead; -+ phdr->rx_data = phdr->rx_tail = precvbuf->pdata; -+ phdr->rx_end = precvbuf->pend; -+ recvframe_put(precvframe, pkt_offset); -+ recvframe_pull(precvframe, RXDESC_SIZE + pattrib->drvinfo_sz); -+ skb_pull(ppkt, RXDESC_SIZE + pattrib->drvinfo_sz); -+ -+#ifdef CONFIG_RX_PACKET_APPEND_FCS -+ if (check_fwstate(&padapter->mlmepriv, WIFI_MONITOR_STATE) == _FALSE) { -+ if ((pattrib->pkt_rpt_type == NORMAL_RX) && rtw_hal_rcr_check(padapter, RCR_APPFCS)) { -+ recvframe_pull_tail(precvframe, IEEE80211_FCS_LEN); -+ pattrib->pkt_len -= IEEE80211_FCS_LEN; -+ ppkt->len = pattrib->pkt_len; -+ } -+ } -+#endif -+ -+ /* move to drv info position */ -+ ptr += RXDESC_SIZE; -+ -+ /* update drv info */ -+ if (rtw_hal_rcr_check(padapter, RCR_APP_BA_SSN)) { -+ /* rtl8703s_update_bassn(padapter, pdrvinfo); */ -+ ptr += 4; -+ } -+ -+ if (pattrib->pkt_rpt_type == NORMAL_RX) -+ pre_recv_entry(precvframe, pattrib->physt ? ptr : NULL); -+ else { -+#ifdef CONFIG_FW_C2H_PKT -+ if (pattrib->pkt_rpt_type == C2H_PACKET) -+ rtw_hal_c2h_pkt_pre_hdl(padapter, precvframe->u.hdr.rx_data, pattrib->pkt_len); -+ else { -+ RTW_INFO("%s: [WARNNING] RX type(%d) not be handled!\n", -+ __FUNCTION__, pattrib->pkt_rpt_type); -+ } -+#endif -+ rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); -+ } -+ } -+ -+ pkt_offset = _RND8(pkt_offset); -+ precvbuf->pdata += pkt_offset; -+ ptr = precvbuf->pdata; -+ } -+ -+ rtw_skb_free(precvbuf->pskb); -+ precvbuf->pskb = NULL; -+ rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); -+ } while (1); -+} -+#endif -+ -+/* -+ * Initialize recv private variable for hardware dependent -+ * 1. recv buf -+ * 2. recv tasklet -+ * -+ */ -+s32 rtl8703bs_init_recv_priv(PADAPTER padapter) -+{ -+ struct registry_priv *regsty = adapter_to_regsty(padapter); -+ s32 res; -+ u32 i, n; -+ struct recv_priv *precvpriv; -+ struct recv_buf *precvbuf; -+ -+ -+ res = _SUCCESS; -+ precvpriv = &padapter->recvpriv; -+ -+ /* 3 1. init recv buffer */ -+ _rtw_init_queue(&precvpriv->free_recv_buf_queue); -+ _rtw_init_queue(&precvpriv->recv_buf_pending_queue); -+ -+ n = regsty->recvbuf_nr * sizeof(struct recv_buf) + 4; -+ precvpriv->pallocated_recv_buf = rtw_zmalloc(n); -+ if (precvpriv->pallocated_recv_buf == NULL) { -+ res = _FAIL; -+ goto exit; -+ } -+ -+ precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); -+ -+ /* init each recv buffer */ -+ precvbuf = (struct recv_buf *)precvpriv->precv_buf; -+ for (i = 0; i < regsty->recvbuf_nr; i++) { -+ res = sdio_initrecvbuf(precvbuf, padapter); -+ if (res == _FAIL) -+ break; -+ -+ res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf, MAX_RECVBUF_SZ); -+ if (res == _FAIL) { -+ sdio_freerecvbuf(precvbuf); -+ break; -+ } -+ -+ rtw_list_insert_tail(&precvbuf->list, &precvpriv->free_recv_buf_queue.queue); -+ -+ precvbuf++; -+ } -+ precvpriv->free_recv_buf_queue_cnt = i; -+ -+ if (res == _FAIL) -+ goto initbuferror; -+ -+ /* 3 2. init tasklet */ -+#ifdef PLATFORM_LINUX -+ tasklet_init(&precvpriv->recv_tasklet, -+ (void(*)(unsigned long))rtl8703bs_recv_tasklet, -+ (unsigned long)padapter); -+#endif -+ -+ goto exit; -+ -+initbuferror: -+ precvbuf = (struct recv_buf *)precvpriv->precv_buf; -+ if (precvbuf) { -+ n = precvpriv->free_recv_buf_queue_cnt; -+ precvpriv->free_recv_buf_queue_cnt = 0; -+ for (i = 0; i < n ; i++) { -+ rtw_list_delete(&precvbuf->list); -+ rtw_os_recvbuf_resource_free(padapter, precvbuf); -+ sdio_freerecvbuf(precvbuf); -+ precvbuf++; -+ } -+ precvpriv->precv_buf = NULL; -+ } -+ -+ if (precvpriv->pallocated_recv_buf) { -+ n = regsty->recvbuf_nr * sizeof(struct recv_buf) + 4; -+ rtw_mfree(precvpriv->pallocated_recv_buf, n); -+ precvpriv->pallocated_recv_buf = NULL; -+ } -+ -+exit: -+ return res; -+} -+ -+/* -+ * Free recv private variable of hardware dependent -+ * 1. recv buf -+ * 2. recv tasklet -+ * -+ */ -+void rtl8703bs_free_recv_priv(PADAPTER padapter) -+{ -+ struct registry_priv *regsty = &padapter->registrypriv; -+ u32 i, n; -+ struct recv_priv *precvpriv; -+ struct recv_buf *precvbuf; -+ -+ -+ precvpriv = &padapter->recvpriv; -+ -+ /* 3 1. kill tasklet */ -+#ifdef PLATFORM_LINUX -+ tasklet_kill(&precvpriv->recv_tasklet); -+#endif -+ -+ /* 3 2. free all recv buffers */ -+ precvbuf = (struct recv_buf *)precvpriv->precv_buf; -+ if (precvbuf) { -+ n = regsty->recvbuf_nr; -+ precvpriv->free_recv_buf_queue_cnt = 0; -+ for (i = 0; i < n ; i++) { -+ rtw_list_delete(&precvbuf->list); -+ rtw_os_recvbuf_resource_free(padapter, precvbuf); -+ sdio_freerecvbuf(precvbuf); -+ precvbuf++; -+ } -+ precvpriv->precv_buf = NULL; -+ } -+ -+ if (precvpriv->pallocated_recv_buf) { -+ n = regsty->recvbuf_nr * sizeof(struct recv_buf) + 4; -+ rtw_mfree(precvpriv->pallocated_recv_buf, n); -+ precvpriv->pallocated_recv_buf = NULL; -+ } -+} -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/rtl8703bs_xmit.c b/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/rtl8703bs_xmit.c -new file mode 100644 -index 000000000000..439787011b50 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/rtl8703bs_xmit.c -@@ -0,0 +1,739 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTL8703BS_XMIT_C_ -+ -+#include -+ -+static u8 rtw_sdio_wait_enough_TxOQT_space(PADAPTER padapter, u8 agg_num) -+{ -+ u32 n = 0; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ while (pHalData->SdioTxOQTFreeSpace < agg_num) { -+ if (RTW_CANNOT_RUN(padapter)) { -+ RTW_INFO("%s: bSurpriseRemoved or bDriverStopped (wait TxOQT)\n", __func__); -+ return _FALSE; -+ } -+ -+ HalQueryTxOQTBufferStatus8703BSdio(padapter); -+ -+ if ((++n % 60) == 0) { -+ if ((n % 300) == 0) { -+ RTW_INFO("%s(%d): QOT free space(%d), agg_num: %d\n", -+ __func__, n, pHalData->SdioTxOQTFreeSpace, agg_num); -+ } -+ rtw_msleep_os(1); -+ /* yield(); */ -+ } -+ } -+ -+ pHalData->SdioTxOQTFreeSpace -= agg_num; -+ -+ /* if (n > 1) */ -+ /* ++priv->pshare->nr_out_of_txoqt_space; */ -+ -+ return _TRUE; -+} -+ -+s32 _dequeue_writeport(PADAPTER padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct xmit_buf *pxmitbuf; -+ u8 PageIdx = 0; -+ u32 deviceId; -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ u8 bUpdatePageNum = _FALSE; -+#else -+ u32 polling_num = 0; -+#endif -+ -+ pxmitbuf = select_and_dequeue_pending_xmitbuf(padapter); -+ -+ if (pxmitbuf == NULL) -+ return _TRUE; -+ -+ deviceId = ffaddr2deviceId(pdvobjpriv, pxmitbuf->ff_hwaddr); -+ -+ /* translate fifo addr to queue index */ -+ switch (deviceId) { -+ case WLAN_TX_HIQ_DEVICE_ID: -+ PageIdx = HI_QUEUE_IDX; -+ break; -+ -+ case WLAN_TX_MIQ_DEVICE_ID: -+ PageIdx = MID_QUEUE_IDX; -+ break; -+ -+ case WLAN_TX_LOQ_DEVICE_ID: -+ PageIdx = LOW_QUEUE_IDX; -+ break; -+ } -+ -+query_free_page: -+ /* check if hardware tx fifo page is enough */ -+ if (_FALSE == rtw_hal_sdio_query_tx_freepage(padapter, PageIdx, pxmitbuf->pg_num)) { -+ if (RTW_CANNOT_RUN(padapter)) -+ goto free_xmitbuf; -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ if (!bUpdatePageNum) { -+ /* Total number of page is NOT available, so update current FIFO status */ -+ HalQueryTxBufferStatus8703BSdio(padapter); -+ bUpdatePageNum = _TRUE; -+ goto query_free_page; -+ } else { -+ bUpdatePageNum = _FALSE; -+ enqueue_pending_xmitbuf_to_head(pxmitpriv, pxmitbuf); -+ return _TRUE; -+ } -+#else /* CONFIG_SDIO_TX_ENABLE_AVAL_INT */ -+ polling_num++; -+ if ((polling_num % 10) == 0) { -+ /* RTW_INFO("%s: FIFO starvation!(%d) len=%d agg=%d page=(R)%d(A)%d\n", */ -+ /* __func__, polling_num, pxmitbuf->len, pxmitbuf->agg_num, pframe->pg_num, freePage[PageIdx] + freePage[PUBLIC_QUEUE_IDX]); */ -+ enqueue_pending_xmitbuf_to_head(pxmitpriv, pxmitbuf); -+ rtw_usleep_os(50); -+ return _FALSE; -+ } -+ -+ /* Total number of page is NOT available, so update current FIFO status */ -+ HalQueryTxBufferStatus8703BSdio(padapter); -+ goto query_free_page; -+#endif /* CONFIG_SDIO_TX_ENABLE_AVAL_INT */ -+ } -+ -+ if (rtw_sdio_wait_enough_TxOQT_space(padapter, pxmitbuf->agg_num) == _FALSE) -+ goto free_xmitbuf; -+ -+#ifdef CONFIG_CHECK_LEAVE_LPS -+ #ifdef CONFIG_LPS_CHK_BY_TP -+ if (!adapter_to_pwrctl(padapter)->lps_chk_by_tp) -+ #endif -+ traffic_check_for_leave_lps(padapter, _TRUE, pxmitbuf->agg_num); -+#endif -+ -+ rtw_write_port(padapter, deviceId, pxmitbuf->len, (u8 *)pxmitbuf); -+ -+ rtw_hal_sdio_update_tx_freepage(padapter, PageIdx, pxmitbuf->pg_num); -+ -+free_xmitbuf: -+ /* rtw_free_xmitframe(pxmitpriv, pframe); */ -+ /* pxmitbuf->priv_data = NULL; */ -+ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); -+ -+#if 0 /* improve TX/RX throughput balance */ -+ { -+ PSDIO_DATA psdio; -+ struct sdio_func *func; -+ static u8 i = 0; -+ u32 sdio_hisr; -+ u8 j; -+ -+ psdio = &adapter_to_dvobj(padapter)->intf_data; -+ func = psdio->func; -+ -+ if (i == 2) { -+ j = 0; -+ while (j < 10) { -+ sdio_hisr = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_HISR); -+ sdio_hisr &= GET_HAL_DATA(padapter)->sdio_himr; -+ if (sdio_hisr & SDIO_HISR_RX_REQUEST) { -+ sdio_claim_host(func); -+ sd_int_hdl(GET_PRIMARY_ADAPTER(padapter)); -+ sdio_release_host(func); -+ } else -+ break; -+ j++; -+ } -+ i = 0; -+ } else -+ i++; -+ } -+#endif -+ -+#ifdef CONFIG_SDIO_TX_TASKLET -+ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); -+#endif -+ -+ return _FALSE; -+} -+ -+/* -+ * Description -+ * Transmit xmitbuf to hardware tx fifo -+ * -+ * Return -+ * _SUCCESS ok -+ * _FAIL something error -+ */ -+s32 rtl8703bs_xmit_buf_handler(PADAPTER padapter) -+{ -+ struct xmit_priv *pxmitpriv; -+ u8 queue_empty; -+ s32 ret; -+ -+ -+ pxmitpriv = &padapter->xmitpriv; -+ -+ ret = _rtw_down_sema(&pxmitpriv->xmit_sema); -+ if (_FAIL == ret) { -+ RTW_ERR("%s: down SdioXmitBufSema fail!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+ if (RTW_CANNOT_RUN(padapter)) { -+ RTW_DBG(FUNC_ADPT_FMT "- bDriverStopped(%s) bSurpriseRemoved(%s)\n", -+ FUNC_ADPT_ARG(padapter), -+ rtw_is_drv_stopped(padapter) ? "True" : "False", -+ rtw_is_surprise_removed(padapter) ? "True" : "False"); -+ return _FAIL; -+ } -+ -+ if (rtw_mi_check_pending_xmitbuf(padapter) == 0) -+ return _SUCCESS; -+ -+#ifdef CONFIG_LPS_LCLK -+ ret = rtw_register_tx_alive(padapter); -+ if (ret != _SUCCESS) -+ return _SUCCESS; -+#endif -+ -+ do { -+ queue_empty = rtw_mi_dequeue_writeport(padapter); -+ } while (!queue_empty); -+ -+#ifdef CONFIG_LPS_LCLK -+ rtw_unregister_tx_alive(padapter); -+#endif -+ -+ return _SUCCESS; -+} -+ -+/* -+ * Description: -+ * Aggregation packets and send to hardware -+ * -+ * Return: -+ * 0 Success -+ * -1 Hardware resource(TX FIFO) not ready -+ * -2 Software resource(xmitbuf) not ready -+ */ -+static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) -+{ -+ s32 err, ret; -+ u32 k = 0; -+ struct hw_xmit *hwxmits, *phwxmit; -+ u8 no_res, idx, hwentry; -+ _irqL irql; -+ struct tx_servq *ptxservq; -+ _list *sta_plist, *sta_phead, *frame_plist, *frame_phead; -+ struct xmit_frame *pxmitframe; -+ _queue *pframe_queue; -+ struct xmit_buf *pxmitbuf; -+ u32 txlen, max_xmit_len, page_size; -+ u8 txdesc_size = TXDESC_SIZE; -+ int inx[4]; -+ u8 pre_qsel = 0xFF, next_qsel = 0xFF; -+ u8 single_sta_in_queue = _FALSE; -+ -+ err = 0; -+ no_res = _FALSE; -+ hwxmits = pxmitpriv->hwxmits; -+ hwentry = pxmitpriv->hwxmit_entry; -+ ptxservq = NULL; -+ pxmitframe = NULL; -+ pframe_queue = NULL; -+ pxmitbuf = NULL; -+ rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, &page_size); -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ /* dump management frame directly */ -+ do { -+ pxmitframe = rtw_dequeue_mgmt_xframe(pxmitpriv); -+ if (pxmitframe) -+ padapter->hal_func.mgnt_xmit(padapter, pxmitframe); -+ } while (pxmitframe != NULL); -+ -+ hwentry--; -+#endif -+ -+ if (padapter->registrypriv.wifi_spec == 1) { -+ for (idx = 0; idx < 4; idx++) -+ inx[idx] = pxmitpriv->wmm_para_seq[idx]; -+ } else { -+ inx[0] = 0; -+ inx[1] = 1; -+ inx[2] = 2; -+ inx[3] = 3; -+ } -+ -+ /* 0(VO), 1(VI), 2(BE), 3(BK) */ -+ for (idx = 0; idx < hwentry; idx++) { -+ phwxmit = hwxmits + inx[idx]; -+ -+ if ((check_pending_xmitbuf(pxmitpriv) == _TRUE) && (padapter->mlmepriv.LinkDetectInfo.bHigherBusyTxTraffic == _TRUE)) { -+ if ((phwxmit->accnt > 0) && (phwxmit->accnt < 5)) { -+ err = -2; -+ break; -+ } -+ } -+ -+ max_xmit_len = rtw_hal_get_sdio_tx_max_length(padapter, inx[idx]); -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irql); -+ -+ sta_phead = get_list_head(phwxmit->sta_queue); -+ sta_plist = get_next(sta_phead); -+ /* because stop_sta_xmit may delete sta_plist at any time */ -+ /* so we should add lock here, or while loop can not exit */ -+ -+ single_sta_in_queue = rtw_end_of_queue_search(sta_phead, get_next(sta_plist)); -+ -+ while (rtw_end_of_queue_search(sta_phead, sta_plist) == _FALSE) { -+ ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); -+ sta_plist = get_next(sta_plist); -+ -+#ifdef DBG_XMIT_BUF -+ RTW_INFO("%s idx:%d hwxmit_pkt_num:%d ptxservq_pkt_num:%d\n", __func__, idx, phwxmit->accnt, ptxservq->qcnt); -+ RTW_INFO("%s free_xmit_extbuf_cnt=%d free_xmitbuf_cnt=%d free_xmitframe_cnt=%d\n", -+ __func__, pxmitpriv->free_xmit_extbuf_cnt, pxmitpriv->free_xmitbuf_cnt, -+ pxmitpriv->free_xmitframe_cnt); -+#endif -+ pframe_queue = &ptxservq->sta_pending; -+ -+ frame_phead = get_list_head(pframe_queue); -+ -+ while (rtw_is_list_empty(frame_phead) == _FALSE) { -+ frame_plist = get_next(frame_phead); -+ pxmitframe = LIST_CONTAINOR(frame_plist, struct xmit_frame, list); -+ -+ /* check xmit_buf size enough or not */ -+ txlen = txdesc_size + rtw_wlan_pkt_size(pxmitframe); -+ next_qsel = pxmitframe->attrib.qsel; -+ if ((NULL == pxmitbuf) || -+ (pxmitbuf->pg_num + PageNum(txlen, page_size) > PageNum(max_xmit_len, page_size)) -+ || (k >= (rtw_hal_sdio_max_txoqt_free_space(padapter) - 1)) -+ || ((k != 0) && (_FAIL == rtw_hal_busagg_qsel_check(padapter, pre_qsel, next_qsel))) -+ ) { -+ if (pxmitbuf) { -+ /* pxmitbuf->priv_data will be NULL, and will crash here */ -+ if (pxmitbuf->len > 0 && pxmitbuf->priv_data) { -+ struct xmit_frame *pframe; -+ pframe = (struct xmit_frame *)pxmitbuf->priv_data; -+ pframe->agg_num = k; -+ pxmitbuf->agg_num = k; -+ rtl8703b_update_txdesc(pframe, pframe->buf_addr); -+ rtw_free_xmitframe(pxmitpriv, pframe); -+ pxmitbuf->priv_data = NULL; -+ enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); -+ /* can not yield under lock */ -+ -+ /* rtw_yield_os(); */ -+ if (single_sta_in_queue == _FALSE) { -+ /* break the loop in case there is more than one sta in this ac queue */ -+ pxmitbuf = NULL; -+ err = -3; -+ break; -+ } -+ } else -+ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); -+ } -+ -+ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); -+ if (pxmitbuf == NULL) { -+#ifdef DBG_XMIT_BUF -+ RTW_ERR("%s: xmit_buf is not enough!\n", __FUNCTION__); -+#endif -+ err = -2; -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ _rtw_up_sema(&(GET_PRIMARY_ADAPTER(padapter)->xmitpriv.xmit_sema)); -+#endif -+ break; -+ } -+ k = 0; -+ } -+ -+ /* ok to send, remove frame from queue */ -+#ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { -+ if ((pxmitframe->attrib.psta->state & WIFI_SLEEP_STATE) && -+ (pxmitframe->attrib.triggered == 0)) { -+ RTW_INFO("%s: one not triggered pkt in queue when this STA sleep," -+ " break and goto next sta\n", __func__); -+ break; -+ } -+ } -+#endif -+ rtw_list_delete(&pxmitframe->list); -+ ptxservq->qcnt--; -+ phwxmit->accnt--; -+ -+ if (k == 0) { -+ pxmitbuf->ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); -+ pxmitbuf->priv_data = (u8 *)pxmitframe; -+ } -+ -+ /* coalesce the xmitframe to xmitbuf */ -+ pxmitframe->pxmitbuf = pxmitbuf; -+ pxmitframe->buf_addr = pxmitbuf->ptail; -+ -+ ret = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); -+ if (ret == _FAIL) { -+ RTW_ERR("%s: coalesce FAIL!", __FUNCTION__); -+ /* Todo: error handler */ -+ } else { -+ k++; -+ if (k != 1) -+ rtl8703b_update_txdesc(pxmitframe, pxmitframe->buf_addr); -+ rtw_count_tx_stats(padapter, pxmitframe, pxmitframe->attrib.last_txcmdsz); -+ pre_qsel = pxmitframe->attrib.qsel; -+ txlen = txdesc_size + pxmitframe->attrib.last_txcmdsz; -+ pxmitframe->pg_num = (txlen + 127) / 128; -+ pxmitbuf->pg_num += (txlen + 127) / 128; -+ /* if (k != 1) */ -+ /* ((struct xmit_frame*)pxmitbuf->priv_data)->pg_num += pxmitframe->pg_num; */ -+ pxmitbuf->ptail += _RND(txlen, 8); /* round to 8 bytes alignment */ -+ pxmitbuf->len = _RND(pxmitbuf->len, 8) + txlen; -+ } -+ -+ if (k != 1) -+ rtw_free_xmitframe(pxmitpriv, pxmitframe); -+ pxmitframe = NULL; -+ } -+ -+ if (_rtw_queue_empty(pframe_queue) == _TRUE) -+ rtw_list_delete(&ptxservq->tx_pending); -+ else if (err == -3) { -+ /* Re-arrange the order of stations in this ac queue to balance the service for these stations */ -+ rtw_list_delete(&ptxservq->tx_pending); -+ rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmit->sta_queue)); -+ } -+ -+ if (err) -+ break; -+ } -+ _exit_critical_bh(&pxmitpriv->lock, &irql); -+ -+ /* dump xmit_buf to hw tx fifo */ -+ if (pxmitbuf) { -+ -+ if (pxmitbuf->len > 0) { -+ struct xmit_frame *pframe; -+ pframe = (struct xmit_frame *)pxmitbuf->priv_data; -+ pframe->agg_num = k; -+ pxmitbuf->agg_num = k; -+ rtl8703b_update_txdesc(pframe, pframe->buf_addr); -+ rtw_free_xmitframe(pxmitpriv, pframe); -+ pxmitbuf->priv_data = NULL; -+ enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); -+ rtw_yield_os(); -+ } else -+ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); -+ pxmitbuf = NULL; -+ } -+ -+ if (err == -2) -+ break; -+ } -+ -+ return err; -+} -+ -+/* -+ * Description -+ * Transmit xmitframe from queue -+ * -+ * Return -+ * _SUCCESS ok -+ * _FAIL something error -+ */ -+s32 rtl8703bs_xmit_handler(PADAPTER padapter) -+{ -+ struct xmit_priv *pxmitpriv; -+ s32 ret; -+ _irqL irql; -+ -+ -+ pxmitpriv = &padapter->xmitpriv; -+ -+ ret = _rtw_down_sema(&pxmitpriv->SdioXmitSema); -+ if (_FAIL == ret) { -+ RTW_ERR("%s: down sema fail!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+next: -+ if (RTW_CANNOT_RUN(padapter)) { -+ RTW_DBG(FUNC_ADPT_FMT "- bDriverStopped(%s) bSurpriseRemoved(%s)\n", -+ FUNC_ADPT_ARG(padapter), -+ rtw_is_drv_stopped(padapter) ? "True" : "False", -+ rtw_is_surprise_removed(padapter) ? "True" : "False"); -+ return _FAIL; -+ } -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irql); -+ ret = rtw_txframes_pending(padapter); -+ _exit_critical_bh(&pxmitpriv->lock, &irql); -+ if (ret == 0) -+ return _SUCCESS; -+ -+ /* dequeue frame and write to hardware */ -+ -+ ret = xmit_xmitframes(padapter, pxmitpriv); -+ if (ret == -2) { -+ /* here sleep 1ms will cause big TP loss of TX */ -+ /* from 50+ to 40+ */ -+ if (padapter->registrypriv.wifi_spec) -+ rtw_msleep_os(1); -+ else -+#ifdef CONFIG_REDUCE_TX_CPU_LOADING -+ rtw_msleep_os(1); -+#else -+ rtw_usleep_os(50); -+#endif -+ goto next; -+ } -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irql); -+ ret = rtw_txframes_pending(padapter); -+ _exit_critical_bh(&pxmitpriv->lock, &irql); -+ if (ret == 1) { -+#ifdef CONFIG_REDUCE_TX_CPU_LOADING -+ rtw_msleep_os(1); -+#endif -+ goto next; -+ } -+ -+ return _SUCCESS; -+} -+ -+thread_return rtl8703bs_xmit_thread(thread_context context) -+{ -+ s32 ret; -+ PADAPTER padapter; -+ struct xmit_priv *pxmitpriv; -+ u8 thread_name[20] = {0}; -+ -+ -+ ret = _SUCCESS; -+ padapter = (PADAPTER)context; -+ pxmitpriv = &padapter->xmitpriv; -+ -+ rtw_sprintf(thread_name, 20, "RTWHALXT-"ADPT_FMT, ADPT_ARG(padapter)); -+ thread_enter(thread_name); -+ -+ RTW_INFO("start "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ do { -+ ret = rtl8703bs_xmit_handler(padapter); -+ flush_signals_thread(); -+ } while (_SUCCESS == ret); -+ -+ RTW_INFO(FUNC_ADPT_FMT " Exit\n", FUNC_ADPT_ARG(padapter)); -+ -+ rtw_thread_wait_stop(); -+ -+ return 0; -+} -+ -+s32 rtl8703bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe) -+{ -+ s32 ret = _SUCCESS; -+ struct pkt_attrib *pattrib; -+ struct xmit_buf *pxmitbuf; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ u8 *pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ u8 txdesc_size = TXDESC_SIZE; -+ -+ -+ pattrib = &pmgntframe->attrib; -+ pxmitbuf = pmgntframe->pxmitbuf; -+ -+ rtl8703b_update_txdesc(pmgntframe, pmgntframe->buf_addr); -+ -+ pxmitbuf->len = txdesc_size + pattrib->last_txcmdsz; -+ /* pmgntframe->pg_num = (pxmitbuf->len + 127)/128; // 128 is tx page size */ -+ pxmitbuf->pg_num = (pxmitbuf->len + 127) / 128; /* 128 is tx page size */ -+ pxmitbuf->ptail = pmgntframe->buf_addr + pxmitbuf->len; -+ pxmitbuf->ff_hwaddr = rtw_get_ff_hwaddr(pmgntframe); -+ -+ rtw_count_tx_stats(padapter, pmgntframe, pattrib->last_txcmdsz); -+ -+ rtw_free_xmitframe(pxmitpriv, pmgntframe); -+ -+ pxmitbuf->priv_data = NULL; -+ -+ if (get_frame_sub_type(pframe) == WIFI_BEACON) { /* dump beacon directly */ -+ ret = rtw_write_port(padapter, pdvobjpriv->Queue2Pipe[pxmitbuf->ff_hwaddr], pxmitbuf->len, (u8 *)pxmitbuf); -+ if (ret != _SUCCESS) -+ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_WRITE_PORT_ERR); -+ -+ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); -+ } else -+ enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); -+ -+ return ret; -+} -+ -+/* -+ * Description: -+ * Handle xmitframe(packet) come from rtw_xmit() -+ * -+ * Return: -+ * _TRUE dump packet directly ok -+ * _FALSE enqueue, temporary can't transmit packets to hardware -+ */ -+s32 rtl8703bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe) -+{ -+ struct xmit_priv *pxmitpriv; -+ _irqL irql; -+ s32 err; -+ -+ -+ pxmitframe->attrib.qsel = pxmitframe->attrib.priority; -+ pxmitpriv = &padapter->xmitpriv; -+ -+#ifdef CONFIG_80211N_HT -+ if ((pxmitframe->frame_tag == DATA_FRAMETAG) && -+ (pxmitframe->attrib.ether_type != 0x0806) && -+ (pxmitframe->attrib.ether_type != 0x888e) && -+ (pxmitframe->attrib.dhcp_pkt != 1)) { -+ rtw_issue_addbareq_cmd(padapter, pxmitframe, _TRUE); -+ } -+#endif -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irql); -+ err = rtw_xmitframe_enqueue(padapter, pxmitframe); -+ _exit_critical_bh(&pxmitpriv->lock, &irql); -+ if (err != _SUCCESS) { -+ rtw_free_xmitframe(pxmitpriv, pxmitframe); -+ -+ pxmitpriv->tx_drop++; -+ return _TRUE; -+ } -+ -+ _rtw_up_sema(&pxmitpriv->SdioXmitSema); -+ -+ return _FALSE; -+} -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+s32 rtl8703bs_hal_mgmt_xmitframe_enqueue(PADAPTER adapter, struct xmit_frame *pxmitframe) -+{ -+ struct xmit_priv *pxmitpriv; -+ s32 ret; -+ -+ pxmitpriv = &adapter->xmitpriv; -+ -+ ret = rtw_mgmt_xmitframe_enqueue(adapter, pxmitframe); -+ if (ret != _SUCCESS) { -+ rtw_free_xmitframe(pxmitpriv, pxmitframe); -+ pxmitpriv->tx_drop++; -+ return _FALSE; -+ } -+ -+#ifdef CONFIG_SDIO_TX_TASKLET -+ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); -+#else -+ _rtw_up_sema(&pxmitpriv->SdioXmitSema); -+#endif -+ -+ return _TRUE; -+} -+#endif -+ -+s32 rtl8703bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ s32 err; -+ -+ err = rtw_xmitframe_enqueue(padapter, pxmitframe); -+ if (err != _SUCCESS) { -+ rtw_free_xmitframe(pxmitpriv, pxmitframe); -+ -+ pxmitpriv->tx_drop++; -+ } else { -+#ifdef CONFIG_SDIO_TX_TASKLET -+ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); -+#else -+ _rtw_up_sema(&pxmitpriv->SdioXmitSema); -+#endif -+ } -+ -+ return err; -+ -+} -+ -+/* -+ * Return -+ * _SUCCESS start thread ok -+ * _FAIL start thread fail -+ * -+ */ -+s32 rtl8703bs_init_xmit_priv(PADAPTER padapter) -+{ -+ struct xmit_priv *xmitpriv = &padapter->xmitpriv; -+ PHAL_DATA_TYPE phal; -+ -+ -+ phal = GET_HAL_DATA(padapter); -+ -+ _rtw_spinlock_init(&phal->SdioTxFIFOFreePageLock); -+ _rtw_init_sema(&xmitpriv->SdioXmitSema, 0); -+ -+ return _SUCCESS; -+} -+ -+void rtl8703bs_free_xmit_priv(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE phal; -+ struct xmit_priv *pxmitpriv; -+ struct xmit_buf *pxmitbuf; -+ _queue *pqueue; -+ _list *plist, *phead; -+ _list tmplist; -+ _irqL irql; -+ -+ -+ phal = GET_HAL_DATA(padapter); -+ pxmitpriv = &padapter->xmitpriv; -+ pqueue = &pxmitpriv->pending_xmitbuf_queue; -+ phead = get_list_head(pqueue); -+ _rtw_init_listhead(&tmplist); -+ -+ _enter_critical_bh(&pqueue->lock, &irql); -+ if (_rtw_queue_empty(pqueue) == _FALSE) { -+ /* Insert tmplist to end of queue, and delete phead */ -+ /* then tmplist become head of queue. */ -+ rtw_list_insert_tail(&tmplist, phead); -+ rtw_list_delete(phead); -+ } -+ _exit_critical_bh(&pqueue->lock, &irql); -+ -+ phead = &tmplist; -+ while (rtw_is_list_empty(phead) == _FALSE) { -+ plist = get_next(phead); -+ rtw_list_delete(plist); -+ -+ pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); -+ rtw_free_xmitframe(pxmitpriv, (struct xmit_frame *)pxmitbuf->priv_data); -+ pxmitbuf->priv_data = NULL; -+ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); -+ } -+ -+ _rtw_spinlock_free(&phal->SdioTxFIFOFreePageLock); -+} -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/sdio_halinit.c b/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/sdio_halinit.c -new file mode 100644 -index 000000000000..18c50d6fd2a4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/sdio_halinit.c -@@ -0,0 +1,1668 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _SDIO_HALINIT_C_ -+ -+#include -+#include "hal_com_h2c.h" -+ -+/* -+ * Description: -+ * Call power on sequence to enable card -+ * -+ * Return: -+ * _SUCCESS enable success -+ * _FAIL enable fail -+ */ -+static u8 CardEnable(PADAPTER padapter) -+{ -+ u8 bMacPwrCtrlOn; -+ u8 ret = _FAIL; -+ -+ -+ bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if (bMacPwrCtrlOn == _FALSE) { -+ /* RSV_CTRL 0x1C[7:0] = 0x00 */ -+ /* unlock ISO/CLK/Power control register */ -+ rtw_write8(padapter, REG_RSV_CTRL, 0x0); -+ -+ ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8703B_card_enable_flow); -+ if (ret == _SUCCESS) { -+ u8 bMacPwrCtrlOn = _TRUE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ } -+ } else -+ ret = _SUCCESS; -+ -+ return ret; -+} -+ -+/* static */ -+u32 _InitPowerOn_8703BS(PADAPTER padapter) -+{ -+ u8 value8; -+ u16 value16; -+ u32 value32; -+ u8 ret; -+ u8 pwron_chk_cnt = 0; -+ /* u8 bMacPwrCtrlOn; */ -+ -+_init_power_on: -+ -+#if 1 -+ /* all of these MUST be configured before power on */ -+#ifdef CONFIG_XTAL_26M -+ /* Config PLL Reference CLK, */ -+ /* Change crystal to 26M, APLL_FREF_SEL = 4b'0101 */ -+ /* APLL_FREF_SEL[0]=1b'1 */ -+ value8 = rtw_read8(padapter, REG_AFE_PLL_CTRL); -+ value8 |= BIT(2); -+ rtw_write8(padapter, REG_AFE_PLL_CTRL, value8); -+ /* APLL_FREF_SEL[2:1]=2b'10 */ -+ value8 = rtw_read8(padapter, REG_AFE_CTRL_4_8703B + 1); -+ value8 &= ~(BIT(1) | BIT(0)); -+ value8 |= BIT(1); -+ rtw_write16(padapter, REG_AFE_CTRL_4_8703B + 1, value8); -+ /* APLL_FREF_SEL[3]=1b'0 */ -+ value8 = rtw_read8(padapter, REG_AFE_CTRL_4_8703B); -+ value8 &= ~BIT(7); -+ rtw_write16(padapter, REG_AFE_CTRL_4_8703B, value8); -+#endif /* CONFIG_XTAL_26M */ -+ -+#ifdef CONFIG_EXT_CLK -+ /* Use external crystal(XTAL) */ -+ value8 = rtw_read8(padapter, REG_PAD_CTRL1_8703B + 2); -+ value8 |= BIT(7); -+ rtw_write8(padapter, REG_PAD_CTRL1_8703B + 2, value8); -+ -+ /* CLK_REQ High active or Low Active */ -+ /* Request GPIO polarity: */ -+ /* 0: low active */ -+ /* 1: high active */ -+ value8 = rtw_read8(padapter, REG_MULTI_FUNC_CTRL + 1); -+ value8 |= BIT(5); -+ rtw_write8(padapter, REG_MULTI_FUNC_CTRL + 1, value8); -+#endif /* CONFIG_EXT_CLK */ -+#endif /* all of these MUST be configured before power on */ -+ -+ /* only cmd52 can be used before power on(card enable) */ -+ ret = CardEnable(padapter); -+ if (ret == _FALSE) { -+ return _FAIL; -+ } -+ -+ /* Radio-Off Pin Trigger */ -+ value8 = rtw_read8(padapter, REG_GPIO_INTM + 1); -+ value8 |= BIT(1); /* Enable falling edge triggering interrupt */ -+ rtw_write8(padapter, REG_GPIO_INTM + 1, value8); -+ value8 = rtw_read8(padapter, REG_GPIO_IO_SEL_2 + 1); -+ value8 |= BIT(1); -+ rtw_write8(padapter, REG_GPIO_IO_SEL_2 + 1, value8); -+ -+ /* Enable power down and GPIO interrupt */ -+ value16 = rtw_read16(padapter, REG_APS_FSMCO); -+ value16 |= EnPDN; /* Enable HW power down and RF on */ -+ rtw_write16(padapter, REG_APS_FSMCO, value16); -+ -+ /* Enable CMD53 R/W Operation -+ * bMacPwrCtrlOn = _TRUE; -+ * rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); */ -+ -+ rtw_write8(padapter, REG_CR, 0x00); -+ /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */ -+ value16 = rtw_read16(padapter, REG_CR); -+ value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN -+ | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN); -+ rtw_write16(padapter, REG_CR, value16); -+ -+ -+ /* PowerOnCheck() */ -+ ret = sdio_power_on_check(padapter); -+ pwron_chk_cnt++; -+ if (_FAIL == ret) { -+ if (pwron_chk_cnt > 1) { -+ RTW_INFO("Failed to init Power On!\n"); -+ return _FAIL; -+ } -+ RTW_INFO("Power on Fail! do it again\n"); -+ goto _init_power_on; -+ } -+ -+ return _SUCCESS; -+} -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+/* Tx Page FIFO threshold */ -+static void _init_available_page_threshold(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ) -+{ -+ u16 HQ_threshold, NQ_threshold, LQ_threshold; -+ -+ HQ_threshold = (numPubQ + numHQ + 1) >> 1; -+ HQ_threshold |= (HQ_threshold << 8); -+ -+ NQ_threshold = (numPubQ + numNQ + 1) >> 1; -+ NQ_threshold |= (NQ_threshold << 8); -+ -+ LQ_threshold = (numPubQ + numLQ + 1) >> 1; -+ LQ_threshold |= (LQ_threshold << 8); -+ -+ rtw_write16(padapter, 0x218, HQ_threshold); -+ rtw_write16(padapter, 0x21A, NQ_threshold); -+ rtw_write16(padapter, 0x21C, LQ_threshold); -+ RTW_INFO("%s(): Enable Tx FIFO Page Threshold H:0x%x,N:0x%x,L:0x%x\n", __FUNCTION__, HQ_threshold, NQ_threshold, LQ_threshold); -+} -+#endif -+static void _InitQueueReservedPage(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ u32 outEPNum = (u32)pHalData->OutEpNumber; -+ u32 numHQ = 0; -+ u32 numLQ = 0; -+ u32 numNQ = 0; -+ u32 numPubQ; -+ u32 value32; -+ u8 value8; -+ BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; -+ -+ if (pHalData->OutEpQueueSel & TX_SELE_HQ) -+ numHQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_HPQ_8703B : NORMAL_PAGE_NUM_HPQ_8703B; -+ -+ if (pHalData->OutEpQueueSel & TX_SELE_LQ) -+ numLQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_LPQ_8703B : NORMAL_PAGE_NUM_LPQ_8703B; -+ -+ /* NOTE: This step shall be proceed before writting REG_RQPN. */ -+ if (pHalData->OutEpQueueSel & TX_SELE_NQ) -+ numNQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_NPQ_8703B : NORMAL_PAGE_NUM_NPQ_8703B; -+ -+ numPubQ = TX_TOTAL_PAGE_NUMBER_8703B - numHQ - numLQ - numNQ; -+ -+ value8 = (u8)_NPQ(numNQ); -+ rtw_write8(padapter, REG_RQPN_NPQ, value8); -+ -+ /* TX DMA */ -+ value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; -+ rtw_write32(padapter, REG_RQPN, value32); -+ -+ rtw_hal_set_sdio_tx_max_length(padapter, numHQ, numNQ, numLQ, numPubQ, SDIO_TX_DIV_NUM); -+ -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ _init_available_page_threshold(padapter, numHQ, numNQ, numLQ, numPubQ); -+#endif -+} -+ -+static void _InitTxBufferBoundary(PADAPTER padapter) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+#ifdef CONFIG_CONCURRENT_MODE -+ u8 val8; -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ /* u16 txdmactrl; */ -+ u8 txpktbuf_bndy; -+ -+ if (!pregistrypriv->wifi_spec) -+ txpktbuf_bndy = TX_PAGE_BOUNDARY_8703B; -+ else { -+ /* for WMM */ -+ txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_8703B; -+ } -+ -+ rtw_write8(padapter, REG_TXPKTBUF_BCNQ_BDNY_8703B, txpktbuf_bndy); -+ rtw_write8(padapter, REG_TXPKTBUF_MGQ_BDNY_8703B, txpktbuf_bndy); -+ rtw_write8(padapter, REG_TXPKTBUF_WMAC_LBK_BF_HD_8703B, txpktbuf_bndy); -+ rtw_write8(padapter, REG_TRXFF_BNDY, txpktbuf_bndy); -+ rtw_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ val8 = txpktbuf_bndy + BCNQ_PAGE_NUM_8703B + WOWLAN_PAGE_NUM_8703B; -+ rtw_write8(padapter, REG_BCNQ1_BDNY, val8); -+ rtw_write8(padapter, REG_DWBCN1_CTRL_8703B + 1, val8); /* BCN1_HEAD */ -+ -+ val8 = rtw_read8(padapter, REG_DWBCN1_CTRL_8703B + 2); -+ val8 |= BIT(1); /* BIT1- BIT_SW_BCN_SEL_EN */ -+ rtw_write8(padapter, REG_DWBCN1_CTRL_8703B + 2, val8); -+#endif /* CONFIG_CONCURRENT_MODE */ -+} -+ -+static void -+_InitNormalChipRegPriority( -+ PADAPTER Adapter, -+ u16 beQ, -+ u16 bkQ, -+ u16 viQ, -+ u16 voQ, -+ u16 mgtQ, -+ u16 hiQ -+) -+{ -+ u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); -+ -+ value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | -+ _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | -+ _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ); -+ -+ rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); -+} -+ -+static void -+_InitNormalChipOneOutEpPriority( -+ PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ u16 value = 0; -+ switch (pHalData->OutEpQueueSel) { -+ case TX_SELE_HQ: -+ value = QUEUE_HIGH; -+ break; -+ case TX_SELE_LQ: -+ value = QUEUE_LOW; -+ break; -+ case TX_SELE_NQ: -+ value = QUEUE_NORMAL; -+ break; -+ default: -+ /* RT_ASSERT(FALSE,("Shall not reach here!\n")); */ -+ break; -+ } -+ -+ _InitNormalChipRegPriority(Adapter, -+ value, -+ value, -+ value, -+ value, -+ value, -+ value -+ ); -+ -+} -+ -+static void -+_InitNormalChipTwoOutEpPriority( -+ PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct registry_priv *pregistrypriv = &Adapter->registrypriv; -+ u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; -+ -+ -+ u16 valueHi = 0; -+ u16 valueLow = 0; -+ -+ switch (pHalData->OutEpQueueSel) { -+ case (TX_SELE_HQ | TX_SELE_LQ): -+ valueHi = QUEUE_HIGH; -+ valueLow = QUEUE_LOW; -+ break; -+ case (TX_SELE_NQ | TX_SELE_LQ): -+ valueHi = QUEUE_NORMAL; -+ valueLow = QUEUE_LOW; -+ break; -+ case (TX_SELE_HQ | TX_SELE_NQ): -+ valueHi = QUEUE_HIGH; -+ valueLow = QUEUE_NORMAL; -+ break; -+ default: -+ /* RT_ASSERT(FALSE,("Shall not reach here!\n")); */ -+ break; -+ } -+ -+ if (!pregistrypriv->wifi_spec) { -+ beQ = valueLow; -+ bkQ = valueLow; -+ viQ = valueHi; -+ voQ = valueHi; -+ mgtQ = valueHi; -+ hiQ = valueHi; -+ } else { /* for WMM ,CONFIG_OUT_EP_WIFI_MODE */ -+ beQ = valueLow; -+ bkQ = valueHi; -+ viQ = valueHi; -+ voQ = valueLow; -+ mgtQ = valueHi; -+ hiQ = valueHi; -+ } -+ -+ _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); -+ -+} -+ -+static void -+_InitNormalChipThreeOutEpPriority( -+ PADAPTER padapter -+) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; -+ -+ if (!pregistrypriv->wifi_spec) { /* typical setting */ -+ beQ = QUEUE_LOW; -+ bkQ = QUEUE_LOW; -+ viQ = QUEUE_NORMAL; -+ voQ = QUEUE_HIGH; -+ mgtQ = QUEUE_HIGH; -+ hiQ = QUEUE_HIGH; -+ } else { /* for WMM */ -+ beQ = QUEUE_LOW; -+ bkQ = QUEUE_NORMAL; -+ viQ = QUEUE_NORMAL; -+ voQ = QUEUE_HIGH; -+ mgtQ = QUEUE_HIGH; -+ hiQ = QUEUE_HIGH; -+ } -+ _InitNormalChipRegPriority(padapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); -+} -+ -+static void -+_InitNormalChipQueuePriority( -+ PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ switch (pHalData->OutEpNumber) { -+ case 1: -+ _InitNormalChipOneOutEpPriority(Adapter); -+ break; -+ case 2: -+ _InitNormalChipTwoOutEpPriority(Adapter); -+ break; -+ case 3: -+ _InitNormalChipThreeOutEpPriority(Adapter); -+ break; -+ default: -+ /* RT_ASSERT(FALSE,("Shall not reach here!\n")); */ -+ break; -+ } -+ -+ -+} -+ -+static void _InitQueuePriority(PADAPTER padapter) -+{ -+ _InitNormalChipQueuePriority(padapter); -+} -+ -+static void _InitPageBoundary(PADAPTER padapter) -+{ -+ /* RX Page Boundary */ -+ u16 rxff_bndy = RX_DMA_BOUNDARY_8703B; -+ -+ rtw_write16(padapter, (REG_TRXFF_BNDY + 2), rxff_bndy); -+} -+ -+static void _InitTransferPageSize(PADAPTER padapter) -+{ -+ /* Tx page size is always 128. */ -+ -+ u8 value8; -+ value8 = _PSRX(PBP_128) | _PSTX(PBP_128); -+ rtw_write8(padapter, REG_PBP, value8); -+} -+ -+void _InitDriverInfoSize(PADAPTER padapter, u8 drvInfoSize) -+{ -+ rtw_write8(padapter, REG_RX_DRVINFO_SZ, drvInfoSize); -+} -+ -+void _InitNetworkType(PADAPTER padapter) -+{ -+ u32 value32; -+ -+ value32 = rtw_read32(padapter, REG_CR); -+ -+ /* TODO: use the other function to set network type -+ * value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC); */ -+ value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); -+ -+ rtw_write32(padapter, REG_CR, value32); -+} -+ -+void _InitWMACSetting(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ u16 value16; -+ u32 rcr; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ rcr = 0 -+ | RCR_APM | RCR_AM | RCR_AB -+ | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_AMF -+ | RCR_HTC_LOC_CTRL -+ | RCR_APP_PHYST_RXFF | RCR_APP_ICV | RCR_APP_MIC -+ #ifdef CONFIG_MAC_LOOPBACK_DRIVER -+ | RCR_AAP -+ | RCR_ADD3 | RCR_APWRMGT | RCR_ACRC32 | RCR_ADF -+ #endif -+ ; -+ rtw_hal_set_hwreg(padapter, HW_VAR_RCR, (u8 *)&rcr); -+ -+ /* Accept all multicast address */ -+ rtw_write32(padapter, REG_MAR, 0xFFFFFFFF); -+ rtw_write32(padapter, REG_MAR + 4, 0xFFFFFFFF); -+ -+ /* Accept all data frames */ -+ value16 = 0xFFFF; -+ rtw_write16(padapter, REG_RXFLTMAP2, value16); -+ -+ /* 2010.09.08 hpfan */ -+ /* Since ADF is removed from RCR, ps-poll will not be indicate to driver, */ -+ /* RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. */ -+ value16 = 0x400; -+ rtw_write16(padapter, REG_RXFLTMAP1, value16); -+ -+ /* Accept all management frames */ -+ value16 = 0xFFFF; -+ rtw_write16(padapter, REG_RXFLTMAP0, value16); -+} -+ -+void _InitAdaptiveCtrl(PADAPTER padapter) -+{ -+ u16 value16; -+ u32 value32; -+ -+ /* Response Rate Set */ -+ value32 = rtw_read32(padapter, REG_RRSR); -+ value32 &= ~RATE_BITMAP_ALL; -+ value32 |= RATE_RRSR_CCK_ONLY_1M; -+ -+ rtw_phydm_set_rrsr(padapter, value32, TRUE); -+ -+ -+ /* CF-END Threshold */ -+ /* m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); */ -+ -+ /* SIFS (used in NAV) */ -+ value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); -+ rtw_write16(padapter, REG_SPEC_SIFS, value16); -+ -+ /* Retry Limit */ -+ value16 = BIT_LRL(RL_VAL_STA) | BIT_SRL(RL_VAL_STA); -+ rtw_write16(padapter, REG_RETRY_LIMIT, value16); -+} -+ -+void _InitEDCA(PADAPTER padapter) -+{ -+ /* Set Spec SIFS (used in NAV) */ -+ rtw_write16(padapter, REG_SPEC_SIFS, 0x100a); -+ rtw_write16(padapter, REG_MAC_SPEC_SIFS, 0x100a); -+ -+ /* Set SIFS for CCK */ -+ rtw_write16(padapter, REG_SIFS_CTX, 0x100a); -+ -+ /* Set SIFS for OFDM */ -+ rtw_write16(padapter, REG_SIFS_TRX, 0x100a); -+ -+ /* TXOP */ -+ rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x005EA42B); -+ rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A44F); -+ rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005EA324); -+ rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002FA226); -+} -+ -+void _InitRetryFunction(PADAPTER padapter) -+{ -+ u8 value8; -+ -+ value8 = rtw_read8(padapter, REG_FWHW_TXQ_CTRL); -+ value8 |= EN_AMPDU_RTY_NEW; -+ rtw_write8(padapter, REG_FWHW_TXQ_CTRL, value8); -+ -+ /* Set ACK timeout */ -+ rtw_write8(padapter, REG_ACKTO, 0x40); -+} -+ -+static void HalRxAggr8703BSdio(PADAPTER padapter) -+{ -+ struct registry_priv *pregistrypriv; -+ u8 valueDMATimeout; -+ u8 valueDMAPageCount; -+ -+ -+ pregistrypriv = &padapter->registrypriv; -+ -+ if (pregistrypriv->wifi_spec) { -+ /* 2010.04.27 hpfan */ -+ /* Adjust RxAggrTimeout to close to zero disable RxAggr, suggested by designer */ -+ /* Timeout value is calculated by 34 / (2^n) */ -+ valueDMATimeout = 0x06; -+ valueDMAPageCount = 0x06; -+ } else { -+ /* 20130530, Isaac@SD1 suggest 3 kinds of parameter */ -+#if 1 -+ /* TX/RX Balance */ -+ valueDMATimeout = 0x06; -+ valueDMAPageCount = 0x06; -+#endif -+#if 0 -+ /* TX/RX Balance, but TCP ack may be late */ -+ valueDMATimeout = 0x16; -+ valueDMAPageCount = 0x06; -+#endif -+#if 0 -+ /* RX Best */ -+ valueDMATimeout = 0x16; -+ valueDMAPageCount = 0x08; -+#endif -+ } -+ -+#ifdef CONFIG_DONT_CARE_TP -+ valueDMATimeout = 0x0f; -+ valueDMAPageCount = 0x04; /* RxAggUpthreshold = [4]*1K bytes+1.5k. since RxAggUpthreshold+SzAmsdu(3839)registrypriv; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+#if DISABLE_BB_RF -+ pHalData->rf_chip = RF_PSEUDO_11N; -+ return; -+#endif -+ pHalData->rf_chip = RF_6052; -+ -+ RTW_INFO("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); -+} -+ -+/* Set CCK and OFDM Block "ON" */ -+#if 0 -+static void _BBTurnOnBlock(PADAPTER padapter) -+{ -+#if (DISABLE_BB_RF) -+ return; -+#endif -+ -+ phy_set_bb_reg(padapter, rFPGA0_RFMOD, bCCKEn, 0x1); -+ phy_set_bb_reg(padapter, rFPGA0_RFMOD, bOFDMEn, 0x1); -+} -+#endif -+ -+void _InitBBRegBackup_8703BS(PADAPTER Adapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ /* For Channel 1~11 (Default Value)*/ -+ pHalData->RegForRecover[0].offset = rCCK0_TxFilter2; -+ pHalData->RegForRecover[0].value = phy_query_bb_reg(Adapter, pHalData->RegForRecover[0].offset, bMaskDWord); -+ -+ pHalData->RegForRecover[1].offset = rCCK0_DebugPort; -+ pHalData->RegForRecover[1].value = phy_query_bb_reg(Adapter, pHalData->RegForRecover[1].offset, bMaskDWord); -+ -+ /* For 20 MHz (Default Value)*/ -+ pHalData->RegForRecover[2].offset = rBBrx_DFIR; -+ pHalData->RegForRecover[2].value = phy_query_bb_reg(Adapter, pHalData->RegForRecover[2].offset, bMaskDWord); -+ -+ pHalData->RegForRecover[3].offset = rOFDM0_XATxAFE; -+ pHalData->RegForRecover[3].value = phy_query_bb_reg(Adapter, pHalData->RegForRecover[3].offset, bMaskDWord); -+ -+ pHalData->RegForRecover[4].offset = 0x1E; -+ pHalData->RegForRecover[4].value = phy_query_rf_reg(Adapter, RF_PATH_A, pHalData->RegForRecover[4].offset, bRFRegOffsetMask); -+} -+ -+/* -+ * 2010/08/09 MH Add for power down check. -+ * */ -+static BOOLEAN HalDetectPwrDownMode(PADAPTER Adapter) -+{ -+ u8 tmpvalue; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); -+ -+ -+ EFUSE_ShadowRead(Adapter, 1, EEPROM_FEATURE_OPTION_8703B, (u32 *)&tmpvalue); -+ -+ /* 2010/08/25 MH INF priority > PDN Efuse value. */ -+ if (tmpvalue & BIT4 && pwrctrlpriv->reg_pdnmode) -+ pHalData->pwrdown = _TRUE; -+ else -+ pHalData->pwrdown = _FALSE; -+ -+ RTW_INFO("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown); -+ -+ return pHalData->pwrdown; -+} /* HalDetectPwrDownMode */ -+ -+static u32 rtl8703bs_hal_init(PADAPTER padapter) -+{ -+ s32 ret; -+ PHAL_DATA_TYPE pHalData; -+ struct pwrctrl_priv *pwrctrlpriv; -+ struct registry_priv *pregistrypriv; -+ struct sreset_priv *psrtpriv; -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ rt_rf_power_state eRfPowerStateToSet; -+ u32 NavUpper = WiFiNavUpperUs; -+ u8 u1bTmp; -+ u16 value16; -+ u8 typeid; -+ u32 u4Tmp; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ psrtpriv = &pHalData->srestpriv; -+ pwrctrlpriv = adapter_to_pwrctl(padapter); -+ pregistrypriv = &padapter->registrypriv; -+ -+#ifdef CONFIG_SWLPS_IN_IPS -+ if (adapter_to_pwrctl(padapter)->bips_processing == _TRUE) { -+ u8 val8, bMacPwrCtrlOn = _TRUE; -+ -+ RTW_INFO("%s: run LPS flow in IPS\n", __FUNCTION__); -+ -+ /* ser rpwm */ -+ val8 = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1); -+ val8 &= 0x80; -+ val8 += 0x80; -+ val8 |= BIT(6); -+ rtw_write8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1, val8); -+ -+ adapter_to_pwrctl(padapter)->tog = (val8 + 0x80) & 0x80; -+ -+ rtw_mdelay_os(5); /* wait set rpwm already */ -+ -+ ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8703B_leave_swlps_flow); -+ if (ret == _FALSE) { -+ RTW_INFO("%s: run LPS flow in IPS fail!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ -+ pHalData->LastHMEBoxNum = 0; -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_HAL_Initialize(padapter, _FALSE); -+#else -+ rtw_btcoex_HAL_Initialize(padapter, _TRUE); -+#endif /* CONFIG_BT_COEXIST */ -+ -+ return _SUCCESS; -+ } -+#elif defined(CONFIG_FWLPS_IN_IPS) -+ if (adapter_to_pwrctl(padapter)->bips_processing == _TRUE && psrtpriv->silent_reset_inprogress == _FALSE -+ && adapter_to_pwrctl(padapter)->pre_ips_type == 0) { -+ systime start_time; -+ u8 cpwm_orig, cpwm_now; -+ u8 val8, bMacPwrCtrlOn = _TRUE; -+ -+ RTW_INFO("%s: Leaving IPS in FWLPS state\n", __FUNCTION__); -+ -+ /* for polling cpwm */ -+ cpwm_orig = 0; -+ rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig); -+ -+ /* ser rpwm */ -+ val8 = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1); -+ val8 &= 0x80; -+ val8 += 0x80; -+ val8 |= BIT(6); -+ rtw_write8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1, val8); -+ RTW_INFO("%s: write rpwm=%02x\n", __FUNCTION__, val8); -+ adapter_to_pwrctl(padapter)->tog = (val8 + 0x80) & 0x80; -+ -+ /* do polling cpwm */ -+ start_time = rtw_get_current_time(); -+ do { -+ -+ rtw_mdelay_os(1); -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now); -+ if ((cpwm_orig ^ cpwm_now) & 0x80) { -+#ifdef DBG_CHECK_FW_PS_STATE -+ RTW_INFO("%s: polling cpwm ok when leaving IPS in FWLPS state, cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x\n" -+ , __FUNCTION__, cpwm_orig, cpwm_now, rtw_read8(padapter, REG_CR)); -+#endif /* DBG_CHECK_FW_PS_STATE */ -+ break; -+ } -+ -+ if (rtw_get_passing_time_ms(start_time) > 100) { -+ RTW_INFO("%s: polling cpwm timeout when leaving IPS in FWLPS state\n", __FUNCTION__); -+ break; -+ } -+ } while (1); -+ -+ rtl8703b_set_FwPwrModeInIPS_cmd(padapter, 0); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_HAL_Initialize(padapter, _FALSE); -+#else -+ rtw_btcoex_HAL_Initialize(padapter, _TRUE); -+#endif /* CONFIG_BT_COEXIST */ -+ -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ RTW_INFO("after hal init, fw ps state in 32k\n"); -+ pdbgpriv->dbg_ips_drvopen_fail_cnt++; -+ } -+#endif /* DBG_CHECK_FW_PS_STATE */ -+ return _SUCCESS; -+ } -+#endif /* CONFIG_SWLPS_IN_IPS */ -+ -+ /* Disable Interrupt first. -+ * rtw_hal_disable_interrupt(padapter); */ -+ -+ if (rtw_read8(padapter, REG_MCUFWDL) == 0xc6) -+ RTW_INFO("FW exist before power on!!\n"); -+ else -+ RTW_INFO("FW does not exist before power on!!\n"); -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ RTW_INFO("check fw_ps_state fail before PowerOn!\n"); -+ pdbgpriv->dbg_ips_drvopen_fail_cnt++; -+ } -+#endif -+ ret = rtw_hal_power_on(padapter); -+ if (_FAIL == ret) { -+ return _FAIL; -+ } -+ RTW_INFO("Power on ok!\n"); -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ RTW_INFO("check fw_ps_state fail after PowerOn!\n"); -+ pdbgpriv->dbg_ips_drvopen_fail_cnt++; -+ } -+#endif -+ -+ rtw_write8(padapter, REG_EARLY_MODE_CONTROL, 0); -+ -+ if (padapter->registrypriv.mp_mode == 0) { -+ ret = rtl8703b_FirmwareDownload(padapter, _FALSE); -+ if (ret != _SUCCESS) { -+ pHalData->bFWReady = _FALSE; -+ pHalData->fw_ractrl = _FALSE; -+ return ret; -+ } else { -+ pHalData->bFWReady = _TRUE; -+ pHalData->fw_ractrl = _TRUE; -+ } -+ } -+ -+ /* SIC_Init(padapter); */ -+ -+ if (pwrctrlpriv->reg_rfoff == _TRUE) -+ pwrctrlpriv->rf_pwrstate = rf_off; -+ -+ /* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */ -+ /* HW GPIO pin. Before PHY_RFConfig8192C. */ -+ HalDetectPwrDownMode(padapter); -+ -+ /* Set RF type for BB/RF configuration */ -+ _InitRFType(padapter); -+ -+ /* Save target channel */ -+ /* Current Channel will be updated again later. */ -+ pHalData->current_channel = 6; -+ -+#if (HAL_MAC_ENABLE == 1) -+ ret = PHY_MACConfig8703B(padapter); -+ if (ret != _SUCCESS) { -+ return ret; -+ } -+#endif -+ /* */ -+ /* d. Initialize BB related configurations. */ -+ /* */ -+#if (HAL_BB_ENABLE == 1) -+ ret = PHY_BBConfig8703B(padapter); -+ if (ret != _SUCCESS) { -+ return ret; -+ } -+ -+#endif -+ -+ /* If RF is on, we need to init RF. Otherwise, skip the procedure. */ -+ /* We need to follow SU method to change the RF cfg.txt. Default disable RF TX/RX mode. */ -+ /* if(pHalData->eRFPowerState == eRfOn) */ -+ { -+#if (HAL_RF_ENABLE == 1) -+ ret = PHY_RFConfig8703B(padapter); -+ if (ret != _SUCCESS) { -+ return ret; -+ } -+#endif -+ } -+ -+ _InitBBRegBackup_8703BS(padapter); -+ -+ _InitMacAPLLSetting_8703B(padapter); -+ -+ /* */ -+ /* Joseph Note: Keep RfRegChnlVal for later use. */ -+ /* */ -+ pHalData->RfRegChnlVal[0] = phy_query_rf_reg(padapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); -+ pHalData->RfRegChnlVal[1] = phy_query_rf_reg(padapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask); -+ -+#if 0 -+ /* Specially add for FWDL by Tx pkt write. Reset Tx/Rx DMA since the Tx boundary setting -+ is changed during FW download */ -+ rtw_write8(padapter, REG_CR, 0x00); -+ rtw_write8(padapter, REG_CR, 0xFF); -+#endif -+ -+ /* if (!pHalData->bMACFuncEnable) { */ -+ _InitQueueReservedPage(padapter); -+ _InitTxBufferBoundary(padapter); -+ -+ /* init LLT after tx buffer boundary is defined */ -+ ret = rtl8703b_InitLLTTable(padapter); -+ if (_SUCCESS != ret) { -+ RTW_INFO("%s: Failed to init LLT Table!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ /* } */ -+ _InitQueuePriority(padapter); -+ _InitPageBoundary(padapter); -+ _InitTransferPageSize(padapter); -+ -+ /* Get Rx PHY status in order to report RSSI and others. */ -+ _InitDriverInfoSize(padapter, DRVINFO_SZ); -+ _InitNetworkType(padapter); -+ _InitWMACSetting(padapter); -+ _InitAdaptiveCtrl(padapter); -+ _InitEDCA(padapter); -+ _InitRetryFunction(padapter); -+ _initSdioAggregationSetting(padapter); -+ -+ rtl8703b_InitBeaconParameters(padapter); -+ rtl8703b_InitBeaconMaxError(padapter, _TRUE); -+ _InitInterrupt(padapter); -+ _InitBurstPktLen_8703BS(padapter); -+ -+#if 0 -+ /* 8703B new ADD */ -+ _InitLTECoex_8703BS(padapter); -+#endif -+ -+ /* YJ,TODO */ -+ rtw_write8(padapter, REG_SECONDARY_CCA_CTRL_8703B, 0x3); /* CCA */ -+ rtw_write8(padapter, 0x976, 0); /* hpfan_todo: 2nd CCA related */ -+ -+ invalidate_cam_all(padapter); -+ -+ rtw_hal_set_chnl_bw(padapter, padapter->registrypriv.channel, -+ CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HAL_PRIME_CHNL_OFFSET_DONT_CARE); -+ -+ rtl8703b_InitAntenna_Selection(padapter); -+ -+ /* */ -+ /* Disable BAR, suggested by Scott */ -+ /* 2010.04.09 add by hpfan */ -+ /* */ -+ rtw_write32(padapter, REG_BAR_MODE_CTRL, 0x0201ffff); -+ -+ /* HW SEQ CTRL */ -+ /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */ -+ rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); -+ -+ -+#ifdef CONFIG_MAC_LOOPBACK_DRIVER -+ u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN); -+ u1bTmp &= ~(FEN_BBRSTB | FEN_BB_GLB_RSTn); -+ rtw_write8(padapter, REG_SYS_FUNC_EN, u1bTmp); -+ -+ rtw_write8(padapter, REG_RD_CTRL, 0x0F); -+ rtw_write8(padapter, REG_RD_CTRL + 1, 0xCF); -+ rtw_write8(padapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, 0x80); -+ rtw_write32(padapter, REG_CR, 0x0b0202ff); -+#endif -+ -+ /* */ -+ /* Configure SDIO TxRx Control to enable Rx DMA timer masking. */ -+ /* 2010.02.24. */ -+ /* */ -+ rtw_write32(padapter, SDIO_LOCAL_BASE | SDIO_REG_TX_CTRL, 0); -+ -+ -+ rtl8703b_InitHalDm(padapter); -+ -+ /* dbg_print("pHalData->DefaultTxPwrDbm = %d\n", pHalData->DefaultTxPwrDbm); */ -+ -+ /* if(pHalData->SwBeaconType < HAL92CSDIO_DEFAULT_BEACON_TYPE) */ /* The lowest Beacon Type that HW can support */ -+ /* pHalData->SwBeaconType = HAL92CSDIO_DEFAULT_BEACON_TYPE; */ -+ -+ /* */ -+ /* Update current Tx FIFO page status. */ -+ /* */ -+ HalQueryTxBufferStatus8703BSdio(padapter); -+ HalQueryTxOQTBufferStatus8703BSdio(padapter); -+ pHalData->SdioTxOQTMaxFreeSpace = pHalData->SdioTxOQTFreeSpace; -+ -+ /* Enable MACTXEN/MACRXEN block */ -+ u1bTmp = rtw_read8(padapter, REG_CR); -+ u1bTmp |= (MACTXEN | MACRXEN); -+ rtw_write8(padapter, REG_CR, u1bTmp); -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_NAV_UPPER, (u8 *)&NavUpper); -+ -+#ifdef CONFIG_XMIT_ACK -+ /* ack for xmit mgmt frames. */ -+ rtw_write32(padapter, REG_FWHW_TXQ_CTRL, rtw_read32(padapter, REG_FWHW_TXQ_CTRL) | BIT(12)); -+#endif /* CONFIG_XMIT_ACK */ -+ -+ /* pHalData->PreRpwmVal = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_HRPWM1) & 0x80; */ -+ -+#if (MP_DRIVER == 1) -+ if (padapter->registrypriv.mp_mode == 1) { -+ padapter->mppriv.channel = pHalData->current_channel; -+ MPT_InitializeAdapter(padapter, padapter->mppriv.channel); -+ } else -+#endif /* #if (MP_DRIVER == 1) */ -+ { -+ pwrctrlpriv->rf_pwrstate = rf_on; -+ -+ /*phy_lc_calibrate_8703b(&pHalData->odmpriv);*/ -+ halrf_lck_trigger(&pHalData->odmpriv); -+ -+ pHalData->neediqk_24g = _TRUE; -+ -+ odm_txpowertracking_check(&pHalData->odmpriv); -+ } -+ -+#ifdef CONFIG_BT_COEXIST -+ /* Init BT hw config.*/ -+ if (padapter->registrypriv.mp_mode == 1) -+ rtw_btcoex_HAL_Initialize(padapter, _TRUE); -+ else -+ rtw_btcoex_HAL_Initialize(padapter, _FALSE); -+#endif -+ -+ -+ return _SUCCESS; -+} -+ -+static void CardDisableRTL8703BSdio(PADAPTER padapter) -+{ -+ u8 u1bTmp; -+ u16 u2bTmp; -+ u32 u4bTmp; -+ u8 bMacPwrCtrlOn; -+ u8 ret = _FAIL; -+ -+ /* Run LPS WL RFOFF flow */ -+ ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8703B_enter_lps_flow); -+ if (ret == _FAIL) -+ RTW_ERR("%s: run RF OFF flow fail!\n", __func__); -+ -+ /* ==== Reset digital sequence ====== */ -+ -+ u1bTmp = rtw_read8(padapter, REG_MCUFWDL); -+ if ((u1bTmp & RAM_DL_SEL) && GET_HAL_DATA(padapter)->bFWReady) /* 8051 RAM code */ -+ rtl8703b_FirmwareSelfReset(padapter); -+ -+ /* Reset MCU 0x2[10]=0. Suggested by Filen. 2011.01.26. by tynli. */ -+ u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1); -+ u1bTmp &= ~BIT(2); /* 0x2[10], FEN_CPUEN */ -+ rtw_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp); -+ -+ /* MCUFWDL 0x80[1:0]=0 */ -+ /* reset MCU ready status */ -+ rtw_write8(padapter, REG_MCUFWDL, 0); -+ -+ /* Reset MCU IO Wrapper, added by Roger, 2011.08.30 */ -+ u1bTmp = rtw_read8(padapter, REG_RSV_CTRL + 1); -+ u1bTmp &= ~BIT(0); -+ rtw_write8(padapter, REG_RSV_CTRL + 1, u1bTmp); -+ u1bTmp = rtw_read8(padapter, REG_RSV_CTRL + 1); -+ u1bTmp |= BIT(0); -+ rtw_write8(padapter, REG_RSV_CTRL + 1, u1bTmp); -+ -+ /* ==== Reset digital sequence end ====== */ -+ -+ bMacPwrCtrlOn = _FALSE; /* Disable CMD53 R/W */ -+ ret = _FALSE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8703B_card_disable_flow); -+ if (ret == _FALSE) -+ RTW_ERR("%s: run CARD DISABLE flow fail!\n", __func__); -+ -+ GET_HAL_DATA(padapter)->bFWReady = _FALSE; -+} -+ -+static u32 rtl8703bs_hal_deinit(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->registrypriv.mp_mode == 1) -+ MPT_DeInitAdapter(padapter); -+#endif -+ -+ if (rtw_is_hw_init_completed(padapter)) { -+#ifdef CONFIG_SWLPS_IN_IPS -+ if (adapter_to_pwrctl(padapter)->bips_processing == _TRUE) { -+ u8 bMacPwrCtrlOn; -+ u8 ret = _TRUE; -+ -+ RTW_INFO("%s: run LPS flow in IPS\n", __FUNCTION__); -+ -+ rtw_write32(padapter, 0x130, 0x0); -+ rtw_write32(padapter, 0x138, 0x100); -+ rtw_write8(padapter, 0x13d, 0x1); -+ -+ -+ bMacPwrCtrlOn = _FALSE; /* Disable CMD53 R/W */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ -+ ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8703B_enter_swlps_flow); -+ if (ret == _FALSE) { -+ RTW_INFO("%s: run LPS flow in IPS fail!\n", __FUNCTION__); -+ return _FAIL; -+ } -+ } else -+#elif defined(CONFIG_FWLPS_IN_IPS) -+ if (adapter_to_pwrctl(padapter)->bips_processing == _TRUE && psrtpriv->silent_reset_inprogress == _FALSE) { -+ if (padapter->netif_up == _TRUE) { -+ int cnt = 0; -+ u8 val8 = 0; -+ -+ RTW_INFO("%s: issue H2C to FW when entering IPS\n", __FUNCTION__); -+ -+ rtl8703b_set_FwPwrModeInIPS_cmd(padapter, 0x1); -+ /* poll 0x1cc to make sure H2C command already finished by FW; MAC_0x1cc=0 means H2C done by FW. */ -+ do { -+ val8 = rtw_read8(padapter, REG_HMETFR); -+ cnt++; -+ RTW_INFO("%s polling REG_HMETFR=0x%x, cnt=%d\n", __FUNCTION__, val8, cnt); -+ rtw_mdelay_os(10); -+ } while (cnt < 100 && (val8 != 0)); -+ /* H2C done, enter 32k */ -+ if (val8 == 0) { -+ /* ser rpwm to enter 32k */ -+ val8 = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1); -+ val8 += 0x80; -+ val8 |= BIT(0); -+ rtw_write8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1, val8); -+ RTW_INFO("%s: write rpwm=%02x\n", __FUNCTION__, val8); -+ adapter_to_pwrctl(padapter)->tog = (val8 + 0x80) & 0x80; -+ cnt = val8 = 0; -+ do { -+ val8 = rtw_read8(padapter, REG_CR); -+ cnt++; -+ RTW_INFO("%s polling 0x100=0x%x, cnt=%d\n", __FUNCTION__, val8, cnt); -+ rtw_mdelay_os(10); -+ } while (cnt < 100 && (val8 != 0xEA)); -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (val8 != 0xEA) -+ RTW_INFO("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n", rtw_read32(padapter, 0x1c0), rtw_read32(padapter, 0x1c4) -+ , rtw_read32(padapter, 0x1c8), rtw_read32(padapter, 0x1cc)); -+#endif /* DBG_CHECK_FW_PS_STATE */ -+ } else { -+ RTW_INFO("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n", rtw_read32(padapter, 0x1c0), rtw_read32(padapter, 0x1c4) -+ , rtw_read32(padapter, 0x1c8), rtw_read32(padapter, 0x1cc)); -+ } -+ -+ RTW_INFO("polling done when entering IPS, check result : 0x100=0x%x, cnt=%d, MAC_1cc=0x%02x\n" -+ , rtw_read8(padapter, REG_CR), cnt, rtw_read8(padapter, REG_HMETFR)); -+ -+ adapter_to_pwrctl(padapter)->pre_ips_type = 0; -+ -+ } else { -+ pdbgpriv->dbg_carddisable_cnt++; -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ RTW_INFO("card disable should leave 32k\n"); -+ pdbgpriv->dbg_carddisable_error_cnt++; -+ } -+#endif /* DBG_CHECK_FW_PS_STATE */ -+ rtw_hal_power_off(padapter); -+ -+ adapter_to_pwrctl(padapter)->pre_ips_type = 1; -+ } -+ -+ } else -+#endif /* CONFIG_SWLPS_IN_IPS */ -+ { -+ pdbgpriv->dbg_carddisable_cnt++; -+#ifdef DBG_CHECK_FW_PS_STATE -+ if (rtw_fw_ps_state(padapter) == _FAIL) { -+ RTW_INFO("card disable should leave 32k\n"); -+ pdbgpriv->dbg_carddisable_error_cnt++; -+ } -+#endif /* DBG_CHECK_FW_PS_STATE */ -+ rtw_hal_power_off(padapter); -+ } -+ } else -+ pdbgpriv->dbg_deinit_fail_cnt++; -+ -+ return _SUCCESS; -+} -+static void rtl8703bs_init_default_value(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ rtl8703b_init_default_value(padapter); -+ -+ /* interface related variable */ -+ pHalData->SdioRxFIFOCnt = 0; -+} -+ -+static void rtl8703bs_interface_configure(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; -+ -+ -+ pdvobjpriv->RtOutPipe[0] = WLAN_TX_HIQ_DEVICE_ID; -+ pdvobjpriv->RtOutPipe[1] = WLAN_TX_MIQ_DEVICE_ID; -+ pdvobjpriv->RtOutPipe[2] = WLAN_TX_LOQ_DEVICE_ID; -+ -+ if (bWiFiConfig) -+ pHalData->OutEpNumber = 2; -+ else -+ pHalData->OutEpNumber = SDIO_MAX_TX_QUEUE; -+ -+ switch (pHalData->OutEpNumber) { -+ case 3: -+ pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ; -+ break; -+ case 2: -+ pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ; -+ break; -+ case 1: -+ pHalData->OutEpQueueSel = TX_SELE_HQ; -+ break; -+ default: -+ break; -+ } -+ -+ Hal_MappingOutPipe(padapter, pHalData->OutEpNumber); -+} -+ -+/* -+ * Description: -+ * We should set Efuse cell selection to WiFi cell in default. -+ * -+ * Assumption: -+ * PASSIVE_LEVEL -+ * -+ * Added by Roger, 2010.11.23. -+ * */ -+static void -+_EfuseCellSel( -+ PADAPTER padapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ u32 value32; -+ -+ /* if(INCLUDE_MULTI_FUNC_BT(padapter)) */ -+ { -+ value32 = rtw_read32(padapter, EFUSE_TEST); -+ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); -+ rtw_write32(padapter, EFUSE_TEST, value32); -+ } -+} -+ -+static void -+_ReadRFType( -+ PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+#if DISABLE_BB_RF -+ pHalData->rf_chip = RF_PSEUDO_11N; -+#else -+ pHalData->rf_chip = RF_6052; -+#endif -+} -+ -+static u8 -+_ReadEfuseInfo8703BS( -+ PADAPTER padapter -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ u8 *hwinfo = NULL; -+ u8 ret = _FAIL; -+ -+ /* */ -+ /* This part read and parse the eeprom/efuse content */ -+ /* */ -+ -+ if (sizeof(pHalData->efuse_eeprom_data) < HWSET_MAX_SIZE_8703B) -+ RTW_INFO("[WARNING] size of efuse_eeprom_data is less than HWSET_MAX_SIZE_8703B!\n"); -+ -+ hwinfo = pHalData->efuse_eeprom_data; -+ -+ Hal_InitPGData(padapter, hwinfo); -+ -+ Hal_EfuseParseIDCode(padapter, hwinfo); -+ Hal_EfuseParseEEPROMVer_8703B(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ hal_config_macaddr(padapter, pHalData->bautoload_fail_flag); -+ Hal_EfuseParseTxPowerInfo_8703B(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ Hal_EfuseParseBoardType_8703B(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ -+ /* */ -+ /* Read Bluetooth co-exist and initialize */ -+ /* */ -+ Hal_EfuseParseBTCoexistInfo_8703B(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ Hal_EfuseParseChnlPlan_8703B(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ Hal_EfuseParseXtal_8703B(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ Hal_EfuseParseThermalMeter_8703B(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ Hal_EfuseParseAntennaDiversity_8703B(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ Hal_EfuseParseCustomerID_8703B(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ -+ Hal_EfuseParseVoltage_8703B(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ -+#ifdef CONFIG_WOWLAN -+ Hal_DetectWoWMode(padapter); -+#endif -+ -+ Hal_ReadRFGainOffset(padapter, hwinfo, pHalData->bautoload_fail_flag); -+ -+ /* set coex. ant info once efuse parsing is done */ -+ rtw_btcoex_set_ant_info(padapter); -+ -+ if (hal_read_mac_hidden_rpt(padapter) != _SUCCESS) -+ goto exit; -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+static u8 _ReadPROMContent( -+ PADAPTER padapter -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ u8 eeValue; -+ u8 ret = _FAIL; -+ -+ eeValue = rtw_read8(padapter, REG_9346CR); -+ /* To check system boot selection. */ -+ pHalData->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; -+ pHalData->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; -+ -+ -+ /* pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; */ -+ -+ if (_ReadEfuseInfo8703BS(padapter) != _SUCCESS) -+ goto exit; -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+static void -+_InitOtherVariable( -+ PADAPTER Adapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ -+ -+ /* if(Adapter->bInHctTest){ */ -+ /* pMgntInfo->PowerSaveControl.bInactivePs = FALSE; */ -+ /* pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; */ -+ /* pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; */ -+ /* pMgntInfo->keepAliveLevel = 0; */ -+ /* } */ -+ -+ -+ -+} -+ -+/* -+ * Description: -+ * Read HW adapter information by E-Fuse or EEPROM according CR9346 reported. -+ * -+ * Assumption: -+ * PASSIVE_LEVEL (SDIO interface) -+ * -+ * */ -+static u8 ReadAdapterInfo8703BS(PADAPTER padapter) -+{ -+ u8 ret = _FAIL; -+ u8 val8; -+ -+ val8 = rtw_read8(padapter, 0x4e); -+ RTW_INFO("%s, 0x4e=0x%x\n", __func__, val8); -+ val8 |= BIT(6); -+ rtw_write8(padapter, 0x4e, val8); -+ -+ /* Read EEPROM size before call any EEPROM function */ -+ padapter->EepromAddressSize = GetEEPROMSize8703B(padapter); -+ -+ _EfuseCellSel(padapter); -+ _ReadRFType(padapter); -+ if (_ReadPROMContent(padapter) != _SUCCESS) -+ goto exit; -+ -+ _InitOtherVariable(padapter); -+ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ { /* for BT, let BT can control ANT when wifi disable */ -+ u32 val32; -+ RTW_INFO("%s, 0x4c=0x%x\n", __func__, rtw_read32(padapter, 0x4c)); -+ val32 = rtw_read32(padapter, 0x64); -+ RTW_INFO("%s, 0x64=0x%x\n", __func__, val32); -+ val32 |= BIT(13); -+ rtw_write32(padapter, 0x64, val32); -+ RTW_INFO("%s, 0x64=0x%x\n", __func__, rtw_read32(padapter, 0x64)); -+ } -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+/* -+ * If variable not handled here, -+ * some variables will be processed in SetHwReg8703B() -+ */ -+u8 SetHwReg8703BS(PADAPTER padapter, u8 variable, u8 *val) -+{ -+ PHAL_DATA_TYPE pHalData; -+ u8 ret = _SUCCESS; -+ u8 val8; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ switch (variable) { -+ case HW_VAR_SET_RPWM: -+ /* rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) */ -+ /* BIT0 value - 1: 32k, 0:40MHz. */ -+ /* BIT6 value - 1: report cpwm value after success set, 0:do not report. */ -+ /* BIT7 value - Toggle bit change. */ -+ { -+ val8 = *val; -+ val8 &= 0xC1; -+ rtw_write8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HRPWM1, val8); -+ } -+ break; -+ case HW_VAR_SET_REQ_FW_PS: -+ /* 1. driver write 0x8f[4]=1 */ { /* request fw ps state (only can write bit4) */ -+ u8 req_fw_ps = 0; -+ req_fw_ps = rtw_read8(padapter, 0x8f); -+ req_fw_ps |= 0x10; -+ rtw_write8(padapter, 0x8f, req_fw_ps); -+ } -+ break; -+ case HW_VAR_RXDMA_AGG_PG_TH: -+ #if 0 -+ val8 = *val; -+ -+ /* TH=1 => invalidate RX DMA aggregation */ -+ /* TH=0 => validate RX DMA aggregation, use init value. */ -+ if (val8 == 0) { -+ /* enable RXDMA aggregation */ -+ /* _RXAggrSwitch(padapter, _TRUE); */ -+ } else { -+ /* disable RXDMA aggregation */ -+ /* _RXAggrSwitch(padapter, _FALSE); */ -+ } -+ #endif -+ break; -+ default: -+ ret = SetHwReg8703B(padapter, variable, val); -+ break; -+ } -+ -+ return ret; -+} -+ -+/* -+ * If variable not handled here, -+ * some variables will be processed in GetHwReg8703B() -+ */ -+void GetHwReg8703BS(PADAPTER padapter, u8 variable, u8 *val) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ -+ switch (variable) { -+ case HW_VAR_CPWM: -+ *val = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HCPWM1_8703B); -+ break; -+ -+ case HW_VAR_FW_PS_STATE: { -+ /* 3. read dword 0x88 */ /* driver read fw ps state */ -+ *((u16 *)val) = rtw_read16(padapter, 0x88); -+ } -+ break; -+ default: -+ GetHwReg8703B(padapter, variable, val); -+ break; -+ } -+ -+} -+ -+/* -+ * Description: -+ * Query setting of specified variable. -+ * */ -+u8 -+GetHalDefVar8703BSDIO( -+ PADAPTER Adapter, -+ HAL_DEF_VARIABLE eVariable, -+ void *pValue -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -+ u8 bResult = _SUCCESS; -+ -+ switch (eVariable) { -+ case HAL_DEF_IS_SUPPORT_ANT_DIV: -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ *((u8 *)pValue) = _FALSE; -+#endif -+ break; -+ -+ case HW_VAR_MAX_RX_AMPDU_FACTOR: -+ /* Stanley@BB.SD3 suggests 16K can get stable performance */ -+ /* coding by Lucas@20130730 */ -+ *(HT_CAP_AMPDU_FACTOR *)pValue = MAX_AMPDU_FACTOR_16K; -+ break; -+ default: -+ bResult = GetHalDefVar8703B(Adapter, eVariable, pValue); -+ break; -+ } -+ -+ return bResult; -+} -+ -+/* -+ * Description: -+ * Change default setting of specified variable. -+ * */ -+u8 -+SetHalDefVar8703BSDIO( -+ PADAPTER Adapter, -+ HAL_DEF_VARIABLE eVariable, -+ void *pValue -+) -+{ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); -+ u8 bResult = _SUCCESS; -+ -+ switch (eVariable) { -+ default: -+ bResult = SetHalDefVar8703B(Adapter, eVariable, pValue); -+ break; -+ } -+ -+ return bResult; -+} -+ -+void rtl8703bs_set_hal_ops(PADAPTER padapter) -+{ -+ struct hal_ops *pHalFunc = &padapter->hal_func; -+ -+ -+ rtl8703b_set_hal_ops(pHalFunc); -+ -+ pHalFunc->hal_power_on = &_InitPowerOn_8703BS; -+ pHalFunc->hal_power_off = &CardDisableRTL8703BSdio; -+ -+ -+ pHalFunc->hal_init = &rtl8703bs_hal_init; -+ pHalFunc->hal_deinit = &rtl8703bs_hal_deinit; -+ -+ pHalFunc->init_xmit_priv = &rtl8703bs_init_xmit_priv; -+ pHalFunc->free_xmit_priv = &rtl8703bs_free_xmit_priv; -+ -+ pHalFunc->init_recv_priv = &rtl8703bs_init_recv_priv; -+ pHalFunc->free_recv_priv = &rtl8703bs_free_recv_priv; -+#ifdef CONFIG_RECV_THREAD_MODE -+ pHalFunc->recv_hdl = rtl8703bs_recv_hdl; -+#endif /* CONFIG_RECV_THREAD_MODE */ -+#ifdef CONFIG_RTW_SW_LED -+ pHalFunc->InitSwLeds = &rtl8703bs_InitSwLeds; -+ pHalFunc->DeInitSwLeds = &rtl8703bs_DeInitSwLeds; -+#endif -+ pHalFunc->init_default_value = &rtl8703bs_init_default_value; -+ pHalFunc->intf_chip_configure = &rtl8703bs_interface_configure; -+ pHalFunc->read_adapter_info = &ReadAdapterInfo8703BS; -+ -+ pHalFunc->enable_interrupt = &EnableInterrupt8703BSdio; -+ pHalFunc->disable_interrupt = &DisableInterrupt8703BSdio; -+ pHalFunc->check_ips_status = &CheckIPSStatus; -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ pHalFunc->clear_interrupt = &ClearInterrupt8703BSdio; -+#endif -+ pHalFunc->set_hw_reg_handler = &SetHwReg8703BS; -+ pHalFunc->GetHwRegHandler = &GetHwReg8703BS; -+ pHalFunc->get_hal_def_var_handler = &GetHalDefVar8703BSDIO; -+ pHalFunc->SetHalDefVarHandler = &SetHalDefVar8703BSDIO; -+ -+ pHalFunc->hal_xmit = &rtl8703bs_hal_xmit; -+ pHalFunc->mgnt_xmit = &rtl8703bs_mgnt_xmit; -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ pHalFunc->hal_mgmt_xmitframe_enqueue = &rtl8703bs_hal_mgmt_xmitframe_enqueue; -+#endif -+ pHalFunc->hal_xmitframe_enqueue = &rtl8703bs_hal_xmitframe_enqueue; -+ -+#ifdef CONFIG_HOSTAPD_MLME -+ pHalFunc->hostap_mgnt_xmit_entry = NULL; -+#endif -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+ pHalFunc->hal_init_checkbthang_workqueue = &rtl8703bs_init_checkbthang_workqueue; -+ pHalFunc->hal_free_checkbthang_workqueue = &rtl8703bs_free_checkbthang_workqueue; -+ pHalFunc->hal_cancle_checkbthang_workqueue = &rtl8703bs_cancle_checkbthang_workqueue; -+ pHalFunc->hal_checke_bt_hang = &rtl8703bs_hal_check_bt_hang; -+#endif -+ -+} -diff --git a/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/sdio_ops.c b/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/sdio_ops.c -new file mode 100644 -index 000000000000..0f8cfb856473 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/hal/rtl8703b/sdio/sdio_ops.c -@@ -0,0 +1,1669 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _SDIO_OPS_C_ -+ -+#include -+ -+/* #define SDIO_DEBUG_IO 1 */ -+ -+ -+/* -+ * Description: -+ * The following mapping is for SDIO host local register space. -+ * -+ * Creadted by Roger, 2011.01.31. -+ * */ -+static void HalSdioGetCmdAddr8703BSdio( -+ PADAPTER padapter, -+ u8 DeviceID, -+ u32 Addr, -+ u32 *pCmdAddr -+) -+{ -+ switch (DeviceID) { -+ case SDIO_LOCAL_DEVICE_ID: -+ *pCmdAddr = ((SDIO_LOCAL_DEVICE_ID << 13) | (Addr & SDIO_LOCAL_MSK)); -+ break; -+ -+ case WLAN_IOREG_DEVICE_ID: -+ *pCmdAddr = ((WLAN_IOREG_DEVICE_ID << 13) | (Addr & WLAN_IOREG_MSK)); -+ break; -+ -+ case WLAN_TX_HIQ_DEVICE_ID: -+ *pCmdAddr = ((WLAN_TX_HIQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); -+ break; -+ -+ case WLAN_TX_MIQ_DEVICE_ID: -+ *pCmdAddr = ((WLAN_TX_MIQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); -+ break; -+ -+ case WLAN_TX_LOQ_DEVICE_ID: -+ *pCmdAddr = ((WLAN_TX_LOQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); -+ break; -+ -+ case WLAN_RX0FF_DEVICE_ID: -+ *pCmdAddr = ((WLAN_RX0FF_DEVICE_ID << 13) | (Addr & WLAN_RX0FF_MSK)); -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+static u8 get_deviceid(u32 addr) -+{ -+ u8 devideId; -+ u16 pseudoId; -+ -+ -+ pseudoId = (u16)(addr >> 16); -+ switch (pseudoId) { -+ case 0x1025: -+ devideId = SDIO_LOCAL_DEVICE_ID; -+ break; -+ -+ case 0x1026: -+ devideId = WLAN_IOREG_DEVICE_ID; -+ break; -+ -+ /* case 0x1027: -+ * devideId = SDIO_FIRMWARE_FIFO; -+ * break; */ -+ -+ case 0x1031: -+ devideId = WLAN_TX_HIQ_DEVICE_ID; -+ break; -+ -+ case 0x1032: -+ devideId = WLAN_TX_MIQ_DEVICE_ID; -+ break; -+ -+ case 0x1033: -+ devideId = WLAN_TX_LOQ_DEVICE_ID; -+ break; -+ -+ case 0x1034: -+ devideId = WLAN_RX0FF_DEVICE_ID; -+ break; -+ -+ default: -+ /* devideId = (u8)((addr >> 13) & 0xF); */ -+ devideId = WLAN_IOREG_DEVICE_ID; -+ break; -+ } -+ -+ return devideId; -+} -+ -+/* -+ * Ref: -+ * HalSdioGetCmdAddr8703BSdio() -+ */ -+static u32 _cvrt2ftaddr(const u32 addr, u8 *pdeviceId, u16 *poffset) -+{ -+ u8 deviceId; -+ u16 offset; -+ u32 ftaddr; -+ -+ -+ deviceId = get_deviceid(addr); -+ offset = 0; -+ -+ switch (deviceId) { -+ case SDIO_LOCAL_DEVICE_ID: -+ offset = addr & SDIO_LOCAL_MSK; -+ break; -+ -+ case WLAN_TX_HIQ_DEVICE_ID: -+ case WLAN_TX_MIQ_DEVICE_ID: -+ case WLAN_TX_LOQ_DEVICE_ID: -+ offset = addr & WLAN_FIFO_MSK; -+ break; -+ -+ case WLAN_RX0FF_DEVICE_ID: -+ offset = addr & WLAN_RX0FF_MSK; -+ break; -+ -+ case WLAN_IOREG_DEVICE_ID: -+ default: -+ deviceId = WLAN_IOREG_DEVICE_ID; -+ offset = addr & WLAN_IOREG_MSK; -+ break; -+ } -+ ftaddr = (deviceId << 13) | offset; -+ -+ if (pdeviceId) -+ *pdeviceId = deviceId; -+ if (poffset) -+ *poffset = offset; -+ -+ return ftaddr; -+} -+ -+u8 sdio_read8(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ u32 ftaddr; -+ u8 val; -+ -+ ftaddr = _cvrt2ftaddr(addr, NULL, NULL); -+ val = sd_read8(pintfhdl, ftaddr, NULL); -+ -+ -+ return val; -+} -+ -+u16 sdio_read16(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ u32 ftaddr; -+ u16 val; -+ -+ ftaddr = _cvrt2ftaddr(addr, NULL, NULL); -+ val = 0; -+ sd_cmd52_read(pintfhdl, ftaddr, 2, (u8 *)&val); -+ val = le16_to_cpu(val); -+ -+ -+ return val; -+} -+ -+u32 sdio_read32(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ PADAPTER padapter; -+ u8 bMacPwrCtrlOn; -+ u8 deviceId; -+ u16 offset; -+ u32 ftaddr; -+ u8 shift; -+ u32 val; -+ s32 err; -+ -+ -+ padapter = pintfhdl->padapter; -+ ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); -+ -+ bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) -+ || (_FALSE == bMacPwrCtrlOn) -+#ifdef CONFIG_LPS_LCLK -+ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -+#endif -+ ) { -+ val = 0; -+ err = sd_cmd52_read(pintfhdl, ftaddr, 4, (u8 *)&val); -+#ifdef SDIO_DEBUG_IO -+ if (!err) { -+#endif -+ val = le32_to_cpu(val); -+ return val; -+#ifdef SDIO_DEBUG_IO -+ } -+ -+ RTW_ERR("%s: Mac Power off, Read FAIL(%d)! addr=0x%x\n", __func__, err, addr); -+ return SDIO_ERR_VAL32; -+#endif -+ } -+ -+ /* 4 bytes alignment */ -+ shift = ftaddr & 0x3; -+ if (shift == 0) -+ val = sd_read32(pintfhdl, ftaddr, NULL); -+ else { -+ u8 *ptmpbuf; -+ -+ ptmpbuf = (u8 *)rtw_malloc(8); -+ if (NULL == ptmpbuf) { -+ RTW_ERR("%s: Allocate memory FAIL!(size=8) addr=0x%x\n", __func__, addr); -+ return SDIO_ERR_VAL32; -+ } -+ -+ ftaddr &= ~(u16)0x3; -+ sd_read(pintfhdl, ftaddr, 8, ptmpbuf); -+ _rtw_memcpy(&val, ptmpbuf + shift, 4); -+ val = le32_to_cpu(val); -+ -+ rtw_mfree(ptmpbuf, 8); -+ } -+ -+ -+ return val; -+} -+ -+s32 sdio_readN(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pbuf) -+{ -+ PADAPTER padapter; -+ u8 bMacPwrCtrlOn; -+ u8 deviceId; -+ u16 offset; -+ u32 ftaddr; -+ u8 shift; -+ s32 err; -+ -+ -+ padapter = pintfhdl->padapter; -+ err = 0; -+ -+ ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); -+ -+ bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) -+ || (_FALSE == bMacPwrCtrlOn) -+#ifdef CONFIG_LPS_LCLK -+ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -+#endif -+ ) { -+ err = sd_cmd52_read(pintfhdl, ftaddr, cnt, pbuf); -+ return err; -+ } -+ -+ /* 4 bytes alignment */ -+ shift = ftaddr & 0x3; -+ if (shift == 0) -+ err = sd_read(pintfhdl, ftaddr, cnt, pbuf); -+ else { -+ u8 *ptmpbuf; -+ u32 n; -+ -+ ftaddr &= ~(u16)0x3; -+ n = cnt + shift; -+ ptmpbuf = rtw_malloc(n); -+ if (NULL == ptmpbuf) -+ return -1; -+ err = sd_read(pintfhdl, ftaddr, n, ptmpbuf); -+ if (!err) -+ _rtw_memcpy(pbuf, ptmpbuf + shift, cnt); -+ rtw_mfree(ptmpbuf, n); -+ } -+ -+ -+ return err; -+} -+ -+s32 sdio_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) -+{ -+ u32 ftaddr; -+ s32 err; -+ -+ ftaddr = _cvrt2ftaddr(addr, NULL, NULL); -+ err = 0; -+ sd_write8(pintfhdl, ftaddr, val, &err); -+ -+ -+ return err; -+} -+ -+s32 sdio_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) -+{ -+ u32 ftaddr; -+ u8 shift; -+ s32 err; -+ -+ ftaddr = _cvrt2ftaddr(addr, NULL, NULL); -+ val = cpu_to_le16(val); -+ err = sd_cmd52_write(pintfhdl, ftaddr, 2, (u8 *)&val); -+ -+ -+ return err; -+} -+ -+s32 sdio_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) -+{ -+ PADAPTER padapter; -+ u8 bMacPwrCtrlOn; -+ u8 deviceId; -+ u16 offset; -+ u32 ftaddr; -+ u8 shift; -+ s32 err; -+ -+ -+ padapter = pintfhdl->padapter; -+ err = 0; -+ -+ ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); -+ -+ bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) -+ || (_FALSE == bMacPwrCtrlOn) -+#ifdef CONFIG_LPS_LCLK -+ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -+#endif -+ ) { -+ val = cpu_to_le32(val); -+ err = sd_cmd52_write(pintfhdl, ftaddr, 4, (u8 *)&val); -+ return err; -+ } -+ -+ /* 4 bytes alignment */ -+ shift = ftaddr & 0x3; -+#if 1 -+ if (shift == 0) -+ sd_write32(pintfhdl, ftaddr, val, &err); -+ else { -+ val = cpu_to_le32(val); -+ err = sd_cmd52_write(pintfhdl, ftaddr, 4, (u8 *)&val); -+ } -+#else -+ if (shift == 0) -+ sd_write32(pintfhdl, ftaddr, val, &err); -+ else { -+ u8 *ptmpbuf; -+ -+ ptmpbuf = (u8 *)rtw_malloc(8); -+ if (NULL == ptmpbuf) -+ return -1; -+ -+ ftaddr &= ~(u16)0x3; -+ err = sd_read(pintfhdl, ftaddr, 8, ptmpbuf); -+ if (err) { -+ rtw_mfree(ptmpbuf, 8); -+ return err; -+ } -+ val = cpu_to_le32(val); -+ _rtw_memcpy(ptmpbuf + shift, &val, 4); -+ err = sd_write(pintfhdl, ftaddr, 8, ptmpbuf); -+ -+ rtw_mfree(ptmpbuf, 8); -+ } -+#endif -+ -+ -+ return err; -+} -+ -+s32 sdio_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pbuf) -+{ -+ PADAPTER padapter; -+ u8 bMacPwrCtrlOn; -+ u8 deviceId; -+ u16 offset; -+ u32 ftaddr; -+ u8 shift; -+ s32 err; -+ -+ -+ padapter = pintfhdl->padapter; -+ err = 0; -+ -+ ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); -+ -+ bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) -+ || (_FALSE == bMacPwrCtrlOn) -+#ifdef CONFIG_LPS_LCLK -+ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -+#endif -+ ) { -+ err = sd_cmd52_write(pintfhdl, ftaddr, cnt, pbuf); -+ return err; -+ } -+ -+ shift = ftaddr & 0x3; -+ if (shift == 0) -+ err = sd_write(pintfhdl, ftaddr, cnt, pbuf); -+ else { -+ u8 *ptmpbuf; -+ u32 n; -+ -+ ftaddr &= ~(u16)0x3; -+ n = cnt + shift; -+ ptmpbuf = rtw_malloc(n); -+ if (NULL == ptmpbuf) -+ return -1; -+ err = sd_read(pintfhdl, ftaddr, 4, ptmpbuf); -+ if (err) { -+ rtw_mfree(ptmpbuf, n); -+ return err; -+ } -+ _rtw_memcpy(ptmpbuf + shift, pbuf, cnt); -+ err = sd_write(pintfhdl, ftaddr, n, ptmpbuf); -+ rtw_mfree(ptmpbuf, n); -+ } -+ -+ -+ return err; -+} -+ -+u8 sdio_f0_read8(struct intf_hdl *pintfhdl, u32 addr) -+{ -+ u32 ftaddr; -+ u8 val; -+ -+ val = sd_f0_read8(pintfhdl, addr, NULL); -+ -+ -+ return val; -+} -+ -+void sdio_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) -+{ -+ s32 err; -+ -+ -+ err = sdio_readN(pintfhdl, addr, cnt, rmem); -+ -+} -+ -+void sdio_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) -+{ -+ -+ sdio_writeN(pintfhdl, addr, cnt, wmem); -+ -+} -+ -+/* -+ * Description: -+ * Read from RX FIFO -+ * Round read size to block size, -+ * and make sure data transfer will be done in one command. -+ * -+ * Parameters: -+ * pintfhdl a pointer of intf_hdl -+ * addr port ID -+ * cnt size to read -+ * rmem address to put data -+ * -+ * Return: -+ * _SUCCESS(1) Success -+ * _FAIL(0) Fail -+ */ -+static u32 sdio_read_port( -+ struct intf_hdl *pintfhdl, -+ u32 addr, -+ u32 cnt, -+ u8 *mem) -+{ -+ PADAPTER padapter; -+ PHAL_DATA_TYPE phal; -+ u32 oldcnt; -+#ifdef SDIO_DYNAMIC_ALLOC_MEM -+ u8 *oldmem; -+#endif -+ s32 err; -+ -+ -+ padapter = pintfhdl->padapter; -+ phal = GET_HAL_DATA(padapter); -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, addr, phal->SdioRxFIFOCnt++, &addr); -+ -+ oldcnt = cnt; -+ cnt = rtw_sdio_cmd53_align_size(adapter_to_dvobj(padapter), cnt); -+ -+ if (oldcnt != cnt) { -+#ifdef SDIO_DYNAMIC_ALLOC_MEM -+ oldmem = mem; -+ mem = rtw_malloc(cnt); -+ if (mem == NULL) { -+ RTW_WARN("%s: allocate memory %d bytes fail!\n", __func__, cnt); -+ mem = oldmem; -+ oldmem == NULL; -+ } -+#else -+ /* in this case, caller should gurante the buffer is big enough */ -+ /* to receive data after alignment */ -+#endif -+ } -+ -+ err = _sd_read(pintfhdl, addr, cnt, mem); -+ -+#ifdef SDIO_DYNAMIC_ALLOC_MEM -+ if ((oldcnt != cnt) && (oldmem)) { -+ _rtw_memcpy(oldmem, mem, oldcnt); -+ rtw_mfree(mem, cnt); -+ } -+#endif -+ -+ if (err) -+ return _FAIL; -+ return _SUCCESS; -+} -+ -+/* -+ * Description: -+ * Write to TX FIFO -+ * Align write size block size, -+ * and make sure data could be written in one command. -+ * -+ * Parameters: -+ * pintfhdl a pointer of intf_hdl -+ * addr port ID -+ * cnt size to write -+ * wmem data pointer to write -+ * -+ * Return: -+ * _SUCCESS(1) Success -+ * _FAIL(0) Fail -+ */ -+static u32 sdio_write_port( -+ struct intf_hdl *pintfhdl, -+ u32 addr, -+ u32 cnt, -+ u8 *mem) -+{ -+ PADAPTER padapter; -+ s32 err; -+ struct xmit_buf *xmitbuf = (struct xmit_buf *)mem; -+ -+ padapter = pintfhdl->padapter; -+ -+ if (!rtw_is_hw_init_completed(padapter)) { -+ RTW_INFO("%s [addr=0x%x cnt=%d] padapter->hw_init_completed == _FALSE\n", __func__, addr, cnt); -+ return _FAIL; -+ } -+ -+ cnt = _RND4(cnt); -+ HalSdioGetCmdAddr8703BSdio(padapter, addr, cnt >> 2, &addr); -+ -+ cnt = rtw_sdio_cmd53_align_size(adapter_to_dvobj(padapter), cnt); -+ -+ err = sd_write(pintfhdl, addr, cnt, xmitbuf->pdata); -+ -+ rtw_sctx_done_err(&xmitbuf->sctx, -+ err ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS); -+ -+ if (err) -+ return _FAIL; -+ return _SUCCESS; -+} -+ -+void sdio_set_intf_ops(_adapter *padapter, struct _io_ops *pops) -+{ -+ -+ pops->_read8 = &sdio_read8; -+ pops->_read16 = &sdio_read16; -+ pops->_read32 = &sdio_read32; -+ pops->_read_mem = &sdio_read_mem; -+ pops->_read_port = &sdio_read_port; -+ -+ pops->_write8 = &sdio_write8; -+ pops->_write16 = &sdio_write16; -+ pops->_write32 = &sdio_write32; -+ pops->_writeN = &sdio_writeN; -+ pops->_write_mem = &sdio_write_mem; -+ pops->_write_port = &sdio_write_port; -+ -+ pops->_sd_f0_read8 = sdio_f0_read8; -+ -+} -+ -+/* -+ * Todo: align address to 4 bytes. -+ */ -+s32 _sdio_local_read( -+ PADAPTER padapter, -+ u32 addr, -+ u32 cnt, -+ u8 *pbuf) -+{ -+ struct intf_hdl *pintfhdl; -+ u8 bMacPwrCtrlOn; -+ s32 err; -+ u8 *ptmpbuf; -+ u32 n; -+ -+ -+ pintfhdl = &padapter->iopriv.intf; -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ -+ bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if (_FALSE == bMacPwrCtrlOn) { -+ err = _sd_cmd52_read(pintfhdl, addr, cnt, pbuf); -+ return err; -+ } -+ -+ n = RND4(cnt); -+ ptmpbuf = (u8 *)rtw_malloc(n); -+ if (!ptmpbuf) -+ return -1; -+ -+ err = _sd_read(pintfhdl, addr, n, ptmpbuf); -+ if (!err) -+ _rtw_memcpy(pbuf, ptmpbuf, cnt); -+ -+ if (ptmpbuf) -+ rtw_mfree(ptmpbuf, n); -+ -+ return err; -+} -+ -+/* -+ * Todo: align address to 4 bytes. -+ */ -+s32 sdio_local_read( -+ PADAPTER padapter, -+ u32 addr, -+ u32 cnt, -+ u8 *pbuf) -+{ -+ struct intf_hdl *pintfhdl; -+ u8 bMacPwrCtrlOn; -+ s32 err; -+ u8 *ptmpbuf; -+ u32 n; -+ -+ pintfhdl = &padapter->iopriv.intf; -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ -+ bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if ((_FALSE == bMacPwrCtrlOn) -+#ifdef CONFIG_LPS_LCLK -+ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -+#endif -+ ) { -+ err = sd_cmd52_read(pintfhdl, addr, cnt, pbuf); -+ return err; -+ } -+ -+ n = RND4(cnt); -+ ptmpbuf = (u8 *)rtw_malloc(n); -+ if (!ptmpbuf) -+ return -1; -+ -+ err = sd_read(pintfhdl, addr, n, ptmpbuf); -+ if (!err) -+ _rtw_memcpy(pbuf, ptmpbuf, cnt); -+ -+ if (ptmpbuf) -+ rtw_mfree(ptmpbuf, n); -+ -+ return err; -+} -+ -+/* -+ * Todo: align address to 4 bytes. -+ */ -+s32 _sdio_local_write( -+ PADAPTER padapter, -+ u32 addr, -+ u32 cnt, -+ u8 *pbuf) -+{ -+ struct intf_hdl *pintfhdl; -+ u8 bMacPwrCtrlOn; -+ s32 err; -+ u8 *ptmpbuf; -+ -+ if (addr & 0x3) -+ RTW_INFO("%s, address must be 4 bytes alignment\n", __FUNCTION__); -+ -+ if (cnt & 0x3) -+ RTW_INFO("%s, size must be the multiple of 4\n", __FUNCTION__); -+ -+ pintfhdl = &padapter->iopriv.intf; -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ -+ bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if ((_FALSE == bMacPwrCtrlOn) -+#ifdef CONFIG_LPS_LCLK -+ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -+#endif -+ ) { -+ err = _sd_cmd52_write(pintfhdl, addr, cnt, pbuf); -+ return err; -+ } -+ -+ ptmpbuf = (u8 *)rtw_malloc(cnt); -+ if (!ptmpbuf) -+ return -1; -+ -+ _rtw_memcpy(ptmpbuf, pbuf, cnt); -+ -+ err = _sd_write(pintfhdl, addr, cnt, ptmpbuf); -+ -+ if (ptmpbuf) -+ rtw_mfree(ptmpbuf, cnt); -+ -+ return err; -+} -+ -+/* -+ * Todo: align address to 4 bytes. -+ */ -+s32 sdio_local_write( -+ PADAPTER padapter, -+ u32 addr, -+ u32 cnt, -+ u8 *pbuf) -+{ -+ struct intf_hdl *pintfhdl; -+ u8 bMacPwrCtrlOn; -+ s32 err; -+ u8 *ptmpbuf; -+ -+ if (addr & 0x3) -+ RTW_INFO("%s, address must be 4 bytes alignment\n", __FUNCTION__); -+ -+ if (cnt & 0x3) -+ RTW_INFO("%s, size must be the multiple of 4\n", __FUNCTION__); -+ -+ pintfhdl = &padapter->iopriv.intf; -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ -+ bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if ((_FALSE == bMacPwrCtrlOn) -+#ifdef CONFIG_LPS_LCLK -+ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -+#endif -+ ) { -+ err = sd_cmd52_write(pintfhdl, addr, cnt, pbuf); -+ return err; -+ } -+ -+ ptmpbuf = (u8 *)rtw_malloc(cnt); -+ if (!ptmpbuf) -+ return -1; -+ -+ _rtw_memcpy(ptmpbuf, pbuf, cnt); -+ -+ err = sd_write(pintfhdl, addr, cnt, ptmpbuf); -+ -+ if (ptmpbuf) -+ rtw_mfree(ptmpbuf, cnt); -+ -+ return err; -+} -+ -+u8 SdioLocalCmd52Read1Byte(PADAPTER padapter, u32 addr) -+{ -+ u8 val = 0; -+ struct intf_hdl *pintfhdl = &padapter->iopriv.intf; -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ sd_cmd52_read(pintfhdl, addr, 1, &val); -+ -+ return val; -+} -+ -+u16 SdioLocalCmd52Read2Byte(PADAPTER padapter, u32 addr) -+{ -+ u16 val = 0; -+ struct intf_hdl *pintfhdl = &padapter->iopriv.intf; -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ sd_cmd52_read(pintfhdl, addr, 2, (u8 *)&val); -+ -+ val = le16_to_cpu(val); -+ -+ return val; -+} -+ -+u32 SdioLocalCmd52Read4Byte(PADAPTER padapter, u32 addr) -+{ -+ u32 val = 0; -+ struct intf_hdl *pintfhdl = &padapter->iopriv.intf; -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ sd_cmd52_read(pintfhdl, addr, 4, (u8 *)&val); -+ -+ val = le32_to_cpu(val); -+ -+ return val; -+} -+ -+u32 SdioLocalCmd53Read4Byte(PADAPTER padapter, u32 addr) -+{ -+ -+ u8 bMacPwrCtrlOn; -+ u32 val = 0; -+ struct intf_hdl *pintfhdl = &padapter->iopriv.intf; -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if ((_FALSE == bMacPwrCtrlOn) -+#ifdef CONFIG_LPS_LCLK -+ || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -+#endif -+ ) { -+ sd_cmd52_read(pintfhdl, addr, 4, (u8 *)&val); -+ val = le32_to_cpu(val); -+ } else -+ val = sd_read32(pintfhdl, addr, NULL); -+ -+ return val; -+} -+ -+void SdioLocalCmd52Write1Byte(PADAPTER padapter, u32 addr, u8 v) -+{ -+ struct intf_hdl *pintfhdl = &padapter->iopriv.intf; -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ sd_cmd52_write(pintfhdl, addr, 1, &v); -+} -+ -+void SdioLocalCmd52Write2Byte(PADAPTER padapter, u32 addr, u16 v) -+{ -+ struct intf_hdl *pintfhdl = &padapter->iopriv.intf; -+ -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ v = cpu_to_le16(v); -+ sd_cmd52_write(pintfhdl, addr, 2, (u8 *)&v); -+} -+ -+void SdioLocalCmd52Write4Byte(PADAPTER padapter, u32 addr, u32 v) -+{ -+ struct intf_hdl *pintfhdl = &padapter->iopriv.intf; -+ HalSdioGetCmdAddr8703BSdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); -+ v = cpu_to_le32(v); -+ sd_cmd52_write(pintfhdl, addr, 4, (u8 *)&v); -+} -+ -+#if 0 -+void -+DumpLoggedInterruptHistory8703Sdio( -+ PADAPTER padapter -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u32 DebugLevel = DBG_LOUD; -+ -+ if (DBG_Var.DbgPrintIsr == 0) -+ return; -+ -+ DBG_ChkDrvResource(padapter); -+ -+ -+} -+ -+void -+LogInterruptHistory8703Sdio( -+ PADAPTER padapter, -+ PRT_ISR_CONTENT pIsrContent -+) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_RX_REQUEST_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_RX_REQUEST)) -+ pHalData->InterruptLog.nISR_RX_REQUEST++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_AVAL_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_AVAL)) -+ pHalData->InterruptLog.nISR_AVAL++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_TXERR_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_TXERR)) -+ pHalData->InterruptLog.nISR_TXERR++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_RXERR_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_RXERR)) -+ pHalData->InterruptLog.nISR_RXERR++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_TXFOVW_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_TXFOVW)) -+ pHalData->InterruptLog.nISR_TXFOVW++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_RXFOVW_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_RXFOVW)) -+ pHalData->InterruptLog.nISR_RXFOVW++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_TXBCNOK_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_TXBCNOK)) -+ pHalData->InterruptLog.nISR_TXBCNOK++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_TXBCNERR_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_TXBCNERR)) -+ pHalData->InterruptLog.nISR_TXBCNERR++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_BCNERLY_INT_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_BCNERLY_INT)) -+ pHalData->InterruptLog.nISR_BCNERLY_INT++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_C2HCMD_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_C2HCMD)) -+ pHalData->InterruptLog.nISR_C2HCMD++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_CPWM1_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_CPWM1)) -+ pHalData->InterruptLog.nISR_CPWM1++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_CPWM2_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_CPWM2)) -+ pHalData->InterruptLog.nISR_CPWM2++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_HSISR_IND_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_HSISR_IND)) -+ pHalData->InterruptLog.nISR_HSISR_IND++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_GTINT3_IND_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_GTINT3_IND)) -+ pHalData->InterruptLog.nISR_GTINT3_IND++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_GTINT4_IND_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_GTINT4_IND)) -+ pHalData->InterruptLog.nISR_GTINT4_IND++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_PSTIMEOUT_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_PSTIMEOUT)) -+ pHalData->InterruptLog.nISR_PSTIMEOUT++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_OCPINT_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_OCPINT)) -+ pHalData->InterruptLog.nISR_OCPINT++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_ATIMEND_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_ATIMEND)) -+ pHalData->InterruptLog.nISR_ATIMEND++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_ATIMEND_E_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_ATIMEND_E)) -+ pHalData->InterruptLog.nISR_ATIMEND_E++; -+ if ((pHalData->IntrMask[0] & SDIO_HIMR_CTWEND_MSK) && -+ (pIsrContent->IntArray[0] & SDIO_HISR_CTWEND)) -+ pHalData->InterruptLog.nISR_CTWEND++; -+ -+} -+ -+void -+DumpHardwareProfile8703Sdio( -+ PADAPTER padapter -+) -+{ -+ DumpLoggedInterruptHistory8703Sdio(padapter); -+} -+#endif -+ -+static s32 ReadInterrupt8703BSdio(PADAPTER padapter, u32 *phisr) -+{ -+ u32 hisr, himr; -+ u8 val8, hisr_len; -+ -+ -+ if (phisr == NULL) -+ return _FALSE; -+ -+ himr = GET_HAL_DATA(padapter)->sdio_himr; -+ -+ /* decide how many bytes need to be read */ -+ hisr_len = 0; -+ while (himr) { -+ hisr_len++; -+ himr >>= 8; -+ } -+ -+ hisr = 0; -+ while (hisr_len != 0) { -+ hisr_len--; -+ val8 = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_HISR + hisr_len); -+ hisr |= (val8 << (8 * hisr_len)); -+ } -+ -+ *phisr = hisr; -+ -+ return _TRUE; -+} -+ -+/* -+ * Description: -+ * Initialize SDIO Host Interrupt Mask configuration variables for future use. -+ * -+ * Assumption: -+ * Using SDIO Local register ONLY for configuration. -+ * -+ * Created by Roger, 2011.02.11. -+ * */ -+void InitInterrupt8703BSdio(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ pHalData->sdio_himr = (u32)(\ -+ SDIO_HIMR_RX_REQUEST_MSK | -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ SDIO_HIMR_AVAL_MSK | -+#endif -+ /* SDIO_HIMR_TXERR_MSK | -+ * SDIO_HIMR_RXERR_MSK | -+ * SDIO_HIMR_TXFOVW_MSK | -+ * SDIO_HIMR_RXFOVW_MSK | -+ * SDIO_HIMR_TXBCNOK_MSK | -+ * SDIO_HIMR_TXBCNERR_MSK | -+ * SDIO_HIMR_BCNERLY_INT_MSK | -+ * SDIO_HIMR_C2HCMD_MSK | */ -+#if defined(CONFIG_LPS_LCLK) && !defined(CONFIG_DETECT_CPWM_BY_POLLING) -+ SDIO_HIMR_CPWM1_MSK | -+#endif /* CONFIG_LPS_LCLK && !CONFIG_DETECT_CPWM_BY_POLLING */ -+#ifdef CONFIG_WOWLAN -+ SDIO_HIMR_CPWM2_MSK | -+#endif -+ /* SDIO_HIMR_HSISR_IND_MSK | -+ * SDIO_HIMR_GTINT3_IND_MSK | -+ * SDIO_HIMR_GTINT4_IND_MSK | -+ * SDIO_HIMR_PSTIMEOUT_MSK | -+ * SDIO_HIMR_OCPINT_MSK | -+ * SDIO_HIMR_ATIMEND_MSK | -+ * SDIO_HIMR_ATIMEND_E_MSK | -+ * SDIO_HIMR_CTWEND_MSK | */ -+ 0); -+} -+ -+/* -+ * Description: -+ * Initialize System Host Interrupt Mask configuration variables for future use. -+ * -+ * Created by Roger, 2011.08.03. -+ * */ -+void InitSysInterrupt8703BSdio(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ pHalData->SysIntrMask = (\ -+ /* HSIMR_GPIO12_0_INT_EN | -+ * HSIMR_SPS_OCP_INT_EN | -+ * HSIMR_RON_INT_EN | -+ * HSIMR_PDNINT_EN | -+ * HSIMR_GPIO9_INT_EN | */ -+ 0); -+} -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+/* -+ * Description: -+ * Clear corresponding SDIO Host ISR interrupt service. -+ * -+ * Assumption: -+ * Using SDIO Local register ONLY for configuration. -+ * -+ * Created by Roger, 2011.02.11. -+ * */ -+void ClearInterrupt8703BSdio(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ u8 *clear; -+ -+ -+ if (rtw_is_surprise_removed(padapter)) -+ return; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ clear = rtw_zmalloc(4); -+ -+ /* Clear corresponding HISR Content if needed */ -+ *(u32 *)clear = cpu_to_le32(pHalData->sdio_hisr & MASK_SDIO_HISR_CLEAR); -+ if (*(u32 *)clear) { -+ /* Perform write one clear operation */ -+ sdio_local_write(padapter, SDIO_REG_HISR, 4, clear); -+ } -+ -+ rtw_mfree(clear, 4); -+} -+#endif -+ -+/* -+ * Description: -+ * Clear corresponding system Host ISR interrupt service. -+ * -+ * -+ * Created by Roger, 2011.02.11. -+ * */ -+void ClearSysInterrupt8703BSdio(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ u32 clear; -+ -+ -+ if (rtw_is_surprise_removed(padapter)) -+ return; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ /* Clear corresponding HISR Content if needed */ -+ clear = pHalData->SysIntrStatus & MASK_HSISR_CLEAR; -+ if (clear) { -+ /* Perform write one clear operation */ -+ rtw_write32(padapter, REG_HSISR, clear); -+ } -+} -+ -+/* -+ * Description: -+ * Enalbe SDIO Host Interrupt Mask configuration on SDIO local domain. -+ * -+ * Assumption: -+ * 1. Using SDIO Local register ONLY for configuration. -+ * 2. PASSIVE LEVEL -+ * -+ * Created by Roger, 2011.02.11. -+ * */ -+void EnableInterrupt8703BSdio(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE pHalData; -+ u32 himr; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ himr = cpu_to_le32(pHalData->sdio_himr); -+ sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8 *)&himr); -+ -+ -+ /* Update current system IMR settings */ -+ himr = rtw_read32(padapter, REG_HSIMR); -+ rtw_write32(padapter, REG_HSIMR, himr | pHalData->SysIntrMask); -+ -+ -+ /* */ -+ /* There are some C2H CMDs have been sent before system interrupt is enabled, e.g., C2H, CPWM. */ -+ /* So we need to clear all C2H events that FW has notified, otherwise FW won't schedule any commands anymore. */ -+ /* 2011.10.19. */ -+ /* */ -+ rtw_write8(padapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE); -+} -+ -+/* -+ * Description: -+ * Disable SDIO Host IMR configuration to mask unnecessary interrupt service. -+ * -+ * Assumption: -+ * Using SDIO Local register ONLY for configuration. -+ * -+ * Created by Roger, 2011.02.11. -+ * */ -+void DisableInterrupt8703BSdio(PADAPTER padapter) -+{ -+ u32 himr; -+ -+ himr = cpu_to_le32(SDIO_HIMR_DISABLED); -+ sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8 *)&himr); -+ -+} -+ -+/* -+ * Description: -+ * Using 0x100 to check the power status of FW. -+ * -+ * Assumption: -+ * Using SDIO Local register ONLY for configuration. -+ * -+ * Created by Isaac, 2013.09.10. -+ * */ -+u8 CheckIPSStatus(PADAPTER padapter) -+{ -+ RTW_INFO("%s(): Read 0x100=0x%02x 0x86=0x%02x\n", __func__, -+ rtw_read8(padapter, 0x100), rtw_read8(padapter, 0x86)); -+ -+ if (rtw_read8(padapter, 0x100) == 0xEA) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+#ifdef CONFIG_WOWLAN -+void DisableInterruptButCpwm28703BSdio(PADAPTER padapter) -+{ -+ u32 himr, tmp; -+ -+ sdio_local_read(padapter, SDIO_REG_HIMR, 4, (u8 *)&tmp); -+ RTW_INFO("DisableInterruptButCpwm28703BSdio(): Read SDIO_REG_HIMR: 0x%08x\n", tmp); -+ -+ himr = cpu_to_le32(SDIO_HIMR_DISABLED) | SDIO_HIMR_CPWM2_MSK; -+ sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8 *)&himr); -+ -+ sdio_local_read(padapter, SDIO_REG_HIMR, 4, (u8 *)&tmp); -+ RTW_INFO("DisableInterruptButCpwm28703BSdio(): Read again SDIO_REG_HIMR: 0x%08x\n", tmp); -+} -+#endif /* CONFIG_WOWLAN -+ * -+ * Description: -+ * Update SDIO Host Interrupt Mask configuration on SDIO local domain. -+ * -+ * Assumption: -+ * 1. Using SDIO Local register ONLY for configuration. -+ * 2. PASSIVE LEVEL -+ * -+ * Created by Roger, 2011.02.11. -+ * */ -+void UpdateInterruptMask8703BSdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR) -+{ -+ HAL_DATA_TYPE *pHalData; -+ -+ pHalData = GET_HAL_DATA(padapter); -+ -+ if (AddMSR) -+ pHalData->sdio_himr |= AddMSR; -+ -+ if (RemoveMSR) -+ pHalData->sdio_himr &= (~RemoveMSR); -+ -+ DisableInterrupt8703BSdio(padapter); -+ EnableInterrupt8703BSdio(padapter); -+} -+ -+#ifdef CONFIG_MAC_LOOPBACK_DRIVER -+static void sd_recv_loopback(PADAPTER padapter, u32 size) -+{ -+ PLOOPBACKDATA ploopback; -+ u32 readsize, allocsize; -+ u8 *preadbuf; -+ -+ -+ readsize = size; -+ RTW_INFO("%s: read size=%d\n", __func__, readsize); -+ allocsize = _RND(readsize, rtw_sdio_get_block_size(adapter_to_dvobj(padapter))); -+ -+ ploopback = padapter->ploopback; -+ if (ploopback) { -+ ploopback->rxsize = readsize; -+ preadbuf = ploopback->rxbuf; -+ } else { -+ preadbuf = rtw_malloc(allocsize); -+ if (preadbuf == NULL) { -+ RTW_INFO("%s: malloc fail size=%d\n", __func__, allocsize); -+ return; -+ } -+ } -+ -+ /* rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); */ -+ sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); -+ -+ if (ploopback) -+ _rtw_up_sema(&ploopback->sema); -+ else { -+ u32 i; -+ -+ RTW_INFO("%s: drop pkt\n", __func__); -+ for (i = 0; i < readsize; i += 4) { -+ RTW_INFO("%08X", *(u32 *)(preadbuf + i)); -+ if ((i + 4) & 0x1F) -+ printk(" "); -+ else -+ printk("\n"); -+ } -+ printk("\n"); -+ rtw_mfree(preadbuf, allocsize); -+ } -+} -+#endif /* CONFIG_MAC_LOOPBACK_DRIVER */ -+ -+#ifdef CONFIG_SDIO_RX_COPY -+static u32 sd_recv_rxfifo(PADAPTER padapter, u32 size, struct recv_buf **recvbuf_ret) -+{ -+ u32 readsize, ret; -+ u8 *preadbuf; -+ struct recv_priv *precvpriv; -+ struct recv_buf *precvbuf; -+ -+ -+#if 0 -+ readsize = size; -+#else -+ /* Patch for some SDIO Host 4 bytes issue */ -+ /* ex. RK3188 */ -+ readsize = RND4(size); -+#endif -+ -+ /* 3 1. alloc recvbuf */ -+ precvpriv = &padapter->recvpriv; -+ precvbuf = rtw_dequeue_recvbuf(&precvpriv->free_recv_buf_queue); -+ if (precvbuf == NULL) { -+ RTW_INFO("%s: recvbuf unavailable\n", __func__); //No free rece_buffer. -+ ret = RTW_RBUF_UNAVAIL; -+ goto exit; -+ } -+ -+ /* 3 2. alloc skb */ -+ if (precvbuf->pskb == NULL) { -+ SIZE_PTR tmpaddr = 0; -+ SIZE_PTR alignment = 0; -+ -+ precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); -+ if (precvbuf->pskb == NULL) { -+ RTW_INFO("%s: alloc_skb fail! read=%d\n", __FUNCTION__, readsize); -+ rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); -+ ret = RTW_RBUF_PKT_UNAVAIL; -+ goto exit; -+ } -+ -+ precvbuf->pskb->dev = padapter->pnetdev; -+ -+ tmpaddr = (SIZE_PTR)precvbuf->pskb->data; -+ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1); -+ skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); -+ } -+ -+ /* 3 3. read data from rxfifo */ -+ preadbuf = precvbuf->pskb->data; -+ /* rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); */ -+ ret = sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); -+ if (ret == _FAIL) { -+ rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); -+ goto exit; -+ } -+ -+ /* 3 4. init recvbuf */ -+ precvbuf->len = size; -+ precvbuf->phead = precvbuf->pskb->head; -+ precvbuf->pdata = precvbuf->pskb->data; -+ skb_set_tail_pointer(precvbuf->pskb, size); -+ precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); -+ precvbuf->pend = skb_end_pointer(precvbuf->pskb); -+ -+ *recvbuf_ret = precvbuf; -+ exit: -+ return ret; -+} -+#else /* !CONFIG_SDIO_RX_COPY */ -+static struct recv_buf *sd_recv_rxfifo(PADAPTER padapter, u32 size) -+{ -+ u32 readsize, allocsize, ret; -+ u8 *preadbuf; -+ _pkt *ppkt; -+ struct recv_priv *precvpriv; -+ struct recv_buf *precvbuf; -+ -+ -+#if 0 -+ readsize = size; -+#else -+ /* Patch for some SDIO Host 4 bytes issue */ -+ /* ex. RK3188 */ -+ readsize = RND4(size); -+#endif -+ -+ /* 3 1. alloc skb */ -+ /* align to block size */ -+ allocsize = rtw_sdio_cmd53_align_size(adapter_to_dvobj(padapter), readsize); -+ -+ ppkt = rtw_skb_alloc(allocsize); -+ -+ if (ppkt == NULL) { -+ return NULL; -+ } -+ -+ /* 3 2. read data from rxfifo */ -+ preadbuf = skb_put(ppkt, size); -+ /* rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); */ -+ ret = sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); -+ if (ret == _FAIL) { -+ rtw_skb_free(ppkt); -+ return NULL; -+ } -+ -+ /* 3 3. alloc recvbuf */ -+ precvpriv = &padapter->recvpriv; -+ precvbuf = rtw_dequeue_recvbuf(&precvpriv->free_recv_buf_queue); -+ if (precvbuf == NULL) { -+ rtw_skb_free(ppkt); -+ RTW_ERR("%s: alloc recvbuf FAIL!\n", __FUNCTION__); -+ return NULL; -+ } -+ -+ /* 3 4. init recvbuf */ -+ precvbuf->pskb = ppkt; -+ -+ precvbuf->len = ppkt->len; -+ -+ precvbuf->phead = ppkt->head; -+ precvbuf->pdata = ppkt->data; -+ precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); -+ precvbuf->pend = skb_end_pointer(precvbuf->pskb); -+ -+ return precvbuf; -+} -+#endif /* !CONFIG_SDIO_RX_COPY */ -+ -+static void sd_rxhandler(PADAPTER padapter, struct recv_buf *precvbuf) -+{ -+ struct recv_priv *precvpriv; -+ _queue *ppending_queue; -+ -+ -+ precvpriv = &padapter->recvpriv; -+ ppending_queue = &precvpriv->recv_buf_pending_queue; -+ -+ /* 3 1. enqueue recvbuf */ -+ rtw_enqueue_recvbuf(precvbuf, ppending_queue);//rx thread dequeue pending -+ -+ -+ /* 3 2. trigger recv hdl */ -+#ifdef CONFIG_RECV_THREAD_MODE -+ _rtw_up_sema(&precvpriv->recv_sema); -+#else -+ #ifdef PLATFORM_LINUX -+ tasklet_schedule(&precvpriv->recv_tasklet); -+ #endif /* PLATFORM_LINUX */ -+#endif /* CONFIG_RECV_THREAD_MODE */ -+} -+ -+void sd_int_dpc(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE phal; -+ struct dvobj_priv *dvobj; -+ struct intf_hdl *pintfhdl = &padapter->iopriv.intf; -+ struct pwrctrl_priv *pwrctl; -+ -+ -+ phal = GET_HAL_DATA(padapter); -+ dvobj = adapter_to_dvobj(padapter); -+ pwrctl = dvobj_to_pwrctl(dvobj); -+ -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ if (phal->sdio_hisr & SDIO_HISR_AVAL) { -+ /* _irqL irql; */ -+ u8 freepage[4]; -+ -+ _sdio_local_read(padapter, SDIO_REG_FREE_TXPG, 4, freepage); -+ /* _enter_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql); */ -+ /* _rtw_memcpy(phal->SdioTxFIFOFreePage, freepage, 4); */ -+ /* _exit_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql); */ -+ /* RTW_INFO("SDIO_HISR_AVAL, Tx Free Page = 0x%x%x%x%x\n", */ -+ /* freepage[0], */ -+ /* freepage[1], */ -+ /* freepage[2], */ -+ /* freepage[3]); */ -+ _rtw_up_sema(&(padapter->xmitpriv.xmit_sema)); -+ } -+#endif -+ if (phal->sdio_hisr & SDIO_HISR_CPWM1) { -+ struct reportpwrstate_parm report; -+ -+#ifdef CONFIG_LPS_RPWM_TIMER -+ _cancel_timer_ex(&(pwrctl->pwr_rpwm_timer)); -+#endif /* CONFIG_LPS_RPWM_TIMER */ -+ -+ report.state = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_HCPWM1_8703B); -+ -+#ifdef CONFIG_LPS_LCLK -+ /* cpwm_int_hdl(padapter, &report); */ -+ _set_workitem(&(pwrctl->cpwm_event)); -+#endif -+ } -+ -+ if (phal->sdio_hisr & SDIO_HISR_TXERR) { -+ u8 *status; -+ u32 addr; -+ -+ status = rtw_malloc(4); -+ if (status) { -+ addr = REG_TXDMA_STATUS; -+ HalSdioGetCmdAddr8703BSdio(padapter, WLAN_IOREG_DEVICE_ID, addr, &addr); -+ _sd_read(pintfhdl, addr, 4, status); -+ _sd_write(pintfhdl, addr, 4, status); -+ RTW_INFO("%s: SDIO_HISR_TXERR (0x%08x)\n", __func__, le32_to_cpu(*(u32 *)status)); -+ rtw_mfree(status, 4); -+ } else -+ RTW_INFO("%s: SDIO_HISR_TXERR, but can't allocate memory to read status!\n", __func__); -+ } -+ -+ if (phal->sdio_hisr & SDIO_HISR_TXBCNOK) -+ RTW_INFO("%s: SDIO_HISR_TXBCNOK\n", __func__); -+ -+ if (phal->sdio_hisr & SDIO_HISR_TXBCNERR) -+ RTW_INFO("%s: SDIO_HISR_TXBCNERR\n", __func__); -+ -+#ifdef CONFIG_FW_C2H_REG -+ if (phal->sdio_hisr & SDIO_HISR_C2HCMD) { -+ RTW_INFO("%s: C2H Command\n", __func__); -+ sd_c2h_hisr_hdl(padapter); -+ } -+#endif -+ -+ if (phal->sdio_hisr & SDIO_HISR_RXFOVW) -+ RTW_INFO("%s: Rx Overflow\n", __func__); -+ if (phal->sdio_hisr & SDIO_HISR_RXERR) -+ RTW_INFO("%s: Rx Error\n", __func__); -+ -+ if (phal->sdio_hisr & SDIO_HISR_RX_REQUEST) { -+ struct recv_buf *precvbuf = NULL; -+ int alloc_fail_time = 0; -+ u32 hisr = 0, rx_cnt = 0, ret = 0; -+ -+ /* RTW_INFO("%s: RX Request, size=%d\n", __func__, phal->SdioRxFIFOSize); */ -+ phal->sdio_hisr ^= SDIO_HISR_RX_REQUEST; -+ do { -+ phal->SdioRxFIFOSize = SdioLocalCmd52Read2Byte(padapter, SDIO_REG_RX0_REQ_LEN); -+ if (phal->SdioRxFIFOSize != 0) { -+#ifdef CONFIG_MAC_LOOPBACK_DRIVER -+ sd_recv_loopback(padapter, phal->SdioRxFIFOSize); -+#else -+ ret = sd_recv_rxfifo(padapter, phal->SdioRxFIFOSize, &precvbuf); -+ if (precvbuf) { -+ //RTW_INFO("phal->SdioRxFIFOSize:%d\n", phal->SdioRxFIFOSize); -+ sd_rxhandler(padapter, precvbuf); -+ phal->SdioRxFIFOSize = 0; -+ rx_cnt++; -+ } else { -+ alloc_fail_time++; -+ if (ret == RTW_RBUF_UNAVAIL || ret == RTW_RBUF_PKT_UNAVAIL) -+ rtw_msleep_os(10); -+ else { -+ RTW_INFO("%s: recv fail!(time=%d)\n", __func__, alloc_fail_time); -+ phal->SdioRxFIFOSize = 0; -+ } -+ if (alloc_fail_time >= 10 && rx_cnt != 0) -+ break; -+ } -+#endif -+ } else -+ break; -+ -+ hisr = 0; -+ ReadInterrupt8703BSdio(padapter, &hisr); -+ hisr &= SDIO_HISR_RX_REQUEST; -+ if (!hisr) -+ break; -+ } while (1); -+ -+ if (alloc_fail_time == 10) -+ RTW_INFO("%s: exit because recv failed more than 10 times!\n", __func__); -+ } -+} -+ -+void sd_int_hdl(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE phal; -+ -+ -+ if (RTW_CANNOT_RUN(padapter)) -+ return; -+ -+ phal = GET_HAL_DATA(padapter); -+ -+ phal->sdio_hisr = 0; -+ ReadInterrupt8703BSdio(padapter, &phal->sdio_hisr); -+ -+ if (phal->sdio_hisr & phal->sdio_himr) { -+ u32 v32; -+ -+ phal->sdio_hisr &= phal->sdio_himr; -+ -+ /* clear HISR */ -+ v32 = phal->sdio_hisr & MASK_SDIO_HISR_CLEAR; -+ if (v32) -+ SdioLocalCmd52Write4Byte(padapter, SDIO_REG_HISR, v32); -+ -+ sd_int_dpc(padapter); -+ } -+} -+ -+/* -+ * Description: -+ * Query SDIO Local register to query current the number of Free TxPacketBuffer page. -+ * -+ * Assumption: -+ * 1. Running at PASSIVE_LEVEL -+ * 2. RT_TX_SPINLOCK is NOT acquired. -+ * -+ * Created by Roger, 2011.01.28. -+ * */ -+u8 HalQueryTxBufferStatus8703BSdio(PADAPTER padapter) -+{ -+ PHAL_DATA_TYPE phal; -+ u32 NumOfFreePage; -+ /* _irqL irql; */ -+ -+ -+ phal = GET_HAL_DATA(padapter); -+ -+ NumOfFreePage = SdioLocalCmd53Read4Byte(padapter, SDIO_REG_FREE_TXPG); -+ -+ /* _enter_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql); */ -+ _rtw_memcpy(phal->SdioTxFIFOFreePage, &NumOfFreePage, 4); -+ /* _exit_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql); */ -+ -+ return _TRUE; -+} -+ -+/* -+ * Description: -+ * Query SDIO Local register to get the current number of TX OQT Free Space. -+ * */ -+u8 HalQueryTxOQTBufferStatus8703BSdio(PADAPTER padapter) -+{ -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ pHalData->SdioTxOQTFreeSpace = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_OQT_FREE_PG); -+ return _TRUE; -+} -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+u8 RecvOnePkt(PADAPTER padapter) -+{ -+ struct recv_buf *precvbuf; -+ struct dvobj_priv *psddev; -+ PSDIO_DATA psdio_data; -+ struct sdio_func *func; -+ u32 tmp = 0; -+ u16 len = 0; -+ u8 res = _FALSE; -+ -+ if (padapter == NULL) { -+ RTW_ERR("%s: padapter is NULL!\n", __func__); -+ return _FALSE; -+ } -+ -+ psddev = adapter_to_dvobj(padapter); -+ psdio_data = &psddev->intf_data; -+ func = psdio_data->func; -+ -+ /* If RX_DMA is not idle, receive one pkt from DMA */ -+ res = sdio_local_read(padapter, -+ SDIO_REG_RX0_REQ_LEN, 4, (u8 *)&tmp); -+ len = le16_to_cpu(tmp); -+ RTW_INFO("+%s: size: %d+\n", __func__, len); -+ -+ if (len) { -+ sdio_claim_host(func); -+ res = sd_recv_rxfifo(padapter, len, &precvbuf); -+ -+ if (precvbuf) { -+ /* printk("Completed Recv One Pkt.\n"); */ -+ sd_rxhandler(padapter, precvbuf); -+ res = _TRUE; -+ } else -+ res = _FALSE; -+ sdio_release_host(func); -+ } -+ RTW_INFO("-%s-\n", __func__); -+ return res; -+} -+#endif /* CONFIG_WOWLAN */ -+ -diff --git a/drivers/staging/rtl8723cs/ifcfg-wlan0 b/drivers/staging/rtl8723cs/ifcfg-wlan0 -new file mode 100644 -index 000000000000..7ecb7ae62c7f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/ifcfg-wlan0 -@@ -0,0 +1,4 @@ -+#DHCP client -+DEVICE=wlan0 -+BOOTPROTO=dhcp -+ONBOOT=yes -\ No newline at end of file -diff --git a/drivers/staging/rtl8723cs/include/Hal8188EPhyCfg.h b/drivers/staging/rtl8723cs/include/Hal8188EPhyCfg.h -new file mode 100644 -index 000000000000..38983f75134f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8188EPhyCfg.h -@@ -0,0 +1,249 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8188EPHYCFG_H__ -+#define __INC_HAL8188EPHYCFG_H__ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 /* us */ -+#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+ #define MAX_AGGR_NUM 0x0B -+#else -+ #define MAX_AGGR_NUM 0x07 -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+#define MAX_TX_COUNT_8188E 1 -+ -+/* BB/RF related */ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/*------------------------Export global variable----------------------------*/ -+/*------------------------Export global variable----------------------------*/ -+ -+ -+/*------------------------Export Marco Definition---------------------------*/ -+/*------------------------Export Marco Definition---------------------------*/ -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+/* -+ * BB and RF register read/write -+ * */ -+u32 PHY_QueryBBReg8188E(PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask); -+void PHY_SetBBReg8188E(PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data); -+u32 PHY_QueryRFReg8188E(PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask); -+void PHY_SetRFReg8188E(PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data); -+ -+/* -+ * Initialization related function -+ */ -+/* MAC/BB/RF HAL config */ -+int PHY_MACConfig8188E(PADAPTER Adapter); -+int PHY_BBConfig8188E(PADAPTER Adapter); -+int PHY_RFConfig8188E(PADAPTER Adapter); -+ -+/* RF config */ -+int rtl8188e_PHY_ConfigRFWithParaFile( PADAPTER Adapter, u8 *pFileName, enum rf_path eRFPath); -+ -+/* -+ * RF Power setting -+ */ -+/* extern BOOLEAN PHY_SetRFPowerState(PADAPTER Adapter, -+ * RT_RF_POWER_STATE eRFPowerState); */ -+ -+/* -+ * BB TX Power R/W -+ * */ -+void PHY_SetTxPowerLevel8188E(PADAPTER Adapter, -+ u8 channel); -+ -+void -+PHY_SetTxPowerIndex_8188E( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+s8 phy_get_txpwr_target_extra_bias_8188e(_adapter *adapter, enum rf_path rfpath -+ , RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch); -+ -+/* -+ * Switch bandwidth for 8192S -+ */ -+/* extern void PHY_SetBWModeCallback8192C(PRT_TIMER pTimer ); */ -+void PHY_SetBWMode8188E(PADAPTER pAdapter, -+ enum channel_width ChnlWidth, -+ unsigned char Offset); -+ -+/* -+ * Set FW CMD IO for 8192S. -+ */ -+/* extern BOOLEAN HalSetIO8192C(PADAPTER Adapter, -+ * IO_TYPE IOType); */ -+ -+/* -+ * Set A2 entry to fw for 8192S -+ * */ -+extern void FillA2Entry8192C(PADAPTER Adapter, -+ u8 index, -+ u8 *val); -+ -+ -+/* -+ * channel switch related funciton -+ */ -+/* extern void PHY_SwChnlCallback8192C(PRT_TIMER pTimer ); */ -+void PHY_SwChnl8188E(PADAPTER pAdapter, -+ u8 channel); -+ -+void -+PHY_SetSwChnlBWMode8188E( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+); -+ -+void -+PHY_SetRFEReg_8188E( -+ PADAPTER Adapter -+); -+/* -+ * BB/MAC/RF other monitor API -+ * */ -+void phy_set_rf_path_switch_8188e(struct dm_struct *phydm, bool bMain); -+ -+extern void -+PHY_SwitchEphyParameter( -+ PADAPTER Adapter -+); -+ -+extern void -+PHY_EnableHostClkReq( -+ PADAPTER Adapter -+); -+ -+BOOLEAN -+SetAntennaConfig92C( -+ PADAPTER Adapter, -+ u8 DefaultAnt -+); -+ -+/*--------------------------Exported Function prototype---------------------*/ -+ -+/* -+ * Initialization related function -+ * -+ * MAC/BB/RF HAL config */ -+/* extern s32 PHY_MACConfig8723(PADAPTER padapter); -+ * s32 PHY_BBConfig8723(PADAPTER padapter); -+ * s32 PHY_RFConfig8723(PADAPTER padapter); */ -+ -+ -+ -+/* ****************************************************************** -+ * Note: If SIC_ENABLE under PCIE, because of the slow operation -+ * you should -+ * 2) "#define RTL8723_FPGA_VERIFICATION 1" in Precomp.h.WlanE.Windows -+ * 3) "#define RTL8190_Download_Firmware_From_Header 0" in Precomp.h.WlanE.Windows if needed. -+ * */ -+#if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1) -+ #define SIC_ENABLE 1 -+ #define SIC_HW_SUPPORT 1 -+#else -+ #define SIC_ENABLE 0 -+ #define SIC_HW_SUPPORT 0 -+#endif -+/* ****************************************************************** */ -+ -+ -+#define SIC_MAX_POLL_CNT 5 -+ -+#if (SIC_HW_SUPPORT == 1) -+ #define SIC_CMD_READY 0 -+ #define SIC_CMD_PREWRITE 0x1 -+ #if (RTL8188E_SUPPORT == 1) -+ #define SIC_CMD_WRITE 0x40 -+ #define SIC_CMD_PREREAD 0x2 -+ #define SIC_CMD_READ 0x80 -+ #define SIC_CMD_INIT 0xf0 -+ #define SIC_INIT_VAL 0xff -+ -+ #define SIC_INIT_REG 0x1b7 -+ #define SIC_CMD_REG 0x1EB /* 1byte */ -+ #define SIC_ADDR_REG 0x1E8 /* 1b4~1b5, 2 bytes */ -+ #define SIC_DATA_REG 0x1EC /* 1b0~1b3 */ -+ #else -+ #define SIC_CMD_WRITE 0x11 -+ #define SIC_CMD_PREREAD 0x2 -+ #define SIC_CMD_READ 0x12 -+ #define SIC_CMD_INIT 0x1f -+ #define SIC_INIT_VAL 0xff -+ -+ #define SIC_INIT_REG 0x1b7 -+ #define SIC_CMD_REG 0x1b6 /* 1byte */ -+ #define SIC_ADDR_REG 0x1b4 /* 1b4~1b5, 2 bytes */ -+ #define SIC_DATA_REG 0x1b0 /* 1b0~1b3 */ -+ #endif -+#else -+ #define SIC_CMD_READY 0 -+ #define SIC_CMD_WRITE 1 -+ #define SIC_CMD_READ 2 -+ -+ #if (RTL8188E_SUPPORT == 1) -+ #define SIC_CMD_REG 0x1EB /* 1byte */ -+ #define SIC_ADDR_REG 0x1E8 /* 1b9~1ba, 2 bytes */ -+ #define SIC_DATA_REG 0x1EC /* 1bc~1bf */ -+ #else -+ #define SIC_CMD_REG 0x1b8 /* 1byte */ -+ #define SIC_ADDR_REG 0x1b9 /* 1b9~1ba, 2 bytes */ -+ #define SIC_DATA_REG 0x1bc /* 1bc~1bf */ -+ #endif -+#endif -+ -+#if (SIC_ENABLE == 1) -+ void SIC_Init( PADAPTER Adapter); -+#endif -+ -+ -+#endif /* __INC_HAL8192CPHYCFG_H */ -diff --git a/drivers/staging/rtl8723cs/include/Hal8188EPhyReg.h b/drivers/staging/rtl8723cs/include/Hal8188EPhyReg.h -new file mode 100644 -index 000000000000..2eab8313aa5d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8188EPhyReg.h -@@ -0,0 +1,1100 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8188EPHYREG_H__ -+#define __INC_HAL8188EPHYREG_H__ -+/*--------------------------Define Parameters-------------------------------*/ -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other defintion for BB/RF R/W -+ * */ -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+/* -+ * 2. Page2(0x200) -+ * -+ * The following two definition are only used for USB interface. */ -+#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -+#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_RFTiming1 0x810 /* Useless now */ -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 -+#define rFPGA0_AdDaClockEn 0x888 /* enable ad/da clock1 for dual-phy */ -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -+#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -+#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -+ -+/* -+ * 5. PageA(0xA00) -+ * -+ * Set Control channel to upper or lower. These settings are required only for 40MHz */ -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -+#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ -+ -+#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -+#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 /* 0xa57 */ -+#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -+#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ -+ -+/* -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rConfig_Pmpd_AntB 0xb98 -+#define rAPK 0xbd8 -+ -+ -+ -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 /* No setting now */ -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_csi_fix_mask1 0xd40 -+#define rOFDM1_csi_fix_mask2 0xd44 -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -+#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -+#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ -+ -+#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+/* -+ * 7. RF Register 0x00-0x2E (RF 8256) -+ * RF-0222D 0x00-3F -+ * -+ * Zebra1 */ -+#define rZebra1_HSSIEnable 0x0 /* Useless now */ -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 /* RF channel switch */ -+ -+/* #endif */ -+#define rZebra1_TxGain 0x8 /* Useless now */ -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+/* Zebra4 */ -+#define rGlobalCtrl 0 /* Useless now */ -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+/* RTL8258 */ -+#define rRTL8258_TxLPF 0x11 /* Useless now */ -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+ -+#define RF_IQADJ_G1 0x01 /* */ -+#define RF_IQADJ_G2 0x02 /* */ -+ -+#define RF_POW_TRSW 0x05 /* */ -+ -+#define RF_GAIN_RX 0x06 /* */ -+#define RF_GAIN_TX 0x07 /* */ -+ -+#define RF_TXM_IDAC 0x08 /* */ -+#define RF_IPA_G 0x09 /* */ -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C /* */ -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F /* */ -+ -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+ -+#define RF_RX_AGC_HP 0x12 /* */ -+#define RF_TX_AGC 0x13 /* */ -+#define RF_BIAS 0x14 /* */ -+#define RF_IPA 0x15 /* */ -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 /* */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_TOP 0x19 /* */ -+ -+#define RF_RX_G1 0x1A /* */ -+#define RF_RX_G2 0x1B /* */ -+ -+#define RF_RX_BB2 0x1C /* */ -+#define RF_RX_BB1 0x1D /* */ -+ -+#define RF_RCK1 0x1E /* */ -+#define RF_RCK2 0x1F /* */ -+ -+#define RF_TX_G1 0x20 /* */ -+#define RF_TX_G2 0x21 /* */ -+#define RF_TX_G3 0x22 /* */ -+ -+#define RF_TX_BB1 0x23 /* */ -+ -+#define RF_T_METER_88E 0x42 /* */ -+#define RF_T_METER 0x24 /* */ -+ -+#define RF_SYN_G1 0x25 /* RF TX Power control */ -+#define RF_SYN_G2 0x26 /* RF TX Power control */ -+#define RF_SYN_G3 0x27 /* RF TX Power control */ -+#define RF_SYN_G4 0x28 /* RF TX Power control */ -+#define RF_SYN_G5 0x29 /* RF TX Power control */ -+#define RF_SYN_G6 0x2A /* RF TX Power control */ -+#define RF_SYN_G7 0x2B /* RF TX Power control */ -+#define RF_SYN_G8 0x2C /* RF TX Power control */ -+ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C /* */ -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+ -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 /* Useless now */ -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 /* Useless now */ -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf /* Reg0x814 */ -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 /* T2R */ -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 /* Useless now -+ * #define bHWSISelect 0x8 */ -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ -+ -+#define bRFSI_TRSW 0x20 /* Useless now */ -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 /* T65 RF */ -+ -+#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ -+ -+#define bLSSIReadBackData 0xfffff /* T65 RF */ -+ -+#define bLSSIReadOKFlag 0x1000 /* Useless now */ -+#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ -+ -+#define b80MClkDelay 0x18000000 /* Useless */ -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 /* Useless */ -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+/* 3. Page9(0x900) */ -+#define bOFDMTxSC 0x30000000 /* Useless */ -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -+#define bDebugItem 0xff /* reset debug page and LWord */ -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+/* 5. PageC(0xC00) */ -+#define bNumOfSTF 0x3 /* Useless */ -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 /* the threshold for high power */ -+#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+/* #define bRxMF_Hold 0x3800 */ -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+/* #define bRxPath1 0x01 */ -+/* #define bRxPath2 0x02 */ -+/* #define bRxPath3 0x04 */ -+/* #define bRxPath4 0x08 */ -+/* #define bTxPath1 0x10 */ -+/* #define bTxPath2 0x20 */ -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 /* total */ -+#define bShortCFOFLength 11 /* fraction */ -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf /* Useless */ -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 /* Useless */ -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 /* Useless */ -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+/* Rx Pseduo noise */ -+#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+/* 7. RF Register -+ * Zebra1 */ -+#define bZebra1_HSSIEnable 0x8 /* Useless */ -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+/* Zebra4 */ -+#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+/* RTL8258 */ -+#define bRTL8258_TxLPFBW 0xc /* Useless */ -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+/* byte endable for sb_write */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+ -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 /* Useless */ -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -+#define tUpdateRxCounter 100 /* 100ms */ -+ -+#define rateCCK 0 /* Useless */ -+#define rateOFDM 1 -+#define rateHT 2 -+ -+/* define Register-End */ -+#define bPMAC_End 0x1ff /* Useless */ -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+/* define max debug item in each debug page -+ * #define bMaxItem_FPGA_PHY0 0x9 -+ * #define bMaxItem_FPGA_PHY1 0x3 -+ * #define bMaxItem_PHY_11B 0x16 -+ * #define bMaxItem_OFDM_PHY0 0x29 -+ * #define bMaxItem_OFDM_PHY1 0x0 */ -+ -+#define bPMACControl 0x0 /* Useless */ -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 /* Useless */ -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8188EPwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8188EPwrSeq.h -new file mode 100644 -index 000000000000..46c61abacb92 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8188EPwrSeq.h -@@ -0,0 +1,170 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+#ifndef __HAL8188EPWRSEQ_H__ -+#define __HAL8188EPWRSEQ_H__ -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+ -+ PWR SEQ Version: rtl8188E_PwrSeq_V09.h -+*/ -+#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10 -+#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10 -+#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10 -+#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10 -+#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10 -+#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10 -+#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8188E_TRANS_END_STEPS 1 -+ -+ -+#define RTL8188E_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 | BIT1, 0}, /* 0x02[1:0] = 0 reset BB*/ \ -+ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, 0}, /*0x04[12:11] = 2b'00 disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \ -+ -+#define RTL8188E_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ -+#define RTL8188E_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11enable WL suspend for PCIe*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, BIT7}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ -+ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ -+ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8188E_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ -+ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ -+ {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8188E_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8188E_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+ /* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */ -+#define RTL8188E_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8188E_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8188E_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, -+ -+ -+ extern WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS]; -+ -+#endif /* __HAL8188EPWRSEQ_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/Hal8188FPhyCfg.h b/drivers/staging/rtl8723cs/include/Hal8188FPhyCfg.h -new file mode 100644 -index 000000000000..1bc60dc527d6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8188FPhyCfg.h -@@ -0,0 +1,120 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8188FPHYCFG_H__ -+#define __INC_HAL8188FPHYCFG_H__ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 /* us */ -+#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+ #define MAX_AGGR_NUM 0x0B -+#else -+ #define MAX_AGGR_NUM 0x07 -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+/*--------------------------Define Parameters End-------------------------------*/ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+/*------------------------------Define structure End----------------------------*/ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+u32 -+PHY_QueryBBReg_8188F( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetBBReg_8188F( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+u32 -+PHY_QueryRFReg_8188F( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetRFReg_8188F( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+/* MAC/BB/RF HAL config */ -+int PHY_BBConfig8188F(PADAPTER Adapter); -+ -+int PHY_RFConfig8188F(PADAPTER Adapter); -+ -+s32 PHY_MACConfig8188F(PADAPTER padapter); -+ -+int -+PHY_ConfigRFWithParaFile_8188F( -+ PADAPTER Adapter, -+ u8 *pFileName, -+ enum rf_path eRFPath -+); -+ -+void -+PHY_SetTxPowerIndex_8188F( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+void -+PHY_SetTxPowerLevel8188F( -+ PADAPTER Adapter, -+ u8 channel -+); -+ -+void rtl8188f_set_txpwr_done(_adapter *adapter); -+ -+void -+PHY_SetSwChnlBWMode8188F( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+); -+ -+void phy_set_rf_path_switch_8188f( -+ struct dm_struct *phydm, -+ bool bMain -+); -+ -+void BBTurnOnBlock_8188F(_adapter *adapter); -+ -+/*--------------------------Exported Function prototype End---------------------*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8188FPhyReg.h b/drivers/staging/rtl8723cs/include/Hal8188FPhyReg.h -new file mode 100644 -index 000000000000..a831faade96d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8188FPhyReg.h -@@ -0,0 +1,1165 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8188FPHYREG_H__ -+#define __INC_HAL8188FPHYREG_H__ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+/* ************************************************************ -+ * Regsiter offset definition -+ * ************************************************************ */ -+ -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other defintion for BB/RF R/W -+ * */ -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+/* -+ * 2. Page2(0x200) -+ * -+ * The following two definition are only used for USB interface. */ -+#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -+#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_RFTiming1 0x810 /* Useless now */ -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+ -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -+#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -+#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -+#define rS0S1_PathSwitch 0x948 -+ -+/* -+ * 5. PageA(0xA00) -+ * -+ * Set Control channel to upper or lower. These settings are required only for 40MHz */ -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -+#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ -+ -+#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -+#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 /* 0xa57 */ -+#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -+#define rCCK0_FACounterUpper 0xa58 /* 0xa5c -+ * -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rConfig_Pmpd_AntB 0xb98 -+#define rAPK 0xbd8 -+ -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 /* No setting now */ -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -+#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -+#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ -+ -+#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+/* -+ * 7. RF Register 0x00-0x2E (RF 8256) -+ * RF-0222D 0x00-3F -+ * -+ * Zebra1 */ -+#define rZebra1_HSSIEnable 0x0 /* Useless now */ -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 /* RF channel switch */ -+ -+/* #endif */ -+#define rZebra1_TxGain 0x8 /* Useless now */ -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+/* Zebra4 */ -+#define rGlobalCtrl 0 /* Useless now */ -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+/* RTL8258 */ -+#define rRTL8258_TxLPF 0x11 /* Useless now */ -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+ -+#define RF_IQADJ_G1 0x01 /* */ -+#define RF_IQADJ_G2 0x02 /* */ -+#define RF_BS_PA_APSET_G1_G4 0x03 -+#define RF_BS_PA_APSET_G5_G8 0x04 -+#define RF_POW_TRSW 0x05 /* */ -+ -+#define RF_GAIN_RX 0x06 /* */ -+#define RF_GAIN_TX 0x07 /* */ -+ -+#define RF_TXM_IDAC 0x08 /* */ -+#define RF_IPA_G 0x09 /* */ -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C /* */ -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F /* */ -+ -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+ -+#define RF_RX_AGC_HP 0x12 /* */ -+#define RF_TX_AGC 0x13 /* */ -+#define RF_BIAS 0x14 /* */ -+#define RF_IPA 0x15 /* */ -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 /* */ -+#define RF_MODE_AG 0x18 /* */ -+#define rRfChannel 0x18 /* RF channel and BW switch */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_TOP 0x19 /* */ -+ -+#define RF_RX_G1 0x1A /* */ -+#define RF_RX_G2 0x1B /* */ -+ -+#define RF_RX_BB2 0x1C /* */ -+#define RF_RX_BB1 0x1D /* */ -+ -+#define RF_RCK1 0x1E /* */ -+#define RF_RCK2 0x1F /* */ -+ -+#define RF_TX_G1 0x20 /* */ -+#define RF_TX_G2 0x21 /* */ -+#define RF_TX_G3 0x22 /* */ -+ -+#define RF_TX_BB1 0x23 /* */ -+ -+#define RF_T_METER 0x24 /* */ -+ -+#define RF_SYN_G1 0x25 /* RF TX Power control */ -+#define RF_SYN_G2 0x26 /* RF TX Power control */ -+#define RF_SYN_G3 0x27 /* RF TX Power control */ -+#define RF_SYN_G4 0x28 /* RF TX Power control */ -+#define RF_SYN_G5 0x29 /* RF TX Power control */ -+#define RF_SYN_G6 0x2A /* RF TX Power control */ -+#define RF_SYN_G7 0x2B /* RF TX Power control */ -+#define RF_SYN_G8 0x2C /* RF TX Power control */ -+ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C /* */ -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_RXG_MIX_SWBW 0x87 -+#define RF_DBG_LP_RX2 0xDF -+#define RF_WE_LUT 0xEF -+#define RF_S0S1 0xB0 -+ -+#define RF_TX_GAIN_OFFSET_8188F(_val) (abs((_val)) | (((_val) > 0) ? BIT5 : 0)) -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 /* Useless now */ -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 /* Useless now */ -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf /* Reg0x814 */ -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 /* T2R */ -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 /* Useless now -+ * #define bHWSISelect 0x8 */ -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ -+ -+#define bRFSI_TRSW 0x20 /* Useless now */ -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 /* T65 RF */ -+ -+#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ -+ -+#define bLSSIReadBackData 0xfffff /* T65 RF */ -+ -+#define bLSSIReadOKFlag 0x1000 /* Useless now */ -+#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ -+ -+#define b80MClkDelay 0x18000000 /* Useless */ -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 /* Useless */ -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+/* 3. Page9(0x900) */ -+#define bOFDMTxSC 0x30000000 /* Useless */ -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -+#define bDebugItem 0xff /* reset debug page and LWord */ -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+/* 5. PageC(0xC00) */ -+#define bNumOfSTF 0x3 /* Useless */ -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 /* the threshold for high power */ -+#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+/* #define bRxMF_Hold 0x3800 */ -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+/* #define bRxPath1 0x01 */ -+/* #define bRxPath2 0x02 */ -+/* #define bRxPath3 0x04 */ -+/* #define bRxPath4 0x08 */ -+/* #define bTxPath1 0x10 */ -+/* #define bTxPath2 0x20 */ -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 /* total */ -+#define bShortCFOFLength 11 /* fraction */ -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf /* Useless */ -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 /* Useless */ -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 /* Useless */ -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+/* Rx Pseduo noise */ -+#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+/* 7. RF Register -+ * Zebra1 */ -+#define bZebra1_HSSIEnable 0x8 /* Useless */ -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+/* Zebra4 */ -+#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+/* RTL8258 */ -+#define bRTL8258_TxLPFBW 0xc /* Useless */ -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+/* byte endable for sb_write */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 /* Useless */ -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -+#define tUpdateRxCounter 100 /* 100ms */ -+ -+#define rateCCK 0 /* Useless */ -+#define rateOFDM 1 -+#define rateHT 2 -+ -+/* define Register-End */ -+#define bPMAC_End 0x1ff /* Useless */ -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+/* define max debug item in each debug page -+ * #define bMaxItem_FPGA_PHY0 0x9 -+ * #define bMaxItem_FPGA_PHY1 0x3 -+ * #define bMaxItem_PHY_11B 0x16 -+ * #define bMaxItem_OFDM_PHY0 0x29 -+ * #define bMaxItem_OFDM_PHY1 0x0 */ -+ -+#define bPMACControl 0x0 /* Useless */ -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 /* Useless */ -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+/* BB Register Definition -+ * -+ * 4. Page9(0x900) -+ * */ -+#define rDPDT_control 0x92c -+#define rfe_ctrl_anta_src 0x930 -+#define rS0S1_PathSwitch 0x948 -+#define BBrx_DFIR 0x954 -+#define AGC_table_select 0xb2c -+ -+/* -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rPdp_AntA_8 0xb08 -+#define rPdp_AntA_C 0xb0c -+#define rPdp_AntA_10 0xb10 -+#define rPdp_AntA_14 0xb14 -+#define rPdp_AntA_18 0xb18 -+#define rPdp_AntA_1C 0xb1c -+#define rPdp_AntA_20 0xb20 -+#define rPdp_AntA_24 0xb24 -+ -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+ -+#define rBndA 0xb30 -+#define rHssiPar 0xb34 -+ -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+ -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rPdp_AntB_8 0xb78 -+#define rPdp_AntB_C 0xb7c -+#define rPdp_AntB_10 0xb80 -+#define rPdp_AntB_14 0xb84 -+#define rPdp_AntB_18 0xb88 -+#define rPdp_AntB_1C 0xb8c -+#define rPdp_AntB_20 0xb90 -+#define rPdp_AntB_24 0xb94 -+ -+#define rConfig_Pmpd_AntB 0xb98 -+ -+#define rBndB 0xba0 -+ -+#define rAPK 0xbd8 -+#define rPm_Rx0_AntA 0xbdc -+#define rPm_Rx1_AntA 0xbe0 -+#define rPm_Rx2_AntA 0xbe4 -+#define rPm_Rx3_AntA 0xbe8 -+#define rPm_Rx0_AntB 0xbec -+#define rPm_Rx1_AntB 0xbf0 -+#define rPm_Rx2_AntB 0xbf4 -+#define rPm_Rx3_AntB 0xbf8 -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8188FPwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8188FPwrSeq.h -new file mode 100644 -index 000000000000..5cad428fdd0b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8188FPwrSeq.h -@@ -0,0 +1,212 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef REALTEK_POWER_SEQUENCE_8188F -+#define REALTEK_POWER_SEQUENCE_8188F -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20130815-JackieLau-RTL8188F_Power_Architecture v08.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8188F_TRANS_CARDEMU_TO_ACT_STEPS 13 -+#define RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8188F_TRANS_CARDEMU_TO_SUS_STEPS 14 -+#define RTL8188F_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8188F_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8188F_TRANS_ACT_TO_LPS_STEPS 11 -+#define RTL8188F_TRANS_LPS_TO_ACT_STEPS 13 -+#define RTL8188F_TRANS_ACT_TO_SWLPS_STEPS 21 -+#define RTL8188F_TRANS_SWLPS_TO_ACT_STEPS 14 -+#define RTL8188F_TRANS_END_STEPS 1 -+ -+ -+#define RTL8188F_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT3), 0},/* 0x4[11]=1'b0 disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* 0x4[8]=1 polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x35}, /*0x27<=35 to reduce RF noise*/ -+ -+#define RTL8188F_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ -+ {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x34}, /*0x27 <= 34, xtal_qsel = 0 to xtal bring up*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ -+#define RTL8188F_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00}, /*0x07 = 0x00 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ \ -+ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ -+ -+#define RTL8188F_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ -+ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ -+ -+#define RTL8188F_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00}, /*0x07 = 0x00 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ \ -+ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ -+ -+#define RTL8188F_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ -+ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ -+ -+ -+#define RTL8188F_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8188F_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8188F_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*set RPWM IMR*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ -+ -+ -+#define RTL8188F_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x35},/*xtal_qsel = 1 for low noise*/ \ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x002B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x1c, 0x1c}, /*. 0x2b[4:2] = 3b'111 to enable BB, AFE clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+ -+#define RTL8188F_TRANS_ACT_TO_SWLPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*set RPWM IMR*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ {0x002b, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x1C, 0x00},/*0x2b[4:2]<=0 to gated BB, AFE clock*/ \ -+ {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x34},/*xtal_qsel = 0 for bring up*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x00},/* sdio LPS option*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x83},/* usb LPS option, open bandgap, xtal*/ \ -+ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /* 0xC4[5]<=0, digital LDO no standby mode*/ \ -+ {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /* 0xC4[7]<=1, on domain voltage adjust*/ \ -+ {0x00a7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0xe0}, /* low power LPS enable for sdio*/ \ -+ {0x00a7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0xe4}, /* low power LPS enable for usb*/ \ -+ {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /* enable WL_LPS_EN*/ -+ -+ -+#define RTL8188F_TRANS_SWLPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1, enable security engine*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x09}, /*. reset MAC rx state machine*/\ -+ {0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x86}, /*. reset MAC rx state machine*/\ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/ \ -+ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/ \ -+ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8188F_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, -+ -+ -+ extern WLAN_PWR_CFG rtl8188F_power_on_flow[RTL8188F_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188F_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188F_radio_off_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188F_card_disable_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188F_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188F_card_enable_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188F_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188F_suspend_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188F_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188F_resume_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188F_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188F_hwpdn_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188F_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188F_enter_lps_flow[RTL8188F_TRANS_ACT_TO_LPS_STEPS + RTL8188F_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188F_leave_lps_flow[RTL8188F_TRANS_LPS_TO_ACT_STEPS + RTL8188F_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188F_enter_swlps_flow[RTL8188F_TRANS_ACT_TO_SWLPS_STEPS + RTL8188F_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8188F_leave_swlps_flow[RTL8188F_TRANS_SWLPS_TO_ACT_STEPS + RTL8188F_TRANS_END_STEPS]; -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8192EPhyCfg.h b/drivers/staging/rtl8723cs/include/Hal8192EPhyCfg.h -new file mode 100644 -index 000000000000..021d95335d2b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8192EPhyCfg.h -@@ -0,0 +1,136 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8192EPHYCFG_H__ -+#define __INC_HAL8192EPHYCFG_H__ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 /* us */ -+#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+ #define MAX_AGGR_NUM 0x0B -+#else -+ #define MAX_AGGR_NUM 0x07 -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+/* BB/RF related */ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/*------------------------Export global variable----------------------------*/ -+/*------------------------Export global variable----------------------------*/ -+ -+ -+/*------------------------Export Marco Definition---------------------------*/ -+/*------------------------Export Marco Definition---------------------------*/ -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+/* -+ * BB and RF register read/write -+ * */ -+u32 PHY_QueryBBReg8192E(PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask); -+void PHY_SetBBReg8192E(PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data); -+u32 PHY_QueryRFReg8192E(PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask); -+void PHY_SetRFReg8192E(PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data); -+ -+/* -+ * Initialization related function -+ * -+ * MAC/BB/RF HAL config */ -+int PHY_MACConfig8192E(PADAPTER Adapter); -+int PHY_BBConfig8192E(PADAPTER Adapter); -+int PHY_RFConfig8192E(PADAPTER Adapter); -+ -+/* RF config */ -+ -+ -+/* -+ * BB TX Power R/W -+ * */ -+void PHY_SetTxPowerLevel8192E(PADAPTER Adapter, u8 channel); -+ -+void -+PHY_SetTxPowerIndex_8192E( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+/* -+ * channel switch related funciton -+ * */ -+void -+PHY_SetSwChnlBWMode8192E( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+); -+ -+void -+PHY_SetRFEReg_8192E( -+ PADAPTER Adapter -+); -+ -+void -+phy_SpurCalibration_8192E( -+ PADAPTER Adapter, -+ enum spur_cal_method method -+); -+void PHY_SpurCalibration_8192E( PADAPTER Adapter); -+ -+#ifdef CONFIG_SPUR_CAL_NBI -+void -+phy_SpurCalibration_8192E_NBI( -+ PADAPTER Adapter -+); -+#endif -+/* -+ * BB/MAC/RF other monitor API -+ * */ -+ -+void -+phy_set_rf_path_switch_8192e( -+ struct dm_struct *phydm, -+ bool bMain -+); -+ -+/*--------------------------Exported Function prototype---------------------*/ -+#endif /* __INC_HAL8192CPHYCFG_H */ -diff --git a/drivers/staging/rtl8723cs/include/Hal8192EPhyReg.h b/drivers/staging/rtl8723cs/include/Hal8192EPhyReg.h -new file mode 100644 -index 000000000000..30b771111164 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8192EPhyReg.h -@@ -0,0 +1,1146 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/***************************************************************************** -+ * Copyright(c) 2008, RealTEK Technology Inc. All Right Reserved. -+ * -+ * Module: __INC_HAL8192SPHYREG_H -+ * -+ * -+ * Note: 1. Define PMAC/BB register map -+ * 2. Define RF register map -+ * 3. PMAC/BB register bit mask. -+ * 4. RF reg bit mask. -+ * 5. Other BB/RF relative definition. -+ * -+ * -+ * Export: Constants, macro, functions(API), global variables(None). -+ * -+ * Abbrev: -+ * -+ * History: -+ * Data Who Remark -+ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. -+ * 2. Reorganize code architecture. -+ * 09/25/2008 MH 1. Add RL6052 register definition -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8192EPHYREG_H -+#define __INC_HAL8192EPHYREG_H -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+/* ************************************************************ -+ * 8192S Regsiter offset definition -+ * ************************************************************ */ -+ -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other defintion for BB/RF R/W -+ * */ -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_RFTiming1 0x810 /* Useless now */ -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 -+#define rFPGA0_AdDaClockEn 0x888 /* enable ad/da clock1 for dual-phy */ -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -+#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -+#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -+ -+/* -+ * 5. PageA(0xA00) -+ * -+ * Set Control channel to upper or lower. These settings are required only for 40MHz */ -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -+#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ -+ -+#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -+#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 /* 0xa57 */ -+#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -+#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ -+ -+/* -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+ -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rConfig_Pmpd_AntB 0xb98 -+#define rAPK 0xbd8 -+ -+ -+ -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 /* No setting now */ -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -+#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -+#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ -+ -+#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+/* -+ * 7. RF Register 0x00-0x2E (RF 8256) -+ * RF-0222D 0x00-3F -+ * -+ * Zebra1 */ -+#define rZebra1_HSSIEnable 0x0 /* Useless now */ -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 /* RF channel switch */ -+ -+/* #endif */ -+#define rZebra1_TxGain 0x8 /* Useless now */ -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+/* Zebra4 */ -+#define rGlobalCtrl 0 /* Useless now */ -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+/* RTL8258 */ -+#define rRTL8258_TxLPF 0x11 /* Useless now */ -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+ -+#define RF_IQADJ_G1 0x01 /* */ -+#define RF_IQADJ_G2 0x02 /* */ -+ -+#define RF_POW_TRSW 0x05 /* */ -+ -+#define RF_GAIN_RX 0x06 /* */ -+#define RF_GAIN_TX 0x07 /* */ -+ -+#define RF_TXM_IDAC 0x08 /* */ -+#define RF_IPA_G 0x09 /* */ -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C /* */ -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F /* */ -+ -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+ -+#define RF_RX_AGC_HP 0x12 /* */ -+#define RF_TX_AGC 0x13 /* */ -+#define RF_BIAS 0x14 /* */ -+#define RF_IPA 0x15 /* */ -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 /* */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_TOP 0x19 /* */ -+ -+#define RF_RX_G1 0x1A /* */ -+#define RF_RX_G2 0x1B /* */ -+ -+#define RF_RX_BB2 0x1C /* */ -+#define RF_RX_BB1 0x1D /* */ -+ -+#define RF_RCK1 0x1E /* */ -+#define RF_RCK2 0x1F /* */ -+ -+#define RF_TX_G1 0x20 /* */ -+#define RF_TX_G2 0x21 /* */ -+#define RF_TX_G3 0x22 /* */ -+ -+#define RF_TX_BB1 0x23 /* */ -+ -+#define RF_T_METER_8192E 0x42 /* */ -+#define RF_T_METER_88E 0x42 -+#define RF_T_METER 0x24 /* */ -+ -+/* #endif */ -+ -+#define RF_SYN_G1 0x25 /* RF TX Power control */ -+#define RF_SYN_G2 0x26 /* RF TX Power control */ -+#define RF_SYN_G3 0x27 /* RF TX Power control */ -+#define RF_SYN_G4 0x28 /* RF TX Power control */ -+#define RF_SYN_G5 0x29 /* RF TX Power control */ -+#define RF_SYN_G6 0x2A /* RF TX Power control */ -+#define RF_SYN_G7 0x2B /* RF TX Power control */ -+#define RF_SYN_G8 0x2C /* RF TX Power control */ -+ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C /* */ -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_LDO 0xB1 -+#define RF_WE_LUT 0xEF -+ -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+#define RF_TX_GAIN_OFFSET_8192E(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) -+ -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 /* Useless now */ -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 /* Useless now */ -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf /* Reg0x814 */ -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 /* T2R */ -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 /* Useless now -+ * #define bHWSISelect 0x8 */ -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ -+ -+#define bRFSI_TRSW 0x20 /* Useless now */ -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 /* T65 RF */ -+ -+#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ -+ -+#define bLSSIReadBackData 0xfffff /* T65 RF */ -+ -+#define bLSSIReadOKFlag 0x1000 /* Useless now */ -+#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ -+ -+#define b80MClkDelay 0x18000000 /* Useless */ -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 /* Useless */ -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+/* 3. Page9(0x900) */ -+#define bOFDMTxSC 0x30000000 /* Useless */ -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -+#define bDebugItem 0xff /* reset debug page and LWord */ -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+/* 5. PageC(0xC00) */ -+#define bNumOfSTF 0x3 /* Useless */ -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 /* the threshold for high power */ -+#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+/* #define bRxMF_Hold 0x3800 */ -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+/* #define bRxPath1 0x01 */ -+/* #define bRxPath2 0x02 */ -+/* #define bRxPath3 0x04 */ -+/* #define bRxPath4 0x08 */ -+/* #define bTxPath1 0x10 */ -+/* #define bTxPath2 0x20 */ -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 /* total */ -+#define bShortCFOFLength 11 /* fraction */ -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf /* Useless */ -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 /* Useless */ -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 /* Useless */ -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+/* Rx Pseduo noise */ -+#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+/* 7. RF Register -+ * Zebra1 */ -+#define bZebra1_HSSIEnable 0x8 /* Useless */ -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+/* Zebra4 */ -+#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+/* RTL8258 */ -+#define bRTL8258_TxLPFBW 0xc /* Useless */ -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+/* byte endable for sb_write */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+/* for PutRFRegsetting & GetRFRegSetting BitMask -+ * #define bMask12Bits 0xfffff */ /* RF Reg mask bits -+ * #define bMask20Bits 0xfffff */ /* RF Reg mask bits T65 RF */ -+#define bRFRegOffsetMask 0xfffff -+ -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 /* Useless */ -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -+#define tUpdateRxCounter 100 /* 100ms */ -+ -+#define rateCCK 0 /* Useless */ -+#define rateOFDM 1 -+#define rateHT 2 -+ -+/* define Register-End */ -+#define bPMAC_End 0x1ff /* Useless */ -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+/* define max debug item in each debug page -+ * #define bMaxItem_FPGA_PHY0 0x9 -+ * #define bMaxItem_FPGA_PHY1 0x3 -+ * #define bMaxItem_PHY_11B 0x16 -+ * #define bMaxItem_OFDM_PHY0 0x29 -+ * #define bMaxItem_OFDM_PHY1 0x0 */ -+ -+#define bPMACControl 0x0 /* Useless */ -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 /* Useless */ -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+ -+/* RSSI Dump Message */ -+#define rA_RSSIDump_92E 0xcb0 -+#define rB_RSSIDump_92E 0xcb1 -+#define rS1_RXevmDump_92E 0xcb2 -+#define rS2_RXevmDump_92E 0xcb3 -+#define rA_RXsnrDump_92E 0xcb4 -+#define rB_RXsnrDump_92E 0xcb5 -+#define rA_CfoShortDump_92E 0xcb6 -+#define rB_CfoShortDump_92E 0xcb8 -+#define rA_CfoLongDump_92E 0xcba -+#define rB_CfoLongDump_92E 0xcbc -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+#endif /* __INC_HAL8188EPHYREG_H */ -diff --git a/drivers/staging/rtl8723cs/include/Hal8192EPwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8192EPwrSeq.h -new file mode 100644 -index 000000000000..1f2ba8722572 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8192EPwrSeq.h -@@ -0,0 +1,169 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef REALTEK_POWER_SEQUENCE_8192E -+#define REALTEK_POWER_SEQUENCE_8192E -+ -+#include "HalPwrSeqCmd.h" -+/* -+ Check document WM-20110607-Paul-RTL8192E_Power_Architecture-R02.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS 18 -+#define RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS 18 -+#define RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS 18 -+#define RTL8192E_TRANS_SUS_TO_CARDEMU_STEPS 18 -+#define RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS 18 -+#define RTL8192E_TRANS_PDN_TO_CARDEMU_STEPS 18 -+#define RTL8192E_TRANS_ACT_TO_LPS_STEPS 23 -+#define RTL8192E_TRANS_LPS_TO_ACT_STEPS 23 -+#define RTL8192E_TRANS_END_STEPS 1 -+ -+ -+#define RTL8192E_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3), 0},/* disable WL suspend*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ -+ -+#define RTL8192E_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ -+ -+#define RTL8192E_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8192E_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8192E_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ -+ {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*Unlock small LDO Register*/ \ -+ {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*Disable small LDO*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8192E_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*Enable small LDO*/ \ -+ {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0}, /*Lock small LDO Register*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ -+ -+#define RTL8192E_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8192E_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8192E_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8192E_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM, For Repeatly In and out, Taggle bit should be changed*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/\ -+ {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*Clear ISR*/ -+ -+#define RTL8192E_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, -+ -+ -+ extern WLAN_PWR_CFG rtl8192E_power_on_flow[RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8192E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8192E_radio_off_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8192E_card_disable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8192E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8192E_card_enable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8192E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8192E_suspend_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8192E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8192E_resume_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8192E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8192E_hwpdn_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8192E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8192E_enter_lps_flow[RTL8192E_TRANS_ACT_TO_LPS_STEPS + RTL8192E_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8192E_leave_lps_flow[RTL8192E_TRANS_LPS_TO_ACT_STEPS + RTL8192E_TRANS_END_STEPS]; -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8192FPhyCfg.h b/drivers/staging/rtl8723cs/include/Hal8192FPhyCfg.h -new file mode 100644 -index 000000000000..dd9fdcc09159 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8192FPhyCfg.h -@@ -0,0 +1,115 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8192FPHYCFG_H__ -+#define __INC_HAL8192FPHYCFG_H__ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 /* us */ -+#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+ #define MAX_AGGR_NUM 0x0B -+#else -+ #define MAX_AGGR_NUM 0x07 -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+/*--------------------------Define Parameters End-------------------------------*/ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+/*------------------------------Define structure End----------------------------*/ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+u32 -+PHY_QueryBBReg_8192F( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetBBReg_8192F( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+u32 -+PHY_QueryRFReg_8192F( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetRFReg_8192F( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+/* MAC/BB/RF HAL config */ -+int PHY_BBConfig8192F(PADAPTER Adapter ); -+ -+int PHY_RFConfig8192F(PADAPTER Adapter); -+ -+s32 PHY_MACConfig8192F(PADAPTER padapter); -+ -+int -+PHY_ConfigRFWithParaFile_8192F( -+ PADAPTER Adapter, -+ u8 *pFileName, -+ enum rf_path eRFPath -+); -+ -+void -+PHY_SetTxPowerIndex_8192F( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+void -+PHY_SetTxPowerLevel8192F( -+ PADAPTER Adapter, -+ u8 channel -+); -+ -+void -+PHY_SetSwChnlBWMode8192F( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+); -+ -+void phy_set_rf_path_switch_8192f( -+ PADAPTER pAdapter, -+ bool bMain -+); -+/*--------------------------Exported Function prototype End---------------------*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8192FPhyReg.h b/drivers/staging/rtl8723cs/include/Hal8192FPhyReg.h -new file mode 100644 -index 000000000000..b82f7f98696d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8192FPhyReg.h -@@ -0,0 +1,1134 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8192FPHYREG_H__ -+#define __INC_HAL8192FPHYREG_H__ -+ -+#define rSYM_WLBT_PAPE_SEL 0x64 -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other definition for BB/RF R/W -+ * */ -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+/* -+ * 2. Page2(0x200) -+ * -+ * The following two definition are only used for USB interface. */ -+#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -+#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC // RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_RFTiming1 0x810 /* Useless now */ -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+ -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -+#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -+#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now // RF Interface Readback Value */ -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC // RF BW Setting?? */ -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now // Status report?? */ -+#define rDPDT_control 0x92c -+#define rfe_ctrl_anta_src 0x930 -+#define rS0S1_PathSwitch 0x948 -+#define rBBrx_DFIR 0x954 -+ -+/* -+ * 5. PageA(0xA00) -+ * -+ * Set Control channel to upper or lower. These settings are required only for 40MHz */ -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now // Select RX path by RSSI */ -+#define rCCK0_CCA 0xa08 /* Disable init gain now // Init gain */ -+ -+#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -+#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 /* 0xa57 */ -+#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -+#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ -+ -+/* -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rPdp_AntA_8 0xb08 -+#define rPdp_AntA_C 0xb0c -+#define rPdp_AntA_10 0xb10 -+#define rPdp_AntA_14 0xb14 -+#define rPdp_AntA_18 0xb18 -+#define rPdp_AntA_1C 0xb1c -+#define rPdp_AntA_20 0xb20 -+#define rPdp_AntA_24 0xb24 -+ -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+ -+#define rBndA 0xb30 -+#define rHssiPar 0xb34 -+ -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+ -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rPdp_AntB_8 0xb78 -+#define rPdp_AntB_C 0xb7c -+#define rPdp_AntB_10 0xb80 -+#define rPdp_AntB_14 0xb84 -+#define rPdp_AntB_18 0xb88 -+#define rPdp_AntB_1C 0xb8c -+#define rPdp_AntB_20 0xb90 -+#define rPdp_AntB_24 0xb94 -+ -+#define rConfig_Pmpd_AntB 0xb98 -+ -+#define rBndB 0xba0 -+ -+#define rAPK 0xbd8 -+#define rPm_Rx0_AntA 0xbdc -+#define rPm_Rx1_AntA 0xbe0 -+#define rPm_Rx2_AntA 0xbe4 -+#define rPm_Rx3_AntA 0xbe8 -+#define rPm_Rx0_AntB 0xbec -+#define rPm_Rx1_AntB 0xbf0 -+#define rPm_Rx2_AntB 0xbf4 -+#define rPm_Rx3_AntB 0xbf8 -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD // DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 /* No setting now */ -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -+#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -+#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ -+ -+#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+/* -+ * 7. RF Register 0x00-0x2E (RF 8256) -+ * RF-0222D 0x00-3F -+ * -+ * Zebra1 */ -+#define rZebra1_HSSIEnable 0x0 /* Useless now */ -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 /* RF channel switch */ -+ -+/* #endif */ -+#define rZebra1_TxGain 0x8 /* Useless now */ -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+/* Zebra4 */ -+#define rGlobalCtrl 0 /* Useless now */ -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+/* RTL8258 */ -+#define rRTL8258_TxLPF 0x11 /* Useless now */ -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+ -+#define RF_IQADJ_G1 0x01 /* */ -+#define RF_IQADJ_G2 0x02 /* */ -+#define RF_BS_PA_APSET_G1_G4 0x03 -+#define RF_BS_PA_APSET_G5_G8 0x04 -+#define RF_POW_TRSW 0x05 /* */ -+ -+#define RF_GAIN_RX 0x06 /* */ -+#define RF_GAIN_TX 0x07 /* */ -+ -+#define RF_TXM_IDAC 0x08 /* */ -+#define RF_IPA_G 0x09 /* */ -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C /* */ -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F /* */ -+ -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+ -+#define RF_RX_AGC_HP 0x12 /* */ -+#define RF_TX_AGC 0x13 /* */ -+#define RF_BIAS 0x14 /* */ -+#define RF_IPA 0x15 /* */ -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 /* */ -+#define RF_MODE_AG 0x18 /* */ -+#define rRfChannel 0x18 /* RF channel and BW switch */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_TOP 0x19 /* */ -+ -+#define RF_RX_G1 0x1A /* */ -+#define RF_RX_G2 0x1B /* */ -+ -+#define RF_RX_BB2 0x1C /* */ -+#define RF_RX_BB1 0x1D /* */ -+ -+#define RF_RCK1 0x1E /* */ -+#define RF_RCK2 0x1F /* */ -+ -+#define RF_TX_G1 0x20 /* */ -+#define RF_TX_G2 0x21 /* */ -+#define RF_TX_G3 0x22 /* */ -+ -+#define RF_TX_BB1 0x23 /* */ -+ -+#define RF_T_METER 0x24 /* */ -+ -+#define RF_SYN_G1 0x25 /* RF TX Power control */ -+#define RF_SYN_G2 0x26 /* RF TX Power control */ -+#define RF_SYN_G3 0x27 /* RF TX Power control */ -+#define RF_SYN_G4 0x28 /* RF TX Power control */ -+#define RF_SYN_G5 0x29 /* RF TX Power control */ -+#define RF_SYN_G6 0x2A /* RF TX Power control */ -+#define RF_SYN_G7 0x2B /* RF TX Power control */ -+#define RF_SYN_G8 0x2C /* RF TX Power control */ -+ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C /* */ -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_T_METER_88E 0x42 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+#define RF_S0S1 0xB0 -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+#define RF_TX_GAIN_OFFSET_8192F(_val) (abs((_val)) | (((_val) > 0) ? BIT(4) : 0)) -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 /* Useless now */ -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 /* Useless now */ -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf /* Reg0x814 */ -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 /* T2R */ -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 /* Useless now -+ * #define bHWSISelect 0x8 */ -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ -+ -+#define bRFSI_TRSW 0x20 /* Useless now */ -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 /* T65 RF */ -+ -+#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ -+ -+#define bLSSIReadBackData 0xfffff /* T65 RF */ -+ -+#define bLSSIReadOKFlag 0x1000 /* Useless now */ -+#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ -+ -+#define b80MClkDelay 0x18000000 /* Useless */ -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 /* Useless */ -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+/* 3. Page9(0x900) */ -+#define bOFDMTxSC 0x30000000 /* Useless */ -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -+#define bDebugItem 0xff /* reset debug page and LWord */ -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+/* 5. PageC(0xC00) */ -+#define bNumOfSTF 0x3 /* Useless */ -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 /* the threshold for high power */ -+#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+/* #define bRxMF_Hold 0x3800 */ -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+/* #define bRxPath1 0x01 */ -+/* #define bRxPath2 0x02 */ -+/* #define bRxPath3 0x04 */ -+/* #define bRxPath4 0x08 */ -+/* #define bTxPath1 0x10 */ -+/* #define bTxPath2 0x20 */ -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 /* total */ -+#define bShortCFOFLength 11 /* fraction */ -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf /* Useless */ -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 /* Useless */ -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 /* Useless */ -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+/* Rx Pseduo noise */ -+#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+/* 7. RF Register -+ * Zebra1 */ -+#define bZebra1_HSSIEnable 0x8 /* Useless */ -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+/* Zebra4 */ -+#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+/* RTL8258 */ -+#define bRTL8258_TxLPFBW 0xc /* Useless */ -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+/* byte endable for sb_write */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 /* Useless */ -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 /* 500ms // Useless */ -+#define tUpdateRxCounter 100 /* 100ms */ -+ -+#define rateCCK 0 /* Useless */ -+#define rateOFDM 1 -+#define rateHT 2 -+ -+/* define Register-End */ -+#define bPMAC_End 0x1ff /* Useless */ -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+/* define max debug item in each debug page -+ * #define bMaxItem_FPGA_PHY0 0x9 -+ * #define bMaxItem_FPGA_PHY1 0x3 -+ * #define bMaxItem_PHY_11B 0x16 -+ * #define bMaxItem_OFDM_PHY0 0x29 -+ * #define bMaxItem_OFDM_PHY1 0x0 */ -+ -+#define bPMACControl 0x0 /* Useless */ -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 /* Useless */ -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8192FPwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8192FPwrSeq.h -new file mode 100644 -index 000000000000..2b0bdc7e3e2a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8192FPwrSeq.h -@@ -0,0 +1,220 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef REALTEK_POWER_SEQUENCE_8192F -+#define REALTEK_POWER_SEQUENCE_8192F -+#define POWER_SEQUENCE_8192F_VER 04 -+/* #include "PwrSeqCmd.h" */ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20110607-Paul-RTL8192e_Power_Architecture-R02.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transition from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS 38 -+#define RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS 8 -+#define RTL8192F_TRANS_CARDEMU_TO_SUS_STEPS 7 -+#define RTL8192F_TRANS_SUS_TO_CARDEMU_STEPS 5 -+#define RTL8192F_TRANS_CARDEMU_TO_CARDDIS_STEPS 8 -+#define RTL8192F_TRANS_CARDDIS_TO_CARDEMU_STEPS 8 -+#define RTL8192F_TRANS_CARDEMU_TO_PDN_STEPS 4 -+#define RTL8192F_TRANS_PDN_TO_CARDEMU_STEPS 1 -+#define RTL8192F_TRANS_ACT_TO_LPS_STEPS 13 -+#define RTL8192F_TRANS_LPS_TO_ACT_STEPS 11 -+#define RTL8192F_TRANS_END_STEPS 1 -+ -+ -+#define RTL8192F_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ -+ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, (BIT1|BIT0), 0}, \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},/* SWR OCP enable 0x10[18]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ -+ {0x007f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x7c[31]=1,LDO has max output capability*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ -+ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 data mode*/\ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ -+ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ -+ {0x0068, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/*RF HW ON/OFF Enable*/\ -+ {0x001C, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/*Register Lock Disable*/\ -+ {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ -+ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S1*/\ -+ {0x007B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S0*/\ -+ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/*enable RF path S1*/\ -+ {0x007B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/*enalbe RF path S0*/\ -+ {0x0097, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*AFE_Ctrl*/\ -+ {0x00DC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xCC},/*AFE_Ctrl*/\ -+ {0x0024, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x18, 0x00},/*AFE_Ctrl 0x24[4:3]=00 for xtal gmn*/\ -+ {0x1050, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[7:0] Pull down software register*/\ -+ {0x1051, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[15:8] Pull down software register*/\ -+ {0x1052, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[23:16] Pull down software register*/\ -+ {0x1053, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[31:24] Pull down software register*/\ -+ {0x105B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_B[7:0] Pull down software register*/\ -+ {0x001C, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*Register Lock Enable*/\ -+ {0x0077, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT7|BIT6), 0x3},/*set HCI Power sequence state delay time:0*/ -+ -+ -+#define RTL8192F_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, */ /*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x2[0]=0 Reset BB,RF enter Power Down mode*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0}, /*0x10[18] = 0 to disable ocp*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ -+ -+ -+#define RTL8192F_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 USB|SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8192F_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+ -+#define RTL8192F_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend*/ \ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8192F_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x10[18] = 1 to enable ocp*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8192F_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8192F_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8192F_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8192F_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8192F_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // -+ -+ -+extern WLAN_PWR_CFG rtl8192F_power_on_flow[RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192F_radio_off_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192F_card_disable_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_CARDDIS_STEPS+RTL8192F_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192F_card_enable_flow[RTL8192F_TRANS_CARDDIS_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192F_suspend_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192F_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192F_resume_flow[RTL8192F_TRANS_SUS_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192F_hwpdn_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192F_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192F_enter_lps_flow[RTL8192F_TRANS_ACT_TO_LPS_STEPS+RTL8192F_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8192F_leave_lps_flow[RTL8192F_TRANS_LPS_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8703BPhyCfg.h b/drivers/staging/rtl8723cs/include/Hal8703BPhyCfg.h -new file mode 100644 -index 000000000000..57a421a031fd ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8703BPhyCfg.h -@@ -0,0 +1,116 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8703BPHYCFG_H__ -+#define __INC_HAL8703BPHYCFG_H__ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 /* us */ -+#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+ #define MAX_AGGR_NUM 0x0B -+#else -+ #define MAX_AGGR_NUM 0x07 -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+/*--------------------------Define Parameters End-------------------------------*/ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+/*------------------------------Define structure End----------------------------*/ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+u32 -+PHY_QueryBBReg_8703B( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetBBReg_8703B( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+u32 -+PHY_QueryRFReg_8703B( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetRFReg_8703B( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+/* MAC/BB/RF HAL config */ -+int PHY_BBConfig8703B(PADAPTER Adapter); -+ -+int PHY_RFConfig8703B(PADAPTER Adapter); -+ -+s32 PHY_MACConfig8703B(PADAPTER padapter); -+ -+int -+PHY_ConfigRFWithParaFile_8703B( -+ PADAPTER Adapter, -+ u8 *pFileName, -+ enum rf_path eRFPath -+); -+ -+void -+PHY_SetTxPowerIndex_8703B( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+void -+PHY_SetTxPowerLevel8703B( -+ PADAPTER Adapter, -+ u8 channel -+); -+ -+void -+PHY_SetSwChnlBWMode8703B( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+); -+ -+void phy_set_rf_path_switch_8703b( -+ struct dm_struct *phydm, -+ bool bMain -+); -+ -+/*--------------------------Exported Function prototype End---------------------*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8703BPhyReg.h b/drivers/staging/rtl8723cs/include/Hal8703BPhyReg.h -new file mode 100644 -index 000000000000..881a13cfac87 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8703BPhyReg.h -@@ -0,0 +1,1133 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8703BPHYREG_H__ -+#define __INC_HAL8703BPHYREG_H__ -+ -+#define rSYM_WLBT_PAPE_SEL 0x64 -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other defintion for BB/RF R/W -+ * */ -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+/* -+ * 2. Page2(0x200) -+ * -+ * The following two definition are only used for USB interface. */ -+#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -+#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_RFTiming1 0x810 /* Useless now */ -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+ -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -+#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -+#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -+#define rDPDT_control 0x92c -+#define rfe_ctrl_anta_src 0x930 -+#define rS0S1_PathSwitch 0x948 -+#define rBBrx_DFIR 0x954 -+ -+/* -+ * 5. PageA(0xA00) -+ * -+ * Set Control channel to upper or lower. These settings are required only for 40MHz */ -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -+#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ -+ -+#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -+#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 /* 0xa57 */ -+#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -+#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ -+ -+/* -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rPdp_AntA_8 0xb08 -+#define rPdp_AntA_C 0xb0c -+#define rPdp_AntA_10 0xb10 -+#define rPdp_AntA_14 0xb14 -+#define rPdp_AntA_18 0xb18 -+#define rPdp_AntA_1C 0xb1c -+#define rPdp_AntA_20 0xb20 -+#define rPdp_AntA_24 0xb24 -+ -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+ -+#define rBndA 0xb30 -+#define rHssiPar 0xb34 -+ -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+ -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rPdp_AntB_8 0xb78 -+#define rPdp_AntB_C 0xb7c -+#define rPdp_AntB_10 0xb80 -+#define rPdp_AntB_14 0xb84 -+#define rPdp_AntB_18 0xb88 -+#define rPdp_AntB_1C 0xb8c -+#define rPdp_AntB_20 0xb90 -+#define rPdp_AntB_24 0xb94 -+ -+#define rConfig_Pmpd_AntB 0xb98 -+ -+#define rBndB 0xba0 -+ -+#define rAPK 0xbd8 -+#define rPm_Rx0_AntA 0xbdc -+#define rPm_Rx1_AntA 0xbe0 -+#define rPm_Rx2_AntA 0xbe4 -+#define rPm_Rx3_AntA 0xbe8 -+#define rPm_Rx0_AntB 0xbec -+#define rPm_Rx1_AntB 0xbf0 -+#define rPm_Rx2_AntB 0xbf4 -+#define rPm_Rx3_AntB 0xbf8 -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 /* No setting now */ -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -+#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -+#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ -+ -+#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+/* -+ * 7. RF Register 0x00-0x2E (RF 8256) -+ * RF-0222D 0x00-3F -+ * -+ * Zebra1 */ -+#define rZebra1_HSSIEnable 0x0 /* Useless now */ -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 /* RF channel switch */ -+ -+/* #endif */ -+#define rZebra1_TxGain 0x8 /* Useless now */ -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+/* Zebra4 */ -+#define rGlobalCtrl 0 /* Useless now */ -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+/* RTL8258 */ -+#define rRTL8258_TxLPF 0x11 /* Useless now */ -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+ -+#define RF_IQADJ_G1 0x01 /* */ -+#define RF_IQADJ_G2 0x02 /* */ -+#define RF_BS_PA_APSET_G1_G4 0x03 -+#define RF_BS_PA_APSET_G5_G8 0x04 -+#define RF_POW_TRSW 0x05 /* */ -+ -+#define RF_GAIN_RX 0x06 /* */ -+#define RF_GAIN_TX 0x07 /* */ -+ -+#define RF_TXM_IDAC 0x08 /* */ -+#define RF_IPA_G 0x09 /* */ -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C /* */ -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F /* */ -+ -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+ -+#define RF_RX_AGC_HP 0x12 /* */ -+#define RF_TX_AGC 0x13 /* */ -+#define RF_BIAS 0x14 /* */ -+#define RF_IPA 0x15 /* */ -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 /* */ -+#define RF_MODE_AG 0x18 /* */ -+#define rRfChannel 0x18 /* RF channel and BW switch */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_TOP 0x19 /* */ -+ -+#define RF_RX_G1 0x1A /* */ -+#define RF_RX_G2 0x1B /* */ -+ -+#define RF_RX_BB2 0x1C /* */ -+#define RF_RX_BB1 0x1D /* */ -+ -+#define RF_RCK1 0x1E /* */ -+#define RF_RCK2 0x1F /* */ -+ -+#define RF_TX_G1 0x20 /* */ -+#define RF_TX_G2 0x21 /* */ -+#define RF_TX_G3 0x22 /* */ -+ -+#define RF_TX_BB1 0x23 /* */ -+ -+#define RF_T_METER 0x24 /* */ -+ -+#define RF_SYN_G1 0x25 /* RF TX Power control */ -+#define RF_SYN_G2 0x26 /* RF TX Power control */ -+#define RF_SYN_G3 0x27 /* RF TX Power control */ -+#define RF_SYN_G4 0x28 /* RF TX Power control */ -+#define RF_SYN_G5 0x29 /* RF TX Power control */ -+#define RF_SYN_G6 0x2A /* RF TX Power control */ -+#define RF_SYN_G7 0x2B /* RF TX Power control */ -+#define RF_SYN_G8 0x2C /* RF TX Power control */ -+ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C /* */ -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+#define RF_S0S1 0xB0 -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+#define RF_TX_GAIN_OFFSET_8703B(_val) (abs((_val)) | (((_val) > 0) ? BIT5 : 0)) -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 /* Useless now */ -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 /* Useless now */ -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf /* Reg0x814 */ -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 /* T2R */ -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 /* Useless now -+ * #define bHWSISelect 0x8 */ -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ -+ -+#define bRFSI_TRSW 0x20 /* Useless now */ -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 /* T65 RF */ -+ -+#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ -+ -+#define bLSSIReadBackData 0xfffff /* T65 RF */ -+ -+#define bLSSIReadOKFlag 0x1000 /* Useless now */ -+#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ -+ -+#define b80MClkDelay 0x18000000 /* Useless */ -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 /* Useless */ -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+/* 3. Page9(0x900) */ -+#define bOFDMTxSC 0x30000000 /* Useless */ -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -+#define bDebugItem 0xff /* reset debug page and LWord */ -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+/* 5. PageC(0xC00) */ -+#define bNumOfSTF 0x3 /* Useless */ -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 /* the threshold for high power */ -+#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+/* #define bRxMF_Hold 0x3800 */ -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+/* #define bRxPath1 0x01 */ -+/* #define bRxPath2 0x02 */ -+/* #define bRxPath3 0x04 */ -+/* #define bRxPath4 0x08 */ -+/* #define bTxPath1 0x10 */ -+/* #define bTxPath2 0x20 */ -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 /* total */ -+#define bShortCFOFLength 11 /* fraction */ -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf /* Useless */ -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 /* Useless */ -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 /* Useless */ -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+/* Rx Pseduo noise */ -+#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+/* 7. RF Register -+ * Zebra1 */ -+#define bZebra1_HSSIEnable 0x8 /* Useless */ -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+/* Zebra4 */ -+#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+/* RTL8258 */ -+#define bRTL8258_TxLPFBW 0xc /* Useless */ -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+/* byte endable for sb_write */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 /* Useless */ -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -+#define tUpdateRxCounter 100 /* 100ms */ -+ -+#define rateCCK 0 /* Useless */ -+#define rateOFDM 1 -+#define rateHT 2 -+ -+/* define Register-End */ -+#define bPMAC_End 0x1ff /* Useless */ -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+/* define max debug item in each debug page -+ * #define bMaxItem_FPGA_PHY0 0x9 -+ * #define bMaxItem_FPGA_PHY1 0x3 -+ * #define bMaxItem_PHY_11B 0x16 -+ * #define bMaxItem_OFDM_PHY0 0x29 -+ * #define bMaxItem_OFDM_PHY1 0x0 */ -+ -+#define bPMACControl 0x0 /* Useless */ -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 /* Useless */ -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8703BPwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8703BPwrSeq.h -new file mode 100644 -index 000000000000..0dac13ee34a9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8703BPwrSeq.h -@@ -0,0 +1,198 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef REALTEK_POWER_SEQUENCE_8703B -+#define REALTEK_POWER_SEQUENCE_8703B -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20140402-JackieLau-RTL8703B_Power_Architecture v09.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS 23 -+#define RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS 15 -+#define RTL8703B_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8703B_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8703B_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8703B_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8703B_TRANS_END_STEPS 1 -+ -+ -+#define RTL8703B_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ -+ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3 | BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ -+ {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 , BIT3},/* enabled usb resume */ \ -+ {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 , 0},/* disable usb resume */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3), 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ -+ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ -+ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ -+ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ -+ {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ -+ {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ -+ -+ -+#define RTL8703B_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ -+ -+ -+#define RTL8703B_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8703B_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8703B_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8703B_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8703B_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK | PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8703B_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8703B_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8703B_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8703B_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, -+ -+ -+ extern WLAN_PWR_CFG rtl8703B_power_on_flow[RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS + RTL8703B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8703B_radio_off_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8703B_card_disable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8703B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8703B_card_enable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8703B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8703B_suspend_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS + RTL8703B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8703B_resume_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS + RTL8703B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8703B_hwpdn_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8703B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8703B_enter_lps_flow[RTL8703B_TRANS_ACT_TO_LPS_STEPS + RTL8703B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8703B_leave_lps_flow[RTL8703B_TRANS_LPS_TO_ACT_STEPS + RTL8703B_TRANS_END_STEPS]; -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8710BPhyCfg.h b/drivers/staging/rtl8723cs/include/Hal8710BPhyCfg.h -new file mode 100644 -index 000000000000..3c5808e92ae8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8710BPhyCfg.h -@@ -0,0 +1,111 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8710BPHYCFG_H__ -+#define __INC_HAL8710BPHYCFG_H__ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 /* us */ -+#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+ #define MAX_AGGR_NUM 0x0B -+#else -+ #define MAX_AGGR_NUM 0x07 -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+/*--------------------------Define Parameters End-------------------------------*/ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+/*------------------------------Define structure End----------------------------*/ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+u32 -+PHY_QueryBBReg_8710B( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetBBReg_8710B( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+u32 -+PHY_QueryRFReg_8710B( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetRFReg_8710B( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+/* MAC/BB/RF HAL config */ -+int PHY_BBConfig8710B(PADAPTER Adapter); -+ -+int PHY_RFConfig8710B(PADAPTER Adapter); -+ -+s32 PHY_MACConfig8710B(PADAPTER padapter); -+ -+int -+PHY_ConfigRFWithParaFile_8710B( -+ PADAPTER Adapter, -+ u8 *pFileName, -+ enum rf_path eRFPath -+); -+ -+void -+PHY_SetTxPowerIndex_8710B( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+void -+PHY_SetTxPowerLevel8710B( -+ PADAPTER Adapter, -+ u8 channel -+); -+ -+void -+PHY_SetSwChnlBWMode8710B( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+); -+ -+/*--------------------------Exported Function prototype End---------------------*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8710BPhyReg.h b/drivers/staging/rtl8723cs/include/Hal8710BPhyReg.h -new file mode 100644 -index 000000000000..337e03207fed ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8710BPhyReg.h -@@ -0,0 +1,1134 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8710BPHYREG_H__ -+#define __INC_HAL8710BPHYREG_H__ -+ -+#define rSYM_WLBT_PAPE_SEL 0x64 -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other definition for BB/RF R/W -+ * */ -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+/* -+ * 2. Page2(0x200) -+ * -+ * The following two definition are only used for USB interface. */ -+#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -+#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC // RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_RFTiming1 0x810 /* Useless now */ -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+ -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -+#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -+#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now // RF Interface Readback Value */ -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC // RF BW Setting?? */ -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now // Status report?? */ -+#define rDPDT_control 0x92c -+#define rfe_ctrl_anta_src 0x930 -+#define rS0S1_PathSwitch 0x948 -+#define rBBrx_DFIR 0x954 -+ -+/* -+ * 5. PageA(0xA00) -+ * -+ * Set Control channel to upper or lower. These settings are required only for 40MHz */ -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now // Select RX path by RSSI */ -+#define rCCK0_CCA 0xa08 /* Disable init gain now // Init gain */ -+ -+#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -+#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 /* 0xa57 */ -+#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -+#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ -+ -+/* -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rPdp_AntA_8 0xb08 -+#define rPdp_AntA_C 0xb0c -+#define rPdp_AntA_10 0xb10 -+#define rPdp_AntA_14 0xb14 -+#define rPdp_AntA_18 0xb18 -+#define rPdp_AntA_1C 0xb1c -+#define rPdp_AntA_20 0xb20 -+#define rPdp_AntA_24 0xb24 -+ -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+ -+#define rBndA 0xb30 -+#define rHssiPar 0xb34 -+ -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+ -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rPdp_AntB_8 0xb78 -+#define rPdp_AntB_C 0xb7c -+#define rPdp_AntB_10 0xb80 -+#define rPdp_AntB_14 0xb84 -+#define rPdp_AntB_18 0xb88 -+#define rPdp_AntB_1C 0xb8c -+#define rPdp_AntB_20 0xb90 -+#define rPdp_AntB_24 0xb94 -+ -+#define rConfig_Pmpd_AntB 0xb98 -+ -+#define rBndB 0xba0 -+ -+#define rAPK 0xbd8 -+#define rPm_Rx0_AntA 0xbdc -+#define rPm_Rx1_AntA 0xbe0 -+#define rPm_Rx2_AntA 0xbe4 -+#define rPm_Rx3_AntA 0xbe8 -+#define rPm_Rx0_AntB 0xbec -+#define rPm_Rx1_AntB 0xbf0 -+#define rPm_Rx2_AntB 0xbf4 -+#define rPm_Rx3_AntB 0xbf8 -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD // DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 /* No setting now */ -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -+#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -+#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ -+ -+#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+/* -+ * 7. RF Register 0x00-0x2E (RF 8256) -+ * RF-0222D 0x00-3F -+ * -+ * Zebra1 */ -+#define rZebra1_HSSIEnable 0x0 /* Useless now */ -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 /* RF channel switch */ -+ -+/* #endif */ -+#define rZebra1_TxGain 0x8 /* Useless now */ -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+/* Zebra4 */ -+#define rGlobalCtrl 0 /* Useless now */ -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+/* RTL8258 */ -+#define rRTL8258_TxLPF 0x11 /* Useless now */ -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+ -+#define RF_IQADJ_G1 0x01 /* */ -+#define RF_IQADJ_G2 0x02 /* */ -+#define RF_BS_PA_APSET_G1_G4 0x03 -+#define RF_BS_PA_APSET_G5_G8 0x04 -+#define RF_POW_TRSW 0x05 /* */ -+ -+#define RF_GAIN_RX 0x06 /* */ -+#define RF_GAIN_TX 0x07 /* */ -+ -+#define RF_TXM_IDAC 0x08 /* */ -+#define RF_IPA_G 0x09 /* */ -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C /* */ -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F /* */ -+ -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+ -+#define RF_RX_AGC_HP 0x12 /* */ -+#define RF_TX_AGC 0x13 /* */ -+#define RF_BIAS 0x14 /* */ -+#define RF_IPA 0x15 /* */ -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 /* */ -+#define RF_MODE_AG 0x18 /* */ -+#define rRfChannel 0x18 /* RF channel and BW switch */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_TOP 0x19 /* */ -+ -+#define RF_RX_G1 0x1A /* */ -+#define RF_RX_G2 0x1B /* */ -+ -+#define RF_RX_BB2 0x1C /* */ -+#define RF_RX_BB1 0x1D /* */ -+ -+#define RF_RCK1 0x1E /* */ -+#define RF_RCK2 0x1F /* */ -+ -+#define RF_TX_G1 0x20 /* */ -+#define RF_TX_G2 0x21 /* */ -+#define RF_TX_G3 0x22 /* */ -+ -+#define RF_TX_BB1 0x23 /* */ -+ -+#define RF_T_METER 0x24 /* */ -+ -+#define RF_SYN_G1 0x25 /* RF TX Power control */ -+#define RF_SYN_G2 0x26 /* RF TX Power control */ -+#define RF_SYN_G3 0x27 /* RF TX Power control */ -+#define RF_SYN_G4 0x28 /* RF TX Power control */ -+#define RF_SYN_G5 0x29 /* RF TX Power control */ -+#define RF_SYN_G6 0x2A /* RF TX Power control */ -+#define RF_SYN_G7 0x2B /* RF TX Power control */ -+#define RF_SYN_G8 0x2C /* RF TX Power control */ -+ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C /* */ -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_T_METER_88E 0x42 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+#define RF_S0S1 0xB0 -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+#define RF_TX_GAIN_OFFSET_8710B(_val) (abs((_val)) | (((_val) > 0) ? BIT(4) : 0)) -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 /* Useless now */ -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 /* Useless now */ -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf /* Reg0x814 */ -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 /* T2R */ -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 /* Useless now -+ * #define bHWSISelect 0x8 */ -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ -+ -+#define bRFSI_TRSW 0x20 /* Useless now */ -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 /* T65 RF */ -+ -+#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ -+ -+#define bLSSIReadBackData 0xfffff /* T65 RF */ -+ -+#define bLSSIReadOKFlag 0x1000 /* Useless now */ -+#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ -+ -+#define b80MClkDelay 0x18000000 /* Useless */ -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 /* Useless */ -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+/* 3. Page9(0x900) */ -+#define bOFDMTxSC 0x30000000 /* Useless */ -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -+#define bDebugItem 0xff /* reset debug page and LWord */ -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+/* 5. PageC(0xC00) */ -+#define bNumOfSTF 0x3 /* Useless */ -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 /* the threshold for high power */ -+#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+/* #define bRxMF_Hold 0x3800 */ -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+/* #define bRxPath1 0x01 */ -+/* #define bRxPath2 0x02 */ -+/* #define bRxPath3 0x04 */ -+/* #define bRxPath4 0x08 */ -+/* #define bTxPath1 0x10 */ -+/* #define bTxPath2 0x20 */ -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 /* total */ -+#define bShortCFOFLength 11 /* fraction */ -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf /* Useless */ -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 /* Useless */ -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 /* Useless */ -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+/* Rx Pseduo noise */ -+#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+/* 7. RF Register -+ * Zebra1 */ -+#define bZebra1_HSSIEnable 0x8 /* Useless */ -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+/* Zebra4 */ -+#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+/* RTL8258 */ -+#define bRTL8258_TxLPFBW 0xc /* Useless */ -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+/* byte endable for sb_write */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 /* Useless */ -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 /* 500ms // Useless */ -+#define tUpdateRxCounter 100 /* 100ms */ -+ -+#define rateCCK 0 /* Useless */ -+#define rateOFDM 1 -+#define rateHT 2 -+ -+/* define Register-End */ -+#define bPMAC_End 0x1ff /* Useless */ -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+/* define max debug item in each debug page -+ * #define bMaxItem_FPGA_PHY0 0x9 -+ * #define bMaxItem_FPGA_PHY1 0x3 -+ * #define bMaxItem_PHY_11B 0x16 -+ * #define bMaxItem_OFDM_PHY0 0x29 -+ * #define bMaxItem_OFDM_PHY1 0x0 */ -+ -+#define bPMACControl 0x0 /* Useless */ -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 /* Useless */ -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8710BPwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8710BPwrSeq.h -new file mode 100644 -index 000000000000..31ad29c794c5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8710BPwrSeq.h -@@ -0,0 +1,167 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef REALTEK_POWER_SEQUENCE_8710B -+#define REALTEK_POWER_SEQUENCE_8710B -+ -+/* #include "PwrSeqCmd.h" */ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20110607-Paul-RTL8192e_Power_Architecture-R02.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transition from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS 5 -+#define RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS 4 -+#define RTL8710B_TRANS_CARDEMU_TO_SUS_STEPS 7 -+#define RTL8710B_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8710B_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8710B_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8710B_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8710B_TRANS_ACT_TO_SWLPS_STEPS 22 -+#define RTL8710B_TRANS_SWLPS_TO_ACT_STEPS 15 -+#define RTL8710B_TRANS_END_STEPS 1 -+ -+ -+#define RTL8710B_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x005D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*AFE power mode selection:1: LDO mode ,0: Power-cut mode*/\ -+ {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},\ -+ {0x0056, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x0E},\ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},\ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ -+ -+ -+#define RTL8710B_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, */ /*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT0|BIT1|BIT2), 0},/*0x04[24:26] = 0 turn off RF*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT0|BIT1), 0},/*0x04[16:17] = 0 BB reset*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x20[1] = 1 turn off MAC by HW state machine*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x20[1] = 0 polling until return 0 to disable*/ \ -+ -+ -+#define RTL8710B_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8710B_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+ -+#define RTL8710B_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ -+#define RTL8710B_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ -+ -+#define RTL8710B_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8710B_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8710B_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ -+ -+ -+#define RTL8710B_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8710B_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // -+ -+ -+extern WLAN_PWR_CFG rtl8710B_power_on_flow[RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8710B_radio_off_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8710B_card_disable_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8710B_card_enable_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8710B_suspend_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8710B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8710B_resume_flow[RTL8710B_TRANS_SUS_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8710B_hwpdn_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8710B_enter_lps_flow[RTL8710B_TRANS_ACT_TO_LPS_STEPS+RTL8710B_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8710B_leave_lps_flow[RTL8710B_TRANS_LPS_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS]; -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8723BPhyCfg.h b/drivers/staging/rtl8723cs/include/Hal8723BPhyCfg.h -new file mode 100644 -index 000000000000..0f59b8b243ec ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8723BPhyCfg.h -@@ -0,0 +1,116 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8723BPHYCFG_H__ -+#define __INC_HAL8723BPHYCFG_H__ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 /* us */ -+#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+ #define MAX_AGGR_NUM 0x0B -+#else -+ #define MAX_AGGR_NUM 0x07 -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+/*--------------------------Define Parameters End-------------------------------*/ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+/*------------------------------Define structure End----------------------------*/ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+u32 -+PHY_QueryBBReg_8723B( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetBBReg_8723B( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+u32 -+PHY_QueryRFReg_8723B( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetRFReg_8723B( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+/* MAC/BB/RF HAL config */ -+int PHY_BBConfig8723B(PADAPTER Adapter); -+ -+int PHY_RFConfig8723B(PADAPTER Adapter); -+ -+s32 PHY_MACConfig8723B(PADAPTER padapter); -+ -+int -+PHY_ConfigRFWithParaFile_8723B( -+ PADAPTER Adapter, -+ u8 *pFileName, -+ enum rf_path eRFPath -+); -+ -+void -+PHY_SetTxPowerIndex_8723B( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+void -+PHY_SetTxPowerLevel8723B( -+ PADAPTER Adapter, -+ u8 channel -+); -+ -+void -+PHY_SetSwChnlBWMode8723B( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+); -+ -+void phy_set_rf_path_switch_8723b( -+ struct dm_struct *phydm, -+ bool bMain -+); -+ -+/*--------------------------Exported Function prototype End---------------------*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8723BPhyReg.h b/drivers/staging/rtl8723cs/include/Hal8723BPhyReg.h -new file mode 100644 -index 000000000000..ce485c2ab4be ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8723BPhyReg.h -@@ -0,0 +1,1131 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8723BPHYREG_H__ -+#define __INC_HAL8723BPHYREG_H__ -+ -+#define rSYM_WLBT_PAPE_SEL 0x64 -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other defintion for BB/RF R/W -+ * */ -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+/* -+ * 2. Page2(0x200) -+ * -+ * The following two definition are only used for USB interface. */ -+#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -+#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_RFTiming1 0x810 /* Useless now */ -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+ -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -+#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -+#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -+#define rDPDT_control 0x92c -+#define rfe_ctrl_anta_src 0x930 -+#define rS0S1_PathSwitch 0x948 -+ -+/* -+ * 5. PageA(0xA00) -+ * -+ * Set Control channel to upper or lower. These settings are required only for 40MHz */ -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -+#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ -+ -+#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -+#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 /* 0xa57 */ -+#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -+#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ -+ -+/* -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rPdp_AntA_8 0xb08 -+#define rPdp_AntA_C 0xb0c -+#define rPdp_AntA_10 0xb10 -+#define rPdp_AntA_14 0xb14 -+#define rPdp_AntA_18 0xb18 -+#define rPdp_AntA_1C 0xb1c -+#define rPdp_AntA_20 0xb20 -+#define rPdp_AntA_24 0xb24 -+ -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+ -+#define rBndA 0xb30 -+#define rHssiPar 0xb34 -+ -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+ -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rPdp_AntB_8 0xb78 -+#define rPdp_AntB_C 0xb7c -+#define rPdp_AntB_10 0xb80 -+#define rPdp_AntB_14 0xb84 -+#define rPdp_AntB_18 0xb88 -+#define rPdp_AntB_1C 0xb8c -+#define rPdp_AntB_20 0xb90 -+#define rPdp_AntB_24 0xb94 -+ -+#define rConfig_Pmpd_AntB 0xb98 -+ -+#define rBndB 0xba0 -+ -+#define rAPK 0xbd8 -+#define rPm_Rx0_AntA 0xbdc -+#define rPm_Rx1_AntA 0xbe0 -+#define rPm_Rx2_AntA 0xbe4 -+#define rPm_Rx3_AntA 0xbe8 -+#define rPm_Rx0_AntB 0xbec -+#define rPm_Rx1_AntB 0xbf0 -+#define rPm_Rx2_AntB 0xbf4 -+#define rPm_Rx3_AntB 0xbf8 -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 /* No setting now */ -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -+#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -+#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ -+ -+#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+/* -+ * 7. RF Register 0x00-0x2E (RF 8256) -+ * RF-0222D 0x00-3F -+ * -+ * Zebra1 */ -+#define rZebra1_HSSIEnable 0x0 /* Useless now */ -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 /* RF channel switch */ -+ -+/* #endif */ -+#define rZebra1_TxGain 0x8 /* Useless now */ -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+/* Zebra4 */ -+#define rGlobalCtrl 0 /* Useless now */ -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+/* RTL8258 */ -+#define rRTL8258_TxLPF 0x11 /* Useless now */ -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+ -+#define RF_IQADJ_G1 0x01 /* */ -+#define RF_IQADJ_G2 0x02 /* */ -+#define RF_BS_PA_APSET_G1_G4 0x03 -+#define RF_BS_PA_APSET_G5_G8 0x04 -+#define RF_POW_TRSW 0x05 /* */ -+ -+#define RF_GAIN_RX 0x06 /* */ -+#define RF_GAIN_TX 0x07 /* */ -+ -+#define RF_TXM_IDAC 0x08 /* */ -+#define RF_IPA_G 0x09 /* */ -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C /* */ -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F /* */ -+ -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+ -+#define RF_RX_AGC_HP 0x12 /* */ -+#define RF_TX_AGC 0x13 /* */ -+#define RF_BIAS 0x14 /* */ -+#define RF_IPA 0x15 /* */ -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 /* */ -+#define RF_MODE_AG 0x18 /* */ -+#define rRfChannel 0x18 /* RF channel and BW switch */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_TOP 0x19 /* */ -+ -+#define RF_RX_G1 0x1A /* */ -+#define RF_RX_G2 0x1B /* */ -+ -+#define RF_RX_BB2 0x1C /* */ -+#define RF_RX_BB1 0x1D /* */ -+ -+#define RF_RCK1 0x1E /* */ -+#define RF_RCK2 0x1F /* */ -+ -+#define RF_TX_G1 0x20 /* */ -+#define RF_TX_G2 0x21 /* */ -+#define RF_TX_G3 0x22 /* */ -+ -+#define RF_TX_BB1 0x23 /* */ -+ -+#define RF_T_METER 0x24 /* */ -+ -+#define RF_SYN_G1 0x25 /* RF TX Power control */ -+#define RF_SYN_G2 0x26 /* RF TX Power control */ -+#define RF_SYN_G3 0x27 /* RF TX Power control */ -+#define RF_SYN_G4 0x28 /* RF TX Power control */ -+#define RF_SYN_G5 0x29 /* RF TX Power control */ -+#define RF_SYN_G6 0x2A /* RF TX Power control */ -+#define RF_SYN_G7 0x2B /* RF TX Power control */ -+#define RF_SYN_G8 0x2C /* RF TX Power control */ -+ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C /* */ -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+#define RF_S0S1 0xB0 -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 /* Useless now */ -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 /* Useless now */ -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf /* Reg0x814 */ -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 /* T2R */ -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 /* Useless now -+ * #define bHWSISelect 0x8 */ -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ -+ -+#define bRFSI_TRSW 0x20 /* Useless now */ -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 /* T65 RF */ -+ -+#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ -+ -+#define bLSSIReadBackData 0xfffff /* T65 RF */ -+ -+#define bLSSIReadOKFlag 0x1000 /* Useless now */ -+#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ -+ -+#define b80MClkDelay 0x18000000 /* Useless */ -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 /* Useless */ -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+/* 3. Page9(0x900) */ -+#define bOFDMTxSC 0x30000000 /* Useless */ -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -+#define bDebugItem 0xff /* reset debug page and LWord */ -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+/* 5. PageC(0xC00) */ -+#define bNumOfSTF 0x3 /* Useless */ -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 /* the threshold for high power */ -+#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+/* #define bRxMF_Hold 0x3800 */ -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+/* #define bRxPath1 0x01 */ -+/* #define bRxPath2 0x02 */ -+/* #define bRxPath3 0x04 */ -+/* #define bRxPath4 0x08 */ -+/* #define bTxPath1 0x10 */ -+/* #define bTxPath2 0x20 */ -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 /* total */ -+#define bShortCFOFLength 11 /* fraction */ -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf /* Useless */ -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 /* Useless */ -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 /* Useless */ -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+/* Rx Pseduo noise */ -+#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+/* 7. RF Register -+ * Zebra1 */ -+#define bZebra1_HSSIEnable 0x8 /* Useless */ -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+/* Zebra4 */ -+#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+/* RTL8258 */ -+#define bRTL8258_TxLPFBW 0xc /* Useless */ -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+/* byte endable for sb_write */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 /* Useless */ -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -+#define tUpdateRxCounter 100 /* 100ms */ -+ -+#define rateCCK 0 /* Useless */ -+#define rateOFDM 1 -+#define rateHT 2 -+ -+/* define Register-End */ -+#define bPMAC_End 0x1ff /* Useless */ -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+/* define max debug item in each debug page -+ * #define bMaxItem_FPGA_PHY0 0x9 -+ * #define bMaxItem_FPGA_PHY1 0x3 -+ * #define bMaxItem_PHY_11B 0x16 -+ * #define bMaxItem_OFDM_PHY0 0x29 -+ * #define bMaxItem_OFDM_PHY1 0x0 */ -+ -+#define bPMACControl 0x0 /* Useless */ -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 /* Useless */ -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8723BPwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8723BPwrSeq.h -new file mode 100644 -index 000000000000..1aec885cbb1d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8723BPwrSeq.h -@@ -0,0 +1,246 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef REALTEK_POWER_SEQUENCE_8723B -+#define REALTEK_POWER_SEQUENCE_8723B -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20130815-JackieLau-RTL8723B_Power_Architecture v08.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS 26 -+#define RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS 15 -+#define RTL8723B_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8723B_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8723B_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8723B_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8723B_TRANS_ACT_TO_SWLPS_STEPS 22 -+#define RTL8723B_TRANS_SWLPS_TO_ACT_STEPS 15 -+#define RTL8723B_TRANS_END_STEPS 1 -+ -+ -+#define RTL8723B_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ -+ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3 | BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3), 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ -+ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ -+ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ -+ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ -+ {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ -+ {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ -+ -+ -+#define RTL8723B_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ -+ -+ -+#define RTL8723B_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8723B_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8723B_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8723B_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8723B_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK | PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8723B_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8723B_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8723B_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+ -+#define RTL8723B_TRANS_ACT_TO_SWLPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*enable 32 K source*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*disable security engine*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x40},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*reset dual TSF*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/*Reset CPU*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*Reset MCUFWDL register*/ \ -+ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ -+ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*Reset CPU IO Wrapper*/ \ -+ {0x0287, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*polling RXFF packet number = 0 */ \ -+ {0x0286, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/*polling RXDMA idle */ \ -+ {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Clear FW RPWM interrupt */\ -+ {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Set FW RPWM interrupt source*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/*switch TSF to 32K*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/*polling TSF stable*/\ -+ {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Set FW LPS*/ \ -+ {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/*polling FW LPS ready */ -+ -+ -+#define RTL8723B_TRANS_SWLPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/*switch TSF to 32K*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1, enable security engine*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x09}, /*. reset MAC rx state machine*/\ -+ {0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x86}, /*. reset MAC rx state machine*/\ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/ \ -+ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/ \ -+ {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8723B_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, -+ -+ -+ extern WLAN_PWR_CFG rtl8723B_power_on_flow[RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723B_radio_off_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723B_card_disable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723B_card_enable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723B_suspend_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723B_resume_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723B_hwpdn_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723B_enter_lps_flow[RTL8723B_TRANS_ACT_TO_LPS_STEPS + RTL8723B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723B_leave_lps_flow[RTL8723B_TRANS_LPS_TO_ACT_STEPS + RTL8723B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723B_enter_swlps_flow[RTL8723B_TRANS_ACT_TO_SWLPS_STEPS + RTL8723B_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723B_leave_swlps_flow[RTL8723B_TRANS_SWLPS_TO_ACT_STEPS + RTL8723B_TRANS_END_STEPS]; -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8723DPhyCfg.h b/drivers/staging/rtl8723cs/include/Hal8723DPhyCfg.h -new file mode 100644 -index 000000000000..b8924355138b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8723DPhyCfg.h -@@ -0,0 +1,115 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8723DPHYCFG_H__ -+#define __INC_HAL8723DPHYCFG_H__ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 /* us */ -+#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+#ifdef CONFIG_PCI_HCI -+ #define MAX_AGGR_NUM 0x0B -+#else -+ #define MAX_AGGR_NUM 0x07 -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+/*--------------------------Define Parameters End-------------------------------*/ -+ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+/*------------------------------Define structure End----------------------------*/ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+u32 -+PHY_QueryBBReg_8723D( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetBBReg_8723D( -+ PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+u32 -+PHY_QueryRFReg_8723D( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask -+); -+ -+void -+PHY_SetRFReg_8723D( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+/* MAC/BB/RF HAL config */ -+int PHY_BBConfig8723D(PADAPTER Adapter); -+ -+int PHY_RFConfig8723D(PADAPTER Adapter); -+ -+s32 PHY_MACConfig8723D(PADAPTER padapter); -+ -+int -+PHY_ConfigRFWithParaFile_8723D( -+ PADAPTER Adapter, -+ u8 *pFileName, -+ enum rf_path eRFPath -+); -+ -+void -+PHY_SetTxPowerIndex_8723D( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+void -+PHY_SetTxPowerLevel8723D( -+ PADAPTER Adapter, -+ u8 channel -+); -+ -+void -+PHY_SetSwChnlBWMode8723D( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+); -+ -+void phy_set_rf_path_switch_8723d( -+ struct dm_struct *phydm, -+ bool bMain -+); -+/*--------------------------Exported Function prototype End---------------------*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8723DPhyReg.h b/drivers/staging/rtl8723cs/include/Hal8723DPhyReg.h -new file mode 100644 -index 000000000000..036144a388bb ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8723DPhyReg.h -@@ -0,0 +1,1134 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8723DPHYREG_H__ -+#define __INC_HAL8723DPHYREG_H__ -+ -+#define rSYM_WLBT_PAPE_SEL 0x64 -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other definition for BB/RF R/W -+ * */ -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+/* -+ * 2. Page2(0x200) -+ * -+ * The following two definition are only used for USB interface. */ -+#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -+#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC // RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_RFTiming1 0x810 /* Useless now */ -+#define rFPGA0_RFTiming2 0x814 -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+ -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -+#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -+#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now // RF Interface Readback Value */ -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC // RF BW Setting?? */ -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now // Status report?? */ -+#define rDPDT_control 0x92c -+#define rfe_ctrl_anta_src 0x930 -+#define rS0S1_PathSwitch 0x948 -+#define rBBrx_DFIR 0x954 -+ -+/* -+ * 5. PageA(0xA00) -+ * -+ * Set Control channel to upper or lower. These settings are required only for 40MHz */ -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now // Select RX path by RSSI */ -+#define rCCK0_CCA 0xa08 /* Disable init gain now // Init gain */ -+ -+#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -+#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 /* 0xa57 */ -+#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -+#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ -+ -+/* -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rPdp_AntA_8 0xb08 -+#define rPdp_AntA_C 0xb0c -+#define rPdp_AntA_10 0xb10 -+#define rPdp_AntA_14 0xb14 -+#define rPdp_AntA_18 0xb18 -+#define rPdp_AntA_1C 0xb1c -+#define rPdp_AntA_20 0xb20 -+#define rPdp_AntA_24 0xb24 -+ -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_ram64x16 0xb2c -+ -+#define rBndA 0xb30 -+#define rHssiPar 0xb34 -+ -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+ -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rPdp_AntB_8 0xb78 -+#define rPdp_AntB_C 0xb7c -+#define rPdp_AntB_10 0xb80 -+#define rPdp_AntB_14 0xb84 -+#define rPdp_AntB_18 0xb88 -+#define rPdp_AntB_1C 0xb8c -+#define rPdp_AntB_20 0xb90 -+#define rPdp_AntB_24 0xb94 -+ -+#define rConfig_Pmpd_AntB 0xb98 -+ -+#define rBndB 0xba0 -+ -+#define rAPK 0xbd8 -+#define rPm_Rx0_AntA 0xbdc -+#define rPm_Rx1_AntA 0xbe0 -+#define rPm_Rx2_AntA 0xbe4 -+#define rPm_Rx3_AntA 0xbe8 -+#define rPm_Rx0_AntB 0xbec -+#define rPm_Rx1_AntB 0xbf0 -+#define rPm_Rx2_AntB 0xbf4 -+#define rPm_Rx3_AntB 0xbf8 -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD // DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 /* No setting now */ -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -+#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -+#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ -+ -+#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+/* -+ * 7. RF Register 0x00-0x2E (RF 8256) -+ * RF-0222D 0x00-3F -+ * -+ * Zebra1 */ -+#define rZebra1_HSSIEnable 0x0 /* Useless now */ -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+#define rZebra1_Channel 0x7 /* RF channel switch */ -+ -+/* #endif */ -+#define rZebra1_TxGain 0x8 /* Useless now */ -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+/* Zebra4 */ -+#define rGlobalCtrl 0 /* Useless now */ -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+/* RTL8258 */ -+#define rRTL8258_TxLPF 0x11 /* Useless now */ -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+ -+#define RF_IQADJ_G1 0x01 /* */ -+#define RF_IQADJ_G2 0x02 /* */ -+#define RF_BS_PA_APSET_G1_G4 0x03 -+#define RF_BS_PA_APSET_G5_G8 0x04 -+#define RF_POW_TRSW 0x05 /* */ -+ -+#define RF_GAIN_RX 0x06 /* */ -+#define RF_GAIN_TX 0x07 /* */ -+ -+#define RF_TXM_IDAC 0x08 /* */ -+#define RF_IPA_G 0x09 /* */ -+#define RF_TXBIAS_G 0x0A -+#define RF_TXPA_AG 0x0B -+#define RF_IPA_A 0x0C /* */ -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_BS_IQGEN 0x0F /* */ -+ -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+ -+#define RF_RX_AGC_HP 0x12 /* */ -+#define RF_TX_AGC 0x13 /* */ -+#define RF_BIAS 0x14 /* */ -+#define RF_IPA 0x15 /* */ -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 /* */ -+#define RF_MODE_AG 0x18 /* */ -+#define rRfChannel 0x18 /* RF channel and BW switch */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_TOP 0x19 /* */ -+ -+#define RF_RX_G1 0x1A /* */ -+#define RF_RX_G2 0x1B /* */ -+ -+#define RF_RX_BB2 0x1C /* */ -+#define RF_RX_BB1 0x1D /* */ -+ -+#define RF_RCK1 0x1E /* */ -+#define RF_RCK2 0x1F /* */ -+ -+#define RF_TX_G1 0x20 /* */ -+#define RF_TX_G2 0x21 /* */ -+#define RF_TX_G3 0x22 /* */ -+ -+#define RF_TX_BB1 0x23 /* */ -+ -+#define RF_T_METER 0x24 /* */ -+ -+#define RF_SYN_G1 0x25 /* RF TX Power control */ -+#define RF_SYN_G2 0x26 /* RF TX Power control */ -+#define RF_SYN_G3 0x27 /* RF TX Power control */ -+#define RF_SYN_G4 0x28 /* RF TX Power control */ -+#define RF_SYN_G5 0x29 /* RF TX Power control */ -+#define RF_SYN_G6 0x2A /* RF TX Power control */ -+#define RF_SYN_G7 0x2B /* RF TX Power control */ -+#define RF_SYN_G8 0x2C /* RF TX Power control */ -+ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+#define RF_TX_BIAS_A 0x35 -+#define RF_TX_BIAS_D 0x36 -+#define RF_LOBF_9 0x38 -+#define RF_RXRF_A3 0x3C /* */ -+#define RF_TRSW 0x3F -+ -+#define RF_TXRF_A2 0x41 -+#define RF_T_METER_88E 0x42 -+#define RF_TXPA_G4 0x46 -+#define RF_TXPA_A4 0x4B -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+#define RF_S0S1 0xB0 -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+#define RF_TX_GAIN_OFFSET_8723D(_val) (abs((_val)) | (((_val) > 0) ? BIT(4) : 0)) -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 /* Useless now */ -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bAntennaSelect 0x0300 -+ -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 /* Useless now */ -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf /* Reg0x814 */ -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 /* T2R */ -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 /* Useless now -+ * #define bHWSISelect 0x8 */ -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ -+ -+#define bRFSI_TRSW 0x20 /* Useless now */ -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+ -+#define bLSSIReadAddress 0x7f800000 /* T65 RF */ -+ -+#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ -+ -+#define bLSSIReadBackData 0xfffff /* T65 RF */ -+ -+#define bLSSIReadOKFlag 0x1000 /* Useless now */ -+#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ -+ -+#define b80MClkDelay 0x18000000 /* Useless */ -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 /* Useless */ -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+/* 3. Page9(0x900) */ -+#define bOFDMTxSC 0x30000000 /* Useless */ -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -+#define bDebugItem 0xff /* reset debug page and LWord */ -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+/* 5. PageC(0xC00) */ -+#define bNumOfSTF 0x3 /* Useless */ -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 /* the threshold for high power */ -+#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+/* #define bRxMF_Hold 0x3800 */ -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+/* #define bRxPath1 0x01 */ -+/* #define bRxPath2 0x02 */ -+/* #define bRxPath3 0x04 */ -+/* #define bRxPath4 0x08 */ -+/* #define bTxPath1 0x10 */ -+/* #define bTxPath2 0x20 */ -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 /* total */ -+#define bShortCFOFLength 11 /* fraction */ -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf /* Useless */ -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 /* Useless */ -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 /* Useless */ -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+/* Rx Pseduo noise */ -+#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+/* 7. RF Register -+ * Zebra1 */ -+#define bZebra1_HSSIEnable 0x8 /* Useless */ -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+/* Zebra4 */ -+#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+/* RTL8258 */ -+#define bRTL8258_TxLPFBW 0xc /* Useless */ -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+/* byte endable for sb_write */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 /* Useless */ -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 /* 500ms // Useless */ -+#define tUpdateRxCounter 100 /* 100ms */ -+ -+#define rateCCK 0 /* Useless */ -+#define rateOFDM 1 -+#define rateHT 2 -+ -+/* define Register-End */ -+#define bPMAC_End 0x1ff /* Useless */ -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+/* define max debug item in each debug page -+ * #define bMaxItem_FPGA_PHY0 0x9 -+ * #define bMaxItem_FPGA_PHY1 0x3 -+ * #define bMaxItem_PHY_11B 0x16 -+ * #define bMaxItem_OFDM_PHY0 0x29 -+ * #define bMaxItem_OFDM_PHY1 0x0 */ -+ -+#define bPMACControl 0x0 /* Useless */ -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#define PathA 0x0 /* Useless */ -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8723DPwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8723DPwrSeq.h -new file mode 100644 -index 000000000000..60cb53b27bd1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8723DPwrSeq.h -@@ -0,0 +1,206 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef REALTEK_POWER_SEQUENCE_8723D -+#define REALTEK_POWER_SEQUENCE_8723D -+ -+/* #include "PwrSeqCmd.h" */ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20110607-Paul-RTL8192e_Power_Architecture-R02.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transition from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS 27 -+#define RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS 8 -+#define RTL8723D_TRANS_CARDEMU_TO_SUS_STEPS 7 -+#define RTL8723D_TRANS_SUS_TO_CARDEMU_STEPS 5 -+#define RTL8723D_TRANS_CARDEMU_TO_CARDDIS_STEPS 8 -+#define RTL8723D_TRANS_CARDDIS_TO_CARDEMU_STEPS 7 -+#define RTL8723D_TRANS_CARDEMU_TO_PDN_STEPS 4 -+#define RTL8723D_TRANS_PDN_TO_CARDEMU_STEPS 1 -+#define RTL8723D_TRANS_ACT_TO_LPS_STEPS 13 -+#define RTL8723D_TRANS_LPS_TO_ACT_STEPS 11 -+#define RTL8723D_TRANS_END_STEPS 1 -+ -+ -+#define RTL8723D_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ -+ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT(4) | BIT(3) | BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0) , BIT(0)},/* Disable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), BIT(1)},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0) , 0},/* Enable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, (BIT(1) | BIT(0)), 0}, \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT(4) | BIT(3)), 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(0), 0},/**/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6), BIT(6)},/* Enable WL control XTAL setting*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)},/*Enable falling edge triggering interrupt*/\ -+ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)},/*Enable GPIO9 interrupt mode*/\ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*Enable GPIO9 input mode*/\ -+ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/*Enable HSISR GPIO[C:0] interrupt*/\ -+ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)},/*Enable HSISR GPIO9 interrupt*/\ -+ {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3), BIT(3)},/*For GPIO9 internal pull high setting by test chip*/\ -+ {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6), BIT(6)},/*For GPIO9 internal pull high setting*/\ -+ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S1*/\ -+ {0x0077, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S0*/\ -+ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x07},/*enable RF path S1*/\ -+ {0x0077, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x07},/*enalbe RF path S0*/\ -+ -+ -+#define RTL8723D_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, */ /*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, /*0x2[0]=0 Reset BB, RF enter Power Down mode*/ \ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*Enable rising edge triggering interrupt*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6), 0},/* Enable BT control XTAL setting*/\ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), BIT(5)}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ -+ -+ -+#define RTL8723D_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4) | BIT(3), (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), 0}, /*wait power state to suspend*/ -+ -+#define RTL8723D_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(7), 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+ -+#define RTL8723D_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(2), BIT(2)}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend*/ \ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), 0}, /*wait power state to suspend*/ -+ -+#define RTL8723D_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(7), 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)}, /*wait power state to suspend*/\ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8723D_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK | PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), BIT(7)},/* 0x04[15] = 1*/ -+ -+#define RTL8723D_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), 0},/* 0x04[15] = 0*/ -+ -+#define RTL8723D_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), BIT(5)},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8723D_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(7), 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6) | BIT(7), 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1) | BIT(0), BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8723D_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, -+ -+ -+ extern WLAN_PWR_CFG rtl8723D_power_on_flow[RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723D_radio_off_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723D_card_disable_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_CARDDIS_STEPS + RTL8723D_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723D_card_enable_flow[RTL8723D_TRANS_CARDDIS_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723D_suspend_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723D_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723D_resume_flow[RTL8723D_TRANS_SUS_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723D_hwpdn_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723D_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723D_enter_lps_flow[RTL8723D_TRANS_ACT_TO_LPS_STEPS + RTL8723D_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723D_leave_lps_flow[RTL8723D_TRANS_LPS_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS]; -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8723PwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8723PwrSeq.h -new file mode 100644 -index 000000000000..22de83375e66 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8723PwrSeq.h -@@ -0,0 +1,183 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL8723PWRSEQ_H__ -+#define __HAL8723PWRSEQ_H__ -+/* -+ Check document WM-20110607-Paul-RTL8723A_Power_Architecture-R02.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#include "HalPwrSeqCmd.h" -+ -+#define RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS 15 -+#define RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS 15 -+#define RTL8723A_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8723A_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8723A_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8723A_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8723A_TRANS_END_STEPS 1 -+ -+ -+#define RTL8723A_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ -+ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3), 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 1},/*0x4C[23] = 0x4E[7] = 1, switch DPDT_SEL_P output from WL BB */\ -+ -+#define RTL8723A_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ -+ -+ -+#define RTL8723A_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8723A_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8723A_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8723A_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8723A_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK | PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8723A_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8723A_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8723A_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8723A_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, -+ -+ -+ extern WLAN_PWR_CFG rtl8723A_power_on_flow[RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723A_radio_off_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723A_card_disable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723A_card_enable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723A_suspend_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723A_resume_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723A_hwpdn_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723A_enter_lps_flow[RTL8723A_TRANS_ACT_TO_LPS_STEPS + RTL8723A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8723A_leave_lps_flow[RTL8723A_TRANS_LPS_TO_ACT_STEPS + RTL8723A_TRANS_END_STEPS]; -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8812PhyCfg.h b/drivers/staging/rtl8723cs/include/Hal8812PhyCfg.h -new file mode 100644 -index 000000000000..69c70d30e8ec ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8812PhyCfg.h -@@ -0,0 +1,134 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8812PHYCFG_H__ -+#define __INC_HAL8812PHYCFG_H__ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 /* us */ -+#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+ -+#ifdef CONFIG_PCI_HCI -+ #define MAX_AGGR_NUM 0x0B -+#else -+ #define MAX_AGGR_NUM 0x07 -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/* BB/RF related */ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/*------------------------Export global variable----------------------------*/ -+/*------------------------Export global variable----------------------------*/ -+ -+ -+/*------------------------Export Marco Definition---------------------------*/ -+/*------------------------Export Marco Definition---------------------------*/ -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+/* -+ * BB and RF register read/write -+ * */ -+u32 PHY_QueryBBReg8812(PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask); -+void PHY_SetBBReg8812(PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data); -+u32 PHY_QueryRFReg8812(PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask); -+void PHY_SetRFReg8812(PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data); -+ -+/* -+ * Initialization related function -+ * -+ * MAC/BB/RF HAL config */ -+int PHY_MACConfig8812(PADAPTER Adapter); -+int PHY_BBConfig8812(PADAPTER Adapter); -+void PHY_BB8812_Config_1T(PADAPTER Adapter); -+int PHY_RFConfig8812(PADAPTER Adapter); -+ -+/* RF config */ -+ -+s32 -+PHY_SwitchWirelessBand8812( -+ PADAPTER Adapter, -+ u8 Band -+); -+ -+/* -+ * BB TX Power R/W -+ * */ -+void PHY_SetTxPowerLevel8812(PADAPTER Adapter, u8 Channel); -+ -+bool phy_get_txpwr_target_skip_by_rate_8812a(_adapter *adapter, enum MGN_RATE rate); -+ -+u32 phy_get_tx_bb_swing_8812a( -+ PADAPTER Adapter, -+ BAND_TYPE Band, -+ enum rf_path RFPath -+); -+ -+void -+PHY_SetTxPowerIndex_8812A( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+/* -+ * channel switch related funciton -+ * */ -+void -+PHY_SetSwChnlBWMode8812( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+); -+ -+/* -+ * BB/MAC/RF other monitor API -+ * */ -+ -+void -+phy_set_rf_path_switch_8812a( -+ struct dm_struct *phydm, -+ bool bMain -+); -+ -+/*--------------------------Exported Function prototype---------------------*/ -+#endif /* __INC_HAL8192CPHYCFG_H */ -diff --git a/drivers/staging/rtl8723cs/include/Hal8812PhyReg.h b/drivers/staging/rtl8723cs/include/Hal8812PhyReg.h -new file mode 100644 -index 000000000000..521ebb202346 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8812PhyReg.h -@@ -0,0 +1,735 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8812PHYREG_H__ -+#define __INC_HAL8812PHYREG_H__ -+/*--------------------------Define Parameters-------------------------------*/ -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other defintion for BB/RF R/W -+ * */ -+ -+ -+/* BB Register Definition */ -+ -+#define rCCAonSec_Jaguar 0x838 -+#define rPwed_TH_Jaguar 0x830 -+ -+/* BW and sideband setting */ -+#define rBWIndication_Jaguar 0x834 -+#define rL1PeakTH_Jaguar 0x848 -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /*Tranceiver LSSI Readback*/ -+#define rRFMOD_Jaguar 0x8ac /* RF mode */ -+#define rADC_Buf_Clk_Jaguar 0x8c4 -+#define rRFECTRL_Jaguar 0x900 -+#define bRFMOD_Jaguar 0xc3 -+#define rCCK_System_Jaguar 0xa00 /* for cck sideband */ -+#define bCCK_System_Jaguar 0x10 -+ -+/* Block & Path enable */ -+#define rOFDMCCKEN_Jaguar 0x808 /* OFDM/CCK block enable */ -+#define bOFDMEN_Jaguar 0x20000000 -+#define bCCKEN_Jaguar 0x10000000 -+#define rRxPath_Jaguar 0x808 /* Rx antenna */ -+#define bRxPath_Jaguar 0xff -+#define rTxPath_Jaguar 0x80c /* Tx antenna */ -+#define bTxPath_Jaguar 0x0fffffff -+#define rCCK_RX_Jaguar 0xa04 /* for cck rx path selection */ -+#define bCCK_RX_Jaguar 0x0c000000 -+#define rVhtlen_Use_Lsig_Jaguar 0x8c3 /* Use LSIG for VHT length */ -+ -+/* RF read/write-related */ -+#define rHSSIRead_Jaguar 0x8b0 /* RF read addr */ -+#define bHSSIRead_addr_Jaguar 0xff -+#define bHSSIRead_trigger_Jaguar 0x100 -+#define rA_PIRead_Jaguar 0xd04 /* RF readback with PI */ -+#define rB_PIRead_Jaguar 0xd44 /* RF readback with PI */ -+#define rA_SIRead_Jaguar 0xd08 /* RF readback with SI */ -+#define rB_SIRead_Jaguar 0xd48 /* RF readback with SI */ -+#define rRead_data_Jaguar 0xfffff -+#define rA_LSSIWrite_Jaguar 0xc90 /* RF write addr */ -+#define rB_LSSIWrite_Jaguar 0xe90 /* RF write addr */ -+#define bLSSIWrite_data_Jaguar 0x000fffff -+#define bLSSIWrite_addr_Jaguar 0x0ff00000 -+ -+ -+ -+/* YN: mask the following register definition temporarily */ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+/* #define rFPGA0_XAB_RFParameter 0x878 */ /* RF Parameter -+ * #define rFPGA0_XCD_RFParameter 0x87c */ -+ -+/* #define rFPGA0_AnalogParameter1 0x880 */ /* Crystal cap setting RF-R/W protection for parameter4?? -+ * #define rFPGA0_AnalogParameter2 0x884 -+ * #define rFPGA0_AnalogParameter3 0x888 -+ * #define rFPGA0_AdDaClockEn 0x888 */ /* enable ad/da clock1 for dual-phy -+ * #define rFPGA0_AnalogParameter4 0x88c */ -+ -+ -+/* CCK TX scaling */ -+#define rCCK_TxFilter1_Jaguar 0xa20 -+#define bCCK_TxFilter1_C0_Jaguar 0x00ff0000 -+#define bCCK_TxFilter1_C1_Jaguar 0xff000000 -+#define rCCK_TxFilter2_Jaguar 0xa24 -+#define bCCK_TxFilter2_C2_Jaguar 0x000000ff -+#define bCCK_TxFilter2_C3_Jaguar 0x0000ff00 -+#define bCCK_TxFilter2_C4_Jaguar 0x00ff0000 -+#define bCCK_TxFilter2_C5_Jaguar 0xff000000 -+#define rCCK_TxFilter3_Jaguar 0xa28 -+#define bCCK_TxFilter3_C6_Jaguar 0x000000ff -+#define bCCK_TxFilter3_C7_Jaguar 0x0000ff00 -+ -+ -+/* YN: mask the following register definition temporarily -+ * #define rPdp_AntA 0xb00 -+ * #define rPdp_AntA_4 0xb04 -+ * #define rConfig_Pmpd_AntA 0xb28 -+ * #define rConfig_AntA 0xb68 -+ * #define rConfig_AntB 0xb6c -+ * #define rPdp_AntB 0xb70 -+ * #define rPdp_AntB_4 0xb74 -+ * #define rConfig_Pmpd_AntB 0xb98 -+ * #define rAPK 0xbd8 */ -+ -+/* RXIQC */ -+#define rA_RxIQC_AB_Jaguar 0xc10 /* RxIQ imblance matrix coeff. A & B */ -+#define rA_RxIQC_CD_Jaguar 0xc14 /* RxIQ imblance matrix coeff. C & D */ -+#define rA_TxScale_Jaguar 0xc1c /* Pah_A TX scaling factor */ -+#define rB_TxScale_Jaguar 0xe1c /* Path_B TX scaling factor */ -+#define rB_RxIQC_AB_Jaguar 0xe10 /* RxIQ imblance matrix coeff. A & B */ -+#define rB_RxIQC_CD_Jaguar 0xe14 /* RxIQ imblance matrix coeff. C & D */ -+#define b_RxIQC_AC_Jaguar 0x02ff /* bit mask for IQC matrix element A & C */ -+#define b_RxIQC_BD_Jaguar 0x02ff0000 /* bit mask for IQC matrix element A & C */ -+ -+ -+/* DIG-related */ -+#define rA_IGI_Jaguar 0xc50 /* Initial Gain for path-A */ -+#define rB_IGI_Jaguar 0xe50 /* Initial Gain for path-B */ -+#define rOFDM_FalseAlarm1_Jaguar 0xf48 /* counter for break */ -+#define rOFDM_FalseAlarm2_Jaguar 0xf4c /* counter for spoofing */ -+#define rCCK_FalseAlarm_Jaguar 0xa5c /* counter for cck false alarm */ -+#define b_FalseAlarm_Jaguar 0xffff -+#define rCCK_CCA_Jaguar 0xa08 /* cca threshold */ -+#define bCCK_CCA_Jaguar 0x00ff0000 -+ -+/* Tx Power Ttraining-related */ -+#define rA_TxPwrTraing_Jaguar 0xc54 -+#define rB_TxPwrTraing_Jaguar 0xe54 -+ -+/* Report-related */ -+#define rOFDM_ShortCFOAB_Jaguar 0xf60 -+#define rOFDM_LongCFOAB_Jaguar 0xf64 -+#define rOFDM_EndCFOAB_Jaguar 0xf70 -+#define rOFDM_AGCReport_Jaguar 0xf84 -+#define rOFDM_RxSNR_Jaguar 0xf88 -+#define rOFDM_RxEVMCSI_Jaguar 0xf8c -+#define rOFDM_SIGReport_Jaguar 0xf90 -+ -+/* Misc functions */ -+#define rEDCCA_Jaguar 0x8a4 /* EDCCA */ -+#define bEDCCA_Jaguar 0xffff -+#define rAGC_table_Jaguar 0x82c /* AGC tabel select */ -+#define bAGC_table_Jaguar 0x3 -+#define b_sel5g_Jaguar 0x1000 /* sel5g */ -+#define b_LNA_sw_Jaguar 0x8000 /* HW/WS control for LNA */ -+#define rFc_area_Jaguar 0x860 /* fc_area */ -+#define bFc_area_Jaguar 0x1ffe000 -+#define rSingleTone_ContTx_Jaguar 0x914 -+ -+/* RFE */ -+#define rA_RFE_Pinmux_Jaguar 0xcb0 /* Path_A RFE cotrol pinmux */ -+#define rB_RFE_Pinmux_Jaguar 0xeb0 /* Path_B RFE control pinmux */ -+#define rA_RFE_Inv_Jaguar 0xcb4 /* Path_A RFE cotrol */ -+#define rB_RFE_Inv_Jaguar 0xeb4 /* Path_B RFE control */ -+#define rA_RFE_Jaguar 0xcb8 /* Path_A RFE cotrol */ -+#define rB_RFE_Jaguar 0xeb8 /* Path_B RFE control */ -+#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */ -+#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */ -+#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */ -+#define bMask_RFEInv_Jaguar 0x3ff00000 -+#define bMask_AntselPathFollow_Jaguar 0x00030000 -+ -+/* TX AGC */ -+#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 -+#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 -+#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 -+#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c -+#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 -+#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 -+#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 -+#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c -+#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 -+#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 -+#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 -+#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c -+#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 -+#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 -+#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 -+#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c -+#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 -+#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 -+#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 -+#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c -+#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 -+#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 -+#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 -+#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c -+#define bTxAGC_byte0_Jaguar 0xff -+#define bTxAGC_byte1_Jaguar 0xff00 -+#define bTxAGC_byte2_Jaguar 0xff0000 -+#define bTxAGC_byte3_Jaguar 0xff000000 -+ -+/* IQK YN: temporaily mask this part -+ * #define rFPGA0_IQK 0xe28 -+ * #define rTx_IQK_Tone_A 0xe30 -+ * #define rRx_IQK_Tone_A 0xe34 -+ * #define rTx_IQK_PI_A 0xe38 -+ * #define rRx_IQK_PI_A 0xe3c */ -+ -+/* #define rTx_IQK 0xe40 */ -+/* #define rRx_IQK 0xe44 */ -+/* #define rIQK_AGC_Pts 0xe48 */ -+/* #define rIQK_AGC_Rsp 0xe4c */ -+/* #define rTx_IQK_Tone_B 0xe50 */ -+/* #define rRx_IQK_Tone_B 0xe54 */ -+/* #define rTx_IQK_PI_B 0xe58 */ -+/* #define rRx_IQK_PI_B 0xe5c */ -+/* #define rIQK_AGC_Cont 0xe60 */ -+ -+ -+/* AFE-related */ -+#define rA_AFEPwr1_Jaguar 0xc60 /* dynamic AFE power control */ -+#define rA_AFEPwr2_Jaguar 0xc64 /* dynamic AFE power control */ -+#define rA_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xc68 -+#define rA_Tx_CCKBBON_OFDMRFON_Jaguar 0xc6c -+#define rA_Tx_OFDMBBON_Tx2Rx_Jaguar 0xc70 -+#define rA_Tx2Tx_RXCCK_Jaguar 0xc74 -+#define rA_Rx_OFDM_WaitRIFS_Jaguar 0xc78 -+#define rA_Rx2Rx_BT_Jaguar 0xc7c -+#define rA_sleep_nav_Jaguar 0xc80 -+#define rA_pmpd_Jaguar 0xc84 -+#define rB_AFEPwr1_Jaguar 0xe60 /* dynamic AFE power control */ -+#define rB_AFEPwr2_Jaguar 0xe64 /* dynamic AFE power control */ -+#define rB_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xe68 -+#define rB_Tx_CCKBBON_OFDMRFON_Jaguar 0xe6c -+#define rB_Tx_OFDMBBON_Tx2Rx_Jaguar 0xe70 -+#define rB_Tx2Tx_RXCCK_Jaguar 0xe74 -+#define rB_Rx_OFDM_WaitRIFS_Jaguar 0xe78 -+#define rB_Rx2Rx_BT_Jaguar 0xe7c -+#define rB_sleep_nav_Jaguar 0xe80 -+#define rB_pmpd_Jaguar 0xe84 -+ -+ -+/* YN: mask these registers temporaily -+ * #define rTx_Power_Before_IQK_A 0xe94 -+ * #define rTx_Power_After_IQK_A 0xe9c */ -+ -+/* #define rRx_Power_Before_IQK_A 0xea0 */ -+/* #define rRx_Power_Before_IQK_A_2 0xea4 */ -+/* #define rRx_Power_After_IQK_A 0xea8 */ -+/* #define rRx_Power_After_IQK_A_2 0xeac */ -+ -+/* #define rTx_Power_Before_IQK_B 0xeb4 */ -+/* #define rTx_Power_After_IQK_B 0xebc */ -+ -+/* #define rRx_Power_Before_IQK_B 0xec0 */ -+/* #define rRx_Power_Before_IQK_B_2 0xec4 */ -+/* #define rRx_Power_After_IQK_B 0xec8 */ -+/* #define rRx_Power_After_IQK_B_2 0xecc */ -+ -+ -+/* RSSI Dump */ -+#define rA_RSSIDump_Jaguar 0xBF0 -+#define rB_RSSIDump_Jaguar 0xBF1 -+#define rS1_RXevmDump_Jaguar 0xBF4 -+#define rS2_RXevmDump_Jaguar 0xBF5 -+#define rA_RXsnrDump_Jaguar 0xBF6 -+#define rB_RXsnrDump_Jaguar 0xBF7 -+#define rA_CfoShortDump_Jaguar 0xBF8 -+#define rB_CfoShortDump_Jaguar 0xBFA -+#define rA_CfoLongDump_Jaguar 0xBEC -+#define rB_CfoLongDump_Jaguar 0xBEE -+ -+ -+/* RF Register -+ * */ -+#define RF_AC_Jaguar 0x00 /* */ -+#define RF_RF_Top_Jaguar 0x07 /* */ -+#define RF_TXLOK_Jaguar 0x08 /* */ -+#define RF_TXAPK_Jaguar 0x0B -+#define RF_CHNLBW_Jaguar 0x18 /* RF channel and BW switch */ -+#define RF_RCK1_Jaguar 0x1c /* */ -+#define RF_RCK2_Jaguar 0x1d -+#define RF_RCK3_Jaguar 0x1e -+#define RF_ModeTableAddr 0x30 -+#define RF_ModeTableData0 0x31 -+#define RF_ModeTableData1 0x32 -+#define RF_TxLCTank_Jaguar 0x54 -+#define RF_APK_Jaguar 0x63 -+#define RF_LCK 0xB4 -+#define RF_WeLut_Jaguar 0xEF -+ -+#define bRF_CHNLBW_MOD_AG_Jaguar 0x70300 -+#define bRF_CHNLBW_BW 0xc00 -+ -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+#define RF_IPA_A 0x0C /* */ -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+ -+#define RF_TX_GAIN_OFFSET_8812A(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) -+#define RF_TX_GAIN_OFFSET_8821A(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 -+#define rFPGA0_AdDaClockEn 0x888 /* enable ad/da clock1 for dual-phy */ -+#define rFPGA0_AnalogParameter4 0x88c -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XCD_RFPara 0x8b4 -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -+ -+/* -+ * PageA(0xA00) -+ * */ -+#define rCCK0_System 0xa00 -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+ -+/* -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rConfig_Pmpd_AntB 0xb98 -+#define rAPK 0xbd8 -+ -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+/* byte endable for srwrite */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8812PwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8812PwrSeq.h -new file mode 100644 -index 000000000000..498faf8114ae ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8812PwrSeq.h -@@ -0,0 +1,208 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+#ifndef __HAL8812PWRSEQ_H__ -+#define __HAL8812PWRSEQ_H__ -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WB-110628-DZ-RTL8195 (Jaguar) Power Architecture-R04.pdf -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8812_TRANS_CARDEMU_TO_ACT_STEPS 15 -+#define RTL8812_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8812_TRANS_CARDEMU_TO_SUS_STEPS 15 -+#define RTL8812_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8812_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8812_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8812_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8812_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8812_TRANS_END_STEPS 1 -+ -+ -+#define RTL8812_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ /*{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x0024, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0}, /* 0x24[1] Choose the type of buffer after xosc: nand*/ \ -+ {0x0028, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0}, /* 0x28[33] Choose the type of buffer after xosc: nand*/ -+ -+#define RTL8812_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ -+ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},//0x1F[7:0] = 0 turn off RF*/ \ -+ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},//0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x2A}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk = 500k */ \ -+ /*{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 | BIT1, 0}, // 0x02[1:0] = 0 reset BB */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ -+ -+#define RTL8812_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xF0, 0xcc},\ -+ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xF0, 0xEC},\ -+ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ -+ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ -+ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */ \ -+ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk = 500k */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'11 enable WL suspend for PCIe*/ -+ -+#define RTL8812_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ -+ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ -+ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ -+ -+#define RTL8812_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ /**{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, //0x194[0]=0 , disable 32K clock*/ \ -+ /**{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x94}, //0x93 = 0x94 , 90[30] =0 enable 500k ANA clock .switch clock from 12M to 500K , 90 [26] =0 disable EEprom loader clock*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0}, /*0x03[2] = 0, reset 8051*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x05}, /*0x80 = 05h if reload fw, fill the default value of host_CPU handshake field*/ \ -+ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xF0, 0xcc},\ -+ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xF0, 0xEC},\ -+ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ -+ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ -+ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ -+ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, BIT7},/*0x14[7] = 1 turn on ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x01, BIT0},/* 0x15[0] =1 trun on ZCD */ \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x01, 0},/*0x12[0] = 0 force PFM mode */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x02, 0},/*0x8[1] = 0 ANA clk = 500k */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ -+ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /*0x01f[1]=0 , disable RFC_0 control REG_RF_CTRL_8812 */ \ -+ {0x0076, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /*0x076[1]=0 , disable RFC_1 control REG_OPT_CTRL_8812 +2 */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 2b'01 enable WL suspend*/ -+ -+#define RTL8812_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*0x12[0] = 1 force PWM mode */ \ -+ {0x0014, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, 0},/*0x14[7] = 0 turn off ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x01, 0},/* 0x15[0] =0 trun off ZCD */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ -+ {0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0}, /*0x04[10] = 0, enable SW LPS PCIE only*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 2b'01enable WL suspend*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x03[2] = 1, enable 8051*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ \ -+ {0x0024, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /* 0x24[1] Choose the type of buffer after xosc: schmitt trigger*/ \ -+ {0x0028, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, BIT3}, /* 0x28[33] Choose the type of buffer after xosc: schmitt trigger*/ -+ -+ -+#define RTL8812_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8812_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8812_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ -+ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated, and RF closed*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ -+ -+ -+#define RTL8812_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/ \ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/ \ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8812_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, -+ -+ -+extern WLAN_PWR_CFG rtl8812_power_on_flow[RTL8812_TRANS_CARDEMU_TO_ACT_STEPS + RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_radio_off_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS + RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_card_disable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS + RTL8812_TRANS_CARDEMU_TO_PDN_STEPS + RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_card_enable_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS + RTL8812_TRANS_CARDEMU_TO_PDN_STEPS + RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_suspend_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS + RTL8812_TRANS_CARDEMU_TO_SUS_STEPS + RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_resume_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS + RTL8812_TRANS_CARDEMU_TO_SUS_STEPS + RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_hwpdn_flow[RTL8812_TRANS_ACT_TO_CARDEMU_STEPS + RTL8812_TRANS_CARDEMU_TO_PDN_STEPS + RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_enter_lps_flow[RTL8812_TRANS_ACT_TO_LPS_STEPS + RTL8812_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8812_leave_lps_flow[RTL8812_TRANS_LPS_TO_ACT_STEPS + RTL8812_TRANS_END_STEPS]; -+ -+#endif /* __HAL8812PWRSEQ_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/Hal8814PhyCfg.h b/drivers/staging/rtl8723cs/include/Hal8814PhyCfg.h -new file mode 100644 -index 000000000000..0fdc340774c1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8814PhyCfg.h -@@ -0,0 +1,236 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8814PHYCFG_H__ -+#define __INC_HAL8814PHYCFG_H__ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+#define LOOP_LIMIT 5 -+#define MAX_STALL_TIME 50 /* us */ -+#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -+#define MAX_TXPWR_IDX_NMODE_92S 63 -+#define Reset_Cnt_Limit 3 -+ -+ -+#ifdef CONFIG_PCI_HCI -+ #define MAX_AGGR_NUM 0x0B -+#else -+ #define MAX_AGGR_NUM 0x07 -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/* BB/RF related */ -+ -+#define SIC_ENABLE 0 -+ -+/*------------------------------Define structure----------------------------*/ -+ -+ -+/*------------------------Export global variable----------------------------*/ -+/*------------------------Export global variable----------------------------*/ -+ -+ -+/*------------------------Export Marco Definition---------------------------*/ -+/*------------------------Export Marco Definition---------------------------*/ -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+/* 1. BB register R/W API */ -+ -+extern u32 -+PHY_QueryBBReg8814A(PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask); -+ -+ -+void -+PHY_SetBBReg8814A(PADAPTER Adapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data); -+ -+ -+extern u32 -+PHY_QueryRFReg8814A(PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask); -+ -+ -+void -+PHY_SetRFReg8814A(PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data); -+ -+/* 1 3. Initial BB/RF config by reading MAC/BB/RF txt. */ -+s32 -+phy_BB8814A_Config_ParaFile( -+ PADAPTER Adapter -+); -+ -+void -+PHY_ConfigBB_8814A( -+ PADAPTER Adapter -+); -+ -+ -+void -+phy_ADC_CLK_8814A( -+ PADAPTER Adapter -+); -+ -+s32 -+PHY_RFConfig8814A( -+ PADAPTER Adapter -+); -+ -+/* -+ * RF Power setting -+ * -+ * BOOLEAN PHY_SetRFPowerState8814A(PADAPTER Adapter, rt_rf_power_state eRFPowerState); */ -+ -+/* 1 5. Tx Power setting API */ -+ -+void -+PHY_SetTxPowerLevel8814( -+ PADAPTER Adapter, -+ u8 Channel -+); -+ -+u8 -+phy_get_tx_power_index_8814a( -+ PADAPTER Adapter, -+ enum rf_path RFPath, -+ u8 Rate, -+ enum channel_width BandWidth, -+ u8 Channel -+); -+ -+void -+PHY_SetTxPowerIndex_8814A( -+ PADAPTER Adapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+u32 -+PHY_GetTxBBSwing_8814A( -+ PADAPTER Adapter, -+ BAND_TYPE Band, -+ enum rf_path RFPath -+); -+ -+ -+ -+/* 1 6. Channel setting API */ -+#if 0 -+void -+PHY_SwChnlTimerCallback8814A( -+ struct timer_list *p_timer -+); -+#endif -+void -+PHY_SwChnlWorkItemCallback8814A( -+ void *pContext -+); -+ -+ -+void -+HAL_HandleSwChnl8814A( -+ PADAPTER pAdapter, -+ u8 channel -+); -+ -+void -+PHY_SwChnlSynchronously8814A(PADAPTER pAdapter, -+ u8 channel); -+ -+void -+PHY_HandleSwChnlAndSetBW8814A( -+ PADAPTER Adapter, -+ BOOLEAN bSwitchChannel, -+ BOOLEAN bSetBandWidth, -+ u8 ChannelNum, -+ enum channel_width ChnlWidth, -+ u8 ChnlOffsetOf40MHz, -+ u8 ChnlOffsetOf80MHz, -+ u8 CenterFrequencyIndex1 -+); -+ -+ -+BOOLEAN -+PHY_QueryRFPathSwitch_8814A(PADAPTER pAdapter); -+ -+ -+ -+#if (USE_WORKITEM) -+void -+RtCheckForHangWorkItemCallback8814A( -+ void *pContext -+); -+#endif -+ -+BOOLEAN -+SetAntennaConfig8814A( -+ PADAPTER Adapter, -+ u8 DefaultAnt -+); -+ -+void -+PHY_SetRFEReg8814A( -+ PADAPTER Adapter, -+ BOOLEAN bInit, -+ u8 Band -+); -+ -+ -+s32 -+PHY_SwitchWirelessBand8814A( -+ PADAPTER Adapter, -+ u8 Band -+); -+ -+void -+PHY_SetIO_8814A( -+ PADAPTER pAdapter -+); -+ -+void -+PHY_SetSwChnlBWMode8814( -+ PADAPTER Adapter, -+ u8 channel, -+ enum channel_width Bandwidth, -+ u8 Offset40, -+ u8 Offset80 -+); -+ -+s32 PHY_MACConfig8814(PADAPTER Adapter); -+int PHY_BBConfig8814(PADAPTER Adapter); -+void PHY_Set_SecCCATH_by_RXANT_8814A(PADAPTER pAdapter, u32 ulAntennaRx); -+ -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+#endif /* __INC_HAL8192CPHYCFG_H */ -diff --git a/drivers/staging/rtl8723cs/include/Hal8814PhyReg.h b/drivers/staging/rtl8723cs/include/Hal8814PhyReg.h -new file mode 100644 -index 000000000000..21851a8988b7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8814PhyReg.h -@@ -0,0 +1,863 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_HAL8814PHYREG_H__ -+#define __INC_HAL8814PHYREG_H__ -+/*--------------------------Define Parameters-------------------------------*/ -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other defintion for BB/RF R/W -+ * */ -+ -+ -+/* BB Register Definition */ -+ -+#define rCCAonSec_Jaguar 0x838 -+#define rPwed_TH_Jaguar 0x830 -+#define rL1_Weight_Jaguar 0x840 -+#define r_L1_SBD_start_time 0x844 -+ -+/* BW and sideband setting */ -+#define rBWIndication_Jaguar 0x834 -+#define rL1PeakTH_Jaguar 0x848 -+#define rRFMOD_Jaguar 0x8ac /* RF mode */ -+#define rADC_Buf_Clk_Jaguar 0x8c4 -+#define rADC_Buf_40_Clk_Jaguar2 0x8c8 -+#define rRFECTRL_Jaguar 0x900 -+#define bRFMOD_Jaguar 0xc3 -+#define rCCK_System_Jaguar 0xa00 /* for cck sideband */ -+#define bCCK_System_Jaguar 0x10 -+ -+/* Block & Path enable */ -+#define rOFDMCCKEN_Jaguar 0x808 /* OFDM/CCK block enable */ -+#define bOFDMEN_Jaguar 0x20000000 -+#define bCCKEN_Jaguar 0x10000000 -+#define rRxPath_Jaguar 0x808 /* Rx antenna */ -+#define bRxPath_Jaguar 0xff -+#define rTxPath_Jaguar 0x80c /* Tx antenna */ -+#define bTxPath_Jaguar 0x0fffffff -+#define rCCK_RX_Jaguar 0xa04 /* for cck rx path selection */ -+#define bCCK_RX_Jaguar 0x0c000000 -+#define rVhtlen_Use_Lsig_Jaguar 0x8c3 /* Use LSIG for VHT length */ -+ -+#define rRxPath_Jaguar2 0xa04 /* Rx antenna */ -+#define rTxAnt_1Nsts_Jaguar2 0x93c /* Tx antenna for 1Nsts */ -+#define rTxAnt_23Nsts_Jaguar2 0x940 /* Tx antenna for 2Nsts and 3Nsts */ -+ -+ -+/* RF read/write-related */ -+#define rHSSIRead_Jaguar 0x8b0 /* RF read addr */ -+#define bHSSIRead_addr_Jaguar 0xff -+#define bHSSIRead_trigger_Jaguar 0x100 -+#define rA_PIRead_Jaguar 0xd04 /* RF readback with PI */ -+#define rB_PIRead_Jaguar 0xd44 /* RF readback with PI */ -+#define rA_SIRead_Jaguar 0xd08 /* RF readback with SI */ -+#define rB_SIRead_Jaguar 0xd48 /* RF readback with SI */ -+#define rRead_data_Jaguar 0xfffff -+#define rA_LSSIWrite_Jaguar 0xc90 /* RF write addr */ -+#define rB_LSSIWrite_Jaguar 0xe90 /* RF write addr */ -+#define bLSSIWrite_data_Jaguar 0x000fffff -+#define bLSSIWrite_addr_Jaguar 0x0ff00000 -+ -+#define rC_PIRead_Jaguar2 0xd84 /* RF readback with PI */ -+#define rD_PIRead_Jaguar2 0xdC4 /* RF readback with PI */ -+#define rC_SIRead_Jaguar2 0xd88 /* RF readback with SI */ -+#define rD_SIRead_Jaguar2 0xdC8 /* RF readback with SI */ -+#define rC_LSSIWrite_Jaguar2 0x1890 /* RF write addr */ -+#define rD_LSSIWrite_Jaguar2 0x1A90 /* RF write addr */ -+ -+ -+/* YN: mask the following register definition temporarily */ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+/* #define rFPGA0_XAB_RFParameter 0x878 */ /* RF Parameter -+ * #define rFPGA0_XCD_RFParameter 0x87c */ -+ -+/* #define rFPGA0_AnalogParameter1 0x880 */ /* Crystal cap setting RF-R/W protection for parameter4?? -+ * #define rFPGA0_AnalogParameter2 0x884 -+ * #define rFPGA0_AnalogParameter3 0x888 -+ * #define rFPGA0_AdDaClockEn 0x888 */ /* enable ad/da clock1 for dual-phy -+ * #define rFPGA0_AnalogParameter4 0x88c */ -+ -+ -+/* CCK TX scaling */ -+#define rCCK_TxFilter1_Jaguar 0xa20 -+#define bCCK_TxFilter1_C0_Jaguar 0x00ff0000 -+#define bCCK_TxFilter1_C1_Jaguar 0xff000000 -+#define rCCK_TxFilter2_Jaguar 0xa24 -+#define bCCK_TxFilter2_C2_Jaguar 0x000000ff -+#define bCCK_TxFilter2_C3_Jaguar 0x0000ff00 -+#define bCCK_TxFilter2_C4_Jaguar 0x00ff0000 -+#define bCCK_TxFilter2_C5_Jaguar 0xff000000 -+#define rCCK_TxFilter3_Jaguar 0xa28 -+#define bCCK_TxFilter3_C6_Jaguar 0x000000ff -+#define bCCK_TxFilter3_C7_Jaguar 0x0000ff00 -+/* NBI & CSI Mask setting */ -+#define rCSI_Mask_Setting1_Jaguar 0x874 -+#define rCSI_Fix_Mask0_Jaguar 0x880 -+#define rCSI_Fix_Mask1_Jaguar 0x884 -+#define rCSI_Fix_Mask2_Jaguar 0x888 -+#define rCSI_Fix_Mask3_Jaguar 0x88c -+#define rCSI_Fix_Mask4_Jaguar 0x890 -+#define rCSI_Fix_Mask5_Jaguar 0x894 -+#define rCSI_Fix_Mask6_Jaguar 0x898 -+#define rCSI_Fix_Mask7_Jaguar 0x89c -+#define rNBI_Setting_Jaguar 0x87c -+ -+ -+/* YN: mask the following register definition temporarily -+ * #define rPdp_AntA 0xb00 -+ * #define rPdp_AntA_4 0xb04 -+ * #define rConfig_Pmpd_AntA 0xb28 -+ * #define rConfig_AntA 0xb68 -+ * #define rConfig_AntB 0xb6c -+ * #define rPdp_AntB 0xb70 -+ * #define rPdp_AntB_4 0xb74 -+ * #define rConfig_Pmpd_AntB 0xb98 -+ * #define rAPK 0xbd8 */ -+ -+/* RXIQC */ -+#define rA_RxIQC_AB_Jaguar 0xc10 /* RxIQ imblance matrix coeff. A & B */ -+#define rA_RxIQC_CD_Jaguar 0xc14 /* RxIQ imblance matrix coeff. C & D */ -+#define rA_TxScale_Jaguar 0xc1c /* Pah_A TX scaling factor */ -+#define rB_TxScale_Jaguar 0xe1c /* Path_B TX scaling factor */ -+#define rB_RxIQC_AB_Jaguar 0xe10 /* RxIQ imblance matrix coeff. A & B */ -+#define rB_RxIQC_CD_Jaguar 0xe14 /* RxIQ imblance matrix coeff. C & D */ -+#define b_RxIQC_AC_Jaguar 0x02ff /* bit mask for IQC matrix element A & C */ -+#define b_RxIQC_BD_Jaguar 0x02ff0000 /* bit mask for IQC matrix element A & C */ -+ -+#define rC_TxScale_Jaguar2 0x181c /* Pah_C TX scaling factor */ -+#define rD_TxScale_Jaguar2 0x1A1c /* Path_D TX scaling factor */ -+#define rRF_TxGainOffset 0x55 -+ -+/* DIG-related */ -+#define rA_IGI_Jaguar 0xc50 /* Initial Gain for path-A */ -+#define rB_IGI_Jaguar 0xe50 /* Initial Gain for path-B */ -+#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C */ -+#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D */ -+ -+#define rOFDM_FalseAlarm1_Jaguar 0xf48 /* counter for break */ -+#define rOFDM_FalseAlarm2_Jaguar 0xf4c /* counter for spoofing */ -+#define rCCK_FalseAlarm_Jaguar 0xa5c /* counter for cck false alarm */ -+#define b_FalseAlarm_Jaguar 0xffff -+#define rCCK_CCA_Jaguar 0xa08 /* cca threshold */ -+#define bCCK_CCA_Jaguar 0x00ff0000 -+ -+/* Tx Power Ttraining-related */ -+#define rA_TxPwrTraing_Jaguar 0xc54 -+#define rB_TxPwrTraing_Jaguar 0xe54 -+ -+/* Report-related */ -+#define rOFDM_ShortCFOAB_Jaguar 0xf60 -+#define rOFDM_LongCFOAB_Jaguar 0xf64 -+#define rOFDM_EndCFOAB_Jaguar 0xf70 -+#define rOFDM_AGCReport_Jaguar 0xf84 -+#define rOFDM_RxSNR_Jaguar 0xf88 -+#define rOFDM_RxEVMCSI_Jaguar 0xf8c -+#define rOFDM_SIGReport_Jaguar 0xf90 -+ -+/* Misc functions */ -+#define rEDCCA_Jaguar 0x8a4 /* EDCCA */ -+#define bEDCCA_Jaguar 0xffff -+#define rAGC_table_Jaguar 0x82c /* AGC tabel select */ -+#define bAGC_table_Jaguar 0x3 -+#define b_sel5g_Jaguar 0x1000 /* sel5g */ -+#define b_LNA_sw_Jaguar 0x8000 /* HW/WS control for LNA */ -+#define rFc_area_Jaguar 0x860 /* fc_area */ -+#define bFc_area_Jaguar 0x1ffe000 -+#define rSingleTone_ContTx_Jaguar 0x914 -+ -+#define rAGC_table_Jaguar2 0x958 /* AGC tabel select */ -+#define rDMA_trigger_Jaguar2 0x95C /* ADC sample mode */ -+ -+ -+/* RFE */ -+#define rA_RFE_Pinmux_Jaguar 0xcb0 /* Path_A RFE cotrol pinmux */ -+#define rB_RFE_Pinmux_Jaguar 0xeb0 /* Path_B RFE control pinmux */ -+#define rA_RFE_Inv_Jaguar 0xcb4 /* Path_A RFE cotrol */ -+#define rB_RFE_Inv_Jaguar 0xeb4 /* Path_B RFE control */ -+#define rA_RFE_Jaguar 0xcb8 /* Path_A RFE cotrol */ -+#define rB_RFE_Jaguar 0xeb8 /* Path_B RFE control */ -+#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */ -+#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */ -+#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */ -+#define bMask_RFEInv_Jaguar 0x3ff00000 -+#define bMask_AntselPathFollow_Jaguar 0x00030000 -+ -+#define rC_RFE_Pinmux_Jaguar 0x18B4 /* Path_C RFE cotrol pinmux */ -+#define rD_RFE_Pinmux_Jaguar 0x1AB4 /* Path_D RFE cotrol pinmux */ -+#define rA_RFE_Sel_Jaguar2 0x1990 -+ -+ -+ -+/* TX AGC */ -+#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20 -+#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24 -+#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28 -+#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c -+#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30 -+#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34 -+#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38 -+#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c -+#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40 -+#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44 -+#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48 -+#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c -+#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20 -+#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24 -+#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28 -+#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c -+#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30 -+#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34 -+#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38 -+#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c -+#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40 -+#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44 -+#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48 -+#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c -+#define bTxAGC_byte0_Jaguar 0xff -+#define bTxAGC_byte1_Jaguar 0xff00 -+#define bTxAGC_byte2_Jaguar 0xff0000 -+#define bTxAGC_byte3_Jaguar 0xff000000 -+ -+ -+/* TX AGC */ -+#define rTxAGC_A_CCK11_CCK1_Jaguar2 0xc20 -+#define rTxAGC_A_Ofdm18_Ofdm6_Jaguar2 0xc24 -+#define rTxAGC_A_Ofdm54_Ofdm24_Jaguar2 0xc28 -+#define rTxAGC_A_MCS3_MCS0_Jaguar2 0xc2c -+#define rTxAGC_A_MCS7_MCS4_Jaguar2 0xc30 -+#define rTxAGC_A_MCS11_MCS8_Jaguar2 0xc34 -+#define rTxAGC_A_MCS15_MCS12_Jaguar2 0xc38 -+#define rTxAGC_A_MCS19_MCS16_Jaguar2 0xcd8 -+#define rTxAGC_A_MCS23_MCS20_Jaguar2 0xcdc -+#define rTxAGC_A_Nss1Index3_Nss1Index0_Jaguar2 0xc3c -+#define rTxAGC_A_Nss1Index7_Nss1Index4_Jaguar2 0xc40 -+#define rTxAGC_A_Nss2Index1_Nss1Index8_Jaguar2 0xc44 -+#define rTxAGC_A_Nss2Index5_Nss2Index2_Jaguar2 0xc48 -+#define rTxAGC_A_Nss2Index9_Nss2Index6_Jaguar2 0xc4c -+#define rTxAGC_A_Nss3Index3_Nss3Index0_Jaguar2 0xce0 -+#define rTxAGC_A_Nss3Index7_Nss3Index4_Jaguar2 0xce4 -+#define rTxAGC_A_Nss3Index9_Nss3Index8_Jaguar2 0xce8 -+#define rTxAGC_B_CCK11_CCK1_Jaguar2 0xe20 -+#define rTxAGC_B_Ofdm18_Ofdm6_Jaguar2 0xe24 -+#define rTxAGC_B_Ofdm54_Ofdm24_Jaguar2 0xe28 -+#define rTxAGC_B_MCS3_MCS0_Jaguar2 0xe2c -+#define rTxAGC_B_MCS7_MCS4_Jaguar2 0xe30 -+#define rTxAGC_B_MCS11_MCS8_Jaguar2 0xe34 -+#define rTxAGC_B_MCS15_MCS12_Jaguar2 0xe38 -+#define rTxAGC_B_MCS19_MCS16_Jaguar2 0xed8 -+#define rTxAGC_B_MCS23_MCS20_Jaguar2 0xedc -+#define rTxAGC_B_Nss1Index3_Nss1Index0_Jaguar2 0xe3c -+#define rTxAGC_B_Nss1Index7_Nss1Index4_Jaguar2 0xe40 -+#define rTxAGC_B_Nss2Index1_Nss1Index8_Jaguar2 0xe44 -+#define rTxAGC_B_Nss2Index5_Nss2Index2_Jaguar2 0xe48 -+#define rTxAGC_B_Nss2Index9_Nss2Index6_Jaguar2 0xe4c -+#define rTxAGC_B_Nss3Index3_Nss3Index0_Jaguar2 0xee0 -+#define rTxAGC_B_Nss3Index7_Nss3Index4_Jaguar2 0xee4 -+#define rTxAGC_B_Nss3Index9_Nss3Index8_Jaguar2 0xee8 -+#define rTxAGC_C_CCK11_CCK1_Jaguar2 0x1820 -+#define rTxAGC_C_Ofdm18_Ofdm6_Jaguar2 0x1824 -+#define rTxAGC_C_Ofdm54_Ofdm24_Jaguar2 0x1828 -+#define rTxAGC_C_MCS3_MCS0_Jaguar2 0x182c -+#define rTxAGC_C_MCS7_MCS4_Jaguar2 0x1830 -+#define rTxAGC_C_MCS11_MCS8_Jaguar2 0x1834 -+#define rTxAGC_C_MCS15_MCS12_Jaguar2 0x1838 -+#define rTxAGC_C_MCS19_MCS16_Jaguar2 0x18d8 -+#define rTxAGC_C_MCS23_MCS20_Jaguar2 0x18dc -+#define rTxAGC_C_Nss1Index3_Nss1Index0_Jaguar2 0x183c -+#define rTxAGC_C_Nss1Index7_Nss1Index4_Jaguar2 0x1840 -+#define rTxAGC_C_Nss2Index1_Nss1Index8_Jaguar2 0x1844 -+#define rTxAGC_C_Nss2Index5_Nss2Index2_Jaguar2 0x1848 -+#define rTxAGC_C_Nss2Index9_Nss2Index6_Jaguar2 0x184c -+#define rTxAGC_C_Nss3Index3_Nss3Index0_Jaguar2 0x18e0 -+#define rTxAGC_C_Nss3Index7_Nss3Index4_Jaguar2 0x18e4 -+#define rTxAGC_C_Nss3Index9_Nss3Index8_Jaguar2 0x18e8 -+#define rTxAGC_D_CCK11_CCK1_Jaguar2 0x1a20 -+#define rTxAGC_D_Ofdm18_Ofdm6_Jaguar2 0x1a24 -+#define rTxAGC_D_Ofdm54_Ofdm24_Jaguar2 0x1a28 -+#define rTxAGC_D_MCS3_MCS0_Jaguar2 0x1a2c -+#define rTxAGC_D_MCS7_MCS4_Jaguar2 0x1a30 -+#define rTxAGC_D_MCS11_MCS8_Jaguar2 0x1a34 -+#define rTxAGC_D_MCS15_MCS12_Jaguar2 0x1a38 -+#define rTxAGC_D_MCS19_MCS16_Jaguar2 0x1ad8 -+#define rTxAGC_D_MCS23_MCS20_Jaguar2 0x1adc -+#define rTxAGC_D_Nss1Index3_Nss1Index0_Jaguar2 0x1a3c -+#define rTxAGC_D_Nss1Index7_Nss1Index4_Jaguar2 0x1a40 -+#define rTxAGC_D_Nss2Index1_Nss1Index8_Jaguar2 0x1a44 -+#define rTxAGC_D_Nss2Index5_Nss2Index2_Jaguar2 0x1a48 -+#define rTxAGC_D_Nss2Index9_Nss2Index6_Jaguar2 0x1a4c -+#define rTxAGC_D_Nss3Index3_Nss3Index0_Jaguar2 0x1ae0 -+#define rTxAGC_D_Nss3Index7_Nss3Index4_Jaguar2 0x1ae4 -+#define rTxAGC_D_Nss3Index9_Nss3Index8_Jaguar2 0x1ae8 -+/* IQK YN: temporaily mask this part -+ * #define rFPGA0_IQK 0xe28 -+ * #define rTx_IQK_Tone_A 0xe30 -+ * #define rRx_IQK_Tone_A 0xe34 -+ * #define rTx_IQK_PI_A 0xe38 -+ * #define rRx_IQK_PI_A 0xe3c */ -+ -+/* #define rTx_IQK 0xe40 */ -+/* #define rRx_IQK 0xe44 */ -+/* #define rIQK_AGC_Pts 0xe48 */ -+/* #define rIQK_AGC_Rsp 0xe4c */ -+/* #define rTx_IQK_Tone_B 0xe50 */ -+/* #define rRx_IQK_Tone_B 0xe54 */ -+/* #define rTx_IQK_PI_B 0xe58 */ -+/* #define rRx_IQK_PI_B 0xe5c */ -+/* #define rIQK_AGC_Cont 0xe60 */ -+ -+ -+/* AFE-related */ -+#define rA_AFEPwr1_Jaguar 0xc60 /* dynamic AFE power control */ -+#define rA_AFEPwr2_Jaguar 0xc64 /* dynamic AFE power control */ -+#define rA_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xc68 -+#define rA_Tx_CCKBBON_OFDMRFON_Jaguar 0xc6c -+#define rA_Tx_OFDMBBON_Tx2Rx_Jaguar 0xc70 -+#define rA_Tx2Tx_RXCCK_Jaguar 0xc74 -+#define rA_Rx_OFDM_WaitRIFS_Jaguar 0xc78 -+#define rA_Rx2Rx_BT_Jaguar 0xc7c -+#define rA_sleep_nav_Jaguar 0xc80 -+#define rA_pmpd_Jaguar 0xc84 -+#define rB_AFEPwr1_Jaguar 0xe60 /* dynamic AFE power control */ -+#define rB_AFEPwr2_Jaguar 0xe64 /* dynamic AFE power control */ -+#define rB_Rx_WaitCCA_Tx_CCKRFON_Jaguar 0xe68 -+#define rB_Tx_CCKBBON_OFDMRFON_Jaguar 0xe6c -+#define rB_Tx_OFDMBBON_Tx2Rx_Jaguar 0xe70 -+#define rB_Tx2Tx_RXCCK_Jaguar 0xe74 -+#define rB_Rx_OFDM_WaitRIFS_Jaguar 0xe78 -+#define rB_Rx2Rx_BT_Jaguar 0xe7c -+#define rB_sleep_nav_Jaguar 0xe80 -+#define rB_pmpd_Jaguar 0xe84 -+ -+ -+/* YN: mask these registers temporaily -+ * #define rTx_Power_Before_IQK_A 0xe94 -+ * #define rTx_Power_After_IQK_A 0xe9c */ -+ -+/* #define rRx_Power_Before_IQK_A 0xea0 */ -+/* #define rRx_Power_Before_IQK_A_2 0xea4 */ -+/* #define rRx_Power_After_IQK_A 0xea8 */ -+/* #define rRx_Power_After_IQK_A_2 0xeac */ -+ -+/* #define rTx_Power_Before_IQK_B 0xeb4 */ -+/* #define rTx_Power_After_IQK_B 0xebc */ -+ -+/* #define rRx_Power_Before_IQK_B 0xec0 */ -+/* #define rRx_Power_Before_IQK_B_2 0xec4 */ -+/* #define rRx_Power_After_IQK_B 0xec8 */ -+/* #define rRx_Power_After_IQK_B_2 0xecc */ -+ -+ -+/* RSSI Dump */ -+#define rA_RSSIDump_Jaguar 0xBF0 -+#define rB_RSSIDump_Jaguar 0xBF1 -+#define rS1_RXevmDump_Jaguar 0xBF4 -+#define rS2_RXevmDump_Jaguar 0xBF5 -+#define rA_RXsnrDump_Jaguar 0xBF6 -+#define rB_RXsnrDump_Jaguar 0xBF7 -+#define rA_CfoShortDump_Jaguar 0xBF8 -+#define rB_CfoShortDump_Jaguar 0xBFA -+#define rA_CfoLongDump_Jaguar 0xBEC -+#define rB_CfoLongDump_Jaguar 0xBEE -+ -+ -+/* RF Register -+ * */ -+#define RF_AC_Jaguar 0x00 /* */ -+#define RF_RF_Top_Jaguar 0x07 /* */ -+#define RF_TXLOK_Jaguar 0x08 /* */ -+#define RF_TXAPK_Jaguar 0x0B -+#define RF_CHNLBW_Jaguar 0x18 /* RF channel and BW switch */ -+#define RF_RCK1_Jaguar 0x1c /* */ -+#define RF_RCK2_Jaguar 0x1d -+#define RF_RCK3_Jaguar 0x1e -+#define RF_ModeTableAddr 0x30 -+#define RF_ModeTableData0 0x31 -+#define RF_ModeTableData1 0x32 -+#define RF_TxLCTank_Jaguar 0x54 -+#define RF_APK_Jaguar 0x63 -+#define RF_LCK 0xB4 -+#define RF_WeLut_Jaguar 0xEF -+ -+#define bRF_CHNLBW_MOD_AG_Jaguar 0x70300 -+#define bRF_CHNLBW_BW 0xc00 -+ -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+#define RF_IPA_A 0x0C /* */ -+#define RF_TXBIAS_A 0x0D -+#define RF_BS_PA_APSET_G9_G11 0x0E -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+#define RF_0x52 0x52 -+#define RF_WE_LUT 0xEF -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+ -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 -+#define rFPGA0_AdDaClockEn 0x888 /* enable ad/da clock1 for dual-phy */ -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_XCD_RFPara 0x8b4 -+#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -+#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -+#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ -+#define REG_BB_TX_PATH_SEL_1_8814A 0x93c -+#define REG_BB_TX_PATH_SEL_2_8814A 0x940 -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -+/*Page 19 for TxBF*/ -+#define REG_BB_TXBF_ANT_SET_BF1_8814A 0x19ac -+#define REG_BB_TXBF_ANT_SET_BF0_8814A 0x19b4 -+/* -+ * PageA(0xA00) -+ * */ -+#define rCCK0_System 0xa00 -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+ -+/* -+ * PageB(0xB00) -+ * */ -+#define rPdp_AntA 0xb00 -+#define rPdp_AntA_4 0xb04 -+#define rConfig_Pmpd_AntA 0xb28 -+#define rConfig_AntA 0xb68 -+#define rConfig_AntB 0xb6c -+#define rPdp_AntB 0xb70 -+#define rPdp_AntB_4 0xb74 -+#define rConfig_Pmpd_AntB 0xb98 -+#define rAPK 0xbd8 -+ -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+ -+#define rOFDM0_RxIQExtAnta 0xca0 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_A_Rate18_06 0xe00 -+#define rTxAGC_A_Rate54_24 0xe04 -+#define rTxAGC_A_CCK1_Mcs32 0xe08 -+#define rTxAGC_A_Mcs03_Mcs00 0xe10 -+#define rTxAGC_A_Mcs07_Mcs04 0xe14 -+#define rTxAGC_A_Mcs11_Mcs08 0xe18 -+#define rTxAGC_A_Mcs15_Mcs12 0xe1c -+ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rTxAGC_B_Mcs03_Mcs00 0x83c -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84c -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86c -+ -+#define rFPGA0_IQK 0xe28 -+#define rTx_IQK_Tone_A 0xe30 -+#define rRx_IQK_Tone_A 0xe34 -+#define rTx_IQK_PI_A 0xe38 -+#define rRx_IQK_PI_A 0xe3c -+ -+#define rTx_IQK 0xe40 -+#define rRx_IQK 0xe44 -+#define rIQK_AGC_Pts 0xe48 -+#define rIQK_AGC_Rsp 0xe4c -+#define rTx_IQK_Tone_B 0xe50 -+#define rRx_IQK_Tone_B 0xe54 -+#define rTx_IQK_PI_B 0xe58 -+#define rRx_IQK_PI_B 0xe5c -+#define rIQK_AGC_Cont 0xe60 -+ -+#define rBlue_Tooth 0xe6c -+#define rRx_Wait_CCA 0xe70 -+#define rTx_CCK_RFON 0xe74 -+#define rTx_CCK_BBON 0xe78 -+#define rTx_OFDM_RFON 0xe7c -+#define rTx_OFDM_BBON 0xe80 -+#define rTx_To_Rx 0xe84 -+#define rTx_To_Tx 0xe88 -+#define rRx_CCK 0xe8c -+ -+#define rTx_Power_Before_IQK_A 0xe94 -+#define rTx_Power_After_IQK_A 0xe9c -+ -+#define rRx_Power_Before_IQK_A 0xea0 -+#define rRx_Power_Before_IQK_A_2 0xea4 -+#define rRx_Power_After_IQK_A 0xea8 -+#define rRx_Power_After_IQK_A_2 0xeac -+ -+#define rTx_Power_Before_IQK_B 0xeb4 -+#define rTx_Power_After_IQK_B 0xebc -+ -+#define rRx_Power_Before_IQK_B 0xec0 -+#define rRx_Power_Before_IQK_B_2 0xec4 -+#define rRx_Power_After_IQK_B 0xec8 -+#define rRx_Power_After_IQK_B_2 0xecc -+ -+#define rRx_OFDM 0xed0 -+#define rRx_Wait_RIFS 0xed4 -+#define rRx_TO_Rx 0xed8 -+#define rStandby 0xedc -+#define rSleep 0xee0 -+#define rPMPD_ANAEN 0xeec -+ -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+#define RF_T_METER_88E 0x42 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+/* byte endable for srwrite */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH3Bytes 0xffffff00 -+#define bMask12Bits 0xfff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+#define bMask7bits 0x7f -+#define bMaskByte2HighNibble 0x00f00000 -+#define bMaskByte3LowNibble 0x0f000000 -+#define bMaskL3Bytes 0x00ffffff -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/Hal8814PwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8814PwrSeq.h -new file mode 100644 -index 000000000000..0138850c91e1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8814PwrSeq.h -@@ -0,0 +1,231 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+#ifndef __HAL8814PWRSEQ_H__ -+#define __HAL8814PWRSEQ_H__ -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WB-110628-DZ-RTL8195 (Jaguar) Power Architecture-R04.pdf -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8814A_TRANS_CARDEMU_TO_ACT_STEPS 16 -+#define RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS 20 -+#define RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS 17 -+#define RTL8814A_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS 17 -+#define RTL8814A_TRANS_PDN_TO_CARDEMU_STEPS 16 -+#define RTL8814A_TRANS_ACT_TO_LPS_STEPS 20 -+#define RTL8814A_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8814A_TRANS_END_STEPS 1 -+ -+ -+#define RTL8814A_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x002B, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /* ??0x28[24]=1, enable pll phase select*/ \ -+ {0x0015, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT3 | BIT2 | BIT1), (BIT3 | BIT2 | BIT1)},/* 0x14[11:9]=3'b111, OCP current threshold = 1.5A */ \ -+ {0x002D, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x0E, 0x08},/* 0x2C[11:9]=3'b100, select lpf R3 */ \ -+ {0x002D, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x70, 0x50},/* 0x2C[14:12]=3'b101, select lpf Rs*/ \ -+ {0x007B, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/* 0x78[30]=1'b1, SDM order select*/ \ -+ /*{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, */ /* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0},/* disable WL suspend*/ \ -+ {0x00F0, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* */ \ -+ {0x0081, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x30, 0x20},/* */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ -+ -+#define RTL8814A_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ -+ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ {0x1002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ -+ {0x0002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ -+ {0x1002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*0x1F[7:0] = 0 turn off RF*/ \ -+ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},*/ /*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x28}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x02, 0}, /*0x8[1] = 0 ANA clk = 500k */ \ -+ /*{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 | BIT1, 0},*/ /* 0x02[1:0] = 0 reset BB */ \ -+ {0x0066, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, /*0x66[7]=0, disable ckreq for gpio7 output SUS */ \ -+ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x41[4]=0, disable sic for gpio7 output SUS */ \ -+ {0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /*0x42[1]=0, disable ckout for gpio7 output SUS */ \ -+ {0x004e, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x4E[5]=1, disable LED2 for gpio7 output SUS */ \ -+ {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x41[0]=0, disable uart for gpio7 output SUS */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ -+ -+#define RTL8814A_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0061, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x0F, 0x0c},\ -+ {0x0061, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x0F, 0x0E},\ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x0F, 0x07},/* gpio11 input mode, gpio10~8 output mode */ \ -+ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ -+ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/* suspend option all off */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*0x14[13] = 1 turn on ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/* 0x14[14] =1 trun on ZCD */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*0x8[1] = 0 ANA clk = 500k */ \ -+ {0x0091, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xA0, 0xA0}, /* 0x91[7]=1 0x91[5]=1 , disable sps, ldo sleep mode */ \ -+ {0x0070, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3}, /* 0x70[3]=1 enable mainbias polling */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 1 enable WL suspend */ -+ -+#define RTL8814A_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 0 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, 0},/*0x23[4] = 0 hpon LDO sleep mode leave */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, 0},/* 0x14[14] =0 trun off ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0},/*0x14[13] = 0 turn off ZCD */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio11 input mode, gpio10~8 input mode */ -+ -+#define RTL8814A_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ /**{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, //0x194[0]=0 , disable 32K clock*/ \ -+ /**{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x94}, //0x93 = 0x94 , 90[30] =0 enable 500k ANA clock .switch clock from 12M to 500K , 90 [26] =0 disable EEprom loader clock*/ \ -+ {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0}, /*0x03[2] = 0, reset 3081*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x01}, /*0x80 = 05h if reload fw, fill the default value of host_CPU handshake field*/ \ -+ {0x0081, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x30}, /*0x80 = 05h if reload fw, fill the default value of host_CPU handshake field*/ \ -+ /*{0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xF0, 0xcc},*/ \ -+ /*{0x0042, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xF0, 0xEC},*/ \ -+ /*{0x0043, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x07},*/ /* gpio11 input mode, gpio10~8 output mode */ \ -+ {0x0045, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio 0~7 output same value as input ?? */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xff},/* gpio0~7 output mode */ \ -+ {0x0047, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/* 0x47[7:0] = 00 gpio mode */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/* 0x15[6] =1 trun on ZCD output */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*0x15[5] = 1 turn on ZCD */ \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, 0},/*0x12[6] = 0 force PFM mode */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/*0x23[4] = 1 hpon LDO sleep mode */ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*0x8[1] = 0 ANA clk = 500k */ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ -+ {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* 0x01f[1]=0 , disable RFC_0 control REG_RF_CTRL_8814A */ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* 0x020[1]=0 , disable RFC_1 control REG_RF_CTRL_8814A */ \ -+ {0x0021, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* 0x021[1]=0 , disable RFC_2 control REG_RF_CTRL_8814A */ \ -+ {0x0076, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* 0x076[1]=0 , disable RFC_3 control REG_OPT_CTRL_8814A +2 */ \ -+ {0x0091, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xA0, 0xA0}, /* 0x91[7]=1 0x91[5]=1 , disable sps, ldo sleep mode */ \ -+ {0x0070, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3}, /* 0x70[3]=1 enable mainbias polling */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3}, /*0x04[11] = 1 enable WL suspend*/ -+ -+#define RTL8814A_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/*0x12[6] = 1 force PWM mode */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0},/*0x15[5] = 0 turn off ZCD */ \ -+ {0x0015, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, 0},/* 0x15[6] =0 trun off ZCD output */ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/*0x23[4] = 0 hpon LDO leave sleep mode */ \ -+ {0x0046, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/* gpio0~7 input mode */ \ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00}, /* gpio11 input mode, gpio10~8 input mode */ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0}, /*0x04[10] = 0, enable SW LPS PCIE only*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0}, /*0x04[11] = 0, enable WL suspend*/ \ -+ /*{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2},*/ /*0x03[2] = 1, enable 3081*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ \ -+ {0x0071, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/*0x70[10] = 0, CPHY_MBIAS_EN disable*/ -+ -+ -+#define RTL8814A_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8814A_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8814A_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0c00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xc00[7:0] = 4 turn off 3-wire */ \ -+ {0x0e00, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04}, /* 0xe00[7:0] = 4 turn off 3-wire */ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated, and RF closed*/ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ {0x1002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated, and RF closed*/ \ -+ {0x0002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x1002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x05F1, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Respond TxOK to scheduler*/ -+ -+ -+#define RTL8814A_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /* Delay*/ \ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/ \ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /* Polling 0x109[7]=0 TSF in 40M*/ \ -+ /*{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, */ /*. ??0x29[7:6] = 2b'00 enable BB clock*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ -+ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ -+ {0x1002, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x1002[1:0] = 2b'11 enable BB macro*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8814A_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, -+ -+ -+extern WLAN_PWR_CFG rtl8814A_power_on_flow[RTL8814A_TRANS_CARDEMU_TO_ACT_STEPS + RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_radio_off_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_card_disable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_card_enable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_suspend_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS + RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_resume_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS + RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_hwpdn_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_enter_lps_flow[RTL8814A_TRANS_ACT_TO_LPS_STEPS + RTL8814A_TRANS_END_STEPS]; -+extern WLAN_PWR_CFG rtl8814A_leave_lps_flow[RTL8814A_TRANS_LPS_TO_ACT_STEPS + RTL8814A_TRANS_END_STEPS]; -+ -+#endif /* __HAL8814PWRSEQ_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/Hal8821APwrSeq.h b/drivers/staging/rtl8723cs/include/Hal8821APwrSeq.h -new file mode 100644 -index 000000000000..568b8e5fc1e9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/Hal8821APwrSeq.h -@@ -0,0 +1,200 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef REALTEK_POWER_SEQUENCE_8821 -+#define REALTEK_POWER_SEQUENCE_8821 -+ -+#include "HalPwrSeqCmd.h" -+ -+/* -+ Check document WM-20130516-JackieLau-RTL8821A_Power_Architecture-R10.vsd -+ There are 6 HW Power States: -+ 0: POFF--Power Off -+ 1: PDN--Power Down -+ 2: CARDEMU--Card Emulation -+ 3: ACT--Active Mode -+ 4: LPS--Low Power State -+ 5: SUS--Suspend -+ -+ The transision from different states are defined below -+ TRANS_CARDEMU_TO_ACT -+ TRANS_ACT_TO_CARDEMU -+ TRANS_CARDEMU_TO_SUS -+ TRANS_SUS_TO_CARDEMU -+ TRANS_CARDEMU_TO_PDN -+ TRANS_ACT_TO_LPS -+ TRANS_LPS_TO_ACT -+ -+ TRANS_END -+*/ -+#define RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS 25 -+#define RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS 15 -+#define RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS 15 -+#define RTL8821A_TRANS_SUS_TO_CARDEMU_STEPS 15 -+#define RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS 15 -+#define RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS 15 -+#define RTL8821A_TRANS_PDN_TO_CARDEMU_STEPS 15 -+#define RTL8821A_TRANS_ACT_TO_LPS_STEPS 15 -+#define RTL8821A_TRANS_LPS_TO_ACT_STEPS 15 -+#define RTL8821A_TRANS_END_STEPS 1 -+ -+ -+#define RTL8821A_TRANS_CARDEMU_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ -+ {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3 | BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[12:11]=0*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ -+ {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3), 0},/* disable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ -+ {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*0x4C[24] = 0x4F[0] = 1, switch DPDT_SEL_P output from WL BB */\ -+ {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT5 | BIT4), (BIT5 | BIT4)},/*0x66[13] = 0x67[5] = 1, switch for PAPE_G/PAPE_A from WL BB ; 0x66[12] = 0x67[4] = 1, switch LNAON from WL BB */\ -+ {0x0025, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, 0},/*anapar_mac<118> , 0x25[6]=0 by wlan single function*/\ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ -+ {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ -+ {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ -+ {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ -+ {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ -+ {0x007A, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3A},/*0x7A = 0x3A start BT*/\ -+ {0x002E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF , 0x82 },/* 0x2C[23:12]=0x820 ; XTAL trim */ \ -+ {0x0010, PWR_CUT_A_MSK , PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 , BIT6 },/* 0x10[6]=1 ; MP·s¼W¹ï©ó0x2Cªº±±¨îÅv¡A¶·§â0x10[6]³]¬°1¤~¯àÅýWLAN±±¨î */ \ -+ -+ -+#define RTL8821A_TRANS_ACT_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ -+ {0x004F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*0x4C[24] = 0x4F[0] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ -+ {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ -+ {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ -+ {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ -+ -+ -+#define RTL8821A_TRANS_CARDEMU_TO_SUS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8821A_TRANS_SUS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ -+ -+#define RTL8821A_TRANS_CARDEMU_TO_CARDDIS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ -+ -+#define RTL8821A_TRANS_CARDDIS_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ -+ {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ -+ {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ -+ -+ -+#define RTL8821A_TRANS_CARDEMU_TO_PDN \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ -+ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK | PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ -+ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -+ -+#define RTL8821A_TRANS_PDN_TO_CARDEMU \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ -+ -+#define RTL8821A_TRANS_ACT_TO_LPS \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ -+ {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ -+ {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ -+ {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ -+ -+ -+#define RTL8821A_TRANS_LPS_TO_ACT \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ -+ {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ -+ {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ -+ {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ -+ {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ -+ {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ -+ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ -+ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ -+ {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ -+ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ -+ -+#define RTL8821A_TRANS_END \ -+ /* format */ \ -+ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ -+ {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, -+ -+ -+ extern WLAN_PWR_CFG rtl8821A_power_on_flow[RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS + RTL8821A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8821A_radio_off_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8821A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8821A_card_disable_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8821A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8821A_card_enable_flow[RTL8821A_TRANS_CARDDIS_TO_CARDEMU_STEPS + RTL8821A_TRANS_CARDEMU_TO_ACT_STEPS + RTL8821A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8821A_suspend_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS + RTL8821A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8821A_resume_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8821A_TRANS_CARDEMU_TO_SUS_STEPS + RTL8821A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8821A_hwpdn_flow[RTL8821A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8821A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8821A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8821A_enter_lps_flow[RTL8821A_TRANS_ACT_TO_LPS_STEPS + RTL8821A_TRANS_END_STEPS]; -+ extern WLAN_PWR_CFG rtl8821A_leave_lps_flow[RTL8821A_TRANS_LPS_TO_ACT_STEPS + RTL8821A_TRANS_END_STEPS]; -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/HalPwrSeqCmd.h b/drivers/staging/rtl8723cs/include/HalPwrSeqCmd.h -new file mode 100644 -index 000000000000..f67ed22d1fc9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/HalPwrSeqCmd.h -@@ -0,0 +1,130 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HALPWRSEQCMD_H__ -+#define __HALPWRSEQCMD_H__ -+ -+#include -+ -+/*---------------------------------------------*/ -+/* 3 The value of cmd: 4 bits -+ *---------------------------------------------*/ -+#define PWR_CMD_READ 0x00 -+/* offset: the read register offset -+ * msk: the mask of the read value -+ * value: N/A, left by 0 -+ * note: dirver shall implement this function by read & msk */ -+ -+#define PWR_CMD_WRITE 0x01 -+/* offset: the read register offset -+ * msk: the mask of the write bits -+ * value: write value -+ * note: driver shall implement this cmd by read & msk after write */ -+ -+#define PWR_CMD_POLLING 0x02 -+/* offset: the read register offset -+ * msk: the mask of the polled value -+ * value: the value to be polled, masked by the msd field. -+ * note: driver shall implement this cmd by -+ * do { -+ * if( (Read(offset) & msk) == (value & msk) ) -+ * break; -+ * } while(not timeout); */ -+ -+#define PWR_CMD_DELAY 0x03 -+/* offset: the value to delay -+ * msk: N/A -+ * value: the unit of delay, 0: us, 1: ms */ -+ -+#define PWR_CMD_END 0x04 -+/* offset: N/A -+ * msk: N/A -+ * value: N/A */ -+ -+/*---------------------------------------------*/ -+/* 3 The value of base: 4 bits -+ *--------------------------------------------- -+ * define the base address of each block */ -+#define PWR_BASEADDR_MAC 0x00 -+#define PWR_BASEADDR_USB 0x01 -+#define PWR_BASEADDR_PCIE 0x02 -+#define PWR_BASEADDR_SDIO 0x03 -+ -+/*---------------------------------------------*/ -+/* 3 The value of interface_msk: 4 bits -+ *---------------------------------------------*/ -+#define PWR_INTF_SDIO_MSK BIT(0) -+#define PWR_INTF_USB_MSK BIT(1) -+#define PWR_INTF_PCI_MSK BIT(2) -+#define PWR_INTF_ALL_MSK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) -+ -+/*---------------------------------------------*/ -+/* 3 The value of fab_msk: 4 bits -+ *---------------------------------------------*/ -+#define PWR_FAB_TSMC_MSK BIT(0) -+#define PWR_FAB_UMC_MSK BIT(1) -+#define PWR_FAB_ALL_MSK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) -+ -+/*---------------------------------------------*/ -+/* 3 The value of cut_msk: 8 bits -+ *---------------------------------------------*/ -+#define PWR_CUT_TESTCHIP_MSK BIT(0) -+#define PWR_CUT_A_MSK BIT(1) -+#define PWR_CUT_B_MSK BIT(2) -+#define PWR_CUT_C_MSK BIT(3) -+#define PWR_CUT_D_MSK BIT(4) -+#define PWR_CUT_E_MSK BIT(5) -+#define PWR_CUT_F_MSK BIT(6) -+#define PWR_CUT_G_MSK BIT(7) -+#define PWR_CUT_ALL_MSK 0xFF -+ -+ -+typedef enum _PWRSEQ_CMD_DELAY_UNIT_ { -+ PWRSEQ_DELAY_US, -+ PWRSEQ_DELAY_MS, -+} PWRSEQ_DELAY_UNIT; -+ -+typedef struct _WL_PWR_CFG_ { -+ u16 offset; -+ u8 cut_msk; -+ u8 fab_msk:4; -+ u8 interface_msk:4; -+ u8 base:4; -+ u8 cmd:4; -+ u8 msk; -+ u8 value; -+} WLAN_PWR_CFG, *PWLAN_PWR_CFG; -+ -+ -+#define GET_PWR_CFG_OFFSET(__PWR_CMD) ((__PWR_CMD).offset) -+#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) ((__PWR_CMD).cut_msk) -+#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) ((__PWR_CMD).fab_msk) -+#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) ((__PWR_CMD).interface_msk) -+#define GET_PWR_CFG_BASE(__PWR_CMD) ((__PWR_CMD).base) -+#define GET_PWR_CFG_CMD(__PWR_CMD) ((__PWR_CMD).cmd) -+#define GET_PWR_CFG_MASK(__PWR_CMD) ((__PWR_CMD).msk) -+#define GET_PWR_CFG_VALUE(__PWR_CMD) ((__PWR_CMD).value) -+ -+ -+/* ******************************************************************************** -+ * Prototype of protected function. -+ * ******************************************************************************** */ -+u8 HalPwrSeqCmdParsing( -+ PADAPTER padapter, -+ u8 CutVersion, -+ u8 FabVersion, -+ u8 InterfaceType, -+ WLAN_PWR_CFG PwrCfgCmd[]); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/HalVerDef.h b/drivers/staging/rtl8723cs/include/HalVerDef.h -new file mode 100644 -index 000000000000..d4e40670aba7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/HalVerDef.h -@@ -0,0 +1,209 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_VERSION_DEF_H__ -+#define __HAL_VERSION_DEF_H__ -+ -+#define TRUE _TRUE -+#define FALSE _FALSE -+ -+/* HAL_IC_TYPE_E */ -+typedef enum tag_HAL_IC_Type_Definition { -+ CHIP_8192S = 0, -+ CHIP_8188C = 1, -+ CHIP_8192C = 2, -+ CHIP_8192D = 3, -+ CHIP_8723A = 4, -+ CHIP_8188E = 5, -+ CHIP_8812 = 6, -+ CHIP_8821 = 7, -+ CHIP_8723B = 8, -+ CHIP_8192E = 9, -+ CHIP_8814A = 10, -+ CHIP_8703B = 11, -+ CHIP_8188F = 12, -+ CHIP_8822B = 13, -+ CHIP_8723D = 14, -+ CHIP_8821C = 15, -+ CHIP_8710B = 16, -+ CHIP_8192F = 17, -+ CHIP_8188GTV = 18, -+ CHIP_8822C = 19, -+ CHIP_8814B = 20, -+ CHIP_8723F = 21, -+} HAL_IC_TYPE_E; -+ -+/* HAL_CHIP_TYPE_E */ -+typedef enum tag_HAL_CHIP_Type_Definition { -+ TEST_CHIP = 0, -+ NORMAL_CHIP = 1, -+ FPGA = 2, -+} HAL_CHIP_TYPE_E; -+ -+/* HAL_CUT_VERSION_E */ -+typedef enum tag_HAL_Cut_Version_Definition { -+ A_CUT_VERSION = 0, -+ B_CUT_VERSION = 1, -+ C_CUT_VERSION = 2, -+ D_CUT_VERSION = 3, -+ E_CUT_VERSION = 4, -+ F_CUT_VERSION = 5, -+ G_CUT_VERSION = 6, -+ H_CUT_VERSION = 7, -+ I_CUT_VERSION = 8, -+ J_CUT_VERSION = 9, -+ K_CUT_VERSION = 10, -+} HAL_CUT_VERSION_E; -+ -+/* HAL_Manufacturer */ -+typedef enum tag_HAL_Manufacturer_Version_Definition { -+ CHIP_VENDOR_TSMC = 0, -+ CHIP_VENDOR_UMC = 1, -+ CHIP_VENDOR_SMIC = 2, -+} HAL_VENDOR_E; -+ -+typedef enum tag_HAL_RF_Type_Definition { -+ RF_TYPE_1T1R = 0, -+ RF_TYPE_1T2R = 1, -+ RF_TYPE_2T2R = 2, -+ RF_TYPE_2T3R = 3, -+ RF_TYPE_2T4R = 4, -+ RF_TYPE_3T3R = 5, -+ RF_TYPE_3T4R = 6, -+ RF_TYPE_4T4R = 7, -+} HAL_RF_TYPE_E; -+ -+typedef struct tag_HAL_VERSION { -+ HAL_IC_TYPE_E ICType; -+ HAL_CHIP_TYPE_E ChipType; -+ HAL_CUT_VERSION_E CUTVersion; -+ HAL_VENDOR_E VendorType; -+ HAL_RF_TYPE_E RFType; -+ u8 ROMVer; -+} HAL_VERSION, *PHAL_VERSION; -+ -+/* VERSION_8192C VersionID; -+ * HAL_VERSION VersionID; */ -+ -+/* Get element */ -+#define GET_CVID_IC_TYPE(version) ((HAL_IC_TYPE_E)(((HAL_VERSION)version).ICType)) -+#define GET_CVID_CHIP_TYPE(version) ((HAL_CHIP_TYPE_E)(((HAL_VERSION)version).ChipType)) -+#define GET_CVID_RF_TYPE(version) ((HAL_RF_TYPE_E)(((HAL_VERSION)version).RFType)) -+#define GET_CVID_MANUFACTUER(version) ((HAL_VENDOR_E)(((HAL_VERSION)version).VendorType)) -+#define GET_CVID_CUT_VERSION(version) ((HAL_CUT_VERSION_E)(((HAL_VERSION)version).CUTVersion)) -+#define GET_CVID_ROM_VERSION(version) ((((HAL_VERSION)version).ROMVer) & ROM_VERSION_MASK) -+ -+/* ---------------------------------------------------------------------------- -+ * Common Macro. -- -+ * ---------------------------------------------------------------------------- -+ * HAL_VERSION VersionID */ -+ -+/* HAL_IC_TYPE_E */ -+#if 0 -+ #define IS_81XXC(version) (((GET_CVID_IC_TYPE(version) == CHIP_8192C) || (GET_CVID_IC_TYPE(version) == CHIP_8188C)) ? TRUE : FALSE) -+ #define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723A) ? TRUE : FALSE) -+ #define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_8192D) ? TRUE : FALSE) -+#endif -+ -+#define IS_8188E(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188E) ? TRUE : FALSE) -+#define IS_8188F(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188F) ? TRUE : FALSE) -+#define IS_8188GTV(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188GTV) ? TRUE : FALSE) -+#define IS_8192E(version) ((GET_CVID_IC_TYPE(version) == CHIP_8192E) ? TRUE : FALSE) -+#define IS_8812_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8812) ? TRUE : FALSE) -+#define IS_8821_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8821) ? TRUE : FALSE) -+#define IS_8814A_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8814A) ? TRUE : FALSE) -+#define IS_8723B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723B) ? TRUE : FALSE) -+#define IS_8703B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8703B) ? TRUE : FALSE) -+#define IS_8822B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8822B) ? TRUE : FALSE) -+#define IS_8821C_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8821C) ? TRUE : FALSE) -+#define IS_8723D_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723D) ? TRUE : FALSE) -+#define IS_8710B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8710B) ? TRUE : FALSE) -+#define IS_8822C_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8822C) ? TRUE : FALSE) -+#define IS_8814B_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8814B) ? TRUE : FALSE) -+#define IS_8723F_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723F) ? TRUE : FALSE) -+ -+#define IS_8192F_SERIES(version)\ -+ ((GET_CVID_IC_TYPE(version) == CHIP_8192F) ? TRUE : FALSE) -+/* HAL_CHIP_TYPE_E */ -+#define IS_TEST_CHIP(version) ((GET_CVID_CHIP_TYPE(version) == TEST_CHIP) ? TRUE : FALSE) -+#define IS_NORMAL_CHIP(version) ((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? TRUE : FALSE) -+ -+/* HAL_CUT_VERSION_E */ -+#define IS_A_CUT(version) ((GET_CVID_CUT_VERSION(version) == A_CUT_VERSION) ? TRUE : FALSE) -+#define IS_B_CUT(version) ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? TRUE : FALSE) -+#define IS_C_CUT(version) ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? TRUE : FALSE) -+#define IS_D_CUT(version) ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? TRUE : FALSE) -+#define IS_E_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? TRUE : FALSE) -+#define IS_F_CUT(version) ((GET_CVID_CUT_VERSION(version) == F_CUT_VERSION) ? TRUE : FALSE) -+#define IS_I_CUT(version) ((GET_CVID_CUT_VERSION(version) == I_CUT_VERSION) ? TRUE : FALSE) -+#define IS_J_CUT(version) ((GET_CVID_CUT_VERSION(version) == J_CUT_VERSION) ? TRUE : FALSE) -+#define IS_K_CUT(version) ((GET_CVID_CUT_VERSION(version) == K_CUT_VERSION) ? TRUE : FALSE) -+ -+/* HAL_VENDOR_E */ -+#define IS_CHIP_VENDOR_TSMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_TSMC) ? TRUE : FALSE) -+#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC) ? TRUE : FALSE) -+#define IS_CHIP_VENDOR_SMIC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_SMIC) ? TRUE : FALSE) -+ -+/* HAL_RF_TYPE_E */ -+#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R) ? TRUE : FALSE) -+#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R) ? TRUE : FALSE) -+#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R) ? TRUE : FALSE) -+#define IS_2T3R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T3R) ? TRUE : FALSE) -+#define IS_2T4R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T4R) ? TRUE : FALSE) -+#define IS_3T3R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_3T3R) ? TRUE : FALSE) -+#define IS_3T4R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_3T4R) ? TRUE : FALSE) -+#define IS_4T4R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_4T4R) ? TRUE : FALSE) -+ -+ -+ -+/* ---------------------------------------------------------------------------- -+ * Chip version Macro. -- -+ * ---------------------------------------------------------------------------- */ -+#if 0 -+ #define IS_81XXC_TEST_CHIP(version) ((IS_81XXC(version) && (!IS_NORMAL_CHIP(version))) ? TRUE : FALSE) -+ -+ #define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? TRUE : FALSE) -+ #define IS_81xxC_VENDOR_UMC_A_CUT(version) (IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? (IS_A_CUT(version) ? TRUE : FALSE) : FALSE) : FALSE) -+ #define IS_81xxC_VENDOR_UMC_B_CUT(version) (IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? (IS_B_CUT(version) ? TRUE : FALSE) : FALSE) : FALSE) -+ #define IS_81xxC_VENDOR_UMC_C_CUT(version) (IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? (IS_C_CUT(version) ? TRUE : FALSE) : FALSE) : FALSE) -+ -+ #define IS_NORMAL_CHIP92D(version) ((IS_92D(version)) ? ((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? TRUE : FALSE) : FALSE) -+ -+ #define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? TRUE : FALSE) : FALSE) -+ #define IS_92D_C_CUT(version) ((IS_92D(version)) ? (IS_C_CUT(version) ? TRUE : FALSE) : FALSE) -+ #define IS_92D_D_CUT(version) ((IS_92D(version)) ? (IS_D_CUT(version) ? TRUE : FALSE) : FALSE) -+ #define IS_92D_E_CUT(version) ((IS_92D(version)) ? (IS_E_CUT(version) ? TRUE : FALSE) : FALSE) -+ -+ #define IS_8723A_A_CUT(version) ((IS_8723_SERIES(version)) ? (IS_A_CUT(version) ? TRUE : FALSE) : FALSE) -+ #define IS_8723A_B_CUT(version) ((IS_8723_SERIES(version)) ? (IS_B_CUT(version) ? TRUE : FALSE) : FALSE) -+#endif -+#define IS_VENDOR_8188E_I_CUT_SERIES(_Adapter) ((IS_8188E(GET_HAL_DATA(_Adapter)->version_id)) ? ((GET_CVID_CUT_VERSION(GET_HAL_DATA(_Adapter)->version_id) >= I_CUT_VERSION) ? TRUE : FALSE) : FALSE) -+#define IS_VENDOR_8812A_TEST_CHIP(_Adapter) ((IS_8812_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? FALSE : TRUE) : FALSE) -+#define IS_VENDOR_8812A_MP_CHIP(_Adapter) ((IS_8812_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? TRUE : FALSE) : FALSE) -+#define IS_VENDOR_8812A_C_CUT(_Adapter) ((IS_8812_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((GET_CVID_CUT_VERSION(GET_HAL_DATA(_Adapter)->version_id) == C_CUT_VERSION) ? TRUE : FALSE) : FALSE) -+ -+#define IS_VENDOR_8821A_TEST_CHIP(_Adapter) ((IS_8821_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? FALSE : TRUE) : FALSE) -+#define IS_VENDOR_8821A_MP_CHIP(_Adapter) ((IS_8821_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? TRUE : FALSE) : FALSE) -+ -+#define IS_VENDOR_8192E_B_CUT(_Adapter) ((GET_CVID_CUT_VERSION(GET_HAL_DATA(_Adapter)->version_id) == B_CUT_VERSION) ? TRUE : FALSE) -+ -+#define IS_VENDOR_8723B_TEST_CHIP(_Adapter) ((IS_8723B_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? FALSE : TRUE) : FALSE) -+#define IS_VENDOR_8723B_MP_CHIP(_Adapter) ((IS_8723B_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? TRUE : FALSE) : FALSE) -+ -+#define IS_VENDOR_8703B_TEST_CHIP(_Adapter) ((IS_8703B_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? FALSE : TRUE) : FALSE) -+#define IS_VENDOR_8703B_MP_CHIP(_Adapter) ((IS_8703B_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? TRUE : FALSE) : FALSE) -+#define IS_VENDOR_8814A_TEST_CHIP(_Adapter) ((IS_8814A_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? FALSE : TRUE) : FALSE) -+#define IS_VENDOR_8814A_MP_CHIP(_Adapter) ((IS_8814A_SERIES(GET_HAL_DATA(_Adapter)->version_id)) ? ((IS_NORMAL_CHIP(GET_HAL_DATA(_Adapter)->version_id)) ? TRUE : FALSE) : FALSE) -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/autoconf.h b/drivers/staging/rtl8723cs/include/autoconf.h -new file mode 100644 -index 000000000000..35dfd7b24e3c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/autoconf.h -@@ -0,0 +1,290 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/* -+ * Public General Config -+ */ -+#define AUTOCONF_INCLUDED -+ -+#define RTL871X_MODULE_NAME "8723CS" -+#define DRV_NAME "rtl8723cs" -+ -+#ifndef CONFIG_RTL8703B -+#define CONFIG_RTL8703B -+#endif -+#define CONFIG_SDIO_HCI -+ -+#define PLATFORM_LINUX -+ -+ -+/* -+ * Wi-Fi Functions Config -+ */ -+#define CONFIG_80211N_HT -+#define CONFIG_RECV_REORDERING_CTRL -+ -+/* #define CONFIG_IOCTL_CFG80211 */ /* Set from Makefile */ -+#ifdef CONFIG_IOCTL_CFG80211 -+ /* -+ * Indecate new sta asoc through cfg80211_new_sta -+ * If kernel version >= 3.2 or -+ * version < 3.2 but already apply cfg80211 patch, -+ * RTW_USE_CFG80211_STA_EVENT must be defiend! -+ */ -+ /* #define RTW_USE_CFG80211_STA_EVENT */ /* Indecate new sta asoc through cfg80211_new_sta */ -+ #ifndef CONFIG_PLATFORM_INTEL_BYT -+ #define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER -+ #endif /* !CONFIG_PLATFORM_INTEL_BYT */ -+ /* #define CONFIG_DEBUG_CFG80211 */ -+ #define CONFIG_SET_SCAN_DENY_TIMER -+#endif -+ -+#ifdef CONFIG_AP_MODE -+ #define CONFIG_NATIVEAP_MLME -+ #ifndef CONFIG_NATIVEAP_MLME -+ #define CONFIG_HOSTAPD_MLME -+ #endif -+ /* #define CONFIG_FIND_BEST_CHANNEL */ -+#endif -+ -+#ifdef CONFIG_P2P -+ /* Added by Albert 20110812 -+ The CONFIG_WFD is for supporting the Wi-Fi display */ -+ #define CONFIG_WFD -+ -+ #define CONFIG_P2P_REMOVE_GROUP_INFO -+ -+ /* #define CONFIG_DBG_P2P */ -+ #define CONFIG_P2P_PS -+ #define CONFIG_P2P_OP_CHK_SOCIAL_CH -+ #define CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT /* replace CONFIG_P2P_CHK_INVITE_CH_LIST flag */ -+ /*#define CONFIG_P2P_INVITE_IOT*/ -+#endif -+ -+/* Added by Kurt 20110511 */ -+#ifdef CONFIG_TDLS -+ #define CONFIG_TDLS_DRIVER_SETUP -+ /* #ifndef CONFIG_WFD -+ #define CONFIG_WFD -+ #endif */ -+ /* #define CONFIG_TDLS_AUTOSETUP */ -+ #define CONFIG_TDLS_AUTOCHECKALIVE -+ /* #define CONFIG_TDLS_CH_SW */ /* Enable this flag only when we confirm that TDLS CH SW is supported in FW */ -+#endif -+ -+/* #define CONFIG_CONCURRENT_MODE */ /* Set from Makefile */ -+#ifdef CONFIG_CONCURRENT_MODE -+ #define CONFIG_RUNTIME_PORT_SWITCH -+ /* #define DBG_RUNTIME_PORT_SWITCH */ -+ -+ -+ #ifndef CONFIG_RUNTIME_PORT_SWITCH -+ #define CONFIG_TSF_RESET_OFFLOAD /* For 2 PORT TSF SYNC. */ -+ #endif -+ /* #define DBG_RUNTIME_PORT_SWITCH */ -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+/* -+ * Hareware/Firmware Related Config -+ */ -+/* #define CONFIG_BT_COEXIST */ /* Set from Makefile */ -+/* #define CONFIG_ANTENNA_DIVERSITY */ -+/* #define SUPPORT_HW_RFOFF_DETECTED */ -+ -+/*#define CONFIG_RTW_LED*/ -+#ifdef CONFIG_RTW_LED -+ /*#define CONFIG_RTW_SW_LED*/ -+#endif /* CONFIG_RTW_LED */ -+ -+#define CONFIG_XMIT_ACK -+#ifdef CONFIG_XMIT_ACK -+ #define CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+#endif -+ -+#define CONFIG_RF_POWER_TRIM -+ -+#define DISABLE_BB_RF 0 -+ -+#define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */ -+ -+ -+/* -+ * Interface Related Config -+ */ -+#define CONFIG_TX_AGGREGATION -+#define CONFIG_SDIO_RX_COPY -+#define CONFIG_XMIT_THREAD_MODE -+/* #define CONFIG_SDIO_TX_ENABLE_AVAL_INT */ -+#define CONFIG_RECV_THREAD_MODE -+ -+/* -+ * Others -+ */ -+/* #define CONFIG_MAC_LOOPBACK_DRIVER */ -+ -+#define CONFIG_SKB_COPY /* for amsdu */ -+ -+#define CONFIG_NEW_SIGNAL_STAT_PROCESS -+ -+#define CONFIG_EMBEDDED_FWIMG -+ -+#ifdef CONFIG_EMBEDDED_FWIMG -+ #define LOAD_FW_HEADER_FROM_DRIVER -+#endif -+/* #define CONFIG_FILE_FWIMG */ -+ -+#define CONFIG_LONG_DELAY_ISSUE -+/* #define CONFIG_PATCH_JOIN_WRONG_CHANNEL */ -+ -+ -+/* -+ * Auto Config Section -+ */ -+#ifdef CONFIG_MAC_LOOPBACK_DRIVER -+#undef CONFIG_IOCTL_CFG80211 -+#undef CONFIG_AP_MODE -+#undef CONFIG_NATIVEAP_MLME -+#undef CONFIG_POWER_SAVING -+#undef CONFIG_BT_COEXIST -+#undef CONFIG_ANTENNA_DIVERSITY -+#undef SUPPORT_HW_RFOFF_DETECTED -+#endif -+ -+#ifdef CONFIG_MP_INCLUDED -+ #define MP_DRIVER 1 -+ #define CONFIG_MP_IWPRIV_SUPPORT -+ /* disable unnecessary functions for MP */ -+ /* #undef CONFIG_POWER_SAVING -+ #undef CONFIG_BT_COEXIST -+ #undef CONFIG_ANTENNA_DIVERSITY -+ #undef SUPPORT_HW_RFOFF_DETECTED */ -+#else /* !CONFIG_MP_INCLUDED */ -+ #define MP_DRIVER 0 -+ #undef CONFIG_MP_IWPRIV_SUPPORT -+#endif /* !CONFIG_MP_INCLUDED */ -+ -+#ifdef CONFIG_POWER_SAVING -+ #define CONFIG_IPS -+ #define CONFIG_LPS -+ -+ #if defined(CONFIG_LPS) && (defined(CONFIG_GSPI_HCI) || defined(CONFIG_SDIO_HCI)) -+ #define CONFIG_LPS_LCLK -+ #endif -+ -+ #ifdef CONFIG_LPS -+ #define CONFIG_CHECK_LEAVE_LPS -+ #ifndef CONFIG_PLATFORM_INTEL_BYT -+ #define CONFIG_LPS_SLOW_TRANSITION -+ #endif /* !CONFIG_PLATFORM_INTEL_BYT */ -+ #endif -+ -+ #ifdef CONFIG_LPS_LCLK -+ #define CONFIG_DETECT_CPWM_BY_POLLING -+ #define CONFIG_LPS_RPWM_TIMER -+ #if defined(CONFIG_LPS_RPWM_TIMER) || defined(CONFIG_DETECT_CPWM_BY_POLLING) -+ #define LPS_RPWM_WAIT_MS 300 -+ #endif -+ #define CONFIG_LPS_LCLK_WD_TIMER /* Watch Dog timer in LPS LCLK */ -+ #endif -+ -+ #ifdef CONFIG_IPS -+ #define CONFIG_IPS_CHECK_IN_WD /* Do IPS Check in WatchDog. */ -+ /* #define CONFIG_SWLPS_IN_IPS */ /* Do SW LPS flow when entering and leaving IPS */ -+ /* #define CONFIG_FWLPS_IN_IPS */ /* issue H2C command to let FW do LPS when entering IPS */ -+ #endif -+#endif /* CONFIG_POWER_SAVING */ -+ -+#ifdef CONFIG_BT_COEXIST -+ /* for ODM and outsrc BT-Coex */ -+ #ifndef CONFIG_LPS -+ #define CONFIG_LPS /* download reserved page to FW */ -+ #endif -+#endif /* !CONFIG_BT_COEXIST */ -+ -+#ifdef CONFIG_WOWLAN -+ /* #define CONFIG_GTK_OL */ -+ /* #define CONFIG_ARP_KEEP_ALIVE */ -+#endif /* CONFIG_WOWLAN */ -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ #ifndef WAKEUP_GPIO_IDX -+ #define WAKEUP_GPIO_IDX 8 /* WIFI Chip Side */ -+ #endif /* !WAKEUP_GPIO_IDX */ -+#endif /* CONFIG_GPIO_WAKEUP */ -+ -+ -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+#define CONFIG_HW_ANTENNA_DIVERSITY -+#endif -+ -+#ifdef CONFIG_RTW_NAPI -+/*#define CONFIG_RTW_NAPI_DYNAMIC*/ -+#define CONFIG_RTW_NAPI_V2 -+#endif -+ -+/* -+ * Platform dependent -+ */ -+#ifdef CONFIG_PLATFORM_SPRD -+ -+#undef CONFIG_SDIO_RX_COPY -+ -+#ifdef ANDROID_2X -+ -+#define CONFIG_SDIO_RX_COPY -+ -+#else /* !ANDROID_2X */ -+ #undef CONFIG_WOWLAN -+ #undef CONFIG_WOWLAN_8723 -+ /* #define CONFIG_SDIO_RX_COPY */ -+ /* #define CONFIG_LINKED_LCOK */ -+ #define CONFIG_AUTH_DIRECT_WITHOUT_BCN -+ /* #define CONFIG_DISCONNECT_H2CWAY */ -+ /* #define CONFIG_DONT_CARE_TP */ -+ #define CONFIG_LOW_PWR_LPS -+ /* #define CONFIG_CMCC_TEST */ -+ -+ /* 1) LPS unit is only 102 ms, it's not -+ a good idear to retry it use timer, -+ 2) we must wait ACK, or lots of IO -+ is not allowed under 32k, because -+ this will cause hw hang */ -+ #undef CONFIG_LPS_RPWM_TIMER -+ #define CONFIG_WAIT_PS_ACK -+ #define CONFIG_SOFTAP_11N -+ #define CONFIG_CHECK_BT_HANG -+ -+ /* #define CONFIG_8703BS_TEST */ -+#endif /* !ANDROID_2X */ -+ -+#endif /* CONFIG_PLATFORM_SPRD */ -+ -+ -+/* -+ * Debug Related Config -+ */ -+#ifdef CONFIG_RTW_DEBUG -+#define DBG 1 /* for ODM & BTCOEX debug */ -+#else /* !CONFIG_RTW_DEBUG */ -+#define DBG 0 /* for ODM & BTCOEX debug */ -+#endif /* !CONFIG_RTW_DEBUG */ -+ -+#define DBG_CONFIG_ERROR_DETECT -+/* #define DBG_XMIT_BUF */ -+/* #define DBG_XMIT_BUF_EXT */ -+#define DBG_CHECK_FW_PS_STATE -+#define DBG_CHECK_FW_PS_STATE_H2C -+/* #define CONFIG_FW_C2H_DEBUG */ -+#define DBG_RX_DFRAME_RAW_DATA -diff --git a/drivers/staging/rtl8723cs/include/basic_types.h b/drivers/staging/rtl8723cs/include/basic_types.h -new file mode 100644 -index 000000000000..45e513156e2f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/basic_types.h -@@ -0,0 +1,357 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __BASIC_TYPES_H__ -+#define __BASIC_TYPES_H__ -+ -+ -+#define SUCCESS 0 -+#define FAIL (-1) -+ -+#ifndef TRUE -+ #define _TRUE 1 -+#else -+ #define _TRUE TRUE -+#endif -+ -+#ifndef FALSE -+ #define _FALSE 0 -+#else -+ #define _FALSE FALSE -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ -+ typedef signed char s8; -+ typedef unsigned char u8; -+ -+ typedef signed short s16; -+ typedef unsigned short u16; -+ -+ typedef signed long s32; -+ typedef unsigned long u32; -+ -+ typedef unsigned int uint; -+ typedef signed int sint; -+ -+ -+ typedef signed long long s64; -+ typedef unsigned long long u64; -+ -+ #ifdef NDIS50_MINIPORT -+ -+ #define NDIS_MAJOR_VERSION 5 -+ #define NDIS_MINOR_VERSION 0 -+ -+ #endif -+ -+ #ifdef NDIS51_MINIPORT -+ -+ #define NDIS_MAJOR_VERSION 5 -+ #define NDIS_MINOR_VERSION 1 -+ -+ #endif -+ -+ typedef NDIS_PROC proc_t; -+ -+ typedef LONG atomic_t; -+ -+#endif -+ -+ -+#ifdef PLATFORM_LINUX -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ -+ typedef signed int sint; -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)) -+typedef _Bool bool; -+ -+enum { -+ false = 0, -+ true = 1 -+}; -+#endif -+ -+ typedef void (*proc_t)(void *); -+ -+ typedef __kernel_size_t SIZE_T; -+ typedef __kernel_ssize_t SSIZE_T; -+ #define FIELD_OFFSET(s, field) ((SSIZE_T)&((s *)(0))->field) -+ -+#define NDIS_OID uint -+#endif /*PLATFORM_LINUX*/ -+ -+ -+#ifdef PLATFORM_FREEBSD -+ -+ typedef signed char s8; -+ typedef unsigned char u8; -+ -+ typedef signed short s16; -+ typedef unsigned short u16; -+ -+ typedef signed int s32; -+ typedef unsigned int u32; -+ -+ typedef unsigned int uint; -+ typedef signed int sint; -+ typedef long atomic_t; -+ -+ typedef signed long long s64; -+ typedef unsigned long long u64; -+ -+ typedef u32 dma_addr_t; -+ -+ typedef void (*proc_t)(void *); -+ -+ typedef unsigned int __kernel_size_t; -+ typedef int __kernel_ssize_t; -+ -+ typedef __kernel_size_t SIZE_T; -+ typedef __kernel_ssize_t SSIZE_T; -+ #define FIELD_OFFSET(s, field) ((SSIZE_T)&((s *)(0))->field) -+ -+#endif -+ -+#define MEM_ALIGNMENT_OFFSET (sizeof (SIZE_T)) -+#define MEM_ALIGNMENT_PADDING (sizeof(SIZE_T) - 1) -+ -+#define SIZE_PTR SIZE_T -+#define SSIZE_PTR SSIZE_T -+ -+/* -+* Continuous bits starting from least significant bit -+* Example: -+* BIT_LEN_MASK_32(0) => 0x00000000 -+* BIT_LEN_MASK_32(1) => 0x00000001 -+* BIT_LEN_MASK_32(2) => 0x00000003 -+* BIT_LEN_MASK_32(32) => 0xFFFFFFFF -+*/ -+#define BIT_LEN_MASK_32(__BitLen) ((u32)(0xFFFFFFFF >> (32 - (__BitLen)))) -+#define BIT_LEN_MASK_16(__BitLen) ((u16)(0xFFFF >> (16 - (__BitLen)))) -+#define BIT_LEN_MASK_8(__BitLen) ((u8)(0xFF >> (8 - (__BitLen)))) -+ -+/* -+* Continuous bits starting from least significant bit -+* Example: -+* BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003 -+* BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000 -+*/ -+#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ((u32)(BIT_LEN_MASK_32(__BitLen) << (__BitOffset))) -+#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ((u16)(BIT_LEN_MASK_16(__BitLen) << (__BitOffset))) -+#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ((u8)(BIT_LEN_MASK_8(__BitLen) << (__BitOffset))) -+ -+/* -+* Convert LE data to host byte order -+*/ -+#define EF1Byte (u8) -+#define EF2Byte le16_to_cpu -+#define EF4Byte le32_to_cpu -+ -+/* -+* Read LE data from memory to host byte order -+*/ -+#define ReadLE4Byte(_ptr) le32_to_cpu(*((u32 *)(_ptr))) -+#define ReadLE2Byte(_ptr) le16_to_cpu(*((u16 *)(_ptr))) -+#define ReadLE1Byte(_ptr) (*((u8 *)(_ptr))) -+ -+/* -+* Read BE data from memory to host byte order -+*/ -+#define ReadBEE4Byte(_ptr) be32_to_cpu(*((u32 *)(_ptr))) -+#define ReadBE2Byte(_ptr) be16_to_cpu(*((u16 *)(_ptr))) -+#define ReadBE1Byte(_ptr) (*((u8 *)(_ptr))) -+ -+/* -+* Write host byte order data to memory in LE order -+*/ -+#define WriteLE4Byte(_ptr, _val) ((*((u32 *)(_ptr))) = cpu_to_le32(_val)) -+#define WriteLE2Byte(_ptr, _val) ((*((u16 *)(_ptr))) = cpu_to_le16(_val)) -+#define WriteLE1Byte(_ptr, _val) ((*((u8 *)(_ptr))) = ((u8)(_val))) -+ -+/* -+* Write host byte order data to memory in BE order -+*/ -+#define WriteBE4Byte(_ptr, _val) ((*((u32 *)(_ptr))) = cpu_to_be32(_val)) -+#define WriteBE2Byte(_ptr, _val) ((*((u16 *)(_ptr))) = cpu_to_be16(_val)) -+#define WriteBE1Byte(_ptr, _val) ((*((u8 *)(_ptr))) = ((u8)(_val))) -+ -+/* -+* Return 4-byte value in host byte ordering from 4-byte pointer in litten-endian system. -+*/ -+#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) (le32_to_cpu(*((u32 *)(__pStart)))) -+#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) (le16_to_cpu(*((u16 *)(__pStart)))) -+#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) ((*((u8 *)(__pStart)))) -+ -+/* -+* Return 4-byte value in host byte ordering from 4-byte pointer in big-endian system. -+*/ -+#define BE_P4BYTE_TO_HOST_4BYTE(__pStart) (be32_to_cpu(*((u32 *)(__pStart)))) -+#define BE_P2BYTE_TO_HOST_2BYTE(__pStart) (be16_to_cpu(*((u16 *)(__pStart)))) -+#define BE_P1BYTE_TO_HOST_1BYTE(__pStart) ((*((u8 *)(__pStart)))) -+ -+/* -+* Translate subfield (continuous bits in little-endian) of 4-byte value in LE byte to -+* 4-byte value in host byte ordering. -+*/ -+#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ -+ ((LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_32(__BitLen)) -+ -+#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ -+ ((LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_16(__BitLen)) -+ -+#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ -+ ((LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_8(__BitLen)) -+ -+/* -+* Translate subfield (continuous bits in big-endian) of 4-byte value in BE byte to -+* 4-byte value in host byte ordering. -+*/ -+#define BE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ -+ ((BE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_32(__BitLen)) -+ -+#define BE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ -+ ((BE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_16(__BitLen)) -+ -+#define BE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ -+ ((BE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset)) & BIT_LEN_MASK_8(__BitLen)) -+ -+/* -+* Mask subfield (continuous bits in little-endian) of 4-byte value in LE byte oredering -+* and return the result in 4-byte value in host byte ordering. -+*/ -+#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ -+ (LE_P4BYTE_TO_HOST_4BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen))) -+ -+#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ -+ (LE_P2BYTE_TO_HOST_2BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen))) -+ -+#define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ -+ (LE_P1BYTE_TO_HOST_1BYTE(__pStart) & ((u8)(~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen)))) -+ -+/* -+* Mask subfield (continuous bits in big-endian) of 4-byte value in BE byte oredering -+* and return the result in 4-byte value in host byte ordering. -+*/ -+#define BE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ -+ (BE_P4BYTE_TO_HOST_4BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen))) -+ -+#define BE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ -+ (BE_P2BYTE_TO_HOST_2BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen))) -+ -+#define BE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ -+ (BE_P1BYTE_TO_HOST_1BYTE(__pStart) & (~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen))) -+ -+/* -+* Set subfield of little-endian 4-byte value to specified value. -+*/ -+#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \ -+ do { \ -+ if (__BitOffset == 0 && __BitLen == 32) \ -+ WriteLE4Byte(__pStart, __Value); \ -+ else { \ -+ WriteLE4Byte(__pStart, \ -+ LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ -+ | \ -+ ((((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset)) \ -+ ); \ -+ } \ -+ } while (0) -+ -+#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \ -+ do { \ -+ if (__BitOffset == 0 && __BitLen == 16) \ -+ WriteLE2Byte(__pStart, __Value); \ -+ else { \ -+ WriteLE2Byte(__pStart, \ -+ LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ -+ | \ -+ ((((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset)) \ -+ ); \ -+ } \ -+ } while (0) -+ -+#define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \ -+ do { \ -+ if (__BitOffset == 0 && __BitLen == 8) \ -+ WriteLE1Byte(__pStart, __Value); \ -+ else { \ -+ WriteLE1Byte(__pStart, \ -+ LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ -+ | \ -+ ((((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset)) \ -+ ); \ -+ } \ -+ } while (0) -+ -+/* -+* Set subfield of big-endian 4-byte value to specified value. -+*/ -+#define SET_BITS_TO_BE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \ -+ do { \ -+ if (__BitOffset == 0 && __BitLen == 32) \ -+ WriteBE4Byte(__pStart, __Value); \ -+ else { \ -+ WriteBE4Byte(__pStart, \ -+ BE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ -+ | \ -+ ((((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset)) \ -+ ); \ -+ } \ -+ } while (0) -+ -+#define SET_BITS_TO_BE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \ -+ do { \ -+ if (__BitOffset == 0 && __BitLen == 16) \ -+ WriteBE2Byte(__pStart, __Value); \ -+ else { \ -+ WriteBE2Byte(__pStart, \ -+ BE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ -+ | \ -+ ((((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset)) \ -+ ); \ -+ } \ -+ } while (0) -+ -+#define SET_BITS_TO_BE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \ -+ do { \ -+ if (__BitOffset == 0 && __BitLen == 8) \ -+ WriteBE1Byte(__pStart, __Value); \ -+ else { \ -+ WriteBE1Byte(__pStart, \ -+ BE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ -+ | \ -+ ((((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset)) \ -+ ); \ -+ } \ -+ } while (0) -+ -+/* Get the N-bytes aligment offset from the current length */ -+#define N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment)) -+ -+typedef unsigned char BOOLEAN, *PBOOLEAN, boolean; -+ -+#define TEST_FLAG(__Flag, __testFlag) (((__Flag) & (__testFlag)) != 0) -+#define SET_FLAG(__Flag, __setFlag) ((__Flag) |= __setFlag) -+#define CLEAR_FLAG(__Flag, __clearFlag) ((__Flag) &= ~(__clearFlag)) -+#define CLEAR_FLAGS(__Flag) ((__Flag) = 0) -+#define TEST_FLAGS(__Flag, __testFlags) (((__Flag) & (__testFlags)) == (__testFlags)) -+ -+#endif /* __BASIC_TYPES_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/byteorder/big_endian.h b/drivers/staging/rtl8723cs/include/byteorder/big_endian.h -new file mode 100644 -index 000000000000..6b1dc449e578 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/byteorder/big_endian.h -@@ -0,0 +1,82 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H -+#define _LINUX_BYTEORDER_BIG_ENDIAN_H -+ -+#ifndef __BIG_ENDIAN -+ #define __BIG_ENDIAN 4321 -+#endif -+#ifndef __BIG_ENDIAN_BITFIELD -+ #define __BIG_ENDIAN_BITFIELD -+#endif -+ -+#include -+ -+#define __constant_htonl(x) ((__u32)(x)) -+#define __constant_ntohl(x) ((__u32)(x)) -+#define __constant_htons(x) ((__u16)(x)) -+#define __constant_ntohs(x) ((__u16)(x)) -+#define __constant_cpu_to_le64(x) ___constant_swab64((x)) -+#define __constant_le64_to_cpu(x) ___constant_swab64((x)) -+#define __constant_cpu_to_le32(x) ___constant_swab32((x)) -+#define __constant_le32_to_cpu(x) ___constant_swab32((x)) -+#define __constant_cpu_to_le16(x) ___constant_swab16((x)) -+#define __constant_le16_to_cpu(x) ___constant_swab16((x)) -+#define __constant_cpu_to_be64(x) ((__u64)(x)) -+#define __constant_be64_to_cpu(x) ((__u64)(x)) -+#define __constant_cpu_to_be32(x) ((__u32)(x)) -+#define __constant_be32_to_cpu(x) ((__u32)(x)) -+#define __constant_cpu_to_be16(x) ((__u16)(x)) -+#define __constant_be16_to_cpu(x) ((__u16)(x)) -+#define __cpu_to_le64(x) __swab64((x)) -+#define __le64_to_cpu(x) __swab64((x)) -+#define __cpu_to_le32(x) __swab32((x)) -+#define __le32_to_cpu(x) __swab32((x)) -+#define __cpu_to_le16(x) __swab16((x)) -+#define __le16_to_cpu(x) __swab16((x)) -+#define __cpu_to_be64(x) ((__u64)(x)) -+#define __be64_to_cpu(x) ((__u64)(x)) -+#define __cpu_to_be32(x) ((__u32)(x)) -+#define __be32_to_cpu(x) ((__u32)(x)) -+#define __cpu_to_be16(x) ((__u16)(x)) -+#define __be16_to_cpu(x) ((__u16)(x)) -+#define __cpu_to_le64p(x) __swab64p((x)) -+#define __le64_to_cpup(x) __swab64p((x)) -+#define __cpu_to_le32p(x) __swab32p((x)) -+#define __le32_to_cpup(x) __swab32p((x)) -+#define __cpu_to_le16p(x) __swab16p((x)) -+#define __le16_to_cpup(x) __swab16p((x)) -+#define __cpu_to_be64p(x) (*(__u64 *)(x)) -+#define __be64_to_cpup(x) (*(__u64 *)(x)) -+#define __cpu_to_be32p(x) (*(__u32 *)(x)) -+#define __be32_to_cpup(x) (*(__u32 *)(x)) -+#define __cpu_to_be16p(x) (*(__u16 *)(x)) -+#define __be16_to_cpup(x) (*(__u16 *)(x)) -+#define __cpu_to_le64s(x) __swab64s((x)) -+#define __le64_to_cpus(x) __swab64s((x)) -+#define __cpu_to_le32s(x) __swab32s((x)) -+#define __le32_to_cpus(x) __swab32s((x)) -+#define __cpu_to_le16s(x) __swab16s((x)) -+#define __le16_to_cpus(x) __swab16s((x)) -+#define __cpu_to_be64s(x) do {} while (0) -+#define __be64_to_cpus(x) do {} while (0) -+#define __cpu_to_be32s(x) do {} while (0) -+#define __be32_to_cpus(x) do {} while (0) -+#define __cpu_to_be16s(x) do {} while (0) -+#define __be16_to_cpus(x) do {} while (0) -+ -+#include -+ -+#endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */ -diff --git a/drivers/staging/rtl8723cs/include/byteorder/generic.h b/drivers/staging/rtl8723cs/include/byteorder/generic.h -new file mode 100644 -index 000000000000..f85114bf796c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/byteorder/generic.h -@@ -0,0 +1,207 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _LINUX_BYTEORDER_GENERIC_H -+#define _LINUX_BYTEORDER_GENERIC_H -+ -+/* -+ * linux/byteorder_generic.h -+ * Generic Byte-reordering support -+ * -+ * Francois-Rene Rideau 19970707 -+ * gathered all the good ideas from all asm-foo/byteorder.h into one file, -+ * cleaned them up. -+ * I hope it is compliant with non-GCC compilers. -+ * I decided to put __BYTEORDER_HAS_U64__ in byteorder.h, -+ * because I wasn't sure it would be ok to put it in types.h -+ * Upgraded it to 2.1.43 -+ * Francois-Rene Rideau 19971012 -+ * Upgraded it to 2.1.57 -+ * to please Linus T., replaced huge #ifdef's between little/big endian -+ * by nestedly #include'd files. -+ * Francois-Rene Rideau 19971205 -+ * Made it to 2.1.71; now a facelift: -+ * Put files under include/linux/byteorder/ -+ * Split swab from generic support. -+ * -+ * TODO: -+ * = Regular kernel maintainers could also replace all these manual -+ * byteswap macros that remain, disseminated among drivers, -+ * after some grep or the sources... -+ * = Linus might want to rename all these macros and files to fit his taste, -+ * to fit his personal naming scheme. -+ * = it seems that a few drivers would also appreciate -+ * nybble swapping support... -+ * = every architecture could add their byteswap macro in asm/byteorder.h -+ * see how some architectures already do (i386, alpha, ppc, etc) -+ * = cpu_to_beXX and beXX_to_cpu might some day need to be well -+ * distinguished throughout the kernel. This is not the case currently, -+ * since little endian, big endian, and pdp endian machines needn't it. -+ * But this might be the case for, say, a port of Linux to 20/21 bit -+ * architectures (and F21 Linux addict around?). -+ */ -+ -+/* -+ * The following macros are to be defined by : -+ * -+ * Conversion of long and short int between network and host format -+ * ntohl(__u32 x) -+ * ntohs(__u16 x) -+ * htonl(__u32 x) -+ * htons(__u16 x) -+ * It seems that some programs (which? where? or perhaps a standard? POSIX?) -+ * might like the above to be functions, not macros (why?). -+ * if that's true, then detect them, and take measures. -+ * Anyway, the measure is: define only ___ntohl as a macro instead, -+ * and in a separate file, have -+ * unsigned long inline ntohl(x){return ___ntohl(x);} -+ * -+ * The same for constant arguments -+ * __constant_ntohl(__u32 x) -+ * __constant_ntohs(__u16 x) -+ * __constant_htonl(__u32 x) -+ * __constant_htons(__u16 x) -+ * -+ * Conversion of XX-bit integers (16- 32- or 64-) -+ * between native CPU format and little/big endian format -+ * 64-bit stuff only defined for proper architectures -+ * cpu_to_[bl]eXX(__uXX x) -+ * [bl]eXX_to_cpu(__uXX x) -+ * -+ * The same, but takes a pointer to the value to convert -+ * cpu_to_[bl]eXXp(__uXX x) -+ * [bl]eXX_to_cpup(__uXX x) -+ * -+ * The same, but change in situ -+ * cpu_to_[bl]eXXs(__uXX x) -+ * [bl]eXX_to_cpus(__uXX x) -+ * -+ * See asm-foo/byteorder.h for examples of how to provide -+ * architecture-optimized versions -+ * -+ */ -+ -+ -+#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL) || defined(PLATFORM_FREEBSD) -+ /* -+ * inside the kernel, we can use nicknames; -+ * outside of it, we must avoid POSIX namespace pollution... -+ */ -+ #define cpu_to_le64 __cpu_to_le64 -+ #define le64_to_cpu __le64_to_cpu -+ #define cpu_to_le32 __cpu_to_le32 -+ #define le32_to_cpu __le32_to_cpu -+ #define cpu_to_le16 __cpu_to_le16 -+ #define le16_to_cpu __le16_to_cpu -+ #define cpu_to_be64 __cpu_to_be64 -+ #define be64_to_cpu __be64_to_cpu -+ #define cpu_to_be32 __cpu_to_be32 -+ #define be32_to_cpu __be32_to_cpu -+ #define cpu_to_be16 __cpu_to_be16 -+ #define be16_to_cpu __be16_to_cpu -+ #define cpu_to_le64p __cpu_to_le64p -+ #define le64_to_cpup __le64_to_cpup -+ #define cpu_to_le32p __cpu_to_le32p -+ #define le32_to_cpup __le32_to_cpup -+ #define cpu_to_le16p __cpu_to_le16p -+ #define le16_to_cpup __le16_to_cpup -+ #define cpu_to_be64p __cpu_to_be64p -+ #define be64_to_cpup __be64_to_cpup -+ #define cpu_to_be32p __cpu_to_be32p -+ #define be32_to_cpup __be32_to_cpup -+ #define cpu_to_be16p __cpu_to_be16p -+ #define be16_to_cpup __be16_to_cpup -+ #define cpu_to_le64s __cpu_to_le64s -+ #define le64_to_cpus __le64_to_cpus -+ #define cpu_to_le32s __cpu_to_le32s -+ #define le32_to_cpus __le32_to_cpus -+ #define cpu_to_le16s __cpu_to_le16s -+ #define le16_to_cpus __le16_to_cpus -+ #define cpu_to_be64s __cpu_to_be64s -+ #define be64_to_cpus __be64_to_cpus -+ #define cpu_to_be32s __cpu_to_be32s -+ #define be32_to_cpus __be32_to_cpus -+ #define cpu_to_be16s __cpu_to_be16s -+ #define be16_to_cpus __be16_to_cpus -+#endif -+ -+ -+/* -+ * Handle ntohl and suches. These have various compatibility -+ * issues - like we want to give the prototype even though we -+ * also have a macro for them in case some strange program -+ * wants to take the address of the thing or something.. -+ * -+ * Note that these used to return a "long" in libc5, even though -+ * long is often 64-bit these days.. Thus the casts. -+ * -+ * They have to be macros in order to do the constant folding -+ * correctly - if the argument passed into a inline function -+ * it is no longer constant according to gcc.. -+ */ -+ -+#undef ntohl -+#undef ntohs -+#undef htonl -+#undef htons -+ -+/* -+ * Do the prototypes. Somebody might want to take the -+ * address or some such sick thing.. -+ */ -+#if defined(PLATFORM_LINUX) || (defined(__GLIBC__) && __GLIBC__ >= 2) -+ extern __u32 ntohl(__u32); -+ extern __u32 htonl(__u32); -+#else /* defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2) */ -+ #ifndef PLATFORM_FREEBSD -+ extern unsigned long int ntohl(unsigned long int); -+ extern unsigned long int htonl(unsigned long int); -+ #endif -+#endif -+#ifndef PLATFORM_FREEBSD -+ extern unsigned short int ntohs(unsigned short int); -+ extern unsigned short int htons(unsigned short int); -+#endif -+ -+#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) || defined(PLATFORM_MPIXEL) -+ -+ #define ___htonl(x) __cpu_to_be32(x) -+ #define ___htons(x) __cpu_to_be16(x) -+ #define ___ntohl(x) __be32_to_cpu(x) -+ #define ___ntohs(x) __be16_to_cpu(x) -+ -+ #if defined(PLATFORM_LINUX) || (defined(__GLIBC__) && __GLIBC__ >= 2) -+ #define htonl(x) ___htonl(x) -+ #define ntohl(x) ___ntohl(x) -+ #else -+ #define htonl(x) ((unsigned long)___htonl(x)) -+ #define ntohl(x) ((unsigned long)___ntohl(x)) -+ #endif -+ #define htons(x) ___htons(x) -+ #define ntohs(x) ___ntohs(x) -+ -+#endif /* OPTIMIZE */ -+ -+ -+#if defined(PLATFORM_WINDOWS) -+ -+ #define htonl(x) __cpu_to_be32(x) -+ #define ntohl(x) __be32_to_cpu(x) -+ #define htons(x) __cpu_to_be16(x) -+ #define ntohs(x) __be16_to_cpu(x) -+ -+ -+#endif -+ -+#endif /* _LINUX_BYTEORDER_GENERIC_H */ -diff --git a/drivers/staging/rtl8723cs/include/byteorder/little_endian.h b/drivers/staging/rtl8723cs/include/byteorder/little_endian.h -new file mode 100644 -index 000000000000..c4b64512f296 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/byteorder/little_endian.h -@@ -0,0 +1,84 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H -+#define _LINUX_BYTEORDER_LITTLE_ENDIAN_H -+ -+#ifndef __LITTLE_ENDIAN -+ #define __LITTLE_ENDIAN 1234 -+#endif -+#ifndef __LITTLE_ENDIAN_BITFIELD -+ #define __LITTLE_ENDIAN_BITFIELD -+#endif -+ -+#include -+ -+#ifndef __constant_htonl -+ #define __constant_htonl(x) ___constant_swab32((x)) -+ #define __constant_ntohl(x) ___constant_swab32((x)) -+ #define __constant_htons(x) ___constant_swab16((x)) -+ #define __constant_ntohs(x) ___constant_swab16((x)) -+ #define __constant_cpu_to_le64(x) ((__u64)(x)) -+ #define __constant_le64_to_cpu(x) ((__u64)(x)) -+ #define __constant_cpu_to_le32(x) ((__u32)(x)) -+ #define __constant_le32_to_cpu(x) ((__u32)(x)) -+ #define __constant_cpu_to_le16(x) ((__u16)(x)) -+ #define __constant_le16_to_cpu(x) ((__u16)(x)) -+ #define __constant_cpu_to_be64(x) ___constant_swab64((x)) -+ #define __constant_be64_to_cpu(x) ___constant_swab64((x)) -+ #define __constant_cpu_to_be32(x) ___constant_swab32((x)) -+ #define __constant_be32_to_cpu(x) ___constant_swab32((x)) -+ #define __constant_cpu_to_be16(x) ___constant_swab16((x)) -+ #define __constant_be16_to_cpu(x) ___constant_swab16((x)) -+ #define __cpu_to_le64(x) ((__u64)(x)) -+ #define __le64_to_cpu(x) ((__u64)(x)) -+ #define __cpu_to_le32(x) ((__u32)(x)) -+ #define __le32_to_cpu(x) ((__u32)(x)) -+ #define __cpu_to_le16(x) ((__u16)(x)) -+ #define __le16_to_cpu(x) ((__u16)(x)) -+ #define __cpu_to_be64(x) __swab64((x)) -+ #define __be64_to_cpu(x) __swab64((x)) -+ #define __cpu_to_be32(x) __swab32((x)) -+ #define __be32_to_cpu(x) __swab32((x)) -+ #define __cpu_to_be16(x) __swab16((x)) -+ #define __be16_to_cpu(x) __swab16((x)) -+ #define __cpu_to_le64p(x) (*(__u64 *)(x)) -+ #define __le64_to_cpup(x) (*(__u64 *)(x)) -+ #define __cpu_to_le32p(x) (*(__u32 *)(x)) -+ #define __le32_to_cpup(x) (*(__u32 *)(x)) -+ #define __cpu_to_le16p(x) (*(__u16 *)(x)) -+ #define __le16_to_cpup(x) (*(__u16 *)(x)) -+ #define __cpu_to_be64p(x) __swab64p((x)) -+ #define __be64_to_cpup(x) __swab64p((x)) -+ #define __cpu_to_be32p(x) __swab32p((x)) -+ #define __be32_to_cpup(x) __swab32p((x)) -+ #define __cpu_to_be16p(x) __swab16p((x)) -+ #define __be16_to_cpup(x) __swab16p((x)) -+ #define __cpu_to_le64s(x) do {} while (0) -+ #define __le64_to_cpus(x) do {} while (0) -+ #define __cpu_to_le32s(x) do {} while (0) -+ #define __le32_to_cpus(x) do {} while (0) -+ #define __cpu_to_le16s(x) do {} while (0) -+ #define __le16_to_cpus(x) do {} while (0) -+ #define __cpu_to_be64s(x) __swab64s((x)) -+ #define __be64_to_cpus(x) __swab64s((x)) -+ #define __cpu_to_be32s(x) __swab32s((x)) -+ #define __be32_to_cpus(x) __swab32s((x)) -+ #define __cpu_to_be16s(x) __swab16s((x)) -+ #define __be16_to_cpus(x) __swab16s((x)) -+#endif /* __constant_htonl */ -+ -+#include -+ -+#endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */ -diff --git a/drivers/staging/rtl8723cs/include/byteorder/swab.h b/drivers/staging/rtl8723cs/include/byteorder/swab.h -new file mode 100644 -index 000000000000..a8dd46bd3a60 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/byteorder/swab.h -@@ -0,0 +1,136 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _LINUX_BYTEORDER_SWAB_H -+#define _LINUX_BYTEORDER_SWAB_H -+ -+#if !defined(CONFIG_PLATFORM_MSTAR) -+#ifndef __u16 -+ typedef unsigned short __u16; -+#endif -+ -+#ifndef __u32 -+ typedef unsigned int __u32; -+#endif -+ -+#ifndef __u8 -+ typedef unsigned char __u8; -+#endif -+ -+#ifndef __u64 -+ typedef unsigned long long __u64; -+#endif -+ -+ -+__inline static __u16 ___swab16(__u16 x) -+{ -+ __u16 __x = x; -+ return -+ (__u16)( -+ (((__u16)(__x)&(__u16)0x00ffU) << 8) | -+ (((__u16)(__x)&(__u16)0xff00U) >> 8)); -+ -+} -+ -+__inline static __u32 ___swab32(__u32 x) -+{ -+ __u32 __x = (x); -+ return (__u32)( -+ (((__u32)(__x)&(__u32)0x000000ffUL) << 24) | -+ (((__u32)(__x)&(__u32)0x0000ff00UL) << 8) | -+ (((__u32)(__x)&(__u32)0x00ff0000UL) >> 8) | -+ (((__u32)(__x)&(__u32)0xff000000UL) >> 24)); -+} -+ -+__inline static __u64 ___swab64(__u64 x) -+{ -+ __u64 __x = (x); -+ -+ return -+ (__u64)(\ -+ (__u64)(((__u64)(__x)&(__u64)0x00000000000000ffULL) << 56) | \ -+ (__u64)(((__u64)(__x)&(__u64)0x000000000000ff00ULL) << 40) | \ -+ (__u64)(((__u64)(__x)&(__u64)0x0000000000ff0000ULL) << 24) | \ -+ (__u64)(((__u64)(__x)&(__u64)0x00000000ff000000ULL) << 8) | \ -+ (__u64)(((__u64)(__x)&(__u64)0x000000ff00000000ULL) >> 8) | \ -+ (__u64)(((__u64)(__x)&(__u64)0x0000ff0000000000ULL) >> 24) | \ -+ (__u64)(((__u64)(__x)&(__u64)0x00ff000000000000ULL) >> 40) | \ -+ (__u64)(((__u64)(__x)&(__u64)0xff00000000000000ULL) >> 56)); -+ \ -+} -+#endif /* CONFIG_PLATFORM_MSTAR */ -+ -+#ifndef __arch__swab16 -+__inline static __u16 __arch__swab16(__u16 x) -+{ -+ return ___swab16(x); -+} -+ -+#endif -+ -+#ifndef __arch__swab32 -+__inline static __u32 __arch__swab32(__u32 x) -+{ -+ __u32 __tmp = (x) ; -+ return ___swab32(__tmp); -+} -+#endif -+ -+#ifndef __arch__swab64 -+ -+__inline static __u64 __arch__swab64(__u64 x) -+{ -+ __u64 __tmp = (x) ; -+ return ___swab64(__tmp); -+} -+ -+ -+#endif -+ -+#ifndef __swab16 -+ #define __swab16(x) __fswab16(x) -+ #define __swab32(x) __fswab32(x) -+ #define __swab64(x) __fswab64(x) -+#endif /* __swab16 */ -+ -+#ifdef PLATFORM_FREEBSD -+ __inline static __u16 __fswab16(__u16 x) -+#else -+ __inline static const __u16 __fswab16(__u16 x) -+#endif /* PLATFORM_FREEBSD */ -+{ -+ return __arch__swab16(x); -+} -+#ifdef PLATFORM_FREEBSD -+ __inline static __u32 __fswab32(__u32 x) -+#else -+ __inline static const __u32 __fswab32(__u32 x) -+#endif /* PLATFORM_FREEBSD */ -+{ -+ return __arch__swab32(x); -+} -+ -+#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) -+ #define swab16 __swab16 -+ #define swab32 __swab32 -+ #define swab64 __swab64 -+ #define swab16p __swab16p -+ #define swab32p __swab32p -+ #define swab64p __swab64p -+ #define swab16s __swab16s -+ #define swab32s __swab32s -+ #define swab64s __swab64s -+#endif -+ -+#endif /* _LINUX_BYTEORDER_SWAB_H */ -diff --git a/drivers/staging/rtl8723cs/include/byteorder/swabb.h b/drivers/staging/rtl8723cs/include/byteorder/swabb.h -new file mode 100644 -index 000000000000..634519a0b826 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/byteorder/swabb.h -@@ -0,0 +1,151 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _LINUX_BYTEORDER_SWABB_H -+#define _LINUX_BYTEORDER_SWABB_H -+ -+/* -+ * linux/byteorder/swabb.h -+ * SWAp Bytes Bizarrely -+ * swaHHXX[ps]?(foo) -+ * -+ * Support for obNUXIous pdp-endian and other bizarre architectures. -+ * Will Linux ever run on such ancient beasts? if not, this file -+ * will be but a programming pearl. Still, it's a reminder that we -+ * shouldn't be making too many assumptions when trying to be portable. -+ * -+ */ -+ -+/* -+ * Meaning of the names I chose (vaxlinux people feel free to correct them): -+ * swahw32 swap 16-bit half-words in a 32-bit word -+ * swahb32 swap 8-bit halves of each 16-bit half-word in a 32-bit word -+ * -+ * No 64-bit support yet. I don't know NUXI conventions for long longs. -+ * I guarantee it will be a mess when it's there, though :-> -+ * It will be even worse if there are conflicting 64-bit conventions. -+ * Hopefully, no one ever used 64-bit objects on NUXI machines. -+ * -+ */ -+ -+#define ___swahw32(x) \ -+ ({ \ -+ __u32 __x = (x); \ -+ ((__u32)(\ -+ (((__u32)(__x) & (__u32)0x0000ffffUL) << 16) | \ -+ (((__u32)(__x) & (__u32)0xffff0000UL) >> 16))); \ -+ }) -+#define ___swahb32(x) \ -+ ({ \ -+ __u32 __x = (x); \ -+ ((__u32)(\ -+ (((__u32)(__x) & (__u32)0x00ff00ffUL) << 8) | \ -+ (((__u32)(__x) & (__u32)0xff00ff00UL) >> 8))); \ -+ }) -+ -+#define ___constant_swahw32(x) \ -+ ((__u32)(\ -+ (((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \ -+ (((__u32)(x) & (__u32)0xffff0000UL) >> 16))) -+#define ___constant_swahb32(x) \ -+ ((__u32)(\ -+ (((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \ -+ (((__u32)(x) & (__u32)0xff00ff00UL) >> 8))) -+ -+/* -+ * provide defaults when no architecture-specific optimization is detected -+ */ -+#ifndef __arch__swahw32 -+ #define __arch__swahw32(x) ___swahw32(x) -+#endif -+#ifndef __arch__swahb32 -+ #define __arch__swahb32(x) ___swahb32(x) -+#endif -+ -+#ifndef __arch__swahw32p -+ #define __arch__swahw32p(x) __swahw32(*(x)) -+#endif -+#ifndef __arch__swahb32p -+ #define __arch__swahb32p(x) __swahb32(*(x)) -+#endif -+ -+#ifndef __arch__swahw32s -+ #define __arch__swahw32s(x) do { *(x) = __swahw32p((x)); } while (0) -+#endif -+#ifndef __arch__swahb32s -+ #define __arch__swahb32s(x) do { *(x) = __swahb32p((x)); } while (0) -+#endif -+ -+ -+/* -+ * Allow constant folding -+ */ -+#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) -+# define __swahw32(x) \ -+ (__builtin_constant_p((__u32)(x)) ? \ -+ ___swahw32((x)) : \ -+ __fswahw32((x))) -+# define __swahb32(x) \ -+ (__builtin_constant_p((__u32)(x)) ? \ -+ ___swahb32((x)) : \ -+ __fswahb32((x))) -+#else -+# define __swahw32(x) __fswahw32(x) -+# define __swahb32(x) __fswahb32(x) -+#endif /* OPTIMIZE */ -+ -+ -+__inline static__ __const__ __u32 __fswahw32(__u32 x) -+{ -+ return __arch__swahw32(x); -+} -+__inline static__ __u32 __swahw32p(__u32 *x) -+{ -+ return __arch__swahw32p(x); -+} -+__inline static__ void __swahw32s(__u32 *addr) -+{ -+ __arch__swahw32s(addr); -+} -+ -+ -+__inline static__ __const__ __u32 __fswahb32(__u32 x) -+{ -+ return __arch__swahb32(x); -+} -+__inline static__ __u32 __swahb32p(__u32 *x) -+{ -+ return __arch__swahb32p(x); -+} -+__inline static__ void __swahb32s(__u32 *addr) -+{ -+ __arch__swahb32s(addr); -+} -+ -+#ifdef __BYTEORDER_HAS_U64__ -+ /* -+ * Not supported yet -+ */ -+#endif /* __BYTEORDER_HAS_U64__ */ -+ -+#if defined(PLATFORM_LINUX) -+ #define swahw32 __swahw32 -+ #define swahb32 __swahb32 -+ #define swahw32p __swahw32p -+ #define swahb32p __swahb32p -+ #define swahw32s __swahw32s -+ #define swahb32s __swahb32s -+#endif -+ -+#endif /* _LINUX_BYTEORDER_SWABB_H */ -diff --git a/drivers/staging/rtl8723cs/include/circ_buf.h b/drivers/staging/rtl8723cs/include/circ_buf.h -new file mode 100644 -index 000000000000..7a5b8ef1a202 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/circ_buf.h -@@ -0,0 +1,23 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __CIRC_BUF_H_ -+#define __CIRC_BUF_H_ 1 -+ -+#define CIRC_CNT(head,tail,size) (((head) - (tail)) & ((size)-1)) -+ -+#define CIRC_SPACE(head,tail,size) CIRC_CNT((tail),((head)+1),(size)) -+ -+#endif //_CIRC_BUF_H_ -+ -diff --git a/drivers/staging/rtl8723cs/include/cmd_osdep.h b/drivers/staging/rtl8723cs/include/cmd_osdep.h -new file mode 100644 -index 000000000000..e4ba2b6d3b62 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/cmd_osdep.h -@@ -0,0 +1,26 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __CMD_OSDEP_H_ -+#define __CMD_OSDEP_H_ -+ -+ -+extern sint _rtw_init_cmd_priv(struct cmd_priv *pcmdpriv); -+extern sint _rtw_init_evt_priv(struct evt_priv *pevtpriv); -+extern void _rtw_free_evt_priv(struct evt_priv *pevtpriv); -+extern void _rtw_free_cmd_priv(struct cmd_priv *pcmdpriv); -+extern sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj, bool to_head); -+extern struct cmd_obj *_rtw_dequeue_cmd(_queue *queue); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/cmn_info/rtw_sta_info.h b/drivers/staging/rtl8723cs/include/cmn_info/rtw_sta_info.h -new file mode 100644 -index 000000000000..d4de0e50be23 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/cmn_info/rtw_sta_info.h -@@ -0,0 +1,279 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+ -+ /*This header file is for all driver teams to use the same station info. -+If you want to change this file please make sure notify all driver teams maintainers.*/ -+ -+/*Created by YuChen 20170301*/ -+ -+#ifndef __INC_RTW_STA_INFO_H -+#define __INC_RTW_STA_INFO_H -+ -+/*--------------------Define ---------------------------------------*/ -+ -+#define STA_DM_CTRL_ACTIVE BIT(0) -+#define STA_DM_CTRL_CFO_TRACKING BIT(1) -+ -+#ifdef CONFIG_BEAMFORMING -+#define BEAMFORMING_HT_BEAMFORMER_ENABLE BIT(0) /*Declare sta support beamformer*/ -+#define BEAMFORMING_HT_BEAMFORMEE_ENABLE BIT(1) /*Declare sta support beamformee*/ -+#define BEAMFORMING_HT_BEAMFORMER_TEST BIT(2) /*Transmiting Beamforming no matter the target supports it or not*/ -+#define BEAMFORMING_HT_BEAMFORMER_STEER_NUM (BIT(4)|BIT(5)) /*Sta Bfer's capability*/ -+#define BEAMFORMING_HT_BEAMFORMEE_CHNL_EST_CAP (BIT(6)|BIT(7)) /*Sta BFee's capability*/ -+ -+#define BEAMFORMING_VHT_BEAMFORMER_ENABLE BIT(0) /*Declare sta support beamformer*/ -+#define BEAMFORMING_VHT_BEAMFORMEE_ENABLE BIT(1) /*Declare sta support beamformee*/ -+#define BEAMFORMING_VHT_MU_MIMO_AP_ENABLE BIT(2) /*Declare sta support MU beamformer*/ -+#define BEAMFORMING_VHT_MU_MIMO_STA_ENABLE BIT(3) /*Declare sta support MU beamformer*/ -+#define BEAMFORMING_VHT_BEAMFORMER_TEST BIT(4) /*Transmiting Beamforming no matter the target supports it or not*/ -+#define BEAMFORMING_VHT_BEAMFORMER_STS_CAP (BIT(8)|BIT(9)|BIT(10)) /*Sta BFee's capability*/ -+#define BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM (BIT(12)|BIT(13)|BIT(14)) /*Sta Bfer's capability*/ -+#endif -+ -+#define HT_STBC_EN BIT(0) -+#define VHT_STBC_EN BIT(1) -+ -+#define HT_LDPC_EN BIT(0) -+#define VHT_LDPC_EN BIT(1) -+ -+#define SM_PS_STATIC 0 -+#define SM_PS_DYNAMIC 1 -+#define SM_PS_INVALID 2 -+#define SM_PS_DISABLE 3 -+ -+ -+/*cmn_sta_info.ra_sta_info.txrx_state*/ -+#define TX_STATE 0 -+#define RX_STATE 1 -+#define BI_DIRECTION_STATE 2 -+ -+/*--------------------Define Enum-----------------------------------*/ -+enum channel_width { -+ CHANNEL_WIDTH_20 = 0, -+ CHANNEL_WIDTH_40 = 1, -+ CHANNEL_WIDTH_80 = 2, -+ CHANNEL_WIDTH_160 = 3, -+ CHANNEL_WIDTH_80_80 = 4, -+ CHANNEL_WIDTH_5 = 5, -+ CHANNEL_WIDTH_10 = 6, -+ CHANNEL_WIDTH_MAX = 7, -+}; -+ -+enum rf_type { -+ RF_1T1R = 0, -+ RF_1T2R = 1, -+ RF_2T2R = 2, -+ RF_2T3R = 3, -+ RF_2T4R = 4, -+ RF_3T3R = 5, -+ RF_3T4R = 6, -+ RF_4T4R = 7, -+ RF_4T3R = 8, -+ RF_4T2R = 9, -+ RF_4T1R = 10, -+ RF_3T2R = 11, -+ RF_3T1R = 12, -+ RF_2T1R = 13, -+ RF_1T4R = 14, -+ RF_1T3R = 15, -+ RF_TYPE_MAX, -+}; -+ -+enum bb_path { -+ BB_PATH_NON = 0, -+ BB_PATH_A = 0x00000001, -+ BB_PATH_B = 0x00000002, -+ BB_PATH_C = 0x00000004, -+ BB_PATH_D = 0x00000008, -+ -+ BB_PATH_AB = (BB_PATH_A | BB_PATH_B), -+ BB_PATH_AC = (BB_PATH_A | BB_PATH_C), -+ BB_PATH_AD = (BB_PATH_A | BB_PATH_D), -+ BB_PATH_BC = (BB_PATH_B | BB_PATH_C), -+ BB_PATH_BD = (BB_PATH_B | BB_PATH_D), -+ BB_PATH_CD = (BB_PATH_C | BB_PATH_D), -+ -+ BB_PATH_ABC = (BB_PATH_A | BB_PATH_B | BB_PATH_C), -+ BB_PATH_ABD = (BB_PATH_A | BB_PATH_B | BB_PATH_D), -+ BB_PATH_ACD = (BB_PATH_A | BB_PATH_C | BB_PATH_D), -+ BB_PATH_BCD = (BB_PATH_B | BB_PATH_C | BB_PATH_D), -+ -+ BB_PATH_ABCD = (BB_PATH_A | BB_PATH_B | BB_PATH_C | BB_PATH_D), -+ BB_PATH_AUTO = 0xff /*for path diversity*/ -+}; -+ -+enum rf_path { -+ RF_PATH_A = 0, -+ RF_PATH_B = 1, -+ RF_PATH_C = 2, -+ RF_PATH_D = 3, -+ RF_PATH_AB, -+ RF_PATH_AC, -+ RF_PATH_AD, -+ RF_PATH_BC, -+ RF_PATH_BD, -+ RF_PATH_CD, -+ RF_PATH_ABC, -+ RF_PATH_ABD, -+ RF_PATH_ACD, -+ RF_PATH_BCD, -+ RF_PATH_ABCD, -+}; -+ -+enum rf_syn { -+ RF_SYN0 = 0, -+ RF_SYN1 = 1, -+}; -+ -+enum rfc_mode { -+ rfc_4x4 = 0, -+ rfc_2x2 = 1, -+}; -+ -+enum wireless_set { -+ WIRELESS_CCK = 0x00000001, -+ WIRELESS_OFDM = 0x00000002, -+ WIRELESS_HT = 0x00000004, -+ WIRELESS_VHT = 0x00000008, -+}; -+ -+/*--------------------Define MACRO---------------------------------*/ -+ -+/*--------------------Define Struct-----------------------------------*/ -+ -+#ifdef CONFIG_BEAMFORMING -+struct bf_cmn_info { -+ u8 ht_beamform_cap; /*Sta capablity*/ -+ u16 vht_beamform_cap; /*Sta capablity*/ -+ u16 p_aid; -+ u8 g_id; -+}; -+#endif -+struct rssi_info { -+ s8 rssi; -+ s8 rssi_cck; -+ s8 rssi_ofdm; -+ u8 packet_map; -+ u8 ofdm_pkt_cnt; -+ u8 cck_pkt_cnt; -+ u16 cck_sum_power; -+ u8 is_send_rssi; -+ u8 valid_bit; -+ s16 rssi_acc; /*accumulate RSSI for per packet MA sum*/ -+}; -+ -+struct ra_sta_info { -+ u8 rate_id; /*[PHYDM] ratr_idx*/ -+ u8 rssi_level; /*[PHYDM]*/ -+ u8 is_first_connect:1; /*[PHYDM] CE: ra_rpt_linked, AP: H2C_rssi_rpt*/ -+ u8 is_support_sgi:1; /*[driver]*/ -+ u8 is_vht_enable:2; /*[driver]*/ -+ u8 disable_ra:1; /*[driver]*/ -+ u8 disable_pt:1; /*[driver] remove is_disable_power_training*/ -+ u8 txrx_state:2; /*[PHYDM] 0: Tx, 1:Rx, 2:bi-direction*/ -+ u8 is_noisy:1; /*[PHYDM]*/ -+ u8 curr_tx_rate; /*[PHYDM] FW->Driver*/ -+ enum channel_width ra_bw_mode; /*[Driver] max bandwidth, for RA only*/ -+ enum channel_width curr_tx_bw; /*[PHYDM] FW->Driver*/ -+ u8 curr_retry_ratio; /*[PHYDM] FW->Driver*/ -+ u64 ramask; -+}; -+ -+struct dtp_info { -+ u8 dyn_tx_power; /*Dynamic Tx power offset*/ -+ u8 last_tx_power; -+ boolean sta_is_alive; -+ u8 sta_tx_high_power_lvl:4; -+ u8 sta_last_dtp_lvl:4; -+}; -+ -+struct cmn_sta_info { -+ u16 dm_ctrl; /*[Driver]*/ -+ enum channel_width bw_mode; /*[Driver] max support BW*/ -+ u8 mac_id; /*[Driver]*/ -+ u8 mac_addr[6]; /*[Driver]*/ -+ u16 aid; /*[Driver]*/ -+ enum rf_type mimo_type; /*[Driver] sta XTXR*/ -+ struct rssi_info rssi_stat; /*[PHYDM]*/ -+ struct ra_sta_info ra_info; /*[Driver&PHYDM]*/ -+ u16 tx_moving_average_tp; /*[Driver] tx average MBps*/ -+ u16 rx_moving_average_tp; /*[Driver] rx average MBps*/ -+ u8 stbc_en:2; /*[Driver] really transmitt STBC*/ -+ u8 ldpc_en:2; /*[Driver] really transmitt LDPC*/ -+ enum wireless_set support_wireless_set;/*[Driver]*/ -+#ifdef CONFIG_BEAMFORMING -+ struct bf_cmn_info bf_info; /*[Driver]*/ -+#endif -+ u8 sm_ps:2; /*[Driver]*/ -+ struct dtp_info dtp_stat; /*[PHYDM] Dynamic Tx power offset*/ -+ /*u8 pw2cca_over_TH_cnt;*/ -+ /*u8 total_pw2cca_cnt;*/ -+}; -+ -+struct phydm_phyinfo_fw_struct { -+ u8 rx_rssi[4]; /* RSSI in 0~100 index */ -+}; -+ -+struct phydm_phyinfo_struct { -+ boolean physts_rpt_valid; /* @if physts_rpt_valid is false, please ignore the parsing result in this structure*/ -+ u8 rx_pwdb_all; -+ u8 signal_quality; /* OFDM: signal_quality=rx_mimo_signal_quality[0], CCK: signal qualityin 0-100 index. */ -+ u8 rx_mimo_signal_strength[4]; /* RSSI in 0~100 index */ -+ s8 rx_mimo_signal_quality[4]; /* OFDM: per-path's EVM translate to 0~100% , no used for CCK*/ -+ u8 rx_mimo_evm_dbm[4]; /* per-path's original EVM (dbm) */ -+ s16 cfo_short[4]; /* per-path's cfo_short */ -+ s16 cfo_tail[4]; /* per-path's cfo_tail */ -+ s8 rx_power; /* in dBm Translate from PWdB */ -+ s8 recv_signal_power; /* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */ -+ u8 bt_rx_rssi_percentage; -+ u8 signal_strength; /* in 0-100 index. */ -+ s8 rx_pwr[4]; /* per-path's pwdb */ -+ s8 rx_snr[4]; /* per-path's SNR */ -+ u8 ant_idx[4]; /*per-path's antenna index*/ -+/*ODM_PHY_STATUS_NEW_TYPE_SUPPORT*/ -+ u8 rx_count:2; /* RX path counter---*/ -+ u8 band_width:3; -+ u8 rxsc:4; /* sub-channel---*/ -+ u8 channel; /* channel number---*/ -+ u8 is_mu_packet:1; /* is MU packet or not---boolean*/ -+ u8 is_beamformed:1; /* BF packet---boolean*/ -+ u8 cnt_pw2cca; -+ u8 cnt_cca2agc_rdy; -+/*ODM_PHY_STATUS_NEW_TYPE_SUPPORT*/ -+ u8 rx_cck_evm; -+}; -+ -+struct phydm_perpkt_info_struct { -+ u8 data_rate; -+ u8 station_id; -+ u8 is_cck_rate: 1; -+ u8 rate_ss:3; /*spatial stream of data rate*/ -+ u8 is_packet_match_bssid:1; /*boolean*/ -+ u8 is_packet_to_self:1; /*boolean*/ -+ u8 is_packet_beacon:1; /*boolean*/ -+ u8 is_to_self:1; /*boolean*/ -+ u8 ppdu_cnt; -+}; -+ -+/*--------------------Export global variable----------------------------*/ -+ -+/*--------------------Function declaration-----------------------------*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/custom_gpio.h b/drivers/staging/rtl8723cs/include/custom_gpio.h -new file mode 100644 -index 000000000000..3c67735d689a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/custom_gpio.h -@@ -0,0 +1,34 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __CUSTOM_GPIO_H__ -+#define __CUSTOM_GPIO_H___ -+ -+#include -+#include -+ -+typedef enum cust_gpio_modes { -+ WLAN_PWDN_ON, -+ WLAN_PWDN_OFF, -+ WLAN_POWER_ON, -+ WLAN_POWER_OFF, -+ WLAN_BT_PWDN_ON, -+ WLAN_BT_PWDN_OFF -+} cust_gpio_modes_t; -+ -+extern int rtw_wifi_gpio_init(void); -+extern int rtw_wifi_gpio_deinit(void); -+extern void rtw_wifi_gpio_wlan_ctrl(int onoff); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/drv_conf.h b/drivers/staging/rtl8723cs/include/drv_conf.h -new file mode 100644 -index 000000000000..5b528680380f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/drv_conf.h -@@ -0,0 +1,793 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __DRV_CONF_H__ -+#define __DRV_CONF_H__ -+#include "autoconf.h" -+#include "hal_ic_cfg.h" -+ -+#define CONFIG_RSSI_PRIORITY -+ -+/* -+ * RTW_BUSY_DENY_SCAN control if scan would be denied by busy traffic. -+ * When this defined, BUSY_TRAFFIC_SCAN_DENY_PERIOD would be used to judge if -+ * scan request coming from scan UI. Scan request from scan UI would be -+ * exception and never be denied by busy traffic. -+ */ -+#define RTW_BUSY_DENY_SCAN -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ #ifndef CONFIG_AP -+ #define CONFIG_AP -+ #endif -+ #ifndef CONFIG_CONCURRENT_MODE -+ #define CONFIG_CONCURRENT_MODE -+ #endif -+ #ifndef CONFIG_BR_EXT -+ #define CONFIG_BR_EXT -+ #endif -+ #ifndef CONFIG_RTW_REPEATER_SON_ID -+ #define CONFIG_RTW_REPEATER_SON_ID 0x02040608 -+ #endif -+ //#define CONFIG_RTW_REPEATER_SON_ROOT -+ #ifndef CONFIG_RTW_REPEATER_SON_ROOT -+ #undef CONFIG_ROAMING_FLAG -+ #define CONFIG_ROAMING_FLAG 0x7 -+ #endif -+ #undef CONFIG_POWER_SAVING -+#endif -+ -+#if defined(CONFIG_MCC_MODE) && (!defined(CONFIG_CONCURRENT_MODE)) -+ -+ #error "Enable CONCURRENT_MODE before enable MCC MODE\n" -+ -+#endif -+ -+#if defined(CONFIG_MCC_MODE) && defined(CONFIG_BT_COEXIST) -+ -+ #error "Disable BT COEXIST before enable MCC MODE\n" -+ -+#endif -+ -+#if defined(CONFIG_MCC_MODE) && defined(CONFIG_TDLS) -+ -+ #error "Disable TDLS before enable MCC MODE\n" -+ -+#endif -+ -+#if defined(CONFIG_RTW_80211R) && !defined(CONFIG_LAYER2_ROAMING) -+ -+ #error "Enable CONFIG_LAYER2_ROAMING before enable CONFIG_RTW_80211R\n" -+ -+#endif -+ -+/* Default enable single wiphy if driver ver >= 5.9 */ -+#define RTW_SINGLE_WIPHY -+ -+#ifdef CONFIG_RTW_ANDROID -+ -+ #include -+ -+ #ifndef CONFIG_IOCTL_CFG80211 -+ #define CONFIG_IOCTL_CFG80211 -+ #endif -+ -+ #ifndef RTW_USE_CFG80211_STA_EVENT -+ #define RTW_USE_CFG80211_STA_EVENT -+ #endif -+ -+ #if (CONFIG_RTW_ANDROID > 4) -+ #ifndef CONFIG_RADIO_WORK -+ #define CONFIG_RADIO_WORK -+ #endif -+ #endif -+ -+ #if (CONFIG_RTW_ANDROID <= 7) -+ #ifdef RTW_SINGLE_WIPHY -+ #undef RTW_SINGLE_WIPHY -+ #endif -+ #endif -+ -+ #if (CONFIG_RTW_ANDROID >= 8) -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)) -+ #ifndef CONFIG_RTW_WIFI_HAL -+ #define CONFIG_RTW_WIFI_HAL -+ #endif -+ #else -+ #error "Linux kernel version is too old\n" -+ #endif -+ #endif -+ -+ #ifdef CONFIG_RTW_WIFI_HAL -+ #ifndef CONFIG_RTW_WIFI_HAL_DEBUG -+ //#define CONFIG_RTW_WIFI_HAL_DEBUG -+ #endif -+ #ifndef CONFIG_RTW_CFGVENDOR_LLSTATS -+ #define CONFIG_RTW_CFGVENDOR_LLSTATS -+ #endif -+ #if (CONFIG_RTW_ANDROID < 11) -+ #ifndef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ #define CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ #endif -+ #endif -+ #ifndef CONFIG_RTW_CFGVENDOR_RSSIMONITOR -+ #define CONFIG_RTW_CFGVENDOR_RSSIMONITOR -+ #endif -+ #ifndef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER -+ #define CONFIG_RTW_CFGVENDOR_WIFI_LOGGER -+ #endif -+ #if (CONFIG_RTW_ANDROID >= 10) -+ #ifndef CONFIG_RTW_CFGVENDOR_WIFI_OFFLOAD -+ //#define CONFIG_RTW_CFGVENDOR_WIFI_OFFLOAD -+ #endif -+ #ifndef CONFIG_RTW_HOSTAPD_ACS -+ #define CONFIG_RTW_HOSTAPD_ACS -+ #endif -+ #ifndef CONFIG_KERNEL_PATCH_EXTERNAL_AUTH -+ #define CONFIG_KERNEL_PATCH_EXTERNAL_AUTH -+ #endif -+ #ifndef CONFIG_RTW_ABORT_SCAN -+ #define CONFIG_RTW_ABORT_SCAN -+ #endif -+ #endif -+ #endif // CONFIG_RTW_WIFI_HAL -+ -+ -+ /* Some Android build will restart the UI while non-printable ascii is passed -+ * between java and c/c++ layer (JNI). We force CONFIG_VALIDATE_SSID -+ * for Android here. If you are sure there is no risk on your system about this, -+ * mask this macro define to support non-printable ascii ssid. -+ * #define CONFIG_VALIDATE_SSID */ -+ -+ /* Android expect dbm as the rx signal strength unit */ -+ #define CONFIG_SIGNAL_DISPLAY_DBM -+#endif // CONFIG_RTW_ANDROID -+ -+/* -+#if defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_RESUME_IN_WORKQUEUE) -+ #warning "You have CONFIG_HAS_EARLYSUSPEND enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically" -+ #undef CONFIG_RESUME_IN_WORKQUEUE -+#endif -+ -+#if defined(CONFIG_ANDROID_POWER) && defined(CONFIG_RESUME_IN_WORKQUEUE) -+ #warning "You have CONFIG_ANDROID_POWER enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically" -+ #undef CONFIG_RESUME_IN_WORKQUEUE -+#endif -+*/ -+ -+/* About USB VENDOR REQ */ -+#if defined(CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX) -+ #warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC automatically" -+ #define CONFIG_USB_VENDOR_REQ_MUTEX -+#endif -+#if defined(CONFIG_VENDOR_REQ_RETRY) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX) -+ #warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_VENDOR_REQ_RETRY automatically" -+ #define CONFIG_USB_VENDOR_REQ_MUTEX -+#endif -+ -+#ifdef CONFIG_WIFI_MONITOR -+ /* #define CONFIG_MONITOR_MODE_XMIT */ -+#endif -+ -+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL -+ #ifndef CONFIG_WIFI_MONITOR -+ #define CONFIG_WIFI_MONITOR -+ #endif -+ #ifdef CONFIG_POWER_SAVING -+ #undef CONFIG_POWER_SAVING -+ #endif -+#endif -+ -+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA -+ #ifdef CONFIG_POWER_SAVING -+ #undef CONFIG_POWER_SAVING -+ #endif -+ #ifdef CONFIG_BEAMFORMING -+ #undef CONFIG_BEAMFORMING -+ #endif -+#endif -+ -+#ifndef CONFIG_RTW_DATA_BMC_TO_UC -+#define CONFIG_RTW_DATA_BMC_TO_UC 0 -+#endif -+ -+#ifdef CONFIG_AP_MODE -+ #define CONFIG_LIMITED_AP_NUM 1 -+ -+ #ifndef CONFIG_RTW_AP_DATA_BMC_TO_UC -+ #define CONFIG_RTW_AP_DATA_BMC_TO_UC 1 -+ #endif -+ #if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ #undef CONFIG_RTW_DATA_BMC_TO_UC -+ #define CONFIG_RTW_DATA_BMC_TO_UC 1 -+ #endif -+ #ifndef CONFIG_RTW_AP_SRC_B2U_FLAGS -+ #define CONFIG_RTW_AP_SRC_B2U_FLAGS 0x8 /* see RTW_AP_B2U_XXX */ -+ #endif -+ #ifndef CONFIG_RTW_AP_FWD_B2U_FLAGS -+ #define CONFIG_RTW_AP_FWD_B2U_FLAGS 0x8 /* see RTW_AP_B2U_XXX */ -+ #endif -+#endif -+ -+#ifdef CONFIG_RTW_MULTI_AP -+ #ifndef CONFIG_AP_MODE -+ #error "enable CONFIG_RTW_MULTI_AP without CONFIG_AP_MODE" -+ #endif -+ #ifndef CONFIG_RTW_WDS -+ #define CONFIG_RTW_WDS -+ #endif -+ #ifndef CONFIG_RTW_UNASOC_STA_MODE_OF_STYPE -+ #define CONFIG_RTW_UNASOC_STA_MODE_OF_STYPE {2, 1} /* BMC:2 for all, NMY_UC:1 for interested target */ -+ #endif -+ #ifndef CONFIG_RTW_NLRTW -+ #define CONFIG_RTW_NLRTW -+ #endif -+ #ifndef CONFIG_RTW_WNM -+ #define CONFIG_RTW_WNM -+ #endif -+ #ifndef CONFIG_RTW_80211K -+ #define CONFIG_RTW_80211K -+ #endif -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+ #ifndef CONFIG_RTW_MESH_ACNODE_PREVENT -+ #define CONFIG_RTW_MESH_ACNODE_PREVENT 1 -+ #endif -+ -+ #ifndef CONFIG_RTW_MESH_OFFCH_CAND -+ #define CONFIG_RTW_MESH_OFFCH_CAND 1 -+ #endif -+ -+ #ifndef CONFIG_RTW_MESH_PEER_BLACKLIST -+ #define CONFIG_RTW_MESH_PEER_BLACKLIST 1 -+ #endif -+ -+ #ifndef CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ #define CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST 1 -+ #endif -+ #ifndef CONFIG_RTW_MESH_CTO_MGATE_CARRIER -+ #define CONFIG_RTW_MESH_CTO_MGATE_CARRIER CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ #endif -+ -+ #ifndef CONFIG_RTW_MPM_TX_IES_SYNC_BSS -+ #define CONFIG_RTW_MPM_TX_IES_SYNC_BSS 1 -+ #endif -+ #if CONFIG_RTW_MPM_TX_IES_SYNC_BSS -+ #ifndef CONFIG_RTW_MESH_AEK -+ #define CONFIG_RTW_MESH_AEK -+ #endif -+ #endif -+ -+ #ifndef CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ #define CONFIG_RTW_MESH_DATA_BMC_TO_UC 1 -+ #endif -+ #if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ #undef CONFIG_RTW_DATA_BMC_TO_UC -+ #define CONFIG_RTW_DATA_BMC_TO_UC 1 -+ #endif -+ #ifndef CONFIG_RTW_MSRC_B2U_FLAGS -+ #define CONFIG_RTW_MSRC_B2U_FLAGS 0x0 /* see RTW_MESH_B2U_XXX */ -+ #endif -+ #ifndef CONFIG_RTW_MFWD_B2U_FLAGS -+ #define CONFIG_RTW_MFWD_B2U_FLAGS 0x2 /* see RTW_MESH_B2U_XXX */ -+ #endif -+#endif -+ -+#if !defined(CONFIG_SCAN_BACKOP) && defined(CONFIG_AP_MODE) -+#define CONFIG_SCAN_BACKOP -+#endif -+ -+#define RTW_SCAN_SPARSE_MIRACAST 1 -+#define RTW_SCAN_SPARSE_BG 0 -+#define RTW_SCAN_SPARSE_ROAMING_ACTIVE 1 -+ -+#ifndef CONFIG_TX_AC_LIFETIME -+#define CONFIG_TX_AC_LIFETIME 1 -+#endif -+#ifndef CONFIG_TX_ACLT_FLAGS -+#define CONFIG_TX_ACLT_FLAGS 0x00 -+#endif -+#ifndef CONFIG_TX_ACLT_CONF_DEFAULT -+#define CONFIG_TX_ACLT_CONF_DEFAULT {0x0, 1024 * 1000, 1024 * 1000} -+#endif -+#ifndef CONFIG_TX_ACLT_CONF_AP_M2U -+#define CONFIG_TX_ACLT_CONF_AP_M2U {0xF, 256 * 1000, 256 * 1000} -+#endif -+#ifndef CONFIG_TX_ACLT_CONF_MESH -+#define CONFIG_TX_ACLT_CONF_MESH {0xF, 256 * 1000, 256 * 1000} -+#endif -+ -+#ifndef CONFIG_RTW_HIQ_FILTER -+ #define CONFIG_RTW_HIQ_FILTER 1 -+#endif -+ -+#ifndef CONFIG_RTW_ADAPTIVITY_EN -+ #define CONFIG_RTW_ADAPTIVITY_EN 0 -+#endif -+ -+#ifndef CONFIG_RTW_ADAPTIVITY_MODE -+ #define CONFIG_RTW_ADAPTIVITY_MODE 0 -+#endif -+ -+#ifndef CONFIG_RTW_ADAPTIVITY_TH_L2H_INI -+ #define CONFIG_RTW_ADAPTIVITY_TH_L2H_INI 0 -+#endif -+ -+#ifndef CONFIG_RTW_ADAPTIVITY_TH_EDCCA_HL_DIFF -+ #define CONFIG_RTW_ADAPTIVITY_TH_EDCCA_HL_DIFF 0 -+#endif -+ -+#ifndef CONFIG_RTW_EXCL_CHS -+ #define CONFIG_RTW_EXCL_CHS {0} -+#endif -+ -+#ifndef CONFIG_IEEE80211_BAND_5GHZ -+ #if defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8821C) \ -+ || defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) \ -+ || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8814B) || defined(CONFIG_RTL8723F) -+ #define CONFIG_IEEE80211_BAND_5GHZ 1 -+ #else -+ #define CONFIG_IEEE80211_BAND_5GHZ 0 -+ #endif -+#endif -+ -+#ifndef CONFIG_DFS -+#define CONFIG_DFS 1 -+#endif -+ -+#if CONFIG_IEEE80211_BAND_5GHZ && CONFIG_DFS && defined(CONFIG_AP_MODE) -+ #if !defined(CONFIG_DFS_SLAVE_WITH_RADAR_DETECT) -+ #define CONFIG_DFS_SLAVE_WITH_RADAR_DETECT 0 -+ #endif -+ #if !defined(CONFIG_DFS_MASTER) || CONFIG_DFS_SLAVE_WITH_RADAR_DETECT -+ #define CONFIG_DFS_MASTER -+ #endif -+ #if defined(CONFIG_DFS_MASTER) && !defined(CONFIG_RTW_DFS_REGION_DOMAIN) -+ #define CONFIG_RTW_DFS_REGION_DOMAIN 0 -+ #endif -+#else -+ #undef CONFIG_DFS_MASTER -+ #undef CONFIG_RTW_DFS_REGION_DOMAIN -+ #define CONFIG_RTW_DFS_REGION_DOMAIN 0 -+ #undef CONFIG_DFS_SLAVE_WITH_RADAR_DETECT -+ #define CONFIG_DFS_SLAVE_WITH_RADAR_DETECT 0 -+#endif -+ -+#ifndef CONFIG_TXPWR_BY_RATE_EN -+#define CONFIG_TXPWR_BY_RATE_EN 2 /* by efuse */ -+#endif -+#ifndef CONFIG_TXPWR_LIMIT_EN -+#define CONFIG_TXPWR_LIMIT_EN 2 /* by efuse */ -+#endif -+ -+#ifndef CONFIG_RTW_CHPLAN -+#define CONFIG_RTW_CHPLAN 0xFF /* RTW_CHPLAN_UNSPECIFIED */ -+#endif -+ -+/* compatible with old fashion configuration */ -+#if defined(CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY) -+ #undef CONFIG_TXPWR_BY_RATE_EN -+ #undef CONFIG_TXPWR_LIMIT_EN -+ #define CONFIG_TXPWR_BY_RATE_EN 1 -+ #define CONFIG_TXPWR_LIMIT_EN 1 -+#elif defined(CONFIG_CALIBRATE_TX_POWER_TO_MAX) -+ #undef CONFIG_TXPWR_BY_RATE_EN -+ #undef CONFIG_TXPWR_LIMIT_EN -+ #define CONFIG_TXPWR_BY_RATE_EN 1 -+ #define CONFIG_TXPWR_LIMIT_EN 0 -+#endif -+ -+#ifndef RTW_DEF_MODULE_REGULATORY_CERT -+ #define RTW_DEF_MODULE_REGULATORY_CERT 0 -+#endif -+ -+#if RTW_DEF_MODULE_REGULATORY_CERT -+ #ifdef CONFIG_REGD_SRC_FROM_OS -+ #error "CONFIG_REGD_SRC_FROM_OS is not supported when enable RTW_DEF_MODULE_REGULATORY_CERT" -+ #endif -+ /* force enable TX power by rate and TX power limit */ -+ #undef CONFIG_TXPWR_BY_RATE_EN -+ #undef CONFIG_TXPWR_LIMIT_EN -+ #define CONFIG_TXPWR_BY_RATE_EN 1 -+ #define CONFIG_TXPWR_LIMIT_EN 1 -+#endif -+ -+#if !CONFIG_TXPWR_LIMIT && CONFIG_TXPWR_LIMIT_EN -+ #undef CONFIG_TXPWR_LIMIT -+ #define CONFIG_TXPWR_LIMIT 1 -+#endif -+ -+#ifndef CONFIG_RTW_REGD_SRC -+#define CONFIG_RTW_REGD_SRC 1 /* 0:RTK_PRIV, 1:OS */ -+#endif -+ -+#define CONFIG_IOCTL_WEXT -+ -+#ifdef CONFIG_RTW_IPCAM_APPLICATION -+ #undef CONFIG_TXPWR_BY_RATE_EN -+ #define CONFIG_TXPWR_BY_RATE_EN 1 -+ #define CONFIG_RTW_CUSTOMIZE_BEEDCA 0x0000431C -+ #define CONFIG_RTW_CUSTOMIZE_BWMODE 0x00 -+ #define CONFIG_RTW_CUSTOMIZE_RLSTA 0x30 -+ #define CONFIG_CHECK_SPECIFIC_IE_CONTENT -+ #ifdef CONFIG_CUSTOMER_EZVIZ_CHIME2 -+ #undef CONFIG_ACTIVE_KEEP_ALIVE_CHECK -+ #endif -+#if defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8822B) -+ #define CONFIG_RTW_TX_NPATH_EN /* mutually incompatible with STBC_TX & Beamformer */ -+#endif -+#endif -+/* #define CONFIG_RTW_TOKEN_BASED_XMIT */ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ #define NR_TBTX_SLOT 4 -+ #define NR_MAXSTA_INSLOT 5 -+ #define TBTX_TX_DURATION 30 -+ -+ #define MAX_TXPAUSE_DURATION (TBTX_TX_DURATION*NR_TBTX_SLOT) -+#endif -+ -+/*#define CONFIG_EXTEND_LOWRATE_TXOP */ -+ -+#ifndef CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS -+ #define CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS {0xFF, 0xFF, 0xFF, 0xFF} -+#endif -+#ifndef CONFIG_RTW_RX_AMPDU_SZ_LIMIT_2SS -+ #define CONFIG_RTW_RX_AMPDU_SZ_LIMIT_2SS {0xFF, 0xFF, 0xFF, 0xFF} -+#endif -+#ifndef CONFIG_RTW_RX_AMPDU_SZ_LIMIT_3SS -+ #define CONFIG_RTW_RX_AMPDU_SZ_LIMIT_3SS {0xFF, 0xFF, 0xFF, 0xFF} -+#endif -+#ifndef CONFIG_RTW_RX_AMPDU_SZ_LIMIT_4SS -+ #define CONFIG_RTW_RX_AMPDU_SZ_LIMIT_4SS {0xFF, 0xFF, 0xFF, 0xFF} -+#endif -+ -+#ifndef CONFIG_RTW_TARGET_TX_PWR_2G_A -+ #define CONFIG_RTW_TARGET_TX_PWR_2G_A {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1} -+#endif -+ -+#ifndef CONFIG_RTW_TARGET_TX_PWR_2G_B -+ #define CONFIG_RTW_TARGET_TX_PWR_2G_B {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1} -+#endif -+ -+#ifndef CONFIG_RTW_TARGET_TX_PWR_2G_C -+ #define CONFIG_RTW_TARGET_TX_PWR_2G_C {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1} -+#endif -+ -+#ifndef CONFIG_RTW_TARGET_TX_PWR_2G_D -+ #define CONFIG_RTW_TARGET_TX_PWR_2G_D {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1} -+#endif -+ -+#ifndef CONFIG_RTW_TARGET_TX_PWR_5G_A -+ #define CONFIG_RTW_TARGET_TX_PWR_5G_A {-1, -1, -1, -1, -1, -1, -1, -1, -1} -+#endif -+ -+#ifndef CONFIG_RTW_TARGET_TX_PWR_5G_B -+ #define CONFIG_RTW_TARGET_TX_PWR_5G_B {-1, -1, -1, -1, -1, -1, -1, -1, -1} -+#endif -+ -+#ifndef CONFIG_RTW_TARGET_TX_PWR_5G_C -+ #define CONFIG_RTW_TARGET_TX_PWR_5G_C {-1, -1, -1, -1, -1, -1, -1, -1, -1} -+#endif -+ -+#ifndef CONFIG_RTW_TARGET_TX_PWR_5G_D -+ #define CONFIG_RTW_TARGET_TX_PWR_5G_D {-1, -1, -1, -1, -1, -1, -1, -1, -1} -+#endif -+ -+#ifndef CONFIG_RTW_ANTENNA_GAIN -+#define CONFIG_RTW_ANTENNA_GAIN 0x7FFF /* == UNSPECIFIED_MBM */ -+#endif -+ -+#ifndef CONFIG_RTW_AMPLIFIER_TYPE_2G -+ #define CONFIG_RTW_AMPLIFIER_TYPE_2G 0 -+#endif -+ -+#ifndef CONFIG_RTW_AMPLIFIER_TYPE_5G -+ #define CONFIG_RTW_AMPLIFIER_TYPE_5G 0 -+#endif -+ -+#ifndef CONFIG_RTW_RFE_TYPE -+ #define CONFIG_RTW_RFE_TYPE 64 -+#endif -+ -+#ifndef CONFIG_RTW_GLNA_TYPE -+ #define CONFIG_RTW_GLNA_TYPE 0 -+#endif -+ -+#ifndef CONFIG_RTW_PLL_REF_CLK_SEL -+ #define CONFIG_RTW_PLL_REF_CLK_SEL 0x0F -+#endif -+ -+#ifndef CONFIG_IFACE_NUMBER -+ #ifdef CONFIG_CONCURRENT_MODE -+ #define CONFIG_IFACE_NUMBER 2 -+ #else -+ #define CONFIG_IFACE_NUMBER 1 -+ #endif -+#endif -+ -+#ifndef CONFIG_CONCURRENT_MODE -+ #if (CONFIG_IFACE_NUMBER > 1) -+ #error "CONFIG_IFACE_NUMBER over 1,but CONFIG_CONCURRENT_MODE not defined" -+ #endif -+#endif -+ -+#if (CONFIG_IFACE_NUMBER == 0) -+ #error "CONFIG_IFACE_NUMBER cound not be 0 !!" -+#endif -+ -+#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8188F) || \ -+defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8192F) || \ -+defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8710B) || \ -+defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8723D) -+#define CONFIG_HWMPCAP_GEN1 -+#elif defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || \ -+defined(CONFIG_RTL8723F) /*|| defined(CONFIG_RTL8814A)*/ -+#define CONFIG_HWMPCAP_GEN2 -+#elif defined(CONFIG_RTL8814B) /*Address CAM - 128*/ -+#define CONFIG_HWMPCAP_GEN3 -+#endif -+ -+#if defined(CONFIG_HWMPCAP_GEN1) && (CONFIG_IFACE_NUMBER > 2) -+ #ifdef CONFIG_POWER_SAVING -+ /*#warning "Disable PS when CONFIG_IFACE_NUMBER > 2"*/ -+ #undef CONFIG_POWER_SAVING -+ #endif -+ -+ #ifdef CONFIG_WOWLAN -+ #error "This IC can't support MI and WoWLan at the same time" -+ #endif -+#endif -+ -+#if defined(CONFIG_HWMPCAP_GEN1) && (CONFIG_IFACE_NUMBER > 3) -+ #error " This IC can't support over 3 interfaces !!" -+#endif -+ -+#if (CONFIG_IFACE_NUMBER > 4) -+ #error "Not support over 4 interfaces yet !!" -+#endif -+ -+#if (CONFIG_IFACE_NUMBER > 8) /*IFACE_ID_MAX*/ -+ #error "HW count not support over 8 interfaces !!" -+#endif -+ -+#if (CONFIG_IFACE_NUMBER > 2) -+ #ifndef CONFIG_HWMPCAP_GEN3 -+ #define CONFIG_MI_WITH_MBSSID_CAM -+ #endif -+ -+ #ifdef CONFIG_MI_WITH_MBSSID_CAM -+ #define CONFIG_MBSSID_CAM -+ #if defined(CONFIG_RUNTIME_PORT_SWITCH) -+ #undef CONFIG_RUNTIME_PORT_SWITCH -+ #endif -+ #endif -+ -+ #ifdef CONFIG_AP_MODE -+ #undef CONFIG_LIMITED_AP_NUM -+ #define CONFIG_LIMITED_AP_NUM 2 -+ -+ #define CONFIG_SUPPORT_MULTI_BCN -+ -+ #define CONFIG_SWTIMER_BASED_TXBCN -+ -+ #ifdef CONFIG_HWMPCAP_GEN2 /*CONFIG_RTL8822B/CONFIG_RTL8821C/CONFIG_RTL8822C*/ -+ #define CONFIG_FW_HANDLE_TXBCN -+ -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ #ifdef CONFIG_SWTIMER_BASED_TXBCN -+ #undef CONFIG_SWTIMER_BASED_TXBCN -+ #endif -+ #undef CONFIG_LIMITED_AP_NUM -+ #define CONFIG_LIMITED_AP_NUM 4 -+ #endif -+ -+ #endif /*CONFIG_HWMPCAP_GEN2*/ -+ -+ #ifdef CONFIG_HWMPCAP_GEN3 -+ #define CONFIG_PORT_BASED_TXBCN -+ #undef CONFIG_SUPPORT_MULTI_BCN -+ #undef CONFIG_SWTIMER_BASED_TXBCN -+ #undef CONFIG_LIMITED_AP_NUM -+ #define CONFIG_LIMITED_AP_NUM 4 -+ #ifdef CONFIG_PCI_HCI -+ #define CONFIG_PORT_BASED_HIQ /* 8814BU doesn't support */ -+ #endif -+ #endif -+ #endif /*CONFIG_AP_MODE*/ -+ -+ #ifdef CONFIG_HWMPCAP_GEN2 /*CONFIG_RTL8822B/CONFIG_RTL8821C/CONFIG_RTL8822C*/ -+ #define CONFIG_CLIENT_PORT_CFG -+ #define CONFIG_NEW_NETDEV_HDL -+ #endif/*CONFIG_HWMPCAP_GEN2*/ -+#endif/*(CONFIG_IFACE_NUMBER > 2)*/ -+ -+#if defined(CONFIG_MI_UNIQUE_MACADDR_BIT) -+ #if !defined(CONFIG_MI_WITH_MBSSID_CAM) -+ #error "CONFIG_MI_UNIQUE_MACADDR_BIT should not be used without multiple interface !!" -+ #endif -+ #if (CONFIG_MI_UNIQUE_MACADDR_BIT < 24) || ( 47 < CONFIG_MI_UNIQUE_MACADDR_BIT) -+ #error "CONFIG_MI_UNIQUE_MACADDR_BIT should be the bit in NIC specific mac address(BIT[24:47] !!" -+ #endif -+#endif -+ -+#define MACID_NUM_SW_LIMIT 32 -+#define SEC_CAM_ENT_NUM_SW_LIMIT 32 -+ -+#ifdef SEC_DEFAULT_KEY_SEARCH -+ #if (CONFIG_IFACE_NUMBER >= 2) -+ #error "Default Key Search only work with only one interface case!" -+ #endif -+#endif -+ -+#if defined(CONFIG_WOWLAN) && (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B)) -+ #define CONFIG_WOW_PATTERN_HW_CAM -+#endif -+ -+#ifndef CONFIG_TSF_UPDATE_PAUSE_FACTOR -+#define CONFIG_TSF_UPDATE_PAUSE_FACTOR 200 -+#endif -+ -+#ifndef CONFIG_TSF_UPDATE_RESTORE_FACTOR -+#define CONFIG_TSF_UPDATE_RESTORE_FACTOR 5 -+#endif -+ -+/* -+ Mark CONFIG_DEAUTH_BEFORE_CONNECT by Arvin 2015/07/20 -+ If the failure of Wi-Fi connection is due to some irregular disconnection behavior (like unplug dongle, -+ power down etc.) in last time, we can unmark this flag to avoid some unpredictable response from AP. -+*/ -+/*#define CONFIG_DEAUTH_BEFORE_CONNECT */ -+ -+/*#define CONFIG_WEXT_DONT_JOIN_BYSSID */ -+/* #include */ -+ -+ -+/*#define CONFIG_DOSCAN_IN_BUSYTRAFFIC */ -+/*#define CONFIG_PHDYM_FW_FIXRATE */ /* Another way to fix tx rate */ -+ -+/*Don't release SDIO irq in suspend/resume procedure*/ -+#define CONFIG_RTW_SDIO_KEEP_IRQ 0 -+ -+/* -+ * Add by Lucas@2016/02/15 -+ * For RX Aggregation -+ */ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_RX_AGGREGATION) -+ #define RTW_RX_AGGREGATION -+#endif /* CONFIG_SDIO_HCI || CONFIG_USB_RX_AGGREGATION */ -+ -+#ifdef CONFIG_RTW_HOSTAPD_ACS -+ #ifndef CONFIG_RTW_ACS -+ #define CONFIG_RTW_ACS -+ #endif -+#endif -+ -+#ifdef CONFIG_RTW_80211K -+ #ifndef CONFIG_RTW_ACS -+ #define CONFIG_RTW_ACS -+ #endif -+#endif /*CONFIG_RTW_80211K*/ -+ -+#ifdef DBG_CONFIG_ERROR_RESET -+#ifndef CONFIG_IPS -+#define CONFIG_IPS -+#endif -+#endif -+ -+/* IPS */ -+#ifndef RTW_IPS_MODE -+ #if defined(CONFIG_IPS) -+ #define RTW_IPS_MODE 1 -+ #else -+ #define RTW_IPS_MODE 0 -+ #endif -+#endif /* !RTW_IPS_MODE */ -+ -+#if (RTW_IPS_MODE > 1 || RTW_IPS_MODE < 0) -+ #error "The CONFIG_IPS_MODE value is wrong. Please follow HowTo_enable_the_power_saving_functionality.pdf.\n" -+#endif -+ -+/* LPS */ -+#ifndef RTW_LPS_MODE -+ #if defined(CONFIG_LPS_PG) || defined(CONFIG_LPS_PG_DDMA) -+ #define RTW_LPS_MODE 3 -+ #elif defined(CONFIG_LPS_LCLK) -+ #define RTW_LPS_MODE 2 -+ #elif defined(CONFIG_LPS) -+ #define RTW_LPS_MODE 1 -+ #else -+ #define RTW_LPS_MODE 0 -+ #endif -+#endif /* !RTW_LPS_MODE */ -+ -+#if (RTW_LPS_MODE > 3 || RTW_LPS_MODE < 0) -+ #error "The CONFIG_LPS_MODE value is wrong. Please follow HowTo_enable_the_power_saving_functionality.pdf.\n" -+#endif -+ -+#ifndef RTW_LPS_1T1R -+#define RTW_LPS_1T1R 0 -+#endif -+ -+#ifndef RTW_WOW_LPS_1T1R -+#define RTW_WOW_LPS_1T1R 0 -+#endif -+ -+/* WOW LPS */ -+#ifndef RTW_WOW_LPS_MODE -+ #if defined(CONFIG_LPS_PG) || defined(CONFIG_LPS_PG_DDMA) -+ #define RTW_WOW_LPS_MODE 3 -+ #elif defined(CONFIG_LPS_LCLK) -+ #define RTW_WOW_LPS_MODE 2 -+ #elif defined(CONFIG_LPS) -+ #define RTW_WOW_LPS_MODE 1 -+ #else -+ #define RTW_WOW_LPS_MODE 0 -+ #endif -+#endif /* !RTW_WOW_LPS_MODE */ -+ -+#if (RTW_WOW_LPS_MODE > 3 || RTW_WOW_LPS_MODE < 0) -+ #error "The RTW_WOW_LPS_MODE value is wrong. Please follow HowTo_enable_the_power_saving_functionality.pdf.\n" -+#endif -+ -+#ifdef RTW_REDUCE_SCAN_SWITCH_CH_TIME -+#ifndef CONFIG_RTL8822B -+ #error "Only 8822B support RTW_REDUCE_SCAN_SWITCH_CH_TIME" -+#endif -+ #ifndef RTW_CHANNEL_SWITCH_OFFLOAD -+ #define RTW_CHANNEL_SWITCH_OFFLOAD -+ #endif -+#endif -+ -+#ifdef CONFIG_WAR_OFFLOAD -+#ifndef CONFIG_WOWLAN -+ #error "WAR OFFLOAD is part of WOWLAN" -+#endif -+#endif -+ -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+#ifndef CONFIG_WOWLAN -+ #error "mDNS OFFLOAD is part of WOWLAN" -+#endif -+#ifndef CONFIG_WAR_OFFLOAD -+ #define CONFIG_WAR_OFFLOAD -+#endif -+#endif -+ -+#define CONFIG_RTW_TPT_MODE -+ -+#ifdef CONFIG_PCI_BCN_POLLING -+#define CONFIG_BCN_ICF -+#endif -+ -+#ifndef CONFIG_RTW_MGMT_QUEUE -+ #define CONFIG_RTW_MGMT_QUEUE -+#endif -+ -+#ifndef CONFIG_PCI_MSI -+#define CONFIG_RTW_PCI_MSI_DISABLE -+#endif -+ -+#if defined(CONFIG_PCI_DYNAMIC_ASPM_L1_LATENCY) || \ -+ defined(CONFIG_PCI_DYNAMIC_ASPM_LINK_CTRL) -+#define CONFIG_PCI_DYNAMIC_ASPM -+#endif -+ -+#if 0 -+/* Debug related compiler flags */ -+#define DBG_THREAD_PID /* Add thread pid to debug message prefix */ -+#define DBG_CPU_INFO /* Add CPU info to debug message prefix */ -+#endif -+ -+#endif /* __DRV_CONF_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/drv_types.h b/drivers/staging/rtl8723cs/include/drv_types.h -new file mode 100644 -index 000000000000..7422236324e2 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/drv_types.h -@@ -0,0 +1,2036 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/*------------------------------------------------------------------------------- -+ -+ For type defines and data structure defines -+ -+--------------------------------------------------------------------------------*/ -+ -+ -+#ifndef __DRV_TYPES_H__ -+#define __DRV_TYPES_H__ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#ifdef CONFIG_ARP_KEEP_ALIVE -+ #include -+ #include -+#endif -+ -+#ifdef PLATFORM_OS_XP -+ #include -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ #include -+#endif -+ -+#ifdef PLATFORM_LINUX -+ #include -+#endif -+ -+enum _NIC_VERSION { -+ -+ RTL8711_NIC, -+ RTL8712_NIC, -+ RTL8713_NIC, -+ RTL8716_NIC -+ -+}; -+ -+typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER; -+ -+#include -+#include -+#include -+#include "../core/rtw_chplan.h" -+ -+#ifdef CONFIG_80211N_HT -+ #include -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ #include -+#endif -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#ifdef CONFIG_BEAMFORMING -+ #include -+#endif -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "../hal/hal_dm.h" -+#include -+#include -+#ifdef CONFIG_RTW_80211R -+#include -+#endif -+#if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K) -+#include -+#endif -+#ifdef CONFIG_RTW_MBO -+#include -+#endif -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#ifdef CONFIG_RTW_WDS -+#include "../core/wds/rtw_wds.h" -+#endif -+#ifdef CONFIG_RTW_MESH -+#include "../core/mesh/rtw_mesh.h" -+#endif -+#ifdef CONFIG_WIFI_MONITOR -+#include "../core/monitor/rtw_radiotap.h" -+#endif -+#include -+#include -+#include -+ -+#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ #include -+#endif -+ -+#include -+ -+#ifdef CONFIG_TDLS -+ #include -+#endif /* CONFIG_TDLS */ -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ #include -+#endif /* CONFIG_WAPI_SUPPORT */ -+ -+#ifdef CONFIG_MP_INCLUDED -+ #include -+#endif /* CONFIG_MP_INCLUDED */ -+ -+#ifdef CONFIG_BR_EXT -+ #include -+#endif /* CONFIG_BR_EXT */ -+ -+#ifdef CONFIG_IOL -+ #include -+#endif /* CONFIG_IOL */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include -+#include -+ -+#ifdef CONFIG_MCC_MODE -+ #include -+#endif /*CONFIG_MCC_MODE */ -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ #include -+#endif /*CONFIG_RTW_REPEATER_SON */ -+ -+#include -+ -+#define SPEC_DEV_ID_NONE BIT(0) -+#define SPEC_DEV_ID_DISABLE_HT BIT(1) -+#define SPEC_DEV_ID_ENABLE_PS BIT(2) -+#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3) -+#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4) -+#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5) -+ -+struct specific_device_id { -+ -+ u32 flags; -+ -+ u16 idVendor; -+ u16 idProduct; -+ -+}; -+ -+struct registry_priv { -+ u8 chip_version; -+ u8 rfintfs; -+ u8 lbkmode; -+ u8 hci; -+ NDIS_802_11_SSID ssid; -+ u8 network_mode; /* infra, ad-hoc, auto */ -+ u8 channel;/* ad-hoc support requirement */ -+ u8 wireless_mode;/* A, B, G, auto */ -+ u8 scan_mode;/* active, passive */ -+ u8 radio_enable; -+ u8 preamble;/* long, short, auto */ -+ u8 vrtl_carrier_sense;/* Enable, Disable, Auto */ -+ u8 vcs_type;/* RTS/CTS, CTS-to-self */ -+ u16 rts_thresh; -+ u16 frag_thresh; -+ u8 adhoc_tx_pwr; -+ u8 soft_ap; -+ u8 power_mgnt; -+ u8 ips_mode; -+ u8 lps_level; -+#ifdef CONFIG_LPS_1T1R -+ u8 lps_1t1r; -+#endif -+ u8 lps_chk_by_tp; -+#ifdef CONFIG_WOWLAN -+ u8 wow_power_mgnt; -+ u8 wow_lps_level; -+ #ifdef CONFIG_LPS_1T1R -+ u8 wow_lps_1t1r; -+ #endif -+#endif /* CONFIG_WOWLAN */ -+ u8 smart_ps; -+#ifdef CONFIG_WMMPS_STA -+ u8 wmm_smart_ps; -+#endif /* CONFIG_WMMPS_STA */ -+ u8 usb_rxagg_mode; -+ u8 dynamic_agg_enable; -+ u8 long_retry_lmt; -+ u8 short_retry_lmt; -+ u16 busy_thresh; -+ u16 max_bss_cnt; -+ u8 ack_policy; -+ u8 mp_mode; -+#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR) -+ u8 mp_customer_str; -+#endif -+ u8 mp_dm; -+ u8 software_encrypt; -+ u8 software_decrypt; -+#ifdef CONFIG_TX_EARLY_MODE -+ u8 early_mode; -+#endif -+#ifdef CONFIG_NARROWBAND_SUPPORTING -+ u8 rtw_nb_config; -+#endif -+ u8 acm_method; -+ /* WMM */ -+ u8 wmm_enable; -+#ifdef CONFIG_WMMPS_STA -+ /* uapsd (unscheduled automatic power-save delivery) = a kind of wmmps */ -+ u8 uapsd_max_sp_len; -+ /* BIT0: AC_VO UAPSD, BIT1: AC_VI UAPSD, BIT2: AC_BK UAPSD, BIT3: AC_BE UAPSD */ -+ u8 uapsd_ac_enable; -+#endif /* CONFIG_WMMPS_STA */ -+ -+ WLAN_BSSID_EX dev_network; -+ -+#if CONFIG_TX_AC_LIFETIME -+ u8 tx_aclt_flags; -+ struct tx_aclt_conf_t tx_aclt_confs[TX_ACLT_CONF_NUM]; -+#endif -+ -+ u8 tx_bw_mode; -+#ifdef CONFIG_AP_MODE -+ u8 bmc_tx_rate; -+ #if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ u8 ap_src_b2u_flags; -+ u8 ap_fwd_b2u_flags; -+ #endif -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+ #if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ u8 msrc_b2u_flags; -+ u8 mfwd_b2u_flags; -+ #endif -+#endif -+ -+#ifdef CONFIG_80211N_HT -+ u8 ht_enable; -+ /* 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz */ -+ /* 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7 */ -+ /* 0x21 means enable 2.4G 40MHz & 5G 80MHz */ -+ u8 bw_mode; -+ u8 ampdu_enable;/* for tx */ -+ u8 rx_stbc; -+ u8 rx_ampdu_amsdu;/* Rx A-MPDU Supports A-MSDU is permitted */ -+ u8 tx_ampdu_amsdu;/* Tx A-MPDU Supports A-MSDU is permitted */ -+ u8 tx_quick_addba_req; -+ u8 rx_ampdu_sz_limit_by_nss_bw[4][4]; /* 1~4SS, BW20~BW160 */ -+ /* Short GI support Bit Map */ -+ /* BIT0 - 20MHz, 1: support, 0: non-support */ -+ /* BIT1 - 40MHz, 1: support, 0: non-support */ -+ /* BIT2 - 80MHz, 1: support, 0: non-support */ -+ /* BIT3 - 160MHz, 1: support, 0: non-support */ -+ u8 short_gi; -+ /* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx */ -+ u8 ldpc_cap; -+ /* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx */ -+ u8 stbc_cap; -+ #if defined(CONFIG_RTW_TX_NPATH_EN) -+ u8 tx_npath; -+ #endif -+ #if defined(CONFIG_RTW_PATH_DIV) -+ u8 path_div; -+ #endif -+ /* -+ * BIT0: Enable VHT SU Beamformer -+ * BIT1: Enable VHT SU Beamformee -+ * BIT2: Enable VHT MU Beamformer, depend on VHT SU Beamformer -+ * BIT3: Enable VHT MU Beamformee, depend on VHT SU Beamformee -+ * BIT4: Enable HT Beamformer -+ * BIT5: Enable HT Beamformee -+ */ -+ u8 beamform_cap; -+ u8 beamformer_rf_num; -+ u8 beamformee_rf_num; -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_80211AC_VHT -+ u8 vht_enable; /* 0:disable, 1:enable, 2:auto */ -+ u8 vht_24g_enable; /* 0:disable, 1:enable */ -+ u8 ampdu_factor; -+ u8 vht_rx_mcs_map[2]; -+#endif /* CONFIG_80211AC_VHT */ -+ -+ u8 low_power ; -+ -+ u8 wifi_spec;/* !turbo_mode */ -+ -+ u8 trx_path_bmp; /* [7:4]TX path bmp, [0:3]RX path bmp, 0: not specified */ -+ u8 tx_path_lmt; /* limit of TX path number, 0: not specified */ -+ u8 rx_path_lmt; /* limit of TX path number, 0: not specified */ -+ u8 tx_nss; -+ u8 rx_nss; -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+ enum regd_src_t regd_src; -+#endif -+ char alpha2[2]; -+ u8 channel_plan; -+ u8 excl_chs[MAX_CHANNEL_NUM]; -+ u8 full_ch_in_p2p_handshake; /* 0: reply only softap channel, 1: reply full channel list*/ -+ -+#ifdef CONFIG_BT_COEXIST -+ u8 btcoex; -+ u8 bt_iso; -+ u8 bt_sco; -+ u8 bt_ampdu; -+ u8 ant_num; -+ u8 single_ant_path; -+#endif -+ BOOLEAN bAcceptAddbaReq; -+ -+ u8 antdiv_cfg; -+ u8 antdiv_type; -+ u8 drv_ant_band_switch; -+ -+ u8 switch_usb_mode; -+ -+ u8 usbss_enable;/* 0:disable,1:enable */ -+ u8 hwpdn_mode;/* 0:disable,1:enable,2:decide by EFUSE config */ -+ u8 hwpwrp_detect;/* 0:disable,1:enable */ -+ -+ u8 hw_wps_pbc;/* 0:disable,1:enable */ -+ -+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE -+ char adaptor_info_caching_file_path[PATH_LENGTH_MAX]; -+#endif -+ -+#ifdef CONFIG_LAYER2_ROAMING -+ u8 max_roaming_times; /* the max number driver will try to roaming */ -+#endif -+ -+#ifdef CONFIG_IOL -+ u8 fw_iol; /* enable iol without other concern */ -+#endif -+ -+#ifdef CONFIG_80211D -+ u8 enable80211d; -+#endif -+ -+ u8 ifname[16]; -+ u8 if2name[16]; -+ -+ u8 notch_filter; -+ -+ /* for pll reference clock selction */ -+ u8 pll_ref_clk_sel; -+ -+ /* define for tx power adjust */ -+#if CONFIG_TXPWR_LIMIT -+ u8 RegEnableTxPowerLimit; -+#endif -+ u8 RegEnableTxPowerByRate; -+ -+ u8 target_tx_pwr_valid; -+ s8 target_tx_pwr_2g[RF_PATH_MAX][RATE_SECTION_NUM]; -+#if CONFIG_IEEE80211_BAND_5GHZ -+ s8 target_tx_pwr_5g[RF_PATH_MAX][RATE_SECTION_NUM - 1]; -+#endif -+ s16 antenna_gain; -+ -+ u8 tsf_update_pause_factor; -+ u8 tsf_update_restore_factor; -+ -+ s8 TxBBSwing_2G; -+ s8 TxBBSwing_5G; -+ u8 AmplifierType_2G; -+ u8 AmplifierType_5G; -+ u8 bEn_RFE; -+ u8 RFE_Type; -+ u8 PowerTracking_Type; -+ u8 GLNA_Type; -+ u8 check_fw_ps; -+ u8 RegPwrTrimEnable; -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ u8 load_phy_file; -+ u8 RegDecryptCustomFile; -+#endif -+#ifdef CONFIG_CONCURRENT_MODE -+ u8 virtual_iface_num; -+#ifdef CONFIG_P2P -+ u8 sel_p2p_iface; -+#endif -+#endif -+ u8 qos_opt_enable; -+ -+ u8 hiq_filter; -+ u8 adaptivity_en; -+ u8 adaptivity_mode; -+ s8 adaptivity_th_l2h_ini; -+ s8 adaptivity_th_edcca_hl_diff; -+ -+ u8 boffefusemask; -+ BOOLEAN bFileMaskEfuse; -+ BOOLEAN bBTFileMaskEfuse; -+#ifdef CONFIG_RTW_ACS -+ u8 acs_auto_scan; -+ u8 acs_mode; -+#endif -+ -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ u8 nm_mode; -+#endif -+ u32 reg_rxgain_offset_2g; -+ u32 reg_rxgain_offset_5gl; -+ u32 reg_rxgain_offset_5gm; -+ u32 reg_rxgain_offset_5gh; -+ -+#ifdef CONFIG_DFS_MASTER -+ u8 dfs_region_domain; -+#endif -+ -+#ifdef CONFIG_MCC_MODE -+ u8 en_mcc; -+ u32 rtw_mcc_single_tx_cri; -+ u32 rtw_mcc_ap_bw20_target_tx_tp; -+ u32 rtw_mcc_ap_bw40_target_tx_tp; -+ u32 rtw_mcc_ap_bw80_target_tx_tp; -+ u32 rtw_mcc_sta_bw20_target_tx_tp; -+ u32 rtw_mcc_sta_bw40_target_tx_tp; -+ u32 rtw_mcc_sta_bw80_target_tx_tp; -+ s8 rtw_mcc_policy_table_idx; -+ u8 rtw_mcc_duration; -+ u8 rtw_mcc_enable_runtime_duration; -+ u8 rtw_mcc_phydm_offload; -+#endif /* CONFIG_MCC_MODE */ -+ -+#ifdef CONFIG_RTW_NAPI -+ u8 en_napi; -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+ u32 napi_threshold; /* unit: Mbps */ -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+#ifdef CONFIG_RTW_GRO -+ u8 en_gro; -+#endif /* CONFIG_RTW_GRO */ -+#endif /* CONFIG_RTW_NAPI */ -+ -+#ifdef CONFIG_WOWLAN -+ u8 wowlan_enable; -+ u8 wakeup_event; -+ u8 suspend_type; -+#endif -+ -+ u8 recvbuf_nr; -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+ u8 trx_share_mode; -+#endif -+ u8 check_hw_status; -+ u8 wowlan_sta_mix_mode; -+ -+#ifdef CONFIG_PCI_HCI -+ u32 pci_aspm_config; -+ u32 pci_dynamic_aspm_linkctrl; -+#endif -+ -+ u8 iqk_fw_offload; -+ u8 ch_switch_offload; -+ -+#ifdef CONFIG_TDLS -+ u8 en_tdls; -+#endif -+ -+#ifdef CONFIG_ADVANCE_OTA -+ u8 adv_ota; -+#endif -+ -+#ifdef CONFIG_FW_OFFLOAD_PARAM_INIT -+ u8 fw_param_init; -+#endif -+#ifdef CONFIG_DYNAMIC_SOML -+ u8 dyn_soml_en; -+ u8 dyn_soml_train_num; -+ u8 dyn_soml_interval; -+ u8 dyn_soml_period; -+ u8 dyn_soml_delay; -+#endif -+#ifdef CONFIG_FW_HANDLE_TXBCN -+ u8 fw_tbtt_rpt; -+#endif -+ -+#ifdef DBG_LA_MODE -+ u8 la_mode_en; -+#endif -+ u32 phydm_ability; -+ u32 halrf_ability; -+#ifdef CONFIG_TDMADIG -+ u8 tdmadig_en; -+ u8 tdmadig_mode; -+ u8 tdmadig_dynamic; -+#endif/*CONFIG_TDMADIG*/ -+ u8 en_dyn_rrsr; -+ u32 set_rrsr_value; -+#ifdef CONFIG_RTW_MESH -+ u8 peer_alive_based_preq; -+#endif -+ -+#ifdef RTW_BUSY_DENY_SCAN -+ /* -+ * scan_interval_thr means scan interval threshold which is used to -+ * judge if user is in scan page or not. -+ * If scan interval < scan_interval_thr we guess user is in scan page, -+ * and driver won't deny any scan request at that time. -+ * Its default value comes from compiler flag -+ * BUSY_TRAFFIC_SCAN_DENY_PERIOD, and unit is ms. -+ */ -+ u32 scan_interval_thr; -+#endif -+ -+#ifdef CONFIG_RTL8822C_XCAP_NEW_POLICY -+ u8 rtw_8822c_xcap_overwrite; -+#endif -+#ifdef CONFIG_RTW_MULTI_AP -+ u8 unassoc_sta_mode_of_stype[UNASOC_STA_SRC_NUM]; -+ u16 max_unassoc_sta_cnt; -+#endif -+}; -+ -+/* For registry parameters */ -+#define RGTRY_OFT(field) ((u32)FIELD_OFFSET(struct registry_priv, field)) -+#define RGTRY_SZ(field) sizeof(((struct registry_priv *) 0)->field) -+ -+#define GetRegAmplifierType2G(_Adapter) (_Adapter->registrypriv.AmplifierType_2G) -+#define GetRegAmplifierType5G(_Adapter) (_Adapter->registrypriv.AmplifierType_5G) -+ -+#define GetRegTxBBSwing_2G(_Adapter) (_Adapter->registrypriv.TxBBSwing_2G) -+#define GetRegTxBBSwing_5G(_Adapter) (_Adapter->registrypriv.TxBBSwing_5G) -+ -+#define GetRegbENRFEType(_Adapter) (_Adapter->registrypriv.bEn_RFE) -+#define GetRegRFEType(_Adapter) (_Adapter->registrypriv.RFE_Type) -+#define GetRegGLNAType(_Adapter) (_Adapter->registrypriv.GLNA_Type) -+#define GetRegPowerTrackingType(_Adapter) (_Adapter->registrypriv.PowerTracking_Type) -+ -+#define WOWLAN_IS_STA_MIX_MODE(_Adapter) (_Adapter->registrypriv.wowlan_sta_mix_mode) -+#define BSSID_OFT(field) ((u32)FIELD_OFFSET(WLAN_BSSID_EX, field)) -+#define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field) -+ -+#define BW_MODE_2G(bw_mode) ((bw_mode) & 0x0F) -+#define BW_MODE_5G(bw_mode) ((bw_mode) >> 4) -+#ifdef CONFIG_80211N_HT -+#define REGSTY_BW_2G(regsty) BW_MODE_2G((regsty)->bw_mode) -+#define REGSTY_BW_5G(regsty) BW_MODE_5G((regsty)->bw_mode) -+#else -+#define REGSTY_BW_2G(regsty) CHANNEL_WIDTH_20 -+#define REGSTY_BW_5G(regsty) CHANNEL_WIDTH_20 -+#endif -+#define REGSTY_IS_BW_2G_SUPPORT(regsty, bw) (REGSTY_BW_2G((regsty)) >= (bw)) -+#define REGSTY_IS_BW_5G_SUPPORT(regsty, bw) (REGSTY_BW_5G((regsty)) >= (bw)) -+ -+#ifdef CONFIG_80211AC_VHT -+#define REGSTY_IS_11AC_ENABLE(regsty) ((regsty)->vht_enable != 0) -+#define REGSTY_IS_11AC_AUTO(regsty) ((regsty)->vht_enable == 2) -+#define REGSTY_IS_11AC_24G_ENABLE(regsty) ((regsty)->vht_24g_enable != 0) -+#else -+#define REGSTY_IS_11AC_ENABLE(regsty) 0 -+#define REGSTY_IS_11AC_AUTO(regsty) 0 -+#define REGSTY_IS_11AC_24G_ENABLE(regsty) 0 -+#endif -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+#define REGSTY_REGD_SRC_FROM_OS(regsty) ((regsty)->regd_src == REGD_SRC_OS) -+#else -+#define REGSTY_REGD_SRC_FROM_OS(regsty) 0 -+#endif -+ -+typedef struct rtw_if_operations { -+ int __must_check (*read)(struct dvobj_priv *d, unsigned int addr, void *buf, -+ size_t len, bool fixed); -+ int __must_check (*write)(struct dvobj_priv *d, unsigned int addr, void *buf, -+ size_t len, bool fixed); -+} RTW_IF_OPS, *PRTW_IF_OPS; -+ -+#ifdef CONFIG_SDIO_HCI -+ #include -+ #define INTF_DATA SDIO_DATA -+ #define INTF_OPS PRTW_IF_OPS -+#elif defined(CONFIG_GSPI_HCI) -+ #include -+ #define INTF_DATA GSPI_DATA -+#elif defined(CONFIG_PCI_HCI) -+ #include -+#endif -+ -+#define get_hw_port(adapter) (adapter->hw_port) -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ #define is_primary_adapter(adapter) (adapter->adapter_type == PRIMARY_ADAPTER) -+ #define is_vir_adapter(adapter) (adapter->adapter_type == VIRTUAL_ADAPTER) -+#else -+ #define is_primary_adapter(adapter) (1) -+ #define is_vir_adapter(adapter) (0) -+#endif -+#define GET_PRIMARY_ADAPTER(padapter) (((_adapter *)padapter)->dvobj->padapters[IFACE_ID0]) -+#define GET_IFACE_NUMS(padapter) (((_adapter *)padapter)->dvobj->iface_nums) -+#define GET_ADAPTER(padapter, iface_id) (((_adapter *)padapter)->dvobj->padapters[iface_id]) -+ -+#define GetDefaultAdapter(padapter) padapter -+ -+enum _IFACE_ID { -+ IFACE_ID0, /*PRIMARY_ADAPTER*/ -+ IFACE_ID1, -+ IFACE_ID2, -+ IFACE_ID3, -+ IFACE_ID4, -+ IFACE_ID5, -+ IFACE_ID6, -+ IFACE_ID7, -+ IFACE_ID_MAX, -+}; -+ -+#define VIF_START_ID 1 -+ -+#ifdef CONFIG_DBG_COUNTER -+ -+struct rx_logs { -+ u32 intf_rx; -+ u32 intf_rx_err_recvframe; -+ u32 intf_rx_err_skb; -+ u32 intf_rx_report; -+ u32 core_rx; -+ u32 core_rx_pre; -+ u32 core_rx_pre_ver_err; -+ u32 core_rx_pre_mgmt; -+ u32 core_rx_pre_mgmt_err_80211w; -+ u32 core_rx_pre_mgmt_err; -+ u32 core_rx_pre_ctrl; -+ u32 core_rx_pre_ctrl_err; -+ u32 core_rx_pre_data; -+ u32 core_rx_pre_data_wapi_seq_err; -+ u32 core_rx_pre_data_wapi_key_err; -+ u32 core_rx_pre_data_handled; -+ u32 core_rx_pre_data_err; -+ u32 core_rx_pre_data_unknown; -+ u32 core_rx_pre_unknown; -+ u32 core_rx_enqueue; -+ u32 core_rx_dequeue; -+ u32 core_rx_post; -+ u32 core_rx_post_decrypt; -+ u32 core_rx_post_decrypt_wep; -+ u32 core_rx_post_decrypt_tkip; -+ u32 core_rx_post_decrypt_aes; -+ u32 core_rx_post_decrypt_wapi; -+ u32 core_rx_post_decrypt_gcmp; -+ u32 core_rx_post_decrypt_hw; -+ u32 core_rx_post_decrypt_unknown; -+ u32 core_rx_post_decrypt_err; -+ u32 core_rx_post_defrag_err; -+ u32 core_rx_post_portctrl_err; -+ u32 core_rx_post_indicate; -+ u32 core_rx_post_indicate_in_oder; -+ u32 core_rx_post_indicate_reoder; -+ u32 core_rx_post_indicate_err; -+ u32 os_indicate; -+ u32 os_indicate_ap_mcast; -+ u32 os_indicate_ap_forward; -+ u32 os_indicate_ap_self; -+ u32 os_indicate_err; -+ u32 os_netif_ok; -+ u32 os_netif_err; -+}; -+ -+struct tx_logs { -+ u32 os_tx; -+ u32 os_tx_err_up; -+ u32 os_tx_err_xmit; -+ u32 os_tx_m2u; -+ u32 os_tx_m2u_ignore_fw_linked; -+ u32 os_tx_m2u_ignore_self; -+ u32 os_tx_m2u_entry; -+ u32 os_tx_m2u_entry_err_xmit; -+ u32 os_tx_m2u_entry_err_skb; -+ u32 os_tx_m2u_stop; -+ u32 core_tx; -+ u32 core_tx_err_pxmitframe; -+ u32 core_tx_err_brtx; -+ u32 core_tx_upd_attrib; -+ u32 core_tx_upd_attrib_adhoc; -+ u32 core_tx_upd_attrib_sta; -+ u32 core_tx_upd_attrib_ap; -+ u32 core_tx_upd_attrib_unknown; -+ u32 core_tx_upd_attrib_dhcp; -+ u32 core_tx_upd_attrib_icmp; -+ u32 core_tx_upd_attrib_active; -+ u32 core_tx_upd_attrib_err_ucast_sta; -+ u32 core_tx_upd_attrib_err_ucast_ap_link; -+ u32 core_tx_upd_attrib_err_sta; -+ u32 core_tx_upd_attrib_err_link; -+ u32 core_tx_upd_attrib_err_sec; -+ u32 core_tx_ap_enqueue_warn_fwstate; -+ u32 core_tx_ap_enqueue_warn_sta; -+ u32 core_tx_ap_enqueue_warn_nosta; -+ u32 core_tx_ap_enqueue_warn_link; -+ u32 core_tx_ap_enqueue_warn_trigger; -+ u32 core_tx_ap_enqueue_mcast; -+ u32 core_tx_ap_enqueue_ucast; -+ u32 core_tx_ap_enqueue; -+ u32 intf_tx; -+ u32 intf_tx_pending_ac; -+ u32 intf_tx_pending_fw_under_survey; -+ u32 intf_tx_pending_fw_under_linking; -+ u32 intf_tx_pending_xmitbuf; -+ u32 intf_tx_enqueue; -+ u32 core_tx_enqueue; -+ u32 core_tx_enqueue_class; -+ u32 core_tx_enqueue_class_err_sta; -+ u32 core_tx_enqueue_class_err_nosta; -+ u32 core_tx_enqueue_class_err_fwlink; -+ u32 intf_tx_direct; -+ u32 intf_tx_direct_err_coalesce; -+ u32 intf_tx_dequeue; -+ u32 intf_tx_dequeue_err_coalesce; -+ u32 intf_tx_dump_xframe; -+ u32 intf_tx_dump_xframe_err_txdesc; -+ u32 intf_tx_dump_xframe_err_port; -+}; -+ -+struct int_logs { -+ u32 all; -+ u32 err; -+ u32 tbdok; -+ u32 tbder; -+ u32 bcnderr; -+ u32 bcndma; -+ u32 bcndma_e; -+ u32 rx; -+ u32 rx_rdu; -+ u32 rx_fovw; -+ u32 txfovw; -+ u32 mgntok; -+ u32 highdok; -+ u32 bkdok; -+ u32 bedok; -+ u32 vidok; -+ u32 vodok; -+}; -+ -+#endif /* CONFIG_DBG_COUNTER */ -+ -+struct debug_priv { -+ u32 dbg_sdio_free_irq_error_cnt; -+ u32 dbg_sdio_alloc_irq_error_cnt; -+ u32 dbg_sdio_free_irq_cnt; -+ u32 dbg_sdio_alloc_irq_cnt; -+ u32 dbg_sdio_deinit_error_cnt; -+ u32 dbg_sdio_init_error_cnt; -+ u32 dbg_suspend_error_cnt; -+ u32 dbg_suspend_cnt; -+ u32 dbg_resume_cnt; -+ u32 dbg_resume_error_cnt; -+ u32 dbg_deinit_fail_cnt; -+ u32 dbg_carddisable_cnt; -+ u32 dbg_carddisable_error_cnt; -+ u32 dbg_ps_insuspend_cnt; -+ u32 dbg_dev_unload_inIPS_cnt; -+ u32 dbg_wow_leave_ps_fail_cnt; -+ u32 dbg_scan_pwr_state_cnt; -+ u32 dbg_downloadfw_pwr_state_cnt; -+ u32 dbg_fw_read_ps_state_fail_cnt; -+ u32 dbg_leave_ips_fail_cnt; -+ u32 dbg_leave_lps_fail_cnt; -+ u32 dbg_h2c_leave32k_fail_cnt; -+ u32 dbg_diswow_dload_fw_fail_cnt; -+ u32 dbg_enwow_dload_fw_fail_cnt; -+ u32 dbg_ips_drvopen_fail_cnt; -+ u32 dbg_poll_fail_cnt; -+ u32 dbg_rpwm_toogle_cnt; -+ u32 dbg_rpwm_timeout_fail_cnt; -+ u32 dbg_sreset_cnt; -+ u32 dbg_fw_mem_dl_error_cnt; -+ u64 dbg_rx_fifo_last_overflow; -+ u64 dbg_rx_fifo_curr_overflow; -+ u64 dbg_rx_fifo_diff_overflow; -+}; -+ -+struct rtw_traffic_statistics { -+ /* tx statistics */ -+ u64 tx_bytes; -+ u64 tx_pkts; -+ u64 tx_drop; -+ u64 cur_tx_bytes; -+ u64 last_tx_bytes; -+ u32 cur_tx_tp; /* Tx throughput in Mbps. */ -+ -+ /* rx statistics */ -+ u64 rx_bytes; -+ u64 rx_pkts; -+ u64 rx_drop; -+ u64 cur_rx_bytes; -+ u64 last_rx_bytes; -+ u32 cur_rx_tp; /* Rx throughput in Mbps. */ -+}; -+ -+#define SEC_CAP_CHK_BMC BIT0 -+#define SEC_CAP_CHK_EXTRA_SEC BIT1 /* 256 bit */ -+#define SEC_CAP_CHK_WRITE_CAM_NEW_RULE BIT2 -+ -+#define MACID_DROP BIT0 -+#define MACID_DROP_INDIRECT BIT1 -+ -+#define SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH BIT0 -+ -+struct sec_cam_bmp { -+ u32 m0; -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32) -+ u32 m1; -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64) -+ u32 m2; -+#endif -+#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96) -+ u32 m3; -+#endif -+}; -+ -+struct cam_ctl_t { -+ _lock lock; -+ -+ u8 sec_cap; -+ u32 flags; -+ -+ u8 num; -+ struct sec_cam_bmp used; -+ -+ _mutex sec_cam_access_mutex; -+}; -+ -+struct sec_cam_ent { -+ u16 ctrl; -+ u8 mac[ETH_ALEN]; -+ u8 key[16]; -+}; -+ -+#define KEY_FMT "%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" -+#define KEY_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \ -+ ((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9], ((u8 *)(x))[10], ((u8 *)(x))[11], \ -+ ((u8 *)(x))[12], ((u8 *)(x))[13], ((u8 *)(x))[14], ((u8 *)(x))[15] -+ -+#define RTW_DEFAULT_MGMT_MACID 1 -+ -+struct macid_bmp { -+ u32 m0; -+#if (MACID_NUM_SW_LIMIT > 32) -+ u32 m1; -+#endif -+#if (MACID_NUM_SW_LIMIT > 64) -+ u32 m2; -+#endif -+#if (MACID_NUM_SW_LIMIT > 96) -+ u32 m3; -+#endif -+}; -+ -+#ifdef CONFIG_CLIENT_PORT_CFG -+struct clt_port_t{ -+ _lock lock; -+ u8 bmp; -+ s8 num; -+}; -+#define get_clt_num(adapter) (adapter_to_dvobj(adapter)->clt_port.num) -+#endif -+ -+struct macid_ctl_t { -+ _lock lock; -+ u8 num; -+ struct macid_bmp used; -+ struct macid_bmp bmc; -+ struct macid_bmp if_g[CONFIG_IFACE_NUMBER]; -+ struct macid_bmp ch_g[2]; /* 2 ch concurrency */ -+ -+ u8 iface_bmc[CONFIG_IFACE_NUMBER]; /* bmc TX macid for each iface*/ -+ -+ u8 h2c_msr[MACID_NUM_SW_LIMIT]; -+ u8 bw[MACID_NUM_SW_LIMIT]; -+ u8 vht_en[MACID_NUM_SW_LIMIT]; -+ u32 rate_bmp0[MACID_NUM_SW_LIMIT]; -+ u32 rate_bmp1[MACID_NUM_SW_LIMIT]; -+ u8 op_num[H2C_MSR_ROLE_MAX]; /* number of macid having h2c_msr's OPMODE = 1 for specific ROLE */ -+ -+ struct sta_info *sta[MACID_NUM_SW_LIMIT]; /* corresponding stainfo when macid is not shared */ -+ u8 macid_cap; -+ /* macid sleep registers */ -+#ifdef CONFIG_PROTSEL_MACSLEEP -+ u16 reg_sleep_ctrl; -+ u16 reg_sleep_info; -+ u16 reg_drop_ctrl; -+ u16 reg_drop_info; -+#else -+ u16 reg_sleep_m0; -+ u16 reg_drop_m0; -+#if (MACID_NUM_SW_LIMIT > 32) -+ u16 reg_sleep_m1; -+ u16 reg_drop_m1; -+#endif -+#if (MACID_NUM_SW_LIMIT > 64) -+ u16 reg_sleep_m2; -+ u16 reg_drop_m2; -+#endif -+#if (MACID_NUM_SW_LIMIT > 96) -+ u16 reg_sleep_m3; -+ u16 reg_drop_m3; -+#endif -+#endif -+ u16 macid_txrpt; -+ u8 macid_txrpt_pgsz; -+}; -+ -+/* used for rf_ctl_t.rate_bmp_cck_ofdm */ -+#define RATE_BMP_CCK 0x000F -+#define RATE_BMP_OFDM 0xFFF0 -+#define RATE_BMP_HAS_CCK(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_CCK) -+#define RATE_BMP_HAS_OFDM(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_OFDM) -+#define RATE_BMP_GET_CCK(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_CCK) -+#define RATE_BMP_GET_OFDM(_bmp_cck_ofdm) ((_bmp_cck_ofdm & RATE_BMP_OFDM) >> 4) -+ -+/* used for rf_ctl_t.rate_bmp_ht_by_bw */ -+#define RATE_BMP_HT_1SS 0x000000FF -+#define RATE_BMP_HT_2SS 0x0000FF00 -+#define RATE_BMP_HT_3SS 0x00FF0000 -+#define RATE_BMP_HT_4SS 0xFF000000 -+#define RATE_BMP_HAS_HT_1SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_1SS) -+#define RATE_BMP_HAS_HT_2SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_2SS) -+#define RATE_BMP_HAS_HT_3SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_3SS) -+#define RATE_BMP_HAS_HT_4SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_4SS) -+#define RATE_BMP_GET_HT_1SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_1SS) -+#define RATE_BMP_GET_HT_2SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_2SS) >> 8) -+#define RATE_BMP_GET_HT_3SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_3SS) >> 16) -+#define RATE_BMP_GET_HT_4SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_4SS) >> 24) -+ -+/* used for rf_ctl_t.rate_bmp_vht_by_bw */ -+#define RATE_BMP_VHT_1SS 0x00000003FF -+#define RATE_BMP_VHT_2SS 0x00000FFC00 -+#define RATE_BMP_VHT_3SS 0x003FF00000 -+#define RATE_BMP_VHT_4SS 0xFFC0000000 -+#define RATE_BMP_HAS_VHT_1SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_1SS) -+#define RATE_BMP_HAS_VHT_2SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_2SS) -+#define RATE_BMP_HAS_VHT_3SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_3SS) -+#define RATE_BMP_HAS_VHT_4SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_4SS) -+#define RATE_BMP_GET_VHT_1SS(_bmp_vht) ((u16)(_bmp_vht & RATE_BMP_VHT_1SS)) -+#define RATE_BMP_GET_VHT_2SS(_bmp_vht) ((u16)((_bmp_vht & RATE_BMP_VHT_2SS) >> 10)) -+#define RATE_BMP_GET_VHT_3SS(_bmp_vht) ((u16)((_bmp_vht & RATE_BMP_VHT_3SS) >> 20)) -+#define RATE_BMP_GET_VHT_4SS(_bmp_vht) ((u16)((_bmp_vht & RATE_BMP_VHT_4SS) >> 30)) -+ -+#define TXPWR_LMT_REF_VHT_FROM_HT BIT0 -+#define TXPWR_LMT_REF_HT_FROM_VHT BIT1 -+ -+#define TXPWR_LMT_HAS_CCK_1T BIT0 -+#define TXPWR_LMT_HAS_CCK_2T BIT1 -+#define TXPWR_LMT_HAS_CCK_3T BIT2 -+#define TXPWR_LMT_HAS_CCK_4T BIT3 -+#define TXPWR_LMT_HAS_OFDM_1T BIT4 -+#define TXPWR_LMT_HAS_OFDM_2T BIT5 -+#define TXPWR_LMT_HAS_OFDM_3T BIT6 -+#define TXPWR_LMT_HAS_OFDM_4T BIT7 -+ -+#define OFFCHS_NONE 0 -+#define OFFCHS_LEAVING_OP 1 -+#define OFFCHS_LEAVE_OP 2 -+#define OFFCHS_BACKING_OP 3 -+ -+#define TPC_MODE_DISABLE 0 -+#define TPC_MODE_MANUAL 1 -+#define TPC_MODE_INVALID 2 /* keep last */ -+ -+#define TPC_MANUAL_CONSTRAINT_MAX 600 /* mB */ -+ -+struct rf_ctl_t { -+ enum regd_src_t regd_src; -+ const struct country_chplan *country_ent; -+ u8 ChannelPlan; -+ u8 max_chan_nums; -+ RT_CHANNEL_INFO channel_set[MAX_CHANNEL_NUM]; -+ struct op_class_pref_t **spt_op_class_ch; -+ u8 cap_spt_op_class_num; -+ u8 reg_spt_op_class_num; -+ u8 cur_spt_op_class_num; -+ struct p2p_channels channel_list; -+#ifdef CONFIG_RTW_MBO -+ struct npref_ch_rtp ch_rtp; -+#endif -+ -+ s16 antenna_gain; /* mBi */ -+ -+ u8 op_class; -+ u8 op_ch; -+ s16 op_txpwr_max; /* EIRP in mBm */ -+ u8 if_op_class[CONFIG_IFACE_NUMBER]; -+ u8 if_op_ch[CONFIG_IFACE_NUMBER]; -+ -+ _mutex offch_mutex; -+ u8 offch_state; -+ -+ /* used for debug or by tx power limit */ -+ u16 rate_bmp_cck_ofdm; /* 20MHz */ -+ u32 rate_bmp_ht_by_bw[2]; /* 20MHz, 40MHz. 4SS supported */ -+ u64 rate_bmp_vht_by_bw[4]; /* 20MHz, 40MHz, 80MHz, 160MHz. 4SS supported */ -+ -+#if CONFIG_TXPWR_LIMIT -+ u8 highest_ht_rate_bw_bmp; -+ u8 highest_vht_rate_bw_bmp; -+ -+ _mutex txpwr_lmt_mutex; -+ _list reg_exc_list; -+ u8 regd_exc_num; -+ _list txpwr_lmt_list; -+ u8 txpwr_regd_num; -+ const char *regd_name; -+ -+ u8 txpwr_lmt_2g_cck_ofdm_state; -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ u8 txpwr_lmt_5g_cck_ofdm_state; -+ u8 txpwr_lmt_5g_20_40_ref; -+ #endif -+#endif -+ u8 tpc_mode; -+ u16 tpc_manual_constraint; /* mB */ -+ -+ bool ch_sel_within_same_band; -+ -+#if CONFIG_DFS -+ u8 csa_ch; -+ u8 csa_switch_cnt; -+ u8 csa_ch_offset; -+ u8 csa_ch_width; -+ u8 csa_ch_freq_seg0; /* Channel Center Frequency Segment 0 */ -+ u8 csa_ch_freq_seg1; /* Channel Center Frequency Segment 1 */ -+ -+#ifdef CONFIG_DFS_MASTER -+ u8 dfs_region_domain; -+ _timer radar_detect_timer; -+ bool radar_detect_by_others; -+ u8 radar_detect_enabled; -+ bool radar_detected; -+ -+ u8 radar_detect_ch; -+ u8 radar_detect_bw; -+ u8 radar_detect_offset; -+ -+ systime cac_start_time; -+ systime cac_end_time; -+ u8 cac_force_stop; -+ -+#if CONFIG_DFS_SLAVE_WITH_RADAR_DETECT -+ u8 dfs_slave_with_rd; -+#endif -+ u8 dfs_ch_sel_e_flags; -+ u8 dfs_ch_sel_d_flags; -+ -+ u8 dbg_dfs_fake_radar_detect_cnt; -+ u8 dbg_dfs_radar_detect_trigger_non; -+ u8 dbg_dfs_choose_dfs_ch_first; -+#endif /* CONFIG_DFS_MASTER */ -+#endif /* CONFIG_DFS */ -+}; -+ -+struct wow_ctl_t { -+ u8 wow_cap; -+}; -+ -+#define WOW_CAP_TKIP_OL BIT0 -+ -+#define RTW_CAC_STOPPED 0 -+#ifdef CONFIG_DFS_MASTER -+#define IS_CAC_STOPPED(rfctl) ((rfctl)->cac_end_time == RTW_CAC_STOPPED) -+#define IS_CH_WAITING(rfctl) (!IS_CAC_STOPPED(rfctl) && rtw_time_after((rfctl)->cac_end_time, rtw_get_current_time())) -+#define IS_UNDER_CAC(rfctl) (IS_CH_WAITING(rfctl) && rtw_time_after(rtw_get_current_time(), (rfctl)->cac_start_time)) -+#define IS_RADAR_DETECTED(rfctl) ((rfctl)->radar_detected) -+#else -+#define IS_CAC_STOPPED(rfctl) 1 -+#define IS_CH_WAITING(rfctl) 0 -+#define IS_UNDER_CAC(rfctl) 0 -+#define IS_RADAR_DETECTED(rfctl) 0 -+#endif /* CONFIG_DFS_MASTER */ -+ -+#if CONFIG_DFS_SLAVE_WITH_RADAR_DETECT -+#define IS_DFS_SLAVE_WITH_RD(rfctl) ((rfctl)->dfs_slave_with_rd) -+#else -+#define IS_DFS_SLAVE_WITH_RD(rfctl) 0 -+#endif -+ -+#ifdef CONFIG_MBSSID_CAM -+#define TOTAL_MBID_CAM_NUM 8 -+#define INVALID_CAM_ID 0xFF -+struct mbid_cam_ctl_t { -+ _lock lock; -+ u8 bitmap; -+ ATOMIC_T mbid_entry_num; -+}; -+struct mbid_cam_cache { -+ u8 iface_id; -+ /*u8 role;*/ /*WIFI_STATION_STATE or WIFI_AP_STATE*/ -+ u8 mac_addr[ETH_ALEN]; -+}; -+#endif /*CONFIG_MBSSID_CAM*/ -+ -+#ifdef RTW_HALMAC -+struct halmac_indicator { -+ struct submit_ctx *sctx; -+ u8 *buffer; -+ u32 buf_size; -+ u32 ret_size; -+ u32 status; -+}; -+ -+struct halmacpriv { -+ /* flags */ -+#ifdef CONFIG_SDIO_HCI -+ /* -+ * Indirect Access for SDIO, -+ * 0:default, 1:enable, 2:disable -+ */ -+ u8 sdio_io_indir; -+#endif /* CONFIG_SDIO_HCI */ -+ -+ /* For asynchronous functions */ -+ struct halmac_indicator *indicator; -+ -+ /* Hardware parameters */ -+#ifdef CONFIG_SDIO_HCI -+ /* Store hardware tx queue page number setting */ -+ u16 txpage[HW_QUEUE_ENTRY]; -+#endif /* CONFIG_SDIO_HCI */ -+}; -+#endif /* RTW_HALMAC */ -+ -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+/*info for H2C-0x2C*/ -+struct dft_info { -+ u8 port_id; -+ u8 mac_id; -+}; -+#endif -+ -+#ifdef CONFIG_HW_P0_TSF_SYNC -+struct tsf_info { -+ u8 sync_port;/*port_x's tsf sync to port_0*/ -+ u8 offset; /*tsf timer offset*/ -+}; -+#endif -+ -+struct protsel { -+ _mutex mutex; /* protect this structure */ -+ ATOMIC_T refcnt; /* reference count */ -+ u32 sel; /* save the last sel port */ -+}; -+ -+#ifdef CONFIG_RTL8814B -+#define MAX_BULKOUT_NUM 7 -+#ifdef CONFIG_USB_HCI -+#define MAX_ENDPOINT_NUM 8 -+#endif -+#else -+#define MAX_BULKOUT_NUM 4 -+#ifdef CONFIG_USB_HCI -+#define MAX_ENDPOINT_NUM 6 -+#endif -+#endif -+ -+struct dvobj_priv { -+ /*-------- below is common data --------*/ -+ u8 chip_type; -+ u8 HardwareType; -+ u8 interface_type;/*USB,SDIO,SPI,PCI*/ -+ -+ ATOMIC_T bSurpriseRemoved; -+ ATOMIC_T bDriverStopped; -+ -+ s32 processing_dev_remove; -+ -+ struct debug_priv drv_dbg; -+ -+ _mutex hw_init_mutex; -+ _mutex h2c_fwcmd_mutex; -+ -+ _mutex ioctrl_mutex; -+ -+#ifdef CONFIG_RTW_CUSTOMER_STR -+ _mutex customer_str_mutex; -+ struct submit_ctx *customer_str_sctx; -+ u8 customer_str[RTW_CUSTOMER_STR_LEN]; -+#endif -+ -+ _mutex setch_mutex; -+ _mutex setbw_mutex; -+ _mutex rf_read_reg_mutex; -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+ _mutex sd_indirect_access_mutex; -+#endif -+ -+#ifdef CONFIG_SYSON_INDIRECT_ACCESS -+ _mutex syson_indirect_access_mutex; /* System On Reg R/W */ -+#endif -+ -+ unsigned char oper_channel; /* saved channel info when call set_channel_bw */ -+ unsigned char oper_bwmode; -+ unsigned char oper_ch_offset;/* PRIME_CHNL_OFFSET */ -+ systime on_oper_ch_time; -+ -+ u8 union_ch; -+ u8 union_bw; -+ u8 union_offset; -+ /* backup values when union_ch is set to 0 */ -+ u8 union_ch_bak; -+ u8 union_bw_bak; -+ u8 union_offset_bak; -+ -+ _adapter *padapters[CONFIG_IFACE_NUMBER];/*IFACE_ID_MAX*/ -+ u8 iface_nums; /* total number of ifaces used runtime */ -+ struct mi_state iface_state; -+ -+#ifdef CONFIG_AP_MODE -+ #ifdef CONFIG_SUPPORT_MULTI_BCN -+ u8 nr_ap_if; /* total interface number of ap /go /mesh / nan mode. */ -+ u16 inter_bcn_space; /* unit:ms */ -+ _queue ap_if_q; -+ u8 vap_map; -+ u8 fw_bcn_offload; -+ u8 vap_tbtt_rpt_map; -+ #endif /*CONFIG_SUPPORT_MULTI_BCN*/ -+ #ifdef CONFIG_RTW_REPEATER_SON -+ struct rtw_rson_struct rson_data; -+ #endif -+#endif -+#ifdef CONFIG_CLIENT_PORT_CFG -+ struct clt_port_t clt_port; -+#endif -+ -+#ifdef CONFIG_HW_P0_TSF_SYNC -+ struct tsf_info p0_tsf; -+#endif -+ systime periodic_tsf_update_etime; -+ _timer periodic_tsf_update_end_timer; -+ -+ struct macid_ctl_t macid_ctl; -+ -+ struct cam_ctl_t cam_ctl; -+ struct sec_cam_ent cam_cache[SEC_CAM_ENT_NUM_SW_LIMIT]; -+ -+ struct wow_ctl_t wow_ctl; -+ -+#ifdef CONFIG_MBSSID_CAM -+ struct mbid_cam_ctl_t mbid_cam_ctl; -+ struct mbid_cam_cache mbid_cam_cache[TOTAL_MBID_CAM_NUM]; -+#endif -+ -+ struct rf_ctl_t rf_ctl; -+ -+#if CONFIG_TX_AC_LIFETIME -+ struct tx_aclt_conf_t tx_aclt_force_val; -+ u8 tx_aclt_flags; -+ struct tx_aclt_conf_t tx_aclt_confs[TX_ACLT_CONF_NUM]; -+#endif -+ -+ /* In /Out Pipe information */ -+ int RtInPipe[2]; -+ int RtOutPipe[MAX_BULKOUT_NUM]; -+ u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */ -+ -+ u8 irq_alloc; -+ ATOMIC_T continual_io_error; -+ -+ ATOMIC_T disable_func; -+ -+ u8 xmit_block; -+ _lock xmit_block_lock; -+ -+ struct pwrctrl_priv pwrctl_priv; -+ -+ struct rtw_traffic_statistics traffic_stat; -+ -+#ifdef PLATFORM_LINUX -+ _thread_hdl_ rtnl_lock_holder; -+ -+ #if defined(CONFIG_IOCTL_CFG80211) && defined(RTW_SINGLE_WIPHY) -+ struct wiphy *wiphy; -+ #endif -+#endif /* PLATFORM_LINUX */ -+ -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+ _timer txbcn_timer; -+#endif -+ _timer dynamic_chk_timer; /* dynamic/periodic check timer */ -+ -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+ u8 en_napi_dynamic; -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+ -+#ifdef RTW_HALMAC -+ void *halmac; -+ struct halmacpriv hmpriv; -+#endif /* RTW_HALMAC */ -+ -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ /*info for H2C-0x2C*/ -+ struct dft_info dft; -+#endif -+ -+#ifdef CONFIG_RTW_WIFI_HAL -+ u32 nodfs; -+#endif -+ -+ /*-------- below is for SDIO INTERFACE --------*/ -+ -+#ifdef INTF_DATA -+ INTF_DATA intf_data; -+#endif -+#ifdef INTF_OPS -+ INTF_OPS intf_ops; -+#endif -+ -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ u8 tx_aval_int_thr_mode;/* if 0=>threhold set by reques(default) ;if 1=>fixed by proc; if 2: fixed by sdio_tx_max_len */ -+ u8 tx_aval_int_thr_value; -+#endif/*CONFIG_SDIO_TX_ENABLE_AVAL_INT*/ -+ -+ /*-------- below is for USB INTERFACE --------*/ -+ -+#ifdef CONFIG_USB_HCI -+ -+ u8 usb_speed; /* 1.1, 2.0 or 3.0 */ -+ u8 nr_endpoint; -+ u8 RtNumInPipes; -+ u8 RtNumOutPipes; -+ int ep_num[MAX_ENDPOINT_NUM]; /* endpoint number */ -+ -+ int RegUsbSS; -+ -+ _sema usb_suspend_sema; -+ -+#ifdef CONFIG_USB_VENDOR_REQ_MUTEX -+ _mutex usb_vendor_req_mutex; -+#endif -+ -+#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC -+ u8 *usb_alloc_vendor_req_buf; -+ u8 *usb_vendor_req_buf; -+#endif -+ -+#ifdef PLATFORM_LINUX -+ struct usb_interface *pusbintf; -+ struct usb_device *pusbdev; -+#endif/* PLATFORM_LINUX */ -+ -+#ifdef PLATFORM_FREEBSD -+ struct usb_interface *pusbintf; -+ struct usb_device *pusbdev; -+#endif/* PLATFORM_FREEBSD */ -+ -+#endif/* CONFIG_USB_HCI */ -+ -+ /*-------- below is for PCIE INTERFACE --------*/ -+ -+#ifdef CONFIG_PCI_HCI -+ -+#ifdef PLATFORM_LINUX -+ struct pci_dev *ppcidev; -+ -+ /* PCI MEM map */ -+ unsigned long pci_mem_end; /* shared mem end */ -+ unsigned long pci_mem_start; /* shared mem start */ -+ -+ /* PCI IO map */ -+ unsigned long pci_base_addr; /* device I/O address */ -+ -+#ifdef CONFIG_PLATFORM_RTK129X -+ unsigned long ctrl_start; -+ /* PCI MASK addr */ -+ unsigned long mask_addr; -+ -+ /* PCI TRANSLATE addr */ -+ unsigned long tran_addr; -+ -+ _lock io_reg_lock; -+#endif -+ -+ /* PciBridge */ -+ struct pci_priv pcipriv; -+ -+ unsigned int irq; /* get from pci_dev.irq, store to net_device.irq */ -+ u16 irqline; -+ u8 irq_enabled; -+ RT_ISR_CONTENT isr_content; -+ _lock irq_th_lock; -+ -+ u8 bdma64; -+#endif/* PLATFORM_LINUX */ -+ -+#endif/* CONFIG_PCI_HCI */ -+ -+#ifdef CONFIG_MCC_MODE -+ struct mcc_obj_priv mcc_objpriv; -+#endif /*CONFIG_MCC_MODE */ -+ -+#ifdef CONFIG_RTW_TPT_MODE -+ u8 tpt_mode; /* RTK T/P Testing Mode, 0:default mode */ -+ u32 edca_be_ul; -+ u32 edca_be_dl; -+#endif -+ /* also for RTK T/P Testing Mode */ -+ u8 scan_deny; -+ -+ /* protect sel to safely access */ -+#ifdef CONFIG_PROTSEL_PORT -+ struct protsel protsel_port; -+#endif -+#ifdef CONFIG_PROTSEL_ATIMDTIM -+ struct protsel protsel_atimdtim; -+#endif -+#ifdef CONFIG_PROTSEL_MACSLEEP -+ struct protsel protsel_macsleep; -+#endif -+#ifdef CONFIG_WOWLAN -+ u8 bcn_ctrl_clint3_bf_suspend; -+ u16 rxfltmap2_bf_suspend; -+ u8 lifetime_en; -+ u32 pkt_lifetime; -+ u32 rcr_bf_suspend; -+ u32 cr_ext_bf_suspend; -+#endif /* CONFIG_WOWLAN */ -+}; -+ -+#define DEV_STA_NUM(_dvobj) MSTATE_STA_NUM(&((_dvobj)->iface_state)) -+#define DEV_STA_LD_NUM(_dvobj) MSTATE_STA_LD_NUM(&((_dvobj)->iface_state)) -+#define DEV_STA_LG_NUM(_dvobj) MSTATE_STA_LG_NUM(&((_dvobj)->iface_state)) -+#define DEV_TDLS_LD_NUM(_dvobj) MSTATE_TDLS_LD_NUM(&((_dvobj)->iface_state)) -+#define DEV_AP_NUM(_dvobj) MSTATE_AP_NUM(&((_dvobj)->iface_state)) -+#define DEV_AP_STARTING_NUM(_dvobj) MSTATE_AP_STARTING_NUM(&((_dvobj)->iface_state)) -+#define DEV_AP_LD_NUM(_dvobj) MSTATE_AP_LD_NUM(&((_dvobj)->iface_state)) -+#define DEV_ADHOC_NUM(_dvobj) MSTATE_ADHOC_NUM(&((_dvobj)->iface_state)) -+#define DEV_ADHOC_LD_NUM(_dvobj) MSTATE_ADHOC_LD_NUM(&((_dvobj)->iface_state)) -+#define DEV_MESH_NUM(_dvobj) MSTATE_MESH_NUM(&((_dvobj)->iface_state)) -+#define DEV_MESH_LD_NUM(_dvobj) MSTATE_MESH_LD_NUM(&((_dvobj)->iface_state)) -+#define DEV_P2P_DV_NUM(_dvobj) MSTATE_P2P_DV_NUM(&((_dvobj)->iface_state)) -+#define DEV_P2P_GC_NUM(_dvobj) MSTATE_P2P_GC_NUM(&((_dvobj)->iface_state)) -+#define DEV_P2P_GO_NUM(_dvobj) MSTATE_P2P_GO_NUM(&((_dvobj)->iface_state)) -+#define DEV_SCAN_NUM(_dvobj) MSTATE_SCAN_NUM(&((_dvobj)->iface_state)) -+#define DEV_WPS_NUM(_dvobj) MSTATE_WPS_NUM(&((_dvobj)->iface_state)) -+#define DEV_ROCH_NUM(_dvobj) MSTATE_ROCH_NUM(&((_dvobj)->iface_state)) -+#define DEV_MGMT_TX_NUM(_dvobj) MSTATE_MGMT_TX_NUM(&((_dvobj)->iface_state)) -+ -+#define DEV_U_CH(_dvobj) ((_dvobj)->union_ch) -+#define DEV_U_BW(_dvobj) ((_dvobj)->union_bw) -+#define DEV_U_OFFSET(_dvobj) ((_dvobj)->union_offset) -+ -+#define dvobj_to_pwrctl(dvobj) (&(dvobj->pwrctl_priv)) -+#define pwrctl_to_dvobj(pwrctl) container_of(pwrctl, struct dvobj_priv, pwrctl_priv) -+#define dvobj_to_macidctl(dvobj) (&(dvobj->macid_ctl)) -+#define dvobj_to_sec_camctl(dvobj) (&(dvobj->cam_ctl)) -+#define dvobj_to_regsty(dvobj) (&(dvobj->padapters[IFACE_ID0]->registrypriv)) -+#if defined(CONFIG_IOCTL_CFG80211) && defined(RTW_SINGLE_WIPHY) -+#define dvobj_to_wiphy(dvobj) ((dvobj)->wiphy) -+#endif -+#define dvobj_to_rfctl(dvobj) (&(dvobj->rf_ctl)) -+#define rfctl_to_dvobj(rfctl) container_of((rfctl), struct dvobj_priv, rf_ctl) -+ -+static inline void dev_set_surprise_removed(struct dvobj_priv *dvobj) -+{ -+ ATOMIC_SET(&dvobj->bSurpriseRemoved, _TRUE); -+} -+static inline void dev_clr_surprise_removed(struct dvobj_priv *dvobj) -+{ -+ ATOMIC_SET(&dvobj->bSurpriseRemoved, _FALSE); -+} -+static inline void dev_set_drv_stopped(struct dvobj_priv *dvobj) -+{ -+ ATOMIC_SET(&dvobj->bDriverStopped, _TRUE); -+} -+static inline void dev_clr_drv_stopped(struct dvobj_priv *dvobj) -+{ -+ ATOMIC_SET(&dvobj->bDriverStopped, _FALSE); -+} -+#define dev_is_surprise_removed(dvobj) (ATOMIC_READ(&dvobj->bSurpriseRemoved) == _TRUE) -+#define dev_is_drv_stopped(dvobj) (ATOMIC_READ(&dvobj->bDriverStopped) == _TRUE) -+ -+#ifdef PLATFORM_LINUX -+static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj) -+{ -+ /* todo: get interface type from dvobj and the return the dev accordingly */ -+#ifdef RTW_DVOBJ_CHIP_HW_TYPE -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ return &dvobj->pusbintf->dev; -+#endif -+#ifdef CONFIG_SDIO_HCI -+ return &dvobj->intf_data.func->dev; -+#endif -+#ifdef CONFIG_GSPI_HCI -+ return &dvobj->intf_data.func->dev; -+#endif -+#ifdef CONFIG_PCI_HCI -+ return &dvobj->ppcidev->dev; -+#endif -+} -+#endif -+ -+_adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj); -+_adapter *dvobj_get_unregisterd_adapter(struct dvobj_priv *dvobj); -+_adapter *dvobj_get_adapter_by_addr(struct dvobj_priv *dvobj, u8 *addr); -+#define dvobj_get_primary_adapter(dvobj) ((dvobj)->padapters[IFACE_ID0]) -+ -+enum _hw_port { -+ HW_PORT0, -+ HW_PORT1, -+ HW_PORT2, -+ HW_PORT3, -+ HW_PORT4, -+ MAX_HW_PORT, -+}; -+ -+#ifdef CONFIG_CLIENT_PORT_CFG -+enum _client_port { -+ CLT_PORT0 = HW_PORT1, -+ CLT_PORT1 = HW_PORT2, -+ CLT_PORT2 = HW_PORT3, -+ CLT_PORT3 = HW_PORT4, -+ CLT_PORT_INVALID = HW_PORT0, -+}; -+ -+#define MAX_CLIENT_PORT_NUM 4 -+#define get_clt_port(adapter) (adapter->client_port) -+#endif -+ -+enum _ADAPTER_TYPE { -+ PRIMARY_ADAPTER, -+ VIRTUAL_ADAPTER, -+ MAX_ADAPTER = 0xFF, -+}; -+ -+typedef enum _DRIVER_STATE { -+ DRIVER_NORMAL = 0, -+ DRIVER_DISAPPEAR = 1, -+ DRIVER_REPLACE_DONGLE = 2, -+} DRIVER_STATE; -+ -+#ifdef CONFIG_RTW_NAPI -+enum _NAPI_STATE { -+ NAPI_DISABLE = 0, -+ NAPI_ENABLE = 1, -+}; -+#endif -+ -+#ifdef CONFIG_MAC_LOOPBACK_DRIVER -+typedef struct loopbackdata { -+ _sema sema; -+ _thread_hdl_ lbkthread; -+ u8 bstop; -+ u32 cnt; -+ u16 size; -+ u16 txsize; -+ u8 txbuf[0x8000]; -+ u16 rxsize; -+ u8 rxbuf[0x8000]; -+ u8 msg[100]; -+ -+} LOOPBACKDATA, *PLOOPBACKDATA; -+#endif -+ -+#define ADAPTER_TX_BW_2G(adapter) BW_MODE_2G((adapter)->driver_tx_bw_mode) -+#define ADAPTER_TX_BW_5G(adapter) BW_MODE_5G((adapter)->driver_tx_bw_mode) -+ -+struct _ADAPTER { -+ int DriverState;/* for disable driver using module, use dongle to replace module. */ -+ int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */ -+ int bDongle;/* build-in module or external dongle */ -+ -+ #if defined(CONFIG_AP_MODE) && defined(CONFIG_SUPPORT_MULTI_BCN) -+ _list list; -+ u8 vap_id; -+ #endif -+ struct dvobj_priv *dvobj; -+ struct mlme_priv mlmepriv; -+ struct mlme_ext_priv mlmeextpriv; -+ struct cmd_priv cmdpriv; -+ struct evt_priv evtpriv; -+ -+#ifdef CONFIG_RTW_80211K -+ struct rm_priv rmpriv; -+#endif -+ /* struct io_queue *pio_queue; */ -+ struct io_priv iopriv; -+ struct xmit_priv xmitpriv; -+ struct recv_priv recvpriv; -+ struct sta_priv stapriv; -+ struct security_priv securitypriv; -+ _lock security_key_mutex; /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ struct registry_priv registrypriv; -+ -+#ifdef CONFIG_RTW_NAPI -+ struct napi_struct napi; -+ u8 napi_state; -+#endif -+ -+#ifdef CONFIG_MP_INCLUDED -+ struct mp_priv mppriv; -+#endif -+ -+#ifdef CONFIG_AP_MODE -+ struct hostapd_priv *phostapdpriv; -+#endif -+ -+#if defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_IOCTL_CFG80211) -+ struct roch_info rochinfo; -+#endif -+ -+ u32 setband; -+ ATOMIC_T bandskip; -+ -+#ifdef CONFIG_P2P -+ struct wifidirect_info wdinfo; -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_TDLS -+ struct tdls_info tdlsinfo; -+#endif /* CONFIG_TDLS */ -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ u8 WapiSupport; -+ RT_WAPI_T wapiInfo; -+#endif -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ u8 rtw_rson_scanstage; -+#endif -+ -+#ifdef CONFIG_WFD -+ struct wifi_display_info wfd_info; -+#endif /* CONFIG_WFD */ -+ -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ struct bt_coex_info coex_info; -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ -+ ERROR_CODE LastError; /* <20130613, Kordan> Only the functions associated with MP records the error code by now. */ -+ -+ void *HalData; -+ u32 hal_data_sz; -+ struct hal_ops hal_func; -+ -+ u32 IsrContent; -+ u32 ImrContent; -+ -+ u8 EepromAddressSize; -+ u8 bDriverIsGoingToUnload; -+ u8 init_adpt_in_progress; -+ u8 bHaltInProgress; -+#ifdef CONFIG_GPIO_API -+ u8 pre_gpio_pin; -+ struct gpio_int_priv { -+ u8 interrupt_mode; -+ u8 interrupt_enable_mask; -+ void (*callback[8])(u8 level); -+ } gpiointpriv; -+#endif -+ _thread_hdl_ cmdThread; -+#ifdef CONFIG_EVENT_THREAD_MODE -+ _thread_hdl_ evtThread; -+#endif -+#ifdef CONFIG_XMIT_THREAD_MODE -+ _thread_hdl_ xmitThread; -+#endif -+#ifdef CONFIG_RECV_THREAD_MODE -+ _thread_hdl_ recvThread; -+#endif -+ u8 registered; -+ -+ void (*intf_start)(_adapter *adapter); -+ void (*intf_stop)(_adapter *adapter); -+ -+#ifdef PLATFORM_LINUX -+ _nic_hdl pnetdev; -+ char old_ifname[IFNAMSIZ]; -+ u8 ndev_unregistering; -+ int bup; -+ struct net_device_stats stats; -+ struct iw_statistics iwstats; -+ struct proc_dir_entry *dir_dev;/* for proc directory */ -+ struct proc_dir_entry *dir_odm; -+ -+#ifdef CONFIG_MCC_MODE -+ struct proc_dir_entry *dir_mcc; -+#endif /* CONFIG_MCC_MODE */ -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ struct wireless_dev *rtw_wdev; -+ struct rtw_wdev_priv wdev_data; -+ -+#if !defined(RTW_SINGLE_WIPHY) -+ struct wiphy *wiphy; -+#endif -+ -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ void *cmap_bss_status_evt; -+ u32 cmap_bss_status_evt_len; -+ u8 cmap_unassoc_sta_measure_en; -+#endif -+ -+#endif /* PLATFORM_LINUX */ -+ -+#ifdef PLATFORM_FREEBSD -+ _nic_hdl pifp; -+ int bup; -+ _lock glock; -+#endif /* PLATFORM_FREEBSD */ -+ u8 mac_addr[ETH_ALEN]; -+ int net_closed; -+ -+ u8 netif_up; -+ -+ u8 bLinkInfoDump; -+ /* Added by Albert 2012/10/26 */ -+ /* The driver will show up the desired channel number when this flag is 1. */ -+ u8 bNotifyChannelChange; -+ u8 bsta_tp_dump; -+#ifdef CONFIG_P2P -+ /* Added by Albert 2012/12/06 */ -+ /* The driver will show the current P2P status when the upper application reads it. */ -+ u8 bShowGetP2PState; -+#endif -+ -+ u8 isprimary; /* is primary adapter or not */ -+ /* notes: -+ ** if isprimary is true, the adapter_type value is 0, iface_id is IFACE_ID0 for PRIMARY_ADAPTER -+ ** if isprimary is false, the adapter_type value is 1, iface_id is IFACE_ID1 for VIRTUAL_ADAPTER -+ ** refer to iface_id if iface_nums>2 and isprimary is false and the adapter_type value is 0xff.*/ -+ u8 adapter_type;/*be used in Multi-interface to recognize whether is PRIMARY_ADAPTER or not(PRIMARY_ADAPTER/VIRTUAL_ADAPTER) .*/ -+ u8 hw_port; /*interface port type, it depends on HW port */ -+ -+ #ifdef CONFIG_CLIENT_PORT_CFG -+ u8 client_id; -+ u8 client_port; -+ #endif -+ /*struct tsf_info tsf;*//*reserve define for 8814B*/ -+ -+ /*extend to support multi interface*/ -+ u8 iface_id; -+ -+#ifdef CONFIG_BR_EXT -+ _lock br_ext_lock; -+ /* unsigned int macclone_completed; */ -+ struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE]; -+ int pppoe_connection_in_progress; -+ unsigned char pppoe_addr[MACADDRLEN]; -+ unsigned char scdb_mac[MACADDRLEN]; -+ unsigned char scdb_ip[4]; -+ struct nat25_network_db_entry *scdb_entry; -+ unsigned char br_mac[MACADDRLEN]; -+ unsigned char br_ip[4]; -+ -+ struct br_ext_info ethBrExtInfo; -+#endif /* CONFIG_BR_EXT */ -+ -+#ifdef CONFIG_MAC_LOOPBACK_DRIVER -+ PLOOPBACKDATA ploopback; -+#endif -+#ifdef CONFIG_AP_MODE -+ u8 bmc_tx_rate; -+ #if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ u8 b2u_flags_ap_src; -+ u8 b2u_flags_ap_fwd; -+ #endif -+#endif -+ -+ /* for debug purpose */ -+ u8 fix_rate; -+ u8 fix_bw; -+ u8 data_fb; /* data rate fallback, valid only when fix_rate is not 0xff */ -+ u8 power_offset; -+ u8 driver_tx_bw_mode; -+ u8 rsvd_page_offset; -+ u8 rsvd_page_num; -+ u8 ch_clm_ratio; -+ u8 ch_nhm_ratio; -+#ifdef CONFIG_SUPPORT_FIFO_DUMP -+ u8 fifo_sel; -+ u32 fifo_addr; -+ u32 fifo_size; -+#endif -+ -+ u8 driver_vcs_en; /* Enable=1, Disable=0 driver control vrtl_carrier_sense for tx */ -+ u8 driver_vcs_type;/* force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. */ -+ u8 driver_ampdu_spacing;/* driver control AMPDU Density for peer sta's rx */ -+ u8 driver_rx_ampdu_factor;/* 0xff: disable drv ctrl, 0:8k, 1:16k, 2:32k, 3:64k; */ -+ u8 driver_rx_ampdu_spacing; /* driver control Rx AMPDU Density */ -+ u8 fix_rx_ampdu_accept; -+ u8 fix_rx_ampdu_size; /* 0~127, TODO:consider each sta and each TID */ -+#ifdef CONFIG_TX_AMSDU -+ u8 tx_amsdu; -+ u16 tx_amsdu_rate; -+#endif -+ u8 driver_tx_max_agg_num; /*fix tx desc max agg num , 0xff: disable drv ctrl*/ -+#ifdef DBG_RX_COUNTER_DUMP -+ u8 dump_rx_cnt_mode;/*BIT0:drv,BIT1:mac,BIT2:phy*/ -+ u32 drv_rx_cnt_ok; -+ u32 drv_rx_cnt_crcerror; -+ u32 drv_rx_cnt_drop; -+#endif -+ -+#ifdef CONFIG_DBG_COUNTER -+ struct rx_logs rx_logs; -+ struct tx_logs tx_logs; -+ struct int_logs int_logs; -+#endif -+ -+#ifdef CONFIG_MCC_MODE -+ struct mcc_adapter_priv mcc_adapterpriv; -+#endif /* CONFIG_MCC_MODE */ -+ -+#ifdef CONFIG_RTW_WDS -+ bool use_wds; /* for STA, AP mode */ -+ -+ /* for STA mode */ -+ struct rtw_wds_gptr_table *wds_gpt_records; -+ ATOMIC_T wds_gpt_record_num; -+ -+ /* for AP mode */ -+ #ifdef CONFIG_AP_MODE -+ struct rtw_wds_table *wds_paths; -+ ATOMIC_T wds_path_num; -+ #endif -+#endif /* CONFIG_RTW_WDS */ -+ -+#ifdef CONFIG_RTW_MULTI_AP -+ u8 multi_ap; -+ u8 ch_util_threshold; -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+ struct rtw_mesh_cfg mesh_cfg; -+ struct rtw_mesh_info mesh_info; -+ _timer mesh_path_timer; -+ _timer mesh_path_root_timer; -+ _timer mesh_atlm_param_req_timer; /* airtime link metrics param request timer */ -+ _workitem mesh_work; -+ unsigned long wrkq_flags; -+#endif /* CONFIG_RTW_MESH */ -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ ATOMIC_T tbtx_tx_pause; -+ ATOMIC_T tbtx_remove_tx_pause; -+ u8 tbtx_capability; -+ u32 tbtx_duration; -+#endif /* CONFIG_RTW_TOKEN_BASED_XMIT */ -+ -+#ifdef RTW_SIMPLE_CONFIG -+ u8 rtw_simple_config; -+#endif -+}; -+ -+#define adapter_to_dvobj(adapter) ((adapter)->dvobj) -+#define adapter_to_regsty(adapter) dvobj_to_regsty(adapter_to_dvobj((adapter))) -+#define adapter_to_pwrctl(adapter) dvobj_to_pwrctl(adapter_to_dvobj((adapter))) -+#define adapter_wdev_data(adapter) (&((adapter)->wdev_data)) -+#if defined(RTW_SINGLE_WIPHY) -+#define adapter_to_wiphy(adapter) dvobj_to_wiphy(adapter_to_dvobj(adapter)) -+#else -+#define adapter_to_wiphy(adapter) ((adapter)->wiphy) -+#endif -+ -+#define adapter_to_rfctl(adapter) dvobj_to_rfctl(adapter_to_dvobj((adapter))) -+#define adapter_to_macidctl(adapter) dvobj_to_macidctl(adapter_to_dvobj((adapter))) -+ -+#ifdef CONFIG_RTW_WDS -+#define adapter_use_wds(adapter) (adapter->use_wds) -+#define adapter_set_use_wds(adapter, en) do { \ -+ (adapter)->use_wds = (en) ? 1 : 0; \ -+ RTW_INFO(FUNC_ADPT_FMT" set use_wds=%d\n", FUNC_ADPT_ARG(adapter), (adapter)->use_wds); \ -+ } while (0) -+#else -+#define adapter_use_wds(adapter) 0 -+#endif -+ -+#define adapter_mac_addr(adapter) (adapter->mac_addr) -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+#define adapter_pno_mac_addr(adapter) \ -+ ((adapter_wdev_data(adapter))->pno_mac_addr) -+#endif -+ -+#define adapter_to_chset(adapter) (adapter_to_rfctl((adapter))->channel_set) -+ -+#define mlme_to_adapter(mlme) container_of((mlme), struct _ADAPTER, mlmepriv) -+#define tdls_info_to_adapter(tdls) container_of((tdls), struct _ADAPTER, tdlsinfo) -+ -+#define rtw_get_chip_type(adapter) (((PADAPTER)adapter)->dvobj->chip_type) -+#define rtw_get_hw_type(adapter) (((PADAPTER)adapter)->dvobj->HardwareType) -+#define rtw_get_intf_type(adapter) (((PADAPTER)adapter)->dvobj->interface_type) -+ -+#define rtw_get_mi_nums(adapter) (((PADAPTER)adapter)->dvobj->iface_nums) -+ -+static inline void rtw_set_surprise_removed(_adapter *padapter) -+{ -+ dev_set_surprise_removed(adapter_to_dvobj(padapter)); -+} -+static inline void rtw_clr_surprise_removed(_adapter *padapter) -+{ -+ dev_clr_surprise_removed(adapter_to_dvobj(padapter)); -+} -+static inline void rtw_set_drv_stopped(_adapter *padapter) -+{ -+ dev_set_drv_stopped(adapter_to_dvobj(padapter)); -+} -+static inline void rtw_clr_drv_stopped(_adapter *padapter) -+{ -+ dev_clr_drv_stopped(adapter_to_dvobj(padapter)); -+} -+#define rtw_is_surprise_removed(padapter) (dev_is_surprise_removed(adapter_to_dvobj(padapter))) -+#define rtw_is_drv_stopped(padapter) (dev_is_drv_stopped(adapter_to_dvobj(padapter))) -+ -+/* -+ * Function disabled. -+ * */ -+#define DF_TX_BIT BIT0 /*write_port_cancel*/ -+#define DF_RX_BIT BIT1 /*read_port_cancel*/ -+#define DF_IO_BIT BIT2 -+ -+/* #define RTW_DISABLE_FUNC(padapter, func) (ATOMIC_ADD(&adapter_to_dvobj(padapter)->disable_func, (func))) */ -+/* #define RTW_ENABLE_FUNC(padapter, func) (ATOMIC_SUB(&adapter_to_dvobj(padapter)->disable_func, (func))) */ -+__inline static void RTW_DISABLE_FUNC(_adapter *padapter, int func_bit) -+{ -+ int df = ATOMIC_READ(&adapter_to_dvobj(padapter)->disable_func); -+ df |= func_bit; -+ ATOMIC_SET(&adapter_to_dvobj(padapter)->disable_func, df); -+} -+ -+__inline static void RTW_ENABLE_FUNC(_adapter *padapter, int func_bit) -+{ -+ int df = ATOMIC_READ(&adapter_to_dvobj(padapter)->disable_func); -+ df &= ~(func_bit); -+ ATOMIC_SET(&adapter_to_dvobj(padapter)->disable_func, df); -+} -+ -+#define RTW_CANNOT_RUN(padapter) \ -+ (rtw_is_surprise_removed(padapter) || \ -+ rtw_is_drv_stopped(padapter)) -+ -+#define RTW_IS_FUNC_DISABLED(padapter, func_bit) (ATOMIC_READ(&adapter_to_dvobj(padapter)->disable_func) & (func_bit)) -+ -+#define RTW_CANNOT_IO(padapter) \ -+ (rtw_is_surprise_removed(padapter) || \ -+ RTW_IS_FUNC_DISABLED((padapter), DF_IO_BIT)) -+ -+#define RTW_CANNOT_RX(padapter) \ -+ (RTW_CANNOT_RUN(padapter) || \ -+ RTW_IS_FUNC_DISABLED((padapter), DF_RX_BIT)) -+ -+#define RTW_CANNOT_TX(padapter) \ -+ (RTW_CANNOT_RUN(padapter) || \ -+ RTW_IS_FUNC_DISABLED((padapter), DF_TX_BIT)) -+ -+#ifdef CONFIG_PNO_SUPPORT -+int rtw_parse_ssid_list_tlv(char **list_str, pno_ssid_t *ssid, int max, int *bytes_left); -+int rtw_dev_pno_set(struct net_device *net, pno_ssid_t *ssid, int num, -+ int pno_time, int pno_repeat, int pno_freq_expo_max); -+#ifdef CONFIG_PNO_SET_DEBUG -+ void rtw_dev_pno_debug(struct net_device *net); -+#endif /* CONFIG_PNO_SET_DEBUG */ -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+int rtw_suspend_free_assoc_resource(_adapter *padapter); -+#ifdef CONFIG_WOWLAN -+ int rtw_suspend_wow(_adapter *padapter); -+ int rtw_resume_process_wow(_adapter *padapter); -+#endif -+ -+/* HCI Related header file */ -+#ifdef CONFIG_USB_HCI -+ #include -+ #include -+ #include -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+ #include -+ #include -+ #include -+#endif -+ -+#ifdef CONFIG_GSPI_HCI -+ #include -+ #include -+ #include -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ #include -+ #include -+ #include -+#endif -+ -+#endif /* __DRV_TYPES_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/drv_types_ce.h b/drivers/staging/rtl8723cs/include/drv_types_ce.h -new file mode 100644 -index 000000000000..c00dea8e6b35 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/drv_types_ce.h -@@ -0,0 +1,86 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __DRV_TYPES_CE_H__ -+#define __DRV_TYPES_CE_H__ -+ -+#include -+#include -+ -+#include -+ -+#define MAX_ACTIVE_REG_PATH 256 -+ -+#define MAX_MCAST_LIST_NUM 32 -+ -+ -+ -+/* for ioctl */ -+#define MAKE_DRIVER_VERSION(_MainVer, _MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer) -+ -+#define NIC_HEADER_SIZE 14 /* !< can be moved to typedef.h */ -+#define NIC_MAX_PACKET_SIZE 1514 /* !< can be moved to typedef.h */ -+#define NIC_MAX_SEND_PACKETS 10 /* max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h */ -+#define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0, 001) /* !< can be moved to typedef.h */ -+#define NIC_MAX_PACKET_SIZE 1514 /* !< can be moved to typedef.h */ -+ -+typedef struct _MP_REG_ENTRY { -+ -+ NDIS_STRING RegName; /* variable name text */ -+ BOOLEAN bRequired; /* 1->required, 0->optional */ -+ -+ u8 Type; /* NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString */ -+ uint FieldOffset; /* offset to MP_ADAPTER field */ -+ uint FieldSize; /* size (in bytes) of the field */ -+ -+#ifdef UNDER_AMD64 -+ u64 Default; -+#else -+ u32 Default; /* default value to use */ -+#endif -+ -+ u32 Min; /* minimum value allowed */ -+ u32 Max; /* maximum value allowed */ -+} MP_REG_ENTRY, *PMP_REG_ENTRY; -+ -+#ifdef CONFIG_USB_HCI -+typedef struct _USB_EXTENSION { -+ LPCUSB_FUNCS _lpUsbFuncs; -+ USB_HANDLE _hDevice; -+ PVOID pAdapter; -+ -+#if 0 -+ USB_ENDPOINT_DESCRIPTOR _endpACLIn; -+ USB_ENDPOINT_DESCRIPTOR _endpACLOutHigh; -+ USB_ENDPOINT_DESCRIPTOR _endpACLOutNormal; -+ -+ USB_PIPE pPipeIn; -+ USB_PIPE pPipeOutNormal; -+ USB_PIPE pPipeOutHigh; -+#endif -+ -+} USB_EXTENSION, *PUSB_EXTENSION; -+#endif -+ -+ -+typedef struct _OCTET_STRING { -+ u8 *Octet; -+ u16 Length; -+} OCTET_STRING, *POCTET_STRING; -+ -+ -+ -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/drv_types_gspi.h b/drivers/staging/rtl8723cs/include/drv_types_gspi.h -new file mode 100644 -index 000000000000..c22c4972232d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/drv_types_gspi.h -@@ -0,0 +1,49 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __DRV_TYPES_GSPI_H__ -+#define __DRV_TYPES_GSPI_H__ -+ -+/* SPI Header Files */ -+#ifdef PLATFORM_LINUX -+ #include -+ #include -+ #include -+ /* #include */ -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+#endif -+ -+ -+typedef struct gspi_data { -+ u8 func_number; -+ -+ u8 tx_block_mode; -+ u8 rx_block_mode; -+ u32 block_transfer_len; -+ -+#ifdef PLATFORM_LINUX -+ struct spi_device *func; -+ -+ struct workqueue_struct *priv_wq; -+ struct delayed_work irq_work; -+#endif -+} GSPI_DATA, *PGSPI_DATA; -+ -+#endif /* #ifndef __DRV_TYPES_GSPI_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/drv_types_linux.h b/drivers/staging/rtl8723cs/include/drv_types_linux.h -new file mode 100644 -index 000000000000..91ca68b39c26 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/drv_types_linux.h -@@ -0,0 +1,19 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __DRV_TYPES_LINUX_H__ -+#define __DRV_TYPES_LINUX_H__ -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/drv_types_pci.h b/drivers/staging/rtl8723cs/include/drv_types_pci.h -new file mode 100644 -index 000000000000..2c550ecc0bed ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/drv_types_pci.h -@@ -0,0 +1,60 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __DRV_TYPES_PCI_H__ -+#define __DRV_TYPES_PCI_H__ -+ -+#ifdef PLATFORM_LINUX -+ #include -+#endif -+ -+#define INTEL_VENDOR_ID 0x8086 -+#define SIS_VENDOR_ID 0x1039 -+#define ATI_VENDOR_ID 0x1002 -+#define ATI_DEVICE_ID 0x7914 -+#define AMD_VENDOR_ID 0x1022 -+ -+#define PCI_VENDER_ID_REALTEK 0x10ec -+ -+enum aspm_mode { -+ ASPM_MODE_UND, -+ ASPM_MODE_PERF, -+ ASPM_MODE_PS, -+ ASPM_MODE_DEF, -+}; -+ -+struct pci_priv { -+ BOOLEAN pci_clk_req; -+ -+ u8 pciehdr_offset; -+ -+ u8 linkctrl_reg; -+ u8 pcibridge_linkctrlreg; -+ -+ u8 amd_l1_patch; -+ -+#ifdef CONFIG_PCI_DYNAMIC_ASPM -+ u8 aspm_mode; -+#endif -+}; -+ -+typedef struct _RT_ISR_CONTENT { -+ union { -+ u32 IntArray[2]; -+ u32 IntReg4Byte; -+ u16 IntReg2Byte; -+ }; -+} RT_ISR_CONTENT, *PRT_ISR_CONTENT; -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/drv_types_sdio.h b/drivers/staging/rtl8723cs/include/drv_types_sdio.h -new file mode 100644 -index 000000000000..29006d981aa3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/drv_types_sdio.h -@@ -0,0 +1,94 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __DRV_TYPES_SDIO_H__ -+#define __DRV_TYPES_SDIO_H__ -+ -+/* SDIO Header Files */ -+#ifdef PLATFORM_LINUX -+ #include -+ #include -+ #include -+ #include -+ -+ #ifdef CONFIG_PLATFORM_SPRD -+ #include -+ #include -+ #endif /* CONFIG_PLATFORM_SPRD */ -+#endif -+ -+#define RTW_SDIO_CLK_33M 33000000 -+#define RTW_SDIO_CLK_40M 40000000 -+#define RTW_SDIO_CLK_80M 80000000 -+#define RTW_SDIO_CLK_160M 160000000 -+ -+typedef struct sdio_data { -+ u8 func_number; -+ -+ u8 tx_block_mode; -+ u8 rx_block_mode; -+ u32 block_transfer_len; -+ -+#ifdef PLATFORM_LINUX -+ struct mmc_card *card; -+ struct sdio_func *func; -+ _thread_hdl_ sys_sdio_irq_thd; -+ unsigned int clock; -+ unsigned int timing; -+ u8 sd3_bus_mode; -+#endif -+ -+#ifdef DBG_SDIO -+#ifdef PLATFORM_LINUX -+ struct proc_dir_entry *proc_sdio_dbg; -+#endif /* PLATFORM_LINUX */ -+ -+ u32 cmd52_err_cnt; /* CMD52 I/O error count */ -+ u32 cmd53_err_cnt; /* CMD53 I/O error count */ -+ -+#if (DBG_SDIO >= 1) -+ u32 reg_dump_mark; /* reg dump at specific error count */ -+#endif /* DBG_SDIO >= 1 */ -+ -+#if (DBG_SDIO >= 2) -+ u8 *dbg_msg; /* Messages for debug */ -+ u8 dbg_msg_size; -+ u8 *reg_mac; /* Device MAC register, 0x0~0x800 */ -+ u8 *reg_mac_ext; /* Device MAC extend register, 0x1000~0x1800 */ -+ u8 *reg_local; /* Device SDIO local register, 0x0~0xFF */ -+ u8 *reg_cia; /* SDIO CIA(CCCR, FBR and etc.), 0x0~0x1FF */ -+#endif /* DBG_SDIO >= 2 */ -+ -+#if (DBG_SDIO >= 3) -+ u8 dbg_enable; /* 0/1: disable/enable debug mode */ -+ u8 err_stop; /* Stop(surprise remove) when I/O error happen */ -+ u8 err_test; /* Simulate error happen */ -+ u8 err_test_triggered; /* Simulate error already triggered */ -+#endif /* DBG_SDIO >= 3 */ -+#endif /* DBG_SDIO */ -+} SDIO_DATA, *PSDIO_DATA; -+ -+#define dvobj_to_sdio_func(d) ((d)->intf_data.func) -+ -+#define RTW_SDIO_ADDR_CMD52_BIT (1<<17) -+#define RTW_SDIO_ADDR_CMD52_GEN(a) (a | RTW_SDIO_ADDR_CMD52_BIT) -+#define RTW_SDIO_ADDR_CMD52_CLR(a) (a&~RTW_SDIO_ADDR_CMD52_BIT) -+#define RTW_SDIO_ADDR_CMD52_CHK(a) (a&RTW_SDIO_ADDR_CMD52_BIT ? 1 : 0) -+ -+#define RTW_SDIO_ADDR_F0_BIT (1<<18) -+#define RTW_SDIO_ADDR_F0_GEN(a) (a | RTW_SDIO_ADDR_F0_BIT) -+#define RTW_SDIO_ADDR_F0_CLR(a) (a&~RTW_SDIO_ADDR_F0_BIT) -+#define RTW_SDIO_ADDR_F0_CHK(a) (a&RTW_SDIO_ADDR_F0_BIT ? 1 : 0) -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/drv_types_xp.h b/drivers/staging/rtl8723cs/include/drv_types_xp.h -new file mode 100644 -index 000000000000..81c45047ae11 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/drv_types_xp.h -@@ -0,0 +1,88 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __DRV_TYPES_XP_H__ -+#define __DRV_TYPES_XP_H__ -+ -+#include -+#include -+ -+ -+ -+#define MAX_MCAST_LIST_NUM 32 -+ -+ -+ -+/* for ioctl */ -+#define MAKE_DRIVER_VERSION(_MainVer, _MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer) -+ -+#define NIC_HEADER_SIZE 14 /* !< can be moved to typedef.h */ -+#define NIC_MAX_PACKET_SIZE 1514 /* !< can be moved to typedef.h */ -+#define NIC_MAX_SEND_PACKETS 10 /* max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h */ -+#define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0, 001) /* !< can be moved to typedef.h */ -+#define NIC_MAX_PACKET_SIZE 1514 /* !< can be moved to typedef.h */ -+ -+ -+#undef ON_VISTA -+/* added by Jackson */ -+#ifndef ON_VISTA -+ /* -+ * Bus driver versions -+ * */ -+ -+ #define SDBUS_DRIVER_VERSION_1 0x100 -+ #define SDBUS_DRIVER_VERSION_2 0x200 -+ -+ #define SDP_FUNCTION_TYPE 4 -+ #define SDP_BUS_DRIVER_VERSION 5 -+ #define SDP_BUS_WIDTH 6 -+ #define SDP_BUS_CLOCK 7 -+ #define SDP_BUS_INTERFACE_CONTROL 8 -+ #define SDP_HOST_BLOCK_LENGTH 9 -+ #define SDP_FUNCTION_BLOCK_LENGTH 10 -+ #define SDP_FN0_BLOCK_LENGTH 11 -+ #define SDP_FUNCTION_INT_ENABLE 12 -+#endif -+ -+ -+typedef struct _MP_REG_ENTRY { -+ -+ NDIS_STRING RegName; /* variable name text */ -+ BOOLEAN bRequired; /* 1->required, 0->optional */ -+ -+ u8 Type; /* NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString */ -+ uint FieldOffset; /* offset to MP_ADAPTER field */ -+ uint FieldSize; /* size (in bytes) of the field */ -+ -+#ifdef UNDER_AMD64 -+ u64 Default; -+#else -+ u32 Default; /* default value to use */ -+#endif -+ -+ u32 Min; /* minimum value allowed */ -+ u32 Max; /* maximum value allowed */ -+} MP_REG_ENTRY, *PMP_REG_ENTRY; -+ -+ -+typedef struct _OCTET_STRING { -+ u8 *Octet; -+ u16 Length; -+} OCTET_STRING, *POCTET_STRING; -+ -+ -+ -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/ethernet.h b/drivers/staging/rtl8723cs/include/ethernet.h -new file mode 100644 -index 000000000000..ef518cc4171d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/ethernet.h -@@ -0,0 +1,36 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/*! \file */ -+#ifndef __INC_ETHERNET_H -+#define __INC_ETHERNET_H -+ -+#define ETHERNET_ADDRESS_LENGTH 6 /* !< Ethernet Address Length */ -+#define ETHERNET_HEADER_SIZE 14 /* !< Ethernet Header Length */ -+#define LLC_HEADER_SIZE 6 /* !< LLC Header Length */ -+#define TYPE_LENGTH_FIELD_SIZE 2 /* !< Type/Length Size */ -+#define MINIMUM_ETHERNET_PACKET_SIZE 60 /* !< Minimum Ethernet Packet Size */ -+#define MAXIMUM_ETHERNET_PACKET_SIZE 1514 /* !< Maximum Ethernet Packet Size */ -+ -+#define RT_ETH_IS_MULTICAST(_pAddr) ((((u8 *)(_pAddr))[0]&0x01) != 0) /* !< Is Multicast Address? */ -+#define RT_ETH_IS_BROADCAST(_pAddr) (\ -+ ((u8 *)(_pAddr))[0] == 0xff && \ -+ ((u8 *)(_pAddr))[1] == 0xff && \ -+ ((u8 *)(_pAddr))[2] == 0xff && \ -+ ((u8 *)(_pAddr))[3] == 0xff && \ -+ ((u8 *)(_pAddr))[4] == 0xff && \ -+ ((u8 *)(_pAddr))[5] == 0xff) /* !< Is Broadcast Address? */ -+ -+ -+#endif /* #ifndef __INC_ETHERNET_H */ -diff --git a/drivers/staging/rtl8723cs/include/gspi_hal.h b/drivers/staging/rtl8723cs/include/gspi_hal.h -new file mode 100644 -index 000000000000..6da0f071d499 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/gspi_hal.h -@@ -0,0 +1,30 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __GSPI_HAL_H__ -+#define __GSPI_HAL_H__ -+ -+ -+void spi_int_dpc(PADAPTER padapter, u32 sdio_hisr); -+u8 rtw_set_hal_ops(_adapter *padapter); -+ -+#ifdef CONFIG_RTL8188E -+ void rtl8188es_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8723B -+ void rtl8723bs_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#endif /* __GSPI_HAL_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/gspi_ops.h b/drivers/staging/rtl8723cs/include/gspi_ops.h -new file mode 100644 -index 000000000000..bcfaad2e0bba ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/gspi_ops.h -@@ -0,0 +1,180 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __GSPI_OPS_H__ -+#define __GSPI_OPS_H__ -+ -+/* follwing defination is based on -+ * GSPI spec of RTL8723, we temp -+ * suppose that it will be the same -+ * for diff chips of GSPI, if not -+ * we should move it to HAL folder */ -+#define SPI_LOCAL_DOMAIN 0x0 -+#define WLAN_IOREG_DOMAIN 0x8 -+#define FW_FIFO_DOMAIN 0x4 -+#define TX_HIQ_DOMAIN 0xc -+#define TX_MIQ_DOMAIN 0xd -+#define TX_LOQ_DOMAIN 0xe -+#define RX_RXFIFO_DOMAIN 0x1f -+ -+/* IO Bus domain address mapping */ -+#define DEFUALT_OFFSET 0x0 -+#define SPI_LOCAL_OFFSET 0x10250000 -+#define WLAN_IOREG_OFFSET 0x10260000 -+#define FW_FIFO_OFFSET 0x10270000 -+#define TX_HIQ_OFFSET 0x10310000 -+#define TX_MIQ_OFFSET 0x1032000 -+#define TX_LOQ_OFFSET 0x10330000 -+#define RX_RXOFF_OFFSET 0x10340000 -+ -+/* SPI Local registers */ -+#define SPI_REG_TX_CTRL 0x0000 /* SPI Tx Control */ -+#define SPI_REG_STATUS_RECOVERY 0x0004 -+#define SPI_REG_INT_TIMEOUT 0x0006 -+#define SPI_REG_HIMR 0x0014 /* SPI Host Interrupt Mask */ -+#define SPI_REG_HISR 0x0018 /* SPI Host Interrupt Service Routine */ -+#define SPI_REG_RX0_REQ_LEN 0x001C /* RXDMA Request Length */ -+#define SPI_REG_FREE_TXPG 0x0020 /* Free Tx Buffer Page */ -+#define SPI_REG_HCPWM1 0x0024 /* HCI Current Power Mode 1 */ -+#define SPI_REG_HCPWM2 0x0026 /* HCI Current Power Mode 2 */ -+#define SPI_REG_HTSFR_INFO 0x0030 /* HTSF Informaion */ -+#define SPI_REG_HRPWM1 0x0080 /* HCI Request Power Mode 1 */ -+#define SPI_REG_HRPWM2 0x0082 /* HCI Request Power Mode 2 */ -+#define SPI_REG_HPS_CLKR 0x0084 /* HCI Power Save Clock */ -+#define SPI_REG_HSUS_CTRL 0x0086 /* SPI HCI Suspend Control */ -+#define SPI_REG_HIMR_ON 0x0090 /* SPI Host Extension Interrupt Mask Always */ -+#define SPI_REG_HISR_ON 0x0091 /* SPI Host Extension Interrupt Status Always */ -+#define SPI_REG_CFG 0x00F0 /* SPI Configuration Register */ -+ -+#define SPI_TX_CTRL (SPI_REG_TX_CTRL | SPI_LOCAL_OFFSET) -+#define SPI_STATUS_RECOVERY (SPI_REG_STATUS_RECOVERY | SPI_LOCAL_OFFSET) -+#define SPI_INT_TIMEOUT (SPI_REG_INT_TIMEOUT | SPI_LOCAL_OFFSET) -+#define SPI_HIMR (SPI_REG_HIMR | SPI_LOCAL_OFFSET) -+#define SPI_HISR (SPI_REG_HISR | SPI_LOCAL_OFFSET) -+#define SPI_RX0_REQ_LEN_1_BYTE (SPI_REG_RX0_REQ_LEN | SPI_LOCAL_OFFSET) -+#define SPI_FREE_TXPG (SPI_REG_FREE_TXPG | SPI_LOCAL_OFFSET) -+ -+#define SPI_HIMR_DISABLED 0 -+ -+/* SPI HIMR MASK diff with SDIO */ -+#define SPI_HISR_RX_REQUEST BIT(0) -+#define SPI_HISR_AVAL BIT(1) -+#define SPI_HISR_TXERR BIT(2) -+#define SPI_HISR_RXERR BIT(3) -+#define SPI_HISR_TXFOVW BIT(4) -+#define SPI_HISR_RXFOVW BIT(5) -+#define SPI_HISR_TXBCNOK BIT(6) -+#define SPI_HISR_TXBCNERR BIT(7) -+#define SPI_HISR_BCNERLY_INT BIT(16) -+#define SPI_HISR_ATIMEND BIT(17) -+#define SPI_HISR_ATIMEND_E BIT(18) -+#define SPI_HISR_CTWEND BIT(19) -+#define SPI_HISR_C2HCMD BIT(20) -+#define SPI_HISR_CPWM1 BIT(21) -+#define SPI_HISR_CPWM2 BIT(22) -+#define SPI_HISR_HSISR_IND BIT(23) -+#define SPI_HISR_GTINT3_IND BIT(24) -+#define SPI_HISR_GTINT4_IND BIT(25) -+#define SPI_HISR_PSTIMEOUT BIT(26) -+#define SPI_HISR_OCPINT BIT(27) -+#define SPI_HISR_TSF_BIT32_TOGGLE BIT(29) -+ -+#define MASK_SPI_HISR_CLEAR (SPI_HISR_TXERR |\ -+ SPI_HISR_RXERR |\ -+ SPI_HISR_TXFOVW |\ -+ SPI_HISR_RXFOVW |\ -+ SPI_HISR_TXBCNOK |\ -+ SPI_HISR_TXBCNERR |\ -+ SPI_HISR_C2HCMD |\ -+ SPI_HISR_CPWM1 |\ -+ SPI_HISR_CPWM2 |\ -+ SPI_HISR_HSISR_IND |\ -+ SPI_HISR_GTINT3_IND |\ -+ SPI_HISR_GTINT4_IND |\ -+ SPI_HISR_PSTIMEOUT |\ -+ SPI_HISR_OCPINT) -+ -+#define REG_LEN_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 0, 8, x)/* (x<<(unsigned int)24) */ -+#define REG_ADDR_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 8, 16, x)/* (x<<(unsigned int)16) */ -+#define REG_DOMAIN_ID_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 24, 5, x)/* (x<<(unsigned int)0) */ -+#define REG_FUN_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 29, 2, x)/* (x<<(unsigned int)5) */ -+#define REG_RW_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 31, 1, x)/* (x<<(unsigned int)7) */ -+ -+#define FIFO_LEN_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 0, 16, x)/* (x<<(unsigned int)24) -+ * #define FIFO_ADDR_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 8, 16, x) */ /* (x<<(unsigned int)16) */ -+#define FIFO_DOMAIN_ID_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 24, 5, x)/* (x<<(unsigned int)0) */ -+#define FIFO_FUN_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 29, 2, x)/* (x<<(unsigned int)5) */ -+#define FIFO_RW_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 31, 1, x)/* (x<<(unsigned int)7) */ -+ -+ -+/* get status dword0 */ -+#define GET_STATUS_PUB_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 24, 8) -+#define GET_STATUS_HI_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 18, 6) -+#define GET_STATUS_MID_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 12, 6) -+#define GET_STATUS_LOW_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 6, 6) -+#define GET_STATUS_HISR_HI6BIT(status) LE_BITS_TO_4BYTE(status, 0, 6) -+ -+/* get status dword1 */ -+#define GET_STATUS_HISR_MID8BIT(status) LE_BITS_TO_4BYTE(status + 4, 24, 8) -+#define GET_STATUS_HISR_LOW8BIT(status) LE_BITS_TO_4BYTE(status + 4, 16, 8) -+#define GET_STATUS_ERROR(status) LE_BITS_TO_4BYTE(status + 4, 17, 1) -+#define GET_STATUS_INT(status) LE_BITS_TO_4BYTE(status + 4, 16, 1) -+#define GET_STATUS_RX_LENGTH(status) LE_BITS_TO_4BYTE(status + 4, 0, 16) -+ -+ -+#define RXDESC_SIZE 24 -+ -+ -+struct spi_more_data { -+ unsigned long more_data; -+ unsigned long len; -+}; -+ -+#ifdef CONFIG_RTL8188E -+ void rtl8188es_set_hal_ops(PADAPTER padapter); -+ #define set_hal_ops rtl8188es_set_hal_ops -+#endif -+extern void spi_set_chip_endian(PADAPTER padapter); -+extern unsigned int spi_write8_endian(ADAPTER *Adapter, unsigned int addr, unsigned int buf, u32 big); -+extern void spi_set_intf_ops(_adapter *padapter, struct _io_ops *pops); -+extern void spi_set_chip_endian(PADAPTER padapter); -+extern void InitInterrupt8723ASdio(PADAPTER padapter); -+extern void InitSysInterrupt8723ASdio(PADAPTER padapter); -+extern void EnableInterrupt8723ASdio(PADAPTER padapter); -+extern void DisableInterrupt8723ASdio(PADAPTER padapter); -+extern void spi_int_hdl(PADAPTER padapter); -+extern u8 HalQueryTxBufferStatus8723ASdio(PADAPTER padapter); -+#ifdef CONFIG_RTL8723B -+ extern void InitInterrupt8723BSdio(PADAPTER padapter); -+ extern void InitSysInterrupt8723BSdio(PADAPTER padapter); -+ extern void EnableInterrupt8723BSdio(PADAPTER padapter); -+ extern void DisableInterrupt8723BSdio(PADAPTER padapter); -+ extern u8 HalQueryTxBufferStatus8723BSdio(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8188E -+ extern void InitInterrupt8188EGspi(PADAPTER padapter); -+ extern void EnableInterrupt8188EGspi(PADAPTER padapter); -+ extern void DisableInterrupt8188EGspi(PADAPTER padapter); -+ extern void UpdateInterruptMask8188EGspi(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR); -+ extern u8 HalQueryTxBufferStatus8189EGspi(PADAPTER padapter); -+ extern u8 HalQueryTxOQTBufferStatus8189EGspi(PADAPTER padapter); -+ extern void ClearInterrupt8188EGspi(PADAPTER padapter); -+ extern u8 CheckIPSStatus(PADAPTER padapter); -+#endif /* CONFIG_RTL8188E */ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ extern u8 RecvOnePkt(PADAPTER padapter); -+#endif /* CONFIG_WOWLAN */ -+ -+#endif /* __GSPI_OPS_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/gspi_ops_linux.h b/drivers/staging/rtl8723cs/include/gspi_ops_linux.h -new file mode 100644 -index 000000000000..0ba263de8fd7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/gspi_ops_linux.h -@@ -0,0 +1,18 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __SDIO_OPS_LINUX_H__ -+#define __SDIO_OPS_LINUX_H__ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/gspi_osintf.h b/drivers/staging/rtl8723cs/include/gspi_osintf.h -new file mode 100644 -index 000000000000..a94e656793af ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/gspi_osintf.h -@@ -0,0 +1,19 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __SDIO_OSINTF_H__ -+#define __SDIO_OSINTF_H__ -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/h2clbk.h b/drivers/staging/rtl8723cs/include/h2clbk.h -new file mode 100644 -index 000000000000..4df14b98d1e0 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/h2clbk.h -@@ -0,0 +1,26 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+#define _H2CLBK_H_ -+ -+ -+void _lbk_cmd(PADAPTER Adapter); -+ -+void _lbk_rsp(PADAPTER Adapter); -+ -+void _lbk_evt(PADAPTER Adapter); -+ -+void h2c_event_callback(unsigned char *dev, unsigned char *pbuf); -diff --git a/drivers/staging/rtl8723cs/include/hal_btcoex.h b/drivers/staging/rtl8723cs/include/hal_btcoex.h -new file mode 100644 -index 000000000000..a2e125ec8146 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_btcoex.h -@@ -0,0 +1,108 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_BTCOEX_H__ -+#define __HAL_BTCOEX_H__ -+ -+#include -+ -+/* Some variables can't get from outsrc BT-Coex, -+ * so we need to save here */ -+typedef struct _BT_COEXIST { -+ u8 bBtExist; -+ u8 btTotalAntNum; -+ u8 btChipType; -+ u8 bInitlized; -+ u8 btAntisolation; -+} BT_COEXIST, *PBT_COEXIST; -+ -+void DBG_BT_INFO(u8 *dbgmsg); -+ -+void hal_btcoex_SetBTCoexist(PADAPTER padapter, u8 bBtExist); -+u8 hal_btcoex_IsBtExist(PADAPTER padapter); -+u8 hal_btcoex_IsBtDisabled(PADAPTER); -+void hal_btcoex_SetChipType(PADAPTER padapter, u8 chipType); -+void hal_btcoex_SetPgAntNum(PADAPTER padapter, u8 antNum); -+ -+u8 hal_btcoex_Initialize(PADAPTER padapter); -+void hal_btcoex_PowerOnSetting(PADAPTER padapter); -+void hal_btcoex_AntInfoSetting(PADAPTER padapter); -+void hal_btcoex_PowerOffSetting(PADAPTER padapter); -+void hal_btcoex_PreLoadFirmware(PADAPTER padapter); -+void hal_btcoex_InitHwConfig(PADAPTER padapter, u8 bWifiOnly); -+ -+void hal_btcoex_IpsNotify(PADAPTER padapter, u8 type); -+void hal_btcoex_LpsNotify(PADAPTER padapter, u8 type); -+void hal_btcoex_ScanNotify(PADAPTER padapter, u8 type); -+void hal_btcoex_ConnectNotify(PADAPTER padapter, u8 action); -+void hal_btcoex_MediaStatusNotify(PADAPTER padapter, u8 mediaStatus); -+void hal_btcoex_SpecialPacketNotify(PADAPTER padapter, u8 pktType); -+void hal_btcoex_IQKNotify(PADAPTER padapter, u8 state); -+void hal_btcoex_WLRFKNotify(PADAPTER padapter, u8 path, u8 type, u8 state); -+void hal_btcoex_BtInfoNotify(PADAPTER padapter, u8 length, u8 *tmpBuf); -+void hal_btcoex_BtMpRptNotify(PADAPTER padapter, u8 length, u8 *tmpBuf); -+void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state); -+void hal_btcoex_HaltNotify(PADAPTER padapter, u8 do_halt); -+void hal_btcoex_SwitchBtTRxMask(PADAPTER padapter); -+ -+void hal_btcoex_Hanlder(PADAPTER padapter); -+ -+s32 hal_btcoex_IsBTCoexRejectAMPDU(PADAPTER padapter); -+s32 hal_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER padapter); -+u32 hal_btcoex_GetAMPDUSize(PADAPTER padapter); -+void hal_btcoex_SetManualControl(PADAPTER padapter, u8 bmanual); -+void hal_btcoex_set_policy_control(PADAPTER padapter, u8 btc_policy); -+u8 hal_btcoex_1Ant(PADAPTER padapter); -+u8 hal_btcoex_IsBtControlLps(PADAPTER); -+u8 hal_btcoex_IsLpsOn(PADAPTER); -+u8 hal_btcoex_RpwmVal(PADAPTER); -+u8 hal_btcoex_LpsVal(PADAPTER); -+u32 hal_btcoex_GetRaMask(PADAPTER); -+u8 hal_btcoex_query_reduced_wl_pwr_lvl(PADAPTER padapter); -+void hal_btcoex_set_reduced_wl_pwr_lvl(PADAPTER padapter, u8 val); -+void hal_btcoex_do_reduce_wl_pwr_lvl(PADAPTER padapter); -+void hal_btcoex_RecordPwrMode(PADAPTER padapter, u8 *pCmdBuf, u8 cmdLen); -+void hal_btcoex_DisplayBtCoexInfo(PADAPTER, u8 *pbuf, u32 bufsize); -+void hal_btcoex_SetDBG(PADAPTER, u32 *pDbgModule); -+u32 hal_btcoex_GetDBG(PADAPTER, u8 *pStrBuf, u32 bufSize); -+u8 hal_btcoex_IncreaseScanDeviceNum(PADAPTER); -+u8 hal_btcoex_IsBtLinkExist(PADAPTER); -+void hal_btcoex_SetBtPatchVersion(PADAPTER, u16 btHciVer, u16 btPatchVer); -+void hal_btcoex_SetHciVersion(PADAPTER, u16 hciVersion); -+void hal_btcoex_SendScanNotify(PADAPTER, u8 type); -+void hal_btcoex_StackUpdateProfileInfo(void); -+void hal_btcoex_pta_off_on_notify(PADAPTER padapter, u8 bBTON); -+void hal_btcoex_SetAntIsolationType(PADAPTER padapter, u8 anttype); -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ int hal_btcoex_AntIsolationConfig_ParaFile(PADAPTER Adapter, char *pFileName); -+ int hal_btcoex_ParseAntIsolationConfigFile(PADAPTER Adapter, char *buffer); -+#endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */ -+u16 hal_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data); -+u16 hal_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val); -+void hal_btcoex_set_rfe_type(u8 type); -+void hal_btcoex_switchband_notify(u8 under_scan, u8 band_type); -+void hal_btcoex_WlFwDbgInfoNotify(PADAPTER padapter, u8* tmpBuf, u8 length); -+void hal_btcoex_rx_rate_change_notify(PADAPTER padapter, u8 is_data_frame, u8 rate_id); -+u16 hal_btcoex_btset_testode(PADAPTER padapter, u8 type); -+ -+#ifdef CONFIG_RF4CE_COEXIST -+void hal_btcoex_set_rf4ce_link_state(u8 state); -+u8 hal_btcoex_get_rf4ce_link_state(void); -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+#include /* sdio multi coex */ -+#endif -+ -+#endif /* !__HAL_BTCOEX_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/hal_btcoex_wifionly.h b/drivers/staging/rtl8723cs/include/hal_btcoex_wifionly.h -new file mode 100644 -index 000000000000..407698baa3dc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_btcoex_wifionly.h -@@ -0,0 +1,89 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HALBTC_WIFIONLY_H__ -+#define __HALBTC_WIFIONLY_H__ -+ -+#include -+#include -+ -+/* Define the ICs that support wifi only cfg in coex. codes */ -+#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) \ -+|| defined(CONFIG_RTL8723F) -+#define CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG 1 -+#else -+#define CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG 0 -+#endif -+ -+/* Define the ICs that support hal btc common file structure */ -+#if defined(CONFIG_RTL8822C) || (defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8723F)&& defined(CONFIG_BT_COEXIST)) -+#define CONFIG_BTCOEX_SUPPORT_BTC_CMN 1 -+#else -+#define CONFIG_BTCOEX_SUPPORT_BTC_CMN 0 -+#endif -+ -+#if (CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG == 1) -+ -+typedef enum _WIFIONLY_CHIP_INTERFACE { -+ WIFIONLY_INTF_UNKNOWN = 0, -+ WIFIONLY_INTF_PCI = 1, -+ WIFIONLY_INTF_USB = 2, -+ WIFIONLY_INTF_SDIO = 3, -+ WIFIONLY_INTF_MAX -+} WIFIONLY_CHIP_INTERFACE, *PWIFIONLY_CHIP_INTERFACE; -+ -+typedef enum _WIFIONLY_CUSTOMER_ID { -+ CUSTOMER_NORMAL = 0, -+ CUSTOMER_HP_1 = 1 -+} WIFIONLY_CUSTOMER_ID, *PWIFIONLY_CUSTOMER_ID; -+ -+struct wifi_only_haldata { -+ u16 customer_id; -+ u8 efuse_pg_antnum; -+ u8 efuse_pg_antpath; -+ u8 rfe_type; -+ u8 ant_div_cfg; -+}; -+ -+struct wifi_only_cfg { -+ void *Adapter; -+ struct wifi_only_haldata haldata_info; -+ WIFIONLY_CHIP_INTERFACE chip_interface; -+}; -+ -+void halwifionly_write1byte(void *pwifionlyContext, u32 RegAddr, u8 Data); -+void halwifionly_write2byte(void *pwifionlyContext, u32 RegAddr, u16 Data); -+void halwifionly_write4byte(void *pwifionlyContext, u32 RegAddr, u32 Data); -+u8 halwifionly_read1byte(void *pwifionlyContext, u32 RegAddr); -+u16 halwifionly_read2byte(void *pwifionlyContext, u32 RegAddr); -+u32 halwifionly_read4byte(void *pwifionlyContext, u32 RegAddr); -+void halwifionly_bitmaskwrite1byte(void *pwifionlyContext, u32 regAddr, u8 bitMask, u8 data); -+void halwifionly_phy_set_rf_reg(void *pwifionlyContext, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data); -+void halwifionly_phy_set_bb_reg(void *pwifionlyContext, u32 RegAddr, u32 BitMask, u32 Data); -+void hal_btcoex_wifionly_switchband_notify(PADAPTER padapter); -+void hal_btcoex_wifionly_scan_notify(PADAPTER padapter); -+void hal_btcoex_wifionly_connect_notify(PADAPTER padapter); -+void hal_btcoex_wifionly_hw_config(PADAPTER padapter); -+void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter); -+void hal_btcoex_wifionly_AntInfoSetting(PADAPTER padapter); -+#else -+#define hal_btcoex_wifionly_switchband_notify(padapter) -+#define hal_btcoex_wifionly_scan_notify(padapter) -+#define hal_btcoex_wifionly_connect_notify(padapter) -+#define hal_btcoex_wifionly_hw_config(padapter) -+#define hal_btcoex_wifionly_initlizevariables(padapter) -+#define hal_btcoex_wifionly_AntInfoSetting(padapter) -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/hal_com.h b/drivers/staging/rtl8723cs/include/hal_com.h -new file mode 100644 -index 000000000000..dcafbafd8b1b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_com.h -@@ -0,0 +1,736 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_COMMON_H__ -+#define __HAL_COMMON_H__ -+ -+#include "HalVerDef.h" -+#include "hal_pg.h" -+#include "hal_phy.h" -+#include "hal_phy_reg.h" -+#include "hal_com_reg.h" -+#include "hal_com_phycfg.h" -+#include "../hal/hal_com_c2h.h" -+ -+/*------------------------------ Tx Desc definition Macro ------------------------*/ -+/* #pragma mark -- Tx Desc related definition. -- */ -+/* ---------------------------------------------------------------------------- -+ * ----------------------------------------------------------- -+ * Rate -+ * ----------------------------------------------------------- -+ * CCK Rates, TxHT = 0 */ -+#define DESC_RATE1M 0x00 -+#define DESC_RATE2M 0x01 -+#define DESC_RATE5_5M 0x02 -+#define DESC_RATE11M 0x03 -+ -+/* OFDM Rates, TxHT = 0 */ -+#define DESC_RATE6M 0x04 -+#define DESC_RATE9M 0x05 -+#define DESC_RATE12M 0x06 -+#define DESC_RATE18M 0x07 -+#define DESC_RATE24M 0x08 -+#define DESC_RATE36M 0x09 -+#define DESC_RATE48M 0x0a -+#define DESC_RATE54M 0x0b -+ -+/* MCS Rates, TxHT = 1 */ -+#define DESC_RATEMCS0 0x0c -+#define DESC_RATEMCS1 0x0d -+#define DESC_RATEMCS2 0x0e -+#define DESC_RATEMCS3 0x0f -+#define DESC_RATEMCS4 0x10 -+#define DESC_RATEMCS5 0x11 -+#define DESC_RATEMCS6 0x12 -+#define DESC_RATEMCS7 0x13 -+#define DESC_RATEMCS8 0x14 -+#define DESC_RATEMCS9 0x15 -+#define DESC_RATEMCS10 0x16 -+#define DESC_RATEMCS11 0x17 -+#define DESC_RATEMCS12 0x18 -+#define DESC_RATEMCS13 0x19 -+#define DESC_RATEMCS14 0x1a -+#define DESC_RATEMCS15 0x1b -+#define DESC_RATEMCS16 0x1C -+#define DESC_RATEMCS17 0x1D -+#define DESC_RATEMCS18 0x1E -+#define DESC_RATEMCS19 0x1F -+#define DESC_RATEMCS20 0x20 -+#define DESC_RATEMCS21 0x21 -+#define DESC_RATEMCS22 0x22 -+#define DESC_RATEMCS23 0x23 -+#define DESC_RATEMCS24 0x24 -+#define DESC_RATEMCS25 0x25 -+#define DESC_RATEMCS26 0x26 -+#define DESC_RATEMCS27 0x27 -+#define DESC_RATEMCS28 0x28 -+#define DESC_RATEMCS29 0x29 -+#define DESC_RATEMCS30 0x2A -+#define DESC_RATEMCS31 0x2B -+#define DESC_RATEVHTSS1MCS0 0x2C -+#define DESC_RATEVHTSS1MCS1 0x2D -+#define DESC_RATEVHTSS1MCS2 0x2E -+#define DESC_RATEVHTSS1MCS3 0x2F -+#define DESC_RATEVHTSS1MCS4 0x30 -+#define DESC_RATEVHTSS1MCS5 0x31 -+#define DESC_RATEVHTSS1MCS6 0x32 -+#define DESC_RATEVHTSS1MCS7 0x33 -+#define DESC_RATEVHTSS1MCS8 0x34 -+#define DESC_RATEVHTSS1MCS9 0x35 -+#define DESC_RATEVHTSS2MCS0 0x36 -+#define DESC_RATEVHTSS2MCS1 0x37 -+#define DESC_RATEVHTSS2MCS2 0x38 -+#define DESC_RATEVHTSS2MCS3 0x39 -+#define DESC_RATEVHTSS2MCS4 0x3A -+#define DESC_RATEVHTSS2MCS5 0x3B -+#define DESC_RATEVHTSS2MCS6 0x3C -+#define DESC_RATEVHTSS2MCS7 0x3D -+#define DESC_RATEVHTSS2MCS8 0x3E -+#define DESC_RATEVHTSS2MCS9 0x3F -+#define DESC_RATEVHTSS3MCS0 0x40 -+#define DESC_RATEVHTSS3MCS1 0x41 -+#define DESC_RATEVHTSS3MCS2 0x42 -+#define DESC_RATEVHTSS3MCS3 0x43 -+#define DESC_RATEVHTSS3MCS4 0x44 -+#define DESC_RATEVHTSS3MCS5 0x45 -+#define DESC_RATEVHTSS3MCS6 0x46 -+#define DESC_RATEVHTSS3MCS7 0x47 -+#define DESC_RATEVHTSS3MCS8 0x48 -+#define DESC_RATEVHTSS3MCS9 0x49 -+#define DESC_RATEVHTSS4MCS0 0x4A -+#define DESC_RATEVHTSS4MCS1 0x4B -+#define DESC_RATEVHTSS4MCS2 0x4C -+#define DESC_RATEVHTSS4MCS3 0x4D -+#define DESC_RATEVHTSS4MCS4 0x4E -+#define DESC_RATEVHTSS4MCS5 0x4F -+#define DESC_RATEVHTSS4MCS6 0x50 -+#define DESC_RATEVHTSS4MCS7 0x51 -+#define DESC_RATEVHTSS4MCS8 0x52 -+#define DESC_RATEVHTSS4MCS9 0x53 -+#define DESC_RATE_NUM 0x54 -+ -+#define IS_CCK_HRATE(_rate) ((_rate) <= DESC_RATE11M) -+#define IS_OFDM_HRATE(_rate) ((_rate) >= DESC_RATE6M && (_rate) <= DESC_RATE54M) -+#define IS_LEGACY_HRATE(_rate) ((_rate) <= DESC_RATE54M) -+#define IS_HT_HRATE(_rate) ((_rate) >= DESC_RATEMCS0 && (_rate) <= DESC_RATEMCS31) -+#define IS_VHT_HRATE(_rate) ((_rate) >= DESC_RATEVHTSS1MCS0 && (_rate) <= DESC_RATEVHTSS4MCS9) -+ -+#define IS_HT1SS_HRATE(_rate) ((_rate) >= DESC_RATEMCS0 && (_rate) <= DESC_RATEMCS7) -+#define IS_HT2SS_HRATE(_rate) ((_rate) >= DESC_RATEMCS8 && (_rate) <= DESC_RATEMCS15) -+#define IS_HT3SS_HRATE(_rate) ((_rate) >= DESC_RATEMCS16 && (_rate) <= DESC_RATEMCS23) -+#define IS_HT4SS_HRATE(_rate) ((_rate) >= DESC_RATEMCS24 && (_rate) <= DESC_RATEMCS31) -+ -+#define IS_VHT1SS_HRATE(_rate) ((_rate) >= DESC_RATEVHTSS1MCS0 && (_rate) <= DESC_RATEVHTSS1MCS9) -+#define IS_VHT2SS_HRATE(_rate) ((_rate) >= DESC_RATEVHTSS2MCS0 && (_rate) <= DESC_RATEVHTSS2MCS9) -+#define IS_VHT3SS_HRATE(_rate) ((_rate) >= DESC_RATEVHTSS3MCS0 && (_rate) <= DESC_RATEVHTSS3MCS9) -+#define IS_VHT4SS_HRATE(_rate) ((_rate) >= DESC_RATEVHTSS4MCS0 && (_rate) <= DESC_RATEVHTSS4MCS9) -+ -+#define IS_1SS_HRATE(_rate) (IS_CCK_HRATE((_rate)) || IS_OFDM_HRATE((_rate)) || IS_HT1SS_HRATE((_rate)) || IS_VHT1SS_HRATE((_rate))) -+#define IS_2SS_HRATE(_rate) (IS_HT2SS_HRATE((_rate)) || IS_VHT2SS_HRATE((_rate))) -+#define IS_3SS_HRATE(_rate) (IS_HT3SS_HRATE((_rate)) || IS_VHT3SS_HRATE((_rate))) -+#define IS_4SS_HRATE(_rate) (IS_HT4SS_HRATE((_rate)) || IS_VHT4SS_HRATE((_rate))) -+ -+#define HRARE_SS_NUM(_rate) (IS_1SS_HRATE(_rate) ? 1 : (IS_2SS_HRATE(_rate) ? 2 : (IS_3SS_HRATE(_rate) ? 3 : (IS_4SS_HRATE(_rate) ? 4 : 0)))) -+ -+extern const char * const _HDATA_RATE[]; -+#define HDATA_RATE(rate) ((rate) >= DESC_RATE_NUM ? _HDATA_RATE[DESC_RATE_NUM] : _HDATA_RATE[rate]) -+ -+enum { -+ UP_LINK, -+ DOWN_LINK, -+}; -+typedef enum _RT_MEDIA_STATUS { -+ RT_MEDIA_DISCONNECT = 0, -+ RT_MEDIA_CONNECT = 1 -+} RT_MEDIA_STATUS; -+ -+#define MAX_DLFW_PAGE_SIZE 4096 /* @ page : 4k bytes */ -+typedef enum _FIRMWARE_SOURCE { -+ FW_SOURCE_IMG_FILE = 0, -+ FW_SOURCE_HEADER_FILE = 1, /* from header file */ -+} FIRMWARE_SOURCE, *PFIRMWARE_SOURCE; -+ -+typedef enum _CH_SW_USE_CASE { -+ CH_SW_USE_CASE_TDLS = 0, -+ CH_SW_USE_CASE_MCC = 1 -+} CH_SW_USE_CASE; -+ -+typedef enum _WAKEUP_REASON{ -+ RX_PAIRWISEKEY = 0x01, -+ RX_GTK = 0x02, -+ RX_FOURWAY_HANDSHAKE = 0x03, -+ RX_DISASSOC = 0x04, -+ RX_DEAUTH = 0x08, -+ RX_ARP_REQUEST = 0x09, -+ FW_DECISION_DISCONNECT = 0x10, -+ RX_MAGIC_PKT = 0x21, -+ RX_UNICAST_PKT = 0x22, -+ RX_PATTERN_PKT = 0x23, -+ RTD3_SSID_MATCH = 0x24, -+ RX_REALWOW_V2_WAKEUP_PKT = 0x30, -+ RX_REALWOW_V2_ACK_LOST = 0x31, -+ ENABLE_FAIL_DMA_IDLE = 0x40, -+ ENABLE_FAIL_DMA_PAUSE = 0x41, -+ RTIME_FAIL_DMA_IDLE = 0x42, -+ RTIME_FAIL_DMA_PAUSE = 0x43, -+ RX_PNO = 0x55, -+ #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ WOW_KEEPALIVE_ACK_TIMEOUT = 0x60, -+ WOW_KEEPALIVE_WAKE = 0x61, -+ #endif/*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ AP_OFFLOAD_WAKEUP = 0x66, -+ CLK_32K_UNLOCK = 0xFD, -+ CLK_32K_LOCK = 0xFE -+}WAKEUP_REASON; -+ -+typedef enum _BCN_EARLY_INT_CASE{ -+ TDLS_BCN_ERLY_ON, -+ TDLS_BCN_ERLY_OFF -+}BCN_EARLY_INT_CASE; -+ -+/* -+ * Queue Select Value in TxDesc -+ * */ -+#define QSLT_BK 0x2/* 0x01 */ -+#define QSLT_BE 0x0 -+#define QSLT_VI 0x5/* 0x4 */ -+#define QSLT_VO 0x7/* 0x6 */ -+#define QSLT_BEACON 0x10 -+#define QSLT_HIGH 0x11 -+#define QSLT_MGNT 0x12 -+#define QSLT_CMD 0x13 -+ -+/* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON. -+ * #define MAX_TX_QUEUE 9 */ -+ -+#define TX_SELE_HQ BIT(0) /* High Queue */ -+#define TX_SELE_LQ BIT(1) /* Low Queue */ -+#define TX_SELE_NQ BIT(2) /* Normal Queue */ -+#define TX_SELE_EQ BIT(3) /* Extern Queue */ -+ -+#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0)) -+#define PageNum_256(_Len) (u32)(((_Len)>>8) + ((_Len) & 0xFF ? 1 : 0)) -+#define PageNum_512(_Len) (u32)(((_Len)>>9) + ((_Len) & 0x1FF ? 1 : 0)) -+#define PageNum(_Len, _Size) (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1 : 0)) -+ -+struct dbg_rx_counter { -+ u32 rx_pkt_ok; -+ u32 rx_pkt_crc_error; -+ u32 rx_pkt_drop; -+ u32 rx_ofdm_fa; -+ u32 rx_cck_fa; -+ u32 rx_ht_fa; -+}; -+ -+u8 rtw_hal_get_port(_adapter *adapter); -+ -+#ifdef CONFIG_MBSSID_CAM -+ /*#define DBG_MBID_CAM_DUMP*/ -+ -+ void rtw_mbid_cam_init(struct dvobj_priv *dvobj); -+ void rtw_mbid_cam_deinit(struct dvobj_priv *dvobj); -+ void rtw_mbid_cam_reset(_adapter *adapter); -+ u8 rtw_get_max_mbid_cam_id(_adapter *adapter); -+ u8 rtw_get_mbid_cam_entry_num(_adapter *adapter); -+ int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name , _adapter *adapter); -+ int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter); -+ void rtw_mi_set_mbid_cam(_adapter *adapter); -+ u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr); -+ void rtw_ap_set_mbid_num(_adapter *adapter, u8 ap_num); -+ void rtw_mbid_cam_enable(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr); -+ void rtw_hal_change_macaddr_mbid(_adapter *adapter, u8 *mac_addr); -+ #ifdef CONFIG_SWTIMER_BASED_TXBCN -+ u16 rtw_hal_bcn_interval_adjust(_adapter *adapter, u16 bcn_interval); -+ #endif -+ void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode); -+#endif -+ -+void rtw_dump_mac_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter); -+void rtw_dump_phy_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter); -+void rtw_reset_mac_rx_counters(_adapter *padapter); -+void rtw_reset_phy_rx_counters(_adapter *padapter); -+void rtw_reset_phy_trx_ok_counters(_adapter *padapter); -+ -+#ifdef DBG_RX_COUNTER_DUMP -+ #define DUMP_DRV_RX_COUNTER BIT0 -+ #define DUMP_MAC_RX_COUNTER BIT1 -+ #define DUMP_PHY_RX_COUNTER BIT2 -+ #define DUMP_DRV_TRX_COUNTER_DATA BIT3 -+ -+ void rtw_dump_phy_rxcnts_preprocess(_adapter *padapter, u8 rx_cnt_mode); -+ void rtw_dump_rx_counters(_adapter *padapter); -+#endif -+ -+void dump_chip_info(HAL_VERSION ChipVersion); -+ -+#define BAND_CAP_2G BIT0 -+#define BAND_CAP_5G BIT1 -+#define BAND_CAP_BIT_NUM 2 -+ -+#define BW_CAP_5M BIT0 -+#define BW_CAP_10M BIT1 -+#define BW_CAP_20M BIT2 -+#define BW_CAP_40M BIT3 -+#define BW_CAP_80M BIT4 -+#define BW_CAP_160M BIT5 -+#define BW_CAP_80_80M BIT6 -+#define BW_CAP_BIT_NUM 7 -+ -+#define PROTO_CAP_11B BIT0 -+#define PROTO_CAP_11G BIT1 -+#define PROTO_CAP_11N BIT2 -+#define PROTO_CAP_11AC BIT3 -+#define PROTO_CAP_BIT_NUM 4 -+ -+#define WL_FUNC_P2P BIT0 -+#define WL_FUNC_MIRACAST BIT1 -+#define WL_FUNC_TDLS BIT2 -+#define WL_FUNC_FTM BIT3 -+#define WL_FUNC_BIT_NUM 4 -+ -+#define TBTT_PROHIBIT_SETUP_TIME 0x04 /* 128us, unit is 32us */ -+#define TBTT_PROHIBIT_HOLD_TIME 0x80 /* 4ms, unit is 32us*/ -+#define TBTT_PROHIBIT_HOLD_TIME_STOP_BCN 0x64 /* 3.2ms unit is 32us*/ -+ -+int hal_spec_init(_adapter *adapter); -+void dump_hal_spec(void *sel, _adapter *adapter); -+ -+bool hal_chk_band_cap(_adapter *adapter, u8 cap); -+bool hal_chk_bw_cap(_adapter *adapter, u8 cap); -+bool hal_chk_proto_cap(_adapter *adapter, u8 cap); -+bool hal_is_band_support(_adapter *adapter, u8 band); -+bool hal_is_bw_support(_adapter *adapter, u8 bw); -+bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode); -+bool hal_is_mimo_support(_adapter *adapter); -+u8 hal_largest_bw(_adapter *adapter, u8 in_bw); -+ -+bool hal_chk_wl_func(_adapter *adapter, u8 func); -+ -+void hal_com_config_channel_plan( -+ PADAPTER padapter, -+ char *hw_alpha2, -+ u8 hw_chplan, -+ char *sw_alpha2, -+ u8 sw_chplan, -+ BOOLEAN AutoLoadFail -+); -+ -+int hal_config_macaddr(_adapter *adapter, bool autoload_fail); -+#ifdef RTW_HALMAC -+void rtw_hal_hw_port_enable(_adapter *adapter); -+void rtw_hal_hw_port_disable(_adapter *adapter); -+#endif -+ -+BOOLEAN -+HAL_IsLegalChannel( -+ PADAPTER Adapter, -+ u32 Channel -+); -+ -+u8 MRateToHwRate(enum MGN_RATE rate); -+ -+u8 hw_rate_to_m_rate(u8 hw_rate); -+#ifdef CONFIG_RTW_DEBUG -+void dump_hw_rate_map_test(void *sel); -+#endif -+ -+void HalSetBrateCfg( -+ PADAPTER Adapter, -+ u8 *mBratesOS, -+ u16 *pBrateCfg); -+ -+BOOLEAN -+Hal_MappingOutPipe( -+ PADAPTER pAdapter, -+ u8 NumOutPipe -+); -+ -+void rtw_dump_fw_info(void *sel, _adapter *adapter); -+void rtw_restore_hw_port_cfg(_adapter *adapter); -+void rtw_mi_set_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/ -+void rtw_hal_dump_macaddr(void *sel, _adapter *adapter); -+ -+void rtw_init_hal_com_default_value(PADAPTER Adapter); -+ -+#ifdef CONFIG_FW_C2H_REG -+void c2h_evt_clear(_adapter *adapter); -+s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf); -+#endif -+ -+#ifdef CONFIG_FW_C2H_PKT -+void rtw_hal_c2h_pkt_pre_hdl(_adapter *adapter, u8 *buf, u16 len); -+void rtw_hal_c2h_pkt_hdl(_adapter *adapter, u8 *buf, u16 len); -+#endif -+ -+u8 rtw_get_mgntframe_raid(_adapter *adapter, unsigned char network_type); -+ -+void rtw_hal_update_sta_wset(_adapter *adapter, struct sta_info *psta); -+s8 rtw_get_sta_rx_nss(_adapter *adapter, struct sta_info *psta); -+s8 rtw_get_sta_tx_nss(_adapter *adapter, struct sta_info *psta); -+void rtw_hal_update_sta_ra_info(PADAPTER padapter, struct sta_info *psta); -+ -+/* access HW only */ -+u32 rtw_sec_read_cam(_adapter *adapter, u8 addr); -+void rtw_sec_write_cam(_adapter *adapter, u8 addr, u32 wdata); -+void rtw_sec_read_cam_ent(_adapter *adapter, u8 id, u8 *ctrl, u8 *mac, u8 *key); -+void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key); -+void rtw_sec_clr_cam_ent(_adapter *adapter, u8 id); -+bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id); -+ -+u8 rtw_hal_rcr_check(_adapter *adapter, u32 check_bit); -+ -+u8 rtw_hal_rcr_add(_adapter *adapter, u32 add); -+u8 rtw_hal_rcr_clear(_adapter *adapter, u32 clear); -+void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action); -+void rtw_hal_rcr_set_chk_bssid_act_non(_adapter *adapter); -+ -+void rtw_iface_enable_tsf_update(_adapter *adapter); -+void rtw_iface_disable_tsf_update(_adapter *adapter); -+void rtw_hal_periodic_tsf_update_chk(_adapter *adapter); -+void rtw_hal_periodic_tsf_update_end_timer_hdl(void *ctx); -+ -+#if CONFIG_TX_AC_LIFETIME -+#define TX_ACLT_CONF_DEFAULT 0 -+#define TX_ACLT_CONF_AP_M2U 1 -+#define TX_ACLT_CONF_MESH 2 -+#define TX_ACLT_CONF_NUM 3 -+ -+extern const char *const _tx_aclt_conf_str[]; -+#define tx_aclt_conf_str(conf) (((conf) >= TX_ACLT_CONF_NUM) ? _tx_aclt_conf_str[TX_ACLT_CONF_NUM] : _tx_aclt_conf_str[(conf)]) -+ -+struct tx_aclt_conf_t { -+ u8 en; -+ u32 vo_vi; -+ u32 be_bk; -+}; -+ -+void dump_tx_aclt_force_val(void *sel, struct dvobj_priv *dvobj); -+void rtw_hal_set_tx_aclt_force_val(_adapter *adapter, struct tx_aclt_conf_t *input, u8 arg_num); -+void dump_tx_aclt_confs(void *sel, struct dvobj_priv *dvobj); -+void rtw_hal_set_tx_aclt_conf(_adapter *adapter, u8 conf_idx, struct tx_aclt_conf_t *input, u8 arg_num); -+void rtw_hal_update_tx_aclt(_adapter *adapter); -+#endif -+ -+void hw_var_port_switch(_adapter *adapter); -+void rtw_var_set_basic_rate(PADAPTER padapter, u8 *val); -+u8 SetHwReg(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg(PADAPTER padapter, u8 variable, u8 *val); -+void rtw_hal_check_rxfifo_full(_adapter *adapter); -+void rtw_hal_reqtxrpt(_adapter *padapter, u8 macid); -+ -+u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value); -+u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value); -+ -+u32 -+MapCharToHexDigit( -+ char chTmp -+); -+ -+BOOLEAN -+GetHexValueFromString( -+ char *szStr, -+ u32 *pu4bVal, -+ u32 *pu4bMove -+); -+ -+BOOLEAN -+GetFractionValueFromString( -+ char *szStr, -+ u8 *pInteger, -+ u8 *pFraction, -+ u32 *pu4bMove -+); -+ -+BOOLEAN -+IsCommentString( -+ char *szStr -+); -+ -+BOOLEAN -+ParseQualifiedString( -+ char *In, -+ u32 *Start, -+ char *Out, -+ char LeftQualifier, -+ char RightQualifier -+); -+ -+BOOLEAN -+GetU1ByteIntegerFromStringInDecimal( -+ char *Str, -+ u8 *pInt -+); -+ -+BOOLEAN -+isAllSpaceOrTab( -+ u8 *data, -+ u8 size -+); -+ -+void linked_info_dump(_adapter *padapter, u8 benable); -+#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA -+ void rtw_get_raw_rssi_info(void *sel, _adapter *padapter); -+ void rtw_dump_raw_rssi_info(_adapter *padapter, void *sel); -+#endif -+ -+#ifdef DBG_RX_DFRAME_RAW_DATA -+ void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel); -+#endif -+void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe); -+#define HWSET_MAX_SIZE 1024 -+ -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+u32 Hal_readPGDataFromConfigFile(PADAPTER padapter); -+u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr); -+#endif /* CONFIG_EFUSE_CONFIG_FILE */ -+ -+int hal_efuse_macaddr_offset(_adapter *adapter); -+int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr); -+void rtw_dump_cur_efuse(PADAPTER padapter); -+ -+#ifdef CONFIG_RF_POWER_TRIM -+ void rtw_bb_rf_gain_offset(_adapter *padapter); -+#endif /*CONFIG_RF_POWER_TRIM*/ -+ -+void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer); -+u8 rtw_hal_busagg_qsel_check(_adapter *padapter, u8 pre_qsel, u8 next_qsel); -+ -+u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta); -+u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta); -+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA -+void rtw_hal_set_pathb_phase(_adapter *adapter, u8 phase_idx); -+#endif -+void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished); -+u8 rtw_hal_get_rsvd_page_num(struct _ADAPTER *adapter); -+ -+#ifdef CONFIG_TSF_RESET_OFFLOAD -+int rtw_hal_reset_tsf(_adapter *adapter, u8 reset_port); -+#endif -+u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port); -+ -+#ifdef CONFIG_TDLS -+ #ifdef CONFIG_TDLS_CH_SW -+ s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode); -+ #endif -+#endif -+#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT) -+s32 rtw_hal_set_wifi_btc_port_id_cmd(_adapter *adapter); -+#endif -+ -+void rtw_lps_state_chk(_adapter *adapter, u8 ps_mode); -+ -+#ifdef CONFIG_GPIO_API -+ u8 rtw_hal_get_gpio(_adapter *adapter, u8 gpio_num); -+ int rtw_hal_set_gpio_output_value(_adapter *adapter, u8 gpio_num, bool isHigh); -+ int rtw_hal_config_gpio(_adapter *adapter, u8 gpio_num, bool isOutput); -+ int rtw_hal_register_gpio_interrupt(_adapter *adapter, int gpio_num, void(*callback)(u8 level)); -+ int rtw_hal_disable_gpio_interrupt(_adapter *adapter, int gpio_num); -+#endif -+ -+s8 rtw_hal_ch_sw_iqk_info_search(_adapter *padapter, u8 central_chnl, u8 bw_mode); -+void rtw_hal_ch_sw_iqk_info_backup(_adapter *adapter); -+void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case); -+ -+#ifdef CONFIG_GPIO_WAKEUP -+void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable); -+void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval); -+void rtw_hal_set_input_gpio(_adapter *padapter, u8 index); -+#define GPIO_OUTPUT_LOW 0 -+#define GPIO_OUTPUT_HIGH 1 -+#endif -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ extern char *rtw_phy_file_path; -+ extern char rtw_phy_para_file_path[PATH_LENGTH_MAX]; -+ #define GetLineFromBuffer(buffer) strsep(&buffer, "\r\n") -+#endif -+ -+void update_IOT_info(_adapter *padapter); -+#ifdef CONFIG_RTS_FULL_BW -+void rtw_set_rts_bw(_adapter *padapter); -+#endif/*CONFIG_RTS_FULL_BW*/ -+ -+void ResumeTxBeacon(_adapter *padapter); -+void StopTxBeacon(_adapter *padapter); -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ u8 rtw_hal_antdiv_before_linked(_adapter *padapter); -+ void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); -+#endif -+ -+#ifdef DBG_SEC_CAM_MOVE -+ void rtw_hal_move_sta_gk_to_dk(_adapter *adapter); -+ void rtw_hal_read_sta_dk_key(_adapter *adapter, u8 key_id); -+#endif -+ -+#ifdef CONFIG_LPS_PG -+#define LPSPG_RSVD_PAGE_SET_MACID(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 0, 8, _value)/*used macid*/ -+#define LPSPG_RSVD_PAGE_SET_MBSSCAMID(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 8, 8, _value)/*used BSSID CAM entry*/ -+#define LPSPG_RSVD_PAGE_SET_PMC_NUM(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 16, 8, _value)/*Max used Pattern Match CAM entry*/ -+#define LPSPG_RSVD_PAGE_SET_MU_RAID_GID(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 24, 8, _value)/*Max MU rate table Group ID*/ -+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_NUM(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 0, 8, _value)/*used Security CAM entry number*/ -+#define LPSPG_RSVD_PAGE_SET_DRV_RSVDPAGE_NUM(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 8, 8, _value)/*Txbuf used page number for fw offload*/ -+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID1(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 0, 8, _value)/*used Security CAM entry -1*/ -+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID2(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 8, 8, _value)/*used Security CAM entry -2*/ -+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID3(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 16, 8, _value)/*used Security CAM entry -3*/ -+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID4(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 24, 8, _value)/*used Security CAM entry -4*/ -+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID5(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 0, 8, _value)/*used Security CAM entry -5*/ -+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID6(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 8, 8, _value)/*used Security CAM entry -6*/ -+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID7(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 16, 8, _value)/*used Security CAM entry -7*/ -+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID8(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 24, 8, _value)/*used Security CAM entry -8*/ -+enum lps_pg_hdl_id { -+ LPS_PG_INFO_CFG = 0, -+ LPS_PG_REDLEMEM, -+ LPS_PG_PHYDM_DIS, -+ LPS_PG_PHYDM_EN, -+}; -+ -+u8 rtw_hal_set_lps_pg_info_cmd(_adapter *adapter); -+u8 rtw_hal_set_lps_pg_info(_adapter *adapter); -+#endif -+ -+int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset, u32 page_num, u8 *buffer, u32 buffer_size); -+void rtw_hal_construct_beacon(_adapter *padapter, u8 *pframe, u32 *pLength); -+void rtw_hal_construct_NullFunctionData(PADAPTER, u8 *pframe, u32 *pLength, -+ u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave); -+ -+bool _rtw_wow_chk_cap(_adapter *adapter, u8 cap); -+#ifdef CONFIG_WOWLAN -+struct rtl_wow_pattern { -+ u16 crc; -+ u8 type; -+ u32 mask[4]; -+}; -+void rtw_wow_pattern_cam_dump(_adapter *adapter); -+ -+void rtw_dump_wow_pattern(void *sel, struct rtl_wow_pattern *pwow_pattern, u8 idx); -+#ifdef CONFIG_WOW_PATTERN_HW_CAM -+void rtw_wow_pattern_read_cam_ent(_adapter *adapter, u8 id, struct rtl_wow_pattern *context); -+#endif -+ -+struct rtw_ndp_info { -+ u8 enable:1; -+ u8 check_remote_ip:1; /* Need to Check Sender IP or not */ -+ u8 rsvd:6; -+ u8 num_of_target_ip; /* Number of Check IP which NA query IP */ -+ u8 target_link_addr[6]; /* DUT's MAC address */ -+ u8 remote_ipv6_addr[16]; /* Just respond IP */ -+ u8 target_ipv6_addr[16]; /* target IP */ -+}; -+#define REMOTE_INFO_CTRL_SET_VALD_EN(target, _value) \ -+ SET_BITS_TO_LE_4BYTE(target + 0, 0, 8, _value) -+#define REMOTE_INFO_CTRL_SET_PTK_EN(target, _value) \ -+ SET_BITS_TO_LE_4BYTE(target + 1, 0, 1, _value) -+#define REMOTE_INFO_CTRL_SET_GTK_EN(target, _value) \ -+ SET_BITS_TO_LE_4BYTE(target + 1, 1, 1, _value) -+#define REMOTE_INFO_CTRL_SET_GTK_IDX(target, _value) \ -+ SET_BITS_TO_LE_4BYTE(target + 2, 0, 8, _value) -+#endif /*CONFIG_WOWLAN*/ -+ -+#ifdef CONFIG_PROC_DEBUG -+void rtw_dump_phy_cap(void *sel, _adapter *adapter); -+#endif -+void rtw_dump_rsvd_page(void *sel, _adapter *adapter, u8 page_offset, u8 page_num); -+#ifdef CONFIG_SUPPORT_FIFO_DUMP -+void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32 fifo_size); -+#endif -+ -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id); -+s32 rtw_set_default_port_id(_adapter *adapter); -+s32 rtw_set_ps_rsvd_page(_adapter *adapter); -+ -+#define get_dft_portid(adapter) (adapter_to_dvobj(adapter)->dft.port_id) -+#define get_dft_macid(adapter) (adapter_to_dvobj(adapter)->dft.mac_id) -+ -+/*void rtw_search_default_port(_adapter *adapter);*/ -+#endif -+ -+#ifdef CONFIG_P2P_PS -+#ifdef RTW_HALMAC -+void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state); -+#endif -+#endif -+ -+#ifdef RTW_CHANNEL_SWITCH_OFFLOAD -+void rtw_hal_switch_chnl_and_set_bw_offload(_adapter *adapter, u8 central_ch, u8 pri_ch_idx, u8 bw); -+#endif -+ -+s16 translate_dbm_to_percentage(s16 signal); -+ -+#ifdef CONFIG_SUPPORT_MULTI_BCN -+void rtw_ap_multi_bcn_cfg(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+#ifdef CONFIG_BCN_RECOVERY -+u8 rtw_ap_bcn_recovery(_adapter *padapter); -+#endif -+#ifdef CONFIG_BCN_XMIT_PROTECT -+u8 rtw_ap_bcn_queue_empty_check(_adapter *padapter, u32 txbcn_timer_ms); -+#endif -+#endif /*CONFIG_SWTIMER_BASED_TXBCN*/ -+ -+#ifdef CONFIG_FW_HANDLE_TXBCN -+void rtw_ap_mbid_bcn_en(_adapter *adapter, u8 mbcn_id); -+void rtw_ap_mbid_bcn_dis(_adapter *adapter, u8 mbcn_id); -+#endif -+ -+void rtw_hal_get_trx_path(struct dvobj_priv *d, enum rf_type *type, -+ enum bb_path *tx, enum bb_path *rx); -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+void rtw_hal_beamforming_config_csirate(PADAPTER adapter); -+#endif -+#endif -+ -+u8 phy_get_capable_tx_num(_adapter *adapter, enum MGN_RATE rate); -+u8 phy_get_current_tx_num(_adapter *adapter, enum MGN_RATE rate); -+ -+#ifdef CONFIG_RTL8812A -+u8 * rtw_hal_set_8812a_vendor_ie(_adapter *padapter , u8 *pframe ,uint *frlen ); -+#endif -+ -+#ifdef CONFIG_PROTSEL_PORT -+void rtw_enter_protsel_port(_adapter *padapter, u8 port_sel); -+bool rtw_assert_protsel_port(_adapter *padapter, u32 addr, u8 len); -+void rtw_leave_protsel_port(_adapter *padapter); -+#else -+static inline void rtw_enter_protsel_port(_adapter *padapter, u8 port_sel) {} -+static inline bool rtw_assert_protsel_port(_adapter *padapter, u32 addr, u8 len) {return true; } -+static inline void rtw_leave_protsel_port(_adapter *padapter) {} -+#endif -+#ifdef CONFIG_PROTSEL_ATIMDTIM -+void rtw_enter_protsel_atimdtim(_adapter *padapter, u8 port_sel); -+bool rtw_assert_protsel_atimdtim(_adapter *padapter, u32 addr, u8 len); -+void rtw_leave_protsel_atimdtim(_adapter *padapter); -+#else -+static inline void rtw_enter_protsel_atimdtim(_adapter *padapter, u8 port_sel) {} -+static inline bool rtw_assert_protsel_atimdtim(_adapter *padapter, u32 addr, u8 len) {return true; } -+static inline void rtw_leave_protsel_atimdtim(_adapter *padapter) {} -+#endif -+#ifdef CONFIG_PROTSEL_MACSLEEP -+void rtw_enter_protsel_macsleep(_adapter *padapter, u8 sel); -+bool rtw_assert_protsel_macsleep(_adapter *padapter, u32 addr, u8 len); -+void rtw_leave_protsel_macsleep(_adapter *padapter); -+#else -+static inline void rtw_enter_protsel_macsleep(_adapter *padapter, u8 port_sel) {} -+static inline bool rtw_assert_protsel_macsleep(_adapter *padapter, u32 addr, u8 len) {return true; } -+static inline void rtw_leave_protsel_macsleep(_adapter *padapter) {} -+#endif -+#endif /* __HAL_COMMON_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/hal_com_h2c.h b/drivers/staging/rtl8723cs/include/hal_com_h2c.h -new file mode 100644 -index 000000000000..c9db477b0b17 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_com_h2c.h -@@ -0,0 +1,817 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __COMMON_H2C_H__ -+#define __COMMON_H2C_H__ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ -+ * --------------------------------------------------------------------------------------------------------- -+ * 88e, 8723b, 8812, 8821, 92e use the same FW code base */ -+enum h2c_cmd { -+ /* Common Class: 000 */ -+ H2C_RSVD_PAGE = 0x00, -+ H2C_MEDIA_STATUS_RPT = 0x01, -+ H2C_SCAN_ENABLE = 0x02, -+ H2C_KEEP_ALIVE = 0x03, -+ H2C_DISCON_DECISION = 0x04, -+ H2C_PSD_OFFLOAD = 0x05, -+ H2C_CUSTOMER_STR_REQ = 0x06, -+ H2C_TXPWR_IDX_OFFLOAD = 0x07, -+ H2C_AP_OFFLOAD = 0x08, -+ H2C_BCN_RSVDPAGE = 0x09, -+ H2C_PROBERSP_RSVDPAGE = 0x0A, -+ H2C_FCS_RSVDPAGE = 0x10, -+ H2C_FCS_INFO = 0x11, -+ H2C_AP_WOW_GPIO_CTRL = 0x13, -+#ifdef CONFIG_MCC_MODE -+ H2C_MCC_RQT_TSF = 0x15, -+ H2C_MCC_MACID_BITMAP = 0x16, -+ H2C_MCC_LOCATION = 0x10, -+ H2C_MCC_CTRL_V2 = 0x17, -+ H2C_MCC_CTRL = 0x18, -+ H2C_MCC_TIME_SETTING = 0x19, -+ H2C_MCC_IQK_PARAM = 0x1A, -+#endif /* CONFIG_MCC_MODE */ -+ H2C_CHNL_SWITCH_OPER_OFFLOAD = 0x1C, -+ H2C_SINGLE_CHANNELSWITCH_V2 = 0x1D, -+ -+ /* PoweSave Class: 001 */ -+ H2C_SET_PWR_MODE = 0x20, -+ H2C_PS_TUNING_PARA = 0x21, -+ H2C_PS_TUNING_PARA2 = 0x22, -+ H2C_P2P_LPS_PARAM = 0x23, -+ H2C_P2P_PS_OFFLOAD = 0x24, -+ H2C_PS_SCAN_ENABLE = 0x25, -+ H2C_SAP_PS_ = 0x26, -+ H2C_INACTIVE_PS_ = 0x27, /* Inactive_PS */ -+ H2C_FWLPS_IN_IPS_ = 0x28, -+#ifdef CONFIG_LPS_POFF -+ H2C_LPS_POFF_CTRL = 0x29, -+ H2C_LPS_POFF_PARAM = 0x2A, -+#endif -+#ifdef CONFIG_LPS_PG -+ H2C_LPS_PG_INFO = 0x2B, -+#endif -+ -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+ H2C_DEFAULT_PORT_ID = 0x2C, -+#endif -+ /* Dynamic Mechanism Class: 010 */ -+ H2C_MACID_CFG = 0x40, -+ H2C_TXBF = 0x41, -+ H2C_RSSI_SETTING = 0x42, -+ H2C_AP_REQ_TXRPT = 0x43, -+ H2C_INIT_RATE_COLLECT = 0x44, -+ H2C_IQ_CALIBRATION = 0x45, -+ -+ H2C_RA_MASK_3SS = 0x46,/* for 8814A */ -+ H2C_RA_PARA_ADJUST = 0x47,/* CONFIG_RA_DBG_CMD */ -+ H2C_DYNAMIC_TX_PATH = 0x48,/* for 8814A */ -+ -+ H2C_FW_TRACE_EN = 0x49, -+#ifdef RTW_PER_CMD_SUPPORT_FW -+ H2C_REQ_PER_RPT = 0x4e, -+#endif -+ /* BT Class: 011 */ -+ H2C_B_TYPE_TDMA = 0x60, -+ H2C_BT_INFO = 0x61, -+ H2C_FORCE_BT_TXPWR = 0x62, -+ H2C_BT_IGNORE_WLANACT = 0x63, -+ H2C_DAC_SWING_VALUE = 0x64, -+ H2C_ANT_SEL_RSV = 0x65, -+ H2C_WL_OPMODE = 0x66, -+ H2C_BT_MP_OPER = 0x67, -+ H2C_BT_CONTROL = 0x68, -+ H2C_BT_WIFI_CTRL = 0x69, -+ H2C_BT_FW_PATCH = 0x6A, -+#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT) -+ H2C_BTC_WL_PORT_ID = 0x71, -+#endif -+ /* WOWLAN Class: 100 */ -+ H2C_WOWLAN = 0x80, -+ H2C_REMOTE_WAKE_CTRL = 0x81, -+ H2C_AOAC_GLOBAL_INFO = 0x82, -+ H2C_AOAC_RSVD_PAGE = 0x83, -+ H2C_AOAC_RSVD_PAGE2 = 0x84, -+ H2C_D0_SCAN_OFFLOAD_CTRL = 0x85, -+ H2C_D0_SCAN_OFFLOAD_INFO = 0x86, -+ H2C_CHNL_SWITCH_OFFLOAD = 0x87, -+ H2C_AOAC_RSVDPAGE3 = 0x88, -+ H2C_GPIO_CUSTOM = 0x89, -+ H2C_P2P_OFFLOAD_RSVD_PAGE = 0x8A, -+ H2C_P2P_OFFLOAD = 0x8B, -+ H2C_WAR_OFFLOAD = 0x8D, -+ H2C_WAROFLD_RSVDPAGE1 = 0x8E, -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ H2C_UDP_KEEPALIVE = 0x90, -+#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+#ifdef CONFIG_FW_HANDLE_TXBCN -+ H2C_FW_BCN_OFFLOAD = 0xBA, -+#endif -+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR -+ H2C_FW_CRC5_SEARCH = 0xBB, -+#endif -+ H2C_RESET_TSF = 0xC0, -+#ifdef CONFIG_FW_CORRECT_BCN -+ H2C_BCNHWSEQ = 0xC5, -+#endif -+ H2C_CUSTOMER_STR_W1 = 0xC6, -+ H2C_CUSTOMER_STR_W2 = 0xC7, -+ H2C_CUSTOMER_STR_W3 = 0xC8, -+ H2C_BT_UNKNOWN_DEVICE_WA = 0xD1, -+#ifdef DBG_FW_DEBUG_MSG_PKT -+ H2C_FW_DBG_MSG_PKT = 0xE1, -+#endif /*DBG_FW_DEBUG_MSG_PKT*/ -+ H2C_MAXID, -+}; -+ -+#define H2C_INACTIVE_PS_LEN 4 -+#define H2C_RSVDPAGE_LOC_LEN 5 -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+#define H2C_DEFAULT_PORT_ID_LEN 2 -+#define H2C_MEDIA_STATUS_RPT_LEN 4 -+#else -+#define H2C_MEDIA_STATUS_RPT_LEN 3 -+#endif -+#define H2C_GPIO_CUSTOM_LEN 3 -+#define H2C_KEEP_ALIVE_CTRL_LEN 2 -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+#define H2C_KEEP_ALIVE_PATTERN_LEN 7 -+#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+#define H2C_DISCON_DECISION_LEN 3 -+#define H2C_AP_OFFLOAD_LEN 3 -+#define H2C_AP_WOW_GPIO_CTRL_LEN 4 -+#define H2C_AP_PS_LEN 2 -+#define H2C_PWRMODE_LEN 7 -+#define H2C_PSTUNEPARAM_LEN 4 -+#define H2C_MACID_CFG_LEN 7 -+#define H2C_BTMP_OPER_LEN 5 -+#define H2C_WOWLAN_LEN 7 -+#define H2C_REMOTE_WAKE_CTRL_LEN 3 -+#define H2C_AOAC_GLOBAL_INFO_LEN 2 -+#define H2C_AOAC_RSVDPAGE_LOC_LEN 7 -+#define H2C_SCAN_OFFLOAD_CTRL_LEN 4 -+#define H2C_BT_FW_PATCH_LEN 6 -+#define H2C_RSSI_SETTING_LEN 4 -+#define H2C_AP_REQ_TXRPT_LEN 3 -+#define H2C_FORCE_BT_TXPWR_LEN 3 -+#define H2C_BCN_RSVDPAGE_LEN 5 -+#define H2C_PROBERSP_RSVDPAGE_LEN 5 -+#define H2C_P2PRSVDPAGE_LOC_LEN 5 -+#define H2C_P2P_OFFLOAD_LEN 3 -+#ifdef CONFIG_MCC_MODE -+ #define H2C_MCC_CTRL_LEN 7 -+#ifdef CONFIG_MCC_MODE_V2 -+ #define H2C_MCC_LOCATION_LEN 7 -+#else -+ #define H2C_MCC_LOCATION_LEN 3 -+#endif -+ #define H2C_MCC_MACID_BITMAP_LEN 6 -+ #define H2C_MCC_RQT_TSF_LEN 1 -+ #define H2C_MCC_TIME_SETTING_LEN 6 -+ #define H2C_MCC_IQK_PARAM_LEN 7 -+#endif /* CONFIG_MCC_MODE */ -+#ifdef CONFIG_LPS_PG -+#ifdef CONFIG_RTL8822C -+ #define H2C_LPS_PG_INFO_LEN 4 -+#else -+ #define H2C_LPS_PG_INFO_LEN 2 -+#endif -+ #define H2C_LPSPG_LEN 16 -+#endif -+#ifdef CONFIG_LPS_POFF -+ #define H2C_LPS_POFF_CTRL_LEN 1 -+ #define H2C_LPS_POFF_PARAM_LEN 5 -+#endif -+ -+#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT) -+#define H2C_BTC_WL_PORT_ID_LEN 1 -+#endif -+ -+#ifdef DBG_FW_DEBUG_MSG_PKT -+ #define H2C_FW_DBG_MSG_PKT_LEN 2 -+#endif /*DBG_FW_DEBUG_MSG_PKT*/ -+ -+#define H2C_SINGLE_CHANNELSWITCH_V2_LEN 3 -+#define H2C_BT_UNKNOWN_DEVICE_WA_LEN 1 -+ -+#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR -+#define H2C_FW_CRC5_SEARCH_LEN 7 -+#endif -+ -+#ifdef CONFIG_WAR_OFFLOAD -+#define H2C_WAR_OFFLOAD_LEN 3 -+#define H2C_WAROFLD_RSVDPAGE1_LEN 6 -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+ -+#define eq_mac_addr(a, b) (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0) -+#define cp_mac_addr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5]) -+#define cpIpAddr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3]) -+#define cpIpv6Addr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5], (des)[6] = (src)[6], (des)[7] = (src)[7], (des)[8] = (src)[8], (des)[9] = (src)[9], (des)[10] = (src)[10], (des)[11] = (src)[11], (des)[12] = (src)[12], (des)[13] = (src)[13], (des)[14] = (src)[14], (des)[15] = (src)[15]) -+ -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+#define FW_WOWLAN_FUN_EN BIT(0) -+#define FW_WOWLAN_PATTERN_MATCH BIT(1) -+#define FW_WOWLAN_MAGIC_PKT BIT(2) -+#define FW_WOWLAN_UNICAST BIT(3) -+#define FW_WOWLAN_ALL_PKT_DROP BIT(4) -+#define FW_WOWLAN_GPIO_ACTIVE BIT(5) -+#define FW_WOWLAN_REKEY_WAKEUP BIT(6) -+#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) -+ -+#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) -+#define FW_FW_PARSE_MAGIC_PKT BIT(1) -+ -+#define FW_REMOTE_WAKE_CTRL_EN BIT(0) -+#define FW_REALWOWLAN_EN BIT(5) -+ -+#define FW_WOWLAN_KEEP_ALIVE_EN BIT(0) -+#define FW_ADOPT_USER BIT(1) -+#define FW_WOWLAN_KEEP_ALIVE_PKT_TYPE BIT(2) -+ -+#define FW_REMOTE_WAKE_CTRL_EN BIT(0) -+#define FW_ARP_EN BIT(1) -+#define FW_REALWOWLAN_EN BIT(5) -+#define FW_WOW_FW_UNICAST_EN BIT(7) -+ -+#define FW_IPS_DISABLE_BBRF BIT(0) -+#define FW_IPS_WRC BIT(1) -+ -+#endif /* CONFIG_WOWLAN */ -+ -+/* _RSVDPAGE_LOC_CMD_0x00 */ -+#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+/* _MEDIA_STATUS_RPT_PARM_CMD_0x01 */ -+#define SET_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) -+#define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 1, 1, (__Value)) -+#define SET_H2CCMD_MSRRPT_PARM_MIRACAST(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 2, 1, (__Value)) -+#define SET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 3, 1, (__Value)) -+#define SET_H2CCMD_MSRRPT_PARM_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 4, 4, (__Value)) -+#define SET_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 1, 0, 8, (__Value)) -+#define SET_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 2, 0, 8, (__Value)) -+#define SET_H2CCMD_MSRRPT_PARM_PORT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 3, 0, 3, (__Value)) -+ -+#define GET_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 0, 1) -+#define GET_H2CCMD_MSRRPT_PARM_MIRACAST(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 2, 1) -+#define GET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 3, 1) -+#define GET_H2CCMD_MSRRPT_PARM_ROLE(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 4, 4) -+ -+#ifdef CONFIG_WAR_OFFLOAD -+#define SET_IPHDR_VERSION(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 0, __Value) -+#define SET_IPHDR_DSCP(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 1, __Value) -+#define SET_IPHDR_TOTAL_LEN(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 2, __Value) -+#define SET_IPHDR_IDENTIFIER(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 4, __Value) -+#define SET_IPHDR_FLAGS(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 6, __Value) -+#define SET_IPHDR_FRAG_OFFSET(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 7, __Value) -+#define SET_IPHDR_TTL(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 8, __Value) -+#define SET_IPHDR_PROTOCOL(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 9, __Value) -+#define SET_IPHDR_HDR_CHECKSUM(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 10, __Value) -+#define SET_IPHDR_SRC_IP_ADDR(__pHeader, __Value) cpIpAddr(((u8 *)(__pHeader))+12, (u8 *)(__Value)) -+#define SET_IPHDR_DST_IP_ADDR(__pHeader, __Value) cpIpAddr(((u8 *)(__pHeader))+16, (u8 *)(__Value)) -+#define SET_UDP_SRC_PORT(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 0, __Value) -+#define SET_UDP_DST_PORT(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 2, __Value) -+#define SET_UDP_LEN(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 4, __Value) -+#define SET_UDP_CHECKSUM(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 6, __Value) -+ -+#define SET_MDNS_HDR_FLAG(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 2, __Value) -+ -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+#ifdef CONFIG_OFFLOAD_MDNS_V6 -+#define SET_IPHDRV6_VERSION(__pHeader, __Value) SET_BITS_TO_LE_1BYTE(__pHeader, 4, 4, __Value) -+#define SET_IPHDRV6_TRAFFIC_CLASS(__pHeader, __Value) SET_BITS_TO_LE_2BYTE(__pHeader, 4, 8, __Value) -+#define SET_IPHDRV6_FLOW_LABEL(__pHeader, __Value) SET_BITS_TO_LE_4BYTE(__pHeader, 12, 20, __Value) -+#define SET_IPHDRV6_PAYLOAD_LENGTH(__pHeader, __Value) SET_BITS_TO_LE_2BYTE(((u8 *)(__pHeader)) + 4, 0, 16, __Value) -+#define SET_IPHDRV6_NEXT_HEADER(__pHeader, __Value) SET_BITS_TO_LE_1BYTE((__pHeader) + 6, 0, 8, __Value) -+#define SET_IPHDRV6_HOP_LIMIT(__pHeader, __Value) SET_BITS_TO_LE_1BYTE((__pHeader) + 7, 0, 8, __Value) -+#define SET_IPHDRV6_SRC_IP_ADDR(__pHeader, __Value) cpIpv6Addr((u8 *)(__pHeader) + 8, (u8 *)(__Value)) -+#define SET_IPHDRV6_DST_IP_ADDR(__pHeader, __Value) cpIpv6Addr((u8 *)(__pHeader) + 24, (u8 *)(__Value)) -+#endif -+ -+ -+ -+#define H2C_MSR_ROLE_RSVD 0 -+#define H2C_MSR_ROLE_STA 1 -+#define H2C_MSR_ROLE_AP 2 -+#define H2C_MSR_ROLE_GC 3 -+#define H2C_MSR_ROLE_GO 4 -+#define H2C_MSR_ROLE_TDLS 5 -+#define H2C_MSR_ROLE_ADHOC 6 -+#define H2C_MSR_ROLE_MESH 7 -+#define H2C_MSR_ROLE_MAX 8 -+ -+extern const char *const _h2c_msr_role_str[]; -+#define h2c_msr_role_str(role) (((role) >= H2C_MSR_ROLE_MAX) ? _h2c_msr_role_str[H2C_MSR_ROLE_MAX] : _h2c_msr_role_str[(role)]) -+ -+#define H2C_MSR_FMT "%s %s%s" -+#define H2C_MSR_ARG(h2c_msr) \ -+ GET_H2CCMD_MSRRPT_PARM_OPMODE((h2c_msr)) ? " C" : "", \ -+ h2c_msr_role_str(GET_H2CCMD_MSRRPT_PARM_ROLE((h2c_msr))), \ -+ GET_H2CCMD_MSRRPT_PARM_MIRACAST((h2c_msr)) ? (GET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK((h2c_msr)) ? " MSINK" : " MSRC") : "" -+ -+s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, bool macid_ind, u8 macid_end); -+s32 rtw_hal_set_FwMediaStatusRpt_single_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid); -+s32 rtw_hal_set_FwMediaStatusRpt_range_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, u8 macid_end); -+ -+/* _KEEP_ALIVE_CMD_0x03 */ -+#define SET_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_H2CCMD_KEEPALIVE_PARM_PORT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 3, __Value) -+#define SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+ -+/* _DISCONNECT_DECISION_CMD_0x04 */ -+#define SET_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_H2CCMD_DISCONDECISION_PARM_TRY_BCN_FAIL_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_H2CCMD_DISCONDECISION_PARM_DISCONNECT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+#define SET_H2CCMD_DISCONDECISION_PORT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 3, __Value) -+#define SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+#define SET_H2CCMD_DISCONDECISION_PARM_TRY_OK_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/*UDP_KEEP_ALIVE 0x90*/ -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+/*data 0*/ -+#define SET_H2CCMD_UDP_KEEP_ALIVE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value); -+#define SET_H2CCMD_UDP_KEEP_ALIVE_PACKET_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 7, __Value); -+/*data 1*/ -+#define SET_H2CCMD_UDP_KEEP_ALIVE_ACK_PATTERN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value); -+#define SET_H2CCMD_UDP_KEEP_ALIVE_ACK_PATTERN_idx(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 7, __Value); -+/*data 2*/ -+#define SET_H2CCMD_UDP_KEEP_ALIVE_WAKE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value); -+#define SET_H2CCMD_UDP_KEEP_ALIVE_WAKE_PATTERN_idx(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value); -+/*data3*/ -+#define SET_H2CCMD_UDP_KEEP_ALIVE_PERIOD_LOW_BIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value); -+/*data4*/ -+#define SET_H2CCMD_UDP_KEEP_ALIVE_PERIOD_HI_BIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value); -+/*data5*/ -+#define SET_H2CCMD_UDP_KEEP_ALIVE_RETRY_INTERVAL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value); -+/*data6*/ -+#define SET_H2CCMD_UDP_KEEP_ALIVE_RETRY_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value); -+#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+#ifdef CONFIG_RTW_CUSTOMER_STR -+#define RTW_CUSTOMER_STR_LEN 16 -+#define RTW_CUSTOMER_STR_FMT "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x" -+#define RTW_CUSTOMER_STR_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \ -+ ((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9], ((u8 *)(x))[10], ((u8 *)(x))[11], \ -+ ((u8 *)(x))[12], ((u8 *)(x))[13], ((u8 *)(x))[14], ((u8 *)(x))[15] -+ -+/* H2C_CUSTOMER_STR_REQ 0x06 */ -+#define H2C_CUSTOMER_STR_REQ_LEN 1 -+#define SET_H2CCMD_CUSTOMER_STR_REQ_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) -+s32 rtw_hal_h2c_customer_str_req(_adapter *adapter); -+s32 rtw_hal_customer_str_read(_adapter *adapter, u8 *cs); -+ -+/* H2C_CUSTOMER_STR_W1 0xC6 */ -+#define H2C_CUSTOMER_STR_W1_LEN 7 -+#define SET_H2CCMD_CUSTOMER_STR_W1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) -+#define H2CCMD_CUSTOMER_STR_W1_BYTE0(__pH2CCmd) (((u8 *)(__pH2CCmd)) + 1) -+ -+/* H2C_CUSTOMER_STR_W2 0xC7 */ -+#define H2C_CUSTOMER_STR_W2_LEN 7 -+#define SET_H2CCMD_CUSTOMER_STR_W2_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) -+#define H2CCMD_CUSTOMER_STR_W2_BYTE6(__pH2CCmd) (((u8 *)(__pH2CCmd)) + 1) -+ -+/* H2C_CUSTOMER_STR_W3 0xC8 */ -+#define H2C_CUSTOMER_STR_W3_LEN 5 -+#define SET_H2CCMD_CUSTOMER_STR_W3_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) -+#define H2CCMD_CUSTOMER_STR_W3_BYTE12(__pH2CCmd) (((u8 *)(__pH2CCmd)) + 1) -+s32 rtw_hal_h2c_customer_str_write(_adapter *adapter, const u8 *cs); -+s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs); -+#endif /* CONFIG_RTW_CUSTOMER_STR */ -+ -+#ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX -+#define H2C_TXPWR_IDX_OFFLOAD_LEN 4 -+#define SET_H2CCMD_TXPWR_IDX_CCK(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_TXPWR_IDX_OFDM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd + 1, 0, 8, __Value) -+#define SET_H2CCMD_TXPWR_IDX_HT1SS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd + 2, 0, 8, __Value) -+#define SET_H2CCMD_TXPWR_IDX_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd + 3, 0, 1, __Value) -+#endif -+ -+/* _AP_Offload 0x08 */ -+#define SET_H2CCMD_AP_WOWLAN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+/* _BCN_RsvdPage 0x09 */ -+#define SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+/* _Probersp_RsvdPage 0x0a */ -+#define SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+/* _Probersp_RsvdPage 0x13 */ -+ -+#define SET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -+#define SET_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+#define GET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) -+/* _PWR_MOD_CMD_0x20 */ -+ -+#define SET_H2CCMD_AP_WOW_GPIO_CTRL_INDEX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_H2CCMD_AP_WOW_GPIO_CTRL_C2H_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -+#define SET_H2CCMD_AP_WOW_GPIO_CTRL_PLUS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) -+#define SET_H2CCMD_AP_WOW_GPIO_CTRL_HIGH_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) -+#define SET_H2CCMD_AP_WOW_GPIO_CTRL_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) -+#define SET_H2CCMD_AP_WOW_GPIO_CTRL_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_H2CCMD_AP_WOW_GPIO_CTRL_C2H_DURATION(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+/* _AP_PS 0x26 */ -+#define SET_H2CCMD_AP_WOW_PS_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_AP_WOW_PS_32K_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_H2CCMD_AP_WOW_PS_RF(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_H2CCMD_AP_WOW_PS_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+ -+/* INACTIVE_PS 0x27, duration unit is TBTT */ -+#define SET_H2CCMD_INACTIVE_PS_EN(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_INACTIVE_IGNORE_PS(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_H2CCMD_INACTIVE_PERIOD_SCAN_EN(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_H2CCMD_INACTIVE_DISBBRF(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+#define SET_H2CCMD_INACTIVE_PORT_NUM(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 3, __Value) -+#define SET_H2CCMD_INACTIVE_PS_FREQ(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd + 1, 0, 8, __Value) -+#define SET_H2CCMD_INACTIVE_PS_DURATION(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd + 2, 0, 8, __Value) -+#define SET_H2CCMD_INACTIVE_PS_PERIOD_SCAN_TIME(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd + 3, 0, 8, __Value) -+ -+#ifdef CONFIG_LPS_POFF -+/*PARTIAL OFF Control 0x29*/ -+#define SET_H2CCMD_LPS_POFF_CTRL_EN(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+/*PARTIAL OFF PARAM 0x2A*/ -+#define SET_H2CCMD_LPS_POFF_PARAM_RDVLD(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_LPS_POFF_PARAM_WRVLD(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_H2CCMD_LPS_POFF_PARAM_STARTADDL(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_H2CCMD_LPS_POFF_PARAM_STARTADDH(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+#define SET_H2CCMD_LPS_POFF_PARAM_ENDADDL(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_H2CCMD_LPS_POFF_PARAM_ENDADDH(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+#endif -+ -+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT -+/* DEFAULT PORT ID 0x2C*/ -+#define SET_H2CCMD_DFTPID_PORT_ID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 8, (__Value)) -+#define SET_H2CCMD_DFTPID_MAC_ID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 1, 0, 8, (__Value)) -+#endif -+ -+#ifdef CONFIG_MCC_MODE -+/* MCC LOC CMD 0x10 */ -+#define SET_H2CCMD_MCC_RSVDPAGE_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_MCC_PWRIDX_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 3, 0, 1, __Value) -+#define SET_H2CCMD_MCC_PWRIDX_OFFLOAD_RFNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 3, 4, 4, __Value) -+#define SET_H2CCMD_MCC_PWRIDX_RSVDPAGE_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 4, 0, 8, __Value) -+ -+/* MCC RQT TSF 0x15 */ -+#define SET_H2CCMD_MCC_RQT_TSFX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_H2CCMD_MCC_RQT_TSFY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -+ -+/* MCC MAC ID CMD 0x16 */ -+#define SET_H2CCMD_MCC_MACID_BITMAP_L(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_MCC_MACID_BITMAP_H(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+ -+/* NEW MCC CTRL CMD 0x17 */ -+#define SET_H2CCMD_MCC_CTRL_V2_ORDER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_TOTALNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_CENTRAL_CH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_PRIMARY_CH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 4, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 4, 4, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 3, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_INCURCH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 3, 1, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_DIS_SW_RETRY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 1, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_DISTXNULL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 5, 1, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_C2HRPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 6, 2, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_TSFX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 4, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_NULL_EARLY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 4, 4, __Value) -+#define SET_H2CCMD_MCC_CTRL_V2_UPDATE_PARM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 7, 1, __Value) -+ -+ -+/* MCC CTRL CMD 0x18 */ -+#define SET_H2CCMD_MCC_CTRL_ORDER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_H2CCMD_MCC_CTRL_TOTALNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -+#define SET_H2CCMD_MCC_CTRL_CHIDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_H2CCMD_MCC_CTRL_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 2, __Value) -+#define SET_H2CCMD_MCC_CTRL_BW40SC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 2, 3, __Value) -+#define SET_H2CCMD_MCC_CTRL_BW80SC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 5, 3, __Value) -+#define SET_H2CCMD_MCC_CTRL_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_H2CCMD_MCC_CTRL_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 3, __Value) -+#define SET_H2CCMD_MCC_CTRL_INCURCH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 3, 1, __Value) -+#define SET_H2CCMD_MCC_CTRL_RSVD0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 4, __Value) -+#define SET_H2CCMD_MCC_CTRL_RSVD1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) -+#define SET_H2CCMD_MCC_CTRL_RFETYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 0, 4, __Value) -+#define SET_H2CCMD_MCC_CTRL_DISTXNULL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 4, 1, __Value) -+#define SET_H2CCMD_MCC_CTRL_C2HRPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 5, 2, __Value) -+#define SET_H2CCMD_MCC_CTRL_CHSCAN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 7, 1, __Value) -+ -+/* MCC Time CMD 0x19 */ -+#define SET_H2CCMD_MCC_TIME_SETTING_FW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_MCC_TIME_SETTING_TSF_SYNC_OFFSET(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 7, __Value) -+#define SET_H2CCMD_MCC_TIME_SETTING_START_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 4, __Value) -+#define SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 4, __Value) -+#define SET_H2CCMD_MCC_TIME_SETTING_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 1, __Value) -+#define SET_H2CCMD_MCC_TIME_SETTING_ORDER0_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 1, 7, __Value) -+ -+/* MCC IQK CMD 0x1A */ -+#define SET_H2CCMD_MCC_IQK_READY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_MCC_IQK_ORDER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 4, __Value) -+#define SET_H2CCMD_MCC_IQK_PATH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 2, __Value) -+#define SET_H2CCMD_MCC_IQK_RX_L(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_H2CCMD_MCC_IQK_RX_M1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 2, __Value) -+#define SET_H2CCMD_MCC_IQK_RX_M2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 2, 6, __Value) -+#define SET_H2CCMD_MCC_IQK_RX_H(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 4, __Value) -+#define SET_H2CCMD_MCC_IQK_TX_L(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+#define SET_H2CCMD_MCC_IQK_TX_M1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 3, __Value) -+#define SET_H2CCMD_MCC_IQK_TX_M2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 3, 5, __Value) -+#define SET_H2CCMD_MCC_IQK_TX_H(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 0, 6, __Value) -+#endif /* CONFIG_MCC_MODE */ -+ -+/* CHNL SWITCH OPER OFFLOAD 0x1C */ -+#define SET_H2CCMD_CH_SW_OPER_OFFLOAD_CH_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 0, 2, __Value) -+#define SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_40M_SC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 2, 3, __Value) -+#define SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_80M_SC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 5, 3, __Value) -+#define SET_H2CCMD_CH_SW_OPER_OFFLOAD_RFE_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 2, 0, 4, __Value) -+ -+/* H2C_SINGLE_CHANNELSWITCH_V2 = 0x1D */ -+#define SET_H2CCMD_SINGLE_CH_SWITCH_V2_CENTRAL_CH_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_SINGLE_CH_SWITCH_V2_PRIMARY_CH_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 0, 4, __Value) -+#define SET_H2CCMD_SINGLE_CH_SWITCH_V2_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 4, 4, __Value) -+#define SET_H2CCMD_SINGLE_CH_SWITCH_V2_PWR_IDX_UPDATE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 2, 0, 1, __Value) -+#define SET_H2CCMD_SINGLE_CH_SWITCH_V2_IQK_UPDATE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 2, 1, 1, __Value) -+#define SET_H2CCMD_SINGLE_CH_SWITCH_V2_CH_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 2, 4, 4, __Value) -+ -+#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT) -+#define SET_H2CCMD_BTC_WL_PORT_ID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#endif -+ -+/* _WoWLAN PARAM_CMD_0x80 */ -+#define SET_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+#define SET_H2CCMD_WOWLAN_ALL_PKT_DROP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -+#define SET_H2CCMD_WOWLAN_GPIO_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) -+#define SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) -+#define SET_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) -+#define SET_H2CCMD_WOWLAN_GPIONUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 7, __Value) -+#define SET_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 7, 1, __Value) -+#define SET_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_H2CCMD_WOWLAN_GPIO_PULSE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 1, __Value) -+#define SET_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 1, 7, __Value) -+#define SET_H2CCMD_WOWLAN_DISABLE_UPHY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 1, __Value) -+#define SET_H2CCMD_WOWLAN_HST2DEV_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 1, 1, __Value) -+#define SET_H2CCMD_WOWLAN_GPIO_DURATION_MS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 2, 1, __Value) -+#define SET_H2CCMD_WOWLAN_CHANGE_UNIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 2, 1, __Value) -+#define SET_H2CCMD_WOWLAN_UNIT_FOR_UPHY_DISABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 3, 1, __Value) -+#define SET_H2CCMD_WOWLAN_TAKE_PDN_UPHY_DIS_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 1, __Value) -+#define SET_H2CCMD_WOWLAN_GPIO_INPUT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 5, 1, __Value) -+#define SET_H2CCMD_WOWLAN_DEV2HST_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 7, 1, __Value) -+#define SET_H2CCMD_WOWLAN_TIME_FOR_UPHY_DISABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) -+#define SET_H2CCMD_WOWLAN_RISE_HST2DEV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 2, 1, __Value) -+ -+/* _REMOTE_WAKEUP_CMD_0x81 */ -+#define SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+#define SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -+#define SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) -+#define SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 1, __Value) -+#define SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 2, 1, __Value) -+#define SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 3, 1, __Value) -+ -+#define SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 1, __Value) -+#define SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 4, 1, __Value) -+ -+/* AOAC_GLOBAL_INFO_0x82 */ -+#define SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+ -+/* AOAC_RSVDPAGE_LOC_0x83 */ -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+#ifdef CONFIG_GTK_OL -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) -+#endif /* CONFIG_GTK_OL */ -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NDP_INFO(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 0, 8, __Value) -+ -+/* AOAC_RSVDPAGE_2_0x84 */ -+ -+/* AOAC_RSVDPAGE_3_0x88 */ -+#ifdef CONFIG_PNO_SUPPORT -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) -+#endif -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_AOAC_REPORT(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 0, 8, __Value) -+ -+#ifdef CONFIG_PNO_SUPPORT -+/* D0_Scan_Offload_Info_0x86 */ -+#define SET_H2CCMD_AOAC_NLO_FUN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 3, 1, __Value) -+#define SET_H2CCMD_AOAC_NLO_IPS_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 4, 1, __Value) -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+/* _GPIO_CUSTOM_CMD_0x89 */ -+#define SET_H2CCMD_CUSTOMERID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_SPECIAL_WAKE_REASON(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_H2CCMD_CUSTOM_WAKE_REASON(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 1, __Value) -+ -+#ifdef CONFIG_P2P_WOWLAN -+/* P2P_RsvdPage_0x8a */ -+#define SET_H2CCMD_RSVDPAGE_LOC_P2P_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_H2CCMD_RSVDPAGE_LOC_P2P_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_H2CCMD_RSVDPAGE_LOC_P2P_NEGO_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_H2CCMD_RSVDPAGE_LOC_P2P_INVITE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_H2CCMD_RSVDPAGE_LOC_P2P_PD_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+#endif /* CONFIG_P2P_WOWLAN */ -+ -+#ifdef CONFIG_LPS_PG -+#define SET_H2CCMD_LPSPG_SEC_CAM_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)/*SecurityCAM_En*/ -+#define SET_H2CCMD_LPSPG_MBID_CAM_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)/*BSSIDCAM_En*/ -+#define SET_H2CCMD_LPSPG_PMC_CAM_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)/*PatternMatchCAM_En*/ -+#define SET_H2CCMD_LPSPG_MACID_SEARCH_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)/*MACIDSearch_En*/ -+#define SET_H2CCMD_LPSPG_TXSC_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value)/*TXSC_En*/ -+#define SET_H2CCMD_LPSPG_MU_RATE_TB_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value)/*MURateTable_En*/ -+#define SET_H2CCMD_LPSPG_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)/*Loc_LPS_PG*/ -+#define SET_H2CCMD_LPSPG_DPK_INFO_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)/*Loc_LPS_PG_DPK_info*/ -+#define SET_H2CCMD_LPSPG_IQK_INFO_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 3, 0, 8, __Value)/*Loc_IQK_result*/ -+#endif -+ -+#if defined(CONFIG_RTL8822C) && defined(CONFIG_SUPPORT_DYNAMIC_TXPWR) -+#define SET_H2CCMD_FW_CRC5_SEARCH_EN(cmd, v) \ -+ SET_BITS_TO_LE_1BYTE((cmd), 0, 1, (v)); -+#define SET_H2CCMD_FW_CRC5_SEARCH_MACID(cmd, v) \ -+ SET_BITS_TO_LE_1BYTE((cmd), 1, 7, (v)); -+#define SET_H2CCMD_FW_CRC5_SEARCH_MAC(cmd, mac) \ -+ do { \ -+ int __offset = 0; \ -+ for (__offset = 0; __offset < ETH_ALEN; __offset++) \ -+ SET_BITS_TO_LE_1BYTE((u8 *)(cmd + __offset), 0, 8, *((u8 *)(mac + __offset))); \ -+ } while(0) -+#endif -+ -+#ifdef CONFIG_WAR_OFFLOAD -+/* WarOffload_Info_0x8D */ -+#define SET_H2CCMD_WAR_CFG_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_WAR_CFG_ARP_RSP_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_H2CCMD_WAR_CFG_MDNSV4_RSP_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 2, 1, __Value) -+#define SET_H2CCMD_WAR_CFG_MDNSV6_RSP_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 3, 1, __Value) -+#define SET_H2CCMD_WAR_CFG_MDNSV4_WAKE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 6, 1, __Value) -+#define SET_H2CCMD_WAR_CFG_MDNSV6_WAKE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 7, 1, __Value) -+ -+/* H2C_WAROFLD_RSVDPAGE1 */ -+#define SET_H2CCMD_WAROFLD_RSVDPAGE1_LOC_PARM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+ -+/* BT_UNKNOWN_DEVICE_WA_0xD1 */ -+#define SET_H2CCMD_BT_UNKNOWN_DEVICE_WA_HANG_CHK_EN(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_H2CCMD_BT_UNKNOWN_DEVICE_WA_FORCE_IB_EN(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_H2CCMD_BT_UNKNOWN_DEVICE_WA_HWID_CHK_EN(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_H2CCMD_BT_UNKNOWN_DEVICE_WA_ONE_TIME_CHK(__pH2CCmd, __Value) \ -+ SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+ -+#ifdef DBG_FW_DEBUG_MSG_PKT -+#define SET_H2CCMD_FW_DBG_MSG_PKT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)/*sniffer_dbg_en*/ -+#define SET_H2CCMD_RSVDPAGE_LOC_FW_DBG_MSG_PKT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) /*loc_debug_packet*/ -+#endif /*DBG_FW_DEBUG_MSG_PKT*/ -+ -+#ifdef DBG_RSVD_PAGE_CFG -+#define RSVD_PAGE_CFG(ops, v1, v2, v3) \ -+ RTW_INFO("=== [RSVD][%s]-NeedPage:%d, TotalPageNum:%d TotalPacketLen:%d ===\n", \ -+ ops, v1, v2, v3) -+#else -+#define RSVD_PAGE_CFG(ops, v1, v2, v3) do {} while (0) -+#endif -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ------------------------------------------- Structure -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+typedef struct _RSVDPAGE_LOC { -+ u8 LocProbeRsp; -+ u8 LocPsPoll; -+ u8 LocNullData; -+ u8 LocQosNull; -+ u8 LocBTQosNull; -+#ifdef CONFIG_WOWLAN -+ u8 LocRemoteCtrlInfo; -+ u8 LocArpRsp; -+ u8 LocNbrAdv; -+ u8 LocGTKRsp; -+ u8 LocGTKInfo; -+ u8 LocProbeReq; -+ u8 LocNetList; -+#ifdef CONFIG_GTK_OL -+ u8 LocGTKEXTMEM; -+#endif /* CONFIG_GTK_OL */ -+ u8 LocNDPInfo; -+ u8 LocAOACReport; -+#ifdef CONFIG_PNO_SUPPORT -+ u8 LocPNOInfo; -+ u8 LocScanInfo; -+ u8 LocSSIDInfo; -+ u8 LocProbePacket; -+#endif /* CONFIG_PNO_SUPPORT */ -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ u8 LocKeepAlive; -+#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+#ifdef CONFIG_WAR_OFFLOAD -+ u8 LocIpParm; -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+ u8 LocMdnsPara; -+ u8 LocMdnsv4; -+ u8 LocMdnsv6; -+#endif /* defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) */ -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+#endif /* CONFIG_WOWLAN */ -+ u8 LocApOffloadBCN; -+#ifdef CONFIG_P2P_WOWLAN -+ u8 LocP2PBeacon; -+ u8 LocP2PProbeRsp; -+ u8 LocNegoRsp; -+ u8 LocInviteRsp; -+ u8 LocPDRsp; -+#endif /* CONFIG_P2P_WOWLAN */ -+#ifdef DBG_FW_DEBUG_MSG_PKT -+ u8 loc_fw_dbg_msg_pkt; -+#endif /*DBG_FW_DEBUG_MSG_PKT*/ -+} RSVDPAGE_LOC, *PRSVDPAGE_LOC; -+ -+struct rsvd_page_cache_t { -+ char *name; -+ u8 loc; -+ u8 page_num; -+ u8 *data; -+ u32 size; -+}; -+ -+bool rsvd_page_cache_update_all(struct rsvd_page_cache_t *cache, u8 loc -+ , u8 txdesc_len, u32 page_size, u8 *info, u32 info_len); -+bool rsvd_page_cache_update_data(struct rsvd_page_cache_t *cache, u8 *info -+ , u32 info_len); -+void rsvd_page_cache_free_data(struct rsvd_page_cache_t *cache); -+void rsvd_page_cache_free(struct rsvd_page_cache_t *cache); -+ -+#endif -+#ifdef CONFIG_WOWLAN -+void dump_TX_FIFO(PADAPTER padapter, u8 page_num, u16 page_size); -+#endif -+u8 rtw_hal_set_fw_media_status_cmd(_adapter *adapter, u8 mstatus, u8 macid); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ /* WOW command function */ -+ void rtw_hal_set_fw_wow_related_cmd(_adapter *padapter, u8 enable); -+ #ifdef CONFIG_P2P_WOWLAN -+ /* H2C 0x8A */ -+ u8 rtw_hal_set_FwP2PRsvdPage_cmd(_adapter *adapter, PRSVDPAGE_LOC rsvdpageloc); -+ /* H2C 0x8B */ -+ u8 rtw_hal_set_p2p_wowlan_offload_cmd(_adapter *adapter); -+ #endif /* CONFIG_P2P_WOWLAN */ -+#endif -+ -+#ifdef RTW_PER_CMD_SUPPORT_FW -+u8 rtw_hal_set_req_per_rpt_cmd(_adapter *adapter, u8 group_macid, -+ u8 rpt_type, u32 macid_bitmap); -+#endif -diff --git a/drivers/staging/rtl8723cs/include/hal_com_led.h b/drivers/staging/rtl8723cs/include/hal_com_led.h -new file mode 100644 -index 000000000000..379c4fdd107f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_com_led.h -@@ -0,0 +1,437 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_COMMON_LED_H_ -+#define __HAL_COMMON_LED_H_ -+ -+#define NO_LED 0 -+#define HW_LED 1 -+ -+#ifdef CONFIG_RTW_LED -+#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000) -+ -+/* ******************************************************************************** -+ * LED Behavior Constant. -+ * ******************************************************************************** -+ * Default LED behavior. -+ * */ -+#define LED_BLINK_NORMAL_INTERVAL 100 -+#define LED_BLINK_SLOWLY_INTERVAL 200 -+#define LED_BLINK_LONG_INTERVAL 400 -+#define LED_INITIAL_INTERVAL 1800 -+ -+/* LED Customerization */ -+ -+/* NETTRONIX */ -+#define LED_BLINK_NORMAL_INTERVAL_NETTRONIX 100 -+#define LED_BLINK_SLOWLY_INTERVAL_NETTRONIX 2000 -+ -+/* PORNET */ -+#define LED_BLINK_SLOWLY_INTERVAL_PORNET 1000 -+#define LED_BLINK_NORMAL_INTERVAL_PORNET 100 -+#define LED_BLINK_FAST_INTERVAL_BITLAND 30 -+ -+/* AzWave. */ -+#define LED_CM2_BLINK_ON_INTERVAL 250 -+#define LED_CM2_BLINK_OFF_INTERVAL 4750 -+#define LED_CM8_BLINK_OFF_INTERVAL 3750 /* for QMI */ -+ -+/* RunTop */ -+#define LED_RunTop_BLINK_INTERVAL 300 -+ -+/* ALPHA */ -+#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000 -+#define LED_BLINK_NO_LINK_INTERVAL_ALPHA_500MS 500 /* add by ylb 20121012 for customer led for alpha */ -+#define LED_BLINK_LINK_INTERVAL_ALPHA 500 /* 500 */ -+#define LED_BLINK_SCAN_INTERVAL_ALPHA 180 /* 150 */ -+#define LED_BLINK_FASTER_INTERVAL_ALPHA 50 -+#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000 -+ -+/* 111122 by hpfan: Customized for Xavi */ -+#define LED_CM11_BLINK_INTERVAL 300 -+#define LED_CM11_LINK_ON_INTERVEL 3000 -+ -+/* Netgear */ -+#define LED_BLINK_LINK_INTERVAL_NETGEAR 500 -+#define LED_BLINK_LINK_SLOWLY_INTERVAL_NETGEAR 1000 -+ -+#define LED_WPS_BLINK_OFF_INTERVAL_NETGEAR 100 -+#define LED_WPS_BLINK_ON_INTERVAL_NETGEAR 500 -+ -+/* Belkin AC950 */ -+#define LED_BLINK_LINK_INTERVAL_ON_BELKIN 200 -+#define LED_BLINK_LINK_INTERVAL_OFF_BELKIN 100 -+#define LED_BLINK_ERROR_INTERVAL_BELKIN 100 -+ -+/* by chiyokolin for Azurewave */ -+#define LED_CM12_BLINK_INTERVAL_5Mbps 160 -+#define LED_CM12_BLINK_INTERVAL_10Mbps 80 -+#define LED_CM12_BLINK_INTERVAL_20Mbps 50 -+#define LED_CM12_BLINK_INTERVAL_40Mbps 40 -+#define LED_CM12_BLINK_INTERVAL_80Mbps 30 -+#define LED_CM12_BLINK_INTERVAL_MAXMbps 25 -+ -+/* Dlink */ -+#define LED_BLINK_NO_LINK_INTERVAL 1000 -+#define LED_BLINK_LINK_IDEL_INTERVAL 100 -+ -+#define LED_BLINK_SCAN_ON_INTERVAL 30 -+#define LED_BLINK_SCAN_OFF_INTERVAL 300 -+ -+#define LED_WPS_BLINK_ON_INTERVAL_DLINK 30 -+#define LED_WPS_BLINK_OFF_INTERVAL_DLINK 300 -+#define LED_WPS_BLINK_LINKED_ON_INTERVAL_DLINK 5000 -+ -+/* ******************************************************************************** -+ * LED object. -+ * ******************************************************************************** */ -+ -+typedef enum _LED_CTL_MODE { -+ LED_CTL_POWER_ON = 1, -+ LED_CTL_LINK = 2, -+ LED_CTL_NO_LINK = 3, -+ LED_CTL_TX = 4, /* unspecific data TX, including single & group addressed */ -+ LED_CTL_RX = 5, /* unspecific data RX, including single & group addressed */ -+ LED_CTL_UC_TX = 6, /* single addressed data TX */ -+ LED_CTL_UC_RX = 7, /* single addressed data RX */ -+ LED_CTL_BMC_TX = 8, /* group addressed data TX */ -+ LED_CTL_BMC_RX = 9, /* group addressed data RX */ -+ LED_CTL_SITE_SURVEY = 10, -+ LED_CTL_POWER_OFF = 11, -+ LED_CTL_START_TO_LINK = 12, -+ LED_CTL_START_WPS = 13, -+ LED_CTL_STOP_WPS = 14, -+ LED_CTL_START_WPS_BOTTON = 15, /* added for runtop */ -+ LED_CTL_STOP_WPS_FAIL = 16, /* added for ALPHA */ -+ LED_CTL_STOP_WPS_FAIL_OVERLAP = 17, /* added for BELKIN */ -+ LED_CTL_CONNECTION_NO_TRANSFER = 18, -+} LED_CTL_MODE; -+ -+typedef enum _LED_STATE { -+ LED_UNKNOWN = 0, -+ RTW_LED_ON = 1, -+ RTW_LED_OFF = 2, -+ LED_BLINK_NORMAL = 3, -+ LED_BLINK_SLOWLY = 4, -+ LED_BLINK_POWER_ON = 5, -+ LED_BLINK_SCAN = 6, /* LED is blinking during scanning period, the # of times to blink is depend on time for scanning. */ -+ LED_BLINK_NO_LINK = 7, /* LED is blinking during no link state. */ -+ LED_BLINK_StartToBlink = 8, /* Customzied for Sercomm Printer Server case */ -+ LED_BLINK_TXRX = 9, -+ LED_BLINK_WPS = 10, /* LED is blinkg during WPS communication */ -+ LED_BLINK_WPS_STOP = 11, /* for ALPHA */ -+ LED_BLINK_WPS_STOP_OVERLAP = 12, /* for BELKIN */ -+ LED_BLINK_RUNTOP = 13, /* Customized for RunTop */ -+ LED_BLINK_CAMEO = 14, -+ LED_BLINK_XAVI = 15, -+ LED_BLINK_ALWAYS_ON = 16, -+ LED_BLINK_LINK_IN_PROCESS = 17, /* Customized for Belkin AC950 */ -+ LED_BLINK_AUTH_ERROR = 18, /* Customized for Belkin AC950 */ -+ LED_BLINK_Azurewave_5Mbps = 19, -+ LED_BLINK_Azurewave_10Mbps = 20, -+ LED_BLINK_Azurewave_20Mbps = 21, -+ LED_BLINK_Azurewave_40Mbps = 22, -+ LED_BLINK_Azurewave_80Mbps = 23, -+ LED_BLINK_Azurewave_MAXMbps = 24, -+ LED_BLINK_LINK_IDEL = 25, -+ LED_BLINK_WPS_LINKED = 26, -+} LED_STATE; -+ -+typedef enum _LED_PIN { -+ LED_PIN_GPIO0, -+ LED_PIN_LED0, -+ LED_PIN_LED1, -+ LED_PIN_LED2 -+} LED_PIN; -+ -+ -+/* ******************************************************************************** -+ * PCIE LED Definition. -+ * ******************************************************************************** */ -+#ifdef CONFIG_PCI_HCI -+typedef enum _LED_STRATEGY_PCIE { -+ /* start from 2 */ -+ SW_LED_MODE_UC_TRX_ONLY = 2, -+ SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */ -+ SW_LED_MODE1, /* SW control for PCI Express */ -+ SW_LED_MODE2, /* SW control for Cameo. */ -+ SW_LED_MODE3, /* SW contorl for RunTop. */ -+ SW_LED_MODE4, /* SW control for Netcore */ -+ SW_LED_MODE5, /* added by vivi, for led new mode, DLINK */ -+ SW_LED_MODE6, /* added by vivi, for led new mode, PRONET */ -+ SW_LED_MODE7, /* added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec */ -+ SW_LED_MODE8, /* added by chiyokolin, for QMI */ -+ SW_LED_MODE9, /* added by chiyokolin, for BITLAND-LENOVO, PCI Express Minicard Spec Rev.1.1 */ -+ SW_LED_MODE10, /* added by chiyokolin, for Edimax-ASUS */ -+ SW_LED_MODE11, /* added by hpfan, for Xavi */ -+ SW_LED_MODE12, /* added by chiyokolin, for Azurewave */ -+} LED_STRATEGY_PCIE, *PLED_STRATEGY_PCIE; -+ -+typedef struct _LED_PCIE { -+ PADAPTER padapter; -+ -+ LED_PIN LedPin; /* Identify how to implement this SW led. */ -+ -+ LED_STATE CurrLedState; /* Current LED state. */ -+ BOOLEAN bLedOn; /* TRUE if LED is ON, FALSE if LED is OFF. */ -+ -+ BOOLEAN bLedBlinkInProgress; /* TRUE if it is blinking, FALSE o.w.. */ -+ BOOLEAN bLedWPSBlinkInProgress; /* TRUE if it is blinking, FALSE o.w.. */ -+ -+ BOOLEAN bLedSlowBlinkInProgress;/* added by vivi, for led new mode */ -+ u32 BlinkTimes; /* Number of times to toggle led state for blinking. */ -+ LED_STATE BlinkingLedState; /* Next state for blinking, either LED_ON or LED_OFF are. */ -+ -+ _timer BlinkTimer; /* Timer object for led blinking. */ -+} LED_PCIE, *PLED_PCIE; -+ -+typedef struct _LED_PCIE LED_DATA, *PLED_DATA; -+typedef enum _LED_STRATEGY_PCIE LED_STRATEGY, *PLED_STRATEGY; -+ -+void -+LedControlPCIE( -+ PADAPTER Adapter, -+ LED_CTL_MODE LedAction -+); -+ -+void -+gen_RefreshLedState( -+ PADAPTER Adapter); -+ -+/* ******************************************************************************** -+ * USB LED Definition. -+ * ******************************************************************************** */ -+#elif defined(CONFIG_USB_HCI) -+ -+#define IS_LED_WPS_BLINKING(_LED_USB) (((PLED_USB)_LED_USB)->CurrLedState == LED_BLINK_WPS \ -+ || ((PLED_USB)_LED_USB)->CurrLedState == LED_BLINK_WPS_STOP \ -+ || ((PLED_USB)_LED_USB)->bLedWPSBlinkInProgress) -+ -+#define IS_LED_BLINKING(_LED_USB) (((PLED_USB)_LED_USB)->bLedWPSBlinkInProgress \ -+ || ((PLED_USB)_LED_USB)->bLedScanBlinkInProgress) -+ -+ -+typedef enum _LED_STRATEGY_USB { -+ /* start from 2 */ -+ SW_LED_MODE_UC_TRX_ONLY = 2, -+ SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */ -+ SW_LED_MODE1, /* 2 LEDs, through LED0 and LED1. For ALPHA. */ -+ SW_LED_MODE2, /* SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. */ -+ SW_LED_MODE3, /* SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. */ -+ SW_LED_MODE4, /* for Edimax / Belkin */ -+ SW_LED_MODE5, /* for Sercomm / Belkin */ -+ SW_LED_MODE6, /* for 88CU minicard, porting from ce SW_LED_MODE7 */ -+ SW_LED_MODE7, /* for Netgear special requirement */ -+ SW_LED_MODE8, /* for LC */ -+ SW_LED_MODE9, /* for Belkin AC950 */ -+ SW_LED_MODE10, /* for Netgear A6200V2 */ -+ SW_LED_MODE11, /* for Edimax / ASUS */ -+ SW_LED_MODE12, /* for WNC/NEC */ -+ SW_LED_MODE13, /* for Netgear A6100, 8811Au */ -+ SW_LED_MODE14, /* for Buffalo, DNI, 8811Au */ -+ SW_LED_MODE15, /* for DLINK, 8811Au/8812AU */ -+} LED_STRATEGY_USB, *PLED_STRATEGY_USB; -+ -+ -+typedef struct _LED_USB { -+ PADAPTER padapter; -+ -+ LED_PIN LedPin; /* Identify how to implement this SW led. */ -+ -+ LED_STATE CurrLedState; /* Current LED state. */ -+ BOOLEAN bLedOn; /* TRUE if LED is ON, FALSE if LED is OFF. */ -+ -+ BOOLEAN bSWLedCtrl; -+ -+ BOOLEAN bLedBlinkInProgress; /* TRUE if it is blinking, FALSE o.w.. */ -+ /* ALPHA, added by chiyoko, 20090106 */ -+ BOOLEAN bLedNoLinkBlinkInProgress; -+ BOOLEAN bLedLinkBlinkInProgress; -+ BOOLEAN bLedStartToLinkBlinkInProgress; -+ BOOLEAN bLedScanBlinkInProgress; -+ BOOLEAN bLedWPSBlinkInProgress; -+ -+ u32 BlinkTimes; /* Number of times to toggle led state for blinking. */ -+ u8 BlinkCounter; /* Added for turn off overlap led after blinking a while, by page, 20120821 */ -+ LED_STATE BlinkingLedState; /* Next state for blinking, either LED_ON or LED_OFF are. */ -+ -+ _timer BlinkTimer; /* Timer object for led blinking. */ -+ -+ _workitem BlinkWorkItem; /* Workitem used by BlinkTimer to manipulate H/W to blink LED.' */ -+} LED_USB, *PLED_USB; -+ -+typedef struct _LED_USB LED_DATA, *PLED_DATA; -+typedef enum _LED_STRATEGY_USB LED_STRATEGY, *PLED_STRATEGY; -+#ifdef CONFIG_RTW_SW_LED -+void -+LedControlUSB( -+ PADAPTER Adapter, -+ LED_CTL_MODE LedAction -+); -+#endif -+ -+ -+/* ******************************************************************************** -+ * SDIO LED Definition. -+ * ******************************************************************************** */ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ -+#define IS_LED_WPS_BLINKING(_LED_SDIO) (((PLED_SDIO)_LED_SDIO)->CurrLedState == LED_BLINK_WPS \ -+ || ((PLED_SDIO)_LED_SDIO)->CurrLedState == LED_BLINK_WPS_STOP \ -+ || ((PLED_SDIO)_LED_SDIO)->bLedWPSBlinkInProgress) -+ -+#define IS_LED_BLINKING(_LED_SDIO) (((PLED_SDIO)_LED_SDIO)->bLedWPSBlinkInProgress \ -+ || ((PLED_SDIO)_LED_SDIO)->bLedScanBlinkInProgress) -+ -+ -+typedef enum _LED_STRATEGY_SDIO { -+ /* start from 2 */ -+ SW_LED_MODE_UC_TRX_ONLY = 2, -+ SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */ -+ SW_LED_MODE1, /* 2 LEDs, through LED0 and LED1. For ALPHA. */ -+ SW_LED_MODE2, /* SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. */ -+ SW_LED_MODE3, /* SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. */ -+ SW_LED_MODE4, /* for Edimax / Belkin */ -+ SW_LED_MODE5, /* for Sercomm / Belkin */ -+ SW_LED_MODE6, /* for 88CU minicard, porting from ce SW_LED_MODE7 */ -+} LED_STRATEGY_SDIO, *PLED_STRATEGY_SDIO; -+ -+typedef struct _LED_SDIO { -+ PADAPTER padapter; -+ -+ LED_PIN LedPin; /* Identify how to implement this SW led. */ -+ -+ LED_STATE CurrLedState; /* Current LED state. */ -+ BOOLEAN bLedOn; /* TRUE if LED is ON, FALSE if LED is OFF. */ -+ -+ BOOLEAN bSWLedCtrl; -+ -+ BOOLEAN bLedBlinkInProgress; /* TRUE if it is blinking, FALSE o.w.. */ -+ /* ALPHA, added by chiyoko, 20090106 */ -+ BOOLEAN bLedNoLinkBlinkInProgress; -+ BOOLEAN bLedLinkBlinkInProgress; -+ BOOLEAN bLedStartToLinkBlinkInProgress; -+ BOOLEAN bLedScanBlinkInProgress; -+ BOOLEAN bLedWPSBlinkInProgress; -+ -+ u32 BlinkTimes; /* Number of times to toggle led state for blinking. */ -+ LED_STATE BlinkingLedState; /* Next state for blinking, either LED_ON or LED_OFF are. */ -+ -+ _timer BlinkTimer; /* Timer object for led blinking. */ -+ -+ _workitem BlinkWorkItem; /* Workitem used by BlinkTimer to manipulate H/W to blink LED. */ -+} LED_SDIO, *PLED_SDIO; -+ -+typedef struct _LED_SDIO LED_DATA, *PLED_DATA; -+typedef enum _LED_STRATEGY_SDIO LED_STRATEGY, *PLED_STRATEGY; -+ -+void -+LedControlSDIO( -+ PADAPTER Adapter, -+ LED_CTL_MODE LedAction -+); -+ -+#endif -+ -+struct led_priv { -+ LED_STRATEGY LedStrategy; -+#ifdef CONFIG_RTW_SW_LED -+ LED_DATA SwLed0; -+ LED_DATA SwLed1; -+ LED_DATA SwLed2; -+ u8 bRegUseLed; -+ u8 iface_en_mask; -+ u32 ctl_en_mask[CONFIG_IFACE_NUMBER]; -+ void (*LedControlHandler)(_adapter *padapter, LED_CTL_MODE LedAction); -+ void (*SwLedOn)(_adapter *padapter, PLED_DATA pLed); -+ void (*SwLedOff)(_adapter *padapter, PLED_DATA pLed); -+#endif -+}; -+ -+#define SwLedOn(adapter, pLed) \ -+ do { \ -+ if (adapter_to_led(adapter)->SwLedOn) \ -+ adapter_to_led(adapter)->SwLedOn((adapter), (pLed)); \ -+ } while (0) -+ -+#define SwLedOff(adapter, pLed) \ -+ do { \ -+ if (adapter_to_led(adapter)->SwLedOff) \ -+ adapter_to_led(adapter)->SwLedOff((adapter), (pLed)); \ -+ } while (0) -+ -+void BlinkTimerCallback(void *data); -+void BlinkWorkItemCallback(_workitem *work); -+ -+void ResetLedStatus(PLED_DATA pLed); -+ -+void -+InitLed( -+ _adapter *padapter, -+ PLED_DATA pLed, -+ LED_PIN LedPin -+); -+ -+void -+DeInitLed( -+ PLED_DATA pLed -+); -+ -+/* hal... */ -+extern void BlinkHandler(PLED_DATA pLed); -+void dump_led_config(void *sel, _adapter *adapter); -+void rtw_led_set_strategy(_adapter *adapter, u8 strategy); -+#endif /* CONFIG_RTW_LED */ -+ -+#if defined(CONFIG_RTW_LED) -+#define rtw_led_get_strategy(adapter) (adapter_to_led(adapter)->LedStrategy) -+#else -+#define rtw_led_get_strategy(adapter) NO_LED -+#endif -+ -+#define IS_NO_LED_STRATEGY(s) ((s) == NO_LED) -+#define IS_HW_LED_STRATEGY(s) ((s) == HW_LED) -+#define IS_SW_LED_STRATEGY(s) ((s) != NO_LED && (s) != HW_LED) -+ -+#if defined(CONFIG_RTW_LED) && defined(CONFIG_RTW_SW_LED) -+ -+#ifndef CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY -+#define CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY 0 -+#endif -+ -+#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY -+void rtw_sw_led_blink_uc_trx_only(LED_DATA *led); -+void rtw_sw_led_ctl_mode_uc_trx_only(_adapter *adapter, LED_CTL_MODE ctl); -+#endif -+void rtw_led_control(_adapter *adapter, LED_CTL_MODE ctl); -+void rtw_led_tx_control(_adapter *adapter, const u8 *da); -+void rtw_led_rx_control(_adapter *adapter, const u8 *da); -+void rtw_led_set_iface_en(_adapter *adapter, u8 en); -+void rtw_led_set_iface_en_mask(_adapter *adapter, u8 mask); -+void rtw_led_set_ctl_en_mask(_adapter *adapter, u32 ctl_mask); -+void rtw_led_set_ctl_en_mask_primary(_adapter *adapter); -+void rtw_led_set_ctl_en_mask_virtual(_adapter *adapter); -+#else -+#define rtw_led_control(adapter, ctl) do {} while (0) -+#define rtw_led_tx_control(adapter, da) do {} while (0) -+#define rtw_led_rx_control(adapter, da) do {} while (0) -+#define rtw_led_set_iface_en(adapter, en) do {} while (0) -+#define rtw_led_set_iface_en_mask(adapter, mask) do {} while (0) -+#define rtw_led_set_ctl_en_mask(adapter, ctl_mask) do {} while (0) -+#define rtw_led_set_ctl_en_mask_primary(adapter) do {} while (0) -+#define rtw_led_set_ctl_en_mask_virtual(adapter) do {} while (0) -+#endif /* defined(CONFIG_RTW_LED) && defined(CONFIG_RTW_SW_LED) */ -+ -+#endif /*__HAL_COMMON_LED_H_*/ -+ -diff --git a/drivers/staging/rtl8723cs/include/hal_com_phycfg.h b/drivers/staging/rtl8723cs/include/hal_com_phycfg.h -new file mode 100644 -index 000000000000..b6e74a743359 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_com_phycfg.h -@@ -0,0 +1,341 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_COM_PHYCFG_H__ -+#define __HAL_COM_PHYCFG_H__ -+ -+#ifndef DBG_TX_POWER_IDX -+#define DBG_TX_POWER_IDX 0 -+#endif -+ -+#define PathA 0x0 /* Useless */ -+#define PathB 0x1 -+#define PathC 0x2 -+#define PathD 0x3 -+ -+typedef enum _RF_TX_NUM { -+ RF_1TX = 0, -+ RF_2TX, -+ RF_3TX, -+ RF_4TX, -+ RF_MAX_TX_NUM, -+ RF_TX_NUM_NONIMPLEMENT, -+} RF_TX_NUM; -+ -+enum txpwr_pg_mode { -+ TXPWR_PG_WITH_PWR_IDX, -+ TXPWR_PG_WITH_TSSI_OFFSET, -+ TXPWR_PG_UNKNOWN, /* keep last */ -+}; -+ -+/*------------------------------Define structure----------------------------*/ -+typedef struct _BB_REGISTER_DEFINITION { -+ u32 rfintfs; /* set software control: */ -+ /* 0x870~0x877[8 bytes] */ -+ -+ u32 rfintfo; /* output data: */ -+ /* 0x860~0x86f [16 bytes] */ -+ -+ u32 rfintfe; /* output enable: */ -+ /* 0x860~0x86f [16 bytes] */ -+ -+ u32 rf3wireOffset; /* LSSI data: */ -+ /* 0x840~0x84f [16 bytes] */ -+ -+ u32 rfHSSIPara2; /* wire parameter control2 : */ -+ /* 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] */ -+ -+ u32 rfLSSIReadBack; /* LSSI RF readback data SI mode */ -+ /* 0x8a0~0x8af [16 bytes] */ -+ -+ u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode 0x8b8-8bc for Path A and B */ -+ -+} BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; -+ -+ -+/* ---------------------------------------------------------------------- */ -+ -+extern const char *const _txpwr_pg_mode_str[]; -+#define txpwr_pg_mode_str(_mode) (((_mode) >= TXPWR_PG_UNKNOWN) ? _txpwr_pg_mode_str[TXPWR_PG_UNKNOWN] : _txpwr_pg_mode_str[(_mode)]) -+ -+u8 phy_get_target_txpwr( -+ PADAPTER Adapter, -+ u8 Band, -+ u8 RfPath, -+ RATE_SECTION RateSection -+); -+ -+void -+PHY_GetRateValuesOfTxPowerByRate( -+ PADAPTER pAdapter, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Value, -+ u8 *Rate, -+ s8 *PwrByRateVal, -+ u8 *RateNum -+); -+ -+u8 phy_get_rate_idx_of_txpwr_by_rate(enum MGN_RATE rate); -+ -+void -+phy_set_tx_power_index_by_rate_section( -+ PADAPTER pAdapter, -+ enum rf_path RFPath, -+ u8 Channel, -+ u8 RateSection -+); -+ -+s8 phy_get_txpwr_by_rate(_adapter *adapter -+ , BAND_TYPE band, enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate); -+ -+s16 phy_get_txpwr_by_rate_single_mbm(_adapter *adapter -+ , BAND_TYPE band, enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate, bool eirp); -+s16 phy_get_txpwr_by_rate_total_mbm(_adapter *adapter -+ , BAND_TYPE band, RATE_SECTION rs, enum MGN_RATE rate, bool cap, bool eirp); -+ -+s16 phy_get_txpwr_by_rate_single_max_mbm(_adapter *adapter, BAND_TYPE band, enum rf_path rfpath, bool eirp); -+s16 phy_get_txpwr_by_rate_total_max_mbm(_adapter *adapter, BAND_TYPE band, bool cap, bool eirp); -+ -+void -+phy_set_tx_power_level_by_path( -+ PADAPTER Adapter, -+ u8 channel, -+ u8 path -+); -+ -+void -+PHY_InitTxPowerByRate( -+ PADAPTER pAdapter -+); -+ -+void -+phy_store_tx_power_by_rate( -+ PADAPTER pAdapter, -+ u32 Band, -+ u32 RfPath, -+ u32 TxNum, -+ u32 RegAddr, -+ u32 BitMask, -+ u32 Data -+); -+ -+void -+PHY_TxPowerByRateConfiguration( -+ PADAPTER pAdapter -+); -+ -+bool phy_chk_ch_setting_consistency(_adapter *adapter, u8 ch); -+ -+#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX -+u8 phy_get_pg_txpwr_idx(_adapter *pAdapter -+ , enum rf_path RFPath, RATE_SECTION rs, u8 ntx_idx -+ , enum channel_width BandWidth, u8 band, u8 Channel); -+#endif -+ -+#if CONFIG_TXPWR_LIMIT -+s8 phy_get_txpwr_lmt(_adapter *adapter -+ , const char *regd_name -+ , BAND_TYPE band, enum channel_width bw -+ , u8 tlrs, u8 ntx_idx, u8 cch, u8 lock -+); -+ -+s8 phy_get_txpwr_lmt_diff(_adapter *adapter -+ , const char *regd_name -+ , BAND_TYPE band, enum channel_width bw -+ , u8 rfpath, u8 rs, u8 tlrs, u8 ntx_idx, u8 cch, u8 lock -+); -+ -+s8 phy_get_txpwr_lmt_sub_chs(_adapter *adapter -+ , const char *regd_name -+ , BAND_TYPE band, enum channel_width bw -+ , u8 rfpath, u8 rate, u8 ntx_idx, u8 cch, u8 opch, bool reg_max -+); -+#else -+#define phy_get_txpwr_lmt(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max) -+#define phy_get_txpwr_lmt_diff(adapter, regd_name, band, bw, rfpath, rs, tlrs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max) -+#define phy_get_txpwr_lmt_sub_chs(adapter, regd_name, band, bw, rfpath, rate, ntx_idx, cch, opch, reg_max) (GET_HAL_SPEC(adapter)->txgi_max) -+#endif /* CONFIG_TXPWR_LIMIT */ -+ -+void dump_txpwr_tpc_settings(void *sel, _adapter *adapter); -+void dump_txpwr_antenna_gain(void *sel, _adapter *adapter); -+ -+s8 phy_get_txpwr_target(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate, u8 ntx_idx -+ , enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch, bool reg_max, struct txpwr_idx_comp *tic); -+s8 phy_get_txpwr_amends(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate, u8 ntx_idx -+ , enum channel_width bw, BAND_TYPE band, u8 cch, struct txpwr_idx_comp *tic); -+#ifdef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET -+s8 phy_get_tssi_txpwr_by_rate_ref(_adapter *adapter, enum rf_path path -+ , enum channel_width bw, u8 cch, u8 opch); -+#endif -+u8 hal_com_get_txpwr_idx(_adapter *adapter, enum rf_path rfpath -+ , RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch -+ , struct txpwr_idx_comp *tic); -+ -+s16 phy_get_txpwr_single_mbm(_adapter *adapter, u8 rfpath, RATE_SECTION rs, u8 rate -+ , enum channel_width bw, u8 cch, u8 opch, bool reg_max, bool eirp, struct txpwr_idx_comp *tic); -+s16 phy_get_txpwr_total_mbm(_adapter *adapter, RATE_SECTION rs, u8 rate -+ , enum channel_width bw, u8 cch, u8 opch, bool reg_max, bool eirp, struct txpwr_idx_comp *tic); -+ -+s16 phy_get_txpwr_single_max_mbm(_adapter *adapter, u8 rfpath -+ , enum channel_width bw, u8 cch, u8 opch, u16 bmp_cck_ofdm, u32 bmp_ht, u64 bmp_vht, bool reg_max, bool eirp); -+s16 phy_get_txpwr_total_max_mbm(_adapter *adapter -+ , enum channel_width bw, u8 cch, u8 opch, u16 bmp_cck_ofdm, u32 bmp_ht, u64 bmp_vht, bool reg_max, bool eirp); -+ -+s8 -+phy_get_tx_power_final_absolute_value(_adapter *adapter, u8 rfpath, u8 rate, -+ enum channel_width bw, u8 channel); -+ -+s8 -+PHY_GetTxPowerTrackingOffset( -+ PADAPTER pAdapter, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+struct txpwr_idx_comp { -+ u8 ntx_idx; -+ s8 target; -+ s8 base; -+ -+ /* for target */ -+ s8 by_rate; -+ s8 btc; -+ s8 extra; -+ s8 utarget; -+ s8 rlimit; /* regulatory limit w/o HAL consideration */ -+ s8 limit; /* limit from RTK private (regulatory limit w/ HAL consideration) */ -+ s8 ulimit; /* user limit */ -+ s8 tpc; -+ -+ /* for amends */ -+ s8 tpt; -+ s8 dpd; -+}; -+ -+u8 phy_get_tx_power_index_ex(_adapter *adapter -+ , enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate -+ , enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch); -+ -+u8 -+phy_get_tx_power_index( -+ PADAPTER pAdapter, -+ enum rf_path RFPath, -+ u8 Rate, -+ enum channel_width BandWidth, -+ u8 Channel -+); -+ -+void -+PHY_SetTxPowerIndex( -+ PADAPTER pAdapter, -+ u32 PowerIndex, -+ enum rf_path RFPath, -+ u8 Rate -+); -+ -+bool phy_is_txpwr_user_mbm_valid(_adapter *adapter, s16 mbm); -+bool phy_is_txpwr_user_target_specified(_adapter *adapter); -+ -+void dump_tx_power_index_inline(void *sel, _adapter *adapter, u8 rfpath -+ , enum channel_width bw, u8 cch, enum MGN_RATE rate, u8 pwr_idx, struct txpwr_idx_comp *tic); -+#ifdef CONFIG_PROC_DEBUG -+void dump_tx_power_idx_title(void *sel, _adapter *adapter -+ , enum channel_width bw, u8 cch, u8 opch); -+void dump_tx_power_idx_by_path_rs(void *sel, _adapter *adapter, u8 rfpath -+ , RATE_SECTION rs, enum channel_width bw, u8 cch, u8 opch); -+void dump_tx_power_idx(void *sel, _adapter *adapter -+ , enum channel_width bw, u8 cch, u8 opch); -+void dump_txpwr_total_dbm_title(void *sel, _adapter *adapter -+ , enum channel_width bw, u8 cch, u8 opch); -+void dump_txpwr_total_dbm_by_rs(void *sel, _adapter *adapter, u8 rs -+ , enum channel_width bw, u8 cch, u8 opch); -+void dump_txpwr_total_dbm(void *sel, _adapter *adapter -+ , enum channel_width bw, u8 cch, u8 opch); -+#endif -+ -+bool phy_is_tx_power_limit_needed(_adapter *adapter); -+bool phy_is_tx_power_by_rate_needed(_adapter *adapter); -+int phy_load_tx_power_by_rate(_adapter *adapter, u8 chk_file); -+#if CONFIG_TXPWR_LIMIT -+int phy_load_tx_power_limit(_adapter *adapter, u8 chk_file); -+#endif -+void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file); -+void phy_reload_tx_power_ext_info(_adapter *adapter); -+void phy_reload_default_tx_power_ext_info(_adapter *adapter); -+ -+const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter); -+ -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+int check_phy_efuse_tx_power_info_valid(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX -+void dump_hal_txpwr_info_2g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt); -+void dump_hal_txpwr_info_5g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt); -+ -+void hal_load_txpwr_info(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_PROC_DEBUG -+void dump_tx_power_ext_info(void *sel, _adapter *adapter); -+void dump_target_tx_power(void *sel, _adapter *adapter); -+void dump_tx_power_by_rate(void *sel, _adapter *adapter); -+#endif -+ -+int rtw_get_phy_file_path(_adapter *adapter, const char *file_name); -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+#define MAC_FILE_FW_NIC "FW_NIC.bin" -+#define MAC_FILE_FW_WW_IMG "FW_WoWLAN.bin" -+#define PHY_FILE_MAC_REG "MAC_REG.txt" -+ -+#define PHY_FILE_AGC_TAB "AGC_TAB.txt" -+#define PHY_FILE_PHY_REG "PHY_REG.txt" -+#define PHY_FILE_PHY_REG_MP "PHY_REG_MP.txt" -+#define PHY_FILE_PHY_REG_PG "PHY_REG_PG.txt" -+ -+#define PHY_FILE_RADIO_A "RadioA.txt" -+#define PHY_FILE_RADIO_B "RadioB.txt" -+#define PHY_FILE_RADIO_C "RadioC.txt" -+#define PHY_FILE_RADIO_D "RadioD.txt" -+#define PHY_FILE_TXPWR_TRACK "TxPowerTrack.txt" -+#define PHY_FILE_TXPWR_LMT "TXPWR_LMT.txt" -+ -+#define PHY_FILE_WIFI_ANT_ISOLATION "wifi_ant_isolation.txt" -+ -+#define MAX_PARA_FILE_BUF_LEN 32768 /* 32k */ -+ -+#define LOAD_MAC_PARA_FILE BIT0 -+#define LOAD_BB_PARA_FILE BIT1 -+#define LOAD_BB_PG_PARA_FILE BIT2 -+#define LOAD_BB_MP_PARA_FILE BIT3 -+#define LOAD_RF_PARA_FILE BIT4 -+#define LOAD_RF_TXPWR_TRACK_PARA_FILE BIT5 -+#define LOAD_RF_TXPWR_LMT_PARA_FILE BIT6 -+ -+int phy_ConfigMACWithParaFile(PADAPTER Adapter, char *pFileName); -+int phy_ConfigBBWithParaFile(PADAPTER Adapter, char *pFileName, u32 ConfigType); -+int phy_ConfigBBWithPgParaFile(PADAPTER Adapter, const char *pFileName); -+int phy_ConfigBBWithMpParaFile(PADAPTER Adapter, char *pFileName); -+int PHY_ConfigRFWithParaFile(PADAPTER Adapter, char *pFileName, enum rf_path eRFPath); -+int PHY_ConfigRFWithTxPwrTrackParaFile(PADAPTER Adapter, char *pFileName); -+#if CONFIG_TXPWR_LIMIT -+int PHY_ConfigRFWithPowerLimitTableParaFile(PADAPTER Adapter, const char *pFileName); -+#endif -+void phy_free_filebuf_mask(_adapter *padapter, u8 mask); -+void phy_free_filebuf(_adapter *padapter); -+#endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */ -+u8 phy_check_under_survey_ch(_adapter *adapter); -+#endif /* __HAL_COMMON_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/hal_com_reg.h b/drivers/staging/rtl8723cs/include/hal_com_reg.h -new file mode 100644 -index 000000000000..353a0f505650 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_com_reg.h -@@ -0,0 +1,1890 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_COMMON_REG_H__ -+#define __HAL_COMMON_REG_H__ -+ -+ -+#define MAC_ADDR_LEN 6 -+ -+#define HAL_NAV_UPPER_UNIT 128 /* micro-second */ -+ -+/* 8188E PKT_BUFF_ACCESS_CTRL value */ -+#define TXPKT_BUF_SELECT 0x69 -+#define RXPKT_BUF_SELECT 0xA5 -+#define TXREPORT_BUF_SELECT 0x7F -+#define DISABLE_TRXPKT_BUF_ACCESS 0x0 -+ -+#ifndef RTW_HALMAC -+/* ************************************************************ -+* -+* ************************************************************ */ -+ -+/* ----------------------------------------------------- -+* -+* 0x0000h ~ 0x00FFh System Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_SYS_ISO_CTRL 0x0000 -+#define REG_SYS_FUNC_EN 0x0002 -+#define REG_APS_FSMCO 0x0004 -+#define REG_SYS_CLKR 0x0008 -+#define REG_SYS_CLK_CTRL REG_SYS_CLKR -+#define REG_9346CR 0x000A -+#define REG_SYS_EEPROM_CTRL 0x000A -+#define REG_EE_VPD 0x000C -+#define REG_AFE_MISC 0x0010 -+#define REG_SPS0_CTRL 0x0011 -+#define REG_SPS0_CTRL_6 0x0016 -+#define REG_POWER_OFF_IN_PROCESS 0x0017 -+#define REG_SPS_OCP_CFG 0x0018 -+#define REG_RSV_CTRL 0x001C -+#define REG_RF_CTRL 0x001F -+#define REG_LDOA15_CTRL 0x0020 -+#define REG_LDOV12D_CTRL 0x0021 -+#define REG_LDOHCI12_CTRL 0x0022 -+#define REG_LPLDO_CTRL 0x0023 -+#define REG_AFE_XTAL_CTRL 0x0024 -+#define REG_AFE_LDO_CTRL 0x0027 /* 1.5v for 8188EE test chip, 1.4v for MP chip */ -+#define REG_AFE_PLL_CTRL 0x0028 -+#define REG_MAC_PHY_CTRL 0x002c /* for 92d, DMDP, SMSP, DMSP contrl */ -+#define REG_APE_PLL_CTRL_EXT 0x002c -+#define REG_EFUSE_CTRL 0x0030 -+#define REG_EFUSE_TEST 0x0034 -+#define REG_PWR_DATA 0x0038 -+#define REG_CAL_TIMER 0x003C -+#define REG_ACLK_MON 0x003E -+#define REG_GPIO_MUXCFG 0x0040 -+#define REG_GPIO_IO_SEL 0x0042 -+#define REG_MAC_PINMUX_CFG 0x0043 -+#define REG_GPIO_PIN_CTRL 0x0044 -+#define REG_GPIO_INTM 0x0048 -+#define REG_LEDCFG0 0x004C -+#define REG_LEDCFG1 0x004D -+#define REG_LEDCFG2 0x004E -+#define REG_LEDCFG3 0x004F -+#define REG_FSIMR 0x0050 -+#define REG_FSISR 0x0054 -+#define REG_HSIMR 0x0058 -+#define REG_HSISR 0x005c -+#define REG_GPIO_PIN_CTRL_2 0x0060 /* RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control. */ -+#define REG_GPIO_IO_SEL_2 0x0062 /* RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. */ -+#define REG_PAD_CTRL_1 0x0064 -+#define REG_MULTI_FUNC_CTRL 0x0068 /* RTL8723 WIFI/BT/GPS Multi-Function control source. */ -+#define REG_GSSR 0x006c -+#define REG_AFE_XTAL_CTRL_EXT 0x0078 /* RTL8188E */ -+#define REG_XCK_OUT_CTRL 0x007c /* RTL8188E */ -+#define REG_MCUFWDL 0x0080 -+#define REG_WOL_EVENT 0x0081 /* RTL8188E */ -+#define REG_MCUTSTCFG 0x0084 -+#define REG_FDHM0 0x0088 -+#define REG_HOST_SUSP_CNT 0x00BC /* RTL8192C Host suspend counter on FPGA platform */ -+#define REG_SYSTEM_ON_CTRL 0x00CC /* For 8723AE Reset after S3 */ -+#define REG_EFUSE_ACCESS 0x00CF /* Efuse access protection for RTL8723 */ -+#define REG_BIST_SCAN 0x00D0 -+#define REG_BIST_RPT 0x00D4 -+#define REG_BIST_ROM_RPT 0x00D8 -+#define REG_USB_SIE_INTF 0x00E0 -+#define REG_PCIE_MIO_INTF 0x00E4 -+#define REG_PCIE_MIO_INTD 0x00E8 -+#define REG_HPON_FSM 0x00EC -+#define REG_SYS_CFG 0x00F0 -+#define REG_GPIO_OUTSTS 0x00F4 /* For RTL8723 only. */ -+#define REG_TYPE_ID 0x00FC -+ -+/* -+* 2010/12/29 MH Add for 92D -+* */ -+#define REG_MAC_PHY_CTRL_NORMAL 0x00f8 -+ -+ -+/* ----------------------------------------------------- -+* -+* 0x0100h ~ 0x01FFh MACTOP General Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_CR 0x0100 -+#define REG_PBP 0x0104 -+#define REG_PKT_BUFF_ACCESS_CTRL 0x0106 -+#define REG_TRXDMA_CTRL 0x010C -+#define REG_TRXFF_BNDY 0x0114 -+#define REG_TRXFF_STATUS 0x0118 -+#define REG_RXFF_PTR 0x011C -+#define REG_HIMR 0x0120 -+#define REG_FE1IMR 0x0120 -+#define REG_HISR 0x0124 -+#define REG_HIMRE 0x0128 -+#define REG_HISRE 0x012C -+#define REG_CPWM 0x012F -+#define REG_FWIMR 0x0130 -+#define REG_FWISR 0x0134 -+#define REG_FTIMR 0x0138 -+#define REG_FTISR 0x013C /* RTL8192C */ -+#define REG_PKTBUF_DBG_CTRL 0x0140 -+#define REG_RXPKTBUF_CTRL (REG_PKTBUF_DBG_CTRL+2) -+#define REG_PKTBUF_DBG_DATA_L 0x0144 -+#define REG_PKTBUF_DBG_DATA_H 0x0148 -+ -+#define REG_TC0_CTRL 0x0150 -+#define REG_TC1_CTRL 0x0154 -+#define REG_TC2_CTRL 0x0158 -+#define REG_TC3_CTRL 0x015C -+#define REG_TC4_CTRL 0x0160 -+#define REG_TCUNIT_BASE 0x0164 -+#define REG_MBIST_START 0x0174 -+#define REG_MBIST_DONE 0x0178 -+#define REG_MBIST_FAIL 0x017C -+#define REG_32K_CTRL 0x0194 /* RTL8188E */ -+#define REG_C2HEVT_MSG_NORMAL 0x01A0 -+#define REG_C2HEVT_CLEAR 0x01AF -+#define REG_MCUTST_1 0x01c0 -+#define REG_MCUTST_WOWLAN 0x01C7 /* Defined after 8188E series. */ -+#define REG_FMETHR 0x01C8 -+#define REG_HMETFR 0x01CC -+#define REG_HMEBOX_0 0x01D0 -+#define REG_HMEBOX_1 0x01D4 -+#define REG_HMEBOX_2 0x01D8 -+#define REG_HMEBOX_3 0x01DC -+#define REG_LLT_INIT 0x01E0 -+#define REG_HMEBOX_EXT_0 0x01F0 -+#define REG_HMEBOX_EXT_1 0x01F4 -+#define REG_HMEBOX_EXT_2 0x01F8 -+#define REG_HMEBOX_EXT_3 0x01FC -+ -+ -+/* ----------------------------------------------------- -+* -+* 0x0200h ~ 0x027Fh TXDMA Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_RQPN 0x0200 -+#define REG_FIFOPAGE 0x0204 -+#define REG_TDECTRL 0x0208 -+#define REG_TXDMA_OFFSET_CHK 0x020C -+#define REG_TXDMA_STATUS 0x0210 -+#define REG_RQPN_NPQ 0x0214 -+#define REG_TQPNT1 0x0218 -+#define REG_TQPNT2 0x021C -+#define REG_AUTO_LLT 0x0224 -+ -+ -+/* ----------------------------------------------------- -+* -+* 0x0280h ~ 0x02FFh RXDMA Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_RXDMA_AGG_PG_TH 0x0280 -+#define REG_RXPKT_NUM 0x0284 -+#define REG_RXDMA_STATUS 0x0288 -+ -+/* ----------------------------------------------------- -+* -+* 0x0300h ~ 0x03FFh PCIe -+* -+* ----------------------------------------------------- */ -+#ifndef CONFIG_TRX_BD_ARCH /* prevent CONFIG_TRX_BD_ARCH to use old registers */ -+ -+#define REG_PCIE_CTRL_REG 0x0300 -+#define REG_INT_MIG 0x0304 /* Interrupt Migration */ -+#define REG_BCNQ_DESA 0x0308 /* TX Beacon Descriptor Address */ -+#define REG_HQ_DESA 0x0310 /* TX High Queue Descriptor Address */ -+#define REG_MGQ_DESA 0x0318 /* TX Manage Queue Descriptor Address */ -+#define REG_VOQ_DESA 0x0320 /* TX VO Queue Descriptor Address */ -+#define REG_VIQ_DESA 0x0328 /* TX VI Queue Descriptor Address */ -+#define REG_BEQ_DESA 0x0330 /* TX BE Queue Descriptor Address */ -+#define REG_BKQ_DESA 0x0338 /* TX BK Queue Descriptor Address */ -+#define REG_RX_DESA 0x0340 /* RX Queue Descriptor Address */ -+/* sherry added for DBI Read/Write 20091126 */ -+#define REG_DBI_WDATA 0x0348 /* Backdoor REG for Access Configuration */ -+#define REG_DBI_RDATA 0x034C /* Backdoor REG for Access Configuration */ -+#define REG_DBI_CTRL 0x0350 /* Backdoor REG for Access Configuration */ -+#define REG_DBI_FLAG 0x0352 /* Backdoor REG for Access Configuration */ -+#define REG_MDIO 0x0354 /* MDIO for Access PCIE PHY */ -+#define REG_DBG_SEL 0x0360 /* Debug Selection Register */ -+#define REG_WATCH_DOG 0x0368 -+#define REG_RX_RXBD_NUM 0x0382 -+ -+/* RTL8723 series ------------------------------- */ -+#define REG_PCIE_HISR_EN 0x0394 /* PCIE Local Interrupt Enable Register */ -+#define REG_PCIE_HISR 0x03A0 -+#define REG_PCIE_HISRE 0x03A4 -+#define REG_PCIE_HIMR 0x03A8 -+#define REG_PCIE_HIMRE 0x03AC -+ -+#endif /* !CONFIG_TRX_BD_ARCH */ -+ -+#define REG_USB_HIMR 0xFE38 -+#define REG_USB_HIMRE 0xFE3C -+#define REG_USB_HISR 0xFE78 -+#define REG_USB_HISRE 0xFE7C -+ -+ -+/* ----------------------------------------------------- -+* -+* 0x0400h ~ 0x047Fh Protocol Configuration -+* -+* ----------------------------------------------------- */ -+ -+/* 92C, 92D */ -+#define REG_VOQ_INFO 0x0400 -+#define REG_VIQ_INFO 0x0404 -+#define REG_BEQ_INFO 0x0408 -+#define REG_BKQ_INFO 0x040C -+ -+/* 88E, 8723A, 8812A, 8821A, 92E, 8723B */ -+#define REG_Q0_INFO 0x400 -+#define REG_Q1_INFO 0x404 -+#define REG_Q2_INFO 0x408 -+#define REG_Q3_INFO 0x40C -+ -+#define REG_MGQ_INFO 0x0410 -+#define REG_HGQ_INFO 0x0414 -+#define REG_BCNQ_INFO 0x0418 -+#define REG_TXPKT_EMPTY 0x041A -+#define REG_CPU_MGQ_INFORMATION 0x041C -+#define REG_FWHW_TXQ_CTRL 0x0420 -+#define REG_HWSEQ_CTRL 0x0423 -+#define REG_BCNQ_BDNY 0x0424 -+#define REG_MGQ_BDNY 0x0425 -+#define REG_LIFETIME_EN 0x0426 -+#define REG_MULTI_BCNQ_OFFSET 0x0427 -+#define REG_SPEC_SIFS 0x0428 -+#define REG_RETRY_LIMIT 0x042A -+#define REG_DARFRC 0x0430 -+#define REG_RARFRC 0x0438 -+#define REG_RRSR 0x0440 -+#define REG_ARFR0 0x0444 -+#define REG_ARFR1 0x0448 -+#define REG_ARFR2 0x044C -+#define REG_ARFR3 0x0450 -+#define REG_CCK_CHECK 0x0454 -+#define REG_BCNQ1_BDNY 0x0457 -+ -+#define REG_AGGLEN_LMT 0x0458 -+#define REG_AMPDU_MIN_SPACE 0x045C -+#define REG_WMAC_LBK_BF_HD 0x045D -+#define REG_FAST_EDCA_CTRL 0x0460 -+#define REG_RD_RESP_PKT_TH 0x0463 -+ -+/* 8723A, 8812A, 8821A, 92E, 8723B */ -+#define REG_Q4_INFO 0x468 -+#define REG_Q5_INFO 0x46C -+#define REG_Q6_INFO 0x470 -+#define REG_Q7_INFO 0x474 -+ -+#define REG_INIRTS_RATE_SEL 0x0480 -+#define REG_INIDATA_RATE_SEL 0x0484 -+ -+/* 8723B, 92E, 8812A, 8821A*/ -+#define REG_MACID_SLEEP_3 0x0484 -+#define REG_MACID_SLEEP_1 0x0488 -+ -+#define REG_POWER_STAGE1 0x04B4 -+#define REG_POWER_STAGE2 0x04B8 -+#define REG_PKT_LIFE_TIME 0x04C0 -+#define REG_PKT_LIFE_TIME_VO_VI 0x04C0 -+#define REG_PKT_LIFE_TIME_BE_BK 0x04C2 -+#define REG_STBC_SETTING 0x04C4 -+#define REG_QUEUE_CTRL 0x04C6 -+#define REG_SINGLE_AMPDU_CTRL 0x04c7 -+#define REG_PROT_MODE_CTRL 0x04C8 -+#define REG_MAX_AGGR_NUM 0x04CA -+#define REG_RTS_MAX_AGGR_NUM 0x04CB -+#define REG_BAR_MODE_CTRL 0x04CC -+#define REG_RA_TRY_RATE_AGG_LMT 0x04CF -+ -+/* 8723A */ -+#define REG_MACID_DROP 0x04D0 -+ -+/* 88E */ -+#define REG_EARLY_MODE_CONTROL 0x04D0 -+ -+/* 8723B, 92E, 8812A, 8821A */ -+#define REG_MACID_SLEEP_2 0x04D0 -+ -+/* 8723A, 8723B, 92E, 8812A, 8821A */ -+#define REG_MACID_SLEEP 0x04D4 -+ -+#define REG_NQOS_SEQ 0x04DC -+#define REG_HW_SEQ0 0x04D8 -+#define REG_HW_SEQ1 0x04DA -+#define REG_HW_SEQ2 0x04DC -+#define REG_HW_SEQ3 0x04DE -+ -+#define REG_QOS_SEQ 0x04DE -+#define REG_NEED_CPU_HANDLE 0x04E0 -+#define REG_PKT_LOSE_RPT 0x04E1 -+#define REG_PTCL_ERR_STATUS 0x04E2 -+#define REG_TX_RPT_CTRL 0x04EC -+#define REG_TX_RPT_TIME 0x04F0 /* 2 byte */ -+#define REG_DUMMY 0x04FC -+ -+/* ----------------------------------------------------- -+* -+* 0x0500h ~ 0x05FFh EDCA Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_EDCA_VO_PARAM 0x0500 -+#define REG_EDCA_VI_PARAM 0x0504 -+#define REG_EDCA_BE_PARAM 0x0508 -+#define REG_EDCA_BK_PARAM 0x050C -+#define REG_BCNTCFG 0x0510 -+#define REG_PIFS 0x0512 -+#define REG_RDG_PIFS 0x0513 -+#define REG_SIFS_CTX 0x0514 -+#define REG_SIFS_TRX 0x0516 -+#define REG_TSFTR_SYN_OFFSET 0x0518 -+#define REG_AGGR_BREAK_TIME 0x051A -+#define REG_SLOT 0x051B -+#define REG_TX_PTCL_CTRL 0x0520 -+#define REG_TXPAUSE 0x0522 -+#define REG_DIS_TXREQ_CLR 0x0523 -+#define REG_RD_CTRL 0x0524 -+/* -+* Format for offset 540h-542h: -+* [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. -+* [7:4]: Reserved. -+* [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. -+* [23:20]: Reserved -+* Description: -+* | -+* |<--Setup--|--Hold------------>| -+* --------------|---------------------- -+* | -+* TBTT -+* Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. -+* Described by Designer Tim and Bruce, 2011-01-14. -+* */ -+#define REG_TBTT_PROHIBIT 0x0540 -+#define REG_RD_NAV_NXT 0x0544 -+#define REG_NAV_PROT_LEN 0x0546 -+#define REG_BCN_CTRL 0x0550 -+#define REG_BCN_CTRL_1 0x0551 -+#define REG_MBID_NUM 0x0552 -+#define REG_DUAL_TSF_RST 0x0553 -+#define REG_MBSSID_BCN_SPACE 0x0554 -+#define REG_DRVERLYINT 0x0558 -+#define REG_BCNDMATIM 0x0559 -+#define REG_ATIMWND 0x055A -+#define REG_USTIME_TSF 0x055C -+#define REG_BCN_MAX_ERR 0x055D -+#define REG_RXTSF_OFFSET_CCK 0x055E -+#define REG_RXTSF_OFFSET_OFDM 0x055F -+#define REG_TSFTR 0x0560 -+#define REG_TSFTR1 0x0568 /* HW Port 1 TSF Register */ -+#define REG_ATIMWND_1 0x0570 -+#define REG_P2P_CTWIN 0x0572 /* 1 Byte long (in unit of TU) */ -+#define REG_PSTIMER 0x0580 -+#define REG_TIMER0 0x0584 -+#define REG_TIMER1 0x0588 -+#define REG_HIQ_NO_LMT_EN 0x05A7 -+#define REG_ACMHWCTRL 0x05C0 -+#define REG_NOA_DESC_SEL 0x05CF -+#define REG_NOA_DESC_DURATION 0x05E0 -+#define REG_NOA_DESC_INTERVAL 0x05E4 -+#define REG_NOA_DESC_START 0x05E8 -+#define REG_NOA_DESC_COUNT 0x05EC -+ -+#define REG_DMC 0x05F0 /* Dual MAC Co-Existence Register */ -+#define REG_SCH_TX_CMD 0x05F8 -+ -+#define REG_FW_RESET_TSF_CNT_1 0x05FC -+#define REG_FW_RESET_TSF_CNT_0 0x05FD -+#define REG_FW_BCN_DIS_CNT 0x05FE -+ -+/* ----------------------------------------------------- -+* -+* 0x0600h ~ 0x07FFh WMAC Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_APSD_CTRL 0x0600 -+#define REG_BWOPMODE 0x0603 -+#define REG_TCR 0x0604 -+#define REG_RCR 0x0608 -+#define REG_RX_PKT_LIMIT 0x060C -+#define REG_RX_DLK_TIME 0x060D -+#define REG_RX_DRVINFO_SZ 0x060F -+ -+#define REG_MACID 0x0610 -+#define REG_BSSID 0x0618 -+#define REG_MAR 0x0620 -+#define REG_MBIDCAMCFG_1 0x0628 -+#define REG_MBIDCAMCFG_2 0x062C -+ -+#define REG_PNO_STATUS 0x0631 -+#define REG_USTIME_EDCA 0x0638 -+#define REG_MAC_SPEC_SIFS 0x063A -+/* 20100719 Joseph: Hardware register definition change. (HW datasheet v54) */ -+#define REG_RESP_SIFS_CCK 0x063C /* [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK */ -+#define REG_RESP_SIFS_OFDM 0x063E /* [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK */ -+ -+#define REG_ACKTO 0x0640 -+#define REG_CTS2TO 0x0641 -+#define REG_EIFS 0x0642 -+ -+/*REG_TCR*/ -+#define BIT_PWRBIT_OW_EN BIT(7) -+ -+/* RXERR_RPT */ -+#define RXERR_TYPE_OFDM_PPDU 0 -+#define RXERR_TYPE_OFDM_FALSE_ALARM 1 -+#define RXERR_TYPE_OFDM_MPDU_OK 2 -+#define RXERR_TYPE_OFDM_MPDU_FAIL 3 -+#define RXERR_TYPE_CCK_PPDU 4 -+#define RXERR_TYPE_CCK_FALSE_ALARM 5 -+#define RXERR_TYPE_CCK_MPDU_OK 6 -+#define RXERR_TYPE_CCK_MPDU_FAIL 7 -+#define RXERR_TYPE_HT_PPDU 8 -+#define RXERR_TYPE_HT_FALSE_ALARM 9 -+#define RXERR_TYPE_HT_MPDU_TOTAL 10 -+#define RXERR_TYPE_HT_MPDU_OK 11 -+#define RXERR_TYPE_HT_MPDU_FAIL 12 -+#define RXERR_TYPE_RX_FULL_DROP 15 -+ -+#define RXERR_COUNTER_MASK 0xFFFFF -+#define RXERR_RPT_RST BIT(27) -+#define _RXERR_RPT_SEL(type) ((type) << 28) -+ -+/* -+* Note: -+* The NAV upper value is very important to WiFi 11n 5.2.3 NAV test. The default value is -+* always too small, but the WiFi TestPlan test by 25,000 microseconds of NAV through sending -+* CTS in the air. We must update this value greater than 25,000 microseconds to pass the item. -+* The offset of NAV_UPPER in 8192C Spec is incorrect, and the offset should be 0x0652. Commented -+* by SD1 Scott. -+* By Bruce, 2011-07-18. -+* */ -+#define REG_NAV_UPPER 0x0652 /* unit of 128 */ -+ -+/* WMA, BA, CCX */ -+#define REG_NAV_CTRL 0x0650 -+#define REG_BACAMCMD 0x0654 -+#define REG_BACAMCONTENT 0x0658 -+#define REG_LBDLY 0x0660 -+#define REG_FWDLY 0x0661 -+#define REG_RXERR_RPT 0x0664 -+#define REG_WMAC_TRXPTCL_CTL 0x0668 -+ -+/* Security */ -+#define REG_CAMCMD 0x0670 -+#define REG_CAMWRITE 0x0674 -+#define REG_CAMREAD 0x0678 -+#define REG_CAMDBG 0x067C -+#define REG_SECCFG 0x0680 -+ -+/* Power */ -+#define REG_WOW_CTRL 0x0690 -+#define REG_PS_RX_INFO 0x0692 -+#define REG_WMMPS_UAPSD_TID 0x0693 -+#define REG_WKFMCAM_CMD 0x0698 -+#define REG_WKFMCAM_NUM REG_WKFMCAM_CMD -+#define REG_WKFMCAM_RWD 0x069C -+#define REG_RXFLTMAP0 0x06A0 -+#define REG_RXFLTMAP1 0x06A2 -+#define REG_RXFLTMAP2 0x06A4 -+#define REG_BCN_PSR_RPT 0x06A8 -+#define REG_BT_COEX_TABLE 0x06C0 -+ -+#define BIT_WKFCAM_WE BIT(16) -+#define BIT_WKFCAM_POLLING_V1 BIT(31) -+#define BIT_WKFCAM_CLR_V1 BIT(30) -+#define BIT_SHIFT_WKFCAM_ADDR_V2 8 -+#define BIT_MASK_WKFCAM_ADDR_V2 0xff -+#define BIT_WKFCAM_ADDR_V2(x) (((x) & BIT_MASK_WKFCAM_ADDR_V2) << BIT_SHIFT_WKFCAM_ADDR_V2) -+ -+/* Hardware Port 1 */ -+#define REG_MACID1 0x0700 -+#define REG_BSSID1 0x0708 -+ -+/* Enable/Disable Port 0 and Port 1 for Specific ICs (ex. 8192F)*/ -+#define REG_WLAN_ACT_MASK_CTRL_1 0x076C -+ -+/* GPIO Control */ -+#define REG_SW_GPIO_SHARE_CTRL_0 0x1038 -+#define REG_SW_GPIO_SHARE_CTRL_1 0x103C -+#define REG_SW_GPIO_A_OUT 0x1040 -+#define REG_SW_GPIO_A_OEN 0x1044 -+#define REG_SW_GPIO_B_OEN 0x1058 -+#define REG_SW_GPIO_B_OUT 0x105C -+ -+/* Hardware Port 2 */ -+#define REG_MACID2 0x1620 -+#define REG_BSSID2 0x1628 -+/* Hardware Port 3*/ -+#define REG_MACID3 0x1630 -+#define REG_BSSID3 0x1638 -+/* Hardware Port 4 */ -+#define REG_MACID4 0x1640 -+#define REG_BSSID4 0x1648 -+ -+ -+#define REG_CR_EXT 0x1100 -+ -+/* ----------------------------------------------------- -+* -+* 0xFE00h ~ 0xFE55h USB Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_USB_INFO 0xFE17 -+#define REG_USB_SPECIAL_OPTION 0xFE55 -+#define REG_USB_DMA_AGG_TO 0xFE5B -+#define REG_USB_AGG_TO 0xFE5C -+#define REG_USB_AGG_TH 0xFE5D -+ -+#define REG_USB_HRPWM 0xFE58 -+#define REG_USB_HCPWM 0xFE57 -+ -+/* for 92DU high_Queue low_Queue Normal_Queue select */ -+#define REG_USB_High_NORMAL_Queue_Select_MAC0 0xFE44 -+/* #define REG_USB_LOW_Queue_Select_MAC0 0xFE45 */ -+#define REG_USB_High_NORMAL_Queue_Select_MAC1 0xFE47 -+/* #define REG_USB_LOW_Queue_Select_MAC1 0xFE48 */ -+ -+/* For test chip */ -+#define REG_TEST_USB_TXQS 0xFE48 -+#define REG_TEST_SIE_VID 0xFE60 /* 0xFE60~0xFE61 */ -+#define REG_TEST_SIE_PID 0xFE62 /* 0xFE62~0xFE63 */ -+#define REG_TEST_SIE_OPTIONAL 0xFE64 -+#define REG_TEST_SIE_CHIRP_K 0xFE65 -+#define REG_TEST_SIE_PHY 0xFE66 /* 0xFE66~0xFE6B */ -+#define REG_TEST_SIE_MAC_ADDR 0xFE70 /* 0xFE70~0xFE75 */ -+#define REG_TEST_SIE_STRING 0xFE80 /* 0xFE80~0xFEB9 */ -+ -+ -+/* For normal chip */ -+#define REG_NORMAL_SIE_VID 0xFE60 /* 0xFE60~0xFE61 */ -+#define REG_NORMAL_SIE_PID 0xFE62 /* 0xFE62~0xFE63 */ -+#define REG_NORMAL_SIE_OPTIONAL 0xFE64 -+#define REG_NORMAL_SIE_EP 0xFE65 /* 0xFE65~0xFE67 */ -+#define REG_NORMAL_SIE_PHY 0xFE68 /* 0xFE68~0xFE6B */ -+#define REG_NORMAL_SIE_OPTIONAL2 0xFE6C -+#define REG_NORMAL_SIE_GPS_EP 0xFE6D /* 0xFE6D, for RTL8723 only. */ -+#define REG_NORMAL_SIE_MAC_ADDR 0xFE70 /* 0xFE70~0xFE75 */ -+#define REG_NORMAL_SIE_STRING 0xFE80 /* 0xFE80~0xFEDF */ -+ -+ -+/* ----------------------------------------------------- -+* -+* Redifine 8192C register definition for compatibility -+* -+* ----------------------------------------------------- */ -+ -+/* TODO: use these definition when using REG_xxx naming rule. -+* NOTE: DO NOT Remove these definition. Use later. */ -+ -+#define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */ -+#define EFUSE_TEST REG_EFUSE_TEST /* E-Fuse Test. */ -+#define MSR (REG_CR + 2) /* Media Status register */ -+/* #define ISR REG_HISR */ -+#define MSR1 REG_CR_EXT -+ -+#define TSFR REG_TSFTR /* Timing Sync Function Timer Register. */ -+#define TSFR1 REG_TSFTR1 /* HW Port 1 TSF Register */ -+ -+#define PBP REG_PBP -+ -+/* Redifine MACID register, to compatible prior ICs. */ -+#define IDR0 REG_MACID /* MAC ID Register, Offset 0x0050-0x0053 */ -+#define IDR4 (REG_MACID + 4) /* MAC ID Register, Offset 0x0054-0x0055 */ -+ -+/* Unused register */ -+#define UnusedRegister 0x1BF -+#define DCAM UnusedRegister -+#define PSR UnusedRegister -+#define BBAddr UnusedRegister -+#define PhyDataR UnusedRegister -+ -+/* Min Spacing related settings. */ -+#define MAX_MSS_DENSITY_2T 0x13 -+#define MAX_MSS_DENSITY_1T 0x0A -+ -+/* ---------------------------------------------------------------------------- -+* 8192C Cmd9346CR bits (Offset 0xA, 16bit) -+* ---------------------------------------------------------------------------- */ -+#define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */ -+#define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 */ -+#define Cmd9346CR_9356SEL BIT(4) -+ -+/* ---------------------------------------------------------------------------- -+* 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) -+* ---------------------------------------------------------------------------- */ -+#define GPIOSEL_GPIO 0 -+#define GPIOSEL_ENBT BIT(5) -+ -+/* ---------------------------------------------------------------------------- -+* 8192C GPIO PIN Control Register (offset 0x44, 4 byte) -+* ---------------------------------------------------------------------------- */ -+#define GPIO_IN REG_GPIO_PIN_CTRL /* GPIO pins input value */ -+#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) /* GPIO pins output value */ -+#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) /* GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. */ -+#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) -+ -+/* ---------------------------------------------------------------------------- -+* 8811A GPIO PIN Control Register (offset 0x60, 4 byte) -+* ---------------------------------------------------------------------------- */ -+#define GPIO_IN_8811A REG_GPIO_PIN_CTRL_2 /* GPIO pins input value */ -+#define GPIO_OUT_8811A (REG_GPIO_PIN_CTRL_2+1) /* GPIO pins output value */ -+#define GPIO_IO_SEL_8811A (REG_GPIO_PIN_CTRL_2+2) /* GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. */ -+#define GPIO_MOD_8811A (REG_GPIO_PIN_CTRL_2+3) -+ -+/* ---------------------------------------------------------------------------- -+* 8723/8188E Host System Interrupt Mask Register (offset 0x58, 32 byte) -+* ---------------------------------------------------------------------------- */ -+#define HSIMR_GPIO12_0_INT_EN BIT(0) -+#define HSIMR_SPS_OCP_INT_EN BIT(5) -+#define HSIMR_RON_INT_EN BIT(6) -+#define HSIMR_PDN_INT_EN BIT(7) -+#define HSIMR_GPIO9_INT_EN BIT(25) -+ -+/* ---------------------------------------------------------------------------- -+* 8723/8188E Host System Interrupt Status Register (offset 0x5C, 32 byte) -+* ---------------------------------------------------------------------------- */ -+#define HSISR_GPIO12_0_INT BIT(0) -+#define HSISR_SPS_OCP_INT BIT(5) -+#define HSISR_RON_INT BIT(6) -+#define HSISR_PDNINT BIT(7) -+#define HSISR_GPIO9_INT BIT(25) -+ -+/* ---------------------------------------------------------------------------- -+* 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) -+* ---------------------------------------------------------------------------- */ -+/* -+Network Type -+00: No link -+01: Link in ad hoc network -+10: Link in infrastructure network -+11: AP mode -+Default: 00b. -+*/ -+#define MSR_NOLINK 0x00 -+#define MSR_ADHOC 0x01 -+#define MSR_INFRA 0x02 -+#define MSR_AP 0x03 -+ -+/* ---------------------------------------------------------------------------- -+* USB INTR CONTENT -+* ---------------------------------------------------------------------------- */ -+#define USB_C2H_CMDID_OFFSET 0 -+#define USB_C2H_SEQ_OFFSET 1 -+#define USB_C2H_EVENT_OFFSET 2 -+#define USB_INTR_CPWM_OFFSET 16 -+#define USB_INTR_CONTENT_C2H_OFFSET 0 -+#define USB_INTR_CONTENT_CPWM1_OFFSET 16 -+#define USB_INTR_CONTENT_CPWM2_OFFSET 20 -+#define USB_INTR_CONTENT_HISR_OFFSET 48 -+#define USB_INTR_CONTENT_HISRE_OFFSET 52 -+#define USB_INTR_CONTENT_LENGTH 56 -+ -+ -+/* WOL bit information */ -+#define HAL92C_WOL_PTK_UPDATE_EVENT BIT(0) -+#define HAL92C_WOL_GTK_UPDATE_EVENT BIT(1) -+#define HAL92C_WOL_DISASSOC_EVENT BIT(2) -+#define HAL92C_WOL_DEAUTH_EVENT BIT(3) -+#define HAL92C_WOL_FW_DISCONNECT_EVENT BIT(4) -+ -+ -+/*---------------------------------------------------------------------------- -+** REG_CCK_CHECK (offset 0x454) -+------------------------------------------------------------------------------*/ -+#define BIT_BCN_PORT_SEL BIT(5) -+#define BIT_EN_BCN_PKT_REL BIT(6) -+ -+#endif /* RTW_HALMAC */ -+ -+/* ---------------------------------------------------------------------------- -+* Response Rate Set Register (offset 0x440, 24bits) -+* ---------------------------------------------------------------------------- */ -+#define RRSR_1M BIT(0) -+#define RRSR_2M BIT(1) -+#define RRSR_5_5M BIT(2) -+#define RRSR_11M BIT(3) -+#define RRSR_6M BIT(4) -+#define RRSR_9M BIT(5) -+#define RRSR_12M BIT(6) -+#define RRSR_18M BIT(7) -+#define RRSR_24M BIT(8) -+#define RRSR_36M BIT(9) -+#define RRSR_48M BIT(10) -+#define RRSR_54M BIT(11) -+#define RRSR_MCS0 BIT(12) -+#define RRSR_MCS1 BIT(13) -+#define RRSR_MCS2 BIT(14) -+#define RRSR_MCS3 BIT(15) -+#define RRSR_MCS4 BIT(16) -+#define RRSR_MCS5 BIT(17) -+#define RRSR_MCS6 BIT(18) -+#define RRSR_MCS7 BIT(19) -+ -+#define RRSR_CCK_RATES (RRSR_11M | RRSR_5_5M | RRSR_2M | RRSR_1M) -+#define RRSR_OFDM_RATES (RRSR_54M | RRSR_48M | RRSR_36M | RRSR_24M | RRSR_18M | RRSR_12M | RRSR_9M | RRSR_6M) -+ -+/* ---------------------------------------------------------------------------- -+ * Rate Definition -+ * ---------------------------------------------------------------------------- */ -+/* CCK */ -+#define RATR_1M 0x00000001 -+#define RATR_2M 0x00000002 -+#define RATR_55M 0x00000004 -+#define RATR_11M 0x00000008 -+/* OFDM */ -+#define RATR_6M 0x00000010 -+#define RATR_9M 0x00000020 -+#define RATR_12M 0x00000040 -+#define RATR_18M 0x00000080 -+#define RATR_24M 0x00000100 -+#define RATR_36M 0x00000200 -+#define RATR_48M 0x00000400 -+#define RATR_54M 0x00000800 -+/* MCS 1 Spatial Stream */ -+#define RATR_MCS0 0x00001000 -+#define RATR_MCS1 0x00002000 -+#define RATR_MCS2 0x00004000 -+#define RATR_MCS3 0x00008000 -+#define RATR_MCS4 0x00010000 -+#define RATR_MCS5 0x00020000 -+#define RATR_MCS6 0x00040000 -+#define RATR_MCS7 0x00080000 -+/* MCS 2 Spatial Stream */ -+#define RATR_MCS8 0x00100000 -+#define RATR_MCS9 0x00200000 -+#define RATR_MCS10 0x00400000 -+#define RATR_MCS11 0x00800000 -+#define RATR_MCS12 0x01000000 -+#define RATR_MCS13 0x02000000 -+#define RATR_MCS14 0x04000000 -+#define RATR_MCS15 0x08000000 -+ -+/* CCK */ -+#define RATE_1M BIT(0) -+#define RATE_2M BIT(1) -+#define RATE_5_5M BIT(2) -+#define RATE_11M BIT(3) -+/* OFDM */ -+#define RATE_6M BIT(4) -+#define RATE_9M BIT(5) -+#define RATE_12M BIT(6) -+#define RATE_18M BIT(7) -+#define RATE_24M BIT(8) -+#define RATE_36M BIT(9) -+#define RATE_48M BIT(10) -+#define RATE_54M BIT(11) -+/* MCS 1 Spatial Stream */ -+#define RATE_MCS0 BIT(12) -+#define RATE_MCS1 BIT(13) -+#define RATE_MCS2 BIT(14) -+#define RATE_MCS3 BIT(15) -+#define RATE_MCS4 BIT(16) -+#define RATE_MCS5 BIT(17) -+#define RATE_MCS6 BIT(18) -+#define RATE_MCS7 BIT(19) -+/* MCS 2 Spatial Stream */ -+#define RATE_MCS8 BIT(20) -+#define RATE_MCS9 BIT(21) -+#define RATE_MCS10 BIT(22) -+#define RATE_MCS11 BIT(23) -+#define RATE_MCS12 BIT(24) -+#define RATE_MCS13 BIT(25) -+#define RATE_MCS14 BIT(26) -+#define RATE_MCS15 BIT(27) -+ -+ -+/* ALL CCK Rate */ -+#define RATE_ALL_CCK (RATR_1M | RATR_2M | RATR_55M | RATR_11M) -+#define RATE_ALL_OFDM_AG (RATR_6M | RATR_9M | RATR_12M | RATR_18M | RATR_24M|\ -+ RATR_36M | RATR_48M | RATR_54M) -+#define RATE_ALL_OFDM_1SS (RATR_MCS0 | RATR_MCS1 | RATR_MCS2 | RATR_MCS3 |\ -+ RATR_MCS4 | RATR_MCS5 | RATR_MCS6 | RATR_MCS7) -+#define RATE_ALL_OFDM_2SS (RATR_MCS8 | RATR_MCS9 | RATR_MCS10 | RATR_MCS11|\ -+ RATR_MCS12 | RATR_MCS13 | RATR_MCS14 | RATR_MCS15) -+ -+#define RATE_BITMAP_ALL 0xFFFFF -+ -+/* Only use CCK 1M rate for ACK */ -+#define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 -+#define RATE_RRSR_WITHOUT_CCK 0xFFFF0 -+ -+/* ---------------------------------------------------------------------------- -+ * BW_OPMODE bits (Offset 0x603, 8bit) -+ * ---------------------------------------------------------------------------- */ -+#define BW_OPMODE_20MHZ BIT(2) -+#define BW_OPMODE_5G BIT(1) -+ -+/* ---------------------------------------------------------------------------- -+ * CAM Config Setting (offset 0x680, 1 byte) -+ * ---------------------------------------------------------------------------- */ -+#define CAM_VALID BIT(15) -+#define CAM_NOTVALID 0x0000 -+#define CAM_USEDK BIT(5) -+ -+#define CAM_CONTENT_COUNT 8 -+ -+#define CAM_NONE 0x0 -+#define CAM_WEP40 0x01 -+#define CAM_TKIP 0x02 -+#define CAM_AES 0x04 -+#define CAM_WEP104 0x05 -+#define CAM_SMS4 0x6 -+ -+#define TOTAL_CAM_ENTRY 32 -+#define HALF_CAM_ENTRY 16 -+ -+#define CAM_CONFIG_USEDK _TRUE -+#define CAM_CONFIG_NO_USEDK _FALSE -+ -+#define CAM_WRITE BIT(16) -+#define CAM_READ 0x00000000 -+#define CAM_POLLINIG BIT(31) -+ -+/* -+ * 10. Power Save Control Registers -+ * */ -+#define WOW_PMEN BIT(0) /* Power management Enable. */ -+#define WOW_WOMEN BIT(1) /* WoW function on or off. */ -+#define WOW_MAGIC BIT(2) /* Magic packet */ -+#define WOW_UWF BIT(3) /* Unicast Wakeup frame. */ -+ -+/* -+ * 12. Host Interrupt Status Registers -+ * -+ * ---------------------------------------------------------------------------- -+ * 8190 IMR/ISR bits -+ * ---------------------------------------------------------------------------- */ -+#define IMR8190_DISABLED 0x0 -+#define IMR_DISABLED 0x0 -+/* IMR DW0 Bit 0-31 */ -+#define IMR_BCNDMAINT6 BIT(31) /* Beacon DMA Interrupt 6 */ -+#define IMR_BCNDMAINT5 BIT(30) /* Beacon DMA Interrupt 5 */ -+#define IMR_BCNDMAINT4 BIT(29) /* Beacon DMA Interrupt 4 */ -+#define IMR_BCNDMAINT3 BIT(28) /* Beacon DMA Interrupt 3 */ -+#define IMR_BCNDMAINT2 BIT(27) /* Beacon DMA Interrupt 2 */ -+#define IMR_BCNDMAINT1 BIT(26) /* Beacon DMA Interrupt 1 */ -+#define IMR_BCNDOK8 BIT(25) /* Beacon Queue DMA OK Interrupt 8 */ -+#define IMR_BCNDOK7 BIT(24) /* Beacon Queue DMA OK Interrupt 7 */ -+#define IMR_BCNDOK6 BIT(23) /* Beacon Queue DMA OK Interrupt 6 */ -+#define IMR_BCNDOK5 BIT(22) /* Beacon Queue DMA OK Interrupt 5 */ -+#define IMR_BCNDOK4 BIT(21) /* Beacon Queue DMA OK Interrupt 4 */ -+#define IMR_BCNDOK3 BIT(20) /* Beacon Queue DMA OK Interrupt 3 */ -+#define IMR_BCNDOK2 BIT(19) /* Beacon Queue DMA OK Interrupt 2 */ -+#define IMR_BCNDOK1 BIT(18) /* Beacon Queue DMA OK Interrupt 1 */ -+#define IMR_TIMEOUT2 BIT(17) /* Timeout interrupt 2 */ -+#define IMR_TIMEOUT1 BIT(16) /* Timeout interrupt 1 */ -+#define IMR_TXFOVW BIT(15) /* Transmit FIFO Overflow */ -+#define IMR_PSTIMEOUT BIT(14) /* Power save time out interrupt */ -+#define IMR_BcnInt BIT(13) /* Beacon DMA Interrupt 0 */ -+#define IMR_RXFOVW BIT(12) /* Receive FIFO Overflow */ -+#define IMR_RDU BIT(11) /* Receive Descriptor Unavailable */ -+#define IMR_ATIMEND BIT(10) /* For 92C, ATIM Window End Interrupt. For 8723 and later ICs, it also means P2P CTWin End interrupt. */ -+#define IMR_BDOK BIT(9) /* Beacon Queue DMA OK Interrupt */ -+#define IMR_HIGHDOK BIT(8) /* High Queue DMA OK Interrupt */ -+#define IMR_TBDOK BIT(7) /* Transmit Beacon OK interrupt */ -+#define IMR_MGNTDOK BIT(6) /* Management Queue DMA OK Interrupt */ -+#define IMR_TBDER BIT(5) /* For 92C, Transmit Beacon Error Interrupt */ -+#define IMR_BKDOK BIT(4) /* AC_BK DMA OK Interrupt */ -+#define IMR_BEDOK BIT(3) /* AC_BE DMA OK Interrupt */ -+#define IMR_VIDOK BIT(2) /* AC_VI DMA OK Interrupt */ -+#define IMR_VODOK BIT(1) /* AC_VO DMA Interrupt */ -+#define IMR_ROK BIT(0) /* Receive DMA OK Interrupt */ -+ -+/* 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) */ -+#define IMR_TSF_BIT32_TOGGLE BIT(15) -+#define IMR_BcnInt_E BIT(12) -+#define IMR_TXERR BIT(11) -+#define IMR_RXERR BIT(10) -+#define IMR_C2HCMD BIT(9) -+#define IMR_CPWM BIT(8) -+/* RSVD [2-7] */ -+#define IMR_OCPINT BIT(1) -+#define IMR_WLANOFF BIT(0) -+ -+/* ---------------------------------------------------------------------------- -+ * 8723E series PCIE Host IMR/ISR bit -+ * ---------------------------------------------------------------------------- */ -+/* IMR DW0 Bit 0-31 */ -+#define PHIMR_TIMEOUT2 BIT(31) -+#define PHIMR_TIMEOUT1 BIT(30) -+#define PHIMR_PSTIMEOUT BIT(29) -+#define PHIMR_GTINT4 BIT(28) -+#define PHIMR_GTINT3 BIT(27) -+#define PHIMR_TXBCNERR BIT(26) -+#define PHIMR_TXBCNOK BIT(25) -+#define PHIMR_TSF_BIT32_TOGGLE BIT(24) -+#define PHIMR_BCNDMAINT3 BIT(23) -+#define PHIMR_BCNDMAINT2 BIT(22) -+#define PHIMR_BCNDMAINT1 BIT(21) -+#define PHIMR_BCNDMAINT0 BIT(20) -+#define PHIMR_BCNDOK3 BIT(19) -+#define PHIMR_BCNDOK2 BIT(18) -+#define PHIMR_BCNDOK1 BIT(17) -+#define PHIMR_BCNDOK0 BIT(16) -+#define PHIMR_HSISR_IND_ON BIT(15) -+#define PHIMR_BCNDMAINT_E BIT(14) -+#define PHIMR_ATIMEND_E BIT(13) -+#define PHIMR_ATIM_CTW_END BIT(12) -+#define PHIMR_HISRE_IND BIT(11) /* RO. HISRE Indicator (HISRE & HIMRE is true, this bit is set to 1) */ -+#define PHIMR_C2HCMD BIT(10) -+#define PHIMR_CPWM2 BIT(9) -+#define PHIMR_CPWM BIT(8) -+#define PHIMR_HIGHDOK BIT(7) /* High Queue DMA OK Interrupt */ -+#define PHIMR_MGNTDOK BIT(6) /* Management Queue DMA OK Interrupt */ -+#define PHIMR_BKDOK BIT(5) /* AC_BK DMA OK Interrupt */ -+#define PHIMR_BEDOK BIT(4) /* AC_BE DMA OK Interrupt */ -+#define PHIMR_VIDOK BIT(3) /* AC_VI DMA OK Interrupt */ -+#define PHIMR_VODOK BIT(2) /* AC_VO DMA Interrupt */ -+#define PHIMR_RDU BIT(1) /* Receive Descriptor Unavailable */ -+#define PHIMR_ROK BIT(0) /* Receive DMA OK Interrupt */ -+ -+/* PCIE Host Interrupt Status Extension bit */ -+#define PHIMR_BCNDMAINT7 BIT(23) -+#define PHIMR_BCNDMAINT6 BIT(22) -+#define PHIMR_BCNDMAINT5 BIT(21) -+#define PHIMR_BCNDMAINT4 BIT(20) -+#define PHIMR_BCNDOK7 BIT(19) -+#define PHIMR_BCNDOK6 BIT(18) -+#define PHIMR_BCNDOK5 BIT(17) -+#define PHIMR_BCNDOK4 BIT(16) -+/* bit12 15: RSVD */ -+#define PHIMR_TXERR BIT(11) -+#define PHIMR_RXERR BIT(10) -+#define PHIMR_TXFOVW BIT(9) -+#define PHIMR_RXFOVW BIT(8) -+/* bit2-7: RSVD */ -+#define PHIMR_OCPINT BIT(1) -+/* bit0: RSVD */ -+ -+#define UHIMR_TIMEOUT2 BIT(31) -+#define UHIMR_TIMEOUT1 BIT(30) -+#define UHIMR_PSTIMEOUT BIT(29) -+#define UHIMR_GTINT4 BIT(28) -+#define UHIMR_GTINT3 BIT(27) -+#define UHIMR_TXBCNERR BIT(26) -+#define UHIMR_TXBCNOK BIT(25) -+#define UHIMR_TSF_BIT32_TOGGLE BIT(24) -+#define UHIMR_BCNDMAINT3 BIT(23) -+#define UHIMR_BCNDMAINT2 BIT(22) -+#define UHIMR_BCNDMAINT1 BIT(21) -+#define UHIMR_BCNDMAINT0 BIT(20) -+#define UHIMR_BCNDOK3 BIT(19) -+#define UHIMR_BCNDOK2 BIT(18) -+#define UHIMR_BCNDOK1 BIT(17) -+#define UHIMR_BCNDOK0 BIT(16) -+#define UHIMR_HSISR_IND BIT(15) -+#define UHIMR_BCNDMAINT_E BIT(14) -+/* RSVD BIT(13) */ -+#define UHIMR_CTW_END BIT(12) -+/* RSVD BIT(11) */ -+#define UHIMR_C2HCMD BIT(10) -+#define UHIMR_CPWM2 BIT(9) -+#define UHIMR_CPWM BIT(8) -+#define UHIMR_HIGHDOK BIT(7) /* High Queue DMA OK Interrupt */ -+#define UHIMR_MGNTDOK BIT(6) /* Management Queue DMA OK Interrupt */ -+#define UHIMR_BKDOK BIT(5) /* AC_BK DMA OK Interrupt */ -+#define UHIMR_BEDOK BIT(4) /* AC_BE DMA OK Interrupt */ -+#define UHIMR_VIDOK BIT(3) /* AC_VI DMA OK Interrupt */ -+#define UHIMR_VODOK BIT(2) /* AC_VO DMA Interrupt */ -+#define UHIMR_RDU BIT(1) /* Receive Descriptor Unavailable */ -+#define UHIMR_ROK BIT(0) /* Receive DMA OK Interrupt */ -+ -+/* USB Host Interrupt Status Extension bit */ -+#define UHIMR_BCNDMAINT7 BIT(23) -+#define UHIMR_BCNDMAINT6 BIT(22) -+#define UHIMR_BCNDMAINT5 BIT(21) -+#define UHIMR_BCNDMAINT4 BIT(20) -+#define UHIMR_BCNDOK7 BIT(19) -+#define UHIMR_BCNDOK6 BIT(18) -+#define UHIMR_BCNDOK5 BIT(17) -+#define UHIMR_BCNDOK4 BIT(16) -+/* bit14-15: RSVD */ -+#define UHIMR_ATIMEND_E BIT(13) -+#define UHIMR_ATIMEND BIT(12) -+#define UHIMR_TXERR BIT(11) -+#define UHIMR_RXERR BIT(10) -+#define UHIMR_TXFOVW BIT(9) -+#define UHIMR_RXFOVW BIT(8) -+/* bit2-7: RSVD */ -+#define UHIMR_OCPINT BIT(1) -+/* bit0: RSVD */ -+ -+ -+#define HAL_NIC_UNPLUG_ISR 0xFFFFFFFF /* The value when the NIC is unplugged for PCI. */ -+#define HAL_NIC_UNPLUG_PCI_ISR 0xEAEAEAEA /* The value when the NIC is unplugged for PCI in PCI interrupt (page 3). */ -+ -+/* ---------------------------------------------------------------------------- -+ * 8188 IMR/ISR bits -+ * ---------------------------------------------------------------------------- */ -+#define IMR_DISABLED_88E 0x0 -+/* IMR DW0(0x0060-0063) Bit 0-31 */ -+#define IMR_TXCCK_88E BIT(30) /* TXRPT interrupt when CCX bit of the packet is set */ -+#define IMR_PSTIMEOUT_88E BIT(29) /* Power Save Time Out Interrupt */ -+#define IMR_GTINT4_88E BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -+#define IMR_GTINT3_88E BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -+#define IMR_TBDER_88E BIT(26) /* Transmit Beacon0 Error */ -+#define IMR_TBDOK_88E BIT(25) /* Transmit Beacon0 OK */ -+#define IMR_TSF_BIT32_TOGGLE_88E BIT(24) /* TSF Timer BIT32 toggle indication interrupt */ -+#define IMR_BCNDMAINT0_88E BIT(20) /* Beacon DMA Interrupt 0 */ -+#define IMR_BCNDERR0_88E BIT(16) /* Beacon Queue DMA Error 0 */ -+#define IMR_HSISR_IND_ON_INT_88E BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -+#define IMR_BCNDMAINT_E_88E BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -+#define IMR_ATIMEND_88E BIT(12) /* CTWidnow End or ATIM Window End */ -+#define IMR_HISR1_IND_INT_88E BIT(11) /* HISR1 Indicator (HISR1 & HIMR1 is true, this bit is set to 1) */ -+#define IMR_C2HCMD_88E BIT(10) /* CPU to Host Command INT Status, Write 1 clear */ -+#define IMR_CPWM2_88E BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_CPWM_88E BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_HIGHDOK_88E BIT(7) /* High Queue DMA OK */ -+#define IMR_MGNTDOK_88E BIT(6) /* Management Queue DMA OK */ -+#define IMR_BKDOK_88E BIT(5) /* AC_BK DMA OK */ -+#define IMR_BEDOK_88E BIT(4) /* AC_BE DMA OK */ -+#define IMR_VIDOK_88E BIT(3) /* AC_VI DMA OK */ -+#define IMR_VODOK_88E BIT(2) /* AC_VO DMA OK */ -+#define IMR_RDU_88E BIT(1) /* Rx Descriptor Unavailable */ -+#define IMR_ROK_88E BIT(0) /* Receive DMA OK */ -+ -+/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -+#define IMR_BCNDMAINT7_88E BIT(27) /* Beacon DMA Interrupt 7 */ -+#define IMR_BCNDMAINT6_88E BIT(26) /* Beacon DMA Interrupt 6 */ -+#define IMR_BCNDMAINT5_88E BIT(25) /* Beacon DMA Interrupt 5 */ -+#define IMR_BCNDMAINT4_88E BIT(24) /* Beacon DMA Interrupt 4 */ -+#define IMR_BCNDMAINT3_88E BIT(23) /* Beacon DMA Interrupt 3 */ -+#define IMR_BCNDMAINT2_88E BIT(22) /* Beacon DMA Interrupt 2 */ -+#define IMR_BCNDMAINT1_88E BIT(21) /* Beacon DMA Interrupt 1 */ -+#define IMR_BCNDOK7_88E BIT(20) /* Beacon Queue DMA OK Interrupt 7 */ -+#define IMR_BCNDOK6_88E BIT(19) /* Beacon Queue DMA OK Interrupt 6 */ -+#define IMR_BCNDOK5_88E BIT(18) /* Beacon Queue DMA OK Interrupt 5 */ -+#define IMR_BCNDOK4_88E BIT(17) /* Beacon Queue DMA OK Interrupt 4 */ -+#define IMR_BCNDOK3_88E BIT(16) /* Beacon Queue DMA OK Interrupt 3 */ -+#define IMR_BCNDOK2_88E BIT(15) /* Beacon Queue DMA OK Interrupt 2 */ -+#define IMR_BCNDOK1_88E BIT(14) /* Beacon Queue DMA OK Interrupt 1 */ -+#define IMR_ATIMEND_E_88E BIT(13) /* ATIM Window End Extension for Win7 */ -+#define IMR_TXERR_88E BIT(11) /* Tx Error Flag Interrupt Status, write 1 clear. */ -+#define IMR_RXERR_88E BIT(10) /* Rx Error Flag INT Status, Write 1 clear */ -+#define IMR_TXFOVW_88E BIT(9) /* Transmit FIFO Overflow */ -+#define IMR_RXFOVW_88E BIT(8) /* Receive FIFO Overflow */ -+ -+/*=================================================================== -+===================================================================== -+Here the register defines are for 92C. When the define is as same with 92C, -+we will use the 92C's define for the consistency -+So the following defines for 92C is not entire!!!!!! -+===================================================================== -+=====================================================================*/ -+/* -+Based on Datasheet V33---090401 -+Register Summary -+Current IOREG MAP -+0x0000h ~ 0x00FFh System Configuration (256 Bytes) -+0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) -+0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) -+0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) -+0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) -+0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) -+0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) -+0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) -+0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) -+*/ -+/* ---------------------------------------------------------------------------- */ -+/* 8192C (TXPAUSE) transmission pause (Offset 0x522, 8 bits) */ -+/* ---------------------------------------------------------------------------- */ -+/* Note: -+* The the bits of stoping AC(VO/VI/BE/BK) queue in datasheet RTL8192S/RTL8192C are wrong, -+* the correct arragement is VO - Bit0, VI - Bit1, BE - Bit2, and BK - Bit3. -+* 8723 and 88E may be not correct either in the eralier version. Confirmed with DD Tim. -+* By Bruce, 2011-09-22. */ -+#define StopBecon BIT(6) -+#define StopHigh BIT(5) -+#define StopMgt BIT(4) -+#define StopBK BIT(3) -+#define StopBE BIT(2) -+#define StopVI BIT(1) -+#define StopVO BIT(0) -+ -+/* ---------------------------------------------------------------------------- -+ * 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) -+ * ---------------------------------------------------------------------------- */ -+#define RCR_APPFCS BIT(31) /* WMAC append FCS after pauload */ -+#define RCR_APP_MIC BIT(30) /* MACRX will retain the MIC at the bottom of the packet. */ -+#define RCR_APP_ICV BIT(29) /* MACRX will retain the ICV at the bottom of the packet. */ -+#define RCR_APP_PHYST_RXFF BIT(28) /* PHY Status is appended before RX packet in RXFF */ -+#define RCR_APP_BA_SSN BIT(27) /* SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. */ -+#define RCR_VHT_DACK BIT(26) /* This bit to control response type for vht single mpdu data packet. 1. ACK as response 0. BA as response */ -+#define RCR_TCPOFLD_EN BIT(25) /* Enable TCP checksum offload */ -+#define RCR_ENMBID BIT(24) /* Enable Multiple BssId. Only response ACK to the packets whose DID(A1) matching to the addresses in the MBSSID CAM Entries. */ -+#define RCR_LSIGEN BIT(23) /* Enable LSIG TXOP Protection function. Search KEYCAM for each rx packet to check if LSIGEN bit is set. */ -+#define RCR_MFBEN BIT(22) /* Enable immediate MCS Feedback function. When Rx packet with MRQ = 1'b1, then search KEYCAM to find sender's MCS Feedback function and send response. */ -+#define RCR_DISCHKPPDLLEN BIT(21) /* Do not check PPDU while the PPDU length is smaller than 14 byte. */ -+#define RCR_PKTCTL_DLEN BIT(20) /* While rx path dead lock occurs, reset rx path */ -+#define RCR_DISGCLK BIT(19) /* Disable macrx clock gating control (no used) */ -+#define RCR_TIM_PARSER_EN BIT(18) /* RX Beacon TIM Parser. */ -+#define RCR_BC_MD_EN BIT(17) /* Broadcast data packet more data bit check interrupt enable.*/ -+#define RCR_UC_MD_EN BIT(16) /* Unicast data packet more data bit check interrupt enable. */ -+#define RCR_RXSK_PERPKT BIT(15) /* Executing key search per MPDU */ -+#define RCR_HTC_LOC_CTRL BIT(14) /* MFC<--HTC = 1 MFC-->HTC = 0 */ -+#define RCR_AMF BIT(13) /* Accept management type frame */ -+#define RCR_ACF BIT(12) /* Accept control type frame. Control frames BA, BAR, and PS-Poll (when in AP mode) are not controlled by this bit. They are controlled by ADF. */ -+#define RCR_ADF BIT(11) /* Accept data type frame. This bit also regulates BA, BAR, and PS-Poll (AP mode only). */ -+#define RCR_DISDECMYPKT BIT(10) /* This bit determines whether hw need to do decryption.1: If A1 match, do decryption.0: Do decryption. */ -+#define RCR_AICV BIT(9) /* Accept ICV error packet */ -+#define RCR_ACRC32 BIT(8) /* Accept CRC32 error packet */ -+#define RCR_CBSSID_BCN BIT(7) /* Accept BSSID match packet (Rx beacon, probe rsp) */ -+#define RCR_CBSSID_DATA BIT(6) /* Accept BSSID match packet (Data) */ -+#define RCR_APWRMGT BIT(5) /* Accept power management packet */ -+#define RCR_ADD3 BIT(4) /* Accept address 3 match packet */ -+#define RCR_AB BIT(3) /* Accept broadcast packet */ -+#define RCR_AM BIT(2) /* Accept multicast packet */ -+#define RCR_APM BIT(1) /* Accept physical match packet */ -+#define RCR_AAP BIT(0) /* Accept all unicast packet */ -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0000h ~ 0x00FFh System Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* 2 SYS_ISO_CTRL */ -+#define ISO_MD2PP BIT(0) -+#define ISO_UA2USB BIT(1) -+#define ISO_UD2CORE BIT(2) -+#define ISO_PA2PCIE BIT(3) -+#define ISO_PD2CORE BIT(4) -+#define ISO_IP2MAC BIT(5) -+#define ISO_DIOP BIT(6) -+#define ISO_DIOE BIT(7) -+#define ISO_EB2CORE BIT(8) -+#define ISO_DIOR BIT(9) -+#define PWC_EV12V BIT(15) -+ -+ -+/* 2 SYS_FUNC_EN */ -+#define FEN_BBRSTB BIT(0) -+#define FEN_BB_GLB_RSTn BIT(1) -+#define FEN_USBA BIT(2) -+#define FEN_UPLL BIT(3) -+#define FEN_USBD BIT(4) -+#define FEN_DIO_PCIE BIT(5) -+#define FEN_PCIEA BIT(6) -+#define FEN_PPLL BIT(7) -+#define FEN_PCIED BIT(8) -+#define FEN_DIOE BIT(9) -+#define FEN_CPUEN BIT(10) -+#define FEN_DCORE BIT(11) -+#define FEN_ELDR BIT(12) -+#define FEN_EN_25_1 BIT(13) -+#define FEN_HWPDN BIT(14) -+#define FEN_MREGEN BIT(15) -+ -+/* 2 APS_FSMCO */ -+#define PFM_LDALL BIT(0) -+#define PFM_ALDN BIT(1) -+#define PFM_LDKP BIT(2) -+#define PFM_WOWL BIT(3) -+#define EnPDN BIT(4) -+#define PDN_PL BIT(5) -+#define APFM_ONMAC BIT(8) -+#define APFM_OFF BIT(9) -+#define APFM_RSM BIT(10) -+#define AFSM_HSUS BIT(11) -+#define AFSM_PCIE BIT(12) -+#define APDM_MAC BIT(13) -+#define APDM_HOST BIT(14) -+#define APDM_HPDN BIT(15) -+#define RDY_MACON BIT(16) -+#define SUS_HOST BIT(17) -+#define ROP_ALD BIT(20) -+#define ROP_PWR BIT(21) -+#define ROP_SPS BIT(22) -+#define SOP_MRST BIT(25) -+#define SOP_FUSE BIT(26) -+#define SOP_ABG BIT(27) -+#define SOP_AMB BIT(28) -+#define SOP_RCK BIT(29) -+#define SOP_A8M BIT(30) -+#define XOP_BTCK BIT(31) -+ -+/* 2 SYS_CLKR */ -+#define ANAD16V_EN BIT(0) -+#define ANA8M BIT(1) -+#define MACSLP BIT(4) -+#define LOADER_CLK_EN BIT(5) -+ -+ -+/* 2 9346CR /REG_SYS_EEPROM_CTRL */ -+#define BOOT_FROM_EEPROM BIT(4) -+#define EEPROMSEL BIT(4) -+#define EEPROM_EN BIT(5) -+ -+ -+/* 2 RF_CTRL */ -+#define RF_EN BIT(0) -+#define RF_RSTB BIT(1) -+#define RF_SDMRSTB BIT(2) -+ -+ -+/* 2 LDOV12D_CTRL */ -+#define LDV12_EN BIT(0) -+#define LDV12_SDBY BIT(1) -+#define LPLDO_HSM BIT(2) -+#define LPLDO_LSM_DIS BIT(3) -+#define _LDV12_VADJ(x) (((x) & 0xF) << 4) -+ -+ -+ -+/* 2 EFUSE_TEST (For RTL8723 partially) */ -+#define EF_TRPT BIT(7) -+#define EF_CELL_SEL (BIT(8) | BIT(9)) /* 00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2 */ -+#define LDOE25_EN BIT(31) -+#define EFUSE_SEL(x) (((x) & 0x3) << 8) -+#define EFUSE_SEL_MASK 0x300 -+#define EFUSE_WIFI_SEL_0 0x0 -+#define EFUSE_BT_SEL_0 0x1 -+#define EFUSE_BT_SEL_1 0x2 -+#define EFUSE_BT_SEL_2 0x3 -+ -+/* 2 REG_GPIO_INTM (Offset 0x0048) */ -+#define BIT_EXTWOL_EN BIT(16) -+ -+/* 2 REG_LED_CFG (Offset 0x004C) */ -+#define BIT_SW_SPDT_SEL BIT(22) -+ -+/* 2 REG_SW_GPIO_SHARE_CTRL_0 (Offset 0x1038) */ -+#define BIT_BTGP_WAKE_LOC (BIT(10) | BIT(11)) -+#define BIT_SW_GPIO_FUNC BIT(0) -+ -+/* 2 REG_SW_GPIO_SHARE_CTRL_1 (Offset 0x103C) */ -+#define BIT_WLMAC_DBG_LOC (BIT(9) | BIT(10)) -+#define BIT_WL_GPIO_SEL (BIT(30) | BIT(31)) -+ -+/* 2 8051FWDL -+ * 2 MCUFWDL */ -+#define MCUFWDL_EN BIT(0) -+#define MCUFWDL_RDY BIT(1) -+#define FWDL_ChkSum_rpt BIT(2) -+#define MACINI_RDY BIT(3) -+#define BBINI_RDY BIT(4) -+#define RFINI_RDY BIT(5) -+#define WINTINI_RDY BIT(6) -+#define RAM_DL_SEL BIT(7) -+#define CPU_DL_READY BIT(15) /* add flag by gw for fw download ready 20130826 */ -+#define ROM_DLEN BIT(19) -+#define CPRST BIT(23) -+ -+ -+/* 2 REG_SYS_CFG */ -+#define XCLK_VLD BIT(0) -+#define ACLK_VLD BIT(1) -+#define UCLK_VLD BIT(2) -+#define PCLK_VLD BIT(3) -+#define PCIRSTB BIT(4) -+#define V15_VLD BIT(5) -+#define SW_OFFLOAD_EN BIT(7) -+#define SIC_IDLE BIT(8) -+#define BD_MAC2 BIT(9) -+#define BD_MAC1 BIT(10) -+#define IC_MACPHY_MODE BIT(11) -+#define CHIP_VER (BIT(12) | BIT(13) | BIT(14) | BIT(15)) -+#define BT_FUNC BIT(16) -+#define VENDOR_ID BIT(19) -+#define EXT_VENDOR_ID (BIT(18) | BIT(19)) /* Currently only for RTL8723B */ -+#define PAD_HWPD_IDN BIT(22) -+#define TRP_VAUX_EN BIT(23) /* RTL ID */ -+#define TRP_BT_EN BIT(24) -+#define BD_PKG_SEL BIT(25) -+#define BD_HCI_SEL BIT(26) -+#define TYPE_ID BIT(27) -+#define RF_TYPE_ID BIT(27) -+ -+#define RTL_ID BIT(23) /* TestChip ID, 1:Test(RLE); 0:MP(RL) */ -+#define SPS_SEL BIT(24) /* 1:LDO regulator mode; 0:Switching regulator mode */ -+ -+ -+#define CHIP_VER_RTL_MASK 0xF000 /* Bit 12 ~ 15 */ -+#define CHIP_VER_RTL_SHIFT 12 -+#define EXT_VENDOR_ID_SHIFT 18 -+ -+/* 2 REG_GPIO_OUTSTS (For RTL8723 only) */ -+#define EFS_HCI_SEL (BIT(0) | BIT(1)) -+#define PAD_HCI_SEL (BIT(2) | BIT(3)) -+#define HCI_SEL (BIT(4) | BIT(5)) -+#define PKG_SEL_HCI BIT(6) -+#define FEN_GPS BIT(7) -+#define FEN_BT BIT(8) -+#define FEN_WL BIT(9) -+#define FEN_PCI BIT(10) -+#define FEN_USB BIT(11) -+#define BTRF_HWPDN_N BIT(12) -+#define WLRF_HWPDN_N BIT(13) -+#define PDN_BT_N BIT(14) -+#define PDN_GPS_N BIT(15) -+#define BT_CTL_HWPDN BIT(16) -+#define GPS_CTL_HWPDN BIT(17) -+#define PPHY_SUSB BIT(20) -+#define UPHY_SUSB BIT(21) -+#define PCI_SUSEN BIT(22) -+#define USB_SUSEN BIT(23) -+#define RF_RL_ID (BIT(31) | BIT(30) | BIT(29) | BIT(28)) -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* 2 Function Enable Registers -+ * 2 CR */ -+#define HCI_TXDMA_EN BIT(0) -+#define HCI_RXDMA_EN BIT(1) -+#define TXDMA_EN BIT(2) -+#define RXDMA_EN BIT(3) -+#define PROTOCOL_EN BIT(4) -+#define SCHEDULE_EN BIT(5) -+#define MACTXEN BIT(6) -+#define MACRXEN BIT(7) -+#define ENSWBCN BIT(8) -+#define ENSEC BIT(9) -+#define CALTMR_EN BIT(10) /* 32k CAL TMR enable */ -+ -+/* Network type */ -+#define _NETTYPE(x) (((x) & 0x3) << 16) -+#define MASK_NETTYPE 0x30000 -+#define NT_NO_LINK 0x0 -+#define NT_LINK_AD_HOC 0x1 -+#define NT_LINK_AP 0x2 -+#define NT_AS_AP 0x3 -+ -+/* 2 PBP - Page Size Register */ -+#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) -+#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) -+#define _PSRX_MASK 0xF -+#define _PSTX_MASK 0xF0 -+#define _PSRX(x) (x) -+#define _PSTX(x) ((x) << 4) -+ -+#define PBP_64 0x0 -+#define PBP_128 0x1 -+#define PBP_256 0x2 -+#define PBP_512 0x3 -+#define PBP_1024 0x4 -+ -+ -+/* 2 TX/RXDMA */ -+#define RXDMA_ARBBW_EN BIT(0) -+#define RXSHFT_EN BIT(1) -+#define RXDMA_AGG_EN BIT(2) -+#define QS_VO_QUEUE BIT(8) -+#define QS_VI_QUEUE BIT(9) -+#define QS_BE_QUEUE BIT(10) -+#define QS_BK_QUEUE BIT(11) -+#define QS_MANAGER_QUEUE BIT(12) -+#define QS_HIGH_QUEUE BIT(13) -+ -+#define HQSEL_VOQ BIT(0) -+#define HQSEL_VIQ BIT(1) -+#define HQSEL_BEQ BIT(2) -+#define HQSEL_BKQ BIT(3) -+#define HQSEL_MGTQ BIT(4) -+#define HQSEL_HIQ BIT(5) -+ -+/* For normal driver, 0x10C */ -+#define _TXDMA_CMQ_MAP(x) (((x) & 0x3) << 16) -+#define _TXDMA_HIQ_MAP(x) (((x) & 0x3) << 14) -+#define _TXDMA_MGQ_MAP(x) (((x) & 0x3) << 12) -+#define _TXDMA_BKQ_MAP(x) (((x) & 0x3) << 10) -+#define _TXDMA_BEQ_MAP(x) (((x) & 0x3) << 8) -+#define _TXDMA_VIQ_MAP(x) (((x) & 0x3) << 6) -+#define _TXDMA_VOQ_MAP(x) (((x) & 0x3) << 4) -+ -+#define QUEUE_EXTRA 0 -+#define QUEUE_LOW 1 -+#define QUEUE_NORMAL 2 -+#define QUEUE_HIGH 3 -+#define QUEUE_EXTRA_1 4 -+#define QUEUE_EXTRA_2 5 -+ -+/* 2 TRXFF_BNDY */ -+ -+ -+/* 2 LLT_INIT */ -+#define _LLT_NO_ACTIVE 0x0 -+#define _LLT_WRITE_ACCESS 0x1 -+#define _LLT_READ_ACCESS 0x2 -+ -+#define _LLT_INIT_DATA(x) ((x) & 0xFF) -+#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) -+#define _LLT_OP(x) (((x) & 0x3) << 30) -+#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+/* 2 RQPN */ -+#define _HPQ(x) ((x) & 0xFF) -+#define _LPQ(x) (((x) & 0xFF) << 8) -+#define _PUBQ(x) (((x) & 0xFF) << 16) -+#define _NPQ(x) ((x) & 0xFF) /* NOTE: in RQPN_NPQ register */ -+#define _EPQ(x) (((x) & 0xFF) << 16) /* NOTE: in RQPN_EPQ register */ -+ -+ -+#define HPQ_PUBLIC_DIS BIT(24) -+#define LPQ_PUBLIC_DIS BIT(25) -+#define LD_RQPN BIT(31) -+ -+ -+/* 2 TDECTL */ -+#define BLK_DESC_NUM_SHIFT 4 -+#define BLK_DESC_NUM_MASK 0xF -+ -+ -+/* 2 TXDMA_OFFSET_CHK */ -+#define DROP_DATA_EN BIT(9) -+ -+/* 2 AUTO_LLT */ -+#define BIT_SHIFT_TXPKTNUM 24 -+#define BIT_MASK_TXPKTNUM 0xff -+#define BIT_TXPKTNUM(x) (((x) & BIT_MASK_TXPKTNUM) << BIT_SHIFT_TXPKTNUM) -+ -+#define BIT_TDE_DBG_SEL BIT(23) -+#define BIT_AUTO_INIT_LLT BIT(16) -+ -+#define BIT_SHIFT_Tx_OQT_free_space 8 -+#define BIT_MASK_Tx_OQT_free_space 0xff -+#define BIT_Tx_OQT_free_space(x) (((x) & BIT_MASK_Tx_OQT_free_space) << BIT_SHIFT_Tx_OQT_free_space) -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0120h ~ 0x0123h RX DMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define BIT_FS_RXDONE_INT_EN BIT(16) -+ -+ -+/* REG_RXPKT_NUM (Offset 0x0284) */ -+#define BIT_RW_RELEASE_EN BIT(18) -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x028Bh RX DMA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* 2 REG_RXDMA_CONTROL, 0x0286h -+ * Write only. When this bit is set, RXDMA will decrease RX PKT counter by one. Before -+ * this bit is polled, FW shall update RXFF_RD_PTR first. This register is write pulse and auto clear. -+ * #define RXPKT_RELEASE_POLL BIT(0) -+ * Read only. When RXMA finishes on-going DMA operation, RXMDA will report idle state in -+ * this bit. FW can start releasing packets after RXDMA entering idle mode. -+ * #define RXDMA_IDLE BIT(1) -+ * When this bit is set, RXDMA will enter this mode after on-going RXDMA packet to host -+ * completed, and stop DMA packet to host. RXDMA will then report Default: 0; -+ * #define RW_RELEASE_EN BIT(2) */ -+ -+/* 2 REG_RXPKT_NUM, 0x0284 */ -+#define RXPKT_RELEASE_POLL BIT(16) -+#define RXDMA_IDLE BIT(17) -+#define RW_RELEASE_EN BIT(18) -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+/* 2 FWHW_TXQ_CTRL */ -+#define EN_AMPDU_RTY_NEW BIT(7) -+ -+ -+/* 2 SPEC SIFS */ -+#define _SPEC_SIFS_CCK(x) ((x) & 0xFF) -+#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) -+ -+/* 2 RL */ -+#define BIT_SHIFT_SRL 8 -+#define BIT_MASK_SRL 0x3f -+#define BIT_SRL(x) (((x) & BIT_MASK_SRL) << BIT_SHIFT_SRL) -+ -+#define BIT_SHIFT_LRL 0 -+#define BIT_MASK_LRL 0x3f -+#define BIT_LRL(x) (((x) & BIT_MASK_LRL) << BIT_SHIFT_LRL) -+ -+#define RL_VAL_AP 7 -+#ifdef CONFIG_RTW_CUSTOMIZE_RLSTA -+#define RL_VAL_STA CONFIG_RTW_CUSTOMIZE_RLSTA -+#else -+#define RL_VAL_STA 0x30 -+#endif -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* 2 EDCA setting */ -+#define AC_PARAM_TXOP_LIMIT_OFFSET 16 -+#define AC_PARAM_ECW_MAX_OFFSET 12 -+#define AC_PARAM_ECW_MIN_OFFSET 8 -+#define AC_PARAM_AIFS_OFFSET 0 -+ -+/* 2 BCN_CTRL */ -+#define EN_TXBCN_RPT BIT(2) -+#define EN_BCN_FUNCTION BIT(3) -+#define STOP_BCNQ BIT(6) -+#define DIS_RX_BSSID_FIT BIT(6) -+ -+#define DIS_ATIM BIT(0) -+#define DIS_BCNQ_SUB BIT(1) -+#define DIS_TSF_UDT BIT(4) -+ -+/* 2 ACMHWCTRL */ -+#define AcmHw_HwEn BIT(0) -+#define AcmHw_VoqEn BIT(1) -+#define AcmHw_ViqEn BIT(2) -+#define AcmHw_BeqEn BIT(3) -+#define AcmHw_VoqStatus BIT(5) -+#define AcmHw_ViqStatus BIT(6) -+#define AcmHw_BeqStatus BIT(7) -+ -+/* 2 */ /* REG_DUAL_TSF_RST (0x553) */ -+#define DUAL_TSF_RST_P2P BIT(4) -+ -+/* 2 */ /* REG_NOA_DESC_SEL (0x5CF) */ -+#define NOA_DESC_SEL_0 0 -+#define NOA_DESC_SEL_1 BIT(4) -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* 2 APSD_CTRL */ -+#define APSDOFF BIT(6) -+ -+/* 2 TCR */ -+#define TSFRST BIT(0) -+#define DIS_GCLK BIT(1) -+#define PAD_SEL BIT(2) -+#define PWR_ST BIT(6) -+#define PWRBIT_OW_EN BIT(7) -+#define ACRC BIT(8) -+#define CFENDFORM BIT(9) -+#define ICV BIT(10) -+ -+ -+/* 2 RCR */ -+#define AAP BIT(0) -+#define APM BIT(1) -+#define AM BIT(2) -+#define AB BIT(3) -+#define ADD3 BIT(4) -+#define APWRMGT BIT(5) -+#define CBSSID BIT(6) -+#define CBSSID_DATA BIT(6) -+#define CBSSID_BCN BIT(7) -+#define ACRC32 BIT(8) -+#define AICV BIT(9) -+#define ADF BIT(11) -+#define ACF BIT(12) -+#define AMF BIT(13) -+#define HTC_LOC_CTRL BIT(14) -+#define UC_DATA_EN BIT(16) -+#define BM_DATA_EN BIT(17) -+#define MFBEN BIT(22) -+#define LSIGEN BIT(23) -+#define EnMBID BIT(24) -+#define FORCEACK BIT(26) -+#define APP_BASSN BIT(27) -+#define APP_PHYSTS BIT(28) -+#define APP_ICV BIT(29) -+#define APP_MIC BIT(30) -+#define APP_FCS BIT(31) -+ -+ -+/* 2 SECCFG */ -+#define SCR_TxUseDK BIT(0) /* Force Tx Use Default Key */ -+#define SCR_RxUseDK BIT(1) /* Force Rx Use Default Key */ -+#define SCR_TxEncEnable BIT(2) /* Enable Tx Encryption */ -+#define SCR_RxDecEnable BIT(3) /* Enable Rx Decryption */ -+#define SCR_SKByA2 BIT(4) /* Search kEY BY A2 */ -+#define SCR_NoSKMC BIT(5) /* No Key Search Multicast */ -+#define SCR_TXBCUSEDK BIT(6) /* Force Tx Broadcast packets Use Default Key */ -+#define SCR_RXBCUSEDK BIT(7) /* Force Rx Broadcast packets Use Default Key */ -+#define SCR_CHK_KEYID BIT(8) -+#define SCR_CHK_BMC BIT(9) /* add option to support a2+keyid+bcm */ -+ -+/*REG_MBIDCAMCFG (Offset 0x0628/0x62C)*/ -+#define BIT_MBIDCAM_POLL BIT(31) -+#define BIT_MBIDCAM_WT_EN BIT(30) -+ -+#define MBIDCAM_ADDR_MASK 0x1F -+#define MBIDCAM_ADDR_SHIFT 24 -+ -+#define BIT_MBIDCAM_VALID BIT(23) -+#define BIT_LSIC_TXOP_EN BIT(17) -+#define BIT_CTS_EN BIT(16) -+ -+/*REG_RXFLTMAP1 (Offset 0x6A2)*/ -+#define BIT_CTRLFLT10EN BIT(10) /*PS-POLL*/ -+ -+/*REG_WLAN_ACT_MASK_CTRL_1 (Offset 0x76C)*/ -+#define EN_PORT_0_FUNCTION BIT(12) -+#define EN_PORT_1_FUNCTION BIT(13) -+ -+/* ----------------------------------------------------- -+ * -+ * SDIO Bus Specification -+ * -+ * ----------------------------------------------------- */ -+ -+/* I/O bus domain address mapping */ -+#define SDIO_LOCAL_BASE 0x10250000 -+#define WLAN_IOREG_BASE 0x10260000 -+#define FIRMWARE_FIFO_BASE 0x10270000 -+#define TX_HIQ_BASE 0x10310000 -+#define TX_MIQ_BASE 0x10320000 -+#define TX_LOQ_BASE 0x10330000 -+#define TX_EPQ_BASE 0x10350000 -+#define RX_RX0FF_BASE 0x10340000 -+ -+/* SDIO host local register space mapping. */ -+#define SDIO_LOCAL_MSK 0x0FFF -+#define WLAN_IOREG_MSK 0x7FFF -+#define WLAN_FIFO_MSK 0x1FFF /* Aggregation Length[12:0] */ -+#define WLAN_RX0FF_MSK 0x0003 -+ -+#define SDIO_WITHOUT_REF_DEVICE_ID 0 /* Without reference to the SDIO Device ID */ -+#define SDIO_LOCAL_DEVICE_ID 0 /* 0b[16], 000b[15:13] */ -+#define WLAN_TX_HIQ_DEVICE_ID 4 /* 0b[16], 100b[15:13] */ -+#define WLAN_TX_MIQ_DEVICE_ID 5 /* 0b[16], 101b[15:13] */ -+#define WLAN_TX_LOQ_DEVICE_ID 6 /* 0b[16], 110b[15:13] */ -+#define WLAN_TX_EXQ_DEVICE_ID 3 /* 0b[16], 011b[15:13] */ -+#define WLAN_RX0FF_DEVICE_ID 7 /* 0b[16], 111b[15:13] */ -+#define WLAN_IOREG_DEVICE_ID 8 /* 1b[16] */ -+ -+/* SDIO Tx Free Page Index */ -+#define HI_QUEUE_IDX 0 -+#define MID_QUEUE_IDX 1 -+#define LOW_QUEUE_IDX 2 -+#define PUBLIC_QUEUE_IDX 3 -+ -+#define SDIO_MAX_TX_QUEUE 3 /* HIQ, MIQ and LOQ */ -+#define SDIO_MAX_RX_QUEUE 1 -+ -+#define SDIO_REG_TX_CTRL 0x0000 /* SDIO Tx Control */ -+#define SDIO_REG_TIMEOUT 0x0002/*SDIO status timeout*/ -+#define SDIO_REG_HIMR 0x0014 /* SDIO Host Interrupt Mask */ -+#define SDIO_REG_HISR 0x0018 /* SDIO Host Interrupt Service Routine */ -+#define SDIO_REG_HCPWM 0x0019 /* HCI Current Power Mode */ -+#define SDIO_REG_RX0_REQ_LEN 0x001C /* RXDMA Request Length */ -+#define SDIO_REG_OQT_FREE_PG 0x001E /* OQT Free Page */ -+#define SDIO_REG_FREE_TXPG 0x0020 /* Free Tx Buffer Page */ -+#define SDIO_REG_HCPWM1 0x0024 /* HCI Current Power Mode 1 */ -+#define SDIO_REG_HCPWM2 0x0026 /* HCI Current Power Mode 2 */ -+#define SDIO_REG_FREE_TXPG_SEQ 0x0028 /* Free Tx Page Sequence */ -+#define SDIO_REG_HTSFR_INFO 0x0030 /* HTSF Informaion */ -+#define SDIO_REG_HRPWM1 0x0080 /* HCI Request Power Mode 1 */ -+#define SDIO_REG_HRPWM2 0x0082 /* HCI Request Power Mode 2 */ -+#define SDIO_REG_HPS_CLKR 0x0084 /* HCI Power Save Clock */ -+#define SDIO_REG_HSUS_CTRL 0x0086 /* SDIO HCI Suspend Control */ -+#define SDIO_REG_HIMR_ON 0x0090 /* SDIO Host Extension Interrupt Mask Always */ -+#define SDIO_REG_HISR_ON 0x0091 /* SDIO Host Extension Interrupt Status Always */ -+ -+#define SDIO_HIMR_DISABLED 0 -+ -+/* RTL8723/RTL8188E SDIO Host Interrupt Mask Register */ -+#define SDIO_HIMR_RX_REQUEST_MSK BIT(0) -+#define SDIO_HIMR_AVAL_MSK BIT(1) -+#define SDIO_HIMR_TXERR_MSK BIT(2) -+#define SDIO_HIMR_RXERR_MSK BIT(3) -+#define SDIO_HIMR_TXFOVW_MSK BIT(4) -+#define SDIO_HIMR_RXFOVW_MSK BIT(5) -+#define SDIO_HIMR_TXBCNOK_MSK BIT(6) -+#define SDIO_HIMR_TXBCNERR_MSK BIT(7) -+#define SDIO_HIMR_BCNERLY_INT_MSK BIT(16) -+#define SDIO_HIMR_C2HCMD_MSK BIT(17) -+#define SDIO_HIMR_CPWM1_MSK BIT(18) -+#define SDIO_HIMR_CPWM2_MSK BIT(19) -+#define SDIO_HIMR_HSISR_IND_MSK BIT(20) -+#define SDIO_HIMR_GTINT3_IND_MSK BIT(21) -+#define SDIO_HIMR_GTINT4_IND_MSK BIT(22) -+#define SDIO_HIMR_PSTIMEOUT_MSK BIT(23) -+#define SDIO_HIMR_OCPINT_MSK BIT(24) -+#define SDIO_HIMR_ATIMEND_MSK BIT(25) -+#define SDIO_HIMR_ATIMEND_E_MSK BIT(26) -+#define SDIO_HIMR_CTWEND_MSK BIT(27) -+ -+/* RTL8188E SDIO Specific */ -+#define SDIO_HIMR_MCU_ERR_MSK BIT(28) -+#define SDIO_HIMR_TSF_BIT32_TOGGLE_MSK BIT(29) -+ -+/* SDIO Host Interrupt Service Routine */ -+#define SDIO_HISR_RX_REQUEST BIT(0) -+#define SDIO_HISR_AVAL BIT(1) -+#define SDIO_HISR_TXERR BIT(2) -+#define SDIO_HISR_RXERR BIT(3) -+#define SDIO_HISR_TXFOVW BIT(4) -+#define SDIO_HISR_RXFOVW BIT(5) -+#define SDIO_HISR_TXBCNOK BIT(6) -+#define SDIO_HISR_TXBCNERR BIT(7) -+#define SDIO_HISR_BCNERLY_INT BIT(16) -+#define SDIO_HISR_C2HCMD BIT(17) -+#define SDIO_HISR_CPWM1 BIT(18) -+#define SDIO_HISR_CPWM2 BIT(19) -+#define SDIO_HISR_HSISR_IND BIT(20) -+#define SDIO_HISR_GTINT3_IND BIT(21) -+#define SDIO_HISR_GTINT4_IND BIT(22) -+#define SDIO_HISR_PSTIMEOUT BIT(23) -+#define SDIO_HISR_OCPINT BIT(24) -+#define SDIO_HISR_ATIMEND BIT(25) -+#define SDIO_HISR_ATIMEND_E BIT(26) -+#define SDIO_HISR_CTWEND BIT(27) -+ -+/* RTL8188E SDIO Specific */ -+#define SDIO_HISR_MCU_ERR BIT(28) -+#define SDIO_HISR_TSF_BIT32_TOGGLE BIT(29) -+ -+#define MASK_SDIO_HISR_CLEAR (SDIO_HISR_TXERR |\ -+ SDIO_HISR_RXERR |\ -+ SDIO_HISR_TXFOVW |\ -+ SDIO_HISR_RXFOVW |\ -+ SDIO_HISR_TXBCNOK |\ -+ SDIO_HISR_TXBCNERR |\ -+ SDIO_HISR_C2HCMD |\ -+ SDIO_HISR_CPWM1 |\ -+ SDIO_HISR_CPWM2 |\ -+ SDIO_HISR_HSISR_IND |\ -+ SDIO_HISR_GTINT3_IND |\ -+ SDIO_HISR_GTINT4_IND |\ -+ SDIO_HISR_PSTIMEOUT |\ -+ SDIO_HISR_OCPINT) -+ -+/* SDIO HCI Suspend Control Register */ -+#define HCI_RESUME_PWR_RDY BIT(1) -+#define HCI_SUS_CTRL BIT(0) -+ -+/* SDIO Tx FIFO related */ -+#define SDIO_TX_FREE_PG_QUEUE 4 /* The number of Tx FIFO free page */ -+#define SDIO_TX_FIFO_PAGE_SZ 128 -+ -+/* indirect access */ -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+#define SDIO_REG_INDIRECT_REG_CFG 0x40 -+#define SDIO_REG_INDIRECT_REG_DATA 0x44 -+#define SET_INDIRECT_REG_ADDR(_cmd, _addr) SET_BITS_TO_LE_2BYTE(((u8 *)(_cmd)) + 0, 0, 16, (_addr)) -+#define SET_INDIRECT_REG_SIZE_1BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 0) -+#define SET_INDIRECT_REG_SIZE_2BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 1) -+#define SET_INDIRECT_REG_SIZE_4BYTE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 0, 2, 2) -+#define SET_INDIRECT_REG_WRITE(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 2, 1, 1) -+#define SET_INDIRECT_REG_READ(_cmd) SET_BITS_TO_LE_1BYTE(((u8 *)(_cmd)) + 2, 3, 1, 1) -+#define GET_INDIRECT_REG_RDY(_cmd) LE_BITS_TO_1BYTE(((u8 *)(_cmd)) + 2, 4, 1) -+#endif/*CONFIG_SDIO_INDIRECT_ACCESS*/ -+ -+#ifdef CONFIG_SDIO_HCI -+ #define MAX_TX_AGG_PACKET_NUMBER 0x8 -+#else -+ #define MAX_TX_AGG_PACKET_NUMBER 0xFF -+ #define MAX_TX_AGG_PACKET_NUMBER_8812 64 -+#endif -+ -+/* ----------------------------------------------------- -+ * -+ * 0xFE00h ~ 0xFE55h USB Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* 2 USB Information (0xFE17) */ -+#define USB_IS_HIGH_SPEED 0 -+#define USB_IS_FULL_SPEED 1 -+#define USB_SPEED_MASK BIT(5) -+ -+#define USB_NORMAL_SIE_EP_MASK 0xF -+#define USB_NORMAL_SIE_EP_SHIFT 4 -+ -+/* 2 Special Option */ -+#define USB_AGG_EN BIT(3) -+ -+/* 0; Use interrupt endpoint to upload interrupt pkt -+ * 1; Use bulk endpoint to upload interrupt pkt, */ -+#define INT_BULK_SEL BIT(4) -+ -+/* 2REG_C2HEVT_CLEAR */ -+#define C2H_EVT_HOST_CLOSE 0x00 /* Set by driver and notify FW that the driver has read the C2H command message */ -+#define C2H_EVT_FW_CLOSE 0xFF /* Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. */ -+ -+ -+/* 2REG_MULTI_FUNC_CTRL(For RTL8723 Only) */ -+#define WL_HWPDN_EN BIT(0) /* Enable GPIO[9] as WiFi HW PDn source */ -+#define WL_HWPDN_SL BIT(1) /* WiFi HW PDn polarity control */ -+#define WL_FUNC_EN BIT(2) /* WiFi function enable */ -+#define WL_HWROF_EN BIT(3) /* Enable GPIO[9] as WiFi RF HW PDn source */ -+#define BT_HWPDN_EN BIT(16) /* Enable GPIO[11] as BT HW PDn source */ -+#define BT_HWPDN_SL BIT(17) /* BT HW PDn polarity control */ -+#define BT_FUNC_EN BIT(18) /* BT function enable */ -+#define BT_HWROF_EN BIT(19) /* Enable GPIO[11] as BT/GPS RF HW PDn source */ -+#define GPS_HWPDN_EN BIT(20) /* Enable GPIO[10] as GPS HW PDn source */ -+#define GPS_HWPDN_SL BIT(21) /* GPS HW PDn polarity control */ -+#define GPS_FUNC_EN BIT(22) /* GPS function enable */ -+ -+/* 3 REG_LIFECTRL_CTRL */ -+#define HAL92C_EN_PKT_LIFE_TIME_BK BIT(3) -+#define HAL92C_EN_PKT_LIFE_TIME_BE BIT(2) -+#define HAL92C_EN_PKT_LIFE_TIME_VI BIT(1) -+#define HAL92C_EN_PKT_LIFE_TIME_VO BIT(0) -+ -+#define HAL92C_MSDU_LIFE_TIME_UNIT 128 /* in us, said by Tim. */ -+ -+/* 2 8192D PartNo. */ -+#define PARTNO_92D_NIC (BIT7 | BIT6) -+#define PARTNO_92D_NIC_REMARK (BIT5 | BIT4) -+#define PARTNO_SINGLE_BAND_VS BIT(3) -+#define PARTNO_SINGLE_BAND_VS_REMARK BIT(1) -+#define PARTNO_CONCURRENT_BAND_VC (BIT3 | BIT2) -+#define PARTNO_CONCURRENT_BAND_VC_REMARK (BIT1 | BIT0) -+ -+/* ******************************************************** -+ * General definitions -+ * ******************************************************** */ -+ -+#ifdef CONFIG_USB_HCI -+ #define LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(__Adapter) (175) -+#else -+ #define LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(__Adapter) (IS_VENDOR_8188E_I_CUT_SERIES(__Adapter) ? 255 : 175) -+#endif -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8812 255 -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8723B 255 -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8192C 255 -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8703B 255 -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC 127 -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188F 255 -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188GTV 255 -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8723D 255 -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8710B 255 -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8192F 255 -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8723F 255 -+#define POLLING_LLT_THRESHOLD 20 -+#if defined(CONFIG_RTL8723B) && defined(CONFIG_PCI_HCI) -+ #define POLLING_READY_TIMEOUT_COUNT 6000 -+#else -+ #define POLLING_READY_TIMEOUT_COUNT 1000 -+#endif -+ -+ -+/* GPIO BIT */ -+#define HAL_8812A_HW_GPIO_WPS_BIT BIT(2) -+#define HAL_8192C_HW_GPIO_WPS_BIT BIT(2) -+#define HAL_8192EU_HW_GPIO_WPS_BIT BIT(7) -+#define HAL_8188E_HW_GPIO_WPS_BIT BIT(7) -+ -+#endif /* __HAL_COMMON_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/hal_data.h b/drivers/staging/rtl8723cs/include/hal_data.h -new file mode 100644 -index 000000000000..3262436bfdb5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_data.h -@@ -0,0 +1,881 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_DATA_H__ -+#define __HAL_DATA_H__ -+ -+#if 1/* def CONFIG_SINGLE_IMG */ -+ -+#include "../hal/phydm/phydm_precomp.h" -+#ifdef CONFIG_BT_COEXIST -+ #include -+#endif -+ #include -+ -+#ifdef CONFIG_SDIO_HCI -+ #include -+#endif -+#ifdef CONFIG_GSPI_HCI -+ #include -+#endif -+ -+#if defined(CONFIG_RTW_ACS) || defined(CONFIG_BACKGROUND_NOISE_MONITOR) -+#include "../hal/hal_dm_acs.h" -+#endif -+ -+/* -+ * For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. -+ * */ -+typedef enum _RT_MULTI_FUNC { -+ RT_MULTI_FUNC_NONE = 0x00, -+ RT_MULTI_FUNC_WIFI = 0x01, -+ RT_MULTI_FUNC_BT = 0x02, -+ RT_MULTI_FUNC_GPS = 0x04, -+} RT_MULTI_FUNC, *PRT_MULTI_FUNC; -+/* -+ * For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08. -+ * */ -+typedef enum _RT_POLARITY_CTL { -+ RT_POLARITY_LOW_ACT = 0, -+ RT_POLARITY_HIGH_ACT = 1, -+} RT_POLARITY_CTL, *PRT_POLARITY_CTL; -+ -+/* For RTL8723 regulator mode. by tynli. 2011.01.14. */ -+typedef enum _RT_REGULATOR_MODE { -+ RT_SWITCHING_REGULATOR = 0, -+ RT_LDO_REGULATOR = 1, -+} RT_REGULATOR_MODE, *PRT_REGULATOR_MODE; -+ -+/* -+ * Interface type. -+ * */ -+typedef enum _INTERFACE_SELECT_PCIE { -+ INTF_SEL0_SOLO_MINICARD = 0, /* WiFi solo-mCard */ -+ INTF_SEL1_BT_COMBO_MINICARD = 1, /* WiFi+BT combo-mCard */ -+ INTF_SEL2_PCIe = 2, /* PCIe Card */ -+} INTERFACE_SELECT_PCIE, *PINTERFACE_SELECT_PCIE; -+ -+ -+typedef enum _INTERFACE_SELECT_USB { -+ INTF_SEL0_USB = 0, /* USB */ -+ INTF_SEL1_USB_High_Power = 1, /* USB with high power PA */ -+ INTF_SEL2_MINICARD = 2, /* Minicard */ -+ INTF_SEL3_USB_Solo = 3, /* USB solo-Slim module */ -+ INTF_SEL4_USB_Combo = 4, /* USB Combo-Slim module */ -+ INTF_SEL5_USB_Combo_MF = 5, /* USB WiFi+BT Multi-Function Combo, i.e., Proprietary layout(AS-VAU) which is the same as SDIO card */ -+} INTERFACE_SELECT_USB, *PINTERFACE_SELECT_USB; -+ -+typedef enum _RT_AMPDU_BRUST_MODE { -+ RT_AMPDU_BRUST_NONE = 0, -+ RT_AMPDU_BRUST_92D = 1, -+ RT_AMPDU_BRUST_88E = 2, -+ RT_AMPDU_BRUST_8812_4 = 3, -+ RT_AMPDU_BRUST_8812_8 = 4, -+ RT_AMPDU_BRUST_8812_12 = 5, -+ RT_AMPDU_BRUST_8812_15 = 6, -+ RT_AMPDU_BRUST_8723B = 7, -+} RT_AMPDU_BRUST, *PRT_AMPDU_BRUST_MODE; -+ -+/* Tx Power Limit Table Size */ -+#define MAX_REGULATION_NUM 4 -+#define MAX_RF_PATH_NUM_IN_POWER_LIMIT_TABLE 4 -+#define MAX_2_4G_BANDWIDTH_NUM 2 -+#define MAX_RATE_SECTION_NUM 10 -+#define MAX_5G_BANDWIDTH_NUM 4 -+ -+#define NUM_OF_TARGET_TXPWR_2G 10 /* CCK:1, OFDM:1, HT:4, VHT:4 */ -+#define NUM_OF_TARGET_TXPWR_5G 9 /* OFDM:1, HT:4, VHT:4 */ -+ -+#ifdef RTW_RX_AGGREGATION -+typedef enum _RX_AGG_MODE { -+ RX_AGG_DISABLE, -+ RX_AGG_DMA, -+ RX_AGG_USB, -+ RX_AGG_MIX -+} RX_AGG_MODE; -+ -+/* #define MAX_RX_DMA_BUFFER_SIZE 10240 */ /* 10K for 8192C RX DMA buffer */ -+ -+#endif /* RTW_RX_AGGREGATION */ -+ -+/* E-Fuse */ -+#ifdef CONFIG_RTL8188E -+ #define EFUSE_MAP_SIZE 512 -+#endif -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) -+ #define EFUSE_MAP_SIZE 512 -+#endif -+#ifdef CONFIG_RTL8192E -+ #define EFUSE_MAP_SIZE 512 -+#endif -+#ifdef CONFIG_RTL8723B -+ #define EFUSE_MAP_SIZE 512 -+#endif -+#ifdef CONFIG_RTL8814A -+ #define EFUSE_MAP_SIZE 512 -+#endif -+#ifdef CONFIG_RTL8703B -+ #define EFUSE_MAP_SIZE 512 -+#endif -+#ifdef CONFIG_RTL8723D -+ #define EFUSE_MAP_SIZE 512 -+#endif -+#ifdef CONFIG_RTL8188F -+ #define EFUSE_MAP_SIZE 512 -+#endif -+#ifdef CONFIG_RTL8188GTV -+ #define EFUSE_MAP_SIZE 512 -+#endif -+#ifdef CONFIG_RTL8710B -+ #define EFUSE_MAP_SIZE 512 -+#endif -+#ifdef CONFIG_RTL8192F -+ #define EFUSE_MAP_SIZE 512 -+#endif -+ -+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8814B) -+ #define EFUSE_MAX_SIZE 1024 -+#elif defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8710B) -+ #define EFUSE_MAX_SIZE 256 -+#else -+ #define EFUSE_MAX_SIZE 512 -+#endif -+/* end of E-Fuse */ -+ -+#define Mac_OFDM_OK 0x00000000 -+#define Mac_OFDM_Fail 0x10000000 -+#define Mac_OFDM_FasleAlarm 0x20000000 -+#define Mac_CCK_OK 0x30000000 -+#define Mac_CCK_Fail 0x40000000 -+#define Mac_CCK_FasleAlarm 0x50000000 -+#define Mac_HT_OK 0x60000000 -+#define Mac_HT_Fail 0x70000000 -+#define Mac_HT_FasleAlarm 0x90000000 -+#define Mac_DropPacket 0xA0000000 -+ -+#ifdef CONFIG_RF_POWER_TRIM -+#if defined(CONFIG_RTL8723B) -+ #define REG_RF_BB_GAIN_OFFSET 0x7f -+ #define RF_GAIN_OFFSET_MASK 0xfffff -+#elif defined(CONFIG_RTL8188E) -+ #define REG_RF_BB_GAIN_OFFSET 0x55 -+ #define RF_GAIN_OFFSET_MASK 0xfffff -+#else -+ #define REG_RF_BB_GAIN_OFFSET 0x55 -+ #define RF_GAIN_OFFSET_MASK 0xfffff -+#endif /* CONFIG_RTL8723B */ -+#endif /*CONFIG_RF_POWER_TRIM*/ -+ -+/* For store initial value of BB register */ -+typedef struct _BB_INIT_REGISTER { -+ u16 offset; -+ u32 value; -+ -+} BB_INIT_REGISTER, *PBB_INIT_REGISTER; -+ -+#define PAGE_SIZE_128 128 -+#define PAGE_SIZE_256 256 -+#define PAGE_SIZE_512 512 -+ -+#define HCI_SUS_ENTER 0 -+#define HCI_SUS_LEAVING 1 -+#define HCI_SUS_LEAVE 2 -+#define HCI_SUS_ENTERING 3 -+#define HCI_SUS_ERR 4 -+ -+#define EFUSE_FILE_UNUSED 0 -+#define EFUSE_FILE_FAILED 1 -+#define EFUSE_FILE_LOADED 2 -+ -+#define MACADDR_FILE_UNUSED 0 -+#define MACADDR_FILE_FAILED 1 -+#define MACADDR_FILE_LOADED 2 -+ -+#define MAX_IQK_INFO_BACKUP_CHNL_NUM 5 -+#define MAX_IQK_INFO_BACKUP_REG_NUM 10 -+ -+struct kfree_data_t { -+ u8 flag; -+ s8 bb_gain[BB_GAIN_NUM][RF_PATH_MAX]; -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ s8 pa_bias_5g[RF_PATH_MAX]; -+ s8 pad_bias_5g[RF_PATH_MAX]; -+#endif -+ s8 thermal; -+}; -+ -+bool kfree_data_is_bb_gain_empty(struct kfree_data_t *data); -+ -+struct hal_spec_t { -+ char *ic_name; -+ u8 macid_num; -+ -+ u8 sec_cam_ent_num; -+ u8 sec_cap; -+ u8 wow_cap; -+ u8 macid_cap; -+ u16 macid_txrpt; -+ u8 macid_txrpt_pgsz; -+ -+ u8 rfpath_num_2g:4; /* used for tx power index path */ -+ u8 rfpath_num_5g:4; /* used for tx power index path */ -+ u8 rf_reg_path_num; -+ u8 rf_reg_path_avail_num; -+ u8 rf_reg_trx_path_bmp; /* [7:4]TX path bmp, [0:3]RX path bmp */ -+ u8 max_tx_cnt; -+ -+ u8 tx_nss_num:4; -+ u8 rx_nss_num:4; -+ -+ u8 band_cap; /* value of BAND_CAP_XXX */ -+ u8 bw_cap; /* value of BW_CAP_XXX */ -+ u8 port_num; -+ u8 proto_cap; /* value of PROTO_CAP_XXX */ -+ -+ u8 txgi_max; /* maximum tx power gain index */ -+ u8 txgi_pdbm; /* tx power gain index per dBm */ -+ -+ u8 wl_func; /* value of WL_FUNC_XXX */ -+ -+ u8 tx_aclt_unit_factor; /* how many 32us */ -+ -+ u8 rx_tsf_filter:1; -+ -+ u8 pg_txpwr_saddr; /* starting address of PG tx power info */ -+ u8 pg_txgi_diff_factor; /* PG tx power gain index diff to tx power gain index */ -+ -+ u8 hci_type; /* value of HCI Type */ -+}; -+ -+#define HAL_SPEC_CHK_RF_PATH_2G(_spec, _path) ((_spec)->rfpath_num_2g > (_path)) -+#define HAL_SPEC_CHK_RF_PATH_5G(_spec, _path) ((_spec)->rfpath_num_5g > (_path)) -+#define HAL_SPEC_CHK_RF_PATH(_spec, _band, _path) ( \ -+ _band == BAND_ON_2_4G ? HAL_SPEC_CHK_RF_PATH_2G(_spec, _path) : \ -+ _band == BAND_ON_5G ? HAL_SPEC_CHK_RF_PATH_5G(_spec, _path) : 0) -+ -+#ifdef CONFIG_PHY_CAPABILITY_QUERY -+struct phy_spec_t { -+ u32 trx_cap; -+ u32 stbc_cap; -+ u32 ldpc_cap; -+ u32 txbf_param; -+ u32 txbf_cap; -+}; -+#endif -+struct hal_iqk_reg_backup { -+ u8 central_chnl; -+ u8 bw_mode; -+ u32 reg_backup[MAX_RF_PATH][MAX_IQK_INFO_BACKUP_REG_NUM]; -+}; -+ -+ -+typedef struct hal_p2p_ps_para { -+ /*DW0*/ -+ u8 offload_en:1; -+ u8 role:1; -+ u8 ctwindow_en:1; -+ u8 noa_en:1; -+ u8 noa_sel:1; -+ u8 all_sta_sleep:1; -+ u8 discovery:1; -+ u8 disable_close_rf:1; -+ u8 p2p_port_id; -+ u8 p2p_group; -+ u8 p2p_macid; -+ -+ /*DW1*/ -+ u8 ctwindow_length; -+ u8 rsvd3; -+ u8 rsvd4; -+ u8 rsvd5; -+ -+ /*DW2*/ -+ u32 noa_duration_para; -+ -+ /*DW3*/ -+ u32 noa_interval_para; -+ -+ /*DW4*/ -+ u32 noa_start_time_para; -+ -+ /*DW5*/ -+ u32 noa_count_para; -+} HAL_P2P_PS_PARA, *PHAL_P2P_PS_PARA; -+ -+#define TXPWR_LMT_RS_CCK 0 -+#define TXPWR_LMT_RS_OFDM 1 -+#define TXPWR_LMT_RS_HT 2 -+#define TXPWR_LMT_RS_VHT 3 -+#define TXPWR_LMT_RS_NUM 4 -+ -+#define TXPWR_LMT_RS_NUM_2G 4 /* CCK, OFDM, HT, VHT */ -+#define TXPWR_LMT_RS_NUM_5G 3 /* OFDM, HT, VHT */ -+ -+#if CONFIG_TXPWR_LIMIT -+extern const char *const _txpwr_lmt_rs_str[]; -+#define txpwr_lmt_rs_str(rs) (((rs) >= TXPWR_LMT_RS_NUM) ? _txpwr_lmt_rs_str[TXPWR_LMT_RS_NUM] : _txpwr_lmt_rs_str[(rs)]) -+ -+struct txpwr_lmt_ent { -+ _list list; -+ -+ s8 lmt_2g[MAX_2_4G_BANDWIDTH_NUM] -+ [TXPWR_LMT_RS_NUM_2G] -+ [CENTER_CH_2G_NUM] -+ [MAX_TX_COUNT]; -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ s8 lmt_5g[MAX_5G_BANDWIDTH_NUM] -+ [TXPWR_LMT_RS_NUM_5G] -+ [CENTER_CH_5G_ALL_NUM] -+ [MAX_TX_COUNT]; -+#endif -+ -+ char regd_name[0]; -+}; -+#endif /* CONFIG_TXPWR_LIMIT */ -+ -+typedef struct hal_com_data { -+ HAL_VERSION version_id; -+ RT_MULTI_FUNC MultiFunc; /* For multi-function consideration. */ -+ RT_POLARITY_CTL PolarityCtl; /* For Wifi PDn Polarity control. */ -+ RT_REGULATOR_MODE RegulatorMode; /* switching regulator or LDO */ -+ u8 hw_init_completed; -+ /****** FW related ******/ -+ u32 firmware_size; -+ u16 firmware_version; -+ u16 FirmwareVersionRev; -+ u16 firmware_sub_version; -+ u16 FirmwareSignature; -+ u8 RegFWOffload; -+ u8 bFWReady; -+ u8 bBTFWReady; -+ u8 fw_ractrl; -+ u8 LastHMEBoxNum; /* H2C - for host message to fw */ -+#ifdef CONFIG_LPS_1T1R -+ u8 lps_1t1r; -+#endif -+ -+ /****** current WIFI_PHY values ******/ -+ WIRELESS_MODE CurrentWirelessMode; -+ enum channel_width current_channel_bw; -+ BAND_TYPE current_band_type; /* 0:2.4G, 1:5G */ -+ u8 current_channel; -+ u8 cch_20; -+ u8 cch_40; -+ u8 cch_80; -+ u8 CurrentCenterFrequencyIndex1; -+ u8 nCur40MhzPrimeSC; /* Control channel sub-carrier */ -+ u8 nCur80MhzPrimeSC; /* used for primary 40MHz of 80MHz mode */ -+ BOOLEAN bSwChnlAndSetBWInProgress; -+ u8 bDisableSWChannelPlan; /* flag of disable software change channel plan */ -+ u16 BasicRateSet; -+ u32 ReceiveConfig; -+#ifdef CONFIG_WIFI_MONITOR -+ struct mon_reg_backup mon_backup; /* used for switching back from monitor mode */ -+#endif /* CONFIG_WIFI_MONITOR */ -+ u8 rx_tsf_addr_filter_config; /* for 8822B/8821C USE */ -+ BOOLEAN bSwChnl; -+ BOOLEAN bSetChnlBW; -+ BOOLEAN bSWToBW40M; -+ BOOLEAN bSWToBW80M; -+ BOOLEAN bChnlBWInitialized; -+ -+#ifdef CONFIG_RTW_ACS -+ struct auto_chan_sel acs; -+#endif -+#ifdef CONFIG_BCN_RECOVERY -+ u8 issue_bcn_fail; -+#endif /*CONFIG_BCN_RECOVERY*/ -+ -+ /****** rf_ctrl *****/ -+ u8 rf_chip; -+ -+ u8 trx_path_bmp; /* [7:4]TX path bmp, [0:3]RX path bmp */ -+ u8 rf_type; /*enum rf_type , is RF_PATH - GET_HAL_RFPATH*/ -+ u8 NumTotalRFPath; /*GET_HAL_RFPATH_NUM*/ -+ u8 max_tx_cnt; -+ u8 tx_nss; /*tx Spatial Streams - GET_HAL_TX_NSS*/ -+ u8 rx_nss; /*rx Spatial Streams - GET_HAL_RX_NSS*/ -+ u8 txpath_cap_num_nss[4]; /* capable path num for NSS TX, [0] for 1SS, [3] for 4SS */ -+ -+ u8 PackageType; -+ u8 antenna_test; -+ -+ /* runtime TRX path setting */ -+ enum bb_path txpath; /* TX path bmp */ -+ enum bb_path rxpath; /* RX path bmp */ -+ enum bb_path txpath_nss[4]; /* path bmp for NSS TX, [0] for 1SS, [3] for 4SS */ -+ u8 txpath_num_nss[4]; /* path num for NSS TX, [0] for 1SS, [3] for 4SS */ -+ -+ /****** Debug ******/ -+ u16 ForcedDataRate; /* Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M. */ -+ u8 bDumpRxPkt; -+ u8 bDumpTxPkt; -+ u8 dis_turboedca; /* 1: disable turboedca, -+ 2: disable turboedca and setting EDCA parameter based on the input parameter*/ -+ u32 edca_param_mode; -+ -+ /****** EEPROM setting.******/ -+ u8 bautoload_fail_flag; -+ u8 efuse_file_status; -+ u8 macaddr_file_status; -+ u8 EepromOrEfuse; -+ u8 efuse_eeprom_data[EEPROM_MAX_SIZE]; /*92C:256bytes, 88E:512bytes, we use union set (512bytes)*/ -+ u8 InterfaceSel; /* board type kept in eFuse */ -+ u16 CustomerID; -+ -+ u16 EEPROMVID; -+ u16 EEPROMSVID; -+#ifdef CONFIG_USB_HCI -+ u8 EEPROMUsbSwitch; -+ u16 EEPROMPID; -+ u16 EEPROMSDID; -+#endif -+#ifdef CONFIG_PCI_HCI -+ u16 EEPROMDID; -+ u16 EEPROMSMID; -+#endif -+ -+ u8 EEPROMCustomerID; -+ u8 EEPROMSubCustomerID; -+ u8 EEPROMVersion; -+ u8 EEPROMRegulatory; -+ u8 eeprom_thermal_meter; -+ u8 EEPROMBluetoothCoexist; -+ u8 EEPROMBluetoothType; -+ u8 EEPROMBluetoothAntNum; -+ u8 EEPROMBluetoothAntIsolation; -+ u8 EEPROMBluetoothRadioShared; -+ u8 EEPROMMACAddr[ETH_ALEN]; -+ -+ u8 eeprom_trx_path_bmp; /* [7:4]TX path bmp, [0:3]RX path bmp. 0x00:not specified */ -+ u8 eeprom_max_tx_cnt; /* 0: not specified */ -+ -+ u8 tx_bbswing_24G; -+ u8 tx_bbswing_5G; -+ u8 efuse0x3d7; /* efuse[0x3D7] */ -+ u8 efuse0x3d8; /* efuse[0x3D8] */ -+ -+#ifdef CONFIG_RF_POWER_TRIM -+ u8 EEPROMRFGainOffset; -+ u8 EEPROMRFGainVal; -+ struct kfree_data_t kfree_data; -+#endif /*CONFIG_RF_POWER_TRIM*/ -+ -+#ifdef CONFIG_RTL8814A -+ u32 BackUp_BB_REG_4_2nd_CCA[3]; -+#endif -+#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \ -+ defined(CONFIG_RTL8723D) || \ -+ defined(CONFIG_RTL8192F) -+ -+ u8 adjuseVoltageVal; -+ u8 need_restore; -+#endif -+ u8 EfuseUsedPercentage; -+ u16 EfuseUsedBytes; -+ /*u8 EfuseMap[2][HWSET_MAX_SIZE_JAGUAR];*/ -+ EFUSE_HAL EfuseHal; -+ -+ u8 txpwr_pg_mode; /* enum txpwr_pg_mode */ -+ -+ /*---------------------------------------------------------------------------------*/ -+#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ /* 2.4G TX power info for target TX power*/ -+ u8 Index24G_CCK_Base[MAX_RF_PATH][CENTER_CH_2G_NUM]; -+ u8 Index24G_BW40_Base[MAX_RF_PATH][CENTER_CH_2G_NUM]; -+ s8 CCK_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 OFDM_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW20_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW40_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ -+ /* 5G TX power info for target TX power*/ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ u8 Index5G_BW40_Base[MAX_RF_PATH][CENTER_CH_5G_ALL_NUM]; -+ u8 Index5G_BW80_Base[MAX_RF_PATH][CENTER_CH_5G_80M_NUM]; -+ s8 OFDM_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW20_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW40_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+ s8 BW80_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT]; -+#endif -+#endif /* CONFIG_TXPWR_PG_WITH_PWR_IDX */ -+ -+ u8 txpwr_by_rate_undefined_band_path[TX_PWR_BY_RATE_NUM_BAND] -+ [TX_PWR_BY_RATE_NUM_RF]; -+ -+ s8 TxPwrByRate[TX_PWR_BY_RATE_NUM_BAND] -+ [TX_PWR_BY_RATE_NUM_RF] -+ [TX_PWR_BY_RATE_NUM_RATE]; -+ -+ /* Store the target power for each rate section and rf path */ -+ u8 target_txpwr_2g[TX_PWR_BY_RATE_NUM_RF] -+ [NUM_OF_TARGET_TXPWR_2G]; -+ u8 target_txpwr_5g[TX_PWR_BY_RATE_NUM_RF] -+ [NUM_OF_TARGET_TXPWR_5G]; -+ -+ bool set_entire_txpwr; -+ -+#if defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8814B) \ -+ || defined(CONFIG_RTL8723F) -+ u32 txagc_set_buf; -+#endif -+ -+#ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX -+ u8 txpwr_idx_offload_buf[3]; /* for CCK, OFDM, HT1SS */ -+ struct submit_ctx txpwr_idx_offload_sctx; -+#endif -+ -+ u8 txpwr_by_rate_loaded:1; -+ u8 txpwr_by_rate_from_file:1; -+ u8 txpwr_limit_loaded:1; -+ u8 txpwr_limit_from_file:1; -+ -+ /* Read/write are allow for following hardware information variables */ -+ u8 crystal_cap; -+ -+ u8 PAType_2G; -+ u8 PAType_5G; -+ u8 LNAType_2G; -+ u8 LNAType_5G; -+ u8 ExternalPA_2G; -+ u8 ExternalLNA_2G; -+ u8 external_pa_5g; -+ u8 external_lna_5g; -+ u16 TypeGLNA; -+ u16 TypeGPA; -+ u16 TypeALNA; -+ u16 TypeAPA; -+ u16 rfe_type; -+ -+ u8 bLedOpenDrain; /* Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. */ -+ u32 ac_param_be; /* Original parameter for BE, use for EDCA turbo. */ -+ u8 is_turbo_edca; -+ u8 prv_traffic_idx; -+ BB_REGISTER_DEFINITION_T PHYRegDef[MAX_RF_PATH]; /* Radio A/B/C/D */ -+ -+ u32 RfRegChnlVal[MAX_RF_PATH]; -+ -+ /* RDG enable */ -+ BOOLEAN bRDGEnable; -+ -+ #if defined (CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ u32 RegRRSR; -+ #endif -+ -+ /****** antenna diversity ******/ -+ u8 AntDivCfg; -+ u8 with_extenal_ant_switch; -+ u8 b_fix_tx_ant; -+ u8 AntDetection; -+ u8 TRxAntDivType; -+ u8 ant_path; /* for 8723B s0/s1 selection */ -+ u32 antenna_tx_path; /* Antenna path Tx */ -+ u32 AntennaRxPath; /* Antenna path Rx */ -+ u8 sw_antdiv_bl_state; -+ -+ /******** PHY DM & DM Section **********/ -+ _lock IQKSpinLock; -+ u8 INIDATA_RATE[MACID_NUM_SW_LIMIT]; -+ -+ struct dm_struct odmpriv; -+ u64 bk_rf_ability; -+ u8 bIQKInitialized; -+ u8 bNeedIQK; -+ u8 neediqk_24g; -+ u8 IQK_MP_Switch; -+ u8 bScanInProcess; -+ u8 phydm_init_result; /*BB and RF para match or not*/ -+ /******** PHY DM & DM Section **********/ -+ -+ -+ -+ /* 2010/08/09 MH Add CU power down mode. */ -+ BOOLEAN pwrdown; -+ -+#ifdef CONFIG_P2P -+#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+ u16 p2p_ps_offload; -+#else -+ u8 p2p_ps_offload; -+#endif -+#endif -+ /* Auto FSM to Turn On, include clock, isolation, power control for MAC only */ -+ u8 bMacPwrCtrlOn; -+ u8 hci_sus_state; -+ -+ u8 RegIQKFWOffload; -+ struct submit_ctx iqk_sctx; -+ u8 ch_switch_offload; -+ struct submit_ctx chsw_sctx; -+ -+ RT_AMPDU_BRUST AMPDUBurstMode; /* 92C maybe not use, but for compile successfully */ -+ -+ u8 OutEpQueueSel; -+ u8 OutEpNumber; -+ -+#ifdef RTW_RX_AGGREGATION -+ RX_AGG_MODE rxagg_mode; -+ -+ /* For RX Aggregation DMA Mode */ -+ u8 rxagg_dma_size; -+ u8 rxagg_dma_timeout; -+#endif /* RTW_RX_AGGREGATION */ -+ -+ bool intf_start; -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ /* */ -+ /* For SDIO Interface HAL related */ -+ /* */ -+ -+ /* */ -+ /* SDIO ISR Related */ -+ /* -+ * u32 IntrMask[1]; -+ * u32 IntrMaskToSet[1]; -+ * LOG_INTERRUPT InterruptLog; */ -+ u32 sdio_himr; -+ u32 sdio_hisr; -+#ifndef RTW_HALMAC -+ /* */ -+ /* SDIO Tx FIFO related. */ -+ /* */ -+ /* HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg */ -+#ifdef CONFIG_RTL8192F -+ u16 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE]; -+#else -+ u8 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE]; -+#endif/*CONFIG_RTL8192F*/ -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ u8 sdio_avail_int_en_q; -+#endif -+ _lock SdioTxFIFOFreePageLock; -+ u8 SdioTxOQTMaxFreeSpace; -+ u8 SdioTxOQTFreeSpace; -+#else /* RTW_HALMAC */ -+ u16 SdioTxOQTFreeSpace; -+#endif /* RTW_HALMAC */ -+ -+ /* */ -+ /* SDIO Rx FIFO related. */ -+ /* */ -+ u8 SdioRxFIFOCnt; -+#if defined (CONFIG_RTL8822C) || defined (CONFIG_RTL8192F) -+ u32 SdioRxFIFOSize; -+#else -+ u16 SdioRxFIFOSize; -+#endif -+ -+#ifndef RTW_HALMAC -+ u32 sdio_tx_max_len[SDIO_MAX_TX_QUEUE];/* H, N, L, used for sdio tx aggregation max length per queue */ -+#else -+#ifdef CONFIG_RTL8821C -+ u16 tx_high_page; -+ u16 tx_low_page; -+ u16 tx_normal_page; -+ u16 tx_extra_page; -+ u16 tx_pub_page; -+ u8 max_oqt_size; -+ #ifdef XMIT_BUF_SIZE -+ u32 max_xmit_size_vovi; -+ u32 max_xmit_size_bebk; -+ #endif /*XMIT_BUF_SIZE*/ -+ u16 max_xmit_page; -+ u16 max_xmit_page_vo; -+ u16 max_xmit_page_vi; -+ u16 max_xmit_page_be; -+ u16 max_xmit_page_bk; -+ -+#endif /*#ifdef CONFIG_RTL8821C*/ -+#endif /* !RTW_HALMAC */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+#ifdef CONFIG_USB_HCI -+ -+ /* 2010/12/10 MH Add for USB aggreation mode dynamic shceme. */ -+ BOOLEAN UsbRxHighSpeedMode; -+ BOOLEAN UsbTxVeryHighSpeedMode; -+ u32 UsbBulkOutSize; -+ BOOLEAN bSupportUSB3; -+ u8 usb_intf_start; -+ -+ /* Interrupt relatd register information. */ -+ u32 IntArray[3];/* HISR0,HISR1,HSISR */ -+ u32 IntrMask[3]; -+#ifdef CONFIG_USB_TX_AGGREGATION -+ u8 UsbTxAggMode; -+ u8 UsbTxAggDescNum; -+#endif /* CONFIG_USB_TX_AGGREGATION */ -+ -+#ifdef CONFIG_USB_RX_AGGREGATION -+ u16 HwRxPageSize; /* Hardware setting */ -+ -+ /* For RX Aggregation USB Mode */ -+ u8 rxagg_usb_size; -+ u8 rxagg_usb_timeout; -+#endif/* CONFIG_USB_RX_AGGREGATION */ -+#endif /* CONFIG_USB_HCI */ -+ -+ -+#ifdef CONFIG_PCI_HCI -+ /* */ -+ /* EEPROM setting. */ -+ /* */ -+ u32 TransmitConfig; -+ u32 IntrMaskToSet[2]; -+ u32 IntArray[4]; -+ u32 IntrMask[4]; -+ u32 SysIntArray[1]; -+ u32 SysIntrMask[1]; -+ u32 IntrMaskReg[2]; -+ u32 IntrMaskDefault[4]; -+ -+ u32 pci_backdoor_ctrl; -+ -+ u8 bDefaultAntenna; -+ -+ u8 bInterruptMigration; -+ u8 bDisableTxInt; -+ -+ u16 RxTag; -+#endif /* CONFIG_PCI_HCI */ -+ -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ struct sreset_priv srestpriv; -+#endif /* #ifdef DBG_CONFIG_ERROR_DETECT */ -+ -+#ifdef CONFIG_BT_COEXIST -+ /* For bluetooth co-existance */ -+ BT_COEXIST bt_coexist; -+#endif /* CONFIG_BT_COEXIST */ -+ -+#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) \ -+ || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D)|| defined(CONFIG_RTL8192F) -+#ifndef CONFIG_PCI_HCI /* mutual exclusive with PCI -- so they're SDIO and GSPI */ -+ /* Interrupt relatd register information. */ -+ u32 SysIntrStatus; -+ u32 SysIntrMask; -+#endif -+#endif /*endif CONFIG_RTL8723B */ -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ char para_file_buf[MAX_PARA_FILE_BUF_LEN]; -+ char *mac_reg; -+ u32 mac_reg_len; -+ char *bb_phy_reg; -+ u32 bb_phy_reg_len; -+ char *bb_agc_tab; -+ u32 bb_agc_tab_len; -+ char *bb_phy_reg_pg; -+ u32 bb_phy_reg_pg_len; -+ char *bb_phy_reg_mp; -+ u32 bb_phy_reg_mp_len; -+ char *rf_radio_a; -+ u32 rf_radio_a_len; -+ char *rf_radio_b; -+ u32 rf_radio_b_len; -+ char *rf_tx_pwr_track; -+ u32 rf_tx_pwr_track_len; -+ char *rf_tx_pwr_lmt; -+ u32 rf_tx_pwr_lmt_len; -+#endif -+ -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ struct noise_monitor nm; -+#endif -+ -+ struct hal_spec_t hal_spec; -+#ifdef CONFIG_PHY_CAPABILITY_QUERY -+ struct phy_spec_t phy_spec; -+#endif -+ u8 RfKFreeEnable; -+ u8 RfKFree_ch_group; -+ BOOLEAN bCCKinCH14; -+ BB_INIT_REGISTER RegForRecover[5]; -+ -+#if defined(CONFIG_PCI_HCI) && defined(RTL8814AE_SW_BCN) -+ BOOLEAN bCorrectBCN; -+#endif -+#ifdef CONFIG_RTL8814A -+ u32 RxGainOffset[4]; /*{2G, 5G_Low, 5G_Middle, G_High}*/ -+ u8 BackUp_IG_REG_4_Chnl_Section[4]; /*{A,B,C,D}*/ -+#endif -+ struct hal_iqk_reg_backup iqk_reg_backup[MAX_IQK_INFO_BACKUP_CHNL_NUM]; -+ -+#ifdef RTW_HALMAC -+ u16 drv_rsvd_page_number; -+#endif -+ -+#ifdef CONFIG_BEAMFORMING -+ u8 backup_snd_ptcl_ctrl; -+#ifdef RTW_BEAMFORMING_VERSION_2 -+ struct beamforming_info beamforming_info; -+#endif /* RTW_BEAMFORMING_VERSION_2 */ -+#endif /* CONFIG_BEAMFORMING */ -+ -+ u8 not_xmitframe_fw_dl; /*not use xmitframe to download fw*/ -+ u8 phydm_op_mode; -+ -+ u8 in_cta_test; -+ -+#ifdef CONFIG_RTW_LED -+ struct led_priv led; -+#endif -+ /* for multi channel case (ex: MCC/TDLS) */ -+ u8 multi_ch_switch_mode; -+ -+#ifdef CONFIG_RTL8814B -+ u8 dma_ch_map[32]; /* TXDESC qsel maximum size */ -+#endif -+ -+} HAL_DATA_COMMON, *PHAL_DATA_COMMON; -+ -+typedef struct hal_com_data HAL_DATA_TYPE, *PHAL_DATA_TYPE; -+#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)(((struct _ADAPTER*)__pAdapter)->HalData)) -+#define GET_HAL_SPEC(__pAdapter) (&(GET_HAL_DATA((__pAdapter))->hal_spec)) -+#define adapter_to_led(adapter) (&(GET_HAL_DATA(adapter)->led)) -+ -+#define RT_GetInterfaceSelection(_Adapter) (GET_HAL_DATA(_Adapter)->InterfaceSel) -+ -+#define GET_KFREE_DATA(_adapter) (&(GET_HAL_DATA((_adapter))->kfree_data)) -+ -+#define SUPPORT_HW_RADIO_DETECT(Adapter) (RT_GetInterfaceSelection(Adapter) == INTF_SEL2_MINICARD || \ -+ RT_GetInterfaceSelection(Adapter) == INTF_SEL3_USB_Solo || \ -+ RT_GetInterfaceSelection(Adapter) == INTF_SEL4_USB_Combo) -+ -+#define get_hal_mac_addr(adapter) (GET_HAL_DATA(adapter)->EEPROMMACAddr) -+#define is_boot_from_eeprom(adapter) (GET_HAL_DATA(adapter)->EepromOrEfuse) -+#define rtw_get_hw_init_completed(adapter) (GET_HAL_DATA(adapter)->hw_init_completed) -+#define rtw_set_hw_init_completed(adapter, cmp) (GET_HAL_DATA(adapter)->hw_init_completed = cmp) -+#define rtw_is_hw_init_completed(adapter) (GET_HAL_DATA(adapter)->hw_init_completed == _TRUE) -+ -+/* refer to (hal_data->version_id.RFType / registrypriv->rf_path / 8814a from efuse or registrypriv)*/ -+#define GET_HAL_RFPATH(adapter) (GET_HAL_DATA(adapter)->rf_type) -+#define GET_HAL_RFPATH_NUM(adapter) (GET_HAL_DATA(adapter)->NumTotalRFPath) -+#define GET_HAL_TX_PATH_BMP(adapter) ((GET_HAL_DATA(adapter)->trx_path_bmp & 0xF0) >> 4) -+#define GET_HAL_RX_PATH_BMP(adapter) (GET_HAL_DATA(adapter)->trx_path_bmp & 0x0F) -+ -+/* refer to (registrypriv-> tx_nss,rx_nss / hal_spec->tx_nss_num,rx_nss_num)*/ -+#define GET_HAL_TX_NSS(adapter) (GET_HAL_DATA(adapter)->tx_nss) -+#define GET_HAL_RX_NSS(adapter) (GET_HAL_DATA(adapter)->rx_nss) -+ -+#endif -+ -+#ifdef RTW_HALMAC -+int rtw_halmac_deinit_adapter(struct dvobj_priv *); -+#endif /* RTW_HALMAC */ -+ -+#endif /* __HAL_DATA_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/hal_gspi.h b/drivers/staging/rtl8723cs/include/hal_gspi.h -new file mode 100644 -index 000000000000..51d491cdb505 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_gspi.h -@@ -0,0 +1,26 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_GSPI_H_ -+#define __HAL_GSPI_H_ -+ -+#define ffaddr2deviceId(pdvobj, addr) (pdvobj->Queue2Pipe[addr]) -+ -+u8 rtw_hal_gspi_max_txoqt_free_space(_adapter *padapter); -+u8 rtw_hal_gspi_query_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); -+void rtw_hal_gspi_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); -+void rtw_hal_set_gspi_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); -+u32 rtw_hal_get_gspi_tx_max_length(PADAPTER padapter, u8 queue_idx); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/hal_ic_cfg.h b/drivers/staging/rtl8723cs/include/hal_ic_cfg.h -new file mode 100644 -index 000000000000..02779bd8c94a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_ic_cfg.h -@@ -0,0 +1,710 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_IC_CFG_H__ -+#define __HAL_IC_CFG_H__ -+ -+#define RTL8188E_SUPPORT 0 -+#define RTL8812A_SUPPORT 0 -+#define RTL8821A_SUPPORT 0 -+#define RTL8723B_SUPPORT 0 -+#define RTL8723D_SUPPORT 0 -+#define RTL8723F_SUPPORT 0 -+#define RTL8192E_SUPPORT 0 -+#define RTL8192F_SUPPORT 0 -+#define RTL8814A_SUPPORT 0 -+#define RTL8195A_SUPPORT 0 -+#define RTL8197F_SUPPORT 0 -+#define RTL8703B_SUPPORT 0 -+#define RTL8188F_SUPPORT 0 -+#define RTL8822B_SUPPORT 0 -+#define RTL8821B_SUPPORT 0 -+#define RTL8821C_SUPPORT 0 -+#define RTL8710B_SUPPORT 0 -+#define RTL8814B_SUPPORT 0 -+#define RTL8824B_SUPPORT 0 -+#define RTL8198F_SUPPORT 0 -+#define RTL8195B_SUPPORT 0 -+#define RTL8822C_SUPPORT 0 -+#define RTL8721D_SUPPORT 0 -+#define RTL8812F_SUPPORT 0 -+#define RTL8197G_SUPPORT 0 -+#define RTL8710C_SUPPORT 0 -+ -+ -+/*#if (RTL8188E_SUPPORT==1)*/ -+#define RATE_ADAPTIVE_SUPPORT 0 -+#define POWER_TRAINING_ACTIVE 0 -+ -+#ifdef CONFIG_MULTIDRV -+#endif -+ -+#ifdef CONFIG_RTL8188E -+ #undef RTL8188E_SUPPORT -+ #undef RATE_ADAPTIVE_SUPPORT -+ #undef POWER_TRAINING_ACTIVE -+ -+ #define RTL8188E_SUPPORT 1 -+ #define RATE_ADAPTIVE_SUPPORT 1 -+ #define POWER_TRAINING_ACTIVE 1 -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ #undef RTL8812A_SUPPORT -+ #define RTL8812A_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #ifdef CONFIG_BEAMFORMING -+ #define CONFIG_BEAMFORMER_FW_NDPA -+ #define BEAMFORMING_SUPPORT 1 /*for phydm beamforming*/ -+ #define SUPPORT_MU_BF 0 -+ #endif /*CONFIG_BEAMFORMING*/ -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8821A -+ #undef RTL8821A_SUPPORT -+ #define RTL8821A_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #ifdef CONFIG_BEAMFORMING -+ #define CONFIG_BEAMFORMER_FW_NDPA -+ #define BEAMFORMING_SUPPORT 1 /*for phydm beamforming*/ -+ #define SUPPORT_MU_BF 0 -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ #undef RTL8192E_SUPPORT -+ #define RTL8192E_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8192F -+ #undef RTL8192F_SUPPORT -+ #define RTL8192F_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #ifndef CONFIG_RTW_MAC_HIDDEN_RPT -+ #define CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ /*#define CONFIG_AMPDU_PRETX_CD*/ -+ /*#define DBG_LA_MODE*/ -+ #ifdef CONFIG_P2P_PS -+ #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+ #endif -+ #define CONFIG_RTS_FULL_BW -+/* #define CONFIG_NARROWBAND_SUPPORTING */ -+ #ifdef CONFIG_NARROWBAND_SUPPORTING -+ #define CONFIG_NB_VALUE RTW_NB_CONFIG_NONE /*RTW_NB_CONFIG_WIDTH_10 or RTW_NB_CONFIG_WIDTH_5 */ -+ #endif -+ #ifdef CONFIG_WOWLAN -+ #define CONFIG_WOW_PATTERN_IN_TXFIFO -+ #endif -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+ #define CONFIG_STOP_RESUME_BCN_BY_TXPAUSE /*to fixed no bcn issue*/ -+#endif -+ -+#ifdef CONFIG_RTL8723B -+ #undef RTL8723B_SUPPORT -+ #define RTL8723B_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ #undef RTL8723D_SUPPORT -+ #define RTL8723D_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #ifndef CONFIG_RTW_MAC_HIDDEN_RPT -+ #define CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ #ifndef CONFIG_RTW_CUSTOMER_STR -+ #define CONFIG_RTW_CUSTOMER_STR -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ #undef RTL8814A_SUPPORT -+ #define RTL8814A_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #define CONFIG_FW_CORRECT_BCN -+ #ifdef CONFIG_BEAMFORMING -+ #define BEAMFORMING_SUPPORT 1 /*for phydm beamforming*/ -+ #define SUPPORT_MU_BF 0 -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8703B -+ #undef RTL8703B_SUPPORT -+ #define RTL8703B_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #ifndef CONFIG_RTW_MAC_HIDDEN_RPT -+ #define CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8188F -+ #undef RTL8188F_SUPPORT -+ #define RTL8188F_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #ifndef CONFIG_RTW_MAC_HIDDEN_RPT -+ #define CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ #ifndef CONFIG_RTW_CUSTOMER_STR -+ #define CONFIG_RTW_CUSTOMER_STR -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8188GTV -+ #undef RTL8188F_SUPPORT -+ #define RTL8188F_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #ifndef CONFIG_RTW_MAC_HIDDEN_RPT -+ #define CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ #ifndef CONFIG_RTW_CUSTOMER_STR -+ #define CONFIG_RTW_CUSTOMER_STR -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+ -+ #if defined(CONFIG_USB_HCI) && !defined(CONFIG_FW_OFFLOAD_SET_TXPWR_IDX) -+ #define CONFIG_FW_OFFLOAD_SET_TXPWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ #undef RTL8822B_SUPPORT -+ #define RTL8822B_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif /* CONFIG_FW_C2H_PKT */ -+ #define RTW_TX_PA_BIAS /* Adjust TX PA Bias from eFuse */ -+ #define RTW_AMPDU_AGG_RETRY_AND_NEW -+ -+ #ifdef CONFIG_WOWLAN -+ #define CONFIG_GTK_OL -+ /*#define CONFIG_ARP_KEEP_ALIVE*/ -+ -+ #ifdef CONFIG_GPIO_WAKEUP -+ #ifndef WAKEUP_GPIO_IDX -+ #define WAKEUP_GPIO_IDX 6 /* WIFI Chip Side */ -+ #endif /* !WAKEUP_GPIO_IDX */ -+ #endif /* CONFIG_GPIO_WAKEUP */ -+ #endif /* CONFIG_WOWLAN */ -+ -+ #ifdef CONFIG_CONCURRENT_MODE -+ #define CONFIG_AP_PORT_SWAP -+ #define CONFIG_FW_MULTI_PORT_SUPPORT -+ #endif /* CONFIG_CONCURRENT_MODE */ -+ -+ /* -+ * Beamforming related definition -+ */ -+ /* Only support new beamforming mechanism */ -+ #ifdef CONFIG_BEAMFORMING -+ #define RTW_BEAMFORMING_VERSION_2 -+ #endif /* CONFIG_BEAMFORMING */ -+ -+ #ifndef CONFIG_RTW_MAC_HIDDEN_RPT -+ #define CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif /* CONFIG_RTW_MAC_HIDDEN_RPT */ -+ -+ #ifndef DBG_RX_DFRAME_RAW_DATA -+ #define DBG_RX_DFRAME_RAW_DATA -+ #endif /* DBG_RX_DFRAME_RAW_DATA */ -+ -+ #ifndef RTW_IQK_FW_OFFLOAD -+ #define RTW_IQK_FW_OFFLOAD -+ #endif /* RTW_IQK_FW_OFFLOAD */ -+ -+ /* Checksum offload feature */ -+ /*#define CONFIG_TCP_CSUM_OFFLOAD_TX*/ -+ #if defined(CONFIG_TCP_CSUM_OFFLOAD_TX) && !defined(CONFIG_RTW_NETIF_SG) -+ #define CONFIG_RTW_NETIF_SG -+ #endif -+ #define CONFIG_TCP_CSUM_OFFLOAD_RX -+ -+ #define CONFIG_ADVANCE_OTA -+ -+ #ifdef CONFIG_MCC_MODE -+ #define CONFIG_MCC_MODE_V2 -+ #define CONFIG_MCC_PHYDM_OFFLOAD -+ #endif /* CONFIG_MCC_MODE */ -+ -+ #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) -+ #define CONFIG_TDLS_CH_SW_V2 -+ #endif -+ -+ #ifndef RTW_CHANNEL_SWITCH_OFFLOAD -+ #ifdef CONFIG_TDLS_CH_SW_V2 -+ #define RTW_CHANNEL_SWITCH_OFFLOAD -+ #endif -+ #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ -+ -+ #if defined(CONFIG_RTW_MESH) && !defined(RTW_PER_CMD_SUPPORT_FW) -+ /* Supported since fw v22.1 */ -+ #define RTW_PER_CMD_SUPPORT_FW -+ #endif /* RTW_PER_CMD_SUPPORT_FW */ -+ #define CONFIG_SUPPORT_FIFO_DUMP -+ #define CONFIG_HW_P0_TSF_SYNC -+ #define CONFIG_BCN_RECV_TIME -+ #ifdef CONFIG_P2P_PS -+ #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifdef CONFIG_LPS -+ #define CONFIG_LPS_ACK /* Supported after FW v30 & v27.9 */ -+ #endif -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif /* CONFIG_RTL8822B */ -+ -+#ifdef CONFIG_RTL8822C -+ #undef RTL8822C_SUPPORT -+ #define RTL8822C_SUPPORT 1 -+ /*#define DBG_LA_MODE*/ -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif /* CONFIG_FW_C2H_PKT */ -+ #define RTW_TX_PA_BIAS /* Adjust TX PA Bias from eFuse */ -+ -+ #ifdef CONFIG_WOWLAN -+ #define CONFIG_GTK_OL -+ /*#define CONFIG_ARP_KEEP_ALIVE*/ -+ -+ #ifdef CONFIG_GPIO_WAKEUP -+ #ifndef WAKEUP_GPIO_IDX -+ #define WAKEUP_GPIO_IDX 6 /* WIFI Chip Side */ -+ #endif /* !WAKEUP_GPIO_IDX */ -+ #endif /* CONFIG_GPIO_WAKEUP */ -+ #endif /* CONFIG_WOWLAN */ -+ -+ #ifdef CONFIG_CONCURRENT_MODE -+ #define CONFIG_AP_PORT_SWAP -+ #define CONFIG_FW_MULTI_PORT_SUPPORT -+ #endif /* CONFIG_CONCURRENT_MODE */ -+ -+ /* -+ * Beamforming related definition -+ */ -+ /* Only support new beamforming mechanism */ -+ #ifdef CONFIG_BEAMFORMING -+ #define RTW_BEAMFORMING_VERSION_2 -+ #endif /* CONFIG_BEAMFORMING */ -+ -+ #ifdef CONFIG_NO_FW -+ #ifdef CONFIG_RTW_MAC_HIDDEN_RPT -+ #undef CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ #else -+ #ifndef CONFIG_RTW_MAC_HIDDEN_RPT -+ #define CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ #endif -+ -+ #ifndef DBG_RX_DFRAME_RAW_DATA -+ #define DBG_RX_DFRAME_RAW_DATA -+ #endif /* DBG_RX_DFRAME_RAW_DATA */ -+ -+ #ifndef RTW_IQK_FW_OFFLOAD -+ /* #define RTW_IQK_FW_OFFLOAD */ -+ #endif /* RTW_IQK_FW_OFFLOAD */ -+ #define CONFIG_ADVANCE_OTA -+ -+ #ifdef CONFIG_MCC_MODE -+ #define CONFIG_MCC_MODE_V2 -+ #define CONFIG_MCC_PHYDM_OFFLOAD -+ #endif /* CONFIG_MCC_MODE */ -+ -+ #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) -+ #define CONFIG_TDLS_CH_SW_V2 -+ #endif -+ -+ #ifndef RTW_CHANNEL_SWITCH_OFFLOAD -+ #ifdef CONFIG_TDLS_CH_SW_V2 -+ #define RTW_CHANNEL_SWITCH_OFFLOAD -+ #endif -+ #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ -+ -+ #if defined(CONFIG_RTW_MESH) && !defined(RTW_PER_CMD_SUPPORT_FW) -+ /* Supported since fw v22.1 */ -+ #define RTW_PER_CMD_SUPPORT_FW -+ #endif /* RTW_PER_CMD_SUPPORT_FW */ -+ #define CONFIG_SUPPORT_FIFO_DUMP -+ #define CONFIG_HW_P0_TSF_SYNC -+ #define CONFIG_BCN_RECV_TIME -+ -+ /*#define CONFIG_TCP_CSUM_OFFLOAD_TX*/ -+ #if defined(CONFIG_TCP_CSUM_OFFLOAD_TX) && !defined(CONFIG_RTW_NETIF_SG) -+ #define CONFIG_RTW_NETIF_SG -+ #endif -+ #define CONFIG_TCP_CSUM_OFFLOAD_RX -+ -+ #ifdef CONFIG_P2P_PS -+ #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifdef CONFIG_LPS -+ #define CONFIG_LPS_ACK /* Supported after FW v07 */ -+ #define CONFIG_LPS_1T1R /* Supported after FW v07 */ -+ #endif -+ -+ #define CONFIG_BT_EFUSE_MASK -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+ #ifndef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET -+ #define CONFIG_TXPWR_PG_WITH_TSSI_OFFSET -+ #endif -+ -+ #define CONFIG_RTL8822C_XCAP_NEW_POLICY -+ -+ #define CONFIG_SUPPORT_DYNAMIC_TXPWR -+#endif /* CONFIG_RTL8822C */ -+ -+#ifdef CONFIG_RTL8821C -+ #undef RTL8821C_SUPPORT -+ #define RTL8821C_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #ifdef CONFIG_NO_FW -+ #ifdef CONFIG_RTW_MAC_HIDDEN_RPT -+ #undef CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ #else -+ #ifndef CONFIG_RTW_MAC_HIDDEN_RPT -+ #define CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ #endif -+ #define LOAD_FW_HEADER_FROM_DRIVER -+ #define CONFIG_PHY_CAPABILITY_QUERY -+ #ifdef CONFIG_CONCURRENT_MODE -+ #define CONFIG_AP_PORT_SWAP -+ #define CONFIG_FW_MULTI_PORT_SUPPORT -+ #endif -+ #define CONFIG_SUPPORT_FIFO_DUMP -+ #ifndef RTW_IQK_FW_OFFLOAD -+ #define RTW_IQK_FW_OFFLOAD -+ #endif /* RTW_IQK_FW_OFFLOAD */ -+ /*#define CONFIG_AMPDU_PRETX_CD*/ -+ /*#define DBG_PRE_TX_HANG*/ -+ -+ /* Beamforming related definition */ -+ /* Only support new beamforming mechanism */ -+ #ifdef CONFIG_BEAMFORMING -+ #define RTW_BEAMFORMING_VERSION_2 -+ #endif /* CONFIG_BEAMFORMING */ -+ #define CONFIG_HW_P0_TSF_SYNC -+ #define CONFIG_BCN_RECV_TIME -+ #ifdef CONFIG_P2P_PS -+ #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifdef CONFIG_LPS -+ /* #define CONFIG_LPS_ACK */ /* Supported after FW v25 */ -+ #endif -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+ -+ #define CONFIG_BT_EFUSE_MASK -+#endif /*CONFIG_RTL8821C*/ -+ -+#ifdef CONFIG_RTL8710B -+ #undef RTL8710B_SUPPORT -+ #define RTL8710B_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+#endif -+ -+#ifdef CONFIG_RTL8814B -+ #undef RTL8814B_SUPPORT -+ #define RTL8814B_SUPPORT 1 -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif /* CONFIG_FW_C2H_PKT */ -+ #define RTW_TX_PA_BIAS /* Adjust TX PA Bias from eFuse */ -+ #define RTW_AMPDU_AGG_RETRY_AND_NEW -+ -+ #ifdef CONFIG_WOWLAN -+ #define CONFIG_GTK_OL -+ /*#define CONFIG_ARP_KEEP_ALIVE*/ -+ -+ #ifdef CONFIG_GPIO_WAKEUP -+ #ifndef WAKEUP_GPIO_IDX -+ #define WAKEUP_GPIO_IDX 6 /* WIFI Chip Side */ -+ #endif /* !WAKEUP_GPIO_IDX */ -+ #endif /* CONFIG_GPIO_WAKEUP */ -+ #endif /* CONFIG_WOWLAN */ -+ -+ #ifdef CONFIG_CONCURRENT_MODE -+ /*#define CONFIG_AP_PORT_SWAP*/ -+ #define CONFIG_FW_MULTI_PORT_SUPPORT -+ #endif /* CONFIG_CONCURRENT_MODE */ -+ -+ /* -+ * Beamforming related definition -+ */ -+ /* Only support new beamforming mechanism */ -+ #ifdef CONFIG_BEAMFORMING -+ #define RTW_BEAMFORMING_VERSION_2 -+ #endif /* CONFIG_BEAMFORMING */ -+ -+ #ifndef DBG_RX_DFRAME_RAW_DATA -+ #define DBG_RX_DFRAME_RAW_DATA -+ #endif /* DBG_RX_DFRAME_RAW_DATA */ -+ -+ #ifndef RTW_IQK_FW_OFFLOAD -+ #define RTW_IQK_FW_OFFLOAD -+ #endif /* RTW_IQK_FW_OFFLOAD */ -+ -+ /* Checksum offload feature */ -+ /*#define CONFIG_TCP_CSUM_OFFLOAD_TX*/ /* not ready */ -+ #define CONFIG_TCP_CSUM_OFFLOAD_RX -+ -+ #define CONFIG_ADVANCE_OTA -+ -+ #ifdef CONFIG_MCC_MODE -+ #define CONFIG_MCC_MODE_V2 -+ #define CONFIG_MCC_PHYDM_OFFLOAD -+ #endif /* CONFIG_MCC_MODE */ -+ -+ #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) -+ #define CONFIG_TDLS_CH_SW_V2 -+ #endif -+ -+ #ifndef RTW_CHANNEL_SWITCH_OFFLOAD -+ #ifdef CONFIG_TDLS_CH_SW_V2 -+ #define RTW_CHANNEL_SWITCH_OFFLOAD -+ #endif -+ #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ -+ -+ #if defined(CONFIG_RTW_MESH) && !defined(RTW_PER_CMD_SUPPORT_FW) -+ /* Supported since fw v22.1 */ -+ #define RTW_PER_CMD_SUPPORT_FW -+ #endif /* RTW_PER_CMD_SUPPORT_FW */ -+ #define CONFIG_SUPPORT_FIFO_DUMP -+ #define CONFIG_HW_P0_TSF_SYNC -+ #define CONFIG_BCN_RECV_TIME -+ #ifdef CONFIG_P2P_PS -+ #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+ #endif -+ #define CONFIG_RTS_FULL_BW -+ -+ #define CONFIG_PROTSEL_PORT -+ #define CONFIG_PROTSEL_ATIMDTIM -+ #define CONFIG_PROTSEL_MACSLEEP -+ -+ #define CONFIG_HAS_HW_VAR_BCN_CTRL_ADDR -+ #define CONFIG_HAS_HW_VAR_BCN_FUNC -+ #define CONFIG_HAS_HW_VAR_MLME_DISCONNECT -+ #define CONFIG_HAS_HW_VAR_MLME_JOIN -+ #define CONFIG_HAS_HW_VAR_CORRECT_TSF -+ #define CONFIG_HAS_TX_BEACON_PAUSE -+ -+ #define CONFIG_RTW_TX_NPATH_EN /* 8814B is always 4TX */ -+ -+ #ifdef CONFIG_LPS -+ #define CONFIG_LPS_ACK /* Supported after FW v04 */ -+ #endif -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+ #ifndef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET -+ #define CONFIG_TXPWR_PG_WITH_TSSI_OFFSET -+ #endif -+#endif /* CONFIG_RTL8814B */ -+#ifdef CONFIG_RTL8723F -+ #undef RTL8723F_SUPPORT -+ #define RTL8723F_SUPPORT 1 -+ -+ /* Use HALMAC architecture, necessary for 8723F */ -+ #define RTW_HALMAC -+ -+ /*#define DBG_LA_MODE*/ -+ -+ #ifndef CONFIG_FW_C2H_PKT -+ #define CONFIG_FW_C2H_PKT -+ #endif /* CONFIG_FW_C2H_PKT */ -+ -+ #define RTW_TX_PA_BIAS /* Adjust TX PA Bias from eFuse */ -+ -+ #ifdef CONFIG_WOWLAN -+ #define CONFIG_WOW_PATTERN_IN_TXFIFO -+ #endif -+ -+#if 0 /* todo: 8723F , need to check in the future */ -+ #ifdef CONFIG_WOWLAN -+ #define CONFIG_GTK_OL -+ /*#define CONFIG_ARP_KEEP_ALIVE*/ -+ -+ #ifdef CONFIG_GPIO_WAKEUP -+ #ifndef WAKEUP_GPIO_IDX -+ #define WAKEUP_GPIO_IDX 6 /* WIFI Chip Side */ -+ #endif /* !WAKEUP_GPIO_IDX */ -+ #endif /* CONFIG_GPIO_WAKEUP */ -+ #endif /* CONFIG_WOWLAN */ -+#endif -+ -+ #ifdef CONFIG_CONCURRENT_MODE -+ #define CONFIG_AP_PORT_SWAP -+ #define CONFIG_FW_MULTI_PORT_SUPPORT -+ #endif /* CONFIG_CONCURRENT_MODE */ -+ -+ #ifdef CONFIG_NO_FW -+ #ifdef CONFIG_RTW_MAC_HIDDEN_RPT -+ #undef CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ #else -+ #ifndef CONFIG_RTW_MAC_HIDDEN_RPT -+ #define CONFIG_RTW_MAC_HIDDEN_RPT -+ #endif -+ #endif -+ -+ #ifndef DBG_RX_DFRAME_RAW_DATA -+ #define DBG_RX_DFRAME_RAW_DATA -+ #endif /* DBG_RX_DFRAME_RAW_DATA */ -+ -+ /*#define RTW_IQK_FW_OFFLOAD*/ -+ #define CONFIG_ADVANCE_OTA -+ -+ #ifdef CONFIG_MCC_MODE -+ #define CONFIG_MCC_MODE_V2 -+ #define CONFIG_MCC_PHYDM_OFFLOAD -+ #endif /* CONFIG_MCC_MODE */ -+ -+ #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) -+ #define CONFIG_TDLS_CH_SW_V2 -+ #endif -+ -+ #ifndef RTW_CHANNEL_SWITCH_OFFLOAD -+ #ifdef CONFIG_TDLS_CH_SW_V2 -+ #define RTW_CHANNEL_SWITCH_OFFLOAD -+ #endif -+ #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ -+ -+ #if defined(CONFIG_RTW_MESH) && !defined(RTW_PER_CMD_SUPPORT_FW) -+ /* Supported since fw v22.1 */ -+ #define RTW_PER_CMD_SUPPORT_FW -+ #endif /* RTW_PER_CMD_SUPPORT_FW */ -+ #define CONFIG_SUPPORT_FIFO_DUMP -+ #define CONFIG_HW_P0_TSF_SYNC -+ #define CONFIG_BCN_RECV_TIME -+ -+ /*#define CONFIG_TCP_CSUM_OFFLOAD_TX*/ -+ #if defined(CONFIG_TCP_CSUM_OFFLOAD_TX) && !defined(CONFIG_RTW_NETIF_SG) -+ #define CONFIG_RTW_NETIF_SG -+ #endif -+ #define CONFIG_TCP_CSUM_OFFLOAD_RX -+ -+ #ifdef CONFIG_P2P_PS -+ #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+ #endif -+ -+ #define CONFIG_RTS_FULL_BW -+ -+ #ifdef CONFIG_LPS -+ #define CONFIG_LPS_ACK -+ #endif -+ -+ #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #define CONFIG_TXPWR_PG_WITH_PWR_IDX -+ #endif -+ #ifndef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET -+ #define CONFIG_TXPWR_PG_WITH_TSSI_OFFSET -+ #endif -+#endif /* CONFIG_RTL8723F */ -+#endif /*__HAL_IC_CFG_H__*/ -diff --git a/drivers/staging/rtl8723cs/include/hal_intf.h b/drivers/staging/rtl8723cs/include/hal_intf.h -new file mode 100644 -index 000000000000..945f19a9ed50 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_intf.h -@@ -0,0 +1,909 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_INTF_H__ -+#define __HAL_INTF_H__ -+ -+ -+enum RTL871X_HCI_TYPE { -+ RTW_PCIE = BIT0, -+ RTW_USB = BIT1, -+ RTW_SDIO = BIT2, -+ RTW_GSPI = BIT3, -+}; -+ -+enum _CHIP_TYPE { -+ -+ NULL_CHIP_TYPE, -+ RTL8188E, -+ RTL8192E, -+ RTL8812, -+ RTL8821, /* RTL8811 */ -+ RTL8723B, -+ RTL8814A, -+ RTL8703B, -+ RTL8188F, -+ RTL8188GTV, -+ RTL8822B, -+ RTL8723D, -+ RTL8821C, -+ RTL8710B, -+ RTL8192F, -+ RTL8822C, -+ RTL8814B, -+ RTL8723F, -+ MAX_CHIP_TYPE -+}; -+ -+#ifdef RTW_HALMAC -+enum fw_mem { -+ FW_EMEM, -+ FW_IMEM, -+ FW_DMEM, -+}; -+#endif -+ -+extern const u32 _chip_type_to_odm_ic_type[]; -+#define chip_type_to_odm_ic_type(chip_type) (((chip_type) >= MAX_CHIP_TYPE) ? _chip_type_to_odm_ic_type[MAX_CHIP_TYPE] : _chip_type_to_odm_ic_type[(chip_type)]) -+ -+typedef enum _HAL_HW_TIMER_TYPE { -+ HAL_TIMER_NONE = 0, -+ HAL_TIMER_TXBF = 1, -+ HAL_TIMER_EARLYMODE = 2, -+} HAL_HW_TIMER_TYPE, *PHAL_HW_TIMER_TYPE; -+ -+ -+typedef enum _HW_VARIABLES { -+ HW_VAR_MEDIA_STATUS, -+ HW_VAR_SET_OPMODE, -+ HW_VAR_MAC_ADDR, -+ HW_VAR_BSSID, -+ HW_VAR_INIT_RTS_RATE, -+ HW_VAR_BASIC_RATE, -+ HW_VAR_TXPAUSE, -+ HW_VAR_BCN_FUNC, -+ HW_VAR_BCN_CTRL_ADDR, -+ HW_VAR_CORRECT_TSF, -+ HW_VAR_RCR, -+ HW_VAR_MLME_DISCONNECT, -+ HW_VAR_MLME_SITESURVEY, -+ HW_VAR_MLME_JOIN, -+ HW_VAR_ON_RCR_AM, -+ HW_VAR_OFF_RCR_AM, -+ HW_VAR_BEACON_INTERVAL, -+ HW_VAR_SLOT_TIME, -+ HW_VAR_RESP_SIFS, -+ HW_VAR_ACK_PREAMBLE, -+ HW_VAR_SEC_CFG, -+ HW_VAR_SEC_DK_CFG, -+ HW_VAR_BCN_VALID, -+ HW_VAR_FREECNT, -+ -+ /* PHYDM odm->SupportAbility */ -+ HW_VAR_CAM_EMPTY_ENTRY, -+ HW_VAR_CAM_INVALID_ALL, -+ HW_VAR_AC_PARAM_VO, -+ HW_VAR_AC_PARAM_VI, -+ HW_VAR_AC_PARAM_BE, -+ HW_VAR_AC_PARAM_BK, -+ HW_VAR_ACM_CTRL, -+#ifdef CONFIG_WMMPS_STA -+ HW_VAR_UAPSD_TID, -+#endif /* CONFIG_WMMPS_STA */ -+ HW_VAR_AMPDU_MIN_SPACE, -+#ifdef CONFIG_80211N_HT -+ HW_VAR_AMPDU_FACTOR, -+#endif /* CONFIG_80211N_HT */ -+ HW_VAR_RXDMA_AGG_PG_TH, -+ HW_VAR_SET_RPWM, -+ HW_VAR_CPWM, -+ HW_VAR_H2C_FW_PWRMODE, -+ HW_VAR_H2C_FW_PWRMODE_RFON_CTRL, -+ HW_VAR_H2C_INACTIVE_IPS, -+ HW_VAR_H2C_PS_TUNE_PARAM, -+ HW_VAR_H2C_FW_JOINBSSRPT, -+ HW_VAR_FWLPS_RF_ON, -+ HW_VAR_H2C_FW_P2P_PS_OFFLOAD, -+#ifdef CONFIG_LPS_POFF -+ HW_VAR_LPS_POFF_INIT, -+ HW_VAR_LPS_POFF_DEINIT, -+ HW_VAR_LPS_POFF_SET_MODE, -+ HW_VAR_LPS_POFF_WOW_EN, -+#endif -+#ifdef CONFIG_LPS_PG -+ HW_VAR_LPS_PG_HANDLE, -+#endif -+ HW_VAR_TRIGGER_GPIO_0, -+ HW_VAR_BT_SET_COEXIST, -+ HW_VAR_BT_ISSUE_DELBA, -+ HW_VAR_SWITCH_EPHY_WoWLAN, -+ HW_VAR_EFUSE_USAGE, -+ HW_VAR_EFUSE_BYTES, -+ HW_VAR_EFUSE_BT_USAGE, -+ HW_VAR_EFUSE_BT_BYTES, -+ HW_VAR_FIFO_CLEARN_UP, -+ HW_VAR_RESTORE_HW_SEQ, -+ HW_VAR_CHECK_TXBUF, -+ HW_VAR_PCIE_STOP_TX_DMA, -+ HW_VAR_APFM_ON_MAC, /* Auto FSM to Turn On, include clock, isolation, power control for MAC only */ -+ HW_VAR_HCI_SUS_STATE, -+ /* The valid upper nav range for the HW updating, if the true value is larger than the upper range, the HW won't update it. */ -+ /* Unit in microsecond. 0 means disable this function. */ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ HW_VAR_WOWLAN, -+ HW_VAR_WAKEUP_REASON, -+#endif -+ HW_VAR_RPWM_TOG, -+#ifdef CONFIG_GPIO_WAKEUP -+ HW_VAR_WOW_OUTPUT_GPIO, -+ HW_VAR_WOW_INPUT_GPIO, -+ HW_SET_GPIO_WL_CTRL, -+#endif -+ HW_VAR_SYS_CLKR, -+ HW_VAR_NAV_UPPER, -+ HW_VAR_RPT_TIMER_SETTING, -+ HW_VAR_TX_RPT_MAX_MACID, -+ HW_VAR_CHK_HI_QUEUE_EMPTY, -+ HW_VAR_CHK_MGQ_CPU_EMPTY, -+ HW_VAR_DL_BCN_SEL, -+ HW_VAR_AMPDU_MAX_TIME, -+ HW_VAR_WIRELESS_MODE, -+ HW_VAR_USB_MODE, -+ HW_VAR_PORT_SWITCH, -+ HW_VAR_PORT_CFG, -+ HW_VAR_DO_IQK, -+ HW_VAR_DM_IN_LPS_LCLK,/*flag CONFIG_LPS_LCLK_WD_TIMER*/ -+ HW_VAR_SET_REQ_FW_PS, -+ HW_VAR_FW_PS_STATE, -+ HW_VAR_SOUNDING_ENTER, -+ HW_VAR_SOUNDING_LEAVE, -+ HW_VAR_SOUNDING_RATE, -+ HW_VAR_SOUNDING_STATUS, -+ HW_VAR_SOUNDING_FW_NDPA, -+ HW_VAR_SOUNDING_CLK, -+ HW_VAR_SOUNDING_SET_GID_TABLE, -+ HW_VAR_SOUNDING_CSI_REPORT, -+ /*Add by YuChen for TXBF HW timer*/ -+ HW_VAR_HW_REG_TIMER_INIT, -+ HW_VAR_HW_REG_TIMER_RESTART, -+ HW_VAR_HW_REG_TIMER_START, -+ HW_VAR_HW_REG_TIMER_STOP, -+ /*Add by YuChen for TXBF HW timer*/ -+ HW_VAR_DL_RSVD_PAGE, -+ HW_VAR_MACID_LINK, -+ HW_VAR_MACID_NOLINK, -+ HW_VAR_DUMP_MAC_QUEUE_INFO, -+ HW_VAR_ASIX_IOT, -+#ifdef CONFIG_MBSSID_CAM -+ HW_VAR_MBSSID_CAM_WRITE, -+ HW_VAR_MBSSID_CAM_CLEAR, -+ HW_VAR_RCR_MBSSID_EN, -+#endif -+ HW_VAR_EN_HW_UPDATE_TSF, -+ HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, -+ HW_VAR_CH_SW_IQK_INFO_BACKUP, -+ HW_VAR_CH_SW_IQK_INFO_RESTORE, -+ -+ HW_VAR_DBI, -+ HW_VAR_MDIO, -+ HW_VAR_L1OFF_CAPABILITY, -+ HW_VAR_L1OFF_NIC_SUPPORT, -+ HW_VAR_BCN_EARLY_C2H_RPT, -+ HW_VAR_SET_DRV_ERLY_INT, -+ HW_VAR_DUMP_MAC_TXFIFO, -+ HW_VAR_PWR_CMD, -+#ifdef CONFIG_FW_HANDLE_TXBCN -+ HW_VAR_BCN_HEAD_SEL, -+#endif -+ HW_VAR_SET_SOML_PARAM, -+ HW_VAR_ENABLE_RX_BAR, -+ HW_VAR_TSF_AUTO_SYNC, -+ HW_VAR_LPS_STATE_CHK, -+ HW_VAR_LPS_RFON_CHK, -+ #ifdef CONFIG_RTS_FULL_BW -+ HW_VAR_SET_RTS_BW, -+ #endif -+#if defined(CONFIG_PCI_HCI) -+ HW_VAR_ENSWBCN, -+#endif -+#ifdef CONFIG_WOWLAN -+ HW_VAR_VENDOR_WOW_MODE, -+#endif /* CONFIG_WOWLAN */ -+} HW_VARIABLES; -+ -+typedef enum _HAL_DEF_VARIABLE { -+ HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, -+ HAL_DEF_IS_SUPPORT_ANT_DIV, -+ HAL_DEF_DRVINFO_SZ, -+ HAL_DEF_MAX_RECVBUF_SZ, -+ HAL_DEF_RX_PACKET_OFFSET, -+ HAL_DEF_RX_DMA_SZ_WOW, -+ HAL_DEF_RX_DMA_SZ, -+ HAL_DEF_RX_PAGE_SIZE, -+ HAL_DEF_DBG_DUMP_RXPKT,/* for dbg */ -+ HAL_DEF_RA_DECISION_RATE, -+ HAL_DEF_RA_SGI, -+ HAL_DEF_PT_PWR_STATUS, -+ HAL_DEF_TX_LDPC, /* LDPC support */ -+ HAL_DEF_RX_LDPC, /* LDPC support */ -+ HAL_DEF_TX_STBC, /* TX STBC support */ -+ HAL_DEF_RX_STBC, /* RX STBC support */ -+ HAL_DEF_EXPLICIT_BEAMFORMER,/* Explicit Compressed Steering Capable */ -+ HAL_DEF_EXPLICIT_BEAMFORMEE,/* Explicit Compressed Beamforming Feedback Capable */ -+ HAL_DEF_VHT_MU_BEAMFORMER, /* VHT MU Beamformer support */ -+ HAL_DEF_VHT_MU_BEAMFORMEE, /* VHT MU Beamformee support */ -+ HAL_DEF_BEAMFORMER_CAP, -+ HAL_DEF_BEAMFORMEE_CAP, -+ HW_VAR_MAX_RX_AMPDU_FACTOR, -+ HW_DEF_RA_INFO_DUMP, -+ HAL_DEF_DBG_DUMP_TXPKT, -+ -+ HAL_DEF_TX_PAGE_SIZE, -+ HAL_DEF_TX_PAGE_BOUNDARY, -+ HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN, -+ HAL_DEF_TX_BUFFER_LAST_ENTRY, -+ HAL_DEF_ANT_DETECT,/* to do for 8723a */ -+ HAL_DEF_PCI_ASPM_OSC, /* Support for ASPM OSC, added by Roger, 2013.03.27. */ -+ HAL_DEF_EFUSE_USAGE, /* Get current EFUSE utilization. 2008.12.19. Added by Roger. */ -+ HAL_DEF_EFUSE_BYTES, -+ HW_VAR_BEST_AMPDU_DENSITY, -+} HAL_DEF_VARIABLE; -+ -+typedef enum _HAL_ODM_VARIABLE { -+ HAL_ODM_STA_INFO, -+ HAL_ODM_P2P_STATE, -+ HAL_ODM_WIFI_DISPLAY_STATE, -+ HAL_ODM_REGULATION, -+ HAL_ODM_INITIAL_GAIN, -+ HAL_ODM_RX_INFO_DUMP, -+ HAL_ODM_RX_Dframe_INFO, -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ HAL_ODM_ANTDIV_SELECT -+#endif -+} HAL_ODM_VARIABLE; -+ -+typedef enum _HAL_INTF_PS_FUNC { -+ HAL_USB_SELECT_SUSPEND, -+ HAL_MAX_ID, -+} HAL_INTF_PS_FUNC; -+ -+typedef s32(*c2h_id_filter)(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); -+ -+struct txpwr_idx_comp; -+ -+struct hal_ops { -+ /*** initialize section ***/ -+ void (*read_chip_version)(_adapter *padapter); -+ void (*init_default_value)(_adapter *padapter); -+ void (*intf_chip_configure)(_adapter *padapter); -+ u8 (*read_adapter_info)(_adapter *padapter); -+ u32(*hal_power_on)(_adapter *padapter); -+ void (*hal_power_off)(_adapter *padapter); -+ u32(*hal_init)(_adapter *padapter); -+ u32(*hal_deinit)(_adapter *padapter); -+ void (*dm_init)(_adapter *padapter); -+ void (*dm_deinit)(_adapter *padapter); -+ -+ /*** xmit section ***/ -+ s32(*init_xmit_priv)(_adapter *padapter); -+ void (*free_xmit_priv)(_adapter *padapter); -+ s32(*hal_xmit)(_adapter *padapter, struct xmit_frame *pxmitframe); -+ /* -+ * mgnt_xmit should be implemented to run in interrupt context -+ */ -+ s32(*mgnt_xmit)(_adapter *padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32(*hal_mgmt_xmitframe_enqueue)(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32(*hal_xmitframe_enqueue)(_adapter *padapter, struct xmit_frame *pxmitframe); -+#ifdef CONFIG_XMIT_THREAD_MODE -+ s32(*xmit_thread_handler)(_adapter *padapter); -+#endif -+ void (*run_thread)(_adapter *padapter); -+ void (*cancel_thread)(_adapter *padapter); -+ -+ /*** recv section ***/ -+ s32(*init_recv_priv)(_adapter *padapter); -+ void (*free_recv_priv)(_adapter *padapter); -+#ifdef CONFIG_RECV_THREAD_MODE -+ s32 (*recv_hdl)(_adapter *adapter); -+#endif -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) -+ u32(*inirp_init)(_adapter *padapter); -+ u32(*inirp_deinit)(_adapter *padapter); -+#endif -+ /*** interrupt hdl section ***/ -+ void (*enable_interrupt)(_adapter *padapter); -+ void (*disable_interrupt)(_adapter *padapter); -+ u8(*check_ips_status)(_adapter *padapter); -+#if defined(CONFIG_PCI_HCI) -+ s32(*interrupt_handler)(_adapter *padapter); -+ void (*unmap_beacon_icf)(_adapter *padapter); -+#endif -+ -+#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) -+ void (*interrupt_handler)(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif -+ -+#if defined(CONFIG_PCI_HCI) -+ void (*irp_reset)(_adapter *padapter); -+#endif -+ -+ /*** DM section ***/ -+#ifdef CONFIG_RTW_SW_LED -+ void (*InitSwLeds)(_adapter *padapter); -+ void (*DeInitSwLeds)(_adapter *padapter); -+#endif -+ void (*set_chnl_bw_handler)(_adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80); -+ -+ void (*set_tx_power_level_handler)(_adapter *adapter, u8 channel); -+ void (*set_txpwr_done)(_adapter *adapter); -+ void (*set_tx_power_index_handler)(_adapter *adapter, u32 powerindex, enum rf_path rfpath, u8 rate); -+ -+ u8 (*get_tx_power_index_handler)(_adapter *adapter, enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate -+ , enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch, struct txpwr_idx_comp *tic); -+ s8 (*get_txpwr_target_extra_bias)(_adapter *adapter, enum rf_path rfpath, RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch); -+ -+ void (*hal_dm_watchdog)(_adapter *padapter); -+ -+ u8 (*set_hw_reg_handler)(_adapter *padapter, u8 variable, u8 *val); -+ -+ void (*GetHwRegHandler)(_adapter *padapter, u8 variable, u8 *val); -+ -+ -+ -+ u8 (*get_hal_def_var_handler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue); -+ -+ u8(*SetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue); -+ -+ void (*GetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, void *pValue2); -+ void (*SetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, BOOLEAN bSet); -+ -+ void (*SetBeaconRelatedRegistersHandler)(_adapter *padapter); -+ -+ u8(*interface_ps_func)(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val); -+ -+ u32(*read_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask); -+ void (*write_bbreg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); -+ u32 (*read_rfreg)(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask); -+ void (*write_rfreg)(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data); -+#ifdef CONFIG_SYSON_INDIRECT_ACCESS -+ u32 (*read_syson_reg)(_adapter *padapter, u32 RegAddr, u32 BitMask); -+ void (*write_syson_reg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); -+#endif -+ void (*read_wmmedca_reg)(_adapter *padapter, u16 *vo_params, u16 *vi_params, u16 *be_params, u16 *bk_params); -+ -+#ifdef CONFIG_HOSTAPD_MLME -+ s32(*hostap_mgnt_xmit_entry)(_adapter *padapter, _pkt *pkt); -+#endif -+ -+ void (*EfusePowerSwitch)(_adapter *padapter, u8 bWrite, u8 PwrState); -+ void (*BTEfusePowerSwitch)(_adapter *padapter, u8 bWrite, u8 PwrState); -+ void (*ReadEFuse)(_adapter *padapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, BOOLEAN bPseudoTest); -+ void (*EFUSEGetEfuseDefinition)(_adapter *padapter, u8 efuseType, u8 type, void *pOut, BOOLEAN bPseudoTest); -+ u16(*EfuseGetCurrentSize)(_adapter *padapter, u8 efuseType, BOOLEAN bPseudoTest); -+ int (*Efuse_PgPacketRead)(_adapter *padapter, u8 offset, u8 *data, BOOLEAN bPseudoTest); -+ int (*Efuse_PgPacketWrite)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); -+ u8(*Efuse_WordEnableDataWrite)(_adapter *padapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest); -+ BOOLEAN(*Efuse_PgPacketWrite_BT)(_adapter *padapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); -+#if defined(CONFIG_RTL8710B) -+ BOOLEAN(*efuse_indirect_read4)(_adapter *padapter, u16 regaddr, u8 *value); -+#endif -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ void (*sreset_init_value)(_adapter *padapter); -+ void (*sreset_reset_value)(_adapter *padapter); -+ void (*silentreset)(_adapter *padapter); -+ void (*sreset_xmit_status_check)(_adapter *padapter); -+ void (*sreset_linked_status_check)(_adapter *padapter); -+ u8(*sreset_get_wifi_status)(_adapter *padapter); -+ bool (*sreset_inprogress)(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_IOL -+ int (*IOL_exec_cmds_sync)(_adapter *padapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); -+#endif -+ -+ void (*hal_notch_filter)(_adapter *adapter, bool enable); -+#ifdef RTW_HALMAC -+ void (*hal_mac_c2h_handler)(_adapter *adapter, u8 *pbuf, u16 length); -+#else -+ s32(*c2h_handler)(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); -+#endif -+ void (*reqtxrpt)(_adapter *padapter, u8 macid); -+ s32(*fill_h2c_cmd)(PADAPTER, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+ void (*fill_fake_txdesc)(PADAPTER, u8 *pDesc, u32 BufferLen, -+ u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+ s32(*fw_dl)(_adapter *adapter, u8 wowlan); -+#ifdef RTW_HALMAC -+ s32 (*fw_mem_dl)(_adapter *adapter, enum fw_mem mem); -+#endif -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PCI_HCI) -+ void (*clear_interrupt)(_adapter *padapter); -+#endif -+ u8(*hal_get_tx_buff_rsvd_page_num)(_adapter *adapter, bool wowlan); -+#ifdef CONFIG_GPIO_API -+ void (*update_hisr_hsisr_ind)(PADAPTER padapter, u32 flag); -+ int (*hal_gpio_func_check)(_adapter *padapter, u8 gpio_num); -+ void (*hal_gpio_multi_func_reset)(_adapter *padapter, u8 gpio_num); -+#endif -+#ifdef CONFIG_FW_CORRECT_BCN -+ void (*fw_correct_bcn)(PADAPTER padapter); -+#endif -+ -+#ifdef RTW_HALMAC -+ u8(*init_mac_register)(PADAPTER); -+ u8(*init_phy)(PADAPTER); -+#endif /* RTW_HALMAC */ -+ -+#ifdef CONFIG_PCI_HCI -+ void (*hal_set_l1ssbackdoor_handler)(_adapter *padapter, u8 enable); -+#endif -+ -+#ifdef CONFIG_RFKILL_POLL -+ bool (*hal_radio_onoff_check)(_adapter *adapter, u8 *valid); -+#endif -+#ifdef CONFIG_PCI_TX_POLLING -+ void (*tx_poll_handler)(_adapter *adapter); -+#endif -+}; -+ -+typedef enum _RT_EEPROM_TYPE { -+ EEPROM_93C46, -+ EEPROM_93C56, -+ EEPROM_BOOT_EFUSE, -+} RT_EEPROM_TYPE, *PRT_EEPROM_TYPE; -+ -+ -+ -+#define RF_CHANGE_BY_INIT 0 -+#define RF_CHANGE_BY_IPS BIT28 -+#define RF_CHANGE_BY_PS BIT29 -+#define RF_CHANGE_BY_HW BIT30 -+#define RF_CHANGE_BY_SW BIT31 -+ -+typedef enum _HARDWARE_TYPE { -+ HARDWARE_TYPE_RTL8188EE, -+ HARDWARE_TYPE_RTL8188EU, -+ HARDWARE_TYPE_RTL8188ES, -+ /* NEW_GENERATION_IC */ -+ HARDWARE_TYPE_RTL8192EE, -+ HARDWARE_TYPE_RTL8192EU, -+ HARDWARE_TYPE_RTL8192ES, -+ HARDWARE_TYPE_RTL8812E, -+ HARDWARE_TYPE_RTL8812AU, -+ HARDWARE_TYPE_RTL8811AU, -+ HARDWARE_TYPE_RTL8821E, -+ HARDWARE_TYPE_RTL8821U, -+ HARDWARE_TYPE_RTL8821S, -+ HARDWARE_TYPE_RTL8723BE, -+ HARDWARE_TYPE_RTL8723BU, -+ HARDWARE_TYPE_RTL8723BS, -+ HARDWARE_TYPE_RTL8814AE, -+ HARDWARE_TYPE_RTL8814AU, -+ HARDWARE_TYPE_RTL8814AS, -+ HARDWARE_TYPE_RTL8821BE, -+ HARDWARE_TYPE_RTL8821BU, -+ HARDWARE_TYPE_RTL8821BS, -+ HARDWARE_TYPE_RTL8822BE, -+ HARDWARE_TYPE_RTL8822BU, -+ HARDWARE_TYPE_RTL8822BS, -+ HARDWARE_TYPE_RTL8703BE, -+ HARDWARE_TYPE_RTL8703BU, -+ HARDWARE_TYPE_RTL8703BS, -+ HARDWARE_TYPE_RTL8188FE, -+ HARDWARE_TYPE_RTL8188FU, -+ HARDWARE_TYPE_RTL8188FS, -+ HARDWARE_TYPE_RTL8188GTVU, -+ HARDWARE_TYPE_RTL8188GTVS, -+ HARDWARE_TYPE_RTL8723DE, -+ HARDWARE_TYPE_RTL8723DU, -+ HARDWARE_TYPE_RTL8723DS, -+ HARDWARE_TYPE_RTL8821CE, -+ HARDWARE_TYPE_RTL8821CU, -+ HARDWARE_TYPE_RTL8821CS, -+ HARDWARE_TYPE_RTL8710BU, -+ HARDWARE_TYPE_RTL8192FS, -+ HARDWARE_TYPE_RTL8192FU, -+ HARDWARE_TYPE_RTL8192FE, -+ HARDWARE_TYPE_RTL8822CE, -+ HARDWARE_TYPE_RTL8822CU, -+ HARDWARE_TYPE_RTL8822CS, -+ HARDWARE_TYPE_RTL8814BE, -+ HARDWARE_TYPE_RTL8814BU, -+ HARDWARE_TYPE_RTL8814BS, -+ HARDWARE_TYPE_RTL8723FU, -+ HARDWARE_TYPE_RTL8723FS, -+ HARDWARE_TYPE_MAX, -+} HARDWARE_TYPE; -+ -+#define IS_NEW_GENERATION_IC(_Adapter) (rtw_get_hw_type(_Adapter) >= HARDWARE_TYPE_RTL8192EE) -+/* -+ * RTL8188E Series -+ * */ -+#define IS_HARDWARE_TYPE_8188EE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188EE) -+#define IS_HARDWARE_TYPE_8188EU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188EU) -+#define IS_HARDWARE_TYPE_8188ES(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188ES) -+#define IS_HARDWARE_TYPE_8188E(_Adapter) \ -+ (IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || IS_HARDWARE_TYPE_8188ES(_Adapter)) -+ -+/* RTL8812 Series */ -+#define IS_HARDWARE_TYPE_8812E(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8812E) -+#define IS_HARDWARE_TYPE_8812AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8812AU) -+#define IS_HARDWARE_TYPE_8812(_Adapter) \ -+ (IS_HARDWARE_TYPE_8812E(_Adapter) || IS_HARDWARE_TYPE_8812AU(_Adapter)) -+ -+/* RTL8821 Series */ -+#define IS_HARDWARE_TYPE_8821E(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821E) -+#define IS_HARDWARE_TYPE_8811AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8811AU) -+#define IS_HARDWARE_TYPE_8821U(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821U || \ -+ rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8811AU) -+#define IS_HARDWARE_TYPE_8821S(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821S) -+#define IS_HARDWARE_TYPE_8821(_Adapter) \ -+ (IS_HARDWARE_TYPE_8821E(_Adapter) || IS_HARDWARE_TYPE_8821U(_Adapter) || IS_HARDWARE_TYPE_8821S(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_JAGUAR(_Adapter) \ -+ (IS_HARDWARE_TYPE_8812(_Adapter) || IS_HARDWARE_TYPE_8821(_Adapter)) -+ -+/* RTL8192E Series */ -+#define IS_HARDWARE_TYPE_8192EE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192EE) -+#define IS_HARDWARE_TYPE_8192EU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192EU) -+#define IS_HARDWARE_TYPE_8192ES(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192ES) -+ -+#define IS_HARDWARE_TYPE_8192E(_Adapter) \ -+ (IS_HARDWARE_TYPE_8192EE(_Adapter) || IS_HARDWARE_TYPE_8192EU(_Adapter) || IS_HARDWARE_TYPE_8192ES(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_8723BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BE) -+#define IS_HARDWARE_TYPE_8723BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BU) -+#define IS_HARDWARE_TYPE_8723BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723BS) -+ -+#define IS_HARDWARE_TYPE_8723B(_Adapter) \ -+ (IS_HARDWARE_TYPE_8723BE(_Adapter) || IS_HARDWARE_TYPE_8723BU(_Adapter) || IS_HARDWARE_TYPE_8723BS(_Adapter)) -+ -+/* RTL8814A Series */ -+#define IS_HARDWARE_TYPE_8814AE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AE) -+#define IS_HARDWARE_TYPE_8814AU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AU) -+#define IS_HARDWARE_TYPE_8814AS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814AS) -+ -+#define IS_HARDWARE_TYPE_8814A(_Adapter) \ -+ (IS_HARDWARE_TYPE_8814AE(_Adapter) || IS_HARDWARE_TYPE_8814AU(_Adapter) || IS_HARDWARE_TYPE_8814AS(_Adapter)) -+ -+/* RTL8703B Series */ -+#define IS_HARDWARE_TYPE_8703BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BE) -+#define IS_HARDWARE_TYPE_8703BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BS) -+#define IS_HARDWARE_TYPE_8703BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8703BU) -+#define IS_HARDWARE_TYPE_8703B(_Adapter) \ -+ (IS_HARDWARE_TYPE_8703BE(_Adapter) || IS_HARDWARE_TYPE_8703BU(_Adapter) || IS_HARDWARE_TYPE_8703BS(_Adapter)) -+ -+/* RTL8723D Series */ -+#define IS_HARDWARE_TYPE_8723DE(_Adapter)\ -+ (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723DE) -+#define IS_HARDWARE_TYPE_8723DS(_Adapter)\ -+ (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723DS) -+#define IS_HARDWARE_TYPE_8723DU(_Adapter)\ -+ (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723DU) -+#define IS_HARDWARE_TYPE_8723D(_Adapter)\ -+ (IS_HARDWARE_TYPE_8723DE(_Adapter) || \ -+ IS_HARDWARE_TYPE_8723DU(_Adapter) || \ -+ IS_HARDWARE_TYPE_8723DS(_Adapter)) -+ -+/* RTL8192F Series */ -+#define IS_HARDWARE_TYPE_8192FS(_Adapter)\ -+ (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FS) -+#define IS_HARDWARE_TYPE_8192FU(_Adapter)\ -+ (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FU) -+#define IS_HARDWARE_TYPE_8192FE(_Adapter)\ -+ (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FE) -+#define IS_HARDWARE_TYPE_8192F(_Adapter)\ -+ (IS_HARDWARE_TYPE_8192FS(_Adapter) ||\ -+ IS_HARDWARE_TYPE_8192FU(_Adapter) ||\ -+ IS_HARDWARE_TYPE_8192FE(_Adapter)) -+ -+/* RTL8188F Series */ -+#define IS_HARDWARE_TYPE_8188FE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FE) -+#define IS_HARDWARE_TYPE_8188FS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FS) -+#define IS_HARDWARE_TYPE_8188FU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188FU) -+#define IS_HARDWARE_TYPE_8188F(_Adapter) \ -+ (IS_HARDWARE_TYPE_8188FE(_Adapter) || IS_HARDWARE_TYPE_8188FU(_Adapter) || IS_HARDWARE_TYPE_8188FS(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_8188GTVU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188GTVU) -+#define IS_HARDWARE_TYPE_8188GTVS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8188GTVS) -+#define IS_HARDWARE_TYPE_8188GTV(_Adapter) \ -+ (IS_HARDWARE_TYPE_8188GTVU(_Adapter) || IS_HARDWARE_TYPE_8188GTVS(_Adapter)) -+ -+/* RTL8710B Series */ -+#define IS_HARDWARE_TYPE_8710BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8710BU) -+#define IS_HARDWARE_TYPE_8710B(_Adapter) (IS_HARDWARE_TYPE_8710BU(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_8821BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BE) -+#define IS_HARDWARE_TYPE_8821BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BU) -+#define IS_HARDWARE_TYPE_8821BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821BS) -+ -+#define IS_HARDWARE_TYPE_8821B(_Adapter) \ -+ (IS_HARDWARE_TYPE_8821BE(_Adapter) || IS_HARDWARE_TYPE_8821BU(_Adapter) || IS_HARDWARE_TYPE_8821BS(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_8822BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BE) -+#define IS_HARDWARE_TYPE_8822BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BU) -+#define IS_HARDWARE_TYPE_8822BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822BS) -+#define IS_HARDWARE_TYPE_8822B(_Adapter) \ -+ (IS_HARDWARE_TYPE_8822BE(_Adapter) || IS_HARDWARE_TYPE_8822BU(_Adapter) || IS_HARDWARE_TYPE_8822BS(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_8821CE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821CE) -+#define IS_HARDWARE_TYPE_8821CU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821CU) -+#define IS_HARDWARE_TYPE_8821CS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8821CS) -+#define IS_HARDWARE_TYPE_8821C(_Adapter) \ -+ (IS_HARDWARE_TYPE_8821CE(_Adapter) || IS_HARDWARE_TYPE_8821CU(_Adapter) || IS_HARDWARE_TYPE_8821CS(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_8822CE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822CE) -+#define IS_HARDWARE_TYPE_8822CU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822CU) -+#define IS_HARDWARE_TYPE_8822CS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8822CS) -+#define IS_HARDWARE_TYPE_8822C(_Adapter) \ -+ (IS_HARDWARE_TYPE_8822CE(_Adapter) || IS_HARDWARE_TYPE_8822CU(_Adapter) || IS_HARDWARE_TYPE_8822CS(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_8814BE(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814BE) -+#define IS_HARDWARE_TYPE_8814BU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814BU) -+#define IS_HARDWARE_TYPE_8814BS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8814BS) -+#define IS_HARDWARE_TYPE_8814B(_Adapter) \ -+ (IS_HARDWARE_TYPE_8814BE(_Adapter) || IS_HARDWARE_TYPE_8814BU(_Adapter) || IS_HARDWARE_TYPE_8814BS(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_8723FU(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723FU) -+#define IS_HARDWARE_TYPE_8723FS(_Adapter) (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8723FS) -+#define IS_HARDWARE_TYPE_8723F(_Adapter) \ -+ (IS_HARDWARE_TYPE_8723FU(_Adapter) || IS_HARDWARE_TYPE_8723FS(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_JAGUAR2(_Adapter) \ -+ (IS_HARDWARE_TYPE_8814A(_Adapter) || IS_HARDWARE_TYPE_8821B(_Adapter) || IS_HARDWARE_TYPE_8822B(_Adapter) || IS_HARDWARE_TYPE_8821C(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(_Adapter) \ -+ (IS_HARDWARE_TYPE_JAGUAR(_Adapter) || IS_HARDWARE_TYPE_JAGUAR2(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_JAGUAR3(_Adapter) \ -+ (IS_HARDWARE_TYPE_8814B(_Adapter) || IS_HARDWARE_TYPE_8822C(_Adapter)) -+ -+#define IS_HARDWARE_TYPE_JAGUAR3_11N(_Adapter) IS_HARDWARE_TYPE_8723F(_Adapter) -+ -+#define IS_HARDWARE_TYPE_JAGUAR_ALL(_Adapter) \ -+ (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(_Adapter) || IS_HARDWARE_TYPE_JAGUAR3(_Adapter)) -+ -+ -+typedef enum _wowlan_subcode { -+ WOWLAN_ENABLE = 0, -+ WOWLAN_DISABLE = 1, -+ WOWLAN_AP_ENABLE = 2, -+ WOWLAN_AP_DISABLE = 3, -+ WOWLAN_PATTERN_CLEAN = 4 -+} wowlan_subcode; -+ -+struct wowlan_ioctl_param { -+ unsigned int subcode; -+ unsigned int subcode_value; -+ unsigned int wakeup_reason; -+}; -+ -+u8 rtw_hal_data_init(_adapter *padapter); -+void rtw_hal_data_deinit(_adapter *padapter); -+ -+void rtw_hal_def_value_init(_adapter *padapter); -+ -+void rtw_hal_free_data(_adapter *padapter); -+ -+void rtw_hal_dm_init(_adapter *padapter); -+void rtw_hal_dm_deinit(_adapter *padapter); -+#ifdef CONFIG_RTW_SW_LED -+void rtw_hal_sw_led_init(_adapter *padapter); -+void rtw_hal_sw_led_deinit(_adapter *padapter); -+#endif -+u32 rtw_hal_power_on(_adapter *padapter); -+void rtw_hal_power_off(_adapter *padapter); -+ -+uint rtw_hal_init(_adapter *padapter); -+#ifdef CONFIG_NEW_NETDEV_HDL -+uint rtw_hal_iface_init(_adapter *adapter); -+#endif -+ -+enum rf_type rtw_chip_rftype_to_hal_rftype(_adapter *adapter, u8 limit); -+void dump_hal_runtime_trx_mode(void *sel, _adapter *adapter); -+void dump_hal_trx_mode(void *sel, _adapter *adapter); -+u8 rtw_hal_rfpath_init(_adapter *adapter); -+u8 rtw_hal_trxnss_init(_adapter *adapter); -+ -+uint rtw_hal_deinit(_adapter *padapter); -+void rtw_hal_stop(_adapter *padapter); -+u8 rtw_hal_set_hwreg(PADAPTER padapter, u8 variable, u8 *val); -+void rtw_hal_get_hwreg(PADAPTER padapter, u8 variable, u8 *val); -+ -+void rtw_hal_chip_configure(_adapter *padapter); -+u8 rtw_hal_read_chip_info(_adapter *padapter); -+void rtw_hal_read_chip_version(_adapter *padapter); -+ -+u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue); -+u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue); -+ -+void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, BOOLEAN bSet); -+void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, void *pValue2); -+ -+void rtw_hal_enable_interrupt(_adapter *padapter); -+void rtw_hal_disable_interrupt(_adapter *padapter); -+ -+u8 rtw_hal_check_ips_status(_adapter *padapter); -+ -+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI) -+ u32 rtw_hal_inirp_init(_adapter *padapter); -+ u32 rtw_hal_inirp_deinit(_adapter *padapter); -+#endif -+ -+#if defined(CONFIG_PCI_HCI) -+ void rtw_hal_irp_reset(_adapter *padapter); -+void rtw_hal_pci_dbi_write(_adapter *padapter, u16 addr, u8 data); -+u8 rtw_hal_pci_dbi_read(_adapter *padapter, u16 addr); -+void rtw_hal_pci_mdio_write(_adapter *padapter, u8 addr, u16 data); -+u16 rtw_hal_pci_mdio_read(_adapter *padapter, u8 addr); -+u8 rtw_hal_pci_l1off_nic_support(_adapter *padapter); -+u8 rtw_hal_pci_l1off_capability(_adapter *padapter); -+#endif -+ -+u8 rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val); -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+s32 rtw_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); -+s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); -+ -+s32 rtw_hal_init_xmit_priv(_adapter *padapter); -+void rtw_hal_free_xmit_priv(_adapter *padapter); -+ -+s32 rtw_hal_init_recv_priv(_adapter *padapter); -+void rtw_hal_free_recv_priv(_adapter *padapter); -+ -+void rtw_hal_update_ra_mask(struct sta_info *psta); -+ -+void rtw_hal_start_thread(_adapter *padapter); -+void rtw_hal_stop_thread(_adapter *padapter); -+ -+void rtw_hal_bcn_related_reg_setting(_adapter *padapter); -+ -+u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask); -+void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); -+u32 rtw_hal_read_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask); -+void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data); -+ -+ -+#define phy_query_bb_reg(Adapter, RegAddr, BitMask) rtw_hal_read_bbreg((Adapter), (RegAddr), (BitMask)) -+#define phy_set_bb_reg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_bbreg((Adapter), (RegAddr), (BitMask), (Data)) -+#define phy_query_rf_reg(Adapter, eRFPath, RegAddr, BitMask) rtw_hal_read_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask)) -+#define phy_set_rf_reg(Adapter, eRFPath, RegAddr, BitMask, Data) rtw_hal_write_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) -+ -+#ifdef CONFIG_SYSON_INDIRECT_ACCESS -+u32 rtw_hal_read_syson_reg(PADAPTER padapter, u32 RegAddr, u32 BitMask); -+void rtw_hal_write_syson_reg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); -+#define hal_query_syson_reg(Adapter, RegAddr, BitMask) rtw_hal_read_syson_reg((Adapter), (RegAddr), (BitMask)) -+#define hal_set_syson_reg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_syson_reg((Adapter), (RegAddr), (BitMask), (Data)) -+#endif -+ -+#define phy_set_mac_reg phy_set_bb_reg -+#define phy_query_mac_reg phy_query_bb_reg -+ -+#if defined(CONFIG_PCI_HCI) -+ s32 rtw_hal_interrupt_handler(_adapter *padapter); -+ void rtw_hal_unmap_beacon_icf(_adapter *padapter); -+#endif -+#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) -+ void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif -+ -+void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80); -+void rtw_hal_dm_watchdog(_adapter *padapter); -+void rtw_hal_dm_watchdog_in_lps(_adapter *padapter); -+ -+#ifdef CONFIG_HOSTAPD_MLME -+ s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); -+#endif -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+void rtw_hal_sreset_init(_adapter *padapter); -+void rtw_hal_sreset_reset(_adapter *padapter); -+void rtw_hal_sreset_reset_value(_adapter *padapter); -+void rtw_hal_sreset_xmit_status_check(_adapter *padapter); -+void rtw_hal_sreset_linked_status_check(_adapter *padapter); -+u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter); -+bool rtw_hal_sreset_inprogress(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_IOL -+int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); -+#endif -+ -+#ifdef CONFIG_XMIT_THREAD_MODE -+s32 rtw_hal_xmit_thread_handler(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RECV_THREAD_MODE -+s32 rtw_hal_recv_hdl(_adapter *adapter); -+#endif -+ -+void rtw_hal_notch_filter(_adapter *adapter, bool enable); -+ -+#ifdef CONFIG_FW_C2H_REG -+bool rtw_hal_c2h_reg_hdr_parse(_adapter *adapter, u8 *buf, u8 *id, u8 *seq, u8 *plen, u8 **payload); -+bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf); -+s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf); -+#endif -+ -+#ifdef CONFIG_FW_C2H_PKT -+bool rtw_hal_c2h_pkt_hdr_parse(_adapter *adapter, u8 *buf, u16 len, u8 *id, u8 *seq, u8 *plen, u8 **payload); -+#endif -+ -+s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); -+#ifndef RTW_HALMAC -+s32 rtw_hal_c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); -+s32 rtw_hal_c2h_id_handle_directly(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); -+#endif -+ -+s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter); -+ -+s32 rtw_hal_macid_sleep(_adapter *adapter, u8 macid); -+s32 rtw_hal_macid_wakeup(_adapter *adapter, u8 macid); -+s32 rtw_hal_macid_sleep_all_used(_adapter *adapter); -+s32 rtw_hal_macid_wakeup_all_used(_adapter *adapter); -+ -+s32 rtw_hal_macid_drop(_adapter *adapter, u8 macid); -+s32 rtw_hal_macid_undrop(_adapter *adapter, u8 macid); -+ -+s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+void rtw_hal_fill_fake_txdesc(_adapter *padapter, u8 *pDesc, u32 BufferLen, -+ u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+u8 rtw_hal_get_txbuff_rsvd_page_num(_adapter *adapter, bool wowlan); -+ -+#ifdef CONFIG_GPIO_API -+void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag); -+int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num); -+void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num); -+#endif -+#ifdef CONFIG_FW_CORRECT_BCN -+void rtw_hal_fw_correct_bcn(_adapter *padapter); -+#endif -+s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan); -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ void rtw_hal_clear_interrupt(_adapter *padapter); -+#endif -+ -+void rtw_hal_set_tx_power_level(_adapter *adapter, u8 channel); -+void rtw_hal_update_txpwr_level(_adapter *adapter); -+void rtw_hal_set_txpwr_done(_adapter *adapter); -+void rtw_hal_set_tx_power_index(_adapter *adapter, u32 powerindex -+ , enum rf_path rfpath, u8 rate); -+ -+u8 rtw_hal_get_tx_power_index(_adapter *adapter, enum rf_path rfpath -+ , RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch -+ , struct txpwr_idx_comp *tic); -+s8 rtw_hal_get_txpwr_target_extra_bias(_adapter *adapter, enum rf_path rfpath -+ , RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch); -+ -+u8 rtw_hal_ops_check(_adapter *padapter); -+ -+#ifdef RTW_HALMAC -+ u8 rtw_hal_init_mac_register(PADAPTER); -+ u8 rtw_hal_init_phy(PADAPTER); -+s32 rtw_hal_fw_mem_dl(_adapter *padapter, enum fw_mem mem); -+#endif /* RTW_HALMAC */ -+ -+#ifdef CONFIG_RFKILL_POLL -+bool rtw_hal_rfkill_poll(_adapter *adapter, u8 *valid); -+#endif -+ -+#endif /* __HAL_INTF_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/hal_pg.h b/drivers/staging/rtl8723cs/include/hal_pg.h -new file mode 100644 -index 000000000000..2df6a399cd92 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_pg.h -@@ -0,0 +1,997 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __HAL_PG_H__ -+#define __HAL_PG_H__ -+ -+#define PPG_BB_GAIN_2G_TX_OFFSET_MASK 0x0F -+#define PPG_BB_GAIN_2G_TXB_OFFSET_MASK 0xF0 -+ -+#define PPG_BB_GAIN_5G_TX_OFFSET_MASK 0x1F -+#define PPG_THERMAL_OFFSET_MASK 0x1F -+#define KFREE_BB_GAIN_2G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) -+#define KFREE_BB_GAIN_2G_TXB_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TXB_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x10) ? ((_ppg_v) >> 5) : (-((_ppg_v) >> 5)))) -+#define KFREE_BB_GAIN_5G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_5G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) -+#define KFREE_THERMAL_OFFSET(_ppg_v) (((_ppg_v) == PPG_THERMAL_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) -+ -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 88EE/88EU/88ES -+ * **************************************************** */ -+#define EEPROM_ChannelPlan_88E 0xB8 -+#define EEPROM_XTAL_88E 0xB9 -+#define EEPROM_THERMAL_METER_88E 0xBA -+#define EEPROM_IQK_LCK_88E 0xBB -+ -+#define EEPROM_RF_BOARD_OPTION_88E 0xC1 -+#define EEPROM_RF_FEATURE_OPTION_88E 0xC2 -+#define EEPROM_RF_BT_SETTING_88E 0xC3 -+#define EEPROM_VERSION_88E 0xC4 -+#define EEPROM_CustomID_88E 0xC5 -+#define EEPROM_RF_ANTENNA_OPT_88E 0xC9 -+#define EEPROM_COUNTRY_CODE_88E 0xCB -+ -+/* RTL88EE */ -+#define EEPROM_MAC_ADDR_88EE 0xD0 -+#define EEPROM_VID_88EE 0xD6 -+#define EEPROM_DID_88EE 0xD8 -+#define EEPROM_SVID_88EE 0xDA -+#define EEPROM_SMID_88EE 0xDC -+ -+/* RTL88EU */ -+#define EEPROM_MAC_ADDR_88EU 0xD7 -+#define EEPROM_VID_88EU 0xD0 -+#define EEPROM_PID_88EU 0xD2 -+#define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 /* 8188EU, 8192EU, 8812AU is the same */ -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8811AU 0x104 -+ -+/* RTL88ES */ -+#define EEPROM_MAC_ADDR_88ES 0x11A -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8192EE/8192EU/8192ES -+ * **************************************************** */ -+#define GET_PG_KFREE_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+ -+#define PPG_BB_GAIN_2G_TXA_OFFSET_8192E 0x1F6 -+#define PPG_THERMAL_OFFSET_8192E 0x1F5 -+ -+#define EEPROM_ChannelPlan_8192E 0xB8 -+#define EEPROM_XTAL_8192E 0xB9 -+#define EEPROM_THERMAL_METER_8192E 0xBA -+#define EEPROM_IQK_LCK_8192E 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8192E 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192E 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192E 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8192E 0xC1 -+#define EEPROM_RF_FEATURE_OPTION_8192E 0xC2 -+#define EEPROM_RF_BT_SETTING_8192E 0xC3 -+#define EEPROM_VERSION_8192E 0xC4 -+#define EEPROM_CustomID_8192E 0xC5 -+#define EEPROM_TX_BBSWING_2G_8192E 0xC6 -+#define EEPROM_TX_BBSWING_5G_8192E 0xC7 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8192E 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8192E 0xC9 -+#define EEPROM_RFE_OPTION_8192E 0xCA -+#define EEPROM_RFE_OPTION_8188E 0xCA -+#define EEPROM_COUNTRY_CODE_8192E 0xCB -+ -+/* RTL8192EE */ -+#define EEPROM_MAC_ADDR_8192EE 0xD0 -+#define EEPROM_VID_8192EE 0xD6 -+#define EEPROM_DID_8192EE 0xD8 -+#define EEPROM_SVID_8192EE 0xDA -+#define EEPROM_SMID_8192EE 0xDC -+ -+/* RTL8192EU */ -+#define EEPROM_MAC_ADDR_8192EU 0xD7 -+#define EEPROM_VID_8192EU 0xD0 -+#define EEPROM_PID_8192EU 0xD2 -+#define EEPROM_PA_TYPE_8192EU 0xBC -+#define EEPROM_LNA_TYPE_2G_8192EU 0xBD -+#define EEPROM_LNA_TYPE_5G_8192EU 0xBF -+ -+/* RTL8192ES */ -+#define EEPROM_MAC_ADDR_8192ES 0x11A -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS -+ * *****************************************************/ -+#define EEPROM_USB_MODE_8812 0x08 -+ -+#define EEPROM_ChannelPlan_8812 0xB8 -+#define EEPROM_XTAL_8812 0xB9 -+#define EEPROM_THERMAL_METER_8812 0xBA -+#define EEPROM_IQK_LCK_8812 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8812 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8812 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8812 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8812 0xC1 -+#define EEPROM_RF_FEATURE_OPTION_8812 0xC2 -+#define EEPROM_RF_BT_SETTING_8812 0xC3 -+#define EEPROM_VERSION_8812 0xC4 -+#define EEPROM_CustomID_8812 0xC5 -+#define EEPROM_TX_BBSWING_2G_8812 0xC6 -+#define EEPROM_TX_BBSWING_5G_8812 0xC7 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8812 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8812 0xC9 -+#define EEPROM_RFE_OPTION_8812 0xCA -+#define EEPROM_COUNTRY_CODE_8812 0xCB -+ -+/* RTL8812AE */ -+#define EEPROM_MAC_ADDR_8812AE 0xD0 -+#define EEPROM_VID_8812AE 0xD6 -+#define EEPROM_DID_8812AE 0xD8 -+#define EEPROM_SVID_8812AE 0xDA -+#define EEPROM_SMID_8812AE 0xDC -+ -+/* RTL8812AU */ -+#define EEPROM_MAC_ADDR_8812AU 0xD7 -+#define EEPROM_VID_8812AU 0xD0 -+#define EEPROM_PID_8812AU 0xD2 -+#define EEPROM_PA_TYPE_8812AU 0xBC -+#define EEPROM_LNA_TYPE_2G_8812AU 0xBD -+#define EEPROM_LNA_TYPE_5G_8812AU 0xBF -+ -+/* RTL8814AU */ -+#define EEPROM_MAC_ADDR_8814AU 0xD8 -+#define EEPROM_VID_8814AU 0xD0 -+#define EEPROM_PID_8814AU 0xD2 -+#define EEPROM_PA_TYPE_8814AU 0xBC -+#define EEPROM_LNA_TYPE_2G_8814AU 0xBD -+#define EEPROM_LNA_TYPE_5G_8814AU 0xBF -+ -+/* RTL8814AE */ -+#define EEPROM_MAC_ADDR_8814AE 0xD0 -+#define EEPROM_VID_8814AE 0xD6 -+#define EEPROM_DID_8814AE 0xD8 -+#define EEPROM_SVID_8814AE 0xDA -+#define EEPROM_SMID_8814AE 0xDC -+ -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8814AU -+ * **************************************************** */ -+#define GET_PG_KFREE_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+#define GET_PG_TX_POWER_TRACKING_MODE_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 6, 2) -+ -+#define KFREE_GAIN_DATA_LENGTH_8814A 22 -+ -+#define PPG_BB_GAIN_2G_TXBA_OFFSET_8814A 0x3EE -+ -+#define PPG_THERMAL_OFFSET_8814A 0x3EF -+ -+#define EEPROM_USB_MODE_8814A 0x0E -+#define EEPROM_ChannelPlan_8814 0xB8 -+#define EEPROM_XTAL_8814 0xB9 -+#define EEPROM_THERMAL_METER_8814 0xBA -+#define EEPROM_IQK_LCK_8814 0xBB -+ -+ -+#define EEPROM_PA_TYPE_8814 0xBC -+#define EEPROM_LNA_TYPE_AB_2G_8814 0xBD -+#define EEPROM_LNA_TYPE_CD_2G_8814 0xBE -+#define EEPROM_LNA_TYPE_AB_5G_8814 0xBF -+#define EEPROM_LNA_TYPE_CD_5G_8814 0xC0 -+#define EEPROM_RF_BOARD_OPTION_8814 0xC1 -+#define EEPROM_RF_BT_SETTING_8814 0xC3 -+#define EEPROM_VERSION_8814 0xC4 -+#define EEPROM_CustomID_8814 0xC5 -+#define EEPROM_TX_BBSWING_2G_8814 0xC6 -+#define EEPROM_TX_BBSWING_5G_8814 0xC7 -+#define EEPROM_TRX_ANTENNA_OPTION_8814 0xC9 -+#define EEPROM_RFE_OPTION_8814 0xCA -+#define EEPROM_COUNTRY_CODE_8814 0xCB -+ -+/*Extra Info for 8814A Initial Gain Fine Tune suggested by Willis, JIRA: MP123*/ -+#define EEPROM_IG_OFFSET_4_AB_2G_8814A 0x120 -+#define EEPROM_IG_OFFSET_4_CD_2G_8814A 0x121 -+#define EEPROM_IG_OFFSET_4_AB_5GL_8814A 0x122 -+#define EEPROM_IG_OFFSET_4_CD_5GL_8814A 0x123 -+#define EEPROM_IG_OFFSET_4_AB_5GM_8814A 0x124 -+#define EEPROM_IG_OFFSET_4_CD_5GM_8814A 0x125 -+#define EEPROM_IG_OFFSET_4_AB_5GH_8814A 0x126 -+#define EEPROM_IG_OFFSET_4_CD_5GH_8814A 0x127 -+ -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8821AE/8821AU/8821AS -+ * **************************************************** */ -+ -+#define GET_PG_KFREE_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+ -+#define PPG_BB_GAIN_2G_TXA_OFFSET_8821A 0x1F6 -+#define PPG_THERMAL_OFFSET_8821A 0x1F5 -+#define PPG_BB_GAIN_5GLB1_TXA_OFFSET_8821A 0x1F4 -+#define PPG_BB_GAIN_5GLB2_TXA_OFFSET_8821A 0x1F3 -+#define PPG_BB_GAIN_5GMB1_TXA_OFFSET_8821A 0x1F2 -+#define PPG_BB_GAIN_5GMB2_TXA_OFFSET_8821A 0x1F1 -+#define PPG_BB_GAIN_5GHB_TXA_OFFSET_8821A 0x1F0 -+ -+#define EEPROM_ChannelPlan_8821 0xB8 -+#define EEPROM_XTAL_8821 0xB9 -+#define EEPROM_THERMAL_METER_8821 0xBA -+#define EEPROM_IQK_LCK_8821 0xBB -+ -+ -+#define EEPROM_RF_BOARD_OPTION_8821 0xC1 -+#define EEPROM_RF_FEATURE_OPTION_8821 0xC2 -+#define EEPROM_RF_BT_SETTING_8821 0xC3 -+#define EEPROM_VERSION_8821 0xC4 -+#define EEPROM_CustomID_8821 0xC5 -+#define EEPROM_RF_ANTENNA_OPT_8821 0xC9 -+ -+/* RTL8821AE */ -+#define EEPROM_MAC_ADDR_8821AE 0xD0 -+#define EEPROM_VID_8821AE 0xD6 -+#define EEPROM_DID_8821AE 0xD8 -+#define EEPROM_SVID_8821AE 0xDA -+#define EEPROM_SMID_8821AE 0xDC -+ -+/* RTL8821AU */ -+#define EEPROM_PA_TYPE_8821AU 0xBC -+#define EEPROM_LNA_TYPE_8821AU 0xBF -+ -+/* RTL8821AS */ -+#define EEPROM_MAC_ADDR_8821AS 0x11A -+ -+/* RTL8821AU */ -+#define EEPROM_MAC_ADDR_8821AU 0x107 -+#define EEPROM_VID_8821AU 0x100 -+#define EEPROM_PID_8821AU 0x102 -+ -+ -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8192 SE/SU -+ * **************************************************** */ -+#define EEPROM_VID_92SE 0x0A -+#define EEPROM_DID_92SE 0x0C -+#define EEPROM_SVID_92SE 0x0E -+#define EEPROM_SMID_92SE 0x10 -+ -+#define EEPROM_MAC_ADDR_92S 0x12 -+ -+#define EEPROM_TSSI_A_92SE 0x74 -+#define EEPROM_TSSI_B_92SE 0x75 -+ -+#define EEPROM_Version_92SE 0x7C -+ -+ -+#define EEPROM_VID_92SU 0x08 -+#define EEPROM_PID_92SU 0x0A -+ -+#define EEPROM_Version_92SU 0x50 -+#define EEPROM_TSSI_A_92SU 0x6b -+#define EEPROM_TSSI_B_92SU 0x6c -+ -+/* ==================================================== -+ EEPROM/Efuse PG Offset for 8188FE/8188FU/8188FS -+ ==================================================== -+ */ -+ -+#define GET_PG_KFREE_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+ -+#define PPG_BB_GAIN_2G_TXA_OFFSET_8188F 0xEE -+#define PPG_THERMAL_OFFSET_8188F 0xEF -+ -+#define EEPROM_ChannelPlan_8188F 0xB8 -+#define EEPROM_XTAL_8188F 0xB9 -+#define EEPROM_THERMAL_METER_8188F 0xBA -+#define EEPROM_IQK_LCK_8188F 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8188F 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188F 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188F 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8188F 0xC1 -+#define EEPROM_FEATURE_OPTION_8188F 0xC2 -+#define EEPROM_RF_BT_SETTING_8188F 0xC3 -+#define EEPROM_VERSION_8188F 0xC4 -+#define EEPROM_CustomID_8188F 0xC5 -+#define EEPROM_TX_BBSWING_2G_8188F 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8188F 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8188F 0xC9 -+#define EEPROM_RFE_OPTION_8188F 0xCA -+#define EEPROM_COUNTRY_CODE_8188F 0xCB -+#define EEPROM_CUSTOMER_ID_8188F 0x7F -+#define EEPROM_SUBCUSTOMER_ID_8188F 0x59 -+ -+/* RTL8188FU */ -+#define EEPROM_MAC_ADDR_8188FU 0xD7 -+#define EEPROM_VID_8188FU 0xD0 -+#define EEPROM_PID_8188FU 0xD2 -+#define EEPROM_PA_TYPE_8188FU 0xBC -+#define EEPROM_LNA_TYPE_2G_8188FU 0xBD -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8188FU 0xD4 -+ -+/* RTL8188FS */ -+#define EEPROM_MAC_ADDR_8188FS 0x11A -+#define EEPROM_Voltage_ADDR_8188F 0x8 -+ -+/* ==================================================== -+ EEPROM/Efuse PG Offset for 8188GTV/8188GTVS -+ ==================================================== -+ */ -+ -+#define GET_PG_KFREE_ON_8188GTV(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8188GTV(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+ -+#define PPG_BB_GAIN_2G_TXA_OFFSET_8188GTV 0xEE -+#define PPG_THERMAL_OFFSET_8188GTV 0xEF -+ -+#define EEPROM_ChannelPlan_8188GTV 0xB8 -+#define EEPROM_XTAL_8188GTV 0xB9 -+#define EEPROM_THERMAL_METER_8188GTV 0xBA -+#define EEPROM_IQK_LCK_8188GTV 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8188GTV 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188GTV 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188GTV 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8188GTV 0xC1 -+#define EEPROM_FEATURE_OPTION_8188GTV 0xC2 -+#define EEPROM_RF_BT_SETTING_8188GTV 0xC3 -+#define EEPROM_VERSION_8188GTV 0xC4 -+#define EEPROM_CustomID_8188GTV 0xC5 -+#define EEPROM_TX_BBSWING_2G_8188GTV 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8188GTV 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8188GTV 0xC9 -+#define EEPROM_RFE_OPTION_8188GTV 0xCA -+#define EEPROM_COUNTRY_CODE_8188GTV 0xCB -+#define EEPROM_CUSTOMER_ID_8188GTV 0x7F -+#define EEPROM_SUBCUSTOMER_ID_8188GTV 0x59 -+ -+/* RTL8188GTVU */ -+#define EEPROM_MAC_ADDR_8188GTVU 0xD7 -+#define EEPROM_VID_8188GTVU 0xD0 -+#define EEPROM_PID_8188GTVU 0xD2 -+#define EEPROM_PA_TYPE_8188GTVU 0xBC -+#define EEPROM_LNA_TYPE_2G_8188GTVU 0xBD -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8188GTVU 0xD4 -+ -+/* RTL8188GTVS */ -+#define EEPROM_MAC_ADDR_8188GTVS 0x11A -+#define EEPROM_Voltage_ADDR_8188GTV 0x8 -+ -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS -+ * *****************************************************/ -+#define EEPROM_ChannelPlan_8723B 0xB8 -+#define EEPROM_XTAL_8723B 0xB9 -+#define EEPROM_THERMAL_METER_8723B 0xBA -+#define EEPROM_IQK_LCK_8723B 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8723B 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723B 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723B 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8723B 0xC1 -+#define EEPROM_FEATURE_OPTION_8723B 0xC2 -+#define EEPROM_RF_BT_SETTING_8723B 0xC3 -+#define EEPROM_VERSION_8723B 0xC4 -+#define EEPROM_CustomID_8723B 0xC5 -+#define EEPROM_TX_BBSWING_2G_8723B 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8723B 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8723B 0xC9 -+#define EEPROM_RFE_OPTION_8723B 0xCA -+#define EEPROM_COUNTRY_CODE_8723B 0xCB -+ -+/* RTL8723BE */ -+#define EEPROM_MAC_ADDR_8723BE 0xD0 -+#define EEPROM_VID_8723BE 0xD6 -+#define EEPROM_DID_8723BE 0xD8 -+#define EEPROM_SVID_8723BE 0xDA -+#define EEPROM_SMID_8723BE 0xDC -+ -+/* RTL8723BU */ -+#define EEPROM_MAC_ADDR_8723BU 0x107 -+#define EEPROM_VID_8723BU 0x100 -+#define EEPROM_PID_8723BU 0x102 -+#define EEPROM_PA_TYPE_8723BU 0xBC -+#define EEPROM_LNA_TYPE_2G_8723BU 0xBD -+ -+ -+/* RTL8723BS */ -+#define EEPROM_MAC_ADDR_8723BS 0x11A -+#define EEPROM_Voltage_ADDR_8723B 0x8 -+ -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8703B -+ * **************************************************** */ -+#define GET_PG_KFREE_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+ -+#define PPG_BB_GAIN_2G_TXA_OFFSET_8703B 0xEE -+#define PPG_THERMAL_OFFSET_8703B 0xEF -+ -+#define EEPROM_ChannelPlan_8703B 0xB8 -+#define EEPROM_XTAL_8703B 0xB9 -+#define EEPROM_THERMAL_METER_8703B 0xBA -+#define EEPROM_IQK_LCK_8703B 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8703B 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8703B 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8703B 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8703B 0xC1 -+#define EEPROM_FEATURE_OPTION_8703B 0xC2 -+#define EEPROM_RF_BT_SETTING_8703B 0xC3 -+#define EEPROM_VERSION_8703B 0xC4 -+#define EEPROM_CustomID_8703B 0xC5 -+#define EEPROM_TX_BBSWING_2G_8703B 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8703B 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8703B 0xC9 -+#define EEPROM_RFE_OPTION_8703B 0xCA -+#define EEPROM_COUNTRY_CODE_8703B 0xCB -+ -+/* RTL8703BU */ -+#define EEPROM_MAC_ADDR_8703BU 0x107 -+#define EEPROM_VID_8703BU 0x100 -+#define EEPROM_PID_8703BU 0x102 -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8703BU 0x104 -+#define EEPROM_PA_TYPE_8703BU 0xBC -+#define EEPROM_LNA_TYPE_2G_8703BU 0xBD -+ -+/* RTL8703BS */ -+#define EEPROM_MAC_ADDR_8703BS 0x11A -+#define EEPROM_Voltage_ADDR_8703B 0x8 -+ -+/* -+ * ==================================================== -+ * EEPROM/Efuse PG Offset for 8822B -+ * ==================================================== -+ */ -+#define EEPROM_ChannelPlan_8822B 0xB8 -+#define EEPROM_XTAL_8822B 0xB9 -+#define EEPROM_THERMAL_METER_8822B 0xBA -+#define EEPROM_IQK_LCK_8822B 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8822B 0xBC -+/* PATH A & PATH B */ -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822B 0xBD -+/* PATH C & PATH D */ -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8822B 0xBE -+/* PATH A & PATH B */ -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822B 0xBF -+/* PATH C & PATH D */ -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8822B 0xC0 -+ -+#define EEPROM_RF_BOARD_OPTION_8822B 0xC1 -+#define EEPROM_FEATURE_OPTION_8822B 0xC2 -+#define EEPROM_RF_BT_SETTING_8822B 0xC3 -+#define EEPROM_VERSION_8822B 0xC4 -+#define EEPROM_CustomID_8822B 0xC5 -+#define EEPROM_TX_BBSWING_2G_8822B 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8822B 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8822B 0xC9 -+#define EEPROM_RFE_OPTION_8822B 0xCA -+#define EEPROM_COUNTRY_CODE_8822B 0xCB -+ -+/* RTL8822BU */ -+#define EEPROM_MAC_ADDR_8822BU 0x107 -+#define EEPROM_VID_8822BU 0x100 -+#define EEPROM_PID_8822BU 0x102 -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8822BU 0x104 -+#define EEPROM_USB_MODE_8822BU 0x06 -+ -+/* RTL8822BS */ -+#define EEPROM_MAC_ADDR_8822BS 0x11A -+ -+/* RTL8822BE */ -+#define EEPROM_MAC_ADDR_8822BE 0xD0 -+/* -+ * ==================================================== -+ * EEPROM/Efuse PG Offset for 8821C -+ * ==================================================== -+ */ -+#define EEPROM_CHANNEL_PLAN_8821C 0xB8 -+#define EEPROM_XTAL_8821C 0xB9 -+#define EEPROM_THERMAL_METER_8821C 0xBA -+#define EEPROM_IQK_LCK_8821C 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8821C 0xBC -+/* PATH A & PATH B */ -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8821C 0xBD -+/* PATH C & PATH D */ -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8821C 0xBE -+/* PATH A & PATH B */ -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8821C 0xBF -+/* PATH C & PATH D */ -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8821C 0xC0 -+ -+#define EEPROM_RF_BOARD_OPTION_8821C 0xC1 -+#define EEPROM_FEATURE_OPTION_8821C 0xC2 -+#define EEPROM_RF_BT_SETTING_8821C 0xC3 -+#define EEPROM_VERSION_8821C 0xC4 -+#define EEPROM_CUSTOMER_ID_8821C 0xC5 -+#define EEPROM_TX_BBSWING_2G_8821C 0xC6 -+#define EEPROM_TX_BBSWING_5G_8821C 0xC7 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8821C 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8821C 0xC9 -+#define EEPROM_RFE_OPTION_8821C 0xCA -+#define EEPROM_COUNTRY_CODE_8821C 0xCB -+ -+/* RTL8821CU */ -+#define EEPROM_MAC_ADDR_8821CU 0x107 -+#define EEPROM_VID_8821CU 0x100 -+#define EEPROM_PID_8821CU 0x102 -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8821CU 0x104 -+#define EEPROM_USB_MODE_8821CU 0x06 -+ -+/* RTL8821CS */ -+#define EEPROM_MAC_ADDR_8821CS 0x11A -+ -+/* RTL8821CE */ -+#define EEPROM_MAC_ADDR_8821CE 0xD0 -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8723D -+ * **************************************************** */ -+#define GET_PG_KFREE_ON_8723D(_pg_m) \ -+ LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) -+#define GET_PG_KFREE_THERMAL_K_ON_8723D(_pg_m) \ -+ LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) -+ -+#define PPG_8723D_S1 0 -+#define PPG_8723D_S0 1 -+ -+#define PPG_BB_GAIN_2G_TXA_OFFSET_8723D 0xEE -+#define PPG_BB_GAIN_2G_TX_OFFSET_8723D 0x1EE -+#define PPG_THERMAL_OFFSET_8723D 0xEF -+ -+#define EEPROM_ChannelPlan_8723D 0xB8 -+#define EEPROM_XTAL_8723D 0xB9 -+#define EEPROM_THERMAL_METER_8723D 0xBA -+#define EEPROM_IQK_LCK_8723D 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8723D 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723D 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723D 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8723D 0xC1 -+#define EEPROM_FEATURE_OPTION_8723D 0xC2 -+#define EEPROM_RF_BT_SETTING_8723D 0xC3 -+#define EEPROM_VERSION_8723D 0xC4 -+#define EEPROM_CustomID_8723D 0xC5 -+#define EEPROM_TX_BBSWING_2G_8723D 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8723D 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8723D 0xC9 -+#define EEPROM_RFE_OPTION_8723D 0xCA -+#define EEPROM_COUNTRY_CODE_8723D 0xCB -+ -+/* RTL8723DE */ -+#define EEPROM_MAC_ADDR_8723DE 0xD0 -+#define EEPROM_VID_8723DE 0xD6 -+#define EEPROM_DID_8723DE 0xD8 -+#define EEPROM_SVID_8723DE 0xDA -+#define EEPROM_SMID_8723DE 0xDC -+ -+/* RTL8723DU */ -+#define EEPROM_MAC_ADDR_8723DU 0x107 -+#define EEPROM_VID_8723DU 0x100 -+#define EEPROM_PID_8723DU 0x102 -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8723DU 0x104 -+ -+/* RTL8723BS */ -+#define EEPROM_MAC_ADDR_8723DS 0x11A -+#define EEPROM_Voltage_ADDR_8723D 0x8 -+ -+/* -+ * ==================================================== -+ * EEPROM/Efuse PG Offset for 8822C -+ * ==================================================== -+ */ -+#define EEPROM_TX_PWR_INX_8822C 0x10 -+#define EEPROM_ChannelPlan_8822C 0xB8 -+#define EEPROM_XTAL_B9_8822C 0xB9 -+#define EEPROM_IQK_LCK_8822C 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8822C 0xBC -+/* PATH A & PATH B */ -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822C 0xBD -+/* PATH C & PATH D */ -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8822C 0xBE -+/* PATH A & PATH B */ -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822C 0xBF -+/* PATH C & PATH D */ -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8822C 0xC0 -+ -+#define EEPROM_RF_BOARD_OPTION_8822C 0xC1 -+#define EEPROM_FEATURE_OPTION_8822C 0xC2 -+#define EEPROM_RF_BT_SETTING_8822C 0xC3 -+#define EEPROM_VERSION_8822C 0xC4 -+#define EEPROM_CustomID_8822C 0xC5 -+#define EEPROM_TX_BBSWING_2G_8822C 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8822C 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8822C 0xC9 -+#define EEPROM_RFE_OPTION_8822C 0xCA -+#define EEPROM_COUNTRY_CODE_8822C 0xCB -+#define EEPROM_THERMAL_METER_A_8822C 0xD0 -+#define EEPROM_THERMAL_METER_B_8822C 0xD1 -+ -+#define EEPROM_XTAL_110_8822C 0x110 -+#define EEPROM_XTAL_111_8822C 0x111 -+ -+/* RTL8822CU */ -+#define EEPROM_MAC_ADDR_8822CU 0x157 -+#define EEPROM_VID_8822CU 0x100 -+#define EEPROM_PID_8822CU 0x102 -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8822CU 0x104 -+#define EEPROM_USB_MODE_8822CU 0x06 -+ -+/* RTL8822CS */ -+#define EEPROM_MAC_ADDR_8822CS 0x16A -+ -+/* RTL8822CE */ -+#define EEPROM_MAC_ADDR_8822CE 0x120 -+ -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8192F -+ * **************************************************** */ -+#define EEPROM_ChannelPlan_8192F 0xB8 -+#define EEPROM_XTAL_8192F 0xB9 -+#define EEPROM_THERMAL_METER_8192F 0xBA -+#define EEPROM_IQK_LCK_8192F 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8192F 0xBC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192F 0xBD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192F 0xBF -+ -+#define EEPROM_RF_BOARD_OPTION_8192F 0xC1 -+#define EEPROM_FEATURE_OPTION_8192F 0xC2 -+#define EEPROM_RF_BT_SETTING_8192F 0xC3 -+#define EEPROM_VERSION_8192F 0xC4 -+#define EEPROM_CustomID_8192F 0xC5 -+#define EEPROM_TX_BBSWING_2G_8192F 0xC6 -+#define EEPROM_TX_BBSWING_5G_8192F 0xC7 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8192F 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8192F 0xC9 -+#define EEPROM_RFE_OPTION_8192F 0xCA -+#define EEPROM_COUNTRY_CODE_8192F 0xCB -+/*RTL8192FS*/ -+#define EEPROM_MAC_ADDR_8192FS 0x11A -+#define EEPROM_Voltage_ADDR_8192F 0x8 -+/* RTL8192FU */ -+#define EEPROM_MAC_ADDR_8192FU 0x107 -+#define EEPROM_VID_8192FU 0x100 -+#define EEPROM_PID_8192FU 0x102 -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8192FU 0x104 -+/* RTL8192FE */ -+#define EEPROM_MAC_ADDR_8192FE 0xD0 -+#define EEPROM_VID_8192FE 0xD6 -+#define EEPROM_DID_8192FE 0xD8 -+#define EEPROM_SVID_8192FE 0xDA -+#define EEPROM_SMID_8192FE 0xDC -+ -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8710B -+ * **************************************************** */ -+#define RTL_EEPROM_ID_8710B 0x8195 -+#define EEPROM_Default_ThermalMeter_8710B 0x1A -+ -+#define EEPROM_CHANNEL_PLAN_8710B 0xC8 -+#define EEPROM_XTAL_8710B 0xC9 -+#define EEPROM_THERMAL_METER_8710B 0xCA -+#define EEPROM_IQK_LCK_8710B 0xCB -+#define EEPROM_2G_5G_PA_TYPE_8710B 0xCC -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_8710B 0xCD -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_8710B 0xCF -+#define EEPROM_TX_KFREE_8710B 0xEE //Physical Efuse Address -+#define EEPROM_THERMAL_8710B 0xEF //Physical Efuse Address -+#define EEPROM_PACKAGE_TYPE_8710B 0xF8 //Physical Efuse Address -+ -+#define EEPROM_RF_BOARD_OPTION_8710B 0x131 -+#define EEPROM_RF_FEATURE_OPTION_8710B 0x132 -+#define EEPROM_RF_BT_SETTING_8710B 0x133 -+#define EEPROM_VERSION_8710B 0x134 -+#define EEPROM_CUSTOM_ID_8710B 0x135 -+#define EEPROM_TX_BBSWING_2G_8710B 0x136 -+#define EEPROM_TX_BBSWING_5G_8710B 0x137 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8710B 0x138 -+#define EEPROM_RF_ANTENNA_OPT_8710B 0x139 -+#define EEPROM_RFE_OPTION_8710B 0x13A -+#define EEPROM_COUNTRY_CODE_8710B 0x13B -+#define EEPROM_COUNTRY_CODE_2_8710B 0x13C -+ -+#define EEPROM_MAC_ADDR_8710B 0x11A -+#define EEPROM_VID_8710BU 0x1C0 -+#define EEPROM_PID_8710BU 0x1C2 -+ -+/* **************************************************** -+ * EEPROM/Efuse PG Offset for 8814B -+ * **************************************************** */ -+ -+#define EEPROM_USB_MODE_8814BU 0x06 -+/* 0x10 ~ 0x63 = TX power area. */ -+#define EEPROM_TX_PWR_INX_8814B 0x10 -+#define EEPROM_ChannelPlan_8814B 0xB8 -+#define EEPROM_XTAL_8814B 0xB9 -+#define EEPROM_IQK_LCK_8814B 0xBB -+ -+#define EEPROM_RF_BOARD_OPTION_8814B 0xC1 -+#define EEPROM_RF_FEATURE_OPTION_8814B 0xC2 -+#define EEPROM_RF_BT_SETTING_8814B 0xC3 -+#define EEPROM_VERSION_8814B 0xC4 -+#define EEPROM_CustomID_8814B 0xC5 -+#define EEPROM_TX_BBSWING_2G_8814B 0xC6 -+#define EEPROM_TX_BBSWING_5G_8814B 0xC7 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8814B 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8814B 0xC9 -+#define EEPROM_RFE_OPTION_8814B 0xCA -+#define EEPROM_COUNTRY_CODE_8814B 0xCB -+ -+#define EEPROM_THERMAL_METER_A_8814B 0xD0 -+#define EEPROM_THERMAL_METER_B_8814B 0xD1 -+#define EEPROM_THERMAL_METER_C_8814B 0xD2 -+#define EEPROM_THERMAL_METER_D_8814B 0xD3 -+ -+#define EEPROM_MAC_ADDR_8814BE 0x120 -+#define EEPROM_VID_8814B 0x126 -+#define EEPROM_DID_8814B 0x128 -+#define EEPROM_SVID_8814B 0x12A -+#define EEPROM_SMID_8814B 0x12C -+ -+/* RTL8814BU */ -+#define EEPROM_MAC_ADDR_8814BU 0x157 -+#define EEPROM_VID_8814BU 0x150 -+#define EEPROM_PID_8814BU 0x152 -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8814BU 0x154 -+ -+/* -+ * ==================================================== -+ * EEPROM/Efuse PG Offset for 8723F -+ * ==================================================== -+ */ -+#define EEPROM_TX_PWR_INX_8723F 0x10 -+#define EEPROM_ChannelPlan_8723F 0xB8 -+#define EEPROM_XTAL_B9_8723F 0xB9 -+#define EEPROM_THERMAL_METER_8723F 0xBA -+#define EEPROM_IQK_LCK_8723F 0xBB -+#define EEPROM_2G_5G_PA_TYPE_8723F 0xBC -+/* PATH A & PATH B */ -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8723F 0xBD -+/* PATH C & PATH D */ -+#define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8723F 0xBE -+/* PATH A & PATH B */ -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8723F 0xBF -+/* PATH C & PATH D */ -+#define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8723F 0xC0 -+ -+#define EEPROM_RF_BOARD_OPTION_8723F 0xC1 -+#define EEPROM_FEATURE_OPTION_8723F 0xC2 -+#define EEPROM_RF_BT_SETTING_8723F 0xC3 -+#define EEPROM_VERSION_8723F 0xC4 -+#define EEPROM_CustomID_8723F 0xC5 -+#define EEPROM_TX_BBSWING_2G_8723F 0xC6 -+#define EEPROM_TX_PWR_CALIBRATE_RATE_8723F 0xC8 -+#define EEPROM_RF_ANTENNA_OPT_8723F 0xC9 -+#define EEPROM_RFE_OPTION_8723F 0xCA -+#define EEPROM_COUNTRY_CODE_8723F 0xCB -+ -+/* RTL8723FU */ -+#define EEPROM_MAC_ADDR_8723FU 0x108 -+#define EEPROM_VID_8723FU 0x100 -+#define EEPROM_PID_8723FU 0x102 -+#define EEPROM_USB_OPTIONAL_FUNCTION0_8723FU 0x104 -+#define EEPROM_USB_MODE_8723FU 0x03 -+ -+/* RTL8723FS */ -+#define EEPROM_MAC_ADDR_8723FS 0x11A -+ -+/* **************************************************** -+ * EEPROM/Efuse Value Type -+ * **************************************************** */ -+#define EETYPE_TX_PWR 0x0 -+#define EETYPE_MAX_RFE_8192F 0x31 -+/* **************************************************** -+ * EEPROM/Efuse Default Value -+ * **************************************************** */ -+#define EEPROM_CID_DEFAULT 0x0 -+#define EEPROM_CID_DEFAULT_EXT 0xFF /* Reserved for Realtek */ -+#define EEPROM_CID_TOSHIBA 0x4 -+#define EEPROM_CID_CCX 0x10 -+#define EEPROM_CID_QMI 0x0D -+#define EEPROM_CID_WHQL 0xFE -+ -+#define EEPROM_CHANNEL_PLAN_FCC 0x0 -+#define EEPROM_CHANNEL_PLAN_IC 0x1 -+#define EEPROM_CHANNEL_PLAN_ETSI 0x2 -+#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 -+#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 -+#define EEPROM_CHANNEL_PLAN_MKK 0x5 -+#define EEPROM_CHANNEL_PLAN_MKK1 0x6 -+#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 -+#define EEPROM_CHANNEL_PLAN_TELEC 0x8 -+#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 -+#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA -+#define EEPROM_CHANNEL_PLAN_NCC_TAIWAN 0xB -+#define EEPROM_CHANNEL_PLAN_CHIAN 0XC -+#define EEPROM_CHANNEL_PLAN_SINGAPORE_INDIA_MEXICO 0XD -+#define EEPROM_CHANNEL_PLAN_KOREA 0xE -+#define EEPROM_CHANNEL_PLAN_TURKEY 0xF -+#define EEPROM_CHANNEL_PLAN_JAPAN 0x10 -+#define EEPROM_CHANNEL_PLAN_FCC_NO_DFS 0x11 -+#define EEPROM_CHANNEL_PLAN_JAPAN_NO_DFS 0x12 -+#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_5G 0x13 -+#define EEPROM_CHANNEL_PLAN_TAIWAN_NO_DFS 0x14 -+ -+#define EEPROM_USB_OPTIONAL1 0xE -+#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 -+ -+#define RTL_EEPROM_ID 0x8129 -+#define EEPROM_Default_TSSI 0x0 -+#define EEPROM_Default_BoardType 0x02 -+#define EEPROM_Default_ThermalMeter 0x12 -+#define EEPROM_Default_ThermalMeter_92SU 0x7 -+#define EEPROM_Default_ThermalMeter_88E 0x18 -+#define EEPROM_Default_ThermalMeter_8812 0x18 -+#define EEPROM_Default_ThermalMeter_8192E 0x1A -+#define EEPROM_Default_ThermalMeter_8723B 0x18 -+#define EEPROM_Default_ThermalMeter_8703B 0x18 -+#define EEPROM_Default_ThermalMeter_8723D 0x18 -+#define EEPROM_Default_ThermalMeter_8188F 0x18 -+#define EEPROM_Default_ThermalMeter_8188GTV 0x18 -+#define EEPROM_Default_ThermalMeter_8814A 0x18 -+#define EEPROM_Default_ThermalMeter_8192F 0x1A -+#define EEPROM_Default_ThermalMeter_8814B 0x20 -+ -+#define EEPROM_Default_CrystalCap 0x0 -+#define EEPROM_Default_CrystalCap_8723A 0x20 -+#define EEPROM_Default_CrystalCap_88E 0x20 -+#define EEPROM_Default_CrystalCap_8812 0x20 -+#define EEPROM_Default_CrystalCap_8814 0x20 -+#define EEPROM_Default_CrystalCap_8192E 0x20 -+#define EEPROM_Default_CrystalCap_8723B 0x20 -+#define EEPROM_Default_CrystalCap_8703B 0x20 -+#define EEPROM_Default_CrystalCap_8723D 0x20 -+#define EEPROM_Default_CrystalCap_8723F 0x3F -+#define EEPROM_Default_CrystalCap_8188F 0x20 -+#define EEPROM_Default_CrystalCap_8188GTV 0x20 -+#define EEPROM_Default_CrystalCap_8192F 0x20 -+#define EEPROM_Default_CrystalCap_B9_8822C 0x3F -+#define EEPROM_Default_CrystalCap_110_8822C 0x40 -+#define EEPROM_Default_CrystalCap_111_8822C 0x40 -+#define EEPROM_Default_CrystalCap_8814B 0x40 -+#define EEPROM_Default_CrystalFreq 0x0 -+#define EEPROM_Default_TxPowerLevel_92C 0x22 -+#define EEPROM_Default_TxPowerLevel_2G 0x2C -+#define EEPROM_Default_TxPowerLevel_5G 0x22 -+#define EEPROM_Default_TxPowerLevel 0x22 -+#define EEPROM_Default_HT40_2SDiff 0x0 -+#define EEPROM_Default_HT20_Diff 2 -+#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 -+#define EEPROM_Default_LegacyHTTxPowerDiff_92C 0x3 -+#define EEPROM_Default_LegacyHTTxPowerDiff_92D 0x4 -+#define EEPROM_Default_HT40_PwrMaxOffset 0 -+#define EEPROM_Default_HT20_PwrMaxOffset 0 -+ -+#define EEPROM_Default_PID 0x1234 -+#define EEPROM_Default_VID 0x5678 -+#define EEPROM_Default_CustomerID 0xAB -+#define EEPROM_Default_CustomerID_8188E 0x00 -+#define EEPROM_Default_SubCustomerID 0xCD -+#define EEPROM_Default_Version 0 -+ -+#define EEPROM_Default_externalPA_C9 0x00 -+#define EEPROM_Default_externalPA_CC 0xFF -+#define EEPROM_Default_internalPA_SP3T_C9 0xAA -+#define EEPROM_Default_internalPA_SP3T_CC 0xAF -+#define EEPROM_Default_internalPA_SPDT_C9 0xAA -+#ifdef CONFIG_PCI_HCI -+ #define EEPROM_Default_internalPA_SPDT_CC 0xA0 -+#else -+ #define EEPROM_Default_internalPA_SPDT_CC 0xFA -+#endif -+#define EEPROM_Default_PAType 0 -+#define EEPROM_Default_LNAType 0 -+ -+/* New EFUSE default value */ -+#define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F -+#define EEPROM_DEFAULT_BOARD_OPTION 0x00 -+#define EEPROM_DEFAULT_RFE_OPTION_8192E 0xFF -+#define EEPROM_DEFAULT_RFE_OPTION_8188E 0xFF -+#define EEPROM_DEFAULT_RFE_OPTION 0x04 -+#define EEPROM_DEFAULT_FEATURE_OPTION 0x00 -+#define EEPROM_DEFAULT_BT_OPTION 0x10 -+ -+ -+#define EEPROM_DEFAULT_TX_CALIBRATE_RATE 0x00 -+ -+/* PCIe related */ -+#define EEPROM_PCIE_DEV_CAP_01 0xE0 /* Express device capability in PCIe configuration space, i.e., map to offset 0x74 */ -+#define EEPROM_PCIE_DEV_CAP_02 0xE1 /* Express device capability in PCIe configuration space, i.e., map to offset 0x75 */ -+ -+ -+/* -+ * For VHT series TX power by rate table. -+ * VHT TX power by rate off setArray = -+ * Band:-2G&5G = 0 / 1 -+ * RF: at most 4*4 = ABCD=0/1/2/3 -+ * CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 -+ * */ -+#define TX_PWR_BY_RATE_NUM_BAND 2 -+#define TX_PWR_BY_RATE_NUM_RF 4 -+#define TX_PWR_BY_RATE_NUM_RATE 84 -+ -+#define TXPWR_LMT_MAX_RF 4 -+ -+/* ---------------------------------------------------------------------------- -+ * EEPROM/EFUSE data structure definition. -+ * ---------------------------------------------------------------------------- */ -+ -+/* For 88E new structure */ -+ -+/* -+2.4G: -+{ -+{1,2}, -+{3,4,5}, -+{6,7,8}, -+{9,10,11}, -+{12,13}, -+{14} -+} -+ -+5G: -+{ -+{36,38,40}, -+{44,46,48}, -+{52,54,56}, -+{60,62,64}, -+{100,102,104}, -+{108,110,112}, -+{116,118,120}, -+{124,126,128}, -+{132,134,136}, -+{140,142,144}, -+{149,151,153}, -+{157,159,161}, -+{173,175,177}, -+} -+*/ -+#define MAX_RF_PATH 4 -+#define RF_PATH_MAX MAX_RF_PATH -+#define MAX_CHNL_GROUP_24G 6 -+#define MAX_CHNL_GROUP_5G 14 -+ -+/* It must always set to 4, otherwise read efuse table sequence will be wrong. */ -+#define MAX_TX_COUNT 4 -+ -+typedef enum _BT_Ant_NUM { -+ Ant_x2 = 0, -+ Ant_x1 = 1 -+} BT_Ant_NUM, *PBT_Ant_NUM; -+ -+typedef enum _BT_CoType { -+ BT_2WIRE = 0, -+ BT_ISSC_3WIRE = 1, -+ BT_ACCEL = 2, -+ BT_CSR_BC4 = 3, -+ BT_CSR_BC8 = 4, -+ BT_RTL8756 = 5, -+ BT_RTL8723A = 6, -+ BT_RTL8821 = 7, -+ BT_RTL8723B = 8, -+ BT_RTL8192E = 9, -+ BT_RTL8814A = 10, -+ BT_RTL8812A = 11, -+ BT_RTL8703B = 12, -+ BT_RTL8822B = 13, -+ BT_RTL8723D = 14, -+ BT_RTL8821C = 15, -+ BT_RTL8192F = 16, -+ BT_RTL8822C = 17, -+ BT_RTL8814B = 18, -+ BT_RTL8723F = 19, -+} BT_CoType, *PBT_CoType; -+ -+typedef enum _BT_RadioShared { -+ BT_Radio_Shared = 0, -+ BT_Radio_Individual = 1, -+} BT_RadioShared, *PBT_RadioShared; -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/hal_phy.h b/drivers/staging/rtl8723cs/include/hal_phy.h -new file mode 100644 -index 000000000000..35f901a4968d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_phy.h -@@ -0,0 +1,234 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_PHY_H__ -+#define __HAL_PHY_H__ -+ -+ -+#if DISABLE_BB_RF -+ #define HAL_FW_ENABLE 0 -+ #define HAL_MAC_ENABLE 0 -+ #define HAL_BB_ENABLE 0 -+ #define HAL_RF_ENABLE 0 -+#else /* FPGA_PHY and ASIC */ -+ #define HAL_FW_ENABLE 1 -+ #define HAL_MAC_ENABLE 1 -+ #define HAL_BB_ENABLE 1 -+ #define HAL_RF_ENABLE 1 -+#endif -+ -+#define RF6052_MAX_TX_PWR 0x3F -+#define RF6052_MAX_REG_88E 0xFF -+#define RF6052_MAX_REG_92C 0x7F -+ -+#define RF6052_MAX_REG \ -+ ((RF6052_MAX_REG_88E > RF6052_MAX_REG_92C) ? RF6052_MAX_REG_88E : RF6052_MAX_REG_92C) -+ -+#define GET_RF6052_REAL_MAX_REG(_Adapter) \ -+ (IS_HARDWARE_TYPE_8188E(_Adapter) ? RF6052_MAX_REG_88E : RF6052_MAX_REG_92C) -+ -+#define RF6052_MAX_PATH 2 -+ -+/* -+ * Antenna detection method, i.e., using single tone detection or RSSI reported from each antenna detected. -+ * Added by Roger, 2013.05.22. -+ * */ -+#define ANT_DETECT_BY_SINGLE_TONE BIT0 -+#define ANT_DETECT_BY_RSSI BIT1 -+#define IS_ANT_DETECT_SUPPORT_SINGLE_TONE(__Adapter) ((GET_HAL_DATA(__Adapter)->AntDetection) & ANT_DETECT_BY_SINGLE_TONE) -+#define IS_ANT_DETECT_SUPPORT_RSSI(__Adapter) ((GET_HAL_DATA(__Adapter)->AntDetection) & ANT_DETECT_BY_RSSI) -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+typedef enum _RF_CHIP { -+ RF_CHIP_MIN = 0, /* 0 */ -+ RF_8225 = 1, /* 1 11b/g RF for verification only */ -+ RF_8256 = 2, /* 2 11b/g/n */ -+ RF_8258 = 3, /* 3 11a/b/g/n RF */ -+ RF_6052 = 4, /* 4 11b/g/n RF */ -+ RF_PSEUDO_11N = 5, /* 5, It is a temporality RF. */ -+ RF_CHIP_MAX -+} RF_CHIP_E, *PRF_CHIP_E; -+ -+typedef enum _ANTENNA_PATH { -+ ANTENNA_NONE = 0, -+ ANTENNA_D = 1, -+ ANTENNA_C = 2, -+ ANTENNA_CD = 3, -+ ANTENNA_B = 4, -+ ANTENNA_BD = 5, -+ ANTENNA_BC = 6, -+ ANTENNA_BCD = 7, -+ ANTENNA_A = 8, -+ ANTENNA_AD = 9, -+ ANTENNA_AC = 10, -+ ANTENNA_ACD = 11, -+ ANTENNA_AB = 12, -+ ANTENNA_ABD = 13, -+ ANTENNA_ABC = 14, -+ ANTENNA_ABCD = 15 -+} ANTENNA_PATH; -+ -+typedef enum _RF_CONTENT { -+ radioa_txt = 0x1000, -+ radiob_txt = 0x1001, -+ radioc_txt = 0x1002, -+ radiod_txt = 0x1003 -+} RF_CONTENT; -+ -+typedef enum _BaseBand_Config_Type { -+ BaseBand_Config_PHY_REG = 0, /* Radio Path A */ -+ BaseBand_Config_AGC_TAB = 1, /* Radio Path B */ -+ BaseBand_Config_AGC_TAB_2G = 2, -+ BaseBand_Config_AGC_TAB_5G = 3, -+ BaseBand_Config_PHY_REG_PG -+} BaseBand_Config_Type, *PBaseBand_Config_Type; -+ -+typedef enum _HW_BLOCK { -+ HW_BLOCK_MAC = 0, -+ HW_BLOCK_PHY0 = 1, -+ HW_BLOCK_PHY1 = 2, -+ HW_BLOCK_RF = 3, -+ HW_BLOCK_MAXIMUM = 4, /* Never use this */ -+} HW_BLOCK_E, *PHW_BLOCK_E; -+ -+typedef enum _WIRELESS_MODE { -+ WIRELESS_MODE_UNKNOWN = 0x00, -+ WIRELESS_MODE_A = 0x01, -+ WIRELESS_MODE_B = 0x02, -+ WIRELESS_MODE_G = 0x04, -+ WIRELESS_MODE_AUTO = 0x08, -+ WIRELESS_MODE_N_24G = 0x10, -+ WIRELESS_MODE_N_5G = 0x20, -+ WIRELESS_MODE_AC_5G = 0x40, -+ WIRELESS_MODE_AC_24G = 0x80, -+ WIRELESS_MODE_AC_ONLY = 0x100, -+} WIRELESS_MODE; -+ -+typedef enum _SwChnlCmdID { -+ CmdID_End, -+ CmdID_SetTxPowerLevel, -+ CmdID_BBRegWrite10, -+ CmdID_WritePortUlong, -+ CmdID_WritePortUshort, -+ CmdID_WritePortUchar, -+ CmdID_RF_WriteReg, -+} SwChnlCmdID; -+ -+typedef struct _SwChnlCmd { -+ SwChnlCmdID CmdID; -+ u32 Para1; -+ u32 Para2; -+ u32 msDelay; -+} SwChnlCmd; -+ -+typedef struct _R_ANTENNA_SELECT_OFDM { -+ u32 r_tx_antenna:4; -+ u32 r_ant_l:4; -+ u32 r_ant_non_ht:4; -+ u32 r_ant_ht1:4; -+ u32 r_ant_ht2:4; -+ u32 r_ant_ht_s1:4; -+ u32 r_ant_non_ht_s1:4; -+ u32 OFDM_TXSC:2; -+ u32 Reserved:2; -+} R_ANTENNA_SELECT_OFDM; -+ -+typedef struct _R_ANTENNA_SELECT_CCK { -+ u8 r_cckrx_enable_2:2; -+ u8 r_cckrx_enable:2; -+ u8 r_ccktx_enable:4; -+} R_ANTENNA_SELECT_CCK; -+ -+ -+/*--------------------------Exported Function prototype---------------------*/ -+u32 -+PHY_CalculateBitShift( -+ u32 BitMask -+); -+ -+#ifdef CONFIG_RF_SHADOW_RW -+typedef struct RF_Shadow_Compare_Map { -+ /* Shadow register value */ -+ u32 Value; -+ /* Compare or not flag */ -+ u8 Compare; -+ /* Record If it had ever modified unpredicted */ -+ u8 ErrorOrNot; -+ /* Recorver Flag */ -+ u8 Recorver; -+ /* */ -+ u8 Driver_Write; -+} RF_SHADOW_T; -+ -+u32 -+PHY_RFShadowRead( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset); -+ -+void -+PHY_RFShadowWrite( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset, -+ u32 Data); -+ -+BOOLEAN -+PHY_RFShadowCompare( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset); -+ -+void -+PHY_RFShadowRecorver( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset); -+ -+void -+PHY_RFShadowCompareAll( -+ PADAPTER Adapter); -+ -+void -+PHY_RFShadowRecorverAll( -+ PADAPTER Adapter); -+ -+void -+PHY_RFShadowCompareFlagSet( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset, -+ u8 Type); -+ -+void -+PHY_RFShadowRecorverFlagSet( -+ PADAPTER Adapter, -+ enum rf_path eRFPath, -+ u32 Offset, -+ u8 Type); -+ -+void -+PHY_RFShadowCompareFlagSetAll( -+ PADAPTER Adapter); -+ -+void -+PHY_RFShadowRecorverFlagSetAll( -+ PADAPTER Adapter); -+ -+void -+PHY_RFShadowRefresh( -+ PADAPTER Adapter); -+#endif /*#CONFIG_RF_SHADOW_RW*/ -+#endif /* __HAL_COMMON_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/hal_phy_reg.h b/drivers/staging/rtl8723cs/include/hal_phy_reg.h -new file mode 100644 -index 000000000000..13d77ab415ed ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_phy_reg.h -@@ -0,0 +1,270 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_PHY_REG_H__ -+#define __HAL_PHY_REG_H__ -+ -+/* for PutRFRegsetting & GetRFRegSetting BitMask*/ -+#define bRFRegOffsetMask 0xfffff -+ -+/* alias for phydm coding style */ -+#define REG_OFDM_0_XA_TX_IQ_IMBALANCE rOFDM0_XATxIQImbalance -+#define REG_OFDM_0_ECCA_THRESHOLD rOFDM0_ECCAThreshold -+#define REG_FPGA0_XB_LSSI_READ_BACK rFPGA0_XB_LSSIReadBack -+#define REG_FPGA0_TX_GAIN_STAGE rFPGA0_TxGainStage -+#define REG_OFDM_0_XA_AGC_CORE1 rOFDM0_XAAGCCore1 -+#define REG_OFDM_0_XB_AGC_CORE1 rOFDM0_XBAGCCore1 -+#define REG_A_TX_SCALE_JAGUAR rA_TxScale_Jaguar -+#define REG_B_TX_SCALE_JAGUAR rB_TxScale_Jaguar -+ -+#define REG_FPGA0_XAB_RF_INTERFACE_SW rFPGA0_XAB_RFInterfaceSW -+#define REG_FPGA0_XAB_RF_PARAMETER rFPGA0_XAB_RFParameter -+#define REG_FPGA0_XA_HSSI_PARAMETER1 rFPGA0_XA_HSSIParameter1 -+#define REG_FPGA0_XA_LSSI_PARAMETER rFPGA0_XA_LSSIParameter -+#define REG_FPGA0_XA_RF_INTERFACE_OE rFPGA0_XA_RFInterfaceOE -+#define REG_FPGA0_XB_HSSI_PARAMETER1 rFPGA0_XB_HSSIParameter1 -+#define REG_FPGA0_XB_LSSI_PARAMETER rFPGA0_XB_LSSIParameter -+#define REG_FPGA0_XB_LSSI_READ_BACK rFPGA0_XB_LSSIReadBack -+#define REG_FPGA0_XB_RF_INTERFACE_OE rFPGA0_XB_RFInterfaceOE -+#define REG_FPGA0_XCD_RF_INTERFACE_SW rFPGA0_XCD_RFInterfaceSW -+#define REG_FPGA0_XCD_SWITCH_CONTROL rFPGA0_XCD_SwitchControl -+#define REG_FPGA1_TX_BLOCK rFPGA1_TxBlock -+#define REG_FPGA1_TX_INFO rFPGA1_TxInfo -+#define REG_IQK_AGC_CONT rIQK_AGC_Cont -+#define REG_IQK_AGC_PTS rIQK_AGC_Pts -+#define REG_IQK_AGC_RSP rIQK_AGC_Rsp -+#define REG_OFDM_0_AGC_RSSI_TABLE rOFDM0_AGCRSSITable -+#define REG_OFDM_0_ECCA_THRESHOLD rOFDM0_ECCAThreshold -+#define REG_OFDM_0_RX_IQ_EXT_ANTA rOFDM0_RxIQExtAnta -+#define REG_OFDM_0_TR_MUX_PAR rOFDM0_TRMuxPar -+#define REG_OFDM_0_TRX_PATH_ENABLE rOFDM0_TRxPathEnable -+#define REG_OFDM_0_XA_AGC_CORE1 rOFDM0_XAAGCCore1 -+#define REG_OFDM_0_XA_RX_IQ_IMBALANCE rOFDM0_XARxIQImbalance -+#define REG_OFDM_0_XA_TX_IQ_IMBALANCE rOFDM0_XATxIQImbalance -+#define REG_OFDM_0_XB_AGC_CORE1 rOFDM0_XBAGCCore1 -+#define REG_OFDM_0_XB_RX_IQ_IMBALANCE rOFDM0_XBRxIQImbalance -+#define REG_OFDM_0_XB_TX_IQ_IMBALANCE rOFDM0_XBTxIQImbalance -+#define REG_OFDM_0_XC_TX_AFE rOFDM0_XCTxAFE -+#define REG_OFDM_0_XD_TX_AFE rOFDM0_XDTxAFE -+ -+/*#define REG_A_CFO_LONG_DUMP_92E rA_CfoLongDump_92E*/ -+#define REG_A_CFO_LONG_DUMP_JAGUAR rA_CfoLongDump_Jaguar -+/*#define REG_A_CFO_SHORT_DUMP_92E rA_CfoShortDump_92E*/ -+#define REG_A_CFO_SHORT_DUMP_JAGUAR rA_CfoShortDump_Jaguar -+#define REG_A_RFE_PINMUX_JAGUAR rA_RFE_Pinmux_Jaguar -+/*#define REG_A_RSSI_DUMP_92E rA_RSSIDump_92E*/ -+#define REG_A_RSSI_DUMP_JAGUAR rA_RSSIDump_Jaguar -+/*#define REG_A_RX_SNR_DUMP_92E rA_RXsnrDump_92E*/ -+#define REG_A_RX_SNR_DUMP_JAGUAR rA_RXsnrDump_Jaguar -+/*#define REG_A_TX_AGC rA_TXAGC*/ -+#define REG_A_TX_SCALE_JAGUAR rA_TxScale_Jaguar -+#define REG_BW_INDICATION_JAGUAR rBWIndication_Jaguar -+/*#define REG_B_BBSWING rB_BBSWING*/ -+/*#define REG_B_CFO_LONG_DUMP_92E rB_CfoLongDump_92E*/ -+#define REG_B_CFO_LONG_DUMP_JAGUAR rB_CfoLongDump_Jaguar -+/*#define REG_B_CFO_SHORT_DUMP_92E rB_CfoShortDump_92E*/ -+#define REG_B_CFO_SHORT_DUMP_JAGUAR rB_CfoShortDump_Jaguar -+/*#define REG_B_RSSI_DUMP_92E rB_RSSIDump_92E*/ -+#define REG_B_RSSI_DUMP_JAGUAR rB_RSSIDump_Jaguar -+/*#define REG_B_RX_SNR_DUMP_92E rB_RXsnrDump_92E*/ -+#define REG_B_RX_SNR_DUMP_JAGUAR rB_RXsnrDump_Jaguar -+/*#define REG_B_TX_AGC rB_TXAGC*/ -+#define REG_B_TX_SCALE_JAGUAR rB_TxScale_Jaguar -+#define REG_BLUE_TOOTH rBlue_Tooth -+#define REG_CCK_0_AFE_SETTING rCCK0_AFESetting -+/*#define REG_C_BBSWING rC_BBSWING*/ -+/*#define REG_C_TX_AGC rC_TXAGC*/ -+#define REG_C_TX_SCALE_JAGUAR2 rC_TxScale_Jaguar2 -+#define REG_CONFIG_ANT_A rConfig_AntA -+#define REG_CONFIG_ANT_B rConfig_AntB -+#define REG_CONFIG_PMPD_ANT_A rConfig_Pmpd_AntA -+#define REG_CONFIG_PMPD_ANT_B rConfig_Pmpd_AntB -+#define REG_DPDT_CONTROL rDPDT_control -+/*#define REG_D_BBSWING rD_BBSWING*/ -+/*#define REG_D_TX_AGC rD_TXAGC*/ -+#define REG_D_TX_SCALE_JAGUAR2 rD_TxScale_Jaguar2 -+#define REG_FPGA0_ANALOG_PARAMETER4 rFPGA0_AnalogParameter4 -+#define REG_FPGA0_IQK rFPGA0_IQK -+#define REG_FPGA0_PSD_FUNCTION rFPGA0_PSDFunction -+#define REG_FPGA0_PSD_REPORT rFPGA0_PSDReport -+#define REG_FPGA0_RFMOD rFPGA0_RFMOD -+#define REG_FPGA0_TX_GAIN_STAGE rFPGA0_TxGainStage -+#define REG_FPGA0_XAB_RF_INTERFACE_SW rFPGA0_XAB_RFInterfaceSW -+#define REG_FPGA0_XAB_RF_PARAMETER rFPGA0_XAB_RFParameter -+#define REG_FPGA0_XA_HSSI_PARAMETER1 rFPGA0_XA_HSSIParameter1 -+#define REG_FPGA0_XA_LSSI_PARAMETER rFPGA0_XA_LSSIParameter -+#define REG_FPGA0_XA_RF_INTERFACE_OE rFPGA0_XA_RFInterfaceOE -+#define REG_FPGA0_XB_HSSI_PARAMETER1 rFPGA0_XB_HSSIParameter1 -+#define REG_FPGA0_XB_LSSI_PARAMETER rFPGA0_XB_LSSIParameter -+#define REG_FPGA0_XB_LSSI_READ_BACK rFPGA0_XB_LSSIReadBack -+#define REG_FPGA0_XB_RF_INTERFACE_OE rFPGA0_XB_RFInterfaceOE -+#define REG_FPGA0_XCD_RF_INTERFACE_SW rFPGA0_XCD_RFInterfaceSW -+#define REG_FPGA0_XCD_SWITCH_CONTROL rFPGA0_XCD_SwitchControl -+#define REG_FPGA1_TX_BLOCK rFPGA1_TxBlock -+#define REG_FPGA1_TX_INFO rFPGA1_TxInfo -+#define REG_IQK_AGC_CONT rIQK_AGC_Cont -+#define REG_IQK_AGC_PTS rIQK_AGC_Pts -+#define REG_IQK_AGC_RSP rIQK_AGC_Rsp -+#define REG_OFDM_0_AGC_RSSI_TABLE rOFDM0_AGCRSSITable -+#define REG_OFDM_0_ECCA_THRESHOLD rOFDM0_ECCAThreshold -+#define REG_OFDM_0_RX_IQ_EXT_ANTA rOFDM0_RxIQExtAnta -+#define REG_OFDM_0_TR_MUX_PAR rOFDM0_TRMuxPar -+#define REG_OFDM_0_TRX_PATH_ENABLE rOFDM0_TRxPathEnable -+#define REG_OFDM_0_XA_AGC_CORE1 rOFDM0_XAAGCCore1 -+#define REG_OFDM_0_XA_RX_IQ_IMBALANCE rOFDM0_XARxIQImbalance -+#define REG_OFDM_0_XA_TX_IQ_IMBALANCE rOFDM0_XATxIQImbalance -+#define REG_OFDM_0_XB_AGC_CORE1 rOFDM0_XBAGCCore1 -+#define REG_OFDM_0_XB_RX_IQ_IMBALANCE rOFDM0_XBRxIQImbalance -+#define REG_OFDM_0_XB_TX_IQ_IMBALANCE rOFDM0_XBTxIQImbalance -+#define REG_OFDM_0_XC_TX_AFE rOFDM0_XCTxAFE -+#define REG_OFDM_0_XD_TX_AFE rOFDM0_XDTxAFE -+#define REG_PMPD_ANAEN rPMPD_ANAEN -+#define REG_PDP_ANT_A rPdp_AntA -+#define REG_PDP_ANT_A_4 rPdp_AntA_4 -+#define REG_PDP_ANT_B rPdp_AntB -+#define REG_PDP_ANT_B_4 rPdp_AntB_4 -+#define REG_PWED_TH_JAGUAR rPwed_TH_Jaguar -+#define REG_RX_CCK rRx_CCK -+#define REG_RX_IQK rRx_IQK -+#define REG_RX_IQK_PI_A rRx_IQK_PI_A -+#define REG_RX_IQK_PI_B rRx_IQK_PI_B -+#define REG_RX_IQK_TONE_A rRx_IQK_Tone_A -+#define REG_RX_IQK_TONE_B rRx_IQK_Tone_B -+#define REG_RX_OFDM rRx_OFDM -+#define REG_RX_POWER_AFTER_IQK_A_2 rRx_Power_After_IQK_A_2 -+#define REG_RX_POWER_AFTER_IQK_B_2 rRx_Power_After_IQK_B_2 -+#define REG_RX_POWER_BEFORE_IQK_A_2 rRx_Power_Before_IQK_A_2 -+#define REG_RX_POWER_BEFORE_IQK_B_2 rRx_Power_Before_IQK_B_2 -+#define REG_RX_TO_RX rRx_TO_Rx -+#define REG_RX_WAIT_CCA rRx_Wait_CCA -+#define REG_RX_WAIT_RIFS rRx_Wait_RIFS -+#define REG_S0_S1_PATH_SWITCH rS0S1_PathSwitch -+/*#define REG_S1_RXEVM_DUMP_92E rS1_RXevmDump_92E*/ -+#define REG_S1_RXEVM_DUMP_JAGUAR rS1_RXevmDump_Jaguar -+/*#define REG_S2_RXEVM_DUMP_92E rS2_RXevmDump_92E*/ -+#define REG_S2_RXEVM_DUMP_JAGUAR rS2_RXevmDump_Jaguar -+#define REG_SYM_WLBT_PAPE_SEL rSYM_WLBT_PAPE_SEL -+#define REG_SINGLE_TONE_CONT_TX_JAGUAR rSingleTone_ContTx_Jaguar -+#define REG_SLEEP rSleep -+#define REG_STANDBY rStandby -+#define REG_TX_AGC_A_CCK_11_CCK_1_JAGUAR rTxAGC_A_CCK11_CCK1_JAguar -+#define REG_TX_AGC_A_CCK_1_MCS32 rTxAGC_A_CCK1_Mcs32 -+#define REG_TX_AGC_A_MCS11_MCS8_JAGUAR rTxAGC_A_MCS11_MCS8_JAguar -+#define REG_TX_AGC_A_MCS15_MCS12_JAGUAR rTxAGC_A_MCS15_MCS12_JAguar -+#define REG_TX_AGC_A_MCS19_MCS16_JAGUAR rTxAGC_A_MCS19_MCS16_JAguar -+#define REG_TX_AGC_A_MCS23_MCS20_JAGUAR rTxAGC_A_MCS23_MCS20_JAguar -+#define REG_TX_AGC_A_MCS3_MCS0_JAGUAR rTxAGC_A_MCS3_MCS0_JAguar -+#define REG_TX_AGC_A_MCS7_MCS4_JAGUAR rTxAGC_A_MCS7_MCS4_JAguar -+#define REG_TX_AGC_A_MCS03_MCS00 rTxAGC_A_Mcs03_Mcs00 -+#define REG_TX_AGC_A_MCS07_MCS04 rTxAGC_A_Mcs07_Mcs04 -+#define REG_TX_AGC_A_MCS11_MCS08 rTxAGC_A_Mcs11_Mcs08 -+#define REG_TX_AGC_A_MCS15_MCS12 rTxAGC_A_Mcs15_Mcs12 -+#define REG_TX_AGC_A_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_A_Nss1Index3_Nss1Index0_JAguar -+#define REG_TX_AGC_A_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_A_Nss1Index7_Nss1Index4_JAguar -+#define REG_TX_AGC_A_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_A_Nss2Index1_Nss1Index8_JAguar -+#define REG_TX_AGC_A_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_A_Nss2Index5_Nss2Index2_JAguar -+#define REG_TX_AGC_A_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_A_Nss2Index9_Nss2Index6_JAguar -+#define REG_TX_AGC_A_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_A_Nss3Index3_Nss3Index0_JAguar -+#define REG_TX_AGC_A_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_A_Nss3Index7_Nss3Index4_JAguar -+#define REG_TX_AGC_A_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_A_Nss3Index9_Nss3Index8_JAguar -+#define REG_TX_AGC_A_OFDM18_OFDM6_JAGUAR rTxAGC_A_Ofdm18_Ofdm6_JAguar -+#define REG_TX_AGC_A_OFDM54_OFDM24_JAGUAR rTxAGC_A_Ofdm54_Ofdm24_JAguar -+#define REG_TX_AGC_A_RATE18_06 rTxAGC_A_Rate18_06 -+#define REG_TX_AGC_A_RATE54_24 rTxAGC_A_Rate54_24 -+#define REG_TX_AGC_B_CCK_11_A_CCK_2_11 rTxAGC_B_CCK11_A_CCK2_11 -+#define REG_TX_AGC_B_CCK_11_CCK_1_JAGUAR rTxAGC_B_CCK11_CCK1_JAguar -+#define REG_TX_AGC_B_CCK_1_55_MCS32 rTxAGC_B_CCK1_55_Mcs32 -+#define REG_TX_AGC_B_MCS11_MCS8_JAGUAR rTxAGC_B_MCS11_MCS8_JAguar -+#define REG_TX_AGC_B_MCS15_MCS12_JAGUAR rTxAGC_B_MCS15_MCS12_JAguar -+#define REG_TX_AGC_B_MCS19_MCS16_JAGUAR rTxAGC_B_MCS19_MCS16_JAguar -+#define REG_TX_AGC_B_MCS23_MCS20_JAGUAR rTxAGC_B_MCS23_MCS20_JAguar -+#define REG_TX_AGC_B_MCS3_MCS0_JAGUAR rTxAGC_B_MCS3_MCS0_JAguar -+#define REG_TX_AGC_B_MCS7_MCS4_JAGUAR rTxAGC_B_MCS7_MCS4_JAguar -+#define REG_TX_AGC_B_MCS03_MCS00 rTxAGC_B_Mcs03_Mcs00 -+#define REG_TX_AGC_B_MCS07_MCS04 rTxAGC_B_Mcs07_Mcs04 -+#define REG_TX_AGC_B_MCS11_MCS08 rTxAGC_B_Mcs11_Mcs08 -+#define REG_TX_AGC_B_MCS15_MCS12 rTxAGC_B_Mcs15_Mcs12 -+#define REG_TX_AGC_B_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_B_Nss1Index3_Nss1Index0_JAguar -+#define REG_TX_AGC_B_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_B_Nss1Index7_Nss1Index4_JAguar -+#define REG_TX_AGC_B_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_B_Nss2Index1_Nss1Index8_JAguar -+#define REG_TX_AGC_B_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_B_Nss2Index5_Nss2Index2_JAguar -+#define REG_TX_AGC_B_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_B_Nss2Index9_Nss2Index6_JAguar -+#define REG_TX_AGC_B_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_B_Nss3Index3_Nss3Index0_JAguar -+#define REG_TX_AGC_B_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_B_Nss3Index7_Nss3Index4_JAguar -+#define REG_TX_AGC_B_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_B_Nss3Index9_Nss3Index8_JAguar -+#define REG_TX_AGC_B_OFDM18_OFDM6_JAGUAR rTxAGC_B_Ofdm18_Ofdm6_JAguar -+#define REG_TX_AGC_B_OFDM54_OFDM24_JAGUAR rTxAGC_B_Ofdm54_Ofdm24_JAguar -+#define REG_TX_AGC_B_RATE18_06 rTxAGC_B_Rate18_06 -+#define REG_TX_AGC_B_RATE54_24 rTxAGC_B_Rate54_24 -+#define REG_TX_AGC_C_CCK_11_CCK_1_JAGUAR rTxAGC_C_CCK11_CCK1_JAguar -+#define REG_TX_AGC_C_MCS11_MCS8_JAGUAR rTxAGC_C_MCS11_MCS8_JAguar -+#define REG_TX_AGC_C_MCS15_MCS12_JAGUAR rTxAGC_C_MCS15_MCS12_JAguar -+#define REG_TX_AGC_C_MCS19_MCS16_JAGUAR rTxAGC_C_MCS19_MCS16_JAguar -+#define REG_TX_AGC_C_MCS23_MCS20_JAGUAR rTxAGC_C_MCS23_MCS20_JAguar -+#define REG_TX_AGC_C_MCS3_MCS0_JAGUAR rTxAGC_C_MCS3_MCS0_JAguar -+#define REG_TX_AGC_C_MCS7_MCS4_JAGUAR rTxAGC_C_MCS7_MCS4_JAguar -+#define REG_TX_AGC_C_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_C_Nss1Index3_Nss1Index0_JAguar -+#define REG_TX_AGC_C_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_C_Nss1Index7_Nss1Index4_JAguar -+#define REG_TX_AGC_C_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_C_Nss2Index1_Nss1Index8_JAguar -+#define REG_TX_AGC_C_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_C_Nss2Index5_Nss2Index2_JAguar -+#define REG_TX_AGC_C_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_C_Nss2Index9_Nss2Index6_JAguar -+#define REG_TX_AGC_C_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_C_Nss3Index3_Nss3Index0_JAguar -+#define REG_TX_AGC_C_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_C_Nss3Index7_Nss3Index4_JAguar -+#define REG_TX_AGC_C_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_C_Nss3Index9_Nss3Index8_JAguar -+#define REG_TX_AGC_C_OFDM18_OFDM6_JAGUAR rTxAGC_C_Ofdm18_Ofdm6_JAguar -+#define REG_TX_AGC_C_OFDM54_OFDM24_JAGUAR rTxAGC_C_Ofdm54_Ofdm24_JAguar -+#define REG_TX_AGC_D_CCK_11_CCK_1_JAGUAR rTxAGC_D_CCK11_CCK1_JAguar -+#define REG_TX_AGC_D_MCS11_MCS8_JAGUAR rTxAGC_D_MCS11_MCS8_JAguar -+#define REG_TX_AGC_D_MCS15_MCS12_JAGUAR rTxAGC_D_MCS15_MCS12_JAguar -+#define REG_TX_AGC_D_MCS19_MCS16_JAGUAR rTxAGC_D_MCS19_MCS16_JAguar -+#define REG_TX_AGC_D_MCS23_MCS20_JAGUAR rTxAGC_D_MCS23_MCS20_JAguar -+#define REG_TX_AGC_D_MCS3_MCS0_JAGUAR rTxAGC_D_MCS3_MCS0_JAguar -+#define REG_TX_AGC_D_MCS7_MCS4_JAGUAR rTxAGC_D_MCS7_MCS4_JAguar -+#define REG_TX_AGC_D_NSS1_INDEX3_NSS1_INDEX0_JAGUAR rTxAGC_D_Nss1Index3_Nss1Index0_JAguar -+#define REG_TX_AGC_D_NSS1_INDEX7_NSS1_INDEX4_JAGUAR rTxAGC_D_Nss1Index7_Nss1Index4_JAguar -+#define REG_TX_AGC_D_NSS2_INDEX1_NSS1_INDEX8_JAGUAR rTxAGC_D_Nss2Index1_Nss1Index8_JAguar -+#define REG_TX_AGC_D_NSS2_INDEX5_NSS2_INDEX2_JAGUAR rTxAGC_D_Nss2Index5_Nss2Index2_JAguar -+#define REG_TX_AGC_D_NSS2_INDEX9_NSS2_INDEX6_JAGUAR rTxAGC_D_Nss2Index9_Nss2Index6_JAguar -+#define REG_TX_AGC_D_NSS3_INDEX3_NSS3_INDEX0_JAGUAR rTxAGC_D_Nss3Index3_Nss3Index0_JAguar -+#define REG_TX_AGC_D_NSS3_INDEX7_NSS3_INDEX4_JAGUAR rTxAGC_D_Nss3Index7_Nss3Index4_JAguar -+#define REG_TX_AGC_D_NSS3_INDEX9_NSS3_INDEX8_JAGUAR rTxAGC_D_Nss3Index9_Nss3Index8_JAguar -+#define REG_TX_AGC_D_OFDM18_OFDM6_JAGUAR rTxAGC_D_Ofdm18_Ofdm6_JAguar -+#define REG_TX_AGC_D_OFDM54_OFDM24_JAGUAR rTxAGC_D_Ofdm54_Ofdm24_JAguar -+#define REG_TX_PATH_JAGUAR rTxPath_Jaguar -+#define REG_TX_CCK_BBON rTx_CCK_BBON -+#define REG_TX_CCK_RFON rTx_CCK_RFON -+#define REG_TX_IQK rTx_IQK -+#define REG_TX_IQK_PI_A rTx_IQK_PI_A -+#define REG_TX_IQK_PI_B rTx_IQK_PI_B -+#define REG_TX_IQK_TONE_A rTx_IQK_Tone_A -+#define REG_TX_IQK_TONE_B rTx_IQK_Tone_B -+#define REG_TX_OFDM_BBON rTx_OFDM_BBON -+#define REG_TX_OFDM_RFON rTx_OFDM_RFON -+#define REG_TX_POWER_AFTER_IQK_A rTx_Power_After_IQK_A -+#define REG_TX_POWER_AFTER_IQK_B rTx_Power_After_IQK_B -+#define REG_TX_POWER_BEFORE_IQK_A rTx_Power_Before_IQK_A -+#define REG_TX_POWER_BEFORE_IQK_B rTx_Power_Before_IQK_B -+#define REG_TX_TO_RX rTx_To_Rx -+#define REG_TX_TO_TX rTx_To_Tx -+#define REG_APK rAPK -+#define REG_ANTSEL_SW_JAGUAR r_ANTSEL_SW_Jaguar -+ -+#define rf_welut_jaguar RF_WeLut_Jaguar -+#define rf_mode_table_addr RF_ModeTableAddr -+#define rf_mode_table_data0 RF_ModeTableData0 -+#define rf_mode_table_data1 RF_ModeTableData1 -+ -+#define RX_SMOOTH_FACTOR Rx_Smooth_Factor -+ -+#endif /* __HAL_PHY_REG_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/hal_sdio.h b/drivers/staging/rtl8723cs/include/hal_sdio.h -new file mode 100644 -index 000000000000..dbdbdca437d6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_sdio.h -@@ -0,0 +1,95 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __HAL_SDIO_H_ -+#define __HAL_SDIO_H_ -+ -+#define ffaddr2deviceId(pdvobj, addr) (pdvobj->Queue2Pipe[addr]) -+ -+#ifndef RTW_HALMAC -+extern const char *_sdio_tx_queue_str[]; -+#define sdio_tx_queue_str(_page_idx) (_page_idx >= SDIO_MAX_TX_QUEUE ? "UNKNOWN" : _sdio_tx_queue_str[_page_idx]) -+#endif -+ -+u8 rtw_hal_sdio_max_txoqt_free_space(_adapter *padapter); -+u8 rtw_hal_sdio_query_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); -+void rtw_hal_sdio_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); -+void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ, u8 div_num); -+u32 rtw_hal_get_sdio_tx_max_length(PADAPTER padapter, u8 queue_idx); -+bool sdio_power_on_check(PADAPTER padapter); -+ -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) ||defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8723D) -+void rtw_hal_sdio_avail_page_threshold_init(_adapter *adapter); -+void rtw_hal_sdio_avail_page_threshold_en(_adapter *adapter, u8 qidx, u8 pg_num); -+#endif -+#endif /* CONFIG_SDIO_TX_ENABLE_AVAL_INT */ -+ -+#ifdef CONFIG_FW_C2H_REG -+void sd_c2h_hisr_hdl(_adapter *adapter); -+#endif -+ -+#if defined(CONFIG_RTL8188F) || defined (CONFIG_RTL8188GTV) || defined (CONFIG_RTL8192F) || defined(CONFIG_RTL8723D) -+#define SDIO_LOCAL_CMD_ADDR(addr) ((SDIO_LOCAL_DEVICE_ID << 13) | ((addr) & SDIO_LOCAL_MSK)) -+#endif -+ -+#ifdef CONFIG_SDIO_CHK_HCI_RESUME -+bool sdio_chk_hci_resume(struct intf_hdl *pintfhdl); -+void sdio_chk_hci_suspend(struct intf_hdl *pintfhdl); -+#else -+#define sdio_chk_hci_resume(pintfhdl) _FALSE -+#define sdio_chk_hci_suspend(pintfhdl) do {} while (0) -+#endif /* CONFIG_SDIO_CHK_HCI_RESUME */ -+ -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+/* program indirect access register in sdio local to read/write page0 registers */ -+s32 sdio_iread(PADAPTER padapter, u32 addr, u8 size, u8 *v); -+s32 sdio_iwrite(PADAPTER padapter, u32 addr, u8 size, u8 *v); -+u8 sdio_iread8(struct intf_hdl *pintfhdl, u32 addr); -+u16 sdio_iread16(struct intf_hdl *pintfhdl, u32 addr); -+u32 sdio_iread32(struct intf_hdl *pintfhdl, u32 addr); -+s32 sdio_iwrite8(struct intf_hdl *pintfhdl, u32 addr, u8 val); -+s32 sdio_iwrite16(struct intf_hdl *pintfhdl, u32 addr, u16 val); -+s32 sdio_iwrite32(struct intf_hdl *pintfhdl, u32 addr, u32 val); -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+u32 cmd53_4byte_alignment(struct intf_hdl *pintfhdl, u32 addr); -+ -+#ifndef CONFIG_SDIO_TX_TASKLET -+#ifdef SDIO_FREE_XMIT_BUF_SEMA -+void _rtw_sdio_free_xmitbuf_sema_up(struct xmit_priv *xmit); -+void _rtw_sdio_free_xmitbuf_sema_down(struct xmit_priv *xmit); -+#ifdef DBG_SDIO_FREE_XMIT_BUF_SEMA -+void dbg_rtw_sdio_free_xmitbuf_sema_up(struct xmit_priv *xmit, const char *caller); -+void dbg_rtw_sdio_free_xmitbuf_sema_down(struct xmit_priv *xmit, const char *caller); -+#define rtw_sdio_free_xmitbuf_sema_up(_xmit) dbg_rtw_sdio_free_xmitbuf_sema_up(_xmit, __func__) -+#define rtw_sdio_free_xmitbuf_sema_down(_xmit) dbg_rtw_sdio_free_xmitbuf_sema_down(_xmit, __func__) -+#else -+#define rtw_sdio_free_xmitbuf_sema_up(_xmit) _rtw_sdio_free_xmitbuf_sema_up(_xmit) -+#define rtw_sdio_free_xmitbuf_sema_down(_xmit) _rtw_sdio_free_xmitbuf_sema_down(_xmit) -+#endif /* DBG_SDIO_FREE_XMIT_BUF_SEMA */ -+#endif /* SDIO_FREE_XMIT_BUF_SEMA */ -+#endif /* !CONFIG_SDIO_TX_TASKLET */ -+ -+s32 sdio_initrecvbuf(struct recv_buf *recvbuf, _adapter *adapter); -+void sdio_freerecvbuf(struct recv_buf *recvbuf); -+ -+#ifdef CONFIG_SDIO_RECVBUF_PWAIT -+void dump_recvbuf_pwait_conf(void *sel, struct recv_priv *recvpriv); -+#ifdef CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST -+int recvbuf_pwait_config_req(struct recv_priv *recvpriv, enum rtw_pwait_type type, s32 time, s32 cnt_lmt); -+int recvbuf_pwait_config_hdl(struct recv_priv *recvpriv, struct recv_buf *rbuf); -+#endif /* CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST */ -+#endif /* CONFIG_SDIO_RECVBUF_PWAIT */ -+ -+#endif /* __HAL_SDIO_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/hal_sdio_coex.h b/drivers/staging/rtl8723cs/include/hal_sdio_coex.h -new file mode 100644 -index 000000000000..ce41b9988b23 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/hal_sdio_coex.h -@@ -0,0 +1,41 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __HAL_SDIO_COEX_H__ -+#define __HAL_SDIO_COEX_H__ -+ -+#include -+ -+#ifdef CONFIG_SDIO_MULTI_FUNCTION_COEX -+ -+enum { /* for sdio multi-func. coex */ -+ SDIO_MULTI_WIFI = 0, -+ SDIO_MULTI_BT, -+ SDIO_MULTI_NUM -+}; -+ -+bool ex_hal_sdio_multi_if_bus_available(PADAPTER adapter); -+ -+#else -+ -+#define ex_hal_sdio_multi_if_bus_available(adapter) TRUE -+ -+#endif /* CONFIG_SDIO_MULTI_FUNCTION_COEX */ -+#endif /* !__HAL_SDIO_COEX_H__ */ -+ -diff --git a/drivers/staging/rtl8723cs/include/ieee80211.h b/drivers/staging/rtl8723cs/include/ieee80211.h -new file mode 100644 -index 000000000000..61083d144935 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/ieee80211.h -@@ -0,0 +1,2000 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __IEEE80211_H -+#define __IEEE80211_H -+ -+#define MGMT_QUEUE_NUM 5 -+ -+#define ETH_ALEN 6 -+#define ETH_TYPE_LEN 2 -+#define PAYLOAD_TYPE_LEN 1 -+ -+#define NET80211_TU_TO_US 1024 /* unit:us */ -+#define DEFAULT_BCN_INTERVAL 100 /* 100 ms */ -+ -+#ifdef CONFIG_AP_MODE -+ -+#define RTL_IOCTL_HOSTAPD (SIOCDEVPRIVATE + 2) -+ -+/* RTL871X_IOCTL_HOSTAPD ioctl() cmd: */ -+enum { -+ RTL871X_HOSTAPD_FLUSH = 1, -+ RTL871X_HOSTAPD_ADD_STA = 2, -+ RTL871X_HOSTAPD_REMOVE_STA = 3, -+ RTL871X_HOSTAPD_GET_INFO_STA = 4, -+ /* REMOVED: PRISM2_HOSTAPD_RESET_TXEXC_STA = 5, */ -+ RTL871X_HOSTAPD_GET_WPAIE_STA = 5, -+ RTL871X_SET_ENCRYPTION = 6, -+ RTL871X_GET_ENCRYPTION = 7, -+ RTL871X_HOSTAPD_SET_FLAGS_STA = 8, -+ RTL871X_HOSTAPD_GET_RID = 9, -+ RTL871X_HOSTAPD_SET_RID = 10, -+ RTL871X_HOSTAPD_SET_ASSOC_AP_ADDR = 11, -+ RTL871X_HOSTAPD_SET_GENERIC_ELEMENT = 12, -+ RTL871X_HOSTAPD_MLME = 13, -+ RTL871X_HOSTAPD_SCAN_REQ = 14, -+ RTL871X_HOSTAPD_STA_CLEAR_STATS = 15, -+ RTL871X_HOSTAPD_SET_BEACON = 16, -+ RTL871X_HOSTAPD_SET_WPS_BEACON = 17, -+ RTL871X_HOSTAPD_SET_WPS_PROBE_RESP = 18, -+ RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP = 19, -+ RTL871X_HOSTAPD_SET_HIDDEN_SSID = 20, -+ RTL871X_HOSTAPD_SET_MACADDR_ACL = 21, -+ RTL871X_HOSTAPD_ACL_ADD_STA = 22, -+ RTL871X_HOSTAPD_ACL_REMOVE_STA = 23, -+}; -+#endif /* CONFIG_AP_MODE */ -+ -+/* STA flags */ -+#define WLAN_STA_AUTH BIT(0) -+#define WLAN_STA_ASSOC BIT(1) -+#define WLAN_STA_PS BIT(2) -+#define WLAN_STA_TIM BIT(3) -+#define WLAN_STA_PERM BIT(4) -+#define WLAN_STA_AUTHORIZED BIT(5) -+#define WLAN_STA_PENDING_POLL BIT(6) /* pending activity poll not ACKed */ -+#define WLAN_STA_SHORT_PREAMBLE BIT(7) -+#define WLAN_STA_PREAUTH BIT(8) -+#define WLAN_STA_WME BIT(9) -+#define WLAN_STA_MFP BIT(10) -+#define WLAN_STA_HT BIT(11) -+#define WLAN_STA_WPS BIT(12) -+#define WLAN_STA_MAYBE_WPS BIT(13) -+#define WLAN_STA_VHT BIT(14) -+#define WLAN_STA_WDS BIT(15) -+#define WLAN_STA_MULTI_AP BIT(16) -+#define WLAN_STA_NONERP BIT(31) -+ -+#define IEEE_CMD_SET_WPA_PARAM 1 -+#define IEEE_CMD_SET_WPA_IE 2 -+#define IEEE_CMD_SET_ENCRYPTION 3 -+#define IEEE_CMD_MLME 4 -+ -+#define IEEE_PARAM_WPA_ENABLED 1 -+#define IEEE_PARAM_TKIP_COUNTERMEASURES 2 -+#define IEEE_PARAM_DROP_UNENCRYPTED 3 -+#define IEEE_PARAM_PRIVACY_INVOKED 4 -+#define IEEE_PARAM_AUTH_ALGS 5 -+#define IEEE_PARAM_IEEE_802_1X 6 -+#define IEEE_PARAM_WPAX_SELECT 7 -+ -+#define AUTH_ALG_OPEN_SYSTEM 0x1 -+#define AUTH_ALG_SHARED_KEY 0x2 -+#define AUTH_ALG_LEAP 0x00000004 -+ -+#define IEEE_MLME_STA_DEAUTH 1 -+#define IEEE_MLME_STA_DISASSOC 2 -+ -+#define IEEE_CRYPT_ERR_UNKNOWN_ALG 2 -+#define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3 -+#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4 -+#define IEEE_CRYPT_ERR_KEY_SET_FAILED 5 -+#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6 -+#define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7 -+ -+ -+#define IEEE_CRYPT_ALG_NAME_LEN 16 -+ -+#define WPA_CIPHER_NONE BIT(0) -+#define WPA_CIPHER_WEP40 BIT(1) -+#define WPA_CIPHER_WEP104 BIT(2) -+#define WPA_CIPHER_TKIP BIT(3) -+#define WPA_CIPHER_CCMP BIT(4) -+#define WPA_CIPHER_GCMP BIT(5) -+#define WPA_CIPHER_GCMP_256 BIT(6) -+#define WPA_CIPHER_CCMP_256 BIT(7) -+#define WPA_CIPHER_BIP_CMAC_128 BIT(8) -+#define WPA_CIPHER_BIP_GMAC_128 BIT(9) -+#define WPA_CIPHER_BIP_GMAC_256 BIT(10) -+#define WPA_CIPHER_BIP_CMAC_256 BIT(11) -+ -+ -+#define WPA_SELECTOR_LEN 4 -+extern u8 RTW_WPA_OUI_TYPE[] ; -+extern u16 RTW_WPA_VERSION ; -+extern u8 WPA_AUTH_KEY_MGMT_NONE[]; -+extern u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[]; -+extern u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[]; -+extern u8 WPA_CIPHER_SUITE_NONE[]; -+extern u8 WPA_CIPHER_SUITE_WEP40[]; -+extern u8 WPA_CIPHER_SUITE_TKIP[]; -+extern u8 WPA_CIPHER_SUITE_WRAP[]; -+extern u8 WPA_CIPHER_SUITE_CCMP[]; -+extern u8 RSN_CIPHER_SUITE_GCMP[]; -+extern u8 RSN_CIPHER_SUITE_GCMP_256[]; -+extern u8 RSN_CIPHER_SUITE_CCMP_256[]; -+extern u8 WPA_CIPHER_SUITE_WEP104[]; -+ -+ -+#define RSN_HEADER_LEN 4 -+#define RSN_SELECTOR_LEN 4 -+ -+extern u16 RSN_VERSION_BSD; -+extern u8 RSN_CIPHER_SUITE_NONE[]; -+extern u8 RSN_CIPHER_SUITE_WEP40[]; -+extern u8 RSN_CIPHER_SUITE_TKIP[]; -+extern u8 RSN_CIPHER_SUITE_WRAP[]; -+extern u8 RSN_CIPHER_SUITE_CCMP[]; -+extern u8 RSN_CIPHER_SUITE_WEP104[]; -+ -+/* AKM suite type */ -+extern u8 WLAN_AKM_8021X[]; -+extern u8 WLAN_AKM_PSK[]; -+extern u8 WLAN_AKM_FT_8021X[]; -+extern u8 WLAN_AKM_FT_PSK[]; -+extern u8 WLAN_AKM_8021X_SHA256[]; -+extern u8 WLAN_AKM_PSK_SHA256[]; -+extern u8 WLAN_AKM_TDLS[]; -+extern u8 WLAN_AKM_SAE[]; -+extern u8 WLAN_AKM_FT_OVER_SAE[]; -+extern u8 WLAN_AKM_8021X_SUITE_B[]; -+extern u8 WLAN_AKM_8021X_SUITE_B_192[]; -+extern u8 WLAN_AKM_FILS_SHA256[]; -+extern u8 WLAN_AKM_FILS_SHA384[]; -+extern u8 WLAN_AKM_FT_FILS_SHA256[]; -+extern u8 WLAN_AKM_FT_FILS_SHA384[]; -+ -+#define WLAN_AKM_TYPE_8021X BIT(0) -+#define WLAN_AKM_TYPE_PSK BIT(1) -+#define WLAN_AKM_TYPE_FT_8021X BIT(2) -+#define WLAN_AKM_TYPE_FT_PSK BIT(3) -+#define WLAN_AKM_TYPE_8021X_SHA256 BIT(4) -+#define WLAN_AKM_TYPE_PSK_SHA256 BIT(5) -+#define WLAN_AKM_TYPE_TDLS BIT(6) -+#define WLAN_AKM_TYPE_SAE BIT(7) -+#define WLAN_AKM_TYPE_FT_OVER_SAE BIT(8) -+#define WLAN_AKM_TYPE_8021X_SUITE_B BIT(9) -+#define WLAN_AKM_TYPE_8021X_SUITE_B_192 BIT(10) -+#define WLAN_AKM_TYPE_FILS_SHA256 BIT(11) -+#define WLAN_AKM_TYPE_FILS_SHA384 BIT(12) -+#define WLAN_AKM_TYPE_FT_FILS_SHA256 BIT(13) -+#define WLAN_AKM_TYPE_FT_FILS_SHA384 BIT(14) -+ -+/* IEEE 802.11i */ -+#define PMKID_LEN 16 -+#define PMK_LEN 32 -+#define PMK_LEN_SUITE_B_192 48 -+#define PMK_LEN_MAX 48 -+#define WPA_REPLAY_COUNTER_LEN 8 -+#define WPA_NONCE_LEN 32 -+#define WPA_KEY_RSC_LEN 8 -+#define WPA_GMK_LEN 32 -+#define WPA_GTK_MAX_LEN 32 -+ -+/* IEEE 802.11, 8.5.2 EAPOL-Key frames */ -+#define WPA_KEY_INFO_TYPE_MASK ((u16) (BIT(0) | BIT(1) | BIT(2))) -+#define WPA_KEY_INFO_TYPE_AKM_DEFINED 0 -+#define WPA_KEY_INFO_TYPE_HMAC_MD5_RC4 BIT(0) -+#define WPA_KEY_INFO_TYPE_HMAC_SHA1_AES BIT(1) -+#define WPA_KEY_INFO_TYPE_AES_128_CMAC 3 -+#define WPA_KEY_INFO_KEY_TYPE BIT(3) /* 1 = Pairwise, 0 = Group key */ -+/* bit4..5 is used in WPA, but is reserved in IEEE 802.11i/RSN */ -+#define WPA_KEY_INFO_KEY_INDEX_MASK (BIT(4) | BIT(5)) -+#define WPA_KEY_INFO_KEY_INDEX_SHIFT 4 -+#define WPA_KEY_INFO_INSTALL BIT(6) /* pairwise */ -+#define WPA_KEY_INFO_TXRX BIT(6) /* group */ -+#define WPA_KEY_INFO_ACK BIT(7) -+#define WPA_KEY_INFO_MIC BIT(8) -+#define WPA_KEY_INFO_SECURE BIT(9) -+#define WPA_KEY_INFO_ERROR BIT(10) -+#define WPA_KEY_INFO_REQUEST BIT(11) -+#define WPA_KEY_INFO_ENCR_KEY_DATA BIT(12) /* IEEE 802.11i/RSN only */ -+#define WPA_KEY_INFO_SMK_MESSAGE BIT(13) -+ -+struct ieee802_1x_hdr { -+ u8 version; -+ u8 type; -+ u16 length; -+ /* followed by length octets of data */ -+}; -+ -+struct wpa_eapol_key { -+ u8 type; -+ /* Note: key_info, key_length, and key_data_length are unaligned */ -+ u8 key_info[2]; /* big endian */ -+ u8 key_length[2]; /* big endian */ -+ u8 replay_counter[WPA_REPLAY_COUNTER_LEN]; -+ u8 key_nonce[WPA_NONCE_LEN]; -+ u8 key_iv[16]; -+ u8 key_rsc[WPA_KEY_RSC_LEN]; -+ u8 key_id[8]; /* Reserved in IEEE 802.11i/RSN */ -+ u8 key_mic[16]; -+ u8 key_data_length[2]; /* big endian */ -+ /* followed by key_data_length bytes of key_data */ -+}; -+ -+typedef enum _RATEID_IDX_ { -+ RATEID_IDX_BGN_40M_2SS = 0, -+ RATEID_IDX_BGN_40M_1SS = 1, -+ RATEID_IDX_BGN_20M_2SS_BN = 2, -+ RATEID_IDX_BGN_20M_1SS_BN = 3, -+ RATEID_IDX_GN_N2SS = 4, -+ RATEID_IDX_GN_N1SS = 5, -+ RATEID_IDX_BG = 6, -+ RATEID_IDX_G = 7, -+ RATEID_IDX_B = 8, -+ RATEID_IDX_VHT_2SS = 9, -+ RATEID_IDX_VHT_1SS = 10, -+ RATEID_IDX_MIX1 = 11, -+ RATEID_IDX_MIX2 = 12, -+ RATEID_IDX_VHT_3SS = 13, -+ RATEID_IDX_BGN_3SS = 14, -+ RATEID_IDX_BGN_4SS = 15, -+ RATEID_IDX_VHT_4SS = 16, -+} RATEID_IDX, *PRATEID_IDX; -+ -+typedef enum _RATR_TABLE_MODE { -+ RATR_INX_WIRELESS_NGB = 0, /* BGN 40 Mhz 2SS 1SS */ -+ RATR_INX_WIRELESS_NG = 1, /* GN or N */ -+ RATR_INX_WIRELESS_NB = 2, /* BGN 20 Mhz 2SS 1SS or BN */ -+ RATR_INX_WIRELESS_N = 3, -+ RATR_INX_WIRELESS_GB = 4, -+ RATR_INX_WIRELESS_G = 5, -+ RATR_INX_WIRELESS_B = 6, -+ RATR_INX_WIRELESS_MC = 7, -+ RATR_INX_WIRELESS_AC_N = 8, -+} RATR_TABLE_MODE, *PRATR_TABLE_MODE; -+ -+ -+enum NETWORK_TYPE { -+ WIRELESS_INVALID = 0, -+ /* Sub-Element */ -+ WIRELESS_11B = BIT(0), /* tx: cck only , rx: cck only, hw: cck */ -+ WIRELESS_11G = BIT(1), /* tx: ofdm only, rx: ofdm & cck, hw: cck & ofdm */ -+ WIRELESS_11A = BIT(2), /* tx: ofdm only, rx: ofdm only, hw: ofdm only */ -+ WIRELESS_11_24N = BIT(3), /* tx: MCS only, rx: MCS & cck, hw: MCS & cck */ -+ WIRELESS_11_5N = BIT(4), /* tx: MCS only, rx: MCS & ofdm, hw: ofdm only */ -+ WIRELESS_AUTO = BIT(5), -+ WIRELESS_11AC = BIT(6), -+ -+ /* Combination */ -+ /* Type for current wireless mode */ -+ WIRELESS_11BG = (WIRELESS_11B | WIRELESS_11G), /* tx: cck & ofdm, rx: cck & ofdm & MCS, hw: cck & ofdm */ -+ WIRELESS_11G_24N = (WIRELESS_11G | WIRELESS_11_24N), /* tx: ofdm & MCS, rx: ofdm & cck & MCS, hw: cck & ofdm */ -+ WIRELESS_11A_5N = (WIRELESS_11A | WIRELESS_11_5N), /* tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only */ -+ WIRELESS_11B_24N = (WIRELESS_11B | WIRELESS_11_24N), /* tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck */ -+ WIRELESS_11BG_24N = (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N), /* tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck */ -+ WIRELESS_11_24AC = (WIRELESS_11B | WIRELESS_11G | WIRELESS_11AC), -+ WIRELESS_11_5AC = (WIRELESS_11A | WIRELESS_11AC), -+ -+ -+ /* Type for registry default wireless mode */ -+ WIRELESS_11AGN = (WIRELESS_11A | WIRELESS_11G | WIRELESS_11_24N | WIRELESS_11_5N), /* tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only */ -+ WIRELESS_11ABGN = (WIRELESS_11A | WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N | WIRELESS_11_5N), -+ WIRELESS_MODE_24G = (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N), -+ WIRELESS_MODE_5G = (WIRELESS_11A | WIRELESS_11_5N | WIRELESS_11AC), -+ WIRELESS_MODE_MAX = (WIRELESS_11A | WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N | WIRELESS_11_5N | WIRELESS_11AC), -+}; -+ -+#define SUPPORTED_24G_NETTYPE_MSK WIRELESS_MODE_24G -+#define SUPPORTED_5G_NETTYPE_MSK WIRELESS_MODE_5G -+ -+#define IsLegacyOnly(NetType) ((NetType) == ((NetType) & (WIRELESS_11BG | WIRELESS_11A))) -+ -+#define IsSupported24G(NetType) ((NetType) & SUPPORTED_24G_NETTYPE_MSK ? _TRUE : _FALSE) -+#define is_supported_5g(NetType) ((NetType) & SUPPORTED_5G_NETTYPE_MSK ? _TRUE : _FALSE) -+ -+#define IsEnableHWCCK(NetType) IsSupported24G(NetType) -+#define IsEnableHWOFDM(NetType) ((NetType) & (WIRELESS_11G | WIRELESS_11_24N | SUPPORTED_5G_NETTYPE_MSK) ? _TRUE : _FALSE) -+ -+#define IsSupportedRxCCK(NetType) IsEnableHWCCK(NetType) -+#define IsSupportedRxOFDM(NetType) IsEnableHWOFDM(NetType) -+#define IsSupportedRxHT(NetType) IsEnableHWOFDM(NetType) -+ -+#define IsSupportedTxCCK(NetType) ((NetType) & (WIRELESS_11B) ? _TRUE : _FALSE) -+#define IsSupportedTxOFDM(NetType) ((NetType) & (WIRELESS_11G | WIRELESS_11A) ? _TRUE : _FALSE) -+#define is_supported_ht(NetType) ((NetType) & (WIRELESS_11_24N | WIRELESS_11_5N) ? _TRUE : _FALSE) -+ -+#define is_supported_vht(NetType) ((NetType) & (WIRELESS_11AC) ? _TRUE : _FALSE) -+ -+ -+ -+ -+ -+typedef struct ieee_param { -+ u32 cmd; -+ u8 sta_addr[ETH_ALEN]; -+ union { -+ struct { -+ u8 name; -+ u32 value; -+ } wpa_param; -+ struct { -+ u32 len; -+ u8 reserved[32]; -+ u8 data[0]; -+ } wpa_ie; -+ struct { -+ int command; -+ int reason_code; -+ } mlme; -+ struct { -+ u8 alg[IEEE_CRYPT_ALG_NAME_LEN]; -+ u8 set_tx; -+ u32 err; -+ u8 idx; -+ u8 seq[8]; /* sequence counter (set: RX, get: TX) */ -+ u16 key_len; -+ u8 key[0]; -+ } crypt; -+#ifdef CONFIG_AP_MODE -+ struct { -+ u16 aid; -+ u16 capability; -+ int flags; -+ u8 tx_supp_rates[16]; -+ struct rtw_ieee80211_ht_cap ht_cap; -+ } add_sta; -+ struct { -+ u8 reserved[2];/* for set max_num_sta */ -+ u8 buf[0]; -+ } bcn_ie; -+#endif -+ -+ } u; -+} ieee_param; -+ -+#ifdef CONFIG_AP_MODE -+typedef struct ieee_param_ex { -+ u32 cmd; -+ u8 sta_addr[ETH_ALEN]; -+ u8 data[0]; -+} ieee_param_ex; -+ -+struct sta_data { -+ u16 aid; -+ u16 capability; -+ int flags; -+ u32 sta_set; -+ u8 tx_supp_rates[16]; -+ u32 tx_supp_rates_len; -+ struct rtw_ieee80211_ht_cap ht_cap; -+ u64 rx_pkts; -+ u64 rx_bytes; -+ u64 rx_drops; -+ u64 tx_pkts; -+ u64 tx_bytes; -+ u64 tx_drops; -+}; -+#endif -+ -+ -+#if WIRELESS_EXT < 17 -+ #define IW_QUAL_QUAL_INVALID 0x10 -+ #define IW_QUAL_LEVEL_INVALID 0x20 -+ #define IW_QUAL_NOISE_INVALID 0x40 -+ #define IW_QUAL_QUAL_UPDATED 0x1 -+ #define IW_QUAL_LEVEL_UPDATED 0x2 -+ #define IW_QUAL_NOISE_UPDATED 0x4 -+#endif -+ -+#define IEEE80211_DATA_LEN 2304 -+/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section -+ 6.2.1.1.2. -+ -+ The figure in section 7.1.2 suggests a body size of up to 2312 -+ bytes is allowed, which is a bit confusing, I suspect this -+ represents the 2304 bytes of real data, plus a possible 8 bytes of -+ WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */ -+ -+ -+#define IEEE80211_HLEN 30 -+#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) -+ -+ -+/* this is stolen from ipw2200 driver */ -+#define IEEE_IBSS_MAC_HASH_SIZE 31 -+ -+struct ieee_ibss_seq { -+ u8 mac[ETH_ALEN]; -+ u16 seq_num; -+ u16 frag_num; -+ unsigned long packet_time; -+ _list list; -+}; -+ -+#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) -+ -+struct rtw_ieee80211_hdr { -+ u16 frame_ctl; -+ u16 duration_id; -+ u8 addr1[ETH_ALEN]; -+ u8 addr2[ETH_ALEN]; -+ u8 addr3[ETH_ALEN]; -+ u16 seq_ctl; -+ u8 addr4[ETH_ALEN]; -+} __attribute__((packed)); -+ -+struct rtw_ieee80211_hdr_3addr { -+ u16 frame_ctl; -+ u16 duration_id; -+ u8 addr1[ETH_ALEN]; -+ u8 addr2[ETH_ALEN]; -+ u8 addr3[ETH_ALEN]; -+ u16 seq_ctl; -+} __attribute__((packed)); -+ -+ -+struct rtw_ieee80211_hdr_qos { -+ u16 frame_ctl; -+ u16 duration_id; -+ u8 addr1[ETH_ALEN]; -+ u8 addr2[ETH_ALEN]; -+ u8 addr3[ETH_ALEN]; -+ u16 seq_ctl; -+ u8 addr4[ETH_ALEN]; -+ u16 qc; -+} __attribute__((packed)); -+ -+struct rtw_ieee80211_hdr_3addr_qos { -+ u16 frame_ctl; -+ u16 duration_id; -+ u8 addr1[ETH_ALEN]; -+ u8 addr2[ETH_ALEN]; -+ u8 addr3[ETH_ALEN]; -+ u16 seq_ctl; -+ u16 qc; -+} __attribute__((packed)); -+ -+struct eapol { -+ u8 snap[6]; -+ u16 ethertype; -+ u8 version; -+ u8 type; -+ u16 length; -+} __attribute__((packed)); -+ -+struct rtw_ieee80211s_hdr { -+ u8 flags; -+ u8 ttl; -+ u32 seqnum; -+ u8 eaddr1[ETH_ALEN]; -+ u8 eaddr2[ETH_ALEN]; -+} __attribute__((packed)); -+ -+/** -+ * struct rtw_ieee80211_rann_ie -+ * -+ * This structure refers to "Root Announcement information element" -+ */ -+ struct rtw_ieee80211_rann_ie { -+ u8 rann_flags; -+ u8 rann_hopcount; -+ u8 rann_ttl; -+ u8 rann_addr[ETH_ALEN]; -+ u32 rann_seq; -+ u32 rann_interval; -+ u32 rann_metric; -+} __attribute__((packed)); -+#endif -+ -+/* Some IEEE 802.11x packet types are corresponding to parsing_eapol_packet() */ -+enum eap_type { -+ EAP_PACKET = 0, -+ NON_EAPOL, -+ EAPOL_START, -+ EAPOL_LOGOFF, -+ EAPOL_KEY, -+ EAPOL_ENCAP_ASF_ALERT, -+ EAPOL_PACKET, -+ EAPOL_WPA_GROUP_KEY_1_2, -+ EAPOL_WPA_GROUP_KEY_2_2, -+ EAPOL_1_4, -+ EAPOL_2_4, -+ EAPOL_3_4, -+ EAPOL_4_4, -+}; -+ -+#define IEEE80211_3ADDR_LEN 24 -+#define IEEE80211_4ADDR_LEN 30 -+#define IEEE80211_FCS_LEN 4 -+ -+#define MIN_FRAG_THRESHOLD 256U -+#define MAX_FRAG_THRESHOLD 2346U -+ -+/* Frame control field constants */ -+#define RTW_IEEE80211_FCTL_VERS 0x0003 -+#define RTW_IEEE80211_FCTL_FTYPE 0x000c -+#define RTW_IEEE80211_FCTL_STYPE 0x00f0 -+#define RTW_IEEE80211_FCTL_TODS 0x0100 -+#define RTW_IEEE80211_FCTL_FROMDS 0x0200 -+#define RTW_IEEE80211_FCTL_MOREFRAGS 0x0400 -+#define RTW_IEEE80211_FCTL_RETRY 0x0800 -+#define RTW_IEEE80211_FCTL_PM 0x1000 -+#define RTW_IEEE80211_FCTL_MOREDATA 0x2000 -+#define RTW_IEEE80211_FCTL_PROTECTED 0x4000 -+#define RTW_IEEE80211_FCTL_ORDER 0x8000 -+#define RTW_IEEE80211_FCTL_CTL_EXT 0x0f00 -+ -+#define RTW_IEEE80211_FTYPE_MGMT 0x0000 -+#define RTW_IEEE80211_FTYPE_CTL 0x0004 -+#define RTW_IEEE80211_FTYPE_DATA 0x0008 -+#define RTW_IEEE80211_FTYPE_EXT 0x000c -+ -+/* management */ -+#define RTW_IEEE80211_STYPE_ASSOC_REQ 0x0000 -+#define RTW_IEEE80211_STYPE_ASSOC_RESP 0x0010 -+#define RTW_IEEE80211_STYPE_REASSOC_REQ 0x0020 -+#define RTW_IEEE80211_STYPE_REASSOC_RESP 0x0030 -+#define RTW_IEEE80211_STYPE_PROBE_REQ 0x0040 -+#define RTW_IEEE80211_STYPE_PROBE_RESP 0x0050 -+#define RTW_IEEE80211_STYPE_BEACON 0x0080 -+#define RTW_IEEE80211_STYPE_ATIM 0x0090 -+#define RTW_IEEE80211_STYPE_DISASSOC 0x00A0 -+#define RTW_IEEE80211_STYPE_AUTH 0x00B0 -+#define RTW_IEEE80211_STYPE_DEAUTH 0x00C0 -+#define RTW_IEEE80211_STYPE_ACTION 0x00D0 -+ -+/* control */ -+#define RTW_IEEE80211_STYPE_CTL_EXT 0x0060 -+#define RTW_IEEE80211_STYPE_BACK_REQ 0x0080 -+#define RTW_IEEE80211_STYPE_BACK 0x0090 -+#define RTW_IEEE80211_STYPE_PSPOLL 0x00A0 -+#define RTW_IEEE80211_STYPE_RTS 0x00B0 -+#define RTW_IEEE80211_STYPE_CTS 0x00C0 -+#define RTW_IEEE80211_STYPE_ACK 0x00D0 -+#define RTW_IEEE80211_STYPE_CFEND 0x00E0 -+#define RTW_IEEE80211_STYPE_CFENDACK 0x00F0 -+ -+/* data */ -+#define RTW_IEEE80211_STYPE_DATA 0x0000 -+#define RTW_IEEE80211_STYPE_DATA_CFACK 0x0010 -+#define RTW_IEEE80211_STYPE_DATA_CFPOLL 0x0020 -+#define RTW_IEEE80211_STYPE_DATA_CFACKPOLL 0x0030 -+#define RTW_IEEE80211_STYPE_NULLFUNC 0x0040 -+#define RTW_IEEE80211_STYPE_CFACK 0x0050 -+#define RTW_IEEE80211_STYPE_CFPOLL 0x0060 -+#define RTW_IEEE80211_STYPE_CFACKPOLL 0x0070 -+#define RTW_IEEE80211_STYPE_QOS_DATA 0x0080 -+#define RTW_IEEE80211_STYPE_QOS_DATA_CFACK 0x0090 -+#define RTW_IEEE80211_STYPE_QOS_DATA_CFPOLL 0x00A0 -+#define RTW_IEEE80211_STYPE_QOS_DATA_CFACKPOLL 0x00B0 -+#define RTW_IEEE80211_STYPE_QOS_NULLFUNC 0x00C0 -+#define RTW_IEEE80211_STYPE_QOS_CFACK 0x00D0 -+#define RTW_IEEE80211_STYPE_QOS_CFPOLL 0x00E0 -+#define RTW_IEEE80211_STYPE_QOS_CFACKPOLL 0x00F0 -+ -+/* sequence control field */ -+#define RTW_IEEE80211_SCTL_FRAG 0x000F -+#define RTW_IEEE80211_SCTL_SEQ 0xFFF0 -+ -+ -+#define RTW_ERP_INFO_NON_ERP_PRESENT BIT(0) -+#define RTW_ERP_INFO_USE_PROTECTION BIT(1) -+#define RTW_ERP_INFO_BARKER_PREAMBLE_MODE BIT(2) -+ -+/* QoS,QOS */ -+#define NORMAL_ACK 0 -+#define NO_ACK 1 -+#define NON_EXPLICIT_ACK 2 -+#define BLOCK_ACK 3 -+ -+#ifndef ETH_P_PAE -+ #define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ -+#endif /* ETH_P_PAE */ -+ -+#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */ -+ -+#define ETH_P_ECONET 0x0018 -+ -+#ifndef ETH_P_80211_RAW -+ #define ETH_P_80211_RAW (ETH_P_ECONET + 1) -+#endif -+ -+/* IEEE 802.11 defines */ -+ -+#define P80211_OUI_LEN 3 -+ -+#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) -+ -+struct ieee80211_snap_hdr { -+ -+ u8 dsap; /* always 0xAA */ -+ u8 ssap; /* always 0xAA */ -+ u8 ctrl; /* always 0x03 */ -+ u8 oui[P80211_OUI_LEN]; /* organizational universal id */ -+ -+} __attribute__((packed)); -+ -+#endif -+ -+#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr) -+ -+#define WLAN_FC_GET_TYPE(fc) ((fc) & RTW_IEEE80211_FCTL_FTYPE) -+#define WLAN_FC_GET_STYPE(fc) ((fc) & RTW_IEEE80211_FCTL_STYPE) -+ -+#define WLAN_QC_GET_TID(qc) ((qc) & 0x0f) -+ -+#define WLAN_GET_SEQ_FRAG(seq) ((seq) & RTW_IEEE80211_SCTL_FRAG) -+#define WLAN_GET_SEQ_SEQ(seq) ((seq) & RTW_IEEE80211_SCTL_SEQ) -+ -+/* Authentication algorithms */ -+#define WLAN_AUTH_OPEN 0 -+#define WLAN_AUTH_SHARED_KEY 1 -+#define WLAN_AUTH_SAE 3 -+ -+#define WLAN_AUTH_CHALLENGE_LEN 128 -+ -+#define WLAN_CAPABILITY_BSS (1<<0) -+#define WLAN_CAPABILITY_IBSS (1<<1) -+#define WLAN_CAPABILITY_CF_POLLABLE (1<<2) -+#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3) -+#define WLAN_CAPABILITY_PRIVACY (1<<4) -+#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5) -+#define WLAN_CAPABILITY_PBCC (1<<6) -+#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7) -+#define WLAN_CAPABILITY_SHORT_SLOT (1<<10) -+ -+/* Status codes */ -+#define WLAN_STATUS_SUCCESS 0 -+#define WLAN_STATUS_UNSPECIFIED_FAILURE 1 -+#define WLAN_STATUS_CAPS_UNSUPPORTED 10 -+#define WLAN_STATUS_REASSOC_NO_ASSOC 11 -+#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12 -+#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13 -+#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14 -+#define WLAN_STATUS_CHALLENGE_FAIL 15 -+#define WLAN_STATUS_AUTH_TIMEOUT 16 -+#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17 -+#define WLAN_STATUS_ASSOC_DENIED_RATES 18 -+/* 802.11b */ -+#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19 -+#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20 -+#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21 -+ -+/* Reason codes */ -+#define WLAN_REASON_UNSPECIFIED 1 -+#define WLAN_REASON_PREV_AUTH_NOT_VALID 2 -+#define WLAN_REASON_DEAUTH_LEAVING 3 -+#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4 -+#define WLAN_REASON_DISASSOC_AP_BUSY 5 -+#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6 -+#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7 -+#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8 -+#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 -+#define WLAN_REASON_IEEE_802_1X_AUTH_FAILED 23 -+#define WLAN_REASON_MESH_PEER_CANCELED 52 -+#define WLAN_REASON_MESH_MAX_PEERS 53 -+#define WLAN_REASON_MESH_CONFIG 54 -+#define WLAN_REASON_MESH_CLOSE 55 -+#define WLAN_REASON_MESH_MAX_RETRIES 56 -+#define WLAN_REASON_MESH_CONFIRM_TIMEOUT 57 -+#define WLAN_REASON_MESH_INVALID_GTK 58 -+#define WLAN_REASON_MESH_INCONSISTENT_PARAM 59 -+#define WLAN_REASON_MESH_INVALID_SECURITY 60 -+#define WLAN_REASON_MESH_PATH_NOPROXY 61 -+#define WLAN_REASON_MESH_PATH_NOFORWARD 62 -+#define WLAN_REASON_MESH_PATH_DEST_UNREACHABLE 63 -+#define WLAN_REASON_MAC_EXISTS_IN_MBSS 64 -+#define WLAN_REASON_MESH_CHAN_REGULATORY 65 -+#define WLAN_REASON_MESH_CHAN 66 -+#define WLAN_REASON_SA_QUERY_TIMEOUT 65532 -+#define WLAN_REASON_ACTIVE_ROAM 65533 -+#define WLAN_REASON_JOIN_WRONG_CHANNEL 65534 -+#define WLAN_REASON_EXPIRATION_CHK 65535 -+ -+#define WLAN_REASON_IS_PRIVATE(reason) ( \ -+ reason == WLAN_REASON_EXPIRATION_CHK \ -+ || reason == WLAN_REASON_JOIN_WRONG_CHANNEL \ -+ || reason == WLAN_REASON_ACTIVE_ROAM \ -+ || reason == WLAN_REASON_SA_QUERY_TIMEOUT \ -+ ) -+ -+/* Information Element IDs */ -+#define WLAN_EID_SSID 0 -+#define WLAN_EID_SUPP_RATES 1 -+#define WLAN_EID_FH_PARAMS 2 -+#define WLAN_EID_DS_PARAMS 3 -+#define WLAN_EID_CF_PARAMS 4 -+#define WLAN_EID_TIM 5 -+#define WLAN_EID_IBSS_PARAMS 6 -+#define WLAN_EID_CHALLENGE 16 -+/* EIDs defined by IEEE 802.11h - START */ -+#define WLAN_EID_PWR_CONSTRAINT 32 -+#define WLAN_EID_PWR_CAPABILITY 33 -+#define WLAN_EID_TPC_REQUEST 34 -+#define WLAN_EID_TPC_REPORT 35 -+#define WLAN_EID_SUPPORTED_CHANNELS 36 -+#define WLAN_EID_CHANNEL_SWITCH 37 -+#define WLAN_EID_MEASURE_REQUEST 38 -+#define WLAN_EID_MEASURE_REPORT 39 -+#define WLAN_EID_QUITE 40 -+#define WLAN_EID_IBSS_DFS 41 -+/* EIDs defined by IEEE 802.11h - END */ -+#define WLAN_EID_ERP_INFO 42 -+#define WLAN_EID_HT_CAP 45 -+#define WLAN_EID_RSN 48 -+#define WLAN_EID_EXT_SUPP_RATES 50 -+#define WLAN_EID_MOBILITY_DOMAIN 54 -+#define WLAN_EID_FAST_BSS_TRANSITION 55 -+#define WLAN_EID_TIMEOUT_INTERVAL 56 -+#define WLAN_EID_RIC_DATA 57 -+#define WLAN_EID_HT_OPERATION 61 -+#define WLAN_EID_SECONDARY_CHANNEL_OFFSET 62 -+#define WLAN_EID_20_40_BSS_COEXISTENCE 72 -+#define WLAN_EID_20_40_BSS_INTOLERANT 73 -+#define WLAN_EID_OVERLAPPING_BSS_SCAN_PARAMS 74 -+#define WLAN_EID_MMIE 76 -+#define WLAN_EID_MESH_CONFIG 113 -+#define WLAN_EID_MESH_ID 114 -+#define WLAN_EID_MPM 117 -+#define WLAN_EID_RANN 126 -+#define WLAN_EID_PREQ 130 -+#define WLAN_EID_PREP 131 -+#define WLAN_EID_PERR 132 -+#define WLAN_EID_AMPE 139 -+#define WLAN_EID_MIC 140 -+#define WLAN_EID_VENDOR_SPECIFIC 221 -+#define WLAN_EID_GENERIC (WLAN_EID_VENDOR_SPECIFIC) -+#define WLAN_EID_VHT_CAPABILITY 191 -+#define WLAN_EID_VHT_OPERATION 192 -+#define WLAN_EID_WIDE_BANDWIDTH_CHANNEL_SWITCH 194 -+#define WLAN_EID_CHANNEL_SWITCH_WRAPPER 196 -+#define WLAN_EID_VHT_OP_MODE_NOTIFY 199 -+#define WLAN_EID_EXTENSION 255 -+#define WLAN_EID_EXT_OWE_DH_PARAM 32 -+ -+#define IEEE80211_MGMT_HDR_LEN 24 -+#define IEEE80211_DATA_HDR3_LEN 24 -+#define IEEE80211_DATA_HDR4_LEN 30 -+ -+ -+#define IEEE80211_STATMASK_SIGNAL (1<<0) -+#define IEEE80211_STATMASK_RSSI (1<<1) -+#define IEEE80211_STATMASK_NOISE (1<<2) -+#define IEEE80211_STATMASK_RATE (1<<3) -+#define IEEE80211_STATMASK_WEMASK 0x7 -+ -+ -+#define IEEE80211_CCK_MODULATION (1<<0) -+#define IEEE80211_OFDM_MODULATION (1<<1) -+ -+#define IEEE80211_24GHZ_BAND (1<<0) -+#define IEEE80211_52GHZ_BAND (1<<1) -+ -+#define IEEE80211_CCK_RATE_LEN 4 -+#define IEEE80211_NUM_OFDM_RATESLEN 8 -+ -+ -+ -+#define IEEE80211_CCK_RATE_1MB 0x02 -+#define IEEE80211_CCK_RATE_2MB 0x04 -+#define IEEE80211_CCK_RATE_5MB 0x0B -+#define IEEE80211_CCK_RATE_11MB 0x16 -+#define IEEE80211_OFDM_RATE_LEN 8 -+#define IEEE80211_OFDM_RATE_6MB 0x0C -+#define IEEE80211_OFDM_RATE_9MB 0x12 -+#define IEEE80211_OFDM_RATE_12MB 0x18 -+#define IEEE80211_OFDM_RATE_18MB 0x24 -+#define IEEE80211_OFDM_RATE_24MB 0x30 -+#define IEEE80211_PBCC_RATE_22MB 0x2C -+#define IEEE80211_FREAK_RATE_22_5MB 0x2D -+#define IEEE80211_OFDM_RATE_36MB 0x48 -+#define IEEE80211_OFDM_RATE_48MB 0x60 -+#define IEEE80211_OFDM_RATE_54MB 0x6C -+#define IEEE80211_BASIC_RATE_MASK 0x80 -+ -+#define IEEE80211_CCK_RATE_1MB_MASK (1<<0) -+#define IEEE80211_CCK_RATE_2MB_MASK (1<<1) -+#define IEEE80211_CCK_RATE_5MB_MASK (1<<2) -+#define IEEE80211_CCK_RATE_11MB_MASK (1<<3) -+#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4) -+#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5) -+#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6) -+#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7) -+#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8) -+#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9) -+#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10) -+#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11) -+ -+#define IEEE80211_CCK_RATES_MASK 0x0000000F -+#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \ -+ IEEE80211_CCK_RATE_2MB_MASK) -+#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \ -+ IEEE80211_CCK_RATE_5MB_MASK | \ -+ IEEE80211_CCK_RATE_11MB_MASK) -+ -+#define IEEE80211_OFDM_RATES_MASK 0x00000FF0 -+#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \ -+ IEEE80211_OFDM_RATE_12MB_MASK | \ -+ IEEE80211_OFDM_RATE_24MB_MASK) -+#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \ -+ IEEE80211_OFDM_RATE_9MB_MASK | \ -+ IEEE80211_OFDM_RATE_18MB_MASK | \ -+ IEEE80211_OFDM_RATE_36MB_MASK | \ -+ IEEE80211_OFDM_RATE_48MB_MASK | \ -+ IEEE80211_OFDM_RATE_54MB_MASK) -+#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \ -+ IEEE80211_CCK_DEFAULT_RATES_MASK) -+ -+#define IEEE80211_NUM_OFDM_RATES 8 -+#define IEEE80211_NUM_CCK_RATES 4 -+#define IEEE80211_OFDM_SHIFT_MASK_A 4 -+ -+ -+enum MGN_RATE { -+ MGN_1M = 0x02, -+ MGN_2M = 0x04, -+ MGN_5_5M = 0x0B, -+ MGN_6M = 0x0C, -+ MGN_9M = 0x12, -+ MGN_11M = 0x16, -+ MGN_12M = 0x18, -+ MGN_18M = 0x24, -+ MGN_24M = 0x30, -+ MGN_36M = 0x48, -+ MGN_48M = 0x60, -+ MGN_54M = 0x6C, -+ MGN_MCS32 = 0x7F, -+ MGN_MCS0, -+ MGN_MCS1, -+ MGN_MCS2, -+ MGN_MCS3, -+ MGN_MCS4, -+ MGN_MCS5, -+ MGN_MCS6, -+ MGN_MCS7, -+ MGN_MCS8, -+ MGN_MCS9, -+ MGN_MCS10, -+ MGN_MCS11, -+ MGN_MCS12, -+ MGN_MCS13, -+ MGN_MCS14, -+ MGN_MCS15, -+ MGN_MCS16, -+ MGN_MCS17, -+ MGN_MCS18, -+ MGN_MCS19, -+ MGN_MCS20, -+ MGN_MCS21, -+ MGN_MCS22, -+ MGN_MCS23, -+ MGN_MCS24, -+ MGN_MCS25, -+ MGN_MCS26, -+ MGN_MCS27, -+ MGN_MCS28, -+ MGN_MCS29, -+ MGN_MCS30, -+ MGN_MCS31, -+ MGN_VHT1SS_MCS0, -+ MGN_VHT1SS_MCS1, -+ MGN_VHT1SS_MCS2, -+ MGN_VHT1SS_MCS3, -+ MGN_VHT1SS_MCS4, -+ MGN_VHT1SS_MCS5, -+ MGN_VHT1SS_MCS6, -+ MGN_VHT1SS_MCS7, -+ MGN_VHT1SS_MCS8, -+ MGN_VHT1SS_MCS9, -+ MGN_VHT2SS_MCS0, -+ MGN_VHT2SS_MCS1, -+ MGN_VHT2SS_MCS2, -+ MGN_VHT2SS_MCS3, -+ MGN_VHT2SS_MCS4, -+ MGN_VHT2SS_MCS5, -+ MGN_VHT2SS_MCS6, -+ MGN_VHT2SS_MCS7, -+ MGN_VHT2SS_MCS8, -+ MGN_VHT2SS_MCS9, -+ MGN_VHT3SS_MCS0, -+ MGN_VHT3SS_MCS1, -+ MGN_VHT3SS_MCS2, -+ MGN_VHT3SS_MCS3, -+ MGN_VHT3SS_MCS4, -+ MGN_VHT3SS_MCS5, -+ MGN_VHT3SS_MCS6, -+ MGN_VHT3SS_MCS7, -+ MGN_VHT3SS_MCS8, -+ MGN_VHT3SS_MCS9, -+ MGN_VHT4SS_MCS0, -+ MGN_VHT4SS_MCS1, -+ MGN_VHT4SS_MCS2, -+ MGN_VHT4SS_MCS3, -+ MGN_VHT4SS_MCS4, -+ MGN_VHT4SS_MCS5, -+ MGN_VHT4SS_MCS6, -+ MGN_VHT4SS_MCS7, -+ MGN_VHT4SS_MCS8, -+ MGN_VHT4SS_MCS9, -+ MGN_UNKNOWN -+}; -+ -+#define IS_HT_RATE(_rate) ((_rate) >= MGN_MCS0 && (_rate) <= MGN_MCS31) -+#define IS_VHT_RATE(_rate) ((_rate) >= MGN_VHT1SS_MCS0 && (_rate) <= MGN_VHT4SS_MCS9) -+#define IS_CCK_RATE(_rate) ((_rate) == MGN_1M || (_rate) == MGN_2M || (_rate) == MGN_5_5M || (_rate) == MGN_11M) -+#define IS_OFDM_RATE(_rate) ((_rate) >= MGN_6M && (_rate) <= MGN_54M && (_rate) != MGN_11M) -+ -+#define IS_HT1SS_RATE(_rate) ((_rate) >= MGN_MCS0 && (_rate) <= MGN_MCS7) -+#define IS_HT2SS_RATE(_rate) ((_rate) >= MGN_MCS8 && (_rate) <= MGN_MCS15) -+#define IS_HT3SS_RATE(_rate) ((_rate) >= MGN_MCS16 && (_rate) <= MGN_MCS23) -+#define IS_HT4SS_RATE(_rate) ((_rate) >= MGN_MCS24 && (_rate) <= MGN_MCS31) -+ -+#define IS_VHT1SS_RATE(_rate) ((_rate) >= MGN_VHT1SS_MCS0 && (_rate) <= MGN_VHT1SS_MCS9) -+#define IS_VHT2SS_RATE(_rate) ((_rate) >= MGN_VHT2SS_MCS0 && (_rate) <= MGN_VHT2SS_MCS9) -+#define IS_VHT3SS_RATE(_rate) ((_rate) >= MGN_VHT3SS_MCS0 && (_rate) <= MGN_VHT3SS_MCS9) -+#define IS_VHT4SS_RATE(_rate) ((_rate) >= MGN_VHT4SS_MCS0 && (_rate) <= MGN_VHT4SS_MCS9) -+ -+#define IS_1T_RATE(_rate) (IS_CCK_RATE((_rate)) || IS_OFDM_RATE((_rate)) || IS_HT1SS_RATE((_rate)) || IS_VHT1SS_RATE((_rate))) -+#define IS_2T_RATE(_rate) (IS_HT2SS_RATE((_rate)) || IS_VHT2SS_RATE((_rate))) -+#define IS_3T_RATE(_rate) (IS_HT3SS_RATE((_rate)) || IS_VHT3SS_RATE((_rate))) -+#define IS_4T_RATE(_rate) (IS_HT4SS_RATE((_rate)) || IS_VHT4SS_RATE((_rate))) -+ -+const char *MGN_RATE_STR(enum MGN_RATE rate); -+ -+typedef enum _RATE_SECTION { -+ CCK = 0, -+ OFDM = 1, -+ HT_MCS0_MCS7 = 2, -+ HT_MCS8_MCS15 = 3, -+ HT_MCS16_MCS23 = 4, -+ HT_MCS24_MCS31 = 5, -+ HT_1SS = HT_MCS0_MCS7, -+ HT_2SS = HT_MCS8_MCS15, -+ HT_3SS = HT_MCS16_MCS23, -+ HT_4SS = HT_MCS24_MCS31, -+ VHT_1SSMCS0_1SSMCS9 = 6, -+ VHT_2SSMCS0_2SSMCS9 = 7, -+ VHT_3SSMCS0_3SSMCS9 = 8, -+ VHT_4SSMCS0_4SSMCS9 = 9, -+ VHT_1SS = VHT_1SSMCS0_1SSMCS9, -+ VHT_2SS = VHT_2SSMCS0_2SSMCS9, -+ VHT_3SS = VHT_3SSMCS0_3SSMCS9, -+ VHT_4SS = VHT_4SSMCS0_4SSMCS9, -+ RATE_SECTION_NUM, -+} RATE_SECTION; -+ -+RATE_SECTION mgn_rate_to_rs(enum MGN_RATE rate); -+ -+const char *rate_section_str(u8 section); -+ -+#define IS_CCK_RATE_SECTION(section) ((section) == CCK) -+#define IS_OFDM_RATE_SECTION(section) ((section) == OFDM) -+#define IS_HT_RATE_SECTION(section) ((section) >= HT_1SS && (section) <= HT_4SS) -+#define IS_VHT_RATE_SECTION(section) ((section) >= VHT_1SS && (section) <= VHT_4SS) -+ -+#define IS_1T_RATE_SECTION(section) ((section) == CCK || (section) == OFDM || (section) == HT_1SS || (section) == VHT_1SS) -+#define IS_2T_RATE_SECTION(section) ((section) == HT_2SS || (section) == VHT_2SS) -+#define IS_3T_RATE_SECTION(section) ((section) == HT_3SS || (section) == VHT_3SS) -+#define IS_4T_RATE_SECTION(section) ((section) == HT_4SS || (section) == VHT_4SS) -+ -+extern u8 mgn_rates_cck[]; -+extern u8 mgn_rates_ofdm[]; -+extern u8 mgn_rates_mcs0_7[]; -+extern u8 mgn_rates_mcs8_15[]; -+extern u8 mgn_rates_mcs16_23[]; -+extern u8 mgn_rates_mcs24_31[]; -+extern u8 mgn_rates_vht1ss[]; -+extern u8 mgn_rates_vht2ss[]; -+extern u8 mgn_rates_vht3ss[]; -+extern u8 mgn_rates_vht4ss[]; -+ -+struct rate_section_ent { -+ u8 tx_num; /* value of RF_TX_NUM */ -+ u8 rate_num; -+ u8 *rates; -+}; -+ -+extern struct rate_section_ent rates_by_sections[]; -+ -+#define rate_section_to_tx_num(section) (rates_by_sections[(section)].tx_num) -+#define rate_section_rate_num(section) (rates_by_sections[(section)].rate_num) -+ -+/* NOTE: This data is for statistical purposes; not all hardware provides this -+ * information for frames received. Not setting these will not cause -+ * any adverse affects. */ -+struct ieee80211_rx_stats { -+ /* u32 mac_time[2]; */ -+ s8 rssi; -+ u8 signal; -+ u8 noise; -+ u8 received_channel; -+ u16 rate; /* in 100 kbps */ -+ /* u8 control; */ -+ u8 mask; -+ u8 freq; -+ u16 len; -+}; -+ -+/* IEEE 802.11 requires that STA supports concurrent reception of at least -+ * three fragmented frames. This define can be increased to support more -+ * concurrent frames, but it should be noted that each entry can consume about -+ * 2 kB of RAM and increasing cache size will slow down frame reassembly. */ -+#define IEEE80211_FRAG_CACHE_LEN 4 -+ -+struct ieee80211_frag_entry { -+ u32 first_frag_time; -+ uint seq; -+ uint last_frag; -+ uint qos; /* jackson */ -+ uint tid; /* jackson */ -+ struct sk_buff *skb; -+ u8 src_addr[ETH_ALEN]; -+ u8 dst_addr[ETH_ALEN]; -+}; -+ -+#ifndef PLATFORM_FREEBSD /* Baron BSD has already defined */ -+struct ieee80211_stats { -+ uint tx_unicast_frames; -+ uint tx_multicast_frames; -+ uint tx_fragments; -+ uint tx_unicast_octets; -+ uint tx_multicast_octets; -+ uint tx_deferred_transmissions; -+ uint tx_single_retry_frames; -+ uint tx_multiple_retry_frames; -+ uint tx_retry_limit_exceeded; -+ uint tx_discards; -+ uint rx_unicast_frames; -+ uint rx_multicast_frames; -+ uint rx_fragments; -+ uint rx_unicast_octets; -+ uint rx_multicast_octets; -+ uint rx_fcs_errors; -+ uint rx_discards_no_buffer; -+ uint tx_discards_wrong_sa; -+ uint rx_discards_undecryptable; -+ uint rx_message_in_msg_fragments; -+ uint rx_message_in_bad_msg_fragments; -+}; -+#endif /* PLATFORM_FREEBSD */ -+struct ieee80211_softmac_stats { -+ uint rx_ass_ok; -+ uint rx_ass_err; -+ uint rx_probe_rq; -+ uint tx_probe_rs; -+ uint tx_beacons; -+ uint rx_auth_rq; -+ uint rx_auth_rs_ok; -+ uint rx_auth_rs_err; -+ uint tx_auth_rq; -+ uint no_auth_rs; -+ uint no_ass_rs; -+ uint tx_ass_rq; -+ uint rx_ass_rq; -+ uint tx_probe_rq; -+ uint reassoc; -+ uint swtxstop; -+ uint swtxawake; -+}; -+ -+#define SEC_KEY_1 (1<<0) -+#define SEC_KEY_2 (1<<1) -+#define SEC_KEY_3 (1<<2) -+#define SEC_KEY_4 (1<<3) -+#define SEC_ACTIVE_KEY (1<<4) -+#define SEC_AUTH_MODE (1<<5) -+#define SEC_UNICAST_GROUP (1<<6) -+#define SEC_LEVEL (1<<7) -+#define SEC_ENABLED (1<<8) -+ -+#define SEC_LEVEL_0 0 /* None */ -+#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */ -+#define SEC_LEVEL_2 2 /* Level 1 + TKIP */ -+#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */ -+#define SEC_LEVEL_3 4 /* Level 2 + CCMP */ -+ -+#define WEP_KEYS 4 -+#define WEP_KEY_LEN 13 -+#define BIP_MAX_KEYID 5 -+#define BIP_AAD_SIZE 20 -+ -+#if defined(PLATFORM_LINUX) -+struct ieee80211_security { -+ u16 active_key:2, -+ enabled:1, -+ auth_mode:2, -+ auth_algo:4, -+ unicast_uses_group:1; -+ u8 key_sizes[WEP_KEYS]; -+ u8 keys[WEP_KEYS][WEP_KEY_LEN]; -+ u8 level; -+ u16 flags; -+} __attribute__((packed)); -+ -+#endif -+ -+/* -+ -+ 802.11 data frame from AP -+ -+ ,-------------------------------------------------------------------. -+Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 | -+ |------|------|---------|---------|---------|------|---------|------| -+Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs | -+ | | tion | (BSSID) | | | ence | data | | -+ `-------------------------------------------------------------------' -+ -+Total: 28-2340 bytes -+ -+*/ -+ -+struct ieee80211_header_data { -+ u16 frame_ctl; -+ u16 duration_id; -+ u8 addr1[6]; -+ u8 addr2[6]; -+ u8 addr3[6]; -+ u16 seq_ctrl; -+}; -+ -+#define BEACON_PROBE_SSID_ID_POSITION 12 -+ -+/* Management Frame Information Element Types */ -+#define MFIE_TYPE_SSID 0 -+#define MFIE_TYPE_RATES 1 -+#define MFIE_TYPE_FH_SET 2 -+#define MFIE_TYPE_DS_SET 3 -+#define MFIE_TYPE_CF_SET 4 -+#define MFIE_TYPE_TIM 5 -+#define MFIE_TYPE_IBSS_SET 6 -+#define MFIE_TYPE_CHALLENGE 16 -+#define MFIE_TYPE_ERP 42 -+#define MFIE_TYPE_RSN 48 -+#define MFIE_TYPE_RATES_EX 50 -+#define MFIE_TYPE_GENERIC 221 -+ -+#if defined(PLATFORM_LINUX) -+struct ieee80211_info_element_hdr { -+ u8 id; -+ u8 len; -+} __attribute__((packed)); -+ -+struct ieee80211_info_element { -+ u8 id; -+ u8 len; -+ u8 data[0]; -+} __attribute__((packed)); -+#endif -+ -+ -+/* -+ * These are the data types that can make up management packets -+ * -+ u16 auth_algorithm; -+ u16 auth_sequence; -+ u16 beacon_interval; -+ u16 capability; -+ u8 current_ap[ETH_ALEN]; -+ u16 listen_interval; -+ struct { -+ u16 association_id:14, reserved:2; -+ } __attribute__ ((packed)); -+ u32 time_stamp[2]; -+ u16 reason; -+ u16 status; -+*/ -+ -+#define IEEE80211_DEFAULT_TX_ESSID "Penguin" -+#define IEEE80211_DEFAULT_BASIC_RATE 10 -+ -+ -+#if defined(PLATFORM_LINUX) -+struct ieee80211_authentication { -+ struct ieee80211_header_data header; -+ u16 algorithm; -+ u16 transaction; -+ u16 status; -+ /* struct ieee80211_info_element_hdr info_element; */ -+} __attribute__((packed)); -+ -+ -+struct ieee80211_probe_response { -+ struct ieee80211_header_data header; -+ u32 time_stamp[2]; -+ u16 beacon_interval; -+ u16 capability; -+ struct ieee80211_info_element info_element; -+} __attribute__((packed)); -+ -+struct ieee80211_probe_request { -+ struct ieee80211_header_data header; -+ /*struct ieee80211_info_element info_element;*/ -+} __attribute__((packed)); -+ -+struct ieee80211_assoc_request_frame { -+ struct rtw_ieee80211_hdr_3addr header; -+ u16 capability; -+ u16 listen_interval; -+ /* u8 current_ap[ETH_ALEN]; */ -+ struct ieee80211_info_element_hdr info_element; -+} __attribute__((packed)); -+ -+struct ieee80211_assoc_response_frame { -+ struct rtw_ieee80211_hdr_3addr header; -+ u16 capability; -+ u16 status; -+ u16 aid; -+ /* struct ieee80211_info_element info_element; supported rates */ -+} __attribute__((packed)); -+#endif -+ -+struct ieee80211_txb { -+ u8 nr_frags; -+ u8 encrypted; -+ u16 reserved; -+ u16 frag_size; -+ u16 payload_size; -+ struct sk_buff *fragments[0]; -+}; -+ -+ -+/* SWEEP TABLE ENTRIES NUMBER*/ -+#define MAX_SWEEP_TAB_ENTRIES 42 -+#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7 -+/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs -+ * only use 8, and then use extended rates for the remaining supported -+ * rates. Other APs, however, stick all of their supported rates on the -+ * main rates information element... */ -+#define MAX_RATES_LENGTH ((u8)12) -+#define MAX_RATES_EX_LENGTH ((u8)16) -+#define MAX_NETWORK_COUNT 128 -+#define IEEE80211_SOFTMAC_SCAN_TIME 400 -+/* (HZ / 2) */ -+#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2) -+ -+#define CRC_LENGTH 4U -+ -+#define MAX_WPA_IE_LEN (256) -+#define MAX_WPS_IE_LEN (512) -+#define MAX_OWE_IE_LEN (128) -+#define MAX_P2P_IE_LEN (256) -+#define MAX_WFD_IE_LEN (128) -+ -+#define NETWORK_EMPTY_ESSID (1<<0) -+#define NETWORK_HAS_OFDM (1<<1) -+#define NETWORK_HAS_CCK (1<<2) -+ -+#define IEEE80211_DTIM_MBCAST 4 -+#define IEEE80211_DTIM_UCAST 2 -+#define IEEE80211_DTIM_VALID 1 -+#define IEEE80211_DTIM_INVALID 0 -+ -+#define IEEE80211_PS_DISABLED 0 -+#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST -+#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST -+#define IW_ESSID_MAX_SIZE 32 -+#if 0 -+struct ieee80211_network { -+ /* These entries are used to identify a unique network */ -+ u8 bssid[ETH_ALEN]; -+ u8 channel; -+ /* Ensure null-terminated for any debug msgs */ -+ u8 ssid[IW_ESSID_MAX_SIZE + 1]; -+ u8 ssid_len; -+ u8 rssi; /* relative signal strength */ -+ u8 sq; /* signal quality */ -+ -+ /* These are network statistics */ -+ /* struct ieee80211_rx_stats stats; */ -+ u16 capability; -+ u16 aid; -+ u8 rates[MAX_RATES_LENGTH]; -+ u8 rates_len; -+ u8 rates_ex[MAX_RATES_EX_LENGTH]; -+ u8 rates_ex_len; -+ -+ u8 edca_parmsets[18]; -+ -+ u8 mode; -+ u8 flags; -+ u8 time_stamp[8]; -+ u16 beacon_interval; -+ u16 listen_interval; -+ u16 atim_window; -+ u8 wpa_ie[MAX_WPA_IE_LEN]; -+ size_t wpa_ie_len; -+ u8 rsn_ie[MAX_WPA_IE_LEN]; -+ size_t rsn_ie_len; -+ u8 country[6]; -+ u8 dtim_period; -+ u8 dtim_data; -+ u8 power_constraint; -+ u8 qosinfo; -+ u8 qbssload[5]; -+ u8 network_type; -+ int join_res; -+ unsigned long last_scanned; -+}; -+#endif -+/* -+join_res: -+-1: authentication fail -+-2: association fail -+> 0: TID -+*/ -+ -+#ifndef PLATFORM_FREEBSD /* Baron BSD has already defined */ -+ -+enum ieee80211_state { -+ -+ /* the card is not linked at all */ -+ IEEE80211_NOLINK = 0, -+ -+ /* IEEE80211_ASSOCIATING* are for BSS client mode -+ * the driver shall not perform RX filtering unless -+ * the state is LINKED. -+ * The driver shall just check for the state LINKED and -+ * defaults to NOLINK for ALL the other states (including -+ * LINKED_SCANNING) -+ */ -+ -+ /* the association procedure will start (wq scheduling)*/ -+ IEEE80211_ASSOCIATING, -+ IEEE80211_ASSOCIATING_RETRY, -+ -+ /* the association procedure is sending AUTH request*/ -+ IEEE80211_ASSOCIATING_AUTHENTICATING, -+ -+ /* the association procedure has successfully authentcated -+ * and is sending association request -+ */ -+ IEEE80211_ASSOCIATING_AUTHENTICATED, -+ -+ /* the link is ok. the card associated to a BSS or linked -+ * to a ibss cell or acting as an AP and creating the bss -+ */ -+ IEEE80211_LINKED, -+ -+ /* same as LINKED, but the driver shall apply RX filter -+ * rules as we are in NO_LINK mode. As the card is still -+ * logically linked, but it is doing a syncro site survey -+ * then it will be back to LINKED state. -+ */ -+ IEEE80211_LINKED_SCANNING, -+ -+}; -+#endif /* PLATFORM_FREEBSD */ -+ -+#define DEFAULT_MAX_SCAN_AGE (15 * HZ) -+#define DEFAULT_FTS 2346 -+#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" -+#define MAC_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5] -+#define MAC_SFMT "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx" -+#define MAC_SARG(x) ((u8*)(x)),((u8*)(x)) + 1,((u8*)(x)) + 2,((u8*)(x)) + 3,((u8*)(x)) + 4,((u8*)(x)) + 5 -+#define IP_FMT "%d.%d.%d.%d" -+#define IP_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3] -+#define PORT_FMT "%u" -+#define PORT_ARG(x) ntohs(*((u16 *)(x))) -+ -+#define is_multicast_mac_addr(Addr) ((((Addr[0]) & 0x01) == 0x01) && ((Addr[0]) != 0xff)) -+#define is_broadcast_mac_addr(Addr) ((((Addr[0]) & 0xff) == 0xff) && (((Addr[1]) & 0xff) == 0xff) && \ -+ (((Addr[2]) & 0xff) == 0xff) && (((Addr[3]) & 0xff) == 0xff) && (((Addr[4]) & 0xff) == 0xff) && \ -+ (((Addr[5]) & 0xff) == 0xff)) -+#define is_zero_mac_addr(Addr) ((Addr[0] == 0x00) && (Addr[1] == 0x00) && (Addr[2] == 0x00) && \ -+ (Addr[3] == 0x00) && (Addr[4] == 0x00) && (Addr[5] == 0x00)) -+ -+ -+#define CFG_IEEE80211_RESERVE_FCS (1<<0) -+#define CFG_IEEE80211_COMPUTE_FCS (1<<1) -+ -+typedef struct tx_pending_t { -+ int frag; -+ struct ieee80211_txb *txb; -+} tx_pending_t; -+ -+ -+ -+#define TID_NUM 16 -+ -+#define IEEE_A (1<<0) -+#define IEEE_B (1<<1) -+#define IEEE_G (1<<2) -+#define IEEE_MODE_MASK (IEEE_A | IEEE_B | IEEE_G) -+ -+/* Baron move to ieee80211.c */ -+int ieee80211_is_empty_essid(const char *essid, int essid_len); -+int ieee80211_get_hdrlen(u16 fc); -+ -+#if 0 -+ /* Action frame categories (IEEE 802.11-2007, 7.3.1.11, Table 7-24) */ -+ #define WLAN_ACTION_SPECTRUM_MGMT 0 -+ #define WLAN_ACTION_QOS 1 -+ #define WLAN_ACTION_DLS 2 -+ #define WLAN_ACTION_BLOCK_ACK 3 -+ #define WLAN_ACTION_RADIO_MEASUREMENT 5 -+ #define WLAN_ACTION_FT 6 -+ #define WLAN_ACTION_SA_QUERY 8 -+ #define WLAN_ACTION_WMM 17 -+#endif -+ -+ -+/* Action category code */ -+enum rtw_ieee80211_category { -+ RTW_WLAN_CATEGORY_SPECTRUM_MGMT = 0, -+ RTW_WLAN_CATEGORY_QOS = 1, -+ RTW_WLAN_CATEGORY_DLS = 2, -+ RTW_WLAN_CATEGORY_BACK = 3, -+ RTW_WLAN_CATEGORY_PUBLIC = 4, /* IEEE 802.11 public action frames */ -+ RTW_WLAN_CATEGORY_RADIO_MEAS = 5, -+ RTW_WLAN_CATEGORY_FT = 6, -+ RTW_WLAN_CATEGORY_HT = 7, -+ RTW_WLAN_CATEGORY_SA_QUERY = 8, -+ RTW_WLAN_CATEGORY_WNM = 10, -+ RTW_WLAN_CATEGORY_UNPROTECTED_WNM = 11, /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ RTW_WLAN_CATEGORY_TDLS = 12, -+ RTW_WLAN_CATEGORY_MESH = 13, -+ RTW_WLAN_CATEGORY_MULTIHOP = 14, -+ RTW_WLAN_CATEGORY_SELF_PROTECTED = 15, -+ RTW_WLAN_CATEGORY_WMM = 17, -+ RTW_WLAN_CATEGORY_VHT = 21, -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ RTW_WLAN_CATEGORY_TBTX = 25, -+#endif -+ RTW_WLAN_CATEGORY_P2P = 0x7f,/* P2P action frames */ -+}; -+ -+#define CATEGORY_IS_GROUP_PRIVACY(cat) \ -+ (cat == RTW_WLAN_CATEGORY_MESH || cat == RTW_WLAN_CATEGORY_MULTIHOP) -+ -+#define CATEGORY_IS_NON_ROBUST(cat) \ -+ (cat == RTW_WLAN_CATEGORY_PUBLIC \ -+ || cat == RTW_WLAN_CATEGORY_HT \ -+ || cat == RTW_WLAN_CATEGORY_UNPROTECTED_WNM \ -+ || cat == RTW_WLAN_CATEGORY_SELF_PROTECTED \ -+ || cat == RTW_WLAN_CATEGORY_VHT \ -+ || cat == RTW_WLAN_CATEGORY_P2P) -+ -+#define CATEGORY_IS_ROBUST(cat) !CATEGORY_IS_NON_ROBUST(cat) -+ -+/* SPECTRUM_MGMT action code */ -+enum rtw_ieee80211_spectrum_mgmt_actioncode { -+ RTW_WLAN_ACTION_SPCT_MSR_REQ = 0, -+ RTW_WLAN_ACTION_SPCT_MSR_RPRT = 1, -+ RTW_WLAN_ACTION_SPCT_TPC_REQ = 2, -+ RTW_WLAN_ACTION_SPCT_TPC_RPRT = 3, -+ RTW_WLAN_ACTION_SPCT_CHL_SWITCH = 4, -+ RTW_WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, -+}; -+ -+/* SELF_PROTECTED action code */ -+enum rtw_ieee80211_self_protected_actioncode { -+ RTW_ACT_SELF_PROTECTED_RSVD = 0, -+ RTW_ACT_SELF_PROTECTED_MESH_OPEN = 1, -+ RTW_ACT_SELF_PROTECTED_MESH_CONF = 2, -+ RTW_ACT_SELF_PROTECTED_MESH_CLOSE = 3, -+ RTW_ACT_SELF_PROTECTED_MESH_GK_INFORM = 4, -+ RTW_ACT_SELF_PROTECTED_MESH_GK_ACK = 5, -+ RTW_ACT_SELF_PROTECTED_NUM, -+}; -+ -+/* MESH action code */ -+enum rtw_ieee80211_mesh_actioncode { -+ RTW_ACT_MESH_LINK_METRIC_REPORT, -+ RTW_ACT_MESH_HWMP_PATH_SELECTION, -+ RTW_ACT_MESH_GATE_ANNOUNCEMENT, -+ RTW_ACT_MESH_CONGESTION_CONTROL_NOTIFICATION, -+ RTW_ACT_MESH_MCCA_SETUP_REQUEST, -+ RTW_ACT_MESH_MCCA_SETUP_REPLY, -+ RTW_ACT_MESH_MCCA_ADVERTISEMENT_REQUEST, -+ RTW_ACT_MESH_MCCA_ADVERTISEMENT, -+ RTW_ACT_MESH_MCCA_TEARDOWN, -+ RTW_ACT_MESH_TBTT_ADJUSTMENT_REQUEST, -+ RTW_ACT_MESH_TBTT_ADJUSTMENT_RESPONSE, -+}; -+ -+enum _PUBLIC_ACTION { -+ ACT_PUBLIC_BSSCOEXIST = 0, /* 20/40 BSS Coexistence */ -+ ACT_PUBLIC_DSE_ENABLE = 1, -+ ACT_PUBLIC_DSE_DEENABLE = 2, -+ ACT_PUBLIC_DSE_REG_LOCATION = 3, -+ ACT_PUBLIC_EXT_CHL_SWITCH = 4, -+ ACT_PUBLIC_DSE_MSR_REQ = 5, -+ ACT_PUBLIC_DSE_MSR_RPRT = 6, -+ ACT_PUBLIC_MP = 7, /* Measurement Pilot */ -+ ACT_PUBLIC_DSE_PWR_CONSTRAINT = 8, -+ ACT_PUBLIC_VENDOR = 9, /* for WIFI_DIRECT */ -+ ACT_PUBLIC_GAS_INITIAL_REQ = 10, -+ ACT_PUBLIC_GAS_INITIAL_RSP = 11, -+ ACT_PUBLIC_GAS_COMEBACK_REQ = 12, -+ ACT_PUBLIC_GAS_COMEBACK_RSP = 13, -+ ACT_PUBLIC_TDLS_DISCOVERY_RSP = 14, -+ ACT_PUBLIC_LOCATION_TRACK = 15, -+ ACT_PUBLIC_QAB_REQ, -+ ACT_PUBLIC_QAB_RSP, -+ ACT_PUBLIC_QMF_POLICY, -+ ACT_PUBLIC_QMF_POLICY_CHANGE, -+ ACT_PUBLIC_QLOAD_REQ, -+ ACT_PUBLIC_QLOAD_REPORT, -+ ACT_PUBLIC_HCCA_TXOP_ADV, -+ ACT_PUBLIC_HCCA_TXOP_RSP, -+ ACT_PUBLIC_PUBLIC_KEY, -+ ACT_PUBLIC_CH_AVAILABILITY_QUERY, -+ ACT_PUBLIC_CH_SCHEDULE_MGMT, -+ ACT_PUBLIC_CONTACT_VERI_SIGNAL, -+ ACT_PUBLIC_GDD_ENABLE_REQ, -+ ACT_PUBLIC_GDD_ENABLE_RSP, -+ ACT_PUBLIC_NETWORK_CH_CONTROL, -+ ACT_PUBLIC_WHITE_SPACE_MAP_ANN, -+ ACT_PUBLIC_FTM_REQ, -+ ACT_PUBLIC_FTM, -+ ACT_PUBLIC_MAX -+}; -+ -+#ifdef CONFIG_TDLS -+enum TDLS_ACTION_FIELD { -+ TDLS_SETUP_REQUEST = 0, -+ TDLS_SETUP_RESPONSE = 1, -+ TDLS_SETUP_CONFIRM = 2, -+ TDLS_TEARDOWN = 3, -+ TDLS_PEER_TRAFFIC_INDICATION = 4, -+ TDLS_CHANNEL_SWITCH_REQUEST = 5, -+ TDLS_CHANNEL_SWITCH_RESPONSE = 6, -+ TDLS_PEER_PSM_REQUEST = 7, -+ TDLS_PEER_PSM_RESPONSE = 8, -+ TDLS_PEER_TRAFFIC_RESPONSE = 9, -+ TDLS_DISCOVERY_REQUEST = 10, -+ TDLS_DISCOVERY_RESPONSE = 14, /* it's used in public action frame */ -+}; -+ -+#define TUNNELED_PROBE_REQ 15 -+#define TUNNELED_PROBE_RSP 16 -+#endif /* CONFIG_TDLS */ -+ -+/* BACK action code */ -+enum rtw_ieee80211_back_actioncode { -+ RTW_WLAN_ACTION_ADDBA_REQ = 0, -+ RTW_WLAN_ACTION_ADDBA_RESP = 1, -+ RTW_WLAN_ACTION_DELBA = 2, -+}; -+ -+/* HT features action code */ -+enum rtw_ieee80211_ht_actioncode { -+ RTW_WLAN_ACTION_HT_NOTI_CHNL_WIDTH = 0, -+ RTW_WLAN_ACTION_HT_SM_PS = 1, -+ RTW_WLAN_ACTION_HT_PSMP = 2, -+ RTW_WLAN_ACTION_HT_SET_PCO_PHASE = 3, -+ RTW_WLAN_ACTION_HT_CSI = 4, -+ RTW_WLAN_ACTION_HT_NON_COMPRESS_BEAMFORMING = 5, -+ RTW_WLAN_ACTION_HT_COMPRESS_BEAMFORMING = 6, -+ RTW_WLAN_ACTION_HT_ASEL_FEEDBACK = 7, -+}; -+ -+/* BACK (block-ack) parties */ -+enum rtw_ieee80211_back_parties { -+ RTW_WLAN_BACK_RECIPIENT = 0, -+ RTW_WLAN_BACK_INITIATOR = 1, -+ RTW_WLAN_BACK_TIMER = 2, -+}; -+ -+/*20/40 BSS Coexistence element */ -+#define RTW_WLAN_20_40_BSS_COEX_INFO_REQ BIT(0) -+#define RTW_WLAN_20_40_BSS_COEX_40MHZ_INTOL BIT(1) -+#define RTW_WLAN_20_40_BSS_COEX_20MHZ_WIDTH_REQ BIT(2) -+#define RTW_WLAN_20_40_BSS_COEX_OBSS_EXEMPT_REQ BIT(3) -+#define RTW_WLAN_20_40_BSS_COEX_OBSS_EXEMPT_GRNT BIT(4) -+ -+/* VHT features action code */ -+enum rtw_ieee80211_vht_actioncode { -+ RTW_WLAN_ACTION_VHT_COMPRESSED_BEAMFORMING = 0, -+ RTW_WLAN_ACTION_VHT_GROUPID_MANAGEMENT = 1, -+ RTW_WLAN_ACTION_VHT_OPMODE_NOTIFICATION = 2, -+}; -+ -+#define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs) -+ * 00:50:F2 */ -+#ifndef PLATFORM_FREEBSD /* Baron BSD has defined */ -+ #define WME_OUI_TYPE 2 -+#endif /* PLATFORM_FREEBSD */ -+#define WME_OUI_SUBTYPE_INFORMATION_ELEMENT 0 -+#define WME_OUI_SUBTYPE_PARAMETER_ELEMENT 1 -+#define WME_OUI_SUBTYPE_TSPEC_ELEMENT 2 -+#define WME_VERSION 1 -+ -+#define WME_ACTION_CODE_SETUP_REQUEST 0 -+#define WME_ACTION_CODE_SETUP_RESPONSE 1 -+#define WME_ACTION_CODE_TEARDOWN 2 -+ -+#define WME_SETUP_RESPONSE_STATUS_ADMISSION_ACCEPTED 0 -+#define WME_SETUP_RESPONSE_STATUS_INVALID_PARAMETERS 1 -+#define WME_SETUP_RESPONSE_STATUS_REFUSED 3 -+ -+#define WME_TSPEC_DIRECTION_UPLINK 0 -+#define WME_TSPEC_DIRECTION_DOWNLINK 1 -+#define WME_TSPEC_DIRECTION_BI_DIRECTIONAL 3 -+ -+ -+#define OUI_BROADCOM 0x00904c /* Broadcom (Epigram) */ -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+#define OUI_REALTEK 0x00e04c /* Realtek */ -+#endif -+#define VENDOR_HT_CAPAB_OUI_TYPE 0x33 /* 00-90-4c:0x33 */ -+ -+enum rtw_ieee80211_rann_flags { -+ RTW_RANN_FLAG_IS_GATE = 1 << 0, -+}; -+ -+/** -+ * enum rtw_ieee80211_preq_flags - mesh PREQ element flags -+ * -+ * @RTW_IEEE80211_PREQ_IS_GATE_FLAG: Gate Announcement subfield -+ * @RTW_IEEE80211_PREQ_PROACTIVE_PREP_FLAG: proactive PREP subfield -+ */ -+enum rtw_ieee80211_preq_flags { -+ RTW_IEEE80211_PREQ_IS_GATE_FLAG = 1 << 0, -+ RTW_IEEE80211_PREQ_PROACTIVE_PREP_FLAG = 1 << 2, -+}; -+ -+/** -+ * enum rtw_ieee80211_preq_target_flags - mesh PREQ element per target flags -+ * -+ * @RTW_IEEE80211_PREQ_TO_FLAG: target only subfield -+ * @RTW_IEEE80211_PREQ_USN_FLAG: unknown target HWMP sequence number subfield -+ */ -+enum rtw_ieee80211_preq_target_flags { -+ RTW_IEEE80211_PREQ_TO_FLAG = 1<<0, -+ RTW_IEEE80211_PREQ_USN_FLAG = 1<<2, -+}; -+ -+/** -+ * enum rtw_ieee80211_root_mode_identifier - root mesh STA mode identifier -+ * -+ * These attribute are used by dot11MeshHWMPRootMode to set root mesh STA mode -+ * -+ * @RTW_IEEE80211_ROOTMODE_NO_ROOT: the mesh STA is not a root mesh STA (default) -+ * @RTW_IEEE80211_ROOTMODE_ROOT: the mesh STA is a root mesh STA if greater than -+ * this value -+ * @RTW_IEEE80211_PROACTIVE_PREQ_NO_PREP: the mesh STA is a root mesh STA supports -+ * the proactive PREQ with proactive PREP subfield set to 0 -+ * @RTW_IEEE80211_PROACTIVE_PREQ_WITH_PREP: the mesh STA is a root mesh STA -+ * supports the proactive PREQ with proactive PREP subfield set to 1 -+ * @RTW_IEEE80211_PROACTIVE_RANN: the mesh STA is a root mesh STA supports -+ * the proactive RANN -+ */ -+enum rtw_ieee80211_root_mode_identifier { -+ RTW_IEEE80211_ROOTMODE_NO_ROOT = 0, -+ RTW_IEEE80211_ROOTMODE_ROOT = 1, -+ RTW_IEEE80211_PROACTIVE_PREQ_NO_PREP = 2, -+ RTW_IEEE80211_PROACTIVE_PREQ_WITH_PREP = 3, -+ RTW_IEEE80211_PROACTIVE_RANN = 4, -+}; -+ -+/** -+ * enum rtw_ieee80211_channel_flags - channel flags -+ * -+ * Channel flags set by the regulatory control code. -+ * -+ * @RTW_IEEE80211_CHAN_DISABLED: This channel is disabled. -+ * @RTW_IEEE80211_CHAN_PASSIVE_SCAN: Only passive scanning is permitted -+ * on this channel. -+ * @RTW_IEEE80211_CHAN_NO_IBSS: IBSS is not allowed on this channel. -+ * @RTW_IEEE80211_CHAN_RADAR: Radar detection is required on this channel. -+ * @RTW_IEEE80211_CHAN_NO_HT40PLUS: extension channel above this channel -+ * is not permitted. -+ * @RTW_IEEE80211_CHAN_NO_HT40MINUS: extension channel below this channel -+ * is not permitted. -+ */ -+enum rtw_ieee80211_channel_flags { -+ RTW_IEEE80211_CHAN_DISABLED = 1 << 0, -+ RTW_IEEE80211_CHAN_PASSIVE_SCAN = 1 << 1, -+ RTW_IEEE80211_CHAN_NO_IBSS = 1 << 2, -+ RTW_IEEE80211_CHAN_RADAR = 1 << 3, -+ RTW_IEEE80211_CHAN_NO_HT40PLUS = 1 << 4, -+ RTW_IEEE80211_CHAN_NO_HT40MINUS = 1 << 5, -+}; -+ -+#define RTW_IEEE80211_CHAN_NO_HT40 \ -+ (RTW_IEEE80211_CHAN_NO_HT40PLUS | RTW_IEEE80211_CHAN_NO_HT40MINUS) -+ -+/* Represent channel details, subset of ieee80211_channel */ -+struct rtw_ieee80211_channel { -+ /* enum ieee80211_band band; */ -+ /* u16 center_freq; */ -+ u16 hw_value; -+ u32 flags; -+ /* int max_antenna_gain; */ -+ /* int max_power; */ -+ /* int max_reg_power; */ -+ /* bool beacon_found; */ -+ /* u32 orig_flags; */ -+ /* int orig_mag; */ -+ /* int orig_mpwr; */ -+}; -+ -+#define CHAN_FMT \ -+ /*"band:%d, "*/ \ -+ /*"center_freq:%u, "*/ \ -+ "hw_value:%u, " \ -+ "flags:0x%08x" \ -+ /*"max_antenna_gain:%d\n"*/ \ -+ /*"max_power:%d\n"*/ \ -+ /*"max_reg_power:%d\n"*/ \ -+ /*"beacon_found:%u\n"*/ \ -+ /*"orig_flags:0x%08x\n"*/ \ -+ /*"orig_mag:%d\n"*/ \ -+ /*"orig_mpwr:%d\n"*/ -+ -+#define CHAN_ARG(channel) \ -+ /*(channel)->band*/ \ -+ /*, (channel)->center_freq*/ \ -+ (channel)->hw_value \ -+ , (channel)->flags \ -+ /*, (channel)->max_antenna_gain*/ \ -+ /*, (channel)->max_power*/ \ -+ /*, (channel)->max_reg_power*/ \ -+ /*, (channel)->beacon_found*/ \ -+ /*, (channel)->orig_flags*/ \ -+ /*, (channel)->orig_mag*/ \ -+ /*, (channel)->orig_mpwr*/ \ -+ -+/* Parsed Information Elements */ -+struct rtw_ieee802_11_elems { -+ u8 *ssid; -+ u8 ssid_len; -+ u8 *supp_rates; -+ u8 supp_rates_len; -+ u8 *fh_params; -+ u8 fh_params_len; -+ u8 *ds_params; -+ u8 ds_params_len; -+ u8 *cf_params; -+ u8 cf_params_len; -+ u8 *tim; -+ u8 tim_len; -+ u8 *ibss_params; -+ u8 ibss_params_len; -+ u8 *challenge; -+ u8 challenge_len; -+ u8 *erp_info; -+ u8 erp_info_len; -+ u8 *ext_supp_rates; -+ u8 ext_supp_rates_len; -+ u8 *wpa_ie; -+ u8 wpa_ie_len; -+ u8 *rsn_ie; -+ u8 rsn_ie_len; -+ u8 *wme; -+ u8 wme_len; -+ u8 *wme_tspec; -+ u8 wme_tspec_len; -+ u8 *wps_ie; -+ u8 wps_ie_len; -+ u8 *power_cap; -+ u8 power_cap_len; -+ u8 *supp_channels; -+ u8 supp_channels_len; -+ u8 *mdie; -+ u8 mdie_len; -+ u8 *ftie; -+ u8 ftie_len; -+ u8 *timeout_int; -+ u8 timeout_int_len; -+ u8 *ht_capabilities; -+ u8 ht_capabilities_len; -+ u8 *ht_operation; -+ u8 ht_operation_len; -+ u8 *vendor_ht_cap; -+ u8 vendor_ht_cap_len; -+ u8 *vht_capabilities; -+ u8 vht_capabilities_len; -+ u8 *vht_operation; -+ u8 vht_operation_len; -+ u8 *vht_op_mode_notify; -+ u8 vht_op_mode_notify_len; -+ u8 *rm_en_cap; -+ u8 rm_en_cap_len; -+#ifdef CONFIG_RTW_MESH -+ u8 *preq; -+ u8 preq_len; -+ u8 *prep; -+ u8 prep_len; -+ u8 *perr; -+ u8 perr_len; -+ u8 *rann; -+ u8 rann_len; -+#endif -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ u8 *tbtx_cap; -+ u8 tbtx_cap_len; -+#endif -+}; -+ -+typedef enum { ParseOK = 0, ParseUnknown = 1, ParseFailed = -1 } ParseRes; -+ -+ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len, -+ struct rtw_ieee802_11_elems *elems, -+ int show_errors); -+ -+u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source, unsigned int *frlen); -+u8 *rtw_set_ie(u8 *pbuf, sint index, uint len, const u8 *source, uint *frlen); -+ -+enum secondary_ch_offset { -+ SCN = 0, /* no secondary channel */ -+ SCA = 1, /* secondary channel above */ -+ SCB = 3, /* secondary channel below */ -+}; -+u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset); -+u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset); -+u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode, u8 new_ch, u8 ch_switch_cnt); -+u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset); -+u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl, u8 flags, u16 reason, u16 precedence); -+ -+u8 *rtw_get_ie(const u8 *pbuf, sint index, sint *len, sint limit); -+u8 rtw_update_rate_bymode(WLAN_BSSID_EX *pbss_network, u32 mode); -+ -+u8 *rtw_get_ie_ex(const u8 *in_ie, uint in_len, u8 eid, const u8 *oui, u8 oui_len, u8 *ie, uint *ielen); -+int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset, u8 eid, u8 *oui, u8 oui_len); -+ -+void rtw_set_supported_rate(u8 *SupportedRates, uint mode) ; -+ -+#define GET_RSN_CAP_MFP_OPTION(cap) LE_BITS_TO_2BYTE(((u8 *)(cap)), 6, 2) -+ -+#define MFP_NO 0 -+#define MFP_INVALID 1 -+#define MFP_OPTIONAL 2 -+#define MFP_REQUIRED 3 -+ -+struct rsne_info { -+ u8 *gcs; -+ u16 pcs_cnt; -+ u8 *pcs_list; -+ u16 akm_cnt; -+ u8 *akm_list; -+ u8 *cap; -+ u16 pmkid_cnt; -+ u8 *pmkid_list; -+ u8 *gmcs; -+ -+ u8 err; -+}; -+int rtw_rsne_info_parse(const u8 *ie, uint ie_len, struct rsne_info *info); -+ -+unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit); -+unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit); -+int rtw_get_wpa_cipher_suite(u8 *s); -+int rtw_get_rsn_cipher_suite(u8 *s); -+int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len); -+int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, u32 *akm); -+int rtw_parse_wpa2_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *gmcs, u32 *akm, u8 *mfp_opt); -+ -+int rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len, u8 *wpa_ie, u16 *wpa_len); -+ -+u8 rtw_is_wps_ie(u8 *ie_ptr, uint *wps_ielen); -+u8 *rtw_get_wps_ie_from_scan_queue(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen, enum bss_type frame_type); -+u8 *rtw_get_wps_ie(const u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen); -+u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id , u8 *buf_attr, u32 *len_attr); -+u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id , u8 *buf_content, uint *len_content); -+ -+u8 *rtw_get_owe_ie(const u8 *in_ie, uint in_len, u8 *owe_ie, uint *owe_ielen); -+ -+/** -+ * for_each_ie - iterate over continuous IEs -+ * @ie: -+ * @buf: -+ * @buf_len: -+ */ -+#define for_each_ie(ie, buf, buf_len) \ -+ for (ie = (void *)buf; (((u8 *)ie) - ((u8 *)buf) + 1) < buf_len; ie = (void *)(((u8 *)ie) + *(((u8 *)ie)+1) + 2)) -+ -+void dump_ies(void *sel, const u8 *buf, u32 buf_len); -+#ifdef CONFIG_RTW_DEBUG -+ -+#ifdef CONFIG_80211N_HT -+#define HT_SC_OFFSET_MAX 4 -+extern const char *const _ht_sc_offset_str[]; -+#define ht_sc_offset_str(sc) (((sc) >= HT_SC_OFFSET_MAX) ? _ht_sc_offset_str[2] : _ht_sc_offset_str[(sc)]) -+ -+void dump_ht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len); -+#endif -+ -+void dump_wps_ie(void *sel, const u8 *ie, u32 ie_len); -+#endif /* CONFIG_RTW_DEBUG */ -+ -+void rtw_ies_get_chbw(u8 *ies, int ies_len, u8 *ch, u8 *bw, u8 *offset, u8 ht, u8 vht); -+ -+void rtw_bss_get_chbw(WLAN_BSSID_EX *bss, u8 *ch, u8 *bw, u8 *offset, u8 ht, u8 vht); -+ -+bool rtw_is_chbw_grouped(u8 ch_a, u8 bw_a, u8 offset_a -+ , u8 ch_b, u8 bw_b, u8 offset_b); -+void rtw_sync_chbw(u8 *req_ch, u8 *req_bw, u8 *req_offset -+ , u8 *g_ch, u8 *g_bw, u8 *g_offset); -+ -+#ifdef CONFIG_P2P -+u32 rtw_get_p2p_merged_ies_len(u8 *in_ie, u32 in_len); -+int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie); -+#ifdef CONFIG_RTW_DEBUG -+void dump_p2p_ie(void *sel, const u8 *ie, u32 ie_len); -+#endif -+u8 *rtw_get_p2p_ie(const u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen); -+u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id, u8 *buf_attr, u32 *len_attr); -+u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id, u8 *buf_content, uint *len_content); -+u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr); -+uint rtw_del_p2p_ie(u8 *ies, uint ies_len_ori, const char *msg); -+uint rtw_del_p2p_attr(u8 *ie, uint ielen_ori, u8 attr_id); -+u8 *rtw_bss_ex_get_p2p_ie(WLAN_BSSID_EX *bss_ex, u8 *p2p_ie, uint *p2p_ielen); -+void rtw_bss_ex_del_p2p_ie(WLAN_BSSID_EX *bss_ex); -+void rtw_bss_ex_del_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id); -+#endif /* CONFIG_P2P */ -+ -+uint rtw_del_wfd_ie(u8 *ies, uint ies_len_ori, const char *msg); -+void rtw_bss_ex_del_wfd_ie(WLAN_BSSID_EX *bss_ex); -+#ifdef CONFIG_WFD -+#ifdef CONFIG_RTW_DEBUG -+void dump_wfd_ie(void *sel, const u8 *ie, u32 ie_len); -+#endif -+u8 *rtw_get_wfd_ie(const u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen); -+u8 *rtw_get_wfd_attr(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id, u8 *buf_attr, u32 *len_attr); -+u8 *rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id, u8 *buf_content, uint *len_content); -+uint rtw_del_wfd_attr(u8 *ie, uint ielen_ori, u8 attr_id); -+u8 *rtw_bss_ex_get_wfd_ie(WLAN_BSSID_EX *bss_ex, u8 *wfd_ie, uint *wfd_ielen); -+void rtw_bss_ex_del_wfd_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id); -+#endif -+ -+#define MULTI_AP_SUB_ELEM_TYPE 0x06 -+#define MULTI_AP_TEAR_DOWN BIT(4) -+#define MULTI_AP_FRONTHAUL_BSS BIT(5) -+#define MULTI_AP_BACKHAUL_BSS BIT(6) -+#define MULTI_AP_BACKHAUL_STA BIT(7) -+#ifdef CONFIG_RTW_MULTI_AP -+void dump_multi_ap_ie(void *sel, const u8 *ie, u32 ie_len); -+u8 rtw_get_multi_ap_ie_ext(const u8 *ies, int ies_len); -+u8 *rtw_set_multi_ap_ie_ext(u8 *pbuf, uint *frlen, u8 val); -+#endif -+ -+uint rtw_get_rateset_len(u8 *rateset); -+ -+struct registry_priv; -+int rtw_generate_ie(struct registry_priv *pregistrypriv); -+ -+int rtw_get_bit_value_from_ieee_value(u8 val); -+ -+uint rtw_is_cckrates_included(u8 *rate); -+ -+uint rtw_is_cckratesonly_included(u8 *rate); -+uint rtw_get_cckrate_size(u8 *rate,u32 rate_length); -+int rtw_check_network_type(unsigned char *rate, int ratelen, int channel); -+ -+u8 rtw_check_invalid_mac_address(u8 *mac_addr, u8 check_local_bit); -+void rtw_macaddr_cfg(u8 *out, const u8 *hw_mac_addr); -+ -+u16 rtw_ht_mcs_rate(u8 bw_40MHz, u8 short_GI, unsigned char *MCS_rate); -+u8 rtw_ht_mcsset_to_nss(u8 *supp_mcs_set); -+u32 rtw_ht_mcs_set_to_bitmap(u8 *mcs_set, u8 nss); -+u8 rtw_ht_cap_get_rx_nss(u8 *ht_cap); -+u8 rtw_ht_cap_get_tx_nss(u8 *ht_cap); -+ -+int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8 *category, u8 *action); -+const char *action_public_str(u8 action); -+ -+u8 key_2char2num(u8 hch, u8 lch); -+u8 str_2char2num(u8 hch, u8 lch); -+void macstr2num(u8 *dst, u8 *src); -+u8 convert_ip_addr(u8 hch, u8 mch, u8 lch); -+int wifirate2_ratetbl_inx(unsigned char rate); -+ -+ -+#endif /* IEEE80211_H */ -diff --git a/drivers/staging/rtl8723cs/include/ieee80211_ext.h b/drivers/staging/rtl8723cs/include/ieee80211_ext.h -new file mode 100644 -index 000000000000..4965863c4173 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/ieee80211_ext.h -@@ -0,0 +1,312 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __IEEE80211_EXT_H -+#define __IEEE80211_EXT_H -+ -+#include -+#include -+#include -+ -+#define WMM_OUI_TYPE 2 -+#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 -+#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 -+#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 -+#define WMM_VERSION 1 -+ -+#define WPA_PROTO_WPA BIT(0) -+#define WPA_PROTO_RSN BIT(1) -+ -+#define WPA_KEY_MGMT_IEEE8021X BIT(0) -+#define WPA_KEY_MGMT_PSK BIT(1) -+#define WPA_KEY_MGMT_NONE BIT(2) -+#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) -+#define WPA_KEY_MGMT_WPA_NONE BIT(4) -+ -+ -+#define WPA_CAPABILITY_PREAUTH BIT(0) -+#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) -+#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) -+ -+ -+#define PMKID_LEN 16 -+ -+ -+#ifdef PLATFORM_LINUX -+struct wpa_ie_hdr { -+ u8 elem_id; -+ u8 len; -+ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ -+ u8 version[2]; /* little endian */ -+} __attribute__((packed)); -+ -+struct rsn_ie_hdr { -+ u8 elem_id; /* WLAN_EID_RSN */ -+ u8 len; -+ u8 version[2]; /* little endian */ -+} __attribute__((packed)); -+ -+struct wme_ac_parameter { -+#if defined(CONFIG_LITTLE_ENDIAN) -+ /* byte 1 */ -+ u8 aifsn:4, -+ acm:1, -+ aci:2, -+ reserved:1; -+ -+ /* byte 2 */ -+ u8 eCWmin:4, -+ eCWmax:4; -+#elif defined(CONFIG_BIG_ENDIAN) -+ /* byte 1 */ -+ u8 reserved:1, -+ aci:2, -+ acm:1, -+ aifsn:4; -+ -+ /* byte 2 */ -+ u8 eCWmax:4, -+ eCWmin:4; -+#else -+#error "Please fix " -+#endif -+ -+ /* bytes 3 & 4 */ -+ u16 txopLimit; -+} __attribute__((packed)); -+ -+struct wme_parameter_element { -+ /* required fields for WME version 1 */ -+ u8 oui[3]; -+ u8 oui_type; -+ u8 oui_subtype; -+ u8 version; -+ u8 acInfo; -+ u8 reserved; -+ struct wme_ac_parameter ac[4]; -+ -+} __attribute__((packed)); -+ -+#endif -+ -+#define WPA_PUT_LE16(a, val) \ -+ do { \ -+ (a)[1] = ((u16) (val)) >> 8; \ -+ (a)[0] = ((u16) (val)) & 0xff; \ -+ } while (0) -+ -+#define WPA_PUT_BE32(a, val) \ -+ do { \ -+ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ -+ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ -+ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ -+ (a)[3] = (u8) (((u32) (val)) & 0xff); \ -+ } while (0) -+ -+#define WPA_PUT_LE32(a, val) \ -+ do { \ -+ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ -+ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ -+ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ -+ (a)[0] = (u8) (((u32) (val)) & 0xff); \ -+ } while (0) -+ -+#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val)) -+/* #define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val)) */ -+ -+ -+ -+/* Action category code */ -+enum ieee80211_category { -+ WLAN_CATEGORY_SPECTRUM_MGMT = 0, -+ WLAN_CATEGORY_QOS = 1, -+ WLAN_CATEGORY_DLS = 2, -+ WLAN_CATEGORY_BACK = 3, -+ WLAN_CATEGORY_HT = 7, -+ WLAN_CATEGORY_WMM = 17, -+}; -+ -+/* SPECTRUM_MGMT action code */ -+enum ieee80211_spectrum_mgmt_actioncode { -+ WLAN_ACTION_SPCT_MSR_REQ = 0, -+ WLAN_ACTION_SPCT_MSR_RPRT = 1, -+ WLAN_ACTION_SPCT_TPC_REQ = 2, -+ WLAN_ACTION_SPCT_TPC_RPRT = 3, -+ WLAN_ACTION_SPCT_CHL_SWITCH = 4, -+ WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, -+}; -+ -+/* BACK action code */ -+enum ieee80211_back_actioncode { -+ WLAN_ACTION_ADDBA_REQ = 0, -+ WLAN_ACTION_ADDBA_RESP = 1, -+ WLAN_ACTION_DELBA = 2, -+}; -+ -+/* HT features action code */ -+enum ieee80211_ht_actioncode { -+ WLAN_ACTION_NOTIFY_CH_WIDTH = 0, -+ WLAN_ACTION_SM_PS = 1, -+ WLAN_ACTION_PSPM = 2, -+ WLAN_ACTION_PCO_PHASE = 3, -+ WLAN_ACTION_MIMO_CSI_MX = 4, -+ WLAN_ACTION_MIMO_NONCP_BF = 5, -+ WLAN_ACTION_MIMP_CP_BF = 6, -+ WLAN_ACTION_ASEL_INDICATES_FB = 7, -+ WLAN_ACTION_HI_INFO_EXCHG = 8, -+}; -+ -+/* BACK (block-ack) parties */ -+enum ieee80211_back_parties { -+ WLAN_BACK_RECIPIENT = 0, -+ WLAN_BACK_INITIATOR = 1, -+ WLAN_BACK_TIMER = 2, -+}; -+ -+#ifdef PLATFORM_LINUX -+ -+struct ieee80211_mgmt { -+ u16 frame_control; -+ u16 duration; -+ u8 da[6]; -+ u8 sa[6]; -+ u8 bssid[6]; -+ u16 seq_ctrl; -+ union { -+ struct { -+ u16 auth_alg; -+ u16 auth_transaction; -+ u16 status_code; -+ /* possibly followed by Challenge text */ -+ u8 variable[0]; -+ } __attribute__((packed)) auth; -+ struct { -+ u16 reason_code; -+ } __attribute__((packed)) deauth; -+ struct { -+ u16 capab_info; -+ u16 listen_interval; -+ /* followed by SSID and Supported rates */ -+ u8 variable[0]; -+ } __attribute__((packed)) assoc_req; -+ struct { -+ u16 capab_info; -+ u16 status_code; -+ u16 aid; -+ /* followed by Supported rates */ -+ u8 variable[0]; -+ } __attribute__((packed)) assoc_resp, reassoc_resp; -+ struct { -+ u16 capab_info; -+ u16 listen_interval; -+ u8 current_ap[6]; -+ /* followed by SSID and Supported rates */ -+ u8 variable[0]; -+ } __attribute__((packed)) reassoc_req; -+ struct { -+ u16 reason_code; -+ } __attribute__((packed)) disassoc; -+ struct { -+ __le64 timestamp; -+ u16 beacon_int; -+ u16 capab_info; -+ /* followed by some of SSID, Supported rates, -+ * FH Params, DS Params, CF Params, IBSS Params, TIM */ -+ u8 variable[0]; -+ } __attribute__((packed)) beacon; -+ struct { -+ /* only variable items: SSID, Supported rates */ -+ u8 variable[0]; -+ } __attribute__((packed)) probe_req; -+ struct { -+ __le64 timestamp; -+ u16 beacon_int; -+ u16 capab_info; -+ /* followed by some of SSID, Supported rates, -+ * FH Params, DS Params, CF Params, IBSS Params */ -+ u8 variable[0]; -+ } __attribute__((packed)) probe_resp; -+ struct { -+ u8 category; -+ union { -+ struct { -+ u8 action_code; -+ u8 dialog_token; -+ u8 status_code; -+ u8 variable[0]; -+ } __attribute__((packed)) wme_action; -+#if 0 -+ struct { -+ u8 action_code; -+ u8 element_id; -+ u8 length; -+ struct ieee80211_channel_sw_ie sw_elem; -+ } __attribute__((packed)) chan_switch; -+ struct { -+ u8 action_code; -+ u8 dialog_token; -+ u8 element_id; -+ u8 length; -+ struct ieee80211_msrment_ie msr_elem; -+ } __attribute__((packed)) measurement; -+#endif -+ struct { -+ u8 action_code; -+ u8 dialog_token; -+ u16 capab; -+ u16 timeout; -+ u16 start_seq_num; -+ } __attribute__((packed)) addba_req; -+ struct { -+ u8 action_code; -+ u8 dialog_token; -+ u16 status; -+ u16 capab; -+ u16 timeout; -+ } __attribute__((packed)) addba_resp; -+ struct { -+ u8 action_code; -+ u16 params; -+ u16 reason_code; -+ } __attribute__((packed)) delba; -+ struct { -+ u8 action_code; -+ /* capab_info for open and confirm, -+ * reason for close -+ */ -+ u16 aux; -+ /* Followed in plink_confirm by status -+ * code, AID and supported rates, -+ * and directly by supported rates in -+ * plink_open and plink_close -+ */ -+ u8 variable[0]; -+ } __attribute__((packed)) plink_action; -+ struct { -+ u8 action_code; -+ u8 variable[0]; -+ } __attribute__((packed)) mesh_action; -+ } __attribute__((packed)) u; -+ } __attribute__((packed)) action; -+ } __attribute__((packed)) u; -+} __attribute__((packed)); -+ -+#endif -+ -+/* mgmt header + 1 byte category code */ -+#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) -+ -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/if_ether.h b/drivers/staging/rtl8723cs/include/if_ether.h -new file mode 100644 -index 000000000000..a3007c4ab22d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/if_ether.h -@@ -0,0 +1,106 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef _LINUX_IF_ETHER_H -+#define _LINUX_IF_ETHER_H -+ -+/* -+ * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble -+ * and FCS/CRC (frame check sequence). -+ */ -+ -+#define ETH_ALEN 6 /* Octets in one ethernet addr */ -+#define ETH_HLEN 14 /* Total octets in header. */ -+#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ -+#define ETH_DATA_LEN 1500 /* Max. octets in payload */ -+#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */ -+ -+/* -+ * These are the defined Ethernet Protocol ID's. -+ */ -+ -+#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */ -+#define ETH_P_PUP 0x0200 /* Xerox PUP packet */ -+#define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */ -+#define ETH_P_IP 0x0800 /* Internet Protocol packet */ -+#define ETH_P_X25 0x0805 /* CCITT X.25 */ -+#define ETH_P_ARP 0x0806 /* Address Resolution packet */ -+#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet [ NOT AN OFFICIALLY REGISTERED ID ] */ -+#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */ -+#define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */ -+#define ETH_P_DEC 0x6000 /* DEC Assigned proto */ -+#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */ -+#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */ -+#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */ -+#define ETH_P_LAT 0x6004 /* DEC LAT */ -+#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */ -+#define ETH_P_CUST 0x6006 /* DEC Customer use */ -+#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */ -+#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */ -+#define ETH_P_ATALK 0x809B /* Appletalk DDP */ -+#define ETH_P_AARP 0x80F3 /* Appletalk AARP */ -+#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */ -+#define ETH_P_IPX 0x8137 /* IPX over DIX */ -+#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */ -+#define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */ -+#define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */ -+#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */ -+#define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport -+ * over Ethernet -+ */ -+ -+/* -+ * Non DIX types. Won't clash for 1500 types. -+ */ -+ -+#define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */ -+#define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */ -+#define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */ -+#define ETH_P_802_2 0x0004 /* 802.2 frames */ -+#define ETH_P_SNAP 0x0005 /* Internal only */ -+#define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */ -+#define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/ -+#define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */ -+#define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */ -+#define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/ -+#define ETH_P_TR_802_2 0x0011 /* 802.2 frames */ -+#define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */ -+#define ETH_P_CONTROL 0x0016 /* Card specific control frames */ -+#define ETH_P_IRDA 0x0017 /* Linux-IrDA */ -+#define ETH_P_ECONET 0x0018 /* Acorn Econet */ -+ -+/* -+ * This is an Ethernet frame header. -+ */ -+ -+struct ethhdr { -+ unsigned char h_dest[ETH_ALEN]; /* destination eth addr */ -+ unsigned char h_source[ETH_ALEN]; /* source ether addr */ -+ unsigned short h_proto; /* packet type ID field */ -+}; -+ -+struct _vlan { -+ unsigned short h_vlan_TCI; /* Encapsulates priority and VLAN ID */ -+ unsigned short h_vlan_encapsulated_proto; -+}; -+ -+ -+ -+#define get_vlan_id(pvlan) ((ntohs((unsigned short)pvlan->h_vlan_TCI)) & 0xfff) -+#define get_vlan_priority(pvlan) ((ntohs((unsigned short)pvlan->h_vlan_TCI))>>13) -+#define get_vlan_encap_proto(pvlan) (ntohs((unsigned short)pvlan->h_vlan_encapsulated_proto)) -+ -+ -+#endif /* _LINUX_IF_ETHER_H */ -diff --git a/drivers/staging/rtl8723cs/include/ip.h b/drivers/staging/rtl8723cs/include/ip.h -new file mode 100644 -index 000000000000..4feb98fb072a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/ip.h -@@ -0,0 +1,135 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _LINUX_IP_H -+#define _LINUX_IP_H -+ -+/* SOL_IP socket options */ -+ -+#define IPTOS_TOS_MASK 0x1E -+#define IPTOS_TOS(tos) ((tos)&IPTOS_TOS_MASK) -+#define IPTOS_LOWDELAY 0x10 -+#define IPTOS_THROUGHPUT 0x08 -+#define IPTOS_RELIABILITY 0x04 -+#define IPTOS_MINCOST 0x02 -+ -+#define IPTOS_PREC_MASK 0xE0 -+#define IPTOS_PREC(tos) ((tos)&IPTOS_PREC_MASK) -+#define IPTOS_PREC_NETCONTROL 0xe0 -+#define IPTOS_PREC_INTERNETCONTROL 0xc0 -+#define IPTOS_PREC_CRITIC_ECP 0xa0 -+#define IPTOS_PREC_FLASHOVERRIDE 0x80 -+#define IPTOS_PREC_FLASH 0x60 -+#define IPTOS_PREC_IMMEDIATE 0x40 -+#define IPTOS_PREC_PRIORITY 0x20 -+#define IPTOS_PREC_ROUTINE 0x00 -+ -+ -+/* IP options */ -+#define IPOPT_COPY 0x80 -+#define IPOPT_CLASS_MASK 0x60 -+#define IPOPT_NUMBER_MASK 0x1f -+ -+#define IPOPT_COPIED(o) ((o)&IPOPT_COPY) -+#define IPOPT_CLASS(o) ((o)&IPOPT_CLASS_MASK) -+#define IPOPT_NUMBER(o) ((o)&IPOPT_NUMBER_MASK) -+ -+#define IPOPT_CONTROL 0x00 -+#define IPOPT_RESERVED1 0x20 -+#define IPOPT_MEASUREMENT 0x40 -+#define IPOPT_RESERVED2 0x60 -+ -+#define IPOPT_END (0 | IPOPT_CONTROL) -+#define IPOPT_NOOP (1 | IPOPT_CONTROL) -+#define IPOPT_SEC (2 | IPOPT_CONTROL | IPOPT_COPY) -+#define IPOPT_LSRR (3 | IPOPT_CONTROL | IPOPT_COPY) -+#define IPOPT_TIMESTAMP (4 | IPOPT_MEASUREMENT) -+#define IPOPT_RR (7 | IPOPT_CONTROL) -+#define IPOPT_SID (8 | IPOPT_CONTROL | IPOPT_COPY) -+#define IPOPT_SSRR (9 | IPOPT_CONTROL | IPOPT_COPY) -+#define IPOPT_RA (20 | IPOPT_CONTROL | IPOPT_COPY) -+ -+#define IPVERSION 4 -+#define MAXTTL 255 -+#define IPDEFTTL 64 -+ -+/* struct timestamp, struct route and MAX_ROUTES are removed. -+ -+ REASONS: it is clear that nobody used them because: -+ - MAX_ROUTES value was wrong. -+ - "struct route" was wrong. -+ - "struct timestamp" had fatally misaligned bitfields and was completely unusable. -+ */ -+ -+#define IPOPT_OPTVAL 0 -+#define IPOPT_OLEN 1 -+#define IPOPT_OFFSET 2 -+#define IPOPT_MINOFF 4 -+#define MAX_IPOPTLEN 40 -+#define IPOPT_NOP IPOPT_NOOP -+#define IPOPT_EOL IPOPT_END -+#define IPOPT_TS IPOPT_TIMESTAMP -+ -+#define IPOPT_TS_TSONLY 0 /* timestamps only */ -+#define IPOPT_TS_TSANDADDR 1 /* timestamps and addresses */ -+#define IPOPT_TS_PRESPEC 3 /* specified modules only */ -+ -+#ifdef PLATFORM_LINUX -+ -+struct ip_options { -+ __u32 faddr; /* Saved first hop address */ -+ unsigned char optlen; -+ unsigned char srr; -+ unsigned char rr; -+ unsigned char ts; -+ unsigned char is_setbyuser:1, /* Set by setsockopt? */ -+ is_data:1, /* Options in __data, rather than skb */ -+ is_strictroute:1, /* Strict source route */ -+ srr_is_hit:1, /* Packet destination addr was our one */ -+ is_changed:1, /* IP checksum more not valid */ -+ rr_needaddr:1, /* Need to record addr of outgoing dev */ -+ ts_needtime:1, /* Need to record timestamp */ -+ ts_needaddr:1; /* Need to record addr of outgoing dev */ -+ unsigned char router_alert; -+ unsigned char __pad1; -+ unsigned char __pad2; -+ unsigned char __data[0]; -+}; -+ -+#define optlength(opt) (sizeof(struct ip_options) + opt->optlen) -+#endif -+ -+struct iphdr { -+#if defined(__LITTLE_ENDIAN_BITFIELD) -+ __u8 ihl:4, -+ version:4; -+#elif defined (__BIG_ENDIAN_BITFIELD) -+ __u8 version:4, -+ ihl:4; -+#else -+#error "Please fix " -+#endif -+ __u8 tos; -+ __u16 tot_len; -+ __u16 id; -+ __u16 frag_off; -+ __u8 ttl; -+ __u8 protocol; -+ __u16 check; -+ __u32 saddr; -+ __u32 daddr; -+ /*The options start here. */ -+}; -+ -+#endif /* _LINUX_IP_H */ -diff --git a/drivers/staging/rtl8723cs/include/linux/wireless.h b/drivers/staging/rtl8723cs/include/linux/wireless.h -new file mode 100644 -index 000000000000..c7f4a6c9b66a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/linux/wireless.h -@@ -0,0 +1,87 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef _LINUX_WIRELESS_H -+#define _LINUX_WIRELESS_H -+ -+/***************************** INCLUDES *****************************/ -+ -+#if 0 -+ #include /* for __u* and __s* typedefs */ -+ #include /* for "struct sockaddr" et al */ -+ #include /* for IFNAMSIZ and co... */ -+#else -+ #define __user -+ /* typedef uint16_t __u16; */ -+ #include /* for "struct sockaddr" et al */ -+ #include /* for IFNAMSIZ and co... */ -+#endif -+ -+/****************************** TYPES ******************************/ -+#ifdef CONFIG_COMPAT -+struct compat_iw_point { -+ compat_caddr_t pointer; -+ __u16 length; -+ __u16 flags; -+}; -+#endif -+/* --------------------------- SUBTYPES --------------------------- */ -+/* -+ * For all data larger than 16 octets, we need to use a -+ * pointer to memory allocated in user space. -+ */ -+struct iw_point { -+ void __user *pointer; /* Pointer to the data (in user space) */ -+ __u16 length; /* number of fields or size in bytes */ -+ __u16 flags; /* Optional params */ -+}; -+ -+ -+/* ------------------------ IOCTL REQUEST ------------------------ */ -+/* -+ * This structure defines the payload of an ioctl, and is used -+ * below. -+ * -+ * Note that this structure should fit on the memory footprint -+ * of iwreq (which is the same as ifreq), which mean a max size of -+ * 16 octets = 128 bits. Warning, pointers might be 64 bits wide... -+ * You should check this when increasing the structures defined -+ * above in this file... -+ */ -+union iwreq_data { -+ /* Config - generic */ -+ char name[IFNAMSIZ]; -+ /* Name : used to verify the presence of wireless extensions. -+ * Name of the protocol/provider... */ -+ -+ struct iw_point data; /* Other large parameters */ -+}; -+ -+/* -+ * The structure to exchange data for ioctl. -+ * This structure is the same as 'struct ifreq', but (re)defined for -+ * convenience... -+ * Do I need to remind you about structure size (32 octets) ? -+ */ -+struct iwreq { -+ union { -+ char ifrn_name[IFNAMSIZ]; /* if name, e.g. "eth0" */ -+ } ifr_ifrn; -+ -+ /* Data part (defined just above) */ -+ union iwreq_data u; -+}; -+ -+#endif /* _LINUX_WIRELESS_H */ -diff --git a/drivers/staging/rtl8723cs/include/mlme_osdep.h b/drivers/staging/rtl8723cs/include/mlme_osdep.h -new file mode 100644 -index 000000000000..131eb092560f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/mlme_osdep.h -@@ -0,0 +1,25 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __MLME_OSDEP_H_ -+#define __MLME_OSDEP_H_ -+ -+extern void rtw_os_indicate_disconnect(_adapter *adapter, u16 reason, u8 locally_generated); -+extern void rtw_os_indicate_connect(_adapter *adapter); -+void rtw_os_indicate_scan_done(_adapter *padapter, bool aborted); -+extern void rtw_report_sec_ie(_adapter *adapter, u8 authmode, u8 *sec_ie); -+ -+void rtw_reset_securitypriv(_adapter *adapter); -+ -+#endif /* _MLME_OSDEP_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/nic_spec.h b/drivers/staging/rtl8723cs/include/nic_spec.h -new file mode 100644 -index 000000000000..913ef9ba801a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/nic_spec.h -@@ -0,0 +1,41 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+#ifndef __NIC_SPEC_H__ -+#define __NIC_SPEC_H__ -+ -+#include -+ -+#define RTL8711_MCTRL_ (0x20000) -+#define RTL8711_UART_ (0x30000) -+#define RTL8711_TIMER_ (0x40000) -+#define RTL8711_FINT_ (0x50000) -+#define RTL8711_HINT_ (0x50000) -+#define RTL8711_GPIO_ (0x60000) -+#define RTL8711_WLANCTRL_ (0x200000) -+#define RTL8711_WLANFF_ (0xe00000) -+#define RTL8711_HCICTRL_ (0x600000) -+#define RTL8711_SYSCFG_ (0x620000) -+#define RTL8711_SYSCTRL_ (0x620000) -+#define RTL8711_MCCTRL_ (0x020000) -+ -+ -+#include -+ -+#include -+ -+ -+#endif /* __RTL8711_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/osdep_intf.h b/drivers/staging/rtl8723cs/include/osdep_intf.h -new file mode 100644 -index 000000000000..63e535ee5ab7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/osdep_intf.h -@@ -0,0 +1,143 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __OSDEP_INTF_H_ -+#define __OSDEP_INTF_H_ -+ -+ -+struct intf_priv { -+ -+ u8 *intf_dev; -+ u32 max_iosz; /* USB2.0: 128, USB1.1: 64, SDIO:64 */ -+ u32 max_xmitsz; /* USB2.0: unlimited, SDIO:512 */ -+ u32 max_recvsz; /* USB2.0: unlimited, SDIO:512 */ -+ -+ volatile u8 *io_rwmem; -+ volatile u8 *allocated_io_rwmem; -+ u32 io_wsz; /* unit: 4bytes */ -+ u32 io_rsz;/* unit: 4bytes */ -+ u8 intf_status; -+ -+ void (*_bus_io)(u8 *priv); -+ -+ /* -+ Under Sync. IRP (SDIO/USB) -+ A protection mechanism is necessary for the io_rwmem(read/write protocol) -+ -+ Under Async. IRP (SDIO/USB) -+ The protection mechanism is through the pending queue. -+ */ -+ -+ _mutex ioctl_mutex; -+ -+ -+#ifdef PLATFORM_LINUX -+#ifdef CONFIG_USB_HCI -+ /* when in USB, IO is through interrupt in/out endpoints */ -+ struct usb_device *udev; -+ PURB piorw_urb; -+ u8 io_irp_cnt; -+ u8 bio_irp_pending; -+ _sema io_retevt; -+ _timer io_timer; -+ u8 bio_irp_timeout; -+ u8 bio_timer_cancel; -+#endif -+#endif -+ -+}; -+ -+struct dvobj_priv *devobj_init(void); -+void devobj_deinit(struct dvobj_priv *pdvobj); -+ -+u8 rtw_init_drv_sw(_adapter *padapter); -+u8 rtw_free_drv_sw(_adapter *padapter); -+u8 rtw_reset_drv_sw(_adapter *padapter); -+void rtw_dev_unload(PADAPTER padapter); -+ -+u32 rtw_start_drv_threads(_adapter *padapter); -+void rtw_stop_drv_threads(_adapter *padapter); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+void rtw_cancel_dynamic_chk_timer(_adapter *padapter); -+#endif -+void rtw_cancel_all_timer(_adapter *padapter); -+ -+uint loadparam(_adapter *adapter); -+ -+#ifdef PLATFORM_LINUX -+int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); -+ -+int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname); -+struct net_device *rtw_init_netdev(_adapter *padapter); -+ -+void rtw_os_ndev_free(_adapter *adapter); -+int rtw_os_ndev_init(_adapter *adapter, const char *name); -+void rtw_os_ndev_deinit(_adapter *adapter); -+void rtw_os_ndev_unregister(_adapter *adapter); -+void rtw_os_ndevs_unregister(struct dvobj_priv *dvobj); -+int rtw_os_ndevs_init(struct dvobj_priv *dvobj); -+void rtw_os_ndevs_deinit(struct dvobj_priv *dvobj); -+ -+u16 rtw_os_recv_select_queue(u8 *msdu, enum rtw_rx_llc_hdl llc_hdl); -+ -+int rtw_ndev_notifier_register(void); -+void rtw_ndev_notifier_unregister(void); -+void rtw_inetaddr_notifier_register(void); -+void rtw_inetaddr_notifier_unregister(void); -+ -+#include "../os_dep/linux/rtw_proc.h" -+#include "../os_dep/linux/nlrtw.h" -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+#include "../os_dep/linux/custom_multiap_intfs/custom_multiap_intfs.h" -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ #include "../os_dep/linux/ioctl_cfg80211.h" -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+u8 rtw_rtnl_lock_needed(struct dvobj_priv *dvobj); -+void rtw_set_rtnl_lock_holder(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl); -+ -+#endif /* PLATFORM_LINUX */ -+ -+ -+#ifdef PLATFORM_FREEBSD -+extern int rtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); -+#endif -+ -+void rtw_ips_dev_unload(_adapter *padapter); -+ -+#ifdef CONFIG_IPS -+int rtw_ips_pwr_up(_adapter *padapter); -+void rtw_ips_pwr_down(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_CONCURRENT_MODE -+struct _io_ops; -+struct dvobj_priv; -+_adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, void (*set_intf_ops)(_adapter *primary_padapter, struct _io_ops *pops)); -+void rtw_drv_stop_vir_ifaces(struct dvobj_priv *dvobj); -+void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj); -+#endif -+ -+void rtw_ndev_destructor(_nic_hdl ndev); -+#ifdef CONFIG_ARP_KEEP_ALIVE -+int rtw_gw_addr_query(_adapter *padapter); -+#endif -+ -+int rtw_suspend_common(_adapter *padapter); -+int rtw_resume_common(_adapter *padapter); -+ -+#endif /* _OSDEP_INTF_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/osdep_service.h b/drivers/staging/rtl8723cs/include/osdep_service.h -new file mode 100644 -index 000000000000..4ec16b564f0f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/osdep_service.h -@@ -0,0 +1,887 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __OSDEP_SERVICE_H_ -+#define __OSDEP_SERVICE_H_ -+ -+ -+#define _FAIL 0 -+#define _SUCCESS 1 -+#define RTW_RX_HANDLED 2 -+#define RTW_RFRAME_UNAVAIL 3 -+#define RTW_RFRAME_PKT_UNAVAIL 4 -+#define RTW_RBUF_UNAVAIL 5 -+#define RTW_RBUF_PKT_UNAVAIL 6 -+#define RTW_SDIO_READ_PORT_FAIL 7 -+#define RTW_ALREADY 8 -+#define RTW_RA_RESOLVING 9 -+#define RTW_BMC_NO_NEED 10 -+#define RTW_XBUF_UNAVAIL 11 -+#define RTW_TX_BALANCE 12 -+#define RTW_TX_WAIT_MORE_FRAME 13 -+#define RTW_QUEUE_MGMT 14 -+ -+/* #define RTW_STATUS_TIMEDOUT -110 */ -+ -+#undef _TRUE -+#define _TRUE 1 -+ -+#undef _FALSE -+#define _FALSE 0 -+ -+ -+#ifdef PLATFORM_FREEBSD -+ #include -+#endif -+ -+#ifdef PLATFORM_LINUX -+ #include -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)) -+ #include -+ #include -+#endif -+ #include -+ #include -+#endif -+ -+#ifdef PLATFORM_OS_XP -+ #include -+ #include -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ #include -+ #include -+#endif -+ -+/* #include */ -+ -+#ifndef BIT -+ #define BIT(x) (1 << (x)) -+#endif -+#ifndef BIT_ULL -+#define BIT_ULL(x) (1ULL << (x)) -+#endif -+ -+#define CHECK_BIT(a, b) (!!((a) & (b))) -+ -+#define BIT0 0x00000001 -+#define BIT1 0x00000002 -+#define BIT2 0x00000004 -+#define BIT3 0x00000008 -+#define BIT4 0x00000010 -+#define BIT5 0x00000020 -+#define BIT6 0x00000040 -+#define BIT7 0x00000080 -+#define BIT8 0x00000100 -+#define BIT9 0x00000200 -+#define BIT10 0x00000400 -+#define BIT11 0x00000800 -+#define BIT12 0x00001000 -+#define BIT13 0x00002000 -+#define BIT14 0x00004000 -+#define BIT15 0x00008000 -+#define BIT16 0x00010000 -+#define BIT17 0x00020000 -+#define BIT18 0x00040000 -+#define BIT19 0x00080000 -+#define BIT20 0x00100000 -+#define BIT21 0x00200000 -+#define BIT22 0x00400000 -+#define BIT23 0x00800000 -+#define BIT24 0x01000000 -+#define BIT25 0x02000000 -+#define BIT26 0x04000000 -+#define BIT27 0x08000000 -+#define BIT28 0x10000000 -+#define BIT29 0x20000000 -+#define BIT30 0x40000000 -+#define BIT31 0x80000000 -+#define BIT32 0x0100000000 -+#define BIT33 0x0200000000 -+#define BIT34 0x0400000000 -+#define BIT35 0x0800000000 -+#define BIT36 0x1000000000 -+ -+#ifndef GENMASK -+#define GENMASK(h, l) \ -+ (((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h)))) -+#endif -+ -+extern int RTW_STATUS_CODE(int error_code); -+ -+#ifndef RTK_DMP_PLATFORM -+ #define CONFIG_USE_VMALLOC -+#endif -+ -+/* flags used for rtw_mstat_update() */ -+enum mstat_f { -+ /* type: 0x00ff */ -+ MSTAT_TYPE_VIR = 0x00, -+ MSTAT_TYPE_PHY = 0x01, -+ MSTAT_TYPE_SKB = 0x02, -+ MSTAT_TYPE_USB = 0x03, -+ MSTAT_TYPE_MAX = 0x04, -+ -+ /* func: 0xff00 */ -+ MSTAT_FUNC_UNSPECIFIED = 0x00 << 8, -+ MSTAT_FUNC_IO = 0x01 << 8, -+ MSTAT_FUNC_TX_IO = 0x02 << 8, -+ MSTAT_FUNC_RX_IO = 0x03 << 8, -+ MSTAT_FUNC_TX = 0x04 << 8, -+ MSTAT_FUNC_RX = 0x05 << 8, -+ MSTAT_FUNC_CFG_VENDOR = 0x06 << 8, -+ MSTAT_FUNC_MAX = 0x07 << 8, -+}; -+ -+#define mstat_tf_idx(flags) ((flags) & 0xff) -+#define mstat_ff_idx(flags) (((flags) & 0xff00) >> 8) -+ -+typedef enum mstat_status { -+ MSTAT_ALLOC_SUCCESS = 0, -+ MSTAT_ALLOC_FAIL, -+ MSTAT_FREE -+} MSTAT_STATUS; -+ -+#ifdef DBG_MEM_ALLOC -+void rtw_mstat_update(const enum mstat_f flags, const MSTAT_STATUS status, u32 sz); -+void rtw_mstat_dump(void *sel); -+bool match_mstat_sniff_rules(const enum mstat_f flags, const size_t size); -+void *dbg_rtw_vmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line); -+void *dbg_rtw_zvmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line); -+void dbg_rtw_vmfree(void *pbuf, const enum mstat_f flags, u32 sz, const char *func, const int line); -+void *dbg_rtw_malloc(u32 sz, const enum mstat_f flags, const char *func, const int line); -+void *dbg_rtw_zmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line); -+void dbg_rtw_mfree(void *pbuf, const enum mstat_f flags, u32 sz, const char *func, const int line); -+ -+struct sk_buff *dbg_rtw_skb_alloc(unsigned int size, const enum mstat_f flags, const char *func, const int line); -+void dbg_rtw_skb_free(struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line); -+struct sk_buff *dbg_rtw_skb_copy(const struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line); -+struct sk_buff *dbg_rtw_skb_clone(struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line); -+int dbg_rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb, const enum mstat_f flags, const char *func, int line); -+#ifdef CONFIG_RTW_NAPI -+int dbg_rtw_netif_receive_skb(_nic_hdl ndev, struct sk_buff *skb, const enum mstat_f flags, const char *func, int line); -+#ifdef CONFIG_RTW_GRO -+gro_result_t dbg_rtw_napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb, const enum mstat_f flags, const char *func, int line); -+#endif -+#endif /* CONFIG_RTW_NAPI */ -+void dbg_rtw_skb_queue_purge(struct sk_buff_head *list, enum mstat_f flags, const char *func, int line); -+#ifdef CONFIG_USB_HCI -+void *dbg_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma, const enum mstat_f flags, const char *func, const int line); -+void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma, const enum mstat_f flags, const char *func, const int line); -+#endif /* CONFIG_USB_HCI */ -+ -+#ifdef CONFIG_USE_VMALLOC -+#define rtw_vmalloc(sz) dbg_rtw_vmalloc((sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) -+#define rtw_zvmalloc(sz) dbg_rtw_zvmalloc((sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) -+#define rtw_vmfree(pbuf, sz) dbg_rtw_vmfree((pbuf), (sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) -+#define rtw_vmalloc_f(sz, mstat_f) dbg_rtw_vmalloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) -+#define rtw_zvmalloc_f(sz, mstat_f) dbg_rtw_zvmalloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) -+#define rtw_vmfree_f(pbuf, sz, mstat_f) dbg_rtw_vmfree((pbuf), (sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) -+#else /* CONFIG_USE_VMALLOC */ -+#define rtw_vmalloc(sz) dbg_rtw_malloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_zvmalloc(sz) dbg_rtw_zmalloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_vmfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_vmalloc_f(sz, mstat_f) dbg_rtw_malloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_zvmalloc_f(sz, mstat_f) dbg_rtw_zmalloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_vmfree_f(pbuf, sz, mstat_f) dbg_rtw_mfree((pbuf), (sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#endif /* CONFIG_USE_VMALLOC */ -+#define rtw_malloc(sz) dbg_rtw_malloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_zmalloc(sz) dbg_rtw_zmalloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_mfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_malloc_f(sz, mstat_f) dbg_rtw_malloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_zmalloc_f(sz, mstat_f) dbg_rtw_zmalloc((sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+#define rtw_mfree_f(pbuf, sz, mstat_f) dbg_rtw_mfree((pbuf), (sz), ((mstat_f) & 0xff00) | MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) -+ -+#define rtw_skb_alloc(size) dbg_rtw_skb_alloc((size), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#define rtw_skb_free(skb) dbg_rtw_skb_free((skb), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#define rtw_skb_alloc_f(size, mstat_f) dbg_rtw_skb_alloc((size), ((mstat_f) & 0xff00) | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#define rtw_skb_free_f(skb, mstat_f) dbg_rtw_skb_free((skb), ((mstat_f) & 0xff00) | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#define rtw_skb_copy(skb) dbg_rtw_skb_copy((skb), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#define rtw_skb_clone(skb) dbg_rtw_skb_clone((skb), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#define rtw_skb_copy_f(skb, mstat_f) dbg_rtw_skb_copy((skb), ((mstat_f) & 0xff00) | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#define rtw_skb_clone_f(skb, mstat_f) dbg_rtw_skb_clone((skb), ((mstat_f) & 0xff00) | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#define rtw_netif_rx(ndev, skb) dbg_rtw_netif_rx(ndev, skb, MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#ifdef CONFIG_RTW_NAPI -+#define rtw_netif_receive_skb(ndev, skb) dbg_rtw_netif_receive_skb(ndev, skb, MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#ifdef CONFIG_RTW_GRO -+#define rtw_napi_gro_receive(napi, skb) dbg_rtw_napi_gro_receive(napi, skb, MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#endif -+#endif /* CONFIG_RTW_NAPI */ -+#define rtw_skb_queue_purge(sk_buff_head) dbg_rtw_skb_queue_purge(sk_buff_head, MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#ifdef CONFIG_USB_HCI -+#define rtw_usb_buffer_alloc(dev, size, dma) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), MSTAT_TYPE_USB, __FUNCTION__, __LINE__) -+#define rtw_usb_buffer_free(dev, size, addr, dma) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), MSTAT_TYPE_USB, __FUNCTION__, __LINE__) -+#define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), ((mstat_f) & 0xff00) | MSTAT_TYPE_USB, __FUNCTION__, __LINE__) -+#define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), ((mstat_f) & 0xff00) | MSTAT_TYPE_USB, __FUNCTION__, __LINE__) -+#endif /* CONFIG_USB_HCI */ -+ -+#else /* DBG_MEM_ALLOC */ -+#define rtw_mstat_update(flag, status, sz) do {} while (0) -+#define rtw_mstat_dump(sel) do {} while (0) -+#define match_mstat_sniff_rules(flags, size) _FALSE -+void *_rtw_vmalloc(u32 sz); -+void *_rtw_zvmalloc(u32 sz); -+void _rtw_vmfree(void *pbuf, u32 sz); -+void *_rtw_zmalloc(u32 sz); -+void *_rtw_malloc(u32 sz); -+void _rtw_mfree(void *pbuf, u32 sz); -+ -+struct sk_buff *_rtw_skb_alloc(u32 sz); -+void _rtw_skb_free(struct sk_buff *skb); -+struct sk_buff *_rtw_skb_copy(const struct sk_buff *skb); -+struct sk_buff *_rtw_skb_clone(struct sk_buff *skb); -+int _rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb); -+#ifdef CONFIG_RTW_NAPI -+int _rtw_netif_receive_skb(_nic_hdl ndev, struct sk_buff *skb); -+#ifdef CONFIG_RTW_GRO -+gro_result_t _rtw_napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb); -+#endif -+#endif /* CONFIG_RTW_NAPI */ -+void _rtw_skb_queue_purge(struct sk_buff_head *list); -+ -+#ifdef CONFIG_USB_HCI -+void *_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma); -+void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma); -+#endif /* CONFIG_USB_HCI */ -+ -+#ifdef CONFIG_USE_VMALLOC -+#define rtw_vmalloc(sz) _rtw_vmalloc((sz)) -+#define rtw_zvmalloc(sz) _rtw_zvmalloc((sz)) -+#define rtw_vmfree(pbuf, sz) _rtw_vmfree((pbuf), (sz)) -+#define rtw_vmalloc_f(sz, mstat_f) _rtw_vmalloc((sz)) -+#define rtw_zvmalloc_f(sz, mstat_f) _rtw_zvmalloc((sz)) -+#define rtw_vmfree_f(pbuf, sz, mstat_f) _rtw_vmfree((pbuf), (sz)) -+#else /* CONFIG_USE_VMALLOC */ -+#define rtw_vmalloc(sz) _rtw_malloc((sz)) -+#define rtw_zvmalloc(sz) _rtw_zmalloc((sz)) -+#define rtw_vmfree(pbuf, sz) _rtw_mfree((pbuf), (sz)) -+#define rtw_vmalloc_f(sz, mstat_f) _rtw_malloc((sz)) -+#define rtw_zvmalloc_f(sz, mstat_f) _rtw_zmalloc((sz)) -+#define rtw_vmfree_f(pbuf, sz, mstat_f) _rtw_mfree((pbuf), (sz)) -+#endif /* CONFIG_USE_VMALLOC */ -+#define rtw_malloc(sz) _rtw_malloc((sz)) -+#define rtw_zmalloc(sz) _rtw_zmalloc((sz)) -+#define rtw_mfree(pbuf, sz) _rtw_mfree((pbuf), (sz)) -+#define rtw_malloc_f(sz, mstat_f) _rtw_malloc((sz)) -+#define rtw_zmalloc_f(sz, mstat_f) _rtw_zmalloc((sz)) -+#define rtw_mfree_f(pbuf, sz, mstat_f) _rtw_mfree((pbuf), (sz)) -+ -+#define rtw_skb_alloc(size) _rtw_skb_alloc((size)) -+#define rtw_skb_free(skb) _rtw_skb_free((skb)) -+#define rtw_skb_alloc_f(size, mstat_f) _rtw_skb_alloc((size)) -+#define rtw_skb_free_f(skb, mstat_f) _rtw_skb_free((skb)) -+#define rtw_skb_copy(skb) _rtw_skb_copy((skb)) -+#define rtw_skb_clone(skb) _rtw_skb_clone((skb)) -+#define rtw_skb_copy_f(skb, mstat_f) _rtw_skb_copy((skb)) -+#define rtw_skb_clone_f(skb, mstat_f) _rtw_skb_clone((skb)) -+#define rtw_netif_rx(ndev, skb) _rtw_netif_rx(ndev, skb) -+#ifdef CONFIG_RTW_NAPI -+#define rtw_netif_receive_skb(ndev, skb) _rtw_netif_receive_skb(ndev, skb) -+#ifdef CONFIG_RTW_GRO -+#define rtw_napi_gro_receive(napi, skb) _rtw_napi_gro_receive(napi, skb) -+#endif -+#endif /* CONFIG_RTW_NAPI */ -+#define rtw_skb_queue_purge(sk_buff_head) _rtw_skb_queue_purge(sk_buff_head) -+#ifdef CONFIG_USB_HCI -+#define rtw_usb_buffer_alloc(dev, size, dma) _rtw_usb_buffer_alloc((dev), (size), (dma)) -+#define rtw_usb_buffer_free(dev, size, addr, dma) _rtw_usb_buffer_free((dev), (size), (addr), (dma)) -+#define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) _rtw_usb_buffer_alloc((dev), (size), (dma)) -+#define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) _rtw_usb_buffer_free((dev), (size), (addr), (dma)) -+#endif /* CONFIG_USB_HCI */ -+#endif /* DBG_MEM_ALLOC */ -+ -+extern void *rtw_malloc2d(int h, int w, size_t size); -+extern void rtw_mfree2d(void *pbuf, int h, int w, int size); -+ -+void rtw_os_pkt_free(_pkt *pkt); -+_pkt *rtw_os_pkt_copy(_pkt *pkt); -+void *rtw_os_pkt_data(_pkt *pkt); -+u32 rtw_os_pkt_len(_pkt *pkt); -+ -+extern void _rtw_memcpy(void *dec, const void *sour, u32 sz); -+extern void _rtw_memmove(void *dst, const void *src, u32 sz); -+extern int _rtw_memcmp(const void *dst, const void *src, u32 sz); -+extern int _rtw_memcmp2(const void *dst, const void *src, u32 sz); -+extern void _rtw_memset(void *pbuf, int c, u32 sz); -+ -+extern void _rtw_init_listhead(_list *list); -+extern u32 rtw_is_list_empty(_list *phead); -+extern void rtw_list_insert_head(_list *plist, _list *phead); -+extern void rtw_list_insert_tail(_list *plist, _list *phead); -+void rtw_list_splice(_list *list, _list *head); -+void rtw_list_splice_init(_list *list, _list *head); -+void rtw_list_splice_tail(_list *list, _list *head); -+ -+#ifndef PLATFORM_FREEBSD -+extern void rtw_list_delete(_list *plist); -+#endif /* PLATFORM_FREEBSD */ -+ -+void rtw_hlist_head_init(rtw_hlist_head *h); -+void rtw_hlist_add_head(rtw_hlist_node *n, rtw_hlist_head *h); -+void rtw_hlist_del(rtw_hlist_node *n); -+void rtw_hlist_add_head_rcu(rtw_hlist_node *n, rtw_hlist_head *h); -+void rtw_hlist_del_rcu(rtw_hlist_node *n); -+ -+extern void _rtw_init_sema(_sema *sema, int init_val); -+extern void _rtw_free_sema(_sema *sema); -+extern void _rtw_up_sema(_sema *sema); -+extern u32 _rtw_down_sema(_sema *sema); -+extern void _rtw_mutex_init(_mutex *pmutex); -+extern void _rtw_mutex_free(_mutex *pmutex); -+#ifndef PLATFORM_FREEBSD -+extern void _rtw_spinlock_init(_lock *plock); -+#endif /* PLATFORM_FREEBSD */ -+extern void _rtw_spinlock_free(_lock *plock); -+extern void _rtw_spinlock(_lock *plock); -+extern void _rtw_spinunlock(_lock *plock); -+extern void _rtw_spinlock_ex(_lock *plock); -+extern void _rtw_spinunlock_ex(_lock *plock); -+ -+extern void _rtw_init_queue(_queue *pqueue); -+extern void _rtw_deinit_queue(_queue *pqueue); -+extern u32 _rtw_queue_empty(_queue *pqueue); -+extern u32 rtw_end_of_queue_search(_list *queue, _list *pelement); -+ -+extern systime _rtw_get_current_time(void); -+extern u32 _rtw_systime_to_ms(systime stime); -+extern systime _rtw_ms_to_systime(u32 ms); -+extern systime _rtw_us_to_systime(u32 us); -+extern s32 _rtw_get_passing_time_ms(systime start); -+extern s32 _rtw_get_remaining_time_ms(systime end); -+extern s32 _rtw_get_time_interval_ms(systime start, systime end); -+extern bool _rtw_time_after(systime a, systime b); -+ -+#ifdef DBG_SYSTIME -+#define rtw_get_current_time() ({systime __stime = _rtw_get_current_time(); __stime;}) -+#define rtw_systime_to_ms(stime) ({u32 __ms = _rtw_systime_to_ms(stime); typecheck(systime, stime); __ms;}) -+#define rtw_ms_to_systime(ms) ({systime __stime = _rtw_ms_to_systime(ms); __stime;}) -+#define rtw_us_to_systime(us) ({systime __stime = _rtw_us_to_systime(us); __stime;}) -+#define rtw_get_passing_time_ms(start) ({u32 __ms = _rtw_get_passing_time_ms(start); typecheck(systime, start); __ms;}) -+#define rtw_get_remaining_time_ms(end) ({u32 __ms = _rtw_get_remaining_time_ms(end); typecheck(systime, end); __ms;}) -+#define rtw_get_time_interval_ms(start, end) ({u32 __ms = _rtw_get_time_interval_ms(start, end); typecheck(systime, start); typecheck(systime, end); __ms;}) -+#define rtw_time_after(a,b) ({bool __r = _rtw_time_after(a,b); typecheck(systime, a); typecheck(systime, b); __r;}) -+#define rtw_time_before(a,b) ({bool __r = _rtw_time_after(b, a); typecheck(systime, a); typecheck(systime, b); __r;}) -+#else -+#define rtw_get_current_time() _rtw_get_current_time() -+#define rtw_systime_to_ms(stime) _rtw_systime_to_ms(stime) -+#define rtw_ms_to_systime(ms) _rtw_ms_to_systime(ms) -+#define rtw_us_to_systime(us) _rtw_us_to_systime(us) -+#define rtw_get_passing_time_ms(start) _rtw_get_passing_time_ms(start) -+#define rtw_get_remaining_time_ms(end) _rtw_get_remaining_time_ms(end) -+#define rtw_get_time_interval_ms(start, end) _rtw_get_time_interval_ms(start, end) -+#define rtw_time_after(a,b) _rtw_time_after(a,b) -+#define rtw_time_before(a,b) _rtw_time_after(b,a) -+#endif -+ -+sysptime rtw_sptime_get(void); -+sysptime rtw_sptime_set(s64 secs, const u32 nsecs); -+sysptime rtw_sptime_zero(void); -+ -+int rtw_sptime_cmp(const sysptime cmp1, const sysptime cmp2); -+bool rtw_sptime_eql(const sysptime cmp1, const sysptime cmp2); -+bool rtw_sptime_is_zero(const sysptime sptime); -+sysptime rtw_sptime_sub(const sysptime lhs, const sysptime rhs); -+sysptime rtw_sptime_add(const sysptime lhs, const sysptime rhs); -+ -+s64 rtw_sptime_to_ms(const sysptime sptime); -+sysptime rtw_ms_to_sptime(u64 ms); -+s64 rtw_sptime_to_us(const sysptime sptime); -+sysptime rtw_us_to_sptime(u64 us); -+s64 rtw_sptime_to_ns(const sysptime sptime); -+sysptime rtw_ns_to_sptime(u64 ns); -+ -+s64 rtw_sptime_diff_ms(const sysptime start, const sysptime end); -+s64 rtw_sptime_pass_ms(const sysptime start); -+s64 rtw_sptime_diff_us(const sysptime start, const sysptime end); -+s64 rtw_sptime_pass_us(const sysptime start); -+s64 rtw_sptime_diff_ns(const sysptime start, const sysptime end); -+s64 rtw_sptime_pass_ns(const sysptime start); -+ -+extern void rtw_sleep_schedulable(int ms); -+ -+extern void rtw_msleep_os(int ms); -+extern void rtw_usleep_os(int us); -+ -+extern u32 rtw_atoi(u8 *s); -+ -+#ifdef DBG_DELAY_OS -+#define rtw_mdelay_os(ms) _rtw_mdelay_os((ms), __FUNCTION__, __LINE__) -+#define rtw_udelay_os(ms) _rtw_udelay_os((ms), __FUNCTION__, __LINE__) -+extern void _rtw_mdelay_os(int ms, const char *func, const int line); -+extern void _rtw_udelay_os(int us, const char *func, const int line); -+#else -+extern void rtw_mdelay_os(int ms); -+extern void rtw_udelay_os(int us); -+#endif -+ -+extern void rtw_yield_os(void); -+ -+enum rtw_pwait_type { -+ RTW_PWAIT_TYPE_MSLEEP, -+ RTW_PWAIT_TYPE_USLEEP, -+ RTW_PWAIT_TYPE_YIELD, -+ RTW_PWAIT_TYPE_MDELAY, -+ RTW_PWAIT_TYPE_UDELAY, -+ -+ RTW_PWAIT_TYPE_NUM, -+}; -+ -+#define RTW_PWAIT_TYPE_VALID(type) (type < RTW_PWAIT_TYPE_NUM) -+ -+struct rtw_pwait_conf { -+ enum rtw_pwait_type type; -+ s32 wait_time; -+ s32 wait_cnt_lmt; -+}; -+ -+struct rtw_pwait_ctx { -+ struct rtw_pwait_conf conf; -+ s32 wait_cnt; -+ void (*wait_hdl)(int us); -+}; -+ -+extern const char *_rtw_pwait_type_str[]; -+#define rtw_pwait_type_str(type) (RTW_PWAIT_TYPE_VALID(type) ? _rtw_pwait_type_str[type] : _rtw_pwait_type_str[RTW_PWAIT_TYPE_NUM]) -+ -+#define rtw_pwctx_reset(pwctx) (pwctx)->wait_cnt = 0 -+#define rtw_pwctx_wait(pwctx) do { (pwctx)->wait_hdl((pwctx)->conf.wait_time); (pwctx)->wait_cnt++; } while(0) -+#define rtw_pwctx_waited(pwctx) ((pwctx)->wait_cnt) -+#define rtw_pwctx_exceed(pwctx) ((pwctx)->conf.wait_cnt_lmt >= 0 && (pwctx)->wait_cnt >= (pwctx)->conf.wait_cnt_lmt) -+ -+int rtw_pwctx_config(struct rtw_pwait_ctx *pwctx, enum rtw_pwait_type type, s32 time, s32 cnt_lmt); -+ -+extern void rtw_init_timer(_timer *ptimer, void *padapter, void *pfunc, void *ctx); -+ -+ -+__inline static unsigned char _cancel_timer_ex(_timer *ptimer) -+{ -+ u8 bcancelled; -+ -+ _cancel_timer(ptimer, &bcancelled); -+ -+ return bcancelled; -+} -+ -+static __inline void thread_enter(char *name) -+{ -+#ifdef PLATFORM_LINUX -+ allow_signal(SIGTERM); -+#endif -+#ifdef PLATFORM_FREEBSD -+ printf("%s", "RTKTHREAD_enter"); -+#endif -+} -+void thread_exit(_completion *comp); -+void _rtw_init_completion(_completion *comp); -+void _rtw_wait_for_comp_timeout(_completion *comp); -+void _rtw_wait_for_comp(_completion *comp); -+ -+static inline bool rtw_thread_stop(_thread_hdl_ th) -+{ -+#ifdef PLATFORM_LINUX -+ return kthread_stop(th); -+#endif -+} -+static inline void rtw_thread_wait_stop(void) -+{ -+#ifdef PLATFORM_LINUX -+ #if 0 -+ while (!kthread_should_stop()) -+ rtw_msleep_os(10); -+ #else -+ set_current_state(TASK_INTERRUPTIBLE); -+ while (!kthread_should_stop()) { -+ schedule(); -+ set_current_state(TASK_INTERRUPTIBLE); -+ } -+ __set_current_state(TASK_RUNNING); -+ #endif -+#endif -+} -+ -+__inline static void flush_signals_thread(void) -+{ -+#ifdef PLATFORM_LINUX -+ if (signal_pending(current)) -+ flush_signals(current); -+#endif -+} -+ -+__inline static _OS_STATUS res_to_status(sint res) -+{ -+ -+#if defined(PLATFORM_LINUX) || defined (PLATFORM_MPIXEL) || defined (PLATFORM_FREEBSD) -+ return res; -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ -+ if (res == _SUCCESS) -+ return NDIS_STATUS_SUCCESS; -+ else -+ return NDIS_STATUS_FAILURE; -+ -+#endif -+ -+} -+ -+__inline static void rtw_dump_stack(void) -+{ -+#ifdef PLATFORM_LINUX -+ dump_stack(); -+#endif -+} -+ -+#ifdef PLATFORM_LINUX -+#define rtw_warn_on(condition) WARN_ON(condition) -+#else -+#define rtw_warn_on(condition) do {} while (0) -+#endif -+ -+__inline static int rtw_bug_check(void *parg1, void *parg2, void *parg3, void *parg4) -+{ -+ int ret = _TRUE; -+ -+#ifdef PLATFORM_WINDOWS -+ if (((uint)parg1) <= 0x7fffffff || -+ ((uint)parg2) <= 0x7fffffff || -+ ((uint)parg3) <= 0x7fffffff || -+ ((uint)parg4) <= 0x7fffffff) { -+ ret = _FALSE; -+ KeBugCheckEx(0x87110000, (ULONG_PTR)parg1, (ULONG_PTR)parg2, (ULONG_PTR)parg3, (ULONG_PTR)parg4); -+ } -+#endif -+ -+ return ret; -+ -+} -+#ifdef PLATFORM_LINUX -+#define RTW_DIV_ROUND_UP(n, d) DIV_ROUND_UP(n, d) -+#else /* !PLATFORM_LINUX */ -+#define RTW_DIV_ROUND_UP(n, d) (((n) + (d - 1)) / d) -+#endif /* !PLATFORM_LINUX */ -+ -+#define _RND(sz, r) ((((sz)+((r)-1))/(r))*(r)) -+#define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0 : 1)) << 2) -+ -+__inline static u32 _RND4(u32 sz) -+{ -+ -+ u32 val; -+ -+ val = ((sz >> 2) + ((sz & 3) ? 1 : 0)) << 2; -+ -+ return val; -+ -+} -+ -+__inline static u32 _RND8(u32 sz) -+{ -+ -+ u32 val; -+ -+ val = ((sz >> 3) + ((sz & 7) ? 1 : 0)) << 3; -+ -+ return val; -+ -+} -+ -+__inline static u32 _RND128(u32 sz) -+{ -+ -+ u32 val; -+ -+ val = ((sz >> 7) + ((sz & 127) ? 1 : 0)) << 7; -+ -+ return val; -+ -+} -+ -+__inline static u32 _RND256(u32 sz) -+{ -+ -+ u32 val; -+ -+ val = ((sz >> 8) + ((sz & 255) ? 1 : 0)) << 8; -+ -+ return val; -+ -+} -+ -+__inline static u32 _RND512(u32 sz) -+{ -+ -+ u32 val; -+ -+ val = ((sz >> 9) + ((sz & 511) ? 1 : 0)) << 9; -+ -+ return val; -+ -+} -+ -+__inline static u32 bitshift(u32 bitmask) -+{ -+ u32 i; -+ -+ for (i = 0; i <= 31; i++) -+ if (((bitmask >> i) & 0x1) == 1) -+ break; -+ -+ return i; -+} -+ -+static inline int largest_bit(u32 bitmask) -+{ -+ int i; -+ -+ for (i = 31; i >= 0; i--) -+ if (bitmask & BIT(i)) -+ break; -+ -+ return i; -+} -+ -+static inline int largest_bit_64(u64 bitmask) -+{ -+ int i; -+ -+ for (i = 63; i >= 0; i--) -+ if (bitmask & BIT_ULL(i)) -+ break; -+ -+ return i; -+} -+ -+#define rtw_abs(a) (a < 0 ? -a : a) -+#define rtw_min(a, b) ((a > b) ? b : a) -+#define rtw_max(a, b) ((a > b) ? a : b) -+#define rtw_is_range_a_in_b(hi_a, lo_a, hi_b, lo_b) (((hi_a) <= (hi_b)) && ((lo_a) >= (lo_b))) -+#define rtw_is_range_overlap(hi_a, lo_a, hi_b, lo_b) (((hi_a) > (lo_b)) && ((lo_a) < (hi_b))) -+ -+#ifndef MAC_FMT -+#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" -+#endif -+#ifndef MAC_ARG -+#define MAC_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5] -+#endif -+ -+bool rtw_macaddr_is_larger(const u8 *a, const u8 *b); -+ -+extern void rtw_suspend_lock_init(void); -+extern void rtw_suspend_lock_uninit(void); -+extern void rtw_lock_suspend(void); -+extern void rtw_unlock_suspend(void); -+extern void rtw_lock_suspend_timeout(u32 timeout_ms); -+extern void rtw_lock_traffic_suspend_timeout(u32 timeout_ms); -+extern void rtw_resume_lock_suspend(void); -+extern void rtw_resume_unlock_suspend(void); -+#ifdef CONFIG_AP_WOWLAN -+extern void rtw_softap_lock_suspend(void); -+extern void rtw_softap_unlock_suspend(void); -+#endif -+ -+extern void rtw_set_bit(int nr, unsigned long *addr); -+extern void rtw_clear_bit(int nr, unsigned long *addr); -+extern int rtw_test_and_clear_bit(int nr, unsigned long *addr); -+ -+extern void ATOMIC_SET(ATOMIC_T *v, int i); -+extern int ATOMIC_READ(ATOMIC_T *v); -+extern void ATOMIC_ADD(ATOMIC_T *v, int i); -+extern void ATOMIC_SUB(ATOMIC_T *v, int i); -+extern void ATOMIC_INC(ATOMIC_T *v); -+extern void ATOMIC_DEC(ATOMIC_T *v); -+extern int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i); -+extern int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i); -+extern int ATOMIC_INC_RETURN(ATOMIC_T *v); -+extern int ATOMIC_DEC_RETURN(ATOMIC_T *v); -+extern bool ATOMIC_INC_UNLESS(ATOMIC_T *v, int u); -+ -+/* File operation APIs, just for linux now */ -+extern int rtw_is_dir_readable(const char *path); -+extern int rtw_is_file_readable(const char *path); -+extern int rtw_is_file_readable_with_size(const char *path, u32 *sz); -+extern int rtw_readable_file_sz_chk(const char *path, u32 sz); -+extern int rtw_retrieve_from_file(const char *path, u8 *buf, u32 sz); -+extern int rtw_store_to_file(const char *path, u8 *buf, u32 sz); -+ -+ -+#ifndef PLATFORM_FREEBSD -+extern void rtw_free_netdev(struct net_device *netdev); -+#endif /* PLATFORM_FREEBSD */ -+ -+ -+extern u64 rtw_modular64(u64 x, u64 y); -+extern u64 rtw_division64(u64 x, u64 y); -+extern u32 rtw_random32(void); -+ -+/* Macros for handling unaligned memory accesses */ -+ -+#define RTW_GET_BE16(a) ((u16) (((a)[0] << 8) | (a)[1])) -+#define RTW_PUT_BE16(a, val) \ -+ do { \ -+ (a)[0] = ((u16) (val)) >> 8; \ -+ (a)[1] = ((u16) (val)) & 0xff; \ -+ } while (0) -+ -+#define RTW_GET_LE16(a) ((u16) (((a)[1] << 8) | (a)[0])) -+#define RTW_PUT_LE16(a, val) \ -+ do { \ -+ (a)[1] = ((u16) (val)) >> 8; \ -+ (a)[0] = ((u16) (val)) & 0xff; \ -+ } while (0) -+ -+#define RTW_GET_BE24(a) ((((u32) (a)[0]) << 16) | (((u32) (a)[1]) << 8) | \ -+ ((u32) (a)[2])) -+#define RTW_PUT_BE24(a, val) \ -+ do { \ -+ (a)[0] = (u8) ((((u32) (val)) >> 16) & 0xff); \ -+ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ -+ (a)[2] = (u8) (((u32) (val)) & 0xff); \ -+ } while (0) -+ -+#define RTW_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \ -+ (((u32) (a)[2]) << 8) | ((u32) (a)[3])) -+#define RTW_PUT_BE32(a, val) \ -+ do { \ -+ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ -+ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ -+ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ -+ (a)[3] = (u8) (((u32) (val)) & 0xff); \ -+ } while (0) -+ -+#define RTW_GET_LE32(a) ((((u32) (a)[3]) << 24) | (((u32) (a)[2]) << 16) | \ -+ (((u32) (a)[1]) << 8) | ((u32) (a)[0])) -+#define RTW_PUT_LE32(a, val) \ -+ do { \ -+ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ -+ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ -+ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ -+ (a)[0] = (u8) (((u32) (val)) & 0xff); \ -+ } while (0) -+ -+#define RTW_GET_BE64(a) ((((u64) (a)[0]) << 56) | (((u64) (a)[1]) << 48) | \ -+ (((u64) (a)[2]) << 40) | (((u64) (a)[3]) << 32) | \ -+ (((u64) (a)[4]) << 24) | (((u64) (a)[5]) << 16) | \ -+ (((u64) (a)[6]) << 8) | ((u64) (a)[7])) -+#define RTW_PUT_BE64(a, val) \ -+ do { \ -+ (a)[0] = (u8) (((u64) (val)) >> 56); \ -+ (a)[1] = (u8) (((u64) (val)) >> 48); \ -+ (a)[2] = (u8) (((u64) (val)) >> 40); \ -+ (a)[3] = (u8) (((u64) (val)) >> 32); \ -+ (a)[4] = (u8) (((u64) (val)) >> 24); \ -+ (a)[5] = (u8) (((u64) (val)) >> 16); \ -+ (a)[6] = (u8) (((u64) (val)) >> 8); \ -+ (a)[7] = (u8) (((u64) (val)) & 0xff); \ -+ } while (0) -+ -+#define RTW_GET_LE64(a) ((((u64) (a)[7]) << 56) | (((u64) (a)[6]) << 48) | \ -+ (((u64) (a)[5]) << 40) | (((u64) (a)[4]) << 32) | \ -+ (((u64) (a)[3]) << 24) | (((u64) (a)[2]) << 16) | \ -+ (((u64) (a)[1]) << 8) | ((u64) (a)[0])) -+#define RTW_PUT_LE64(a, val) \ -+ do { \ -+ (a)[7] = (u8) ((((u64) (val)) >> 56) & 0xff); \ -+ (a)[6] = (u8) ((((u64) (val)) >> 48) & 0xff); \ -+ (a)[5] = (u8) ((((u64) (val)) >> 40) & 0xff); \ -+ (a)[4] = (u8) ((((u64) (val)) >> 32) & 0xff); \ -+ (a)[3] = (u8) ((((u64) (val)) >> 24) & 0xff); \ -+ (a)[2] = (u8) ((((u64) (val)) >> 16) & 0xff); \ -+ (a)[1] = (u8) ((((u64) (val)) >> 8) & 0xff); \ -+ (a)[0] = (u8) (((u64) (val)) & 0xff); \ -+ } while (0) -+ -+void rtw_buf_free(u8 **buf, u32 *buf_len); -+void rtw_buf_update(u8 **buf, u32 *buf_len, u8 *src, u32 src_len); -+ -+struct rtw_cbuf { -+ u32 write; -+ u32 read; -+ u32 size; -+ void *bufs[0]; -+}; -+ -+bool rtw_cbuf_full(struct rtw_cbuf *cbuf); -+bool rtw_cbuf_empty(struct rtw_cbuf *cbuf); -+bool rtw_cbuf_push(struct rtw_cbuf *cbuf, void *buf); -+void *rtw_cbuf_pop(struct rtw_cbuf *cbuf); -+struct rtw_cbuf *rtw_cbuf_alloc(u32 size); -+void rtw_cbuf_free(struct rtw_cbuf *cbuf); -+ -+struct map_seg_t { -+ u16 sa; -+ u16 len; -+ u8 *c; -+}; -+ -+struct map_t { -+ u16 len; -+ u16 seg_num; -+ u8 init_value; -+ struct map_seg_t *segs; -+}; -+ -+#define MAPSEG_ARRAY_ENT(_sa, _len, _c, arg...) \ -+ { .sa = _sa, .len = _len, .c = (u8[_len]){ _c, ##arg}, } -+ -+#define MAPSEG_PTR_ENT(_sa, _len, _p) \ -+ { .sa = _sa, .len = _len, .c = _p, } -+ -+#define MAP_ENT(_len, _seg_num, _init_v, _seg, arg...) \ -+ { .len = _len, .seg_num = _seg_num, .init_value = _init_v, .segs = (struct map_seg_t[_seg_num]){ _seg, ##arg}, } -+ -+int map_readN(const struct map_t *map, u16 offset, u16 len, u8 *buf); -+u8 map_read8(const struct map_t *map, u16 offset); -+ -+struct blacklist_ent { -+ _list list; -+ u8 addr[ETH_ALEN]; -+ systime exp_time; -+}; -+ -+#ifdef CONFIG_RTW_MESH -+int rtw_blacklist_add(_queue *blist, const u8 *addr, u32 timeout_ms); -+int rtw_blacklist_del(_queue *blist, const u8 *addr); -+int rtw_blacklist_search(_queue *blist, const u8 *addr); -+void rtw_blacklist_flush(_queue *blist); -+void dump_blacklist(void *sel, _queue *blist, const char *title); -+#endif -+ -+/* String handler */ -+ -+BOOLEAN is_null(char c); -+BOOLEAN is_all_null(char *c, int len); -+BOOLEAN is_eol(char c); -+BOOLEAN is_space(char c); -+BOOLEAN IsHexDigit(char chTmp); -+BOOLEAN is_alpha(char chTmp); -+char alpha_to_upper(char c); -+ -+int hex2num_i(char c); -+int hex2byte_i(const char *hex); -+int hexstr2bin(const char *hex, u8 *buf, size_t len); -+ -+int hwaddr_aton_i(const char *txt, u8 *addr); -+ -+/* -+ * Write formatted output to sized buffer -+ */ -+#ifdef PLATFORM_LINUX -+#define rtw_sprintf(buf, size, format, arg...) snprintf(buf, size, format, ##arg) -+#else /* !PLATFORM_LINUX */ -+#error "NOT DEFINE \"rtw_sprintf\"!!" -+#endif /* !PLATFORM_LINUX */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/osdep_service_bsd.h b/drivers/staging/rtl8723cs/include/osdep_service_bsd.h -new file mode 100644 -index 000000000000..f8f15d6fd2f9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/osdep_service_bsd.h -@@ -0,0 +1,757 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __OSDEP_BSD_SERVICE_H_ -+#define __OSDEP_BSD_SERVICE_H_ -+ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include "usbdevs.h" -+ -+#define USB_DEBUG_VAR rum_debug -+#include -+ -+#if 1 //Baron porting from linux, it's all temp solution, needs to check again -+#include -+#include /* XXX for PCPU_GET */ -+// typedef struct semaphore _sema; -+ typedef struct sema _sema; -+// typedef spinlock_t _lock; -+ typedef struct mtx _lock; -+ typedef struct mtx _mutex; -+ typedef struct rtw_timer_list _timer; -+ struct list_head { -+ struct list_head *next, *prev; -+ }; -+ struct __queue { -+ struct list_head queue; -+ _lock lock; -+ }; -+ -+ typedef struct mbuf _pkt; -+ typedef struct mbuf _buffer; -+ -+ typedef struct __queue _queue; -+ typedef struct list_head _list; -+ typedef int _OS_STATUS; -+ //typedef u32 _irqL; -+ typedef unsigned long _irqL; -+ typedef struct ifnet * _nic_hdl; -+ -+ typedef pid_t _thread_hdl_; -+// typedef struct thread _thread_hdl_; -+ typedef void thread_return; -+ typedef void* thread_context; -+ -+ typedef void timer_hdl_return; -+ typedef void* timer_hdl_context; -+ typedef struct work_struct _workitem; -+ typedef struct task _tasklet; -+ -+#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) -+/* emulate a modern version */ -+#define LINUX_VERSION_CODE KERNEL_VERSION(2, 6, 35) -+ -+#define WIRELESS_EXT -1 -+#define HZ hz -+#define spin_lock_irqsave mtx_lock_irqsave -+#define spin_lock_bh mtx_lock_irqsave -+#define mtx_lock_irqsave(lock, x) mtx_lock(lock)//{local_irq_save((x)); mtx_lock_spin((lock));} -+//#define IFT_RTW 0xf9 //ifnet allocate type for RTW -+#define free_netdev if_free -+#define LIST_CONTAINOR(ptr, type, member) \ -+ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) -+#define container_of(p,t,n) (t*)((p)-&(((t*)0)->n)) -+/* -+ * Linux timers are emulated using FreeBSD callout functions -+ * (and taskqueue functionality). -+ * -+ * Currently no timer stats functionality. -+ * -+ * See (linux_compat) processes.c -+ * -+ */ -+struct rtw_timer_list { -+ struct callout callout; -+ void (*function)(void *); -+ void *arg; -+}; -+ -+struct workqueue_struct; -+struct work_struct; -+typedef void (*work_func_t)(struct work_struct *work); -+/* Values for the state of an item of work (work_struct) */ -+typedef enum work_state { -+ WORK_STATE_UNSET = 0, -+ WORK_STATE_CALLOUT_PENDING = 1, -+ WORK_STATE_TASK_PENDING = 2, -+ WORK_STATE_WORK_CANCELLED = 3 -+} work_state_t; -+ -+struct work_struct { -+ struct task task; /* FreeBSD task */ -+ work_state_t state; /* the pending or otherwise state of work. */ -+ work_func_t func; -+}; -+#define spin_unlock_irqrestore mtx_unlock_irqrestore -+#define spin_unlock_bh mtx_unlock_irqrestore -+#define mtx_unlock_irqrestore(lock,x) mtx_unlock(lock); -+extern void _rtw_spinlock_init(_lock *plock); -+ -+//modify private structure to match freebsd -+#define BITS_PER_LONG 32 -+union ktime { -+ s64 tv64; -+#if BITS_PER_LONG != 64 && !defined(CONFIG_KTIME_SCALAR) -+ struct { -+#ifdef __BIG_ENDIAN -+ s32 sec, nsec; -+#else -+ s32 nsec, sec; -+#endif -+ } tv; -+#endif -+}; -+#define kmemcheck_bitfield_begin(name) -+#define kmemcheck_bitfield_end(name) -+#define CHECKSUM_NONE 0 -+typedef unsigned char *sk_buff_data_t; -+typedef union ktime ktime_t; /* Kill this */ -+ -+void rtw_mtx_lock(_lock *plock); -+ -+void rtw_mtx_unlock(_lock *plock); -+ -+/** -+ * struct sk_buff - socket buffer -+ * @next: Next buffer in list -+ * @prev: Previous buffer in list -+ * @sk: Socket we are owned by -+ * @tstamp: Time we arrived -+ * @dev: Device we arrived on/are leaving by -+ * @transport_header: Transport layer header -+ * @network_header: Network layer header -+ * @mac_header: Link layer header -+ * @_skb_refdst: destination entry (with norefcount bit) -+ * @sp: the security path, used for xfrm -+ * @cb: Control buffer. Free for use by every layer. Put private vars here -+ * @len: Length of actual data -+ * @data_len: Data length -+ * @mac_len: Length of link layer header -+ * @hdr_len: writable header length of cloned skb -+ * @csum: Checksum (must include start/offset pair) -+ * @csum_start: Offset from skb->head where checksumming should start -+ * @csum_offset: Offset from csum_start where checksum should be stored -+ * @local_df: allow local fragmentation -+ * @cloned: Head may be cloned (check refcnt to be sure) -+ * @nohdr: Payload reference only, must not modify header -+ * @pkt_type: Packet class -+ * @fclone: skbuff clone status -+ * @ip_summed: Driver fed us an IP checksum -+ * @priority: Packet queueing priority -+ * @users: User count - see {datagram,tcp}.c -+ * @protocol: Packet protocol from driver -+ * @truesize: Buffer size -+ * @head: Head of buffer -+ * @data: Data head pointer -+ * @tail: Tail pointer -+ * @end: End pointer -+ * @destructor: Destruct function -+ * @mark: Generic packet mark -+ * @nfct: Associated connection, if any -+ * @ipvs_property: skbuff is owned by ipvs -+ * @peeked: this packet has been seen already, so stats have been -+ * done for it, don't do them again -+ * @nf_trace: netfilter packet trace flag -+ * @nfctinfo: Relationship of this skb to the connection -+ * @nfct_reasm: netfilter conntrack re-assembly pointer -+ * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c -+ * @skb_iif: ifindex of device we arrived on -+ * @rxhash: the packet hash computed on receive -+ * @queue_mapping: Queue mapping for multiqueue devices -+ * @tc_index: Traffic control index -+ * @tc_verd: traffic control verdict -+ * @ndisc_nodetype: router type (from link layer) -+ * @dma_cookie: a cookie to one of several possible DMA operations -+ * done by skb DMA functions -+ * @secmark: security marking -+ * @vlan_tci: vlan tag control information -+ */ -+ -+struct sk_buff { -+ /* These two members must be first. */ -+ struct sk_buff *next; -+ struct sk_buff *prev; -+ -+ ktime_t tstamp; -+ -+ struct sock *sk; -+ //struct net_device *dev; -+ struct ifnet *dev; -+ -+ /* -+ * This is the control buffer. It is free to use for every -+ * layer. Please put your private variables there. If you -+ * want to keep them across layers you have to do a skb_clone() -+ * first. This is owned by whoever has the skb queued ATM. -+ */ -+ char cb[48] __aligned(8); -+ -+ unsigned long _skb_refdst; -+#ifdef CONFIG_XFRM -+ struct sec_path *sp; -+#endif -+ unsigned int len, -+ data_len; -+ u16 mac_len, -+ hdr_len; -+ union { -+ u32 csum; -+ struct { -+ u16 csum_start; -+ u16 csum_offset; -+ }smbol2; -+ }smbol1; -+ u32 priority; -+ kmemcheck_bitfield_begin(flags1); -+ u8 local_df:1, -+ cloned:1, -+ ip_summed:2, -+ nohdr:1, -+ nfctinfo:3; -+ u8 pkt_type:3, -+ fclone:2, -+ ipvs_property:1, -+ peeked:1, -+ nf_trace:1; -+ kmemcheck_bitfield_end(flags1); -+ u16 protocol; -+ -+ void (*destructor)(struct sk_buff *skb); -+#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) -+ struct nf_conntrack *nfct; -+ struct sk_buff *nfct_reasm; -+#endif -+#ifdef CONFIG_BRIDGE_NETFILTER -+ struct nf_bridge_info *nf_bridge; -+#endif -+ -+ int skb_iif; -+#ifdef CONFIG_NET_SCHED -+ u16 tc_index; /* traffic control index */ -+#ifdef CONFIG_NET_CLS_ACT -+ u16 tc_verd; /* traffic control verdict */ -+#endif -+#endif -+ -+ u32 rxhash; -+ -+ kmemcheck_bitfield_begin(flags2); -+ u16 queue_mapping:16; -+#ifdef CONFIG_IPV6_NDISC_NODETYPE -+ u8 ndisc_nodetype:2, -+ deliver_no_wcard:1; -+#else -+ u8 deliver_no_wcard:1; -+#endif -+ kmemcheck_bitfield_end(flags2); -+ -+ /* 0/14 bit hole */ -+ -+#ifdef CONFIG_NET_DMA -+ dma_cookie_t dma_cookie; -+#endif -+#ifdef CONFIG_NETWORK_SECMARK -+ u32 secmark; -+#endif -+ union { -+ u32 mark; -+ u32 dropcount; -+ }symbol3; -+ -+ u16 vlan_tci; -+ -+ sk_buff_data_t transport_header; -+ sk_buff_data_t network_header; -+ sk_buff_data_t mac_header; -+ /* These elements must be at the end, see alloc_skb() for details. */ -+ sk_buff_data_t tail; -+ sk_buff_data_t end; -+ unsigned char *head, -+ *data; -+ unsigned int truesize; -+ atomic_t users; -+}; -+struct sk_buff_head { -+ /* These two members must be first. */ -+ struct sk_buff *next; -+ struct sk_buff *prev; -+ -+ u32 qlen; -+ _lock lock; -+}; -+#define skb_tail_pointer(skb) skb->tail -+static inline unsigned char *skb_put(struct sk_buff *skb, unsigned int len) -+{ -+ unsigned char *tmp = skb_tail_pointer(skb); -+ //SKB_LINEAR_ASSERT(skb); -+ skb->tail += len; -+ skb->len += len; -+ return tmp; -+} -+ -+static inline unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len) -+{ -+ skb->len -= len; -+ if(skb->len < skb->data_len) -+ printf("%s(),%d,error!\n",__FUNCTION__,__LINE__); -+ return skb->data += len; -+} -+static inline unsigned char *skb_pull(struct sk_buff *skb, unsigned int len) -+{ -+ #ifdef PLATFORM_FREEBSD -+ return __skb_pull(skb, len); -+ #else -+ return unlikely(len > skb->len) ? NULL : __skb_pull(skb, len); -+ #endif //PLATFORM_FREEBSD -+} -+static inline u32 skb_queue_len(const struct sk_buff_head *list_) -+{ -+ return list_->qlen; -+} -+static inline void __skb_insert(struct sk_buff *newsk, -+ struct sk_buff *prev, struct sk_buff *next, -+ struct sk_buff_head *list) -+{ -+ newsk->next = next; -+ newsk->prev = prev; -+ next->prev = prev->next = newsk; -+ list->qlen++; -+} -+static inline void __skb_queue_before(struct sk_buff_head *list, -+ struct sk_buff *next, -+ struct sk_buff *newsk) -+{ -+ __skb_insert(newsk, next->prev, next, list); -+} -+static inline void skb_queue_tail(struct sk_buff_head *list, -+ struct sk_buff *newsk) -+{ -+ mtx_lock(&list->lock); -+ __skb_queue_before(list, (struct sk_buff *)list, newsk); -+ mtx_unlock(&list->lock); -+} -+static inline struct sk_buff *skb_peek(struct sk_buff_head *list_) -+{ -+ struct sk_buff *list = ((struct sk_buff *)list_)->next; -+ if (list == (struct sk_buff *)list_) -+ list = NULL; -+ return list; -+} -+static inline void __skb_unlink(struct sk_buff *skb, struct sk_buff_head *list) -+{ -+ struct sk_buff *next, *prev; -+ -+ list->qlen--; -+ next = skb->next; -+ prev = skb->prev; -+ skb->next = skb->prev = NULL; -+ next->prev = prev; -+ prev->next = next; -+} -+ -+static inline struct sk_buff *skb_dequeue(struct sk_buff_head *list) -+{ -+ mtx_lock(&list->lock); -+ -+ struct sk_buff *skb = skb_peek(list); -+ if (skb) -+ __skb_unlink(skb, list); -+ -+ mtx_unlock(&list->lock); -+ -+ return skb; -+} -+static inline void skb_reserve(struct sk_buff *skb, int len) -+{ -+ skb->data += len; -+ skb->tail += len; -+} -+static inline void __skb_queue_head_init(struct sk_buff_head *list) -+{ -+ list->prev = list->next = (struct sk_buff *)list; -+ list->qlen = 0; -+} -+/* -+ * This function creates a split out lock class for each invocation; -+ * this is needed for now since a whole lot of users of the skb-queue -+ * infrastructure in drivers have different locking usage (in hardirq) -+ * than the networking core (in softirq only). In the long run either the -+ * network layer or drivers should need annotation to consolidate the -+ * main types of usage into 3 classes. -+ */ -+static inline void skb_queue_head_init(struct sk_buff_head *list) -+{ -+ _rtw_spinlock_init(&list->lock); -+ __skb_queue_head_init(list); -+} -+unsigned long copy_from_user(void *to, const void *from, unsigned long n); -+unsigned long copy_to_user(void *to, const void *from, unsigned long n); -+struct sk_buff * dev_alloc_skb(unsigned int size); -+struct sk_buff *skb_clone(const struct sk_buff *skb); -+void dev_kfree_skb_any(struct sk_buff *skb); -+#endif //Baron porting from linux, it's all temp solution, needs to check again -+ -+ -+#if 1 // kenny add Linux compatibility code for Linux USB driver -+#include -+ -+#define __init // __attribute ((constructor)) -+#define __exit // __attribute ((destructor)) -+ -+/* -+ * Definitions for module_init and module_exit macros. -+ * -+ * These macros will use the SYSINIT framework to call a specified -+ * function (with no arguments) on module loading or unloading. -+ * -+ */ -+ -+void module_init_exit_wrapper(void *arg); -+ -+#define module_init(initfn) \ -+ SYSINIT(mod_init_ ## initfn, \ -+ SI_SUB_KLD, SI_ORDER_FIRST, \ -+ module_init_exit_wrapper, initfn) -+ -+#define module_exit(exitfn) \ -+ SYSUNINIT(mod_exit_ ## exitfn, \ -+ SI_SUB_KLD, SI_ORDER_ANY, \ -+ module_init_exit_wrapper, exitfn) -+ -+/* -+ * The usb_register and usb_deregister functions are used to register -+ * usb drivers with the usb subsystem. -+ */ -+int usb_register(struct usb_driver *driver); -+int usb_deregister(struct usb_driver *driver); -+ -+/* -+ * usb_get_dev and usb_put_dev - increment/decrement the reference count -+ * of the usb device structure. -+ * -+ * Original body of usb_get_dev: -+ * -+ * if (dev) -+ * get_device(&dev->dev); -+ * return dev; -+ * -+ * Reference counts are not currently used in this compatibility -+ * layer. So these functions will do nothing. -+ */ -+static inline struct usb_device * -+usb_get_dev(struct usb_device *dev) -+{ -+ return dev; -+} -+ -+static inline void -+usb_put_dev(struct usb_device *dev) -+{ -+ return; -+} -+ -+ -+// rtw_usb_compat_linux -+int rtw_usb_submit_urb(struct urb *urb, uint16_t mem_flags); -+int rtw_usb_unlink_urb(struct urb *urb); -+int rtw_usb_clear_halt(struct usb_device *dev, struct usb_host_endpoint *uhe); -+int rtw_usb_control_msg(struct usb_device *dev, struct usb_host_endpoint *uhe, -+ uint8_t request, uint8_t requesttype, -+ uint16_t value, uint16_t index, void *data, -+ uint16_t size, usb_timeout_t timeout); -+int rtw_usb_set_interface(struct usb_device *dev, uint8_t iface_no, uint8_t alt_index); -+int rtw_usb_setup_endpoint(struct usb_device *dev, -+ struct usb_host_endpoint *uhe, usb_size_t bufsize); -+struct urb *rtw_usb_alloc_urb(uint16_t iso_packets, uint16_t mem_flags); -+struct usb_host_endpoint *rtw_usb_find_host_endpoint(struct usb_device *dev, uint8_t type, uint8_t ep); -+struct usb_host_interface *rtw_usb_altnum_to_altsetting(const struct usb_interface *intf, uint8_t alt_index); -+struct usb_interface *rtw_usb_ifnum_to_if(struct usb_device *dev, uint8_t iface_no); -+void *rtw_usbd_get_intfdata(struct usb_interface *intf); -+void rtw_usb_linux_register(void *arg); -+void rtw_usb_linux_deregister(void *arg); -+void rtw_usb_linux_free_device(struct usb_device *dev); -+void rtw_usb_free_urb(struct urb *urb); -+void rtw_usb_init_urb(struct urb *urb); -+void rtw_usb_kill_urb(struct urb *urb); -+void rtw_usb_set_intfdata(struct usb_interface *intf, void *data); -+void rtw_usb_fill_bulk_urb(struct urb *urb, struct usb_device *udev, -+ struct usb_host_endpoint *uhe, void *buf, -+ int length, usb_complete_t callback, void *arg); -+int rtw_usb_bulk_msg(struct usb_device *udev, struct usb_host_endpoint *uhe, -+ void *data, int len, uint16_t *pactlen, usb_timeout_t timeout); -+void *usb_get_intfdata(struct usb_interface *intf); -+int usb_linux_init_endpoints(struct usb_device *udev); -+ -+ -+ -+typedef struct urb * PURB; -+ -+typedef unsigned gfp_t; -+#define __GFP_WAIT ((gfp_t)0x10u) /* Can wait and reschedule? */ -+#define __GFP_HIGH ((gfp_t)0x20u) /* Should access emergency pools? */ -+#define __GFP_IO ((gfp_t)0x40u) /* Can start physical IO? */ -+#define __GFP_FS ((gfp_t)0x80u) /* Can call down to low-level FS? */ -+#define __GFP_COLD ((gfp_t)0x100u) /* Cache-cold page required */ -+#define __GFP_NOWARN ((gfp_t)0x200u) /* Suppress page allocation failure warning */ -+#define __GFP_REPEAT ((gfp_t)0x400u) /* Retry the allocation. Might fail */ -+#define __GFP_NOFAIL ((gfp_t)0x800u) /* Retry for ever. Cannot fail */ -+#define __GFP_NORETRY ((gfp_t)0x1000u)/* Do not retry. Might fail */ -+#define __GFP_NO_GROW ((gfp_t)0x2000u)/* Slab internal usage */ -+#define __GFP_COMP ((gfp_t)0x4000u)/* Add compound page metadata */ -+#define __GFP_ZERO ((gfp_t)0x8000u)/* Return zeroed page on success */ -+#define __GFP_NOMEMALLOC ((gfp_t)0x10000u) /* Don't use emergency reserves */ -+#define __GFP_HARDWALL ((gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */ -+ -+/* This equals 0, but use constants in case they ever change */ -+#define GFP_NOWAIT (GFP_ATOMIC & ~__GFP_HIGH) -+/* GFP_ATOMIC means both !wait (__GFP_WAIT not set) and use emergency pool */ -+#define GFP_ATOMIC (__GFP_HIGH) -+#define GFP_NOIO (__GFP_WAIT) -+#define GFP_NOFS (__GFP_WAIT | __GFP_IO) -+#define GFP_KERNEL (__GFP_WAIT | __GFP_IO | __GFP_FS) -+#define GFP_USER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL) -+#define GFP_HIGHUSER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL | \ -+ __GFP_HIGHMEM) -+ -+ -+#endif // kenny add Linux compatibility code for Linux USB -+ -+__inline static _list *get_next(_list *list) -+{ -+ return list->next; -+} -+ -+__inline static _list *get_list_head(_queue *queue) -+{ -+ return (&(queue->queue)); -+} -+ -+ -+#define LIST_CONTAINOR(ptr, type, member) \ -+ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) -+ -+ -+__inline static void _enter_critical(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_irqsave(plock, *pirqL); -+} -+ -+__inline static void _exit_critical(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_irqrestore(plock, *pirqL); -+} -+ -+__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_irqsave(plock, *pirqL); -+} -+ -+__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_irqrestore(plock, *pirqL); -+} -+ -+__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_bh(plock, *pirqL); -+} -+ -+__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_bh(plock, *pirqL); -+} -+ -+__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+ -+ mtx_lock(pmutex); -+ -+} -+ -+ -+__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+ -+ mtx_unlock(pmutex); -+ -+} -+static inline void __list_del(struct list_head * prev, struct list_head * next) -+{ -+ next->prev = prev; -+ prev->next = next; -+} -+static inline void INIT_LIST_HEAD(struct list_head *list) -+{ -+ list->next = list; -+ list->prev = list; -+} -+__inline static void rtw_list_delete(_list *plist) -+{ -+ __list_del(plist->prev, plist->next); -+ INIT_LIST_HEAD(plist); -+} -+ -+static inline void timer_hdl(void *ctx) -+{ -+ _timer *timer = (_timer *)ctx; -+ -+ rtw_mtx_lock(NULL); -+ if (callout_pending(&timer->callout)) { -+ /* callout was reset */ -+ rtw_mtx_unlock(NULL); -+ return; -+ } -+ -+ if (!callout_active(&timer->callout)) { -+ /* callout was stopped */ -+ rtw_mtx_unlock(NULL); -+ return; -+ } -+ -+ callout_deactivate(&timer->callout); -+ -+ timer->function(timer->arg); -+ -+ rtw_mtx_unlock(NULL); -+} -+ -+static inline void _init_timer(_timer *ptimer, _nic_hdl padapter, void *pfunc, void *cntx) -+{ -+ ptimer->function = pfunc; -+ ptimer->arg = cntx; -+ callout_init(&ptimer->callout, CALLOUT_MPSAFE); -+} -+ -+__inline static void _set_timer(_timer *ptimer,u32 delay_time) -+{ -+ if (ptimer->function && ptimer->arg) { -+ rtw_mtx_lock(NULL); -+ callout_reset(&ptimer->callout, delay_time, timer_hdl, ptimer); -+ rtw_mtx_unlock(NULL); -+ } -+} -+ -+__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) -+{ -+ rtw_mtx_lock(NULL); -+ callout_drain(&ptimer->callout); -+ rtw_mtx_unlock(NULL); -+ *bcancelled = 1; /* assume an pending timer to be canceled */ -+} -+ -+__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) -+{ -+ printf("%s Not implement yet! \n",__FUNCTION__); -+} -+ -+__inline static void _set_workitem(_workitem *pwork) -+{ -+ printf("%s Not implement yet! \n",__FUNCTION__); -+// schedule_work(pwork); -+} -+ -+// -+// Global Mutex: can only be used at PASSIVE level. -+// -+ -+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+} -+ -+#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+} -+ -+#define ATOMIC_INIT(i) { (i) } -+ -+static __inline void thread_enter(char *name); -+ -+//Atomic integer operations -+typedef uint32_t ATOMIC_T ; -+ -+#define rtw_netdev_priv(netdev) (((struct ifnet *)netdev)->if_softc) -+ -+#define rtw_free_netdev(netdev) if_free((netdev)) -+ -+#define NDEV_FMT "%s" -+#define NDEV_ARG(ndev) "" -+#define ADPT_FMT "%s" -+#define ADPT_ARG(adapter) "" -+#define FUNC_NDEV_FMT "%s" -+#define FUNC_NDEV_ARG(ndev) __func__ -+#define FUNC_ADPT_FMT "%s" -+#define FUNC_ADPT_ARG(adapter) __func__ -+ -+#define STRUCT_PACKED -+ -+#endif -+ -diff --git a/drivers/staging/rtl8723cs/include/osdep_service_ce.h b/drivers/staging/rtl8723cs/include/osdep_service_ce.h -new file mode 100644 -index 000000000000..2bf65ef4741d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/osdep_service_ce.h -@@ -0,0 +1,200 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __OSDEP_CE_SERVICE_H_ -+#define __OSDEP_CE_SERVICE_H_ -+ -+ -+#include -+#include -+ -+#ifdef CONFIG_SDIO_HCI -+#include "SDCardDDK.h" -+#endif -+ -+#ifdef CONFIG_USB_HCI -+#include -+#endif -+ -+typedef HANDLE _sema; -+typedef LIST_ENTRY _list; -+typedef NDIS_STATUS _OS_STATUS; -+ -+typedef NDIS_SPIN_LOCK _lock; -+ -+typedef HANDLE _rwlock; //Mutex -+ -+typedef u32 _irqL; -+ -+typedef NDIS_HANDLE _nic_hdl; -+ -+struct rtw_timer_list { -+ NDIS_MINIPORT_TIMER ndis_timer; -+ void (*function)(void *); -+ void *arg; -+}; -+ -+struct __queue { -+ LIST_ENTRY queue; -+ _lock lock; -+}; -+ -+typedef NDIS_PACKET _pkt; -+typedef NDIS_BUFFER _buffer; -+typedef struct __queue _queue; -+ -+typedef HANDLE _thread_hdl_; -+typedef DWORD thread_return; -+typedef void* thread_context; -+typedef NDIS_WORK_ITEM _workitem; -+ -+ -+ -+#define SEMA_UPBND (0x7FFFFFFF) //8192 -+ -+__inline static _list *get_prev(_list *list) -+{ -+ return list->Blink; -+} -+ -+__inline static _list *get_next(_list *list) -+{ -+ return list->Flink; -+} -+ -+__inline static _list *get_list_head(_queue *queue) -+{ -+ return (&(queue->queue)); -+} -+ -+#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) -+ -+__inline static void _enter_critical(_lock *plock, _irqL *pirqL) -+{ -+ NdisAcquireSpinLock(plock); -+} -+ -+__inline static void _exit_critical(_lock *plock, _irqL *pirqL) -+{ -+ NdisReleaseSpinLock(plock); -+} -+ -+__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprAcquireSpinLock(plock); -+} -+ -+__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprReleaseSpinLock(plock); -+} -+ -+ -+__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) -+{ -+ WaitForSingleObject(*prwlock, INFINITE ); -+ -+} -+ -+__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) -+{ -+ ReleaseMutex(*prwlock); -+} -+ -+__inline static void rtw_list_delete(_list *plist) -+{ -+ RemoveEntryList(plist); -+ InitializeListHead(plist); -+} -+ -+static inline void timer_hdl( -+ IN PVOID SystemSpecific1, -+ IN PVOID FunctionContext, -+ IN PVOID SystemSpecific2, -+ IN PVOID SystemSpecific3) -+{ -+ _timer *timer = (_timer *)FunctionContext; -+ -+ timer->function(timer->arg); -+} -+ -+static inline void _init_timer(_timer *ptimer, _nic_hdl nic_hdl, void *pfunc, void *cntx) -+{ -+ ptimer->function = pfunc; -+ ptimer->arg = cntx; -+ NdisMInitializeTimer(&ptimer->ndis_timer, nic_hdl, timer_hdl, ptimer); -+} -+ -+static inline void _set_timer(_timer *ptimer, u32 delay_time) -+{ -+ NdisMSetTimer(ptimer, delay_time); -+} -+ -+static inline void _cancel_timer(_timer *ptimer, u8 *bcancelled) -+{ -+ NdisMCancelTimer(ptimer, bcancelled); -+} -+ -+__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) -+{ -+ -+ NdisInitializeWorkItem(pwork, pfunc, cntx); -+} -+ -+__inline static void _set_workitem(_workitem *pwork) -+{ -+ NdisScheduleWorkItem(pwork); -+} -+ -+#define ATOMIC_INIT(i) { (i) } -+ -+// -+// Global Mutex: can only be used at PASSIVE level. -+// -+ -+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ -+ { \ -+ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -+ NdisMSleep(10000); \ -+ } \ -+} -+ -+#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -+} -+ -+// limitation of path length -+#define PATH_LENGTH_MAX MAX_PATH -+ -+//Atomic integer operations -+#define ATOMIC_T LONG -+ -+#define NDEV_FMT "%s" -+#define NDEV_ARG(ndev) "" -+#define ADPT_FMT "%s" -+#define ADPT_ARG(adapter) "" -+#define FUNC_NDEV_FMT "%s" -+#define FUNC_NDEV_ARG(ndev) __func__ -+#define FUNC_ADPT_FMT "%s" -+#define FUNC_ADPT_ARG(adapter) __func__ -+ -+#define STRUCT_PACKED -+ -+ -+#endif -+ -diff --git a/drivers/staging/rtl8723cs/include/osdep_service_linux.h b/drivers/staging/rtl8723cs/include/osdep_service_linux.h -new file mode 100644 -index 000000000000..fca4cf6e714a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/osdep_service_linux.h -@@ -0,0 +1,564 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __OSDEP_LINUX_SERVICE_H_ -+#define __OSDEP_LINUX_SERVICE_H_ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 5)) -+ #include -+#endif -+/* #include */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)) -+ #include -+#else -+ #include -+#endif -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include /* for struct tasklet_struct */ -+#include -+#include -+#include -+#include -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) -+ #include -+#endif -+ -+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 5, 41)) -+ #include -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 7, 0)) -+ #include -+#else -+ #include -+#endif -+ -+#ifdef RTK_DMP_PLATFORM -+ #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 12)) -+ #include -+ #endif -+ #include -+#endif -+ -+#ifdef CONFIG_NET_RADIO -+ #define CONFIG_WIRELESS_EXT -+#endif -+ -+/* Monitor mode */ -+#include -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) -+ #include -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25) && \ -+ LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 29)) -+ #define CONFIG_IEEE80211_HT_ADDT_INFO -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ /* #include */ -+ #include -+#else -+ #ifdef CONFIG_REGD_SRC_FROM_OS -+ #error "CONFIG_REGD_SRC_FROM_OS requires CONFIG_IOCTL_CFG80211" -+ #endif -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ -+#ifdef CONFIG_HAS_EARLYSUSPEND -+ #include -+#endif /* CONFIG_HAS_EARLYSUSPEND */ -+ -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+ #include -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ #include -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 21)) -+ #include -+ #else -+ #include -+ #endif -+#endif -+ -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ #include -+ #include -+ #include -+ #include -+ #include -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ -+#ifdef CONFIG_USB_HCI -+ typedef struct urb *PURB; -+#endif -+ -+#if defined(CONFIG_RTW_GRO) && (!defined(CONFIG_RTW_NAPI)) -+ -+ #error "Enable NAPI before enable GRO\n" -+ -+#endif -+ -+ -+#if (KERNEL_VERSION(2, 6, 29) > LINUX_VERSION_CODE && defined(CONFIG_RTW_NAPI)) -+ -+ #undef CONFIG_RTW_NAPI -+ /*#warning "Linux Kernel version too old to support NAPI (should newer than 2.6.29)\n"*/ -+ -+#endif -+ -+#if (KERNEL_VERSION(2, 6, 33) > LINUX_VERSION_CODE && defined(CONFIG_RTW_GRO)) -+ -+ #undef CONFIG_RTW_GRO -+ /*#warning "Linux Kernel version too old to support GRO(should newer than 2.6.33)\n"*/ -+ -+#endif -+ -+typedef struct semaphore _sema; -+typedef spinlock_t _lock; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) -+ typedef struct mutex _mutex; -+#else -+ typedef struct semaphore _mutex; -+#endif -+struct rtw_timer_list { -+ struct timer_list timer; -+ void (*function)(void *); -+ void *arg; -+}; -+ -+typedef struct rtw_timer_list _timer; -+typedef struct completion _completion; -+ -+struct __queue { -+ struct list_head queue; -+ _lock lock; -+}; -+ -+typedef struct sk_buff _pkt; -+typedef unsigned char _buffer; -+ -+typedef struct __queue _queue; -+typedef struct list_head _list; -+ -+/* hlist */ -+typedef struct hlist_head rtw_hlist_head; -+typedef struct hlist_node rtw_hlist_node; -+ -+/* RCU */ -+typedef struct rcu_head rtw_rcu_head; -+#define rtw_rcu_dereference(p) rcu_dereference((p)) -+#define rtw_rcu_dereference_protected(p, c) rcu_dereference_protected(p, c) -+#define rtw_rcu_assign_pointer(p, v) rcu_assign_pointer((p), (v)) -+#define rtw_rcu_read_lock() rcu_read_lock() -+#define rtw_rcu_read_unlock() rcu_read_unlock() -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34)) -+#define rtw_rcu_access_pointer(p) rcu_access_pointer(p) -+#endif -+ -+/* rhashtable */ -+#include "../os_dep/linux/rtw_rhashtable.h" -+ -+typedef int _OS_STATUS; -+/* typedef u32 _irqL; */ -+typedef unsigned long _irqL; -+typedef struct net_device *_nic_hdl; -+ -+typedef void *_thread_hdl_; -+typedef int thread_return; -+typedef void *thread_context; -+ -+typedef void timer_hdl_return; -+typedef void *timer_hdl_context; -+ -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 41)) -+ typedef struct work_struct _workitem; -+#else -+ typedef struct tq_struct _workitem; -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) -+ #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) -+#endif -+ -+typedef unsigned long systime; -+typedef ktime_t sysptime; -+typedef struct tasklet_struct _tasklet; -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 22)) -+/* Porting from linux kernel, for compatible with old kernel. */ -+static inline unsigned char *skb_tail_pointer(const struct sk_buff *skb) -+{ -+ return skb->tail; -+} -+ -+static inline void skb_reset_tail_pointer(struct sk_buff *skb) -+{ -+ skb->tail = skb->data; -+} -+ -+static inline void skb_set_tail_pointer(struct sk_buff *skb, const int offset) -+{ -+ skb->tail = skb->data + offset; -+} -+ -+static inline unsigned char *skb_end_pointer(const struct sk_buff *skb) -+{ -+ return skb->end; -+} -+#endif -+ -+__inline static void rtw_list_delete(_list *plist) -+{ -+ list_del_init(plist); -+} -+ -+__inline static _list *get_next(_list *list) -+{ -+ return list->next; -+} -+ -+#define LIST_CONTAINOR(ptr, type, member) \ -+ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) -+ -+#define rtw_list_first_entry(ptr, type, member) list_first_entry(ptr, type, member) -+ -+#define rtw_hlist_for_each_entry(pos, head, member) hlist_for_each_entry(pos, head, member) -+#define rtw_hlist_for_each_safe(pos, n, head) hlist_for_each_safe(pos, n, head) -+#define rtw_hlist_entry(ptr, type, member) hlist_entry(ptr, type, member) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+#define rtw_hlist_for_each_entry_safe(pos, np, n, head, member) hlist_for_each_entry_safe(pos, n, head, member) -+#define rtw_hlist_for_each_entry_rcu(pos, node, head, member) hlist_for_each_entry_rcu(pos, head, member) -+#else -+#define rtw_hlist_for_each_entry_safe(pos, np, n, head, member) hlist_for_each_entry_safe(pos, np, n, head, member) -+#define rtw_hlist_for_each_entry_rcu(pos, node, head, member) hlist_for_each_entry_rcu(pos, node, head, member) -+#endif -+ -+__inline static void _enter_critical(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_irqsave(plock, *pirqL); -+} -+ -+__inline static void _exit_critical(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_irqrestore(plock, *pirqL); -+} -+ -+__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_irqsave(plock, *pirqL); -+} -+ -+__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_irqrestore(plock, *pirqL); -+} -+ -+__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ spin_lock_bh(plock); -+} -+ -+__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ spin_unlock_bh(plock); -+} -+ -+__inline static void enter_critical_bh(_lock *plock) -+{ -+ spin_lock_bh(plock); -+} -+ -+__inline static void exit_critical_bh(_lock *plock) -+{ -+ spin_unlock_bh(plock); -+} -+ -+__inline static int _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+ int ret = 0; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) -+ /* mutex_lock(pmutex); */ -+ ret = mutex_lock_interruptible(pmutex); -+#else -+ ret = down_interruptible(pmutex); -+#endif -+ return ret; -+} -+ -+ -+__inline static int _enter_critical_mutex_lock(_mutex *pmutex, _irqL *pirqL) -+{ -+ int ret = 0; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) -+ mutex_lock(pmutex); -+#else -+ down(pmutex); -+#endif -+ return ret; -+} -+ -+__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) -+ mutex_unlock(pmutex); -+#else -+ up(pmutex); -+#endif -+} -+ -+__inline static _list *get_list_head(_queue *queue) -+{ -+ return &(queue->queue); -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0)) -+static inline void timer_hdl(struct timer_list *in_timer) -+#else -+static inline void timer_hdl(unsigned long cntx) -+#endif -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0)) -+ _timer *ptimer = from_timer(ptimer, in_timer, timer); -+#else -+ _timer *ptimer = (_timer *)cntx; -+#endif -+ ptimer->function(ptimer->arg); -+} -+ -+__inline static void _init_timer(_timer *ptimer, _nic_hdl nic_hdl, void *pfunc, void *cntx) -+{ -+ ptimer->function = pfunc; -+ ptimer->arg = cntx; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0)) -+ timer_setup(&ptimer->timer, timer_hdl, 0); -+#else -+ /* setup_timer(ptimer, pfunc,(u32)cntx); */ -+ ptimer->timer.function = timer_hdl; -+ ptimer->timer.data = (unsigned long)ptimer; -+ init_timer(&ptimer->timer); -+#endif -+} -+ -+__inline static void _set_timer(_timer *ptimer, u32 delay_time) -+{ -+ mod_timer(&ptimer->timer , (jiffies + (delay_time * HZ / 1000))); -+} -+ -+__inline static void _cancel_timer(_timer *ptimer, u8 *bcancelled) -+{ -+ *bcancelled = del_timer_sync(&ptimer->timer) == 1 ? 1 : 0; -+} -+ -+__inline static void _cancel_timer_async(_timer *ptimer) -+{ -+ del_timer(&ptimer->timer); -+} -+ -+static inline void _init_workitem(_workitem *pwork, void *pfunc, void *cntx) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)) -+ INIT_WORK(pwork, pfunc); -+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 41)) -+ INIT_WORK(pwork, pfunc, pwork); -+#else -+ INIT_TQUEUE(pwork, pfunc, pwork); -+#endif -+} -+ -+__inline static void _set_workitem(_workitem *pwork) -+{ -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 41)) -+ schedule_work(pwork); -+#else -+ schedule_task(pwork); -+#endif -+} -+ -+__inline static void _cancel_workitem_sync(_workitem *pwork) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22)) -+ cancel_work_sync(pwork); -+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 41)) -+ flush_scheduled_work(); -+#else -+ flush_scheduled_tasks(); -+#endif -+} -+/* -+ * Global Mutex: can only be used at PASSIVE level. -+ * */ -+ -+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -+ { \ -+ while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1) { \ -+ atomic_dec((atomic_t *)&(_MutexCounter)); \ -+ msleep(10); \ -+ } \ -+ } -+ -+#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -+ { \ -+ atomic_dec((atomic_t *)&(_MutexCounter)); \ -+ } -+ -+static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ return (netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) && -+ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 1)) && -+ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 2)) && -+ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3))); -+#else -+ return netif_queue_stopped(pnetdev); -+#endif -+} -+ -+static inline void rtw_netif_wake_queue(struct net_device *pnetdev) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ netif_tx_wake_all_queues(pnetdev); -+#else -+ netif_wake_queue(pnetdev); -+#endif -+} -+ -+static inline void rtw_netif_start_queue(struct net_device *pnetdev) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ netif_tx_start_all_queues(pnetdev); -+#else -+ netif_start_queue(pnetdev); -+#endif -+} -+ -+static inline void rtw_netif_stop_queue(struct net_device *pnetdev) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ netif_tx_stop_all_queues(pnetdev); -+#else -+ netif_stop_queue(pnetdev); -+#endif -+} -+static inline void rtw_netif_device_attach(struct net_device *pnetdev) -+{ -+ netif_device_attach(pnetdev); -+} -+static inline void rtw_netif_device_detach(struct net_device *pnetdev) -+{ -+ netif_device_detach(pnetdev); -+} -+static inline void rtw_netif_carrier_on(struct net_device *pnetdev) -+{ -+ netif_carrier_on(pnetdev); -+} -+static inline void rtw_netif_carrier_off(struct net_device *pnetdev) -+{ -+ netif_carrier_off(pnetdev); -+} -+ -+static inline int rtw_merge_string(char *dst, int dst_len, const char *src1, const char *src2) -+{ -+ int len = 0; -+ len += snprintf(dst + len, dst_len - len, "%s", src1); -+ len += snprintf(dst + len, dst_len - len, "%s", src2); -+ -+ return len; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) -+ #define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)), (sig), 1) -+#else /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) */ -+ #define rtw_signal_process(pid, sig) kill_proc((pid), (sig), 1) -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) */ -+ -+ -+/* Suspend lock prevent system from going suspend */ -+#ifdef CONFIG_WAKELOCK -+ #include -+#elif defined(CONFIG_ANDROID_POWER) -+ #include -+#endif -+ -+/* limitation of path length */ -+#define PATH_LENGTH_MAX PATH_MAX -+ -+/* Atomic integer operations */ -+#define ATOMIC_T atomic_t -+ -+#define rtw_netdev_priv(netdev) (((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv) -+ -+#define NDEV_FMT "%s" -+#define NDEV_ARG(ndev) ndev->name -+#define ADPT_FMT "%s" -+#define ADPT_ARG(adapter) (adapter->pnetdev ? adapter->pnetdev->name : NULL) -+#define FUNC_NDEV_FMT "%s(%s)" -+#define FUNC_NDEV_ARG(ndev) __func__, ndev->name -+#define FUNC_ADPT_FMT "%s(%s)" -+#define FUNC_ADPT_ARG(adapter) __func__, (adapter->pnetdev ? adapter->pnetdev->name : NULL) -+ -+struct rtw_netdev_priv_indicator { -+ void *priv; -+ u32 sizeof_priv; -+}; -+struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv); -+extern struct net_device *rtw_alloc_etherdev(int sizeof_priv); -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) -+#define rtw_get_same_net_ndev_by_name(ndev, name) dev_get_by_name(name) -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)) -+#define rtw_get_same_net_ndev_by_name(ndev, name) dev_get_by_name(ndev->nd_net, name) -+#else -+#define rtw_get_same_net_ndev_by_name(ndev, name) dev_get_by_name(dev_net(ndev), name) -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) -+#define rtw_get_bridge_ndev_by_name(name) dev_get_by_name(name) -+#else -+#define rtw_get_bridge_ndev_by_name(name) dev_get_by_name(&init_net, name) -+#endif -+ -+#define STRUCT_PACKED __attribute__ ((packed)) -+ -+ -+#endif /* __OSDEP_LINUX_SERVICE_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/osdep_service_xp.h b/drivers/staging/rtl8723cs/include/osdep_service_xp.h -new file mode 100644 -index 000000000000..57e6f314e20d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/osdep_service_xp.h -@@ -0,0 +1,210 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __OSDEP_LINUX_SERVICE_H_ -+#define __OSDEP_LINUX_SERVICE_H_ -+ -+ #include -+ #include -+ #include -+ #include -+ -+#ifdef CONFIG_USB_HCI -+ #include -+ #include -+ #include -+#endif -+ -+ typedef KSEMAPHORE _sema; -+ typedef LIST_ENTRY _list; -+ typedef NDIS_STATUS _OS_STATUS; -+ -+ -+ typedef NDIS_SPIN_LOCK _lock; -+ -+ typedef KMUTEX _mutex; -+ -+ typedef KIRQL _irqL; -+ -+ // USB_PIPE for WINCE , but handle can be use just integer under windows -+ typedef NDIS_HANDLE _nic_hdl; -+ -+ struct rtw_timer_list { -+ NDIS_MINIPORT_TIMER ndis_timer; -+ void (*function)(void *); -+ void *arg; -+ }; -+ -+ struct __queue { -+ LIST_ENTRY queue; -+ _lock lock; -+ }; -+ -+ typedef NDIS_PACKET _pkt; -+ typedef NDIS_BUFFER _buffer; -+ typedef struct __queue _queue; -+ -+ typedef PKTHREAD _thread_hdl_; -+ typedef void thread_return; -+ typedef void* thread_context; -+ -+ typedef NDIS_WORK_ITEM _workitem; -+ -+ -+ #define HZ 10000000 -+ #define SEMA_UPBND (0x7FFFFFFF) //8192 -+ -+__inline static _list *get_next(_list *list) -+{ -+ return list->Flink; -+} -+ -+__inline static _list *get_list_head(_queue *queue) -+{ -+ return (&(queue->queue)); -+} -+ -+ -+#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) -+ -+ -+__inline static _enter_critical(_lock *plock, _irqL *pirqL) -+{ -+ NdisAcquireSpinLock(plock); -+} -+ -+__inline static _exit_critical(_lock *plock, _irqL *pirqL) -+{ -+ NdisReleaseSpinLock(plock); -+} -+ -+ -+__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprAcquireSpinLock(plock); -+} -+ -+__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprReleaseSpinLock(plock); -+} -+ -+__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprAcquireSpinLock(plock); -+} -+ -+__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) -+{ -+ NdisDprReleaseSpinLock(plock); -+} -+ -+__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+ KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL); -+} -+ -+ -+__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) -+{ -+ KeReleaseMutex(pmutex, FALSE); -+} -+ -+ -+__inline static void rtw_list_delete(_list *plist) -+{ -+ RemoveEntryList(plist); -+ InitializeListHead(plist); -+} -+ -+static inline void timer_hdl( -+ IN PVOID SystemSpecific1, -+ IN PVOID FunctionContext, -+ IN PVOID SystemSpecific2, -+ IN PVOID SystemSpecific3) -+{ -+ _timer *timer = (_timer *)FunctionContext; -+ -+ timer->function(timer->arg); -+} -+ -+static inline void _init_timer(_timer *ptimer, _nic_hdl nic_hdl, void *pfunc, void *cntx) -+{ -+ ptimer->function = pfunc; -+ ptimer->arg = cntx; -+ NdisMInitializeTimer(&ptimer->ndis_timer, nic_hdl, timer_hdl, ptimer); -+} -+ -+static inline void _set_timer(_timer *ptimer, u32 delay_time) -+{ -+ NdisMSetTimer(ptimer, delay_time); -+} -+ -+static inline void _cancel_timer(_timer *ptimer, u8 *bcancelled) -+{ -+ NdisMCancelTimer(ptimer, bcancelled); -+} -+ -+__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) -+{ -+ -+ NdisInitializeWorkItem(pwork, pfunc, cntx); -+} -+ -+__inline static void _set_workitem(_workitem *pwork) -+{ -+ NdisScheduleWorkItem(pwork); -+} -+ -+ -+#define ATOMIC_INIT(i) { (i) } -+ -+// -+// Global Mutex: can only be used at PASSIVE level. -+// -+ -+#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ -+ { \ -+ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -+ NdisMSleep(10000); \ -+ } \ -+} -+ -+#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -+{ \ -+ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -+} -+ -+// limitation of path length -+#define PATH_LENGTH_MAX MAX_PATH -+ -+//Atomic integer operations -+#define ATOMIC_T LONG -+ -+ -+#define NDEV_FMT "%s" -+#define NDEV_ARG(ndev) "" -+#define ADPT_FMT "%s" -+#define ADPT_ARG(adapter) "" -+#define FUNC_NDEV_FMT "%s" -+#define FUNC_NDEV_ARG(ndev) __func__ -+#define FUNC_ADPT_FMT "%s" -+#define FUNC_ADPT_ARG(adapter) __func__ -+ -+#define STRUCT_PACKED -+ -+#endif -+ -diff --git a/drivers/staging/rtl8723cs/include/pci_hal.h b/drivers/staging/rtl8723cs/include/pci_hal.h -new file mode 100644 -index 000000000000..6eac311a13d1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/pci_hal.h -@@ -0,0 +1,60 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __PCI_HAL_H__ -+#define __PCI_HAL_H__ -+ -+#ifdef CONFIG_RTL8188E -+ void rtl8188ee_set_hal_ops(_adapter *padapter); -+#endif -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ void rtl8812ae_set_hal_ops(_adapter *padapter); -+#endif -+ -+#if defined(CONFIG_RTL8192E) -+ void rtl8192ee_set_hal_ops(_adapter *padapter); -+#endif -+ -+#if defined(CONFIG_RTL8192F) -+ void rtl8192fe_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8723B -+ void rtl8723be_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ void rtl8723de_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ void rtl8814ae_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ void rtl8822be_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8822C -+ void rtl8822ce_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8814B -+ void rtl8814be_set_hal_ops(PADAPTER padapter); -+#endif -+ -+u8 rtw_set_hal_ops(_adapter *padapter); -+ -+#endif /* __PCIE_HAL_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/pci_ops.h b/drivers/staging/rtl8723cs/include/pci_ops.h -new file mode 100644 -index 000000000000..7b95fde04a7c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/pci_ops.h -@@ -0,0 +1,116 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __PCI_OPS_H_ -+#define __PCI_OPS_H_ -+ -+ -+#ifdef CONFIG_RTL8188E -+ u32 rtl8188ee_init_desc_ring(_adapter *padapter); -+ u32 rtl8188ee_free_desc_ring(_adapter *padapter); -+ void rtl8188ee_reset_desc_ring(_adapter *padapter); -+ int rtl8188ee_interrupt(PADAPTER Adapter); -+ void rtl8188ee_xmit_tasklet(void *priv); -+ void rtl8188ee_recv_tasklet(void *priv); -+ void rtl8188ee_prepare_bcn_tasklet(void *priv); -+ void rtl8188ee_set_intf_ops(struct _io_ops *pops); -+ void rtw8188ee_unmap_beacon_icf(_adapter *padapter); -+#endif -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+ u32 rtl8812ae_init_desc_ring(_adapter *padapter); -+ u32 rtl8812ae_free_desc_ring(_adapter *padapter); -+ void rtl8812ae_reset_desc_ring(_adapter *padapter); -+ int rtl8812ae_interrupt(PADAPTER Adapter); -+ void rtl8812ae_xmit_tasklet(void *priv); -+ void rtl8812ae_recv_tasklet(void *priv); -+ void rtl8812ae_prepare_bcn_tasklet(void *priv); -+ void rtl8812ae_set_intf_ops(struct _io_ops *pops); -+ void rtw8812ae_unmap_beacon_icf(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8192E -+ u32 rtl8192ee_init_desc_ring(_adapter *padapter); -+ u32 rtl8192ee_free_desc_ring(_adapter *padapter); -+ void rtl8192ee_reset_desc_ring(_adapter *padapter); -+ void rtl8192ee_recv_tasklet(void *priv); -+ void rtl8192ee_prepare_bcn_tasklet(void *priv); -+ int rtl8192ee_interrupt(PADAPTER Adapter); -+ void rtl8192ee_set_intf_ops(struct _io_ops *pops); -+ void rtw8192ee_unmap_beacon_icf(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8192F -+ u32 rtl8192fe_init_desc_ring(_adapter *padapter); -+ u32 rtl8192fe_free_desc_ring(_adapter *padapter); -+ void rtl8192fe_reset_desc_ring(_adapter *padapter); -+ int rtl8192fe_interrupt(PADAPTER Adapter); -+ void rtl8192fe_recv_tasklet(void *priv); -+ void rtl8192fe_prepare_bcn_tasklet(void *priv); -+ void rtl8192fe_set_intf_ops(struct _io_ops *pops); -+ u8 check_tx_desc_resource(_adapter *padapter, int prio); -+ void rtl8192fe_unmap_beacon_icf(PADAPTER Adapter); -+#endif -+ -+#ifdef CONFIG_RTL8723B -+ u32 rtl8723be_init_desc_ring(_adapter *padapter); -+ u32 rtl8723be_free_desc_ring(_adapter *padapter); -+ void rtl8723be_reset_desc_ring(_adapter *padapter); -+ int rtl8723be_interrupt(PADAPTER Adapter); -+ void rtl8723be_recv_tasklet(void *priv); -+ void rtl8723be_prepare_bcn_tasklet(void *priv); -+ void rtl8723be_set_intf_ops(struct _io_ops *pops); -+ void rtl8723be_unmap_beacon_icf(PADAPTER Adapter); -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ u32 rtl8723de_init_desc_ring(_adapter *padapter); -+ u32 rtl8723de_free_desc_ring(_adapter *padapter); -+ void rtl8723de_reset_desc_ring(_adapter *padapter); -+ int rtl8723de_interrupt(PADAPTER Adapter); -+ void rtl8723de_recv_tasklet(void *priv); -+ void rtl8723de_prepare_bcn_tasklet(void *priv); -+ void rtl8723de_set_intf_ops(struct _io_ops *pops); -+ u8 check_tx_desc_resource(_adapter *padapter, int prio); -+ void rtl8723de_unmap_beacon_icf(PADAPTER Adapter); -+#endif -+ -+#ifdef CONFIG_RTL8814A -+ u32 rtl8814ae_init_desc_ring(_adapter *padapter); -+ u32 rtl8814ae_free_desc_ring(_adapter *padapter); -+ void rtl8814ae_reset_desc_ring(_adapter *padapter); -+ int rtl8814ae_interrupt(PADAPTER Adapter); -+ void rtl8814ae_xmit_tasklet(void *priv); -+ void rtl8814ae_recv_tasklet(void *priv); -+ void rtl8814ae_prepare_bcn_tasklet(void *priv); -+ void rtl8814ae_set_intf_ops(struct _io_ops *pops); -+ void rtl8814ae_unmap_beacon_icf(PADAPTER Adapter); -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ void rtl8822be_set_intf_ops(struct _io_ops *pops); -+#endif -+ -+#ifdef CONFIG_RTL8821C -+ void rtl8821ce_set_intf_ops(struct _io_ops *pops); -+#endif -+ -+#ifdef CONFIG_RTL8822C -+ void rtl8822ce_set_intf_ops(struct _io_ops *pops); -+#endif -+ -+#ifdef CONFIG_RTL8814B -+ void rtl8814be_set_intf_ops(struct _io_ops *pops); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/pci_osintf.h b/drivers/staging/rtl8723cs/include/pci_osintf.h -new file mode 100644 -index 000000000000..077064a725bc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/pci_osintf.h -@@ -0,0 +1,66 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __PCI_OSINTF_H -+#define __PCI_OSINTF_H -+ -+#ifdef CONFIG_PLATFORM_RTK129X -+#define PCIE_SLOT1_MEM_START 0x9804F000 -+#define PCIE_SLOT1_MEM_LEN 0x1000 -+#define PCIE_SLOT1_CTRL_START 0x9804EC00 -+ -+#define PCIE_SLOT2_MEM_START 0x9803C000 -+#define PCIE_SLOT2_MEM_LEN 0x1000 -+#define PCIE_SLOT2_CTRL_START 0x9803BC00 -+ -+#define PCIE_MASK_OFFSET 0x100 /* mask offset from CTRL_START */ -+#define PCIE_TRANSLATE_OFFSET 0x104 /* translate offset from CTRL_START */ -+#endif -+ -+#define PCI_BC_CLK_REQ BIT0 -+#define PCI_BC_ASPM_L0s BIT1 -+#define PCI_BC_ASPM_L1 BIT2 -+#define PCI_BC_ASPM_L1Off BIT3 -+//#define PCI_BC_ASPM_LTR BIT4 -+//#define PCI_BC_ASPM_OBFF BIT5 -+ -+void PlatformClearPciPMEStatus(PADAPTER Adapter); -+void rtw_pci_aspm_config(_adapter *padapter); -+void rtw_pci_aspm_config_l1off_general(_adapter *padapter, u8 eanble); -+#ifdef CONFIG_PCI_DYNAMIC_ASPM -+void rtw_pci_set_aspm_lnkctl(_adapter *padapter, u8 mode); -+void rtw_pci_set_l1_latency(_adapter *padapter, u8 mode); -+ -+static inline void rtw_pci_dynamic_aspm_set_mode(_adapter *padapter, u8 mode) -+{ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); -+ -+ if (mode == pcipriv->aspm_mode) -+ return; -+ -+ pcipriv->aspm_mode = mode; -+ -+#ifdef CONFIG_PCI_DYNAMIC_ASPM_LINK_CTRL -+ rtw_pci_set_aspm_lnkctl(padapter, mode); -+#endif -+#ifdef CONFIG_PCI_DYNAMIC_ASPM_L1_LATENCY -+ rtw_pci_set_l1_latency(padapter, mode); -+#endif -+} -+#else -+#define rtw_pci_dynamic_aspm_set_mode(adapter, mode) -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/recv_osdep.h b/drivers/staging/rtl8723cs/include/recv_osdep.h -new file mode 100644 -index 000000000000..4521c007f0a0 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/recv_osdep.h -@@ -0,0 +1,70 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RECV_OSDEP_H_ -+#define __RECV_OSDEP_H_ -+ -+ -+extern sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter); -+extern void _rtw_free_recv_priv(struct recv_priv *precvpriv); -+ -+ -+extern s32 rtw_recv_entry(union recv_frame *precv_frame); -+void rtw_rframe_set_os_pkt(union recv_frame *rframe); -+extern int rtw_recv_indicatepkt(_adapter *adapter, union recv_frame *precv_frame); -+extern void rtw_recv_returnpacket(_nic_hdl cnxt, _pkt *preturnedpkt); -+ -+#ifdef CONFIG_WIFI_MONITOR -+extern int rtw_recv_monitor(_adapter *padapter, union recv_frame *precv_frame); -+#endif /* CONFIG_WIFI_MONITOR */ -+ -+#ifdef CONFIG_HOSTAPD_MLME -+extern void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame); -+#endif -+ -+struct sta_info; -+extern void rtw_handle_tkip_mic_err(_adapter *padapter, struct sta_info *sta, u8 bgroup); -+ -+ -+int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter); -+int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe); -+void rtw_os_recv_resource_free(struct recv_priv *precvpriv); -+ -+ -+int rtw_os_alloc_recvframe(_adapter *padapter, union recv_frame *precvframe, u8 *pdata, _pkt *pskb); -+int rtw_os_recvframe_duplicate_skb(_adapter *padapter, union recv_frame *pcloneframe, _pkt *pskb); -+void rtw_os_free_recvframe(union recv_frame *precvframe); -+ -+ -+int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf, u32 size); -+int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf); -+ -+_pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, const u8 *da, const u8 *sa -+ , u8 *msdu ,u16 msdu_len, enum rtw_rx_llc_hdl llc_hdl); -+void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, union recv_frame *rframe); -+ -+void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf); -+ -+#ifdef PLATFORM_LINUX -+#ifdef CONFIG_RTW_NAPI -+#include /* struct napi_struct */ -+ -+int rtw_recv_napi_poll(struct napi_struct *, int budget); -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+void dynamic_napi_th_chk (_adapter *adapter); -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+#endif /* CONFIG_RTW_NAPI */ -+#endif /* PLATFORM_LINUX */ -+ -+#endif /* */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188e_cmd.h b/drivers/staging/rtl8723cs/include/rtl8188e_cmd.h -new file mode 100644 -index 000000000000..aba0bec14769 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188e_cmd.h -@@ -0,0 +1,165 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188E_CMD_H__ -+#define __RTL8188E_CMD_H__ -+ -+#if 0 -+enum cmd_msg_element_id { -+ NONE_CMDMSG_EID, -+ AP_OFFLOAD_EID = 0, -+ SET_PWRMODE_EID = 1, -+ JOINBSS_RPT_EID = 2, -+ RSVD_PAGE_EID = 3, -+ RSSI_4_EID = 4, -+ RSSI_SETTING_EID = 5, -+ MACID_CONFIG_EID = 6, -+ MACID_PS_MODE_EID = 7, -+ P2P_PS_OFFLOAD_EID = 8, -+ SELECTIVE_SUSPEND_ROF_CMD = 9, -+ P2P_PS_CTW_CMD_EID = 32, -+ MAX_CMDMSG_EID -+}; -+#else -+typedef enum _RTL8188E_H2C_CMD_ID { -+ /* Class Common */ -+ H2C_COM_RSVD_PAGE = 0x00, -+ H2C_COM_MEDIA_STATUS_RPT = 0x01, -+ H2C_COM_SCAN = 0x02, -+ H2C_COM_KEEP_ALIVE = 0x03, -+ H2C_COM_DISCNT_DECISION = 0x04, -+#ifndef CONFIG_WOWLAN -+ H2C_COM_WWLAN = 0x05, -+#endif -+ H2C_COM_INIT_OFFLOAD = 0x06, -+ H2C_COM_REMOTE_WAKE_CTL = 0x07, -+ H2C_COM_AP_OFFLOAD = 0x08, -+ H2C_COM_BCN_RSVD_PAGE = 0x09, -+ H2C_COM_PROB_RSP_RSVD_PAGE = 0x0A, -+ -+ /* Class PS */ -+ H2C_PS_PWR_MODE = 0x20, -+ H2C_PS_TUNE_PARA = 0x21, -+ H2C_PS_TUNE_PARA_2 = 0x22, -+ H2C_PS_LPS_PARA = 0x23, -+ H2C_PS_P2P_OFFLOAD = 0x24, -+ -+ /* Class DM */ -+ H2C_DM_MACID_CFG = 0x40, -+ H2C_DM_TXBF = 0x41, -+ H2C_RSSI_REPORT = 0x42, -+ /* Class BT */ -+ H2C_BT_COEX_MASK = 0x60, -+ H2C_BT_COEX_GPIO_MODE = 0x61, -+ H2C_BT_DAC_SWING_VAL = 0x62, -+ H2C_BT_PSD_RST = 0x63, -+ -+ /* Class Remote WakeUp */ -+#ifdef CONFIG_WOWLAN -+ H2C_COM_WWLAN = 0x80, -+ H2C_COM_REMOTE_WAKE_CTRL = 0x81, -+ H2C_COM_AOAC_GLOBAL_INFO = 0x82, -+ H2C_COM_AOAC_RSVD_PAGE = 0x83, -+#endif -+ -+ /* Class */ -+ /* H2C_RESET_TSF =0xc0, */ -+} RTL8188E_H2C_CMD_ID; -+ -+#endif -+ -+ -+struct cmd_msg_parm { -+ u8 eid; /* element id */ -+ u8 sz; /* sz */ -+ u8 buf[6]; -+}; -+ -+enum { -+ PWRS -+}; -+ -+typedef struct _SETPWRMODE_PARM { -+ u8 Mode;/* 0:Active,1:LPS,2:WMMPS */ -+ /* u8 RLBM:4; */ /* 0:Min,1:Max,2: User define */ -+ u8 SmartPS_RLBM;/* LPS=0:PS_Poll,1:PS_Poll,2:NullData,WMM=0:PS_Poll,1:NullData */ -+ u8 AwakeInterval; /* unit: beacon interval */ -+ u8 bAllQueueUAPSD; -+ u8 PwrState;/* AllON(0x0c),RFON(0x04),RFOFF(0x00) */ -+} SETPWRMODE_PARM, *PSETPWRMODE_PARM; -+ -+struct H2C_SS_RFOFF_PARAM { -+ u8 ROFOn; /* 1: on, 0:off */ -+ u16 gpio_period; /* unit: 1024 us */ -+} __attribute__((packed)); -+ -+ -+typedef struct JOINBSSRPT_PARM_88E { -+ u8 OpMode; /* RT_MEDIA_STATUS */ -+#ifdef CONFIG_WOWLAN -+ u8 MacID; /* MACID */ -+#endif /* CONFIG_WOWLAN */ -+} JOINBSSRPT_PARM_88E, *PJOINBSSRPT_PARM_88E; -+ -+#if 0 -+/* move to hal_com_h2c.h */ -+typedef struct _RSVDPAGE_LOC_88E { -+ u8 LocProbeRsp; -+ u8 LocPsPoll; -+ u8 LocNullData; -+ u8 LocQosNull; -+ u8 LocBTQosNull; -+#ifdef CONFIG_WOWLAN -+ u8 LocRemoteCtrlInfo; -+ u8 LocArpRsp; -+ u8 LocNbrAdv; -+ u8 LocGTKRsp; -+ u8 LocGTKInfo; -+ u8 LocProbeReq; -+ u8 LocNetList; -+#endif /* CONFIG_WOWLAN */ -+} RSVDPAGE_LOC_88E, *PRSVDPAGE_LOC_88E; -+#endif -+ -+/* host message to firmware cmd */ -+void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -+void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); -+s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+/* u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); */ -+u8 GetTxBufferRsvdPageNum8188E(_adapter *padapter, bool wowlan); -+ -+ -+#ifdef CONFIG_P2P -+ void rtl8188e_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -+#endif /* CONFIG_P2P */ -+ -+/* #define H2C_8188E_RSVDPAGE_LOC_LEN 5 */ -+/* #define H2C_8188E_AOAC_RSVDPAGE_LOC_LEN 7 */ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- -+ * */ -+#if 0 -+ /* move to hal_com_h2c.h -+ * _RSVDPAGE_LOC_CMD_0x00 */ -+ #define SET_8188E_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+ #define SET_8188E_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+ #define SET_8188E_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+ #define SET_8188E_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+ /* AOAC_RSVDPAGE_LOC_0x83 */ -+ #define SET_8188E_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) -+ #define SET_8188E_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#endif -+#endif/* __RTL8188E_CMD_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188e_dm.h b/drivers/staging/rtl8723cs/include/rtl8188e_dm.h -new file mode 100644 -index 000000000000..457ae9bcab1f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188e_dm.h -@@ -0,0 +1,27 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188E_DM_H__ -+#define __RTL8188E_DM_H__ -+ -+void rtl8188e_init_dm_priv(PADAPTER Adapter); -+void rtl8188e_deinit_dm_priv(PADAPTER Adapter); -+void rtl8188e_InitHalDm(PADAPTER Adapter); -+void rtl8188e_HalDmWatchDog(PADAPTER Adapter); -+ -+/* void rtl8192c_dm_CheckTXPowerTracking(PADAPTER Adapter); */ -+ -+/* void rtl8192c_dm_RF_Saving(PADAPTER pAdapter, u8 bForceInNormal); */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8188e_hal.h b/drivers/staging/rtl8723cs/include/rtl8188e_hal.h -new file mode 100644 -index 000000000000..9665896d57ed ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188e_hal.h -@@ -0,0 +1,321 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188E_HAL_H__ -+#define __RTL8188E_HAL_H__ -+ -+/* #include "hal_com.h" */ -+#include "hal_data.h" -+ -+/* include HAL Related header after HAL Related compiling flags */ -+#include "rtl8188e_spec.h" -+#include "Hal8188EPhyReg.h" -+#include "Hal8188EPhyCfg.h" -+#include "rtl8188e_rf.h" -+#include "rtl8188e_dm.h" -+#include "rtl8188e_recv.h" -+#include "rtl8188e_xmit.h" -+#include "rtl8188e_cmd.h" -+#include "rtl8188e_led.h" -+#include "Hal8188EPwrSeq.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+ #include "rtl8188e_sreset.h" -+#endif -+ -+/* --------------------------------------------------------------------- */ -+/* RTL8188E Power Configuration CMDs for USB/SDIO/PCIE interfaces */ -+/* --------------------------------------------------------------------- */ -+#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow -+#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow -+#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow -+#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow -+#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow -+#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow -+#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow -+#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow -+#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow -+ -+ -+#if 1 /* download firmware related data structure */ -+#define MAX_FW_8188E_SIZE 0x8000 /* 32768, 32k / 16384, 16k */ -+ -+#define FW_8188E_SIZE 0x4000 /* 16384, 16k */ -+#define FW_8188E_SIZE_2 0x8000 /* 32768, 32k */ -+ -+#define FW_8188E_START_ADDRESS 0x1000 -+#define FW_8188E_END_ADDRESS 0x1FFF /* 0x5FFF */ -+ -+ -+#define IS_FW_HEADER_EXIST_88E(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x88E0) -+ -+typedef struct _RT_FIRMWARE_8188E { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[MAX_FW_8188E_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8188E, *PRT_FIRMWARE_8188E; -+ -+/* -+ * This structure must be cared byte-ordering -+ * */ -+ -+typedef struct _RT_8188E_FIRMWARE_HDR { -+ /* 8-byte alinment required */ -+ -+ /* --- LONG WORD 0 ---- */ -+ u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ -+ u8 Category; /* AP/NIC and USB/PCI */ -+ u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -+ u16 Version; /* FW Version */ -+ u8 Subversion; /* FW Subversion, default 0x00 */ -+ u16 Rsvd1; -+ -+ -+ /* --- LONG WORD 1 ---- */ -+ u8 Month; /* Release time Month field */ -+ u8 Date; /* Release time Date field */ -+ u8 Hour; /* Release time Hour field */ -+ u8 Minute; /* Release time Minute field */ -+ u16 RamCodeSize; /* The size of RAM code */ -+ u8 Foundry; -+ u8 Rsvd2; -+ -+ /* --- LONG WORD 2 ---- */ -+ u32 SvnIdx; /* The SVN entry index */ -+ u32 Rsvd3; -+ -+ /* --- LONG WORD 3 ---- */ -+ u32 Rsvd4; -+ u32 Rsvd5; -+} RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR; -+#endif /* download firmware related data structure */ -+ -+ -+#define DRIVER_EARLY_INT_TIME_8188E 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8188E 0x02 -+ -+ -+/* #define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 */ /* 9k for 88E nornal chip , */ /* MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) */ -+#ifdef CONFIG_USB_HCI -+ #define RX_DMA_SIZE_88E(__Adapter) 0x2800 -+#else -+ #define RX_DMA_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2800:0x4000) -+#endif -+ -+#ifdef CONFIG_WOWLAN -+ #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -+#else -+ #define RESV_FMWF 0 -+#endif -+ -+#define RX_DMA_RESERVD_FW_FEATURE 0x200 /* for tx report (64*8) */ -+ -+#define MAX_RX_DMA_BUFFER_SIZE_88E(__Adapter) (RX_DMA_SIZE_88E(__Adapter)-RX_DMA_RESERVD_FW_FEATURE) -+ -+#define MAX_TX_REPORT_BUFFER_SIZE 0x0400 /* 1k */ -+ -+#define PAGE_SIZE_TX_88E PAGE_SIZE_128 -+/* Note: We will divide number of page equally for each queue other than public queue! -+ * 22k = 22528 bytes = 176 pages (@page = 128 bytes) -+ * BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_88E -+ * 1 ps-poll / 1 null-data /1 prob_rsp /1 QOS null-data = 4 pages */ -+ -+#define BCNQ_PAGE_NUM_88E (MAX_BEACON_LEN / PAGE_SIZE_TX_88E + 4) /*0x09*/ -+ -+/* For WoWLan , more reserved page */ -+#ifdef CONFIG_WOWLAN -+ #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ #define WOWLAN_KEEP_ALIVE_PAGE 0x02 /*for keep alive packet*/ -+ #else -+ #define WOWLAN_KEEP_ALIVE_PAGE 0x00 -+ #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ /* 1 ArpRsp + 2 NbrAdv + 2 NDPInfo + 1 RCI + 1 AOAC = 7 pages */ -+ #define WOWLAN_PAGE_NUM_88E (0x07+ WOWLAN_KEEP_ALIVE_PAGE) -+#else -+ #define WOWLAN_PAGE_NUM_88E 0x00 -+#endif -+ -+/* Note: -+Tx FIFO Size : previous CUT:22K /I_CUT after:32KB -+Tx page Size : 128B -+Total page numbers : 176(0xB0) / 256(0x100) -+*/ -+#ifdef CONFIG_USB_HCI -+ #define TOTAL_PAGE_NUMBER_88E(_Adapter) (0xB0 - 1) -+#else -+ #define TOTAL_PAGE_NUMBER_88E(_Adapter) ((IS_VENDOR_8188E_I_CUT_SERIES(_Adapter)?0x100:0xB0) - 1)/* must reserved 1 page for dma issue */ -+#endif -+#define TX_TOTAL_PAGE_NUMBER_88E(_Adapter) (TOTAL_PAGE_NUMBER_88E(_Adapter) - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E) -+#define TX_PAGE_BOUNDARY_88E(_Adapter) (TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) /* beacon header start address */ -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) TX_TOTAL_PAGE_NUMBER_88E(_Adapter) -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_88E(_Adapter) (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) -+ -+/* For Normal Chip Setting -+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B */ -+#define NORMAL_PAGE_NUM_HPQ_88E 0x0 -+#define NORMAL_PAGE_NUM_LPQ_88E 0x09 -+#define NORMAL_PAGE_NUM_NPQ_88E 0x0 -+ -+/* Note: For Normal Chip Setting, modify later */ -+#define WMM_NORMAL_PAGE_NUM_HPQ_88E 0x29 -+#define WMM_NORMAL_PAGE_NUM_LPQ_88E 0x1C -+#define WMM_NORMAL_PAGE_NUM_NPQ_88E 0x1C -+ -+ -+/* ------------------------------------------------------------------------- -+ * Chip specific -+ * ------------------------------------------------------------------------- */ -+#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22) & 0x3) -+#define CHIP_BONDING_92C_1T2R 0x1 -+#define CHIP_BONDING_88C_USB_MCARD 0x2 -+#define CHIP_BONDING_88C_USB_HP 0x1 -+ -+/* ------------------------------------------------------------------------- -+ * Channel Plan -+ * ------------------------------------------------------------------------- */ -+ -+ -+#define EFUSE_REAL_CONTENT_LEN 512 -+#define EFUSE_MAP_LEN 128 -+#define EFUSE_MAX_SECTION 16 -+#define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) -+/* -+ * -+ * To prevent out of boundary programming case, -+ * leave 1byte and program full section -+ * 9bytes + 1byt + 5bytes and pre 1byte. -+ * For worst case: -+ * | 1byte|----8bytes----|1byte|--5bytes--| -+ * | | Reserved(14bytes) | -+ * */ -+#define EFUSE_OOB_PROTECT_BYTES 15 /* PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. */ -+ -+#define EFUSE_REAL_CONTENT_LEN_88E 256 -+#define EFUSE_MAP_LEN_88E 512 -+#define EFUSE_MAX_SECTION_88E 64 -+#define EFUSE_MAX_WORD_UNIT_88E 4 -+#define EFUSE_IC_ID_OFFSET_88E 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -+#define AVAILABLE_EFUSE_ADDR_88E(addr) (addr < EFUSE_REAL_CONTENT_LEN_88E) -+/* To prevent out of boundary programming case, leave 1byte and program full section -+ * 9bytes + 1byt + 5bytes and pre 1byte. -+ * For worst case: -+ * | 2byte|----8bytes----|1byte|--7bytes--| */ /* 92D */ -+#define EFUSE_OOB_PROTECT_BYTES_88E 18 /* PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. */ -+#define EFUSE_PROTECT_BYTES_BANK_88E 16 -+ -+ -+/* ******************************************************** -+ * EFUSE for BT definition -+ * ******************************************************** */ -+#define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */ -+#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -+#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ -+ -+#define EFUSE_PROTECT_BYTES_BANK 16 -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+/* #define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) */ -+ -+/* #define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) */ -+ -+#ifdef CONFIG_PCI_HCI -+ /* according to the define in the rtw_xmit.h, rtw_recv.h */ -+ #define TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ -+ #ifdef CONFIG_CONCURRENT_MODE -+ /*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM<<1)*/ /* 256 */ -+ #define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+(TXDESC_NUM>>1)) /* 320 */ -+ /*#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+TXDESC_NUM)*/ /* 384 */ -+ #else -+ #define BE_QUEUE_TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ -+ /*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM+(TXDESC_NUM>>1)) */ /* 192 */ -+ #endif -+ -+ void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); -+ void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+#endif /* CONFIG_PCI_HCI */ -+ -+/* rtl8188e_hal_init.c */ -+ -+s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -+void _8051Reset88E(PADAPTER padapter); -+void rtl8188e_InitializeFirmwareVars(PADAPTER padapter); -+ -+ -+s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy); -+ -+/* EFuse */ -+u8 GetEEPROMSize8188E(PADAPTER padapter); -+void Hal_InitPGData88E(PADAPTER padapter); -+void Hal_EfuseParseIDCode88E(PADAPTER padapter, u8 *hwinfo); -+void Hal_ReadTxPowerInfo88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+ -+void Hal_EfuseParseEEPROMVer88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void rtl8188e_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseCustomerID88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadAntennaDiversity88E(PADAPTER pAdapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -+void Hal_ReadThermalMeter_88E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_EfuseParseXtal_8188E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBoardType88E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadPowerSavingMode88E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadPAType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadAmplifierType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadRFEType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+ -+BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter); -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif /* CONFIG_WOWLAN */ -+ -+ -+#ifdef CONFIG_RF_POWER_TRIM -+ void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+#endif /*CONFIG_RF_POWER_TRIM*/ -+ -+ -+void InitBeaconParameters_8188e(_adapter *adapter); -+void SetBeaconRelatedRegisters8188E(PADAPTER padapter); -+ -+void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8188e(_adapter *adapter); -+ -+void rtl8188e_start_thread(_adapter *padapter); -+void rtl8188e_stop_thread(_adapter *padapter); -+ -+void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter, int data_len); -+#ifdef CONFIG_IOL_EFUSE_PATCH -+ s32 rtl8188e_iol_efuse_patch(PADAPTER padapter); -+#endif/* CONFIG_IOL_EFUSE_PATCH */ -+void _InitTransferPageSize(PADAPTER padapter); -+ -+u8 SetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); -+ -+u8 -+GetHalDefVar8188E( -+ PADAPTER Adapter, -+ HAL_DEF_VARIABLE eVariable, -+ void *pValue -+); -+#ifdef CONFIG_GPIO_API -+int rtl8188e_GpioFuncCheck(PADAPTER adapter, u8 gpio_num); -+#endif -+#endif /* __RTL8188E_HAL_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188e_led.h b/drivers/staging/rtl8723cs/include/rtl8188e_led.h -new file mode 100644 -index 000000000000..ef054675024a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188e_led.h -@@ -0,0 +1,37 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188E_LED_H__ -+#define __RTL8188E_LED_H__ -+ -+#ifdef CONFIG_RTW_SW_LED -+ -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+#ifdef CONFIG_USB_HCI -+ void rtl8188eu_InitSwLeds(PADAPTER padapter); -+ void rtl8188eu_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+ void rtl8188ee_InitSwLeds(PADAPTER padapter); -+ void rtl8188ee_DeInitSwLeds(PADAPTER padapter); -+#endif -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ void rtl8188es_InitSwLeds(PADAPTER padapter); -+ void rtl8188es_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif -+#endif /*CONFIG_RTW_SW_LED*/ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188e_recv.h b/drivers/staging/rtl8723cs/include/rtl8188e_recv.h -new file mode 100644 -index 000000000000..31058c1b11dc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188e_recv.h -@@ -0,0 +1,156 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188E_RECV_H__ -+#define __RTL8188E_RECV_H__ -+ -+#define RECV_BLK_SZ 512 -+#define RECV_BLK_CNT 16 -+#define RECV_BLK_TH RECV_BLK_CNT -+ -+#if defined(CONFIG_USB_HCI) -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ -+ /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ -+ /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ -+ #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ -+ /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ -+ #else -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+#elif defined(CONFIG_PCI_HCI) -+ /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ -+ /* #define MAX_RECVBUF_SZ (9100) */ -+ /* #else */ -+ #define MAX_RECVBUF_SZ (4000) /* about 4K -+ * #endif */ -+ -+ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ -+ #define MAX_RECVBUF_SZ (10240) -+ -+#endif -+ -+/* Rx smooth factor */ -+#define Rx_Smooth_Factor (20) -+ -+#define TX_RPT1_PKT_LEN 8 -+ -+typedef struct rxreport_8188e { -+ /* Offset 0 */ -+ u32 pktlen:14; -+ u32 crc32:1; -+ u32 icverr:1; -+ u32 drvinfosize:4; -+ u32 security:3; -+ u32 qos:1; -+ u32 shift:2; -+ u32 physt:1; -+ u32 swdec:1; -+ u32 ls:1; -+ u32 fs:1; -+ u32 eor:1; -+ u32 own:1; -+ -+ /* Offset 4 */ -+ u32 macid:5; -+ u32 tid:4; -+ u32 hwrsvd:4; -+ u32 amsdu:1; -+ u32 paggr:1; -+ u32 faggr:1; -+ u32 a1fit:4; -+ u32 a2fit:4; -+ u32 pam:1; -+ u32 pwr:1; -+ u32 md:1; -+ u32 mf:1; -+ u32 type:2; -+ u32 mc:1; -+ u32 bc:1; -+ -+ /* Offset 8 */ -+ u32 seq:12; -+ u32 frag:4; -+ u32 nextpktlen:14; -+ u32 nextind:1; -+ u32 rsvd0831:1; -+ -+ /* Offset 12 */ -+ u32 rxmcs:6; -+ u32 rxht:1; -+ u32 gf:1; -+ u32 splcp:1; -+ u32 bw:1; -+ u32 htc:1; -+ u32 eosp:1; -+ u32 bssidfit:2; -+ u32 rpt_sel:2; -+ u32 rsvd1216:13; -+ u32 pattern_match:1; -+ u32 unicastwake:1; -+ u32 magicwake:1; -+ -+ /* Offset 16 */ -+ /* -+ u32 pattern0match:1; -+ u32 pattern1match:1; -+ u32 pattern2match:1; -+ u32 pattern3match:1; -+ u32 pattern4match:1; -+ u32 pattern5match:1; -+ u32 pattern6match:1; -+ u32 pattern7match:1; -+ u32 pattern8match:1; -+ u32 pattern9match:1; -+ u32 patternamatch:1; -+ u32 patternbmatch:1; -+ u32 patterncmatch:1; -+ u32 rsvd1613:19; -+ */ -+ u32 rsvd16; -+ -+ /* Offset 20 */ -+ u32 tsfl; -+ -+ /* Offset 24 */ -+ u32 bassn:12; -+ u32 bavld:1; -+ u32 rsvd2413:19; -+} RXREPORT, *PRXREPORT; -+ -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8188es_init_recv_priv(PADAPTER padapter); -+ void rtl8188es_free_recv_priv(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+ s32 rtl8188eu_init_recv_priv(PADAPTER padapter); -+ void rtl8188eu_free_recv_priv(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8188ee_init_recv_priv(PADAPTER padapter); -+ void rtl8188ee_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8188e_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *prxstat); -+ -+#endif /* __RTL8188E_RECV_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188e_rf.h b/drivers/staging/rtl8723cs/include/rtl8188e_rf.h -new file mode 100644 -index 000000000000..8dc413e1dddf ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188e_rf.h -@@ -0,0 +1,27 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188E_RF_H__ -+#define __RTL8188E_RF_H__ -+ -+ -+ -+int PHY_RF6052_Config8188E(PADAPTER Adapter); -+void rtl8188e_RF_ChangeTxPath(PADAPTER Adapter, -+ u16 DataRate); -+void rtl8188e_PHY_RF6052SetBandwidth( -+ PADAPTER Adapter, -+ enum channel_width Bandwidth); -+ -+#endif/* __RTL8188E_RF_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188e_spec.h b/drivers/staging/rtl8723cs/include/rtl8188e_spec.h -new file mode 100644 -index 000000000000..802659a5fd07 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188e_spec.h -@@ -0,0 +1,159 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188E_SPEC_H__ -+#define __RTL8188E_SPEC_H__ -+ -+ -+/* ************************************************************ -+ * 8188E Regsiter offset definition -+ * ************************************************************ */ -+ -+ -+/* ************************************************************ -+ * -+ * ************************************************************ */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0000h ~ 0x00FFh System Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_BB_PAD_CTRL 0x0064 -+#define REG_HMEBOX_E0 0x0088 -+#define REG_HMEBOX_E1 0x008A -+#define REG_HMEBOX_E2 0x008C -+#define REG_HMEBOX_E3 0x008E -+#define REG_HMEBOX_EXT_0 0x01F0 -+#define REG_HMEBOX_EXT_1 0x01F4 -+#define REG_HMEBOX_EXT_2 0x01F8 -+#define REG_HMEBOX_EXT_3 0x01FC -+#define REG_HIMR_88E 0x00B0 /* RTL8188E */ -+#define REG_HISR_88E 0x00B4 /* RTL8188E */ -+#define REG_HIMRE_88E 0x00B8 /* RTL8188E */ -+#define REG_HISRE_88E 0x00BC /* RTL8188E */ -+ -+#define REG_DBI_WDATA_8188E 0x0348 /* DBI Write data */ -+#define REG_DBI_RDATA_8188E 0x034C /* DBI Read data */ -+#define REG_DBI_ADDR_8188E 0x0350 /* DBI Address */ -+#define REG_DBI_FLAG_8188E 0x0352 /* DBI Read/Write Flag */ -+#define REG_MDIO_WDATA_8188E 0x0354 /* MDIO for Write PCIE PHY */ -+#define REG_MDIO_RDATA_8188E 0x0356 /* MDIO for Reads PCIE PHY */ -+#define REG_MDIO_CTL_8188E 0x0358 /* MDIO for Control */ -+ -+#define REG_MACID_NO_LINK_0 0x0484 -+#define REG_MACID_NO_LINK_1 0x0488 -+#define REG_MACID_PAUSE_0 0x048c -+#define REG_MACID_PAUSE_1 0x0490 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) -+#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) -+#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) -+#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0300h ~ 0x03FFh PCIe -+ * -+ * ----------------------------------------------------- */ -+#define REG_PCIE_HRPWM_8188E 0x0361 /* PCIe RPWM */ -+#define REG_PCIE_HCPWM_8188E 0x0363 /* PCIe CPWM */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+#ifdef CONFIG_WOWLAN -+ #define REG_TXPKTBUF_IV_LOW 0x01a4 -+ #define REG_TXPKTBUF_IV_HIGH 0x01a8 -+#endif -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+#ifdef CONFIG_RF_POWER_TRIM -+ #define EEPROM_RF_GAIN_OFFSET 0xC1 -+ #define EEPROM_RF_GAIN_VAL 0xF6 -+ #define EEPROM_THERMAL_OFFSET 0xF5 -+#endif /*CONFIG_RF_POWER_TRIM*/ -+/* ---------------------------------------------------------------------------- -+ * 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits) -+ * ---------------------------------------------------------------------------- -+ * IOL config for REG_FDHM0(Reg0x88) */ -+#define CMD_INIT_LLT BIT0 -+#define CMD_READ_EFUSE_MAP BIT1 -+#define CMD_EFUSE_PATCH BIT2 -+#define CMD_IOCONFIG BIT3 -+#define CMD_INIT_LLT_ERR BIT4 -+#define CMD_READ_EFUSE_MAP_ERR BIT5 -+#define CMD_EFUSE_PATCH_ERR BIT6 -+#define CMD_IOCONFIG_ERR BIT7 -+ -+/* ----------------------------------------------------- -+ * -+ * Redifine register definition for compatibility -+ * -+ * ----------------------------------------------------- */ -+ -+/* TODO: use these definition when using REG_xxx naming rule. -+ * NOTE: DO NOT Remove these definition. Use later. */ -+#define ISR_88E REG_HISR_88E -+ -+#ifdef CONFIG_PCI_HCI -+ /* #define IMR_RX_MASK (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E) */ -+ #define IMR_TX_MASK (IMR_VODOK_88E | IMR_VIDOK_88E | IMR_BEDOK_88E | IMR_BKDOK_88E | IMR_MGNTDOK_88E | IMR_HIGHDOK_88E | IMR_BCNDERR0_88E) -+ -+ #ifdef CONFIG_CONCURRENT_MODE -+ #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E) -+ #else -+ #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E) -+ #endif -+ -+ #define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E | IMR_BKDOK_88E) -+#endif -+ -+/* ---------------------------------------------------------------------------- -+ * 8192C EEPROM/EFUSE share register definition. -+ * ---------------------------------------------------------------------------- */ -+ -+#define EFUSE_ACCESS_ON 0x69 /* For RTL8723 only. */ -+#define EFUSE_ACCESS_OFF 0x00 /* For RTL8723 only. */ -+ -+#endif /* __RTL8188E_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188e_sreset.h b/drivers/staging/rtl8723cs/include/rtl8188e_sreset.h -new file mode 100644 -index 000000000000..f4ec2d88c327 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188e_sreset.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8188E_SRESET_H_ -+#define _RTL8188E_SRESET_H_ -+ -+#include -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ extern void rtl8188e_sreset_xmit_status_check(_adapter *padapter); -+ extern void rtl8188e_sreset_linked_status_check(_adapter *padapter); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8188e_xmit.h b/drivers/staging/rtl8723cs/include/rtl8188e_xmit.h -new file mode 100644 -index 000000000000..bf8bf36047bc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188e_xmit.h -@@ -0,0 +1,302 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188E_XMIT_H__ -+#define __RTL8188E_XMIT_H__ -+ -+ -+ -+ -+/* For 88e early mode */ -+#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) -+#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) -+#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) -+#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) -+#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) -+#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) -+#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) -+ -+/* -+ * defined for TX DESC Operation -+ * */ -+ -+#define MAX_TID (15) -+ -+/* OFFSET 0 */ -+#define OFFSET_SZ 0 -+#define OFFSET_SHT 16 -+#define BMC BIT(24) -+#define LSG BIT(26) -+#define FSG BIT(27) -+#define OWN BIT(31) -+ -+ -+/* OFFSET 4 */ -+#define PKT_OFFSET_SZ 0 -+#define QSEL_SHT 8 -+#define RATE_ID_SHT 16 -+#define NAVUSEHDR BIT(20) -+#define SEC_TYPE_SHT 22 -+#define PKT_OFFSET_SHT 26 -+ -+/* OFFSET 8 */ -+#define AGG_EN BIT(12) -+#define AGG_BK BIT(16) -+#define AMPDU_DENSITY_SHT 20 -+#define ANTSEL_A BIT(24) -+#define ANTSEL_B BIT(25) -+#define TX_ANT_CCK_SHT 26 -+#define TX_ANTL_SHT 28 -+#define TX_ANT_HT_SHT 30 -+ -+/* OFFSET 12 */ -+#define SEQ_SHT 16 -+#define EN_HWSEQ BIT(31) -+ -+/* OFFSET 16 */ -+#define QOS BIT(6) -+#define HW_SSN BIT(7) -+#define USERATE BIT(8) -+#define DISDATAFB BIT(10) -+#define CTS_2_SELF BIT(11) -+#define RTS_EN BIT(12) -+#define HW_RTS_EN BIT(13) -+#define DATA_SHORT BIT(24) -+#define PWR_STATUS_SHT 15 -+#define DATA_SC_SHT 20 -+#define DATA_BW BIT(25) -+ -+/* OFFSET 20 */ -+#define RTY_LMT_EN BIT(17) -+ -+ -+/* OFFSET 20 */ -+#define SGI BIT(6) -+#define USB_TXAGG_NUM_SHT 24 -+ -+typedef struct txdesc_88e { -+ /* Offset 0 */ -+ u32 pktlen:16; -+ u32 offset:8; -+ u32 bmc:1; -+ u32 htc:1; -+ u32 ls:1; -+ u32 fs:1; -+ u32 linip:1; -+ u32 noacm:1; -+ u32 gf:1; -+ u32 own:1; -+ -+ /* Offset 4 */ -+ u32 macid:6; -+ u32 rsvd0406:2; -+ u32 qsel:5; -+ u32 rd_nav_ext:1; -+ u32 lsig_txop_en:1; -+ u32 pifs:1; -+ u32 rate_id:4; -+ u32 navusehdr:1; -+ u32 en_desc_id:1; -+ u32 sectype:2; -+ u32 rsvd0424:2; -+ u32 pkt_offset:5; /* unit: 8 bytes */ -+ u32 rsvd0431:1; -+ -+ /* Offset 8 */ -+ u32 rts_rc:6; -+ u32 data_rc:6; -+ u32 agg_en:1; -+ u32 rd_en:1; -+ u32 bar_rty_th:2; -+ u32 bk:1; -+ u32 morefrag:1; -+ u32 raw:1; -+ u32 ccx:1; -+ u32 ampdu_density:3; -+ u32 bt_null:1; -+ u32 ant_sel_a:1; -+ u32 ant_sel_b:1; -+ u32 tx_ant_cck:2; -+ u32 tx_antl:2; -+ u32 tx_ant_ht:2; -+ -+ /* Offset 12 */ -+ u32 nextheadpage:8; -+ u32 tailpage:8; -+ u32 seq:12; -+ u32 cpu_handle:1; -+ u32 tag1:1; -+ u32 trigger_int:1; -+ u32 hwseq_en:1; -+ -+ /* Offset 16 */ -+ u32 rtsrate:5; -+ u32 ap_dcfe:1; -+ u32 hwseq_sel:2; -+ u32 userate:1; -+ u32 disrtsfb:1; -+ u32 disdatafb:1; -+ u32 cts2self:1; -+ u32 rtsen:1; -+ u32 hw_rts_en:1; -+ u32 port_id:1; -+ u32 pwr_status:3; -+ u32 wait_dcts:1; -+ u32 cts2ap_en:1; -+ u32 data_sc:2; -+ u32 data_stbc:2; -+ u32 data_short:1; -+ u32 data_bw:1; -+ u32 rts_short:1; -+ u32 rts_bw:1; -+ u32 rts_sc:2; -+ u32 vcs_stbc:2; -+ -+ /* Offset 20 */ -+ u32 datarate:6; -+ u32 sgi:1; -+ u32 try_rate:1; -+ u32 data_ratefb_lmt:5; -+ u32 rts_ratefb_lmt:4; -+ u32 rty_lmt_en:1; -+ u32 data_rt_lmt:6; -+ u32 usb_txagg_num:8; -+ -+ /* Offset 24 */ -+ u32 txagg_a:5; -+ u32 txagg_b:5; -+ u32 use_max_len:1; -+ u32 max_agg_num:5; -+ u32 mcsg1_max_len:4; -+ u32 mcsg2_max_len:4; -+ u32 mcsg3_max_len:4; -+ u32 mcs7_sgi_max_len:4; -+ -+ /* Offset 28 */ -+ u32 checksum:16; /* TxBuffSize(PCIe)/CheckSum(USB) */ -+ u32 sw0:8; /* offset 30 */ -+ u32 sw1:4; -+ u32 mcs15_sgi_max_len:4; -+} TXDESC_8188E, *PTXDESC_8188E; -+ -+#define txdesc_set_ccx_sw_88e(txdesc, value) \ -+ do { \ -+ ((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \ -+ ((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \ -+ } while (0) -+ -+struct txrpt_ccx_88e { -+ /* offset 0 */ -+ u8 tag1:1; -+ u8 pkt_num:3; -+ u8 txdma_underflow:1; -+ u8 int_bt:1; -+ u8 int_tri:1; -+ u8 int_ccx:1; -+ -+ /* offset 1 */ -+ u8 mac_id:6; -+ u8 pkt_ok:1; -+ u8 bmc:1; -+ -+ /* offset 2 */ -+ u8 retry_cnt:6; -+ u8 lifetime_over:1; -+ u8 retry_over:1; -+ -+ /* offset 3 */ -+ u8 ccx_qtime0; -+ u8 ccx_qtime1; -+ -+ /* offset 5 */ -+ u8 final_data_rate; -+ -+ /* offset 6 */ -+ u8 sw1:4; -+ u8 qsel:4; -+ -+ /* offset 7 */ -+ u8 sw0; -+}; -+ -+#define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8)) -+#define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) -+ -+#define SET_TX_DESC_SEC_TYPE_8188E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+ -+void rtl8188e_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, -+ u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8188es_init_xmit_priv(PADAPTER padapter); -+ void rtl8188es_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8188es_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8188es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ thread_return rtl8188es_xmit_thread(thread_context context); -+ s32 rtl8188es_xmit_buf_handler(PADAPTER padapter); -+ -+ #ifdef CONFIG_SDIO_TX_TASKLET -+ void rtl8188es_xmit_tasklet(void *priv); -+ #endif -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ s32 rtl8188eu_init_xmit_priv(PADAPTER padapter); -+ void rtl8188eu_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8188eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8188eu_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter); -+ void rtl8188eu_xmit_tasklet(void *priv); -+ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8188ee_init_xmit_priv(PADAPTER padapter); -+ void rtl8188ee_free_xmit_priv(PADAPTER padapter); -+ void rtl8188ee_xmitframe_resume(_adapter *padapter); -+ s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8188ee_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8188ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ void rtl8188ee_xmit_tasklet(void *priv); -+#endif -+ -+ -+ -+#ifdef CONFIG_TX_EARLY_MODE -+ void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif -+ -+#ifdef CONFIG_XMIT_ACK -+ void dump_txrpt_ccx_88e(void *buf); -+ void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf); -+#else -+ #define dump_txrpt_ccx_88e(buf) do {} while (0) -+ #define handle_txrpt_ccx_88e(adapter, buf) do {} while (0) -+#endif /* CONFIG_XMIT_ACK */ -+ -+void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -+#endif /* __RTL8188E_XMIT_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188f_cmd.h b/drivers/staging/rtl8723cs/include/rtl8188f_cmd.h -new file mode 100644 -index 000000000000..6f33708e93cc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188f_cmd.h -@@ -0,0 +1,200 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188F_CMD_H__ -+#define __RTL8188F_CMD_H__ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+enum h2c_cmd_8188F { -+ /* Common Class: 000 */ -+ H2C_8188F_RSVD_PAGE = 0x00, -+ H2C_8188F_MEDIA_STATUS_RPT = 0x01, -+ H2C_8188F_SCAN_ENABLE = 0x02, -+ H2C_8188F_KEEP_ALIVE = 0x03, -+ H2C_8188F_DISCON_DECISION = 0x04, -+ H2C_8188F_PSD_OFFLOAD = 0x05, -+ H2C_8188F_AP_OFFLOAD = 0x08, -+ H2C_8188F_BCN_RSVDPAGE = 0x09, -+ H2C_8188F_PROBERSP_RSVDPAGE = 0x0A, -+ H2C_8188F_FCS_RSVDPAGE = 0x10, -+ H2C_8188F_FCS_INFO = 0x11, -+ H2C_8188F_AP_WOW_GPIO_CTRL = 0x13, -+ -+ /* PoweSave Class: 001 */ -+ H2C_8188F_SET_PWR_MODE = 0x20, -+ H2C_8188F_PS_TUNING_PARA = 0x21, -+ H2C_8188F_PS_TUNING_PARA2 = 0x22, -+ H2C_8188F_P2P_LPS_PARAM = 0x23, -+ H2C_8188F_P2P_PS_OFFLOAD = 0x24, -+ H2C_8188F_PS_SCAN_ENABLE = 0x25, -+ H2C_8188F_SAP_PS_ = 0x26, -+ H2C_8188F_INACTIVE_PS_ = 0x27, /* Inactive_PS */ -+ H2C_8188F_FWLPS_IN_IPS_ = 0x28, -+ -+ /* Dynamic Mechanism Class: 010 */ -+ H2C_8188F_MACID_CFG = 0x40, -+ H2C_8188F_TXBF = 0x41, -+ H2C_8188F_RSSI_SETTING = 0x42, -+ H2C_8188F_AP_REQ_TXRPT = 0x43, -+ H2C_8188F_INIT_RATE_COLLECT = 0x44, -+ H2C_8188F_RA_PARA_ADJUST = 0x46, -+ -+ /* BT Class: 011 */ -+ H2C_8188F_B_TYPE_TDMA = 0x60, -+ H2C_8188F_BT_INFO = 0x61, -+ H2C_8188F_FORCE_BT_TXPWR = 0x62, -+ H2C_8188F_BT_IGNORE_WLANACT = 0x63, -+ H2C_8188F_DAC_SWING_VALUE = 0x64, -+ H2C_8188F_ANT_SEL_RSV = 0x65, -+ H2C_8188F_WL_OPMODE = 0x66, -+ H2C_8188F_BT_MP_OPER = 0x67, -+ H2C_8188F_BT_CONTROL = 0x68, -+ H2C_8188F_BT_WIFI_CTRL = 0x69, -+ H2C_8188F_BT_FW_PATCH = 0x6A, -+ H2C_8188F_BT_WLAN_CALIBRATION = 0x6D, -+ -+ /* WOWLAN Class: 100 */ -+ H2C_8188F_WOWLAN = 0x80, -+ H2C_8188F_REMOTE_WAKE_CTRL = 0x81, -+ H2C_8188F_AOAC_GLOBAL_INFO = 0x82, -+ H2C_8188F_AOAC_RSVD_PAGE = 0x83, -+ H2C_8188F_AOAC_RSVD_PAGE2 = 0x84, -+ H2C_8188F_D0_SCAN_OFFLOAD_CTRL = 0x85, -+ H2C_8188F_D0_SCAN_OFFLOAD_INFO = 0x86, -+ H2C_8188F_CHNL_SWITCH_OFFLOAD = 0x87, -+ H2C_8188F_P2P_OFFLOAD_RSVD_PAGE = 0x8A, -+ H2C_8188F_P2P_OFFLOAD = 0x8B, -+ -+ H2C_8188F_RESET_TSF = 0xC0, -+ H2C_8188F_MAXID, -+}; -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- -+ * _RSVDPAGE_LOC_CMD_0x00 */ -+#define SET_8188F_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8188F_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8188F_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8188F_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8188F_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+/* _KEEP_ALIVE_CMD_0x03 */ -+#define SET_8188F_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8188F_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8188F_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_8188F_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+ -+/* _DISCONNECT_DECISION_CMD_0x04 */ -+#define SET_8188F_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8188F_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8188F_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8188F_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+ -+/* _PWR_MOD_CMD_0x20 */ -+#define SET_8188F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8188F_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_8188F_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_8188F_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8188F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8188F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -+#define SET_8188F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+#define GET_8188F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) -+ -+/* _PS_TUNE_PARAM_CMD_0x21 */ -+#define SET_8188F_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8188F_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8188F_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -+#define SET_8188F_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -+#define SET_8188F_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _MACID_CFG_CMD_0x40 */ -+#define SET_8188F_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -+#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) -+ -+/* _RSSI_SETTING_CMD_0x42 */ -+#define SET_8188F_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8188F_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -+#define SET_8188F_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _AP_REQ_TXRPT_CMD_0x43 */ -+#define SET_8188F_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8188F_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+ -+/* _FORCE_BT_TXPWR_CMD_0x62 */ -+#define SET_8188F_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+ -+/* _FORCE_BT_MP_OPER_CMD_0x67 */ -+#define SET_8188F_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_8188F_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -+#define SET_8188F_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8188F_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+#define SET_8188F_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8188F_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+ -+/* _BT_FW_PATCH_0x6A */ -+#define SET_8188F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) -+#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) -+ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ------------------------------------------- Structure -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- Function Statement -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+/* host message to firmware cmd */ -+void rtl8188f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -+void rtl8188f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -+void rtl8188f_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); -+/* s32 rtl8188f_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -+void rtl8188f_set_FwPsTuneParam_cmd(PADAPTER padapter); -+void rtl8188f_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); -+void rtl8188f_download_rsvd_page(PADAPTER padapter, u8 mstatus); -+#ifdef CONFIG_BT_COEXIST -+ void rtl8188f_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -+#endif /* CONFIG_BT_COEXIST */ -+#ifdef CONFIG_P2P -+void rtl8188f_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_P2P_WOWLAN -+void rtl8188f_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -+#endif -+ -+void rtl8188f_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); -+ -+s32 FillH2CCmd8188F(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+u8 GetTxBufferRsvdPageNum8188F(_adapter *padapter, bool wowlan); -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8188f_dm.h b/drivers/staging/rtl8723cs/include/rtl8188f_dm.h -new file mode 100644 -index 000000000000..342ade9a515c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188f_dm.h -@@ -0,0 +1,39 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188F_DM_H__ -+#define __RTL8188F_DM_H__ -+/* ************************************************************ -+ * Description: -+ * -+ * This file is for 8188F dynamic mechanism only -+ * -+ * -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * structure and define -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * function prototype -+ * ************************************************************ */ -+ -+void rtl8188f_init_dm_priv(PADAPTER padapter); -+void rtl8188f_deinit_dm_priv(PADAPTER padapter); -+ -+void rtl8188f_InitHalDm(PADAPTER padapter); -+void rtl8188f_HalDmWatchDog(PADAPTER padapter); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8188f_hal.h b/drivers/staging/rtl8723cs/include/rtl8188f_hal.h -new file mode 100644 -index 000000000000..5db99a41e50b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188f_hal.h -@@ -0,0 +1,260 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188F_HAL_H__ -+#define __RTL8188F_HAL_H__ -+ -+#include "hal_data.h" -+ -+#include "rtl8188f_spec.h" -+#include "rtl8188f_rf.h" -+#include "rtl8188f_dm.h" -+#include "rtl8188f_recv.h" -+#include "rtl8188f_xmit.h" -+#include "rtl8188f_cmd.h" -+#include "rtl8188f_led.h" -+#include "Hal8188FPwrSeq.h" -+#include "Hal8188FPhyReg.h" -+#include "Hal8188FPhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+#include "rtl8188f_sreset.h" -+#endif -+ -+#define FW_8188F_SIZE 0x8000 -+#define FW_8188F_START_ADDRESS 0x1000 -+#define FW_8188F_END_ADDRESS 0x1FFF /* 0x5FFF */ -+ -+#define IS_FW_HEADER_EXIST_8188F(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x88F0) -+ -+typedef struct _RT_FIRMWARE { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[FW_8188F_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8188F, *PRT_FIRMWARE_8188F; -+ -+/* -+ * This structure must be cared byte-ordering -+ * -+ * Added by tynli. 2009.12.04. */ -+typedef struct _RT_8188F_FIRMWARE_HDR { -+ /* 8-byte alinment required */ -+ -+ /* --- LONG WORD 0 ---- */ -+ u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ -+ u8 Category; /* AP/NIC and USB/PCI */ -+ u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -+ u16 Version; /* FW Version */ -+ u16 Subversion; /* FW Subversion, default 0x00 */ -+ -+ /* --- LONG WORD 1 ---- */ -+ u8 Month; /* Release time Month field */ -+ u8 Date; /* Release time Date field */ -+ u8 Hour; /* Release time Hour field */ -+ u8 Minute; /* Release time Minute field */ -+ u16 RamCodeSize; /* The size of RAM code */ -+ u16 Rsvd2; -+ -+ /* --- LONG WORD 2 ---- */ -+ u32 SvnIdx; /* The SVN entry index */ -+ u32 Rsvd3; -+ -+ /* --- LONG WORD 3 ---- */ -+ u32 Rsvd4; -+ u32 Rsvd5; -+} RT_8188F_FIRMWARE_HDR, *PRT_8188F_FIRMWARE_HDR; -+ -+#define DRIVER_EARLY_INT_TIME_8188F 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8188F 0x02 -+ -+/* for 8188F -+ * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ -+#define PAGE_SIZE_TX_8188F 128 -+#define PAGE_SIZE_RX_8188F 8 -+ -+#define RX_DMA_SIZE_8188F 0x4000 /* 16K */ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8188F 0x100 /* 256B, reserved for c2h debug message */ -+#else -+ #define RX_DMA_RESERVED_SIZE_8188F 0x80 /* 128B, reserved for tx report */ -+#endif -+ -+#ifdef CONFIG_WOWLAN -+ #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -+#else -+ #define RESV_FMWF 0 -+#endif -+ -+#define RX_DMA_BOUNDARY_8188F (RX_DMA_SIZE_8188F - RX_DMA_RESERVED_SIZE_8188F - 1) -+ -+/* Note: We will divide number of page equally for each queue other than public queue! */ -+ -+/* For General Reserved Page Number(Beacon Queue is reserved page) -+ * BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_8188F, -+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1, CTS-2-SELF / LTE QoS Null */ -+ -+#define BCNQ_PAGE_NUM_8188F (MAX_BEACON_LEN / PAGE_SIZE_TX_8188F + 6) /*0x08*/ -+ -+/* For WoWLan , more reserved page -+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt:1 ,PNO: 6 -+ * NS offload:2 NDP info: 1 -+ */ -+#ifdef CONFIG_WOWLAN -+ #define WOWLAN_PAGE_NUM_8188F 0x0b -+#else -+ #define WOWLAN_PAGE_NUM_8188F 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+#undef WOWLAN_PAGE_NUM_8188F -+#define WOWLAN_PAGE_NUM_8188F 0x15 -+#endif -+ -+#ifdef CONFIG_AP_WOWLAN -+#define AP_WOWLAN_PAGE_NUM_8188F 0x02 -+#endif -+ -+#define TX_TOTAL_PAGE_NUMBER_8188F (0xFF - BCNQ_PAGE_NUM_8188F - WOWLAN_PAGE_NUM_8188F) -+#define TX_PAGE_BOUNDARY_8188F (TX_TOTAL_PAGE_NUMBER_8188F + 1) -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8188F TX_TOTAL_PAGE_NUMBER_8188F -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8188F (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8188F + 1) -+ -+/* For Normal Chip Setting -+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8188F */ -+#define NORMAL_PAGE_NUM_HPQ_8188F 0x0C -+#define NORMAL_PAGE_NUM_LPQ_8188F 0x02 -+#define NORMAL_PAGE_NUM_NPQ_8188F 0x02 -+ -+/* Note: For Normal Chip Setting, modify later */ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8188F 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8188F 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8188F 0x20 -+ -+ -+#include "HalVerDef.h" -+#include "hal_com.h" -+ -+#define EFUSE_OOB_PROTECT_BYTES (34 + 1) -+ -+#define HAL_EFUSE_MEMORY -+ -+#define HWSET_MAX_SIZE_8188F 512 -+#define EFUSE_REAL_CONTENT_LEN_8188F 256 -+#define EFUSE_MAP_LEN_8188F 512 -+#define EFUSE_MAX_SECTION_8188F (EFUSE_MAP_LEN_8188F / 8) -+ -+#define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8188F) -+ -+#define EFUSE_ACCESS_ON 0x69 /* For RTL8188 only. */ -+#define EFUSE_ACCESS_OFF 0x00 /* For RTL8188 only. */ -+ -+/* ******************************************************** -+ * EFUSE for BT definition -+ * ******************************************************** */ -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 -+#define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */ -+#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -+#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ -+ -+#define EFUSE_PROTECT_BYTES_BANK 16 -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+/* rtl8188a_hal_init.c */ -+s32 rtl8188f_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -+void rtl8188f_FirmwareSelfReset(PADAPTER padapter); -+void rtl8188f_InitializeFirmwareVars(PADAPTER padapter); -+ -+void rtl8188f_InitAntenna_Selection(PADAPTER padapter); -+void rtl8188f_DeinitAntenna_Selection(PADAPTER padapter); -+void rtl8188f_CheckAntenna_Selection(PADAPTER padapter); -+void rtl8188f_init_default_value(PADAPTER padapter); -+ -+s32 rtl8188f_InitLLTTable(PADAPTER padapter); -+ -+s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -+s32 CardDisableWithoutHWSM(PADAPTER padapter); -+ -+/* EFuse */ -+u8 GetEEPROMSize8188F(PADAPTER padapter); -+void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -+void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -+void Hal_EfuseParseTxPowerInfo_8188F(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -+/* void Hal_EfuseParseBTCoexistInfo_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); */ -+void Hal_EfuseParseEEPROMVer_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseChnlPlan_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseCustomerID_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParsePowerSavingMode_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseAntennaDiversity_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8188F(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseThermalMeter_8188F(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseKFreeData_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+ -+#if 0 /* Do not need for rtl8188f */ -+void Hal_EfuseParseVoltage_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+#endif -+ -+void rtl8188f_set_pll_ref_clk_sel(_adapter *adapter, u8 sel); -+ -+void rtl8188f_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8188f(_adapter *adapter); -+u8 SetHwReg8188F(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg8188F(PADAPTER padapter, u8 variable, u8 *val); -+u8 SetHalDefVar8188F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8188F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+ -+/* register */ -+void rtl8188f_InitBeaconParameters(PADAPTER padapter); -+void rtl8188f_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -+void _InitBurstPktLen_8188FS(PADAPTER Adapter); -+void _8051Reset8188(PADAPTER padapter); -+#ifdef CONFIG_WOWLAN -+void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif /* CONFIG_WOWLAN */ -+ -+void rtl8188f_start_thread(_adapter *padapter); -+void rtl8188f_stop_thread(_adapter *padapter); -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+ void rtl8188fs_init_checkbthang_workqueue(_adapter *adapter); -+ void rtl8188fs_free_checkbthang_workqueue(_adapter *adapter); -+ void rtl8188fs_cancle_checkbthang_workqueue(_adapter *adapter); -+ void rtl8188fs_hal_check_bt_hang(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_GPIO_WAKEUP -+void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -+#endif -+ -+#ifdef CONFIG_MP_INCLUDED -+int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -+#endif -+ -+void CCX_FwC2HTxRpt_8188f(PADAPTER padapter, u8 *pdata, u8 len); -+ -+u8 MRateToHwRate8188F(u8 rate); -+u8 HwRateToMRate8188F(u8 rate); -+ -+#ifdef CONFIG_PCI_HCI -+BOOLEAN InterruptRecognized8188FE(PADAPTER Adapter); -+void UpdateInterruptMask8188FE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8188f_led.h b/drivers/staging/rtl8723cs/include/rtl8188f_led.h -new file mode 100644 -index 000000000000..ef5d1a7761a8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188f_led.h -@@ -0,0 +1,45 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188F_LED_H__ -+#define __RTL8188F_LED_H__ -+#ifdef CONFIG_RTW_SW_LED -+ -+#include -+#include -+#include -+ -+ -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+#ifdef CONFIG_USB_HCI -+void rtl8188fu_InitSwLeds(PADAPTER padapter); -+void rtl8188fu_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+void rtl8188fs_InitSwLeds(PADAPTER padapter); -+void rtl8188fs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_GSPI_HCI -+void rtl8188fs_InitSwLeds(PADAPTER padapter); -+void rtl8188fs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+void rtl8188fe_InitSwLeds(PADAPTER padapter); -+void rtl8188fe_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif -+#endif/*CONFIG_RTW_SW_LED*/ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188f_recv.h b/drivers/staging/rtl8723cs/include/rtl8188f_recv.h -new file mode 100644 -index 000000000000..44b51fdbb9ca ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188f_recv.h -@@ -0,0 +1,64 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188F_RECV_H__ -+#define __RTL8188F_RECV_H__ -+ -+#if defined(CONFIG_USB_HCI) -+ #ifndef MAX_RECVBUF_SZ -+ -+ #ifdef CONFIG_MINIMAL_MEMORY_USAGE -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ #else -+ #ifdef CONFIG_PLATFORM_HISILICON -+ #define MAX_RECVBUF_SZ (16384) /* 16k */ -+ #else -+ #define MAX_RECVBUF_SZ (32768) /* 32k */ -+ #endif -+ /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ -+ /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ -+ /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ -+ /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+#elif defined(CONFIG_PCI_HCI) -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+#elif defined(CONFIG_SDIO_HCI) -+ /* minmum 4K, multiple of 8-byte is required, multiple of sdio block size is prefered */ -+ #define MAX_RECVBUF_SZ _RND(RX_DMA_BOUNDARY_8188F + 1, 8) -+#endif /* CONFIG_SDIO_HCI */ -+ -+/* Rx smooth factor */ -+#define Rx_Smooth_Factor (20) -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+s32 rtl8188fs_init_recv_priv(PADAPTER padapter); -+void rtl8188fs_free_recv_priv(PADAPTER padapter); -+s32 rtl8188fs_recv_hdl(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+int rtl8188fu_init_recv_priv(_adapter *padapter); -+void rtl8188fu_free_recv_priv(_adapter *padapter); -+void rtl8188fu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8188fe_init_recv_priv(PADAPTER padapter); -+void rtl8188fe_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8188f_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8188F_RECV_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188f_rf.h b/drivers/staging/rtl8723cs/include/rtl8188f_rf.h -new file mode 100644 -index 000000000000..a0338313b580 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188f_rf.h -@@ -0,0 +1,25 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188F_RF_H__ -+#define __RTL8188F_RF_H__ -+ -+int PHY_RF6052_Config8188F(PADAPTER Adapter); -+ -+void -+PHY_RF6052SetBandwidth8188F( -+ PADAPTER Adapter, -+ enum channel_width Bandwidth); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8188f_spec.h b/drivers/staging/rtl8723cs/include/rtl8188f_spec.h -new file mode 100644 -index 000000000000..d947ba800627 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188f_spec.h -@@ -0,0 +1,275 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188F_SPEC_H__ -+#define __RTL8188F_SPEC_H__ -+ -+#include -+ -+ -+#define HAL_NAV_UPPER_UNIT_8188F 128 /* micro-second */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0000h ~ 0x00FFh System Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RSV_CTRL_8188F 0x001C /* 3 Byte */ -+#define REG_BT_WIFI_ANTENNA_SWITCH_8188F 0x0038 -+#define REG_HSISR_8188F 0x005c -+#define REG_PAD_CTRL1_8188F 0x0064 -+#define REG_AFE_CTRL_4_8188F 0x0078 -+#define REG_HMEBOX_DBG_0_8188F 0x0088 -+#define REG_HMEBOX_DBG_1_8188F 0x008A -+#define REG_HMEBOX_DBG_2_8188F 0x008C -+#define REG_HMEBOX_DBG_3_8188F 0x008E -+#define REG_HIMR0_8188F 0x00B0 -+#define REG_HISR0_8188F 0x00B4 -+#define REG_HIMR1_8188F 0x00B8 -+#define REG_HISR1_8188F 0x00BC -+#define REG_PMC_DBG_CTRL2_8188F 0x00CC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_C2HEVT_CMD_ID_8188F 0x01A0 -+#define REG_C2HEVT_CMD_LEN_8188F 0x01AE -+#define REG_WOWLAN_WAKE_REASON 0x01C7 -+#define REG_WOWLAN_GTK_DBG1 0x630 -+#define REG_WOWLAN_GTK_DBG2 0x634 -+ -+#define REG_HMEBOX_EXT0_8188F 0x01F0 -+#define REG_HMEBOX_EXT1_8188F 0x01F4 -+#define REG_HMEBOX_EXT2_8188F 0x01F8 -+#define REG_HMEBOX_EXT3_8188F 0x01FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RXDMA_CONTROL_8188F 0x0286 /* Control the RX DMA. */ -+#define REG_RXDMA_MODE_CTRL_8188F 0x0290 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0300h ~ 0x03FFh PCIe -+ * -+ * ----------------------------------------------------- */ -+#define REG_PCIE_CTRL_REG_8188F 0x0300 -+#define REG_INT_MIG_8188F 0x0304 /* Interrupt Migration */ -+#define REG_BCNQ_DESA_8188F 0x0308 /* TX Beacon Descriptor Address */ -+#define REG_HQ_DESA_8188F 0x0310 /* TX High Queue Descriptor Address */ -+#define REG_MGQ_DESA_8188F 0x0318 /* TX Manage Queue Descriptor Address */ -+#define REG_VOQ_DESA_8188F 0x0320 /* TX VO Queue Descriptor Address */ -+#define REG_VIQ_DESA_8188F 0x0328 /* TX VI Queue Descriptor Address */ -+#define REG_BEQ_DESA_8188F 0x0330 /* TX BE Queue Descriptor Address */ -+#define REG_BKQ_DESA_8188F 0x0338 /* TX BK Queue Descriptor Address */ -+#define REG_RX_DESA_8188F 0x0340 /* RX Queue Descriptor Address */ -+#define REG_DBI_WDATA_8188F 0x0348 /* DBI Write Data */ -+#define REG_DBI_RDATA_8188F 0x034C /* DBI Read Data */ -+#define REG_DBI_ADDR_8188F 0x0350 /* DBI Address */ -+#define REG_DBI_FLAG_8188F 0x0352 /* DBI Read/Write Flag */ -+#define REG_MDIO_WDATA_8188F 0x0354 /* MDIO for Write PCIE PHY */ -+#define REG_MDIO_RDATA_8188F 0x0356 /* MDIO for Reads PCIE PHY */ -+#define REG_MDIO_CTL_8188F 0x0358 /* MDIO for Control */ -+#define REG_DBG_SEL_8188F 0x0360 /* Debug Selection Register */ -+#define REG_PCIE_HRPWM_8188F 0x0361 /* PCIe RPWM */ -+#define REG_PCIE_HCPWM_8188F 0x0363 /* PCIe CPWM */ -+#define REG_PCIE_MULTIFET_CTRL_8188F 0x036A /* PCIE Multi-Fethc Control */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_TXPKTBUF_BCNQ_BDNY_8188F 0x0424 -+#define REG_TXPKTBUF_MGQ_BDNY_8188F 0x0425 -+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8188F 0x045D -+#ifdef CONFIG_WOWLAN -+#define REG_TXPKTBUF_IV_LOW 0x0484 -+#define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_AMPDU_BURST_MODE_8188F 0x04BC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_SECONDARY_CCA_CTRL_8188F 0x0577 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+ -+/* ************************************************************ -+ * SDIO Bus Specification -+ * ************************************************************ */ -+ -+/* ----------------------------------------------------- -+ * SDIO CMD Address Mapping -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * I/O bus domain (Host) -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * SDIO register -+ * ----------------------------------------------------- */ -+#define SDIO_REG_HIQ_FREEPG_8188F 0x0020 -+#define SDIO_REG_MID_FREEPG_8188F 0x0022 -+#define SDIO_REG_LOW_FREEPG_8188F 0x0024 -+#define SDIO_REG_PUB_FREEPG_8188F 0x0026 -+#define SDIO_REG_EXQ_FREEPG_8188F 0x0028 -+#define SDIO_REG_AC_OQT_FREEPG_8188F 0x002A -+#define SDIO_REG_NOAC_OQT_FREEPG_8188F 0x002B -+ -+#define SDIO_REG_HCPWM1_8188F 0x0038 -+ -+/* **************************************************************************** -+ * 8188 Regsiter Bit and Content definition -+ * **************************************************************************** */ -+ -+/* 2 HSISR -+ * interrupt mask which needs to clear */ -+#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ -+ HSISR_SPS_OCP_INT |\ -+ HSISR_RON_INT |\ -+ HSISR_PDNINT |\ -+ HSISR_GPIO9_INT) -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define BIT_USB_RXDMA_AGG_EN BIT(31) -+#define RXDMA_AGG_MODE_EN BIT(1) -+ -+#ifdef CONFIG_WOWLAN -+#define RXPKT_RELEASE_POLL BIT(16) -+#define RXDMA_IDLE BIT(17) -+#define RW_RELEASE_EN BIT(18) -+#endif -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ---------------------------------------------------------------------------- -+ * 8188F REG_CCK_CHECK (offset 0x454) -+ * ---------------------------------------------------------------------------- */ -+#define BIT_BCN_PORT_SEL BIT(5) -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ---------------------------------------------------------------------------- -+ * 8195 IMR/ISR bits (offset 0xB0, 8bits) -+ * ---------------------------------------------------------------------------- */ -+#define IMR_DISABLED_8188F 0 -+/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -+#define IMR_TIMER2_8188F BIT(31) /* Timeout interrupt 2 */ -+#define IMR_TIMER1_8188F BIT(30) /* Timeout interrupt 1 */ -+#define IMR_PSTIMEOUT_8188F BIT(29) /* Power Save Time Out Interrupt */ -+#define IMR_GTINT4_8188F BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -+#define IMR_GTINT3_8188F BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -+#define IMR_TXBCN0ERR_8188F BIT(26) /* Transmit Beacon0 Error */ -+#define IMR_TXBCN0OK_8188F BIT(25) /* Transmit Beacon0 OK */ -+#define IMR_TSF_BIT32_TOGGLE_8188F BIT(24) /* TSF Timer BIT(32) toggle indication interrupt */ -+#define IMR_BCNDMAINT0_8188F BIT(20) /* Beacon DMA Interrupt 0 */ -+#define IMR_BCNDERR0_8188F BIT(16) /* Beacon Queue DMA OK0 */ -+#define IMR_HSISR_IND_ON_INT_8188F BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -+#define IMR_BCNDMAINT_E_8188F BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -+#define IMR_ATIMEND_8188F BIT(12) /* CTWidnow End or ATIM Window End */ -+#define IMR_C2HCMD_8188F BIT(10) /* CPU to Host Command INT Status, Write 1 clear */ -+#define IMR_CPWM2_8188F BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_CPWM_8188F BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_HIGHDOK_8188F BIT(7) /* High Queue DMA OK */ -+#define IMR_MGNTDOK_8188F BIT(6) /* Management Queue DMA OK */ -+#define IMR_BKDOK_8188F BIT(5) /* AC_BK DMA OK */ -+#define IMR_BEDOK_8188F BIT(4) /* AC_BE DMA OK */ -+#define IMR_VIDOK_8188F BIT(3) /* AC_VI DMA OK */ -+#define IMR_VODOK_8188F BIT(2) /* AC_VO DMA OK */ -+#define IMR_RDU_8188F BIT(1) /* Rx Descriptor Unavailable */ -+#define IMR_ROK_8188F BIT(0) /* Receive DMA OK */ -+ -+/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -+#define IMR_BCNDMAINT7_8188F BIT(27) /* Beacon DMA Interrupt 7 */ -+#define IMR_BCNDMAINT6_8188F BIT(26) /* Beacon DMA Interrupt 6 */ -+#define IMR_BCNDMAINT5_8188F BIT(25) /* Beacon DMA Interrupt 5 */ -+#define IMR_BCNDMAINT4_8188F BIT(24) /* Beacon DMA Interrupt 4 */ -+#define IMR_BCNDMAINT3_8188F BIT(23) /* Beacon DMA Interrupt 3 */ -+#define IMR_BCNDMAINT2_8188F BIT(22) /* Beacon DMA Interrupt 2 */ -+#define IMR_BCNDMAINT1_8188F BIT(21) /* Beacon DMA Interrupt 1 */ -+#define IMR_BCNDOK7_8188F BIT(20) /* Beacon Queue DMA OK Interrupt 7 */ -+#define IMR_BCNDOK6_8188F BIT(19) /* Beacon Queue DMA OK Interrupt 6 */ -+#define IMR_BCNDOK5_8188F BIT(18) /* Beacon Queue DMA OK Interrupt 5 */ -+#define IMR_BCNDOK4_8188F BIT(17) /* Beacon Queue DMA OK Interrupt 4 */ -+#define IMR_BCNDOK3_8188F BIT(16) /* Beacon Queue DMA OK Interrupt 3 */ -+#define IMR_BCNDOK2_8188F BIT(15) /* Beacon Queue DMA OK Interrupt 2 */ -+#define IMR_BCNDOK1_8188F BIT(14) /* Beacon Queue DMA OK Interrupt 1 */ -+#define IMR_ATIMEND_E_8188F BIT(13) /* ATIM Window End Extension for Win7 */ -+#define IMR_TXERR_8188F BIT(11) /* Tx Error Flag Interrupt Status, write 1 clear. */ -+#define IMR_RXERR_8188F BIT(10) /* Rx Error Flag INT Status, Write 1 clear */ -+#define IMR_TXFOVW_8188F BIT(9) /* Transmit FIFO Overflow */ -+#define IMR_RXFOVW_8188F BIT(8) /* Receive FIFO Overflow */ -+ -+#ifdef CONFIG_PCI_HCI -+/* #define IMR_RX_MASK (IMR_ROK_8188F|IMR_RDU_8188F|IMR_RXFOVW_8188F) */ -+#define IMR_TX_MASK (IMR_VODOK_8188F | IMR_VIDOK_8188F | IMR_BEDOK_8188F | IMR_BKDOK_8188F | IMR_MGNTDOK_8188F | IMR_HIGHDOK_8188F) -+ -+#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8188F | IMR_TXBCN0OK_8188F | IMR_TXBCN0ERR_8188F | IMR_BCNDERR0_8188F) -+ -+#define RT_AC_INT_MASKS (IMR_VIDOK_8188F | IMR_VODOK_8188F | IMR_BEDOK_8188F | IMR_BKDOK_8188F) -+#endif -+ -+#endif /* __RTL8188F_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8188f_sreset.h b/drivers/staging/rtl8723cs/include/rtl8188f_sreset.h -new file mode 100644 -index 000000000000..fe56567e7396 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188f_sreset.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8188F_SRESET_H_ -+#define _RTL8188F_SRESET_H_ -+ -+#include -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+extern void rtl8188f_sreset_xmit_status_check(_adapter *padapter); -+extern void rtl8188f_sreset_linked_status_check(_adapter *padapter); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8188f_xmit.h b/drivers/staging/rtl8723cs/include/rtl8188f_xmit.h -new file mode 100644 -index 000000000000..7dafd9e415e1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8188f_xmit.h -@@ -0,0 +1,340 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8188F_XMIT_H__ -+#define __RTL8188F_XMIT_H__ -+ -+ -+#define MAX_TID (15) -+ -+ -+#ifndef __INC_HAL8188FDESC_H -+#define __INC_HAL8188FDESC_H -+ -+#define RX_STATUS_DESC_SIZE_8188F 24 -+#define RX_DRV_INFO_SIZE_UNIT_8188F 8 -+ -+ -+/* DWORD 0 */ -+#define SET_RX_STATUS_DESC_PKT_LEN_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) -+ -+#define GET_RX_STATUS_DESC_PKT_LEN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICV_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_LAST_SEG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1) -+#define GET_RX_STATUS_DESC_FIRST_SEG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1) -+#define GET_RX_STATUS_DESC_EOR_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_OWN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+ -+/* DWORD 1 */ -+#define GET_RX_STATUS_DESC_MACID_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_TID_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_AMSDU_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_A1_FIT_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -+#define GET_RX_STATUS_DESC_CHKERR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_IPVER_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_IS_TCPUDP__8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_CHK_VLD_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_MC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) -+ -+/* DWORD 2 */ -+#define GET_RX_STATUS_DESC_SEQ_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -+#define GET_RX_STATUS_DESC_RX_IS_QOS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_RPT_SEL_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -+ -+/* DWORD 3 */ -+#define GET_RX_STATUS_DESC_RX_RATE_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_HTC_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -+#ifdef CONFIG_USB_RX_AGGREGATION -+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -+#endif -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) -+ -+/* DWORD 6 */ -+#define GET_RX_STATUS_DESC_SPLCP_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1) -+#define GET_RX_STATUS_DESC_LDPC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1) -+#define GET_RX_STATUS_DESC_STBC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1) -+#define GET_RX_STATUS_DESC_BW_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2) -+ -+/* DWORD 5 */ -+#define GET_RX_STATUS_DESC_TSFL_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) -+ -+#define GET_RX_STATUS_DESC_BUFF_ADDR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+#define GET_RX_STATUS_DESC_BUFF_ADDR64_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+#define SET_RX_STATUS_DESC_BUFF_ADDR_8188F(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) -+ -+ -+/* Dword 0 */ -+#define GET_TX_DESC_OWN_8188F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+#define SET_TX_DESC_PKT_SIZE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define SET_TX_DESC_OFFSET_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define SET_TX_DESC_BMC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_LAST_SEG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+#define SET_TX_DESC_FIRST_SEG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_LINIP_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+#define SET_TX_DESC_NO_ACM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+#define SET_TX_DESC_OWN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+/* Dword 1 */ -+#define SET_TX_DESC_MACID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+ -+ -+/* Dword 2 */ -+#define SET_TX_DESC_PAID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+#define SET_TX_DESC_CCA_RTS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_AGG_BREAK_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define SET_TX_DESC_RAW_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define SET_TX_DESC_SPE_RPT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_INT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_GID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+ -+ -+/* Dword 3 */ -+#define SET_TX_DESC_WHEADER_LEN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -+#define SET_TX_DESC_CHK_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -+#define SET_TX_DESC_EARLY_MODE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+#define SET_TX_DESC_HWSEQ_SEL_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_NDPA_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+/* Dword 4 */ -+#define SET_TX_DESC_TX_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+ -+ -+/* Dword 5 */ -+#define SET_TX_DESC_DATA_SC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_LDPC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+#define SET_TX_DESC_DATA_STBC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_CTROL_STBC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+ -+ -+/* Dword 6 */ -+#define SET_TX_DESC_SW_DEFINE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_MBSSID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+#define SET_TX_DESC_ANTSEL_A_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+#define SET_TX_DESC_ANTSEL_B_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+#define SET_TX_DESC_ANTSEL_C_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -+#define SET_TX_DESC_ANTSEL_D_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) -+ -+/* Dword 7 */ -+#ifdef CONFIG_PCI_HCI -+#define SET_TX_DESC_TX_BUFFER_SIZE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) -+#define SET_TX_DESC_TX_DESC_CHECKSUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+#define SET_TX_DESC_USB_TXAGG_NUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+#ifdef CONFIG_SDIO_HCI -+#define SET_TX_DESC_SDIO_TXSEQ_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) -+#endif -+ -+/* Dword 8 */ -+#define SET_TX_DESC_HWSEQ_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+ -+/* Dword 9 */ -+#define SET_TX_DESC_SEQ_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+ -+/* Dword 10 */ -+#define SET_TX_DESC_TX_BUFFER_ADDRESS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) -+#define GET_TX_DESC_TX_BUFFER_ADDRESS_8188F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) -+ -+/* Dword 11 */ -+#define SET_TX_DESC_NEXT_DESC_ADDRESS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) -+ -+ -+#define SET_EARLYMODE_PKTNUM_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+#endif -+/* ----------------------------------------------------------- -+ * -+ * Rate -+ * -+ * ----------------------------------------------------------- -+ * CCK Rates, TxHT = 0 */ -+#define DESC8188F_RATE1M 0x00 -+#define DESC8188F_RATE2M 0x01 -+#define DESC8188F_RATE5_5M 0x02 -+#define DESC8188F_RATE11M 0x03 -+ -+/* OFDM Rates, TxHT = 0 */ -+#define DESC8188F_RATE6M 0x04 -+#define DESC8188F_RATE9M 0x05 -+#define DESC8188F_RATE12M 0x06 -+#define DESC8188F_RATE18M 0x07 -+#define DESC8188F_RATE24M 0x08 -+#define DESC8188F_RATE36M 0x09 -+#define DESC8188F_RATE48M 0x0a -+#define DESC8188F_RATE54M 0x0b -+ -+/* MCS Rates, TxHT = 1 */ -+#define DESC8188F_RATEMCS0 0x0c -+#define DESC8188F_RATEMCS1 0x0d -+#define DESC8188F_RATEMCS2 0x0e -+#define DESC8188F_RATEMCS3 0x0f -+#define DESC8188F_RATEMCS4 0x10 -+#define DESC8188F_RATEMCS5 0x11 -+#define DESC8188F_RATEMCS6 0x12 -+#define DESC8188F_RATEMCS7 0x13 -+#define DESC8188F_RATEMCS8 0x14 -+#define DESC8188F_RATEMCS9 0x15 -+#define DESC8188F_RATEMCS10 0x16 -+#define DESC8188F_RATEMCS11 0x17 -+#define DESC8188F_RATEMCS12 0x18 -+#define DESC8188F_RATEMCS13 0x19 -+#define DESC8188F_RATEMCS14 0x1a -+#define DESC8188F_RATEMCS15 0x1b -+#define DESC8188F_RATEVHTSS1MCS0 0x2c -+#define DESC8188F_RATEVHTSS1MCS1 0x2d -+#define DESC8188F_RATEVHTSS1MCS2 0x2e -+#define DESC8188F_RATEVHTSS1MCS3 0x2f -+#define DESC8188F_RATEVHTSS1MCS4 0x30 -+#define DESC8188F_RATEVHTSS1MCS5 0x31 -+#define DESC8188F_RATEVHTSS1MCS6 0x32 -+#define DESC8188F_RATEVHTSS1MCS7 0x33 -+#define DESC8188F_RATEVHTSS1MCS8 0x34 -+#define DESC8188F_RATEVHTSS1MCS9 0x35 -+#define DESC8188F_RATEVHTSS2MCS0 0x36 -+#define DESC8188F_RATEVHTSS2MCS1 0x37 -+#define DESC8188F_RATEVHTSS2MCS2 0x38 -+#define DESC8188F_RATEVHTSS2MCS3 0x39 -+#define DESC8188F_RATEVHTSS2MCS4 0x3a -+#define DESC8188F_RATEVHTSS2MCS5 0x3b -+#define DESC8188F_RATEVHTSS2MCS6 0x3c -+#define DESC8188F_RATEVHTSS2MCS7 0x3d -+#define DESC8188F_RATEVHTSS2MCS8 0x3e -+#define DESC8188F_RATEVHTSS2MCS9 0x3f -+ -+ -+#define RX_HAL_IS_CCK_RATE_8188F(pDesc)\ -+ (GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE1M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE2M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE5_5M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE11M) -+ -+ -+void rtl8188f_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -+void rtl8188f_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+s32 rtl8188fs_init_xmit_priv(PADAPTER padapter); -+void rtl8188fs_free_xmit_priv(PADAPTER padapter); -+s32 rtl8188fs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8188fs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+s32 rtl8188fs_hal_mgmt_xmitframe_enqueue(PADAPTER, struct xmit_frame *); -+#endif -+s32 rtl8188fs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+s32 rtl8188fs_xmit_buf_handler(PADAPTER padapter); -+thread_return rtl8188fs_xmit_thread(thread_context context); -+#define hal_xmit_handler rtl8188fs_xmit_buf_handler -+#endif -+ -+#ifdef CONFIG_USB_HCI -+#ifdef CONFIG_XMIT_THREAD_MODE -+s32 rtl8188fu_xmit_buf_handler(PADAPTER padapter); -+#define hal_xmit_handler rtl8188fu_xmit_buf_handler -+#endif -+ -+s32 rtl8188fu_init_xmit_priv(PADAPTER padapter); -+void rtl8188fu_free_xmit_priv(PADAPTER padapter); -+s32 rtl8188fu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8188fu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+s32 rtl8188fu_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+s32 rtl8188fu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+/* s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); */ -+void rtl8188fu_xmit_tasklet(void *priv); -+s32 rtl8188fu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8188fe_init_xmit_priv(PADAPTER padapter); -+void rtl8188fe_free_xmit_priv(PADAPTER padapter); -+struct xmit_buf *rtl8188fe_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+void rtl8188fe_xmitframe_resume(_adapter *padapter); -+s32 rtl8188fe_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8188fe_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8188fe_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+void rtl8188fe_xmit_tasklet(void *priv); -+#endif -+ -+u8 BWMapping_8188F(PADAPTER Adapter, struct pkt_attrib *pattrib); -+u8 SCMapping_8188F(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8192e_cmd.h b/drivers/staging/rtl8723cs/include/rtl8192e_cmd.h -new file mode 100644 -index 000000000000..a9c8be840992 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192e_cmd.h -@@ -0,0 +1,141 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192E_CMD_H__ -+#define __RTL8192E_CMD_H__ -+ -+typedef enum _RTL8192E_H2C_CMD { -+ H2C_8192E_RSVDPAGE = 0x00, -+ H2C_8192E_MSRRPT = 0x01, -+ H2C_8192E_SCAN = 0x02, -+ H2C_8192E_KEEP_ALIVE_CTRL = 0x03, -+ H2C_8192E_DISCONNECT_DECISION = 0x04, -+ H2C_8192E_INIT_OFFLOAD = 0x06, -+ H2C_8192E_AP_OFFLOAD = 0x08, -+ H2C_8192E_BCN_RSVDPAGE = 0x09, -+ H2C_8192E_PROBERSP_RSVDPAGE = 0x0a, -+ -+ H2C_8192E_AP_WOW_GPIO_CTRL = 0x13, -+ -+ H2C_8192E_SETPWRMODE = 0x20, -+ H2C_8192E_PS_TUNING_PARA = 0x21, -+ H2C_8192E_PS_TUNING_PARA2 = 0x22, -+ H2C_8192E_PS_LPS_PARA = 0x23, -+ H2C_8192E_P2P_PS_OFFLOAD = 0x24, -+ H2C_8192E_SAP_PS = 0x26, -+ H2C_8192E_RA_MASK = 0x40, -+ H2C_8192E_RSSI_REPORT = 0x42, -+ H2C_8192E_RA_PARA_ADJUST = 0x46, -+ -+ H2C_8192E_WO_WLAN = 0x80, -+ H2C_8192E_REMOTE_WAKE_CTRL = 0x81, -+ H2C_8192E_AOAC_GLOBAL_INFO = 0x82, -+ H2C_8192E_AOAC_RSVDPAGE = 0x83, -+ -+ /* Not defined in new 88E H2C CMD Format */ -+ H2C_8192E_SELECTIVE_SUSPEND_ROF_CMD, -+ H2C_8192E_P2P_PS_MODE, -+ H2C_8192E_PSD_RESULT, -+ MAX_8192E_H2CCMD -+} RTL8192E_H2C_CMD; -+ -+struct cmd_msg_parm { -+ u8 eid; /* element id */ -+ u8 sz; /* sz */ -+ u8 buf[6]; -+}; -+ -+enum { -+ PWRS -+}; -+ -+typedef struct _SETPWRMODE_PARM { -+ u8 Mode;/* 0:Active,1:LPS,2:WMMPS */ -+ /* u8 RLBM:4; */ /* 0:Min,1:Max,2: User define */ -+ u8 SmartPS_RLBM;/* LPS=0:PS_Poll,1:PS_Poll,2:NullData,WMM=0:PS_Poll,1:NullData */ -+ u8 AwakeInterval; /* unit: beacon interval */ -+ u8 bAllQueueUAPSD; -+ u8 PwrState;/* AllON(0x0c),RFON(0x04),RFOFF(0x00) */ -+} SETPWRMODE_PARM, *PSETPWRMODE_PARM; -+ -+struct H2C_SS_RFOFF_PARAM { -+ u8 ROFOn; /* 1: on, 0:off */ -+ u16 gpio_period; /* unit: 1024 us */ -+} __attribute__((packed)); -+ -+ -+typedef struct JOINBSSRPT_PARM_92E { -+ u8 OpMode; /* RT_MEDIA_STATUS */ -+#ifdef CONFIG_WOWLAN -+ u8 MacID; /* MACID */ -+#endif /* CONFIG_WOWLAN */ -+} JOINBSSRPT_PARM_92E, *PJOINBSSRPT_PARM_92E; -+ -+/* move to hal_com_h2c.h -+typedef struct _RSVDPAGE_LOC_92E { -+ u8 LocProbeRsp; -+ u8 LocPsPoll; -+ u8 LocNullData; -+ u8 LocQosNull; -+ u8 LocBTQosNull; -+} RSVDPAGE_LOC_92E, *PRSVDPAGE_LOC_92E; -+*/ -+ -+ -+/* _SETPWRMODE_PARM */ -+#define SET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8192E_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_8192E_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8192E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -+#define SET_8192E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+#define GET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) -+ -+/* _P2P_PS_OFFLOAD */ -+#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -+#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) -+ -+ -+/* host message to firmware cmd */ -+void rtl8192e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -+void rtl8192e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); -+s32 FillH2CCmd_8192E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+u8 GetTxBufferRsvdPageNum8192E(_adapter *padapter, bool wowlan); -+/* u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); */ -+s32 c2h_handler_8192e(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); -+#ifdef CONFIG_BT_COEXIST -+ void rtl8192e_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -+#endif /* CONFIG_BT_COEXIST */ -+#ifdef CONFIG_P2P_PS -+ void rtl8192e_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -+#endif /* CONFIG_P2P */ -+ -+/* / TX Feedback Content */ -+#define USEC_UNIT_FOR_8192E_C2H_TX_RPT_QUEUE_TIME 256 -+ -+#define GET_8192E_C2H_TX_RPT_QUEUE_SELECT(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 5) -+#define GET_8192E_C2H_TX_RPT_PKT_BROCAST(_Header) LE_BITS_TO_1BYTE((_Header + 0), 5, 1) -+#define GET_8192E_C2H_TX_RPT_LIFE_TIME_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 6, 1) -+#define GET_8192E_C2H_TX_RPT_RETRY_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 7, 1) -+#define GET_8192E_C2H_TX_RPT_MAC_ID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) -+#define GET_8192E_C2H_TX_RPT_DATA_RETRY_CNT(_Header) LE_BITS_TO_1BYTE((_Header + 2), 0, 6) -+#define GET_8192E_C2H_TX_RPT_QUEUE_TIME(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) /* In unit of 256 microseconds. */ -+#define GET_8192E_C2H_TX_RPT_FINAL_DATA_RATE(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8) -+ -+#endif /* __RTL8192E_CMD_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8192e_dm.h b/drivers/staging/rtl8723cs/include/rtl8192e_dm.h -new file mode 100644 -index 000000000000..0a65a1be370d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192e_dm.h -@@ -0,0 +1,28 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192E_DM_H__ -+#define __RTL8192E_DM_H__ -+ -+ -+void rtl8192e_init_dm_priv(PADAPTER Adapter); -+void rtl8192e_deinit_dm_priv(PADAPTER Adapter); -+void rtl8192e_InitHalDm(PADAPTER Adapter); -+void rtl8192e_HalDmWatchDog(PADAPTER Adapter); -+ -+/* void rtl8192c_dm_CheckTXPowerTracking(PADAPTER Adapter); */ -+ -+/* void rtl8192c_dm_RF_Saving(PADAPTER pAdapter, u8 bForceInNormal); */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8192e_hal.h b/drivers/staging/rtl8723cs/include/rtl8192e_hal.h -new file mode 100644 -index 000000000000..417147dabe78 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192e_hal.h -@@ -0,0 +1,330 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192E_HAL_H__ -+#define __RTL8192E_HAL_H__ -+ -+/* #include "hal_com.h" */ -+ -+#include "hal_data.h" -+ -+/* include HAL Related header after HAL Related compiling flags */ -+#include "rtl8192e_spec.h" -+#include "rtl8192e_rf.h" -+#include "rtl8192e_dm.h" -+#include "rtl8192e_recv.h" -+#include "rtl8192e_xmit.h" -+#include "rtl8192e_cmd.h" -+#include "rtl8192e_led.h" -+#include "Hal8192EPwrSeq.h" -+#include "Hal8192EPhyReg.h" -+#include "Hal8192EPhyCfg.h" -+ -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ #include "rtl8192e_sreset.h" -+#endif -+ -+/* --------------------------------------------------------------------- -+ * RTL8192E Power Configuration CMDs for PCIe interface -+ * --------------------------------------------------------------------- */ -+#define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow -+#define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow -+#define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow -+#define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow -+#define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow -+#define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow -+#define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow -+#define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow -+#define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow -+ -+ -+#if 1 /* download firmware related data structure */ -+#define FW_SIZE_8192E 0x8000 /* Compatible with RTL8192e Maximal RAM code size 32k */ -+#define FW_START_ADDRESS 0x1000 -+#define FW_END_ADDRESS 0x5FFF -+ -+ -+#define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) & 0xFFF0) == 0x92E0) -+ -+ -+ -+typedef struct _RT_FIRMWARE_8192E { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[FW_SIZE_8192E]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E; -+ -+/* -+ * This structure must be cared byte-ordering -+ * -+ * Added by tynli. 2009.12.04. */ -+ -+/* ***************************************************** -+ * Firmware Header(8-byte alinment required) -+ * ***************************************************** -+ * --- LONG WORD 0 ---- */ -+#define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ -+#define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) /* AP/NIC and USB/PCI */ -+#define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -+#define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)/* FW Version */ -+#define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) /* FW Subversion, default 0x00 */ -+#define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) -+ -+/* --- LONG WORD 1 ---- */ -+#define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) /* Release time Month field */ -+#define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) /* Release time Date field */ -+#define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)/* Release time Hour field */ -+#define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)/* Release time Minute field */ -+#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)/* The size of RAM code */ -+#define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) -+ -+/* --- LONG WORD 2 ---- */ -+#define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)/* The SVN entry index */ -+#define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) -+ -+/* --- LONG WORD 3 ---- */ -+#define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) -+#define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) -+ -+#endif /* download firmware related data structure */ -+ -+#define DRIVER_EARLY_INT_TIME_8192E 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8192E 0x02 -+#define RX_DMA_SIZE_8192E 0x4000 /* 16K*/ -+ -+#ifdef CONFIG_WOWLAN -+ #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -+#else -+ #define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8192E 0x100 /* 256B, reserved for c2h debug message*/ -+#else -+ #define RX_DMA_RESERVED_SIZE_8192E 0x40 /* 64B, reserved for c2h event(16bytes) or ccx(8 Bytes)*/ -+#endif -+#define MAX_RX_DMA_BUFFER_SIZE_8192E (RX_DMA_SIZE_8192E-RX_DMA_RESERVED_SIZE_8192E) /*RX 16K*/ -+ -+ -+#define PAGE_SIZE_TX_92E PAGE_SIZE_256 -+ -+/* For General Reserved Page Number(Beacon Queue is reserved page) -+ * if (CONFIG_2BCN_EN) Beacon:4, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 -+ * Beacon: MAX_BEACON_LEN / PAGE_SIZE_TX_92E -+ * PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1,CTS-2-SELF / LTE QoS Null*/ -+ -+#define RSVD_PAGE_NUM_8192E (MAX_BEACON_LEN / PAGE_SIZE_TX_92E + 6) /*0x08*/ -+/* For WoWLan , more reserved page -+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6 -+ * NS offload: 2 NDP info: 1 -+ */ -+#ifdef CONFIG_WOWLAN -+ #define WOWLAN_PAGE_NUM_8192E 0x0b -+#else -+ #define WOWLAN_PAGE_NUM_8192E 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+ #undef WOWLAN_PAGE_NUM_8192E -+ #define WOWLAN_PAGE_NUM_8192E 0x0d -+#endif -+ -+/* Note: -+Tx FIFO Size : 64KB -+Tx page Size : 256B -+Total page numbers : 256(0x100) -+*/ -+ -+#define TOTAL_RSVD_PAGE_NUMBER_8192E (RSVD_PAGE_NUM_8192E + WOWLAN_PAGE_NUM_8192E) -+ -+#define TOTAL_PAGE_NUMBER_8192E (0x100) -+#define TX_TOTAL_PAGE_NUMBER_8192E (TOTAL_PAGE_NUMBER_8192E - TOTAL_RSVD_PAGE_NUMBER_8192E) -+ -+#define TX_PAGE_BOUNDARY_8192E (TX_TOTAL_PAGE_NUMBER_8192E) /* beacon header start address */ -+ -+ -+#define RSVD_PKT_LEN_92E (TOTAL_RSVD_PAGE_NUMBER_8192E * PAGE_SIZE_TX_92E) -+ -+#define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 /* 0xA5 */ -+#define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0 -+ -+/* For Normal Chip Setting -+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C */ -+ -+#define NORMAL_PAGE_NUM_HPQ_8192E 0x10 -+#define NORMAL_PAGE_NUM_LPQ_8192E 0x10 -+#define NORMAL_PAGE_NUM_NPQ_8192E 0x10 -+#define NORMAL_PAGE_NUM_EPQ_8192E 0x00 -+ -+ -+/* Note: For WMM Normal Chip Setting ,modify later */ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E -+#define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E -+#define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E -+ -+ -+/* ------------------------------------------------------------------------- -+ * Chip specific -+ * ------------------------------------------------------------------------- */ -+ -+/* pic buffer descriptor */ -+#define RTL8192EE_SEG_NUM TX_BUFFER_SEG_NUM -+#define TX_DESC_NUM_92E 128 -+#define RX_DESC_NUM_92E 128 -+ -+/* ------------------------------------------------------------------------- -+ * Channel Plan -+ * ------------------------------------------------------------------------- */ -+ -+#define HWSET_MAX_SIZE_8192E 512 -+ -+#define EFUSE_REAL_CONTENT_LEN_8192E 512 -+ -+#define EFUSE_MAP_LEN_8192E 512 -+#define EFUSE_MAX_SECTION_8192E 64 -+#define EFUSE_MAX_WORD_UNIT_8192E 4 -+#define EFUSE_IC_ID_OFFSET_8192E 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -+#define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E) -+/* -+ * To prevent out of boundary programming case, leave 1byte and program full section -+ * 9bytes + 1byt + 5bytes and pre 1byte. -+ * For worst case: -+ * | 1byte|----8bytes----|1byte|--5bytes--| -+ * | | Reserved(14bytes) | -+ * */ -+#define EFUSE_OOB_PROTECT_BYTES_8192E 15 /* PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. */ -+ -+ -+ -+/* ******************************************************** -+ * EFUSE for BT definition -+ * ******************************************************** */ -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512 -+#define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 /* 512*2 */ -+#define EFUSE_BT_MAP_LEN_8192E 1024 /* 1k bytes */ -+#define EFUSE_BT_MAX_SECTION_8192E 128 /* 1024/8 */ -+ -+#define EFUSE_PROTECT_BYTES_BANK_8192E 16 -+#define EFUSE_MAX_BANK_8192E 3 -+/* *********************************************************** */ -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+/* #define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) */ -+ -+/* #define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) */ -+ -+/* rtl8812_hal_init.c */ -+void _8051Reset8192E(PADAPTER padapter); -+s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); -+void InitializeFirmwareVars8192E(PADAPTER padapter); -+ -+s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy); -+ -+/* EFuse */ -+u8 GetEEPROMSize8192E(PADAPTER padapter); -+void hal_InitPGData_8192E(PADAPTER padapter, u8 *PROMContent); -+void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo); -+void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadTxPowerInfo8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadBoardType8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadThermalMeter_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -+void Hal_ReadPAType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadAmplifierType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadRFEType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseKFreeData_8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+ -+u8 Hal_CrystalAFEAdjust(_adapter *Adapter); -+ -+BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter); -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif /* CONFIG_WOWLAN */ -+ -+/***********************************************************/ -+/* RTL8192E-MAC Setting */ -+void _InitQueueReservedPage_8192E(PADAPTER Adapter); -+void _InitQueuePriority_8192E(PADAPTER Adapter); -+void _InitTxBufferBoundary_8192E(PADAPTER Adapter, u8 txpktbuf_bndy); -+void _InitPageBoundary_8192E(PADAPTER Adapter); -+/* void _InitTransferPageSize_8192E(PADAPTER Adapter); */ -+void _InitDriverInfoSize_8192E(PADAPTER Adapter, u8 drvInfoSize); -+void _InitRDGSetting_8192E(PADAPTER Adapter); -+void _InitID_8192E(PADAPTER Adapter); -+void _InitNetworkType_8192E(PADAPTER Adapter); -+void _InitWMACSetting_8192E(PADAPTER Adapter); -+void _InitAdaptiveCtrl_8192E(PADAPTER Adapter); -+void _InitEDCA_8192E(PADAPTER Adapter); -+void _InitRetryFunction_8192E(PADAPTER Adapter); -+void _BBTurnOnBlock_8192E(PADAPTER Adapter); -+void _InitBeaconParameters_8192E(PADAPTER Adapter); -+void _InitBeaconMaxError_8192E( -+ PADAPTER Adapter, -+ BOOLEAN InfraMode -+); -+void SetBeaconRelatedRegisters8192E(PADAPTER padapter); -+void hal_ReadRFType_8192E(PADAPTER Adapter); -+/* RTL8192E-MAC Setting -+ ***********************************************************/ -+ -+u8 SetHwReg8192E(PADAPTER Adapter, u8 variable, u8 *val); -+void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8 *val); -+u8 -+SetHalDefVar8192E( -+ PADAPTER Adapter, -+ HAL_DEF_VARIABLE eVariable, -+ void *pValue -+); -+u8 -+GetHalDefVar8192E( -+ PADAPTER Adapter, -+ HAL_DEF_VARIABLE eVariable, -+ void *pValue -+); -+ -+void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8192e(_adapter *adapter); -+void rtl8192e_init_default_value(_adapter *padapter); -+ -+void rtl8192e_start_thread(_adapter *padapter); -+void rtl8192e_stop_thread(_adapter *padapter); -+ -+#ifdef CONFIG_PCI_HCI -+ BOOLEAN InterruptRecognized8192EE(PADAPTER Adapter); -+ u16 get_txbd_rw_reg(u16 ff_hwaddr); -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+ #ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ void _init_available_page_threshold(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); -+ #endif -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+ void rtl8192e_combo_card_WifiOnlyHwInit(PADAPTER Adapter); -+#endif -+ -+#endif /* __RTL8192E_HAL_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8192e_led.h b/drivers/staging/rtl8723cs/include/rtl8192e_led.h -new file mode 100644 -index 000000000000..3d795c4055a8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192e_led.h -@@ -0,0 +1,36 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192E_LED_H__ -+#define __RTL8192E_LED_H__ -+ -+#ifdef CONFIG_RTW_SW_LED -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+#ifdef CONFIG_USB_HCI -+ void rtl8192eu_InitSwLeds(PADAPTER padapter); -+ void rtl8192eu_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+ void rtl8192ee_InitSwLeds(PADAPTER padapter); -+ void rtl8192ee_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+ void rtl8192es_InitSwLeds(PADAPTER padapter); -+ void rtl8192es_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif -+#endif/*CONFIG_RTW_SW_LED*/ -diff --git a/drivers/staging/rtl8723cs/include/rtl8192e_recv.h b/drivers/staging/rtl8723cs/include/rtl8192e_recv.h -new file mode 100644 -index 000000000000..c19a98080835 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192e_recv.h -@@ -0,0 +1,175 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192E_RECV_H__ -+#define __RTL8192E_RECV_H__ -+ -+#if defined(CONFIG_USB_HCI) -+ -+ #ifndef MAX_RECVBUF_SZ -+ #ifdef CONFIG_MINIMAL_MEMORY_USAGE -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ #else -+ #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ -+ #elif defined(CONFIG_PLATFORM_HISILICON) -+ #define MAX_RECVBUF_SZ (16384) /* 16k */ -+ #else -+ #define MAX_RECVBUF_SZ (32768) /* 32k */ -+ #endif -+ /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ -+ /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ -+ /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ -+ /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ -+ #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 -+ #undef MAX_RECVBUF_SZ -+ #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ -+ #endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+#elif defined(CONFIG_PCI_HCI) -+ /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ -+ /* #define MAX_RECVBUF_SZ (9100) */ -+ /* #else */ -+ #define MAX_RECVBUF_SZ (4000) /* about 4K -+ * #endif */ -+ -+ -+#elif defined(CONFIG_SDIO_HCI) -+ -+ #define MAX_RECVBUF_SZ (16384) -+ -+#endif -+ -+ -+/* Rx smooth factor */ -+#define Rx_Smooth_Factor (20) -+ -+/* ************* -+ * [1] Rx Buffer Descriptor (for PCIE) buffer descriptor architecture -+ * DWORD 0 */ -+#define SET_RX_BUFFER_DESC_DATA_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) -+#define SET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value) -+#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value) -+ -+#define GET_RX_BUFFER_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+#define GET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1) -+#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) -+ -+ -+/* DWORD 1 */ -+#define SET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) -+#define GET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 32) -+ -+/* DWORD 2 */ -+#define SET_RX_BUFFER_PHYSICAL_HIGH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) -+ -+/* ************* -+ * [2] Rx Descriptor -+ * DWORD 0 */ -+#define GET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICVERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+ -+ -+#define SET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) -+ -+/* DWORD 1 */ -+#define GET_RX_STATUS_DESC_MACID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_TID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_MACID_VLD_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 12, 1) -+#define GET_RX_STATUS_DESC_AMSDU_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_A1_FITS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 16, 4) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_MC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 31, 1) -+ -+/* DWORD 2 */ -+#define GET_RX_STATUS_DESC_SEQ_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -+#define GET_RX_STATUS_DESC_RX_IS_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -+ -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_HWRSVD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 24, 4) -+#define GET_RX_STATUS_DESC_FCS_OK_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) -+#define GET_RX_STATUS_DESC_RPT_SEL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -+ -+/* DWORD 3 */ -+#define GET_RX_STATUS_DESC_RX_RATE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_HTC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -+#define GET_RX_STATUS_DESC_DMA_AGG_NUM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -+ -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_WAKE_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) -+ -+/* DWORD 6 */ -+#define GET_RX_STATUS_DESC_SPLCP_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1) -+#define GET_RX_STATUS_DESC_LDPC_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1) -+#define GET_RX_STATUS_DESC_STBC_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1) -+#define GET_RX_STATUS_DESC_BW_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2) -+ -+ -+/* DWORD 5 */ -+#define GET_RX_STATUS_DESC_TSFL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) -+ -+#define GET_RX_STATUS_DESC_BUFF_ADDR_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+#define GET_RX_STATUS_DESC_BUFF_ADDR64_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+ -+#ifdef CONFIG_SDIO_HCI -+ s32 rtl8192es_init_recv_priv(PADAPTER padapter); -+ void rtl8192es_free_recv_priv(PADAPTER padapter); -+ s32 rtl8192es_recv_hdl(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ void rtl8192eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+ s32 rtl8192eu_init_recv_priv(PADAPTER padapter); -+ void rtl8192eu_free_recv_priv(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8192ee_init_recv_priv(PADAPTER padapter); -+ void rtl8192ee_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8192e_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8192E_RECV_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8192e_rf.h b/drivers/staging/rtl8723cs/include/rtl8192e_rf.h -new file mode 100644 -index 000000000000..77dca747e8fd ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192e_rf.h -@@ -0,0 +1,28 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192E_RF_H__ -+#define __RTL8192E_RF_H__ -+ -+void -+PHY_RF6052SetBandwidth8192E( -+ PADAPTER Adapter, -+ enum channel_width Bandwidth); -+ -+ -+int -+PHY_RF6052_Config_8192E( -+ PADAPTER Adapter); -+ -+#endif/* __RTL8192E_RF_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8192e_spec.h b/drivers/staging/rtl8723cs/include/rtl8192e_spec.h -new file mode 100644 -index 000000000000..c9b2b41e6e48 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192e_spec.h -@@ -0,0 +1,313 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192E_SPEC_H__ -+#define __RTL8192E_SPEC_H__ -+ -+#include -+ -+#define HAL_NAV_UPPER_UNIT_8192E 128 /* micro-second */ -+ -+/* ************************************************************ -+ * 8192E Regsiter offset definition -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * -+ * ************************************************************ */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0000h ~ 0x00FFh System Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_SYS_SWR_CTRL1_8192E 0x0010 /* 1 Byte */ -+#define REG_SYS_SWR_CTRL2_8192E 0x0014 /* 1 Byte */ -+#define REG_AFE_CTRL1_8192E 0x0024 -+#define REG_AFE_CTRL2_8192E 0x0028 -+#define REG_AFE_CTRL3_8192E 0x002c -+ -+#define REG_PAD_CTRL1_8192E 0x0064 -+#define REG_SDIO_CTRL_8192E 0x0070 -+#define REG_OPT_CTRL_8192E 0x0074 -+#define REG_RF_B_CTRL_8192E 0x0076 -+#define REG_AFE_CTRL4_8192E 0x0078 -+#define REG_LDO_SWR_CTRL 0x007C -+#define REG_FW_DRV_MSG_8192E 0x0088 -+#define REG_HMEBOX_E2_E3_8192E 0x008C -+#define REG_HIMR0_8192E 0x00B0 -+#define REG_HISR0_8192E 0x00B4 -+#define REG_HIMR1_8192E 0x00B8 -+#define REG_HISR1_8192E 0x00BC -+ -+#define REG_SYS_CFG1_8192E 0x00F0 -+#define REG_SYS_CFG2_8192E 0x00FC -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) -+#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) -+#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) -+#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN -+ -+#define REG_RSVD3_8192E 0x0168 -+#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -+#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -+#define REG_C2HEVT_CMD_LEN_88XX 0x01AE -+ -+#define REG_HMEBOX_EXT0_8192E 0x01F0 -+#define REG_HMEBOX_EXT1_8192E 0x01F4 -+#define REG_HMEBOX_EXT2_8192E 0x01F8 -+#define REG_HMEBOX_EXT3_8192E 0x01FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_DWBCN0_CTRL 0x0208 -+#define REG_DWBCN1_CTRL 0x0228 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RXDMA_8192E 0x0290 -+#define REG_EARLY_MODE_CONTROL_8192E 0x02BC -+ -+#define REG_RSVD5_8192E 0x02F0 -+#define REG_RSVD6_8192E 0x02F4 -+#define REG_RSVD7_8192E 0x02F8 -+#define REG_RSVD8_8192E 0x02FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0300h ~ 0x03FFh PCIe -+ * -+ * ----------------------------------------------------- */ -+#define REG_PCIE_CTRL_REG_8192E 0x0300 -+#define REG_INT_MIG_8192E 0x0304 /* Interrupt Migration */ -+#define REG_BCNQ_TXBD_DESA_8192E 0x0308 /* TX Beacon Descriptor Address */ -+#define REG_MGQ_TXBD_DESA_8192E 0x0310 /* TX Manage Queue Descriptor Address */ -+#define REG_VOQ_TXBD_DESA_8192E 0x0318 /* TX VO Queue Descriptor Address */ -+#define REG_VIQ_TXBD_DESA_8192E 0x0320 /* TX VI Queue Descriptor Address */ -+#define REG_BEQ_TXBD_DESA_8192E 0x0328 /* TX BE Queue Descriptor Address */ -+#define REG_BKQ_TXBD_DESA_8192E 0x0330 /* TX BK Queue Descriptor Address */ -+#define REG_RXQ_RXBD_DESA_8192E 0x0338 /* RX Queue Descriptor Address */ -+#define REG_HI0Q_TXBD_DESA_8192E 0x0340 -+#define REG_HI1Q_TXBD_DESA_8192E 0x0348 -+#define REG_HI2Q_TXBD_DESA_8192E 0x0350 -+#define REG_HI3Q_TXBD_DESA_8192E 0x0358 -+#define REG_HI4Q_TXBD_DESA_8192E 0x0360 -+#define REG_HI5Q_TXBD_DESA_8192E 0x0368 -+#define REG_HI6Q_TXBD_DESA_8192E 0x0370 -+#define REG_HI7Q_TXBD_DESA_8192E 0x0378 -+#define REG_MGQ_TXBD_NUM_8192E 0x0380 -+#define REG_RX_RXBD_NUM_8192E 0x0382 -+#define REG_VOQ_TXBD_NUM_8192E 0x0384 -+#define REG_VIQ_TXBD_NUM_8192E 0x0386 -+#define REG_BEQ_TXBD_NUM_8192E 0x0388 -+#define REG_BKQ_TXBD_NUM_8192E 0x038A -+#define REG_HI0Q_TXBD_NUM_8192E 0x038C -+#define REG_HI1Q_TXBD_NUM_8192E 0x038E -+#define REG_HI2Q_TXBD_NUM_8192E 0x0390 -+#define REG_HI3Q_TXBD_NUM_8192E 0x0392 -+#define REG_HI4Q_TXBD_NUM_8192E 0x0394 -+#define REG_HI5Q_TXBD_NUM_8192E 0x0396 -+#define REG_HI6Q_TXBD_NUM_8192E 0x0398 -+#define REG_HI7Q_TXBD_NUM_8192E 0x039A -+#define REG_TSFTIMER_HCI_8192E 0x039C -+ -+/* Read Write Point */ -+#define REG_VOQ_TXBD_IDX_8192E 0x03A0 -+#define REG_VIQ_TXBD_IDX_8192E 0x03A4 -+#define REG_BEQ_TXBD_IDX_8192E 0x03A8 -+#define REG_BKQ_TXBD_IDX_8192E 0x03AC -+#define REG_MGQ_TXBD_IDX_8192E 0x03B0 -+#define REG_RXQ_TXBD_IDX_8192E 0x03B4 -+#define REG_HI0Q_TXBD_IDX_8192E 0x03B8 -+#define REG_HI1Q_TXBD_IDX_8192E 0x03BC -+#define REG_HI2Q_TXBD_IDX_8192E 0x03C0 -+#define REG_HI3Q_TXBD_IDX_8192E 0x03C4 -+#define REG_HI4Q_TXBD_IDX_8192E 0x03C8 -+#define REG_HI5Q_TXBD_IDX_8192E 0x03CC -+#define REG_HI6Q_TXBD_IDX_8192E 0x03D0 -+#define REG_HI7Q_TXBD_IDX_8192E 0x03D4 -+ -+#define REG_PCIE_HCPWM_8192EE 0x03D8 /* ?????? */ -+#define REG_PCIE_HRPWM_8192EE 0x03DC /* PCIe RPWM */ /* ?????? */ -+#define REG_DBI_WDATA_V1_8192E 0x03E8 -+#define REG_DBI_RDATA_V1_8192E 0x03EC -+#define REG_DBI_FLAG_V1_8192E 0x03F0 -+#define REG_MDIO_V1_8192E 0x3F4 -+#define REG_PCIE_MIX_CFG_8192E 0x3F8 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_TXBF_CTRL_8192E 0x042C -+#define REG_ARFR0_8192E 0x0444 -+#define REG_ARFR1_8192E 0x044C -+#define REG_CCK_CHECK_8192E 0x0454 -+#define REG_AMPDU_MAX_TIME_8192E 0x0456 -+#define REG_BCNQ1_BDNY_8192E 0x0457 -+ -+#define REG_AMPDU_MAX_LENGTH_8192E 0x0458 -+#define REG_WMAC_LBK_BUF_HD_8192E 0x045D -+#define REG_NDPA_OPT_CTRL_8192E 0x045F -+#define REG_DATA_SC_8192E 0x0483 -+#ifdef CONFIG_WOWLAN -+ #define REG_TXPKTBUF_IV_LOW 0x0484 -+ #define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_ARFR2_8192E 0x048C -+#define REG_ARFR3_8192E 0x0494 -+#define REG_TXRPT_START_OFFSET 0x04AC -+#define REG_AMPDU_BURST_MODE_8192E 0x04BC -+#define REG_HT_SINGLE_AMPDU_8192E 0x04C7 -+#define REG_MACID_PKT_DROP0_8192E 0x04D0 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_CTWND_8192E 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8192E 0x0577 -+#define REG_SCH_TXCMD_8192E 0x05F8 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_MAC_CR_8192E 0x0600 -+ -+#define REG_MAC_TX_SM_STATE_8192E 0x06B4 -+ -+/* Power */ -+#define REG_BFMER0_INFO_8192E 0x06E4 -+#define REG_BFMER1_INFO_8192E 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8192E 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8192E 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8192E 0x06FC -+ -+/* Hardware Port 2 */ -+#define REG_BFMEE_SEL_8192E 0x0714 -+#define REG_SND_PTCL_CTRL_8192E 0x0718 -+ -+ -+/* ----------------------------------------------------- -+ * -+ * Redifine register definition for compatibility -+ * -+ * ----------------------------------------------------- */ -+ -+/* TODO: use these definition when using REG_xxx naming rule. -+ * NOTE: DO NOT Remove these definition. Use later. */ -+#define ISR_8192E REG_HISR0_8192E -+ -+/* ---------------------------------------------------------------------------- -+ * 8192E IMR/ISR bits (offset 0xB0, 8bits) -+ * ---------------------------------------------------------------------------- */ -+#define IMR_DISABLED_8192E 0 -+/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -+#define IMR_TIMER2_8192E BIT(31) /* Timeout interrupt 2 */ -+#define IMR_TIMER1_8192E BIT(30) /* Timeout interrupt 1 */ -+#define IMR_PSTIMEOUT_8192E BIT(29) /* Power Save Time Out Interrupt */ -+#define IMR_GTINT4_8192E BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -+#define IMR_GTINT3_8192E BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -+#define IMR_TXBCN0ERR_8192E BIT(26) /* Transmit Beacon0 Error */ -+#define IMR_TXBCN0OK_8192E BIT(25) /* Transmit Beacon0 OK */ -+#define IMR_TSF_BIT32_TOGGLE_8192E BIT(24) /* TSF Timer BIT(32) toggle indication interrupt */ -+#define IMR_BCNDMAINT0_8192E BIT(20) /* Beacon DMA Interrupt 0 */ -+#define IMR_BCNDERR0_8192E BIT(16) /* Beacon Queue DMA OK0 */ -+#define IMR_HSISR_IND_ON_INT_8192E BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -+#define IMR_BCNDMAINT_E_8192E BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -+#define IMR_ATIMEND_8192E BIT(12) /* CTWidnow End or ATIM Window End */ -+#define IMR_C2HCMD_8192E BIT(10) /* CPU to Host Command INT Status, Write 1 clear */ -+#define IMR_CPWM2_8192E BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_CPWM_8192E BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_HIGHDOK_8192E BIT(7) /* High Queue DMA OK */ -+#define IMR_MGNTDOK_8192E BIT(6) /* Management Queue DMA OK */ -+#define IMR_BKDOK_8192E BIT(5) /* AC_BK DMA OK */ -+#define IMR_BEDOK_8192E BIT(4) /* AC_BE DMA OK */ -+#define IMR_VIDOK_8192E BIT(3) /* AC_VI DMA OK */ -+#define IMR_VODOK_8192E BIT(2) /* AC_VO DMA OK */ -+#define IMR_RDU_8192E BIT(1) /* Rx Descriptor Unavailable */ -+#define IMR_ROK_8192E BIT(0) /* Receive DMA OK */ -+ -+/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -+#define IMR_BCNDMAINT7_8192E BIT(27) /* Beacon DMA Interrupt 7 */ -+#define IMR_BCNDMAINT6_8192E BIT(26) /* Beacon DMA Interrupt 6 */ -+#define IMR_BCNDMAINT5_8192E BIT(25) /* Beacon DMA Interrupt 5 */ -+#define IMR_BCNDMAINT4_8192E BIT(24) /* Beacon DMA Interrupt 4 */ -+#define IMR_BCNDMAINT3_8192E BIT(23) /* Beacon DMA Interrupt 3 */ -+#define IMR_BCNDMAINT2_8192E BIT(22) /* Beacon DMA Interrupt 2 */ -+#define IMR_BCNDMAINT1_8192E BIT(21) /* Beacon DMA Interrupt 1 */ -+#define IMR_BCNDOK7_8192E BIT(20) /* Beacon Queue DMA OK Interrupt 7 */ -+#define IMR_BCNDOK6_8192E BIT(19) /* Beacon Queue DMA OK Interrupt 6 */ -+#define IMR_BCNDOK5_8192E BIT(18) /* Beacon Queue DMA OK Interrupt 5 */ -+#define IMR_BCNDOK4_8192E BIT(17) /* Beacon Queue DMA OK Interrupt 4 */ -+#define IMR_BCNDOK3_8192E BIT(16) /* Beacon Queue DMA OK Interrupt 3 */ -+#define IMR_BCNDOK2_8192E BIT(15) /* Beacon Queue DMA OK Interrupt 2 */ -+#define IMR_BCNDOK1_8192E BIT(14) /* Beacon Queue DMA OK Interrupt 1 */ -+#define IMR_ATIMEND_E_8192E BIT(13) /* ATIM Window End Extension for Win7 */ -+#define IMR_TXERR_8192E BIT(11) /* Tx Error Flag Interrupt Status, write 1 clear. */ -+#define IMR_RXERR_8192E BIT(10) /* Rx Error Flag INT Status, Write 1 clear */ -+#define IMR_TXFOVW_8192E BIT(9) /* Transmit FIFO Overflow */ -+#define IMR_RXFOVW_8192E BIT(8) /* Receive FIFO Overflow */ -+ -+/* ---------------------------------------------------------------------------- -+ * 8192E Auto LLT bits (offset 0x224, 8bits) -+ * ---------------------------------------------------------------------------- -+ * 224 REG_AUTO_LLT -+ * move to hal_com_reg.h */ -+ -+/* ---------------------------------------------------------------------------- -+ * 8192E Auto LLT bits (offset 0x290, 32bits) -+ * ---------------------------------------------------------------------------- */ -+#define BIT_DMA_MODE BIT(1) -+#define BIT_USB_RXDMA_AGG_EN BIT(31) -+ -+/* ---------------------------------------------------------------------------- -+ * 8192E REG_SYS_CFG1 (offset 0xF0, 32bits) -+ * ---------------------------------------------------------------------------- */ -+#define BIT_SPSLDO_SEL BIT(24) -+ -+ -+/* ---------------------------------------------------------------------------- -+ * 8192E REG_CCK_CHECK (offset 0x454, 8bits) -+ * ---------------------------------------------------------------------------- */ -+#define BIT_BCN_PORT_SEL BIT(5) -+ -+/* **************************************************************************** -+ * Regsiter Bit and Content definition -+ * **************************************************************************** */ -+ -+/* 2 ACMHWCTRL 0x05C0 */ -+#define AcmHw_HwEn_8192E BIT(0) -+#define AcmHw_VoqEn_8192E BIT(1) -+#define AcmHw_ViqEn_8192E BIT(2) -+#define AcmHw_BeqEn_8192E BIT(3) -+#define AcmHw_VoqStatus_8192E BIT(5) -+#define AcmHw_ViqStatus_8192E BIT(6) -+#define AcmHw_BeqStatus_8192E BIT(7) -+ -+#endif /* __RTL8192E_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8192e_sreset.h b/drivers/staging/rtl8723cs/include/rtl8192e_sreset.h -new file mode 100644 -index 000000000000..78109aea468f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192e_sreset.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL88812A_SRESET_H_ -+#define _RTL8812A_SRESET_H_ -+ -+#include -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ extern void rtl8192e_sreset_xmit_status_check(_adapter *padapter); -+ extern void rtl8192e_sreset_linked_status_check(_adapter *padapter); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8192e_xmit.h b/drivers/staging/rtl8723cs/include/rtl8192e_xmit.h -new file mode 100644 -index 000000000000..f84c6faf1922 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192e_xmit.h -@@ -0,0 +1,457 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192E_XMIT_H__ -+#define __RTL8192E_XMIT_H__ -+ -+typedef struct txdescriptor_8192e { -+ /* Offset 0 */ -+ u32 pktlen:16; -+ u32 offset:8; -+ u32 bmc:1; -+ u32 htc:1; -+ u32 ls:1; -+ u32 fs:1; -+ u32 linip:1; -+ u32 noacm:1; -+ u32 gf:1; -+ u32 own:1; -+ -+ /* Offset 4 */ -+ u32 macid:6; -+ u32 rsvd0406:2; -+ u32 qsel:5; -+ u32 rd_nav_ext:1; -+ u32 lsig_txop_en:1; -+ u32 pifs:1; -+ u32 rate_id:4; -+ u32 navusehdr:1; -+ u32 en_desc_id:1; -+ u32 sectype:2; -+ u32 rsvd0424:2; -+ u32 pkt_offset:5; /* unit: 8 bytes */ -+ u32 rsvd0431:1; -+ -+ /* Offset 8 */ -+ u32 rts_rc:6; -+ u32 data_rc:6; -+ u32 agg_en:1; -+ u32 rd_en:1; -+ u32 bar_rty_th:2; -+ u32 bk:1; -+ u32 morefrag:1; -+ u32 raw:1; -+ u32 ccx:1; -+ u32 ampdu_density:3; -+ u32 bt_null:1; -+ u32 ant_sel_a:1; -+ u32 ant_sel_b:1; -+ u32 tx_ant_cck:2; -+ u32 tx_antl:2; -+ u32 tx_ant_ht:2; -+ -+ /* Offset 12 */ -+ u32 nextheadpage:8; -+ u32 tailpage:8; -+ u32 seq:12; -+ u32 cpu_handle:1; -+ u32 tag1:1; -+ u32 trigger_int:1; -+ u32 hwseq_en:1; -+ -+ /* Offset 16 */ -+ u32 rtsrate:5; -+ u32 ap_dcfe:1; -+ u32 hwseq_sel:2; -+ u32 userate:1; -+ u32 disrtsfb:1; -+ u32 disdatafb:1; -+ u32 cts2self:1; -+ u32 rtsen:1; -+ u32 hw_rts_en:1; -+ u32 port_id:1; -+ u32 pwr_status:3; -+ u32 wait_dcts:1; -+ u32 cts2ap_en:1; -+ u32 data_sc:2; -+ u32 data_stbc:2; -+ u32 data_short:1; -+ u32 data_bw:1; -+ u32 rts_short:1; -+ u32 rts_bw:1; -+ u32 rts_sc:2; -+ u32 vcs_stbc:2; -+ -+ /* Offset 20 */ -+ u32 datarate:6; -+ u32 sgi:1; -+ u32 try_rate:1; -+ u32 data_ratefb_lmt:5; -+ u32 rts_ratefb_lmt:4; -+ u32 rty_lmt_en:1; -+ u32 data_rt_lmt:6; -+ u32 usb_txagg_num:8; -+ -+ /* Offset 24 */ -+ u32 txagg_a:5; -+ u32 txagg_b:5; -+ u32 use_max_len:1; -+ u32 max_agg_num:5; -+ u32 mcsg1_max_len:4; -+ u32 mcsg2_max_len:4; -+ u32 mcsg3_max_len:4; -+ u32 mcs7_sgi_max_len:4; -+ -+ /* Offset 28 */ -+ u32 checksum:16; /* TxBuffSize(PCIe)/CheckSum(USB) */ -+ u32 mcsg4_max_len:4; -+ u32 mcsg5_max_len:4; -+ u32 mcsg6_max_len:4; -+ u32 mcs15_sgi_max_len:4; -+} TXDESC_8192E, *PTXDESC_8192E; -+ -+ -+ -+/* For 88e early mode */ -+#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) -+#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) -+#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) -+#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) -+#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) -+#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) -+#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) -+ -+/* -+ * defined for TX DESC Operation -+ * */ -+ -+#define MAX_TID (15) -+ -+/* OFFSET 0 */ -+#define OFFSET_SZ 0 -+#define OFFSET_SHT 16 -+#define BMC BIT(24) -+#define LSG BIT(26) -+#define FSG BIT(27) -+#define OWN BIT(31) -+ -+ -+/* OFFSET 4 */ -+#define PKT_OFFSET_SZ 0 -+#define QSEL_SHT 8 -+#define RATE_ID_SHT 16 -+#define NAVUSEHDR BIT(20) -+#define SEC_TYPE_SHT 22 -+#define PKT_OFFSET_SHT 26 -+ -+/* OFFSET 8 */ -+#define AGG_EN BIT(12) -+#define AGG_BK BIT(16) -+#define AMPDU_DENSITY_SHT 20 -+#define ANTSEL_A BIT(24) -+#define ANTSEL_B BIT(25) -+#define TX_ANT_CCK_SHT 26 -+#define TX_ANTL_SHT 28 -+#define TX_ANT_HT_SHT 30 -+ -+/* OFFSET 12 */ -+#define SEQ_SHT 16 -+#define EN_HWSEQ BIT(31) -+ -+/* OFFSET 16 */ -+#define QOS BIT(6) -+#define HW_SSN BIT(7) -+#define USERATE BIT(8) -+#define DISDATAFB BIT(10) -+#define CTS_2_SELF BIT(11) -+#define RTS_EN BIT(12) -+#define HW_RTS_EN BIT(13) -+#define DATA_SHORT BIT(24) -+#define PWR_STATUS_SHT 15 -+#define DATA_SC_SHT 20 -+#define DATA_BW BIT(25) -+ -+/* OFFSET 20 */ -+#define RTY_LMT_EN BIT(17) -+ -+ -+/* OFFSET 20 */ -+#define SGI BIT(6) -+#define USB_TXAGG_NUM_SHT 24 -+ -+ -+/* *****Tx Desc Buffer content */ -+ -+/* config element for each tx buffer -+ * -+#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 0, 16, __Valeu) -+#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 31, 1, __Valeu) -+#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+4, 0, 32, __Valeu) -+#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) -+*/ -+#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) -+#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) -+#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) -+#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) -+ -+ -+/* Dword 0 */ -+#define SET_TX_BUFF_DESC_LEN_0_92E(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) -+#define SET_TX_BUFF_DESC_PSB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -+#define SET_TX_BUFF_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+/* Dword 1 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -+#define GET_TX_DESC_TX_BUFFER_ADDRESS_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) -+ -+ -+/* Dword 2 */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) -+/* Dword 3, RESERVED */ -+ -+ -+/* *****Tx Desc content -+ * Dword 0 */ -+#define SET_TX_DESC_PKT_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define SET_TX_DESC_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define SET_TX_DESC_BMC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_LAST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+#define SET_TX_DESC_FIRST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_LINIP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+#define SET_TX_DESC_NO_ACM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+#define SET_TX_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+#define GET_TX_DESC_OWN_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+/* Dword 1 */ -+#define SET_TX_DESC_MACID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+#define SET_TX_DESC_MORE_DATA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) -+#define SET_TX_DESC_TXOP_PS_CAP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) -+#define SET_TX_DESC_TXOP_PS_MODE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) -+ -+ -+/* Dword 2 */ -+#define SET_TX_DESC_PAID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+#define SET_TX_DESC_CCA_RTS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_NULL_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -+#define SET_TX_DESC_NULL_1_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -+#define SET_TX_DESC_BK_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define SET_TX_DESC_RAW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define GET_TX_DESC_MORE_FRAG_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 17, 1) -+#define SET_TX_DESC_SPE_RPT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_NULL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_GID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+ -+ -+/* Dword 3 */ -+#define SET_TX_DESC_WHEADER_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -+#define SET_TX_DESC_CHK_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -+#define SET_TX_DESC_EARLY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+#define SET_TX_DESC_HWSEQ_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_HW_PORT_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_NDPA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+/* Dword 4 */ -+#define SET_TX_DESC_TX_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_TRY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+#define SET_TX_DESC_PCTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -+#define SET_TX_DESC_PCTS_MASK_IDX_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) -+ -+ -+/* Dword 5 */ -+#define SET_TX_DESC_DATA_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_LDPC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+#define SET_TX_DESC_DATA_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_VCS_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+#define SET_TX_DESC_TX_ANT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) -+#define SET_TX_DESC_TX_POWER_0_PSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) -+ -+/* Dword 6 */ -+#define SET_TX_DESC_SW_DEFINE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_MBSSID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+#define SET_TX_DESC_ANTSEL_A_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+#define SET_TX_DESC_ANTSEL_B_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+#define SET_TX_DESC_ANTSEL_C_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -+#define SET_TX_DESC_ANTSEL_D_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) -+ -+/* Dword 7 */ -+#ifdef CONFIG_PCI_HCI -+ #define SET_TX_DESC_TX_BUFFER_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) -+ #define SET_TX_DESC_TX_DESC_CHECKSUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+#define SET_TX_DESC_USB_TXAGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+ -+ -+/* #define SET_TX_DESC_HWSEQ_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) */ -+/* Dword 8 */ -+ -+#define SET_TX_DESC_RTS_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -+#define SET_TX_DESC_BAR_RTY_TH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -+#define SET_TX_DESC_DATA_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -+#define SET_TX_DESC_EN_HWSEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+#define SET_TX_DESC_NEXT_HEAD_PAGE_92E(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -+#define SET_TX_DESC_TAIL_PAGE_92E(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) -+ -+/* Dword 9 */ -+#define SET_TX_DESC_PADDING_LENGTH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -+#define SET_TX_DESC_TXBF_PATH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) -+#define SET_TX_DESC_SEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+#define SET_TX_DESC_FINAL_DATA_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) -+ -+ -+#define SET_EARLYMODE_PKTNUM_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc); -+ -+#ifdef CONFIG_USB_HCI -+ s32 rtl8192eu_init_xmit_priv(PADAPTER padapter); -+ void rtl8192eu_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8192eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8192eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8192eu_hal_mgmt_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8192eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8192eu_xmit_buf_handler(PADAPTER padapter); -+ #define hal_xmit_handler rtl8192eu_xmit_buf_handler -+ void rtl8192eu_xmit_tasklet(void *priv); -+ s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8192ee_init_xmit_priv(PADAPTER padapter); -+ void rtl8192ee_free_xmit_priv(PADAPTER padapter); -+ struct xmit_buf *rtl8192ee_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8192ee_hal_mgmt_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8192ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ void rtl8192ee_xmitframe_resume(_adapter *padapter); -+ s32 rtl8192ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8192ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+ void rtl8192ee_xmit_tasklet(void *priv); -+#endif -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8192es_init_xmit_priv(PADAPTER padapter); -+ void rtl8192es_free_xmit_priv(PADAPTER padapter); -+ -+ s32 rtl8192es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8192es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8192es_hal_mgmt_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8192es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ thread_return rtl8192es_xmit_thread(thread_context context); -+ s32 rtl8192es_xmit_buf_handler(PADAPTER padapter); -+ -+ #ifdef CONFIG_SDIO_TX_TASKLET -+ void rtl8192es_xmit_tasklet(void *priv); -+ #endif -+#endif -+ -+struct txrpt_ccx_92e { -+ /* offset 0 */ -+ u8 tag1:1; -+ u8 pkt_num:3; -+ u8 txdma_underflow:1; -+ u8 int_bt:1; -+ u8 int_tri:1; -+ u8 int_ccx:1; -+ -+ /* offset 1 */ -+ u8 mac_id:6; -+ u8 pkt_ok:1; -+ u8 bmc:1; -+ -+ /* offset 2 */ -+ u8 retry_cnt:6; -+ u8 lifetime_over:1; -+ u8 retry_over:1; -+ -+ /* offset 3 */ -+ u8 ccx_qtime0; -+ u8 ccx_qtime1; -+ -+ /* offset 5 */ -+ u8 final_data_rate; -+ -+ /* offset 6 */ -+ u8 sw1:4; -+ u8 qsel:4; -+ -+ /* offset 7 */ -+ u8 sw0; -+}; -+ -+#ifdef CONFIG_TX_EARLY_MODE -+ void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif -+s32 rtl8192e_init_xmit_priv(_adapter *padapter); -+void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, u8 *ptxdesc); -+ -+void rtl8192e_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, -+ u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc); -+ -+u8 BWMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); -+u8 SCMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); -+void fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_vcs(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+void fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void rtl8192e_fixed_rate(_adapter *padapter, u8 *ptxdesc); -+ -+#endif /* __RTL8192E_XMIT_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8192f_cmd.h b/drivers/staging/rtl8723cs/include/rtl8192f_cmd.h -new file mode 100644 -index 000000000000..44ea6707b79e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192f_cmd.h -@@ -0,0 +1,213 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192F_CMD_H__ -+#define __RTL8192F_CMD_H__ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+enum h2c_cmd_8192F { -+ /* Common Class: 000 */ -+ H2C_8192F_RSVD_PAGE = 0x00, -+ H2C_8192F_MEDIA_STATUS_RPT = 0x01, -+ H2C_8192F_SCAN_ENABLE = 0x02, -+ H2C_8192F_KEEP_ALIVE = 0x03, -+ H2C_8192F_DISCON_DECISION = 0x04, -+ H2C_8192F_PSD_OFFLOAD = 0x05, -+ H2C_8192F_AP_OFFLOAD = 0x08, -+ H2C_8192F_BCN_RSVDPAGE = 0x09, -+ H2C_8192F_PROBERSP_RSVDPAGE = 0x0A, -+ H2C_8192F_FCS_RSVDPAGE = 0x10, -+ H2C_8192F_FCS_INFO = 0x11, -+ H2C_8192F_AP_WOW_GPIO_CTRL = 0x13, -+ -+ /* PoweSave Class: 001 */ -+ H2C_8192F_SET_PWR_MODE = 0x20, -+ H2C_8192F_PS_TUNING_PARA = 0x21, -+ H2C_8192F_PS_TUNING_PARA2 = 0x22, -+ H2C_8192F_P2P_LPS_PARAM = 0x23, -+ H2C_8192F_P2P_PS_OFFLOAD = 0x24, -+ H2C_8192F_PS_SCAN_ENABLE = 0x25, -+ H2C_8192F_SAP_PS_ = 0x26, -+ H2C_8192F_INACTIVE_PS_ = 0x27,/* Inactive_PS */ -+ H2C_8192F_FWLPS_IN_IPS_ = 0x28, -+ -+ /* Dynamic Mechanism Class: 010 */ -+ H2C_8192F_MACID_CFG = 0x40, -+ H2C_8192F_TXBF = 0x41, -+ H2C_8192F_RSSI_SETTING = 0x42, -+ H2C_8192F_AP_REQ_TXRPT = 0x43, -+ H2C_8192F_INIT_RATE_COLLECT = 0x44, -+ H2C_8192F_RA_PARA_ADJUST = 0x46, -+ -+ /* BT Class: 011 */ -+ H2C_8192F_B_TYPE_TDMA = 0x60, -+ H2C_8192F_BT_INFO = 0x61, -+ H2C_8192F_FORCE_BT_TXPWR = 0x62, -+ H2C_8192F_BT_IGNORE_WLANACT = 0x63, -+ H2C_8192F_DAC_SWING_VALUE = 0x64, -+ H2C_8192F_ANT_SEL_RSV = 0x65, -+ H2C_8192F_WL_OPMODE = 0x66, -+ H2C_8192F_BT_MP_OPER = 0x67, -+ H2C_8192F_BT_CONTROL = 0x68, -+ H2C_8192F_BT_WIFI_CTRL = 0x69, -+ H2C_8192F_BT_FW_PATCH = 0x6A, -+ H2C_8192F_BT_WLAN_CALIBRATION = 0x6D, -+ -+ /* WOWLAN Class: 100 */ -+ H2C_8192F_WOWLAN = 0x80, -+ H2C_8192F_REMOTE_WAKE_CTRL = 0x81, -+ H2C_8192F_AOAC_GLOBAL_INFO = 0x82, -+ H2C_8192F_AOAC_RSVD_PAGE = 0x83, -+ H2C_8192F_AOAC_RSVD_PAGE2 = 0x84, -+ H2C_8192F_D0_SCAN_OFFLOAD_CTRL = 0x85, -+ H2C_8192F_D0_SCAN_OFFLOAD_INFO = 0x86, -+ H2C_8192F_CHNL_SWITCH_OFFLOAD = 0x87, -+ H2C_8192F_P2P_OFFLOAD_RSVD_PAGE = 0x8A, -+ H2C_8192F_P2P_OFFLOAD = 0x8B, -+ -+ H2C_8192F_RESET_TSF = 0xC0, -+ H2C_8192F_MAXID, -+}; -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- -+ * _RSVDPAGE_LOC_CMD_0x00 */ -+#define SET_8192F_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8192F_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8192F_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8192F_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8192F_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+/*_MEDIA_STATUS_RPT_PARM_CMD_0x01*/ -+#define SET_8192F_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+/* _PWR_MOD_CMD_0x20 */ -+#define SET_8192F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8192F_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_8192F_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_8192F_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8192F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8192F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -+#define SET_8192F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+#define GET_8192F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) -+ -+/* _PS_TUNE_PARAM_CMD_0x21 */ -+#define SET_8192F_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8192F_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8192F_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -+#define SET_8192F_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -+#define SET_8192F_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _MACID_CFG_CMD_0x40 */ -+#define SET_8192F_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -+#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) -+ -+/* _RSSI_SETTING_CMD_0x42 */ -+#define SET_8192F_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8192F_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -+#define SET_8192F_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _AP_REQ_TXRPT_CMD_0x43 */ -+#define SET_8192F_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8192F_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+ -+/* _FORCE_BT_TXPWR_CMD_0x62 */ -+#define SET_8192F_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+ -+/* _FORCE_BT_MP_OPER_CMD_0x67 */ -+#define SET_8192F_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_8192F_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -+#define SET_8192F_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8192F_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+#define SET_8192F_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8192F_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+ -+/* _BT_FW_PATCH_0x6A */ -+#define SET_8192F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) -+#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ------------------------------------------- Structure -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- Function Statement -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+/* host message to firmware cmd */ -+void rtl8192f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -+void rtl8192f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -+/* s32 rtl8192f__set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -+void rtl8192f_set_FwPsTuneParam_cmd(PADAPTER padapter); -+void rtl8192f_download_rsvd_page(PADAPTER padapter, u8 mstatus); -+#ifdef CONFIG_BT_COEXIST -+void rtl8192f_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -+#endif /* CONFIG_BT_COEXIST */ -+#ifdef CONFIG_P2P -+void rtl8192f_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_P2P_WOWLAN -+void rtl8192f_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -+#endif -+ -+/* AP_REQ_TXREP_CMD 0x43 */ -+#define SET_8192F_H2CCMD_TXREP_PARM_STA1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8192F_H2CCMD_TXREP_PARM_STA2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8192F_H2CCMD_TXREP_PARM_RTY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 2, __Value) -+ -+/* C2H_AP_REQ_TXRPT */ -+#define GET_8192F_C2H_TC2H_APREQ_TXRPT_MACID1(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 8) -+#define GET_8192F_C2H_TC2H_APREQ_TXRPT_TXOK1(_Header) LE_BITS_TO_2BYTE((_Header + 1), 0, 16) -+#define GET_8192F_C2H_TC2H_APREQ_TXRPT_TXFAIL1(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) -+#define GET_8192F_C2H_TC2H_APREQ_TXRPT_INIRATE1(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8) -+#define GET_8192F_C2H_TC2H_APREQ_TXRPT_MACID2(_Header) LE_BITS_TO_1BYTE((_Header + 6), 0, 8) -+#define GET_8192F_C2H_TC2H_APREQ_TXRPT_TXOK2(_Header) LE_BITS_TO_2BYTE((_Header + 7), 0, 16) -+#define GET_8192F_C2H_TC2H_APREQ_TXRPT_TXFAIL2(_Header) LE_BITS_TO_2BYTE((_Header + 9), 0, 16) -+#define GET_8192F_C2H_TC2H_APREQ_TXRPT_INIRATE2(_Header) LE_BITS_TO_1BYTE((_Header + 11), 0, 8) -+ -+/* C2H_SPC_STAT */ -+#define GET_8192F_C2H_SPC_STAT_IDX(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 8) -+ /* Tip :TYPE_A data3 is msb and data0 is lsb */ -+#define GET_8192F_C2H_SPC_STAT_TYPEA_RETRY(_Header) LE_BITS_TO_4BYTE((_Header + 1), 0, 32) -+#define GET_8192F_C2H_SPC_STAT_TYPEB_PKT1(_Header) LE_BITS_TO_2BYTE((_Header + 1), 0, 16) -+#define GET_8192F_C2H_SPC_STAT_TYPEB_RETRY1(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) -+#define GET_8192F_C2H_SPC_STAT_TYPEB_PKT2(_Header) LE_BITS_TO_2BYTE((_Header + 5), 0, 16) -+#define GET_8192F_C2H_SPC_STAT_TYPEB_RETRY2(_Header) LE_BITS_TO_2BYTE((_Header + 7), 0, 16) -+ -+void rtl8192f_req_txrpt_cmd(PADAPTER, u8 macid); -+s32 FillH2CCmd8192F(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+u8 GetTxBufferRsvdPageNum8192F(_adapter *padapter, bool wowlan); -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8192f_dm.h b/drivers/staging/rtl8723cs/include/rtl8192f_dm.h -new file mode 100644 -index 000000000000..43e6396abdf6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192f_dm.h -@@ -0,0 +1,27 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192F_DM_H__ -+#define __RTL8192F_DM_H__ -+ -+void rtl8192f_init_dm_priv(PADAPTER Adapter); -+void rtl8192f_deinit_dm_priv(PADAPTER Adapter); -+void rtl8192f_InitHalDm(PADAPTER Adapter); -+void rtl8192f_HalDmWatchDog(PADAPTER Adapter); -+ -+/* void rtl8192c_dm_CheckTXPowerTracking(PADAPTER Adapter); */ -+ -+/* void rtl8192c_dm_RF_Saving(PADAPTER pAdapter, u8 bForceInNormal); */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8192f_hal.h b/drivers/staging/rtl8723cs/include/rtl8192f_hal.h -new file mode 100644 -index 000000000000..6772f626482b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192f_hal.h -@@ -0,0 +1,321 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192F_HAL_H__ -+#define __RTL8192F_HAL_H__ -+ -+#include "hal_data.h" -+ -+#include "rtl8192f_spec.h" -+#include "rtl8192f_rf.h" -+#include "rtl8192f_dm.h" -+#include "rtl8192f_recv.h" -+#include "rtl8192f_xmit.h" -+#include "rtl8192f_cmd.h" -+#include "rtl8192f_led.h" -+#include "Hal8192FPwrSeq.h" -+#include "Hal8192FPhyReg.h" -+#include "Hal8192FPhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+#include "rtl8192f_sreset.h" -+#endif -+#ifdef CONFIG_LPS_POFF -+ #include "rtl8192f_lps_poff.h" -+#endif -+ -+#define FW_8192F_SIZE 0x8000 -+#define FW_8192F_START_ADDRESS 0x4000 -+#define FW_8192F_END_ADDRESS 0x5000 /* brian_zhang@realsil.com.cn */ -+ -+#define IS_FW_HEADER_EXIST_8192F(_pFwHdr)\ -+ ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x92F0) -+ -+typedef struct _RT_FIRMWARE { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[FW_8192F_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8192F, *PRT_FIRMWARE_8192F; -+ -+/* -+ * This structure must be cared byte-ordering -+ * -+ * Added by tynli. 2009.12.04. */ -+typedef struct _RT_8192F_FIRMWARE_HDR { -+ /* 8-byte alinment required */ -+ -+ /* --- LONG WORD 0 ---- */ -+ u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ -+ u8 Category; /* AP/NIC and USB/PCI */ -+ u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -+ u16 Version; /* FW Version */ -+ u16 Subversion; /* FW Subversion, default 0x00 */ -+ -+ /* --- LONG WORD 1 ---- */ -+ u8 Month; /* Release time Month field */ -+ u8 Date; /* Release time Date field */ -+ u8 Hour; /* Release time Hour field */ -+ u8 Minute; /* Release time Minute field */ -+ u16 RamCodeSize; /* The size of RAM code */ -+ u16 Rsvd2; -+ -+ /* --- LONG WORD 2 ---- */ -+ u32 SvnIdx; /* The SVN entry index */ -+ u32 Rsvd3; -+ -+ /* --- LONG WORD 3 ---- */ -+ u32 Rsvd4; -+ u32 Rsvd5; -+} RT_8192F_FIRMWARE_HDR, *PRT_8192F_FIRMWARE_HDR; -+#define DRIVER_EARLY_INT_TIME_8192F 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8192F 0x02 -+/* for 8192F -+ * TX 64K, RX 16K, Page size 256B for TX*/ -+#define PAGE_SIZE_TX_8192F 256 -+#define PAGE_SIZE_RX_8192F 8 -+#define TX_DMA_SIZE_8192F 0x10000/* 64K(TX) */ -+#define RX_DMA_SIZE_8192F 0x4000/* 16K(RX) */ -+#ifdef CONFIG_WOWLAN -+ #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -+#else -+ #define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8192F 0x100 /* 256B, reserved for c2h debug message */ -+#else -+ #define RX_DMA_RESERVED_SIZE_8192F 0xc0 /* 192B, reserved for tx report 24*8=192*/ -+#endif -+#define RX_DMA_BOUNDARY_8192F\ -+ (RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F - 1) -+ -+ -+/* Note: We will divide number of page equally for each queue other than public queue! */ -+ -+/* For General Reserved Page Number(Beacon Queue is reserved page) -+ * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8192F -+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -+#define BCNQ_PAGE_NUM_8192F (MAX_BEACON_LEN/PAGE_SIZE_TX_8192F + 6) /*0x08*/ -+ -+ -+/* For WoWLan , more reserved page -+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 -+ * NS offload: 2 NDP info: 1 -+ */ -+#ifdef CONFIG_WOWLAN -+ #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ #define WOWLAN_KEEP_ALIVE_PAGE 0x02 /*for keep alive packet*/ -+ #else -+ #define WOWLAN_KEEP_ALIVE_PAGE 0x00 -+ #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ /* 7 pages for wow rsvd page + 2 pages for pattern */ -+ #define WOWLAN_PAGE_NUM_8192F (0x09 + WOWLAN_KEEP_ALIVE_PAGE) -+#else -+ #define WOWLAN_PAGE_NUM_8192F 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+ #undef WOWLAN_PAGE_NUM_8192F -+ #define WOWLAN_PAGE_NUM_8192F 0x15 -+#endif -+ -+#ifdef CONFIG_AP_WOWLAN -+ #define AP_WOWLAN_PAGE_NUM_8192F 0x02 -+#endif -+ -+#ifdef DBG_LA_MODE -+ #define LA_MODE_PAGE_NUM 0xE0 -+#endif -+ -+#define MAX_RX_DMA_BUFFER_SIZE_8192F (RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F) -+ -+#ifdef DBG_LA_MODE -+ #define TX_TOTAL_PAGE_NUMBER_8192F (0xFF - LA_MODE_PAGE_NUM) -+#else -+ #define TX_TOTAL_PAGE_NUMBER_8192F (0xFF - BCNQ_PAGE_NUM_8192F - WOWLAN_PAGE_NUM_8192F) -+#endif -+ -+#define TX_PAGE_BOUNDARY_8192F (TX_TOTAL_PAGE_NUMBER_8192F + 1) -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8192F \ -+ TX_TOTAL_PAGE_NUMBER_8192F -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8192F \ -+ (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8192F + 1) -+ -+/* For Normal Chip Setting -+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8192F */ -+#define NORMAL_PAGE_NUM_HPQ_8192F 0x8 -+#define NORMAL_PAGE_NUM_LPQ_8192F 0x8 -+#define NORMAL_PAGE_NUM_NPQ_8192F 0x8 -+#define NORMAL_PAGE_NUM_EPQ_8192F 0x00 -+ -+/* Note: For Normal Chip Setting, modify later */ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8192F 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8192F 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8192F 0x20 -+#define WMM_NORMAL_PAGE_NUM_EPQ_8192F 0x00 -+ -+ -+#include "HalVerDef.h" -+#include "hal_com.h" -+ -+#define EFUSE_OOB_PROTECT_BYTES 56 /*0x1C8~0x1FF*/ -+ -+#define HAL_EFUSE_MEMORY -+#define HWSET_MAX_SIZE_8192F 512 -+#define EFUSE_REAL_CONTENT_LEN_8192F 512 -+#define EFUSE_MAP_LEN_8192F 512 -+#define EFUSE_MAX_SECTION_8192F 64 -+ -+/* For some inferiority IC purpose. added by Roger, 2009.09.02.*/ -+#define EFUSE_IC_ID_OFFSET 506 -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192F) -+ -+#define EFUSE_ACCESS_ON 0x69 -+#define EFUSE_ACCESS_OFF 0x00 -+ -+/* ******************************************************** -+ * EFUSE for BT definition -+ * ******************************************************** */ -+#define BANK_NUM 1 -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 -+#define EFUSE_BT_REAL_CONTENT_LEN 1536/*512 * 3 */ -+/* (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM)*/ -+#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -+#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ -+#define EFUSE_PROTECT_BYTES_BANK 16 -+ -+typedef enum tag_Package_Definition { -+ PACKAGE_DEFAULT, -+ PACKAGE_QFN32, -+ PACKAGE_QFN40, -+ PACKAGE_QFN46 -+} PACKAGE_TYPE_E; -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) \ -+ (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \ -+ (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+#ifdef CONFIG_FILE_FWIMG -+ extern char *rtw_fw_file_path; -+ extern char *rtw_fw_wow_file_path; -+ #ifdef CONFIG_MP_INCLUDED -+ extern char *rtw_fw_mp_bt_file_path; -+ #endif /* CONFIG_MP_INCLUDED */ -+#endif /* CONFIG_FILE_FWIMG */ -+ -+/* rtl8192f_hal_init.c */ -+s32 rtl8192f_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -+void rtl8192f_FirmwareSelfReset(PADAPTER padapter); -+void rtl8192f_InitializeFirmwareVars(PADAPTER padapter); -+ -+void rtl8192f_InitAntenna_Selection(PADAPTER padapter); -+void rtl8192f_DeinitAntenna_Selection(PADAPTER padapter); -+void rtl8192f_CheckAntenna_Selection(PADAPTER padapter); -+void rtl8192f_init_default_value(PADAPTER padapter); -+ -+s32 rtl8192f_InitLLTTable(PADAPTER padapter); -+ -+s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -+s32 CardDisableWithoutHWSM(PADAPTER padapter); -+ -+/* EFuse */ -+u8 GetEEPROMSize8192F(PADAPTER padapter); -+void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -+void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -+void Hal_EfuseParseTxPowerInfo_8192F(PADAPTER padapter, -+ u8 *PROMContent, BOOLEAN AutoLoadFail); -+#ifdef CONFIG_BT_COEXIST -+void Hal_EfuseParseBTCoexistInfo_8192F(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+#endif /* CONFIG_BT_COEXIST */ -+void Hal_EfuseParseEEPROMVer_8192F(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseChnlPlan_8192F(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseCustomerID_8192F(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseAntennaDiversity_8192F(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8192F(PADAPTER pAdapter, -+ u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseThermalMeter_8192F(PADAPTER padapter, -+ u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseVoltage_8192F(PADAPTER pAdapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBoardType_8192F(PADAPTER Adapter, -+ u8 *PROMContent, BOOLEAN AutoloadFail); -+u8 Hal_ReadRFEType_8192F(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void rtl8192f_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8192f(_adapter *adapter); -+u8 SetHwReg8192F(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg8192F(PADAPTER padapter, u8 variable, u8 *val); -+u8 SetHalDefVar8192F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8192F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+ -+/* register */ -+void rtl8192f_InitBeaconParameters(PADAPTER padapter); -+void rtl8192f_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -+ -+void _InitMacAPLLSetting_8192F(PADAPTER Adapter); -+void _8051Reset8192F(PADAPTER padapter); -+#ifdef CONFIG_WOWLAN -+ void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif /* CONFIG_WOWLAN */ -+ -+void rtl8192f_start_thread(_adapter *padapter); -+void rtl8192f_stop_thread(_adapter *padapter); -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+ void rtl8192fs_init_checkbthang_workqueue(_adapter *adapter); -+ void rtl8192fs_free_checkbthang_workqueue(_adapter *adapter); -+ void rtl8192fs_cancle_checkbthang_workqueue(_adapter *adapter); -+ void rtl8192fs_hal_check_bt_hang(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -+#endif -+#ifdef CONFIG_MP_INCLUDED -+int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -+#endif -+void CCX_FwC2HTxRpt_8192f(PADAPTER padapter, u8 *pdata, u8 len); -+ -+u8 MRateToHwRate8192F(u8 rate); -+u8 HwRateToMRate8192F(u8 rate); -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+ void check_bt_status_work(void *data); -+#endif -+ -+ -+void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+ -+#ifdef CONFIG_AMPDU_PRETX_CD -+void rtl8192f_pretx_cd_config(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ BOOLEAN InterruptRecognized8192FE(PADAPTER Adapter); -+ void UpdateInterruptMask8192FE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+ void InitMAC_TRXBD_8192FE(PADAPTER Adapter); -+ -+ u16 get_txbd_rw_reg(u16 ff_hwaddr); -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8192f_led.h b/drivers/staging/rtl8723cs/include/rtl8192f_led.h -new file mode 100644 -index 000000000000..0dbb27cd023e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192f_led.h -@@ -0,0 +1,59 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192F_LED_H__ -+#define __RTL8192F_LED_H__ -+ -+#include -+#include -+#include -+ -+#ifdef CONFIG_RTW_SW_LED -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+#ifdef CONFIG_USB_HCI -+/** REG_LED_CFG (0x4C) **/ -+/* LED0 GPIO Enable, 0: disable, 1: enable*/ -+#define LED0_GPIO_ENABLE_8192FU (BIT21) -+/* LED0 Disabled for analog signal usage, 0:Enable (output mode), 1: disable (input mode) */ -+#define LED0_DISABLE_ANALOGSIGNAL_8192FU (BIT7) -+/* LED0 software value, 0: turn off, 1:turn on */ -+#define LED0_SW_VALUE_8192FU (BIT3) -+ -+/** REG_GPIO_MUXCFG (0x40) **/ -+/* Enable LED[1:0] for RFE CTRL[7:6], 0: BT, 1: Wi-Fi */ -+#define ENABLE_LED0_AND_LED1_CTRL_BY_WIFI_8192FU (BIT3) -+ -+/** REG_SW_GPIO_SHARE_CTRL_0 (0x1038) **/ -+/* LED Output PIN Location, 0: GPIOA_0, 1:GPIOB_4*/ -+#define LED_OUTPUT_PIN_LOCATION_8192FU (BIT16) -+ -+u8 rtl8192fu_CfgLed0Hw(PADAPTER padapter); -+void rtl8192fu_InitSwLeds(PADAPTER padapter); -+void rtl8192fu_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+void rtl8192fs_InitSwLeds(PADAPTER padapter); -+void rtl8192fs_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+void rtl8192fe_InitSwLeds(PADAPTER padapter); -+void rtl8192fe_DeInitSwLeds(PADAPTER padapter); -+#endif -+#endif /*#ifdef CONFIG_RTW_SW_LED*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8192f_recv.h b/drivers/staging/rtl8723cs/include/rtl8192f_recv.h -new file mode 100644 -index 000000000000..9fb931a7fa69 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192f_recv.h -@@ -0,0 +1,107 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192F_RECV_H__ -+#define __RTL8192F_RECV_H__ -+ -+#define RECV_BLK_SZ 512 -+#define RECV_BLK_CNT 16 -+#define RECV_BLK_TH RECV_BLK_CNT -+ -+#if defined(CONFIG_USB_HCI) -+ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ -+ /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ -+ /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ -+ #ifdef CONFIG_PLATFORM_MSTAR -+ #define MAX_RECVBUF_SZ (8192) /* 8K */ -+ #else -+ #define MAX_RECVBUF_SZ (32768) /* 32k */ -+ #endif -+ /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ -+ #else -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+#elif defined(CONFIG_PCI_HCI) -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ -+ #define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8192F + 1) -+ -+#endif -+ -+/* Rx smooth factor */ -+#define Rx_Smooth_Factor (20) -+ -+#ifdef CONFIG_SDIO_HCI -+ #ifndef CONFIG_SDIO_RX_COPY -+ #undef MAX_RECVBUF_SZ -+ #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F) -+ #endif /* !CONFIG_SDIO_RX_COPY */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+/*-----------------------------------------------------------------*/ -+/* RTL8192F RX BUFFER DESC */ -+/*-----------------------------------------------------------------*/ -+/*DWORD 0*/ -+#define SET_RX_BUFFER_DESC_DATA_LENGTH_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_BUFFER_DESC_LS_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) -+#define SET_RX_BUFFER_DESC_FS_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value) -+#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value) -+ -+#define GET_RX_BUFFER_DESC_OWN_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+#define GET_RX_BUFFER_DESC_LS_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_BUFFER_DESC_FS_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1) -+#ifdef USING_RX_TAG -+ #define GET_RX_BUFFER_DESC_RX_TAG_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 13) -+#else -+ #define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) -+#endif -+ -+/*DWORD 1*/ -+#define SET_RX_BUFFER_PHYSICAL_LOW_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) -+ -+/*DWORD 2*/ -+#ifdef CONFIG_64BIT_DMA -+ #define SET_RX_BUFFER_PHYSICAL_HIGH_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) -+#else -+ #define SET_RX_BUFFER_PHYSICAL_HIGH_8192F(__pRxStatusDesc, __Value) -+#endif -+ -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8192fs_init_recv_priv(PADAPTER padapter); -+ void rtl8192fs_free_recv_priv(PADAPTER padapter); -+ s32 rtl8192fs_recv_hdl(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ int rtl8192fu_init_recv_priv(_adapter *padapter); -+ void rtl8192fu_free_recv_priv(_adapter *padapter); -+ void rtl8192fu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8192fe_init_recv_priv(_adapter *padapter); -+ void rtl8192fe_free_recv_priv(_adapter *padapter); -+#endif -+ -+void rtl8192f_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8192F_RECV_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8192f_rf.h b/drivers/staging/rtl8723cs/include/rtl8192f_rf.h -new file mode 100644 -index 000000000000..f9adc7c8a162 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192f_rf.h -@@ -0,0 +1,91 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2012 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192F_RF_H__ -+#define __RTL8192F_RF_H__ -+ -+/*default*/ -+/*#define CONFIG_8192F_DRV_DIS*/ -+/*AP*/ -+#define CONFIG_8192F_TYPE3_DRV_DIS -+#define CONFIG_8192F_TYPE4_DRV_DIS -+/*unused*/ -+#define CONFIG_8192F_TYPE18_DRV_DIS -+#define CONFIG_8192F_TYPE19_DRV_DIS -+#define CONFIG_8192F_TYPE20_DRV_DIS -+#define CONFIG_8192F_TYPE21_DRV_DIS -+#define CONFIG_8192F_TYPE22_DRV_DIS -+#define CONFIG_8192F_TYPE23_DRV_DIS -+#define CONFIG_8192F_TYPE24_DRV_DIS -+#define CONFIG_8192F_TYPE25_DRV_DIS -+#define CONFIG_8192F_TYPE26_DRV_DIS -+#define CONFIG_8192F_TYPE27_DRV_DIS -+#define CONFIG_8192F_TYPE28_DRV_DIS -+#define CONFIG_8192F_TYPE29_DRV_DIS -+#define CONFIG_8192F_TYPE30_DRV_DIS -+#define CONFIG_8192F_TYPE31_DRV_DIS -+ -+ -+#ifdef CONFIG_SDIO_HCI /**/ -+/*usb*/ -+#define CONFIG_8192F_TYPE1_DRV_DIS -+#define CONFIG_8192F_TYPE5_DRV_DIS -+#define CONFIG_8192F_TYPE10_DRV_DIS -+#define CONFIG_8192F_TYPE13_DRV_DIS -+#define CONFIG_8192F_TYPE14_DRV_DIS -+/*pcie*/ -+#define CONFIG_8192F_TYPE0_DRV_DIS -+#define CONFIG_8192F_TYPE6_DRV_DIS -+#define CONFIG_8192F_TYPE7_DRV_DIS -+#define CONFIG_8192F_TYPE8_DRV_DIS -+#define CONFIG_8192F_TYPE9_DRV_DIS -+#define CONFIG_8192F_TYPE12_DRV_DIS -+#define CONFIG_8192F_TYPE15_DRV_DIS -+#define CONFIG_8192F_TYPE16_DRV_DIS -+#define CONFIG_8192F_TYPE17_DRV_DIS -+#endif/*CONFIG_SDIO_HCI*/ -+ -+#ifdef CONFIG_USB_HCI -+/*sdio*/ -+#define CONFIG_8192F_TYPE2_DRV_DIS -+#define CONFIG_8192F_TYPE11_DRV_DIS -+/*pcie*/ -+#define CONFIG_8192F_TYPE0_DRV_DIS -+#define CONFIG_8192F_TYPE6_DRV_DIS -+#define CONFIG_8192F_TYPE7_DRV_DIS -+#define CONFIG_8192F_TYPE8_DRV_DIS -+#define CONFIG_8192F_TYPE9_DRV_DIS -+#define CONFIG_8192F_TYPE12_DRV_DIS -+#define CONFIG_8192F_TYPE15_DRV_DIS -+#define CONFIG_8192F_TYPE16_DRV_DIS -+#define CONFIG_8192F_TYPE17_DRV_DIS -+#endif/*CONFIG_USB_HCI*/ -+ -+#ifdef CONFIG_PCI_HCI -+/*sdio*/ -+#define CONFIG_8192F_TYPE2_DRV_DIS -+#define CONFIG_8192F_TYPE11_DRV_DIS -+/*usb*/ -+#define CONFIG_8192F_TYPE1_DRV_DIS -+#define CONFIG_8192F_TYPE5_DRV_DIS -+#define CONFIG_8192F_TYPE10_DRV_DIS -+#define CONFIG_8192F_TYPE13_DRV_DIS -+#define CONFIG_8192F_TYPE14_DRV_DIS -+#endif/*CONFIG_PCI_HCI*/ -+ -+int PHY_RF6052_Config8192F(PADAPTER pdapter); -+ -+void PHY_RF6052SetBandwidth8192F(PADAPTER Adapter, enum channel_width Bandwidth); -+ -+#endif/* __RTL8192F_RF_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8192f_spec.h b/drivers/staging/rtl8723cs/include/rtl8192f_spec.h -new file mode 100644 -index 000000000000..b34d94483c48 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192f_spec.h -@@ -0,0 +1,541 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192F_SPEC_H__ -+#define __RTL8192F_SPEC_H__ -+ -+#include -+ -+ -+#define HAL_NAV_UPPER_UNIT_8192F 128 /* micro-second */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0000h ~ 0x00FFh System Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_SYS_ISO_CTRL_8192F 0x0000 /* 2 Byte */ -+#define REG_SYS_FUNC_EN_8192F 0x0002 /* 2 Byte */ -+#define REG_APS_FSMCO_8192F 0x0004 /* 4 Byte */ -+#define REG_SYS_CLKR_8192F 0x0008 /* 2 Byte */ -+#define REG_9346CR_8192F 0x000A /* 2 Byte */ -+#define REG_EE_VPD_8192F 0x000C /* 2 Byte */ -+#define REG_AFE_MISC_8192F 0x0010 /* 1 Byte */ -+#define REG_SPS0_CTRL_8192F 0x0011 /* 7 Byte */ -+#define REG_SPS_OCP_CFG_8192F 0x0018 /* 4 Byte */ -+#define REG_RSV_CTRL_8192F 0x001C /* 3 Byte */ -+#define REG_RF_CTRL_8192F 0x001F /* 1 Byte */ -+#define REG_LPLDO_CTRL_8192F 0x0023 /* 1 Byte */ -+#define REG_AFE_XTAL_CTRL_8192F 0x0024 /* 4 Byte */ -+#define REG_AFE_PLL_CTRL_8192F 0x0028 /* 4 Byte */ -+#define REG_MAC_PLL_CTRL_EXT_8192F 0x002c /* 4 Byte */ -+#define REG_EFUSE_CTRL_8192F 0x0030 -+#define REG_EFUSE_TEST_8192F 0x0034 -+#define REG_PWR_DATA_8192F 0x0038 -+#define REG_CAL_TIMER_8192F 0x003C -+#define REG_ACLK_MON_8192F 0x003E -+#define REG_GPIO_MUXCFG_8192F 0x0040 -+#define REG_GPIO_IO_SEL_8192F 0x0042 -+#define REG_MAC_PINMUX_CFG_8192F 0x0043 -+#define REG_GPIO_PIN_CTRL_8192F 0x0044 -+#define REG_GPIO_INTM_8192F 0x0048 -+#define REG_LEDCFG0_8192F 0x004C -+#define REG_LEDCFG1_8192F 0x004D -+#define REG_LEDCFG2_8192F 0x004E -+#define REG_LEDCFG3_8192F 0x004F -+#define REG_FSIMR_8192F 0x0050 -+#define REG_FSISR_8192F 0x0054 -+#define REG_HSIMR_8192F 0x0058 -+#define REG_HSISR_8192F 0x005c -+#define REG_GPIO_EXT_CTRL 0x0060 -+#define REG_PAD_CTRL1_8192F 0x0064 -+#define REG_MULTI_FUNC_CTRL_8192F 0x0068 -+#define REG_GPIO_STATUS_8192F 0x006C -+#define REG_SDIO_CTRL_8192F 0x0070 -+#define REG_OPT_CTRL_8192F 0x0074 -+#define REG_AFE_CTRL_4_8192F 0x0078 -+#define REG_MCUFWDL_8192F 0x0080 -+#define REG_8051FW_CTRL_8192F 0x0080 -+#define REG_HMEBOX_DBG_0_8192F 0x0088 -+#define REG_HMEBOX_DBG_1_8192F 0x008A -+#define REG_HMEBOX_DBG_2_8192F 0x008C -+#define REG_HMEBOX_DBG_3_8192F 0x008E -+#define REG_WLLPS_CTRL 0x0090 -+#define REG_HIMR0_8192F 0x00B0 -+#define REG_HISR0_8192F 0x00B4 -+#define REG_HIMR1_8192F 0x00B8 -+#define REG_HISR1_8192F 0x00BC -+#define REG_PMC_DBG_CTRL2_8192F 0x00CC -+#define REG_EFUSE_BURN_GNT_8192F 0x00CF -+#define REG_HPON_FSM_8192F 0x00EC -+#define REG_SYS_CFG1_8192F 0x00F0 -+#define REG_SYS_CFG2_8192F 0x00FC -+#define REG_ROM_VERSION 0x00FD -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_CR_8192F 0x0100 -+#define REG_PBP_8192F 0x0104 -+#define REG_PKT_BUFF_ACCESS_CTRL_8192F 0x0106 -+#define REG_TRXDMA_CTRL_8192F 0x010C -+#define REG_TRXFF_BNDY_8192F 0x0114 -+#define REG_TRXFF_STATUS_8192F 0x0118 -+#define REG_RXFF_PTR_8192F 0x011C -+#define REG_CPWM_8192F 0x012C -+#define REG_FWIMR_8192F 0x0130 -+#define REG_FWISR_8192F 0x0134 -+#define REG_FTIMR_8192F 0x0138 -+#define REG_PKTBUF_DBG_CTRL_8192F 0x0140 -+#define REG_RXPKTBUF_CTRL_8192F 0x0142 -+#define REG_PKTBUF_DBG_DATA_L_8192F 0x0144 -+#define REG_PKTBUF_DBG_DATA_H_8192F 0x0148 -+ -+#define REG_TC0_CTRL_8192F 0x0150 -+#define REG_TC1_CTRL_8192F 0x0154 -+#define REG_TC2_CTRL_8192F 0x0158 -+#define REG_TC3_CTRL_8192F 0x015C -+#define REG_TC4_CTRL_8192F 0x0160 -+#define REG_TCUNIT_BASE_8192F 0x0164 -+#define REG_RSVD3_8192F 0x0168 -+#define REG_C2HEVT_CMD_ID_8192F 0x01A0 -+#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -+#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -+#define REG_C2HEVT_CMD_LEN_8192F 0x01AE -+#define REG_C2HEVT_CLEAR_8192F 0x01AF -+#define REG_TXBUF_WKCAM_OFFSET 0x01B1 /* RTL8192F */ -+#define REG_MCUTST_1_8192F 0x01C0 -+#define REG_WOWLAN_WAKE_REASON 0x01C7 -+#define REG_FMETHR_8192F 0x01C8 -+#define REG_HMETFR_8192F 0x01CC -+#define REG_HMEBOX_0_8192F 0x01D0 -+#define REG_HMEBOX_1_8192F 0x01D4 -+#define REG_HMEBOX_2_8192F 0x01D8 -+#define REG_HMEBOX_3_8192F 0x01DC -+#define REG_LLT_INIT_8192F 0x01E0 -+#define REG_HMEBOX_EXT0_8192F 0x01F0 -+#define REG_HMEBOX_EXT1_8192F 0x01F4 -+#define REG_HMEBOX_EXT2_8192F 0x01F8 -+#define REG_HMEBOX_EXT3_8192F 0x01FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RQPN_8192F 0x0200 -+#define REG_FIFOPAGE_8192F 0x0204 -+#define REG_DWBCN0_CTRL_8192F REG_TDECTRL -+#define REG_TXDMA_OFFSET_CHK_8192F 0x020C -+#define REG_TXDMA_STATUS_8192F 0x0210 -+#define REG_RQPN_NPQ_8192F 0x0214 -+#define REG_DWBCN1_CTRL_8192F 0x0228 -+#define REG_RQPN_EXQ1_EXQ2 0x0230 -+#define REG_TQPNT3_V1_8192F 0x0234 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RXDMA_AGG_PG_TH_8192F 0x0280 -+#define REG_FW_UPD_RDPTR_8192F 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ -+#define REG_RXDMA_CONTROL_8192F 0x0286 /* Control the RX DMA. */ -+#define REG_RXDMA_STATUS_8192F 0x0288 -+#define REG_RXDMA_MODE_CTRL_8192F 0x0290 -+#define REG_EARLY_MODE_CONTROL_8192F 0x02BC -+#define REG_RSVD5_8192F 0x02F0 -+#define REG_RSVD6_8192F 0x02F4 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0300h ~ 0x03FFh PCIe -+ * -+ * ----------------------------------------------------- */ -+#define REG_PCIE_CTRL_REG_8192F 0x0300 -+#define REG_INT_MIG_8192F 0x0304 /* Interrupt Migration */ -+#define REG_BCNQ_TXBD_DESA_8192F 0x0308 /* TX Beacon Descriptor Address */ -+#define REG_MGQ_TXBD_DESA_8192F 0x0310 /* TX Manage Queue Descriptor Address */ -+#define REG_VOQ_TXBD_DESA_8192F 0x0318 /* TX VO Queue Descriptor Address */ -+#define REG_VIQ_TXBD_DESA_8192F 0x0320 /* TX VI Queue Descriptor Address */ -+#define REG_BEQ_TXBD_DESA_8192F 0x0328 /* TX BE Queue Descriptor Address */ -+#define REG_BKQ_TXBD_DESA_8192F 0x0330 /* TX BK Queue Descriptor Address */ -+#define REG_RXQ_RXBD_DESA_8192F 0x0338 /* RX Queue Descriptor Address */ -+#define REG_HI0Q_TXBD_DESA_8192F 0x0340 -+#define REG_HI1Q_TXBD_DESA_8192F 0x0348 -+#define REG_HI2Q_TXBD_DESA_8192F 0x0350 -+#define REG_HI3Q_TXBD_DESA_8192F 0x0358 -+#define REG_HI4Q_TXBD_DESA_8192F 0x0360 -+#define REG_HI5Q_TXBD_DESA_8192F 0x0368 -+#define REG_HI6Q_TXBD_DESA_8192F 0x0370 -+#define REG_HI7Q_TXBD_DESA_8192F 0x0378 -+#define REG_MGQ_TXBD_NUM_8192F 0x0380 -+#define REG_RX_RXBD_NUM_8192F 0x0382 -+#define REG_VOQ_TXBD_NUM_8192F 0x0384 -+#define REG_VIQ_TXBD_NUM_8192F 0x0386 -+#define REG_BEQ_TXBD_NUM_8192F 0x0388 -+#define REG_BKQ_TXBD_NUM_8192F 0x038A -+#define REG_HI0Q_TXBD_NUM_8192F 0x038C -+#define REG_HI1Q_TXBD_NUM_8192F 0x038E -+#define REG_HI2Q_TXBD_NUM_8192F 0x0390 -+#define REG_HI3Q_TXBD_NUM_8192F 0x0392 -+#define REG_HI4Q_TXBD_NUM_8192F 0x0394 -+#define REG_HI5Q_TXBD_NUM_8192F 0x0396 -+#define REG_HI6Q_TXBD_NUM_8192F 0x0398 -+#define REG_HI7Q_TXBD_NUM_8192F 0x039A -+#define REG_TSFTIMER_HCI_8192F 0x039C -+#define REG_BD_RW_PTR_CLR_8192F 0x039C -+ -+/* Read Write Point */ -+#define REG_VOQ_TXBD_IDX_8192F 0x03A0 -+#define REG_VIQ_TXBD_IDX_8192F 0x03A4 -+#define REG_BEQ_TXBD_IDX_8192F 0x03A8 -+#define REG_BKQ_TXBD_IDX_8192F 0x03AC -+#define REG_MGQ_TXBD_IDX_8192F 0x03B0 -+#define REG_RXQ_TXBD_IDX_8192F 0x03B4 -+#define REG_HI0Q_TXBD_IDX_8192F 0x03B8 -+#define REG_HI1Q_TXBD_IDX_8192F 0x03BC -+#define REG_HI2Q_TXBD_IDX_8192F 0x03C0 -+#define REG_HI3Q_TXBD_IDX_8192F 0x03C4 -+#define REG_HI4Q_TXBD_IDX_8192F 0x03C8 -+#define REG_HI5Q_TXBD_IDX_8192F 0x03CC -+#define REG_HI6Q_TXBD_IDX_8192F 0x03D0 -+#define REG_HI7Q_TXBD_IDX_8192F 0x03D4 -+#define REG_DBI_WDATA_V1_8192F 0x03E8 -+#define REG_DBI_RDATA_V1_8192F 0x03EC -+#define REG_DBI_FLAG_V1_8192F 0x03F0 -+#define REG_MDIO_V1_8192F 0x03F4 -+#define REG_HCI_MIX_CFG_8192F 0x03FC -+#define REG_PCIE_HCPWM_8192FE 0x03D8 -+#define REG_PCIE_HRPWM_8192FE 0x03DC -+#define REG_PCIE_MIX_CFG_8192F 0x03F8 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_QUEUELIST_INFO0_8192F 0x0400 -+#define REG_QUEUELIST_INFO1_8192F 0x0404 -+#define REG_QUEUELIST_INFO2_8192F 0x0414 -+#define REG_TXPKT_EMPTY_8192F 0x0418 -+ -+#define REG_FWHW_TXQ_CTRL_8192F 0x0420 -+#define REG_HWSEQ_CTRL_8192F 0x0423 -+#define REG_TXPKTBUF_BCNQ_BDNY_8192F 0x0424 -+#define REG_TXPKTBUF_MGQ_BDNY_8192F 0x0425 -+#define REG_LIFECTRL_CTRL_8192F 0x0426 -+#define REG_MULTI_BCNQ_OFFSET_8192F 0x0427 -+#define REG_SPEC_SIFS_8192F 0x0428 -+#define REG_RL_8192F 0x042A -+#define REG_TXBF_CTRL_8192F 0x042C -+#define REG_DARFRC_8192F 0x0430 -+#define REG_RARFRC_8192F 0x0438 -+#define REG_RRSR_8192F 0x0440 -+#define REG_ARFR0_8192F 0x0444 -+#define REG_ARFR1_8192F 0x044C -+#define REG_CCK_CHECK_8192F 0x0454 -+#define REG_AMPDU_MAX_TIME_8192F 0x0456 -+#define REG_TXPKTBUF_BCNQ_BDNY1_8192F 0x0457 -+ -+#define REG_AMPDU_MAX_LENGTH_8192F 0x0458 -+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8192F 0x045D -+#define REG_NDPA_OPT_CTRL_8192F 0x045F -+#define REG_FAST_EDCA_CTRL_8192F 0x0460 -+#define REG_RD_RESP_PKT_TH_8192F 0x0463 -+#define REG_DATA_SC_8192F 0x0483 -+#define REG_TXRPT_START_OFFSET 0x04AC -+#define REG_POWER_STAGE1_8192F 0x04B4 -+#define REG_POWER_STAGE2_8192F 0x04B8 -+#define REG_AMPDU_BURST_MODE_8192F 0x04BC -+#define REG_PKT_VO_VI_LIFE_TIME_8192F 0x04C0 -+#define REG_PKT_BE_BK_LIFE_TIME_8192F 0x04C2 -+#define REG_STBC_SETTING_8192F 0x04C4 -+#define REG_HT_SINGLE_AMPDU_8192F 0x04C7 -+#define REG_PROT_MODE_CTRL_8192F 0x04C8 -+#define REG_MAX_AGGR_NUM_8192F 0x04CA -+#define REG_RTS_MAX_AGGR_NUM_8192F 0x04CB -+#define REG_BAR_MODE_CTRL_8192F 0x04CC -+#define REG_RA_TRY_RATE_AGG_LMT_8192F 0x04CF -+#define REG_MACID_PKT_DROP0_8192F 0x04D0 -+#define REG_MACID_PKT_SLEEP_8192F 0x04D4 -+#define REG_PRECNT_CTRL_8192F 0x04E5 -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_EDCA_VO_PARAM_8192F 0x0500 -+#define REG_EDCA_VI_PARAM_8192F 0x0504 -+#define REG_EDCA_BE_PARAM_8192F 0x0508 -+#define REG_EDCA_BK_PARAM_8192F 0x050C -+#define REG_BCNTCFG_8192F 0x0510 -+#define REG_PIFS_8192F 0x0512 -+#define REG_RDG_PIFS_8192F 0x0513 -+#define REG_SIFS_CTX_8192F 0x0514 -+#define REG_SIFS_TRX_8192F 0x0516 -+#define REG_AGGR_BREAK_TIME_8192F 0x051A -+#define REG_SLOT_8192F 0x051B -+#define REG_TX_PTCL_CTRL_8192F 0x0520 -+#define REG_TXPAUSE_8192F 0x0522 -+#define REG_DIS_TXREQ_CLR_8192F 0x0523 -+#define REG_RD_CTRL_8192F 0x0524 -+/* -+ * Format for offset 540h-542h: -+ * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. -+ * [7:4]: Reserved. -+ * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. -+ * [23:20]: Reserved -+ * Description: -+ * | -+ * |<--Setup--|--Hold------------>| -+ * --------------|---------------------- -+ * | -+ * TBTT -+ * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. -+ * Described by Designer Tim and Bruce, 2011-01-14. -+ * */ -+#define REG_TBTT_PROHIBIT_8192F 0x0540 -+#define REG_RD_NAV_NXT_8192F 0x0544 -+#define REG_NAV_PROT_LEN_8192F 0x0546 -+#define REG_BCN_CTRL_8192F 0x0550 -+#define REG_BCN_CTRL_1_8192F 0x0551 -+#define REG_MBID_NUM_8192F 0x0552 -+#define REG_DUAL_TSF_RST_8192F 0x0553 -+#define REG_BCN_INTERVAL_8192F 0x0554 -+#define REG_DRVERLYINT_8192F 0x0558 -+#define REG_BCNDMATIM_8192F 0x0559 -+#define REG_ATIMWND_8192F 0x055A -+#define REG_USTIME_TSF_8192F 0x055C -+#define REG_BCN_MAX_ERR_8192F 0x055D -+#define REG_RXTSF_OFFSET_CCK_8192F 0x055E -+#define REG_RXTSF_OFFSET_OFDM_8192F 0x055F -+#define REG_TSFTR_8192F 0x0560 -+#define REG_CTWND_8192F 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8192F 0x0577 -+#define REG_PSTIMER_8192F 0x0580 -+#define REG_TIMER0_8192F 0x0584 -+#define REG_TIMER1_8192F 0x0588 -+#define REG_ACMHWCTRL_8192F 0x05C0 -+#define REG_SCH_TXCMD_8192F 0x05F8 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_MAC_CR_8192F 0x0600 -+#define REG_TCR_8192F 0x0604 -+#define REG_RCR_8192F 0x0608 -+#define REG_RX_PKT_LIMIT_8192F 0x060C -+#define REG_RX_DLK_TIME_8192F 0x060D -+#define REG_RX_DRVINFO_SZ_8192F 0x060F -+ -+#define REG_MACID_8192F 0x0610 -+#define REG_BSSID_8192F 0x0618 -+#define REG_MAR_8192F 0x0620 -+#define REG_MBIDCAMCFG_8192F 0x0628 -+ -+ -+#define REG_USTIME_EDCA_8192F 0x0638 -+#define REG_MAC_SPEC_SIFS_8192F 0x063A -+#define REG_RESP_SIFP_CCK_8192F 0x063C -+#define REG_RESP_SIFS_OFDM_8192F 0x063E -+#define REG_ACKTO_8192F 0x0640 -+#define REG_CTS2TO_8192F 0x0641 -+#define REG_EIFS_8192F 0x0642 -+ -+#define REG_NAV_UPPER_8192F 0x0652 /* unit of 128*/ -+#define REG_TRXPTCL_CTL_8192F 0x0668 -+ -+/* Security*/ -+#define REG_CAMCMD_8192F 0x0670 -+#define REG_CAMWRITE_8192F 0x0674 -+#define REG_CAMREAD_8192F 0x0678 -+#define REG_CAMDBG_8192F 0x067C -+#define REG_SECCFG_8192F 0x0680 -+ -+/* Power */ -+#define REG_WOW_CTRL_8192F 0x0690 -+#define REG_PS_RX_INFO_8192F 0x0692 -+#define REG_UAPSD_TID_8192F 0x0693 -+#define REG_WKFMCAM_CMD_8192F 0x0698 -+#define REG_WKFMCAM_NUM_8192F 0x0698 -+#define REG_WKFMCAM_RWD_8192F 0x069C -+#define REG_RXFLTMAP0_8192F 0x06A0 -+#define REG_RXFLTMAP1_8192F 0x06A2 -+#define REG_RXFLTMAP2_8192F 0x06A4 -+#define REG_BCN_PSR_RPT_8192F 0x06A8 -+#define REG_BT_COEX_TABLE_8192F 0x06C0 -+#define REG_BFMER0_INFO_8192F 0x06E4 -+#define REG_BFMER1_INFO_8192F 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8192F 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8192F 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8192F 0x06FC -+ -+/* Hardware Port 2 */ -+#define REG_MACID1_8192F 0x0700 -+#define REG_BSSID1_8192F 0x0708 -+#define REG_BFMEE_SEL_8192F 0x0714 -+#define REG_SND_PTCL_CTRL_8192F 0x0718 -+ -+/* LTR */ -+#define REG_LTR_CTRL_BASIC_8192F 0x07A4 -+#define REG_LTR_IDLE_LATENCY_V1_8192F 0x0798 -+#define REG_LTR_ACTIVE_LATENCY_V1_8192F 0x079C -+ -+/* GPIO Control */ -+#define REG_SW_GPIO_SHARE_CTRL_8192F_0 0x1038 -+#define REG_SW_GPIO_SHARE_CTRL_8192F_1 0x103c -+#define REG_SW_GPIO_A_OUT_8192F 0x1040 -+#define REG_SW_GPIO_A_OEN_8192F 0x1044 -+ -+/* ************************************************************ -+ * SDIO Bus Specification -+ * ************************************************************ */ -+ -+/* ----------------------------------------------------- -+ * SDIO CMD Address Mapping -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * I/O bus domain (Host) -+ * ----------------------------------------------------- */ -+/*SDIO Host Interrupt Mask Register */ -+#define SDIO_HIMR_CRCERR_MSK BIT(31) -+/* SDIO Host Interrupt Service Routine */ -+#define SDIO_HISR_HEISR_IND_INT BIT(28) -+#define SDIO_HISR_HSISR2_IND_INT BIT(29) -+#define SDIO_HISR_HSISR3_IND_INT BIT(30) -+#define SDIO_HISR_SDIO_CRCERR BIT(31) -+/* ----------------------------------------------------- -+ * SDIO register -+ * ----------------------------------------------------- */ -+#define SDIO_REG_HCPWM1_8192F 0x038/* HCI Current Power Mode 1 */ -+#define SDIO_REG_FREE_TXPG1_8192F 0x0020 /* Free Tx Buffer Page1*/ -+#define SDIO_REG_FREE_TXPG2_8192F 0x0024 /* Free Tx Buffer Page1*/ -+#define SDIO_REG_FREE_TXPG3_8192F 0x0028 -+#define SDIO_REG_AC_OQT_FREEPG_8192F 0x002A -+#define SDIO_REG_NOAC_OQT_FREEPG_8192F 0x002B -+/* **************************************************************************** -+ * 8192F Regsiter Bit and Content definition -+ * **************************************************************************** */ -+ -+#define BIT_USB_RXDMA_AGG_EN BIT(31) -+#define RXDMA_AGG_MODE_EN BIT(1) -+ -+#ifdef CONFIG_WOWLAN -+ #define RXPKT_RELEASE_POLL BIT(16) -+ #define RXDMA_IDLE BIT(17) -+ #define RW_RELEASE_EN BIT(18) -+#endif -+ -+#ifdef CONFIG_AMPDU_PRETX_CD -+/*#define BIT_ERRORHDL_INT BIT(2)*/ -+/*#define BIT_MACTX_ERR_3 BIT(4)*/ -+#define BIT_PRE_TX_CMD_8192F BIT(6) -+#define BIT_EN_PRECNT_8192F BIT(11) -+#endif -+/* SDIO Host Interrupt Service Routine */ -+#define SDIO_HISR_HEISR_IND_INT BIT(28) -+#define SDIO_HISR_HSISR2_IND_INT BIT(29) -+#define SDIO_HISR_HSISR3_IND_INT BIT(30) -+#define SDIO_HISR_SDIO_CRCERR BIT(31) -+ -+/* PCIE Host Interrupt Mask Register (HIMR) */ -+#ifdef CONFIG_PCI_HCI -+/* ---------------------------------------------------------------------------- -+ * * 8192F IMR/ISR bits (offset 0xB0, 8bits) -+ * * ---------------------------------------------------------------------------- */ -+ -+#define IMR_DISABLED_8192F 0 -+/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -+#define IMR_TIMER2_8192F BIT(31) /* Timeout interrupt 2 */ -+#define IMR_TIMER1_8192F BIT(30) /* Timeout interrupt 1 */ -+#define IMR_PSTIMEOUT_8192F BIT(29) /* Power Save Time Out Interrupt */ -+#define IMR_GTINT4_8192F BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -+#define IMR_GTINT3_8192F BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -+#define IMR_TXBCN0ERR_8192F BIT(26) /* Transmit Beacon0 Error */ -+#define IMR_TXBCN0OK_8192F BIT(25) /* Transmit Beacon0 OK */ -+#define IMR_TSF_BIT32_TOGGLE_8192F BIT(24) /* TSF Timer BIT32 toggle indication interrupt */ -+#define IMR_BCNDMAINT0_8192F BIT(20) /* Beacon DMA Interrupt 0 */ -+#define IMR_BCNDERR0_8192F BIT(16) /* Beacon Queue DMA OK0 */ -+#define IMR_HSISR_IND_ON_INT_8192F BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -+#define IMR_BCNDMAINT_E_8192F BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -+#define IMR_ATIMEND_8192F BIT(12) /* CTWidnow End or ATIM Window End */ -+#define IMR_C2HCMD_8192F BIT(10) /* CPU to Host Command INT status, Write 1 clear */ -+#define IMR_CPWM2_8192F BIT(9) /* CPU power mode exchange INT status, Write 1 clear */ -+#define IMR_CPWM_8192F BIT(8) /* CPU power mode exchange INT status, Write 1 clear */ -+#define IMR_HIGHDOK_8192F BIT(7) /* High Queue DMA OK */ -+#define IMR_MGNTDOK_8192F BIT(6) /* Management Queue DMA OK */ -+#define IMR_BKDOK_8192F BIT(5) /* AC_BK DMA OK */ -+#define IMR_BEDOK_8192F BIT(4) /* AC_BE DMA OK */ -+#define IMR_VIDOK_8192F BIT(3) /* AC_VI DMA OK */ -+#define IMR_VODOK_8192F BIT(2) /* AC_VO DMA OK */ -+#define IMR_RDU_8192F BIT(1) /* Rx Descriptor Unavailable */ -+#define IMR_ROK_8192F BIT(0) /* Receive DMA OK */ -+ -+/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -+#define IMR_MCUERR_8192F BIT(28) -+#define IMR_BCNDMAINT7_8192F BIT(27) /* Beacon DMA Interrupt 7 */ -+#define IMR_BCNDMAINT6_8192F BIT(26) /* Beacon DMA Interrupt 6 */ -+#define IMR_BCNDMAINT5_8192F BIT(25) /* Beacon DMA Interrupt 5 */ -+#define IMR_BCNDMAINT4_8192F BIT(24) /* Beacon DMA Interrupt 4 */ -+#define IMR_BCNDMAINT3_8192F BIT(23) /* Beacon DMA Interrupt 3 */ -+#define IMR_BCNDMAINT2_8192F BIT(22) /* Beacon DMA Interrupt 2 */ -+#define IMR_BCNDMAINT1_8192F BIT(21) /* Beacon DMA Interrupt 1 */ -+#define IMR_BCNDOK7_8192F BIT(20) /* Beacon Queue DMA OK Interrup 7 */ -+#define IMR_BCNDOK6_8192F BIT(19) /* Beacon Queue DMA OK Interrup 6 */ -+#define IMR_BCNDOK5_8192F BIT(18) /* Beacon Queue DMA OK Interrup 5 */ -+#define IMR_BCNDOK4_8192F BIT(17) /* Beacon Queue DMA OK Interrup 4 */ -+#define IMR_BCNDOK3_8192F BIT(16) /* Beacon Queue DMA OK Interrup 3 */ -+#define IMR_BCNDOK2_8192F BIT(15) /* Beacon Queue DMA OK Interrup 2 */ -+#define IMR_BCNDOK1_8192F BIT(14) /* Beacon Queue DMA OK Interrup 1 */ -+#define IMR_ATIMEND_E_8192F BIT(13) /* ATIM Window End Extension for Win7 */ -+#define IMR_TXERR_8192F BIT(11) /* Tx Error Flag Interrupt status, write 1 clear. */ -+#define IMR_RXERR_8192F BIT(10) /* Rx Error Flag INT status, Write 1 clear */ -+#define IMR_TXFOVW_8192F BIT(9) /* Transmit FIFO Overflow */ -+#define IMR_RXFOVW_8192F BIT(8) /* Receive FIFO Overflow */ -+ -+/* #define IMR_RX_MASK (IMR_ROK_8192F|IMR_RDU_8192F|IMR_RXFOVW_8192F) */ -+#define IMR_TX_MASK (IMR_VODOK_8192F | IMR_VIDOK_8192F | IMR_BEDOK_8192F | IMR_BKDOK_8192F | IMR_MGNTDOK_8192F | IMR_HIGHDOK_8192F) -+#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8192F | IMR_TXBCN0OK_8192F | IMR_TXBCN0ERR_8192F | IMR_BCNDERR0_8192F) -+#define RT_AC_INT_MASKS (IMR_VIDOK_8192F | IMR_VODOK_8192F | IMR_BEDOK_8192F | IMR_BKDOK_8192F) -+#endif /* CONFIG_PCI_HCI */ -+ -+/* 2 HSISR -+ * interrupt mask which needs to clear */ -+#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ -+ HSISR_SPS_OCP_INT |\ -+ HSISR_RON_INT |\ -+ HSISR_PDNINT |\ -+ HSISR_GPIO9_INT) -+ -+#define _TXDMA_HIQ_MAP_8192F(x) (((x) & 0x7) << 19) -+#define _TXDMA_MGQ_MAP_8192F(x) (((x) & 0x7) << 16) -+#define _TXDMA_BKQ_MAP_8192F(x) (((x) & 0x7) << 13) -+#define _TXDMA_BEQ_MAP_8192F(x) (((x) & 0x7) << 10) -+#define _TXDMA_VIQ_MAP_8192F(x) (((x) & 0x7) << 7) -+#define _TXDMA_VOQ_MAP_8192F(x) (((x) & 0x7) << 4) -+ -+/*mac queue info*/ -+#define QUEUE_TOTAL_NUM 20/*reg414h : 0~f ac queue 0x10~0x13MGQ HIQ BCNQ CMDQ*/ -+#define QUEUE_ACQ_NUM 16 -+#define QUEUE_INDEX_MGQ 0x10 -+#define QUEUE_INDEX_HIQ 0x11 -+#define QUEUE_INDEX_BCNQ 0x12 -+#define QUEUE_INDEX_CMDQ 0x13 -+#endif /* __RTL8192F_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8192f_sreset.h b/drivers/staging/rtl8723cs/include/rtl8192f_sreset.h -new file mode 100644 -index 000000000000..cf881c43184c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192f_sreset.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8192F_SRESET_H_ -+#define _RTL8192F_SRESET_H_ -+ -+#include -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ extern void rtl8192f_sreset_xmit_status_check(_adapter *padapter); -+ extern void rtl8192f_sreset_linked_status_check(_adapter *padapter); -+#endif /* DBG_CONFIG_ERROR_DETECT */ -+#endif /* _RTL8192F_SRESET_H_ */ -\ No newline at end of file -diff --git a/drivers/staging/rtl8723cs/include/rtl8192f_xmit.h b/drivers/staging/rtl8723cs/include/rtl8192f_xmit.h -new file mode 100644 -index 000000000000..1763f57632fb ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8192f_xmit.h -@@ -0,0 +1,538 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8192F_XMIT_H__ -+#define __RTL8192F_XMIT_H__ -+ -+ -+#define MAX_TID (15) -+ -+ -+#ifndef __INC_HAL8192FDESC_H -+#define __INC_HAL8192FDESC_H -+ -+#define RX_STATUS_DESC_SIZE_8192F 24 -+#define RX_DRV_INFO_SIZE_UNIT_8192F 8 -+ -+ -+/* DWORD 0 */ -+#define SET_RX_STATUS_DESC_PKT_LEN_8192F(__pRxStatusDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_8192F(__pRxStatusDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_8192F(__pRxStatusDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) -+ -+#define GET_RX_STATUS_DESC_PKT_LEN_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICV_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_EOR_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_OWN_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+ -+/* DWORD 1 */ -+#define GET_RX_STATUS_DESC_MACID_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_TID_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_AMSDU_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_A1_FIT_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -+#define GET_RX_STATUS_DESC_CHKERR_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_IPVER_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_IS_TCPUDP__8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_CHK_VLD_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_MC_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) -+ -+/* DWORD 2 */ -+#define GET_RX_STATUS_DESC_SEQ_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -+#define GET_RX_STATUS_DESC_RX_IS_QOS_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_RPT_SEL_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -+#define GET_RX_STATUS_DESC_FCS_OK_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) -+ -+/* DWORD 3 */ -+#define GET_RX_STATUS_DESC_RX_RATE_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_HTC_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -+#ifdef CONFIG_USB_RX_AGGREGATION -+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -+#endif -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_MATCH_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_MATCH_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) -+ -+/* DWORD 6 */ -+#define GET_RX_STATUS_DESC_MATCH_ID_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7) -+ -+/* DWORD 5 */ -+#define GET_RX_STATUS_DESC_TSFL_8192F(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) -+ -+#define GET_RX_STATUS_DESC_BUFF_ADDR64_8192F(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+ -+ -+/* Dword 0, rsvd: bit26, bit28 */ -+#define GET_TX_DESC_OWN_8192F(__pTxDesc)\ -+ LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+#define SET_TX_DESC_PKT_SIZE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define SET_TX_DESC_OFFSET_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define SET_TX_DESC_BMC_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_AMSDU_PAD_EN_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_NO_ACM_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+ -+/* Dword 1 */ -+#define SET_TX_DESC_MACID_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+#define SET_TX_DESC_MORE_DATA_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) -+ -+/* Dword 2 ADD HW_DIG*/ -+#define SET_TX_DESC_PAID_92F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+#define SET_TX_DESC_CCA_RTS_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_NULL0_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -+#define SET_TX_DESC_NULL1_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -+#define SET_TX_DESC_BK_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define SET_TX_DESC_RAW_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define SET_TX_DESC_CCX_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_INT_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_HW_DIG_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 7, __Value) -+ -+/* Dword 3 */ -+#define SET_TX_DESC_HWSEQ_SEL_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_CHK_EN_92F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_NDPA_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+/* Dword 4 */ -+#define SET_TX_DESC_TX_RATE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_TX_TRY_RATE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+#define SET_TX_DESC_PCTS_EN_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -+#define SET_TX_DESC_PCTS_MASK_IDX_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) -+ -+/* Dword 5 */ -+#define SET_TX_DESC_DATA_SC_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_LDPC_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+#define SET_TX_DESC_DATA_STBC_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_RTS_STBC_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+#define SET_TX_DESC_PORT_ID_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 1, __Value) -+#define SET_TX_DESC_DROP_ID_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 22, 2, __Value) -+#define SET_TX_DESC_PATH_A_EN_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value) -+#define SET_TX_DESC_PATH_B_EN_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 25, 1, __Value) -+#define SET_TX_DESC_TXPWR_OF_SET_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) -+ -+/* Dword 6 */ -+#define SET_TX_DESC_SW_DEFINE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_MBSSID_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+#define SET_TX_DESC_RF_SEL_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+ -+/* Dword 7 */ -+#ifdef CONFIG_PCI_HCI -+#define SET_TX_DESC_TX_BUFFER_SIZE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+ -+#ifdef CONFIG_USB_HCI -+#define SET_TX_DESC_TX_DESC_CHECKSUM_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+#define SET_TX_DESC_TX_TIMESTAMP_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value) -+#endif -+ -+#define SET_TX_DESC_USB_TXAGG_NUM_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+ -+/* Dword 8 */ -+#define SET_TX_DESC_RTS_RC_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -+#define SET_TX_DESC_BAR_RC_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -+#define SET_TX_DESC_DATA_RC_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -+#define SET_TX_DESC_HWSEQ_EN_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+#define SET_TX_DESC_NEXTHEADPAGE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -+#define SET_TX_DESC_TAILPAGE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) -+ -+/* Dword 9 */ -+#define SET_TX_DESC_PADDING_LEN_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -+#define SET_TX_DESC_SEQ_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+#define SET_TX_DESC_FINAL_DATA_RATE_8192F(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) -+ -+ -+#define SET_EARLYMODE_PKTNUM_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+ -+/*-----------------------------------------------------------------*/ -+/* RTL8192F TX BUFFER DESC */ -+/*-----------------------------------------------------------------*/ -+#ifdef CONFIG_64BIT_DMA -+ #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) -+ #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) -+#else -+ #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) -+ #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) /* 64 BIT mode only */ -+#endif -+/* ********************************************************* */ -+ -+/* 64 bits -- 32 bits */ -+/* ======= ======= */ -+/* Dword 0 0 */ -+#define SET_TX_BUFF_DESC_LEN_0_8192F(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) -+#define SET_TX_BUFF_DESC_PSB_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -+#define SET_TX_BUFF_DESC_OWN_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+/* Dword 1 1 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_0_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -+#define GET_TX_BUFF_DESC_ADDR_LOW_0_8192F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) -+/* Dword 2 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value) -+#ifdef CONFIG_64BIT_DMA -+ #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) -+#else -+ #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc) 0 -+#endif -+/* Dword 3 NA */ -+/* RESERVED 0 */ -+/* Dword 4 2 */ -+#define SET_TX_BUFF_DESC_LEN_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value) -+/* Dword 5 3 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value) -+/* Dword 6 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value) -+/* Dword 7 NA */ -+/*RESERVED 0 */ -+/* Dword 8 4 */ -+#define SET_TX_BUFF_DESC_LEN_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value) -+/* Dword 9 5 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value) -+/* Dword 10 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value) -+/* Dword 11 NA */ -+/*RESERVED 0 */ -+/* Dword 12 6 */ -+#define SET_TX_BUFF_DESC_LEN_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value) -+/* Dword 13 7 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value) -+/* Dword 14 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value) -+/* Dword 15 NA */ -+/*RESERVED 0 */ -+ -+ -+#endif -+/* ----------------------------------------------------------- -+ * -+ * Rate -+ * -+ * ----------------------------------------------------------- -+ * CCK Rates, TxHT = 0 */ -+#define DESC8192F_RATE1M 0x00 -+#define DESC8192F_RATE2M 0x01 -+#define DESC8192F_RATE5_5M 0x02 -+#define DESC8192F_RATE11M 0x03 -+ -+/* OFDM Rates, TxHT = 0 */ -+#define DESC8192F_RATE6M 0x04 -+#define DESC8192F_RATE9M 0x05 -+#define DESC8192F_RATE12M 0x06 -+#define DESC8192F_RATE18M 0x07 -+#define DESC8192F_RATE24M 0x08 -+#define DESC8192F_RATE36M 0x09 -+#define DESC8192F_RATE48M 0x0a -+#define DESC8192F_RATE54M 0x0b -+ -+/* MCS Rates, TxHT = 1 */ -+#define DESC8192F_RATEMCS0 0x0c -+#define DESC8192F_RATEMCS1 0x0d -+#define DESC8192F_RATEMCS2 0x0e -+#define DESC8192F_RATEMCS3 0x0f -+#define DESC8192F_RATEMCS4 0x10 -+#define DESC8192F_RATEMCS5 0x11 -+#define DESC8192F_RATEMCS6 0x12 -+#define DESC8192F_RATEMCS7 0x13 -+#define DESC8192F_RATEMCS8 0x14 -+#define DESC8192F_RATEMCS9 0x15 -+#define DESC8192F_RATEMCS10 0x16 -+#define DESC8192F_RATEMCS11 0x17 -+#define DESC8192F_RATEMCS12 0x18 -+#define DESC8192F_RATEMCS13 0x19 -+#define DESC8192F_RATEMCS14 0x1a -+#define DESC8192F_RATEMCS15 0x1b -+#define DESC8192F_RATEVHTSS1MCS0 0x2c -+#define DESC8192F_RATEVHTSS1MCS1 0x2d -+#define DESC8192F_RATEVHTSS1MCS2 0x2e -+#define DESC8192F_RATEVHTSS1MCS3 0x2f -+#define DESC8192F_RATEVHTSS1MCS4 0x30 -+#define DESC8192F_RATEVHTSS1MCS5 0x31 -+#define DESC8192F_RATEVHTSS1MCS6 0x32 -+#define DESC8192F_RATEVHTSS1MCS7 0x33 -+#define DESC8192F_RATEVHTSS1MCS8 0x34 -+#define DESC8192F_RATEVHTSS1MCS9 0x35 -+#define DESC8192F_RATEVHTSS2MCS0 0x36 -+#define DESC8192F_RATEVHTSS2MCS1 0x37 -+#define DESC8192F_RATEVHTSS2MCS2 0x38 -+#define DESC8192F_RATEVHTSS2MCS3 0x39 -+#define DESC8192F_RATEVHTSS2MCS4 0x3a -+#define DESC8192F_RATEVHTSS2MCS5 0x3b -+#define DESC8192F_RATEVHTSS2MCS6 0x3c -+#define DESC8192F_RATEVHTSS2MCS7 0x3d -+#define DESC8192F_RATEVHTSS2MCS8 0x3e -+#define DESC8192F_RATEVHTSS2MCS9 0x3f -+ -+ -+#define RX_HAL_IS_CCK_RATE_8192F(pDesc)\ -+ (GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE1M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE2M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE5_5M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE11M) -+ -+#ifdef CONFIG_TRX_BD_ARCH -+ struct tx_desc; -+#endif -+ -+void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+void rtl8192f_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -+void rtl8192f_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -+void rtl8192f_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -+void rtl8192f_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -+void rtl8192f_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+ -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8192fs_init_xmit_priv(PADAPTER padapter); -+ void rtl8192fs_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8192fs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8192fs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8192fs_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8192fs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8192fs_xmit_buf_handler(PADAPTER padapter); -+ thread_return rtl8192fs_xmit_thread(thread_context context); -+ #define hal_xmit_handler rtl8192fs_xmit_buf_handler -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ s32 rtl8192fu_init_xmit_priv(PADAPTER padapter); -+ void rtl8192fu_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8192fu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8192fu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8192fu_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8192fu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8192fu_xmit_buf_handler(PADAPTER padapter); -+ #define hal_xmit_handler rtl8192fu_xmit_buf_handler -+ void rtl8192fu_xmit_tasklet(void *priv); -+ s32 rtl8192fu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+ void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8192fe_init_xmit_priv(PADAPTER padapter); -+ void rtl8192fe_free_xmit_priv(PADAPTER padapter); -+ struct xmit_buf *rtl8192fe_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+ void rtl8192fe_xmitframe_resume(_adapter *padapter); -+ s32 rtl8192fe_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8192fe_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8192fe_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8192fe_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ void rtl8192fe_xmit_tasklet(void *priv); -+#endif -+ -+u8 BWMapping_8192F(PADAPTER Adapter, struct pkt_attrib *pattrib); -+u8 SCMapping_8192F(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8703b_cmd.h b/drivers/staging/rtl8723cs/include/rtl8703b_cmd.h -new file mode 100644 -index 000000000000..522a3bcb7a68 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8703b_cmd.h -@@ -0,0 +1,199 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8703B_CMD_H__ -+#define __RTL8703B_CMD_H__ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+enum h2c_cmd_8703B { -+ /* Common Class: 000 */ -+ H2C_8703B_RSVD_PAGE = 0x00, -+ H2C_8703B_MEDIA_STATUS_RPT = 0x01, -+ H2C_8703B_SCAN_ENABLE = 0x02, -+ H2C_8703B_KEEP_ALIVE = 0x03, -+ H2C_8703B_DISCON_DECISION = 0x04, -+ H2C_8703B_PSD_OFFLOAD = 0x05, -+ H2C_8703B_AP_OFFLOAD = 0x08, -+ H2C_8703B_BCN_RSVDPAGE = 0x09, -+ H2C_8703B_PROBERSP_RSVDPAGE = 0x0A, -+ H2C_8703B_FCS_RSVDPAGE = 0x10, -+ H2C_8703B_FCS_INFO = 0x11, -+ H2C_8703B_AP_WOW_GPIO_CTRL = 0x13, -+ -+ /* PoweSave Class: 001 */ -+ H2C_8703B_SET_PWR_MODE = 0x20, -+ H2C_8703B_PS_TUNING_PARA = 0x21, -+ H2C_8703B_PS_TUNING_PARA2 = 0x22, -+ H2C_8703B_P2P_LPS_PARAM = 0x23, -+ H2C_8703B_P2P_PS_OFFLOAD = 0x24, -+ H2C_8703B_PS_SCAN_ENABLE = 0x25, -+ H2C_8703B_SAP_PS_ = 0x26, -+ H2C_8703B_INACTIVE_PS_ = 0x27, /* Inactive_PS */ -+ H2C_8703B_FWLPS_IN_IPS_ = 0x28, -+ -+ /* Dynamic Mechanism Class: 010 */ -+ H2C_8703B_MACID_CFG = 0x40, -+ H2C_8703B_TXBF = 0x41, -+ H2C_8703B_RSSI_SETTING = 0x42, -+ H2C_8703B_AP_REQ_TXRPT = 0x43, -+ H2C_8703B_INIT_RATE_COLLECT = 0x44, -+ H2C_8703B_RA_PARA_ADJUST = 0x46, -+ -+ /* BT Class: 011 */ -+ H2C_8703B_B_TYPE_TDMA = 0x60, -+ H2C_8703B_BT_INFO = 0x61, -+ H2C_8703B_FORCE_BT_TXPWR = 0x62, -+ H2C_8703B_BT_IGNORE_WLANACT = 0x63, -+ H2C_8703B_DAC_SWING_VALUE = 0x64, -+ H2C_8703B_ANT_SEL_RSV = 0x65, -+ H2C_8703B_WL_OPMODE = 0x66, -+ H2C_8703B_BT_MP_OPER = 0x67, -+ H2C_8703B_BT_CONTROL = 0x68, -+ H2C_8703B_BT_WIFI_CTRL = 0x69, -+ H2C_8703B_BT_FW_PATCH = 0x6A, -+ H2C_8703B_BT_WLAN_CALIBRATION = 0x6D, -+ -+ /* WOWLAN Class: 100 */ -+ H2C_8703B_WOWLAN = 0x80, -+ H2C_8703B_REMOTE_WAKE_CTRL = 0x81, -+ H2C_8703B_AOAC_GLOBAL_INFO = 0x82, -+ H2C_8703B_AOAC_RSVD_PAGE = 0x83, -+ H2C_8703B_AOAC_RSVD_PAGE2 = 0x84, -+ H2C_8703B_D0_SCAN_OFFLOAD_CTRL = 0x85, -+ H2C_8703B_D0_SCAN_OFFLOAD_INFO = 0x86, -+ H2C_8703B_CHNL_SWITCH_OFFLOAD = 0x87, -+ H2C_8703B_P2P_OFFLOAD_RSVD_PAGE = 0x8A, -+ H2C_8703B_P2P_OFFLOAD = 0x8B, -+ -+ H2C_8703B_RESET_TSF = 0xC0, -+ H2C_8703B_MAXID, -+}; -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- -+ * _RSVDPAGE_LOC_CMD_0x00 */ -+#define SET_8703B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8703B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8703B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8703B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8703B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+/* _KEEP_ALIVE_CMD_0x03 */ -+#define SET_8703B_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8703B_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8703B_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_8703B_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+ -+/* _DISCONNECT_DECISION_CMD_0x04 */ -+#define SET_8703B_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8703B_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8703B_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8703B_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+ -+/* _PWR_MOD_CMD_0x20 */ -+#define SET_8703B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8703B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_8703B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_8703B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8703B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8703B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -+#define SET_8703B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+#define GET_8703B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) -+ -+/* _PS_TUNE_PARAM_CMD_0x21 */ -+#define SET_8703B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8703B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8703B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -+#define SET_8703B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -+#define SET_8703B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _MACID_CFG_CMD_0x40 */ -+#define SET_8703B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -+#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) -+ -+/* _RSSI_SETTING_CMD_0x42 */ -+#define SET_8703B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8703B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -+#define SET_8703B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _AP_REQ_TXRPT_CMD_0x43 */ -+#define SET_8703B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8703B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+ -+/* _FORCE_BT_TXPWR_CMD_0x62 */ -+#define SET_8703B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+ -+/* _FORCE_BT_MP_OPER_CMD_0x67 */ -+#define SET_8703B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_8703B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -+#define SET_8703B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8703B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+#define SET_8703B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8703B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+ -+/* _BT_FW_PATCH_0x6A */ -+#define SET_8703B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) -+#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ------------------------------------------- Structure -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- Function Statement -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+/* host message to firmware cmd */ -+void rtl8703b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -+void rtl8703b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -+void rtl8703b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); -+/* s32 rtl8703b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -+void rtl8703b_set_FwPsTuneParam_cmd(PADAPTER padapter); -+void rtl8703b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); -+void rtl8703b_download_rsvd_page(PADAPTER padapter, u8 mstatus); -+#ifdef CONFIG_BT_COEXIST -+ void rtl8703b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -+#endif /* CONFIG_BT_COEXIST */ -+#ifdef CONFIG_P2P -+ void rtl8703b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_P2P_WOWLAN -+ void rtl8703b_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -+#endif -+ -+void rtl8703b_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); -+ -+s32 FillH2CCmd8703B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+u8 GetTxBufferRsvdPageNum8703B(_adapter *padapter, bool wowlan); -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8703b_dm.h b/drivers/staging/rtl8723cs/include/rtl8703b_dm.h -new file mode 100644 -index 000000000000..912c7da079ea ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8703b_dm.h -@@ -0,0 +1,39 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8703B_DM_H__ -+#define __RTL8703B_DM_H__ -+/* ************************************************************ -+ * Description: -+ * -+ * This file is for 8703B dynamic mechanism only -+ * -+ * -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * structure and define -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * function prototype -+ * ************************************************************ */ -+ -+void rtl8703b_init_dm_priv(PADAPTER padapter); -+void rtl8703b_deinit_dm_priv(PADAPTER padapter); -+ -+void rtl8703b_InitHalDm(PADAPTER padapter); -+void rtl8703b_HalDmWatchDog(PADAPTER padapter); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8703b_hal.h b/drivers/staging/rtl8723cs/include/rtl8703b_hal.h -new file mode 100644 -index 000000000000..4a83abf458ab ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8703b_hal.h -@@ -0,0 +1,266 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8703B_HAL_H__ -+#define __RTL8703B_HAL_H__ -+ -+#include "hal_data.h" -+ -+#include "rtl8703b_spec.h" -+#include "rtl8703b_rf.h" -+#include "rtl8703b_dm.h" -+#include "rtl8703b_recv.h" -+#include "rtl8703b_xmit.h" -+#include "rtl8703b_cmd.h" -+#include "rtl8703b_led.h" -+#include "Hal8703BPwrSeq.h" -+#include "Hal8703BPhyReg.h" -+#include "Hal8703BPhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+ #include "rtl8703b_sreset.h" -+#endif -+ -+#define FW_8703B_SIZE 0x8000 -+#define FW_8703B_START_ADDRESS 0x1000 -+#define FW_8703B_END_ADDRESS 0x1FFF /* 0x5FFF */ -+ -+#define IS_FW_HEADER_EXIST_8703B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x03B0) -+ -+typedef struct _RT_FIRMWARE { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[FW_8703B_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8703B, *PRT_FIRMWARE_8703B; -+ -+/* -+ * This structure must be cared byte-ordering -+ * -+ * Added by tynli. 2009.12.04. */ -+typedef struct _RT_8703B_FIRMWARE_HDR { -+ /* 8-byte alinment required */ -+ -+ /* --- LONG WORD 0 ---- */ -+ u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ -+ u8 Category; /* AP/NIC and USB/PCI */ -+ u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -+ u16 Version; /* FW Version */ -+ u16 Subversion; /* FW Subversion, default 0x00 */ -+ -+ /* --- LONG WORD 1 ---- */ -+ u8 Month; /* Release time Month field */ -+ u8 Date; /* Release time Date field */ -+ u8 Hour; /* Release time Hour field */ -+ u8 Minute; /* Release time Minute field */ -+ u16 RamCodeSize; /* The size of RAM code */ -+ u16 Rsvd2; -+ -+ /* --- LONG WORD 2 ---- */ -+ u32 SvnIdx; /* The SVN entry index */ -+ u32 Rsvd3; -+ -+ /* --- LONG WORD 3 ---- */ -+ u32 Rsvd4; -+ u32 Rsvd5; -+} RT_8703B_FIRMWARE_HDR, *PRT_8703B_FIRMWARE_HDR; -+ -+#define DRIVER_EARLY_INT_TIME_8703B 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8703B 0x02 -+ -+/* for 8703B -+ * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ -+#define PAGE_SIZE_TX_8703B 128 -+#define PAGE_SIZE_RX_8703B 8 -+ -+#define TX_DMA_SIZE_8703B 0x8000 /* 32K(TX) */ -+#define RX_DMA_SIZE_8703B 0x4000 /* 16K(RX) */ -+ -+#ifdef CONFIG_WOWLAN -+ #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -+#else -+ #define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8703B 0x100 /* 256B, reserved for c2h debug message */ -+#else -+ #define RX_DMA_RESERVED_SIZE_8703B 0x80 /* 128B, reserved for tx report */ -+#endif -+#define RX_DMA_BOUNDARY_8703B (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B - 1) -+ -+ -+/* Note: We will divide number of page equally for each queue other than public queue! */ -+ -+/* For General Reserved Page Number(Beacon Queue is reserved page) -+ * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8703B -+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -+ -+#define BCNQ_PAGE_NUM_8703B (MAX_BEACON_LEN/PAGE_SIZE_TX_8703B + 6) /*0x08*/ -+ -+/* For WoWLan , more reserved page -+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1 PNO: 6 -+ * NS offload: 2NDP info: 1 -+ */ -+#ifdef CONFIG_WOWLAN -+ #define WOWLAN_PAGE_NUM_8703B 0x0b -+#else -+ #define WOWLAN_PAGE_NUM_8703B 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+ #undef WOWLAN_PAGE_NUM_8703B -+ #define WOWLAN_PAGE_NUM_8703B 0x15 -+#endif -+ -+#ifdef CONFIG_AP_WOWLAN -+ #define AP_WOWLAN_PAGE_NUM_8703B 0x02 -+#endif -+ -+#define TX_TOTAL_PAGE_NUMBER_8703B (0xFF - BCNQ_PAGE_NUM_8703B - WOWLAN_PAGE_NUM_8703B) -+#define TX_PAGE_BOUNDARY_8703B (TX_TOTAL_PAGE_NUMBER_8703B + 1) -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B TX_TOTAL_PAGE_NUMBER_8703B -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8703B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B + 1) -+ -+/* For Normal Chip Setting -+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8703B */ -+#define NORMAL_PAGE_NUM_HPQ_8703B 0x0C -+#define NORMAL_PAGE_NUM_LPQ_8703B 0x02 -+#define NORMAL_PAGE_NUM_NPQ_8703B 0x02 -+ -+/* Note: For Normal Chip Setting, modify later */ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8703B 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8703B 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8703B 0x20 -+ -+ -+#include "HalVerDef.h" -+#include "hal_com.h" -+ -+#define EFUSE_OOB_PROTECT_BYTES 15 -+ -+#define HAL_EFUSE_MEMORY -+ -+#define HWSET_MAX_SIZE_8703B 256 -+#define EFUSE_REAL_CONTENT_LEN_8703B 256 -+#define EFUSE_MAP_LEN_8703B 512 -+#define EFUSE_MAX_SECTION_8703B 64 -+ -+#define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8703B) -+ -+#define EFUSE_ACCESS_ON 0x69 -+#define EFUSE_ACCESS_OFF 0x00 -+ -+/* ******************************************************** -+ * EFUSE for BT definition -+ * ******************************************************** */ -+#define BANK_NUM 1 -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN 128 -+#define EFUSE_BT_REAL_CONTENT_LEN (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM) -+#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -+#define EFUSE_BT_MAX_SECTION (EFUSE_BT_MAP_LEN / 8) -+#define EFUSE_PROTECT_BYTES_BANK 16 -+ -+typedef enum tag_Package_Definition { -+ PACKAGE_DEFAULT, -+ PACKAGE_QFN68, -+ PACKAGE_TFBGA90, -+ PACKAGE_TFBGA80, -+ PACKAGE_TFBGA79 -+} PACKAGE_TYPE_E; -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+/* rtl8703b_hal_init.c */ -+s32 rtl8703b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -+void rtl8703b_FirmwareSelfReset(PADAPTER padapter); -+void rtl8703b_InitializeFirmwareVars(PADAPTER padapter); -+ -+void rtl8703b_InitAntenna_Selection(PADAPTER padapter); -+void rtl8703b_DeinitAntenna_Selection(PADAPTER padapter); -+void rtl8703b_CheckAntenna_Selection(PADAPTER padapter); -+void rtl8703b_init_default_value(PADAPTER padapter); -+ -+s32 rtl8703b_InitLLTTable(PADAPTER padapter); -+ -+s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -+s32 CardDisableWithoutHWSM(PADAPTER padapter); -+ -+/* EFuse */ -+u8 GetEEPROMSize8703B(PADAPTER padapter); -+void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -+void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -+void Hal_EfuseParseTxPowerInfo_8703B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBTCoexistInfo_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseEEPROMVer_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseChnlPlan_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseCustomerID_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseAntennaDiversity_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8703B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseThermalMeter_8703B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseVoltage_8703B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBoardType_8703B(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+ -+void rtl8703b_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8703b(_adapter *adapter); -+u8 SetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val); -+u8 SetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+ -+/* register */ -+void rtl8703b_InitBeaconParameters(PADAPTER padapter); -+void rtl8703b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -+void _InitBurstPktLen_8703BS(PADAPTER Adapter); -+void _InitLTECoex_8703BS(PADAPTER Adapter); -+void _InitMacAPLLSetting_8703B(PADAPTER Adapter); -+void _8051Reset8703(PADAPTER padapter); -+#ifdef CONFIG_WOWLAN -+ void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif /* CONFIG_WOWLAN */ -+ -+void rtl8703b_start_thread(_adapter *padapter); -+void rtl8703b_stop_thread(_adapter *padapter); -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+ void rtl8703bs_init_checkbthang_workqueue(_adapter *adapter); -+ void rtl8703bs_free_checkbthang_workqueue(_adapter *adapter); -+ void rtl8703bs_cancle_checkbthang_workqueue(_adapter *adapter); -+ void rtl8703bs_hal_check_bt_hang(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -+#endif -+#ifdef CONFIG_MP_INCLUDED -+int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -+#endif -+void CCX_FwC2HTxRpt_8703b(PADAPTER padapter, u8 *pdata, u8 len); -+ -+u8 MRateToHwRate8703B(u8 rate); -+u8 HwRateToMRate8703B(u8 rate); -+ -+void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+ -+#ifdef CONFIG_PCI_HCI -+ BOOLEAN InterruptRecognized8703BE(PADAPTER Adapter); -+ void UpdateInterruptMask8703BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8703b_led.h b/drivers/staging/rtl8723cs/include/rtl8703b_led.h -new file mode 100644 -index 000000000000..99e590d31bc5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8703b_led.h -@@ -0,0 +1,44 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8703B_LED_H__ -+#define __RTL8703B_LED_H__ -+ -+#include -+#include -+#include -+ -+#ifdef CONFIG_RTW_SW_LED -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+#ifdef CONFIG_USB_HCI -+ void rtl8703bu_InitSwLeds(PADAPTER padapter); -+ void rtl8703bu_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+ void rtl8703bs_InitSwLeds(PADAPTER padapter); -+ void rtl8703bs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_GSPI_HCI -+ void rtl8703bs_InitSwLeds(PADAPTER padapter); -+ void rtl8703bs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+ void rtl8703be_InitSwLeds(PADAPTER padapter); -+ void rtl8703be_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif/*CONFIG_RTW_SW_LED*/ -+#endif /*__RTL8703B_LED_H__*/ -diff --git a/drivers/staging/rtl8723cs/include/rtl8703b_recv.h b/drivers/staging/rtl8723cs/include/rtl8703b_recv.h -new file mode 100644 -index 000000000000..92bc452b813d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8703b_recv.h -@@ -0,0 +1,83 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8703B_RECV_H__ -+#define __RTL8703B_RECV_H__ -+ -+#define RECV_BLK_SZ 512 -+#define RECV_BLK_CNT 16 -+#define RECV_BLK_TH RECV_BLK_CNT -+ -+#if defined(CONFIG_USB_HCI) -+ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ -+ /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ -+ /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ -+ #ifdef CONFIG_PLATFORM_MSTAR -+ #define MAX_RECVBUF_SZ (8192) /* 8K */ -+ #else -+ #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ -+ #endif -+ /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ -+ #else -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+#elif defined(CONFIG_PCI_HCI) -+ /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ -+ /* #define MAX_RECVBUF_SZ (9100) */ -+ /* #else */ -+ #define MAX_RECVBUF_SZ (4000) /* about 4K -+ * #endif */ -+ -+ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ -+ #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B) -+ -+#endif -+ -+/* Rx smooth factor */ -+#define Rx_Smooth_Factor (20) -+ -+#ifdef CONFIG_SDIO_HCI -+ #ifndef CONFIG_SDIO_RX_COPY -+ #undef MAX_RECVBUF_SZ -+ #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B) -+ #endif /* !CONFIG_SDIO_RX_COPY */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8703bs_init_recv_priv(PADAPTER padapter); -+ void rtl8703bs_free_recv_priv(PADAPTER padapter); -+ s32 rtl8703bs_recv_hdl(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ int rtl8703bu_init_recv_priv(_adapter *padapter); -+ void rtl8703bu_free_recv_priv(_adapter *padapter); -+ void rtl8703bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8703be_init_recv_priv(PADAPTER padapter); -+ void rtl8703be_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8703b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8703B_RECV_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8703b_rf.h b/drivers/staging/rtl8723cs/include/rtl8703b_rf.h -new file mode 100644 -index 000000000000..4148276bf4cb ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8703b_rf.h -@@ -0,0 +1,25 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8703B_RF_H__ -+#define __RTL8703B_RF_H__ -+ -+int PHY_RF6052_Config8703B(PADAPTER Adapter); -+ -+void -+PHY_RF6052SetBandwidth8703B( -+ PADAPTER Adapter, -+ enum channel_width Bandwidth); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8703b_spec.h b/drivers/staging/rtl8723cs/include/rtl8703b_spec.h -new file mode 100644 -index 000000000000..633b23b1bf10 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8703b_spec.h -@@ -0,0 +1,464 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8703B_SPEC_H__ -+#define __RTL8703B_SPEC_H__ -+ -+#include -+ -+ -+#define HAL_NAV_UPPER_UNIT_8703B 128 /* micro-second */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0000h ~ 0x00FFh System Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_SYS_ISO_CTRL_8703B 0x0000 /* 2 Byte */ -+#define REG_SYS_FUNC_EN_8703B 0x0002 /* 2 Byte */ -+#define REG_APS_FSMCO_8703B 0x0004 /* 4 Byte */ -+#define REG_SYS_CLKR_8703B 0x0008 /* 2 Byte */ -+#define REG_9346CR_8703B 0x000A /* 2 Byte */ -+#define REG_EE_VPD_8703B 0x000C /* 2 Byte */ -+#define REG_AFE_MISC_8703B 0x0010 /* 1 Byte */ -+#define REG_SPS0_CTRL_8703B 0x0011 /* 7 Byte */ -+#define REG_SPS_OCP_CFG_8703B 0x0018 /* 4 Byte */ -+#define REG_RSV_CTRL_8703B 0x001C /* 3 Byte */ -+#define REG_RF_CTRL_8703B 0x001F /* 1 Byte */ -+#define REG_LPLDO_CTRL_8703B 0x0023 /* 1 Byte */ -+#define REG_AFE_XTAL_CTRL_8703B 0x0024 /* 4 Byte */ -+#define REG_AFE_PLL_CTRL_8703B 0x0028 /* 4 Byte */ -+#define REG_MAC_PLL_CTRL_EXT_8703B 0x002c /* 4 Byte */ -+#define REG_EFUSE_CTRL_8703B 0x0030 -+#define REG_EFUSE_TEST_8703B 0x0034 -+#define REG_PWR_DATA_8703B 0x0038 -+#define REG_CAL_TIMER_8703B 0x003C -+#define REG_ACLK_MON_8703B 0x003E -+#define REG_GPIO_MUXCFG_8703B 0x0040 -+#define REG_GPIO_IO_SEL_8703B 0x0042 -+#define REG_MAC_PINMUX_CFG_8703B 0x0043 -+#define REG_GPIO_PIN_CTRL_8703B 0x0044 -+#define REG_GPIO_INTM_8703B 0x0048 -+#define REG_LEDCFG0_8703B 0x004C -+#define REG_LEDCFG1_8703B 0x004D -+#define REG_LEDCFG2_8703B 0x004E -+#define REG_LEDCFG3_8703B 0x004F -+#define REG_FSIMR_8703B 0x0050 -+#define REG_FSISR_8703B 0x0054 -+#define REG_HSIMR_8703B 0x0058 -+#define REG_HSISR_8703B 0x005c -+#define REG_GPIO_EXT_CTRL 0x0060 -+#define REG_PAD_CTRL1_8703B 0x0064 -+#define REG_MULTI_FUNC_CTRL_8703B 0x0068 -+#define REG_GPIO_STATUS_8703B 0x006C -+#define REG_SDIO_CTRL_8703B 0x0070 -+#define REG_OPT_CTRL_8703B 0x0074 -+#define REG_AFE_CTRL_4_8703B 0x0078 -+#define REG_MCUFWDL_8703B 0x0080 -+#define REG_HMEBOX_DBG_0_8703B 0x0088 -+#define REG_HMEBOX_DBG_1_8703B 0x008A -+#define REG_HMEBOX_DBG_2_8703B 0x008C -+#define REG_HMEBOX_DBG_3_8703B 0x008E -+#define REG_HIMR0_8703B 0x00B0 -+#define REG_HISR0_8703B 0x00B4 -+#define REG_HIMR1_8703B 0x00B8 -+#define REG_HISR1_8703B 0x00BC -+#define REG_PMC_DBG_CTRL2_8703B 0x00CC -+#define REG_EFUSE_BURN_GNT_8703B 0x00CF -+#define REG_HPON_FSM_8703B 0x00EC -+#define REG_SYS_CFG_8703B 0x00F0 -+#define REG_SYS_CFG1_8703B 0x00FC -+#define REG_ROM_VERSION 0x00FD -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_C2HEVT_CMD_ID_8703B 0x01A0 -+#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -+#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -+#define REG_C2HEVT_CMD_LEN_8703B 0x01AE -+#define REG_C2HEVT_CMD_LEN_88XX REG_C2HEVT_CMD_LEN_8703B -+#define REG_C2HEVT_CLEAR_8703B 0x01AF -+#define REG_MCUTST_1_8703B 0x01C0 -+#define REG_WOWLAN_WAKE_REASON 0x01C7 -+#define REG_FMETHR_8703B 0x01C8 -+#define REG_HMETFR_8703B 0x01CC -+#define REG_HMEBOX_0_8703B 0x01D0 -+#define REG_HMEBOX_1_8703B 0x01D4 -+#define REG_HMEBOX_2_8703B 0x01D8 -+#define REG_HMEBOX_3_8703B 0x01DC -+#define REG_LLT_INIT_8703B 0x01E0 -+#define REG_HMEBOX_EXT0_8703B 0x01F0 -+#define REG_HMEBOX_EXT1_8703B 0x01F4 -+#define REG_HMEBOX_EXT2_8703B 0x01F8 -+#define REG_HMEBOX_EXT3_8703B 0x01FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RQPN_8703B 0x0200 -+#define REG_FIFOPAGE_8703B 0x0204 -+#define REG_DWBCN0_CTRL_8703B REG_TDECTRL -+#define REG_TXDMA_OFFSET_CHK_8703B 0x020C -+#define REG_TXDMA_STATUS_8703B 0x0210 -+#define REG_RQPN_NPQ_8703B 0x0214 -+#define REG_DWBCN1_CTRL_8703B 0x0228 -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RXDMA_AGG_PG_TH_8703B 0x0280 -+#define REG_FW_UPD_RDPTR_8703B 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ -+#define REG_RXDMA_CONTROL_8703B 0x0286 /* Control the RX DMA. */ -+#define REG_RXPKT_NUM_8703B 0x0287 /* The number of packets in RXPKTBUF. */ -+#define REG_RXDMA_STATUS_8703B 0x0288 -+#define REG_RXDMA_MODE_CTRL_8703B 0x0290 -+#define REG_EARLY_MODE_CONTROL_8703B 0x02BC -+#define REG_RSVD5_8703B 0x02F0 -+#define REG_RSVD6_8703B 0x02F4 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0300h ~ 0x03FFh PCIe -+ * -+ * ----------------------------------------------------- */ -+#define REG_PCIE_CTRL_REG_8703B 0x0300 -+#define REG_INT_MIG_8703B 0x0304 /* Interrupt Migration */ -+#define REG_BCNQ_DESA_8703B 0x0308 /* TX Beacon Descriptor Address */ -+#define REG_HQ_DESA_8703B 0x0310 /* TX High Queue Descriptor Address */ -+#define REG_MGQ_DESA_8703B 0x0318 /* TX Manage Queue Descriptor Address */ -+#define REG_VOQ_DESA_8703B 0x0320 /* TX VO Queue Descriptor Address */ -+#define REG_VIQ_DESA_8703B 0x0328 /* TX VI Queue Descriptor Address */ -+#define REG_BEQ_DESA_8703B 0x0330 /* TX BE Queue Descriptor Address */ -+#define REG_BKQ_DESA_8703B 0x0338 /* TX BK Queue Descriptor Address */ -+#define REG_RX_DESA_8703B 0x0340 /* RX Queue Descriptor Address */ -+#define REG_DBI_WDATA_8703B 0x0348 /* DBI Write Data */ -+#define REG_DBI_RDATA_8703B 0x034C /* DBI Read Data */ -+#define REG_DBI_ADDR_8703B 0x0350 /* DBI Address */ -+#define REG_DBI_FLAG_8703B 0x0352 /* DBI Read/Write Flag */ -+#define REG_MDIO_WDATA_8703B 0x0354 /* MDIO for Write PCIE PHY */ -+#define REG_MDIO_RDATA_8703B 0x0356 /* MDIO for Reads PCIE PHY */ -+#define REG_MDIO_CTL_8703B 0x0358 /* MDIO for Control */ -+#define REG_DBG_SEL_8703B 0x0360 /* Debug Selection Register */ -+#define REG_PCIE_HRPWM_8703B 0x0361 /* PCIe RPWM */ -+#define REG_PCIE_HCPWM_8703B 0x0363 /* PCIe CPWM */ -+#define REG_PCIE_MULTIFET_CTRL_8703B 0x036A /* PCIE Multi-Fethc Control */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_VOQ_INFORMATION_8703B 0x0400 -+#define REG_VIQ_INFORMATION_8703B 0x0404 -+#define REG_BEQ_INFORMATION_8703B 0x0408 -+#define REG_BKQ_INFORMATION_8703B 0x040C -+#define REG_MGQ_INFORMATION_8703B 0x0410 -+#define REG_HGQ_INFORMATION_8703B 0x0414 -+#define REG_BCNQ_INFORMATION_8703B 0x0418 -+#define REG_TXPKT_EMPTY_8703B 0x041A -+ -+#define REG_FWHW_TXQ_CTRL_8703B 0x0420 -+#define REG_HWSEQ_CTRL_8703B 0x0423 -+#define REG_TXPKTBUF_BCNQ_BDNY_8703B 0x0424 -+#define REG_TXPKTBUF_MGQ_BDNY_8703B 0x0425 -+#define REG_LIFECTRL_CTRL_8703B 0x0426 -+#define REG_MULTI_BCNQ_OFFSET_8703B 0x0427 -+#define REG_SPEC_SIFS_8703B 0x0428 -+#define REG_RL_8703B 0x042A -+#define REG_TXBF_CTRL_8703B 0x042C -+#define REG_DARFRC_8703B 0x0430 -+#define REG_RARFRC_8703B 0x0438 -+#define REG_RRSR_8703B 0x0440 -+#define REG_ARFR0_8703B 0x0444 -+#define REG_ARFR1_8703B 0x044C -+#define REG_CCK_CHECK_8703B 0x0454 -+#define REG_AMPDU_MAX_TIME_8703B 0x0456 -+#define REG_TXPKTBUF_BCNQ_BDNY1_8703B 0x0457 -+ -+#define REG_AMPDU_MAX_LENGTH_8703B 0x0458 -+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8703B 0x045D -+#define REG_NDPA_OPT_CTRL_8703B 0x045F -+#define REG_FAST_EDCA_CTRL_8703B 0x0460 -+#define REG_RD_RESP_PKT_TH_8703B 0x0463 -+#define REG_DATA_SC_8703B 0x0483 -+#ifdef CONFIG_WOWLAN -+ #define REG_TXPKTBUF_IV_LOW 0x0484 -+ #define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_TXRPT_START_OFFSET 0x04AC -+#define REG_POWER_STAGE1_8703B 0x04B4 -+#define REG_POWER_STAGE2_8703B 0x04B8 -+#define REG_AMPDU_BURST_MODE_8703B 0x04BC -+#define REG_PKT_VO_VI_LIFE_TIME_8703B 0x04C0 -+#define REG_PKT_BE_BK_LIFE_TIME_8703B 0x04C2 -+#define REG_STBC_SETTING_8703B 0x04C4 -+#define REG_HT_SINGLE_AMPDU_8703B 0x04C7 -+#define REG_PROT_MODE_CTRL_8703B 0x04C8 -+#define REG_MAX_AGGR_NUM_8703B 0x04CA -+#define REG_RTS_MAX_AGGR_NUM_8703B 0x04CB -+#define REG_BAR_MODE_CTRL_8703B 0x04CC -+#define REG_RA_TRY_RATE_AGG_LMT_8703B 0x04CF -+#define REG_MACID_PKT_DROP0_8703B 0x04D0 -+#define REG_MACID_PKT_SLEEP_8703B 0x04D4 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_EDCA_VO_PARAM_8703B 0x0500 -+#define REG_EDCA_VI_PARAM_8703B 0x0504 -+#define REG_EDCA_BE_PARAM_8703B 0x0508 -+#define REG_EDCA_BK_PARAM_8703B 0x050C -+#define REG_BCNTCFG_8703B 0x0510 -+#define REG_PIFS_8703B 0x0512 -+#define REG_RDG_PIFS_8703B 0x0513 -+#define REG_SIFS_CTX_8703B 0x0514 -+#define REG_SIFS_TRX_8703B 0x0516 -+#define REG_AGGR_BREAK_TIME_8703B 0x051A -+#define REG_SLOT_8703B 0x051B -+#define REG_TX_PTCL_CTRL_8703B 0x0520 -+#define REG_TXPAUSE_8703B 0x0522 -+#define REG_DIS_TXREQ_CLR_8703B 0x0523 -+#define REG_RD_CTRL_8703B 0x0524 -+/* -+ * Format for offset 540h-542h: -+ * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. -+ * [7:4]: Reserved. -+ * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. -+ * [23:20]: Reserved -+ * Description: -+ * | -+ * |<--Setup--|--Hold------------>| -+ * --------------|---------------------- -+ * | -+ * TBTT -+ * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. -+ * Described by Designer Tim and Bruce, 2011-01-14. -+ * */ -+#define REG_TBTT_PROHIBIT_8703B 0x0540 -+#define REG_RD_NAV_NXT_8703B 0x0544 -+#define REG_NAV_PROT_LEN_8703B 0x0546 -+#define REG_BCN_CTRL_8703B 0x0550 -+#define REG_BCN_CTRL_1_8703B 0x0551 -+#define REG_MBID_NUM_8703B 0x0552 -+#define REG_DUAL_TSF_RST_8703B 0x0553 -+#define REG_BCN_INTERVAL_8703B 0x0554 -+#define REG_DRVERLYINT_8703B 0x0558 -+#define REG_BCNDMATIM_8703B 0x0559 -+#define REG_ATIMWND_8703B 0x055A -+#define REG_USTIME_TSF_8703B 0x055C -+#define REG_BCN_MAX_ERR_8703B 0x055D -+#define REG_RXTSF_OFFSET_CCK_8703B 0x055E -+#define REG_RXTSF_OFFSET_OFDM_8703B 0x055F -+#define REG_TSFTR_8703B 0x0560 -+#define REG_CTWND_8703B 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8703B 0x0577 -+#define REG_PSTIMER_8703B 0x0580 -+#define REG_TIMER0_8703B 0x0584 -+#define REG_TIMER1_8703B 0x0588 -+#define REG_ACMHWCTRL_8703B 0x05C0 -+#define REG_SCH_TXCMD_8703B 0x05F8 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_MAC_CR_8703B 0x0600 -+#define REG_TCR_8703B 0x0604 -+#define REG_RCR_8703B 0x0608 -+#define REG_RX_PKT_LIMIT_8703B 0x060C -+#define REG_RX_DLK_TIME_8703B 0x060D -+#define REG_RX_DRVINFO_SZ_8703B 0x060F -+ -+#define REG_MACID_8703B 0x0610 -+#define REG_BSSID_8703B 0x0618 -+#define REG_MAR_8703B 0x0620 -+#define REG_MBIDCAMCFG_8703B 0x0628 -+#define REG_WOWLAN_GTK_DBG1 0x630 -+#define REG_WOWLAN_GTK_DBG2 0x634 -+ -+#define REG_USTIME_EDCA_8703B 0x0638 -+#define REG_MAC_SPEC_SIFS_8703B 0x063A -+#define REG_RESP_SIFP_CCK_8703B 0x063C -+#define REG_RESP_SIFS_OFDM_8703B 0x063E -+#define REG_ACKTO_8703B 0x0640 -+#define REG_CTS2TO_8703B 0x0641 -+#define REG_EIFS_8703B 0x0642 -+ -+#define REG_NAV_UPPER_8703B 0x0652 /* unit of 128 */ -+#define REG_TRXPTCL_CTL_8703B 0x0668 -+ -+/* Security */ -+#define REG_CAMCMD_8703B 0x0670 -+#define REG_CAMWRITE_8703B 0x0674 -+#define REG_CAMREAD_8703B 0x0678 -+#define REG_CAMDBG_8703B 0x067C -+#define REG_SECCFG_8703B 0x0680 -+ -+/* Power */ -+#define REG_WOW_CTRL_8703B 0x0690 -+#define REG_PS_RX_INFO_8703B 0x0692 -+#define REG_UAPSD_TID_8703B 0x0693 -+#define REG_WKFMCAM_CMD_8703B 0x0698 -+#define REG_WKFMCAM_NUM_8703B 0x0698 -+#define REG_WKFMCAM_RWD_8703B 0x069C -+#define REG_RXFLTMAP0_8703B 0x06A0 -+#define REG_RXFLTMAP1_8703B 0x06A2 -+#define REG_RXFLTMAP2_8703B 0x06A4 -+#define REG_BCN_PSR_RPT_8703B 0x06A8 -+#define REG_BT_COEX_TABLE_8703B 0x06C0 -+#define REG_BFMER0_INFO_8703B 0x06E4 -+#define REG_BFMER1_INFO_8703B 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8703B 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8703B 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8703B 0x06FC -+ -+/* Hardware Port 2 */ -+#define REG_MACID1_8703B 0x0700 -+#define REG_BSSID1_8703B 0x0708 -+#define REG_BFMEE_SEL_8703B 0x0714 -+#define REG_SND_PTCL_CTRL_8703B 0x0718 -+ -+/* LTE_COEX */ -+#define REG_LTECOEX_CTRL 0x07C0 -+#define REG_LTECOEX_WRITE_DATA 0x07C4 -+#define REG_LTECOEX_READ_DATA 0x07C8 -+#define REG_LTECOEX_PATH_CONTROL 0x70 -+ -+/* ************************************************************ -+ * SDIO Bus Specification -+ * ************************************************************ */ -+ -+/* ----------------------------------------------------- -+ * SDIO CMD Address Mapping -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * I/O bus domain (Host) -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * SDIO register -+ * ----------------------------------------------------- */ -+#define SDIO_REG_HCPWM1_8703B 0x025 /* HCI Current Power Mode 1 */ -+ -+ -+/* **************************************************************************** -+ * 8703 Regsiter Bit and Content definition -+ * **************************************************************************** */ -+ -+#define BIT_USB_RXDMA_AGG_EN BIT(31) -+#define RXDMA_AGG_MODE_EN BIT(1) -+ -+#ifdef CONFIG_WOWLAN -+ #define RXPKT_RELEASE_POLL BIT(16) -+ #define RXDMA_IDLE BIT(17) -+ #define RW_RELEASE_EN BIT(18) -+#endif -+ -+/* 2 HSISR -+ * interrupt mask which needs to clear */ -+#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ -+ HSISR_SPS_OCP_INT |\ -+ HSISR_RON_INT |\ -+ HSISR_PDNINT |\ -+ HSISR_GPIO9_INT) -+ -+ -+/* ---------------------------------------------------------------------------- -+ * 8703B REG_CCK_CHECK (offset 0x454) -+ * ---------------------------------------------------------------------------- */ -+#define BIT_BCN_PORT_SEL BIT(5) -+ -+#ifdef CONFIG_RF_POWER_TRIM -+ -+ #ifdef CONFIG_RTL8703B -+ #define EEPROM_RF_GAIN_OFFSET 0xC1 -+ #endif -+ -+ #define EEPROM_RF_GAIN_VAL 0x1F6 -+#endif /*CONFIG_RF_POWER_TRIM*/ -+ -+ -+/* ---------------------------------------------------------------------------- -+ * 8195 IMR/ISR bits (offset 0xB0, 8bits) -+ * ---------------------------------------------------------------------------- */ -+#define IMR_DISABLED_8703B 0 -+/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -+#define IMR_TIMER2_8703B BIT(31) /* Timeout interrupt 2 */ -+#define IMR_TIMER1_8703B BIT(30) /* Timeout interrupt 1 */ -+#define IMR_PSTIMEOUT_8703B BIT(29) /* Power Save Time Out Interrupt */ -+#define IMR_GTINT4_8703B BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -+#define IMR_GTINT3_8703B BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -+#define IMR_TXBCN0ERR_8703B BIT(26) /* Transmit Beacon0 Error */ -+#define IMR_TXBCN0OK_8703B BIT(25) /* Transmit Beacon0 OK */ -+#define IMR_TSF_BIT32_TOGGLE_8703B BIT(24) /* TSF Timer BIT32 toggle indication interrupt */ -+#define IMR_BCNDMAINT0_8703B BIT(20) /* Beacon DMA Interrupt 0 */ -+#define IMR_BCNDERR0_8703B BIT(16) /* Beacon Queue DMA OK0 */ -+#define IMR_HSISR_IND_ON_INT_8703B BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -+#define IMR_BCNDMAINT_E_8703B BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -+#define IMR_ATIMEND_8703B BIT(12) /* CTWidnow End or ATIM Window End */ -+#define IMR_C2HCMD_8703B BIT(10) /* CPU to Host Command INT Status, Write 1 clear */ -+#define IMR_CPWM2_8703B BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_CPWM_8703B BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_HIGHDOK_8703B BIT(7) /* High Queue DMA OK */ -+#define IMR_MGNTDOK_8703B BIT(6) /* Management Queue DMA OK */ -+#define IMR_BKDOK_8703B BIT(5) /* AC_BK DMA OK */ -+#define IMR_BEDOK_8703B BIT(4) /* AC_BE DMA OK */ -+#define IMR_VIDOK_8703B BIT(3) /* AC_VI DMA OK */ -+#define IMR_VODOK_8703B BIT(2) /* AC_VO DMA OK */ -+#define IMR_RDU_8703B BIT(1) /* Rx Descriptor Unavailable */ -+#define IMR_ROK_8703B BIT(0) /* Receive DMA OK */ -+ -+/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -+#define IMR_BCNDMAINT7_8703B BIT(27) /* Beacon DMA Interrupt 7 */ -+#define IMR_BCNDMAINT6_8703B BIT(26) /* Beacon DMA Interrupt 6 */ -+#define IMR_BCNDMAINT5_8703B BIT(25) /* Beacon DMA Interrupt 5 */ -+#define IMR_BCNDMAINT4_8703B BIT(24) /* Beacon DMA Interrupt 4 */ -+#define IMR_BCNDMAINT3_8703B BIT(23) /* Beacon DMA Interrupt 3 */ -+#define IMR_BCNDMAINT2_8703B BIT(22) /* Beacon DMA Interrupt 2 */ -+#define IMR_BCNDMAINT1_8703B BIT(21) /* Beacon DMA Interrupt 1 */ -+#define IMR_BCNDOK7_8703B BIT(20) /* Beacon Queue DMA OK Interrupt 7 */ -+#define IMR_BCNDOK6_8703B BIT(19) /* Beacon Queue DMA OK Interrupt 6 */ -+#define IMR_BCNDOK5_8703B BIT(18) /* Beacon Queue DMA OK Interrupt 5 */ -+#define IMR_BCNDOK4_8703B BIT(17) /* Beacon Queue DMA OK Interrupt 4 */ -+#define IMR_BCNDOK3_8703B BIT(16) /* Beacon Queue DMA OK Interrupt 3 */ -+#define IMR_BCNDOK2_8703B BIT(15) /* Beacon Queue DMA OK Interrupt 2 */ -+#define IMR_BCNDOK1_8703B BIT(14) /* Beacon Queue DMA OK Interrupt 1 */ -+#define IMR_ATIMEND_E_8703B BIT(13) /* ATIM Window End Extension for Win7 */ -+#define IMR_TXERR_8703B BIT(11) /* Tx Error Flag Interrupt Status, write 1 clear. */ -+#define IMR_RXERR_8703B BIT(10) /* Rx Error Flag INT Status, Write 1 clear */ -+#define IMR_TXFOVW_8703B BIT(9) /* Transmit FIFO Overflow */ -+#define IMR_RXFOVW_8703B BIT(8) /* Receive FIFO Overflow */ -+ -+#ifdef CONFIG_PCI_HCI -+ /* #define IMR_RX_MASK (IMR_ROK_8703B|IMR_RDU_8703B|IMR_RXFOVW_8703B) */ -+ #define IMR_TX_MASK (IMR_VODOK_8703B | IMR_VIDOK_8703B | IMR_BEDOK_8703B | IMR_BKDOK_8703B | IMR_MGNTDOK_8703B | IMR_HIGHDOK_8703B) -+ -+ #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8703B | IMR_TXBCN0OK_8703B | IMR_TXBCN0ERR_8703B | IMR_BCNDERR0_8703B) -+ -+ #define RT_AC_INT_MASKS (IMR_VIDOK_8703B | IMR_VODOK_8703B | IMR_BEDOK_8703B | IMR_BKDOK_8703B) -+#endif -+ -+#endif /* __RTL8703B_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8703b_sreset.h b/drivers/staging/rtl8723cs/include/rtl8703b_sreset.h -new file mode 100644 -index 000000000000..5fe53cf414a1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8703b_sreset.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8703B_SRESET_H_ -+#define _RTL8703B_SRESET_H_ -+ -+#include -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ extern void rtl8703b_sreset_xmit_status_check(_adapter *padapter); -+ extern void rtl8703b_sreset_linked_status_check(_adapter *padapter); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8703b_xmit.h b/drivers/staging/rtl8723cs/include/rtl8703b_xmit.h -new file mode 100644 -index 000000000000..9ec00a66a564 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8703b_xmit.h -@@ -0,0 +1,342 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8703B_XMIT_H__ -+#define __RTL8703B_XMIT_H__ -+ -+ -+#define MAX_TID (15) -+ -+ -+#ifndef __INC_HAL8703BDESC_H -+ #define __INC_HAL8703BDESC_H -+ -+ #define RX_STATUS_DESC_SIZE_8703B 24 -+ #define RX_DRV_INFO_SIZE_UNIT_8703B 8 -+ -+ -+ /* DWORD 0 */ -+ #define SET_RX_STATUS_DESC_PKT_LEN_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+ #define SET_RX_STATUS_DESC_EOR_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -+ #define SET_RX_STATUS_DESC_OWN_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) -+ -+ #define GET_RX_STATUS_DESC_PKT_LEN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -+ #define GET_RX_STATUS_DESC_CRC32_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+ #define GET_RX_STATUS_DESC_ICV_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+ #define GET_RX_STATUS_DESC_DRVINFO_SIZE_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -+ #define GET_RX_STATUS_DESC_SECURITY_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -+ #define GET_RX_STATUS_DESC_QOS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -+ #define GET_RX_STATUS_DESC_SHIFT_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -+ #define GET_RX_STATUS_DESC_PHY_STATUS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -+ #define GET_RX_STATUS_DESC_SWDEC_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -+ #define GET_RX_STATUS_DESC_LAST_SEG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1) -+ #define GET_RX_STATUS_DESC_FIRST_SEG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1) -+ #define GET_RX_STATUS_DESC_EOR_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -+ #define GET_RX_STATUS_DESC_OWN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+ -+ /* DWORD 1 */ -+ #define GET_RX_STATUS_DESC_MACID_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+ #define GET_RX_STATUS_DESC_TID_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+ #define GET_RX_STATUS_DESC_AMSDU_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+ #define GET_RX_STATUS_DESC_RXID_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -+ #define GET_RX_STATUS_DESC_PAGGR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -+ #define GET_RX_STATUS_DESC_A1_FIT_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -+ #define GET_RX_STATUS_DESC_CHKERR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -+ #define GET_RX_STATUS_DESC_IPVER_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -+ #define GET_RX_STATUS_DESC_IS_TCPUDP__8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -+ #define GET_RX_STATUS_DESC_CHK_VLD_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -+ #define GET_RX_STATUS_DESC_PAM_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -+ #define GET_RX_STATUS_DESC_PWR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -+ #define GET_RX_STATUS_DESC_MORE_DATA_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -+ #define GET_RX_STATUS_DESC_MORE_FRAG_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -+ #define GET_RX_STATUS_DESC_TYPE_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -+ #define GET_RX_STATUS_DESC_MC_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -+ #define GET_RX_STATUS_DESC_BC_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) -+ -+ /* DWORD 2 */ -+ #define GET_RX_STATUS_DESC_SEQ_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -+ #define GET_RX_STATUS_DESC_FRAG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -+ #define GET_RX_STATUS_DESC_RX_IS_QOS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -+ #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -+ #define GET_RX_STATUS_DESC_RPT_SEL_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -+ -+ /* DWORD 3 */ -+ #define GET_RX_STATUS_DESC_RX_RATE_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -+ #define GET_RX_STATUS_DESC_HTC_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -+ #define GET_RX_STATUS_DESC_EOSP_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -+ #define GET_RX_STATUS_DESC_BSSID_FIT_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -+ #ifdef CONFIG_USB_RX_AGGREGATION -+ #define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -+ #endif -+ #define GET_RX_STATUS_DESC_PATTERN_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -+ #define GET_RX_STATUS_DESC_UNICAST_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -+ #define GET_RX_STATUS_DESC_MAGIC_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) -+ -+ /* DWORD 6 */ -+ #define GET_RX_STATUS_DESC_SPLCP_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1) -+ #define GET_RX_STATUS_DESC_LDPC_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1) -+ #define GET_RX_STATUS_DESC_STBC_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1) -+ #define GET_RX_STATUS_DESC_BW_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2) -+ -+ /* DWORD 5 */ -+ #define GET_RX_STATUS_DESC_TSFL_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) -+ -+ #define GET_RX_STATUS_DESC_BUFF_ADDR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+ #define GET_RX_STATUS_DESC_BUFF_ADDR64_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+ #define SET_RX_STATUS_DESC_BUFF_ADDR_8703B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) -+ -+ -+ /* Dword 0 */ -+ #define GET_TX_DESC_OWN_8703B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+ #define SET_TX_DESC_PKT_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+ #define SET_TX_DESC_OFFSET_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+ #define SET_TX_DESC_BMC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+ #define SET_TX_DESC_HTC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+ #define SET_TX_DESC_LAST_SEG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+ #define SET_TX_DESC_FIRST_SEG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+ #define SET_TX_DESC_LINIP_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+ #define SET_TX_DESC_NO_ACM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+ #define SET_TX_DESC_GF_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+ #define SET_TX_DESC_OWN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+ /* Dword 1 */ -+ #define SET_TX_DESC_MACID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+ #define SET_TX_DESC_QUEUE_SEL_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+ #define SET_TX_DESC_RDG_NAV_EXT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+ #define SET_TX_DESC_LSIG_TXOP_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+ #define SET_TX_DESC_PIFS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+ #define SET_TX_DESC_RATE_ID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+ #define SET_TX_DESC_EN_DESC_ID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+ #define SET_TX_DESC_SEC_TYPE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+ #define SET_TX_DESC_PKT_OFFSET_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+ -+ -+ /* Dword 2 */ -+ #define SET_TX_DESC_PAID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+ #define SET_TX_DESC_CCA_RTS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+ #define SET_TX_DESC_AGG_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+ #define SET_TX_DESC_RDG_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+ #define SET_TX_DESC_AGG_BREAK_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+ #define SET_TX_DESC_MORE_FRAG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+ #define SET_TX_DESC_RAW_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+ #define SET_TX_DESC_SPE_RPT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+ #define SET_TX_DESC_AMPDU_DENSITY_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+ #define SET_TX_DESC_BT_INT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+ #define SET_TX_DESC_GID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+ -+ -+ /* Dword 3 */ -+ #define SET_TX_DESC_WHEADER_LEN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -+ #define SET_TX_DESC_CHK_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -+ #define SET_TX_DESC_EARLY_MODE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+ #define SET_TX_DESC_HWSEQ_SEL_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+ #define SET_TX_DESC_USE_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+ #define SET_TX_DESC_DISABLE_RTS_FB_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+ #define SET_TX_DESC_DISABLE_FB_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+ #define SET_TX_DESC_CTS2SELF_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+ #define SET_TX_DESC_RTS_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+ #define SET_TX_DESC_HW_RTS_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+ #define SET_TX_DESC_NAV_USE_HDR_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+ #define SET_TX_DESC_USE_MAX_LEN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+ #define SET_TX_DESC_MAX_AGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+ #define SET_TX_DESC_NDPA_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+ #define SET_TX_DESC_AMPDU_MAX_TIME_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+ /* Dword 4 */ -+ #define SET_TX_DESC_TX_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+ #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+ #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+ #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+ #define SET_TX_DESC_DATA_RETRY_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+ #define SET_TX_DESC_RTS_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+ -+ -+ /* Dword 5 */ -+ #define SET_TX_DESC_DATA_SC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+ #define SET_TX_DESC_DATA_SHORT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+ #define SET_TX_DESC_DATA_BW_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+ #define SET_TX_DESC_DATA_LDPC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+ #define SET_TX_DESC_DATA_STBC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+ #define SET_TX_DESC_CTROL_STBC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+ #define SET_TX_DESC_RTS_SHORT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+ #define SET_TX_DESC_RTS_SC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+ -+ -+ /* Dword 6 */ -+ #define SET_TX_DESC_SW_DEFINE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+ #define SET_TX_DESC_MBSSID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+ #define SET_TX_DESC_ANTSEL_A_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+ #define SET_TX_DESC_ANTSEL_B_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+ #define SET_TX_DESC_ANTSEL_C_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -+ #define SET_TX_DESC_ANTSEL_D_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) -+ -+ /* Dword 7 */ -+ #ifdef CONFIG_PCI_HCI -+ #define SET_TX_DESC_TX_BUFFER_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+ #endif /*CONFIG_PCI_HCI*/ -+ #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) -+ #define SET_TX_DESC_TX_DESC_CHECKSUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+ #endif -+ #define SET_TX_DESC_USB_TXAGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+ #ifdef CONFIG_SDIO_HCI -+ #define SET_TX_DESC_SDIO_TXSEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) -+ #endif -+ -+ /* Dword 8 */ -+ #define SET_TX_DESC_HWSEQ_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+ -+ /* Dword 9 */ -+ #define SET_TX_DESC_SEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+ -+ /* Dword 10 */ -+ #define SET_TX_DESC_TX_BUFFER_ADDRESS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) -+ #define GET_TX_DESC_TX_BUFFER_ADDRESS_8703B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) -+ -+ /* Dword 11 */ -+ #define SET_TX_DESC_NEXT_DESC_ADDRESS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) -+ -+ -+ #define SET_EARLYMODE_PKTNUM_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+ #define SET_EARLYMODE_LEN0_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+ #define SET_EARLYMODE_LEN1_1_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+ #define SET_EARLYMODE_LEN1_2_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+ #define SET_EARLYMODE_LEN2_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+ #define SET_EARLYMODE_LEN3_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+#endif -+/* ----------------------------------------------------------- -+ * -+ * Rate -+ * -+ * ----------------------------------------------------------- -+ * CCK Rates, TxHT = 0 */ -+#define DESC8703B_RATE1M 0x00 -+#define DESC8703B_RATE2M 0x01 -+#define DESC8703B_RATE5_5M 0x02 -+#define DESC8703B_RATE11M 0x03 -+ -+/* OFDM Rates, TxHT = 0 */ -+#define DESC8703B_RATE6M 0x04 -+#define DESC8703B_RATE9M 0x05 -+#define DESC8703B_RATE12M 0x06 -+#define DESC8703B_RATE18M 0x07 -+#define DESC8703B_RATE24M 0x08 -+#define DESC8703B_RATE36M 0x09 -+#define DESC8703B_RATE48M 0x0a -+#define DESC8703B_RATE54M 0x0b -+ -+/* MCS Rates, TxHT = 1 */ -+#define DESC8703B_RATEMCS0 0x0c -+#define DESC8703B_RATEMCS1 0x0d -+#define DESC8703B_RATEMCS2 0x0e -+#define DESC8703B_RATEMCS3 0x0f -+#define DESC8703B_RATEMCS4 0x10 -+#define DESC8703B_RATEMCS5 0x11 -+#define DESC8703B_RATEMCS6 0x12 -+#define DESC8703B_RATEMCS7 0x13 -+#define DESC8703B_RATEMCS8 0x14 -+#define DESC8703B_RATEMCS9 0x15 -+#define DESC8703B_RATEMCS10 0x16 -+#define DESC8703B_RATEMCS11 0x17 -+#define DESC8703B_RATEMCS12 0x18 -+#define DESC8703B_RATEMCS13 0x19 -+#define DESC8703B_RATEMCS14 0x1a -+#define DESC8703B_RATEMCS15 0x1b -+#define DESC8703B_RATEVHTSS1MCS0 0x2c -+#define DESC8703B_RATEVHTSS1MCS1 0x2d -+#define DESC8703B_RATEVHTSS1MCS2 0x2e -+#define DESC8703B_RATEVHTSS1MCS3 0x2f -+#define DESC8703B_RATEVHTSS1MCS4 0x30 -+#define DESC8703B_RATEVHTSS1MCS5 0x31 -+#define DESC8703B_RATEVHTSS1MCS6 0x32 -+#define DESC8703B_RATEVHTSS1MCS7 0x33 -+#define DESC8703B_RATEVHTSS1MCS8 0x34 -+#define DESC8703B_RATEVHTSS1MCS9 0x35 -+#define DESC8703B_RATEVHTSS2MCS0 0x36 -+#define DESC8703B_RATEVHTSS2MCS1 0x37 -+#define DESC8703B_RATEVHTSS2MCS2 0x38 -+#define DESC8703B_RATEVHTSS2MCS3 0x39 -+#define DESC8703B_RATEVHTSS2MCS4 0x3a -+#define DESC8703B_RATEVHTSS2MCS5 0x3b -+#define DESC8703B_RATEVHTSS2MCS6 0x3c -+#define DESC8703B_RATEVHTSS2MCS7 0x3d -+#define DESC8703B_RATEVHTSS2MCS8 0x3e -+#define DESC8703B_RATEVHTSS2MCS9 0x3f -+ -+ -+#define RX_HAL_IS_CCK_RATE_8703B(pDesc)\ -+ (GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE1M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE2M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE5_5M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE11M) -+ -+ -+void rtl8703b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -+void rtl8703b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8703bs_init_xmit_priv(PADAPTER padapter); -+ void rtl8703bs_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8703bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8703bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8703bs_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8703bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8703bs_xmit_buf_handler(PADAPTER padapter); -+ thread_return rtl8703bs_xmit_thread(thread_context context); -+ #define hal_xmit_handler rtl8703bs_xmit_buf_handler -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ s32 rtl8703bu_xmit_buf_handler(PADAPTER padapter); -+ #define hal_xmit_handler rtl8703bu_xmit_buf_handler -+ -+ -+ s32 rtl8703bu_init_xmit_priv(PADAPTER padapter); -+ void rtl8703bu_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8703bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8703bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8703bu_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8703bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ /* s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); */ -+ void rtl8703bu_xmit_tasklet(void *priv); -+ s32 rtl8703bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+ void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8703be_init_xmit_priv(PADAPTER padapter); -+ void rtl8703be_free_xmit_priv(PADAPTER padapter); -+ struct xmit_buf *rtl8703be_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+ void rtl8703be_xmitframe_resume(_adapter *padapter); -+ s32 rtl8703be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8703be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8703be_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8703be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ void rtl8703be_xmit_tasklet(void *priv); -+#endif -+ -+u8 BWMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib); -+u8 SCMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8710b_cmd.h b/drivers/staging/rtl8723cs/include/rtl8710b_cmd.h -new file mode 100644 -index 000000000000..0237d18ea82e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8710b_cmd.h -@@ -0,0 +1,169 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8710B_CMD_H__ -+#define __RTL8710B_CMD_H__ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+enum h2c_cmd_8710B { -+ /* Common Class: 000 */ -+ H2C_8710B_RSVD_PAGE = 0x00, -+ H2C_8710B_MEDIA_STATUS_RPT = 0x01, -+ H2C_8710B_SCAN_ENABLE = 0x02, -+ H2C_8710B_KEEP_ALIVE = 0x03, -+ H2C_8710B_DISCON_DECISION = 0x04, -+ H2C_8710B_PSD_OFFLOAD = 0x05, -+ H2C_8710B_AP_OFFLOAD = 0x08, -+ H2C_8710B_BCN_RSVDPAGE = 0x09, -+ H2C_8710B_PROBERSP_RSVDPAGE = 0x0A, -+ H2C_8710B_FCS_RSVDPAGE = 0x10, -+ H2C_8710B_FCS_INFO = 0x11, -+ H2C_8710B_AP_WOW_GPIO_CTRL = 0x13, -+ -+ /* PoweSave Class: 001 */ -+ H2C_8710B_SET_PWR_MODE = 0x20, -+ H2C_8710B_PS_TUNING_PARA = 0x21, -+ H2C_8710B_PS_TUNING_PARA2 = 0x22, -+ H2C_8710B_P2P_LPS_PARAM = 0x23, -+ H2C_8710B_P2P_PS_OFFLOAD = 0x24, -+ H2C_8710B_PS_SCAN_ENABLE = 0x25, -+ H2C_8710B_SAP_PS_ = 0x26, -+ H2C_8710B_INACTIVE_PS_ = 0x27, /* Inactive_PS */ -+ H2C_8710B_FWLPS_IN_IPS_ = 0x28, -+ -+ /* Dynamic Mechanism Class: 010 */ -+ H2C_8710B_MACID_CFG = 0x40, -+ H2C_8710B_TXBF = 0x41, -+ H2C_8710B_RSSI_SETTING = 0x42, -+ H2C_8710B_AP_REQ_TXRPT = 0x43, -+ H2C_8710B_INIT_RATE_COLLECT = 0x44, -+ H2C_8710B_RA_PARA_ADJUST = 0x46, -+ -+ /* WOWLAN Class: 100 */ -+ H2C_8710B_WOWLAN = 0x80, -+ H2C_8710B_REMOTE_WAKE_CTRL = 0x81, -+ H2C_8710B_AOAC_GLOBAL_INFO = 0x82, -+ H2C_8710B_AOAC_RSVD_PAGE = 0x83, -+ H2C_8710B_AOAC_RSVD_PAGE2 = 0x84, -+ H2C_8710B_D0_SCAN_OFFLOAD_CTRL = 0x85, -+ H2C_8710B_D0_SCAN_OFFLOAD_INFO = 0x86, -+ H2C_8710B_CHNL_SWITCH_OFFLOAD = 0x87, -+ H2C_8710B_P2P_OFFLOAD_RSVD_PAGE = 0x8A, -+ H2C_8710B_P2P_OFFLOAD = 0x8B, -+ -+ H2C_8710B_RESET_TSF = 0xC0, -+ H2C_8710B_MAXID, -+}; -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- -+ * _RSVDPAGE_LOC_CMD_0x00 */ -+#define SET_8710B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8710B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8710B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8710B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8710B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+/* _PWR_MOD_CMD_0x20 */ -+#define SET_8710B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8710B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_8710B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_8710B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8710B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8710B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -+#define SET_8710B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+#define GET_8710B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) -+ -+/* _PS_TUNE_PARAM_CMD_0x21 */ -+#define SET_8710B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8710B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8710B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -+#define SET_8710B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -+#define SET_8710B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _MACID_CFG_CMD_0x40 */ -+#define SET_8710B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -+#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) -+ -+/* _RSSI_SETTING_CMD_0x42 */ -+#define SET_8710B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8710B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -+#define SET_8710B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _AP_REQ_TXRPT_CMD_0x43 */ -+#define SET_8710B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8710B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+ -+/* _FORCE_BT_TXPWR_CMD_0x62 */ -+#define SET_8710B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+ -+/* _FORCE_BT_MP_OPER_CMD_0x67 */ -+#define SET_8710B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_8710B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -+#define SET_8710B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8710B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+#define SET_8710B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8710B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+ -+/* _BT_FW_PATCH_0x6A */ -+#define SET_8710B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) -+#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ------------------------------------------- Structure -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- Function Statement -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+/* host message to firmware cmd */ -+void rtl8710b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -+void rtl8710b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -+/* s32 rtl8710b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -+void rtl8710b_set_FwPsTuneParam_cmd(PADAPTER padapter); -+void rtl8710b_download_rsvd_page(PADAPTER padapter, u8 mstatus); -+#ifdef CONFIG_BT_COEXIST -+ void rtl8710b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -+#endif /* CONFIG_BT_COEXIST */ -+#ifdef CONFIG_P2P -+ void rtl8710b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_P2P_WOWLAN -+ void rtl8710b_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -+#endif -+ -+s32 FillH2CCmd8710B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+u8 GetTxBufferRsvdPageNum8710B(_adapter *padapter, bool wowlan); -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8710b_dm.h b/drivers/staging/rtl8723cs/include/rtl8710b_dm.h -new file mode 100644 -index 000000000000..9a131ba05df3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8710b_dm.h -@@ -0,0 +1,39 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8710B_DM_H__ -+#define __RTL8710B_DM_H__ -+/* ************************************************************ -+ * Description: -+ * -+ * This file is for 8710B dynamic mechanism only -+ * -+ * -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * structure and define -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * function prototype -+ * ************************************************************ */ -+ -+void rtl8710b_init_dm_priv(PADAPTER padapter); -+void rtl8710b_deinit_dm_priv(PADAPTER padapter); -+ -+void rtl8710b_InitHalDm(PADAPTER padapter); -+void rtl8710b_HalDmWatchDog(PADAPTER padapter); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8710b_hal.h b/drivers/staging/rtl8723cs/include/rtl8710b_hal.h -new file mode 100644 -index 000000000000..332112b3196c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8710b_hal.h -@@ -0,0 +1,277 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8710B_HAL_H__ -+#define __RTL8710B_HAL_H__ -+ -+#include "hal_data.h" -+ -+#include "rtl8710b_spec.h" -+#include "rtl8710b_rf.h" -+#include "rtl8710b_dm.h" -+#include "rtl8710b_recv.h" -+#include "rtl8710b_xmit.h" -+#include "rtl8710b_cmd.h" -+#include "rtl8710b_led.h" -+#include "Hal8710BPwrSeq.h" -+#include "Hal8710BPhyReg.h" -+#include "Hal8710BPhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+ #include "rtl8710b_sreset.h" -+#endif -+#ifdef CONFIG_LPS_POFF -+ #include "rtl8710b_lps_poff.h" -+#endif -+ -+#define FW_8710B_SIZE 0x8000 -+#define FW_8710B_START_ADDRESS 0x1000 -+#define FW_8710B_END_ADDRESS 0x1FFF /* 0x5FFF */ -+ -+typedef struct _RT_FIRMWARE { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[FW_8710B_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8710B, *PRT_FIRMWARE_8710B; -+ -+/* -+ * This structure must be cared byte-ordering -+ * -+ * Added by tynli. 2009.12.04. */ -+typedef struct _RT_8710B_FIRMWARE_HDR { -+ /* 8-byte alinment required */ -+ -+ /* --- LONG WORD 0 ---- */ -+ u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ -+ u8 Category; /* AP/NIC and USB/PCI */ -+ u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -+ u16 Version; /* FW Version */ -+ u16 Subversion; /* FW Subversion, default 0x00 */ -+ -+ /* --- LONG WORD 1 ---- */ -+ u8 Month; /* Release time Month field */ -+ u8 Date; /* Release time Date field */ -+ u8 Hour; /* Release time Hour field */ -+ u8 Minute; /* Release time Minute field */ -+ u16 RamCodeSize; /* The size of RAM code */ -+ u16 Rsvd2; -+ -+ /* --- LONG WORD 2 ---- */ -+ u32 SvnIdx; /* The SVN entry index */ -+ u32 Rsvd3; -+ -+ /* --- LONG WORD 3 ---- */ -+ u32 Rsvd4; -+ u32 Rsvd5; -+} RT_8710B_FIRMWARE_HDR, *PRT_8710B_FIRMWARE_HDR; -+ -+#define DRIVER_EARLY_INT_TIME_8710B 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8710B 0x02 -+ -+/* for 8710B -+ * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ -+#define PAGE_SIZE_TX_8710B 128 -+#define PAGE_SIZE_RX_8710B 8 -+ -+#define TX_DMA_SIZE_8710B 0x8000 /* 32K(TX) */ -+#define RX_DMA_SIZE_8710B 0x4000 /* 16K(RX) */ -+ -+#ifdef CONFIG_WOWLAN -+ #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -+#else -+ #define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8710B 0x100 /* 256B, reserved for c2h debug message */ -+#else -+ #define RX_DMA_RESERVED_SIZE_8710B 0x80 /* 128B, reserved for tx report */ -+#endif -+#define RX_DMA_BOUNDARY_8710B\ -+ (RX_DMA_SIZE_8710B - RX_DMA_RESERVED_SIZE_8710B - 1) -+ -+ -+/* Note: We will divide number of page equally for each queue other than public queue! */ -+ -+/* For General Reserved Page Number(Beacon Queue is reserved page) -+ * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8710B -+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -+#define BCNQ_PAGE_NUM_8710B (MAX_BEACON_LEN/PAGE_SIZE_TX_8710B + 6) /*0x08*/ -+ -+ -+/* For WoWLan , more reserved page -+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 -+ * NS offload: 2 NDP info: 1 -+ */ -+#ifdef CONFIG_WOWLAN -+ #define WOWLAN_PAGE_NUM_8710B 0x0b -+#else -+ #define WOWLAN_PAGE_NUM_8710B 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+ #undef WOWLAN_PAGE_NUM_8710B -+ #define WOWLAN_PAGE_NUM_8710B 0x15 -+#endif -+ -+#ifdef CONFIG_AP_WOWLAN -+ #define AP_WOWLAN_PAGE_NUM_8710B 0x02 -+#endif -+ -+#define TX_TOTAL_PAGE_NUMBER_8710B\ -+ (0xFF - BCNQ_PAGE_NUM_8710B -WOWLAN_PAGE_NUM_8710B) -+#define TX_PAGE_BOUNDARY_8710B (TX_TOTAL_PAGE_NUMBER_8710B + 1) -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8710B TX_TOTAL_PAGE_NUMBER_8710B -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8710B\ -+ (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8710B + 1) -+ -+/* For Normal Chip Setting -+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8710B */ -+#define NORMAL_PAGE_NUM_HPQ_8710B 0x0C -+#define NORMAL_PAGE_NUM_LPQ_8710B 0x02 -+#define NORMAL_PAGE_NUM_NPQ_8710B 0x02 -+#define NORMAL_PAGE_NUM_EPQ_8710B 0x04 -+ -+/* Note: For Normal Chip Setting, modify later */ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8710B 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8710B 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8710B 0x20 -+#define WMM_NORMAL_PAGE_NUM_EPQ_8710B 0x00 -+ -+ -+#include "HalVerDef.h" -+#include "hal_com.h" -+ -+#define EFUSE_OOB_PROTECT_BYTES (96 + 1) -+ -+#define HAL_EFUSE_MEMORY -+#define HWSET_MAX_SIZE_8710B 512 -+#define EFUSE_REAL_CONTENT_LEN_8710B 512 -+#define EFUSE_MAP_LEN_8710B 512 -+#define EFUSE_MAX_SECTION_8710B 64 -+ -+/* For some inferiority IC purpose. added by Roger, 2009.09.02.*/ -+#define EFUSE_IC_ID_OFFSET 506 -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8710B) -+ -+#define EFUSE_ACCESS_ON 0x69 -+#define EFUSE_ACCESS_OFF 0x00 -+ -+#define PACKAGE_QFN32_S 0 -+#define PACKAGE_QFN48M_S 1 //definiton 8188GU Dongle Package, Efuse Physical Address 0xF8 = 0xFE -+#define PACKAGE_QFN48_S 2 -+#define PACKAGE_QFN64_S 3 -+#define PACKAGE_QFN32_U 4 -+#define PACKAGE_QFN48M_U 5 //definiton 8188GU Dongle Package, Efuse Physical Address 0xF8 = 0xEE -+#define PACKAGE_QFN48_U 6 -+#define PACKAGE_QFN68_U 7 -+ -+typedef enum _PACKAGE_TYPE_E -+{ -+ PACKAGE_DEFAULT, -+ PACKAGE_QFN68, -+ PACKAGE_TFBGA90, -+ PACKAGE_TFBGA80, -+ PACKAGE_TFBGA79 -+}PACKAGE_TYPE_E; -+ -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \ -+ (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+#ifdef CONFIG_FILE_FWIMG -+ extern char *rtw_fw_file_path; -+ extern char *rtw_fw_wow_file_path; -+ #ifdef CONFIG_MP_INCLUDED -+ extern char *rtw_fw_mp_bt_file_path; -+ #endif /* CONFIG_MP_INCLUDED */ -+#endif /* CONFIG_FILE_FWIMG */ -+ -+/* rtl8710b_hal_init.c */ -+s32 rtl8710b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -+void rtl8710b_FirmwareSelfReset(PADAPTER padapter); -+void rtl8710b_InitializeFirmwareVars(PADAPTER padapter); -+ -+void rtl8710b_InitAntenna_Selection(PADAPTER padapter); -+void rtl8710b_DeinitAntenna_Selection(PADAPTER padapter); -+void rtl8710b_CheckAntenna_Selection(PADAPTER padapter); -+void rtl8710b_init_default_value(PADAPTER padapter); -+ -+ -+u32 indirect_read32_8710b(PADAPTER padapter, u32 regaddr); -+void indirect_write32_8710b(PADAPTER padapter, u32 regaddr, u32 data); -+u32 hal_query_syson_reg_8710b(PADAPTER padapter, u32 regaddr, u32 bitmask); -+void hal_set_syson_reg_8710b(PADAPTER padapter, u32 regaddr, u32 bitmask, u32 data); -+#define HAL_SetSYSOnReg hal_set_syson_reg_8710b -+ -+ -+/* EFuse */ -+u8 GetEEPROMSize8710B(PADAPTER padapter); -+ -+#if 0 -+void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -+void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -+void Hal_EfuseParseTxPowerInfo_8710B(PADAPTER padapter, -+ u8 *PROMContent, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseEEPROMVer_8710B(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParsePackageType_8710B(PADAPTER pAdapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseChnlPlan_8710B(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseCustomerID_8710B(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseAntennaDiversity_8710B(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8710B(PADAPTER pAdapter, -+ u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseThermalMeter_8710B(PADAPTER padapter, -+ u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseBoardType_8710B(PADAPTER Adapter, -+ u8 *PROMContent, BOOLEAN AutoloadFail); -+#endif -+ -+void rtl8710b_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8710b(_adapter *adapter); -+u8 SetHwReg8710B(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg8710B(PADAPTER padapter, u8 variable, u8 *val); -+u8 SetHalDefVar8710B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8710B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+ -+/* register */ -+void rtl8710b_InitBeaconParameters(PADAPTER padapter); -+void rtl8710b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -+void _8051Reset8710(PADAPTER padapter); -+ -+void rtl8710b_start_thread(_adapter *padapter); -+void rtl8710b_stop_thread(_adapter *padapter); -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -+#endif -+ -+void CCX_FwC2HTxRpt_8710b(PADAPTER padapter, u8 *pdata, u8 len); -+ -+u8 MRateToHwRate8710B(u8 rate); -+u8 HwRateToMRate8710B(u8 rate); -+ -+#ifdef CONFIG_USB_HCI -+ void rtl8710b_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+#endif -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8710b_led.h b/drivers/staging/rtl8723cs/include/rtl8710b_led.h -new file mode 100644 -index 000000000000..8ca346d7ad35 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8710b_led.h -@@ -0,0 +1,44 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8710B_LED_H__ -+#define __RTL8710B_LED_H__ -+ -+#include -+#include -+#include -+ -+#ifdef CONFIG_RTW_SW_LED -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+#ifdef CONFIG_USB_HCI -+ void rtl8710bu_InitSwLeds(PADAPTER padapter); -+ void rtl8710bu_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+ void rtl8710bs_InitSwLeds(PADAPTER padapter); -+ void rtl8710bs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_GSPI_HCI -+ void rtl8710bs_InitSwLeds(PADAPTER padapter); -+ void rtl8710bs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+ void rtl8710be_InitSwLeds(PADAPTER padapter); -+ void rtl8710be_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif /*#ifdef CONFIG_RTW_SW_LED*/ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8710b_lps_poff.h b/drivers/staging/rtl8723cs/include/rtl8710b_lps_poff.h -new file mode 100644 -index 000000000000..ea9c60e8f700 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8710b_lps_poff.h -@@ -0,0 +1,56 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/******************************************** CONST ************************/ -+#define NUM_OF_REGISTER_BANK 13 -+#define NUM_OF_TOTAL_DWORD (NUM_OF_REGISTER_BANK * 64) -+#define TOTAL_LEN_FOR_HIOE ((NUM_OF_TOTAL_DWORD + 1) * 8) -+#define LPS_POFF_STATIC_FILE_LEN (TOTAL_LEN_FOR_HIOE + TXDESC_SIZE) -+#define LPS_POFF_DYNAMIC_FILE_LEN (512 + TXDESC_SIZE) -+/******************************************** CONST ************************/ -+ -+/******************************************** MACRO ************************/ -+/* HOIE Entry Definition */ -+#define SET_HOIE_ENTRY_LOW_DATA(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE), 0, 16, __Value) -+#define SET_HOIE_ENTRY_HIGH_DATA(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE), 16, 16, __Value) -+#define SET_HOIE_ENTRY_MODE_SELECT(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 0, 1, __Value) -+#define SET_HOIE_ENTRY_ADDRESS(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 1, 14, __Value) -+#define SET_HOIE_ENTRY_BYTE_MASK(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 15, 4, __Value) -+#define SET_HOIE_ENTRY_IO_LOCK(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 19, 1, __Value) -+#define SET_HOIE_ENTRY_RD_EN(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 20, 1, __Value) -+#define SET_HOIE_ENTRY_WR_EN(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 21, 1, __Value) -+#define SET_HOIE_ENTRY_RAW_RW(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 22, 1, __Value) -+#define SET_HOIE_ENTRY_RAW(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 23, 1, __Value) -+#define SET_HOIE_ENTRY_IO_DELAY(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 24, 8, __Value) -+ -+/*********************Function Definition*******************************************/ -+void rtl8710b_lps_poff_init(PADAPTER padapter); -+void rtl8710b_lps_poff_deinit(PADAPTER padapter); -+bool rtl8710b_lps_poff_get_txbndy_status(PADAPTER padapter); -+void rtl8710b_lps_poff_h2c_ctrl(PADAPTER padapter, u8 enable); -+void rtl8710b_lps_poff_set_ps_mode(PADAPTER padapter, bool bEnterLPS); -+bool rtl8710b_lps_poff_get_status(PADAPTER padapter); -+void rtl8710b_lps_poff_wow(PADAPTER padapter); -diff --git a/drivers/staging/rtl8723cs/include/rtl8710b_recv.h b/drivers/staging/rtl8723cs/include/rtl8710b_recv.h -new file mode 100644 -index 000000000000..ca0b8f8e75ae ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8710b_recv.h -@@ -0,0 +1,81 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8710B_RECV_H__ -+#define __RTL8710B_RECV_H__ -+ -+#define RECV_BLK_SZ 512 -+#define RECV_BLK_CNT 16 -+#define RECV_BLK_TH RECV_BLK_CNT -+ -+#if defined(CONFIG_USB_HCI) -+ #ifndef MAX_RECVBUF_SZ -+ #ifdef CONFIG_MINIMAL_MEMORY_USAGE -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ #else -+ #ifdef CONFIG_PLATFORM_MSTAR -+ #define MAX_RECVBUF_SZ (8192) /* 8K */ -+ #elif defined(CONFIG_PLATFORM_HISILICON) -+ #define MAX_RECVBUF_SZ (16384) /* 16k */ -+ #else -+ #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ -+ /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ -+ /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ -+ /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ -+ /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ -+ #endif -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+#endif -+ -+/* Rx smooth factor */ -+#define Rx_Smooth_Factor (20) -+ -+/*-----------------------------------------------------------------*/ -+/* RTL8710B RX BUFFER DESC */ -+/*-----------------------------------------------------------------*/ -+/*DWORD 0*/ -+#define SET_RX_BUFFER_DESC_DATA_LENGTH_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_BUFFER_DESC_LS_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) -+#define SET_RX_BUFFER_DESC_FS_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value) -+#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value) -+ -+#define GET_RX_BUFFER_DESC_OWN_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+#define GET_RX_BUFFER_DESC_LS_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_BUFFER_DESC_FS_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1) -+#ifdef USING_RX_TAG -+ #define GET_RX_BUFFER_DESC_RX_TAG_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 13) -+#else -+ #define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) -+#endif -+ -+/*DWORD 1*/ -+#define SET_RX_BUFFER_PHYSICAL_LOW_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) -+ -+/*DWORD 2*/ -+#ifdef CONFIG_64BIT_DMA -+ #define SET_RX_BUFFER_PHYSICAL_HIGH_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) -+#else -+ #define SET_RX_BUFFER_PHYSICAL_HIGH_8710B(__pRxStatusDesc, __Value) -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ int rtl8710bu_init_recv_priv(_adapter *padapter); -+ void rtl8710bu_free_recv_priv(_adapter *padapter); -+ void rtl8710bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+#endif -+ -+void rtl8710b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8710B_RECV_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8710b_rf.h b/drivers/staging/rtl8723cs/include/rtl8710b_rf.h -new file mode 100644 -index 000000000000..0b5cee616616 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8710b_rf.h -@@ -0,0 +1,20 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8710B_RF_H__ -+#define __RTL8710B_RF_H__ -+ -+int PHY_RF6052_Config8710B(PADAPTER pdapter); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8710b_spec.h b/drivers/staging/rtl8723cs/include/rtl8710b_spec.h -new file mode 100644 -index 000000000000..309c3eeb4362 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8710b_spec.h -@@ -0,0 +1,481 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8710B_SPEC_H__ -+#define __RTL8710B_SPEC_H__ -+ -+#include -+ -+ -+#define HAL_NAV_UPPER_UNIT_8710B 128 /* micro-second */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0000h ~ 0x00FFh System Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_SYS_ISO_CTRL_8710B 0x0000 /* 2 Byte */ -+#define REG_APS_FSMCO_8710B 0x0004 /* 4 Byte */ -+#define REG_SYS_CLKR_8710B 0x0008 /* 2 Byte */ -+#define REG_9346CR_8710B 0x000A /* 2 Byte */ -+#define REG_EE_VPD_8710B 0x000C /* 2 Byte */ -+#define REG_AFE_MISC_8710B 0x0010 /* 1 Byte */ -+#define REG_SPS0_CTRL_8710B 0x0011 /* 7 Byte */ -+#define REG_SPS_OCP_CFG_8710B 0x0018 /* 4 Byte */ -+#define REG_RSV_CTRL_8710B 0x001C /* 3 Byte */ -+#define REG_RF_CTRL_8710B 0x001F /* 1 Byte */ -+#define REG_LPLDO_CTRL_8710B 0x0023 /* 1 Byte */ -+#define REG_AFE_XTAL_CTRL_8710B 0x0024 /* 4 Byte */ -+#define REG_AFE_PLL_CTRL_8710B 0x0028 /* 4 Byte */ -+#define REG_MAC_PLL_CTRL_EXT_8710B 0x002c /* 4 Byte */ -+#define REG_EFUSE_CTRL_8710B 0x0030 -+#define REG_EFUSE_TEST_8710B 0x0034 -+#define REG_PWR_DATA_8710B 0x0038 -+#define REG_CAL_TIMER_8710B 0x003C -+#define REG_ACLK_MON_8710B 0x003E -+#define REG_GPIO_MUXCFG_8710B 0x0040 -+#define REG_GPIO_IO_SEL_8710B 0x0042 -+#define REG_MAC_PINMUX_CFG_8710B 0x0043 -+#define REG_GPIO_PIN_CTRL_8710B 0x0044 -+#define REG_GPIO_INTM_8710B 0x0048 -+#define REG_LEDCFG0_8710B 0x004C -+#define REG_LEDCFG1_8710B 0x004D -+#define REG_LEDCFG2_8710B 0x004E -+#define REG_LEDCFG3_8710B 0x004F -+#define REG_FSIMR_8710B 0x0050 -+#define REG_FSISR_8710B 0x0054 -+#define REG_HSIMR_8710B 0x0058 -+#define REG_HSISR_8710B 0x005c -+#define REG_GPIO_EXT_CTRL 0x0060 -+#define REG_PAD_CTRL1_8710B 0x0064 -+#define REG_MULTI_FUNC_CTRL_8710B 0x0068 -+#define REG_GPIO_STATUS_8710B 0x006C -+#define REG_SDIO_CTRL_8710B 0x0070 -+#define REG_OPT_CTRL_8710B 0x0074 -+#define REG_AFE_CTRL_4_8710B 0x0078 -+#define REG_MCUFWDL_8710B 0x0080 -+#define REG_8051FW_CTRL_8710B 0x0080 -+#define REG_HMEBOX_DBG_0_8710B 0x0088 -+#define REG_HMEBOX_DBG_1_8710B 0x008A -+#define REG_HMEBOX_DBG_2_8710B 0x008C -+#define REG_HMEBOX_DBG_3_8710B 0x008E -+#define REG_WLLPS_CTRL 0x0090 -+ -+#define REG_PMC_DBG_CTRL2_8710B 0x00CC -+#define REG_EFUSE_BURN_GNT_8710B 0x00CF -+#define REG_HPON_FSM_8710B 0x00EC -+#define REG_SYS_CFG1_8710B 0x00F0 -+#define REG_SYS_CFG_8710B 0x00FC -+#define REG_ROM_VERSION 0x00FD -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_C2HEVT_CMD_ID_8710B 0x01A0 -+#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -+#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -+#define REG_C2HEVT_CMD_LEN_8710B 0x01AE -+#define REG_C2HEVT_CLEAR_8710B 0x01AF -+#define REG_MCUTST_1_8710B 0x01C0 -+#define REG_WOWLAN_WAKE_REASON 0x01C7 -+#define REG_FMETHR_8710B 0x01C8 -+#define REG_HMETFR_8710B 0x01CC -+#define REG_HMEBOX_0_8710B 0x01D0 -+#define REG_HMEBOX_1_8710B 0x01D4 -+#define REG_HMEBOX_2_8710B 0x01D8 -+#define REG_HMEBOX_3_8710B 0x01DC -+#define REG_LLT_INIT_8710B 0x01E0 -+#define REG_HMEBOX_EXT0_8710B 0x01F0 -+#define REG_HMEBOX_EXT1_8710B 0x01F4 -+#define REG_HMEBOX_EXT2_8710B 0x01F8 -+#define REG_HMEBOX_EXT3_8710B 0x01FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RQPN_8710B 0x0200 -+#define REG_FIFOPAGE_8710B 0x0204 -+#define REG_DWBCN0_CTRL_8710B REG_TDECTRL -+#define REG_TXDMA_OFFSET_CHK_8710B 0x020C -+#define REG_TXDMA_STATUS_8710B 0x0210 -+#define REG_RQPN_NPQ_8710B 0x0214 -+#define REG_DWBCN1_CTRL_8710B 0x0228 -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RXDMA_AGG_PG_TH_8710B 0x0280 -+#define REG_FW_UPD_RDPTR_8710B 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ -+#define REG_RXDMA_CONTROL_8710B 0x0286 /* Control the RX DMA. */ -+#define REG_RXDMA_STATUS_8710B 0x0288 -+#define REG_RXDMA_MODE_CTRL_8710B 0x0290 -+#define REG_EARLY_MODE_CONTROL_8710B 0x02BC -+#define REG_RSVD5_8710B 0x02F0 -+#define REG_RSVD6_8710B 0x02F4 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0300h ~ 0x03FFh PCIe -+ * -+ * ----------------------------------------------------- */ -+#define REG_PCIE_CTRL_REG_8710B 0x0300 -+#define REG_INT_MIG_8710B 0x0304 /* Interrupt Migration */ -+#define REG_BCNQ_TXBD_DESA_8710B 0x0308 /* TX Beacon Descriptor Address */ -+#define REG_MGQ_TXBD_DESA_8710B 0x0310 /* TX Manage Queue Descriptor Address */ -+#define REG_VOQ_TXBD_DESA_8710B 0x0318 /* TX VO Queue Descriptor Address */ -+#define REG_VIQ_TXBD_DESA_8710B 0x0320 /* TX VI Queue Descriptor Address */ -+#define REG_BEQ_TXBD_DESA_8710B 0x0328 /* TX BE Queue Descriptor Address */ -+#define REG_BKQ_TXBD_DESA_8710B 0x0330 /* TX BK Queue Descriptor Address */ -+#define REG_RXQ_RXBD_DESA_8710B 0x0338 /* RX Queue Descriptor Address */ -+#define REG_HI0Q_TXBD_DESA_8710B 0x0340 -+#define REG_HI1Q_TXBD_DESA_8710B 0x0348 -+#define REG_HI2Q_TXBD_DESA_8710B 0x0350 -+#define REG_HI3Q_TXBD_DESA_8710B 0x0358 -+#define REG_HI4Q_TXBD_DESA_8710B 0x0360 -+#define REG_HI5Q_TXBD_DESA_8710B 0x0368 -+#define REG_HI6Q_TXBD_DESA_8710B 0x0370 -+#define REG_HI7Q_TXBD_DESA_8710B 0x0378 -+#define REG_MGQ_TXBD_NUM_8710B 0x0380 -+#define REG_RX_RXBD_NUM_8710B 0x0382 -+#define REG_VOQ_TXBD_NUM_8710B 0x0384 -+#define REG_VIQ_TXBD_NUM_8710B 0x0386 -+#define REG_BEQ_TXBD_NUM_8710B 0x0388 -+#define REG_BKQ_TXBD_NUM_8710B 0x038A -+#define REG_HI0Q_TXBD_NUM_8710B 0x038C -+#define REG_HI1Q_TXBD_NUM_8710B 0x038E -+#define REG_HI2Q_TXBD_NUM_8710B 0x0390 -+#define REG_HI3Q_TXBD_NUM_8710B 0x0392 -+#define REG_HI4Q_TXBD_NUM_8710B 0x0394 -+#define REG_HI5Q_TXBD_NUM_8710B 0x0396 -+#define REG_HI6Q_TXBD_NUM_8710B 0x0398 -+#define REG_HI7Q_TXBD_NUM_8710B 0x039A -+#define REG_TSFTIMER_HCI_8710B 0x039C -+#define REG_BD_RW_PTR_CLR_8710B 0x039C -+ -+/* Read Write Point */ -+#define REG_VOQ_TXBD_IDX_8710B 0x03A0 -+#define REG_VIQ_TXBD_IDX_8710B 0x03A4 -+#define REG_BEQ_TXBD_IDX_8710B 0x03A8 -+#define REG_BKQ_TXBD_IDX_8710B 0x03AC -+#define REG_MGQ_TXBD_IDX_8710B 0x03B0 -+#define REG_RXQ_TXBD_IDX_8710B 0x03B4 -+#define REG_HI0Q_TXBD_IDX_8710B 0x03B8 -+#define REG_HI1Q_TXBD_IDX_8710B 0x03BC -+#define REG_HI2Q_TXBD_IDX_8710B 0x03C0 -+#define REG_HI3Q_TXBD_IDX_8710B 0x03C4 -+#define REG_HI4Q_TXBD_IDX_8710B 0x03C8 -+#define REG_HI5Q_TXBD_IDX_8710B 0x03CC -+#define REG_HI6Q_TXBD_IDX_8710B 0x03D0 -+#define REG_HI7Q_TXBD_IDX_8710B 0x03D4 -+ -+#define REG_PCIE_HCPWM_8710BE 0x03D8 /* ?????? */ -+#define REG_PCIE_HRPWM_8710BE 0x03DC /* PCIe RPWM ?????? */ -+#define REG_DBI_WDATA_V1_8710B 0x03E8 -+#define REG_DBI_RDATA_V1_8710B 0x03EC -+#define REG_DBI_FLAG_V1_8710B 0x03F0 -+#define REG_MDIO_V1_8710B 0x03F4 -+#define REG_PCIE_MIX_CFG_8710B 0x03F8 -+#define REG_HCI_MIX_CFG_8710B 0x03FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_VOQ_INFORMATION_8710B 0x0400 -+#define REG_VIQ_INFORMATION_8710B 0x0404 -+#define REG_BEQ_INFORMATION_8710B 0x0408 -+#define REG_BKQ_INFORMATION_8710B 0x040C -+#define REG_MGQ_INFORMATION_8710B 0x0410 -+#define REG_HGQ_INFORMATION_8710B 0x0414 -+#define REG_BCNQ_INFORMATION_8710B 0x0418 -+#define REG_TXPKT_EMPTY_8710B 0x041A -+ -+#define REG_FWHW_TXQ_CTRL_8710B 0x0420 -+#define REG_HWSEQ_CTRL_8710B 0x0423 -+#define REG_TXPKTBUF_BCNQ_BDNY_8710B 0x0424 -+#define REG_TXPKTBUF_MGQ_BDNY_8710B 0x0425 -+#define REG_LIFECTRL_CTRL_8710B 0x0426 -+#define REG_MULTI_BCNQ_OFFSET_8710B 0x0427 -+#define REG_SPEC_SIFS_8710B 0x0428 -+#define REG_RL_8710B 0x042A -+#define REG_TXBF_CTRL_8710B 0x042C -+#define REG_DARFRC_8710B 0x0430 -+#define REG_RARFRC_8710B 0x0438 -+#define REG_RRSR_8710B 0x0440 -+#define REG_ARFR0_8710B 0x0444 -+#define REG_ARFR1_8710B 0x044C -+#define REG_CCK_CHECK_8710B 0x0454 -+#define REG_AMPDU_MAX_TIME_8710B 0x0456 -+#define REG_TXPKTBUF_BCNQ_BDNY1_8710B 0x0457 -+ -+#define REG_AMPDU_MAX_LENGTH_8710B 0x0458 -+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8710B 0x045D -+#define REG_NDPA_OPT_CTRL_8710B 0x045F -+#define REG_FAST_EDCA_CTRL_8710B 0x0460 -+#define REG_RD_RESP_PKT_TH_8710B 0x0463 -+#define REG_DATA_SC_8710B 0x0483 -+#ifdef CONFIG_WOWLAN -+ #define REG_TXPKTBUF_IV_LOW 0x0484 -+ #define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_TXRPT_START_OFFSET 0x04AC -+#define REG_POWER_STAGE1_8710B 0x04B4 -+#define REG_POWER_STAGE2_8710B 0x04B8 -+#define REG_AMPDU_BURST_MODE_8710B 0x04BC -+#define REG_PKT_VO_VI_LIFE_TIME_8710B 0x04C0 -+#define REG_PKT_BE_BK_LIFE_TIME_8710B 0x04C2 -+#define REG_STBC_SETTING_8710B 0x04C4 -+#define REG_HT_SINGLE_AMPDU_8710B 0x04C7 -+#define REG_PROT_MODE_CTRL_8710B 0x04C8 -+#define REG_MAX_AGGR_NUM_8710B 0x04CA -+#define REG_RTS_MAX_AGGR_NUM_8710B 0x04CB -+#define REG_BAR_MODE_CTRL_8710B 0x04CC -+#define REG_RA_TRY_RATE_AGG_LMT_8710B 0x04CF -+#define REG_MACID_PKT_DROP0_8710B 0x04D0 -+#define REG_MACID_PKT_SLEEP_8710B 0x04D4 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_EDCA_VO_PARAM_8710B 0x0500 -+#define REG_EDCA_VI_PARAM_8710B 0x0504 -+#define REG_EDCA_BE_PARAM_8710B 0x0508 -+#define REG_EDCA_BK_PARAM_8710B 0x050C -+#define REG_BCNTCFG_8710B 0x0510 -+#define REG_PIFS_8710B 0x0512 -+#define REG_RDG_PIFS_8710B 0x0513 -+#define REG_SIFS_CTX_8710B 0x0514 -+#define REG_SIFS_TRX_8710B 0x0516 -+#define REG_AGGR_BREAK_TIME_8710B 0x051A -+#define REG_SLOT_8710B 0x051B -+#define REG_TX_PTCL_CTRL_8710B 0x0520 -+#define REG_TXPAUSE_8710B 0x0522 -+#define REG_DIS_TXREQ_CLR_8710B 0x0523 -+#define REG_RD_CTRL_8710B 0x0524 -+/* -+ * Format for offset 540h-542h: -+ * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. -+ * [7:4]: Reserved. -+ * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. -+ * [23:20]: Reserved -+ * Description: -+ * | -+ * |<--Setup--|--Hold------------>| -+ * --------------|---------------------- -+ * | -+ * TBTT -+ * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. -+ * Described by Designer Tim and Bruce, 2011-01-14. -+ * */ -+#define REG_TBTT_PROHIBIT_8710B 0x0540 -+#define REG_RD_NAV_NXT_8710B 0x0544 -+#define REG_NAV_PROT_LEN_8710B 0x0546 -+#define REG_BCN_CTRL_8710B 0x0550 -+#define REG_BCN_CTRL_1_8710B 0x0551 -+#define REG_MBID_NUM_8710B 0x0552 -+#define REG_DUAL_TSF_RST_8710B 0x0553 -+#define REG_BCN_INTERVAL_8710B 0x0554 -+#define REG_DRVERLYINT_8710B 0x0558 -+#define REG_BCNDMATIM_8710B 0x0559 -+#define REG_ATIMWND_8710B 0x055A -+#define REG_USTIME_TSF_8710B 0x055C -+#define REG_BCN_MAX_ERR_8710B 0x055D -+#define REG_RXTSF_OFFSET_CCK_8710B 0x055E -+#define REG_RXTSF_OFFSET_OFDM_8710B 0x055F -+#define REG_TSFTR_8710B 0x0560 -+#define REG_CTWND_8710B 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8710B 0x0577 -+#define REG_PSTIMER_8710B 0x0580 -+#define REG_TIMER0_8710B 0x0584 -+#define REG_TIMER1_8710B 0x0588 -+#define REG_ACMHWCTRL_8710B 0x05C0 -+#define REG_SCH_TXCMD_8710B 0x05F8 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_MAC_CR_8710B 0x0600 -+#define REG_TCR_8710B 0x0604 -+#define REG_RCR_8710B 0x0608 -+#define REG_RX_PKT_LIMIT_8710B 0x060C -+#define REG_RX_DLK_TIME_8710B 0x060D -+#define REG_RX_DRVINFO_SZ_8710B 0x060F -+ -+#define REG_MACID_8710B 0x0610 -+#define REG_BSSID_8710B 0x0618 -+#define REG_MAR_8710B 0x0620 -+#define REG_MBIDCAMCFG_8710B 0x0628 -+#define REG_WOWLAN_GTK_DBG1 0x630 -+#define REG_WOWLAN_GTK_DBG2 0x634 -+ -+#define REG_USTIME_EDCA_8710B 0x0638 -+#define REG_MAC_SPEC_SIFS_8710B 0x063A -+#define REG_RESP_SIFP_CCK_8710B 0x063C -+#define REG_RESP_SIFS_OFDM_8710B 0x063E -+#define REG_ACKTO_8710B 0x0640 -+#define REG_CTS2TO_8710B 0x0641 -+#define REG_EIFS_8710B 0x0642 -+ -+#define REG_NAV_UPPER_8710B 0x0652 /* unit of 128 */ -+#define REG_TRXPTCL_CTL_8710B 0x0668 -+ -+/* Security */ -+#define REG_CAMCMD_8710B 0x0670 -+#define REG_CAMWRITE_8710B 0x0674 -+#define REG_CAMREAD_8710B 0x0678 -+#define REG_CAMDBG_8710B 0x067C -+#define REG_SECCFG_8710B 0x0680 -+ -+/* Power */ -+#define REG_WOW_CTRL_8710B 0x0690 -+#define REG_PS_RX_INFO_8710B 0x0692 -+#define REG_UAPSD_TID_8710B 0x0693 -+#define REG_WKFMCAM_CMD_8710B 0x0698 -+#define REG_WKFMCAM_NUM_8710B 0x0698 -+#define REG_WKFMCAM_RWD_8710B 0x069C -+#define REG_RXFLTMAP0_8710B 0x06A0 -+#define REG_RXFLTMAP1_8710B 0x06A2 -+#define REG_RXFLTMAP2_8710B 0x06A4 -+#define REG_BCN_PSR_RPT_8710B 0x06A8 -+#define REG_BT_COEX_TABLE_8710B 0x06C0 -+#define REG_BFMER0_INFO_8710B 0x06E4 -+#define REG_BFMER1_INFO_8710B 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8710B 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8710B 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8710B 0x06FC -+ -+/* Hardware Port 2 */ -+#define REG_MACID1_8710B 0x0700 -+#define REG_BSSID1_8710B 0x0708 -+#define REG_BFMEE_SEL_8710B 0x0714 -+#define REG_SND_PTCL_CTRL_8710B 0x0718 -+ -+/* LTR */ -+#define REG_LTR_CTRL_BASIC_8710B 0x07A4 -+#define REG_LTR_IDLE_LATENCY_V1_8710B 0x0798 -+#define REG_LTR_ACTIVE_LATENCY_V1_8710B 0x079C -+ -+/* LTE_COEX */ -+#define REG_LTECOEX_CTRL 0x07C0 -+#define REG_LTECOEX_WRITE_DATA 0x07C4 -+#define REG_LTECOEX_READ_DATA 0x07C8 -+#define REG_LTECOEX_PATH_CONTROL 0x70 -+ -+/* Other */ -+#define REG_USB_ACCESS_TIMEOUT 0xFE4C -+ -+/* ----------------------------------------------------- -+ * SYSON_REG_SPEC -+ * ----------------------------------------------------- */ -+#define SYSON_REG_BASE_ADDR_8710B 0x40000000 -+#define REG_SYS_XTAL_CTRL0 0x0060 -+#define REG_SYS_SYSTEM_CFG0 0x1F0 -+#define REG_SYS_SYSTEM_CFG1 0x1F4 -+#define REG_SYS_SYSTEM_CFG2 0x1F8 -+#define REG_SYS_EEPROM_CTRL0 0x0E0 -+ -+ -+/* ----------------------------------------------------- -+ * Indirect_R/W_SPEC -+ * ----------------------------------------------------- */ -+#define NORMAL_REG_READ_OFFSET 0x83000000 -+#define NORMAL_REG_WRITE_OFFSET 0x84000000 -+#define EFUSE_READ_OFFSET 0x85000000 -+#define EFUSE_WRITE_OFFSET 0x86000000 -+ -+ -+/* ----------------------------------------------------- -+ * PAGE0_WLANON_REG_SPEC -+ * ----------------------------------------------------- */ -+#define PAGE0_OFFSET 0x0 // WLANON_PAGE0_REG needs to add an offset. -+ -+ -+ -+/* **************************************************************************** -+ * 8723 Regsiter Bit and Content definition -+ * **************************************************************************** */ -+ -+ /* ----------------------------------------------------- -+ * REG_SYS_SYSTEM_CFG0 -+ * ----------------------------------------------------- */ -+#define BIT_RTL_ID_8710B BIT(16) -+ -+#define BIT_MASK_CHIP_VER_8710B 0xf -+#define BIT_GET_CHIP_VER_8710B(x) ((x) & BIT_MASK_CHIP_VER_8710B) -+ -+#define BIT_SHIFT_VENDOR_ID_8710B 4 -+#define BIT_MASK_VENDOR_ID_8710B 0xf -+#define BIT_GET_VENDOR_ID_8710B(x) (((x) >> BIT_SHIFT_VENDOR_ID_8710B) & BIT_MASK_VENDOR_ID_8710B) -+ -+ /* ----------------------------------------------------- -+ * REG_SYS_SYSTEM_CFG1 -+ * ----------------------------------------------------- */ -+#define BIT_SPSLDO_SEL_8710B BIT(25) -+ -+ /* ----------------------------------------------------- -+ * REG_SYS_SYSTEM_CFG2 -+ * ----------------------------------------------------- */ -+#define BIT_MASK_RF_RL_ID_8710B 0xf -+#define BIT_GET_RF_RL_ID_8710B(x) ((x) & BIT_MASK_RF_RL_ID_8710B) -+ -+ /* ----------------------------------------------------- -+ * REG_SYS_SYSTEM_CFG2 -+ * ----------------------------------------------------- */ -+#define BIT_EERPOMSEL_8710B BIT(4) -+#define BIT_AUTOLOAD_SUS_8710B BIT(5) -+ -+ -+ /* ----------------------------------------------------- -+ * Other -+ * ----------------------------------------------------- */ -+ -+ -+#define BIT_USB_RXDMA_AGG_EN BIT(31) -+#define RXDMA_AGG_MODE_EN BIT(1) -+ -+#ifdef CONFIG_WOWLAN -+ #define RXPKT_RELEASE_POLL BIT(16) -+ #define RXDMA_IDLE BIT(17) -+ #define RW_RELEASE_EN BIT(18) -+#endif -+ -+/* 2 HSISR -+ * interrupt mask which needs to clear */ -+#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ -+ HSISR_SPS_OCP_INT |\ -+ HSISR_RON_INT |\ -+ HSISR_PDNINT |\ -+ HSISR_GPIO9_INT) -+ -+#ifdef CONFIG_RF_POWER_TRIM -+ #ifdef CONFIG_RTL8710B -+ #define EEPROM_RF_GAIN_OFFSET 0xC1 -+ #endif -+ -+ #define EEPROM_RF_GAIN_VAL 0x1F6 -+#endif /*CONFIG_RF_POWER_TRIM*/ -+ -+#endif /* __RTL8710B_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8710b_sreset.h b/drivers/staging/rtl8723cs/include/rtl8710b_sreset.h -new file mode 100644 -index 000000000000..ac5c64edd345 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8710b_sreset.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8710B_SRESET_H_ -+#define _RTL8710B_SRESET_H_ -+ -+#include -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ extern void rtl8710b_sreset_xmit_status_check(_adapter *padapter); -+ extern void rtl8710b_sreset_linked_status_check(_adapter *padapter); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8710b_xmit.h b/drivers/staging/rtl8723cs/include/rtl8710b_xmit.h -new file mode 100644 -index 000000000000..b3ec6f58042e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8710b_xmit.h -@@ -0,0 +1,523 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8710B_XMIT_H__ -+#define __RTL8710B_XMIT_H__ -+ -+ -+#define MAX_TID (15) -+ -+ -+#ifndef __INC_HAL8710BDESC_H -+#define __INC_HAL8710BDESC_H -+ -+#define RX_STATUS_DESC_SIZE_8710B 24 -+#define RX_DRV_INFO_SIZE_UNIT_8710B 8 -+ -+ -+/* DWORD 0 */ -+#define SET_RX_STATUS_DESC_PKT_LEN_8710B(__pRxStatusDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_8710B(__pRxStatusDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_8710B(__pRxStatusDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) -+ -+#define GET_RX_STATUS_DESC_PKT_LEN_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICV_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_EOR_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_OWN_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+ -+/* DWORD 1 */ -+#define GET_RX_STATUS_DESC_MACID_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_TID_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_AMSDU_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_A1_FIT_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -+#define GET_RX_STATUS_DESC_CHKERR_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_IPVER_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_IS_TCPUDP__8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_CHK_VLD_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_MC_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) -+ -+/* DWORD 2 */ -+#define GET_RX_STATUS_DESC_SEQ_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -+#define GET_RX_STATUS_DESC_RX_IS_QOS_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_RPT_SEL_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -+#define GET_RX_STATUS_DESC_FCS_OK_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) -+ -+/* DWORD 3 */ -+#define GET_RX_STATUS_DESC_RX_RATE_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_HTC_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -+#ifdef CONFIG_USB_RX_AGGREGATION -+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -+#endif -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_MATCH_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_MATCH_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) -+ -+/* DWORD 6 */ -+#define GET_RX_STATUS_DESC_MATCH_ID_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7) -+ -+/* DWORD 5 */ -+#define GET_RX_STATUS_DESC_TSFL_8710B(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) -+ -+#define GET_RX_STATUS_DESC_BUFF_ADDR_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+#define GET_RX_STATUS_DESC_BUFF_ADDR64_8710B(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+#define SET_RX_STATUS_DESC_BUFF_ADDR_8710B(__pRxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) -+ -+ -+/* Dword 0, rsvd: bit26, bit28 */ -+#define GET_TX_DESC_OWN_8710B(__pTxDesc)\ -+ LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+#define SET_TX_DESC_PKT_SIZE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define SET_TX_DESC_OFFSET_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define SET_TX_DESC_BMC_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_AMSDU_PAD_EN_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_NO_ACM_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+ -+/* Dword 1 */ -+#define SET_TX_DESC_MACID_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+#define SET_TX_DESC_MORE_DATA_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) -+ -+/* Dword 2 remove P_AID, G_ID field*/ -+#define SET_TX_DESC_CCA_RTS_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_NULL0_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -+#define SET_TX_DESC_NULL1_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -+#define SET_TX_DESC_BK_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define SET_TX_DESC_RAW_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define SET_TX_DESC_CCX_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_INT_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_FTM_EN_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 30, 1, __Value) -+ -+/* Dword 3 */ -+#define SET_TX_DESC_NAV_USE_HDR_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+#define SET_TX_DESC_HWSEQ_SEL_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_PORT_ID_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 2, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+/* Dword 4 */ -+#define SET_TX_DESC_TX_RATE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_TX_TRY_RATE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+#define SET_TX_DESC_PCTS_EN_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -+#define SET_TX_DESC_PCTS_MASK_IDX_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) -+ -+/* Dword 5 */ -+#define SET_TX_DESC_DATA_SC_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_STBC_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_RTS_STBC_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+#define SET_TX_DESC_PATH_A_EN_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value) -+#define SET_TX_DESC_TXPWR_OF_SET_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) -+ -+/* Dword 6 */ -+#define SET_TX_DESC_SW_DEFINE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_MBSSID_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+#define SET_TX_DESC_RF_SEL_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+ -+/* Dword 7 */ -+#ifdef CONFIG_PCI_HCI -+#define SET_TX_DESC_TX_BUFFER_SIZE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+ -+#ifdef CONFIG_USB_HCI -+#define SET_TX_DESC_TX_DESC_CHECKSUM_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+#define SET_TX_DESC_TX_TIMESTAMP_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value) -+#endif -+ -+#define SET_TX_DESC_USB_TXAGG_NUM_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+ -+/* Dword 8 */ -+#define SET_TX_DESC_RTS_RC_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -+#define SET_TX_DESC_BAR_RC_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -+#define SET_TX_DESC_DATA_RC_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -+#define SET_TX_DESC_HWSEQ_EN_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+#define SET_TX_DESC_NEXTHEADPAGE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -+#define SET_TX_DESC_TAILPAGE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) -+ -+/* Dword 9 */ -+#define SET_TX_DESC_PADDING_LEN_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -+#define SET_TX_DESC_SEQ_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+#define SET_TX_DESC_FINAL_DATA_RATE_8710B(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) -+ -+ -+#define SET_EARLYMODE_PKTNUM_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+ -+/*-----------------------------------------------------------------*/ -+/* RTL8710B TX BUFFER DESC */ -+/*-----------------------------------------------------------------*/ -+#ifdef CONFIG_64BIT_DMA -+ #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) -+ #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) -+#else -+ #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) -+ #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) /* 64 BIT mode only */ -+#endif -+/* ********************************************************* */ -+ -+/* 64 bits -- 32 bits */ -+/* ======= ======= */ -+/* Dword 0 0 */ -+#define SET_TX_BUFF_DESC_LEN_0_8710B(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) -+#define SET_TX_BUFF_DESC_PSB_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -+#define SET_TX_BUFF_DESC_OWN_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+/* Dword 1 1 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_0_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -+#define GET_TX_BUFF_DESC_ADDR_LOW_0_8710B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) -+/* Dword 2 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value) -+#ifdef CONFIG_64BIT_DMA -+ #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) -+#else -+ #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc) 0 -+#endif -+/* Dword 3 NA */ -+/* RESERVED 0 */ -+/* Dword 4 2 */ -+#define SET_TX_BUFF_DESC_LEN_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value) -+/* Dword 5 3 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value) -+/* Dword 6 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value) -+/* Dword 7 NA */ -+/*RESERVED 0 */ -+/* Dword 8 4 */ -+#define SET_TX_BUFF_DESC_LEN_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value) -+/* Dword 9 5 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value) -+/* Dword 10 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value) -+/* Dword 11 NA */ -+/*RESERVED 0 */ -+/* Dword 12 6 */ -+#define SET_TX_BUFF_DESC_LEN_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value) -+/* Dword 13 7 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value) -+/* Dword 14 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value) -+/* Dword 15 NA */ -+/*RESERVED 0 */ -+ -+ -+#endif -+/* ----------------------------------------------------------- -+ * -+ * Rate -+ * -+ * ----------------------------------------------------------- -+ * CCK Rates, TxHT = 0 */ -+#define DESC8710B_RATE1M 0x00 -+#define DESC8710B_RATE2M 0x01 -+#define DESC8710B_RATE5_5M 0x02 -+#define DESC8710B_RATE11M 0x03 -+ -+/* OFDM Rates, TxHT = 0 */ -+#define DESC8710B_RATE6M 0x04 -+#define DESC8710B_RATE9M 0x05 -+#define DESC8710B_RATE12M 0x06 -+#define DESC8710B_RATE18M 0x07 -+#define DESC8710B_RATE24M 0x08 -+#define DESC8710B_RATE36M 0x09 -+#define DESC8710B_RATE48M 0x0a -+#define DESC8710B_RATE54M 0x0b -+ -+/* MCS Rates, TxHT = 1 */ -+#define DESC8710B_RATEMCS0 0x0c -+#define DESC8710B_RATEMCS1 0x0d -+#define DESC8710B_RATEMCS2 0x0e -+#define DESC8710B_RATEMCS3 0x0f -+#define DESC8710B_RATEMCS4 0x10 -+#define DESC8710B_RATEMCS5 0x11 -+#define DESC8710B_RATEMCS6 0x12 -+#define DESC8710B_RATEMCS7 0x13 -+#define DESC8710B_RATEMCS8 0x14 -+#define DESC8710B_RATEMCS9 0x15 -+#define DESC8710B_RATEMCS10 0x16 -+#define DESC8710B_RATEMCS11 0x17 -+#define DESC8710B_RATEMCS12 0x18 -+#define DESC8710B_RATEMCS13 0x19 -+#define DESC8710B_RATEMCS14 0x1a -+#define DESC8710B_RATEMCS15 0x1b -+#define DESC8710B_RATEVHTSS1MCS0 0x2c -+#define DESC8710B_RATEVHTSS1MCS1 0x2d -+#define DESC8710B_RATEVHTSS1MCS2 0x2e -+#define DESC8710B_RATEVHTSS1MCS3 0x2f -+#define DESC8710B_RATEVHTSS1MCS4 0x30 -+#define DESC8710B_RATEVHTSS1MCS5 0x31 -+#define DESC8710B_RATEVHTSS1MCS6 0x32 -+#define DESC8710B_RATEVHTSS1MCS7 0x33 -+#define DESC8710B_RATEVHTSS1MCS8 0x34 -+#define DESC8710B_RATEVHTSS1MCS9 0x35 -+#define DESC8710B_RATEVHTSS2MCS0 0x36 -+#define DESC8710B_RATEVHTSS2MCS1 0x37 -+#define DESC8710B_RATEVHTSS2MCS2 0x38 -+#define DESC8710B_RATEVHTSS2MCS3 0x39 -+#define DESC8710B_RATEVHTSS2MCS4 0x3a -+#define DESC8710B_RATEVHTSS2MCS5 0x3b -+#define DESC8710B_RATEVHTSS2MCS6 0x3c -+#define DESC8710B_RATEVHTSS2MCS7 0x3d -+#define DESC8710B_RATEVHTSS2MCS8 0x3e -+#define DESC8710B_RATEVHTSS2MCS9 0x3f -+ -+ -+#define RX_HAL_IS_CCK_RATE_8710B(pDesc)\ -+ (GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE1M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE2M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE5_5M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE11M) -+ -+#ifdef CONFIG_TRX_BD_ARCH -+ struct tx_desc; -+#endif -+ -+void rtl8710b_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+void rtl8710b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -+void rtl8710b_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -+void rtl8710b_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -+void rtl8710b_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -+void rtl8710b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+ -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8710bs_init_xmit_priv(PADAPTER padapter); -+ void rtl8710bs_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8710bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8710bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+ s32 rtl8710bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8710bs_xmit_buf_handler(PADAPTER padapter); -+ thread_return rtl8710bs_xmit_thread(thread_context context); -+ #define hal_xmit_handler rtl8710bs_xmit_buf_handler -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ s32 rtl8710bu_xmit_buf_handler(PADAPTER padapter); -+ #define hal_xmit_handler rtl8710bu_xmit_buf_handler -+ s32 rtl8710bu_init_xmit_priv(PADAPTER padapter); -+ void rtl8710bu_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8710bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8710bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8710bu_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8710bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ void rtl8710bu_xmit_tasklet(void *priv); -+ s32 rtl8710bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+ void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8710be_init_xmit_priv(PADAPTER padapter); -+ void rtl8710be_free_xmit_priv(PADAPTER padapter); -+ struct xmit_buf *rtl8710be_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+ void rtl8710be_xmitframe_resume(_adapter *padapter); -+ s32 rtl8710be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8710be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+ s32 rtl8710be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ void rtl8710be_xmit_tasklet(void *priv); -+#endif -+ -+u8 BWMapping_8710B(PADAPTER Adapter, struct pkt_attrib *pattrib); -+u8 SCMapping_8710B(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723b_cmd.h b/drivers/staging/rtl8723cs/include/rtl8723b_cmd.h -new file mode 100644 -index 000000000000..d4da95640791 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723b_cmd.h -@@ -0,0 +1,199 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723B_CMD_H__ -+#define __RTL8723B_CMD_H__ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+enum h2c_cmd_8723B { -+ /* Common Class: 000 */ -+ H2C_8723B_RSVD_PAGE = 0x00, -+ H2C_8723B_MEDIA_STATUS_RPT = 0x01, -+ H2C_8723B_SCAN_ENABLE = 0x02, -+ H2C_8723B_KEEP_ALIVE = 0x03, -+ H2C_8723B_DISCON_DECISION = 0x04, -+ H2C_8723B_PSD_OFFLOAD = 0x05, -+ H2C_8723B_AP_OFFLOAD = 0x08, -+ H2C_8723B_BCN_RSVDPAGE = 0x09, -+ H2C_8723B_PROBERSP_RSVDPAGE = 0x0A, -+ H2C_8723B_FCS_RSVDPAGE = 0x10, -+ H2C_8723B_FCS_INFO = 0x11, -+ H2C_8723B_AP_WOW_GPIO_CTRL = 0x13, -+ -+ /* PoweSave Class: 001 */ -+ H2C_8723B_SET_PWR_MODE = 0x20, -+ H2C_8723B_PS_TUNING_PARA = 0x21, -+ H2C_8723B_PS_TUNING_PARA2 = 0x22, -+ H2C_8723B_P2P_LPS_PARAM = 0x23, -+ H2C_8723B_P2P_PS_OFFLOAD = 0x24, -+ H2C_8723B_PS_SCAN_ENABLE = 0x25, -+ H2C_8723B_SAP_PS_ = 0x26, -+ H2C_8723B_INACTIVE_PS_ = 0x27, /* Inactive_PS */ -+ H2C_8723B_FWLPS_IN_IPS_ = 0x28, -+ -+ /* Dynamic Mechanism Class: 010 */ -+ H2C_8723B_MACID_CFG = 0x40, -+ H2C_8723B_TXBF = 0x41, -+ H2C_8723B_RSSI_SETTING = 0x42, -+ H2C_8723B_AP_REQ_TXRPT = 0x43, -+ H2C_8723B_INIT_RATE_COLLECT = 0x44, -+ H2C_8723B_RA_PARA_ADJUST = 0x46, -+ -+ /* BT Class: 011 */ -+ H2C_8723B_B_TYPE_TDMA = 0x60, -+ H2C_8723B_BT_INFO = 0x61, -+ H2C_8723B_FORCE_BT_TXPWR = 0x62, -+ H2C_8723B_BT_IGNORE_WLANACT = 0x63, -+ H2C_8723B_DAC_SWING_VALUE = 0x64, -+ H2C_8723B_ANT_SEL_RSV = 0x65, -+ H2C_8723B_WL_OPMODE = 0x66, -+ H2C_8723B_BT_MP_OPER = 0x67, -+ H2C_8723B_BT_CONTROL = 0x68, -+ H2C_8723B_BT_WIFI_CTRL = 0x69, -+ H2C_8723B_BT_FW_PATCH = 0x6A, -+ H2C_8723B_BT_WLAN_CALIBRATION = 0x6D, -+ -+ /* WOWLAN Class: 100 */ -+ H2C_8723B_WOWLAN = 0x80, -+ H2C_8723B_REMOTE_WAKE_CTRL = 0x81, -+ H2C_8723B_AOAC_GLOBAL_INFO = 0x82, -+ H2C_8723B_AOAC_RSVD_PAGE = 0x83, -+ H2C_8723B_AOAC_RSVD_PAGE2 = 0x84, -+ H2C_8723B_D0_SCAN_OFFLOAD_CTRL = 0x85, -+ H2C_8723B_D0_SCAN_OFFLOAD_INFO = 0x86, -+ H2C_8723B_CHNL_SWITCH_OFFLOAD = 0x87, -+ H2C_8723B_P2P_OFFLOAD_RSVD_PAGE = 0x8A, -+ H2C_8723B_P2P_OFFLOAD = 0x8B, -+ -+ H2C_8723B_RESET_TSF = 0xC0, -+ H2C_8723B_MAXID, -+}; -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- -+ * _RSVDPAGE_LOC_CMD_0x00 */ -+#define SET_8723B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8723B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8723B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8723B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+/* _KEEP_ALIVE_CMD_0x03 */ -+#define SET_8723B_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8723B_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8723B_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_8723B_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+ -+/* _DISCONNECT_DECISION_CMD_0x04 */ -+#define SET_8723B_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8723B_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8723B_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8723B_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+ -+/* _PWR_MOD_CMD_0x20 */ -+#define SET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_8723B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8723B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -+#define SET_8723B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+#define GET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) -+ -+/* _PS_TUNE_PARAM_CMD_0x21 */ -+#define SET_8723B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8723B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -+#define SET_8723B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -+#define SET_8723B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _MACID_CFG_CMD_0x40 */ -+#define SET_8723B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -+#define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) -+ -+/* _RSSI_SETTING_CMD_0x42 */ -+#define SET_8723B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -+#define SET_8723B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _AP_REQ_TXRPT_CMD_0x43 */ -+#define SET_8723B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+ -+/* _FORCE_BT_TXPWR_CMD_0x62 */ -+#define SET_8723B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+ -+/* _FORCE_BT_MP_OPER_CMD_0x67 */ -+#define SET_8723B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_8723B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -+#define SET_8723B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8723B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+#define SET_8723B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8723B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+ -+/* _BT_FW_PATCH_0x6A */ -+#define SET_8723B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) -+#define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+#define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ------------------------------------------- Structure -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- Function Statement -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+/* host message to firmware cmd */ -+void rtl8723b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -+void rtl8723b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -+void rtl8723b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); -+/* s32 rtl8723b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -+void rtl8723b_set_FwPsTuneParam_cmd(PADAPTER padapter); -+void rtl8723b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); -+void rtl8723b_download_rsvd_page(PADAPTER padapter, u8 mstatus); -+#ifdef CONFIG_BT_COEXIST -+ void rtl8723b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -+#endif /* CONFIG_BT_COEXIST */ -+#ifdef CONFIG_P2P -+ void rtl8723b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_P2P_WOWLAN -+ void rtl8723b_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -+#endif -+ -+void rtl8723b_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); -+ -+s32 FillH2CCmd8723B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+u8 GetTxBufferRsvdPageNum8723B(_adapter *padapter, bool wowlan); -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723b_dm.h b/drivers/staging/rtl8723cs/include/rtl8723b_dm.h -new file mode 100644 -index 000000000000..ea517175f0bd ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723b_dm.h -@@ -0,0 +1,38 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723B_DM_H__ -+#define __RTL8723B_DM_H__ -+/* ************************************************************ -+ * Description: -+ * -+ * This file is for 8723B dynamic mechanism only -+ * -+ * -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * structure and define -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * function prototype -+ * ************************************************************ */ -+ -+void rtl8723b_init_dm_priv(PADAPTER padapter); -+void rtl8723b_deinit_dm_priv(PADAPTER padapter); -+ -+void rtl8723b_InitHalDm(PADAPTER padapter); -+void rtl8723b_HalDmWatchDog(PADAPTER padapter); -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723b_hal.h b/drivers/staging/rtl8723cs/include/rtl8723b_hal.h -new file mode 100644 -index 000000000000..8483502464b8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723b_hal.h -@@ -0,0 +1,274 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723B_HAL_H__ -+#define __RTL8723B_HAL_H__ -+ -+#include "hal_data.h" -+ -+#include "rtl8723b_spec.h" -+#include "rtl8723b_rf.h" -+#include "rtl8723b_dm.h" -+#include "rtl8723b_recv.h" -+#include "rtl8723b_xmit.h" -+#include "rtl8723b_cmd.h" -+#include "rtl8723b_led.h" -+#include "Hal8723BPwrSeq.h" -+#include "Hal8723BPhyReg.h" -+#include "Hal8723BPhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+ #include "rtl8723b_sreset.h" -+#endif -+ -+#define FW_8723B_SIZE 0x8000 -+#define FW_8723B_START_ADDRESS 0x1000 -+#define FW_8723B_END_ADDRESS 0x1FFF /* 0x5FFF */ -+ -+#define IS_FW_HEADER_EXIST_8723B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x5300) -+ -+typedef struct _RT_FIRMWARE { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[FW_8723B_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8723B, *PRT_FIRMWARE_8723B; -+ -+/* -+ * This structure must be cared byte-ordering -+ * -+ * Added by tynli. 2009.12.04. */ -+typedef struct _RT_8723B_FIRMWARE_HDR { -+ /* 8-byte alinment required */ -+ -+ /* --- LONG WORD 0 ---- */ -+ u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ -+ u8 Category; /* AP/NIC and USB/PCI */ -+ u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -+ u16 Version; /* FW Version */ -+ u16 Subversion; /* FW Subversion, default 0x00 */ -+ -+ /* --- LONG WORD 1 ---- */ -+ u8 Month; /* Release time Month field */ -+ u8 Date; /* Release time Date field */ -+ u8 Hour; /* Release time Hour field */ -+ u8 Minute; /* Release time Minute field */ -+ u16 RamCodeSize; /* The size of RAM code */ -+ u16 Rsvd2; -+ -+ /* --- LONG WORD 2 ---- */ -+ u32 SvnIdx; /* The SVN entry index */ -+ u32 Rsvd3; -+ -+ /* --- LONG WORD 3 ---- */ -+ u32 Rsvd4; -+ u32 Rsvd5; -+} RT_8723B_FIRMWARE_HDR, *PRT_8723B_FIRMWARE_HDR; -+ -+#define DRIVER_EARLY_INT_TIME_8723B 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8723B 0x02 -+ -+/* for 8723B -+ * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ -+#define PAGE_SIZE_TX_8723B 128 -+#define PAGE_SIZE_RX_8723B 8 -+ -+#define TX_DMA_SIZE_8723B 0x8000 /* 32K(TX) */ -+#define RX_DMA_SIZE_8723B 0x4000 /* 16K(RX) */ -+ -+#ifdef CONFIG_WOWLAN -+ #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -+#else -+ #define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8723B 0x100 /* 256B, reserved for c2h debug message */ -+#else -+ #define RX_DMA_RESERVED_SIZE_8723B 0x80 /* 128B, reserved for tx report */ -+#endif -+#define RX_DMA_BOUNDARY_8723B (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B - 1) -+ -+ -+/* Note: We will divide number of page equally for each queue other than public queue! */ -+ -+/* For General Reserved Page Number(Beacon Queue is reserved page) -+ * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8723B -+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -+#define BCNQ_PAGE_NUM_8723B (MAX_BEACON_LEN / PAGE_SIZE_TX_8723B + 6) /*0x08*/ -+ -+ -+/* For WoWLan , more reserved page -+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6 -+ * NS offload: 2 NDP info: 1 -+ */ -+#ifdef CONFIG_WOWLAN -+ #define WOWLAN_PAGE_NUM_8723B 0x0b -+#else -+ #define WOWLAN_PAGE_NUM_8723B 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+ #undef WOWLAN_PAGE_NUM_8723B -+ #define WOWLAN_PAGE_NUM_8723B 0x15 -+#endif -+ -+#ifdef CONFIG_AP_WOWLAN -+ #define AP_WOWLAN_PAGE_NUM_8723B 0x02 -+#endif -+ -+#define TX_TOTAL_PAGE_NUMBER_8723B (0xFF - BCNQ_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B) -+#define TX_PAGE_BOUNDARY_8723B (TX_TOTAL_PAGE_NUMBER_8723B + 1) -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B TX_TOTAL_PAGE_NUMBER_8723B -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8723B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B + 1) -+ -+/* For Normal Chip Setting -+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B */ -+#define NORMAL_PAGE_NUM_HPQ_8723B 0x0C -+#define NORMAL_PAGE_NUM_LPQ_8723B 0x02 -+#define NORMAL_PAGE_NUM_NPQ_8723B 0x02 -+#define NORMAL_PAGE_NUM_EPQ_8723B 0x04 -+ -+/* Note: For Normal Chip Setting, modify later */ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8723B 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8723B 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8723B 0x20 -+#define WMM_NORMAL_PAGE_NUM_EPQ_8723B 0x00 -+ -+ -+#include "HalVerDef.h" -+#include "hal_com.h" -+ -+#define EFUSE_OOB_PROTECT_BYTES 15 -+ -+#define HAL_EFUSE_MEMORY -+ -+#define HWSET_MAX_SIZE_8723B 512 -+#define EFUSE_REAL_CONTENT_LEN_8723B 512 -+#define EFUSE_MAP_LEN_8723B 512 -+#define EFUSE_MAX_SECTION_8723B 64 -+ -+#define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723B) -+ -+#define EFUSE_ACCESS_ON 0x69 /* For RTL8723 only. */ -+#define EFUSE_ACCESS_OFF 0x00 /* For RTL8723 only. */ -+ -+/* ******************************************************** -+ * EFUSE for BT definition -+ * ******************************************************** */ -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 -+#define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */ -+#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -+#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ -+ -+#define EFUSE_PROTECT_BYTES_BANK 16 -+ -+typedef enum tag_Package_Definition { -+ PACKAGE_DEFAULT, -+ PACKAGE_QFN68, -+ PACKAGE_TFBGA90, -+ PACKAGE_TFBGA80, -+ PACKAGE_TFBGA79 -+} PACKAGE_TYPE_E; -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+/* rtl8723a_hal_init.c */ -+s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -+void rtl8723b_FirmwareSelfReset(PADAPTER padapter); -+void rtl8723b_InitializeFirmwareVars(PADAPTER padapter); -+ -+void rtl8723b_InitAntenna_Selection(PADAPTER padapter); -+void rtl8723b_DeinitAntenna_Selection(PADAPTER padapter); -+void rtl8723b_CheckAntenna_Selection(PADAPTER padapter); -+void rtl8723b_init_default_value(PADAPTER padapter); -+ -+s32 rtl8723b_InitLLTTable(PADAPTER padapter); -+ -+s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -+s32 CardDisableWithoutHWSM(PADAPTER padapter); -+ -+/* EFuse */ -+u8 GetEEPROMSize8723B(PADAPTER padapter); -+void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -+void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -+void Hal_EfuseParseTxPowerInfo_8723B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBTCoexistInfo_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseEEPROMVer_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseChnlPlan_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseCustomerID_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseAntennaDiversity_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8723B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseThermalMeter_8723B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParsePackageType_8723B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseVoltage_8723B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBoardType_8723B(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+ -+void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8723b(_adapter *adapter); -+u8 SetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); -+u8 SetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+ -+/* register */ -+void rtl8723b_InitBeaconParameters(PADAPTER padapter); -+void rtl8723b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -+void _InitBurstPktLen_8723BS(PADAPTER Adapter); -+void _8051Reset8723(PADAPTER padapter); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+ void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif /* CONFIG_WOWLAN */ -+ -+void rtl8723b_start_thread(_adapter *padapter); -+void rtl8723b_stop_thread(_adapter *padapter); -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+ void rtl8723bs_init_checkbthang_workqueue(_adapter *adapter); -+ void rtl8723bs_free_checkbthang_workqueue(_adapter *adapter); -+ void rtl8723bs_cancle_checkbthang_workqueue(_adapter *adapter); -+ void rtl8723bs_hal_check_bt_hang(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -+#endif -+#ifdef CONFIG_MP_INCLUDED -+int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -+#endif -+void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len); -+ -+u8 MRateToHwRate8723B(u8 rate); -+u8 HwRateToMRate8723B(u8 rate); -+ -+#ifdef CONFIG_RF_POWER_TRIM -+ void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+#endif /*CONFIG_RF_POWER_TRIM*/ -+ -+#ifdef CONFIG_PCI_HCI -+ BOOLEAN InterruptRecognized8723BE(PADAPTER Adapter); -+ void UpdateInterruptMask8723BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+#endif -+ -+#ifdef CONFIG_GPIO_API -+int rtl8723b_GpioFuncCheck(PADAPTER adapter, u8 gpio_num); -+void rtl8723b_GpioMultiFuncReset(PADAPTER adapter, u8 gpio_num); -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723b_led.h b/drivers/staging/rtl8723cs/include/rtl8723b_led.h -new file mode 100644 -index 000000000000..6b772cceb7ec ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723b_led.h -@@ -0,0 +1,44 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723B_LED_H__ -+#define __RTL8723B_LED_H__ -+ -+#include -+#include -+#include -+ -+#ifdef CONFIG_RTW_SW_LED -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+#ifdef CONFIG_USB_HCI -+ void rtl8723bu_InitSwLeds(PADAPTER padapter); -+ void rtl8723bu_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+ void rtl8723bs_InitSwLeds(PADAPTER padapter); -+ void rtl8723bs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_GSPI_HCI -+ void rtl8723bs_InitSwLeds(PADAPTER padapter); -+ void rtl8723bs_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+ void rtl8723be_InitSwLeds(PADAPTER padapter); -+ void rtl8723be_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif -+#endif/*CONFIG_RTW_SW_LED*/ -diff --git a/drivers/staging/rtl8723cs/include/rtl8723b_recv.h b/drivers/staging/rtl8723cs/include/rtl8723b_recv.h -new file mode 100644 -index 000000000000..5e92713a5522 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723b_recv.h -@@ -0,0 +1,82 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723B_RECV_H__ -+#define __RTL8723B_RECV_H__ -+ -+#define RECV_BLK_SZ 512 -+#define RECV_BLK_CNT 16 -+#define RECV_BLK_TH RECV_BLK_CNT -+ -+#if defined(CONFIG_USB_HCI) -+ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ -+ /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ -+ /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ -+ #ifdef CONFIG_PLATFORM_MSTAR -+ #define MAX_RECVBUF_SZ (8192) /* 8K */ -+ #else -+ #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ -+ #endif -+ /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ -+ #else -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+#elif defined(CONFIG_PCI_HCI) -+ /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ -+ /* #define MAX_RECVBUF_SZ (9100) */ -+ /* #else */ -+ #define MAX_RECVBUF_SZ (4000) /* about 4K -+ * #endif */ -+ -+ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ -+ #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B) -+ -+#endif -+ -+/* Rx smooth factor */ -+#define Rx_Smooth_Factor (20) -+ -+#ifdef CONFIG_SDIO_HCI -+ #ifndef CONFIG_SDIO_RX_COPY -+ #undef MAX_RECVBUF_SZ -+ #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B) -+ #endif /* !CONFIG_SDIO_RX_COPY */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8723bs_init_recv_priv(PADAPTER padapter); -+ void rtl8723bs_free_recv_priv(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ int rtl8723bu_init_recv_priv(_adapter *padapter); -+ void rtl8723bu_free_recv_priv(_adapter *padapter); -+ void rtl8723bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8723be_init_recv_priv(PADAPTER padapter); -+ void rtl8723be_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8723b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8723B_RECV_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8723b_rf.h b/drivers/staging/rtl8723cs/include/rtl8723b_rf.h -new file mode 100644 -index 000000000000..040c16647f33 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723b_rf.h -@@ -0,0 +1,25 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723B_RF_H__ -+#define __RTL8723B_RF_H__ -+ -+int PHY_RF6052_Config8723B(PADAPTER Adapter); -+ -+void -+PHY_RF6052SetBandwidth8723B( -+ PADAPTER Adapter, -+ enum channel_width Bandwidth); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723b_spec.h b/drivers/staging/rtl8723cs/include/rtl8723b_spec.h -new file mode 100644 -index 000000000000..b0fb4aa41d17 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723b_spec.h -@@ -0,0 +1,280 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723B_SPEC_H__ -+#define __RTL8723B_SPEC_H__ -+ -+#include -+ -+ -+#define HAL_NAV_UPPER_UNIT_8723B 128 /* micro-second */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0000h ~ 0x00FFh System Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RSV_CTRL_8723B 0x001C /* 3 Byte */ -+#define REG_BT_WIFI_ANTENNA_SWITCH_8723B 0x0038 -+#define REG_HSISR_8723B 0x005c -+#define REG_PAD_CTRL1_8723B 0x0064 -+#define REG_AFE_CTRL_4_8723B 0x0078 -+#define REG_HMEBOX_DBG_0_8723B 0x0088 -+#define REG_HMEBOX_DBG_1_8723B 0x008A -+#define REG_HMEBOX_DBG_2_8723B 0x008C -+#define REG_HMEBOX_DBG_3_8723B 0x008E -+#define REG_HIMR0_8723B 0x00B0 -+#define REG_HISR0_8723B 0x00B4 -+#define REG_HIMR1_8723B 0x00B8 -+#define REG_HISR1_8723B 0x00BC -+#define REG_PMC_DBG_CTRL2_8723B 0x00CC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_C2HEVT_CMD_ID_8723B 0x01A0 -+#define REG_C2HEVT_CMD_LEN_8723B 0x01AE -+#define REG_WOWLAN_WAKE_REASON 0x01C7 -+#define REG_WOWLAN_GTK_DBG1 0x630 -+#define REG_WOWLAN_GTK_DBG2 0x634 -+ -+#define REG_HMEBOX_EXT0_8723B 0x01F0 -+#define REG_HMEBOX_EXT1_8723B 0x01F4 -+#define REG_HMEBOX_EXT2_8723B 0x01F8 -+#define REG_HMEBOX_EXT3_8723B 0x01FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RXDMA_CONTROL_8723B 0x0286 /* Control the RX DMA. */ -+#define REG_RXDMA_MODE_CTRL_8723B 0x0290 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0300h ~ 0x03FFh PCIe -+ * -+ * ----------------------------------------------------- */ -+#define REG_PCIE_CTRL_REG_8723B 0x0300 -+#define REG_INT_MIG_8723B 0x0304 /* Interrupt Migration */ -+#define REG_BCNQ_DESA_8723B 0x0308 /* TX Beacon Descriptor Address */ -+#define REG_HQ_DESA_8723B 0x0310 /* TX High Queue Descriptor Address */ -+#define REG_MGQ_DESA_8723B 0x0318 /* TX Manage Queue Descriptor Address */ -+#define REG_VOQ_DESA_8723B 0x0320 /* TX VO Queue Descriptor Address */ -+#define REG_VIQ_DESA_8723B 0x0328 /* TX VI Queue Descriptor Address */ -+#define REG_BEQ_DESA_8723B 0x0330 /* TX BE Queue Descriptor Address */ -+#define REG_BKQ_DESA_8723B 0x0338 /* TX BK Queue Descriptor Address */ -+#define REG_RX_DESA_8723B 0x0340 /* RX Queue Descriptor Address */ -+#define REG_DBI_WDATA_8723B 0x0348 /* DBI Write Data */ -+#define REG_DBI_RDATA_8723B 0x034C /* DBI Read Data */ -+#define REG_DBI_ADDR_8723B 0x0350 /* DBI Address */ -+#define REG_DBI_FLAG_8723B 0x0352 /* DBI Read/Write Flag */ -+#define REG_MDIO_WDATA_8723B 0x0354 /* MDIO for Write PCIE PHY */ -+#define REG_MDIO_RDATA_8723B 0x0356 /* MDIO for Reads PCIE PHY */ -+#define REG_MDIO_CTL_8723B 0x0358 /* MDIO for Control */ -+#define REG_DBG_SEL_8723B 0x0360 /* Debug Selection Register */ -+#define REG_PCIE_HRPWM_8723B 0x0361 /* PCIe RPWM */ -+#define REG_PCIE_HCPWM_8723B 0x0363 /* PCIe CPWM */ -+#define REG_PCIE_MULTIFET_CTRL_8723B 0x036A /* PCIE Multi-Fethc Control */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424 -+#define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425 -+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D -+#ifdef CONFIG_WOWLAN -+ #define REG_TXPKTBUF_IV_LOW 0x0484 -+ #define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_AMPDU_BURST_MODE_8723B 0x04BC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_SECONDARY_CCA_CTRL_8723B 0x0577 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+ -+/* ************************************************************ -+ * SDIO Bus Specification -+ * ************************************************************ */ -+ -+/* ----------------------------------------------------- -+ * SDIO CMD Address Mapping -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * I/O bus domain (Host) -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * SDIO register -+ * ----------------------------------------------------- */ -+#define SDIO_REG_HCPWM1_8723B 0x025 /* HCI Current Power Mode 1 */ -+ -+ -+/* **************************************************************************** -+ * 8723 Regsiter Bit and Content definition -+ * **************************************************************************** */ -+ -+/* 2 HSISR -+ * interrupt mask which needs to clear */ -+#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ -+ HSISR_SPS_OCP_INT |\ -+ HSISR_RON_INT |\ -+ HSISR_PDNINT |\ -+ HSISR_GPIO9_INT) -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+#undef IS_E_CUT -+#define IS_E_CUT(version) FALSE -+#undef IS_F_CUT -+#define IS_F_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? TRUE : FALSE) -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define BIT_USB_RXDMA_AGG_EN BIT(31) -+#define RXDMA_AGG_MODE_EN BIT(1) -+ -+#ifdef CONFIG_WOWLAN -+ #define RXPKT_RELEASE_POLL BIT(16) -+ #define RXDMA_IDLE BIT(17) -+ #define RW_RELEASE_EN BIT(18) -+#endif -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ---------------------------------------------------------------------------- -+ * 8723B REG_CCK_CHECK (offset 0x454) -+ * ---------------------------------------------------------------------------- */ -+#define BIT_BCN_PORT_SEL BIT(5) -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+#ifdef CONFIG_RF_POWER_TRIM -+ -+ #ifdef CONFIG_RTL8723B -+ #define EEPROM_RF_GAIN_OFFSET 0xC1 -+ #endif -+ -+ #define EEPROM_RF_GAIN_VAL 0x1F6 -+#endif /*CONFIG_RF_POWER_TRIM*/ -+ -+ -+/* ---------------------------------------------------------------------------- -+ * 8195 IMR/ISR bits (offset 0xB0, 8bits) -+ * ---------------------------------------------------------------------------- */ -+#define IMR_DISABLED_8723B 0 -+/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -+#define IMR_TIMER2_8723B BIT(31) /* Timeout interrupt 2 */ -+#define IMR_TIMER1_8723B BIT(30) /* Timeout interrupt 1 */ -+#define IMR_PSTIMEOUT_8723B BIT(29) /* Power Save Time Out Interrupt */ -+#define IMR_GTINT4_8723B BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -+#define IMR_GTINT3_8723B BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -+#define IMR_TXBCN0ERR_8723B BIT(26) /* Transmit Beacon0 Error */ -+#define IMR_TXBCN0OK_8723B BIT(25) /* Transmit Beacon0 OK */ -+#define IMR_TSF_BIT32_TOGGLE_8723B BIT(24) /* TSF Timer BIT(32) toggle indication interrupt */ -+#define IMR_BCNDMAINT0_8723B BIT(20) /* Beacon DMA Interrupt 0 */ -+#define IMR_BCNDERR0_8723B BIT(16) /* Beacon Queue DMA OK0 */ -+#define IMR_HSISR_IND_ON_INT_8723B BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -+#define IMR_BCNDMAINT_E_8723B BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -+#define IMR_ATIMEND_8723B BIT(12) /* CTWidnow End or ATIM Window End */ -+#define IMR_C2HCMD_8723B BIT(10) /* CPU to Host Command INT Status, Write 1 clear */ -+#define IMR_CPWM2_8723B BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_CPWM_8723B BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_HIGHDOK_8723B BIT(7) /* High Queue DMA OK */ -+#define IMR_MGNTDOK_8723B BIT(6) /* Management Queue DMA OK */ -+#define IMR_BKDOK_8723B BIT(5) /* AC_BK DMA OK */ -+#define IMR_BEDOK_8723B BIT(4) /* AC_BE DMA OK */ -+#define IMR_VIDOK_8723B BIT(3) /* AC_VI DMA OK */ -+#define IMR_VODOK_8723B BIT(2) /* AC_VO DMA OK */ -+#define IMR_RDU_8723B BIT(1) /* Rx Descriptor Unavailable */ -+#define IMR_ROK_8723B BIT(0) /* Receive DMA OK */ -+ -+/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -+#define IMR_BCNDMAINT7_8723B BIT(27) /* Beacon DMA Interrupt 7 */ -+#define IMR_BCNDMAINT6_8723B BIT(26) /* Beacon DMA Interrupt 6 */ -+#define IMR_BCNDMAINT5_8723B BIT(25) /* Beacon DMA Interrupt 5 */ -+#define IMR_BCNDMAINT4_8723B BIT(24) /* Beacon DMA Interrupt 4 */ -+#define IMR_BCNDMAINT3_8723B BIT(23) /* Beacon DMA Interrupt 3 */ -+#define IMR_BCNDMAINT2_8723B BIT(22) /* Beacon DMA Interrupt 2 */ -+#define IMR_BCNDMAINT1_8723B BIT(21) /* Beacon DMA Interrupt 1 */ -+#define IMR_BCNDOK7_8723B BIT(20) /* Beacon Queue DMA OK Interrupt 7 */ -+#define IMR_BCNDOK6_8723B BIT(19) /* Beacon Queue DMA OK Interrupt 6 */ -+#define IMR_BCNDOK5_8723B BIT(18) /* Beacon Queue DMA OK Interrupt 5 */ -+#define IMR_BCNDOK4_8723B BIT(17) /* Beacon Queue DMA OK Interrupt 4 */ -+#define IMR_BCNDOK3_8723B BIT(16) /* Beacon Queue DMA OK Interrupt 3 */ -+#define IMR_BCNDOK2_8723B BIT(15) /* Beacon Queue DMA OK Interrupt 2 */ -+#define IMR_BCNDOK1_8723B BIT(14) /* Beacon Queue DMA OK Interrupt 1 */ -+#define IMR_ATIMEND_E_8723B BIT(13) /* ATIM Window End Extension for Win7 */ -+#define IMR_TXERR_8723B BIT(11) /* Tx Error Flag Interrupt Status, write 1 clear. */ -+#define IMR_RXERR_8723B BIT(10) /* Rx Error Flag INT Status, Write 1 clear */ -+#define IMR_TXFOVW_8723B BIT(9) /* Transmit FIFO Overflow */ -+#define IMR_RXFOVW_8723B BIT(8) /* Receive FIFO Overflow */ -+ -+#ifdef CONFIG_PCI_HCI -+ /* #define IMR_RX_MASK (IMR_ROK_8723B|IMR_RDU_8723B|IMR_RXFOVW_8723B) */ -+ #define IMR_TX_MASK (IMR_VODOK_8723B | IMR_VIDOK_8723B | IMR_BEDOK_8723B | IMR_BKDOK_8723B | IMR_MGNTDOK_8723B | IMR_HIGHDOK_8723B) -+ -+ #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8723B | IMR_TXBCN0OK_8723B | IMR_TXBCN0ERR_8723B | IMR_BCNDERR0_8723B) -+ -+ #define RT_AC_INT_MASKS (IMR_VIDOK_8723B | IMR_VODOK_8723B | IMR_BEDOK_8723B | IMR_BKDOK_8723B) -+#endif -+ -+#endif /* __RTL8723B_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8723b_sreset.h b/drivers/staging/rtl8723cs/include/rtl8723b_sreset.h -new file mode 100644 -index 000000000000..c97f2648ac60 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723b_sreset.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8723B_SRESET_H_ -+#define _RTL8723B_SRESET_H_ -+ -+#include -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ extern void rtl8723b_sreset_xmit_status_check(_adapter *padapter); -+ extern void rtl8723b_sreset_linked_status_check(_adapter *padapter); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723b_xmit.h b/drivers/staging/rtl8723cs/include/rtl8723b_xmit.h -new file mode 100644 -index 000000000000..51691e931c67 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723b_xmit.h -@@ -0,0 +1,342 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723B_XMIT_H__ -+#define __RTL8723B_XMIT_H__ -+ -+ -+#define MAX_TID (15) -+ -+ -+#ifndef __INC_HAL8723BDESC_H -+ #define __INC_HAL8723BDESC_H -+ -+ #define RX_STATUS_DESC_SIZE_8723B 24 -+ #define RX_DRV_INFO_SIZE_UNIT_8723B 8 -+ -+ -+ /* DWORD 0 */ -+ #define SET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+ #define SET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -+ #define SET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) -+ -+ #define GET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -+ #define GET_RX_STATUS_DESC_CRC32_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+ #define GET_RX_STATUS_DESC_ICV_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+ #define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -+ #define GET_RX_STATUS_DESC_SECURITY_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -+ #define GET_RX_STATUS_DESC_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -+ #define GET_RX_STATUS_DESC_SHIFT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -+ #define GET_RX_STATUS_DESC_PHY_STATUS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -+ #define GET_RX_STATUS_DESC_SWDEC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -+ #define GET_RX_STATUS_DESC_LAST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1) -+ #define GET_RX_STATUS_DESC_FIRST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1) -+ #define GET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -+ #define GET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+ -+ /* DWORD 1 */ -+ #define GET_RX_STATUS_DESC_MACID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+ #define GET_RX_STATUS_DESC_TID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+ #define GET_RX_STATUS_DESC_AMSDU_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+ #define GET_RX_STATUS_DESC_RXID_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -+ #define GET_RX_STATUS_DESC_PAGGR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -+ #define GET_RX_STATUS_DESC_A1_FIT_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -+ #define GET_RX_STATUS_DESC_CHKERR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -+ #define GET_RX_STATUS_DESC_IPVER_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -+ #define GET_RX_STATUS_DESC_IS_TCPUDP__8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -+ #define GET_RX_STATUS_DESC_CHK_VLD_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -+ #define GET_RX_STATUS_DESC_PAM_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -+ #define GET_RX_STATUS_DESC_PWR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -+ #define GET_RX_STATUS_DESC_MORE_DATA_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -+ #define GET_RX_STATUS_DESC_MORE_FRAG_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -+ #define GET_RX_STATUS_DESC_TYPE_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -+ #define GET_RX_STATUS_DESC_MC_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -+ #define GET_RX_STATUS_DESC_BC_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) -+ -+ /* DWORD 2 */ -+ #define GET_RX_STATUS_DESC_SEQ_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -+ #define GET_RX_STATUS_DESC_FRAG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -+ #define GET_RX_STATUS_DESC_RX_IS_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -+ #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -+ #define GET_RX_STATUS_DESC_RPT_SEL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -+ -+ /* DWORD 3 */ -+ #define GET_RX_STATUS_DESC_RX_RATE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -+ #define GET_RX_STATUS_DESC_HTC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -+ #define GET_RX_STATUS_DESC_EOSP_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -+ #define GET_RX_STATUS_DESC_BSSID_FIT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -+ #ifdef CONFIG_USB_RX_AGGREGATION -+ #define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -+ #endif -+ #define GET_RX_STATUS_DESC_PATTERN_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -+ #define GET_RX_STATUS_DESC_UNICAST_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -+ #define GET_RX_STATUS_DESC_MAGIC_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) -+ -+ /* DWORD 6 */ -+ #define GET_RX_STATUS_DESC_SPLCP_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1) -+ #define GET_RX_STATUS_DESC_LDPC_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1) -+ #define GET_RX_STATUS_DESC_STBC_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1) -+ #define GET_RX_STATUS_DESC_BW_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2) -+ -+ /* DWORD 5 */ -+ #define GET_RX_STATUS_DESC_TSFL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) -+ -+ #define GET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+ #define GET_RX_STATUS_DESC_BUFF_ADDR64_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+ #define SET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) -+ -+ -+ /* Dword 0 */ -+ #define GET_TX_DESC_OWN_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+ #define SET_TX_DESC_PKT_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+ #define SET_TX_DESC_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+ #define SET_TX_DESC_BMC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+ #define SET_TX_DESC_HTC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+ #define SET_TX_DESC_LAST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+ #define SET_TX_DESC_FIRST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+ #define SET_TX_DESC_LINIP_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+ #define SET_TX_DESC_NO_ACM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+ #define SET_TX_DESC_GF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+ #define SET_TX_DESC_OWN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+ /* Dword 1 */ -+ #define SET_TX_DESC_MACID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+ #define SET_TX_DESC_QUEUE_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+ #define SET_TX_DESC_RDG_NAV_EXT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+ #define SET_TX_DESC_LSIG_TXOP_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+ #define SET_TX_DESC_PIFS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+ #define SET_TX_DESC_RATE_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+ #define SET_TX_DESC_EN_DESC_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+ #define SET_TX_DESC_SEC_TYPE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+ #define SET_TX_DESC_PKT_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+ -+ -+ /* Dword 2 */ -+ #define SET_TX_DESC_PAID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+ #define SET_TX_DESC_CCA_RTS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+ #define SET_TX_DESC_AGG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+ #define SET_TX_DESC_RDG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+ #define SET_TX_DESC_AGG_BREAK_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+ #define SET_TX_DESC_MORE_FRAG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+ #define SET_TX_DESC_RAW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+ #define SET_TX_DESC_SPE_RPT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+ #define SET_TX_DESC_AMPDU_DENSITY_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+ #define SET_TX_DESC_BT_INT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+ #define SET_TX_DESC_GID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+ -+ -+ /* Dword 3 */ -+ #define SET_TX_DESC_WHEADER_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -+ #define SET_TX_DESC_CHK_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -+ #define SET_TX_DESC_EARLY_MODE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+ #define SET_TX_DESC_HWSEQ_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+ #define SET_TX_DESC_USE_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+ #define SET_TX_DESC_DISABLE_RTS_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+ #define SET_TX_DESC_DISABLE_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+ #define SET_TX_DESC_CTS2SELF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+ #define SET_TX_DESC_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+ #define SET_TX_DESC_HW_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+ #define SET_TX_DESC_NAV_USE_HDR_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+ #define SET_TX_DESC_USE_MAX_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+ #define SET_TX_DESC_MAX_AGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+ #define SET_TX_DESC_NDPA_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+ #define SET_TX_DESC_AMPDU_MAX_TIME_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+ /* Dword 4 */ -+ #define SET_TX_DESC_TX_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+ #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+ #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+ #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+ #define SET_TX_DESC_DATA_RETRY_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+ #define SET_TX_DESC_RTS_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+ -+ -+ /* Dword 5 */ -+ #define SET_TX_DESC_DATA_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+ #define SET_TX_DESC_DATA_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+ #define SET_TX_DESC_DATA_BW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+ #define SET_TX_DESC_DATA_LDPC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+ #define SET_TX_DESC_DATA_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+ #define SET_TX_DESC_CTROL_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+ #define SET_TX_DESC_RTS_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+ #define SET_TX_DESC_RTS_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+ -+ -+ /* Dword 6 */ -+ #define SET_TX_DESC_SW_DEFINE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+ #define SET_TX_DESC_MBSSID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+ #define SET_TX_DESC_ANTSEL_A_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+ #define SET_TX_DESC_ANTSEL_B_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+ #define SET_TX_DESC_ANTSEL_C_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -+ #define SET_TX_DESC_ANTSEL_D_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) -+ -+ /* Dword 7 */ -+ #ifdef CONFIG_PCI_HCI -+ #define SET_TX_DESC_TX_BUFFER_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+ #endif -+ #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) -+ #define SET_TX_DESC_TX_DESC_CHECKSUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+ #endif -+ #define SET_TX_DESC_USB_TXAGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+ #ifdef CONFIG_SDIO_HCI -+ #define SET_TX_DESC_SDIO_TXSEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) -+ #endif -+ -+ /* Dword 8 */ -+ #define SET_TX_DESC_HWSEQ_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+ -+ /* Dword 9 */ -+ #define SET_TX_DESC_SEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+ -+ /* Dword 10 */ -+ #define SET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) -+ #define GET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) -+ -+ /* Dword 11 */ -+ #define SET_TX_DESC_NEXT_DESC_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) -+ -+ -+ #define SET_EARLYMODE_PKTNUM_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+ #define SET_EARLYMODE_LEN0_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+ #define SET_EARLYMODE_LEN1_1_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+ #define SET_EARLYMODE_LEN1_2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+ #define SET_EARLYMODE_LEN2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+ #define SET_EARLYMODE_LEN3_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+#endif -+/* ----------------------------------------------------------- -+ * -+ * Rate -+ * -+ * ----------------------------------------------------------- -+ * CCK Rates, TxHT = 0 */ -+#define DESC8723B_RATE1M 0x00 -+#define DESC8723B_RATE2M 0x01 -+#define DESC8723B_RATE5_5M 0x02 -+#define DESC8723B_RATE11M 0x03 -+ -+/* OFDM Rates, TxHT = 0 */ -+#define DESC8723B_RATE6M 0x04 -+#define DESC8723B_RATE9M 0x05 -+#define DESC8723B_RATE12M 0x06 -+#define DESC8723B_RATE18M 0x07 -+#define DESC8723B_RATE24M 0x08 -+#define DESC8723B_RATE36M 0x09 -+#define DESC8723B_RATE48M 0x0a -+#define DESC8723B_RATE54M 0x0b -+ -+/* MCS Rates, TxHT = 1 */ -+#define DESC8723B_RATEMCS0 0x0c -+#define DESC8723B_RATEMCS1 0x0d -+#define DESC8723B_RATEMCS2 0x0e -+#define DESC8723B_RATEMCS3 0x0f -+#define DESC8723B_RATEMCS4 0x10 -+#define DESC8723B_RATEMCS5 0x11 -+#define DESC8723B_RATEMCS6 0x12 -+#define DESC8723B_RATEMCS7 0x13 -+#define DESC8723B_RATEMCS8 0x14 -+#define DESC8723B_RATEMCS9 0x15 -+#define DESC8723B_RATEMCS10 0x16 -+#define DESC8723B_RATEMCS11 0x17 -+#define DESC8723B_RATEMCS12 0x18 -+#define DESC8723B_RATEMCS13 0x19 -+#define DESC8723B_RATEMCS14 0x1a -+#define DESC8723B_RATEMCS15 0x1b -+#define DESC8723B_RATEVHTSS1MCS0 0x2c -+#define DESC8723B_RATEVHTSS1MCS1 0x2d -+#define DESC8723B_RATEVHTSS1MCS2 0x2e -+#define DESC8723B_RATEVHTSS1MCS3 0x2f -+#define DESC8723B_RATEVHTSS1MCS4 0x30 -+#define DESC8723B_RATEVHTSS1MCS5 0x31 -+#define DESC8723B_RATEVHTSS1MCS6 0x32 -+#define DESC8723B_RATEVHTSS1MCS7 0x33 -+#define DESC8723B_RATEVHTSS1MCS8 0x34 -+#define DESC8723B_RATEVHTSS1MCS9 0x35 -+#define DESC8723B_RATEVHTSS2MCS0 0x36 -+#define DESC8723B_RATEVHTSS2MCS1 0x37 -+#define DESC8723B_RATEVHTSS2MCS2 0x38 -+#define DESC8723B_RATEVHTSS2MCS3 0x39 -+#define DESC8723B_RATEVHTSS2MCS4 0x3a -+#define DESC8723B_RATEVHTSS2MCS5 0x3b -+#define DESC8723B_RATEVHTSS2MCS6 0x3c -+#define DESC8723B_RATEVHTSS2MCS7 0x3d -+#define DESC8723B_RATEVHTSS2MCS8 0x3e -+#define DESC8723B_RATEVHTSS2MCS9 0x3f -+ -+ -+#define RX_HAL_IS_CCK_RATE_8723B(pDesc)\ -+ (GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE2M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE5_5M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE11M) -+ -+ -+void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -+void rtl8723b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8723bs_init_xmit_priv(PADAPTER padapter); -+ void rtl8723bs_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8723bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8723bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8723bs_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8723bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8723bs_xmit_buf_handler(PADAPTER padapter); -+ thread_return rtl8723bs_xmit_thread(thread_context context); -+ #define hal_xmit_handler rtl8723bs_xmit_buf_handler -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ s32 rtl8723bu_xmit_buf_handler(PADAPTER padapter); -+ #define hal_xmit_handler rtl8723bu_xmit_buf_handler -+ -+ -+ s32 rtl8723bu_init_xmit_priv(PADAPTER padapter); -+ void rtl8723bu_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8723bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8723bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8723bu_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8723bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ /* s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); */ -+ void rtl8723bu_xmit_tasklet(void *priv); -+ s32 rtl8723bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+ void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8723be_init_xmit_priv(PADAPTER padapter); -+ void rtl8723be_free_xmit_priv(PADAPTER padapter); -+ struct xmit_buf *rtl8723be_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+ void rtl8723be_xmitframe_resume(_adapter *padapter); -+ s32 rtl8723be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8723be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8723be_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8723be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ void rtl8723be_xmit_tasklet(void *priv); -+#endif -+ -+u8 BWMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); -+u8 SCMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723d_cmd.h b/drivers/staging/rtl8723cs/include/rtl8723d_cmd.h -new file mode 100644 -index 000000000000..9c65b4b9e039 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723d_cmd.h -@@ -0,0 +1,183 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723D_CMD_H__ -+#define __RTL8723D_CMD_H__ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+enum h2c_cmd_8723D { -+ /* Common Class: 000 */ -+ H2C_8723D_RSVD_PAGE = 0x00, -+ H2C_8723D_MEDIA_STATUS_RPT = 0x01, -+ H2C_8723D_SCAN_ENABLE = 0x02, -+ H2C_8723D_KEEP_ALIVE = 0x03, -+ H2C_8723D_DISCON_DECISION = 0x04, -+ H2C_8723D_PSD_OFFLOAD = 0x05, -+ H2C_8723D_AP_OFFLOAD = 0x08, -+ H2C_8723D_BCN_RSVDPAGE = 0x09, -+ H2C_8723D_PROBERSP_RSVDPAGE = 0x0A, -+ H2C_8723D_FCS_RSVDPAGE = 0x10, -+ H2C_8723D_FCS_INFO = 0x11, -+ H2C_8723D_AP_WOW_GPIO_CTRL = 0x13, -+ -+ /* PoweSave Class: 001 */ -+ H2C_8723D_SET_PWR_MODE = 0x20, -+ H2C_8723D_PS_TUNING_PARA = 0x21, -+ H2C_8723D_PS_TUNING_PARA2 = 0x22, -+ H2C_8723D_P2P_LPS_PARAM = 0x23, -+ H2C_8723D_P2P_PS_OFFLOAD = 0x24, -+ H2C_8723D_PS_SCAN_ENABLE = 0x25, -+ H2C_8723D_SAP_PS_ = 0x26, -+ H2C_8723D_INACTIVE_PS_ = 0x27, /* Inactive_PS */ -+ H2C_8723D_FWLPS_IN_IPS_ = 0x28, -+ -+ /* Dynamic Mechanism Class: 010 */ -+ H2C_8723D_MACID_CFG = 0x40, -+ H2C_8723D_TXBF = 0x41, -+ H2C_8723D_RSSI_SETTING = 0x42, -+ H2C_8723D_AP_REQ_TXRPT = 0x43, -+ H2C_8723D_INIT_RATE_COLLECT = 0x44, -+ H2C_8723D_RA_PARA_ADJUST = 0x46, -+ -+ /* BT Class: 011 */ -+ H2C_8723D_B_TYPE_TDMA = 0x60, -+ H2C_8723D_BT_INFO = 0x61, -+ H2C_8723D_FORCE_BT_TXPWR = 0x62, -+ H2C_8723D_BT_IGNORE_WLANACT = 0x63, -+ H2C_8723D_DAC_SWING_VALUE = 0x64, -+ H2C_8723D_ANT_SEL_RSV = 0x65, -+ H2C_8723D_WL_OPMODE = 0x66, -+ H2C_8723D_BT_MP_OPER = 0x67, -+ H2C_8723D_BT_CONTROL = 0x68, -+ H2C_8723D_BT_WIFI_CTRL = 0x69, -+ H2C_8723D_BT_FW_PATCH = 0x6A, -+ H2C_8723D_BT_WLAN_CALIBRATION = 0x6D, -+ -+ /* WOWLAN Class: 100 */ -+ H2C_8723D_WOWLAN = 0x80, -+ H2C_8723D_REMOTE_WAKE_CTRL = 0x81, -+ H2C_8723D_AOAC_GLOBAL_INFO = 0x82, -+ H2C_8723D_AOAC_RSVD_PAGE = 0x83, -+ H2C_8723D_AOAC_RSVD_PAGE2 = 0x84, -+ H2C_8723D_D0_SCAN_OFFLOAD_CTRL = 0x85, -+ H2C_8723D_D0_SCAN_OFFLOAD_INFO = 0x86, -+ H2C_8723D_CHNL_SWITCH_OFFLOAD = 0x87, -+ H2C_8723D_P2P_OFFLOAD_RSVD_PAGE = 0x8A, -+ H2C_8723D_P2P_OFFLOAD = 0x8B, -+ -+ H2C_8723D_RESET_TSF = 0xC0, -+ H2C_8723D_MAXID, -+}; -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- -+ * _RSVDPAGE_LOC_CMD_0x00 */ -+#define SET_8723D_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723D_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8723D_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8723D_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8723D_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+/* _PWR_MOD_CMD_0x20 */ -+#define SET_8723D_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723D_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_8723D_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_8723D_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8723D_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8723D_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -+#define SET_8723D_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+#define GET_8723D_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) -+ -+/* _PS_TUNE_PARAM_CMD_0x21 */ -+#define SET_8723D_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723D_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8723D_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -+#define SET_8723D_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -+#define SET_8723D_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _MACID_CFG_CMD_0x40 */ -+#define SET_8723D_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -+#define SET_8723D_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) -+ -+/* _RSSI_SETTING_CMD_0x42 */ -+#define SET_8723D_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723D_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -+#define SET_8723D_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+ -+/* _AP_REQ_TXRPT_CMD_0x43 */ -+#define SET_8723D_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8723D_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+ -+/* _FORCE_BT_TXPWR_CMD_0x62 */ -+#define SET_8723D_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+ -+/* _FORCE_BT_MP_OPER_CMD_0x67 */ -+#define SET_8723D_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -+#define SET_8723D_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -+#define SET_8723D_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -+#define SET_8723D_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -+#define SET_8723D_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -+#define SET_8723D_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -+ -+/* _BT_FW_PATCH_0x6A */ -+#define SET_8723D_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) -+#define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+#define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ------------------------------------------- Structure -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+ -+/* --------------------------------------------------------------------------------------------------------- -+ * ---------------------------------- Function Statement -------------------------------------------------- -+ * --------------------------------------------------------------------------------------------------------- */ -+ -+/* host message to firmware cmd */ -+void rtl8723d_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -+void rtl8723d_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -+/* s32 rtl8723d_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -+void rtl8723d_set_FwPsTuneParam_cmd(PADAPTER padapter); -+void rtl8723d_download_rsvd_page(PADAPTER padapter, u8 mstatus); -+#ifdef CONFIG_BT_COEXIST -+ void rtl8723d_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -+#endif /* CONFIG_BT_COEXIST */ -+#ifdef CONFIG_P2P -+ void rtl8723d_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_P2P_WOWLAN -+ void rtl8723d_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -+#endif -+ -+s32 FillH2CCmd8723D(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+u8 GetTxBufferRsvdPageNum8723D(_adapter *padapter, bool wowlan); -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723d_dm.h b/drivers/staging/rtl8723cs/include/rtl8723d_dm.h -new file mode 100644 -index 000000000000..0612f0620e79 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723d_dm.h -@@ -0,0 +1,39 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723D_DM_H__ -+#define __RTL8723D_DM_H__ -+/* ************************************************************ -+ * Description: -+ * -+ * This file is for 8723D dynamic mechanism only -+ * -+ * -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * structure and define -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * function prototype -+ * ************************************************************ */ -+ -+void rtl8723d_init_dm_priv(PADAPTER padapter); -+void rtl8723d_deinit_dm_priv(PADAPTER padapter); -+ -+void rtl8723d_InitHalDm(PADAPTER padapter); -+void rtl8723d_HalDmWatchDog(PADAPTER padapter); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723d_hal.h b/drivers/staging/rtl8723cs/include/rtl8723d_hal.h -new file mode 100644 -index 000000000000..d18e9abc9973 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723d_hal.h -@@ -0,0 +1,303 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723D_HAL_H__ -+#define __RTL8723D_HAL_H__ -+ -+#include "hal_data.h" -+ -+#include "rtl8723d_spec.h" -+#include "rtl8723d_rf.h" -+#include "rtl8723d_dm.h" -+#include "rtl8723d_recv.h" -+#include "rtl8723d_xmit.h" -+#include "rtl8723d_cmd.h" -+#include "rtl8723d_led.h" -+#include "Hal8723DPwrSeq.h" -+#include "Hal8723DPhyReg.h" -+#include "Hal8723DPhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+ #include "rtl8723d_sreset.h" -+#endif -+#ifdef CONFIG_LPS_POFF -+ #include "rtl8723d_lps_poff.h" -+#endif -+ -+#define FW_8723D_SIZE 0x8000 -+#define FW_8723D_START_ADDRESS 0x1000 -+#define FW_8723D_END_ADDRESS 0x1FFF /* 0x5FFF */ -+ -+#define IS_FW_HEADER_EXIST_8723D(_pFwHdr)\ -+ ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x23D0) -+ -+typedef struct _RT_FIRMWARE { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[FW_8723D_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8723D, *PRT_FIRMWARE_8723D; -+ -+/* -+ * This structure must be cared byte-ordering -+ * -+ * Added by tynli. 2009.12.04. */ -+typedef struct _RT_8723D_FIRMWARE_HDR { -+ /* 8-byte alinment required */ -+ -+ /* --- LONG WORD 0 ---- */ -+ u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ -+ u8 Category; /* AP/NIC and USB/PCI */ -+ u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -+ u16 Version; /* FW Version */ -+ u16 Subversion; /* FW Subversion, default 0x00 */ -+ -+ /* --- LONG WORD 1 ---- */ -+ u8 Month; /* Release time Month field */ -+ u8 Date; /* Release time Date field */ -+ u8 Hour; /* Release time Hour field */ -+ u8 Minute; /* Release time Minute field */ -+ u16 RamCodeSize; /* The size of RAM code */ -+ u16 Rsvd2; -+ -+ /* --- LONG WORD 2 ---- */ -+ u32 SvnIdx; /* The SVN entry index */ -+ u32 Rsvd3; -+ -+ /* --- LONG WORD 3 ---- */ -+ u32 Rsvd4; -+ u32 Rsvd5; -+} RT_8723D_FIRMWARE_HDR, *PRT_8723D_FIRMWARE_HDR; -+ -+#define DRIVER_EARLY_INT_TIME_8723D 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8723D 0x02 -+ -+/* for 8723D -+ * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ -+#define PAGE_SIZE_TX_8723D 128 -+#define PAGE_SIZE_RX_8723D 8 -+ -+#define TX_DMA_SIZE_8723D 0x8000 /* 32K(TX) */ -+#define RX_DMA_SIZE_8723D 0x4000 /* 16K(RX) */ -+ -+#ifdef CONFIG_WOWLAN -+ #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -+#else -+ #define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8723D 0x100 /* 256B, reserved for c2h debug message */ -+#else -+ #define RX_DMA_RESERVED_SIZE_8723D 0x80 /* 128B, reserved for tx report */ -+#endif -+#define RX_DMA_BOUNDARY_8723D\ -+ (RX_DMA_SIZE_8723D - RX_DMA_RESERVED_SIZE_8723D - 1) -+ -+ -+/* Note: We will divide number of page equally for each queue other than public queue! */ -+ -+/* For General Reserved Page Number(Beacon Queue is reserved page) -+ * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8723D -+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -+ -+#define BCNQ_PAGE_NUM_8723D (MAX_BEACON_LEN/PAGE_SIZE_TX_8723D + 6) /*0x08*/ -+ -+/* For WoWLan , more reserved page -+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 -+ * NS offload: 2 NDP info: 1 -+ */ -+#ifdef CONFIG_WOWLAN -+ #define WOWLAN_PAGE_NUM_8723D 0x0b -+#else -+ #define WOWLAN_PAGE_NUM_8723D 0x00 -+#endif -+ -+#ifdef CONFIG_PNO_SUPPORT -+ #undef WOWLAN_PAGE_NUM_8723D -+ #define WOWLAN_PAGE_NUM_8723D 0x15 -+#endif -+ -+#ifdef CONFIG_AP_WOWLAN -+ #define AP_WOWLAN_PAGE_NUM_8723D 0x02 -+#endif -+ -+#define TX_TOTAL_PAGE_NUMBER_8723D\ -+ (0xFF - BCNQ_PAGE_NUM_8723D - WOWLAN_PAGE_NUM_8723D) -+#define TX_PAGE_BOUNDARY_8723D (TX_TOTAL_PAGE_NUMBER_8723D + 1) -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723D TX_TOTAL_PAGE_NUMBER_8723D -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8723D\ -+ (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723D + 1) -+ -+/* For Normal Chip Setting -+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723D */ -+#define NORMAL_PAGE_NUM_HPQ_8723D 0x0C -+#define NORMAL_PAGE_NUM_LPQ_8723D 0x02 -+#define NORMAL_PAGE_NUM_NPQ_8723D 0x02 -+#define NORMAL_PAGE_NUM_EPQ_8723D 0x04 -+ -+/* Note: For Normal Chip Setting, modify later */ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8723D 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8723D 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8723D 0x20 -+#define WMM_NORMAL_PAGE_NUM_EPQ_8723D 0x00 -+ -+ -+#include "HalVerDef.h" -+#include "hal_com.h" -+ -+#define EFUSE_OOB_PROTECT_BYTES (96 + 1) -+ -+#define HAL_EFUSE_MEMORY -+#define HWSET_MAX_SIZE_8723D 512 -+#define EFUSE_REAL_CONTENT_LEN_8723D 512 -+#define EFUSE_MAP_LEN_8723D 512 -+#define EFUSE_MAX_SECTION_8723D 64 -+ -+/* For some inferiority IC purpose. added by Roger, 2009.09.02.*/ -+#define EFUSE_IC_ID_OFFSET 506 -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723D) -+ -+#define EFUSE_ACCESS_ON 0x69 -+#define EFUSE_ACCESS_OFF 0x00 -+ -+/* ******************************************************** -+ * EFUSE for BT definition -+ * ******************************************************** */ -+#define BANK_NUM 1 -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN 128 -+#define EFUSE_BT_REAL_CONTENT_LEN \ -+ (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM) -+#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -+#define EFUSE_BT_MAX_SECTION (EFUSE_BT_MAP_LEN / 8) -+#define EFUSE_PROTECT_BYTES_BANK 16 -+ -+typedef enum tag_Package_Definition { -+ PACKAGE_DEFAULT, -+ PACKAGE_QFN68, -+ PACKAGE_TFBGA90, -+ PACKAGE_TFBGA80, -+ PACKAGE_TFBGA79 -+} PACKAGE_TYPE_E; -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) \ -+ (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \ -+ (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+#ifdef CONFIG_FILE_FWIMG -+ extern char *rtw_fw_file_path; -+ extern char *rtw_fw_wow_file_path; -+ #ifdef CONFIG_MP_INCLUDED -+ extern char *rtw_fw_mp_bt_file_path; -+ #endif /* CONFIG_MP_INCLUDED */ -+#endif /* CONFIG_FILE_FWIMG */ -+ -+/* rtl8723d_hal_init.c */ -+s32 rtl8723d_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -+void rtl8723d_FirmwareSelfReset(PADAPTER padapter); -+void rtl8723d_InitializeFirmwareVars(PADAPTER padapter); -+ -+void rtl8723d_InitAntenna_Selection(PADAPTER padapter); -+void rtl8723d_DeinitAntenna_Selection(PADAPTER padapter); -+void rtl8723d_CheckAntenna_Selection(PADAPTER padapter); -+void rtl8723d_init_default_value(PADAPTER padapter); -+ -+s32 rtl8723d_InitLLTTable(PADAPTER padapter); -+ -+s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -+s32 CardDisableWithoutHWSM(PADAPTER padapter); -+ -+/* EFuse */ -+u8 GetEEPROMSize8723D(PADAPTER padapter); -+void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -+void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -+void Hal_EfuseParseTxPowerInfo_8723D(PADAPTER padapter, -+ u8 *PROMContent, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBTCoexistInfo_8723D(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseEEPROMVer_8723D(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseChnlPlan_8723D(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseCustomerID_8723D(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseAntennaDiversity_8723D(PADAPTER padapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8723D(PADAPTER pAdapter, -+ u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseThermalMeter_8723D(PADAPTER padapter, -+ u8 *hwinfo, u8 AutoLoadFail); -+void Hal_EfuseParseVoltage_8723D(PADAPTER pAdapter, -+ u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseBoardType_8723D(PADAPTER Adapter, -+ u8 *PROMContent, BOOLEAN AutoloadFail); -+ -+void rtl8723d_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8723d(_adapter *adapter); -+u8 SetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val); -+void GetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val); -+u8 SetHalDefVar8723D(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8723D(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+ -+/* register */ -+void rtl8723d_InitBeaconParameters(PADAPTER padapter); -+void rtl8723d_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -+void _InitMacAPLLSetting_8723D(PADAPTER Adapter); -+void _8051Reset8723(PADAPTER padapter); -+#ifdef CONFIG_WOWLAN -+ void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif /* CONFIG_WOWLAN */ -+ -+void rtl8723d_start_thread(_adapter *padapter); -+void rtl8723d_stop_thread(_adapter *padapter); -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+ void rtl8723ds_init_checkbthang_workqueue(_adapter *adapter); -+ void rtl8723ds_free_checkbthang_workqueue(_adapter *adapter); -+ void rtl8723ds_cancle_checkbthang_workqueue(_adapter *adapter); -+ void rtl8723ds_hal_check_bt_hang(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -+#endif -+#ifdef CONFIG_MP_INCLUDED -+int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -+#endif -+void CCX_FwC2HTxRpt_8723d(PADAPTER padapter, u8 *pdata, u8 len); -+ -+u8 MRateToHwRate8723D(u8 rate); -+u8 HwRateToMRate8723D(u8 rate); -+ -+void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+ -+#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) -+ void check_bt_status_work(void *data); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ void rtl8723d_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ BOOLEAN InterruptRecognized8723DE(PADAPTER Adapter); -+ void UpdateInterruptMask8723DE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+ u16 get_txbd_rw_reg(u16 ff_hwaddr); -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723d_led.h b/drivers/staging/rtl8723cs/include/rtl8723d_led.h -new file mode 100644 -index 000000000000..1905e8bed02c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723d_led.h -@@ -0,0 +1,44 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723D_LED_H__ -+#define __RTL8723D_LED_H__ -+ -+#include -+#include -+#include -+ -+#ifdef CONFIG_RTW_SW_LED -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+#ifdef CONFIG_USB_HCI -+ void rtl8723du_InitSwLeds(PADAPTER padapter); -+ void rtl8723du_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+ void rtl8723ds_InitSwLeds(PADAPTER padapter); -+ void rtl8723ds_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_GSPI_HCI -+ void rtl8723ds_InitSwLeds(PADAPTER padapter); -+ void rtl8723ds_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+ void rtl8723de_InitSwLeds(PADAPTER padapter); -+ void rtl8723de_DeInitSwLeds(PADAPTER padapter); -+#endif -+ -+#endif /*#ifdef CONFIG_RTW_SW_LED*/ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723d_lps_poff.h b/drivers/staging/rtl8723cs/include/rtl8723d_lps_poff.h -new file mode 100644 -index 000000000000..138a0ca66732 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723d_lps_poff.h -@@ -0,0 +1,56 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+/******************************************** CONST ************************/ -+#define NUM_OF_REGISTER_BANK 13 -+#define NUM_OF_TOTAL_DWORD (NUM_OF_REGISTER_BANK * 64) -+#define TOTAL_LEN_FOR_HIOE ((NUM_OF_TOTAL_DWORD + 1) * 8) -+#define LPS_POFF_STATIC_FILE_LEN (TOTAL_LEN_FOR_HIOE + TXDESC_SIZE) -+#define LPS_POFF_DYNAMIC_FILE_LEN (512 + TXDESC_SIZE) -+/******************************************** CONST ************************/ -+ -+/******************************************** MACRO ************************/ -+/* HOIE Entry Definition */ -+#define SET_HOIE_ENTRY_LOW_DATA(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE), 0, 16, __Value) -+#define SET_HOIE_ENTRY_HIGH_DATA(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE), 16, 16, __Value) -+#define SET_HOIE_ENTRY_MODE_SELECT(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 0, 1, __Value) -+#define SET_HOIE_ENTRY_ADDRESS(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 1, 14, __Value) -+#define SET_HOIE_ENTRY_BYTE_MASK(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 15, 4, __Value) -+#define SET_HOIE_ENTRY_IO_LOCK(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 19, 1, __Value) -+#define SET_HOIE_ENTRY_RD_EN(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 20, 1, __Value) -+#define SET_HOIE_ENTRY_WR_EN(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 21, 1, __Value) -+#define SET_HOIE_ENTRY_RAW_RW(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 22, 1, __Value) -+#define SET_HOIE_ENTRY_RAW(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 23, 1, __Value) -+#define SET_HOIE_ENTRY_IO_DELAY(__pHOIE, __Value) \ -+ SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 24, 8, __Value) -+ -+/*********************Function Definition*******************************************/ -+void rtl8723d_lps_poff_init(PADAPTER padapter); -+void rtl8723d_lps_poff_deinit(PADAPTER padapter); -+bool rtl8723d_lps_poff_get_txbndy_status(PADAPTER padapter); -+void rtl8723d_lps_poff_h2c_ctrl(PADAPTER padapter, u8 enable); -+void rtl8723d_lps_poff_set_ps_mode(PADAPTER padapter, bool bEnterLPS); -+bool rtl8723d_lps_poff_get_status(PADAPTER padapter); -+void rtl8723d_lps_poff_wow(PADAPTER padapter); -diff --git a/drivers/staging/rtl8723cs/include/rtl8723d_recv.h b/drivers/staging/rtl8723cs/include/rtl8723d_recv.h -new file mode 100644 -index 000000000000..f19ad6904a22 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723d_recv.h -@@ -0,0 +1,112 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723D_RECV_H__ -+#define __RTL8723D_RECV_H__ -+ -+#define RECV_BLK_SZ 512 -+#define RECV_BLK_CNT 16 -+#define RECV_BLK_TH RECV_BLK_CNT -+ -+#if defined(CONFIG_USB_HCI) -+ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ -+ /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ -+ /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ -+ #ifdef CONFIG_PLATFORM_MSTAR -+ #define MAX_RECVBUF_SZ (8192) /* 8K */ -+ #else -+ #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ -+ #endif -+ /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ -+ #else -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+#elif defined(CONFIG_PCI_HCI) -+ /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ -+ /* #define MAX_RECVBUF_SZ (9100) */ -+ /* #else */ -+ #define MAX_RECVBUF_SZ (4000) /* about 4K -+ * #endif */ -+ -+ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ -+ #define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8723D + 1) -+ -+#endif -+ -+/* Rx smooth factor */ -+#define Rx_Smooth_Factor (20) -+ -+#ifdef CONFIG_SDIO_HCI -+ #ifndef CONFIG_SDIO_RX_COPY -+ #undef MAX_RECVBUF_SZ -+ #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723D - RX_DMA_RESERVED_SIZE_8723D) -+ #endif /* !CONFIG_SDIO_RX_COPY */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+/*-----------------------------------------------------------------*/ -+/* RTL8723D RX BUFFER DESC */ -+/*-----------------------------------------------------------------*/ -+/*DWORD 0*/ -+#define SET_RX_BUFFER_DESC_DATA_LENGTH_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_BUFFER_DESC_LS_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) -+#define SET_RX_BUFFER_DESC_FS_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value) -+#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value) -+ -+#define GET_RX_BUFFER_DESC_OWN_8723D(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+#define GET_RX_BUFFER_DESC_LS_8723D(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_BUFFER_DESC_FS_8723D(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1) -+#ifdef USING_RX_TAG -+ #define GET_RX_BUFFER_DESC_RX_TAG_8723D(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 13) -+#else -+ #define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8723D(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) -+#endif -+ -+/*DWORD 1*/ -+#define SET_RX_BUFFER_PHYSICAL_LOW_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) -+ -+/*DWORD 2*/ -+#ifdef CONFIG_64BIT_DMA -+ #define SET_RX_BUFFER_PHYSICAL_HIGH_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) -+#else -+ #define SET_RX_BUFFER_PHYSICAL_HIGH_8723D(__pRxStatusDesc, __Value) -+#endif -+ -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8723ds_init_recv_priv(PADAPTER padapter); -+ void rtl8723ds_free_recv_priv(PADAPTER padapter); -+ s32 rtl8723ds_recv_hdl(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ int rtl8723du_init_recv_priv(_adapter *padapter); -+ void rtl8723du_free_recv_priv(_adapter *padapter); -+ void rtl8723du_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8723de_init_recv_priv(PADAPTER padapter); -+ void rtl8723de_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8723d_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8723D_RECV_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8723d_rf.h b/drivers/staging/rtl8723cs/include/rtl8723d_rf.h -new file mode 100644 -index 000000000000..4a0a7cfb8747 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723d_rf.h -@@ -0,0 +1,21 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723D_RF_H__ -+#define __RTL8723D_RF_H__ -+ -+int PHY_RF6052_Config8723D(PADAPTER pdapter); -+ -+void PHY_RF6052SetBandwidth8723D(PADAPTER Adapter, enum channel_width Bandwidth); -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723d_spec.h b/drivers/staging/rtl8723cs/include/rtl8723d_spec.h -new file mode 100644 -index 000000000000..5106b23b7722 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723d_spec.h -@@ -0,0 +1,447 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723D_SPEC_H__ -+#define __RTL8723D_SPEC_H__ -+ -+#include -+ -+ -+#define HAL_NAV_UPPER_UNIT_8723D 128 /* micro-second */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0000h ~ 0x00FFh System Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_SYS_ISO_CTRL_8723D 0x0000 /* 2 Byte */ -+#define REG_SYS_FUNC_EN_8723D 0x0002 /* 2 Byte */ -+#define REG_APS_FSMCO_8723D 0x0004 /* 4 Byte */ -+#define REG_SYS_CLKR_8723D 0x0008 /* 2 Byte */ -+#define REG_9346CR_8723D 0x000A /* 2 Byte */ -+#define REG_EE_VPD_8723D 0x000C /* 2 Byte */ -+#define REG_AFE_MISC_8723D 0x0010 /* 1 Byte */ -+#define REG_SPS0_CTRL_8723D 0x0011 /* 7 Byte */ -+#define REG_SPS_OCP_CFG_8723D 0x0018 /* 4 Byte */ -+#define REG_RSV_CTRL_8723D 0x001C /* 3 Byte */ -+#define REG_RF_CTRL_8723D 0x001F /* 1 Byte */ -+#define REG_LPLDO_CTRL_8723D 0x0023 /* 1 Byte */ -+#define REG_AFE_XTAL_CTRL_8723D 0x0024 /* 4 Byte */ -+#define REG_AFE_PLL_CTRL_8723D 0x0028 /* 4 Byte */ -+#define REG_MAC_PLL_CTRL_EXT_8723D 0x002c /* 4 Byte */ -+#define REG_EFUSE_CTRL_8723D 0x0030 -+#define REG_EFUSE_TEST_8723D 0x0034 -+#define REG_PWR_DATA_8723D 0x0038 -+#define REG_CAL_TIMER_8723D 0x003C -+#define REG_ACLK_MON_8723D 0x003E -+#define REG_GPIO_MUXCFG_8723D 0x0040 -+#define REG_GPIO_IO_SEL_8723D 0x0042 -+#define REG_MAC_PINMUX_CFG_8723D 0x0043 -+#define REG_GPIO_PIN_CTRL_8723D 0x0044 -+#define REG_GPIO_INTM_8723D 0x0048 -+#define REG_LEDCFG0_8723D 0x004C -+#define REG_LEDCFG1_8723D 0x004D -+#define REG_LEDCFG2_8723D 0x004E -+#define REG_LEDCFG3_8723D 0x004F -+#define REG_FSIMR_8723D 0x0050 -+#define REG_FSISR_8723D 0x0054 -+#define REG_HSIMR_8723D 0x0058 -+#define REG_HSISR_8723D 0x005c -+#define REG_GPIO_EXT_CTRL 0x0060 -+#define REG_PAD_CTRL1_8723D 0x0064 -+#define REG_MULTI_FUNC_CTRL_8723D 0x0068 -+#define REG_GPIO_STATUS_8723D 0x006C -+#define REG_SDIO_CTRL_8723D 0x0070 -+#define REG_OPT_CTRL_8723D 0x0074 -+#define REG_AFE_CTRL_4_8723D 0x0078 -+#define REG_MCUFWDL_8723D 0x0080 -+#define REG_8051FW_CTRL_8723D 0x0080 -+#define REG_HMEBOX_DBG_0_8723D 0x0088 -+#define REG_HMEBOX_DBG_1_8723D 0x008A -+#define REG_HMEBOX_DBG_2_8723D 0x008C -+#define REG_HMEBOX_DBG_3_8723D 0x008E -+#define REG_WLLPS_CTRL 0x0090 -+#define REG_HIMR0_8723D 0x00B0 -+#define REG_HISR0_8723D 0x00B4 -+#define REG_HIMR1_8723D 0x00B8 -+#define REG_HISR1_8723D 0x00BC -+#define REG_PMC_DBG_CTRL2_8723D 0x00CC -+#define REG_EFUSE_BURN_GNT_8723D 0x00CF -+#define REG_HPON_FSM_8723D 0x00EC -+#define REG_SYS_CFG1_8723D 0x00F0 -+#define REG_SYS_CFG_8723D 0x00FC -+#define REG_ROM_VERSION 0x00FD -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_C2HEVT_CMD_ID_8723D 0x01A0 -+#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -+#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -+#define REG_C2HEVT_CMD_LEN_8723D 0x01AE -+#define REG_C2HEVT_CLEAR_8723D 0x01AF -+#define REG_MCUTST_1_8723D 0x01C0 -+#define REG_WOWLAN_WAKE_REASON 0x01C7 -+#define REG_FMETHR_8723D 0x01C8 -+#define REG_HMETFR_8723D 0x01CC -+#define REG_HMEBOX_0_8723D 0x01D0 -+#define REG_HMEBOX_1_8723D 0x01D4 -+#define REG_HMEBOX_2_8723D 0x01D8 -+#define REG_HMEBOX_3_8723D 0x01DC -+#define REG_LLT_INIT_8723D 0x01E0 -+#define REG_HMEBOX_EXT0_8723D 0x01F0 -+#define REG_HMEBOX_EXT1_8723D 0x01F4 -+#define REG_HMEBOX_EXT2_8723D 0x01F8 -+#define REG_HMEBOX_EXT3_8723D 0x01FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RQPN_8723D 0x0200 -+#define REG_FIFOPAGE_8723D 0x0204 -+#define REG_DWBCN0_CTRL_8723D REG_TDECTRL -+#define REG_TXDMA_OFFSET_CHK_8723D 0x020C -+#define REG_TXDMA_STATUS_8723D 0x0210 -+#define REG_RQPN_NPQ_8723D 0x0214 -+#define REG_DWBCN1_CTRL_8723D 0x0228 -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RXDMA_AGG_PG_TH_8723D 0x0280 -+#define REG_FW_UPD_RDPTR_8723D 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ -+#define REG_RXDMA_CONTROL_8723D 0x0286 /* Control the RX DMA. */ -+#define REG_RXDMA_STATUS_8723D 0x0288 -+#define REG_RXDMA_MODE_CTRL_8723D 0x0290 -+#define REG_EARLY_MODE_CONTROL_8723D 0x02BC -+#define REG_RSVD5_8723D 0x02F0 -+#define REG_RSVD6_8723D 0x02F4 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0300h ~ 0x03FFh PCIe -+ * -+ * ----------------------------------------------------- */ -+#define REG_PCIE_CTRL_REG_8723D 0x0300 -+#define REG_INT_MIG_8723D 0x0304 /* Interrupt Migration */ -+#define REG_BCNQ_TXBD_DESA_8723D 0x0308 /* TX Beacon Descriptor Address */ -+#define REG_MGQ_TXBD_DESA_8723D 0x0310 /* TX Manage Queue Descriptor Address */ -+#define REG_VOQ_TXBD_DESA_8723D 0x0318 /* TX VO Queue Descriptor Address */ -+#define REG_VIQ_TXBD_DESA_8723D 0x0320 /* TX VI Queue Descriptor Address */ -+#define REG_BEQ_TXBD_DESA_8723D 0x0328 /* TX BE Queue Descriptor Address */ -+#define REG_BKQ_TXBD_DESA_8723D 0x0330 /* TX BK Queue Descriptor Address */ -+#define REG_RXQ_RXBD_DESA_8723D 0x0338 /* RX Queue Descriptor Address */ -+#define REG_HI0Q_TXBD_DESA_8723D 0x0340 -+#define REG_HI1Q_TXBD_DESA_8723D 0x0348 -+#define REG_HI2Q_TXBD_DESA_8723D 0x0350 -+#define REG_HI3Q_TXBD_DESA_8723D 0x0358 -+#define REG_HI4Q_TXBD_DESA_8723D 0x0360 -+#define REG_HI5Q_TXBD_DESA_8723D 0x0368 -+#define REG_HI6Q_TXBD_DESA_8723D 0x0370 -+#define REG_HI7Q_TXBD_DESA_8723D 0x0378 -+#define REG_MGQ_TXBD_NUM_8723D 0x0380 -+#define REG_RX_RXBD_NUM_8723D 0x0382 -+#define REG_VOQ_TXBD_NUM_8723D 0x0384 -+#define REG_VIQ_TXBD_NUM_8723D 0x0386 -+#define REG_BEQ_TXBD_NUM_8723D 0x0388 -+#define REG_BKQ_TXBD_NUM_8723D 0x038A -+#define REG_HI0Q_TXBD_NUM_8723D 0x038C -+#define REG_HI1Q_TXBD_NUM_8723D 0x038E -+#define REG_HI2Q_TXBD_NUM_8723D 0x0390 -+#define REG_HI3Q_TXBD_NUM_8723D 0x0392 -+#define REG_HI4Q_TXBD_NUM_8723D 0x0394 -+#define REG_HI5Q_TXBD_NUM_8723D 0x0396 -+#define REG_HI6Q_TXBD_NUM_8723D 0x0398 -+#define REG_HI7Q_TXBD_NUM_8723D 0x039A -+#define REG_TSFTIMER_HCI_8723D 0x039C -+#define REG_BD_RW_PTR_CLR_8723D 0x039C -+ -+/* Read Write Point */ -+#define REG_VOQ_TXBD_IDX_8723D 0x03A0 -+#define REG_VIQ_TXBD_IDX_8723D 0x03A4 -+#define REG_BEQ_TXBD_IDX_8723D 0x03A8 -+#define REG_BKQ_TXBD_IDX_8723D 0x03AC -+#define REG_MGQ_TXBD_IDX_8723D 0x03B0 -+#define REG_RXQ_TXBD_IDX_8723D 0x03B4 -+#define REG_HI0Q_TXBD_IDX_8723D 0x03B8 -+#define REG_HI1Q_TXBD_IDX_8723D 0x03BC -+#define REG_HI2Q_TXBD_IDX_8723D 0x03C0 -+#define REG_HI3Q_TXBD_IDX_8723D 0x03C4 -+#define REG_HI4Q_TXBD_IDX_8723D 0x03C8 -+#define REG_HI5Q_TXBD_IDX_8723D 0x03CC -+#define REG_HI6Q_TXBD_IDX_8723D 0x03D0 -+#define REG_HI7Q_TXBD_IDX_8723D 0x03D4 -+ -+#define REG_PCIE_HCPWM_8723DE 0x03D8 /* ?????? */ -+#define REG_PCIE_HRPWM_8723DE 0x03DC /* PCIe RPWM ?????? */ -+#define REG_DBI_WDATA_V1_8723D 0x03E8 -+#define REG_DBI_RDATA_V1_8723D 0x03EC -+#define REG_DBI_FLAG_V1_8723D 0x03F0 -+#define REG_MDIO_V1_8723D 0x03F4 -+#define REG_PCIE_MIX_CFG_8723D 0x03F8 -+#define REG_HCI_MIX_CFG_8723D 0x03FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_VOQ_INFORMATION_8723D 0x0400 -+#define REG_VIQ_INFORMATION_8723D 0x0404 -+#define REG_BEQ_INFORMATION_8723D 0x0408 -+#define REG_BKQ_INFORMATION_8723D 0x040C -+#define REG_MGQ_INFORMATION_8723D 0x0410 -+#define REG_HGQ_INFORMATION_8723D 0x0414 -+#define REG_BCNQ_INFORMATION_8723D 0x0418 -+#define REG_TXPKT_EMPTY_8723D 0x041A -+ -+#define REG_FWHW_TXQ_CTRL_8723D 0x0420 -+#define REG_HWSEQ_CTRL_8723D 0x0423 -+#define REG_TXPKTBUF_BCNQ_BDNY_8723D 0x0424 -+#define REG_TXPKTBUF_MGQ_BDNY_8723D 0x0425 -+#define REG_LIFECTRL_CTRL_8723D 0x0426 -+#define REG_MULTI_BCNQ_OFFSET_8723D 0x0427 -+#define REG_SPEC_SIFS_8723D 0x0428 -+#define REG_RL_8723D 0x042A -+#define REG_TXBF_CTRL_8723D 0x042C -+#define REG_DARFRC_8723D 0x0430 -+#define REG_RARFRC_8723D 0x0438 -+#define REG_RRSR_8723D 0x0440 -+#define REG_ARFR0_8723D 0x0444 -+#define REG_ARFR1_8723D 0x044C -+#define REG_CCK_CHECK_8723D 0x0454 -+#define REG_AMPDU_MAX_TIME_8723D 0x0456 -+#define REG_TXPKTBUF_BCNQ_BDNY1_8723D 0x0457 -+ -+#define REG_AMPDU_MAX_LENGTH_8723D 0x0458 -+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723D 0x045D -+#define REG_NDPA_OPT_CTRL_8723D 0x045F -+#define REG_FAST_EDCA_CTRL_8723D 0x0460 -+#define REG_RD_RESP_PKT_TH_8723D 0x0463 -+#define REG_DATA_SC_8723D 0x0483 -+#ifdef CONFIG_WOWLAN -+ #define REG_TXPKTBUF_IV_LOW 0x0484 -+ #define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_TXRPT_START_OFFSET 0x04AC -+#define REG_POWER_STAGE1_8723D 0x04B4 -+#define REG_POWER_STAGE2_8723D 0x04B8 -+#define REG_AMPDU_BURST_MODE_8723D 0x04BC -+#define REG_PKT_VO_VI_LIFE_TIME_8723D 0x04C0 -+#define REG_PKT_BE_BK_LIFE_TIME_8723D 0x04C2 -+#define REG_STBC_SETTING_8723D 0x04C4 -+#define REG_HT_SINGLE_AMPDU_8723D 0x04C7 -+#define REG_PROT_MODE_CTRL_8723D 0x04C8 -+#define REG_MAX_AGGR_NUM_8723D 0x04CA -+#define REG_RTS_MAX_AGGR_NUM_8723D 0x04CB -+#define REG_BAR_MODE_CTRL_8723D 0x04CC -+#define REG_RA_TRY_RATE_AGG_LMT_8723D 0x04CF -+#define REG_MACID_PKT_DROP0_8723D 0x04D0 -+#define REG_MACID_PKT_SLEEP_8723D 0x04D4 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_EDCA_VO_PARAM_8723D 0x0500 -+#define REG_EDCA_VI_PARAM_8723D 0x0504 -+#define REG_EDCA_BE_PARAM_8723D 0x0508 -+#define REG_EDCA_BK_PARAM_8723D 0x050C -+#define REG_BCNTCFG_8723D 0x0510 -+#define REG_PIFS_8723D 0x0512 -+#define REG_RDG_PIFS_8723D 0x0513 -+#define REG_SIFS_CTX_8723D 0x0514 -+#define REG_SIFS_TRX_8723D 0x0516 -+#define REG_AGGR_BREAK_TIME_8723D 0x051A -+#define REG_SLOT_8723D 0x051B -+#define REG_TX_PTCL_CTRL_8723D 0x0520 -+#define REG_TXPAUSE_8723D 0x0522 -+#define REG_DIS_TXREQ_CLR_8723D 0x0523 -+#define REG_RD_CTRL_8723D 0x0524 -+/* -+ * Format for offset 540h-542h: -+ * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. -+ * [7:4]: Reserved. -+ * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. -+ * [23:20]: Reserved -+ * Description: -+ * | -+ * |<--Setup--|--Hold------------>| -+ * --------------|---------------------- -+ * | -+ * TBTT -+ * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. -+ * Described by Designer Tim and Bruce, 2011-01-14. -+ * */ -+#define REG_TBTT_PROHIBIT_8723D 0x0540 -+#define REG_RD_NAV_NXT_8723D 0x0544 -+#define REG_NAV_PROT_LEN_8723D 0x0546 -+#define REG_BCN_CTRL_8723D 0x0550 -+#define REG_BCN_CTRL_1_8723D 0x0551 -+#define REG_MBID_NUM_8723D 0x0552 -+#define REG_DUAL_TSF_RST_8723D 0x0553 -+#define REG_BCN_INTERVAL_8723D 0x0554 -+#define REG_DRVERLYINT_8723D 0x0558 -+#define REG_BCNDMATIM_8723D 0x0559 -+#define REG_ATIMWND_8723D 0x055A -+#define REG_USTIME_TSF_8723D 0x055C -+#define REG_BCN_MAX_ERR_8723D 0x055D -+#define REG_RXTSF_OFFSET_CCK_8723D 0x055E -+#define REG_RXTSF_OFFSET_OFDM_8723D 0x055F -+#define REG_TSFTR_8723D 0x0560 -+#define REG_CTWND_8723D 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8723D 0x0577 -+#define REG_PSTIMER_8723D 0x0580 -+#define REG_TIMER0_8723D 0x0584 -+#define REG_TIMER1_8723D 0x0588 -+#define REG_ACMHWCTRL_8723D 0x05C0 -+#define REG_SCH_TXCMD_8723D 0x05F8 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_MAC_CR_8723D 0x0600 -+#define REG_TCR_8723D 0x0604 -+#define REG_RCR_8723D 0x0608 -+#define REG_RX_PKT_LIMIT_8723D 0x060C -+#define REG_RX_DLK_TIME_8723D 0x060D -+#define REG_RX_DRVINFO_SZ_8723D 0x060F -+ -+#define REG_MACID_8723D 0x0610 -+#define REG_BSSID_8723D 0x0618 -+#define REG_MAR_8723D 0x0620 -+#define REG_MBIDCAMCFG_8723D 0x0628 -+#define REG_WOWLAN_GTK_DBG1 0x630 -+#define REG_WOWLAN_GTK_DBG2 0x634 -+ -+#define REG_USTIME_EDCA_8723D 0x0638 -+#define REG_MAC_SPEC_SIFS_8723D 0x063A -+#define REG_RESP_SIFP_CCK_8723D 0x063C -+#define REG_RESP_SIFS_OFDM_8723D 0x063E -+#define REG_ACKTO_8723D 0x0640 -+#define REG_CTS2TO_8723D 0x0641 -+#define REG_EIFS_8723D 0x0642 -+ -+#define REG_NAV_UPPER_8723D 0x0652 /* unit of 128 */ -+#define REG_TRXPTCL_CTL_8723D 0x0668 -+ -+/* Security */ -+#define REG_CAMCMD_8723D 0x0670 -+#define REG_CAMWRITE_8723D 0x0674 -+#define REG_CAMREAD_8723D 0x0678 -+#define REG_CAMDBG_8723D 0x067C -+#define REG_SECCFG_8723D 0x0680 -+ -+/* Power */ -+#define REG_WOW_CTRL_8723D 0x0690 -+#define REG_PS_RX_INFO_8723D 0x0692 -+#define REG_UAPSD_TID_8723D 0x0693 -+#define REG_WKFMCAM_CMD_8723D 0x0698 -+#define REG_WKFMCAM_NUM_8723D 0x0698 -+#define REG_WKFMCAM_RWD_8723D 0x069C -+#define REG_RXFLTMAP0_8723D 0x06A0 -+#define REG_RXFLTMAP1_8723D 0x06A2 -+#define REG_RXFLTMAP2_8723D 0x06A4 -+#define REG_BCN_PSR_RPT_8723D 0x06A8 -+#define REG_BT_COEX_TABLE_8723D 0x06C0 -+#define REG_BFMER0_INFO_8723D 0x06E4 -+#define REG_BFMER1_INFO_8723D 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8723D 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8723D 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8723D 0x06FC -+ -+/* Hardware Port 2 */ -+#define REG_MACID1_8723D 0x0700 -+#define REG_BSSID1_8723D 0x0708 -+#define REG_BFMEE_SEL_8723D 0x0714 -+#define REG_SND_PTCL_CTRL_8723D 0x0718 -+ -+/* LTR */ -+#define REG_LTR_CTRL_BASIC_8723D 0x07A4 -+#define REG_LTR_IDLE_LATENCY_V1_8723D 0x0798 -+#define REG_LTR_ACTIVE_LATENCY_V1_8723D 0x079C -+ -+/* LTE_COEX */ -+#define REG_LTECOEX_CTRL 0x07C0 -+#define REG_LTECOEX_WRITE_DATA 0x07C4 -+#define REG_LTECOEX_READ_DATA 0x07C8 -+#define REG_LTECOEX_PATH_CONTROL 0x70 -+ -+/* ************************************************************ -+ * SDIO Bus Specification -+ * ************************************************************ */ -+ -+/* ----------------------------------------------------- -+ * SDIO CMD Address Mapping -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * I/O bus domain (Host) -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * SDIO register -+ * ----------------------------------------------------- */ -+#define SDIO_REG_HCPWM1_8723D 0x025 /* HCI Current Power Mode 1 */ -+ -+ -+/* **************************************************************************** -+ * 8723 Regsiter Bit and Content definition -+ * **************************************************************************** */ -+ -+#define BIT_USB_RXDMA_AGG_EN BIT(31) -+#define RXDMA_AGG_MODE_EN BIT(1) -+ -+#ifdef CONFIG_WOWLAN -+ #define RXPKT_RELEASE_POLL BIT(16) -+ #define RXDMA_IDLE BIT(17) -+ #define RW_RELEASE_EN BIT(18) -+#endif -+ -+/* 2 HSISR -+ * interrupt mask which needs to clear */ -+#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ -+ HSISR_SPS_OCP_INT |\ -+ HSISR_RON_INT |\ -+ HSISR_PDNINT |\ -+ HSISR_GPIO9_INT) -+ -+#ifdef CONFIG_RF_POWER_TRIM -+ #ifdef CONFIG_RTL8723D -+ #define EEPROM_RF_GAIN_OFFSET 0xC1 -+ #endif -+ -+ #define EEPROM_RF_GAIN_VAL 0x1F6 -+#endif /*CONFIG_RF_POWER_TRIM*/ -+ -+#ifdef CONFIG_PCI_HCI -+ /* #define IMR_RX_MASK (IMR_ROK_8723D|IMR_RDU_8723D|IMR_RXFOVW_8723D) */ -+ #define IMR_TX_MASK (IMR_VODOK_8723D | IMR_VIDOK_8723D | IMR_BEDOK_8723D | IMR_BKDOK_8723D | IMR_MGNTDOK_8723D | IMR_HIGHDOK_8723D) -+ -+ #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8723D | IMR_TXBCN0OK_8723D | IMR_TXBCN0ERR_8723D | IMR_BCNDERR0_8723D) -+ -+ #define RT_AC_INT_MASKS (IMR_VIDOK_8723D | IMR_VODOK_8723D | IMR_BEDOK_8723D | IMR_BKDOK_8723D) -+#endif -+ -+#endif /* __RTL8723D_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8723d_sreset.h b/drivers/staging/rtl8723cs/include/rtl8723d_sreset.h -new file mode 100644 -index 000000000000..db75dba73e32 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723d_sreset.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8723D_SRESET_H_ -+#define _RTL8723D_SRESET_H_ -+ -+#include -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ extern void rtl8723d_sreset_xmit_status_check(_adapter *padapter); -+ extern void rtl8723d_sreset_linked_status_check(_adapter *padapter); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723d_xmit.h b/drivers/staging/rtl8723cs/include/rtl8723d_xmit.h -new file mode 100644 -index 000000000000..91fb52c20f00 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723d_xmit.h -@@ -0,0 +1,530 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8723D_XMIT_H__ -+#define __RTL8723D_XMIT_H__ -+ -+ -+#define MAX_TID (15) -+ -+ -+#ifndef __INC_HAL8723DDESC_H -+#define __INC_HAL8723DDESC_H -+ -+#define RX_STATUS_DESC_SIZE_8723D 24 -+#define RX_DRV_INFO_SIZE_UNIT_8723D 8 -+ -+ -+/* DWORD 0 */ -+#define SET_RX_STATUS_DESC_PKT_LEN_8723D(__pRxStatusDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_8723D(__pRxStatusDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_8723D(__pRxStatusDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) -+ -+#define GET_RX_STATUS_DESC_PKT_LEN_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICV_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_EOR_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_OWN_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+ -+/* DWORD 1 */ -+#define GET_RX_STATUS_DESC_MACID_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_TID_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_AMSDU_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_A1_FIT_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -+#define GET_RX_STATUS_DESC_CHKERR_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_IPVER_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_IS_TCPUDP__8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_CHK_VLD_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_MC_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) -+ -+/* DWORD 2 */ -+#define GET_RX_STATUS_DESC_SEQ_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -+#define GET_RX_STATUS_DESC_RX_IS_QOS_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_RPT_SEL_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -+#define GET_RX_STATUS_DESC_FCS_OK_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) -+ -+/* DWORD 3 */ -+#define GET_RX_STATUS_DESC_RX_RATE_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_HTC_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -+#ifdef CONFIG_USB_RX_AGGREGATION -+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -+#endif -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_MATCH_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_MATCH_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) -+ -+/* DWORD 6 */ -+#define GET_RX_STATUS_DESC_MATCH_ID_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7) -+ -+/* DWORD 5 */ -+#define GET_RX_STATUS_DESC_TSFL_8723D(__pRxStatusDesc) \ -+ LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) -+ -+#define GET_RX_STATUS_DESC_BUFF_ADDR_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+#define GET_RX_STATUS_DESC_BUFF_ADDR64_8723D(__pRxDesc) \ -+ LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+#define SET_RX_STATUS_DESC_BUFF_ADDR_8723D(__pRxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) -+ -+ -+/* Dword 0, rsvd: bit26, bit28 */ -+#define GET_TX_DESC_OWN_8723D(__pTxDesc)\ -+ LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+#define SET_TX_DESC_PKT_SIZE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define SET_TX_DESC_OFFSET_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define SET_TX_DESC_BMC_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_AMSDU_PAD_EN_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_NO_ACM_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+ -+/* Dword 1 */ -+#define SET_TX_DESC_MACID_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+#define SET_TX_DESC_MORE_DATA_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) -+ -+/* Dword 2 remove P_AID, G_ID field*/ -+#define SET_TX_DESC_CCA_RTS_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_NULL0_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -+#define SET_TX_DESC_NULL1_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -+#define SET_TX_DESC_BK_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define SET_TX_DESC_RAW_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define SET_TX_DESC_CCX_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_INT_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_FTM_EN_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 30, 1, __Value) -+ -+/* Dword 3 */ -+#define SET_TX_DESC_HWSEQ_SEL_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_PORT_ID_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 2, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+/* Dword 4 */ -+#define SET_TX_DESC_TX_RATE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_TX_TRY_RATE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+#define SET_TX_DESC_PCTS_EN_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -+#define SET_TX_DESC_PCTS_MASK_IDX_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) -+ -+/* Dword 5 */ -+#define SET_TX_DESC_DATA_SC_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_STBC_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_RTS_STBC_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+#define SET_TX_DESC_PATH_A_EN_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value) -+#define SET_TX_DESC_TXPWR_OF_SET_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) -+ -+/* Dword 6 */ -+#define SET_TX_DESC_SW_DEFINE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_MBSSID_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+#define SET_TX_DESC_RF_SEL_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+ -+/* Dword 7 */ -+#ifdef CONFIG_PCI_HCI -+#define SET_TX_DESC_TX_BUFFER_SIZE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+ -+#ifdef CONFIG_USB_HCI -+#define SET_TX_DESC_TX_DESC_CHECKSUM_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+#define SET_TX_DESC_TX_TIMESTAMP_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value) -+#endif -+ -+#define SET_TX_DESC_USB_TXAGG_NUM_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+ -+/* Dword 8 */ -+#define SET_TX_DESC_RTS_RC_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -+#define SET_TX_DESC_BAR_RC_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -+#define SET_TX_DESC_DATA_RC_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -+#define SET_TX_DESC_HWSEQ_EN_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+#define SET_TX_DESC_NEXTHEADPAGE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -+#define SET_TX_DESC_TAILPAGE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) -+ -+/* Dword 9 */ -+#define SET_TX_DESC_PADDING_LEN_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -+#define SET_TX_DESC_SEQ_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+#define SET_TX_DESC_FINAL_DATA_RATE_8723D(__pTxDesc, __Value) \ -+ SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) -+ -+ -+#define SET_EARLYMODE_PKTNUM_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+ -+/*-----------------------------------------------------------------*/ -+/* RTL8723D TX BUFFER DESC */ -+/*-----------------------------------------------------------------*/ -+#ifdef CONFIG_64BIT_DMA -+ #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) -+ #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) -+#else -+ #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) -+ #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) /* 64 BIT mode only */ -+#endif -+/* ********************************************************* */ -+ -+/* 64 bits -- 32 bits */ -+/* ======= ======= */ -+/* Dword 0 0 */ -+#define SET_TX_BUFF_DESC_LEN_0_8723D(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) -+#define SET_TX_BUFF_DESC_PSB_8723D(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -+#define SET_TX_BUFF_DESC_OWN_8723D(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+/* Dword 1 1 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_0_8723D(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -+#define GET_TX_BUFF_DESC_ADDR_LOW_0_8723D(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) -+/* Dword 2 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value) -+#ifdef CONFIG_64BIT_DMA -+ #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8723D(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) -+#else -+ #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8723D(__pTxDesc) 0 -+#endif -+/* Dword 3 NA */ -+/* RESERVED 0 */ -+/* Dword 4 2 */ -+#define SET_TX_BUFF_DESC_LEN_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value) -+/* Dword 5 3 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value) -+/* Dword 6 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value) -+/* Dword 7 NA */ -+/*RESERVED 0 */ -+/* Dword 8 4 */ -+#define SET_TX_BUFF_DESC_LEN_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value) -+/* Dword 9 5 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value) -+/* Dword 10 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value) -+/* Dword 11 NA */ -+/*RESERVED 0 */ -+/* Dword 12 6 */ -+#define SET_TX_BUFF_DESC_LEN_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value) -+#define SET_TX_BUFF_DESC_AMSDU_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value) -+/* Dword 13 7 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value) -+/* Dword 14 NA */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value) -+/* Dword 15 NA */ -+/*RESERVED 0 */ -+ -+ -+#endif -+/* ----------------------------------------------------------- -+ * -+ * Rate -+ * -+ * ----------------------------------------------------------- -+ * CCK Rates, TxHT = 0 */ -+#define DESC8723D_RATE1M 0x00 -+#define DESC8723D_RATE2M 0x01 -+#define DESC8723D_RATE5_5M 0x02 -+#define DESC8723D_RATE11M 0x03 -+ -+/* OFDM Rates, TxHT = 0 */ -+#define DESC8723D_RATE6M 0x04 -+#define DESC8723D_RATE9M 0x05 -+#define DESC8723D_RATE12M 0x06 -+#define DESC8723D_RATE18M 0x07 -+#define DESC8723D_RATE24M 0x08 -+#define DESC8723D_RATE36M 0x09 -+#define DESC8723D_RATE48M 0x0a -+#define DESC8723D_RATE54M 0x0b -+ -+/* MCS Rates, TxHT = 1 */ -+#define DESC8723D_RATEMCS0 0x0c -+#define DESC8723D_RATEMCS1 0x0d -+#define DESC8723D_RATEMCS2 0x0e -+#define DESC8723D_RATEMCS3 0x0f -+#define DESC8723D_RATEMCS4 0x10 -+#define DESC8723D_RATEMCS5 0x11 -+#define DESC8723D_RATEMCS6 0x12 -+#define DESC8723D_RATEMCS7 0x13 -+#define DESC8723D_RATEMCS8 0x14 -+#define DESC8723D_RATEMCS9 0x15 -+#define DESC8723D_RATEMCS10 0x16 -+#define DESC8723D_RATEMCS11 0x17 -+#define DESC8723D_RATEMCS12 0x18 -+#define DESC8723D_RATEMCS13 0x19 -+#define DESC8723D_RATEMCS14 0x1a -+#define DESC8723D_RATEMCS15 0x1b -+#define DESC8723D_RATEVHTSS1MCS0 0x2c -+#define DESC8723D_RATEVHTSS1MCS1 0x2d -+#define DESC8723D_RATEVHTSS1MCS2 0x2e -+#define DESC8723D_RATEVHTSS1MCS3 0x2f -+#define DESC8723D_RATEVHTSS1MCS4 0x30 -+#define DESC8723D_RATEVHTSS1MCS5 0x31 -+#define DESC8723D_RATEVHTSS1MCS6 0x32 -+#define DESC8723D_RATEVHTSS1MCS7 0x33 -+#define DESC8723D_RATEVHTSS1MCS8 0x34 -+#define DESC8723D_RATEVHTSS1MCS9 0x35 -+#define DESC8723D_RATEVHTSS2MCS0 0x36 -+#define DESC8723D_RATEVHTSS2MCS1 0x37 -+#define DESC8723D_RATEVHTSS2MCS2 0x38 -+#define DESC8723D_RATEVHTSS2MCS3 0x39 -+#define DESC8723D_RATEVHTSS2MCS4 0x3a -+#define DESC8723D_RATEVHTSS2MCS5 0x3b -+#define DESC8723D_RATEVHTSS2MCS6 0x3c -+#define DESC8723D_RATEVHTSS2MCS7 0x3d -+#define DESC8723D_RATEVHTSS2MCS8 0x3e -+#define DESC8723D_RATEVHTSS2MCS9 0x3f -+ -+ -+#define RX_HAL_IS_CCK_RATE_8723D(pDesc)\ -+ (GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE1M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE2M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE5_5M || \ -+ GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE11M) -+ -+#ifdef CONFIG_TRX_BD_ARCH -+ struct tx_desc; -+#endif -+ -+void rtl8723d_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+void rtl8723d_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -+void rtl8723d_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -+void rtl8723d_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -+void rtl8723d_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -+void rtl8723d_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+ -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ s32 rtl8723ds_init_xmit_priv(PADAPTER padapter); -+ void rtl8723ds_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8723ds_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8723ds_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8723ds_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8723ds_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8723ds_xmit_buf_handler(PADAPTER padapter); -+ thread_return rtl8723ds_xmit_thread(thread_context context); -+ #define hal_xmit_handler rtl8723ds_xmit_buf_handler -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ s32 rtl8723du_xmit_buf_handler(PADAPTER padapter); -+ #define hal_xmit_handler rtl8723du_xmit_buf_handler -+ s32 rtl8723du_init_xmit_priv(PADAPTER padapter); -+ void rtl8723du_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8723du_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8723du_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8723du_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8723du_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ void rtl8723du_xmit_tasklet(void *priv); -+ s32 rtl8723du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+ void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8723de_init_xmit_priv(PADAPTER padapter); -+ void rtl8723de_free_xmit_priv(PADAPTER padapter); -+ struct xmit_buf *rtl8723de_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+ void rtl8723de_xmitframe_resume(_adapter *padapter); -+ s32 rtl8723de_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8723de_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8723de_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8723de_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ void rtl8723de_xmit_tasklet(void *priv); -+#endif -+ -+u8 BWMapping_8723D(PADAPTER Adapter, struct pkt_attrib *pattrib); -+u8 SCMapping_8723D(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8723f_hal.h b/drivers/staging/rtl8723cs/include/rtl8723f_hal.h -new file mode 100644 -index 000000000000..ff95cbee349b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723f_hal.h -@@ -0,0 +1,262 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8723F_HAL_H_ -+#define _RTL8723F_HAL_H_ -+ -+#include /* BIT(x) */ -+#include /* PADAPTER */ -+#include "../hal/halmac/halmac_api.h" /* MAC REG definition */ -+ -+#define MAX_RECVBUF_SZ 16384 /* 16KB (RX_FIFO_SIZE_8723F), TX: 32KB */ -+ -+/* -+ * MAC Register definition -+ */ -+#define REG_LEDCFG0 REG_LED_CFG_8723F /* rtw_mp.c */ -+#define MSR (REG_CR_8723F + 2) /* rtw_mp.c & hal_com.c */ -+#define MSR1 REG_CR_EXT_8723F /* rtw_mp.c & hal_com.c */ -+#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */ -+#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */ -+#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8723F /* hal_com.c */ -+ -+#define REG_WOWLAN_WAKE_REASON 0x01C7 /* hal_com.c */ -+#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8723F /* hal_com.c */ -+#define REG_FIFOPAGE REG_FIFOPAGE_INFO_8723F /* hal_com.c */ -+#define REG_RXPKTBUF_CTRL REG_PKTBUF_DBG_CTRL_8723F /* hal_com.c */ -+#define REG_WKFMCAM_NUM REG_WKFMCAM_CMD_8723F /* hal_com.c */ -+#define REG_RSV_CTRL REG_REG_ACCESS_CTRL_8723F /* hal_com.c */ -+#define REG_CAMCMD REG_KEYCAMCMD_8723F /* hal_com.c */ -+#define REG_CAMWRITE REG_KEYCAM_WD_8723F /* hal_com.c */ -+ -+#define BIT_AUTO_SYNC_BY_TBTT BIT_EN_TSFAUTO_SYNC_8723F /* hal_com.c */ -+#define BIT_DIS_ATIM_ROOT_8723F 23 /* REG_HIQ_NO_LMT_EN_V2[23], disable ATIM ROOT */ -+#define BIT_SECCAM_POLLING_8723F BIT_KEYCAM_POLLING_8723F /* rtl8723f_ops.c */ -+#define BIT_GET_NETYPE2 BIT_GET_P2_NETSTATE_8723F /* hal_halmac.c */ -+#define BIT_GET_NETYPE3 BIT_GET_P3_NETSTATE_8723F /* hal_halmac.c */ -+#define BIT_GET_NETYPE4 BIT_GET_P4_NETSTATE_8723F /* hal_halmac.c */ -+ -+#ifdef CONFIG_WOW_PATTERN_IN_TXFIFO -+/* todo: 8723F , need to check in the future */ -+#define REG_TXBUF_WKCAM_OFFSET 0x1B4 //BIT_TXBUF_WKCAM_OFFSET [24:12] -+#define REG_PKT_BUFF_ACCESS_CTRL 0x106 /* hal_com.c */ -+#endif -+ -+/* RXERR_RPT, for rtw_mp.c */ -+#define RXERR_TYPE_OFDM_PPDU 0 -+#define RXERR_TYPE_OFDM_FALSE_ALARM 2 -+#define RXERR_TYPE_OFDM_MPDU_OK 0 -+#define RXERR_TYPE_OFDM_MPDU_FAIL 1 -+#define RXERR_TYPE_CCK_PPDU 3 -+#define RXERR_TYPE_CCK_FALSE_ALARM 5 -+#define RXERR_TYPE_CCK_MPDU_OK 3 -+#define RXERR_TYPE_CCK_MPDU_FAIL 4 -+#define RXERR_TYPE_HT_PPDU 8 -+#define RXERR_TYPE_HT_FALSE_ALARM 9 -+#define RXERR_TYPE_HT_MPDU_TOTAL 6 -+#define RXERR_TYPE_HT_MPDU_OK 6 -+#define RXERR_TYPE_HT_MPDU_FAIL 7 -+#define RXERR_TYPE_RX_FULL_DROP 10 -+ -+#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8723F -+#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8723F -+#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8723F(type) \ -+ | ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8723F : 0)) -+ -+/* -+ * BB Register definition -+ */ -+#define rPMAC_Reset 0x100 /* hal_mp.c */ -+ -+#define rFPGA0_RFMOD 0x800 -+#define rFPGA0_TxInfo 0x804 -+#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */ -+#define rFPGA0_TxGainStage 0x80C /* phydm only */ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */ -+#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */ -+#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */ -+#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */ -+#define rTxAGC_B_Mcs03_Mcs00 0x83C -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84C -+#define rFPGA0_XA_RFInterfaceOE 0x860 -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86C -+#define rFPGA0_XAB_RFInterfaceSW 0x870 -+#define rFPGA0_XAB_RFParameter 0x878 -+#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */ -+#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */ -+#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8723f_phy.c) */ -+ -+#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */ -+#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */ -+ -+#define rFPGA1_TxInfo 0x90C /* hal_mp.c */ -+#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */ -+/* TX BeamForming */ -+#define REG_BB_TX_PATH_SEL_1_8723F 0x93C /* rtl8723f_phy.c */ -+#define REG_BB_TX_PATH_SEL_2_8723F 0x940 /* rtl8723f_phy.c */ -+ -+/* TX BeamForming */ -+#define REG_BB_TXBF_ANT_SET_BF1_8723F 0x19AC /* rtl8723f_phy.c */ -+#define REG_BB_TXBF_ANT_SET_BF0_8723F 0x19B4 /* rtl8723f_phy.c */ -+ -+#define rCCK0_System 0xA00 -+#define rCCK0_AFESetting 0xA04 -+ -+#define rCCK0_DSPParameter2 0xA1C -+#define rCCK0_TxFilter1 0xA20 -+#define rCCK0_TxFilter2 0xA24 -+#define rCCK0_DebugPort 0xA28 -+#define rCCK0_FalseAlarmReport 0xA2C -+ -+#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */ -+#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */ -+ -+#define rOFDM0_TRxPathEnable 0xC04 -+#define rOFDM0_TRMuxPar 0xC08 -+#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */ -+#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */ -+#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */ -+#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */ -+#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */ -+#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */ -+#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */ -+#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */ -+ -+#define rOFDM1_LSTF 0xD00 -+#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */ -+#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8723f_phy.c) */ -+#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8723f_phy.c) */ -+#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8723f_phy.c) */ -+#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8723f_phy.c) */ -+ -+#define rTxAGC_A_Rate18_06 0xE00 -+#define rTxAGC_A_Rate54_24 0xE04 -+#define rTxAGC_A_CCK1_Mcs32 0xE08 -+#define rTxAGC_A_Mcs03_Mcs00 0xE10 -+#define rTxAGC_A_Mcs07_Mcs04 0xE14 -+#define rTxAGC_A_Mcs11_Mcs08 0xE18 -+#define rTxAGC_A_Mcs15_Mcs12 0xE1C -+#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */ -+#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */ -+#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */ -+/* RFE */ -+#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */ -+#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */ -+#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */ -+#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */ -+#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */ -+#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */ -+#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */ -+#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */ -+#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */ -+#define bMask_RFEInv_Jaguar 0x3FF00000 -+#define bMask_AntselPathFollow_Jaguar 0x00030000 -+ -+#define rC_RFE_Pinmux_Jaguar 0x18B4 /* Path_C RFE cotrol pinmux*/ -+#define rD_RFE_Pinmux_Jaguar 0x1AB4 /* Path_D RFE cotrol pinmux*/ -+#define rA_RFE_Sel_Jaguar2 0x1990 -+ -+/* Page1(0x100) */ -+#define bBBResetB 0x100 -+ -+/* Page8(0x800) */ -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+/* Reg 0x80C rFPGA0_TxGainStage */ -+#define bXBTxAGC 0xF00 -+#define bXCTxAGC 0xF000 -+#define bXDTxAGC 0xF0000 -+ -+/* PageA(0xA00) */ -+#define bCCKBBMode 0x3 -+ -+#define bCCKScramble 0x8 -+#define bCCKTxRate 0x3000 -+ -+/* General */ -+#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */ -+#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */ -+#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */ -+#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */ -+#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */ -+#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */ -+#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */ -+ -+#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */ -+#define bDisable 0x0 /* rtw_mp.c */ -+ -+#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */ -+ -+#define Rx_Smooth_Factor 20 /* phydm only */ -+ -+/* -+ * RF Register definition -+ */ -+#define RF_AC 0x00 -+#define RF_AC_Jaguar 0x00 /* hal_mp.c */ -+#define RF_CHNLBW 0x18 /* rtl8723f_phy.c */ -+#define RF_ModeTableAddr 0x30 /* rtl8723f_phy.c */ -+#define RF_ModeTableData0 0x31 /* rtl8723f_phy.c */ -+#define RF_ModeTableData1 0x32 /* rtl8723f_phy.c */ -+#define RF_0x52 0x52 -+#define RF_WeLut_Jaguar 0xEF /* rtl8723f_phy.c */ -+ -+/* rtw_lps_state_chk() @hal_com.c */ -+#define BIT_PWRBIT_OW_EN BIT_WMAC_TCR_PWRMGT_CTL_8723F -+ -+ -+/* -+* Structure -+*/ -+struct qinfo_8723f { -+ u32 head:8; -+ u32 pkt_num:7; -+ u32 tail:8; -+ u32 ac:2; -+ u32 macid:7; -+}; -+ -+struct bcn_qinfo_8723f { -+ u16 head:8; -+ u16 pkt_num:8; -+}; -+ -+ -+/* -+* General Functions -+*/ -+void rtl8723f_init_hal_spec(PADAPTER); /* hal/hal_com.c */ -+ -+#ifdef CONFIG_MP_INCLUDED -+/* MP Functions */ -+#include /* struct mp_priv */ -+void rtl8723f_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */ -+void rtl8723f_mp_config_rfpath(PADAPTER); /* hal_mp.c */ -+#endif -+void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus); -+ -+#ifdef CONFIG_USB_HCI -+#include -+#elif defined(CONFIG_SDIO_HCI) -+#include -+#endif -+ -+#endif /* _RTL8723F_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8723fs_hal.h b/drivers/staging/rtl8723cs/include/rtl8723fs_hal.h -new file mode 100644 -index 000000000000..f1b938af6cc0 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723fs_hal.h -@@ -0,0 +1,31 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8723FS_HAL_H_ -+#define _RTL8723FS_HAL_H_ -+ -+#include /* PADAPTER */ -+ -+/* rtl8723fs_ops.c */ -+void rtl8723fs_set_hal_ops(PADAPTER); -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+void rtl8723fs_disable_interrupt_but_cpwm2(PADAPTER adapter); -+#endif -+ -+/* rtl8723fs_xmit.c */ -+s32 rtl8723fs_dequeue_writeport(PADAPTER); -+#define _dequeue_writeport(a) rtl8723fs_dequeue_writeport(a) -+ -+#endif /* _RTL8723FS_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8723fu_hal.h b/drivers/staging/rtl8723cs/include/rtl8723fu_hal.h -new file mode 100644 -index 000000000000..69de77600bbc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8723fu_hal.h -@@ -0,0 +1,61 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8723FU_HAL_H_ -+#define _RTL8723FU_HAL_H_ -+ -+#ifdef CONFIG_USB_HCI -+ #include /* PADAPTER */ -+ -+ #ifdef CONFIG_USB_HCI -+ #ifdef USB_PACKET_OFFSET_SZ -+ #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) -+ #else -+ #define PACKET_OFFSET_SZ (8) -+ #endif -+ #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) -+ #endif -+ -+ /* undefine MAX_RECVBUF_SZ from rtl8723f_hal.h */ -+ #ifdef MAX_RECVBUF_SZ -+ #undef MAX_RECVBUF_SZ -+ #endif -+ -+ /* recv_buffer must be large than usb agg size */ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 -+ #define MAX_RECVBUF_SZ (15360) /* 15k */ -+ #elif defined(CONFIG_PLATFORM_HISILICON) -+ /* use 16k to workaround for HISILICON platform */ -+ #define MAX_RECVBUF_SZ (16384) -+ #else -+ #define MAX_RECVBUF_SZ (32768) -+ #endif -+ #else -+ #define MAX_RECVBUF_SZ (4000) -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+ /* rtl8723fu_ops.c */ -+ void rtl8723fu_set_hal_ops(PADAPTER padapter); -+ void rtl8723fu_set_hw_type(struct dvobj_priv *pdvobj); -+ -+ /* rtl8723fu_io.c */ -+ void rtl8723fu_set_intf_ops(struct _io_ops *pops); -+ -+#endif /* CONFIG_USB_HCI */ -+ -+ -+#endif /* _RTL8723FU_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8812a_cmd.h b/drivers/staging/rtl8723cs/include/rtl8812a_cmd.h -new file mode 100644 -index 000000000000..4a3473683bb7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8812a_cmd.h -@@ -0,0 +1,152 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8812A_CMD_H__ -+#define __RTL8812A_CMD_H__ -+ -+typedef enum _RTL8812_H2C_CMD { -+ H2C_8812_RSVDPAGE = 0, -+ H2C_8812_MSRRPT = 1, -+ H2C_8812_SCAN = 2, -+ H2C_8812_KEEP_ALIVE_CTRL = 3, -+ H2C_8812_DISCONNECT_DECISION = 4, -+ -+ H2C_8812_INIT_OFFLOAD = 6, -+ H2C_8812_AP_OFFLOAD = 8, -+ H2C_8812_BCN_RSVDPAGE = 9, -+ H2C_8812_PROBERSP_RSVDPAGE = 10, -+ -+ H2C_8812_SETPWRMODE = 0x20, -+ H2C_8812_PS_TUNING_PARA = 0x21, -+ H2C_8812_PS_TUNING_PARA2 = 0x22, -+ H2C_8812_PS_LPS_PARA = 0x23, -+ H2C_8812_P2P_PS_OFFLOAD = 0x24, -+ H2C_8812_INACTIVE_PS = 0x27, -+ H2C_8812_RA_MASK = 0x40, -+ H2C_8812_TxBF = 0x41, -+ H2C_8812_RSSI_REPORT = 0x42, -+ H2C_8812_IQ_CALIBRATION = 0x45, -+ H2C_8812_RA_PARA_ADJUST = 0x46, -+ -+ H2C_8812_BT_FW_PATCH = 0x6a, -+ -+ H2C_8812_WO_WLAN = 0x80, -+ H2C_8812_REMOTE_WAKE_CTRL = 0x81, -+ H2C_8812_AOAC_GLOBAL_INFO = 0x82, -+ H2C_8812_AOAC_RSVDPAGE = 0x83, -+ H2C_8812_FW_SWCHANNL = 0x87, -+ -+ H2C_8812_TSF_RESET = 0xC0, -+ -+ MAX_8812_H2CCMD -+} RTL8812_H2C_CMD; -+ -+struct cmd_msg_parm { -+ u8 eid; /* element id */ -+ u8 sz; /* sz */ -+ u8 buf[6]; -+}; -+ -+enum { -+ PWRS -+}; -+ -+struct H2C_SS_RFOFF_PARAM { -+ u8 ROFOn; /* 1: on, 0:off */ -+ u16 gpio_period; /* unit: 1024 us */ -+} __attribute__((packed)); -+ -+ -+ -+/* _RSVDPAGE_LOC_CMD0 */ -+#define SET_8812_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8812_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8812_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8812_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8812_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+/* _SETPWRMODE_PARM */ -+#define SET_8812_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8812_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_8812_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_8812_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8812_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8812_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -+#define SET_8812_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+#define GET_8812_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) -+ -+/* _P2P_PS_OFFLOAD */ -+#define SET_8812_H2CCMD_P2P_PS_OFFLOAD_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8812_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8812_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_8812_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+#define SET_8812_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -+#define SET_8812_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) -+#define SET_8812_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) -+ -+ -+void set_ra_ldpc_8812(struct cmn_sta_info *cmn_sta_info, BOOLEAN bLDPC); -+ -+/* host message to firmware cmd */ -+s32 fill_h2c_cmd_8812(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+void rtl8812_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode); -+void rtl8812_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); -+u8 rtl8812_set_rssi_cmd(PADAPTER padapter, u8 *param); -+void rtl8812_set_wowlan_cmd(_adapter *padapter, u8 enable); -+u8 GetTxBufferRsvdPageNum8812(_adapter *padapter, bool wowlan); -+ -+#ifdef CONFIG_BT_COEXIST -+void rtl8812a_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -+#endif /* CONFIG_BT_COEXIST */ -+#ifdef CONFIG_P2P_PS -+void rtl8812_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_FWLPS_IN_IPS -+void rtl8812_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); -+#endif -+ -+/* ------------------------------------ -+ * C2H format -+ * ------------------------------------ */ -+ -+/* TX Beamforming */ -+#define GET_8812_C2H_TXBF_ORIGINATE(_Header) LE_BITS_TO_1BYTE(_Header, 0, 8) -+#define GET_8812_C2H_TXBF_MACID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) -+ -+ -+ -+/* / TX Feedback Content */ -+#define USEC_UNIT_FOR_8812_C2H_TX_RPT_QUEUE_TIME 256 -+ -+#define GET_8812_C2H_TX_RPT_QUEUE_SELECT(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 5) -+#define GET_8812_C2H_TX_RPT_PKT_BROCAST(_Header) LE_BITS_TO_1BYTE((_Header + 0), 5, 1) -+#define GET_8812_C2H_TX_RPT_LIFE_TIME_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 6, 1) -+#define GET_8812_C2H_TX_RPT_RETRY_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 7, 1) -+#define GET_8812_C2H_TX_RPT_MAC_ID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) -+#define GET_8812_C2H_TX_RPT_DATA_RETRY_CNT(_Header) LE_BITS_TO_1BYTE((_Header + 2), 0, 6) -+#define GET_8812_C2H_TX_RPT_QUEUE_TIME(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) /* In unit of 256 microseconds. */ -+#define GET_8812_C2H_TX_RPT_FINAL_DATA_RATE(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8) -+ -+/* BT_FW_PATCH */ -+#define SET_8812_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) -+#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((u8 *)(__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((u8 *)(__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((u8 *)(__pH2CCmd)+4, 0, 8, __Value) -+#define SET_8812_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((u8 *)(__pH2CCmd)+5, 0, 8, __Value) -+ -+s32 c2h_handler_8812a(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); -+ -+#endif/* __RTL8812A_CMD_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8812a_dm.h b/drivers/staging/rtl8723cs/include/rtl8812a_dm.h -new file mode 100644 -index 000000000000..21a9abaa6118 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8812a_dm.h -@@ -0,0 +1,27 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8812A_DM_H__ -+#define __RTL8812A_DM_H__ -+ -+void rtl8812_init_dm_priv(PADAPTER Adapter); -+void rtl8812_deinit_dm_priv(PADAPTER Adapter); -+void rtl8812_InitHalDm(PADAPTER Adapter); -+void rtl8812_HalDmWatchDog(PADAPTER Adapter); -+ -+/* void rtl8192c_dm_CheckTXPowerTracking(PADAPTER Adapter); */ -+ -+/* void rtl8192c_dm_RF_Saving(PADAPTER pAdapter, u8 bForceInNormal); */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8812a_hal.h b/drivers/staging/rtl8723cs/include/rtl8812a_hal.h -new file mode 100644 -index 000000000000..3082c67c9e25 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8812a_hal.h -@@ -0,0 +1,369 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8812A_HAL_H__ -+#define __RTL8812A_HAL_H__ -+ -+/* #include "hal_com.h" */ -+#include "hal_data.h" -+ -+/* include HAL Related header after HAL Related compiling flags */ -+#include "rtl8812a_spec.h" -+#include "rtl8812a_rf.h" -+#include "rtl8812a_dm.h" -+#include "rtl8812a_recv.h" -+#include "rtl8812a_xmit.h" -+#include "rtl8812a_cmd.h" -+#include "rtl8812a_led.h" -+#include "Hal8812PwrSeq.h" -+#include "Hal8821APwrSeq.h" /* for 8821A/8811A */ -+#include "Hal8812PhyReg.h" -+#include "Hal8812PhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+#include "rtl8812a_sreset.h" -+#endif -+ -+/* --------------------------------------------------------------------- -+ * RTL8812 Power Configuration CMDs for PCIe interface -+ * --------------------------------------------------------------------- */ -+#define Rtl8812_NIC_PWR_ON_FLOW rtl8812_power_on_flow -+#define Rtl8812_NIC_RF_OFF_FLOW rtl8812_radio_off_flow -+#define Rtl8812_NIC_DISABLE_FLOW rtl8812_card_disable_flow -+#define Rtl8812_NIC_ENABLE_FLOW rtl8812_card_enable_flow -+#define Rtl8812_NIC_SUSPEND_FLOW rtl8812_suspend_flow -+#define Rtl8812_NIC_RESUME_FLOW rtl8812_resume_flow -+#define Rtl8812_NIC_PDN_FLOW rtl8812_hwpdn_flow -+#define Rtl8812_NIC_LPS_ENTER_FLOW rtl8812_enter_lps_flow -+#define Rtl8812_NIC_LPS_LEAVE_FLOW rtl8812_leave_lps_flow -+ -+/* --------------------------------------------------------------------- -+ * RTL8821 Power Configuration CMDs for PCIe interface -+ * --------------------------------------------------------------------- */ -+#define Rtl8821A_NIC_PWR_ON_FLOW rtl8821A_power_on_flow -+#define Rtl8821A_NIC_RF_OFF_FLOW rtl8821A_radio_off_flow -+#define Rtl8821A_NIC_DISABLE_FLOW rtl8821A_card_disable_flow -+#define Rtl8821A_NIC_ENABLE_FLOW rtl8821A_card_enable_flow -+#define Rtl8821A_NIC_SUSPEND_FLOW rtl8821A_suspend_flow -+#define Rtl8821A_NIC_RESUME_FLOW rtl8821A_resume_flow -+#define Rtl8821A_NIC_PDN_FLOW rtl8821A_hwpdn_flow -+#define Rtl8821A_NIC_LPS_ENTER_FLOW rtl8821A_enter_lps_flow -+#define Rtl8821A_NIC_LPS_LEAVE_FLOW rtl8821A_leave_lps_flow -+ -+ -+#if 1 /* download firmware related data structure */ -+#define FW_SIZE_8812 0x8000 /* Compatible with RTL8723 Maximal RAM code size 24K. modified to 32k, TO compatible with 92d maximal fw size 32k */ -+#define FW_START_ADDRESS 0x1000 -+#define FW_END_ADDRESS 0x5FFF -+ -+ -+ -+typedef struct _RT_FIRMWARE_8812 { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[FW_SIZE_8812]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8812, *PRT_FIRMWARE_8812; -+ -+/* -+ * This structure must be cared byte-ordering -+ * -+ * Added by tynli. 2009.12.04. */ -+#define IS_FW_HEADER_EXIST_8812(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) & 0xFFF0) == 0x9500) -+ -+#define IS_FW_HEADER_EXIST_8821(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) & 0xFFF0) == 0x2100) -+/* ***************************************************** -+ * Firmware Header(8-byte alinment required) -+ * ***************************************************** -+ * --- LONG WORD 0 ---- */ -+#define GET_FIRMWARE_HDR_SIGNATURE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ -+#define GET_FIRMWARE_HDR_CATEGORY_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) /* AP/NIC and USB/PCI */ -+#define GET_FIRMWARE_HDR_FUNCTION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -+#define GET_FIRMWARE_HDR_VERSION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)/* FW Version */ -+#define GET_FIRMWARE_HDR_SUB_VER_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) /* FW Subversion, default 0x00 */ -+#define GET_FIRMWARE_HDR_RSVD1_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) -+ -+/* --- LONG WORD 1 ---- */ -+#define GET_FIRMWARE_HDR_MONTH_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) /* Release time Month field */ -+#define GET_FIRMWARE_HDR_DATE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) /* Release time Date field */ -+#define GET_FIRMWARE_HDR_HOUR_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)/* Release time Hour field */ -+#define GET_FIRMWARE_HDR_MINUTE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)/* Release time Minute field */ -+#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)/* The size of RAM code */ -+#define GET_FIRMWARE_HDR_RSVD2_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) -+ -+/* --- LONG WORD 2 ---- */ -+#define GET_FIRMWARE_HDR_SVN_IDX_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)/* The SVN entry index */ -+#define GET_FIRMWARE_HDR_RSVD3_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) -+ -+/* --- LONG WORD 3 ---- */ -+#define GET_FIRMWARE_HDR_RSVD4_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) -+#define GET_FIRMWARE_HDR_RSVD5_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) -+ -+#endif /* download firmware related data structure */ -+ -+ -+#define DRIVER_EARLY_INT_TIME_8812 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8812 0x02 -+ -+/* for 8812 -+ * TX 128K, RX 16K, Page size 512B for TX, 128B for RX */ -+#define MAX_RX_DMA_BUFFER_SIZE_8812 0x3E80 /* RX 16K */ -+ -+#ifdef CONFIG_WOWLAN -+ #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -+#else -+ #define RESV_FMWF 0 -+#endif -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8812 0x100 /* 256B, reserved for c2h debug message */ -+#else -+ #define RX_DMA_RESERVED_SIZE_8812 0x0 /* 0B */ -+#endif -+#define RX_DMA_BOUNDARY_8812 (MAX_RX_DMA_BUFFER_SIZE_8812 - RX_DMA_RESERVED_SIZE_8812 - 1) -+ -+#define PAGE_SIZE_TX_8812A PAGE_SIZE_512 -+ -+/* Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8812A -+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -+#define BCNQ_PAGE_NUM_8812 (MAX_BEACON_LEN / PAGE_SIZE_TX_8812A + 6) /*0x07*/ -+ -+/* For WoWLan , more reserved page -+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, AOAC rpt: 1,PNO: 6 -+ * NS offload: 1 NDP info: 1 -+ */ -+#ifdef CONFIG_WOWLAN -+ #define WOWLAN_PAGE_NUM_8812 0x08 -+#else -+ #define WOWLAN_PAGE_NUM_8812 0x00 -+#endif -+ -+ -+#ifdef CONFIG_BEAMFORMER_FW_NDPA -+ #define FW_NDPA_PAGE_NUM 0x02 -+#else -+ #define FW_NDPA_PAGE_NUM 0x00 -+#endif -+ -+#ifdef DBG_FW_DEBUG_MSG_PKT -+ #define FW_DBG_MSG_PKT_PAGE_NUM_8812 0x01 -+#else -+ #define FW_DBG_MSG_PKT_PAGE_NUM_8812 0x00 -+#endif /*DBG_FW_DEBUG_MSG_PKT*/ -+ -+#define TX_TOTAL_PAGE_NUMBER_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812 - FW_NDPA_PAGE_NUM - FW_DBG_MSG_PKT_PAGE_NUM_8812) -+#define TX_PAGE_BOUNDARY_8812 (TX_TOTAL_PAGE_NUMBER_8812 + 1) -+ -+#define TX_PAGE_BOUNDARY_WOWLAN_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812 + 1) -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 TX_TOTAL_PAGE_NUMBER_8812 -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8812 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 + 1) -+ -+/* For Normal Chip Setting -+ * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8812 */ -+#define NORMAL_PAGE_NUM_LPQ_8812 0x10 -+#define NORMAL_PAGE_NUM_HPQ_8812 0x10 -+#define NORMAL_PAGE_NUM_NPQ_8812 0x00 -+ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8812 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8812 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8812 0x20 -+ -+ -+/* for 8821A -+ * TX 64K, RX 16K, Page size 256B for TX, 128B for RX */ -+#define PAGE_SIZE_TX_8821A 256 -+#define PAGE_SIZE_RX_8821A 128 -+ -+#define MAX_RX_DMA_BUFFER_SIZE_8821 0x3E80 /* RX 16K */ -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8821 0x100 /* 256B, reserved for c2h debug message */ -+#else -+ #define RX_DMA_RESERVED_SIZE_8821 0x0 /* 0B */ -+#endif -+#define RX_DMA_BOUNDARY_8821 (MAX_RX_DMA_BUFFER_SIZE_8821 - RX_DMA_RESERVED_SIZE_8821 - 1) -+ -+/* Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8821A -+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -+ -+#define BCNQ_PAGE_NUM_8821 (MAX_BEACON_LEN / PAGE_SIZE_TX_8821A + 6) /*0x08*/ -+ -+ -+/* For WoWLan , more reserved page -+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6 */ -+#ifdef CONFIG_WOWLAN -+ #define WOWLAN_PAGE_NUM_8821 0x06 -+#else -+ #define WOWLAN_PAGE_NUM_8821 0x00 -+#endif -+ -+#define TX_TOTAL_PAGE_NUMBER_8821 (0xFF - BCNQ_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821) -+#define TX_PAGE_BOUNDARY_8821 (TX_TOTAL_PAGE_NUMBER_8821 + 1) -+/* #define TX_PAGE_BOUNDARY_WOWLAN_8821 0xE0 */ -+ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 TX_TOTAL_PAGE_NUMBER_8821 -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8821 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 + 1) -+ -+ -+/* (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER */ -+#define NORMAL_PAGE_NUM_LPQ_8821 0x08/* 0x10 */ -+#define NORMAL_PAGE_NUM_HPQ_8821 0x08/* 0x10 */ -+#define NORMAL_PAGE_NUM_NPQ_8821 0x00 -+#define NORMAL_PAGE_NUM_EPQ_8821 0x04 -+ -+#define WMM_NORMAL_PAGE_NUM_HPQ_8821 0x30 -+#define WMM_NORMAL_PAGE_NUM_LPQ_8821 0x20 -+#define WMM_NORMAL_PAGE_NUM_NPQ_8821 0x20 -+#define WMM_NORMAL_PAGE_NUM_EPQ_8821 0x00 -+ -+#define MCC_NORMAL_PAGE_NUM_HPQ_8821 0x10 -+#define MCC_NORMAL_PAGE_NUM_LPQ_8821 0x10 -+#define MCC_NORMAL_PAGE_NUM_NPQ_8821 0x10 -+ -+#define EFUSE_HIDDEN_812AU 0 -+#define EFUSE_HIDDEN_812AU_VS 1 -+#define EFUSE_HIDDEN_812AU_VL 2 -+#define EFUSE_HIDDEN_812AU_VN 3 -+ -+#if 0 -+#define EFUSE_REAL_CONTENT_LEN_JAGUAR 1024 -+#define HWSET_MAX_SIZE_JAGUAR 1024 -+#else -+#define EFUSE_REAL_CONTENT_LEN_JAGUAR 512 -+#define HWSET_MAX_SIZE_JAGUAR 512 -+#endif -+ -+#define EFUSE_MAX_BANK_8812A 2 -+#define EFUSE_MAP_LEN_JAGUAR 512 -+#define EFUSE_MAX_SECTION_JAGUAR 64 -+#define EFUSE_MAX_WORD_UNIT_JAGUAR 4 -+#define EFUSE_IC_ID_OFFSET_JAGUAR 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -+#define AVAILABLE_EFUSE_ADDR_8812(addr) (addr < EFUSE_REAL_CONTENT_LEN_JAGUAR) -+/* To prevent out of boundary programming case, leave 1byte and program full section -+ * 9bytes + 1byt + 5bytes and pre 1byte. -+ * For worst case: -+ * | 2byte|----8bytes----|1byte|--7bytes--| */ /* 92D */ -+#define EFUSE_OOB_PROTECT_BYTES_JAGUAR 18 /* PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. */ -+#define EFUSE_PROTECT_BYTES_BANK_JAGUAR 16 -+ -+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) -+ -+/* #define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) */ -+ -+/* #define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) */ -+#define HAL_EFUSE_MEMORY -+ -+/* ******************************************************** -+ * EFUSE for BT definition -+ * ******************************************************** */ -+#define BANK_NUM 2 -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 -+#define EFUSE_BT_REAL_CONTENT_LEN \ -+ (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM) -+#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -+#define EFUSE_BT_MAX_SECTION (EFUSE_BT_MAP_LEN / 8) -+#define EFUSE_PROTECT_BYTES_BANK 16 -+ -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_BT_REAL_CONTENT_LEN) -+ -+#ifdef CONFIG_FILE_FWIMG -+extern char *rtw_fw_file_path; -+#ifdef CONFIG_WOWLAN -+extern char *rtw_fw_wow_file_path; -+#endif -+#ifdef CONFIG_MP_INCLUDED -+extern char *rtw_fw_mp_bt_file_path; -+#endif -+#endif -+ -+ -+/* rtl8812_hal_init.c */ -+void _8051Reset8812(PADAPTER padapter); -+s32 FirmwareDownload8812(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); -+void InitializeFirmwareVars8812(PADAPTER padapter); -+ -+s32 _LLTWrite_8812A(PADAPTER Adapter, u32 address, u32 data); -+s32 InitLLTTable8812A(PADAPTER padapter, u8 txpktbuf_bndy); -+void InitRDGSetting8812A(PADAPTER padapter); -+ -+void CheckAutoloadState8812A(PADAPTER padapter); -+ -+/* EFuse */ -+u8 GetEEPROMSize8812A(PADAPTER padapter); -+void InitPGData8812A(PADAPTER padapter); -+void Hal_EfuseParseIDCode8812A(PADAPTER padapter, u8 *hwinfo); -+void Hal_ReadPROMVersion8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadTxPowerInfo8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadBoardType8812A(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadThermalMeter_8812A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadChannelPlan8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_EfuseParseXtal_8812A(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void Hal_ReadAntennaDiversity8812A(PADAPTER pAdapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -+void Hal_ReadAmplifierType_8812A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadPAType_8821A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_ReadRFEType_8812A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void Hal_EfuseParseBTCoexistInfo8812A(PADAPTER Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+#ifdef CONFIG_MP_INCLUDED -+int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -+#endif -+void Hal_ReadRemoteWakeup_8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+ -+BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); -+void Hal_EfuseParseKFreeData_8821A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+ -+#ifdef CONFIG_WOWLAN -+void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif /* CONFIG_WOWLAN */ -+ -+void _InitBeaconParameters_8812A(PADAPTER padapter); -+void SetBeaconRelatedRegisters8812A(PADAPTER padapter); -+ -+void ReadRFType8812A(PADAPTER padapter); -+void InitDefaultValue8821A(PADAPTER padapter); -+ -+u8 SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); -+void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval); -+u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+void rtl8812_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8812a(_adapter *adapter); -+void init_hal_spec_8821a(_adapter *adapter); -+ -+u32 upload_txpktbuf_8812au(_adapter *adapter, u8 *buf, u32 buflen); -+ -+void rtl8812_start_thread(PADAPTER padapter); -+void rtl8812_stop_thread(PADAPTER padapter); -+ -+#ifdef CONFIG_PCI_HCI -+BOOLEAN InterruptRecognized8812AE(PADAPTER Adapter); -+void UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+void InitTRXDescHwAddress8812AE(PADAPTER Adapter); -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); -+#endif -+ -+void -+Hal_PatchwithJaguar_8812( -+ PADAPTER Adapter, -+ RT_MEDIA_STATUS MediaStatus -+); -+ -+#endif /* __RTL8188E_HAL_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8812a_led.h b/drivers/staging/rtl8723cs/include/rtl8812a_led.h -new file mode 100644 -index 000000000000..30c676e526f3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8812a_led.h -@@ -0,0 +1,41 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8812A_LED_H__ -+#define __RTL8812A_LED_H__ -+#ifdef CONFIG_RTW_LED -+#ifdef CONFIG_RTW_SW_LED -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+#ifdef CONFIG_USB_HCI -+void rtl8812au_InitSwLeds(PADAPTER padapter); -+void rtl8812au_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_PCI_HCI -+void rtl8812ae_InitSwLeds(PADAPTER padapter); -+void rtl8812ae_DeInitSwLeds(PADAPTER padapter); -+#endif -+#ifdef CONFIG_SDIO_HCI -+void rtl8821as_InitSwLeds(PADAPTER padapter); -+void rtl8821as_DeInitSwLeds(PADAPTER padapter); -+#endif -+#endif/*CONFIG_RTW_SW_LED*/ -+#endif/*#ifdef CONFIG_RTW_LED*/ -+ -+#ifdef CONFIG_SDIO_HCI -+void rtl8821as_init_led_circuit(PADAPTER adapter); -+#endif -+ -+#endif /*__RTL8812A_LED_H__*/ -diff --git a/drivers/staging/rtl8723cs/include/rtl8812a_recv.h b/drivers/staging/rtl8723cs/include/rtl8812a_recv.h -new file mode 100644 -index 000000000000..5fa06e512baf ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8812a_recv.h -@@ -0,0 +1,149 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8812A_RECV_H__ -+#define __RTL8812A_RECV_H__ -+ -+#if defined(CONFIG_USB_HCI) -+ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ -+ #else -+ #define MAX_RECVBUF_SZ (32768) /*32k*/ -+ #endif -+ /* #define MAX_RECVBUF_SZ (24576) */ /* 24k */ -+ /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ -+ /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ -+ /* #define MAX_RECVBUF_SZ (15360) */ /* 15k < 16k */ -+ /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ -+ #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 -+ #undef MAX_RECVBUF_SZ -+ #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ -+ #endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ -+ #else -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+#elif defined(CONFIG_PCI_HCI) -+ /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ -+ /* #define MAX_RECVBUF_SZ (9100) */ -+ /* #else */ -+ #define MAX_RECVBUF_SZ (4000) /* about 4K -+ * #endif */ -+ -+ -+#elif defined(CONFIG_SDIO_HCI) -+ -+ #define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8821 + 1) -+ -+#endif -+ -+ -+/* Rx smooth factor */ -+#define Rx_Smooth_Factor (20) -+ -+/* DWORD 0 */ -+#define SET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) -+ -+#define GET_RX_STATUS_DESC_PKT_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICV_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_LAST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1) -+#define GET_RX_STATUS_DESC_FIRST_SEG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1) -+#define GET_RX_STATUS_DESC_EOR_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_OWN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+ -+/* DWORD 1 */ -+#define GET_RX_STATUS_DESC_MACID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_TID_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_AMSDU_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_A1_FIT_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -+#define GET_RX_STATUS_DESC_CHKERR_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_IPVER_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_IS_TCPUDP__8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_CHK_VLD_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_MC_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) -+ -+/* DWORD 2 */ -+#define GET_RX_STATUS_DESC_SEQ_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -+#define GET_RX_STATUS_DESC_RX_IS_QOS_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_RPT_SEL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -+ -+/* DWORD 3 */ -+#define GET_RX_STATUS_DESC_RX_RATE_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_HTC_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -+#ifdef CONFIG_USB_RX_AGGREGATION -+#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -+#endif -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_MATCH_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) -+ -+/* DWORD 6 */ -+#define GET_RX_STATUS_DESC_SPLCP_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1) -+#define GET_RX_STATUS_DESC_LDPC_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1) -+#define GET_RX_STATUS_DESC_STBC_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1) -+#define GET_RX_STATUS_DESC_BW_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2) -+ -+/* DWORD 5 */ -+#define GET_RX_STATUS_DESC_TSFL_8812(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) -+ -+#define GET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -+#define GET_RX_STATUS_DESC_BUFF_ADDR64_8812(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) -+ -+#define SET_RX_STATUS_DESC_BUFF_ADDR_8812(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) -+ -+ -+#ifdef CONFIG_SDIO_HCI -+s32 InitRecvPriv8821AS(PADAPTER padapter); -+void FreeRecvPriv8821AS(PADAPTER padapter); -+#endif /* CONFIG_SDIO_HCI */ -+ -+#ifdef CONFIG_USB_HCI -+void rtl8812au_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -+s32 rtl8812au_init_recv_priv(PADAPTER padapter); -+void rtl8812au_free_recv_priv(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8812ae_init_recv_priv(PADAPTER padapter); -+void rtl8812ae_free_recv_priv(PADAPTER padapter); -+#endif -+ -+void rtl8812_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8812A_RECV_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8812a_rf.h b/drivers/staging/rtl8723cs/include/rtl8812a_rf.h -new file mode 100644 -index 000000000000..c5d9aaee3fad ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8812a_rf.h -@@ -0,0 +1,28 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8812A_RF_H__ -+#define __RTL8812A_RF_H__ -+ -+void -+PHY_RF6052SetBandwidth8812( -+ PADAPTER Adapter, -+ enum channel_width Bandwidth); -+ -+ -+int -+PHY_RF6052_Config_8812( -+ PADAPTER Adapter); -+ -+#endif/* __RTL8188E_RF_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8812a_spec.h b/drivers/staging/rtl8723cs/include/rtl8812a_spec.h -new file mode 100644 -index 000000000000..37ba2472296c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8812a_spec.h -@@ -0,0 +1,263 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8812A_SPEC_H__ -+#define __RTL8812A_SPEC_H__ -+ -+#include -+ -+ -+/* ************************************************************ -+* 8812 Regsiter offset definition -+* ************************************************************ */ -+ -+/* ************************************************************ -+* -+* ************************************************************ */ -+ -+/* ----------------------------------------------------- -+* -+* 0x0000h ~ 0x00FFh System Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_SYS_CLKR_8812A 0x0008 -+#define REG_AFE_PLL_CTRL_8812A 0x0028 -+#define REG_HSIMR_8812 0x0058 -+#define REG_HSISR_8812 0x005c -+#define REG_GPIO_EXT_CTRL 0x0060 -+#define REG_GPIO_STATUS_8812 0x006C -+#define REG_SDIO_CTRL_8812 0x0070 -+#define REG_OPT_CTRL_8812 0x0074 -+#define REG_RF_B_CTRL_8812 0x0076 -+#define REG_FW_DRV_MSG_8812 0x0088 -+#define REG_HMEBOX_E2_E3_8812 0x008C -+#define REG_HIMR0_8812 0x00B0 -+#define REG_HISR0_8812 0x00B4 -+#define REG_HIMR1_8812 0x00B8 -+#define REG_HISR1_8812 0x00BC -+#define REG_EFUSE_BURN_GNT_8812 0x00CF -+#define REG_SYS_CFG1_8812 0x00FC -+ -+/* ----------------------------------------------------- -+* -+* 0x0100h ~ 0x01FFh MACTOP General Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_CR_8812A 0x100 -+#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) -+#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) -+#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) -+#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN -+ -+#define REG_RSVD3_8812 0x0168 -+#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -+#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -+#define REG_C2HEVT_CMD_LEN_88XX 0x01AE -+ -+#define REG_HMEBOX_EXT0_8812 0x01F0 -+#define REG_HMEBOX_EXT1_8812 0x01F4 -+#define REG_HMEBOX_EXT2_8812 0x01F8 -+#define REG_HMEBOX_EXT3_8812 0x01FC -+ -+/* ----------------------------------------------------- -+* -+* 0x0200h ~ 0x027Fh TXDMA Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_DWBCN0_CTRL_8812 REG_TDECTRL -+#define REG_DWBCN1_CTRL_8812 0x0228 -+ -+/* ----------------------------------------------------- -+* -+* 0x0280h ~ 0x02FFh RXDMA Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_TDECTRL_8812A 0x0208 -+#define REG_RXDMA_CONTROL_8812A 0x0286 /*Control the RX DMA.*/ -+#define REG_RXDMA_PRO_8812 0x0290 -+#define REG_EARLY_MODE_CONTROL_8812 0x02BC -+#define REG_RSVD5_8812 0x02F0 -+#define REG_RSVD6_8812 0x02F4 -+#define REG_RSVD7_8812 0x02F8 -+#define REG_RSVD8_8812 0x02FC -+ -+ -+/* ----------------------------------------------------- -+* -+* 0x0300h ~ 0x03FFh PCIe -+* -+* ----------------------------------------------------- */ -+#define REG_PCIE_CTRL_REG_8812A 0x0300 -+#define REG_DBI_WDATA_8812 0x0348 /* DBI Write Data */ -+#define REG_DBI_RDATA_8812 0x034C /* DBI Read Data */ -+#define REG_DBI_ADDR_8812 0x0350 /* DBI Address */ -+#define REG_DBI_FLAG_8812 0x0352 /* DBI Read/Write Flag */ -+#define REG_MDIO_WDATA_8812 0x0354 /* MDIO for Write PCIE PHY */ -+#define REG_MDIO_RDATA_8812 0x0356 /* MDIO for Reads PCIE PHY */ -+#define REG_MDIO_CTL_8812 0x0358 /* MDIO for Control */ -+#define REG_PCIE_HRPWM_8812A 0x0361 /* PCIe RPWM */ -+#define REG_PCIE_HCPWM_8812A 0x0363 /* PCIe CPWM */ -+ -+#define REG_PCIE_MULTIFET_CTRL_8812 0x036A /* PCIE Multi-Fethc Control */ -+ -+/* ----------------------------------------------------- -+* -+* 0x0400h ~ 0x047Fh Protocol Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_TXPKT_EMPTY_8812A 0x041A -+#define REG_FWHW_TXQ_CTRL_8812A 0x0420 -+#define REG_TXBF_CTRL_8812A 0x042C -+#define REG_ARFR0_8812 0x0444 -+#define REG_ARFR1_8812 0x044C -+#define REG_CCK_CHECK_8812 0x0454 -+#define REG_AMPDU_MAX_TIME_8812 0x0456 -+#define REG_TXPKTBUF_BCNQ_BDNY1_8812 0x0457 -+ -+#define REG_AMPDU_MAX_LENGTH_8812 0x0458 -+#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8812 0x045D -+#define REG_NDPA_OPT_CTRL_8812A 0x045F -+#define REG_DATA_SC_8812 0x0483 -+#ifdef CONFIG_WOWLAN -+#define REG_TXPKTBUF_IV_LOW 0x0484 -+#define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif -+#define REG_ARFR2_8812 0x048C -+#define REG_ARFR3_8812 0x0494 -+#define REG_TXRPT_START_OFFSET 0x04AC -+#define REG_AMPDU_BURST_MODE_8812 0x04BC -+#define REG_HT_SINGLE_AMPDU_8812 0x04C7 -+#define REG_MACID_PKT_DROP0_8812 0x04D0 -+ -+/* ----------------------------------------------------- -+* -+* 0x0500h ~ 0x05FFh EDCA Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_TXPAUSE_8812A 0x0522 -+#define REG_CTWND_8812 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8812 0x0577 -+#define REG_SCH_TXCMD_8812A 0x05F8 -+ -+/* ----------------------------------------------------- -+* -+* 0x0600h ~ 0x07FFh WMAC Configuration -+* -+* ----------------------------------------------------- */ -+#define REG_MAC_CR_8812 0x0600 -+ -+#define REG_MAC_TX_SM_STATE_8812 0x06B4 -+ -+/* Power */ -+#define REG_BFMER0_INFO_8812A 0x06E4 -+#define REG_BFMER1_INFO_8812A 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8812A 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8812A 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8812A 0x06FC -+ -+/* Hardware Port 2 */ -+#define REG_BFMEE_SEL_8812A 0x0714 -+#define REG_SND_PTCL_CTRL_8812A 0x0718 -+ -+ -+/* ----------------------------------------------------- -+* -+* Redifine register definition for compatibility -+* -+* ----------------------------------------------------- */ -+ -+/* TODO: use these definition when using REG_xxx naming rule. -+* NOTE: DO NOT Remove these definition. Use later. */ -+#define ISR_8812 REG_HISR0_8812 -+ -+/* ---------------------------------------------------------------------------- -+* 8195 IMR/ISR bits (offset 0xB0, 8bits) -+* ---------------------------------------------------------------------------- */ -+#define IMR_DISABLED_8812 0 -+/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -+#define IMR_TIMER2_8812 BIT31 /* Timeout interrupt 2 */ -+#define IMR_TIMER1_8812 BIT30 /* Timeout interrupt 1 */ -+#define IMR_PSTIMEOUT_8812 BIT29 /* Power Save Time Out Interrupt */ -+#define IMR_GTINT4_8812 BIT28 /* When GTIMER4 expires, this bit is set to 1 */ -+#define IMR_GTINT3_8812 BIT27 /* When GTIMER3 expires, this bit is set to 1 */ -+#define IMR_TXBCN0ERR_8812 BIT26 /* Transmit Beacon0 Error */ -+#define IMR_TXBCN0OK_8812 BIT25 /* Transmit Beacon0 OK */ -+#define IMR_TSF_BIT32_TOGGLE_8812 BIT24 /* TSF Timer BIT32 toggle indication interrupt */ -+#define IMR_BCNDMAINT0_8812 BIT20 /* Beacon DMA Interrupt 0 */ -+#define IMR_BCNDERR0_8812 BIT16 /* Beacon Queue DMA OK0 */ -+#define IMR_HSISR_IND_ON_INT_8812 BIT15 /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -+#define IMR_BCNDMAINT_E_8812 BIT14 /* Beacon DMA Interrupt Extension for Win7 */ -+#define IMR_ATIMEND_8812 BIT12 /* CTWidnow End or ATIM Window End */ -+#define IMR_C2HCMD_8812 BIT10 /* CPU to Host Command INT Status, Write 1 clear */ -+#define IMR_CPWM2_8812 BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_CPWM_8812 BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_HIGHDOK_8812 BIT7 /* High Queue DMA OK */ -+#define IMR_MGNTDOK_8812 BIT6 /* Management Queue DMA OK */ -+#define IMR_BKDOK_8812 BIT5 /* AC_BK DMA OK */ -+#define IMR_BEDOK_8812 BIT4 /* AC_BE DMA OK */ -+#define IMR_VIDOK_8812 BIT3 /* AC_VI DMA OK */ -+#define IMR_VODOK_8812 BIT2 /* AC_VO DMA OK */ -+#define IMR_RDU_8812 BIT1 /* Rx Descriptor Unavailable */ -+#define IMR_ROK_8812 BIT0 /* Receive DMA OK */ -+ -+/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -+#define IMR_BCNDMAINT7_8812 BIT27 /* Beacon DMA Interrupt 7 */ -+#define IMR_BCNDMAINT6_8812 BIT26 /* Beacon DMA Interrupt 6 */ -+#define IMR_BCNDMAINT5_8812 BIT25 /* Beacon DMA Interrupt 5 */ -+#define IMR_BCNDMAINT4_8812 BIT24 /* Beacon DMA Interrupt 4 */ -+#define IMR_BCNDMAINT3_8812 BIT23 /* Beacon DMA Interrupt 3 */ -+#define IMR_BCNDMAINT2_8812 BIT22 /* Beacon DMA Interrupt 2 */ -+#define IMR_BCNDMAINT1_8812 BIT21 /* Beacon DMA Interrupt 1 */ -+#define IMR_BCNDOK7_8812 BIT20 /* Beacon Queue DMA OK Interrup 7 */ -+#define IMR_BCNDOK6_8812 BIT19 /* Beacon Queue DMA OK Interrup 6 */ -+#define IMR_BCNDOK5_8812 BIT18 /* Beacon Queue DMA OK Interrup 5 */ -+#define IMR_BCNDOK4_8812 BIT17 /* Beacon Queue DMA OK Interrup 4 */ -+#define IMR_BCNDOK3_8812 BIT16 /* Beacon Queue DMA OK Interrup 3 */ -+#define IMR_BCNDOK2_8812 BIT15 /* Beacon Queue DMA OK Interrup 2 */ -+#define IMR_BCNDOK1_8812 BIT14 /* Beacon Queue DMA OK Interrup 1 */ -+#define IMR_ATIMEND_E_8812 BIT13 /* ATIM Window End Extension for Win7 */ -+#define IMR_TXERR_8812 BIT11 /* Tx Error Flag Interrupt Status, write 1 clear. */ -+#define IMR_RXERR_8812 BIT10 /* Rx Error Flag INT Status, Write 1 clear */ -+#define IMR_TXFOVW_8812 BIT9 /* Transmit FIFO Overflow */ -+#define IMR_RXFOVW_8812 BIT8 /* Receive FIFO Overflow */ -+ -+ -+#ifdef CONFIG_PCI_HCI -+/* #define IMR_RX_MASK (IMR_ROK_8812|IMR_RDU_8812|IMR_RXFOVW_8812) */ -+#define IMR_TX_MASK (IMR_VODOK_8812 | IMR_VIDOK_8812 | IMR_BEDOK_8812 | IMR_BKDOK_8812 | IMR_MGNTDOK_8812 | IMR_HIGHDOK_8812) -+ -+#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8812 | IMR_TXBCN0OK_8812 | IMR_TXBCN0ERR_8812 | IMR_BCNDERR0_8812) -+ -+#define RT_AC_INT_MASKS (IMR_VIDOK_8812 | IMR_VODOK_8812 | IMR_BEDOK_8812 | IMR_BKDOK_8812) -+#endif -+ -+ -+/* **************************************************************************** -+* Regsiter Bit and Content definition -+* **************************************************************************** */ -+ -+/* 2 ACMHWCTRL 0x05C0 */ -+#define AcmHw_HwEn_8812 BIT(0) -+#define AcmHw_VoqEn_8812 BIT(1) -+#define AcmHw_ViqEn_8812 BIT(2) -+#define AcmHw_BeqEn_8812 BIT(3) -+#define AcmHw_VoqStatus_8812 BIT(5) -+#define AcmHw_ViqStatus_8812 BIT(6) -+#define AcmHw_BeqStatus_8812 BIT(7) -+ -+#endif /* __RTL8812A_SPEC_H__ */ -+ -+#ifdef CONFIG_RTL8821A -+#include "rtl8821a_spec.h" -+#endif /* CONFIG_RTL8821A */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8812a_sreset.h b/drivers/staging/rtl8723cs/include/rtl8812a_sreset.h -new file mode 100644 -index 000000000000..d4bbd5867b24 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8812a_sreset.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL88812A_SRESET_H_ -+#define _RTL8812A_SRESET_H_ -+ -+#include -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+extern void rtl8812_sreset_xmit_status_check(_adapter *padapter); -+extern void rtl8812_sreset_linked_status_check(_adapter *padapter); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8812a_xmit.h b/drivers/staging/rtl8723cs/include/rtl8812a_xmit.h -new file mode 100644 -index 000000000000..32bf20fadcfd ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8812a_xmit.h -@@ -0,0 +1,371 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8812A_XMIT_H__ -+#define __RTL8812A_XMIT_H__ -+ -+ -+/* For 88e early mode */ -+#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) -+#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) -+#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) -+#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) -+#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) -+#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) -+#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) -+ -+/* -+ * defined for TX DESC Operation -+ * */ -+ -+#define MAX_TID (15) -+ -+/* OFFSET 0 */ -+#define OFFSET_SZ 0 -+#define OFFSET_SHT 16 -+#define BMC BIT(24) -+#define LSG BIT(26) -+#define FSG BIT(27) -+#define OWN BIT(31) -+ -+ -+/* OFFSET 4 */ -+#define PKT_OFFSET_SZ 0 -+#define QSEL_SHT 8 -+#define RATE_ID_SHT 16 -+#define NAVUSEHDR BIT(20) -+#define SEC_TYPE_SHT 22 -+#define PKT_OFFSET_SHT 26 -+ -+/* OFFSET 8 */ -+#define AGG_EN BIT(12) -+#define AGG_BK BIT(16) -+#define AMPDU_DENSITY_SHT 20 -+#define ANTSEL_A BIT(24) -+#define ANTSEL_B BIT(25) -+#define TX_ANT_CCK_SHT 26 -+#define TX_ANTL_SHT 28 -+#define TX_ANT_HT_SHT 30 -+ -+/* OFFSET 12 */ -+#define SEQ_SHT 16 -+#define EN_HWSEQ BIT(31) -+ -+/* OFFSET 16 */ -+#define QOS BIT(6) -+#define HW_SSN BIT(7) -+#define USERATE BIT(8) -+#define DISDATAFB BIT(10) -+#define CTS_2_SELF BIT(11) -+#define RTS_EN BIT(12) -+#define HW_RTS_EN BIT(13) -+#define DATA_SHORT BIT(24) -+#define PWR_STATUS_SHT 15 -+#define DATA_SC_SHT 20 -+#define DATA_BW BIT(25) -+ -+/* OFFSET 20 */ -+#define RTY_LMT_EN BIT(17) -+ -+/* OFFSET 20 */ -+#define SGI BIT(6) -+#define USB_TXAGG_NUM_SHT 24 -+ -+typedef struct txdescriptor_8812 { -+ /* Offset 0 */ -+ u32 pktlen:16; -+ u32 offset:8; -+ u32 bmc:1; -+ u32 htc:1; -+ u32 ls:1; -+ u32 fs:1; -+ u32 linip:1; -+ u32 noacm:1; -+ u32 gf:1; -+ u32 own:1; -+ -+ /* Offset 4 */ -+ u32 macid:6; -+ u32 rsvd0406:2; -+ u32 qsel:5; -+ u32 rd_nav_ext:1; -+ u32 lsig_txop_en:1; -+ u32 pifs:1; -+ u32 rate_id:4; -+ u32 navusehdr:1; -+ u32 en_desc_id:1; -+ u32 sectype:2; -+ u32 rsvd0424:2; -+ u32 pkt_offset:5; /* unit: 8 bytes */ -+ u32 rsvd0431:1; -+ -+ /* Offset 8 */ -+ u32 rts_rc:6; -+ u32 data_rc:6; -+ u32 agg_en:1; -+ u32 rd_en:1; -+ u32 bar_rty_th:2; -+ u32 bk:1; -+ u32 morefrag:1; -+ u32 raw:1; -+ u32 ccx:1; -+ u32 ampdu_density:3; -+ u32 bt_null:1; -+ u32 ant_sel_a:1; -+ u32 ant_sel_b:1; -+ u32 tx_ant_cck:2; -+ u32 tx_antl:2; -+ u32 tx_ant_ht:2; -+ -+ /* Offset 12 */ -+ u32 nextheadpage:8; -+ u32 tailpage:8; -+ u32 seq:12; -+ u32 cpu_handle:1; -+ u32 tag1:1; -+ u32 trigger_int:1; -+ u32 hwseq_en:1; -+ -+ /* Offset 16 */ -+ u32 rtsrate:5; -+ u32 ap_dcfe:1; -+ u32 hwseq_sel:2; -+ u32 userate:1; -+ u32 disrtsfb:1; -+ u32 disdatafb:1; -+ u32 cts2self:1; -+ u32 rtsen:1; -+ u32 hw_rts_en:1; -+ u32 port_id:1; -+ u32 pwr_status:3; -+ u32 wait_dcts:1; -+ u32 cts2ap_en:1; -+ u32 data_sc:2; -+ u32 data_stbc:2; -+ u32 data_short:1; -+ u32 data_bw:1; -+ u32 rts_short:1; -+ u32 rts_bw:1; -+ u32 rts_sc:2; -+ u32 vcs_stbc:2; -+ -+ /* Offset 20 */ -+ u32 datarate:6; -+ u32 sgi:1; -+ u32 try_rate:1; -+ u32 data_ratefb_lmt:5; -+ u32 rts_ratefb_lmt:4; -+ u32 rty_lmt_en:1; -+ u32 data_rt_lmt:6; -+ u32 usb_txagg_num:8; -+ -+ /* Offset 24 */ -+ u32 txagg_a:5; -+ u32 txagg_b:5; -+ u32 use_max_len:1; -+ u32 max_agg_num:5; -+ u32 mcsg1_max_len:4; -+ u32 mcsg2_max_len:4; -+ u32 mcsg3_max_len:4; -+ u32 mcs7_sgi_max_len:4; -+ -+ /* Offset 28 */ -+ u32 checksum:16; /* TxBuffSize(PCIe)/CheckSum(USB) */ -+ u32 mcsg4_max_len:4; -+ u32 mcsg5_max_len:4; -+ u32 mcsg6_max_len:4; -+ u32 mcs15_sgi_max_len:4; -+ -+ /* Offset 32 */ -+ u32 rsvd32; -+ -+ /* Offset 36 */ -+ u32 rsvd36; -+} TXDESC_8812, *PTXDESC_8812; -+ -+ -+/* Dword 0 */ -+#define GET_TX_DESC_OWN_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+#define SET_TX_DESC_PKT_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define SET_TX_DESC_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define SET_TX_DESC_BMC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_LAST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+#define SET_TX_DESC_FIRST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_LINIP_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+#define SET_TX_DESC_NO_ACM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+#define SET_TX_DESC_OWN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+/* Dword 1 */ -+#define SET_TX_DESC_MACID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+ -+/* Dword 2 */ -+#define SET_TX_DESC_PAID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+#define SET_TX_DESC_CCA_RTS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_AGG_BREAK_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define SET_TX_DESC_RAW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define SET_TX_DESC_SPE_RPT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_INT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_GID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+ -+/* Dword 3 */ -+#define SET_TX_DESC_WHEADER_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -+#define SET_TX_DESC_CHK_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -+#define SET_TX_DESC_EARLY_MODE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+#define SET_TX_DESC_HWSEQ_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_NDPA_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+/* Dword 4 */ -+#define SET_TX_DESC_TX_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+ -+/* Dword 5 */ -+#define SET_TX_DESC_DATA_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_LDPC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+#define SET_TX_DESC_DATA_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_CTROL_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+#define SET_TX_DESC_TX_ANT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) -+ -+/* Dword 6 */ -+#define SET_TX_DESC_SW_DEFINE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_ANTSEL_A_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+#define SET_TX_DESC_ANTSEL_B_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+#define SET_TX_DESC_ANTSEL_C_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -+#define SET_TX_DESC_ANTSEL_D_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) -+#define SET_TX_DESC_MBSSID_8821(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+ -+/* Dword 7 */ -+#define SET_TX_DESC_TX_BUFFER_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#define SET_TX_DESC_TX_DESC_CHECKSUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#define SET_TX_DESC_USB_TXAGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+#ifdef CONFIG_SDIO_HCI -+#define SET_TX_DESC_SDIO_TXSEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) -+#endif -+ -+/* Dword 8 */ -+#define SET_TX_DESC_HWSEQ_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+ -+/* Dword 9 */ -+#define SET_TX_DESC_SEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+ -+/* Dword 10 */ -+#define SET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) -+#define GET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) -+ -+/* Dword 11 */ -+#define SET_TX_DESC_NEXT_DESC_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) -+ -+ -+#define SET_EARLYMODE_PKTNUM_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+#ifdef CONFIG_TX_EARLY_MODE -+ #define USB_DUMMY_OFFSET 2 -+#else -+ #define USB_DUMMY_OFFSET 1 -+#endif -+#define USB_DUMMY_LENGTH (USB_DUMMY_OFFSET * PACKET_OFFSET_SZ) -+ -+ -+void rtl8812a_cal_txdesc_chksum(u8 *ptxdesc); -+void rtl8812a_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+void rtl8812a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void rtl8812a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -+void rtl8812a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+#ifdef CONFIG_USB_HCI -+s32 rtl8812au_init_xmit_priv(PADAPTER padapter); -+void rtl8812au_free_xmit_priv(PADAPTER padapter); -+s32 rtl8812au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8812au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+s32 rtl8812au_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+s32 rtl8812au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); -+void rtl8812au_xmit_tasklet(void *priv); -+s32 rtl8812au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8812ae_init_xmit_priv(PADAPTER padapter); -+void rtl8812ae_free_xmit_priv(PADAPTER padapter); -+struct xmit_buf *rtl8812ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+void rtl8812ae_xmitframe_resume(_adapter *padapter); -+s32 rtl8812ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8812ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+s32 rtl8812ae_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+s32 rtl8812ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+void rtl8812ae_xmit_tasklet(void *priv); -+ -+#ifdef CONFIG_XMIT_THREAD_MODE -+s32 rtl8812ae_xmit_buf_handler(_adapter *padapter); -+#endif -+ -+#endif -+ -+#ifdef CONFIG_TX_EARLY_MODE -+void UpdateEarlyModeInfo8812(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif -+ -+void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, u8 *ptxdesc); -+ -+u8 BWMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+u8 SCMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib); -+ -+#endif /* __RTL8812_XMIT_H__ */ -+ -+#ifdef CONFIG_RTL8821A -+#include "rtl8821a_xmit.h" -+#endif /* CONFIG_RTL8821A */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8814a_cmd.h b/drivers/staging/rtl8723cs/include/rtl8814a_cmd.h -new file mode 100644 -index 000000000000..02ed2111eb00 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814a_cmd.h -@@ -0,0 +1,161 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8814A_CMD_H__ -+#define __RTL8814A_CMD_H__ -+#include "hal_com_h2c.h" -+ -+/* _RSVDPAGE_LOC_CMD0 */ -+#define SET_8814A_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8814A_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8814A_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8814A_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8814A_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+/* _SETPWRMODE_PARM */ -+#define SET_8814A_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8814A_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_8814A_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_8814A_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8814A_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_8814A_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -+#define SET_8814A_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+#define GET_8814A_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) -+ -+ -+/* _WoWLAN PARAM_CMD5 */ -+#define SET_8814A_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8814A_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8814A_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_8814A_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+#define SET_8814A_H2CCMD_WOWLAN_ALL_PKT_DROP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -+#define SET_8814A_H2CCMD_WOWLAN_GPIO_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) -+#define SET_8814A_H2CCMD_WOWLAN_REKEY_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) -+#define SET_8814A_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) -+#define SET_8814A_H2CCMD_WOWLAN_GPIONUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8814A_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+ -+ -+/* WLANINFO_PARM */ -+#define SET_8814A_H2CCMD_WLANINFO_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8814A_H2CCMD_WLANINFO_PARM_CHANNEL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8814A_H2CCMD_WLANINFO_PARM_BW40MHZ(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+ -+/* _REMOTE_WAKEUP_CMD7 */ -+#define SET_8814A_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8814A_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8814A_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_8814A_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+ -+ -+/* _AP_OFFLOAD_CMD8 */ -+#define SET_8814A_H2CCMD_AP_OFFLOAD_ON(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8814A_H2CCMD_AP_OFFLOAD_HIDDEN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8814A_H2CCMD_AP_OFFLOAD_DENYANY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_8814A_H2CCMD_AP_OFFLOAD_WAKEUP_EVT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+ -+/* _PWR_MOD_CMD20 */ -+#define SET_88E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_88E_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -+#define SET_88E_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -+#define SET_88E_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -+#define SET_88E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -+#define SET_88E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -+ -+/* AP_REQ_TXREP_CMD 0x43 */ -+#define SET_8814A_H2CCMD_TXREP_PARM_STA1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -+#define SET_8814A_H2CCMD_TXREP_PARM_STA2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+#define SET_8814A_H2CCMD_TXREP_PARM_RTY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 2, __Value) -+ -+/* C2H_AP_REQ_TXRPT */ -+#define GET_8814A_C2H_TC2H_APREQ_TXRPT_MACID1(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 8) -+#define GET_8814A_C2H_TC2H_APREQ_TXRPT_TXOK1(_Header) LE_BITS_TO_2BYTE((_Header + 1), 0, 16) -+#define GET_8814A_C2H_TC2H_APREQ_TXRPT_TXFAIL1(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) -+#define GET_8814A_C2H_TC2H_APREQ_TXRPT_INIRATE1(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8) -+#define GET_8814A_C2H_TC2H_APREQ_TXRPT_MACID2(_Header) LE_BITS_TO_1BYTE((_Header + 6), 0, 8) -+#define GET_8814A_C2H_TC2H_APREQ_TXRPT_TXOK2(_Header) LE_BITS_TO_2BYTE((_Header + 7), 0, 16) -+#define GET_8814A_C2H_TC2H_APREQ_TXRPT_TXFAIL2(_Header) LE_BITS_TO_2BYTE((_Header + 9), 0, 16) -+#define GET_8814A_C2H_TC2H_APREQ_TXRPT_INIRATE2(_Header) LE_BITS_TO_1BYTE((_Header + 11), 0, 8) -+ -+/* C2H_SPC_STAT */ -+#define GET_8814A_C2H_SPC_STAT_IDX(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 8) -+ /* Tip :TYPE_A data3 is msb and data0 is lsb */ -+#define GET_8814A_C2H_SPC_STAT_TYPEA_RETRY(_Header) LE_BITS_TO_4BYTE((_Header + 1), 0, 32) -+#define GET_8814A_C2H_SPC_STAT_TYPEB_PKT1(_Header) LE_BITS_TO_2BYTE((_Header + 1), 0, 16) -+#define GET_8814A_C2H_SPC_STAT_TYPEB_RETRY1(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) -+#define GET_8814A_C2H_SPC_STAT_TYPEB_PKT2(_Header) LE_BITS_TO_2BYTE((_Header + 5), 0, 16) -+#define GET_8814A_C2H_SPC_STAT_TYPEB_RETRY2(_Header) LE_BITS_TO_2BYTE((_Header + 7), 0, 16) -+ -+/*BCNHWSEQ*/ -+#define SET_8814A_H2CCMD_BCNHWSEQ_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 1, __Value) -+#define SET_8814A_H2CCMD_BCNHWSEQ_BCN_NUMBER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 1, 3, __Value) -+#define SET_8814A_H2CCMD_BCNHWSEQ_HWSEQ(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 6, 1, __Value) -+#define SET_8814A_H2CCMD_BCNHWSEQ_EXHWSEQ(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 7, 1, __Value) -+#define SET_8814A_H2CCMD_BCNHWSEQ_PAGE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -+void rtl8814_fw_update_beacon_cmd(_adapter *padapter); -+ -+/* TX Beamforming */ -+#define GET_8814A_C2H_TXBF_ORIGINATE(_Header) LE_BITS_TO_1BYTE(_Header, 0, 8) -+#define GET_8814A_C2H_TXBF_MACID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) -+ -+ -+ -+/* / TX Feedback Content */ -+#define USEC_UNIT_FOR_8814A_C2H_TX_RPT_QUEUE_TIME 256 -+ -+#define GET_8814A_C2H_TX_RPT_QUEUE_SELECT(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 5) -+#define GET_8814A_C2H_TX_RPT_PKT_BROCAST(_Header) LE_BITS_TO_1BYTE((_Header + 0), 5, 1) -+#define GET_8814A_C2H_TX_RPT_LIFE_TIME_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 6, 1) -+#define GET_8814A_C2H_TX_RPT_RETRY_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 7, 1) -+#define GET_8814A_C2H_TX_RPT_MAC_ID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) -+#define GET_8814A_C2H_TX_RPT_DATA_RETRY_CNT(_Header) LE_BITS_TO_1BYTE((_Header + 2), 0, 6) -+#define GET_8814A_C2H_TX_RPT_QUEUE_TIME(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) /* In unit of 256 microseconds. */ -+#define GET_8814A_C2H_TX_RPT_FINAL_DATA_RATE(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8) -+ -+ -+/* _P2P_PS_OFFLOAD */ -+#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -+#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -+#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -+#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -+#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -+#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) -+#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) -+ -+s32 FillH2CCmd_8814(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -+void rtl8814_set_wowlan_cmd(_adapter *padapter, u8 enable); -+void rtl8814_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); -+void rtl8814_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode); -+u8 GetTxBufferRsvdPageNum8814(_adapter *padapter, bool wowlan); -+void rtl8814_req_txrpt_cmd(PADAPTER padapter, u8 macid); -+ -+void rtl8814a_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); -+ -+void -+Set_RA_LDPC_8814( -+ struct sta_info *psta, -+ BOOLEAN bLDPC -+); -+ -+s32 c2h_handler_8814a(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); -+ -+#ifdef CONFIG_BT_COEXIST -+void rtl8814a_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -+#endif /* CONFIG_BT_COEXIST */ -+#ifdef CONFIG_P2P_PS -+ void rtl8814_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -+#endif /* CONFIG_P2P */ -+ -+#endif/* __RTL8814A_CMD_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8814a_dm.h b/drivers/staging/rtl8723cs/include/rtl8814a_dm.h -new file mode 100644 -index 000000000000..9762c1b411b1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814a_dm.h -@@ -0,0 +1,23 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8814A_DM_H__ -+#define __RTL8814A_DM_H__ -+ -+void rtl8814_init_dm_priv(PADAPTER Adapter); -+void rtl8814_deinit_dm_priv(PADAPTER Adapter); -+void rtl8814_InitHalDm(PADAPTER Adapter); -+void rtl8814_HalDmWatchDog(PADAPTER Adapter); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8814a_hal.h b/drivers/staging/rtl8723cs/include/rtl8814a_hal.h -new file mode 100644 -index 000000000000..fb11eb71625e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814a_hal.h -@@ -0,0 +1,329 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8814A_HAL_H__ -+#define __RTL8814A_HAL_H__ -+ -+/* #include "hal_com.h" */ -+#include "hal_data.h" -+ -+/* include HAL Related header after HAL Related compiling flags */ -+#include "rtl8814a_spec.h" -+#include "rtl8814a_rf.h" -+#include "rtl8814a_dm.h" -+#include "rtl8814a_recv.h" -+#include "rtl8814a_xmit.h" -+#include "rtl8814a_cmd.h" -+#include "rtl8814a_led.h" -+#include "Hal8814PwrSeq.h" -+#include "Hal8814PhyReg.h" -+#include "Hal8814PhyCfg.h" -+#ifdef DBG_CONFIG_ERROR_DETECT -+ #include "rtl8814a_sreset.h" -+#endif /* DBG_CONFIG_ERROR_DETECT */ -+ -+enum { -+ VOLTAGE_V25 = 0x03, -+ LDOE25_SHIFT = 28 , -+}; -+/* max. iram is 64k , max dmen is 32k. Total = 96k = 0x18000*/ -+#define FW_SIZE 0x18000 -+#define FW_START_ADDRESS 0x1000 -+typedef struct _RT_FIRMWARE_8814 { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[FW_SIZE]; -+#endif -+ u32 ulFwLength; -+} RT_FIRMWARE_8814, *PRT_FIRMWARE_8814; -+ -+#define PAGE_SIZE_TX_8814 PAGE_SIZE_128 -+/* BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_8814 -+ * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -+ -+#define BCNQ_PAGE_NUM_8814 (MAX_BEACON_LEN / PAGE_SIZE_TX_8814 + 6) /*0x08*/ -+ -+#define Rtl8814A_NIC_PWR_ON_FLOW rtl8814A_power_on_flow -+#define Rtl8814A_NIC_RF_OFF_FLOW rtl8814A_radio_off_flow -+#define Rtl8814A_NIC_DISABLE_FLOW rtl8814A_card_disable_flow -+#define Rtl8814A_NIC_ENABLE_FLOW rtl8814A_card_enable_flow -+#define Rtl8814A_NIC_SUSPEND_FLOW rtl8814A_suspend_flow -+#define Rtl8814A_NIC_RESUME_FLOW rtl8814A_resume_flow -+#define Rtl8814A_NIC_PDN_FLOW rtl8814A_hwpdn_flow -+#define Rtl8814A_NIC_LPS_ENTER_FLOW rtl8814A_enter_lps_flow -+#define Rtl8814A_NIC_LPS_LEAVE_FLOW rtl8814A_leave_lps_flow -+ -+/* ***************************************************** -+ * New Firmware Header(8-byte alinment required) -+ * ***************************************************** -+ * --- LONG WORD 0 ---- */ -+#define GET_FIRMWARE_HDR_SIGNATURE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) -+#define GET_FIRMWARE_HDR_CATEGORY_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) /* AP/NIC and USB/PCI */ -+#define GET_FIRMWARE_HDR_FUNCTION_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -+#define GET_FIRMWARE_HDR_VERSION_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)/* FW Version */ -+#define GET_FIRMWARE_HDR_SUB_VER_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) /* FW Subversion, default 0x00 */ -+#define GET_FIRMWARE_HDR_SUB_IDX_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) /* FW Subversion Index */ -+ -+/* --- LONG WORD 1 ---- */ -+#define GET_FIRMWARE_HDR_SVN_IDX_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 32)/* The SVN entry index */ -+#define GET_FIRMWARE_HDR_RSVD1_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 32) -+ -+/* --- LONG WORD 2 ---- */ -+#define GET_FIRMWARE_HDR_MONTH_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 8) /* Release time Month field */ -+#define GET_FIRMWARE_HDR_DATE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 8, 8) /* Release time Date field */ -+#define GET_FIRMWARE_HDR_HOUR_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 16, 8)/* Release time Hour field */ -+#define GET_FIRMWARE_HDR_MINUTE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 24, 8)/* Release time Minute field */ -+#define GET_FIRMWARE_HDR_YEAR_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 16)/* Release time Year field */ -+#define GET_FIRMWARE_HDR_FOUNDRY_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 16, 8)/* Release time Foundry field */ -+#define GET_FIRMWARE_HDR_RSVD2_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 24, 8) -+ -+/* --- LONG WORD 3 ---- */ -+#define GET_FIRMWARE_HDR_MEM_UASGE_DL_FROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 1) -+#define GET_FIRMWARE_HDR_MEM_UASGE_BOOT_FROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 1, 1) -+#define GET_FIRMWARE_HDR_MEM_UASGE_BOOT_LOADER_3081(__FwHdr)LE_BITS_TO_4BYTE(__FwHdr+24, 2, 1) -+#define GET_FIRMWARE_HDR_MEM_UASGE_IRAM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 3, 1) -+#define GET_FIRMWARE_HDR_MEM_UASGE_ERAM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 4, 1) -+#define GET_FIRMWARE_HDR_MEM_UASGE_RSVD4_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 5, 3) -+#define GET_FIRMWARE_HDR_RSVD3_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 8, 8) -+#define GET_FIRMWARE_HDR_BOOT_LOADER_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 16, 16) -+#define GET_FIRMWARE_HDR_RSVD5_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) -+ -+/* --- LONG WORD 4 ---- */ -+#define GET_FIRMWARE_HDR_TOTAL_DMEM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 0, 32) -+#define GET_FIRMWARE_HDR_FW_CFG_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 0, 16) -+#define GET_FIRMWARE_HDR_FW_ATTR_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 16, 16) -+ -+/* --- LONG WORD 5 ---- */ -+#define GET_FIRMWARE_HDR_IROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+40, 0, 32) -+#define GET_FIRMWARE_HDR_EROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+44, 0, 32) -+ -+/* --- LONG WORD 6 ---- */ -+#define GET_FIRMWARE_HDR_IRAM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+48, 0, 32) -+#define GET_FIRMWARE_HDR_ERAM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+52, 0, 32) -+ -+/* --- LONG WORD 7 ---- */ -+#define GET_FIRMWARE_HDR_RSVD6_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+56, 0, 32) -+#define GET_FIRMWARE_HDR_RSVD7_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+60, 0, 32) -+ -+ -+ -+/* -+ * 2013/08/16 MH MOve from SDIO.h for common use. -+ * */ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) -+ #define TRX_SHARE_MODE_8814A 0 /* TRX Buffer Share Index */ -+ #define BASIC_RXFF_SIZE_8814A 24576/* Basic RXFF Size is 24K = 24*1024 Unit: Byte */ -+ #define TRX_SHARE_BUFF_UNIT_8814A 65536/* TRX Share Buffer unit Size 64K = 64*1024 Unit: Byte */ -+ #define TRX_SHARE_BUFF_UNIT_PAGE_8814A (TRX_SHARE_BUFF_UNIT_8814A/PAGE_SIZE_8814A)/* 512 Pages */ -+ -+ /* Origin: */ -+ #define HPQ_PGNUM_8814A 0x20 /* High Queue */ -+ #define LPQ_PGNUM_8814A 0x20 /* Low Queue */ -+ #define NPQ_PGNUM_8814A 0x20 /* Normal Queue */ -+ #define EPQ_PGNUM_8814A 0x20 /* Extra Queue */ -+ -+#else /* #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) */ -+ -+ #define HPQ_PGNUM_8814A 20 -+ #define NPQ_PGNUM_8814A 20 -+ #define LPQ_PGNUM_8814A 20 /* 1972 */ -+ #define EPQ_PGNUM_8814A 20 -+ #define BCQ_PGNUM_8814A 32 -+ -+#endif /* #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) */ -+ -+#ifdef CONFIG_WOWLAN -+ #define WOWLAN_PAGE_NUM_8814 0x06 -+#else -+ #define WOWLAN_PAGE_NUM_8814 0x00 -+#endif -+ -+#define PAGE_SIZE_8814A 128/* TXFF Page Size, Unit: Byte */ -+#define MAX_RX_DMA_BUFFER_SIZE_8814A 0x5C00 /* BASIC_RXFF_SIZE_8814A + TRX_SHARE_MODE_8814A * TRX_SHARE_BUFF_UNIT_8814A */ /* Basic RXFF Size + ShareBuffer Size */ -+#define TX_PAGE_BOUNDARY_8814A TXPKT_PGNUM_8814A /* Need to enlarge boundary, by KaiYuan */ -+#define TX_PAGE_BOUNDARY_WOWLAN_8814A TXPKT_PGNUM_8814A /* TODO: 20130415 KaiYuan Check this value later */ -+ -+#ifdef CONFIG_FW_C2H_DEBUG -+ #define RX_DMA_RESERVED_SIZE_8814A 0x100 /* 256B, reserved for c2h debug message */ -+#else -+ #define RX_DMA_RESERVED_SIZE_8814A 0x0 /* 0B */ -+#endif -+#define RX_DMA_BOUNDARY_8814A (MAX_RX_DMA_BUFFER_SIZE_8814A - RX_DMA_RESERVED_SIZE_8814A - 1) -+ -+#define TOTAL_PGNUM_8814A 2048 -+#define TXPKT_PGNUM_8814A (2048 - BCNQ_PAGE_NUM_8814-WOWLAN_PAGE_NUM_8814) -+#define PUB_PGNUM_8814A (TXPKT_PGNUM_8814A-HPQ_PGNUM_8814A-NPQ_PGNUM_8814A-LPQ_PGNUM_8814A-EPQ_PGNUM_8814A) -+ -+/* Note: For WMM Normal Chip Setting ,modify later */ -+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8814A TX_PAGE_BOUNDARY_8814A -+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8814A (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8814A + 1) -+ -+#define DRIVER_EARLY_INT_TIME_8814 0x05 -+#define BCN_DMA_ATIME_INT_TIME_8814 0x02 -+ -+ -+#define MAX_PAGE_SIZE 4096 /* @ page : 4k bytes */ -+ -+#define EFUSE_MAX_SECTION_JAGUAR 64 -+ -+#define HWSET_MAX_SIZE_8814A 512 -+ -+#define EFUSE_REAL_CONTENT_LEN_8814A 1024 -+#define EFUSE_MAX_BANK_8814A 2 -+ -+#define EFUSE_MAP_LEN_8814A 512 -+#define EFUSE_MAX_SECTION_8814A 64 -+#define EFUSE_MAX_WORD_UNIT_8814A 4 -+#define EFUSE_PROTECT_BYTES_BANK_8814A 16 -+ -+#define EFUSE_IC_ID_OFFSET_8814A 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -+#define AVAILABLE_EFUSE_ADDR_8814A(addr) (addr < EFUSE_REAL_CONTENT_LEN_8814A) -+ -+/*------------------------------------------------------------------------- -+Chip specific -+-------------------------------------------------------------------------*/ -+ -+/* pic buffer descriptor */ -+#if 1 /* according to the define in the rtw_xmit.h, rtw_recv.h */ -+ #define RTL8814AE_SEG_NUM TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */ -+ #define TX_DESC_NUM_8814A TX_BD_NUM /* 128 */ -+ #define RX_DESC_NUM_8814A PCI_MAX_RX_COUNT /* 128 */ -+ #ifdef CONFIG_CONCURRENT_MODE -+ #define BE_QUEUE_TX_DESC_NUM_8814A (TX_BD_NUM<<1) /* 256 */ -+ #else -+ #define BE_QUEUE_TX_DESC_NUM_8814A (TX_BD_NUM+(TX_BD_NUM>>1)) /* 192 */ -+ #endif -+#else -+ #define RTL8814AE_SEG_NUM TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */ -+ #define TX_DESC_NUM_8814A 128 /* 1024//2048 change by ylb 20130624 */ -+ #define RX_DESC_NUM_8814A 128 /* 1024 //512 change by ylb 20130624 */ -+#endif -+ -+/* To prevent out of boundary programming case, leave 1byte and program full section -+ * 9bytes + 1byt + 5bytes and pre 1byte. -+ * For worst case: -+ * | 1byte|----8bytes----|1byte|--5bytes--| -+ * | | Reserved(14bytes) | -+ * */ -+#define EFUSE_OOB_PROTECT_BYTES 15 /* PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. */ -+ -+#ifdef CONFIG_FILE_FWIMG -+extern char *rtw_fw_file_path; -+#ifdef CONFIG_WOWLAN -+extern char *rtw_fw_wow_file_path; -+#endif -+#ifdef CONFIG_MP_INCLUDED -+extern char *rtw_fw_mp_bt_file_path; -+#endif /* CONFIG_MP_INCLUDED */ -+#endif /* CONFIG_FILE_FWIMG */ -+ -+/* rtl8814_hal_init.c */ -+s32 FirmwareDownload8814A(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); -+void InitializeFirmwareVars8814(PADAPTER padapter); -+ -+void -+Hal_InitEfuseVars_8814A( -+ PADAPTER Adapter -+); -+ -+s32 InitLLTTable8814A( -+ PADAPTER Adapter -+); -+ -+ -+void InitRDGSetting8814A(PADAPTER padapter); -+ -+/* void CheckAutoloadState8812A(PADAPTER padapter); */ -+ -+/* EFuse */ -+u8 GetEEPROMSize8814A(PADAPTER padapter); -+void hal_InitPGData_8814A( -+ PADAPTER padapter, -+ u8 *PROMContent -+); -+ -+void hal_ReadPROMVersion8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void hal_ReadTxPowerInfo8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void hal_ReadBoardType8814A(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void hal_ReadThermalMeter_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void hal_ReadChannelPlan8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void hal_EfuseParseXtal_8814A(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+void hal_ReadAntennaDiversity8814A(PADAPTER pAdapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -+void hal_Read_TRX_antenna_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void hal_ReadAmplifierType_8814A( -+ PADAPTER Adapter -+); -+void hal_ReadPAType_8814A( -+ PADAPTER Adapter, -+ u8 *PROMContent, -+ BOOLEAN AutoloadFail, -+ u8 *pPAType, -+ u8 *pLNAType -+); -+ -+void hal_GetRxGainOffset_8814A( -+ PADAPTER Adapter, -+ u8 *PROMContent, -+ BOOLEAN AutoloadFail -+); -+void Hal_EfuseParseKFreeData_8814A( -+ PADAPTER Adapter, -+ u8 *PROMContent, -+ BOOLEAN AutoloadFail); -+void hal_ReadRFEType_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+void hal_EfuseParseBTCoexistInfo8814A(PADAPTER Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+ -+/* void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -+ * int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); */ -+void hal_ReadRemoteWakeup_8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -+u8 MgntQuery_NssTxRate(u16 Rate); -+ -+/* BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); */ -+ -+#ifdef CONFIG_WOWLAN -+ void Hal_DetectWoWMode(PADAPTER pAdapter); -+#endif /* CONFIG_WOWLAN */ -+ -+void _InitBeaconParameters_8814A(PADAPTER padapter); -+void SetBeaconRelatedRegisters8814A(PADAPTER padapter); -+ -+void ReadRFType8814A(PADAPTER padapter); -+void InitDefaultValue8814A(PADAPTER padapter); -+ -+u8 SetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval); -+void GetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval); -+u8 SetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+u8 GetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -+void rtl8814_set_hal_ops(struct hal_ops *pHalFunc); -+void init_hal_spec_8814a(_adapter *adapter); -+ -+void rtl8814_start_thread(PADAPTER padapter); -+void rtl8814_stop_thread(PADAPTER padapter); -+ -+ -+#ifdef CONFIG_PCI_HCI -+ BOOLEAN InterruptRecognized8814AE(PADAPTER Adapter); -+ void UpdateInterruptMask8814AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+ void InitMAC_TRXBD_8814AE(PADAPTER Adapter); -+ void rtl8814ae_reset_desc_ring(_adapter *padapter); -+ u16 get_txbd_rw_reg(u16 ff_hwaddr); -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+ void rtl8814a_combo_card_WifiOnlyHwInit(PADAPTER Adapter); -+#endif -+ -+#endif /* __RTL8188E_HAL_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8814a_led.h b/drivers/staging/rtl8723cs/include/rtl8814a_led.h -new file mode 100644 -index 000000000000..cc457921efa1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814a_led.h -@@ -0,0 +1,36 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8814A_LED_H__ -+#define __RTL8814A_LED_H__ -+ -+#ifdef CONFIG_RTW_SW_LED -+/* ******************************************************************************** -+ * Interface to manipulate LED objects. -+ * ******************************************************************************** */ -+#ifdef CONFIG_USB_HCI -+ void rtl8814au_InitSwLeds(PADAPTER padapter); -+ void rtl8814au_DeInitSwLeds(PADAPTER padapter); -+#endif /* CONFIG_USB_HCI */ -+#ifdef CONFIG_PCI_HCI -+ void rtl8814ae_InitSwLeds(PADAPTER padapter); -+ void rtl8814ae_DeInitSwLeds(PADAPTER padapter); -+#endif /* CONFIG_PCI_HCI */ -+#ifdef CONFIG_SDIO_HCI -+ void rtl8814s_InitSwLeds(PADAPTER padapter); -+ void rtl8814s_DeInitSwLeds(PADAPTER padapter); -+#endif /* CONFIG_SDIO_HCI */ -+ -+#endif /* __RTL8814A_LED_H__ */ -+#endif /*CONFIG_RTW_SW_LED*/ -diff --git a/drivers/staging/rtl8723cs/include/rtl8814a_recv.h b/drivers/staging/rtl8723cs/include/rtl8814a_recv.h -new file mode 100644 -index 000000000000..68da6333178c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814a_recv.h -@@ -0,0 +1,182 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8814A_RECV_H__ -+#define __RTL8814A_RECV_H__ -+ -+#if defined(CONFIG_USB_HCI) -+ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ #ifdef CONFIG_PLATFORM_MSTAR -+ #define MAX_RECVBUF_SZ (8192) /* 8K */ -+ #else -+ #define MAX_RECVBUF_SZ (32768) /* 32k */ -+ #endif -+ /* #define MAX_RECVBUF_SZ (24576) */ /* 24k */ -+ /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ -+ /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ -+ /* #define MAX_RECVBUF_SZ (15360) */ /* 15k < 16k */ -+ /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ -+ #else -+ #define MAX_RECVBUF_SZ (4000) /* about 4K */ -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+#elif defined(CONFIG_PCI_HCI) -+ /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ -+ /* #define MAX_RECVBUF_SZ (9100) */ -+ /* #else */ -+ #define MAX_RECVBUF_SZ (4000) /* about 4K -+ * #endif */ -+ -+ -+#elif defined(CONFIG_SDIO_HCI) -+ #if 0 -+ /* temp solution */ -+ #ifdef CONFIG_SDIO_RX_COPY -+ #define MAX_RECVBUF_SZ (10240) -+ #else /* !CONFIG_SDIO_RX_COPY */ -+ #define MAX_RECVBUF_SZ MAX_RX_DMA_BUFFER_SIZE_8821 -+ #endif /* !CONFIG_SDIO_RX_COPY */ -+ #endif -+#endif -+ -+ -+/* RX buffer descriptor */ -+/* DWORD 0 */ -+#define SET_RX_BUFFER_DESC_DATA_LENGTH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_BUFFER_DESC_LS_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 14, 1, __Value) -+#define SET_RX_BUFFER_DESC_FS_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) -+#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 16, __Value) -+ -+#define GET_RX_BUFFER_DESC_OWN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -+#define GET_RX_BUFFER_DESC_LS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+#define GET_RX_BUFFER_DESC_FS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) -+ -+/* DWORD 1 */ -+#define SET_RX_BUFFER_PHYSICAL_LOW_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) -+#define GET_RX_BUFFER_PHYSICAL_LOW_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 32) -+ -+/* DWORD 2 */ -+#define SET_RX_BUFFER_PHYSICAL_HIGH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) -+ -+/* DWORD 3*/ /* RESERVED */ -+ -+ -+#if 0 -+ /* ============= -+ * RX Info -+ * ============== */ -+#endif -+/* DWORD 0 */ -+#define SET_RX_STATUS_DESC_PKT_LEN_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -+#define SET_RX_STATUS_DESC_EOR_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -+#define SET_RX_STATUS_DESC_OWN_8814AE(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) -+ -+#define GET_RX_STATUS_DESC_PKT_LEN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -+#define GET_RX_STATUS_DESC_CRC32_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -+#define GET_RX_STATUS_DESC_ICV_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -+#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -+#define GET_RX_STATUS_DESC_SECURITY_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -+#define GET_RX_STATUS_DESC_QOS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -+#define GET_RX_STATUS_DESC_SHIFT_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -+#define GET_RX_STATUS_DESC_PHY_STATUS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -+#define GET_RX_STATUS_DESC_SWDEC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -+#define GET_RX_STATUS_DESC_LAST_SEG_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1) -+#define GET_RX_STATUS_DESC_EOR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -+ -+/* DWORD 1 */ -+#define GET_RX_STATUS_DESC_MACID_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 7) -+#define GET_RX_STATUS_DESC_EXT_SECTYPE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 7, 1)/* 20130415 KaiYuan add for 8814 */ -+#define GET_RX_STATUS_DESC_TID_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 8, 4) -+#define GET_RX_STATUS_DESC_MACID_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 12, 1) -+#define GET_RX_STATUS_DESC_AMSDU_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 13, 1) -+#define GET_RX_STATUS_DESC_RXID_MATCH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 14, 1) -+#define GET_RX_STATUS_DESC_PAGGR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 15, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 20, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 21, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 22, 1) -+#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 23, 1) -+#define GET_RX_STATUS_DESC_PAM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 24, 1) -+#define GET_RX_STATUS_DESC_PWR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 25, 1) -+#define GET_RX_STATUS_DESC_MORE_DATA_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 26, 1) -+#define GET_RX_STATUS_DESC_MORE_FRAG_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 27, 1) -+#define GET_RX_STATUS_DESC_TYPE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 28, 2) -+#define GET_RX_STATUS_DESC_FIRST_SEG_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1) -+#define GET_RX_STATUS_DESC_EOR_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -+#define GET_RX_STATUS_DESC_MC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 30, 1) -+#define GET_RX_STATUS_DESC_BC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 31, 1) -+ -+/* DWORD 2 */ -+#define GET_RX_STATUS_DESC_SEQ_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -+#define GET_RX_STATUS_DESC_FRAG_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -+#ifdef CONFIG_USB_RX_AGGREGATION -+ #define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 8) -+#else -+ #define GET_RX_STATUS_DESC_RX_IS_QOS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -+#endif -+#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -+#define GET_RX_STATUS_DESC_HWRSVD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 24, 4) -+#define GET_RX_STATUS_C2H_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -+#define GET_RX_STATUS_DESC_FCS_OK_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) -+ -+/* DWORD 3 */ -+#define GET_RX_STATUS_DESC_RX_RATE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -+#define GET_RX_STATUS_DESC_BSSID_FIT_H_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 7, 3)/* 20130415 KaiYuan add for 8814 */ -+#define GET_RX_STATUS_DESC_HTC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -+#define GET_RX_STATUS_DESC_EOSP_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -+#define GET_RX_STATUS_DESC_BSSID_FIT_L_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -+#define GET_RX_STATUS_DESC_DMA_AGG_NUM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8)/* 20130415 KaiYuan Check if it exist anymore */ -+#define GET_RX_STATUS_DESC_PATTERN_MATCH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 29, 1) -+#define GET_RX_STATUS_DESC_UNICAST_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 30, 1) -+#define GET_RX_STATUS_DESC_MAGIC_WAKE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 31, 1) -+ -+/* DWORD 4 */ -+#define GET_RX_STATUS_DESC_PATTERN_IDX_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 0, 8) -+#define GET_RX_STATUS_DESC_RX_EOF_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 8, 1) -+#define GET_RX_STATUS_DESC_RX_SCRAMBLER_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 9, 7) -+#define GET_RX_STATUS_DESC_RX_PRE_NDP_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 16, 1) -+#define GET_RX_STATUS_DESC_A1_FIT_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 24, 5) -+ -+ -+/* DWORD 5 */ -+#define GET_RX_STATUS_DESC_TSFL_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) -+ -+ -+/* Rx smooth factor */ -+#define Rx_Smooth_Factor (20) -+ -+#ifdef CONFIG_USB_HCI -+ s32 rtl8814au_init_recv_priv(PADAPTER padapter); -+ void rtl8814au_free_recv_priv(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8814ae_init_recv_priv(PADAPTER padapter); -+ void rtl8814ae_free_recv_priv(PADAPTER padapter); -+#endif -+ -+#if 0 -+ /* temp solution */ -+ #ifdef CONFIG_SDIO_HCI -+ s32 InitRecvPriv8821AS(PADAPTER padapter); -+ void FreeRecvPriv8821AS(PADAPTER padapter); -+ #endif /* CONFIG_SDIO_HCI */ -+#endif -+ -+void rtl8814_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); -+ -+#endif /* __RTL8814A_RECV_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8814a_rf.h b/drivers/staging/rtl8723cs/include/rtl8814a_rf.h -new file mode 100644 -index 000000000000..9bb099c925a5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814a_rf.h -@@ -0,0 +1,28 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8814A_RF_H__ -+#define __RTL8814A_RF_H__ -+ -+void -+PHY_RF6052SetBandwidth8814A( -+ PADAPTER Adapter, -+ enum channel_width Bandwidth); -+ -+ -+int -+PHY_RF6052_Config_8814A( -+ PADAPTER Adapter); -+ -+#endif/* __RTL8188E_RF_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8814a_spec.h b/drivers/staging/rtl8723cs/include/rtl8814a_spec.h -new file mode 100644 -index 000000000000..a27ab8872c0c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814a_spec.h -@@ -0,0 +1,653 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8814A_SPEC_H__ -+#define __RTL8814A_SPEC_H__ -+ -+#include -+ -+ -+/* ************************************************************ -+ * -+ * ************************************************************ */ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0000h ~ 0x00FFh System Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_SYS_ISO_CTRL_8814A 0x0000 /* 2 Byte */ -+#define REG_SYS_FUNC_EN_8814A 0x0002 /* 2 Byte */ -+#define REG_SYS_PW_CTRL_8814A 0x0004 /* 4 Byte */ -+#define REG_SYS_CLKR_8814A 0x0008 /* 2 Byte */ -+#define REG_SYS_EEPROM_CTRL_8814A 0x000A /* 2 Byte */ -+#define REG_EE_VPD_8814A 0x000C /* 2 Byte */ -+#define REG_SYS_SWR_CTRL1_8814A 0x0010 /* 1 Byte */ -+#define REG_SPS0_CTRL_8814A 0x0011 /* 7 Byte */ -+#define REG_SYS_SWR_CTRL3_8814A 0x0018 /* 4 Byte */ -+#define REG_RSV_CTRL_8814A 0x001C /* 3 Byte */ -+#define REG_RF_CTRL0_8814A 0x001F /* 1 Byte */ -+#define REG_RF_CTRL1_8814A 0x0020 /* 1 Byte */ -+#define REG_RF_CTRL2_8814A 0x0021 /* 1 Byte */ -+#define REG_LPLDO_CTRL_8814A 0x0023 /* 1 Byte */ -+#define REG_AFE_CTRL1_8814A 0x0024 /* 4 Byte */ -+#define REG_AFE_CTRL2_8814A 0x0028 /* 4 Byte */ -+#define REG_AFE_CTRL3_8814A 0x002c /* 4 Byte */ -+#define REG_EFUSE_CTRL_8814A 0x0030 -+#define REG_LDO_EFUSE_CTRL_8814A 0x0034 -+#define REG_PWR_DATA_8814A 0x0038 -+#define REG_CAL_TIMER_8814A 0x003C -+#define REG_ACLK_MON_8814A 0x003E -+#define REG_GPIO_MUXCFG_8814A 0x0040 -+#define REG_GPIO_IO_SEL_8814A 0x0042 -+#define REG_MAC_PINMUX_CFG_8814A 0x0043 -+#define REG_GPIO_PIN_CTRL_8814A 0x0044 -+#define REG_GPIO_INTM_8814A 0x0048 -+#define REG_LEDCFG0_8814A 0x004C -+#define REG_LEDCFG1_8814A 0x004D -+#define REG_LEDCFG2_8814A 0x004E -+#define REG_LEDCFG3_8814A 0x004F -+#define REG_FSIMR_8814A 0x0050 -+#define REG_FSISR_8814A 0x0054 -+#define REG_HSIMR_8814A 0x0058 -+#define REG_HSISR_8814A 0x005c -+#define REG_GPIO_EXT_CTRL_8814A 0x0060 -+#define REG_GPIO_STATUS_8814A 0x006C -+#define REG_SDIO_CTRL_8814A 0x0070 -+#define REG_HCI_OPT_CTRL_8814A 0x0074 -+#define REG_RF_CTRL3_8814A 0x0076 /* 1 Byte */ -+#define REG_AFE_CTRL4_8814A 0x0078 -+#define REG_8051FW_CTRL_8814A 0x0080 -+#define REG_HIMR0_8814A 0x00B0 -+#define REG_HISR0_8814A 0x00B4 -+#define REG_HIMR1_8814A 0x00B8 -+#define REG_HISR1_8814A 0x00BC -+#define REG_SYS_CFG1_8814A 0x00F0 -+#define REG_SYS_CFG2_8814A 0x00FC -+#define REG_SYS_CFG3_8814A 0x1000 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_CR_8814A 0x0100 -+#define REG_PBP_8814A 0x0104 -+#define REG_PKT_BUFF_ACCESS_CTRL_8814A 0x0106 -+#define REG_TRXDMA_CTRL_8814A 0x010C -+#define REG_TRXFF_BNDY_8814A 0x0114 -+#define REG_TRXFF_STATUS_8814A 0x0118 -+#define REG_RXFF_PTR_8814A 0x011C -+#define REG_CPWM_8814A 0x012F -+#define REG_FWIMR_8814A 0x0130 -+#define REG_FWISR_8814A 0x0134 -+#define REG_FTIMR_8814A 0x0138 -+#define REG_PKTBUF_DBG_CTRL_8814A 0x0140 -+#define REG_RXPKTBUF_CTRL_8814A 0x0142 -+#define REG_PKTBUF_DBG_DATA_L_8814A 0x0144 -+#define REG_PKTBUF_DBG_DATA_H_8814A 0x0148 -+ -+#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN -+ -+#define REG_TC0_CTRL_8814A 0x0150 -+#define REG_TC1_CTRL_8814A 0x0154 -+#define REG_TC2_CTRL_8814A 0x0158 -+#define REG_TC3_CTRL_8814A 0x015C -+#define REG_TC4_CTRL_8814A 0x0160 -+#define REG_TCUNIT_BASE_8814A 0x0164 -+#define REG_RSVD3_8814A 0x0168 -+#define REG_C2HEVT_MSG_NORMAL_8814A 0x01A0 -+#define REG_C2HEVT_CLEAR_8814A 0x01AF -+#define REG_MCUTST_1_8814A 0x01C0 -+#define REG_MCUTST_WOWLAN_8814A 0x01C7 -+#define REG_FMETHR_8814A 0x01C8 -+#define REG_HMETFR_8814A 0x01CC -+#define REG_HMEBOX_0_8814A 0x01D0 -+#define REG_HMEBOX_1_8814A 0x01D4 -+#define REG_HMEBOX_2_8814A 0x01D8 -+#define REG_HMEBOX_3_8814A 0x01DC -+#define REG_LLT_INIT_8814A 0x01E0 -+#define REG_LLT_ADDR_8814A 0x01E4 /* 20130415 KaiYuan add for 8814 */ -+#define REG_HMEBOX_EXT0_8814A 0x01F0 -+#define REG_HMEBOX_EXT1_8814A 0x01F4 -+#define REG_HMEBOX_EXT2_8814A 0x01F8 -+#define REG_HMEBOX_EXT3_8814A 0x01FC -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_FIFOPAGE_CTRL_1_8814A 0x0200 -+#define REG_FIFOPAGE_CTRL_2_8814A 0x0204 -+#define REG_AUTO_LLT_8814A 0x0208 -+#define REG_TXDMA_OFFSET_CHK_8814A 0x020C -+#define REG_TXDMA_STATUS_8814A 0x0210 -+#define REG_RQPN_NPQ_8814A 0x0214 -+#define REG_TQPNT1_8814A 0x0218 -+#define REG_TQPNT2_8814A 0x021C -+#define REG_TQPNT3_8814A 0x0220 -+#define REG_TQPNT4_8814A 0x0224 -+#define REG_RQPN_CTRL_1_8814A 0x0228 -+#define REG_RQPN_CTRL_2_8814A 0x022C -+#define REG_FIFOPAGE_INFO_1_8814A 0x0230 -+#define REG_FIFOPAGE_INFO_2_8814A 0x0234 -+#define REG_FIFOPAGE_INFO_3_8814A 0x0238 -+#define REG_FIFOPAGE_INFO_4_8814A 0x023C -+#define REG_FIFOPAGE_INFO_5_8814A 0x0240 -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_RXDMA_AGG_PG_TH_8814A 0x0280 -+#define REG_RXPKT_NUM_8814A 0x0284 /* The number of packets in RXPKTBUF. */ -+#define REG_RXDMA_CONTROL_8814A 0x0286 /* ?????? Control the RX DMA. */ -+#define REG_RXDMA_STATUS_8814A 0x0288 -+#define REG_RXDMA_MODE_8814A 0x0290 /* ?????? */ -+#define REG_EARLY_MODE_CONTROL_8814A 0x02BC /* ?????? */ -+#define REG_RSVD5_8814A 0x02F0 /* ?????? */ -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0300h ~ 0x03FFh PCIe -+ * -+ * ----------------------------------------------------- */ -+#define REG_PCIE_CTRL_REG_8814A 0x0300 -+#define REG_INT_MIG_8814A 0x0304 /* Interrupt Migration */ -+#define REG_BCNQ_TXBD_DESA_8814A 0x0308 /* TX Beacon Descriptor Address */ -+#define REG_MGQ_TXBD_DESA_8814A 0x0310 /* TX Manage Queue Descriptor Address */ -+#define REG_VOQ_TXBD_DESA_8814A 0x0318 /* TX VO Queue Descriptor Address */ -+#define REG_VIQ_TXBD_DESA_8814A 0x0320 /* TX VI Queue Descriptor Address */ -+#define REG_BEQ_TXBD_DESA_8814A 0x0328 /* TX BE Queue Descriptor Address */ -+#define REG_BKQ_TXBD_DESA_8814A 0x0330 /* TX BK Queue Descriptor Address */ -+#define REG_RXQ_RXBD_DESA_8814A 0x0338 /* RX Queue Descriptor Address */ -+#define REG_HI0Q_TXBD_DESA_8814A 0x0340 -+#define REG_HI1Q_TXBD_DESA_8814A 0x0348 -+#define REG_HI2Q_TXBD_DESA_8814A 0x0350 -+#define REG_HI3Q_TXBD_DESA_8814A 0x0358 -+#define REG_HI4Q_TXBD_DESA_8814A 0x0360 -+#define REG_HI5Q_TXBD_DESA_8814A 0x0368 -+#define REG_HI6Q_TXBD_DESA_8814A 0x0370 -+#define REG_HI7Q_TXBD_DESA_8814A 0x0378 -+#define REG_MGQ_TXBD_NUM_8814A 0x0380 -+#define REG_RX_RXBD_NUM_8814A 0x0382 -+#define REG_VOQ_TXBD_NUM_8814A 0x0384 -+#define REG_VIQ_TXBD_NUM_8814A 0x0386 -+#define REG_BEQ_TXBD_NUM_8814A 0x0388 -+#define REG_BKQ_TXBD_NUM_8814A 0x038A -+#define REG_HI0Q_TXBD_NUM_8814A 0x038C -+#define REG_HI1Q_TXBD_NUM_8814A 0x038E -+#define REG_HI2Q_TXBD_NUM_8814A 0x0390 -+#define REG_HI3Q_TXBD_NUM_8814A 0x0392 -+#define REG_HI4Q_TXBD_NUM_8814A 0x0394 -+#define REG_HI5Q_TXBD_NUM_8814A 0x0396 -+#define REG_HI6Q_TXBD_NUM_8814A 0x0398 -+#define REG_HI7Q_TXBD_NUM_8814A 0x039A -+#define REG_TSFTIMER_HCI_8814A 0x039C -+ -+/* Read Write Point */ -+#define REG_VOQ_TXBD_IDX_8814A 0x03A0 -+#define REG_VIQ_TXBD_IDX_8814A 0x03A4 -+#define REG_BEQ_TXBD_IDX_8814A 0x03A8 -+#define REG_BKQ_TXBD_IDX_8814A 0x03AC -+#define REG_MGQ_TXBD_IDX_8814A 0x03B0 -+#define REG_RXQ_TXBD_IDX_8814A 0x03B4 -+#define REG_HI0Q_TXBD_IDX_8814A 0x03B8 -+#define REG_HI1Q_TXBD_IDX_8814A 0x03BC -+#define REG_HI2Q_TXBD_IDX_8814A 0x03C0 -+#define REG_HI3Q_TXBD_IDX_8814A 0x03C4 -+#define REG_HI4Q_TXBD_IDX_8814A 0x03C8 -+#define REG_HI5Q_TXBD_IDX_8814A 0x03CC -+#define REG_HI6Q_TXBD_IDX_8814A 0x03D0 -+#define REG_HI7Q_TXBD_IDX_8814A 0x03D4 -+#define REG_DBG_SEL_V1_8814A 0x03D8 -+#define REG_PCIE_HRPWM1_V1_8814A 0x03D9 -+#define REG_PCIE_HCPWM1_V1_8814A 0x03DA -+#define REG_PCIE_CTRL2_8814A 0x03DB -+#define REG_PCIE_HRPWM2_V1_8814A 0x03DC -+#define REG_PCIE_HCPWM2_V1_8814A 0x03DE -+#define REG_PCIE_H2C_MSG_V1_8814A 0x03E0 -+#define REG_PCIE_C2H_MSG_V1_8814A 0x03E4 -+#define REG_DBI_WDATA_V1_8814A 0x03E8 -+#define REG_DBI_RDATA_V1_8814A 0x03EC -+#define REG_DBI_FLAG_V1_8814A 0x03F0 -+#define REG_MDIO_V1_8814A 0x03F4 -+#define REG_PCIE_MIX_CFG_8814A 0x03F8 -+#define REG_DBG_8814A 0x03FC -+/* ----------------------------------------------------- -+ * -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_VOQ_INFORMATION_8814A 0x0400 -+#define REG_VIQ_INFORMATION_8814A 0x0404 -+#define REG_BEQ_INFORMATION_8814A 0x0408 -+#define REG_BKQ_INFORMATION_8814A 0x040C -+#define REG_MGQ_INFORMATION_8814A 0x0410 -+#define REG_HGQ_INFORMATION_8814A 0x0414 -+#define REG_BCNQ_INFORMATION_8814A 0x0418 -+#define REG_TXPKT_EMPTY_8814A 0x041A -+#define REG_CPU_MGQ_INFORMATION_8814A 0x041C -+#define REG_FWHW_TXQ_CTRL_8814A 0x0420 -+#define REG_HWSEQ_CTRL_8814A 0x0423 -+#define REG_TXPKTBUF_BCNQ_BDNY_8814A 0x0424 -+/* #define REG_MGQ_BDNY_8814A 0x0425 */ -+#define REG_LIFETIME_EN_8814A 0x0426 -+/* #define REG_FW_FREE_TAIL_8814A 0x0427 */ -+#define REG_SPEC_SIFS_8814A 0x0428 -+#define REG_RETRY_LIMIT_8814A 0x042A -+#define REG_TXBF_CTRL_8814A 0x042C -+#define REG_DARFRC_8814A 0x0430 -+#define REG_RARFRC_8814A 0x0438 -+#define REG_RRSR_8814A 0x0440 -+#define REG_ARFR0_8814A 0x0444 -+#define REG_ARFR1_8814A 0x044C -+#define REG_CCK_CHECK_8814A 0x0454 -+#define REG_AMPDU_MAX_TIME_8814A 0x0455 -+#define REG_TXPKTBUF_BCNQ1_BDNY_8814A 0x0456 -+#define REG_AMPDU_MAX_LENGTH_8814A 0x0458 -+#define REG_ACQ_STOP_8814A 0x045C -+#define REG_NDPA_RATE_8814A 0x045D -+#define REG_TX_HANG_CTRL_8814A 0x045E -+#define REG_NDPA_OPT_CTRL_8814A 0x045F -+#define REG_FAST_EDCA_CTRL_8814A 0x0460 -+#define REG_RD_RESP_PKT_TH_8814A 0x0463 -+#define REG_CMDQ_INFO_8814A 0x0464 -+#define REG_Q4_INFO_8814A 0x0468 -+#define REG_Q5_INFO_8814A 0x046C -+#define REG_Q6_INFO_8814A 0x0470 -+#define REG_Q7_INFO_8814A 0x0474 -+#define REG_WMAC_LBK_BUF_HD_8814A 0x0478 -+#define REG_MGQ_PGBNDY_8814A 0x047A -+#define REG_INIRTS_RATE_SEL_8814A 0x0480 -+#define REG_BASIC_CFEND_RATE_8814A 0x0481 -+#define REG_STBC_CFEND_RATE_8814A 0x0482 -+#define REG_DATA_SC_8814A 0x0483 -+#define REG_MACID_SLEEP3_8814A 0x0484 -+#define REG_MACID_SLEEP1_8814A 0x0488 -+#ifdef CONFIG_WOWLAN -+ #define REG_TXPKTBUF_IV_LOW 0x0484 -+ #define REG_TXPKTBUF_IV_HIGH 0x0488 -+#endif /* CONFIG_WOWLAN */ -+#define REG_ARFR2_8814A 0x048C -+#define REG_ARFR3_8814A 0x0494 -+#define REG_ARFR4_8814A 0x049C -+#define REG_ARFR5_8814A 0x04A4 -+#define REG_TXRPT_START_OFFSET_8814A 0x04AC -+#define REG_TRYING_CNT_TH_8814A 0x04B0 -+#define REG_POWER_STAGE1_8814A 0x04B4 -+#define REG_POWER_STAGE2_8814A 0x04B8 -+#define REG_SW_AMPDU_BURST_MODE_CTRL_8814A 0x04BC -+#define REG_PKT_LIFE_TIME_8814A 0x04C0 -+#define REG_PKT_BE_BK_LIFE_TIME_8814A 0x04C2 /* ?????? */ -+#define REG_STBC_SETTING_8814A 0x04C4 -+#define REG_STBC_8814A 0x04C5 -+#define REG_QUEUE_CTRL_8814A 0x04C6 -+#define REG_SINGLE_AMPDU_CTRL_8814A 0x04C7 -+#define REG_PROT_MODE_CTRL_8814A 0x04C8 -+#define REG_MAX_AGGR_NUM_8814A 0x04CA -+#define REG_RTS_MAX_AGGR_NUM_8814A 0x04CB -+#define REG_BAR_MODE_CTRL_8814A 0x04CC -+#define REG_RA_TRY_RATE_AGG_LMT_8814A 0x04CF -+#define REG_MACID_SLEEP2_8814A 0x04D0 -+#define REG_MACID_SLEEP0_8814A 0x04D4 -+#define REG_HW_SEQ0_8814A 0x04D8 -+#define REG_HW_SEQ1_8814A 0x04DA -+#define REG_HW_SEQ2_8814A 0x04DC -+#define REG_HW_SEQ3_8814A 0x04DE -+#define REG_NULL_PKT_STATUS_8814A 0x04E0 -+#define REG_PTCL_ERR_STATUS_8814A 0x04E2 -+#define REG_DROP_PKT_NUM_8814A 0x04EC -+#define REG_PTCL_TX_RPT_8814A 0x04F0 -+#define REG_Dummy_8814A 0x04FC -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_EDCA_VO_PARAM_8814A 0x0500 -+#define REG_EDCA_VI_PARAM_8814A 0x0504 -+#define REG_EDCA_BE_PARAM_8814A 0x0508 -+#define REG_EDCA_BK_PARAM_8814A 0x050C -+#define REG_BCNTCFG_8814A 0x0510 -+#define REG_PIFS_8814A 0x0512 -+#define REG_RDG_PIFS_8814A 0x0513 -+#define REG_SIFS_CTX_8814A 0x0514 -+#define REG_SIFS_TRX_8814A 0x0516 -+#define REG_AGGR_BREAK_TIME_8814A 0x051A -+#define REG_SLOT_8814A 0x051B -+#define REG_TX_PTCL_CTRL_8814A 0x0520 -+#define REG_TXPAUSE_8814A 0x0522 -+#define REG_DIS_TXREQ_CLR_8814A 0x0523 -+#define REG_RD_CTRL_8814A 0x0524 -+/* -+ * Format for offset 540h-542h: -+ * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. -+ * [7:4]: Reserved. -+ * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. -+ * [23:20]: Reserved -+ * Description: -+ * | -+ * |<--Setup--|--Hold------------>| -+ * --------------|---------------------- -+ * | -+ * TBTT -+ * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. -+ * Described by Designer Tim and Bruce, 2011-01-14. -+ * */ -+#define REG_TBTT_PROHIBIT_8814A 0x0540 -+#define REG_RD_NAV_NXT_8814A 0x0544 -+#define REG_NAV_PROT_LEN_8814A 0x0546 -+#define REG_BCN_CTRL_8814A 0x0550 -+#define REG_BCN_CTRL_1_8814A 0x0551 -+#define REG_MBID_NUM_8814A 0x0552 -+#define REG_DUAL_TSF_RST_8814A 0x0553 -+#define REG_MBSSID_BCN_SPACE_8814A 0x0554 -+#define REG_DRVERLYINT_8814A 0x0558 -+#define REG_BCNDMATIM_8814A 0x0559 -+#define REG_ATIMWND_8814A 0x055A -+#define REG_USTIME_TSF_8814A 0x055C -+#define REG_BCN_MAX_ERR_8814A 0x055D -+#define REG_RXTSF_OFFSET_CCK_8814A 0x055E -+#define REG_RXTSF_OFFSET_OFDM_8814A 0x055F -+#define REG_TSFTR_8814A 0x0560 -+#define REG_CTWND_8814A 0x0572 -+#define REG_SECONDARY_CCA_CTRL_8814A 0x0577 /* ?????? */ -+#define REG_PSTIMER_8814A 0x0580 -+#define REG_TIMER0_8814A 0x0584 -+#define REG_TIMER1_8814A 0x0588 -+#define REG_BCN_PREDL_ITV_8814A 0x058F /* Pre download beacon interval */ -+#define REG_ACMHWCTRL_8814A 0x05C0 -+#define REG_P2P_RST_8814A 0x05F0 -+ -+/* ----------------------------------------------------- -+ * -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * -+ * ----------------------------------------------------- */ -+#define REG_MAC_CR_8814A 0x0600 -+#define REG_TCR_8814A 0x0604 -+#define REG_RCR_8814A 0x0608 -+#define REG_RX_PKT_LIMIT_8814A 0x060C -+#define REG_RX_DLK_TIME_8814A 0x060D -+#define REG_RX_DRVINFO_SZ_8814A 0x060F -+ -+#define REG_MACID_8814A 0x0610 -+#define REG_BSSID_8814A 0x0618 -+#define REG_MAR_8814A 0x0620 -+#define REG_MBIDCAMCFG_8814A 0x0628 -+ -+#define REG_USTIME_EDCA_8814A 0x0638 -+#define REG_MAC_SPEC_SIFS_8814A 0x063A -+#define REG_RESP_SIFP_CCK_8814A 0x063C -+#define REG_RESP_SIFS_OFDM_8814A 0x063E -+#define REG_ACKTO_8814A 0x0640 -+#define REG_CTS2TO_8814A 0x0641 -+#define REG_EIFS_8814A 0x0642 -+ -+#define REG_NAV_UPPER_8814A 0x0652 /* unit of 128 */ -+#define REG_TRXPTCL_CTL_8814A 0x0668 -+ -+/* Security */ -+#define REG_CAMCMD_8814A 0x0670 -+#define REG_CAMWRITE_8814A 0x0674 -+#define REG_CAMREAD_8814A 0x0678 -+#define REG_CAMDBG_8814A 0x067C -+#define REG_SECCFG_8814A 0x0680 -+ -+/* Power */ -+#define REG_WOW_CTRL_8814A 0x0690 -+#define REG_PS_RX_INFO_8814A 0x0692 -+#define REG_UAPSD_TID_8814A 0x0693 -+#define REG_WKFMCAM_NUM_8814A 0x0698 -+#define REG_RXFLTMAP0_8814A 0x06A0 -+#define REG_RXFLTMAP1_8814A 0x06A2 -+#define REG_RXFLTMAP2_8814A 0x06A4 -+#define REG_BCN_PSR_RPT_8814A 0x06A8 -+#define REG_BT_COEX_TABLE_8814A 0x06C0 -+#define REG_TX_DATA_RSP_RATE_8814A 0x06DE -+#define REG_ASSOCIATED_BFMER0_INFO_8814A 0x06E4 -+#define REG_ASSOCIATED_BFMER1_INFO_8814A 0x06EC -+#define REG_CSI_RPT_PARAM_BW20_8814A 0x06F4 -+#define REG_CSI_RPT_PARAM_BW40_8814A 0x06F8 -+#define REG_CSI_RPT_PARAM_BW80_8814A 0x06FC -+ -+/* Hardware Port 2 */ -+#define REG_MACID1_8814A 0x0700 -+#define REG_BSSID1_8814A 0x0708 -+/* Hardware Port 3 */ -+#define REG_MACID2_8814A 0x1620 -+#define REG_BSSID2_8814A 0x1628 -+/* Hardware Port 4 */ -+#define REG_MACID3_8814A 0x1630 -+#define REG_BSSID3_8814A 0x1638 -+/* Hardware Port 5 */ -+#define REG_MACID4_8814A 0x1640 -+#define REG_BSSID4_8814A 0x1648 -+ -+#define REG_ASSOCIATED_BFMEE_SEL_8814A 0x0714 -+#define REG_SND_PTCL_CTRL_8814A 0x0718 -+#define REG_IQ_DUMP_8814A 0x07C0 -+ -+#define REG_CPU_DMEM_CON_8814A 0x1080 -+ -+/**** page 19 ****/ -+/* TX BeamForming */ -+#define REG_BB_TXBF_ANT_SET_BF1 0x19ac -+#define REG_BB_TXBF_ANT_SET_BF0 0x19b4 -+ -+/* 0x1200h ~ 0x12FFh DDMA CTRL -+ * -+ * ----------------------------------------------------- */ -+#define REG_DDMA_CH0SA 0x1200 -+#define REG_DDMA_CH0DA 0x1204 -+#define REG_DDMA_CH0CTRL 0x1208 -+#define REG_DDMA_CH1SA 0x1210 -+#define REG_DDMA_CH1DA 0x1214 -+#define REG_DDMA_CH1CTRL 0x1218 -+#define REG_DDMA_CH2SA 0x1220 -+#define REG_DDMA_CH2DA 0x1224 -+#define REG_DDMA_CH2CTRL 0x1228 -+#define REG_DDMA_CH3SA 0x1230 -+#define REG_DDMA_CH3DA 0x1234 -+#define REG_DDMA_CH3CTRL 0x1238 -+#define REG_DDMA_CH4SA 0x1240 -+#define REG_DDMA_CH4DA 0x1244 -+#define REG_DDMA_CH4CTRL 0x1248 -+#define REG_DDMA_CH5SA 0x1250 -+#define REG_DDMA_CH5DA 0x1254 -+#define REG_DDMA_CH5CTRL 0x1258 -+#define REG_DDMA_INT_MSK 0x12E0 -+#define REG_DDMA_CHSTATUS 0x12E8 -+#define REG_DDMA_CHKSUM 0x12F0 -+#define REG_DDMA_MONITER 0x12FC -+ -+#define REG_Q0_Q1_INFO_8814A 0x1400 -+#define REG_Q2_Q3_INFO_8814A 0x1404 -+#define REG_Q4_Q5_INFO_8814A 0x1408 -+#define REG_Q6_Q7_INFO_8814A 0x140C -+#define REG_MGQ_HIQ_INFO_8814A 0x1410 -+#define REG_CMDQ_BCNQ_INFO_8814A 0x1414 -+ -+#define REG_MACID_DROP0_8814A 0x1450 -+#define REG_MACID_DROP1_8814A 0x1454 -+#define REG_MACID_DROP2_8814A 0x1458 -+#define REG_MACID_DROP3_8814A 0x145C -+ -+#define DDMA_LEN_MASK 0x0001FFFF -+#define FW_CHKSUM_DUMMY_SZ 8 -+#define DDMA_CH_CHKSUM_CNT BIT(24) -+#define DDMA_RST_CHKSUM_STS BIT(25) -+#define DDMA_MODE_BLOCK_CPU BIT(26) -+#define DDMA_CHKSUM_FAIL BIT(27) -+#define DDMA_DA_W_DISABLE BIT(28) -+#define DDMA_CHKSUM_EN BIT(29) -+#define DDMA_CH_OWN BIT(31) -+ -+ -+/* 3081 FWDL */ -+#define FWDL_EN BIT0 -+#define IMEM_BOOT_DL_RDY BIT1 -+#define IMEM_BOOT_CHKSUM_FAIL BIT2 -+#define IMEM_DL_RDY BIT3 -+#define IMEM_CHKSUM_OK BIT4 -+#define DMEM_DL_RDY BIT5 -+#define DMEM_CHKSUM_OK BIT6 -+#define EMEM_DL_RDY BIT7 -+#define EMEM_CHKSUM_FAIL BIT8 -+#define EMEM_TXBUF_DL_RDY BIT9 -+#define EMEM_TXBUF_CHKSUM_FAIL BIT10 -+#define CPU_CLK_SWITCH_BUSY BIT11 -+#define CPU_CLK_SEL (BIT12 | BIT13) -+#define FWDL_OK BIT14 -+#define FW_INIT_RDY BIT15 -+#define R_EN_BOOT_FLASH BIT20 -+ -+#define OCPBASE_IMEM_3081 0x00000000 -+#define OCPBASE_DMEM_3081 0x00200000 -+#define OCPBASE_RPTBUF_3081 0x18660000 -+#define OCPBASE_RXBUF2_3081 0x18680000 -+#define OCPBASE_RXBUF_3081 0x18700000 -+#define OCPBASE_TXBUF_3081 0x18780000 -+ -+ -+#define REG_FAST_EDCA_VOVI_SETTING_8814A 0x1448 -+#define REG_FAST_EDCA_BEBK_SETTING_8814A 0x144C -+ -+ -+/* ----------------------------------------------------- -+ * */ -+ -+ -+/* ----------------------------------------------------- -+ * -+ * Redifine 8192C register definition for compatibility -+ * -+ * ----------------------------------------------------- */ -+ -+/* TODO: use these definition when using REG_xxx naming rule. -+ * NOTE: DO NOT Remove these definition. Use later. */ -+#define EFUSE_CTRL_8814A REG_EFUSE_CTRL_8814A /* E-Fuse Control. */ -+#define EFUSE_TEST_8814A REG_LDO_EFUSE_CTRL_8814A /* E-Fuse Test. */ -+#define MSR_8814A (REG_CR_8814A + 2) /* Media Status register */ -+#define ISR_8814A REG_HISR0_8814A -+#define TSFR_8814A REG_TSFTR_8814A /* Timing Sync Function Timer Register. */ -+ -+#define PBP_8814A REG_PBP_8814A -+ -+/* Redifine MACID register, to compatible prior ICs. */ -+#define IDR0_8814A REG_MACID_8814A /* MAC ID Register, Offset 0x0050-0x0053 */ -+#define IDR4_8814A (REG_MACID_8814A + 4) /* MAC ID Register, Offset 0x0054-0x0055 */ -+ -+ -+/* -+ * 9. Security Control Registers (Offset: ) -+ * */ -+#define RWCAM_8814A REG_CAMCMD_8814A /* 8190 Data Sheet is called CAMcmd */ -+#define WCAMI_8814A REG_CAMWRITE_8814A /* Software write CAM input content */ -+#define RCAMO_8814A REG_CAMREAD_8814A /* Software read/write CAM config */ -+#define CAMDBG_8814A REG_CAMDBG_8814A -+#define SECR_8814A REG_SECCFG_8814A /* Security Configuration Register */ -+ -+ -+/* ---------------------------------------------------------------------------- -+ * 8195 IMR/ISR bits (offset 0xB0, 8bits) -+ * ---------------------------------------------------------------------------- */ -+#define IMR_DISABLED_8814A 0 -+/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -+#define IMR_TIMER2_8814A BIT31 /* Timeout interrupt 2 */ -+#define IMR_TIMER1_8814A BIT30 /* Timeout interrupt 1 */ -+#define IMR_PSTIMEOUT_8814A BIT29 /* Power Save Time Out Interrupt */ -+#define IMR_GTINT4_8814A BIT28 /* When GTIMER4 expires, this bit is set to 1 */ -+#define IMR_GTINT3_8814A BIT27 /* When GTIMER3 expires, this bit is set to 1 */ -+#define IMR_TXBCN0ERR_8814A BIT26 /* Transmit Beacon0 Error */ -+#define IMR_TXBCN0OK_8814A BIT25 /* Transmit Beacon0 OK */ -+#define IMR_TSF_BIT32_TOGGLE_8814A BIT24 /* TSF Timer BIT32 toggle indication interrupt */ -+#define IMR_BCNDMAINT0_8814A BIT20 /* Beacon DMA Interrupt 0 */ -+#define IMR_BCNDERR0_8814A BIT16 /* Beacon Queue DMA OK0 */ -+#define IMR_HSISR_IND_ON_INT_8814A BIT15 /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -+#define IMR_BCNDMAINT_E_8814A BIT14 /* Beacon DMA Interrupt Extension for Win7 */ -+#define IMR_ATIMEND_8814A BIT12 /* CTWidnow End or ATIM Window End */ -+#define IMR_C2HCMD_8814A BIT10 /* CPU to Host Command INT Status, Write 1 clear */ -+#define IMR_CPWM2_8814A BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_CPWM_8814A BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */ -+#define IMR_HIGHDOK_8814A BIT7 /* High Queue DMA OK */ -+#define IMR_MGNTDOK_8814A BIT6 /* Management Queue DMA OK */ -+#define IMR_BKDOK_8814A BIT5 /* AC_BK DMA OK */ -+#define IMR_BEDOK_8814A BIT4 /* AC_BE DMA OK */ -+#define IMR_VIDOK_8814A BIT3 /* AC_VI DMA OK */ -+#define IMR_VODOK_8814A BIT2 /* AC_VO DMA OK */ -+#define IMR_RDU_8814A BIT1 /* Rx Descriptor Unavailable */ -+#define IMR_ROK_8814A BIT0 /* Receive DMA OK */ -+ -+/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -+#define IMR_MCUERR_8814A BIT28 /* Beacon DMA Interrupt 7 */ -+#define IMR_BCNDMAINT7_8814A BIT27 /* Beacon DMA Interrupt 7 */ -+#define IMR_BCNDMAINT6_8814A BIT26 /* Beacon DMA Interrupt 6 */ -+#define IMR_BCNDMAINT5_8814A BIT25 /* Beacon DMA Interrupt 5 */ -+#define IMR_BCNDMAINT4_8814A BIT24 /* Beacon DMA Interrupt 4 */ -+#define IMR_BCNDMAINT3_8814A BIT23 /* Beacon DMA Interrupt 3 */ -+#define IMR_BCNDMAINT2_8814A BIT22 /* Beacon DMA Interrupt 2 */ -+#define IMR_BCNDMAINT1_8814A BIT21 /* Beacon DMA Interrupt 1 */ -+#define IMR_BCNDOK7_8814A BIT20 /* Beacon Queue DMA OK Interrup 7 */ -+#define IMR_BCNDOK6_8814A BIT19 /* Beacon Queue DMA OK Interrup 6 */ -+#define IMR_BCNDOK5_8814A BIT18 /* Beacon Queue DMA OK Interrup 5 */ -+#define IMR_BCNDOK4_8814A BIT17 /* Beacon Queue DMA OK Interrup 4 */ -+#define IMR_BCNDOK3_8814A BIT16 /* Beacon Queue DMA OK Interrup 3 */ -+#define IMR_BCNDOK2_8814A BIT15 /* Beacon Queue DMA OK Interrup 2 */ -+#define IMR_BCNDOK1_8814A BIT14 /* Beacon Queue DMA OK Interrup 1 */ -+#define IMR_ATIMEND_E_8814A BIT13 /* ATIM Window End Extension for Win7 */ -+#define IMR_TXERR_8814A BIT11 /* Tx Error Flag Interrupt Status, write 1 clear. */ -+#define IMR_RXERR_8814A BIT10 /* Rx Error Flag INT Status, Write 1 clear */ -+#define IMR_TXFOVW_8814A BIT9 /* Transmit FIFO Overflow */ -+#define IMR_RXFOVW_8814A BIT8 /* Receive FIFO Overflow */ -+ -+ -+#ifdef CONFIG_PCI_HCI -+ #define IMR_TX_MASK (IMR_VODOK_8814A | IMR_VIDOK_8814A | IMR_BEDOK_8814A | IMR_BKDOK_8814A | IMR_MGNTDOK_8814A | IMR_HIGHDOK_8814A) -+ -+ #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8814A | IMR_TXBCN0OK_8814A | IMR_TXBCN0ERR_8814A | IMR_BCNDERR0_8814A) -+ -+ #define RT_AC_INT_MASKS (IMR_VIDOK_8814A | IMR_VODOK_8814A | IMR_BEDOK_8814A | IMR_BKDOK_8814A) -+#endif -+ -+ -+/*=================================================================== -+===================================================================== -+Here the register defines are for 92C. When the define is as same with 92C, -+we will use the 92C's define for the consistency -+So the following defines for 92C is not entire!!!!!! -+===================================================================== -+=====================================================================*/ -+ -+ -+/* ----------------------------------------------------- -+ * -+ * 0xFE00h ~ 0xFE55h USB Configuration -+ * -+ * ----------------------------------------------------- */ -+ -+/* 2 Special Option */ -+#define USB_AGG_EN_8814A BIT(7) -+#define REG_USB_HRPWM_U3 0xF052 -+ -+#define LAST_ENTRY_OF_TX_PKT_BUFFER_8814A (2048-1) /* 20130415 KaiYuan add for 8814 */ -+ -+#endif /* __RTL8814A_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8814a_sreset.h b/drivers/staging/rtl8723cs/include/rtl8814a_sreset.h -new file mode 100644 -index 000000000000..d65cb98a530e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814a_sreset.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL88814A_SRESET_H_ -+#define _RTL8814A_SRESET_H_ -+ -+#include -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ extern void rtl8814_sreset_xmit_status_check(_adapter *padapter); -+ extern void rtl8814_sreset_linked_status_check(_adapter *padapter); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8814a_xmit.h b/drivers/staging/rtl8723cs/include/rtl8814a_xmit.h -new file mode 100644 -index 000000000000..8901fdeab52a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814a_xmit.h -@@ -0,0 +1,315 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8814A_XMIT_H__ -+#define __RTL8814A_XMIT_H__ -+ -+typedef struct txdescriptor_8814 { -+ /* Offset 0 */ -+ u32 pktlen:16; -+ u32 offset:8; -+ u32 bmc:1; -+ u32 htc:1; -+ u32 ls:1; -+} TXDESC_8814, *PTXDESC_8814; -+ -+ -+#define OFFSET_SZ 0 -+#define OFFSET_SHT 16 -+ -+ -+ -+#ifdef CONFIG_SDIO_HCI -+ #define SET_TX_DESC_SDIO_TXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) -+#endif /* CONFIG_SDIO_HCI */ -+ -+/* ----------------------------------------------------------------- -+ * RTL8814A TX BUFFER DESC -+ * ----------------------------------------------------------------- -+ * -+- Each TXBD has 4 segment. -+ -- For 32 bit, each segment is 8 bytes. -+ -- For 64 bit, each segment is 16 bytes. -+*/ -+#if 0 -+ #if 1 /* 32 bit */ -+ #define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8), 0, 16, __Value) -+ #define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8)+4, 0, 32, __Value) -+ #else /* 64 bit */ -+ #define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16), 0, 16, __Value) -+ #define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+4, 0, 32, __Value) -+ #endif -+ #define SET_TX_EXTBUFF_DESC_ADDR_HIGH_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+8, 0, 32, __Value) -+#endif -+/*c2h-DWORD 2*/ -+#define GET_RX_STATUS_DESC_RPT_SEL_8814A(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+8, 28, 1) -+ -+/* ********************************************************* -+ * for Txfilldescroptor8814Ae, fill the desc content. */ -+#if 1 /* 32 bit */ -+ #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 0, 16, __Valeu) -+ #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 31, 1, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8)+4, 0, 32, __Valeu) -+#else /* 64 bit */ -+ #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) -+ #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) -+ #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) -+#endif -+#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) -+ -+/* ********************************************************* */ -+ -+/* TX buffer -+ * ************* -+ * Dword 0 */ -+#define SET_TX_BUFF_DESC_LEN_0_8814A(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Valeu) -+#define SET_TX_BUFF_DESC_PSB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -+#define SET_TX_BUFF_DESC_OWN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+#define GET_TX_BUFF_DESC_OWN_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) -+ -+/* Dword 1 */ -+#define SET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -+#define GET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) -+/* Dword 2 */ -+#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) -+#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) -+/* Dword 3 */ /* RESERVED 0 */ -+ -+#if 0 /* 64 bit */ -+ /* Dword 4 */ -+ #define SET_TX_BUFF_DESC_LEN_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 16, __Value) -+ #define SET_TX_BUFF_DESC_AMSDU_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 31, 1, __Value) -+ /* Dword 5 */ -+ #define SET_TX_BUFF_DESC_ADDR_LOW_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 32, __Value) -+ /* Dword 6 */ -+ #define SET_TX_BUFF_DESC_ADDR_HIGH_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 32, __Value) -+ /* Dword 7 */ /* RESERVED 0 */ -+ /* Dword 8 */ -+ #define SET_TX_BUFF_DESC_LEN_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 16, __Value) -+ #define SET_TX_BUFF_DESC_AMSDU_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 31, 1, __Value) -+ /* Dword 9 */ -+ #define SET_TX_BUFF_DESC_ADDR_LOW_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 32, __Value) -+ /* Dword 10 */ -+ #define SET_TX_BUFF_DESC_ADDR_HIGH_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) -+ /* Dword 11 */ /* RESERVED 0 */ -+ /* Dword 12 */ -+ #define SET_TX_BUFF_DESC_LEN_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 16, __Value) -+ #define SET_TX_BUFF_DESC_AMSDU_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 31, 1, __Value) -+ /* Dword 13 */ -+ #define SET_TX_BUFF_DESC_ADDR_LOW_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+52, 0, 32, __Value) -+ /* Dword 14 */ -+ #define SET_TX_BUFF_DESC_ADDR_HIGH_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+56, 0, 32, __Value) -+ /* Dword 15 */ /* RESERVED 0 */ -+#endif -+ -+/* *****Desc content -+ * TX Info -+ * ************* -+ * Dword 0 */ -+#define SET_TX_DESC_PKT_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -+#define GET_TX_DESC_PKT_SIZE_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 0, 16) -+#define SET_TX_DESC_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -+#define GET_TX_DESC_OFFSET_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 16, 8) -+#define SET_TX_DESC_BMC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -+#define SET_TX_DESC_HTC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -+#define SET_TX_DESC_LAST_SEG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -+#define SET_TX_DESC_LINIP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -+#define SET_TX_DESC_AMSDU_PAD_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -+#define SET_TX_DESC_NO_ACM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -+#define SET_TX_DESC_GF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -+#define SET_TX_DESC_DISQSELSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -+ -+/* Dword 1 */ -+#define SET_TX_DESC_MACID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -+#define SET_TX_DESC_QUEUE_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -+#define SET_TX_DESC_RDG_NAV_EXT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -+#define SET_TX_DESC_LSIG_TXOP_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -+#define SET_TX_DESC_PIFS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -+#define SET_TX_DESC_RATE_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -+#define SET_TX_DESC_EN_DESC_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -+#define SET_TX_DESC_SEC_TYPE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -+#define SET_TX_DESC_PKT_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -+#define SET_TX_DESC_MORE_DATA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) -+#define SET_TX_DESC_TXOP_PS_CAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) -+#define SET_TX_DESC_TXOP_PS_MODE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) -+ -+ -+/* Dword 2 */ -+#define SET_TX_DESC_PAID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -+#define SET_TX_DESC_CCA_RTS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -+#define SET_TX_DESC_AGG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -+#define SET_TX_DESC_RDG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -+#define SET_TX_DESC_NULL_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -+#define SET_TX_DESC_NULL_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -+#define SET_TX_DESC_BK_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -+#define SET_TX_DESC_MORE_FRAG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -+#define GET_TX_DESC_MORE_FRAG_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 17, 1) -+#define SET_TX_DESC_RAW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -+#define SET_TX_DESC_SPE_RPT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -+#define SET_TX_DESC_AMPDU_DENSITY_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -+#define SET_TX_DESC_BT_NULL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -+#define SET_TX_DESC_GID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) -+#define SET_TX_DESC_HW_AES_IV_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 31, 1, __Value) -+ -+ -+/* Dword 3 */ -+#define SET_TX_DESC_WHEADER_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 5, __Value) -+#define SET_TX_DESC_EARLY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -+#define SET_TX_DESC_HW_SSN_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -+#define SET_TX_DESC_USE_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -+#define SET_TX_DESC_DISABLE_RTS_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -+#define SET_TX_DESC_DISABLE_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -+#define SET_TX_DESC_CTS2SELF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -+#define SET_TX_DESC_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -+#define SET_TX_DESC_HW_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -+#define SET_TX_DESC_CHECK_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) -+#define SET_TX_DESC_NAV_USE_HDR_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -+#define SET_TX_DESC_USE_MAX_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -+#define SET_TX_DESC_MAX_AGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -+#define SET_TX_DESC_NDPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -+#define SET_TX_DESC_AMPDU_MAX_TIME_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) -+ -+/* Dword 4 */ -+#define SET_TX_DESC_TX_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -+#define SET_TX_DESC_TRY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -+#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -+#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -+#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -+#define SET_TX_DESC_DATA_RETRY_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -+#define SET_TX_DESC_RTS_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -+#define SET_TX_DESC_PCTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -+#define SET_TX_DESC_PCTS_MASK_IDX_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) -+ -+ -+/* Dword 5 */ -+#define SET_TX_DESC_DATA_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -+#define SET_TX_DESC_DATA_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -+#define SET_TX_DESC_DATA_BW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -+#define SET_TX_DESC_DATA_LDPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -+#define SET_TX_DESC_DATA_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -+#define SET_TX_DESC_CTROL_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -+#define SET_TX_DESC_RTS_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -+#define SET_TX_DESC_RTS_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -+#define SET_TX_DESC_SIGNALING_TA_PKT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 17, 1, __Value) -+#define SET_TX_DESC_PORT_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 3, __Value)/* 20130415 KaiYuan add for 8814 */ -+#define SET_TX_DESC_TX_ANT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) -+#define SET_TX_DESC_TX_POWER_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) -+ -+/* Dword 6 */ -+#define SET_TX_DESC_SW_DEFINE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -+#define SET_TX_DESC_MBSSID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -+#define SET_TX_DESC_ANTSEL_A_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -+#define SET_TX_DESC_ANTSEL_B_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -+#define SET_TX_DESC_ANT_MAPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 2, __Value) -+#define SET_TX_DESC_ANT_MAPB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 24, 2, __Value) -+#define SET_TX_DESC_ANT_MAPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 26, 2, __Value) -+#define SET_TX_DESC_ANT_MAPD_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 28, 2, __Value) -+ -+ -+/* Dword 7 */ -+#ifdef CONFIG_PCI_HCI -+ #define SET_TX_DESC_TX_BUFFER_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+#if defined(CONFIG_SDIO_HCI)|| defined(CONFIG_USB_HCI) -+ #define SET_TX_DESC_TX_DESC_CHECKSUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -+#endif -+#define SET_TX_DESC_NTX_MAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 20, 4, __Value) -+#define SET_TX_DESC_USB_TXAGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -+ -+ -+/* Dword 8 */ -+#define SET_TX_DESC_RTS_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -+#define SET_TX_DESC_BAR_RTY_TH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -+#define SET_TX_DESC_DATA_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -+#define SET_TX_DESC_EN_HWEXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 14, 1, __Value) -+#define SET_TX_DESC_HWSEQ_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -+#if defined(CONFIG_PCI_HCI)|| defined(CONFIG_USB_HCI) -+ #define SET_TX_DESC_NEXT_HEAD_PAGE_L_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -+#endif -+#ifdef CONFIG_SDIO_HCI -+ #define SET_TX_DESC_SDIO_SEQ_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) /* 20130415 KaiYuan add for 8814AS */ -+#endif -+#define SET_TX_DESC_TAIL_PAGE_L_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) -+ -+/* Dword 9 */ -+#define SET_TX_DESC_PADDING_LENGTH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -+#define SET_TX_DESC_TXBF_PATH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) -+#define SET_TX_DESC_SEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -+#define SET_TX_DESC_NEXT_HEAD_PAGE_H_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 4, __Value) -+#define SET_TX_DESC_TAIL_PAGE_H_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 28, 4, __Value) -+ -+ -+ -+#define SET_EARLYMODE_PKTNUM_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -+#define SET_EARLYMODE_LEN0_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -+#define SET_EARLYMODE_LEN1_1_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -+#define SET_EARLYMODE_LEN1_2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -+#define SET_EARLYMODE_LEN2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -+#define SET_EARLYMODE_LEN3_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) -+ -+ -+void rtl8814a_cal_txdesc_chksum(u8 *ptxdesc); -+void rtl8814a_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -+void rtl8814a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void rtl8814a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -+void rtl8814a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -+void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); -+ -+#ifdef CONFIG_USB_HCI -+ s32 rtl8814au_init_xmit_priv(PADAPTER padapter); -+ void rtl8814au_free_xmit_priv(PADAPTER padapter); -+ s32 rtl8814au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8814au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8814au_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8814au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8814au_xmit_buf_handler(PADAPTER padapter); -+ void rtl8814au_xmit_tasklet(void *priv); -+ s32 rtl8814au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif /* CONFIG_USB_HCI */ -+ -+#ifdef CONFIG_PCI_HCI -+ s32 rtl8814ae_init_xmit_priv(PADAPTER padapter); -+ void rtl8814ae_free_xmit_priv(PADAPTER padapter); -+ struct xmit_buf *rtl8814ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+ void rtl8814ae_xmitframe_resume(_adapter *padapter); -+ s32 rtl8814ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+ s32 rtl8814ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ s32 rtl8814ae_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+ s32 rtl8814ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ void rtl8814ae_xmit_tasklet(void *priv); -+#ifdef CONFIG_XMIT_THREAD_MODE -+ s32 rtl8814ae_xmit_buf_handler(_adapter *padapter); -+#endif -+#endif -+ -+void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, u8 *ptxdesc); -+u8 -+SCMapping_8814( -+ PADAPTER Adapter, -+ struct pkt_attrib *pattrib -+); -+ -+u8 -+BWMapping_8814( -+ PADAPTER Adapter, -+ struct pkt_attrib *pattrib -+); -+ -+ -+#endif /* __RTL8814_XMIT_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8814b_hal.h b/drivers/staging/rtl8723cs/include/rtl8814b_hal.h -new file mode 100644 -index 000000000000..301d1a054166 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814b_hal.h -@@ -0,0 +1,239 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8814B_HAL_H_ -+#define _RTL8814B_HAL_H_ -+ -+#include /* BIT(x) */ -+#include /* PADAPTER */ -+#include "../hal/halmac/halmac_api.h" /* MAC REG definition */ -+ -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+#define MAX_RECVBUF_SZ 46080 /* 45KB, TX: (256-64)KB */ -+#else /* !CONFIG_SUPPORT_TRX_SHARED */ -+#define MAX_RECVBUF_SZ 24576 /* 24KB, TX: 256KB */ -+#endif /* !CONFIG_SUPPORT_TRX_SHARED */ -+ -+#if 0 -+/* -+ * MAC Register definition -+ */ -+#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8814B /* hal_com.c & phydm */ -+#define REG_AFE_PLL_CTRL REG_AFE_CTRL2_8814B /* hal_com.c & phydm */ -+#define REG_MAC_PHY_CTRL REG_AFE_CTRL3_8814B /* phydm only */ -+#endif -+#define REG_LEDCFG0 REG_LED_CFG_8814B /* rtw_mp.c */ -+#if 0 -+#define MSR (REG_CR_8814B + 2) /* rtw_mp.c & hal_com.c */ -+#define MSR1 REG_CR_EXT_8814B /* rtw_mp.c & hal_com.c */ -+#endif -+#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */ -+#if 0 -+#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */ -+ -+#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8814B /* hal_com.c */ -+#endif -+#define REG_WKFMCAM_NUM REG_WKFMCAM_CMD_8814B /* hal_com.c: WOWLAN */ -+#define REG_WOWLAN_WAKE_REASON 0x01C7 /* hal_com.c: WOWLAN */ -+#define REG_RXPKTBUF_CTRL (REG_PKTBUF_DBG_CTRL_8814B + 2) /* hal_com.c: WOWLAN */ -+#define REG_RXPKT_NUM REG_RXDMA_CTRL_8814B /* hal_com.c: WOWLAN */ -+ -+/* RXERR_RPT, for rtw_mp.c */ -+#define RXERR_TYPE_OFDM_PPDU 0 -+#define RXERR_TYPE_OFDM_FALSE_ALARM 2 -+#define RXERR_TYPE_OFDM_MPDU_OK 0 -+#define RXERR_TYPE_OFDM_MPDU_FAIL 1 -+#define RXERR_TYPE_CCK_PPDU 3 -+#define RXERR_TYPE_CCK_FALSE_ALARM 5 -+#define RXERR_TYPE_CCK_MPDU_OK 3 -+#define RXERR_TYPE_CCK_MPDU_FAIL 4 -+#define RXERR_TYPE_HT_PPDU 8 -+#define RXERR_TYPE_HT_FALSE_ALARM 9 -+#define RXERR_TYPE_HT_MPDU_TOTAL 6 -+#define RXERR_TYPE_HT_MPDU_OK 6 -+#define RXERR_TYPE_HT_MPDU_FAIL 7 -+#define RXERR_TYPE_RX_FULL_DROP 10 -+ -+#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8814B -+#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8814B -+#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8814B(type) \ -+ | ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8814B : 0)) -+ -+/* hal_com.c:rtw_lps_state_chk() */ -+#define BIT_PWRBIT_OW_EN BIT_WMAC_TCRPWRMGT_HWDATA_EN_8814B -+ -+/* -+ * BB Register definition -+ */ -+#define rPMAC_Reset 0x100 /* hal_mp.c */ -+ -+#define rFPGA0_RFMOD 0x800 -+#define rFPGA0_TxInfo 0x804 -+#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */ -+#define rFPGA0_TxGainStage 0x80C /* phydm only */ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */ -+#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */ -+#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */ -+#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */ -+#define rTxAGC_B_Mcs03_Mcs00 0x83C -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84C -+#define rFPGA0_XA_RFInterfaceOE 0x860 -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86C -+#define rFPGA0_XAB_RFInterfaceSW 0x870 -+#define rFPGA0_XAB_RFParameter 0x878 -+#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */ -+#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */ -+#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8814b_phy.c) */ -+ -+#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */ -+#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */ -+ -+#define rFPGA1_TxInfo 0x90C /* hal_mp.c */ -+#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */ -+/* TX BeamForming */ -+#define REG_BB_TX_PATH_SEL_1_8814B 0x93C /* rtl8814b_phy.c */ -+#define REG_BB_TX_PATH_SEL_2_8814B 0x940 /* rtl8814b_phy.c */ -+ -+/* TX BeamForming */ -+#define REG_BB_TXBF_ANT_SET_BF1_8814B 0x19AC /* rtl8814b_phy.c */ -+#define REG_BB_TXBF_ANT_SET_BF0_8814B 0x19B4 /* rtl8814b_phy.c */ -+ -+#define rCCK0_System 0xA00 -+#define rCCK0_AFESetting 0xA04 -+ -+#define rCCK0_DSPParameter2 0xA1C -+#define rCCK0_TxFilter1 0xA20 -+#define rCCK0_TxFilter2 0xA24 -+#define rCCK0_DebugPort 0xA28 -+#define rCCK0_FalseAlarmReport 0xA2C -+ -+#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */ -+#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */ -+ -+#define rOFDM0_TRxPathEnable 0xC04 -+#define rOFDM0_TRMuxPar 0xC08 -+#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */ -+#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */ -+#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */ -+#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */ -+#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */ -+#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */ -+#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */ -+#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8814b_phy.c) */ -+ -+#define rOFDM1_LSTF 0xD00 -+#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */ -+#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8814b_phy.c) */ -+#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8814b_phy.c) */ -+#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8814b_phy.c) */ -+#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8814b_phy.c) */ -+ -+#define rTxAGC_A_Rate18_06 0xE00 -+#define rTxAGC_A_Rate54_24 0xE04 -+#define rTxAGC_A_CCK1_Mcs32 0xE08 -+#define rTxAGC_A_Mcs03_Mcs00 0xE10 -+#define rTxAGC_A_Mcs07_Mcs04 0xE14 -+#define rTxAGC_A_Mcs11_Mcs08 0xE18 -+#define rTxAGC_A_Mcs15_Mcs12 0xE1C -+#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */ -+#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */ -+#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8814b_phy.c) */ -+/* RFE */ -+#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */ -+#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */ -+#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */ -+#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */ -+#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */ -+#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */ -+#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */ -+#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */ -+#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */ -+#define bMask_RFEInv_Jaguar 0x3FF00000 -+#define bMask_AntselPathFollow_Jaguar 0x00030000 -+ -+#define rC_RFE_Pinmux_Jaguar 0x18B4 /* Path_C RFE cotrol pinmux*/ -+#define rD_RFE_Pinmux_Jaguar 0x1AB4 /* Path_D RFE cotrol pinmux*/ -+#define rA_RFE_Sel_Jaguar2 0x1990 -+ -+/* Page1(0x100) */ -+#define bBBResetB 0x100 -+ -+/* Page8(0x800) */ -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+/* Reg 0x80C rFPGA0_TxGainStage */ -+#define bXBTxAGC 0xF00 -+#define bXCTxAGC 0xF000 -+#define bXDTxAGC 0xF0000 -+ -+/* PageA(0xA00) */ -+#define bCCKBBMode 0x3 -+ -+#define bCCKScramble 0x8 -+#define bCCKTxRate 0x3000 -+ -+/* General */ -+#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */ -+#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */ -+#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */ -+#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */ -+#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */ -+#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */ -+#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */ -+ -+#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */ -+#define bDisable 0x0 /* rtw_mp.c */ -+ -+#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */ -+ -+#define Rx_Smooth_Factor 20 /* phydm only */ -+ -+/* -+ * RF Register definition -+ */ -+#define RF_AC 0x00 -+#define RF_AC_Jaguar 0x00 /* hal_mp.c */ -+#define RF_CHNLBW 0x18 /* rtl8814b_phy.c */ -+#define RF_ModeTableAddr 0x30 /* rtl8814b_phy.c */ -+#define RF_ModeTableData0 0x31 /* rtl8814b_phy.c */ -+#define RF_ModeTableData1 0x32 /* rtl8814b_phy.c */ -+#define RF_0x52 0x52 -+#define RF_WeLut_Jaguar 0xEF /* rtl8814b_phy.c */ -+ -+/* General Functions */ -+void rtl8814b_init_hal_spec(PADAPTER); /* hal/hal_com.c */ -+ -+#ifdef CONFIG_MP_INCLUDED -+/* MP Functions */ -+#include /* struct mp_priv */ -+void rtl8814b_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */ -+void rtl8814b_mp_config_rfpath(PADAPTER); /* hal_mp.c */ -+#endif -+void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus); -+ -+#ifdef CONFIG_USB_HCI -+#include -+#elif defined(CONFIG_PCI_HCI) -+#include -+#endif -+ -+#endif /* _RTL8814B_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8814be_hal.h b/drivers/staging/rtl8723cs/include/rtl8814be_hal.h -new file mode 100644 -index 000000000000..3e124cae69de ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814be_hal.h -@@ -0,0 +1,30 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8814BE_HAL_H_ -+#define _RTL8814BE_HAL_H_ -+ -+#include /* PADAPTER */ -+ -+#define RT_BCN_INT_MASKS (BIT_BCNDMAINT0_MSK_8814B | \ -+ BIT_TXBCN0OK_MSK_8814B | \ -+ BIT_TXBCN0ERR_MSK_8814B | \ -+ BIT_BCNDERR0_MSK_8814B) -+ -+/* rtl8814be_ops.c */ -+void UpdateInterruptMask8814BE(PADAPTER, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+u16 get_txbd_rw_reg(u16 q_idx); -+ -+ -+#endif /* _RTL8814BE_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8814bu_hal.h b/drivers/staging/rtl8723cs/include/rtl8814bu_hal.h -new file mode 100644 -index 000000000000..aa5cef998014 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8814bu_hal.h -@@ -0,0 +1,61 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8814BU_HAL_H_ -+#define _RTL8814BU_HAL_H_ -+ -+#ifdef CONFIG_USB_HCI -+ #include /* PADAPTER */ -+ -+ #ifdef CONFIG_USB_HCI -+ #ifdef USB_PACKET_OFFSET_SZ -+ #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) -+ #else -+ #define PACKET_OFFSET_SZ (8) -+ #endif -+ #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) -+ #endif -+ -+ /* undefine MAX_RECVBUF_SZ from rtl8822c_hal.h */ -+ #ifdef MAX_RECVBUF_SZ -+ #undef MAX_RECVBUF_SZ -+ #endif -+ -+ /* recv_buffer must be large than usb agg size */ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 -+ #define MAX_RECVBUF_SZ (15360) /* 15k */ -+ #elif defined(CONFIG_PLATFORM_HISILICON) -+ /* use 16k to workaround for HISILICON platform */ -+ #define MAX_RECVBUF_SZ (16384) -+ #else -+ #define MAX_RECVBUF_SZ (32768) -+ #endif -+ #else -+ #define MAX_RECVBUF_SZ (4000) -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+ /* rtl8814bu_ops.c */ -+ void rtl8814bu_set_hal_ops(PADAPTER padapter); -+ void rtl8814bu_set_hw_type(struct dvobj_priv *pdvobj); -+ -+ /* rtl8814bu_io.c */ -+ void rtl8814bu_set_intf_ops(struct _io_ops *pops); -+ -+#endif /* CONFIG_USB_HCI */ -+ -+ -+#endif /* _RTL8814BU_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8821a_spec.h b/drivers/staging/rtl8723cs/include/rtl8821a_spec.h -new file mode 100644 -index 000000000000..1379ffc3cf9d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8821a_spec.h -@@ -0,0 +1,90 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8821A_SPEC_H__ -+#define __RTL8821A_SPEC_H__ -+ -+#include -+/* This file should based on "hal_com_reg.h" */ -+#include -+/* Because 8812a and 8821a is the same serial, -+ * most of 8821a register definitions are the same as 8812a. */ -+#include -+ -+ -+/* ************************************************************ -+ * 8821A Regsiter offset definition -+ * ************************************************************ */ -+ -+/* ************************************************************ -+ * MAC register -+ * ************************************************************ */ -+ -+/* ----------------------------------------------------- -+ * 0x0000h ~ 0x00FFh System Configuration -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * 0x0100h ~ 0x01FFh MACTOP General Configuration -+ * ----------------------------------------------------- */ -+#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN -+ -+/* ----------------------------------------------------- -+ * 0x0200h ~ 0x027Fh TXDMA Configuration -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * 0x0280h ~ 0x02FFh RXDMA Configuration -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * 0x0300h ~ 0x03FFh PCIe -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * 0x0400h ~ 0x047Fh Protocol Configuration -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * 0x0500h ~ 0x05FFh EDCA Configuration -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * 0x0600h ~ 0x07FFh WMAC Configuration -+ * ----------------------------------------------------- */ -+ -+ -+/* ************************************************************ -+ * SDIO Bus Specification -+ * ************************************************************ */ -+ -+/* ----------------------------------------------------- -+ * SDIO CMD Address Mapping -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * I/O bus domain (Host) -+ * ----------------------------------------------------- */ -+ -+/* ----------------------------------------------------- -+ * SDIO register -+ * ----------------------------------------------------- */ -+#define SDIO_REG_FREE_TXPG2 0x024 -+#define SDIO_REG_HCPWM1_8821A 0x025 -+ -+/* ************************************************************ -+ * Regsiter Bit and Content definition -+ * ************************************************************ */ -+ -+#endif /* __RTL8821A_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8821a_xmit.h b/drivers/staging/rtl8723cs/include/rtl8821a_xmit.h -new file mode 100644 -index 000000000000..28323b79cd79 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8821a_xmit.h -@@ -0,0 +1,176 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8821A_XMIT_H__ -+#define __RTL8821A_XMIT_H__ -+ -+#include -+ -+typedef struct txdescriptor_8821a { -+ /* Offset 0 */ -+ u32 pktlen:16; -+ u32 offset:8; -+ u32 bmc:1; -+ u32 htc:1; -+ u32 rsvd0026:1; -+ u32 rsvd0027:1; -+ u32 linip:1; -+ u32 noacm:1; -+ u32 gf:1; -+ u32 rsvd0031:1; -+ -+ /* Offset 4 */ -+ u32 macid:7; -+ u32 rsvd0407:1; -+ u32 qsel:5; -+ u32 rdg_nav_ext:1; -+ u32 lsig_txop_en:1; -+ u32 pifs:1; -+ u32 rate_id:5; -+ u32 en_desc_id:1; -+ u32 sectype:2; -+ u32 pkt_offset:5; /* unit: 8 bytes */ -+ u32 moredata:1; -+ u32 txop_ps_cap:1; -+ u32 txop_ps_mode:1; -+ -+ /* Offset 8 */ -+ u32 p_aid:9; -+ u32 rsvd0809:1; -+ u32 cca_rts:2; -+ u32 agg_en:1; -+ u32 rdg_en:1; -+ u32 null_0:1; -+ u32 null_1:1; -+ u32 bk:1; -+ u32 morefrag:1; -+ u32 raw:1; -+ u32 spe_rpt:1; -+ u32 ampdu_density:3; -+ u32 bt_null:1; -+ u32 g_id:6; -+ u32 rsvd0830:2; -+ -+ /* Offset 12 */ -+ u32 wheader_len:4; -+ u32 chk_en:1; -+ u32 early_rate:1; -+ u32 hw_ssn_sel:2; -+ u32 userate:1; -+ u32 disrtsfb:1; -+ u32 disdatafb:1; -+ u32 cts2self:1; -+ u32 rtsen:1; -+ u32 hw_rts_en:1; -+ u32 port_id:1; -+ u32 navusehdr:1; -+ u32 use_max_len:1; -+ u32 max_agg_num:5; -+ u32 ndpa:2; -+ u32 ampdu_max_time:8; -+ -+ /* Offset 16 */ -+ u32 datarate:7; -+ u32 try_rate:1; -+ u32 data_ratefb_lmt:5; -+ u32 rts_ratefb_lmt:4; -+ u32 rty_lmt_en:1; -+ u32 data_rt_lmt:6; -+ u32 rtsrate:5; -+ u32 pcts_en:1; -+ u32 pcts_mask_idx:2; -+ -+ /* Offset 20 */ -+ u32 data_sc:4; -+ u32 data_short:1; -+ u32 data_bw:2; -+ u32 data_ldpc:1; -+ u32 data_stbc:2; -+ u32 vcs_stbc:2; -+ u32 rts_short:1; -+ u32 rts_sc:4; -+ u32 rsvd2016:7; -+ u32 tx_ant:4; -+ u32 txpwr_offset:3; -+ u32 rsvd2031:1; -+ -+ /* Offset 24 */ -+ u32 sw_define:12; -+ u32 mbssid:4; -+ u32 antsel_A:3; -+ u32 antsel_B:3; -+ u32 antsel_C:3; -+ u32 antsel_D:3; -+ u32 rsvd2428:4; -+ -+ /* Offset 28 */ -+ u32 checksum:16; -+ u32 rsvd2816:8; -+ u32 usb_txagg_num:8; -+ -+ /* Offset 32 */ -+ u32 rts_rc:6; -+ u32 bar_rty_th:2; -+ u32 data_rc:6; -+ u32 rsvd3214:1; -+ u32 en_hwseq:1; -+ u32 nextneadpage:8; -+ u32 tailpage:8; -+ -+ /* Offset 36 */ -+ u32 padding_len:11; -+ u32 txbf_path:1; -+ u32 seq:12; -+ u32 final_data_rate:8; -+} TXDESC_8821A, *PTXDESC_8821A; -+ -+#ifdef CONFIG_SDIO_HCI -+s32 InitXmitPriv8821AS(PADAPTER padapter); -+void FreeXmitPriv8821AS(PADAPTER padapter); -+s32 XmitBufHandler8821AS(PADAPTER padapter); -+s32 MgntXmit8821AS(PADAPTER padapter, struct xmit_frame *pmgntframe); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+s32 rtl8821as_hal_mgmt_xmit_enqueue(PADAPTER adapter, struct xmit_frame *pxmitframe); -+#endif -+s32 HalXmitNoLock8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 HalXmit8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe); -+#ifndef CONFIG_SDIO_TX_TASKLET -+thread_return XmitThread8821AS(thread_context context); -+#endif /* !CONFIG_SDIO_TX_TASKLET */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+#if 0 -+#ifdef CONFIG_USB_HCI -+s32 rtl8821au_init_xmit_priv(PADAPTER padapter); -+void rtl8821au_free_xmit_priv(PADAPTER padapter); -+s32 rtl8821au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8821au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+s32 rtl8821au_hal_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8821au_xmit_buf_handler(PADAPTER padapter); -+void rtl8821au_xmit_tasklet(void *priv); -+s32 rtl8821au_xmitframe_complete(PADAPTER padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+#endif /* CONFIG_USB_HCI */ -+ -+#ifdef CONFIG_PCI_HCI -+s32 rtl8821e_init_xmit_priv(PADAPTER padapter); -+void rtl8821e_free_xmit_priv(PADAPTER padapter); -+struct xmit_buf *rtl8821e_dequeue_xmitbuf(struct rtw_tx_ring *ring); -+void rtl8821e_xmitframe_resume(PADAPTER padapter); -+s32 rtl8821e_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -+s32 rtl8821e_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -+void rtl8821e_xmit_tasklet(void *priv); -+#endif /* CONFIG_PCI_HCI */ -+#endif -+ -+#endif /* __RTL8821_XMIT_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8821c_dm.h b/drivers/staging/rtl8723cs/include/rtl8821c_dm.h -new file mode 100644 -index 000000000000..b1e4fe608b2a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8821c_dm.h -@@ -0,0 +1,23 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8812C_DM_H__ -+#define __RTL8812C_DM_H__ -+ -+void rtl8821c_phy_init_dm_priv(PADAPTER); -+void rtl8821c_phy_deinit_dm_priv(PADAPTER); -+void rtl8821c_phy_init_haldm(PADAPTER); -+void rtl8821c_phy_haldm_watchdog(PADAPTER); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtl8821c_hal.h b/drivers/staging/rtl8723cs/include/rtl8821c_hal.h -new file mode 100644 -index 000000000000..41d222ef34d9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8821c_hal.h -@@ -0,0 +1,84 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8821C_HAL_H_ -+#define _RTL8821C_HAL_H_ -+ -+#include /* BIT(x) */ -+#include "../hal/halmac/halmac_api.h" /* MAC REG definition */ -+#include "hal_data.h" -+#include "rtl8821c_spec.h" -+#include "../hal/rtl8821c/hal8821c_fw.h" -+ -+#ifdef CONFIG_USB_HCI -+#include -+#endif -+#ifdef CONFIG_SDIO_HCI -+#include -+#endif -+#ifdef CONFIG_PCI_HCI -+#include -+#endif -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+#define FIFO_BLOCK_SIZE 32768 /*@Block size = 32K*/ -+#define RX_FIFO_EXPANDING (1 * FIFO_BLOCK_SIZE) -+#else -+#define RX_FIFO_EXPANDING 0 -+#endif -+ -+ -+#if defined(CONFIG_USB_HCI) -+ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ /* 8821C - RX FIFO :16K ,for RX agg DMA mode = 16K, Rx agg USB mode could large than 16k*/ -+ /* #define MAX_RECVBUF_SZ (16384 + RX_FIFO_EXPANDING)*/ -+ /* For Max throughput issue , need to use USB AGG mode to replace DMA AGG mode*/ -+ #define MAX_RECVBUF_SZ (32768) -+ -+ /*#define MAX_RECVBUF_SZ_8821C (24576)*/ /* 24k*/ -+ /*#define MAX_RECVBUF_SZ_8821C (20480)*/ /*20K*/ -+ /*#define MAX_RECVBUF_SZ_8821C (10240) */ /*10K*/ -+ /*#define MAX_RECVBUF_SZ_8821C (15360)*/ /*15k < 16k*/ -+ /*#define MAX_RECVBUF_SZ_8821C (8192+1024)*/ /* 8K+1k*/ -+ #else -+ #define MAX_RECVBUF_SZ (4096 + RX_FIFO_EXPANDING) /* about 4K */ -+ #endif -+ #endif/* !MAX_RECVBUF_SZ*/ -+ -+#elif defined(CONFIG_PCI_HCI) -+ /*#ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ #define MAX_RECVBUF_SZ (9100) -+ #else*/ -+ #define MAX_RECVBUF_SZ (4096 + RX_FIFO_EXPANDING) /* about 4K */ -+ /*#endif*/ -+ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ #define MAX_RECVBUF_SZ (16384 + RX_FIFO_EXPANDING) -+#endif -+ -+void init_hal_spec_rtl8821c(PADAPTER); -+/* MP Functions */ -+#ifdef CONFIG_MP_INCLUDED -+void rtl8821c_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */ -+void rtl8821c_mp_config_rfpath(PADAPTER); /* hal_mp.c */ -+#endif -+void rtl8821c_dl_rsvd_page(PADAPTER adapter, u8 mstatus); -+ -+#ifdef CONFIG_PCI_HCI -+u16 get_txbd_rw_reg(u16 q_idx); -+#endif -+ -+#endif /* _RTL8821C_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8821c_spec.h b/drivers/staging/rtl8723cs/include/rtl8821c_spec.h -new file mode 100644 -index 000000000000..949f349b66e9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8821c_spec.h -@@ -0,0 +1,202 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTL8821C_SPEC_H__ -+#define __RTL8821C_SPEC_H__ -+ -+#define EFUSE_MAP_SIZE HALMAC_EFUSE_SIZE_8821C -+ -+/* -+ * MAC Register definition -+ */ -+#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8821C /* hal_com.c & phydm */ -+#define REG_AFE_PLL_CTRL REG_AFE_CTRL2_8821C /* hal_com.c & phydm */ -+#define REG_MAC_PHY_CTRL REG_AFE_CTRL3_8821C /* phydm only */ -+#define REG_LEDCFG0 REG_LED_CFG_8821C /* rtw_mp.c */ -+#define MSR (REG_CR_8821C + 2) /* rtw_mp.c */ -+#define MSR1 REG_CR_EXT_8821C /* rtw_mp.c & hal_com.c */ -+#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */ -+#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */ -+#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8821C/* hal_com.c */ -+ -+#define REG_WOWLAN_WAKE_REASON 0x01C7 -+#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8821C -+ -+/* RXERR_RPT, for rtw_mp.c */ -+#define RXERR_TYPE_OFDM_PPDU 0 -+#define RXERR_TYPE_OFDM_FALSE_ALARM 2 -+#define RXERR_TYPE_OFDM_MPDU_OK 0 -+#define RXERR_TYPE_OFDM_MPDU_FAIL 1 -+#define RXERR_TYPE_CCK_PPDU 3 -+#define RXERR_TYPE_CCK_FALSE_ALARM 5 -+#define RXERR_TYPE_CCK_MPDU_OK 3 -+#define RXERR_TYPE_CCK_MPDU_FAIL 4 -+#define RXERR_TYPE_HT_PPDU 8 -+#define RXERR_TYPE_HT_FALSE_ALARM 9 -+#define RXERR_TYPE_HT_MPDU_TOTAL 6 -+#define RXERR_TYPE_HT_MPDU_OK 6 -+#define RXERR_TYPE_HT_MPDU_FAIL 7 -+#define RXERR_TYPE_RX_FULL_DROP 10 -+ -+#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8821C -+#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8821C -+#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8821C(type) \ -+ | ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8821C : 0)) -+ -+/* -+ * BB Register definition -+ */ -+#define rPMAC_Reset 0x100 /* hal_mp.c */ -+ -+#define rFPGA0_RFMOD 0x800 -+#define rFPGA0_TxInfo 0x804 -+#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */ -+#define rFPGA0_TxGainStage 0x80C /* phydm only */ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */ -+#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */ -+#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */ -+#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */ -+#define rTxAGC_B_Mcs03_Mcs00 0x83C -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84C -+#define rFPGA0_XA_RFInterfaceOE 0x860 -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86C -+#define rFPGA0_XAB_RFInterfaceSW 0x870 -+#define rFPGA0_XAB_RFParameter 0x878 -+#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */ -+#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */ -+#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8821c_phy.c) */ -+ -+#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */ -+#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */ -+ -+#define rFPGA1_TxInfo 0x90C /* hal_mp.c */ -+#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */ -+ -+#define rCCK0_System 0xA00 -+#define rCCK0_AFESetting 0xA04 -+ -+#define rCCK0_DSPParameter2 0xA1C -+#define rCCK0_TxFilter1 0xA20 -+#define rCCK0_TxFilter2 0xA24 -+#define rCCK0_DebugPort 0xA28 -+#define rCCK0_FalseAlarmReport 0xA2C -+ -+#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */ -+#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */ -+ -+#define rOFDM0_TRxPathEnable 0xC04 -+#define rOFDM0_TRMuxPar 0xC08 -+#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */ -+#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */ -+#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */ -+#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */ -+#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */ -+#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */ -+#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */ -+#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8821c_phy.c) */ -+/* RFE */ -+#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */ -+#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */ -+#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */ -+#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */ -+#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */ -+#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */ -+#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */ -+#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */ -+#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */ -+#define bMask_RFEInv_Jaguar 0x3FF00000 -+#define bMask_AntselPathFollow_Jaguar 0x00030000 -+ -+#define rOFDM1_LSTF 0xD00 -+#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */ -+#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8821c_phy.c) */ -+#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8821c_phy.c) */ -+#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8821c_phy.c) */ -+#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8821c_phy.c) */ -+ -+#define rTxAGC_A_Rate18_06 0xE00 -+#define rTxAGC_A_Rate54_24 0xE04 -+#define rTxAGC_A_CCK1_Mcs32 0xE08 -+#define rTxAGC_A_Mcs03_Mcs00 0xE10 -+#define rTxAGC_A_Mcs07_Mcs04 0xE14 -+#define rTxAGC_A_Mcs11_Mcs08 0xE18 -+#define rTxAGC_A_Mcs15_Mcs12 0xE1C -+#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */ -+#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */ -+#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8821c_phy.c) */ -+ -+/* Page1(0x100) */ -+#define bBBResetB 0x100 -+ -+/* Page8(0x800) */ -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+/* Reg 0x80C rFPGA0_TxGainStage */ -+#define bXBTxAGC 0xF00 -+#define bXCTxAGC 0xF000 -+#define bXDTxAGC 0xF0000 -+ -+/* PageA(0xA00) */ -+#define bCCKBBMode 0x3 -+ -+#define bCCKScramble 0x8 -+#define bCCKTxRate 0x3000 -+ -+/* General */ -+#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */ -+#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */ -+#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */ -+#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */ -+#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */ -+#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */ -+#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */ -+ -+#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */ -+#define bDisable 0x0 /* rtw_mp.c */ -+ -+#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */ -+ -+#define Rx_Smooth_Factor 20 /* phydm only */ -+ -+/* -+ * RF Register definition -+ */ -+#define RF_AC 0x00 -+#define RF_AC_Jaguar 0x00 /* hal_mp.c */ -+#define RF_CHNLBW 0x18 /* rtl8821c_phy.c */ -+#define RF_0x52 0x52 -+ -+struct hw_port_reg { -+ u32 net_type; /*reg_offset*/ -+ u8 net_type_shift; -+ u32 macaddr; /*reg_offset*/ -+ u32 bssid; /*reg_offset*/ -+ u32 bcn_ctl; /*reg_offset*/ -+ u32 tsf_rst; /*reg_offset*/ -+ u8 tsf_rst_bit; -+ u32 bcn_space; /*reg_offset*/ -+ u8 bcn_space_shift; -+ u16 bcn_space_mask; -+ u32 ps_aid; /*reg_offset*/ -+ u32 ta; /*reg_offset*/ -+}; -+ -+#endif /* __RTL8192E_SPEC_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8821ce_hal.h b/drivers/staging/rtl8723cs/include/rtl8821ce_hal.h -new file mode 100644 -index 000000000000..426002a30c9a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8821ce_hal.h -@@ -0,0 +1,23 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8821CE_HAL_H_ -+#define _RTL8821CE_HAL_H_ -+ -+#include /* PADAPTER */ -+ -+/* rtl8821ce_ops.c */ -+void rtl8821ce_set_hal_ops(PADAPTER); -+ -+#endif /* _RTL8821CE_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8821cs_hal.h b/drivers/staging/rtl8723cs/include/rtl8821cs_hal.h -new file mode 100644 -index 000000000000..ceecc15f966d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8821cs_hal.h -@@ -0,0 +1,23 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8821CS_HAL_H_ -+#define _RTL8821CS_HAL_H_ -+ -+#include /* PADAPTER */ -+ -+/* rtl8821cs_ops.c */ -+u8 rtl8821cs_set_hal_ops(PADAPTER); -+ -+#endif /* _RTL8821CS_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8821cu_hal.h b/drivers/staging/rtl8723cs/include/rtl8821cu_hal.h -new file mode 100644 -index 000000000000..aec437224c73 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8821cu_hal.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8821CU_HAL_H_ -+#define _RTL8821CU_HAL_H_ -+ -+#include /* PADAPTER */ -+ -+/* rtl8821cu_ops.c */ -+u8 rtl8821cu_set_hal_ops(PADAPTER); -+void rtl8821cu_set_hw_type(struct dvobj_priv *pdvobj); -+ -+#endif /* _RTL8821CU_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8822b_hal.h b/drivers/staging/rtl8723cs/include/rtl8822b_hal.h -new file mode 100644 -index 000000000000..68ad9704172c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8822b_hal.h -@@ -0,0 +1,234 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8822B_HAL_H_ -+#define _RTL8822B_HAL_H_ -+ -+#include /* BIT(x) */ -+#include /* PADAPTER */ -+#include "../hal/halmac/halmac_api.h" /* MAC REG definition */ -+ -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+#define MAX_RECVBUF_SZ 46080 /* 45KB, TX: (256-64)KB */ -+#else /* !CONFIG_SUPPORT_TRX_SHARED */ -+#ifdef CONFIG_PCI_HCI -+#define MAX_RECVBUF_SZ 12288 /* 12KB */ -+#else -+#define MAX_RECVBUF_SZ 24576 /* 24KB, TX: 256KB */ -+#endif /* !CONFIG_PCI_HCI */ -+#endif /* !CONFIG_SUPPORT_TRX_SHARED */ -+ -+/* -+ * MAC Register definition -+ */ -+#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8822B /* hal_com.c & phydm */ -+#define REG_AFE_PLL_CTRL REG_AFE_CTRL2_8822B /* hal_com.c & phydm */ -+#define REG_MAC_PHY_CTRL REG_AFE_CTRL3_8822B /* phydm only */ -+#define REG_LEDCFG0 REG_LED_CFG_8822B /* rtw_mp.c */ -+#define MSR (REG_CR_8822B + 2) /* rtw_mp.c & hal_com.c */ -+#define MSR1 REG_CR_EXT_8822B /* rtw_mp.c & hal_com.c */ -+#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */ -+#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */ -+#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8822B /* hal_com.c */ -+ -+#define REG_WOWLAN_WAKE_REASON 0x01C7 /* hal_com.c */ -+#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8822B /* hal_com.c */ -+ -+/* RXERR_RPT, for rtw_mp.c */ -+#define RXERR_TYPE_OFDM_PPDU 0 -+#define RXERR_TYPE_OFDM_FALSE_ALARM 2 -+#define RXERR_TYPE_OFDM_MPDU_OK 0 -+#define RXERR_TYPE_OFDM_MPDU_FAIL 1 -+#define RXERR_TYPE_CCK_PPDU 3 -+#define RXERR_TYPE_CCK_FALSE_ALARM 5 -+#define RXERR_TYPE_CCK_MPDU_OK 3 -+#define RXERR_TYPE_CCK_MPDU_FAIL 4 -+#define RXERR_TYPE_HT_PPDU 8 -+#define RXERR_TYPE_HT_FALSE_ALARM 9 -+#define RXERR_TYPE_HT_MPDU_TOTAL 6 -+#define RXERR_TYPE_HT_MPDU_OK 6 -+#define RXERR_TYPE_HT_MPDU_FAIL 7 -+#define RXERR_TYPE_RX_FULL_DROP 10 -+ -+#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8822B -+#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8822B -+#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8822B(type) \ -+ | ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8822B : 0)) -+ -+/* -+ * BB Register definition -+ */ -+#define rPMAC_Reset 0x100 /* hal_mp.c */ -+ -+#define rFPGA0_RFMOD 0x800 -+#define rFPGA0_TxInfo 0x804 -+#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */ -+#define rFPGA0_TxGainStage 0x80C /* phydm only */ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */ -+#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */ -+#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */ -+#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */ -+#define rTxAGC_B_Mcs03_Mcs00 0x83C -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84C -+#define rFPGA0_XA_RFInterfaceOE 0x860 -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86C -+#define rFPGA0_XAB_RFInterfaceSW 0x870 -+#define rFPGA0_XAB_RFParameter 0x878 -+#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */ -+#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */ -+#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8822b_phy.c) */ -+ -+#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */ -+#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */ -+ -+#define rFPGA1_TxInfo 0x90C /* hal_mp.c */ -+#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */ -+/* TX BeamForming */ -+#define REG_BB_TX_PATH_SEL_1_8822B 0x93C /* rtl8822b_phy.c */ -+#define REG_BB_TX_PATH_SEL_2_8822B 0x940 /* rtl8822b_phy.c */ -+ -+/* TX BeamForming */ -+#define REG_BB_TXBF_ANT_SET_BF1_8822B 0x19AC /* rtl8822b_phy.c */ -+#define REG_BB_TXBF_ANT_SET_BF0_8822B 0x19B4 /* rtl8822b_phy.c */ -+ -+#define rCCK0_System 0xA00 -+#define rCCK0_AFESetting 0xA04 -+ -+#define rCCK0_DSPParameter2 0xA1C -+#define rCCK0_TxFilter1 0xA20 -+#define rCCK0_TxFilter2 0xA24 -+#define rCCK0_DebugPort 0xA28 -+#define rCCK0_FalseAlarmReport 0xA2C -+ -+#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */ -+#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */ -+ -+#define rOFDM0_TRxPathEnable 0xC04 -+#define rOFDM0_TRMuxPar 0xC08 -+#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */ -+#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */ -+#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */ -+#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */ -+#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */ -+#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */ -+#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */ -+#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */ -+ -+#define rOFDM1_LSTF 0xD00 -+#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */ -+#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8822b_phy.c) */ -+#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8822b_phy.c) */ -+#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8822b_phy.c) */ -+#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8822b_phy.c) */ -+ -+#define rTxAGC_A_Rate18_06 0xE00 -+#define rTxAGC_A_Rate54_24 0xE04 -+#define rTxAGC_A_CCK1_Mcs32 0xE08 -+#define rTxAGC_A_Mcs03_Mcs00 0xE10 -+#define rTxAGC_A_Mcs07_Mcs04 0xE14 -+#define rTxAGC_A_Mcs11_Mcs08 0xE18 -+#define rTxAGC_A_Mcs15_Mcs12 0xE1C -+#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */ -+#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */ -+#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */ -+/* RFE */ -+#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */ -+#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */ -+#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */ -+#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */ -+#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */ -+#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */ -+#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */ -+#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */ -+#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */ -+#define bMask_RFEInv_Jaguar 0x3FF00000 -+#define bMask_AntselPathFollow_Jaguar 0x00030000 -+ -+#define rC_RFE_Pinmux_Jaguar 0x18B4 /* Path_C RFE cotrol pinmux*/ -+#define rD_RFE_Pinmux_Jaguar 0x1AB4 /* Path_D RFE cotrol pinmux*/ -+#define rA_RFE_Sel_Jaguar2 0x1990 -+ -+/* Page1(0x100) */ -+#define bBBResetB 0x100 -+ -+/* Page8(0x800) */ -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+/* Reg 0x80C rFPGA0_TxGainStage */ -+#define bXBTxAGC 0xF00 -+#define bXCTxAGC 0xF000 -+#define bXDTxAGC 0xF0000 -+ -+/* PageA(0xA00) */ -+#define bCCKBBMode 0x3 -+ -+#define bCCKScramble 0x8 -+#define bCCKTxRate 0x3000 -+ -+/* General */ -+#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */ -+#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */ -+#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */ -+#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */ -+#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */ -+#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */ -+#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */ -+ -+#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */ -+#define bDisable 0x0 /* rtw_mp.c */ -+ -+#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */ -+ -+#define Rx_Smooth_Factor 20 /* phydm only */ -+ -+/* -+ * RF Register definition -+ */ -+#define RF_AC 0x00 -+#define RF_AC_Jaguar 0x00 /* hal_mp.c */ -+#define RF_CHNLBW 0x18 /* rtl8822b_phy.c */ -+#define RF_ModeTableAddr 0x30 /* rtl8822b_phy.c */ -+#define RF_ModeTableData0 0x31 /* rtl8822b_phy.c */ -+#define RF_ModeTableData1 0x32 /* rtl8822b_phy.c */ -+#define RF_0x52 0x52 -+#define RF_WeLut_Jaguar 0xEF /* rtl8822b_phy.c */ -+ -+/* General Functions */ -+void rtl8822b_init_hal_spec(PADAPTER); /* hal/hal_com.c */ -+ -+#ifdef CONFIG_MP_INCLUDED -+/* MP Functions */ -+#include /* struct mp_priv */ -+void rtl8822b_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */ -+void rtl8822b_mp_config_rfpath(PADAPTER); /* hal_mp.c */ -+#endif -+void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus); -+ -+#ifdef CONFIG_USB_HCI -+#include -+#elif defined(CONFIG_SDIO_HCI) -+#include -+#elif defined(CONFIG_PCI_HCI) -+#include -+#endif -+ -+#endif /* _RTL8822B_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8822be_hal.h b/drivers/staging/rtl8723cs/include/rtl8822be_hal.h -new file mode 100644 -index 000000000000..a81445fa166f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8822be_hal.h -@@ -0,0 +1,27 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8822BE_HAL_H_ -+#define _RTL8822BE_HAL_H_ -+ -+#include /* PADAPTER */ -+ -+#define RT_BCN_INT_MASKS (BIT20 | BIT25 | BIT26 | BIT16) -+ -+/* rtl8822be_ops.c */ -+void UpdateInterruptMask8822BE(PADAPTER, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+u16 get_txbd_rw_reg(u16 q_idx); -+ -+ -+#endif /* _RTL8822BE_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8822bs_hal.h b/drivers/staging/rtl8723cs/include/rtl8822bs_hal.h -new file mode 100644 -index 000000000000..ffaddee09832 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8822bs_hal.h -@@ -0,0 +1,31 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8822BS_HAL_H_ -+#define _RTL8822BS_HAL_H_ -+ -+#include /* PADAPTER */ -+ -+/* rtl8822bs_ops.c */ -+void rtl8822bs_set_hal_ops(PADAPTER); -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+void rtl8822bs_disable_interrupt_but_cpwm2(PADAPTER adapter); -+#endif -+ -+/* rtl8822bs_xmit.c */ -+s32 rtl8822bs_dequeue_writeport(PADAPTER); -+#define _dequeue_writeport(a) rtl8822bs_dequeue_writeport(a) -+ -+#endif /* _RTL8822BS_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8822bu_hal.h b/drivers/staging/rtl8723cs/include/rtl8822bu_hal.h -new file mode 100644 -index 000000000000..a35773f12bee ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8822bu_hal.h -@@ -0,0 +1,61 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8822BU_HAL_H_ -+#define _RTL8822BU_HAL_H_ -+ -+#ifdef CONFIG_USB_HCI -+ #include /* PADAPTER */ -+ -+ #ifdef CONFIG_USB_HCI -+ #ifdef USB_PACKET_OFFSET_SZ -+ #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) -+ #else -+ #define PACKET_OFFSET_SZ (8) -+ #endif -+ #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) -+ #endif -+ -+ /* undefine MAX_RECVBUF_SZ from rtl8822b_hal.h */ -+ #ifdef MAX_RECVBUF_SZ -+ #undef MAX_RECVBUF_SZ -+ #endif -+ -+ /* recv_buffer must be large than usb agg size */ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 -+ #define MAX_RECVBUF_SZ (15360) /* 15k */ -+ #elif defined(CONFIG_PLATFORM_HISILICON) -+ /* use 16k to workaround for HISILICON platform */ -+ #define MAX_RECVBUF_SZ (16384) -+ #else -+ #define MAX_RECVBUF_SZ (32768) -+ #endif -+ #else -+ #define MAX_RECVBUF_SZ (4000) -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+ /* rtl8822bu_ops.c */ -+ void rtl8822bu_set_hal_ops(PADAPTER padapter); -+ void rtl8822bu_set_hw_type(struct dvobj_priv *pdvobj); -+ -+ /* rtl8822bu_io.c */ -+ void rtl8822bu_set_intf_ops(struct _io_ops *pops); -+ -+#endif /* CONFIG_USB_HCI */ -+ -+ -+#endif /* _RTL8822BU_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8822c_hal.h b/drivers/staging/rtl8723cs/include/rtl8822c_hal.h -new file mode 100644 -index 000000000000..0230d934f9ea ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8822c_hal.h -@@ -0,0 +1,246 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8822C_HAL_H_ -+#define _RTL8822C_HAL_H_ -+ -+#include /* BIT(x) */ -+#include /* PADAPTER */ -+#include "../hal/halmac/halmac_api.h" /* MAC REG definition */ -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+#define DEF_RECVBUF_SZ 24576 /* RX 24K */ -+#if (DFT_TRX_SHARE_MODE == 1) -+#define RX_FIFO_EXPANDING 40960 /* RX= 24K+40K=64K , TX=256K-40K=216K */ -+#elif (DFT_TRX_SHARE_MODE == 2) -+#define RX_FIFO_EXPANDING 65536 /* RX= 24K+40K+24=88K , TX=256K-40K-24K=192K */ -+#elif (DFT_TRX_SHARE_MODE ==3) -+#define RX_FIFO_EXPANDING 106496 /* RX= 24K+40K+24+40K=128K , TX=256K-40K-24K-40K=152K */ -+#elif (DFT_TRX_SHARE_MODE ==4) -+#define RX_FIFO_EXPANDING 131072 /* RX= 24K+40K+24+40K+24K=128K , TX=256K-40K-24K-40K-24K=128K */ -+#else -+#define RX_FIFO_EXPANDING 0 -+#endif -+#define MAX_RECVBUF_SZ (DEF_RECVBUF_SZ + RX_FIFO_EXPANDING) -+#else /* !CONFIG_SUPPORT_TRX_SHARED */ -+#ifdef CONFIG_PCI_HCI -+#define MAX_RECVBUF_SZ 12288 /* 12KB */ -+#else -+#define MAX_RECVBUF_SZ 24576 /* 24KB, TX: 256KB */ -+#endif /* !CONFIG_PCI_HCI */ -+#endif /* !CONFIG_SUPPORT_TRX_SHARED */ -+ -+/* -+ * MAC Register definition -+ */ -+#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8822C /* hal_com.c & phydm */ -+#define REG_LEDCFG0 REG_LED_CFG_8822C /* rtw_mp.c */ -+#define MSR (REG_CR_8822C + 2) /* rtw_mp.c & hal_com.c */ -+#define MSR1 REG_CR_EXT_8822C /* rtw_mp.c & hal_com.c */ -+#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */ -+#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */ -+#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8822C /* hal_com.c */ -+ -+#define REG_WOWLAN_WAKE_REASON 0x01C7 /* hal_com.c */ -+#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8822C /* hal_com.c */ -+ -+/* RXERR_RPT, for rtw_mp.c */ -+#define RXERR_TYPE_OFDM_PPDU 0 -+#define RXERR_TYPE_OFDM_FALSE_ALARM 2 -+#define RXERR_TYPE_OFDM_MPDU_OK 0 -+#define RXERR_TYPE_OFDM_MPDU_FAIL 1 -+#define RXERR_TYPE_CCK_PPDU 3 -+#define RXERR_TYPE_CCK_FALSE_ALARM 5 -+#define RXERR_TYPE_CCK_MPDU_OK 3 -+#define RXERR_TYPE_CCK_MPDU_FAIL 4 -+#define RXERR_TYPE_HT_PPDU 8 -+#define RXERR_TYPE_HT_FALSE_ALARM 9 -+#define RXERR_TYPE_HT_MPDU_TOTAL 6 -+#define RXERR_TYPE_HT_MPDU_OK 6 -+#define RXERR_TYPE_HT_MPDU_FAIL 7 -+#define RXERR_TYPE_RX_FULL_DROP 10 -+ -+#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8822C -+#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8822C -+#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8822C(type) \ -+ | ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8822C : 0)) -+ -+/* -+ * BB Register definition -+ */ -+#define rPMAC_Reset 0x100 /* hal_mp.c */ -+ -+#define rFPGA0_RFMOD 0x800 -+#define rFPGA0_TxInfo 0x804 -+#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */ -+#define rFPGA0_TxGainStage 0x80C /* phydm only */ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */ -+#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */ -+#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */ -+#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */ -+#define rTxAGC_B_Rate18_06 0x830 -+#define rTxAGC_B_Rate54_24 0x834 -+#define rTxAGC_B_CCK1_55_Mcs32 0x838 -+#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */ -+#define rTxAGC_B_Mcs03_Mcs00 0x83C -+#define rTxAGC_B_Mcs07_Mcs04 0x848 -+#define rTxAGC_B_Mcs11_Mcs08 0x84C -+#define rFPGA0_XA_RFInterfaceOE 0x860 -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+#define rTxAGC_B_Mcs15_Mcs12 0x868 -+#define rTxAGC_B_CCK11_A_CCK2_11 0x86C -+#define rFPGA0_XAB_RFInterfaceSW 0x870 -+#define rFPGA0_XAB_RFParameter 0x878 -+#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */ -+#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */ -+#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8822c_phy.c) */ -+ -+#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */ -+#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */ -+ -+#define rFPGA1_TxInfo 0x90C /* hal_mp.c */ -+#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */ -+/* TX BeamForming */ -+#define REG_BB_TX_PATH_SEL_1_8822C 0x93C /* rtl8822c_phy.c */ -+#define REG_BB_TX_PATH_SEL_2_8822C 0x940 /* rtl8822c_phy.c */ -+ -+/* TX BeamForming */ -+#define REG_BB_TXBF_ANT_SET_BF1_8822C 0x19AC /* rtl8822c_phy.c */ -+#define REG_BB_TXBF_ANT_SET_BF0_8822C 0x19B4 /* rtl8822c_phy.c */ -+ -+#define rCCK0_System 0xA00 -+#define rCCK0_AFESetting 0xA04 -+ -+#define rCCK0_DSPParameter2 0xA1C -+#define rCCK0_TxFilter1 0xA20 -+#define rCCK0_TxFilter2 0xA24 -+#define rCCK0_DebugPort 0xA28 -+#define rCCK0_FalseAlarmReport 0xA2C -+ -+#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */ -+#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */ -+ -+#define rOFDM0_TRxPathEnable 0xC04 -+#define rOFDM0_TRMuxPar 0xC08 -+#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */ -+#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */ -+#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */ -+#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */ -+#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */ -+#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */ -+#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */ -+#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */ -+ -+#define rOFDM1_LSTF 0xD00 -+#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */ -+#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8822c_phy.c) */ -+#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8822c_phy.c) */ -+#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8822c_phy.c) */ -+#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8822c_phy.c) */ -+ -+#define rTxAGC_A_Rate18_06 0xE00 -+#define rTxAGC_A_Rate54_24 0xE04 -+#define rTxAGC_A_CCK1_Mcs32 0xE08 -+#define rTxAGC_A_Mcs03_Mcs00 0xE10 -+#define rTxAGC_A_Mcs07_Mcs04 0xE14 -+#define rTxAGC_A_Mcs11_Mcs08 0xE18 -+#define rTxAGC_A_Mcs15_Mcs12 0xE1C -+#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */ -+#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */ -+#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */ -+/* RFE */ -+#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */ -+#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */ -+#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */ -+#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */ -+#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */ -+#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */ -+#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */ -+#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */ -+#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */ -+#define bMask_RFEInv_Jaguar 0x3FF00000 -+#define bMask_AntselPathFollow_Jaguar 0x00030000 -+ -+#define rC_RFE_Pinmux_Jaguar 0x18B4 /* Path_C RFE cotrol pinmux*/ -+#define rD_RFE_Pinmux_Jaguar 0x1AB4 /* Path_D RFE cotrol pinmux*/ -+#define rA_RFE_Sel_Jaguar2 0x1990 -+ -+/* Page1(0x100) */ -+#define bBBResetB 0x100 -+ -+/* Page8(0x800) */ -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+/* Reg 0x80C rFPGA0_TxGainStage */ -+#define bXBTxAGC 0xF00 -+#define bXCTxAGC 0xF000 -+#define bXDTxAGC 0xF0000 -+ -+/* PageA(0xA00) */ -+#define bCCKBBMode 0x3 -+ -+#define bCCKScramble 0x8 -+#define bCCKTxRate 0x3000 -+ -+/* General */ -+#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */ -+#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */ -+#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */ -+#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */ -+#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */ -+#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */ -+#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */ -+ -+#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */ -+#define bDisable 0x0 /* rtw_mp.c */ -+ -+#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */ -+ -+#define Rx_Smooth_Factor 20 /* phydm only */ -+ -+/* -+ * RF Register definition -+ */ -+#define RF_AC 0x00 -+#define RF_AC_Jaguar 0x00 /* hal_mp.c */ -+#define RF_CHNLBW 0x18 /* rtl8822c_phy.c */ -+#define RF_ModeTableAddr 0x30 /* rtl8822c_phy.c */ -+#define RF_ModeTableData0 0x31 /* rtl8822c_phy.c */ -+#define RF_ModeTableData1 0x32 /* rtl8822c_phy.c */ -+#define RF_0x52 0x52 -+#define RF_WeLut_Jaguar 0xEF /* rtl8822c_phy.c */ -+ -+/* rtw_lps_state_chk()@hal_com.c */ -+#define BIT_PWRBIT_OW_EN BIT_WMAC_TCRPWRMGT_HWDATA_EN_8822C -+ -+/* General Functions */ -+void rtl8822c_init_hal_spec(PADAPTER); /* hal/hal_com.c */ -+ -+#ifdef CONFIG_MP_INCLUDED -+/* MP Functions */ -+#include /* struct mp_priv */ -+void rtl8822c_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */ -+void rtl8822c_mp_config_rfpath(PADAPTER); /* hal_mp.c */ -+#endif -+void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus); -+ -+#ifdef CONFIG_USB_HCI -+#include -+#elif defined(CONFIG_SDIO_HCI) -+#include -+#elif defined(CONFIG_PCI_HCI) -+#include -+#endif -+ -+#endif /* _RTL8822C_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8822ce_hal.h b/drivers/staging/rtl8723cs/include/rtl8822ce_hal.h -new file mode 100644 -index 000000000000..f56566e05fd3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8822ce_hal.h -@@ -0,0 +1,27 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8822CE_HAL_H_ -+#define _RTL8822CE_HAL_H_ -+ -+#include /* PADAPTER */ -+ -+#define RT_BCN_INT_MASKS (BIT20 | BIT25 | BIT26 | BIT16) -+ -+/* rtl8822ce_ops.c */ -+void UpdateInterruptMask8822CE(PADAPTER, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -+u16 get_txbd_rw_reg(u16 q_idx); -+ -+ -+#endif /* _RTL8822CE_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8822cs_hal.h b/drivers/staging/rtl8723cs/include/rtl8822cs_hal.h -new file mode 100644 -index 000000000000..3e54b2a65e77 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8822cs_hal.h -@@ -0,0 +1,31 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8822CS_HAL_H_ -+#define _RTL8822CS_HAL_H_ -+ -+#include /* PADAPTER */ -+ -+/* rtl8822cs_ops.c */ -+void rtl8822cs_set_hal_ops(PADAPTER); -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+void rtl8822cs_disable_interrupt_but_cpwm2(PADAPTER adapter); -+#endif -+ -+/* rtl8822cs_xmit.c */ -+s32 rtl8822cs_dequeue_writeport(PADAPTER); -+#define _dequeue_writeport(a) rtl8822cs_dequeue_writeport(a) -+ -+#endif /* _RTL8822CS_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtl8822cu_hal.h b/drivers/staging/rtl8723cs/include/rtl8822cu_hal.h -new file mode 100644 -index 000000000000..ba2e36e56762 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtl8822cu_hal.h -@@ -0,0 +1,61 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL8822CU_HAL_H_ -+#define _RTL8822CU_HAL_H_ -+ -+#ifdef CONFIG_USB_HCI -+ #include /* PADAPTER */ -+ -+ #ifdef CONFIG_USB_HCI -+ #ifdef USB_PACKET_OFFSET_SZ -+ #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) -+ #else -+ #define PACKET_OFFSET_SZ (8) -+ #endif -+ #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) -+ #endif -+ -+ /* undefine MAX_RECVBUF_SZ from rtl8822c_hal.h */ -+ #ifdef MAX_RECVBUF_SZ -+ #undef MAX_RECVBUF_SZ -+ #endif -+ -+ /* recv_buffer must be large than usb agg size */ -+ #ifndef MAX_RECVBUF_SZ -+ #ifndef CONFIG_MINIMAL_MEMORY_USAGE -+ #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 -+ #define MAX_RECVBUF_SZ (15360) /* 15k */ -+ #elif defined(CONFIG_PLATFORM_HISILICON) -+ /* use 16k to workaround for HISILICON platform */ -+ #define MAX_RECVBUF_SZ (16384) -+ #else -+ #define MAX_RECVBUF_SZ (32768) -+ #endif -+ #else -+ #define MAX_RECVBUF_SZ (4000) -+ #endif -+ #endif /* !MAX_RECVBUF_SZ */ -+ -+ /* rtl8822cu_ops.c */ -+ void rtl8822cu_set_hal_ops(PADAPTER padapter); -+ void rtl8822cu_set_hw_type(struct dvobj_priv *pdvobj); -+ -+ /* rtl8822cu_io.c */ -+ void rtl8822cu_set_intf_ops(struct _io_ops *pops); -+ -+#endif /* CONFIG_USB_HCI */ -+ -+ -+#endif /* _RTL8822CU_HAL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_android.h b/drivers/staging/rtl8723cs/include/rtw_android.h -new file mode 100644 -index 000000000000..9bb8e32f5ec5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_android.h -@@ -0,0 +1,117 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __RTW_ANDROID_H__ -+#define __RTW_ANDROID_H__ -+ -+enum ANDROID_WIFI_CMD { -+ ANDROID_WIFI_CMD_START, -+ ANDROID_WIFI_CMD_STOP, -+ ANDROID_WIFI_CMD_SCAN_ACTIVE, -+ ANDROID_WIFI_CMD_SCAN_PASSIVE, -+ ANDROID_WIFI_CMD_RSSI, -+ ANDROID_WIFI_CMD_LINKSPEED, -+ ANDROID_WIFI_CMD_RXFILTER_START, -+ ANDROID_WIFI_CMD_RXFILTER_STOP, -+ ANDROID_WIFI_CMD_RXFILTER_ADD, -+ ANDROID_WIFI_CMD_RXFILTER_REMOVE, -+ ANDROID_WIFI_CMD_BTCOEXSCAN_START, -+ ANDROID_WIFI_CMD_BTCOEXSCAN_STOP, -+ ANDROID_WIFI_CMD_BTCOEXMODE, -+ ANDROID_WIFI_CMD_SETSUSPENDMODE, -+ ANDROID_WIFI_CMD_SETSUSPENDOPT, -+ ANDROID_WIFI_CMD_P2P_DEV_ADDR, -+ ANDROID_WIFI_CMD_SETFWPATH, -+ ANDROID_WIFI_CMD_SETBAND, -+ ANDROID_WIFI_CMD_GETBAND, -+ ANDROID_WIFI_CMD_COUNTRY, -+ ANDROID_WIFI_CMD_P2P_SET_NOA, -+ ANDROID_WIFI_CMD_P2P_GET_NOA, -+ ANDROID_WIFI_CMD_P2P_SET_PS, -+ ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE, -+ -+ ANDROID_WIFI_CMD_MIRACAST, -+ -+#ifdef CONFIG_PNO_SUPPORT -+ ANDROID_WIFI_CMD_PNOSSIDCLR_SET, -+ ANDROID_WIFI_CMD_PNOSETUP_SET, -+ ANDROID_WIFI_CMD_PNOENABLE_SET, -+ ANDROID_WIFI_CMD_PNODEBUG_SET, -+#endif -+ -+ ANDROID_WIFI_CMD_MACADDR, -+ -+ ANDROID_WIFI_CMD_BLOCK_SCAN, -+ ANDROID_WIFI_CMD_BLOCK, -+ -+ ANDROID_WIFI_CMD_WFD_ENABLE, -+ ANDROID_WIFI_CMD_WFD_DISABLE, -+ -+ ANDROID_WIFI_CMD_WFD_SET_TCPPORT, -+ ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT, -+ ANDROID_WIFI_CMD_WFD_SET_DEVTYPE, -+ ANDROID_WIFI_CMD_CHANGE_DTIM, -+ ANDROID_WIFI_CMD_HOSTAPD_SET_MACADDR_ACL, -+ ANDROID_WIFI_CMD_HOSTAPD_ACL_ADD_STA, -+ ANDROID_WIFI_CMD_HOSTAPD_ACL_REMOVE_STA, -+#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 1, 0)) -+ ANDROID_WIFI_CMD_GTK_REKEY_OFFLOAD, -+#endif /* CONFIG_GTK_OL */ -+ ANDROID_WIFI_CMD_P2P_DISABLE, -+ ANDROID_WIFI_CMD_SET_AEK, -+ ANDROID_WIFI_CMD_EXT_AUTH_STATUS, -+ ANDROID_WIFI_CMD_DRIVERVERSION, -+ ANDROID_WIFI_CMD_MAX -+}; -+ -+int rtw_android_cmdstr_to_num(char *cmdstr); -+int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd); -+ -+#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+int rtw_android_pno_enable(struct net_device *net, int pno_enable); -+int rtw_android_cfg80211_pno_setup(struct net_device *net, -+ struct cfg80211_ssid *ssid, int n_ssids, int interval); -+#endif -+ -+#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) -+int rtw_android_wifictrl_func_add(void); -+void rtw_android_wifictrl_func_del(void); -+void *wl_android_prealloc(int section, unsigned long size); -+ -+int wifi_get_irq_number(unsigned long *irq_flags_ptr); -+int wifi_set_power(int on, unsigned long msec); -+int wifi_get_mac_addr(unsigned char *buf); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)) -+void *wifi_get_country_code(char *ccode, u32 flags); -+#else /* Linux kernel < 3.18 */ -+void *wifi_get_country_code(char *ccode); -+#endif /* Linux kernel < 3.18 */ -+#else -+static inline int rtw_android_wifictrl_func_add(void) -+{ -+ return 0; -+} -+static inline void rtw_android_wifictrl_func_del(void) {} -+#endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+int wifi_configure_gpio(void); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+void wifi_free_gpio(unsigned int gpio); -+#endif /* CONFIG_GPIO_WAKEUP */ -+ -+ -+#endif /* __RTW_ANDROID_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_ap.h b/drivers/staging/rtl8723cs/include/rtw_ap.h -new file mode 100644 -index 000000000000..5ccb5516fb83 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_ap.h -@@ -0,0 +1,143 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_AP_H_ -+#define __RTW_AP_H_ -+ -+ -+#ifdef CONFIG_AP_MODE -+ -+/* external function */ -+extern void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta); -+extern void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta); -+ -+ -+void init_mlme_ap_info(_adapter *padapter); -+void free_mlme_ap_info(_adapter *padapter); -+u8 rtw_set_tim_ie(u8 dtim_cnt, u8 dtim_period -+ , const u8 *tim_bmp, u8 tim_bmp_len, u8 *tim_ie); -+/* void update_BCNTIM(_adapter *padapter); */ -+void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len); -+void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index); -+void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, u8 flags, const char *tag); -+#define update_beacon(adapter, ie_id, oui, tx, flags) _update_beacon((adapter), (ie_id), (oui), (tx), (flags), __func__) -+/*update_beacon - (flags) can set to normal enqueue (0) and RTW_CMDF_WAIT_ACK enqueue. -+ (flags) = RTW_CMDF_DIRECTLY is not currently implemented, it will do normal enqueue.*/ -+ -+void rtw_ap_update_sta_ra_info(_adapter *padapter, struct sta_info *psta); -+ -+void expire_timeout_chk(_adapter *padapter); -+void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta); -+void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter); -+void start_bss_network(_adapter *padapter, struct createbss_parm *parm); -+int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len); -+void rtw_ap_restore_network(_adapter *padapter); -+ -+#if CONFIG_RTW_MACADDR_ACL -+void rtw_macaddr_acl_init(_adapter *adapter, u8 period); -+void rtw_macaddr_acl_deinit(_adapter *adapter, u8 period); -+void rtw_macaddr_acl_clear(_adapter *adapter, u8 period); -+void rtw_set_macaddr_acl(_adapter *adapter, u8 period, int mode); -+int rtw_acl_add_sta(_adapter *adapter, u8 period, const u8 *addr); -+int rtw_acl_remove_sta(_adapter *adapter, u8 period, const u8 *addr); -+#endif /* CONFIG_RTW_MACADDR_ACL */ -+ -+u8 rtw_ap_set_sta_key(_adapter *adapter, const u8 *addr, u8 alg, const u8 *key, u8 keyid, u8 gk); -+u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta); -+int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid); -+int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx); -+ -+#ifdef CONFIG_NATIVEAP_MLME -+void associated_clients_update(_adapter *padapter, u8 updated, u32 sta_info_type); -+void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta); -+u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta); -+void sta_info_update(_adapter *padapter, struct sta_info *psta); -+void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta); -+u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason, bool enqueue); -+int rtw_sta_flush(_adapter *padapter, bool enqueue); -+int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset); -+void start_ap_mode(_adapter *padapter); -+void stop_ap_mode(_adapter *padapter); -+#endif -+ -+void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset); -+u8 rtw_ap_chbw_decision(_adapter *adapter, u8 ifbmp, u8 excl_ifbmp -+ , s16 req_ch, s8 req_bw, s8 req_offset, u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow, bool *set_u_ch); -+ -+#ifdef CONFIG_AUTO_AP_MODE -+void rtw_auto_ap_rx_msg_dump(_adapter *padapter, union recv_frame *precv_frame, u8 *ehdr_pos); -+extern void rtw_start_auto_ap(_adapter *adapter); -+#endif /* CONFIG_AUTO_AP_MODE */ -+ -+void rtw_ap_parse_sta_capability(_adapter *adapter, struct sta_info *sta, u8 *cap); -+u16 rtw_ap_parse_sta_supported_rates(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len); -+u16 rtw_ap_parse_sta_security_ie(_adapter *adapter, struct sta_info *sta, struct rtw_ieee802_11_elems *elems); -+void rtw_ap_parse_sta_wmm_ie(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len); -+void rtw_ap_parse_sta_ht_ie(_adapter *adapter, struct sta_info *sta, struct rtw_ieee802_11_elems *elems); -+void rtw_ap_parse_sta_vht_ie(_adapter *adapter, struct sta_info *sta, struct rtw_ieee802_11_elems *elems); -+void rtw_ap_parse_sta_multi_ap_ie(_adapter *adapter, struct sta_info *sta, u8 *ies, int ies_len); -+ -+/* b2u flags */ -+#define RTW_AP_B2U_ALL BIT0 -+#define RTW_AP_B2U_GA_UCAST BIT1 /* WDS group addressed unicast frame, forward only */ -+#define RTW_AP_B2U_BCAST BIT2 -+#define RTW_AP_B2U_IP_MCAST BIT3 -+ -+#define rtw_ap_src_b2u_policy_chk(flags, da) ( \ -+ (flags & RTW_AP_B2U_ALL) \ -+ || ((flags & RTW_AP_B2U_BCAST) && is_broadcast_mac_addr(da)) \ -+ || ((flags & RTW_AP_B2U_IP_MCAST) && (IP_MCAST_MAC(da) || ICMPV6_MCAST_MAC(da))) \ -+ ) -+ -+#define rtw_ap_fwd_b2u_policy_chk(flags, da, gaucst) ( \ -+ (flags & RTW_AP_B2U_ALL) \ -+ || ((flags & RTW_AP_B2U_GA_UCAST) && gaucst) \ -+ || ((flags & RTW_AP_B2U_BCAST) && is_broadcast_mac_addr(da)) \ -+ || ((flags & RTW_AP_B2U_IP_MCAST) && (IP_MCAST_MAC(da) || ICMPV6_MCAST_MAC(da))) \ -+ ) -+ -+void dump_ap_b2u_flags(void *sel, _adapter *adapter); -+ -+int rtw_ap_addr_resolve(_adapter *adapter, u16 os_qid, struct xmit_frame *xframe, _pkt *pkt, _list *b2u_list); -+int rtw_ap_rx_data_validate_hdr(_adapter *adapter, union recv_frame *rframe, struct sta_info **sta); -+int rtw_ap_rx_msdu_act_check(union recv_frame *rframe -+ , const u8 *da, const u8 *sa -+ , u8 *msdu, enum rtw_rx_llc_hdl llc_hdl -+ , struct xmit_frame **fwd_frame, _list *b2u_list); -+ -+void update_bmc_sta(_adapter *padapter); -+ -+#ifdef CONFIG_BMC_TX_RATE_SELECT -+void rtw_update_bmc_sta_tx_rate(_adapter *adapter); -+#endif -+ -+void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field); -+void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len); -+#ifdef CONFIG_80211N_HT -+int rtw_ht_operation_update(_adapter *padapter); -+#endif /* CONFIG_80211N_HT */ -+u8 rtw_ap_sta_states_check(_adapter *adapter); -+ -+#ifdef CONFIG_FW_HANDLE_TXBCN -+#define rtw_ap_get_nums(adapter) (adapter_to_dvobj(adapter)->nr_ap_if) -+bool rtw_ap_nums_check(_adapter *adapter); -+#endif -+ -+#ifdef CONFIG_SWTIMER_BASED_TXBCN -+void tx_beacon_handlder(struct dvobj_priv *pdvobj); -+void tx_beacon_timer_handlder(void *ctx); -+#endif /*CONFIG_SWTIMER_BASED_TXBCN*/ -+ -+#endif /* end of CONFIG_AP_MODE */ -+#endif /*__RTW_AP_H_*/ -diff --git a/drivers/staging/rtl8723cs/include/rtw_beamforming.h b/drivers/staging/rtl8723cs/include/rtw_beamforming.h -new file mode 100644 -index 000000000000..4c7f006e8254 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_beamforming.h -@@ -0,0 +1,297 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_BEAMFORMING_H_ -+#define __RTW_BEAMFORMING_H_ -+ -+#ifdef CONFIG_BEAMFORMING -+ -+#ifdef RTW_BEAMFORMING_VERSION_2 -+#define MAX_NUM_BEAMFORMEE_SU 2 -+#define MAX_NUM_BEAMFORMER_SU 2 -+#define MAX_NUM_BEAMFORMEE_MU 6 -+#define MAX_NUM_BEAMFORMER_MU 1 -+ -+#define MAX_BEAMFORMEE_ENTRY_NUM (MAX_NUM_BEAMFORMEE_SU + MAX_NUM_BEAMFORMEE_MU) -+#define MAX_BEAMFORMER_ENTRY_NUM (MAX_NUM_BEAMFORMER_SU + MAX_NUM_BEAMFORMER_MU) -+ -+/* Need to be defined by IC */ -+#define SU_SOUNDING_TIMEOUT 5 /* unit: ms */ -+#define MU_SOUNDING_TIMEOUT 8 /* unit: ms */ -+ -+#define GET_BEAMFORM_INFO(adapter) (&GET_HAL_DATA(adapter)->beamforming_info) -+#define GetInitSoundCnt(_SoundPeriod, _MinSoundPeriod) ((_SoundPeriod)/(_MinSoundPeriod)) -+ -+enum BEAMFORMING_CTRL_TYPE { -+ BEAMFORMING_CTRL_ENTER = 0, -+ BEAMFORMING_CTRL_LEAVE = 1, -+ BEAMFORMING_CTRL_START_PERIOD = 2, -+ BEAMFORMING_CTRL_END_PERIOD = 3, -+ BEAMFORMING_CTRL_SOUNDING_FAIL = 4, -+ BEAMFORMING_CTRL_SOUNDING_CLK = 5, -+ BEAMFORMING_CTRL_SET_GID_TABLE = 6, -+ BEAMFORMING_CTRL_SET_CSI_REPORT = 7, -+}; -+ -+enum _BEAMFORMING_STATE { -+ BEAMFORMING_STATE_IDLE, -+ BEAMFORMING_STATE_START, -+ BEAMFORMING_STATE_END, -+}; -+ -+/* -+ * typedef BEAMFORMING_CAP for phydm -+ */ -+typedef enum beamforming_cap { -+ BEAMFORMING_CAP_NONE = 0x0, -+ BEAMFORMER_CAP_HT_EXPLICIT = 0x1, -+ BEAMFORMEE_CAP_HT_EXPLICIT = 0x2, -+ BEAMFORMER_CAP_VHT_SU = 0x4, /* Self has er Cap, because Reg er & peer ee */ -+ BEAMFORMEE_CAP_VHT_SU = 0x8, /* Self has ee Cap, because Reg ee & peer er */ -+ BEAMFORMER_CAP_VHT_MU = 0x10, /* Self has er Cap, because Reg er & peer ee */ -+ BEAMFORMEE_CAP_VHT_MU = 0x20, /* Self has ee Cap, because Reg ee & peer er */ -+ BEAMFORMER_CAP = 0x40, -+ BEAMFORMEE_CAP = 0x80, -+} BEAMFORMING_CAP; -+ -+enum _BEAMFORM_ENTRY_HW_STATE { -+ BEAMFORM_ENTRY_HW_STATE_NONE, -+ BEAMFORM_ENTRY_HW_STATE_ADD_INIT, -+ BEAMFORM_ENTRY_HW_STATE_ADDING, -+ BEAMFORM_ENTRY_HW_STATE_ADDED, -+ BEAMFORM_ENTRY_HW_STATE_DELETE_INIT, -+ BEAMFORM_ENTRY_HW_STATE_DELETING, -+ BEAMFORM_ENTRY_HW_STATE_MAX -+}; -+ -+/* The sounding state is recorded by BFer. */ -+enum _SOUNDING_STATE { -+ SOUNDING_STATE_NONE = 0, -+ SOUNDING_STATE_INIT = 1, -+ SOUNDING_STATE_SU_START = 2, -+ SOUNDING_STATE_SU_SOUNDDOWN = 3, -+ SOUNDING_STATE_MU_START = 4, -+ SOUNDING_STATE_MU_SOUNDDOWN = 5, -+ SOUNDING_STATE_SOUNDING_TIMEOUT = 6, -+ SOUNDING_STATE_MAX -+}; -+ -+struct beamformee_entry { -+ u8 used; /* _TRUE/_FALSE */ -+ u8 txbf; -+ u8 sounding; -+ /* Used to construct AID field of NDPA packet */ -+ u16 aid; -+ /* Used to Set Reg42C in IBSS mode */ -+ u16 mac_id; -+ /* Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC */ -+ u16 p_aid; -+ u8 g_id; -+ /* Used to fill Reg6E4 to fill Mac address of CSI report frame */ -+ u8 mac_addr[ETH_ALEN]; -+ /* Sounding BandWidth */ -+ enum channel_width sound_bw; -+ u16 sound_period; -+ -+ enum beamforming_cap cap; -+ enum _BEAMFORM_ENTRY_HW_STATE state; -+ -+ /* The BFee need to be sounded when count to zero */ -+ u8 SoundCnt; -+ u8 bCandidateSoundingPeer; -+ u8 bSoundingTimeout; -+ u8 bDeleteSounding; -+ /* Get the result through throughput and Tx rate from BB API */ -+ u8 bApplySounding; -+ -+ /* information for sounding judgement */ -+ systime tx_timestamp; -+ u64 tx_bytes; -+ -+ u16 LogStatusFailCnt:5; /* 0~21 */ -+ u16 DefaultCSICnt:5; /* 0~21 */ -+ u8 CSIMatrix[327]; -+ u16 CSIMatrixLen; -+ -+ u8 NumofSoundingDim; -+ -+ u8 comp_steering_num_of_bfer; -+ -+ -+ /* SU-MIMO */ -+ u8 su_reg_index; -+ -+ /* MU-MIMO */ -+ u8 mu_reg_index; -+ u8 gid_valid[8]; -+ u8 user_position[16]; -+ -+ /* For 8822B C-cut workaround */ -+ /* If the flag set to _TRUE, do not sound this STA */ -+ u8 bSuspendSUCap; -+}; -+ -+struct beamformer_entry { -+ u8 used; -+ /* p_aid of BFer entry is probably not used */ -+ /* Used to fill Reg42C & Reg714 to compare with p_aid of Tx DESC */ -+ u16 p_aid; -+ u8 g_id; -+ u8 mac_addr[ETH_ALEN]; -+ -+ enum beamforming_cap cap; -+ enum _BEAMFORM_ENTRY_HW_STATE state; -+ -+ u8 NumofSoundingDim; -+ -+ /* SU-MIMO */ -+ u8 su_reg_index; -+ -+ /* MU-MIMO */ -+ u8 gid_valid[8]; -+ u8 user_position[16]; -+ u16 aid; -+}; -+ -+struct sounding_info { -+ u8 su_sounding_list[MAX_NUM_BEAMFORMEE_SU]; -+ u8 mu_sounding_list[MAX_NUM_BEAMFORMEE_MU]; -+ -+ enum _SOUNDING_STATE state; -+ /* -+ * su_bfee_curidx is index for beamforming_info.bfee_entry[] -+ * range: 0~MAX_BEAMFORMEE_ENTRY_NUM -+ */ -+ u8 su_bfee_curidx; -+ u8 candidate_mu_bfee_cnt; -+ -+ /* For sounding schedule maintenance */ -+ u16 min_sounding_period; -+ /* Get from sounding list */ -+ /* Ex: SU STA1, SU STA2, MU STA(1~n) => the value will be 2+1=3 */ -+ u8 sound_remain_cnt_per_period; -+}; -+ -+struct _RT_CSI_INFO{ -+ u8 Nc; -+ u8 Nr; -+ u8 Ng; -+ u8 CodeBook; -+ u8 ChnlWidth; -+ u8 bVHT; -+}; -+ -+struct beamforming_info { -+ enum beamforming_cap beamforming_cap; -+ enum _BEAMFORMING_STATE beamforming_state; -+ struct beamformee_entry bfee_entry[MAX_BEAMFORMEE_ENTRY_NUM]; -+ struct beamformer_entry bfer_entry[MAX_BEAMFORMER_ENTRY_NUM]; -+ u8 sounding_sequence; -+ u8 beamformee_su_cnt; -+ u8 beamformer_su_cnt; -+ u32 beamformee_su_reg_maping; -+ u32 beamformer_su_reg_maping; -+ /* For MU-MINO */ -+ u8 beamformee_mu_cnt; -+ u8 beamformer_mu_cnt; -+ u32 beamformee_mu_reg_maping; -+ u8 first_mu_bfee_index; -+ u8 mu_bfer_curidx; -+ u8 cur_csi_rpt_rate; -+ -+ struct sounding_info sounding_info; -+ /* schedule regular timer for sounding */ -+ _timer sounding_timer; -+ /* moniter if soudning too long */ -+ _timer sounding_timeout_timer; -+ -+ /* For HW configuration */ -+ u8 SetHalBFEnterOnDemandCnt; -+ u8 SetHalBFLeaveOnDemandCnt; -+ u8 SetHalSoundownOnDemandCnt; -+ u8 bSetBFHwConfigInProgess; -+ -+ /* -+ * Target CSI report info. -+ * Keep the first SU CSI report info for 8822B HW bug workaround. -+ */ -+ u8 bEnableSUTxBFWorkAround; -+ struct _RT_CSI_INFO TargetCSIInfo; -+ /* Only peform sounding to the first SU BFee */ -+ struct beamformee_entry *TargetSUBFee; -+ -+ /* For debug */ -+ s8 sounding_running; -+}; -+ -+enum beamforming_cap rtw_bf_bfee_get_entry_cap_by_macid(void *mlmepriv, u8 mac_id); -+struct beamformer_entry *rtw_bf_bfer_get_entry_by_addr(PADAPTER, u8 *ra); -+struct beamformee_entry *rtw_bf_bfee_get_entry_by_addr(PADAPTER, u8 *ra); -+void rtw_bf_get_ndpa_packet(PADAPTER, union recv_frame *); -+u32 rtw_bf_get_report_packet(PADAPTER, union recv_frame *); -+u8 rtw_bf_send_vht_gid_mgnt_packet(PADAPTER, u8 *ra, u8 *gid, u8 *position); -+void rtw_bf_get_vht_gid_mgnt_packet(PADAPTER, union recv_frame *); -+void rtw_bf_init(PADAPTER); -+void rtw_bf_cmd_hdl(PADAPTER, u8 type, u8 *pbuf); -+u8 rtw_bf_cmd(PADAPTER, s32 type, u8 *pbuf, s32 size, u8 enqueue); -+void rtw_bf_update_attrib(PADAPTER, struct pkt_attrib *, struct sta_info *); -+void rtw_bf_c2h_handler(PADAPTER, u8 id, u8 *buf, u8 buf_len); -+void rtw_bf_update_traffic(PADAPTER); -+ -+/* Compatible with old function name, only for using outside rtw_beamforming.c */ -+#define beamforming_get_entry_beam_cap_by_mac_id rtw_bf_bfee_get_entry_cap_by_macid -+#define rtw_beamforming_get_ndpa_frame rtw_bf_get_ndpa_packet -+#define rtw_beamforming_get_report_frame rtw_bf_get_report_packet -+#define rtw_beamforming_get_vht_gid_mgnt_frame rtw_bf_get_vht_gid_mgnt_packet -+#define beamforming_wk_hdl rtw_bf_cmd_hdl -+#define beamforming_wk_cmd rtw_bf_cmd -+#define update_attrib_txbf_info rtw_bf_update_attrib -+ -+#define HT_BF_CAP(adapter) ((adapter)->mlmepriv.htpriv.beamform_cap) -+#define VHT_BF_CAP(adapter) ((adapter)->mlmepriv.vhtpriv.beamform_cap) -+ -+#define IS_HT_BEAMFORMEE(adapter) \ -+ (HT_BF_CAP(adapter) & \ -+ (BEAMFORMING_HT_BEAMFORMEE_ENABLE)) -+ -+#define IS_VHT_BEAMFORMEE(adapter) \ -+ (VHT_BF_CAP(adapter) & \ -+ (BEAMFORMING_VHT_BEAMFORMEE_ENABLE | \ -+ BEAMFORMING_VHT_MU_MIMO_STA_ENABLE)) -+ -+#define IS_BEAMFORMEE(adapter) (IS_HT_BEAMFORMEE(adapter) | \ -+ IS_VHT_BEAMFORMEE(adapter)) -+ -+#else /* !RTW_BEAMFORMING_VERSION_2 */ -+/*PHYDM_BF - (BEAMFORMING_SUPPORT == 1)*/ -+enum BEAMFORMING_CTRL_TYPE { -+ BEAMFORMING_CTRL_ENTER = 0, -+ BEAMFORMING_CTRL_LEAVE = 1, -+ BEAMFORMING_CTRL_START_PERIOD = 2, -+ BEAMFORMING_CTRL_END_PERIOD = 3, -+ BEAMFORMING_CTRL_SOUNDING_FAIL = 4, -+ BEAMFORMING_CTRL_SOUNDING_CLK = 5, -+}; -+u32 rtw_beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame); -+void rtw_beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame); -+ -+void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf); -+u8 beamforming_wk_cmd(_adapter *padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue); -+void update_attrib_txbf_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta); -+ -+#endif /* !RTW_BEAMFORMING_VERSION_2 */ -+ -+#endif /*#ifdef CONFIG_BEAMFORMING */ -+ -+#endif /*__RTW_BEAMFORMING_H_*/ -diff --git a/drivers/staging/rtl8723cs/include/rtw_br_ext.h b/drivers/staging/rtl8723cs/include/rtw_br_ext.h -new file mode 100644 -index 000000000000..54ba75ea1df5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_br_ext.h -@@ -0,0 +1,69 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_BR_EXT_H_ -+#define _RTW_BR_EXT_H_ -+ -+#if 1 /* rtw_wifi_driver */ -+#define CL_IPV6_PASS 1 -+#define MACADDRLEN 6 -+#define _DEBUG_ERR RTW_INFO -+#define _DEBUG_INFO /* RTW_INFO */ -+#define DEBUG_WARN RTW_INFO -+#define DEBUG_INFO /* RTW_INFO */ -+#define DEBUG_ERR RTW_INFO -+/* #define GET_MY_HWADDR ((GET_MIB(priv))->dot11OperationEntry.hwaddr) */ -+#define GET_MY_HWADDR(padapter) (adapter_mac_addr(padapter)) -+#endif /* rtw_wifi_driver */ -+ -+#define NAT25_HASH_BITS 4 -+#define NAT25_HASH_SIZE (1 << NAT25_HASH_BITS) -+#define NAT25_AGEING_TIME 300 -+ -+#ifdef CL_IPV6_PASS -+ #define MAX_NETWORK_ADDR_LEN 17 -+#else -+ #define MAX_NETWORK_ADDR_LEN 11 -+#endif -+ -+struct nat25_network_db_entry { -+ struct nat25_network_db_entry *next_hash; -+ struct nat25_network_db_entry **pprev_hash; -+ atomic_t use_count; -+ unsigned char macAddr[6]; -+ unsigned long ageing_timer; -+ unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; -+}; -+ -+enum NAT25_METHOD { -+ NAT25_MIN, -+ NAT25_CHECK, -+ NAT25_INSERT, -+ NAT25_LOOKUP, -+ NAT25_PARSE, -+ NAT25_MAX -+}; -+ -+struct br_ext_info { -+ unsigned int nat25_disable; -+ unsigned int macclone_enable; -+ unsigned int dhcp_bcst_disable; -+ int addPPPoETag; /* 1: Add PPPoE relay-SID, 0: disable */ -+ unsigned char nat25_dmzMac[MACADDRLEN]; -+ unsigned int nat25sc_disable; -+}; -+ -+void nat25_db_cleanup(_adapter *priv); -+ -+#endif /* _RTW_BR_EXT_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_bt_mp.h b/drivers/staging/rtl8723cs/include/rtw_bt_mp.h -new file mode 100644 -index 000000000000..93af3c8f068f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_bt_mp.h -@@ -0,0 +1,288 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __RTW_BT_MP_H -+#define __RTW_BT_MP_H -+ -+ -+#if (MP_DRIVER == 1) -+ -+#pragma pack(1) -+ -+/* definition for BT_UP_OP_BT_READY */ -+#define MP_BT_NOT_READY 0 -+#define MP_BT_READY 1 -+ -+/* definition for BT_UP_OP_BT_SET_MODE */ -+typedef enum _MP_BT_MODE { -+ MP_BT_MODE_RF_TXRX_TEST_MODE = 0, -+ MP_BT_MODE_BT20_DUT_TEST_MODE = 1, -+ MP_BT_MODE_BT40_DIRECT_TEST_MODE = 2, -+ MP_BT_MODE_CONNECT_TEST_MODE = 3, -+ MP_BT_MODE_MAX -+} MP_BT_MODE, *PMP_BT_MODE; -+ -+ -+/* definition for BT_UP_OP_BT_SET_TX_RX_PARAMETER */ -+typedef struct _BT_TXRX_PARAMETERS { -+ u8 txrxChannel; -+ u32 txrxTxPktCnt; -+ u8 txrxTxPktInterval; -+ u8 txrxPayloadType; -+ u8 txrxPktType; -+ u16 txrxPayloadLen; -+ u32 txrxPktHeader; -+ u8 txrxWhitenCoeff; -+ u8 txrxBdaddr[6]; -+ u8 txrxTxGainIndex; -+} BT_TXRX_PARAMETERS, *PBT_TXRX_PARAMETERS; -+ -+/* txrxPktType */ -+typedef enum _MP_BT_PKT_TYPE { -+ MP_BT_PKT_DH1 = 0, -+ MP_BT_PKT_DH3 = 1, -+ MP_BT_PKT_DH5 = 2, -+ MP_BT_PKT_2DH1 = 3, -+ MP_BT_PKT_2DH3 = 4, -+ MP_BT_PKT_2DH5 = 5, -+ MP_BT_PKT_3DH1 = 6, -+ MP_BT_PKT_3DH3 = 7, -+ MP_BT_PKT_3DH5 = 8, -+ MP_BT_PKT_LE = 9, -+ MP_BT_PKT_MAX -+} MP_BT_PKT_TYPE, *PMP_BT_PKT_TYPE; -+/* txrxPayloadType */ -+typedef enum _MP_BT_PAYLOAD_TYPE { -+ MP_BT_PAYLOAD_01010101 = 0, -+ MP_BT_PAYLOAD_ALL_1 = 1, -+ MP_BT_PAYLOAD_ALL_0 = 2, -+ MP_BT_PAYLOAD_11110000 = 3, -+ MP_BT_PAYLOAD_PRBS9 = 4, -+ MP_BT_PAYLOAD_MAX = 8, -+} MP_BT_PAYLOAD_TYPE, *PMP_BT_PAYLOAD_TYPE; -+ -+ -+/* definition for BT_UP_OP_BT_TEST_CTRL */ -+typedef enum _MP_BT_TEST_CTRL { -+ MP_BT_TEST_STOP_ALL_TESTS = 0, -+ MP_BT_TEST_START_RX_TEST = 1, -+ MP_BT_TEST_START_PACKET_TX_TEST = 2, -+ MP_BT_TEST_START_CONTINUOUS_TX_TEST = 3, -+ MP_BT_TEST_START_INQUIRY_SCAN_TEST = 4, -+ MP_BT_TEST_START_PAGE_SCAN_TEST = 5, -+ MP_BT_TEST_START_INQUIRY_PAGE_SCAN_TEST = 6, -+ MP_BT_TEST_START_LEGACY_CONNECT_TEST = 7, -+ MP_BT_TEST_START_LE_CONNECT_TEST_INITIATOR = 8, -+ MP_BT_TEST_START_LE_CONNECT_TEST_ADVERTISER = 9, -+ MP_BT_TEST_MAX -+} MP_BT_TEST_CTRL, *PMP_BT_TEST_CTRL; -+ -+ -+typedef enum _RTL_EXT_C2H_EVT { -+ EXT_C2H_WIFI_FW_ACTIVE_RSP = 0, -+ EXT_C2H_TRIG_BY_BT_FW = 1, -+ MAX_EXT_C2HEVENT -+} RTL_EXT_C2H_EVT; -+ -+/* OP codes definition between the user layer and driver */ -+typedef enum _BT_CTRL_OPCODE_UPPER { -+ BT_UP_OP_BT_READY = 0x00, -+ BT_UP_OP_BT_SET_MODE = 0x01, -+ BT_UP_OP_BT_SET_TX_RX_PARAMETER = 0x02, -+ BT_UP_OP_BT_SET_GENERAL = 0x03, -+ BT_UP_OP_BT_GET_GENERAL = 0x04, -+ BT_UP_OP_BT_TEST_CTRL = 0x05, -+ BT_UP_OP_TEST_BT = 0x06, -+ BT_UP_OP_MAX -+} BT_CTRL_OPCODE_UPPER, *PBT_CTRL_OPCODE_UPPER; -+ -+ -+typedef enum _BT_SET_GENERAL { -+ BT_GSET_REG = 0x00, -+ BT_GSET_RESET = 0x01, -+ BT_GSET_TARGET_BD_ADDR = 0x02, -+ BT_GSET_TX_PWR_FINETUNE = 0x03, -+ BT_SET_TRACKING_INTERVAL = 0x04, -+ BT_SET_THERMAL_METER = 0x05, -+ BT_ENABLE_CFO_TRACKING = 0x06, -+ BT_GSET_UPDATE_BT_PATCH = 0x07, -+ BT_GSET_MAX -+} BT_SET_GENERAL, *PBT_SET_GENERAL; -+ -+typedef enum _BT_GET_GENERAL { -+ BT_GGET_REG = 0x00, -+ BT_GGET_STATUS = 0x01, -+ BT_GGET_REPORT = 0x02, -+ BT_GGET_AFH_MAP = 0x03, -+ BT_GGET_AFH_STATUS = 0x04, -+ BT_GGET_MAX -+} BT_GET_GENERAL, *PBT_GET_GENERAL; -+ -+/* definition for BT_UP_OP_BT_SET_GENERAL */ -+typedef enum _BT_REG_TYPE { -+ BT_REG_RF = 0, -+ BT_REG_MODEM = 1, -+ BT_REG_BLUEWIZE = 2, -+ BT_REG_VENDOR = 3, -+ BT_REG_LE = 4, -+ BT_REG_MAX -+} BT_REG_TYPE, *PBT_REG_TYPE; -+ -+/* definition for BT_LO_OP_GET_AFH_MAP */ -+typedef enum _BT_AFH_MAP_TYPE { -+ BT_AFH_MAP_RESULT = 0, -+ BT_AFH_MAP_WIFI_PSD_ONLY = 1, -+ BT_AFH_MAP_WIFI_CH_BW_ONLY = 2, -+ BT_AFH_MAP_BT_PSD_ONLY = 3, -+ BT_AFH_MAP_HOST_CLASSIFICATION_ONLY = 4, -+ BT_AFH_MAP_MAX -+} BT_AFH_MAP_TYPE, *PBT_AFH_MAP_TYPE; -+ -+/* definition for BT_UP_OP_BT_GET_GENERAL */ -+typedef enum _BT_REPORT_TYPE { -+ BT_REPORT_RX_PACKET_CNT = 0, -+ BT_REPORT_RX_ERROR_BITS = 1, -+ BT_REPORT_RSSI = 2, -+ BT_REPORT_CFO_HDR_QUALITY = 3, -+ BT_REPORT_CONNECT_TARGET_BD_ADDR = 4, -+ BT_REPORT_MAX -+} BT_REPORT_TYPE, *PBT_REPORT_TYPE; -+ -+void -+MPTBT_Test( -+ PADAPTER Adapter, -+ u8 opCode, -+ u8 byte1, -+ u8 byte2, -+ u8 byte3 -+); -+ -+uint -+MPTBT_SendOidBT( -+ PADAPTER pAdapter, -+ void *InformationBuffer, -+ u32 InformationBufferLength, -+ u32 *BytesRead, -+ u32 *BytesNeeded -+); -+ -+void -+MPTBT_FwC2hBtMpCtrl( -+ PADAPTER Adapter, -+ u8 *tmpBuf, -+ u8 length -+); -+ -+void MPh2c_timeout_handle(void *FunctionContext); -+ -+void mptbt_BtControlProcess( -+ PADAPTER Adapter, -+ void *pInBuf -+); -+ -+#define BT_H2C_MAX_RETRY 1 -+#define BT_MAX_C2H_LEN 20 -+ -+typedef struct _BT_REQ_CMD { -+ u8 opCodeVer; -+ u8 OpCode; -+ u16 paraLength; -+ u8 pParamStart[100]; -+} BT_REQ_CMD, *PBT_REQ_CMD; -+ -+typedef struct _BT_RSP_CMD { -+ u16 status; -+ u16 paraLength; -+ u8 pParamStart[100]; -+} BT_RSP_CMD, *PBT_RSP_CMD; -+ -+ -+typedef struct _BT_H2C { -+ u8 opCodeVer:4; -+ u8 reqNum:4; -+ u8 opCode; -+ u8 buf[100]; -+} BT_H2C, *PBT_H2C; -+ -+ -+ -+typedef struct _BT_EXT_C2H { -+ u8 extendId; -+ u8 statusCode:4; -+ u8 retLen:4; -+ u8 opCodeVer:4; -+ u8 reqNum:4; -+ u8 buf[100]; -+} BT_EXT_C2H, *PBT_EXT_C2H; -+ -+ -+typedef enum _BT_OPCODE_STATUS { -+ BT_OP_STATUS_SUCCESS = 0x00, /* Success */ -+ BT_OP_STATUS_VERSION_MISMATCH = 0x01, -+ BT_OP_STATUS_UNKNOWN_OPCODE = 0x02, -+ BT_OP_STATUS_ERROR_PARAMETER = 0x03, -+ BT_OP_STATUS_MAX -+} BT_OPCODE_STATUS, *PBT_OPCODE_STATUS; -+ -+ -+ -+/* OP codes definition between driver and bt fw */ -+typedef enum _BT_CTRL_OPCODE_LOWER { -+ BT_LO_OP_GET_BT_VERSION = 0x00, -+ BT_LO_OP_RESET = 0x01, -+ BT_LO_OP_TEST_CTRL = 0x02, -+ BT_LO_OP_SET_BT_MODE = 0x03, -+ BT_LO_OP_SET_CHNL_TX_GAIN = 0x04, -+ BT_LO_OP_SET_PKT_TYPE_LEN = 0x05, -+ BT_LO_OP_SET_PKT_CNT_L_PL_TYPE = 0x06, -+ BT_LO_OP_SET_PKT_CNT_H_PKT_INTV = 0x07, -+ BT_LO_OP_SET_PKT_HEADER = 0x08, -+ BT_LO_OP_SET_WHITENCOEFF = 0x09, -+ BT_LO_OP_SET_BD_ADDR_L = 0x0a, -+ BT_LO_OP_SET_BD_ADDR_H = 0x0b, -+ BT_LO_OP_WRITE_REG_ADDR = 0x0c, -+ BT_LO_OP_WRITE_REG_VALUE = 0x0d, -+ BT_LO_OP_GET_BT_STATUS = 0x0e, -+ BT_LO_OP_GET_BD_ADDR_L = 0x0f, -+ BT_LO_OP_GET_BD_ADDR_H = 0x10, -+ BT_LO_OP_READ_REG = 0x11, -+ BT_LO_OP_SET_TARGET_BD_ADDR_L = 0x12, -+ BT_LO_OP_SET_TARGET_BD_ADDR_H = 0x13, -+ BT_LO_OP_SET_TX_POWER_CALIBRATION = 0x14, -+ BT_LO_OP_GET_RX_PKT_CNT_L = 0x15, -+ BT_LO_OP_GET_RX_PKT_CNT_H = 0x16, -+ BT_LO_OP_GET_RX_ERROR_BITS_L = 0x17, -+ BT_LO_OP_GET_RX_ERROR_BITS_H = 0x18, -+ BT_LO_OP_GET_RSSI = 0x19, -+ BT_LO_OP_GET_CFO_HDR_QUALITY_L = 0x1a, -+ BT_LO_OP_GET_CFO_HDR_QUALITY_H = 0x1b, -+ BT_LO_OP_GET_TARGET_BD_ADDR_L = 0x1c, -+ BT_LO_OP_GET_TARGET_BD_ADDR_H = 0x1d, -+ BT_LO_OP_GET_AFH_MAP_L = 0x1e, -+ BT_LO_OP_GET_AFH_MAP_M = 0x1f, -+ BT_LO_OP_GET_AFH_MAP_H = 0x20, -+ BT_LO_OP_GET_AFH_STATUS = 0x21, -+ BT_LO_OP_SET_TRACKING_INTERVAL = 0x22, -+ BT_LO_OP_SET_THERMAL_METER = 0x23, -+ BT_LO_OP_ENABLE_CFO_TRACKING = 0x24, -+ BT_LO_OP_MAX -+} BT_CTRL_OPCODE_LOWER, *PBT_CTRL_OPCODE_LOWER; -+ -+ -+ -+ -+#endif /* #if(MP_DRIVER == 1) */ -+ -+#endif /* #ifndef __INC_MPT_BT_H */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_btcoex.h b/drivers/staging/rtl8723cs/include/rtw_btcoex.h -new file mode 100644 -index 000000000000..3361dbef8d94 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_btcoex.h -@@ -0,0 +1,468 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifdef CONFIG_BT_COEXIST -+ -+#ifndef __RTW_BTCOEX_H__ -+#define __RTW_BTCOEX_H__ -+ -+#include -+ -+/* For H2C: H2C_BT_MP_OPER. Return status definition to the user layer */ -+typedef enum _BT_CTRL_STATUS { -+ BT_STATUS_SUCCESS = 0x00, /* Success */ -+ BT_STATUS_BT_OP_SUCCESS = 0x01, /* bt fw op execution success */ -+ BT_STATUS_H2C_SUCCESS = 0x02, /* H2c success */ -+ BT_STATUS_H2C_FAIL = 0x03, /* H2c fail */ -+ BT_STATUS_H2C_LENGTH_EXCEEDED = 0x04, /* H2c command length exceeded */ -+ BT_STATUS_H2C_TIMTOUT = 0x05, /* H2c timeout */ -+ BT_STATUS_H2C_BT_NO_RSP = 0x06, /* H2c sent, bt no rsp */ -+ BT_STATUS_C2H_SUCCESS = 0x07, /* C2h success */ -+ BT_STATUS_C2H_REQNUM_MISMATCH = 0x08, /* bt fw wrong rsp */ -+ BT_STATUS_OPCODE_U_VERSION_MISMATCH = 0x08, /* Upper layer OP code version mismatch. */ -+ BT_STATUS_OPCODE_L_VERSION_MISMATCH = 0x0a, /* Lower layer OP code version mismatch. */ -+ BT_STATUS_UNKNOWN_OPCODE_U = 0x0b, /* Unknown Upper layer OP code */ -+ BT_STATUS_UNKNOWN_OPCODE_L = 0x0c, /* Unknown Lower layer OP code */ -+ BT_STATUS_PARAMETER_FORMAT_ERROR_U = 0x0d, /* Wrong parameters sent by upper layer. */ -+ BT_STATUS_PARAMETER_FORMAT_ERROR_L = 0x0e, /* bt fw parameter format is not consistency */ -+ BT_STATUS_PARAMETER_OUT_OF_RANGE_U = 0x0f, /* uppery layer parameter value is out of range */ -+ BT_STATUS_PARAMETER_OUT_OF_RANGE_L = 0x10, /* bt fw parameter value is out of range */ -+ BT_STATUS_UNKNOWN_STATUS_L = 0x11, /* bt returned an defined status code */ -+ BT_STATUS_UNKNOWN_STATUS_H = 0x12, /* driver need to do error handle or not handle-well. */ -+ BT_STATUS_WRONG_LEVEL = 0x13, /* should be under passive level */ -+ BT_STATUS_NOT_IMPLEMENT = 0x14, /* op code not implemented yet */ -+ BT_STATUS_BT_STACK_OP_SUCCESS = 0x15, /* bt stack op execution success */ -+ BT_STATUS_BT_STACK_NOT_SUPPORT = 0x16, /* stack version not support this. */ -+ BT_STATUS_BT_STACK_SEND_HCI_EVENT_FAIL = 0x17, /* send hci event fail */ -+ BT_STATUS_BT_STACK_NOT_BIND = 0x18, /* stack not bind wifi driver */ -+ BT_STATUS_BT_STACK_NO_RSP = 0x19, /* stack doesn't have any rsp. */ -+ BT_STATUS_MAX -+} BT_CTRL_STATUS, *PBT_CTRL_STATUS; -+ -+typedef enum _BTCOEX_SUSPEND_STATE { -+ BTCOEX_SUSPEND_STATE_RESUME = 0x0, -+ BTCOEX_SUSPEND_STATE_SUSPEND = 0x1, -+ BTCOEX_SUSPEND_STATE_SUSPEND_KEEP_ANT = 0x2, -+ BTCOEX_SUSPEND_STATE_MAX -+} BTCOEX_SUSPEND_STATE, *PBTCOEX_SUSPEND_STATE; -+ -+typedef enum _BTCOEX_POLICY_CONTROL { -+ BTCOEX_POLICY_CONTROL_AUTO, -+ BTCOEX_POLICY_CONTROL_FORCE_FREERUN, -+ BTCOEX_POLICY_CONTROL_FORCE_TDMA -+} BTCOEX_POLICY_CONTROL, *PBTCOEX_POLICY_CONTROL; -+ -+#define SET_BT_MP_OPER_RET(OpCode, StatusCode) ((OpCode << 8) | StatusCode) -+#define GET_OP_CODE_FROM_BT_MP_OPER_RET(RetCode) ((RetCode & 0xF0) >> 8) -+#define GET_STATUS_CODE_FROM_BT_MP_OPER_RET(RetCode) (RetCode & 0x0F) -+#define CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(RetCode, StatusCode) (GET_STATUS_CODE_FROM_BT_MP_OPER_RET(RetCode) == StatusCode) -+ -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ -+#define NETLINK_USER 31 -+#define CONNECT_PORT 30000 -+#define CONNECT_PORT_BT 30001 -+#define KERNEL_SOCKET_OK 0x01 -+#define NETLINK_SOCKET_OK 0x02 -+ -+#define OTHER 0 -+#define RX_ATTEND_ACK 1 -+#define RX_LEAVE_ACK 2 -+#define RX_BT_LEAVE 3 -+#define RX_INVITE_REQ 4 -+#define RX_ATTEND_REQ 5 -+#define RX_INVITE_RSP 6 -+ -+#define invite_req "INVITE_REQ" -+#define invite_rsp "INVITE_RSP" -+#define attend_req "ATTEND_REQ" -+#define attend_ack "ATTEND_ACK" -+#define wifi_leave "WIFI_LEAVE" -+#define leave_ack "LEAVE_ACK" -+#define bt_leave "BT_LEAVE" -+ -+#define BT_INFO_NOTIFY_CMD 0x0106 -+#define BT_INFO_LEN 8 -+ -+typedef struct _HCI_LINK_INFO { -+ u16 ConnectHandle; -+ u8 IncomingTrafficMode; -+ u8 OutgoingTrafficMode; -+ u8 BTProfile; -+ u8 BTCoreSpec; -+ s8 BT_RSSI; -+ u8 TrafficProfile; -+ u8 linkRole; -+} HCI_LINK_INFO, *PHCI_LINK_INFO; -+ -+#define MAX_BT_ACL_LINK_NUM 8 -+ -+typedef struct _HCI_EXT_CONFIG { -+ HCI_LINK_INFO aclLink[MAX_BT_ACL_LINK_NUM]; -+ u8 btOperationCode; -+ u16 CurrentConnectHandle; -+ u8 CurrentIncomingTrafficMode; -+ u8 CurrentOutgoingTrafficMode; -+ -+ u8 NumberOfACL; -+ u8 NumberOfSCO; -+ u8 CurrentBTStatus; -+ u16 HCIExtensionVer; -+ -+ BOOLEAN bEnableWifiScanNotify; -+} HCI_EXT_CONFIG, *PHCI_EXT_CONFIG; -+ -+typedef struct _HCI_PHY_LINK_BSS_INFO { -+ u16 bdCap; /* capability information */ -+ -+ /* Qos related. Added by Annie, 2005-11-01. */ -+ /* BSS_QOS BssQos; */ -+ -+} HCI_PHY_LINK_BSS_INFO, *PHCI_PHY_LINK_BSS_INFO; -+ -+typedef enum _BT_CONNECT_TYPE { -+ BT_CONNECT_AUTH_REQ = 0x00, -+ BT_CONNECT_AUTH_RSP = 0x01, -+ BT_CONNECT_ASOC_REQ = 0x02, -+ BT_CONNECT_ASOC_RSP = 0x03, -+ BT_DISCONNECT = 0x04 -+} BT_CONNECT_TYPE, *PBT_CONNECT_TYPE; -+ -+ -+typedef struct _PACKET_IRP_HCIEVENT_DATA { -+ u8 EventCode; -+ u8 Length; /* total cmd length = extension event length+1(extension event code length) */ -+ u8 Data[1]; /* byte1 is extension event code */ -+} rtw_HCI_event; -+ -+ -+struct btinfo_8761ATV { -+ u8 cid; -+ u8 len; -+ -+ u8 bConnection:1; -+ u8 bSCOeSCO:1; -+ u8 bInQPage:1; -+ u8 bACLBusy:1; -+ u8 bSCOBusy:1; -+ u8 bHID:1; -+ u8 bA2DP:1; -+ u8 bFTP:1; -+ -+ u8 retry_cnt:4; -+ u8 rsvd_34:1; -+ u8 bPage:1; -+ u8 TRxMask:1; -+ u8 Sniff_attempt:1; -+ -+ u8 rssi; -+ -+ u8 A2dp_rate:1; -+ u8 ReInit:1; -+ u8 MaxPower:1; -+ u8 bEnIgnoreWlanAct:1; -+ u8 TxPowerLow:1; -+ u8 TxPowerHigh:1; -+ u8 eSCO_SCO:1; -+ u8 Master_Slave:1; -+ -+ u8 ACL_TRx_TP_low; -+ u8 ACL_TRx_TP_high; -+}; -+ -+#define HCIOPCODE(_OCF, _OGF) ((_OGF)<<10|(_OCF)) -+#define HCIOPCODELOW(_OCF, _OGF) (u8)(HCIOPCODE(_OCF, _OGF) & 0x00ff) -+#define HCIOPCODEHIGHT(_OCF, _OGF) (u8)(HCIOPCODE(_OCF, _OGF)>>8) -+#define HCI_OGF(opCode) (unsigned char)((0xFC00 & (opCode)) >> 10) -+#define HCI_OCF(opCode) (0x3FF & (opCode)) -+ -+ -+typedef enum _HCI_STATUS { -+ HCI_STATUS_SUCCESS = 0x00, /* Success */ -+ HCI_STATUS_UNKNOW_HCI_CMD = 0x01, /* Unknown HCI Command */ -+ HCI_STATUS_UNKNOW_CONNECT_ID = 0X02, /* Unknown Connection Identifier */ -+ HCI_STATUS_HW_FAIL = 0X03, /* Hardware Failure */ -+ HCI_STATUS_PAGE_TIMEOUT = 0X04, /* Page Timeout */ -+ HCI_STATUS_AUTH_FAIL = 0X05, /* Authentication Failure */ -+ HCI_STATUS_PIN_OR_KEY_MISSING = 0X06, /* PIN or Key Missing */ -+ HCI_STATUS_MEM_CAP_EXCEED = 0X07, /* Memory Capacity Exceeded */ -+ HCI_STATUS_CONNECT_TIMEOUT = 0X08, /* Connection Timeout */ -+ HCI_STATUS_CONNECT_LIMIT = 0X09, /* Connection Limit Exceeded */ -+ HCI_STATUS_SYN_CONNECT_LIMIT = 0X0a, /* Synchronous Connection Limit To A Device Exceeded */ -+ HCI_STATUS_ACL_CONNECT_EXISTS = 0X0b, /* ACL Connection Already Exists */ -+ HCI_STATUS_CMD_DISALLOW = 0X0c, /* Command Disallowed */ -+ HCI_STATUS_CONNECT_RJT_LIMIT_RESOURCE = 0X0d, /* Connection Rejected due to Limited Resources */ -+ HCI_STATUS_CONNECT_RJT_SEC_REASON = 0X0e, /* Connection Rejected Due To Security Reasons */ -+ HCI_STATUS_CONNECT_RJT_UNACCEPT_BD_ADDR = 0X0f, /* Connection Rejected due to Unacceptable BD_ADDR */ -+ HCI_STATUS_CONNECT_ACCEPT_TIMEOUT = 0X10, /* Connection Accept Timeout Exceeded */ -+ HCI_STATUS_UNSUPPORT_FEATURE_PARA_VALUE = 0X11, /* Unsupported Feature or Parameter Value */ -+ HCI_STATUS_INVALID_HCI_CMD_PARA_VALUE = 0X12, /* Invalid HCI Command Parameters */ -+ HCI_STATUS_REMOTE_USER_TERMINATE_CONNECT = 0X13, /* Remote User Terminated Connection */ -+ HCI_STATUS_REMOTE_DEV_TERMINATE_LOW_RESOURCE = 0X14, /* Remote Device Terminated Connection due to Low Resources */ -+ HCI_STATUS_REMOTE_DEV_TERMINATE_CONNECT_POWER_OFF = 0X15, /* Remote Device Terminated Connection due to Power Off */ -+ HCI_STATUS_CONNECT_TERMINATE_LOCAL_HOST = 0X16, /* Connection Terminated By Local Host */ -+ HCI_STATUS_REPEATE_ATTEMPT = 0X17, /* Repeated Attempts */ -+ HCI_STATUS_PAIR_NOT_ALLOW = 0X18, /* Pairing Not Allowed */ -+ HCI_STATUS_UNKNOW_LMP_PDU = 0X19, /* Unknown LMP PDU */ -+ HCI_STATUS_UNSUPPORT_REMOTE_LMP_FEATURE = 0X1a, /* Unsupported Remote Feature / Unsupported LMP Feature */ -+ HCI_STATUS_SOC_OFFSET_REJECT = 0X1b, /* SCO Offset Rejected */ -+ HCI_STATUS_SOC_INTERVAL_REJECT = 0X1c, /* SCO Interval Rejected */ -+ HCI_STATUS_SOC_AIR_MODE_REJECT = 0X1d, /* SCO Air Mode Rejected */ -+ HCI_STATUS_INVALID_LMP_PARA = 0X1e, /* Invalid LMP Parameters */ -+ HCI_STATUS_UNSPECIFIC_ERROR = 0X1f, /* Unspecified Error */ -+ HCI_STATUS_UNSUPPORT_LMP_PARA_VALUE = 0X20, /* Unsupported LMP Parameter Value */ -+ HCI_STATUS_ROLE_CHANGE_NOT_ALLOW = 0X21, /* Role Change Not Allowed */ -+ HCI_STATUS_LMP_RESPONSE_TIMEOUT = 0X22, /* LMP Response Timeout */ -+ HCI_STATUS_LMP_ERROR_TRANSACTION_COLLISION = 0X23, /* LMP Error Transaction Collision */ -+ HCI_STATUS_LMP_PDU_NOT_ALLOW = 0X24, /* LMP PDU Not Allowed */ -+ HCI_STATUS_ENCRYPTION_MODE_NOT_ALLOW = 0X25, /* Encryption Mode Not Acceptable */ -+ HCI_STATUS_LINK_KEY_CAN_NOT_CHANGE = 0X26, /* Link Key Can Not be Changed */ -+ HCI_STATUS_REQUEST_QOS_NOT_SUPPORT = 0X27, /* Requested QoS Not Supported */ -+ HCI_STATUS_INSTANT_PASSED = 0X28, /* Instant Passed */ -+ HCI_STATUS_PAIRING_UNIT_KEY_NOT_SUPPORT = 0X29, /* Pairing With Unit Key Not Supported */ -+ HCI_STATUS_DIFFERENT_TRANSACTION_COLLISION = 0X2a, /* Different Transaction Collision */ -+ HCI_STATUS_RESERVE_1 = 0X2b, /* Reserved */ -+ HCI_STATUS_QOS_UNACCEPT_PARA = 0X2c, /* QoS Unacceptable Parameter */ -+ HCI_STATUS_QOS_REJECT = 0X2d, /* QoS Rejected */ -+ HCI_STATUS_CHNL_CLASSIFICATION_NOT_SUPPORT = 0X2e, /* Channel Classification Not Supported */ -+ HCI_STATUS_INSUFFICIENT_SECURITY = 0X2f, /* Insufficient Security */ -+ HCI_STATUS_PARA_OUT_OF_RANGE = 0x30, /* Parameter Out Of Mandatory Range */ -+ HCI_STATUS_RESERVE_2 = 0X31, /* Reserved */ -+ HCI_STATUS_ROLE_SWITCH_PENDING = 0X32, /* Role Switch Pending */ -+ HCI_STATUS_RESERVE_3 = 0X33, /* Reserved */ -+ HCI_STATUS_RESERVE_SOLT_VIOLATION = 0X34, /* Reserved Slot Violation */ -+ HCI_STATUS_ROLE_SWITCH_FAIL = 0X35, /* Role Switch Failed */ -+ HCI_STATUS_EXTEND_INQUIRY_RSP_TOO_LARGE = 0X36, /* Extended Inquiry Response Too Large */ -+ HCI_STATUS_SEC_SIMPLE_PAIRING_NOT_SUPPORT = 0X37, /* Secure Simple Pairing Not Supported By Host. */ -+ HCI_STATUS_HOST_BUSY_PAIRING = 0X38, /* Host Busy - Pairing */ -+ HCI_STATUS_CONNECT_REJ_NOT_SUIT_CHNL_FOUND = 0X39, /* Connection Rejected due to No Suitable Channel Found */ -+ HCI_STATUS_CONTROLLER_BUSY = 0X3a /* CONTROLLER BUSY */ -+} RTW_HCI_STATUS; -+ -+#define HCI_EVENT_COMMAND_COMPLETE 0x0e -+ -+#define OGF_EXTENSION 0X3f -+typedef enum HCI_EXTENSION_COMMANDS { -+ HCI_SET_ACL_LINK_DATA_FLOW_MODE = 0x0010, -+ HCI_SET_ACL_LINK_STATUS = 0x0020, -+ HCI_SET_SCO_LINK_STATUS = 0x0030, -+ HCI_SET_RSSI_VALUE = 0x0040, -+ HCI_SET_CURRENT_BLUETOOTH_STATUS = 0x0041, -+ -+ /* The following is for RTK8723 */ -+ HCI_EXTENSION_VERSION_NOTIFY = 0x0100, -+ HCI_LINK_STATUS_NOTIFY = 0x0101, -+ HCI_BT_OPERATION_NOTIFY = 0x0102, -+ HCI_ENABLE_WIFI_SCAN_NOTIFY = 0x0103, -+ HCI_QUERY_RF_STATUS = 0x0104, -+ HCI_BT_ABNORMAL_NOTIFY = 0x0105, -+ HCI_BT_INFO_NOTIFY = 0x0106, -+ HCI_BT_COEX_NOTIFY = 0x0107, -+ HCI_BT_PATCH_VERSION_NOTIFY = 0x0108, -+ HCI_BT_AFH_MAP_NOTIFY = 0x0109, -+ HCI_BT_REGISTER_VALUE_NOTIFY = 0x010a, -+ -+ /* The following is for IVT */ -+ HCI_WIFI_CURRENT_CHANNEL = 0x0300, -+ HCI_WIFI_CURRENT_BANDWIDTH = 0x0301, -+ HCI_WIFI_CONNECTION_STATUS = 0x0302 -+} RTW_HCI_EXT_CMD; -+ -+#define HCI_EVENT_EXTENSION_RTK 0xfe -+typedef enum HCI_EXTENSION_EVENT_RTK { -+ HCI_EVENT_EXT_WIFI_SCAN_NOTIFY = 0x01, -+ HCI_EVENT_EXT_WIFI_RF_STATUS_NOTIFY = 0x02, -+ HCI_EVENT_EXT_BT_INFO_CONTROL = 0x03, -+ HCI_EVENT_EXT_BT_COEX_CONTROL = 0x04 -+} RTW_HCI_EXT_EVENT; -+ -+typedef enum _BT_TRAFFIC_MODE { -+ BT_MOTOR_EXT_BE = 0x00, /* Best Effort. Default. for HCRP, PAN, SDP, RFCOMM-based profiles like FTP,OPP, SPP, DUN, etc. */ -+ BT_MOTOR_EXT_GUL = 0x01, /* Guaranteed Latency. This type of traffic is used e.g. for HID and AVRCP. */ -+ BT_MOTOR_EXT_GUB = 0X02, /* Guaranteed Bandwidth. */ -+ BT_MOTOR_EXT_GULB = 0X03 /* Guaranteed Latency and Bandwidth. for A2DP and VDP. */ -+} BT_TRAFFIC_MODE; -+ -+typedef enum _BT_TRAFFIC_MODE_PROFILE { -+ BT_PROFILE_NONE, -+ BT_PROFILE_A2DP, -+ BT_PROFILE_PAN , -+ BT_PROFILE_HID, -+ BT_PROFILE_SCO -+} BT_TRAFFIC_MODE_PROFILE; -+ -+typedef enum _HCI_EXT_BT_OPERATION { -+ HCI_BT_OP_NONE = 0x0, -+ HCI_BT_OP_INQUIRY_START = 0x1, -+ HCI_BT_OP_INQUIRY_FINISH = 0x2, -+ HCI_BT_OP_PAGING_START = 0x3, -+ HCI_BT_OP_PAGING_SUCCESS = 0x4, -+ HCI_BT_OP_PAGING_UNSUCCESS = 0x5, -+ HCI_BT_OP_PAIRING_START = 0x6, -+ HCI_BT_OP_PAIRING_FINISH = 0x7, -+ HCI_BT_OP_BT_DEV_ENABLE = 0x8, -+ HCI_BT_OP_BT_DEV_DISABLE = 0x9, -+ HCI_BT_OP_MAX -+} HCI_EXT_BT_OPERATION, *PHCI_EXT_BT_OPERATION; -+ -+typedef struct _BT_MGNT { -+ BOOLEAN bBTConnectInProgress; -+ BOOLEAN bLogLinkInProgress; -+ BOOLEAN bPhyLinkInProgress; -+ BOOLEAN bPhyLinkInProgressStartLL; -+ u8 BtCurrentPhyLinkhandle; -+ u16 BtCurrentLogLinkhandle; -+ u8 CurrentConnectEntryNum; -+ u8 DisconnectEntryNum; -+ u8 CurrentBTConnectionCnt; -+ BT_CONNECT_TYPE BTCurrentConnectType; -+ BT_CONNECT_TYPE BTReceiveConnectPkt; -+ u8 BTAuthCount; -+ u8 BTAsocCount; -+ BOOLEAN bStartSendSupervisionPkt; -+ BOOLEAN BtOperationOn; -+ BOOLEAN BTNeedAMPStatusChg; -+ BOOLEAN JoinerNeedSendAuth; -+ HCI_PHY_LINK_BSS_INFO bssDesc; -+ HCI_EXT_CONFIG ExtConfig; -+ BOOLEAN bNeedNotifyAMPNoCap; -+ BOOLEAN bCreateSpportQos; -+ BOOLEAN bSupportProfile; -+ u8 BTChannel; -+ BOOLEAN CheckChnlIsSuit; -+ BOOLEAN bBtScan; -+ BOOLEAN btLogoTest; -+ BOOLEAN bRfStatusNotified; -+ BOOLEAN bBtRsvedPageDownload; -+} BT_MGNT, *PBT_MGNT; -+ -+struct bt_coex_info { -+ /* For Kernel Socket */ -+ struct socket *udpsock; -+ struct sockaddr_in wifi_sockaddr; /*wifi socket*/ -+ struct sockaddr_in bt_sockaddr;/* BT socket */ -+ struct sock *sk_store;/*back up socket for UDP RX int*/ -+ -+ /* store which socket is OK */ -+ u8 sock_open; -+ -+ u8 BT_attend; -+ u8 is_exist; /* socket exist */ -+ BT_MGNT BtMgnt; -+ struct workqueue_struct *btcoex_wq; -+ struct delayed_work recvmsg_work; -+}; -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ -+#define PACKET_NORMAL 0 -+#define PACKET_DHCP 1 -+#define PACKET_ARP 2 -+#define PACKET_EAPOL 3 -+ -+void rtw_btcoex_Initialize(PADAPTER); -+void rtw_btcoex_PowerOnSetting(PADAPTER padapter); -+void rtw_btcoex_AntInfoSetting(PADAPTER padapter); -+void rtw_btcoex_PowerOffSetting(PADAPTER padapter); -+void rtw_btcoex_PreLoadFirmware(PADAPTER padapter); -+void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly); -+void rtw_btcoex_IpsNotify(PADAPTER, u8 type); -+void rtw_btcoex_LpsNotify(PADAPTER, u8 type); -+void rtw_btcoex_ScanNotify(PADAPTER, u8 type); -+void rtw_btcoex_MediaStatusNotify(PADAPTER, u8 mediaStatus); -+void rtw_btcoex_SpecialPacketNotify(PADAPTER, u8 pktType); -+void rtw_btcoex_IQKNotify(PADAPTER padapter, u8 state); -+void rtw_btcoex_WLRFKNotify(PADAPTER padapter, u8 path, u8 type, u8 state); -+void rtw_btcoex_BtInfoNotify(PADAPTER, u8 length, u8 *tmpBuf); -+void rtw_btcoex_BtMpRptNotify(PADAPTER, u8 length, u8 *tmpBuf); -+void rtw_btcoex_SuspendNotify(PADAPTER, u8 state); -+void rtw_btcoex_HaltNotify(PADAPTER); -+void rtw_btcoex_switchband_notify(u8 under_scan, u8 band_type); -+void rtw_btcoex_WlFwDbgInfoNotify(PADAPTER padapter, u8* tmpBuf, u8 length); -+void rtw_btcoex_rx_rate_change_notify(PADAPTER padapter, u8 is_data_frame, u8 rate_id); -+void rtw_btcoex_SwitchBtTRxMask(PADAPTER); -+void rtw_btcoex_Switch(PADAPTER, u8 enable); -+u8 rtw_btcoex_IsBtDisabled(PADAPTER); -+void rtw_btcoex_Handler(PADAPTER); -+s32 rtw_btcoex_IsBTCoexRejectAMPDU(PADAPTER padapter); -+s32 rtw_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER); -+u32 rtw_btcoex_GetAMPDUSize(PADAPTER); -+void rtw_btcoex_SetManualControl(PADAPTER, u8 bmanual); -+void rtw_btcoex_set_policy_control(PADAPTER, u8 btc_policy); -+u8 rtw_btcoex_1Ant(PADAPTER); -+u8 rtw_btcoex_IsBtControlLps(PADAPTER); -+u8 rtw_btcoex_IsLpsOn(PADAPTER); -+u8 rtw_btcoex_RpwmVal(PADAPTER); -+u8 rtw_btcoex_LpsVal(PADAPTER); -+u32 rtw_btcoex_GetRaMask(PADAPTER); -+u8 rtw_btcoex_query_reduced_wl_pwr_lvl(PADAPTER padapter); -+void rtw_btcoex_set_reduced_wl_pwr_lvl(PADAPTER padapter, u8 val); -+void rtw_btcoex_do_reduce_wl_pwr_lvl(PADAPTER padapter); -+void rtw_btcoex_RecordPwrMode(PADAPTER, u8 *pCmdBuf, u8 cmdLen); -+void rtw_btcoex_DisplayBtCoexInfo(PADAPTER, u8 *pbuf, u32 bufsize); -+void rtw_btcoex_SetDBG(PADAPTER, u32 *pDbgModule); -+u32 rtw_btcoex_GetDBG(PADAPTER, u8 *pStrBuf, u32 bufSize); -+u8 rtw_btcoex_IncreaseScanDeviceNum(PADAPTER); -+u8 rtw_btcoex_IsBtLinkExist(PADAPTER); -+void rtw_btcoex_pta_off_on_notify(PADAPTER padapter, u8 bBTON); -+ -+#ifdef CONFIG_RF4CE_COEXIST -+void rtw_btcoex_SetRf4ceLinkState(PADAPTER padapter, u8 state); -+u8 rtw_btcoex_GetRf4ceLinkState(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+void rtw_btcoex_SetBtPatchVersion(PADAPTER padapter, u16 btHciVer, u16 btPatchVer); -+void rtw_btcoex_SetHciVersion(PADAPTER padapter, u16 hciVersion); -+void rtw_btcoex_StackUpdateProfileInfo(void); -+void rtw_btcoex_init_socket(_adapter *padapter); -+void rtw_btcoex_close_socket(_adapter *padapter); -+void rtw_btcoex_dump_tx_msg(u8 *tx_msg, u8 len, u8 *msg_name); -+u8 rtw_btcoex_sendmsgbysocket(_adapter *padapter, u8 *msg, u8 msg_size, bool force); -+u8 rtw_btcoex_create_kernel_socket(_adapter *padapter); -+void rtw_btcoex_close_kernel_socket(_adapter *padapter); -+void rtw_btcoex_recvmsgbysocket(void *data); -+u16 rtw_btcoex_parse_recv_data(u8 *msg, u8 msg_size); -+u8 rtw_btcoex_btinfo_cmd(PADAPTER padapter, u8 *pbuf, u16 length); -+void rtw_btcoex_parse_hci_cmd(_adapter *padapter, u8 *cmd, u16 len); -+void rtw_btcoex_SendEventExtBtCoexControl(PADAPTER Adapter, u8 bNeedDbgRsp, u8 dataLen, void *pData); -+void rtw_btcoex_SendEventExtBtInfoControl(PADAPTER Adapter, u8 dataLen, void *pData); -+void rtw_btcoex_SendScanNotify(PADAPTER padapter, u8 scanType); -+#define BT_SendEventExtBtCoexControl(Adapter, bNeedDbgRsp, dataLen, pData) rtw_btcoex_SendEventExtBtCoexControl(Adapter, bNeedDbgRsp, dataLen, pData) -+#define BT_SendEventExtBtInfoControl(Adapter, dataLen, pData) rtw_btcoex_SendEventExtBtInfoControl(Adapter, dataLen, pData) -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+u16 rtw_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data); -+u16 rtw_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val); -+u8 rtw_btcoex_get_reduce_wl_txpwr(PADAPTER padapter); -+u8 rtw_btcoex_get_bt_coexist(PADAPTER padapter); -+u8 rtw_btcoex_get_chip_type(PADAPTER padapter); -+u8 rtw_btcoex_get_pg_ant_num(PADAPTER padapter); -+u8 rtw_btcoex_get_pg_single_ant_path(PADAPTER padapter); -+u8 rtw_btcoex_get_pg_rfe_type(PADAPTER padapter); -+u8 rtw_btcoex_is_tfbga_package_type(PADAPTER padapter); -+u8 rtw_btcoex_get_ant_div_cfg(PADAPTER padapter); -+u16 rtw_btcoex_btset_testmode(PADAPTER padapter, u8 type); -+ -+/* ================================================== -+ * Below Functions are called by BT-Coex -+ * ================================================== */ -+void rtw_btcoex_rx_ampdu_apply(PADAPTER padapter); -+void rtw_btcoex_LPS_Enter(PADAPTER padapter); -+u8 rtw_btcoex_LPS_Leave(PADAPTER padapter); -+ -+#endif /* __RTW_BTCOEX_H__ */ -+#endif /* CONFIG_BT_COEXIST */ -+ -+void rtw_btcoex_set_ant_info(PADAPTER padapter); -+void rtw_btcoex_connect_notify(PADAPTER, u8 join_type); -+ -diff --git a/drivers/staging/rtl8723cs/include/rtw_btcoex_wifionly.h b/drivers/staging/rtl8723cs/include/rtw_btcoex_wifionly.h -new file mode 100644 -index 000000000000..93087ebe09a4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_btcoex_wifionly.h -@@ -0,0 +1,24 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_BTCOEX_WIFIONLY_H__ -+#define __RTW_BTCOEX_WIFIONLY_H__ -+ -+void rtw_btcoex_wifionly_switchband_notify(PADAPTER padapter); -+void rtw_btcoex_wifionly_scan_notify(PADAPTER padapter); -+void rtw_btcoex_wifionly_connect_notify(PADAPTER padapter); -+void rtw_btcoex_wifionly_hw_config(PADAPTER padapter); -+void rtw_btcoex_wifionly_initialize(PADAPTER padapter); -+void rtw_btcoex_wifionly_AntInfoSetting(PADAPTER padapter); -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_byteorder.h b/drivers/staging/rtl8723cs/include/rtw_byteorder.h -new file mode 100644 -index 000000000000..8e6bb7a6df01 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_byteorder.h -@@ -0,0 +1,33 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTL871X_BYTEORDER_H_ -+#define _RTL871X_BYTEORDER_H_ -+ -+ -+#if defined(CONFIG_LITTLE_ENDIAN) && defined (CONFIG_BIG_ENDIAN) -+ #error "Shall be CONFIG_LITTLE_ENDIAN or CONFIG_BIG_ENDIAN, but not both!\n" -+#endif -+ -+#if defined(CONFIG_LITTLE_ENDIAN) -+ #ifndef CONFIG_PLATFORM_MSTAR389 -+ #include -+ #endif -+#elif defined (CONFIG_BIG_ENDIAN) -+ #include -+#else -+ # error "Must be LITTLE/BIG Endian Host" -+#endif -+ -+#endif /* _RTL871X_BYTEORDER_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_cmd.h b/drivers/staging/rtl8723cs/include/rtw_cmd.h -new file mode 100644 -index 000000000000..a64245c904ea ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_cmd.h -@@ -0,0 +1,790 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_CMD_H_ -+#define __RTW_CMD_H_ -+ -+ -+#define C2H_MEM_SZ (16*1024) -+ -+#define FREE_CMDOBJ_SZ 128 -+ -+#define MAX_CMDSZ 1536 -+#define MAX_RSPSZ 512 -+#define MAX_EVTSZ 1024 -+ -+#define CMDBUFF_ALIGN_SZ 512 -+ -+struct cmd_obj { -+ _adapter *padapter; -+ u16 cmdcode; -+ u8 res; -+ u8 *parmbuf; -+ u32 cmdsz; -+ u8 *rsp; -+ u32 rspsz; -+ struct submit_ctx *sctx; -+ u8 no_io; -+ /* _sema cmd_sem; */ -+ _list list; -+}; -+ -+/* cmd flags */ -+enum { -+ RTW_CMDF_DIRECTLY = BIT0, -+ RTW_CMDF_WAIT_ACK = BIT1, -+}; -+ -+struct cmd_priv { -+ _sema cmd_queue_sema; -+ /* _sema cmd_done_sema; */ -+ _sema start_cmdthread_sema; -+ -+ _queue cmd_queue; -+ u8 cmd_seq; -+ u8 *cmd_buf; /* shall be non-paged, and 4 bytes aligned */ -+ u8 *cmd_allocated_buf; -+ u8 *rsp_buf; /* shall be non-paged, and 4 bytes aligned */ -+ u8 *rsp_allocated_buf; -+ u32 cmd_issued_cnt; -+ u32 cmd_done_cnt; -+ u32 rsp_cnt; -+ ATOMIC_T cmdthd_running; -+ /* u8 cmdthd_running; */ -+ -+ _adapter *padapter; -+ _mutex sctx_mutex; -+}; -+ -+#ifdef CONFIG_EVENT_THREAD_MODE -+struct evt_obj { -+ u16 evtcode; -+ u8 res; -+ u8 *parmbuf; -+ u32 evtsz; -+ _list list; -+}; -+#endif -+ -+struct evt_priv { -+#ifdef CONFIG_EVENT_THREAD_MODE -+ _sema evt_notify; -+ -+ _queue evt_queue; -+#endif -+ -+#ifdef CONFIG_FW_C2H_REG -+ #define CONFIG_C2H_WK -+#endif -+ -+#ifdef CONFIG_C2H_WK -+ _workitem c2h_wk; -+ bool c2h_wk_alive; -+ struct rtw_cbuf *c2h_queue; -+ #define C2H_QUEUE_MAX_LEN 10 -+#endif -+ -+#ifdef CONFIG_H2CLBK -+ _sema lbkevt_done; -+ u8 lbkevt_limit; -+ u8 lbkevt_num; -+ u8 *cmdevt_parm; -+#endif -+ ATOMIC_T event_seq; -+ u8 *evt_buf; /* shall be non-paged, and 4 bytes aligned */ -+ u8 *evt_allocated_buf; -+ u32 evt_done_cnt; -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ u8 *c2h_mem; -+ u8 *allocated_c2h_mem; -+#endif -+ -+}; -+ -+#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \ -+ do {\ -+ _rtw_init_listhead(&pcmd->list);\ -+ pcmd->cmdcode = code;\ -+ pcmd->parmbuf = (u8 *)(pparm);\ -+ pcmd->cmdsz = sizeof (*pparm);\ -+ pcmd->rsp = NULL;\ -+ pcmd->rspsz = 0;\ -+ } while (0) -+ -+#define init_h2fwcmd_w_parm_no_parm_rsp(pcmd, code) \ -+ do {\ -+ _rtw_init_listhead(&pcmd->list);\ -+ pcmd->cmdcode = code;\ -+ pcmd->parmbuf = NULL;\ -+ pcmd->cmdsz = 0;\ -+ pcmd->rsp = NULL;\ -+ pcmd->rspsz = 0;\ -+ } while (0) -+ -+struct P2P_PS_Offload_t { -+ u8 Offload_En:1; -+ u8 role:1; /* 1: Owner, 0: Client */ -+ u8 CTWindow_En:1; -+ u8 NoA0_En:1; -+ u8 NoA1_En:1; -+ u8 AllStaSleep:1; /* Only valid in Owner */ -+ u8 discovery:1; -+ u8 rsvd:1; -+#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP -+ u8 p2p_macid:7; -+ u8 disable_close_rf:1; /*1: not close RF but just pause p2p_macid when NoA duration*/ -+#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */ -+}; -+ -+struct P2P_PS_CTWPeriod_t { -+ u8 CTWPeriod; /* TU */ -+}; -+ -+#ifdef CONFIG_P2P_WOWLAN -+ -+struct P2P_WoWlan_Offload_t { -+ u8 Disconnect_Wkup_Drv:1; -+ u8 role:2; -+ u8 Wps_Config[2]; -+}; -+ -+#endif /* CONFIG_P2P_WOWLAN */ -+ -+extern u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *obj); -+extern struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv); -+extern void rtw_free_cmd_obj(struct cmd_obj *pcmd); -+ -+#ifdef CONFIG_EVENT_THREAD_MODE -+extern u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj); -+extern struct evt_obj *rtw_dequeue_evt(_queue *queue); -+extern void rtw_free_evt_obj(struct evt_obj *pcmd); -+#endif -+ -+void rtw_stop_cmd_thread(_adapter *adapter); -+thread_return rtw_cmd_thread(thread_context context); -+ -+extern u32 rtw_init_cmd_priv(struct cmd_priv *pcmdpriv); -+extern void rtw_free_cmd_priv(struct cmd_priv *pcmdpriv); -+ -+extern u32 rtw_init_evt_priv(struct evt_priv *pevtpriv); -+extern void rtw_free_evt_priv(struct evt_priv *pevtpriv); -+extern void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv); -+extern void rtw_evt_notify_isr(struct evt_priv *pevtpriv); -+#ifdef CONFIG_P2P -+u8 p2p_protocol_wk_cmd(_adapter *padapter, int intCmdType); -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+struct rtw_roch_parm { -+ u64 cookie; -+ struct wireless_dev *wdev; -+ struct ieee80211_channel ch; -+ enum nl80211_channel_type ch_type; -+ unsigned int duration; -+}; -+ -+u8 rtw_roch_cmd(_adapter *adapter -+ , u64 cookie, struct wireless_dev *wdev -+ , struct ieee80211_channel *ch, enum nl80211_channel_type ch_type -+ , unsigned int duration -+ , u8 flags -+); -+ -+u8 rtw_cancel_roch_cmd(_adapter *adapter, u64 cookie, struct wireless_dev *wdev, u8 flags); -+ -+u8 rtw_mgnt_tx_cmd(_adapter *adapter, u8 tx_ch, u8 no_cck, const u8 *buf, size_t len, int wait_ack, u8 flags); -+struct mgnt_tx_parm { -+ u8 tx_ch; -+ u8 no_cck; -+ const u8 *buf; -+ size_t len; -+ int wait_ack; -+}; -+#endif -+ -+enum rtw_drvextra_cmd_id { -+ NONE_WK_CID, -+ STA_MSTATUS_RPT_WK_CID, -+ DYNAMIC_CHK_WK_CID, -+ DM_CTRL_WK_CID, -+ PBC_POLLING_WK_CID, -+ POWER_SAVING_CTRL_WK_CID,/* IPS,AUTOSuspend */ -+ LPS_CTRL_WK_CID, -+ ANT_SELECT_WK_CID, -+ P2P_PS_WK_CID, -+ P2P_PROTO_WK_CID, -+ CHECK_HIQ_WK_CID,/* for softap mode, check hi queue if empty */ -+ C2H_WK_CID, -+ RTP_TIMER_CFG_WK_CID, -+ RESET_SECURITYPRIV, /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ FREE_ASSOC_RESOURCES, /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ DM_IN_LPS_WK_CID, -+ DM_RA_MSK_WK_CID, /* add for STA update RAMask when bandwith change. */ -+ BEAMFORMING_WK_CID, -+ LPS_CHANGE_DTIM_CID, -+ BTINFO_WK_CID, -+ BTC_REDUCE_WL_TXPWR_CID, -+ DFS_RADAR_DETECT_WK_CID, -+ DFS_RADAR_DETECT_EN_DEC_WK_CID, -+ SESSION_TRACKER_WK_CID, -+ EN_HW_UPDATE_TSF_WK_CID, -+ PERIOD_TSF_UPDATE_END_WK_CID, -+ TEST_H2C_CID, -+ MP_CMD_WK_CID, -+ CUSTOMER_STR_WK_CID, -+#ifdef CONFIG_RTW_REPEATER_SON -+ RSON_SCAN_WK_CID, -+#endif -+ ROCH_WK_CID, -+ MGNT_TX_WK_CID, -+ REQ_PER_CMD_WK_CID, -+ SSMPS_WK_CID, -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+ TXSS_WK_CID, -+#endif -+ AC_PARM_CMD_WK_CID, -+#ifdef CONFIG_AP_MODE -+ STOP_AP_WK_CID, -+#endif -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ TBTX_CONTROL_TX_WK_CID, -+#endif -+ MAX_WK_CID -+}; -+ -+enum LPS_CTRL_TYPE { -+ LPS_CTRL_SCAN = 0, -+ LPS_CTRL_JOINBSS = 1, -+ LPS_CTRL_CONNECT = 2, -+ LPS_CTRL_DISCONNECT = 3, -+ LPS_CTRL_SPECIAL_PACKET = 4, -+ LPS_CTRL_LEAVE = 5, -+ LPS_CTRL_TRAFFIC_BUSY = 6, -+ LPS_CTRL_TX_TRAFFIC_LEAVE = 7, -+ LPS_CTRL_RX_TRAFFIC_LEAVE = 8, -+ LPS_CTRL_ENTER = 9, -+ LPS_CTRL_LEAVE_CFG80211_PWRMGMT = 10, -+ LPS_CTRL_LEAVE_SET_OPTION = 11, -+}; -+ -+enum STAKEY_TYPE { -+ GROUP_KEY = 0, -+ UNICAST_KEY = 1, -+ TDLS_KEY = 2, -+}; -+ -+enum RFINTFS { -+ SWSI, -+ HWSI, -+ HWPI, -+}; -+ -+ -+/* -+Caller Mode: Infra, Ad-Hoc -+ -+Notes: To join the specified bss -+ -+Command Event Mode -+ -+*/ -+struct joinbss_parm { -+ WLAN_BSSID_EX network; -+}; -+ -+/* -+Caller Mode: Infra, Ad-HoC(C) -+ -+Notes: To disconnect the current associated BSS -+ -+Command Mode -+ -+*/ -+struct disconnect_parm { -+ u32 deauth_timeout_ms; -+}; -+ -+/* -+Caller Mode: AP, Ad-HoC(M) -+ -+Notes: To create a BSS -+ -+Command Mode -+*/ -+struct createbss_parm { -+ bool adhoc; -+ -+ /* used by AP/Mesh mode now */ -+ u8 ifbmp; -+ u8 excl_ifbmp; -+ s16 req_ch; -+ s8 req_bw; -+ s8 req_offset; -+}; -+ -+ -+struct setopmode_parm { -+ u8 mode; -+ u8 rsvd[3]; -+}; -+ -+/* -+Caller Mode: AP, Ad-HoC, Infra -+ -+Notes: To ask RTL8711 performing site-survey -+ -+Command-Event Mode -+ -+*/ -+ -+#define RTW_SSID_SCAN_AMOUNT 9 /* for WEXT_CSCAN_AMOUNT 9 */ -+#define RTW_CHANNEL_SCAN_AMOUNT (14+37) -+struct sitesurvey_parm { -+ sint scan_mode; /* active: 1, passive: 0 */ -+ /* sint bsslimit; // 1 ~ 48 */ -+ u8 ssid_num; -+ u8 ch_num; -+ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; -+ struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT]; -+ -+ u32 token; /* 80211k use it to identify caller */ -+ u16 duration; /* 0: use default, otherwise: channel scan time */ -+ u8 igi; /* 0: use defalut */ -+ u8 bw; /* 0: use default */ -+ -+ bool acs; /* aim to trigger channel selection when scan done */ -+}; -+ -+/* -+Caller Mode: Any -+ -+Notes: To set the auth type of RTL8711. open/shared/802.1x -+ -+Command Mode -+ -+*/ -+struct setauth_parm { -+ u8 mode; /* 0: legacy open, 1: legacy shared 2: 802.1x */ -+ u8 _1x; /* 0: PSK, 1: TLS */ -+ u8 rsvd[2]; -+}; -+ -+/* -+Caller Mode: Infra -+ -+a. algorithm: wep40, wep104, tkip & aes -+b. keytype: grp key/unicast key -+c. key contents -+ -+when shared key ==> keyid is the camid -+when 802.1x ==> keyid [0:1] ==> grp key -+when 802.1x ==> keyid > 2 ==> unicast key -+ -+*/ -+struct setkey_parm { -+ u8 algorithm; /* encryption algorithm, could be none, wep40, TKIP, CCMP, wep104 */ -+ u8 keyid; -+ u8 set_tx; /* 1: main tx key for wep. 0: other key. */ -+ u8 key[32]; /* this could be 40 or 104 */ -+}; -+ -+/* -+When in AP or Ad-Hoc mode, this is used to -+allocate an sw/hw entry for a newly associated sta. -+ -+Command -+ -+when shared key ==> algorithm/keyid -+ -+*/ -+struct set_stakey_parm { -+ u8 addr[ETH_ALEN]; -+ u8 algorithm; -+ u8 keyid; -+ u8 key[32]; -+ u8 gk; -+}; -+ -+struct set_stakey_rsp { -+ u8 addr[ETH_ALEN]; -+ u8 keyid; -+ u8 rsvd; -+}; -+ -+struct Tx_Beacon_param { -+ WLAN_BSSID_EX network; -+}; -+ -+/* -+ Notes: This command is used for H2C/C2H loopback testing -+ -+ mac[0] == 0 -+ ==> CMD mode, return H2C_SUCCESS. -+ The following condition must be ture under CMD mode -+ mac[1] == mac[4], mac[2] == mac[3], mac[0]=mac[5]= 0; -+ s0 == 0x1234, s1 == 0xabcd, w0 == 0x78563412, w1 == 0x5aa5def7; -+ s2 == (b1 << 8 | b0); -+ -+ mac[0] == 1 -+ ==> CMD_RSP mode, return H2C_SUCCESS_RSP -+ -+ The rsp layout shall be: -+ rsp: parm: -+ mac[0] = mac[5]; -+ mac[1] = mac[4]; -+ mac[2] = mac[3]; -+ mac[3] = mac[2]; -+ mac[4] = mac[1]; -+ mac[5] = mac[0]; -+ s0 = s1; -+ s1 = swap16(s0); -+ w0 = swap32(w1); -+ b0 = b1 -+ s2 = s0 + s1 -+ b1 = b0 -+ w1 = w0 -+ -+ mac[0] == 2 -+ ==> CMD_EVENT mode, return H2C_SUCCESS -+ The event layout shall be: -+ event: parm: -+ mac[0] = mac[5]; -+ mac[1] = mac[4]; -+ mac[2] = event's sequence number, starting from 1 to parm's marc[3] -+ mac[3] = mac[2]; -+ mac[4] = mac[1]; -+ mac[5] = mac[0]; -+ s0 = swap16(s0) - event.mac[2]; -+ s1 = s1 + event.mac[2]; -+ w0 = swap32(w0); -+ b0 = b1 -+ s2 = s0 + event.mac[2] -+ b1 = b0 -+ w1 = swap32(w1) - event.mac[2]; -+ -+ parm->mac[3] is the total event counts that host requested. -+ -+ -+ event will be the same with the cmd's param. -+ -+*/ -+ -+#ifdef CONFIG_H2CLBK -+ -+struct seth2clbk_parm { -+ u8 mac[6]; -+ u16 s0; -+ u16 s1; -+ u32 w0; -+ u8 b0; -+ u16 s2; -+ u8 b1; -+ u32 w1; -+}; -+ -+struct geth2clbk_parm { -+ u32 rsv; -+}; -+ -+struct geth2clbk_rsp { -+ u8 mac[6]; -+ u16 s0; -+ u16 s1; -+ u32 w0; -+ u8 b0; -+ u16 s2; -+ u8 b1; -+ u32 w1; -+}; -+ -+#endif /* CONFIG_H2CLBK */ -+ -+/* CMD param Formart for driver extra cmd handler */ -+struct drvextra_cmd_parm { -+ int ec_id; /* extra cmd id */ -+ int type; /* Can use this field as the type id or command size */ -+ int size; /* buffer size */ -+ unsigned char *pbuf; -+}; -+ -+/*------------------- Below are used for RF/BB tunning ---------------------*/ -+struct addBaReq_parm { -+ unsigned int tid; -+ u8 addr[ETH_ALEN]; -+}; -+ -+struct addBaRsp_parm { -+ unsigned int tid; -+ unsigned int start_seq; -+ u8 addr[ETH_ALEN]; -+ u8 status; -+ u8 size; -+}; -+ -+struct set_ch_parm { -+ u8 ch; -+ u8 bw; -+ u8 ch_offset; -+}; -+ -+struct SetChannelPlan_param { -+ enum regd_src_t regd_src; -+ const struct country_chplan *country_ent; -+ u8 channel_plan; -+}; -+ -+struct get_channel_plan_param { -+ struct get_chplan_resp **resp; -+}; -+ -+struct LedBlink_param { -+ void *pLed; -+}; -+ -+struct TDLSoption_param { -+ u8 addr[ETH_ALEN]; -+ u8 option; -+}; -+ -+struct RunInThread_param { -+ void (*func)(void *); -+ void *context; -+}; -+ -+ -+#define GEN_CMD_CODE(cmd) cmd ## _CMD_ -+ -+ -+/* -+ -+Result: -+0x00: success -+0x01: sucess, and check Response. -+0x02: cmd ignored due to duplicated sequcne number -+0x03: cmd dropped due to invalid cmd code -+0x04: reserved. -+ -+*/ -+ -+#define H2C_RSP_OFFSET 512 -+ -+#define H2C_SUCCESS 0x00 -+#define H2C_SUCCESS_RSP 0x01 -+#define H2C_DUPLICATED 0x02 -+#define H2C_DROPPED 0x03 -+#define H2C_PARAMETERS_ERROR 0x04 -+#define H2C_REJECTED 0x05 -+#define H2C_CMD_OVERFLOW 0x06 -+#define H2C_RESERVED 0x07 -+#define H2C_ENQ_HEAD 0x08 -+#define H2C_ENQ_HEAD_FAIL 0x09 -+#define H2C_CMD_FAIL 0x0A -+ -+void rtw_init_sitesurvey_parm(_adapter *padapter, struct sitesurvey_parm *pparm); -+u8 rtw_sitesurvey_cmd(_adapter *padapter, struct sitesurvey_parm *pparm); -+#ifdef CONFIG_AP_MODE -+u8 rtw_create_ibss_cmd(_adapter *adapter, int flags); -+u8 rtw_startbss_cmd(_adapter *adapter, int flags); -+#endif -+ -+#define REQ_CH_NONE -1 -+#define REQ_CH_INT_INFO -2 -+#define REQ_BW_NONE -1 -+#define REQ_BW_ORI -2 -+#define REQ_OFFSET_NONE -1 -+ -+struct sta_info; -+extern u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 key_type, bool enqueue); -+extern u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue); -+ -+extern u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork); -+u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, int flags); -+#ifdef CONFIG_AP_MODE -+u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags -+ , u8 ifbmp, u8 excl_ifbmp, s16 req_ch, s8 req_bw, s8 req_offset); -+u8 rtw_stop_ap_cmd(_adapter *adapter, u8 flags); -+#endif -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+u8 rtw_tx_control_cmd(_adapter *adapter); -+#endif -+extern u8 rtw_setopmode_cmd(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, u8 flags); -+ -+extern u8 rtw_addbareq_cmd(_adapter *padapter, u8 tid, u8 *addr); -+extern u8 rtw_addbarsp_cmd(_adapter *padapter, u8 *addr, u16 tid, u8 status, u8 size, u16 start_seq); -+/* add for CONFIG_IEEE80211W, none 11w also can use */ -+extern u8 rtw_reset_securitypriv_cmd(_adapter *padapter); -+extern u8 rtw_free_assoc_resources_cmd(_adapter *padapter, u8 lock_scanned_queue, int flags); -+extern u8 rtw_dynamic_chk_wk_cmd(_adapter *adapter); -+ -+u8 rtw_lps_ctrl_wk_cmd(_adapter *padapter, u8 lps_ctrl_type, u8 flags); -+u8 rtw_lps_ctrl_leave_set_level_cmd(_adapter *adapter, u8 lps_level, u8 flags); -+#ifdef CONFIG_LPS_1T1R -+u8 rtw_lps_ctrl_leave_set_1t1r_cmd(_adapter *adapter, u8 lps_1t1r, u8 flags); -+#endif -+u8 rtw_dm_in_lps_wk_cmd(_adapter *padapter); -+u8 rtw_lps_change_dtim_cmd(_adapter *padapter, u8 dtim); -+ -+#if (RATE_ADAPTIVE_SUPPORT == 1) -+u8 rtw_rpt_timer_cfg_cmd(_adapter *padapter, u16 minRptTime); -+#endif -+ -+#ifdef CONFIG_ANTENNA_DIVERSITY -+extern u8 rtw_antenna_select_cmd(_adapter *padapter, u8 antenna, u8 enqueue); -+#endif -+ -+u8 rtw_dm_ra_mask_wk_cmd(_adapter *padapter, u8 *psta); -+ -+extern u8 rtw_ps_cmd(_adapter *padapter); -+ -+#if CONFIG_DFS -+void rtw_dfs_ch_switch_hdl(struct dvobj_priv *dvobj); -+#endif -+ -+#ifdef CONFIG_AP_MODE -+u8 rtw_chk_hi_queue_cmd(_adapter *padapter); -+#ifdef CONFIG_DFS_MASTER -+u8 rtw_dfs_rd_cmd(_adapter *adapter, bool enqueue); -+void rtw_dfs_rd_timer_hdl(void *ctx); -+void rtw_dfs_rd_en_decision(_adapter *adapter, u8 mlme_act, u8 excl_ifbmp); -+u8 rtw_dfs_rd_en_decision_cmd(_adapter *adapter); -+#endif /* CONFIG_DFS_MASTER */ -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_BT_COEXIST -+u8 rtw_btinfo_cmd(PADAPTER padapter, u8 *pbuf, u16 length); -+u8 rtw_btc_reduce_wl_txpwr_cmd(_adapter *adapter, u32 val); -+#endif -+ -+u8 rtw_test_h2c_cmd(_adapter *adapter, u8 *buf, u8 len); -+ -+u8 rtw_enable_hw_update_tsf_cmd(_adapter *padapter); -+u8 rtw_periodic_tsf_update_end_cmd(_adapter *adapter); -+ -+u8 rtw_set_chbw_cmd(_adapter *padapter, u8 ch, u8 bw, u8 ch_offset, u8 flags); -+u8 rtw_iqk_cmd(_adapter *padapter, u8 flags); -+ -+u8 rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, u8 swconfig); -+u8 rtw_set_country_cmd(_adapter *adapter, int flags, const char *country_code, u8 swconfig); -+#ifdef CONFIG_REGD_SRC_FROM_OS -+u8 rtw_sync_os_regd_cmd(_adapter *adapter, int flags, const char *country_code, u8 dfs_region); -+#endif -+u8 rtw_get_chplan_cmd(_adapter *adapter, int flags, struct get_chplan_resp **resp); -+ -+extern u8 rtw_led_blink_cmd(_adapter *padapter, void *pLed); -+extern u8 rtw_set_csa_cmd(_adapter *adapter); -+extern u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option); -+ -+u8 rtw_mp_cmd(_adapter *adapter, u8 mp_cmd_id, u8 flags); -+ -+#ifdef CONFIG_RTW_CUSTOMER_STR -+u8 rtw_customer_str_req_cmd(_adapter *adapter); -+u8 rtw_customer_str_write_cmd(_adapter *adapter, const u8 *cstr); -+#endif -+ -+#ifdef CONFIG_FW_C2H_REG -+u8 rtw_c2h_reg_wk_cmd(_adapter *adapter, u8 *c2h_evt); -+#endif -+#ifdef CONFIG_FW_C2H_PKT -+u8 rtw_c2h_packet_wk_cmd(_adapter *adapter, u8 *c2h_evt, u16 length); -+#endif -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+#define RSON_SCAN_PROCESS 10 -+#define RSON_SCAN_DISABLE 11 -+u8 rtw_rson_scan_wk_cmd(_adapter *adapter, int op); -+#endif -+ -+u8 rtw_run_in_thread_cmd(_adapter *adapter, void (*func)(void *), void *context); -+u8 rtw_run_in_thread_cmd_wait(_adapter *adapter, void (*func)(void *), void *context, s32 timeout_ms); -+ -+struct ssmps_cmd_parm { -+ struct sta_info *sta; -+ u8 smps; -+}; -+u8 rtw_ssmps_wk_cmd(_adapter *adapter, struct sta_info *sta, u8 smps, u8 enqueue); -+ -+u8 session_tracker_chk_cmd(_adapter *adapter, struct sta_info *sta); -+u8 session_tracker_add_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port); -+u8 session_tracker_del_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port); -+ -+u8 set_txq_params_cmd(_adapter *adapter, u32 ac_parm, u8 ac_type); -+ -+#if defined(CONFIG_RTW_MESH) && defined(RTW_PER_CMD_SUPPORT_FW) -+u8 rtw_req_per_cmd(_adapter * adapter); -+#endif -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+u8 rtw_tbtx_chk_cmd(_adapter *adapter); -+u8 rtw_tbtx_token_dispatch_cmd(_adapter *adapter); -+#endif -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+struct txss_cmd_parm { -+ struct sta_info *sta; -+ bool tx_1ss; -+}; -+ -+void rtw_ctrl_txss_update_mimo_type(_adapter *adapter, struct sta_info *sta); -+u8 rtw_ctrl_txss(_adapter *adapter, struct sta_info *sta, bool tx_1ss); -+void rtw_ctrl_tx_ss_by_tp(_adapter *adapter, u8 from_timer); -+ -+#ifdef DBG_CTRL_TXSS -+void dbg_ctrl_txss(_adapter *adapter, bool tx_1ss); -+#endif -+#endif -+ -+u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf); -+ -+extern void rtw_survey_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); -+extern void rtw_disassoc_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); -+extern void rtw_joinbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); -+void rtw_create_ibss_post_hdl(_adapter *padapter, int status); -+extern void rtw_readtssi_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); -+ -+extern void rtw_setstaKey_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); -+extern void rtw_getrttbl_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); -+ -+enum rtw_cmd_id { -+ CMD_JOINBSS, /*0*/ -+ CMD_DISCONNECT, /*1*/ -+ CMD_CREATE_BSS,/*2*/ -+ CMD_SET_OPMODE, /*3*/ -+ CMD_SITE_SURVEY, /*4*/ -+ CMD_SET_AUTH, /*5*/ -+ CMD_SET_KEY, /*6*/ -+ CMD_SET_STAKEY, /*7*/ -+ CMD_ADD_BAREQ, /*8*/ -+ CMD_SET_CHANNEL, /*9*/ -+ CMD_TX_BEACON, /*10*/ -+ CMD_SET_MLME_EVT, /*11*/ -+ CMD_SET_DRV_EXTRA, /*12*/ -+ CMD_SET_CHANPLAN, /*13*/ -+ CMD_LEDBLINK, /*14*/ -+ CMD_SET_CHANSWITCH, /*15*/ -+ CMD_TDLS, /*16*/ -+ CMD_CHK_BMCSLEEPQ, /*17*/ -+ CMD_RUN_INTHREAD, /*18*/ -+ CMD_ADD_BARSP, /*19*/ -+ CMD_RM_POST_EVENT, /*20*/ -+ CMD_SET_MESH_PLINK_STATE, /* 21 */ -+ CMD_DO_IQK, /* 22 */ -+ CMD_GET_CHANPLAN, /*23*/ -+ CMD_ID_MAX -+}; -+ -+#define CMD_FMT "cmd=%d,%d,%d" -+#define CMD_ARG(cmd) \ -+ (cmd)->cmdcode, \ -+ (cmd)->cmdcode == CMD_SET_DRV_EXTRA ? ((struct drvextra_cmd_parm *)(cmd)->parmbuf)->ec_id : ((cmd)->cmdcode == CMD_SET_MLME_EVT ? ((struct rtw_evt_header *)(cmd)->parmbuf)->id : 0), \ -+ (cmd)->cmdcode == CMD_SET_DRV_EXTRA ? ((struct drvextra_cmd_parm *)(cmd)->parmbuf)->type : 0 -+ -+#endif /* _CMD_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_debug.h b/drivers/staging/rtl8723cs/include/rtw_debug.h -new file mode 100644 -index 000000000000..1ce9af3c9594 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_debug.h -@@ -0,0 +1,727 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_DEBUG_H__ -+#define __RTW_DEBUG_H__ -+ -+/* driver log level*/ -+enum { -+ _DRV_NONE_ = 0, -+ _DRV_ALWAYS_ = 1, -+ _DRV_ERR_ = 2, -+ _DRV_WARNING_ = 3, -+ _DRV_INFO_ = 4, -+ _DRV_DEBUG_ = 5, -+ _DRV_MAX_ = 6 -+}; -+ -+#define DRIVER_PREFIX "RTW: " -+ -+#ifdef PLATFORM_OS_CE -+extern void rtl871x_cedbg(const char *fmt, ...); -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ #define RTW_PRINT do {} while (0) -+ #define RTW_ERR do {} while (0) -+ #define RTW_WARN do {} while (0) -+ #define RTW_INFO do {} while (0) -+ #define RTW_DBG do {} while (0) -+ #define RTW_PRINT_SEL do {} while (0) -+ #define _RTW_PRINT do {} while (0) -+ #define _RTW_ERR do {} while (0) -+ #define _RTW_WARN do {} while (0) -+ #define _RTW_INFO do {} while (0) -+ #define _RTW_DBG do {} while (0) -+ #define _RTW_PRINT_SEL do {} while (0) -+#else -+ #define RTW_PRINT(x, ...) do {} while (0) -+ #define RTW_ERR(x, ...) do {} while (0) -+ #define RTW_WARN(x,...) do {} while (0) -+ #define RTW_INFO(x,...) do {} while (0) -+ #define RTW_DBG(x,...) do {} while (0) -+ #define RTW_PRINT_SEL(x,...) do {} while (0) -+ #define _RTW_PRINT(x, ...) do {} while (0) -+ #define _RTW_ERR(x, ...) do {} while (0) -+ #define _RTW_WARN(x,...) do {} while (0) -+ #define _RTW_INFO(x,...) do {} while (0) -+ #define _RTW_DBG(x,...) do {} while (0) -+ #define _RTW_PRINT_SEL(x,...) do {} while (0) -+#endif -+ -+#define RTW_INFO_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0) -+#define RTW_DBG_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0) -+#define RTW_PRINT_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0) -+ -+#define RTW_DBG_EXPR(EXPR) do {} while (0) -+ -+#define RTW_DBGDUMP 0 /* 'stream' for _dbgdump */ -+ -+ -+ -+#undef _dbgdump -+#undef _seqdump -+ -+#if defined(PLATFORM_WINDOWS) && defined(PLATFORM_OS_XP) -+ #define _dbgdump DbgPrint -+ #define KERN_CONT -+ #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) -+#elif defined(PLATFORM_WINDOWS) && defined(PLATFORM_OS_CE) -+ #define _dbgdump rtl871x_cedbg -+ #define KERN_CONT -+ #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) -+#elif defined PLATFORM_LINUX -+ #define _dbgdump printk -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) -+ #define KERN_CONT -+ #endif -+ #define _seqdump seq_printf -+#elif defined PLATFORM_FREEBSD -+ #define _dbgdump printf -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) -+ #define KERN_CONT -+ #endif -+ #define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg) -+#endif -+ -+void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring, -+ bool _idx_show, const u8 *_hexdata, int _hexdatalen); -+ -+#ifdef CONFIG_RTW_DEBUG -+ -+#ifndef _OS_INTFS_C_ -+extern uint rtw_drv_log_level; -+#endif -+ -+#if defined(_dbgdump) -+ -+#ifdef PLATFORM_LINUX -+#ifdef DBG_THREAD_PID -+#define T_PID_FMT "(%5u) " -+#define T_PID_ARG current->pid -+#else /* !DBG_THREAD_PID */ -+#define T_PID_FMT "%s" -+#define T_PID_ARG "" -+#endif /* !DBG_THREAD_PID */ -+ -+#ifdef DBG_CPU_INFO -+#define CPU_INFO_FMT "[%u] " -+#define CPU_INFO_ARG get_cpu() -+#else /* !DBG_CPU_INFO */ -+#define CPU_INFO_FMT "%s" -+#define CPU_INFO_ARG "" -+#endif /* !DBG_CPU_INFO */ -+ -+/* Extra information in prefix */ -+#define EX_INFO_FMT T_PID_FMT CPU_INFO_FMT -+#define EX_INFO_ARG T_PID_ARG, CPU_INFO_ARG -+#else /* !PLATFORM_LINUX */ -+#define EX_INFO_FMT "%s" -+#define EX_INFO_ARG "" -+#endif /* !PLATFORM_LINUX */ -+ -+#define DBG_PREFIX EX_INFO_FMT DRIVER_PREFIX -+#define DBG_PREFIX_ARG EX_INFO_ARG -+ -+/* with driver-defined prefix */ -+#undef RTW_PRINT -+#define RTW_PRINT(fmt, arg...) \ -+ do {\ -+ if (_DRV_ALWAYS_ <= rtw_drv_log_level) {\ -+ _dbgdump(DBG_PREFIX fmt, DBG_PREFIX_ARG, ##arg);\ -+ } \ -+ } while (0) -+ -+#undef RTW_ERR -+#define RTW_ERR(fmt, arg...) \ -+ do {\ -+ if (_DRV_ERR_ <= rtw_drv_log_level) {\ -+ _dbgdump(DBG_PREFIX "ERROR " fmt, \ -+ DBG_PREFIX_ARG, ##arg);\ -+ } \ -+ } while (0) -+ -+ -+#undef RTW_WARN -+#define RTW_WARN(fmt, arg...) \ -+ do {\ -+ if (_DRV_WARNING_ <= rtw_drv_log_level) {\ -+ _dbgdump(DBG_PREFIX "WARN " fmt, \ -+ DBG_PREFIX_ARG, ##arg);\ -+ } \ -+ } while (0) -+ -+#undef RTW_INFO -+#define RTW_INFO(fmt, arg...) \ -+ do {\ -+ if (_DRV_INFO_ <= rtw_drv_log_level) {\ -+ _dbgdump(DBG_PREFIX fmt, DBG_PREFIX_ARG, ##arg);\ -+ } \ -+ } while (0) -+ -+ -+#undef RTW_DBG -+#define RTW_DBG(fmt, arg...) \ -+ do {\ -+ if (_DRV_DEBUG_ <= rtw_drv_log_level) {\ -+ _dbgdump(DBG_PREFIX fmt, DBG_PREFIX_ARG, ##arg);\ -+ } \ -+ } while (0) -+ -+#undef RTW_INFO_DUMP -+#define RTW_INFO_DUMP(_TitleString, _HexData, _HexDataLen) \ -+ RTW_BUF_DUMP_SEL(_DRV_INFO_, RTW_DBGDUMP, _TitleString, _FALSE, _HexData, _HexDataLen) -+ -+#undef RTW_DBG_DUMP -+#define RTW_DBG_DUMP(_TitleString, _HexData, _HexDataLen) \ -+ RTW_BUF_DUMP_SEL(_DRV_DEBUG_, RTW_DBGDUMP, _TitleString, _FALSE, _HexData, _HexDataLen) -+ -+ -+#undef RTW_PRINT_DUMP -+#define RTW_PRINT_DUMP(_TitleString, _HexData, _HexDataLen) \ -+ RTW_BUF_DUMP_SEL(_DRV_ALWAYS_, RTW_DBGDUMP, _TitleString, _FALSE, _HexData, _HexDataLen) -+ -+/* without driver-defined prefix */ -+#undef _RTW_PRINT -+#define _RTW_PRINT(fmt, arg...) \ -+ do {\ -+ if (_DRV_ALWAYS_ <= rtw_drv_log_level) {\ -+ _dbgdump(KERN_CONT fmt, ##arg);\ -+ } \ -+ } while (0) -+ -+#undef _RTW_ERR -+#define _RTW_ERR(fmt, arg...) \ -+ do {\ -+ if (_DRV_ERR_ <= rtw_drv_log_level) {\ -+ _dbgdump(KERN_CONT fmt, ##arg);\ -+ } \ -+ } while (0) -+ -+ -+#undef _RTW_WARN -+#define _RTW_WARN(fmt, arg...) \ -+ do {\ -+ if (_DRV_WARNING_ <= rtw_drv_log_level) {\ -+ _dbgdump(KERN_CONT fmt, ##arg);\ -+ } \ -+ } while (0) -+ -+#undef _RTW_INFO -+#define _RTW_INFO(fmt, arg...) \ -+ do {\ -+ if (_DRV_INFO_ <= rtw_drv_log_level) {\ -+ _dbgdump(KERN_CONT fmt, ##arg);\ -+ } \ -+ } while (0) -+ -+#undef _RTW_DBG -+#define _RTW_DBG(fmt, arg...) \ -+ do {\ -+ if (_DRV_DEBUG_ <= rtw_drv_log_level) {\ -+ _dbgdump(KERN_CONT fmt, ##arg);\ -+ } \ -+ } while (0) -+ -+ -+/* other debug APIs */ -+#undef RTW_DBG_EXPR -+#define RTW_DBG_EXPR(EXPR) do { if (_DRV_DEBUG_ <= rtw_drv_log_level) EXPR; } while (0) -+ -+#endif /* defined(_dbgdump) */ -+#endif /* CONFIG_RTW_DEBUG */ -+ -+ -+#if defined(_seqdump) -+/* dump message to selected 'stream' with driver-defined prefix */ -+#undef RTW_PRINT_SEL -+#define RTW_PRINT_SEL(sel, fmt, arg...) \ -+ do {\ -+ if (sel == RTW_DBGDUMP)\ -+ RTW_PRINT(fmt, ##arg); \ -+ else {\ -+ _seqdump(sel, fmt, ##arg) /*rtw_warn_on(1)*/; \ -+ } \ -+ } while (0) -+ -+/* dump message to selected 'stream' */ -+#undef _RTW_PRINT_SEL -+#define _RTW_PRINT_SEL(sel, fmt, arg...) \ -+ do {\ -+ if (sel == RTW_DBGDUMP)\ -+ _RTW_PRINT(fmt, ##arg); \ -+ else {\ -+ _seqdump(sel, fmt, ##arg) /*rtw_warn_on(1)*/; \ -+ } \ -+ } while (0) -+ -+/* dump message to selected 'stream' */ -+#undef RTW_DUMP_SEL -+#define RTW_DUMP_SEL(sel, _HexData, _HexDataLen) \ -+ RTW_BUF_DUMP_SEL(_DRV_ALWAYS_, sel, NULL, _FALSE, _HexData, _HexDataLen) -+ -+#define RTW_MAP_DUMP_SEL(sel, _TitleString, _HexData, _HexDataLen) \ -+ RTW_BUF_DUMP_SEL(_DRV_ALWAYS_, sel, _TitleString, _TRUE, _HexData, _HexDataLen) -+#endif /* defined(_seqdump) */ -+ -+ -+#ifdef CONFIG_DBG_COUNTER -+ #define DBG_COUNTER(counter) counter++ -+#else -+ #define DBG_COUNTER(counter) -+#endif -+ -+void dump_drv_version(void *sel); -+void dump_log_level(void *sel); -+ -+#ifdef CONFIG_SDIO_HCI -+void sd_f0_reg_dump(void *sel, _adapter *adapter); -+void sdio_local_reg_dump(void *sel, _adapter *adapter); -+#endif /* CONFIG_SDIO_HCI */ -+ -+void mac_reg_dump(void *sel, _adapter *adapter); -+void bb_reg_dump(void *sel, _adapter *adapter); -+void bb_reg_dump_ex(void *sel, _adapter *adapter); -+void rf_reg_dump(void *sel, _adapter *adapter); -+ -+void rtw_sink_rtp_seq_dbg(_adapter *adapter, u8 *ehdr_pos); -+ -+struct sta_info; -+void sta_rx_reorder_ctl_dump(void *sel, struct sta_info *sta); -+ -+struct dvobj_priv; -+void dump_tx_rate_bmp(void *sel, struct dvobj_priv *dvobj); -+void dump_adapters_status(void *sel, struct dvobj_priv *dvobj); -+ -+struct sec_cam_ent; -+#if defined(CONFIG_RTW_DEBUG) || defined(CONFIG_PROC_DEBUG) -+void dump_sec_cam_ent(void *sel, struct sec_cam_ent *ent, int id); -+void dump_sec_cam_ent_title(void *sel, u8 has_id); -+#endif -+void dump_sec_cam(void *sel, _adapter *adapter); -+void dump_sec_cam_cache(void *sel, _adapter *adapter); -+ -+bool rtw_fwdl_test_trigger_chksum_fail(void); -+bool rtw_fwdl_test_trigger_wintint_rdy_fail(void); -+bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void); -+u32 rtw_get_wait_hiq_empty_ms(void); -+void rtw_sta_linking_test_set_start(void); -+bool rtw_sta_linking_test_wait_done(void); -+bool rtw_sta_linking_test_force_fail(void); -+#ifdef CONFIG_AP_MODE -+u16 rtw_ap_linking_test_force_auth_fail(void); -+u16 rtw_ap_linking_test_force_asoc_fail(void); -+#endif -+ -+#ifdef CONFIG_PROC_DEBUG -+ssize_t proc_set_write_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_read_reg(struct seq_file *m, void *v); -+ssize_t proc_set_read_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+void dump_drv_cfg(void *sel); -+int proc_get_fwstate(struct seq_file *m, void *v); -+int proc_get_sec_info(struct seq_file *m, void *v); -+int proc_get_mlmext_state(struct seq_file *m, void *v); -+#ifdef CONFIG_LAYER2_ROAMING -+int proc_get_roam_flags(struct seq_file *m, void *v); -+ssize_t proc_set_roam_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_roam_param(struct seq_file *m, void *v); -+ssize_t proc_set_roam_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_roam_tgt_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif /* CONFIG_LAYER2_ROAMING */ -+int proc_get_qos_option(struct seq_file *m, void *v); -+int proc_get_ht_option(struct seq_file *m, void *v); -+int proc_get_rf_info(struct seq_file *m, void *v); -+int proc_get_scan_param(struct seq_file *m, void *v); -+ssize_t proc_set_scan_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_scan_abort(struct seq_file *m, void *v); -+#ifdef CONFIG_RTW_REPEATER_SON -+int proc_get_rson_data(struct seq_file *m, void *v); -+ssize_t proc_set_rson_data(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+int proc_get_survey_info(struct seq_file *m, void *v); -+ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_ap_info(struct seq_file *m, void *v); -+#ifdef ROKU_PRIVATE -+int proc_get_infra_ap(struct seq_file *m, void *v); -+#endif /* ROKU_PRIVATE */ -+ssize_t proc_reset_trx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_trx_info(struct seq_file *m, void *v); -+ssize_t proc_set_tx_power_offset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_tx_power_offset(struct seq_file *m, void *v); -+int proc_get_rate_ctl(struct seq_file *m, void *v); -+int proc_get_wifi_spec(struct seq_file *m, void *v); -+ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_bw_ctl(struct seq_file *m, void *v); -+ssize_t proc_set_bw_ctl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#ifdef DBG_RX_COUNTER_DUMP -+int proc_get_rx_cnt_dump(struct seq_file *m, void *v); -+ssize_t proc_set_rx_cnt_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+ -+#ifdef CONFIG_AP_MODE -+int proc_get_bmc_tx_rate(struct seq_file *m, void *v); -+ssize_t proc_set_bmc_tx_rate(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif /*CONFIG_AP_MODE*/ -+ -+int proc_get_ps_dbg_info(struct seq_file *m, void *v); -+ssize_t proc_set_ps_dbg_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#ifdef CONFIG_AP_MODE -+ssize_t proc_set_ap_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+ -+int proc_get_rx_stat(struct seq_file *m, void *v); -+int proc_get_tx_stat(struct seq_file *m, void *v); -+#ifdef CONFIG_AP_MODE -+int proc_get_all_sta_info(struct seq_file *m, void *v); -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef DBG_MEMORY_LEAK -+int proc_get_malloc_cnt(struct seq_file *m, void *v); -+#endif /* DBG_MEMORY_LEAK */ -+ -+#ifdef CONFIG_FIND_BEST_CHANNEL -+int proc_get_best_channel(struct seq_file *m, void *v); -+ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif /* CONFIG_FIND_BEST_CHANNEL */ -+ -+int proc_get_trx_info_debug(struct seq_file *m, void *v); -+ -+#ifdef CONFIG_HUAWEI_PROC -+int proc_get_huawei_trx_info(struct seq_file *m, void *v); -+#endif -+ -+int proc_get_rx_signal(struct seq_file *m, void *v); -+ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_hw_status(struct seq_file *m, void *v); -+ssize_t proc_set_hw_status(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_mac_rptbuf(struct seq_file *m, void *v); -+ -+#ifdef CONFIG_80211N_HT -+int proc_get_ht_enable(struct seq_file *m, void *v); -+ssize_t proc_set_ht_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+int proc_get_bw_mode(struct seq_file *m, void *v); -+ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+int proc_get_ampdu_enable(struct seq_file *m, void *v); -+ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+void dump_regsty_rx_ampdu_size_limit(void *sel, _adapter *adapter); -+int proc_get_rx_ampdu(struct seq_file *m, void *v); -+ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+void rtw_dump_dft_phy_cap(void *sel, _adapter *adapter); -+void rtw_get_dft_phy_cap(void *sel, _adapter *adapter); -+void rtw_dump_drv_phy_cap(void *sel, _adapter *adapter); -+ -+int proc_get_rx_stbc(struct seq_file *m, void *v); -+ssize_t proc_set_rx_stbc(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_stbc_cap(struct seq_file *m, void *v); -+ssize_t proc_set_stbc_cap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_ldpc_cap(struct seq_file *m, void *v); -+ssize_t proc_set_ldpc_cap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#ifdef CONFIG_BEAMFORMING -+int proc_get_txbf_cap(struct seq_file *m, void *v); -+ssize_t proc_set_txbf_cap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+int proc_get_tx_aval_th(struct seq_file *m, void *v); -+ssize_t proc_set_tx_aval_th(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif /*CONFIG_SDIO_TX_ENABLE_AVAL_INT*/ -+int proc_get_rx_ampdu_factor(struct seq_file *m, void *v); -+ssize_t proc_set_rx_ampdu_factor(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+int proc_get_tx_max_agg_num(struct seq_file *m, void *v); -+ssize_t proc_set_tx_max_agg_num(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+int proc_get_rx_ampdu_density(struct seq_file *m, void *v); -+ssize_t proc_set_rx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+int proc_get_tx_ampdu_density(struct seq_file *m, void *v); -+ssize_t proc_set_tx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+int proc_get_tx_quick_addba_req(struct seq_file *m, void *v); -+ssize_t proc_set_tx_quick_addba_req(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#ifdef CONFIG_TX_AMSDU -+int proc_get_tx_amsdu(struct seq_file *m, void *v); -+ssize_t proc_set_tx_amsdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_tx_amsdu_rate(struct seq_file *m, void *v); -+ssize_t proc_set_tx_amsdu_rate(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_80211AC_VHT -+int proc_get_vht_24g_enable(struct seq_file *m, void *v); -+ssize_t proc_set_vht_24g_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+ -+ssize_t proc_set_dyn_rrsr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_dyn_rrsr(struct seq_file *m, void *v); -+ -+int proc_get_en_fwps(struct seq_file *m, void *v); -+ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+#if 0 -+int proc_get_two_path_rssi(struct seq_file *m, void *v); -+int proc_get_rssi_disp(struct seq_file *m, void *v); -+ssize_t proc_set_rssi_disp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+int proc_get_btcoex_dbg(struct seq_file *m, void *v); -+ssize_t proc_set_btcoex_dbg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_btcoex_info(struct seq_file *m, void *v); -+#ifdef CONFIG_RF4CE_COEXIST -+int proc_get_rf4ce_state(struct seq_file *m, void *v); -+ssize_t proc_set_rf4ce_state(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+#endif /* CONFIG_BT_COEXIST */ -+ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+int proc_get_sreset(struct seq_file *m, void *v); -+ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif /* DBG_CONFIG_ERROR_DETECT */ -+ -+int proc_get_odm_adaptivity(struct seq_file *m, void *v); -+ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+#ifdef CONFIG_DBG_COUNTER -+int proc_get_rx_logs(struct seq_file *m, void *v); -+int proc_get_tx_logs(struct seq_file *m, void *v); -+int proc_get_int_logs(struct seq_file *m, void *v); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+int proc_get_rx_ring(struct seq_file *m, void *v); -+int proc_get_tx_ring(struct seq_file *m, void *v); -+int proc_get_pci_aspm(struct seq_file *m, void *v); -+int proc_get_pci_conf_space(struct seq_file *m, void *v); -+ssize_t proc_set_pci_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+int proc_get_pci_bridge_conf_space(struct seq_file *m, void *v); -+ssize_t proc_set_pci_bridge_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+ -+#ifdef DBG_TXBD_DESC_DUMP -+int proc_get_tx_ring_ext(struct seq_file *m, void *v); -+ssize_t proc_set_tx_ring_ext(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+#endif -+ -+#ifdef CONFIG_WOWLAN -+int proc_get_wow_enable(struct seq_file *m, void *v); -+ssize_t proc_set_wow_enable(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data); -+int proc_get_pattern_info(struct seq_file *m, void *v); -+ssize_t proc_set_pattern_info(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data); -+int proc_get_wakeup_event(struct seq_file *m, void *v); -+ssize_t proc_set_wakeup_event(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data); -+int proc_get_wakeup_reason(struct seq_file *m, void *v); -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+int proc_dump_wow_keep_alive_info(struct seq_file *m, void *v); -+#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+#endif -+ -+#ifdef CONFIG_WAR_OFFLOAD -+int proc_get_war_offload_enable(struct seq_file *m, void *v); -+ssize_t proc_set_war_offload_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_war_offload_ipv4_addr(struct seq_file *m, void *v); -+ssize_t proc_set_war_offload_ipv4_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_war_offload_ipv6_addr(struct seq_file *m, void *v); -+ssize_t proc_set_war_offload_ipv6_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_war_offload_mdns_domain_name(struct seq_file *m, void *v); -+ssize_t proc_set_war_offload_mdns_domain_name(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_war_offload_mdns_machine_name(struct seq_file *m, void *v); -+ssize_t proc_set_war_offload_mdns_machine_name(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_war_offload_mdns_txt_rsp(struct seq_file *m, void *v); -+ssize_t proc_set_war_offload_mdns_txt_rsp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_war_offload_mdns_service_info(struct seq_file *m, void *v); -+ssize_t proc_set_war_offload_mdns_service_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+ -+#ifdef CONFIG_GPIO_WAKEUP -+int proc_get_wowlan_gpio_info(struct seq_file *m, void *v); -+ssize_t proc_set_wowlan_gpio_info(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data); -+#endif /*CONFIG_GPIO_WAKEUP*/ -+ -+#ifdef CONFIG_P2P_WOWLAN -+int proc_get_p2p_wowlan_info(struct seq_file *m, void *v); -+#endif /* CONFIG_P2P_WOWLAN */ -+ -+int proc_get_new_bcn_max(struct seq_file *m, void *v); -+ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+#ifdef CONFIG_POWER_SAVING -+int proc_get_ps_info(struct seq_file *m, void *v); -+ssize_t proc_set_ps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#ifdef CONFIG_WMMPS_STA -+int proc_get_wmmps_info(struct seq_file *m, void *v); -+ssize_t proc_set_wmmps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif /* CONFIG_WMMPS_STA */ -+#endif /* CONFIG_POWER_SAVING */ -+ -+#ifdef CONFIG_TDLS -+int proc_get_tdls_enable(struct seq_file *m, void *v); -+ssize_t proc_set_tdls_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_tdls_info(struct seq_file *m, void *v); -+#endif -+ -+int proc_get_monitor(struct seq_file *m, void *v); -+ssize_t proc_set_monitor(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+#ifdef RTW_SIMPLE_CONFIG -+int proc_get_simple_config(struct seq_file *m, void *v); -+ssize_t proc_set_simple_config(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+ -+#ifdef DBG_XMIT_BLOCK -+int proc_get_xmit_block(struct seq_file *m, void *v); -+ssize_t proc_set_xmit_block(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+ -+#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+int proc_get_rtkm_info(struct seq_file *m, void *v); -+#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ -+ -+#ifdef CONFIG_IEEE80211W -+ssize_t proc_set_tx_sa_query(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_tx_sa_query(struct seq_file *m, void *v); -+ssize_t proc_set_tx_deauth(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_tx_deauth(struct seq_file *m, void *v); -+ssize_t proc_set_tx_auth(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_tx_auth(struct seq_file *m, void *v); -+#endif /* CONFIG_IEEE80211W */ -+ -+#endif /* CONFIG_PROC_DEBUG */ -+ -+int proc_get_efuse_map(struct seq_file *m, void *v); -+ssize_t proc_set_efuse_map(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA -+int proc_get_pathb_phase(struct seq_file *m, void *v); -+ssize_t proc_set_pathb_phase(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+ -+#ifdef CONFIG_MCC_MODE -+int proc_get_mcc_info(struct seq_file *m, void *v); -+ssize_t proc_set_mcc_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_mcc_duration(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ssize_t proc_set_mcc_phydm_offload_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif -+ssize_t proc_set_mcc_single_tx_criteria(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_mcc_ap_bw20_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_mcc_ap_bw40_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_mcc_ap_bw80_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_mcc_sta_bw20_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_mcc_sta_bw40_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ssize_t proc_set_mcc_sta_bw80_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_mcc_policy_table(struct seq_file *m, void *v); -+#endif /* CONFIG_MCC_MODE */ -+ -+int proc_get_ack_timeout(struct seq_file *m, void *v); -+ssize_t proc_set_ack_timeout(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+int proc_get_fw_offload(struct seq_file *m, void *v); -+ssize_t proc_set_fw_offload(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+#ifdef CONFIG_FW_HANDLE_TXBCN -+ssize_t proc_set_fw_tbtt_rpt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_fw_tbtt_rpt(struct seq_file *m, void *v); -+#endif -+ -+#ifdef CONFIG_DBG_RF_CAL -+int proc_get_iqk_info(struct seq_file *m, void *v); -+ssize_t proc_set_iqk(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_lck_info(struct seq_file *m, void *v); -+ssize_t proc_set_lck(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+#endif /*CONFIG_DBG_RF_CAL*/ -+ -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+ssize_t proc_set_txss_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_txss_tp(struct seq_file *m, void *v); -+#ifdef DBG_CTRL_TXSS -+ssize_t proc_set_txss_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_txss_ctrl(struct seq_file *m, void *v); -+#endif -+#endif -+ -+#ifdef CONFIG_LPS_CHK_BY_TP -+ssize_t proc_set_lps_chk_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_lps_chk_tp(struct seq_file *m, void *v); -+#endif -+ -+#ifdef CONFIG_SUPPORT_STATIC_SMPS -+ssize_t proc_set_smps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+int proc_get_smps(struct seq_file *m, void *v); -+#endif -+ -+int proc_get_defs_param(struct seq_file *m, void *v); -+ssize_t proc_set_defs_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+ -+#define _drv_always_ 1 -+#define _drv_emerg_ 2 -+#define _drv_alert_ 3 -+#define _drv_crit_ 4 -+#define _drv_err_ 5 -+#define _drv_warning_ 6 -+#define _drv_notice_ 7 -+#define _drv_info_ 8 -+#define _drv_dump_ 9 -+#define _drv_debug_ 10 -+ -+#define _module_rtl871x_xmit_c_ BIT(0) -+#define _module_xmit_osdep_c_ BIT(1) -+#define _module_rtl871x_recv_c_ BIT(2) -+#define _module_recv_osdep_c_ BIT(3) -+#define _module_rtl871x_mlme_c_ BIT(4) -+#define _module_mlme_osdep_c_ BIT(5) -+#define _module_rtl871x_sta_mgt_c_ BIT(6) -+#define _module_rtl871x_cmd_c_ BIT(7) -+#define _module_cmd_osdep_c_ BIT(8) -+#define _module_rtl871x_io_c_ BIT(9) -+#define _module_io_osdep_c_ BIT(10) -+#define _module_os_intfs_c_ BIT(11) -+#define _module_rtl871x_security_c_ BIT(12) -+#define _module_rtl871x_eeprom_c_ BIT(13) -+#define _module_hal_init_c_ BIT(14) -+#define _module_hci_hal_init_c_ BIT(15) -+#define _module_rtl871x_ioctl_c_ BIT(16) -+#define _module_rtl871x_ioctl_set_c_ BIT(17) -+#define _module_rtl871x_ioctl_query_c_ BIT(18) -+#define _module_rtl871x_pwrctrl_c_ BIT(19) -+#define _module_hci_intfs_c_ BIT(20) -+#define _module_hci_ops_c_ BIT(21) -+#define _module_osdep_service_c_ BIT(22) -+#define _module_mp_ BIT(23) -+#define _module_hci_ops_os_c_ BIT(24) -+#define _module_rtl871x_ioctl_os_c BIT(25) -+#define _module_rtl8712_cmd_c_ BIT(26) -+/* #define _module_efuse_ BIT(27) */ -+#define _module_rtl8192c_xmit_c_ BIT(28) -+#define _module_hal_xmit_c_ BIT(28) -+#define _module_efuse_ BIT(29) -+#define _module_rtl8712_recv_c_ BIT(30) -+#define _module_rtl8712_led_c_ BIT(31) -+ -+#endif /* __RTW_DEBUG_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_eeprom.h b/drivers/staging/rtl8723cs/include/rtw_eeprom.h -new file mode 100644 -index 000000000000..62304d577f38 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_eeprom.h -@@ -0,0 +1,116 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_EEPROM_H__ -+#define __RTW_EEPROM_H__ -+ -+ -+#define RTL8712_EEPROM_ID 0x8712 -+/* #define EEPROM_MAX_SIZE 256 */ -+ -+#define HWSET_MAX_SIZE_128 128 -+#define HWSET_MAX_SIZE_256 256 -+#define HWSET_MAX_SIZE_512 512 -+#define HWSET_MAX_SIZE_1024 1024 -+ -+#define EEPROM_MAX_SIZE HWSET_MAX_SIZE_1024 -+ -+#define CLOCK_RATE 50 /* 100us */ -+ -+/* - EEPROM opcodes */ -+#define EEPROM_READ_OPCODE 06 -+#define EEPROM_WRITE_OPCODE 05 -+#define EEPROM_ERASE_OPCODE 07 -+#define EEPROM_EWEN_OPCODE 19 /* Erase/write enable */ -+#define EEPROM_EWDS_OPCODE 16 /* Erase/write disable */ -+ -+/* Country codes */ -+#define USA 0x555320 -+#define EUROPE 0x1 /* temp, should be provided later */ -+#define JAPAN 0x2 /* temp, should be provided later */ -+ -+/* -+ * Customer ID, note that: -+ * This variable is initiailzed through EEPROM or registry, -+ * however, its definition may be different with that in EEPROM for -+ * EEPROM size consideration. So, we have to perform proper translation between them. -+ * Besides, CustomerID of registry has precedence of that of EEPROM. -+ * defined below. 060703, by rcnjko. -+ * */ -+typedef enum _RT_CUSTOMER_ID { -+ RT_CID_DEFAULT = 0, -+ RT_CID_8187_ALPHA0 = 1, -+ RT_CID_8187_SERCOMM_PS = 2, -+ RT_CID_8187_HW_LED = 3, -+ RT_CID_8187_NETGEAR = 4, -+ RT_CID_WHQL = 5, -+ RT_CID_819x_CAMEO = 6, -+ RT_CID_819x_RUNTOP = 7, -+ RT_CID_819x_Senao = 8, -+ RT_CID_TOSHIBA = 9, /* Merge by Jacken, 2008/01/31. */ -+ RT_CID_819x_Netcore = 10, -+ RT_CID_Nettronix = 11, -+ RT_CID_DLINK = 12, -+ RT_CID_PRONET = 13, -+ RT_CID_COREGA = 14, -+ RT_CID_CHINA_MOBILE = 15, -+ RT_CID_819x_ALPHA = 16, -+ RT_CID_819x_Sitecom = 17, -+ RT_CID_CCX = 18, /* It's set under CCX logo test and isn't demanded for CCX functions, but for test behavior like retry limit and tx report. By Bruce, 2009-02-17. */ -+ RT_CID_819X_LENOVO = 19, -+ RT_CID_819x_QMI = 20, -+ RT_CID_819x_Edimax_Belkin = 21, -+ RT_CID_819x_Sercomm_Belkin = 22, -+ RT_CID_819x_CAMEO1 = 23, -+ RT_CID_819x_MSI = 24, -+ RT_CID_819X_ACER = 25, -+ RT_CID_819x_AzWave_ASUS = 26, -+ RT_CID_819x_AzWave = 27, /* For AzWave in PCIe, The ID is AzWave use and not only Asus */ -+ RT_CID_819x_HP = 28, -+ RT_CID_819x_WNC_COREGA = 29, -+ RT_CID_819x_Arcadyan_Belkin = 30, -+ RT_CID_819x_SAMSUNG = 31, -+ RT_CID_819x_CLEVO = 32, -+ RT_CID_819x_DELL = 33, -+ RT_CID_819x_PRONETS = 34, -+ RT_CID_819x_Edimax_ASUS = 35, -+ RT_CID_NETGEAR = 36, -+ RT_CID_PLANEX = 37, -+ RT_CID_CC_C = 38, -+ RT_CID_819x_Xavi = 39, -+ RT_CID_LENOVO_CHINA = 40, -+ RT_CID_INTEL_CHINA = 41, -+ RT_CID_TPLINK_HPWR = 42, -+ RT_CID_819x_Sercomm_Netgear = 43, -+ RT_CID_819x_ALPHA_Dlink = 44,/* add by ylb 20121012 for customer led for alpha */ -+ RT_CID_WNC_NEC = 45,/* add by page for NEC */ -+ RT_CID_DNI_BUFFALO = 46,/* add by page for NEC */ -+} RT_CUSTOMER_ID, *PRT_CUSTOMER_ID; -+ -+extern void eeprom_write16(_adapter *padapter, u16 reg, u16 data); -+extern u16 eeprom_read16(_adapter *padapter, u16 reg); -+extern void read_eeprom_content(_adapter *padapter); -+extern void eeprom_read_sz(_adapter *padapter, u16 reg, u8 *data, u32 sz); -+ -+extern void read_eeprom_content_by_attrib(_adapter *padapter); -+ -+#ifdef PLATFORM_LINUX -+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE -+extern int isAdaptorInfoFileValid(void); -+extern int storeAdaptorInfoFile(char *path, u8 *efuse_data); -+extern int retriveAdaptorInfoFile(char *path, u8 *efuse_data); -+#endif /* CONFIG_ADAPTOR_INFO_CACHING_FILE */ -+#endif /* PLATFORM_LINUX */ -+ -+#endif /* __RTL871X_EEPROM_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_efuse.h b/drivers/staging/rtl8723cs/include/rtw_efuse.h -new file mode 100644 -index 000000000000..9a07d27a4a3b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_efuse.h -@@ -0,0 +1,285 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_EFUSE_H__ -+#define __RTW_EFUSE_H__ -+ -+ -+#define EFUSE_ERROE_HANDLE 1 -+ -+#define PG_STATE_HEADER 0x01 -+#define PG_STATE_WORD_0 0x02 -+#define PG_STATE_WORD_1 0x04 -+#define PG_STATE_WORD_2 0x08 -+#define PG_STATE_WORD_3 0x10 -+#define PG_STATE_DATA 0x20 -+ -+#define PG_SWBYTE_H 0x01 -+#define PG_SWBYTE_L 0x02 -+ -+#define PGPKT_DATA_SIZE 8 -+ -+#define EFUSE_WIFI 0 -+#define EFUSE_BT 1 -+ -+enum _EFUSE_DEF_TYPE { -+ TYPE_EFUSE_MAX_SECTION = 0, -+ TYPE_EFUSE_REAL_CONTENT_LEN = 1, -+ TYPE_AVAILABLE_EFUSE_BYTES_BANK = 2, -+ TYPE_AVAILABLE_EFUSE_BYTES_TOTAL = 3, -+ TYPE_EFUSE_MAP_LEN = 4, -+ TYPE_EFUSE_PROTECT_BYTES_BANK = 5, -+ TYPE_EFUSE_CONTENT_LEN_BANK = 6, -+}; -+ -+#define EFUSE_MAX_MAP_LEN 1024 -+ -+#define EFUSE_MAX_HW_SIZE 1024 -+#define EFUSE_MAX_SECTION_BASE 16 -+#define EFUSE_MAX_SECTION_NUM 128 -+#define EFUSE_MAX_BANK_SIZE 512 -+ -+/*RTL8822B 8821C BT EFUSE Define 1 BANK 128 size logical map 1024*/ -+#ifdef RTW_HALMAC -+#define BANK_NUM 1 -+#if defined(CONFIG_RTL8723F) -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 -+#else -+#define EFUSE_BT_REAL_BANK_CONTENT_LEN 128 -+#endif -+ -+#define EFUSE_BT_REAL_CONTENT_LEN (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM) -+#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -+#define EFUSE_BT_MAX_SECTION (EFUSE_BT_MAP_LEN / 8) -+ -+#if defined(CONFIG_RTL8822C) -+#define EFUSE_PROTECT_BYTES_BANK 54 -+#elif defined(CONFIG_RTL8723F) -+#define EFUSE_PROTECT_BYTES_BANK 40 -+#else -+#define EFUSE_PROTECT_BYTES_BANK 16 -+#endif -+#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_BT_REAL_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK) -+#endif /* #ifdef RTW_HALMAC */ -+ -+#define EXT_HEADER(header) ((header & 0x1F) == 0x0F) -+#define ALL_WORDS_DISABLED(wde) ((wde & 0x0F) == 0x0F) -+#define GET_HDR_OFFSET_2_0(header) ((header & 0xE0) >> 5) -+ -+#define EFUSE_REPEAT_THRESHOLD_ 3 -+ -+#define IS_MASKED_MP(ic, txt, offset) (EFUSE_IsAddressMasked_MP_##ic##txt(offset)) -+#define IS_MASKED_TC(ic, txt, offset) (EFUSE_IsAddressMasked_TC_##ic##txt(offset)) -+#define GET_MASK_ARRAY_LEN_MP(ic, txt) (EFUSE_GetArrayLen_MP_##ic##txt()) -+#define GET_MASK_ARRAY_LEN_TC(ic, txt) (EFUSE_GetArrayLen_TC_##ic##txt()) -+#define GET_MASK_ARRAY_MP(ic, txt, offset) (EFUSE_GetMaskArray_MP_##ic##txt(offset)) -+#define GET_MASK_ARRAY_TC(ic, txt, offset) (EFUSE_GetMaskArray_TC_##ic##txt(offset)) -+ -+ -+#define IS_MASKED(ic, txt, offset) (IS_MASKED_MP(ic, txt, offset)) -+#define GET_MASK_ARRAY_LEN(ic, txt) (GET_MASK_ARRAY_LEN_MP(ic, txt)) -+#define GET_MASK_ARRAY(ic, txt, out) do { GET_MASK_ARRAY_MP(ic, txt, out); } while (0) -+ -+#ifdef CONFIG_BT_EFUSE_MASK -+#define IS_BT_MASKED_MP(ic, txt, offset) (EFUSE_IsBTAddressMasked_MP_##ic##txt(offset)) -+#define GET_BT_MASK_ARRAY_LEN_MP(ic, txt) (EFUSE_GetBTArrayLen_MP_##ic##txt()) -+#define GET_BT_MASK_ARRAY_LEN_TC(ic, txt) (EFUSE_GetBTArrayLen_TC_##ic##txt()) -+#define GET_BT_MASK_ARRAY_MP(ic, txt, offset) (EFUSE_GetBTMaskArray_MP_##ic##txt(offset)) -+ -+#define IS_BT_MASKED(ic, txt, offset) (IS_BT_MASKED_MP(ic,txt, offset)) -+#define GET_BT_MASK_ARRAY(ic, txt, out) do { GET_BT_MASK_ARRAY_MP(ic,txt, out); } while(0) -+#define GET_BT_MASK_ARRAY_LEN(ic, txt) (GET_BT_MASK_ARRAY_LEN_MP(ic,txt)) -+#endif -+ -+/* ********************************************* -+ * The following is for BT Efuse definition -+ * ********************************************* */ -+#define EFUSE_BT_MAX_MAP_LEN 1024 -+#define EFUSE_MAX_BANK 4 -+#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK-1) -+/* ********************************************* -+ *--------------------------Define Parameters-------------------------------*/ -+#define EFUSE_MAX_WORD_UNIT 4 -+ -+/*------------------------------Define structure----------------------------*/ -+typedef struct PG_PKT_STRUCT_A { -+ u8 offset; -+ u8 word_en; -+ u8 data[8]; -+ u8 word_cnts; -+} PGPKT_STRUCT, *PPGPKT_STRUCT; -+ -+typedef enum { -+ ERR_SUCCESS = 0, -+ ERR_DRIVER_FAILURE, -+ ERR_IO_FAILURE, -+ ERR_WI_TIMEOUT, -+ ERR_WI_BUSY, -+ ERR_BAD_FORMAT, -+ ERR_INVALID_DATA, -+ ERR_NOT_ENOUGH_SPACE, -+ ERR_WRITE_PROTECT, -+ ERR_READ_BACK_FAIL, -+ ERR_OUT_OF_RANGE -+} ERROR_CODE; -+ -+/*------------------------------Define structure----------------------------*/ -+typedef struct _EFUSE_HAL { -+ u8 fakeEfuseBank; -+ u32 fakeEfuseUsedBytes; -+ u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE]; -+ u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN]; -+ u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN]; -+ u32 EfuseUsedBytes; -+ u8 EfuseUsedPercentage; -+ -+ u16 BTEfuseUsedBytes; -+ u8 BTEfuseUsedPercentage; -+ u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; -+ u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]; -+ u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]; -+ -+ u16 fakeBTEfuseUsedBytes; -+ u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; -+ u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]; -+ u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]; -+ -+ /* EFUSE Configuration, initialized in HAL_CmnInitPGData(). */ -+ const u16 MaxSecNum_WiFi; -+ const u16 MaxSecNum_BT; -+ const u16 WordUnit; -+ const u16 PhysicalLen_WiFi; -+ const u16 PhysicalLen_BT; -+ const u16 LogicalLen_WiFi; -+ const u16 LogicalLen_BT; -+ const u16 BankSize; -+ const u16 TotalBankNum; -+ const u16 BankNum_WiFi; -+ const u16 BankNum_BT; -+ const u16 OOBProtectBytes; -+ const u16 ProtectBytes; -+ const u16 BankAvailBytes; -+ const u16 TotalAvailBytes_WiFi; -+ const u16 TotalAvailBytes_BT; -+ const u16 HeaderRetry; -+ const u16 DataRetry; -+ -+ ERROR_CODE Status; -+ -+} EFUSE_HAL, *PEFUSE_HAL; -+ -+extern u8 maskfileBuffer[64]; -+extern u8 btmaskfileBuffer[64]; -+ -+/*------------------------Export global variable----------------------------*/ -+extern u8 fakeEfuseBank; -+extern u32 fakeEfuseUsedBytes; -+extern u8 fakeEfuseContent[]; -+extern u8 fakeEfuseInitMap[]; -+extern u8 fakeEfuseModifiedMap[]; -+ -+extern u32 BTEfuseUsedBytes; -+extern u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; -+extern u8 BTEfuseInitMap[]; -+extern u8 BTEfuseModifiedMap[]; -+ -+extern u32 fakeBTEfuseUsedBytes; -+extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; -+extern u8 fakeBTEfuseInitMap[]; -+extern u8 fakeBTEfuseModifiedMap[]; -+/*------------------------Export global variable----------------------------*/ -+#define MAX_SEGMENT_SIZE 200 -+#define MAX_SEGMENT_NUM 200 -+#define MAX_BUF_SIZE (MAX_SEGMENT_SIZE*MAX_SEGMENT_NUM) -+#define TMP_BUF_SIZE 100 -+#define rtprintf dcmd_Store_Return_Buf -+ -+u8 efuse_bt_GetCurrentSize(PADAPTER padapter, u16 *size); -+u16 efuse_bt_GetMaxSize(PADAPTER padapter); -+u16 efuse_GetavailableSize(PADAPTER adapter); -+ -+u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size); -+u16 efuse_GetMaxSize(PADAPTER padapter); -+u8 rtw_efuse_access(PADAPTER padapter, u8 bRead, u16 start_addr, u16 cnts, u8 *data); -+u8 rtw_efuse_bt_access(PADAPTER adapter, u8 write, u16 addr, u16 cnts, u8 *data); -+ -+u8 rtw_efuse_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); -+u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); -+u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); -+u8 rtw_BT_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); -+u8 rtw_BT_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); -+#ifdef CONFIG_RTL8822C -+void rtw_pre_bt_efuse(PADAPTER padapter); -+#endif -+u16 Efuse_GetCurrentSize(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); -+u8 Efuse_CalculateWordCnts(u8 word_en); -+void ReadEFuseByte(PADAPTER Adapter, u16 _offset, u8 *pbuf, BOOLEAN bPseudoTest) ; -+void EFUSE_GetEfuseDefinition(PADAPTER pAdapter, u8 efuseType, u8 type, void *pOut, BOOLEAN bPseudoTest); -+u8 efuse_OneByteRead(PADAPTER pAdapter, u16 addr, u8 *data, BOOLEAN bPseudoTest); -+#define efuse_onebyte_read(adapter, addr, data, pseudo_test) efuse_OneByteRead((adapter), (addr), (data), (pseudo_test)) -+ -+u8 efuse_OneByteWrite(PADAPTER pAdapter, u16 addr, u8 data, BOOLEAN bPseudoTest); -+ -+void BTEfuse_PowerSwitch(PADAPTER pAdapter, u8 bWrite, u8 PwrState); -+void Efuse_PowerSwitch(PADAPTER pAdapter, u8 bWrite, u8 PwrState); -+int Efuse_PgPacketRead(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest); -+int Efuse_PgPacketWrite(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); -+void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata); -+u8 Efuse_WordEnableDataWrite(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest); -+void EFUSE_ShadowMapUpdate(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); -+void EFUSE_ShadowRead(PADAPTER pAdapter, u8 Type, u16 Offset, u32 *Value); -+#define efuse_logical_map_read(adapter, type, offset, value) EFUSE_ShadowRead((adapter), (type), (offset), (value)) -+ -+BOOLEAN rtw_file_efuse_IsMasked(PADAPTER pAdapter, u16 Offset, u8 *maskbuf); -+BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset); -+ -+void hal_ReadEFuse_BT_logic_map( -+ PADAPTER padapter, -+ u16 _offset, -+ u16 _size_byte, -+ u8 *pbuf -+); -+u8 EfusePgPacketWrite_BT( -+ PADAPTER pAdapter, -+ u8 offset, -+ u8 word_en, -+ u8 *pData, -+ u8 bPseudoTest); -+ -+u16 rtw_get_bt_efuse_mask_arraylen(PADAPTER pAdapter); -+void rtw_bt_efuse_mask_array(PADAPTER pAdapter, u8 *pArray); -+u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter); -+void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray); -+void rtw_efuse_analyze(PADAPTER padapter, u8 Type, u8 Fake); -+ -+#define MAC_HIDDEN_MAX_BW_NUM 8 -+extern const u8 _mac_hidden_max_bw_to_hal_bw_cap[]; -+#define mac_hidden_max_bw_to_hal_bw_cap(max_bw) (((max_bw) >= MAC_HIDDEN_MAX_BW_NUM) ? 0 : _mac_hidden_max_bw_to_hal_bw_cap[(max_bw)]) -+ -+#define MAC_HIDDEN_PROTOCOL_NUM 4 -+extern const u8 _mac_hidden_proto_to_hal_proto_cap[]; -+#define mac_hidden_proto_to_hal_proto_cap(proto) (((proto) >= MAC_HIDDEN_PROTOCOL_NUM) ? 0 : _mac_hidden_proto_to_hal_proto_cap[(proto)]) -+ -+u8 mac_hidden_wl_func_to_hal_wl_func(u8 func); -+ -+#ifdef PLATFORM_LINUX -+u8 rtw_efuse_file_read(PADAPTER padapter, u8 *filepath, u8 *buf, u32 len); -+u8 rtw_efuse_file_store(PADAPTER padapter, u8 *filepath, u8 *buf, u32 len); -+#ifdef CONFIG_EFUSE_CONFIG_FILE -+u32 rtw_read_efuse_from_file(const char *path, u8 *buf, int map_size); -+u32 rtw_read_macaddr_from_file(const char *path, u8 *buf); -+#endif /* CONFIG_EFUSE_CONFIG_FILE */ -+#endif /* PLATFORM_LINUX */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_event.h b/drivers/staging/rtl8723cs/include/rtw_event.h -new file mode 100644 -index 000000000000..13e3f5287116 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_event.h -@@ -0,0 +1,95 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_EVENT_H_ -+#define _RTW_EVENT_H_ -+ -+#ifdef CONFIG_H2CLBK -+ #include -+#endif -+ -+/* -+Used to report a bss has been scanned -+ -+*/ -+struct survey_event { -+ WLAN_BSSID_EX bss; -+}; -+ -+/* -+Used to report that the requested site survey has been done. -+ -+bss_cnt indicates the number of bss that has been reported. -+ -+ -+*/ -+struct surveydone_event { -+ unsigned int bss_cnt; -+ u8 activate_ch_cnt; -+ bool acs; /* aim to trigger channel selection */ -+}; -+ -+/* -+Used to report the link result of joinning the given bss -+ -+ -+join_res: -+-1: authentication fail -+-2: association fail -+> 0: TID -+ -+*/ -+struct joinbss_event { -+ struct wlan_network network; -+}; -+ -+/* -+Used to report a given STA has joinned the created BSS. -+It is used in AP/Ad-HoC(M) mode. -+ -+ -+*/ -+struct stassoc_event { -+ unsigned char macaddr[6]; -+}; -+ -+struct stadel_event { -+ unsigned char macaddr[6]; -+ unsigned char rsvd[2]; /* for reason */ -+ unsigned char locally_generated; -+ int mac_id; -+}; -+ -+struct wmm_event { -+ unsigned char wmm; -+}; -+ -+#ifdef CONFIG_H2CLBK -+struct c2hlbk_event { -+ unsigned char mac[6]; -+ unsigned short s0; -+ unsigned short s1; -+ unsigned int w0; -+ unsigned char b0; -+ unsigned short s2; -+ unsigned char b1; -+ unsigned int w1; -+}; -+#endif/* CONFIG_H2CLBK */ -+ -+struct rtw_event { -+ u32 parmsize; -+ void (*event_callback)(_adapter *dev, u8 *pbuf); -+}; -+#endif /* _WLANEVENT_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_ft.h b/drivers/staging/rtl8723cs/include/rtw_ft.h -new file mode 100644 -index 000000000000..025f19e6729b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_ft.h -@@ -0,0 +1,183 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __RTW_FT_H_ -+#define __RTW_FT_H_ -+ -+enum rtw_ieee80211_ft_actioncode { -+ RTW_WLAN_ACTION_FT_RESV, -+ RTW_WLAN_ACTION_FT_REQ, -+ RTW_WLAN_ACTION_FT_RSP, -+ RTW_WLAN_ACTION_FT_CONF, -+ RTW_WLAN_ACTION_FT_ACK, -+ RTW_WLAN_ACTION_FT_MAX, -+}; -+ -+enum _rtw_ft_sta_status { -+ RTW_FT_UNASSOCIATED_STA = 0, -+ RTW_FT_AUTHENTICATING_STA, -+ RTW_FT_AUTHENTICATED_STA, -+ RTW_FT_ASSOCIATING_STA, -+ RTW_FT_ASSOCIATED_STA, -+ RTW_FT_REQUESTING_STA, -+ RTW_FT_REQUESTED_STA, -+ RTW_FT_CONFIRMED_STA, -+ RTW_FT_UNSPECIFIED_STA -+}; -+ -+#define RTW_FT_ACTION_REQ_LMT 4 -+ -+#define RTW_FT_MAX_IE_SZ 256 -+ -+#define rtw_ft_chk_status(a, s) \ -+ ((a)->mlmepriv.ft_roam.ft_status == (s)) -+ -+#define rtw_ft_roam_status(a, s) \ -+ ((rtw_to_roam(a) > 0) && rtw_ft_chk_status(a, s)) -+ -+#define rtw_ft_authed_sta(a) \ -+ ((rtw_ft_chk_status(a, RTW_FT_AUTHENTICATED_STA)) || \ -+ (rtw_ft_chk_status(a, RTW_FT_ASSOCIATING_STA)) || \ -+ (rtw_ft_chk_status(a, RTW_FT_ASSOCIATED_STA))) -+ -+#define rtw_ft_set_status(a, s) \ -+ do { \ -+ ((a)->mlmepriv.ft_roam.ft_status = (s)); \ -+ } while (0) -+ -+#define rtw_ft_lock_set_status(a, s, irq) \ -+ do { \ -+ _enter_critical_bh(&(a)->mlmepriv.lock, ((_irqL *)(irq))); \ -+ ((a)->mlmepriv.ft_roam.ft_status = (s)); \ -+ _exit_critical_bh(&(a)->mlmepriv.lock, ((_irqL *)(irq))); \ -+ } while (0) -+ -+#define rtw_ft_reset_status(a) \ -+ do { \ -+ ((a)->mlmepriv.ft_roam.ft_status = RTW_FT_UNASSOCIATED_STA); \ -+ } while (0) -+ -+enum rtw_ft_capability { -+ RTW_FT_EN = BIT0, -+ RTW_FT_OTD_EN = BIT1, -+ RTW_FT_PEER_EN = BIT2, -+ RTW_FT_PEER_OTD_EN = BIT3, -+ RTW_FT_BTM_ROAM = BIT4, -+ RTW_FT_TEST_RSSI_ROAM = BIT7, -+}; -+ -+#define rtw_ft_chk_flags(a, f) \ -+ ((a)->mlmepriv.ft_roam.ft_flags & (f)) -+ -+#define rtw_ft_set_flags(a, f) \ -+ do { \ -+ ((a)->mlmepriv.ft_roam.ft_flags |= (f)); \ -+ } while (0) -+ -+#define rtw_ft_clr_flags(a, f) \ -+ do { \ -+ ((a)->mlmepriv.ft_roam.ft_flags &= ~(f)); \ -+ } while (0) -+ -+#define rtw_ft_roam(a) \ -+ ((rtw_to_roam(a) > 0) && rtw_ft_chk_flags(a, RTW_FT_PEER_EN)) -+ -+#define rtw_ft_valid_akm(a, t) \ -+ ((rtw_ft_chk_flags(a, RTW_FT_EN)) && \ -+ (((t) == 3) || ((t) == 4))) -+ -+#define rtw_ft_roam_expired(a, r) \ -+ ((rtw_chk_roam_flags(a, RTW_ROAM_ON_EXPIRED)) \ -+ && (r == WLAN_REASON_ACTIVE_ROAM)) -+ -+#define rtw_ft_otd_roam_en(a) \ -+ ((rtw_ft_chk_flags(a, RTW_FT_OTD_EN)) \ -+ && ((a)->mlmepriv.ft_roam.ft_roam_on_expired == _FALSE) \ -+ && ((a)->mlmepriv.ft_roam.ft_cap & 0x01)) -+ -+#define rtw_ft_otd_roam(a) \ -+ rtw_ft_chk_flags(a, RTW_FT_PEER_OTD_EN) -+ -+#define rtw_ft_valid_otd_candidate(a, p) \ -+ ((rtw_ft_chk_flags(a, RTW_FT_OTD_EN)) \ -+ && ((rtw_ft_chk_flags(a, RTW_FT_PEER_OTD_EN) \ -+ && ((*((p)+4) & 0x01) == 0)) \ -+ || ((rtw_ft_chk_flags(a, RTW_FT_PEER_OTD_EN) == 0) \ -+ && (*((p)+4) & 0x01)))) -+ -+struct ft_roam_info { -+ u16 mdid; -+ u8 ft_cap; -+ /*b0: FT over DS, b1: Resource Req Protocol Cap, b2~b7: Reserved*/ -+ u8 updated_ft_ies[RTW_FT_MAX_IE_SZ]; -+ u16 updated_ft_ies_len; -+ u8 ft_action[RTW_FT_MAX_IE_SZ]; -+ u16 ft_action_len; -+ struct cfg80211_ft_event_params ft_event; -+ u8 ft_roam_on_expired; -+ u8 ft_flags; -+ u32 ft_status; -+ u32 ft_req_retry_cnt; -+ bool ft_updated_bcn; -+}; -+ -+void rtw_ft_info_init(struct ft_roam_info *pft); -+ -+int rtw_ft_proc_flags_get(struct seq_file *m, void *v); -+ -+ssize_t rtw_ft_proc_flags_set(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data); -+ -+u8 rtw_ft_chk_roaming_candidate( -+ _adapter *padapter, struct wlan_network *competitor); -+ -+void rtw_ft_update_stainfo(_adapter *padapter, WLAN_BSSID_EX *pnetwork); -+ -+void rtw_ft_reassoc_event_callback(_adapter *padapter, u8 *pbuf); -+ -+void rtw_ft_validate_akm_type(_adapter *padapter, -+ struct wlan_network *pnetwork); -+ -+void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame); -+ -+void rtw_ft_start_clnt_join(_adapter *padapter); -+ -+u8 rtw_ft_update_rsnie( -+ _adapter *padapter, u8 bwrite, -+ struct pkt_attrib *pattrib, u8 **pframe); -+ -+void rtw_ft_build_auth_req_ies(_adapter *padapter, -+ struct pkt_attrib *pattrib, u8 **pframe); -+ -+void rtw_ft_build_assoc_req_ies(_adapter *padapter, -+ u8 is_reassoc, struct pkt_attrib *pattrib, u8 **pframe); -+ -+u8 rtw_ft_update_auth_rsp_ies(_adapter *padapter, u8 *pframe, u32 len); -+ -+void rtw_ft_start_roam(_adapter *padapter, u8 *pTargetAddr); -+ -+void rtw_ft_issue_action_req(_adapter *padapter, u8 *pTargetAddr); -+ -+void rtw_ft_report_evt(_adapter *padapter); -+ -+void rtw_ft_report_reassoc_evt(_adapter *padapter, u8 *pMacAddr); -+ -+void rtw_ft_link_timer_hdl(void *ctx); -+ -+void rtw_ft_roam_timer_hdl(void *ctx); -+ -+void rtw_ft_roam_status_reset(_adapter *padapter); -+ -+#endif /* __RTW_FT_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_ht.h b/drivers/staging/rtl8723cs/include/rtw_ht.h -new file mode 100644 -index 000000000000..8237bbe76603 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_ht.h -@@ -0,0 +1,217 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_HT_H_ -+#define _RTW_HT_H_ -+ -+#define HT_CAP_IE_LEN 26 -+#define HT_OP_IE_LEN 22 -+ -+struct ht_priv { -+ u8 ht_option; -+ u8 ampdu_enable;/* for enable Tx A-MPDU */ -+ u8 tx_amsdu_enable;/* for enable Tx A-MSDU */ -+ u8 bss_coexist;/* for 20/40 Bss coexist */ -+ -+ /* u8 baddbareq_issued[16]; */ -+ u32 tx_amsdu_maxlen; /* 1: 8k, 0:4k ; default:8k, for tx */ -+ u32 rx_ampdu_maxlen; /* for rx reordering ctrl win_sz, updated when join_callback. */ -+ -+ u8 rx_ampdu_min_spacing; -+ -+ u8 ch_offset;/* PRIME_CHNL_OFFSET */ -+ u8 sgi_20m; -+ u8 sgi_40m; -+ -+ /* for processing Tx A-MPDU */ -+ u8 agg_enable_bitmap; -+ /* u8 ADDBA_retry_count; */ -+ u8 candidate_tid_bitmap; -+ -+ u8 ldpc_cap; -+ u8 stbc_cap; -+ u8 beamform_cap; -+ u8 smps_cap; /*spatial multiplexing power save mode. 0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/ -+ -+ u8 op_present:1; /* ht_op is present */ -+ -+ struct rtw_ieee80211_ht_cap ht_cap; -+ u8 ht_op[HT_OP_IE_LEN]; -+ -+}; -+ -+#ifdef ROKU_PRIVATE -+struct ht_priv_infra_ap { -+ -+ /*Infra mode, only store AP's info , not intersection of STA and AP*/ -+ u8 channel_width_infra_ap; -+ u8 sgi_20m_infra_ap; -+ u8 sgi_40m_infra_ap; -+ u8 ldpc_cap_infra_ap; -+ u8 stbc_cap_infra_ap; -+ u8 MCS_set_infra_ap[16]; -+ u8 Rx_ss_infra_ap; -+ u16 rx_highest_data_rate_infra_ap; -+}; -+#endif /* ROKU_PRIVATE */ -+ -+typedef enum AGGRE_SIZE { -+ HT_AGG_SIZE_8K = 0, -+ HT_AGG_SIZE_16K = 1, -+ HT_AGG_SIZE_32K = 2, -+ HT_AGG_SIZE_64K = 3, -+ VHT_AGG_SIZE_128K = 4, -+ VHT_AGG_SIZE_256K = 5, -+ VHT_AGG_SIZE_512K = 6, -+ VHT_AGG_SIZE_1024K = 7, -+} AGGRE_SIZE_E, *PAGGRE_SIZE_E; -+ -+#define LDPC_HT_ENABLE_RX BIT0 -+#define LDPC_HT_ENABLE_TX BIT1 -+#define LDPC_HT_TEST_TX_ENABLE BIT2 -+#define LDPC_HT_CAP_TX BIT3 -+ -+#define STBC_HT_ENABLE_RX BIT0 -+#define STBC_HT_ENABLE_TX BIT1 -+#define STBC_HT_TEST_TX_ENABLE BIT2 -+#define STBC_HT_CAP_TX BIT3 -+ -+/* ------------------------------------------------------------ -+ * The HT Control field -+ * ------------------------------------------------------------ */ -+#define SET_HT_CTRL_CSI_STEERING(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart))+2, 6, 2, _val) -+#define SET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart))+3, 0, 1, _val) -+#define GET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+3, 0, 1) -+ -+/* 20/40 BSS Coexist */ -+#define SET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 0, 1, _val) -+#define GET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 0, 1) -+ -+/* HT Capabilities Info field */ -+#define HT_CAP_ELE_CAP_INFO(_pEleStart) ((u8 *)(_pEleStart)) -+#define GET_HT_CAP_ELE_LDPC_CAP(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 0, 1) -+#define GET_HT_CAP_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 1, 1) -+#define GET_HT_CAP_ELE_SM_PS(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 2, 2) -+#define GET_HT_CAP_ELE_GREENFIELD(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 4, 1) -+#define GET_HT_CAP_ELE_SHORT_GI20M(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 5, 1) -+#define GET_HT_CAP_ELE_SHORT_GI40M(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 6, 1) -+#define GET_HT_CAP_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 7, 1) -+#define GET_HT_CAP_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 0, 2) -+#define GET_HT_CAP_ELE_DELAYED_BA(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 2, 1) -+#define GET_HT_CAP_ELE_MAX_AMSDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 3, 1) -+#define GET_HT_CAP_ELE_DSSS_CCK_40M(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 4, 1) -+#define GET_HT_CAP_ELE_FORTY_INTOLERANT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 6, 1) -+#define GET_HT_CAP_ELE_LSIG_TXOP_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 7, 1) -+ -+#define SET_HT_CAP_ELE_LDPC_CAP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 0, 1, _val) -+#define SET_HT_CAP_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 1, 1, _val) -+#define SET_HT_CAP_ELE_SM_PS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 2, 2, _val) -+#define SET_HT_CAP_ELE_GREENFIELD(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 4, 1, _val) -+#define SET_HT_CAP_ELE_SHORT_GI20M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 5, 1, _val) -+#define SET_HT_CAP_ELE_SHORT_GI40M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 6, 1, _val) -+#define SET_HT_CAP_ELE_TX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 7, 1, _val) -+#define SET_HT_CAP_ELE_RX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 0, 2, _val) -+#define SET_HT_CAP_ELE_DELAYED_BA(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 2, 1, _val) -+#define SET_HT_CAP_ELE_MAX_AMSDU_LENGTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 3, 1, _val) -+#define SET_HT_CAP_ELE_DSSS_CCK_40M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 4, 1, _val) -+#define SET_HT_CAP_ELE_FORTY_INTOLERANT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 6, 1, _val) -+#define SET_HT_CAP_ELE_LSIG_TXOP_PROTECT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 7, 1, _val) -+ -+/* A-MPDU Parameters field */ -+#define HT_CAP_ELE_AMPDU_PARA(_pEleStart) (((u8 *)(_pEleStart))+2) -+#define GET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+2, 0, 2) -+#define GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+2, 2, 3) -+ -+#define HT_AMPDU_PARA_FMT "%02x " \ -+ "MAX AMPDU len:%u bytes, MIN MPDU Start Spacing:%u" -+ -+#define HT_AMPDU_PARA_ARG(x) \ -+ *((u8 *)(x)) \ -+ , (1 << (13+GET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(((u8 *)x)-2)))-1 \ -+ , GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(((u8 *)x)-2) -+ -+#define SET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 0, 2, _val) -+#define SET_HT_CAP_ELE_MIN_MPDU_S_SPACE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 2, 3, _val) -+ -+/* Supported MCS Set field */ -+#define HT_CAP_ELE_SUP_MCS_SET(_pEleStart) (((u8 *)(_pEleStart))+3) -+#define HT_CAP_ELE_RX_MCS_MAP(_pEleStart) HT_CAP_ELE_SUP_MCS_SET(_pEleStart) -+#define GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(_pEleStart) LE_BITS_TO_2BYTE(((u8 *)(_pEleStart))+13, 0, 10) -+#define GET_HT_CAP_ELE_TX_MCS_DEF(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 0, 1) -+#define GET_HT_CAP_ELE_TRX_MCS_NEQ(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 1, 1) -+#define GET_HT_CAP_ELE_TX_MAX_SS(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 2, 2) -+#define GET_HT_CAP_ELE_TX_UEQM(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 4, 1) -+ -+#define HT_RX_MCS_BMP_FMT "%02x %02x %02x %02x %02x%02x%02x%02x%02x%02x" -+#define HT_RX_MCS_BMP_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \ -+ ((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9] -+ -+#define HT_SUP_MCS_SET_FMT HT_RX_MCS_BMP_FMT \ -+ /* "\n%02x%02x%02x%02x%02x%02x" */\ -+ " %uMbps %s%s%s" -+#define HT_SUP_MCS_SET_ARG(x) HT_RX_MCS_BMP_ARG(x) \ -+ /*,((u8 *)(x))[10], ((u8 *)(x))[11], ((u8 *)(x))[12], ((u8 *)(x))[13], ((u8 *)(x))[14], ((u8 *)(x))[15] */\ -+ , GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(((u8 *)x)-3) \ -+ , GET_HT_CAP_ELE_TX_MCS_DEF(((u8 *)x)-3) ? "TX_MCS_DEF " : "" \ -+ , GET_HT_CAP_ELE_TRX_MCS_NEQ(((u8 *)x)-3) ? "TRX_MCS_NEQ " : "" \ -+ , GET_HT_CAP_ELE_TX_UEQM(((u8 *)x)-3) ? "TX_UEQM " : "" -+ -+/* TXBF Capabilities */ -+#define SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 3, 1, ((u8)_val)) -+#define SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 4, 1, ((u8)_val)) -+#define SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 10, 1, ((u8)_val)) -+#define SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 15, 2, ((u8)_val)) -+#define SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 23, 2, ((u8)_val)) -+#define SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 27, 2, ((u8)_val)) -+ -+ -+#define GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 10, 1) -+#define GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 15, 2) -+#define GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 23, 2) -+#define GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 27, 2) -+ -+/* HT Operation element */ -+ -+#define GET_HT_OP_ELE_PRI_CHL(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 0, 8) -+#define SET_HT_OP_ELE_PRI_CHL(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 0, 8, _val) -+ -+/* HT Operation Info field */ -+#define HT_OP_ELE_OP_INFO(_pEleStart) (((u8 *)(_pEleStart)) + 1) -+#define GET_HT_OP_ELE_2ND_CHL_OFFSET(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 1, 0, 2) -+#define GET_HT_OP_ELE_STA_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 1, 2, 1) -+#define GET_HT_OP_ELE_RIFS_MODE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 1, 3, 1) -+#define GET_HT_OP_ELE_HT_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 2, 0, 2) -+#define GET_HT_OP_ELE_NON_GREEN_PRESENT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 2, 2, 1) -+#define GET_HT_OP_ELE_OBSS_NON_HT_PRESENT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 2, 4, 1) -+#define GET_HT_OP_ELE_DUAL_BEACON(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 4, 6, 1) -+#define GET_HT_OP_ELE_DUAL_CTS(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 4, 7, 1) -+#define GET_HT_OP_ELE_STBC_BEACON(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 0, 1) -+#define GET_HT_OP_ELE_LSIG_TXOP_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 1, 1) -+#define GET_HT_OP_ELE_PCO_ACTIVE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 2, 1) -+#define GET_HT_OP_ELE_PCO_PHASE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 3, 1) -+ -+#define SET_HT_OP_ELE_2ND_CHL_OFFSET(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 0, 2, _val) -+#define SET_HT_OP_ELE_STA_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 2, 1, _val) -+#define SET_HT_OP_ELE_RIFS_MODE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 3, 1, _val) -+#define SET_HT_OP_ELE_HT_PROTECT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 0, 2, _val) -+#define SET_HT_OP_ELE_NON_GREEN_PRESENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 2, 1, _val) -+#define SET_HT_OP_ELE_OBSS_NON_HT_PRESENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 4, 1, _val) -+#define SET_HT_OP_ELE_DUAL_BEACON(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 4, 6, 1, _val) -+#define SET_HT_OP_ELE_DUAL_CTS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 4, 7, 1, _val) -+#define SET_HT_OP_ELE_STBC_BEACON(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 0, 1, _val) -+#define SET_HT_OP_ELE_LSIG_TXOP_PROTECT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 1, 1, _val) -+#define SET_HT_OP_ELE_PCO_ACTIVE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 2, 1, _val) -+#define SET_HT_OP_ELE_PCO_PHASE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 3, 1, _val) -+ -+#endif /* _RTL871X_HT_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_io.h b/drivers/staging/rtl8723cs/include/rtw_io.h -new file mode 100644 -index 000000000000..50291e1b88c7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_io.h -@@ -0,0 +1,526 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef _RTW_IO_H_ -+#define _RTW_IO_H_ -+ -+#define NUM_IOREQ 8 -+ -+#ifdef PLATFORM_LINUX -+ #define MAX_PROT_SZ (64-16) -+#endif -+ -+#define _IOREADY 0 -+#define _IO_WAIT_COMPLETE 1 -+#define _IO_WAIT_RSP 2 -+ -+/* IO COMMAND TYPE */ -+#define _IOSZ_MASK_ (0x7F) -+#define _IO_WRITE_ BIT(7) -+#define _IO_FIXED_ BIT(8) -+#define _IO_BURST_ BIT(9) -+#define _IO_BYTE_ BIT(10) -+#define _IO_HW_ BIT(11) -+#define _IO_WORD_ BIT(12) -+#define _IO_SYNC_ BIT(13) -+#define _IO_CMDMASK_ (0x1F80) -+ -+ -+/* -+ For prompt mode accessing, caller shall free io_req -+ Otherwise, io_handler will free io_req -+*/ -+ -+ -+ -+/* IO STATUS TYPE */ -+#define _IO_ERR_ BIT(2) -+#define _IO_SUCCESS_ BIT(1) -+#define _IO_DONE_ BIT(0) -+ -+ -+#define IO_RD32 (_IO_SYNC_ | _IO_WORD_) -+#define IO_RD16 (_IO_SYNC_ | _IO_HW_) -+#define IO_RD8 (_IO_SYNC_ | _IO_BYTE_) -+ -+#define IO_RD32_ASYNC (_IO_WORD_) -+#define IO_RD16_ASYNC (_IO_HW_) -+#define IO_RD8_ASYNC (_IO_BYTE_) -+ -+#define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_) -+#define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_) -+#define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_) -+ -+#define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_) -+#define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_) -+#define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_) -+ -+/* -+ -+ Only Sync. burst accessing is provided. -+ -+*/ -+ -+#define IO_WR_BURST(x) (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) -+#define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) -+ -+ -+ -+/* below is for the intf_option bit defition... */ -+ -+#define _INTF_ASYNC_ BIT(0) /* support async io */ -+ -+struct intf_priv; -+struct intf_hdl; -+struct io_queue; -+ -+struct _io_ops { -+ u8(*_read8)(struct intf_hdl *pintfhdl, u32 addr); -+ u16(*_read16)(struct intf_hdl *pintfhdl, u32 addr); -+ u32(*_read32)(struct intf_hdl *pintfhdl, u32 addr); -+ -+ int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); -+ int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); -+ int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); -+ int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); -+ -+ int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); -+ int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); -+ int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); -+ -+ void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -+ void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -+ -+ void (*_sync_irp_protocol_rw)(struct io_queue *pio_q); -+ -+ u32(*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); -+ -+ u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -+ u32(*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -+ -+ u32(*_write_scsi)(struct intf_hdl *pintfhdl, u32 cnt, u8 *pmem); -+ -+ void (*_read_port_cancel)(struct intf_hdl *pintfhdl); -+ void (*_write_port_cancel)(struct intf_hdl *pintfhdl); -+ -+#ifdef CONFIG_SDIO_HCI -+ u8(*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr); -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+ u8(*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr); -+ u16(*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr); -+ u32(*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr); -+ int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); -+ int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); -+ int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+#endif -+ -+}; -+ -+struct io_req { -+ _list list; -+ u32 addr; -+ volatile u32 val; -+ u32 command; -+ u32 status; -+ u8 *pbuf; -+ _sema sema; -+ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt); -+ u8 *cnxt; -+}; -+ -+struct intf_hdl { -+ _adapter *padapter; -+ struct dvobj_priv *pintf_dev;/* pointer to &(padapter->dvobjpriv); */ -+ struct _io_ops io_ops; -+}; -+ -+struct reg_protocol_rd { -+ -+#ifdef CONFIG_LITTLE_ENDIAN -+ -+ /* DW1 */ -+ u32 NumOfTrans:4; -+ u32 Reserved1:4; -+ u32 Reserved2:24; -+ /* DW2 */ -+ u32 ByteCount:7; -+ u32 WriteEnable:1; /* 0:read, 1:write */ -+ u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */ -+ u32 BurstMode:1; -+ u32 Byte1Access:1; -+ u32 Byte2Access:1; -+ u32 Byte4Access:1; -+ u32 Reserved3:3; -+ u32 Reserved4:16; -+ /* DW3 */ -+ u32 BusAddress; -+ /* DW4 */ -+ /* u32 Value; */ -+#else -+ -+ -+ /* DW1 */ -+ u32 Reserved1:4; -+ u32 NumOfTrans:4; -+ -+ u32 Reserved2:24; -+ -+ /* DW2 */ -+ u32 WriteEnable:1; -+ u32 ByteCount:7; -+ -+ -+ u32 Reserved3:3; -+ u32 Byte4Access:1; -+ -+ u32 Byte2Access:1; -+ u32 Byte1Access:1; -+ u32 BurstMode:1; -+ u32 FixOrContinuous:1; -+ -+ u32 Reserved4:16; -+ -+ /* DW3 */ -+ u32 BusAddress; -+ -+ /* DW4 */ -+ /* u32 Value; */ -+ -+#endif -+ -+}; -+ -+ -+struct reg_protocol_wt { -+ -+ -+#ifdef CONFIG_LITTLE_ENDIAN -+ -+ /* DW1 */ -+ u32 NumOfTrans:4; -+ u32 Reserved1:4; -+ u32 Reserved2:24; -+ /* DW2 */ -+ u32 ByteCount:7; -+ u32 WriteEnable:1; /* 0:read, 1:write */ -+ u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */ -+ u32 BurstMode:1; -+ u32 Byte1Access:1; -+ u32 Byte2Access:1; -+ u32 Byte4Access:1; -+ u32 Reserved3:3; -+ u32 Reserved4:16; -+ /* DW3 */ -+ u32 BusAddress; -+ /* DW4 */ -+ u32 Value; -+ -+#else -+ /* DW1 */ -+ u32 Reserved1:4; -+ u32 NumOfTrans:4; -+ -+ u32 Reserved2:24; -+ -+ /* DW2 */ -+ u32 WriteEnable:1; -+ u32 ByteCount:7; -+ -+ u32 Reserved3:3; -+ u32 Byte4Access:1; -+ -+ u32 Byte2Access:1; -+ u32 Byte1Access:1; -+ u32 BurstMode:1; -+ u32 FixOrContinuous:1; -+ -+ u32 Reserved4:16; -+ -+ /* DW3 */ -+ u32 BusAddress; -+ -+ /* DW4 */ -+ u32 Value; -+ -+#endif -+ -+}; -+#ifdef CONFIG_PCI_HCI -+#define MAX_CONTINUAL_IO_ERR 4 -+#endif -+ -+#ifdef CONFIG_USB_HCI -+#define MAX_CONTINUAL_IO_ERR 4 -+#endif -+ -+#ifdef CONFIG_SDIO_HCI -+#define SD_IO_TRY_CNT (8) -+#define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT -+#endif -+ -+#ifdef CONFIG_GSPI_HCI -+#define SD_IO_TRY_CNT (8) -+#define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT -+#endif -+ -+ -+int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj); -+void rtw_reset_continual_io_error(struct dvobj_priv *dvobj); -+ -+/* -+Below is the data structure used by _io_handler -+ -+*/ -+ -+struct io_queue { -+ _lock lock; -+ _list free_ioreqs; -+ _list pending; /* The io_req list that will be served in the single protocol read/write. */ -+ _list processing; -+ u8 *free_ioreqs_buf; /* 4-byte aligned */ -+ u8 *pallocated_free_ioreqs_buf; -+ struct intf_hdl intf; -+}; -+ -+struct io_priv { -+ -+ _adapter *padapter; -+ -+ struct intf_hdl intf; -+ -+}; -+ -+extern uint ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); -+extern void sync_ioreq_enqueue(struct io_req *preq, struct io_queue *ioqueue); -+extern uint sync_ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); -+ -+ -+extern uint free_ioreq(struct io_req *preq, struct io_queue *pio_queue); -+extern struct io_req *alloc_ioreq(struct io_queue *pio_q); -+ -+extern uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl); -+extern void unregister_intf_hdl(struct intf_hdl *pintfhdl); -+ -+extern void _rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -+extern void _rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -+ -+extern u8 _rtw_read8(_adapter *adapter, u32 addr); -+extern u16 _rtw_read16(_adapter *adapter, u32 addr); -+extern u32 _rtw_read32(_adapter *adapter, u32 addr); -+extern void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -+extern void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -+extern void _rtw_read_port_cancel(_adapter *adapter); -+ -+ -+extern int _rtw_write8(_adapter *adapter, u32 addr, u8 val); -+extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val); -+extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val); -+extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata); -+ -+#ifdef CONFIG_SDIO_HCI -+u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr); -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+u8 _rtw_sd_iread8(_adapter *adapter, u32 addr); -+u16 _rtw_sd_iread16(_adapter *adapter, u32 addr); -+u32 _rtw_sd_iread32(_adapter *adapter, u32 addr); -+int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val); -+int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val); -+int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val); -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val); -+extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val); -+extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val); -+ -+extern void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -+extern u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -+u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms); -+extern void _rtw_write_port_cancel(_adapter *adapter); -+ -+#ifdef DBG_IO -+u32 match_read_sniff(_adapter *adapter, u32 addr, u16 len, u32 val); -+u32 match_write_sniff(_adapter *adapter, u32 addr, u16 len, u32 val); -+bool match_rf_read_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask); -+bool match_rf_write_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask); -+ -+void dbg_rtw_reg_read_monitor(_adapter *adapter, u32 addr, u32 len, u32 val, const char *caller, const int line); -+void dbg_rtw_reg_write_monitor(_adapter *adapter, u32 addr, u32 len, u32 val, const char *caller, const int line); -+ -+extern u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line); -+extern u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line); -+extern u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line); -+ -+extern int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); -+extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); -+extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); -+extern int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line); -+ -+#ifdef CONFIG_SDIO_HCI -+u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line); -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line); -+u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line); -+u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line); -+int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); -+int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); -+int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+#define rtw_read8(adapter, addr) dbg_rtw_read8((adapter), (addr), __FUNCTION__, __LINE__) -+#define rtw_read16(adapter, addr) dbg_rtw_read16((adapter), (addr), __FUNCTION__, __LINE__) -+#define rtw_read32(adapter, addr) dbg_rtw_read32((adapter), (addr), __FUNCTION__, __LINE__) -+#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) -+#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) -+#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) -+ -+#define rtw_write8(adapter, addr, val) dbg_rtw_write8((adapter), (addr), (val), __FUNCTION__, __LINE__) -+#define rtw_write16(adapter, addr, val) dbg_rtw_write16((adapter), (addr), (val), __FUNCTION__, __LINE__) -+#define rtw_write32(adapter, addr, val) dbg_rtw_write32((adapter), (addr), (val), __FUNCTION__, __LINE__) -+#define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN((adapter), (addr), (length), (data), __FUNCTION__, __LINE__) -+ -+#define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) -+#define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) -+#define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) -+ -+#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), addr, cnt, mem) -+#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port(adapter, addr, cnt, mem) -+#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) -+#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter) -+ -+#ifdef CONFIG_SDIO_HCI -+#define rtw_sd_f0_read8(adapter, addr) dbg_rtw_sd_f0_read8((adapter), (addr), __func__, __LINE__) -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+#define rtw_sd_iread8(adapter, addr) dbg_rtw_sd_iread8((adapter), (addr), __func__, __LINE__) -+#define rtw_sd_iread16(adapter, addr) dbg_rtw_sd_iread16((adapter), (addr), __func__, __LINE__) -+#define rtw_sd_iread32(adapter, addr) dbg_rtw_sd_iread32((adapter), (addr), __func__, __LINE__) -+#define rtw_sd_iwrite8(adapter, addr, val) dbg_rtw_sd_iwrite8((adapter), (addr), (val), __func__, __LINE__) -+#define rtw_sd_iwrite16(adapter, addr, val) dbg_rtw_sd_iwrite16((adapter), (addr), (val), __func__, __LINE__) -+#define rtw_sd_iwrite32(adapter, addr, val) dbg_rtw_sd_iwrite32((adapter), (addr), (val), __func__, __LINE__) -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+#else /* DBG_IO */ -+#define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr)) -+#define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr)) -+#define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr)) -+#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) -+#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) -+#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) -+ -+#define rtw_write8(adapter, addr, val) _rtw_write8((adapter), (addr), (val)) -+#define rtw_write16(adapter, addr, val) _rtw_write16((adapter), (addr), (val)) -+#define rtw_write32(adapter, addr, val) _rtw_write32((adapter), (addr), (val)) -+#define rtw_writeN(adapter, addr, length, data) _rtw_writeN((adapter), (addr), (length), (data)) -+ -+#define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) -+#define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) -+#define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) -+ -+#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), (addr), (cnt), (mem)) -+#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port((adapter), (addr), (cnt), (mem)) -+#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) -+#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter)) -+ -+#ifdef CONFIG_SDIO_HCI -+#define rtw_sd_f0_read8(adapter, addr) _rtw_sd_f0_read8((adapter), (addr)) -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+#define rtw_sd_iread8(adapter, addr) _rtw_sd_iread8((adapter), (addr)) -+#define rtw_sd_iread16(adapter, addr) _rtw_sd_iread16((adapter), (addr)) -+#define rtw_sd_iread32(adapter, addr) _rtw_sd_iread32((adapter), (addr)) -+#define rtw_sd_iwrite8(adapter, addr, val) _rtw_sd_iwrite8((adapter), (addr), (val)) -+#define rtw_sd_iwrite16(adapter, addr, val) _rtw_sd_iwrite16((adapter), (addr), (val)) -+#define rtw_sd_iwrite32(adapter, addr, val) _rtw_sd_iwrite32((adapter), (addr), (val)) -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+#endif /* DBG_IO */ -+ -+extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem); -+ -+/* ioreq */ -+extern void ioreq_read8(_adapter *adapter, u32 addr, u8 *pval); -+extern void ioreq_read16(_adapter *adapter, u32 addr, u16 *pval); -+extern void ioreq_read32(_adapter *adapter, u32 addr, u32 *pval); -+extern void ioreq_write8(_adapter *adapter, u32 addr, u8 val); -+extern void ioreq_write16(_adapter *adapter, u32 addr, u16 val); -+extern void ioreq_write32(_adapter *adapter, u32 addr, u32 val); -+ -+ -+extern uint async_read8(_adapter *adapter, u32 addr, u8 *pbuff, -+ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); -+extern uint async_read16(_adapter *adapter, u32 addr, u8 *pbuff, -+ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); -+extern uint async_read32(_adapter *adapter, u32 addr, u8 *pbuff, -+ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); -+ -+extern void async_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -+extern void async_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -+ -+extern void async_write8(_adapter *adapter, u32 addr, u8 val, -+ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); -+extern void async_write16(_adapter *adapter, u32 addr, u16 val, -+ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); -+extern void async_write32(_adapter *adapter, u32 addr, u32 val, -+ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); -+ -+extern void async_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -+extern void async_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -+ -+ -+int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter, struct _io_ops *pops)); -+ -+ -+extern uint alloc_io_queue(_adapter *adapter); -+extern void free_io_queue(_adapter *adapter); -+extern void async_bus_io(struct io_queue *pio_q); -+extern void bus_sync_io(struct io_queue *pio_q); -+extern u32 _ioreq2rwmem(struct io_queue *pio_q); -+ -+/* -+#define RTL_R8(reg) rtw_read8(padapter, reg) -+#define RTL_R16(reg) rtw_read16(padapter, reg) -+#define RTL_R32(reg) rtw_read32(padapter, reg) -+#define RTL_W8(reg, val8) rtw_write8(padapter, reg, val8) -+#define RTL_W16(reg, val16) rtw_write16(padapter, reg, val16) -+#define RTL_W32(reg, val32) rtw_write32(padapter, reg, val32) -+*/ -+ -+/* -+#define RTL_W8_ASYNC(reg, val8) rtw_write32_async(padapter, reg, val8) -+#define RTL_W16_ASYNC(reg, val16) rtw_write32_async(padapter, reg, val16) -+#define RTL_W32_ASYNC(reg, val32) rtw_write32_async(padapter, reg, val32) -+ -+#define RTL_WRITE_BB(reg, val32) phy_SetUsbBBReg(padapter, reg, val32) -+#define RTL_READ_BB(reg) phy_QueryUsbBBReg(padapter, reg) -+*/ -+ -+#define PlatformEFIOWrite1Byte(_a, _b, _c) \ -+ rtw_write8(_a, _b, _c) -+#define PlatformEFIOWrite2Byte(_a, _b, _c) \ -+ rtw_write16(_a, _b, _c) -+#define PlatformEFIOWrite4Byte(_a, _b, _c) \ -+ rtw_write32(_a, _b, _c) -+ -+#define PlatformEFIORead1Byte(_a, _b) \ -+ rtw_read8(_a, _b) -+#define PlatformEFIORead2Byte(_a, _b) \ -+ rtw_read16(_a, _b) -+#define PlatformEFIORead4Byte(_a, _b) \ -+ rtw_read32(_a, _b) -+ -+#endif /* _RTL8711_IO_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_ioctl.h b/drivers/staging/rtl8723cs/include/rtw_ioctl.h -new file mode 100644 -index 000000000000..1143d97104d8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_ioctl.h -@@ -0,0 +1,47 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_IOCTL_H_ -+#define _RTW_IOCTL_H_ -+ -+enum oid_type { -+ QUERY_OID, -+ SET_OID -+}; -+ -+struct oid_par_priv { -+ void *adapter_context; -+ NDIS_OID oid; -+ void *information_buf; -+ u32 information_buf_len; -+ u32 *bytes_rw; -+ u32 *bytes_needed; -+ enum oid_type type_of_oid; -+ u32 dbg; -+}; -+ -+#if defined(PLATFORM_LINUX) && defined(CONFIG_WIRELESS_EXT) -+extern struct iw_handler_def rtw_handlers_def; -+#endif -+ -+extern void rtw_request_wps_pbc_event(_adapter *padapter); -+ -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+extern int rtw_vendor_ie_get_raw_data(struct net_device *, u32, char *, u32); -+extern int rtw_vendor_ie_get_data(struct net_device*, int , char*); -+extern int rtw_vendor_ie_get(struct net_device *, struct iw_request_info *, union iwreq_data *, char *); -+extern int rtw_vendor_ie_set(struct net_device*, struct iw_request_info*, union iwreq_data*, char*); -+#endif -+ -+#endif /* #ifndef __INC_CEINFO_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_ioctl_query.h b/drivers/staging/rtl8723cs/include/rtw_ioctl_query.h -new file mode 100644 -index 000000000000..7badcddfbbd4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_ioctl_query.h -@@ -0,0 +1,19 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_IOCTL_QUERY_H_ -+#define _RTW_IOCTL_QUERY_H_ -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_ioctl_set.h b/drivers/staging/rtl8723cs/include/rtw_ioctl_set.h -new file mode 100644 -index 000000000000..82b4c182d882 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_ioctl_set.h -@@ -0,0 +1,40 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_IOCTL_SET_H_ -+#define __RTW_IOCTL_SET_H_ -+ -+u8 rtw_set_802_11_authentication_mode(_adapter *pdapter, NDIS_802_11_AUTHENTICATION_MODE authmode); -+u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid); -+u8 rtw_set_802_11_add_wep(_adapter *padapter, NDIS_802_11_WEP *wep); -+u8 rtw_set_802_11_disassociate(_adapter *padapter); -+u8 rtw_set_802_11_bssid_list_scan(_adapter *padapter, struct sitesurvey_parm *pparm); -+#ifdef CONFIG_RTW_ACS -+u8 rtw_set_acs_sitesurvey(_adapter *adapter); -+#endif -+u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, u8 flags); -+u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid); -+u8 rtw_set_802_11_connect(_adapter *padapter, -+ u8 *bssid, NDIS_802_11_SSID *ssid, u16 ch); -+ -+u8 rtw_validate_bssid(u8 *bssid); -+u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid); -+ -+u16 rtw_get_cur_max_rate(_adapter *adapter); -+int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode); -+int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan); -+int rtw_set_country(_adapter *adapter, const char *country_code); -+int rtw_set_band(_adapter *adapter, u8 band); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_iol.h b/drivers/staging/rtl8723cs/include/rtw_iol.h -new file mode 100644 -index 000000000000..fa35a59c75c7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_iol.h -@@ -0,0 +1,131 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_IOL_H_ -+#define __RTW_IOL_H_ -+ -+ -+struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter); -+int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len); -+int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary); -+int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt); -+bool rtw_IOL_applied(ADAPTER *adapter); -+int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us); -+int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms); -+int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); -+ -+ -+#ifdef CONFIG_IOL_NEW_GENERATION -+#define IOREG_CMD_END_LEN 4 -+ -+struct ioreg_cfg { -+ u8 length; -+ u8 cmd_id; -+ u16 address; -+ u32 data; -+ u32 mask; -+}; -+enum ioreg_cmd { -+ IOREG_CMD_LLT = 0x01, -+ IOREG_CMD_REFUSE = 0x02, -+ IOREG_CMD_EFUSE_PATH = 0x03, -+ IOREG_CMD_WB_REG = 0x04, -+ IOREG_CMD_WW_REG = 0x05, -+ IOREG_CMD_WD_REG = 0x06, -+ IOREG_CMD_W_RF = 0x07, -+ IOREG_CMD_DELAY_US = 0x10, -+ IOREG_CMD_DELAY_MS = 0x11, -+ IOREG_CMD_END = 0xFF, -+}; -+void read_efuse_from_txpktbuf(ADAPTER *adapter, int bcnhead, u8 *content, u16 *size); -+ -+int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask); -+int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask); -+int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask); -+int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask); -+#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value, mask) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), (mask)) -+#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value, mask) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), (mask)) -+#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value, mask) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), (mask)) -+#define rtw_IOL_append_WRF_cmd(xmit_frame, rf_path, addr, value, mask) _rtw_IOL_append_WRF_cmd((xmit_frame), (rf_path), (addr), (value), (mask)) -+ -+u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame); -+void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter, int buf_len, u8 *pbuf); -+ -+#ifdef CONFIG_IOL_IOREG_CFG_DBG -+struct cmd_cmp { -+ u16 addr; -+ u32 value; -+}; -+#endif -+ -+#else /* CONFIG_IOL_NEW_GENERATION */ -+ -+typedef struct _io_offload_cmd { -+ u8 rsvd0; -+ u8 cmd; -+ u16 address; -+ u32 value; -+} IO_OFFLOAD_CMD, IOL_CMD; -+ -+#define IOL_CMD_LLT 0x00 -+/* #define IOL_CMD_R_EFUSE 0x01 */ -+#define IOL_CMD_WB_REG 0x02 -+#define IOL_CMD_WW_REG 0x03 -+#define IOL_CMD_WD_REG 0x04 -+/* #define IOL_CMD_W_RF 0x05 */ -+#define IOL_CMD_DELAY_US 0x80 -+#define IOL_CMD_DELAY_MS 0x81 -+/* #define IOL_CMD_DELAY_S 0x82 */ -+#define IOL_CMD_END 0x83 -+ -+/***************************************************** -+CMD Address Value -+(B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB) -+****************************************************** -+IOL_CMD_LLT - B7: PGBNDY -+IOL_CMD_R_EFUSE - - -+IOL_CMD_WB_REG 0x0~0xFFFF B7 -+IOL_CMD_WW_REG 0x0~0xFFFF B6~B7 -+IOL_CMD_WD_REG 0x0~0xFFFF B4~B7 -+IOL_CMD_W_RF RF Reg B5~B7 -+IOL_CMD_DELAY_US - B6~B7 -+IOL_CMD_DELAY_MS - B6~B7 -+IOL_CMD_DELAY_S - B6~B7 -+IOL_CMD_END - - -+******************************************************/ -+int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value); -+int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value); -+int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value); -+ -+ -+int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms); -+int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms); -+ -+#ifdef DBG_IO -+int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line); -+int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line); -+int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line); -+#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) -+#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) -+#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) -+#else -+#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value)) -+#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value)) -+#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value)) -+#endif /* DBG_IO */ -+#endif /* CONFIG_IOL_NEW_GENERATION */ -+ -+ -+ -+#endif /* __RTW_IOL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_mbo.h b/drivers/staging/rtl8723cs/include/rtw_mbo.h -new file mode 100644 -index 000000000000..9524cb6c6e11 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_mbo.h -@@ -0,0 +1,114 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __RTW_MBO_H_ -+#define __RTW_MBO_H_ -+ -+#define rtw_mbo_wifi_logo_test(a) ((a->registrypriv.wifi_spec) == 1) -+ -+#define rtw_mbo_set_ext_cap_internw(_pEleStart, _val) \ -+ SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart))+3, 7, 1, _val) -+ -+#define rtw_mbo_wnm_notification_req(c, a) \ -+ (((c) == RTW_WLAN_CATEGORY_WNM) && \ -+ (((a) == RTW_WLAN_ACTION_WNM_NOTIF_REQ))) -+ -+/* IEEE Std 802.11-2016 Table 9-46 - Status codes */ -+#define RTW_ASSOC_DENIED_NO_MORE_STAS 17 -+#define RTW_ASSOC_REFUSED_TEMPORARILY 30 -+ -+/* MBO-OCE Information Element */ -+#define RTW_MBO_EID WLAN_EID_VENDOR_SPECIFIC -+#define RTW_MBO_OUI 0x506F9A -+#define RTW_MBO_OUI_TYPE 0x16 -+ -+/* Non-preferred Channel Report */ -+#define RTW_MBO_ATTR_NPREF_CH_RPT_ID 0x2 -+/* Cellular Data Capabilities */ -+#define RTW_MBO_ATTR_CELL_DATA_CAP_ID 0x3 -+/* Association Disallowed */ -+#define RTW_MBO_ATTR_ASSOC_DISABLED_ID 0x4 -+/* Transition Reason Code */ -+#define RTW_MBO_ATTR_TRANS_RES_ID 0x6 -+/* Transition Rejection Reason Code */ -+#define RTW_MBO_ATTR_TRANS_REJ_ID 0x7 -+/* Association Retry Delay */ -+#define RTW_MBO_ATTR_TASSOC_RETRY_ID 0x8 -+ -+#define RTW_MBO_MAX_CH_LIST_NUM MAX_CHANNEL_NUM -+ -+#define RTW_MBO_MAX_CH_RPT_NUM 32 -+ -+struct npref_ch { -+ u8 op_class; -+ u8 chs[RTW_MBO_MAX_CH_LIST_NUM]; -+ size_t nm_of_ch; -+ u8 preference; -+ u8 reason; -+}; -+ -+struct npref_ch_rtp { -+ struct npref_ch ch_rpt[RTW_MBO_MAX_CH_RPT_NUM]; -+ size_t nm_of_rpt; -+}; -+ -+void rtw_mbo_build_cell_data_cap_attr( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib); -+ -+void rtw_mbo_update_ie_data( -+ _adapter *padapter, u8 *pie, u32 ie_len); -+ -+void rtw_mbo_build_supp_op_class_elem( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib); -+ -+void rtw_mbo_build_npref_ch_rpt_attr( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib); -+ -+void rtw_mbo_build_trans_reject_reason_attr( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib, u8 *pres); -+ -+u8 rtw_mbo_disallowed_network(struct wlan_network *pnetwork); -+ -+void rtw_mbo_build_exented_cap( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib); -+ -+ssize_t rtw_mbo_proc_non_pref_chans_set( -+ struct file *pfile, const char __user *buffer, -+ size_t count, loff_t *pos, void *pdata); -+ -+int rtw_mbo_proc_non_pref_chans_get( -+ struct seq_file *m, void *v); -+ -+ssize_t rtw_mbo_proc_cell_data_set( -+ struct file *pfile, const char __user *buffer, -+ size_t count, loff_t *pos, void *pdata); -+ -+int rtw_mbo_proc_cell_data_get( -+ struct seq_file *m, void *v); -+ -+void rtw_mbo_wnm_notification_parsing( -+ _adapter *padapter, const u8 *pdata, size_t data_len); -+ -+void rtw_mbo_build_wnm_notification( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib); -+ -+void rtw_mbo_build_probe_req_ies( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib); -+ -+void rtw_mbo_build_assoc_req_ies( -+ _adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib); -+ -+#endif /* __RTW_MBO_H_ */ -+ -diff --git a/drivers/staging/rtl8723cs/include/rtw_mcc.h b/drivers/staging/rtl8723cs/include/rtw_mcc.h -new file mode 100644 -index 000000000000..5d2198b03063 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_mcc.h -@@ -0,0 +1,315 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifdef CONFIG_MCC_MODE -+ -+#ifndef _RTW_MCC_H_ -+#define _RTW_MCC_H_ -+ -+#include /* PADAPTER */ -+ -+#define MCC_STATUS_PROCESS_MCC_START_SETTING BIT0 -+#define MCC_STATUS_PROCESS_MCC_STOP_SETTING BIT1 -+#define MCC_STATUS_NEED_MCC BIT2 -+#define MCC_STATUS_DOING_MCC BIT3 -+ -+ -+#define MCC_SWCH_FW_EARLY_TIME 10 /* ms */ -+#define MCC_EXPIRE_TIME 50 /* ms */ -+#define MCC_TOLERANCE_TIME 2 /* 2*2 = 4s */ -+#define MCC_UPDATE_PARAMETER_THRESHOLD 5 /* ms */ -+ -+#define MCC_ROLE_STA_GC_MGMT_QUEUE_MACID 0 -+#define MCC_ROLE_SOFTAP_GO_MGMT_QUEUE_MACID 1 -+ -+/* Lower for stop, Higher for start */ -+#define MCC_SETCMD_STATUS_STOP_DISCONNECT 0x0 -+#define MCC_SETCMD_STATUS_STOP_SCAN_START 0x1 -+#define MCC_SETCMD_STATUS_START_CONNECT 0x80 -+#define MCC_SETCMD_STATUS_START_SCAN_DONE 0x81 -+ -+/* -+* depenad platform or customer requirement(TP unit:Mbps), -+* must be provided by PM or sales or product document -+* too large value means not to limit tx bytes (current for ap mode) -+* NOTE: following values ref from test results -+*/ -+#define MCC_AP_BW20_TARGET_TX_TP (300) -+#define MCC_AP_BW40_TARGET_TX_TP (300) -+#define MCC_AP_BW80_TARGET_TX_TP (300) -+#define MCC_STA_BW20_TARGET_TX_TP (35) -+#define MCC_STA_BW40_TARGET_TX_TP (70) -+#define MCC_STA_BW80_TARGET_TX_TP (140) -+#define MCC_SINGLE_TX_CRITERIA 5 /* Mbps */ -+ -+#define MAX_MCC_NUM 2 -+#ifdef CONFIG_RTL8822C -+#define DBG_MCC_REG_NUM 3 -+#else -+#define DBG_MCC_REG_NUM 4 -+#endif -+#define DBG_MCC_RF_REG_NUM 1 -+ -+#define MCC_STOP(adapter) (adapter->mcc_adapterpriv.mcc_tx_stop) -+#define MCC_EN(adapter) (adapter_to_dvobj(adapter)->mcc_objpriv.en_mcc) -+#define adapter_to_mccobjpriv(adapter) (&(adapter_to_dvobj(adapter)->mcc_objpriv)) -+#define SET_MCC_EN_FLAG(adapter, flag)\ -+ do { \ -+ adapter_to_dvobj(adapter)->mcc_objpriv.en_mcc = (flag); \ -+ } while (0) -+#define SET_MCC_DURATION(adapter, val)\ -+ do { \ -+ adapter_to_dvobj(adapter)->mcc_objpriv.duration = (val); \ -+ } while (0) -+#define SET_MCC_RUNTIME_DURATION(adapter, flag)\ -+ do { \ -+ adapter_to_dvobj(adapter)->mcc_objpriv.enable_runtime_duration = (flag); \ -+ } while (0) -+ -+#define SET_MCC_PHYDM_OFFLOAD(adapter, flag)\ -+ do { \ -+ adapter_to_dvobj(adapter)->mcc_objpriv.mcc_phydm_offload = (flag); \ -+ } while (0) -+ -+#ifdef CONFIG_MCC_PHYDM_OFFLOAD -+enum mcc_cfg_phydm_ops { -+ MCC_CFG_PHYDM_OFFLOAD = 0, -+ MCC_CFG_PHYDM_RF_CH, -+ MCC_CFG_PHYDM_ADD_CLIENT, -+ MCC_CFG_PHYDM_REMOVE_CLIENT, -+ MCC_CFG_PHYDM_START, -+ MCC_CFG_PHYDM_STOP, -+ MCC_CFG_PHYDM_DUMP, -+ MCC_CFG_PHYDM_MAX, -+}; -+#endif -+ -+enum rtw_mcc_cmd_id { -+ MCC_CMD_WK_CID = 0, -+ MCC_SET_DURATION_WK_CID, -+ MCC_GET_DBG_REG_WK_CID, -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ MCC_SET_PHYDM_OFFLOAD_WK_CID, -+ #endif -+}; -+ -+/* Represent Channel Tx Null setting */ -+enum mcc_channel_tx_null { -+ MCC_ENABLE_TX_NULL = 0, -+ MCC_DISABLE_TX_NULL = 1, -+}; -+ -+/* Represent C2H Report setting */ -+enum mcc_c2h_report { -+ MCC_C2H_REPORT_DISABLE = 0, -+ MCC_C2H_REPORT_FAIL_STATUS = 1, -+ MCC_C2H_REPORT_ALL_STATUS = 2, -+}; -+ -+/* Represent Channel Scan */ -+enum mcc_channel_scan { -+ MCC_CHIDX = 0, -+ MCC_SCANCH_RSVD_LOC = 1, -+}; -+ -+/* Represent FW status report of channel switch */ -+enum mcc_status_rpt { -+ MCC_RPT_SUCCESS = 0, -+ MCC_RPT_TXNULL_FAIL = 1, -+ MCC_RPT_STOPMCC = 2, -+ MCC_RPT_READY = 3, -+ MCC_RPT_SWICH_CHANNEL_NOTIFY = 7, -+ MCC_RPT_UPDATE_NOA_START_TIME = 8, -+ MCC_RPT_TSF = 9, -+ MCC_RPT_MAX, -+}; -+ -+enum mcc_role { -+ MCC_ROLE_STA = 0, -+ MCC_ROLE_AP = 1, -+ MCC_ROLE_GC = 2, -+ MCC_ROLE_GO = 3, -+ MCC_ROLE_MAX, -+}; -+ -+struct mcc_iqk_backup { -+ u16 TX_X; -+ u16 TX_Y; -+ u16 RX_X; -+ u16 RX_Y; -+}; -+ -+enum mcc_duration_setting { -+ MCC_DURATION_MAPPING = 0, -+ MCC_DURATION_DIRECET = 1, -+}; -+ -+enum mcc_sched_mode { -+ MCC_FAIR_SCHEDULE = 0, -+ MCC_FAVOR_STA = 1, -+ MCC_FAVOR_P2P = 2, -+}; -+ -+/* mcc data for adapter */ -+struct mcc_adapter_priv { -+ u8 order; /* FW document, softap/AP must be 0 */ -+ enum mcc_role role; /* MCC role(AP,STA,GO,GC) */ -+ u8 mcc_duration; /* channel stay period, UNIT:1TU */ -+ -+ /* flow control */ -+ u8 mcc_tx_stop; /* check if tp stop or not */ -+ u8 mcc_tp_limit; /* check if tp limit or not */ -+ u32 mcc_target_tx_bytes_to_port; /* customer require */ -+ u32 mcc_tx_bytes_to_port; /* already tx to tx fifo (write port) */ -+ -+ /* data from kernel to check if enqueue data or netif stop queue */ -+ u32 mcc_tp; -+ u64 mcc_tx_bytes_from_kernel; -+ u64 mcc_last_tx_bytes_from_kernel; -+ -+ /* Backup IQK value for MCC */ -+ struct mcc_iqk_backup mcc_iqk_arr[MAX_RF_PATH]; -+ -+ /* mgmt queue macid to avoid RA issue */ -+ u8 mgmt_queue_macid; -+ -+ /* set macid bitmap to let fw know which macid should be tx pause */ -+ /* all interface share total 16 macid */ -+ u16 mcc_macid_bitmap; -+ -+ /* use for NoA start time (unit: mircoseconds) */ -+ u32 noa_start_time; -+ -+ u8 p2p_go_noa_ie[MAX_P2P_IE_LEN]; -+ u32 p2p_go_noa_ie_len; -+ u64 tsf; -+#ifdef CONFIG_TDLS -+ u8 backup_tdls_en; -+#endif /* CONFIG_TDLS */ -+ -+ u8 null_early; -+ u8 null_rty_num; -+}; -+ -+struct mcc_obj_priv { -+ u8 en_mcc; /* enable MCC or not */ -+ u8 duration; /* store duration(%) from registry, for primary adapter */ -+ u8 interval; -+ u8 start_time; -+ u8 mcc_c2h_status; -+ u8 cur_mcc_success_cnt; /* used for check mcc switch channel success */ -+ u8 prev_mcc_success_cnt; /* used for check mcc switch channel success */ -+ u8 mcc_tolerance_time; /* used for detect mcc switch channel success */ -+ u8 mcc_loc_rsvd_paga[MAX_MCC_NUM]; /* mcc rsvd page */ -+ u8 mcc_status; /* mcc status stop or start .... */ -+ u8 policy_index; -+ u8 mcc_stop_threshold; -+ u8 current_order; -+ u8 last_tsfdiff; -+ systime mcc_launch_time; /* mcc launch time, used for starting detect mcc switch channel success */ -+ _mutex mcc_mutex; -+ _lock mcc_lock; -+ PADAPTER iface[MAX_MCC_NUM]; /* by order, use for mcc parameter cmd */ -+ struct submit_ctx mcc_sctx; -+ struct submit_ctx mcc_tsf_req_sctx; -+ _mutex mcc_tsf_req_mutex; -+ u8 mcc_tsf_req_sctx_order; /* record current order for mcc_tsf_req_sctx */ -+#ifdef CONFIG_MCC_MODE_V2 -+ u8 mcc_iqk_value_rsvd_page[3]; -+#endif /* CONFIG_MCC_MODE_V2 */ -+ u8 mcc_pwr_idx_rsvd_page[MAX_MCC_NUM]; -+ u8 enable_runtime_duration; -+ /* for LG */ -+ u8 mchan_sched_mode; -+ -+ _mutex mcc_dbg_reg_mutex; -+ u32 dbg_reg[DBG_MCC_REG_NUM]; -+ u32 dbg_reg_val[DBG_MCC_REG_NUM]; -+ u32 dbg_rf_reg[DBG_MCC_RF_REG_NUM]; -+ u32 dbg_rf_reg_val[DBG_MCC_RF_REG_NUM][MAX_RF_PATH]; -+ u8 mcc_phydm_offload; -+}; -+ -+/* backup IQK val */ -+void rtw_hal_mcc_restore_iqk_val(PADAPTER padapter); -+ -+/* check mcc status */ -+u8 rtw_hal_check_mcc_status(PADAPTER padapter, u8 mcc_status); -+ -+/* set mcc status */ -+void rtw_hal_set_mcc_status(PADAPTER padapter, u8 mcc_status); -+ -+/* clear mcc status */ -+void rtw_hal_clear_mcc_status(PADAPTER padapter, u8 mcc_status); -+ -+/* dl mcc rsvd page */ -+u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index -+ , u8 tx_desc, u32 page_size, u8 *total_page_num, RSVDPAGE_LOC *rsvd_page_loc, u8 *page_num); -+ -+/* handle C2H */ -+void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf); -+ -+/* switch channel successfully or not */ -+void rtw_hal_mcc_sw_status_check(PADAPTER padapter); -+ -+/* change some scan flags under site survey */ -+u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset); -+ -+/* record data kernel TX to driver to check MCC concurrent TX */ -+void rtw_hal_mcc_calc_tx_bytes_from_kernel(PADAPTER padapter, u32 len); -+ -+/* record data to port to let driver do flow ctrl */ -+void rtw_hal_mcc_calc_tx_bytes_to_port(PADAPTER padapter, u32 len); -+ -+/* check stop write port or not */ -+u8 rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter); -+ -+u8 rtw_hal_set_mcc_setting_scan_start(PADAPTER padapter); -+ -+u8 rtw_hal_set_mcc_setting_scan_complete(PADAPTER padapter); -+ -+u8 rtw_hal_set_mcc_setting_start_bss_network(PADAPTER padapter, u8 chbw_grouped); -+ -+u8 rtw_hal_set_mcc_setting_disconnect(PADAPTER padapter); -+ -+u8 rtw_hal_set_mcc_setting_join_done_chk_ch(PADAPTER padapter); -+ -+u8 rtw_hal_set_mcc_setting_chk_start_clnt_join(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset, u8 chbw_allow); -+ -+void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj); -+ -+void update_mcc_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib); -+ -+u8 rtw_hal_mcc_link_status_chk(_adapter *padapter, const char *msg); -+ -+void rtw_hal_mcc_issue_null_data(_adapter *padapter, u8 chbw_allow, u8 ps_mode); -+ -+u8 *rtw_hal_mcc_append_go_p2p_ie(PADAPTER padapter, u8 *pframe, u32 *len); -+ -+void rtw_hal_dump_mcc_policy_table(void *sel); -+ -+void rtw_hal_mcc_update_macid_bitmap(PADAPTER padapter, int mac_id, u8 add); -+ -+void rtw_hal_mcc_process_noa(PADAPTER padapter); -+ -+void rtw_hal_mcc_parameter_init(PADAPTER padapter); -+ -+u8 rtw_mcc_cmd_hdl(PADAPTER adapter, u8 type, const u8 *val); -+ -+u8 rtw_set_mcc_duration_cmd(_adapter *adapter, u8 type, u8 val); -+#ifdef CONFIG_MCC_PHYDM_OFFLOAD -+u8 rtw_set_mcc_phydm_offload_enable_cmd(PADAPTER adapter, u8 enable, u8 enqueue); -+#endif /* CONFIG_MCC_PHYDM_OFFLOAD */ -+#endif /* _RTW_MCC_H_ */ -+#endif /* CONFIG_MCC_MODE */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_mem.h b/drivers/staging/rtl8723cs/include/rtw_mem.h -new file mode 100644 -index 000000000000..9e33ed519ed6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_mem.h -@@ -0,0 +1,29 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_MEM_H__ -+#define __RTW_MEM_H__ -+ -+#include -+#include -+#include -+ -+u16 rtw_rtkm_get_buff_size(void); -+u8 rtw_rtkm_get_nr_recv_skb(void); -+struct u8 *rtw_alloc_revcbuf_premem(void); -+struct sk_buff *rtw_alloc_skb_premem(u16 in_size); -+int rtw_free_skb_premem(struct sk_buff *pskb); -+ -+ -+#endif /* __RTW_MEM_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_mi.h b/drivers/staging/rtl8723cs/include/rtw_mi.h -new file mode 100644 -index 000000000000..0eb8b53b8882 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_mi.h -@@ -0,0 +1,305 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_MI_H_ -+#define __RTW_MI_H_ -+ -+void rtw_mi_update_union_chan_inf(_adapter *adapter, u8 ch, u8 offset , u8 bw); -+u8 rtw_mi_stayin_union_ch_chk(_adapter *adapter); -+u8 rtw_mi_stayin_union_band_chk(_adapter *adapter); -+ -+int rtw_mi_get_ch_setting_union_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, u8 *ch, u8 *bw, u8 *offset); -+int rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset); -+int rtw_mi_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset); -+ -+struct mi_state { -+ u8 sta_num; /* WIFI_STATION_STATE */ -+ u8 ld_sta_num; /* WIFI_STATION_STATE && WIFI_ASOC_STATE */ -+ u8 lg_sta_num; /* WIFI_STATION_STATE && WIFI_UNDER_LINKING */ -+#ifdef CONFIG_TDLS -+ u8 ld_tdls_num; /* adapter.tdlsinfo.link_established */ -+#endif -+#ifdef CONFIG_AP_MODE -+ u8 ap_num; /* WIFI_AP_STATE && WIFI_ASOC_STATE */ -+ u8 starting_ap_num; /*WIFI_FW_AP_STATE*/ -+ u8 ld_ap_num; /* WIFI_AP_STATE && WIFI_ASOC_STATE && asoc_sta_count > 2 */ -+#endif -+ u8 adhoc_num; /* (WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE) && WIFI_ASOC_STATE */ -+ u8 ld_adhoc_num; /* (WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE) && WIFI_ASOC_STATE && asoc_sta_count > 2 */ -+#ifdef CONFIG_RTW_MESH -+ u8 mesh_num; /* WIFI_MESH_STATE && WIFI_ASOC_STATE */ -+ u8 ld_mesh_num; /* WIFI_MESH_STATE && WIFI_ASOC_STATE && asoc_sta_count > 2 */ -+#endif -+ u8 scan_num; /* WIFI_UNDER_SURVEY */ -+ u8 scan_enter_num; /* WIFI_UNDER_SURVEY && !SCAN_DISABLE && !SCAN_BACK_OP */ -+ u8 uwps_num; /* WIFI_UNDER_WPS */ -+#ifdef CONFIG_IOCTL_CFG80211 -+ u8 roch_num; -+ u8 mgmt_tx_num; -+#endif -+#ifdef CONFIG_P2P -+ u8 p2p_device_num; -+ u8 p2p_gc; -+ u8 p2p_go; -+#endif -+}; -+ -+#define MSTATE_STA_NUM(_mstate) ((_mstate)->sta_num) -+#define MSTATE_STA_LD_NUM(_mstate) ((_mstate)->ld_sta_num) -+#define MSTATE_STA_LG_NUM(_mstate) ((_mstate)->lg_sta_num) -+ -+#ifdef CONFIG_TDLS -+#define MSTATE_TDLS_LD_NUM(_mstate) ((_mstate)->ld_tdls_num) -+#else -+#define MSTATE_TDLS_LD_NUM(_mstate) 0 -+#endif -+ -+#ifdef CONFIG_AP_MODE -+#define MSTATE_AP_NUM(_mstate) ((_mstate)->ap_num) -+#define MSTATE_AP_STARTING_NUM(_mstate) ((_mstate)->starting_ap_num) -+#define MSTATE_AP_LD_NUM(_mstate) ((_mstate)->ld_ap_num) -+#else -+#define MSTATE_AP_NUM(_mstate) 0 -+#define MSTATE_AP_STARTING_NUM(_mstate) 0 -+#define MSTATE_AP_LD_NUM(_mstate) 0 -+#endif -+ -+#define MSTATE_ADHOC_NUM(_mstate) ((_mstate)->adhoc_num) -+#define MSTATE_ADHOC_LD_NUM(_mstate) ((_mstate)->ld_adhoc_num) -+ -+#ifdef CONFIG_RTW_MESH -+#define MSTATE_MESH_NUM(_mstate) ((_mstate)->mesh_num) -+#define MSTATE_MESH_LD_NUM(_mstate) ((_mstate)->ld_mesh_num) -+#else -+#define MSTATE_MESH_NUM(_mstate) 0 -+#define MSTATE_MESH_LD_NUM(_mstate) 0 -+#endif -+ -+#define MSTATE_SCAN_NUM(_mstate) ((_mstate)->scan_num) -+#define MSTATE_SCAN_ENTER_NUM(_mstate) ((_mstate)->scan_enter_num) -+#define MSTATE_WPS_NUM(_mstate) ((_mstate)->uwps_num) -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+#define MSTATE_ROCH_NUM(_mstate) ((_mstate)->roch_num) -+#else -+#define MSTATE_ROCH_NUM(_mstate) 0 -+#endif -+ -+#ifdef CONFIG_P2P -+#define MSTATE_P2P_DV_NUM(_mstate) ((_mstate)->p2p_device_num) -+#define MSTATE_P2P_GC_NUM(_mstate) ((_mstate)->p2p_gc) -+#define MSTATE_P2P_GO_NUM(_mstate) ((_mstate)->p2p_go) -+#else -+#define MSTATE_P2P_DV_NUM(_mstate) 0 -+#define MSTATE_P2P_GC_NUM(_mstate) 0 -+#define MSTATE_P2P_GO_NUM(_mstate) 0 -+#endif -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+#define MSTATE_MGMT_TX_NUM(_mstate) ((_mstate)->mgmt_tx_num) -+#else -+#define MSTATE_MGMT_TX_NUM(_mstate) 0 -+#endif -+ -+#define rtw_mi_get_union_chan(adapter) ((adapter_to_dvobj(adapter)->union_ch) ? (adapter_to_dvobj(adapter)->union_ch) : (adapter_to_dvobj(adapter)->union_ch_bak)) -+#define rtw_mi_get_union_bw(adapter) ((adapter_to_dvobj(adapter)->union_ch) ? (adapter_to_dvobj(adapter)->union_bw) : (adapter_to_dvobj(adapter)->union_bw_bak)) -+#define rtw_mi_get_union_offset(adapter) ((adapter_to_dvobj(adapter)->union_ch) ? (adapter_to_dvobj(adapter)->union_offset) : (adapter_to_dvobj(adapter)->union_offset_bak)) -+ -+#define rtw_mi_get_assoced_sta_num(adapter) DEV_STA_LD_NUM(adapter_to_dvobj(adapter)) -+#define rtw_mi_get_ap_num(adapter) DEV_AP_NUM(adapter_to_dvobj(adapter)) -+#define rtw_mi_get_mesh_num(adapter) DEV_MESH_NUM(adapter_to_dvobj(adapter)) -+u8 rtw_mi_get_assoc_if_num(_adapter *adapter); -+ -+/* For now, not return union_ch/bw/offset */ -+void rtw_mi_status_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, struct mi_state *mstate); -+void rtw_mi_status(_adapter *adapter, struct mi_state *mstate); -+void rtw_mi_status_no_self(_adapter *adapter, struct mi_state *mstate); -+void rtw_mi_status_no_others(_adapter *adapter, struct mi_state *mstate); -+ -+/* For now, not handle union_ch/bw/offset */ -+void rtw_mi_status_merge(struct mi_state *d, struct mi_state *a); -+ -+void rtw_mi_update_iface_status(struct mlme_priv *pmlmepriv, sint state); -+ -+u8 rtw_mi_netif_stop_queue(_adapter *padapter); -+u8 rtw_mi_buddy_netif_stop_queue(_adapter *padapter); -+ -+u8 rtw_mi_netif_wake_queue(_adapter *padapter); -+u8 rtw_mi_buddy_netif_wake_queue(_adapter *padapter); -+ -+u8 rtw_mi_netif_carrier_on(_adapter *padapter); -+u8 rtw_mi_buddy_netif_carrier_on(_adapter *padapter); -+u8 rtw_mi_netif_carrier_off(_adapter *padapter); -+u8 rtw_mi_buddy_netif_carrier_off(_adapter *padapter); -+ -+u8 rtw_mi_netif_caroff_qstop(_adapter *padapter); -+u8 rtw_mi_buddy_netif_caroff_qstop(_adapter *padapter); -+u8 rtw_mi_netif_caron_qstart(_adapter *padapter); -+u8 rtw_mi_buddy_netif_caron_qstart(_adapter *padapter); -+ -+void rtw_mi_scan_abort(_adapter *adapter, bool bwait); -+void rtw_mi_buddy_scan_abort(_adapter *adapter, bool bwait); -+u32 rtw_mi_start_drv_threads(_adapter *adapter); -+u32 rtw_mi_buddy_start_drv_threads(_adapter *adapter); -+void rtw_mi_stop_drv_threads(_adapter *adapter); -+void rtw_mi_buddy_stop_drv_threads(_adapter *adapter); -+void rtw_mi_cancel_all_timer(_adapter *adapter); -+void rtw_mi_buddy_cancel_all_timer(_adapter *adapter); -+void rtw_mi_reset_drv_sw(_adapter *adapter); -+void rtw_mi_buddy_reset_drv_sw(_adapter *adapter); -+ -+extern void rtw_intf_start(_adapter *adapter); -+extern void rtw_intf_stop(_adapter *adapter); -+void rtw_mi_intf_start(_adapter *adapter); -+void rtw_mi_buddy_intf_start(_adapter *adapter); -+void rtw_mi_intf_stop(_adapter *adapter); -+void rtw_mi_buddy_intf_stop(_adapter *adapter); -+ -+#ifdef CONFIG_NEW_NETDEV_HDL -+u8 rtw_mi_hal_iface_init(_adapter *padapter); -+#endif -+void rtw_mi_suspend_free_assoc_resource(_adapter *adapter); -+void rtw_mi_buddy_suspend_free_assoc_resource(_adapter *adapter); -+ -+#ifdef CONFIG_SET_SCAN_DENY_TIMER -+void rtw_mi_set_scan_deny(_adapter *adapter, u32 ms); -+void rtw_mi_buddy_set_scan_deny(_adapter *adapter, u32 ms); -+#else -+#define rtw_mi_set_scan_deny(adapter, ms) do {} while (0) -+#define rtw_mi_buddy_set_scan_deny(adapter, ms) do {} while (0) -+#endif -+ -+u8 rtw_mi_is_scan_deny(_adapter *adapter); -+u8 rtw_mi_buddy_is_scan_deny(_adapter *adapter); -+ -+void rtw_mi_beacon_update(_adapter *padapter); -+void rtw_mi_buddy_beacon_update(_adapter *padapter); -+ -+#ifndef CONFIG_MI_WITH_MBSSID_CAM -+void rtw_mi_hal_dump_macaddr(void *sel, _adapter *padapter); -+void rtw_mi_buddy_hal_dump_macaddr(void *sel, _adapter *padapter); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+void rtw_mi_xmit_tasklet_schedule(_adapter *padapter); -+void rtw_mi_buddy_xmit_tasklet_schedule(_adapter *padapter); -+#endif -+ -+u8 rtw_mi_busy_traffic_check(_adapter *padapter); -+u8 rtw_mi_buddy_busy_traffic_check(_adapter *padapter); -+ -+u8 rtw_mi_check_mlmeinfo_state(_adapter *padapter, u32 state); -+u8 rtw_mi_buddy_check_mlmeinfo_state(_adapter *padapter, u32 state); -+ -+u8 rtw_mi_check_fwstate(_adapter *padapter, sint state); -+u8 rtw_mi_buddy_check_fwstate(_adapter *padapter, sint state); -+enum { -+ MI_LINKED, -+ MI_ASSOC, -+ MI_UNDER_WPS, -+ MI_AP_MODE, -+ MI_AP_ASSOC, -+ MI_ADHOC, -+ MI_ADHOC_ASSOC, -+ MI_MESH, -+ MI_MESH_ASSOC, -+ MI_STA_NOLINK, /* this is misleading, but not used now */ -+ MI_STA_LINKED, -+ MI_STA_LINKING, -+}; -+u8 rtw_mi_check_status(_adapter *adapter, u8 type); -+ -+void dump_dvobj_mi_status(void *sel, const char *fun_name, _adapter *adapter); -+#ifdef DBG_IFACE_STATUS -+#define DBG_IFACE_STATUS_DUMP(adapter) dump_dvobj_mi_status(RTW_DBGDUMP, __func__, adapter) -+#endif -+void dump_mi_status(void *sel, struct dvobj_priv *dvobj); -+ -+u8 rtw_mi_traffic_statistics(_adapter *padapter); -+u8 rtw_mi_check_miracast_enabled(_adapter *padapter); -+ -+#ifdef CONFIG_XMIT_THREAD_MODE -+u8 rtw_mi_check_pending_xmitbuf(_adapter *padapter); -+u8 rtw_mi_buddy_check_pending_xmitbuf(_adapter *padapter); -+#endif -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+#ifdef CONFIG_RTL8822B -+ #include -+#elif defined(CONFIG_RTL8822C) -+ #include -+#elif defined(CONFIG_RTL8723F) -+ #include -+#else -+ extern s32 _dequeue_writeport(PADAPTER padapter); -+#endif -+u8 rtw_mi_dequeue_writeport(_adapter *padapter); -+u8 rtw_mi_buddy_dequeue_writeport(_adapter *padapter); -+#endif -+ -+void rtw_mi_adapter_reset(_adapter *padapter); -+void rtw_mi_buddy_adapter_reset(_adapter *padapter); -+ -+u8 rtw_mi_dynamic_check_timer_handlder(_adapter *padapter); -+u8 rtw_mi_buddy_dynamic_check_timer_handlder(_adapter *padapter); -+ -+extern void rtw_iface_dynamic_chk_wk_hdl(_adapter *padapter); -+u8 rtw_mi_dynamic_chk_wk_hdl(_adapter *padapter); -+u8 rtw_mi_buddy_dynamic_chk_wk_hdl(_adapter *padapter); -+ -+u8 rtw_mi_os_xmit_schedule(_adapter *padapter); -+u8 rtw_mi_buddy_os_xmit_schedule(_adapter *padapter); -+ -+u8 rtw_mi_report_survey_event(_adapter *padapter, union recv_frame *precv_frame); -+u8 rtw_mi_buddy_report_survey_event(_adapter *padapter, union recv_frame *precv_frame); -+ -+extern void sreset_start_adapter(_adapter *padapter); -+extern void sreset_stop_adapter(_adapter *padapter); -+u8 rtw_mi_sreset_adapter_hdl(_adapter *padapter, u8 bstart); -+u8 rtw_mi_buddy_sreset_adapter_hdl(_adapter *padapter, u8 bstart); -+ -+#ifdef CONFIG_AP_MODE -+#if defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE) -+void rtw_mi_ap_info_restore(_adapter *adapter); -+#endif -+u8 rtw_mi_tx_beacon_hdl(_adapter *padapter); -+u8 rtw_mi_buddy_tx_beacon_hdl(_adapter *padapter); -+ -+u8 rtw_mi_set_tx_beacon_cmd(_adapter *padapter); -+u8 rtw_mi_buddy_set_tx_beacon_cmd(_adapter *padapter); -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_P2P -+u8 rtw_mi_p2p_chk_state(_adapter *padapter, enum P2P_STATE p2p_state); -+u8 rtw_mi_buddy_p2p_chk_state(_adapter *padapter, enum P2P_STATE p2p_state); -+u8 rtw_mi_stay_in_p2p_mode(_adapter *padapter); -+u8 rtw_mi_buddy_stay_in_p2p_mode(_adapter *padapter); -+#endif -+ -+_adapter *rtw_get_iface_by_id(_adapter *padapter, u8 iface_id); -+_adapter *rtw_get_iface_by_macddr(_adapter *padapter, const u8 *mac_addr); -+_adapter *rtw_get_iface_by_hwport(_adapter *padapter, u8 hw_port); -+ -+void rtw_mi_buddy_clone_bcmc_packet(_adapter *padapter, union recv_frame *precvframe, u8 *pphy_status); -+ -+#ifdef CONFIG_PCI_HCI -+/*API be create temporary for MI, caller is interrupt-handler, PCIE's interrupt handler cannot apply to multi-AP*/ -+_adapter *rtw_mi_get_ap_adapter(_adapter *padapter); -+#endif -+ -+u8 rtw_mi_get_ld_sta_ifbmp(_adapter *adapter); -+u8 rtw_mi_get_ap_mesh_ifbmp(_adapter *adapter); -+void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b); -+ -+#endif /*__RTW_MI_H_*/ -diff --git a/drivers/staging/rtl8723cs/include/rtw_mlme.h b/drivers/staging/rtl8723cs/include/rtw_mlme.h -new file mode 100644 -index 000000000000..e3095a562d6a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_mlme.h -@@ -0,0 +1,1238 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_MLME_H_ -+#define __RTW_MLME_H_ -+ -+ -+#define MAX_BSS_CNT 128 -+/* #define MAX_JOIN_TIMEOUT 2000 */ -+/* #define MAX_JOIN_TIMEOUT 2500 */ -+#define MAX_JOIN_TIMEOUT 6500 -+ -+/* Commented by Albert 20101105 -+ * Increase the scanning timeout because of increasing the SURVEY_TO value. */ -+#define SCANQUEUE_LIFETIME 20000 /* 20sec, unit:msec */ -+ -+#define MAX_UNASSOC_STA_CNT 128 -+#define UNASSOC_STA_LIFETIME_MS 60000 -+ -+/*pmlmepriv->fw_state*/ -+#define WIFI_NULL_STATE 0x00000000 -+#define WIFI_ASOC_STATE 0x00000001 /* Linked */ -+#define WIFI_REASOC_STATE 0x00000002 -+#define WIFI_SLEEP_STATE 0x00000004 -+#define WIFI_STATION_STATE 0x00000008 -+#define WIFI_AP_STATE 0x00000010 -+#define WIFI_ADHOC_STATE 0x00000020 -+#define WIFI_ADHOC_MASTER_STATE 0x00000040 -+#define WIFI_UNDER_LINKING 0x00000080 -+#define WIFI_UNDER_WPS 0x00000100 -+#define WIFI_MESH_STATE 0x00000200 -+#define WIFI_STA_ALIVE_CHK_STATE 0x00000400 -+#define WIFI_UNDER_SURVEY 0x00000800 /* under site surveying */ -+/*#define WIFI_UNDEFINED_STATE 0x00001000*/ -+/*#define WIFI_UNDEFINED_STATE 0x00002000*/ -+/*#define WIFI_UNDEFINED_STATE 0x00004000*/ -+/*#define WIFI_UNDEFINED_STATE 0x00008000*/ -+#define WIFI_MP_STATE 0x00010000 -+/*#define WIFI_UNDEFINED_STATE 0x00020000*/ -+/*#define WIFI_UNDEFINED_STATE 0x00040000*/ -+/*#define WIFI_UNDEFINED_STATE 0x00080000*/ -+/*#define WIFI_UNDEFINED_STATE 0x00100000*/ -+/*#define WIFI_UNDEFINED_STATE 0x00200000*/ -+/*#define WIFI_UNDEFINED_STATE 0x00400000*/ -+#define WIFI_OP_CH_SWITCHING 0x00800000 -+#define WIFI_UNDER_KEY_HANDSHAKE 0x01000000 -+/*#define WIFI_UNDEFINED_STATE 0x02000000*/ -+/*#define WIFI_UNDEFINED_STATE 0x04000000*/ -+/*#define WIFI_UNDEFINED_STATE 0x08000000*/ -+/*#define WIFI_UNDEFINED_STATE 0x10000000*/ -+/*#define WIFI_UNDEFINED_STATE 0x20000000*/ -+#define WIFI_CSA_UPDATE_BEACON 0x40000000 -+#define WIFI_MONITOR_STATE 0x80000000 -+ -+ -+#define MIRACAST_DISABLED 0 -+#define MIRACAST_SOURCE BIT0 -+#define MIRACAST_SINK BIT1 -+ -+#define MIRACAST_MODE_REVERSE(mode) \ -+ ((((mode) & MIRACAST_SOURCE) ? MIRACAST_SINK : 0) | (((mode) & MIRACAST_SINK) ? MIRACAST_SOURCE : 0)) -+ -+bool is_miracast_enabled(_adapter *adapter); -+bool rtw_chk_miracast_mode(_adapter *adapter, u8 mode); -+const char *get_miracast_mode_str(int mode); -+void rtw_wfd_st_switch(struct sta_info *sta, bool on); -+ -+#define MLME_STATE(adapter) get_fwstate(&((adapter)->mlmepriv)) -+#define CHK_MLME_STATE(adapter, state) check_fwstate(&((adapter)->mlmepriv), (state)) -+ -+#define MLME_IS_NULL(adapter) CHK_MLME_STATE(adapter, WIFI_NULL_STATE) -+#define MLME_IS_STA(adapter) CHK_MLME_STATE(adapter, WIFI_STATION_STATE) -+#define MLME_IS_AP(adapter) CHK_MLME_STATE(adapter, WIFI_AP_STATE) -+#define MLME_IS_ADHOC(adapter) CHK_MLME_STATE(adapter, WIFI_ADHOC_STATE) -+#define MLME_IS_ADHOC_MASTER(adapter) CHK_MLME_STATE(adapter, WIFI_ADHOC_MASTER_STATE) -+#define MLME_IS_MESH(adapter) CHK_MLME_STATE(adapter, WIFI_MESH_STATE) -+#define MLME_IS_MONITOR(adapter) CHK_MLME_STATE(adapter, WIFI_MONITOR_STATE) -+#define MLME_IS_MP(adapter) CHK_MLME_STATE(adapter, WIFI_MP_STATE) -+#ifdef CONFIG_P2P -+ #define MLME_IS_PD(adapter) rtw_p2p_chk_role(&(adapter)->wdinfo, P2P_ROLE_DEVICE) -+ #define MLME_IS_GC(adapter) rtw_p2p_chk_role(&(adapter)->wdinfo, P2P_ROLE_CLIENT) -+ #define MLME_IS_GO(adapter) rtw_p2p_chk_role(&(adapter)->wdinfo, P2P_ROLE_GO) -+#else /* !CONFIG_P2P */ -+ #define MLME_IS_PD(adapter) 0 -+ #define MLME_IS_GC(adapter) 0 -+ #define MLME_IS_GO(adapter) 0 -+#endif /* !CONFIG_P2P */ -+ -+#define MLME_IS_MSRC(adapter) rtw_chk_miracast_mode((adapter), MIRACAST_SOURCE) -+#define MLME_IS_MSINK(adapter) rtw_chk_miracast_mode((adapter), MIRACAST_SINK) -+ -+#define MLME_IS_SCAN(adapter) CHK_MLME_STATE(adapter, WIFI_UNDER_SURVEY) -+#define MLME_IS_LINKING(adapter) CHK_MLME_STATE(adapter, WIFI_UNDER_LINKING) -+#define MLME_IS_ASOC(adapter) CHK_MLME_STATE(adapter, WIFI_ASOC_STATE) -+#define MLME_IS_OPCH_SW(adapter) CHK_MLME_STATE(adapter, WIFI_OP_CH_SWITCHING) -+#define MLME_IS_WPS(adapter) CHK_MLME_STATE(adapter, WIFI_UNDER_WPS) -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+#define MLME_IS_ROCH(adapter) (rtw_cfg80211_get_is_roch(adapter) == _TRUE) -+#else -+#define MLME_IS_ROCH(adapter) 0 -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+#define MLME_IS_MGMT_TX(adapter) rtw_cfg80211_get_is_mgmt_tx(adapter) -+#else -+#define MLME_IS_MGMT_TX(adapter) 0 -+#endif -+ -+#define MLME_STATE_FMT "%s%s%s%s%s%s%s%s%s%s%s%s" -+#define MLME_STATE_ARG(adapter) \ -+ MLME_IS_STA((adapter)) ? (MLME_IS_GC((adapter)) ? " GC" : " STA") : \ -+ MLME_IS_AP((adapter)) ? (MLME_IS_GO((adapter)) ? " GO" : " AP") : \ -+ MLME_IS_ADHOC((adapter)) ? " ADHOC" : \ -+ MLME_IS_ADHOC_MASTER((adapter)) ? " ADHOC_M" : \ -+ MLME_IS_MESH((adapter)) ? " MESH" : \ -+ MLME_IS_MONITOR((adapter)) ? " MONITOR" : \ -+ MLME_IS_MP((adapter)) ? " MP" : "", \ -+ MLME_IS_PD((adapter)) ? " PD" : "", \ -+ MLME_IS_MSRC((adapter)) ? " MSRC" : "", \ -+ MLME_IS_MSINK((adapter)) ? " MSINK" : "", \ -+ MLME_IS_SCAN((adapter)) ? " SCAN" : "", \ -+ MLME_IS_LINKING((adapter)) ? " LINKING" : "", \ -+ MLME_IS_ASOC((adapter)) ? " ASOC" : "", \ -+ MLME_IS_OPCH_SW((adapter)) ? " OPCH_SW" : "", \ -+ MLME_IS_WPS((adapter)) ? " WPS" : "", \ -+ MLME_IS_ROCH((adapter)) ? " ROCH" : "", \ -+ MLME_IS_MGMT_TX((adapter)) ? " MGMT_TX" : "", \ -+ (MLME_STATE((adapter)) & WIFI_SLEEP_STATE) ? " SLEEP" : "" -+ -+enum { -+ MLME_ACTION_UNKNOWN, -+ MLME_ACTION_NONE, -+ MLME_SCAN_ENABLE, /* WIFI_UNDER_SURVEY */ -+ MLME_SCAN_ENTER, /* WIFI_UNDER_SURVEY && !SCAN_DISABLE && !SCAN_BACK_OP */ -+ MLME_SCAN_DONE, /* WIFI_UNDER_SURVEY && (SCAN_DISABLE || SCAN_BACK_OP) */ -+ MLME_SCAN_DISABLE, /* WIFI_UNDER_SURVEY is going to be cleared */ -+ MLME_STA_CONNECTING, -+ MLME_STA_CONNECTED, -+ MLME_STA_DISCONNECTED, -+ MLME_TDLS_LINKED, -+ MLME_TDLS_NOLINK, -+ MLME_AP_STARTED, -+ MLME_AP_STOPPED, -+ MLME_ADHOC_STARTED, -+ MLME_ADHOC_STOPPED, -+ MLME_MESH_STARTED, -+ MLME_MESH_STOPPED, -+ MLME_OPCH_SWITCH, -+}; -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+enum MODE_WOW_KEEP_ALIVE_PATTERN { -+ wow_keep_alive_pattern_disable = 0, -+ wow_keep_alive_pattern_tx, -+ wow_keep_alive_pattern_trx, -+ wow_keep_alive_pattern_trx_with_ack -+}; -+#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+enum dot11AuthAlgrthmNum { -+ dot11AuthAlgrthm_Open = 0, -+ dot11AuthAlgrthm_Shared, -+ dot11AuthAlgrthm_8021X, -+ dot11AuthAlgrthm_Auto, -+ dot11AuthAlgrthm_WAPI, -+ dot11AuthAlgrthm_MaxNum -+}; -+ -+/** -+ * enum mlme_auth_type - AuthenticationType -+ * -+ * @MLME_AUTHTYPE_OPEN_SYSTEM: Open System authentication -+ * @MLME_AUTHTYPE_SHARED_KEY: Shared Key authentication (WEP only) -+ * @MLME_AUTHTYPE_FT: Fast BSS Transition (IEEE 802.11r) -+ * @MLME_AUTHTYPE_NETWORK_EAP: Network EAP (some Cisco APs and mainly LEAP) -+ * @MLME_AUTHTYPE_SAE: Simultaneous authentication of equals -+ * @MLME_AUTHTYPE_FILS_SK: Fast Initial Link Setup shared key -+ * @MLME_AUTHTYPE_FILS_SK_PFS: Fast Initial Link Setup shared key with PFS -+ * @MLME_AUTHTYPE_FILS_PK: Fast Initial Link Setup public key -+ * @__MLME_AUTHTYPE_NUM: internal -+ * @MLME_AUTHTYPE_MAX: maximum valid auth algorithm -+ * @MLME_AUTHTYPE_AUTOMATIC: determine automatically (if necessary by trying -+ * multiple times); this is invalid in netlink -- leave out the attribute -+ * for this on CONNECT commands. -+ */ -+enum mlme_auth_type { -+ MLME_AUTHTYPE_OPEN_SYSTEM, -+ MLME_AUTHTYPE_SHARED_KEY, -+ MLME_AUTHTYPE_FT, -+ MLME_AUTHTYPE_NETWORK_EAP, -+ MLME_AUTHTYPE_SAE, -+ MLME_AUTHTYPE_FILS_SK, -+ MLME_AUTHTYPE_FILS_SK_PFS, -+ MLME_AUTHTYPE_FILS_PK, -+ -+ /* keep last */ -+ __MLME_AUTHTYPE_NUM, -+ MLME_AUTHTYPE_MAX = __MLME_AUTHTYPE_NUM - 1, -+ MLME_AUTHTYPE_AUTOMATIC -+}; -+ -+/* Scan type including active and passive scan. */ -+typedef enum _RT_SCAN_TYPE { -+ SCAN_PASSIVE, -+ SCAN_ACTIVE, -+ SCAN_MIX, -+} RT_SCAN_TYPE, *PRT_SCAN_TYPE; -+ -+#define WIFI_FREQUENCY_BAND_AUTO 0 -+#define WIFI_FREQUENCY_BAND_5GHZ 1 -+#define WIFI_FREQUENCY_BAND_2GHZ 2 -+ -+#define rtw_band_valid(band) ((band) <= WIFI_FREQUENCY_BAND_2GHZ) -+ -+enum DriverInterface { -+ DRIVER_WEXT = 1, -+ DRIVER_CFG80211 = 2 -+}; -+ -+enum SCAN_RESULT_TYPE { -+ SCAN_RESULT_P2P_ONLY = 0, /* Will return all the P2P devices. */ -+ SCAN_RESULT_ALL = 1, /* Will return all the scanned device, include AP. */ -+ SCAN_RESULT_WFD_TYPE = 2 /* Will just return the correct WFD device. */ -+ /* If this device is Miracast sink device, it will just return all the Miracast source devices. */ -+}; -+ -+/* -+ -+there are several "locks" in mlme_priv, -+since mlme_priv is a shared resource between many threads, -+like ISR/Call-Back functions, the OID handlers, and even timer functions. -+ -+ -+Each _queue has its own locks, already. -+Other items are protected by mlme_priv.lock. -+ -+To avoid possible dead lock, any thread trying to modifiying mlme_priv -+SHALL not lock up more than one locks at a time! -+ -+*/ -+ -+ -+#define traffic_threshold 10 -+#define traffic_scan_period 500 -+ -+typedef struct _RT_LINK_DETECT_T { -+ u32 NumTxOkInPeriod; -+ u32 NumRxOkInPeriod; -+ u32 NumRxUnicastOkInPeriod; -+ BOOLEAN bBusyTraffic; -+ BOOLEAN bTxBusyTraffic; -+ BOOLEAN bRxBusyTraffic; -+ BOOLEAN bHigherBusyTraffic; /* For interrupt migration purpose. */ -+ BOOLEAN bHigherBusyRxTraffic; /* We may disable Tx interrupt according as Rx traffic. */ -+ BOOLEAN bHigherBusyTxTraffic; /* We may disable Tx interrupt according as Tx traffic. */ -+ /* u8 TrafficBusyState; */ -+ u8 TrafficTransitionCount; -+ u32 LowPowerTransitionCount; -+} RT_LINK_DETECT_T, *PRT_LINK_DETECT_T; -+ -+struct profile_info { -+ u8 ssidlen; -+ u8 ssid[WLAN_SSID_MAXLEN]; -+ u8 peermac[ETH_ALEN]; -+}; -+ -+struct tx_invite_req_info { -+ u8 token; -+ u8 benable; -+ u8 go_ssid[WLAN_SSID_MAXLEN]; -+ u8 ssidlen; -+ u8 go_bssid[ETH_ALEN]; -+ u8 peer_macaddr[ETH_ALEN]; -+ u8 operating_ch; /* This information will be set by using the p2p_set op_ch=x */ -+ u8 peer_ch; /* The listen channel for peer P2P device */ -+ -+}; -+ -+struct tx_invite_resp_info { -+ u8 token; /* Used to record the dialog token of p2p invitation request frame. */ -+}; -+ -+#ifdef CONFIG_WFD -+ -+struct wifi_display_info { -+ u16 wfd_enable; /* Eanble/Disable the WFD function. */ -+ u16 init_rtsp_ctrlport; /* init value of rtsp_ctrlport when WFD enable */ -+ u16 rtsp_ctrlport; /* TCP port number at which the this WFD device listens for RTSP messages, 0 when WFD disable */ -+ u16 tdls_rtsp_ctrlport; /* rtsp_ctrlport used by tdls, will sync when rtsp_ctrlport is changed by user */ -+ u16 peer_rtsp_ctrlport; /* TCP port number at which the peer WFD device listens for RTSP messages */ -+ /* This filed should be filled when receiving the gropu negotiation request */ -+ -+ u8 peer_session_avail; /* WFD session is available or not for the peer wfd device. */ -+ /* This variable will be set when sending the provisioning discovery request to peer WFD device. */ -+ /* And this variable will be reset when it is read by using the iwpriv p2p_get wfd_sa command. */ -+ u8 ip_address[4]; -+ u8 peer_ip_address[4]; -+ u8 wfd_pc; /* WFD preferred connection */ -+ /* 0 -> Prefer to use the P2P for WFD connection on peer side. */ -+ /* 1 -> Prefer to use the TDLS for WFD connection on peer side. */ -+ -+ u8 wfd_device_type; /* WFD Device Type */ -+ /* 0 -> WFD Source Device */ -+ /* 1 -> WFD Primary Sink Device */ -+ enum SCAN_RESULT_TYPE scan_result_type; /* Used when P2P is enable. This parameter will impact the scan result. */ -+ u8 op_wfd_mode; -+ u8 stack_wfd_mode; -+}; -+#endif /* CONFIG_WFD */ -+ -+struct tx_provdisc_req_info { -+ u16 wps_config_method_request; /* Used when sending the provisioning request frame */ -+ u16 peer_channel_num[2]; /* The channel number which the receiver stands. */ -+ NDIS_802_11_SSID ssid; -+ u8 peerDevAddr[ETH_ALEN]; /* Peer device address */ -+ u8 peerIFAddr[ETH_ALEN]; /* Peer interface address */ -+ u8 benable; /* This provision discovery request frame is trigger to send or not */ -+}; -+ -+struct rx_provdisc_req_info { /* When peer device issue prov_disc_req first, we should store the following informations */ -+ u8 peerDevAddr[ETH_ALEN]; /* Peer device address */ -+ u8 strconfig_method_desc_of_prov_disc_req[4]; /* description for the config method located in the provisioning discovery request frame. */ -+ /* The UI must know this information to know which config method the remote p2p device is requiring. */ -+}; -+ -+struct tx_nego_req_info { -+ u16 peer_channel_num[2]; /* The channel number which the receiver stands. */ -+ u8 peerDevAddr[ETH_ALEN]; /* Peer device address */ -+ u8 benable; /* This negoitation request frame is trigger to send or not */ -+ u8 peer_ch; /* The listen channel for peer P2P device */ -+}; -+ -+struct group_id_info { -+ u8 go_device_addr[ETH_ALEN]; /* The GO's device address of this P2P group */ -+ u8 ssid[WLAN_SSID_MAXLEN]; /* The SSID of this P2P group */ -+}; -+ -+struct scan_limit_info { -+ u8 scan_op_ch_only; /* When this flag is set, the driver should just scan the operation channel */ -+#ifndef CONFIG_P2P_OP_CHK_SOCIAL_CH -+ u8 operation_ch[2]; /* Store the operation channel of invitation request frame */ -+#else -+ u8 operation_ch[5]; /* Store additional channel 1,6,11 for Android 4.2 IOT & Nexus 4 */ -+#endif /* CONFIG_P2P_OP_CHK_SOCIAL_CH */ -+}; -+ -+#ifdef CONFIG_P2P_WOWLAN -+ -+enum P2P_WOWLAN_RECV_FRAME_TYPE { -+ P2P_WOWLAN_RECV_NEGO_REQ = 0, -+ P2P_WOWLAN_RECV_INVITE_REQ = 1, -+ P2P_WOWLAN_RECV_PROVISION_REQ = 2, -+}; -+ -+struct p2p_wowlan_info { -+ -+ u8 is_trigger; -+ enum P2P_WOWLAN_RECV_FRAME_TYPE wowlan_recv_frame_type; -+ u8 wowlan_peer_addr[ETH_ALEN]; -+ u16 wowlan_peer_wpsconfig; -+ u8 wowlan_peer_is_persistent; -+ u8 wowlan_peer_invitation_type; -+}; -+ -+#endif /* CONFIG_P2P_WOWLAN */ -+ -+struct wifidirect_info { -+ _adapter *padapter; -+ _timer find_phase_timer; -+ _timer restore_p2p_state_timer; -+ -+ /* Used to do the scanning. After confirming the peer is availalble, the driver transmits the P2P frame to peer. */ -+ _timer pre_tx_scan_timer; -+ _timer reset_ch_sitesurvey; -+ _timer reset_ch_sitesurvey2; /* Just for resetting the scan limit function by using p2p nego */ -+ -+ struct tx_provdisc_req_info tx_prov_disc_info; -+ struct rx_provdisc_req_info rx_prov_disc_info; -+ struct tx_invite_req_info invitereq_info; -+ struct profile_info profileinfo[P2P_MAX_PERSISTENT_GROUP_NUM]; /* Store the profile information of persistent group */ -+ struct tx_invite_resp_info inviteresp_info; -+ struct tx_nego_req_info nego_req_info; -+ struct group_id_info groupid_info; /* Store the group id information when doing the group negotiation handshake. */ -+ struct scan_limit_info rx_invitereq_info; /* Used for get the limit scan channel from the Invitation procedure */ -+ struct scan_limit_info p2p_info; /* Used for get the limit scan channel from the P2P negotiation handshake */ -+#ifdef CONFIG_WFD -+ struct wifi_display_info *wfd_info; -+#endif -+ -+#ifdef CONFIG_P2P_WOWLAN -+ struct p2p_wowlan_info p2p_wow_info; -+#endif /* CONFIG_P2P_WOWLAN */ -+ -+ enum P2P_ROLE role; -+ enum P2P_STATE pre_p2p_state; -+ enum P2P_STATE p2p_state; -+ u8 device_addr[ETH_ALEN]; /* The device address should be the mac address of this device. */ -+ u8 interface_addr[ETH_ALEN]; -+ u8 social_chan[4]; -+ u8 listen_channel; -+ u8 operating_channel; -+ u8 listen_dwell; /* This value should be between 1 and 3 */ -+ u8 support_rate[8]; -+ u8 p2p_wildcard_ssid[P2P_WILDCARD_SSID_LEN]; -+ u8 intent; /* should only include the intent value. */ -+ u8 p2p_peer_interface_addr[ETH_ALEN]; -+ u8 p2p_peer_device_addr[ETH_ALEN]; -+ u8 peer_intent; /* Included the intent value and tie breaker value. */ -+ u8 device_name[WPS_MAX_DEVICE_NAME_LEN]; /* Device name for displaying on searching device screen */ -+ u16 device_name_len; -+ u8 profileindex; /* Used to point to the index of profileinfo array */ -+ u8 peer_operating_ch; -+ u8 find_phase_state_exchange_cnt; -+ u16 device_password_id_for_nego; /* The device password ID for group negotation */ -+ u8 negotiation_dialog_token; -+ u8 nego_ssid[WLAN_SSID_MAXLEN]; /* SSID information for group negotitation */ -+ u8 nego_ssidlen; -+ u8 p2p_group_ssid[WLAN_SSID_MAXLEN]; -+ u8 p2p_group_ssid_len; -+ u8 persistent_supported; /* Flag to know the persistent function should be supported or not. */ -+ /* In the Sigma test, the Sigma will provide this enable from the sta_set_p2p CAPI. */ -+ /* 0: disable */ -+ /* 1: enable */ -+ u8 session_available; /* Flag to set the WFD session available to enable or disable "by Sigma" */ -+ /* In the Sigma test, the Sigma will disable the session available by using the sta_preset CAPI. */ -+ /* 0: disable */ -+ /* 1: enable */ -+ -+ u8 wfd_tdls_enable; /* Flag to enable or disable the TDLS by WFD Sigma */ -+ /* 0: disable */ -+ /* 1: enable */ -+ u8 wfd_tdls_weaksec; /* Flag to enable or disable the weak security function for TDLS by WFD Sigma */ -+ /* 0: disable */ -+ /* In this case, the driver can't issue the tdsl setup request frame. */ -+ /* 1: enable */ -+ /* In this case, the driver can issue the tdls setup request frame */ -+ /* even the current security is weak security. */ -+ -+ enum P2P_WPSINFO ui_got_wps_info; /* This field will store the WPS value (PIN value or PBC) that UI had got from the user. */ -+ u16 supported_wps_cm; /* This field describes the WPS config method which this driver supported. */ -+ /* The value should be the combination of config method defined in page104 of WPS v2.0 spec. */ -+ u8 external_uuid; /* UUID flag */ -+ u8 uuid[16]; /* UUID */ -+ uint channel_list_attr_len; /* This field will contain the length of body of P2P Channel List attribute of group negotitation response frame. */ -+ u8 channel_list_attr[100]; /* This field will contain the body of P2P Channel List attribute of group negotitation response frame. */ -+ /* We will use the channel_cnt and channel_list fields when constructing the group negotitation confirm frame. */ -+ u8 driver_interface; /* Indicate DRIVER_WEXT or DRIVER_CFG80211 */ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ u16 ext_listen_interval; /* The interval to be available with legacy AP (ms) */ -+ u16 ext_listen_period; /* The time period to be available for P2P listen state (ms) */ -+#endif -+#ifdef CONFIG_P2P_PS -+ enum P2P_PS_MODE p2p_ps_mode; /* indicate p2p ps mode */ -+ enum P2P_PS_STATE p2p_ps_state; /* indicate p2p ps state */ -+ u8 noa_index; /* Identifies and instance of Notice of Absence timing. */ -+ u8 ctwindow; /* Client traffic window. A period of time in TU after TBTT. */ -+ u8 opp_ps; /* opportunistic power save. */ -+ u8 noa_num; /* number of NoA descriptor in P2P IE. */ -+ u8 noa_count[P2P_MAX_NOA_NUM]; /* Count for owner, Type of client. */ -+ u32 noa_duration[P2P_MAX_NOA_NUM]; /* Max duration for owner, preferred or min acceptable duration for client. */ -+ u32 noa_interval[P2P_MAX_NOA_NUM]; /* Length of interval for owner, preferred or max acceptable interval of client. */ -+ u32 noa_start_time[P2P_MAX_NOA_NUM]; /* schedule expressed in terms of the lower 4 bytes of the TSF timer. */ -+#endif /* CONFIG_P2P_PS */ -+}; -+ -+struct tdls_ss_record { /* signal strength record */ -+ u8 macaddr[ETH_ALEN]; -+ u8 RxPWDBAll; -+ u8 is_tdls_sta; /* _TRUE: direct link sta, _FALSE: else */ -+}; -+ -+struct tdls_temp_mgmt { -+ u8 initiator; /* 0: None, 1: we initiate, 2: peer initiate */ -+ u8 peer_addr[ETH_ALEN]; -+}; -+ -+#ifdef CONFIG_TDLS_CH_SW -+struct tdls_ch_switch { -+ u32 ch_sw_state; -+ ATOMIC_T chsw_on; -+ u8 addr[ETH_ALEN]; -+ u8 off_ch_num; -+ u8 ch_offset; -+ u8 bcn_early_reg_bkp; -+ u32 cur_time; -+ u8 delay_switch_back; -+ u8 dump_stack; -+ struct submit_ctx chsw_sctx; -+}; -+#endif -+ -+struct tdls_info { -+ u8 ap_prohibited; -+ u8 ch_switch_prohibited; -+ u8 link_established; -+ u8 sta_cnt; -+ u8 sta_maximum; /* 1:tdls sta is equal (NUM_STA-1), reach max direct link number; 0: else; */ -+ struct tdls_ss_record ss_record; -+#ifdef CONFIG_TDLS_CH_SW -+ struct tdls_ch_switch chsw_info; -+#endif -+ -+ u8 ch_sensing; -+ u8 cur_channel; -+ u8 collect_pkt_num[MAX_CHANNEL_NUM]; -+ _lock cmd_lock; -+ _lock hdl_lock; -+ u8 watchdog_count; -+ u8 dev_discovered; /* WFD_TDLS: for sigma test */ -+ -+ /* Let wpa_supplicant to setup*/ -+ u8 driver_setup; -+#ifdef CONFIG_WFD -+ struct wifi_display_info *wfd_info; -+#endif -+ -+ struct submit_ctx *tdls_sctx; -+}; -+ -+struct tdls_txmgmt { -+ u8 peer[ETH_ALEN]; -+ u8 action_code; -+ u8 dialog_token; -+ u16 status_code; -+ u8 *buf; -+ size_t len; -+}; -+ -+/* used for mlme_priv.roam_flags */ -+enum { -+ RTW_ROAM_ON_EXPIRED = BIT0, -+ RTW_ROAM_ON_RESUME = BIT1, -+ RTW_ROAM_ACTIVE = BIT2, -+}; -+ -+#define UNASOC_STA_SRC_RX_BMC 0 -+#define UNASOC_STA_SRC_RX_NMY_UC 1 -+#define UNASOC_STA_SRC_NUM 2 -+ -+#define UNASOC_STA_MODE_DISABLED 0 -+#define UNASOC_STA_MODE_INTERESTED 1 -+#define UNASOC_STA_MODE_ALL 2 -+#define UNASOC_STA_MODE_NUM 3 -+ -+#define UNASOC_STA_DEL_CHK_SKIP 0 -+#define UNASOC_STA_DEL_CHK_ALIVE 1 -+#define UNASOC_STA_DEL_CHK_DELETED 2 -+ -+#ifdef CONFIG_RTW_MULTI_AP -+struct unassoc_sta_info { -+ _list list; -+ u8 addr[ETH_ALEN]; -+ u8 interested; -+ s8 recv_signal_power; -+ systime time; -+}; -+#endif -+ -+struct mlme_priv { -+ -+ _lock lock; -+ sint fw_state; /* shall we protect this variable? maybe not necessarily... */ -+ u8 to_join; /* flag */ -+ u16 join_status; -+#ifdef CONFIG_LAYER2_ROAMING -+ u8 to_roam; /* roaming trying times */ -+ struct wlan_network *roam_network; /* the target of active roam */ -+ u8 roam_flags; -+ u8 roam_rssi_diff_th; /* rssi difference threshold for active scan candidate selection */ -+ u32 roam_scan_int; /* scan interval for active roam (Unit:2 second)*/ -+ u32 roam_scanr_exp_ms; /* scan result expire time in ms for roam */ -+ u8 roam_tgt_addr[ETH_ALEN]; /* request to roam to speicific target without other consideration */ -+ u8 roam_rssi_threshold; -+ systime last_roaming; -+ bool need_to_roam; -+#endif -+ -+ u32 defs_lmt_sta; -+ u32 defs_lmt_time; -+ -+ u8 *nic_hdl; -+ u32 max_bss_cnt; /* The size of scan queue */ -+ _list *pscanned; -+ _queue free_bss_pool; -+ _queue scanned_queue; -+ u8 *free_bss_buf; -+ u32 num_of_scanned; -+ -+ NDIS_802_11_SSID assoc_ssid; -+ u8 assoc_bssid[6]; -+ u16 assoc_ch; /* 0 reserved for no specific channel */ -+ -+ struct wlan_network cur_network; -+ struct wlan_network *cur_network_scanned; -+ -+ /* bcn check info */ -+ struct beacon_keys cur_beacon_keys; /* save current beacon keys */ -+#ifdef CONFIG_BCN_CNT_CONFIRM_HDL -+ struct beacon_keys new_beacon_keys; /* save new beacon keys */ -+ u8 new_beacon_cnts; /* if new_beacon_cnts >= threshold, ap beacon is changed */ -+#endif -+ -+#ifdef CONFIG_ARP_KEEP_ALIVE -+ /* for arp offload keep alive */ -+ u8 bGetGateway; -+ u8 GetGatewayTryCnt; -+ u8 gw_mac_addr[ETH_ALEN]; -+ u8 gw_ip[4]; -+#endif -+ -+ /* uint wireless_mode; no used, remove it */ -+ -+ u32 auto_scan_int_ms; -+ -+ _timer assoc_timer; -+ -+ uint assoc_by_bssid; -+ uint assoc_by_rssi; -+ -+ _timer scan_to_timer; /* driver itself handles scan_timeout status. */ -+ systime scan_start_time; /* used to evaluate the time spent in scanning */ -+ -+#ifdef CONFIG_SET_SCAN_DENY_TIMER -+ _timer set_scan_deny_timer; -+ ATOMIC_T set_scan_deny; /* 0: allowed, 1: deny */ -+#endif -+ u8 wpa_phase;/*wpa_phase after wps finished*/ -+ -+ struct qos_priv qospriv; -+ -+#ifdef CONFIG_80211N_HT -+ -+ /* Number of non-HT AP/stations */ -+ int num_sta_no_ht; -+ -+ /* Number of HT AP/stations 20 MHz */ -+ /* int num_sta_ht_20mhz; */ -+ -+ -+ int num_FortyMHzIntolerant; -+ -+ struct ht_priv htpriv; -+ -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ struct vht_priv vhtpriv; -+#ifdef ROKU_PRIVATE -+ /*infra mode, used to store AP's info*/ -+ struct vht_priv_infra_ap vhtpriv_infra_ap; -+#endif /* ROKU_PRIVATE */ -+#endif -+ -+#ifdef ROKU_PRIVATE -+ struct ht_priv_infra_ap htpriv_infra_ap; -+#endif /* ROKU_PRIVATE */ -+ -+#ifdef CONFIG_RTW_80211R -+ struct ft_roam_info ft_roam; -+#endif -+#if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K) -+ struct roam_nb_info nb_info; -+ u8 ch_cnt; -+#endif -+ -+ RT_LINK_DETECT_T LinkDetectInfo; -+ -+ u8 acm_mask; /* for wmm acm mask */ -+ RT_SCAN_TYPE scan_mode; /* active: 1, passive: 0 */ -+ -+ u8 *wps_probe_req_ie; -+ u32 wps_probe_req_ie_len; -+ -+ u8 ext_capab_ie_data[8];/*currently for ap mode only*/ -+ u8 ext_capab_ie_len; -+ -+#if defined(CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) -+ /* Number of associated Non-ERP stations (i.e., stations using 802.11b -+ * in 802.11g BSS) */ -+ int num_sta_non_erp; -+ -+ /* Number of associated stations that do not support Short Slot Time */ -+ int num_sta_no_short_slot_time; -+ -+ /* Number of associated stations that do not support Short Preamble */ -+ int num_sta_no_short_preamble; -+ -+ ATOMIC_T olbc; /* Overlapping Legacy BSS Condition (Legacy b/g)*/ -+ -+ /* Number of HT associated stations that do not support greenfield */ -+ int num_sta_ht_no_gf; -+ -+ /* Number of associated non-HT stations */ -+ /* int num_sta_no_ht; */ -+ -+ /* Number of HT associated stations 20 MHz */ -+ int num_sta_ht_20mhz; -+ -+ /* number of associated stations 40MHz intolerant */ -+ int num_sta_40mhz_intolerant; -+ -+ /* Overlapping BSS information */ -+ ATOMIC_T olbc_ht; -+ -+#ifdef CONFIG_80211N_HT -+ int ht_20mhz_width_req; -+ int ht_intolerant_ch_reported; -+ u16 ht_op_mode; -+ u8 sw_to_20mhz; /*switch to 20Mhz BW*/ -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_RTW_80211R -+ u8 *auth_rsp; -+ u32 auth_rsp_len; -+#endif -+#endif /* CONFIG_AP_MODE and CONFIG_NATIVEAP_MLME */ -+ -+ u8 *assoc_req; -+ u32 assoc_req_len; -+ u8 *assoc_rsp; -+ u32 assoc_rsp_len; -+ -+#if defined(CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) -+ /* u8 *wps_probe_req_ie; */ -+ /* u32 wps_probe_req_ie_len; */ -+ -+ u8 *wps_beacon_ie; -+ u32 wps_beacon_ie_len; -+ -+ u8 *wps_probe_resp_ie; -+ u32 wps_probe_resp_ie_len; -+ -+ u8 *wps_assoc_resp_ie; -+ u32 wps_assoc_resp_ie_len; -+ -+ u8 *p2p_beacon_ie; -+ u32 p2p_beacon_ie_len; -+ -+ u8 *p2p_probe_req_ie; -+ u32 p2p_probe_req_ie_len; -+ -+ u8 *p2p_probe_resp_ie; -+ u32 p2p_probe_resp_ie_len; -+ -+ u8 *p2p_go_probe_resp_ie; /* for GO */ -+ u32 p2p_go_probe_resp_ie_len; /* for GO */ -+ -+ u8 *p2p_assoc_req_ie; -+ u32 p2p_assoc_req_ie_len; -+ -+ u8 *p2p_assoc_resp_ie; -+ u32 p2p_assoc_resp_ie_len; -+ -+ _lock bcn_update_lock; -+ u8 update_bcn; -+ -+ u8 ori_ch; -+ u8 ori_bw; -+ u8 ori_offset; -+ #ifdef CONFIG_80211AC_VHT -+ u8 ori_vht_en; -+ #endif -+ -+ u8 ap_isolate; -+#endif /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */ -+ -+#if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) -+ u8 *wfd_beacon_ie; -+ u32 wfd_beacon_ie_len; -+ -+ u8 *wfd_probe_req_ie; -+ u32 wfd_probe_req_ie_len; -+ -+ u8 *wfd_probe_resp_ie; -+ u32 wfd_probe_resp_ie_len; -+ -+ u8 *wfd_go_probe_resp_ie; /* for GO */ -+ u32 wfd_go_probe_resp_ie_len; /* for GO */ -+ -+ u8 *wfd_assoc_req_ie; -+ u32 wfd_assoc_req_ie_len; -+ -+ u8 *wfd_assoc_resp_ie; -+ u32 wfd_assoc_resp_ie_len; -+#endif -+ -+#ifdef CONFIG_RTW_MBO -+ u8 *pcell_data_cap_ie; -+ u32 cell_data_cap_len; -+#endif -+ -+#ifdef RTK_DMP_PLATFORM -+ /* DMP kobject_hotplug function signal need in passive level */ -+ _workitem Linkup_workitem; -+ _workitem Linkdown_workitem; -+#endif -+ -+#ifdef RTW_BUSY_DENY_SCAN -+ systime lastscantime; -+#endif -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ u8 scanning_via_buddy_intf; -+#endif -+ -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ u32 vendor_ie_mask[WLAN_MAX_VENDOR_IE_NUM]; -+ u8 vendor_ie[WLAN_MAX_VENDOR_IE_NUM][WLAN_MAX_VENDOR_IE_LEN]; -+ u32 vendor_ielen[WLAN_MAX_VENDOR_IE_NUM]; -+#endif -+#ifdef CONFIG_RTW_MULTI_AP -+ u8 unassoc_sta_mode_of_stype[UNASOC_STA_SRC_NUM]; -+ _queue unassoc_sta_queue; -+ _queue free_unassoc_sta_queue; -+ u8 *free_unassoc_sta_buf; -+ u32 interested_unassoc_sta_cnt; -+ u32 max_unassoc_sta_cnt; -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ struct unassoc_sta_info cmap_unassoc_sta[CMAP_UNASSOC_METRICS_STA_MAX]; -+ u8 cmap_unassoc_sta_cnt; -+ _timer cmap_unassoc_sta_timer; -+#endif -+#endif -+}; -+ -+#define mlme_set_scan_to_timer(mlme, ms) \ -+ do { \ -+ /* RTW_INFO("%s set_scan_to_timer(%p, %d)\n", __FUNCTION__, (mlme), (ms)); */ \ -+ _set_timer(&(mlme)->scan_to_timer, (ms)); \ -+ } while (0) -+ -+#define rtw_mlme_set_auto_scan_int(adapter, ms) \ -+ do { \ -+ adapter->mlmepriv.auto_scan_int_ms = ms; \ -+ } while (0) -+ -+#define RTW_AUTO_SCAN_REASON_UNSPECIFIED 0 -+#define RTW_AUTO_SCAN_REASON_2040_BSS BIT0 -+#define RTW_AUTO_SCAN_REASON_ACS BIT1 -+#define RTW_AUTO_SCAN_REASON_ROAM BIT2 -+#define RTW_AUTO_SCAN_REASON_MESH_OFFCH_CAND BIT3 -+ -+void rtw_mlme_reset_auto_scan_int(_adapter *adapter, u8 *reason); -+ -+#ifdef CONFIG_AP_MODE -+ -+struct hostapd_priv { -+ _adapter *padapter; -+ -+#ifdef CONFIG_HOSTAPD_MLME -+ struct net_device *pmgnt_netdev; -+ struct usb_anchor anchored; -+#endif -+ -+}; -+ -+extern int hostapd_mode_init(_adapter *padapter); -+extern void hostapd_mode_unload(_adapter *padapter); -+#endif -+ -+ -+extern void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf, u16 status); -+extern void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf); -+extern void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf); -+extern void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf); -+extern void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf); -+extern void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf); -+void rtw_sta_mstatus_disc_rpt(_adapter *adapter, u8 mac_id); -+void rtw_sta_mstatus_report(_adapter *adapter); -+extern void rtw_wmm_event_callback(PADAPTER padapter, u8 *pbuf); -+#ifdef CONFIG_IEEE80211W -+void rtw_sta_timeout_event_callback(_adapter *adapter, u8 *pbuf); -+#endif /* CONFIG_IEEE80211W */ -+thread_return event_thread(thread_context context); -+ -+extern void rtw_free_network_queue(_adapter *adapter, u8 isfreeall); -+extern int rtw_init_mlme_priv(_adapter *adapter);/* (struct mlme_priv *pmlmepriv); */ -+ -+extern void rtw_free_mlme_priv(struct mlme_priv *pmlmepriv); -+ -+ -+extern sint rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv); -+extern sint rtw_set_key(_adapter *adapter, struct security_priv *psecuritypriv, sint keyid, u8 set_tx, bool enqueue); -+extern sint rtw_set_auth(_adapter *adapter, struct security_priv *psecuritypriv); -+ -+__inline static u8 *get_bssid(struct mlme_priv *pmlmepriv) -+{ -+ /* if sta_mode:pmlmepriv->cur_network.network.MacAddress=> bssid */ -+ /* if adhoc_mode:pmlmepriv->cur_network.network.MacAddress=> ibss mac address */ -+ return pmlmepriv->cur_network.network.MacAddress; -+} -+ -+__inline static sint check_fwstate(struct mlme_priv *pmlmepriv, sint state) -+{ -+ if ((state == WIFI_NULL_STATE) && -+ (pmlmepriv->fw_state == WIFI_NULL_STATE)) -+ return _TRUE; -+ -+ if (pmlmepriv->fw_state & state) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+__inline static sint get_fwstate(struct mlme_priv *pmlmepriv) -+{ -+ return pmlmepriv->fw_state; -+} -+ -+/* -+ * No Limit on the calling context, -+ * therefore set it to be the critical section... -+ * -+ * ### NOTE:#### (!!!!) -+ * MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock -+ */ -+extern void rtw_mi_update_iface_status(struct mlme_priv *pmlmepriv, sint state); -+ -+static inline void set_fwstate(struct mlme_priv *pmlmepriv, sint state) -+{ -+ pmlmepriv->fw_state |= state; -+ rtw_mi_update_iface_status(pmlmepriv, state); -+} -+static inline void init_fwstate(struct mlme_priv *pmlmepriv, sint state) -+{ -+ pmlmepriv->fw_state = state; -+ rtw_mi_update_iface_status(pmlmepriv, state); -+} -+ -+static inline void _clr_fwstate_(struct mlme_priv *pmlmepriv, sint state) -+{ -+ pmlmepriv->fw_state &= ~state; -+ rtw_mi_update_iface_status(pmlmepriv, state); -+} -+ -+/* -+ * No Limit on the calling context, -+ * therefore set it to be the critical section... -+ */ -+static inline void clr_fwstate(struct mlme_priv *pmlmepriv, sint state) -+{ -+ _irqL irqL; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ _clr_fwstate_(pmlmepriv, state); -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+} -+ -+static inline void up_scanned_network(struct mlme_priv *pmlmepriv) -+{ -+ _irqL irqL; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ pmlmepriv->num_of_scanned++; -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+} -+u8 rtw_is_adapter_up(_adapter *padapter); -+ -+__inline static void down_scanned_network(struct mlme_priv *pmlmepriv) -+{ -+ _irqL irqL; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ pmlmepriv->num_of_scanned--; -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+} -+ -+__inline static void set_scanned_network_val(struct mlme_priv *pmlmepriv, sint val) -+{ -+ _irqL irqL; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ pmlmepriv->num_of_scanned = val; -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+} -+ -+extern u16 rtw_get_capability(WLAN_BSSID_EX *bss); -+extern bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target); -+extern void rtw_disconnect_hdl_under_linked(_adapter *adapter, struct sta_info *psta, u8 free_assoc); -+extern void rtw_generate_random_ibss(u8 *pibss); -+struct wlan_network *_rtw_find_network(_queue *scanned_queue, const u8 *addr); -+struct wlan_network *rtw_find_network(_queue *scanned_queue, const u8 *addr); -+extern struct wlan_network *rtw_get_oldest_wlan_network(_queue *scanned_queue); -+struct wlan_network *_rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network); -+struct wlan_network *rtw_find_same_network(_queue *scanned_queue, struct wlan_network *network); -+ -+extern void rtw_free_assoc_resources(_adapter *adapter, u8 lock_scanned_queue); -+extern void rtw_indicate_disconnect(_adapter *adapter, u16 reason, u8 locally_generated); -+extern void rtw_indicate_connect(_adapter *adapter); -+void rtw_indicate_scan_done(_adapter *padapter, bool aborted); -+ -+void rtw_drv_scan_by_self(_adapter *padapter, u8 reason); -+void rtw_scan_wait_completed(_adapter *adapter); -+u32 rtw_scan_abort_timeout(_adapter *adapter, u32 timeout_ms); -+void rtw_scan_abort_no_wait(_adapter *adapter); -+void rtw_scan_abort(_adapter *adapter); -+u32 rtw_join_abort_timeout(_adapter *adapter, u32 timeout_ms); -+ -+int rtw_cached_pmkid(_adapter *Adapter, u8 *bssid); -+int rtw_rsn_sync_pmkid(_adapter *adapter, u8 *ie, uint ie_len, int i_ent); -+ -+extern int rtw_restruct_sec_ie(_adapter *adapter, u8 *out_ie); -+#ifdef CONFIG_WMMPS_STA -+void rtw_uapsd_use_default_setting(_adapter *padapter); -+bool rtw_is_wmmps_mode(_adapter *padapter); -+#endif /* CONFIG_WMMPS_STA */ -+extern int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len); -+extern void rtw_init_registrypriv_dev_network(_adapter *adapter); -+ -+extern void rtw_update_registrypriv_dev_network(_adapter *adapter); -+ -+extern void rtw_get_encrypt_decrypt_from_registrypriv(_adapter *adapter); -+ -+extern void rtw_join_timeout_handler(void *ctx); -+extern void rtw_scan_timeout_handler(void *ctx); -+ -+extern void rtw_dynamic_check_timer_handlder(void *ctx); -+extern void rtw_iface_dynamic_check_timer_handlder(_adapter *adapter); -+ -+enum { -+ SS_DENY_MP_MODE, -+ SS_DENY_RSON_SCANING, -+ SS_DENY_BLOCK_SCAN, -+ SS_DENY_BY_DRV, -+ SS_DENY_SELF_AP_UNDER_WPS, -+ SS_DENY_SELF_AP_UNDER_LINKING, -+ SS_DENY_SELF_AP_UNDER_SURVEY, -+ /*SS_DENY_SELF_STA_UNDER_WPS,*/ -+ SS_DENY_SELF_STA_UNDER_LINKING, -+ SS_DENY_SELF_STA_UNDER_SURVEY, -+ SS_DENY_BUDDY_UNDER_LINK_WPS, -+ SS_DENY_BUDDY_UNDER_SURVEY, -+ SS_DENY_BUSY_TRAFFIC, -+ SS_ALLOW, -+#ifdef DBG_LA_MODE -+ SS_DENY_LA_MODE, -+#endif -+ SS_DENY_ADAPTIVITY, -+}; -+ -+u8 _rtw_sitesurvey_condition_check(const char *caller, _adapter *adapter, bool check_sc_interval); -+#define rtw_sitesurvey_condition_check(adapter, check_sc_interval) _rtw_sitesurvey_condition_check(__func__, adapter, check_sc_interval) -+ -+#ifdef CONFIG_SET_SCAN_DENY_TIMER -+bool rtw_is_scan_deny(_adapter *adapter); -+void rtw_clear_scan_deny(_adapter *adapter); -+void rtw_set_scan_deny_timer_hdl(void *ctx); -+void rtw_set_scan_deny(_adapter *adapter, u32 ms); -+#else -+#define rtw_is_scan_deny(adapter) _FALSE -+#define rtw_clear_scan_deny(adapter) do {} while (0) -+#define rtw_set_scan_deny(adapter, ms) do {} while (0) -+#endif -+ -+void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv); -+ -+#define MLME_BEACON_IE 0 -+#define MLME_PROBE_REQ_IE 1 -+#define MLME_PROBE_RESP_IE 2 -+#define MLME_GO_PROBE_RESP_IE 3 -+#define MLME_ASSOC_REQ_IE 4 -+#define MLME_ASSOC_RESP_IE 5 -+ -+#if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) -+int rtw_mlme_update_wfd_ie_data(struct mlme_priv *mlme, u8 type, u8 *ie, u32 ie_len); -+#endif -+ -+ -+/* extern struct wlan_network* _rtw_dequeue_network(_queue *queue); */ -+ -+extern struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv); -+ -+ -+extern void _rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 isfreeall); -+extern void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork); -+ -+extern void _rtw_free_network_queue(_adapter *padapter, u8 isfreeall); -+ -+extern sint rtw_if_up(_adapter *padapter); -+ -+sint rtw_linked_check(_adapter *padapter); -+ -+u8 *rtw_get_capability_from_ie(u8 *ie); -+u8 *rtw_get_timestampe_from_ie(u8 *ie); -+u8 *rtw_get_beacon_interval_from_ie(u8 *ie); -+ -+ -+void rtw_joinbss_reset(_adapter *padapter); -+ -+#ifdef CONFIG_80211N_HT -+void rtw_ht_use_default_setting(_adapter *padapter); -+void rtw_build_wmm_ie_ht(_adapter *padapter, u8 *out_ie, uint *pout_len); -+unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len, u8 channel); -+void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel); -+void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe, u8 issue_when_busy); -+void rtw_append_exented_cap(_adapter *padapter, u8 *out_ie, uint *pout_len); -+#endif -+ -+int rtw_is_same_ibss(_adapter *adapter, struct wlan_network *pnetwork); -+int is_same_network(WLAN_BSSID_EX *src, WLAN_BSSID_EX *dst, u8 feature); -+ -+#ifdef CONFIG_LAYER2_ROAMING -+#define rtw_roam_flags(adapter) ((adapter)->mlmepriv.roam_flags) -+#define rtw_chk_roam_flags(adapter, flags) ((adapter)->mlmepriv.roam_flags & flags) -+#define rtw_clr_roam_flags(adapter, flags) \ -+ do { \ -+ ((adapter)->mlmepriv.roam_flags &= ~flags); \ -+ } while (0) -+ -+#define rtw_set_roam_flags(adapter, flags) \ -+ do { \ -+ ((adapter)->mlmepriv.roam_flags |= flags); \ -+ } while (0) -+ -+#define rtw_assign_roam_flags(adapter, flags) \ -+ do { \ -+ ((adapter)->mlmepriv.roam_flags = flags); \ -+ } while (0) -+ -+void _rtw_roaming(_adapter *adapter, struct wlan_network *tgt_network); -+void rtw_roaming(_adapter *adapter, struct wlan_network *tgt_network); -+void rtw_set_to_roam(_adapter *adapter, u8 to_roam); -+u8 rtw_dec_to_roam(_adapter *adapter); -+u8 rtw_to_roam(_adapter *adapter); -+int rtw_select_roaming_candidate(struct mlme_priv *pmlmepriv); -+#else -+#define rtw_roam_flags(adapter) 0 -+#define rtw_chk_roam_flags(adapter, flags) 0 -+#define rtw_clr_roam_flags(adapter, flags) do {} while (0) -+#define rtw_set_roam_flags(adapter, flags) do {} while (0) -+#define rtw_assign_roam_flags(adapter, flags) do {} while (0) -+#define _rtw_roaming(adapter, tgt_network) do {} while (0) -+#define rtw_roaming(adapter, tgt_network) do {} while (0) -+#define rtw_set_to_roam(adapter, to_roam) do {} while (0) -+#define rtw_dec_to_roam(adapter) 0 -+#define rtw_to_roam(adapter) 0 -+#define rtw_select_roaming_candidate(mlme) _FAIL -+#endif /* CONFIG_LAYER2_ROAMING */ -+ -+bool rtw_adjust_chbw(_adapter *adapter, u8 req_ch, u8 *req_bw, u8 *req_offset); -+ -+struct sta_media_status_rpt_cmd_parm { -+ struct sta_info *sta; -+ bool connected; -+}; -+ -+#ifdef CONFIG_RTW_MULTI_AP -+void rtw_unassoc_sta_set_mode(_adapter *adapter, u8 stype, u8 mode); -+bool rtw_unassoc_sta_src_chk(_adapter *adapter, u8 stype); -+void dump_unassoc_sta(void *sel, _adapter *adapter); -+void rtw_del_unassoc_sta_queue(_adapter *adapter); -+void rtw_del_unassoc_sta(_adapter *adapter, u8 *addr); -+void rtw_rx_add_unassoc_sta(_adapter *adapter, u8 stype, u8 *addr, s8 recv_signal_power); -+void rtw_add_interested_unassoc_sta(_adapter *adapter, u8 *addr); -+void rtw_undo_interested_unassoc_sta(_adapter *adapter, u8 *addr); -+void rtw_undo_all_interested_unassoc_sta(_adapter *adapter); -+u8 rtw_search_unassoc_sta(_adapter *adapter, u8 *addr, struct unassoc_sta_info *ret_sta); -+#endif -+ -+void rtw_sta_media_status_rpt(_adapter *adapter, struct sta_info *sta, bool connected); -+u8 rtw_sta_media_status_rpt_cmd(_adapter *adapter, struct sta_info *sta, bool connected); -+void rtw_sta_media_status_rpt_cmd_hdl(_adapter *adapter, struct sta_media_status_rpt_cmd_parm *parm); -+void rtw_sta_traffic_info(void *sel, _adapter *adapter); -+ -+#define GET_ARP_HTYPE(_arp) BE_BITS_TO_2BYTE(((u8 *)(_arp)) + 0, 0, 16) -+#define GET_ARP_PTYPE(_arp) BE_BITS_TO_2BYTE(((u8 *)(_arp)) + 2, 0, 16) -+#define GET_ARP_HLEN(_arp) BE_BITS_TO_1BYTE(((u8 *)(_arp)) + 4, 0, 8) -+#define GET_ARP_PLEN(_arp) BE_BITS_TO_1BYTE(((u8 *)(_arp)) + 5, 0, 8) -+#define GET_ARP_OPER(_arp) BE_BITS_TO_2BYTE(((u8 *)(_arp)) + 6, 0, 16) -+ -+#define SET_ARP_HTYPE(_arp, _val) SET_BITS_TO_BE_2BYTE(((u8 *)(_arp)) + 0, 0, 16, _val) -+#define SET_ARP_PTYPE(_arp, _val) SET_BITS_TO_BE_2BYTE(((u8 *)(_arp)) + 2, 0, 16, _val) -+#define SET_ARP_HLEN(_arp, _val) SET_BITS_TO_BE_1BYTE(((u8 *)(_arp)) + 4, 0, 8, _val) -+#define SET_ARP_PLEN(_arp, _val) SET_BITS_TO_BE_1BYTE(((u8 *)(_arp)) + 5, 0, 8, _val) -+#define SET_ARP_OPER(_arp, _val) SET_BITS_TO_BE_2BYTE(((u8 *)(_arp)) + 6, 0, 16, _val) -+ -+#define ARP_SHA(_arp, _hlen, _plen) (((u8 *)(_arp)) + 8) -+#define ARP_SPA(_arp, _hlen, _plen) (((u8 *)(_arp)) + 8 + (_hlen)) -+#define ARP_THA(_arp, _hlen, _plen) (((u8 *)(_arp)) + 8 + (_hlen) + (_plen)) -+#define ARP_TPA(_arp, _hlen, _plen) (((u8 *)(_arp)) + 8 + 2 * (_hlen) + (_plen)) -+ -+#define ARP_SENDER_MAC_ADDR(_arp) ARP_SHA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN) -+#define ARP_SENDER_IP_ADDR(_arp) ARP_SPA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN) -+#define ARP_TARGET_MAC_ADDR(_arp) ARP_THA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN) -+#define ARP_TARGET_IP_ADDR(_arp) ARP_TPA(_arp, ETH_ALEN, RTW_IP_ADDR_LEN) -+ -+#define GET_ARP_SENDER_MAC_ADDR(_arp, _val) _rtw_memcpy(_val, ARP_SENDER_MAC_ADDR(_arp), ETH_ALEN) -+#define GET_ARP_SENDER_IP_ADDR(_arp, _val) _rtw_memcpy(_val, ARP_SENDER_IP_ADDR(_arp), RTW_IP_ADDR_LEN) -+#define GET_ARP_TARGET_MAC_ADDR(_arp, _val) _rtw_memcpy(_val, ARP_TARGET_MAC_ADDR(_arp), ETH_ALEN) -+#define GET_ARP_TARGET_IP_ADDR(_arp, _val) _rtw_memcpy(_val, ARP_TARGET_IP_ADDR(_arp), RTW_IP_ADDR_LEN) -+ -+#define SET_ARP_SENDER_MAC_ADDR(_arp, _val) _rtw_memcpy(ARP_SENDER_MAC_ADDR(_arp), _val, ETH_ALEN) -+#define SET_ARP_SENDER_IP_ADDR(_arp, _val) _rtw_memcpy(ARP_SENDER_IP_ADDR(_arp), _val, RTW_IP_ADDR_LEN) -+#define SET_ARP_TARGET_MAC_ADDR(_arp, _val) _rtw_memcpy(ARP_TARGET_MAC_ADDR(_arp), _val, ETH_ALEN) -+#define SET_ARP_TARGET_IP_ADDR(_arp, _val) _rtw_memcpy(ARP_TARGET_IP_ADDR(_arp), _val, RTW_IP_ADDR_LEN) -+ -+void dump_arp_pkt(void *sel, u8 *da, u8 *sa, u8 *arp, bool tx); -+ -+#define IPV4_SRC(_iphdr) (((u8 *)(_iphdr)) + 12) -+#define IPV4_DST(_iphdr) (((u8 *)(_iphdr)) + 16) -+#define GET_IPV4_IHL(_iphdr) BE_BITS_TO_1BYTE(((u8 *)(_iphdr)) + 0, 0, 4) -+#define GET_IPV4_PROTOCOL(_iphdr) BE_BITS_TO_1BYTE(((u8 *)(_iphdr)) + 9, 0, 8) -+#define GET_IPV4_SRC(_iphdr) BE_BITS_TO_4BYTE(((u8 *)(_iphdr)) + 12, 0, 32) -+#define GET_IPV4_DST(_iphdr) BE_BITS_TO_4BYTE(((u8 *)(_iphdr)) + 16, 0, 32) -+ -+#define GET_UDP_SRC(_udphdr) BE_BITS_TO_2BYTE(((u8 *)(_udphdr)) + 0, 0, 16) -+#define GET_UDP_DST(_udphdr) BE_BITS_TO_2BYTE(((u8 *)(_udphdr)) + 2, 0, 16) -+#define GET_UDP_SIG1(_udphdr) BE_BITS_TO_1BYTE(((u8 *)(_udphdr)) + 8, 0, 8) -+#define GET_UDP_SIG2(_udphdr) BE_BITS_TO_1BYTE(((u8 *)(_udphdr)) + 23, 0, 8) -+ -+#define TCP_SRC(_tcphdr) (((u8 *)(_tcphdr)) + 0) -+#define TCP_DST(_tcphdr) (((u8 *)(_tcphdr)) + 2) -+#define GET_TCP_SRC(_tcphdr) BE_BITS_TO_2BYTE(((u8 *)(_tcphdr)) + 0, 0, 16) -+#define GET_TCP_DST(_tcphdr) BE_BITS_TO_2BYTE(((u8 *)(_tcphdr)) + 2, 0, 16) -+#define GET_TCP_SEQ(_tcphdr) BE_BITS_TO_4BYTE(((u8 *)(_tcphdr)) + 4, 0, 32) -+#define GET_TCP_ACK_SEQ(_tcphdr) BE_BITS_TO_4BYTE(((u8 *)(_tcphdr)) + 8, 0, 32) -+#define GET_TCP_DOFF(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 12, 4, 4) -+#define GET_TCP_FIN(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 0, 1) -+#define GET_TCP_SYN(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 1, 1) -+#define GET_TCP_RST(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 2, 1) -+#define GET_TCP_PSH(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 3, 1) -+#define GET_TCP_ACK(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 4, 1) -+#define GET_TCP_URG(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 5, 1) -+#define GET_TCP_ECE(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 6, 1) -+#define GET_TCP_CWR(_tcphdr) BE_BITS_TO_1BYTE(((u8 *)(_tcphdr)) + 13, 7, 1) -+ -+#endif /* __RTL871X_MLME_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_mlme_ext.h b/drivers/staging/rtl8723cs/include/rtw_mlme_ext.h -new file mode 100644 -index 000000000000..af05277c64c7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_mlme_ext.h -@@ -0,0 +1,1239 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_MLME_EXT_H_ -+#define __RTW_MLME_EXT_H_ -+ -+ -+/* Commented by Albert 20101105 -+ * Increase the SURVEY_TO value from 100 to 150 ( 100ms to 150ms ) -+ * The Realtek 8188CE SoftAP will spend around 100ms to send the probe response after receiving the probe request. -+ * So, this driver tried to extend the dwell time for each scanning channel. -+ * This will increase the chance to receive the probe response from SoftAP. */ -+#define SURVEY_TO (100) -+ -+#define REAUTH_TO (300) /* (50) */ -+#define REASSOC_TO (300) /* (50) */ -+/* #define DISCONNECT_TO (3000) */ -+#define ADDBA_TO (2000) -+ -+#define LINKED_TO (1) /* unit:2 sec, 1x2 = 2 sec */ -+ -+#define REAUTH_LIMIT (4) -+#define REASSOC_LIMIT (4) -+#define READDBA_LIMIT (2) -+ -+#ifdef CONFIG_GSPI_HCI -+ #define ROAMING_LIMIT 5 -+#else -+ #define ROAMING_LIMIT 8 -+#endif -+ -+/*net_type, pmlmeinfo->state*/ -+#define _HW_STATE_NOLINK_ 0x00 -+#define _HW_STATE_ADHOC_ 0x01 -+#define _HW_STATE_STATION_ 0x02 -+#define _HW_STATE_AP_ 0x03 -+#define _HW_STATE_MONITOR_ 0x04 -+ -+#define WIFI_FW_NULL_STATE _HW_STATE_NOLINK_ -+#define WIFI_FW_STATION_STATE _HW_STATE_STATION_ -+#define WIFI_FW_AP_STATE _HW_STATE_AP_ -+#define WIFI_FW_ADHOC_STATE _HW_STATE_ADHOC_ -+ -+#define WIFI_FW_PRE_LINK 0x00000800 -+#define WIFI_FW_AUTH_NULL 0x00000100 -+#define WIFI_FW_AUTH_STATE 0x00000200 -+#define WIFI_FW_AUTH_SUCCESS 0x00000400 -+ -+#define WIFI_FW_ASSOC_STATE 0x00002000 -+#define WIFI_FW_ASSOC_SUCCESS 0x00004000 -+ -+#define WIFI_FW_LINKING_STATE (WIFI_FW_AUTH_NULL | WIFI_FW_AUTH_STATE | WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE) -+ -+ -+#define _1M_RATE_ 0 -+#define _2M_RATE_ 1 -+#define _5M_RATE_ 2 -+#define _11M_RATE_ 3 -+#define _6M_RATE_ 4 -+#define _9M_RATE_ 5 -+#define _12M_RATE_ 6 -+#define _18M_RATE_ 7 -+#define _24M_RATE_ 8 -+#define _36M_RATE_ 9 -+#define _48M_RATE_ 10 -+#define _54M_RATE_ 11 -+ -+/******************************************************** -+MCS rate definitions -+*********************************************************/ -+#define MCS_RATE_1R (0x000000ff) -+#define MCS_RATE_2R (0x0000ffff) -+#define MCS_RATE_3R (0x00ffffff) -+#define MCS_RATE_4R (0xffffffff) -+#define MCS_RATE_2R_13TO15_OFF (0x00001fff) -+ -+ -+extern unsigned char RTW_WPA_OUI[]; -+extern unsigned char WMM_OUI[]; -+extern unsigned char WPS_OUI[]; -+extern unsigned char WFD_OUI[]; -+extern unsigned char P2P_OUI[]; -+extern unsigned char MULTI_AP_OUI[]; -+ -+extern unsigned char WMM_INFO_OUI[]; -+extern unsigned char WMM_PARA_OUI[]; -+ -+typedef struct _RT_CHANNEL_PLAN { -+ unsigned char Channel[MAX_CHANNEL_NUM]; -+ unsigned char Len; -+} RT_CHANNEL_PLAN, *PRT_CHANNEL_PLAN; -+ -+typedef enum _HT_IOT_PEER { -+ HT_IOT_PEER_UNKNOWN = 0, -+ HT_IOT_PEER_REALTEK = 1, -+ HT_IOT_PEER_REALTEK_92SE = 2, -+ HT_IOT_PEER_BROADCOM = 3, -+ HT_IOT_PEER_RALINK = 4, -+ HT_IOT_PEER_ATHEROS = 5, -+ HT_IOT_PEER_CISCO = 6, -+ HT_IOT_PEER_MERU = 7, -+ HT_IOT_PEER_MARVELL = 8, -+ HT_IOT_PEER_REALTEK_SOFTAP = 9,/* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */ -+ HT_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */ -+ HT_IOT_PEER_AIRGO = 11, -+ HT_IOT_PEER_INTEL = 12, -+ HT_IOT_PEER_RTK_APCLIENT = 13, -+ HT_IOT_PEER_REALTEK_81XX = 14, -+ HT_IOT_PEER_REALTEK_WOW = 15, -+ HT_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16, -+ HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17, -+ HT_IOT_PEER_MAX = 18 -+} HT_IOT_PEER_E, *PHTIOT_PEER_E; -+ -+ -+typedef enum _RT_HT_INF0_CAP { -+ RT_HT_CAP_USE_TURBO_AGGR = 0x01, -+ RT_HT_CAP_USE_LONG_PREAMBLE = 0x02, -+ RT_HT_CAP_USE_AMPDU = 0x04, -+ RT_HT_CAP_USE_WOW = 0x8, -+ RT_HT_CAP_USE_SOFTAP = 0x10, -+ RT_HT_CAP_USE_92SE = 0x20, -+ RT_HT_CAP_USE_88C_92C = 0x40, -+ RT_HT_CAP_USE_AP_CLIENT_MODE = 0x80, /* AP team request to reserve this bit, by Emily */ -+} RT_HT_INF0_CAPBILITY, *PRT_HT_INF0_CAPBILITY; -+ -+typedef enum _RT_HT_INF1_CAP { -+ RT_HT_CAP_USE_VIDEO_CLIENT = 0x01, -+ RT_HT_CAP_USE_JAGUAR_BCUT = 0x02, -+ RT_HT_CAP_USE_JAGUAR_CCUT = 0x04, -+} RT_HT_INF1_CAPBILITY, *PRT_HT_INF1_CAPBILITY; -+ -+struct mlme_handler { -+ unsigned int num; -+ char *str; -+ unsigned int (*func)(_adapter *padapter, union recv_frame *precv_frame); -+}; -+ -+struct action_handler { -+ unsigned int num; -+ char *str; -+ unsigned int (*func)(_adapter *padapter, union recv_frame *precv_frame); -+}; -+ -+enum SCAN_STATE { -+ SCAN_DISABLE = 0, -+ SCAN_START = 1, -+ SCAN_PS_ANNC_WAIT = 2, -+ SCAN_ENTER = 3, -+ SCAN_PROCESS = 4, -+ -+ /* backop */ -+ SCAN_BACKING_OP = 5, -+ SCAN_BACK_OP = 6, -+ SCAN_LEAVING_OP = 7, -+ SCAN_LEAVE_OP = 8, -+ -+ /* SW antenna diversity (before linked) */ -+ SCAN_SW_ANTDIV_BL = 9, -+ -+ /* legacy p2p */ -+ SCAN_TO_P2P_LISTEN = 10, -+ SCAN_P2P_LISTEN = 11, -+ -+ SCAN_COMPLETE = 12, -+ SCAN_STATE_MAX, -+}; -+ -+const char *scan_state_str(u8 state); -+ -+enum ss_backop_flag { -+ SS_BACKOP_EN = BIT0, /* backop when linked */ -+ SS_BACKOP_EN_NL = BIT1, /* backop even when no linked */ -+ -+ SS_BACKOP_PS_ANNC = BIT4, -+ SS_BACKOP_TX_RESUME = BIT5, -+}; -+ -+struct ss_res { -+ u8 state; -+ u8 next_state; /* will set to state on next cmd hdl */ -+ int bss_cnt; -+ u8 activate_ch_cnt; -+ int channel_idx; -+ u8 force_ssid_scan; -+ int scan_mode; -+ u16 scan_ch_ms; -+ u32 scan_timeout_ms; -+ u8 rx_ampdu_accept; -+ u8 rx_ampdu_size; -+ u8 igi_scan; -+ u8 igi_before_scan; /* used for restoring IGI value without enable DIG & FA_CNT */ -+#ifdef CONFIG_SCAN_BACKOP -+ u8 backop_flags_sta; /* policy for station mode*/ -+ #ifdef CONFIG_AP_MODE -+ u8 backop_flags_ap; /* policy for ap mode */ -+ #endif -+ #ifdef CONFIG_RTW_MESH -+ u8 backop_flags_mesh; /* policy for mesh mode */ -+ #endif -+ u8 backop_flags; /* per backop runtime decision */ -+ u8 scan_cnt; -+ u8 scan_cnt_max; -+ systime backop_time; /* the start time of backop */ -+ u16 backop_ms; -+#endif -+#if defined(CONFIG_ANTENNA_DIVERSITY) || defined(DBG_SCAN_SW_ANTDIV_BL) -+ u8 is_sw_antdiv_bl_scan; -+#endif -+ u8 ssid_num; -+ u8 ch_num; -+ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; -+ struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT]; -+ -+ u32 token; /* 0: use to identify caller */ -+ u16 duration; /* 0: use default */ -+ u8 igi; /* 0: use defalut */ -+ u8 bw; /* 0: use default */ -+ -+ bool acs; /* aim to trigger channel selection when scan done */ -+}; -+ -+#ifdef CONFIG_TDLS -+enum TDLS_option { -+ TDLS_ESTABLISHED = 1, -+ TDLS_ISSUE_PTI, -+ TDLS_CH_SW_RESP, -+ TDLS_CH_SW_PREPARE, -+ TDLS_CH_SW_START, -+ TDLS_CH_SW_TO_OFF_CHNL, -+ TDLS_CH_SW_TO_BASE_CHNL_UNSOLICITED, -+ TDLS_CH_SW_TO_BASE_CHNL, -+ TDLS_CH_SW_END_TO_BASE_CHNL, -+ TDLS_CH_SW_END, -+ TDLS_RS_RCR, -+ TDLS_TEARDOWN_STA, -+ TDLS_TEARDOWN_STA_NO_WAIT, -+ TDLS_TEARDOWN_STA_LOCALLY, -+ TDLS_TEARDOWN_STA_LOCALLY_POST, -+ maxTDLS, -+}; -+ -+#endif /* CONFIG_TDLS */ -+ -+/* -+ * Usage: -+ * When one iface acted as AP mode and the other iface is STA mode and scanning, -+ * it should switch back to AP's operating channel periodically. -+ * Parameters info: -+ * When the driver scanned RTW_SCAN_NUM_OF_CH channels, it would switch back to AP's operating channel for -+ * RTW_BACK_OP_CH_MS milliseconds. -+ * Example: -+ * For chip supports 2.4G + 5GHz and AP mode is operating in channel 1, -+ * RTW_SCAN_NUM_OF_CH is 8, RTW_BACK_OP_CH_MS is 300 -+ * When it's STA mode gets set_scan command, -+ * it would -+ * 1. Doing the scan on channel 1.2.3.4.5.6.7.8 -+ * 2. Back to channel 1 for 300 milliseconds -+ * 3. Go through doing site survey on channel 9.10.11.36.40.44.48.52 -+ * 4. Back to channel 1 for 300 milliseconds -+ * 5. ... and so on, till survey done. -+ */ -+#if defined(CONFIG_ATMEL_RC_PATCH) -+ #define RTW_SCAN_NUM_OF_CH 2 -+ #define RTW_BACK_OP_CH_MS 200 -+#elseif defined(CONFIG_CUSTOMER_EZVIZ_CHIME2) -+ #define RTW_SCAN_NUM_OF_CH 1 -+ #define RTW_BACK_OP_CH_MS 200 -+#else -+ #define RTW_SCAN_NUM_OF_CH 3 -+ #define RTW_BACK_OP_CH_MS 400 -+#endif -+ -+#define RTW_IP_ADDR_LEN 4 -+#define RTW_IPv6_ADDR_LEN 16 -+ -+struct mlme_ext_info { -+ u32 state; -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ u8 hw_media_state; -+#endif -+ u32 reauth_count; -+ u32 reassoc_count; -+ u32 link_count; -+ u32 auth_seq; -+ u32 auth_algo; /* 802.11 auth, could be open, shared, auto */ -+ u16 auth_status; -+ u32 authModeToggle; -+ u32 enc_algo;/* encrypt algorithm; */ -+ u32 key_index; /* this is only valid for legendary wep, 0~3 for key id. */ -+ u32 iv; -+ u8 chg_txt[128]; -+ u16 aid; -+ u16 bcn_interval; -+ u16 capability; -+ u8 assoc_AP_vendor; -+ u8 slotTime; -+ u8 preamble_mode; -+ u8 WMM_enable; -+ u8 ERP_enable; -+ u8 ERP_IE; -+ u8 HT_enable; -+ u8 HT_caps_enable; -+ u8 HT_info_enable; -+ u8 HT_protection; -+ u8 turboMode_cts2self; -+ u8 turboMode_rtsen; -+ u8 SM_PS; -+ u8 agg_enable_bitmap; -+ u8 ADDBA_retry_count; -+ u8 candidate_tid_bitmap; -+ u8 dialogToken; -+ /* Accept ADDBA Request */ -+ BOOLEAN bAcceptAddbaReq; -+ u8 bwmode_updated; -+ u8 hidden_ssid_mode; -+ u8 VHT_enable; -+ -+ u8 ip_addr[RTW_IP_ADDR_LEN]; -+ u8 ip6_addr[RTW_IPv6_ADDR_LEN]; -+ -+ struct ADDBA_request ADDBA_req; -+ struct WMM_para_element WMM_param; -+ struct HT_caps_element HT_caps; -+ struct HT_info_element HT_info; -+ WLAN_BSSID_EX network;/* join network or bss_network, if in ap mode, it is the same to cur_network.network */ -+#ifdef ROKU_PRIVATE -+ /*infra mode, store supported rates from AssocRsp*/ -+ NDIS_802_11_RATES_EX SupportedRates_infra_ap; -+ u8 ht_vht_received;/*ht_vht_received used to show debug msg BIT(0):HT BIT(1):VHT */ -+#endif /* ROKU_PRIVATE */ -+}; -+ -+enum { -+ RTW_CHF_NO_IR = BIT0, -+ RTW_CHF_DFS = BIT1, -+ RTW_CHF_LONG_CAC = BIT2, -+ RTW_CHF_NON_OCP = BIT3, -+ RTW_CHF_NO_HT40U = BIT4, -+ RTW_CHF_NO_HT40L = BIT5, -+ RTW_CHF_NO_80MHZ = BIT6, -+ RTW_CHF_NO_160MHZ = BIT7, -+}; -+ -+/* The channel information about this channel including joining, scanning, and power constraints. */ -+typedef struct _RT_CHANNEL_INFO { -+ u8 ChannelNum; /* The channel number. */ -+ -+ /* -+ * Bitmap and its usage: -+ * RTW_CHF_NO_IR, RTW_CHF_DFS: is used to check for status -+ * RTW_CHF_NO_HT40U, RTW_CHF_NO_HT40L, RTW_CHF_NO_80MHZ, RTW_CHF_NO_160MHZ: extra bandwidth limitation (ex: from regulatory) -+ * RTW_CHF_NON_OCP: is only used to record if event is reported, status check is still done using non_ocp_end_time -+ */ -+ u8 flags; -+ /* u16 ScanPeriod; */ /* Listen time in millisecond in this channel. */ -+ /* s32 MaxTxPwrDbm; */ /* Max allowed tx power. */ -+ /* u32 ExInfo; */ /* Extended Information for this channel. */ -+#ifdef CONFIG_FIND_BEST_CHANNEL -+ u32 rx_count; -+#endif -+#if CONFIG_IEEE80211_BAND_5GHZ && CONFIG_DFS -+ #ifdef CONFIG_DFS_MASTER -+ systime non_ocp_end_time; -+ #endif -+#endif -+ u8 hidden_bss_cnt; /* per scan count */ -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ void *os_chan; -+#endif -+} RT_CHANNEL_INFO, *PRT_CHANNEL_INFO; -+ -+#define CAC_TIME_MS (60*1000) -+#define CAC_TIME_CE_MS (10*60*1000) -+#define NON_OCP_TIME_MS (30*60*1000) -+ -+#if CONFIG_TXPWR_LIMIT -+void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl); -+#endif -+int rtw_rfctl_init(_adapter *adapter); -+void rtw_rfctl_deinit(_adapter *adapter); -+void rtw_rfctl_chplan_init(_adapter *adapter); -+void rtw_rfctl_update_op_mode(struct rf_ctl_t *rfctl, u8 ifbmp_mod, u8 if_op); -+ -+u8 rtw_rfctl_get_dfs_domain(struct rf_ctl_t *rfctl); -+u8 rtw_rfctl_dfs_domain_unknown(struct rf_ctl_t *rfctl); -+ -+#ifdef CONFIG_DFS_MASTER -+struct rf_ctl_t; -+#define CH_IS_NON_OCP(rt_ch_info) (rtw_time_after((rt_ch_info)->non_ocp_end_time, rtw_get_current_time())) -+bool rtw_is_cac_reset_needed(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset); -+bool _rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset); -+bool rtw_rfctl_overlap_radar_detect_ch(struct rf_ctl_t *rfctl); -+bool rtw_rfctl_is_tx_blocked_by_ch_waiting(struct rf_ctl_t *rfctl); -+bool rtw_chset_is_chbw_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset); -+bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch); -+bool rtw_chset_update_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset); -+bool rtw_chset_update_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset, int ms); -+void rtw_chset_chk_non_ocp_finish(struct rf_ctl_t *rfctl); -+u32 rtw_get_ch_waiting_ms(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms); -+void rtw_reset_cac(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset); -+u32 rtw_force_stop_cac(struct rf_ctl_t *rfctl, u32 timeout_ms); -+#else -+#define CH_IS_NON_OCP(rt_ch_info) 0 -+#define rtw_chset_is_chbw_non_ocp(ch_set, ch, bw, offset) _FALSE -+#define rtw_chset_is_ch_non_ocp(ch_set, ch) _FALSE -+#define rtw_rfctl_is_tx_blocked_by_ch_waiting(rfctl) _FALSE -+#endif -+ -+bool rtw_choose_shortest_waiting_ch(struct rf_ctl_t *rfctl, u8 sel_ch, u8 max_bw -+ , u8 *dec_ch, u8 *dec_bw, u8 *dec_offset -+ , u8 e_flags, u8 d_flags, u8 cur_ch, bool by_int_info, u8 mesh_only); -+ -+struct get_chplan_resp { -+ enum regd_src_t regd_src; -+ bool has_country; -+ struct country_chplan country_ent; -+ u8 channel_plan; -+#if CONFIG_TXPWR_LIMIT -+ const char *regd_name; -+#endif -+#ifdef CONFIG_DFS_MASTER -+ u8 dfs_domain; -+#endif -+ u8 chset_num; -+ RT_CHANNEL_INFO chset[0]; -+}; -+ -+#ifdef CONFIG_PROC_DEBUG -+void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set, u8 chset_num); -+void dump_cur_chset(void *sel, struct rf_ctl_t *rfctl); -+#endif -+ -+int rtw_chset_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch); -+u8 rtw_chset_is_chbw_valid(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset -+ , bool allow_primary_passive, bool allow_passive); -+void rtw_chset_sync_chbw(RT_CHANNEL_INFO *ch_set, u8 *req_ch, u8 *req_bw, u8 *req_offset -+ , u8 *g_ch, u8 *g_bw, u8 *g_offset, bool allow_primary_passive, bool allow_passive); -+ -+bool rtw_mlme_band_check(_adapter *adapter, const u32 ch); -+ -+ -+enum { -+ BAND_24G = BIT0, -+ BAND_5G = BIT1, -+}; -+void RTW_SET_SCAN_BAND_SKIP(_adapter *padapter, int skip_band); -+void RTW_CLR_SCAN_BAND_SKIP(_adapter *padapter, int skip_band); -+int RTW_GET_SCAN_BAND_SKIP(_adapter *padapter); -+ -+bool rtw_mlme_ignore_chan(_adapter *adapter, const u32 ch); -+ -+/* P2P_MAX_REG_CLASSES - Maximum number of regulatory classes */ -+#define P2P_MAX_REG_CLASSES 10 -+ -+/* P2P_MAX_REG_CLASS_CHANNELS - Maximum number of channels per regulatory class */ -+#define P2P_MAX_REG_CLASS_CHANNELS 20 -+ -+/* struct p2p_channels - List of supported channels */ -+struct p2p_channels { -+ /* struct p2p_reg_class - Supported regulatory class */ -+ struct p2p_reg_class { -+ /* reg_class - Regulatory class (IEEE 802.11-2007, Annex J) */ -+ u8 reg_class; -+ -+ /* channel - Supported channels */ -+ u8 channel[P2P_MAX_REG_CLASS_CHANNELS]; -+ -+ /* channels - Number of channel entries in use */ -+ size_t channels; -+ } reg_class[P2P_MAX_REG_CLASSES]; -+ -+ /* reg_classes - Number of reg_class entries in use */ -+ size_t reg_classes; -+}; -+ -+struct p2p_oper_class_map { -+ enum hw_mode {IEEE80211G, IEEE80211A} mode; -+ u8 op_class; -+ u8 min_chan; -+ u8 max_chan; -+ u8 inc; -+ enum { BW20, BW40PLUS, BW40MINUS } bw; -+}; -+ -+struct mlme_ext_priv { -+ _adapter *padapter; -+ u8 mlmeext_init; -+ ATOMIC_T event_seq; -+ u16 mgnt_seq; -+#ifdef CONFIG_IEEE80211W -+ u16 sa_query_seq; -+#endif -+ /* struct fw_priv fwpriv; */ -+ -+ unsigned char cur_channel; -+ unsigned char cur_bwmode; -+ unsigned char cur_ch_offset;/* PRIME_CHNL_OFFSET */ -+ unsigned char cur_wireless_mode; /* NETWORK_TYPE */ -+ -+ unsigned char basicrate[NumRates]; -+ unsigned char datarate[NumRates]; -+#ifdef CONFIG_80211N_HT -+ unsigned char default_supported_mcs_set[16]; -+#endif -+ -+ struct ss_res sitesurvey_res; -+ struct mlme_ext_info mlmext_info;/* for sta/adhoc mode, including current scanning/connecting/connected related info. -+ * for ap mode, network includes ap's cap_info */ -+ _timer survey_timer; -+ _timer link_timer; -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ _timer rson_scan_timer; -+#endif -+#ifdef CONFIG_RTW_80211R -+ _timer ft_link_timer; -+ _timer ft_roam_timer; -+#endif -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ _timer tbtx_xmit_timer; -+ _timer tbtx_token_dispatch_timer; -+#endif -+ -+ systime last_scan_time; -+ u8 scan_abort; -+ u8 join_abort; -+ u8 tx_rate; /* TXRATE when USERATE is set. */ -+ -+ u32 retry; /* retry for issue probereq */ -+ -+ u64 TSFValue; -+ u32 bcn_cnt; -+ u32 last_bcn_cnt; -+ u8 cur_bcn_cnt;/*2s*/ -+ u8 dtim;/*DTIM Period*/ -+#ifdef DBG_RX_BCN -+ u8 tim[4]; -+#endif -+#ifdef CONFIG_BCN_RECV_TIME -+ u16 bcn_rx_time; -+#endif -+#ifdef CONFIG_AP_MODE -+ unsigned char bstart_bss; -+#endif -+ -+#ifdef CONFIG_80211D -+ u8 update_channel_plan_by_ap_done; -+#endif -+ /* recv_decache check for Action_public frame */ -+ u8 action_public_dialog_token; -+ u16 action_public_rxseq; -+ -+ /* #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ -+ u8 active_keep_alive_check; -+ /* #endif */ -+#ifdef DBG_FIXED_CHAN -+ u8 fixed_chan; -+#endif -+ -+ u8 tsf_update_required:1; -+ u8 en_hw_update_tsf:1; /* set hw sync bcn tsf register or not */ -+ systime tsf_update_pause_stime; -+ u8 tsf_update_pause_factor; /* num of bcn intervals to stay TSF update pause status */ -+ u8 tsf_update_restore_factor; /* num of bcn interval to stay TSF update restore status */ -+#ifdef CONFIG_SUPPORT_STATIC_SMPS -+ u8 ssmps_en; -+ u16 ssmps_tx_tp_th;/*Mbps*/ -+ u16 ssmps_rx_tp_th;/*Mbps*/ -+ #ifdef DBG_STATIC_SMPS -+ u8 ssmps_test; -+ u8 ssmps_test_en; -+ #endif -+#endif -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+ u8 txss_ctrl_en; -+ u16 txss_tp_th;/*Mbps*/ -+ u8 txss_tp_chk_cnt;/*unit 2s*/ -+ bool txss_1ss; -+ u8 txss_momi_type_bk; -+#endif -+#ifdef CONFIG_DFS -+ _timer csa_timer; -+#endif /* CONFIG_DFS */ -+}; -+ -+struct support_rate_handler { -+ u8 rate; -+ bool basic; -+ bool existence; -+}; -+ -+static inline u8 check_mlmeinfo_state(struct mlme_ext_priv *plmeext, sint state) -+{ -+ if ((plmeext->mlmext_info.state & 0x03) == state) -+ return _TRUE; -+ -+ return _FALSE; -+} -+ -+void sitesurvey_set_offch_state(_adapter *adapter, u8 scan_state); -+ -+#define mlmeext_msr(mlmeext) ((mlmeext)->mlmext_info.state & 0x03) -+#define mlmeext_scan_state(mlmeext) ((mlmeext)->sitesurvey_res.state) -+#define mlmeext_scan_state_str(mlmeext) scan_state_str((mlmeext)->sitesurvey_res.state) -+#define mlmeext_chk_scan_state(mlmeext, _state) ((mlmeext)->sitesurvey_res.state == (_state)) -+#define mlmeext_set_scan_state(mlmeext, _state) \ -+ do { \ -+ ((mlmeext)->sitesurvey_res.state = (_state)); \ -+ ((mlmeext)->sitesurvey_res.next_state = (_state)); \ -+ rtw_mi_update_iface_status(&((container_of(mlmeext, _adapter, mlmeextpriv)->mlmepriv)), 0); \ -+ /* RTW_INFO("set_scan_state:%s\n", scan_state_str(_state)); */ \ -+ sitesurvey_set_offch_state(container_of(mlmeext, _adapter, mlmeextpriv), _state); \ -+ } while (0) -+ -+#define mlmeext_scan_next_state(mlmeext) ((mlmeext)->sitesurvey_res.next_state) -+#define mlmeext_set_scan_next_state(mlmeext, _state) \ -+ do { \ -+ ((mlmeext)->sitesurvey_res.next_state = (_state)); \ -+ /* RTW_INFO("set_scan_next_state:%s\n", scan_state_str(_state)); */ \ -+ } while (0) -+ -+#ifdef CONFIG_SCAN_BACKOP -+#define mlmeext_scan_backop_flags(mlmeext) ((mlmeext)->sitesurvey_res.backop_flags) -+#define mlmeext_chk_scan_backop_flags(mlmeext, flags) ((mlmeext)->sitesurvey_res.backop_flags & (flags)) -+#define mlmeext_assign_scan_backop_flags(mlmeext, flags) \ -+ do { \ -+ ((mlmeext)->sitesurvey_res.backop_flags = (flags)); \ -+ RTW_INFO("assign_scan_backop_flags:0x%02x\n", (mlmeext)->sitesurvey_res.backop_flags); \ -+ } while (0) -+ -+#define mlmeext_scan_backop_flags_sta(mlmeext) ((mlmeext)->sitesurvey_res.backop_flags_sta) -+#define mlmeext_chk_scan_backop_flags_sta(mlmeext, flags) ((mlmeext)->sitesurvey_res.backop_flags_sta & (flags)) -+#define mlmeext_assign_scan_backop_flags_sta(mlmeext, flags) \ -+ do { \ -+ ((mlmeext)->sitesurvey_res.backop_flags_sta = (flags)); \ -+ } while (0) -+#else -+#define mlmeext_scan_backop_flags(mlmeext) (0) -+#define mlmeext_chk_scan_backop_flags(mlmeext, flags) (0) -+#define mlmeext_assign_scan_backop_flags(mlmeext, flags) do {} while (0) -+ -+#define mlmeext_scan_backop_flags_sta(mlmeext) (0) -+#define mlmeext_chk_scan_backop_flags_sta(mlmeext, flags) (0) -+#define mlmeext_assign_scan_backop_flags_sta(mlmeext, flags) do {} while (0) -+#endif /* CONFIG_SCAN_BACKOP */ -+ -+#if defined(CONFIG_SCAN_BACKOP) && defined(CONFIG_AP_MODE) -+#define mlmeext_scan_backop_flags_ap(mlmeext) ((mlmeext)->sitesurvey_res.backop_flags_ap) -+#define mlmeext_chk_scan_backop_flags_ap(mlmeext, flags) ((mlmeext)->sitesurvey_res.backop_flags_ap & (flags)) -+#define mlmeext_assign_scan_backop_flags_ap(mlmeext, flags) \ -+ do { \ -+ ((mlmeext)->sitesurvey_res.backop_flags_ap = (flags)); \ -+ } while (0) -+#else -+#define mlmeext_scan_backop_flags_ap(mlmeext) (0) -+#define mlmeext_chk_scan_backop_flags_ap(mlmeext, flags) (0) -+#define mlmeext_assign_scan_backop_flags_ap(mlmeext, flags) do {} while (0) -+#endif /* defined(CONFIG_SCAN_BACKOP) && defined(CONFIG_AP_MODE) */ -+ -+#if defined(CONFIG_SCAN_BACKOP) && defined(CONFIG_RTW_MESH) -+#define mlmeext_scan_backop_flags_mesh(mlmeext) ((mlmeext)->sitesurvey_res.backop_flags_mesh) -+#define mlmeext_chk_scan_backop_flags_mesh(mlmeext, flags) ((mlmeext)->sitesurvey_res.backop_flags_mesh & (flags)) -+#define mlmeext_assign_scan_backop_flags_mesh(mlmeext, flags) \ -+ do { \ -+ ((mlmeext)->sitesurvey_res.backop_flags_mesh = (flags)); \ -+ } while (0) -+#else -+#define mlmeext_scan_backop_flags_mesh(mlmeext) (0) -+#define mlmeext_chk_scan_backop_flags_mesh(mlmeext, flags) (0) -+#define mlmeext_assign_scan_backop_flags_mesh(mlmeext, flags) do {} while (0) -+#endif /* defined(CONFIG_SCAN_BACKOP) && defined(CONFIG_RTW_MESH) */ -+ -+u32 rtw_scan_timeout_decision(_adapter *padapter); -+ -+void init_mlme_default_rate_set(_adapter *padapter); -+int init_mlme_ext_priv(_adapter *padapter); -+int init_hw_mlme_ext(_adapter *padapter); -+void free_mlme_ext_priv(struct mlme_ext_priv *pmlmeext); -+extern struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv); -+struct xmit_frame *alloc_mgtxmitframe_once(struct xmit_priv *pxmitpriv); -+ -+/* void fill_fwpriv(_adapter * padapter, struct fw_priv *pfwpriv); */ -+u8 judge_network_type(_adapter *padapter, unsigned char *rate, int ratelen); -+void get_rate_set(_adapter *padapter, unsigned char *pbssrate, int *bssrate_len); -+void set_mcs_rate_by_mask(u8 *mcs_set, u32 mask); -+void UpdateBrateTbl(_adapter *padapter, u8 *mBratesOS); -+void UpdateBrateTblForSoftAP(u8 *bssrateset, u32 bssratelen); -+void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 ch); -+ -+void Set_MSR(_adapter *padapter, u8 type); -+ -+ -+void rtw_set_external_auth_status(_adapter *padapter, const void *data, int len); -+ -+u8 rtw_get_oper_ch(_adapter *adapter); -+void rtw_set_oper_ch(_adapter *adapter, u8 ch); -+u8 rtw_get_oper_bw(_adapter *adapter); -+void rtw_set_oper_bw(_adapter *adapter, u8 bw); -+u8 rtw_get_oper_choffset(_adapter *adapter); -+void rtw_set_oper_choffset(_adapter *adapter, u8 offset); -+systime rtw_get_on_oper_ch_time(_adapter *adapter); -+systime rtw_get_on_cur_ch_time(_adapter *adapter); -+ -+void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode); -+ -+void csa_timer_hdl(void *FunctionContext); -+ -+unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval); -+ -+void _clear_cam_entry(_adapter *padapter, u8 entry); -+void write_cam_from_cache(_adapter *adapter, u8 id); -+void rtw_sec_cam_swap(_adapter *adapter, u8 cam_id_a, u8 cam_id_b); -+void rtw_clean_dk_section(_adapter *adapter); -+void rtw_clean_hw_dk_cam(_adapter *adapter); -+ -+/* modify both HW and cache */ -+void write_cam(_adapter *padapter, u8 id, u16 ctrl, u8 *mac, u8 *key); -+void clear_cam_entry(_adapter *padapter, u8 id); -+ -+/* modify cache only */ -+void write_cam_cache(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key); -+void clear_cam_cache(_adapter *adapter, u8 id); -+ -+void invalidate_cam_all(_adapter *padapter); -+ -+void flush_all_cam_entry(_adapter *padapter); -+ -+BOOLEAN IsLegal5GChannel(PADAPTER Adapter, u8 channel); -+ -+void site_survey(_adapter *padapter, u8 survey_channel, RT_SCAN_TYPE ScanType); -+u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid); -+void update_network(WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src, _adapter *padapter, bool update_ie); -+ -+u8 *get_my_bssid(WLAN_BSSID_EX *pnetwork); -+u16 get_beacon_interval(WLAN_BSSID_EX *bss); -+ -+int is_client_associated_to_ap(_adapter *padapter); -+int is_client_associated_to_ibss(_adapter *padapter); -+int is_IBSS_empty(_adapter *padapter); -+ -+unsigned char check_assoc_AP(u8 *pframe, uint len); -+void get_assoc_AP_Vendor(char *vendor, u8 assoc_AP_vendor); -+#ifdef CONFIG_RTS_FULL_BW -+void rtw_parse_sta_vendor_ie_8812(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len); -+#endif/*CONFIG_RTS_FULL_BW*/ -+#ifdef CONFIG_80211AC_VHT -+void get_vht_bf_cap(u8 *pframe, uint len, struct vht_bf_cap *bf_cap); -+#endif -+ -+int WMM_param_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+#ifdef CONFIG_WFD -+void rtw_process_wfd_ie(_adapter *adapter, u8 *ie, u8 ie_len, const char *tag); -+void rtw_process_wfd_ies(_adapter *adapter, u8 *ies, u8 ies_len, const char *tag); -+#endif -+void WMMOnAssocRsp(_adapter *padapter); -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+u8 rtw_is_tbtx_capabilty(u8 *p, u8 len); -+#endif -+ -+void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+#ifdef ROKU_PRIVATE -+void HT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+#endif -+void HT_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+void HTOnAssocRsp(_adapter *padapter); -+ -+#ifdef ROKU_PRIVATE -+void Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+void Extended_Supported_rate_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+#endif -+ -+void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+void VCS_update(_adapter *padapter, struct sta_info *psta); -+void update_ldpc_stbc_cap(struct sta_info *psta); -+ -+#ifdef CONFIG_CHECK_SPECIFIC_IE_CONTENT -+bool rtw_validate_value(u16 EID, u8 *p, u16 len); -+#endif /* CONFIG_CHECK_SPECIFIC_IE_CONTENT */ -+ -+bool is_hidden_ssid(char *ssid, int len); -+bool hidden_ssid_ap(WLAN_BSSID_EX *snetwork); -+void rtw_absorb_ssid_ifneed(_adapter *padapter, WLAN_BSSID_EX *bssid, u8 *pframe); -+ -+int rtw_get_bcn_keys(_adapter *adapter, u8 *whdr, u32 flen, struct beacon_keys *bcn_keys); -+int rtw_get_bcn_keys_from_bss(WLAN_BSSID_EX *bss, struct beacon_keys *bcn_keys); -+int rtw_update_bcn_keys_of_network(struct wlan_network *network); -+ -+int validate_beacon_len(u8 *pframe, uint len); -+void rtw_dump_bcn_keys(void *sel, struct beacon_keys *recv_beacon); -+void rtw_bcn_key_err_fix(struct beacon_keys *cur, struct beacon_keys *recv); -+bool rtw_bcn_key_compare(struct beacon_keys *cur, struct beacon_keys *recv); -+int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len); -+void update_beacon_info(_adapter *padapter, u8 *pframe, uint len, struct sta_info *psta); -+#if CONFIG_DFS -+void process_csa_ie(_adapter *padapter, u8 *ies, uint ies_len); -+#endif -+void update_capinfo(PADAPTER Adapter, u16 updateCap); -+void update_wireless_mode(_adapter *padapter); -+void update_tx_basic_rate(_adapter *padapter, u8 modulation); -+void update_sta_basic_rate(struct sta_info *psta, u8 wireless_mode); -+int rtw_ies_get_supported_rate(u8 *ies, uint ies_len, u8 *rate_set, u8 *rate_num); -+ -+/* for sta/adhoc mode */ -+void update_sta_info(_adapter *padapter, struct sta_info *psta); -+unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz); -+unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz); -+void Update_RA_Entry(_adapter *padapter, struct sta_info *psta); -+void set_sta_rate(_adapter *padapter, struct sta_info *psta); -+ -+unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason, u8 locally_generated); -+ -+unsigned char get_highest_rate_idx(u64 mask); -+unsigned char get_lowest_rate_idx_ex(u64 mask, int start_bit); -+#define get_lowest_rate_idx(mask) get_lowest_rate_idx_ex(mask, 0) -+ -+int support_short_GI(_adapter *padapter, struct HT_caps_element *pHT_caps, u8 bwmode); -+unsigned int is_ap_in_tkip(_adapter *padapter); -+unsigned int is_ap_in_wep(_adapter *padapter); -+unsigned int should_forbid_n_rate(_adapter *padapter); -+ -+enum eap_type parsing_eapol_packet(_adapter *padapter, u8 *key_payload, struct sta_info *psta, u8 trx_type); -+ -+bool _rtw_camctl_chk_cap(_adapter *adapter, u8 cap); -+void _rtw_camctl_set_flags(_adapter *adapter, u32 flags); -+void rtw_camctl_set_flags(_adapter *adapter, u32 flags); -+void _rtw_camctl_clr_flags(_adapter *adapter, u32 flags); -+void rtw_camctl_clr_flags(_adapter *adapter, u32 flags); -+bool _rtw_camctl_chk_flags(_adapter *adapter, u32 flags); -+ -+struct sec_cam_bmp; -+void dump_sec_cam_map(void *sel, struct sec_cam_bmp *map, u8 max_num); -+void rtw_sec_cam_map_set(struct sec_cam_bmp *map, u8 id); -+void rtw_sec_cam_map_clr_all(struct sec_cam_bmp *map); -+ -+bool _rtw_camid_is_gk(_adapter *adapter, u8 cam_id); -+bool rtw_camid_is_gk(_adapter *adapter, u8 cam_id); -+s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid, s8 gk); -+s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid, u8 gk, bool ext_sec, bool *used); -+void rtw_camid_free(_adapter *adapter, u8 cam_id); -+u8 rtw_get_sec_camid(_adapter *adapter, u8 max_bk_key_num, u8 *sec_key_id); -+ -+struct macid_bmp; -+struct macid_ctl_t; -+bool _rtw_macid_ctl_chk_cap(_adapter *adapter, u8 cap); -+void dump_macid_map(void *sel, struct macid_bmp *map, u8 max_num); -+bool rtw_macid_is_set(struct macid_bmp *map, u8 id); -+void rtw_macid_map_clr(struct macid_bmp *map, u8 id); -+bool rtw_macid_is_used(struct macid_ctl_t *macid_ctl, u8 id); -+bool rtw_macid_is_bmc(struct macid_ctl_t *macid_ctl, u8 id); -+u8 rtw_macid_get_iface_bmp(struct macid_ctl_t *macid_ctl, u8 id); -+bool rtw_macid_is_iface_shared(struct macid_ctl_t *macid_ctl, u8 id); -+bool rtw_macid_is_iface_specific(struct macid_ctl_t *macid_ctl, u8 id, _adapter *adapter); -+s8 rtw_macid_get_ch_g(struct macid_ctl_t *macid_ctl, u8 id); -+void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta); -+void rtw_release_macid(_adapter *padapter, struct sta_info *psta); -+u8 rtw_search_max_mac_id(_adapter *padapter); -+u8 rtw_macid_ctl_set_h2c_msr(struct macid_ctl_t *macid_ctl, u8 id, u8 h2c_msr); -+void rtw_macid_ctl_set_bw(struct macid_ctl_t *macid_ctl, u8 id, u8 bw); -+void rtw_macid_ctl_set_vht_en(struct macid_ctl_t *macid_ctl, u8 id, u8 en); -+void rtw_macid_ctl_set_rate_bmp0(struct macid_ctl_t *macid_ctl, u8 id, u32 bmp); -+void rtw_macid_ctl_set_rate_bmp1(struct macid_ctl_t *macid_ctl, u8 id, u32 bmp); -+#ifdef CONFIG_PROTSEL_MACSLEEP -+void rtw_macid_ctl_init_sleep_reg(struct macid_ctl_t *macid_ctl, u16 reg_ctrl, u16 reg_info); -+void rtw_macid_ctl_init_drop_reg(struct macid_ctl_t *macid_ctl, u16 reg_ctrl, u16 reg_info); -+#else -+void rtw_macid_ctl_init_sleep_reg(struct macid_ctl_t *macid_ctl, u16 m0, u16 m1, u16 m2, u16 m3); -+void rtw_macid_ctl_init_drop_reg(struct macid_ctl_t *macid_ctl, u16 m0, u16 m1, u16 m2, u16 m3); -+#endif -+void rtw_macid_ctl_init(struct macid_ctl_t *macid_ctl); -+void rtw_macid_ctl_deinit(struct macid_ctl_t *macid_ctl); -+u8 rtw_iface_bcmc_id_get(_adapter *padapter); -+void rtw_iface_bcmc_id_set(_adapter *padapter, u8 mac_id); -+#if defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE) -+void rtw_iface_bcmc_sec_cam_map_restore(_adapter *adapter); -+#endif -+bool rtw_bmp_is_set(const u8 *bmp, u8 bmp_len, u8 id); -+void rtw_bmp_set(u8 *bmp, u8 bmp_len, u8 id); -+void rtw_bmp_clear(u8 *bmp, u8 bmp_len, u8 id); -+bool rtw_bmp_not_empty(const u8 *bmp, u8 bmp_len); -+bool rtw_bmp_not_empty_exclude_bit0(const u8 *bmp, u8 bmp_len); -+ -+#ifdef CONFIG_AP_MODE -+bool rtw_tim_map_is_set(_adapter *padapter, const u8 *map, u8 id); -+void rtw_tim_map_set(_adapter *padapter, u8 *map, u8 id); -+void rtw_tim_map_clear(_adapter *padapter, u8 *map, u8 id); -+bool rtw_tim_map_anyone_be_set(_adapter *padapter, const u8 *map); -+bool rtw_tim_map_anyone_be_set_exclude_aid0(_adapter *padapter, const u8 *map); -+#endif /* CONFIG_AP_MODE */ -+ -+u32 report_join_res(_adapter *padapter, int aid_res, u16 status); -+void report_survey_event(_adapter *padapter, union recv_frame *precv_frame); -+void report_surveydone_event(_adapter *padapter, bool acs); -+u32 report_del_sta_event(_adapter *padapter, unsigned char *MacAddr, unsigned short reason, bool enqueue, u8 locally_generated); -+void report_add_sta_event(_adapter *padapter, unsigned char *MacAddr); -+bool rtw_port_switch_chk(_adapter *adapter); -+void report_wmm_edca_update(_adapter *padapter); -+ -+void beacon_timing_control(_adapter *padapter); -+u8 chk_bmc_sleepq_cmd(_adapter *padapter); -+extern u8 set_tx_beacon_cmd(_adapter *padapter, u8 flags); -+unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame); -+void update_mgnt_tx_rate(_adapter *padapter, u8 rate); -+void update_monitor_frame_attrib(_adapter *padapter, struct pkt_attrib *pattrib); -+#ifdef CONFIG_RTW_MGMT_QUEUE -+void update_mgntframe_subtype(_adapter *padapter, struct xmit_frame *pmgntframe); -+#endif -+void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib); -+void update_mgntframe_attrib_addr(_adapter *padapter, struct xmit_frame *pmgntframe); -+void dump_mgntframe(_adapter *padapter, struct xmit_frame *pmgntframe); -+s32 dump_mgntframe_and_wait(_adapter *padapter, struct xmit_frame *pmgntframe, int timeout_ms); -+s32 dump_mgntframe_and_wait_ack(_adapter *padapter, struct xmit_frame *pmgntframe); -+s32 dump_mgntframe_and_wait_ack_timeout(_adapter *padapter, struct xmit_frame *pmgntframe, int timeout_ms); -+ -+#ifdef CONFIG_P2P -+int get_reg_classes_full_count(struct p2p_channels *channel_list); -+void issue_probersp_p2p(_adapter *padapter, unsigned char *da); -+void issue_p2p_provision_request(_adapter *padapter, u8 *pssid, u8 ussidlen, u8 *pdev_raddr); -+void issue_p2p_GO_request(_adapter *padapter, u8 *raddr); -+void issue_probereq_p2p(_adapter *padapter, u8 *da); -+int issue_probereq_p2p_ex(_adapter *adapter, u8 *da, int try_cnt, int wait_ms); -+void issue_p2p_invitation_response(_adapter *padapter, u8 *raddr, u8 dialogToken, u8 success); -+void issue_p2p_invitation_request(_adapter *padapter, u8 *raddr); -+#endif /* CONFIG_P2P */ -+void issue_beacon(_adapter *padapter, int timeout_ms); -+void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probereq); -+void _issue_assocreq(_adapter *padapter, u8 is_assoc); -+void issue_assocreq(_adapter *padapter); -+void issue_reassocreq(_adapter *padapter); -+void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *pstat, int pkt_type); -+void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status); -+void issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 *da); -+s32 issue_probereq_ex(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 *da, u8 ch, bool append_wps, int try_cnt, int wait_ms); -+int issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms); -+int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, u8 ps, int try_cnt, int wait_ms); -+int issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason); -+int issue_deauth_ex(_adapter *padapter, u8 *da, unsigned short reason, int try_cnt, int wait_ms); -+void issue_action_spct_ch_switch(_adapter *padapter, u8 *ra, u8 new_ch, u8 ch_offset); -+void issue_addba_req(_adapter *adapter, unsigned char *ra, u8 tid); -+void issue_addba_rsp(_adapter *adapter, unsigned char *ra, u8 tid, u16 status, u8 size); -+u8 issue_addba_rsp_wait_ack(_adapter *adapter, unsigned char *ra, u8 tid, u16 status, u8 size, int try_cnt, int wait_ms); -+void issue_del_ba(_adapter *adapter, unsigned char *ra, u8 tid, u16 reason, u8 initiator); -+int issue_del_ba_ex(_adapter *adapter, unsigned char *ra, u8 tid, u16 reason, u8 initiator, int try_cnt, int wait_ms); -+void issue_action_BSSCoexistPacket(_adapter *padapter); -+ -+#ifdef CONFIG_IEEE80211W -+void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short tid, u8 key_type); -+int issue_deauth_11w(_adapter *padapter, unsigned char *da, unsigned short reason, u8 key_type); -+#endif /* CONFIG_IEEE80211W */ -+int issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoPsMode); -+int issue_action_SM_PS_wait_ack(_adapter *padapter, unsigned char *raddr, u8 NewMimoPsMode, int try_cnt, int wait_ms); -+ -+unsigned int send_delba_sta_tid(_adapter *adapter, u8 initiator, struct sta_info *sta, u8 tid, u8 force); -+unsigned int send_delba_sta_tid_wait_ack(_adapter *adapter, u8 initiator, struct sta_info *sta, u8 tid, u8 force); -+ -+unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr); -+#ifdef CONFIG_AP_MODE -+unsigned int send_beacon(_adapter *padapter); -+#endif -+void start_clnt_assoc(_adapter *padapter); -+void start_clnt_auth(_adapter *padapter); -+void start_clnt_join(_adapter *padapter); -+void start_create_ibss(_adapter *padapter); -+ -+unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int DoReserved(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAtim(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAction(_adapter *padapter, union recv_frame *precv_frame); -+ -+unsigned int on_action_spct(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAction_qos(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAction_dls(_adapter *padapter, union recv_frame *precv_frame); -+#ifdef CONFIG_RTW_WNM -+unsigned int on_action_wnm(_adapter *adapter, union recv_frame *rframe); -+#endif -+ -+#define RX_AMPDU_ACCEPT_INVALID 0xFF -+#define RX_AMPDU_SIZE_INVALID 0xFF -+ -+enum rx_ampdu_reason { -+ RX_AMPDU_DRV_FIXED = 1, -+ RX_AMPDU_BTCOEX = 2, /* not used, because BTCOEX has its own variable management */ -+ RX_AMPDU_DRV_SCAN = 3, -+}; -+u8 rtw_rx_ampdu_size(_adapter *adapter); -+bool rtw_rx_ampdu_is_accept(_adapter *adapter); -+bool rtw_rx_ampdu_set_size(_adapter *adapter, u8 size, u8 reason); -+bool rtw_rx_ampdu_set_accept(_adapter *adapter, u8 accept, u8 reason); -+u8 rx_ampdu_apply_sta_tid(_adapter *adapter, struct sta_info *sta, u8 tid, u8 accept, u8 size); -+u8 rx_ampdu_size_sta_limit(_adapter *adapter, struct sta_info *sta); -+u8 rx_ampdu_apply_sta(_adapter *adapter, struct sta_info *sta, u8 accept, u8 size); -+u16 rtw_rx_ampdu_apply(_adapter *adapter); -+ -+unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int on_action_public(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAction_ft(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame); -+#ifdef CONFIG_IEEE80211W -+unsigned int OnAction_sa_query(_adapter *padapter, union recv_frame *precv_frame); -+#endif /* CONFIG_IEEE80211W */ -+unsigned int on_action_rm(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAction_wmm(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAction_vht(_adapter *padapter, union recv_frame *precv_frame); -+unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame); -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+unsigned int OnAction_tbtx_token(_adapter *padapter, union recv_frame *precv_frame); -+#endif -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+void rtw_issue_action_token_req(_adapter *padapter, struct sta_info *pstat); -+void rtw_issue_action_token_rel(_adapter *padapter); -+#endif -+ -+void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res); -+void mlmeext_sta_del_event_callback(_adapter *padapter); -+void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta); -+ -+int rtw_get_rx_chk_limit(_adapter *adapter); -+void rtw_set_rx_chk_limit(_adapter *adapter, int limit); -+void linked_status_chk(_adapter *padapter, u8 from_timer); -+ -+#define rtw_get_bcn_cnt(adapter) (adapter->mlmeextpriv.cur_bcn_cnt) -+#define rtw_get_bcn_dtim_period(adapter) (adapter->mlmeextpriv.dtim) -+void rtw_collect_bcn_info(_adapter *adapter); -+ -+void _linked_info_dump(_adapter *padapter); -+ -+void survey_timer_hdl(void *ctx); -+#ifdef CONFIG_RTW_REPEATER_SON -+void rson_timer_hdl(void *ctx); -+#endif -+void link_timer_hdl(void *ctx); -+void addba_timer_hdl(void *ctx); -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+void rtw_tbtx_xmit_timer_hdl(void *ctx); -+void rtw_tbtx_token_dispatch_timer_hdl(void *ctx); -+#endif -+#ifdef CONFIG_IEEE80211W -+void sa_query_timer_hdl(void *ctx); -+#endif /* CONFIG_IEEE80211W */ -+#if 0 -+void reauth_timer_hdl(_adapter *padapter); -+void reassoc_timer_hdl(_adapter *padapter); -+#endif -+ -+#define set_survey_timer(mlmeext, ms) \ -+ do { \ -+ /*RTW_INFO("%s set_survey_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \ -+ _set_timer(&(mlmeext)->survey_timer, (ms)); \ -+ } while (0) -+ -+#define set_link_timer(mlmeext, ms) \ -+ do { \ -+ /*RTW_INFO("%s set_link_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \ -+ _set_timer(&(mlmeext)->link_timer, (ms)); \ -+ } while (0) -+ -+bool rtw_is_cck_rate(u8 rate); -+bool rtw_is_ofdm_rate(u8 rate); -+bool rtw_is_basic_rate_cck(u8 rate); -+bool rtw_is_basic_rate_ofdm(u8 rate); -+bool rtw_is_basic_rate_mix(u8 rate); -+ -+extern int cckrates_included(unsigned char *rate, int ratelen); -+extern int cckratesonly_included(unsigned char *rate, int ratelen); -+ -+extern void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr); -+ -+extern void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len); -+extern void correct_TSF(_adapter *padapter, u8 mlme_state); -+#ifdef CONFIG_BCN_RECV_TIME -+void rtw_rx_bcn_time_update(_adapter *adapter, uint bcn_len, u8 data_rate); -+#endif -+extern u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer); -+ -+void rtw_process_bar_frame(_adapter *padapter, union recv_frame *precv_frame); -+void rtw_join_done_chk_ch(_adapter *padapter, int join_res); -+ -+int rtw_chk_start_clnt_join(_adapter *padapter, u8 *ch, u8 *bw, u8 *offset); -+ -+#ifdef RTW_BUSY_DENY_SCAN -+#ifndef BUSY_TRAFFIC_SCAN_DENY_PERIOD -+#ifdef CONFIG_RTW_ANDROID -+#ifdef CONFIG_PLATFORM_ARM_SUN8I -+ #define BUSY_TRAFFIC_SCAN_DENY_PERIOD 8000 -+#else -+ #define BUSY_TRAFFIC_SCAN_DENY_PERIOD 12000 -+#endif -+#else /* !CONFIG_ANDROID */ -+#define BUSY_TRAFFIC_SCAN_DENY_PERIOD 16000 -+#endif /* !CONFIG_ANDROID */ -+#endif /* !BUSY_TRAFFIC_SCAN_DENY_PERIOD */ -+#endif /* RTW_BUSY_DENY_SCAN */ -+ -+void rtw_leave_opch(_adapter *adapter); -+void rtw_back_opch(_adapter *adapter); -+ -+u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf); -+u8 disconnect_hdl(_adapter *padapter, u8 *pbuf); -+u8 createbss_hdl(_adapter *padapter, u8 *pbuf); -+#ifdef CONFIG_AP_MODE -+u8 stop_ap_hdl(_adapter *adapter); -+#endif -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+u8 tx_control_hdl(_adapter *adapter); -+#endif -+u8 setopmode_hdl(_adapter *padapter, u8 *pbuf); -+u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf); -+u8 setauth_hdl(_adapter *padapter, u8 *pbuf); -+u8 setkey_hdl(_adapter *padapter, u8 *pbuf); -+u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf); -+u8 set_assocsta_hdl(_adapter *padapter, u8 *pbuf); -+u8 del_assocsta_hdl(_adapter *padapter, u8 *pbuf); -+u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf); -+u8 add_ba_rsp_hdl(_adapter *padapter, unsigned char *pbuf); -+ -+void rtw_ap_wep_pk_setting(_adapter *adapter, struct sta_info *psta); -+ -+u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf); -+u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf); -+u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf); -+u8 rtw_set_chbw_hdl(_adapter *padapter, u8 *pbuf); -+u8 rtw_iqk_hdl(_adapter *padapter, unsigned char *pbuf); -+u8 rtw_set_chplan_hdl(_adapter *padapter, unsigned char *pbuf); -+u8 rtw_get_chplan_hdl(_adapter *padapter, unsigned char *pbuf); -+u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf); -+u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf); /* Kurt: Handling DFS channel switch announcement ie. */ -+u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf); -+u8 run_in_thread_hdl(_adapter *padapter, u8 *pbuf); -+ -+int rtw_sae_preprocess(_adapter *adapter, const u8 *buf, u32 len, u8 tx); -+ -+u32 rtw_desc_rate_to_bitrate(u8 bw, u8 rate_idx, u8 sgi); -+ -+#ifdef CONFIG_RTW_MULTI_AP -+u8 rtw_get_ch_utilization(_adapter *adapter); -+void rtw_ch_util_rpt(_adapter *adapter); -+#endif -+ -+#define GEN_MLME_EXT_HANDLER(cmd, callback_func) {.cmd_hdl = cmd, .callback = callback_func}, -+ -+struct rtw_cmd { -+ u8(*cmd_hdl)(_adapter *padapter, u8 *pbuf); -+ void (*callback)(_adapter *padapter, struct cmd_obj *cmd); -+}; -+ -+#ifdef _RTW_CMD_C_ -+#ifdef CONFIG_RTW_MESH -+extern u8 rtw_mesh_set_plink_state_cmd_hdl(_adapter *adapter, u8 *parmbuf); -+#else -+u8 rtw_mesh_set_plink_state_cmd_hdl(_adapter *adapter, u8 *parmbuf) { return H2C_CMD_FAIL; }; -+#endif -+ -+struct rtw_cmd wlancmds[] = { -+ GEN_MLME_EXT_HANDLER(join_cmd_hdl, rtw_joinbss_cmd_callback) /*CMD_JOINBSS*/ -+ GEN_MLME_EXT_HANDLER(disconnect_hdl, rtw_disassoc_cmd_callback) /*CMD_DISCONNECT*/ -+ GEN_MLME_EXT_HANDLER(createbss_hdl, NULL) /*CMD_CREATE_BSS*/ -+ GEN_MLME_EXT_HANDLER(setopmode_hdl, NULL) /*CMD_SET_OPMODE*/ -+ GEN_MLME_EXT_HANDLER(sitesurvey_cmd_hdl, rtw_survey_cmd_callback) /*CMD_SITE_SURVEY*/ -+ GEN_MLME_EXT_HANDLER(setauth_hdl, NULL) /*CMD_SET_AUTH*/ -+ GEN_MLME_EXT_HANDLER(setkey_hdl, NULL) /*CMD_SET_KEY*/ -+ GEN_MLME_EXT_HANDLER(set_stakey_hdl, rtw_setstaKey_cmdrsp_callback) /*CMD_SET_STAKEY*/ -+ GEN_MLME_EXT_HANDLER(add_ba_hdl, NULL) /*CMD_ADD_BAREQ*/ -+ GEN_MLME_EXT_HANDLER(rtw_set_chbw_hdl, NULL) /*CMD_SET_CHANNEL*/ -+ GEN_MLME_EXT_HANDLER(tx_beacon_hdl, NULL) /*CMD_TX_BEACON*/ -+ GEN_MLME_EXT_HANDLER(mlme_evt_hdl, NULL) /*CMD_SET_MLME_EVT*/ -+ GEN_MLME_EXT_HANDLER(rtw_drvextra_cmd_hdl, NULL) /*CMD_SET_DRV_EXTRA*/ -+ GEN_MLME_EXT_HANDLER(rtw_set_chplan_hdl, NULL) /*CMD_SET_CHANPLAN*/ -+ GEN_MLME_EXT_HANDLER(led_blink_hdl, NULL) /*CMD_LEDBLINK*/ -+ GEN_MLME_EXT_HANDLER(set_csa_hdl, NULL) /*CMD_SET_CHANSWITCH*/ -+ GEN_MLME_EXT_HANDLER(tdls_hdl, NULL) /*CMD_TDLS*/ -+ GEN_MLME_EXT_HANDLER(chk_bmc_sleepq_hdl, NULL) /*CMD_CHK_BMCSLEEPQ*/ -+ GEN_MLME_EXT_HANDLER(run_in_thread_hdl, NULL) /*CMD_RUN_INTHREAD*/ -+ GEN_MLME_EXT_HANDLER(add_ba_rsp_hdl, NULL) /*CMD_ADD_BARSP*/ -+ GEN_MLME_EXT_HANDLER(rm_post_event_hdl, NULL) /*CMD_RM_POST_EVENT*/ -+ GEN_MLME_EXT_HANDLER(rtw_mesh_set_plink_state_cmd_hdl, NULL) /*CMD_SET_MESH_PLINK_STATE*/ -+ GEN_MLME_EXT_HANDLER(rtw_iqk_hdl, NULL) /*CMD_DO_IQK*/ -+ GEN_MLME_EXT_HANDLER(rtw_get_chplan_hdl, NULL) /* CMD_GET_CHANPLAN */ -+}; -+#endif -+ -+struct rtw_evt_header { -+ u8 id; -+ u8 seq; -+ u16 len; -+}; -+ -+enum rtw_event_id { -+ EVT_SURVEY, /*0*/ -+ EVT_SURVEY_DONE, /*1*/ -+ EVT_JOINBSS, /*2*/ -+ EVT_ADD_STA, /*3*/ -+ EVT_DEL_STA, /*4*/ -+ EVT_WMM_UPDATE, /*5*/ -+#ifdef CONFIG_IEEE80211W -+ EVT_TIMEOUT_STA, /*6*/ -+#endif /* CONFIG_IEEE80211W */ -+#ifdef CONFIG_RTW_80211R -+ EVT_FT_REASSOC, /*7*/ -+#endif -+ EVT_ID_MAX -+}; -+#ifdef _RTW_MLME_EXT_C_ -+static struct rtw_event wlanevents[] = { -+ {sizeof(struct survey_event), &rtw_survey_event_callback}, /*EVT_SURVEY*/ -+ {sizeof(struct surveydone_event), &rtw_surveydone_event_callback}, /*EVT_SURVEY_DONE*/ -+ {sizeof(struct joinbss_event), &rtw_joinbss_event_callback}, /*EVT_JOINBSS*/ -+ {sizeof(struct stassoc_event), &rtw_stassoc_event_callback}, /*EVT_ADD_STA*/ -+ {sizeof(struct stadel_event), &rtw_stadel_event_callback}, /*EVT_DEL_STA*/ -+ {sizeof(struct wmm_event), &rtw_wmm_event_callback}, /*EVT_WMM_UPDATE*/ -+ #ifdef CONFIG_IEEE80211W -+ {sizeof(struct stadel_event), &rtw_sta_timeout_event_callback}, /*EVT_TIMEOUT_STA*/ -+ #endif /* CONFIG_IEEE80211W */ -+ #ifdef CONFIG_RTW_80211R -+ {sizeof(struct stassoc_event), &rtw_ft_reassoc_event_callback}, /*EVT_FT_REASSOC*/ -+ #endif -+}; -+#endif/* _RTW_MLME_EXT_C_ */ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_mp.h b/drivers/staging/rtl8723cs/include/rtw_mp.h -new file mode 100644 -index 000000000000..c2a6ca4c16e7 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_mp.h -@@ -0,0 +1,943 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_MP_H_ -+#define _RTW_MP_H_ -+ -+#define RTWPRIV_VER_INFO 1 -+ -+#define MAX_MP_XMITBUF_SZ 2048 -+#define NR_MP_XMITFRAME 8 -+#define MP_READ_REG_MAX_OFFSET 0x4FFF -+ -+struct mp_xmit_frame { -+ _list list; -+ -+ struct pkt_attrib attrib; -+ -+ _pkt *pkt; -+ -+ int frame_tag; -+ -+ _adapter *padapter; -+ -+#ifdef CONFIG_USB_HCI -+ -+ /* insert urb, irp, and irpcnt info below... */ -+ /* max frag_cnt = 8 */ -+ u8 *mem_addr; -+ u32 sz[8]; -+ u8 bpending[8]; -+ sint ac_tag[8]; -+ sint last[8]; -+ uint irpcnt; -+ uint fragcnt; -+#endif /* CONFIG_USB_HCI */ -+ -+ uint mem[(MAX_MP_XMITBUF_SZ >> 2)]; -+}; -+ -+struct mp_wiparam { -+ u32 bcompleted; -+ u32 act_type; -+ u32 io_offset; -+ u32 io_value; -+}; -+ -+typedef void(*wi_act_func)(void *padapter); -+ -+struct mp_tx { -+ u8 stop; -+ u32 count, sended; -+ u8 payload; -+ struct pkt_attrib attrib; -+ /* struct tx_desc desc; */ -+ /* u8 resvdtx[7]; */ -+ u8 desc[TXDESC_SIZE]; -+ u8 *pallocated_buf; -+ u8 *buf; -+ u32 buf_size, write_size; -+ _thread_hdl_ PktTxThread; -+}; -+ -+#define MP_MAX_LINES 1000 -+#define MP_MAX_LINES_BYTES 256 -+ -+ -+typedef struct _RT_PMAC_PKT_INFO { -+ u8 MCS; -+ u8 Nss; -+ u8 Nsts; -+ u32 N_sym; -+ u8 SIGA2B3; -+} RT_PMAC_PKT_INFO, *PRT_PMAC_PKT_INFO; -+ -+typedef struct _RT_PMAC_TX_INFO { -+ u8 bEnPMacTx:1; /* 0: Disable PMac 1: Enable PMac */ -+ u8 Mode:3; /* 0: Packet TX 3:Continuous TX */ -+ u8 Ntx:4; /* 0-7 */ -+ u8 TX_RATE; /* MPT_RATE_E */ -+ u8 TX_RATE_HEX; -+ u8 TX_SC; -+ u8 bSGI:1; -+ u8 bSPreamble:1; -+ u8 bSTBC:1; -+ u8 bLDPC:1; -+ u8 NDP_sound:1; -+ u8 BandWidth:3; /* 0: 20 1:40 2:80Mhz */ -+ u8 m_STBC; /* bSTBC + 1 */ -+ u16 PacketPeriod; -+ u32 PacketCount; -+ u32 PacketLength; -+ u8 PacketPattern; -+ u16 SFD; -+ u8 SignalField; -+ u8 ServiceField; -+ u16 LENGTH; -+ u8 CRC16[2]; -+ u8 LSIG[3]; -+ u8 HT_SIG[6]; -+ u8 VHT_SIG_A[6]; -+ u8 VHT_SIG_B[4]; -+ u8 VHT_SIG_B_CRC; -+ u8 VHT_Delimiter[4]; -+ u8 MacAddress[6]; -+} RT_PMAC_TX_INFO, *PRT_PMAC_TX_INFO; -+ -+ -+typedef void (*MPT_WORK_ITEM_HANDLER)(void *Adapter); -+typedef struct _MPT_CONTEXT { -+ /* Indicate if we have started Mass Production Test. */ -+ BOOLEAN bMassProdTest; -+ -+ /* Indicate if the driver is unloading or unloaded. */ -+ BOOLEAN bMptDrvUnload; -+ -+ _sema MPh2c_Sema; -+ _timer MPh2c_timeout_timer; -+ /* Event used to sync H2c for BT control */ -+ -+ BOOLEAN MptH2cRspEvent; -+ BOOLEAN MptBtC2hEvent; -+ BOOLEAN bMPh2c_timeout; -+ -+ /* 8190 PCI does not support NDIS_WORK_ITEM. */ -+ /* Work Item for Mass Production Test. */ -+ /* NDIS_WORK_ITEM MptWorkItem; -+ * RT_WORK_ITEM MptWorkItem; */ -+ /* Event used to sync the case unloading driver and MptWorkItem is still in progress. -+ * NDIS_EVENT MptWorkItemEvent; */ -+ /* To protect the following variables. -+ * NDIS_SPIN_LOCK MptWorkItemSpinLock; */ -+ /* Indicate a MptWorkItem is scheduled and not yet finished. */ -+ BOOLEAN bMptWorkItemInProgress; -+ /* An instance which implements function and context of MptWorkItem. */ -+ MPT_WORK_ITEM_HANDLER CurrMptAct; -+ -+ /* 1=Start, 0=Stop from UI. */ -+ u32 MptTestStart; -+ /* _TEST_MODE, defined in MPT_Req2.h */ -+ u32 MptTestItem; -+ /* Variable needed in each implementation of CurrMptAct. */ -+ u32 MptActType; /* Type of action performed in CurrMptAct. */ -+ /* The Offset of IO operation is depend of MptActType. */ -+ u32 MptIoOffset; -+ /* The Value of IO operation is depend of MptActType. */ -+ u32 MptIoValue; -+ /* The RfPath of IO operation is depend of MptActType. */ -+ -+ u32 mpt_rf_path; -+ -+ -+ WIRELESS_MODE MptWirelessModeToSw; /* Wireless mode to switch. */ -+ u8 MptChannelToSw; /* Channel to switch. */ -+ u8 MptInitGainToSet; /* Initial gain to set. */ -+ /* u32 bMptAntennaA; */ /* TRUE if we want to use antenna A. */ -+ u32 MptBandWidth; /* bandwidth to switch. */ -+ -+ u32 mpt_rate_index;/* rate index. */ -+ -+ /* Register value kept for Single Carrier Tx test. */ -+ u8 btMpCckTxPower; -+ /* Register value kept for Single Carrier Tx test. */ -+ u8 btMpOfdmTxPower; -+ /* For MP Tx Power index */ -+ u8 TxPwrLevel[4]; /* rf-A, rf-B*/ -+ u32 RegTxPwrLimit; -+ /* Content of RCR Regsiter for Mass Production Test. */ -+ u32 MptRCR; -+ /* TRUE if we only receive packets with specific pattern. */ -+ BOOLEAN bMptFilterPattern; -+ /* Rx OK count, statistics used in Mass Production Test. */ -+ u32 MptRxOkCnt; -+ /* Rx CRC32 error count, statistics used in Mass Production Test. */ -+ u32 MptRxCrcErrCnt; -+ -+ BOOLEAN bCckContTx; /* TRUE if we are in CCK Continuous Tx test. */ -+ BOOLEAN bOfdmContTx; /* TRUE if we are in OFDM Continuous Tx test. */ -+ /* TRUE if we have start Continuous Tx test. */ -+ BOOLEAN is_start_cont_tx; -+ -+ /* TRUE if we are in Single Carrier Tx test. */ -+ BOOLEAN bSingleCarrier; -+ /* TRUE if we are in Carrier Suppression Tx Test. */ -+ -+ BOOLEAN is_carrier_suppression; -+ -+ /* TRUE if we are in Single Tone Tx test. */ -+ -+ BOOLEAN is_single_tone; -+ -+ -+ /* ACK counter asked by K.Y.. */ -+ BOOLEAN bMptEnableAckCounter; -+ u32 MptAckCounter; -+ -+ /* SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! */ -+ /* s8 BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */ -+ /* s8 BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */ -+ /* s32 RfReadLine[2]; */ -+ -+ u8 APK_bound[2]; /* for APK path A/path B */ -+ BOOLEAN bMptIndexEven; -+ -+ u8 backup0xc50; -+ u8 backup0xc58; -+ u8 backup0xc30; -+ u8 backup0x52_RF_A; -+ u8 backup0x52_RF_B; -+ -+ u32 backup0x58_RF_A; -+ u32 backup0x58_RF_B; -+ -+ u8 h2cReqNum; -+ u8 c2hBuf[32]; -+ -+ u8 btInBuf[100]; -+ u32 mptOutLen; -+ u8 mptOutBuf[100]; -+ RT_PMAC_TX_INFO PMacTxInfo; -+ RT_PMAC_PKT_INFO PMacPktInfo; -+ u8 HWTxmode; -+ -+ BOOLEAN bldpc; -+ BOOLEAN bstbc; -+} MPT_CONTEXT, *PMPT_CONTEXT; -+/* #endif */ -+ -+ -+/* #define RTPRIV_IOCTL_MP ( SIOCIWFIRSTPRIV + 0x17) */ -+enum { -+ WRITE_REG = 1, -+ READ_REG, -+ WRITE_RF, -+ READ_RF, -+ MP_START, -+ MP_STOP, -+ MP_RATE, -+ MP_CHANNEL, -+ MP_CHL_OFFSET, -+ MP_BANDWIDTH, -+ MP_TXPOWER, -+ MP_ANT_TX, -+ MP_ANT_RX, -+ MP_CTX, -+ MP_QUERY, -+ MP_ARX, -+ MP_PSD, -+ MP_PWRTRK, -+ MP_THER, -+ MP_IOCTL, -+ EFUSE_GET, -+ EFUSE_SET, -+ MP_RESET_STATS, -+ MP_DUMP, -+ MP_PHYPARA, -+ MP_SetRFPathSwh, -+ MP_QueryDrvStats, -+ CTA_TEST, -+ MP_DISABLE_BT_COEXIST, -+ MP_PwrCtlDM, -+ MP_GETVER, -+ MP_MON, -+ EFUSE_BT_MASK, -+ EFUSE_MASK, -+ EFUSE_FILE, -+ EFUSE_FILE_STORE, -+ MP_TX, -+ MP_RX, -+ MP_IQK, -+ MP_LCK, -+ MP_HW_TX_MODE, -+ MP_GET_TXPOWER_INX, -+ MP_CUSTOMER_STR, -+ MP_PWRLMT, -+ MP_PWRBYRATE, -+ BT_EFUSE_FILE, -+ MP_SetBT, -+ MP_SWRFPath, -+ MP_LINK, -+ MP_DPK_TRK, -+ MP_DPK, -+ MP_GET_TSSIDE, -+ MP_SET_TSSIDE, -+ MP_NULL, -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ VENDOR_IE_SET , -+ VENDOR_IE_GET , -+#endif -+#ifdef CONFIG_WOWLAN -+ MP_WOW_ENABLE, -+ MP_WOW_SET_PATTERN, -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ MP_WOW_SET_KEEP_ALIVE_PATTERN, -+#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ -+#endif -+#ifdef CONFIG_AP_WOWLAN -+ MP_AP_WOW_ENABLE, -+#endif -+ MP_SD_IREAD, -+ MP_SD_IWRITE, -+}; -+ -+struct mp_priv { -+ _adapter *papdater; -+ -+ /* Testing Flag */ -+ u32 mode;/* 0 for normal type packet, 1 for loopback packet (16bytes TXCMD) */ -+ -+ u32 prev_fw_state; -+ -+ /* OID cmd handler */ -+ struct mp_wiparam workparam; -+ /* u8 act_in_progress; */ -+ -+ /* Tx Section */ -+ u8 TID; -+ u32 tx_pktcount; -+ u32 pktInterval; -+ u32 pktLength; -+ struct mp_tx tx; -+ -+ /* Rx Section */ -+ u32 rx_bssidpktcount; -+ u32 rx_pktcount; -+ u32 rx_pktcount_filter_out; -+ u32 rx_crcerrpktcount; -+ u32 rx_pktloss; -+ BOOLEAN rx_bindicatePkt; -+ struct recv_stat rxstat; -+ BOOLEAN brx_filter_beacon; -+ -+ /* RF/BB relative */ -+ u8 channel; -+ u8 bandwidth; -+ u8 prime_channel_offset; -+ u8 txpoweridx; -+ u8 rateidx; -+ u32 preamble; -+ /* u8 modem; */ -+ u32 CrystalCap; -+ /* u32 curr_crystalcap; */ -+ -+ u16 antenna_tx; -+ u16 antenna_rx; -+ /* u8 curr_rfpath; */ -+ -+ u8 check_mp_pkt; -+ -+ u8 bSetTxPower; -+ /* uint ForcedDataRate; */ -+ u8 mp_dm; -+ u8 mac_filter[ETH_ALEN]; -+ u8 bmac_filter; -+ -+ /* RF PATH Setting for WLG WLA BTG BT */ -+ u8 rf_path_cfg; -+ -+ struct wlan_network mp_network; -+ NDIS_802_11_MAC_ADDRESS network_macaddr; -+ -+ u8 *pallocated_mp_xmitframe_buf; -+ u8 *pmp_xmtframe_buf; -+ _queue free_mp_xmitqueue; -+ u32 free_mp_xmitframe_cnt; -+ BOOLEAN bSetRxBssid; -+ BOOLEAN bTxBufCkFail; -+ BOOLEAN bRTWSmbCfg; -+ BOOLEAN bloopback; -+ BOOLEAN bloadefusemap; -+ BOOLEAN bloadBTefusemap; -+ BOOLEAN bprocess_mp_mode; -+ -+ MPT_CONTEXT mpt_ctx; -+ -+ u8 *TXradomBuffer; -+ u8 CureFuseBTCoex; -+ u8 mplink_buf[2048]; -+ u32 mplink_rx_len; -+ BOOLEAN mplink_brx; -+ BOOLEAN mplink_btx; -+ -+ bool tssitrk_on; -+ bool efuse_update_file; -+ char efuse_file_path[128]; -+}; -+ -+typedef struct _IOCMD_STRUCT_ { -+ u8 cmdclass; -+ u16 value; -+ u8 index; -+} IOCMD_STRUCT; -+ -+struct rf_reg_param { -+ u32 path; -+ u32 offset; -+ u32 value; -+}; -+ -+struct bb_reg_param { -+ u32 offset; -+ u32 value; -+}; -+ -+typedef struct _MP_FIRMWARE { -+ FIRMWARE_SOURCE eFWSource; -+#ifdef CONFIG_EMBEDDED_FWIMG -+ u8 *szFwBuffer; -+#else -+ u8 szFwBuffer[0x8000]; -+#endif -+ u32 ulFwLength; -+} RT_MP_FIRMWARE, *PRT_MP_FIRMWARE; -+ -+ -+ -+ -+/* *********************************************************************** */ -+ -+#define LOWER _TRUE -+#define RAISE _FALSE -+ -+/* Hardware Registers */ -+#if 0 -+#if 0 -+#define IOCMD_CTRL_REG 0x102502C0 -+#define IOCMD_DATA_REG 0x102502C4 -+#else -+#define IOCMD_CTRL_REG 0x10250370 -+#define IOCMD_DATA_REG 0x10250374 -+#endif -+ -+#define IOCMD_GET_THERMAL_METER 0xFD000028 -+ -+#define IOCMD_CLASS_BB_RF 0xF0 -+#define IOCMD_BB_READ_IDX 0x00 -+#define IOCMD_BB_WRITE_IDX 0x01 -+#define IOCMD_RF_READ_IDX 0x02 -+#define IOCMD_RF_WRIT_IDX 0x03 -+#endif -+#define BB_REG_BASE_ADDR 0x800 -+ -+/* MP variables */ -+#if 0 -+#define _2MAC_MODE_ 0 -+#define _LOOPBOOK_MODE_ 1 -+#endif -+typedef enum _MP_MODE_ { -+ MP_OFF, -+ MP_ON, -+ MP_ERR, -+ MP_CONTINUOUS_TX, -+ MP_SINGLE_CARRIER_TX, -+ MP_CARRIER_SUPPRISSION_TX, -+ MP_SINGLE_TONE_TX, -+ MP_PACKET_TX, -+ MP_PACKET_RX -+} MP_MODE; -+ -+typedef enum _TEST_MODE { -+ TEST_NONE , -+ PACKETS_TX , -+ PACKETS_RX , -+ CONTINUOUS_TX , -+ OFDM_Single_Tone_TX , -+ CCK_Carrier_Suppression_TX -+} TEST_MODE; -+ -+ -+typedef enum _MPT_BANDWIDTH { -+ MPT_BW_20MHZ = 0, -+ MPT_BW_40MHZ_DUPLICATE = 1, -+ MPT_BW_40MHZ_ABOVE = 2, -+ MPT_BW_40MHZ_BELOW = 3, -+ MPT_BW_40MHZ = 4, -+ MPT_BW_80MHZ = 5, -+ MPT_BW_80MHZ_20_ABOVE = 6, -+ MPT_BW_80MHZ_20_BELOW = 7, -+ MPT_BW_80MHZ_20_BOTTOM = 8, -+ MPT_BW_80MHZ_20_TOP = 9, -+ MPT_BW_80MHZ_40_ABOVE = 10, -+ MPT_BW_80MHZ_40_BELOW = 11, -+} MPT_BANDWIDTHE, *PMPT_BANDWIDTH; -+ -+#define MAX_RF_PATH_NUMS RF_PATH_MAX -+ -+ -+extern u8 mpdatarate[NumRates]; -+ -+/* MP set force data rate base on the definition. */ -+typedef enum _MPT_RATE_INDEX { -+ /* CCK rate. */ -+ MPT_RATE_1M = 1 , /* 0 */ -+ MPT_RATE_2M, -+ MPT_RATE_55M, -+ MPT_RATE_11M, /* 3 */ -+ -+ /* OFDM rate. */ -+ MPT_RATE_6M, /* 4 */ -+ MPT_RATE_9M, -+ MPT_RATE_12M, -+ MPT_RATE_18M, -+ MPT_RATE_24M, -+ MPT_RATE_36M, -+ MPT_RATE_48M, -+ MPT_RATE_54M, /* 11 */ -+ -+ /* HT rate. */ -+ MPT_RATE_MCS0, /* 12 */ -+ MPT_RATE_MCS1, -+ MPT_RATE_MCS2, -+ MPT_RATE_MCS3, -+ MPT_RATE_MCS4, -+ MPT_RATE_MCS5, -+ MPT_RATE_MCS6, -+ MPT_RATE_MCS7, /* 19 */ -+ MPT_RATE_MCS8, -+ MPT_RATE_MCS9, -+ MPT_RATE_MCS10, -+ MPT_RATE_MCS11, -+ MPT_RATE_MCS12, -+ MPT_RATE_MCS13, -+ MPT_RATE_MCS14, -+ MPT_RATE_MCS15, /* 27 */ -+ MPT_RATE_MCS16, -+ MPT_RATE_MCS17, /* #29 */ -+ MPT_RATE_MCS18, -+ MPT_RATE_MCS19, -+ MPT_RATE_MCS20, -+ MPT_RATE_MCS21, -+ MPT_RATE_MCS22, /* #34 */ -+ MPT_RATE_MCS23, -+ MPT_RATE_MCS24, -+ MPT_RATE_MCS25, -+ MPT_RATE_MCS26, -+ MPT_RATE_MCS27, /* #39 */ -+ MPT_RATE_MCS28, /* #40 */ -+ MPT_RATE_MCS29, /* #41 */ -+ MPT_RATE_MCS30, /* #42 */ -+ MPT_RATE_MCS31, /* #43 */ -+ /* VHT rate. Total: 20*/ -+ MPT_RATE_VHT1SS_MCS0 = 100,/* #44*/ -+ MPT_RATE_VHT1SS_MCS1, /* # */ -+ MPT_RATE_VHT1SS_MCS2, -+ MPT_RATE_VHT1SS_MCS3, -+ MPT_RATE_VHT1SS_MCS4, -+ MPT_RATE_VHT1SS_MCS5, -+ MPT_RATE_VHT1SS_MCS6, /* # */ -+ MPT_RATE_VHT1SS_MCS7, -+ MPT_RATE_VHT1SS_MCS8, -+ MPT_RATE_VHT1SS_MCS9, /* #53 */ -+ MPT_RATE_VHT2SS_MCS0, /* #54 */ -+ MPT_RATE_VHT2SS_MCS1, -+ MPT_RATE_VHT2SS_MCS2, -+ MPT_RATE_VHT2SS_MCS3, -+ MPT_RATE_VHT2SS_MCS4, -+ MPT_RATE_VHT2SS_MCS5, -+ MPT_RATE_VHT2SS_MCS6, -+ MPT_RATE_VHT2SS_MCS7, -+ MPT_RATE_VHT2SS_MCS8, -+ MPT_RATE_VHT2SS_MCS9, /* #63 */ -+ MPT_RATE_VHT3SS_MCS0, -+ MPT_RATE_VHT3SS_MCS1, -+ MPT_RATE_VHT3SS_MCS2, -+ MPT_RATE_VHT3SS_MCS3, -+ MPT_RATE_VHT3SS_MCS4, -+ MPT_RATE_VHT3SS_MCS5, -+ MPT_RATE_VHT3SS_MCS6, /* #126 */ -+ MPT_RATE_VHT3SS_MCS7, -+ MPT_RATE_VHT3SS_MCS8, -+ MPT_RATE_VHT3SS_MCS9, -+ MPT_RATE_VHT4SS_MCS0, -+ MPT_RATE_VHT4SS_MCS1, /* #131 */ -+ MPT_RATE_VHT4SS_MCS2, -+ MPT_RATE_VHT4SS_MCS3, -+ MPT_RATE_VHT4SS_MCS4, -+ MPT_RATE_VHT4SS_MCS5, -+ MPT_RATE_VHT4SS_MCS6, /* #136 */ -+ MPT_RATE_VHT4SS_MCS7, -+ MPT_RATE_VHT4SS_MCS8, -+ MPT_RATE_VHT4SS_MCS9, -+ MPT_RATE_LAST -+} MPT_RATE_E, *PMPT_RATE_E; -+ -+#define MAX_TX_PWR_INDEX_N_MODE 64 /* 0x3F */ -+ -+#define MPT_IS_CCK_RATE(_value) (MPT_RATE_1M <= _value && _value <= MPT_RATE_11M) -+#define MPT_IS_OFDM_RATE(_value) (MPT_RATE_6M <= _value && _value <= MPT_RATE_54M) -+#define MPT_IS_HT_RATE(_value) (MPT_RATE_MCS0 <= _value && _value <= MPT_RATE_MCS31) -+#define MPT_IS_HT_1S_RATE(_value) (MPT_RATE_MCS0 <= _value && _value <= MPT_RATE_MCS7) -+#define MPT_IS_HT_2S_RATE(_value) (MPT_RATE_MCS8 <= _value && _value <= MPT_RATE_MCS15) -+#define MPT_IS_HT_3S_RATE(_value) (MPT_RATE_MCS16 <= _value && _value <= MPT_RATE_MCS23) -+#define MPT_IS_HT_4S_RATE(_value) (MPT_RATE_MCS24 <= _value && _value <= MPT_RATE_MCS31) -+ -+#define MPT_IS_VHT_RATE(_value) (MPT_RATE_VHT1SS_MCS0 <= _value && _value <= MPT_RATE_VHT4SS_MCS9) -+#define MPT_IS_VHT_1S_RATE(_value) (MPT_RATE_VHT1SS_MCS0 <= _value && _value <= MPT_RATE_VHT1SS_MCS9) -+#define MPT_IS_VHT_2S_RATE(_value) (MPT_RATE_VHT2SS_MCS0 <= _value && _value <= MPT_RATE_VHT2SS_MCS9) -+#define MPT_IS_VHT_3S_RATE(_value) (MPT_RATE_VHT3SS_MCS0 <= _value && _value <= MPT_RATE_VHT3SS_MCS9) -+#define MPT_IS_VHT_4S_RATE(_value) (MPT_RATE_VHT4SS_MCS0 <= _value && _value <= MPT_RATE_VHT4SS_MCS9) -+ -+#define MPT_IS_2SS_RATE(_rate) ((MPT_RATE_MCS8 <= _rate && _rate <= MPT_RATE_MCS15) || \ -+ (MPT_RATE_VHT2SS_MCS0 <= _rate && _rate <= MPT_RATE_VHT2SS_MCS9)) -+#define MPT_IS_3SS_RATE(_rate) ((MPT_RATE_MCS16 <= _rate && _rate <= MPT_RATE_MCS23) || \ -+ (MPT_RATE_VHT3SS_MCS0 <= _rate && _rate <= MPT_RATE_VHT3SS_MCS9)) -+#define MPT_IS_4SS_RATE(_rate) ((MPT_RATE_MCS24 <= _rate && _rate <= MPT_RATE_MCS31) || \ -+ (MPT_RATE_VHT4SS_MCS0 <= _rate && _rate <= MPT_RATE_VHT4SS_MCS9)) -+ -+typedef enum _POWER_MODE_ { -+ POWER_LOW = 0, -+ POWER_NORMAL -+} POWER_MODE; -+ -+/* The following enumeration is used to define the value of Reg0xD00[30:28] or JaguarReg0x914[18:16]. */ -+typedef enum _OFDM_TX_MODE { -+ OFDM_ALL_OFF = 0, -+ OFDM_ContinuousTx = 1, -+ OFDM_SingleCarrier = 2, -+ OFDM_SingleTone = 4, -+} OFDM_TX_MODE; -+ -+ -+#define RX_PKT_BROADCAST 1 -+#define RX_PKT_DEST_ADDR 2 -+#define RX_PKT_PHY_MATCH 3 -+ -+typedef enum _ENCRY_CTRL_STATE_ { -+ HW_CONTROL, /* hw encryption& decryption */ -+ SW_CONTROL, /* sw encryption& decryption */ -+ HW_ENCRY_SW_DECRY, /* hw encryption & sw decryption */ -+ SW_ENCRY_HW_DECRY /* sw encryption & hw decryption */ -+} ENCRY_CTRL_STATE; -+ -+typedef enum _MPT_TXPWR_DEF { -+ MPT_CCK, -+ MPT_OFDM, /* L and HT OFDM */ -+ MPT_OFDM_AND_HT, -+ MPT_HT, -+ MPT_VHT -+} MPT_TXPWR_DEF; -+ -+ -+#define IS_MPT_HT_RATE(_rate) (_rate >= MPT_RATE_MCS0 && _rate <= MPT_RATE_MCS31) -+#define IS_MPT_VHT_RATE(_rate) (_rate >= MPT_RATE_VHT1SS_MCS0 && _rate <= MPT_RATE_VHT4SS_MCS9) -+#define IS_MPT_CCK_RATE(_rate) (_rate >= MPT_RATE_1M && _rate <= MPT_RATE_11M) -+#define IS_MPT_OFDM_RATE(_rate) (_rate >= MPT_RATE_6M && _rate <= MPT_RATE_54M) -+ -+typedef enum _mp_tx_pkt_payload{ -+ MP_TX_Payload_00 = 0, -+ MP_TX_Payload_a5, -+ MP_TX_Payload_5a, -+ MP_TX_Payload_ff, -+ MP_TX_Payload_prbs9, -+ MP_TX_Payload_default_random -+} mp_tx_pkt_payload; -+ -+/*************************************************************************/ -+#if 0 -+extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv); -+extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe); -+#endif -+ -+extern s32 init_mp_priv(PADAPTER padapter); -+extern void free_mp_priv(struct mp_priv *pmp_priv); -+extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel); -+extern void MPT_DeInitAdapter(PADAPTER padapter); -+extern s32 mp_start_test(PADAPTER padapter); -+extern void mp_stop_test(PADAPTER padapter); -+ -+extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask); -+extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val); -+ -+extern u32 read_macreg(_adapter *padapter, u32 addr, u32 sz); -+extern void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz); -+extern u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask); -+extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val); -+extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr); -+extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val); -+#ifdef CONFIG_ANTENNA_DIVERSITY -+u8 rtw_mp_set_antdiv(PADAPTER padapter, BOOLEAN bMain); -+#endif -+void SetChannel(PADAPTER pAdapter); -+void SetBandwidth(PADAPTER pAdapter); -+int SetTxPower(PADAPTER pAdapter); -+void SetAntenna(PADAPTER pAdapter); -+void SetDataRate(PADAPTER pAdapter); -+void SetAntenna(PADAPTER pAdapter); -+s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther); -+void GetThermalMeter(PADAPTER pAdapter, u8 rfpath ,u8 *value); -+void SetContinuousTx(PADAPTER pAdapter, u8 bStart); -+void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart); -+void SetSingleToneTx(PADAPTER pAdapter, u8 bStart); -+void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); -+void PhySetTxPowerLevel(PADAPTER pAdapter); -+void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc); -+void SetPacketTx(PADAPTER padapter); -+void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB); -+void ResetPhyRxPktCount(PADAPTER pAdapter); -+u32 GetPhyRxPktReceived(PADAPTER pAdapter); -+u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter); -+s32 SetPowerTracking(PADAPTER padapter, u8 enable); -+void GetPowerTracking(PADAPTER padapter, u8 *enable); -+u32 mp_query_psd(PADAPTER pAdapter, u8 *data); -+void rtw_mp_trigger_iqk(PADAPTER padapter); -+void rtw_mp_trigger_lck(PADAPTER padapter); -+void rtw_mp_trigger_dpk(PADAPTER padapter); -+u8 rtw_mp_mode_check(PADAPTER padapter); -+bool rtw_is_mp_tssitrk_on(_adapter *adapter); -+ -+void hal_mpt_SwitchRfSetting(PADAPTER pAdapter); -+s32 hal_mpt_SetPowerTracking(PADAPTER padapter, u8 enable); -+void hal_mpt_GetPowerTracking(PADAPTER padapter, u8 *enable); -+void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); -+void hal_mpt_SetChannel(PADAPTER pAdapter); -+void hal_mpt_SetBandwidth(PADAPTER pAdapter); -+void hal_mpt_SetTxPower(PADAPTER pAdapter); -+void hal_mpt_SetDataRate(PADAPTER pAdapter); -+void hal_mpt_SetAntenna(PADAPTER pAdapter); -+s32 hal_mpt_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); -+void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter); -+u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter, u8 rf_path); -+void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 rfpath, u8 *value); -+void hal_mpt_SetContinuousTx(PADAPTER pAdapter, u8 bStart); -+void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart); -+void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart); -+void hal_mpt_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); -+u8 mpt_ProSetPMacTx(PADAPTER Adapter); -+void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter , BOOLEAN bMain); -+void mp_phy_switch_rf_path_set(PADAPTER pAdapter , u8 *pstate); -+u8 MP_PHY_QueryRFPathSwitch(PADAPTER pAdapter); -+u32 mpt_ProQueryCalTxPower(PADAPTER pAdapter, u8 RfPath); -+void MPT_PwrCtlDM(PADAPTER padapter, u32 trk_type); -+u8 mpt_to_mgnt_rate(u32 MptRateIdx); -+u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr); -+u32 mp_join(PADAPTER padapter, u8 mode); -+u32 hal_mpt_query_phytxok(PADAPTER pAdapter); -+u32 mpt_get_tx_power_finalabs_val(PADAPTER padapter, u8 rf_path); -+void mpt_trigger_tssi_tracking(PADAPTER pAdapter, u8 rf_path); -+ -+ -+void -+PMAC_Get_Pkt_Param( -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo -+); -+void -+CCK_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo -+); -+void -+PMAC_Nsym_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo -+); -+void -+L_SIG_generator( -+ u32 N_SYM, /* Max: 750*/ -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo -+); -+ -+void HT_SIG_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo); -+ -+void VHT_SIG_A_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo, -+ PRT_PMAC_PKT_INFO pPMacPktInfo); -+ -+void VHT_SIG_B_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo); -+ -+void VHT_Delimiter_generator( -+ PRT_PMAC_TX_INFO pPMacTxInfo); -+ -+ -+int rtw_mp_write_reg(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_read_reg(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_write_rf(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_read_rf(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_start(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_stop(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_rate(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_channel(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_ch_offset(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_bandwidth(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_txpower_index(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_txpower(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_txpower(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_ant_tx(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_ant_rx(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_set_ctx_destAddr(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_ctx(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_disable_bt_coexist(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_disable_bt_coexist(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_arx(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_trx_query(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_pwrtrk(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_psd(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_thermal(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_reset_stats(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_dump(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_phypara(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_SetRFPath(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_switch_rf_path(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_link(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_QueryDrv(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_PwrCtlDM(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_getver(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_mon(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_pwrlmt(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_pwrbyrate(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_dpk_track(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_dpk(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_efuse_mask_file(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_bt_efuse_mask_file(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_efuse_file_map(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_efuse_file_map_store(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_bt_efuse_file_map(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_SetBT(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra); -+int rtw_mp_tx(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_rx(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+int rtw_mp_hwtx(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra); -+u8 HwRateToMPTRate(u8 rate); -+int rtw_mp_iqk(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_lck(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_get_tsside(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+int rtw_mp_set_tsside(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra); -+#endif /* _RTW_MP_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_mp_phy_regdef.h b/drivers/staging/rtl8723cs/include/rtw_mp_phy_regdef.h -new file mode 100644 -index 000000000000..be627800e522 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_mp_phy_regdef.h -@@ -0,0 +1,1094 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/***************************************************************************** -+ * -+ * Module: __RTW_MP_PHY_REGDEF_H_ -+ * -+ * -+ * Note: 1. Define PMAC/BB register map -+ * 2. Define RF register map -+ * 3. PMAC/BB register bit mask. -+ * 4. RF reg bit mask. -+ * 5. Other BB/RF relative definition. -+ * -+ * -+ * Export: Constants, macro, functions(API), global variables(None). -+ * -+ * Abbrev: -+ * -+ * History: -+ * Data Who Remark -+ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. -+ * 2. Reorganize code architecture. -+ * 09/25/2008 MH 1. Add RL6052 register definition -+ * -+ *****************************************************************************/ -+#ifndef __RTW_MP_PHY_REGDEF_H_ -+#define __RTW_MP_PHY_REGDEF_H_ -+ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+/* ************************************************************ -+ * 8192S Regsiter offset definition -+ * ************************************************************ */ -+ -+/* -+ * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -+ * 3. RF register 0x00-2E -+ * 4. Bit Mask for BB/RF register -+ * 5. Other defintion for BB/RF R/W -+ * */ -+ -+ -+/* -+ * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -+ * 1. Page1(0x100) -+ * */ -+#define rPMAC_Reset 0x100 -+#define rPMAC_TxStart 0x104 -+#define rPMAC_TxLegacySIG 0x108 -+#define rPMAC_TxHTSIG1 0x10c -+#define rPMAC_TxHTSIG2 0x110 -+#define rPMAC_PHYDebug 0x114 -+#define rPMAC_TxPacketNum 0x118 -+#define rPMAC_TxIdle 0x11c -+#define rPMAC_TxMACHeader0 0x120 -+#define rPMAC_TxMACHeader1 0x124 -+#define rPMAC_TxMACHeader2 0x128 -+#define rPMAC_TxMACHeader3 0x12c -+#define rPMAC_TxMACHeader4 0x130 -+#define rPMAC_TxMACHeader5 0x134 -+#define rPMAC_TxDataType 0x138 -+#define rPMAC_TxRandomSeed 0x13c -+#define rPMAC_CCKPLCPPreamble 0x140 -+#define rPMAC_CCKPLCPHeader 0x144 -+#define rPMAC_CCKCRC16 0x148 -+#define rPMAC_OFDMRxCRC32OK 0x170 -+#define rPMAC_OFDMRxCRC32Er 0x174 -+#define rPMAC_OFDMRxParityEr 0x178 -+#define rPMAC_OFDMRxCRC8Er 0x17c -+#define rPMAC_CCKCRxRC16Er 0x180 -+#define rPMAC_CCKCRxRC32Er 0x184 -+#define rPMAC_CCKCRxRC32OK 0x188 -+#define rPMAC_TxStatus 0x18c -+ -+/* -+ * 2. Page2(0x200) -+ * -+ * The following two definition are only used for USB interface. -+ * #define RF_BB_CMD_ADDR 0x02c0 */ /* RF/BB read/write command address. -+ * #define RF_BB_CMD_DATA 0x02c4 */ /* RF/BB read/write command data. */ -+ -+/* -+ * 3. Page8(0x800) -+ * */ -+#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA0_TxInfo 0x804 /* Status report?? */ -+#define rFPGA0_PSDFunction 0x808 -+ -+#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ -+ -+#define rFPGA0_RFTiming1 0x810 /* Useless now */ -+#define rFPGA0_RFTiming2 0x814 -+/* #define rFPGA0_XC_RFTiming 0x818 */ -+/* #define rFPGA0_XD_RFTiming 0x81c */ -+ -+#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -+#define rFPGA0_XA_HSSIParameter2 0x824 -+#define rFPGA0_XB_HSSIParameter1 0x828 -+#define rFPGA0_XB_HSSIParameter2 0x82c -+#define rFPGA0_XC_HSSIParameter1 0x830 -+#define rFPGA0_XC_HSSIParameter2 0x834 -+#define rFPGA0_XD_HSSIParameter1 0x838 -+#define rFPGA0_XD_HSSIParameter2 0x83c -+#define rFPGA0_XA_LSSIParameter 0x840 -+#define rFPGA0_XB_LSSIParameter 0x844 -+#define rFPGA0_XC_LSSIParameter 0x848 -+#define rFPGA0_XD_LSSIParameter 0x84c -+ -+#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -+#define rFPGA0_RFSleepUpParameter 0x854 -+ -+#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -+#define rFPGA0_XCD_SwitchControl 0x85c -+ -+#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -+#define rFPGA0_XB_RFInterfaceOE 0x864 -+#define rFPGA0_XC_RFInterfaceOE 0x868 -+#define rFPGA0_XD_RFInterfaceOE 0x86c -+ -+#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -+#define rFPGA0_XCD_RFInterfaceSW 0x874 -+ -+#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -+#define rFPGA0_XCD_RFParameter 0x87c -+ -+#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -+#define rFPGA0_AnalogParameter2 0x884 -+#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -+#define rFPGA0_AnalogParameter4 0x88c -+ -+#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -+#define rFPGA0_XB_LSSIReadBack 0x8a4 -+#define rFPGA0_XC_LSSIReadBack 0x8a8 -+#define rFPGA0_XD_LSSIReadBack 0x8ac -+ -+#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -+#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -+#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ -+ -+/* -+ * 4. Page9(0x900) -+ * */ -+#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ -+ -+#define rFPGA1_TxBlock 0x904 /* Useless now */ -+#define rFPGA1_DebugSelect 0x908 /* Useless now */ -+#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -+#define rS0S1_PathSwitch 0x948 -+ -+/* -+ * 5. PageA(0xA00) -+ * -+ * Set Control channel to upper or lower. These settings are required only for 40MHz */ -+#define rCCK0_System 0xa00 -+ -+#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -+#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ -+ -+#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -+#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ -+ -+#define rCCK0_RxHP 0xa14 -+ -+#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -+#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ -+ -+#define rCCK0_TxFilter1 0xa20 -+#define rCCK0_TxFilter2 0xa24 -+#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -+#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -+#define rCCK0_TRSSIReport 0xa50 -+#define rCCK0_RxReport 0xa54 /* 0xa57 */ -+#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -+#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ -+ -+/* -+ * 6. PageC(0xC00) -+ * */ -+#define rOFDM0_LSTF 0xc00 -+ -+#define rOFDM0_TRxPathEnable 0xc04 -+#define rOFDM0_TRMuxPar 0xc08 -+#define rOFDM0_TRSWIsolation 0xc0c -+ -+#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -+#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -+#define rOFDM0_XBRxAFE 0xc18 -+#define rOFDM0_XBRxIQImbalance 0xc1c -+#define rOFDM0_XCRxAFE 0xc20 -+#define rOFDM0_XCRxIQImbalance 0xc24 -+#define rOFDM0_XDRxAFE 0xc28 -+#define rOFDM0_XDRxIQImbalance 0xc2c -+ -+#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -+#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -+#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -+#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ -+ -+#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -+#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -+#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -+#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -+ -+#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -+#define rOFDM0_XAAGCCore2 0xc54 -+#define rOFDM0_XBAGCCore1 0xc58 -+#define rOFDM0_XBAGCCore2 0xc5c -+#define rOFDM0_XCAGCCore1 0xc60 -+#define rOFDM0_XCAGCCore2 0xc64 -+#define rOFDM0_XDAGCCore1 0xc68 -+#define rOFDM0_XDAGCCore2 0xc6c -+ -+#define rOFDM0_AGCParameter1 0xc70 -+#define rOFDM0_AGCParameter2 0xc74 -+#define rOFDM0_AGCRSSITable 0xc78 -+#define rOFDM0_HTSTFAGC 0xc7c -+ -+#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -+#define rOFDM0_XATxAFE 0xc84 -+#define rOFDM0_XBTxIQImbalance 0xc88 -+#define rOFDM0_XBTxAFE 0xc8c -+#define rOFDM0_XCTxIQImbalance 0xc90 -+#define rOFDM0_XCTxAFE 0xc94 -+#define rOFDM0_XDTxIQImbalance 0xc98 -+#define rOFDM0_XDTxAFE 0xc9c -+#define rOFDM0_RxIQExtAnta 0xca0 -+ -+#define rOFDM0_RxHPParameter 0xce0 -+#define rOFDM0_TxPseudoNoiseWgt 0xce4 -+#define rOFDM0_FrameSync 0xcf0 -+#define rOFDM0_DFSReport 0xcf4 -+#define rOFDM0_TxCoeff1 0xca4 -+#define rOFDM0_TxCoeff2 0xca8 -+#define rOFDM0_TxCoeff3 0xcac -+#define rOFDM0_TxCoeff4 0xcb0 -+#define rOFDM0_TxCoeff5 0xcb4 -+#define rOFDM0_TxCoeff6 0xcb8 -+ -+ -+/* -+ * 7. PageD(0xD00) -+ * */ -+#define rOFDM1_LSTF 0xd00 -+#define rOFDM1_TRxPathEnable 0xd04 -+ -+#define rOFDM1_CFO 0xd08 /* No setting now */ -+#define rOFDM1_CSI1 0xd10 -+#define rOFDM1_SBD 0xd14 -+#define rOFDM1_CSI2 0xd18 -+#define rOFDM1_CFOTracking 0xd2c -+#define rOFDM1_TRxMesaure1 0xd34 -+#define rOFDM1_IntfDet 0xd3c -+#define rOFDM1_PseudoNoiseStateAB 0xd50 -+#define rOFDM1_PseudoNoiseStateCD 0xd54 -+#define rOFDM1_RxPseudoNoiseWgt 0xd58 -+ -+#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -+#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -+#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ -+ -+#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -+#define rOFDM_ShortCFOCD 0xdb0 -+#define rOFDM_LongCFOAB 0xdb4 -+#define rOFDM_LongCFOCD 0xdb8 -+#define rOFDM_TailCFOAB 0xdbc -+#define rOFDM_TailCFOCD 0xdc0 -+#define rOFDM_PWMeasure1 0xdc4 -+#define rOFDM_PWMeasure2 0xdc8 -+#define rOFDM_BWReport 0xdcc -+#define rOFDM_AGCReport 0xdd0 -+#define rOFDM_RxSNR 0xdd4 -+#define rOFDM_RxEVMCSI 0xdd8 -+#define rOFDM_SIGReport 0xddc -+ -+ -+/* -+ * 8. PageE(0xE00) -+ * */ -+#define rTxAGC_Rate18_06 0xe00 -+#define rTxAGC_Rate54_24 0xe04 -+#define rTxAGC_CCK_Mcs32 0xe08 -+#define rTxAGC_Mcs03_Mcs00 0xe10 -+#define rTxAGC_Mcs07_Mcs04 0xe14 -+#define rTxAGC_Mcs11_Mcs08 0xe18 -+#define rTxAGC_Mcs15_Mcs12 0xe1c -+ -+/* Analog- control in RX_WAIT_CCA : REG: EE0 [Analog- Power & Control Register] */ -+#define rRx_Wait_CCCA 0xe70 -+#define rAnapar_Ctrl_BB 0xee0 -+ -+/* -+ * 7. RF Register 0x00-0x2E (RF 8256) -+ * RF-0222D 0x00-3F -+ * -+ * Zebra1 */ -+#define RTL92SE_FPGA_VERIFY 0 -+#define rZebra1_HSSIEnable 0x0 /* Useless now */ -+#define rZebra1_TRxEnable1 0x1 -+#define rZebra1_TRxEnable2 0x2 -+#define rZebra1_AGC 0x4 -+#define rZebra1_ChargePump 0x5 -+/* #if (RTL92SE_FPGA_VERIFY == 1) */ -+#define rZebra1_Channel 0x7 /* RF channel switch -+ * #else */ -+ -+/* #endif */ -+#define rZebra1_TxGain 0x8 /* Useless now */ -+#define rZebra1_TxLPF 0x9 -+#define rZebra1_RxLPF 0xb -+#define rZebra1_RxHPFCorner 0xc -+ -+/* Zebra4 */ -+#define rGlobalCtrl 0 /* Useless now */ -+#define rRTL8256_TxLPF 19 -+#define rRTL8256_RxLPF 11 -+ -+/* RTL8258 */ -+#define rRTL8258_TxLPF 0x11 /* Useless now */ -+#define rRTL8258_RxLPF 0x13 -+#define rRTL8258_RSSILPF 0xa -+ -+/* -+ * RL6052 Register definition -+ * */ -+#define RF_AC 0x00 /* */ -+ -+#define RF_IQADJ_G1 0x01 /* */ -+#define RF_IQADJ_G2 0x02 /* */ -+#define RF_POW_TRSW 0x05 /* */ -+ -+#define RF_GAIN_RX 0x06 /* */ -+#define RF_GAIN_TX 0x07 /* */ -+ -+#define RF_TXM_IDAC 0x08 /* */ -+#define RF_BS_IQGEN 0x0F /* */ -+ -+#define RF_MODE1 0x10 /* */ -+#define RF_MODE2 0x11 /* */ -+ -+#define RF_RX_AGC_HP 0x12 /* */ -+#define RF_TX_AGC 0x13 /* */ -+#define RF_BIAS 0x14 /* */ -+#define RF_IPA 0x15 /* */ -+#define RF_TXBIAS 0x16 -+#define RF_POW_ABILITY 0x17 /* */ -+#define RF_MODE_AG 0x18 /* */ -+#define rRfChannel 0x18 /* RF channel and BW switch */ -+#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -+#define RF_TOP 0x19 /* */ -+ -+#define RF_RX_G1 0x1A /* */ -+#define RF_RX_G2 0x1B /* */ -+ -+#define RF_RX_BB2 0x1C /* */ -+#define RF_RX_BB1 0x1D /* */ -+ -+#define RF_RCK1 0x1E /* */ -+#define RF_RCK2 0x1F /* */ -+ -+#define RF_TX_G1 0x20 /* */ -+#define RF_TX_G2 0x21 /* */ -+#define RF_TX_G3 0x22 /* */ -+ -+#define RF_TX_BB1 0x23 /* */ -+ -+#define RF_T_METER 0x24 /* */ -+ -+#define RF_SYN_G1 0x25 /* RF TX Power control */ -+#define RF_SYN_G2 0x26 /* RF TX Power control */ -+#define RF_SYN_G3 0x27 /* RF TX Power control */ -+#define RF_SYN_G4 0x28 /* RF TX Power control */ -+#define RF_SYN_G5 0x29 /* RF TX Power control */ -+#define RF_SYN_G6 0x2A /* RF TX Power control */ -+#define RF_SYN_G7 0x2B /* RF TX Power control */ -+#define RF_SYN_G8 0x2C /* RF TX Power control */ -+ -+#define RF_RCK_OS 0x30 /* RF TX PA control */ -+ -+#define RF_TXPA_G1 0x31 /* RF TX PA control */ -+#define RF_TXPA_G2 0x32 /* RF TX PA control */ -+#define RF_TXPA_G3 0x33 /* RF TX PA control */ -+ -+/* -+ * Bit Mask -+ * -+ * 1. Page1(0x100) */ -+#define bBBResetB 0x100 /* Useless now? */ -+#define bGlobalResetB 0x200 -+#define bOFDMTxStart 0x4 -+#define bCCKTxStart 0x8 -+#define bCRC32Debug 0x100 -+#define bPMACLoopback 0x10 -+#define bTxLSIG 0xffffff -+#define bOFDMTxRate 0xf -+#define bOFDMTxReserved 0x10 -+#define bOFDMTxLength 0x1ffe0 -+#define bOFDMTxParity 0x20000 -+#define bTxHTSIG1 0xffffff -+#define bTxHTMCSRate 0x7f -+#define bTxHTBW 0x80 -+#define bTxHTLength 0xffff00 -+#define bTxHTSIG2 0xffffff -+#define bTxHTSmoothing 0x1 -+#define bTxHTSounding 0x2 -+#define bTxHTReserved 0x4 -+#define bTxHTAggreation 0x8 -+#define bTxHTSTBC 0x30 -+#define bTxHTAdvanceCoding 0x40 -+#define bTxHTShortGI 0x80 -+#define bTxHTNumberHT_LTF 0x300 -+#define bTxHTCRC8 0x3fc00 -+#define bCounterReset 0x10000 -+#define bNumOfOFDMTx 0xffff -+#define bNumOfCCKTx 0xffff0000 -+#define bTxIdleInterval 0xffff -+#define bOFDMService 0xffff0000 -+#define bTxMACHeader 0xffffffff -+#define bTxDataInit 0xff -+#define bTxHTMode 0x100 -+#define bTxDataType 0x30000 -+#define bTxRandomSeed 0xffffffff -+#define bCCKTxPreamble 0x1 -+#define bCCKTxSFD 0xffff0000 -+#define bCCKTxSIG 0xff -+#define bCCKTxService 0xff00 -+#define bCCKLengthExt 0x8000 -+#define bCCKTxLength 0xffff0000 -+#define bCCKTxCRC16 0xffff -+#define bCCKTxStatus 0x1 -+#define bOFDMTxStatus 0x2 -+ -+#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -+ -+/* 2. Page8(0x800) */ -+#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -+#define bJapanMode 0x2 -+#define bCCKTxSC 0x30 -+#define bCCKEn 0x1000000 -+#define bOFDMEn 0x2000000 -+ -+#define bOFDMRxADCPhase 0x10000 /* Useless now */ -+#define bOFDMTxDACPhase 0x40000 -+#define bXATxAGC 0x3f -+ -+#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -+#define bXCTxAGC 0xf000 -+#define bXDTxAGC 0xf0000 -+ -+#define bPAStart 0xf0000000 /* Useless now */ -+#define bTRStart 0x00f00000 -+#define bRFStart 0x0000f000 -+#define bBBStart 0x000000f0 -+#define bBBCCKStart 0x0000000f -+#define bPAEnd 0xf /* Reg0x814 */ -+#define bTREnd 0x0f000000 -+#define bRFEnd 0x000f0000 -+#define bCCAMask 0x000000f0 /* T2R */ -+#define bR2RCCAMask 0x00000f00 -+#define bHSSI_R2TDelay 0xf8000000 -+#define bHSSI_T2RDelay 0xf80000 -+#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -+#define bIGFromCCK 0x200 -+#define bAGCAddress 0x3f -+#define bRxHPTx 0x7000 -+#define bRxHPT2R 0x38000 -+#define bRxHPCCKIni 0xc0000 -+#define bAGCTxCode 0xc00000 -+#define bAGCRxCode 0x300000 -+ -+#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -+#define b3WireAddressLength 0x400 -+ -+#define b3WireRFPowerDown 0x1 /* Useless now -+ * #define bHWSISelect 0x8 */ -+#define b5GPAPEPolarity 0x40000000 -+#define b2GPAPEPolarity 0x80000000 -+#define bRFSW_TxDefaultAnt 0x3 -+#define bRFSW_TxOptionAnt 0x30 -+#define bRFSW_RxDefaultAnt 0x300 -+#define bRFSW_RxOptionAnt 0x3000 -+#define bRFSI_3WireData 0x1 -+#define bRFSI_3WireClock 0x2 -+#define bRFSI_3WireLoad 0x4 -+#define bRFSI_3WireRW 0x8 -+#define bRFSI_3Wire 0xf -+ -+#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ -+ -+#define bRFSI_TRSW 0x20 /* Useless now */ -+#define bRFSI_TRSWB 0x40 -+#define bRFSI_ANTSW 0x100 -+#define bRFSI_ANTSWB 0x200 -+#define bRFSI_PAPE 0x400 -+#define bRFSI_PAPE5G 0x800 -+#define bBandSelect 0x1 -+#define bHTSIG2_GI 0x80 -+#define bHTSIG2_Smoothing 0x01 -+#define bHTSIG2_Sounding 0x02 -+#define bHTSIG2_Aggreaton 0x08 -+#define bHTSIG2_STBC 0x30 -+#define bHTSIG2_AdvCoding 0x40 -+#define bHTSIG2_NumOfHTLTF 0x300 -+#define bHTSIG2_CRC8 0x3fc -+#define bHTSIG1_MCS 0x7f -+#define bHTSIG1_BandWidth 0x80 -+#define bHTSIG1_HTLength 0xffff -+#define bLSIG_Rate 0xf -+#define bLSIG_Reserved 0x10 -+#define bLSIG_Length 0x1fffe -+#define bLSIG_Parity 0x20 -+#define bCCKRxPhase 0x4 -+#if (RTL92SE_FPGA_VERIFY == 1) -+ #define bLSSIReadAddress 0x3f000000 /* LSSI "Read" Address */ /* Reg 0x824 rFPGA0_XA_HSSIParameter2 */ -+#else -+ #define bLSSIReadAddress 0x7f800000 /* T65 RF */ -+#endif -+#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ -+#if (RTL92SE_FPGA_VERIFY == 1) -+ #define bLSSIReadBackData 0xfff /* Reg 0x8a0 rFPGA0_XA_LSSIReadBack */ -+#else -+ #define bLSSIReadBackData 0xfffff /* T65 RF */ -+#endif -+#define bLSSIReadOKFlag 0x1000 /* Useless now */ -+#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -+#define bRegulator0Standby 0x1 -+#define bRegulatorPLLStandby 0x2 -+#define bRegulator1Standby 0x4 -+#define bPLLPowerUp 0x8 -+#define bDPLLPowerUp 0x10 -+#define bDA10PowerUp 0x20 -+#define bAD7PowerUp 0x200 -+#define bDA6PowerUp 0x2000 -+#define bXtalPowerUp 0x4000 -+#define b40MDClkPowerUP 0x8000 -+#define bDA6DebugMode 0x20000 -+#define bDA6Swing 0x380000 -+ -+#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ -+ -+#define b80MClkDelay 0x18000000 /* Useless */ -+#define bAFEWatchDogEnable 0x20000000 -+ -+#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -+#define bXtalCap23 0x3 -+#define bXtalCap92x 0x0f000000 -+#define bXtalCap 0x0f000000 -+ -+#define bIntDifClkEnable 0x400 /* Useless */ -+#define bExtSigClkEnable 0x800 -+#define bBandgapMbiasPowerUp 0x10000 -+#define bAD11SHGain 0xc0000 -+#define bAD11InputRange 0x700000 -+#define bAD11OPCurrent 0x3800000 -+#define bIPathLoopback 0x4000000 -+#define bQPathLoopback 0x8000000 -+#define bAFELoopback 0x10000000 -+#define bDA10Swing 0x7e0 -+#define bDA10Reverse 0x800 -+#define bDAClkSource 0x1000 -+#define bAD7InputRange 0x6000 -+#define bAD7Gain 0x38000 -+#define bAD7OutputCMMode 0x40000 -+#define bAD7InputCMMode 0x380000 -+#define bAD7Current 0xc00000 -+#define bRegulatorAdjust 0x7000000 -+#define bAD11PowerUpAtTx 0x1 -+#define bDA10PSAtTx 0x10 -+#define bAD11PowerUpAtRx 0x100 -+#define bDA10PSAtRx 0x1000 -+#define bCCKRxAGCFormat 0x200 -+#define bPSDFFTSamplepPoint 0xc000 -+#define bPSDAverageNum 0x3000 -+#define bIQPathControl 0xc00 -+#define bPSDFreq 0x3ff -+#define bPSDAntennaPath 0x30 -+#define bPSDIQSwitch 0x40 -+#define bPSDRxTrigger 0x400000 -+#define bPSDTxTrigger 0x80000000 -+#define bPSDSineToneScale 0x7f000000 -+#define bPSDReport 0xffff -+ -+/* 3. Page9(0x900) */ -+#define bOFDMTxSC 0x30000000 /* Useless */ -+#define bCCKTxOn 0x1 -+#define bOFDMTxOn 0x2 -+#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -+#define bDebugItem 0xff /* reset debug page and LWord */ -+#define bAntL 0x10 -+#define bAntNonHT 0x100 -+#define bAntHT1 0x1000 -+#define bAntHT2 0x10000 -+#define bAntHT1S1 0x100000 -+#define bAntNonHTS1 0x1000000 -+ -+/* 4. PageA(0xA00) */ -+#define bCCKBBMode 0x3 /* Useless */ -+#define bCCKTxPowerSaving 0x80 -+#define bCCKRxPowerSaving 0x40 -+ -+#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -+ -+#define bCCKScramble 0x8 /* Useless */ -+#define bCCKAntDiversity 0x8000 -+#define bCCKCarrierRecovery 0x4000 -+#define bCCKTxRate 0x3000 -+#define bCCKDCCancel 0x0800 -+#define bCCKISICancel 0x0400 -+#define bCCKMatchFilter 0x0200 -+#define bCCKEqualizer 0x0100 -+#define bCCKPreambleDetect 0x800000 -+#define bCCKFastFalseCCA 0x400000 -+#define bCCKChEstStart 0x300000 -+#define bCCKCCACount 0x080000 -+#define bCCKcs_lim 0x070000 -+#define bCCKBistMode 0x80000000 -+#define bCCKCCAMask 0x40000000 -+#define bCCKTxDACPhase 0x4 -+#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -+#define bCCKr_cp_mode0 0x0100 -+#define bCCKTxDCOffset 0xf0 -+#define bCCKRxDCOffset 0xf -+#define bCCKCCAMode 0xc000 -+#define bCCKFalseCS_lim 0x3f00 -+#define bCCKCS_ratio 0xc00000 -+#define bCCKCorgBit_sel 0x300000 -+#define bCCKPD_lim 0x0f0000 -+#define bCCKNewCCA 0x80000000 -+#define bCCKRxHPofIG 0x8000 -+#define bCCKRxIG 0x7f00 -+#define bCCKLNAPolarity 0x800000 -+#define bCCKRx1stGain 0x7f0000 -+#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -+#define bCCKRxAGCSatLevel 0x1f000000 -+#define bCCKRxAGCSatCount 0xe0 -+#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -+#define bCCKFixedRxAGC 0x8000 -+/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -+#define bCCKAntennaPolarity 0x2000 -+#define bCCKTxFilterType 0x0c00 -+#define bCCKRxAGCReportType 0x0300 -+#define bCCKRxDAGCEn 0x80000000 -+#define bCCKRxDAGCPeriod 0x20000000 -+#define bCCKRxDAGCSatLevel 0x1f000000 -+#define bCCKTimingRecovery 0x800000 -+#define bCCKTxC0 0x3f0000 -+#define bCCKTxC1 0x3f000000 -+#define bCCKTxC2 0x3f -+#define bCCKTxC3 0x3f00 -+#define bCCKTxC4 0x3f0000 -+#define bCCKTxC5 0x3f000000 -+#define bCCKTxC6 0x3f -+#define bCCKTxC7 0x3f00 -+#define bCCKDebugPort 0xff0000 -+#define bCCKDACDebug 0x0f000000 -+#define bCCKFalseAlarmEnable 0x8000 -+#define bCCKFalseAlarmRead 0x4000 -+#define bCCKTRSSI 0x7f -+#define bCCKRxAGCReport 0xfe -+#define bCCKRxReport_AntSel 0x80000000 -+#define bCCKRxReport_MFOff 0x40000000 -+#define bCCKRxRxReport_SQLoss 0x20000000 -+#define bCCKRxReport_Pktloss 0x10000000 -+#define bCCKRxReport_Lockedbit 0x08000000 -+#define bCCKRxReport_RateError 0x04000000 -+#define bCCKRxReport_RxRate 0x03000000 -+#define bCCKRxFACounterLower 0xff -+#define bCCKRxFACounterUpper 0xff000000 -+#define bCCKRxHPAGCStart 0xe000 -+#define bCCKRxHPAGCFinal 0x1c00 -+#define bCCKRxFalseAlarmEnable 0x8000 -+#define bCCKFACounterFreeze 0x4000 -+#define bCCKTxPathSel 0x10000000 -+#define bCCKDefaultRxPath 0xc000000 -+#define bCCKOptionRxPath 0x3000000 -+ -+/* 5. PageC(0xC00) */ -+#define bNumOfSTF 0x3 /* Useless */ -+#define bShift_L 0xc0 -+#define bGI_TH 0xc -+#define bRxPathA 0x1 -+#define bRxPathB 0x2 -+#define bRxPathC 0x4 -+#define bRxPathD 0x8 -+#define bTxPathA 0x1 -+#define bTxPathB 0x2 -+#define bTxPathC 0x4 -+#define bTxPathD 0x8 -+#define bTRSSIFreq 0x200 -+#define bADCBackoff 0x3000 -+#define bDFIRBackoff 0xc000 -+#define bTRSSILatchPhase 0x10000 -+#define bRxIDCOffset 0xff -+#define bRxQDCOffset 0xff00 -+#define bRxDFIRMode 0x1800000 -+#define bRxDCNFType 0xe000000 -+#define bRXIQImb_A 0x3ff -+#define bRXIQImb_B 0xfc00 -+#define bRXIQImb_C 0x3f0000 -+#define bRXIQImb_D 0xffc00000 -+#define bDC_dc_Notch 0x60000 -+#define bRxNBINotch 0x1f000000 -+#define bPD_TH 0xf -+#define bPD_TH_Opt2 0xc000 -+#define bPWED_TH 0x700 -+#define bIfMF_Win_L 0x800 -+#define bPD_Option 0x1000 -+#define bMF_Win_L 0xe000 -+#define bBW_Search_L 0x30000 -+#define bwin_enh_L 0xc0000 -+#define bBW_TH 0x700000 -+#define bED_TH2 0x3800000 -+#define bBW_option 0x4000000 -+#define bRatio_TH 0x18000000 -+#define bWindow_L 0xe0000000 -+#define bSBD_Option 0x1 -+#define bFrame_TH 0x1c -+#define bFS_Option 0x60 -+#define bDC_Slope_check 0x80 -+#define bFGuard_Counter_DC_L 0xe00 -+#define bFrame_Weight_Short 0x7000 -+#define bSub_Tune 0xe00000 -+#define bFrame_DC_Length 0xe000000 -+#define bSBD_start_offset 0x30000000 -+#define bFrame_TH_2 0x7 -+#define bFrame_GI2_TH 0x38 -+#define bGI2_Sync_en 0x40 -+#define bSarch_Short_Early 0x300 -+#define bSarch_Short_Late 0xc00 -+#define bSarch_GI2_Late 0x70000 -+#define bCFOAntSum 0x1 -+#define bCFOAcc 0x2 -+#define bCFOStartOffset 0xc -+#define bCFOLookBack 0x70 -+#define bCFOSumWeight 0x80 -+#define bDAGCEnable 0x10000 -+#define bTXIQImb_A 0x3ff -+#define bTXIQImb_B 0xfc00 -+#define bTXIQImb_C 0x3f0000 -+#define bTXIQImb_D 0xffc00000 -+#define bTxIDCOffset 0xff -+#define bTxQDCOffset 0xff00 -+#define bTxDFIRMode 0x10000 -+#define bTxPesudoNoiseOn 0x4000000 -+#define bTxPesudoNoise_A 0xff -+#define bTxPesudoNoise_B 0xff00 -+#define bTxPesudoNoise_C 0xff0000 -+#define bTxPesudoNoise_D 0xff000000 -+#define bCCADropOption 0x20000 -+#define bCCADropThres 0xfff00000 -+#define bEDCCA_H 0xf -+#define bEDCCA_L 0xf0 -+#define bLambda_ED 0x300 -+#define bRxInitialGain 0x7f -+#define bRxAntDivEn 0x80 -+#define bRxAGCAddressForLNA 0x7f00 -+#define bRxHighPowerFlow 0x8000 -+#define bRxAGCFreezeThres 0xc0000 -+#define bRxFreezeStep_AGC1 0x300000 -+#define bRxFreezeStep_AGC2 0xc00000 -+#define bRxFreezeStep_AGC3 0x3000000 -+#define bRxFreezeStep_AGC0 0xc000000 -+#define bRxRssi_Cmp_En 0x10000000 -+#define bRxQuickAGCEn 0x20000000 -+#define bRxAGCFreezeThresMode 0x40000000 -+#define bRxOverFlowCheckType 0x80000000 -+#define bRxAGCShift 0x7f -+#define bTRSW_Tri_Only 0x80 -+#define bPowerThres 0x300 -+#define bRxAGCEn 0x1 -+#define bRxAGCTogetherEn 0x2 -+#define bRxAGCMin 0x4 -+#define bRxHP_Ini 0x7 -+#define bRxHP_TRLNA 0x70 -+#define bRxHP_RSSI 0x700 -+#define bRxHP_BBP1 0x7000 -+#define bRxHP_BBP2 0x70000 -+#define bRxHP_BBP3 0x700000 -+#define bRSSI_H 0x7f0000 /* the threshold for high power */ -+#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -+#define bRxSettle_TRSW 0x7 -+#define bRxSettle_LNA 0x38 -+#define bRxSettle_RSSI 0x1c0 -+#define bRxSettle_BBP 0xe00 -+#define bRxSettle_RxHP 0x7000 -+#define bRxSettle_AntSW_RSSI 0x38000 -+#define bRxSettle_AntSW 0xc0000 -+#define bRxProcessTime_DAGC 0x300000 -+#define bRxSettle_HSSI 0x400000 -+#define bRxProcessTime_BBPPW 0x800000 -+#define bRxAntennaPowerShift 0x3000000 -+#define bRSSITableSelect 0xc000000 -+#define bRxHP_Final 0x7000000 -+#define bRxHTSettle_BBP 0x7 -+#define bRxHTSettle_HSSI 0x8 -+#define bRxHTSettle_RxHP 0x70 -+#define bRxHTSettle_BBPPW 0x80 -+#define bRxHTSettle_Idle 0x300 -+#define bRxHTSettle_Reserved 0x1c00 -+#define bRxHTRxHPEn 0x8000 -+#define bRxHTAGCFreezeThres 0x30000 -+#define bRxHTAGCTogetherEn 0x40000 -+#define bRxHTAGCMin 0x80000 -+#define bRxHTAGCEn 0x100000 -+#define bRxHTDAGCEn 0x200000 -+#define bRxHTRxHP_BBP 0x1c00000 -+#define bRxHTRxHP_Final 0xe0000000 -+#define bRxPWRatioTH 0x3 -+#define bRxPWRatioEn 0x4 -+#define bRxMFHold 0x3800 -+#define bRxPD_Delay_TH1 0x38 -+#define bRxPD_Delay_TH2 0x1c0 -+#define bRxPD_DC_COUNT_MAX 0x600 -+/* #define bRxMF_Hold 0x3800 */ -+#define bRxPD_Delay_TH 0x8000 -+#define bRxProcess_Delay 0xf0000 -+#define bRxSearchrange_GI2_Early 0x700000 -+#define bRxFrame_Guard_Counter_L 0x3800000 -+#define bRxSGI_Guard_L 0xc000000 -+#define bRxSGI_Search_L 0x30000000 -+#define bRxSGI_TH 0xc0000000 -+#define bDFSCnt0 0xff -+#define bDFSCnt1 0xff00 -+#define bDFSFlag 0xf0000 -+#define bMFWeightSum 0x300000 -+#define bMinIdxTH 0x7f000000 -+#define bDAFormat 0x40000 -+#define bTxChEmuEnable 0x01000000 -+#define bTRSWIsolation_A 0x7f -+#define bTRSWIsolation_B 0x7f00 -+#define bTRSWIsolation_C 0x7f0000 -+#define bTRSWIsolation_D 0x7f000000 -+#define bExtLNAGain 0x7c00 -+ -+/* 6. PageE(0xE00) */ -+#define bSTBCEn 0x4 /* Useless */ -+#define bAntennaMapping 0x10 -+#define bNss 0x20 -+#define bCFOAntSumD 0x200 -+#define bPHYCounterReset 0x8000000 -+#define bCFOReportGet 0x4000000 -+#define bOFDMContinueTx 0x10000000 -+#define bOFDMSingleCarrier 0x20000000 -+#define bOFDMSingleTone 0x40000000 -+/* #define bRxPath1 0x01 */ -+/* #define bRxPath2 0x02 */ -+/* #define bRxPath3 0x04 */ -+/* #define bRxPath4 0x08 */ -+/* #define bTxPath1 0x10 */ -+/* #define bTxPath2 0x20 */ -+#define bHTDetect 0x100 -+#define bCFOEn 0x10000 -+#define bCFOValue 0xfff00000 -+#define bSigTone_Re 0x3f -+#define bSigTone_Im 0x7f00 -+#define bCounter_CCA 0xffff -+#define bCounter_ParityFail 0xffff0000 -+#define bCounter_RateIllegal 0xffff -+#define bCounter_CRC8Fail 0xffff0000 -+#define bCounter_MCSNoSupport 0xffff -+#define bCounter_FastSync 0xffff -+#define bShortCFO 0xfff -+#define bShortCFOTLength 12 /* total */ -+#define bShortCFOFLength 11 /* fraction */ -+#define bLongCFO 0x7ff -+#define bLongCFOTLength 11 -+#define bLongCFOFLength 11 -+#define bTailCFO 0x1fff -+#define bTailCFOTLength 13 -+#define bTailCFOFLength 12 -+#define bmax_en_pwdB 0xffff -+#define bCC_power_dB 0xffff0000 -+#define bnoise_pwdB 0xffff -+#define bPowerMeasTLength 10 -+#define bPowerMeasFLength 3 -+#define bRx_HT_BW 0x1 -+#define bRxSC 0x6 -+#define bRx_HT 0x8 -+#define bNB_intf_det_on 0x1 -+#define bIntf_win_len_cfg 0x30 -+#define bNB_Intf_TH_cfg 0x1c0 -+#define bRFGain 0x3f -+#define bTableSel 0x40 -+#define bTRSW 0x80 -+#define bRxSNR_A 0xff -+#define bRxSNR_B 0xff00 -+#define bRxSNR_C 0xff0000 -+#define bRxSNR_D 0xff000000 -+#define bSNREVMTLength 8 -+#define bSNREVMFLength 1 -+#define bCSI1st 0xff -+#define bCSI2nd 0xff00 -+#define bRxEVM1st 0xff0000 -+#define bRxEVM2nd 0xff000000 -+#define bSIGEVM 0xff -+#define bPWDB 0xff00 -+#define bSGIEN 0x10000 -+ -+#define bSFactorQAM1 0xf /* Useless */ -+#define bSFactorQAM2 0xf0 -+#define bSFactorQAM3 0xf00 -+#define bSFactorQAM4 0xf000 -+#define bSFactorQAM5 0xf0000 -+#define bSFactorQAM6 0xf0000 -+#define bSFactorQAM7 0xf00000 -+#define bSFactorQAM8 0xf000000 -+#define bSFactorQAM9 0xf0000000 -+#define bCSIScheme 0x100000 -+ -+#define bNoiseLvlTopSet 0x3 /* Useless */ -+#define bChSmooth 0x4 -+#define bChSmoothCfg1 0x38 -+#define bChSmoothCfg2 0x1c0 -+#define bChSmoothCfg3 0xe00 -+#define bChSmoothCfg4 0x7000 -+#define bMRCMode 0x800000 -+#define bTHEVMCfg 0x7000000 -+ -+#define bLoopFitType 0x1 /* Useless */ -+#define bUpdCFO 0x40 -+#define bUpdCFOOffData 0x80 -+#define bAdvUpdCFO 0x100 -+#define bAdvTimeCtrl 0x800 -+#define bUpdClko 0x1000 -+#define bFC 0x6000 -+#define bTrackingMode 0x8000 -+#define bPhCmpEnable 0x10000 -+#define bUpdClkoLTF 0x20000 -+#define bComChCFO 0x40000 -+#define bCSIEstiMode 0x80000 -+#define bAdvUpdEqz 0x100000 -+#define bUChCfg 0x7000000 -+#define bUpdEqz 0x8000000 -+ -+#define bTxAGCRate18_06 0x7f7f7f7f /* Useless */ -+#define bTxAGCRate54_24 0x7f7f7f7f -+#define bTxAGCRateMCS32 0x7f -+#define bTxAGCRateCCK 0x7f00 -+#define bTxAGCRateMCS3_MCS0 0x7f7f7f7f -+#define bTxAGCRateMCS7_MCS4 0x7f7f7f7f -+#define bTxAGCRateMCS11_MCS8 0x7f7f7f7f -+#define bTxAGCRateMCS15_MCS12 0x7f7f7f7f -+ -+/* Rx Pseduo noise */ -+#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -+#define bRxPesudoNoise_A 0xff -+#define bRxPesudoNoise_B 0xff00 -+#define bRxPesudoNoise_C 0xff0000 -+#define bRxPesudoNoise_D 0xff000000 -+#define bPesudoNoiseState_A 0xffff -+#define bPesudoNoiseState_B 0xffff0000 -+#define bPesudoNoiseState_C 0xffff -+#define bPesudoNoiseState_D 0xffff0000 -+ -+/* 7. RF Register -+ * Zebra1 */ -+#define bZebra1_HSSIEnable 0x8 /* Useless */ -+#define bZebra1_TRxControl 0xc00 -+#define bZebra1_TRxGainSetting 0x07f -+#define bZebra1_RxCorner 0xc00 -+#define bZebra1_TxChargePump 0x38 -+#define bZebra1_RxChargePump 0x7 -+#define bZebra1_ChannelNum 0xf80 -+#define bZebra1_TxLPFBW 0x400 -+#define bZebra1_RxLPFBW 0x600 -+ -+/* Zebra4 */ -+#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -+#define bRTL8256RegModeCtrl0 0x40 -+#define bRTL8256_TxLPFBW 0x18 -+#define bRTL8256_RxLPFBW 0x600 -+ -+/* RTL8258 */ -+#define bRTL8258_TxLPFBW 0xc /* Useless */ -+#define bRTL8258_RxLPFBW 0xc00 -+#define bRTL8258_RSSILPFBW 0xc0 -+ -+ -+/* -+ * Other Definition -+ * */ -+ -+/* byte endable for sb_write */ -+#define bByte0 0x1 /* Useless */ -+#define bByte1 0x2 -+#define bByte2 0x4 -+#define bByte3 0x8 -+#define bWord0 0x3 -+#define bWord1 0xc -+#define bDWord 0xf -+ -+/* for PutRegsetting & GetRegSetting BitMask */ -+#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -+#define bMaskByte1 0xff00 -+#define bMaskByte2 0xff0000 -+#define bMaskByte3 0xff000000 -+#define bMaskHWord 0xffff0000 -+#define bMaskLWord 0x0000ffff -+#define bMaskDWord 0xffffffff -+#define bMaskH4Bits 0xf0000000 -+#define bMaskH3Bytes 0xffffff00 -+#define bMaskOFDM_D 0xffc00000 -+#define bMaskCCK 0x3f3f3f3f -+#define bMask12Bits 0xfff -+ -+/* for PutRFRegsetting & GetRFRegSetting BitMask */ -+#if (RTL92SE_FPGA_VERIFY == 1) -+/* #define bMask12Bits 0xfff */ /* RF Reg mask bits */ -+/* #define bMask20Bits 0xfff */ /* RF Reg mask bits T65 RF */ -+#define bRFRegOffsetMask 0xfff -+#else -+/* #define bMask12Bits 0xfffff */ /* RF Reg mask bits */ -+/* #define bMask20Bits 0xfffff */ /* RF Reg mask bits T65 RF */ -+#define bRFRegOffsetMask 0xfffff -+#endif -+#define bEnable 0x1 /* Useless */ -+#define bDisable 0x0 -+ -+#define LeftAntenna 0x0 /* Useless */ -+#define RightAntenna 0x1 -+ -+#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -+#define tUpdateRxCounter 100 /* 100ms */ -+ -+#define rateCCK 0 /* Useless */ -+#define rateOFDM 1 -+#define rateHT 2 -+ -+/* define Register-End */ -+#define bPMAC_End 0x1ff /* Useless */ -+#define bFPGAPHY0_End 0x8ff -+#define bFPGAPHY1_End 0x9ff -+#define bCCKPHY0_End 0xaff -+#define bOFDMPHY0_End 0xcff -+#define bOFDMPHY1_End 0xdff -+ -+/* define max debug item in each debug page -+ * #define bMaxItem_FPGA_PHY0 0x9 -+ * #define bMaxItem_FPGA_PHY1 0x3 -+ * #define bMaxItem_PHY_11B 0x16 -+ * #define bMaxItem_OFDM_PHY0 0x29 -+ * #define bMaxItem_OFDM_PHY1 0x0 */ -+ -+#define bPMACControl 0x0 /* Useless */ -+#define bWMACControl 0x1 -+#define bWNICControl 0x2 -+ -+#if 0 -+#define ANTENNA_A 0x1 /* Useless */ -+#define ANTENNA_B 0x2 -+#define ANTENNA_AB 0x3 /* ANTENNA_A | ANTENNA_B */ -+ -+#define ANTENNA_C 0x4 -+#define ANTENNA_D 0x8 -+#endif -+ -+#define RCR_AAP BIT(0) /* accept all physical address */ -+#define RCR_APM BIT(1) /* accept physical match */ -+#define RCR_AM BIT(2) /* accept multicast */ -+#define RCR_AB BIT(3) /* accept broadcast */ -+#define RCR_ACRC32 BIT(5) /* accept error packet */ -+#define RCR_9356SEL BIT(6) -+#define RCR_AICV BIT(9) /* Accept ICV error packet */ -+#define RCR_RXFTH0 (BIT(13) | BIT(14) | BIT(15)) /* Rx FIFO threshold */ -+#define RCR_ADF BIT(18) /* Accept Data(frame type) frame */ -+#define RCR_ACF BIT(19) /* Accept control frame */ -+#define RCR_AMF BIT(20) /* Accept management frame */ -+#define RCR_ADD3 BIT(21) -+#define RCR_APWRMGT BIT(22) /* Accept power management packet */ -+#define RCR_CBSSID BIT(23) /* Accept BSSID match packet */ -+#define RCR_ENMARP BIT(28) /* enable mac auto reset phy */ -+#define RCR_EnCS1 BIT(29) /* enable carrier sense method 1 */ -+#define RCR_EnCS2 BIT(30) /* enable carrier sense method 2 */ -+#define RCR_OnlyErlPkt BIT(31) /* Rx Early mode is performed for packet size greater than 1536 */ -+ -+/*--------------------------Define Parameters-------------------------------*/ -+ -+ -+#endif /* __INC_HAL8192SPHYREG_H */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_odm.h b/drivers/staging/rtl8723cs/include/rtw_odm.h -new file mode 100644 -index 000000000000..515b9583be39 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_odm.h -@@ -0,0 +1,103 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_ODM_H__ -+#define __RTW_ODM_H__ -+ -+#include -+#include "../hal/phydm/phydm_types.h" -+/* -+* This file provides utilities/wrappers for rtw driver to use ODM -+*/ -+typedef enum _HAL_PHYDM_OPS { -+ HAL_PHYDM_DIS_ALL_FUNC, -+ HAL_PHYDM_FUNC_SET, -+ HAL_PHYDM_FUNC_CLR, -+ HAL_PHYDM_ABILITY_BK, -+ HAL_PHYDM_ABILITY_RESTORE, -+ HAL_PHYDM_ABILITY_SET, -+ HAL_PHYDM_ABILITY_GET, -+} HAL_PHYDM_OPS; -+ -+ -+#define DYNAMIC_FUNC_DISABLE (0x0) -+ u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability); -+ -+#define rtw_phydm_func_disable_all(adapter) \ -+ rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0) -+ -+#ifdef CONFIG_RTW_ACS -+#define rtw_phydm_func_for_offchannel(adapter) \ -+ do { \ -+ rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \ -+ if (rtw_odm_adaptivity_needed(adapter)) \ -+ rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \ -+ if (IS_ACS_ENABLE(adapter))\ -+ rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ENV_MONITOR); \ -+ } while (0) -+#else -+#define rtw_phydm_func_for_offchannel(adapter) \ -+ do { \ -+ rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \ -+ if (rtw_odm_adaptivity_needed(adapter)) \ -+ rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \ -+ } while (0) -+#endif -+ -+#define rtw_phydm_func_clr(adapter, ability) \ -+ rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_CLR, ability) -+ -+#define rtw_phydm_ability_backup(adapter) \ -+ rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_BK, 0) -+ -+#define rtw_phydm_ability_restore(adapter) \ -+ rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_RESTORE, 0) -+ -+ -+static inline u32 rtw_phydm_ability_get(_adapter *adapter) -+{ -+ return rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_GET, 0); -+} -+ -+ -+void rtw_odm_init_ic_type(_adapter *adapter); -+ -+void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter); -+ -+bool rtw_odm_adaptivity_needed(_adapter *adapter); -+void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter); -+void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff); -+void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter); -+void rtw_odm_acquirespinlock(_adapter *adapter, enum rt_spinlock_type type); -+void rtw_odm_releasespinlock(_adapter *adapter, enum rt_spinlock_type type); -+ -+struct dm_struct; -+s16 rtw_odm_get_tx_power_mbm(struct dm_struct *dm, u8 rfpath, u8 rate, u8 bw, u8 cch); -+ -+#ifdef CONFIG_DFS_MASTER -+void rtw_odm_radar_detect_reset(_adapter *adapter); -+void rtw_odm_radar_detect_disable(_adapter *adapter); -+void rtw_odm_radar_detect_enable(_adapter *adapter); -+BOOLEAN rtw_odm_radar_detect(_adapter *adapter); -+void rtw_odm_update_dfs_region(struct dvobj_priv *dvobj); -+u8 rtw_odm_radar_detect_polling_int_ms(struct dvobj_priv *dvobj); -+#endif /* CONFIG_DFS_MASTER */ -+ -+void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys); -+ -+#if defined(CONFIG_RTL8822C) && defined(CONFIG_LPS_PG) -+void odm_lps_pg_debug_8822c(void *dm_void); -+#endif -+ -+#endif /* __RTW_ODM_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_p2p.h b/drivers/staging/rtl8723cs/include/rtw_p2p.h -new file mode 100644 -index 000000000000..8d929ad61c43 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_p2p.h -@@ -0,0 +1,167 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_P2P_H_ -+#define __RTW_P2P_H_ -+ -+ -+u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 *pssid, u8 ussidlen, u8 *pdev_raddr); -+u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code); -+u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+#ifdef CONFIG_WFD -+int rtw_init_wifi_display_info(_adapter *padapter); -+void rtw_wfd_enable(_adapter *adapter, bool on); -+void rtw_wfd_set_ctrl_port(_adapter *adapter, u16 port); -+void rtw_tdls_wfd_enable(_adapter *adapter, bool on); -+ -+u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunneled); -+u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -+ -+u32 rtw_append_beacon_wfd_ie(_adapter *adapter, u8 *pbuf); -+u32 rtw_append_probe_req_wfd_ie(_adapter *adapter, u8 *pbuf); -+u32 rtw_append_probe_resp_wfd_ie(_adapter *adapter, u8 *pbuf); -+u32 rtw_append_assoc_req_wfd_ie(_adapter *adapter, u8 *pbuf); -+u32 rtw_append_assoc_resp_wfd_ie(_adapter *adapter, u8 *pbuf); -+#endif /*CONFIG_WFD */ -+ -+void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe); -+ -+u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -+u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta); -+u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -+u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -+u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -+u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe); -+u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -+u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -+u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -+u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -+int process_p2p_cross_connect_ie(PADAPTER padapter, u8 *IEs, u32 IELength); -+ -+s32 p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf); -+ -+#ifdef CONFIG_P2P_PS -+void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength); -+void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state); -+u8 p2p_ps_wk_cmd(_adapter *padapter, u8 p2p_ps_state, u8 enqueue); -+#endif /* CONFIG_P2P_PS */ -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+void reset_global_wifidirect_info(_adapter *padapter); -+void rtw_init_wifidirect_timers(_adapter *padapter); -+void rtw_init_wifidirect_addrs(_adapter *padapter, u8 *dev_addr, u8 *iface_addr); -+void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role); -+int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role); -+ -+static inline void _rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) -+{ -+ if (wdinfo->p2p_state != state) { -+ /* wdinfo->pre_p2p_state = wdinfo->p2p_state; */ -+ wdinfo->p2p_state = state; -+ } -+} -+static inline void _rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) -+{ -+ if (wdinfo->pre_p2p_state != state) -+ wdinfo->pre_p2p_state = state; -+} -+#if 0 -+static inline void _rtw_p2p_restore_state(struct wifidirect_info *wdinfo) -+{ -+ if (wdinfo->pre_p2p_state != -1) { -+ wdinfo->p2p_state = wdinfo->pre_p2p_state; -+ wdinfo->pre_p2p_state = -1; -+ } -+} -+#endif -+void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role); -+ -+static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo) -+{ -+ return wdinfo->p2p_state; -+} -+static inline int _rtw_p2p_pre_state(struct wifidirect_info *wdinfo) -+{ -+ return wdinfo->pre_p2p_state; -+} -+static inline int _rtw_p2p_role(struct wifidirect_info *wdinfo) -+{ -+ return wdinfo->role; -+} -+static inline bool _rtw_p2p_chk_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) -+{ -+ return wdinfo->p2p_state == state; -+} -+static inline bool _rtw_p2p_chk_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) -+{ -+ return wdinfo->role == role; -+} -+ -+#ifdef CONFIG_DBG_P2P -+void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); -+void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); -+/* void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line); */ -+void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line); -+#define rtw_p2p_set_state(wdinfo, state) dbg_rtw_p2p_set_state(wdinfo, state, __FUNCTION__, __LINE__) -+#define rtw_p2p_set_pre_state(wdinfo, state) dbg_rtw_p2p_set_pre_state(wdinfo, state, __FUNCTION__, __LINE__) -+#define rtw_p2p_set_role(wdinfo, role) dbg_rtw_p2p_set_role(wdinfo, role, __FUNCTION__, __LINE__) -+/* #define rtw_p2p_restore_state(wdinfo) dbg_rtw_p2p_restore_state(wdinfo, __FUNCTION__, __LINE__) */ -+#else /* CONFIG_DBG_P2P */ -+#define rtw_p2p_set_state(wdinfo, state) _rtw_p2p_set_state(wdinfo, state) -+#define rtw_p2p_set_pre_state(wdinfo, state) _rtw_p2p_set_pre_state(wdinfo, state) -+#define rtw_p2p_set_role(wdinfo, role) _rtw_p2p_set_role(wdinfo, role) -+/* #define rtw_p2p_restore_state(wdinfo) _rtw_p2p_restore_state(wdinfo) */ -+#endif /* CONFIG_DBG_P2P */ -+ -+#define rtw_p2p_state(wdinfo) _rtw_p2p_state(wdinfo) -+#define rtw_p2p_pre_state(wdinfo) _rtw_p2p_pre_state(wdinfo) -+#define rtw_p2p_role(wdinfo) _rtw_p2p_role(wdinfo) -+#define rtw_p2p_chk_state(wdinfo, state) _rtw_p2p_chk_state(wdinfo, state) -+#define rtw_p2p_chk_role(wdinfo, role) _rtw_p2p_chk_role(wdinfo, role) -+ -+#define rtw_p2p_findphase_ex_set(wdinfo, value) \ -+ (wdinfo)->find_phase_state_exchange_cnt = (value) -+ -+#ifdef CONFIG_P2P -+/* is this find phase exchange for social channel scan? */ -+#define rtw_p2p_findphase_ex_is_social(wdinfo) \ -+ (wdinfo)->find_phase_state_exchange_cnt >= P2P_FINDPHASE_EX_SOCIAL_FIRST -+ -+/* should we need find phase exchange anymore? */ -+#define rtw_p2p_findphase_ex_is_needed(wdinfo) \ -+ ((wdinfo)->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_MAX && \ -+ (wdinfo)->find_phase_state_exchange_cnt != P2P_FINDPHASE_EX_NONE && \ -+ !(wdinfo)->rx_invitereq_info.scan_op_ch_only && \ -+ !(wdinfo)->p2p_info.scan_op_ch_only) -+#else -+#define rtw_p2p_findphase_ex_is_social(wdinfo) 0 -+#define rtw_p2p_findphase_ex_is_needed(wdinfo) 0 -+#endif /* CONFIG_P2P */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_pwrctrl.h b/drivers/staging/rtl8723cs/include/rtw_pwrctrl.h -new file mode 100644 -index 000000000000..38bad0a51d33 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_pwrctrl.h -@@ -0,0 +1,772 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_PWRCTRL_H_ -+#define __RTW_PWRCTRL_H_ -+ -+ -+#define FW_PWR0 0 -+#define FW_PWR1 1 -+#define FW_PWR2 2 -+#define FW_PWR3 3 -+ -+ -+#define HW_PWR0 7 -+#define HW_PWR1 6 -+#define HW_PWR2 2 -+#define HW_PWR3 0 -+#define HW_PWR4 8 -+ -+#define FW_PWRMSK 0x7 -+ -+ -+#define XMIT_ALIVE BIT(0) -+#define RECV_ALIVE BIT(1) -+#define CMD_ALIVE BIT(2) -+#define EVT_ALIVE BIT(3) -+#ifdef CONFIG_BT_COEXIST -+#define BTCOEX_ALIVE BIT(4) -+#endif /* CONFIG_BT_COEXIST */ -+#define LPS_ALIVE BIT(5) -+ -+#ifdef CONFIG_WOWLAN -+ #ifdef CONFIG_PLATFORM_ANDROID_INTEL_X86 -+ /* TCP/ICMP/UDP multicast with specific IP addr */ -+ #define DEFAULT_PATTERN_NUM 4 -+ #else -+ /* TCP/ICMP */ -+ #define DEFAULT_PATTERN_NUM 3 -+ #endif -+ -+#ifdef CONFIG_WOW_PATTERN_HW_CAM /* Frame Mask Cam number for pattern match */ -+#define MAX_WKFM_CAM_NUM 12 -+#else -+#define MAX_WKFM_CAM_NUM 16 -+#endif -+ -+#define MAX_WKFM_SIZE 16 /* (16 bytes for WKFM bit mask, 16*8 = 128 bits) */ -+#define MAX_WKFM_PATTERN_SIZE 128 -+#define MAX_IN_PATTERN_SIZE 512 -+ -+/* -+ * MAX_WKFM_PATTERN_STR_LEN : the max. length of wow pattern string -+ * e.g. echo 00:01:02:...:7f > /proc/net/rtl88x2bu/wlan0/wow_pattern_info -+ * - each byte of pattern is represented as 2-bytes ascii : MAX_WKFM_PATTERN_SIZE * 2 -+ * - the number of common ':' in pattern string : MAX_WKFM_PATTERN_SIZE - 1 -+ * - 1 byte '\n'(0x0a) is generated at the end when we use echo command -+ * so total max. length is (MAX_WKFM_PATTERN_SIZE * 3) -+ */ -+#define MAX_WKFM_PATTERN_STR_LEN (MAX_WKFM_PATTERN_SIZE * 3) -+ -+#define WKFMCAM_ADDR_NUM 6 -+#define WKFMCAM_SIZE 24 /* each entry need 6*4 bytes */ -+enum pattern_type { -+ PATTERN_BROADCAST = 0, -+ PATTERN_MULTICAST, -+ PATTERN_UNICAST, -+ PATTERN_VALID, -+ PATTERN_INVALID, -+}; -+ -+typedef struct rtl_priv_pattern { -+ int len; -+ char content[MAX_WKFM_PATTERN_SIZE]; -+ char mask[MAX_WKFM_SIZE]; -+} rtl_priv_pattern_t; -+ -+#endif /* CONFIG_WOWLAN */ -+ -+enum Power_Mgnt { -+ PS_MODE_ACTIVE = 0 , -+ PS_MODE_MIN , -+ PS_MODE_MAX , -+ PS_MODE_DTIM , /* PS_MODE_SELF_DEFINED */ -+ PS_MODE_VOIP , -+ PS_MODE_UAPSD_WMM , -+ PS_MODE_UAPSD , -+ PS_MODE_IBSS , -+ PS_MODE_WWLAN , -+ PM_Radio_Off , -+ PM_Card_Disable , -+ PS_MODE_NUM, -+}; -+ -+enum lps_level { -+ LPS_NORMAL = 0, -+ LPS_LCLK, -+ LPS_PG, -+ LPS_LEVEL_MAX, -+}; -+ -+#ifdef CONFIG_PNO_SUPPORT -+#define MAX_PNO_LIST_COUNT 16 -+#define MAX_SCAN_LIST_COUNT 14 /* 2.4G only */ -+#define MAX_HIDDEN_AP 8 /* 8 hidden AP */ -+#endif -+ -+/* -+ BIT[2:0] = HW state -+ BIT[3] = Protocol PS state, 0: register active state , 1: register sleep state -+ BIT[4] = sub-state -+*/ -+ -+#define PS_DPS BIT(0) -+#define PS_LCLK (PS_DPS) -+#define PS_RF_OFF BIT(1) -+#define PS_ALL_ON BIT(2) -+#define PS_ST_ACTIVE BIT(3) -+ -+#define PS_ISR_ENABLE BIT(4) -+#define PS_IMR_ENABLE BIT(5) -+#define PS_ACK BIT(6) -+#define PS_TOGGLE BIT(7) -+ -+#define PS_STATE_MASK (0x0F) -+#define PS_STATE_HW_MASK (0x07) -+#define PS_SEQ_MASK (0xc0) -+ -+#define PS_STATE(x) (PS_STATE_MASK & (x)) -+#define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x)) -+#define PS_SEQ(x) (PS_SEQ_MASK & (x)) -+ -+#define PS_STATE_S0 (PS_DPS) -+#define PS_STATE_S1 (PS_LCLK) -+#define PS_STATE_S2 (PS_RF_OFF) -+#define PS_STATE_S3 (PS_ALL_ON) -+#define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON)) -+ -+ -+#define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON)) -+#define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE)) -+#define CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) -+ -+ -+struct reportpwrstate_parm { -+ unsigned char mode; -+ unsigned char state; /* the CPWM value */ -+ unsigned short rsvd; -+}; -+ -+ -+typedef _sema _pwrlock; -+ -+ -+__inline static void _init_pwrlock(_pwrlock *plock) -+{ -+ _rtw_init_sema(plock, 1); -+} -+ -+__inline static void _free_pwrlock(_pwrlock *plock) -+{ -+ _rtw_free_sema(plock); -+} -+ -+ -+__inline static void _enter_pwrlock(_pwrlock *plock) -+{ -+ _rtw_down_sema(plock); -+} -+ -+ -+__inline static void _exit_pwrlock(_pwrlock *plock) -+{ -+ _rtw_up_sema(plock); -+} -+ -+#define LPS_DELAY_MS 1000 /* 1 sec */ -+ -+#define EXE_PWR_NONE 0x01 -+#define EXE_PWR_IPS 0x02 -+#define EXE_PWR_LPS 0x04 -+ -+/* RF state. */ -+typedef enum _rt_rf_power_state { -+ rf_on, /* RF is on after RFSleep or RFOff */ -+ rf_sleep, /* 802.11 Power Save mode */ -+ rf_off, /* HW/SW Radio OFF or Inactive Power Save */ -+ /* =====Add the new RF state above this line===== */ -+ rf_max -+} rt_rf_power_state; -+ -+/* ASPM OSC Control bit, added by Roger, 2013.03.29. */ -+#define RT_PCI_ASPM_OSC_IGNORE 0 /* PCI ASPM ignore OSC control in default */ -+#define RT_PCI_ASPM_OSC_ENABLE BIT0 /* PCI ASPM controlled by OS according to ACPI Spec 5.0 */ -+#define RT_PCI_ASPM_OSC_DISABLE BIT1 /* PCI ASPM controlled by driver or BIOS, i.e., force enable ASPM */ -+ -+ -+enum _PS_BBRegBackup_ { -+ PSBBREG_RF0 = 0, -+ PSBBREG_RF1, -+ PSBBREG_RF2, -+ PSBBREG_AFE0, -+ PSBBREG_TOTALCNT -+}; -+ -+enum { /* for ips_mode */ -+ IPS_NONE = 0, -+ IPS_NORMAL, -+ IPS_LEVEL_2, -+ IPS_NUM -+}; -+ -+/* Design for pwrctrl_priv.ips_deny, 32 bits for 32 reasons at most */ -+typedef enum _PS_DENY_REASON { -+ PS_DENY_DRV_INITIAL = 0, -+ PS_DENY_SCAN, -+ PS_DENY_JOIN, -+ PS_DENY_DISCONNECT, -+ PS_DENY_SUSPEND, -+ PS_DENY_IOCTL, -+ PS_DENY_MGNT_TX, -+ PS_DENY_MONITOR_MODE, -+ PS_DENY_BEAMFORMING, /* Beamforming */ -+ PS_DENY_DRV_REMOVE = 30, -+ PS_DENY_OTHERS = 31 -+} PS_DENY_REASON; -+ -+#ifdef CONFIG_WAR_OFFLOAD -+/* only support mDNS V4/V6 rsp now */ -+enum { -+ WAR_ARP_RSP_EN = 0x0000001, -+ WAR_ICMPV6_NS_RSP_EN = 0x00000002, -+ WAR_ICMPV4_ECHO_RSP_EN = 0x00000004, -+ WAR_ICMPV6_ECHO_RSP_EN = 0x00000008, -+ WAR_NETBIOS_RSP_EN = 0x00000010, -+ WAR_LLMNR_V4_RSP_EN = 0x00000020, -+ WAR_LLMNR_V6_RSP_EN = 0x00000040, -+ WAR_SNMP_V4_RSP_EN = 0x00000080, -+ WAR_SNMP_V6_RSP_EN = 0x00000100, -+ WAR_SNMP_V4_WAKEUP_EN = 0x00000200, -+ WAR_SNMP_V6_WAKEUP_EN = 0x00000400, -+ WAR_SSDP_V4_WAKEUP_EN = 0x00000800, -+ WAR_SSDP_V6_WAKEUP_EN = 0x00001000, -+ WAR_WSD_V4_WAKEUP_EN = 0x00002000, -+ WAR_WSD_V6_WAKEUP_EN = 0x00004000, -+ WAR_SLP_V4_WAKEUP_EN = 0x00008000, -+ WAR_SLP_V6_WAKEUP_EN = 0x00010000, -+ WAR_MDNS_V4_RSP_EN = 0x00020000, -+ WAR_MDNS_V6_RSP_EN = 0x00040000, -+ WAR_DESIGNATED_MAC_EN = 0x00080000, -+ WAR_LLTD_WAKEUP_EN = 0x00100000, -+ WAR_ARP_WAKEUP_EN = 0x00200000, -+ WAR_MAGIC_WAKEUP_EN = 0x00400000, -+ WAR_MDNS_V4_WAKEUP_EN = 0x000800000, -+ WAR_MDNS_V6_WAKEUP_EN = 0x001000000 -+}; -+ -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+#ifdef CONFIG_PNO_SUPPORT -+typedef struct pno_nlo_info { -+ u32 fast_scan_period; /* Fast scan period */ -+ u8 ssid_num; /* number of entry */ -+ u8 hidden_ssid_num; -+ u32 slow_scan_period; /* slow scan period */ -+ u32 fast_scan_iterations; /* Fast scan iterations */ -+ u8 ssid_length[MAX_PNO_LIST_COUNT]; /* SSID Length Array */ -+ u8 ssid_cipher_info[MAX_PNO_LIST_COUNT]; /* Cipher information for security */ -+ u8 ssid_channel_info[MAX_PNO_LIST_COUNT]; /* channel information */ -+ u8 loc_probe_req[MAX_HIDDEN_AP]; /* loc_probeReq */ -+} pno_nlo_info_t; -+ -+typedef struct pno_ssid { -+ u32 SSID_len; -+ u8 SSID[32]; -+} pno_ssid_t; -+ -+typedef struct pno_ssid_list { -+ pno_ssid_t node[MAX_PNO_LIST_COUNT]; -+} pno_ssid_list_t; -+ -+typedef struct pno_scan_channel_info { -+ u8 channel; -+ u8 tx_power; -+ u8 timeout; -+ u8 active; /* set 1 means active scan, or pasivite scan. */ -+} pno_scan_channel_info_t; -+ -+typedef struct pno_scan_info { -+ u8 enableRFE; /* Enable RFE */ -+ u8 period_scan_time; /* exclusive with fast_scan_period and slow_scan_period */ -+ u8 periodScan; /* exclusive with fast_scan_period and slow_scan_period */ -+ u8 orig_80_offset; /* original channel 80 offset */ -+ u8 orig_40_offset; /* original channel 40 offset */ -+ u8 orig_bw; /* original bandwidth */ -+ u8 orig_ch; /* original channel */ -+ u8 channel_num; /* number of channel */ -+ u64 rfe_type; /* rfe_type && 0x00000000000000ff */ -+ pno_scan_channel_info_t ssid_channel_info[MAX_SCAN_LIST_COUNT]; -+} pno_scan_info_t; -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+#ifdef CONFIG_LPS_POFF -+/* Driver context for LPS 32K Close IO Power */ -+typedef struct lps_poff_info { -+ bool bEn; -+ u8 *pStaticFile; -+ u8 *pDynamicFile; -+ u32 ConfFileOffset; -+ u32 tx_bndy_static; -+ u32 tx_bndy_dynamic; -+ u16 ConfLenForPTK; -+ u16 ConfLenForGTK; -+ ATOMIC_T bEnterPOFF; -+ ATOMIC_T bTxBoundInProgress; -+ ATOMIC_T bSetPOFFParm; -+} lps_poff_info_t; -+#endif /*CONFIG_LPS_POFF*/ -+ -+struct aoac_report { -+ u8 iv[8]; -+ u8 replay_counter_eapol_key[8]; -+ u8 group_key[32]; -+ u8 key_index; -+ u8 security_type; -+ u8 wow_pattern_idx; -+ u8 version_info; -+ u8 rekey_ok:1; -+ u8 dummy:7; -+ u8 reserved[3]; -+ u8 rxptk_iv[8]; -+ u8 rxgtk_iv[4][8]; -+}; -+ -+#ifdef CONFIG_WAR_OFFLOAD -+ -+struct war_ipv4_fmt { -+ u32 ip_addr[4]; -+ u32 ip_subnet[4]; -+ u32 ip_gateway[4]; -+}; -+ -+struct war_ipv6_fmt { -+ u8 ipv6_addr[8][16]; -+}; -+ -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+/* limitation of mDNS parameter : length and number */ -+#define MAX_MDNS_SERVICE_NAME_LEN 15 -+#define MAX_MDNS_TRANS_LEN 4 /* _tcp or _udp */ -+#define MAX_MDNS_DOMAIN_LEN 5 /* local only for mdns */ -+#define MAX_MDNS_MACHINE_NAME_LEN (63+1) /* +1 for the length byte used by the DNS format */ -+#define MAX_MDNS_TARGET_LEN 63 -+#define MAX_MDNS_DOMAIN_NAME_LEN 63 -+#define MAX_MDNS_TXT_LEN 1536 -+#define MAX_MDNS_TXT_SINGLE_LEN 255 -+ -+ -+#define MAX_MDNS_SERVICE_NUM 10 -+#define MAX_MDNS_TXT_NUM 8 -+#define MAX_MDNS_MACHINE_NAME_NUM 3 -+ -+/* for monitor rsvd page using */ -+#define MAX_MDNS_PARA_SIZE 1700 // 14*128 = 1792 -+#define MAX_MDNS_TXT_TOTAL_SIZE 10*MAX_MDNS_TXT_LEN -+#define MAX_MDNS_RSP_PKT_SIZE 760 // 6*128 = 768 -+ -+#define RTW_MDNS_SRV_INFO(sname, sname_len, tname, tname_len, dname, dname_len, port0, port1, ttlv, tar, tar_len, idx) \ -+ { .service=sname, .service_len=sname_len, .transport=tname, .transport_len=tname_len, \ -+ .domain=dname , .domain_len=dname_len , .port[0]=port0, .port[1]=port1, .ttl=ttlv, \ -+ .target=tar, .target_len=tar_len, .txt_rsp_idx=idx } -+ -+ -+struct war_mdns_service_info { -+ u8 service[MAX_MDNS_SERVICE_NAME_LEN+1]; -+ u8 service_len; -+ u8 transport[MAX_MDNS_TRANS_LEN+1]; -+ u8 transport_len; -+ u8 domain[MAX_MDNS_DOMAIN_LEN+1]; -+ u8 domain_len; -+ u8 port[2]; -+ u32 ttl; -+ u8 target[MAX_MDNS_TARGET_LEN+1]; -+ u8 target_len; -+ s8 txt_rsp_idx; -+}; -+ -+struct war_mdns_machine_name { -+ u8 name[MAX_MDNS_MACHINE_NAME_LEN]; -+ u8 name_len; -+}; -+ -+struct war_mdns_txt_rsp { -+ u8 txt[MAX_MDNS_TXT_LEN]; -+ u16 txt_len; -+}; -+#endif -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+ -+struct rsvd_page_cache_t; -+ -+struct pwrctrl_priv { -+ _pwrlock lock; -+ _pwrlock check_32k_lock; -+ volatile u8 rpwm; /* requested power state for fw */ -+ volatile u8 cpwm; /* fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */ -+ volatile u8 tog; /* toggling */ -+ volatile u8 cpwm_tog; /* toggling */ -+ u8 rpwm_retry; -+ -+ u8 pwr_mode; -+ u8 smart_ps; -+ u8 bcn_ant_mode; -+ u8 dtim; -+#ifdef CONFIG_LPS_CHK_BY_TP -+ u8 lps_chk_by_tp; -+ u16 lps_tx_tp_th;/*Mbps*/ -+ u16 lps_rx_tp_th;/*Mbps*/ -+ u16 lps_bi_tp_th;/*Mbps*//*TRX TP*/ -+ int lps_chk_cnt_th; -+ int lps_chk_cnt; -+ u32 lps_tx_pkts; -+ u32 lps_rx_pkts; -+ -+#endif -+ -+#ifdef CONFIG_WMMPS_STA -+ u8 wmm_smart_ps; -+#endif /* CONFIG_WMMPS_STA */ -+ -+ u32 alives; -+ _workitem cpwm_event; -+ _workitem dma_event; /*for handle un-synchronized tx dma*/ -+#ifdef CONFIG_LPS_RPWM_TIMER -+ u8 brpwmtimeout; -+ _workitem rpwmtimeoutwi; -+ _timer pwr_rpwm_timer; -+#endif /* CONFIG_LPS_RPWM_TIMER */ -+ u8 bpower_saving; /* for LPS/IPS */ -+ -+ u8 b_hw_radio_off; -+ u8 reg_rfoff; -+ u8 reg_pdnmode; /* powerdown mode */ -+ u32 rfoff_reason; -+ -+ uint ips_enter_cnts; -+ uint ips_leave_cnts; -+ uint lps_enter_cnts; -+ uint lps_leave_cnts; -+ -+ u8 ips_mode; -+ u8 ips_org_mode; -+ u8 ips_mode_req; /* used to accept the mode setting request, will update to ipsmode later */ -+ uint bips_processing; -+ systime ips_deny_time; /* will deny IPS when system time is smaller than this */ -+ u8 pre_ips_type;/* 0: default flow, 1: carddisbale flow */ -+ -+ /* ps_deny: if 0, power save is free to go; otherwise deny all kinds of power save. */ -+ /* Use PS_DENY_REASON to decide reason. */ -+ /* Don't access this variable directly without control function, */ -+ /* and this variable should be protected by lock. */ -+ u32 ps_deny; -+ -+ u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */ -+ -+ u8 fw_psmode_iface_id; -+ u8 bLeisurePs; -+ u8 LpsIdleCount; -+ u8 power_mgnt; -+ u8 org_power_mgnt; -+ u8 bFwCurrentInPSMode; -+ systime lps_deny_time; /* will deny LPS when system time is smaller than this */ -+ s32 pnp_current_pwr_state; -+ u8 pnp_bstop_trx; -+ u8 bInSuspend; -+#ifdef CONFIG_BT_COEXIST -+ u8 bAutoResume; -+ u8 autopm_cnt; -+#endif -+ u8 bSupportRemoteWakeup; -+ u8 wowlan_wake_reason; -+ u8 wowlan_last_wake_reason; -+ u8 wowlan_ap_mode; -+ u8 wowlan_mode; -+ u8 wowlan_p2p_mode; -+ u8 wowlan_pno_enable; -+ u8 wowlan_in_resume; -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ u8 is_high_active; -+ u8 wowlan_gpio_index; -+ u8 wowlan_gpio_output_state; -+#endif /* CONFIG_GPIO_WAKEUP */ -+ u8 hst2dev_high_active; -+#ifdef CONFIG_WOWLAN -+ bool default_patterns_en; -+#ifdef CONFIG_IPV6 -+ u8 wowlan_ns_offload_en; -+#endif /*CONFIG_IPV6*/ -+ u8 wowlan_txpause_status; -+ u8 wowlan_pattern_idx; -+ u64 wowlan_fw_iv; -+ struct rtl_priv_pattern patterns[MAX_WKFM_CAM_NUM]; -+#ifdef CONFIG_PNO_SUPPORT -+ u8 pno_inited; -+ pno_nlo_info_t *pnlo_info; -+ pno_scan_info_t *pscan_info; -+ pno_ssid_list_t *pno_ssid_list; -+#endif /* CONFIG_PNO_SUPPORT */ -+#ifdef CONFIG_WOW_PATTERN_HW_CAM -+ _mutex wowlan_pattern_cam_mutex; -+#endif -+ u8 wowlan_aoac_rpt_loc; -+ struct aoac_report wowlan_aoac_rpt; -+ u8 wowlan_power_mgmt; -+ u8 wowlan_lps_level; -+ #ifdef CONFIG_LPS_1T1R -+ u8 wowlan_lps_1t1r; -+ #endif -+ -+ #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ /*data 0,rsv page location*/ -+ u8 wowlan_keep_alive_mode; -+ u8 keep_alive_pattern_loc; -+ /*data 1 ,cam id, rx udp packet*/ -+ u8 wowlan_keep_alive_ack_index; -+ /*data 2 ,cam id, pattern match packet*/ -+ u8 wowlan_wake_pattern_index; -+ /*data3,unit: TBTT*/ -+ u16 wowlan_keep_alive_period; -+ /*data4,unit: TBTT*/ -+ u8 wowlan_keep_alive_retry_interval; -+ /*data5*/ -+ u8 wowlan_keep_alive_retry_counter; -+ /*from echo*/ -+ u8 keep_alive_pattern[WLAN_MAX_KEEP_ALIVE_IE_LEN]; -+ u32 keep_alive_pattern_len; -+ #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ -+#ifdef CONFIG_WAR_OFFLOAD -+ u8 wowlan_war_offload_mode; -+ u32 wowlan_war_offload_ctrl; -+ struct war_ipv4_fmt wowlan_war_offload_ipv4; -+ struct war_ipv6_fmt wowlan_war_offload_ipv6; -+ u8 wowlan_war_offload_mac[6]; -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+ struct war_mdns_machine_name wowlan_war_offload_mdns_mnane[MAX_MDNS_MACHINE_NAME_NUM]; -+ struct war_mdns_service_info wowlan_war_offload_mdns_service[MAX_MDNS_SERVICE_NUM]; -+ struct war_mdns_txt_rsp wowlan_war_offload_mdns_txt_rsp[MAX_MDNS_TXT_NUM]; -+ u8 wowlan_war_offload_mdns_mnane_num; -+ u8 wowlan_war_offload_mdns_service_info_num; -+ u8 wowlan_war_offload_mdns_txt_rsp_num; -+ u8 wowlan_war_offload_mdns_domain_name[MAX_MDNS_DOMAIN_NAME_LEN+1]; -+ u8 wowlan_war_offload_mdns_domain_name_len; -+ u32 wowlan_war_offload_mdns_para_cur_size; -+ u32 wowlan_war_offload_mdns_rsp_cur_size; -+#endif /* CONFIG_OFFLOAD_MDNS_V4 || CONFIG_OFFLOAD_MDNS_V6 */ -+#endif /* CONFIG_WAR_OFFLOAD */ -+#endif /* CONFIG_WOWLAN */ -+ _timer pwr_state_check_timer; -+ int pwr_state_check_interval; -+ u8 pwr_state_check_cnts; -+ -+ -+ rt_rf_power_state rf_pwrstate;/* cur power state, only for IPS */ -+ /* rt_rf_power_state current_rfpwrstate; */ -+ rt_rf_power_state change_rfpwrstate; -+ -+ u8 bHWPowerdown; /* power down mode selection. 0:radio off, 1:power down */ -+ u8 bHWPwrPindetect; /* come from registrypriv.hwpwrp_detect. enable power down function. 0:disable, 1:enable */ -+ u8 bkeepfwalive; -+ u8 brfoffbyhw; -+ unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT]; -+ -+#ifdef CONFIG_RESUME_IN_WORKQUEUE -+ struct workqueue_struct *rtw_workqueue; -+ _workitem resume_work; -+#endif -+ -+#ifdef CONFIG_HAS_EARLYSUSPEND -+ struct early_suspend early_suspend; -+ u8 do_late_resume; -+#endif /* CONFIG_HAS_EARLYSUSPEND */ -+ -+#ifdef CONFIG_ANDROID_POWER -+ android_early_suspend_t early_suspend; -+ u8 do_late_resume; -+#endif -+ -+#ifdef CONFIG_LPS_POFF -+ lps_poff_info_t *plps_poff_info; -+#endif -+ u8 lps_level_bk; -+ u8 lps_level; /*LPS_NORMAL,LPA_CG,LPS_PG*/ -+#ifdef CONFIG_LPS_1T1R -+ u8 lps_1t1r_bk; -+ u8 lps_1t1r; -+#endif -+#ifdef CONFIG_LPS_PG -+ struct rsvd_page_cache_t lpspg_info; -+#ifdef CONFIG_RTL8822C -+ struct rsvd_page_cache_t lpspg_dpk_info; -+ struct rsvd_page_cache_t lpspg_iqk_info; -+#endif -+#endif -+ u8 current_lps_hw_port_id; -+ -+#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS -+ systime radio_on_start_time; -+ systime pwr_saving_start_time; -+ u32 pwr_saving_time; -+ u32 on_time; -+ u32 tx_time; -+ u32 rx_time; -+#endif /* CONFIG_RTW_CFGVENDOR_LLSTATS */ -+ -+#ifdef CONFIG_LPS_ACK -+ struct submit_ctx lps_ack_sctx; -+ s8 lps_ack_status; -+ _mutex lps_ack_mutex; -+#endif /* CONFIG_LPS_ACK */ -+}; -+ -+#define rtw_get_ips_mode_req(pwrctl) \ -+ (pwrctl)->ips_mode_req -+ -+#define rtw_ips_mode_req(pwrctl, ips_mode) \ -+ (pwrctl)->ips_mode_req = (ips_mode) -+ -+#define RTW_PWR_STATE_CHK_INTERVAL 2000 -+ -+#define _rtw_set_pwr_state_check_timer(pwrctl, ms) \ -+ do { \ -+ /*RTW_INFO("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __FUNCTION__, (pwrctl), (ms));*/ \ -+ _set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \ -+ } while (0) -+ -+#define rtw_set_pwr_state_check_timer(pwrctl) \ -+ _rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval) -+ -+extern void rtw_init_pwrctrl_priv(_adapter *adapter); -+extern void rtw_free_pwrctrl_priv(_adapter *adapter); -+ -+#ifdef CONFIG_LPS_LCLK -+s32 rtw_register_task_alive(PADAPTER, u32 task); -+void rtw_unregister_task_alive(PADAPTER, u32 task); -+extern s32 rtw_register_tx_alive(PADAPTER padapter); -+extern void rtw_unregister_tx_alive(PADAPTER padapter); -+extern s32 rtw_register_rx_alive(PADAPTER padapter); -+extern void rtw_unregister_rx_alive(PADAPTER padapter); -+extern s32 rtw_register_cmd_alive(PADAPTER padapter); -+extern void rtw_unregister_cmd_alive(PADAPTER padapter); -+extern s32 rtw_register_evt_alive(PADAPTER padapter); -+extern void rtw_unregister_evt_alive(PADAPTER padapter); -+extern void cpwm_int_hdl(PADAPTER padapter, struct reportpwrstate_parm *preportpwrstate); -+extern void LPS_Leave_check(PADAPTER padapter); -+#endif -+ -+extern void LeaveAllPowerSaveMode(PADAPTER Adapter); -+extern void LeaveAllPowerSaveModeDirect(PADAPTER Adapter); -+#ifdef CONFIG_IPS -+void _ips_enter(_adapter *padapter); -+void ips_enter(_adapter *padapter); -+int _ips_leave(_adapter *padapter); -+int ips_leave(_adapter *padapter); -+#endif -+ -+void rtw_ps_processor(_adapter *padapter); -+ -+#ifdef SUPPORT_HW_RFOFF_DETECTED -+rt_rf_power_state RfOnOffDetect(PADAPTER pAdapter); -+#endif -+ -+ -+#ifdef DBG_CHECK_FW_PS_STATE -+int rtw_fw_ps_state(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_LPS -+extern const char * const LPS_CTRL_PHYDM; -+void LPS_Enter(PADAPTER padapter, const char *msg); -+void LPS_Leave(PADAPTER padapter, const char *msg); -+void rtw_exec_lps(_adapter *padapter, u8 ps_mode); -+void rtw_lps_rfon_ctrl(_adapter *padapter, u8 rfon_ctrl); -+#ifdef CONFIG_CHECK_LEAVE_LPS -+#ifdef CONFIG_LPS_CHK_BY_TP -+void traffic_check_for_leave_lps_by_tp(PADAPTER padapter, u8 tx, struct sta_info *sta); -+#endif -+void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets); -+#endif /*CONFIG_CHECK_LEAVE_LPS*/ -+void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg); -+void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable); -+u8 rtw_set_rpwm(_adapter *padapter, u8 val8); -+#ifdef CONFIG_WOWLAN -+void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en); -+#endif /* CONFIG_WOWLAN */ -+#endif /* CONFIG_LPS */ -+ -+#ifdef CONFIG_RESUME_IN_WORKQUEUE -+void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv); -+#endif /* CONFIG_RESUME_IN_WORKQUEUE */ -+ -+#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) -+bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv); -+bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv); -+void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable); -+void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv); -+void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv); -+#else -+#define rtw_is_earlysuspend_registered(pwrpriv) _FALSE -+#define rtw_is_do_late_resume(pwrpriv) _FALSE -+#define rtw_set_do_late_resume(pwrpriv, enable) do {} while (0) -+#define rtw_register_early_suspend(pwrpriv) do {} while (0) -+#define rtw_unregister_early_suspend(pwrpriv) do {} while (0) -+#endif /* CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER */ -+ -+u8 rtw_interface_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val); -+void rtw_set_ips_deny(_adapter *padapter, u32 ms); -+int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller); -+#define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __FUNCTION__) -+#define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __FUNCTION__) -+int rtw_pm_set_ips(_adapter *padapter, u8 mode); -+int rtw_pm_set_lps(_adapter *padapter, u8 mode); -+int rtw_pm_set_lps_level(_adapter *padapter, u8 level); -+#ifdef CONFIG_LPS_1T1R -+int rtw_pm_set_lps_1t1r(_adapter *padapter, u8 en); -+#endif -+void rtw_set_lps_deny(_adapter *adapter, u32 ms); -+#ifdef CONFIG_WOWLAN -+int rtw_pm_set_wow_lps(_adapter *padapter, u8 mode); -+int rtw_pm_set_wow_lps_level(_adapter *padapter, u8 level); -+#ifdef CONFIG_LPS_1T1R -+int rtw_pm_set_wow_lps_1t1r(_adapter *padapter, u8 en); -+#endif -+#endif /* CONFIG_WOWLAN */ -+ -+void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason); -+void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason); -+u32 rtw_ps_deny_get(PADAPTER padapter); -+ -+#if defined(CONFIG_WOWLAN) -+void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip); -+void rtw_get_sec_iv(PADAPTER padapter, u8 *pcur_dot11txpn, u8 *StaAddr); -+bool rtw_wowlan_parser_pattern_cmd(u8 *input, char *pattern, -+ int *pattern_len, char *bit_mask); -+void rtw_wow_pattern_sw_reset(_adapter *adapter); -+u8 rtw_set_default_pattern(_adapter *adapter); -+void rtw_wow_pattern_sw_dump(_adapter *adapter); -+#ifdef CONFIG_WAR_OFFLOAD -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+void rtw_wow_war_mdns_dump_buf(struct seq_file *m, u8 *title, u8 *buf, u32 len); -+void rtw_wow_war_mdns_dump_txt(struct seq_file *m, u8 *title, u8 *buf, u32 len); -+bool rtw_wow_war_mdns_parser_pattern(u8 *input, char *target, u32 *target_len, u32 max_len); -+void rtw_wow_war_mdns_parms_reset(_adapter *adapter, u8 is_set_default); -+#endif /* defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) */ -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+#endif /* CONFIG_WOWLAN */ -+void rtw_ssmps_enter(_adapter *adapter, struct sta_info *sta); -+void rtw_ssmps_leave(_adapter *adapter, struct sta_info *sta); -+#endif /* __RTL871X_PWRCTRL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_qos.h b/drivers/staging/rtl8723cs/include/rtw_qos.h -new file mode 100644 -index 000000000000..8e1d013e128f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_qos.h -@@ -0,0 +1,66 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+#ifndef _RTW_QOS_H_ -+#define _RTW_QOS_H_ -+ -+#define DRV_CFG_UAPSD_VO BIT0 -+#define DRV_CFG_UAPSD_VI BIT1 -+#define DRV_CFG_UAPSD_BK BIT2 -+#define DRV_CFG_UAPSD_BE BIT3 -+ -+#define WMM_IE_UAPSD_VO BIT0 -+#define WMM_IE_UAPSD_VI BIT1 -+#define WMM_IE_UAPSD_BK BIT2 -+#define WMM_IE_UAPSD_BE BIT3 -+ -+#define WMM_TID0 BIT0 -+#define WMM_TID1 BIT1 -+#define WMM_TID2 BIT2 -+#define WMM_TID3 BIT3 -+#define WMM_TID4 BIT4 -+#define WMM_TID5 BIT5 -+#define WMM_TID6 BIT6 -+#define WMM_TID7 BIT7 -+ -+#define AP_SUPPORTED_UAPSD BIT7 -+/* TC = Traffic Category, TID0~7 represents TC */ -+#define BIT_MASK_TID_TC 0xff -+/* TS = Traffic Stream, TID8~15 represents TS */ -+#define BIT_MASK_TID_TS 0xff00 -+#define ALL_TID_TC_SUPPORTED_UAPSD 0xff -+ -+struct qos_priv { -+ -+ unsigned int qos_option; /* bit mask option: u-apsd, s-apsd, ts, block ack... */ -+ -+#ifdef CONFIG_WMMPS_STA -+ /* uapsd (unscheduled automatic power-save delivery) = a kind of wmmps */ -+ u8 uapsd_max_sp_len; -+ /* declare uapsd_tid as a bitmap for the uapsd setting of TID 0~15 */ -+ u16 uapsd_tid; -+ /* declare uapsd_tid_delivery_enabled as a bitmap for the delivery-enabled setting of TID 0~7 */ -+ u8 uapsd_tid_delivery_enabled; -+ /* declare uapsd_tid_trigger_enabled as a bitmap for the trigger-enabled setting of TID 0~7 */ -+ u8 uapsd_tid_trigger_enabled; -+ /* declare uapsd_ap_supported to record whether the connected ap supports uapsd or not */ -+ u8 uapsd_ap_supported; -+#endif /* CONFIG_WMMPS_STA */ -+ -+}; -+ -+ -+#endif /* _RTL871X_QOS_H_ */ -\ No newline at end of file -diff --git a/drivers/staging/rtl8723cs/include/rtw_recv.h b/drivers/staging/rtl8723cs/include/rtw_recv.h -new file mode 100644 -index 000000000000..a2574f755434 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_recv.h -@@ -0,0 +1,868 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_RECV_H_ -+#define _RTW_RECV_H_ -+ -+#define RTW_RX_MSDU_ACT_NONE 0 -+#define RTW_RX_MSDU_ACT_INDICATE BIT0 -+#define RTW_RX_MSDU_ACT_FORWARD BIT1 -+ -+#ifdef CONFIG_SINGLE_RECV_BUF -+ #define NR_RECVBUFF (1) -+#else -+ #if defined(CONFIG_GSPI_HCI) -+ #define NR_RECVBUFF (32) -+ #elif defined(CONFIG_SDIO_HCI) -+ #define NR_RECVBUFF (64) -+ #else -+ #define NR_RECVBUFF (64) -+ #endif -+#endif /* CONFIG_SINGLE_RECV_BUF */ -+#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ #define NR_PREALLOC_RECV_SKB (rtw_rtkm_get_nr_recv_skb()>>1) -+#else /*!CONFIG_PREALLOC_RX_SKB_BUFFER */ -+ #define NR_PREALLOC_RECV_SKB 8 -+#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ -+ -+#ifdef CONFIG_RTW_NAPI -+ #define RTL_NAPI_WEIGHT (32) -+#endif -+ -+ -+#if defined(CONFIG_RTL8821C) && defined(CONFIG_SDIO_HCI) && defined(CONFIG_RECV_THREAD_MODE) -+ #ifdef NR_RECVBUFF -+ #undef NR_RECVBUFF -+ #define NR_RECVBUFF (32) -+ #endif -+#endif -+ -+#define NR_RECVFRAME 256 -+ -+#define RXFRAME_ALIGN 8 -+#define RXFRAME_ALIGN_SZ (1<mesh_ctrl_len) -+#else -+#define RATTRIB_GET_MCTRL_LEN(rattrib) 0 -+#endif -+ -+/* These definition is used for Rx packet reordering. */ -+#define SN_LESS(a, b) (((a-b) & 0x800) != 0) -+#define SN_EQUAL(a, b) (a == b) -+/* #define REORDER_WIN_SIZE 128 */ -+/* #define REORDER_ENTRY_NUM 128 */ -+#define REORDER_WAIT_TIME (50) /* (ms) */ -+ -+#if defined(CONFIG_PLATFORM_RTK390X) && defined(CONFIG_USB_HCI) -+ #define RECVBUFF_ALIGN_SZ 32 -+#else -+ #define RECVBUFF_ALIGN_SZ 8 -+#endif -+ -+#ifdef CONFIG_TRX_BD_ARCH -+ #define RX_WIFI_INFO_SIZE 24 -+#elif (defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)) && defined(CONFIG_PCI_HCI) -+ #define RXBD_SIZE sizeof(struct recv_stat) -+#endif -+ -+#define RXDESC_SIZE 24 -+#define RXDESC_OFFSET RXDESC_SIZE -+ -+#ifdef CONFIG_TRX_BD_ARCH -+struct rx_buf_desc { -+ /* RX has exactly one segment */ -+#ifdef CONFIG_64BIT_DMA -+ unsigned int dword[4]; -+#else -+ unsigned int dword[2]; -+#endif -+}; -+ -+struct recv_stat { -+ unsigned int rxdw[8]; -+}; -+#else -+struct recv_stat { -+ unsigned int rxdw0; -+ -+ unsigned int rxdw1; -+ -+#if !((defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI)) /* exclude 8192ee, 8814ae, 8822be, 8821ce */ -+ unsigned int rxdw2; -+ -+ unsigned int rxdw3; -+#endif -+ -+#ifndef BUF_DESC_ARCH -+ unsigned int rxdw4; -+ -+ unsigned int rxdw5; -+ -+#ifdef CONFIG_PCI_HCI -+ unsigned int rxdw6; -+ -+ unsigned int rxdw7; -+#endif -+#endif /* if BUF_DESC_ARCH is defined, rx_buf_desc occupy 4 double words */ -+}; -+#endif -+ -+#define EOR BIT(30) -+ -+#ifdef CONFIG_PCI_HCI -+#define PCI_MAX_RX_QUEUE 1/* MSDU packet queue, Rx Command Queue */ -+#define PCI_MAX_RX_COUNT 128 -+#ifdef CONFIG_TRX_BD_ARCH -+#define RX_BD_NUM PCI_MAX_RX_COUNT /* alias */ -+#endif -+ -+struct rtw_rx_ring { -+#ifdef CONFIG_TRX_BD_ARCH -+ struct rx_buf_desc *buf_desc; -+#else -+ struct recv_stat *desc; -+#endif -+ dma_addr_t dma; -+ unsigned int idx; -+ struct sk_buff *rx_buf[PCI_MAX_RX_COUNT]; -+}; -+#endif -+ -+ -+ -+/* -+accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch) -+; halt(passive) ; -+ -+using enter_critical section to protect -+*/ -+ -+#ifndef DBG_RX_BH_TRACKING -+#define DBG_RX_BH_TRACKING 0 -+#endif -+ -+struct recv_priv { -+ _lock lock; -+ -+#ifdef CONFIG_RECV_THREAD_MODE -+ _sema recv_sema; -+ -+#endif -+ -+ /* _queue blk_strms[MAX_RX_NUMBLKS]; */ /* keeping the block ack frame until return ack */ -+ _queue free_recv_queue; -+ _queue recv_pending_queue; -+ _queue uc_swdec_pending_queue; -+ -+ -+ u8 *pallocated_frame_buf; -+ u8 *precv_frame_buf; -+ -+ uint free_recvframe_cnt; -+ -+ #if DBG_RX_BH_TRACKING -+ u32 rx_bh_stage; -+ u32 rx_bh_buf_dq_cnt; -+ void *rx_bh_lbuf; -+ void *rx_bh_cbuf; -+ void *rx_bh_cbuf_data; -+ u32 rx_bh_cbuf_dlen; -+ u32 rx_bh_cbuf_pos; -+ void *rx_bh_cframe; -+ #endif -+ -+ _adapter *adapter; -+ -+ u32 is_any_non_be_pkts; -+ -+ u64 rx_bytes; -+ u64 rx_pkts; -+ u64 rx_drop; -+ -+ u64 dbg_rx_drop_count; -+ u64 dbg_rx_ampdu_drop_count; -+ u64 dbg_rx_ampdu_forced_indicate_count; -+ u64 dbg_rx_ampdu_loss_count; -+ u64 dbg_rx_dup_mgt_frame_drop_count; -+ u64 dbg_rx_ampdu_window_shift_cnt; -+ u64 dbg_rx_conflic_mac_addr_cnt; -+ -+ uint rx_icv_err; -+ uint rx_largepacket_crcerr; -+ uint rx_smallpacket_crcerr; -+ uint rx_middlepacket_crcerr; -+ -+#ifdef CONFIG_USB_HCI -+ /* u8 *pallocated_urb_buf; */ -+ _sema allrxreturnevt; -+ uint ff_hwaddr; -+ ATOMIC_T rx_pending_cnt; -+ -+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE -+#ifdef PLATFORM_LINUX -+ PURB int_in_urb; -+#endif -+ -+ u8 *int_in_buf; -+#endif /* CONFIG_USB_INTERRUPT_IN_PIPE */ -+ -+#endif -+#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) -+ _tasklet irq_prepare_beacon_tasklet; -+ _tasklet recv_tasklet; -+ -+ struct sk_buff_head free_recv_skb_queue; -+ struct sk_buff_head rx_skb_queue; -+#ifdef CONFIG_RTW_NAPI -+ struct sk_buff_head rx_napi_skb_queue; -+#endif -+#ifdef CONFIG_RX_INDICATE_QUEUE -+ _tasklet rx_indicate_tasklet; -+ struct ifqueue rx_indicate_queue; -+#endif /* CONFIG_RX_INDICATE_QUEUE */ -+ -+#endif /* defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) */ -+ -+ u8 *pallocated_recv_buf; -+ u8 *precv_buf; /* 4 alignment */ -+ _queue free_recv_buf_queue; -+ u32 free_recv_buf_queue_cnt; -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_USB_HCI) -+ _queue recv_buf_pending_queue; -+#endif -+ -+#if defined(CONFIG_SDIO_HCI) -+#ifdef CONFIG_SDIO_RECVBUF_PWAIT -+ struct rtw_pwait_ctx recvbuf_pwait; -+#endif -+#ifdef CONFIG_SDIO_RECVBUF_AGGREGATION -+ bool recvbuf_agg; -+#endif -+#endif /* CONFIG_SDIO_HCI */ -+ -+#ifdef CONFIG_PCI_HCI -+ /* Rx */ -+ struct rtw_rx_ring rx_ring[PCI_MAX_RX_QUEUE]; -+ int rxringcount; /* size should be PCI_MAX_RX_QUEUE */ -+ u32 rxbuffersize; -+#endif -+ -+ /* For display the phy informatiom */ -+ u8 is_signal_dbg; /* for debug */ -+ u8 signal_strength_dbg; /* for debug */ -+ -+ u8 signal_strength; -+ u8 signal_qual; -+ s8 rssi; /* translate_percentage_to_dbm(ptarget_wlan->network.PhyInfo.SignalStrength); */ -+ struct rx_raw_rssi raw_rssi_info; -+ /* s8 rxpwdb; */ -+ /* int RxSNRdB[2]; */ -+ /* s8 RxRssi[2]; */ -+ /* int FalseAlmCnt_all; */ -+ -+ -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ _timer signal_stat_timer; -+ u32 signal_stat_sampling_interval; -+ /* u32 signal_stat_converging_constant; */ -+ struct signal_stat signal_qual_data; -+ struct signal_stat signal_strength_data; -+#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ struct smooth_rssi_data signal_qual_data; -+ struct smooth_rssi_data signal_strength_data; -+#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ u16 sink_udpport, pre_rtp_rxseq, cur_rtp_rxseq; -+ -+ BOOLEAN store_law_data_flag; -+}; -+ -+#ifdef CONFIG_SDIO_RECVBUF_AGGREGATION -+#define recv_buf_agg(recvpriv) recvpriv->recvbuf_agg -+#ifndef CONFIG_SDIO_RECVBUF_AGGREGATION_EN -+#define CONFIG_SDIO_RECVBUF_AGGREGATION_EN 1 -+#endif -+#else -+#define recv_buf_agg(recvpriv) 0 -+#endif -+ -+#define RX_BH_STG_UNKNOWN 0 -+#define RX_BH_STG_HDL_ENTER 1 -+#define RX_BH_STG_HDL_EXIT 2 -+#define RX_BH_STG_NEW_BUF 3 -+#define RX_BH_STG_NEW_FRAME 4 -+#define RX_BH_STG_NORMAL_RX 5 -+#define RX_BH_STG_NORMAL_RX_END 6 -+#define RX_BH_STG_C2H 7 -+#define RX_BH_STG_C2H_END 8 -+ -+#if DBG_RX_BH_TRACKING -+void rx_bh_tk_set_stage(struct recv_priv *recv, u32 s); -+void rx_bh_tk_set_buf(struct recv_priv *recv, void *buf, void *data, u32 dlen); -+void rx_bh_tk_set_buf_pos(struct recv_priv *recv, void *pos); -+void rx_bh_tk_set_frame(struct recv_priv *recv, void *frame); -+void dump_rx_bh_tk(void *sel, struct recv_priv *recv); -+#else -+#define rx_bh_tk_set_stage(recv, s) do {} while (0) -+#define rx_bh_tk_set_buf(recv, buf, data, dlen) do {} while (0) -+#define rx_bh_tk_set_buf_pos(recv, pos) do {} while (0) -+#define rx_bh_tk_set_frame(recv, frame) do {} while (0) -+#define dump_rx_bh_tk(sel, recv) do {} while (0) -+#endif -+ -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+#define rtw_set_signal_stat_timer(recvpriv) _set_timer(&(recvpriv)->signal_stat_timer, (recvpriv)->signal_stat_sampling_interval) -+#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */ -+ -+struct sta_recv_priv { -+ -+ _lock lock; -+ sint option; -+ -+ /* _queue blk_strms[MAX_RX_NUMBLKS]; */ -+ _queue defrag_q; /* keeping the fragment frame until defrag */ -+ -+ struct stainfo_rxcache rxcache; -+ u16 bmc_tid_rxseq[16]; -+ u16 nonqos_rxseq; -+ u16 nonqos_bmc_rxseq; -+ -+ /* uint sta_rx_bytes; */ -+ /* uint sta_rx_pkts; */ -+ /* uint sta_rx_fail; */ -+ -+}; -+ -+ -+#define RBUF_TYPE_PREALLOC 0 -+#define RBUF_TYPE_TMP 1 -+#define RBUF_TYPE_PWAIT_ADJ 2 -+ -+struct recv_buf { -+ _list list; -+ -+#ifdef PLATFORM_WINDOWS -+ _lock recvbuf_lock; -+#endif -+ -+#ifdef CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST -+ u8 type; -+#endif -+ -+ u32 ref_cnt; -+ -+ PADAPTER adapter; -+ -+ u8 *pbuf; -+ u8 *pallocated_buf; -+ -+ u32 len; -+ u8 *phead; -+ u8 *pdata; -+ u8 *ptail; -+ u8 *pend; -+ -+#ifdef CONFIG_USB_HCI -+ PURB purb; -+ dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ -+ u32 alloc_sz; -+ -+ u8 irp_pending; -+ int transfer_len; -+#endif -+ -+#if defined(PLATFORM_LINUX) -+ _pkt *pskb; -+#elif defined(PLATFORM_FREEBSD) /* skb solution */ -+ struct sk_buff *pskb; -+#endif -+}; -+ -+#ifdef CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST -+#define RBUF_IS_PREALLOC(rbuf) ((rbuf)->type == RBUF_TYPE_PREALLOC) -+#else -+#define RBUF_IS_PREALLOC(rbuf) 1 -+#endif -+ -+/* -+ head -----> -+ -+ data -----> -+ -+ payload -+ -+ tail -----> -+ -+ -+ end -----> -+ -+ len = (unsigned int )(tail - data); -+ -+*/ -+struct recv_frame_hdr { -+ _list list; -+ _pkt *pkt; -+ -+ _adapter *adapter; -+ -+ u8 fragcnt; -+ -+ int frame_tag; -+ -+ struct rx_pkt_attrib attrib; -+ -+ uint len; -+ u8 *rx_head; -+ u8 *rx_data; -+ u8 *rx_tail; -+ u8 *rx_end; -+ -+ void *precvbuf; -+ -+ -+ /* */ -+ struct sta_info *psta; -+ -+ /* for A-MPDU Rx reordering buffer control */ -+ struct recv_reorder_ctrl *preorder_ctrl; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ u8 UserPriority; -+ u8 WapiTempPN[16]; -+ u8 WapiSrcAddr[6]; -+ u8 bWapiCheckPNInDecrypt; -+ u8 bIsWaiPacket; -+#endif -+ -+}; -+ -+ -+union recv_frame { -+ -+ union { -+ _list list; -+ struct recv_frame_hdr hdr; -+ uint mem[RECVFRAME_HDR_ALIGN >> 2]; -+ } u; -+ -+ /* uint mem[MAX_RXSZ>>2]; */ -+ -+}; -+ -+enum rtw_rx_llc_hdl { -+ RTW_RX_LLC_KEEP = 0, -+ RTW_RX_LLC_REMOVE = 1, -+ RTW_RX_LLC_VLAN = 2, -+}; -+ -+bool rtw_rframe_del_wfd_ie(union recv_frame *rframe, u8 ies_offset); -+ -+typedef enum _RX_PACKET_TYPE { -+ NORMAL_RX,/* Normal rx packet */ -+ TX_REPORT1,/* CCX */ -+ TX_REPORT2,/* TX RPT */ -+ HIS_REPORT,/* USB HISR RPT */ -+ C2H_PACKET -+} RX_PACKET_TYPE, *PRX_PACKET_TYPE; -+ -+extern union recv_frame *_rtw_alloc_recvframe(_queue *pfree_recv_queue); /* get a free recv_frame from pfree_recv_queue */ -+extern union recv_frame *rtw_alloc_recvframe(_queue *pfree_recv_queue); /* get a free recv_frame from pfree_recv_queue */ -+extern void rtw_init_recvframe(union recv_frame *precvframe , struct recv_priv *precvpriv); -+extern int rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue); -+ -+#define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue) -+extern int _rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue); -+extern int rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue); -+ -+extern void rtw_free_recvframe_queue(_queue *pframequeue, _queue *pfree_recv_queue); -+u32 rtw_free_uc_swdec_pending_queue(_adapter *adapter); -+ -+sint rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, _queue *queue); -+sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue); -+struct recv_buf *rtw_dequeue_recvbuf(_queue *queue); -+ -+void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta); -+void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta); -+ -+#if defined(CONFIG_80211N_HT) && defined(CONFIG_RECV_REORDERING_CTRL) -+void rtw_reordering_ctrl_timeout_handler(void *pcontext); -+#endif -+ -+void rx_query_phy_status(union recv_frame *rframe, u8 *phy_stat); -+int rtw_inc_and_chk_continual_no_rx_packet(struct sta_info *sta, int tid_index); -+void rtw_reset_continual_no_rx_packet(struct sta_info *sta, int tid_index); -+ -+#ifdef CONFIG_RECV_THREAD_MODE -+thread_return rtw_recv_thread(thread_context context); -+#endif -+ -+__inline static u8 *get_rxmem(union recv_frame *precvframe) -+{ -+ /* always return rx_head... */ -+ if (precvframe == NULL) -+ return NULL; -+ -+ return precvframe->u.hdr.rx_head; -+} -+ -+__inline static u8 *get_rx_status(union recv_frame *precvframe) -+{ -+ -+ return get_rxmem(precvframe); -+ -+} -+ -+__inline static u8 *get_recvframe_data(union recv_frame *precvframe) -+{ -+ -+ /* alwasy return rx_data */ -+ if (precvframe == NULL) -+ return NULL; -+ -+ return precvframe->u.hdr.rx_data; -+ -+} -+ -+__inline static u8 *recvframe_push(union recv_frame *precvframe, sint sz) -+{ -+ /* append data before rx_data */ -+ -+ /* add data to the start of recv_frame -+ * -+ * This function extends the used data area of the recv_frame at the buffer -+ * start. rx_data must be still larger than rx_head, after pushing. -+ */ -+ -+ if (precvframe == NULL) -+ return NULL; -+ -+ -+ precvframe->u.hdr.rx_data -= sz ; -+ if (precvframe->u.hdr.rx_data < precvframe->u.hdr.rx_head) { -+ precvframe->u.hdr.rx_data += sz ; -+ return NULL; -+ } -+ -+ precvframe->u.hdr.len += sz; -+ -+ return precvframe->u.hdr.rx_data; -+ -+} -+ -+ -+__inline static u8 *recvframe_pull(union recv_frame *precvframe, sint sz) -+{ -+ /* rx_data += sz; move rx_data sz bytes hereafter */ -+ -+ /* used for extract sz bytes from rx_data, update rx_data and return the updated rx_data to the caller */ -+ -+ -+ if (precvframe == NULL) -+ return NULL; -+ -+ -+ precvframe->u.hdr.rx_data += sz; -+ -+ if (precvframe->u.hdr.rx_data > precvframe->u.hdr.rx_tail) { -+ precvframe->u.hdr.rx_data -= sz; -+ return NULL; -+ } -+ -+ precvframe->u.hdr.len -= sz; -+ -+ return precvframe->u.hdr.rx_data; -+ -+} -+ -+__inline static u8 *recvframe_put(union recv_frame *precvframe, sint sz) -+{ -+ /* rx_tai += sz; move rx_tail sz bytes hereafter */ -+ -+ /* used for append sz bytes from ptr to rx_tail, update rx_tail and return the updated rx_tail to the caller */ -+ /* after putting, rx_tail must be still larger than rx_end. */ -+ unsigned char *prev_rx_tail; -+ -+ /* RTW_INFO("recvframe_put: len=%d\n", sz); */ -+ -+ if (precvframe == NULL) -+ return NULL; -+ -+ prev_rx_tail = precvframe->u.hdr.rx_tail; -+ -+ precvframe->u.hdr.rx_tail += sz; -+ -+ if (precvframe->u.hdr.rx_tail > precvframe->u.hdr.rx_end) { -+ precvframe->u.hdr.rx_tail -= sz; -+ return NULL; -+ } -+ -+ precvframe->u.hdr.len += sz; -+ -+ return precvframe->u.hdr.rx_tail; -+ -+} -+ -+ -+ -+__inline static u8 *recvframe_pull_tail(union recv_frame *precvframe, sint sz) -+{ -+ /* rmv data from rx_tail (by yitsen) */ -+ -+ /* used for extract sz bytes from rx_end, update rx_end and return the updated rx_end to the caller */ -+ /* after pulling, rx_end must be still larger than rx_data. */ -+ -+ if (precvframe == NULL) -+ return NULL; -+ -+ precvframe->u.hdr.rx_tail -= sz; -+ -+ if (precvframe->u.hdr.rx_tail < precvframe->u.hdr.rx_data) { -+ precvframe->u.hdr.rx_tail += sz; -+ return NULL; -+ } -+ -+ precvframe->u.hdr.len -= sz; -+ -+ return precvframe->u.hdr.rx_tail; -+ -+} -+ -+__inline static union recv_frame *rxmem_to_recvframe(u8 *rxmem) -+{ -+ /* due to the design of 2048 bytes alignment of recv_frame, we can reference the union recv_frame */ -+ /* from any given member of recv_frame. */ -+ /* rxmem indicates the any member/address in recv_frame */ -+ -+ return (union recv_frame *)(((SIZE_PTR)rxmem >> RXFRAME_ALIGN) << RXFRAME_ALIGN); -+ -+} -+ -+__inline static union recv_frame *pkt_to_recvframe(_pkt *pkt) -+{ -+ -+ u8 *buf_star; -+ union recv_frame *precv_frame; -+ precv_frame = rxmem_to_recvframe((unsigned char *)buf_star); -+ -+ return precv_frame; -+} -+ -+__inline static u8 *pkt_to_recvmem(_pkt *pkt) -+{ -+ /* return the rx_head */ -+ -+ union recv_frame *precv_frame = pkt_to_recvframe(pkt); -+ -+ return precv_frame->u.hdr.rx_head; -+ -+} -+ -+__inline static u8 *pkt_to_recvdata(_pkt *pkt) -+{ -+ /* return the rx_data */ -+ -+ union recv_frame *precv_frame = pkt_to_recvframe(pkt); -+ -+ return precv_frame->u.hdr.rx_data; -+ -+} -+ -+ -+__inline static sint get_recvframe_len(union recv_frame *precvframe) -+{ -+ return precvframe->u.hdr.len; -+} -+ -+ -+__inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex) -+{ -+ s32 SignalPower; /* in dBm. */ -+ -+ /* Translate to dBm (x=y-100) */ -+ SignalPower = SignalStrengthIndex - 100; -+ return SignalPower; -+} -+ -+struct sta_info; -+ -+extern void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv); -+ -+extern void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame); -+ -+u8 adapter_allow_bmc_data_rx(_adapter *adapter); -+s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status); -+void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info *sta); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_rf.h b/drivers/staging/rtl8723cs/include/rtw_rf.h -new file mode 100644 -index 000000000000..3a24929a59c8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_rf.h -@@ -0,0 +1,326 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_RF_H_ -+#define __RTW_RF_H_ -+ -+#define NumRates (13) -+#define B_MODE_RATE_NUM (4) -+#define G_MODE_RATE_NUM (8) -+#define G_MODE_BASIC_RATE_NUM (3) -+/* slot time for 11g */ -+#define SHORT_SLOT_TIME 9 -+#define NON_SHORT_SLOT_TIME 20 -+ -+#define CENTER_CH_2G_40M_NUM 9 -+#define CENTER_CH_2G_NUM 14 -+#define CENTER_CH_5G_20M_NUM 28 /* 20M center channels */ -+#define CENTER_CH_5G_40M_NUM 14 /* 40M center channels */ -+#define CENTER_CH_5G_80M_NUM 7 /* 80M center channels */ -+#define CENTER_CH_5G_160M_NUM 3 /* 160M center channels */ -+#define CENTER_CH_5G_ALL_NUM (CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM + CENTER_CH_5G_80M_NUM) -+ -+#define MAX_CHANNEL_NUM_2G CENTER_CH_2G_NUM -+#define MAX_CHANNEL_NUM_5G CENTER_CH_5G_20M_NUM -+#define MAX_CHANNEL_NUM (MAX_CHANNEL_NUM_2G + MAX_CHANNEL_NUM_5G) -+#define MAX_CHANNEL_NUM_OF_BAND rtw_max(MAX_CHANNEL_NUM_2G, MAX_CHANNEL_NUM_5G) -+ -+extern u8 center_ch_2g[CENTER_CH_2G_NUM]; -+extern u8 center_ch_2g_40m[CENTER_CH_2G_40M_NUM]; -+ -+u8 center_chs_2g_num(u8 bw); -+u8 center_chs_2g(u8 bw, u8 id); -+ -+extern u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM]; -+extern u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM]; -+extern u8 center_ch_5g_20m_40m[CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM]; -+extern u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM]; -+extern u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM]; -+ -+u8 center_chs_5g_num(u8 bw); -+u8 center_chs_5g(u8 bw, u8 id); -+ -+u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset); -+u8 rtw_get_scch_by_cch_opch(u8 cch, u8 bw, u8 opch); -+ -+u8 rtw_get_op_chs_by_cch_bw(u8 cch, u8 bw, u8 **op_chs, u8 *op_ch_num); -+ -+u8 rtw_get_offset_by_chbw(u8 ch, u8 bw, u8 *r_offset); -+u8 rtw_get_center_ch(u8 ch, u8 bw, u8 offset); -+ -+u8 rtw_get_ch_group(u8 ch, u8 *group, u8 *cck_group); -+ -+typedef enum _CAPABILITY { -+ cESS = 0x0001, -+ cIBSS = 0x0002, -+ cPollable = 0x0004, -+ cPollReq = 0x0008, -+ cPrivacy = 0x0010, -+ cShortPreamble = 0x0020, -+ cPBCC = 0x0040, -+ cChannelAgility = 0x0080, -+ cSpectrumMgnt = 0x0100, -+ cQos = 0x0200, /* For HCCA, use with CF-Pollable and CF-PollReq */ -+ cShortSlotTime = 0x0400, -+ cAPSD = 0x0800, -+ cRM = 0x1000, /* RRM (Radio Request Measurement) */ -+ cDSSS_OFDM = 0x2000, -+ cDelayedBA = 0x4000, -+ cImmediateBA = 0x8000, -+} CAPABILITY, *PCAPABILITY; -+ -+enum _REG_PREAMBLE_MODE { -+ PREAMBLE_LONG = 1, -+ PREAMBLE_AUTO = 2, -+ PREAMBLE_SHORT = 3, -+}; -+ -+#define rf_path_char(path) (((path) >= RF_PATH_MAX) ? 'X' : 'A' + (path)) -+ -+/* Bandwidth Offset */ -+#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0 -+#define HAL_PRIME_CHNL_OFFSET_LOWER 1 -+#define HAL_PRIME_CHNL_OFFSET_UPPER 2 -+ -+typedef enum _BAND_TYPE { -+ BAND_ON_2_4G = 0, -+ BAND_ON_5G = 1, -+ BAND_MAX, -+} BAND_TYPE, *PBAND_TYPE; -+ -+#ifdef CONFIG_NARROWBAND_SUPPORTING -+enum nb_config { -+ RTW_NB_CONFIG_NONE = 0, -+ RTW_NB_CONFIG_WIDTH_5 = 5, -+ RTW_NB_CONFIG_WIDTH_10 = 6, -+}; -+#endif -+ -+extern const char *const _band_str[]; -+#define band_str(band) (((band) >= BAND_MAX) ? _band_str[BAND_MAX] : _band_str[(band)]) -+ -+extern const u8 _band_to_band_cap[]; -+#define band_to_band_cap(band) (((band) >= BAND_MAX) ? _band_to_band_cap[BAND_MAX] : _band_to_band_cap[(band)]) -+ -+ -+extern const char *const _ch_width_str[]; -+#define ch_width_str(bw) (((bw) < CHANNEL_WIDTH_MAX) ? _ch_width_str[(bw)] : "CHANNEL_WIDTH_MAX") -+ -+extern const u8 _ch_width_to_bw_cap[]; -+#define ch_width_to_bw_cap(bw) (((bw) < CHANNEL_WIDTH_MAX) ? _ch_width_to_bw_cap[(bw)] : 0) -+ -+enum opc_bw { -+ OPC_BW20 = 0, -+ OPC_BW40PLUS = 1, -+ OPC_BW40MINUS = 2, -+ OPC_BW80 = 3, -+ OPC_BW160 = 4, -+ OPC_BW80P80 = 5, -+ OPC_BW_NUM, -+}; -+ -+extern const char *const _opc_bw_str[OPC_BW_NUM]; -+#define opc_bw_str(bw) (((bw) < OPC_BW_NUM) ? _opc_bw_str[(bw)] : "N/A") -+ -+extern const u8 _opc_bw_to_ch_width[OPC_BW_NUM]; -+#define opc_bw_to_ch_width(bw) (((bw) < OPC_BW_NUM) ? _opc_bw_to_ch_width[(bw)] : CHANNEL_WIDTH_MAX) -+ -+/* global op class APIs */ -+bool is_valid_global_op_class_id(u8 gid); -+s16 get_sub_op_class(u8 gid, u8 ch); -+void dump_global_op_class(void *sel); -+u8 rtw_get_op_class_by_chbw(u8 ch, u8 bw, u8 offset); -+u8 rtw_get_bw_offset_by_op_class_ch(u8 gid, u8 ch, u8 *bw, u8 *offset); -+ -+struct op_ch_t { -+ u8 ch; -+ u8 static_non_op:1; /* not in channel list */ -+ u8 no_ir:1; -+ s16 max_txpwr; /* mBm */ -+}; -+ -+struct op_class_pref_t { -+ u8 class_id; -+ BAND_TYPE band; -+ enum opc_bw bw; -+ u8 ch_num; /* number of chs */ -+ u8 op_ch_num; /* channel number which is not static non operable */ -+ u8 ir_ch_num; /* channel number which can init radiation */ -+ struct op_ch_t chs[MAX_CHANNEL_NUM_OF_BAND]; /* zero(ch) terminated array */ -+}; -+ -+int op_class_pref_init(_adapter *adapter); -+void op_class_pref_deinit(_adapter *adapter); -+ -+#define REG_BEACON_HINT 0 -+#define REG_TXPWR_CHANGE 1 -+#define REG_CHANGE 2 -+ -+void op_class_pref_apply_regulatory(_adapter *adapter, u8 reason); -+ -+struct rf_ctl_t; -+void dump_cap_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail); -+void dump_reg_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail); -+void dump_cur_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail); -+ -+/* -+ * Represent Extention Channel Offset in HT Capabilities -+ * This is available only in 40Mhz mode. -+ * */ -+typedef enum _EXTCHNL_OFFSET { -+ EXTCHNL_OFFSET_NO_EXT = 0, -+ EXTCHNL_OFFSET_UPPER = 1, -+ EXTCHNL_OFFSET_NO_DEF = 2, -+ EXTCHNL_OFFSET_LOWER = 3, -+} EXTCHNL_OFFSET, *PEXTCHNL_OFFSET; -+ -+typedef enum _VHT_DATA_SC { -+ VHT_DATA_SC_DONOT_CARE = 0, -+ VHT_DATA_SC_20_UPPER_OF_80MHZ = 1, -+ VHT_DATA_SC_20_LOWER_OF_80MHZ = 2, -+ VHT_DATA_SC_20_UPPERST_OF_80MHZ = 3, -+ VHT_DATA_SC_20_LOWEST_OF_80MHZ = 4, -+ VHT_DATA_SC_20_RECV1 = 5, -+ VHT_DATA_SC_20_RECV2 = 6, -+ VHT_DATA_SC_20_RECV3 = 7, -+ VHT_DATA_SC_20_RECV4 = 8, -+ VHT_DATA_SC_40_UPPER_OF_80MHZ = 9, -+ VHT_DATA_SC_40_LOWER_OF_80MHZ = 10, -+} VHT_DATA_SC, *PVHT_DATA_SC_E; -+ -+typedef enum _PROTECTION_MODE { -+ PROTECTION_MODE_AUTO = 0, -+ PROTECTION_MODE_FORCE_ENABLE = 1, -+ PROTECTION_MODE_FORCE_DISABLE = 2, -+} PROTECTION_MODE, *PPROTECTION_MODE; -+ -+#define RF_TYPE_VALID(rf_type) (rf_type < RF_TYPE_MAX) -+ -+extern const u8 _rf_type_to_rf_tx_cnt[]; -+#define rf_type_to_rf_tx_cnt(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rf_tx_cnt[rf_type] : 0) -+ -+extern const u8 _rf_type_to_rf_rx_cnt[]; -+#define rf_type_to_rf_rx_cnt(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rf_rx_cnt[rf_type] : 0) -+ -+extern const char *const _rf_type_to_rfpath_str[]; -+#define rf_type_to_rfpath_str(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rfpath_str[rf_type] : "UNKNOWN") -+ -+void rf_type_to_default_trx_bmp(enum rf_type rf, enum bb_path *tx, enum bb_path *rx); -+ -+enum rf_type trx_num_to_rf_type(u8 tx_num, u8 rx_num); -+enum rf_type trx_bmp_to_rf_type(u8 tx_bmp, u8 rx_bmp); -+bool rf_type_is_a_in_b(enum rf_type a, enum rf_type b); -+u8 rtw_restrict_trx_path_bmp_by_trx_num_lmt(u8 trx_path_bmp, u8 tx_num_lmt, u8 rx_num_lmt, u8 *tx_num, u8 *rx_num); -+u8 rtw_restrict_trx_path_bmp_by_rftype(u8 trx_path_bmp, enum rf_type type, u8 *tx_num, u8 *rx_num); -+void tx_path_nss_set_default(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath); -+void tx_path_nss_set_full_tx(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath); -+ -+int rtw_ch2freq(int chan); -+int rtw_freq2ch(int freq); -+bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo); -+ -+struct rf_ctl_t; -+ -+typedef enum _REGULATION_TXPWR_LMT { -+ TXPWR_LMT_NONE = 0, /* no limit */ -+ TXPWR_LMT_FCC = 1, -+ TXPWR_LMT_MKK = 2, -+ TXPWR_LMT_ETSI = 3, -+ TXPWR_LMT_IC = 4, -+ TXPWR_LMT_KCC = 5, -+ TXPWR_LMT_NCC = 6, -+ TXPWR_LMT_ACMA = 7, -+ TXPWR_LMT_CHILE = 8, -+ TXPWR_LMT_UKRAINE = 9, -+ TXPWR_LMT_MEXICO = 10, -+ TXPWR_LMT_CN = 11, -+ TXPWR_LMT_WW, /* smallest of all available limit, keep last */ -+} REGULATION_TXPWR_LMT; -+ -+extern const char *const _regd_str[]; -+#define regd_str(regd) (((regd) > TXPWR_LMT_WW) ? _regd_str[TXPWR_LMT_WW] : _regd_str[(regd)]) -+ -+void txpwr_idx_get_dbm_str(s8 idx, u8 txgi_max, u8 txgi_pdbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len); -+ -+#define MBM_PDBM 100 -+#define UNSPECIFIED_MBM 32767 /* maximum of s16 */ -+ -+void txpwr_mbm_get_dbm_str(s16 mbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len); -+s16 mb_of_ntx(u8 ntx); -+ -+#if CONFIG_TXPWR_LIMIT -+struct regd_exc_ent { -+ _list list; -+ char country[2]; -+ u8 domain; -+ char regd_name[0]; -+}; -+ -+void dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl); -+void rtw_regd_exc_add_with_nlen(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name, u32 nlen); -+void rtw_regd_exc_add(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name); -+struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain); -+struct regd_exc_ent *rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain); -+void rtw_regd_exc_list_free(struct rf_ctl_t *rfctl); -+ -+void dump_txpwr_lmt(void *sel, _adapter *adapter); -+void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, u32 nlen -+ , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt); -+void rtw_txpwr_lmt_add(struct rf_ctl_t *rfctl, const char *regd_name -+ , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt); -+struct txpwr_lmt_ent *_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name); -+struct txpwr_lmt_ent *rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name); -+void rtw_txpwr_lmt_list_free(struct rf_ctl_t *rfctl); -+#endif /* CONFIG_TXPWR_LIMIT */ -+ -+#define BB_GAIN_2G 0 -+#if CONFIG_IEEE80211_BAND_5GHZ -+#define BB_GAIN_5GLB1 1 -+#define BB_GAIN_5GLB2 2 -+#define BB_GAIN_5GMB1 3 -+#define BB_GAIN_5GMB2 4 -+#define BB_GAIN_5GHB 5 -+#endif -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+#define BB_GAIN_NUM 6 -+#else -+#define BB_GAIN_NUM 1 -+#endif -+ -+int rtw_ch_to_bb_gain_sel(int ch); -+void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset); -+void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch); -+ -+/* only check channel ranges */ -+#define rtw_is_2g_ch(ch) (ch >= 1 && ch <= 14) -+#define rtw_is_5g_ch(ch) ((ch) >= 36 && (ch) <= 177) -+#define rtw_is_same_band(a, b) \ -+ ((rtw_is_2g_ch(a) && rtw_is_2g_ch(b)) \ -+ || (rtw_is_5g_ch(a) && rtw_is_5g_ch(b))) -+ -+#define rtw_is_5g_band1(ch) ((ch) >= 36 && (ch) <= 48) -+#define rtw_is_5g_band2(ch) ((ch) >= 52 && (ch) <= 64) -+#define rtw_is_5g_band3(ch) ((ch) >= 100 && (ch) <= 144) -+#define rtw_is_5g_band4(ch) ((ch) >= 149 && (ch) <= 177) -+#define rtw_is_same_5g_band(a, b) \ -+ ((rtw_is_5g_band1(a) && rtw_is_5g_band1(b)) \ -+ || (rtw_is_5g_band2(a) && rtw_is_5g_band2(b)) \ -+ || (rtw_is_5g_band3(a) && rtw_is_5g_band3(b)) \ -+ || (rtw_is_5g_band4(a) && rtw_is_5g_band4(b))) -+ -+bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region); -+bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region); -+ -+#endif /* _RTL8711_RF_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_rm.h b/drivers/staging/rtl8723cs/include/rtw_rm.h -new file mode 100644 -index 000000000000..8aa2b9d167e6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_rm.h -@@ -0,0 +1,105 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __RTW_RM_H_ -+#define __RTW_RM_H_ -+ -+u8 rm_post_event_hdl(_adapter *padapter, u8 *pbuf); -+ -+#define RM_TIMER_NUM 32 -+#define RM_ALL_MEAS BIT(1) -+#define RM_ID_FOR_ALL(aid) ((aid<<16)|RM_ALL_MEAS) -+ -+#define RM_CAP_ARG(x) ((u8 *)(x))[4], ((u8 *)(x))[3], ((u8 *)(x))[2], ((u8 *)(x))[1], ((u8 *)(x))[0] -+#define RM_CAP_FMT "%02x %02x%02x %02x%02x" -+ -+/* remember to modify rm_event_name() when adding new event */ -+enum RM_EV_ID { -+ RM_EV_state_in, -+ RM_EV_busy_timer_expire, -+ RM_EV_delay_timer_expire, -+ RM_EV_meas_timer_expire, -+ RM_EV_retry_timer_expire, -+ RM_EV_repeat_delay_expire, -+ RM_EV_request_timer_expire, -+ RM_EV_wait_report, -+ RM_EV_start_meas, -+ RM_EV_survey_done, -+ RM_EV_recv_rep, -+ RM_EV_cancel, -+ RM_EV_state_out, -+ RM_EV_max -+}; -+ -+struct rm_event { -+ u32 rmid; -+ enum RM_EV_ID evid; -+ _list list; -+}; -+ -+#ifdef CONFIG_RTW_80211K -+ -+struct rm_clock { -+ struct rm_obj *prm; -+ ATOMIC_T counter; -+ enum RM_EV_ID evid; -+}; -+ -+struct rm_priv { -+ u8 enable; -+ _queue ev_queue; -+ _queue rm_queue; -+ _timer rm_timer; -+ -+ struct rm_clock clock[RM_TIMER_NUM]; -+ u8 rm_en_cap_def[5]; -+ u8 rm_en_cap_assoc[5]; -+ -+ u8 meas_token; -+ /* rm debug */ -+ void *prm_sel; -+}; -+ -+#define MAX_CH_NUM_IN_OP_CLASS 11 -+typedef struct _RT_OPERATING_CLASS { -+ int global_op_class; -+ int Len; -+ u8 Channel[MAX_CH_NUM_IN_OP_CLASS]; -+} RT_OPERATING_CLASS, *PRT_OPERATING_CLASS; -+ -+int rtw_init_rm(_adapter *padapter); -+int rtw_free_rm_priv(_adapter *padapter); -+ -+unsigned int rm_on_action(_adapter *padapter, union recv_frame *precv_frame); -+void RM_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+void rtw_ap_parse_sta_rm_en_cap(_adapter *padapter, -+ struct sta_info *psta, struct rtw_ieee802_11_elems *elems); -+ -+int rm_post_event(_adapter *padapter, u32 rmid, enum RM_EV_ID evid); -+void rm_handler(_adapter *padapter, struct rm_event *pev); -+ -+u8 rm_add_nb_req(_adapter *padapter, struct sta_info *psta); -+ -+/* from ioctl */ -+int rm_send_bcn_reqs(_adapter *padapter, u8 *sta_addr, u8 op_class, u8 ch, -+ u16 measure_duration, u8 measure_mode, u8 *bssid, u8 *ssid, -+ u8 reporting_detail, -+ u8 n_ap_ch_rpt, struct _RT_OPERATING_CLASS *rpt, -+ u8 n_elem_id, u8 *elem_id_list); -+void indicate_beacon_report(u8 *sta_addr, -+ u8 n_measure_rpt, u32 elem_len, u8 *elem); -+ -+#endif /*CONFIG_RTW_80211K */ -+#endif /* __RTW_RM_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_rm_fsm.h b/drivers/staging/rtl8723cs/include/rtw_rm_fsm.h -new file mode 100644 -index 000000000000..bbbb3d918bed ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_rm_fsm.h -@@ -0,0 +1,397 @@ -+ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __RTW_RM_FSM_H_ -+#define __RTW_RM_FSM_H_ -+ -+#ifdef CONFIG_RTW_80211K -+ -+#define RM_SUPPORT_IWPRIV_DBG 1 -+#define RM_MORE_DBG_MSG 0 -+ -+#define DBG_BCN_REQ_DETAIL 0 -+#define DBG_BCN_REQ_WILDCARD 0 -+#define DBG_BCN_REQ_SSID 0 -+#define DBG_BCN_REQ_SSID_NAME "RealKungFu" -+ -+#define RM_REQ_TIMEOUT 10000 /* 10 seconds */ -+#define RM_MEAS_TIMEOUT 10000 /* 10 seconds */ -+#define RM_REPT_SCAN_INTVL 5000 /* 5 seconds */ -+#define RM_REPT_POLL_INTVL 2000 /* 2 seconds */ -+#define RM_COND_INTVL 2000 /* 2 seconds */ -+#define RM_SCAN_DENY_TIMES 10 -+#define RM_BUSY_TRAFFIC_TIMES 10 -+#define RM_WAIT_BUSY_TIMEOUT 1000 /* 1 seconds */ -+ -+#define MEAS_REQ_MOD_PARALLEL BIT(0) -+#define MEAS_REQ_MOD_ENABLE BIT(1) -+#define MEAS_REQ_MOD_REQUEST BIT(2) -+#define MEAS_REQ_MOD_REPORT BIT(3) -+#define MEAS_REQ_MOD_DUR_MAND BIT(4) -+ -+#define MEAS_REP_MOD_LATE BIT(0) -+#define MEAS_REP_MOD_INCAP BIT(1) -+#define MEAS_REP_MOD_REFUSE BIT(2) -+ -+#define RM_MASTER BIT(0) /* STA who issue meas_req */ -+#define RM_SLAVE 0 /* STA who do measurement */ -+ -+#define CLOCK_UNIT 10 /* ms */ -+#define RTW_MAX_NB_RPT_IE_NUM 16 -+ -+#define RM_GET_AID(rmid) ((rmid&0xffff0000)>>16) -+#define RM_IS_ID_FOR_ALL(rmid) (rmid&RM_ALL_MEAS) -+ -+/* IEEE 802.11-2012 Table 8-59 Measurement Type definitions -+* for measurement request -+* modify rm_meas_type_req_name() when adding new type -+*/ -+enum meas_type_of_req { -+ basic_req, /* spectrum measurement */ -+ cca_req, -+ rpi_histo_req, -+ ch_load_req, -+ noise_histo_req, -+ bcn_req, -+ frame_req, -+ sta_statis_req, -+ lci_req, -+ meas_type_req_max, -+}; -+ -+/* IEEE 802.11-2012 Table 8-81 Measurement Type definitions -+* for measurement report -+* modify rm_type_rep_name() when adding new type -+*/ -+enum meas_type_of_rep { -+ basic_rep, /* spectrum measurement */ -+ cca_rep, -+ rpi_histo_rep, -+ ch_load_rep, /* radio measurement */ -+ noise_histo_rep, -+ bcn_rep, -+ frame_rep, -+ sta_statis_rep, /* Radio measurement and WNM */ -+ lci_rep, -+ meas_type_rep_max -+}; -+ -+/* -+* Beacon request -+*/ -+/* IEEE 802.11-2012 Table 8-64 Measurement mode for Beacon Request element */ -+enum bcn_req_meas_mode { -+ bcn_req_passive, -+ bcn_req_active, -+ bcn_req_bcn_table -+}; -+ -+/* IEEE 802.11-2012 Table 8-65 optional subelement IDs for Beacon Request */ -+enum bcn_req_opt_sub_id{ -+ bcn_req_ssid = 0, /* len 0-32 */ -+ bcn_req_rep_info = 1, /* len 2 */ -+ bcn_req_rep_detail = 2, /* len 1 */ -+ bcn_req_req = 10, /* len 0-237 */ -+ bcn_req_ap_ch_rep = 51 /* len 1-237 */ -+}; -+ -+/* IEEE 802.11-2012 Table 8-66 Reporting condition of Beacon Report */ -+enum bcn_rep_cound_id{ -+ bcn_rep_cond_immediately, /* default */ -+ bcn_req_cond_rcpi_greater, -+ bcn_req_cond_rcpi_less, -+ bcn_req_cond_rsni_greater, -+ bcn_req_cond_rsni_less, -+ bcn_req_cond_max -+}; -+ -+struct opt_rep_info { -+ u8 cond; -+ u8 threshold; -+}; -+ -+#define BCN_REQ_OPT_MAX_NUM 16 -+#define BCN_REQ_REQ_OPT_MAX_NUM 16 -+#define BCN_REQ_OPT_AP_CH_RPT_MAX_NUM 12 -+struct bcn_req_opt { -+ /* all req cmd id */ -+ u8 opt_id[BCN_REQ_OPT_MAX_NUM]; -+ u8 opt_id_num; -+ u8 req_id_num; -+ u8 req_id[BCN_REQ_REQ_OPT_MAX_NUM]; -+ u8 rep_detail; -+ NDIS_802_11_SSID ssid; -+ -+ /* bcn report condition */ -+ struct opt_rep_info rep_cond; -+ -+ u8 ap_ch_rpt_num; -+ struct _RT_OPERATING_CLASS *ap_ch_rpt[BCN_REQ_OPT_AP_CH_RPT_MAX_NUM]; -+ -+ /* 0:default(Report to be issued after each measurement) */ -+ u8 *req_start; /*id : 10 request;start */ -+ u8 req_len; /*id : 10 request;length */ -+}; -+ -+/* -+* channel load -+*/ -+/* IEEE 802.11-2012 Table 8-60 optional subelement IDs for channel load request */ -+enum ch_load_opt_sub_id{ -+ ch_load_rsvd, -+ ch_load_rep_info -+}; -+ -+/* IEEE 802.11-2012 Table 8-61 Reporting condition for channel load Report */ -+enum ch_load_cound_id{ -+ ch_load_cond_immediately, /* default */ -+ ch_load_cond_anpi_equal_greater, -+ ch_load_cond_anpi_equal_less, -+ ch_load_cond_max -+}; -+ -+/* -+* Noise histogram -+*/ -+/* IEEE 802.11-2012 Table 8-62 optional subelement IDs for noise histogram */ -+enum noise_histo_opt_sub_id{ -+ noise_histo_rsvd, -+ noise_histo_rep_info -+}; -+ -+/* IEEE 802.11-2012 Table 8-63 Reporting condition for noise historgarm Report */ -+enum noise_histo_cound_id{ -+ noise_histo_cond_immediately, /* default */ -+ noise_histo_cond_anpi_equal_greater, -+ noise_histo_cond_anpi_equal_less, -+ noise_histo_cond_max -+}; -+ -+struct meas_req_opt { -+ /* report condition */ -+ struct opt_rep_info rep_cond; -+}; -+ -+/* -+* State machine -+*/ -+ -+enum RM_STATE { -+ RM_ST_IDLE, -+ RM_ST_DO_MEAS, -+ RM_ST_WAIT_MEAS, -+ RM_ST_SEND_REPORT, -+ RM_ST_RECV_REPORT, -+ RM_ST_END, -+ RM_ST_MAX -+}; -+ -+struct rm_meas_req { -+ u8 category; -+ u8 action_code; /* T8-206 */ -+ u8 diag_token; -+ u16 rpt; -+ -+ u8 e_id; -+ u8 len; -+ u8 m_token; -+ u8 m_mode; /* req:F8-105, rep:F8-141 */ -+ u8 m_type; /* T8-59 */ -+ u8 op_class; -+ u8 ch_num; -+ u16 rand_intvl; /* units of TU */ -+ u16 meas_dur; /* units of TU */ -+ -+ u8 bssid[6]; /* for bcn_req */ -+ -+ u8 *pssid; -+ u8 *opt_s_elem_start; -+ int opt_s_elem_len; -+ -+ s8 tx_pwr_used; /* for link measurement */ -+ s8 tx_pwr_max; /* for link measurement */ -+ -+ union { -+ struct bcn_req_opt bcn; -+ struct meas_req_opt clm; -+ struct meas_req_opt nhm; -+ }opt; -+ -+ struct rtw_ieee80211_channel ch_set[RTW_CHANNEL_SCAN_AMOUNT]; -+ u8 ch_set_ch_amount; -+ s8 rx_pwr; /* in dBm */ -+ u8 rx_bw; -+ u8 rx_rate; -+ u8 rx_rsni; -+}; -+ -+struct rm_meas_rep { -+ u8 category; -+ u8 action_code; /* T8-206 */ -+ u8 diag_token; -+ -+ u8 e_id; /* T8-54, 38 request; 39 report */ -+ u8 len; -+ u8 m_token; -+ u8 m_mode; /* req:F8-105, rep:F8-141 */ -+ u8 m_type; /* T8-59 */ -+ u8 op_class; -+ u8 ch_num; -+ -+ u8 ch_load; -+ u8 anpi; -+ u8 ipi[11]; -+ -+ u16 rpt; -+ u8 bssid[6]; /* for bcn_req */ -+}; -+ -+#define MAX_BUF_NUM 128 -+struct data_buf { -+ u8 *pbuf; -+ u16 len; -+}; -+ -+struct rm_obj { -+ -+ /* aid << 16 -+ |diag_token << 8 -+ |B(1) 1/0:All_AID/UNIC -+ |B(0) 1/0:RM_MASTER/RM_SLAVE */ -+ u32 rmid; -+ -+ enum RM_STATE state; -+ struct rm_meas_req q; -+ struct rm_meas_rep p; -+ struct sta_info *psta; -+ struct rm_clock *pclock; -+ -+ /* meas report */ -+ u64 meas_start_time; -+ u64 meas_end_time; -+ int wait_busy; -+ u8 poll_mode; -+ u8 free_run_counter_valid; /* valid:_SUCCESS/invalid:_FAIL */ -+ -+ struct data_buf buf[MAX_BUF_NUM]; -+ bool from_ioctl; -+ -+ _list list; -+}; -+ -+/* -+* Measurement -+*/ -+struct opt_subelement { -+ u8 id; -+ u8 length; -+ u8 *data; -+}; -+ -+/* 802.11-2012 Table 8-206 Radio Measurment Action field */ -+enum rm_action_code { -+ RM_ACT_RADIO_MEAS_REQ, -+ RM_ACT_RADIO_MEAS_REP, -+ RM_ACT_LINK_MEAS_REQ, -+ RM_ACT_LINK_MEAS_REP, -+ RM_ACT_NB_REP_REQ, /* 4 */ -+ RM_ACT_NB_REP_RESP, -+ RM_ACT_RESV, -+ RM_ACT_MAX -+}; -+ -+/* 802.11-2012 Table 8-119 RM Enabled Capabilities definition */ -+enum rm_cap_en { -+ RM_LINK_MEAS_CAP_EN, -+ RM_NB_REP_CAP_EN, /* neighbor report */ -+ RM_PARAL_MEAS_CAP_EN, /* parallel report */ -+ RM_REPEAT_MEAS_CAP_EN, -+ RM_BCN_PASSIVE_MEAS_CAP_EN, -+ RM_BCN_ACTIVE_MEAS_CAP_EN, -+ RM_BCN_TABLE_MEAS_CAP_EN, -+ RM_BCN_MEAS_REP_COND_CAP_EN, /* conditions */ -+ -+ RM_FRAME_MEAS_CAP_EN, -+ RM_CH_LOAD_CAP_EN, -+ RM_NOISE_HISTO_CAP_EN, /* noise historgram */ -+ RM_STATIS_MEAS_CAP_EN, /* statistics */ -+ RM_LCI_MEAS_CAP_EN, /* 12 */ -+ RM_LCI_AMIMUTH_CAP_EN, -+ RM_TRANS_STREAM_CAT_MEAS_CAP_EN, -+ RM_TRIG_TRANS_STREAM_CAT_MEAS_CAP_EN, -+ -+ RM_AP_CH_REP_CAP_EN, -+ RM_RM_MIB_CAP_EN, -+ RM_OP_CH_MAX_MEAS_DUR0, /* 18-20 */ -+ RM_OP_CH_MAX_MEAS_DUR1, -+ RM_OP_CH_MAX_MEAS_DUR2, -+ RM_NONOP_CH_MAX_MEAS_DUR0, /* 21-23 */ -+ RM_NONOP_CH_MAX_MEAS_DUR1, -+ RM_NONOP_CH_MAX_MEAS_DUR2, -+ -+ RM_MEAS_PILOT_CAP0, /* 24-26 */ -+ RM_MEAS_PILOT_CAP1, -+ RM_MEAS_PILOT_CAP2, -+ RM_MEAS_PILOT_TRANS_INFO_CAP_EN, -+ RM_NB_REP_TSF_OFFSET_CAP_EN, -+ RM_RCPI_MEAS_CAP_EN, /* 29 */ -+ RM_RSNI_MEAS_CAP_EN, -+ RM_BSS_AVG_ACCESS_DELAY_CAP_EN, -+ -+ RM_AVALB_ADMIS_CAPACITY_CAP_EN, -+ RM_ANT_CAP_EN, -+ RM_RSVD, /* 34-39 */ -+ RM_MAX -+}; -+ -+char *rm_state_name(enum RM_STATE state); -+char *rm_event_name(enum RM_EV_ID evid); -+char *rm_type_req_name(u8 meas_type); -+int _rm_post_event(_adapter *padapter, u32 rmid, enum RM_EV_ID evid); -+int rm_enqueue_rmobj(_adapter *padapter, struct rm_obj *obj, bool to_head); -+ -+void rm_free_rmobj(struct rm_obj *prm); -+struct rm_obj *rm_alloc_rmobj(_adapter *padapter); -+struct rm_obj *rm_get_rmobj(_adapter *padapter, u32 rmid); -+struct sta_info *rm_get_psta(_adapter *padapter, u32 rmid); -+ -+int retrieve_radio_meas_result(struct rm_obj *prm); -+int rm_radio_meas_report_cond(struct rm_obj *prm); -+int rm_recv_radio_mens_req(_adapter *padapter, -+ union recv_frame *precv_frame,struct sta_info *psta); -+int rm_recv_radio_mens_rep(_adapter *padapter, -+ union recv_frame *precv_frame, struct sta_info *psta); -+int rm_recv_link_mens_req(_adapter *padapter, -+ union recv_frame *precv_frame,struct sta_info *psta); -+int rm_recv_link_mens_rep(_adapter *padapter, -+ union recv_frame *precv_frame, struct sta_info *psta); -+int rm_radio_mens_nb_rep(_adapter *padapter, -+ union recv_frame *precv_frame, struct sta_info *psta); -+int issue_null_reply(struct rm_obj *prm); -+int issue_beacon_rep(struct rm_obj *prm); -+int issue_nb_req(struct rm_obj *prm); -+int issue_radio_meas_req(struct rm_obj *prm); -+int issue_radio_meas_rep(struct rm_obj *prm); -+int issue_link_meas_req(struct rm_obj *prm); -+int issue_link_meas_rep(struct rm_obj *prm); -+ -+void rm_set_rep_mode(struct rm_obj *prm, u8 mode); -+ -+int ready_for_scan(struct rm_obj *prm); -+int rm_sitesurvey(struct rm_obj *prm); -+ -+#endif /*CONFIG_RTW_80211K*/ -+#endif /*__RTW_RM_FSM_H_*/ -diff --git a/drivers/staging/rtl8723cs/include/rtw_rm_util.h b/drivers/staging/rtl8723cs/include/rtw_rm_util.h -new file mode 100644 -index 000000000000..932cfb9658b9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_rm_util.h -@@ -0,0 +1,47 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef _RTW_RM_UTIL_H_ -+#define _RTW_RM_UTIL_H_ -+/* -+ * define the following channels as the max channels in each channel plan. -+ * 2G, total 14 chnls -+ * {1,2,3,4,5,6,7,8,9,10,11,12,13,14} -+ * 5G, total 25 chnls -+ * {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,144,149,153,157,161,165} -+ */ -+#ifndef MAX -+#define MAX(x, y) (((x) > (y)) ? (x) : (y)) -+#endif -+ -+u8 rm_get_oper_class_via_ch(u8 ch); -+u8 rm_get_ch_set( struct rtw_ieee80211_channel *pch_set, u8 op_class, u8 ch_num); -+u8 rm_get_ch_set_from_bcn_req_opt( -+ struct rtw_ieee80211_channel *pch_set, struct bcn_req_opt *opt); -+u8 rm_get_bcn_rsni(struct rm_obj *prm, struct wlan_network *pnetwork); -+u8 rm_get_bcn_rcpi(struct rm_obj *prm, struct wlan_network *pnetwork); -+u8 rm_get_frame_rsni(struct rm_obj *prm, union recv_frame *pframe); -+u8 translate_percentage_to_rcpi(u32 SignalStrengthIndex); -+u8 translate_dbm_to_rcpi(s8 SignalPower); -+u8 rm_gen_dialog_token(_adapter *padapter); -+u8 rm_gen_meas_token(_adapter *padapter); -+u32 rm_gen_rmid(_adapter *padapter, struct rm_obj *prm, u8 role); -+int is_wildcard_bssid(u8 *bssid); -+ -+int rm_get_path_a_max_tx_power(_adapter *adapter, s8 *path_a); -+int rm_get_tx_power(PADAPTER adapter, enum rf_path path, enum MGN_RATE rate, s8 *pwr); -+int rm_get_rx_sensitivity(PADAPTER adapter, enum channel_width bw, enum MGN_RATE rate, s8 *pwr); -+ -+#endif /* _RTW_RM_UTIL_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_roch.h b/drivers/staging/rtl8723cs/include/rtw_roch.h -new file mode 100644 -index 000000000000..d3de7e299b59 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_roch.h -@@ -0,0 +1,61 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2020 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_ROCH_H__ -+#define __RTW_ROCH_H__ -+ -+#include -+ -+struct rtw_roch_parm; -+ -+#if (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211) -+struct roch_info { -+#ifdef CONFIG_CONCURRENT_MODE -+ _timer ap_roch_ch_switch_timer; /* Used to switch the channel between legacy AP and listen state. */ -+#ifdef CONFIG_IOCTL_CFG80211 -+ u32 min_home_dur; /* min duration for traffic, home_time */ -+ u32 max_away_dur; /* max acceptable away duration, home_away_time */ -+#endif -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ _timer remain_on_ch_timer; -+ u8 restore_channel; -+ struct ieee80211_channel remain_on_ch_channel; -+ enum nl80211_channel_type remain_on_ch_type; -+ ATOMIC_T ro_ch_cookie_gen; -+ u64 remain_on_ch_cookie; -+ bool is_ro_ch; -+ struct wireless_dev *ro_ch_wdev; -+ systime last_ro_ch_time; /* this will be updated at the beginning and end of ro_ch */ -+#endif -+}; -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+u8 rtw_roch_stay_in_cur_chan(_adapter *padapter); -+#endif -+ -+#if (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211) -+s32 rtw_roch_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf); -+u8 rtw_roch_wk_cmd(_adapter *padapter, int intCmdType, struct rtw_roch_parm *roch_parm, u8 flags); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+void rtw_concurrent_handler(_adapter *padapter); -+#endif -+ -+void rtw_init_roch_info(_adapter *padapter); -+#endif /* (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211) */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_rson.h b/drivers/staging/rtl8723cs/include/rtw_rson.h -new file mode 100644 -index 000000000000..6996738b071a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_rson.h -@@ -0,0 +1,61 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -+ * -+ * -+ ******************************************************************************/ -+#ifndef __RTW_RSON_H_ -+#define __RTW_RSON_H_ -+ -+ -+#define RTW_RSON_VER 1 -+ -+#define RTW_RSON_SCORE_NOTSUP 0x0 -+#define RTW_RSON_SCORE_NOTCNNT 0x1 -+#define RTW_RSON_SCORE_MAX 0xFF -+#define RTW_RSON_HC_NOTREADY 0xFF -+#define RTW_RSON_HC_ROOT 0x0 -+#define RTW_RSON_ALLOWCONNECT 0x1 -+#define RTW_RSON_DENYCONNECT 0x0 -+ -+ -+ -+/* for rtw self-origanization spec 1 */ -+struct rtw_rson_struct { -+ u8 ver; -+ u32 id; -+ u8 hopcnt; -+ u8 connectible; -+ u8 loading; -+ u8 res[16]; -+} __attribute__((__packed__)); -+ -+void init_rtw_rson_data(struct dvobj_priv *dvobj); -+void rtw_rson_get_property_str(_adapter *padapter, char *rson_data_str); -+int rtw_rson_set_property(_adapter *padapter, char *field, char *value); -+int rtw_rson_choose(struct wlan_network **candidate, struct wlan_network *competitor); -+int rtw_get_rson_struct(WLAN_BSSID_EX *bssid, struct rtw_rson_struct *rson_data); -+u8 rtw_cal_rson_score(struct rtw_rson_struct *cand_rson_data, NDIS_802_11_RSSI Rssi); -+void rtw_rson_handle_ie(WLAN_BSSID_EX *bssid, u8 ie_offset); -+u32 rtw_rson_append_ie(_adapter *padapter, unsigned char *pframe, u32 *len); -+void rtw_rson_do_disconnect(_adapter *padapter); -+void rtw_rson_join_done(_adapter *padapter); -+int rtw_rson_isupdate_roamcan(struct mlme_priv *mlme, struct wlan_network **candidate, struct wlan_network *competitor); -+void rtw_rson_show_survey_info(struct seq_file *m, _list *plist, _list *phead); -+u8 rtw_rson_ap_check_sta(_adapter *padapter, u8 *pframe, uint pkt_len, unsigned short ie_offset); -+u8 rtw_rson_scan_wk_cmd(_adapter *padapter, int op); -+void rtw_rson_scan_cmd_hdl(_adapter *padapter, int op); -+#endif /* __RTW_RSON_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_sdio.h b/drivers/staging/rtl8723cs/include/rtw_sdio.h -new file mode 100644 -index 000000000000..7490b5481328 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_sdio.h -@@ -0,0 +1,26 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2015 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_SDIO_H_ -+#define _RTW_SDIO_H_ -+ -+#include /* struct dvobj_priv and etc. */ -+ -+u8 rtw_sdio_read_cmd52(struct dvobj_priv *, u32 addr, void *buf, size_t len); -+u8 rtw_sdio_read_cmd53(struct dvobj_priv *, u32 addr, void *buf, size_t len); -+u8 rtw_sdio_write_cmd52(struct dvobj_priv *, u32 addr, void *buf, size_t len); -+u8 rtw_sdio_write_cmd53(struct dvobj_priv *, u32 addr, void *buf, size_t len); -+u8 rtw_sdio_f0_read(struct dvobj_priv *, u32 addr, void *buf, size_t len); -+ -+#endif /* _RTW_SDIO_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_security.h b/drivers/staging/rtl8723cs/include/rtw_security.h -new file mode 100644 -index 000000000000..9cceed6973b3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_security.h -@@ -0,0 +1,421 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_SECURITY_H_ -+#define __RTW_SECURITY_H_ -+ -+enum security_type { -+ /* TYPE */ -+ _NO_PRIVACY_ = 0x00, -+ _WEP40_ = 0x01, -+ _TKIP_ = 0x02, -+ _TKIP_WTMIC_ = 0x03, -+ _AES_ = 0x04, -+ _WEP104_ = 0x05, -+ _SMS4_ = 0x06, -+ _GCMP_ = 0x07, -+ _SEC_TYPE_MAX_, -+ -+ /* EXT_SECTYPE=1 */ -+ _SEC_TYPE_256_ = 0x10, -+ _CCMP_256_ = (_AES_ | _SEC_TYPE_256_), -+ _GCMP_256_ = (_GCMP_ | _SEC_TYPE_256_), -+ -+#ifdef CONFIG_IEEE80211W -+ /* EXT_SECTYPE=0, MGNT=1, GK=0/1, KEYID=00/01 */ -+ _SEC_TYPE_BIT_ = 0x20, -+ _BIP_CMAC_128_ = (_SEC_TYPE_BIT_), -+ _BIP_GMAC_128_ = (_SEC_TYPE_BIT_ + 1), -+ _BIP_GMAC_256_ = (_SEC_TYPE_BIT_ + 2), -+ /* EXT_SECTYPE=1, MGNT=1, GK=1, KEYID=00/01 */ -+ _BIP_CMAC_256_ = (_SEC_TYPE_BIT_ + 3), -+ _BIP_MAX_, -+#endif -+}; -+ -+/* 802.11W use wrong key */ -+#define IEEE80211W_RIGHT_KEY 0x0 -+#define IEEE80211W_WRONG_KEY 0x1 -+#define IEEE80211W_NO_KEY 0x2 -+ -+#define CCMPH_2_PN(ch) ((ch) & 0x000000000000ffff) \ -+ | (((ch) & 0xffffffff00000000) >> 16) -+ -+#define is_wep_enc(alg) (((alg) == _WEP40_) || ((alg) == _WEP104_)) -+ -+const char *security_type_str(u8 value); -+#ifdef CONFIG_IEEE80211W -+u32 security_type_bip_to_gmcs(enum security_type type); -+#endif -+ -+#define _WPA_IE_ID_ 0xdd -+#define _WPA2_IE_ID_ 0x30 -+ -+#define RTW_KEK_LEN 16 -+#define RTW_KCK_LEN 16 -+#define RTW_TKIP_MIC_LEN 8 -+#define RTW_REPLAY_CTR_LEN 8 -+ -+#define INVALID_SEC_MAC_CAM_ID 0xFF -+ -+typedef enum { -+ ENCRYP_PROTOCOL_OPENSYS, /* open system */ -+ ENCRYP_PROTOCOL_WEP, /* WEP */ -+ ENCRYP_PROTOCOL_WPA, /* WPA */ -+ ENCRYP_PROTOCOL_WPA2, /* WPA2 */ -+ ENCRYP_PROTOCOL_WAPI, /* WAPI: Not support in this version */ -+ ENCRYP_PROTOCOL_MAX -+} ENCRYP_PROTOCOL_E; -+ -+ -+#ifndef Ndis802_11AuthModeWPA2 -+#define Ndis802_11AuthModeWPA2 (Ndis802_11AuthModeWPANone + 1) -+#endif -+ -+#ifndef Ndis802_11AuthModeWPA2PSK -+#define Ndis802_11AuthModeWPA2PSK (Ndis802_11AuthModeWPANone + 2) -+#endif -+ -+union pn48 { -+ -+ u64 val; -+ -+#ifdef CONFIG_LITTLE_ENDIAN -+ -+struct { -+ u8 TSC0; -+ u8 TSC1; -+ u8 TSC2; -+ u8 TSC3; -+ u8 TSC4; -+ u8 TSC5; -+ u8 TSC6; -+ u8 TSC7; -+} _byte_; -+ -+#elif defined(CONFIG_BIG_ENDIAN) -+ -+struct { -+ u8 TSC7; -+ u8 TSC6; -+ u8 TSC5; -+ u8 TSC4; -+ u8 TSC3; -+ u8 TSC2; -+ u8 TSC1; -+ u8 TSC0; -+} _byte_; -+ -+#endif -+ -+}; -+ -+union Keytype { -+ u8 skey[32]; -+}; -+ -+typedef struct _RT_PMKID_LIST { -+ u8 bUsed; -+ u8 Bssid[6]; -+ u8 PMKID[16]; -+ u8 SsidBuf[33]; -+ u8 *ssid_octet; -+ u16 ssid_length; -+} RT_PMKID_LIST, *PRT_PMKID_LIST; -+ -+ -+struct security_priv { -+ u32 dot11AuthAlgrthm; /* 802.11 auth, could be open, shared, 8021x and authswitch */ -+ u32 dot11PrivacyAlgrthm; /* This specify the privacy for shared auth. algorithm. */ -+ -+ /* WEP */ -+ u32 dot11PrivacyKeyIndex; /* this is only valid for legendary wep, 0~3 for key id. (tx key index) */ -+ union Keytype dot11DefKey[6]; /* this is only valid for def. key */ -+ u32 dot11DefKeylen[6]; -+ u8 dot11Def_camid[6]; -+ u8 key_mask; /* use to restore wep key after hal_init */ -+ -+ u32 dot118021XGrpPrivacy; /* This specify the privacy algthm. used for Grp key */ -+ u32 dot118021XGrpKeyid; /* key id used for Grp Key ( tx key index) */ -+ union Keytype dot118021XGrpKey[6]; /* 802.1x Group Key, for inx0 and inx1 */ -+ union Keytype dot118021XGrptxmickey[6]; -+ union Keytype dot118021XGrprxmickey[6]; -+ union pn48 dot11Grptxpn; /* PN48 used for Grp Key xmit. */ -+ union pn48 dot11Grprxpn; /* PN48 used for Grp Key recv. */ -+ u8 iv_seq[4][8]; -+#ifdef CONFIG_IEEE80211W -+ enum security_type dot11wCipher; -+ u32 dot11wBIPKeyid; /* key id used for BIP Key ( tx key index) */ -+ union Keytype dot11wBIPKey[6]; /* BIP Key, for index4 and index5 */ -+ union pn48 dot11wBIPtxpn; /* PN48 used for BIP xmit. */ -+ union pn48 dot11wBIPrxpn; /* PN48 used for BIP recv. */ -+#endif /* CONFIG_IEEE80211W */ -+#ifdef CONFIG_AP_MODE -+ /* extend security capabilities for AP_MODE */ -+ unsigned int dot8021xalg;/* 0:disable, 1:psk, 2:802.1x */ -+ unsigned int wpa_psk;/* 0:disable, bit(0): WPA, bit(1):WPA2 */ -+ unsigned int wpa_group_cipher; -+ unsigned int wpa2_group_cipher; -+ unsigned int wpa_pairwise_cipher; -+ unsigned int wpa2_pairwise_cipher; -+ unsigned int akmp; /* An authentication and key management protocol */ -+#endif -+ u8 mfp_opt; -+ u8 dot118021x_bmc_cam_id; -+ /*IEEE802.11-2012 Std. Table 8-101 AKM Suite Selectors*/ -+ u32 rsn_akm_suite_type; -+ -+ u8 wps_ie[MAX_WPS_IE_LEN];/* added in assoc req */ -+ int wps_ie_len; -+ -+ u8 owe_ie[MAX_OWE_IE_LEN];/* added in assoc req */ -+ int owe_ie_len; -+ -+ u8 binstallGrpkey; -+#ifdef CONFIG_GTK_OL -+ u8 binstallKCK_KEK; -+#endif /* CONFIG_GTK_OL */ -+#ifdef CONFIG_IEEE80211W -+ u8 binstallBIPkey; -+#endif /* CONFIG_IEEE80211W */ -+ u8 busetkipkey; -+ u8 bcheck_grpkey; -+ u8 bgrpkey_handshake; -+ -+ u8 auth_alg; -+ u8 auth_type; -+ u8 extauth_status; -+ /* u8 packet_cnt; */ /* unused, removed */ -+ -+ s32 sw_encrypt;/* from registry_priv */ -+ s32 sw_decrypt;/* from registry_priv */ -+ -+ s32 hw_decrypted;/* if the rx packets is hw_decrypted==_FALSE, it means the hw has not been ready. */ -+ -+ -+ /* keeps the auth_type & enc_status from upper layer ioctl(wpa_supplicant or wzc) */ -+ u32 ndisauthtype; /* NDIS_802_11_AUTHENTICATION_MODE */ -+ u32 ndisencryptstatus; /* NDIS_802_11_ENCRYPTION_STATUS */ -+ -+ NDIS_802_11_WEP ndiswep; -+ -+ u8 assoc_info[600]; -+ u8 szofcapability[256]; /* for wpa2 usage */ -+ u8 oidassociation[512]; /* for wpa/wpa2 usage */ -+ u8 authenticator_ie[256]; /* store ap security information element */ -+ u8 supplicant_ie[256]; /* store sta security information element */ -+ -+ -+ /* for tkip countermeasure */ -+ systime last_mic_err_time; -+ u8 btkip_countermeasure; -+ u8 btkip_wait_report; -+ systime btkip_countermeasure_time; -+ -+ /* --------------------------------------------------------------------------- */ -+ /* For WPA2 Pre-Authentication. */ -+ /* --------------------------------------------------------------------------- */ -+ /* u8 RegEnablePreAuth; */ /* Default value: Pre-Authentication enabled or not, from registry "EnablePreAuth". Added by Annie, 2005-11-01. */ -+ /* u8 EnablePreAuthentication; */ /* Current Value: Pre-Authentication enabled or not. */ -+ RT_PMKID_LIST PMKIDList[NUM_PMKID_CACHE]; /* Renamed from PreAuthKey[NUM_PRE_AUTH_KEY]. Annie, 2006-10-13. */ -+ u8 PMKIDIndex; -+ /* u32 PMKIDCount; */ /* Added by Annie, 2006-10-13. */ -+ /* u8 szCapability[256]; */ /* For WPA2-PSK using zero-config, by Annie, 2005-09-20. */ -+ -+ u8 bWepDefaultKeyIdxSet; -+ -+#define DBG_SW_SEC_CNT -+#ifdef DBG_SW_SEC_CNT -+ u64 wep_sw_enc_cnt_bc; -+ u64 wep_sw_enc_cnt_mc; -+ u64 wep_sw_enc_cnt_uc; -+ u64 wep_sw_dec_cnt_bc; -+ u64 wep_sw_dec_cnt_mc; -+ u64 wep_sw_dec_cnt_uc; -+ -+ u64 tkip_sw_enc_cnt_bc; -+ u64 tkip_sw_enc_cnt_mc; -+ u64 tkip_sw_enc_cnt_uc; -+ u64 tkip_sw_dec_cnt_bc; -+ u64 tkip_sw_dec_cnt_mc; -+ u64 tkip_sw_dec_cnt_uc; -+ -+ u64 aes_sw_enc_cnt_bc; -+ u64 aes_sw_enc_cnt_mc; -+ u64 aes_sw_enc_cnt_uc; -+ u64 aes_sw_dec_cnt_bc; -+ u64 aes_sw_dec_cnt_mc; -+ u64 aes_sw_dec_cnt_uc; -+ -+ u64 gcmp_sw_enc_cnt_bc; -+ u64 gcmp_sw_enc_cnt_mc; -+ u64 gcmp_sw_enc_cnt_uc; -+ u64 gcmp_sw_dec_cnt_bc; -+ u64 gcmp_sw_dec_cnt_mc; -+ u64 gcmp_sw_dec_cnt_uc; -+#endif /* DBG_SW_SEC_CNT */ -+}; -+ -+#ifdef CONFIG_IEEE80211W -+#define SEC_IS_BIP_KEY_INSTALLED(sec) ((sec)->binstallBIPkey) -+#else -+#define SEC_IS_BIP_KEY_INSTALLED(sec) _FALSE -+#endif -+ -+#define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst)\ -+ do {\ -+ switch (psecuritypriv->dot11AuthAlgrthm) {\ -+ case dot11AuthAlgrthm_Open:\ -+ case dot11AuthAlgrthm_Shared:\ -+ case dot11AuthAlgrthm_Auto:\ -+ encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm;\ -+ break;\ -+ case dot11AuthAlgrthm_8021X:\ -+ if (bmcst)\ -+ encry_algo = (u8)psecuritypriv->dot118021XGrpPrivacy;\ -+ else\ -+ encry_algo = (u8) psta->dot118021XPrivacy;\ -+ break;\ -+ case dot11AuthAlgrthm_WAPI:\ -+ encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm;\ -+ break;\ -+ } \ -+ } while (0) -+ -+#define _AES_IV_LEN_ 8 -+ -+#define SET_ICE_IV_LEN(iv_len, icv_len, encrypt)\ -+ do {\ -+ switch (encrypt) {\ -+ case _WEP40_:\ -+ case _WEP104_:\ -+ iv_len = 4;\ -+ icv_len = 4;\ -+ break;\ -+ case _TKIP_:\ -+ iv_len = 8;\ -+ icv_len = 4;\ -+ break;\ -+ case _AES_:\ -+ iv_len = 8;\ -+ icv_len = 8;\ -+ break;\ -+ case _GCMP_:\ -+ case _GCMP_256_:\ -+ iv_len = 8;\ -+ icv_len = 16;\ -+ break;\ -+ case _CCMP_256_:\ -+ iv_len = 8;\ -+ icv_len = 16;\ -+ break;\ -+ case _SMS4_:\ -+ iv_len = 18;\ -+ icv_len = 16;\ -+ break;\ -+ default:\ -+ iv_len = 0;\ -+ icv_len = 0;\ -+ break;\ -+ } \ -+ } while (0) -+ -+ -+#define GET_TKIP_PN(iv, dot11txpn)\ -+ do {\ -+ dot11txpn._byte_.TSC0 = iv[2];\ -+ dot11txpn._byte_.TSC1 = iv[0];\ -+ dot11txpn._byte_.TSC2 = iv[4];\ -+ dot11txpn._byte_.TSC3 = iv[5];\ -+ dot11txpn._byte_.TSC4 = iv[6];\ -+ dot11txpn._byte_.TSC5 = iv[7];\ -+ } while (0) -+ -+ -+#define ROL32(A, n) (((A) << (n)) | (((A)>>(32-(n))) & ((1UL << (n)) - 1))) -+#define ROR32(A, n) ROL32((A), 32-(n)) -+ -+struct mic_data { -+ u32 K0, K1; /* Key */ -+ u32 L, R; /* Current state */ -+ u32 M; /* Message accumulator (single word) */ -+ u32 nBytesInM; /* # bytes in M */ -+}; -+ -+void rtw_secmicsetkey(struct mic_data *pmicdata, u8 *key); -+void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b); -+void rtw_secmicappend(struct mic_data *pmicdata, u8 *src, u32 nBytes); -+void rtw_secgetmic(struct mic_data *pmicdata, u8 *dst); -+ -+void rtw_seccalctkipmic( -+ u8 *key, -+ u8 *header, -+ u8 *data, -+ u32 data_len, -+ u8 *Miccode, -+ u8 priority); -+ -+u32 rtw_aes_encrypt(_adapter *padapter, u8 *pxmitframe); -+u32 rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe); -+void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe); -+ -+u32 rtw_aes_decrypt(_adapter *padapter, u8 *precvframe); -+u32 rtw_tkip_decrypt(_adapter *padapter, u8 *precvframe); -+void rtw_wep_decrypt(_adapter *padapter, u8 *precvframe); -+ -+u32 rtw_gcmp_encrypt(_adapter *padapter, u8 *pxmitframe); -+u32 rtw_gcmp_decrypt(_adapter *padapter, u8 *precvframe); -+ -+#ifdef CONFIG_RTW_MESH_AEK -+int rtw_aes_siv_encrypt(const u8 *key, size_t key_len, -+ const u8 *pw, size_t pwlen, size_t num_elem, -+ const u8 *addr[], const size_t *len, u8 *out); -+int rtw_aes_siv_decrypt(const u8 *key, size_t key_len, -+ const u8 *iv_crypt, size_t iv_c_len, size_t num_elem, -+ const u8 *addr[], const size_t *len, u8 *out); -+#endif /* CONFIG_RTW_MESH_AEK */ -+ -+#ifdef CONFIG_IEEE80211W -+u8 rtw_calculate_bip_mic(enum security_type gmcs, u8 *whdr_pos, s32 len, -+ const u8 *key, const u8 *data, size_t data_len, u8 *mic); -+u32 rtw_bip_verify(enum security_type gmcs, u16 pkt_len, -+ u8 *whdr_pos, sint flen, const u8 *key, u16 keyid, u64 *ipn); -+#endif -+#ifdef CONFIG_TDLS -+void wpa_tdls_generate_tpk(_adapter *padapter, void *sta); -+int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, -+ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie, -+ u8 *mic); -+int wpa_tdls_teardown_ftie_mic(u8 *kck, u8 *lnkid, u16 reason, -+ u8 dialog_token, u8 trans_seq, u8 *ftie, u8 *mic); -+int tdls_verify_mic(u8 *kck, u8 trans_seq, -+ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie); -+#endif /* CONFIG_TDLS */ -+ -+void rtw_sec_restore_wep_key(_adapter *adapter); -+u8 rtw_handle_tkip_countermeasure(_adapter *adapter, const char *caller); -+ -+#ifdef CONFIG_WOWLAN -+u16 rtw_calc_crc(u8 *pdata, int length); -+#endif /*CONFIG_WOWLAN*/ -+ -+#define rtw_sec_chk_auth_alg(a, s) \ -+ ((a)->securitypriv.auth_alg == (s)) -+ -+#define rtw_sec_chk_auth_type(a, s) \ -+ ((a)->securitypriv.auth_type == (s)) -+ -+#endif /* __RTL871X_SECURITY_H_ */ -+ -+u32 rtw_calc_crc32(u8 *data, size_t len); -diff --git a/drivers/staging/rtl8723cs/include/rtw_sreset.h b/drivers/staging/rtl8723cs/include/rtw_sreset.h -new file mode 100644 -index 000000000000..1fd999a9d76e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_sreset.h -@@ -0,0 +1,66 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_SRESET_H_ -+#define _RTW_SRESET_H_ -+ -+/* #include */ -+ -+enum { -+ SRESET_TGP_NULL = 0, -+ SRESET_TGP_XMIT_STATUS = 1, -+ SRESET_TGP_LINK_STATUS = 2, -+ SRESET_TGP_INFO = 99, -+}; -+ -+struct sreset_priv { -+ _mutex silentreset_mutex; -+ u8 silent_reset_inprogress; -+ u8 Wifi_Error_Status; -+ systime last_tx_time; -+ systime last_tx_complete_time; -+ -+ s32 dbg_trigger_point; -+ u64 self_dect_tx_cnt; -+ u64 self_dect_rx_cnt; -+ u64 self_dect_fw_cnt; -+ u64 tx_dma_status_cnt; -+ u64 rx_dma_status_cnt; -+ u8 rx_cnt; -+ u8 self_dect_fw; -+ u8 self_dect_case; -+ u16 last_mac_rxff_ptr; -+ u8 dbg_sreset_ctrl; -+}; -+ -+ -+ -+#define WIFI_STATUS_SUCCESS 0 -+#define USB_VEN_REQ_CMD_FAIL BIT0 -+#define USB_READ_PORT_FAIL BIT1 -+#define USB_WRITE_PORT_FAIL BIT2 -+#define WIFI_MAC_TXDMA_ERROR BIT3 -+#define WIFI_TX_HANG BIT4 -+#define WIFI_RX_HANG BIT5 -+#define WIFI_IF_NOT_EXIST BIT6 -+ -+void sreset_init_value(_adapter *padapter); -+void sreset_reset_value(_adapter *padapter); -+u8 sreset_get_wifi_status(_adapter *padapter); -+void sreset_set_wifi_error_status(_adapter *padapter, u32 status); -+void sreset_set_trigger_point(_adapter *padapter, s32 tgp); -+bool sreset_inprogress(_adapter *padapter); -+void sreset_reset(_adapter *padapter); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_swcrypto.h b/drivers/staging/rtl8723cs/include/rtw_swcrypto.h -new file mode 100644 -index 000000000000..b00878ea8142 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_swcrypto.h -@@ -0,0 +1,49 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __RTW_SWCRYPTO_H_ -+#define __RTW_SWCRYPTO_H_ -+ -+#define NEW_CRYPTO 1 -+ -+int _rtw_ccmp_encrypt(u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen); -+int _rtw_ccmp_decrypt(u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen); -+ -+int _rtw_gcmp_encrypt(u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen); -+int _rtw_gcmp_decrypt(u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen); -+ -+#ifdef CONFIG_RTW_MESH_AEK -+int _aes_siv_encrypt(const u8 *key, size_t key_len, -+ const u8 *pw, size_t pwlen, -+ size_t num_elem, const u8 *addr[], const size_t *len, u8 *out); -+int _aes_siv_decrypt(const u8 *key, size_t key_len, -+ const u8 *iv_crypt, size_t iv_c_len, -+ size_t num_elem, const u8 *addr[], const size_t *len, u8 *out); -+#endif -+ -+#if defined(CONFIG_IEEE80211W) | defined(CONFIG_TDLS) -+u8 _bip_ccmp_protect(const u8 *key, size_t key_len, -+ const u8 *data, size_t data_len, u8 *mic); -+u8 _bip_gcmp_protect(u8 *whdr_pos, size_t len, -+ const u8 *key, size_t key_len, -+ const u8 *data, size_t data_len, u8 *mic); -+#endif /* CONFIG_IEEE80211W */ -+ -+#ifdef CONFIG_TDLS -+void _tdls_generate_tpk(void *sta, const u8 *own_addr, const u8 *bssid); -+#endif /* CONFIG_TDLS */ -+ -+#endif /* __RTW_SWCRYPTO_H_ */ -+ -diff --git a/drivers/staging/rtl8723cs/include/rtw_tdls.h b/drivers/staging/rtl8723cs/include/rtw_tdls.h -new file mode 100644 -index 000000000000..5c23e4ea4c2f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_tdls.h -@@ -0,0 +1,185 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_TDLS_H_ -+#define __RTW_TDLS_H_ -+ -+ -+#ifdef CONFIG_TDLS -+/* TDLS STA state */ -+ -+ -+/* TDLS Diect Link Establishment */ -+#define TDLS_STATE_NONE 0x00000000 /* Default state */ -+#define TDLS_INITIATOR_STATE BIT(28) /* 0x10000000 */ -+#define TDLS_RESPONDER_STATE BIT(29) /* 0x20000000 */ -+#define TDLS_LINKED_STATE BIT(30) /* 0x40000000 */ -+/* TDLS PU Buffer STA */ -+#define TDLS_WAIT_PTR_STATE BIT(24) /* 0x01000000 */ /* Waiting peer's TDLS_PEER_TRAFFIC_RESPONSE frame */ -+/* TDLS Check ALive */ -+#define TDLS_ALIVE_STATE BIT(20) /* 0x00100000 */ /* Check if peer sta is alived. */ -+/* TDLS Channel Switch */ -+#define TDLS_CH_SWITCH_PREPARE_STATE BIT(15) /* 0x00008000 */ -+#define TDLS_CH_SWITCH_ON_STATE BIT(16) /* 0x00010000 */ -+#define TDLS_PEER_AT_OFF_STATE BIT(17) /* 0x00020000 */ /* Could send pkt on target ch */ -+#define TDLS_CH_SW_INITIATOR_STATE BIT(18) /* 0x00040000 */ /* Avoid duplicated or unconditional ch. switch rsp. */ -+#define TDLS_WAIT_CH_RSP_STATE BIT(19) /* 0x00080000 */ /* Wait Ch. response as we are TDLS channel switch initiator */ -+ -+ -+#define TDLS_TPK_RESEND_COUNT 86400 /*Unit: seconds */ -+#define TDLS_CH_SWITCH_TIME 15 -+#define TDLS_CH_SWITCH_TIMEOUT 30 -+#define TDLS_CH_SWITCH_OPER_OFFLOAD_TIMEOUT 10 -+#define TDLS_SIGNAL_THRESH 0x20 -+#define TDLS_WATCHDOG_PERIOD 10 /* Periodically sending tdls discovery request in TDLS_WATCHDOG_PERIOD * 2 sec */ -+#define TDLS_HANDSHAKE_TIME 3000 -+#define TDLS_PTI_TIME 7000 -+ -+#define TDLS_CH_SW_STAY_ON_BASE_CHNL_TIMEOUT 20 /* ms */ -+#define TDLS_CH_SW_MONITOR_TIMEOUT 2000 /*ms */ -+ -+#define TDLS_MIC_LEN 16 -+#define WPA_NONCE_LEN 32 -+#define TDLS_TIMEOUT_LEN 4 -+ -+enum TDLS_CH_SW_CHNL { -+ TDLS_CH_SW_BASE_CHNL = 0, -+ TDLS_CH_SW_OFF_CHNL -+}; -+ -+#define TDLS_MIC_CTRL_LEN 2 -+#define TDLS_FTIE_DATA_LEN (TDLS_MIC_CTRL_LEN + TDLS_MIC_LEN + \ -+ WPA_NONCE_LEN + WPA_NONCE_LEN) -+struct wpa_tdls_ftie { -+ u8 ie_type; /* FTIE */ -+ u8 ie_len; -+ union { -+ struct { -+ u8 mic_ctrl[TDLS_MIC_CTRL_LEN]; -+ u8 mic[TDLS_MIC_LEN]; -+ u8 Anonce[WPA_NONCE_LEN]; /* Responder Nonce in TDLS */ -+ u8 Snonce[WPA_NONCE_LEN]; /* Initiator Nonce in TDLS */ -+ }; -+ struct { -+ u8 data[TDLS_FTIE_DATA_LEN]; -+ }; -+ }; -+ /* followed by optional elements */ -+} ; -+ -+struct wpa_tdls_lnkid { -+ u8 ie_type; /* Link Identifier IE */ -+ u8 ie_len; -+ u8 bssid[ETH_ALEN]; -+ u8 init_sta[ETH_ALEN]; -+ u8 resp_sta[ETH_ALEN]; -+} ; -+ -+static u8 TDLS_RSNIE[20] = { 0x01, 0x00, /* Version shall be set to 1 */ -+ 0x00, 0x0f, 0xac, 0x07, /* Group sipher suite */ -+ 0x01, 0x00, /* Pairwise cipher suite count */ -+ 0x00, 0x0f, 0xac, 0x04, /* Pairwise cipher suite list; CCMP only */ -+ 0x01, 0x00, /* AKM suite count */ -+ 0x00, 0x0f, 0xac, 0x07, /* TPK Handshake */ -+ 0x0c, 0x02, -+ /* PMKID shall not be present */ -+ }; -+ -+static u8 TDLS_WMMIE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; /* Qos info all set zero */ -+ -+static u8 TDLS_WMM_PARAM_IE[] = {0x00, 0x00, 0x03, 0xa4, 0x00, 0x00, 0x27, 0xa4, 0x00, 0x00, 0x42, 0x43, 0x5e, 0x00, 0x62, 0x32, 0x2f, 0x00}; -+ -+static u8 TDLS_EXT_CAPIE[] = {0x00, 0x00, 0x00, 0x50, 0x20, 0x00, 0x00, 0x00}; /* bit(28), bit(30), bit(37) */ -+ -+/* SRC: Supported Regulatory Classes */ -+static u8 TDLS_SRC[] = { 0x01, 0x01, 0x02, 0x03, 0x04, 0x0c, 0x16, 0x17, 0x18, 0x19, 0x1b, 0x1c, 0x1d, 0x1e, 0x20, 0x21 }; -+ -+int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len); -+int check_ap_tdls_ch_switching_prohibited(u8 *pframe, u8 pkt_len); -+ -+void rtw_set_tdls_enable(_adapter *padapter, u8 enable); -+u8 rtw_is_tdls_enabled(_adapter *padapter); -+u8 rtw_is_tdls_sta_existed(_adapter *padapter); -+u8 rtw_tdls_is_setup_allowed(_adapter *padapter); -+#ifdef CONFIG_TDLS_CH_SW -+u8 rtw_tdls_is_chsw_allowed(_adapter *padapter); -+#endif -+ -+void rtw_tdls_set_link_established(_adapter *adapter, bool en); -+void rtw_reset_tdls_info(_adapter *padapter); -+int rtw_init_tdls_info(_adapter *padapter); -+void rtw_free_tdls_info(struct tdls_info *ptdlsinfo); -+void rtw_free_all_tdls_sta(_adapter *padapter, u8 enqueue_cmd); -+void rtw_enable_tdls_func(_adapter *padapter); -+void rtw_disable_tdls_func(_adapter *padapter, u8 enqueue_cmd); -+int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms); -+void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta); -+void rtw_cancel_tdls_timer(struct sta_info *psta); -+void rtw_tdls_teardown_pre_hdl(_adapter *padapter, struct sta_info *psta); -+void rtw_tdls_teardown_post_hdl(_adapter *padapter, struct sta_info *psta, u8 enqueue_cmd); -+ -+#ifdef CONFIG_TDLS_CH_SW -+void rtw_tdls_set_ch_sw_oper_control(_adapter *padapter, u8 enable); -+void rtw_tdls_ch_sw_back_to_base_chnl(_adapter *padapter); -+s32 rtw_tdls_do_ch_sw(_adapter *padapter, struct sta_info *ptdls_sta, u8 chnl_type, u8 channel, u8 channel_offset, u16 bwmode, u16 ch_switch_time); -+void rtw_tdls_chsw_oper_done(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_WFD -+int issue_tunneled_probe_req(_adapter *padapter); -+int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame); -+#endif /* CONFIG_WFD */ -+int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); -+int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack); -+int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); -+int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt); -+int issue_tdls_dis_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy); -+int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack); -+int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *psta, struct tdls_txmgmt *ptxmgmt); -+int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *psta); -+#ifdef CONFIG_TDLS_CH_SW -+int issue_tdls_ch_switch_req(_adapter *padapter, struct sta_info *ptdls_sta); -+int issue_tdls_ch_switch_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack); -+#endif -+sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame); -+sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta); -+int On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta); -+int On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta); -+int On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame); -+int On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta); -+int On_TDLS_Peer_Traffic_Indication(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta); -+int On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta); -+#ifdef CONFIG_TDLS_CH_SW -+sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta); -+sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta); -+void rtw_build_tdls_ch_switch_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta); -+void rtw_build_tdls_ch_switch_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta); -+#endif -+void rtw_build_tdls_setup_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta); -+void rtw_build_tdls_setup_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta); -+void rtw_build_tdls_setup_cfm_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta); -+void rtw_build_tdls_teardown_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta); -+void rtw_build_tdls_dis_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt); -+void rtw_build_tdls_dis_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, u8 privacy); -+void rtw_build_tdls_peer_traffic_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta); -+void rtw_build_tdls_peer_traffic_indication_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta); -+void rtw_build_tunneled_probe_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe); -+void rtw_build_tunneled_probe_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe); -+ -+int rtw_tdls_is_driver_setup(_adapter *padapter); -+void rtw_tdls_set_key(_adapter *padapter, struct sta_info *ptdls_sta); -+const char *rtw_tdls_action_txt(enum TDLS_ACTION_FIELD action); -+#endif /* CONFIG_TDLS */ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_version.h b/drivers/staging/rtl8723cs/include/rtw_version.h -new file mode 100644 -index 000000000000..667edeae05d1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_version.h -@@ -0,0 +1,3 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+#define DRIVERVERSION "v5.12.2-7-g2de5ec386.20201013_beta" -+#define BTCOEXVERSION "COEX20180330-1e00" -diff --git a/drivers/staging/rtl8723cs/include/rtw_vht.h b/drivers/staging/rtl8723cs/include/rtw_vht.h -new file mode 100644 -index 000000000000..f08ac4f19d6e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_vht.h -@@ -0,0 +1,184 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_VHT_H_ -+#define _RTW_VHT_H_ -+ -+#define VHT_CAP_IE_LEN 12 -+#define VHT_OP_IE_LEN 5 -+ -+#define LDPC_VHT_ENABLE_RX BIT0 -+#define LDPC_VHT_ENABLE_TX BIT1 -+#define LDPC_VHT_TEST_TX_ENABLE BIT2 -+#define LDPC_VHT_CAP_TX BIT3 -+ -+#define STBC_VHT_ENABLE_RX BIT0 -+#define STBC_VHT_ENABLE_TX BIT1 -+#define STBC_VHT_TEST_TX_ENABLE BIT2 -+#define STBC_VHT_CAP_TX BIT3 -+ -+/* VHT capability info */ -+#define SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) -+#define SET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 2, 2, _val) -+#define SET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 5, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 6, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 0, 3, _val) -+#define SET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 3, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 4, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 5, 3, _val) -+#define SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 0, 3, _val) -+ -+#define SET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 3, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 4, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 5, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_HTC_VHT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 1, _val) -+#define SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+2, 7, 3, _val) /* B23~B25 */ -+#define SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+3, 2, 2, _val) -+#define SET_VHT_CAPABILITY_ELE_MCS_RX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+4, 0, 16, _val) /* B0~B15 indicate Rx MCS MAP, we write 0 to indicate MCS0~7. by page */ -+#define SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+6, 0, 13, _val) -+#define SET_VHT_CAPABILITY_ELE_MCS_TX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+8, 0, 16, _val) /* B0~B15 indicate Tx MCS MAP, we write 0 to indicate MCS0~7. by page */ -+#define SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+10, 0, 13, _val) -+ -+ -+#define GET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2) -+#define GET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 2, 2) -+#define GET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 1) -+#define GET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 5, 1) -+#define GET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 6, 1) -+#define GET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) -+#define GET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 3) -+#define GET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 3, 1) -+#define GET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 4, 1) -+/*phydm-beamforming*/ -+#define GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+1, 5, 3) -+#define GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 0, 3) -+#define GET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 3, 1) -+#define GET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 4, 1) -+#define GET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 5, 1) -+#define GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 7, 3) -+#define GET_VHT_CAPABILITY_ELE_RX_MCS(_pEleStart) ((_pEleStart)+4) -+#define GET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+6, 0, 13) -+#define GET_VHT_CAPABILITY_ELE_TX_MCS(_pEleStart) ((_pEleStart)+8) -+#define GET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+10, 0, 13) -+ -+ -+/* VHT Operation Information Element */ -+#define SET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 8, _val) -+#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+1, 0, 8, _val) -+#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+2, 0, 8, _val) -+#define SET_VHT_OPERATION_ELE_BASIC_MCS_SET(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+3, 0, 16, _val) -+ -+#define GET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 8) -+#define GET_VHT_OPERATION_ELE_CENTER_FREQ1(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 8) -+#define GET_VHT_OPERATION_ELE_CENTER_FREQ2(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 0, 8) -+ -+/* VHT Operating Mode */ -+#define SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) -+#define SET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 3, _val) -+#define SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val) -+#define GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2) -+#define GET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 3) -+#define GET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) -+ -+#define SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+7, 6, 1, _val) -+#define GET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+7, 6, 1) -+ -+#define VHT_MAX_MPDU_LEN_MAX 3 -+extern const u16 _vht_max_mpdu_len[]; -+#define vht_max_mpdu_len(val) (((val) >= VHT_MAX_MPDU_LEN_MAX) ? _vht_max_mpdu_len[VHT_MAX_MPDU_LEN_MAX] : _vht_max_mpdu_len[(val)]) -+ -+#define VHT_SUP_CH_WIDTH_SET_MAX 3 -+extern const u8 _vht_sup_ch_width_set_to_bw_cap[]; -+#define vht_sup_ch_width_set_to_bw_cap(set) (((set) >= VHT_SUP_CH_WIDTH_SET_MAX) ? _vht_sup_ch_width_set_to_bw_cap[VHT_SUP_CH_WIDTH_SET_MAX] : _vht_sup_ch_width_set_to_bw_cap[(set)]) -+#define VHT_MAX_AMPDU_LEN(f) ((1 << (13 + f)) - 1) -+ -+#ifdef CONFIG_RTW_DEBUG -+extern const char *const _vht_sup_ch_width_set_str[]; -+#define vht_sup_ch_width_set_str(set) (((set) >= VHT_SUP_CH_WIDTH_SET_MAX) ? _vht_sup_ch_width_set_str[VHT_SUP_CH_WIDTH_SET_MAX] : _vht_sup_ch_width_set_str[(set)]) -+ -+void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len); -+ -+#define VHT_OP_CH_WIDTH_MAX 4 -+extern const char *const _vht_op_ch_width_str[]; -+#define vht_op_ch_width_str(ch_width) (((ch_width) >= VHT_OP_CH_WIDTH_MAX) ? _vht_op_ch_width_str[VHT_OP_CH_WIDTH_MAX] : _vht_op_ch_width_str[(ch_width)]) -+ -+void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len); -+#endif -+ -+struct vht_bf_cap { -+ u8 is_mu_bfer; -+ u8 su_sound_dim; -+}; -+ -+struct vht_priv { -+ u8 vht_option; -+ -+ u8 ldpc_cap; -+ u8 stbc_cap; -+ u16 beamform_cap; -+ struct vht_bf_cap ap_bf_cap; -+ -+ u8 sgi_80m;/* short GI */ -+ u8 ampdu_len; -+ -+ u8 vht_highest_rate; -+ u8 vht_mcs_map[2]; -+ -+ u8 op_present:1; /* vht_op is present */ -+ u8 notify_present:1; /* vht_op_mode_notify is present */ -+ -+ u8 vht_cap[32]; -+ u8 vht_op[VHT_OP_IE_LEN]; -+ u8 vht_op_mode_notify; -+}; -+ -+#ifdef ROKU_PRIVATE -+struct vht_priv_infra_ap { -+ -+ /* Infra mode, only store for AP's info, not intersection of STA and AP*/ -+ u8 ldpc_cap_infra_ap; -+ u8 stbc_cap_infra_ap; -+ u16 beamform_cap_infra_ap; -+ u8 vht_mcs_map_infra_ap[2]; -+ u8 vht_mcs_map_tx_infra_ap[2]; -+ u8 channel_width_infra_ap; -+ u8 number_of_streams_infra_ap; -+}; -+#endif /* ROKU_PRIVATE */ -+ -+u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map); -+u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate); -+u64 rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss); -+void rtw_vht_use_default_setting(_adapter *padapter); -+u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel); -+u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw); -+u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf); -+void update_sta_vht_info_apmode(_adapter *padapter, void *psta); -+void update_hw_vht_param(_adapter *padapter); -+void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+#ifdef ROKU_PRIVATE -+void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+#endif /* ROKU_PRIVATE */ -+void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, void *sta); -+u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len); -+void VHTOnAssocRsp(_adapter *padapter); -+u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map); -+void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map); -+void rtw_vht_ies_attach(_adapter *padapter, WLAN_BSSID_EX *pcur_network); -+void rtw_vht_ies_detach(_adapter *padapter, WLAN_BSSID_EX *pcur_network); -+void rtw_check_for_vht20(_adapter *adapter, u8 *ies, int ies_len); -+#endif /* _RTW_VHT_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/rtw_wapi.h b/drivers/staging/rtl8723cs/include/rtw_wapi.h -new file mode 100644 -index 000000000000..512bb7f300a2 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_wapi.h -@@ -0,0 +1,230 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __INC_WAPI_H -+#define __INC_WAPI_H -+ -+ -+#define CONFIG_WAPI_SW_SMS4 -+#define WAPI_DEBUG -+ -+#define SMS4_MIC_LEN 16 -+#define WAPI_EXT_LEN 18 -+#define MAX_WAPI_IE_LEN 256 -+#define sMacHdrLng 24 /* octets in data header, no WEP */ -+ -+#ifdef WAPI_DEBUG -+ -+/* WAPI trace debug */ -+extern u32 wapi_debug_component; -+ -+static inline void dump_buf(u8 *buf, u32 len) -+{ -+ u32 i; -+ printk("-----------------Len %d----------------\n", len); -+ for (i = 0; i < len; i++) -+ printk("%2.2x-", *(buf + i)); -+ printk("\n"); -+} -+ -+#define WAPI_TRACE(component, x, args...) \ -+ do { if (wapi_debug_component & (component)) \ -+ printk(KERN_DEBUG "WAPI" ":" x "" , \ -+ ##args);\ -+ } while (0); -+ -+#define WAPI_DATA(component, x, buf, len) \ -+ do { if (wapi_debug_component & (component)) { \ -+ printk("%s:\n", x);\ -+ dump_buf((buf), (len)); } \ -+ } while (0); -+ -+#define RT_ASSERT_RET(_Exp) \ -+ if (!(_Exp)) { \ -+ printk("RTWLAN: "); \ -+ printk("Assertion failed! %s,%s, line=%d\n", \ -+ #_Exp, __FUNCTION__, __LINE__); \ -+ return; \ -+ } -+#define RT_ASSERT_RET_VALUE(_Exp, Ret) \ -+ if (!(_Exp)) { \ -+ printk("RTWLAN: "); \ -+ printk("Assertion failed! %s,%s, line=%d\n", \ -+ #_Exp, __FUNCTION__, __LINE__); \ -+ return Ret; \ -+ } -+ -+#else -+#define RT_ASSERT_RET(_Exp) do {} while (0) -+#define RT_ASSERT_RET_VALUE(_Exp, Ret) do {} while (0) -+#define WAPI_TRACE(component, x, args...) do {} while (0) -+#define WAPI_DATA(component, x, buf, len) do {} while (0) -+#endif -+ -+ -+enum WAPI_DEBUG { -+ WAPI_INIT = 1, -+ WAPI_API = 1 << 1, -+ WAPI_TX = 1 << 2, -+ WAPI_RX = 1 << 3, -+ WAPI_MLME = 1 << 4, -+ WAPI_IOCTL = 1 << 5, -+ WAPI_ERR = 1 << 31 -+}; -+ -+#define WAPI_MAX_BKID_NUM 4 -+#define WAPI_MAX_STAINFO_NUM 4 -+#define WAPI_CAM_ENTRY_NUM 14 /* 28/2 = 14 */ -+ -+typedef struct _RT_WAPI_BKID { -+ struct list_head list; -+ u8 bkid[16]; -+} RT_WAPI_BKID, *PRT_WAPI_BKID; -+ -+typedef struct _RT_WAPI_KEY { -+ u8 dataKey[16]; -+ u8 micKey[16]; -+ u8 keyId; -+ bool bSet; -+ bool bTxEnable; -+} RT_WAPI_KEY, *PRT_WAPI_KEY; -+ -+typedef enum _RT_WAPI_PACKET_TYPE { -+ WAPI_NONE = 0, -+ WAPI_PREAUTHENTICATE = 1, -+ WAPI_STAKEY_REQUEST = 2, -+ WAPI_AUTHENTICATE_ACTIVE = 3, -+ WAPI_ACCESS_AUTHENTICATE_REQUEST = 4, -+ WAPI_ACCESS_AUTHENTICATE_RESPONSE = 5, -+ WAPI_CERTIFICATE_AUTHENTICATE_REQUEST = 6, -+ WAPI_CERTIFICATE_AUTHENTICATE_RESPONSE = 7, -+ WAPI_USK_REQUEST = 8, -+ WAPI_USK_RESPONSE = 9, -+ WAPI_USK_CONFIRM = 10, -+ WAPI_MSK_NOTIFICATION = 11, -+ WAPI_MSK_RESPONSE = 12 -+} RT_WAPI_PACKET_TYPE; -+ -+typedef struct _RT_WAPI_STA_INFO { -+ struct list_head list; -+ u8 PeerMacAddr[6]; -+ RT_WAPI_KEY wapiUsk; -+ RT_WAPI_KEY wapiUskUpdate; -+ RT_WAPI_KEY wapiMsk; -+ RT_WAPI_KEY wapiMskUpdate; -+ u8 lastRxUnicastPN[16]; -+ u8 lastTxUnicastPN[16]; -+ u8 lastRxMulticastPN[16]; -+ u8 lastRxUnicastPNBEQueue[16]; -+ u8 lastRxUnicastPNBKQueue[16]; -+ u8 lastRxUnicastPNVIQueue[16]; -+ u8 lastRxUnicastPNVOQueue[16]; -+ bool bSetkeyOk; -+ bool bAuthenticateInProgress; -+ bool bAuthenticatorInUpdata; -+} RT_WAPI_STA_INFO, *PRT_WAPI_STA_INFO; -+ -+/* Added for HW wapi en/decryption */ -+typedef struct _RT_WAPI_CAM_ENTRY { -+ /* RT_LIST_ENTRY list; */ -+ u8 IsUsed; -+ u8 entry_idx;/* for cam entry */ -+ u8 keyidx; /* 0 or 1,new or old key */ -+ u8 PeerMacAddr[6]; -+ u8 type; /* should be 110,wapi */ -+} RT_WAPI_CAM_ENTRY, *PRT_WAPI_CAM_ENTRY; -+ -+typedef struct _RT_WAPI_T { -+ /* BKID */ -+ RT_WAPI_BKID wapiBKID[WAPI_MAX_BKID_NUM]; -+ struct list_head wapiBKIDIdleList; -+ struct list_head wapiBKIDStoreList; -+ /* Key for Tx Multicast/Broadcast */ -+ RT_WAPI_KEY wapiTxMsk; -+ -+ /* sec related */ -+ u8 lastTxMulticastPN[16]; -+ /* STA list */ -+ RT_WAPI_STA_INFO wapiSta[WAPI_MAX_STAINFO_NUM]; -+ struct list_head wapiSTAIdleList; -+ struct list_head wapiSTAUsedList; -+ /* */ -+ bool bWapiEnable; -+ -+ /* store WAPI IE */ -+ u8 wapiIE[256]; -+ u8 wapiIELength; -+ bool bWapiPSK; -+ /* last sequece number for wai packet */ -+ u16 wapiSeqnumAndFragNum; -+ int extra_prefix_len; -+ int extra_postfix_len; -+ -+ RT_WAPI_CAM_ENTRY wapiCamEntry[WAPI_CAM_ENTRY_NUM]; -+} RT_WAPI_T, *PRT_WAPI_T; -+ -+typedef struct _WLAN_HEADER_WAPI_EXTENSION { -+ u8 KeyIdx; -+ u8 Reserved; -+ u8 PN[16]; -+} WLAN_HEADER_WAPI_EXTENSION, *PWLAN_HEADER_WAPI_EXTENSION; -+ -+u32 WapiComparePN(u8 *PN1, u8 *PN2); -+ -+ -+void rtw_wapi_init(_adapter *padapter); -+ -+void rtw_wapi_free(_adapter *padapter); -+ -+void rtw_wapi_disable_tx(_adapter *padapter); -+ -+u8 rtw_wapi_is_wai_packet(_adapter *padapter, u8 *pkt_data); -+ -+void rtw_wapi_update_info(_adapter *padapter, union recv_frame *precv_frame); -+ -+u8 rtw_wapi_check_for_drop(_adapter *padapter, union recv_frame *precv_frame, u8 *ehdr_ops); -+ -+void rtw_build_probe_resp_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib); -+ -+void rtw_build_beacon_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib); -+ -+void rtw_build_assoc_req_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib); -+ -+void rtw_wapi_on_assoc_ok(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); -+ -+void rtw_wapi_return_one_sta_info(_adapter *padapter, u8 *MacAddr); -+ -+void rtw_wapi_return_all_sta_info(_adapter *padapter); -+ -+void rtw_wapi_clear_cam_entry(_adapter *padapter, u8 *pMacAddr); -+ -+void rtw_wapi_clear_all_cam_entry(_adapter *padapter); -+ -+void rtw_wapi_set_key(_adapter *padapter, RT_WAPI_KEY *pWapiKey, RT_WAPI_STA_INFO *pWapiSta, u8 bGroupKey, u8 bUseDefaultKey); -+ -+int rtw_wapi_create_event_send(_adapter *padapter, u8 EventId, u8 *MacAddr, u8 *Buff, u16 BufLen); -+ -+u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe); -+ -+u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe); -+ -+void rtw_wapi_get_iv(_adapter *padapter, u8 *pRA, u8 *IV); -+ -+u8 WapiIncreasePN(u8 *PN, u8 AddCount); -+ -+bool rtw_wapi_drop_for_key_absent(_adapter *padapter, u8 *pRA); -+ -+void rtw_wapi_set_set_encryption(_adapter *padapter, struct ieee_param *param); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/rtw_wnm.h b/drivers/staging/rtl8723cs/include/rtw_wnm.h -new file mode 100644 -index 000000000000..8d6bcb56a0c6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_wnm.h -@@ -0,0 +1,209 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __RTW_WNM_H_ -+#define __RTW_WNM_H_ -+ -+#define RTW_RRM_NB_RPT_EN BIT(1) -+#define RTW_MAX_NB_RPT_NUM 8 -+ -+#define RTW_WNM_FEATURE_BTM_REQ_EN BIT(0) -+ -+#define rtw_roam_busy_scan(a, nb) \ -+ (((a)->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE) && \ -+ (((a)->mlmepriv.ch_cnt) < ((nb)->nb_rpt_ch_list_num))) -+ -+#define rtw_wnm_btm_preference_cap(a) \ -+ ((a)->mlmepriv.nb_info.preference_en == _TRUE) -+ -+#define rtw_wnm_btm_roam_triggered(a) \ -+ (((a)->mlmepriv.nb_info.preference_en == _TRUE) \ -+ && (rtw_ft_chk_flags((a), RTW_FT_BTM_ROAM)) \ -+ ) -+ -+#define rtw_wnm_btm_diff_bss(a) \ -+ ((rtw_wnm_btm_preference_cap(a)) && \ -+ (is_zero_mac_addr((a)->mlmepriv.nb_info.roam_target_addr) == _FALSE) && \ -+ (_rtw_memcmp((a)->mlmepriv.nb_info.roam_target_addr,\ -+ (a)->mlmepriv.cur_network.network.MacAddress, ETH_ALEN) == _FALSE)) -+ -+#define rtw_wnm_btm_roam_candidate(a, c) \ -+ ((rtw_wnm_btm_preference_cap(a)) && \ -+ (is_zero_mac_addr((a)->mlmepriv.nb_info.roam_target_addr) == _FALSE) && \ -+ (_rtw_memcmp((a)->mlmepriv.nb_info.roam_target_addr,\ -+ (c)->network.MacAddress, ETH_ALEN))) -+ -+#define rtw_wnm_set_ext_cap_btm(_pEleStart, _val) \ -+ SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart))+2, 3, 1, _val) -+ -+#define wnm_btm_bss_term_inc(p) (*((u8 *)((p)+3)) & BSS_TERMINATION_INCLUDED) -+ -+#define wnm_btm_ess_disassoc_im(p) (*((u8 *)((p)+3)) & ESS_DISASSOC_IMMINENT) -+ -+#define wnm_btm_dialog_token(p) (*((u8 *)((p)+2))) -+ -+#define wnm_btm_req_mode(p) (*((u8 *)((p)+3))) -+ -+#define wnm_btm_disassoc_timer(p) (*((u16 *)((p)+4))) -+ -+#define wnm_btm_valid_interval(p) (*((u8 *)((p)+6))) -+ -+#define wnm_btm_term_duration_offset(p) ((p)+7) -+ -+#define wnm_btm_rsp_status(p) (*((u8 *)((p)+3))) -+ -+#define wnm_btm_rsp_term_delay(p) (*((u8 *)((p)+4))) -+ -+#define RTW_WLAN_ACTION_WNM_NB_RPT_ELEM 0x34 -+ -+enum rtw_ieee80211_wnm_actioncode { -+ RTW_WLAN_ACTION_WNM_BTM_QUERY = 6, -+ RTW_WLAN_ACTION_WNM_BTM_REQ = 7, -+ RTW_WLAN_ACTION_WNM_BTM_RSP = 8, -+ RTW_WLAN_ACTION_WNM_NOTIF_REQ = 26, -+ RTW_WLAN_ACTION_WNM_NOTIF_RSP = 27, -+}; -+ -+/*IEEE Std 80211k Figure 7-95b Neighbor Report element format*/ -+struct nb_rpt_hdr { -+ u8 id; /*0x34: Neighbor Report Element ID*/ -+ u8 len; -+ u8 bssid[ETH_ALEN]; -+ u32 bss_info; -+ u8 reg_class; -+ u8 ch_num; -+ u8 phy_type; -+}; -+ -+/*IEEE Std 80211v, Figure 7-9 BSS Termination Duration subelement field format */ -+struct btm_term_duration { -+ u8 id; -+ u8 len; -+ u64 tsf; /* value of the TSF counter when BSS termination will occur in the future */ -+ u16 duration; /* number of minutes for which the BSS is not present*/ -+}; -+ -+/*IEEE Std 80211v, Figure 7-10 BSS Transition Management Request frame body format */ -+struct btm_req_hdr { -+ u8 dialog_token; -+ u8 req_mode; -+ /* number of TBTTs until the AP sends a Disassociation frame to this STA */ -+ u16 disassoc_timer; -+ /* number of TBTTs until the BSS transition candidate list is no longer valid */ -+ u8 validity_interval; -+ struct btm_term_duration term_duration; -+}; -+ -+struct btm_rsp_hdr { -+ u8 dialog_token; -+ u8 status; -+ /* the number of minutes that -+ the responding STA requests the BSS to delay termination */ -+ u8 termination_delay; -+ u8 bssid[ETH_ALEN]; -+ u8 *pcandidates; -+ u32 candidates_num; -+}; -+ -+struct btm_rpt_cache { -+ u8 dialog_token; -+ u8 req_mode; -+ u16 disassoc_timer; -+ u8 validity_interval; -+ struct btm_term_duration term_duration; -+ -+ /* from BTM req */ -+ u32 validity_time; -+ u32 disassoc_time; -+ -+ systime req_stime; -+}; -+ -+/*IEEE Std 80211v, Table 7-43b Optional Subelement IDs for Neighbor Report*/ -+/* BSS Transition Candidate Preference */ -+#define WNM_BTM_CAND_PREF_SUBEID 0x03 -+ -+/* BSS Termination Duration */ -+#define WNM_BTM_TERM_DUR_SUBEID 0x04 -+ -+struct wnm_btm_cant { -+ struct nb_rpt_hdr nb_rpt; -+ u8 preference; /* BSS Transition Candidate Preference */ -+}; -+ -+enum rtw_btm_req_mod { -+ PREFERRED_CANDIDATE_LIST_INCLUDED = BIT0, -+ ABRIDGED = BIT1, -+ DISASSOC_IMMINENT = BIT2, -+ BSS_TERMINATION_INCLUDED = BIT3, -+ ESS_DISASSOC_IMMINENT = BIT4, -+}; -+ -+struct roam_nb_info { -+ struct nb_rpt_hdr nb_rpt[RTW_MAX_NB_RPT_NUM]; -+ struct rtw_ieee80211_channel nb_rpt_ch_list[RTW_MAX_NB_RPT_NUM]; -+ struct btm_rpt_cache btm_cache; -+ bool nb_rpt_valid; -+ u8 nb_rpt_ch_list_num; -+ u8 preference_en; -+ u8 roam_target_addr[ETH_ALEN]; -+ u32 last_nb_rpt_entries; -+ u8 nb_rpt_is_same; -+ s8 disassoc_waiting; -+ _timer roam_scan_timer; -+ _timer disassoc_chk_timer; -+ -+ u32 features; -+}; -+ -+u8 rtw_wnm_btm_reassoc_req(_adapter *padapter); -+ -+void rtw_wnm_roam_scan_hdl(void *ctx); -+ -+void rtw_wnm_disassoc_chk_hdl(void *ctx); -+ -+u8 rtw_wnm_try_btm_roam_imnt(_adapter *padapter); -+ -+void rtw_wnm_process_btm_req(_adapter *padapter, u8* pframe, u32 frame_len); -+ -+void rtw_wnm_reset_btm_candidate(struct roam_nb_info *pnb); -+ -+void rtw_wnm_reset_btm_state(_adapter *padapter); -+ -+u32 rtw_wnm_btm_rsp_candidates_sz_get( -+ _adapter *padapter, u8* pframe, u32 frame_len); -+ -+void rtw_wnm_process_btm_rsp(_adapter *padapter, -+ u8* pframe, u32 frame_len, struct btm_rsp_hdr *prsp); -+ -+void rtw_wnm_issue_btm_req(_adapter *padapter, -+ u8 *pmac, struct btm_req_hdr *phdr, u8 *purl, u32 url_len, -+ u8 *pcandidates, u8 candidate_cnt); -+ -+void rtw_wnm_reset_btm_cache(_adapter *padapter); -+ -+void rtw_wnm_issue_action(_adapter *padapter, u8 action, u8 reason, u8 dialog); -+ -+void rtw_wnm_update_reassoc_req_ie(_adapter *padapter); -+ -+void rtw_roam_nb_info_init(_adapter *padapter); -+ -+u8 rtw_roam_nb_scan_list_set(_adapter *padapter, -+ struct sitesurvey_parm *pparm); -+ -+u32 rtw_wnm_btm_candidates_survey(_adapter *padapter, -+ u8* pframe, u32 elem_len, u8 is_preference); -+#endif /* __RTW_WNM_H_ */ -+ -diff --git a/drivers/staging/rtl8723cs/include/rtw_xmit.h b/drivers/staging/rtl8723cs/include/rtw_xmit.h -new file mode 100644 -index 000000000000..b8b0243071fc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/rtw_xmit.h -@@ -0,0 +1,1071 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _RTW_XMIT_H_ -+#define _RTW_XMIT_H_ -+ -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ #ifdef CONFIG_TX_AGGREGATION -+ #ifdef CONFIG_RTL8822C -+ #ifdef CONFIG_SDIO_TX_FORMAT_DUMMY_AUTO -+ #define MAX_XMITBUF_SZ (51200) -+ #else -+ #define MAX_XMITBUF_SZ (32764) -+ #endif -+ #else -+ #define MAX_XMITBUF_SZ (20480) /* 20k */ -+ #endif -+ /* #define SDIO_TX_AGG_MAX 5 */ -+ #else -+ #define MAX_XMITBUF_SZ (1664) -+ #define SDIO_TX_AGG_MAX 1 -+ #endif -+ -+ #if defined CONFIG_SDIO_HCI -+ #define NR_XMITBUFF (16) -+ #define SDIO_TX_DIV_NUM (2) -+ #endif -+ #if defined(CONFIG_GSPI_HCI) -+ #define NR_XMITBUFF (128) -+ #endif -+ -+#elif defined (CONFIG_USB_HCI) -+ -+ #ifdef CONFIG_USB_TX_AGGREGATION -+ #if defined(CONFIG_PLATFORM_ARM_SUNxI) || defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) || defined(CONFIG_PLATFORM_ARM_SUN8I) || defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) -+ #define MAX_XMITBUF_SZ (12288) /* 12k 1536*8 */ -+ #elif defined (CONFIG_PLATFORM_MSTAR) -+ #define MAX_XMITBUF_SZ 7680 /* 7.5k */ -+ #else -+ #define MAX_XMITBUF_SZ (20480) /* 20k */ -+ #endif -+ #else -+ #define MAX_XMITBUF_SZ (2048) -+ #endif -+ -+ #ifdef CONFIG_SINGLE_XMIT_BUF -+ #define NR_XMITBUFF (1) -+ #else -+ #define NR_XMITBUFF (4) -+ #endif /* CONFIG_SINGLE_XMIT_BUF */ -+#elif defined (CONFIG_PCI_HCI) -+#ifdef CONFIG_TX_AMSDU -+ #define MAX_XMITBUF_SZ (3500) -+#else -+ #define MAX_XMITBUF_SZ (1664) -+#endif -+#ifdef CONFIG_PCI_TX_POLLING -+ #define NR_XMITBUFF (256) -+#else -+ #define NR_XMITBUFF (128) -+#endif -+#endif -+ -+ -+#ifdef CONFIG_PCI_HCI -+ #define XMITBUF_ALIGN_SZ 4 -+#else -+ #ifdef USB_XMITBUF_ALIGN_SZ -+ #define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ) -+ #else -+ #define XMITBUF_ALIGN_SZ 512 -+ #endif -+#endif -+ -+ -+/* xmit extension buff defination */ -+#define MAX_XMIT_EXTBUF_SZ (1536) -+ -+#ifdef CONFIG_SINGLE_XMIT_BUF -+ #define NR_XMIT_EXTBUFF (1) -+#else -+ #define NR_XMIT_EXTBUFF (32) -+#endif -+ -+#ifdef CONFIG_RTL8812A -+ #define MAX_CMDBUF_SZ (512 * 18) -+#elif defined(CONFIG_RTL8723D) && defined(CONFIG_LPS_POFF) -+ #define MAX_CMDBUF_SZ (128*70) /*(8960)*/ -+#elif defined(CONFIG_RTL8822C) && defined(CONFIG_WAR_OFFLOAD) -+ #define MAX_CMDBUF_SZ (128*128) /*(16k) */ -+#else -+ #define MAX_CMDBUF_SZ (5120) /* (4096) */ -+#endif -+ -+#define MAX_BEACON_LEN 512 -+ -+#define MAX_NUMBLKS (1) -+ -+#define XMIT_VO_QUEUE (0) -+#define XMIT_VI_QUEUE (1) -+#define XMIT_BE_QUEUE (2) -+#define XMIT_BK_QUEUE (3) -+ -+#define VO_QUEUE_INX 0 -+#define VI_QUEUE_INX 1 -+#define BE_QUEUE_INX 2 -+#define BK_QUEUE_INX 3 -+#define BCN_QUEUE_INX 4 -+#define MGT_QUEUE_INX 5 -+#define TXCMD_QUEUE_INX 6 -+#define HIGH_QUEUE_INX 7 -+/* keep high queue to be the last one, so we can extend HIQ to port 1, 2, ... */ -+ -+#ifndef CONFIG_PORT_BASED_HIQ -+#define HW_QUEUE_ENTRY 8 -+#else -+#define HI_QUEUE_INX(n) (HIGH_QUEUE_INX + (n)) -+#define HW_QUEUE_ENTRY (8 + CONFIG_IFACE_NUMBER - 1) -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ #ifdef CONFIG_TRX_BD_ARCH -+ #define TX_BD_NUM (128+1) /* +1 result from ring buffer */ -+ #else -+ #define TXDESC_NUM 128 -+ #endif -+#endif -+ -+#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\ -+ do {\ -+ dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : (dot11txpn.val + 1);\ -+ pattrib_iv[0] = dot11txpn._byte_.TSC0;\ -+ pattrib_iv[1] = dot11txpn._byte_.TSC1;\ -+ pattrib_iv[2] = dot11txpn._byte_.TSC2;\ -+ pattrib_iv[3] = ((keyidx & 0x3)<<6);\ -+ } while (0) -+ -+ -+#define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\ -+ do {\ -+ dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\ -+ pattrib_iv[0] = dot11txpn._byte_.TSC1;\ -+ pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\ -+ pattrib_iv[2] = dot11txpn._byte_.TSC0;\ -+ pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ -+ pattrib_iv[4] = dot11txpn._byte_.TSC2;\ -+ pattrib_iv[5] = dot11txpn._byte_.TSC3;\ -+ pattrib_iv[6] = dot11txpn._byte_.TSC4;\ -+ pattrib_iv[7] = dot11txpn._byte_.TSC5;\ -+ } while (0) -+ -+#define AES_IV(pattrib_iv, dot11txpn, keyidx)\ -+ do {\ -+ dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\ -+ pattrib_iv[0] = dot11txpn._byte_.TSC0;\ -+ pattrib_iv[1] = dot11txpn._byte_.TSC1;\ -+ pattrib_iv[2] = 0;\ -+ pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ -+ pattrib_iv[4] = dot11txpn._byte_.TSC2;\ -+ pattrib_iv[5] = dot11txpn._byte_.TSC3;\ -+ pattrib_iv[6] = dot11txpn._byte_.TSC4;\ -+ pattrib_iv[7] = dot11txpn._byte_.TSC5;\ -+ } while (0) -+ -+#define GCMP_IV(a, b, c) AES_IV(a, b, c) -+ -+/* Check if AMPDU Tx is supported or not. If it is supported, -+* it need to check "amsdu in ampdu" is supported or not. -+* (ampdu_en, amsdu_ampdu_en) = -+* (0, x) : AMPDU is not enable, but AMSDU is valid to send. -+* (1, 0) : AMPDU is enable, AMSDU in AMPDU is not enable. So, AMSDU is not valid to send. -+* (1, 1) : AMPDU and AMSDU in AMPDU are enable. So, AMSDU is valid to send. -+*/ -+#define IS_AMSDU_AMPDU_NOT_VALID(pattrib)\ -+ ((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE)) -+ -+#define IS_AMSDU_AMPDU_VALID(pattrib)\ -+ !((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE)) -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+#define HWXMIT_ENTRY 5 -+#else -+#define HWXMIT_ENTRY 4 -+#endif -+ -+/* For Buffer Descriptor ring architecture */ -+#if defined(BUF_DESC_ARCH) || defined(CONFIG_TRX_BD_ARCH) -+ #if defined(CONFIG_RTL8192E) -+ #define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */ -+ #elif defined(CONFIG_RTL8814A) -+ #define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */ -+ #else -+ #define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */ -+ #endif -+#endif -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ||\ -+ defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8192E) ||\ -+ defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8703B) ||\ -+ defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D) ||\ -+ defined(CONFIG_RTL8710B) || defined(CONFIG_RTL8192F) ||\ -+ defined(CONFIG_RTL8723F) -+ #define TXDESC_SIZE 40 -+#elif defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) -+ #define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8822B */ -+#elif defined(CONFIG_RTL8821C) -+ #define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8821C */ -+#elif defined(CONFIG_RTL8814B) -+ #define TXDESC_SIZE (16 + 32) -+#else -+ #define TXDESC_SIZE 32 /* old IC (ex: 8188E) */ -+#endif -+ -+#ifdef CONFIG_TX_EARLY_MODE -+ #define EARLY_MODE_INFO_SIZE 8 -+#endif -+ -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ #define TXDESC_OFFSET TXDESC_SIZE -+#endif -+ -+#ifdef CONFIG_USB_HCI -+ #ifdef USB_PACKET_OFFSET_SZ -+ #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) -+ #else -+ #define PACKET_OFFSET_SZ (8) -+ #endif -+ #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ #if defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_TRX_BD_ARCH) -+ /* this section is defined for buffer descriptor ring architecture */ -+ #define TX_WIFI_INFO_SIZE (TXDESC_SIZE) /* it may add 802.11 hdr or others... */ -+ /* tx desc and payload are in the same buf */ -+ #define TXDESC_OFFSET (TX_WIFI_INFO_SIZE) -+ #else -+ /* tx desc and payload are NOT in the same buf */ -+ #define TXDESC_OFFSET (0) -+ /* 8188ee/8723be/8812ae/8821ae has extra PCI DMA info in tx desc */ -+ #define TX_DESC_NEXT_DESC_OFFSET (TXDESC_SIZE + 8) -+ #endif -+#endif /* CONFIG_PCI_HCI */ -+ -+enum TXDESC_SC { -+ SC_DONT_CARE = 0x00, -+ SC_UPPER = 0x01, -+ SC_LOWER = 0x02, -+ SC_DUPLICATE = 0x03 -+}; -+ -+#ifdef CONFIG_PCI_HCI -+ #ifndef CONFIG_TRX_BD_ARCH /* CONFIG_TRX_BD_ARCH doesn't need this */ -+ #define TXDESC_64_BYTES -+ #endif -+#elif defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8723B) \ -+ || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D) \ -+ || defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8723F) -+ #define TXDESC_40_BYTES -+#endif -+ -+#ifdef CONFIG_TRX_BD_ARCH -+struct tx_buf_desc { -+#ifdef CONFIG_64BIT_DMA -+#define TX_BUFFER_SEG_SIZE 4 /* in unit of DWORD */ -+#else -+#define TX_BUFFER_SEG_SIZE 2 /* in unit of DWORD */ -+#endif -+ unsigned int dword[TX_BUFFER_SEG_SIZE * (2 << TX_BUFFER_SEG_NUM)]; -+} __packed; -+#elif (defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI) /* 8192ee or 8814ae */ -+/* 8192EE_TODO */ -+struct tx_desc { -+ unsigned int txdw0; -+ unsigned int txdw1; -+ unsigned int txdw2; -+ unsigned int txdw3; -+ unsigned int txdw4; -+ unsigned int txdw5; -+ unsigned int txdw6; -+ unsigned int txdw7; -+}; -+#else -+struct tx_desc { -+ unsigned int txdw0; -+ unsigned int txdw1; -+ unsigned int txdw2; -+ unsigned int txdw3; -+ unsigned int txdw4; -+ unsigned int txdw5; -+ unsigned int txdw6; -+ unsigned int txdw7; -+ -+#if defined(TXDESC_40_BYTES) || defined(TXDESC_64_BYTES) -+ unsigned int txdw8; -+ unsigned int txdw9; -+#endif /* TXDESC_40_BYTES */ -+ -+#ifdef TXDESC_64_BYTES -+ unsigned int txdw10; -+ unsigned int txdw11; -+ -+ /* 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor */ -+ /* size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute */ -+ /* memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor */ -+ /* number or enlarge descriptor size as 64 bytes. */ -+ unsigned int txdw12; -+ unsigned int txdw13; -+ unsigned int txdw14; -+ unsigned int txdw15; -+#endif -+}; -+#endif -+ -+#ifndef CONFIG_TRX_BD_ARCH -+union txdesc { -+ struct tx_desc txdesc; -+ unsigned int value[TXDESC_SIZE >> 2]; -+}; -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+#define PCI_MAX_TX_QUEUE_COUNT HW_QUEUE_ENTRY -+ -+struct rtw_tx_ring { -+ unsigned char qid; -+#ifdef CONFIG_TRX_BD_ARCH -+ struct tx_buf_desc *buf_desc; -+#else -+ struct tx_desc *desc; -+#endif -+ dma_addr_t dma; -+ unsigned int idx; -+ unsigned int entries; -+ _queue queue; -+ u32 qlen; -+#ifdef CONFIG_TRX_BD_ARCH -+ u16 hw_rp_cache; -+#endif -+}; -+ -+#ifdef DBG_TXBD_DESC_DUMP -+ -+#define TX_BAK_FRMAE_CNT 10 -+#define TX_BAK_DESC_LEN 48 /* byte */ -+#define TX_BAK_DATA_LEN 30 /* byte */ -+ -+struct rtw_tx_desc_backup { -+ int tx_bak_rp; -+ int tx_bak_wp; -+ u8 tx_bak_desc[TX_BAK_DESC_LEN]; -+ u8 tx_bak_data_hdr[TX_BAK_DATA_LEN]; -+ u8 tx_desc_size; -+}; -+#endif -+#endif -+ -+struct hw_xmit { -+ /* _lock xmit_lock; */ -+ /* _list pending; */ -+ _queue *sta_queue; -+ /* struct hw_txqueue *phwtxqueue; */ -+ /* sint txcmdcnt; */ -+ int accnt; -+}; -+ -+struct pkt_attrib { -+ u8 type; -+ u8 subtype; -+ u8 bswenc; -+ u8 dhcp_pkt; -+ u16 ether_type; -+ u16 seqnum; -+ u8 hw_ssn_sel; /* for HW_SEQ0,1,2,3 */ -+ u16 pkt_hdrlen; /* the original 802.3 pkt header len */ -+ u16 hdrlen; /* the WLAN Header Len */ -+ u32 pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */ -+ u32 last_txcmdsz; -+ u8 nr_frags; -+ u8 encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */ -+ u8 bmc_camid; -+ u8 iv_len; -+ u8 icv_len; -+ u8 iv[18]; -+ u8 icv[16]; -+ u8 priority; -+ u8 ack_policy; -+ u8 mac_id; -+ u8 vcs_mode; /* virtual carrier sense method */ -+ u8 dst[ETH_ALEN]; -+ u8 src[ETH_ALEN]; -+ u8 ta[ETH_ALEN]; -+ u8 ra[ETH_ALEN]; -+#ifdef CONFIG_RTW_WDS -+ u8 wds; -+#endif -+#ifdef CONFIG_RTW_MESH -+ u8 mda[ETH_ALEN]; /* mesh da */ -+ u8 msa[ETH_ALEN]; /* mesh sa */ -+ u8 meshctrl_len; /* Length of Mesh Control field */ -+ u8 mesh_frame_mode; -+ #if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ u8 mb2u; -+ #endif -+ u8 mfwd_ttl; -+ u32 mseq; -+#endif -+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX -+ u8 hw_csum; -+#endif -+ u8 key_idx; -+ u8 qos_en; -+ u8 ht_en; -+ u8 raid;/* rate adpative id */ -+ u8 bwmode; -+ u8 ch_offset;/* PRIME_CHNL_OFFSET */ -+ u8 sgi;/* short GI */ -+ u8 ampdu_en;/* tx ampdu enable */ -+ u8 ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */ -+ u8 amsdu; -+ u8 amsdu_ampdu_en;/* tx amsdu in ampdu enable */ -+ u8 mdata;/* more data bit */ -+ u8 pctrl;/* per packet txdesc control enable */ -+ u8 triggered;/* for ap mode handling Power Saving sta */ -+ u8 qsel; -+ u8 order;/* order bit */ -+ u8 eosp; -+ u8 rate; -+ u8 intel_proxim; -+ u8 retry_ctrl; -+ u8 mbssid; -+ u8 ldpc; -+ u8 stbc; -+#ifdef CONFIG_WMMPS_STA -+ u8 trigger_frame; -+#endif /* CONFIG_WMMPS_STA */ -+ -+ struct sta_info *psta; -+ -+ u8 rtsen; -+ u8 cts2self; -+ union Keytype dot11tkiptxmickey; -+ /* union Keytype dot11tkiprxmickey; */ -+ union Keytype dot118021x_UncstKey; -+ -+#ifdef CONFIG_TDLS -+ u8 direct_link; -+ struct sta_info *ptdls_sta; -+#endif /* CONFIG_TDLS */ -+ u8 key_type; -+ -+ u8 icmp_pkt; -+ u8 hipriority_pkt; /* high priority packet */ -+ -+#ifdef CONFIG_BEAMFORMING -+ u16 txbf_p_aid;/*beamforming Partial_AID*/ -+ u16 txbf_g_id;/*beamforming Group ID*/ -+ -+ /* -+ * 2'b00: Unicast NDPA -+ * 2'b01: Broadcast NDPA -+ * 2'b10: Beamforming Report Poll -+ * 2'b11: Final Beamforming Report Poll -+ */ -+ u8 bf_pkt_type; -+#endif -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ u8 ps_dontq; /* 1: this frame can't be queued at PS state */ -+#endif -+}; -+ -+#ifdef CONFIG_RTW_WDS -+#define XATTRIB_GET_WDS(xattrib) ((xattrib)->wds) -+#else -+#define XATTRIB_GET_WDS(xattrib) 0 -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+#define XATTRIB_GET_MCTRL_LEN(xattrib) ((xattrib)->meshctrl_len) -+#else -+#define XATTRIB_GET_MCTRL_LEN(xattrib) 0 -+#endif -+ -+#ifdef CONFIG_TX_AMSDU -+enum { -+ RTW_AMSDU_TIMER_UNSET = 0, -+ RTW_AMSDU_TIMER_SETTING, -+ RTW_AMSDU_TIMER_TIMEOUT, -+}; -+#endif -+ -+#define WLANHDR_OFFSET 64 -+ -+#define NULL_FRAMETAG (0x0) -+#define DATA_FRAMETAG 0x01 -+#define L2_FRAMETAG 0x02 -+#define MGNT_FRAMETAG 0x03 -+#define AMSDU_FRAMETAG 0x04 -+ -+#define EII_FRAMETAG 0x05 -+#define IEEE8023_FRAMETAG 0x06 -+ -+#define MP_FRAMETAG 0x07 -+ -+#define TXAGG_FRAMETAG 0x08 -+ -+enum { -+ XMITBUF_DATA = 0, -+ XMITBUF_MGNT = 1, -+ XMITBUF_CMD = 2, -+}; -+ -+bool rtw_xmit_ac_blocked(_adapter *adapter); -+ -+struct submit_ctx { -+ systime submit_time; /* */ -+ u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */ -+ int status; /* status for operation */ -+#ifdef PLATFORM_LINUX -+ struct completion done; -+#endif -+}; -+ -+enum { -+ RTW_SCTX_SUBMITTED = -1, -+ RTW_SCTX_DONE_SUCCESS = 0, -+ RTW_SCTX_DONE_UNKNOWN, -+ RTW_SCTX_DONE_TIMEOUT, -+ RTW_SCTX_DONE_BUF_ALLOC, -+ RTW_SCTX_DONE_BUF_FREE, -+ RTW_SCTX_DONE_WRITE_PORT_ERR, -+ RTW_SCTX_DONE_TX_DESC_NA, -+ RTW_SCTX_DONE_TX_DENY, -+ RTW_SCTX_DONE_CCX_PKT_FAIL, -+ RTW_SCTX_DONE_DRV_STOP, -+ RTW_SCTX_DONE_DEV_REMOVE, -+ RTW_SCTX_DONE_CMD_ERROR, -+ RTW_SCTX_DONE_CMD_DROP, -+ RTX_SCTX_CSTR_WAIT_RPT2, -+}; -+ -+ -+void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms); -+int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg); -+void rtw_sctx_done_err(struct submit_ctx **sctx, int status); -+void rtw_sctx_done(struct submit_ctx **sctx); -+ -+struct xmit_buf { -+ _list list; -+ -+ _adapter *padapter; -+ -+ u8 *pallocated_buf; -+ -+ u8 *pbuf; -+ -+ void *priv_data; -+ -+ u16 buf_tag; /* 0: Normal xmitbuf, 1: extension xmitbuf, 2:cmd xmitbuf */ -+ u16 flags; -+ u32 alloc_sz; -+ -+ u32 len; -+ -+ struct submit_ctx *sctx; -+ -+#ifdef CONFIG_USB_HCI -+ -+ /* u32 sz[8]; */ -+ u32 ff_hwaddr; -+#ifdef RTW_HALMAC -+ u8 bulkout_id; /* for halmac */ -+#endif /* RTW_HALMAC */ -+ -+ PURB pxmit_urb[8]; -+ dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ -+ -+ u8 bpending[8]; -+ -+ sint last[8]; -+ -+#endif -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ u8 *phead; -+ u8 *pdata; -+ u8 *ptail; -+ u8 *pend; -+ u32 ff_hwaddr; -+ u8 pg_num; -+ u8 agg_num; -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+#ifdef CONFIG_TRX_BD_ARCH -+ /*struct tx_buf_desc *buf_desc;*/ -+#else -+ struct tx_desc *desc; -+#endif -+#endif -+ -+#if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT) -+ u8 no; -+#endif -+ -+}; -+ -+ -+struct xmit_frame { -+ _list list; -+ -+ struct pkt_attrib attrib; -+ -+ u16 os_qid; -+ _pkt *pkt; -+ -+ int frame_tag; -+ -+ _adapter *padapter; -+ -+ u8 *buf_addr; -+ -+ struct xmit_buf *pxmitbuf; -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ u8 pg_num; -+ u8 agg_num; -+#endif -+ -+#ifdef CONFIG_USB_HCI -+#ifdef CONFIG_USB_TX_AGGREGATION -+ u8 agg_num; -+#endif -+ s8 pkt_offset; -+#endif -+ -+#ifdef CONFIG_XMIT_ACK -+ u8 ack_report; -+#endif -+ -+ u8 *alloc_addr; /* the actual address this xmitframe allocated */ -+ u8 ext_tag; /* 0:data, 1:mgmt */ -+ -+}; -+ -+struct tx_servq { -+ _list tx_pending; -+ _queue sta_pending; -+ int qcnt; -+}; -+ -+ -+struct sta_xmit_priv { -+ _lock lock; -+ sint option; -+ sint apsd_setting; /* When bit mask is on, the associated edca queue supports APSD. */ -+ -+ -+ /* struct tx_servq blk_q[MAX_NUMBLKS]; */ -+ struct tx_servq be_q; /* priority == 0,3 */ -+ struct tx_servq bk_q; /* priority == 1,2 */ -+ struct tx_servq vi_q; /* priority == 4,5 */ -+ struct tx_servq vo_q; /* priority == 6,7 */ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ struct tx_servq mgmt_q; -+#endif -+ -+ _list legacy_dz; -+ _list apsd; -+ -+ u16 txseq_tid[16]; -+ -+ /* uint sta_tx_bytes; */ -+ /* u64 sta_tx_pkts; */ -+ /* uint sta_tx_fail; */ -+ -+ -+}; -+ -+ -+struct hw_txqueue { -+ volatile sint head; -+ volatile sint tail; -+ volatile sint free_sz; /* in units of 64 bytes */ -+ volatile sint free_cmdsz; -+ volatile sint txsz[8]; -+ uint ff_hwaddr; -+ uint cmd_hwaddr; -+ sint ac_tag; -+}; -+ -+struct agg_pkt_info { -+ u16 offset; -+ u16 pkt_len; -+}; -+ -+enum cmdbuf_type { -+ CMDBUF_BEACON = 0x00, -+ CMDBUF_RSVD, -+ CMDBUF_MAX -+}; -+ -+u8 rtw_get_hwseq_no(_adapter *padapter); -+ -+struct xmit_priv { -+ -+ _lock lock; -+ -+ _sema xmit_sema; -+ -+ /* _queue blk_strms[MAX_NUMBLKS]; */ -+ _queue be_pending; -+ _queue bk_pending; -+ _queue vi_pending; -+ _queue vo_pending; -+ _queue mgmt_pending; -+ -+ /* _queue legacy_dz_queue; */ -+ /* _queue apsd_queue; */ -+ -+ u8 *pallocated_frame_buf; -+ u8 *pxmit_frame_buf; -+ uint free_xmitframe_cnt; -+ _queue free_xmit_queue; -+ -+ /* uint mapping_addr; */ -+ /* uint pkt_sz; */ -+ -+ u8 *xframe_ext_alloc_addr; -+ u8 *xframe_ext; -+ uint free_xframe_ext_cnt; -+ _queue free_xframe_ext_queue; -+ -+ /* struct hw_txqueue be_txqueue; */ -+ /* struct hw_txqueue bk_txqueue; */ -+ /* struct hw_txqueue vi_txqueue; */ -+ /* struct hw_txqueue vo_txqueue; */ -+ /* struct hw_txqueue bmc_txqueue; */ -+ -+ uint frag_len; -+ -+ _adapter *adapter; -+ -+ u8 vcs_setting; -+ u8 vcs; -+ u8 vcs_type; -+ /* u16 rts_thresh; */ -+ -+ u64 tx_bytes; -+ u64 tx_pkts; -+ u64 tx_drop; -+ u64 last_tx_pkts; -+ -+ struct hw_xmit *hwxmits; -+ u8 hwxmit_entry; -+ -+ u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. */ -+ -+#ifdef CONFIG_USB_HCI -+ _sema tx_retevt;/* all tx return event; */ -+ u8 txirp_cnt; -+ -+ _tasklet xmit_tasklet; -+ -+ /* per AC pending irp */ -+ int beq_cnt; -+ int bkq_cnt; -+ int viq_cnt; -+ int voq_cnt; -+ -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ /* Tx */ -+ struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT]; -+ int txringcount[PCI_MAX_TX_QUEUE_COUNT]; -+ u8 beaconDMAing; /* flag of indicating beacon is transmiting to HW by DMA */ -+ _tasklet xmit_tasklet; -+#endif -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+#ifdef CONFIG_SDIO_TX_TASKLET -+ _tasklet xmit_tasklet; -+#else -+ _thread_hdl_ SdioXmitThread; -+ _sema SdioXmitSema; -+ #ifdef SDIO_FREE_XMIT_BUF_SEMA -+ _sema sdio_free_xmitbuf_sema; -+ #endif -+#endif /* CONFIG_SDIO_TX_TASKLET */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+ _queue free_xmitbuf_queue; -+ _queue pending_xmitbuf_queue; -+ u8 *pallocated_xmitbuf; -+ u8 *pxmitbuf; -+ uint free_xmitbuf_cnt; -+ -+ _queue free_xmit_extbuf_queue; -+ u8 *pallocated_xmit_extbuf; -+ u8 *pxmit_extbuf; -+ uint free_xmit_extbuf_cnt; -+ -+ struct xmit_buf pcmd_xmitbuf[CMDBUF_MAX]; -+ u8 hw_ssn_seq_no;/* mapping to REG_HW_SEQ 0,1,2,3 */ -+ u16 nqos_ssn; -+#ifdef CONFIG_TX_EARLY_MODE -+ -+#ifdef CONFIG_SDIO_HCI -+#define MAX_AGG_PKT_NUM 20 -+#else -+#define MAX_AGG_PKT_NUM 256 /* Max tx ampdu coounts */ -+#endif -+ -+ struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM]; -+#endif -+ -+#ifdef CONFIG_XMIT_ACK -+ int ack_tx; -+ _mutex ack_tx_mutex; -+ struct submit_ctx ack_tx_ops; -+ u8 seq_no; -+#ifdef CONFIG_REMOVE_DUP_TX_STATE -+ u8 retry_count; -+#endif -+#endif -+ -+#ifdef CONFIG_TX_AMSDU -+ _timer amsdu_vo_timer; -+ u8 amsdu_vo_timeout; -+ -+ _timer amsdu_vi_timer; -+ u8 amsdu_vi_timeout; -+ -+ _timer amsdu_be_timer; -+ u8 amsdu_be_timeout; -+ -+ _timer amsdu_bk_timer; -+ u8 amsdu_bk_timeout; -+ -+ u32 amsdu_debug_set_timer; -+ u32 amsdu_debug_timeout; -+ u32 amsdu_debug_coalesce_one; -+ u32 amsdu_debug_coalesce_two; -+ -+#endif -+#ifdef DBG_TXBD_DESC_DUMP -+ BOOLEAN dump_txbd_desc; -+#endif -+#ifdef CONFIG_PCI_TX_POLLING -+ _timer tx_poll_timer; -+#endif -+ _lock lock_sctx; -+ -+}; -+ -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD) -+#if defined(CONFIG_RTL8192E) && defined(CONFIG_PCI_HCI) -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192ee(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8192ee(p, CMDBUF_BEACON) -+#elif defined(CONFIG_RTL8822B) && defined(CONFIG_PCI_HCI) -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8822be(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8822be(p, CMDBUF_BEACON) -+#elif defined(CONFIG_RTL8822C) && defined(CONFIG_PCI_HCI) -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8822ce(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8822ce(p, CMDBUF_BEACON) -+#elif defined(CONFIG_RTL8821C) && defined(CONFIG_PCI_HCI) -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8821ce(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8821ce(p, CMDBUF_BEACON) -+#elif defined(CONFIG_RTL8192F) && defined(CONFIG_PCI_HCI) -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192fe(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8192fe(p, CMDBUF_BEACON) -+#elif defined(CONFIG_RTL8812A) && defined(CONFIG_PCI_HCI) -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8812ae(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8812ae(p, CMDBUF_BEACON) -+#elif defined(CONFIG_RTL8723D) && defined(CONFIG_PCI_HCI) -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8723de(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8723de(p, CMDBUF_BEACON) -+#elif defined(CONFIG_RTL8723B) && defined(CONFIG_PCI_HCI) -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8723be(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8723be(p, CMDBUF_BEACON) -+#elif defined(CONFIG_RTL8814A) && defined(CONFIG_PCI_HCI) -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8814ae(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8814ae(p, CMDBUF_BEACON) -+#elif defined(CONFIG_RTL8814B) && defined(CONFIG_PCI_HCI) -+extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8814be(struct xmit_priv *pxmitpriv, -+ enum cmdbuf_type buf_type); -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8814be(p, CMDBUF_BEACON) -+#else -+#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON) -+#endif -+ -+extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv); -+extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+ -+extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv); -+extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+ -+void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz); -+extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len); -+ -+extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib); -+extern s32 rtw_put_snap(u8 *data, u16 h_proto); -+ -+extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv, u16 os_qid); -+struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv); -+struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv); -+extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe); -+extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue); -+struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac); -+extern s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+ -+#ifdef CONFIG_RTW_MGMT_QUEUE -+void rtw_free_mgmt_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *mgmt_queue); -+u8 rtw_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -+struct xmit_frame *rtw_dequeue_mgmt_xframe(struct xmit_priv *pxmitpriv); -+#endif /* CONFIG_RTW_MGMT_QUEUE */ -+ -+extern struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry); -+ -+extern s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe); -+extern u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib); -+#define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib) -+extern s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); -+#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) -+extern s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); -+#endif -+#ifdef CONFIG_TDLS -+extern struct tdls_txmgmt *ptxmgmt; -+s32 rtw_xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, struct tdls_txmgmt *ptxmgmt); -+s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib); -+#endif -+s32 _rtw_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag); -+void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv); -+ -+ -+s32 rtw_txframes_pending(_adapter *padapter); -+s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib); -+void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry); -+ -+ -+s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter); -+void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv); -+ -+ -+void rtw_alloc_hwxmits(_adapter *padapter); -+void rtw_free_hwxmits(_adapter *padapter); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) -+s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev); -+#endif -+void rtw_xmit_dequeue_callback(_workitem *work); -+void rtw_xmit_queue_set(struct sta_info *sta); -+void rtw_xmit_queue_clear(struct sta_info *sta); -+s32 rtw_xmit_posthandle(_adapter *padapter, struct xmit_frame *pxmitframe, _pkt *pkt); -+s32 rtw_xmit(_adapter *padapter, _pkt **pkt, u16 os_qid); -+bool xmitframe_hiq_filter(struct xmit_frame *xmitframe); -+#if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) -+#ifdef CONFIG_RTW_MGMT_QUEUE -+u8 mgmt_xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); -+#endif -+sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); -+void stop_sta_xmit(_adapter *padapter, struct sta_info *psta); -+void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta); -+void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta); -+#endif -+ -+u8 rtw_get_tx_bw_mode(_adapter *adapter, struct sta_info *sta); -+ -+void rtw_update_tx_rate_bmp(struct dvobj_priv *dvobj); -+u8 rtw_get_tx_bw_bmp_of_ht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw); -+u8 rtw_get_tx_bw_bmp_of_vht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw); -+s16 rtw_adapter_get_oper_txpwr_max_mbm(_adapter *adapter, bool eirp); -+s16 rtw_rfctl_get_oper_txpwr_max_mbm(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u8 ifbmp_mod, u8 if_op, bool eirp); -+s16 rtw_get_oper_txpwr_max_mbm(struct dvobj_priv *dvobj, bool erip); -+s16 rtw_rfctl_get_reg_max_txpwr_mbm(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, bool eirp); -+ -+u8 query_ra_short_GI(struct sta_info *psta, u8 bw); -+ -+u8 qos_acm(u8 acm_mask, u8 priority); -+ -+#ifdef CONFIG_XMIT_THREAD_MODE -+void enqueue_pending_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+void enqueue_pending_xmitbuf_to_head(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -+struct xmit_buf *dequeue_pending_xmitbuf(struct xmit_priv *pxmitpriv); -+struct xmit_buf *select_and_dequeue_pending_xmitbuf(_adapter *padapter); -+sint check_pending_xmitbuf(struct xmit_priv *pxmitpriv); -+thread_return rtw_xmit_thread(thread_context context); -+#endif -+ -+#ifdef CONFIG_TX_AMSDU -+extern void rtw_amsdu_vo_timeout_handler(void *FunctionContext); -+extern void rtw_amsdu_vi_timeout_handler(void *FunctionContext); -+extern void rtw_amsdu_be_timeout_handler(void *FunctionContext); -+extern void rtw_amsdu_bk_timeout_handler(void *FunctionContext); -+ -+extern u8 rtw_amsdu_get_timer_status(_adapter *padapter, u8 priority); -+extern void rtw_amsdu_set_timer_status(_adapter *padapter, u8 priority, u8 status); -+extern void rtw_amsdu_set_timer(_adapter *padapter, u8 priority); -+extern void rtw_amsdu_cancel_timer(_adapter *padapter, u8 priority); -+ -+extern s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_frame *pxmitframe_queue); -+extern s32 check_amsdu(struct xmit_frame *pxmitframe); -+extern s32 check_amsdu_tx_support(_adapter *padapter); -+extern struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame); -+#endif -+ -+#ifdef DBG_TXBD_DESC_DUMP -+void rtw_tx_desc_backup(_adapter *padapter, struct xmit_frame *pxmitframe, u8 desc_size, u8 hwq); -+void rtw_tx_desc_backup_reset(void); -+u8 rtw_get_tx_desc_backup(_adapter *padapter, u8 hwq, struct rtw_tx_desc_backup **pbak); -+#endif -+ -+#ifdef CONFIG_PCI_TX_POLLING -+void rtw_tx_poll_init(_adapter *padapter); -+void rtw_tx_poll_timeout_handler(void *FunctionContext); -+void rtw_tx_poll_timer_set(_adapter *padapter, u32 delay); -+void rtw_tx_poll_timer_cancel(_adapter *padapter); -+#endif -+ -+u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe); -+ -+#ifdef CONFIG_XMIT_ACK -+int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms); -+void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status); -+#endif /* CONFIG_XMIT_ACK */ -+ -+enum XMIT_BLOCK_REASON { -+ XMIT_BLOCK_NONE = 0, -+ XMIT_BLOCK_REDLMEM = BIT0, /*LPS-PG*/ -+ XMIT_BLOCK_SUSPEND = BIT1, /*WOW*/ -+ XMIT_BLOCK_MAX = 0xFF, -+}; -+void rtw_init_xmit_block(_adapter *padapter); -+void rtw_deinit_xmit_block(_adapter *padapter); -+ -+#ifdef DBG_XMIT_BLOCK -+void dump_xmit_block(void *sel, _adapter *padapter); -+#endif -+void rtw_set_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason); -+void rtw_clr_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason); -+bool rtw_is_xmit_blocked(_adapter *padapter); -+ -+/* include after declaring struct xmit_buf, in order to avoid warning */ -+#include -+ -+#endif /* _RTL871X_XMIT_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/sdio_hal.h b/drivers/staging/rtl8723cs/include/sdio_hal.h -new file mode 100644 -index 000000000000..6e49835a4154 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/sdio_hal.h -@@ -0,0 +1,57 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __SDIO_HAL_H__ -+#define __SDIO_HAL_H__ -+ -+void sd_int_dpc(PADAPTER padapter); -+u8 rtw_set_hal_ops(_adapter *padapter); -+ -+#ifdef CONFIG_RTL8188E -+void rtl8188es_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8723B -+void rtl8723bs_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8821A -+void rtl8821as_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8192E -+void rtl8192es_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8703B -+void rtl8703bs_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8723D -+void rtl8723ds_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8188F -+void rtl8188fs_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8188GTV -+void rtl8188gtvs_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#ifdef CONFIG_RTL8192F -+void rtl8192fs_set_hal_ops(PADAPTER padapter); -+#endif -+ -+#endif /* __SDIO_HAL_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/sdio_ops.h b/drivers/staging/rtl8723cs/include/sdio_ops.h -new file mode 100644 -index 000000000000..74ddeca291b5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/sdio_ops.h -@@ -0,0 +1,207 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __SDIO_OPS_H__ -+#define __SDIO_OPS_H__ -+ -+ -+/* Follow mac team suggestion, default I/O fail return value is 0xFF */ -+#define SDIO_ERR_VAL8 0xFF -+#define SDIO_ERR_VAL16 0xFFFF -+#define SDIO_ERR_VAL32 0xFFFFFFFF -+ -+#ifdef PLATFORM_LINUX -+#include -+#endif -+ -+extern void sdio_set_intf_ops(_adapter *padapter, struct _io_ops *pops); -+void dump_sdio_card_info(void *sel, struct dvobj_priv *dvobj); -+ -+u32 sdio_init(struct dvobj_priv *dvobj); -+void sdio_deinit(struct dvobj_priv *dvobj); -+int sdio_alloc_irq(struct dvobj_priv *dvobj); -+void sdio_free_irq(struct dvobj_priv *dvobj); -+u8 sdio_get_num_of_func(struct dvobj_priv *dvobj); -+ -+#if 0 -+extern void sdio_func1cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); -+extern void sdio_func1cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem); -+#endif -+extern u8 SdioLocalCmd52Read1Byte(PADAPTER padapter, u32 addr); -+extern void SdioLocalCmd52Write1Byte(PADAPTER padapter, u32 addr, u8 v); -+extern s32 _sdio_local_read(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf); -+extern s32 sdio_local_read(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf); -+extern s32 _sdio_local_write(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf); -+extern s32 sdio_local_write(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf); -+ -+u32 _sdio_read32(PADAPTER padapter, u32 addr); -+s32 _sdio_write32(PADAPTER padapter, u32 addr, u32 val); -+ -+extern void sd_int_hdl(PADAPTER padapter); -+extern u8 CheckIPSStatus(PADAPTER padapter); -+ -+#ifdef CONFIG_RTL8188E -+extern void InitInterrupt8188ESdio(PADAPTER padapter); -+extern void EnableInterrupt8188ESdio(PADAPTER padapter); -+extern void DisableInterrupt8188ESdio(PADAPTER padapter); -+extern void UpdateInterruptMask8188ESdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR); -+extern u8 HalQueryTxBufferStatus8189ESdio(PADAPTER padapter); -+extern u8 HalQueryTxOQTBufferStatus8189ESdio(PADAPTER padapter); -+extern void ClearInterrupt8188ESdio(PADAPTER padapter); -+#endif /* CONFIG_RTL8188E */ -+ -+#ifdef CONFIG_RTL8821A -+extern void InitInterrupt8821AS(PADAPTER padapter); -+extern void EnableInterrupt8821AS(PADAPTER padapter); -+extern void DisableInterrupt8821AS(PADAPTER padapter); -+extern u8 HalQueryTxBufferStatus8821AS(PADAPTER padapter); -+extern u8 HalQueryTxOQTBufferStatus8821ASdio(PADAPTER padapter); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+void ClearInterrupt8821AS(PADAPTER padapter); -+#endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */ -+#endif /* CONFIG_RTL8821A */ -+ -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+#if defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) \ -+ || defined(CONFIG_RTL8723F) -+u8 rtw_hal_enable_cpwm2(_adapter *adapter); -+#endif -+extern u8 RecvOnePkt(PADAPTER padapter); -+#endif /* CONFIG_WOWLAN */ -+#ifdef CONFIG_RTL8723B -+extern void InitInterrupt8723BSdio(PADAPTER padapter); -+extern void InitSysInterrupt8723BSdio(PADAPTER padapter); -+extern void EnableInterrupt8723BSdio(PADAPTER padapter); -+extern void DisableInterrupt8723BSdio(PADAPTER padapter); -+extern u8 HalQueryTxBufferStatus8723BSdio(PADAPTER padapter); -+extern u8 HalQueryTxOQTBufferStatus8723BSdio(PADAPTER padapter); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+extern void DisableInterruptButCpwm28723BSdio(PADAPTER padapter); -+extern void ClearInterrupt8723BSdio(PADAPTER padapter); -+#endif /* CONFIG_WOWLAN */ -+#endif -+ -+ -+#ifdef CONFIG_RTL8192E -+extern void InitInterrupt8192ESdio(PADAPTER padapter); -+extern void EnableInterrupt8192ESdio(PADAPTER padapter); -+extern void DisableInterrupt8192ESdio(PADAPTER padapter); -+extern void UpdateInterruptMask8192ESdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR); -+extern u8 HalQueryTxBufferStatus8192ESdio(PADAPTER padapter); -+extern u8 HalQueryTxOQTBufferStatus8192ESdio(PADAPTER padapter); -+extern void ClearInterrupt8192ESdio(PADAPTER padapter); -+#endif /* CONFIG_RTL8192E */ -+ -+#ifdef CONFIG_RTL8703B -+extern void InitInterrupt8703BSdio(PADAPTER padapter); -+extern void InitSysInterrupt8703BSdio(PADAPTER padapter); -+extern void EnableInterrupt8703BSdio(PADAPTER padapter); -+extern void DisableInterrupt8703BSdio(PADAPTER padapter); -+extern u8 HalQueryTxBufferStatus8703BSdio(PADAPTER padapter); -+extern u8 HalQueryTxOQTBufferStatus8703BSdio(PADAPTER padapter); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+extern void DisableInterruptButCpwm28703BSdio(PADAPTER padapter); -+extern void ClearInterrupt8703BSdio(PADAPTER padapter); -+#endif /* CONFIG_WOWLAN */ -+#endif -+ -+#ifdef CONFIG_RTL8723D -+extern void InitInterrupt8723DSdio(PADAPTER padapter); -+extern void InitSysInterrupt8723DSdio(PADAPTER padapter); -+extern void EnableInterrupt8723DSdio(PADAPTER padapter); -+extern void DisableInterrupt8723DSdio(PADAPTER padapter); -+extern u8 HalQueryTxBufferStatus8723DSdio(PADAPTER padapter); -+extern u8 HalQueryTxOQTBufferStatus8723DSdio(PADAPTER padapter); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+extern void DisableInterruptButCpwm28723dSdio(PADAPTER padapter); -+extern void ClearInterrupt8723DSdio(PADAPTER padapter); -+#endif /* CONFIG_WOWLAN */ -+#endif -+ -+#ifdef CONFIG_RTL8192F -+extern void InitInterrupt8192FSdio(PADAPTER padapter); -+extern void InitSysInterrupt8192FSdio(PADAPTER padapter); -+extern void EnableInterrupt8192FSdio(PADAPTER padapter); -+extern void DisableInterrupt8192FSdio(PADAPTER padapter); -+extern void UpdateInterruptMask8192FSdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR); -+extern u8 HalQueryTxBufferStatus8192FSdio(PADAPTER padapter); -+extern u8 HalQueryTxOQTBufferStatus8192FSdio(PADAPTER padapter); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+extern void DisableInterruptButCpwm2192fSdio(PADAPTER padapter); -+extern void ClearInterrupt8192FSdio(PADAPTER padapter); -+#endif /* CONFIG_WOWLAN */ -+#endif -+ -+#ifdef CONFIG_RTL8188F -+extern void InitInterrupt8188FSdio(PADAPTER padapter); -+extern void InitSysInterrupt8188FSdio(PADAPTER padapter); -+extern void EnableInterrupt8188FSdio(PADAPTER padapter); -+extern void DisableInterrupt8188FSdio(PADAPTER padapter); -+extern u8 HalQueryTxBufferStatus8188FSdio(PADAPTER padapter); -+extern u8 HalQueryTxOQTBufferStatus8188FSdio(PADAPTER padapter); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+extern void DisableInterruptButCpwm28188FSdio(PADAPTER padapter); -+extern void ClearInterrupt8188FSdio(PADAPTER padapter); -+#endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */ -+#endif -+ -+#ifdef CONFIG_RTL8188GTV -+extern void InitInterrupt8188GTVSdio(PADAPTER padapter); -+extern void InitSysInterrupt8188GTVSdio(PADAPTER padapter); -+extern void EnableInterrupt8188GTVSdio(PADAPTER padapter); -+extern void DisableInterrupt8188GTVSdio(PADAPTER padapter); -+extern u8 HalQueryTxBufferStatus8188GTVSdio(PADAPTER padapter); -+extern u8 HalQueryTxOQTBufferStatus8188GTVSdio(PADAPTER padapter); -+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -+extern void DisableInterruptButCpwm28188GTVSdio(PADAPTER padapter); -+extern void ClearInterrupt8188GTVSdio(PADAPTER padapter); -+#endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */ -+#endif -+ -+/** -+ * rtw_sdio_get_block_size() - Get block size of SDIO transfer -+ * @d struct dvobj_priv* -+ * -+ * The unit of return value is byte. -+ */ -+static inline u32 rtw_sdio_get_block_size(struct dvobj_priv *d) -+{ -+ return d->intf_data.block_transfer_len; -+} -+ -+/** -+ * rtw_sdio_cmd53_align_size() - Align size to one CMD53 could complete -+ * @d struct dvobj_priv* -+ * @len length to align -+ * -+ * Adjust len to align block size, and the new size could be transfered by one -+ * CMD53. -+ * If len < block size, it would keep original value, otherwise the value -+ * would be rounded up by block size. -+ * -+ * Return adjusted length. -+ */ -+static inline size_t rtw_sdio_cmd53_align_size(struct dvobj_priv *d, size_t len) -+{ -+ u32 blk_sz; -+ -+ -+ blk_sz = rtw_sdio_get_block_size(d); -+ if (len <= blk_sz) -+ return len; -+ -+ return _RND(len, blk_sz); -+} -+ -+#endif /* !__SDIO_OPS_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/sdio_ops_ce.h b/drivers/staging/rtl8723cs/include/sdio_ops_ce.h -new file mode 100644 -index 000000000000..d542cb7ea206 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/sdio_ops_ce.h -@@ -0,0 +1,49 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _SDIO_OPS_WINCE_H_ -+#define _SDIO_OPS_WINCE_H_ -+ -+#include -+#include -+#include -+#include -+ -+ -+#ifdef PLATFORM_OS_CE -+ -+ -+extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); -+ -+ -+extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); -+ -+ -+uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+ -+extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+ -+ -+extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf, u8 async); -+ -+extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); -+extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); -+extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata); -+extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata); -+extern void sdio_read_int(_adapter *padapter, u32 addr, u8 sz, void *pdata); -+ -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/sdio_ops_linux.h b/drivers/staging/rtl8723cs/include/sdio_ops_linux.h -new file mode 100644 -index 000000000000..4bbd8fe7ff68 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/sdio_ops_linux.h -@@ -0,0 +1,58 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __SDIO_OPS_LINUX_H__ -+#define __SDIO_OPS_LINUX_H__ -+ -+#ifndef RTW_HALMAC -+u8 sd_f0_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err); -+void sd_f0_write8(struct intf_hdl *pintfhdl, u32 addr, u8 v, s32 *err); -+ -+s32 _sd_cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata); -+s32 _sd_cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata); -+s32 sd_cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata); -+s32 sd_cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata); -+ -+u8 _sd_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err); -+u8 sd_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err); -+u16 sd_read16(struct intf_hdl *pintfhdl, u32 addr, s32 *err); -+u32 _sd_read32(struct intf_hdl *pintfhdl, u32 addr, s32 *err); -+u32 sd_read32(struct intf_hdl *pintfhdl, u32 addr, s32 *err); -+void sd_write8(struct intf_hdl *pintfhdl, u32 addr, u8 v, s32 *err); -+void sd_write16(struct intf_hdl *pintfhdl, u32 addr, u16 v, s32 *err); -+void _sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err); -+void sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err); -+#endif /* RTW_HALMAC */ -+ -+bool rtw_is_sdio30(_adapter *adapter); -+ -+/* The unit of return value is Hz */ -+static inline u32 rtw_sdio_get_clock(struct dvobj_priv *d) -+{ -+ return d->intf_data.clock; -+} -+ -+s32 _sd_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata); -+s32 sd_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata); -+s32 _sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata); -+s32 sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata); -+ -+void rtw_sdio_set_irq_thd(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl); -+int __must_check rtw_sdio_raw_read(struct dvobj_priv *d, unsigned int addr, -+ void *buf, size_t len, bool fixed); -+int __must_check rtw_sdio_raw_write(struct dvobj_priv *d, unsigned int addr, -+ void *buf, size_t len, bool fixed); -+ -+#endif /* __SDIO_OPS_LINUX_H__ */ -+ -diff --git a/drivers/staging/rtl8723cs/include/sdio_ops_xp.h b/drivers/staging/rtl8723cs/include/sdio_ops_xp.h -new file mode 100644 -index 000000000000..d3d8764d3878 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/sdio_ops_xp.h -@@ -0,0 +1,49 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _SDIO_OPS_XP_H_ -+#define _SDIO_OPS_XP_H_ -+ -+#include -+#include -+#include -+#include -+ -+ -+#ifdef PLATFORM_OS_XP -+ -+ -+extern u8 sdbus_cmd52r_xp(struct intf_priv *pintfpriv, u32 addr); -+ -+ -+extern void sdbus_cmd52w_xp(struct intf_priv *pintfpriv, u32 addr, u8 val8); -+ -+ -+uint sdbus_read_blocks_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+ -+extern uint sdbus_read_bytes_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+ -+ -+extern uint sdbus_write_blocks_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf, u8 async); -+ -+extern uint sdbus_write_bytes_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -+extern u8 sdbus_func1cmd52r_xp(struct intf_priv *pintfpriv, u32 addr); -+extern void sdbus_func1cmd52w_xp(struct intf_priv *pintfpriv, u32 addr, u8 val8); -+extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata); -+extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata); -+extern void sdio_read_int(_adapter *padapter, u32 addr, u8 sz, void *pdata); -+ -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/sdio_osintf.h b/drivers/staging/rtl8723cs/include/sdio_osintf.h -new file mode 100644 -index 000000000000..a94e656793af ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/sdio_osintf.h -@@ -0,0 +1,19 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __SDIO_OSINTF_H__ -+#define __SDIO_OSINTF_H__ -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/sta_info.h b/drivers/staging/rtl8723cs/include/sta_info.h -new file mode 100644 -index 000000000000..9b5fab36c690 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/sta_info.h -@@ -0,0 +1,782 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __STA_INFO_H_ -+#define __STA_INFO_H_ -+ -+#include -+ -+#define IBSS_START_MAC_ID 2 -+#define NUM_STA MACID_NUM_SW_LIMIT -+ -+#ifndef CONFIG_RTW_MACADDR_ACL -+ #ifdef CONFIG_AP_MODE -+ #define CONFIG_RTW_MACADDR_ACL 1 -+ #else -+ #define CONFIG_RTW_MACADDR_ACL 0 -+ #endif -+#endif -+ -+#ifndef CONFIG_RTW_PRE_LINK_STA -+ #define CONFIG_RTW_PRE_LINK_STA 0 -+#endif -+ -+#define NUM_ACL 16 -+ -+#define RTW_ACL_PERIOD_DEV 0 -+#define RTW_ACL_PERIOD_BSS 1 -+#define RTW_ACL_PERIOD_NUM 2 -+ -+#define RTW_ACL_MODE_DISABLED 0 -+#define RTW_ACL_MODE_ACCEPT_UNLESS_LISTED 1 -+#define RTW_ACL_MODE_DENY_UNLESS_LISTED 2 -+#define RTW_ACL_MODE_MAX 3 -+ -+#if CONFIG_RTW_MACADDR_ACL -+extern const char *const _acl_period_str[RTW_ACL_PERIOD_NUM]; -+#define acl_period_str(mode) (((mode) >= RTW_ACL_PERIOD_NUM) ? "INVALID" : _acl_period_str[(mode)]) -+extern const char *const _acl_mode_str[RTW_ACL_MODE_MAX]; -+#define acl_mode_str(mode) (((mode) >= RTW_ACL_MODE_MAX) ? "INVALID" : _acl_mode_str[(mode)]) -+#endif -+ -+#ifndef RTW_PRE_LINK_STA_NUM -+ #define RTW_PRE_LINK_STA_NUM 8 -+#endif -+ -+struct pre_link_sta_node_t { -+ u8 valid; -+ u8 addr[ETH_ALEN]; -+}; -+ -+struct pre_link_sta_ctl_t { -+ _lock lock; -+ u8 num; -+ struct pre_link_sta_node_t node[RTW_PRE_LINK_STA_NUM]; -+}; -+ -+#ifdef CONFIG_TDLS -+#define MAX_ALLOWED_TDLS_STA_NUM 4 -+#endif -+ -+enum sta_info_update_type { -+ STA_INFO_UPDATE_NONE = 0, -+ STA_INFO_UPDATE_BW = BIT(0), -+ STA_INFO_UPDATE_RATE = BIT(1), -+ STA_INFO_UPDATE_PROTECTION_MODE = BIT(2), -+ STA_INFO_UPDATE_CAP = BIT(3), -+ STA_INFO_UPDATE_HT_CAP = BIT(4), -+ STA_INFO_UPDATE_VHT_CAP = BIT(5), -+ STA_INFO_UPDATE_ALL = STA_INFO_UPDATE_BW -+ | STA_INFO_UPDATE_RATE -+ | STA_INFO_UPDATE_PROTECTION_MODE -+ | STA_INFO_UPDATE_CAP -+ | STA_INFO_UPDATE_HT_CAP -+ | STA_INFO_UPDATE_VHT_CAP, -+ STA_INFO_UPDATE_MAX -+}; -+ -+struct rtw_wlan_acl_node { -+ _list list; -+ u8 addr[ETH_ALEN]; -+ u8 valid; -+}; -+ -+struct wlan_acl_pool { -+ int mode; -+ int num; -+ struct rtw_wlan_acl_node aclnode[NUM_ACL]; -+ _queue acl_node_q; -+}; -+ -+struct stainfo_stats { -+ systime last_rx_time; -+ -+ u64 rx_mgnt_pkts; -+ u64 rx_beacon_pkts; -+ u64 rx_probereq_pkts; -+ u64 rx_probersp_pkts; /* unicast to self */ -+ u64 rx_probersp_bm_pkts; -+ u64 rx_probersp_uo_pkts; /* unicast to others */ -+ u64 rx_ctrl_pkts; -+ u64 rx_data_pkts; -+ u64 rx_data_bc_pkts; -+ u64 rx_data_mc_pkts; -+ u64 rx_data_qos_pkts[TID_NUM]; /* unicast only */ -+ -+ u64 last_rx_mgnt_pkts; -+ u64 last_rx_beacon_pkts; -+ u64 last_rx_probereq_pkts; -+ u64 last_rx_probersp_pkts; /* unicast to self */ -+ u64 last_rx_probersp_bm_pkts; -+ u64 last_rx_probersp_uo_pkts; /* unicast to others */ -+ u64 last_rx_ctrl_pkts; -+ u64 last_rx_data_pkts; -+ u64 last_rx_data_bc_pkts; -+ u64 last_rx_data_mc_pkts; -+ u64 last_rx_data_qos_pkts[TID_NUM]; /* unicast only */ -+ -+#ifdef CONFIG_TDLS -+ u64 rx_tdls_disc_rsp_pkts; -+ u64 last_rx_tdls_disc_rsp_pkts; -+#endif -+ -+ u64 rx_bytes; -+ u64 rx_bc_bytes; -+ u64 rx_mc_bytes; -+ u64 last_rx_bytes; -+ u64 last_rx_bc_bytes; -+ u64 last_rx_mc_bytes; -+ u64 rx_drops; /* TBD */ -+ u32 rx_tp_kbits; -+ u32 smooth_rx_tp_kbits; -+ -+ u64 tx_pkts; -+ u64 last_tx_pkts; -+ -+ u64 tx_bytes; -+ u64 last_tx_bytes; -+ u64 tx_drops; /* TBD */ -+ u32 tx_tp_kbits; -+ u32 smooth_tx_tp_kbits; -+ -+#ifdef CONFIG_LPS_CHK_BY_TP -+ u64 acc_tx_bytes; -+ u64 acc_rx_bytes; -+#endif -+ -+ /* unicast only */ -+ u64 last_rx_data_uc_pkts; /* For Read & Clear requirement in proc_get_rx_stat() */ -+ u32 duplicate_cnt; /* Read & Clear, in proc_get_rx_stat() */ -+ u32 rxratecnt[128]; /* Read & Clear, in proc_get_rx_stat() */ -+ u32 tx_ok_cnt; /* Read & Clear, in proc_get_tx_stat() */ -+ u32 tx_fail_cnt; /* Read & Clear, in proc_get_tx_stat() */ -+ u32 tx_retry_cnt; /* Read & Clear, in proc_get_tx_stat() */ -+#ifdef CONFIG_RTW_MESH -+ u32 rx_hwmp_pkts; -+ u32 last_rx_hwmp_pkts; -+#endif -+}; -+ -+#ifndef DBG_SESSION_TRACKER -+#define DBG_SESSION_TRACKER 0 -+#endif -+ -+/* session tracker status */ -+#define ST_STATUS_NONE 0 -+#define ST_STATUS_CHECK BIT0 -+#define ST_STATUS_ESTABLISH BIT1 -+#define ST_STATUS_EXPIRE BIT2 -+ -+#define ST_EXPIRE_MS (10 * 1000) -+ -+struct session_tracker { -+ _list list; /* session_tracker_queue */ -+ u32 local_naddr; -+ u16 local_port; -+ u32 remote_naddr; -+ u16 remote_port; -+ systime set_time; -+ u8 status; -+}; -+ -+/* session tracker cmd */ -+#define ST_CMD_ADD 0 -+#define ST_CMD_DEL 1 -+#define ST_CMD_CHK 2 -+ -+struct st_cmd_parm { -+ u8 cmd; -+ struct sta_info *sta; -+ u32 local_naddr; /* TODO: IPV6 */ -+ u16 local_port; -+ u32 remote_naddr; /* TODO: IPV6 */ -+ u16 remote_port; -+}; -+ -+typedef bool (*st_match_rule)(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port); -+ -+struct st_register { -+ u8 s_proto; -+ st_match_rule rule; -+}; -+ -+#define SESSION_TRACKER_REG_ID_WFD 0 -+#define SESSION_TRACKER_REG_ID_NUM 1 -+ -+struct st_ctl_t { -+ struct st_register reg[SESSION_TRACKER_REG_ID_NUM]; -+ _queue tracker_q; -+}; -+ -+void rtw_st_ctl_init(struct st_ctl_t *st_ctl); -+void rtw_st_ctl_deinit(struct st_ctl_t *st_ctl); -+void rtw_st_ctl_register(struct st_ctl_t *st_ctl, u8 st_reg_id, struct st_register *reg); -+void rtw_st_ctl_unregister(struct st_ctl_t *st_ctl, u8 st_reg_id); -+bool rtw_st_ctl_chk_reg_s_proto(struct st_ctl_t *st_ctl, u8 s_proto); -+bool rtw_st_ctl_chk_reg_rule(struct st_ctl_t *st_ctl, _adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port); -+void rtw_st_ctl_rx(struct sta_info *sta, u8 *ehdr_pos); -+void dump_st_ctl(void *sel, struct st_ctl_t *st_ctl); -+ -+#ifdef CONFIG_TDLS -+struct TDLS_PeerKey { -+ u8 kck[16]; /* TPK-KCK */ -+ u8 tk[16]; /* TPK-TK; only CCMP will be used */ -+} ; -+#endif /* CONFIG_TDLS */ -+ -+#ifdef DBG_RX_DFRAME_RAW_DATA -+struct sta_recv_dframe_info { -+ -+ u8 sta_data_rate; -+ u8 sta_sgi; -+ u8 sta_bw_mode; -+ s8 sta_mimo_signal_strength[4]; -+ s8 sta_RxPwr[4]; -+ u8 sta_ofdm_snr[4]; -+}; -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+struct mesh_plink_ent; -+struct rtw_ewma_err_rate { -+ unsigned long internal; -+}; -+ -+/* Mesh airtime link metrics parameters */ -+struct rtw_atlm_param { -+ struct rtw_ewma_err_rate err_rate; /* Now is PACKET error rate */ -+ u16 data_rate; /* The unit is 100Kbps */ -+ u16 total_pkt; -+ u16 overhead; /* Channel access overhead */ -+}; -+#endif -+ -+struct sta_info { -+ -+ _lock lock; -+ _list list; /* free_sta_queue */ -+ _list hash_list; /* sta_hash */ -+ /* _list asoc_list; */ /* 20061114 */ -+ /* _list sleep_list; */ /* sleep_q */ -+ /* _list wakeup_list; */ /* wakeup_q */ -+ _adapter *padapter; -+ struct cmn_sta_info cmn; -+ -+ struct sta_xmit_priv sta_xmitpriv; -+ struct sta_recv_priv sta_recvpriv; -+ -+#ifdef DBG_RX_DFRAME_RAW_DATA -+ struct sta_recv_dframe_info sta_dframe_info; -+ struct sta_recv_dframe_info sta_dframe_info_bmc; -+#endif -+ _queue sleep_q; -+ unsigned int sleepq_len; -+#ifdef CONFIG_RTW_MGMT_QUEUE -+ _queue mgmt_sleep_q; -+ unsigned int mgmt_sleepq_len; -+#endif -+ -+ uint state; -+ uint qos_option; -+ u16 hwseq; -+ -+#ifdef CONFIG_RTW_80211K -+ u8 rm_en_cap[5]; -+ u8 rm_diag_token; -+#endif /* CONFIG_RTW_80211K */ -+ -+ systime resp_nonenc_eapol_key_starttime; -+ uint ieee8021x_blocked; /* 0: allowed, 1:blocked */ -+ uint dot118021XPrivacy; /* aes, tkip... */ -+ union Keytype dot11tkiptxmickey; -+ union Keytype dot11tkiprxmickey; -+ union Keytype dot118021x_UncstKey; -+ union pn48 dot11txpn; /* PN48 used for Unicast xmit */ -+ union pn48 dot11rxpn; /* PN48 used for Unicast recv. */ -+#ifdef CONFIG_RTW_MESH -+ /* peer's GTK, RX only */ -+ u8 group_privacy; -+ u8 gtk_bmp; -+ union Keytype gtk; -+ union pn48 gtk_pn; -+ #ifdef CONFIG_IEEE80211W -+ /* peer's IGTK, RX only */ -+ enum security_type dot11wCipher; -+ u8 igtk_bmp; -+ u8 igtk_id; -+ union Keytype igtk; -+ union pn48 igtk_pn; -+ #endif /* CONFIG_IEEE80211W */ -+#endif /* CONFIG_RTW_MESH */ -+#ifdef CONFIG_GTK_OL -+ u8 kek[RTW_KEK_LEN]; -+ u8 kck[RTW_KCK_LEN]; -+ u8 replay_ctr[RTW_REPLAY_CTR_LEN]; -+#endif /* CONFIG_GTK_OL */ -+#ifdef CONFIG_IEEE80211W -+ _timer dot11w_expire_timer; -+#endif /* CONFIG_IEEE80211W */ -+ -+ u8 bssrateset[16]; -+ u32 bssratelen; -+ -+ u8 cts2self; -+ u8 rtsen; -+ -+ u8 init_rate; -+ u8 wireless_mode; /* NETWORK_TYPE */ -+ -+ struct stainfo_stats sta_stats; -+ -+#ifdef CONFIG_TDLS -+ u32 tdls_sta_state; -+ u8 SNonce[32]; -+ u8 ANonce[32]; -+ u32 TDLS_PeerKey_Lifetime; -+ u32 TPK_count; -+ _timer TPK_timer; -+ struct TDLS_PeerKey tpk; -+#ifdef CONFIG_TDLS_CH_SW -+ u16 ch_switch_time; -+ u16 ch_switch_timeout; -+ /* u8 option; */ -+ _timer ch_sw_timer; -+ _timer delay_timer; -+ _timer stay_on_base_chnl_timer; -+ _timer ch_sw_monitor_timer; -+#endif -+ _timer handshake_timer; -+ u8 alive_count; -+ _timer pti_timer; -+ u8 TDLS_RSNIE[20]; /* Save peer's RSNIE, used for sending TDLS_SETUP_RSP */ -+#endif /* CONFIG_TDLS */ -+ -+ /* for A-MPDU TX, ADDBA timeout check */ -+ _timer addba_retry_timer; -+ -+ /* for A-MPDU Rx reordering buffer control */ -+ struct recv_reorder_ctrl recvreorder_ctrl[TID_NUM]; -+ ATOMIC_T continual_no_rx_packet[TID_NUM]; -+ /* for A-MPDU Tx */ -+ /* unsigned char ampdu_txen_bitmap; */ -+ u16 BA_starting_seqctrl[16]; -+ -+ -+#ifdef CONFIG_80211N_HT -+ struct ht_priv htpriv; -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ struct vht_priv vhtpriv; -+#endif -+ -+ /* Notes: */ -+ /* STA_Mode: */ -+ /* curr_network(mlme_priv/security_priv/qos/ht) + sta_info: (STA & AP) CAP/INFO */ -+ /* scan_q: AP CAP/INFO */ -+ -+ /* AP_Mode: */ -+ /* curr_network(mlme_priv/security_priv/qos/ht) : AP CAP/INFO */ -+ /* sta_info: (AP & STA) CAP/INFO */ -+ -+ unsigned int expire_to; -+ -+ int flags; -+ -+ u8 bpairwise_key_installed; -+ -+#ifdef CONFIG_AP_MODE -+ -+ _list asoc_list; -+ _list auth_list; -+ -+ unsigned int auth_seq; -+ unsigned int authalg; -+ unsigned char chg_txt[128]; -+ -+ u16 capability; -+ -+ int dot8021xalg;/* 0:disable, 1:psk, 2:802.1x */ -+ int wpa_psk;/* 0:disable, bit(0): WPA, bit(1):WPA2 */ -+ int wpa_group_cipher; -+ int wpa2_group_cipher; -+ int wpa_pairwise_cipher; -+ int wpa2_pairwise_cipher; -+ -+ u32 akm_suite_type; -+ -+#ifdef CONFIG_RTW_80211R -+ u8 ft_pairwise_key_installed; -+#endif -+ -+#ifdef CONFIG_NATIVEAP_MLME -+ u8 wpa_ie[32]; -+ -+ u8 nonerp_set; -+ u8 no_short_slot_time_set; -+ u8 no_short_preamble_set; -+ u8 no_ht_gf_set; -+ u8 no_ht_set; -+ u8 ht_20mhz_set; -+ u8 ht_40mhz_intolerant; -+#endif /* CONFIG_NATIVEAP_MLME */ -+ -+#ifdef CONFIG_ATMEL_RC_PATCH -+ u8 flag_atmel_rc; -+#endif -+ -+ u8 qos_info; -+ -+ u8 max_sp_len; -+ u8 uapsd_bk;/* BIT(0): Delivery enabled, BIT(1): Trigger enabled */ -+ u8 uapsd_be; -+ u8 uapsd_vi; -+ u8 uapsd_vo; -+ -+ u8 has_legacy_ac; -+ unsigned int sleepq_ac_len; -+ -+#ifdef CONFIG_P2P -+ /* p2p priv data */ -+ u8 is_p2p_device; -+ u8 p2p_status_code; -+ -+ /* p2p client info */ -+ u8 dev_addr[ETH_ALEN]; -+ /* u8 iface_addr[ETH_ALEN]; */ /* = hwaddr[ETH_ALEN] */ -+ u8 dev_cap; -+ u16 config_methods; -+ u8 primary_dev_type[8]; -+ u8 num_of_secdev_type; -+ u8 secdev_types_list[32];/* 32/8 == 4; */ -+ u16 dev_name_len; -+ u8 dev_name[32]; -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_WFD -+ u8 op_wfd_mode; -+#endif -+ -+#if !defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && defined(CONFIG_80211N_HT) -+ u8 under_exist_checking; -+#endif -+ -+ u8 keep_alive_trycnt; -+ -+#ifdef CONFIG_AUTO_AP_MODE -+ u8 isrc; /* this device is rc */ -+ u16 pid; /* pairing id */ -+#endif -+ -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_RTW_MESH -+ struct mesh_plink_ent *plink; -+ -+ u8 local_mps; -+ u8 peer_mps; -+ u8 nonpeer_mps; -+ -+ struct rtw_atlm_param metrics; -+ /* The reference for nexthop_lookup */ -+ BOOLEAN alive; -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ u8 *pauth_frame; -+ u32 auth_len; -+ u8 *passoc_req; -+ u32 assoc_req_len; -+#endif -+ -+ u8 IOTPeer; /* Enum value. HT_IOT_PEER_E */ -+#ifdef CONFIG_LPS_PG -+ u8 lps_pg_rssi_lv; -+#endif -+ -+ /* To store the sequence number of received management frame */ -+ u16 RxMgmtFrameSeqNum; -+ -+ struct st_ctl_t st_ctl; -+ u8 max_agg_num_minimal_record; /*keep minimal tx desc max_agg_num setting*/ -+ u8 curr_rx_rate; -+ u8 curr_rx_rate_bmc; -+#ifdef CONFIG_RTS_FULL_BW -+ bool vendor_8812; -+#endif -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ u8 tbtx_enable; /* Does this sta_info support & enable TBTX function? */ -+// u8 tbtx_timeslot; /* This sta_info belong to which time slot. */ -+#endif -+ -+ /* -+ * Vaiables for queuing TX pkt a short period of time -+ * to wait something ready. -+ */ -+ u8 tx_q_enable; -+ struct __queue tx_queue; -+ _workitem tx_q_work; -+}; -+ -+#ifdef CONFIG_RTW_MESH -+#define STA_SET_MESH_PLINK(sta, link) (sta)->plink = link -+#else -+#define STA_SET_MESH_PLINK(sta, link) do {} while (0) -+#endif -+ -+#define sta_tx_pkts(sta) \ -+ (sta->sta_stats.tx_pkts) -+ -+#define sta_last_tx_pkts(sta) \ -+ (sta->sta_stats.last_tx_pkts) -+ -+#define sta_rx_pkts(sta) \ -+ (sta->sta_stats.rx_mgnt_pkts \ -+ + sta->sta_stats.rx_ctrl_pkts \ -+ + sta->sta_stats.rx_data_pkts) -+ -+#define sta_last_rx_pkts(sta) \ -+ (sta->sta_stats.last_rx_mgnt_pkts \ -+ + sta->sta_stats.last_rx_ctrl_pkts \ -+ + sta->sta_stats.last_rx_data_pkts) -+ -+#define sta_rx_data_pkts(sta) (sta->sta_stats.rx_data_pkts) -+#define sta_last_rx_data_pkts(sta) (sta->sta_stats.last_rx_data_pkts) -+ -+#define sta_rx_data_uc_pkts(sta) (sta->sta_stats.rx_data_pkts - sta->sta_stats.rx_data_bc_pkts - sta->sta_stats.rx_data_mc_pkts) -+#define sta_last_rx_data_uc_pkts(sta) (sta->sta_stats.last_rx_data_pkts - sta->sta_stats.last_rx_data_bc_pkts - sta->sta_stats.last_rx_data_mc_pkts) -+ -+#define sta_rx_data_qos_pkts(sta, i) \ -+ (sta->sta_stats.rx_data_qos_pkts[i]) -+ -+#define sta_last_rx_data_qos_pkts(sta, i) \ -+ (sta->sta_stats.last_rx_data_qos_pkts[i]) -+ -+#define sta_rx_mgnt_pkts(sta) \ -+ (sta->sta_stats.rx_mgnt_pkts) -+ -+#define sta_last_rx_mgnt_pkts(sta) \ -+ (sta->sta_stats.last_rx_mgnt_pkts) -+ -+#define sta_rx_beacon_pkts(sta) \ -+ (sta->sta_stats.rx_beacon_pkts) -+ -+#define sta_last_rx_beacon_pkts(sta) \ -+ (sta->sta_stats.last_rx_beacon_pkts) -+ -+#define sta_rx_probereq_pkts(sta) \ -+ (sta->sta_stats.rx_probereq_pkts) -+ -+#define sta_last_rx_probereq_pkts(sta) \ -+ (sta->sta_stats.last_rx_probereq_pkts) -+ -+#define sta_rx_probersp_pkts(sta) \ -+ (sta->sta_stats.rx_probersp_pkts) -+ -+#define sta_last_rx_probersp_pkts(sta) \ -+ (sta->sta_stats.last_rx_probersp_pkts) -+ -+#define sta_rx_probersp_bm_pkts(sta) \ -+ (sta->sta_stats.rx_probersp_bm_pkts) -+ -+#define sta_last_rx_probersp_bm_pkts(sta) \ -+ (sta->sta_stats.last_rx_probersp_bm_pkts) -+ -+#define sta_rx_probersp_uo_pkts(sta) \ -+ (sta->sta_stats.rx_probersp_uo_pkts) -+ -+#define sta_last_rx_probersp_uo_pkts(sta) \ -+ (sta->sta_stats.last_rx_probersp_uo_pkts) -+ -+#ifdef CONFIG_RTW_MESH -+#define update_last_rx_hwmp_pkts(sta) \ -+ do { \ -+ sta->sta_stats.last_rx_hwmp_pkts = sta->sta_stats.rx_hwmp_pkts; \ -+ } while(0) -+#else -+#define update_last_rx_hwmp_pkts(sta) do {} while(0) -+#endif -+ -+#define sta_update_last_rx_pkts(sta) \ -+ do { \ -+ int __i; \ -+ \ -+ sta->sta_stats.last_rx_mgnt_pkts = sta->sta_stats.rx_mgnt_pkts; \ -+ sta->sta_stats.last_rx_beacon_pkts = sta->sta_stats.rx_beacon_pkts; \ -+ sta->sta_stats.last_rx_probereq_pkts = sta->sta_stats.rx_probereq_pkts; \ -+ sta->sta_stats.last_rx_probersp_pkts = sta->sta_stats.rx_probersp_pkts; \ -+ sta->sta_stats.last_rx_probersp_bm_pkts = sta->sta_stats.rx_probersp_bm_pkts; \ -+ sta->sta_stats.last_rx_probersp_uo_pkts = sta->sta_stats.rx_probersp_uo_pkts; \ -+ sta->sta_stats.last_rx_ctrl_pkts = sta->sta_stats.rx_ctrl_pkts; \ -+ update_last_rx_hwmp_pkts(sta); \ -+ \ -+ sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \ -+ sta->sta_stats.last_rx_data_bc_pkts = sta->sta_stats.rx_data_bc_pkts; \ -+ sta->sta_stats.last_rx_data_mc_pkts = sta->sta_stats.rx_data_mc_pkts; \ -+ for (__i = 0; __i < TID_NUM; __i++) \ -+ sta->sta_stats.last_rx_data_qos_pkts[__i] = sta->sta_stats.rx_data_qos_pkts[__i]; \ -+ } while (0) -+ -+#define STA_RX_PKTS_ARG(sta) \ -+ sta->sta_stats.rx_mgnt_pkts \ -+ , sta->sta_stats.rx_ctrl_pkts \ -+ , sta->sta_stats.rx_data_pkts -+ -+#define STA_LAST_RX_PKTS_ARG(sta) \ -+ sta->sta_stats.last_rx_mgnt_pkts \ -+ , sta->sta_stats.last_rx_ctrl_pkts \ -+ , sta->sta_stats.last_rx_data_pkts -+ -+#define STA_RX_PKTS_DIFF_ARG(sta) \ -+ sta->sta_stats.rx_mgnt_pkts - sta->sta_stats.last_rx_mgnt_pkts \ -+ , sta->sta_stats.rx_ctrl_pkts - sta->sta_stats.last_rx_ctrl_pkts \ -+ , sta->sta_stats.rx_data_pkts - sta->sta_stats.last_rx_data_pkts -+ -+#define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)" -+ -+#define sta_rx_uc_bytes(sta) (sta->sta_stats.rx_bytes - sta->sta_stats.rx_bc_bytes - sta->sta_stats.rx_mc_bytes) -+#define sta_last_rx_uc_bytes(sta) (sta->sta_stats.last_rx_bytes - sta->sta_stats.last_rx_bc_bytes - sta->sta_stats.last_rx_mc_bytes) -+ -+#ifdef CONFIG_WFD -+#define STA_OP_WFD_MODE(sta) (sta)->op_wfd_mode -+#define STA_SET_OP_WFD_MODE(sta, mode) (sta)->op_wfd_mode = (mode) -+#else -+#define STA_OP_WFD_MODE(sta) 0 -+#define STA_SET_OP_WFD_MODE(sta, mode) do {} while (0) -+#endif -+ -+#define AID_BMP_LEN(max_aid) ((max_aid + 1) / 8 + (((max_aid + 1) % 8) ? 1 : 0)) -+ -+struct sta_priv { -+ -+ u8 *pallocated_stainfo_buf; -+ u8 *pstainfo_buf; -+ _queue free_sta_queue; -+ -+ _lock sta_hash_lock; -+ _list sta_hash[NUM_STA]; -+ int asoc_sta_count; -+ _queue sleep_q; -+ _queue wakeup_q; -+ -+ _adapter *padapter; -+ -+ u32 adhoc_expire_to; -+ -+ int rx_chk_limit; -+ -+#ifdef CONFIG_AP_MODE -+ _list asoc_list; -+ _list auth_list; -+ _lock asoc_list_lock; -+ _lock auth_list_lock; -+ u8 asoc_list_cnt; -+ u8 auth_list_cnt; -+ -+ unsigned int auth_to; /* sec, time to expire in authenticating. */ -+ unsigned int assoc_to; /* sec, time to expire before associating. */ -+ unsigned int expire_to; /* sec , time to expire after associated. */ -+ -+ /* -+ * pointers to STA info; based on allocated AID or NULL if AID free -+ * AID is in the range 1-2007, so sta_aid[0] corresponders to AID 1 -+ */ -+ struct sta_info **sta_aid; -+ u16 max_aid; -+ u16 started_aid; /* started AID for allocation search */ -+ bool rr_aid; /* round robin AID allocation, will modify started_aid */ -+ u8 aid_bmp_len; /* in byte */ -+ u8 *sta_dz_bitmap; -+ u8 *tim_bitmap; -+ -+ u16 max_num_sta; -+ -+#if CONFIG_RTW_MACADDR_ACL -+ struct wlan_acl_pool acl_list[RTW_ACL_PERIOD_NUM]; -+#endif -+ -+ #if CONFIG_RTW_PRE_LINK_STA -+ struct pre_link_sta_ctl_t pre_link_sta_ctl; -+ #endif -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ u8 tbtx_asoc_list_cnt; -+ struct sta_info *token_holder[NR_MAXSTA_INSLOT]; -+ struct sta_info *last_token_holder; -+ ATOMIC_T nr_token_keeper; -+#endif -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_ATMEL_RC_PATCH -+ u8 atmel_rc_pattern[6]; -+#endif -+ u8 c2h_sta_mac[ETH_ALEN]; -+ u8 c2h_adapter_id; -+ struct submit_ctx *gotc2h; -+}; -+ -+ -+__inline static u32 wifi_mac_hash(const u8 *mac) -+{ -+ u32 x; -+ -+ x = mac[0]; -+ x = (x << 2) ^ mac[1]; -+ x = (x << 2) ^ mac[2]; -+ x = (x << 2) ^ mac[3]; -+ x = (x << 2) ^ mac[4]; -+ x = (x << 2) ^ mac[5]; -+ -+ x ^= x >> 8; -+ x = x & (NUM_STA - 1); -+ -+ return x; -+} -+ -+ -+extern u32 _rtw_init_sta_priv(struct sta_priv *pstapriv); -+extern u32 _rtw_free_sta_priv(struct sta_priv *pstapriv); -+ -+#define stainfo_offset_valid(offset) (offset < NUM_STA && offset >= 0) -+int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta); -+struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset); -+ -+extern struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr); -+extern u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta); -+extern void rtw_free_all_stainfo(_adapter *padapter); -+extern struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr); -+extern u32 rtw_init_bcmc_stainfo(_adapter *padapter); -+extern struct sta_info *rtw_get_bcmc_stainfo(_adapter *padapter); -+ -+#ifdef CONFIG_AP_MODE -+u16 rtw_aid_alloc(_adapter *adapter, struct sta_info *sta); -+void dump_aid_status(void *sel, _adapter *adapter); -+#endif -+ -+#if CONFIG_RTW_MACADDR_ACL -+extern u8 rtw_access_ctrl(_adapter *adapter, const u8 *mac_addr); -+void dump_macaddr_acl(void *sel, _adapter *adapter); -+#endif -+ -+bool rtw_is_pre_link_sta(struct sta_priv *stapriv, u8 *addr); -+#if CONFIG_RTW_PRE_LINK_STA -+struct sta_info *rtw_pre_link_sta_add(struct sta_priv *stapriv, u8 *hwaddr); -+void rtw_pre_link_sta_del(struct sta_priv *stapriv, u8 *hwaddr); -+void rtw_pre_link_sta_ctl_reset(struct sta_priv *stapriv); -+void rtw_pre_link_sta_ctl_init(struct sta_priv *stapriv); -+void rtw_pre_link_sta_ctl_deinit(struct sta_priv *stapriv); -+void dump_pre_link_sta_ctl(void *sel, struct sta_priv *stapriv); -+#endif /* CONFIG_RTW_PRE_LINK_STA */ -+ -+#endif /* _STA_INFO_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/usb_hal.h b/drivers/staging/rtl8723cs/include/usb_hal.h -new file mode 100644 -index 000000000000..2d7776f0695d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/usb_hal.h -@@ -0,0 +1,71 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __USB_HAL_H__ -+#define __USB_HAL_H__ -+ -+int usb_init_recv_priv(_adapter *padapter, u16 ini_in_buf_sz); -+void usb_free_recv_priv(_adapter *padapter, u16 ini_in_buf_sz); -+#ifdef CONFIG_FW_C2H_REG -+void usb_c2h_hisr_hdl(_adapter *adapter, u8 *buf); -+#endif -+ -+u8 rtw_set_hal_ops(_adapter *padapter); -+ -+#ifdef CONFIG_RTL8188E -+void rtl8188eu_set_hal_ops(_adapter *padapter); -+#endif -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+void rtl8812au_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8192E -+void rtl8192eu_set_hal_ops(_adapter *padapter); -+#endif -+ -+ -+#ifdef CONFIG_RTL8723B -+void rtl8723bu_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8814A -+void rtl8814au_set_hal_ops(_adapter *padapter); -+#endif /* CONFIG_RTL8814A */ -+ -+#ifdef CONFIG_RTL8188F -+void rtl8188fu_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8188GTV -+void rtl8188gtvu_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8703B -+void rtl8703bu_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8723D -+void rtl8723du_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8710B -+void rtl8710bu_set_hal_ops(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTL8192F -+void rtl8192fu_set_hal_ops(_adapter *padapter); -+#endif /* CONFIG_RTL8192F */ -+ -+#endif /* __USB_HAL_H__ */ -diff --git a/drivers/staging/rtl8723cs/include/usb_ops.h b/drivers/staging/rtl8723cs/include/usb_ops.h -new file mode 100644 -index 000000000000..6d5435d65741 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/usb_ops.h -@@ -0,0 +1,153 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __USB_OPS_H_ -+#define __USB_OPS_H_ -+ -+ -+#define REALTEK_USB_VENQT_READ 0xC0 -+#define REALTEK_USB_VENQT_WRITE 0x40 -+#define REALTEK_USB_VENQT_CMD_REQ 0x05 -+#define REALTEK_USB_VENQT_CMD_IDX 0x00 -+#define REALTEK_USB_IN_INT_EP_IDX 1 -+ -+enum { -+ VENDOR_WRITE = 0x00, -+ VENDOR_READ = 0x01, -+}; -+#define ALIGNMENT_UNIT 16 -+#define MAX_VENDOR_REQ_CMD_SIZE 254 /* 8188cu SIE Support */ -+#define MAX_USB_IO_CTL_SIZE (MAX_VENDOR_REQ_CMD_SIZE + ALIGNMENT_UNIT) -+ -+#ifdef PLATFORM_LINUX -+#include -+#endif /* PLATFORM_LINUX */ -+ -+#ifdef CONFIG_RTL8188E -+void rtl8188eu_set_hw_type(struct dvobj_priv *pdvobj); -+#ifdef CONFIG_SUPPORT_USB_INT -+void interrupt_handler_8188eu(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif -+#endif -+ -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -+void rtl8812au_set_hw_type(struct dvobj_priv *pdvobj); -+#ifdef CONFIG_SUPPORT_USB_INT -+void interrupt_handler_8812au(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif -+#endif -+ -+#ifdef CONFIG_RTL8814A -+void rtl8814au_set_hw_type(struct dvobj_priv *pdvobj); -+#ifdef CONFIG_SUPPORT_USB_INT -+void interrupt_handler_8814au(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif -+#endif /* CONFIG_RTL8814 */ -+ -+#ifdef CONFIG_RTL8192E -+void rtl8192eu_set_hw_type(struct dvobj_priv *pdvobj); -+#ifdef CONFIG_SUPPORT_USB_INT -+void interrupt_handler_8192eu(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif -+ -+#endif -+ -+#ifdef CONFIG_RTL8188F -+void rtl8188fu_set_hw_type(struct dvobj_priv *pdvobj); -+#ifdef CONFIG_SUPPORT_USB_INT -+void interrupt_handler_8188fu(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif -+#endif -+ -+#ifdef CONFIG_RTL8188GTV -+void rtl8188gtvu_set_hw_type(struct dvobj_priv *pdvobj); -+#ifdef CONFIG_SUPPORT_USB_INT -+void interrupt_handler_8188gtvu(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif -+#endif -+ -+#ifdef CONFIG_RTL8723B -+void rtl8723bu_set_hw_type(struct dvobj_priv *pdvobj); -+#ifdef CONFIG_SUPPORT_USB_INT -+void interrupt_handler_8723bu(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif -+#endif -+ -+#ifdef CONFIG_RTL8703B -+void rtl8703bu_set_hw_type(struct dvobj_priv *pdvobj); -+#ifdef CONFIG_SUPPORT_USB_INT -+void interrupt_handler_8703bu(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif /* CONFIG_SUPPORT_USB_INT */ -+#endif /* CONFIG_RTL8703B */ -+ -+void usb_set_intf_ops(_adapter *padapter, struct _io_ops *pops); -+ -+#ifdef CONFIG_RTL8723D -+void rtl8723du_set_hw_type(struct dvobj_priv *pdvobj); -+void rtl8723du_set_intf_ops(struct _io_ops *pops); -+void rtl8723du_recv_tasklet(void *priv); -+void rtl8723du_xmit_tasklet(void *priv); -+#ifdef CONFIG_SUPPORT_USB_INT -+void interrupt_handler_8723du(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif /* CONFIG_SUPPORT_USB_INT */ -+#endif /* CONFIG_RTL8723D */ -+ -+#ifdef CONFIG_RTL8710B -+void rtl8710bu_set_hw_type(struct dvobj_priv *pdvobj); -+void rtl8710bu_set_intf_ops(struct _io_ops *pops); -+void rtl8710bu_recv_tasklet(void *priv); -+void rtl8710bu_xmit_tasklet(void *priv); -+#ifdef CONFIG_SUPPORT_USB_INT -+void interrupt_handler_8710bu(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif /* CONFIG_SUPPORT_USB_INT */ -+#endif /* CONFIG_RTL8710B */ -+ -+#ifdef CONFIG_RTL8192F -+void rtl8192fu_set_hw_type(struct dvobj_priv *pdvobj); -+void rtl8192fu_xmit_tasklet(void *priv); -+#ifdef CONFIG_SUPPORT_USB_INT -+void rtl8192fu_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf); -+#endif /* CONFIG_SUPPORT_USB_INT */ -+#endif /* CONFIG_RTL8192F */ -+ -+enum RTW_USB_SPEED { -+ RTW_USB_SPEED_UNKNOWN = 0, -+ RTW_USB_SPEED_1_1 = 1, -+ RTW_USB_SPEED_2 = 2, -+ RTW_USB_SPEED_3 = 3, -+}; -+ -+#define IS_FULL_SPEED_USB(Adapter) (adapter_to_dvobj(Adapter)->usb_speed == RTW_USB_SPEED_1_1) -+#define IS_HIGH_SPEED_USB(Adapter) (adapter_to_dvobj(Adapter)->usb_speed == RTW_USB_SPEED_2) -+#define IS_SUPER_SPEED_USB(Adapter) (adapter_to_dvobj(Adapter)->usb_speed == RTW_USB_SPEED_3) -+ -+#define USB_SUPER_SPEED_BULK_SIZE 1024 /* usb 3.0 */ -+#define USB_HIGH_SPEED_BULK_SIZE 512 /* usb 2.0 */ -+#define USB_FULL_SPEED_BULK_SIZE 64 /* usb 1.1 */ -+ -+static inline u8 rtw_usb_bulk_size_boundary(_adapter *padapter, int buf_len) -+{ -+ u8 rst = _TRUE; -+ -+ if (IS_SUPER_SPEED_USB(padapter)) -+ rst = (0 == (buf_len) % USB_SUPER_SPEED_BULK_SIZE) ? _TRUE : _FALSE; -+ else if (IS_HIGH_SPEED_USB(padapter)) -+ rst = (0 == (buf_len) % USB_HIGH_SPEED_BULK_SIZE) ? _TRUE : _FALSE; -+ else -+ rst = (0 == (buf_len) % USB_FULL_SPEED_BULK_SIZE) ? _TRUE : _FALSE; -+ return rst; -+} -+ -+ -+#endif /* __USB_OPS_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/usb_ops_linux.h b/drivers/staging/rtl8723cs/include/usb_ops_linux.h -new file mode 100644 -index 000000000000..bf59ca0fa51a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/usb_ops_linux.h -@@ -0,0 +1,98 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __USB_OPS_LINUX_H__ -+#define __USB_OPS_LINUX_H__ -+ -+#define VENDOR_CMD_MAX_DATA_LEN 254 -+#define FW_START_ADDRESS 0x1000 -+ -+#define RTW_USB_CONTROL_MSG_TIMEOUT_TEST 10/* ms */ -+#define RTW_USB_CONTROL_MSG_TIMEOUT 500/* ms */ -+ -+#define RECV_BULK_IN_ADDR 0x80/* assign by drv, not real address */ -+#define RECV_INT_IN_ADDR 0x81/* assign by drv, not real address */ -+ -+#define INTERRUPT_MSG_FORMAT_LEN 60 -+ -+#if defined(CONFIG_VENDOR_REQ_RETRY) && defined(CONFIG_USB_VENDOR_REQ_MUTEX) -+ /* vendor req retry should be in the situation when each vendor req is atomically submitted from others */ -+ #define MAX_USBCTRL_VENDORREQ_TIMES 10 -+#else -+ #define MAX_USBCTRL_VENDORREQ_TIMES 1 -+#endif -+ -+#define RTW_USB_BULKOUT_TIMEOUT 5000/* ms */ -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 0)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 18)) -+#define _usbctrl_vendorreq_async_callback(urb, regs) _usbctrl_vendorreq_async_callback(urb) -+#define usb_bulkout_zero_complete(purb, regs) usb_bulkout_zero_complete(purb) -+#define usb_write_mem_complete(purb, regs) usb_write_mem_complete(purb) -+#define usb_write_port_complete(purb, regs) usb_write_port_complete(purb) -+#define usb_read_port_complete(purb, regs) usb_read_port_complete(purb) -+#define usb_read_interrupt_complete(purb, regs) usb_read_interrupt_complete(purb) -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 12)) -+#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size, timeout_ms) \ -+ usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), (timeout_ms)) -+#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \ -+ usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), (timeout_ms)) -+#else -+#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size, timeout_ms) \ -+ usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), \ -+ ((timeout_ms) == 0) || ((timeout_ms) * HZ / 1000 > 0) ? ((timeout_ms) * HZ / 1000) : 1) -+#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \ -+ usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), \ -+ ((timeout_ms) == 0) || ((timeout_ms) * HZ / 1000 > 0) ? ((timeout_ms) * HZ / 1000) : 1) -+#endif -+ -+ -+#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ -+int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val); -+int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val); -+int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val); -+#endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ -+ -+unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr); -+ -+void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); -+void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem); -+ -+void usb_read_port_cancel(struct intf_hdl *pintfhdl); -+ -+u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem); -+void usb_write_port_cancel(struct intf_hdl *pintfhdl); -+ -+int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype); -+#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ -+int _usbctrl_vendorreq_async_write(struct usb_device *udev, u8 request, -+ u16 value, u16 index, void *pdata, u16 len, u8 requesttype); -+#endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ -+ -+u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr); -+u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr); -+u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr); -+int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val); -+int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val); -+int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val); -+int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); -+u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); -+void usb_recv_tasklet(void *priv); -+ -+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE -+void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs); -+u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr); -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/include/usb_osintf.h b/drivers/staging/rtl8723cs/include/usb_osintf.h -new file mode 100644 -index 000000000000..48495b492fcc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/usb_osintf.h -@@ -0,0 +1,26 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __USB_OSINTF_H -+#define __USB_OSINTF_H -+ -+#include -+ -+#define USBD_HALTED(Status) ((u32)(Status) >> 30 == 3) -+ -+ -+u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, RT_USB_BREQUEST brequest, RT_USB_WVALUE wvalue, u8 windex, void *data, u8 datalen, u8 isdirectionin); -+ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/usb_vendor_req.h b/drivers/staging/rtl8723cs/include/usb_vendor_req.h -new file mode 100644 -index 000000000000..3e25878639ae ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/usb_vendor_req.h -@@ -0,0 +1,56 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _USB_VENDOR_REQUEST_H_ -+#define _USB_VENDOR_REQUEST_H_ -+ -+/* 4 Set/Get Register related wIndex/Data */ -+#define RT_USB_RESET_MASK_OFF 0 -+#define RT_USB_RESET_MASK_ON 1 -+#define RT_USB_SLEEP_MASK_OFF 0 -+#define RT_USB_SLEEP_MASK_ON 1 -+#define RT_USB_LDO_ON 1 -+#define RT_USB_LDO_OFF 0 -+ -+/* 4 Set/Get SYSCLK related wValue or Data */ -+#define RT_USB_SYSCLK_32KHZ 0 -+#define RT_USB_SYSCLK_40MHZ 1 -+#define RT_USB_SYSCLK_60MHZ 2 -+ -+ -+typedef enum _RT_USB_BREQUEST { -+ RT_USB_SET_REGISTER = 1, -+ RT_USB_SET_SYSCLK = 2, -+ RT_USB_GET_SYSCLK = 3, -+ RT_USB_GET_REGISTER = 4 -+} RT_USB_BREQUEST; -+ -+ -+typedef enum _RT_USB_WVALUE { -+ RT_USB_RESET_MASK = 1, -+ RT_USB_SLEEP_MASK = 2, -+ RT_USB_USB_HRCPWM = 3, -+ RT_USB_LDO = 4, -+ RT_USB_BOOT_TYPE = 5 -+} RT_USB_WVALUE; -+ -+ -+#if 0 -+BOOLEAN usbvendorrequest(PCE_USB_DEVICE CEdevice, RT_USB_BREQUEST bRequest, RT_USB_WVALUE wValue, u8 wIndex, void *Data, u8 DataLength, BOOLEAN isDirectionIn); -+BOOLEAN CEusbGetStatusRequest(PCE_USB_DEVICE CEdevice, u16 Op, u16 Index, void *Data); -+BOOLEAN CEusbFeatureRequest(PCE_USB_DEVICE CEdevice, u16 Op, u16 FeatureSelector, u16 Index); -+BOOLEAN CEusbGetDescriptorRequest(PCE_USB_DEVICE CEdevice, short urbLength, u8 DescriptorType, u8 Index, u16 LanguageId, void *TransferBuffer, u32 TransferBufferLength); -+#endif -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/include/wifi.h b/drivers/staging/rtl8723cs/include/wifi.h -new file mode 100644 -index 000000000000..d07b349ac5bc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/wifi.h -@@ -0,0 +1,1369 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef _WIFI_H_ -+#define _WIFI_H_ -+ -+ -+#ifndef BIT -+#define BIT(x) (1 << (x)) -+#endif -+#ifndef BIT_ULL -+#define BIT_ULL(x) (1ULL << (x)) -+#endif -+ -+ -+#define WLAN_ETHHDR_LEN 14 -+#define WLAN_ETHADDR_LEN 6 -+#define WLAN_IEEE_OUI_LEN 3 -+#define WLAN_ADDR_LEN 6 -+#define WLAN_CRC_LEN 4 -+#define WLAN_BSSID_LEN 6 -+#define WLAN_BSS_TS_LEN 8 -+#define WLAN_HDR_A3_LEN 24 -+#define WLAN_HDR_A4_LEN 30 -+#define WLAN_HDR_A3_QOS_LEN 26 -+#define WLAN_HDR_A4_QOS_LEN 32 -+#define WLAN_SSID_MAXLEN 32 -+#define WLAN_DATA_MAXLEN 2312 -+ -+#define WLAN_A3_PN_OFFSET 24 -+#define WLAN_A4_PN_OFFSET 30 -+ -+#define WLAN_MIN_ETHFRM_LEN 60 -+#define WLAN_MAX_ETHFRM_LEN 1514 -+#define WLAN_ETHHDR_LEN 14 -+#define WLAN_WMM_LEN 24 -+#define VENDOR_NAME_LEN 20 -+ -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+#define WLAN_MAX_VENDOR_IE_LEN 255 -+#define WLAN_MAX_VENDOR_IE_NUM 5 -+#define WIFI_BEACON_VENDOR_IE_BIT BIT(0) -+#define WIFI_PROBEREQ_VENDOR_IE_BIT BIT(1) -+#define WIFI_PROBERESP_VENDOR_IE_BIT BIT(2) -+#define WIFI_ASSOCREQ_VENDOR_IE_BIT BIT(3) -+#define WIFI_ASSOCRESP_VENDOR_IE_BIT BIT(4) -+#ifdef CONFIG_P2P -+#define WIFI_P2P_PROBEREQ_VENDOR_IE_BIT BIT(5) -+#define WIFI_P2P_PROBERESP_VENDOR_IE_BIT BIT(6) -+#define WLAN_MAX_VENDOR_IE_MASK_MAX 7 -+#else -+#define WLAN_MAX_VENDOR_IE_MASK_MAX 5 -+#endif -+#endif -+ -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+#define WLAN_MAX_KEEP_ALIVE_IE_LEN 256 -+#endif/*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ -+#define P80211CAPTURE_VERSION 0x80211001 -+ -+/* This value is tested by WiFi 11n Test Plan 5.2.3. -+ * This test verifies the WLAN NIC can update the NAV through sending the CTS with large duration. */ -+#define WiFiNavUpperUs 30000 /* 30 ms */ -+ -+#ifdef GREEN_HILL -+#pragma pack(1) -+#endif -+ -+enum WIFI_FRAME_TYPE { -+ WIFI_MGT_TYPE = (0), -+ WIFI_CTRL_TYPE = (BIT(2)), -+ WIFI_DATA_TYPE = (BIT(3)), -+ WIFI_QOS_DATA_TYPE = (BIT(7) | BIT(3)), /* !< QoS Data */ -+}; -+ -+enum WIFI_FRAME_SUBTYPE { -+ -+ /* below is for mgt frame */ -+ WIFI_ASSOCREQ = (0 | WIFI_MGT_TYPE), -+ WIFI_ASSOCRSP = (BIT(4) | WIFI_MGT_TYPE), -+ WIFI_REASSOCREQ = (BIT(5) | WIFI_MGT_TYPE), -+ WIFI_REASSOCRSP = (BIT(5) | BIT(4) | WIFI_MGT_TYPE), -+ WIFI_PROBEREQ = (BIT(6) | WIFI_MGT_TYPE), -+ WIFI_PROBERSP = (BIT(6) | BIT(4) | WIFI_MGT_TYPE), -+ WIFI_BEACON = (BIT(7) | WIFI_MGT_TYPE), -+ WIFI_ATIM = (BIT(7) | BIT(4) | WIFI_MGT_TYPE), -+ WIFI_DISASSOC = (BIT(7) | BIT(5) | WIFI_MGT_TYPE), -+ WIFI_AUTH = (BIT(7) | BIT(5) | BIT(4) | WIFI_MGT_TYPE), -+ WIFI_DEAUTH = (BIT(7) | BIT(6) | WIFI_MGT_TYPE), -+ WIFI_ACTION = (BIT(7) | BIT(6) | BIT(4) | WIFI_MGT_TYPE), -+ WIFI_ACTION_NOACK = (BIT(7) | BIT(6) | BIT(5) | WIFI_MGT_TYPE), -+ -+ /* below is for control frame */ -+ WIFI_BF_REPORT_POLL = (BIT(6) | WIFI_CTRL_TYPE), -+ WIFI_NDPA = (BIT(6) | BIT(4) | WIFI_CTRL_TYPE), -+ WIFI_BAR = (BIT(7) | WIFI_CTRL_TYPE), -+ WIFI_PSPOLL = (BIT(7) | BIT(5) | WIFI_CTRL_TYPE), -+ WIFI_RTS = (BIT(7) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE), -+ WIFI_CTS = (BIT(7) | BIT(6) | WIFI_CTRL_TYPE), -+ WIFI_ACK = (BIT(7) | BIT(6) | BIT(4) | WIFI_CTRL_TYPE), -+ WIFI_CFEND = (BIT(7) | BIT(6) | BIT(5) | WIFI_CTRL_TYPE), -+ WIFI_CFEND_CFACK = (BIT(7) | BIT(6) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE), -+ -+ /* below is for data frame */ -+ WIFI_DATA = (0 | WIFI_DATA_TYPE), -+ WIFI_DATA_CFACK = (BIT(4) | WIFI_DATA_TYPE), -+ WIFI_DATA_CFPOLL = (BIT(5) | WIFI_DATA_TYPE), -+ WIFI_DATA_CFACKPOLL = (BIT(5) | BIT(4) | WIFI_DATA_TYPE), -+ WIFI_DATA_NULL = (BIT(6) | WIFI_DATA_TYPE), -+ WIFI_CF_ACK = (BIT(6) | BIT(4) | WIFI_DATA_TYPE), -+ WIFI_CF_POLL = (BIT(6) | BIT(5) | WIFI_DATA_TYPE), -+ WIFI_CF_ACKPOLL = (BIT(6) | BIT(5) | BIT(4) | WIFI_DATA_TYPE), -+ WIFI_QOS_DATA_NULL = (BIT(6) | WIFI_QOS_DATA_TYPE), -+}; -+ -+enum WIFI_REASON_CODE { -+ _RSON_RESERVED_ = 0, -+ _RSON_UNSPECIFIED_ = 1, -+ _RSON_AUTH_NO_LONGER_VALID_ = 2, -+ _RSON_DEAUTH_STA_LEAVING_ = 3, -+ _RSON_INACTIVITY_ = 4, -+ _RSON_UNABLE_HANDLE_ = 5, -+ _RSON_CLS2_ = 6, -+ _RSON_CLS3_ = 7, -+ _RSON_DISAOC_STA_LEAVING_ = 8, -+ _RSON_ASOC_NOT_AUTH_ = 9, -+ -+ /* WPA reason */ -+ _RSON_INVALID_IE_ = 13, -+ _RSON_MIC_FAILURE_ = 14, -+ _RSON_4WAY_HNDSHK_TIMEOUT_ = 15, -+ _RSON_GROUP_KEY_UPDATE_TIMEOUT_ = 16, -+ _RSON_DIFF_IE_ = 17, -+ _RSON_MLTCST_CIPHER_NOT_VALID_ = 18, -+ _RSON_UNICST_CIPHER_NOT_VALID_ = 19, -+ _RSON_AKMP_NOT_VALID_ = 20, -+ _RSON_UNSUPPORT_RSNE_VER_ = 21, -+ _RSON_INVALID_RSNE_CAP_ = 22, -+ _RSON_IEEE_802DOT1X_AUTH_FAIL_ = 23, -+ -+ /* belowing are Realtek definition */ -+ _RSON_PMK_NOT_AVAILABLE_ = 24, -+ _RSON_TDLS_TEAR_TOOFAR_ = 25, -+ _RSON_TDLS_TEAR_UN_RSN_ = 26, -+}; -+ -+/* Reason codes (IEEE 802.11-2007, 7.3.1.7, Table 7-22) */ -+#if 0 -+#define WLAN_REASON_UNSPECIFIED 1 -+#define WLAN_REASON_PREV_AUTH_NOT_VALID 2 -+#define WLAN_REASON_DEAUTH_LEAVING 3 -+#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4 -+#define WLAN_REASON_DISASSOC_AP_BUSY 5 -+#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6 -+#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7 -+#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8 -+#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 -+#endif -+/* IEEE 802.11h */ -+#define WLAN_REASON_PWR_CAPABILITY_NOT_VALID 10 -+#define WLAN_REASON_SUPPORTED_CHANNEL_NOT_VALID 11 -+#if 0 -+/* IEEE 802.11i */ -+#define WLAN_REASON_INVALID_IE 13 -+#define WLAN_REASON_MICHAEL_MIC_FAILURE 14 -+#define WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT 15 -+#define WLAN_REASON_GROUP_KEY_UPDATE_TIMEOUT 16 -+#define WLAN_REASON_IE_IN_4WAY_DIFFERS 17 -+#define WLAN_REASON_GROUP_CIPHER_NOT_VALID 18 -+#define WLAN_REASON_PAIRWISE_CIPHER_NOT_VALID 19 -+#define WLAN_REASON_AKMP_NOT_VALID 20 -+#define WLAN_REASON_UNSUPPORTED_RSN_IE_VERSION 21 -+#define WLAN_REASON_INVALID_RSN_IE_CAPAB 22 -+#define WLAN_REASON_IEEE_802_1X_AUTH_FAILED 23 -+#define WLAN_REASON_CIPHER_SUITE_REJECTED 24 -+#endif -+ -+enum WIFI_STATUS_CODE { -+ _STATS_SUCCESSFUL_ = 0, -+ _STATS_FAILURE_ = 1, -+ _STATS_SEC_DISABLED_ = 5, -+ _STATS_NOT_IN_SAME_BSS_ = 7, -+ _STATS_CAP_FAIL_ = 10, -+ _STATS_NO_ASOC_ = 11, -+ _STATS_OTHER_ = 12, -+ _STATS_NO_SUPP_ALG_ = 13, -+ _STATS_OUT_OF_AUTH_SEQ_ = 14, -+ _STATS_CHALLENGE_FAIL_ = 15, -+ _STATS_AUTH_TIMEOUT_ = 16, -+ _STATS_UNABLE_HANDLE_STA_ = 17, -+ _STATS_RATE_FAIL_ = 18, -+ _STATS_REFUSED_TEMPORARILY_ = 30, -+ _STATS_DECLINE_REQ_ = 37, -+ _STATS_INVALID_PARAMETERS_ = 38, -+ _STATS_INVALID_RSNIE_ = 72, -+}; -+ -+/* Status codes (IEEE 802.11-2007, 7.3.1.9, Table 7-23) */ -+#if 0 -+#define WLAN_STATUS_SUCCESS 0 -+#define WLAN_STATUS_UNSPECIFIED_FAILURE 1 -+#define WLAN_STATUS_CAPS_UNSUPPORTED 10 -+#define WLAN_STATUS_REASSOC_NO_ASSOC 11 -+#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12 -+#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13 -+#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14 -+#define WLAN_STATUS_CHALLENGE_FAIL 15 -+#define WLAN_STATUS_AUTH_TIMEOUT 16 -+#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17 -+#define WLAN_STATUS_ASSOC_DENIED_RATES 18 -+#endif -+/* entended */ -+/* IEEE 802.11b */ -+#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19 -+#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20 -+#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21 -+/* IEEE 802.11h */ -+#define WLAN_STATUS_SPEC_MGMT_REQUIRED 22 -+#define WLAN_STATUS_PWR_CAPABILITY_NOT_VALID 23 -+#define WLAN_STATUS_SUPPORTED_CHANNEL_NOT_VALID 24 -+/* IEEE 802.11g */ -+#define WLAN_STATUS_ASSOC_DENIED_NO_SHORT_SLOT_TIME 25 -+#define WLAN_STATUS_ASSOC_DENIED_NO_ER_PBCC 26 -+#define WLAN_STATUS_ASSOC_DENIED_NO_DSSS_OFDM 27 -+/* IEEE 802.11w */ -+#define WLAN_STATUS_ASSOC_REJECTED_TEMPORARILY 30 -+#define WLAN_STATUS_ROBUST_MGMT_FRAME_POLICY_VIOLATION 31 -+/* IEEE 802.11i */ -+#define WLAN_STATUS_INVALID_IE 40 -+#define WLAN_STATUS_GROUP_CIPHER_NOT_VALID 41 -+#define WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID 42 -+#define WLAN_STATUS_AKMP_NOT_VALID 43 -+#define WLAN_STATUS_UNSUPPORTED_RSN_IE_VERSION 44 -+#define WLAN_STATUS_INVALID_RSN_IE_CAPAB 45 -+#define WLAN_STATUS_CIPHER_REJECTED_PER_POLICY 46 -+#define WLAN_STATUS_TS_NOT_CREATED 47 -+#define WLAN_STATUS_DIRECT_LINK_NOT_ALLOWED 48 -+#define WLAN_STATUS_DEST_STA_NOT_PRESENT 49 -+#define WLAN_STATUS_DEST_STA_NOT_QOS_STA 50 -+#define WLAN_STATUS_ASSOC_DENIED_LISTEN_INT_TOO_LARGE 51 -+/* IEEE 802.11r */ -+#define WLAN_STATUS_INVALID_FT_ACTION_FRAME_COUNT 52 -+#define WLAN_STATUS_INVALID_PMKID 53 -+#define WLAN_STATUS_INVALID_MDIE 54 -+#define WLAN_STATUS_INVALID_FTIE 55 -+ -+ -+enum WIFI_REG_DOMAIN { -+ DOMAIN_FCC = 1, -+ DOMAIN_IC = 2, -+ DOMAIN_ETSI = 3, -+ DOMAIN_SPAIN = 4, -+ DOMAIN_FRANCE = 5, -+ DOMAIN_MKK = 6, -+ DOMAIN_ISRAEL = 7, -+ DOMAIN_MKK1 = 8, -+ DOMAIN_MKK2 = 9, -+ DOMAIN_MKK3 = 10, -+ DOMAIN_MAX -+}; -+ -+#define _TO_DS_ BIT(8) -+#define _FROM_DS_ BIT(9) -+#define _MORE_FRAG_ BIT(10) -+#define _RETRY_ BIT(11) -+#define _PWRMGT_ BIT(12) -+#define _MORE_DATA_ BIT(13) -+#define _PRIVACY_ BIT(14) -+#define _ORDER_ BIT(15) -+ -+#define SetToDs(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) |= cpu_to_le16(_TO_DS_); \ -+ } while (0) -+ -+#define GetToDs(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_TO_DS_)) != 0) -+ -+#define ClearToDs(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_TO_DS_)); \ -+ } while (0) -+ -+#define SetFrDs(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) |= cpu_to_le16(_FROM_DS_); \ -+ } while (0) -+ -+#define GetFrDs(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_FROM_DS_)) != 0) -+ -+#define ClearFrDs(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_FROM_DS_)); \ -+ } while (0) -+ -+#define get_tofr_ds(pframe) ((GetFrDs(pframe) << 1) | GetToDs(pframe)) -+ -+ -+#define SetMFrag(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) |= cpu_to_le16(_MORE_FRAG_); \ -+ } while (0) -+ -+#define GetMFrag(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_MORE_FRAG_)) != 0) -+ -+#define ClearMFrag(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_MORE_FRAG_)); \ -+ } while (0) -+ -+#define SetRetry(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) |= cpu_to_le16(_RETRY_); \ -+ } while (0) -+ -+#define GetRetry(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_RETRY_)) != 0) -+ -+#define ClearRetry(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_RETRY_)); \ -+ } while (0) -+ -+#define SetPwrMgt(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) |= cpu_to_le16(_PWRMGT_); \ -+ } while (0) -+ -+#define GetPwrMgt(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_PWRMGT_)) != 0) -+ -+#define ClearPwrMgt(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_PWRMGT_)); \ -+ } while (0) -+ -+#define SetMData(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) |= cpu_to_le16(_MORE_DATA_); \ -+ } while (0) -+ -+#define GetMData(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_MORE_DATA_)) != 0) -+ -+#define ClearMData(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_MORE_DATA_)); \ -+ } while (0) -+ -+#define SetPrivacy(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) |= cpu_to_le16(_PRIVACY_); \ -+ } while (0) -+ -+#define GetPrivacy(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_PRIVACY_)) != 0) -+ -+#define ClearPrivacy(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_PRIVACY_)); \ -+ } while (0) -+ -+ -+#define GetOrder(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0) -+ -+#define GetFrameType(pbuf) (le16_to_cpu(*(unsigned short *)(pbuf)) & (BIT(3) | BIT(2))) -+ -+#define SetFrameType(pbuf, type) \ -+ do { \ -+ *(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | BIT(2))); \ -+ *(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \ -+ } while (0) -+ -+#define get_frame_sub_type(pbuf) (cpu_to_le16(*(unsigned short *)(pbuf)) & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))) -+ -+ -+#define set_frame_sub_type(pbuf, type) \ -+ do { \ -+ *(unsigned short *)(pbuf) &= cpu_to_le16(~(BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))); \ -+ *(unsigned short *)(pbuf) |= cpu_to_le16(type); \ -+ } while (0) -+ -+ -+#define GetSequence(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) >> 4) -+ -+#define GetFragNum(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & 0x0f) -+ -+#define GetTupleCache(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22))) -+ -+#define SetFragNum(pbuf, num) \ -+ do { \ -+ *(unsigned short *)((SIZE_PTR)(pbuf) + 22) = \ -+ ((*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & le16_to_cpu(~(0x000f))) | \ -+ cpu_to_le16(0x0f & (num)); \ -+ } while (0) -+ -+#define SetSeqNum(pbuf, num) \ -+ do { \ -+ *(unsigned short *)((SIZE_PTR)(pbuf) + 22) = \ -+ ((*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & le16_to_cpu((unsigned short)~0xfff0)) | \ -+ le16_to_cpu((unsigned short)(0xfff0 & (num << 4))); \ -+ } while (0) -+ -+#define set_duration(pbuf, dur) \ -+ do { \ -+ *(unsigned short *)((SIZE_PTR)(pbuf) + 2) = cpu_to_le16(0xffff & (dur)); \ -+ } while (0) -+ -+ -+/* QoS control field */ -+#define SetPriority(qc, tid) SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 0, 4, tid) -+#define SetEOSP(qc, eosp) SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 4, 1, eosp) -+#define SetAckpolicy(qc, ack) SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 5, 2, ack) -+#define SetAMsdu(qc, amsdu) SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 7, 1, amsdu) -+ -+#define GetPriority(qc) LE_BITS_TO_2BYTE(((u8 *)(qc)), 0, 4) -+#define GetEOSP(qc) LE_BITS_TO_2BYTE(((u8 *)(qc)), 4, 1) -+#define GetAckpolicy(qc) LE_BITS_TO_2BYTE(((u8 *)(qc)), 5, 2) -+#define GetAMsdu(qc) LE_BITS_TO_2BYTE(((u8 *)(qc)), 7, 1) -+ -+/* QoS control field (MSTA only) */ -+#define set_mctrl_present(qc, p) SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 8, 1, p) -+#define set_mps_lv(qc, lv) SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 9, 1, lv) -+#define set_rspi(qc, rspi) SET_BITS_TO_LE_2BYTE(((u8 *)(qc)), 10, 1, rspi) -+ -+#define get_mctrl_present(qc) LE_BITS_TO_2BYTE(((u8 *)(qc)), 8, 1) -+#define get_mps_lv(qc) LE_BITS_TO_2BYTE(((u8 *)(qc)), 9, 1) -+#define get_rspi(qc) LE_BITS_TO_2BYTE(((u8 *)(qc)), 10, 1) -+ -+ -+#define GetAid(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 2)) & 0x3fff) -+ -+#define GetTid(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + (((GetToDs(pbuf)<<1) | GetFrDs(pbuf)) == 3 ? 30 : 24))) & 0x000f) -+ -+#define GetAddr1Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 4)) -+ -+#define get_addr2_ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 10)) -+ -+#define GetAddr3Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 16)) -+ -+#define GetAddr4Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 24)) -+ -+ -+#define MacAddr_isBcst(addr) \ -+ (\ -+ ((addr[0] == 0xff) && (addr[1] == 0xff) && \ -+ (addr[2] == 0xff) && (addr[3] == 0xff) && \ -+ (addr[4] == 0xff) && (addr[5] == 0xff)) ? _TRUE : _FALSE \ -+ ) -+ -+__inline static int IS_MCAST(const u8 *da) -+{ -+ if ((*da) & 0x01) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+__inline static unsigned char *get_ra(unsigned char *pframe) -+{ -+ unsigned char *ra; -+ ra = GetAddr1Ptr(pframe); -+ return ra; -+} -+__inline static unsigned char *get_ta(unsigned char *pframe) -+{ -+ unsigned char *ta; -+ ta = get_addr2_ptr(pframe); -+ return ta; -+} -+ -+/* can't apply to mesh mode */ -+__inline static unsigned char *get_da(unsigned char *pframe) -+{ -+ unsigned char *da; -+ unsigned int to_fr_ds = (GetFrDs(pframe) << 1) | GetToDs(pframe); -+ -+ switch (to_fr_ds) { -+ case 0x00: /* ToDs=0, FromDs=0 */ -+ da = GetAddr1Ptr(pframe); -+ break; -+ case 0x01: /* ToDs=1, FromDs=0 */ -+ da = GetAddr3Ptr(pframe); -+ break; -+ case 0x02: /* ToDs=0, FromDs=1 */ -+ da = GetAddr1Ptr(pframe); -+ break; -+ default: /* ToDs=1, FromDs=1 */ -+ da = GetAddr3Ptr(pframe); -+ break; -+ } -+ -+ return da; -+} -+ -+/* can't apply to mesh mode */ -+__inline static unsigned char *get_sa(unsigned char *pframe) -+{ -+ unsigned char *sa; -+ unsigned int to_fr_ds = (GetFrDs(pframe) << 1) | GetToDs(pframe); -+ -+ switch (to_fr_ds) { -+ case 0x00: /* ToDs=0, FromDs=0 */ -+ sa = get_addr2_ptr(pframe); -+ break; -+ case 0x01: /* ToDs=1, FromDs=0 */ -+ sa = get_addr2_ptr(pframe); -+ break; -+ case 0x02: /* ToDs=0, FromDs=1 */ -+ sa = GetAddr3Ptr(pframe); -+ break; -+ default: /* ToDs=1, FromDs=1 */ -+ sa = GetAddr4Ptr(pframe); -+ break; -+ } -+ -+ return sa; -+} -+ -+/* can't apply to mesh mode */ -+__inline static unsigned char *get_hdr_bssid(unsigned char *pframe) -+{ -+ unsigned char *bssid= NULL; -+ unsigned int to_fr_ds = (GetFrDs(pframe) << 1) | GetToDs(pframe); -+ -+ switch (to_fr_ds) { -+ case 0x00: /* ToDs=0, FromDs=0 */ -+ bssid = GetAddr3Ptr(pframe); -+ break; -+ case 0x01: /* ToDs=1, FromDs=0 */ -+ bssid = GetAddr1Ptr(pframe); -+ break; -+ case 0x02: /* ToDs=0, FromDs=1 */ -+ bssid = get_addr2_ptr(pframe); -+ break; -+ case 0x03: /* ToDs=1, FromDs=1 */ -+ bssid = GetAddr1Ptr(pframe); -+ break; -+ } -+ -+ return bssid; -+} -+ -+ -+__inline static int IsFrameTypeCtrl(unsigned char *pframe) -+{ -+ if (WIFI_CTRL_TYPE == GetFrameType(pframe)) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+static inline int IsFrameTypeMgnt(unsigned char *pframe) -+{ -+ if (GetFrameType(pframe) == WIFI_MGT_TYPE) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+static inline int IsFrameTypeData(unsigned char *pframe) -+{ -+ if (GetFrameType(pframe) == WIFI_DATA_TYPE) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+ -+/*----------------------------------------------------------------------------- -+ Below is for the security related definition -+------------------------------------------------------------------------------*/ -+#define _RESERVED_FRAME_TYPE_ 0 -+#define _SKB_FRAME_TYPE_ 2 -+#define _PRE_ALLOCMEM_ 1 -+#define _PRE_ALLOCHDR_ 3 -+#define _PRE_ALLOCLLCHDR_ 4 -+#define _PRE_ALLOCICVHDR_ 5 -+#define _PRE_ALLOCMICHDR_ 6 -+ -+#define _SIFSTIME_ ((priv->pmib->dot11BssType.net_work_type&WIRELESS_11A) ? 16 : 10) -+#define _ACKCTSLNG_ 14 /* 14 bytes long, including crclng */ -+#define _CRCLNG_ 4 -+ -+#define _ASOCREQ_IE_OFFSET_ 4 /* excluding wlan_hdr */ -+#define _ASOCRSP_IE_OFFSET_ 6 -+#define _REASOCREQ_IE_OFFSET_ 10 -+#define _REASOCRSP_IE_OFFSET_ 6 -+#define _PROBEREQ_IE_OFFSET_ 0 -+#define _PROBERSP_IE_OFFSET_ 12 -+#define _AUTH_IE_OFFSET_ 6 -+#define _DEAUTH_IE_OFFSET_ 0 -+#define _BEACON_IE_OFFSET_ 12 -+#define _PUBLIC_ACTION_IE_OFFSET_ 8 -+ -+#define _FIXED_IE_LENGTH_ _BEACON_IE_OFFSET_ -+ -+#define _SSID_IE_ 0 -+#define _SUPPORTEDRATES_IE_ 1 -+#define _DSSET_IE_ 3 -+#define _TIM_IE_ 5 -+#define _IBSS_PARA_IE_ 6 -+#define _COUNTRY_IE_ 7 -+#define _CHLGETXT_IE_ 16 -+#define _SUPPORTED_CH_IE_ 36 -+#define _CH_SWTICH_ANNOUNCE_ 37 /* Secondary Channel Offset */ -+#define _MEAS_REQ_IE_ 38 -+#define _MEAS_RSP_IE_ 39 -+#define _RSN_IE_2_ 48 -+#define _SSN_IE_1_ 221 -+#define _ERPINFO_IE_ 42 -+#define _EXT_SUPPORTEDRATES_IE_ 50 -+ -+#define _HT_CAPABILITY_IE_ 45 -+#define _MDIE_ 54 -+#define _FTIE_ 55 -+#define _TIMEOUT_ITVL_IE_ 56 -+#define _SRC_IE_ 59 -+#define _HT_EXTRA_INFO_IE_ 61 -+#define _HT_ADD_INFO_IE_ 61 /* _HT_EXTRA_INFO_IE_ */ -+#define _WAPI_IE_ 68 -+#define _EID_RRM_EN_CAP_IE_ 70 -+ -+ -+/* #define EID_BSSCoexistence 72 */ /* 20/40 BSS Coexistence -+ * #define EID_BSSIntolerantChlReport 73 */ -+#define _RIC_Descriptor_IE_ 75 -+#ifdef CONFIG_IEEE80211W -+#define _MME_IE_ 76 /* 802.11w Management MIC element */ -+#endif /* CONFIG_IEEE80211W */ -+#define _LINK_ID_IE_ 101 -+#define _CH_SWITCH_TIMING_ 104 -+#define _PTI_BUFFER_STATUS_ 106 -+#define _EXT_CAP_IE_ 127 -+#define _VENDOR_SPECIFIC_IE_ 221 -+ -+#define _RESERVED47_ 47 -+ -+typedef enum _ELEMENT_ID { -+ EID_SsId = 0, /* service set identifier (0:32) */ -+ EID_SupRates = 1, /* supported rates (1:8) */ -+ EID_FHParms = 2, /* FH parameter set (5) */ -+ EID_DSParms = 3, /* DS parameter set (1) */ -+ EID_CFParms = 4, /* CF parameter set (6) */ -+ EID_Tim = 5, /* Traffic Information Map (4:254) */ -+ EID_IbssParms = 6, /* IBSS parameter set (2) */ -+ EID_Country = 7, /* */ -+ -+ /* Form 7.3.2: Information elements in 802.11E/D13.0, page 46. */ -+ EID_QBSSLoad = 11, -+ EID_EDCAParms = 12, -+ EID_TSpec = 13, -+ EID_TClass = 14, -+ EID_Schedule = 15, -+ /* */ -+ -+ EID_Ctext = 16, /* challenge text*/ -+ EID_POWER_CONSTRAINT = 32, /* Power Constraint*/ -+ -+ /* vivi for WIFITest, 802.11h AP, 20100427 */ -+ /* 2010/12/26 MH The definition we can declare always!! */ -+ EID_PowerCap = 33, -+ EID_TPC = 35, -+ EID_SupportedChannels = 36, -+ EID_ChlSwitchAnnounce = 37, -+ -+ EID_MeasureRequest = 38, /* Measurement Request */ -+ EID_MeasureReport = 39, /* Measurement Report */ -+ -+ EID_ERPInfo = 42, -+ -+ /* Form 7.3.2: Information elements in 802.11E/D13.0, page 46. */ -+ EID_TSDelay = 43, -+ EID_TCLASProc = 44, -+ EID_HTCapability = 45, -+ EID_QoSCap = 46, -+ /* */ -+ -+ EID_WPA2 = 48, -+ EID_ExtSupRates = 50, -+ -+ EID_FTIE = 55, /* Defined in 802.11r */ -+ EID_Timeout = 56, /* Defined in 802.11r */ -+ -+ EID_SupRegulatory = 59, /* Supported Requlatory Classes 802.11y */ -+ EID_HTInfo = 61, -+ EID_SecondaryChnlOffset = 62, -+ -+ EID_BSSCoexistence = 72, /* 20/40 BSS Coexistence */ -+ EID_BSSIntolerantChlReport = 73, -+ EID_OBSS = 74, /* Overlapping BSS Scan Parameters */ -+ -+ EID_LinkIdentifier = 101, /* Defined in 802.11z */ -+ EID_WakeupSchedule = 102, /* Defined in 802.11z */ -+ EID_ChnlSwitchTimeing = 104, /* Defined in 802.11z */ -+ EID_PTIControl = 105, /* Defined in 802.11z */ -+ EID_PUBufferStatus = 106, /* Defined in 802.11z */ -+ -+ EID_EXTCapability = 127, /* Extended Capabilities */ -+ /* From S19:Aironet IE and S21:AP IP address IE in CCX v1.13, p16 and p18. */ -+ EID_Aironet = 133, /* 0x85: Aironet Element for Cisco CCX */ -+ EID_CiscoIP = 149, /* 0x95: IP Address IE for Cisco CCX */ -+ -+ EID_CellPwr = 150, /* 0x96: Cell Power Limit IE. Ref. 0x96. */ -+ -+ EID_CCKM = 156, -+ -+ EID_Vendor = 221, /* 0xDD: Vendor Specific */ -+ -+ EID_WAPI = 68, -+ EID_VHTCapability = 191, /* Based on 802.11ac D2.0 */ -+ EID_VHTOperation = 192, /* Based on 802.11ac D2.0 */ -+ EID_AID = 197, /* Based on 802.11ac D4.0 */ -+ EID_OpModeNotification = 199, /* Based on 802.11ac D3.0 */ -+} ELEMENT_ID, *PELEMENT_ID; -+ -+/* --------------------------------------------------------------------------- -+ Below is the fixed elements... -+-----------------------------------------------------------------------------*/ -+#define _AUTH_ALGM_NUM_ 2 -+#define _AUTH_SEQ_NUM_ 2 -+#define _BEACON_ITERVAL_ 2 -+#define _CAPABILITY_ 2 -+#define _CURRENT_APADDR_ 6 -+#define _LISTEN_INTERVAL_ 2 -+#define _RSON_CODE_ 2 -+#define _ASOC_ID_ 2 -+#define _STATUS_CODE_ 2 -+#define _TIMESTAMP_ 8 -+ -+#define AUTH_ODD_TO 0 -+#define AUTH_EVEN_TO 1 -+ -+#define WLAN_ETHCONV_ENCAP 1 -+#define WLAN_ETHCONV_RFC1042 2 -+#define WLAN_ETHCONV_8021h 3 -+ -+#define cap_ESS BIT(0) -+#define cap_IBSS BIT(1) -+#define cap_CFPollable BIT(2) -+#define cap_CFRequest BIT(3) -+#define cap_Privacy BIT(4) -+#define cap_ShortPremble BIT(5) -+#define cap_PBCC BIT(6) -+#define cap_ChAgility BIT(7) -+#define cap_SpecMgmt BIT(8) -+#define cap_QoS BIT(9) -+#define cap_ShortSlot BIT(10) -+#define cap_APSD BIT(11) -+#define cap_RM BIT(12) -+#define cap_DSSSOFDM BIT(13) -+#define cap_DelayedBACK BIT(14) -+#define cap_ImmediateBACK BIT(15) -+ -+/*----------------------------------------------------------------------------- -+ Below is the definition for 802.11i / 802.1x -+------------------------------------------------------------------------------*/ -+#define _IEEE8021X_MGT_ 1 /* WPA */ -+#define _IEEE8021X_PSK_ 2 /* WPA with pre-shared key */ -+ -+#if 0 -+#define _NO_PRIVACY_ 0 -+#define _WEP_40_PRIVACY_ 1 -+#define _TKIP_PRIVACY_ 2 -+#define _WRAP_PRIVACY_ 3 -+#define _CCMP_PRIVACY_ 4 -+#define _WEP_104_PRIVACY_ 5 -+#define _WEP_WPA_MIXED_PRIVACY_ 6 /* WEP + WPA */ -+#endif -+ -+#define _MME_IE_LENGTH_ 26 -+ -+/*----------------------------------------------------------------------------- -+ Below is the definition for WMM -+------------------------------------------------------------------------------*/ -+#define _WMM_IE_Length_ 7 /* for WMM STA */ -+ -+ -+/*----------------------------------------------------------------------------- -+ Below is the definition for 802.11n -+------------------------------------------------------------------------------*/ -+ -+/* #ifdef CONFIG_80211N_HT */ -+ -+#define set_order_bit(pbuf) \ -+ do { \ -+ *(unsigned short *)(pbuf) |= cpu_to_le16(_ORDER_); \ -+ } while (0) -+ -+ -+ -+#define GetOrderBit(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0) -+ -+#define ACT_CAT_VENDOR 0x7F/* 127 */ -+ -+/** -+ * struct rtw_ieee80211_bar - HT Block Ack Request -+ * -+ * This structure refers to "HT BlockAckReq" as -+ * described in 802.11n draft section 7.2.1.7.1 -+ */ -+#if defined(PLATFORM_LINUX) -+struct rtw_ieee80211_bar { -+ unsigned short frame_control; -+ unsigned short duration; -+ unsigned char ra[6]; -+ unsigned char ta[6]; -+ unsigned short control; -+ unsigned short start_seq_num; -+} __attribute__((packed)); -+#endif -+ -+/* 802.11 BAR control masks */ -+#define IEEE80211_BAR_CTRL_ACK_POLICY_NORMAL 0x0000 -+#define IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA 0x0004 -+ -+ -+#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) -+ -+ -+ -+/** -+* struct rtw_ieee80211_ht_cap - HT capabilities -+* -+* This structure refers to "HT capabilities element" as -+* described in 802.11n draft section 7.3.2.52 -+*/ -+ -+struct rtw_ieee80211_ht_cap { -+ unsigned short cap_info; -+ unsigned char ampdu_params_info; -+ unsigned char supp_mcs_set[16]; -+ unsigned short extended_ht_cap_info; -+ unsigned int tx_BF_cap_info; -+ unsigned char antenna_selection_info; -+} __attribute__((packed)); -+ -+/** -+ * struct rtw_ieee80211_ht_cap - HT additional information -+ * -+ * This structure refers to "HT information element" as -+ * described in 802.11n draft section 7.3.2.53 -+ */ -+#ifndef CONFIG_IEEE80211_HT_ADDT_INFO -+struct ieee80211_ht_addt_info { -+ unsigned char control_chan; -+ unsigned char ht_param; -+ unsigned short operation_mode; -+ unsigned short stbc_param; -+ unsigned char basic_set[16]; -+} __attribute__((packed)); -+#endif -+ -+struct HT_caps_element { -+ union { -+ struct { -+ unsigned short HT_caps_info; -+ unsigned char AMPDU_para; -+ unsigned char MCS_rate[16]; -+ unsigned short HT_ext_caps; -+ unsigned int Beamforming_caps; -+ unsigned char ASEL_caps; -+ } HT_cap_element; -+ unsigned char HT_cap[26]; -+ } u; -+} __attribute__((packed)); -+ -+struct HT_info_element { -+ unsigned char primary_channel; -+ unsigned char infos[5]; -+ unsigned char MCS_rate[16]; -+} __attribute__((packed)); -+ -+struct AC_param { -+ unsigned char ACI_AIFSN; -+ unsigned char CW; -+ unsigned short TXOP_limit; -+} __attribute__((packed)); -+ -+struct WMM_para_element { -+ unsigned char QoS_info; -+ unsigned char reserved; -+ struct AC_param ac_param[4]; -+} __attribute__((packed)); -+ -+struct ADDBA_request { -+ unsigned char dialog_token; -+ unsigned short BA_para_set; -+ unsigned short BA_timeout_value; -+ unsigned short BA_starting_seqctrl; -+} __attribute__((packed)); -+ -+ -+ -+#endif -+ -+ -+typedef enum _HT_CAP_AMPDU_FACTOR { -+ MAX_AMPDU_FACTOR_8K = 0, -+ MAX_AMPDU_FACTOR_16K = 1, -+ MAX_AMPDU_FACTOR_32K = 2, -+ MAX_AMPDU_FACTOR_64K = 3, -+} HT_CAP_AMPDU_FACTOR; -+ -+typedef enum _VHT_CAP_AMPDU_FACTOR { -+ MAX_AMPDU_FACTOR_128K = 4, -+ MAX_AMPDU_FACTOR_256K = 5, -+ MAX_AMPDU_FACTOR_512K = 6, -+ MAX_AMPDU_FACTOR_1M = 7, -+} VHT_CAP_AMPDU_FACTOR; -+ -+ -+typedef enum _HT_CAP_AMPDU_DENSITY { -+ AMPDU_DENSITY_VALUE_0 = 0 , /* For no restriction */ -+ AMPDU_DENSITY_VALUE_1 = 1 , /* For 1/4 us */ -+ AMPDU_DENSITY_VALUE_2 = 2 , /* For 1/2 us */ -+ AMPDU_DENSITY_VALUE_3 = 3 , /* For 1 us */ -+ AMPDU_DENSITY_VALUE_4 = 4 , /* For 2 us */ -+ AMPDU_DENSITY_VALUE_5 = 5 , /* For 4 us */ -+ AMPDU_DENSITY_VALUE_6 = 6 , /* For 8 us */ -+ AMPDU_DENSITY_VALUE_7 = 7 , /* For 16 us */ -+} HT_CAP_AMPDU_DENSITY; -+ -+/* 802.11n HT capabilities masks */ -+#define IEEE80211_HT_CAP_LDPC_CODING 0x0001 -+#define IEEE80211_HT_CAP_SUP_WIDTH 0x0002 -+#define IEEE80211_HT_CAP_SM_PS 0x000C -+#define IEEE80211_HT_CAP_GRN_FLD 0x0010 -+#define IEEE80211_HT_CAP_SGI_20 0x0020 -+#define IEEE80211_HT_CAP_SGI_40 0x0040 -+#define IEEE80211_HT_CAP_TX_STBC 0x0080 -+#define IEEE80211_HT_CAP_RX_STBC_1R 0x0100 -+#define IEEE80211_HT_CAP_RX_STBC_2R 0x0200 -+#define IEEE80211_HT_CAP_RX_STBC_3R 0x0300 -+#define IEEE80211_HT_CAP_DELAY_BA 0x0400 -+#define IEEE80211_HT_CAP_MAX_AMSDU 0x0800 -+#define IEEE80211_HT_CAP_DSSSCCK40 0x1000 -+#define RTW_IEEE80211_HT_CAP_40MHZ_INTOLERANT ((u16) BIT(14)) -+/* 802.11n HT capability AMPDU settings */ -+#define IEEE80211_HT_CAP_AMPDU_FACTOR 0x03 -+#define IEEE80211_HT_CAP_AMPDU_DENSITY 0x1C -+/* 802.11n HT capability MSC set */ -+#define IEEE80211_SUPP_MCS_SET_UEQM 4 -+#define IEEE80211_HT_CAP_MAX_STREAMS 4 -+#define IEEE80211_SUPP_MCS_SET_LEN 10 -+/* maximum streams the spec allows */ -+#define IEEE80211_HT_CAP_MCS_TX_DEFINED 0x01 -+#define IEEE80211_HT_CAP_MCS_TX_RX_DIFF 0x02 -+#define IEEE80211_HT_CAP_MCS_TX_STREAMS 0x0C -+#define IEEE80211_HT_CAP_MCS_TX_UEQM 0x10 -+/* 802.11n HT capability TXBF capability */ -+#define IEEE80211_HT_CAP_TXBF_RX_NDP 0x00000008 -+#define IEEE80211_HT_CAP_TXBF_TX_NDP 0x00000010 -+#define IEEE80211_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP 0x00000400 -+ -+/* 802.11n HT IE masks */ -+#define IEEE80211_HT_IE_CHA_SEC_OFFSET 0x03 -+#define IEEE80211_HT_IE_CHA_SEC_NONE 0x00 -+#define IEEE80211_HT_IE_CHA_SEC_ABOVE 0x01 -+#define IEEE80211_HT_IE_CHA_SEC_BELOW 0x03 -+#define IEEE80211_HT_IE_CHA_WIDTH 0x04 -+#define IEEE80211_HT_IE_HT_PROTECTION 0x0003 -+#define IEEE80211_HT_IE_NON_GF_STA_PRSNT 0x0004 -+#define IEEE80211_HT_IE_NON_HT_STA_PRSNT 0x0010 -+ -+/* block-ack parameters */ -+#define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002 -+#define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C -+#define RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFC0 -+#define IEEE80211_DELBA_PARAM_TID_MASK 0xF000 -+#define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800 -+ -+/* -+ * A-PMDU buffer sizes -+ * According to IEEE802.11n spec size varies from 8K to 64K (in powers of 2) -+ */ -+#define IEEE80211_MIN_AMPDU_BUF 0x8 -+#define IEEE80211_MAX_AMPDU_BUF_HT 0x40 -+ -+ -+/* Spatial Multiplexing Power Save Modes */ -+#define WLAN_HT_CAP_SM_PS_STATIC 0 -+#define WLAN_HT_CAP_SM_PS_DYNAMIC 1 -+#define WLAN_HT_CAP_SM_PS_INVALID 2 -+#define WLAN_HT_CAP_SM_PS_DISABLED 3 -+ -+ -+#define OP_MODE_PURE 0 -+#define OP_MODE_MAY_BE_LEGACY_STAS 1 -+#define OP_MODE_20MHZ_HT_STA_ASSOCED 2 -+#define OP_MODE_MIXED 3 -+ -+#define HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK ((u8) BIT(0) | BIT(1)) -+#define HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE ((u8) BIT(0)) -+#define HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW ((u8) BIT(0) | BIT(1)) -+#define HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH ((u8) BIT(2)) -+#define HT_INFO_HT_PARAM_RIFS_MODE ((u8) BIT(3)) -+#define HT_INFO_HT_PARAM_CTRL_ACCESS_ONLY ((u8) BIT(4)) -+#define HT_INFO_HT_PARAM_SRV_INTERVAL_GRANULARITY ((u8) BIT(5)) -+ -+#define HT_INFO_OPERATION_MODE_OP_MODE_MASK \ -+ ((u16) (0x0001 | 0x0002)) -+#define HT_INFO_OPERATION_MODE_OP_MODE_OFFSET 0 -+#define HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT ((u8) BIT(2)) -+#define HT_INFO_OPERATION_MODE_TRANSMIT_BURST_LIMIT ((u8) BIT(3)) -+#define HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT ((u8) BIT(4)) -+ -+#define HT_INFO_STBC_PARAM_DUAL_BEACON ((u16) BIT(6)) -+#define HT_INFO_STBC_PARAM_DUAL_STBC_PROTECT ((u16) BIT(7)) -+#define HT_INFO_STBC_PARAM_SECONDARY_BCN ((u16) BIT(8)) -+#define HT_INFO_STBC_PARAM_LSIG_TXOP_PROTECT_ALLOWED ((u16) BIT(9)) -+#define HT_INFO_STBC_PARAM_PCO_ACTIVE ((u16) BIT(10)) -+#define HT_INFO_STBC_PARAM_PCO_PHASE ((u16) BIT(11)) -+ -+ -+ -+/* #endif */ -+ -+/* ===============WPS Section=============== */ -+/* For WPSv1.0 */ -+#define WPSOUI 0x0050f204 -+/* WPS attribute ID */ -+#define WPS_ATTR_VER1 0x104A -+#define WPS_ATTR_SIMPLE_CONF_STATE 0x1044 -+#define WPS_ATTR_RESP_TYPE 0x103B -+#define WPS_ATTR_UUID_E 0x1047 -+#define WPS_ATTR_MANUFACTURER 0x1021 -+#define WPS_ATTR_MODEL_NAME 0x1023 -+#define WPS_ATTR_MODEL_NUMBER 0x1024 -+#define WPS_ATTR_SERIAL_NUMBER 0x1042 -+#define WPS_ATTR_PRIMARY_DEV_TYPE 0x1054 -+#define WPS_ATTR_SEC_DEV_TYPE_LIST 0x1055 -+#define WPS_ATTR_DEVICE_NAME 0x1011 -+#define WPS_ATTR_CONF_METHOD 0x1008 -+#define WPS_ATTR_RF_BANDS 0x103C -+#define WPS_ATTR_DEVICE_PWID 0x1012 -+#define WPS_ATTR_REQUEST_TYPE 0x103A -+#define WPS_ATTR_ASSOCIATION_STATE 0x1002 -+#define WPS_ATTR_CONFIG_ERROR 0x1009 -+#define WPS_ATTR_VENDOR_EXT 0x1049 -+#define WPS_ATTR_SELECTED_REGISTRAR 0x1041 -+ -+/* Value of WPS attribute "WPS_ATTR_DEVICE_NAME */ -+#define WPS_MAX_DEVICE_NAME_LEN 32 -+ -+/* Value of WPS Request Type Attribute */ -+#define WPS_REQ_TYPE_ENROLLEE_INFO_ONLY 0x00 -+#define WPS_REQ_TYPE_ENROLLEE_OPEN_8021X 0x01 -+#define WPS_REQ_TYPE_REGISTRAR 0x02 -+#define WPS_REQ_TYPE_WLAN_MANAGER_REGISTRAR 0x03 -+ -+/* Value of WPS Response Type Attribute */ -+#define WPS_RESPONSE_TYPE_INFO_ONLY 0x00 -+#define WPS_RESPONSE_TYPE_8021X 0x01 -+#define WPS_RESPONSE_TYPE_REGISTRAR 0x02 -+#define WPS_RESPONSE_TYPE_AP 0x03 -+ -+/* Value of WPS WiFi Simple Configuration State Attribute */ -+#define WPS_WSC_STATE_NOT_CONFIG 0x01 -+#define WPS_WSC_STATE_CONFIG 0x02 -+ -+/* Value of WPS Version Attribute */ -+#define WPS_VERSION_1 0x10 -+ -+/* Value of WPS Configuration Method Attribute */ -+#define WPS_CONFIG_METHOD_FLASH 0x0001 -+#define WPS_CONFIG_METHOD_ETHERNET 0x0002 -+#define WPS_CONFIG_METHOD_LABEL 0x0004 -+#define WPS_CONFIG_METHOD_DISPLAY 0x0008 -+#define WPS_CONFIG_METHOD_E_NFC 0x0010 -+#define WPS_CONFIG_METHOD_I_NFC 0x0020 -+#define WPS_CONFIG_METHOD_NFC 0x0040 -+#define WPS_CONFIG_METHOD_PBC 0x0080 -+#define WPS_CONFIG_METHOD_KEYPAD 0x0100 -+#define WPS_CONFIG_METHOD_VPBC 0x0280 -+#define WPS_CONFIG_METHOD_PPBC 0x0480 -+#define WPS_CONFIG_METHOD_VDISPLAY 0x2008 -+#define WPS_CONFIG_METHOD_PDISPLAY 0x4008 -+ -+/* Value of Category ID of WPS Primary Device Type Attribute */ -+#define WPS_PDT_CID_DISPLAYS 0x0007 -+#define WPS_PDT_CID_MULIT_MEDIA 0x0008 -+#define WPS_PDT_CID_RTK_WIDI WPS_PDT_CID_MULIT_MEDIA -+ -+/* Value of Sub Category ID of WPS Primary Device Type Attribute */ -+#define WPS_PDT_SCID_MEDIA_SERVER 0x0005 -+#define WPS_PDT_SCID_RTK_DMP WPS_PDT_SCID_MEDIA_SERVER -+ -+/* Value of Device Password ID */ -+#define WPS_DPID_PIN 0x0000 -+#define WPS_DPID_USER_SPEC 0x0001 -+#define WPS_DPID_MACHINE_SPEC 0x0002 -+#define WPS_DPID_REKEY 0x0003 -+#define WPS_DPID_PBC 0x0004 -+#define WPS_DPID_REGISTRAR_SPEC 0x0005 -+ -+/* Value of WPS RF Bands Attribute */ -+#define WPS_RF_BANDS_2_4_GHZ 0x01 -+#define WPS_RF_BANDS_5_GHZ 0x02 -+ -+/* Value of WPS Association State Attribute */ -+#define WPS_ASSOC_STATE_NOT_ASSOCIATED 0x00 -+#define WPS_ASSOC_STATE_CONNECTION_SUCCESS 0x01 -+#define WPS_ASSOC_STATE_CONFIGURATION_FAILURE 0x02 -+#define WPS_ASSOC_STATE_ASSOCIATION_FAILURE 0x03 -+#define WPS_ASSOC_STATE_IP_FAILURE 0x04 -+ -+/* =====================P2P Section===================== */ -+/* For P2P */ -+#define P2POUI 0x506F9A09 -+ -+/* P2P Attribute ID */ -+#define P2P_ATTR_STATUS 0x00 -+#define P2P_ATTR_MINOR_REASON_CODE 0x01 -+#define P2P_ATTR_CAPABILITY 0x02 -+#define P2P_ATTR_DEVICE_ID 0x03 -+#define P2P_ATTR_GO_INTENT 0x04 -+#define P2P_ATTR_CONF_TIMEOUT 0x05 -+#define P2P_ATTR_LISTEN_CH 0x06 -+#define P2P_ATTR_GROUP_BSSID 0x07 -+#define P2P_ATTR_EX_LISTEN_TIMING 0x08 -+#define P2P_ATTR_INTENDED_IF_ADDR 0x09 -+#define P2P_ATTR_MANAGEABILITY 0x0A -+#define P2P_ATTR_CH_LIST 0x0B -+#define P2P_ATTR_NOA 0x0C -+#define P2P_ATTR_DEVICE_INFO 0x0D -+#define P2P_ATTR_GROUP_INFO 0x0E -+#define P2P_ATTR_GROUP_ID 0x0F -+#define P2P_ATTR_INTERFACE 0x10 -+#define P2P_ATTR_OPERATING_CH 0x11 -+#define P2P_ATTR_INVITATION_FLAGS 0x12 -+ -+/* Value of Status Attribute */ -+#define P2P_STATUS_SUCCESS 0x00 -+#define P2P_STATUS_FAIL_INFO_UNAVAILABLE 0x01 -+#define P2P_STATUS_FAIL_INCOMPATIBLE_PARAM 0x02 -+#define P2P_STATUS_FAIL_LIMIT_REACHED 0x03 -+#define P2P_STATUS_FAIL_INVALID_PARAM 0x04 -+#define P2P_STATUS_FAIL_REQUEST_UNABLE 0x05 -+#define P2P_STATUS_FAIL_PREVOUS_PROTO_ERR 0x06 -+#define P2P_STATUS_FAIL_NO_COMMON_CH 0x07 -+#define P2P_STATUS_FAIL_UNKNOWN_P2PGROUP 0x08 -+#define P2P_STATUS_FAIL_BOTH_GOINTENT_15 0x09 -+#define P2P_STATUS_FAIL_INCOMPATIBLE_PROVSION 0x0A -+#define P2P_STATUS_FAIL_USER_REJECT 0x0B -+ -+/* Value of Inviation Flags Attribute */ -+#define P2P_INVITATION_FLAGS_PERSISTENT BIT(0) -+ -+#define DMP_P2P_DEVCAP_SUPPORT (P2P_DEVCAP_SERVICE_DISCOVERY | \ -+ P2P_DEVCAP_CLIENT_DISCOVERABILITY | \ -+ P2P_DEVCAP_CONCURRENT_OPERATION | \ -+ P2P_DEVCAP_INVITATION_PROC) -+ -+#define DMP_P2P_GRPCAP_SUPPORT (P2P_GRPCAP_INTRABSS) -+ -+/* Value of Device Capability Bitmap */ -+#define P2P_DEVCAP_SERVICE_DISCOVERY BIT(0) -+#define P2P_DEVCAP_CLIENT_DISCOVERABILITY BIT(1) -+#define P2P_DEVCAP_CONCURRENT_OPERATION BIT(2) -+#define P2P_DEVCAP_INFRA_MANAGED BIT(3) -+#define P2P_DEVCAP_DEVICE_LIMIT BIT(4) -+#define P2P_DEVCAP_INVITATION_PROC BIT(5) -+ -+/* Value of Group Capability Bitmap */ -+#define P2P_GRPCAP_GO BIT(0) -+#define P2P_GRPCAP_PERSISTENT_GROUP BIT(1) -+#define P2P_GRPCAP_GROUP_LIMIT BIT(2) -+#define P2P_GRPCAP_INTRABSS BIT(3) -+#define P2P_GRPCAP_CROSS_CONN BIT(4) -+#define P2P_GRPCAP_PERSISTENT_RECONN BIT(5) -+#define P2P_GRPCAP_GROUP_FORMATION BIT(6) -+ -+/* P2P Public Action Frame ( Management Frame ) */ -+#define P2P_PUB_ACTION_ACTION 0x09 -+ -+/* P2P Public Action Frame Type */ -+#define P2P_GO_NEGO_REQ 0 -+#define P2P_GO_NEGO_RESP 1 -+#define P2P_GO_NEGO_CONF 2 -+#define P2P_INVIT_REQ 3 -+#define P2P_INVIT_RESP 4 -+#define P2P_DEVDISC_REQ 5 -+#define P2P_DEVDISC_RESP 6 -+#define P2P_PROVISION_DISC_REQ 7 -+#define P2P_PROVISION_DISC_RESP 8 -+ -+/* P2P Action Frame Type */ -+#define P2P_NOTICE_OF_ABSENCE 0 -+#define P2P_PRESENCE_REQUEST 1 -+#define P2P_PRESENCE_RESPONSE 2 -+#define P2P_GO_DISC_REQUEST 3 -+ -+ -+#define P2P_MAX_PERSISTENT_GROUP_NUM 10 -+ -+#define P2P_PROVISIONING_SCAN_CNT 3 -+ -+#define P2P_WILDCARD_SSID_LEN 7 -+ -+#define P2P_FINDPHASE_EX_NONE 0 /* default value, used when: (1)p2p disabed or (2)p2p enabled but only do 1 scan phase */ -+#define P2P_FINDPHASE_EX_FULL 1 /* used when p2p enabled and want to do 1 scan phase and P2P_FINDPHASE_EX_MAX-1 find phase */ -+#define P2P_FINDPHASE_EX_SOCIAL_FIRST (P2P_FINDPHASE_EX_FULL+1) -+#define P2P_FINDPHASE_EX_MAX 4 -+#define P2P_FINDPHASE_EX_SOCIAL_LAST P2P_FINDPHASE_EX_MAX -+ -+#define P2P_PROVISION_TIMEOUT 5000 /* 5 seconds timeout for sending the provision discovery request */ -+#define P2P_CONCURRENT_PROVISION_TIMEOUT 3000 /* 3 seconds timeout for sending the provision discovery request under concurrent mode */ -+#define P2P_GO_NEGO_TIMEOUT 5000 /* 5 seconds timeout for receiving the group negotation response */ -+#define P2P_CONCURRENT_GO_NEGO_TIMEOUT 3000 /* 3 seconds timeout for sending the negotiation request under concurrent mode */ -+#define P2P_TX_PRESCAN_TIMEOUT 100 /* 100ms */ -+#define P2P_INVITE_TIMEOUT 5000 /* 5 seconds timeout for sending the invitation request */ -+#define P2P_CONCURRENT_INVITE_TIMEOUT 3000 /* 3 seconds timeout for sending the invitation request under concurrent mode */ -+#define P2P_RESET_SCAN_CH 25000 /* 25 seconds timeout to reset the scan channel (based on channel plan) */ -+#define P2P_MAX_INTENT 15 -+ -+#define P2P_MAX_NOA_NUM 2 -+ -+/* WPS Configuration Method */ -+#define WPS_CM_NONE 0x0000 -+#define WPS_CM_LABEL 0x0004 -+#define WPS_CM_DISPLYA 0x0008 -+#define WPS_CM_EXTERNAL_NFC_TOKEN 0x0010 -+#define WPS_CM_INTEGRATED_NFC_TOKEN 0x0020 -+#define WPS_CM_NFC_INTERFACE 0x0040 -+#define WPS_CM_PUSH_BUTTON 0x0080 -+#define WPS_CM_KEYPAD 0x0100 -+#define WPS_CM_SW_PUHS_BUTTON 0x0280 -+#define WPS_CM_HW_PUHS_BUTTON 0x0480 -+#define WPS_CM_SW_DISPLAY_PIN 0x2008 -+#define WPS_CM_LCD_DISPLAY_PIN 0x4008 -+ -+enum P2P_ROLE { -+ P2P_ROLE_DISABLE = 0, -+ P2P_ROLE_DEVICE = 1, -+ P2P_ROLE_CLIENT = 2, -+ P2P_ROLE_GO = 3 -+}; -+ -+enum P2P_STATE { -+ P2P_STATE_NONE = 0, /* P2P disable */ -+ P2P_STATE_IDLE = 1, /* P2P had enabled and do nothing , buddy adapters is linked */ -+ P2P_STATE_LISTEN = 2, /* In pure listen state */ -+ P2P_STATE_SCAN = 3, /* In scan phase */ -+ P2P_STATE_FIND_PHASE_LISTEN = 4, /* In the listen state of find phase */ -+ P2P_STATE_FIND_PHASE_SEARCH = 5, /* In the search state of find phase */ -+ P2P_STATE_TX_PROVISION_DIS_REQ = 6, /* In P2P provisioning discovery */ -+ P2P_STATE_RX_PROVISION_DIS_RSP = 7, -+ P2P_STATE_RX_PROVISION_DIS_REQ = 8, -+ P2P_STATE_GONEGO_ING = 9, /* Doing the group owner negoitation handshake */ -+ P2P_STATE_GONEGO_OK = 10, /* finish the group negoitation handshake with success */ -+ P2P_STATE_GONEGO_FAIL = 11, /* finish the group negoitation handshake with failure */ -+ P2P_STATE_RECV_INVITE_REQ_MATCH = 12, /* receiving the P2P Inviation request and match with the profile. */ -+ P2P_STATE_PROVISIONING_ING = 13, /* Doing the P2P WPS */ -+ P2P_STATE_PROVISIONING_DONE = 14, /* Finish the P2P WPS */ -+ P2P_STATE_TX_INVITE_REQ = 15, /* Transmit the P2P Invitation request */ -+ P2P_STATE_RX_INVITE_RESP_OK = 16, /* Receiving the P2P Invitation response */ -+ P2P_STATE_RECV_INVITE_REQ_DISMATCH = 17, /* receiving the P2P Inviation request and dismatch with the profile. */ -+ P2P_STATE_RECV_INVITE_REQ_GO = 18, /* receiving the P2P Inviation request and this wifi is GO. */ -+ P2P_STATE_RECV_INVITE_REQ_JOIN = 19, /* receiving the P2P Inviation request to join an existing P2P Group. */ -+ P2P_STATE_RX_INVITE_RESP_FAIL = 20, /* recveing the P2P Inviation response with failure */ -+ P2P_STATE_RX_INFOR_NOREADY = 21, /* receiving p2p negoitation response with information is not available */ -+ P2P_STATE_TX_INFOR_NOREADY = 22, /* sending p2p negoitation response with information is not available */ -+}; -+ -+enum P2P_WPSINFO { -+ P2P_NO_WPSINFO = 0, -+ P2P_GOT_WPSINFO_PEER_DISPLAY_PIN = 1, -+ P2P_GOT_WPSINFO_SELF_DISPLAY_PIN = 2, -+ P2P_GOT_WPSINFO_PBC = 3, -+}; -+ -+#define P2P_PRIVATE_IOCTL_SET_LEN 64 -+ -+enum P2P_PROTO_WK_ID { -+ P2P_FIND_PHASE_WK = 0, -+ P2P_RESTORE_STATE_WK = 1, -+ P2P_PRE_TX_PROVDISC_PROCESS_WK = 2, -+ P2P_PRE_TX_NEGOREQ_PROCESS_WK = 3, -+ P2P_PRE_TX_INVITEREQ_PROCESS_WK = 4, -+}; -+ -+#ifdef CONFIG_P2P_PS -+enum P2P_PS_STATE { -+ P2P_PS_DISABLE = 0, -+ P2P_PS_ENABLE = 1, -+ P2P_PS_SCAN = 2, -+ P2P_PS_SCAN_DONE = 3, -+ P2P_PS_ALLSTASLEEP = 4, /* for P2P GO */ -+}; -+ -+enum P2P_PS_MODE { -+ P2P_PS_NONE = 0, -+ P2P_PS_CTWINDOW = 1, -+ P2P_PS_NOA = 2, -+ P2P_PS_MIX = 3, /* CTWindow and NoA */ -+}; -+#endif /* CONFIG_P2P_PS */ -+ -+/* =====================WFD Section===================== -+ * For Wi-Fi Display */ -+#define WFD_ATTR_DEVICE_INFO 0x00 -+#define WFD_ATTR_ASSOC_BSSID 0x01 -+#define WFD_ATTR_COUPLED_SINK_INFO 0x06 -+#define WFD_ATTR_LOCAL_IP_ADDR 0x08 -+#define WFD_ATTR_SESSION_INFO 0x09 -+#define WFD_ATTR_ALTER_MAC 0x0a -+ -+/* For WFD Device Information Attribute */ -+#define WFD_DEVINFO_SOURCE 0x0000 -+#define WFD_DEVINFO_PSINK 0x0001 -+#define WFD_DEVINFO_SSINK 0x0002 -+#define WFD_DEVINFO_DUAL 0x0003 -+ -+#define WFD_DEVINFO_SESSION_AVAIL 0x0010 -+#define WFD_DEVINFO_WSD 0x0040 -+#define WFD_DEVINFO_PC_TDLS 0x0080 -+#define WFD_DEVINFO_HDCP_SUPPORT 0x0100 -+ -+#define IP_MCAST_MAC(mac) ((mac[0] == 0x01) && (mac[1] == 0x00) && (mac[2] == 0x5e)) -+#define ICMPV6_MCAST_MAC(mac) ((mac[0] == 0x33) && (mac[1] == 0x33) && (mac[2] != 0xff)) -+ -+enum RTW_ROCH_WK_ID{ -+ ROCH_RO_CH_WK, -+ ROCH_CANCEL_RO_CH_WK, -+ ROCH_AP_ROCH_CH_SWITCH_PROCESS_WK, -+}; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+/* Regulatroy Domain */ -+struct regd_pair_mapping { -+ u16 reg_dmnenum; -+ u16 reg_5ghz_ctl; -+ u16 reg_2ghz_ctl; -+}; -+ -+struct rtw_regulatory { -+ char alpha2[2]; -+ u16 country_code; -+ u16 max_power_level; -+ u32 tp_scale; -+ u16 current_rd; -+ u16 current_rd_ext; -+ int16_t power_limit; -+ struct regd_pair_mapping *regpair; -+}; -+#endif -+ -+#ifdef CONFIG_WAPI_SUPPORT -+#ifndef IW_AUTH_WAPI_VERSION_1 -+#define IW_AUTH_WAPI_VERSION_1 0x00000008 -+#endif -+#ifndef IW_AUTH_KEY_MGMT_WAPI_PSK -+#define IW_AUTH_KEY_MGMT_WAPI_PSK 0x04 -+#endif -+#ifndef IW_AUTH_WAPI_ENABLED -+#define IW_AUTH_WAPI_ENABLED 0x20 -+#endif -+#ifndef IW_ENCODE_ALG_SM4 -+#define IW_ENCODE_ALG_SM4 0x20 -+#endif -+#endif -+ -+#endif /* _WIFI_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/wlan_bssdef.h b/drivers/staging/rtl8723cs/include/wlan_bssdef.h -new file mode 100644 -index 000000000000..c8f3229b9a30 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/wlan_bssdef.h -@@ -0,0 +1,327 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __WLAN_BSSDEF_H__ -+#define __WLAN_BSSDEF_H__ -+ -+ -+#define MAX_IE_SZ 768 -+ -+ -+#ifdef PLATFORM_LINUX -+ -+#define NDIS_802_11_LENGTH_SSID 32 -+#define NDIS_802_11_LENGTH_RATES 8 -+#define NDIS_802_11_LENGTH_RATES_EX 16 -+ -+typedef unsigned char NDIS_802_11_MAC_ADDRESS[ETH_ALEN]; -+typedef long NDIS_802_11_RSSI; /* in dBm */ -+typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; /* Set of 8 data rates */ -+typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; /* Set of 16 data rates */ -+ -+typedef struct _NDIS_802_11_SSID { -+ u32 SsidLength; -+ u8 Ssid[32]; -+} NDIS_802_11_SSID, *PNDIS_802_11_SSID; -+ -+/* -+ FW will only save the channel number in DSConfig. -+ ODI Handler will convert the channel number to freq. number. -+*/ -+typedef struct _NDIS_802_11_CONFIGURATION { -+ u32 Length; /* Length of structure */ -+ u32 BeaconPeriod; /* units are Kusec */ -+ u32 ATIMWindow; /* units are Kusec */ -+ u32 DSConfig; /* channel number */ -+} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; -+ -+typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE { -+ Ndis802_11IBSS, -+ Ndis802_11Infrastructure, -+ Ndis802_11AutoUnknown, -+ Ndis802_11InfrastructureMax, /* Not a real value, defined as upper bound */ -+ Ndis802_11APMode, -+ Ndis802_11Monitor, -+ Ndis802_11_mesh, -+} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; -+ -+typedef struct _NDIS_802_11_FIXED_IEs { -+ u8 Timestamp[8]; -+ u16 BeaconInterval; -+ u16 Capabilities; -+} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs; -+ -+typedef struct _NDIS_802_11_VARIABLE_IEs { -+ u8 ElementID; -+ u8 Length; -+ u8 data[1]; -+} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs; -+ -+typedef enum _NDIS_802_11_AUTHENTICATION_MODE { -+ Ndis802_11AuthModeOpen, -+ Ndis802_11AuthModeShared, -+ Ndis802_11AuthModeAutoSwitch, -+ Ndis802_11AuthModeWPA, -+ Ndis802_11AuthModeWPAPSK, -+ Ndis802_11AuthModeWPANone, -+ Ndis802_11AuthModeWAPI, -+ Ndis802_11AuthModeMax /* Not a real mode, defined as upper bound */ -+} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE; -+ -+typedef enum _NDIS_802_11_WEP_STATUS { -+ Ndis802_11WEPEnabled, -+ Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled, -+ Ndis802_11WEPDisabled, -+ Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled, -+ Ndis802_11WEPKeyAbsent, -+ Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent, -+ Ndis802_11WEPNotSupported, -+ Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported, -+ Ndis802_11Encryption2Enabled, -+ Ndis802_11Encryption2KeyAbsent, -+ Ndis802_11Encryption3Enabled, -+ Ndis802_11Encryption3KeyAbsent, -+ Ndis802_11_EncrypteionWAPI -+} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS, -+NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS; -+ -+typedef struct _NDIS_802_11_WEP { -+ u32 Length; /* Length of this structure */ -+ u32 KeyIndex; /* 0 is the per-client key, 1-N are the global keys */ -+ u32 KeyLength; /* length of key in bytes */ -+ u8 KeyMaterial[16];/* variable length depending on above field */ -+} NDIS_802_11_WEP, *PNDIS_802_11_WEP; -+ -+#endif /* end of #ifdef PLATFORM_LINUX */ -+ -+#ifdef PLATFORM_FREEBSD -+ -+#define NDIS_802_11_LENGTH_SSID 32 -+#define NDIS_802_11_LENGTH_RATES 8 -+#define NDIS_802_11_LENGTH_RATES_EX 16 -+ -+typedef unsigned char NDIS_802_11_MAC_ADDRESS[ETH_ALEN]; -+typedef long NDIS_802_11_RSSI; /* in dBm */ -+typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; /* Set of 8 data rates */ -+typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; /* Set of 16 data rates */ -+ -+ -+typedef struct _NDIS_802_11_SSID { -+ u32 SsidLength; -+ u8 Ssid[32]; -+} NDIS_802_11_SSID, *PNDIS_802_11_SSID; -+ -+/* -+ FW will only save the channel number in DSConfig. -+ ODI Handler will convert the channel number to freq. number. -+*/ -+typedef struct _NDIS_802_11_CONFIGURATION { -+ u32 Length; /* Length of structure */ -+ u32 BeaconPeriod; /* units are Kusec */ -+ u32 ATIMWindow; /* units are Kusec */ -+ u32 DSConfig; /* channel number */ -+} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; -+ -+typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE { -+ Ndis802_11IBSS, -+ Ndis802_11Infrastructure, -+ Ndis802_11AutoUnknown, -+ Ndis802_11InfrastructureMax, /* Not a real value, defined as upper bound */ -+ Ndis802_11APMode -+} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; -+ -+typedef struct _NDIS_802_11_FIXED_IEs { -+ u8 Timestamp[8]; -+ u16 BeaconInterval; -+ u16 Capabilities; -+} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs; -+ -+typedef struct _NDIS_802_11_VARIABLE_IEs { -+ u8 ElementID; -+ u8 Length; -+ u8 data[1]; -+} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs; -+ -+typedef enum _NDIS_802_11_AUTHENTICATION_MODE { -+ Ndis802_11AuthModeOpen, -+ Ndis802_11AuthModeShared, -+ Ndis802_11AuthModeAutoSwitch, -+ Ndis802_11AuthModeWPA, -+ Ndis802_11AuthModeWPAPSK, -+ Ndis802_11AuthModeWPANone, -+ Ndis802_11AuthModeMax /* Not a real mode, defined as upper bound */ -+} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE; -+ -+typedef enum _NDIS_802_11_WEP_STATUS { -+ Ndis802_11WEPEnabled, -+ Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled, -+ Ndis802_11WEPDisabled, -+ Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled, -+ Ndis802_11WEPKeyAbsent, -+ Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent, -+ Ndis802_11WEPNotSupported, -+ Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported, -+ Ndis802_11Encryption2Enabled, -+ Ndis802_11Encryption2KeyAbsent, -+ Ndis802_11Encryption3Enabled, -+ Ndis802_11Encryption3KeyAbsent -+} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS, -+NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS; -+ -+ -+typedef struct _NDIS_802_11_WEP { -+ u32 Length; /* Length of this structure */ -+ u32 KeyIndex; /* 0 is the per-client key, 1-N are the global keys */ -+ u32 KeyLength; /* length of key in bytes */ -+ u8 KeyMaterial[16];/* variable length depending on above field */ -+} NDIS_802_11_WEP, *PNDIS_802_11_WEP; -+ -+#endif /* PLATFORM_FREEBSD */ -+ -+#ifndef Ndis802_11APMode -+#define Ndis802_11APMode (Ndis802_11InfrastructureMax+1) -+#endif -+ -+typedef struct _WLAN_PHY_INFO { -+ u8 SignalStrength;/* (in percentage) */ -+ u8 SignalQuality;/* (in percentage) */ -+ u8 Optimum_antenna; /* for Antenna diversity */ -+ u8 is_cck_rate; /* 1:cck_rate */ -+ s8 rx_snr[4]; -+#ifdef CONFIG_RTW_80211K -+ u32 free_cnt; /* freerun counter */ -+ u8 rm_en_cap[5]; -+#endif -+} WLAN_PHY_INFO, *PWLAN_PHY_INFO; -+ -+typedef struct _WLAN_BCN_INFO { -+ /* these infor get from rtw_get_encrypt_info when -+ * * translate scan to UI */ -+ u8 encryp_protocol;/* ENCRYP_PROTOCOL_E: OPEN/WEP/WPA/WPA2/WAPI */ -+ int group_cipher; /* WPA/WPA2 group cipher */ -+ int pairwise_cipher;/* //WPA/WPA2/WEP pairwise cipher */ -+ int is_8021x; -+ -+ /* bwmode 20/40 and ch_offset UP/LOW */ -+ unsigned short ht_cap_info; -+ unsigned char ht_info_infos_0; -+} WLAN_BCN_INFO, *PWLAN_BCN_INFO; -+ -+enum bss_type { -+ BSS_TYPE_UNDEF, -+ BSS_TYPE_PROB_REQ = 1, -+ BSS_TYPE_BCN = 2, -+ BSS_TYPE_PROB_RSP = 3, -+}; -+ -+/* temporally add #pragma pack for structure alignment issue of -+* WLAN_BSSID_EX and get_WLAN_BSSID_EX_sz() -+*/ -+typedef struct _WLAN_BSSID_EX { -+ u32 Length; -+ NDIS_802_11_MAC_ADDRESS MacAddress; -+ u8 Reserved[2];/* [0]: IS beacon frame , bss_type*/ -+ NDIS_802_11_SSID Ssid; -+ NDIS_802_11_SSID mesh_id; -+ u32 Privacy; -+ NDIS_802_11_RSSI Rssi;/* (in dBM,raw data ,get from PHY) */ -+ NDIS_802_11_CONFIGURATION Configuration; -+ NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; -+ NDIS_802_11_RATES_EX SupportedRates; -+ WLAN_PHY_INFO PhyInfo; -+ u32 IELength; -+ u8 IEs[MAX_IE_SZ]; /* (timestamp, beacon interval, and capability information) */ -+} -+__attribute__((packed)) WLAN_BSSID_EX, *PWLAN_BSSID_EX; -+ -+#define BSS_EX_IES(bss_ex) ((bss_ex)->IEs) -+#define BSS_EX_IES_LEN(bss_ex) ((bss_ex)->IELength) -+#define BSS_EX_FIXED_IE_OFFSET(bss_ex) ((bss_ex)->Reserved[0] == BSS_TYPE_PROB_REQ ? 0 : 12) -+#define BSS_EX_TLV_IES(bss_ex) (BSS_EX_IES((bss_ex)) + BSS_EX_FIXED_IE_OFFSET((bss_ex))) -+#define BSS_EX_TLV_IES_LEN(bss_ex) (BSS_EX_IES_LEN((bss_ex)) - BSS_EX_FIXED_IE_OFFSET((bss_ex))) -+ -+__inline static uint get_WLAN_BSSID_EX_sz(WLAN_BSSID_EX *bss) -+{ -+ return sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + bss->IELength; -+} -+ -+struct beacon_keys { -+ u8 ssid[IW_ESSID_MAX_SIZE]; -+ u32 ssid_len; -+ u8 ch; -+ u8 bw; -+ u8 offset; -+ u8 proto_cap; /* PROTO_CAP_XXX */ -+ u8 rate_set[12]; -+ u8 rate_num; -+ int encryp_protocol; -+ int pairwise_cipher; -+ int group_cipher; -+ u32 akm; -+}; -+ -+struct wlan_network { -+ _list list; -+ int network_type; /* refer to ieee80211.h for WIRELESS_11A/B/G */ -+ int fixed; /* set to fixed when not to be removed as site-surveying */ -+ systime last_scanned; /* timestamp for the network */ -+ systime last_non_hidden_ssid_ap; -+#ifdef CONFIG_RTW_MESH -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+ systime acnode_stime; -+ systime acnode_notify_etime; -+#endif -+#endif -+ int aid; /* will only be valid when a BSS is joinned. */ -+ int join_res; -+ struct beacon_keys bcn_keys; -+ bool bcn_keys_valid; -+ WLAN_BSSID_EX network; /* must be the last item */ -+}; -+ -+enum VRTL_CARRIER_SENSE { -+ DISABLE_VCS, -+ ENABLE_VCS, -+ AUTO_VCS -+}; -+ -+enum VCS_TYPE { -+ NONE_VCS, -+ RTS_CTS, -+ CTS_TO_SELF -+}; -+ -+ -+ -+ -+#define PWR_CAM 0 -+#define PWR_MINPS 1 -+#define PWR_MAXPS 2 -+#define PWR_UAPSD 3 -+#define PWR_VOIP 4 -+ -+ -+enum UAPSD_MAX_SP { -+ NO_LIMIT, -+ TWO_MSDU, -+ FOUR_MSDU, -+ SIX_MSDU -+}; -+ -+ -+/* john */ -+#define NUM_PRE_AUTH_KEY 16 -+#define NUM_PMKID_CACHE NUM_PRE_AUTH_KEY -+ -+#endif /* #ifndef WLAN_BSSDEF_H_ */ -diff --git a/drivers/staging/rtl8723cs/include/xmit_osdep.h b/drivers/staging/rtl8723cs/include/xmit_osdep.h -new file mode 100644 -index 000000000000..9bf9c93d5af3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/include/xmit_osdep.h -@@ -0,0 +1,96 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __XMIT_OSDEP_H_ -+#define __XMIT_OSDEP_H_ -+ -+ -+struct pkt_file { -+ _pkt *pkt; -+ SIZE_T pkt_len; /* the remainder length of the open_file */ -+ _buffer *cur_buffer; -+ u8 *buf_start; -+ u8 *cur_addr; -+ SIZE_T buf_len; -+}; -+ -+#ifdef PLATFORM_WINDOWS -+ -+#ifdef PLATFORM_OS_XP -+#ifdef CONFIG_USB_HCI -+#include -+#include -+#include -+#endif -+#endif -+ -+#ifdef CONFIG_GSPI_HCI -+ #define NR_XMITFRAME 64 -+#else -+ #define NR_XMITFRAME 128 -+#endif -+ -+#define ETH_ALEN 6 -+ -+extern NDIS_STATUS rtw_xmit_entry( -+ _nic_hdl cnxt, -+ NDIS_PACKET *pkt, -+ u32 flags -+); -+ -+#endif /* PLATFORM_WINDOWS */ -+ -+#ifdef PLATFORM_FREEBSD -+#define NR_XMITFRAME 256 -+extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); -+extern void rtw_xmit_entry_wrap(struct ifnet *pifp); -+#endif /* PLATFORM_FREEBSD */ -+ -+#ifdef PLATFORM_LINUX -+ -+#define NR_XMITFRAME 256 -+ -+struct xmit_priv; -+struct pkt_attrib; -+struct sta_xmit_priv; -+struct xmit_frame; -+struct xmit_buf; -+ -+extern int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); -+extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); -+ -+#endif /* PLATFORM_LINUX */ -+ -+void rtw_os_xmit_schedule(_adapter *padapter); -+ -+int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf, u32 alloc_sz, u8 flag); -+void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf, u32 free_sz, u8 flag); -+ -+extern void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib); -+ -+extern uint rtw_remainder_len(struct pkt_file *pfile); -+extern void _rtw_open_pktfile(_pkt *pkt, struct pkt_file *pfile); -+extern uint _rtw_pktfile_read(struct pkt_file *pfile, u8 *rmem, uint rlen); -+extern sint rtw_endofpktfile(struct pkt_file *pfile); -+ -+extern void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt); -+extern void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe); -+ -+void rtw_os_check_wakup_queue(_adapter *adapter, u16 os_qid); -+bool rtw_os_check_stop_queue(_adapter *adapter, u16 os_qid); -+void rtw_os_wake_queue_at_free_stainfo(_adapter *padapter, int *qcnt_freed); -+ -+void dump_os_queue(void *sel, _adapter *padapter); -+ -+#endif /* __XMIT_OSDEP_H_ */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/custom_gpio_linux.c b/drivers/staging/rtl8723cs/os_dep/linux/custom_gpio_linux.c -new file mode 100644 -index 000000000000..23401b7d6b7c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/custom_gpio_linux.c -@@ -0,0 +1,340 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include "drv_types.h" -+ -+#ifdef CONFIG_PLATFORM_SPRD -+ -+/* gspi func & GPIO define */ -+#include /* 0915 */ -+#include -+ -+#if !(defined ANDROID_2X) -+ -+#ifdef CONFIG_RTL8188E -+#include -+#include -+#endif /* CONFIG_RTL8188E */ -+ -+#ifndef GPIO_WIFI_POWER -+#define GPIO_WIFI_POWER -1 -+#endif /* !GPIO_WIFI_POWER */ -+ -+#ifndef GPIO_WIFI_RESET -+#define GPIO_WIFI_RESET -1 -+#endif /* !GPIO_WIFI_RESET */ -+ -+#ifndef GPIO_WIFI_PWDN -+#define GPIO_WIFI_PWDN -1 -+#endif /* !GPIO_WIFI_RESET */ -+#ifdef CONFIG_GSPI_HCI -+extern unsigned int oob_irq; -+#endif /* CONFIG_GSPI_HCI */ -+ -+#ifdef CONFIG_SDIO_HCI -+extern int rtw_mp_mode; -+#else /* !CONFIG_SDIO_HCI */ -+#endif /* !CONFIG_SDIO_HCI */ -+ -+int rtw_wifi_gpio_init(void) -+{ -+#ifdef CONFIG_GSPI_HCI -+ if (GPIO_WIFI_IRQ > 0) { -+ gpio_request(GPIO_WIFI_IRQ, "oob_irq"); -+ gpio_direction_input(GPIO_WIFI_IRQ); -+ -+ oob_irq = gpio_to_irq(GPIO_WIFI_IRQ); -+ -+ RTW_INFO("%s oob_irq:%d\n", __func__, oob_irq); -+ } -+#endif -+ if (GPIO_WIFI_RESET > 0) -+ gpio_request(GPIO_WIFI_RESET , "wifi_rst"); -+ if (GPIO_WIFI_POWER > 0) -+ gpio_request(GPIO_WIFI_POWER, "wifi_power"); -+ -+#ifdef CONFIG_SDIO_HCI -+#if (defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) -+ if (rtw_mp_mode == 1) { -+ RTW_INFO("%s GPIO_BT_RESET pin special for mp_test\n", __func__); -+ if (GPIO_BT_RESET > 0) -+ gpio_request(GPIO_BT_RESET , "bt_rst"); -+ } -+#endif -+#endif -+ return 0; -+} -+ -+int rtw_wifi_gpio_deinit(void) -+{ -+#ifdef CONFIG_GSPI_HCI -+ if (GPIO_WIFI_IRQ > 0) -+ gpio_free(GPIO_WIFI_IRQ); -+#endif -+ if (GPIO_WIFI_RESET > 0) -+ gpio_free(GPIO_WIFI_RESET); -+ if (GPIO_WIFI_POWER > 0) -+ gpio_free(GPIO_WIFI_POWER); -+ -+#ifdef CONFIG_SDIO_HCI -+#if (defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) -+ if (rtw_mp_mode == 1) { -+ RTW_INFO("%s GPIO_BT_RESET pin special for mp_test\n", __func__); -+ if (GPIO_BT_RESET > 0) -+ gpio_free(GPIO_BT_RESET); -+ } -+#endif -+#endif -+ return 0; -+} -+ -+/* Customer function to control hw specific wlan gpios */ -+void rtw_wifi_gpio_wlan_ctrl(int onoff) -+{ -+ switch (onoff) { -+ case WLAN_PWDN_OFF: -+ RTW_INFO("%s: call customer specific GPIO(%d) to set wifi power down pin to 0\n", -+ __FUNCTION__, GPIO_WIFI_RESET); -+ -+#ifndef CONFIG_DONT_BUS_SCAN -+ if (GPIO_WIFI_RESET > 0) -+ gpio_direction_output(GPIO_WIFI_RESET , 0); -+#endif -+ break; -+ -+ case WLAN_PWDN_ON: -+ RTW_INFO("%s: callc customer specific GPIO(%d) to set wifi power down pin to 1\n", -+ __FUNCTION__, GPIO_WIFI_RESET); -+ -+ if (GPIO_WIFI_RESET > 0) -+ gpio_direction_output(GPIO_WIFI_RESET , 1); -+ break; -+ -+ case WLAN_POWER_OFF: -+ break; -+ -+ case WLAN_POWER_ON: -+ break; -+#ifdef CONFIG_SDIO_HCI -+#if (defined(CONFIG_RTL8723B)) && (MP_DRIVER == 1) -+ case WLAN_BT_PWDN_OFF: -+ if (rtw_mp_mode == 1) { -+ RTW_INFO("%s: call customer specific GPIO to set wifi power down pin to 0\n", -+ __FUNCTION__); -+ if (GPIO_BT_RESET > 0) -+ gpio_direction_output(GPIO_BT_RESET , 0); -+ } -+ break; -+ -+ case WLAN_BT_PWDN_ON: -+ if (rtw_mp_mode == 1) { -+ RTW_INFO("%s: callc customer specific GPIO to set wifi power down pin to 1 %x\n", -+ __FUNCTION__, GPIO_BT_RESET); -+ -+ if (GPIO_BT_RESET > 0) -+ gpio_direction_output(GPIO_BT_RESET , 1); -+ } -+ break; -+#endif -+#endif -+ } -+} -+ -+#else /* ANDROID_2X */ -+ -+#include -+ -+#ifdef CONFIG_RTL8188E -+extern int sprd_3rdparty_gpio_wifi_power; -+#endif -+extern int sprd_3rdparty_gpio_wifi_pwd; -+#if defined(CONFIG_RTL8723B) -+extern int sprd_3rdparty_gpio_bt_reset; -+#endif -+ -+int rtw_wifi_gpio_init(void) -+{ -+#if defined(CONFIG_RTL8723B) -+ if (sprd_3rdparty_gpio_bt_reset > 0) -+ gpio_direction_output(sprd_3rdparty_gpio_bt_reset, 1); -+#endif -+ -+ return 0; -+} -+ -+int rtw_wifi_gpio_deinit(void) -+{ -+ return 0; -+} -+ -+/* Customer function to control hw specific wlan gpios */ -+void rtw_wifi_gpio_wlan_ctrl(int onoff) -+{ -+ switch (onoff) { -+ case WLAN_PWDN_OFF: -+ RTW_INFO("%s: call customer specific GPIO to set wifi power down pin to 0\n", -+ __FUNCTION__); -+ if (sprd_3rdparty_gpio_wifi_pwd > 0) -+ gpio_set_value(sprd_3rdparty_gpio_wifi_pwd, 0); -+ -+ if (sprd_3rdparty_gpio_wifi_pwd == 60) { -+ RTW_INFO("%s: turn off VSIM2 2.8V\n", __func__); -+ LDO_TurnOffLDO(LDO_LDO_SIM2); -+ } -+ break; -+ -+ case WLAN_PWDN_ON: -+ RTW_INFO("%s: callc customer specific GPIO to set wifi power down pin to 1\n", -+ __FUNCTION__); -+ if (sprd_3rdparty_gpio_wifi_pwd == 60) { -+ RTW_INFO("%s: turn on VSIM2 2.8V\n", __func__); -+ LDO_SetVoltLevel(LDO_LDO_SIM2, LDO_VOLT_LEVEL0); -+ LDO_TurnOnLDO(LDO_LDO_SIM2); -+ } -+ if (sprd_3rdparty_gpio_wifi_pwd > 0) -+ gpio_set_value(sprd_3rdparty_gpio_wifi_pwd, 1); -+ break; -+ -+ case WLAN_POWER_OFF: -+#ifdef CONFIG_RTL8188E -+#ifdef CONFIG_WIF1_LDO -+ RTW_INFO("%s: turn off VDD-WIFI0 1.2V\n", __FUNCTION__); -+ LDO_TurnOffLDO(LDO_LDO_WIF1); -+#endif /* CONFIG_WIF1_LDO */ -+ -+ RTW_INFO("%s: turn off VDD-WIFI0 3.3V\n", __FUNCTION__); -+ LDO_TurnOffLDO(LDO_LDO_WIF0); -+ -+ RTW_INFO("%s: call customer specific GPIO(%d) to turn off wifi power\n", -+ __FUNCTION__, sprd_3rdparty_gpio_wifi_power); -+ if (sprd_3rdparty_gpio_wifi_power != 65535) -+ gpio_set_value(sprd_3rdparty_gpio_wifi_power, 0); -+#endif -+ break; -+ -+ case WLAN_POWER_ON: -+#ifdef CONFIG_RTL8188E -+ RTW_INFO("%s: call customer specific GPIO(%d) to turn on wifi power\n", -+ __FUNCTION__, sprd_3rdparty_gpio_wifi_power); -+ if (sprd_3rdparty_gpio_wifi_power != 65535) -+ gpio_set_value(sprd_3rdparty_gpio_wifi_power, 1); -+ -+ RTW_INFO("%s: turn on VDD-WIFI0 3.3V\n", __FUNCTION__); -+ LDO_TurnOnLDO(LDO_LDO_WIF0); -+ LDO_SetVoltLevel(LDO_LDO_WIF0, LDO_VOLT_LEVEL1); -+ -+#ifdef CONFIG_WIF1_LDO -+ RTW_INFO("%s: turn on VDD-WIFI1 1.2V\n", __func__); -+ LDO_TurnOnLDO(LDO_LDO_WIF1); -+ LDO_SetVoltLevel(LDO_LDO_WIF1, LDO_VOLT_LEVEL3); -+#endif /* CONFIG_WIF1_LDO */ -+#endif -+ break; -+ -+ case WLAN_BT_PWDN_OFF: -+ RTW_INFO("%s: call customer specific GPIO to set bt power down pin to 0\n", -+ __FUNCTION__); -+#if defined(CONFIG_RTL8723B) -+ if (sprd_3rdparty_gpio_bt_reset > 0) -+ gpio_set_value(sprd_3rdparty_gpio_bt_reset, 0); -+#endif -+ break; -+ -+ case WLAN_BT_PWDN_ON: -+ RTW_INFO("%s: callc customer specific GPIO to set bt power down pin to 1\n", -+ __FUNCTION__); -+#if defined(CONFIG_RTL8723B) -+ if (sprd_3rdparty_gpio_bt_reset > 0) -+ gpio_set_value(sprd_3rdparty_gpio_bt_reset, 1); -+#endif -+ break; -+ } -+} -+#endif /* ANDROID_2X */ -+ -+#elif defined(CONFIG_PLATFORM_ARM_RK3066) -+#include -+ -+#define GPIO_WIFI_IRQ RK30_PIN2_PC2 -+extern unsigned int oob_irq; -+int rtw_wifi_gpio_init(void) -+{ -+#ifdef CONFIG_GSPI_HCI -+ if (GPIO_WIFI_IRQ > 0) { -+ rk30_mux_api_set(GPIO2C2_LCDC1DATA18_SMCBLSN1_HSADCDATA5_NAME, GPIO2C_GPIO2C2);/* jacky_test */ -+ gpio_request(GPIO_WIFI_IRQ, "oob_irq"); -+ gpio_direction_input(GPIO_WIFI_IRQ); -+ -+ oob_irq = gpio_to_irq(GPIO_WIFI_IRQ); -+ -+ RTW_INFO("%s oob_irq:%d\n", __func__, oob_irq); -+ } -+#endif -+ return 0; -+} -+ -+ -+int rtw_wifi_gpio_deinit(void) -+{ -+#ifdef CONFIG_GSPI_HCI -+ if (GPIO_WIFI_IRQ > 0) -+ gpio_free(GPIO_WIFI_IRQ); -+#endif -+ return 0; -+} -+ -+void rtw_wifi_gpio_wlan_ctrl(int onoff) -+{ -+} -+ -+#ifdef CONFIG_GPIO_API -+/* this is a demo for extending GPIO pin[7] as interrupt mode */ -+struct net_device *rtl_net; -+extern int rtw_register_gpio_interrupt(struct net_device *netdev, int gpio_num, void(*callback)(u8 level)); -+extern int rtw_disable_gpio_interrupt(struct net_device *netdev, int gpio_num); -+void gpio_int(u8 is_high) -+{ -+ RTW_INFO("%s level=%d\n", __func__, is_high); -+} -+int register_net_gpio_init(void) -+{ -+ rtl_net = dev_get_by_name(&init_net, "wlan0"); -+ if (!rtl_net) { -+ RTW_PRINT("rtl_net init fail!\n"); -+ return -1; -+ } -+ return rtw_register_gpio_interrupt(rtl_net, 7, gpio_int); -+} -+int unregister_net_gpio_init(void) -+{ -+ rtl_net = dev_get_by_name(&init_net, "wlan0"); -+ if (!rtl_net) { -+ RTW_PRINT("rtl_net init fail!\n"); -+ return -1; -+ } -+ return rtw_disable_gpio_interrupt(rtl_net, 7); -+} -+#endif -+ -+#else -+ -+int rtw_wifi_gpio_init(void) -+{ -+ return 0; -+} -+ -+void rtw_wifi_gpio_wlan_ctrl(int onoff) -+{ -+} -+#endif /* CONFIG_PLATFORM_SPRD */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/ioctl_cfg80211.c b/drivers/staging/rtl8723cs/os_dep/linux/ioctl_cfg80211.c -new file mode 100644 -index 000000000000..54424a82ce19 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/ioctl_cfg80211.c -@@ -0,0 +1,10852 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _IOCTL_CFG80211_C_ -+ -+#include -+#include -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ -+#ifndef DBG_RTW_CFG80211_STA_PARAM -+#define DBG_RTW_CFG80211_STA_PARAM 0 -+#endif -+ -+#ifndef DBG_RTW_CFG80211_MESH_CONF -+#define DBG_RTW_CFG80211_MESH_CONF 0 -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) -+#define STATION_INFO_INACTIVE_TIME BIT(NL80211_STA_INFO_INACTIVE_TIME) -+#define STATION_INFO_LLID BIT(NL80211_STA_INFO_LLID) -+#define STATION_INFO_PLID BIT(NL80211_STA_INFO_PLID) -+#define STATION_INFO_PLINK_STATE BIT(NL80211_STA_INFO_PLINK_STATE) -+#define STATION_INFO_SIGNAL BIT(NL80211_STA_INFO_SIGNAL) -+#define STATION_INFO_TX_BITRATE BIT(NL80211_STA_INFO_TX_BITRATE) -+#define STATION_INFO_RX_PACKETS BIT(NL80211_STA_INFO_RX_PACKETS) -+#define STATION_INFO_TX_PACKETS BIT(NL80211_STA_INFO_TX_PACKETS) -+#define STATION_INFO_TX_FAILED BIT(NL80211_STA_INFO_TX_FAILED) -+#define STATION_INFO_LOCAL_PM BIT(NL80211_STA_INFO_LOCAL_PM) -+#define STATION_INFO_PEER_PM BIT(NL80211_STA_INFO_PEER_PM) -+#define STATION_INFO_NONPEER_PM BIT(NL80211_STA_INFO_NONPEER_PM) -+#define STATION_INFO_ASSOC_REQ_IES 0 -+#endif /* Linux kernel >= 4.0.0 */ -+ -+#define RTW_MAX_MGMT_TX_CNT (8) -+#define RTW_MAX_MGMT_TX_MS_GAS (500) -+ -+#define RTW_SCAN_IE_LEN_MAX 2304 -+#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 5000 /* ms */ -+#define RTW_MAX_NUM_PMKIDS 4 -+ -+#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ -+#ifndef WLAN_CIPHER_SUITE_SMS4 -+#define WLAN_CIPHER_SUITE_SMS4 0x00147201 -+#endif -+ -+#ifndef WLAN_AKM_SUITE_WAPI_PSK -+#define WLAN_AKM_SUITE_WAPI_PSK 0x000FAC04 -+#endif -+ -+#ifndef WLAN_AKM_SUITE_WAPI_CERT -+#define WLAN_AKM_SUITE_WAPI_CERT 0x000FAC12 -+#endif -+ -+#ifndef NL80211_WAPI_VERSION_1 -+#define NL80211_WAPI_VERSION_1 (1 << 2) -+#endif -+ -+#endif /* CONFIG_WAPI_SUPPORT */ -+ -+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(4, 11, 12)) -+#ifdef CONFIG_RTW_80211R -+#define WLAN_AKM_SUITE_FT_8021X 0x000FAC03 -+#define WLAN_AKM_SUITE_FT_PSK 0x000FAC04 -+#endif -+#endif -+ -+#define WIFI_CIPHER_SUITE_GCMP 0x000FAC08 -+#define WIFI_CIPHER_SUITE_GCMP_256 0x000FAC09 -+#define WIFI_CIPHER_SUITE_CCMP_256 0x000FAC0A -+#define WIFI_CIPHER_SUITE_BIP_GMAC_128 0x000FAC0B -+#define WIFI_CIPHER_SUITE_BIP_GMAC_256 0x000FAC0C -+#define WIFI_CIPHER_SUITE_BIP_CMAC_256 0x000FAC0D -+ -+/* -+ * If customer need, defining this flag will make driver -+ * always return -EBUSY at the condition of scan deny. -+ */ -+/* #define CONFIG_NOTIFY_SCAN_ABORT_WITH_BUSY */ -+ -+static const u32 rtw_cipher_suites[] = { -+ WLAN_CIPHER_SUITE_WEP40, -+ WLAN_CIPHER_SUITE_WEP104, -+ WLAN_CIPHER_SUITE_TKIP, -+ WLAN_CIPHER_SUITE_CCMP, -+#ifdef CONFIG_WAPI_SUPPORT -+ WLAN_CIPHER_SUITE_SMS4, -+#endif /* CONFIG_WAPI_SUPPORT */ -+#ifdef CONFIG_IEEE80211W -+ WLAN_CIPHER_SUITE_AES_CMAC, -+ WIFI_CIPHER_SUITE_GCMP, -+ WIFI_CIPHER_SUITE_GCMP_256, -+ WIFI_CIPHER_SUITE_CCMP_256, -+ WIFI_CIPHER_SUITE_BIP_GMAC_128, -+ WIFI_CIPHER_SUITE_BIP_GMAC_256, -+ WIFI_CIPHER_SUITE_BIP_CMAC_256, -+#endif /* CONFIG_IEEE80211W */ -+}; -+ -+#define RATETAB_ENT(_rate, _rateid, _flags) \ -+ { \ -+ .bitrate = (_rate), \ -+ .hw_value = (_rateid), \ -+ .flags = (_flags), \ -+ } -+ -+#define CHAN2G(_channel, _freq, _flags) { \ -+ .band = NL80211_BAND_2GHZ, \ -+ .center_freq = (_freq), \ -+ .hw_value = (_channel), \ -+ .flags = (_flags), \ -+ .max_antenna_gain = 0, \ -+ .max_power = 0, \ -+ } -+ -+#define CHAN5G(_channel, _flags) { \ -+ .band = NL80211_BAND_5GHZ, \ -+ .center_freq = 5000 + (5 * (_channel)), \ -+ .hw_value = (_channel), \ -+ .flags = (_flags), \ -+ .max_antenna_gain = 0, \ -+ .max_power = 0, \ -+ } -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+/* if wowlan is not supported, kernel generate a disconnect at each suspend -+ * cf: /net/wireless/sysfs.c, so register a stub wowlan. -+ * Moreover wowlan has to be enabled via a the nl80211_set_wowlan callback. -+ * (from user space, e.g. iw phy0 wowlan enable) -+ */ -+static const struct wiphy_wowlan_support wowlan_stub = { -+ .flags = WIPHY_WOWLAN_ANY, -+ .n_patterns = 0, -+ .pattern_max_len = 0, -+ .pattern_min_len = 0, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) -+ .max_pkt_offset = 0, -+#endif -+}; -+#endif -+ -+static struct ieee80211_rate rtw_rates[] = { -+ RATETAB_ENT(10, 0x1, 0), -+ RATETAB_ENT(20, 0x2, 0), -+ RATETAB_ENT(55, 0x4, 0), -+ RATETAB_ENT(110, 0x8, 0), -+ RATETAB_ENT(60, 0x10, 0), -+ RATETAB_ENT(90, 0x20, 0), -+ RATETAB_ENT(120, 0x40, 0), -+ RATETAB_ENT(180, 0x80, 0), -+ RATETAB_ENT(240, 0x100, 0), -+ RATETAB_ENT(360, 0x200, 0), -+ RATETAB_ENT(480, 0x400, 0), -+ RATETAB_ENT(540, 0x800, 0), -+}; -+ -+#define rtw_a_rates (rtw_rates + 4) -+#define RTW_A_RATES_NUM 8 -+#define rtw_g_rates (rtw_rates + 0) -+#define RTW_G_RATES_NUM 12 -+ -+/* from center_ch_2g */ -+static struct ieee80211_channel rtw_2ghz_channels[MAX_CHANNEL_NUM_2G] = { -+ CHAN2G(1, 2412, 0), -+ CHAN2G(2, 2417, 0), -+ CHAN2G(3, 2422, 0), -+ CHAN2G(4, 2427, 0), -+ CHAN2G(5, 2432, 0), -+ CHAN2G(6, 2437, 0), -+ CHAN2G(7, 2442, 0), -+ CHAN2G(8, 2447, 0), -+ CHAN2G(9, 2452, 0), -+ CHAN2G(10, 2457, 0), -+ CHAN2G(11, 2462, 0), -+ CHAN2G(12, 2467, 0), -+ CHAN2G(13, 2472, 0), -+ CHAN2G(14, 2484, 0), -+}; -+ -+/* from center_ch_5g_20m */ -+static struct ieee80211_channel rtw_5ghz_a_channels[MAX_CHANNEL_NUM_5G] = { -+ CHAN5G(36, 0), CHAN5G(40, 0), CHAN5G(44, 0), CHAN5G(48, 0), -+ -+ CHAN5G(52, 0), CHAN5G(56, 0), CHAN5G(60, 0), CHAN5G(64, 0), -+ -+ CHAN5G(100, 0), CHAN5G(104, 0), CHAN5G(108, 0), CHAN5G(112, 0), -+ CHAN5G(116, 0), CHAN5G(120, 0), CHAN5G(124, 0), CHAN5G(128, 0), -+ CHAN5G(132, 0), CHAN5G(136, 0), CHAN5G(140, 0), CHAN5G(144, 0), -+ -+ CHAN5G(149, 0), CHAN5G(153, 0), CHAN5G(157, 0), CHAN5G(161, 0), -+ CHAN5G(165, 0), CHAN5G(169, 0), CHAN5G(173, 0), CHAN5G(177, 0), -+}; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+static u8 rtw_chbw_to_cfg80211_chan_def(struct wiphy *wiphy, struct cfg80211_chan_def *chdef, u8 ch, u8 bw, u8 offset, u8 ht) -+{ -+ int freq, cfreq; -+ struct ieee80211_channel *chan; -+ u8 ret = _FAIL; -+ -+ _rtw_memset(chdef, 0, sizeof(*chdef)); -+ -+ freq = rtw_ch2freq(ch); -+ if (!freq) -+ goto exit; -+ -+ cfreq = rtw_get_center_ch(ch, bw, offset); -+ if (!cfreq) -+ goto exit; -+ cfreq = rtw_ch2freq(cfreq); -+ if (!cfreq) -+ goto exit; -+ -+ chan = ieee80211_get_channel(wiphy, freq); -+ if (!chan) -+ goto exit; -+ -+ if (bw == CHANNEL_WIDTH_20) -+ chdef->width = ht ? NL80211_CHAN_WIDTH_20 : NL80211_CHAN_WIDTH_20_NOHT; -+ else if (bw == CHANNEL_WIDTH_40) -+ chdef->width = NL80211_CHAN_WIDTH_40; -+ else if (bw == CHANNEL_WIDTH_80) -+ chdef->width = NL80211_CHAN_WIDTH_80; -+ else if (bw == CHANNEL_WIDTH_160) -+ chdef->width = NL80211_CHAN_WIDTH_160; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ else if (bw == CHANNEL_WIDTH_5) -+ chdef->width = NL80211_CHAN_WIDTH_5; -+ else if (bw == CHANNEL_WIDTH_10) -+ chdef->width = NL80211_CHAN_WIDTH_10; -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) */ -+ else { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ chdef->chan = chan; -+ chdef->center_freq1 = cfreq; -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+#ifdef CONFIG_RTW_MESH -+static const char *nl80211_chan_width_str(enum nl80211_chan_width cwidth) -+{ -+ switch (cwidth) { -+ case NL80211_CHAN_WIDTH_20_NOHT: -+ return "20_NOHT"; -+ case NL80211_CHAN_WIDTH_20: -+ return "20"; -+ case NL80211_CHAN_WIDTH_40: -+ return "40"; -+ case NL80211_CHAN_WIDTH_80: -+ return "80"; -+ case NL80211_CHAN_WIDTH_80P80: -+ return "80+80"; -+ case NL80211_CHAN_WIDTH_160: -+ return "160"; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ case NL80211_CHAN_WIDTH_5: -+ return "5"; -+ case NL80211_CHAN_WIDTH_10: -+ return "10"; -+#endif -+ default: -+ return "INVALID"; -+ }; -+} -+ -+static void rtw_get_chbw_from_cfg80211_chan_def(struct cfg80211_chan_def *chdef, u8 *ht, u8 *ch, u8 *bw, u8 *offset) -+{ -+ int pri_freq; -+ struct ieee80211_channel *chan = chdef->chan; -+ -+ pri_freq = rtw_ch2freq(chan->hw_value); -+ if (!pri_freq) { -+ RTW_INFO("invalid channel:%d\n", chan->hw_value); -+ rtw_warn_on(1); -+ *ch = 0; -+ return; -+ } -+ -+ switch (chdef->width) { -+ case NL80211_CHAN_WIDTH_20_NOHT: -+ *ht = 0; -+ *bw = CHANNEL_WIDTH_20; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ *ch = chan->hw_value; -+ break; -+ case NL80211_CHAN_WIDTH_20: -+ *ht = 1; -+ *bw = CHANNEL_WIDTH_20; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ *ch = chan->hw_value; -+ break; -+ case NL80211_CHAN_WIDTH_40: -+ *ht = 1; -+ *bw = CHANNEL_WIDTH_40; -+ *offset = pri_freq > chdef->center_freq1 ? HAL_PRIME_CHNL_OFFSET_UPPER : HAL_PRIME_CHNL_OFFSET_LOWER; -+ if (rtw_get_offset_by_chbw(chan->hw_value, *bw, offset)) -+ *ch = chan->hw_value; -+ break; -+ case NL80211_CHAN_WIDTH_80: -+ *ht = 1; -+ *bw = CHANNEL_WIDTH_80; -+ if (rtw_get_offset_by_chbw(chan->hw_value, *bw, offset)) -+ *ch = chan->hw_value; -+ break; -+ case NL80211_CHAN_WIDTH_160: -+ *ht = 1; -+ *bw = CHANNEL_WIDTH_160; -+ if (rtw_get_offset_by_chbw(chan->hw_value, *bw, offset)) -+ *ch = chan->hw_value; -+ break; -+ case NL80211_CHAN_WIDTH_80P80: -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ case NL80211_CHAN_WIDTH_5: -+ case NL80211_CHAN_WIDTH_10: -+ #endif -+ default: -+ *ht = 0; -+ *bw = CHANNEL_WIDTH_20; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ RTW_INFO("unsupported cwidth:%s\n", nl80211_chan_width_str(chdef->width)); -+ rtw_warn_on(1); -+ }; -+} -+#endif /* CONFIG_RTW_MESH */ -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+static const char *nl80211_channel_type_str(enum nl80211_channel_type ctype) -+{ -+ switch (ctype) { -+ case NL80211_CHAN_NO_HT: -+ return "NO_HT"; -+ case NL80211_CHAN_HT20: -+ return "HT20"; -+ case NL80211_CHAN_HT40MINUS: -+ return "HT40-"; -+ case NL80211_CHAN_HT40PLUS: -+ return "HT40+"; -+ default: -+ return "INVALID"; -+ }; -+} -+ -+static enum nl80211_channel_type rtw_chbw_to_nl80211_channel_type(u8 ch, u8 bw, u8 offset, u8 ht) -+{ -+ rtw_warn_on(!ht && (bw >= CHANNEL_WIDTH_40 || offset != HAL_PRIME_CHNL_OFFSET_DONT_CARE)); -+ -+ if (!ht) -+ return NL80211_CHAN_NO_HT; -+ if (bw >= CHANNEL_WIDTH_40) { -+ if (offset == HAL_PRIME_CHNL_OFFSET_UPPER) -+ return NL80211_CHAN_HT40MINUS; -+ else if (offset == HAL_PRIME_CHNL_OFFSET_LOWER) -+ return NL80211_CHAN_HT40PLUS; -+ else -+ rtw_warn_on(1); -+ } -+ return NL80211_CHAN_HT20; -+} -+ -+static void rtw_get_chbw_from_nl80211_channel_type(struct ieee80211_channel *chan, enum nl80211_channel_type ctype, u8 *ht, u8 *ch, u8 *bw, u8 *offset) -+{ -+ int pri_freq; -+ -+ pri_freq = rtw_ch2freq(chan->hw_value); -+ if (!pri_freq) { -+ RTW_INFO("invalid channel:%d\n", chan->hw_value); -+ rtw_warn_on(1); -+ *ch = 0; -+ return; -+ } -+ *ch = chan->hw_value; -+ -+ switch (ctype) { -+ case NL80211_CHAN_NO_HT: -+ *ht = 0; -+ *bw = CHANNEL_WIDTH_20; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case NL80211_CHAN_HT20: -+ *ht = 1; -+ *bw = CHANNEL_WIDTH_20; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case NL80211_CHAN_HT40MINUS: -+ *ht = 1; -+ *bw = CHANNEL_WIDTH_40; -+ *offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ case NL80211_CHAN_HT40PLUS: -+ *ht = 1; -+ *bw = CHANNEL_WIDTH_40; -+ *offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ default: -+ *ht = 0; -+ *bw = CHANNEL_WIDTH_20; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ RTW_INFO("unsupported ctype:%s\n", nl80211_channel_type_str(ctype)); -+ rtw_warn_on(1); -+ }; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) */ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+bool rtw_cfg80211_allow_ch_switch_notify(_adapter *adapter) -+{ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)) -+ if ((!MLME_IS_AP(adapter)) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0)) -+ && (!MLME_IS_ADHOC(adapter)) -+ && (!MLME_IS_ADHOC_MASTER(adapter)) -+ && (!MLME_IS_MESH(adapter)) -+#elif defined(CONFIG_RTW_MESH) -+ && (!MLME_IS_MESH(adapter)) -+#endif -+ ) -+ return 0; -+#endif -+ return 1; -+} -+ -+u8 rtw_cfg80211_ch_switch_notify(_adapter *adapter, u8 ch, u8 bw, u8 offset, -+ u8 ht, bool started) -+{ -+ struct wiphy *wiphy = adapter_to_wiphy(adapter); -+ u8 ret = _SUCCESS; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ struct cfg80211_chan_def chdef; -+ -+ ret = rtw_chbw_to_cfg80211_chan_def(wiphy, &chdef, ch, bw, offset, ht); -+ if (ret != _SUCCESS) -+ goto exit; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) -+ if (started) { -+ cfg80211_ch_switch_started_notify(adapter->pnetdev, &chdef, 0, false); -+ goto exit; -+ } -+#endif -+ -+ if (!rtw_cfg80211_allow_ch_switch_notify(adapter)) -+ goto exit; -+ -+ cfg80211_ch_switch_notify(adapter->pnetdev, &chdef); -+ -+#else -+ int freq = rtw_ch2freq(ch); -+ enum nl80211_channel_type ctype; -+ -+ if (!rtw_cfg80211_allow_ch_switch_notify(adapter)) -+ goto exit; -+ -+ if (!freq) { -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ ctype = rtw_chbw_to_nl80211_channel_type(ch, bw, offset, ht); -+ cfg80211_ch_switch_notify(adapter->pnetdev, freq, ctype); -+#endif -+ -+exit: -+ return ret; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) */ -+ -+void rtw_2g_channels_init(struct ieee80211_channel *channels) -+{ -+ _rtw_memcpy((void *)channels, (void *)rtw_2ghz_channels, sizeof(rtw_2ghz_channels)); -+} -+ -+void rtw_5g_channels_init(struct ieee80211_channel *channels) -+{ -+ _rtw_memcpy((void *)channels, (void *)rtw_5ghz_a_channels, sizeof(rtw_5ghz_a_channels)); -+} -+ -+void rtw_2g_rates_init(struct ieee80211_rate *rates) -+{ -+ _rtw_memcpy(rates, rtw_g_rates, -+ sizeof(struct ieee80211_rate) * RTW_G_RATES_NUM -+ ); -+} -+ -+void rtw_5g_rates_init(struct ieee80211_rate *rates) -+{ -+ _rtw_memcpy(rates, rtw_a_rates, -+ sizeof(struct ieee80211_rate) * RTW_A_RATES_NUM -+ ); -+} -+ -+struct ieee80211_supported_band *rtw_spt_band_alloc(BAND_TYPE band) -+{ -+ struct ieee80211_supported_band *spt_band = NULL; -+ int n_channels, n_bitrates; -+ -+ if (band == BAND_ON_2_4G) { -+ n_channels = MAX_CHANNEL_NUM_2G; -+ n_bitrates = RTW_G_RATES_NUM; -+ } else if (band == BAND_ON_5G) { -+ n_channels = MAX_CHANNEL_NUM_5G; -+ n_bitrates = RTW_A_RATES_NUM; -+ } else -+ goto exit; -+ -+ spt_band = (struct ieee80211_supported_band *)rtw_zmalloc( -+ sizeof(struct ieee80211_supported_band) -+ + sizeof(struct ieee80211_channel) * n_channels -+ + sizeof(struct ieee80211_rate) * n_bitrates -+ ); -+ if (!spt_band) -+ goto exit; -+ -+ spt_band->channels = (struct ieee80211_channel *)(((u8 *)spt_band) + sizeof(struct ieee80211_supported_band)); -+ spt_band->bitrates = (struct ieee80211_rate *)(((u8 *)spt_band->channels) + sizeof(struct ieee80211_channel) * n_channels); -+ spt_band->band = rtw_band_to_nl80211_band(band); -+ spt_band->n_channels = n_channels; -+ spt_band->n_bitrates = n_bitrates; -+ -+exit: -+ return spt_band; -+} -+ -+void rtw_spt_band_free(struct ieee80211_supported_band *spt_band) -+{ -+ u32 size = 0; -+ -+ if (!spt_band) -+ return; -+ -+ if (spt_band->band == NL80211_BAND_2GHZ) { -+ size = sizeof(struct ieee80211_supported_band) -+ + sizeof(struct ieee80211_channel) * MAX_CHANNEL_NUM_2G -+ + sizeof(struct ieee80211_rate) * RTW_G_RATES_NUM; -+ } else if (spt_band->band == NL80211_BAND_5GHZ) { -+ size = sizeof(struct ieee80211_supported_band) -+ + sizeof(struct ieee80211_channel) * MAX_CHANNEL_NUM_5G -+ + sizeof(struct ieee80211_rate) * RTW_A_RATES_NUM; -+ } else { -+ -+ } -+ rtw_mfree((u8 *)spt_band, size); -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+static const struct ieee80211_txrx_stypes -+ rtw_cfg80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = { -+ [NL80211_IFTYPE_ADHOC] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) -+ }, -+ [NL80211_IFTYPE_STATION] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | -+ BIT(IEEE80211_STYPE_AUTH >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) -+ }, -+ [NL80211_IFTYPE_AP] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | -+ BIT(IEEE80211_STYPE_DISASSOC >> 4) | -+ BIT(IEEE80211_STYPE_AUTH >> 4) | -+ BIT(IEEE80211_STYPE_DEAUTH >> 4) | -+ BIT(IEEE80211_STYPE_ACTION >> 4) -+ }, -+ [NL80211_IFTYPE_AP_VLAN] = { -+ /* copy AP */ -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | -+ BIT(IEEE80211_STYPE_DISASSOC >> 4) | -+ BIT(IEEE80211_STYPE_AUTH >> 4) | -+ BIT(IEEE80211_STYPE_DEAUTH >> 4) | -+ BIT(IEEE80211_STYPE_ACTION >> 4) -+ }, -+ [NL80211_IFTYPE_P2P_CLIENT] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) -+ }, -+ [NL80211_IFTYPE_P2P_GO] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | -+ BIT(IEEE80211_STYPE_DISASSOC >> 4) | -+ BIT(IEEE80211_STYPE_AUTH >> 4) | -+ BIT(IEEE80211_STYPE_DEAUTH >> 4) | -+ BIT(IEEE80211_STYPE_ACTION >> 4) -+ }, -+#if defined(RTW_DEDICATED_P2P_DEVICE) -+ [NL80211_IFTYPE_P2P_DEVICE] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | -+ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) -+ }, -+#endif -+#if defined(CONFIG_RTW_MESH) -+ [NL80211_IFTYPE_MESH_POINT] = { -+ .tx = 0xffff, -+ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) -+ | BIT(IEEE80211_STYPE_AUTH >> 4) -+ }, -+#endif -+ -+}; -+#endif -+ -+NDIS_802_11_NETWORK_INFRASTRUCTURE nl80211_iftype_to_rtw_network_type(enum nl80211_iftype type) -+{ -+ switch (type) { -+ case NL80211_IFTYPE_ADHOC: -+ return Ndis802_11IBSS; -+ -+ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ case NL80211_IFTYPE_P2P_CLIENT: -+ #endif -+ case NL80211_IFTYPE_STATION: -+ return Ndis802_11Infrastructure; -+ -+#ifdef CONFIG_AP_MODE -+ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ case NL80211_IFTYPE_P2P_GO: -+ #endif -+ case NL80211_IFTYPE_AP: -+ return Ndis802_11APMode; -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+ case NL80211_IFTYPE_MESH_POINT: -+ return Ndis802_11_mesh; -+#endif -+ -+#ifdef CONFIG_WIFI_MONITOR -+ case NL80211_IFTYPE_MONITOR: -+ return Ndis802_11Monitor; -+#endif /* CONFIG_WIFI_MONITOR */ -+ -+ default: -+ return Ndis802_11InfrastructureMax; -+ } -+} -+ -+u32 nl80211_iftype_to_rtw_mlme_state(enum nl80211_iftype type) -+{ -+ switch (type) { -+ case NL80211_IFTYPE_ADHOC: -+ return WIFI_ADHOC_STATE; -+ -+ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ case NL80211_IFTYPE_P2P_CLIENT: -+ #endif -+ case NL80211_IFTYPE_STATION: -+ return WIFI_STATION_STATE; -+ -+#ifdef CONFIG_AP_MODE -+ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ case NL80211_IFTYPE_P2P_GO: -+ #endif -+ case NL80211_IFTYPE_AP: -+ return WIFI_AP_STATE; -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+ case NL80211_IFTYPE_MESH_POINT: -+ return WIFI_MESH_STATE; -+#endif -+ -+ case NL80211_IFTYPE_MONITOR: -+ return WIFI_MONITOR_STATE; -+ -+ default: -+ return WIFI_NULL_STATE; -+ } -+} -+ -+static int rtw_cfg80211_sync_iftype(_adapter *adapter) -+{ -+ struct wireless_dev *rtw_wdev = adapter->rtw_wdev; -+ -+ if (!(nl80211_iftype_to_rtw_mlme_state(rtw_wdev->iftype) & MLME_STATE(adapter))) { -+ /* iftype and mlme state is not syc */ -+ NDIS_802_11_NETWORK_INFRASTRUCTURE network_type; -+ -+ network_type = nl80211_iftype_to_rtw_network_type(rtw_wdev->iftype); -+ if (network_type != Ndis802_11InfrastructureMax) { -+ if (rtw_pwr_wakeup(adapter) == _FAIL) { -+ RTW_WARN(FUNC_ADPT_FMT" call rtw_pwr_wakeup fail\n", FUNC_ADPT_ARG(adapter)); -+ return _FAIL; -+ } -+ -+ rtw_set_802_11_infrastructure_mode(adapter, network_type, 0); -+ rtw_setopmode_cmd(adapter, network_type, RTW_CMDF_WAIT_ACK); -+ } else { -+ rtw_warn_on(1); -+ RTW_WARN(FUNC_ADPT_FMT" iftype:%u is not support\n", FUNC_ADPT_ARG(adapter), rtw_wdev->iftype); -+ return _FAIL; -+ } -+ } -+ -+ return _SUCCESS; -+} -+ -+static u64 rtw_get_systime_us(void) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0)) -+ return ktime_to_us(ktime_get_boottime()); -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) -+ struct timespec ts; -+ get_monotonic_boottime(&ts); -+ return ((u64)ts.tv_sec * 1000000) + ts.tv_nsec / 1000; -+#else -+ struct timeval tv; -+ do_gettimeofday(&tv); -+ return ((u64)tv.tv_sec * 1000000) + tv.tv_usec; -+#endif -+} -+ -+/* Try to remove non target BSS's SR to reduce PBC overlap rate */ -+static int rtw_cfg80211_clear_wps_sr_of_non_target_bss(_adapter *padapter, struct wlan_network *pnetwork, struct cfg80211_ssid *req_ssid) -+{ -+ int ret = 0; -+ u8 *psr = NULL, sr = 0; -+ NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid; -+ u32 wpsielen = 0; -+ u8 *wpsie = NULL; -+ -+ if (pssid->SsidLength == req_ssid->ssid_len -+ && _rtw_memcmp(pssid->Ssid, req_ssid->ssid, req_ssid->ssid_len) == _TRUE) -+ goto exit; -+ -+ wpsie = rtw_get_wps_ie(pnetwork->network.IEs + _FIXED_IE_LENGTH_ -+ , pnetwork->network.IELength - _FIXED_IE_LENGTH_, NULL, &wpsielen); -+ if (wpsie && wpsielen > 0) -+ psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, &sr, NULL); -+ -+ if (psr && sr) { -+ if (0) -+ RTW_INFO("clear sr of non target bss:%s("MAC_FMT")\n" -+ , pssid->Ssid, MAC_ARG(pnetwork->network.MacAddress)); -+ *psr = 0; /* clear sr */ -+ ret = 1; -+ } -+ -+exit: -+ return ret; -+} -+ -+#define MAX_BSSINFO_LEN 1000 -+struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) -+{ -+ struct ieee80211_channel *notify_channel; -+ struct cfg80211_bss *bss = NULL; -+ /* struct ieee80211_supported_band *band; */ -+ u16 channel; -+ u32 freq; -+ u64 notify_timestamp; -+ u16 notify_capability; -+ u16 notify_interval; -+ u8 *notify_ie; -+ size_t notify_ielen; -+ s32 notify_signal; -+ /* u8 buf[MAX_BSSINFO_LEN]; */ -+ -+ u8 *pbuf; -+ size_t buf_size = MAX_BSSINFO_LEN; -+ size_t len, bssinf_len = 0; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ -+ struct wireless_dev *wdev = padapter->rtw_wdev; -+ struct wiphy *wiphy = wdev->wiphy; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ pbuf = rtw_zmalloc(buf_size); -+ if (pbuf == NULL) { -+ RTW_INFO("%s pbuf allocate failed !!\n", __FUNCTION__); -+ return bss; -+ } -+ -+ /* RTW_INFO("%s\n", __func__); */ -+ -+ bssinf_len = pnetwork->network.IELength + sizeof(struct rtw_ieee80211_hdr_3addr); -+ if (bssinf_len > buf_size) { -+ RTW_INFO("%s IE Length too long > %zu byte\n", __FUNCTION__, buf_size); -+ goto exit; -+ } -+ -+#ifndef CONFIG_WAPI_SUPPORT -+ { -+ u16 wapi_len = 0; -+ -+ if (rtw_get_wapi_ie(pnetwork->network.IEs, pnetwork->network.IELength, NULL, &wapi_len) > 0) { -+ if (wapi_len > 0) { -+ RTW_INFO("%s, no support wapi!\n", __FUNCTION__); -+ goto exit; -+ } -+ } -+ } -+#endif /* !CONFIG_WAPI_SUPPORT */ -+ -+ channel = pnetwork->network.Configuration.DSConfig; -+ freq = rtw_ch2freq(channel); -+ notify_channel = ieee80211_get_channel(wiphy, freq); -+ -+ if (0) -+ notify_timestamp = le64_to_cpu(*(u64 *)rtw_get_timestampe_from_ie(pnetwork->network.IEs)); -+ else -+ notify_timestamp = rtw_get_systime_us(); -+ -+ notify_interval = le16_to_cpu(*(u16 *)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); -+ notify_capability = le16_to_cpu(*(u16 *)rtw_get_capability_from_ie(pnetwork->network.IEs)); -+ -+ notify_ie = pnetwork->network.IEs + _FIXED_IE_LENGTH_; -+ notify_ielen = pnetwork->network.IELength - _FIXED_IE_LENGTH_; -+ -+ /* We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE && -+ is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { -+ notify_signal = 100 * translate_percentage_to_dbm(padapter->recvpriv.signal_strength); /* dbm */ -+ } else { -+ notify_signal = 100 * translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength); /* dbm */ -+ } -+ -+#if 0 -+ RTW_INFO("bssid: "MAC_FMT"\n", MAC_ARG(pnetwork->network.MacAddress)); -+ RTW_INFO("Channel: %d(%d)\n", channel, freq); -+ RTW_INFO("Capability: %X\n", notify_capability); -+ RTW_INFO("Beacon interval: %d\n", notify_interval); -+ RTW_INFO("Signal: %d\n", notify_signal); -+ RTW_INFO("notify_timestamp: %llu\n", notify_timestamp); -+#endif -+ -+ /* pbuf = buf; */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pbuf; -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); -+ /* pmlmeext->mgnt_seq++; */ -+ -+ if (pnetwork->network.Reserved[0] == BSS_TYPE_BCN) { /* WIFI_BEACON */ -+ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); -+ set_frame_sub_type(pbuf, WIFI_BEACON); -+ } else { -+ _rtw_memcpy(pwlanhdr->addr1, adapter_mac_addr(padapter), ETH_ALEN); -+ set_frame_sub_type(pbuf, WIFI_PROBERSP); -+ } -+ -+ _rtw_memcpy(pwlanhdr->addr2, pnetwork->network.MacAddress, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pnetwork->network.MacAddress, ETH_ALEN); -+ -+ -+ /* pbuf += sizeof(struct rtw_ieee80211_hdr_3addr); */ -+ len = sizeof(struct rtw_ieee80211_hdr_3addr); -+ _rtw_memcpy((pbuf + len), pnetwork->network.IEs, pnetwork->network.IELength); -+ *((u64 *)(pbuf + len)) = cpu_to_le64(notify_timestamp); -+ -+ len += pnetwork->network.IELength; -+ -+ #if defined(CONFIG_P2P) && 0 -+ if(rtw_get_p2p_ie(pnetwork->network.IEs+12, pnetwork->network.IELength-12, NULL, NULL)) -+ RTW_INFO("%s, got p2p_ie\n", __func__); -+ #endif -+ -+#if 1 -+ bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)pbuf, -+ len, notify_signal, GFP_ATOMIC); -+#else -+ -+ bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)pnetwork->network.MacAddress, -+ notify_timestamp, notify_capability, notify_interval, notify_ie, -+ notify_ielen, notify_signal, GFP_ATOMIC/*GFP_KERNEL*/); -+#endif -+ -+ if (unlikely(!bss)) { -+ RTW_INFO(FUNC_ADPT_FMT" bss NULL\n", FUNC_ADPT_ARG(padapter)); -+ goto exit; -+ } -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 38)) -+#ifndef COMPAT_KERNEL_RELEASE -+ /* patch for cfg80211, update beacon ies to information_elements */ -+ if (pnetwork->network.Reserved[0] == BSS_TYPE_BCN) { /* WIFI_BEACON */ -+ -+ if (bss->len_information_elements != bss->len_beacon_ies) { -+ bss->information_elements = bss->beacon_ies; -+ bss->len_information_elements = bss->len_beacon_ies; -+ } -+ } -+#endif /* COMPAT_KERNEL_RELEASE */ -+#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 38) */ -+ -+#if 0 -+ { -+ if (bss->information_elements == bss->proberesp_ies) { -+ if (bss->len_information_elements != bss->len_proberesp_ies) -+ RTW_INFO("error!, len_information_elements != bss->len_proberesp_ies\n"); -+ } else if (bss->len_information_elements < bss->len_beacon_ies) { -+ bss->information_elements = bss->beacon_ies; -+ bss->len_information_elements = bss->len_beacon_ies; -+ } -+ } -+#endif -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) -+ cfg80211_put_bss(wiphy, bss); -+#else -+ cfg80211_put_bss(bss); -+#endif -+ -+exit: -+ if (pbuf) -+ rtw_mfree(pbuf, buf_size); -+ return bss; -+ -+} -+ -+/* -+ Check the given bss is valid by kernel API cfg80211_get_bss() -+ @padapter : the given adapter -+ -+ return _TRUE if bss is valid, _FALSE for not found. -+*/ -+int rtw_cfg80211_check_bss(_adapter *padapter) -+{ -+ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); -+ struct cfg80211_bss *bss = NULL; -+ struct ieee80211_channel *notify_channel = NULL; -+ u32 freq; -+ -+ if (!(pnetwork) || !(padapter->rtw_wdev)) -+ return _FALSE; -+ -+ freq = rtw_ch2freq(pnetwork->Configuration.DSConfig); -+ notify_channel = ieee80211_get_channel(padapter->rtw_wdev->wiphy, freq); -+ bss = cfg80211_get_bss(padapter->rtw_wdev->wiphy, notify_channel, -+ pnetwork->MacAddress, pnetwork->Ssid.Ssid, -+ pnetwork->Ssid.SsidLength, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0) -+ pnetwork->InfrastructureMode == Ndis802_11Infrastructure?IEEE80211_BSS_TYPE_ESS:IEEE80211_BSS_TYPE_IBSS, -+ IEEE80211_PRIVACY(pnetwork->Privacy)); -+#else -+ pnetwork->InfrastructureMode == Ndis802_11Infrastructure?WLAN_CAPABILITY_ESS:WLAN_CAPABILITY_IBSS, pnetwork->InfrastructureMode == Ndis802_11Infrastructure?WLAN_CAPABILITY_ESS:WLAN_CAPABILITY_IBSS); -+#endif -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) -+ cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); -+#else -+ cfg80211_put_bss(bss); -+#endif -+ -+ return bss != NULL; -+} -+ -+void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) -+ struct wiphy *wiphy = pwdev->wiphy; -+ int freq = 2412; -+ struct ieee80211_channel *notify_channel; -+#endif -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ if (pwdev->iftype != NL80211_IFTYPE_ADHOC) -+ return; -+ -+ if (!rtw_cfg80211_check_bss(padapter)) { -+ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); -+ struct wlan_network *scanned = pmlmepriv->cur_network_scanned; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { -+ -+ _rtw_memcpy(&cur_network->network, pnetwork, sizeof(WLAN_BSSID_EX)); -+ if (cur_network) { -+ if (!rtw_cfg80211_inform_bss(padapter, cur_network)) -+ RTW_INFO(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); -+ } else { -+ RTW_INFO("cur_network is not exist!!!\n"); -+ return ; -+ } -+ } else { -+ if (scanned == NULL) -+ rtw_warn_on(1); -+ -+ if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE -+ && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE -+ ) { -+ if (!rtw_cfg80211_inform_bss(padapter, scanned)) -+ RTW_INFO(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); -+ else { -+ /* RTW_INFO(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); */ -+ } -+ } else { -+ RTW_INFO("scanned & pnetwork compare fail\n"); -+ rtw_warn_on(1); -+ } -+ } -+ -+ if (!rtw_cfg80211_check_bss(padapter)) -+ RTW_PRINT(FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); -+ } -+ /* notify cfg80211 that device joined an IBSS */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) -+ freq = rtw_ch2freq(cur_network->network.Configuration.DSConfig); -+ if (1) -+ RTW_INFO("chan: %d, freq: %d\n", cur_network->network.Configuration.DSConfig, freq); -+ notify_channel = ieee80211_get_channel(wiphy, freq); -+ cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, notify_channel, GFP_ATOMIC); -+#else -+ cfg80211_ibss_joined(padapter->pnetdev, cur_network->network.MacAddress, GFP_ATOMIC); -+#endif -+} -+ -+void rtw_cfg80211_indicate_connect(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ _irqL irqL; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) -+ struct cfg80211_roam_info roam_info ={}; -+#endif -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ if (pwdev->iftype != NL80211_IFTYPE_STATION -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT -+ #endif -+ ) -+ return; -+ -+ if (!MLME_IS_STA(padapter)) -+ return; -+ -+#ifdef CONFIG_P2P -+ if (pwdinfo->driver_interface == DRIVER_CFG80211) { -+ #if !RTW_P2P_GROUP_INTERFACE -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ RTW_INFO("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); -+ } -+ #endif -+ } -+#endif /* CONFIG_P2P */ -+ -+ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) != _TRUE) { -+ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); -+ struct wlan_network *scanned = pmlmepriv->cur_network_scanned; -+ -+ /* RTW_INFO(FUNC_ADPT_FMT" BSS not found\n", FUNC_ADPT_ARG(padapter)); */ -+ -+ if (scanned == NULL) { -+ rtw_warn_on(1); -+ goto check_bss; -+ } -+ -+ if (_rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE -+ && _rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE -+ ) { -+ if (!rtw_cfg80211_inform_bss(padapter, scanned)) -+ RTW_INFO(FUNC_ADPT_FMT" inform fail !!\n", FUNC_ADPT_ARG(padapter)); -+ else { -+ /* RTW_INFO(FUNC_ADPT_FMT" inform success !!\n", FUNC_ADPT_ARG(padapter)); */ -+ } -+ } else { -+ RTW_INFO("scanned: %s("MAC_FMT"), cur: %s("MAC_FMT")\n", -+ scanned->network.Ssid.Ssid, MAC_ARG(scanned->network.MacAddress), -+ pnetwork->Ssid.Ssid, MAC_ARG(pnetwork->MacAddress) -+ ); -+ rtw_warn_on(1); -+ } -+ } -+ -+check_bss: -+ if (!rtw_cfg80211_check_bss(padapter)) -+ RTW_PRINT(FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter)); -+ -+ _enter_critical_bh(&pwdev_priv->connect_req_lock, &irqL); -+ -+ if (rtw_to_roam(padapter) > 0) { -+ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) -+ struct wiphy *wiphy = pwdev->wiphy; -+ struct ieee80211_channel *notify_channel; -+ u32 freq; -+ u16 channel = cur_network->network.Configuration.DSConfig; -+ -+ freq = rtw_ch2freq(channel); -+ notify_channel = ieee80211_get_channel(wiphy, freq); -+ #endif -+ -+ #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) -+ roam_info.bssid = cur_network->network.MacAddress; -+ roam_info.req_ie = pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2; -+ roam_info.req_ie_len = pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2; -+ roam_info.resp_ie = pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6; -+ roam_info.resp_ie_len = pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6; -+ -+ cfg80211_roamed(padapter->pnetdev, &roam_info, GFP_ATOMIC); -+ #else -+ cfg80211_roamed(padapter->pnetdev -+ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) -+ , notify_channel -+ #endif -+ , cur_network->network.MacAddress -+ , pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2 -+ , pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2 -+ , pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6 -+ , pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6 -+ , GFP_ATOMIC); -+ #endif /*LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0)*/ -+ -+ RTW_INFO(FUNC_ADPT_FMT" call cfg80211_roamed\n", FUNC_ADPT_ARG(padapter)); -+ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_roam(padapter)) -+ rtw_ft_set_status(padapter, RTW_FT_ASSOCIATED_STA); -+#endif -+ } else { -+ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) -+ RTW_INFO("pwdev->sme_state(b)=%d\n", pwdev->sme_state); -+ #endif -+ -+ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) != _TRUE) -+ rtw_cfg80211_connect_result(pwdev, cur_network->network.MacAddress -+ , pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2 -+ , pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2 -+ , pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6 -+ , pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6 -+ , WLAN_STATUS_SUCCESS, GFP_ATOMIC); -+ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) -+ RTW_INFO("pwdev->sme_state(a)=%d\n", pwdev->sme_state); -+ #endif -+ } -+ -+ rtw_wdev_free_connect_req(pwdev_priv); -+ -+ _exit_critical_bh(&pwdev_priv->connect_req_lock, &irqL); -+} -+ -+void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated) -+{ -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ _irqL irqL; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif -+ -+ RTW_INFO(FUNC_ADPT_FMT" ,reason = %d\n", FUNC_ADPT_ARG(padapter), reason); -+ -+ /*always replace privated definitions with wifi reserved value 0*/ -+ if (WLAN_REASON_IS_PRIVATE(reason)) -+ reason = 0; -+ -+ if (pwdev->iftype != NL80211_IFTYPE_STATION -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT -+ #endif -+ ) -+ return; -+ -+ if (!MLME_IS_STA(padapter)) -+ return; -+ -+#ifdef CONFIG_P2P -+ if (pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -+ -+ #if RTW_P2P_GROUP_INTERFACE -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ if (pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT) -+ #endif -+ #endif -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ -+ RTW_INFO("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); -+ } -+ } -+#endif /* CONFIG_P2P */ -+ -+ _enter_critical_bh(&pwdev_priv->connect_req_lock, &irqL); -+ -+ if (padapter->ndev_unregistering || !rtw_wdev_not_indic_disco(pwdev_priv)) { -+ #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) -+ RTW_INFO("pwdev->sme_state(b)=%d\n", pwdev->sme_state); -+ -+ if (pwdev->sme_state == CFG80211_SME_CONNECTING) { -+ RTW_INFO(FUNC_ADPT_FMT" call cfg80211_connect_result, reason:%d\n", FUNC_ADPT_ARG(padapter), reason); -+ rtw_cfg80211_connect_result(pwdev, NULL, NULL, 0, NULL, 0, -+ reason?reason:WLAN_STATUS_UNSPECIFIED_FAILURE, -+ GFP_ATOMIC); -+ } else if (pwdev->sme_state == CFG80211_SME_CONNECTED) { -+ RTW_INFO(FUNC_ADPT_FMT" call cfg80211_disconnected, reason:%d\n", FUNC_ADPT_ARG(padapter), reason); -+ rtw_cfg80211_disconnected(pwdev, reason, NULL, 0, locally_generated, GFP_ATOMIC); -+ } -+ -+ RTW_INFO("pwdev->sme_state(a)=%d\n", pwdev->sme_state); -+ #else -+ if (pwdev_priv->connect_req) { -+ RTW_INFO(FUNC_ADPT_FMT" call cfg80211_connect_result, reason:%d\n", FUNC_ADPT_ARG(padapter), reason); -+ rtw_cfg80211_connect_result(pwdev, NULL, NULL, 0, NULL, 0, -+ reason?reason:WLAN_STATUS_UNSPECIFIED_FAILURE, -+ GFP_ATOMIC); -+ } else { -+ RTW_INFO(FUNC_ADPT_FMT" call cfg80211_disconnected, reason:%d\n", FUNC_ADPT_ARG(padapter), reason); -+ rtw_cfg80211_disconnected(pwdev, reason, NULL, 0, locally_generated, GFP_ATOMIC); -+ } -+ #endif -+ } -+ -+ rtw_wdev_free_connect_req(pwdev_priv); -+ -+ _exit_critical_bh(&pwdev_priv->connect_req_lock, &irqL); -+} -+ -+ -+#ifdef CONFIG_AP_MODE -+static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param) -+{ -+ int ret = 0; -+ u32 wep_key_idx, wep_key_len; -+ struct sta_info *psta = NULL, *pbcmc_sta = NULL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ param->u.crypt.err = 0; -+ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; -+ -+ if (is_broadcast_mac_addr(param->sta_addr)) { -+ if (param->u.crypt.idx >= WEP_KEYS -+ #ifdef CONFIG_IEEE80211W -+ && param->u.crypt.idx > BIP_MAX_KEYID -+ #endif -+ ) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } else { -+ psta = rtw_get_stainfo(pstapriv, param->sta_addr); -+ if (!psta) { -+ ret = -EINVAL; -+ RTW_INFO(FUNC_ADPT_FMT", sta "MAC_FMT" not found\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(param->sta_addr)); -+ goto exit; -+ } -+ } -+ -+ if (strcmp(param->u.crypt.alg, "none") == 0 && (psta == NULL)) { -+ /* todo:clear default encryption keys */ -+ -+ RTW_INFO("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); -+ -+ goto exit; -+ } -+ -+ -+ if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta == NULL)) { -+ RTW_INFO("r871x_set_encryption, crypt.alg = WEP\n"); -+ -+ wep_key_idx = param->u.crypt.idx; -+ wep_key_len = param->u.crypt.key_len; -+ -+ RTW_INFO("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); -+ -+ if ((wep_key_idx >= WEP_KEYS) || (wep_key_len <= 0)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (wep_key_len > 0) -+ wep_key_len = wep_key_len <= 5 ? 5 : 13; -+ -+ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) { -+ /* wep default key has not been set, so use this key index as default key. */ -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; -+ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ -+ if (wep_key_len == 13) { -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ } -+ -+ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; -+ } -+ -+ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); -+ -+ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; -+ -+ rtw_ap_set_wep_key(padapter, param->u.crypt.key, wep_key_len, wep_key_idx, 1); -+ -+ goto exit; -+ -+ } -+ -+ if (!psta) { /* group key */ -+ if (param->u.crypt.set_tx == 0) { /* group key, TX only */ -+ if (strcmp(param->u.crypt.alg, "WEP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set WEP TX GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ if (param->u.crypt.key_len == 13) -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ -+ } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set TKIP TX GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ /* set mic key */ -+ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); -+ psecuritypriv->busetkipkey = _TRUE; -+ -+ } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set CCMP TX GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ psecuritypriv->dot118021XGrpPrivacy = _AES_; -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ -+ } else if (strcmp(param->u.crypt.alg, "GCMP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set GCMP TX GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ psecuritypriv->dot118021XGrpPrivacy = _GCMP_; -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ -+ } else if (strcmp(param->u.crypt.alg, "GCMP_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set GCMP_256 TX GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ psecuritypriv->dot118021XGrpPrivacy = _GCMP_256_; -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 32 ? 32 : param->u.crypt.key_len)); -+ -+ } else if (strcmp(param->u.crypt.alg, "CCMP_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set CCMP_256 TX GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ psecuritypriv->dot118021XGrpPrivacy = _CCMP_256_; -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 32 ? 32: param->u.crypt.key_len)); -+ -+ #ifdef CONFIG_IEEE80211W -+ } else if (strcmp(param->u.crypt.alg, "BIP") == 0) { -+ psecuritypriv->dot11wCipher = _BIP_CMAC_128_; -+ RTW_INFO(FUNC_ADPT_FMT" set TX CMAC-128 IGTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; -+ psecuritypriv->dot11wBIPtxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ padapter->securitypriv.binstallBIPkey = _TRUE; -+ goto exit; -+ } else if (strcmp(param->u.crypt.alg, "BIP_GMAC_128") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set TX GMAC-128 IGTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ psecuritypriv->dot11wCipher = _BIP_GMAC_128_; -+ _rtw_memcpy(psecuritypriv->dot11wBIPKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, param->u.crypt.key_len); -+ psecuritypriv->dot11wBIPKeyid = param->u.crypt.idx; -+ psecuritypriv->dot11wBIPtxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psecuritypriv->binstallBIPkey = _TRUE; -+ goto exit; -+ } else if (strcmp(param->u.crypt.alg, "BIP_GMAC_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set TX GMAC-256 IGTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ psecuritypriv->dot11wCipher = _BIP_GMAC_256_; -+ _rtw_memcpy(psecuritypriv->dot11wBIPKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, param->u.crypt.key_len); -+ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; -+ psecuritypriv->dot11wBIPtxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ padapter->securitypriv.binstallBIPkey = _TRUE; -+ goto exit; -+ } else if (strcmp(param->u.crypt.alg, "BIP_CMAC_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set TX CMAC-256 IGTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ psecuritypriv->dot11wCipher = _BIP_CMAC_256_; -+ _rtw_memcpy(psecuritypriv->dot11wBIPKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, param->u.crypt.key_len); -+ psecuritypriv->dot11wBIPKeyid = param->u.crypt.idx; -+ psecuritypriv->dot11wBIPtxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psecuritypriv->binstallBIPkey = _TRUE; -+ goto exit; -+ #endif /* CONFIG_IEEE80211W */ -+ -+ } else if (strcmp(param->u.crypt.alg, "none") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" clear group key, idx:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx); -+ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ } else { -+ RTW_WARN(FUNC_ADPT_FMT" set group key, not support\n" -+ , FUNC_ADPT_ARG(padapter)); -+ goto exit; -+ } -+ -+ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; -+ pbcmc_sta = rtw_get_bcmc_stainfo(padapter); -+ if (pbcmc_sta) { -+ pbcmc_sta->dot11txpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ pbcmc_sta->ieee8021x_blocked = _FALSE; -+ pbcmc_sta->dot118021XPrivacy = psecuritypriv->dot118021XGrpPrivacy; /* rx will use bmc_sta's dot118021XPrivacy */ -+ } -+ psecuritypriv->binstallGrpkey = _TRUE; -+ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;/* !!! */ -+ -+ rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); -+ } -+ -+ goto exit; -+ -+ } -+ -+ if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) { /* psk/802_1x */ -+ if (param->u.crypt.set_tx == 1) { -+ /* pairwise key */ -+ if (param->u.crypt.key_len == 32) -+ _rtw_memcpy(psta->dot118021x_UncstKey.skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 32 ? 32 : param->u.crypt.key_len)); -+ else -+ _rtw_memcpy(psta->dot118021x_UncstKey.skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ -+ if (strcmp(param->u.crypt.alg, "WEP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set WEP PTK of "MAC_FMT" idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot118021XPrivacy = _WEP40_; -+ if (param->u.crypt.key_len == 13) -+ psta->dot118021XPrivacy = _WEP104_; -+ -+ } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set TKIP PTK of "MAC_FMT" idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot118021XPrivacy = _TKIP_; -+ /* set mic key */ -+ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); -+ psecuritypriv->busetkipkey = _TRUE; -+ -+ } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set CCMP PTK of "MAC_FMT" idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot118021XPrivacy = _AES_; -+ -+ } else if (strcmp(param->u.crypt.alg, "GCMP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set GCMP PTK of "MAC_FMT" idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot118021XPrivacy = _GCMP_; -+ -+ } else if (strcmp(param->u.crypt.alg, "GCMP_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set GCMP_256 PTK of "MAC_FMT" idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot118021XPrivacy = _GCMP_256_; -+ -+ } else if (strcmp(param->u.crypt.alg, "CCMP_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set CCMP_256 PTK of "MAC_FMT" idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot118021XPrivacy = _CCMP_256_; -+ -+ } else if (strcmp(param->u.crypt.alg, "none") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" clear pairwise key of "MAC_FMT" idx:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx); -+ psta->dot118021XPrivacy = _NO_PRIVACY_; -+ } else { -+ RTW_WARN(FUNC_ADPT_FMT" set pairwise key of "MAC_FMT", not support\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)); -+ goto exit; -+ } -+ -+ psta->dot11txpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psta->dot11rxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psta->ieee8021x_blocked = _FALSE; -+ -+ if (psta->dot118021XPrivacy != _NO_PRIVACY_) { -+ psta->bpairwise_key_installed = _TRUE; -+ -+ /* WPA2 key-handshake has completed */ -+ if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) -+ psta->state &= (~WIFI_UNDER_KEY_HANDSHAKE); -+ } -+ -+ rtw_ap_set_pairwise_key(padapter, psta); -+ } else { -+ /* peer's group key, RX only */ -+ #ifdef CONFIG_RTW_MESH -+ if (strcmp(param->u.crypt.alg, "CCMP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set CCMP GTK of "MAC_FMT", idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->group_privacy = _AES_; -+ _rtw_memcpy(psta->gtk.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ psta->gtk_bmp |= BIT(param->u.crypt.idx); -+ psta->gtk_pn.val = RTW_GET_LE64(param->u.crypt.seq); -+ -+ } else if (strcmp(param->u.crypt.alg, "GCMP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set GCMP GTK of "MAC_FMT", idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->group_privacy = _GCMP_; -+ _rtw_memcpy(psta->gtk.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ psta->gtk_bmp |= BIT(param->u.crypt.idx); -+ psta->gtk_pn.val = RTW_GET_LE64(param->u.crypt.seq); -+ -+ } else if (strcmp(param->u.crypt.alg, "CCMP_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set CCMP_256 GTK of "MAC_FMT", idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->group_privacy = _CCMP_256_; -+ _rtw_memcpy(psta->gtk.skey, param->u.crypt.key, (param->u.crypt.key_len > 32 ? 32 : param->u.crypt.key_len)); -+ psta->gtk_bmp |= BIT(param->u.crypt.idx); -+ psta->gtk_pn.val = RTW_GET_LE64(param->u.crypt.seq); -+ -+ } else if (strcmp(param->u.crypt.alg, "GCMP_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set GCMP_256 GTK of "MAC_FMT", idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->group_privacy = _GCMP_256_; -+ _rtw_memcpy(psta->gtk.skey, param->u.crypt.key, (param->u.crypt.key_len > 32 ? 32 : param->u.crypt.key_len)); -+ psta->gtk_bmp |= BIT(param->u.crypt.idx); -+ psta->gtk_pn.val = RTW_GET_LE64(param->u.crypt.seq); -+ -+ #ifdef CONFIG_IEEE80211W -+ } else if (strcmp(param->u.crypt.alg, "BIP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set CMAC-128 IGTK of "MAC_FMT", idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot11wCipher = _BIP_CMAC_128_; -+ _rtw_memcpy(psta->igtk.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ psta->igtk_bmp |= BIT(param->u.crypt.idx); -+ psta->igtk_id = param->u.crypt.idx; -+ psta->igtk_pn.val = RTW_GET_LE64(param->u.crypt.seq); -+ goto exit; -+ -+ } else if (strcmp(param->u.crypt.alg, "BIP_GMAC_128") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set GMAC-128 IGTK of "MAC_FMT", idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot11wCipher = _BIP_GMAC_128_; -+ _rtw_memcpy(psta->igtk.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ psta->igtk_bmp |= BIT(param->u.crypt.idx); -+ psta->igtk_id = param->u.crypt.idx; -+ psta->igtk_pn.val = RTW_GET_LE64(param->u.crypt.seq); -+ goto exit; -+ -+ } else if (strcmp(param->u.crypt.alg, "BIP_CMAC_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set CMAC-256 IGTK of "MAC_FMT", idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot11wCipher = _BIP_CMAC_256_; -+ _rtw_memcpy(psta->igtk.skey, param->u.crypt.key, (param->u.crypt.key_len > 32 ? 32 : param->u.crypt.key_len)); -+ psta->igtk_bmp |= BIT(param->u.crypt.idx); -+ psta->igtk_id = param->u.crypt.idx; -+ psta->igtk_pn.val = RTW_GET_LE64(param->u.crypt.seq); -+ goto exit; -+ -+ } else if (strcmp(param->u.crypt.alg, "BIP_GMAC_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set GMAC-256 IGTK of "MAC_FMT", idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot11wCipher = _BIP_GMAC_256_; -+ _rtw_memcpy(psta->igtk.skey, param->u.crypt.key, (param->u.crypt.key_len > 32 ? 32 : param->u.crypt.key_len)); -+ psta->igtk_bmp |= BIT(param->u.crypt.idx); -+ psta->igtk_id = param->u.crypt.idx; -+ psta->igtk_pn.val = RTW_GET_LE64(param->u.crypt.seq); -+ goto exit; -+ #endif /* CONFIG_IEEE80211W */ -+ -+ } else if (strcmp(param->u.crypt.alg, "none") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" clear group key of "MAC_FMT", idx:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx); -+ psta->group_privacy = _NO_PRIVACY_; -+ psta->gtk_bmp &= ~BIT(param->u.crypt.idx); -+ } else -+ #endif /* CONFIG_RTW_MESH */ -+ { -+ RTW_WARN(FUNC_ADPT_FMT" set group key of "MAC_FMT", not support\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)); -+ goto exit; -+ } -+ -+ #ifdef CONFIG_RTW_MESH -+ rtw_ap_set_sta_key(padapter, psta->cmn.mac_addr, psta->group_privacy -+ , param->u.crypt.key, param->u.crypt.idx, 1); -+ #endif -+ } -+ -+ } -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_AP_MODE */ -+ -+static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param) -+{ -+ int ret = 0; -+ u32 wep_key_idx, wep_key_len; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif /* CONFIG_P2P */ -+ -+ RTW_INFO("%s\n", __func__); -+ -+ param->u.crypt.err = 0; -+ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; -+ -+ if (is_broadcast_mac_addr(param->sta_addr)) { -+ if (param->u.crypt.idx >= WEP_KEYS -+ #ifdef CONFIG_IEEE80211W -+ && param->u.crypt.idx > BIP_MAX_KEYID -+ #endif -+ ) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } else { -+#ifdef CONFIG_WAPI_SUPPORT -+ if (strcmp(param->u.crypt.alg, "SMS4")) -+#endif -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } -+ -+ if (strcmp(param->u.crypt.alg, "WEP") == 0) { -+ RTW_INFO("wpa_set_encryption, crypt.alg = WEP\n"); -+ -+ wep_key_idx = param->u.crypt.idx; -+ wep_key_len = param->u.crypt.key_len; -+ -+ if ((wep_key_idx >= WEP_KEYS) || (wep_key_len <= 0)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) { -+ /* wep default key has not been set, so use this key index as default key. */ -+ -+ wep_key_len = wep_key_len <= 5 ? 5 : 13; -+ -+ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ -+ if (wep_key_len == 13) { -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ } -+ -+ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; -+ } -+ -+ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); -+ -+ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; -+ -+ rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0, _TRUE); -+ -+ goto exit; -+ } -+ -+ if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { /* 802_1x */ -+ struct sta_info *psta, *pbcmc_sta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ /* RTW_INFO("%s, : dot11AuthAlgrthm == dot11AuthAlgrthm_8021X\n", __func__); */ -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) { /* sta mode */ -+#ifdef CONFIG_RTW_80211R -+ if (rtw_ft_roam(padapter)) -+ psta = rtw_get_stainfo(pstapriv, pmlmepriv->assoc_bssid); -+ else -+#endif -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) { -+ /* DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail\n")); */ -+ RTW_INFO("%s, : Obtain Sta_info fail\n", __func__); -+ } else { -+ /* Jeff: don't disable ieee8021x_blocked while clearing key */ -+ if (strcmp(param->u.crypt.alg, "none") != 0) -+ psta->ieee8021x_blocked = _FALSE; -+ -+ if ((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled) || -+ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) -+ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; -+ -+ if (param->u.crypt.set_tx == 1) { /* pairwise key */ -+ RTW_INFO(FUNC_ADPT_FMT" set %s PTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.alg, param->u.crypt.idx, param->u.crypt.key_len); -+ -+ if (strcmp(param->u.crypt.alg, "GCMP_256") == 0 -+ || strcmp(param->u.crypt.alg, "CCMP_256") == 0) { -+ _rtw_memcpy(psta->dot118021x_UncstKey.skey, -+ param->u.crypt.key, -+ ((param->u.crypt.key_len > 32) ? -+ 32 : param->u.crypt.key_len)); -+ } else -+ _rtw_memcpy(psta->dot118021x_UncstKey.skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 16 ? -+ 16 : param->u.crypt.key_len)); -+ -+ if (strcmp(param->u.crypt.alg, "TKIP") == 0) { /* set mic key */ -+ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); -+ padapter->securitypriv.busetkipkey = _FALSE; -+ } -+ psta->dot11txpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psta->dot11rxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psta->bpairwise_key_installed = _TRUE; -+ #ifdef CONFIG_RTW_80211R -+ psta->ft_pairwise_key_installed = _TRUE; -+ #endif -+ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY, _TRUE); -+ -+ } else { /* group key */ -+ if (strcmp(param->u.crypt.alg, "TKIP") == 0 -+ || strcmp(param->u.crypt.alg, "CCMP") == 0 -+ || strcmp(param->u.crypt.alg, "GCMP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set %s GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.alg, param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); -+ padapter->securitypriv.binstallGrpkey = _TRUE; -+ if (param->u.crypt.idx < 4) -+ _rtw_memcpy(padapter->securitypriv.iv_seq[param->u.crypt.idx], param->u.crypt.seq, 8); -+ padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; -+ rtw_set_key(padapter, &padapter->securitypriv, param->u.crypt.idx, 1, _TRUE); -+ } else if (strcmp(param->u.crypt.alg, "GCMP_256") == 0 -+ || strcmp(param->u.crypt.alg, "CCMP_256") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set %s GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.alg, param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy( -+ padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 32 ? 32 : param->u.crypt.key_len)); -+ padapter->securitypriv.binstallGrpkey = _TRUE; -+ padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; -+ rtw_set_key(padapter, &padapter->securitypriv, param->u.crypt.idx, 1, _TRUE); -+ #ifdef CONFIG_IEEE80211W -+ } else if (strcmp(param->u.crypt.alg, "BIP") == 0) { -+ psecuritypriv->dot11wCipher = _BIP_CMAC_128_; -+ RTW_INFO(FUNC_ADPT_FMT" set CMAC-128 IGTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ psecuritypriv->dot11wBIPKeyid = param->u.crypt.idx; -+ psecuritypriv->dot11wBIPrxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psecuritypriv->binstallBIPkey = _TRUE; -+ } else if (strcmp(param->u.crypt.alg, "BIP_GMAC_128") == 0) { -+ psecuritypriv->dot11wCipher = _BIP_GMAC_128_; -+ RTW_INFO(FUNC_ADPT_FMT" set GMAC-128 IGTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ psecuritypriv->dot11wBIPKeyid = param->u.crypt.idx; -+ psecuritypriv->dot11wBIPrxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psecuritypriv->binstallBIPkey = _TRUE; -+ } else if (strcmp(param->u.crypt.alg, "BIP_GMAC_256") == 0) { -+ psecuritypriv->dot11wCipher = _BIP_GMAC_256_; -+ RTW_INFO(FUNC_ADPT_FMT" set GMAC-256 IGTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, -+ (param->u.crypt.key_len > 32 ? 32 : param->u.crypt.key_len)); -+ psecuritypriv->dot11wBIPKeyid = param->u.crypt.idx; -+ psecuritypriv->dot11wBIPrxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psecuritypriv->binstallBIPkey = _TRUE; -+ } else if (strcmp(param->u.crypt.alg, "BIP_CMAC_256") == 0) { -+ psecuritypriv->dot11wCipher = _BIP_CMAC_256_; -+ RTW_INFO(FUNC_ADPT_FMT" set CMAC-256 IGTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(psecuritypriv->dot11wBIPKey[param->u.crypt.idx].skey, -+ param->u.crypt.key, param->u.crypt.key_len); -+ psecuritypriv->dot11wBIPKeyid = param->u.crypt.idx; -+ psecuritypriv->dot11wBIPrxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psecuritypriv->binstallBIPkey = _TRUE; -+ #endif /* CONFIG_IEEE80211W */ -+ -+ } -+ -+#ifdef CONFIG_P2P -+ if (pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); -+ } -+#endif /* CONFIG_P2P */ -+ -+ /* WPA/WPA2 key-handshake has completed */ -+ clr_fwstate(pmlmepriv, WIFI_UNDER_KEY_HANDSHAKE); -+ -+ } -+ } -+ -+ pbcmc_sta = rtw_get_bcmc_stainfo(padapter); -+ if (pbcmc_sta == NULL) { -+ /* DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null\n")); */ -+ } else { -+ /* Jeff: don't disable ieee8021x_blocked while clearing key */ -+ if (strcmp(param->u.crypt.alg, "none") != 0) -+ pbcmc_sta->ieee8021x_blocked = _FALSE; -+ -+ if ((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled) || -+ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) -+ pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; -+ } -+ } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { /* adhoc mode */ -+ } -+ } -+ -+ #ifdef CONFIG_WAPI_SUPPORT -+ if (strcmp(param->u.crypt.alg, "SMS4") == 0) -+ rtw_wapi_set_set_encryption(padapter, param); -+ #endif -+ -+exit: -+ -+ RTW_INFO("%s, ret=%d\n", __func__, ret); -+ -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev -+ , u8 key_index -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ , bool pairwise -+#endif -+ , const u8 *mac_addr, struct key_params *params) -+{ -+ char *alg_name; -+ u32 param_len; -+ struct ieee_param *param = NULL; -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+#ifdef CONFIG_TDLS -+ struct sta_info *ptdls_sta; -+#endif /* CONFIG_TDLS */ -+ -+ if (mac_addr) -+ RTW_INFO(FUNC_NDEV_FMT" adding key for %pM\n", FUNC_NDEV_ARG(ndev), mac_addr); -+ RTW_INFO(FUNC_NDEV_FMT" cipher=0x%x\n", FUNC_NDEV_ARG(ndev), params->cipher); -+ RTW_INFO(FUNC_NDEV_FMT" key_len=%d, key_index=%d\n", FUNC_NDEV_ARG(ndev), params->key_len, key_index); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ RTW_INFO(FUNC_NDEV_FMT" pairwise=%d\n", FUNC_NDEV_ARG(ndev), pairwise); -+#endif -+ -+ if (rtw_cfg80211_sync_iftype(padapter) != _SUCCESS) { -+ ret = -ENOTSUPP; -+ goto addkey_end; -+ } -+ -+ param_len = sizeof(struct ieee_param) + params->key_len; -+ param = rtw_malloc(param_len); -+ if (param == NULL) -+ return -1; -+ -+ _rtw_memset(param, 0, param_len); -+ -+ param->cmd = IEEE_CMD_SET_ENCRYPTION; -+ _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); -+ -+ switch (params->cipher) { -+ case IW_AUTH_CIPHER_NONE: -+ /* todo: remove key */ -+ /* remove = 1; */ -+ alg_name = "none"; -+ break; -+ case WLAN_CIPHER_SUITE_WEP40: -+ case WLAN_CIPHER_SUITE_WEP104: -+ alg_name = "WEP"; -+ break; -+ case WLAN_CIPHER_SUITE_TKIP: -+ alg_name = "TKIP"; -+ break; -+ case WLAN_CIPHER_SUITE_CCMP: -+ alg_name = "CCMP"; -+ break; -+ case WIFI_CIPHER_SUITE_GCMP: -+ alg_name = "GCMP"; -+ break; -+ case WIFI_CIPHER_SUITE_GCMP_256: -+ alg_name = "GCMP_256"; -+ break; -+ case WIFI_CIPHER_SUITE_CCMP_256: -+ alg_name = "CCMP_256"; -+ break; -+#ifdef CONFIG_IEEE80211W -+ case WLAN_CIPHER_SUITE_AES_CMAC: -+ alg_name = "BIP"; -+ break; -+ case WIFI_CIPHER_SUITE_BIP_GMAC_128: -+ alg_name = "BIP_GMAC_128"; -+ break; -+ case WIFI_CIPHER_SUITE_BIP_GMAC_256: -+ alg_name = "BIP_GMAC_256"; -+ break; -+ case WIFI_CIPHER_SUITE_BIP_CMAC_256: -+ alg_name = "BIP_CMAC_256"; -+ break; -+#endif /* CONFIG_IEEE80211W */ -+#ifdef CONFIG_WAPI_SUPPORT -+ case WLAN_CIPHER_SUITE_SMS4: -+ alg_name = "SMS4"; -+ if (pairwise == NL80211_KEYTYPE_PAIRWISE) { -+ if (key_index != 0 && key_index != 1) { -+ ret = -ENOTSUPP; -+ goto addkey_end; -+ } -+ _rtw_memcpy((void *)param->sta_addr, (void *)mac_addr, ETH_ALEN); -+ } else -+ RTW_INFO("mac_addr is null\n"); -+ RTW_INFO("rtw_wx_set_enc_ext: SMS4 case\n"); -+ break; -+#endif -+ -+ default: -+ ret = -ENOTSUPP; -+ goto addkey_end; -+ } -+ -+ strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); -+ -+ -+ if (!mac_addr || is_broadcast_ether_addr(mac_addr) -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ || !pairwise -+ #endif -+ ) { -+ param->u.crypt.set_tx = 0; /* for wpa/wpa2 group key */ -+ } else { -+ param->u.crypt.set_tx = 1; /* for wpa/wpa2 pairwise key */ -+ } -+ -+ param->u.crypt.idx = key_index; -+ -+ if (params->seq_len && params->seq) { -+ _rtw_memcpy(param->u.crypt.seq, (u8 *)params->seq, params->seq_len); -+ RTW_INFO(FUNC_NDEV_FMT" seq_len:%u, seq:0x%llx\n", FUNC_NDEV_ARG(ndev) -+ , params->seq_len, RTW_GET_LE64(param->u.crypt.seq)); -+ } -+ -+ if (params->key_len && params->key) { -+ param->u.crypt.key_len = params->key_len; -+ _rtw_memcpy(param->u.crypt.key, (u8 *)params->key, params->key_len); -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) { -+#ifdef CONFIG_TDLS -+ if (rtw_tdls_is_driver_setup(padapter) == _FALSE && mac_addr) { -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, (void *)mac_addr); -+ if (ptdls_sta != NULL && ptdls_sta->tdls_sta_state) { -+ _rtw_memcpy(ptdls_sta->tpk.tk, params->key, params->key_len); -+ rtw_tdls_set_key(padapter, ptdls_sta); -+ goto addkey_end; -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ ret = rtw_cfg80211_set_encryption(ndev, param); -+ } else if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { -+#ifdef CONFIG_AP_MODE -+ if (mac_addr) -+ _rtw_memcpy(param->sta_addr, (void *)mac_addr, ETH_ALEN); -+ -+ ret = rtw_cfg80211_ap_set_encryption(ndev, param); -+#endif -+ } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE -+ || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE -+ ) { -+ /* RTW_INFO("@@@@@@@@@@ fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); */ -+ ret = rtw_cfg80211_set_encryption(ndev, param); -+ } else -+ RTW_INFO("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); -+ -+ -+addkey_end: -+ if (param) -+ rtw_mfree(param, param_len); -+ -+ return ret; -+ -+} -+ -+static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev -+ , u8 keyid -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ , bool pairwise -+#endif -+ , const u8 *mac_addr, void *cookie -+ , void (*callback)(void *cookie, struct key_params *)) -+{ -+#define GET_KEY_PARAM_FMT_S " keyid=%d" -+#define GET_KEY_PARAM_ARG_S , keyid -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ #define GET_KEY_PARAM_FMT_2_6_37 ", pairwise=%d" -+ #define GET_KEY_PARAM_ARG_2_6_37 , pairwise -+#else -+ #define GET_KEY_PARAM_FMT_2_6_37 "" -+ #define GET_KEY_PARAM_ARG_2_6_37 -+#endif -+#define GET_KEY_PARAM_FMT_E ", addr=%pM" -+#define GET_KEY_PARAM_ARG_E , mac_addr -+ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *sec = &adapter->securitypriv; -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct sta_info *sta = NULL; -+ u32 cipher = _NO_PRIVACY_; -+ union Keytype *key = NULL; -+ u8 key_len = 0; -+ u64 *pn = NULL; -+ u8 pn_len = 0; -+ u8 pn_val[8] = {0}; -+ -+ struct key_params params; -+ int ret = -ENOENT; -+ -+ if (keyid >= WEP_KEYS -+ #ifdef CONFIG_IEEE80211W -+ && keyid > BIP_MAX_KEYID -+ #endif -+ ) -+ goto exit; -+ -+ if (!mac_addr || is_broadcast_ether_addr(mac_addr) -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ || (MLME_IS_STA(adapter) && !pairwise) -+ #endif -+ ) { -+ /* WEP key, TX GTK/IGTK, RX GTK/IGTK(for STA mode) */ -+ if (is_wep_enc(sec->dot118021XGrpPrivacy)) { -+ if (keyid >= WEP_KEYS) -+ goto exit; -+ if (!(sec->key_mask & BIT(keyid))) -+ goto exit; -+ cipher = sec->dot118021XGrpPrivacy; -+ key = &sec->dot11DefKey[keyid]; -+ } else { -+ if (keyid < WEP_KEYS) { -+ if (sec->binstallGrpkey != _TRUE) -+ goto exit; -+ cipher = sec->dot118021XGrpPrivacy; -+ key = &sec->dot118021XGrpKey[keyid]; -+ sta = rtw_get_bcmc_stainfo(adapter); -+ if (sta) -+ pn = &sta->dot11txpn.val; -+ #ifdef CONFIG_IEEE80211W -+ } else if (keyid <= BIP_MAX_KEYID) { -+ if (SEC_IS_BIP_KEY_INSTALLED(sec) != _TRUE) -+ goto exit; -+ cipher = sec->dot11wCipher; -+ key = &sec->dot11wBIPKey[keyid]; -+ pn = &sec->dot11wBIPtxpn.val; -+ #endif -+ } -+ } -+ } else { -+ /* Pairwise key, RX GTK/IGTK for specific peer */ -+ sta = rtw_get_stainfo(stapriv, mac_addr); -+ if (!sta) -+ goto exit; -+ -+ if (keyid < WEP_KEYS && pairwise) { -+ if (sta->bpairwise_key_installed != _TRUE) -+ goto exit; -+ cipher = sta->dot118021XPrivacy; -+ key = &sta->dot118021x_UncstKey; -+ #ifdef CONFIG_RTW_MESH -+ } else if (keyid < WEP_KEYS && !pairwise) { -+ if (!(sta->gtk_bmp & BIT(keyid))) -+ goto exit; -+ cipher = sta->group_privacy; -+ key = &sta->gtk; -+ #ifdef CONFIG_IEEE80211W -+ } else if (keyid <= BIP_MAX_KEYID && !pairwise) { -+ if (!(sta->igtk_bmp & BIT(keyid))) -+ goto exit; -+ cipher = sta->dot11wCipher; -+ key = &sta->igtk; -+ pn = &sta->igtk_pn.val; -+ #endif -+ #endif /* CONFIG_RTW_MESH */ -+ } -+ } -+ -+ if (!key) -+ goto exit; -+ -+ if (cipher == _WEP40_) { -+ cipher = WLAN_CIPHER_SUITE_WEP40; -+ key_len = sec->dot11DefKeylen[keyid]; -+ } else if (cipher == _WEP104_) { -+ cipher = WLAN_CIPHER_SUITE_WEP104; -+ key_len = sec->dot11DefKeylen[keyid]; -+ } else if (cipher == _TKIP_ || cipher == _TKIP_WTMIC_) { -+ cipher = WLAN_CIPHER_SUITE_TKIP; -+ key_len = 16; -+ } else if (cipher == _AES_) { -+ cipher = WLAN_CIPHER_SUITE_CCMP; -+ key_len = 16; -+#ifdef CONFIG_WAPI_SUPPORT -+ } else if (cipher == _SMS4_) { -+ cipher = WLAN_CIPHER_SUITE_SMS4; -+ key_len = 16; -+#endif -+ } else if (cipher == _GCMP_) { -+ cipher = WIFI_CIPHER_SUITE_GCMP; -+ key_len = 16; -+ } else if (cipher == _CCMP_256_) { -+ cipher = WIFI_CIPHER_SUITE_CCMP_256; -+ key_len = 32; -+ } else if (cipher == _GCMP_256_) { -+ cipher = WIFI_CIPHER_SUITE_GCMP_256; -+ key_len = 32; -+ #ifdef CONFIG_IEEE80211W -+ } else if (cipher == _BIP_CMAC_128_) { -+ cipher = WLAN_CIPHER_SUITE_AES_CMAC; -+ key_len = 16; -+ } else if (cipher == _BIP_GMAC_128_) { -+ cipher = WIFI_CIPHER_SUITE_BIP_GMAC_128; -+ key_len = 16; -+ } else if (cipher == _BIP_GMAC_256_) { -+ cipher = WIFI_CIPHER_SUITE_BIP_GMAC_256; -+ key_len = 32; -+ } else if (cipher == _BIP_CMAC_256_) { -+ cipher = WIFI_CIPHER_SUITE_BIP_CMAC_256; -+ key_len = 32; -+ #endif -+ } else { -+ RTW_WARN(FUNC_NDEV_FMT" unknown cipher:%u\n", FUNC_NDEV_ARG(ndev), cipher); -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (pn) { -+ *((u64 *)pn_val) = cpu_to_le64(*pn); -+ pn_len = 6; -+ } -+ -+ ret = 0; -+ -+exit: -+ RTW_INFO(FUNC_NDEV_FMT -+ GET_KEY_PARAM_FMT_S -+ GET_KEY_PARAM_FMT_2_6_37 -+ GET_KEY_PARAM_FMT_E -+ " ret %d\n", FUNC_NDEV_ARG(ndev) -+ GET_KEY_PARAM_ARG_S -+ GET_KEY_PARAM_ARG_2_6_37 -+ GET_KEY_PARAM_ARG_E -+ , ret); -+ if (pn) -+ RTW_INFO(FUNC_NDEV_FMT " seq:0x%llx\n", FUNC_NDEV_ARG(ndev), *pn); -+ -+ if (ret == 0) { -+ _rtw_memset(¶ms, 0, sizeof(params)); -+ -+ params.cipher = cipher; -+ params.key = key->skey; -+ params.key_len = key_len; -+ if (pn) { -+ params.seq = pn_val; -+ params.seq_len = pn_len; -+ } -+ -+ callback(cookie, ¶ms); -+ } -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ u8 key_index, bool pairwise, const u8 *mac_addr) -+#else /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) */ -+ u8 key_index, const u8 *mac_addr) -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) */ -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ RTW_INFO(FUNC_NDEV_FMT" key_index=%d, addr=%pM\n", FUNC_NDEV_ARG(ndev), key_index, mac_addr); -+ -+ if (key_index == psecuritypriv->dot11PrivacyKeyIndex) { -+ /* clear the flag of wep default key set. */ -+ psecuritypriv->bWepDefaultKeyIdxSet = 0; -+ } -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, -+ struct net_device *ndev, u8 key_index -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) -+ , bool unicast, bool multicast -+ #endif -+) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+#define SET_DEF_KEY_PARAM_FMT " key_index=%d" -+#define SET_DEF_KEY_PARAM_ARG , key_index -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) -+ #define SET_DEF_KEY_PARAM_FMT_2_6_38 ", unicast=%d, multicast=%d" -+ #define SET_DEF_KEY_PARAM_ARG_2_6_38 , unicast, multicast -+#else -+ #define SET_DEF_KEY_PARAM_FMT_2_6_38 "" -+ #define SET_DEF_KEY_PARAM_ARG_2_6_38 -+#endif -+ -+ RTW_INFO(FUNC_NDEV_FMT -+ SET_DEF_KEY_PARAM_FMT -+ SET_DEF_KEY_PARAM_FMT_2_6_38 -+ "\n", FUNC_NDEV_ARG(ndev) -+ SET_DEF_KEY_PARAM_ARG -+ SET_DEF_KEY_PARAM_ARG_2_6_38 -+ ); -+ -+ if ((key_index < WEP_KEYS) && ((psecuritypriv->dot11PrivacyAlgrthm == _WEP40_) || (psecuritypriv->dot11PrivacyAlgrthm == _WEP104_))) { /* set wep default key */ -+ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ -+ psecuritypriv->dot11PrivacyKeyIndex = key_index; -+ -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ if (psecuritypriv->dot11DefKeylen[key_index] == 13) { -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ } -+ -+ psecuritypriv->bWepDefaultKeyIdxSet = 1; /* set the flag to represent that wep default key has been set */ -+ } -+ -+ return 0; -+ -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 30)) -+int cfg80211_rtw_set_default_mgmt_key(struct wiphy *wiphy, -+ struct net_device *ndev, u8 key_index) -+{ -+#define SET_DEF_KEY_PARAM_FMT " key_index=%d" -+#define SET_DEF_KEY_PARAM_ARG , key_index -+ -+ RTW_INFO(FUNC_NDEV_FMT -+ SET_DEF_KEY_PARAM_FMT -+ "\n", FUNC_NDEV_ARG(ndev) -+ SET_DEF_KEY_PARAM_ARG -+ ); -+ -+ return 0; -+} -+#endif -+ -+#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)) -+static int cfg80211_rtw_set_rekey_data(struct wiphy *wiphy, -+ struct net_device *ndev, -+ struct cfg80211_gtk_rekey_data *data) -+{ -+ /*int i;*/ -+ struct sta_info *psta; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) { -+ RTW_INFO("%s, : Obtain Sta_info fail\n", __func__); -+ return -1; -+ } -+ -+ _rtw_memcpy(psta->kek, data->kek, NL80211_KEK_LEN); -+ /*printk("\ncfg80211_rtw_set_rekey_data KEK:"); -+ for(i=0;ikek[i]);*/ -+ _rtw_memcpy(psta->kck, data->kck, NL80211_KCK_LEN); -+ /*printk("\ncfg80211_rtw_set_rekey_data KCK:"); -+ for(i=0;ikck[i]);*/ -+ _rtw_memcpy(psta->replay_ctr, data->replay_ctr, NL80211_REPLAY_CTR_LEN); -+ psecuritypriv->binstallKCK_KEK = _TRUE; -+ /*printk("\nREPLAY_CTR: "); -+ for(i=0;ireplay_ctr[i]);*/ -+ -+ return 0; -+} -+#endif /*CONFIG_GTK_OL*/ -+ -+#ifdef CONFIG_RTW_MESH -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+static enum nl80211_mesh_power_mode rtw_mesh_ps_to_nl80211_mesh_power_mode(u8 ps) -+{ -+ if (ps == RTW_MESH_PS_UNKNOWN) -+ return NL80211_MESH_POWER_UNKNOWN; -+ if (ps == RTW_MESH_PS_ACTIVE) -+ return NL80211_MESH_POWER_ACTIVE; -+ if (ps == RTW_MESH_PS_LSLEEP) -+ return NL80211_MESH_POWER_LIGHT_SLEEP; -+ if (ps == RTW_MESH_PS_DSLEEP) -+ return NL80211_MESH_POWER_DEEP_SLEEP; -+ -+ rtw_warn_on(1); -+ return NL80211_MESH_POWER_UNKNOWN; -+} -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+enum nl80211_plink_state rtw_plink_state_to_nl80211_plink_state(u8 plink_state) -+{ -+ if (plink_state == RTW_MESH_PLINK_UNKNOWN) -+ return NUM_NL80211_PLINK_STATES; -+ if (plink_state == RTW_MESH_PLINK_LISTEN) -+ return NL80211_PLINK_LISTEN; -+ if (plink_state == RTW_MESH_PLINK_OPN_SNT) -+ return NL80211_PLINK_OPN_SNT; -+ if (plink_state == RTW_MESH_PLINK_OPN_RCVD) -+ return NL80211_PLINK_OPN_RCVD; -+ if (plink_state == RTW_MESH_PLINK_CNF_RCVD) -+ return NL80211_PLINK_CNF_RCVD; -+ if (plink_state == RTW_MESH_PLINK_ESTAB) -+ return NL80211_PLINK_ESTAB; -+ if (plink_state == RTW_MESH_PLINK_HOLDING) -+ return NL80211_PLINK_HOLDING; -+ if (plink_state == RTW_MESH_PLINK_BLOCKED) -+ return NL80211_PLINK_BLOCKED; -+ -+ rtw_warn_on(1); -+ return NUM_NL80211_PLINK_STATES; -+} -+ -+u8 nl80211_plink_state_to_rtw_plink_state(enum nl80211_plink_state plink_state) -+{ -+ if (plink_state == NL80211_PLINK_LISTEN) -+ return RTW_MESH_PLINK_LISTEN; -+ if (plink_state == NL80211_PLINK_OPN_SNT) -+ return RTW_MESH_PLINK_OPN_SNT; -+ if (plink_state == NL80211_PLINK_OPN_RCVD) -+ return RTW_MESH_PLINK_OPN_RCVD; -+ if (plink_state == NL80211_PLINK_CNF_RCVD) -+ return RTW_MESH_PLINK_CNF_RCVD; -+ if (plink_state == NL80211_PLINK_ESTAB) -+ return RTW_MESH_PLINK_ESTAB; -+ if (plink_state == NL80211_PLINK_HOLDING) -+ return RTW_MESH_PLINK_HOLDING; -+ if (plink_state == NL80211_PLINK_BLOCKED) -+ return RTW_MESH_PLINK_BLOCKED; -+ -+ rtw_warn_on(1); -+ return RTW_MESH_PLINK_UNKNOWN; -+} -+#endif -+ -+static void rtw_cfg80211_fill_mesh_only_sta_info(struct mesh_plink_ent *plink, struct sta_info *sta, struct station_info *sinfo) -+{ -+ sinfo->filled |= STATION_INFO_LLID; -+ sinfo->llid = plink->llid; -+ sinfo->filled |= STATION_INFO_PLID; -+ sinfo->plid = plink->plid; -+ sinfo->filled |= STATION_INFO_PLINK_STATE; -+ sinfo->plink_state = rtw_plink_state_to_nl80211_plink_state(plink->plink_state); -+ if (!sta && plink->scanned) { -+ sinfo->filled |= STATION_INFO_SIGNAL; -+ sinfo->signal = translate_percentage_to_dbm(plink->scanned->network.PhyInfo.SignalStrength); -+ sinfo->filled |= STATION_INFO_INACTIVE_TIME; -+ if (plink->plink_state == RTW_MESH_PLINK_UNKNOWN) -+ sinfo->inactive_time = 0 - 1; -+ else -+ sinfo->inactive_time = rtw_get_passing_time_ms(plink->scanned->last_scanned); -+ } -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+ if (sta) { -+ sinfo->filled |= STATION_INFO_LOCAL_PM; -+ sinfo->local_pm = rtw_mesh_ps_to_nl80211_mesh_power_mode(sta->local_mps); -+ sinfo->filled |= STATION_INFO_PEER_PM; -+ sinfo->peer_pm = rtw_mesh_ps_to_nl80211_mesh_power_mode(sta->peer_mps); -+ sinfo->filled |= STATION_INFO_NONPEER_PM; -+ sinfo->nonpeer_pm = rtw_mesh_ps_to_nl80211_mesh_power_mode(sta->nonpeer_mps); -+ } -+#endif -+} -+#endif /* CONFIG_RTW_MESH */ -+ -+static int cfg80211_rtw_get_station(struct wiphy *wiphy, -+ struct net_device *ndev, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0)) -+ u8 *mac, -+#else -+ const u8 *mac, -+#endif -+ struct station_info *sinfo) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct sta_info *psta = NULL; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+#ifdef CONFIG_RTW_MESH -+ struct mesh_plink_ent *plink = NULL; -+#endif -+ -+ sinfo->filled = 0; -+ -+ if (!mac) { -+ RTW_INFO(FUNC_NDEV_FMT" mac==%p\n", FUNC_NDEV_ARG(ndev), mac); -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ psta = rtw_get_stainfo(pstapriv, mac); -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ if (psta) -+ plink = psta->plink; -+ if (!plink) -+ plink = rtw_mesh_plink_get(padapter, mac); -+ } -+#endif /* CONFIG_RTW_MESH */ -+ -+ if ((!MLME_IS_MESH(padapter) && !psta) -+ #ifdef CONFIG_RTW_MESH -+ || (MLME_IS_MESH(padapter) && !plink) -+ #endif -+ ) { -+ RTW_INFO(FUNC_NDEV_FMT" no sta info for mac="MAC_FMT"\n" -+ , FUNC_NDEV_ARG(ndev), MAC_ARG(mac)); -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO(FUNC_NDEV_FMT" mac="MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac)); -+#endif -+ -+ /* for infra./P2PClient mode */ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) -+ && check_fwstate(pmlmepriv, WIFI_ASOC_STATE) -+ ) { -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ -+ if (_rtw_memcmp((u8 *)mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) { -+ RTW_INFO("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ sinfo->filled |= STATION_INFO_SIGNAL; -+ sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); -+ -+ sinfo->filled |= STATION_INFO_TX_BITRATE; -+ sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter); -+ } -+ -+ if (psta) { -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE -+ || check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE -+ ) { -+ sinfo->filled |= STATION_INFO_SIGNAL; -+ sinfo->signal = translate_percentage_to_dbm(psta->cmn.rssi_stat.rssi); -+ } -+ sinfo->filled |= STATION_INFO_INACTIVE_TIME; -+ sinfo->inactive_time = rtw_get_passing_time_ms(psta->sta_stats.last_rx_time); -+ sinfo->filled |= STATION_INFO_RX_PACKETS; -+ sinfo->rx_packets = sta_rx_data_pkts(psta); -+ sinfo->filled |= STATION_INFO_TX_PACKETS; -+ sinfo->tx_packets = psta->sta_stats.tx_pkts; -+ sinfo->filled |= STATION_INFO_TX_FAILED; -+ sinfo->tx_failed = psta->sta_stats.tx_fail_cnt; -+ } -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) -+ rtw_cfg80211_fill_mesh_only_sta_info(plink, psta, sinfo); -+#endif -+ -+exit: -+ return ret; -+} -+ -+extern int netdev_open(struct net_device *pnetdev); -+ -+#if 0 -+enum nl80211_iftype { -+ NL80211_IFTYPE_UNSPECIFIED, -+ NL80211_IFTYPE_ADHOC, /* 1 */ -+ NL80211_IFTYPE_STATION, /* 2 */ -+ NL80211_IFTYPE_AP, /* 3 */ -+ NL80211_IFTYPE_AP_VLAN, -+ NL80211_IFTYPE_WDS, -+ NL80211_IFTYPE_MONITOR, /* 6 */ -+ NL80211_IFTYPE_MESH_POINT, -+ NL80211_IFTYPE_P2P_CLIENT, /* 8 */ -+ NL80211_IFTYPE_P2P_GO, /* 9 */ -+ /* keep last */ -+ NUM_NL80211_IFTYPES, -+ NL80211_IFTYPE_MAX = NUM_NL80211_IFTYPES - 1 -+}; -+#endif -+static int cfg80211_rtw_change_iface(struct wiphy *wiphy, -+ struct net_device *ndev, -+ enum nl80211_iftype type, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 12, 0)) -+ u32 *flags, -+#endif -+ struct vif_params *params) -+{ -+ enum nl80211_iftype old_type; -+ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif -+#ifdef CONFIG_MONITOR_MODE_XMIT -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+#endif -+ int ret = 0; -+ u8 change = _FALSE; -+ -+ RTW_INFO(FUNC_NDEV_FMT" type=%d, hw_port:%d\n", FUNC_NDEV_ARG(ndev), type, padapter->hw_port); -+ -+ if (adapter_to_dvobj(padapter)->processing_dev_remove == _TRUE) { -+ ret = -EPERM; -+ goto exit; -+ } -+ -+ -+ RTW_INFO(FUNC_NDEV_FMT" call netdev_open\n", FUNC_NDEV_ARG(ndev)); -+ if (netdev_open(ndev) != 0) { -+ RTW_INFO(FUNC_NDEV_FMT" call netdev_open fail\n", FUNC_NDEV_ARG(ndev)); -+ ret = -EPERM; -+ goto exit; -+ } -+ -+ -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ RTW_INFO(FUNC_NDEV_FMT" call rtw_pwr_wakeup fail\n", FUNC_NDEV_ARG(ndev)); -+ ret = -EPERM; -+ goto exit; -+ } -+ -+ old_type = rtw_wdev->iftype; -+ RTW_INFO(FUNC_NDEV_FMT" old_iftype=%d, new_iftype=%d\n", -+ FUNC_NDEV_ARG(ndev), old_type, type); -+ -+ if (old_type != type) { -+ change = _TRUE; -+ pmlmeext->action_public_rxseq = 0xffff; -+ pmlmeext->action_public_dialog_token = 0xff; -+ } -+ -+ /* initial default type */ -+ ndev->type = ARPHRD_ETHER; -+ -+ /* -+ * Disable Power Save in moniter mode, -+ * and enable it after leaving moniter mode. -+ */ -+ if (type == NL80211_IFTYPE_MONITOR) { -+ rtw_ps_deny(padapter, PS_DENY_MONITOR_MODE); -+ LeaveAllPowerSaveMode(padapter); -+ } else if (old_type == NL80211_IFTYPE_MONITOR) { -+ /* driver in moniter mode in last time */ -+ rtw_ps_deny_cancel(padapter, PS_DENY_MONITOR_MODE); -+ } -+ -+ switch (type) { -+ case NL80211_IFTYPE_ADHOC: -+ networkType = Ndis802_11IBSS; -+ break; -+ -+ case NL80211_IFTYPE_STATION: -+ networkType = Ndis802_11Infrastructure; -+ #ifdef CONFIG_P2P -+ if (change && pwdinfo->driver_interface == DRIVER_CFG80211) { -+ #if !RTW_P2P_GROUP_INTERFACE -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) -+ || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) -+ ) { -+ /* it means remove GC/GO and change mode from GC/GO to station(P2P DEVICE) */ -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); -+ } -+ #endif -+ } -+ #endif /* CONFIG_P2P */ -+ break; -+ -+ case NL80211_IFTYPE_AP: -+ networkType = Ndis802_11APMode; -+ #ifdef CONFIG_P2P -+ if (change && pwdinfo->driver_interface == DRIVER_CFG80211) { -+ #if !RTW_P2P_GROUP_INTERFACE -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ /* it means P2P Group created, we will be GO and change mode from P2P DEVICE to AP(GO) */ -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ } -+ #endif -+ } -+ #endif /* CONFIG_P2P */ -+ break; -+ -+#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ case NL80211_IFTYPE_P2P_CLIENT: -+ networkType = Ndis802_11Infrastructure; -+ if (change && pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (!rtw_p2p_enable(padapter, P2P_ROLE_CLIENT)) { -+ ret = -EOPNOTSUPP; -+ goto exit; -+ } -+ } -+ break; -+ -+ case NL80211_IFTYPE_P2P_GO: -+ networkType = Ndis802_11APMode; -+ if (change && pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (!rtw_p2p_enable(padapter, P2P_ROLE_GO)) { -+ ret = -EOPNOTSUPP; -+ goto exit; -+ } -+ } -+ break; -+#endif /* defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) */ -+ -+#ifdef CONFIG_RTW_MESH -+ case NL80211_IFTYPE_MESH_POINT: -+ networkType = Ndis802_11_mesh; -+ break; -+#endif -+ -+#ifdef CONFIG_WIFI_MONITOR -+ case NL80211_IFTYPE_MONITOR: -+ networkType = Ndis802_11Monitor; -+ -+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL -+ ndev->type = ARPHRD_IEEE80211; /* IEEE 802.11 : 801 */ -+#else -+ ndev->type = ARPHRD_IEEE80211_RADIOTAP; /* IEEE 802.11 + radiotap header : 803 */ -+#endif -+ break; -+#endif /* CONFIG_WIFI_MONITOR */ -+ default: -+ ret = -EOPNOTSUPP; -+ goto exit; -+ } -+ -+ rtw_wdev->iftype = type; -+ -+ if (rtw_set_802_11_infrastructure_mode(padapter, networkType, 0) == _FALSE) { -+ rtw_wdev->iftype = old_type; -+ ret = -EPERM; -+ goto exit; -+ } -+ -+ rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_WAIT_ACK); -+#ifdef CONFIG_MONITOR_MODE_XMIT -+ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) == _TRUE) -+ rtw_indicate_connect(padapter); -+#endif -+ -+ #if defined(CONFIG_RTW_WDS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 33)) -+ if (params->use_4addr != -1) { -+ RTW_INFO(FUNC_NDEV_FMT" use_4addr=%d\n" -+ , FUNC_NDEV_ARG(ndev), params->use_4addr); -+ adapter_set_use_wds(padapter, params->use_4addr); -+ } -+ #endif -+ -+exit: -+ -+ RTW_INFO(FUNC_NDEV_FMT" ret:%d\n", FUNC_NDEV_ARG(ndev), ret); -+ return ret; -+} -+ -+void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted) -+{ -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); -+ _irqL irqL; -+ -+#if (KERNEL_VERSION(4, 8, 0) <= LINUX_VERSION_CODE) -+ struct cfg80211_scan_info info; -+ -+ memset(&info, 0, sizeof(info)); -+ info.aborted = aborted; -+#endif -+ -+ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ if (pwdev_priv->scan_request != NULL) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s with scan req\n", __FUNCTION__); -+ #endif -+ -+ /* avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); */ -+ if (pwdev_priv->scan_request->wiphy != pwdev_priv->rtw_wdev->wiphy) -+ RTW_INFO("error wiphy compare\n"); -+ else -+#if (KERNEL_VERSION(4, 8, 0) <= LINUX_VERSION_CODE) -+ cfg80211_scan_done(pwdev_priv->scan_request, &info); -+#else -+ cfg80211_scan_done(pwdev_priv->scan_request, aborted); -+#endif -+ -+ pwdev_priv->scan_request = NULL; -+ } else { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s without scan req\n", __FUNCTION__); -+ #endif -+ } -+ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+} -+ -+u32 rtw_cfg80211_wait_scan_req_empty(_adapter *adapter, u32 timeout_ms) -+{ -+ struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter); -+ u8 empty = _FALSE; -+ systime start; -+ u32 pass_ms; -+ -+ start = rtw_get_current_time(); -+ -+ while (rtw_get_passing_time_ms(start) <= timeout_ms) { -+ -+ if (RTW_CANNOT_RUN(adapter)) -+ break; -+ -+ if (!wdev_priv->scan_request) { -+ empty = _TRUE; -+ break; -+ } -+ -+ rtw_msleep_os(10); -+ } -+ -+ pass_ms = rtw_get_passing_time_ms(start); -+ -+ if (empty == _FALSE && pass_ms > timeout_ms) -+ RTW_PRINT(FUNC_ADPT_FMT" pass_ms:%u, timeout\n" -+ , FUNC_ADPT_ARG(adapter), pass_ms); -+ -+ return pass_ms; -+} -+ -+void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork) -+{ -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+ struct wiphy *wiphy = pwdev->wiphy; -+ struct cfg80211_bss *bss = NULL; -+ WLAN_BSSID_EX select_network = pnetwork->network; -+ -+ bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, -+ select_network.MacAddress, select_network.Ssid.Ssid, -+ select_network.Ssid.SsidLength, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0) -+ select_network.InfrastructureMode == Ndis802_11Infrastructure?IEEE80211_BSS_TYPE_ESS:IEEE80211_BSS_TYPE_IBSS, -+ IEEE80211_PRIVACY(select_network.Privacy)); -+#else -+ select_network.InfrastructureMode == Ndis802_11Infrastructure?WLAN_CAPABILITY_ESS:WLAN_CAPABILITY_IBSS, -+ select_network.InfrastructureMode == Ndis802_11Infrastructure?WLAN_CAPABILITY_ESS:WLAN_CAPABILITY_IBSS); -+#endif -+ -+ if (bss) { -+ cfg80211_unlink_bss(wiphy, bss); -+ RTW_INFO("%s(): cfg80211_unlink %s!!\n", __func__, select_network.Ssid.Ssid); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) -+ cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); -+#else -+ cfg80211_put_bss(bss); -+#endif -+ } -+ return; -+} -+ -+/* if target wps scan ongoing, target_ssid is filled */ -+int rtw_cfg80211_is_target_wps_scan(struct cfg80211_scan_request *scan_req, struct cfg80211_ssid *target_ssid) -+{ -+ int ret = 0; -+ -+ if (scan_req->n_ssids != 1 -+ || scan_req->ssids[0].ssid_len == 0 -+ || scan_req->n_channels != 1 -+ ) -+ goto exit; -+ -+ /* under target WPS scan */ -+ _rtw_memcpy(target_ssid, scan_req->ssids, sizeof(struct cfg80211_ssid)); -+ ret = 1; -+ -+exit: -+ return ret; -+} -+ -+static void _rtw_cfg80211_surveydone_event_callback(_adapter *padapter, struct cfg80211_scan_request *scan_req) -+{ -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ _irqL irqL; -+ _list *plist, *phead; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ struct cfg80211_ssid target_ssid; -+ u8 target_wps_scan = 0; -+ u8 ch; -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s\n", __func__); -+#endif -+ -+ if (scan_req) -+ target_wps_scan = rtw_cfg80211_is_target_wps_scan(scan_req, &target_ssid); -+ else { -+ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ if (pwdev_priv->scan_request != NULL) -+ target_wps_scan = rtw_cfg80211_is_target_wps_scan(pwdev_priv->scan_request, &target_ssid); -+ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ } -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ ch = pnetwork->network.Configuration.DSConfig; -+ -+ /* report network only if the current channel set contains the channel to which this network belongs */ -+ if (rtw_chset_search_ch(chset, ch) >= 0 -+ && rtw_mlme_band_check(padapter, ch) == _TRUE -+ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) -+ && (!IS_DFS_SLAVE_WITH_RD(rfctl) -+ || rtw_rfctl_dfs_domain_unknown(rfctl) -+ || !rtw_chset_is_ch_non_ocp(chset, ch)) -+ ) { -+ if (target_wps_scan) -+ rtw_cfg80211_clear_wps_sr_of_non_target_bss(padapter, pnetwork, &target_ssid); -+ rtw_cfg80211_inform_bss(padapter, pnetwork); -+ } -+#if 0 -+ /* check ralink testbed RSN IE length */ -+ { -+ if (_rtw_memcmp(pnetwork->network.Ssid.Ssid, "Ralink_11n_AP", 13)) { -+ uint ie_len = 0; -+ u8 *p = NULL; -+ p = rtw_get_ie(pnetwork->network.IEs + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pnetwork->network.IELength - _BEACON_IE_OFFSET_)); -+ RTW_INFO("ie_len=%d\n", ie_len); -+ } -+ } -+#endif -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+} -+ -+inline void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) -+{ -+ _rtw_cfg80211_surveydone_event_callback(padapter, NULL); -+} -+ -+static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, int len) -+{ -+ int ret = 0; -+ uint wps_ielen = 0; -+ u8 *wps_ie; -+ u32 p2p_ielen = 0; -+ u8 *p2p_ie; -+ u32 wfd_ielen = 0; -+ u8 *wfd_ie; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s, ielen=%d\n", __func__, len); -+#endif -+ -+ if (len > 0) { -+ wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen); -+ if (wps_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("probe_req_wps_ielen=%d\n", wps_ielen); -+ #endif -+ -+ if (pmlmepriv->wps_probe_req_ie) { -+ u32 free_len = pmlmepriv->wps_probe_req_ie_len; -+ pmlmepriv->wps_probe_req_ie_len = 0; -+ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); -+ pmlmepriv->wps_probe_req_ie = NULL; -+ } -+ -+ pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); -+ if (pmlmepriv->wps_probe_req_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ _rtw_memcpy(pmlmepriv->wps_probe_req_ie, wps_ie, wps_ielen); -+ pmlmepriv->wps_probe_req_ie_len = wps_ielen; -+ } -+ -+ /* buf += wps_ielen; */ -+ /* len -= wps_ielen; */ -+ -+ #ifdef CONFIG_P2P -+ p2p_ie = rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen); -+ if (p2p_ie) { -+ struct wifidirect_info *wdinfo = &padapter->wdinfo; -+ u32 attr_contentlen = 0; -+ u8 listen_ch_attr[5]; -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("probe_req_p2p_ielen=%d\n", p2p_ielen); -+ #endif -+ -+ if (pmlmepriv->p2p_probe_req_ie) { -+ u32 free_len = pmlmepriv->p2p_probe_req_ie_len; -+ pmlmepriv->p2p_probe_req_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_probe_req_ie, free_len); -+ pmlmepriv->p2p_probe_req_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_probe_req_ie = rtw_malloc(p2p_ielen); -+ if (pmlmepriv->p2p_probe_req_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ _rtw_memcpy(pmlmepriv->p2p_probe_req_ie, p2p_ie, p2p_ielen); -+ pmlmepriv->p2p_probe_req_ie_len = p2p_ielen; -+ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, (u8 *)listen_ch_attr, (uint *) &attr_contentlen) -+ && attr_contentlen == 5) { -+ if (wdinfo->listen_channel != listen_ch_attr[4]) { -+ RTW_INFO(FUNC_ADPT_FMT" listen channel - country:%c%c%c, class:%u, ch:%u\n", -+ FUNC_ADPT_ARG(padapter), listen_ch_attr[0], listen_ch_attr[1], listen_ch_attr[2], -+ listen_ch_attr[3], listen_ch_attr[4]); -+ wdinfo->listen_channel = listen_ch_attr[4]; -+ } -+ } -+ } -+ #endif /* CONFIG_P2P */ -+ -+ #ifdef CONFIG_WFD -+ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("probe_req_wfd_ielen=%d\n", wfd_ielen); -+ #endif -+ -+ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_PROBE_REQ_IE, wfd_ie, wfd_ielen) != _SUCCESS) -+ return -EINVAL; -+ } -+ #endif /* CONFIG_WFD */ -+ -+ #ifdef CONFIG_RTW_MBO -+ rtw_mbo_update_ie_data(padapter, buf, len); -+ #endif -+ } -+ -+ return ret; -+ -+} -+ -+#ifdef CONFIG_CONCURRENT_MODE -+u8 rtw_cfg80211_scan_via_buddy(_adapter *padapter, struct cfg80211_scan_request *request) -+{ -+ int i; -+ u8 ret = _FALSE; -+ _adapter *iface = NULL; -+ _irqL irqL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ struct mlme_priv *buddy_mlmepriv; -+ struct rtw_wdev_priv *buddy_wdev_priv; -+ -+ iface = dvobj->padapters[i]; -+ if (iface == NULL) -+ continue; -+ -+ if (iface == padapter) -+ continue; -+ -+ if (rtw_is_adapter_up(iface) == _FALSE) -+ continue; -+ -+ buddy_mlmepriv = &iface->mlmepriv; -+ if (!check_fwstate(buddy_mlmepriv, WIFI_UNDER_SURVEY)) -+ continue; -+ -+ buddy_wdev_priv = adapter_wdev_data(iface); -+ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ _enter_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); -+ if (buddy_wdev_priv->scan_request) { -+ pmlmepriv->scanning_via_buddy_intf = _TRUE; -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ set_fwstate(pmlmepriv, WIFI_UNDER_SURVEY); -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ pwdev_priv->scan_request = request; -+ ret = _TRUE; -+ } -+ _exit_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL); -+ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ -+ if (ret == _TRUE) -+ goto exit; -+ } -+ -+exit: -+ return ret; -+} -+ -+void rtw_cfg80211_indicate_scan_done_for_buddy(_adapter *padapter, bool bscan_aborted) -+{ -+ int i; -+ _adapter *iface = NULL; -+ _irqL irqL; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct mlme_priv *mlmepriv; -+ struct rtw_wdev_priv *wdev_priv; -+ bool indicate_buddy_scan; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ -+ if (iface == padapter) -+ continue; -+ -+ mlmepriv = &(iface->mlmepriv); -+ wdev_priv = adapter_wdev_data(iface); -+ -+ indicate_buddy_scan = _FALSE; -+ _enter_critical_bh(&wdev_priv->scan_req_lock, &irqL); -+ if (mlmepriv->scanning_via_buddy_intf == _TRUE) { -+ mlmepriv->scanning_via_buddy_intf = _FALSE; -+ clr_fwstate(mlmepriv, WIFI_UNDER_SURVEY); -+ if (wdev_priv->scan_request) -+ indicate_buddy_scan = _TRUE; -+ } -+ _exit_critical_bh(&wdev_priv->scan_req_lock, &irqL); -+ -+ if (indicate_buddy_scan == _TRUE) { -+ rtw_cfg80211_surveydone_event_callback(iface); -+ rtw_indicate_scan_done(iface, bscan_aborted); -+ } -+ -+ } -+ } -+} -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+static int cfg80211_rtw_scan(struct wiphy *wiphy -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) -+ , struct net_device *ndev -+ #endif -+ , struct cfg80211_scan_request *request) -+{ -+ int i; -+ u8 _status = _FALSE; -+ int ret = 0; -+ struct sitesurvey_parm parm; -+ _irqL irqL; -+ u8 survey_times = 3; -+ u8 survey_times_for_one_ch = 6; -+ struct cfg80211_ssid *ssids = request->ssids; -+ int social_channel = 0, j = 0; -+ bool need_indicate_scan_done = _FALSE; -+ bool ps_denied = _FALSE; -+ u8 ssc_chk; -+ _adapter *padapter; -+ struct wireless_dev *wdev; -+ struct rtw_wdev_priv *pwdev_priv; -+ struct mlme_priv *pmlmepriv = NULL; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo; -+#endif /* CONFIG_P2P */ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ wdev = request->wdev; -+ #if defined(RTW_DEDICATED_P2P_DEVICE) -+ if (wdev == wiphy_to_pd_wdev(wiphy)) -+ padapter = wiphy_to_adapter(wiphy); -+ else -+ #endif -+ if (wdev_to_ndev(wdev)) -+ padapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev)); -+ else { -+ ret = -EINVAL; -+ goto exit; -+ } -+#else -+ if (ndev == NULL) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ padapter = (_adapter *)rtw_netdev_priv(ndev); -+ wdev = ndev_to_wdev(ndev); -+#endif -+ -+ pwdev_priv = adapter_wdev_data(padapter); -+ pmlmepriv = &padapter->mlmepriv; -+#ifdef CONFIG_P2P -+ pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ -+ RTW_INFO(FUNC_ADPT_FMT"%s\n", FUNC_ADPT_ARG(padapter) -+ , wdev == wiphy_to_pd_wdev(wiphy) ? " PD" : ""); -+ -+#if 1 -+ ssc_chk = rtw_sitesurvey_condition_check(padapter, _TRUE); -+ -+ if (ssc_chk == SS_DENY_MP_MODE) -+ goto bypass_p2p_chk; -+#ifdef DBG_LA_MODE -+ if (ssc_chk == SS_DENY_LA_MODE) -+ goto bypass_p2p_chk; -+#endif -+#ifdef CONFIG_P2P -+ if (pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (request->n_ssids && ssids -+ && _rtw_memcmp(ssids[0].ssid, "DIRECT-", 7) -+ && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) -+ ) { -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ if (!rtw_p2p_enable(padapter, P2P_ROLE_DEVICE)) { -+ ret = -EOPNOTSUPP; -+ goto exit; -+ } -+ } else { -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -+ #endif -+ } -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); -+ -+ if (request->n_channels == 3 && -+ request->channels[0]->hw_value == 1 && -+ request->channels[1]->hw_value == 6 && -+ request->channels[2]->hw_value == 11 -+ ) -+ social_channel = 1; -+ } -+ } -+#endif /*CONFIG_P2P*/ -+ -+ if (request->ie && request->ie_len > 0) -+ rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len); -+ -+bypass_p2p_chk: -+ -+ switch (ssc_chk) { -+ case SS_ALLOW : -+ break; -+ -+ case SS_DENY_MP_MODE: -+ ret = -EPERM; -+ goto exit; -+ #ifdef DBG_LA_MODE -+ case SS_DENY_LA_MODE: -+ ret = -EPERM; -+ goto exit; -+ #endif -+ #ifdef CONFIG_RTW_REPEATER_SON -+ case SS_DENY_RSON_SCANING : -+ #endif -+ case SS_DENY_BLOCK_SCAN : -+ case SS_DENY_SELF_AP_UNDER_WPS : -+ case SS_DENY_SELF_AP_UNDER_LINKING : -+ case SS_DENY_SELF_AP_UNDER_SURVEY : -+ case SS_DENY_SELF_STA_UNDER_SURVEY : -+ #ifdef CONFIG_CONCURRENT_MODE -+ case SS_DENY_BUDDY_UNDER_LINK_WPS : -+ #endif -+ case SS_DENY_BUSY_TRAFFIC : -+ case SS_DENY_ADAPTIVITY: -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ -+ case SS_DENY_BY_DRV : -+ #ifdef CONFIG_NOTIFY_SCAN_ABORT_WITH_BUSY -+ ret = -EBUSY; -+ goto exit; -+ #else -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ #endif -+ break; -+ -+ case SS_DENY_SELF_STA_UNDER_LINKING : -+ ret = -EBUSY; -+ goto check_need_indicate_scan_done; -+ -+ #ifdef CONFIG_CONCURRENT_MODE -+ case SS_DENY_BUDDY_UNDER_SURVEY : -+ { -+ bool scan_via_buddy = rtw_cfg80211_scan_via_buddy(padapter, request); -+ -+ if (scan_via_buddy == _FALSE) -+ need_indicate_scan_done = _TRUE; -+ -+ goto check_need_indicate_scan_done; -+ } -+ #endif -+ -+ default : -+ RTW_ERR("site survey check code (%d) unknown\n", ssc_chk); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ -+ rtw_ps_deny(padapter, PS_DENY_SCAN); -+ ps_denied = _TRUE; -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ -+#else -+ -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (rtw_mp_mode_check(padapter)) { -+ RTW_INFO("MP mode block Scan request\n"); -+ ret = -EPERM; -+ goto exit; -+ } -+#endif -+ -+#ifdef CONFIG_P2P -+ if (pwdinfo->driver_interface == DRIVER_CFG80211) { -+ if (request->n_ssids && ssids -+ && _rtw_memcmp(ssids[0].ssid, "DIRECT-", 7) -+ && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) -+ ) { -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); -+ else { -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -+ #endif -+ } -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); -+ -+ if (request->n_channels == 3 && -+ request->channels[0]->hw_value == 1 && -+ request->channels[1]->hw_value == 6 && -+ request->channels[2]->hw_value == 11 -+ ) -+ social_channel = 1; -+ } -+ } -+#endif /*CONFIG_P2P*/ -+ -+ if (request->ie && request->ie_len > 0) -+ rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len); -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ if (padapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) { -+ RTW_INFO(FUNC_ADPT_FMT" blocking scan for under rson scanning process\n", FUNC_ADPT_ARG(padapter)); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+#endif -+ -+ if (adapter_wdev_data(padapter)->block_scan == _TRUE) { -+ RTW_INFO(FUNC_ADPT_FMT" wdev_priv.block_scan is set\n", FUNC_ADPT_ARG(padapter)); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ -+ rtw_ps_deny(padapter, PS_DENY_SCAN); -+ ps_denied = _TRUE; -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ -+ if (rtw_is_scan_deny(padapter)) { -+ RTW_INFO(FUNC_ADPT_FMT ": scan deny\n", FUNC_ADPT_ARG(padapter)); -+#ifdef CONFIG_NOTIFY_SCAN_ABORT_WITH_BUSY -+ ret = -EBUSY; -+ goto exit; -+#else -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+#endif -+ } -+ -+ /* check fw state*/ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO(FUNC_ADPT_FMT" under WIFI_AP_STATE\n", FUNC_ADPT_ARG(padapter)); -+#endif -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS | WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING) == _TRUE) { -+ RTW_INFO("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) -+ RTW_INFO("AP mode process WPS\n"); -+ -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE) { -+ RTW_INFO("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } else if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) == _TRUE) { -+ RTW_INFO("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); -+ ret = -EBUSY; -+ goto check_need_indicate_scan_done; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_LINKING | WIFI_UNDER_WPS)) { -+ RTW_INFO("%s exit due to buddy_intf's mlme state under linking or wps\n", __func__); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ -+ } else if (rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_SURVEY)) { -+ bool scan_via_buddy = rtw_cfg80211_scan_via_buddy(padapter, request); -+ -+ if (scan_via_buddy == _FALSE) -+ need_indicate_scan_done = _TRUE; -+ -+ goto check_need_indicate_scan_done; -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+#ifdef RTW_BUSY_DENY_SCAN -+ /* -+ * busy traffic check -+ * Rules: -+ * 1. If (scan interval <= BUSY_TRAFFIC_SCAN_DENY_PERIOD) always allow -+ * scan, otherwise goto rule 2. -+ * 2. Deny scan if any interface is busy, otherwise allow scan. -+ */ -+ if (pmlmepriv->lastscantime -+ && (rtw_get_passing_time_ms(pmlmepriv->lastscantime) > -+ registry_par->scan_interval_thr) -+ && rtw_mi_busy_traffic_check(padapter)) { -+ RTW_WARN(FUNC_ADPT_FMT ": scan abort!! BusyTraffic\n", -+ FUNC_ADPT_ARG(padapter)); -+ need_indicate_scan_done = _TRUE; -+ goto check_need_indicate_scan_done; -+ } -+#endif /* RTW_BUSY_DENY_SCAN */ -+#endif -+ -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); -+ -+ if (social_channel == 0) -+ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); -+ else -+ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); -+ } -+#endif /* CONFIG_P2P */ -+ -+ rtw_init_sitesurvey_parm(padapter, &parm); -+ -+ /* parsing request ssids, n_ssids */ -+ for (i = 0; i < request->n_ssids && ssids && i < RTW_SSID_SCAN_AMOUNT; i++) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("ssid=%s, len=%d\n", ssids[i].ssid, ssids[i].ssid_len); -+ #endif -+ _rtw_memcpy(&parm.ssid[i].Ssid, ssids[i].ssid, ssids[i].ssid_len); -+ parm.ssid[i].SsidLength = ssids[i].ssid_len; -+ } -+ parm.ssid_num = i; -+ -+ /* no ssid entry, set the scan type as passvie */ -+ if (request->n_ssids == 0) -+ parm.scan_mode = SCAN_PASSIVE; -+ -+ /* parsing channels, n_channels */ -+ for (i = 0; i < request->n_channels && i < RTW_CHANNEL_SCAN_AMOUNT; i++) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO(FUNC_ADPT_FMT CHAN_FMT"\n", FUNC_ADPT_ARG(padapter), CHAN_ARG(request->channels[i])); -+ #endif -+ parm.ch[i].hw_value = request->channels[i]->hw_value; -+ parm.ch[i].flags = request->channels[i]->flags; -+ } -+ parm.ch_num = i; -+ -+ if (request->n_channels == 1) { -+ for (i = 1; i < survey_times_for_one_ch; i++) -+ _rtw_memcpy(&parm.ch[i], &parm.ch[0], sizeof(struct rtw_ieee80211_channel)); -+ parm.ch_num = survey_times_for_one_ch; -+ } else if (request->n_channels <= 4) { -+ for (j = request->n_channels - 1; j >= 0; j--) -+ for (i = 0; i < survey_times; i++) -+ _rtw_memcpy(&parm.ch[j * survey_times + i], &parm.ch[j], sizeof(struct rtw_ieee80211_channel)); -+ parm.ch_num = survey_times * request->n_channels; -+ } -+ -+ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ _status = rtw_sitesurvey_cmd(padapter, &parm); -+ if (_status == _SUCCESS) -+ pwdev_priv->scan_request = request; -+ else -+ ret = -1; -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -+ -+check_need_indicate_scan_done: -+ if (_TRUE == need_indicate_scan_done) { -+#if (KERNEL_VERSION(4, 8, 0) <= LINUX_VERSION_CODE) -+ struct cfg80211_scan_info info; -+ -+ memset(&info, 0, sizeof(info)); -+ info.aborted = 0; -+#endif -+ /* the process time of scan results must be over at least 1ms in the newly Android */ -+ rtw_msleep_os(1); -+ -+ _rtw_cfg80211_surveydone_event_callback(padapter, request); -+#if (KERNEL_VERSION(4, 8, 0) <= LINUX_VERSION_CODE) -+ cfg80211_scan_done(request, &info); -+#else -+ cfg80211_scan_done(request, 0); -+#endif -+ } -+ -+ if (ps_denied == _TRUE) -+ rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); -+ -+exit: -+#ifdef RTW_BUSY_DENY_SCAN -+ if (pmlmepriv) -+ pmlmepriv->lastscantime = rtw_get_current_time(); -+#endif -+ -+ return ret; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) && \ -+ defined(CONFIG_RTW_ABORT_SCAN) -+static void cfg80211_rtw_abort_scan(struct wiphy *wiphy, -+ struct wireless_dev *wdev) -+{ -+ _adapter *padapter = wiphy_to_adapter(wiphy); -+ -+ RTW_INFO("=>"FUNC_ADPT_FMT" - Abort Scan\n", FUNC_ADPT_ARG(padapter)); -+ if (wdev->iftype != NL80211_IFTYPE_STATION) { -+ RTW_ERR("abort scan ignored, iftype(%d)\n", wdev->iftype); -+ return; -+ } -+ rtw_scan_abort(padapter); -+} -+#endif -+ -+static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) -+{ -+#if 0 -+ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); -+ -+ if (changed & WIPHY_PARAM_RTS_THRESHOLD && -+ (iwm->conf.rts_threshold != wiphy->rts_threshold)) { -+ int ret; -+ -+ iwm->conf.rts_threshold = wiphy->rts_threshold; -+ -+ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, -+ CFG_RTS_THRESHOLD, -+ iwm->conf.rts_threshold); -+ if (ret < 0) -+ return ret; -+ } -+ -+ if (changed & WIPHY_PARAM_FRAG_THRESHOLD && -+ (iwm->conf.frag_threshold != wiphy->frag_threshold)) { -+ int ret; -+ -+ iwm->conf.frag_threshold = wiphy->frag_threshold; -+ -+ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX, -+ CFG_FRAG_THRESHOLD, -+ iwm->conf.frag_threshold); -+ if (ret < 0) -+ return ret; -+ } -+#endif -+ RTW_INFO("%s\n", __func__); -+ return 0; -+} -+ -+ -+ -+static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 wpa_version) -+{ -+ RTW_INFO("%s, wpa_version=%d\n", __func__, wpa_version); -+ -+ if (!wpa_version) { -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; -+ return 0; -+ } -+ -+ -+ if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2)) -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; -+ -+#if 0 -+ if (wpa_version & NL80211_WPA_VERSION_2) -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; -+#endif -+ -+ #ifdef CONFIG_WAPI_SUPPORT -+ if (wpa_version & NL80211_WAPI_VERSION_1) -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWAPI; -+ #endif -+ -+ return 0; -+ -+} -+ -+static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, -+ enum nl80211_auth_type sme_auth_type) -+{ -+ RTW_INFO("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); -+ -+ if (NL80211_AUTHTYPE_MAX <= (int)MLME_AUTHTYPE_SAE) { -+ if (MLME_AUTHTYPE_SAE == psecuritypriv->auth_type) { -+ /* This case pre handle in -+ * rtw_check_connect_sae_compat() -+ */ -+ psecuritypriv->auth_alg = WLAN_AUTH_SAE; -+ return 0; -+ } -+ } else if (sme_auth_type == (int)MLME_AUTHTYPE_SAE) { -+ psecuritypriv->auth_type = MLME_AUTHTYPE_SAE; -+ psecuritypriv->auth_alg = WLAN_AUTH_SAE; -+ return 0; -+ } -+ -+ psecuritypriv->auth_type = sme_auth_type; -+ -+ switch (sme_auth_type) { -+ case NL80211_AUTHTYPE_AUTOMATIC: -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; -+ -+ break; -+ case NL80211_AUTHTYPE_OPEN_SYSTEM: -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; -+ -+ if (psecuritypriv->ndisauthtype > Ndis802_11AuthModeWPA) -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWAPI) -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; -+#endif -+ -+ break; -+ case NL80211_AUTHTYPE_SHARED_KEY: -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; -+ -+ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ -+ -+ break; -+ default: -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; -+ /* return -ENOTSUPP; */ -+ } -+ -+ return 0; -+ -+} -+ -+static int rtw_cfg80211_set_cipher(struct security_priv *psecuritypriv, u32 cipher, bool ucast) -+{ -+ u32 ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ -+ u32 *profile_cipher = ucast ? &psecuritypriv->dot11PrivacyAlgrthm : -+ &psecuritypriv->dot118021XGrpPrivacy; -+ -+ RTW_INFO("%s, ucast=%d, cipher=0x%x\n", __func__, ucast, cipher); -+ -+ -+ if (!cipher) { -+ *profile_cipher = _NO_PRIVACY_; -+ psecuritypriv->ndisencryptstatus = ndisencryptstatus; -+ return 0; -+ } -+ -+ switch (cipher) { -+ case IW_AUTH_CIPHER_NONE: -+ *profile_cipher = _NO_PRIVACY_; -+ ndisencryptstatus = Ndis802_11EncryptionDisabled; -+#ifdef CONFIG_WAPI_SUPPORT -+ if (psecuritypriv->dot11PrivacyAlgrthm == _SMS4_) -+ *profile_cipher = _SMS4_; -+#endif -+ break; -+ case WLAN_CIPHER_SUITE_WEP40: -+ *profile_cipher = _WEP40_; -+ ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ case WLAN_CIPHER_SUITE_WEP104: -+ *profile_cipher = _WEP104_; -+ ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ case WLAN_CIPHER_SUITE_TKIP: -+ *profile_cipher = _TKIP_; -+ ndisencryptstatus = Ndis802_11Encryption2Enabled; -+ break; -+ case WLAN_CIPHER_SUITE_CCMP: -+ *profile_cipher = _AES_; -+ ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WIFI_CIPHER_SUITE_GCMP: -+ *profile_cipher = _GCMP_; -+ ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WIFI_CIPHER_SUITE_GCMP_256: -+ *profile_cipher = _GCMP_256_; -+ ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WIFI_CIPHER_SUITE_CCMP_256: -+ *profile_cipher = _CCMP_256_; -+ ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+#ifdef CONFIG_WAPI_SUPPORT -+ case WLAN_CIPHER_SUITE_SMS4: -+ *profile_cipher = _SMS4_; -+ ndisencryptstatus = Ndis802_11_EncrypteionWAPI; -+ break; -+#endif -+ default: -+ RTW_INFO("Unsupported cipher: 0x%x\n", cipher); -+ return -ENOTSUPP; -+ } -+ -+ if (ucast) { -+ psecuritypriv->ndisencryptstatus = ndisencryptstatus; -+ -+ /* if(psecuritypriv->dot11PrivacyAlgrthm >= _AES_) */ -+ /* psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; */ -+ } -+ -+ return 0; -+} -+ -+static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key_mgt) -+{ -+ RTW_INFO("%s, key_mgt=0x%x\n", __func__, key_mgt); -+ -+ if (key_mgt == WLAN_AKM_SUITE_8021X) { -+ /* *auth_type = UMAC_AUTH_TYPE_8021X; */ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ psecuritypriv->rsn_akm_suite_type = 1; -+ } else if (key_mgt == WLAN_AKM_SUITE_PSK) { -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ psecuritypriv->rsn_akm_suite_type = 2; -+ } -+#ifdef CONFIG_WAPI_SUPPORT -+ else if (key_mgt == WLAN_AKM_SUITE_WAPI_PSK) -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; -+ else if (key_mgt == WLAN_AKM_SUITE_WAPI_CERT) -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; -+#endif -+#ifdef CONFIG_RTW_80211R -+ else if (key_mgt == WLAN_AKM_SUITE_FT_8021X) { -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ psecuritypriv->rsn_akm_suite_type = 3; -+ } else if (key_mgt == WLAN_AKM_SUITE_FT_PSK) { -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ psecuritypriv->rsn_akm_suite_type = 4; -+ } -+#endif -+ else if (key_mgt == WLAN_AKM_SUITE_SAE) { -+ psecuritypriv->rsn_akm_suite_type = 8; -+ } else { -+ RTW_INFO("Invalid key mgt: 0x%x\n", key_mgt); -+ /* return -EINVAL; */ -+ } -+ -+ return 0; -+} -+ -+static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) -+{ -+ u8 *buf = NULL, *pos = NULL; -+ int group_cipher = 0, pairwise_cipher = 0; -+ u8 mfp_opt = MFP_NO; -+ int ret = 0; -+ int wpa_ielen = 0; -+ int wpa2_ielen = 0; -+ u8 *pwpa, *pwpa2; -+ u8 null_addr[] = {0, 0, 0, 0, 0, 0}; -+ -+ if (pie == NULL || !ielen) { -+ /* Treat this as normal case, but need to clear WIFI_UNDER_WPS */ -+ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ goto exit; -+ } -+ -+ if (ielen > MAX_WPA_IE_LEN + MAX_WPS_IE_LEN + MAX_P2P_IE_LEN) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ buf = rtw_zmalloc(ielen); -+ if (buf == NULL) { -+ ret = -ENOMEM; -+ goto exit; -+ } -+ -+ _rtw_memcpy(buf, pie , ielen); -+ -+ RTW_INFO("set wpa_ie(length:%zu):\n", ielen); -+ RTW_INFO_DUMP(NULL, buf, ielen); -+ -+ pos = buf; -+ if (ielen < RSN_HEADER_LEN) { -+ ret = -1; -+ goto exit; -+ } -+ -+ pwpa = rtw_get_wpa_ie(buf, &wpa_ielen, ielen); -+ if (pwpa && wpa_ielen > 0) { -+ if (rtw_parse_wpa_ie(pwpa, wpa_ielen + 2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPAPSK; -+ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen + 2); -+ -+ RTW_INFO("got wpa_ie, wpa_ielen:%u\n", wpa_ielen); -+ } -+ } -+ -+ pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); -+ if (pwpa2 && wpa2_ielen > 0) { -+ if (rtw_parse_wpa2_ie(pwpa2, wpa2_ielen + 2, &group_cipher, &pairwise_cipher, NULL, NULL, &mfp_opt) == _SUCCESS) { -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPA2PSK; -+ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen + 2); -+ -+ RTW_INFO("got wpa2_ie, wpa2_ielen:%u\n", wpa2_ielen); -+ } -+ } -+ -+ if (group_cipher == 0) -+ group_cipher = WPA_CIPHER_NONE; -+ if (pairwise_cipher == 0) -+ pairwise_cipher = WPA_CIPHER_NONE; -+ -+ switch (group_cipher) { -+ case WPA_CIPHER_NONE: -+ padapter->securitypriv.dot118021XGrpPrivacy = _NO_PRIVACY_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ break; -+ case WPA_CIPHER_WEP40: -+ padapter->securitypriv.dot118021XGrpPrivacy = _WEP40_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ case WPA_CIPHER_TKIP: -+ padapter->securitypriv.dot118021XGrpPrivacy = _TKIP_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; -+ break; -+ case WPA_CIPHER_CCMP: -+ padapter->securitypriv.dot118021XGrpPrivacy = _AES_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_GCMP: -+ padapter->securitypriv.dot118021XGrpPrivacy = _GCMP_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_GCMP_256: -+ padapter->securitypriv.dot118021XGrpPrivacy = _GCMP_256_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_CCMP_256: -+ padapter->securitypriv.dot118021XGrpPrivacy = _CCMP_256_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_WEP104: -+ padapter->securitypriv.dot118021XGrpPrivacy = _WEP104_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ } -+ -+ switch (pairwise_cipher) { -+ case WPA_CIPHER_NONE: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ break; -+ case WPA_CIPHER_WEP40: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _WEP40_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ case WPA_CIPHER_TKIP: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _TKIP_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; -+ break; -+ case WPA_CIPHER_CCMP: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _AES_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_GCMP: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _GCMP_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_GCMP_256: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _GCMP_256_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_CCMP_256: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _CCMP_256_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_WEP104: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _WEP104_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ } -+ -+ if (mfp_opt == MFP_INVALID) { -+ RTW_INFO(FUNC_ADPT_FMT" invalid MFP setting\n", FUNC_ADPT_ARG(padapter)); -+ ret = -EINVAL; -+ goto exit; -+ } -+ padapter->securitypriv.mfp_opt = mfp_opt; -+ -+ {/* handle wps_ie */ -+ uint wps_ielen; -+ u8 *wps_ie; -+ -+ wps_ie = rtw_get_wps_ie(buf, ielen, NULL, &wps_ielen); -+ if (wps_ie && wps_ielen > 0) { -+ RTW_INFO("got wps_ie, wps_ielen:%u\n", wps_ielen); -+ padapter->securitypriv.wps_ie_len = wps_ielen < MAX_WPS_IE_LEN ? wps_ielen : MAX_WPS_IE_LEN; -+ _rtw_memcpy(padapter->securitypriv.wps_ie, wps_ie, padapter->securitypriv.wps_ie_len); -+ set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ } else -+ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ } -+ -+ {/* handle owe_ie */ -+ uint owe_ielen; -+ u8 *owe_ie; -+ -+ owe_ie = rtw_get_owe_ie(buf, ielen, NULL, &owe_ielen); -+ if (owe_ie && owe_ielen > 0) { -+ RTW_INFO("got owe_ie, owe_ielen:%u\n", owe_ielen); -+ padapter->securitypriv.owe_ie_len = owe_ielen < MAX_OWE_IE_LEN ? owe_ielen : MAX_OWE_IE_LEN; -+ _rtw_memcpy(padapter->securitypriv.owe_ie, owe_ie, padapter->securitypriv.owe_ie_len); -+ } -+ } -+ -+ #ifdef CONFIG_P2P -+ {/* check p2p_ie for assoc req; */ -+ uint p2p_ielen = 0; -+ u8 *p2p_ie; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ p2p_ie = rtw_get_p2p_ie(buf, ielen, NULL, &p2p_ielen); -+ if (p2p_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s p2p_assoc_req_ielen=%d\n", __FUNCTION__, p2p_ielen); -+ #endif -+ -+ if (pmlmepriv->p2p_assoc_req_ie) { -+ u32 free_len = pmlmepriv->p2p_assoc_req_ie_len; -+ pmlmepriv->p2p_assoc_req_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_assoc_req_ie, free_len); -+ pmlmepriv->p2p_assoc_req_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_assoc_req_ie = rtw_malloc(p2p_ielen); -+ if (pmlmepriv->p2p_assoc_req_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ goto exit; -+ } -+ _rtw_memcpy(pmlmepriv->p2p_assoc_req_ie, p2p_ie, p2p_ielen); -+ pmlmepriv->p2p_assoc_req_ie_len = p2p_ielen; -+ } -+ } -+ #endif /* CONFIG_P2P */ -+ -+ #ifdef CONFIG_WFD -+ { -+ uint wfd_ielen = 0; -+ u8 *wfd_ie; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ wfd_ie = rtw_get_wfd_ie(buf, ielen, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s wfd_assoc_req_ielen=%d\n", __FUNCTION__, wfd_ielen); -+ #endif -+ -+ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_ASSOC_REQ_IE, wfd_ie, wfd_ielen) != _SUCCESS) -+ goto exit; -+ } -+ } -+ #endif /* CONFIG_WFD */ -+ -+ #ifdef CONFIG_RTW_MULTI_AP -+ padapter->multi_ap = rtw_get_multi_ap_ie_ext(buf, ielen) & MULTI_AP_BACKHAUL_STA; -+ if (padapter->multi_ap) -+ adapter_set_use_wds(padapter, 1); -+ #endif -+ -+ /* TKIP and AES disallow multicast packets until installing group key */ -+ if (padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ -+ || padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ -+ || padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ -+ || padapter->securitypriv.dot11PrivacyAlgrthm == _GCMP_ -+ || padapter->securitypriv.dot11PrivacyAlgrthm == _GCMP_256_ -+ || padapter->securitypriv.dot11PrivacyAlgrthm == _CCMP_256_) -+ /* WPS open need to enable multicast */ -+ /* || check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); -+ -+ -+exit: -+ if (buf) -+ rtw_mfree(buf, ielen); -+ if (ret) -+ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_ibss_params *params) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ NDIS_802_11_SSID ndis_ssid; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ struct cfg80211_chan_def *pch_def; -+#endif -+ struct ieee80211_channel *pch; -+ int ret = 0; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ pch_def = (struct cfg80211_chan_def *)(¶ms->chandef); -+ pch = (struct ieee80211_channel *) pch_def->chan; -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) -+ pch = (struct ieee80211_channel *)(params->channel); -+#endif -+ -+ if (!params->ssid || !params->ssid_len) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (params->ssid_len > IW_ESSID_MAX_SIZE) { -+ ret = -E2BIG; -+ goto exit; -+ } -+ -+ rtw_ps_deny(padapter, PS_DENY_JOIN); -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = -EPERM; -+ goto cancel_ps_deny; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_LINKING)) { -+ RTW_INFO("%s, but buddy_intf is under linking\n", __FUNCTION__); -+ ret = -EINVAL; -+ goto cancel_ps_deny; -+ } -+ rtw_mi_buddy_scan_abort(padapter, _TRUE); /* OR rtw_mi_scan_abort(padapter, _TRUE);*/ -+#endif /*CONFIG_CONCURRENT_MODE*/ -+ -+ -+ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); -+ ndis_ssid.SsidLength = params->ssid_len; -+ _rtw_memcpy(ndis_ssid.Ssid, (u8 *)params->ssid, params->ssid_len); -+ -+ /* RTW_INFO("ssid=%s, len=%zu\n", ndis_ssid.Ssid, params->ssid_len); */ -+ -+ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; /* open system */ -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; -+ -+ ret = rtw_cfg80211_set_auth_type(psecuritypriv, NL80211_AUTHTYPE_OPEN_SYSTEM); -+ rtw_set_802_11_authentication_mode(padapter, psecuritypriv->ndisauthtype); -+ -+ RTW_INFO("%s: center_freq = %d\n", __func__, pch->center_freq); -+ pmlmeext->cur_channel = rtw_freq2ch(pch->center_freq); -+ -+ if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ -+cancel_ps_deny: -+ rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct wireless_dev *rtw_wdev = padapter->rtw_wdev; -+ enum nl80211_iftype old_type; -+ int ret = 0; -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT) -+ rtw_wdev_set_not_indic_disco(adapter_wdev_data(padapter), 1); -+#endif -+ -+ old_type = rtw_wdev->iftype; -+ -+ rtw_set_to_roam(padapter, 0); -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) { -+ rtw_scan_abort(padapter); -+ LeaveAllPowerSaveMode(padapter); -+ -+ rtw_wdev->iftype = NL80211_IFTYPE_STATION; -+ -+ if (rtw_set_802_11_infrastructure_mode(padapter, Ndis802_11Infrastructure, 0) == _FALSE) { -+ rtw_wdev->iftype = old_type; -+ ret = -EPERM; -+ goto leave_ibss; -+ } -+ rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure, RTW_CMDF_WAIT_ACK); -+ } -+ -+leave_ibss: -+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT) -+ rtw_wdev_set_not_indic_disco(adapter_wdev_data(padapter), 0); -+#endif -+ -+ return 0; -+} -+ -+bool rtw_cfg80211_is_connect_requested(_adapter *adapter) -+{ -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); -+ _irqL irqL; -+ bool requested; -+ -+ _enter_critical_bh(&pwdev_priv->connect_req_lock, &irqL); -+ requested = pwdev_priv->connect_req ? 1 : 0; -+ _exit_critical_bh(&pwdev_priv->connect_req_lock, &irqL); -+ -+ return requested; -+} -+ -+static int _rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ -+ /* if(check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) */ -+ { -+ rtw_scan_abort(padapter); -+ rtw_join_abort_timeout(padapter, 300); -+ LeaveAllPowerSaveMode(padapter); -+ rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK); -+#ifdef CONFIG_RTW_REPEATER_SON -+ rtw_rson_do_disconnect(padapter); -+#endif -+ RTW_INFO("%s...call rtw_indicate_disconnect\n", __func__); -+ -+ rtw_free_assoc_resources_cmd(padapter, _TRUE, RTW_CMDF_WAIT_ACK); -+ -+ /* indicate locally_generated = 0 when suspend */ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0)) -+ rtw_indicate_disconnect(padapter, 0, wiphy->dev.power.is_prepared ? _FALSE : _TRUE); -+ #else -+ /* -+ * for kernel < 4.2, DISCONNECT event is hardcoded with -+ * NL80211_ATTR_DISCONNECTED_BY_AP=1 in NL80211 layer -+ * no need to judge if under suspend -+ */ -+ rtw_indicate_disconnect(padapter, 0, _TRUE); -+ #endif -+ -+ rtw_pwr_wakeup(padapter); -+ } -+ return 0; -+} -+ -+#if (KERNEL_VERSION(4, 17, 0) > LINUX_VERSION_CODE) \ -+ && !defined(CONFIG_KERNEL_PATCH_EXTERNAL_AUTH) -+static bool rtw_check_connect_sae_compat(struct cfg80211_connect_params *sme) -+{ -+ struct rtw_ieee802_11_elems elems; -+ struct rsne_info info; -+ u8 AKM_SUITE_SAE[] = { 0x00, 0x0f, 0xac, 8 }; -+ int i; -+ -+ if (sme->auth_type != (int)MLME_AUTHTYPE_SHARED_KEY) -+ return false; -+ -+ if (rtw_ieee802_11_parse_elems((u8 *)sme->ie, sme->ie_len, &elems, 0) -+ == ParseFailed) -+ return false; -+ -+ if (!elems.rsn_ie) -+ return false; -+ -+ if (rtw_rsne_info_parse(elems.rsn_ie - 2, elems.rsn_ie_len + 2, &info) == _FAIL) -+ return false; -+ -+ for (i = 0; i < info.akm_cnt; i++) -+ if (memcmp(info.akm_list + i * RSN_SELECTOR_LEN, -+ AKM_SUITE_SAE, RSN_SELECTOR_LEN) == 0) -+ return true; -+ -+ return false; -+} -+#else -+#define rtw_check_connect_sae_compat(sme) false -+#endif -+ -+static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_connect_params *sme) -+{ -+ int ret = 0; -+ NDIS_802_11_AUTHENTICATION_MODE authmode; -+ NDIS_802_11_SSID ndis_ssid; -+ /* u8 matched_by_bssid=_FALSE; */ -+ /* u8 matched_by_ssid=_FALSE; */ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ _irqL irqL; -+ -+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT) -+ rtw_wdev_set_not_indic_disco(pwdev_priv, 1); -+#endif -+ -+ RTW_INFO("=>"FUNC_NDEV_FMT" - Start to Connection\n", FUNC_NDEV_ARG(ndev)); -+ RTW_INFO("privacy=%d, key=%p, key_len=%d, key_idx=%d, auth_type=%d\n", -+ sme->privacy, sme->key, sme->key_len, sme->key_idx, sme->auth_type); -+ -+ if (rtw_check_connect_sae_compat(sme)) { -+ sme->auth_type = (int)MLME_AUTHTYPE_SAE; -+ psecuritypriv->auth_type = MLME_AUTHTYPE_SAE; -+ psecuritypriv->auth_alg = WLAN_AUTH_SAE; -+ RTW_INFO("%s set sme->auth_type for SAE compat\n", __FUNCTION__); -+ } -+ -+ if (pwdev_priv->block == _TRUE) { -+ ret = -EBUSY; -+ RTW_INFO("%s wdev_priv.block is set\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE | WIFI_UNDER_LINKING) == _TRUE) { -+ -+ _rtw_disconnect(wiphy, ndev); -+ RTW_INFO("%s disconnect before connecting! fw_state=0x%x\n", -+ __FUNCTION__, pmlmepriv->fw_state); -+ } -+ -+#ifdef CONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT -+ printk("MStar Android!\n"); -+ if (pwdev_priv->bandroid_scan == _FALSE) { -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+#endif /* CONFIG_P2P */ -+ { -+ ret = -EBUSY; -+ printk("Android hasn't attached yet!\n"); -+ goto exit; -+ } -+ } -+#endif -+ -+ if (!sme->ssid || !sme->ssid_len) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (sme->ssid_len > IW_ESSID_MAX_SIZE) { -+ ret = -E2BIG; -+ goto exit; -+ } -+ -+ rtw_ps_deny(padapter, PS_DENY_JOIN); -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = -EPERM; -+ goto cancel_ps_deny; -+ } -+ -+ rtw_mi_scan_abort(padapter, _TRUE); -+ -+ rtw_join_abort_timeout(padapter, 300); -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_LINKING)) { -+ ret = -EINVAL; -+ goto cancel_ps_deny; -+ } -+#endif -+ -+ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); -+ ndis_ssid.SsidLength = sme->ssid_len; -+ _rtw_memcpy(ndis_ssid.Ssid, (u8 *)sme->ssid, sme->ssid_len); -+ -+ RTW_INFO("ssid=%s, len=%zu\n", ndis_ssid.Ssid, sme->ssid_len); -+ -+ -+ if (sme->bssid) -+ RTW_INFO("bssid="MAC_FMT"\n", MAC_ARG(sme->bssid)); -+ -+ -+ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; /* open system */ -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; -+ psecuritypriv->auth_alg = WLAN_AUTH_OPEN; -+ psecuritypriv->extauth_status = WLAN_STATUS_UNSPECIFIED_FAILURE; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ padapter->wapiInfo.bWapiEnable = false; -+#endif -+ -+ ret = rtw_cfg80211_set_wpa_version(psecuritypriv, sme->crypto.wpa_versions); -+ if (ret < 0) -+ goto cancel_ps_deny; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (sme->crypto.wpa_versions & NL80211_WAPI_VERSION_1) { -+ padapter->wapiInfo.bWapiEnable = true; -+ padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; -+ padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; -+ } -+#endif -+ -+ ret = rtw_cfg80211_set_auth_type(psecuritypriv, sme->auth_type); -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_WAPI) -+ padapter->mlmeextpriv.mlmext_info.auth_algo = psecuritypriv->dot11AuthAlgrthm; -+#endif -+ -+ -+ if (ret < 0) -+ goto cancel_ps_deny; -+ -+ RTW_INFO("%s, ie_len=%zu\n", __func__, sme->ie_len); -+ -+ ret = rtw_cfg80211_set_wpa_ie(padapter, (u8 *)sme->ie, sme->ie_len); -+ if (ret < 0) -+ goto cancel_ps_deny; -+ -+ if (sme->crypto.n_ciphers_pairwise) { -+ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.ciphers_pairwise[0], _TRUE); -+ if (ret < 0) -+ goto cancel_ps_deny; -+ } -+ -+ /* For WEP Shared auth */ -+ if (sme->key_len > 0 && sme->key) { -+ u32 wep_key_idx, wep_key_len, wep_total_len; -+ NDIS_802_11_WEP *pwep = NULL; -+ RTW_INFO("%s(): Shared/Auto WEP\n", __FUNCTION__); -+ -+ wep_key_idx = sme->key_idx; -+ wep_key_len = sme->key_len; -+ -+ if (sme->key_idx > WEP_KEYS) { -+ ret = -EINVAL; -+ goto cancel_ps_deny; -+ } -+ -+ if (wep_key_len > 0) { -+ wep_key_len = wep_key_len <= 5 ? 5 : 13; -+ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); -+ pwep = (NDIS_802_11_WEP *) rtw_malloc(wep_total_len); -+ if (pwep == NULL) { -+ RTW_INFO(" wpa_set_encryption: pwep allocate fail !!!\n"); -+ ret = -ENOMEM; -+ goto cancel_ps_deny; -+ } -+ -+ _rtw_memset(pwep, 0, wep_total_len); -+ -+ pwep->KeyLength = wep_key_len; -+ pwep->Length = wep_total_len; -+ -+ if (wep_key_len == 13) { -+ padapter->securitypriv.dot11PrivacyAlgrthm = _WEP104_; -+ padapter->securitypriv.dot118021XGrpPrivacy = _WEP104_; -+ } -+ } else { -+ ret = -EINVAL; -+ goto cancel_ps_deny; -+ } -+ -+ pwep->KeyIndex = wep_key_idx; -+ pwep->KeyIndex |= 0x80000000; -+ -+ _rtw_memcpy(pwep->KeyMaterial, (void *)sme->key, pwep->KeyLength); -+ -+ if (rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) -+ ret = -EOPNOTSUPP ; -+ -+ if (pwep) -+ rtw_mfree((u8 *)pwep, wep_total_len); -+ -+ if (ret < 0) -+ goto cancel_ps_deny; -+ } -+ -+ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.cipher_group, _FALSE); -+ if (ret < 0) -+ return ret; -+ -+ if (sme->crypto.n_akm_suites) { -+ ret = rtw_cfg80211_set_key_mgt(psecuritypriv, sme->crypto.akm_suites[0]); -+ if (ret < 0) -+ goto cancel_ps_deny; -+ } -+#ifdef CONFIG_8011R -+ else { -+ /*It could be a connection without RSN IEs*/ -+ psecuritypriv->rsn_akm_suite_type = 0; -+ } -+#endif -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (sme->crypto.akm_suites[0] == WLAN_AKM_SUITE_WAPI_PSK) -+ padapter->wapiInfo.bWapiPSK = true; -+ else if (sme->crypto.akm_suites[0] == WLAN_AKM_SUITE_WAPI_CERT) -+ padapter->wapiInfo.bWapiPSK = false; -+#endif -+ -+ authmode = psecuritypriv->ndisauthtype; -+ rtw_set_802_11_authentication_mode(padapter, authmode); -+ -+ /* rtw_set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); */ -+ -+#ifdef CONFIG_RTW_MBO -+ rtw_mbo_update_ie_data(padapter, (u8 *)sme->ie, sme->ie_len); -+#endif -+ -+ if (rtw_set_802_11_connect(padapter, (u8 *)sme->bssid, &ndis_ssid, \ -+ sme->channel ? sme->channel->hw_value : 0) == _FALSE) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ -+ -+ _enter_critical_bh(&pwdev_priv->connect_req_lock, &irqL); -+ -+ if (pwdev_priv->connect_req) { -+ rtw_wdev_free_connect_req(pwdev_priv); -+ RTW_INFO(FUNC_NDEV_FMT" free existing connect_req\n", FUNC_NDEV_ARG(ndev)); -+ } -+ -+ pwdev_priv->connect_req = (struct cfg80211_connect_params *)rtw_malloc(sizeof(*pwdev_priv->connect_req)); -+ if (pwdev_priv->connect_req) -+ _rtw_memcpy(pwdev_priv->connect_req, sme, sizeof(*pwdev_priv->connect_req)); -+ else -+ RTW_WARN(FUNC_NDEV_FMT" alloc connect_req fail\n", FUNC_NDEV_ARG(ndev)); -+ -+ _exit_critical_bh(&pwdev_priv->connect_req_lock, &irqL); -+ -+ RTW_INFO("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, -+ psecuritypriv->dot118021XGrpPrivacy); -+ -+cancel_ps_deny: -+ rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); -+ -+exit: -+ RTW_INFO("<=%s, ret %d\n", __FUNCTION__, ret); -+ -+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT) -+ rtw_wdev_set_not_indic_disco(pwdev_priv, 0); -+#endif -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev, -+ u16 reason_code) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ RTW_INFO(FUNC_NDEV_FMT" - Start to Disconnect\n", FUNC_NDEV_ARG(ndev)); -+ -+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT) -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ if (!wiphy->dev.power.is_prepared) -+ #endif -+ rtw_wdev_set_not_indic_disco(adapter_wdev_data(padapter), 1); -+#endif -+ -+ rtw_set_to_roam(padapter, 0); -+ -+ /* if(check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) */ -+ { -+ _rtw_disconnect(wiphy, ndev); -+ } -+ -+#if (RTW_CFG80211_BLOCK_STA_DISCON_EVENT & RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT) -+ rtw_wdev_set_not_indic_disco(adapter_wdev_data(padapter), 0); -+#endif -+ -+ RTW_INFO(FUNC_NDEV_FMT" return 0\n", FUNC_NDEV_ARG(ndev)); -+ return 0; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) -+#ifdef CONFIG_RTW_DEBUG -+static const char *nl80211_tx_power_setting_str(int type) -+{ -+ switch (type) { -+ case NL80211_TX_POWER_AUTOMATIC: -+ return "AUTO"; -+ case NL80211_TX_POWER_LIMITED: -+ return "LIMIT"; -+ case NL80211_TX_POWER_FIXED: -+ return "FIX"; -+ default: -+ return "UNKNOWN"; -+ }; -+} -+#endif /* CONFIG_RTW_DEBUG */ -+ -+static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ struct wireless_dev *wdev, -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) || defined(COMPAT_KERNEL_RELEASE) -+ enum nl80211_tx_power_setting type, int mbm) -+#else -+ enum tx_power_setting type, int dbm) -+#endif -+{ -+#if !((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) || defined(COMPAT_KERNEL_RELEASE)) -+ int mbm = dbm * 100; -+#endif -+ struct rtw_wiphy_data *wiphy_data = rtw_wiphy_priv(wiphy); -+ _adapter *adapter = wiphy_to_adapter(wiphy); -+ int ret = -EOPNOTSUPP; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ if (wdev) { -+ RTW_WARN(FUNC_WIPHY_FMT" wdev specific control is not supported\n", FUNC_WIPHY_ARG(wiphy)); -+ goto exit; -+ } -+#endif -+ -+ RTW_INFO(FUNC_WIPHY_FMT" type:%s(%u) mbm:%d\n", FUNC_WIPHY_ARG(wiphy) -+ , nl80211_tx_power_setting_str(type), type, mbm); -+ -+ switch (type) { -+ case NL80211_TX_POWER_AUTOMATIC: -+ wiphy_data->txpwr_total_lmt_mbm = UNSPECIFIED_MBM; -+ wiphy_data->txpwr_total_target_mbm = UNSPECIFIED_MBM; -+ ret = 0; -+ break; -+ case NL80211_TX_POWER_LIMITED: -+ if (!phy_is_txpwr_user_mbm_valid(adapter, mbm)) { -+ RTW_WARN(FUNC_WIPHY_FMT" mbm:%d not support\n", FUNC_WIPHY_ARG(wiphy), mbm); -+ goto exit; -+ } -+ wiphy_data->txpwr_total_lmt_mbm = mbm; -+ wiphy_data->txpwr_total_target_mbm = UNSPECIFIED_MBM; -+ ret = 0; -+ break; -+ case NL80211_TX_POWER_FIXED: -+ if (!phy_is_txpwr_user_mbm_valid(adapter, mbm)) { -+ RTW_WARN(FUNC_WIPHY_FMT" mbm:%d not support\n", FUNC_WIPHY_ARG(wiphy), mbm); -+ goto exit; -+ } -+ wiphy_data->txpwr_total_lmt_mbm = UNSPECIFIED_MBM; -+ wiphy_data->txpwr_total_target_mbm = mbm; -+ ret = 0; -+ break; -+ default: -+ RTW_WARN(FUNC_WIPHY_FMT" unknown type:%d\n", FUNC_WIPHY_ARG(wiphy), type); -+ } -+ -+ if (ret == 0) -+ rtw_run_in_thread_cmd_wait(adapter, ((void *)(rtw_hal_update_txpwr_level)), adapter, 2000); -+ -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ struct wireless_dev *wdev, -+#endif -+ int *dbm) -+{ -+ struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy); -+ s16 mbm; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ if (wdev && wdev_to_ndev(wdev)) { -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev)); -+ mbm = rtw_adapter_get_oper_txpwr_max_mbm(adapter, 1); -+ RTW_INFO(FUNC_ADPT_FMT" total max: %d mbm\n", FUNC_ADPT_ARG(adapter), mbm); -+ } else -+#endif -+ { -+ mbm = rtw_get_oper_txpwr_max_mbm(dvobj, 1); -+ RTW_INFO(FUNC_WIPHY_FMT" total max: %d mbm\n", FUNC_WIPHY_ARG(wiphy), mbm); -+ } -+ -+ *dbm = mbm / MBM_PDBM; -+ -+ return 0; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) */ -+ -+inline bool rtw_cfg80211_pwr_mgmt(_adapter *adapter) -+{ -+ struct rtw_wdev_priv *rtw_wdev_priv = adapter_wdev_data(adapter); -+ struct wireless_dev *wdev = rtw_wdev_priv->rtw_wdev; -+ -+ return wdev->ps; -+} -+ -+static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, -+ struct net_device *ndev, -+ bool enabled, int timeout) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ RTW_INFO(FUNC_NDEV_FMT" enabled:%u, timeout:%d\n", FUNC_NDEV_ARG(ndev), -+ enabled, timeout); -+ -+#ifdef CONFIG_LPS -+ if (!enabled) -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE_CFG80211_PWRMGMT, 0); -+#endif -+ -+ return 0; -+} -+ -+static void _rtw_set_pmksa(struct net_device *ndev, -+ u8 *bssid, u8 *pmkid) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ u8 index, blInserted = _FALSE; -+ -+ /* overwrite PMKID */ -+ for (index = 0 ; index < NUM_PMKID_CACHE; index++) { -+ if (_rtw_memcmp(psecuritypriv->PMKIDList[index].Bssid, bssid, ETH_ALEN) == _TRUE) { -+ /* BSSID is matched, the same AP => rewrite with new PMKID. */ -+ RTW_INFO("BSSID("MAC_FMT") exists in the PMKList.\n", MAC_ARG(bssid)); -+ -+ _rtw_memcpy(psecuritypriv->PMKIDList[index].PMKID, pmkid, WLAN_PMKID_LEN); -+ psecuritypriv->PMKIDList[index].bUsed = _TRUE; -+ psecuritypriv->PMKIDIndex = index + 1; -+ blInserted = _TRUE; -+ break; -+ } -+ } -+ -+ if (!blInserted) { -+ /* Find a new entry */ -+ RTW_INFO("Use the new entry index = %d for this PMKID.\n", -+ psecuritypriv->PMKIDIndex); -+ -+ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, bssid, ETH_ALEN); -+ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, pmkid, WLAN_PMKID_LEN); -+ -+ psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].bUsed = _TRUE; -+ psecuritypriv->PMKIDIndex++ ; -+ if (psecuritypriv->PMKIDIndex == 16) -+ psecuritypriv->PMKIDIndex = 0; -+ } -+} -+ -+static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, -+ struct net_device *ndev, -+ struct cfg80211_pmksa *pmksa) -+{ -+ u8 index, blInserted = _FALSE; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *mlme = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ u8 strZeroMacAddress[ETH_ALEN] = { 0x00 }; -+ bool sae_auth = rtw_sec_chk_auth_type(padapter, MLME_AUTHTYPE_SAE); -+ -+ RTW_INFO(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) -+ , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); -+ -+ if (_rtw_memcmp((u8 *)pmksa->bssid, strZeroMacAddress, ETH_ALEN) == _TRUE) -+ return -EINVAL; -+ -+ _rtw_set_pmksa(ndev, (u8 *)pmksa->bssid, (u8 *)pmksa->pmkid); -+ -+ if (sae_auth && -+ (psecuritypriv->extauth_status == WLAN_STATUS_SUCCESS)) { -+ RTW_PRINT("SAE: auth success, start assoc\n"); -+ start_clnt_assoc(padapter); -+ } -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_del_pmksa(struct wiphy *wiphy, -+ struct net_device *ndev, -+ struct cfg80211_pmksa *pmksa) -+{ -+ u8 index, bMatched = _FALSE; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ RTW_INFO(FUNC_NDEV_FMT" "MAC_FMT" "KEY_FMT"\n", FUNC_NDEV_ARG(ndev) -+ , MAC_ARG(pmksa->bssid), KEY_ARG(pmksa->pmkid)); -+ -+ for (index = 0 ; index < NUM_PMKID_CACHE; index++) { -+ if (_rtw_memcmp(psecuritypriv->PMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN) == _TRUE) { -+ /* BSSID is matched, the same AP => Remove this PMKID information and reset it. */ -+ _rtw_memset(psecuritypriv->PMKIDList[index].Bssid, 0x00, ETH_ALEN); -+ _rtw_memset(psecuritypriv->PMKIDList[index].PMKID, 0x00, WLAN_PMKID_LEN); -+ psecuritypriv->PMKIDList[index].bUsed = _FALSE; -+ bMatched = _TRUE; -+ RTW_INFO(FUNC_NDEV_FMT" clear id:%hhu\n", FUNC_NDEV_ARG(ndev), index); -+ break; -+ } -+ } -+ -+ if (_FALSE == bMatched) { -+ RTW_INFO(FUNC_NDEV_FMT" do not have matched BSSID\n" -+ , FUNC_NDEV_ARG(ndev)); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, -+ struct net_device *ndev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ _rtw_memset(&psecuritypriv->PMKIDList[0], 0x00, sizeof(RT_PMKID_LIST) * NUM_PMKID_CACHE); -+ psecuritypriv->PMKIDIndex = 0; -+ -+ return 0; -+} -+ -+static int rtw_cfg80211_monitor_if_open(struct net_device *ndev) -+{ -+ int ret = 0; -+ -+ RTW_INFO("%s\n", __func__); -+ -+ return ret; -+} -+ -+static int rtw_cfg80211_monitor_if_close(struct net_device *ndev) -+{ -+ int ret = 0; -+ -+ RTW_INFO("%s\n", __func__); -+ -+ return ret; -+} -+ -+static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_device *ndev) -+{ -+ int ret = 0; -+ int rtap_len; -+ int qos_len = 0; -+ int dot11_hdr_len = 24; -+ int snap_len = 6; -+ unsigned char *pdata; -+ u16 frame_ctl; -+ unsigned char src_mac_addr[ETH_ALEN]; -+ unsigned char dst_mac_addr[ETH_ALEN]; -+ struct rtw_ieee80211_hdr *dot11_hdr; -+ struct ieee80211_radiotap_header *rtap_hdr; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+#ifdef CONFIG_DFS_MASTER -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+#endif -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); -+ -+ if (IS_CH_WAITING(rfctl)) { -+ #ifdef CONFIG_DFS_MASTER -+ if (rtw_rfctl_overlap_radar_detect_ch(rfctl)) -+ goto fail; -+ #endif -+ } -+ -+ if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) -+ goto fail; -+ -+ rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; -+ if (unlikely(rtap_hdr->it_version)) -+ goto fail; -+ -+ rtap_len = ieee80211_get_radiotap_len(skb->data); -+ if (unlikely(skb->len < rtap_len)) -+ goto fail; -+ -+ if (rtap_len != 14) { -+ RTW_INFO("radiotap len (should be 14): %d\n", rtap_len); -+ goto fail; -+ } -+ -+ /* Skip the ratio tap header */ -+ skb_pull(skb, rtap_len); -+ -+ dot11_hdr = (struct rtw_ieee80211_hdr *)skb->data; -+ frame_ctl = le16_to_cpu(dot11_hdr->frame_ctl); -+ /* Check if the QoS bit is set */ -+ if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { -+ /* Check if this ia a Wireless Distribution System (WDS) frame -+ * which has 4 MAC addresses -+ */ -+ if (dot11_hdr->frame_ctl & 0x0080) -+ qos_len = 2; -+ if ((dot11_hdr->frame_ctl & 0x0300) == 0x0300) -+ dot11_hdr_len += 6; -+ -+ memcpy(dst_mac_addr, dot11_hdr->addr1, sizeof(dst_mac_addr)); -+ memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); -+ -+ /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for -+ * for two MAC addresses -+ */ -+ skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); -+ pdata = (unsigned char *)skb->data; -+ memcpy(pdata, dst_mac_addr, sizeof(dst_mac_addr)); -+ memcpy(pdata + sizeof(dst_mac_addr), src_mac_addr, sizeof(src_mac_addr)); -+ -+ RTW_INFO("should be eapol packet\n"); -+ -+ /* Use the real net device to transmit the packet */ -+ ret = _rtw_xmit_entry(skb, padapter->pnetdev); -+ -+ return ret; -+ -+ } else if ((frame_ctl & (RTW_IEEE80211_FCTL_FTYPE | RTW_IEEE80211_FCTL_STYPE)) -+ == (RTW_IEEE80211_FTYPE_MGMT | RTW_IEEE80211_STYPE_ACTION) -+ ) { -+ /* only for action frames */ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ /* u8 category, action, OUI_Subtype, dialogToken=0; */ -+ /* unsigned char *frame_body; */ -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ u8 *buf = skb->data; -+ u32 len = skb->len; -+ u8 category, action; -+ int type = -1; -+ -+ if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { -+ RTW_INFO(FUNC_NDEV_FMT" frame_control:0x%x\n", FUNC_NDEV_ARG(ndev), -+ le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); -+ goto fail; -+ } -+ -+ RTW_INFO("RTW_Tx:da="MAC_FMT" via "FUNC_NDEV_FMT"\n", -+ MAC_ARG(GetAddr1Ptr(buf)), FUNC_NDEV_ARG(ndev)); -+ #ifdef CONFIG_P2P -+ type = rtw_p2p_check_frames(padapter, buf, len, _TRUE); -+ if (type >= 0) -+ goto dump; -+ #endif -+ if (category == RTW_WLAN_CATEGORY_PUBLIC) -+ RTW_INFO("RTW_Tx:%s\n", action_public_str(action)); -+ else -+ RTW_INFO("RTW_Tx:category(%u), action(%u)\n", category, action); -+#ifdef CONFIG_P2P -+dump: -+#endif -+ /* starting alloc mgmt frame to dump it */ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ goto fail; -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ pattrib->retry_ctrl = _FALSE; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ _rtw_memcpy(pframe, (void *)buf, len); -+ pattrib->pktlen = len; -+ -+#ifdef CONFIG_P2P -+ if (type >= 0) -+ rtw_xframe_chk_wfd_ie(pmgntframe); -+#endif /* CONFIG_P2P */ -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ /* update seq number */ -+ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); -+ pattrib->seqnum = pmlmeext->mgnt_seq; -+ pmlmeext->mgnt_seq++; -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ dump_mgntframe(padapter, pmgntframe); -+ -+ } else -+ RTW_INFO("frame_ctl=0x%x\n", frame_ctl & (RTW_IEEE80211_FCTL_FTYPE | RTW_IEEE80211_FCTL_STYPE)); -+ -+ -+fail: -+ -+ rtw_skb_free(skb); -+ -+ return 0; -+ -+} -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0)) -+static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) -+{ -+ RTW_INFO("%s\n", __func__); -+} -+#endif -+static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) -+{ -+ int ret = 0; -+ -+ RTW_INFO("%s\n", __func__); -+ -+ return ret; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { -+ .ndo_open = rtw_cfg80211_monitor_if_open, -+ .ndo_stop = rtw_cfg80211_monitor_if_close, -+ .ndo_start_xmit = rtw_cfg80211_monitor_if_xmit_entry, -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0)) -+ .ndo_set_multicast_list = rtw_cfg80211_monitor_if_set_multicast_list, -+ #endif -+ .ndo_set_mac_address = rtw_cfg80211_monitor_if_set_mac_address, -+}; -+#endif -+ -+static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, struct net_device **ndev) -+{ -+ int ret = 0; -+ struct net_device *mon_ndev = NULL; -+ struct wireless_dev *mon_wdev = NULL; -+ struct rtw_netdev_priv_indicator *pnpi; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ -+ if (!name) { -+ RTW_INFO(FUNC_ADPT_FMT" without specific name\n", FUNC_ADPT_ARG(padapter)); -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ if (pwdev_priv->pmon_ndev) { -+ RTW_INFO(FUNC_ADPT_FMT" monitor interface exist: "NDEV_FMT"\n", -+ FUNC_ADPT_ARG(padapter), NDEV_ARG(pwdev_priv->pmon_ndev)); -+ ret = -EBUSY; -+ goto out; -+ } -+ -+ mon_ndev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); -+ if (!mon_ndev) { -+ RTW_INFO(FUNC_ADPT_FMT" allocate ndev fail\n", FUNC_ADPT_ARG(padapter)); -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP; -+ strncpy(mon_ndev->name, name, IFNAMSIZ); -+ mon_ndev->name[IFNAMSIZ - 1] = 0; -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(4, 11, 8)) -+ mon_ndev->priv_destructor = rtw_ndev_destructor; -+#else -+ mon_ndev->destructor = rtw_ndev_destructor; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+ mon_ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; -+#else -+ mon_ndev->open = rtw_cfg80211_monitor_if_open; -+ mon_ndev->stop = rtw_cfg80211_monitor_if_close; -+ mon_ndev->hard_start_xmit = rtw_cfg80211_monitor_if_xmit_entry; -+ mon_ndev->set_mac_address = rtw_cfg80211_monitor_if_set_mac_address; -+#endif -+ -+ pnpi = netdev_priv(mon_ndev); -+ pnpi->priv = padapter; -+ pnpi->sizeof_priv = sizeof(_adapter); -+ -+ /* wdev */ -+ mon_wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); -+ if (!mon_wdev) { -+ RTW_INFO(FUNC_ADPT_FMT" allocate mon_wdev fail\n", FUNC_ADPT_ARG(padapter)); -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ mon_wdev->wiphy = padapter->rtw_wdev->wiphy; -+ mon_wdev->netdev = mon_ndev; -+ mon_wdev->iftype = NL80211_IFTYPE_MONITOR; -+ mon_ndev->ieee80211_ptr = mon_wdev; -+ -+ ret = register_netdevice(mon_ndev); -+ if (ret) -+ goto out; -+ -+ *ndev = pwdev_priv->pmon_ndev = mon_ndev; -+ _rtw_memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ + 1); -+ -+out: -+ if (ret && mon_wdev) { -+ rtw_mfree((u8 *)mon_wdev, sizeof(struct wireless_dev)); -+ mon_wdev = NULL; -+ } -+ -+ if (ret && mon_ndev) { -+ free_netdev(mon_ndev); -+ *ndev = mon_ndev = NULL; -+ } -+ -+ return ret; -+} -+ -+#ifdef CONFIG_AP_MODE -+void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) -+{ -+#if !defined(RTW_USE_CFG80211_STA_EVENT) && !defined(COMPAT_KERNEL_RELEASE) -+ s32 freq; -+ int channel; -+ struct wireless_dev *pwdev = padapter->rtw_wdev; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+#endif -+ struct net_device *ndev = padapter->pnetdev; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) -+ { -+ struct station_info sinfo; -+ u8 ie_offset; -+ if (get_frame_sub_type(pmgmt_frame) == WIFI_ASSOCREQ) -+ ie_offset = _ASOCREQ_IE_OFFSET_; -+ else /* WIFI_REASSOCREQ */ -+ ie_offset = _REASOCREQ_IE_OFFSET_; -+ -+ memset(&sinfo, 0, sizeof(sinfo)); -+ sinfo.filled = STATION_INFO_ASSOC_REQ_IES; -+ sinfo.assoc_req_ies = pmgmt_frame + WLAN_HDR_A3_LEN + ie_offset; -+ sinfo.assoc_req_ies_len = frame_len - WLAN_HDR_A3_LEN - ie_offset; -+ cfg80211_new_sta(ndev, get_addr2_ptr(pmgmt_frame), &sinfo, GFP_ATOMIC); -+ } -+#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ -+ channel = pmlmeext->cur_channel; -+ freq = rtw_ch2freq(channel); -+ -+ #ifdef COMPAT_KERNEL_RELEASE -+ rtw_cfg80211_rx_mgmt(pwdev, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); -+ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) -+ rtw_cfg80211_rx_mgmt(pwdev, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); -+ #else /* COMPAT_KERNEL_RELEASE */ -+ { -+ /* to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION) when calling cfg80211_send_rx_assoc() */ -+ #ifndef CONFIG_PLATFORM_MSTAR -+ pwdev->iftype = NL80211_IFTYPE_STATION; -+ #endif /* CONFIG_PLATFORM_MSTAR */ -+ RTW_INFO("iftype=%d before call cfg80211_send_rx_assoc()\n", pwdev->iftype); -+ rtw_cfg80211_send_rx_assoc(padapter, NULL, pmgmt_frame, frame_len); -+ RTW_INFO("iftype=%d after call cfg80211_send_rx_assoc()\n", pwdev->iftype); -+ pwdev->iftype = NL80211_IFTYPE_AP; -+ /* cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); */ -+ } -+ #endif /* COMPAT_KERNEL_RELEASE */ -+#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ -+ -+} -+ -+void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, const u8 *da, unsigned short reason) -+{ -+#if !defined(RTW_USE_CFG80211_STA_EVENT) && !defined(COMPAT_KERNEL_RELEASE) -+ s32 freq; -+ int channel; -+ u8 *pmgmt_frame; -+ uint frame_len; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ u8 mgmt_buf[128] = {0}; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct wireless_dev *wdev = padapter->rtw_wdev; -+#endif -+ struct net_device *ndev = padapter->pnetdev; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) -+ cfg80211_del_sta(ndev, da, GFP_ATOMIC); -+#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ -+ channel = pmlmeext->cur_channel; -+ freq = rtw_ch2freq(channel); -+ -+ pmgmt_frame = mgmt_buf; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pmgmt_frame; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, da, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pmgmt_frame, WIFI_DEAUTH); -+ -+ pmgmt_frame += sizeof(struct rtw_ieee80211_hdr_3addr); -+ frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ reason = cpu_to_le16(reason); -+ pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); -+ -+ #ifdef COMPAT_KERNEL_RELEASE -+ rtw_cfg80211_rx_mgmt(wdev, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); -+ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) -+ rtw_cfg80211_rx_mgmt(wdev, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); -+ #else /* COMPAT_KERNEL_RELEASE */ -+ cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len); -+ /* cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); */ -+ #endif /* COMPAT_KERNEL_RELEASE */ -+#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ -+} -+ -+static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, const u8 *tail, size_t tail_len) -+{ -+ int ret = 0; -+ u8 *pbuf = NULL; -+ uint len, wps_ielen = 0; -+ uint p2p_ielen = 0; -+ u8 got_p2p_ie = _FALSE; -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ /* struct sta_priv *pstapriv = &padapter->stapriv; */ -+ -+ -+ RTW_INFO("%s beacon_head_len=%zu, beacon_tail_len=%zu\n", __FUNCTION__, head_len, tail_len); -+ -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EINVAL; -+ -+ if (head_len < 24) -+ return -EINVAL; -+ -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ if (!rtw_ap_nums_check(adapter)) { -+ RTW_ERR(FUNC_ADPT_FMT"failed, con't support over %d BCN\n", FUNC_ADPT_ARG(adapter), CONFIG_LIMITED_AP_NUM); -+ return -EINVAL; -+ } -+ #endif /*CONFIG_FW_HANDLE_TXBCN*/ -+ -+ pbuf = rtw_zmalloc(head_len + tail_len); -+ if (!pbuf) { -+ ret = -ENOMEM; -+ goto exit; -+ } -+ -+ -+ /* _rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); */ -+ -+ /* if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) */ -+ /* pstapriv->max_num_sta = NUM_STA; */ -+ -+ -+ _rtw_memcpy(pbuf, (void *)head + 24, head_len - 24); /* 24=beacon header len. */ -+ _rtw_memcpy(pbuf + head_len - 24, (void *)tail, tail_len); -+ -+ len = head_len + tail_len - 24; -+ -+ /* check wps ie if inclued */ -+ if (rtw_get_wps_ie(pbuf + _FIXED_IE_LENGTH_, len - _FIXED_IE_LENGTH_, NULL, &wps_ielen)) -+ RTW_INFO("add bcn, wps_ielen=%d\n", wps_ielen); -+ -+#ifdef CONFIG_P2P -+ if (adapter->wdinfo.driver_interface == DRIVER_CFG80211) { -+ /* check p2p if enable */ -+ if (rtw_get_p2p_ie(pbuf + _FIXED_IE_LENGTH_, len - _FIXED_IE_LENGTH_, NULL, &p2p_ielen)) { -+ struct wifidirect_info *pwdinfo = &(adapter->wdinfo); -+ -+ RTW_INFO("got p2p_ie, len=%d\n", p2p_ielen); -+ -+ got_p2p_ie = _TRUE; -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ -+ if (rtw_p2p_enable(adapter, P2P_ROLE_GO)) { -+ RTW_INFO("Enable P2P function for the first time\n"); -+ adapter->stapriv.expire_to = 3; /* 3x2 = 6 sec in p2p mode */ -+ } else { -+ ret = -EOPNOTSUPP; -+ goto exit; -+ } -+ } else { -+ RTW_INFO("enter GO Mode, p2p_ielen=%d\n", p2p_ielen); -+ -+ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); -+ pwdinfo->intent = 15; -+ } -+ } -+ } -+#endif /* CONFIG_P2P */ -+ -+ /* pbss_network->IEs will not include p2p_ie, wfd ie */ -+ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, P2P_OUI, 4); -+ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, WFD_OUI, 4); -+ -+ if (rtw_check_beacon_data(adapter, pbuf, len) == _SUCCESS) { -+#ifdef CONFIG_P2P -+ /* check p2p if enable */ -+ if (got_p2p_ie == _TRUE) { -+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; -+ struct wifidirect_info *pwdinfo = &(adapter->wdinfo); -+ pwdinfo->operating_channel = pmlmeext->cur_channel; -+ } -+#endif /* CONFIG_P2P */ -+ ret = 0; -+ } else -+ ret = -EINVAL; -+ -+exit: -+ if (pbuf) -+ rtw_mfree(pbuf, head_len + tail_len); -+ -+ return ret; -+} -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) -+static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *ndev, -+ struct beacon_parameters *info) -+{ -+ int ret = 0; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ if (rtw_cfg80211_sync_iftype(adapter) != _SUCCESS) { -+ ret = -ENOTSUPP; -+ goto exit; -+ } -+ rtw_mi_scan_abort(adapter, _TRUE); -+ rtw_mi_buddy_set_scan_deny(adapter, 300); -+ ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); -+ -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_set_beacon(struct wiphy *wiphy, struct net_device *ndev, -+ struct beacon_parameters *info) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ pmlmeext->bstart_bss = _TRUE; -+ -+ cfg80211_rtw_add_beacon(wiphy, ndev, info); -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_del_beacon(struct wiphy *wiphy, struct net_device *ndev) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ rtw_stop_ap_cmd(adapter, RTW_CMDF_WAIT_ACK); -+ return 0; -+} -+#else -+static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_ap_settings *settings) -+{ -+ int ret = 0; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ RTW_INFO(FUNC_NDEV_FMT" hidden_ssid:%d, auth_type:%d\n", FUNC_NDEV_ARG(ndev), -+ settings->hidden_ssid, settings->auth_type); -+ -+ if (rtw_cfg80211_sync_iftype(adapter) != _SUCCESS) { -+ ret = -ENOTSUPP; -+ goto exit; -+ } -+ -+ /* Kernel < v5.x, the auth_type set as NL80211_AUTHTYPE_AUTOMATIC. if -+ * the AKM SAE in the RSN IE, we have to update the auth_type for SAE in -+ * rtw_check_beacon_data(). -+ * -+ * we only update auth_type when rtw_check_beacon_data() -+ */ -+ /* rtw_cfg80211_set_auth_type(&adapter->securitypriv, settings->auth_type); */ -+ -+ rtw_mi_scan_abort(adapter, _TRUE); -+ rtw_mi_buddy_set_scan_deny(adapter, 300); -+ -+ adapter->mlmeextpriv.mlmext_info.hidden_ssid_mode = settings->hidden_ssid; -+ ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len, -+ settings->beacon.tail, settings->beacon.tail_len); -+ -+ if (settings->ssid && settings->ssid_len) { -+ WLAN_BSSID_EX *pbss_network = &adapter->mlmepriv.cur_network.network; -+ WLAN_BSSID_EX *pbss_network_ext = &adapter->mlmeextpriv.mlmext_info.network; -+ -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" ssid:(%s,%zu), from ie:(%s,%d)\n", FUNC_ADPT_ARG(adapter), -+ settings->ssid, settings->ssid_len, -+ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); -+ -+ _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); -+ pbss_network->Ssid.SsidLength = settings->ssid_len; -+ _rtw_memcpy(pbss_network_ext->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); -+ pbss_network_ext->Ssid.SsidLength = settings->ssid_len; -+ -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), -+ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, -+ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); -+ } -+ -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_beacon_data *info) -+{ -+ int ret = 0; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ rtw_stop_ap_cmd(adapter, RTW_CMDF_WAIT_ACK); -+ return 0; -+} -+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) */ -+ -+#if CONFIG_RTW_MACADDR_ACL && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+static int cfg80211_rtw_set_mac_acl(struct wiphy *wiphy, struct net_device *ndev, -+ const struct cfg80211_acl_data *params) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ u8 acl_mode = RTW_ACL_MODE_DISABLED; -+ int ret = -1; -+ int i; -+ -+ if (!params) { -+ RTW_WARN(FUNC_ADPT_FMT" params NULL\n", FUNC_ADPT_ARG(adapter)); -+ rtw_macaddr_acl_clear(adapter, RTW_ACL_PERIOD_BSS); -+ goto exit; -+ } -+ -+ RTW_INFO(FUNC_ADPT_FMT" acl_policy:%d, entry_num:%d\n" -+ , FUNC_ADPT_ARG(adapter), params->acl_policy, params->n_acl_entries); -+ -+ if (params->acl_policy == NL80211_ACL_POLICY_ACCEPT_UNLESS_LISTED) -+ acl_mode = RTW_ACL_MODE_ACCEPT_UNLESS_LISTED; -+ else if (params->acl_policy == NL80211_ACL_POLICY_DENY_UNLESS_LISTED) -+ acl_mode = RTW_ACL_MODE_DENY_UNLESS_LISTED; -+ -+ rtw_macaddr_acl_clear(adapter, RTW_ACL_PERIOD_BSS); -+ -+ rtw_set_macaddr_acl(adapter, RTW_ACL_PERIOD_BSS, acl_mode); -+ -+ for (i = 0; i < params->n_acl_entries; i++) -+ rtw_acl_add_sta(adapter, RTW_ACL_PERIOD_BSS, params->mac_addrs[i].addr); -+ -+ ret = 0; -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_RTW_MACADDR_ACL && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) */ -+ -+const char *_nl80211_sta_flags_str[] = { -+ "INVALID", -+ "AUTHORIZED", -+ "SHORT_PREAMBLE", -+ "WME", -+ "MFP", -+ "AUTHENTICATED", -+ "TDLS_PEER", -+ "ASSOCIATED", -+}; -+ -+#define nl80211_sta_flags_str(_f) ((_f <= NL80211_STA_FLAG_MAX) ? _nl80211_sta_flags_str[_f] : _nl80211_sta_flags_str[0]) -+ -+const char *_nl80211_plink_state_str[] = { -+ "LISTEN", -+ "OPN_SNT", -+ "OPN_RCVD", -+ "CNF_RCVD", -+ "ESTAB", -+ "HOLDING", -+ "BLOCKED", -+ "UNKNOWN", -+}; -+ -+#define nl80211_plink_state_str(_s) ((_s < NUM_NL80211_PLINK_STATES) ? _nl80211_plink_state_str[_s] : _nl80211_plink_state_str[NUM_NL80211_PLINK_STATES]) -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0)) -+#define NL80211_PLINK_ACTION_NO_ACTION PLINK_ACTION_INVALID -+#define NL80211_PLINK_ACTION_OPEN PLINK_ACTION_OPEN -+#define NL80211_PLINK_ACTION_BLOCK PLINK_ACTION_BLOCK -+#define NUM_NL80211_PLINK_ACTIONS 3 -+#endif -+ -+const char *_nl80211_plink_actions_str[] = { -+ "NO_ACTION", -+ "OPEN", -+ "BLOCK", -+ "UNKNOWN", -+}; -+ -+#define nl80211_plink_actions_str(_a) ((_a < NUM_NL80211_PLINK_ACTIONS) ? _nl80211_plink_actions_str[_a] : _nl80211_plink_actions_str[NUM_NL80211_PLINK_ACTIONS]) -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+const char *_nl80211_mesh_power_mode_str[] = { -+ "UNKNOWN", -+ "ACTIVE", -+ "LIGHT_SLEEP", -+ "DEEP_SLEEP", -+}; -+ -+#define nl80211_mesh_power_mode_str(_p) ((_p <= NL80211_MESH_POWER_MAX) ? _nl80211_mesh_power_mode_str[_p] : _nl80211_mesh_power_mode_str[0]) -+#endif -+ -+void dump_station_parameters(void *sel, struct wiphy *wiphy, const struct station_parameters *params) -+{ -+#if DBG_RTW_CFG80211_STA_PARAM -+ if (params->supported_rates_len) { -+ #define SUPP_RATES_BUF_LEN (3 * RTW_G_RATES_NUM + 1) -+ int i; -+ char supp_rates_buf[SUPP_RATES_BUF_LEN] = {0}; -+ u8 cnt = 0; -+ -+ rtw_warn_on(params->supported_rates_len > RTW_G_RATES_NUM); -+ -+ for (i = 0; i < params->supported_rates_len; i++) { -+ if (i >= RTW_G_RATES_NUM) -+ break; -+ cnt += snprintf(supp_rates_buf + cnt, SUPP_RATES_BUF_LEN - cnt -1 -+ , "%02X ", params->supported_rates[i]); -+ if (cnt >= SUPP_RATES_BUF_LEN - 1) -+ break; -+ } -+ -+ RTW_PRINT_SEL(sel, "supported_rates:%s\n", supp_rates_buf); -+ } -+ -+ if (params->vlan) -+ RTW_PRINT_SEL(sel, "vlan:"NDEV_FMT"\n", NDEV_ARG(params->vlan)); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) -+ if (params->sta_flags_mask) { -+ #define STA_FLAGS_BUF_LEN 128 -+ int i = 0; -+ char sta_flags_buf[STA_FLAGS_BUF_LEN] = {0}; -+ u8 cnt = 0; -+ -+ for (i = 1; i <= NL80211_STA_FLAG_MAX; i++) { -+ if (params->sta_flags_mask & BIT(i)) { -+ cnt += snprintf(sta_flags_buf + cnt, STA_FLAGS_BUF_LEN - cnt -1, "%s=%u " -+ , nl80211_sta_flags_str(i), (params->sta_flags_set & BIT(i)) ? 1 : 0); -+ if (cnt >= STA_FLAGS_BUF_LEN - 1) -+ break; -+ } -+ } -+ -+ RTW_PRINT_SEL(sel, "sta_flags:%s\n", sta_flags_buf); -+ } -+#else -+ u32 station_flags; -+ #error "TBD\n" -+#endif -+ -+ if (params->listen_interval != -1) -+ RTW_PRINT_SEL(sel, "listen_interval:%d\n", params->listen_interval); -+ -+ if (params->aid) -+ RTW_PRINT_SEL(sel, "aid:%u\n", params->aid); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 8, 0)) -+ if (params->peer_aid) -+ RTW_PRINT_SEL(sel, "peer_aid:%u\n", params->peer_aid); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 26)) -+ if (params->plink_action != NL80211_PLINK_ACTION_NO_ACTION) -+ RTW_PRINT_SEL(sel, "plink_action:%s\n", nl80211_plink_actions_str(params->plink_action)); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) -+ if (params->sta_modify_mask & STATION_PARAM_APPLY_PLINK_STATE) -+ #endif -+ RTW_PRINT_SEL(sel, "plink_state:%s\n" -+ , nl80211_plink_state_str(params->plink_state)); -+#endif -+ -+#if 0 /* TODO */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28)) -+ const struct ieee80211_ht_cap *ht_capa; -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ const struct ieee80211_vht_cap *vht_capa; -+#endif -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+ if (params->sta_modify_mask & STATION_PARAM_APPLY_UAPSD) -+ RTW_PRINT_SEL(sel, "uapsd_queues:0x%02x\n", params->uapsd_queues); -+ if (params->max_sp) -+ RTW_PRINT_SEL(sel, "max_sp:%u\n", params->max_sp); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+ if (params->local_pm != NL80211_MESH_POWER_UNKNOWN) { -+ RTW_PRINT_SEL(sel, "local_pm:%s\n" -+ , nl80211_mesh_power_mode_str(params->local_pm)); -+ } -+ -+ if (params->sta_modify_mask & STATION_PARAM_APPLY_CAPABILITY) -+ RTW_PRINT_SEL(sel, "capability:0x%04x\n", params->capability); -+ -+#if 0 /* TODO */ -+ const u8 *ext_capab; -+ u8 ext_capab_len; -+#endif -+#endif -+ -+#if 0 /* TODO */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0)) -+ const u8 *supported_channels; -+ u8 supported_channels_len; -+ const u8 *supported_oper_classes; -+ u8 supported_oper_classes_len; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) -+ u8 opmode_notif; -+ bool opmode_notif_used; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)) -+ int support_p2p_ps; -+#endif -+#endif -+#endif /* DBG_RTW_CFG80211_STA_PARAM */ -+} -+ -+static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0)) -+ u8 *mac, -+#else -+ const u8 *mac, -+#endif -+ struct station_parameters *params) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+#if defined(CONFIG_TDLS) || defined(CONFIG_RTW_MESH) -+ struct sta_priv *pstapriv = &padapter->stapriv; -+#endif -+#ifdef CONFIG_TDLS -+ struct sta_info *psta; -+#endif /* CONFIG_TDLS */ -+ -+ RTW_INFO(FUNC_NDEV_FMT" mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac)); -+ -+#if CONFIG_RTW_MACADDR_ACL -+ if (rtw_access_ctrl(padapter, mac) == _FALSE) { -+ RTW_INFO(FUNC_NDEV_FMT" deny by macaddr ACL\n", FUNC_NDEV_ARG(ndev)); -+ ret = -EINVAL; -+ goto exit; -+ } -+#endif -+ -+ dump_station_parameters(RTW_DBGDUMP, wiphy, params); -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ struct rtw_mesh_cfg *mcfg = &padapter->mesh_cfg; -+ struct rtw_mesh_info *minfo = &padapter->mesh_info; -+ struct mesh_plink_pool *plink_ctl = &minfo->plink_ctl; -+ struct mesh_plink_ent *plink = NULL; -+ struct wlan_network *scanned = NULL; -+ bool acnode = 0; -+ u8 add_new_sta = 0, probe_req = 0; -+ _irqL irqL; -+ -+ if (params->plink_state != NL80211_PLINK_LISTEN) { -+ RTW_WARN(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(ndev), nl80211_plink_state_str(params->plink_state)); -+ rtw_warn_on(1); -+ } -+ if (!params->aid || params->aid > pstapriv->max_aid) { -+ RTW_WARN(FUNC_NDEV_FMT" invalid aid:%u\n", FUNC_NDEV_ARG(ndev), params->aid); -+ rtw_warn_on(1); -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ _enter_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ plink = _rtw_mesh_plink_get(padapter, mac); -+ if (plink) -+ goto release_plink_ctl; -+ -+ #if CONFIG_RTW_MESH_PEER_BLACKLIST -+ if (rtw_mesh_peer_blacklist_search(padapter, mac)) { -+ RTW_INFO(FUNC_NDEV_FMT" deny by peer blacklist\n" -+ , FUNC_NDEV_ARG(ndev)); -+ ret = -EINVAL; -+ goto release_plink_ctl; -+ } -+ #endif -+ -+ scanned = rtw_find_network(&padapter->mlmepriv.scanned_queue, mac); -+ if (!scanned -+ || rtw_get_passing_time_ms(scanned->last_scanned) >= mcfg->peer_sel_policy.scanr_exp_ms -+ ) { -+ if (!scanned) -+ RTW_INFO(FUNC_NDEV_FMT" corresponding network not found\n", FUNC_NDEV_ARG(ndev)); -+ else -+ RTW_INFO(FUNC_NDEV_FMT" corresponding network too old\n", FUNC_NDEV_ARG(ndev)); -+ -+ if (adapter_to_rfctl(padapter)->offch_state == OFFCHS_NONE) -+ probe_req = 1; -+ -+ ret = -EINVAL; -+ goto release_plink_ctl; -+ } -+ -+ #if CONFIG_RTW_MESH_ACNODE_PREVENT -+ if (plink_ctl->acnode_rsvd) -+ acnode = rtw_mesh_scanned_is_acnode_confirmed(padapter, scanned); -+ #endif -+ -+ /* wpa_supplicant's auto peer will initiate peering when candidate peer is reported without max_peer_links consideration */ -+ if (plink_ctl->num >= mcfg->max_peer_links + acnode ? 1 : 0) { -+ RTW_INFO(FUNC_NDEV_FMT" exceed max_peer_links:%u%s\n" -+ , FUNC_NDEV_ARG(ndev), mcfg->max_peer_links, acnode ? " acn" : ""); -+ ret = -EINVAL; -+ goto release_plink_ctl; -+ } -+ -+ if (!rtw_bss_is_candidate_mesh_peer(padapter, &scanned->network, 1, 1)) { -+ RTW_WARN(FUNC_NDEV_FMT" corresponding network is not candidate with same ch\n" -+ , FUNC_NDEV_ARG(ndev)); -+ ret = -EINVAL; -+ goto release_plink_ctl; -+ } -+ -+ #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ if (!rtw_mesh_cto_mgate_network_filter(padapter, scanned)) { -+ RTW_INFO(FUNC_NDEV_FMT" peer filtered out by cto_mgate check\n" -+ , FUNC_NDEV_ARG(ndev)); -+ ret = -EINVAL; -+ goto release_plink_ctl; -+ } -+ #endif -+ -+ if (_rtw_mesh_plink_add(padapter, mac) == _SUCCESS) { -+ /* hook corresponding network in scan queue */ -+ plink = _rtw_mesh_plink_get(padapter, mac); -+ plink->aid = params->aid; -+ plink->scanned = scanned; -+ -+ #if CONFIG_RTW_MESH_ACNODE_PREVENT -+ if (acnode) { -+ RTW_INFO(FUNC_ADPT_FMT" acnode "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(scanned->network.MacAddress)); -+ } -+ #endif -+ -+ add_new_sta = 1; -+ } else { -+ RTW_WARN(FUNC_NDEV_FMT" rtw_mesh_plink_add not success\n" -+ , FUNC_NDEV_ARG(ndev)); -+ ret = -EINVAL; -+ } -+release_plink_ctl: -+ _exit_critical_bh(&(plink_ctl->lock), &irqL); -+ -+ if (probe_req) -+ issue_probereq(padapter, &padapter->mlmepriv.cur_network.network.mesh_id, mac); -+ -+ if (add_new_sta) { -+ struct station_info sinfo; -+ -+ #ifdef CONFIG_DFS_MASTER -+ if (IS_UNDER_CAC(adapter_to_rfctl(padapter))) -+ rtw_force_stop_cac(adapter_to_rfctl(padapter), 300); -+ #endif -+ -+ /* indicate new sta */ -+ _rtw_memset(&sinfo, 0, sizeof(sinfo)); -+ cfg80211_new_sta(ndev, mac, &sinfo, GFP_ATOMIC); -+ } -+ goto exit; -+ } -+#endif /* CONFIG_RTW_MESH */ -+ -+#ifdef CONFIG_TDLS -+ psta = rtw_get_stainfo(pstapriv, (u8 *)mac); -+ if (psta == NULL) { -+ psta = rtw_alloc_stainfo(pstapriv, (u8 *)mac); -+ if (psta == NULL) { -+ RTW_INFO("[%s] Alloc station for "MAC_FMT" fail\n", __FUNCTION__, MAC_ARG(mac)); -+ ret = -EOPNOTSUPP; -+ goto exit; -+ } -+ } -+#endif /* CONFIG_TDLS */ -+ -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0)) -+ u8 *mac -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)) -+ const u8 *mac -+#else -+ struct station_del_parameters *params -+#endif -+) -+{ -+ int ret = 0; -+ _irqL irqL; -+ _list *phead, *plist; -+ u8 updated = _FALSE; -+ const u8 *target_mac; -+ struct sta_info *psta = NULL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)) -+ target_mac = mac; -+#else -+ target_mac = params->mac; -+#endif -+ -+ RTW_INFO("+"FUNC_NDEV_FMT" mac=%pM\n", FUNC_NDEV_ARG(ndev), target_mac); -+ -+ if (check_fwstate(pmlmepriv, (WIFI_ASOC_STATE | WIFI_AP_STATE | WIFI_MESH_STATE)) != _TRUE) { -+ RTW_INFO("%s, fw_state != FW_LINKED|WIFI_AP_STATE|WIFI_MESH_STATE\n", __func__); -+ return -EINVAL; -+ } -+ -+ -+ if (!target_mac) { -+ RTW_INFO("flush all sta, and cam_entry\n"); -+ -+ flush_all_cam_entry(padapter); /* clear CAM */ -+ -+#ifdef CONFIG_AP_MODE -+ ret = rtw_sta_flush(padapter, _TRUE); -+#endif -+ return ret; -+ } -+ -+ -+ RTW_INFO("free sta macaddr =" MAC_FMT "\n", MAC_ARG(target_mac)); -+ -+ if (target_mac[0] == 0xff && target_mac[1] == 0xff && -+ target_mac[2] == 0xff && target_mac[3] == 0xff && -+ target_mac[4] == 0xff && target_mac[5] == 0xff) -+ return -EINVAL; -+ -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ /* check asoc_queue */ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ -+ plist = get_next(plist); -+ -+ if (_rtw_memcmp((u8 *)target_mac, psta->cmn.mac_addr, ETH_ALEN)) { -+ if (psta->dot8021xalg == 1 && psta->bpairwise_key_installed == _FALSE) { -+ RTW_INFO("%s, sta's dot8021xalg = 1 and key_installed = _FALSE\n", __func__); -+ -+ #ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(padapter)) { -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (psta->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt--; -+ #endif -+ STA_SET_MESH_PLINK(psta, NULL); -+ -+ ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_IEEE_802_1X_AUTH_FAILED, _TRUE); -+ psta = NULL; -+ break; -+ } -+ #endif -+ } else { -+ RTW_INFO("free psta=%p, aid=%d\n", psta, psta->cmn.aid); -+ -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (psta->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt--; -+ #endif -+ STA_SET_MESH_PLINK(psta, NULL); -+ -+ /* _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); */ -+ if (MLME_IS_AP(padapter)) -+ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_PREV_AUTH_NOT_VALID, _TRUE); -+ else -+ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); -+ /* _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); */ -+ -+ psta = NULL; -+ -+ break; -+ } -+ -+ } -+ -+ } -+ -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) -+ rtw_mesh_plink_del(padapter, target_mac); -+#endif -+ -+ RTW_INFO("-"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ return ret; -+ -+} -+ -+static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *ndev, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0)) -+ u8 *mac, -+#else -+ const u8 *mac, -+#endif -+ struct station_parameters *params) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ int ret = 0; -+ -+ RTW_INFO(FUNC_ADPT_FMT" mac:"MAC_FMT"\n", FUNC_ADPT_ARG(adapter), MAC_ARG(mac)); -+ -+ dump_station_parameters(RTW_DBGDUMP, wiphy, params); -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(adapter)) { -+ enum cfg80211_station_type sta_type = CFG80211_STA_MESH_PEER_USER; -+ u8 plink_state = nl80211_plink_state_to_rtw_plink_state(params->plink_state); -+ -+ ret = cfg80211_check_station_change(wiphy, params, sta_type); -+ if (ret) { -+ RTW_INFO("cfg80211_check_station_change return %d\n", ret); -+ goto exit; -+ } -+ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) -+ if (!(params->sta_modify_mask & STATION_PARAM_APPLY_PLINK_STATE)) -+ goto exit; -+ #endif -+ -+ if (rtw_mesh_set_plink_state_cmd(adapter, mac, plink_state) != _SUCCESS) -+ ret = -ENOENT; -+ } -+ -+exit: -+#endif /* CONFIG_RTW_MESH */ -+ -+ if (ret) -+ RTW_INFO(FUNC_ADPT_FMT" mac:"MAC_FMT" ret:%d\n", FUNC_ADPT_ARG(adapter), MAC_ARG(mac), ret); -+ return ret; -+} -+ -+struct sta_info *rtw_sta_info_get_by_idx(struct sta_priv *pstapriv, const int idx, u8 *asoc_list_num) -+{ -+ _list *phead, *plist; -+ struct sta_info *psta = NULL; -+ int i = 0; -+ -+ phead = &pstapriv->asoc_list; -+ plist = get_next(phead); -+ -+ /* check asoc_queue */ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ if (idx == i) -+ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); -+ plist = get_next(plist); -+ i++; -+ } -+ -+ if (asoc_list_num) -+ *asoc_list_num = i; -+ -+ return psta; -+} -+ -+static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *ndev, -+ int idx, u8 *mac, struct station_info *sinfo) -+{ -+#define DBG_DUMP_STATION 0 -+ -+ int ret = 0; -+ _irqL irqL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta = NULL; -+#ifdef CONFIG_RTW_MESH -+ struct mesh_plink_ent *plink = NULL; -+#endif -+ u8 asoc_list_num; -+ -+ if (DBG_DUMP_STATION) -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ psta = rtw_sta_info_get_by_idx(pstapriv, idx, &asoc_list_num); -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ if (psta) -+ plink = psta->plink; -+ if (!plink) -+ plink = rtw_mesh_plink_get_no_estab_by_idx(padapter, idx - asoc_list_num); -+ } -+#endif /* CONFIG_RTW_MESH */ -+ -+ if ((!MLME_IS_MESH(padapter) && !psta) -+ #ifdef CONFIG_RTW_MESH -+ || (MLME_IS_MESH(padapter) && !plink) -+ #endif -+ ) { -+ if (DBG_DUMP_STATION) -+ RTW_INFO(FUNC_NDEV_FMT" end with idx:%d\n", FUNC_NDEV_ARG(ndev), idx); -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ if (psta) -+ _rtw_memcpy(mac, psta->cmn.mac_addr, ETH_ALEN); -+ #ifdef CONFIG_RTW_MESH -+ else -+ _rtw_memcpy(mac, plink->addr, ETH_ALEN); -+ #endif -+ -+ sinfo->filled = 0; -+ -+ if (psta) { -+ sinfo->filled |= STATION_INFO_SIGNAL; -+ sinfo->signal = translate_percentage_to_dbm(psta->cmn.rssi_stat.rssi); -+ sinfo->filled |= STATION_INFO_INACTIVE_TIME; -+ sinfo->inactive_time = rtw_get_passing_time_ms(psta->sta_stats.last_rx_time); -+ } -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) -+ rtw_cfg80211_fill_mesh_only_sta_info(plink, psta, sinfo); -+#endif -+ -+exit: -+ return ret; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28)) -+static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, -+ struct bss_parameters *params) -+{ -+ _adapter *adapter = rtw_netdev_priv(ndev); -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); -+ -+if (0) { -+ if (params->use_cts_prot != -1) -+ RTW_INFO("use_cts_prot=%d\n", params->use_cts_prot); -+ if (params->use_short_preamble != -1) -+ RTW_INFO("use_short_preamble=%d\n", params->use_short_preamble); -+ if (params->use_short_slot_time != -1) -+ RTW_INFO("use_short_slot_time=%d\n", params->use_short_slot_time); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+ if (params->basic_rates && params->basic_rates_len) { -+ RTW_INFO("basic_rates_len=%d\n", params->basic_rates_len); -+ RTW_INFO_DUMP("basic_rates=", params->basic_rates, params->basic_rates_len); -+ } -+#endif -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ if (params->ap_isolate != -1) { -+ RTW_INFO("ap_isolate=%d\n", params->ap_isolate); -+ adapter->mlmepriv.ap_isolate = params->ap_isolate ? 1 : 0; -+ } -+#endif -+ -+if (0) { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) -+ if (params->ht_opmode != -1) -+ RTW_INFO("ht_opmode=0x%04x\n", params->ht_opmode); -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ if (params->p2p_ctwindow != -1) -+ RTW_INFO("p2p_ctwindow=%d\n", params->p2p_ctwindow); -+ if (params->p2p_opp_ps != -1) -+ RTW_INFO("p2p_opp_ps=%d\n", params->p2p_opp_ps); -+#endif -+} -+ return 0; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28)) */ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+static int cfg80211_rtw_set_txq_params(struct wiphy *wiphy -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+ , struct net_device *ndev -+#endif -+ , struct ieee80211_txq_params *params) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+ _adapter *padapter = rtw_netdev_priv(ndev); -+#else -+ _adapter *padapter = wiphy_to_adapter(wiphy); -+#endif -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ u8 ac, AIFS, ECWMin, ECWMax, aSifsTime; -+ u16 TXOP; -+ u8 shift_count = 0; -+ u32 acParm; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ ac = params->ac; -+#else -+ ac = params->queue; -+#endif -+ -+ switch (ac) { -+ case NL80211_TXQ_Q_VO: -+ ac = XMIT_VO_QUEUE; -+ break; -+ -+ case NL80211_TXQ_Q_VI: -+ ac = XMIT_VI_QUEUE; -+ break; -+ -+ case NL80211_TXQ_Q_BE: -+ ac = XMIT_BE_QUEUE; -+ break; -+ -+ case NL80211_TXQ_Q_BK: -+ ac = XMIT_BK_QUEUE; -+ break; -+ -+ default: -+ break; -+ } -+ -+#if 0 -+ RTW_INFO("ac=%d\n", ac); -+ RTW_INFO("txop=%u\n", params->txop); -+ RTW_INFO("cwmin=%u\n", params->cwmin); -+ RTW_INFO("cwmax=%u\n", params->cwmax); -+ RTW_INFO("aifs=%u\n", params->aifs); -+#endif -+ -+ if (is_supported_5g(pmlmeext->cur_wireless_mode) || -+ (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) -+ aSifsTime = 16; -+ else -+ aSifsTime = 10; -+ -+ AIFS = params->aifs * pmlmeinfo->slotTime + aSifsTime; -+ -+ while ((params->cwmin + 1) >> shift_count != 1) { -+ shift_count++; -+ if (shift_count == 15) -+ break; -+ } -+ -+ ECWMin = shift_count; -+ -+ shift_count = 0; -+ while ((params->cwmax + 1) >> shift_count != 1) { -+ shift_count++; -+ if (shift_count == 15) -+ break; -+ } -+ -+ ECWMax = shift_count; -+ -+ TXOP = le16_to_cpu(params->txop); -+ -+ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); -+ -+ set_txq_params_cmd(padapter, acParm, ac); -+ -+ return 0; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) */ -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) -+static int cfg80211_rtw_set_channel(struct wiphy *wiphy -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ , struct net_device *ndev -+ #endif -+ , struct ieee80211_channel *chan, enum nl80211_channel_type channel_type) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+#else -+ _adapter *padapter = wiphy_to_adapter(wiphy); -+#endif -+ int chan_target = (u8) ieee80211_frequency_to_channel(chan->center_freq); -+ int chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ int chan_width = CHANNEL_WIDTH_20; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+#endif -+ -+ switch (channel_type) { -+ case NL80211_CHAN_NO_HT: -+ case NL80211_CHAN_HT20: -+ chan_width = CHANNEL_WIDTH_20; -+ chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case NL80211_CHAN_HT40MINUS: -+ chan_width = CHANNEL_WIDTH_40; -+ chan_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ case NL80211_CHAN_HT40PLUS: -+ chan_width = CHANNEL_WIDTH_40; -+ chan_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ default: -+ chan_width = CHANNEL_WIDTH_20; -+ chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+ -+ RTW_INFO(FUNC_ADPT_FMT" ch:%d bw:%d, offset:%d\n" -+ , FUNC_ADPT_ARG(padapter), chan_target, chan_width, chan_offset); -+ -+ rtw_set_chbw_cmd(padapter, chan_target, chan_width, chan_offset, RTW_CMDF_WAIT_ACK); -+ -+ return 0; -+} -+#endif /*#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0))*/ -+ -+/* -+static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_auth_request *req) -+{ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ return 0; -+} -+ -+static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev, -+ struct cfg80211_assoc_request *req) -+{ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+ return 0; -+} -+*/ -+ -+static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *ndev, char *buf, int len) -+{ -+ int ret = 0; -+ uint wps_ielen = 0; -+ u8 *wps_ie; -+ u32 p2p_ielen = 0; -+ u8 wps_oui[8] = {0x0, 0x50, 0xf2, 0x04}; -+ u8 *p2p_ie; -+ u32 wfd_ielen = 0; -+ u8 *wfd_ie; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ -+ RTW_INFO(FUNC_NDEV_FMT" ielen=%d\n", FUNC_NDEV_ARG(ndev), len); -+ -+ if (len > 0) { -+ wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen); -+ if (wps_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("bcn_wps_ielen=%d\n", wps_ielen); -+ #endif -+ -+ if (pmlmepriv->wps_beacon_ie) { -+ u32 free_len = pmlmepriv->wps_beacon_ie_len; -+ pmlmepriv->wps_beacon_ie_len = 0; -+ rtw_mfree(pmlmepriv->wps_beacon_ie, free_len); -+ pmlmepriv->wps_beacon_ie = NULL; -+ } -+ -+ pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); -+ if (pmlmepriv->wps_beacon_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ -+ _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); -+ pmlmepriv->wps_beacon_ie_len = wps_ielen; -+ -+ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE, RTW_CMDF_WAIT_ACK); -+ -+ } -+ -+ /* buf += wps_ielen; */ -+ /* len -= wps_ielen; */ -+ -+ #ifdef CONFIG_P2P -+ p2p_ie = rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen); -+ if (p2p_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("bcn_p2p_ielen=%d\n", p2p_ielen); -+ #endif -+ -+ if (pmlmepriv->p2p_beacon_ie) { -+ u32 free_len = pmlmepriv->p2p_beacon_ie_len; -+ pmlmepriv->p2p_beacon_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); -+ pmlmepriv->p2p_beacon_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); -+ if (pmlmepriv->p2p_beacon_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ -+ _rtw_memcpy(pmlmepriv->p2p_beacon_ie, p2p_ie, p2p_ielen); -+ pmlmepriv->p2p_beacon_ie_len = p2p_ielen; -+ -+ } -+ #endif /* CONFIG_P2P */ -+ -+ -+ #ifdef CONFIG_WFD -+ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("bcn_wfd_ielen=%d\n", wfd_ielen); -+ #endif -+ -+ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_BEACON_IE, wfd_ie, wfd_ielen) != _SUCCESS) -+ return -EINVAL; -+ } -+ #endif /* CONFIG_WFD */ -+ -+ pmlmeext->bstart_bss = _TRUE; -+ -+ } -+ -+ return ret; -+ -+} -+ -+static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *buf, int len) -+{ -+ int ret = 0; -+ uint wps_ielen = 0; -+ u8 *wps_ie; -+ u32 p2p_ielen = 0; -+ u8 *p2p_ie; -+ u32 wfd_ielen = 0; -+ u8 *wfd_ie; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s, ielen=%d\n", __func__, len); -+#endif -+ -+ if (len > 0) { -+ wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen); -+ if (wps_ie) { -+ uint attr_contentlen = 0; -+ u16 uconfig_method, *puconfig_method = NULL; -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("probe_resp_wps_ielen=%d\n", wps_ielen); -+ #endif -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { -+ u8 sr = 0; -+ rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8 *)(&sr), NULL); -+ -+ if (sr != 0) -+ RTW_INFO("%s, got sr\n", __func__); -+ else { -+ RTW_INFO("GO mode process WPS under site-survey, sr no set\n"); -+ return ret; -+ } -+ } -+ -+ if (pmlmepriv->wps_probe_resp_ie) { -+ u32 free_len = pmlmepriv->wps_probe_resp_ie_len; -+ pmlmepriv->wps_probe_resp_ie_len = 0; -+ rtw_mfree(pmlmepriv->wps_probe_resp_ie, free_len); -+ pmlmepriv->wps_probe_resp_ie = NULL; -+ } -+ -+ pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); -+ if (pmlmepriv->wps_probe_resp_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ -+ /* add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode */ -+ puconfig_method = (u16 *)rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen); -+ if (puconfig_method != NULL) { -+ /* struct registry_priv *pregistrypriv = &padapter->registrypriv; */ -+ struct wireless_dev *wdev = padapter->rtw_wdev; -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ /* printk("config_method in wpsie of probe_resp = 0x%x\n", be16_to_cpu(*puconfig_method)); */ -+ #endif -+ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ /* for WIFI-DIRECT LOGO 4.2.2, AUTO GO can't set PUSH_BUTTON flags */ -+ if (wdev->iftype == NL80211_IFTYPE_P2P_GO) { -+ uconfig_method = WPS_CM_PUSH_BUTTON; -+ uconfig_method = cpu_to_be16(uconfig_method); -+ -+ *puconfig_method &= ~uconfig_method; -+ } -+ #endif -+ } -+ -+ _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, wps_ie, wps_ielen); -+ pmlmepriv->wps_probe_resp_ie_len = wps_ielen; -+ -+ } -+ -+ /* buf += wps_ielen; */ -+ /* len -= wps_ielen; */ -+ -+ #ifdef CONFIG_P2P -+ p2p_ie = rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen); -+ if (p2p_ie) { -+ u8 is_GO = _FALSE; -+ u32 attr_contentlen = 0; -+ u16 cap_attr = 0; -+ -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("probe_resp_p2p_ielen=%d\n", p2p_ielen); -+ #endif -+ -+ /* Check P2P Capability ATTR */ -+ if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8 *)&cap_attr, (uint *) &attr_contentlen)) { -+ u8 grp_cap = 0; -+ /* RTW_INFO( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); */ -+ cap_attr = le16_to_cpu(cap_attr); -+ grp_cap = (u8)((cap_attr >> 8) & 0xff); -+ -+ is_GO = (grp_cap & BIT(0)) ? _TRUE : _FALSE; -+ -+ if (is_GO) -+ RTW_INFO("Got P2P Capability Attr, grp_cap=0x%x, is_GO\n", grp_cap); -+ } -+ -+ -+ if (is_GO == _FALSE) { -+ if (pmlmepriv->p2p_probe_resp_ie) { -+ u32 free_len = pmlmepriv->p2p_probe_resp_ie_len; -+ pmlmepriv->p2p_probe_resp_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_probe_resp_ie, free_len); -+ pmlmepriv->p2p_probe_resp_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); -+ if (pmlmepriv->p2p_probe_resp_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ _rtw_memcpy(pmlmepriv->p2p_probe_resp_ie, p2p_ie, p2p_ielen); -+ pmlmepriv->p2p_probe_resp_ie_len = p2p_ielen; -+ } else { -+ if (pmlmepriv->p2p_go_probe_resp_ie) { -+ u32 free_len = pmlmepriv->p2p_go_probe_resp_ie_len; -+ pmlmepriv->p2p_go_probe_resp_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); -+ pmlmepriv->p2p_go_probe_resp_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); -+ if (pmlmepriv->p2p_go_probe_resp_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ -+ } -+ _rtw_memcpy(pmlmepriv->p2p_go_probe_resp_ie, p2p_ie, p2p_ielen); -+ pmlmepriv->p2p_go_probe_resp_ie_len = p2p_ielen; -+ } -+ -+ } -+ #endif /* CONFIG_P2P */ -+ -+ -+ #ifdef CONFIG_WFD -+ wfd_ie = rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen); -+ #ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("probe_resp_wfd_ielen=%d\n", wfd_ielen); -+ #endif -+ -+ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_PROBE_RESP_IE, wfd_ie, wfd_ielen) != _SUCCESS) -+ return -EINVAL; -+ #endif /* CONFIG_WFD */ -+ -+ } -+ -+ return ret; -+ -+} -+ -+static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *buf, int len) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 *ie; -+ u32 ie_len; -+ -+ RTW_INFO("%s, ielen=%d\n", __func__, len); -+ -+ if (len <= 0) -+ goto exit; -+ -+ ie = rtw_get_wps_ie(buf, len, NULL, &ie_len); -+ if (ie && ie_len) { -+ if (pmlmepriv->wps_assoc_resp_ie) { -+ u32 free_len = pmlmepriv->wps_assoc_resp_ie_len; -+ -+ pmlmepriv->wps_assoc_resp_ie_len = 0; -+ rtw_mfree(pmlmepriv->wps_assoc_resp_ie, free_len); -+ pmlmepriv->wps_assoc_resp_ie = NULL; -+ } -+ -+ pmlmepriv->wps_assoc_resp_ie = rtw_malloc(ie_len); -+ if (pmlmepriv->wps_assoc_resp_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ } -+ _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, ie, ie_len); -+ pmlmepriv->wps_assoc_resp_ie_len = ie_len; -+ } -+#ifdef CONFIG_P2P -+ ie = rtw_get_p2p_ie(buf, len, NULL, &ie_len); -+ if (ie && ie_len) { -+ if (pmlmepriv->p2p_assoc_resp_ie) { -+ u32 free_len = pmlmepriv->p2p_assoc_resp_ie_len; -+ -+ pmlmepriv->p2p_assoc_resp_ie_len = 0; -+ rtw_mfree(pmlmepriv->p2p_assoc_resp_ie, free_len); -+ pmlmepriv->p2p_assoc_resp_ie = NULL; -+ } -+ -+ pmlmepriv->p2p_assoc_resp_ie = rtw_malloc(ie_len); -+ if (pmlmepriv->p2p_assoc_resp_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ } -+ _rtw_memcpy(pmlmepriv->p2p_assoc_resp_ie, ie, ie_len); -+ pmlmepriv->p2p_assoc_resp_ie_len = ie_len; -+ } -+#endif -+#ifdef CONFIG_WFD -+ ie = rtw_get_wfd_ie(buf, len, NULL, &ie_len); -+ if (rtw_mlme_update_wfd_ie_data(pmlmepriv, MLME_ASSOC_RESP_IE, ie, ie_len) != _SUCCESS) -+ return -EINVAL; -+#endif -+ -+exit: -+ return ret; -+} -+ -+int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, -+ int type) -+{ -+ int ret = 0; -+ uint wps_ielen = 0; -+ u32 p2p_ielen = 0; -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s, ielen=%d\n", __func__, len); -+#endif -+ -+ if ((rtw_get_wps_ie(buf, len, NULL, &wps_ielen) && (wps_ielen > 0)) -+ #ifdef CONFIG_P2P -+ || (rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen) && (p2p_ielen > 0)) -+ #endif -+ ) { -+ if (net != NULL) { -+ switch (type) { -+ case 0x1: /* BEACON */ -+ ret = rtw_cfg80211_set_beacon_wpsp2pie(net, buf, len); -+ break; -+ case 0x2: /* PROBE_RESP */ -+ ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len); -+ #ifdef CONFIG_P2P -+ if (ret == 0) -+ adapter_wdev_data((_adapter *)rtw_netdev_priv(net))->probe_resp_ie_update_time = rtw_get_current_time(); -+ #endif -+ break; -+ case 0x4: /* ASSOC_RESP */ -+ ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len); -+ break; -+ } -+ } -+ } -+ -+ return ret; -+ -+} -+#endif /* CONFIG_AP_MODE */ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+static struct wireless_dev * -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) -+static struct net_device * -+#else -+static int -+#endif -+ cfg80211_rtw_add_virtual_intf( -+ struct wiphy *wiphy, -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 7, 0)) -+ const char *name, -+ #else -+ char *name, -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ unsigned char name_assign_type, -+ #endif -+ enum nl80211_iftype type, -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 12, 0)) -+ u32 *flags, -+ #endif -+ struct vif_params *params) -+{ -+ int ret = 0; -+ struct wireless_dev *wdev = NULL; -+ struct net_device *ndev = NULL; -+ _adapter *padapter; -+ struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy); -+ -+ rtw_set_rtnl_lock_holder(dvobj, current); -+ -+ RTW_INFO(FUNC_WIPHY_FMT" name:%s, type:%d\n", FUNC_WIPHY_ARG(wiphy), name, type); -+ -+ switch (type) { -+ case NL80211_IFTYPE_MONITOR: -+ padapter = wiphy_to_adapter(wiphy); /* TODO: get ap iface ? */ -+ ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, &ndev); -+ if (ret == 0) -+ wdev = ndev->ieee80211_ptr; -+ break; -+ -+#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ case NL80211_IFTYPE_P2P_CLIENT: -+ case NL80211_IFTYPE_P2P_GO: -+#endif -+ case NL80211_IFTYPE_STATION: -+ case NL80211_IFTYPE_AP: -+#ifdef CONFIG_RTW_MESH -+ case NL80211_IFTYPE_MESH_POINT: -+#endif -+ padapter = dvobj_get_unregisterd_adapter(dvobj); -+ if (!padapter) { -+ RTW_WARN("adapter pool empty!\n"); -+ ret = -ENODEV; -+ break; -+ } -+ -+ #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_P2P) -+ #if defined(CONFIG_P2P) && ((KERNEL_VERSION(2, 6, 37) <= LINUX_VERSION_CODE) || defined(COMPAT_KERNEL_RELEASE)) -+ if ((type == NL80211_IFTYPE_P2P_CLIENT || type == NL80211_IFTYPE_P2P_GO) && (padapter->iface_id != padapter->registrypriv.sel_p2p_iface)) { -+ RTW_ERR("%s, iface_id:%d is not P2P interface!\n", __func__, padapter->iface_id); -+ ret = -EOPNOTSUPP; -+ break; -+ } -+ #endif -+ #endif -+ -+ if (rtw_os_ndev_init(padapter, name) != _SUCCESS) { -+ RTW_WARN("ndev init fail!\n"); -+ ret = -ENODEV; -+ break; -+ } -+ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ if (type == NL80211_IFTYPE_P2P_CLIENT || type == NL80211_IFTYPE_P2P_GO) -+ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); -+ #endif -+ ndev = padapter->pnetdev; -+ wdev = ndev->ieee80211_ptr; -+ break; -+ -+#if defined(CONFIG_P2P) && defined(RTW_DEDICATED_P2P_DEVICE) -+ case NL80211_IFTYPE_P2P_DEVICE: -+ ret = rtw_pd_iface_alloc(wiphy, name, &wdev); -+ break; -+#endif -+ -+ case NL80211_IFTYPE_ADHOC: -+ case NL80211_IFTYPE_AP_VLAN: -+ case NL80211_IFTYPE_WDS: -+ default: -+ ret = -ENODEV; -+ RTW_INFO("Unsupported interface type\n"); -+ break; -+ } -+ -+ if (ndev) -+ RTW_INFO(FUNC_WIPHY_FMT" ndev:%p, ret:%d\n", FUNC_WIPHY_ARG(wiphy), ndev, ret); -+ else -+ RTW_INFO(FUNC_WIPHY_FMT" wdev:%p, ret:%d\n", FUNC_WIPHY_ARG(wiphy), wdev, ret); -+ -+ rtw_set_rtnl_lock_holder(dvobj, NULL); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ return wdev ? wdev : ERR_PTR(ret); -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) -+ return ndev ? ndev : ERR_PTR(ret); -+#else -+ return ret; -+#endif -+} -+ -+static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ struct wireless_dev *wdev -+#else -+ struct net_device *ndev -+#endif -+) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ struct net_device *ndev = wdev_to_ndev(wdev); -+#endif -+ int ret = 0; -+ struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy); -+ _adapter *adapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ -+ rtw_set_rtnl_lock_holder(dvobj, current); -+ -+ if (ndev) { -+ adapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(adapter); -+ -+ if (ndev == pwdev_priv->pmon_ndev) { -+ unregister_netdevice(ndev); -+ pwdev_priv->pmon_ndev = NULL; -+ pwdev_priv->ifname_mon[0] = '\0'; -+ RTW_INFO(FUNC_NDEV_FMT" remove monitor ndev\n", FUNC_NDEV_ARG(ndev)); -+ } else { -+ RTW_INFO(FUNC_NDEV_FMT" unregister ndev\n", FUNC_NDEV_ARG(ndev)); -+ rtw_os_ndev_unregister(adapter); -+ } -+ } else -+#if defined(CONFIG_P2P) && defined(RTW_DEDICATED_P2P_DEVICE) -+ if (wdev->iftype == NL80211_IFTYPE_P2P_DEVICE) { -+ if (wdev == wiphy_to_pd_wdev(wiphy)) -+ rtw_pd_iface_free(wiphy); -+ else { -+ RTW_ERR(FUNC_WIPHY_FMT" unknown P2P Device wdev:%p\n", FUNC_WIPHY_ARG(wiphy), wdev); -+ rtw_warn_on(1); -+ } -+ } else -+#endif -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+exit: -+ rtw_set_rtnl_lock_holder(dvobj, NULL); -+ return ret; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+static int cfg80211_rtw_get_channel(struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ struct cfg80211_chan_def *chandef) -+{ -+ _adapter *padapter = wiphy_to_adapter(wiphy); -+ struct mlme_ext_priv *mlmeext = &(padapter->mlmeextpriv); -+ u8 ht_option = 0; -+ u8 report = 0; -+ int retval = 1; -+ -+ if (MLME_IS_ASOC(padapter)) { -+#ifdef CONFIG_80211N_HT -+ ht_option = padapter->mlmepriv.htpriv.ht_option; -+#endif /* CONFIG_80211N_HT */ -+ report = 1; -+ } else if (MLME_IS_MONITOR(padapter)) { -+ /* monitor mode always set to HT -+ we don't support sniffer No HT */ -+ ht_option = 1; -+ report = 1; -+ } -+ -+ if (report) { -+ rtw_chbw_to_cfg80211_chan_def(wiphy, chandef, -+ mlmeext->cur_channel, mlmeext->cur_bwmode, -+ mlmeext->cur_ch_offset, ht_option); -+ retval = 0; -+ } -+ -+ return retval; -+} -+ -+static void rtw_get_chbwoff_from_cfg80211_chan_def( -+ struct cfg80211_chan_def *chandef, -+ u8 *ht, u8 *ch, u8 *bw, u8 *offset) -+{ -+ struct ieee80211_channel *chan = chandef->chan; -+ -+ *ch = chan->hw_value; -+ *ht = 1; -+ -+ switch (chandef->width) { -+ case NL80211_CHAN_WIDTH_20_NOHT: -+ *ht = 0; -+ /* fall through */ -+ case NL80211_CHAN_WIDTH_20: -+ *bw = CHANNEL_WIDTH_20; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case NL80211_CHAN_WIDTH_40: -+ *bw = CHANNEL_WIDTH_40; -+ *offset = (chandef->center_freq1 > chan->center_freq) ? -+ HAL_PRIME_CHNL_OFFSET_LOWER : HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ case NL80211_CHAN_WIDTH_80: -+ *bw = CHANNEL_WIDTH_80; -+ *offset = (chandef->center_freq1 > chan->center_freq) ? -+ HAL_PRIME_CHNL_OFFSET_LOWER : HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ case NL80211_CHAN_WIDTH_160: -+ *bw = CHANNEL_WIDTH_160; -+ *offset = (chandef->center_freq1 > chan->center_freq) ? -+ HAL_PRIME_CHNL_OFFSET_LOWER : HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ case NL80211_CHAN_WIDTH_80P80: -+ *bw = CHANNEL_WIDTH_80_80; -+ *offset = (chandef->center_freq1 > chan->center_freq) ? -+ HAL_PRIME_CHNL_OFFSET_LOWER : HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ case NL80211_CHAN_WIDTH_5: -+ *bw = CHANNEL_WIDTH_5; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ case NL80211_CHAN_WIDTH_10: -+ *bw = CHANNEL_WIDTH_10; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+#endif -+ default: -+ *ht = 0; -+ *bw = CHANNEL_WIDTH_20; -+ *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ RTW_INFO("unsupported cwidth:%u\n", chandef->width); -+ rtw_warn_on(1); -+ }; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) */ -+ -+static int cfg80211_rtw_set_monitor_channel(struct wiphy *wiphy -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ , struct cfg80211_chan_def *chandef -+#else -+ , struct ieee80211_channel *chan -+ , enum nl80211_channel_type channel_type -+#endif -+ ) -+{ -+ _adapter *padapter = wiphy_to_adapter(wiphy); -+ u8 target_channal, target_offset, target_width, ht_option; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("center_freq %u Mhz ch %u width %u freq1 %u freq2 %u\n" -+ , chandef->chan->center_freq -+ , chandef->chan->hw_value -+ , chandef->width -+ , chandef->center_freq1 -+ , chandef->center_freq2); -+#endif /* CONFIG_DEBUG_CFG80211 */ -+ -+ rtw_get_chbwoff_from_cfg80211_chan_def(chandef, -+ &ht_option, &target_channal, &target_width, &target_offset); -+#else -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("center_freq %u Mhz ch %u channel_type %u\n" -+ , chan->center_freq -+ , chan->hw_value -+ , channel_type); -+#endif /* CONFIG_DEBUG_CFG80211 */ -+ -+ rtw_get_chbw_from_nl80211_channel_type(chan, channel_type, -+ &ht_option, &target_channal, &target_width, &target_offset); -+#endif -+ RTW_INFO(FUNC_ADPT_FMT" ch:%d bw:%d, offset:%d\n", -+ FUNC_ADPT_ARG(padapter), target_channal, -+ target_width, target_offset); -+ -+ rtw_set_chbw_cmd(padapter, target_channal, target_width, -+ target_offset, RTW_CMDF_WAIT_ACK); -+ -+ return 0; -+} -+ -+void rtw_cfg80211_external_auth_request(_adapter *padapter, union recv_frame *rframe) -+{ -+ struct rtw_external_auth_params params; -+ struct wireless_dev *wdev = padapter->rtw_wdev; -+ struct net_device *netdev = wdev_to_ndev(wdev); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ -+ u8 frame[256] = { 0 }; -+ uint frame_len = 24; -+ s32 freq = 0; -+ -+ /* rframe, in this case is null point */ -+ -+ freq = rtw_ch2freq(pmlmeext->cur_channel); -+ -+#if (KERNEL_VERSION(4, 17, 0) <= LINUX_VERSION_CODE) \ -+ || defined(CONFIG_KERNEL_PATCH_EXTERNAL_AUTH) -+ params.action = EXTERNAL_AUTH_START; -+ _rtw_memcpy(params.bssid, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ params.ssid.ssid_len = pmlmeinfo->network.Ssid.SsidLength; -+ _rtw_memcpy(params.ssid.ssid, pmlmeinfo->network.Ssid.Ssid, -+ pmlmeinfo->network.Ssid.SsidLength); -+ params.key_mgmt_suite = 0x8ac0f00; -+ -+ cfg80211_external_auth_request(netdev, -+ (struct cfg80211_external_auth_params *)¶ms, GFP_ATOMIC); -+#elif (KERNEL_VERSION(2, 6, 37) <= LINUX_VERSION_CODE) -+ set_frame_sub_type(frame, WIFI_AUTH); -+ -+ _rtw_memcpy(frame + 4, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ _rtw_memcpy(frame + 10, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(frame + 16, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); -+ RTW_PUT_LE32((frame + 18), 0x8ac0f00); -+ -+ if (pmlmeinfo->network.Ssid.SsidLength) { -+ *(frame + 23) = pmlmeinfo->network.Ssid.SsidLength; -+ _rtw_memcpy(frame + 24, pmlmeinfo->network.Ssid.Ssid, -+ pmlmeinfo->network.Ssid.SsidLength); -+ frame_len = 24 + pmlmeinfo->network.Ssid.SsidLength; -+ } -+ rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC); -+#endif -+} -+ -+void rtw_cfg80211_rx_probe_request(_adapter *adapter, union recv_frame *rframe) -+{ -+ struct wireless_dev *wdev = adapter->rtw_wdev; -+ u8 *frame = get_recvframe_data(rframe); -+ uint frame_len = rframe->u.hdr.len; -+ s32 freq; -+ u8 ch, sch = rtw_get_oper_ch(adapter); -+ -+ ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch; -+ freq = rtw_ch2freq(ch); -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("RTW_Rx: probe request, ch=%d(%d), ta="MAC_FMT"\n" -+ , ch, sch, MAC_ARG(get_addr2_ptr(frame))); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC); -+#else -+ cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); -+#endif -+} -+ -+void rtw_cfg80211_rx_action_p2p(_adapter *adapter, union recv_frame *rframe) -+{ -+ struct wireless_dev *wdev = adapter->rtw_wdev; -+ u8 *frame = get_recvframe_data(rframe); -+ uint frame_len = rframe->u.hdr.len; -+ s32 freq; -+ u8 ch, sch = rtw_get_oper_ch(adapter); -+ u8 category, action; -+ int type; -+ -+ ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch; -+ freq = rtw_ch2freq(ch); -+ -+ RTW_INFO("RTW_Rx:ch=%d(%d), ta="MAC_FMT"\n" -+ , ch, sch, MAC_ARG(get_addr2_ptr(frame))); -+#ifdef CONFIG_P2P -+ type = rtw_p2p_check_frames(adapter, frame, frame_len, _FALSE); -+ if (type >= 0) -+ goto indicate; -+#endif -+ rtw_action_frame_parse(frame, frame_len, &category, &action); -+ RTW_INFO("RTW_Rx:category(%u), action(%u)\n", category, action); -+#ifdef CONFIG_P2P -+indicate: -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC); -+#else -+ cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); -+#endif -+} -+ -+void rtw_cfg80211_rx_p2p_action_public(_adapter *adapter, union recv_frame *rframe) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct wireless_dev *wdev = adapter->rtw_wdev; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); -+ u8 *frame = get_recvframe_data(rframe); -+ uint frame_len = rframe->u.hdr.len; -+ s32 freq; -+ u8 ch, sch = rtw_get_oper_ch(adapter); -+ u8 category, action; -+ int type; -+ -+ ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch; -+ freq = rtw_ch2freq(ch); -+ -+ RTW_INFO("RTW_Rx:ch=%d(%d), ta="MAC_FMT"\n" -+ , ch, sch, MAC_ARG(get_addr2_ptr(frame))); -+ #ifdef CONFIG_P2P -+ type = rtw_p2p_check_frames(adapter, frame, frame_len, _FALSE); -+ if (type >= 0) { -+ switch (type) { -+ case P2P_GO_NEGO_CONF: -+ if (0) { -+ RTW_INFO(FUNC_ADPT_FMT" Nego confirm. state=%u, status=%u, iaddr="MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), pwdev_priv->nego_info.state, pwdev_priv->nego_info.status -+ , MAC_ARG(pwdev_priv->nego_info.iface_addr)); -+ } -+ if (pwdev_priv->nego_info.state == 2 -+ && pwdev_priv->nego_info.status == 0 -+ && rtw_check_invalid_mac_address(pwdev_priv->nego_info.iface_addr, _FALSE) == _FALSE -+ ) { -+ _adapter *intended_iface = dvobj_get_adapter_by_addr(dvobj, pwdev_priv->nego_info.iface_addr); -+ -+ if (intended_iface) { -+ RTW_INFO(FUNC_ADPT_FMT" Nego confirm. Allow only "ADPT_FMT" to scan for 2000 ms\n" -+ , FUNC_ADPT_ARG(adapter), ADPT_ARG(intended_iface)); -+ /* allow only intended_iface to do scan for 2000 ms */ -+ rtw_mi_set_scan_deny(adapter, 2000); -+ rtw_clear_scan_deny(intended_iface); -+ } -+ } -+ break; -+ case P2P_PROVISION_DISC_RESP: -+ case P2P_INVIT_RESP: -+ rtw_clear_scan_deny(adapter); -+ #if !RTW_P2P_GROUP_INTERFACE -+ rtw_mi_buddy_set_scan_deny(adapter, 2000); -+ #endif -+ break; -+ } -+ goto indicate; -+ } -+ #endif -+ rtw_action_frame_parse(frame, frame_len, &category, &action); -+ RTW_INFO("RTW_Rx:category(%u), action(%u)\n", category, action); -+#ifdef CONFIG_P2P -+indicate: -+#endif -+ #if defined(RTW_DEDICATED_P2P_DEVICE) -+ if (rtw_cfg80211_redirect_pd_wdev(dvobj_to_wiphy(dvobj), get_ra(frame), &wdev)) -+ if (0) -+ RTW_INFO("redirect to pd_wdev:%p\n", wdev); -+ #endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC); -+#else -+ cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); -+#endif -+} -+ -+void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const char *msg) -+{ -+ struct wireless_dev *wdev = adapter->rtw_wdev; -+ u8 *frame = get_recvframe_data(rframe); -+ uint frame_len = rframe->u.hdr.len; -+ s32 freq; -+ u8 ch, sch = rtw_get_oper_ch(adapter); -+ u8 category, action; -+ int type = -1; -+ -+ ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch; -+ freq = rtw_ch2freq(ch); -+ -+ RTW_INFO("RTW_Rx:ch=%d(%d), ta="MAC_FMT"\n" -+ , ch, sch, MAC_ARG(get_addr2_ptr(frame))); -+ -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(adapter)) { -+ type = rtw_mesh_check_frames_rx(adapter, frame, frame_len); -+ if (type >= 0) -+ goto indicate; -+ } -+#endif -+ rtw_action_frame_parse(frame, frame_len, &category, &action); -+ if (category == RTW_WLAN_CATEGORY_PUBLIC) { -+ if (action == ACT_PUBLIC_GAS_INITIAL_REQ) { -+ rtw_mi_set_scan_deny(adapter, 200); -+ rtw_mi_scan_abort(adapter, _FALSE); /*rtw_scan_abort_no_wait*/ -+ } -+ } -+#ifdef CONFIG_RTW_MESH -+indicate: -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC); -+#else -+ cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); -+#endif -+ -+ if (type == -1) { -+ if (msg) -+ RTW_INFO("RTW_Rx:%s\n", msg); -+ else -+ RTW_INFO("RTW_Rx:category(%u), action(%u)\n", category, action); -+ } -+} -+ -+#ifdef CONFIG_RTW_80211K -+void rtw_cfg80211_rx_rrm_action(_adapter *adapter, union recv_frame *rframe) -+{ -+ struct wireless_dev *wdev = adapter->rtw_wdev; -+ u8 *frame = get_recvframe_data(rframe); -+ uint frame_len = rframe->u.hdr.len; -+ s32 freq; -+ u8 ch, sch = rtw_get_oper_ch(adapter); -+ -+ ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch; -+ freq = rtw_ch2freq(ch); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC); -+#else -+ cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); -+#endif -+ RTW_INFO("RTW_Rx:ch=%d(%d), ta="MAC_FMT"\n" -+ , ch, sch, MAC_ARG(get_addr2_ptr(frame))); -+} -+#endif /* CONFIG_RTW_80211K */ -+ -+void rtw_cfg80211_rx_mframe(_adapter *adapter, union recv_frame *rframe, const char *msg) -+{ -+ struct wireless_dev *wdev = adapter->rtw_wdev; -+ u8 *frame = get_recvframe_data(rframe); -+ uint frame_len = rframe->u.hdr.len; -+ s32 freq; -+ u8 ch, sch = rtw_get_oper_ch(adapter); -+ -+ ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch; -+ freq = rtw_ch2freq(ch); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC); -+#else -+ cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); -+#endif -+ -+ RTW_INFO("RTW_Rx:ch=%d(%d), ta="MAC_FMT"\n", ch, sch, MAC_ARG(get_addr2_ptr(frame))); -+ if (!rtw_sae_preprocess(adapter, frame, frame_len, _FALSE)) { -+ if (msg) -+ RTW_INFO("RTW_Rx:%s\n", msg); -+ else -+ RTW_INFO("RTW_Rx:frame_control:0x%02x\n", le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)rframe)->frame_ctl)); -+ } -+} -+ -+#ifdef CONFIG_P2P -+void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len) -+{ -+ u16 wps_devicepassword_id = 0x0000; -+ uint wps_devicepassword_id_len = 0; -+ u8 wpsie[255] = { 0x00 }, p2p_ie[255] = { 0x00 }; -+ uint p2p_ielen = 0; -+ uint wpsielen = 0; -+ u32 devinfo_contentlen = 0; -+ u8 devinfo_content[64] = { 0x00 }; -+ u16 capability = 0; -+ uint capability_len = 0; -+ -+ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; -+ u8 action = P2P_PUB_ACTION_ACTION; -+ u8 dialogToken = 1; -+ u32 p2poui = cpu_to_be32(P2POUI); -+ u8 oui_subtype = P2P_PROVISION_DISC_REQ; -+ u32 p2pielen = 0; -+#ifdef CONFIG_WFD -+ u32 wfdielen = 0; -+#endif -+ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ unsigned short *fctrl; -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); -+ size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ -+ RTW_INFO("[%s] In\n", __FUNCTION__); -+ -+ /* prepare for building provision_request frame */ -+ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr1Ptr(buf), ETH_ALEN); -+ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, GetAddr1Ptr(buf), ETH_ALEN); -+ -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; -+ -+ rtw_get_wps_ie(frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); -+ rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8 *) &wps_devicepassword_id, &wps_devicepassword_id_len); -+ wps_devicepassword_id = be16_to_cpu(wps_devicepassword_id); -+ -+ switch (wps_devicepassword_id) { -+ case WPS_DPID_PIN: -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; -+ break; -+ case WPS_DPID_USER_SPEC: -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; -+ break; -+ case WPS_DPID_MACHINE_SPEC: -+ break; -+ case WPS_DPID_REKEY: -+ break; -+ case WPS_DPID_PBC: -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; -+ break; -+ case WPS_DPID_REGISTRAR_SPEC: -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; -+ break; -+ default: -+ break; -+ } -+ -+ -+ if (rtw_get_p2p_ie(frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen)) { -+ -+ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); -+ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8 *)&capability, &capability_len); -+ -+ } -+ -+ -+ /* start to build provision_request frame */ -+ _rtw_memset(wpsie, 0, sizeof(wpsie)); -+ _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); -+ p2p_ielen = 0; -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) -+ return; -+ -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ fctrl = &(pwlanhdr->frame_ctl); -+ *(fctrl) = 0; -+ -+ _rtw_memcpy(pwlanhdr->addr1, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); -+ -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ set_frame_sub_type(pframe, WIFI_ACTION); -+ -+ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); -+ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); -+ -+ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); -+ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); -+ -+ -+ /* build_prov_disc_request_p2p_ie */ -+ /* P2P OUI */ -+ p2pielen = 0; -+ p2p_ie[p2pielen++] = 0x50; -+ p2p_ie[p2pielen++] = 0x6F; -+ p2p_ie[p2pielen++] = 0x9A; -+ p2p_ie[p2pielen++] = 0x09; /* WFA P2P v1.0 */ -+ -+ /* Commented by Albert 20110301 */ -+ /* According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes */ -+ /* 1. P2P Capability */ -+ /* 2. Device Info */ -+ /* 3. Group ID ( When joining an operating P2P Group ) */ -+ -+ /* P2P Capability ATTR */ -+ /* Type: */ -+ p2p_ie[p2pielen++] = P2P_ATTR_CAPABILITY; -+ -+ /* Length: */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); */ -+ RTW_PUT_LE16(p2p_ie + p2pielen, 0x0002); -+ p2pielen += 2; -+ -+ /* Value: */ -+ /* Device Capability Bitmap, 1 byte */ -+ /* Group Capability Bitmap, 1 byte */ -+ _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); -+ p2pielen += 2; -+ -+ -+ /* Device Info ATTR */ -+ /* Type: */ -+ p2p_ie[p2pielen++] = P2P_ATTR_DEVICE_INFO; -+ -+ /* Length: */ -+ /* 21->P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) */ -+ /* + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) */ -+ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); */ -+ RTW_PUT_LE16(p2p_ie + p2pielen, devinfo_contentlen); -+ p2pielen += 2; -+ -+ /* Value: */ -+ _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); -+ p2pielen += devinfo_contentlen; -+ -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); -+ /* p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); */ -+ /* pframe += p2pielen; */ -+ pattrib->pktlen += p2p_ielen; -+ -+ wpsielen = 0; -+ /* WPS OUI */ -+ *(u32 *)(wpsie) = cpu_to_be32(WPSOUI); -+ wpsielen += 4; -+ -+ /* WPS version */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001); -+ wpsielen += 2; -+ -+ /* Value: */ -+ wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */ -+ -+ /* Config Method */ -+ /* Type: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_CONF_METHOD); -+ wpsielen += 2; -+ -+ /* Length: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0002); -+ wpsielen += 2; -+ -+ /* Value: */ -+ *(u16 *)(wpsie + wpsielen) = cpu_to_be16(pwdinfo->tx_prov_disc_info.wps_config_method_request); -+ wpsielen += 2; -+ -+ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen); -+ -+ -+#ifdef CONFIG_WFD -+ wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); -+ pframe += wfdielen; -+ pattrib->pktlen += wfdielen; -+#endif -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ /* dump_mgntframe(padapter, pmgntframe); */ -+ if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) -+ RTW_INFO("%s, ack to\n", __func__); -+ -+ #if 0 -+ if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) { -+ RTW_INFO("waiting for p2p peer key-in PIN CODE\n"); -+ rtw_msleep_os(15000); /* 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. */ -+ } -+ #endif -+ -+} -+ -+#ifdef CONFIG_RTW_80211R -+static s32 cfg80211_rtw_update_ft_ies(struct wiphy *wiphy, -+ struct net_device *ndev, -+ struct cfg80211_update_ft_ies_params *ftie) -+{ -+ _adapter *padapter = NULL; -+ struct mlme_priv *pmlmepriv = NULL; -+ struct ft_roam_info *pft_roam = NULL; -+ _irqL irqL; -+ u8 *p; -+ u8 *pie = NULL; -+ u32 ie_len = 0; -+ -+ if (ndev == NULL) -+ return -EINVAL; -+ -+ padapter = (_adapter *)rtw_netdev_priv(ndev); -+ pmlmepriv = &(padapter->mlmepriv); -+ pft_roam = &(pmlmepriv->ft_roam); -+ -+ p = (u8 *)ftie->ie; -+ if (ftie->ie_len <= sizeof(pft_roam->updated_ft_ies)) { -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ _rtw_memcpy(pft_roam->updated_ft_ies, ftie->ie, ftie->ie_len); -+ pft_roam->updated_ft_ies_len = ftie->ie_len; -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ } else { -+ RTW_ERR("FTIEs parsing fail!\n"); -+ return -EINVAL; -+ } -+ -+ if (rtw_ft_roam_status(padapter, RTW_FT_AUTHENTICATED_STA)) { -+ RTW_PRINT("auth success, start reassoc\n"); -+ rtw_ft_lock_set_status(padapter, RTW_FT_ASSOCIATING_STA, &irqL); -+ start_clnt_assoc(padapter); -+ } -+ -+ return 0; -+} -+#endif -+#endif /* CONFIG_P2P */ -+ -+inline void rtw_cfg80211_set_is_roch(_adapter *adapter, bool val) -+{ -+ adapter->rochinfo.is_ro_ch = val; -+ rtw_mi_update_iface_status(&(adapter->mlmepriv), 0); -+} -+ -+inline bool rtw_cfg80211_get_is_roch(_adapter *adapter) -+{ -+ return adapter->rochinfo.is_ro_ch; -+} -+ -+inline bool rtw_cfg80211_is_ro_ch_once(_adapter *adapter) -+{ -+ return adapter->rochinfo.last_ro_ch_time ? 1 : 0; -+} -+ -+inline void rtw_cfg80211_set_last_ro_ch_time(_adapter *adapter) -+{ -+ adapter->rochinfo.last_ro_ch_time = rtw_get_current_time(); -+ -+ if (!adapter->rochinfo.last_ro_ch_time) -+ adapter->rochinfo.last_ro_ch_time++; -+} -+ -+inline s32 rtw_cfg80211_get_last_ro_ch_passing_ms(_adapter *adapter) -+{ -+ return rtw_get_passing_time_ms(adapter->rochinfo.last_ro_ch_time); -+} -+ -+static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ struct wireless_dev *wdev, -+#else -+ struct net_device *ndev, -+#endif -+ struct ieee80211_channel *channel, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) -+ enum nl80211_channel_type channel_type, -+#endif -+ unsigned int duration, u64 *cookie) -+{ -+ s32 err = 0; -+ u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); -+ _adapter *padapter = NULL; -+ struct rtw_wdev_priv *pwdev_priv; -+ struct roch_info *prochinfo; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo; -+#ifdef CONFIG_CONCURRENT_MODE -+ u8 is_p2p_find = _FALSE; -+#endif -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ #if defined(RTW_DEDICATED_P2P_DEVICE) -+ if (wdev == wiphy_to_pd_wdev(wiphy)) -+ padapter = wiphy_to_adapter(wiphy); -+ else -+ #endif -+ if (wdev_to_ndev(wdev)) -+ padapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev)); -+ else { -+ err = -EINVAL; -+ goto exit; -+ } -+#else -+ struct wireless_dev *wdev; -+ -+ if (ndev == NULL) { -+ err = -EINVAL; -+ goto exit; -+ } -+ padapter = (_adapter *)rtw_netdev_priv(ndev); -+ wdev = ndev_to_wdev(ndev); -+#endif -+ -+ pwdev_priv = adapter_wdev_data(padapter); -+ prochinfo = &padapter->rochinfo; -+#ifdef CONFIG_P2P -+ pwdinfo = &padapter->wdinfo; -+#ifdef CONFIG_CONCURRENT_MODE -+ is_p2p_find = (duration < (pwdinfo->ext_listen_interval)) ? _TRUE : _FALSE; -+#endif -+#endif -+ -+ *cookie = ATOMIC_INC_RETURN(&prochinfo->ro_ch_cookie_gen); -+ -+ RTW_INFO(FUNC_ADPT_FMT"%s ch:%u duration:%d, cookie:0x%llx\n" -+ , FUNC_ADPT_ARG(padapter), wdev == wiphy_to_pd_wdev(wiphy) ? " PD" : "" -+ , remain_ch, duration, *cookie); -+ -+ if (rtw_chset_search_ch(adapter_to_chset(padapter), remain_ch) < 0) { -+ RTW_WARN(FUNC_ADPT_FMT" invalid ch:%u\n", FUNC_ADPT_ARG(padapter), remain_ch); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (rtw_mp_mode_check(padapter)) { -+ RTW_INFO("MP mode block remain_on_channel request\n"); -+ err = -EFAULT; -+ goto exit; -+ } -+#endif -+ -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ rtw_scan_abort(padapter); -+#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_P2P) -+ /*don't scan_abort during p2p_listen.*/ -+ if (is_p2p_find) -+ rtw_mi_buddy_scan_abort(padapter, _TRUE); -+#endif /* defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_P2P) */ -+ -+ if (rtw_cfg80211_get_is_roch(padapter) == _TRUE) { -+ _cancel_timer_ex(&padapter->rochinfo.remain_on_ch_timer); -+ rtw_cancel_roch_cmd(padapter, 0, NULL, RTW_CMDF_WAIT_ACK); -+ } -+ -+#ifdef CONFIG_P2P -+ /* if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) */ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) -+ #if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_P2P) -+ && ((padapter->iface_id == padapter->registrypriv.sel_p2p_iface)) -+ #endif -+ ) { -+ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); -+ padapter->wdinfo.listen_channel = remain_ch; -+ RTW_INFO(FUNC_ADPT_FMT" init listen_channel %u\n" -+ , FUNC_ADPT_ARG(padapter), padapter->wdinfo.listen_channel); -+ } else if (rtw_p2p_chk_state(pwdinfo , P2P_STATE_LISTEN) -+ && (time_after_eq(rtw_get_current_time(), pwdev_priv->probe_resp_ie_update_time) -+ && rtw_get_passing_time_ms(pwdev_priv->probe_resp_ie_update_time) < 50) -+ ) { -+ if (padapter->wdinfo.listen_channel != remain_ch) { -+ padapter->wdinfo.listen_channel = remain_ch; -+ RTW_INFO(FUNC_ADPT_FMT" update listen_channel %u\n" -+ , FUNC_ADPT_ARG(padapter), padapter->wdinfo.listen_channel); -+ } -+ } else { -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -+#endif -+ } -+ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); -+#endif /* CONFIG_P2P */ -+ -+ #ifdef RTW_ROCH_DURATION_ENLARGE -+ if (duration < 400) -+ duration = duration * 3; /* extend from exper */ -+ #endif -+ -+#if defined(RTW_ROCH_BACK_OP) && defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_P2P) -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ if (is_p2p_find) /* p2p_find , duration<1000 */ -+ duration = duration + pwdinfo->ext_listen_interval; -+ } -+#endif /* defined (RTW_ROCH_BACK_OP) && defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_P2P) */ -+ -+ rtw_cfg80211_set_is_roch(padapter, _TRUE); -+ prochinfo->ro_ch_wdev = wdev; -+ prochinfo->remain_on_ch_cookie = *cookie; -+ rtw_cfg80211_set_last_ro_ch_time(padapter); -+ _rtw_memcpy(&prochinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel)); -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) -+ prochinfo->remain_on_ch_type = channel_type; -+ #endif -+ prochinfo->restore_channel = rtw_get_oper_ch(padapter); -+ -+ rtw_roch_cmd(padapter, *cookie, wdev, channel, prochinfo->remain_on_ch_type, -+ duration, RTW_CMDF_WAIT_ACK); -+ -+ rtw_cfg80211_ready_on_channel(wdev, *cookie, channel, channel_type, duration, GFP_KERNEL); -+exit: -+ return err; -+} -+ -+static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ struct wireless_dev *wdev, -+#else -+ struct net_device *ndev, -+#endif -+ u64 cookie) -+{ -+ s32 err = 0; -+ _adapter *padapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ struct roch_info *prochinfo; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ #if defined(RTW_DEDICATED_P2P_DEVICE) -+ if (wdev == wiphy_to_pd_wdev(wiphy)) -+ padapter = wiphy_to_adapter(wiphy); -+ else -+ #endif -+ if (wdev_to_ndev(wdev)) -+ padapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev)); -+ else { -+ err = -EINVAL; -+ goto exit; -+ } -+#else -+ struct wireless_dev *wdev; -+ -+ if (ndev == NULL) { -+ err = -EINVAL; -+ goto exit; -+ } -+ padapter = (_adapter *)rtw_netdev_priv(ndev); -+ wdev = ndev_to_wdev(ndev); -+#endif -+ -+ pwdev_priv = adapter_wdev_data(padapter); -+ prochinfo = &padapter->rochinfo; -+#ifdef CONFIG_P2P -+ pwdinfo = &padapter->wdinfo; -+#endif -+ -+ RTW_INFO(FUNC_ADPT_FMT"%s cookie:0x%llx\n" -+ , FUNC_ADPT_ARG(padapter), wdev == wiphy_to_pd_wdev(wiphy) ? " PD" : "" -+ , cookie); -+ -+ if (rtw_cfg80211_get_is_roch(padapter) == _TRUE) { -+ _cancel_timer_ex(&padapter->rochinfo.remain_on_ch_timer); -+ rtw_cancel_roch_cmd(padapter, cookie, wdev, RTW_CMDF_WAIT_ACK); -+ } -+ -+exit: -+ return err; -+} -+ -+#ifdef CONFIG_P2P -+inline int rtw_cfg80211_iface_has_p2p_group_cap(_adapter *adapter) -+{ -+#if RTW_P2P_GROUP_INTERFACE -+ if (is_primary_adapter(adapter)) -+ return 0; -+#endif -+ return 1; -+} -+ -+inline int rtw_cfg80211_is_p2p_scan(_adapter *adapter) -+{ -+#if RTW_P2P_GROUP_INTERFACE -+ if (rtw_cfg80211_iface_has_p2p_group_cap(adapter)) -+#endif -+ { -+ struct wifidirect_info *wdinfo = &adapter->wdinfo; -+ -+ return rtw_p2p_chk_state(wdinfo, P2P_STATE_SCAN) -+ || rtw_p2p_chk_state(wdinfo, P2P_STATE_FIND_PHASE_SEARCH); -+ } -+ -+#if RTW_P2P_GROUP_INTERFACE -+ #if defined(RTW_DEDICATED_P2P_DEVICE) -+ if (wiphy_to_pd_wdev(adapter_to_wiphy(adapter))) /* pd_wdev exist */ -+ return rtw_cfg80211_is_scan_by_pd_wdev(adapter); -+ #endif -+ { -+ /* -+ * For 2 RTW_P2P_GROUP_INTERFACE cases: -+ * 1. RTW_DEDICATED_P2P_DEVICE defined but upper layer don't use pd_wdev or -+ * 2. RTW_DEDICATED_P2P_DEVICE not defined -+ */ -+ struct rtw_wdev_priv *wdev_data = adapter_wdev_data(adapter); -+ _irqL irqL; -+ int is_p2p_scan = 0; -+ -+ _enter_critical_bh(&wdev_data->scan_req_lock, &irqL); -+ if (wdev_data->scan_request -+ && wdev_data->scan_request->n_ssids -+ && wdev_data->scan_request->ssids -+ && wdev_data->scan_request->ie -+ ) { -+ if (_rtw_memcmp(wdev_data->scan_request->ssids[0].ssid, "DIRECT-", 7) -+ && rtw_get_p2p_ie((u8 *)wdev_data->scan_request->ie, wdev_data->scan_request->ie_len, NULL, NULL)) -+ is_p2p_scan = 1; -+ } -+ _exit_critical_bh(&wdev_data->scan_req_lock, &irqL); -+ -+ return is_p2p_scan; -+ } -+#endif -+} -+ -+#if defined(RTW_DEDICATED_P2P_DEVICE) -+int rtw_pd_iface_alloc(struct wiphy *wiphy, const char *name, struct wireless_dev **pd_wdev) -+{ -+ struct rtw_wiphy_data *wiphy_data = rtw_wiphy_priv(wiphy); -+ struct wireless_dev *wdev = NULL; -+ struct rtw_netdev_priv_indicator *npi; -+ _adapter *primary_adpt = wiphy_to_adapter(wiphy); -+ int ret = 0; -+ -+ if (wiphy_data->pd_wdev) { -+ RTW_WARN(FUNC_WIPHY_FMT" pd_wdev already exists\n", FUNC_WIPHY_ARG(wiphy)); -+ ret = -EBUSY; -+ goto exit; -+ } -+ -+ wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); -+ if (!wdev) { -+ RTW_WARN(FUNC_WIPHY_FMT" allocate wdev fail\n", FUNC_WIPHY_ARG(wiphy)); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ -+ wdev->wiphy = wiphy; -+ wdev->iftype = NL80211_IFTYPE_P2P_DEVICE; -+ _rtw_memcpy(wdev->address, adapter_mac_addr(primary_adpt), ETH_ALEN); -+ -+ wiphy_data->pd_wdev = wdev; -+ *pd_wdev = wdev; -+ -+ RTW_INFO(FUNC_WIPHY_FMT" pd_wdev:%p, addr="MAC_FMT" added\n" -+ , FUNC_WIPHY_ARG(wiphy), wdev, MAC_ARG(wdev_address(wdev))); -+ -+exit: -+ if (ret && wdev) { -+ rtw_mfree((u8 *)wdev, sizeof(struct wireless_dev)); -+ wdev = NULL; -+ } -+ -+ return ret; -+} -+ -+void rtw_pd_iface_free(struct wiphy *wiphy) -+{ -+ struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy); -+ struct rtw_wiphy_data *wiphy_data = rtw_wiphy_priv(wiphy); -+ u8 rtnl_lock_needed; -+ -+ if (!wiphy_data->pd_wdev) -+ goto exit; -+ -+ RTW_INFO(FUNC_WIPHY_FMT" pd_wdev:%p, addr="MAC_FMT"\n" -+ , FUNC_WIPHY_ARG(wiphy), wiphy_data->pd_wdev -+ , MAC_ARG(wdev_address(wiphy_data->pd_wdev))); -+ -+ rtnl_lock_needed = rtw_rtnl_lock_needed(dvobj); -+ if (rtnl_lock_needed) -+ rtnl_lock(); -+ cfg80211_unregister_wdev(wiphy_data->pd_wdev); -+ if (rtnl_lock_needed) -+ rtnl_unlock(); -+ -+ rtw_mfree((u8 *)wiphy_data->pd_wdev, sizeof(struct wireless_dev)); -+ wiphy_data->pd_wdev = NULL; -+ -+exit: -+ return; -+} -+ -+static int cfg80211_rtw_start_p2p_device(struct wiphy *wiphy, struct wireless_dev *wdev) -+{ -+ _adapter *adapter = wiphy_to_adapter(wiphy); -+ -+ RTW_INFO(FUNC_WIPHY_FMT" wdev=%p\n", FUNC_WIPHY_ARG(wiphy), wdev); -+ -+ rtw_p2p_enable(adapter, P2P_ROLE_DEVICE); -+ return 0; -+} -+ -+static void cfg80211_rtw_stop_p2p_device(struct wiphy *wiphy, struct wireless_dev *wdev) -+{ -+ _adapter *adapter = wiphy_to_adapter(wiphy); -+ -+ RTW_INFO(FUNC_WIPHY_FMT" wdev=%p\n", FUNC_WIPHY_ARG(wiphy), wdev); -+ -+ if (rtw_cfg80211_is_p2p_scan(adapter)) -+ rtw_scan_abort(adapter); -+ -+ rtw_p2p_enable(adapter, P2P_ROLE_DISABLE); -+} -+ -+inline int rtw_cfg80211_redirect_pd_wdev(struct wiphy *wiphy, u8 *ra, struct wireless_dev **wdev) -+{ -+ struct wireless_dev *pd_wdev = wiphy_to_pd_wdev(wiphy); -+ -+ if (pd_wdev && pd_wdev != *wdev -+ && _rtw_memcmp(wdev_address(pd_wdev), ra, ETH_ALEN) == _TRUE -+ ) { -+ *wdev = pd_wdev; -+ return 1; -+ } -+ return 0; -+} -+ -+inline int rtw_cfg80211_is_scan_by_pd_wdev(_adapter *adapter) -+{ -+ struct wiphy *wiphy = adapter_to_wiphy(adapter); -+ struct rtw_wdev_priv *wdev_data = adapter_wdev_data(adapter); -+ struct wireless_dev *wdev = NULL; -+ _irqL irqL; -+ -+ _enter_critical_bh(&wdev_data->scan_req_lock, &irqL); -+ if (wdev_data->scan_request) -+ wdev = wdev_data->scan_request->wdev; -+ _exit_critical_bh(&wdev_data->scan_req_lock, &irqL); -+ -+ if (wdev && wdev == wiphy_to_pd_wdev(wiphy)) -+ return 1; -+ -+ return 0; -+} -+#endif /* RTW_DEDICATED_P2P_DEVICE */ -+#endif /* CONFIG_P2P */ -+ -+inline void rtw_cfg80211_set_is_mgmt_tx(_adapter *adapter, u8 val) -+{ -+ struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter); -+ -+ wdev_priv->is_mgmt_tx = val; -+ rtw_mi_update_iface_status(&(adapter->mlmepriv), 0); -+} -+ -+inline u8 rtw_cfg80211_get_is_mgmt_tx(_adapter *adapter) -+{ -+ struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter); -+ -+ return wdev_priv->is_mgmt_tx; -+} -+ -+static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, u8 no_cck, const u8 *buf, size_t len, int wait_ack) -+{ -+ struct xmit_frame *pmgntframe; -+ struct pkt_attrib *pattrib; -+ unsigned char *pframe; -+ int ret = _FAIL; -+ bool ack = _TRUE; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+#if defined(RTW_ROCH_BACK_OP) && defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE) -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+#endif -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ u8 u_ch = rtw_mi_get_union_chan(padapter); -+ u8 leave_op = 0; -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#if defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE) -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif -+ -+ rtw_cfg80211_set_is_mgmt_tx(padapter, 1); -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_ScanNotify(padapter, _TRUE); -+#endif -+ -+#ifdef CONFIG_P2P -+ if (rtw_cfg80211_get_is_roch(padapter) == _TRUE) { -+ #ifdef CONFIG_CONCURRENT_MODE -+ if (!check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) { -+ RTW_INFO("%s, extend ro ch time\n", __func__); -+ _set_timer(&padapter->rochinfo.remain_on_ch_timer, pwdinfo->ext_listen_period); -+ } -+ #endif /* CONFIG_CONCURRENT_MODE */ -+ } -+#endif /* CONFIG_P2P */ -+ -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) { -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) -+ /* don't set channel, issue frame directly */ -+ goto issue_mgmt_frame; -+ } -+#endif /* CONFIG_MCC_MODE */ -+ -+ if (rtw_mi_check_status(padapter, MI_LINKED) -+ && tx_ch != u_ch -+ ) { -+ rtw_leave_opch(padapter); -+ leave_op = 1; -+ } -+ -+ if (tx_ch != rtw_get_oper_ch(padapter)) -+ set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+#ifdef CONFIG_MCC_MODE -+issue_mgmt_frame: -+#endif -+ /* starting alloc mgmt frame to dump it */ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ /* ret = -ENOMEM; */ -+ ret = _FAIL; -+ goto exit; -+ } -+ -+ /* update attribute */ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ -+ if (no_cck && IS_CCK_RATE(pattrib->rate)) { -+ /* force OFDM 6M rate*/ -+ pattrib->rate = MGN_6M; -+ pattrib->raid = rtw_get_mgntframe_raid(padapter, WIRELESS_11G); -+ } -+ -+ pattrib->retry_ctrl = _FALSE; -+ -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ -+ _rtw_memcpy(pframe, (void *)buf, len); -+ pattrib->pktlen = len; -+ -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ /* update seq number */ -+ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); -+ pattrib->seqnum = pmlmeext->mgnt_seq; -+ pmlmeext->mgnt_seq++; -+ -+#ifdef CONFIG_P2P -+ rtw_xframe_chk_wfd_ie(pmgntframe); -+#endif /* CONFIG_P2P */ -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ -+ if (wait_ack) { -+ if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) { -+ ack = _FALSE; -+ ret = _FAIL; -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s, ack == _FAIL\n", __func__); -+#endif -+ } else { -+ -+#ifdef CONFIG_XMIT_ACK -+ if (!MLME_IS_MESH(padapter)) /* TODO: remove this sleep for all mode */ -+ rtw_msleep_os(50); -+#endif -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s, ack=%d, ok!\n", __func__, ack); -+#endif -+ ret = _SUCCESS; -+ } -+ } else { -+ dump_mgntframe(padapter, pmgntframe); -+ ret = _SUCCESS; -+ } -+ -+exit: -+ if (rtw_cfg80211_get_is_roch(padapter) -+ && !rtw_roch_stay_in_cur_chan(padapter) -+ && prochinfo->remain_on_ch_channel.hw_value != u_ch -+ ) { -+ /* roch is ongoing, switch back to rch */ -+ if (prochinfo->remain_on_ch_channel.hw_value != tx_ch) -+ set_channel_bwmode(padapter, prochinfo->remain_on_ch_channel.hw_value -+ , HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ } else if (leave_op) { -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ u8 u_bw = rtw_mi_get_union_bw(padapter); -+ u8 u_offset = rtw_mi_get_union_offset(padapter); -+ -+ set_channel_bwmode(padapter, u_ch, u_offset, u_bw); -+ } -+ rtw_back_opch(padapter); -+ } -+ -+ rtw_cfg80211_set_is_mgmt_tx(padapter, 0); -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_ScanNotify(padapter, _FALSE); -+#endif -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("%s, ret=%d\n", __func__, ret); -+#endif -+ -+ return ret; -+ -+} -+ -+u8 rtw_mgnt_tx_handler(_adapter *adapter, u8 *buf) -+{ -+ u8 rst = H2C_CMD_FAIL; -+ struct mgnt_tx_parm *mgnt_parm = (struct mgnt_tx_parm *)buf; -+ -+ if (_cfg80211_rtw_mgmt_tx(adapter, mgnt_parm->tx_ch, mgnt_parm->no_cck, -+ mgnt_parm->buf, mgnt_parm->len, mgnt_parm->wait_ack) == _SUCCESS) -+ rst = H2C_SUCCESS; -+ -+ return rst; -+} -+ -+static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ struct wireless_dev *wdev, -+#else -+ struct net_device *ndev, -+#endif -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) || defined(COMPAT_KERNEL_RELEASE) -+ struct ieee80211_channel *chan, -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) -+ bool offchan, -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) -+ enum nl80211_channel_type channel_type, -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) -+ bool channel_type_valid, -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) -+ unsigned int wait, -+ #endif -+ const u8 *buf, size_t len, -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+ bool no_cck, -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+ bool dont_wait_for_ack, -+ #endif -+#else -+ struct cfg80211_mgmt_tx_params *params, -+#endif -+ u64 *cookie) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(COMPAT_KERNEL_RELEASE) -+ struct ieee80211_channel *chan = params->chan; -+ const u8 *buf = params->buf; -+ size_t len = params->len; -+ bool no_cck = params->no_cck; -+#endif -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0)) -+ bool no_cck = 0; -+#endif -+ int ret = 0; -+ u8 tx_ret; -+ int wait_ack = 1; -+ const u8 *dump_buf = buf; -+ size_t dump_len = len; -+ u32 dump_limit = RTW_MAX_MGMT_TX_CNT; -+ u32 dump_cnt = 0; -+ u32 sleep_ms = 0; -+ u32 retry_guarantee_ms = 0; -+ bool ack = _TRUE; -+ u8 tx_ch; -+ u8 category, action; -+ u8 frame_styp; -+#ifdef CONFIG_P2P -+ u8 is_p2p = 0; -+#endif -+ int type = (-1); -+ systime start = rtw_get_current_time(); -+ _adapter *padapter; -+ struct dvobj_priv *dvobj; -+ struct rtw_wdev_priv *pwdev_priv; -+ struct rf_ctl_t *rfctl; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ #if defined(RTW_DEDICATED_P2P_DEVICE) -+ if (wdev == wiphy_to_pd_wdev(wiphy)) -+ padapter = wiphy_to_adapter(wiphy); -+ else -+ #endif -+ if (wdev_to_ndev(wdev)) -+ padapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev)); -+ else { -+ ret = -EINVAL; -+ goto exit; -+ } -+#else -+ struct wireless_dev *wdev; -+ -+ if (ndev == NULL) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ padapter = (_adapter *)rtw_netdev_priv(ndev); -+ wdev = ndev_to_wdev(ndev); -+#endif -+ -+ if (chan == NULL) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ rfctl = adapter_to_rfctl(padapter); -+ tx_ch = (u8)ieee80211_frequency_to_channel(chan->center_freq); -+ if (IS_CH_WAITING(rfctl)) { -+ #ifdef CONFIG_DFS_MASTER -+ if (_rtw_rfctl_overlap_radar_detect_ch(rfctl, tx_ch, CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ #endif -+ } -+ -+ dvobj = adapter_to_dvobj(padapter); -+ pwdev_priv = adapter_wdev_data(padapter); -+ -+ /* cookie generation */ -+ *cookie = pwdev_priv->mgmt_tx_cookie++; -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO(FUNC_ADPT_FMT"%s len=%zu, ch=%d" -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) -+ ", ch_type=%d" -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) -+ ", channel_type_valid=%d" -+ #endif -+ "\n", FUNC_ADPT_ARG(padapter), wdev == wiphy_to_pd_wdev(wiphy) ? " PD" : "" -+ , len, tx_ch -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) -+ , channel_type -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) -+ , channel_type_valid -+ #endif -+ ); -+#endif /* CONFIG_DEBUG_CFG80211 */ -+ -+ /* indicate ack before issue frame to avoid racing with rsp frame */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ rtw_cfg80211_mgmt_tx_status(wdev, *cookie, buf, len, ack, GFP_KERNEL); -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34) && LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 36)) -+ cfg80211_action_tx_status(ndev, *cookie, buf, len, ack, GFP_KERNEL); -+#endif -+ -+ frame_styp = le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl) & IEEE80211_FCTL_STYPE; -+ if (IEEE80211_STYPE_PROBE_RESP == frame_styp) { -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO("RTW_Tx: probe_resp tx_ch=%d, no_cck=%u, da="MAC_FMT"\n", tx_ch, no_cck, MAC_ARG(GetAddr1Ptr(buf))); -+#endif /* CONFIG_DEBUG_CFG80211 */ -+ wait_ack = 0; -+ goto dump; -+ } -+ else if (frame_styp == RTW_IEEE80211_STYPE_AUTH) { -+ int retval = 0; -+ -+ RTW_INFO("RTW_Tx:tx_ch=%d, no_cck=%u, da="MAC_FMT"\n", tx_ch, no_cck, MAC_ARG(GetAddr1Ptr(buf))); -+ -+ retval = rtw_sae_preprocess(padapter, buf, len, _TRUE); -+ if (retval == 2) -+ goto exit; -+ if (retval == 0) -+ RTW_INFO("RTW_Tx:AUTH\n"); -+ dump_limit = 1; -+ goto dump; -+ } -+ -+ if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { -+ RTW_INFO(FUNC_ADPT_FMT" frame_control:0x%02x\n", FUNC_ADPT_ARG(padapter), -+ le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); -+ goto exit; -+ } -+ -+ RTW_INFO("RTW_Tx:tx_ch=%d, no_cck=%u, da="MAC_FMT"\n", tx_ch, no_cck, MAC_ARG(GetAddr1Ptr(buf))); -+#ifdef CONFIG_P2P -+ type = rtw_p2p_check_frames(padapter, buf, len, _TRUE); -+ if (type >= 0) { -+ is_p2p = 1; -+ no_cck = 1; /* force no CCK for P2P frames */ -+ goto dump; -+ } -+#endif -+#ifdef CONFIG_RTW_MESH -+ if (MLME_IS_MESH(padapter)) { -+ type = rtw_mesh_check_frames_tx(padapter, &dump_buf, &dump_len); -+ if (type >= 0) { -+ dump_limit = 1; -+ goto dump; -+ } -+ } -+#endif -+ if (category == RTW_WLAN_CATEGORY_PUBLIC) { -+ RTW_INFO("RTW_Tx:%s\n", action_public_str(action)); -+ switch (action) { -+ case ACT_PUBLIC_GAS_INITIAL_REQ: -+ case ACT_PUBLIC_GAS_INITIAL_RSP: -+ sleep_ms = 50; -+ retry_guarantee_ms = RTW_MAX_MGMT_TX_MS_GAS; -+ break; -+ } -+ } -+#ifdef CONFIG_RTW_80211K -+ else if (category == RTW_WLAN_CATEGORY_RADIO_MEAS) -+ RTW_INFO("RTW_Tx: RRM Action\n"); -+#endif -+ else -+ RTW_INFO("RTW_Tx:category(%u), action(%u)\n", category, action); -+ -+dump: -+ -+ rtw_ps_deny(padapter, PS_DENY_MGNT_TX); -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = -EFAULT; -+ goto cancel_ps_deny; -+ } -+ -+ while (1) { -+ dump_cnt++; -+ -+ rtw_mi_set_scan_deny(padapter, 1000); -+ rtw_mi_scan_abort(padapter, _TRUE); -+ tx_ret = rtw_mgnt_tx_cmd(padapter, tx_ch, no_cck, dump_buf, dump_len, wait_ack, RTW_CMDF_WAIT_ACK); -+ if (tx_ret == _SUCCESS -+ || (dump_cnt >= dump_limit && rtw_get_passing_time_ms(start) >= retry_guarantee_ms)) -+ break; -+ -+ if (sleep_ms > 0) -+ rtw_msleep_os(sleep_ms); -+ } -+ -+ if (tx_ret != _SUCCESS || dump_cnt > 1) { -+ RTW_INFO(FUNC_ADPT_FMT" %s (%d/%d) in %d ms\n", FUNC_ADPT_ARG(padapter), -+ tx_ret == _SUCCESS ? "OK" : "FAIL", dump_cnt, dump_limit, rtw_get_passing_time_ms(start)); -+ } -+ -+#ifdef CONFIG_P2P -+ if (is_p2p) { -+ switch (type) { -+ case P2P_GO_NEGO_CONF: -+ if (0) { -+ RTW_INFO(FUNC_ADPT_FMT" Nego confirm. state=%u, status=%u, iaddr="MAC_FMT"\n" -+ , FUNC_ADPT_ARG(padapter), pwdev_priv->nego_info.state, pwdev_priv->nego_info.status -+ , MAC_ARG(pwdev_priv->nego_info.iface_addr)); -+ } -+ if (pwdev_priv->nego_info.state == 2 -+ && pwdev_priv->nego_info.status == 0 -+ && rtw_check_invalid_mac_address(pwdev_priv->nego_info.iface_addr, _FALSE) == _FALSE -+ ) { -+ _adapter *intended_iface = dvobj_get_adapter_by_addr(dvobj, pwdev_priv->nego_info.iface_addr); -+ -+ if (intended_iface) { -+ RTW_INFO(FUNC_ADPT_FMT" Nego confirm. Allow only "ADPT_FMT" to scan for 2000 ms\n" -+ , FUNC_ADPT_ARG(padapter), ADPT_ARG(intended_iface)); -+ /* allow only intended_iface to do scan for 2000 ms */ -+ rtw_mi_set_scan_deny(padapter, 2000); -+ rtw_clear_scan_deny(intended_iface); -+ } -+ } -+ break; -+ case P2P_INVIT_RESP: -+ if (pwdev_priv->invit_info.flags & BIT(0) -+ && pwdev_priv->invit_info.status == 0 -+ ) { -+ rtw_clear_scan_deny(padapter); -+ RTW_INFO(FUNC_ADPT_FMT" agree with invitation of persistent group\n", -+ FUNC_ADPT_ARG(padapter)); -+ #if !RTW_P2P_GROUP_INTERFACE -+ rtw_mi_buddy_set_scan_deny(padapter, 5000); -+ #endif -+ rtw_pwr_wakeup_ex(padapter, 5000); -+ } -+ break; -+ } -+ } -+#endif /* CONFIG_P2P */ -+ -+cancel_ps_deny: -+ rtw_ps_deny_cancel(padapter, PS_DENY_MGNT_TX); -+ -+ if (dump_buf != buf) -+ rtw_mfree((u8 *)dump_buf, dump_len); -+exit: -+ return ret; -+} -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0)) -+static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ struct wireless_dev *wdev, -+#else -+ struct net_device *ndev, -+#endif -+ u16 frame_type, bool reg) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ struct net_device *ndev = wdev_to_ndev(wdev); -+#endif -+ _adapter *adapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ -+ if (ndev == NULL) -+ goto exit; -+ -+ adapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(adapter); -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO(FUNC_ADPT_FMT" frame_type:%x, reg:%d\n", FUNC_ADPT_ARG(adapter), -+ frame_type, reg); -+#endif -+ -+ switch (frame_type) { -+ case IEEE80211_STYPE_AUTH: /* 0x00B0 */ -+ if (reg > 0) -+ SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_AUTH); -+ else -+ CLR_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_AUTH); -+ break; -+#ifdef not_yet -+ case IEEE80211_STYPE_PROBE_REQ: /* 0x0040 */ -+ if (reg > 0) -+ SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ); -+ else -+ CLR_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ); -+ break; -+ case IEEE80211_STYPE_ACTION: /* 0x00D0 */ -+ if (reg > 0) -+ SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_ACTION); -+ else -+ CLR_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_ACTION); -+ break; -+#endif -+ default: -+ break; -+ } -+ -+exit: -+ return; -+} -+#else -+static void cfg80211_rtw_update_mgmt_frame_register( -+ struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ struct mgmt_frame_regs *upd) -+{ -+ struct net_device *ndev; -+ _adapter *padapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ u32 rtw_stypes_mask = 0; -+ u32 rtw_mstypes_mask = 0; -+ -+ ndev = wdev_to_ndev(wdev); -+ -+ if (ndev == NULL) -+ goto exit; -+ -+ padapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(padapter); -+ -+ rtw_stypes_mask = BIT(IEEE80211_STYPE_AUTH >> 4); -+ -+#ifdef CONFIG_DEBUG_CFG80211 -+ RTW_INFO(FUNC_ADPT_FMT " global_stypes:0x%08x interface_stypes:0x%08x\n", -+ FUNC_ADPT_ARG(padapter), upd->global_stypes, upd->interface_stypes); -+ RTW_INFO(FUNC_ADPT_FMT " global_mcast_stypes:0x%08x interface_mcast_stypes:0x%08x\n", -+ FUNC_ADPT_ARG(padapter), upd->global_mcast_stypes, upd->interface_mcast_stypes); -+ RTW_INFO(FUNC_ADPT_FMT " old_regs:0x%08x new_regs:0x%08x\n", -+ FUNC_ADPT_ARG(padapter), pwdev_priv->mgmt_regs, -+ (upd->interface_stypes & rtw_stypes_mask)); -+#endif -+ if (pwdev_priv->mgmt_regs != -+ (upd->interface_stypes & rtw_stypes_mask)) { -+ pwdev_priv->mgmt_regs = (upd->interface_stypes & rtw_stypes_mask); -+ } -+ -+exit: -+ return; -+} -+#endif -+ -+#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+static int cfg80211_rtw_tdls_mgmt(struct wiphy *wiphy, -+ struct net_device *ndev, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0)) -+ const u8 *peer, -+#else -+ u8 *peer, -+#endif -+ u8 action_code, -+ u8 dialog_token, -+ u16 status_code, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)) -+ u32 peer_capability, -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 17, 0)) -+ bool initiator, -+#endif -+ const u8 *buf, -+ size_t len) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; -+ int ret = 0; -+ struct tdls_txmgmt txmgmt; -+ -+ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { -+ RTW_INFO("Discard tdls action:%d, since hal doesn't support tdls\n", action_code); -+ goto discard; -+ } -+ -+ if (rtw_is_tdls_enabled(padapter) == _FALSE) { -+ RTW_INFO("TDLS is not enabled\n"); -+ goto discard; -+ } -+ -+ if (rtw_tdls_is_driver_setup(padapter)) { -+ RTW_INFO("Discard tdls action:%d, let driver to set up direct link\n", action_code); -+ goto discard; -+ } -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); -+ txmgmt.action_code = action_code; -+ txmgmt.dialog_token = dialog_token; -+ txmgmt.status_code = status_code; -+ txmgmt.len = len; -+ txmgmt.buf = (u8 *)rtw_malloc(txmgmt.len); -+ if (txmgmt.buf == NULL) { -+ ret = -ENOMEM; -+ goto bad; -+ } -+ _rtw_memcpy(txmgmt.buf, (void *)buf, txmgmt.len); -+ -+ /* Debug purpose */ -+#if 1 -+ RTW_INFO("%s %d\n", __FUNCTION__, __LINE__); -+ RTW_INFO("peer:"MAC_FMT", action code:%d, dialog:%d, status code:%d\n", -+ MAC_ARG(txmgmt.peer), txmgmt.action_code, -+ txmgmt.dialog_token, txmgmt.status_code); -+ if (txmgmt.len > 0) { -+ int i = 0; -+ for (; i < len; i++) -+ printk("%02x ", *(txmgmt.buf + i)); -+ RTW_INFO("len:%d\n", (u32)txmgmt.len); -+ } -+#endif -+ -+ switch (txmgmt.action_code) { -+ case TDLS_SETUP_REQUEST: -+ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); -+ break; -+ case TDLS_SETUP_RESPONSE: -+ issue_tdls_setup_rsp(padapter, &txmgmt); -+ break; -+ case TDLS_SETUP_CONFIRM: -+ issue_tdls_setup_cfm(padapter, &txmgmt); -+ break; -+ case TDLS_TEARDOWN: -+ issue_tdls_teardown(padapter, &txmgmt, _TRUE); -+ break; -+ case TDLS_DISCOVERY_REQUEST: -+ issue_tdls_dis_req(padapter, &txmgmt); -+ break; -+ case TDLS_DISCOVERY_RESPONSE: -+ issue_tdls_dis_rsp(padapter, &txmgmt, pmlmeinfo->enc_algo ? _TRUE : _FALSE); -+ break; -+ } -+ -+bad: -+ if (txmgmt.buf) -+ rtw_mfree(txmgmt.buf, txmgmt.len); -+ -+discard: -+ return ret; -+} -+ -+static int cfg80211_rtw_tdls_oper(struct wiphy *wiphy, -+ struct net_device *ndev, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0)) -+ const u8 *peer, -+#else -+ u8 *peer, -+#endif -+ enum nl80211_tdls_operation oper) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct tdls_txmgmt txmgmt; -+ struct sta_info *ptdls_sta = NULL; -+ -+ RTW_INFO(FUNC_NDEV_FMT", nl80211_tdls_operation:%d\n", FUNC_NDEV_ARG(ndev), oper); -+ -+ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { -+ RTW_INFO("Discard tdls oper:%d, since hal doesn't support tdls\n", oper); -+ return 0; -+ } -+ -+ if (rtw_is_tdls_enabled(padapter) == _FALSE) { -+ RTW_INFO("TDLS is not enabled\n"); -+ return 0; -+ } -+ -+#ifdef CONFIG_LPS -+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 0); -+#endif /* CONFIG_LPS */ -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ if (peer) -+ _rtw_memcpy(txmgmt.peer, peer, ETH_ALEN); -+ -+ if (rtw_tdls_is_driver_setup(padapter)) { -+ /* these two cases are done by driver itself */ -+ if (oper == NL80211_TDLS_ENABLE_LINK || oper == NL80211_TDLS_DISABLE_LINK) -+ return 0; -+ } -+ -+ switch (oper) { -+ case NL80211_TDLS_DISCOVERY_REQ: -+ issue_tdls_dis_req(padapter, &txmgmt); -+ break; -+ case NL80211_TDLS_SETUP: -+#ifdef CONFIG_WFD -+ if (_AES_ != padapter->securitypriv.dot11PrivacyAlgrthm) { -+ if (padapter->wdinfo.wfd_tdls_weaksec == _TRUE) -+ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); -+ else -+ RTW_INFO("[%s] Current link is not AES, SKIP sending the tdls setup request!!\n", __FUNCTION__); -+ } else -+#endif /* CONFIG_WFD */ -+ { -+ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); -+ } -+ break; -+ case NL80211_TDLS_TEARDOWN: -+ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), txmgmt.peer); -+ if (ptdls_sta != NULL) { -+ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; -+ issue_tdls_teardown(padapter, &txmgmt, _TRUE); -+ } else -+ RTW_INFO("TDLS peer not found\n"); -+ break; -+ case NL80211_TDLS_ENABLE_LINK: -+ RTW_INFO(FUNC_NDEV_FMT", NL80211_TDLS_ENABLE_LINK;mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(peer)); -+ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), (u8 *)peer); -+ if (ptdls_sta != NULL) { -+ rtw_tdls_set_link_established(padapter, _TRUE); -+ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; -+ ptdls_sta->state |= WIFI_ASOC_STATE; -+ rtw_tdls_cmd(padapter, txmgmt.peer, TDLS_ESTABLISHED); -+ } -+ break; -+ case NL80211_TDLS_DISABLE_LINK: -+ RTW_INFO(FUNC_NDEV_FMT", NL80211_TDLS_DISABLE_LINK;mac:"MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(peer)); -+ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), (u8 *)peer); -+ if (ptdls_sta != NULL) { -+ rtw_tdls_teardown_pre_hdl(padapter, ptdls_sta); -+ rtw_tdls_cmd(padapter, (u8 *)peer, TDLS_TEARDOWN_STA_LOCALLY_POST); -+ } -+ break; -+ } -+ return 0; -+} -+#endif /* CONFIG_TDLS */ -+ -+#if defined(CONFIG_RTW_MESH) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) -+ -+#if DBG_RTW_CFG80211_MESH_CONF -+#define LEGACY_RATES_STR_LEN (RTW_G_RATES_NUM * 5 + 1) -+int get_legacy_rates_str(struct wiphy *wiphy, enum nl80211_band band, u32 mask, char *buf) -+{ -+ int i; -+ int cnt = 0; -+ -+ for (i = 0; i < wiphy->bands[band]->n_bitrates; i++) { -+ if (mask & BIT(i)) { -+ cnt += snprintf(buf + cnt, LEGACY_RATES_STR_LEN - cnt -1, "%d.%d " -+ , wiphy->bands[band]->bitrates[i].bitrate / 10 -+ , wiphy->bands[band]->bitrates[i].bitrate % 10); -+ if (cnt >= LEGACY_RATES_STR_LEN - 1) -+ break; -+ } -+ } -+ -+ return cnt; -+} -+ -+void dump_mesh_setup(void *sel, struct wiphy *wiphy, const struct mesh_setup *setup) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ struct cfg80211_chan_def *chdef = (struct cfg80211_chan_def *)(&setup->chandef); -+#endif -+ struct ieee80211_channel *chan; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ chan = (struct ieee80211_channel *)chdef->chan; -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ chan = (struct ieee80211_channel *)setup->channel; -+#endif -+ -+ RTW_PRINT_SEL(sel, "mesh_id:\"%s\", len:%u\n", setup->mesh_id, setup->mesh_id_len); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ RTW_PRINT_SEL(sel, "sync_method:%u\n", setup->sync_method); -+#endif -+ RTW_PRINT_SEL(sel, "path_sel_proto:%u, path_metric:%u\n", setup->path_sel_proto, setup->path_metric); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ RTW_PRINT_SEL(sel, "auth_id:%u\n", setup->auth_id); -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+ if (setup->ie && setup->ie_len) { -+ RTW_PRINT_SEL(sel, "ie:%p, len:%u\n", setup->ie, setup->ie_len); -+ dump_ies(RTW_DBGDUMP, setup->ie, setup->ie_len); -+ } -+#else -+ if (setup->vendor_ie && setup->vendor_ie_len) { -+ RTW_PRINT_SEL(sel, "ie:%p, len:%u\n", setup->vendor_ie, setup->vendor_ie_len); -+ dump_ies(RTW_DBGDUMP, setup->vendor_ie, setup->vendor_ie_len); -+ } -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+ RTW_PRINT_SEL(sel, "is_authenticated:%d, is_secure:%d\n", setup->is_authenticated, setup->is_secure); -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) -+ RTW_PRINT_SEL(sel, "user_mpm:%d\n", setup->user_mpm); -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+ RTW_PRINT_SEL(sel, "dtim_period:%u, beacon_interval:%u\n", setup->dtim_period, setup->beacon_interval); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ RTW_PRINT_SEL(sel, "center_freq:%u, ch:%u, width:%s, cfreq1:%u, cfreq2:%u\n" -+ , chan->center_freq, chan->hw_value, nl80211_chan_width_str(chdef->width), chdef->center_freq1, chdef->center_freq2); -+#else -+ RTW_PRINT_SEL(sel, "center_freq:%u, ch:%u, channel_type:%s\n" -+ , chan->center_freq, chan->hw_value, nl80211_channel_type_str(setup->channel_type)); -+#endif -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+ if (setup->mcast_rate[chan->band]) { -+ RTW_PRINT_SEL(sel, "mcast_rate:%d.%d\n" -+ , wiphy->bands[chan->band]->bitrates[setup->mcast_rate[chan->band] - 1].bitrate / 10 -+ , wiphy->bands[chan->band]->bitrates[setup->mcast_rate[chan->band] - 1].bitrate % 10 -+ ); -+ } -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ if (setup->basic_rates) { -+ char buf[LEGACY_RATES_STR_LEN] = {0}; -+ -+ get_legacy_rates_str(wiphy, chan->band, setup->basic_rates, buf); -+ RTW_PRINT_SEL(sel, "basic_rates:%s\n", buf); -+ } -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 9, 0)) -+ if (setup->beacon_rate.control[chan->band].legacy) { -+ char buf[LEGACY_RATES_STR_LEN] = {0}; -+ -+ get_legacy_rates_str(wiphy, chan->band, setup->beacon_rate.control[chan->band].legacy, buf); -+ RTW_PRINT_SEL(sel, "beacon_rate.legacy:%s\n", buf); -+ } -+ if (*((u32 *)&(setup->beacon_rate.control[chan->band].ht_mcs[0])) -+ || *((u32 *)&(setup->beacon_rate.control[chan->band].ht_mcs[4])) -+ || *((u16 *)&(setup->beacon_rate.control[chan->band].ht_mcs[8])) -+ ) { -+ RTW_PRINT_SEL(sel, "beacon_rate.ht_mcs:"HT_RX_MCS_BMP_FMT"\n" -+ , HT_RX_MCS_BMP_ARG(setup->beacon_rate.control[chan->band].ht_mcs)); -+ } -+ -+ if (setup->beacon_rate.control[chan->band].vht_mcs[0] -+ || setup->beacon_rate.control[chan->band].vht_mcs[1] -+ || setup->beacon_rate.control[chan->band].vht_mcs[2] -+ || setup->beacon_rate.control[chan->band].vht_mcs[3] -+ ) { -+ int i; -+ -+ for (i = 0; i < 4; i++) {/* parsing up to 4SS */ -+ u16 mcs_mask = setup->beacon_rate.control[chan->band].vht_mcs[i]; -+ -+ RTW_PRINT_SEL(sel, "beacon_rate.vht_mcs[%d]:%s\n", i -+ , mcs_mask == 0x00FF ? "0~7" : mcs_mask == 0x01FF ? "0~8" : mcs_mask == 0x03FF ? "0~9" : "invalid"); -+ } -+ } -+ -+ if (setup->beacon_rate.control[chan->band].gi) { -+ RTW_PRINT_SEL(sel, "beacon_rate.gi:%s\n" -+ , setup->beacon_rate.control[chan->band].gi == NL80211_TXRATE_FORCE_SGI ? "SGI" : -+ setup->beacon_rate.control[chan->band].gi == NL80211_TXRATE_FORCE_LGI ? "LGI" : "invalid" -+ ); -+ } -+#endif -+} -+ -+void dump_mesh_config(void *sel, const struct mesh_config *conf) -+{ -+ RTW_PRINT_SEL(sel, "dot11MeshRetryTimeout:%u\n", conf->dot11MeshRetryTimeout); -+ RTW_PRINT_SEL(sel, "dot11MeshConfirmTimeout:%u\n", conf->dot11MeshConfirmTimeout); -+ RTW_PRINT_SEL(sel, "dot11MeshHoldingTimeout:%u\n", conf->dot11MeshHoldingTimeout); -+ RTW_PRINT_SEL(sel, "dot11MeshMaxPeerLinks:%u\n", conf->dot11MeshMaxPeerLinks); -+ RTW_PRINT_SEL(sel, "dot11MeshMaxRetries:%u\n", conf->dot11MeshMaxRetries); -+ RTW_PRINT_SEL(sel, "dot11MeshTTL:%u\n", conf->dot11MeshTTL); -+ RTW_PRINT_SEL(sel, "element_ttl:%u\n", conf->element_ttl); -+ RTW_PRINT_SEL(sel, "auto_open_plinks:%d\n", conf->auto_open_plinks); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ RTW_PRINT_SEL(sel, "dot11MeshNbrOffsetMaxNeighbor:%u\n", conf->dot11MeshNbrOffsetMaxNeighbor); -+#endif -+ -+ RTW_PRINT_SEL(sel, "dot11MeshHWMPmaxPREQretries:%u\n", conf->dot11MeshHWMPmaxPREQretries); -+ RTW_PRINT_SEL(sel, "path_refresh_time:%u\n", conf->path_refresh_time); -+ RTW_PRINT_SEL(sel, "min_discovery_timeout:%u\n", conf->min_discovery_timeout); -+ RTW_PRINT_SEL(sel, "dot11MeshHWMPactivePathTimeout:%u\n", conf->dot11MeshHWMPactivePathTimeout); -+ RTW_PRINT_SEL(sel, "dot11MeshHWMPpreqMinInterval:%u\n", conf->dot11MeshHWMPpreqMinInterval); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+ RTW_PRINT_SEL(sel, "dot11MeshHWMPperrMinInterval:%u\n", conf->dot11MeshHWMPperrMinInterval); -+#endif -+ RTW_PRINT_SEL(sel, "dot11MeshHWMPnetDiameterTraversalTime:%u\n", conf->dot11MeshHWMPnetDiameterTraversalTime); -+ RTW_PRINT_SEL(sel, "dot11MeshHWMPRootMode:%u\n", conf->dot11MeshHWMPRootMode); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+ RTW_PRINT_SEL(sel, "dot11MeshHWMPRannInterval:%u\n", conf->dot11MeshHWMPRannInterval); -+ RTW_PRINT_SEL(sel, "dot11MeshGateAnnouncementProtocol:%d\n", conf->dot11MeshGateAnnouncementProtocol); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0)) -+ RTW_PRINT_SEL(sel, "dot11MeshForwarding:%d\n", conf->dot11MeshForwarding); -+ RTW_PRINT_SEL(sel, "rssi_threshold:%d\n", conf->rssi_threshold); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ RTW_PRINT_SEL(sel, "ht_opmode:0x%04x\n", conf->ht_opmode); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ RTW_PRINT_SEL(sel, "dot11MeshHWMPactivePathToRootTimeout:%u\n", conf->dot11MeshHWMPactivePathToRootTimeout); -+ RTW_PRINT_SEL(sel, "dot11MeshHWMProotInterval:%u\n", conf->dot11MeshHWMProotInterval); -+ RTW_PRINT_SEL(sel, "dot11MeshHWMPconfirmationInterval:%u\n", conf->dot11MeshHWMPconfirmationInterval); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+ RTW_PRINT_SEL(sel, "power_mode:%s\n", nl80211_mesh_power_mode_str(conf->power_mode)); -+ RTW_PRINT_SEL(sel, "dot11MeshAwakeWindowDuration:%u\n", conf->dot11MeshAwakeWindowDuration); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ RTW_PRINT_SEL(sel, "plink_timeout:%u\n", conf->plink_timeout); -+#endif -+} -+#endif /* DBG_RTW_CFG80211_MESH_CONF */ -+ -+static void rtw_cfg80211_mesh_info_set_profile(struct rtw_mesh_info *minfo, const struct mesh_setup *setup) -+{ -+ _rtw_memcpy(minfo->mesh_id, setup->mesh_id, setup->mesh_id_len); -+ minfo->mesh_id_len = setup->mesh_id_len; -+ minfo->mesh_pp_id = setup->path_sel_proto; -+ minfo->mesh_pm_id = setup->path_metric; -+ minfo->mesh_cc_id = 0; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ minfo->mesh_sp_id = setup->sync_method; -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ minfo->mesh_auth_id = setup->auth_id; -+#else -+ if (setup->is_authenticated) { -+ u8 *rsn_ie; -+ sint rsn_ie_len; -+ struct rsne_info info; -+ u8 *akm; -+ u8 AKM_SUITE_SAE[4] = {0x00, 0x0F, 0xAC, 0x08}; -+ -+ rsn_ie = rtw_get_ie(setup->ie, WLAN_EID_RSN, &rsn_ie_len, setup->ie_len); -+ if (!rsn_ie || !rsn_ie_len) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ if (rtw_rsne_info_parse(rsn_ie, rsn_ie_len + 2, &info) != _SUCCESS) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ if (!info.akm_list || !info.akm_cnt) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ akm = info.akm_list; -+ while (akm < info.akm_list + info.akm_cnt * 4) { -+ if (_rtw_memcmp(akm, AKM_SUITE_SAE, 4) == _TRUE) { -+ minfo->mesh_auth_id = 0x01; -+ break; -+ } -+ } -+ -+ if (!minfo->mesh_auth_id) { -+ rtw_warn_on(1); -+ return; -+ } -+ } -+#endif -+} -+ -+static inline bool chk_mesh_attr(enum nl80211_meshconf_params parm, u32 mask) -+{ -+ return (mask >> (parm - 1)) & 0x1; -+} -+ -+static void rtw_cfg80211_mesh_cfg_set(_adapter *adapter, const struct mesh_config *conf, u32 mask) -+{ -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ -+#if 0 /* driver MPM */ -+ if (chk_mesh_attr(NL80211_MESHCONF_RETRY_TIMEOUT, mask)); -+ if (chk_mesh_attr(NL80211_MESHCONF_CONFIRM_TIMEOUT, mask)); -+ if (chk_mesh_attr(NL80211_MESHCONF_HOLDING_TIMEOUT, mask)); -+ if (chk_mesh_attr(NL80211_MESHCONF_MAX_PEER_LINKS, mask)); -+ if (chk_mesh_attr(NL80211_MESHCONF_MAX_RETRIES, mask)); -+#endif -+ -+ if (chk_mesh_attr(NL80211_MESHCONF_TTL, mask)) -+ mcfg->dot11MeshTTL = conf->dot11MeshTTL; -+ if (chk_mesh_attr(NL80211_MESHCONF_ELEMENT_TTL, mask)) -+ mcfg->element_ttl = conf->element_ttl; -+ -+#if 0 /* driver MPM */ -+ if (chk_mesh_attr(NL80211_MESHCONF_AUTO_OPEN_PLINKS, mask)); -+#endif -+ -+#if 0 /* TBD: synchronization */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ if (chk_mesh_attr(NL80211_MESHCONF_SYNC_OFFSET_MAX_NEIGHBOR, mask)); -+#endif -+#endif -+ -+ if (chk_mesh_attr(NL80211_MESHCONF_HWMP_MAX_PREQ_RETRIES, mask)) -+ mcfg->dot11MeshHWMPmaxPREQretries = conf->dot11MeshHWMPmaxPREQretries; -+ if (chk_mesh_attr(NL80211_MESHCONF_PATH_REFRESH_TIME, mask)) -+ mcfg->path_refresh_time = conf->path_refresh_time; -+ if (chk_mesh_attr(NL80211_MESHCONF_MIN_DISCOVERY_TIMEOUT, mask)) -+ mcfg->min_discovery_timeout = conf->min_discovery_timeout; -+ if (chk_mesh_attr(NL80211_MESHCONF_HWMP_ACTIVE_PATH_TIMEOUT, mask)) -+ mcfg->dot11MeshHWMPactivePathTimeout = conf->dot11MeshHWMPactivePathTimeout; -+ if (chk_mesh_attr(NL80211_MESHCONF_HWMP_PREQ_MIN_INTERVAL, mask)) -+ mcfg->dot11MeshHWMPpreqMinInterval = conf->dot11MeshHWMPpreqMinInterval; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+ if (chk_mesh_attr(NL80211_MESHCONF_HWMP_PERR_MIN_INTERVAL, mask)) -+ mcfg->dot11MeshHWMPperrMinInterval = conf->dot11MeshHWMPperrMinInterval; -+#endif -+ if (chk_mesh_attr(NL80211_MESHCONF_HWMP_NET_DIAM_TRVS_TIME, mask)) -+ mcfg->dot11MeshHWMPnetDiameterTraversalTime = conf->dot11MeshHWMPnetDiameterTraversalTime; -+ -+ if (chk_mesh_attr(NL80211_MESHCONF_HWMP_ROOTMODE, mask)) -+ mcfg->dot11MeshHWMPRootMode = conf->dot11MeshHWMPRootMode; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+ if (chk_mesh_attr(NL80211_MESHCONF_GATE_ANNOUNCEMENTS, mask)) -+ mcfg->dot11MeshGateAnnouncementProtocol = conf->dot11MeshGateAnnouncementProtocol; -+ /* our current gate annc implementation rides on root annc with gate annc bit in PREQ flags */ -+ if (mcfg->dot11MeshGateAnnouncementProtocol -+ && mcfg->dot11MeshHWMPRootMode <= RTW_IEEE80211_ROOTMODE_ROOT -+ ) { -+ mcfg->dot11MeshHWMPRootMode = RTW_IEEE80211_PROACTIVE_RANN; -+ RTW_INFO(ADPT_FMT" enable PROACTIVE_RANN becaue gate annc is needed\n", ADPT_ARG(adapter)); -+ } -+ if (chk_mesh_attr(NL80211_MESHCONF_HWMP_RANN_INTERVAL, mask)) -+ mcfg->dot11MeshHWMPRannInterval = conf->dot11MeshHWMPRannInterval; -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0)) -+ if (chk_mesh_attr(NL80211_MESHCONF_FORWARDING, mask)) -+ mcfg->dot11MeshForwarding = conf->dot11MeshForwarding; -+ -+ if (chk_mesh_attr(NL80211_MESHCONF_RSSI_THRESHOLD, mask)) -+ mcfg->rssi_threshold = conf->rssi_threshold; -+#endif -+ -+#if 0 /* controlled by driver */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ if (chk_mesh_attr(NL80211_MESHCONF_HT_OPMODE, mask)); -+#endif -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ if (chk_mesh_attr(NL80211_MESHCONF_HWMP_PATH_TO_ROOT_TIMEOUT, mask)) -+ mcfg->dot11MeshHWMPactivePathToRootTimeout = conf->dot11MeshHWMPactivePathToRootTimeout; -+ if (chk_mesh_attr(NL80211_MESHCONF_HWMP_ROOT_INTERVAL, mask)) -+ mcfg->dot11MeshHWMProotInterval = conf->dot11MeshHWMProotInterval; -+ if (chk_mesh_attr(NL80211_MESHCONF_HWMP_CONFIRMATION_INTERVAL, mask)) -+ mcfg->dot11MeshHWMPconfirmationInterval = conf->dot11MeshHWMPconfirmationInterval; -+#endif -+ -+#if 0 /* TBD */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+ if (chk_mesh_attr(NL80211_MESHCONF_POWER_MODE, mask)); -+ if (chk_mesh_attr(NL80211_MESHCONF_AWAKE_WINDOW, mask)); -+#endif -+#endif -+ -+#if 0 /* driver MPM */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ if (chk_mesh_attr(NL80211_MESHCONF_PLINK_TIMEOUT, mask)); -+#endif -+#endif -+} -+ -+u8 *rtw_cfg80211_construct_mesh_beacon_ies(struct wiphy *wiphy, _adapter *adapter -+ , const struct mesh_config *conf, const struct mesh_setup *setup -+ , uint *ies_len) -+{ -+ struct rtw_mesh_info *minfo = &adapter->mesh_info; -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ struct cfg80211_chan_def *chdef = (struct cfg80211_chan_def *)(&setup->chandef); -+#endif -+ struct ieee80211_channel *chan; -+ u8 ch, bw, offset; -+#endif -+ uint len; -+ u8 n_bitrates; -+ u8 ht = 0; -+ u8 vht = 0; -+ u8 *rsn_ie = NULL; -+ sint rsn_ie_len = 0; -+ u8 *ies = NULL, *c; -+ u8 supported_rates[RTW_G_RATES_NUM] = {0}; -+ int i; -+ -+ *ies_len = 0; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ chan = (struct ieee80211_channel *)chdef->chan; -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ chan = (struct ieee80211_channel *)setup->channel; -+#endif -+ -+ n_bitrates = wiphy->bands[chan->band]->n_bitrates; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ rtw_get_chbw_from_cfg80211_chan_def(chdef, &ht, &ch, &bw, &offset); -+#else -+ rtw_get_chbw_from_nl80211_channel_type(chan, setup->channel_type, &ht, &ch, &bw, &offset); -+#endif -+ if (!ch) -+ goto exit; -+ -+#if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ vht = ht && ch > 14 && bw >= CHANNEL_WIDTH_80; /* VHT40/VHT20? */ -+#endif -+ -+ RTW_INFO(FUNC_ADPT_FMT" => ch:%u,%u,%u, ht:%u, vht:%u\n" -+ , FUNC_ADPT_ARG(adapter), ch, bw, offset, ht, vht); -+#endif -+ -+ rsn_ie = rtw_get_ie(setup->ie, WLAN_EID_RSN, &rsn_ie_len, setup->ie_len); -+ if (rsn_ie && !rsn_ie_len) { -+ rtw_warn_on(1); -+ rsn_ie = NULL; -+ } -+ -+ len = _BEACON_IE_OFFSET_ -+ + 2 /* 0-length SSID */ -+ + (n_bitrates >= 8 ? 8 : n_bitrates) + 2 /* Supported Rates */ -+ + 3 /* DS parameter set */ -+ + 6 /* TIM */ -+ + (n_bitrates > 8 ? n_bitrates - 8 + 2 : 0) /* Extended Supported Rates */ -+ + (rsn_ie ? rsn_ie_len + 2 : 0) /* RSN */ -+ #if defined(CONFIG_80211N_HT) -+ + (ht ? HT_CAP_IE_LEN + 2 + HT_OP_IE_LEN + 2 : 0) /* HT */ -+ #endif -+ #if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ + (vht ? VHT_CAP_IE_LEN + 2 + VHT_OP_IE_LEN + 2 : 0) /* VHT */ -+ #endif -+ + minfo->mesh_id_len + 2 /* Mesh ID */ -+ + 9 /* Mesh configuration */ -+ ; -+ -+ ies = rtw_zmalloc(len); -+ if (!ies) -+ goto exit; -+ -+ /* timestamp */ -+ c = ies + 8; -+ -+ /* beacon interval */ -+ RTW_PUT_LE16(c , setup->beacon_interval); -+ c += 2; -+ -+ /* capability */ -+ if (rsn_ie) -+ *((u16 *)c) |= cpu_to_le16(cap_Privacy); -+ c += 2; -+ -+ /* SSID */ -+ c = rtw_set_ie(c, WLAN_EID_SSID, 0, NULL, NULL); -+ -+ /* Supported Rates */ -+ for (i = 0; i < n_bitrates; i++) { -+ supported_rates[i] = wiphy->bands[chan->band]->bitrates[i].bitrate / 5; -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ if (setup->basic_rates & BIT(i)) -+ #else -+ if (rtw_is_basic_rate_mix(supported_rates[i])) -+ #endif -+ supported_rates[i] |= IEEE80211_BASIC_RATE_MASK; -+ } -+ c = rtw_set_ie(c, WLAN_EID_SUPP_RATES, (n_bitrates >= 8 ? 8 : n_bitrates), supported_rates, NULL); -+ -+ /* DS parameter set */ -+ c = rtw_set_ie(c, WLAN_EID_DS_PARAMS, 1, &ch, NULL); -+ -+ /* TIM */ -+ *c = WLAN_EID_TIM; -+ *(c + 1) = 4; -+ c += 6; -+ //c = rtw_set_ie(c, _TIM_IE_, 4, NULL, NULL); -+ -+ /* Extended Supported Rates */ -+ if (n_bitrates > 8) -+ c = rtw_set_ie(c, WLAN_EID_EXT_SUPP_RATES, n_bitrates - 8, supported_rates + 8, NULL); -+ -+ /* RSN */ -+ if (rsn_ie) -+ c = rtw_set_ie(c, WLAN_EID_RSN, rsn_ie_len, rsn_ie + 2, NULL); -+ -+#if defined(CONFIG_80211N_HT) -+ if (ht) { -+ struct ieee80211_sta_ht_cap *sta_ht_cap = &wiphy->bands[chan->band]->ht_cap; -+ u8 ht_cap[HT_CAP_IE_LEN]; -+ u8 ht_op[HT_OP_IE_LEN]; -+ -+ _rtw_memset(ht_cap, 0, HT_CAP_IE_LEN); -+ _rtw_memset(ht_op, 0, HT_OP_IE_LEN); -+ -+ /* WLAN_EID_HT_CAP */ -+ RTW_PUT_LE16(HT_CAP_ELE_CAP_INFO(ht_cap), sta_ht_cap->cap); -+ SET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(ht_cap, sta_ht_cap->ampdu_factor); -+ SET_HT_CAP_ELE_MIN_MPDU_S_SPACE(ht_cap, sta_ht_cap->ampdu_density); -+ _rtw_memcpy(HT_CAP_ELE_SUP_MCS_SET(ht_cap), &sta_ht_cap->mcs, 16); -+ c = rtw_set_ie(c, WLAN_EID_HT_CAP, HT_CAP_IE_LEN, ht_cap, NULL); -+ -+ /* WLAN_EID_HT_OPERATION */ -+ SET_HT_OP_ELE_PRI_CHL(ht_op, ch); -+ switch (offset) { -+ case HAL_PRIME_CHNL_OFFSET_LOWER: -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op, SCA); -+ break; -+ case HAL_PRIME_CHNL_OFFSET_UPPER: -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op, SCB); -+ break; -+ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: -+ default: -+ SET_HT_OP_ELE_2ND_CHL_OFFSET(ht_op, SCN); -+ break; -+ } -+ if (bw >= CHANNEL_WIDTH_40) -+ SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op, 1); -+ else -+ SET_HT_OP_ELE_STA_CHL_WIDTH(ht_op, 0); -+ c = rtw_set_ie(c, WLAN_EID_HT_OPERATION, HT_OP_IE_LEN, ht_op, NULL); -+ } -+#endif /* defined(CONFIG_80211N_HT) */ -+ -+#if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ if (vht) { -+ struct ieee80211_sta_vht_cap *sta_vht_cap = &wiphy->bands[chan->band]->vht_cap; -+ u8 vht_cap[VHT_CAP_IE_LEN]; -+ u8 vht_op[VHT_OP_IE_LEN]; -+ u8 cch = rtw_get_center_ch(ch, bw, offset); -+ -+ _rtw_memset(vht_op, 0, VHT_OP_IE_LEN); -+ -+ /* WLAN_EID_VHT_CAPABILITY */ -+ _rtw_memcpy(vht_cap, &sta_vht_cap->cap, 4); -+ _rtw_memcpy(vht_cap + 4, &sta_vht_cap->vht_mcs, 8); -+ c = rtw_set_ie(c, WLAN_EID_VHT_CAPABILITY, VHT_CAP_IE_LEN, vht_cap, NULL); -+ -+ /* WLAN_EID_VHT_OPERATION */ -+ if (bw < CHANNEL_WIDTH_80) { -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op, 0); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op, 0); -+ } else if (bw == CHANNEL_WIDTH_80) { -+ SET_VHT_OPERATION_ELE_CHL_WIDTH(vht_op, 1); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(vht_op, cch); -+ SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(vht_op, 0); -+ } else { -+ RTW_ERR(FUNC_ADPT_FMT" unsupported BW:%u\n", FUNC_ADPT_ARG(adapter), bw); -+ rtw_warn_on(1); -+ rtw_mfree(ies, len); -+ goto exit; -+ } -+ -+ /* Hard code 1 stream, MCS0-7 is a min Basic VHT MCS rates */ -+ vht_op[3] = 0xfc; -+ vht_op[4] = 0xff; -+ c = rtw_set_ie(c, WLAN_EID_VHT_OPERATION, VHT_OP_IE_LEN, vht_op, NULL); -+ } -+#endif /* defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) */ -+ -+ /* Mesh ID */ -+ c = rtw_set_ie_mesh_id(c, NULL, minfo->mesh_id, minfo->mesh_id_len); -+ -+ /* Mesh configuration */ -+ c = rtw_set_ie_mesh_config(c, NULL -+ , minfo->mesh_pp_id -+ , minfo->mesh_pm_id -+ , minfo->mesh_cc_id -+ , minfo->mesh_sp_id -+ , minfo->mesh_auth_id -+ , 0, 0, 0 -+ , 1 -+ , 0, 0 -+ , mcfg->dot11MeshForwarding -+ , 0, 0, 0 -+ ); -+ -+#if DBG_RTW_CFG80211_MESH_CONF -+ RTW_INFO(FUNC_ADPT_FMT" ies_len:%u\n", FUNC_ADPT_ARG(adapter), len); -+ dump_ies(RTW_DBGDUMP, ies + _BEACON_IE_OFFSET_, len - _BEACON_IE_OFFSET_); -+#endif -+ -+exit: -+ if (ies) -+ *ies_len = len; -+ return ies; -+} -+ -+static int cfg80211_rtw_get_mesh_config(struct wiphy *wiphy, struct net_device *dev -+ , struct mesh_config *conf) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rtw_mesh_cfg *mesh_cfg = &adapter->mesh_cfg; -+ int ret = 0; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); -+ -+ /* driver MPM */ -+ conf->dot11MeshRetryTimeout = 0; -+ conf->dot11MeshConfirmTimeout = 0; -+ conf->dot11MeshHoldingTimeout = 0; -+ conf->dot11MeshMaxPeerLinks = mesh_cfg->max_peer_links; -+ conf->dot11MeshMaxRetries = 0; -+ -+ conf->dot11MeshTTL = mesh_cfg->dot11MeshTTL; -+ conf->element_ttl = mesh_cfg->element_ttl; -+ -+ /* driver MPM */ -+ conf->auto_open_plinks = 0; -+ -+ /* TBD: synchronization */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ conf->dot11MeshNbrOffsetMaxNeighbor = 0; -+#endif -+ -+ conf->dot11MeshHWMPmaxPREQretries = mesh_cfg->dot11MeshHWMPmaxPREQretries; -+ conf->path_refresh_time = mesh_cfg->path_refresh_time; -+ conf->min_discovery_timeout = mesh_cfg->min_discovery_timeout; -+ conf->dot11MeshHWMPactivePathTimeout = mesh_cfg->dot11MeshHWMPactivePathTimeout; -+ conf->dot11MeshHWMPpreqMinInterval = mesh_cfg->dot11MeshHWMPpreqMinInterval; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+ conf->dot11MeshHWMPperrMinInterval = mesh_cfg->dot11MeshHWMPperrMinInterval; -+#endif -+ conf->dot11MeshHWMPnetDiameterTraversalTime = mesh_cfg->dot11MeshHWMPnetDiameterTraversalTime; -+ conf->dot11MeshHWMPRootMode = mesh_cfg->dot11MeshHWMPRootMode; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+ conf->dot11MeshHWMPRannInterval = mesh_cfg->dot11MeshHWMPRannInterval; -+#endif -+ conf->dot11MeshGateAnnouncementProtocol = mesh_cfg->dot11MeshGateAnnouncementProtocol; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0)) -+ conf->dot11MeshForwarding = mesh_cfg->dot11MeshForwarding; -+ conf->rssi_threshold = mesh_cfg->rssi_threshold; -+#endif -+ -+ /* TBD */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+ conf->ht_opmode = 0xffff; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ conf->dot11MeshHWMPactivePathToRootTimeout = mesh_cfg->dot11MeshHWMPactivePathToRootTimeout; -+ conf->dot11MeshHWMProotInterval = mesh_cfg->dot11MeshHWMProotInterval; -+ conf->dot11MeshHWMPconfirmationInterval = mesh_cfg->dot11MeshHWMPconfirmationInterval; -+#endif -+ -+ /* TBD: power save */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+ conf->power_mode = NL80211_MESH_POWER_ACTIVE; -+ conf->dot11MeshAwakeWindowDuration = 0; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ conf->plink_timeout = mesh_cfg->plink_timeout; -+#endif -+ -+ return ret; -+} -+ -+static void rtw_mbss_info_change_notify(_adapter *adapter, bool minfo_changed, bool need_work) -+{ -+ if (need_work) -+ rtw_mesh_work(&adapter->mesh_work); -+} -+ -+static int cfg80211_rtw_update_mesh_config(struct wiphy *wiphy, struct net_device *dev -+ , u32 mask, const struct mesh_config *nconf) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ int ret = 0; -+ bool minfo_changed = _FALSE, need_work = _FALSE; -+ -+ RTW_INFO(FUNC_ADPT_FMT" mask:0x%08x\n", FUNC_ADPT_ARG(adapter), mask); -+ -+ rtw_cfg80211_mesh_cfg_set(adapter, nconf, mask); -+ update_beacon(adapter, WLAN_EID_MESH_CONFIG, NULL, _TRUE, 0); -+#if CONFIG_RTW_MESH_CTO_MGATE_CARRIER -+ if (rtw_mesh_cto_mgate_required(adapter)) -+ rtw_netif_carrier_off(adapter->pnetdev); -+ else -+ rtw_netif_carrier_on(adapter->pnetdev); -+#endif -+ need_work = rtw_ieee80211_mesh_root_setup(adapter); -+ -+ rtw_mbss_info_change_notify(adapter, minfo_changed, need_work); -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_join_mesh(struct wiphy *wiphy, struct net_device *dev, -+ const struct mesh_config *conf, const struct mesh_setup *setup) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 *ies = NULL; -+ uint ies_len; -+ int ret = 0; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); -+ -+#if DBG_RTW_CFG80211_MESH_CONF -+ RTW_INFO(FUNC_ADPT_FMT" mesh_setup:\n", FUNC_ADPT_ARG(adapter)); -+ dump_mesh_setup(RTW_DBGDUMP, wiphy, setup); -+ RTW_INFO(FUNC_ADPT_FMT" mesh_config:\n", FUNC_ADPT_ARG(adapter)); -+ dump_mesh_config(RTW_DBGDUMP, conf); -+#endif -+ -+ if (rtw_cfg80211_sync_iftype(adapter) != _SUCCESS) { -+ ret = -ENOTSUPP; -+ goto exit; -+ } -+ -+ /* initialization */ -+ rtw_mesh_init_mesh_info(adapter); -+ -+ /* apply cfg80211 settings*/ -+ rtw_cfg80211_mesh_info_set_profile(&adapter->mesh_info, setup); -+ rtw_cfg80211_mesh_cfg_set(adapter, conf, 0xFFFFFFFF); -+ -+ /* apply cfg80211 settings (join only) */ -+ rtw_mesh_cfg_init_max_peer_links(adapter, conf->dot11MeshMaxPeerLinks); -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ rtw_mesh_cfg_init_plink_timeout(adapter, conf->plink_timeout); -+ #endif -+ -+ rtw_ieee80211_mesh_root_setup(adapter); -+ -+ ies = rtw_cfg80211_construct_mesh_beacon_ies(wiphy, adapter, conf, setup, &ies_len); -+ if (!ies) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ /* start mbss */ -+ if (rtw_check_beacon_data(adapter, ies, ies_len) != _SUCCESS) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ rtw_mesh_work(&adapter->mesh_work); -+ -+exit: -+ if (ies) -+ rtw_mfree(ies, ies_len); -+ if (ret) -+ rtw_mesh_deinit_mesh_info(adapter); -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_leave_mesh(struct wiphy *wiphy, struct net_device *dev) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ int ret = 0; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); -+ -+ rtw_mesh_deinit_mesh_info(adapter); -+ -+ rtw_stop_ap_cmd(adapter, RTW_CMDF_WAIT_ACK); -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_add_mpath(struct wiphy *wiphy, struct net_device *dev -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0)) -+ , const u8 *dst, const u8 *next_hop -+ #else -+ , u8 *dst, u8 *next_hop -+ #endif -+) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct sta_info *sta; -+ struct rtw_mesh_path *mpath; -+ int ret = 0; -+ -+ rtw_rcu_read_lock(); -+ -+ sta = rtw_get_stainfo(stapriv, next_hop); -+ if (!sta) { -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ mpath = rtw_mesh_path_add(adapter, dst); -+ if (!mpath) { -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ rtw_mesh_path_fix_nexthop(mpath, sta); -+ -+exit: -+ rtw_rcu_read_unlock(); -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_del_mpath(struct wiphy *wiphy, struct net_device *dev -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0)) -+ , const u8 *dst -+ #else -+ , u8 *dst -+ #endif -+) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ int ret = 0; -+ -+ if (dst) { -+ if (rtw_mesh_path_del(adapter, dst)) { -+ ret = -ENOENT; -+ goto exit; -+ } -+ } else { -+ rtw_mesh_path_flush_by_iface(adapter); -+ } -+ -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_change_mpath(struct wiphy *wiphy, struct net_device *dev -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0)) -+ , const u8 *dst, const u8 *next_hop -+ #else -+ , u8 *dst, u8 *next_hop -+ #endif -+) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sta_priv *stapriv = &adapter->stapriv; -+ struct sta_info *sta; -+ struct rtw_mesh_path *mpath; -+ int ret = 0; -+ -+ rtw_rcu_read_lock(); -+ -+ sta = rtw_get_stainfo(stapriv, next_hop); -+ if (!sta) { -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ mpath = rtw_mesh_path_lookup(adapter, dst); -+ if (!mpath) { -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ rtw_mesh_path_fix_nexthop(mpath, sta); -+ -+exit: -+ rtw_rcu_read_unlock(); -+ -+ return ret; -+} -+ -+static void rtw_cfg80211_mpath_set_pinfo(struct rtw_mesh_path *mpath, u8 *next_hop, struct mpath_info *pinfo) -+{ -+ struct sta_info *next_hop_sta = rtw_rcu_dereference(mpath->next_hop); -+ -+ if (next_hop_sta) -+ _rtw_memcpy(next_hop, next_hop_sta->cmn.mac_addr, ETH_ALEN); -+ else -+ _rtw_memset(next_hop, 0, ETH_ALEN); -+ -+ _rtw_memset(pinfo, 0, sizeof(*pinfo)); -+ -+ pinfo->generation = mpath->adapter->mesh_info.mesh_paths_generation; -+ -+ pinfo->filled = 0 -+ | MPATH_INFO_FRAME_QLEN -+ | MPATH_INFO_SN -+ | MPATH_INFO_METRIC -+ | MPATH_INFO_EXPTIME -+ | MPATH_INFO_DISCOVERY_TIMEOUT -+ | MPATH_INFO_DISCOVERY_RETRIES -+ | MPATH_INFO_FLAGS -+ ; -+ -+ pinfo->frame_qlen = mpath->frame_queue_len; -+ pinfo->sn = mpath->sn; -+ pinfo->metric = mpath->metric; -+ if (rtw_time_after(mpath->exp_time, rtw_get_current_time())) -+ pinfo->exptime = rtw_get_remaining_time_ms(mpath->exp_time); -+ pinfo->discovery_timeout = rtw_systime_to_ms(mpath->discovery_timeout); -+ pinfo->discovery_retries = mpath->discovery_retries; -+ if (mpath->flags & RTW_MESH_PATH_ACTIVE) -+ pinfo->flags |= NL80211_MPATH_FLAG_ACTIVE; -+ if (mpath->flags & RTW_MESH_PATH_RESOLVING) -+ pinfo->flags |= NL80211_MPATH_FLAG_RESOLVING; -+ if (mpath->flags & RTW_MESH_PATH_SN_VALID) -+ pinfo->flags |= NL80211_MPATH_FLAG_SN_VALID; -+ if (mpath->flags & RTW_MESH_PATH_FIXED) -+ pinfo->flags |= NL80211_MPATH_FLAG_FIXED; -+ if (mpath->flags & RTW_MESH_PATH_RESOLVED) -+ pinfo->flags |= NL80211_MPATH_FLAG_RESOLVED; -+} -+ -+static int cfg80211_rtw_get_mpath(struct wiphy *wiphy, struct net_device *dev, u8 *dst, u8 *next_hop, struct mpath_info *pinfo) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rtw_mesh_path *mpath; -+ int ret = 0; -+ -+ rtw_rcu_read_lock(); -+ -+ mpath = rtw_mesh_path_lookup(adapter, dst); -+ if (!mpath) { -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ rtw_cfg80211_mpath_set_pinfo(mpath, next_hop, pinfo); -+ -+exit: -+ rtw_rcu_read_unlock(); -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_dump_mpath(struct wiphy *wiphy, struct net_device *dev, int idx, u8 *dst, u8 *next_hop, struct mpath_info *pinfo) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rtw_mesh_path *mpath; -+ int ret = 0; -+ -+ rtw_rcu_read_lock(); -+ -+ mpath = rtw_mesh_path_lookup_by_idx(adapter, idx); -+ if (!mpath) { -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ _rtw_memcpy(dst, mpath->dst, ETH_ALEN); -+ rtw_cfg80211_mpath_set_pinfo(mpath, next_hop, pinfo); -+ -+exit: -+ rtw_rcu_read_unlock(); -+ -+ return ret; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) -+static void rtw_cfg80211_mpp_set_pinfo(struct rtw_mesh_path *mpath, u8 *mpp, struct mpath_info *pinfo) -+{ -+ _rtw_memcpy(mpp, mpath->mpp, ETH_ALEN); -+ -+ _rtw_memset(pinfo, 0, sizeof(*pinfo)); -+ pinfo->generation = mpath->adapter->mesh_info.mpp_paths_generation; -+} -+ -+static int cfg80211_rtw_get_mpp(struct wiphy *wiphy, struct net_device *dev, u8 *dst, u8 *mpp, struct mpath_info *pinfo) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rtw_mesh_path *mpath; -+ int ret = 0; -+ -+ rtw_rcu_read_lock(); -+ -+ mpath = rtw_mpp_path_lookup(adapter, dst); -+ if (!mpath) { -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ rtw_cfg80211_mpp_set_pinfo(mpath, mpp, pinfo); -+ -+exit: -+ rtw_rcu_read_unlock(); -+ -+ return ret; -+} -+ -+static int cfg80211_rtw_dump_mpp(struct wiphy *wiphy, struct net_device *dev, int idx, u8 *dst, u8 *mpp, struct mpath_info *pinfo) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rtw_mesh_path *mpath; -+ int ret = 0; -+ -+ rtw_rcu_read_lock(); -+ -+ mpath = rtw_mpp_path_lookup_by_idx(adapter, idx); -+ if (!mpath) { -+ ret = -ENOENT; -+ goto exit; -+ } -+ -+ _rtw_memcpy(dst, mpath->dst, ETH_ALEN); -+ rtw_cfg80211_mpp_set_pinfo(mpath, mpp, pinfo); -+ -+exit: -+ rtw_rcu_read_unlock(); -+ -+ return ret; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) */ -+ -+#endif /* defined(CONFIG_RTW_MESH) */ -+ -+#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy, -+ struct net_device *dev, -+ struct cfg80211_sched_scan_request *request) -+{ -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct cfg80211_ssid *ssids; -+ int n_ssids = 0; -+ int interval = 0; -+ int i = 0; -+ u8 ret; -+ -+ if (padapter->bup == _FALSE) { -+ RTW_INFO("%s: net device is down.\n", __func__); -+ return -EIO; -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE || -+ check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE || -+ check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) == _TRUE) { -+ RTW_INFO("%s: device is busy.\n", __func__); -+ rtw_scan_abort(padapter); -+ } -+ -+ if (request == NULL) { -+ RTW_INFO("%s: invalid cfg80211_requests parameters.\n", __func__); -+ return -EINVAL; -+ } -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0) -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0) -+ interval = request->scan_plans->interval; -+#else -+ interval = request->interval; -+#endif -+ n_ssids = request->n_match_sets; -+ ssids = (struct cfg80211_ssid *)rtw_zmalloc(n_ssids * sizeof(struct cfg80211_ssid)); -+ if(ssids == NULL) { -+ RTW_ERR("Fail to allocate ssids for PNO\n"); -+ return -ENOMEM; -+ } -+ for (i=0;in_match_sets;i++) { -+ ssids[i].ssid_len = request->match_sets[i].ssid.ssid_len; -+ memcpy(ssids[i].ssid, request->match_sets[i].ssid.ssid, -+ request->match_sets[i].ssid.ssid_len); -+ } -+#else -+ interval = request->interval; -+ n_ssids = request->n_ssids; -+ ssids = request->ssids; -+#endif -+ret = rtw_android_cfg80211_pno_setup(dev, ssids, -+ n_ssids, interval); -+ if (ret < 0) { -+ RTW_INFO("%s ret: %d\n", __func__, ret); -+ goto exit; -+ } -+ -+ ret = rtw_android_pno_enable(dev, _TRUE); -+ if (ret < 0) { -+ RTW_INFO("%s ret: %d\n", __func__, ret); -+ goto exit; -+ } -+exit: -+ return ret; -+} -+ -+static int cfg80211_rtw_sched_scan_stop(struct wiphy *wiphy, -+ struct net_device *dev) -+{ -+ return rtw_android_pno_enable(dev, _FALSE); -+} -+ -+int cfg80211_rtw_suspend(struct wiphy *wiphy, struct cfg80211_wowlan *wow) { -+ RTW_DBG("==> %s\n",__func__); -+ RTW_DBG("<== %s\n",__func__); -+ return 0; -+} -+ -+int cfg80211_rtw_resume(struct wiphy *wiphy) { -+ -+ _adapter *padapter; -+ struct pwrctrl_priv *pwrpriv; -+ struct mlme_priv *pmlmepriv; -+ padapter = wiphy_to_adapter(wiphy); -+ pwrpriv = adapter_to_pwrctl(padapter); -+ pmlmepriv = &padapter->mlmepriv; -+ struct sitesurvey_parm parm; -+ int i, len; -+ -+ -+ RTW_DBG("==> %s\n",__func__); -+ if (pwrpriv->wowlan_last_wake_reason == RX_PNO) { -+ -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ _irqL irqL; -+ int PNOWakeupScanWaitCnt = 0; -+ -+ rtw_cfg80211_disconnected(padapter->rtw_wdev, 0, NULL, 0, 1, GFP_ATOMIC); -+ -+ rtw_init_sitesurvey_parm(padapter, &parm); -+ for (i=0;ipnlo_info->ssid_num && i < RTW_SSID_SCAN_AMOUNT; i++) { -+ len = pwrpriv->pno_ssid_list->node[i].SSID_len; -+ _rtw_memcpy(&parm.ssid[i].Ssid, pwrpriv->pno_ssid_list->node[i].SSID, len); -+ parm.ssid[i].SsidLength = len; -+ } -+ parm.ssid_num = pwrpriv->pnlo_info->ssid_num; -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ //This modification fix PNO wakeup reconnect issue with hidden SSID AP. -+ //rtw_sitesurvey_cmd(padapter, NULL); -+ rtw_sitesurvey_cmd(padapter, &parm); -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ for (PNOWakeupScanWaitCnt = 0; PNOWakeupScanWaitCnt < 10; PNOWakeupScanWaitCnt++) { -+ if(check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _FALSE) -+ break; -+ rtw_msleep_os(1000); -+ } -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ cfg80211_sched_scan_results(padapter->rtw_wdev->wiphy); -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+ } -+ RTW_DBG("<== %s\n",__func__); -+ return 0; -+ -+} -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+#ifdef CONFIG_80211N_HT -+static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter -+ , struct ieee80211_sta_ht_cap *ht_cap, BAND_TYPE band, u8 rf_type) -+{ -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct ht_priv *phtpriv = &pmlmepriv->htpriv; -+ u8 stbc_rx_enable = _FALSE; -+ -+ rtw_ht_use_default_setting(padapter); -+ -+ /* RX LDPC */ -+ if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_RX)) -+ ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; -+ -+ /* TX STBC */ -+ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX)) -+ ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC; -+ -+ /* RX STBC */ -+ if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX)) { -+ /*rtw_rx_stbc 0: disable, bit(0):enable 2.4g, bit(1):enable 5g*/ -+ if (band == BAND_ON_2_4G) -+ stbc_rx_enable = (pregistrypriv->rx_stbc & BIT(0)) ? _TRUE : _FALSE; -+ if (band == BAND_ON_5G) -+ stbc_rx_enable = (pregistrypriv->rx_stbc & BIT(1)) ? _TRUE : _FALSE; -+ -+ if (stbc_rx_enable) { -+ switch (rf_type) { -+ case RF_1T1R: -+ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/*RX STBC One spatial stream*/ -+ break; -+ -+ case RF_2T2R: -+ case RF_1T2R: -+ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/* Only one spatial-stream STBC RX is supported */ -+ break; -+ case RF_3T3R: -+ case RF_3T4R: -+ case RF_4T4R: -+ ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/* Only one spatial-stream STBC RX is supported */ -+ break; -+ default: -+ RTW_INFO("[warning] rf_type %d is not expected\n", rf_type); -+ break; -+ } -+ } -+ } -+} -+ -+static void rtw_cfg80211_init_ht_capab(_adapter *padapter -+ , struct ieee80211_sta_ht_cap *ht_cap, BAND_TYPE band, u8 rf_type) -+{ -+ struct registry_priv *regsty = &padapter->registrypriv; -+ u8 rx_nss = 0; -+ -+ if (!regsty->ht_enable || !is_supported_ht(regsty->wireless_mode)) -+ return; -+ -+ ht_cap->ht_supported = 1; -+ -+ ht_cap->cap = IEEE80211_HT_CAP_MAX_AMSDU; -+ -+ if (TEST_FLAG(regsty->short_gi, BIT0)) -+ ht_cap->cap |= IEEE80211_HT_CAP_SGI_20; -+ if (hal_is_bw_support(padapter, CHANNEL_WIDTH_40) -+ && ((band == BAND_ON_2_4G && REGSTY_IS_BW_2G_SUPPORT(regsty, CHANNEL_WIDTH_40)) -+ || (band == BAND_ON_5G && REGSTY_IS_BW_5G_SUPPORT(regsty, CHANNEL_WIDTH_40))) -+ ) { -+ ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; -+ if (band == BAND_ON_2_4G) -+ ht_cap->cap |= IEEE80211_HT_CAP_DSSSCCK40; -+ if (TEST_FLAG(regsty->short_gi, BIT1)) -+ ht_cap->cap |= IEEE80211_HT_CAP_SGI_40; -+ } -+ -+ rtw_cfg80211_init_ht_capab_ex(padapter, ht_cap, band, rf_type); -+ -+ /* -+ *Maximum length of AMPDU that the STA can receive. -+ *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) -+ */ -+ ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; -+ -+ /*Minimum MPDU start spacing , */ -+ ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; -+ -+ ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; -+ -+ rx_nss = GET_HAL_RX_NSS(padapter); -+ switch (rx_nss) { -+ case 1: -+ ht_cap->mcs.rx_mask[0] = 0xFF; -+ break; -+ case 2: -+ ht_cap->mcs.rx_mask[0] = 0xFF; -+ ht_cap->mcs.rx_mask[1] = 0xFF; -+ break; -+ case 3: -+ ht_cap->mcs.rx_mask[0] = 0xFF; -+ ht_cap->mcs.rx_mask[1] = 0xFF; -+ ht_cap->mcs.rx_mask[2] = 0xFF; -+ break; -+ case 4: -+ ht_cap->mcs.rx_mask[0] = 0xFF; -+ ht_cap->mcs.rx_mask[1] = 0xFF; -+ ht_cap->mcs.rx_mask[2] = 0xFF; -+ ht_cap->mcs.rx_mask[3] = 0xFF; -+ break; -+ default: -+ rtw_warn_on(1); -+ RTW_INFO("%s, error rf_type=%d, rx_nss=%d\n", __func__, rf_type, rx_nss); -+ }; -+ -+ ht_cap->mcs.rx_highest = cpu_to_le16( -+ rtw_ht_mcs_rate(hal_is_bw_support(padapter, CHANNEL_WIDTH_40) -+ , hal_is_bw_support(padapter, CHANNEL_WIDTH_40) ? ht_cap->cap & IEEE80211_HT_CAP_SGI_40 : ht_cap->cap & IEEE80211_HT_CAP_SGI_20 -+ , ht_cap->mcs.rx_mask) / 10); -+} -+#endif /* CONFIG_80211N_HT */ -+ -+#if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+static void rtw_cfg80211_init_vht_capab(_adapter *padapter -+ , struct ieee80211_sta_vht_cap *sta_vht_cap, BAND_TYPE band, u8 rf_type) -+{ -+ struct registry_priv *regsty = &padapter->registrypriv; -+ u8 vht_cap_ie[2 + 12] = {0}; -+ -+ if (!REGSTY_IS_11AC_ENABLE(regsty) || !is_supported_vht(regsty->wireless_mode)) -+ return; -+ -+ rtw_vht_use_default_setting(padapter); -+ rtw_build_vht_cap_ie(padapter, vht_cap_ie); -+ -+ sta_vht_cap->vht_supported = 1; -+ -+ _rtw_memcpy(&sta_vht_cap->cap, vht_cap_ie + 2, 4); -+ _rtw_memcpy(&sta_vht_cap->vht_mcs, vht_cap_ie + 2 + 4, 8); -+} -+#endif /* defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) */ -+ -+void rtw_cfg80211_init_wdev_data(_adapter *padapter) -+{ -+#ifdef CONFIG_CONCURRENT_MODE -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ -+ ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); -+#endif -+} -+ -+static int rtw_cfg80211_init_wiphy_band(_adapter *padapter, struct wiphy *wiphy) -+{ -+ u8 rf_type; -+ struct ieee80211_supported_band *band; -+ int ret = _FAIL; -+ -+ rf_type = GET_HAL_RFPATH(padapter); -+ RTW_INFO("%s:rf_type=%d\n", __func__, rf_type); -+ -+ if (IsSupported24G(padapter->registrypriv.wireless_mode)) { -+ band = wiphy->bands[NL80211_BAND_2GHZ] = rtw_spt_band_alloc(BAND_ON_2_4G); -+ if (!band) -+ goto exit; -+ rtw_2g_channels_init(band->channels); -+ rtw_2g_rates_init(band->bitrates); -+ #if defined(CONFIG_80211N_HT) -+ rtw_cfg80211_init_ht_capab(padapter, &band->ht_cap, BAND_ON_2_4G, rf_type); -+ #endif -+ } -+#if CONFIG_IEEE80211_BAND_5GHZ -+ if (is_supported_5g(padapter->registrypriv.wireless_mode)) { -+ band = wiphy->bands[NL80211_BAND_5GHZ] = rtw_spt_band_alloc(BAND_ON_5G); -+ if (!band) { -+ if (wiphy->bands[NL80211_BAND_2GHZ]) { -+ rtw_spt_band_free(wiphy->bands[NL80211_BAND_2GHZ]); -+ wiphy->bands[NL80211_BAND_2GHZ] = NULL; -+ } -+ goto exit; -+ } -+ rtw_5g_channels_init(band->channels); -+ rtw_5g_rates_init(band->bitrates); -+ #if defined(CONFIG_80211N_HT) -+ rtw_cfg80211_init_ht_capab(padapter, &band->ht_cap, BAND_ON_5G, rf_type); -+ #endif -+ #if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ rtw_cfg80211_init_vht_capab(padapter, &band->vht_cap, BAND_ON_5G, rf_type); -+ #endif -+ } -+#endif -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+#if !defined(CONFIG_REGD_SRC_FROM_OS) || (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0)) -+void rtw_cfg80211_update_wiphy_max_txpower(_adapter *adapter, struct wiphy *wiphy) -+{ -+ struct ieee80211_supported_band *band; -+ struct ieee80211_channel *channel; -+ s16 max_txpwr; -+ int i; -+ -+ if (IsSupported24G(adapter->registrypriv.wireless_mode)) { -+ band = wiphy->bands[NL80211_BAND_2GHZ]; -+ if (band) { -+ max_txpwr = phy_get_txpwr_by_rate_total_max_mbm(adapter, BAND_ON_2_4G, 1, 1); -+ if (max_txpwr != UNSPECIFIED_MBM) { -+ for (i = 0; i < band->n_channels; i++) { -+ channel = &band->channels[i]; -+ channel->max_power = max_txpwr / MBM_PDBM; -+ } -+ } -+ } -+ } -+#if CONFIG_IEEE80211_BAND_5GHZ -+ if (is_supported_5g(adapter->registrypriv.wireless_mode)) { -+ band = wiphy->bands[NL80211_BAND_5GHZ]; -+ if (band) { -+ max_txpwr = phy_get_txpwr_by_rate_total_max_mbm(adapter, BAND_ON_5G, 1, 1); -+ if (max_txpwr != UNSPECIFIED_MBM) { -+ for (i = 0; i < band->n_channels; i++) { -+ channel = &band->channels[i]; -+ channel->max_power = max_txpwr / MBM_PDBM; -+ } -+ } -+ } -+ } -+#endif -+} -+#endif /* defined(CONFIG_REGD_SRC_FROM_OS) || (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0)) */ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) && defined(RTW_SINGLE_WIPHY) && (CONFIG_IFACE_NUMBER >= 2) -+struct ieee80211_iface_limit rtw_limits[] = { -+ { -+ .max = CONFIG_IFACE_NUMBER, -+ .types = BIT(NL80211_IFTYPE_STATION) -+ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ | BIT(NL80211_IFTYPE_P2P_CLIENT) -+ #endif -+ }, -+ #ifdef CONFIG_AP_MODE -+ { -+ .max = rtw_min(CONFIG_IFACE_NUMBER, CONFIG_LIMITED_AP_NUM), -+ .types = BIT(NL80211_IFTYPE_AP) -+ #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ | BIT(NL80211_IFTYPE_P2P_GO) -+ #endif -+ }, -+ #endif -+ #if defined(RTW_DEDICATED_P2P_DEVICE) -+ { -+ .max = 1, -+ .types = BIT(NL80211_IFTYPE_P2P_DEVICE) -+ }, -+ #endif -+ #if defined(CONFIG_RTW_MESH) -+ { -+ .max = 1, -+ .types = BIT(NL80211_IFTYPE_MESH_POINT) -+ }, -+ #endif -+}; -+ -+struct ieee80211_iface_combination rtw_combinations[] = { -+ { -+ .limits = rtw_limits, -+ .n_limits = ARRAY_SIZE(rtw_limits), -+ #if defined(RTW_DEDICATED_P2P_DEVICE) -+ .max_interfaces = CONFIG_IFACE_NUMBER + 1, -+ #else -+ .max_interfaces = CONFIG_IFACE_NUMBER, -+ #endif -+ .num_different_channels = 1, -+ }, -+}; -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) */ -+ -+static int rtw_cfg80211_init_wiphy(_adapter *adapter, struct wiphy *wiphy) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct registry_priv *regsty = dvobj_to_regsty(dvobj); -+ int ret = _FAIL; -+ -+ /* copy mac_addr to wiphy */ -+ _rtw_memcpy(wiphy->perm_addr, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; -+ -+ wiphy->max_scan_ssids = RTW_SSID_SCAN_AMOUNT; -+ wiphy->max_scan_ie_len = RTW_SCAN_IE_LEN_MAX; -+ wiphy->max_num_pmkids = RTW_MAX_NUM_PMKIDS; -+ -+#if CONFIG_RTW_MACADDR_ACL && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+ wiphy->max_acl_mac_addrs = NUM_ACL; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE) -+ wiphy->max_remain_on_channel_duration = RTW_MAX_REMAIN_ON_CHANNEL_DURATION; -+#endif -+ -+ wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) -+ #ifdef CONFIG_AP_MODE -+ | BIT(NL80211_IFTYPE_ADHOC) /* todo : AD-HOC task group will refine it */ -+ | BIT(NL80211_IFTYPE_AP) -+ #endif -+ #ifdef CONFIG_WIFI_MONITOR -+ | BIT(NL80211_IFTYPE_MONITOR) -+ #endif -+#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)) -+ | BIT(NL80211_IFTYPE_P2P_CLIENT) -+ | BIT(NL80211_IFTYPE_P2P_GO) -+ #if defined(RTW_DEDICATED_P2P_DEVICE) -+ | BIT(NL80211_IFTYPE_P2P_DEVICE) -+ #endif -+#endif -+#ifdef CONFIG_RTW_MESH -+ | BIT(NL80211_IFTYPE_MESH_POINT) /* 2.6.26 */ -+#endif -+ ; -+ -+#if !defined(RTW_SINGLE_WIPHY) && defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_P2P) -+ if (adapter->iface_id != adapter->registrypriv.sel_p2p_iface) { -+ wiphy->interface_modes &= ~(BIT(NL80211_IFTYPE_P2P_GO) | BIT(NL80211_IFTYPE_P2P_CLIENT)); -+ RTW_INFO("%s iface_id:%d- don't set p2p capability\n", __func__, adapter->iface_id); -+ } -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+ #ifdef CONFIG_WIFI_MONITOR -+ wiphy->software_iftypes |= BIT(NL80211_IFTYPE_MONITOR); -+ #endif -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) && defined(RTW_SINGLE_WIPHY) && (CONFIG_IFACE_NUMBER >= 2) -+ wiphy->iface_combinations = rtw_combinations; -+ wiphy->n_iface_combinations = ARRAY_SIZE(rtw_combinations); -+#endif -+ -+ wiphy->cipher_suites = rtw_cipher_suites; -+ -+ /* Todo refine */ -+ if (_rtw_camctl_chk_cap(adapter, SEC_CAP_CHK_EXTRA_SEC)) -+ wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); -+ else { -+#ifdef CONFIG_IEEE80211W -+ /* remove hardware not support cipher */ -+ wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites) - 6; -+#else -+ wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); -+#endif -+ } -+ -+ if (rtw_cfg80211_init_wiphy_band(adapter, wiphy) != _SUCCESS) { -+ RTW_ERR("rtw_cfg80211_init_wiphy_band fail\n"); -+ goto exit; -+ } -+ #if !defined(CONFIG_REGD_SRC_FROM_OS) || (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0)) -+ rtw_cfg80211_update_wiphy_max_txpower(adapter, wiphy); -+ #endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38) && LINUX_VERSION_CODE < KERNEL_VERSION(3, 0, 0)) -+ wiphy->flags |= WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+ wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; -+ wiphy->flags |= WIPHY_FLAG_HAVE_AP_SME; -+ /* remove WIPHY_FLAG_OFFCHAN_TX, because we not support this feature */ -+ /* wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX | WIPHY_FLAG_HAVE_AP_SME; */ -+#endif -+ -+#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0) && \ -+ LINUX_VERSION_CODE < KERNEL_VERSION(4, 12, 0)) -+ wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; -+#ifdef CONFIG_PNO_SUPPORT -+ wiphy->max_sched_scan_ssids = MAX_PNO_LIST_COUNT; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0) -+ wiphy->max_match_sets = MAX_PNO_LIST_COUNT; -+#endif -+#endif -+#endif -+ -+#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0)) -+ wiphy->wowlan = wowlan_stub; -+#else -+ wiphy->wowlan = &wowlan_stub; -+#endif -+#endif -+ -+#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+ wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS; -+#ifndef CONFIG_TDLS_DRIVER_SETUP -+ wiphy->flags |= WIPHY_FLAG_TDLS_EXTERNAL_SETUP; /* Driver handles key exchange */ -+ wiphy->flags |= NL80211_ATTR_HT_CAPABILITY; -+#endif /* CONFIG_TDLS_DRIVER_SETUP */ -+#endif /* CONFIG_TDLS */ -+ -+#ifdef CONFIG_LPS -+ wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; -+#else -+ wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+ /* wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM; */ -+#endif -+ -+#ifdef CONFIG_RTW_WDS -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 33)) -+ wiphy->flags |= WIPHY_FLAG_4ADDR_AP; -+ wiphy->flags |= WIPHY_FLAG_4ADDR_STATION; -+ #endif -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+ wiphy->flags |= 0 -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) -+ | WIPHY_FLAG_IBSS_RSN -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+ | WIPHY_FLAG_MESH_AUTH -+ #endif -+ ; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+ wiphy->features |= 0 -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) -+ | NL80211_FEATURE_USERSPACE_MPM -+ #endif -+ ; -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) */ -+#endif /* CONFIG_RTW_MESH */ -+ -+#if defined(CONFIG_RTW_80211K) && (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 6, 0)) -+ wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_RRM); -+#endif -+ -+#if (KERNEL_VERSION(3, 8, 0) <= LINUX_VERSION_CODE) -+ wiphy->features |= NL80211_FEATURE_SAE; -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+#ifdef CONFIG_WIFI_MONITOR -+ /* Currently only for Monitor debugging */ -+ wiphy->flags |= WIPHY_FLAG_SUPPORTS_5_10_MHZ; -+#endif -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) */ -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+#ifdef CONFIG_RFKILL_POLL -+void rtw_cfg80211_init_rfkill(struct wiphy *wiphy) -+{ -+ wiphy_rfkill_set_hw_state(wiphy, 0); -+ wiphy_rfkill_start_polling(wiphy); -+} -+ -+void rtw_cfg80211_deinit_rfkill(struct wiphy *wiphy) -+{ -+ wiphy_rfkill_stop_polling(wiphy); -+} -+ -+static void cfg80211_rtw_rfkill_poll(struct wiphy *wiphy) -+{ -+ _adapter *padapter = NULL; -+ bool blocked = _FALSE; -+ u8 valid = 0; -+ -+ padapter = wiphy_to_adapter(wiphy); -+ -+ if (adapter_to_dvobj(padapter)->processing_dev_remove == _TRUE) { -+ /*RTW_INFO("cfg80211_rtw_rfkill_poll: device is removed!\n");*/ -+ return; -+ } -+ -+ blocked = rtw_hal_rfkill_poll(padapter, &valid); -+ /*RTW_INFO("cfg80211_rtw_rfkill_poll: valid=%d, blocked=%d\n", -+ valid, blocked);*/ -+ -+ if (valid) -+ wiphy_rfkill_set_hw_state(wiphy, blocked); -+} -+#endif -+ -+#if defined(CONFIG_RTW_HOSTAPD_ACS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 33)) -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4, 0, 0)) -+#define SURVEY_INFO_TIME SURVEY_INFO_CHANNEL_TIME -+#define SURVEY_INFO_TIME_BUSY SURVEY_INFO_CHANNEL_TIME_BUSY -+#define SURVEY_INFO_TIME_EXT_BUSY SURVEY_INFO_CHANNEL_TIME_EXT_BUSY -+#define SURVEY_INFO_TIME_RX SURVEY_INFO_CHANNEL_TIME_RX -+#define SURVEY_INFO_TIME_TX SURVEY_INFO_CHANNEL_TIME_TX -+#endif -+ -+#ifdef CONFIG_RTW_ACS -+static void rtw_cfg80211_set_survey_info_with_clm(PADAPTER padapter, int idx, struct survey_info *pinfo) -+{ -+ s8 noise = -50; /*channel noise in dBm. This and all following fields are optional */ -+ u64 time = SURVEY_TO; /*amount of time in ms the radio was turn on (on the channel)*/ -+ u64 time_busy = 0; /*amount of time the primary channel was sensed busy*/ -+ u8 chan = (u8)idx; -+ -+ if ((idx < 0) || (pinfo == NULL)) -+ return; -+ -+ pinfo->filled = SURVEY_INFO_NOISE_DBM -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) -+ | SURVEY_INFO_TIME | SURVEY_INFO_TIME_BUSY -+ #endif -+ ; -+ -+ time_busy = rtw_acs_get_clm_ratio_by_ch_idx(padapter, chan); -+ noise = rtw_acs_get_nhm_noise_pwr_by_ch_idx(padapter, chan); -+ /* RTW_INFO("%s: ch-idx:%d time=%llu(ms), time_busy=%llu(ms), noise=%d(dbm)\n", __func__, idx, time, time_busy, noise); */ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 0, 0)) -+ pinfo->channel_time = time; -+ pinfo->channel_time_busy = time_busy; -+ #else -+ pinfo->time = time; -+ pinfo->time_busy = time_busy; -+ #endif -+#endif -+ pinfo->noise = noise; -+} -+#endif /* CONFIG_RTW_ACS */ -+ -+static int rtw_hostapd_acs_dump_survey(struct wiphy *wiphy, struct net_device *netdev, int idx, struct survey_info *info) -+{ -+ PADAPTER padapter = (_adapter *)rtw_netdev_priv(netdev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ RT_CHANNEL_INFO *pch_set = rfctl->channel_set; -+ u8 max_chan_nums = rfctl->max_chan_nums; -+ u32 freq = 0; -+ u8 ret = 0; -+ u16 channel = 0; -+ -+ if (!netdev || !info) { -+ RTW_INFO("%s: invial parameters.\n", __func__); -+ return -EINVAL; -+ } -+ -+ _rtw_memset(info, 0, sizeof(struct survey_info)); -+ if (padapter->bup == _FALSE) { -+ RTW_INFO("%s: net device is down.\n", __func__); -+ return -EIO; -+ } -+ -+ if (idx >= max_chan_nums) -+ return -ENOENT; -+ -+ channel = pch_set[idx].ChannelNum; -+ freq = rtw_ch2freq(channel); -+ info->channel = ieee80211_get_channel(wiphy, freq); -+ /* RTW_INFO("%s: channel %d, freq %d\n", __func__, channel, freq); */ -+ -+ if (!info->channel) -+ return -EINVAL; -+ -+ if (info->channel->flags == IEEE80211_CHAN_DISABLED) -+ return ret; -+ -+#ifdef CONFIG_RTW_ACS -+ rtw_cfg80211_set_survey_info_with_clm(padapter, idx, info); -+#else -+ RTW_ERR("%s: unknown acs operation!\n", __func__); -+#endif -+ -+ return ret; -+} -+#endif /* defined(CONFIG_RTW_HOSTAPD_ACS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 33)) */ -+ -+#if (KERNEL_VERSION(4, 17, 0) <= LINUX_VERSION_CODE) \ -+ || defined(CONFIG_KERNEL_PATCH_EXTERNAL_AUTH) -+int cfg80211_rtw_external_auth(struct wiphy *wiphy, struct net_device *dev, -+ struct cfg80211_external_auth_params *params) -+{ -+ PADAPTER padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(dev)); -+ -+ rtw_cfg80211_external_auth_status(wiphy, dev, -+ (struct rtw_external_auth_params *)params); -+ -+ return 0; -+} -+#endif -+ -+void rtw_cfg80211_external_auth_status(struct wiphy *wiphy, struct net_device *dev, -+ struct rtw_external_auth_params *params) -+{ -+ PADAPTER padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct sta_info *psta = NULL; -+ u8 *buf = NULL; -+ u32 len = 0; -+ _irqL irqL; -+ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(dev)); -+ -+ RTW_INFO("SAE: action: %u, status: %u\n", params->action, params->status); -+ if (params->status == WLAN_STATUS_SUCCESS) { -+ RTW_INFO("bssid: "MAC_FMT"\n", MAC_ARG(params->bssid)); -+ RTW_INFO("SSID: [%s]\n", -+ ((params->ssid.ssid_len == 0) ? "" : (char *)params->ssid.ssid)); -+ RTW_INFO("suite: 0x%08x\n", params->key_mgmt_suite); -+ } -+ -+ psta = rtw_get_stainfo(pstapriv, params->bssid); -+ if (psta && (params->status == WLAN_STATUS_SUCCESS)) { -+#ifdef CONFIG_AP_MODE -+ /* AP mode */ -+ RTW_INFO("station match\n"); -+ -+ psta->state &= ~WIFI_FW_AUTH_NULL; -+ psta->state |= WIFI_FW_AUTH_SUCCESS; -+ psta->expire_to = padapter->stapriv.assoc_to; -+ -+ /* ToDo: Kernel v5.1 pmkid is pointer */ -+ /* RTW_INFO_DUMP("PMKID:", params->pmkid, PMKID_LEN); */ -+ _rtw_set_pmksa(dev, params->bssid, params->pmkid); -+ -+ _enter_critical_bh(&psta->lock, &irqL); -+ if ((psta->auth_len != 0) && (psta->pauth_frame != NULL)) { -+ buf = rtw_zmalloc(psta->auth_len); -+ if (buf) { -+ _rtw_memcpy(buf, psta->pauth_frame, psta->auth_len); -+ len = psta->auth_len; -+ } -+ -+ rtw_mfree(psta->pauth_frame, psta->auth_len); -+ psta->pauth_frame = NULL; -+ psta->auth_len = 0; -+ } -+ _exit_critical_bh(&psta->lock, &irqL); -+ -+ if (buf) { -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ /* send the SAE auth Confirm */ -+ -+ rtw_ps_deny(padapter, PS_DENY_MGNT_TX); -+ if (_SUCCESS == rtw_pwr_wakeup(padapter)) { -+ rtw_mi_set_scan_deny(padapter, 1000); -+ rtw_mi_scan_abort(padapter, _TRUE); -+ -+ RTW_INFO("SAE: Tx auth Confirm\n"); -+ rtw_mgnt_tx_cmd(padapter, pmlmeext->cur_channel, 1, buf, len, 0, RTW_CMDF_DIRECTLY); -+ -+ } -+ rtw_ps_deny_cancel(padapter, PS_DENY_MGNT_TX); -+ -+ rtw_mfree(buf, len); -+ buf = NULL; -+ len = 0; -+ } -+#endif -+ } else { -+ /* STA mode */ -+ psecuritypriv->extauth_status = params->status; -+ } -+} -+ -+static struct cfg80211_ops rtw_cfg80211_ops = { -+ .change_virtual_intf = cfg80211_rtw_change_iface, -+ .add_key = cfg80211_rtw_add_key, -+ .get_key = cfg80211_rtw_get_key, -+ .del_key = cfg80211_rtw_del_key, -+ .set_default_key = cfg80211_rtw_set_default_key, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 30)) -+ .set_default_mgmt_key = cfg80211_rtw_set_default_mgmt_key, -+#endif -+#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)) -+ .set_rekey_data = cfg80211_rtw_set_rekey_data, -+#endif /*CONFIG_GTK_OL*/ -+ .get_station = cfg80211_rtw_get_station, -+ .scan = cfg80211_rtw_scan, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)) && \ -+ defined(CONFIG_RTW_ABORT_SCAN) -+ .abort_scan = cfg80211_rtw_abort_scan, -+#endif -+ .set_wiphy_params = cfg80211_rtw_set_wiphy_params, -+ .connect = cfg80211_rtw_connect, -+ .disconnect = cfg80211_rtw_disconnect, -+ .join_ibss = cfg80211_rtw_join_ibss, -+ .leave_ibss = cfg80211_rtw_leave_ibss, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) -+ .set_tx_power = cfg80211_rtw_set_txpower, -+ .get_tx_power = cfg80211_rtw_get_txpower, -+#endif -+ .set_power_mgmt = cfg80211_rtw_set_power_mgmt, -+ .set_pmksa = cfg80211_rtw_set_pmksa, -+ .del_pmksa = cfg80211_rtw_del_pmksa, -+ .flush_pmksa = cfg80211_rtw_flush_pmksa, -+ -+ .add_virtual_intf = cfg80211_rtw_add_virtual_intf, -+ .del_virtual_intf = cfg80211_rtw_del_virtual_intf, -+ -+#ifdef CONFIG_AP_MODE -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) -+ .add_beacon = cfg80211_rtw_add_beacon, -+ .set_beacon = cfg80211_rtw_set_beacon, -+ .del_beacon = cfg80211_rtw_del_beacon, -+#else -+ .start_ap = cfg80211_rtw_start_ap, -+ .change_beacon = cfg80211_rtw_change_beacon, -+ .stop_ap = cfg80211_rtw_stop_ap, -+#endif -+ -+#if CONFIG_RTW_MACADDR_ACL && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+ .set_mac_acl = cfg80211_rtw_set_mac_acl, -+#endif -+ -+ .add_station = cfg80211_rtw_add_station, -+ .del_station = cfg80211_rtw_del_station, -+ .change_station = cfg80211_rtw_change_station, -+ .dump_station = cfg80211_rtw_dump_station, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28)) -+ .change_bss = cfg80211_rtw_change_bss, -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+ .set_txq_params = cfg80211_rtw_set_txq_params, -+#endif -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) -+ .set_channel = cfg80211_rtw_set_channel, -+#endif -+ /* .auth = cfg80211_rtw_auth, */ -+ /* .assoc = cfg80211_rtw_assoc, */ -+#endif /* CONFIG_AP_MODE */ -+ -+#if defined(CONFIG_RTW_MESH) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) -+ .get_mesh_config = cfg80211_rtw_get_mesh_config, -+ .update_mesh_config = cfg80211_rtw_update_mesh_config, -+ .join_mesh = cfg80211_rtw_join_mesh, -+ .leave_mesh = cfg80211_rtw_leave_mesh, -+ .add_mpath = cfg80211_rtw_add_mpath, -+ .del_mpath = cfg80211_rtw_del_mpath, -+ .change_mpath = cfg80211_rtw_change_mpath, -+ .get_mpath = cfg80211_rtw_get_mpath, -+ .dump_mpath = cfg80211_rtw_dump_mpath, -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) -+ .get_mpp = cfg80211_rtw_get_mpp, -+ .dump_mpp = cfg80211_rtw_dump_mpp, -+ #endif -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ .set_monitor_channel = cfg80211_rtw_set_monitor_channel, -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ .get_channel = cfg80211_rtw_get_channel, -+#endif -+ -+ .remain_on_channel = cfg80211_rtw_remain_on_channel, -+ .cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel, -+ -+#if defined(CONFIG_P2P) && defined(RTW_DEDICATED_P2P_DEVICE) -+ .start_p2p_device = cfg80211_rtw_start_p2p_device, -+ .stop_p2p_device = cfg80211_rtw_stop_p2p_device, -+#endif -+ -+#ifdef CONFIG_RTW_80211R -+ .update_ft_ies = cfg80211_rtw_update_ft_ies, -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) -+ .mgmt_tx = cfg80211_rtw_mgmt_tx, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0)) -+ .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, -+#else -+ .update_mgmt_frame_registrations = cfg80211_rtw_update_mgmt_frame_register, -+#endif -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34) && LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) -+ .action = cfg80211_rtw_mgmt_tx, -+#endif -+ -+#if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) -+ .tdls_mgmt = cfg80211_rtw_tdls_mgmt, -+ .tdls_oper = cfg80211_rtw_tdls_oper, -+#endif /* CONFIG_TDLS */ -+ -+#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+ .sched_scan_start = cfg80211_rtw_sched_scan_start, -+ .sched_scan_stop = cfg80211_rtw_sched_scan_stop, -+ .suspend = cfg80211_rtw_suspend, -+ .resume = cfg80211_rtw_resume, -+#endif /* CONFIG_PNO_SUPPORT */ -+#ifdef CONFIG_RFKILL_POLL -+ .rfkill_poll = cfg80211_rtw_rfkill_poll, -+#endif -+#if defined(CONFIG_RTW_HOSTAPD_ACS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 33)) -+ .dump_survey = rtw_hostapd_acs_dump_survey, -+#endif -+#if (KERNEL_VERSION(4, 17, 0) <= LINUX_VERSION_CODE) \ -+ || defined(CONFIG_KERNEL_PATCH_EXTERNAL_AUTH) -+ .external_auth = cfg80211_rtw_external_auth, -+#endif -+}; -+ -+struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev) -+{ -+ struct wiphy *wiphy; -+ struct rtw_wiphy_data *wiphy_data; -+ -+ /* wiphy */ -+ wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(struct rtw_wiphy_data)); -+ if (!wiphy) { -+ RTW_ERR("Couldn't allocate wiphy device\n"); -+ goto exit; -+ } -+ set_wiphy_dev(wiphy, dev); -+ -+ /* wiphy_data */ -+ wiphy_data = rtw_wiphy_priv(wiphy); -+ wiphy_data->dvobj = adapter_to_dvobj(padapter); -+#ifndef RTW_SINGLE_WIPHY -+ wiphy_data->adapter = padapter; -+#endif -+ wiphy_data->txpwr_total_lmt_mbm = UNSPECIFIED_MBM; -+ wiphy_data->txpwr_total_target_mbm = UNSPECIFIED_MBM; -+ -+ if (rtw_cfg80211_init_wiphy(padapter, wiphy) != _SUCCESS) { -+ rtw_wiphy_free(wiphy); -+ wiphy = NULL; -+ goto exit; -+ } -+ -+ RTW_INFO(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -+ -+exit: -+ return wiphy; -+} -+ -+void rtw_wiphy_free(struct wiphy *wiphy) -+{ -+ if (!wiphy) -+ return; -+ -+ RTW_INFO(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -+ -+ if (wiphy->bands[NL80211_BAND_2GHZ]) { -+ rtw_spt_band_free(wiphy->bands[NL80211_BAND_2GHZ]); -+ wiphy->bands[NL80211_BAND_2GHZ] = NULL; -+ } -+ if (wiphy->bands[NL80211_BAND_5GHZ]) { -+ rtw_spt_band_free(wiphy->bands[NL80211_BAND_5GHZ]); -+ wiphy->bands[NL80211_BAND_5GHZ] = NULL; -+ } -+ -+ wiphy_free(wiphy); -+} -+ -+int rtw_wiphy_register(struct wiphy *wiphy) -+{ -+ RTW_INFO(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -+ -+#if ( (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) \ -+ || defined(RTW_VENDOR_EXT_SUPPORT) ) -+ rtw_cfgvendor_attach(wiphy); -+#endif -+ -+ rtw_regd_init(wiphy); -+ -+ return wiphy_register(wiphy); -+} -+ -+void rtw_wiphy_unregister(struct wiphy *wiphy) -+{ -+ RTW_INFO(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -+ -+#if ( (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) \ -+ || defined(RTW_VENDOR_EXT_SUPPORT) ) -+ rtw_cfgvendor_detach(wiphy); -+#endif -+ -+ #if defined(RTW_DEDICATED_P2P_DEVICE) -+ rtw_pd_iface_free(wiphy); -+ #endif -+ -+ return wiphy_unregister(wiphy); -+} -+ -+int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy) -+{ -+ int ret = 0; -+ struct net_device *pnetdev = padapter->pnetdev; -+ struct wireless_dev *wdev; -+ struct rtw_wdev_priv *pwdev_priv; -+ -+ RTW_INFO("%s(padapter=%p)\n", __func__, padapter); -+ -+ /* wdev */ -+ wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); -+ if (!wdev) { -+ RTW_INFO("Couldn't allocate wireless device\n"); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ wdev->wiphy = wiphy; -+ wdev->netdev = pnetdev; -+ wdev->iftype = NL80211_IFTYPE_STATION; -+ padapter->rtw_wdev = wdev; -+ pnetdev->ieee80211_ptr = wdev; -+ -+ /* init pwdev_priv */ -+ pwdev_priv = adapter_wdev_data(padapter); -+ pwdev_priv->rtw_wdev = wdev; -+ pwdev_priv->pmon_ndev = NULL; -+ pwdev_priv->ifname_mon[0] = '\0'; -+ pwdev_priv->padapter = padapter; -+ pwdev_priv->scan_request = NULL; -+ _rtw_spinlock_init(&pwdev_priv->scan_req_lock); -+ pwdev_priv->connect_req = NULL; -+ _rtw_spinlock_init(&pwdev_priv->connect_req_lock); -+ -+ pwdev_priv->p2p_enabled = _FALSE; -+ pwdev_priv->probe_resp_ie_update_time = rtw_get_current_time(); -+ pwdev_priv->provdisc_req_issued = _FALSE; -+ rtw_wdev_invit_info_init(&pwdev_priv->invit_info); -+ rtw_wdev_nego_info_init(&pwdev_priv->nego_info); -+ -+ pwdev_priv->bandroid_scan = _FALSE; -+ -+ _rtw_mutex_init(&pwdev_priv->roch_mutex); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); -+#endif -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RSSIMONITOR -+ pwdev_priv->rssi_monitor_enable = 0; -+ pwdev_priv->rssi_monitor_max = 0; -+ pwdev_priv->rssi_monitor_min = 0; -+#endif -+ -+ -+exit: -+ return ret; -+} -+ -+void rtw_wdev_free(struct wireless_dev *wdev) -+{ -+ if (!wdev) -+ return; -+ -+ RTW_INFO("%s(wdev=%p)\n", __func__, wdev); -+ -+ if (wdev_to_ndev(wdev)) { -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev)); -+ struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter); -+ _irqL irqL; -+ -+ _rtw_spinlock_free(&wdev_priv->scan_req_lock); -+ -+ _enter_critical_bh(&wdev_priv->connect_req_lock, &irqL); -+ rtw_wdev_free_connect_req(wdev_priv); -+ _exit_critical_bh(&wdev_priv->connect_req_lock, &irqL); -+ _rtw_spinlock_free(&wdev_priv->connect_req_lock); -+ -+ _rtw_mutex_free(&wdev_priv->roch_mutex); -+ } -+ -+ rtw_mfree((u8 *)wdev, sizeof(struct wireless_dev)); -+} -+ -+void rtw_wdev_unregister(struct wireless_dev *wdev) -+{ -+ struct net_device *ndev; -+ _adapter *adapter; -+ struct rtw_wdev_priv *pwdev_priv; -+ -+ if (!wdev) -+ return; -+ -+ RTW_INFO("%s(wdev=%p)\n", __func__, wdev); -+ -+ ndev = wdev_to_ndev(wdev); -+ if (!ndev) -+ return; -+ -+ adapter = (_adapter *)rtw_netdev_priv(ndev); -+ pwdev_priv = adapter_wdev_data(adapter); -+ -+ rtw_cfg80211_indicate_scan_done(adapter, _TRUE); -+ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) || defined(COMPAT_KERNEL_RELEASE) -+ if (wdev->current_bss) { -+ RTW_INFO(FUNC_ADPT_FMT" clear current_bss by cfg80211_disconnected\n", FUNC_ADPT_ARG(adapter)); -+ rtw_cfg80211_indicate_disconnect(adapter, 0, 1); -+ } -+ #endif -+ -+ if (pwdev_priv->pmon_ndev) { -+ RTW_INFO("%s, unregister monitor interface\n", __func__); -+ unregister_netdev(pwdev_priv->pmon_ndev); -+ } -+} -+ -+int rtw_cfg80211_ndev_res_alloc(_adapter *adapter) -+{ -+ int ret = _FAIL; -+ -+#if !defined(RTW_SINGLE_WIPHY) -+ struct wiphy *wiphy; -+ struct device *dev = dvobj_to_dev(adapter_to_dvobj(adapter)); -+ -+ wiphy = rtw_wiphy_alloc(adapter, dev); -+ if (wiphy == NULL) -+ goto exit; -+ -+ adapter->wiphy = wiphy; -+#endif -+ -+ if (rtw_wdev_alloc(adapter, adapter_to_wiphy(adapter)) == 0) -+ ret = _SUCCESS; -+ -+#if !defined(RTW_SINGLE_WIPHY) -+ if (ret != _SUCCESS) { -+ rtw_wiphy_free(wiphy); -+ adapter->wiphy = NULL; -+ } -+ -+exit: -+#endif -+ -+ return ret; -+} -+ -+void rtw_cfg80211_ndev_res_free(_adapter *adapter) -+{ -+ rtw_wdev_free(adapter->rtw_wdev); -+ adapter->rtw_wdev = NULL; -+#if !defined(RTW_SINGLE_WIPHY) -+ rtw_wiphy_free(adapter_to_wiphy(adapter)); -+ adapter->wiphy = NULL; -+#endif -+} -+ -+ -+int rtw_cfg80211_ndev_res_register(_adapter *adapter) -+{ -+#if !defined(RTW_SINGLE_WIPHY) -+ int ret = _FAIL; -+ -+ if (rtw_wiphy_register(adapter_to_wiphy(adapter)) < 0) { -+ RTW_INFO("%s rtw_wiphy_register fail for if%d\n", __func__, (adapter->iface_id + 1)); -+ goto exit; -+ } -+ -+ #ifdef CONFIG_RFKILL_POLL -+ rtw_cfg80211_init_rfkill(adapter_to_wiphy(adapter)); -+ #endif -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+#else -+ return _SUCCESS; -+#endif -+} -+ -+void rtw_cfg80211_ndev_res_unregister(_adapter *adapter) -+{ -+ rtw_wdev_unregister(adapter->rtw_wdev); -+} -+ -+int rtw_cfg80211_dev_res_alloc(struct dvobj_priv *dvobj) -+{ -+ int ret = _FAIL; -+ -+#if defined(RTW_SINGLE_WIPHY) -+ struct wiphy *wiphy; -+ struct device *dev = dvobj_to_dev(dvobj); -+ -+ wiphy = rtw_wiphy_alloc(dvobj_get_primary_adapter(dvobj), dev); -+ if (wiphy == NULL) -+ return ret; -+ -+ dvobj->wiphy = wiphy; -+#endif -+ -+ ret = _SUCCESS; -+ return ret; -+} -+ -+void rtw_cfg80211_dev_res_free(struct dvobj_priv *dvobj) -+{ -+#if defined(RTW_SINGLE_WIPHY) -+ rtw_wiphy_free(dvobj_to_wiphy(dvobj)); -+ dvobj->wiphy = NULL; -+#endif -+} -+ -+int rtw_cfg80211_dev_res_register(struct dvobj_priv *dvobj) -+{ -+ int ret = _FAIL; -+ -+#if defined(RTW_SINGLE_WIPHY) -+ if (rtw_wiphy_register(dvobj_to_wiphy(dvobj)) != 0) -+ return ret; -+ -+#ifdef CONFIG_RFKILL_POLL -+ rtw_cfg80211_init_rfkill(dvobj_to_wiphy(dvobj)); -+#endif -+#endif -+ -+ ret = _SUCCESS; -+ -+ return ret; -+} -+ -+void rtw_cfg80211_dev_res_unregister(struct dvobj_priv *dvobj) -+{ -+#if defined(RTW_SINGLE_WIPHY) -+#ifdef CONFIG_RFKILL_POLL -+ rtw_cfg80211_deinit_rfkill(dvobj_to_wiphy(dvobj)); -+#endif -+ rtw_wiphy_unregister(dvobj_to_wiphy(dvobj)); -+#endif -+} -+ -+s16 rtw_cfg80211_dev_get_total_txpwr_lmt_mbm(struct dvobj_priv *dvobj) -+{ -+ struct rtw_wiphy_data *wiphy_data; -+ s16 mbm = UNSPECIFIED_MBM; -+ -+ /* TODO: input radio index to choose corresponding wiphy(s) */ -+ -+#if defined(RTW_SINGLE_WIPHY) -+ wiphy_data = rtw_wiphy_priv(dvobj_to_wiphy(dvobj)); -+ mbm = wiphy_data->txpwr_total_lmt_mbm; -+#else -+ struct wiphy *wiphy; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!dvobj->padapters[i]) -+ continue; -+ wiphy = dvobj->padapters[i]->wiphy; -+ if (!wiphy) -+ continue; -+ wiphy_data = rtw_wiphy_priv(wiphy); -+ if (wiphy_data->txpwr_total_lmt_mbm == UNSPECIFIED_MBM) -+ continue; -+ if (mbm > wiphy_data->txpwr_total_lmt_mbm) -+ mbm = wiphy_data->txpwr_total_lmt_mbm; -+ } -+#endif -+ -+ return mbm; -+} -+ -+s16 rtw_cfg80211_dev_get_total_txpwr_target_mbm(struct dvobj_priv *dvobj) -+{ -+ struct rtw_wiphy_data *wiphy_data; -+ s16 mbm = UNSPECIFIED_MBM; -+ -+ /* TODO: input radio index to choose corresponding wiphy(s) */ -+ -+#if defined(RTW_SINGLE_WIPHY) -+ wiphy_data = rtw_wiphy_priv(dvobj_to_wiphy(dvobj)); -+ mbm = wiphy_data->txpwr_total_target_mbm; -+#else -+ struct wiphy *wiphy; -+ int i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!dvobj->padapters[i]) -+ continue; -+ wiphy = dvobj->padapters[i]->wiphy; -+ if (!wiphy) -+ continue; -+ wiphy_data = rtw_wiphy_priv(wiphy); -+ if (wiphy_data->txpwr_total_target_mbm == UNSPECIFIED_MBM) -+ continue; -+ if (mbm > wiphy_data->txpwr_total_target_mbm) -+ mbm = wiphy_data->txpwr_total_target_mbm; -+ } -+#endif -+ -+ return mbm; -+} -+#endif /* CONFIG_IOCTL_CFG80211 */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/ioctl_cfg80211.h b/drivers/staging/rtl8723cs/os_dep/linux/ioctl_cfg80211.h -new file mode 100644 -index 000000000000..22018caa33fe ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/ioctl_cfg80211.h -@@ -0,0 +1,454 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __IOCTL_CFG80211_H__ -+#define __IOCTL_CFG80211_H__ -+ -+#define RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT BIT0 -+#define RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT BIT1 -+ -+#ifndef RTW_CFG80211_BLOCK_STA_DISCON_EVENT -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0)) -+#define RTW_CFG80211_BLOCK_STA_DISCON_EVENT (RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT) -+#else -+#define RTW_CFG80211_BLOCK_STA_DISCON_EVENT (RTW_CFG80211_BLOCK_DISCON_WHEN_CONNECT | RTW_CFG80211_BLOCK_DISCON_WHEN_DISCONNECT) -+#endif -+#endif -+ -+#if defined(RTW_USE_CFG80211_STA_EVENT) -+ #undef CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER -+#endif -+ -+#ifndef RTW_P2P_GROUP_INTERFACE -+ #define RTW_P2P_GROUP_INTERFACE 0 -+#endif -+ -+/* -+* (RTW_P2P_GROUP_INTERFACE, RTW_DEDICATED_P2P_DEVICE) -+* (0, 0): wlan0 + p2p0(PD+PG) -+* (1, 0): wlan0(with PD) + dynamic PGs -+* (1, 1): wlan0 (with dynamic PD wdev) + dynamic PGs -+*/ -+ -+#if RTW_P2P_GROUP_INTERFACE -+ #ifndef CONFIG_RTW_DYNAMIC_NDEV -+ #define CONFIG_RTW_DYNAMIC_NDEV -+ #endif -+ #ifndef RTW_SINGLE_WIPHY -+ #define RTW_SINGLE_WIPHY -+ #endif -+ #ifndef CONFIG_RADIO_WORK -+ #define CONFIG_RADIO_WORK -+ #endif -+ #ifndef RTW_DEDICATED_P2P_DEVICE -+ #define RTW_DEDICATED_P2P_DEVICE -+ #endif -+#endif -+ -+#ifndef CONFIG_RADIO_WORK -+#define RTW_ROCH_DURATION_ENLARGE -+#define RTW_ROCH_BACK_OP -+#endif -+ -+#if !defined(CONFIG_P2P) && RTW_P2P_GROUP_INTERFACE -+ #error "RTW_P2P_GROUP_INTERFACE can't be enabled when CONFIG_P2P is disabled\n" -+#endif -+ -+#if !RTW_P2P_GROUP_INTERFACE && defined(RTW_DEDICATED_P2P_DEVICE) -+ #error "RTW_DEDICATED_P2P_DEVICE can't be enabled when RTW_P2P_GROUP_INTERFACE is disabled\n" -+#endif -+ -+#if defined(RTW_DEDICATED_P2P_DEVICE) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 7, 0)) -+ #error "RTW_DEDICATED_P2P_DEVICE can't be enabled when kernel < 3.7.0\n" -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0)) -+ #error "CONFIG_RTW_MESH can't be enabled when kernel < 3.10.0\n" -+ #endif -+#endif -+ -+struct rtw_wdev_invit_info { -+ u8 state; /* 0: req, 1:rep */ -+ u8 peer_mac[ETH_ALEN]; -+ u8 group_bssid[ETH_ALEN]; -+ u8 active; -+ u8 token; -+ u8 flags; -+ u8 status; -+ u8 req_op_ch; -+ u8 rsp_op_ch; -+}; -+ -+#define rtw_wdev_invit_info_init(invit_info) \ -+ do { \ -+ (invit_info)->state = 0xff; \ -+ _rtw_memset((invit_info)->peer_mac, 0, ETH_ALEN); \ -+ _rtw_memset((invit_info)->group_bssid, 0, ETH_ALEN); \ -+ (invit_info)->active = 0xff; \ -+ (invit_info)->token = 0; \ -+ (invit_info)->flags = 0x00; \ -+ (invit_info)->status = 0xff; \ -+ (invit_info)->req_op_ch = 0; \ -+ (invit_info)->rsp_op_ch = 0; \ -+ } while (0) -+ -+struct rtw_wdev_nego_info { -+ u8 state; /* 0: req, 1:rep, 2:conf */ -+ u8 iface_addr[ETH_ALEN]; -+ u8 peer_mac[ETH_ALEN]; -+ u8 peer_iface_addr[ETH_ALEN]; -+ u8 active; -+ u8 token; -+ u8 status; -+ u8 req_intent; -+ u8 req_op_ch; -+ u8 req_listen_ch; -+ u8 rsp_intent; -+ u8 rsp_op_ch; -+ u8 conf_op_ch; -+}; -+ -+#define rtw_wdev_nego_info_init(nego_info) \ -+ do { \ -+ (nego_info)->state = 0xff; \ -+ _rtw_memset((nego_info)->iface_addr, 0, ETH_ALEN); \ -+ _rtw_memset((nego_info)->peer_mac, 0, ETH_ALEN); \ -+ _rtw_memset((nego_info)->peer_iface_addr, 0, ETH_ALEN); \ -+ (nego_info)->active = 0xff; \ -+ (nego_info)->token = 0; \ -+ (nego_info)->status = 0xff; \ -+ (nego_info)->req_intent = 0xff; \ -+ (nego_info)->req_op_ch = 0; \ -+ (nego_info)->req_listen_ch = 0; \ -+ (nego_info)->rsp_intent = 0xff; \ -+ (nego_info)->rsp_op_ch = 0; \ -+ (nego_info)->conf_op_ch = 0; \ -+ } while (0) -+ -+struct rtw_wdev_priv { -+ struct wireless_dev *rtw_wdev; -+ -+ _adapter *padapter; -+ -+ #if RTW_CFG80211_BLOCK_STA_DISCON_EVENT -+ u8 not_indic_disco; -+ #endif -+ -+ struct cfg80211_scan_request *scan_request; -+ _lock scan_req_lock; -+ -+ struct cfg80211_connect_params *connect_req; -+ _lock connect_req_lock; -+ -+ struct net_device *pmon_ndev;/* for monitor interface */ -+ char ifname_mon[IFNAMSIZ + 1]; /* interface name for monitor interface */ -+ -+ u8 p2p_enabled; -+ systime probe_resp_ie_update_time; -+ -+ u8 provdisc_req_issued; -+ -+ struct rtw_wdev_invit_info invit_info; -+ struct rtw_wdev_nego_info nego_info; -+ -+ u8 bandroid_scan; -+ bool block; -+ bool block_scan; -+ -+ /** -+ * mgmt_regs: bitmap of management frame subtypes registered for the -+ * given interface -+ * mcast_mgmt_regs: mcast RX is needed on this interface for these -+ * subtypes -+ */ -+ u32 mgmt_regs; -+ /* u32 mcast_mgmt_regs; */ -+ -+ u8 is_mgmt_tx; -+ u16 mgmt_tx_cookie; -+ -+ _mutex roch_mutex; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ ATOMIC_T switch_ch_to; -+#endif -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ u8 pno_mac_addr[ETH_ALEN]; -+ u16 pno_scan_seq_num; -+#endif -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RSSIMONITOR -+ s8 rssi_monitor_max; -+ s8 rssi_monitor_min; -+ u8 rssi_monitor_enable; -+#endif -+ -+}; -+ -+enum external_auth_action { -+ EXTERNAL_AUTH_START, -+ EXTERNAL_AUTH_ABORT, -+}; -+ -+struct rtw_external_auth_params { -+ enum external_auth_action action; -+ u8 bssid[ETH_ALEN]__aligned(2); -+ struct cfg80211_ssid ssid; -+ unsigned int key_mgmt_suite; -+ u16 status; -+ u8 pmkid[PMKID_LEN]; -+}; -+ -+bool rtw_cfg80211_is_connect_requested(_adapter *adapter); -+ -+#if RTW_CFG80211_BLOCK_STA_DISCON_EVENT -+#define rtw_wdev_not_indic_disco(rtw_wdev_data) ((rtw_wdev_data)->not_indic_disco) -+#define rtw_wdev_set_not_indic_disco(rtw_wdev_data, val) do { (rtw_wdev_data)->not_indic_disco = (val); } while (0) -+#else -+#define rtw_wdev_not_indic_disco(rtw_wdev_data) 0 -+#define rtw_wdev_set_not_indic_disco(rtw_wdev_data, val) do {} while (0) -+#endif -+ -+#define rtw_wdev_free_connect_req(rtw_wdev_data) \ -+ do { \ -+ if ((rtw_wdev_data)->connect_req) { \ -+ rtw_mfree((u8 *)(rtw_wdev_data)->connect_req, sizeof(*(rtw_wdev_data)->connect_req)); \ -+ (rtw_wdev_data)->connect_req = NULL; \ -+ } \ -+ } while (0) -+ -+#define wdev_to_ndev(w) ((w)->netdev) -+#define wdev_to_wiphy(w) ((w)->wiphy) -+#define ndev_to_wdev(n) ((n)->ieee80211_ptr) -+ -+struct rtw_wiphy_data { -+ struct dvobj_priv *dvobj; -+ -+#ifndef RTW_SINGLE_WIPHY -+ _adapter *adapter; -+#endif -+ -+#if defined(RTW_DEDICATED_P2P_DEVICE) -+ struct wireless_dev *pd_wdev; /* P2P device wdev */ -+#endif -+ -+ s16 txpwr_total_lmt_mbm; /* EIRP */ -+ s16 txpwr_total_target_mbm; /* EIRP */ -+}; -+ -+#define rtw_wiphy_priv(wiphy) ((struct rtw_wiphy_data *)wiphy_priv(wiphy)) -+#define wiphy_to_dvobj(wiphy) (((struct rtw_wiphy_data *)wiphy_priv(wiphy))->dvobj) -+#ifdef RTW_SINGLE_WIPHY -+#define wiphy_to_adapter(wiphy) (dvobj_get_primary_adapter(wiphy_to_dvobj(wiphy))) -+#else -+#define wiphy_to_adapter(wiphy) (((struct rtw_wiphy_data *)wiphy_priv(wiphy))->adapter) -+#endif -+ -+#if defined(RTW_DEDICATED_P2P_DEVICE) -+#define wiphy_to_pd_wdev(wiphy) (rtw_wiphy_priv(wiphy)->pd_wdev) -+#else -+#define wiphy_to_pd_wdev(wiphy) NULL -+#endif -+ -+#define WIPHY_FMT "%s" -+#define WIPHY_ARG(wiphy) wiphy_name(wiphy) -+#define FUNC_WIPHY_FMT "%s("WIPHY_FMT")" -+#define FUNC_WIPHY_ARG(wiphy) __func__, WIPHY_ARG(wiphy) -+ -+#define SET_CFG80211_MGMT_REGS(w, t) (w |= BIT(t >> 4)) -+#define CLR_CFG80211_MGMT_REGS(w, t) (w &= (~BIT(t >> 4))) -+#define GET_CFG80211_MGMT_REGS(w, t) ((w & BIT(t >> 4)) > 0) -+ -+#define SET_CFG80211_REPORT_MGMT(w, t) (SET_CFG80211_MGMT_REGS(w->mgmt_regs, t)) -+#define CLR_CFG80211_REPORT_MGMT(w, t) (CLR_CFG80211_MGMT_REGS(w->mgmt_regs, t)) -+#define GET_CFG80211_REPORT_MGMT(w, t) (GET_CFG80211_MGMT_REGS(w->mgmt_regs, t)) -+ -+struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev); -+void rtw_wiphy_free(struct wiphy *wiphy); -+int rtw_wiphy_register(struct wiphy *wiphy); -+void rtw_wiphy_unregister(struct wiphy *wiphy); -+ -+int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy); -+void rtw_wdev_free(struct wireless_dev *wdev); -+void rtw_wdev_unregister(struct wireless_dev *wdev); -+ -+int rtw_cfg80211_ndev_res_alloc(_adapter *adapter); -+void rtw_cfg80211_ndev_res_free(_adapter *adapter); -+int rtw_cfg80211_ndev_res_register(_adapter *adapter); -+void rtw_cfg80211_ndev_res_unregister(_adapter *adapter); -+ -+int rtw_cfg80211_dev_res_alloc(struct dvobj_priv *dvobj); -+void rtw_cfg80211_dev_res_free(struct dvobj_priv *dvobj); -+int rtw_cfg80211_dev_res_register(struct dvobj_priv *dvobj); -+void rtw_cfg80211_dev_res_unregister(struct dvobj_priv *dvobj); -+s16 rtw_cfg80211_dev_get_total_txpwr_lmt_mbm(struct dvobj_priv *dvobj); -+s16 rtw_cfg80211_dev_get_total_txpwr_target_mbm(struct dvobj_priv *dvobj); -+ -+void rtw_cfg80211_init_wdev_data(_adapter *padapter); -+ -+void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork); -+void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); -+struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork); -+int rtw_cfg80211_check_bss(_adapter *padapter); -+void rtw_cfg80211_ibss_indicate_connect(_adapter *padapter); -+void rtw_cfg80211_indicate_connect(_adapter *padapter); -+void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated); -+void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted); -+u32 rtw_cfg80211_wait_scan_req_empty(_adapter *adapter, u32 timeout_ms); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+u8 rtw_cfg80211_scan_via_buddy(_adapter *padapter, struct cfg80211_scan_request *request); -+void rtw_cfg80211_indicate_scan_done_for_buddy(_adapter *padapter, bool bscan_aborted); -+#endif -+ -+#ifdef CONFIG_AP_MODE -+void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); -+void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, const u8 *da, unsigned short reason); -+int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); -+#endif /* CONFIG_AP_MODE */ -+ -+void rtw_cfg80211_set_is_roch(_adapter *adapter, bool val); -+bool rtw_cfg80211_get_is_roch(_adapter *adapter); -+bool rtw_cfg80211_is_ro_ch_once(_adapter *adapter); -+void rtw_cfg80211_set_last_ro_ch_time(_adapter *adapter); -+s32 rtw_cfg80211_get_last_ro_ch_passing_ms(_adapter *adapter); -+ -+#ifdef CONFIG_P2P -+int rtw_cfg80211_iface_has_p2p_group_cap(_adapter *adapter); -+int rtw_cfg80211_is_p2p_scan(_adapter *adapter); -+#if defined(RTW_DEDICATED_P2P_DEVICE) -+int rtw_cfg80211_redirect_pd_wdev(struct wiphy *wiphy, u8 *ra, struct wireless_dev **wdev); -+int rtw_cfg80211_is_scan_by_pd_wdev(_adapter *adapter); -+int rtw_pd_iface_alloc(struct wiphy *wiphy, const char *name, struct wireless_dev **pd_wdev); -+void rtw_pd_iface_free(struct wiphy *wiphy); -+#endif -+#endif /* CONFIG_P2P */ -+ -+void rtw_cfg80211_set_is_mgmt_tx(_adapter *adapter, u8 val); -+u8 rtw_cfg80211_get_is_mgmt_tx(_adapter *adapter); -+u8 rtw_mgnt_tx_handler(_adapter *adapter, u8 *buf); -+ -+void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len); -+ -+void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, union recv_frame *rframe); -+void rtw_cfg80211_rx_action_p2p(_adapter *padapter, union recv_frame *rframe); -+void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const char *msg); -+void rtw_cfg80211_rx_mframe(_adapter *adapter, union recv_frame *rframe, const char *msg); -+void rtw_cfg80211_rx_probe_request(_adapter *padapter, union recv_frame *rframe); -+ -+void rtw_cfg80211_external_auth_request(_adapter *padapter, union recv_frame *rframe); -+void rtw_cfg80211_external_auth_status(struct wiphy *wiphy, struct net_device *dev, -+ struct rtw_external_auth_params *params); -+ -+bool rtw_cfg80211_pwr_mgmt(_adapter *adapter); -+#ifdef CONFIG_RTW_80211K -+void rtw_cfg80211_rx_rrm_action(_adapter *adapter, union recv_frame *rframe); -+#endif -+ -+#ifdef CONFIG_RFKILL_POLL -+void rtw_cfg80211_init_rfkill(struct wiphy *wiphy); -+void rtw_cfg80211_deinit_rfkill(struct wiphy *wiphy); -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) -+#define rtw_cfg80211_rx_mgmt(wdev, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt(wdev_to_ndev(wdev), freq, buf, len, gfp) -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) -+#define rtw_cfg80211_rx_mgmt(wdev, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt(wdev_to_ndev(wdev), freq, sig_dbm, buf, len, gfp) -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 12, 0)) -+#define rtw_cfg80211_rx_mgmt(wdev, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt(wdev, freq, sig_dbm, buf, len, gfp) -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3 , 18 , 0)) -+#define rtw_cfg80211_rx_mgmt(wdev , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt(wdev , freq , sig_dbm , buf , len , 0 , gfp) -+#else -+#define rtw_cfg80211_rx_mgmt(wdev , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt(wdev , freq , sig_dbm , buf , len , 0) -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) -+#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, buf, len) -+#else -+#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, bss, buf, len) -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) -+#define rtw_cfg80211_mgmt_tx_status(wdev, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status(wdev_to_ndev(wdev), cookie, buf, len, ack, gfp) -+#else -+#define rtw_cfg80211_mgmt_tx_status(wdev, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status(wdev, cookie, buf, len, ack, gfp) -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) -+#define rtw_cfg80211_ready_on_channel(wdev, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel(wdev_to_ndev(wdev), cookie, chan, channel_type, duration, gfp) -+#define rtw_cfg80211_remain_on_channel_expired(wdev, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired(wdev_to_ndev(wdev), cookie, chan, chan_type, gfp) -+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) -+#define rtw_cfg80211_ready_on_channel(wdev, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel(wdev, cookie, chan, channel_type, duration, gfp) -+#define rtw_cfg80211_remain_on_channel_expired(wdev, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired(wdev, cookie, chan, chan_type, gfp) -+#else -+#define rtw_cfg80211_ready_on_channel(wdev, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel(wdev, cookie, chan, duration, gfp) -+#define rtw_cfg80211_remain_on_channel_expired(wdev, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired(wdev, cookie, chan, gfp) -+#endif -+ -+#define rtw_cfg80211_connect_result(wdev, bssid, req_ie, req_ie_len, resp_ie, resp_ie_len, status, gfp) cfg80211_connect_result(wdev_to_ndev(wdev), bssid, req_ie, req_ie_len, resp_ie, resp_ie_len, status, gfp) -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 2, 0)) -+#define rtw_cfg80211_disconnected(wdev, reason, ie, ie_len, locally_generated, gfp) cfg80211_disconnected(wdev_to_ndev(wdev), reason, ie, ie_len, gfp) -+#else -+#define rtw_cfg80211_disconnected(wdev, reason, ie, ie_len, locally_generated, gfp) cfg80211_disconnected(wdev_to_ndev(wdev), reason, ie, ie_len, locally_generated, gfp) -+#endif -+ -+#ifdef CONFIG_RTW_80211R -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) -+#define rtw_cfg80211_ft_event(adapter, parm) cfg80211_ft_event((adapter)->pnetdev, parm) -+#else -+ #error "Cannot support FT for KERNEL_VERSION < 3.10\n" -+#endif -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)) -+#define rtw_cfg80211_notify_new_peer_candidate(wdev, addr, ie, ie_len, sig_dbm, gfp) cfg80211_notify_new_peer_candidate(wdev_to_ndev(wdev), addr, ie, ie_len, sig_dbm, gfp) -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) -+#define rtw_cfg80211_notify_new_peer_candidate(wdev, addr, ie, ie_len, sig_dbm, gfp) cfg80211_notify_new_peer_candidate(wdev_to_ndev(wdev), addr, ie, ie_len, gfp) -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) -+u8 rtw_cfg80211_ch_switch_notify(_adapter *adapter, u8 ch, u8 bw, u8 offset, u8 ht, bool started); -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)) -+#define IEEE80211_CHAN_NO_HT40PLUS IEEE80211_CHAN_NO_FAT_ABOVE -+#define IEEE80211_CHAN_NO_HT40MINUS IEEE80211_CHAN_NO_FAT_BELOW -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 26)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4, 7, 0)) -+#define NL80211_BAND_2GHZ IEEE80211_BAND_2GHZ -+#define NL80211_BAND_5GHZ IEEE80211_BAND_5GHZ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+#define NL80211_BAND_60GHZ IEEE80211_BAND_60GHZ -+#endif -+#define NUM_NL80211_BANDS IEEE80211_NUM_BANDS -+#endif -+ -+#define rtw_band_to_nl80211_band(band) \ -+ (band == BAND_ON_2_4G) ? NL80211_BAND_2GHZ : \ -+ (band == BAND_ON_5G) ? NL80211_BAND_5GHZ : NUM_NL80211_BANDS -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36)) -+#define NL80211_TX_POWER_AUTOMATIC TX_POWER_AUTOMATIC -+#define NL80211_TX_POWER_LIMITED TX_POWER_LIMITED -+#define NL80211_TX_POWER_FIXED TX_POWER_FIXED -+#endif -+ -+#include "wifi_regd.h" -+#include "rtw_cfgvendor.h" -+ -+#endif /* __IOCTL_CFG80211_H__ */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/ioctl_linux.c b/drivers/staging/rtl8723cs/os_dep/linux/ioctl_linux.c -new file mode 100644 -index 000000000000..afce78422aa8 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/ioctl_linux.c -@@ -0,0 +1,13049 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _IOCTL_LINUX_C_ -+ -+#include -+#include -+#include "../../hal/phydm/phydm_precomp.h" -+#ifdef RTW_HALMAC -+#include "../../hal/hal_halmac.h" -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27)) -+#define iwe_stream_add_event(a, b, c, d, e) iwe_stream_add_event(b, c, d, e) -+#define iwe_stream_add_point(a, b, c, d, e) iwe_stream_add_point(b, c, d, e) -+#endif -+ -+#ifdef CONFIG_80211N_HT -+extern int rtw_ht_enable; -+#endif -+ -+ -+ -+#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV+30) -+ -+#define SCAN_ITEM_SIZE 768 -+#define MAX_CUSTOM_LEN 64 -+#define RATE_COUNT 4 -+#define MAX_SCAN_BUFFER_LEN 65535 -+ -+#ifdef CONFIG_GLOBAL_UI_PID -+extern int ui_pid[3]; -+#endif -+ -+/* combo scan */ -+#define WEXT_CSCAN_AMOUNT 9 -+#define WEXT_CSCAN_BUF_LEN 360 -+#define WEXT_CSCAN_HEADER "CSCAN S\x01\x00\x00S\x00" -+#define WEXT_CSCAN_HEADER_SIZE 12 -+#define WEXT_CSCAN_SSID_SECTION 'S' -+#define WEXT_CSCAN_CHANNEL_SECTION 'C' -+#define WEXT_CSCAN_NPROBE_SECTION 'N' -+#define WEXT_CSCAN_ACTV_DWELL_SECTION 'A' -+#define WEXT_CSCAN_PASV_DWELL_SECTION 'P' -+#define WEXT_CSCAN_HOME_DWELL_SECTION 'H' -+#define WEXT_CSCAN_TYPE_SECTION 'T' -+ -+ -+extern u8 key_2char2num(u8 hch, u8 lch); -+extern u8 str_2char2num(u8 hch, u8 lch); -+extern void macstr2num(u8 *dst, u8 *src); -+extern u8 convert_ip_addr(u8 hch, u8 mch, u8 lch); -+ -+u32 rtw_rates[] = {1000000, 2000000, 5500000, 11000000, -+ 6000000, 9000000, 12000000, 18000000, 24000000, 36000000, 48000000, 54000000}; -+ -+#ifdef CONFIG_RTW_ANDROID -+static void indicate_wx_custom_event(_adapter *padapter, char *msg) -+{ -+ u8 *buff; -+ union iwreq_data wrqu; -+ -+ if (strlen(msg) > IW_CUSTOM_MAX) { -+ RTW_INFO("%s strlen(msg):%zu > IW_CUSTOM_MAX:%u\n", __FUNCTION__ , strlen(msg), IW_CUSTOM_MAX); -+ return; -+ } -+ -+ buff = rtw_zmalloc(IW_CUSTOM_MAX + 1); -+ if (!buff) -+ return; -+ -+ _rtw_memcpy(buff, msg, strlen(msg)); -+ -+ _rtw_memset(&wrqu, 0, sizeof(wrqu)); -+ wrqu.data.length = strlen(msg); -+ -+ RTW_INFO("%s %s\n", __FUNCTION__, buff); -+#ifndef CONFIG_IOCTL_CFG80211 -+ wireless_send_event(padapter->pnetdev, IWEVCUSTOM, &wrqu, buff); -+#endif -+ -+ rtw_mfree(buff, IW_CUSTOM_MAX + 1); -+ -+} -+#endif -+ -+#if 0 -+static void request_wps_pbc_event(_adapter *padapter) -+{ -+ u8 *buff, *p; -+ union iwreq_data wrqu; -+ -+ -+ buff = rtw_malloc(IW_CUSTOM_MAX); -+ if (!buff) -+ return; -+ -+ _rtw_memset(buff, 0, IW_CUSTOM_MAX); -+ -+ p = buff; -+ -+ p += sprintf(p, "WPS_PBC_START.request=TRUE"); -+ -+ _rtw_memset(&wrqu, 0, sizeof(wrqu)); -+ -+ wrqu.data.length = p - buff; -+ -+ wrqu.data.length = (wrqu.data.length < IW_CUSTOM_MAX) ? wrqu.data.length : IW_CUSTOM_MAX; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+#ifndef CONFIG_IOCTL_CFG80211 -+ wireless_send_event(padapter->pnetdev, IWEVCUSTOM, &wrqu, buff); -+#endif -+ -+ if (buff) -+ rtw_mfree(buff, IW_CUSTOM_MAX); -+ -+} -+#endif -+ -+#ifdef CONFIG_SUPPORT_HW_WPS_PBC -+void rtw_request_wps_pbc_event(_adapter *padapter) -+{ -+#ifdef RTK_DMP_PLATFORM -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 12)) -+ kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC); -+#else -+ kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC); -+#endif -+#else -+ -+ if (padapter->pid[0] == 0) { -+ /* 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. */ -+ return; -+ } -+ -+ rtw_signal_process(padapter->pid[0], SIGUSR1); -+ -+#endif -+ -+ rtw_led_control(padapter, LED_CTL_START_WPS_BOTTON); -+} -+#endif/* #ifdef CONFIG_SUPPORT_HW_WPS_PBC */ -+ -+void indicate_wx_scan_complete_event(_adapter *padapter) -+{ -+ union iwreq_data wrqu; -+ -+ _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); -+ -+ /* RTW_INFO("+rtw_indicate_wx_scan_complete_event\n"); */ -+#ifndef CONFIG_IOCTL_CFG80211 -+ wireless_send_event(padapter->pnetdev, SIOCGIWSCAN, &wrqu, NULL); -+#endif -+} -+ -+ -+void rtw_indicate_wx_assoc_event(_adapter *padapter) -+{ -+ union iwreq_data wrqu; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network)); -+ -+ _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); -+ -+ wrqu.ap_addr.sa_family = ARPHRD_ETHER; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) -+ _rtw_memcpy(wrqu.ap_addr.sa_data, pnetwork->MacAddress, ETH_ALEN); -+ else -+ _rtw_memcpy(wrqu.ap_addr.sa_data, pmlmepriv->cur_network.network.MacAddress, ETH_ALEN); -+ -+ RTW_PRINT("assoc success\n"); -+#ifndef CONFIG_IOCTL_CFG80211 -+ wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL); -+#endif -+} -+ -+void rtw_indicate_wx_disassoc_event(_adapter *padapter) -+{ -+ union iwreq_data wrqu; -+ -+ _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); -+ -+ wrqu.ap_addr.sa_family = ARPHRD_ETHER; -+ _rtw_memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN); -+ -+#ifndef CONFIG_IOCTL_CFG80211 -+ RTW_PRINT("indicate disassoc\n"); -+ wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL); -+#endif -+} -+ -+/* -+uint rtw_is_cckrates_included(u8 *rate) -+{ -+ u32 i = 0; -+ -+ while(rate[i]!=0) -+ { -+ if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || -+ (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) -+ return _TRUE; -+ i++; -+ } -+ -+ return _FALSE; -+} -+ -+uint rtw_is_cckratesonly_included(u8 *rate) -+{ -+ u32 i = 0; -+ -+ while(rate[i]!=0) -+ { -+ if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && -+ (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) -+ return _FALSE; -+ i++; -+ } -+ -+ return _TRUE; -+} -+*/ -+ -+#ifdef CONFIG_IOCTL_WEXT -+static int search_p2p_wfd_ie(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop) -+{ -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#ifdef CONFIG_WFD -+ if (SCAN_RESULT_ALL == pwdinfo->wfd_info->scan_result_type) { -+ -+ } else if ((SCAN_RESULT_P2P_ONLY == pwdinfo->wfd_info->scan_result_type) || -+ (SCAN_RESULT_WFD_TYPE == pwdinfo->wfd_info->scan_result_type)) -+#endif /* CONFIG_WFD */ -+ { -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ u32 blnGotP2PIE = _FALSE; -+ -+ /* User is doing the P2P device discovery */ -+ /* The prefix of SSID should be "DIRECT-" and the IE should contains the P2P IE. */ -+ /* If not, the driver should ignore this AP and go to the next AP. */ -+ -+ /* Verifying the SSID */ -+ if (_rtw_memcmp(pnetwork->network.Ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN)) { -+ u32 p2pielen = 0; -+ -+ /* Verifying the P2P IE */ -+ if (rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen)) -+ blnGotP2PIE = _TRUE; -+ } -+ -+ if (blnGotP2PIE == _FALSE) -+ return _FALSE; -+ -+ } -+ } -+ -+#ifdef CONFIG_WFD -+ if (SCAN_RESULT_WFD_TYPE == pwdinfo->wfd_info->scan_result_type) { -+ u32 blnGotWFD = _FALSE; -+ u8 *wfd_ie; -+ uint wfd_ielen = 0; -+ -+ wfd_ie = rtw_bss_ex_get_wfd_ie(&pnetwork->network, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ u8 *wfd_devinfo; -+ uint wfd_devlen; -+ -+ wfd_devinfo = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &wfd_devlen); -+ if (wfd_devinfo) { -+ if (pwdinfo->wfd_info->wfd_device_type == WFD_DEVINFO_PSINK) { -+ /* the first two bits will indicate the WFD device type */ -+ if ((wfd_devinfo[1] & 0x03) == WFD_DEVINFO_SOURCE) { -+ /* If this device is Miracast PSink device, the scan reuslt should just provide the Miracast source. */ -+ blnGotWFD = _TRUE; -+ } -+ } else if (pwdinfo->wfd_info->wfd_device_type == WFD_DEVINFO_SOURCE) { -+ /* the first two bits will indicate the WFD device type */ -+ if ((wfd_devinfo[1] & 0x03) == WFD_DEVINFO_PSINK) { -+ /* If this device is Miracast source device, the scan reuslt should just provide the Miracast PSink. */ -+ /* Todo: How about the SSink?! */ -+ blnGotWFD = _TRUE; -+ } -+ } -+ } -+ } -+ -+ if (blnGotWFD == _FALSE) -+ return _FALSE; -+ } -+#endif /* CONFIG_WFD */ -+ -+#endif /* CONFIG_P2P */ -+ return _TRUE; -+} -+static inline char *iwe_stream_mac_addr_proess(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe) -+{ -+ /* AP MAC address */ -+ iwe->cmd = SIOCGIWAP; -+ iwe->u.ap_addr.sa_family = ARPHRD_ETHER; -+ -+ _rtw_memcpy(iwe->u.ap_addr.sa_data, pnetwork->network.MacAddress, ETH_ALEN); -+ start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_ADDR_LEN); -+ return start; -+} -+static inline char *iwe_stream_essid_proess(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe) -+{ -+ -+ /* Add the ESSID */ -+ iwe->cmd = SIOCGIWESSID; -+ iwe->u.data.flags = 1; -+ iwe->u.data.length = min((u16)pnetwork->network.Ssid.SsidLength, (u16)32); -+ start = iwe_stream_add_point(info, start, stop, iwe, pnetwork->network.Ssid.Ssid); -+ return start; -+} -+ -+static inline char *iwe_stream_chan_process(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe) -+{ -+ if (pnetwork->network.Configuration.DSConfig < 1 /*|| pnetwork->network.Configuration.DSConfig>14*/) -+ pnetwork->network.Configuration.DSConfig = 1; -+ -+ /* Add frequency/channel */ -+ iwe->cmd = SIOCGIWFREQ; -+ iwe->u.freq.m = rtw_ch2freq(pnetwork->network.Configuration.DSConfig) * 100000; -+ iwe->u.freq.e = 1; -+ iwe->u.freq.i = pnetwork->network.Configuration.DSConfig; -+ start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_FREQ_LEN); -+ return start; -+} -+static inline char *iwe_stream_mode_process(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe, u16 cap) -+{ -+ /* Add mode */ -+ if (cap & (WLAN_CAPABILITY_IBSS | WLAN_CAPABILITY_BSS)) { -+ iwe->cmd = SIOCGIWMODE; -+ if (cap & WLAN_CAPABILITY_BSS) -+ iwe->u.mode = IW_MODE_MASTER; -+ else -+ iwe->u.mode = IW_MODE_ADHOC; -+ -+ start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_UINT_LEN); -+ } -+ return start; -+} -+static inline char *iwe_stream_encryption_process(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe, u16 cap) -+{ -+ -+ /* Add encryption capability */ -+ iwe->cmd = SIOCGIWENCODE; -+ if (cap & WLAN_CAPABILITY_PRIVACY) -+ iwe->u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; -+ else -+ iwe->u.data.flags = IW_ENCODE_DISABLED; -+ iwe->u.data.length = 0; -+ start = iwe_stream_add_point(info, start, stop, iwe, pnetwork->network.Ssid.Ssid); -+ return start; -+ -+} -+ -+static inline char *iwe_stream_protocol_process(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe) -+{ -+ u16 ht_cap = _FALSE, vht_cap = _FALSE; -+ u32 ht_ielen = 0, vht_ielen = 0; -+ char *p; -+ u8 ie_offset = (pnetwork->network.Reserved[0] == BSS_TYPE_PROB_REQ ? 0 : 12); /* Probe Request */ -+ -+#ifdef CONFIG_80211N_HT -+ /* parsing HT_CAP_IE */ -+ if(padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode)) { -+ p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength - ie_offset); -+ if (p && ht_ielen > 0) -+ ht_cap = _TRUE; -+ } -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ /* parsing VHT_CAP_IE */ -+ if(padapter->registrypriv.wireless_mode & WIRELESS_11AC) { -+ p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength - ie_offset); -+ if (p && vht_ielen > 0) -+ vht_cap = _TRUE; -+ } -+#endif -+ /* Add the protocol name */ -+ iwe->cmd = SIOCGIWNAME; -+ if ((rtw_is_cckratesonly_included((u8 *)&pnetwork->network.SupportedRates)) == _TRUE) { -+ if (ht_cap == _TRUE) -+ snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11bn"); -+ else -+ snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11b"); -+ } else if ((rtw_is_cckrates_included((u8 *)&pnetwork->network.SupportedRates)) == _TRUE) { -+ if (ht_cap == _TRUE) -+ snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11bgn"); -+ else -+ snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11bg"); -+ } else { -+ if (pnetwork->network.Configuration.DSConfig > 14) { -+ #ifdef CONFIG_80211AC_VHT -+ if (vht_cap == _TRUE) -+ snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11AC"); -+ else -+ #endif -+ { -+ if (ht_cap == _TRUE) -+ snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11an"); -+ else -+ snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11a"); -+ } -+ } else { -+ if (ht_cap == _TRUE) -+ snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11gn"); -+ else -+ snprintf(iwe->u.name, IFNAMSIZ, "IEEE 802.11g"); -+ } -+ } -+ start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_CHAR_LEN); -+ return start; -+} -+ -+static inline char *iwe_stream_rate_process(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe) -+{ -+ u32 ht_ielen = 0, vht_ielen = 0; -+ char *p; -+ u16 max_rate = 0, rate, ht_cap = _FALSE, vht_cap = _FALSE; -+ u32 i = 0; -+ u8 bw_40MHz = 0, short_GI = 0, bw_160MHz = 0, vht_highest_rate = 0; -+ u16 mcs_rate = 0, vht_data_rate = 0; -+ char custom[MAX_CUSTOM_LEN] = {0}; -+ u8 ie_offset = (pnetwork->network.Reserved[0] == BSS_TYPE_PROB_REQ ? 0 : 12); /* Probe Request */ -+ -+ /* parsing HT_CAP_IE */ -+ if(is_supported_ht(padapter->registrypriv.wireless_mode)) { -+ p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength - ie_offset); -+ if (p && ht_ielen > 0) { -+ struct rtw_ieee80211_ht_cap *pht_capie; -+ ht_cap = _TRUE; -+ pht_capie = (struct rtw_ieee80211_ht_cap *)(p + 2); -+ _rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2); -+ bw_40MHz = (pht_capie->cap_info & IEEE80211_HT_CAP_SUP_WIDTH) ? 1 : 0; -+ short_GI = (pht_capie->cap_info & (IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40)) ? 1 : 0; -+ } -+ } -+#ifdef CONFIG_80211AC_VHT -+ /* parsing VHT_CAP_IE */ -+ if(padapter->registrypriv.wireless_mode & WIRELESS_11AC){ -+ p = rtw_get_ie(&pnetwork->network.IEs[ie_offset], EID_VHTCapability, &vht_ielen, pnetwork->network.IELength - ie_offset); -+ if (p && vht_ielen > 0) { -+ u8 mcs_map[2]; -+ -+ vht_cap = _TRUE; -+ bw_160MHz = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(p + 2); -+ if (bw_160MHz) -+ short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI160M(p + 2); -+ else -+ short_GI = GET_VHT_CAPABILITY_ELE_SHORT_GI80M(p + 2); -+ -+ _rtw_memcpy(mcs_map, GET_VHT_CAPABILITY_ELE_TX_MCS(p + 2), 2); -+ -+ vht_highest_rate = rtw_get_vht_highest_rate(mcs_map); -+ vht_data_rate = rtw_vht_mcs_to_data_rate(CHANNEL_WIDTH_80, short_GI, vht_highest_rate); -+ } -+ } -+#endif -+ -+ /*Add basic and extended rates */ -+ p = custom; -+ p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): "); -+ while (pnetwork->network.SupportedRates[i] != 0) { -+ rate = pnetwork->network.SupportedRates[i] & 0x7F; -+ if (rate > max_rate) -+ max_rate = rate; -+ p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), -+ "%d%s ", rate >> 1, (rate & 1) ? ".5" : ""); -+ i++; -+ } -+#ifdef CONFIG_80211AC_VHT -+ if (vht_cap == _TRUE) -+ max_rate = vht_data_rate; -+ else -+#endif -+ if (ht_cap == _TRUE) { -+ if (mcs_rate & 0x8000) /* MCS15 */ -+ max_rate = (bw_40MHz) ? ((short_GI) ? 300 : 270) : ((short_GI) ? 144 : 130); -+ -+ else if (mcs_rate & 0x0080) /* MCS7 */ -+ max_rate = (bw_40MHz) ? ((short_GI) ? 150 : 135) : ((short_GI) ? 72 : 65); -+ else { /* default MCS7 */ -+ /* RTW_INFO("wx_get_scan, mcs_rate_bitmap=0x%x\n", mcs_rate); */ -+ max_rate = (bw_40MHz) ? ((short_GI) ? 150 : 135) : ((short_GI) ? 72 : 65); -+ } -+ -+ max_rate = max_rate * 2; /* Mbps/2; */ -+ } -+ -+ iwe->cmd = SIOCGIWRATE; -+ iwe->u.bitrate.fixed = iwe->u.bitrate.disabled = 0; -+ iwe->u.bitrate.value = max_rate * 500000; -+ start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_PARAM_LEN); -+ return start ; -+} -+ -+static inline char *iwe_stream_wpa_wpa2_process(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe) -+{ -+ int buf_size = MAX_WPA_IE_LEN * 2; -+ /* u8 pbuf[buf_size]={0}; */ -+ u8 *pbuf = rtw_zmalloc(buf_size); -+ -+ u8 wpa_ie[255] = {0}, rsn_ie[255] = {0}; -+ u16 i, wpa_len = 0, rsn_len = 0; -+ u8 *p; -+ sint out_len = 0; -+ -+ -+ if (pbuf) { -+ p = pbuf; -+ -+ /* parsing WPA/WPA2 IE */ -+ if (pnetwork->network.Reserved[0] != BSS_TYPE_PROB_REQ) { /* Probe Request */ -+ out_len = rtw_get_sec_ie(pnetwork->network.IEs , pnetwork->network.IELength, rsn_ie, &rsn_len, wpa_ie, &wpa_len); -+ -+ if (wpa_len > 0) { -+ -+ _rtw_memset(pbuf, 0, buf_size); -+ p += sprintf(p, "wpa_ie="); -+ for (i = 0; i < wpa_len; i++) -+ p += sprintf(p, "%02x", wpa_ie[i]); -+ -+ if (wpa_len > 100) { -+ printk("-----------------Len %d----------------\n", wpa_len); -+ for (i = 0; i < wpa_len; i++) -+ printk("%02x ", wpa_ie[i]); -+ printk("\n"); -+ printk("-----------------Len %d----------------\n", wpa_len); -+ } -+ -+ _rtw_memset(iwe, 0, sizeof(*iwe)); -+ iwe->cmd = IWEVCUSTOM; -+ iwe->u.data.length = strlen(pbuf); -+ start = iwe_stream_add_point(info, start, stop, iwe, pbuf); -+ -+ _rtw_memset(iwe, 0, sizeof(*iwe)); -+ iwe->cmd = IWEVGENIE; -+ iwe->u.data.length = wpa_len; -+ start = iwe_stream_add_point(info, start, stop, iwe, wpa_ie); -+ } -+ if (rsn_len > 0) { -+ -+ _rtw_memset(pbuf, 0, buf_size); -+ p += sprintf(p, "rsn_ie="); -+ for (i = 0; i < rsn_len; i++) -+ p += sprintf(p, "%02x", rsn_ie[i]); -+ _rtw_memset(iwe, 0, sizeof(*iwe)); -+ iwe->cmd = IWEVCUSTOM; -+ iwe->u.data.length = strlen(pbuf); -+ start = iwe_stream_add_point(info, start, stop, iwe, pbuf); -+ -+ _rtw_memset(iwe, 0, sizeof(*iwe)); -+ iwe->cmd = IWEVGENIE; -+ iwe->u.data.length = rsn_len; -+ start = iwe_stream_add_point(info, start, stop, iwe, rsn_ie); -+ } -+ } -+ -+ rtw_mfree(pbuf, buf_size); -+ } -+ return start; -+} -+ -+static inline char *iwe_stream_wps_process(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe) -+{ -+ /* parsing WPS IE */ -+ uint cnt = 0, total_ielen; -+ u8 *wpsie_ptr = NULL; -+ uint wps_ielen = 0; -+ u8 ie_offset = (pnetwork->network.Reserved[0] == BSS_TYPE_PROB_REQ ? 0 : 12); -+ -+ u8 *ie_ptr = pnetwork->network.IEs + ie_offset; -+ total_ielen = pnetwork->network.IELength - ie_offset; -+ -+ if (pnetwork->network.Reserved[0] == BSS_TYPE_PROB_REQ) { /* Probe Request */ -+ ie_ptr = pnetwork->network.IEs; -+ total_ielen = pnetwork->network.IELength; -+ } else { /* Beacon or Probe Respones */ -+ ie_ptr = pnetwork->network.IEs + _FIXED_IE_LENGTH_; -+ total_ielen = pnetwork->network.IELength - _FIXED_IE_LENGTH_; -+ } -+ while (cnt < total_ielen) { -+ if (rtw_is_wps_ie(&ie_ptr[cnt], &wps_ielen) && (wps_ielen > 2)) { -+ wpsie_ptr = &ie_ptr[cnt]; -+ iwe->cmd = IWEVGENIE; -+ iwe->u.data.length = (u16)wps_ielen; -+ start = iwe_stream_add_point(info, start, stop, iwe, wpsie_ptr); -+ } -+ cnt += ie_ptr[cnt + 1] + 2; /* goto next */ -+ } -+ return start; -+} -+ -+static inline char *iwe_stream_wapi_process(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe) -+{ -+#ifdef CONFIG_WAPI_SUPPORT -+ char *p; -+ -+ if (pnetwork->network.Reserved[0] != BSS_TYPE_PROB_REQ) { /* Probe Request */ -+ sint out_len_wapi = 0; -+ /* here use static for stack size */ -+ static u8 buf_wapi[MAX_WAPI_IE_LEN * 2] = {0}; -+ static u8 wapi_ie[MAX_WAPI_IE_LEN] = {0}; -+ u16 wapi_len = 0; -+ u16 i; -+ -+ out_len_wapi = rtw_get_wapi_ie(pnetwork->network.IEs , pnetwork->network.IELength, wapi_ie, &wapi_len); -+ -+ RTW_INFO("rtw_wx_get_scan: %s ", pnetwork->network.Ssid.Ssid); -+ RTW_INFO("rtw_wx_get_scan: ssid = %d ", wapi_len); -+ -+ -+ if (wapi_len > 0) { -+ p = buf_wapi; -+ /* _rtw_memset(buf_wapi, 0, MAX_WAPI_IE_LEN*2); */ -+ p += sprintf(p, "wapi_ie="); -+ for (i = 0; i < wapi_len; i++) -+ p += sprintf(p, "%02x", wapi_ie[i]); -+ -+ _rtw_memset(iwe, 0, sizeof(*iwe)); -+ iwe->cmd = IWEVCUSTOM; -+ iwe->u.data.length = strlen(buf_wapi); -+ start = iwe_stream_add_point(info, start, stop, iwe, buf_wapi); -+ -+ _rtw_memset(iwe, 0, sizeof(*iwe)); -+ iwe->cmd = IWEVGENIE; -+ iwe->u.data.length = wapi_len; -+ start = iwe_stream_add_point(info, start, stop, iwe, wapi_ie); -+ } -+ } -+#endif/* #ifdef CONFIG_WAPI_SUPPORT */ -+ return start; -+} -+ -+static inline char *iwe_stream_rssi_process(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe) -+{ -+ u8 ss, sq; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ s16 noise = 0; -+#endif -+ -+ /* Add quality statistics */ -+ iwe->cmd = IWEVQUAL; -+ iwe->u.qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ | IW_QUAL_NOISE_UPDATED -+#else -+ | IW_QUAL_NOISE_INVALID -+#endif -+#ifdef CONFIG_SIGNAL_DISPLAY_DBM -+ | IW_QUAL_DBM -+#endif -+ ; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE && -+ is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { -+ ss = padapter->recvpriv.signal_strength; -+ sq = padapter->recvpriv.signal_qual; -+ } else { -+ ss = pnetwork->network.PhyInfo.SignalStrength; -+ sq = pnetwork->network.PhyInfo.SignalQuality; -+ } -+ -+ -+#ifdef CONFIG_SIGNAL_DISPLAY_DBM -+ iwe->u.qual.level = (u8) translate_percentage_to_dbm(ss); /* dbm */ -+#else -+ iwe->u.qual.level = (u8)ss; /* % */ -+#endif -+ -+ iwe->u.qual.qual = (u8)sq; /* signal quality */ -+ -+#ifdef CONFIG_PLATFORM_ROCKCHIPS -+ iwe->u.qual.noise = -100; /* noise level suggest by zhf@rockchips */ -+#else -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ if (IS_NM_ENABLE(padapter)) { -+ noise = rtw_noise_query_by_chan_num(padapter, pnetwork->network.Configuration.DSConfig); -+ #ifndef CONFIG_SIGNAL_DISPLAY_DBM -+ noise = translate_dbm_to_percentage(noise);/*percentage*/ -+ #endif -+ iwe->u.qual.noise = noise; -+ } -+#else -+ iwe->u.qual.noise = 0; /* noise level */ -+#endif -+#endif /* CONFIG_PLATFORM_ROCKCHIPS */ -+ -+ /* RTW_INFO("iqual=%d, ilevel=%d, inoise=%d, iupdated=%d\n", iwe.u.qual.qual, iwe.u.qual.level , iwe.u.qual.noise, iwe.u.qual.updated); */ -+ -+ start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_QUAL_LEN); -+ return start; -+} -+ -+static inline char *iwe_stream_net_rsv_process(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop, struct iw_event *iwe) -+{ -+ u8 buf[32] = {0}; -+ u8 *p, *pos; -+ p = buf; -+ pos = pnetwork->network.Reserved; -+ -+ p += sprintf(p, "fm=%02X%02X", pos[1], pos[0]); -+ _rtw_memset(iwe, 0, sizeof(*iwe)); -+ iwe->cmd = IWEVCUSTOM; -+ iwe->u.data.length = strlen(buf); -+ start = iwe_stream_add_point(info, start, stop, iwe, buf); -+ return start; -+} -+ -+static char *translate_scan(_adapter *padapter, -+ struct iw_request_info *info, struct wlan_network *pnetwork, -+ char *start, char *stop) -+{ -+ struct iw_event iwe; -+ u16 cap = 0; -+ _rtw_memset(&iwe, 0, sizeof(iwe)); -+ -+ if (_FALSE == search_p2p_wfd_ie(padapter, info, pnetwork, start, stop)) -+ return start; -+ -+ start = iwe_stream_mac_addr_proess(padapter, info, pnetwork, start, stop, &iwe); -+ start = iwe_stream_essid_proess(padapter, info, pnetwork, start, stop, &iwe); -+ start = iwe_stream_protocol_process(padapter, info, pnetwork, start, stop, &iwe); -+ if (pnetwork->network.Reserved[0] == BSS_TYPE_PROB_REQ) /* Probe Request */ -+ cap = 0; -+ else { -+ _rtw_memcpy((u8 *)&cap, rtw_get_capability_from_ie(pnetwork->network.IEs), 2); -+ cap = le16_to_cpu(cap); -+ } -+ -+ start = iwe_stream_mode_process(padapter, info, pnetwork, start, stop, &iwe, cap); -+ start = iwe_stream_chan_process(padapter, info, pnetwork, start, stop, &iwe); -+ start = iwe_stream_encryption_process(padapter, info, pnetwork, start, stop, &iwe, cap); -+ start = iwe_stream_rate_process(padapter, info, pnetwork, start, stop, &iwe); -+ start = iwe_stream_wpa_wpa2_process(padapter, info, pnetwork, start, stop, &iwe); -+ start = iwe_stream_wps_process(padapter, info, pnetwork, start, stop, &iwe); -+ start = iwe_stream_wapi_process(padapter, info, pnetwork, start, stop, &iwe); -+ start = iwe_stream_rssi_process(padapter, info, pnetwork, start, stop, &iwe); -+ start = iwe_stream_net_rsv_process(padapter, info, pnetwork, start, stop, &iwe); -+ -+ return start; -+} -+ -+static int wpa_set_auth_algs(struct net_device *dev, u32 value) -+{ -+ _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); -+ int ret = 0; -+ -+ if ((value & AUTH_ALG_SHARED_KEY) && (value & AUTH_ALG_OPEN_SYSTEM)) { -+ RTW_INFO("wpa_set_auth_algs, AUTH_ALG_SHARED_KEY and AUTH_ALG_OPEN_SYSTEM [value:0x%x]\n", value); -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; -+ } else if (value & AUTH_ALG_SHARED_KEY) { -+ RTW_INFO("wpa_set_auth_algs, AUTH_ALG_SHARED_KEY [value:0x%x]\n", value); -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ -+#ifdef CONFIG_PLATFORM_MT53XX -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; -+#else -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeShared; -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; -+#endif -+ } else if (value & AUTH_ALG_OPEN_SYSTEM) { -+ RTW_INFO("wpa_set_auth_algs, AUTH_ALG_OPEN_SYSTEM\n"); -+ /* padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; */ -+ if (padapter->securitypriv.ndisauthtype < Ndis802_11AuthModeWPAPSK) { -+#ifdef CONFIG_PLATFORM_MT53XX -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; -+#else -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open; -+#endif -+ } -+ -+ } else if (value & AUTH_ALG_LEAP) -+ RTW_INFO("wpa_set_auth_algs, AUTH_ALG_LEAP\n"); -+ else { -+ RTW_INFO("wpa_set_auth_algs, error!\n"); -+ ret = -EINVAL; -+ } -+ -+ return ret; -+ -+} -+ -+static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) -+{ -+ int ret = 0; -+ u32 wep_key_idx, wep_key_len; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif /* CONFIG_P2P */ -+ -+ -+ param->u.crypt.err = 0; -+ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; -+ -+ if (param_len < (u32)((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && -+ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && -+ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { -+ -+ if (param->u.crypt.idx >= WEP_KEYS -+#ifdef CONFIG_IEEE80211W -+ && param->u.crypt.idx > BIP_MAX_KEYID -+#endif /* CONFIG_IEEE80211W */ -+ ) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } else { -+#ifdef CONFIG_WAPI_SUPPORT -+ if (strcmp(param->u.crypt.alg, "SMS4")) -+#endif -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } -+ -+ if (strcmp(param->u.crypt.alg, "WEP") == 0) { -+ RTW_INFO("wpa_set_encryption, crypt.alg = WEP\n"); -+ -+ wep_key_idx = param->u.crypt.idx; -+ wep_key_len = param->u.crypt.key_len; -+ -+ if ((wep_key_idx >= WEP_KEYS) || (wep_key_len <= 0)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) { -+ /* wep default key has not been set, so use this key index as default key.*/ -+ -+ wep_key_len = wep_key_len <= 5 ? 5 : 13; -+ -+ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ -+ if (wep_key_len == 13) { -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ } -+ -+ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; -+ } -+ -+ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); -+ -+ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; -+ -+ psecuritypriv->key_mask |= BIT(wep_key_idx); -+ -+ padapter->mlmeextpriv.mlmext_info.key_index = wep_key_idx; -+ goto exit; -+ } -+ -+ if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { /* 802_1x */ -+ struct sta_info *psta, *pbcmc_sta; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) { /* sta mode */ -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ if (psta == NULL) { -+ /* DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail\n")); */ -+ } else { -+ /* Jeff: don't disable ieee8021x_blocked while clearing key */ -+ if (strcmp(param->u.crypt.alg, "none") != 0) -+ psta->ieee8021x_blocked = _FALSE; -+ -+ if ((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled) || -+ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) -+ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; -+ -+ if (param->u.crypt.set_tx == 1) { /* pairwise key */ -+ RTW_INFO(FUNC_ADPT_FMT" set %s PTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.alg, param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ if (strcmp(param->u.crypt.alg, "TKIP") == 0) { /* set mic key */ -+ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); -+ padapter->securitypriv.busetkipkey = _FALSE; -+ } -+ psta->dot11txpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psta->dot11rxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psta->bpairwise_key_installed = _TRUE; -+ rtw_setstakey_cmd(padapter, psta, UNICAST_KEY, _TRUE); -+ -+ } else { /* group key */ -+ if (strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set %s GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.alg, param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, -+ (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ /* only TKIP group key need to install this */ -+ if (param->u.crypt.key_len > 16) { -+ _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); -+ } -+ padapter->securitypriv.binstallGrpkey = _TRUE; -+ if (param->u.crypt.idx < 4) -+ _rtw_memcpy(padapter->securitypriv.iv_seq[param->u.crypt.idx], param->u.crypt.seq, 8); -+ padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; -+ rtw_set_key(padapter, &padapter->securitypriv, param->u.crypt.idx, 1, _TRUE); -+ -+ #ifdef CONFIG_IEEE80211W -+ } else if (strcmp(param->u.crypt.alg, "BIP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set IGTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key, -+ (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ psecuritypriv->dot11wBIPKeyid = param->u.crypt.idx; -+ psecuritypriv->dot11wBIPrxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psecuritypriv->binstallBIPkey = _TRUE; -+ #endif /* CONFIG_IEEE80211W */ -+ -+ } -+ -+#ifdef CONFIG_P2P -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); -+#endif /* CONFIG_P2P */ -+ -+ /* WPA/WPA2 key-handshake has completed */ -+ clr_fwstate(pmlmepriv, WIFI_UNDER_KEY_HANDSHAKE); -+ } -+ } -+ -+ pbcmc_sta = rtw_get_bcmc_stainfo(padapter); -+ if (pbcmc_sta == NULL) { -+ /* DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null\n")); */ -+ } else { -+ /* Jeff: don't disable ieee8021x_blocked while clearing key */ -+ if (strcmp(param->u.crypt.alg, "none") != 0) -+ pbcmc_sta->ieee8021x_blocked = _FALSE; -+ -+ if ((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled) || -+ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) -+ pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; -+ } -+ } else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { /* adhoc mode */ -+ } -+ } -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ if (strcmp(param->u.crypt.alg, "SMS4") == 0) -+ rtw_wapi_set_set_encryption(padapter, param); -+#endif -+ -+exit: -+ -+ -+ return ret; -+} -+ -+static int rtw_set_wpa_ie(_adapter *padapter, char *pie, unsigned short ielen) -+{ -+ u8 *buf = NULL, *pos = NULL; -+ int group_cipher = 0, pairwise_cipher = 0; -+ u8 mfp_opt = MFP_NO; -+ int ret = 0; -+ u8 null_addr[] = {0, 0, 0, 0, 0, 0}; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif /* CONFIG_P2P */ -+ -+ if ((ielen > MAX_WPA_IE_LEN) || (pie == NULL)) { -+ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ if (pie == NULL) -+ return ret; -+ else -+ return -EINVAL; -+ } -+ -+ if (ielen) { -+ buf = rtw_zmalloc(ielen); -+ if (buf == NULL) { -+ ret = -ENOMEM; -+ goto exit; -+ } -+ -+ _rtw_memcpy(buf, pie , ielen); -+ -+ /* dump */ -+ { -+ int i; -+ RTW_INFO("\n wpa_ie(length:%d):\n", ielen); -+ for (i = 0; i < ielen; i = i + 8) -+ RTW_INFO("0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x\n", buf[i], buf[i + 1], buf[i + 2], buf[i + 3], buf[i + 4], buf[i + 5], buf[i + 6], buf[i + 7]); -+ } -+ -+ pos = buf; -+ if (ielen < RSN_HEADER_LEN) { -+ ret = -1; -+ goto exit; -+ } -+ -+ if (rtw_parse_wpa_ie(buf, ielen, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPAPSK; -+ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &buf[0], ielen); -+ } -+ -+ if (rtw_parse_wpa2_ie(buf, ielen, &group_cipher, &pairwise_cipher, NULL, NULL, &mfp_opt) == _SUCCESS) { -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPA2PSK; -+ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &buf[0], ielen); -+ } -+ -+ if (group_cipher == 0) -+ group_cipher = WPA_CIPHER_NONE; -+ if (pairwise_cipher == 0) -+ pairwise_cipher = WPA_CIPHER_NONE; -+ -+ switch (group_cipher) { -+ case WPA_CIPHER_NONE: -+ padapter->securitypriv.dot118021XGrpPrivacy = _NO_PRIVACY_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ break; -+ case WPA_CIPHER_WEP40: -+ padapter->securitypriv.dot118021XGrpPrivacy = _WEP40_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ case WPA_CIPHER_TKIP: -+ padapter->securitypriv.dot118021XGrpPrivacy = _TKIP_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; -+ break; -+ case WPA_CIPHER_CCMP: -+ padapter->securitypriv.dot118021XGrpPrivacy = _AES_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_WEP104: -+ padapter->securitypriv.dot118021XGrpPrivacy = _WEP104_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ } -+ -+ switch (pairwise_cipher) { -+ case WPA_CIPHER_NONE: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ break; -+ case WPA_CIPHER_WEP40: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _WEP40_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ case WPA_CIPHER_TKIP: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _TKIP_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; -+ break; -+ case WPA_CIPHER_CCMP: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _AES_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ case WPA_CIPHER_WEP104: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _WEP104_; -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ break; -+ } -+ -+ if (mfp_opt == MFP_INVALID) { -+ RTW_INFO(FUNC_ADPT_FMT" invalid MFP setting\n", FUNC_ADPT_ARG(padapter)); -+ ret = -EINVAL; -+ goto exit; -+ } -+ padapter->securitypriv.mfp_opt = mfp_opt; -+ -+ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ {/* set wps_ie */ -+ u16 cnt = 0; -+ u8 eid, wps_oui[4] = {0x0, 0x50, 0xf2, 0x04}; -+ -+ while (cnt < ielen) { -+ eid = buf[cnt]; -+ -+ if ((eid == _VENDOR_SPECIFIC_IE_) && (_rtw_memcmp(&buf[cnt + 2], wps_oui, 4) == _TRUE)) { -+ RTW_INFO("SET WPS_IE\n"); -+ -+ padapter->securitypriv.wps_ie_len = ((buf[cnt + 1] + 2) < MAX_WPS_IE_LEN) ? (buf[cnt + 1] + 2) : MAX_WPS_IE_LEN; -+ -+ _rtw_memcpy(padapter->securitypriv.wps_ie, &buf[cnt], padapter->securitypriv.wps_ie_len); -+ -+ set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); -+ -+#ifdef CONFIG_P2P -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK)) -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_ING); -+#endif /* CONFIG_P2P */ -+ cnt += buf[cnt + 1] + 2; -+ -+ break; -+ } else { -+ cnt += buf[cnt + 1] + 2; /* goto next */ -+ } -+ } -+ } -+ -+ #ifdef CONFIG_RTW_MULTI_AP -+ padapter->multi_ap = rtw_get_multi_ap_ie_ext(buf, ielen) & MULTI_AP_BACKHAUL_STA; -+ if (padapter->multi_ap) -+ adapter_set_use_wds(padapter, 1); -+ #endif -+ } -+ -+ /* TKIP and AES disallow multicast packets until installing group key */ -+ if (padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ -+ || padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ -+ || padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) -+ /* WPS open need to enable multicast -+ * || check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) */ -+ rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); -+ -+ -+exit: -+ -+ if (buf) -+ rtw_mfree(buf, ielen); -+ -+ return ret; -+} -+ -+static int rtw_wx_get_name(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u32 ht_ielen = 0; -+ char *p; -+ u8 ht_cap = _FALSE, vht_cap = _FALSE; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; -+ NDIS_802_11_RATES_EX *prates = NULL; -+ -+ -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE | WIFI_ADHOC_MASTER_STATE) == _TRUE) { -+ /* parsing HT_CAP_IE */ -+ if( is_supported_ht(padapter->registrypriv.wireless_mode)&&(padapter->registrypriv.ht_enable)) { -+ p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength - 12); -+ if (p && ht_ielen > 0 ) -+ ht_cap = _TRUE; -+ } -+#ifdef CONFIG_80211AC_VHT -+ if ((padapter->registrypriv.wireless_mode & WIRELESS_11AC) && -+ (pmlmepriv->vhtpriv.vht_option == _TRUE)) -+ vht_cap = _TRUE; -+#endif -+ -+ prates = &pcur_bss->SupportedRates; -+ if (rtw_is_cckratesonly_included((u8 *)prates) == _TRUE) { -+ if (ht_cap == _TRUE) -+ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bn"); -+ else -+ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11b"); -+ } else if ((rtw_is_cckrates_included((u8 *)prates)) == _TRUE) { -+ if (ht_cap == _TRUE) -+ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bgn"); -+ else { -+ if(padapter->registrypriv.wireless_mode & WIRELESS_11G) -+ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bg"); -+ else -+ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11b"); -+ } -+ } else { -+ if (pcur_bss->Configuration.DSConfig > 14) { -+#ifdef CONFIG_80211AC_VHT -+ if (vht_cap == _TRUE) -+ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11AC"); -+ else -+#endif -+ { -+ if (ht_cap == _TRUE) -+ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11an"); -+ else -+ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11a"); -+ } -+ } else { -+ if (ht_cap == _TRUE) -+ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11gn"); -+ else -+ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g"); -+ } -+ } -+ } else { -+ /* prates = &padapter->registrypriv.dev_network.SupportedRates; */ -+ /* snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g"); */ -+ snprintf(wrqu->name, IFNAMSIZ, "unassociated"); -+ } -+ -+ -+ return 0; -+} -+ -+static int rtw_wx_set_freq(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ int exp = 1, freq = 0, div = 0; -+ -+ rtw_ps_deny(padapter, PS_DENY_IOCTL); -+ if (rtw_pwr_wakeup(padapter) == _FALSE) -+ goto exit; -+ if (wrqu->freq.m <= 1000) { -+ if (wrqu->freq.flags == IW_FREQ_AUTO) { -+ if (rtw_chset_search_ch(adapter_to_chset(padapter), wrqu->freq.m) > 0) { -+ padapter->mlmeextpriv.cur_channel = wrqu->freq.m; -+ RTW_INFO("%s: channel is auto, set to channel %d\n", __func__, wrqu->freq.m); -+ } else { -+ padapter->mlmeextpriv.cur_channel = 1; -+ RTW_INFO("%s: channel is auto, Channel Plan don't match just set to channel 1\n", __func__); -+ } -+ } else { -+ padapter->mlmeextpriv.cur_channel = wrqu->freq.m; -+ RTW_INFO("%s: set to channel %d\n", __func__, padapter->mlmeextpriv.cur_channel); -+ } -+ } else { -+ while (wrqu->freq.e) { -+ exp *= 10; -+ wrqu->freq.e--; -+ } -+ -+ freq = wrqu->freq.m; -+ -+ while (!(freq % 10)) { -+ freq /= 10; -+ exp *= 10; -+ } -+ -+ /* freq unit is MHz here */ -+ div = 1000000 / exp; -+ -+ if (div) -+ freq /= div; -+ else { -+ div = exp / 1000000; -+ freq *= div; -+ } -+ -+ /* If freq is invalid, rtw_freq2ch() will return channel 1 */ -+ padapter->mlmeextpriv.cur_channel = rtw_freq2ch(freq); -+ RTW_INFO("%s: set to channel %d\n", __func__, padapter->mlmeextpriv.cur_channel); -+ } -+ set_channel_bwmode(padapter, padapter->mlmeextpriv.cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+exit: -+ rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); -+ -+ return 0; -+} -+ -+static int rtw_wx_get_freq(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE && check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) != _TRUE) { -+ -+ wrqu->freq.m = rtw_ch2freq(pcur_bss->Configuration.DSConfig) * 100000; -+ wrqu->freq.e = 1; -+ wrqu->freq.i = pcur_bss->Configuration.DSConfig; -+ -+ } else { -+ wrqu->freq.m = rtw_ch2freq(padapter->mlmeextpriv.cur_channel) * 100000; -+ wrqu->freq.e = 1; -+ wrqu->freq.i = padapter->mlmeextpriv.cur_channel; -+ } -+ -+ return 0; -+} -+ -+static int rtw_wx_set_mode(struct net_device *dev, struct iw_request_info *a, -+ union iwreq_data *wrqu, char *b) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType ; -+ int ret = 0; -+ -+ -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = -EPERM; -+ goto exit; -+ } -+ -+ if (!rtw_is_hw_init_completed(padapter)) { -+ ret = -EPERM; -+ goto exit; -+ } -+ -+ /* initial default type */ -+ dev->type = ARPHRD_ETHER; -+ -+ if (wrqu->mode != IW_MODE_MONITOR) { -+ rtw_ps_deny_cancel(padapter, PS_DENY_MONITOR_MODE); -+ } -+ -+ switch (wrqu->mode) { -+#ifdef CONFIG_WIFI_MONITOR -+ case IW_MODE_MONITOR: -+ networkType = Ndis802_11Monitor; -+ -+ rtw_ps_deny(padapter, PS_DENY_MONITOR_MODE); -+ LeaveAllPowerSaveMode(padapter); -+ -+#if 0 -+ dev->type = ARPHRD_IEEE80211; /* IEEE 802.11 : 801 */ -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) -+ dev->type = ARPHRD_IEEE80211_RADIOTAP; /* IEEE 802.11 + radiotap header : 803 */ -+ RTW_INFO("set_mode = IW_MODE_MONITOR\n"); -+#else -+ RTW_INFO("kernel version < 2.6.24 not support IW_MODE_MONITOR\n"); -+#endif -+ break; -+#endif /* CONFIG_WIFI_MONITOR */ -+ case IW_MODE_AUTO: -+ networkType = Ndis802_11AutoUnknown; -+ RTW_INFO("set_mode = IW_MODE_AUTO\n"); -+ break; -+ case IW_MODE_ADHOC: -+ networkType = Ndis802_11IBSS; -+ RTW_INFO("set_mode = IW_MODE_ADHOC\n"); -+ break; -+ case IW_MODE_MASTER: -+ networkType = Ndis802_11APMode; -+ RTW_INFO("set_mode = IW_MODE_MASTER\n"); -+ break; -+ case IW_MODE_INFRA: -+ networkType = Ndis802_11Infrastructure; -+ RTW_INFO("set_mode = IW_MODE_INFRA\n"); -+ break; -+ -+ default: -+ ret = -EINVAL;; -+ goto exit; -+ } -+ -+ if (rtw_set_802_11_infrastructure_mode(padapter, networkType, 0) == _FALSE) { -+ -+ ret = -EPERM; -+ goto exit; -+ -+ } -+ -+ rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_WAIT_ACK); -+ -+ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) == _TRUE) -+ rtw_indicate_connect(padapter); -+ -+exit: -+ -+ -+ return ret; -+ -+} -+ -+static int rtw_wx_get_mode(struct net_device *dev, struct iw_request_info *a, -+ union iwreq_data *wrqu, char *b) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) -+ wrqu->mode = IW_MODE_INFRA; -+ else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || -+ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) -+ -+ wrqu->mode = IW_MODE_ADHOC; -+ else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) -+ wrqu->mode = IW_MODE_MASTER; -+ else if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) == _TRUE) -+ wrqu->mode = IW_MODE_MONITOR; -+ else -+ wrqu->mode = IW_MODE_AUTO; -+ -+ -+ return 0; -+ -+} -+ -+ -+static int rtw_wx_set_pmkid(struct net_device *dev, -+ struct iw_request_info *a, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 j, blInserted = _FALSE; -+ int intReturn = _FALSE; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct iw_pmksa *pPMK = (struct iw_pmksa *) extra; -+ u8 strZeroMacAddress[ETH_ALEN] = { 0x00 }; -+ u8 strIssueBssid[ETH_ALEN] = { 0x00 }; -+ -+#if 0 -+ struct iw_pmksa { -+ __u32 cmd; -+ struct sockaddr bssid; -+ __u8 pmkid[IW_PMKID_LEN]; /* IW_PMKID_LEN=16 */ -+ } -+ There are the BSSID information in the bssid.sa_data array. -+ If cmd is IW_PMKSA_FLUSH, it means the wpa_suppplicant wants to clear all the PMKID information. -+ If cmd is IW_PMKSA_ADD, it means the wpa_supplicant wants to add a PMKID / BSSID to driver. -+ If cmd is IW_PMKSA_REMOVE, it means the wpa_supplicant wants to remove a PMKID / BSSID from driver. -+#endif -+ -+ _rtw_memcpy(strIssueBssid, pPMK->bssid.sa_data, ETH_ALEN); -+ if (pPMK->cmd == IW_PMKSA_ADD) { -+ RTW_INFO("[rtw_wx_set_pmkid] IW_PMKSA_ADD!\n"); -+ if (_rtw_memcmp(strIssueBssid, strZeroMacAddress, ETH_ALEN) == _TRUE) -+ return intReturn ; -+ else -+ intReturn = _TRUE; -+ blInserted = _FALSE; -+ -+ /* overwrite PMKID */ -+ for (j = 0 ; j < NUM_PMKID_CACHE; j++) { -+ if (_rtw_memcmp(psecuritypriv->PMKIDList[j].Bssid, strIssueBssid, ETH_ALEN) == _TRUE) { -+ /* BSSID is matched, the same AP => rewrite with new PMKID. */ -+ -+ RTW_INFO("[rtw_wx_set_pmkid] BSSID exists in the PMKList.\n"); -+ -+ _rtw_memcpy(psecuritypriv->PMKIDList[j].PMKID, pPMK->pmkid, IW_PMKID_LEN); -+ psecuritypriv->PMKIDList[j].bUsed = _TRUE; -+ psecuritypriv->PMKIDIndex = j + 1; -+ blInserted = _TRUE; -+ break; -+ } -+ } -+ -+ if (!blInserted) { -+ /* Find a new entry */ -+ RTW_INFO("[rtw_wx_set_pmkid] Use the new entry index = %d for this PMKID.\n", -+ psecuritypriv->PMKIDIndex); -+ -+ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, strIssueBssid, ETH_ALEN); -+ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, pPMK->pmkid, IW_PMKID_LEN); -+ -+ psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].bUsed = _TRUE; -+ psecuritypriv->PMKIDIndex++ ; -+ if (psecuritypriv->PMKIDIndex == 16) -+ psecuritypriv->PMKIDIndex = 0; -+ } -+ } else if (pPMK->cmd == IW_PMKSA_REMOVE) { -+ RTW_INFO("[rtw_wx_set_pmkid] IW_PMKSA_REMOVE!\n"); -+ intReturn = _TRUE; -+ for (j = 0 ; j < NUM_PMKID_CACHE; j++) { -+ if (_rtw_memcmp(psecuritypriv->PMKIDList[j].Bssid, strIssueBssid, ETH_ALEN) == _TRUE) { -+ /* BSSID is matched, the same AP => Remove this PMKID information and reset it. */ -+ _rtw_memset(psecuritypriv->PMKIDList[j].Bssid, 0x00, ETH_ALEN); -+ psecuritypriv->PMKIDList[j].bUsed = _FALSE; -+ break; -+ } -+ } -+ } else if (pPMK->cmd == IW_PMKSA_FLUSH) { -+ RTW_INFO("[rtw_wx_set_pmkid] IW_PMKSA_FLUSH!\n"); -+ _rtw_memset(&psecuritypriv->PMKIDList[0], 0x00, sizeof(RT_PMKID_LIST) * NUM_PMKID_CACHE); -+ psecuritypriv->PMKIDIndex = 0; -+ intReturn = _TRUE; -+ } -+ return intReturn ; -+} -+ -+static int rtw_wx_get_sens(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+#ifdef CONFIG_PLATFORM_ROCKCHIPS -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ /* -+ * 20110311 Commented by Jeff -+ * For rockchip platform's wpa_driver_wext_get_rssi -+ */ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ /* wrqu->sens.value=-padapter->recvpriv.signal_strength; */ -+ wrqu->sens.value = -padapter->recvpriv.rssi; -+ /* RTW_INFO("%s: %d\n", __FUNCTION__, wrqu->sens.value); */ -+ wrqu->sens.fixed = 0; /* no auto select */ -+ } else -+#endif -+ { -+ wrqu->sens.value = 0; -+ wrqu->sens.fixed = 0; /* no auto select */ -+ wrqu->sens.disabled = 1; -+ } -+ return 0; -+} -+ -+static int rtw_wx_get_range(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ struct iw_range *range = (struct iw_range *)extra; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ u16 val; -+ int i; -+ -+ -+ -+ wrqu->data.length = sizeof(*range); -+ _rtw_memset(range, 0, sizeof(*range)); -+ -+ /* Let's try to keep this struct in the same order as in -+ * linux/include/wireless.h -+ */ -+ -+ /* TODO: See what values we can set, and remove the ones we can't -+ * set, or fill them with some default data. -+ */ -+ -+ /* ~5 Mb/s real (802.11b) */ -+ range->throughput = 5 * 1000 * 1000; -+ -+ /* TODO: Not used in 802.11b? -+ * range->min_nwid; Minimal NWID we are able to set */ -+ /* TODO: Not used in 802.11b? -+ * range->max_nwid; Maximal NWID we are able to set */ -+ -+ /* Old Frequency (backward compat - moved lower ) */ -+ /* range->old_num_channels; -+ * range->old_num_frequency; -+ * range->old_freq[6]; Filler to keep "version" at the same offset */ -+ -+ /* signal level threshold range */ -+ -+ /* Quality of link & SNR stuff */ -+ /* Quality range (link, level, noise) -+ * If the quality is absolute, it will be in the range [0 ; max_qual], -+ * if the quality is dBm, it will be in the range [max_qual ; 0]. -+ * Don't forget that we use 8 bit arithmetics... -+ * -+ * If percentage range is 0~100 -+ * Signal strength dbm range logical is -100 ~ 0 -+ * but usually value is -90 ~ -20 -+ */ -+ range->max_qual.qual = 100; -+#ifdef CONFIG_SIGNAL_DISPLAY_DBM -+ range->max_qual.level = (u8)-100; -+ range->max_qual.noise = (u8)-100; -+ range->max_qual.updated = IW_QUAL_ALL_UPDATED; /* Updated all three */ -+ range->max_qual.updated |= IW_QUAL_DBM; -+#else /* !CONFIG_SIGNAL_DISPLAY_DBM */ -+ /* percent values between 0 and 100. */ -+ range->max_qual.level = 100; -+ range->max_qual.noise = 100; -+ range->max_qual.updated = IW_QUAL_ALL_UPDATED; /* Updated all three */ -+#endif /* !CONFIG_SIGNAL_DISPLAY_DBM */ -+ -+ /* This should contain the average/typical values of the quality -+ * indicator. This should be the threshold between a "good" and -+ * a "bad" link (example : monitor going from green to orange). -+ * Currently, user space apps like quality monitors don't have any -+ * way to calibrate the measurement. With this, they can split -+ * the range between 0 and max_qual in different quality level -+ * (using a geometric subdivision centered on the average). -+ * I expect that people doing the user space apps will feedback -+ * us on which value we need to put in each driver... */ -+ range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */ -+#ifdef CONFIG_SIGNAL_DISPLAY_DBM -+ /* TODO: Find real 'good' to 'bad' threshold value for RSSI */ -+ range->avg_qual.level = (u8)-70; -+ range->avg_qual.noise = 0; -+ range->avg_qual.updated = IW_QUAL_ALL_UPDATED; /* Updated all three */ -+ range->avg_qual.updated |= IW_QUAL_DBM; -+#else /* !CONFIG_SIGNAL_DISPLAY_DBM */ -+ /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ -+ range->avg_qual.level = 30; -+ range->avg_qual.noise = 100; -+ range->avg_qual.updated = IW_QUAL_ALL_UPDATED; /* Updated all three */ -+#endif /* !CONFIG_SIGNAL_DISPLAY_DBM */ -+ -+ range->num_bitrates = RATE_COUNT; -+ -+ for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++) -+ range->bitrate[i] = rtw_rates[i]; -+ -+ range->min_frag = MIN_FRAG_THRESHOLD; -+ range->max_frag = MAX_FRAG_THRESHOLD; -+ -+ range->pm_capa = 0; -+ -+ range->we_version_compiled = WIRELESS_EXT; -+ range->we_version_source = 16; -+ -+ /* range->retry_capa; What retry options are supported -+ * range->retry_flags; How to decode max/min retry limit -+ * range->r_time_flags; How to decode max/min retry life -+ * range->min_retry; Minimal number of retries -+ * range->max_retry; Maximal number of retries -+ * range->min_r_time; Minimal retry lifetime -+ * range->max_r_time; Maximal retry lifetime */ -+ -+ for (i = 0, val = 0; i < rfctl->max_chan_nums; i++) { -+ -+ /* Include only legal frequencies for some countries */ -+ if (rfctl->channel_set[i].ChannelNum != 0) { -+ range->freq[val].i = rfctl->channel_set[i].ChannelNum; -+ range->freq[val].m = rtw_ch2freq(rfctl->channel_set[i].ChannelNum) * 100000; -+ range->freq[val].e = 1; -+ val++; -+ } -+ -+ if (val == IW_MAX_FREQUENCIES) -+ break; -+ } -+ -+ range->num_channels = val; -+ range->num_frequency = val; -+ -+ /* Commented by Albert 2009/10/13 -+ * The following code will proivde the security capability to network manager. -+ * If the driver doesn't provide this capability to network manager, -+ * the WPA/WPA2 routers can't be choosen in the network manager. */ -+ -+ /* -+ #define IW_SCAN_CAPA_NONE 0x00 -+ #define IW_SCAN_CAPA_ESSID 0x01 -+ #define IW_SCAN_CAPA_BSSID 0x02 -+ #define IW_SCAN_CAPA_CHANNEL 0x04 -+ #define IW_SCAN_CAPA_MODE 0x08 -+ #define IW_SCAN_CAPA_RATE 0x10 -+ #define IW_SCAN_CAPA_TYPE 0x20 -+ #define IW_SCAN_CAPA_TIME 0x40 -+ */ -+ -+#if WIRELESS_EXT > 17 -+ range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 | -+ IW_ENC_CAPA_CIPHER_TKIP | IW_ENC_CAPA_CIPHER_CCMP; -+#endif -+ -+#ifdef IW_SCAN_CAPA_ESSID /* WIRELESS_EXT > 21 */ -+ range->scan_capa = IW_SCAN_CAPA_ESSID | IW_SCAN_CAPA_TYPE | IW_SCAN_CAPA_BSSID | -+ IW_SCAN_CAPA_CHANNEL | IW_SCAN_CAPA_MODE | IW_SCAN_CAPA_RATE; -+#endif -+ -+ -+ -+ return 0; -+ -+} -+ -+/* set bssid flow -+ * s1. rtw_set_802_11_infrastructure_mode() -+ * s2. rtw_set_802_11_authentication_mode() -+ * s3. set_802_11_encryption_mode() -+ * s4. rtw_set_802_11_bssid() */ -+static int rtw_wx_set_wap(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *awrq, -+ char *extra) -+{ -+ _irqL irqL; -+ uint ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sockaddr *temp = (struct sockaddr *)awrq; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ _list *phead; -+ u8 *dst_bssid, *src_bssid; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ NDIS_802_11_AUTHENTICATION_MODE authmode; -+ -+ /* -+ #ifdef CONFIG_CONCURRENT_MODE -+ if(padapter->adapter_type > PRIMARY_IFACE) -+ { -+ ret = -EINVAL; -+ goto exit; -+ } -+ #endif -+ */ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING) == _TRUE) { -+ RTW_INFO("set bssid, but buddy_intf is under scanning or linking\n"); -+ -+ ret = -EINVAL; -+ -+ goto exit; -+ } -+#endif -+ -+ rtw_ps_deny(padapter, PS_DENY_JOIN); -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ -+ if (!padapter->bup) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ -+ -+ if (temp->sa_family != ARPHRD_ETHER) { -+ ret = -EINVAL; -+ goto cancel_ps_deny; -+ } -+ -+ authmode = padapter->securitypriv.ndisauthtype; -+ _enter_critical_bh(&queue->lock, &irqL); -+ phead = get_list_head(queue); -+ pmlmepriv->pscanned = get_next(phead); -+ -+ while (1) { -+ -+ if ((rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) == _TRUE) { -+#if 0 -+ ret = -EINVAL; -+ goto cancel_ps_deny; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) { -+ rtw_set_802_11_bssid(padapter, temp->sa_data); -+ goto cancel_ps_deny; -+ } else { -+ ret = -EINVAL; -+ goto cancel_ps_deny; -+ } -+#endif -+ -+ break; -+ } -+ -+ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); -+ -+ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); -+ -+ dst_bssid = pnetwork->network.MacAddress; -+ -+ src_bssid = temp->sa_data; -+ -+ if ((_rtw_memcmp(dst_bssid, src_bssid, ETH_ALEN)) == _TRUE) { -+ if (!rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode, 0)) { -+ ret = -1; -+ _exit_critical_bh(&queue->lock, &irqL); -+ goto cancel_ps_deny; -+ } -+ -+ break; -+ } -+ -+ } -+ _exit_critical_bh(&queue->lock, &irqL); -+ -+ rtw_set_802_11_authentication_mode(padapter, authmode); -+ /* set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); */ -+ if (rtw_set_802_11_bssid(padapter, temp->sa_data) == _FALSE) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ -+cancel_ps_deny: -+ rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+exit: -+#endif -+ return ret; -+} -+ -+static int rtw_wx_get_wap(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; -+ -+ wrqu->ap_addr.sa_family = ARPHRD_ETHER; -+ -+ _rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); -+ -+ -+ -+ if (((check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) == _TRUE) || -+ ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE) || -+ ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) == _TRUE)) -+ -+ _rtw_memcpy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress, ETH_ALEN); -+ else -+ _rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); -+ -+ -+ return 0; -+ -+} -+ -+static int rtw_wx_set_mlme(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+#if 0 -+ /* SIOCSIWMLME data */ -+ struct iw_mlme { -+ __u16 cmd; /* IW_MLME_* */ -+ __u16 reason_code; -+ struct sockaddr addr; -+ }; -+#endif -+ -+ int ret = 0; -+ u16 reason; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct iw_mlme *mlme = (struct iw_mlme *) extra; -+ -+ -+ if (mlme == NULL) -+ return -1; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ reason = cpu_to_le16(mlme->reason_code); -+ -+ -+ RTW_INFO("%s, cmd=%d, reason=%d\n", __FUNCTION__, mlme->cmd, reason); -+ -+ -+ switch (mlme->cmd) { -+ case IW_MLME_DEAUTH: -+ if (!rtw_set_802_11_disassociate(padapter)) -+ ret = -1; -+ break; -+ -+ case IW_MLME_DISASSOC: -+ if (!rtw_set_802_11_disassociate(padapter)) -+ ret = -1; -+ -+ break; -+ -+ default: -+ return -EOPNOTSUPP; -+ } -+#ifdef CONFIG_RTW_REPEATER_SON -+ rtw_rson_do_disconnect(padapter); -+#endif -+ return ret; -+} -+ -+static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a, -+ union iwreq_data *wrqu, char *extra) -+{ -+ u8 _status = _FALSE; -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ /*struct mlme_priv *pmlmepriv = &padapter->mlmepriv;*/ -+ struct sitesurvey_parm parm; -+ u8 ssc_chk; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_P2P */ -+ -+#ifdef DBG_IOCTL -+ RTW_INFO("DBG_IOCTL %s:%d\n", __FUNCTION__, __LINE__); -+#endif -+ -+#if 1 -+ ssc_chk = rtw_sitesurvey_condition_check(padapter, _FALSE); -+ -+ #ifdef CONFIG_DOSCAN_IN_BUSYTRAFFIC -+ if ((ssc_chk != SS_ALLOW) && (ssc_chk != SS_DENY_BUSY_TRAFFIC)) -+ #else -+ /* When Busy Traffic, driver do not site survey. So driver return success. */ -+ /* wpa_supplicant will not issue SIOCSIWSCAN cmd again after scan timeout. */ -+ /* modify by thomas 2011-02-22. */ -+ if (ssc_chk != SS_ALLOW) -+ #endif -+ { -+ if (ssc_chk == SS_DENY_MP_MODE) -+ ret = -EPERM; -+ #ifdef DBG_LA_MODE -+ else if (ssc_chk == SS_DENY_LA_MODE) -+ ret = -EPERM; -+ #endif -+ else -+ indicate_wx_scan_complete_event(padapter); -+ -+ goto exit; -+ } else -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+ rtw_ps_deny(padapter, PS_DENY_SCAN); -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ if (!rtw_is_adapter_up(padapter)) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+#else -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (rtw_mp_mode_check(padapter)) { -+ RTW_INFO("MP mode block Scan request\n"); -+ ret = -EPERM; -+ goto exit; -+ } -+#endif -+ if (rtw_is_scan_deny(padapter)) { -+ indicate_wx_scan_complete_event(padapter); -+ goto exit; -+ } -+ -+ rtw_ps_deny(padapter, PS_DENY_SCAN); -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ -+ if (!rtw_is_adapter_up(padapter)) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ -+#ifndef CONFIG_DOSCAN_IN_BUSYTRAFFIC -+ /* When Busy Traffic, driver do not site survey. So driver return success. */ -+ /* wpa_supplicant will not issue SIOCSIWSCAN cmd again after scan timeout. */ -+ /* modify by thomas 2011-02-22. */ -+ if (rtw_mi_busy_traffic_check(padapter)) { -+ indicate_wx_scan_complete_event(padapter); -+ goto cancel_ps_deny; -+ } -+#endif -+#ifdef CONFIG_RTW_REPEATER_SON -+ if (padapter->rtw_rson_scanstage == RSON_SCAN_PROCESS) { -+ RTW_INFO(FUNC_ADPT_FMT" blocking scan for under rson scanning process\n", FUNC_ADPT_ARG(padapter)); -+ indicate_wx_scan_complete_event(padapter); -+ goto cancel_ps_deny; -+ } -+#endif -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) && check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) { -+ RTW_INFO("AP mode process WPS\n"); -+ indicate_wx_scan_complete_event(padapter); -+ goto cancel_ps_deny; -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING) == _TRUE) { -+ indicate_wx_scan_complete_event(padapter); -+ goto cancel_ps_deny; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, -+ WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING | WIFI_UNDER_WPS)) { -+ -+ indicate_wx_scan_complete_event(padapter); -+ goto cancel_ps_deny; -+ } -+#endif -+#endif -+ -+#ifdef CONFIG_P2P -+ if (pwdinfo->p2p_state != P2P_STATE_NONE) { -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); -+ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_FULL); -+ rtw_free_network_queue(padapter, _TRUE); -+ } -+#endif /* CONFIG_P2P */ -+ -+#if WIRELESS_EXT >= 17 -+ if (wrqu->data.length == sizeof(struct iw_scan_req)) { -+ struct iw_scan_req *req = (struct iw_scan_req *)extra; -+ -+ if (wrqu->data.flags & IW_SCAN_THIS_ESSID) { -+ int len = min((int)req->essid_len, IW_ESSID_MAX_SIZE); -+ -+ rtw_init_sitesurvey_parm(padapter, &parm); -+ _rtw_memcpy(&parm.ssid[0].Ssid, &req->essid, len); -+ parm.ssid[0].SsidLength = len; -+ parm.ssid_num = 1; -+ -+ RTW_INFO("IW_SCAN_THIS_ESSID, ssid=%s, len=%d\n", req->essid, req->essid_len); -+ -+ _status = rtw_set_802_11_bssid_list_scan(padapter, &parm); -+ -+ } else if (req->scan_type == IW_SCAN_TYPE_PASSIVE) -+ RTW_INFO("rtw_wx_set_scan, req->scan_type == IW_SCAN_TYPE_PASSIVE\n"); -+ -+ } else -+#endif -+ -+ if (wrqu->data.length >= WEXT_CSCAN_HEADER_SIZE -+ && _rtw_memcmp(extra, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == _TRUE -+ ) { -+ int len = wrqu->data.length - WEXT_CSCAN_HEADER_SIZE; -+ char *pos = extra + WEXT_CSCAN_HEADER_SIZE; -+ char section; -+ char sec_len; -+ int ssid_index = 0; -+ -+ /* RTW_INFO("%s COMBO_SCAN header is recognized\n", __FUNCTION__); */ -+ rtw_init_sitesurvey_parm(padapter, &parm); -+ -+ while (len >= 1) { -+ section = *(pos++); -+ len -= 1; -+ -+ switch (section) { -+ case WEXT_CSCAN_SSID_SECTION: -+ /* RTW_INFO("WEXT_CSCAN_SSID_SECTION\n"); */ -+ if (len < 1) { -+ len = 0; -+ break; -+ } -+ -+ sec_len = *(pos++); -+ len -= 1; -+ -+ if (sec_len > 0 && sec_len <= len) { -+ -+ parm.ssid[ssid_index].SsidLength = sec_len; -+ _rtw_memcpy(&parm.ssid[ssid_index].Ssid, pos, sec_len); -+ -+ /* RTW_INFO("%s COMBO_SCAN with specific parm.ssid:%s, %d\n", __FUNCTION__ */ -+ /* , parm.ssid[ssid_index].Ssid, parm.ssid[ssid_index].SsidLength); */ -+ ssid_index++; -+ } -+ -+ pos += sec_len; -+ len -= sec_len; -+ break; -+ -+ -+ case WEXT_CSCAN_CHANNEL_SECTION: -+ /* RTW_INFO("WEXT_CSCAN_CHANNEL_SECTION\n"); */ -+ pos += 1; -+ len -= 1; -+ break; -+ case WEXT_CSCAN_ACTV_DWELL_SECTION: -+ /* RTW_INFO("WEXT_CSCAN_ACTV_DWELL_SECTION\n"); */ -+ pos += 2; -+ len -= 2; -+ break; -+ case WEXT_CSCAN_PASV_DWELL_SECTION: -+ /* RTW_INFO("WEXT_CSCAN_PASV_DWELL_SECTION\n"); */ -+ pos += 2; -+ len -= 2; -+ break; -+ case WEXT_CSCAN_HOME_DWELL_SECTION: -+ /* RTW_INFO("WEXT_CSCAN_HOME_DWELL_SECTION\n"); */ -+ pos += 2; -+ len -= 2; -+ break; -+ case WEXT_CSCAN_TYPE_SECTION: -+ /* RTW_INFO("WEXT_CSCAN_TYPE_SECTION\n"); */ -+ pos += 1; -+ len -= 1; -+ break; -+#if 0 -+ case WEXT_CSCAN_NPROBE_SECTION: -+ RTW_INFO("WEXT_CSCAN_NPROBE_SECTION\n"); -+ break; -+#endif -+ -+ default: -+ /* RTW_INFO("Unknown CSCAN section %c\n", section); */ -+ len = 0; /* stop parsing */ -+ } -+ /* RTW_INFO("len:%d\n", len); */ -+ -+ } -+ parm.ssid_num = ssid_index; -+ -+ /* jeff: it has still some scan paramater to parse, we only do this now... */ -+ _status = rtw_set_802_11_bssid_list_scan(padapter, &parm); -+ -+ } else -+ -+ _status = rtw_set_802_11_bssid_list_scan(padapter, NULL); -+ -+ if (_status == _FALSE) -+ ret = -1; -+ -+cancel_ps_deny: -+ rtw_ps_deny_cancel(padapter, PS_DENY_SCAN); -+ -+exit: -+#ifdef DBG_IOCTL -+ RTW_INFO("DBG_IOCTL %s:%d return %d\n", __FUNCTION__, __LINE__, ret); -+#endif -+ -+ return ret; -+} -+ -+static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _irqL irqL; -+ _list *plist, *phead; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ RT_CHANNEL_INFO *chset = rfctl->channel_set; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ char *ev = extra; -+ char *stop = ev + wrqu->data.length; -+ u32 ret = 0; -+ u32 wait_for_surveydone; -+ sint wait_status; -+ u8 ch; -+ -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif /* CONFIG_P2P */ -+ -+ -+#ifdef DBG_IOCTL -+ RTW_INFO("DBG_IOCTL %s:%d\n", __FUNCTION__, __LINE__); -+#endif -+ -+ if (adapter_to_pwrctl(padapter)->brfoffbyhw && rtw_is_drv_stopped(padapter)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) -+ wait_for_surveydone = 200; -+ else { -+ /* P2P is disabled */ -+ wait_for_surveydone = 100; -+ } -+#else -+ { -+ wait_for_surveydone = 100; -+ } -+#endif /* CONFIG_P2P */ -+ -+#if 1 /* Wireless Extension use EAGAIN to try */ -+ wait_status = WIFI_UNDER_SURVEY -+#ifndef CONFIG_RTW_ANDROID -+ | WIFI_UNDER_LINKING -+#endif -+ ; -+ -+ while (check_fwstate(pmlmepriv, wait_status) == _TRUE) -+ return -EAGAIN; -+#else -+ wait_status = WIFI_UNDER_SURVEY -+#ifndef CONFIG_RTW_ANDROID -+ | WIFI_UNDER_LINKING -+#endif -+ ; -+ -+ while (check_fwstate(pmlmepriv, wait_status) == _TRUE) { -+ rtw_msleep_os(30); -+ cnt++; -+ if (cnt > wait_for_surveydone) -+ break; -+ } -+#endif -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ if ((stop - ev) < SCAN_ITEM_SIZE) { -+ if(wrqu->data.length == MAX_SCAN_BUFFER_LEN){ /*max buffer len defined by iwlist*/ -+ ret = 0; -+ RTW_INFO("%s: Scan results incomplete\n", __FUNCTION__); -+ break; -+ } -+ ret = -E2BIG; -+ break; -+ } -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ ch = pnetwork->network.Configuration.DSConfig; -+ -+ /* report network only if the current channel set contains the channel to which this network belongs */ -+ if (rtw_chset_search_ch(chset, ch) >= 0 -+ && rtw_mlme_band_check(padapter, ch) == _TRUE -+ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) -+ && (!IS_DFS_SLAVE_WITH_RD(rfctl) -+ || rtw_rfctl_dfs_domain_unknown(rfctl) -+ || !rtw_chset_is_ch_non_ocp(chset, ch)) -+ ) -+ ev = translate_scan(padapter, a, pnetwork, ev, stop); -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ wrqu->data.length = ev - extra; -+ wrqu->data.flags = 0; -+ -+exit: -+ -+ -+#ifdef DBG_IOCTL -+ RTW_INFO("DBG_IOCTL %s:%d return %d\n", __FUNCTION__, __LINE__, ret); -+#endif -+ -+ return ret ; -+ -+} -+ -+/* set ssid flow -+ * s1. rtw_set_802_11_infrastructure_mode() -+ * s2. set_802_11_authenticaion_mode() -+ * s3. set_802_11_encryption_mode() -+ * s4. rtw_set_802_11_ssid() */ -+static int rtw_wx_set_essid(struct net_device *dev, -+ struct iw_request_info *a, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _irqL irqL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _queue *queue = &pmlmepriv->scanned_queue; -+ _list *phead; -+ struct wlan_network *pnetwork = NULL; -+ NDIS_802_11_AUTHENTICATION_MODE authmode; -+ NDIS_802_11_SSID ndis_ssid; -+ u8 *dst_ssid, *src_ssid; -+ -+ uint ret = 0, len; -+ -+ -+#ifdef DBG_IOCTL -+ RTW_INFO("DBG_IOCTL %s:%d\n", __FUNCTION__, __LINE__); -+#endif -+#ifdef CONFIG_WEXT_DONT_JOIN_BYSSID -+ RTW_INFO("%s: CONFIG_WEXT_DONT_JOIN_BYSSID be defined!! only allow bssid joining\n", __func__); -+ return -EPERM; -+#endif -+ -+#if WIRELESS_EXT <= 20 -+ if ((wrqu->essid.length - 1) > IW_ESSID_MAX_SIZE) { -+#else -+ if (wrqu->essid.length > IW_ESSID_MAX_SIZE) { -+#endif -+ ret = -E2BIG; -+ goto exit; -+ } -+ -+ -+ -+ rtw_ps_deny(padapter, PS_DENY_JOIN); -+ if (_FAIL == rtw_pwr_wakeup(padapter)) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ -+ if (!padapter->bup) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_buddy_check_fwstate(padapter, WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING)) { -+ RTW_INFO("set ssid, but buddy_intf is under scanning or linking\n"); -+ ret = -EINVAL; -+ goto cancel_ps_deny; -+ } -+#endif -+ authmode = padapter->securitypriv.ndisauthtype; -+ RTW_INFO("=>%s\n", __FUNCTION__); -+ if (wrqu->essid.flags && wrqu->essid.length) { -+ /* Commented by Albert 20100519 */ -+ /* We got the codes in "set_info" function of iwconfig source code. */ -+ /* ========================================= */ -+ /* wrq.u.essid.length = strlen(essid) + 1; */ -+ /* if(we_kernel_version > 20) */ -+ /* wrq.u.essid.length--; */ -+ /* ========================================= */ -+ /* That means, if the WIRELESS_EXT less than or equal to 20, the correct ssid len should subtract 1. */ -+#if WIRELESS_EXT <= 20 -+ len = ((wrqu->essid.length - 1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length - 1) : IW_ESSID_MAX_SIZE; -+#else -+ len = (wrqu->essid.length < IW_ESSID_MAX_SIZE) ? wrqu->essid.length : IW_ESSID_MAX_SIZE; -+#endif -+ -+ if (wrqu->essid.length != 33) -+ RTW_INFO("ssid=%s, len=%d\n", extra, wrqu->essid.length); -+ -+ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); -+ ndis_ssid.SsidLength = len; -+ _rtw_memcpy(ndis_ssid.Ssid, extra, len); -+ src_ssid = ndis_ssid.Ssid; -+ -+ _enter_critical_bh(&queue->lock, &irqL); -+ phead = get_list_head(queue); -+ pmlmepriv->pscanned = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, pmlmepriv->pscanned) == _TRUE) { -+#if 0 -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) { -+ rtw_set_802_11_ssid(padapter, &ndis_ssid); -+ -+ goto cancel_ps_deny; -+ } else { -+ ret = -EINVAL; -+ goto cancel_ps_deny; -+ } -+#endif -+ -+ break; -+ } -+ -+ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); -+ -+ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); -+ -+ dst_ssid = pnetwork->network.Ssid.Ssid; -+ -+ -+ if ((_rtw_memcmp(dst_ssid, src_ssid, ndis_ssid.SsidLength) == _TRUE) && -+ (pnetwork->network.Ssid.SsidLength == ndis_ssid.SsidLength)) { -+ -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) { -+ if (pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode) -+ continue; -+ } -+ -+ if (rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode, 0) == _FALSE) { -+ ret = -1; -+ _exit_critical_bh(&queue->lock, &irqL); -+ goto cancel_ps_deny; -+ } -+ -+ break; -+ } -+ } -+ _exit_critical_bh(&queue->lock, &irqL); -+ rtw_set_802_11_authentication_mode(padapter, authmode); -+ /* set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); */ -+ if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) { -+ ret = -1; -+ goto cancel_ps_deny; -+ } -+ } -+ -+cancel_ps_deny: -+ rtw_ps_deny_cancel(padapter, PS_DENY_JOIN); -+ -+exit: -+ RTW_INFO("<=%s, ret %d\n", __FUNCTION__, ret); -+ -+#ifdef DBG_IOCTL -+ RTW_INFO("DBG_IOCTL %s:%d return %d\n", __FUNCTION__, __LINE__, ret); -+#endif -+ -+ -+ return ret; -+} -+ -+static int rtw_wx_get_essid(struct net_device *dev, -+ struct iw_request_info *a, -+ union iwreq_data *wrqu, char *extra) -+{ -+ u32 len, ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; -+ -+ -+ -+ if ((check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) || -+ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { -+ len = pcur_bss->Ssid.SsidLength; -+ -+ wrqu->essid.length = len; -+ -+ _rtw_memcpy(extra, pcur_bss->Ssid.Ssid, len); -+ -+ wrqu->essid.flags = 1; -+ } else { -+ ret = -1; -+ goto exit; -+ } -+ -+exit: -+ -+ -+ return ret; -+ -+} -+ -+static int rtw_wx_set_rate(struct net_device *dev, -+ struct iw_request_info *a, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+#if 0 -+ int i; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 datarates[NumRates]; -+ u32 target_rate = wrqu->bitrate.value; -+ u32 fixed = wrqu->bitrate.fixed; -+ u32 ratevalue = 0; -+ u8 mpdatarate[NumRates] = {11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0xff}; -+ -+ -+ -+ if (target_rate == -1) { -+ ratevalue = 11; -+ goto set_rate; -+ } -+ target_rate = target_rate / 100000; -+ -+ switch (target_rate) { -+ case 10: -+ ratevalue = 0; -+ break; -+ case 20: -+ ratevalue = 1; -+ break; -+ case 55: -+ ratevalue = 2; -+ break; -+ case 60: -+ ratevalue = 3; -+ break; -+ case 90: -+ ratevalue = 4; -+ break; -+ case 110: -+ ratevalue = 5; -+ break; -+ case 120: -+ ratevalue = 6; -+ break; -+ case 180: -+ ratevalue = 7; -+ break; -+ case 240: -+ ratevalue = 8; -+ break; -+ case 360: -+ ratevalue = 9; -+ break; -+ case 480: -+ ratevalue = 10; -+ break; -+ case 540: -+ ratevalue = 11; -+ break; -+ default: -+ ratevalue = 11; -+ break; -+ } -+ -+set_rate: -+ -+ for (i = 0; i < NumRates; i++) { -+ if (ratevalue == mpdatarate[i]) { -+ datarates[i] = mpdatarate[i]; -+ if (fixed == 0) -+ break; -+ } else -+ datarates[i] = 0xff; -+ -+ } -+ -+ if (rtw_setdatarate_cmd(padapter, datarates) != _SUCCESS) { -+ ret = -1; -+ } -+ -+#endif -+ return ret; -+} -+ -+static int rtw_wx_get_rate(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ u16 max_rate = 0; -+ -+ max_rate = rtw_get_cur_max_rate((_adapter *)rtw_netdev_priv(dev)); -+ -+ if (max_rate == 0) -+ return -EPERM; -+ -+ wrqu->bitrate.fixed = 0; /* no auto select */ -+ wrqu->bitrate.value = max_rate * 100000; -+ -+ return 0; -+} -+ -+static int rtw_wx_set_rts(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ -+ if (wrqu->rts.disabled) -+ padapter->registrypriv.rts_thresh = 2347; -+ else { -+ if (wrqu->rts.value < 0 || -+ wrqu->rts.value > 2347) -+ return -EINVAL; -+ -+ padapter->registrypriv.rts_thresh = wrqu->rts.value; -+ } -+ -+ RTW_INFO("%s, rts_thresh=%d\n", __func__, padapter->registrypriv.rts_thresh); -+ -+ -+ return 0; -+ -+} -+ -+static int rtw_wx_get_rts(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ -+ RTW_INFO("%s, rts_thresh=%d\n", __func__, padapter->registrypriv.rts_thresh); -+ -+ wrqu->rts.value = padapter->registrypriv.rts_thresh; -+ wrqu->rts.fixed = 0; /* no auto select */ -+ /* wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD); */ -+ -+ -+ return 0; -+} -+ -+static int rtw_wx_set_frag(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ -+ if (wrqu->frag.disabled) -+ padapter->xmitpriv.frag_len = MAX_FRAG_THRESHOLD; -+ else { -+ if (wrqu->frag.value < MIN_FRAG_THRESHOLD || -+ wrqu->frag.value > MAX_FRAG_THRESHOLD) -+ return -EINVAL; -+ -+ padapter->xmitpriv.frag_len = wrqu->frag.value & ~0x1; -+ } -+ -+ RTW_INFO("%s, frag_len=%d\n", __func__, padapter->xmitpriv.frag_len); -+ -+ -+ return 0; -+ -+} -+ -+static int rtw_wx_get_frag(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ -+ RTW_INFO("%s, frag_len=%d\n", __func__, padapter->xmitpriv.frag_len); -+ -+ wrqu->frag.value = padapter->xmitpriv.frag_len; -+ wrqu->frag.fixed = 0; /* no auto select */ -+ /* wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD); */ -+ -+ -+ return 0; -+} -+ -+static int rtw_wx_get_retry(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ /* _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); */ -+ -+ -+ wrqu->retry.value = 7; -+ wrqu->retry.fixed = 0; /* no auto select */ -+ wrqu->retry.disabled = 1; -+ -+ return 0; -+ -+} -+ -+#if 0 -+ #define IW_ENCODE_INDEX 0x00FF /* Token index (if needed) */ -+ #define IW_ENCODE_FLAGS 0xFF00 /* Flags defined below */ -+ #define IW_ENCODE_MODE 0xF000 /* Modes defined below */ -+ #define IW_ENCODE_DISABLED 0x8000 /* Encoding disabled */ -+ #define IW_ENCODE_ENABLED 0x0000 /* Encoding enabled */ -+ #define IW_ENCODE_RESTRICTED 0x4000 /* Refuse non-encoded packets */ -+ #define IW_ENCODE_OPEN 0x2000 /* Accept non-encoded packets */ -+ #define IW_ENCODE_NOKEY 0x0800 /* Key is write only, so not present */ -+ #define IW_ENCODE_TEMP 0x0400 /* Temporary key */ -+ /* -+ iwconfig wlan0 key on->flags = 0x6001->maybe it means auto -+ iwconfig wlan0 key off->flags = 0x8800 -+ iwconfig wlan0 key open->flags = 0x2800 -+ iwconfig wlan0 key open 1234567890->flags = 0x2000 -+ iwconfig wlan0 key restricted->flags = 0x4800 -+ iwconfig wlan0 key open [3] 1234567890->flags = 0x2003 -+ iwconfig wlan0 key restricted [2] 1234567890->flags = 0x4002 -+ iwconfig wlan0 key open [3] -> flags = 0x2803 -+ iwconfig wlan0 key restricted [2] -> flags = 0x4802 -+ */ -+#endif -+ -+static int rtw_wx_set_enc(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *keybuf) -+{ -+ u32 key, ret = 0; -+ u32 keyindex_provided; -+ NDIS_802_11_WEP wep; -+ NDIS_802_11_AUTHENTICATION_MODE authmode; -+ -+ struct iw_point *erq = &(wrqu->encoding); -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ RTW_INFO("+rtw_wx_set_enc, flags=0x%x\n", erq->flags); -+ -+ _rtw_memset(&wep, 0, sizeof(NDIS_802_11_WEP)); -+ -+ key = erq->flags & IW_ENCODE_INDEX; -+ -+ -+ if (erq->flags & IW_ENCODE_DISABLED) { -+ RTW_INFO("EncryptionDisabled\n"); -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ padapter->securitypriv.dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ padapter->securitypriv.dot118021XGrpPrivacy = _NO_PRIVACY_; -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open; /* open system */ -+ authmode = Ndis802_11AuthModeOpen; -+ padapter->securitypriv.ndisauthtype = authmode; -+ -+ goto exit; -+ } -+ -+ if (key) { -+ if (key > WEP_KEYS) -+ return -EINVAL; -+ key--; -+ keyindex_provided = 1; -+ } else { -+ keyindex_provided = 0; -+ key = padapter->securitypriv.dot11PrivacyKeyIndex; -+ RTW_INFO("rtw_wx_set_enc, key=%d\n", key); -+ } -+ -+ /* set authentication mode */ -+ if (erq->flags & IW_ENCODE_OPEN) { -+ RTW_INFO("rtw_wx_set_enc():IW_ENCODE_OPEN\n"); -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;/* Ndis802_11EncryptionDisabled; */ -+ -+#ifdef CONFIG_PLATFORM_MT53XX -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; -+#else -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open; -+#endif -+ -+ padapter->securitypriv.dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ padapter->securitypriv.dot118021XGrpPrivacy = _NO_PRIVACY_; -+ authmode = Ndis802_11AuthModeOpen; -+ padapter->securitypriv.ndisauthtype = authmode; -+ } else if (erq->flags & IW_ENCODE_RESTRICTED) { -+ RTW_INFO("rtw_wx_set_enc():IW_ENCODE_RESTRICTED\n"); -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ -+#ifdef CONFIG_PLATFORM_MT53XX -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; -+#else -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; -+#endif -+ -+ padapter->securitypriv.dot11PrivacyAlgrthm = _WEP40_; -+ padapter->securitypriv.dot118021XGrpPrivacy = _WEP40_; -+ authmode = Ndis802_11AuthModeShared; -+ padapter->securitypriv.ndisauthtype = authmode; -+ } else { -+ RTW_INFO("rtw_wx_set_enc():erq->flags=0x%x\n", erq->flags); -+ -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;/* Ndis802_11EncryptionDisabled; */ -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open; /* open system */ -+ padapter->securitypriv.dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ padapter->securitypriv.dot118021XGrpPrivacy = _NO_PRIVACY_; -+ authmode = Ndis802_11AuthModeOpen; -+ padapter->securitypriv.ndisauthtype = authmode; -+ } -+ -+ wep.KeyIndex = key; -+ if (erq->length > 0) { -+ wep.KeyLength = erq->length <= 5 ? 5 : 13; -+ -+ wep.Length = wep.KeyLength + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); -+ } else { -+ wep.KeyLength = 0 ; -+ -+ if (keyindex_provided == 1) { /* set key_id only, no given KeyMaterial(erq->length==0). */ -+ padapter->securitypriv.dot11PrivacyKeyIndex = key; -+ -+ RTW_INFO("(keyindex_provided == 1), keyid=%d, key_len=%d\n", key, padapter->securitypriv.dot11DefKeylen[key]); -+ -+ switch (padapter->securitypriv.dot11DefKeylen[key]) { -+ case 5: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _WEP40_; -+ break; -+ case 13: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _WEP104_; -+ break; -+ default: -+ padapter->securitypriv.dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ break; -+ } -+ -+ goto exit; -+ -+ } -+ -+ } -+ -+ wep.KeyIndex |= 0x80000000; -+ -+ _rtw_memcpy(wep.KeyMaterial, keybuf, wep.KeyLength); -+ -+ if (rtw_set_802_11_add_wep(padapter, &wep) == _FALSE) { -+ if (rf_on == pwrpriv->rf_pwrstate) -+ ret = -EOPNOTSUPP; -+ goto exit; -+ } -+ -+exit: -+ -+ -+ return ret; -+ -+} -+ -+static int rtw_wx_get_enc(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *keybuf) -+{ -+ uint key, ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct iw_point *erq = &(wrqu->encoding); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) != _TRUE) { -+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE) { -+ erq->length = 0; -+ erq->flags |= IW_ENCODE_DISABLED; -+ return 0; -+ } -+ } -+ -+ -+ key = erq->flags & IW_ENCODE_INDEX; -+ -+ if (key) { -+ if (key > WEP_KEYS) -+ return -EINVAL; -+ key--; -+ } else -+ key = padapter->securitypriv.dot11PrivacyKeyIndex; -+ -+ erq->flags = key + 1; -+ -+ /* if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeOpen) */ -+ /* { */ -+ /* erq->flags |= IW_ENCODE_OPEN; */ -+ /* } */ -+ -+ switch (padapter->securitypriv.ndisencryptstatus) { -+ case Ndis802_11EncryptionNotSupported: -+ case Ndis802_11EncryptionDisabled: -+ -+ erq->length = 0; -+ erq->flags |= IW_ENCODE_DISABLED; -+ -+ break; -+ -+ case Ndis802_11Encryption1Enabled: -+ -+ erq->length = padapter->securitypriv.dot11DefKeylen[key]; -+ -+ if (erq->length) { -+ _rtw_memcpy(keybuf, padapter->securitypriv.dot11DefKey[key].skey, padapter->securitypriv.dot11DefKeylen[key]); -+ -+ erq->flags |= IW_ENCODE_ENABLED; -+ -+ if (padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeOpen) -+ erq->flags |= IW_ENCODE_OPEN; -+ else if (padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeShared) -+ erq->flags |= IW_ENCODE_RESTRICTED; -+ } else { -+ erq->length = 0; -+ erq->flags |= IW_ENCODE_DISABLED; -+ } -+ -+ break; -+ -+ case Ndis802_11Encryption2Enabled: -+ case Ndis802_11Encryption3Enabled: -+ -+ erq->length = 16; -+ erq->flags |= (IW_ENCODE_ENABLED | IW_ENCODE_OPEN | IW_ENCODE_NOKEY); -+ -+ break; -+ -+ default: -+ erq->length = 0; -+ erq->flags |= IW_ENCODE_DISABLED; -+ -+ break; -+ -+ } -+ -+ -+ return ret; -+ -+} -+ -+static int rtw_wx_get_power(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ /* _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); */ -+ -+ wrqu->power.value = 0; -+ wrqu->power.fixed = 0; /* no auto select */ -+ wrqu->power.disabled = 1; -+ -+ return 0; -+ -+} -+ -+static int rtw_wx_set_gen_ie(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ ret = rtw_set_wpa_ie(padapter, extra, wrqu->data.length); -+ -+ return ret; -+} -+ -+static int rtw_wx_set_auth(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct iw_param *param = (struct iw_param *)&(wrqu->param); -+#ifdef CONFIG_WAPI_SUPPORT -+#ifndef CONFIG_IOCTL_CFG80211 -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ u32 value = param->value; -+#endif -+#endif -+ int ret = 0; -+ -+ switch (param->flags & IW_AUTH_INDEX) { -+ -+ case IW_AUTH_WPA_VERSION: -+#ifdef CONFIG_WAPI_SUPPORT -+#ifndef CONFIG_IOCTL_CFG80211 -+ padapter->wapiInfo.bWapiEnable = false; -+ if (value == IW_AUTH_WAPI_VERSION_1) { -+ padapter->wapiInfo.bWapiEnable = true; -+ psecuritypriv->dot11PrivacyAlgrthm = _SMS4_; -+ psecuritypriv->dot118021XGrpPrivacy = _SMS4_; -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_WAPI; -+ pmlmeinfo->auth_algo = psecuritypriv->dot11AuthAlgrthm; -+ padapter->wapiInfo.extra_prefix_len = WAPI_EXT_LEN; -+ padapter->wapiInfo.extra_postfix_len = SMS4_MIC_LEN; -+ } -+#endif -+#endif -+ break; -+ case IW_AUTH_CIPHER_PAIRWISE: -+ -+ break; -+ case IW_AUTH_CIPHER_GROUP: -+ -+ break; -+ case IW_AUTH_KEY_MGMT: -+#ifdef CONFIG_WAPI_SUPPORT -+#ifndef CONFIG_IOCTL_CFG80211 -+ RTW_INFO("rtw_wx_set_auth: IW_AUTH_KEY_MGMT case\n"); -+ if (value == IW_AUTH_KEY_MGMT_WAPI_PSK) -+ padapter->wapiInfo.bWapiPSK = true; -+ else -+ padapter->wapiInfo.bWapiPSK = false; -+ RTW_INFO("rtw_wx_set_auth: IW_AUTH_KEY_MGMT bwapipsk %d\n", padapter->wapiInfo.bWapiPSK); -+#endif -+#endif -+ /* -+ * ??? does not use these parameters -+ */ -+ break; -+ -+ case IW_AUTH_TKIP_COUNTERMEASURES: { -+ if (param->value) { -+ /* wpa_supplicant is enabling the tkip countermeasure. */ -+ padapter->securitypriv.btkip_countermeasure = _TRUE; -+ } else { -+ /* wpa_supplicant is disabling the tkip countermeasure. */ -+ padapter->securitypriv.btkip_countermeasure = _FALSE; -+ } -+ break; -+ } -+ case IW_AUTH_DROP_UNENCRYPTED: { -+ /* HACK: -+ * -+ * wpa_supplicant calls set_wpa_enabled when the driver -+ * is loaded and unloaded, regardless of if WPA is being -+ * used. No other calls are made which can be used to -+ * determine if encryption will be used or not prior to -+ * association being expected. If encryption is not being -+ * used, drop_unencrypted is set to false, else true -- we -+ * can use this to determine if the CAP_PRIVACY_ON bit should -+ * be set. -+ */ -+ -+ if (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption1Enabled) { -+ break;/* it means init value, or using wep, ndisencryptstatus = Ndis802_11Encryption1Enabled, */ -+ /* then it needn't reset it; */ -+ } -+ -+ if (param->value) { -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ padapter->securitypriv.dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ padapter->securitypriv.dot118021XGrpPrivacy = _NO_PRIVACY_; -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open; /* open system */ -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; -+ } -+ -+ break; -+ } -+ -+ case IW_AUTH_80211_AUTH_ALG: -+ -+#if defined(CONFIG_RTW_ANDROID) || 1 -+ /* -+ * It's the starting point of a link layer connection using wpa_supplicant -+ */ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) { -+ LeaveAllPowerSaveMode(padapter); -+ rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK); -+ RTW_INFO("%s...call rtw_indicate_disconnect\n ", __FUNCTION__); -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ rtw_free_assoc_resources_cmd(padapter, _TRUE, RTW_CMDF_WAIT_ACK); -+ } -+#endif -+ -+ -+ ret = wpa_set_auth_algs(dev, (u32)param->value); -+ -+ break; -+ -+ case IW_AUTH_WPA_ENABLED: -+ -+ /* if(param->value) */ -+ /* padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; */ /* 802.1x */ -+ /* else */ -+ /* padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open; */ /* open system */ -+ -+ /* _disassociate(priv); */ -+ -+ break; -+ -+ case IW_AUTH_RX_UNENCRYPTED_EAPOL: -+ /* ieee->ieee802_1x = param->value; */ -+ break; -+ -+ case IW_AUTH_PRIVACY_INVOKED: -+ /* ieee->privacy_invoked = param->value; */ -+ break; -+ -+#ifdef CONFIG_WAPI_SUPPORT -+#ifndef CONFIG_IOCTL_CFG80211 -+ case IW_AUTH_WAPI_ENABLED: -+ break; -+#endif -+#endif -+ -+ default: -+ return -EOPNOTSUPP; -+ -+ } -+ -+ return ret; -+ -+} -+ -+static int rtw_wx_set_enc_ext(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ char *alg_name; -+ u32 param_len; -+ struct ieee_param *param = NULL; -+ struct iw_point *pencoding = &wrqu->encoding; -+ struct iw_encode_ext *pext = (struct iw_encode_ext *)extra; -+ int ret = 0; -+ -+ param_len = sizeof(struct ieee_param) + pext->key_len; -+ param = (struct ieee_param *)rtw_malloc(param_len); -+ if (param == NULL) -+ return -1; -+ -+ _rtw_memset(param, 0, param_len); -+ -+ param->cmd = IEEE_CMD_SET_ENCRYPTION; -+ _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); -+ -+ -+ switch (pext->alg) { -+ case IW_ENCODE_ALG_NONE: -+ /* todo: remove key */ -+ /* remove = 1; */ -+ alg_name = "none"; -+ break; -+ case IW_ENCODE_ALG_WEP: -+ alg_name = "WEP"; -+ break; -+ case IW_ENCODE_ALG_TKIP: -+ alg_name = "TKIP"; -+ break; -+ case IW_ENCODE_ALG_CCMP: -+ alg_name = "CCMP"; -+ break; -+#ifdef CONFIG_IEEE80211W -+ case IW_ENCODE_ALG_AES_CMAC: -+ alg_name = "BIP"; -+ break; -+#endif /* CONFIG_IEEE80211W */ -+#ifdef CONFIG_WAPI_SUPPORT -+#ifndef CONFIG_IOCTL_CFG80211 -+ case IW_ENCODE_ALG_SM4: -+ alg_name = "SMS4"; -+ _rtw_memcpy(param->sta_addr, pext->addr.sa_data, ETH_ALEN); -+ RTW_INFO("rtw_wx_set_enc_ext: SMS4 case\n"); -+ break; -+#endif -+#endif -+ default: -+ ret = -1; -+ goto exit; -+ } -+ -+ strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); -+ -+ if (pext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) -+ param->u.crypt.set_tx = 1; -+ -+ /* cliW: WEP does not have group key -+ * just not checking GROUP key setting -+ */ -+ if ((pext->alg != IW_ENCODE_ALG_WEP) && -+ ((pext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) -+#ifdef CONFIG_IEEE80211W -+ || (pext->ext_flags & IW_ENCODE_ALG_AES_CMAC) -+#endif /* CONFIG_IEEE80211W */ -+ )) -+ param->u.crypt.set_tx = 0; -+ -+ param->u.crypt.idx = (pencoding->flags & 0x00FF) - 1 ; -+ -+ if (pext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) { -+#ifdef CONFIG_WAPI_SUPPORT -+#ifndef CONFIG_IOCTL_CFG80211 -+ if (pext->alg == IW_ENCODE_ALG_SM4) -+ _rtw_memcpy(param->u.crypt.seq, pext->rx_seq, 16); -+ else -+#endif /* CONFIG_IOCTL_CFG80211 */ -+#endif /* CONFIG_WAPI_SUPPORT */ -+ _rtw_memcpy(param->u.crypt.seq, pext->rx_seq, 8); -+ } -+ -+ if (pext->key_len) { -+ param->u.crypt.key_len = pext->key_len; -+ /* _rtw_memcpy(param + 1, pext + 1, pext->key_len); */ -+ _rtw_memcpy(param->u.crypt.key, pext + 1, pext->key_len); -+ } -+ -+ if (pencoding->flags & IW_ENCODE_DISABLED) { -+ /* todo: remove key */ -+ /* remove = 1; */ -+ } -+ -+ ret = wpa_set_encryption(dev, param, param_len); -+ -+exit: -+ if (param) -+ rtw_mfree((u8 *)param, param_len); -+ -+ return ret; -+} -+ -+ -+static int rtw_wx_get_nick(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ /* _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); */ -+ /* struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); */ -+ /* struct security_priv *psecuritypriv = &padapter->securitypriv; */ -+ -+ if (extra) { -+ wrqu->data.length = 14; -+ wrqu->data.flags = 1; -+ _rtw_memcpy(extra, "", 14); -+ } -+ -+ /* rtw_signal_process(pid, SIGUSR1); */ /* for test */ -+ -+ /* dump debug info here */ -+#if 0 -+ u32 dot11AuthAlgrthm; /* 802.11 auth, could be open, shared, and 8021x */ -+ u32 dot11PrivacyAlgrthm; /* This specify the privacy for shared auth. algorithm. */ -+ u32 dot118021XGrpPrivacy; /* This specify the privacy algthm. used for Grp key */ -+ u32 ndisauthtype; -+ u32 ndisencryptstatus; -+#endif -+ -+ /* RTW_INFO("auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", */ -+ /* psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, */ -+ /* psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); */ -+ -+ /* RTW_INFO("enc_alg=0x%x\n", psecuritypriv->dot11PrivacyAlgrthm); */ -+ /* RTW_INFO("auth_type=0x%x\n", psecuritypriv->ndisauthtype); */ -+ /* RTW_INFO("enc_type=0x%x\n", psecuritypriv->ndisencryptstatus); */ -+ -+#if 0 -+ RTW_INFO("dbg(0x210)=0x%x\n", rtw_read32(padapter, 0x210)); -+ RTW_INFO("dbg(0x608)=0x%x\n", rtw_read32(padapter, 0x608)); -+ RTW_INFO("dbg(0x280)=0x%x\n", rtw_read32(padapter, 0x280)); -+ RTW_INFO("dbg(0x284)=0x%x\n", rtw_read32(padapter, 0x284)); -+ RTW_INFO("dbg(0x288)=0x%x\n", rtw_read32(padapter, 0x288)); -+ -+ RTW_INFO("dbg(0x664)=0x%x\n", rtw_read32(padapter, 0x664)); -+ -+ -+ RTW_INFO("\n"); -+ -+ RTW_INFO("dbg(0x430)=0x%x\n", rtw_read32(padapter, 0x430)); -+ RTW_INFO("dbg(0x438)=0x%x\n", rtw_read32(padapter, 0x438)); -+ -+ RTW_INFO("dbg(0x440)=0x%x\n", rtw_read32(padapter, 0x440)); -+ -+ RTW_INFO("dbg(0x458)=0x%x\n", rtw_read32(padapter, 0x458)); -+ -+ RTW_INFO("dbg(0x484)=0x%x\n", rtw_read32(padapter, 0x484)); -+ RTW_INFO("dbg(0x488)=0x%x\n", rtw_read32(padapter, 0x488)); -+ -+ RTW_INFO("dbg(0x444)=0x%x\n", rtw_read32(padapter, 0x444)); -+ RTW_INFO("dbg(0x448)=0x%x\n", rtw_read32(padapter, 0x448)); -+ RTW_INFO("dbg(0x44c)=0x%x\n", rtw_read32(padapter, 0x44c)); -+ RTW_INFO("dbg(0x450)=0x%x\n", rtw_read32(padapter, 0x450)); -+#endif -+ -+ return 0; -+ -+} -+#endif -+ -+static int rtw_wx_read32(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter; -+ struct iw_point *p; -+ u16 len; -+ u32 addr; -+ u32 data32; -+ u32 bytes; -+ u8 *ptmp; -+ int ret; -+ -+ -+ ret = 0; -+ padapter = (PADAPTER)rtw_netdev_priv(dev); -+ p = &wrqu->data; -+ len = p->length; -+ if (0 == len) -+ return -EINVAL; -+ -+ ptmp = (u8 *)rtw_malloc(len); -+ if (NULL == ptmp) -+ return -ENOMEM; -+ -+ if (copy_from_user(ptmp, p->pointer, len)) { -+ ret = -EFAULT; -+ goto exit; -+ } -+ -+ bytes = 0; -+ addr = 0; -+ sscanf(ptmp, "%d,%x", &bytes, &addr); -+ -+ switch (bytes) { -+ case 1: -+ data32 = rtw_read8(padapter, addr); -+ sprintf(extra, "0x%02X", data32); -+ break; -+ case 2: -+ data32 = rtw_read16(padapter, addr); -+ sprintf(extra, "0x%04X", data32); -+ break; -+ case 4: -+ data32 = rtw_read32(padapter, addr); -+ sprintf(extra, "0x%08X", data32); -+ break; -+ -+ #if defined(CONFIG_SDIO_HCI) && defined(CONFIG_SDIO_INDIRECT_ACCESS) && defined(DBG_SDIO_INDIRECT_ACCESS) -+ case 11: -+ data32 = rtw_sd_iread8(padapter, addr); -+ sprintf(extra, "0x%02X", data32); -+ break; -+ case 12: -+ data32 = rtw_sd_iread16(padapter, addr); -+ sprintf(extra, "0x%04X", data32); -+ break; -+ case 14: -+ data32 = rtw_sd_iread32(padapter, addr); -+ sprintf(extra, "0x%08X", data32); -+ break; -+ #endif -+ default: -+ RTW_INFO("%s: usage> read [bytes],[address(hex)]\n", __func__); -+ ret = -EINVAL; -+ goto exit; -+ } -+ RTW_INFO("%s: addr=0x%08X data=%s\n", __func__, addr, extra); -+ -+exit: -+ rtw_mfree(ptmp, len); -+ -+ return 0; -+} -+ -+static int rtw_wx_write32(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); -+ -+ u32 addr; -+ u32 data32; -+ u32 bytes; -+ -+ -+ bytes = 0; -+ addr = 0; -+ data32 = 0; -+ sscanf(extra, "%d,%x,%x", &bytes, &addr, &data32); -+ -+ switch (bytes) { -+ case 1: -+ rtw_write8(padapter, addr, (u8)data32); -+ RTW_INFO("%s: addr=0x%08X data=0x%02X\n", __func__, addr, (u8)data32); -+ break; -+ case 2: -+ rtw_write16(padapter, addr, (u16)data32); -+ RTW_INFO("%s: addr=0x%08X data=0x%04X\n", __func__, addr, (u16)data32); -+ break; -+ case 4: -+ rtw_write32(padapter, addr, data32); -+ RTW_INFO("%s: addr=0x%08X data=0x%08X\n", __func__, addr, data32); -+ break; -+ default: -+ RTW_INFO("%s: usage> write [bytes],[address(hex)],[data(hex)]\n", __func__); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int rtw_wx_read_rf(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u32 path, addr, data32; -+ -+ -+ path = *(u32 *)extra; -+ addr = *((u32 *)extra + 1); -+ data32 = rtw_hal_read_rfreg(padapter, path, addr, 0xFFFFF); -+ /* RTW_INFO("%s: path=%d addr=0x%02x data=0x%05x\n", __func__, path, addr, data32); */ -+ /* -+ * IMPORTANT!! -+ * Only when wireless private ioctl is at odd order, -+ * "extra" would be copied to user space. -+ */ -+ sprintf(extra, "0x%05x", data32); -+ -+ return 0; -+} -+ -+static int rtw_wx_write_rf(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u32 path, addr, data32; -+ -+ -+ path = *(u32 *)extra; -+ addr = *((u32 *)extra + 1); -+ data32 = *((u32 *)extra + 2); -+ /* RTW_INFO("%s: path=%d addr=0x%02x data=0x%05x\n", __func__, path, addr, data32); */ -+ rtw_hal_write_rfreg(padapter, path, addr, 0xFFFFF, data32); -+ -+ return 0; -+} -+ -+static int rtw_wx_priv_null(struct net_device *dev, struct iw_request_info *a, -+ union iwreq_data *wrqu, char *b) -+{ -+ return -1; -+} -+ -+#ifdef CONFIG_RTW_80211K -+extern void rm_dbg_cmd(_adapter *padapter, char *s); -+static int rtw_wx_priv_rrm(struct net_device *dev, struct iw_request_info *a, -+ union iwreq_data *wrqu, char *b) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u32 path, addr, data32; -+ -+ -+ rm_dbg_cmd(padapter, b); -+ wrqu->data.length = strlen(b); -+ -+ return 0; -+} -+#endif -+ -+#ifdef CONFIG_IOCTL_WEXT -+static int dummy(struct net_device *dev, struct iw_request_info *a, -+ union iwreq_data *wrqu, char *b) -+{ -+ /* _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); */ -+ /* struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); */ -+ -+ /* RTW_INFO("cmd_code=%x, fwstate=0x%x\n", a->cmd, get_fwstate(pmlmepriv)); */ -+ -+ return -1; -+ -+} -+#endif -+ -+static int rtw_wx_set_channel_plan(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 channel_plan_req = (u8)(*((int *)wrqu)); -+ -+ if (_SUCCESS != rtw_set_channel_plan(padapter, channel_plan_req)) -+ return -EPERM; -+ -+ return 0; -+} -+ -+static int rtw_wx_set_mtk_wps_probe_ie(struct net_device *dev, -+ struct iw_request_info *a, -+ union iwreq_data *wrqu, char *b) -+{ -+#ifdef CONFIG_PLATFORM_MT53XX -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+#endif -+ return 0; -+} -+ -+static int rtw_wx_get_sensitivity(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *buf) -+{ -+#ifdef CONFIG_PLATFORM_MT53XX -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ /* Modified by Albert 20110914 */ -+ /* This is in dbm format for MTK platform. */ -+ wrqu->qual.level = padapter->recvpriv.rssi; -+ RTW_INFO(" level = %u\n", wrqu->qual.level); -+#endif -+ return 0; -+} -+ -+static int rtw_wx_set_mtk_wps_ie(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+#ifdef CONFIG_PLATFORM_MT53XX -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ return rtw_set_wpa_ie(padapter, wrqu->data.pointer, wrqu->data.length); -+#else -+ return 0; -+#endif -+} -+ -+#ifdef MP_IOCTL_HDL -+static void rtw_dbg_mode_hdl(_adapter *padapter, u32 id, u8 *pdata, u32 len) -+{ -+ pRW_Reg RegRWStruct; -+ struct rf_reg_param *prfreg; -+ u8 path; -+ u8 offset; -+ u32 value; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ switch (id) { -+ case GEN_MP_IOCTL_SUBCODE(MP_START): -+ RTW_INFO("871x_driver is only for normal mode, can't enter mp mode\n"); -+ break; -+ case GEN_MP_IOCTL_SUBCODE(READ_REG): -+ RegRWStruct = (pRW_Reg)pdata; -+ switch (RegRWStruct->width) { -+ case 1: -+ RegRWStruct->value = rtw_read8(padapter, RegRWStruct->offset); -+ break; -+ case 2: -+ RegRWStruct->value = rtw_read16(padapter, RegRWStruct->offset); -+ break; -+ case 4: -+ RegRWStruct->value = rtw_read32(padapter, RegRWStruct->offset); -+ break; -+ default: -+ break; -+ } -+ -+ break; -+ case GEN_MP_IOCTL_SUBCODE(WRITE_REG): -+ RegRWStruct = (pRW_Reg)pdata; -+ switch (RegRWStruct->width) { -+ case 1: -+ rtw_write8(padapter, RegRWStruct->offset, (u8)RegRWStruct->value); -+ break; -+ case 2: -+ rtw_write16(padapter, RegRWStruct->offset, (u16)RegRWStruct->value); -+ break; -+ case 4: -+ rtw_write32(padapter, RegRWStruct->offset, (u32)RegRWStruct->value); -+ break; -+ default: -+ break; -+ } -+ -+ break; -+ case GEN_MP_IOCTL_SUBCODE(READ_RF_REG): -+ -+ prfreg = (struct rf_reg_param *)pdata; -+ -+ path = (u8)prfreg->path; -+ offset = (u8)prfreg->offset; -+ -+ value = rtw_hal_read_rfreg(padapter, path, offset, 0xffffffff); -+ -+ prfreg->value = value; -+ -+ break; -+ case GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG): -+ -+ prfreg = (struct rf_reg_param *)pdata; -+ -+ path = (u8)prfreg->path; -+ offset = (u8)prfreg->offset; -+ value = prfreg->value; -+ -+ rtw_hal_write_rfreg(padapter, path, offset, 0xffffffff, value); -+ -+ break; -+ case GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO): -+ RTW_INFO("==> trigger gpio 0\n"); -+ rtw_hal_set_hwreg(padapter, HW_VAR_TRIGGER_GPIO_0, 0); -+ break; -+#ifdef CONFIG_BT_COEXIST -+ case GEN_MP_IOCTL_SUBCODE(SET_DM_BT): -+ RTW_INFO("==> set dm_bt_coexist:%x\n", *(u8 *)pdata); -+ rtw_hal_set_hwreg(padapter, HW_VAR_BT_SET_COEXIST, pdata); -+ break; -+ case GEN_MP_IOCTL_SUBCODE(DEL_BA): -+ RTW_INFO("==> delete ba:%x\n", *(u8 *)pdata); -+ rtw_hal_set_hwreg(padapter, HW_VAR_BT_ISSUE_DELBA, pdata); -+ break; -+#endif -+#ifdef DBG_CONFIG_ERROR_DETECT -+ case GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS): -+ *pdata = rtw_hal_sreset_get_wifi_status(padapter); -+ break; -+#endif -+ -+ default: -+ break; -+ } -+ -+} -+static int rtw_mp_ioctl_hdl(struct net_device *dev, struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ u32 BytesRead, BytesWritten, BytesNeeded; -+ struct oid_par_priv oid_par; -+ struct mp_ioctl_handler *phandler; -+ struct mp_ioctl_param *poidparam; -+ uint status = 0; -+ u16 len; -+ u8 *pparmbuf = NULL, bset; -+ PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); -+ struct iw_point *p = &wrqu->data; -+ -+ /* RTW_INFO("+rtw_mp_ioctl_hdl\n"); */ -+ -+ /* mutex_lock(&ioctl_mutex); */ -+ -+ if ((!p->length) || (!p->pointer)) { -+ ret = -EINVAL; -+ goto _rtw_mp_ioctl_hdl_exit; -+ } -+ -+ pparmbuf = NULL; -+ bset = (u8)(p->flags & 0xFFFF); -+ len = p->length; -+ pparmbuf = (u8 *)rtw_malloc(len); -+ if (pparmbuf == NULL) { -+ ret = -ENOMEM; -+ goto _rtw_mp_ioctl_hdl_exit; -+ } -+ -+ if (copy_from_user(pparmbuf, p->pointer, len)) { -+ ret = -EFAULT; -+ goto _rtw_mp_ioctl_hdl_exit; -+ } -+ -+ poidparam = (struct mp_ioctl_param *)pparmbuf; -+ -+ if (poidparam->subcode >= MAX_MP_IOCTL_SUBCODE) { -+ ret = -EINVAL; -+ goto _rtw_mp_ioctl_hdl_exit; -+ } -+ -+ /* RTW_INFO("%s: %d\n", __func__, poidparam->subcode); */ -+#ifdef CONFIG_MP_INCLUDED -+ if (padapter->registrypriv.mp_mode == 1) { -+ phandler = mp_ioctl_hdl + poidparam->subcode; -+ -+ if ((phandler->paramsize != 0) && (poidparam->len < phandler->paramsize)) { -+ ret = -EINVAL; -+ goto _rtw_mp_ioctl_hdl_exit; -+ } -+ -+ if (phandler->handler) { -+ oid_par.adapter_context = padapter; -+ oid_par.oid = phandler->oid; -+ oid_par.information_buf = poidparam->data; -+ oid_par.information_buf_len = poidparam->len; -+ oid_par.dbg = 0; -+ -+ BytesWritten = 0; -+ BytesNeeded = 0; -+ -+ if (bset) { -+ oid_par.bytes_rw = &BytesRead; -+ oid_par.bytes_needed = &BytesNeeded; -+ oid_par.type_of_oid = SET_OID; -+ } else { -+ oid_par.bytes_rw = &BytesWritten; -+ oid_par.bytes_needed = &BytesNeeded; -+ oid_par.type_of_oid = QUERY_OID; -+ } -+ -+ status = phandler->handler(&oid_par); -+ -+ /* todo:check status, BytesNeeded, etc. */ -+ } else { -+ RTW_INFO("rtw_mp_ioctl_hdl(): err!, subcode=%d, oid=%d, handler=%p\n", -+ poidparam->subcode, phandler->oid, phandler->handler); -+ ret = -EFAULT; -+ goto _rtw_mp_ioctl_hdl_exit; -+ } -+ } else -+#endif -+ { -+ rtw_dbg_mode_hdl(padapter, poidparam->subcode, poidparam->data, poidparam->len); -+ } -+ -+ if (bset == 0x00) {/* query info */ -+ if (copy_to_user(p->pointer, pparmbuf, len)) -+ ret = -EFAULT; -+ } -+ -+ if (status) { -+ ret = -EFAULT; -+ goto _rtw_mp_ioctl_hdl_exit; -+ } -+ -+_rtw_mp_ioctl_hdl_exit: -+ -+ if (pparmbuf) -+ rtw_mfree(pparmbuf, len); -+ -+ /* mutex_unlock(&ioctl_mutex); */ -+ -+ return ret; -+} -+#endif /*MP_IOCTL_HDL*/ -+static int rtw_get_ap_info(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ u32 cnt = 0, wpa_ielen; -+ _irqL irqL; -+ _list *plist, *phead; -+ unsigned char *pbuf; -+ u8 bssid[ETH_ALEN]; -+ char data[32]; -+ struct wlan_network *pnetwork = NULL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct iw_point *pdata = &wrqu->data; -+ -+ RTW_INFO("+rtw_get_aplist_info\n"); -+ -+ if (rtw_is_drv_stopped(padapter) || (pdata == NULL)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ while ((check_fwstate(pmlmepriv, (WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING))) == _TRUE) { -+ rtw_msleep_os(30); -+ cnt++; -+ if (cnt > 100) -+ break; -+ } -+ -+ -+ /* pdata->length = 0; */ /* ? */ -+ pdata->flags = 0; -+ if (pdata->length >= 32) { -+ if (copy_from_user(data, pdata->pointer, 32)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } else { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ if (hwaddr_aton_i(data, bssid)) { -+ RTW_INFO("Invalid BSSID '%s'.\n", (u8 *)data); -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ return -EINVAL; -+ } -+ -+ -+ if (_rtw_memcmp(bssid, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE) { /* BSSID match, then check if supporting wpa/wpa2 */ -+ RTW_INFO("BSSID:" MAC_FMT "\n", MAC_ARG(bssid)); -+ -+ pbuf = rtw_get_wpa_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength - 12); -+ if (pbuf && (wpa_ielen > 0)) { -+ pdata->flags = 1; -+ break; -+ } -+ -+ pbuf = rtw_get_wpa2_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength - 12); -+ if (pbuf && (wpa_ielen > 0)) { -+ pdata->flags = 2; -+ break; -+ } -+ -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ if (pdata->length >= 34) { -+ if (copy_to_user((u8 *)pdata->pointer + 32, (u8 *)&pdata->flags, 1)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } -+ -+exit: -+ -+ return ret; -+ -+} -+ -+static int rtw_set_pid(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = rtw_netdev_priv(dev); -+ int *pdata = (int *)wrqu; -+ int selector; -+ -+ if (rtw_is_drv_stopped(padapter) || (pdata == NULL)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ selector = *pdata; -+ if (selector < 3 && selector >= 0) { -+ padapter->pid[selector] = *(pdata + 1); -+#ifdef CONFIG_GLOBAL_UI_PID -+ ui_pid[selector] = *(pdata + 1); -+#endif -+ RTW_INFO("%s set pid[%d]=%d\n", __FUNCTION__, selector , padapter->pid[selector]); -+ } else -+ RTW_INFO("%s selector %d error\n", __FUNCTION__, selector); -+ -+exit: -+ -+ return ret; -+ -+} -+ -+static int rtw_wps_start(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct iw_point *pdata = &wrqu->data; -+ u32 u32wps_start = 0; -+ unsigned int uintRet = 0; -+ -+ if (RTW_CANNOT_RUN(padapter) || (NULL == pdata)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ uintRet = copy_from_user((void *) &u32wps_start, pdata->pointer, 4); -+ if (u32wps_start == 0) -+ u32wps_start = *extra; -+ -+ RTW_INFO("[%s] wps_start = %d\n", __FUNCTION__, u32wps_start); -+ -+ if (u32wps_start == 1) /* WPS Start */ -+ rtw_led_control(padapter, LED_CTL_START_WPS); -+ else if (u32wps_start == 2) /* WPS Stop because of wps success */ -+ rtw_led_control(padapter, LED_CTL_STOP_WPS); -+ else if (u32wps_start == 3) /* WPS Stop because of wps fail */ -+ rtw_led_control(padapter, LED_CTL_STOP_WPS_FAIL); -+ -+exit: -+ -+ return ret; -+ -+} -+ -+#ifdef CONFIG_P2P -+static int rtw_wext_p2p_enable(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ enum P2P_ROLE init_role = P2P_ROLE_DISABLE; -+#ifdef CONFIG_CONCURRENT_MODE -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#endif -+ -+ if (*extra == '0') -+ init_role = P2P_ROLE_DISABLE; -+ else if (*extra == '1') -+ init_role = P2P_ROLE_DEVICE; -+ else if (*extra == '2') -+ init_role = P2P_ROLE_CLIENT; -+ else if (*extra == '3') -+ init_role = P2P_ROLE_GO; -+ -+ if (_FAIL == rtw_p2p_enable(padapter, init_role)) { -+ ret = -EFAULT; -+ goto exit; -+ } -+ -+ /* set channel/bandwidth */ -+ if (init_role != P2P_ROLE_DISABLE) { -+ u8 channel, ch_offset; -+ u16 bwmode; -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN)) { -+ /* Stay at the listen state and wait for discovery. */ -+ channel = pwdinfo->listen_channel; -+ pwdinfo->operating_channel = pwdinfo->listen_channel; -+ ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ bwmode = CHANNEL_WIDTH_20; -+ } -+#ifdef CONFIG_CONCURRENT_MODE -+ else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { -+ -+ _set_timer(&prochinfo->ap_roch_ch_switch_timer, pwdinfo->ext_listen_interval); -+ -+ channel = rtw_mi_get_union_chan(padapter); -+ ch_offset = rtw_mi_get_union_offset(padapter); -+ bwmode = rtw_mi_get_union_bw(padapter); -+ -+ pwdinfo->operating_channel = channel; -+ } -+#endif -+ else { -+ pwdinfo->operating_channel = pmlmeext->cur_channel; -+ -+ channel = pwdinfo->operating_channel; -+ ch_offset = pmlmeext->cur_ch_offset; -+ bwmode = pmlmeext->cur_bwmode; -+ } -+ -+ set_channel_bwmode(padapter, channel, ch_offset, bwmode); -+ } -+ -+exit: -+ return ret; -+ -+} -+ -+static int rtw_p2p_set_go_nego_ssid(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ RTW_INFO("[%s] ssid = %s, len = %zu\n", __FUNCTION__, extra, strlen(extra)); -+ _rtw_memcpy(pwdinfo->nego_ssid, extra, strlen(extra)); -+ pwdinfo->nego_ssidlen = strlen(extra); -+ -+ return ret; -+ -+} -+ -+ -+static int rtw_p2p_set_intent(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 intent = pwdinfo->intent; -+ -+ extra[wrqu->data.length] = 0x00; -+ -+ intent = rtw_atoi(extra); -+ -+ if (intent <= 15) -+ pwdinfo->intent = intent; -+ else -+ ret = -1; -+ -+ RTW_INFO("[%s] intent = %d\n", __FUNCTION__, intent); -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_set_listen_ch(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 listen_ch = pwdinfo->listen_channel; /* Listen channel number */ -+ -+ extra[wrqu->data.length] = 0x00; -+ listen_ch = rtw_atoi(extra); -+ -+ if ((listen_ch == 1) || (listen_ch == 6) || (listen_ch == 11)) { -+ pwdinfo->listen_channel = listen_ch; -+ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+ } else -+ ret = -1; -+ -+ RTW_INFO("[%s] listen_ch = %d\n", __FUNCTION__, pwdinfo->listen_channel); -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_set_op_ch(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ /* Commented by Albert 20110524 -+ * This function is used to set the operating channel if the driver will become the group owner */ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 op_ch = pwdinfo->operating_channel; /* Operating channel number */ -+ -+ extra[wrqu->data.length] = 0x00; -+ -+ op_ch = (u8) rtw_atoi(extra); -+ if (op_ch > 0) -+ pwdinfo->operating_channel = op_ch; -+ else -+ ret = -1; -+ -+ RTW_INFO("[%s] op_ch = %d\n", __FUNCTION__, pwdinfo->operating_channel); -+ -+ return ret; -+ -+} -+ -+ -+static int rtw_p2p_profilefound(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ /* Comment by Albert 2010/10/13 */ -+ /* Input data format: */ -+ /* Ex: 0 */ -+ /* Ex: 1XX:XX:XX:XX:XX:XXYYSSID */ -+ /* 0 => Reflush the profile record list. */ -+ /* 1 => Add the profile list */ -+ /* XX:XX:XX:XX:XX:XX => peer's MAC Address ( ex: 00:E0:4C:00:00:01 ) */ -+ /* YY => SSID Length */ -+ /* SSID => SSID for persistence group */ -+ -+ RTW_INFO("[%s] In value = %s, len = %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ -+ /* The upper application should pass the SSID to driver by using this rtw_p2p_profilefound function. */ -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ if (extra[0] == '0') { -+ /* Remove all the profile information of wifidirect_info structure. */ -+ _rtw_memset(&pwdinfo->profileinfo[0], 0x00, sizeof(struct profile_info) * P2P_MAX_PERSISTENT_GROUP_NUM); -+ pwdinfo->profileindex = 0; -+ } else { -+ if (pwdinfo->profileindex >= P2P_MAX_PERSISTENT_GROUP_NUM) -+ ret = -1; -+ else { -+ int jj, kk; -+ -+ /* Add this profile information into pwdinfo->profileinfo */ -+ /* Ex: 1XX:XX:XX:XX:XX:XXYYSSID */ -+ for (jj = 0, kk = 1; jj < ETH_ALEN; jj++, kk += 3) -+ pwdinfo->profileinfo[pwdinfo->profileindex].peermac[jj] = key_2char2num(extra[kk], extra[kk + 1]); -+ -+ /* pwdinfo->profileinfo[pwdinfo->profileindex].ssidlen = ( extra[18] - '0' ) * 10 + ( extra[19] - '0' ); */ -+ /* _rtw_memcpy( pwdinfo->profileinfo[pwdinfo->profileindex].ssid, &extra[20], pwdinfo->profileinfo[pwdinfo->profileindex].ssidlen ); */ -+ pwdinfo->profileindex++; -+ } -+ } -+ } -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_setDN(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ _rtw_memset(pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN); -+ _rtw_memcpy(pwdinfo->device_name, extra, wrqu->data.length - 1); -+ pwdinfo->device_name_len = wrqu->data.length - 1; -+ -+ return ret; -+ -+} -+ -+ -+static int rtw_p2p_get_status(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ if (padapter->bShowGetP2PState) { -+ RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), -+ pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], pwdinfo->p2p_peer_interface_addr[2], -+ pwdinfo->p2p_peer_interface_addr[3], pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5]); -+ } -+ -+ /* Commented by Albert 2010/10/12 */ -+ /* Because of the output size limitation, I had removed the "Role" information. */ -+ /* About the "Role" information, we will use the new private IOCTL to get the "Role" information. */ -+ sprintf(extra, "\n\nStatus=%.2d\n", rtw_p2p_state(pwdinfo)); -+ wrqu->data.length = strlen(extra); -+ -+ return ret; -+ -+} -+ -+/* Commented by Albert 20110520 -+ * This function will return the config method description -+ * This config method description will show us which config method the remote P2P device is intented to use -+ * by sending the provisioning discovery request frame. */ -+ -+static int rtw_p2p_get_req_cm(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ sprintf(extra, "\n\nCM=%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req); -+ wrqu->data.length = strlen(extra); -+ return ret; -+ -+} -+ -+ -+static int rtw_p2p_get_role(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), -+ pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], pwdinfo->p2p_peer_interface_addr[2], -+ pwdinfo->p2p_peer_interface_addr[3], pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5]); -+ -+ sprintf(extra, "\n\nRole=%.2d\n", rtw_p2p_role(pwdinfo)); -+ wrqu->data.length = strlen(extra); -+ return ret; -+ -+} -+ -+ -+static int rtw_p2p_get_peer_ifaddr(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ -+ RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), -+ pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], pwdinfo->p2p_peer_interface_addr[2], -+ pwdinfo->p2p_peer_interface_addr[3], pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5]); -+ -+ sprintf(extra, "\nMAC %.2X:%.2X:%.2X:%.2X:%.2X:%.2X", -+ pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], pwdinfo->p2p_peer_interface_addr[2], -+ pwdinfo->p2p_peer_interface_addr[3], pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5]); -+ wrqu->data.length = strlen(extra); -+ return ret; -+ -+} -+ -+static int rtw_p2p_get_peer_devaddr(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+ -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), -+ pwdinfo->rx_prov_disc_info.peerDevAddr[0], pwdinfo->rx_prov_disc_info.peerDevAddr[1], -+ pwdinfo->rx_prov_disc_info.peerDevAddr[2], pwdinfo->rx_prov_disc_info.peerDevAddr[3], -+ pwdinfo->rx_prov_disc_info.peerDevAddr[4], pwdinfo->rx_prov_disc_info.peerDevAddr[5]); -+ sprintf(extra, "\n%.2X%.2X%.2X%.2X%.2X%.2X", -+ pwdinfo->rx_prov_disc_info.peerDevAddr[0], pwdinfo->rx_prov_disc_info.peerDevAddr[1], -+ pwdinfo->rx_prov_disc_info.peerDevAddr[2], pwdinfo->rx_prov_disc_info.peerDevAddr[3], -+ pwdinfo->rx_prov_disc_info.peerDevAddr[4], pwdinfo->rx_prov_disc_info.peerDevAddr[5]); -+ wrqu->data.length = strlen(extra); -+ return ret; -+ -+} -+ -+static int rtw_p2p_get_peer_devaddr_by_invitation(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+ -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ RTW_INFO("[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), -+ pwdinfo->p2p_peer_device_addr[0], pwdinfo->p2p_peer_device_addr[1], -+ pwdinfo->p2p_peer_device_addr[2], pwdinfo->p2p_peer_device_addr[3], -+ pwdinfo->p2p_peer_device_addr[4], pwdinfo->p2p_peer_device_addr[5]); -+ sprintf(extra, "\nMAC %.2X:%.2X:%.2X:%.2X:%.2X:%.2X", -+ pwdinfo->p2p_peer_device_addr[0], pwdinfo->p2p_peer_device_addr[1], -+ pwdinfo->p2p_peer_device_addr[2], pwdinfo->p2p_peer_device_addr[3], -+ pwdinfo->p2p_peer_device_addr[4], pwdinfo->p2p_peer_device_addr[5]); -+ wrqu->data.length = strlen(extra); -+ return ret; -+ -+} -+ -+static int rtw_p2p_get_groupid(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+ -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ sprintf(extra, "\n%.2X:%.2X:%.2X:%.2X:%.2X:%.2X %s", -+ pwdinfo->groupid_info.go_device_addr[0], pwdinfo->groupid_info.go_device_addr[1], -+ pwdinfo->groupid_info.go_device_addr[2], pwdinfo->groupid_info.go_device_addr[3], -+ pwdinfo->groupid_info.go_device_addr[4], pwdinfo->groupid_info.go_device_addr[5], -+ pwdinfo->groupid_info.ssid); -+ wrqu->data.length = strlen(extra); -+ return ret; -+ -+} -+ -+static int rtw_p2p_get_op_ch(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+ -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ -+ RTW_INFO("[%s] Op_ch = %02x\n", __FUNCTION__, pwdinfo->operating_channel); -+ -+ sprintf(extra, "\n\nOp_ch=%.2d\n", pwdinfo->operating_channel); -+ wrqu->data.length = strlen(extra); -+ return ret; -+ -+} -+ -+static int rtw_p2p_get_wps_configmethod(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra, char *subcmd) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 peerMAC[ETH_ALEN] = { 0x00 }; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _irqL irqL; -+ _list *plist, *phead; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ u8 blnMatch = 0; -+ u16 attr_content = 0; -+ uint attr_contentlen = 0; -+ u8 attr_content_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; -+ -+ /* Commented by Albert 20110727 */ -+ /* The input data is the MAC address which the application wants to know its WPS config method. */ -+ /* After knowing its WPS config method, the application can decide the config method for provisioning discovery. */ -+ /* Format: iwpriv wlanx p2p_get_wpsCM 00:E0:4C:00:00:05 */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, subcmd); -+ -+ macstr2num(peerMAC, subcmd); -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { -+ u8 *wpsie; -+ uint wpsie_len = 0; -+ -+ /* The mac address is matched. */ -+ -+ wpsie = rtw_get_wps_ie_from_scan_queue(&pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &wpsie_len, pnetwork->network.Reserved[0]); -+ if (wpsie) { -+ rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_CONF_METHOD, (u8 *)&attr_content, &attr_contentlen); -+ if (attr_contentlen) { -+ attr_content = be16_to_cpu(attr_content); -+ sprintf(attr_content_str, "\n\nM=%.4d", attr_content); -+ blnMatch = 1; -+ } -+ } -+ -+ break; -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ if (!blnMatch) -+ sprintf(attr_content_str, "\n\nM=0000"); -+ -+ wrqu->data.length = strlen(attr_content_str); -+ _rtw_memcpy(extra, attr_content_str, wrqu->data.length); -+ -+ return ret; -+ -+} -+ -+#ifdef CONFIG_WFD -+static int rtw_p2p_get_peer_wfd_port(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ RTW_INFO("[%s] p2p_state = %d\n", __FUNCTION__, rtw_p2p_state(pwdinfo)); -+ -+ sprintf(extra, "\n\nPort=%d\n", pwdinfo->wfd_info->peer_rtsp_ctrlport); -+ RTW_INFO("[%s] remote port = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport); -+ -+ wrqu->data.length = strlen(extra); -+ return ret; -+ -+} -+ -+static int rtw_p2p_get_peer_wfd_preferred_connection(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ sprintf(extra, "\n\nwfd_pc=%d\n", pwdinfo->wfd_info->wfd_pc); -+ RTW_INFO("[%s] wfd_pc = %d\n", __FUNCTION__, pwdinfo->wfd_info->wfd_pc); -+ -+ wrqu->data.length = strlen(extra); -+ pwdinfo->wfd_info->wfd_pc = _FALSE; /* Reset the WFD preferred connection to P2P */ -+ return ret; -+ -+} -+ -+static int rtw_p2p_get_peer_wfd_session_available(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ sprintf(extra, "\n\nwfd_sa=%d\n", pwdinfo->wfd_info->peer_session_avail); -+ RTW_INFO("[%s] wfd_sa = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_session_avail); -+ -+ wrqu->data.length = strlen(extra); -+ pwdinfo->wfd_info->peer_session_avail = _TRUE; /* Reset the WFD session available */ -+ return ret; -+ -+} -+#endif /* CONFIG_WFD */ -+ -+static int rtw_p2p_get_go_device_address(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra, char *subcmd) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 peerMAC[ETH_ALEN] = { 0x00 }; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _irqL irqL; -+ _list *plist, *phead; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ u8 blnMatch = 0; -+ u8 *p2pie; -+ uint p2pielen = 0, attr_contentlen = 0; -+ u8 attr_content[100] = { 0x00 }; -+ u8 go_devadd_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; -+ -+ /* Commented by Albert 20121209 */ -+ /* The input data is the GO's interface address which the application wants to know its device address. */ -+ /* Format: iwpriv wlanx p2p_get2 go_devadd=00:E0:4C:00:00:05 */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, subcmd); -+ -+ macstr2num(peerMAC, subcmd); -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { -+ /* Commented by Albert 2011/05/18 */ -+ /* Match the device address located in the P2P IE */ -+ /* This is for the case that the P2P device address is not the same as the P2P interface address. */ -+ -+ p2pie = rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen); -+ if (p2pie) { -+ while (p2pie) { -+ /* The P2P Device ID attribute is included in the Beacon frame. */ -+ /* The P2P Device Info attribute is included in the probe response frame. */ -+ -+ _rtw_memset(attr_content, 0x00, 100); -+ if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen)) { -+ /* Handle the P2P Device ID attribute of Beacon first */ -+ blnMatch = 1; -+ break; -+ -+ } else if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen)) { -+ /* Handle the P2P Device Info attribute of probe response */ -+ blnMatch = 1; -+ break; -+ } -+ -+ /* Get the next P2P IE */ -+ p2pie = rtw_get_p2p_ie(p2pie + p2pielen, BSS_EX_TLV_IES_LEN(&pnetwork->network) - (p2pie + p2pielen - BSS_EX_TLV_IES(&pnetwork->network)), NULL, &p2pielen); -+ } -+ } -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ if (!blnMatch) -+ sprintf(go_devadd_str, "\n\ndev_add=NULL"); -+ else { -+ sprintf(go_devadd_str, "\n\ndev_add=%.2X:%.2X:%.2X:%.2X:%.2X:%.2X", -+ attr_content[0], attr_content[1], attr_content[2], attr_content[3], attr_content[4], attr_content[5]); -+ } -+ -+ wrqu->data.length = strlen(go_devadd_str); -+ _rtw_memcpy(extra, go_devadd_str, wrqu->data.length); -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_get_device_type(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra, char *subcmd) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 peerMAC[ETH_ALEN] = { 0x00 }; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _irqL irqL; -+ _list *plist, *phead; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ u8 blnMatch = 0; -+ u8 dev_type[8] = { 0x00 }; -+ uint dev_type_len = 0; -+ u8 dev_type_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; /* +9 is for the str "dev_type=", we have to clear it at wrqu->data.pointer */ -+ -+ /* Commented by Albert 20121209 */ -+ /* The input data is the MAC address which the application wants to know its device type. */ -+ /* Such user interface could know the device type. */ -+ /* Format: iwpriv wlanx p2p_get2 dev_type=00:E0:4C:00:00:05 */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, subcmd); -+ -+ macstr2num(peerMAC, subcmd); -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { -+ u8 *wpsie; -+ uint wpsie_len = 0; -+ -+ /* The mac address is matched. */ -+ -+ wpsie = rtw_get_wps_ie_from_scan_queue(&pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &wpsie_len, pnetwork->network.Reserved[0]); -+ if (wpsie) { -+ rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_PRIMARY_DEV_TYPE, dev_type, &dev_type_len); -+ if (dev_type_len) { -+ u16 type = 0; -+ -+ _rtw_memcpy(&type, dev_type, 2); -+ type = be16_to_cpu(type); -+ sprintf(dev_type_str, "\n\nN=%.2d", type); -+ blnMatch = 1; -+ } -+ } -+ break; -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ if (!blnMatch) -+ sprintf(dev_type_str, "\n\nN=00"); -+ -+ wrqu->data.length = strlen(dev_type_str); -+ _rtw_memcpy(extra, dev_type_str, wrqu->data.length); -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_get_device_name(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra, char *subcmd) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 peerMAC[ETH_ALEN] = { 0x00 }; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _irqL irqL; -+ _list *plist, *phead; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ u8 blnMatch = 0; -+ u8 dev_name[WPS_MAX_DEVICE_NAME_LEN] = { 0x00 }; -+ uint dev_len = 0; -+ u8 dev_name_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; -+ -+ /* Commented by Albert 20121225 */ -+ /* The input data is the MAC address which the application wants to know its device name. */ -+ /* Such user interface could show peer device's device name instead of ssid. */ -+ /* Format: iwpriv wlanx p2p_get2 devN=00:E0:4C:00:00:05 */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, subcmd); -+ -+ macstr2num(peerMAC, subcmd); -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { -+ u8 *wpsie; -+ uint wpsie_len = 0; -+ -+ /* The mac address is matched. */ -+ -+ wpsie = rtw_get_wps_ie_from_scan_queue(&pnetwork->network.IEs[0], pnetwork->network.IELength, NULL, &wpsie_len, pnetwork->network.Reserved[0]); -+ if (wpsie) { -+ rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_DEVICE_NAME, dev_name, &dev_len); -+ if (dev_len) { -+ sprintf(dev_name_str, "\n\nN=%s", dev_name); -+ blnMatch = 1; -+ } -+ } -+ break; -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ if (!blnMatch) -+ sprintf(dev_name_str, "\n\nN=0000"); -+ -+ wrqu->data.length = strlen(dev_name_str); -+ _rtw_memcpy(extra, dev_name_str, wrqu->data.length); -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_get_invitation_procedure(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra, char *subcmd) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 peerMAC[ETH_ALEN] = { 0x00 }; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _irqL irqL; -+ _list *plist, *phead; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ u8 blnMatch = 0; -+ u8 *p2pie; -+ uint p2pielen = 0, attr_contentlen = 0; -+ u8 attr_content[2] = { 0x00 }; -+ u8 inv_proc_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; -+ -+ /* Commented by Ouden 20121226 */ -+ /* The application wants to know P2P initation procedure is support or not. */ -+ /* Format: iwpriv wlanx p2p_get2 InvProc=00:E0:4C:00:00:05 */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, subcmd); -+ -+ macstr2num(peerMAC, subcmd); -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { -+ /* Commented by Albert 20121226 */ -+ /* Match the device address located in the P2P IE */ -+ /* This is for the case that the P2P device address is not the same as the P2P interface address. */ -+ -+ p2pie = rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen); -+ if (p2pie) { -+ while (p2pie) { -+ /* _rtw_memset( attr_content, 0x00, 2); */ -+ if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_CAPABILITY, attr_content, &attr_contentlen)) { -+ /* Handle the P2P capability attribute */ -+ blnMatch = 1; -+ break; -+ -+ } -+ -+ /* Get the next P2P IE */ -+ p2pie = rtw_get_p2p_ie(p2pie + p2pielen, BSS_EX_TLV_IES_LEN(&pnetwork->network) - (p2pie + p2pielen - BSS_EX_TLV_IES(&pnetwork->network)), NULL, &p2pielen); -+ } -+ } -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ if (!blnMatch) -+ sprintf(inv_proc_str, "\nIP=-1"); -+ else { -+ if ((attr_content[0] & 0x20) == 0x20) -+ sprintf(inv_proc_str, "\nIP=1"); -+ else -+ sprintf(inv_proc_str, "\nIP=0"); -+ } -+ -+ wrqu->data.length = strlen(inv_proc_str); -+ _rtw_memcpy(extra, inv_proc_str, wrqu->data.length); -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_connect(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 peerMAC[ETH_ALEN] = { 0x00 }; -+ int jj, kk; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _irqL irqL; -+ _list *plist, *phead; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ uint uintPeerChannel = 0; -+#ifdef CONFIG_CONCURRENT_MODE -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#endif -+ -+ /* Commented by Albert 20110304 */ -+ /* The input data contains two informations. */ -+ /* 1. First information is the MAC address which wants to formate with */ -+ /* 2. Second information is the WPS PINCode or "pbc" string for push button method */ -+ /* Format: 00:E0:4C:00:00:05 */ -+ /* Format: 00:E0:4C:00:00:05 */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra); -+ -+ if (pwdinfo->p2p_state == P2P_STATE_NONE) { -+ RTW_INFO("[%s] WiFi Direct is disable!\n", __FUNCTION__); -+ return ret; -+ } -+ -+ if (pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO) -+ return -1; -+ -+ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) -+ peerMAC[jj] = key_2char2num(extra[kk], extra[kk + 1]); -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) { -+ if (pnetwork->network.Configuration.DSConfig != 0) -+ uintPeerChannel = pnetwork->network.Configuration.DSConfig; -+ else if (pwdinfo->nego_req_info.peer_ch != 0) -+ uintPeerChannel = pnetwork->network.Configuration.DSConfig = pwdinfo->nego_req_info.peer_ch; -+ else { -+ /* Unexpected case */ -+ uintPeerChannel = 0; -+ RTW_INFO("%s uintPeerChannel = 0\n", __func__); -+ } -+ break; -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ if (uintPeerChannel) { -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ _cancel_timer_ex(&prochinfo->ap_roch_ch_switch_timer); -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ _rtw_memset(&pwdinfo->nego_req_info, 0x00, sizeof(struct tx_nego_req_info)); -+ _rtw_memset(&pwdinfo->groupid_info, 0x00, sizeof(struct group_id_info)); -+ -+ pwdinfo->nego_req_info.peer_channel_num[0] = uintPeerChannel; -+ _rtw_memcpy(pwdinfo->nego_req_info.peerDevAddr, pnetwork->network.MacAddress, ETH_ALEN); -+ pwdinfo->nego_req_info.benable = _TRUE; -+ -+ _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); -+ if (rtw_p2p_state(pwdinfo) != P2P_STATE_GONEGO_OK) { -+ /* Restore to the listen state if the current p2p state is not nego OK */ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); -+ } -+ -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ u8 union_bw = rtw_mi_get_union_bw(padapter); -+ u8 union_offset = rtw_mi_get_union_offset(padapter); -+ -+ set_channel_bwmode(padapter, union_ch, union_offset, union_bw); -+ rtw_leave_opch(padapter); -+ } -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ RTW_INFO("[%s] Start PreTx Procedure!\n", __FUNCTION__); -+ _set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT); -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_CONCURRENT_GO_NEGO_TIMEOUT); -+ else -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_GO_NEGO_TIMEOUT); -+#else -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_GO_NEGO_TIMEOUT); -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ } else { -+ RTW_INFO("[%s] Not Found in Scanning Queue~\n", __FUNCTION__); -+ ret = -1; -+ } -+ -+ return ret; -+} -+ -+static int rtw_p2p_invite_req(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ int jj, kk; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _list *plist, *phead; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ uint uintPeerChannel = 0; -+ u8 attr_content[50] = { 0x00 }; -+ u8 *p2pie; -+ uint p2pielen = 0, attr_contentlen = 0; -+ _irqL irqL; -+ struct tx_invite_req_info *pinvite_req_info = &pwdinfo->invitereq_info; -+#ifdef CONFIG_CONCURRENT_MODE -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#endif -+ -+ /* Commented by Albert 20120321 */ -+ /* The input data contains two informations. */ -+ /* 1. First information is the P2P device address which you want to send to. */ -+ /* 2. Second information is the group id which combines with GO's mac address, space and GO's ssid. */ -+ /* Command line sample: iwpriv wlan0 p2p_set invite="00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy" */ -+ /* Format: 00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra); -+ -+ if (wrqu->data.length <= 37) { -+ RTW_INFO("[%s] Wrong format!\n", __FUNCTION__); -+ return ret; -+ } -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ RTW_INFO("[%s] WiFi Direct is disable!\n", __FUNCTION__); -+ return ret; -+ } else { -+ /* Reset the content of struct tx_invite_req_info */ -+ pinvite_req_info->benable = _FALSE; -+ _rtw_memset(pinvite_req_info->go_bssid, 0x00, ETH_ALEN); -+ _rtw_memset(pinvite_req_info->go_ssid, 0x00, WLAN_SSID_MAXLEN); -+ pinvite_req_info->ssidlen = 0x00; -+ pinvite_req_info->operating_ch = pwdinfo->operating_channel; -+ _rtw_memset(pinvite_req_info->peer_macaddr, 0x00, ETH_ALEN); -+ pinvite_req_info->token = 3; -+ } -+ -+ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) -+ pinvite_req_info->peer_macaddr[jj] = key_2char2num(extra[kk], extra[kk + 1]); -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ /* Commented by Albert 2011/05/18 */ -+ /* Match the device address located in the P2P IE */ -+ /* This is for the case that the P2P device address is not the same as the P2P interface address. */ -+ -+ p2pie = rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen); -+ if (p2pie) { -+ /* The P2P Device ID attribute is included in the Beacon frame. */ -+ /* The P2P Device Info attribute is included in the probe response frame. */ -+ -+ if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen)) { -+ /* Handle the P2P Device ID attribute of Beacon first */ -+ if (_rtw_memcmp(attr_content, pinvite_req_info->peer_macaddr, ETH_ALEN)) { -+ uintPeerChannel = pnetwork->network.Configuration.DSConfig; -+ break; -+ } -+ } else if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen)) { -+ /* Handle the P2P Device Info attribute of probe response */ -+ if (_rtw_memcmp(attr_content, pinvite_req_info->peer_macaddr, ETH_ALEN)) { -+ uintPeerChannel = pnetwork->network.Configuration.DSConfig; -+ break; -+ } -+ } -+ -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+#ifdef CONFIG_WFD -+ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST) && uintPeerChannel) { -+ struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; -+ u8 *wfd_ie; -+ uint wfd_ielen = 0; -+ -+ wfd_ie = rtw_bss_ex_get_wfd_ie(&pnetwork->network, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ u8 *wfd_devinfo; -+ uint wfd_devlen; -+ -+ RTW_INFO("[%s] Found WFD IE!\n", __FUNCTION__); -+ wfd_devinfo = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &wfd_devlen); -+ if (wfd_devinfo) { -+ u16 wfd_devinfo_field = 0; -+ -+ /* Commented by Albert 20120319 */ -+ /* The first two bytes are the WFD device information field of WFD device information subelement. */ -+ /* In big endian format. */ -+ wfd_devinfo_field = RTW_GET_BE16(wfd_devinfo); -+ if (wfd_devinfo_field & WFD_DEVINFO_SESSION_AVAIL) -+ pwfd_info->peer_session_avail = _TRUE; -+ else -+ pwfd_info->peer_session_avail = _FALSE; -+ } -+ } -+ -+ if (_FALSE == pwfd_info->peer_session_avail) { -+ RTW_INFO("[%s] WFD Session not avaiable!\n", __FUNCTION__); -+ goto exit; -+ } -+ } -+#endif /* CONFIG_WFD */ -+ -+ if (uintPeerChannel) { -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ _cancel_timer_ex(&prochinfo->ap_roch_ch_switch_timer); -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ /* Store the GO's bssid */ -+ for (jj = 0, kk = 18; jj < ETH_ALEN; jj++, kk += 3) -+ pinvite_req_info->go_bssid[jj] = key_2char2num(extra[kk], extra[kk + 1]); -+ -+ /* Store the GO's ssid */ -+ pinvite_req_info->ssidlen = wrqu->data.length - 36; -+ _rtw_memcpy(pinvite_req_info->go_ssid, &extra[36], (u32) pinvite_req_info->ssidlen); -+ pinvite_req_info->benable = _TRUE; -+ pinvite_req_info->peer_ch = uintPeerChannel; -+ -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_INVITE_REQ); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ u8 union_bw = rtw_mi_get_union_bw(padapter); -+ u8 union_offset = rtw_mi_get_union_offset(padapter); -+ -+ set_channel_bwmode(padapter, union_ch, union_offset, union_bw); -+ rtw_leave_opch(padapter); -+ -+ } else -+ set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+#else -+ set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+#endif/*CONFIG_CONCURRENT_MODE*/ -+ -+ _set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_CONCURRENT_INVITE_TIMEOUT); -+ else -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_INVITE_TIMEOUT); -+#else -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_INVITE_TIMEOUT); -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ -+ } else -+ RTW_INFO("[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__); -+exit: -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_set_persistent(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ /* Commented by Albert 20120328 */ -+ /* The input data is 0 or 1 */ -+ /* 0: disable persistent group functionality */ -+ /* 1: enable persistent group founctionality */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra); -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ RTW_INFO("[%s] WiFi Direct is disable!\n", __FUNCTION__); -+ return ret; -+ } else { -+ if (extra[0] == '0') /* Disable the persistent group function. */ -+ pwdinfo->persistent_supported = _FALSE; -+ else if (extra[0] == '1') /* Enable the persistent group function. */ -+ pwdinfo->persistent_supported = _TRUE; -+ else -+ pwdinfo->persistent_supported = _FALSE; -+ } -+ printk("[%s] persistent_supported = %d\n", __FUNCTION__, pwdinfo->persistent_supported); -+ -+ return ret; -+ -+} -+ -+static int uuid_str2bin(const char *str, u8 *bin) -+{ -+ const char *pos; -+ u8 *opos; -+ -+ pos = str; -+ opos = bin; -+ -+ if (hexstr2bin(pos, opos, 4)) -+ return -1; -+ pos += 8; -+ opos += 4; -+ -+ if (*pos++ != '-' || hexstr2bin(pos, opos, 2)) -+ return -1; -+ pos += 4; -+ opos += 2; -+ -+ if (*pos++ != '-' || hexstr2bin(pos, opos, 2)) -+ return -1; -+ pos += 4; -+ opos += 2; -+ -+ if (*pos++ != '-' || hexstr2bin(pos, opos, 2)) -+ return -1; -+ pos += 4; -+ opos += 2; -+ -+ if (*pos++ != '-' || hexstr2bin(pos, opos, 6)) -+ return -1; -+ -+ return 0; -+} -+ -+static int rtw_p2p_set_wps_uuid(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra); -+ -+ if ((36 == strlen(extra)) && (uuid_str2bin(extra, pwdinfo->uuid) == 0)) -+ pwdinfo->external_uuid = 1; -+ else { -+ pwdinfo->external_uuid = 0; -+ ret = -EINVAL; -+ } -+ -+ return ret; -+ -+} -+#ifdef CONFIG_WFD -+static int rtw_p2p_set_pc(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 peerMAC[ETH_ALEN] = { 0x00 }; -+ int jj, kk; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _list *plist, *phead; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ u8 attr_content[50] = { 0x00 }; -+ u8 *p2pie; -+ uint p2pielen = 0, attr_contentlen = 0; -+ _irqL irqL; -+ uint uintPeerChannel = 0; -+ -+ struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; -+ -+ /* Commented by Albert 20120512 */ -+ /* 1. Input information is the MAC address which wants to know the Preferred Connection bit (PC bit) */ -+ /* Format: 00:E0:4C:00:00:05 */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra); -+ -+ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ RTW_INFO("[%s] WiFi Direct is disable!\n", __FUNCTION__); -+ return ret; -+ } -+ -+ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) -+ peerMAC[jj] = key_2char2num(extra[kk], extra[kk + 1]); -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ /* Commented by Albert 2011/05/18 */ -+ /* Match the device address located in the P2P IE */ -+ /* This is for the case that the P2P device address is not the same as the P2P interface address. */ -+ -+ p2pie = rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen); -+ if (p2pie) { -+ /* The P2P Device ID attribute is included in the Beacon frame. */ -+ /* The P2P Device Info attribute is included in the probe response frame. */ -+ printk("[%s] Got P2P IE\n", __FUNCTION__); -+ if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen)) { -+ /* Handle the P2P Device ID attribute of Beacon first */ -+ printk("[%s] P2P_ATTR_DEVICE_ID\n", __FUNCTION__); -+ if (_rtw_memcmp(attr_content, peerMAC, ETH_ALEN)) { -+ uintPeerChannel = pnetwork->network.Configuration.DSConfig; -+ break; -+ } -+ } else if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen)) { -+ /* Handle the P2P Device Info attribute of probe response */ -+ printk("[%s] P2P_ATTR_DEVICE_INFO\n", __FUNCTION__); -+ if (_rtw_memcmp(attr_content, peerMAC, ETH_ALEN)) { -+ uintPeerChannel = pnetwork->network.Configuration.DSConfig; -+ break; -+ } -+ } -+ -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ printk("[%s] channel = %d\n", __FUNCTION__, uintPeerChannel); -+ -+ if (uintPeerChannel) { -+ u8 *wfd_ie; -+ uint wfd_ielen = 0; -+ -+ wfd_ie = rtw_bss_ex_get_wfd_ie(&pnetwork->network, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ u8 *wfd_devinfo; -+ uint wfd_devlen; -+ -+ RTW_INFO("[%s] Found WFD IE!\n", __FUNCTION__); -+ wfd_devinfo = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &wfd_devlen); -+ if (wfd_devinfo) { -+ u16 wfd_devinfo_field = 0; -+ -+ /* Commented by Albert 20120319 */ -+ /* The first two bytes are the WFD device information field of WFD device information subelement. */ -+ /* In big endian format. */ -+ wfd_devinfo_field = RTW_GET_BE16(wfd_devinfo); -+ if (wfd_devinfo_field & WFD_DEVINFO_PC_TDLS) -+ pwfd_info->wfd_pc = _TRUE; -+ else -+ pwfd_info->wfd_pc = _FALSE; -+ } -+ } -+ } else -+ RTW_INFO("[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__); -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_set_wfd_device_type(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; -+ -+ /* Commented by Albert 20120328 */ -+ /* The input data is 0 or 1 */ -+ /* 0: specify to Miracast source device */ -+ /* 1 or others: specify to Miracast sink device (display device) */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra); -+ -+ if (extra[0] == '0') /* Set to Miracast source device. */ -+ pwfd_info->wfd_device_type = WFD_DEVINFO_SOURCE; -+ else /* Set to Miracast sink device. */ -+ pwfd_info->wfd_device_type = WFD_DEVINFO_PSINK; -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_set_wfd_enable(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ /* Commented by Kurt 20121206 -+ * This function is used to set wfd enabled */ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ if (*extra == '0') -+ rtw_wfd_enable(padapter, 0); -+ else if (*extra == '1') -+ rtw_wfd_enable(padapter, 1); -+ -+ RTW_INFO("[%s] wfd_enable = %d\n", __FUNCTION__, pwdinfo->wfd_info->wfd_enable); -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_set_driver_iface(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ /* Commented by Kurt 20121206 -+ * This function is used to set driver iface is WEXT or CFG80211 */ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ if (*extra == '1') { -+ pwdinfo->driver_interface = DRIVER_WEXT; -+ RTW_INFO("[%s] driver_interface = WEXT\n", __FUNCTION__); -+ } else if (*extra == '2') { -+ pwdinfo->driver_interface = DRIVER_CFG80211; -+ RTW_INFO("[%s] driver_interface = CFG80211\n", __FUNCTION__); -+ } -+ -+ return ret; -+ -+} -+ -+/* To set the WFD session available to enable or disable */ -+static int rtw_p2p_set_sa(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra); -+ -+ if (0) { -+ RTW_INFO("[%s] WiFi Direct is disable!\n", __FUNCTION__); -+ return ret; -+ } else { -+ if (extra[0] == '0') /* Disable the session available. */ -+ pwdinfo->session_available = _FALSE; -+ else if (extra[0] == '1') /* Enable the session available. */ -+ pwdinfo->session_available = _TRUE; -+ else -+ pwdinfo->session_available = _FALSE; -+ } -+ printk("[%s] session available = %d\n", __FUNCTION__, pwdinfo->session_available); -+ -+ return ret; -+ -+} -+#endif /* CONFIG_WFD */ -+ -+static int rtw_p2p_prov_disc(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ u8 peerMAC[ETH_ALEN] = { 0x00 }; -+ int jj, kk; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ _list *plist, *phead; -+ _queue *queue = &(pmlmepriv->scanned_queue); -+ struct wlan_network *pnetwork = NULL; -+ uint uintPeerChannel = 0; -+ u8 attr_content[100] = { 0x00 }; -+ u8 *p2pie; -+ uint p2pielen = 0, attr_contentlen = 0; -+ _irqL irqL; -+#ifdef CONFIG_CONCURRENT_MODE -+ struct roch_info *prochinfo = &padapter->rochinfo; -+#endif -+ -+ /* Commented by Albert 20110301 */ -+ /* The input data contains two informations. */ -+ /* 1. First information is the MAC address which wants to issue the provisioning discovery request frame. */ -+ /* 2. Second information is the WPS configuration method which wants to discovery */ -+ /* Format: 00:E0:4C:00:00:05_display */ -+ /* Format: 00:E0:4C:00:00:05_keypad */ -+ /* Format: 00:E0:4C:00:00:05_pbc */ -+ /* Format: 00:E0:4C:00:00:05_label */ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra); -+ -+ if (pwdinfo->p2p_state == P2P_STATE_NONE) { -+ RTW_INFO("[%s] WiFi Direct is disable!\n", __FUNCTION__); -+ return ret; -+ } else { -+ /* Reset the content of struct tx_provdisc_req_info excluded the wps_config_method_request. */ -+ _rtw_memset(pwdinfo->tx_prov_disc_info.peerDevAddr, 0x00, ETH_ALEN); -+ _rtw_memset(pwdinfo->tx_prov_disc_info.peerIFAddr, 0x00, ETH_ALEN); -+ _rtw_memset(&pwdinfo->tx_prov_disc_info.ssid, 0x00, sizeof(NDIS_802_11_SSID)); -+ pwdinfo->tx_prov_disc_info.peer_channel_num[0] = 0; -+ pwdinfo->tx_prov_disc_info.peer_channel_num[1] = 0; -+ pwdinfo->tx_prov_disc_info.benable = _FALSE; -+ } -+ -+ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) -+ peerMAC[jj] = key_2char2num(extra[kk], extra[kk + 1]); -+ -+ if (_rtw_memcmp(&extra[18], "display", 7)) -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; -+ else if (_rtw_memcmp(&extra[18], "keypad", 7)) -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; -+ else if (_rtw_memcmp(&extra[18], "pbc", 3)) -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; -+ else if (_rtw_memcmp(&extra[18], "label", 5)) -+ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; -+ else { -+ RTW_INFO("[%s] Unknown WPS config methodn", __FUNCTION__); -+ return ret ; -+ } -+ -+ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ phead = get_list_head(queue); -+ plist = get_next(phead); -+ -+ while (1) { -+ if (rtw_end_of_queue_search(phead, plist) == _TRUE) -+ break; -+ -+ if (uintPeerChannel != 0) -+ break; -+ -+ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); -+ -+ /* Commented by Albert 2011/05/18 */ -+ /* Match the device address located in the P2P IE */ -+ /* This is for the case that the P2P device address is not the same as the P2P interface address. */ -+ -+ p2pie = rtw_bss_ex_get_p2p_ie(&pnetwork->network, NULL, &p2pielen); -+ if (p2pie) { -+ while (p2pie) { -+ /* The P2P Device ID attribute is included in the Beacon frame. */ -+ /* The P2P Device Info attribute is included in the probe response frame. */ -+ -+ if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen)) { -+ /* Handle the P2P Device ID attribute of Beacon first */ -+ if (_rtw_memcmp(attr_content, peerMAC, ETH_ALEN)) { -+ uintPeerChannel = pnetwork->network.Configuration.DSConfig; -+ break; -+ } -+ } else if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen)) { -+ /* Handle the P2P Device Info attribute of probe response */ -+ if (_rtw_memcmp(attr_content, peerMAC, ETH_ALEN)) { -+ uintPeerChannel = pnetwork->network.Configuration.DSConfig; -+ break; -+ } -+ } -+ -+ /* Get the next P2P IE */ -+ p2pie = rtw_get_p2p_ie(p2pie + p2pielen, BSS_EX_TLV_IES_LEN(&pnetwork->network) - (p2pie + p2pielen - BSS_EX_TLV_IES(&pnetwork->network)), NULL, &p2pielen); -+ } -+ -+ } -+ -+ plist = get_next(plist); -+ -+ } -+ -+ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); -+ -+ if (uintPeerChannel) { -+#ifdef CONFIG_WFD -+ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { -+ struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; -+ u8 *wfd_ie; -+ uint wfd_ielen = 0; -+ -+ wfd_ie = rtw_bss_ex_get_wfd_ie(&pnetwork->network, NULL, &wfd_ielen); -+ if (wfd_ie) { -+ u8 *wfd_devinfo; -+ uint wfd_devlen; -+ -+ RTW_INFO("[%s] Found WFD IE!\n", __FUNCTION__); -+ wfd_devinfo = rtw_get_wfd_attr_content(wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, NULL, &wfd_devlen); -+ if (wfd_devinfo) { -+ u16 wfd_devinfo_field = 0; -+ -+ /* Commented by Albert 20120319 */ -+ /* The first two bytes are the WFD device information field of WFD device information subelement. */ -+ /* In big endian format. */ -+ wfd_devinfo_field = RTW_GET_BE16(wfd_devinfo); -+ if (wfd_devinfo_field & WFD_DEVINFO_SESSION_AVAIL) -+ pwfd_info->peer_session_avail = _TRUE; -+ else -+ pwfd_info->peer_session_avail = _FALSE; -+ } -+ } -+ -+ if (_FALSE == pwfd_info->peer_session_avail) { -+ RTW_INFO("[%s] WFD Session not avaiable!\n", __FUNCTION__); -+ goto exit; -+ } -+ } -+#endif /* CONFIG_WFD */ -+ -+ RTW_INFO("[%s] peer channel: %d!\n", __FUNCTION__, uintPeerChannel); -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ _cancel_timer_ex(&prochinfo->ap_roch_ch_switch_timer); -+#endif /* CONFIG_CONCURRENT_MODE */ -+ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, pnetwork->network.MacAddress, ETH_ALEN); -+ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, peerMAC, ETH_ALEN); -+ pwdinfo->tx_prov_disc_info.peer_channel_num[0] = (u16) uintPeerChannel; -+ pwdinfo->tx_prov_disc_info.benable = _TRUE; -+ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ); -+ -+ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) -+ _rtw_memcpy(&pwdinfo->tx_prov_disc_info.ssid, &pnetwork->network.Ssid, sizeof(NDIS_802_11_SSID)); -+ else if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) { -+ _rtw_memcpy(pwdinfo->tx_prov_disc_info.ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN); -+ pwdinfo->tx_prov_disc_info.ssid.SsidLength = P2P_WILDCARD_SSID_LEN; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ u8 union_ch = rtw_mi_get_union_chan(padapter); -+ u8 union_bw = rtw_mi_get_union_bw(padapter); -+ u8 union_offset = rtw_mi_get_union_offset(padapter); -+ -+ set_channel_bwmode(padapter, union_ch, union_offset, union_bw); -+ rtw_leave_opch(padapter); -+ -+ } else -+ set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+#else -+ set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); -+#endif -+ -+ _set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (rtw_mi_check_status(padapter, MI_LINKED)) -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_CONCURRENT_PROVISION_TIMEOUT); -+ else -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT); -+#else -+ _set_timer(&pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT); -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ } else { -+ RTW_INFO("[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__); -+ } -+exit: -+ -+ return ret; -+ -+} -+ -+/* Added by Albert 20110328 -+ * This function is used to inform the driver the user had specified the pin code value or pbc -+ * to application. */ -+ -+static int rtw_p2p_got_wpsinfo(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+ -+ -+ RTW_INFO("[%s] data = %s\n", __FUNCTION__, extra); -+ /* Added by Albert 20110328 */ -+ /* if the input data is P2P_NO_WPSINFO -> reset the wpsinfo */ -+ /* if the input data is P2P_GOT_WPSINFO_PEER_DISPLAY_PIN -> the utility just input the PIN code got from the peer P2P device. */ -+ /* if the input data is P2P_GOT_WPSINFO_SELF_DISPLAY_PIN -> the utility just got the PIN code from itself. */ -+ /* if the input data is P2P_GOT_WPSINFO_PBC -> the utility just determine to use the PBC */ -+ -+ if (*extra == '0') -+ pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; -+ else if (*extra == '1') -+ pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_PEER_DISPLAY_PIN; -+ else if (*extra == '2') -+ pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_SELF_DISPLAY_PIN; -+ else if (*extra == '3') -+ pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_PBC; -+ else -+ pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; -+ -+ return ret; -+ -+} -+ -+#endif /* CONFIG_P2P */ -+ -+static int rtw_p2p_set(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+#ifdef CONFIG_P2P -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_INFO("[%s] extra = %s\n", __FUNCTION__, extra); -+ -+ if (_rtw_memcmp(extra, "enable=", 7)) -+ rtw_wext_p2p_enable(dev, info, wrqu, &extra[7]); -+ else if (_rtw_memcmp(extra, "setDN=", 6)) { -+ wrqu->data.length -= 6; -+ rtw_p2p_setDN(dev, info, wrqu, &extra[6]); -+ } else if (_rtw_memcmp(extra, "profilefound=", 13)) { -+ wrqu->data.length -= 13; -+ rtw_p2p_profilefound(dev, info, wrqu, &extra[13]); -+ } else if (_rtw_memcmp(extra, "prov_disc=", 10)) { -+ wrqu->data.length -= 10; -+ rtw_p2p_prov_disc(dev, info, wrqu, &extra[10]); -+ } else if (_rtw_memcmp(extra, "nego=", 5)) { -+ wrqu->data.length -= 5; -+ rtw_p2p_connect(dev, info, wrqu, &extra[5]); -+ } else if (_rtw_memcmp(extra, "intent=", 7)) { -+ /* Commented by Albert 2011/03/23 */ -+ /* The wrqu->data.length will include the null character */ -+ /* So, we will decrease 7 + 1 */ -+ wrqu->data.length -= 8; -+ rtw_p2p_set_intent(dev, info, wrqu, &extra[7]); -+ } else if (_rtw_memcmp(extra, "ssid=", 5)) { -+ wrqu->data.length -= 5; -+ rtw_p2p_set_go_nego_ssid(dev, info, wrqu, &extra[5]); -+ } else if (_rtw_memcmp(extra, "got_wpsinfo=", 12)) { -+ wrqu->data.length -= 12; -+ rtw_p2p_got_wpsinfo(dev, info, wrqu, &extra[12]); -+ } else if (_rtw_memcmp(extra, "listen_ch=", 10)) { -+ /* Commented by Albert 2011/05/24 */ -+ /* The wrqu->data.length will include the null character */ -+ /* So, we will decrease (10 + 1) */ -+ wrqu->data.length -= 11; -+ rtw_p2p_set_listen_ch(dev, info, wrqu, &extra[10]); -+ } else if (_rtw_memcmp(extra, "op_ch=", 6)) { -+ /* Commented by Albert 2011/05/24 */ -+ /* The wrqu->data.length will include the null character */ -+ /* So, we will decrease (6 + 1) */ -+ wrqu->data.length -= 7; -+ rtw_p2p_set_op_ch(dev, info, wrqu, &extra[6]); -+ } else if (_rtw_memcmp(extra, "invite=", 7)) { -+ wrqu->data.length -= 8; -+ rtw_p2p_invite_req(dev, info, wrqu, &extra[7]); -+ } else if (_rtw_memcmp(extra, "persistent=", 11)) { -+ wrqu->data.length -= 11; -+ rtw_p2p_set_persistent(dev, info, wrqu, &extra[11]); -+ } else if (_rtw_memcmp(extra, "uuid=", 5)) { -+ wrqu->data.length -= 5; -+ ret = rtw_p2p_set_wps_uuid(dev, info, wrqu, &extra[5]); -+ } -+ -+#ifdef CONFIG_WFD -+ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { -+ if (_rtw_memcmp(extra, "sa=", 3)) { -+ /* sa: WFD Session Available information */ -+ wrqu->data.length -= 3; -+ rtw_p2p_set_sa(dev, info, wrqu, &extra[3]); -+ } else if (_rtw_memcmp(extra, "pc=", 3)) { -+ /* pc: WFD Preferred Connection */ -+ wrqu->data.length -= 3; -+ rtw_p2p_set_pc(dev, info, wrqu, &extra[3]); -+ } else if (_rtw_memcmp(extra, "wfd_type=", 9)) { -+ wrqu->data.length -= 9; -+ rtw_p2p_set_wfd_device_type(dev, info, wrqu, &extra[9]); -+ } else if (_rtw_memcmp(extra, "wfd_enable=", 11)) { -+ wrqu->data.length -= 11; -+ rtw_p2p_set_wfd_enable(dev, info, wrqu, &extra[11]); -+ } else if (_rtw_memcmp(extra, "driver_iface=", 13)) { -+ wrqu->data.length -= 13; -+ rtw_p2p_set_driver_iface(dev, info, wrqu, &extra[13]); -+ } -+ } -+#endif /* CONFIG_WFD */ -+ -+#endif /* CONFIG_P2P */ -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_get(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+#ifdef CONFIG_P2P -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (padapter->bShowGetP2PState) -+ RTW_INFO("[%s] extra = %s\n", __FUNCTION__, (char *) wrqu->data.pointer); -+ -+ if (_rtw_memcmp(wrqu->data.pointer, "status", 6)) -+ rtw_p2p_get_status(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "role", 4)) -+ rtw_p2p_get_role(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "peer_ifa", 8)) -+ rtw_p2p_get_peer_ifaddr(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "req_cm", 6)) -+ rtw_p2p_get_req_cm(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "peer_deva", 9)) { -+ /* Get the P2P device address when receiving the provision discovery request frame. */ -+ rtw_p2p_get_peer_devaddr(dev, info, wrqu, extra); -+ } else if (_rtw_memcmp(wrqu->data.pointer, "group_id", 8)) -+ rtw_p2p_get_groupid(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "inv_peer_deva", 13)) { -+ /* Get the P2P device address when receiving the P2P Invitation request frame. */ -+ rtw_p2p_get_peer_devaddr_by_invitation(dev, info, wrqu, extra); -+ } else if (_rtw_memcmp(wrqu->data.pointer, "op_ch", 5)) -+ rtw_p2p_get_op_ch(dev, info, wrqu, extra); -+ -+#ifdef CONFIG_WFD -+ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { -+ if (_rtw_memcmp(wrqu->data.pointer, "peer_port", 9)) -+ rtw_p2p_get_peer_wfd_port(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "wfd_sa", 6)) -+ rtw_p2p_get_peer_wfd_session_available(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "wfd_pc", 6)) -+ rtw_p2p_get_peer_wfd_preferred_connection(dev, info, wrqu, extra); -+ } -+#endif /* CONFIG_WFD */ -+ -+#endif /* CONFIG_P2P */ -+ -+ return ret; -+ -+} -+ -+static int rtw_p2p_get2(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ -+#ifdef CONFIG_P2P -+ -+ int length = wrqu->data.length; -+ char *buffer = (u8 *)rtw_malloc(length); -+ -+ if (buffer == NULL) { -+ ret = -ENOMEM; -+ goto bad; -+ } -+ -+ if (copy_from_user(buffer, wrqu->data.pointer, wrqu->data.length)) { -+ ret = -EFAULT; -+ goto bad; -+ } -+ -+ RTW_INFO("[%s] buffer = %s\n", __FUNCTION__, buffer); -+ -+ if (_rtw_memcmp(buffer, "wpsCM=", 6)) -+ ret = rtw_p2p_get_wps_configmethod(dev, info, wrqu, extra, &buffer[6]); -+ else if (_rtw_memcmp(buffer, "devN=", 5)) -+ ret = rtw_p2p_get_device_name(dev, info, wrqu, extra, &buffer[5]); -+ else if (_rtw_memcmp(buffer, "dev_type=", 9)) -+ ret = rtw_p2p_get_device_type(dev, info, wrqu, extra, &buffer[9]); -+ else if (_rtw_memcmp(buffer, "go_devadd=", 10)) -+ ret = rtw_p2p_get_go_device_address(dev, info, wrqu, extra, &buffer[10]); -+ else if (_rtw_memcmp(buffer, "InvProc=", 8)) -+ ret = rtw_p2p_get_invitation_procedure(dev, info, wrqu, extra, &buffer[8]); -+ else { -+ snprintf(extra, sizeof("Command not found."), "Command not found."); -+ wrqu->data.length = strlen(extra); -+ } -+ -+bad: -+ if (buffer) -+ rtw_mfree(buffer, length); -+ -+#endif /* CONFIG_P2P */ -+ -+ return ret; -+ -+} -+ -+#ifdef CONFIG_MP_INCLUDED -+static int rtw_cta_test_start(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ -+ RTW_INFO("%s %s\n", __func__, extra); -+ if (!strcmp(extra, "1")) -+ hal_data->in_cta_test = 1; -+ else -+ hal_data->in_cta_test = 0; -+ -+ rtw_hal_rcr_set_chk_bssid(padapter, MLME_ACTION_NONE); -+ -+ return ret; -+} -+#endif -+ -+#ifdef CONFIG_IOL -+#include -+#endif -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+#include "../../hal/hal_dm_acs.h" -+#endif -+#ifdef DBG_CMD_QUEUE -+u8 dump_cmd_id = 0; -+#endif -+ -+static int rtw_dbg_port(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+#ifdef CONFIG_RTW_DEBUG -+ _irqL irqL; -+ u8 major_cmd, minor_cmd; -+ u16 arg; -+ u32 extra_arg, *pdata, val32; -+ struct sta_info *psta; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ struct wlan_network *cur_network = &(pmlmepriv->cur_network); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ -+ pdata = (u32 *)&wrqu->data; -+ -+ val32 = *pdata; -+ arg = (u16)(val32 & 0x0000ffff); -+ major_cmd = (u8)(val32 >> 24); -+ minor_cmd = (u8)((val32 >> 16) & 0x00ff); -+ -+ extra_arg = *(pdata + 1); -+ -+ switch (major_cmd) { -+ case 0x70: /* read_reg */ -+ switch (minor_cmd) { -+ case 1: -+ RTW_INFO("rtw_read8(0x%x)=0x%02x\n", arg, rtw_read8(padapter, arg)); -+ break; -+ case 2: -+ RTW_INFO("rtw_read16(0x%x)=0x%04x\n", arg, rtw_read16(padapter, arg)); -+ break; -+ case 4: -+ RTW_INFO("rtw_read32(0x%x)=0x%08x\n", arg, rtw_read32(padapter, arg)); -+ break; -+ } -+ break; -+ case 0x71: /* write_reg */ -+ switch (minor_cmd) { -+ case 1: -+ rtw_write8(padapter, arg, extra_arg); -+ RTW_INFO("rtw_write8(0x%x)=0x%02x\n", arg, rtw_read8(padapter, arg)); -+ break; -+ case 2: -+ rtw_write16(padapter, arg, extra_arg); -+ RTW_INFO("rtw_write16(0x%x)=0x%04x\n", arg, rtw_read16(padapter, arg)); -+ break; -+ case 4: -+ rtw_write32(padapter, arg, extra_arg); -+ RTW_INFO("rtw_write32(0x%x)=0x%08x\n", arg, rtw_read32(padapter, arg)); -+ break; -+ } -+ break; -+ case 0x72: /* read_bb */ -+ RTW_INFO("read_bbreg(0x%x)=0x%x\n", arg, rtw_hal_read_bbreg(padapter, arg, 0xffffffff)); -+ break; -+ case 0x73: /* write_bb */ -+ rtw_hal_write_bbreg(padapter, arg, 0xffffffff, extra_arg); -+ RTW_INFO("write_bbreg(0x%x)=0x%x\n", arg, rtw_hal_read_bbreg(padapter, arg, 0xffffffff)); -+ break; -+ case 0x74: /* read_rf */ -+ RTW_INFO("read RF_reg path(0x%02x),offset(0x%x),value(0x%08x)\n", minor_cmd, arg, rtw_hal_read_rfreg(padapter, minor_cmd, arg, 0xffffffff)); -+ break; -+ case 0x75: /* write_rf */ -+ rtw_hal_write_rfreg(padapter, minor_cmd, arg, 0xffffffff, extra_arg); -+ RTW_INFO("write RF_reg path(0x%02x),offset(0x%x),value(0x%08x)\n", minor_cmd, arg, rtw_hal_read_rfreg(padapter, minor_cmd, arg, 0xffffffff)); -+ break; -+ -+ case 0x76: -+ switch (minor_cmd) { -+ case 0x00: /* normal mode, */ -+ padapter->recvpriv.is_signal_dbg = 0; -+ break; -+ case 0x01: /* dbg mode */ -+ padapter->recvpriv.is_signal_dbg = 1; -+ extra_arg = extra_arg > 100 ? 100 : extra_arg; -+ padapter->recvpriv.signal_strength_dbg = extra_arg; -+ break; -+ } -+ break; -+ case 0x78: /* IOL test */ -+ switch (minor_cmd) { -+ #ifdef CONFIG_IOL -+ case 0x04: { /* LLT table initialization test */ -+ u8 page_boundary = 0xf9; -+ { -+ struct xmit_frame *xmit_frame; -+ -+ xmit_frame = rtw_IOL_accquire_xmit_frame(padapter); -+ if (xmit_frame == NULL) { -+ ret = -ENOMEM; -+ break; -+ } -+ -+ rtw_IOL_append_LLT_cmd(xmit_frame, page_boundary); -+ -+ -+ if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 500, 0)) -+ ret = -EPERM; -+ } -+ } -+ break; -+ case 0x05: { /* blink LED test */ -+ u16 reg = 0x4c; -+ u32 blink_num = 50; -+ u32 blink_delay_ms = 200; -+ int i; -+ -+ { -+ struct xmit_frame *xmit_frame; -+ -+ xmit_frame = rtw_IOL_accquire_xmit_frame(padapter); -+ if (xmit_frame == NULL) { -+ ret = -ENOMEM; -+ break; -+ } -+ -+ for (i = 0; i < blink_num; i++) { -+ #ifdef CONFIG_IOL_NEW_GENERATION -+ rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x00, 0xff); -+ rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms); -+ rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x08, 0xff); -+ rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms); -+ #else -+ rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x00); -+ rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms); -+ rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x08); -+ rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms); -+ #endif -+ } -+ if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, (blink_delay_ms * blink_num * 2) + 200, 0)) -+ ret = -EPERM; -+ } -+ } -+ break; -+ -+ case 0x06: { /* continuous wirte byte test */ -+ u16 reg = arg; -+ u16 start_value = 0; -+ u32 write_num = extra_arg; -+ int i; -+ u8 final; -+ -+ { -+ struct xmit_frame *xmit_frame; -+ -+ xmit_frame = rtw_IOL_accquire_xmit_frame(padapter); -+ if (xmit_frame == NULL) { -+ ret = -ENOMEM; -+ break; -+ } -+ -+ for (i = 0; i < write_num; i++) { -+ #ifdef CONFIG_IOL_NEW_GENERATION -+ rtw_IOL_append_WB_cmd(xmit_frame, reg, i + start_value, 0xFF); -+ #else -+ rtw_IOL_append_WB_cmd(xmit_frame, reg, i + start_value); -+ #endif -+ } -+ if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0)) -+ ret = -EPERM; -+ } -+ -+ final = rtw_read8(padapter, reg); -+ if (start_value + write_num - 1 == final) -+ RTW_INFO("continuous IOL_CMD_WB_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final); -+ else -+ RTW_INFO("continuous IOL_CMD_WB_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final); -+ } -+ break; -+ -+ case 0x07: { /* continuous wirte word test */ -+ u16 reg = arg; -+ u16 start_value = 200; -+ u32 write_num = extra_arg; -+ -+ int i; -+ u16 final; -+ -+ { -+ struct xmit_frame *xmit_frame; -+ -+ xmit_frame = rtw_IOL_accquire_xmit_frame(padapter); -+ if (xmit_frame == NULL) { -+ ret = -ENOMEM; -+ break; -+ } -+ -+ for (i = 0; i < write_num; i++) { -+ #ifdef CONFIG_IOL_NEW_GENERATION -+ rtw_IOL_append_WW_cmd(xmit_frame, reg, i + start_value, 0xFFFF); -+ #else -+ rtw_IOL_append_WW_cmd(xmit_frame, reg, i + start_value); -+ #endif -+ } -+ if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0)) -+ ret = -EPERM; -+ } -+ -+ final = rtw_read16(padapter, reg); -+ if (start_value + write_num - 1 == final) -+ RTW_INFO("continuous IOL_CMD_WW_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final); -+ else -+ RTW_INFO("continuous IOL_CMD_WW_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final); -+ } -+ break; -+ -+ case 0x08: { /* continuous wirte dword test */ -+ u16 reg = arg; -+ u32 start_value = 0x110000c7; -+ u32 write_num = extra_arg; -+ -+ int i; -+ u32 final; -+ -+ { -+ struct xmit_frame *xmit_frame; -+ -+ xmit_frame = rtw_IOL_accquire_xmit_frame(padapter); -+ if (xmit_frame == NULL) { -+ ret = -ENOMEM; -+ break; -+ } -+ -+ for (i = 0; i < write_num; i++) { -+ #ifdef CONFIG_IOL_NEW_GENERATION -+ rtw_IOL_append_WD_cmd(xmit_frame, reg, i + start_value, 0xFFFFFFFF); -+ #else -+ rtw_IOL_append_WD_cmd(xmit_frame, reg, i + start_value); -+ #endif -+ } -+ if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0)) -+ ret = -EPERM; -+ -+ } -+ -+ final = rtw_read32(padapter, reg); -+ if (start_value + write_num - 1 == final) -+ RTW_INFO("continuous IOL_CMD_WD_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final); -+ else -+ RTW_INFO("continuous IOL_CMD_WD_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final); -+ } -+ break; -+ #endif /* CONFIG_IOL */ -+ } -+ break; -+ case 0x79: { -+ /* -+ * dbg 0x79000000 [value], set RESP_TXAGC to + value, value:0~15 -+ * dbg 0x79010000 [value], set RESP_TXAGC to - value, value:0~15 -+ */ -+ u8 value = extra_arg & 0x0f; -+ u8 sign = minor_cmd; -+ u16 write_value = 0; -+ -+ RTW_INFO("%s set RESP_TXAGC to %s %u\n", __func__, sign ? "minus" : "plus", value); -+ -+ if (sign) -+ value = value | 0x10; -+ -+ write_value = value | (value << 5); -+ rtw_write16(padapter, 0x6d9, write_value); -+ } -+ break; -+ case 0x7a: -+ receive_disconnect(padapter, pmlmeinfo->network.MacAddress -+ , WLAN_REASON_EXPIRATION_CHK, _FALSE); -+ break; -+ case 0x7F: -+ switch (minor_cmd) { -+ case 0x0: -+ RTW_INFO("fwstate=0x%x\n", get_fwstate(pmlmepriv)); -+ break; -+ case 0x01: -+ RTW_INFO("auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", -+ psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, -+ psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); -+ break; -+ case 0x03: -+ RTW_INFO("qos_option=%d\n", pmlmepriv->qospriv.qos_option); -+#ifdef CONFIG_80211N_HT -+ RTW_INFO("ht_option=%d\n", pmlmepriv->htpriv.ht_option); -+#endif /* CONFIG_80211N_HT */ -+ break; -+ case 0x04: -+ RTW_INFO("cur_ch=%d\n", pmlmeext->cur_channel); -+ RTW_INFO("cur_bw=%d\n", pmlmeext->cur_bwmode); -+ RTW_INFO("cur_ch_off=%d\n", pmlmeext->cur_ch_offset); -+ -+ RTW_INFO("oper_ch=%d\n", rtw_get_oper_ch(padapter)); -+ RTW_INFO("oper_bw=%d\n", rtw_get_oper_bw(padapter)); -+ RTW_INFO("oper_ch_offet=%d\n", rtw_get_oper_choffset(padapter)); -+ -+ break; -+ case 0x05: -+ psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); -+ if (psta) { -+ RTW_INFO("SSID=%s\n", cur_network->network.Ssid.Ssid); -+ RTW_INFO("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); -+ RTW_INFO("cur_channel=%d, cur_bwmode=%d, cur_ch_offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); -+ RTW_INFO("rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); -+ RTW_INFO("state=0x%x, aid=%d, macid=%d, raid=%d\n", -+ psta->state, psta->cmn.aid, psta->cmn.mac_id, psta->cmn.ra_info.rate_id); -+#ifdef CONFIG_80211N_HT -+ RTW_INFO("qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); -+ RTW_INFO("bwmode=%d, ch_offset=%d, sgi_20m=%d,sgi_40m=%d\n" -+ , psta->cmn.bw_mode, psta->htpriv.ch_offset, psta->htpriv.sgi_20m, psta->htpriv.sgi_40m); -+ RTW_INFO("ampdu_enable = %d\n", psta->htpriv.ampdu_enable); -+ RTW_INFO("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); -+#endif /* CONFIG_80211N_HT */ -+ -+ sta_rx_reorder_ctl_dump(RTW_DBGDUMP, psta); -+ } else -+ RTW_INFO("can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); -+ break; -+ case 0x06: { -+ u64 tsf = 0; -+ -+ tsf = rtw_hal_get_tsftr_by_port(padapter, extra_arg); -+ RTW_INFO(" PORT-%d TSF :%21lld\n", extra_arg, tsf); -+ } -+ break; -+ case 0x07: -+ RTW_INFO("bSurpriseRemoved=%s, bDriverStopped=%s\n" -+ , rtw_is_surprise_removed(padapter) ? "True" : "False" -+ , rtw_is_drv_stopped(padapter) ? "True" : "False"); -+ break; -+ case 0x08: { -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ -+ RTW_INFO("free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d" -+ ", free_xmit_extbuf_cnt=%d, free_xframe_ext_cnt=%d" -+ ", free_recvframe_cnt=%d\n", -+ pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt, -+ pxmitpriv->free_xmit_extbuf_cnt, pxmitpriv->free_xframe_ext_cnt, -+ precvpriv->free_recvframe_cnt); -+#ifdef CONFIG_USB_HCI -+ RTW_INFO("rx_urb_pending_cn=%d\n", ATOMIC_READ(&(precvpriv->rx_pending_cnt))); -+#endif -+ } -+ break; -+ case 0x09: { -+ int i; -+ _list *plist, *phead; -+ -+#ifdef CONFIG_AP_MODE -+ RTW_INFO_DUMP("sta_dz_bitmap:", pstapriv->sta_dz_bitmap, pstapriv->aid_bmp_len); -+ RTW_INFO_DUMP("tim_bitmap:", pstapriv->tim_bitmap, pstapriv->aid_bmp_len); -+#endif -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ -+ plist = get_next(plist); -+ -+ if (extra_arg == psta->cmn.aid) { -+ RTW_INFO("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->cmn.mac_addr)); -+ RTW_INFO("rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); -+ RTW_INFO("state=0x%x, aid=%d, macid=%d, raid=%d\n", -+ psta->state, psta->cmn.aid, psta->cmn.mac_id, psta->cmn.ra_info.rate_id); -+#ifdef CONFIG_80211N_HT -+ RTW_INFO("qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); -+ RTW_INFO("bwmode=%d, ch_offset=%d, sgi_20m=%d,sgi_40m=%d\n", -+ psta->cmn.bw_mode, psta->htpriv.ch_offset, psta->htpriv.sgi_20m, -+ psta->htpriv.sgi_40m); -+ RTW_INFO("ampdu_enable = %d\n", psta->htpriv.ampdu_enable); -+ RTW_INFO("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_AP_MODE -+ RTW_INFO("capability=0x%x\n", psta->capability); -+ RTW_INFO("flags=0x%x\n", psta->flags); -+ RTW_INFO("wpa_psk=0x%x\n", psta->wpa_psk); -+ RTW_INFO("wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher); -+ RTW_INFO("wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher); -+ RTW_INFO("qos_info=0x%x\n", psta->qos_info); -+#endif -+ RTW_INFO("dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy); -+ -+ sta_rx_reorder_ctl_dump(RTW_DBGDUMP, psta); -+ } -+ -+ } -+ } -+ -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ } -+ break; -+ -+ case 0x0b: { /* Enable=1, Disable=0 driver control vrtl_carrier_sense. */ -+ /* u8 driver_vcs_en; */ /* Enable=1, Disable=0 driver control vrtl_carrier_sense. */ -+ /* u8 driver_vcs_type; */ /* force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. */ -+ -+ if (arg == 0) { -+ RTW_INFO("disable driver ctrl vcs\n"); -+ padapter->driver_vcs_en = 0; -+ } else if (arg == 1) { -+ RTW_INFO("enable driver ctrl vcs = %d\n", extra_arg); -+ padapter->driver_vcs_en = 1; -+ -+ if (extra_arg > 2) -+ padapter->driver_vcs_type = 1; -+ else -+ padapter->driver_vcs_type = extra_arg; -+ } -+ } -+ break; -+ case 0x0c: { /* dump rx/tx packet */ -+ if (arg == 0) { -+ RTW_INFO("dump rx packet (%d)\n", extra_arg); -+ /* pHalData->bDumpRxPkt =extra_arg; */ -+ rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DUMP_RXPKT, &(extra_arg)); -+ } else if (arg == 1) { -+ RTW_INFO("dump tx packet (%d)\n", extra_arg); -+ rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(extra_arg)); -+ } -+ } -+ break; -+ case 0x0e: { -+ if (arg == 0) { -+ RTW_INFO("disable driver ctrl rx_ampdu_factor\n"); -+ padapter->driver_rx_ampdu_factor = 0xFF; -+ } else if (arg == 1) { -+ -+ RTW_INFO("enable driver ctrl rx_ampdu_factor = %d\n", extra_arg); -+ -+ if (extra_arg > 0x03) -+ padapter->driver_rx_ampdu_factor = 0xFF; -+ else -+ padapter->driver_rx_ampdu_factor = extra_arg; -+ } -+ } -+ break; -+ #ifdef DBG_CONFIG_ERROR_DETECT -+ case 0x0f: { -+ if (extra_arg == 0) { -+ RTW_INFO("###### silent reset test.......#####\n"); -+ rtw_hal_sreset_reset(padapter); -+ } else { -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+ psrtpriv->dbg_trigger_point = extra_arg; -+ } -+ -+ } -+ break; -+ case 0x15: { -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ RTW_INFO("==>silent resete cnts:%d\n", pwrpriv->ips_enter_cnts); -+ } -+ break; -+ -+ #endif -+ -+ case 0x10: /* driver version display */ -+ dump_drv_version(RTW_DBGDUMP); -+ break; -+ case 0x11: { /* dump linked status */ -+ int pre_mode; -+ pre_mode = padapter->bLinkInfoDump; -+ /* linked_info_dump(padapter,extra_arg); */ -+ if (extra_arg == 1 || (extra_arg == 0 && pre_mode == 1)) /* not consider pwr_saving 0: */ -+ padapter->bLinkInfoDump = extra_arg; -+ -+ else if ((extra_arg == 2) || (extra_arg == 0 && pre_mode == 2)) { /* consider power_saving */ -+ /* RTW_INFO("linked_info_dump =%s\n", (padapter->bLinkInfoDump)?"enable":"disable") */ -+ linked_info_dump(padapter, extra_arg); -+ } -+ -+ -+ -+ } -+ break; -+#ifdef CONFIG_80211N_HT -+ case 0x12: { /* set rx_stbc */ -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ /* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, 0x3: enable both 2.4g and 5g */ -+ /* default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */ -+ if (pregpriv && (extra_arg == 0 || extra_arg == 1 || extra_arg == 2 || extra_arg == 3)) { -+ pregpriv->rx_stbc = extra_arg; -+ RTW_INFO("set rx_stbc=%d\n", pregpriv->rx_stbc); -+ } else -+ RTW_INFO("get rx_stbc=%d\n", pregpriv->rx_stbc); -+ -+ } -+ break; -+ case 0x13: { /* set ampdu_enable */ -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ /* 0: disable, 0x1:enable */ -+ if (pregpriv && extra_arg < 2) { -+ pregpriv->ampdu_enable = extra_arg; -+ RTW_INFO("set ampdu_enable=%d\n", pregpriv->ampdu_enable); -+ } else -+ RTW_INFO("get ampdu_enable=%d\n", pregpriv->ampdu_enable); -+ -+ } -+ break; -+#endif -+ case 0x14: { /* get wifi_spec */ -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ RTW_INFO("get wifi_spec=%d\n", pregpriv->wifi_spec); -+ -+ } -+ break; -+ -+#ifdef DBG_FIXED_CHAN -+ case 0x17: { -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ printk("===> Fixed channel to %d\n", extra_arg); -+ pmlmeext->fixed_chan = extra_arg; -+ -+ } -+ break; -+#endif -+#ifdef CONFIG_80211N_HT -+ case 0x19: { -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ /* extra_arg : */ -+ /* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, */ -+ /* BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx */ -+ if (arg == 0) { -+ RTW_INFO("driver disable LDPC\n"); -+ pregistrypriv->ldpc_cap = 0x00; -+ } else if (arg == 1) { -+ RTW_INFO("driver set LDPC cap = 0x%x\n", extra_arg); -+ pregistrypriv->ldpc_cap = (u8)(extra_arg & 0x33); -+ } -+ } -+ break; -+ case 0x1a: { -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ /* extra_arg : */ -+ /* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, */ -+ /* BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx */ -+ if (arg == 0) { -+ RTW_INFO("driver disable STBC\n"); -+ pregistrypriv->stbc_cap = 0x00; -+ } else if (arg == 1) { -+ RTW_INFO("driver set STBC cap = 0x%x\n", extra_arg); -+ pregistrypriv->stbc_cap = (u8)(extra_arg & 0x33); -+ } -+ } -+ break; -+#endif /* CONFIG_80211N_HT */ -+ case 0x1b: { -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ -+ if (arg == 0) { -+ RTW_INFO("disable driver ctrl max_rx_rate, reset to default_rate_set\n"); -+ init_mlme_default_rate_set(padapter); -+#ifdef CONFIG_80211N_HT -+ pregistrypriv->ht_enable = (u8)rtw_ht_enable; -+#endif /* CONFIG_80211N_HT */ -+ } else if (arg == 1) { -+ -+ int i; -+ u8 max_rx_rate; -+ -+ RTW_INFO("enable driver ctrl max_rx_rate = 0x%x\n", extra_arg); -+ -+ max_rx_rate = (u8)extra_arg; -+ -+ if (max_rx_rate < 0xc) { /* max_rx_rate < MSC0->B or G -> disable HT */ -+#ifdef CONFIG_80211N_HT -+ pregistrypriv->ht_enable = 0; -+#endif /* CONFIG_80211N_HT */ -+ for (i = 0; i < NumRates; i++) { -+ if (pmlmeext->datarate[i] > max_rx_rate) -+ pmlmeext->datarate[i] = 0xff; -+ } -+ -+ } -+#ifdef CONFIG_80211N_HT -+ else if (max_rx_rate < 0x1c) { /* mcs0~mcs15 */ -+ u32 mcs_bitmap = 0x0; -+ -+ for (i = 0; i < ((max_rx_rate + 1) - 0xc); i++) -+ mcs_bitmap |= BIT(i); -+ -+ set_mcs_rate_by_mask(pmlmeext->default_supported_mcs_set, mcs_bitmap); -+ } -+#endif /* CONFIG_80211N_HT */ -+ } -+ } -+ break; -+ case 0x1c: { /* enable/disable driver control AMPDU Density for peer sta's rx */ -+ if (arg == 0) { -+ RTW_INFO("disable driver ctrl ampdu density\n"); -+ padapter->driver_ampdu_spacing = 0xFF; -+ } else if (arg == 1) { -+ -+ RTW_INFO("enable driver ctrl ampdu density = %d\n", extra_arg); -+ -+ if (extra_arg > 0x07) -+ padapter->driver_ampdu_spacing = 0xFF; -+ else -+ padapter->driver_ampdu_spacing = extra_arg; -+ } -+ } -+ break; -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ case 0x1e: { -+ RTW_INFO("===========================================\n"); -+ rtw_noise_measure_curchan(padapter); -+ RTW_INFO("===========================================\n"); -+ } -+ break; -+#endif -+ -+ -+#if defined(CONFIG_SDIO_HCI) && defined(CONFIG_SDIO_INDIRECT_ACCESS) && defined(DBG_SDIO_INDIRECT_ACCESS) -+ case 0x1f: -+ { -+ int i, j = 0, test_cnts = 0; -+ static u8 test_code = 0x5A; -+ static u32 data_misatch_cnt = 0, d_acc_err_cnt = 0; -+ -+ u32 d_data, i_data; -+ u32 imr; -+ -+ test_cnts = extra_arg; -+ for (i = 0; i < test_cnts; i++) { -+ if (RTW_CANNOT_IO(padapter)) -+ break; -+ -+ rtw_write8(padapter, 0x07, test_code); -+ -+ d_data = rtw_read32(padapter, 0x04); -+ imr = rtw_read32(padapter, 0x10250014); -+ rtw_write32(padapter, 0x10250014, 0); -+ rtw_msleep_os(50); -+ -+ i_data = rtw_sd_iread32(padapter, 0x04); -+ -+ rtw_write32(padapter, 0x10250014, imr); -+ -+ if (d_data != i_data) { -+ data_misatch_cnt++; -+ RTW_ERR("d_data :0x%08x, i_data : 0x%08x\n", d_data, i_data); -+ } -+ -+ if (test_code != (i_data >> 24)) { -+ d_acc_err_cnt++; -+ rtw_write8(padapter, 0x07, 0xAA); -+ RTW_ERR("test_code :0x%02x, i_data : 0x%08x\n", test_code, i_data); -+ } -+ if ((j++) == 100) { -+ rtw_msleep_os(2000); -+ RTW_INFO(" Indirect access testing..........%d/%d\n", i, test_cnts); -+ j = 0; -+ } -+ -+ test_code = ~test_code; -+ rtw_msleep_os(50); -+ } -+ RTW_INFO("========Indirect access test=========\n"); -+ RTW_INFO(" test_cnts = %d\n", test_cnts); -+ RTW_INFO(" direct & indirect read32 data missatch cnts = %d\n", data_misatch_cnt); -+ RTW_INFO(" indirect rdata is not equal to wdata cnts = %d\n", d_acc_err_cnt); -+ RTW_INFO("========Indirect access test=========\n\n"); -+ data_misatch_cnt = d_acc_err_cnt = 0; -+ -+ } -+ break; -+#endif -+ case 0x20: -+ { -+ if (arg == 0xAA) { -+ u8 page_offset, page_num; -+ -+ page_offset = (u8)(extra_arg >> 16); -+ page_num = (u8)(extra_arg & 0xFF); -+ rtw_dump_rsvd_page(RTW_DBGDUMP, padapter, page_offset, page_num); -+ } -+#ifdef CONFIG_SUPPORT_FIFO_DUMP -+ else { -+ u8 fifo_sel; -+ u32 addr, size; -+ -+ fifo_sel = (u8)(arg & 0x0F); -+ addr = (extra_arg >> 16) & 0xFFFF; -+ size = extra_arg & 0xFFFF; -+ rtw_dump_fifo(RTW_DBGDUMP, padapter, fifo_sel, addr, size); -+ } -+#endif -+ } -+ break; -+ -+ case 0x23: { -+ RTW_INFO("turn %s the bNotifyChannelChange Variable\n", (extra_arg == 1) ? "on" : "off"); -+ padapter->bNotifyChannelChange = extra_arg; -+ break; -+ } -+ case 0x24: { -+#ifdef CONFIG_P2P -+ RTW_INFO("turn %s the bShowGetP2PState Variable\n", (extra_arg == 1) ? "on" : "off"); -+ padapter->bShowGetP2PState = extra_arg; -+#endif /* CONFIG_P2P */ -+ break; -+ } -+#ifdef CONFIG_GPIO_API -+ case 0x25: { /* Get GPIO register */ -+ /* -+ * dbg 0x7f250000 [gpio_num], Get gpio value, gpio_num:0~7 -+ */ -+ -+ u8 value; -+ RTW_INFO("Read GPIO Value extra_arg = %d\n", extra_arg); -+ value = rtw_hal_get_gpio(padapter, extra_arg); -+ RTW_INFO("Read GPIO Value = %d\n", value); -+ break; -+ } -+ case 0x26: { /* Set GPIO direction */ -+ -+ /* dbg 0x7f26000x [y], Set gpio direction, -+ * x: gpio_num,4~7 y: indicate direction, 0~1 -+ */ -+ -+ int value; -+ RTW_INFO("Set GPIO Direction! arg = %d ,extra_arg=%d\n", arg , extra_arg); -+ value = rtw_hal_config_gpio(padapter, arg, extra_arg); -+ RTW_INFO("Set GPIO Direction %s\n", (value == -1) ? "Fail!!!" : "Success"); -+ break; -+ } -+ case 0x27: { /* Set GPIO output direction value */ -+ /* -+ * dbg 0x7f27000x [y], Set gpio output direction value, -+ * x: gpio_num,4~7 y: indicate direction, 0~1 -+ */ -+ -+ int value; -+ RTW_INFO("Set GPIO Value! arg = %d ,extra_arg=%d\n", arg , extra_arg); -+ value = rtw_hal_set_gpio_output_value(padapter, arg, extra_arg); -+ RTW_INFO("Set GPIO Value %s\n", (value == -1) ? "Fail!!!" : "Success"); -+ break; -+ } -+#endif -+#ifdef DBG_CMD_QUEUE -+ case 0x28: { -+ dump_cmd_id = extra_arg; -+ RTW_INFO("dump_cmd_id:%d\n", dump_cmd_id); -+ } -+ break; -+#endif /* DBG_CMD_QUEUE */ -+ case 0xaa: { -+ if ((extra_arg & 0x7F) > 0x3F) -+ extra_arg = 0xFF; -+ RTW_INFO("chang data rate to :0x%02x\n", extra_arg); -+ padapter->fix_rate = extra_arg; -+ } -+ break; -+ case 0xdd: { /* registers dump , 0 for mac reg,1 for bb reg, 2 for rf reg */ -+ if (extra_arg == 0) -+ mac_reg_dump(RTW_DBGDUMP, padapter); -+ else if (extra_arg == 1) -+ bb_reg_dump(RTW_DBGDUMP, padapter); -+ else if (extra_arg == 2) -+ rf_reg_dump(RTW_DBGDUMP, padapter); -+ else if (extra_arg == 11) -+ bb_reg_dump_ex(RTW_DBGDUMP, padapter); -+ } -+ break; -+ -+ case 0xee: { -+ RTW_INFO(" === please control /proc to trun on/off PHYDM func ===\n"); -+ } -+ break; -+ -+ case 0xfd: -+ rtw_write8(padapter, 0xc50, arg); -+ RTW_INFO("wr(0xc50)=0x%x\n", rtw_read8(padapter, 0xc50)); -+ rtw_write8(padapter, 0xc58, arg); -+ RTW_INFO("wr(0xc58)=0x%x\n", rtw_read8(padapter, 0xc58)); -+ break; -+ case 0xfe: -+ RTW_INFO("rd(0xc50)=0x%x\n", rtw_read8(padapter, 0xc50)); -+ RTW_INFO("rd(0xc58)=0x%x\n", rtw_read8(padapter, 0xc58)); -+ break; -+ case 0xff: { -+ RTW_INFO("dbg(0x210)=0x%x\n", rtw_read32(padapter, 0x210)); -+ RTW_INFO("dbg(0x608)=0x%x\n", rtw_read32(padapter, 0x608)); -+ RTW_INFO("dbg(0x280)=0x%x\n", rtw_read32(padapter, 0x280)); -+ RTW_INFO("dbg(0x284)=0x%x\n", rtw_read32(padapter, 0x284)); -+ RTW_INFO("dbg(0x288)=0x%x\n", rtw_read32(padapter, 0x288)); -+ -+ RTW_INFO("dbg(0x664)=0x%x\n", rtw_read32(padapter, 0x664)); -+ -+ -+ RTW_INFO("\n"); -+ -+ RTW_INFO("dbg(0x430)=0x%x\n", rtw_read32(padapter, 0x430)); -+ RTW_INFO("dbg(0x438)=0x%x\n", rtw_read32(padapter, 0x438)); -+ -+ RTW_INFO("dbg(0x440)=0x%x\n", rtw_read32(padapter, 0x440)); -+ -+ RTW_INFO("dbg(0x458)=0x%x\n", rtw_read32(padapter, 0x458)); -+ -+ RTW_INFO("dbg(0x484)=0x%x\n", rtw_read32(padapter, 0x484)); -+ RTW_INFO("dbg(0x488)=0x%x\n", rtw_read32(padapter, 0x488)); -+ -+ RTW_INFO("dbg(0x444)=0x%x\n", rtw_read32(padapter, 0x444)); -+ RTW_INFO("dbg(0x448)=0x%x\n", rtw_read32(padapter, 0x448)); -+ RTW_INFO("dbg(0x44c)=0x%x\n", rtw_read32(padapter, 0x44c)); -+ RTW_INFO("dbg(0x450)=0x%x\n", rtw_read32(padapter, 0x450)); -+ } -+ break; -+ } -+ break; -+ default: -+ RTW_INFO("error dbg cmd!\n"); -+ break; -+ } -+ -+#endif -+ return ret; -+ -+} -+ -+#ifdef CONFIG_IOCTL_WEXT -+static int wpa_set_param(struct net_device *dev, u8 name, u32 value) -+{ -+ uint ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ switch (name) { -+ case IEEE_PARAM_WPA_ENABLED: -+ -+ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; /* 802.1x */ -+ -+ /* ret = ieee80211_wpa_enable(ieee, value); */ -+ -+ switch ((value) & 0xff) { -+ case 1: /* WPA */ -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPAPSK; /* WPA_PSK */ -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; -+ break; -+ case 2: /* WPA2 */ -+ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPA2PSK; /* WPA2_PSK */ -+ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; -+ break; -+ } -+ -+ -+ break; -+ -+ case IEEE_PARAM_TKIP_COUNTERMEASURES: -+ /* ieee->tkip_countermeasures=value; */ -+ break; -+ -+ case IEEE_PARAM_DROP_UNENCRYPTED: { -+ /* HACK: -+ * -+ * wpa_supplicant calls set_wpa_enabled when the driver -+ * is loaded and unloaded, regardless of if WPA is being -+ * used. No other calls are made which can be used to -+ * determine if encryption will be used or not prior to -+ * association being expected. If encryption is not being -+ * used, drop_unencrypted is set to false, else true -- we -+ * can use this to determine if the CAP_PRIVACY_ON bit should -+ * be set. -+ */ -+ -+#if 0 -+ struct ieee80211_security sec = { -+ .flags = SEC_ENABLED, -+ .enabled = value, -+ }; -+ ieee->drop_unencrypted = value; -+ /* We only change SEC_LEVEL for open mode. Others -+ * are set by ipw_wpa_set_encryption. -+ */ -+ if (!value) { -+ sec.flags |= SEC_LEVEL; -+ sec.level = SEC_LEVEL_0; -+ } else { -+ sec.flags |= SEC_LEVEL; -+ sec.level = SEC_LEVEL_1; -+ } -+ if (ieee->set_security) -+ ieee->set_security(ieee->dev, &sec); -+#endif -+ break; -+ -+ } -+ case IEEE_PARAM_PRIVACY_INVOKED: -+ -+ /* ieee->privacy_invoked=value; */ -+ -+ break; -+ -+ case IEEE_PARAM_AUTH_ALGS: -+ -+ ret = wpa_set_auth_algs(dev, value); -+ -+ break; -+ -+ case IEEE_PARAM_IEEE_802_1X: -+ -+ /* ieee->ieee802_1x=value; */ -+ -+ break; -+ -+ case IEEE_PARAM_WPAX_SELECT: -+ -+ /* added for WPA2 mixed mode */ -+ /*RTW_WARN("------------------------>wpax value = %x\n", value);*/ -+ /* -+ spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags); -+ ieee->wpax_type_set = 1; -+ ieee->wpax_type_notify = value; -+ spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags); -+ */ -+ -+ break; -+ -+ default: -+ -+ -+ -+ ret = -EOPNOTSUPP; -+ -+ -+ break; -+ -+ } -+ -+ return ret; -+ -+} -+ -+static int wpa_mlme(struct net_device *dev, u32 command, u32 reason) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ switch (command) { -+ case IEEE_MLME_STA_DEAUTH: -+ -+ if (!rtw_set_802_11_disassociate(padapter)) -+ ret = -1; -+ -+ break; -+ -+ case IEEE_MLME_STA_DISASSOC: -+ -+ if (!rtw_set_802_11_disassociate(padapter)) -+ ret = -1; -+ -+ break; -+ -+ default: -+ ret = -EOPNOTSUPP; -+ break; -+ } -+#ifdef CONFIG_RTW_REPEATER_SON -+ rtw_rson_do_disconnect(padapter); -+#endif -+ return ret; -+ -+} -+ -+static int wpa_supplicant_ioctl(struct net_device *dev, struct iw_point *p) -+{ -+ struct ieee_param *param; -+ uint ret = 0; -+ -+ /* down(&ieee->wx_sem); */ -+ -+ if (p->length < sizeof(struct ieee_param) || !p->pointer) { -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ param = (struct ieee_param *)rtw_malloc(p->length); -+ if (param == NULL) { -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ if (copy_from_user(param, p->pointer, p->length)) { -+ rtw_mfree((u8 *)param, p->length); -+ ret = -EFAULT; -+ goto out; -+ } -+ -+ switch (param->cmd) { -+ -+ case IEEE_CMD_SET_WPA_PARAM: -+ ret = wpa_set_param(dev, param->u.wpa_param.name, param->u.wpa_param.value); -+ break; -+ -+ case IEEE_CMD_SET_WPA_IE: -+ /* ret = wpa_set_wpa_ie(dev, param, p->length); */ -+ ret = rtw_set_wpa_ie((_adapter *)rtw_netdev_priv(dev), (char *)param->u.wpa_ie.data, (u16)param->u.wpa_ie.len); -+ break; -+ -+ case IEEE_CMD_SET_ENCRYPTION: -+ ret = wpa_set_encryption(dev, param, p->length); -+ break; -+ -+ case IEEE_CMD_MLME: -+ ret = wpa_mlme(dev, param->u.mlme.command, param->u.mlme.reason_code); -+ break; -+ -+ default: -+ RTW_INFO("Unknown WPA supplicant request: %d\n", param->cmd); -+ ret = -EOPNOTSUPP; -+ break; -+ -+ } -+ -+ if (ret == 0 && copy_to_user(p->pointer, param, p->length)) -+ ret = -EFAULT; -+ -+ rtw_mfree((u8 *)param, p->length); -+ -+out: -+ -+ /* up(&ieee->wx_sem); */ -+ -+ return ret; -+ -+} -+ -+#ifdef CONFIG_AP_MODE -+static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) -+{ -+ int ret = 0; -+ u32 wep_key_idx, wep_key_len, wep_total_len; -+ NDIS_802_11_WEP *pwep = NULL; -+ struct sta_info *psta = NULL, *pbcmc_sta = NULL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ param->u.crypt.err = 0; -+ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; -+ -+ /* sizeof(struct ieee_param) = 64 bytes; */ -+ /* if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) */ -+ if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && -+ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && -+ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { -+ if (param->u.crypt.idx >= WEP_KEYS -+#ifdef CONFIG_IEEE80211W -+ && param->u.crypt.idx > BIP_MAX_KEYID -+#endif /* CONFIG_IEEE80211W */ -+ ) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ } else { -+ psta = rtw_get_stainfo(pstapriv, param->sta_addr); -+ if (!psta) { -+ /* ret = -EINVAL; */ -+ RTW_INFO("rtw_set_encryption(), sta has already been removed or never been added\n"); -+ goto exit; -+ } -+ } -+ -+ if (strcmp(param->u.crypt.alg, "none") == 0 && (psta == NULL)) { -+ /* todo:clear default encryption keys */ -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; -+ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; -+ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ -+ RTW_INFO("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); -+ -+ goto exit; -+ } -+ -+ -+ if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta == NULL)) { -+ RTW_INFO("r871x_set_encryption, crypt.alg = WEP\n"); -+ -+ wep_key_idx = param->u.crypt.idx; -+ wep_key_len = param->u.crypt.key_len; -+ -+ RTW_INFO("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); -+ -+ if ((wep_key_idx >= WEP_KEYS) || (wep_key_len <= 0)) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ -+ if (wep_key_len > 0) { -+ wep_key_len = wep_key_len <= 5 ? 5 : 13; -+ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); -+ pwep = (NDIS_802_11_WEP *)rtw_malloc(wep_total_len); -+ if (pwep == NULL) { -+ RTW_INFO(" r871x_set_encryption: pwep allocate fail !!!\n"); -+ goto exit; -+ } -+ -+ _rtw_memset(pwep, 0, wep_total_len); -+ -+ pwep->KeyLength = wep_key_len; -+ pwep->Length = wep_total_len; -+ -+ } -+ -+ pwep->KeyIndex = wep_key_idx; -+ -+ _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); -+ -+ if (param->u.crypt.set_tx) { -+ RTW_INFO("wep, set_tx=1\n"); -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; -+ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ -+ if (pwep->KeyLength == 13) { -+ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ } -+ -+ -+ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; -+ -+ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); -+ -+ psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength; -+ -+ rtw_ap_set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx, 1); -+ } else { -+ RTW_INFO("wep, set_tx=0\n"); -+ -+ /* don't update "psecuritypriv->dot11PrivacyAlgrthm" and */ -+ /* "psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to cam */ -+ -+ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); -+ -+ psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength; -+ -+ rtw_ap_set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx, 0); -+ } -+ -+ goto exit; -+ -+ } -+ -+ -+ if (!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) /* */ { /* group key */ -+ if (param->u.crypt.set_tx == 1) { -+ if (strcmp(param->u.crypt.alg, "WEP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set WEP TX GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; -+ if (param->u.crypt.key_len == 13) -+ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; -+ -+ } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set TKIP TX GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ /* set mic key */ -+ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); -+ psecuritypriv->busetkipkey = _TRUE; -+ -+ } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set CCMP TX GTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ psecuritypriv->dot118021XGrpPrivacy = _AES_; -+ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ -+ #ifdef CONFIG_IEEE80211W -+ } else if (strcmp(param->u.crypt.alg, "BIP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set TX IGTK idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx, param->u.crypt.key_len); -+ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ psecuritypriv->dot11wBIPKeyid = param->u.crypt.idx; -+ psecuritypriv->dot11wBIPtxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psecuritypriv->binstallBIPkey = _TRUE; -+ goto exit; -+ #endif /* CONFIG_IEEE80211W */ -+ -+ } else if (strcmp(param->u.crypt.alg, "none") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" clear group key, idx:%u\n" -+ , FUNC_ADPT_ARG(padapter), param->u.crypt.idx); -+ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ } else { -+ RTW_WARN(FUNC_ADPT_FMT" set group key, not support\n" -+ , FUNC_ADPT_ARG(padapter)); -+ goto exit; -+ } -+ -+ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; -+ pbcmc_sta = rtw_get_bcmc_stainfo(padapter); -+ if (pbcmc_sta) { -+ pbcmc_sta->dot11txpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ pbcmc_sta->ieee8021x_blocked = _FALSE; -+ pbcmc_sta->dot118021XPrivacy = psecuritypriv->dot118021XGrpPrivacy; /* rx will use bmc_sta's dot118021XPrivacy */ -+ } -+ psecuritypriv->binstallGrpkey = _TRUE; -+ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;/* !!! */ -+ -+ rtw_ap_set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); -+ } -+ -+ goto exit; -+ -+ } -+ -+ if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) { /* psk/802_1x */ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { -+ if (param->u.crypt.set_tx == 1) { -+ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); -+ -+ if (strcmp(param->u.crypt.alg, "WEP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set WEP PTK of "MAC_FMT" idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot118021XPrivacy = _WEP40_; -+ if (param->u.crypt.key_len == 13) -+ psta->dot118021XPrivacy = _WEP104_; -+ -+ } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set TKIP PTK of "MAC_FMT" idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot118021XPrivacy = _TKIP_; -+ /* set mic key */ -+ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); -+ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); -+ psecuritypriv->busetkipkey = _TRUE; -+ -+ } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" set CCMP PTK of "MAC_FMT" idx:%u, len:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx, param->u.crypt.key_len); -+ psta->dot118021XPrivacy = _AES_; -+ -+ } else if (strcmp(param->u.crypt.alg, "none") == 0) { -+ RTW_INFO(FUNC_ADPT_FMT" clear pairwise key of "MAC_FMT" idx:%u\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr) -+ , param->u.crypt.idx); -+ psta->dot118021XPrivacy = _NO_PRIVACY_; -+ -+ } else { -+ RTW_WARN(FUNC_ADPT_FMT" set pairwise key of "MAC_FMT", not support\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)); -+ goto exit; -+ } -+ -+ psta->dot11txpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psta->dot11rxpn.val = RTW_GET_LE64(param->u.crypt.seq); -+ psta->ieee8021x_blocked = _FALSE; -+ -+ if (psta->dot118021XPrivacy != _NO_PRIVACY_) { -+ psta->bpairwise_key_installed = _TRUE; -+ -+ /* WPA2 key-handshake has completed */ -+ if (psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) -+ psta->state &= (~WIFI_UNDER_KEY_HANDSHAKE); -+ } -+ -+ rtw_ap_set_pairwise_key(padapter, psta); -+ } else { -+ RTW_WARN(FUNC_ADPT_FMT" set group key of "MAC_FMT", not support\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr)); -+ goto exit; -+ } -+ -+ } -+ -+ } -+ -+exit: -+ -+ if (pwep) -+ rtw_mfree((u8 *)pwep, wep_total_len); -+ -+ return ret; -+ -+} -+ -+static int rtw_set_beacon(struct net_device *dev, struct ieee_param *param, int len) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ unsigned char *pbuf = param->u.bcn_ie.buf; -+ -+ -+ RTW_INFO("%s, len=%d\n", __FUNCTION__, len); -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EINVAL; -+ -+ _rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); -+ -+ if ((pstapriv->max_num_sta > NUM_STA) || (pstapriv->max_num_sta <= 0)) -+ pstapriv->max_num_sta = NUM_STA; -+ -+ -+ if (rtw_check_beacon_data(padapter, pbuf, (len - 12 - 2)) == _SUCCESS) /* 12 = param header, 2:no packed */ -+ ret = 0; -+ else -+ ret = -EINVAL; -+ -+ -+ return ret; -+ -+} -+ -+static int rtw_hostapd_sta_flush(struct net_device *dev) -+{ -+ /* _irqL irqL; */ -+ /* _list *phead, *plist; */ -+ int ret = 0; -+ /* struct sta_info *psta = NULL; */ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ /* struct sta_priv *pstapriv = &padapter->stapriv; */ -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ flush_all_cam_entry(padapter); /* clear CAM */ -+#ifdef CONFIG_AP_MODE -+ ret = rtw_sta_flush(padapter, _TRUE); -+#endif -+ return ret; -+ -+} -+ -+static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) -+{ -+ int ret = 0; -+ struct sta_info *psta = NULL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ RTW_INFO("rtw_add_sta(aid=%d)=" MAC_FMT "\n", param->u.add_sta.aid, MAC_ARG(param->sta_addr)); -+ -+ if (check_fwstate(pmlmepriv, (WIFI_ASOC_STATE | WIFI_AP_STATE)) != _TRUE) -+ return -EINVAL; -+ -+ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && -+ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && -+ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) -+ return -EINVAL; -+ -+#if 0 -+ psta = rtw_get_stainfo(pstapriv, param->sta_addr); -+ if (psta) { -+ RTW_INFO("rtw_add_sta(), free has been added psta=%p\n", psta); -+ /* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ rtw_free_stainfo(padapter, psta); -+ /* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); */ -+ -+ psta = NULL; -+ } -+#endif -+ /* psta = rtw_alloc_stainfo(pstapriv, param->sta_addr); */ -+ psta = rtw_get_stainfo(pstapriv, param->sta_addr); -+ if (psta) { -+ int flags = param->u.add_sta.flags; -+ -+ /* RTW_INFO("rtw_add_sta(), init sta's variables, psta=%p\n", psta); */ -+ -+ psta->cmn.aid = param->u.add_sta.aid;/* aid=1~2007 */ -+ -+ _rtw_memcpy(psta->bssrateset, param->u.add_sta.tx_supp_rates, 16); -+ -+ -+ /* check wmm cap. */ -+ if (WLAN_STA_WME & flags) -+ psta->qos_option = 1; -+ else -+ psta->qos_option = 0; -+ -+ if (pmlmepriv->qospriv.qos_option == 0) -+ psta->qos_option = 0; -+ -+ -+#ifdef CONFIG_80211N_HT -+ /* chec 802.11n ht cap. */ -+ if (padapter->registrypriv.ht_enable && -+ is_supported_ht(padapter->registrypriv.wireless_mode) && -+ (WLAN_STA_HT & flags)) { -+ psta->htpriv.ht_option = _TRUE; -+ psta->qos_option = 1; -+ _rtw_memcpy((void *)&psta->htpriv.ht_cap, (void *)¶m->u.add_sta.ht_cap, sizeof(struct rtw_ieee80211_ht_cap)); -+ } else -+ psta->htpriv.ht_option = _FALSE; -+ -+ if (pmlmepriv->htpriv.ht_option == _FALSE) -+ psta->htpriv.ht_option = _FALSE; -+ -+#endif -+ -+ -+ update_sta_info_apmode(padapter, psta); -+ -+ -+ } else -+ ret = -ENOMEM; -+ -+ return ret; -+ -+} -+ -+static int rtw_del_sta(struct net_device *dev, struct ieee_param *param) -+{ -+ _irqL irqL; -+ int ret = 0; -+ struct sta_info *psta = NULL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ RTW_INFO("rtw_del_sta=" MAC_FMT "\n", MAC_ARG(param->sta_addr)); -+ -+ if (check_fwstate(pmlmepriv, (WIFI_ASOC_STATE | WIFI_AP_STATE)) != _TRUE) -+ return -EINVAL; -+ -+ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && -+ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && -+ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) -+ return -EINVAL; -+ -+ psta = rtw_get_stainfo(pstapriv, param->sta_addr); -+ if (psta) { -+ u8 updated = _FALSE; -+ -+ /* RTW_INFO("free psta=%p, aid=%d\n", psta, psta->cmn.aid); */ -+ -+ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ if (rtw_is_list_empty(&psta->asoc_list) == _FALSE) { -+ rtw_list_delete(&psta->asoc_list); -+ pstapriv->asoc_list_cnt--; -+ #ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ if (psta->tbtx_enable) -+ pstapriv->tbtx_asoc_list_cnt--; -+ #endif -+ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); -+ -+ } -+ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); -+ -+ associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL); -+ -+ psta = NULL; -+ -+ } else { -+ RTW_INFO("rtw_del_sta(), sta has already been removed or never been added\n"); -+ -+ /* ret = -1; */ -+ } -+ -+ -+ return ret; -+ -+} -+ -+static int rtw_ioctl_get_sta_data(struct net_device *dev, struct ieee_param *param, int len) -+{ -+ int ret = 0; -+ struct sta_info *psta = NULL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct ieee_param_ex *param_ex = (struct ieee_param_ex *)param; -+ struct sta_data *psta_data = (struct sta_data *)param_ex->data; -+ -+ RTW_INFO("rtw_ioctl_get_sta_info, sta_addr: " MAC_FMT "\n", MAC_ARG(param_ex->sta_addr)); -+ -+ if (check_fwstate(pmlmepriv, (WIFI_ASOC_STATE | WIFI_AP_STATE)) != _TRUE) -+ return -EINVAL; -+ -+ if (param_ex->sta_addr[0] == 0xff && param_ex->sta_addr[1] == 0xff && -+ param_ex->sta_addr[2] == 0xff && param_ex->sta_addr[3] == 0xff && -+ param_ex->sta_addr[4] == 0xff && param_ex->sta_addr[5] == 0xff) -+ return -EINVAL; -+ -+ psta = rtw_get_stainfo(pstapriv, param_ex->sta_addr); -+ if (psta) { -+#if 0 -+ struct { -+ u16 aid; -+ u16 capability; -+ int flags; -+ u32 sta_set; -+ u8 tx_supp_rates[16]; -+ u32 tx_supp_rates_len; -+ struct rtw_ieee80211_ht_cap ht_cap; -+ u64 rx_pkts; -+ u64 rx_bytes; -+ u64 rx_drops; -+ u64 tx_pkts; -+ u64 tx_bytes; -+ u64 tx_drops; -+ } get_sta; -+#endif -+ psta_data->aid = (u16)psta->cmn.aid; -+ psta_data->capability = psta->capability; -+ psta_data->flags = psta->flags; -+ -+ /* -+ nonerp_set : BIT(0) -+ no_short_slot_time_set : BIT(1) -+ no_short_preamble_set : BIT(2) -+ no_ht_gf_set : BIT(3) -+ no_ht_set : BIT(4) -+ ht_20mhz_set : BIT(5) -+ */ -+ -+ psta_data->sta_set = ((psta->nonerp_set) | -+ (psta->no_short_slot_time_set << 1) | -+ (psta->no_short_preamble_set << 2) | -+ (psta->no_ht_gf_set << 3) | -+ (psta->no_ht_set << 4) | -+ (psta->ht_20mhz_set << 5)); -+ -+ psta_data->tx_supp_rates_len = psta->bssratelen; -+ _rtw_memcpy(psta_data->tx_supp_rates, psta->bssrateset, psta->bssratelen); -+#ifdef CONFIG_80211N_HT -+ if(padapter->registrypriv.ht_enable && is_supported_ht(padapter->registrypriv.wireless_mode)) -+ _rtw_memcpy(&psta_data->ht_cap, &psta->htpriv.ht_cap, sizeof(struct rtw_ieee80211_ht_cap)); -+#endif /* CONFIG_80211N_HT */ -+ psta_data->rx_pkts = psta->sta_stats.rx_data_pkts; -+ psta_data->rx_bytes = psta->sta_stats.rx_bytes; -+ psta_data->rx_drops = psta->sta_stats.rx_drops; -+ -+ psta_data->tx_pkts = psta->sta_stats.tx_pkts; -+ psta_data->tx_bytes = psta->sta_stats.tx_bytes; -+ psta_data->tx_drops = psta->sta_stats.tx_drops; -+ -+ -+ } else -+ ret = -1; -+ -+ return ret; -+ -+} -+ -+static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param) -+{ -+ int ret = 0; -+ struct sta_info *psta = NULL; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ RTW_INFO("rtw_get_sta_wpaie, sta_addr: " MAC_FMT "\n", MAC_ARG(param->sta_addr)); -+ -+ if (check_fwstate(pmlmepriv, (WIFI_ASOC_STATE | WIFI_AP_STATE)) != _TRUE) -+ return -EINVAL; -+ -+ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && -+ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && -+ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) -+ return -EINVAL; -+ -+ psta = rtw_get_stainfo(pstapriv, param->sta_addr); -+ if (psta) { -+ if ((psta->wpa_ie[0] == WLAN_EID_RSN) || (psta->wpa_ie[0] == WLAN_EID_GENERIC)) { -+ int wpa_ie_len; -+ int copy_len; -+ -+ wpa_ie_len = psta->wpa_ie[1]; -+ -+ copy_len = ((wpa_ie_len + 2) > sizeof(psta->wpa_ie)) ? (sizeof(psta->wpa_ie)) : (wpa_ie_len + 2); -+ -+ param->u.wpa_ie.len = copy_len; -+ -+ _rtw_memcpy(param->u.wpa_ie.reserved, psta->wpa_ie, copy_len); -+ } else { -+ /* ret = -1; */ -+ RTW_INFO("sta's wpa_ie is NONE\n"); -+ } -+ } else -+ ret = -1; -+ -+ return ret; -+ -+} -+ -+static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param, int len) -+{ -+ int ret = 0; -+ unsigned char wps_oui[4] = {0x0, 0x50, 0xf2, 0x04}; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ int ie_len; -+ -+ RTW_INFO("%s, len=%d\n", __FUNCTION__, len); -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EINVAL; -+ -+ ie_len = len - 12 - 2; /* 12 = param header, 2:no packed */ -+ -+ -+ if (pmlmepriv->wps_beacon_ie) { -+ rtw_mfree(pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len); -+ pmlmepriv->wps_beacon_ie = NULL; -+ } -+ -+ if (ie_len > 0) { -+ pmlmepriv->wps_beacon_ie = rtw_malloc(ie_len); -+ pmlmepriv->wps_beacon_ie_len = ie_len; -+ if (pmlmepriv->wps_beacon_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ } -+ -+ _rtw_memcpy(pmlmepriv->wps_beacon_ie, param->u.bcn_ie.buf, ie_len); -+ -+ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE, 0); -+ -+ pmlmeext->bstart_bss = _TRUE; -+ -+ } -+ -+ -+ return ret; -+ -+} -+ -+static int rtw_set_wps_probe_resp(struct net_device *dev, struct ieee_param *param, int len) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ int ie_len; -+ -+ RTW_INFO("%s, len=%d\n", __FUNCTION__, len); -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EINVAL; -+ -+ ie_len = len - 12 - 2; /* 12 = param header, 2:no packed */ -+ -+ -+ if (pmlmepriv->wps_probe_resp_ie) { -+ rtw_mfree(pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len); -+ pmlmepriv->wps_probe_resp_ie = NULL; -+ } -+ -+ if (ie_len > 0) { -+ pmlmepriv->wps_probe_resp_ie = rtw_malloc(ie_len); -+ pmlmepriv->wps_probe_resp_ie_len = ie_len; -+ if (pmlmepriv->wps_probe_resp_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ } -+ _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, param->u.bcn_ie.buf, ie_len); -+ } -+ -+ -+ return ret; -+ -+} -+ -+static int rtw_set_wps_assoc_resp(struct net_device *dev, struct ieee_param *param, int len) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ int ie_len; -+ -+ RTW_INFO("%s, len=%d\n", __FUNCTION__, len); -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EINVAL; -+ -+ ie_len = len - 12 - 2; /* 12 = param header, 2:no packed */ -+ -+ -+ if (pmlmepriv->wps_assoc_resp_ie) { -+ rtw_mfree(pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len); -+ pmlmepriv->wps_assoc_resp_ie = NULL; -+ } -+ -+ if (ie_len > 0) { -+ pmlmepriv->wps_assoc_resp_ie = rtw_malloc(ie_len); -+ pmlmepriv->wps_assoc_resp_ie_len = ie_len; -+ if (pmlmepriv->wps_assoc_resp_ie == NULL) { -+ RTW_INFO("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ return -EINVAL; -+ } -+ -+ _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, param->u.bcn_ie.buf, ie_len); -+ } -+ -+ -+ return ret; -+ -+} -+ -+static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, int len) -+{ -+ int ret = 0; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *mlmepriv = &(adapter->mlmepriv); -+ struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); -+ struct mlme_ext_info *mlmeinfo = &(mlmeext->mlmext_info); -+ int ie_len; -+ u8 *ssid_ie; -+ char ssid[NDIS_802_11_LENGTH_SSID + 1]; -+ sint ssid_len = 0; -+ u8 ignore_broadcast_ssid; -+ -+ if (check_fwstate(mlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EPERM; -+ -+ if (param->u.bcn_ie.reserved[0] != 0xea) -+ return -EINVAL; -+ -+ mlmeinfo->hidden_ssid_mode = ignore_broadcast_ssid = param->u.bcn_ie.reserved[1]; -+ -+ ie_len = len - 12 - 2; /* 12 = param header, 2:no packed */ -+ ssid_ie = rtw_get_ie(param->u.bcn_ie.buf, WLAN_EID_SSID, &ssid_len, ie_len); -+ -+ if (ssid_ie && ssid_len > 0 && ssid_len <= NDIS_802_11_LENGTH_SSID) { -+ WLAN_BSSID_EX *pbss_network = &mlmepriv->cur_network.network; -+ WLAN_BSSID_EX *pbss_network_ext = &mlmeinfo->network; -+ -+ _rtw_memcpy(ssid, ssid_ie + 2, ssid_len); -+ ssid[ssid_len] = 0x0; -+ -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" ssid:(%s,%d), from ie:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), -+ ssid, ssid_len, -+ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, -+ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); -+ -+ _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)ssid, ssid_len); -+ pbss_network->Ssid.SsidLength = ssid_len; -+ _rtw_memcpy(pbss_network_ext->Ssid.Ssid, (void *)ssid, ssid_len); -+ pbss_network_ext->Ssid.SsidLength = ssid_len; -+ -+ if (0) -+ RTW_INFO(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), -+ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, -+ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); -+ } -+ -+ RTW_INFO(FUNC_ADPT_FMT" ignore_broadcast_ssid:%d, %s,%d\n", FUNC_ADPT_ARG(adapter), -+ ignore_broadcast_ssid, ssid, ssid_len); -+ -+ return ret; -+} -+ -+#if CONFIG_RTW_MACADDR_ACL -+static int rtw_ioctl_acl_remove_sta(struct net_device *dev, struct ieee_param *param, int len) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EINVAL; -+ -+ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && -+ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && -+ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) -+ return -EINVAL; -+ -+ ret = rtw_acl_remove_sta(padapter, RTW_ACL_PERIOD_BSS, param->sta_addr); -+ -+ return ret; -+ -+} -+ -+static int rtw_ioctl_acl_add_sta(struct net_device *dev, struct ieee_param *param, int len) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EINVAL; -+ -+ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && -+ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && -+ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) -+ return -EINVAL; -+ -+ ret = rtw_acl_add_sta(padapter, RTW_ACL_PERIOD_BSS, param->sta_addr); -+ -+ return ret; -+ -+} -+ -+static int rtw_ioctl_set_macaddr_acl(struct net_device *dev, struct ieee_param *param, int len) -+{ -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ -+ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) -+ return -EINVAL; -+ -+ rtw_set_macaddr_acl(padapter, RTW_ACL_PERIOD_BSS, param->u.mlme.command); -+ -+ return ret; -+} -+#endif /* CONFIG_RTW_MACADDR_ACL */ -+ -+static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p) -+{ -+ struct ieee_param *param; -+ int ret = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ /* -+ * this function is expect to call in master mode, which allows no power saving -+ * so, we just check hw_init_completed -+ */ -+ -+ if (!rtw_is_hw_init_completed(padapter)) { -+ ret = -EPERM; -+ goto out; -+ } -+ -+ -+ /* if (p->length < sizeof(struct ieee_param) || !p->pointer){ */ -+ if (!p->pointer) { -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ param = (struct ieee_param *)rtw_malloc(p->length); -+ if (param == NULL) { -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ if (copy_from_user(param, p->pointer, p->length)) { -+ rtw_mfree((u8 *)param, p->length); -+ ret = -EFAULT; -+ goto out; -+ } -+ -+ /* RTW_INFO("%s, cmd=%d\n", __FUNCTION__, param->cmd); */ -+ -+ switch (param->cmd) { -+ case RTL871X_HOSTAPD_FLUSH: -+ -+ ret = rtw_hostapd_sta_flush(dev); -+ -+ break; -+ -+ case RTL871X_HOSTAPD_ADD_STA: -+ -+ ret = rtw_add_sta(dev, param); -+ -+ break; -+ -+ case RTL871X_HOSTAPD_REMOVE_STA: -+ -+ ret = rtw_del_sta(dev, param); -+ -+ break; -+ -+ case RTL871X_HOSTAPD_SET_BEACON: -+ -+ ret = rtw_set_beacon(dev, param, p->length); -+ -+ break; -+ -+ case RTL871X_SET_ENCRYPTION: -+ -+ ret = rtw_set_encryption(dev, param, p->length); -+ -+ break; -+ -+ case RTL871X_HOSTAPD_GET_WPAIE_STA: -+ -+ ret = rtw_get_sta_wpaie(dev, param); -+ -+ break; -+ -+ case RTL871X_HOSTAPD_SET_WPS_BEACON: -+ -+ ret = rtw_set_wps_beacon(dev, param, p->length); -+ -+ break; -+ -+ case RTL871X_HOSTAPD_SET_WPS_PROBE_RESP: -+ -+ ret = rtw_set_wps_probe_resp(dev, param, p->length); -+ -+ break; -+ -+ case RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP: -+ -+ ret = rtw_set_wps_assoc_resp(dev, param, p->length); -+ -+ break; -+ -+ case RTL871X_HOSTAPD_SET_HIDDEN_SSID: -+ -+ ret = rtw_set_hidden_ssid(dev, param, p->length); -+ -+ break; -+ -+ case RTL871X_HOSTAPD_GET_INFO_STA: -+ -+ ret = rtw_ioctl_get_sta_data(dev, param, p->length); -+ -+ break; -+ -+#if CONFIG_RTW_MACADDR_ACL -+ case RTL871X_HOSTAPD_SET_MACADDR_ACL: -+ ret = rtw_ioctl_set_macaddr_acl(dev, param, p->length); -+ break; -+ case RTL871X_HOSTAPD_ACL_ADD_STA: -+ ret = rtw_ioctl_acl_add_sta(dev, param, p->length); -+ break; -+ case RTL871X_HOSTAPD_ACL_REMOVE_STA: -+ ret = rtw_ioctl_acl_remove_sta(dev, param, p->length); -+ break; -+#endif /* CONFIG_RTW_MACADDR_ACL */ -+ -+ default: -+ RTW_INFO("Unknown hostapd request: %d\n", param->cmd); -+ ret = -EOPNOTSUPP; -+ break; -+ -+ } -+ -+ if (ret == 0 && copy_to_user(p->pointer, param, p->length)) -+ ret = -EFAULT; -+ -+ -+ rtw_mfree((u8 *)param, p->length); -+ -+out: -+ -+ return ret; -+ -+} -+#endif /* CONFIG_AP_MODE */ -+ -+static int rtw_wx_set_priv(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *awrq, -+ char *extra) -+{ -+ -+#ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV -+ char *ext_dbg; -+#endif -+ -+ int ret = 0; -+ int len = 0; -+ char *ext; -+#ifdef CONFIG_RTW_ANDROID -+ int i; -+#endif -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct iw_point *dwrq = (struct iw_point *)awrq; -+ -+ if (dwrq->length == 0) -+ return -EFAULT; -+ -+ len = dwrq->length; -+ ext = rtw_vmalloc(len); -+ if (!ext) -+ return -ENOMEM; -+ -+ if (copy_from_user(ext, dwrq->pointer, len)) { -+ rtw_vmfree(ext, len); -+ return -EFAULT; -+ } -+ -+ -+ -+#ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV -+ ext_dbg = rtw_vmalloc(len); -+ if (!ext_dbg) { -+ rtw_vmfree(ext, len); -+ return -ENOMEM; -+ } -+ -+ _rtw_memcpy(ext_dbg, ext, len); -+#endif -+ -+ /* added for wps2.0 @20110524 */ -+ if (dwrq->flags == 0x8766 && len > 8) { -+ u32 cp_sz; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u8 *probereq_wpsie = ext; -+ int probereq_wpsie_len = len; -+ u8 wps_oui[4] = {0x0, 0x50, 0xf2, 0x04}; -+ -+ if ((_VENDOR_SPECIFIC_IE_ == probereq_wpsie[0]) && -+ (_rtw_memcmp(&probereq_wpsie[2], wps_oui, 4) == _TRUE)) { -+ cp_sz = probereq_wpsie_len > MAX_WPS_IE_LEN ? MAX_WPS_IE_LEN : probereq_wpsie_len; -+ -+ if (pmlmepriv->wps_probe_req_ie) { -+ u32 free_len = pmlmepriv->wps_probe_req_ie_len; -+ pmlmepriv->wps_probe_req_ie_len = 0; -+ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); -+ pmlmepriv->wps_probe_req_ie = NULL; -+ } -+ -+ pmlmepriv->wps_probe_req_ie = rtw_malloc(cp_sz); -+ if (pmlmepriv->wps_probe_req_ie == NULL) { -+ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); -+ ret = -EINVAL; -+ goto FREE_EXT; -+ -+ } -+ -+ _rtw_memcpy(pmlmepriv->wps_probe_req_ie, probereq_wpsie, cp_sz); -+ pmlmepriv->wps_probe_req_ie_len = cp_sz; -+ -+ } -+ -+ goto FREE_EXT; -+ -+ } -+ -+ if (len >= WEXT_CSCAN_HEADER_SIZE -+ && _rtw_memcmp(ext, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == _TRUE -+ ) { -+ ret = rtw_wx_set_scan(dev, info, awrq, ext); -+ goto FREE_EXT; -+ } -+ -+#ifdef CONFIG_RTW_ANDROID -+ /* RTW_INFO("rtw_wx_set_priv: %s req=%s\n", dev->name, ext); */ -+ -+ i = rtw_android_cmdstr_to_num(ext); -+ -+ switch (i) { -+ case ANDROID_WIFI_CMD_START: -+ indicate_wx_custom_event(padapter, "START"); -+ break; -+ case ANDROID_WIFI_CMD_STOP: -+ indicate_wx_custom_event(padapter, "STOP"); -+ break; -+ case ANDROID_WIFI_CMD_RSSI: { -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct wlan_network *pcur_network = &pmlmepriv->cur_network; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) -+ sprintf(ext, "%s rssi %d", pcur_network->network.Ssid.Ssid, padapter->recvpriv.rssi); -+ else -+ sprintf(ext, "OK"); -+ } -+ break; -+ case ANDROID_WIFI_CMD_LINKSPEED: { -+ u16 mbps = rtw_get_cur_max_rate(padapter) / 10; -+ sprintf(ext, "LINKSPEED %d", mbps); -+ } -+ break; -+ case ANDROID_WIFI_CMD_MACADDR: -+ sprintf(ext, "MACADDR = " MAC_FMT, MAC_ARG(dev->dev_addr)); -+ break; -+ case ANDROID_WIFI_CMD_SCAN_ACTIVE: { -+ /* rtw_set_scan_mode(padapter, SCAN_ACTIVE); */ -+ sprintf(ext, "OK"); -+ } -+ break; -+ case ANDROID_WIFI_CMD_SCAN_PASSIVE: { -+ /* rtw_set_scan_mode(padapter, SCAN_PASSIVE); */ -+ sprintf(ext, "OK"); -+ } -+ break; -+ -+ case ANDROID_WIFI_CMD_COUNTRY: { -+ char country_code[10]; -+ sscanf(ext, "%*s %s", country_code); -+ rtw_set_country(padapter, country_code); -+ sprintf(ext, "OK"); -+ } -+ break; -+ default: -+ #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV -+ RTW_INFO("%s: %s unknowned req=%s\n", __FUNCTION__, -+ dev->name, ext_dbg); -+ #endif -+ -+ sprintf(ext, "OK"); -+ -+ } -+ -+ if (copy_to_user(dwrq->pointer, ext, min(dwrq->length, (u16)(strlen(ext) + 1)))) -+ ret = -EFAULT; -+ -+#ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV -+ RTW_INFO("%s: %s req=%s rep=%s dwrq->length=%d, strlen(ext)+1=%d\n", __FUNCTION__, -+ dev->name, ext_dbg , ext, dwrq->length, (u16)(strlen(ext) + 1)); -+#endif -+#endif /* end of CONFIG_ANDROID */ -+ -+ -+FREE_EXT: -+ -+ rtw_vmfree(ext, len); -+ #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV -+ rtw_vmfree(ext_dbg, len); -+ #endif -+ -+ /* RTW_INFO("rtw_wx_set_priv: (SIOCSIWPRIV) %s ret=%d\n", */ -+ /* dev->name, ret); */ -+ -+ return ret; -+ -+} -+#endif /*CONFIG_IOCTL_WEXT*/ -+ -+#ifdef CONFIG_WOWLAN -+static int rtw_wowlan_ctrl(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wowlan_ioctl_param poidparam; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ int ret = 0; -+ systime start_time = rtw_get_current_time(); -+ poidparam.subcode = 0; -+ -+ RTW_INFO("+rtw_wowlan_ctrl: %s\n", extra); -+ -+ if (!check_fwstate(pmlmepriv, WIFI_ASOC_STATE) && -+ check_fwstate(pmlmepriv, WIFI_STATION_STATE) && -+ !WOWLAN_IS_STA_MIX_MODE(padapter)) { -+#ifdef CONFIG_PNO_SUPPORT -+ pwrctrlpriv->wowlan_pno_enable = _TRUE; -+#else -+ RTW_INFO("[%s] WARNING: Please Connect With AP First!!\n", __func__); -+ goto _rtw_wowlan_ctrl_exit_free; -+#endif /* CONFIG_PNO_SUPPORT */ -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY)) -+ rtw_scan_abort(padapter); -+ -+ if (_rtw_memcmp(extra, "enable", 6)) -+ -+ -+ rtw_suspend_common(padapter); -+ -+ else if (_rtw_memcmp(extra, "disable", 7)) { -+#ifdef CONFIG_USB_HCI -+ RTW_ENABLE_FUNC(padapter, DF_RX_BIT); -+ RTW_ENABLE_FUNC(padapter, DF_TX_BIT); -+#endif -+ rtw_resume_common(padapter); -+ -+#ifdef CONFIG_PNO_SUPPORT -+ pwrctrlpriv->wowlan_pno_enable = _FALSE; -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+ } else { -+ RTW_INFO("[%s] Invalid Parameter.\n", __func__); -+ goto _rtw_wowlan_ctrl_exit_free; -+ } -+ /* mutex_lock(&ioctl_mutex); */ -+_rtw_wowlan_ctrl_exit_free: -+ RTW_INFO("-rtw_wowlan_ctrl( subcode = %d)\n", poidparam.subcode); -+ RTW_PRINT("%s in %d ms\n", __func__, -+ rtw_get_passing_time_ms(start_time)); -+ return ret; -+} -+ -+/* -+ * IP filter This pattern if for a frame containing a ip packet: -+ * AA:AA:AA:AA:AA:AA:BB:BB:BB:BB:BB:BB:CC:CC:DD:-:-:-:-:-:-:-:-:EE:-:-:FF:FF:FF:FF:GG:GG:GG:GG:HH:HH:II:II -+ * -+ * A: Ethernet destination address -+ * B: Ethernet source address -+ * C: Ethernet protocol type -+ * D: IP header VER+Hlen, use: 0x45 (4 is for ver 4, 5 is for len 20) -+ * E: IP protocol -+ * F: IP source address ( 192.168.0.4: C0:A8:00:2C ) -+ * G: IP destination address ( 192.168.0.4: C0:A8:00:2C ) -+ * H: Source port (1024: 04:00) -+ * I: Destination port (1024: 04:00) -+ */ -+ -+static int rtw_wowlan_set_pattern(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct wowlan_ioctl_param poidparam; -+ int ret = 0; -+ u8 input[MAX_IN_PATTERN_SIZE]; -+ u8 index = 0; -+ -+ poidparam.subcode = 0; -+ -+ if (!check_fwstate(pmlmepriv, WIFI_ASOC_STATE) && -+ check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { -+ ret = -EFAULT; -+ RTW_INFO("Please Connect With AP First!!\n"); -+ goto _rtw_wowlan_set_pattern_exit; -+ } -+ -+ if ((wrqu->data.length <= 0) || (wrqu->data.length > MAX_IN_PATTERN_SIZE)) { -+ ret = -EFAULT; -+ RTW_INFO("ERROR: parameter length error, len=%d\n", wrqu->data.length); -+ goto _rtw_wowlan_set_pattern_exit; -+ } else { -+ /* set pattern */ -+ if (copy_from_user(input, -+ wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ /* leave PS first */ -+ rtw_ps_deny(padapter, PS_DENY_IOCTL); -+ LeaveAllPowerSaveModeDirect(padapter); -+ if ((strncmp(input, "pattern=", 8) == 0) ||(strncmp(input, "ack_pattern=", 12) == 0)) { -+ if (pwrpriv->wowlan_pattern_idx >= MAX_WKFM_CAM_NUM) { -+ RTW_INFO("WARNING: priv-pattern is full(idx: %d)\n", -+ pwrpriv->wowlan_pattern_idx); -+ RTW_INFO("WARNING: please clean priv-pattern first\n"); -+ ret = -EINVAL; -+ goto _rtw_wowlan_set_pattern_exit; -+ } else { -+ index = pwrpriv->wowlan_pattern_idx; -+ ret = rtw_wowlan_parser_pattern_cmd(input, -+ pwrpriv->patterns[index].content, -+ &pwrpriv->patterns[index].len, -+ pwrpriv->patterns[index].mask); -+ -+ if (ret == _TRUE) { -+ #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ if(strncmp(input, "ack_pattern=", 12) == 0) -+ pwrpriv->wowlan_keep_alive_ack_index = index; -+ else -+ pwrpriv->wowlan_wake_pattern_index = index; -+ RTW_INFO("pwrpriv->wowlan_keep_alive_ack_index =%d\n",pwrpriv->wowlan_keep_alive_ack_index); -+ RTW_INFO("pwrpriv->wowlan_wake_pattern_index =%d\n",pwrpriv->wowlan_wake_pattern_index); -+ #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ pwrpriv->wowlan_pattern_idx++; -+ } -+ } -+ } else if (strncmp(input, "clean", 5) == 0) { -+ poidparam.subcode = WOWLAN_PATTERN_CLEAN; -+ #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ pwrpriv->wowlan_wake_pattern_index = 0xFF; -+ pwrpriv->wowlan_keep_alive_ack_index = 0xFF; -+ #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ -+ rtw_hal_set_hwreg(padapter, -+ HW_VAR_WOWLAN, (u8 *)&poidparam); -+ } else if (strncmp(input, "show", 4) == 0) { -+ rtw_wow_pattern_cam_dump(padapter); -+ rtw_wow_pattern_sw_dump(padapter); -+ } else { -+ RTW_INFO("ERROR: incorrect parameter!\n"); -+ ret = -EINVAL; -+ } -+ rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); -+ } -+_rtw_wowlan_set_pattern_exit: -+ return ret; -+} -+ -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+static int rtw_wowlan_set_keep_alive_pattern(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ -+ int ret = 0,totoal_len=0,i=0,len=0; -+ char *cp = NULL; -+ u32 mode = 0xFF; /*para1*/ -+ u16 period = 15*10; /* para2;units:100ms,default 15s*/ -+ char tx_pattern[512]; /*para3*/ -+ u32 retry_intervel = 2*10; /* para4;units:100ms,default 2s*/ -+ u32 retry_limit_count = 5; /*para5*/ -+ -+ ret = sscanf(extra, "%d %hu %s %d %d", &mode , &period, tx_pattern, &retry_intervel, &retry_limit_count); -+ pwrpriv->wowlan_keep_alive_mode = mode; -+ -+ RTW_INFO("[%s] ret =%d \n", __func__ ,ret); -+ totoal_len = strlen(tx_pattern); -+ RTW_INFO("[%s] totoal_len=%d \n", __func__ ,totoal_len); -+ -+ if (mode && (ret < 3)) -+ return -EINVAL; -+ -+ if (((mode ==2) ||(mode ==3)) && ((retry_intervel*retry_limit_count) > period)) { -+ RTW_INFO("[%s] retry_intervel*retry_limit_count need smaller than period\n", __func__ ); -+ return -EINVAL; -+ } -+ -+ switch(mode){ -+ case wow_keep_alive_pattern_disable: -+ /*disable this feature*/ -+ pwrpriv->keep_alive_pattern_loc = 0; -+ pwrpriv->keep_alive_pattern_len = 0; -+ pwrpriv->wowlan_keep_alive_period = 0; -+ pwrpriv->wowlan_keep_alive_ack_index = 0xFF; -+ pwrpriv->wowlan_wake_pattern_index = 0xFF; -+ pwrpriv->wowlan_keep_alive_retry_interval = 0; -+ pwrpriv->wowlan_keep_alive_retry_counter = 0; -+ _rtw_memset(pwrpriv->keep_alive_pattern,0,WLAN_MAX_KEEP_ALIVE_IE_LEN); -+ RTW_INFO("[%s] clear pattern \n", __func__ ); -+ ret = _SUCCESS; -+ break; -+ case wow_keep_alive_pattern_tx: -+ /*only tx udp packet*/ -+ pwrpriv->wowlan_keep_alive_period = period; -+ pwrpriv->wowlan_keep_alive_retry_interval = 0; -+ pwrpriv->wowlan_keep_alive_retry_counter = 0; -+ RTW_INFO("[%s] wow_keep_alive_pattern_tx \n", __func__ ); -+ break; -+ case wow_keep_alive_pattern_trx: -+ /*trx+no need wakeup*/ -+ pwrpriv->wowlan_keep_alive_period = period; -+ pwrpriv->wowlan_keep_alive_retry_interval = retry_intervel; -+ pwrpriv->wowlan_keep_alive_retry_counter = retry_limit_count; -+ RTW_INFO("[%s] wow_keep_alive_pattern_trx \n", __func__ ); -+ break; -+ case wow_keep_alive_pattern_trx_with_ack: -+ /*trx+need wakeup*/ -+ pwrpriv->wowlan_keep_alive_period = period; -+ pwrpriv->wowlan_keep_alive_retry_interval = retry_intervel; -+ pwrpriv->wowlan_keep_alive_retry_counter = retry_limit_count; -+ RTW_INFO("[%s] wow_keep_alive_pattern_trx_with_ack \n", __func__ ); -+ break; -+ default: -+ RTW_INFO("[%s] please setting valid mode \n", __func__ ); -+ ret = -EINVAL; -+ break; -+ -+ } -+ -+ if((mode == 0) || (mode > 4)) -+ return ret; -+ -+ totoal_len = strlen(tx_pattern); -+ RTW_INFO("[%s] totoal_len=%d \n", __func__ ,totoal_len); -+ if (totoal_len > WLAN_MAX_KEEP_ALIVE_IE_LEN*2) { -+ RTW_INFO("[%s] Fail , not support ie length extend %d\n", __func__ , WLAN_MAX_KEEP_ALIVE_IE_LEN); -+ return -EFAULT; -+ } -+ RTW_INFO("[%s] period = %hu ,ie = %s , len = %d\n", __func__ , period , tx_pattern , totoal_len); -+ -+ -+ if (totoal_len > 0) { -+ RTW_INFO("[%s] pwrpriv->keep_alive_pattern==========> \n", __func__ ); -+ for (i = 0 ; i keep_alive_pattern[len] = key_2char2num(tx_pattern[i], tx_pattern[i + 1]); -+ RTW_INFO("[0x%x] ",pwrpriv->keep_alive_pattern[len]); -+ len++; -+ } -+ RTW_INFO(" \n" ); -+ pwrpriv->keep_alive_pattern_len = len; -+ } -+ -+ return ret; -+} -+#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ -+#endif /* CONFIG_WOWLAN */ -+ -+#ifdef CONFIG_AP_WOWLAN -+static int rtw_ap_wowlan_ctrl(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct wowlan_ioctl_param poidparam; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct sta_info *psta = NULL; -+ int ret = 0; -+ systime start_time = rtw_get_current_time(); -+ poidparam.subcode = 0; -+ -+ RTW_INFO("+rtw_ap_wowlan_ctrl: %s\n", extra); -+ -+ if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) { -+ RTW_INFO("[%s] It is not AP mode!!\n", __func__); -+ goto _rtw_ap_wowlan_ctrl_exit_free; -+ } -+ -+ if (_rtw_memcmp(extra, "enable", 6)) { -+ -+ pwrctrlpriv->wowlan_ap_mode = _TRUE; -+ -+ rtw_suspend_common(padapter); -+ } else if (_rtw_memcmp(extra, "disable", 7)) { -+#ifdef CONFIG_USB_HCI -+ RTW_ENABLE_FUNC(padapter, DF_RX_BIT); -+ RTW_ENABLE_FUNC(padapter, DF_TX_BIT); -+#endif -+ rtw_resume_common(padapter); -+ } else { -+ RTW_INFO("[%s] Invalid Parameter.\n", __func__); -+ goto _rtw_ap_wowlan_ctrl_exit_free; -+ } -+ /* mutex_lock(&ioctl_mutex); */ -+_rtw_ap_wowlan_ctrl_exit_free: -+ RTW_INFO("-rtw_ap_wowlan_ctrl( subcode = %d)\n", poidparam.subcode); -+ RTW_PRINT("%s in %d ms\n", __func__, -+ rtw_get_passing_time_ms(start_time)); -+_rtw_ap_wowlan_ctrl_exit: -+ return ret; -+} -+#endif /* CONFIG_AP_WOWLAN */ -+ -+static int rtw_pm_set(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ unsigned mode = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_INFO("[%s] extra = %s\n", __FUNCTION__, extra); -+ -+ if (_rtw_memcmp(extra, "lps=", 4)) { -+ sscanf(extra + 4, "%u", &mode); -+ ret = rtw_pm_set_lps(padapter, mode); -+ } else if (_rtw_memcmp(extra, "ips=", 4)) { -+ sscanf(extra + 4, "%u", &mode); -+ ret = rtw_pm_set_ips(padapter, mode); -+ } else if (_rtw_memcmp(extra, "lps_level=", 10)) { -+ if (sscanf(extra + 10, "%u", &mode) > 0) -+ ret = rtw_pm_set_lps_level(padapter, mode); -+#ifdef CONFIG_LPS_1T1R -+ } else if (_rtw_memcmp(extra, "lps_1t1r=", 9)) { -+ if (sscanf(extra + 9, "%u", &mode) > 0) -+ ret = rtw_pm_set_lps_1t1r(padapter, mode); -+#endif -+ } -+#ifdef CONFIG_WOWLAN -+ else if (_rtw_memcmp(extra, "wow_lps=", 8)) { -+ sscanf(extra + 8, "%u", &mode); -+ ret = rtw_pm_set_wow_lps(padapter, mode); -+ } else if (_rtw_memcmp(extra, "wow_lps_level=", 14)) { -+ if (sscanf(extra + 14, "%u", &mode) > 0) -+ ret = rtw_pm_set_wow_lps_level(padapter, mode); -+ #ifdef CONFIG_LPS_1T1R -+ } else if (_rtw_memcmp(extra, "wow_lps_1t1r=", 13)) { -+ if (sscanf(extra + 13, "%u", &mode) > 0) -+ ret = rtw_pm_set_wow_lps_1t1r(padapter, mode); -+ #endif -+ } -+#endif /* CONFIG_WOWLAN */ -+ else -+ ret = -EINVAL; -+ -+ return ret; -+} -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ -+int rtw_vendor_ie_get_raw_data(struct net_device *dev, u32 vendor_ie_num, -+ char *extra, u32 length) -+{ -+ int j; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u32 vendor_ie_mask = 0; -+ char *pstring; -+ -+ if (vendor_ie_num >= WLAN_MAX_VENDOR_IE_NUM) { -+ RTW_INFO("[%s] only support %d vendor ie\n", __func__ , -+ WLAN_MAX_VENDOR_IE_NUM); -+ return -EFAULT; -+ } -+ -+ if (pmlmepriv->vendor_ielen[vendor_ie_num] == 0) { -+ RTW_INFO("[%s] Fail, vendor_ie_num: %d is not set\n", __func__, -+ vendor_ie_num); -+ return -EFAULT; -+ } -+ -+ if (length < 2 * pmlmepriv->vendor_ielen[vendor_ie_num] + 5) { -+ RTW_INFO("[%s] Fail, buffer size is too small\n", __func__); -+ return -EFAULT; -+ } -+ -+ vendor_ie_mask = pmlmepriv->vendor_ie_mask[vendor_ie_num]; -+ _rtw_memset(extra, 0, length); -+ -+ pstring = extra; -+ pstring += sprintf(pstring, "%d,%x,", vendor_ie_num, vendor_ie_mask); -+ -+ for (j = 0; j < pmlmepriv->vendor_ielen[vendor_ie_num]; j++) -+ pstring += sprintf(pstring, "%02x", pmlmepriv->vendor_ie[vendor_ie_num][j]); -+ -+ length = pstring - extra; -+ return length; -+} -+ -+int rtw_vendor_ie_get_data(struct net_device *dev, int vendor_ie_num, char *extra) -+{ -+ int j; -+ char *pstring; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u32 vendor_ie_mask = 0; -+ __u16 length = 0; -+ -+ vendor_ie_mask = pmlmepriv->vendor_ie_mask[vendor_ie_num]; -+ pstring = extra; -+ pstring += sprintf(pstring , "\nVendor IE num %d , Mask:%x " , vendor_ie_num , vendor_ie_mask); -+ -+ if (vendor_ie_mask & WIFI_BEACON_VENDOR_IE_BIT) -+ pstring += sprintf(pstring , "[Beacon]"); -+ if (vendor_ie_mask & WIFI_PROBEREQ_VENDOR_IE_BIT) -+ pstring += sprintf(pstring , "[Probe Req]"); -+ if (vendor_ie_mask & WIFI_PROBERESP_VENDOR_IE_BIT) -+ pstring += sprintf(pstring , "[Probe Resp]"); -+ if (vendor_ie_mask & WIFI_ASSOCREQ_VENDOR_IE_BIT) -+ pstring += sprintf(pstring , "[Assoc Req]"); -+ if (vendor_ie_mask & WIFI_ASSOCRESP_VENDOR_IE_BIT) -+ pstring += sprintf(pstring , "[Assoc Resp]"); -+#ifdef CONFIG_P2P -+ if (vendor_ie_mask & WIFI_P2P_PROBEREQ_VENDOR_IE_BIT) -+ pstring += sprintf(pstring , "[P2P_Probe Req]"); -+ if (vendor_ie_mask & WIFI_P2P_PROBERESP_VENDOR_IE_BIT) -+ pstring += sprintf(pstring , "[P2P_Probe Resp]"); -+#endif -+ -+ pstring += sprintf(pstring , "\nVendor IE:\n"); -+ for (j = 0 ; j < pmlmepriv->vendor_ielen[vendor_ie_num] ; j++) -+ pstring += sprintf(pstring , "%02x" , pmlmepriv->vendor_ie[vendor_ie_num][j]); -+ -+ length = pstring - extra; -+ return length; -+ -+} -+ -+int rtw_vendor_ie_get(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0, vendor_ie_num = 0, cmdlen; -+ struct iw_point *p; -+ u8 *ptmp; -+ -+ p = &wrqu->data; -+ cmdlen = p->length; -+ if (0 == cmdlen) -+ return -EINVAL; -+ -+ ptmp = (u8 *)rtw_malloc(cmdlen); -+ if (NULL == ptmp) -+ return -ENOMEM; -+ -+ if (copy_from_user(ptmp, p->pointer, cmdlen)) { -+ ret = -EFAULT; -+ goto exit; -+ } -+ ret = sscanf(ptmp , "%d", &vendor_ie_num); -+ if (vendor_ie_num > WLAN_MAX_VENDOR_IE_NUM - 1) { -+ ret = -EFAULT; -+ goto exit; -+ } -+ -+ wrqu->data.length = rtw_vendor_ie_get_data(dev, vendor_ie_num, extra); -+ -+exit: -+ rtw_mfree(ptmp, cmdlen); -+ -+ return 0; -+} -+ -+int rtw_vendor_ie_set(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0, i , len = 0 , totoal_ie_len = 0 , total_ie_len_byte = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ u32 vendor_ie_mask = 0; -+ u32 vendor_ie_num = 0; -+ u32 vendor_ie_mask_max = BIT(WLAN_MAX_VENDOR_IE_MASK_MAX) - 1; -+ u32 id, elen; -+ -+ ret = sscanf(extra, "%d,%x,%*s", &vendor_ie_num , &vendor_ie_mask); -+ if (strrchr(extra , ',')) -+ extra = strrchr(extra , ',') + 1; -+ else -+ return -EINVAL; -+ totoal_ie_len = strlen(extra); -+ RTW_INFO("[%s] vendor_ie_num = %d , vendor_ie_mask = 0x%x , vendor_ie = %s , len = %d\n", __func__ , vendor_ie_num , vendor_ie_mask , extra , totoal_ie_len); -+ -+ if (vendor_ie_num > WLAN_MAX_VENDOR_IE_NUM - 1) { -+ RTW_INFO("[%s] Fail, only support %d vendor ie\n", __func__ , WLAN_MAX_VENDOR_IE_NUM); -+ return -EFAULT; -+ } -+ -+ if (totoal_ie_len > WLAN_MAX_VENDOR_IE_LEN) { -+ RTW_INFO("[%s] Fail , not support ie length extend %d\n", __func__ , WLAN_MAX_VENDOR_IE_LEN); -+ return -EFAULT; -+ } -+ -+ if (vendor_ie_mask > vendor_ie_mask_max) { -+ RTW_INFO("[%s] Fail, not support vendor_ie_mask more than 0x%x\n", __func__ , vendor_ie_mask_max); -+ return -EFAULT; -+ } -+ -+ if (vendor_ie_mask == 0) { -+ RTW_INFO("[%s] Clear vendor_ie_num %d group\n", __func__ , vendor_ie_num); -+ goto _clear_path; -+ } -+ -+ if (totoal_ie_len % 2 != 0) { -+ RTW_INFO("[%s] Fail , IE length = %zu is odd\n" , __func__ , strlen(extra)); -+ return -EFAULT; -+ } -+ -+ if (totoal_ie_len > 0) { -+ for (i = 0 ; i < strlen(extra) ; i += 2) { -+ pmlmepriv->vendor_ie[vendor_ie_num][len] = key_2char2num(extra[i] , extra[i + 1]); -+ if (len == 0) { -+ id = pmlmepriv->vendor_ie[vendor_ie_num][len]; -+ if (id != WLAN_EID_VENDOR_SPECIFIC) { -+ RTW_INFO("[%s] Fail , VENDOR SPECIFIC IE ID \"%x\" was not correct\n", __func__ , id); -+ goto _clear_path; -+ } -+ } else if (len == 1) { -+ total_ie_len_byte = (totoal_ie_len / 2) - 2; -+ elen = pmlmepriv->vendor_ie[vendor_ie_num][len]; -+ if (elen != total_ie_len_byte) { -+ RTW_INFO("[%s] Fail , Input IE length = \"%d\"(hex:%x) bytes , not match input total IE context length \"%d\" bytes\n", __func__ , elen , elen , -+ total_ie_len_byte); -+ goto _clear_path; -+ } -+ } -+ len++; -+ } -+ pmlmepriv->vendor_ielen[vendor_ie_num] = len; -+ } else -+ pmlmepriv->vendor_ielen[vendor_ie_num] = 0; -+ -+ -+ -+ if (vendor_ie_mask & WIFI_BEACON_VENDOR_IE_BIT) -+ RTW_INFO("[%s] Beacon append vendor ie\n", __func__); -+ if (vendor_ie_mask & WIFI_PROBEREQ_VENDOR_IE_BIT) -+ RTW_INFO("[%s] Probe Req append vendor ie\n", __func__); -+ if (vendor_ie_mask & WIFI_PROBERESP_VENDOR_IE_BIT) -+ RTW_INFO("[%s] Probe Resp append vendor ie\n", __func__); -+ if (vendor_ie_mask & WIFI_ASSOCREQ_VENDOR_IE_BIT) -+ RTW_INFO("[%s] Assoc Req append vendor ie\n", __func__); -+ if (vendor_ie_mask & WIFI_ASSOCRESP_VENDOR_IE_BIT) -+ RTW_INFO("[%s] Assoc Resp append vendor ie\n", __func__); -+#ifdef CONFIG_P2P -+ if (vendor_ie_mask & WIFI_P2P_PROBEREQ_VENDOR_IE_BIT) -+ RTW_INFO("[%s] P2P Probe Req append vendor ie\n", __func__); -+ if (vendor_ie_mask & WIFI_P2P_PROBERESP_VENDOR_IE_BIT) -+ RTW_INFO("[%s] P2P Probe Resp append vendor ie\n", __func__); -+#endif -+ -+ pmlmepriv->vendor_ie_mask[vendor_ie_num] = vendor_ie_mask; -+ -+ return ret; -+ -+_clear_path: -+ _rtw_memset(pmlmepriv->vendor_ie[vendor_ie_num] , 0 , sizeof(u32) * WLAN_MAX_VENDOR_IE_LEN); -+ pmlmepriv->vendor_ielen[vendor_ie_num] = 0; -+ pmlmepriv->vendor_ie_mask[vendor_ie_num] = 0; -+ return -EFAULT; -+} -+#endif -+ -+static int rtw_mp_efuse_get(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wdata, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ PEFUSE_HAL pEfuseHal; -+ struct iw_point *wrqu; -+ -+ u8 ips_mode = IPS_NUM; /* init invalid value */ -+ u8 lps_mode = PS_MODE_NUM; /* init invalid value */ -+ struct pwrctrl_priv *pwrctrlpriv ; -+ u8 *data = NULL; -+ u8 *rawdata = NULL; -+ char *pch, *ptmp, *token, *tmp[3] = {0x00, 0x00, 0x00}; -+ u16 i = 0, j = 0, mapLen = 0, addr = 0, cnts = 0; -+ u16 max_available_len = 0, raw_cursize = 0, raw_maxsize = 0; -+ u16 mask_len; -+ u8 mask_buf[64] = ""; -+ int err; -+ char *pextra = NULL; -+#ifdef CONFIG_IOL -+ u8 org_fw_iol = padapter->registrypriv.fw_iol;/* 0:Disable, 1:enable, 2:by usb speed */ -+#endif -+ -+ wrqu = (struct iw_point *)wdata; -+ pwrctrlpriv = adapter_to_pwrctl(padapter); -+ pEfuseHal = &pHalData->EfuseHal; -+ -+ err = 0; -+ data = rtw_zmalloc(EFUSE_BT_MAX_MAP_LEN); -+ if (data == NULL) { -+ err = -ENOMEM; -+ goto exit; -+ } -+ rawdata = rtw_zmalloc(EFUSE_BT_MAX_MAP_LEN); -+ if (rawdata == NULL) { -+ err = -ENOMEM; -+ goto exit; -+ } -+ -+ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) { -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ *(extra + wrqu->length) = '\0'; -+ -+#ifdef CONFIG_LPS -+ lps_mode = pwrctrlpriv->power_mgnt;/* keep org value */ -+ rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); -+#endif -+ -+#ifdef CONFIG_IPS -+ ips_mode = pwrctrlpriv->ips_mode;/* keep org value */ -+ rtw_pm_set_ips(padapter, IPS_NONE); -+#endif -+ -+ pch = extra; -+ RTW_INFO("%s: in=%s\n", __FUNCTION__, extra); -+ -+ i = 0; -+ /* mac 16 "00e04c871200" rmap,00,2 */ -+ while ((token = strsep(&pch, ",")) != NULL) { -+ if (i > 2) -+ break; -+ tmp[i] = token; -+ i++; -+ } -+#ifdef CONFIG_IOL -+ padapter->registrypriv.fw_iol = 0;/* 0:Disable, 1:enable, 2:by usb speed */ -+#endif -+ -+ if (strcmp(tmp[0], "status") == 0) { -+ sprintf(extra, "Load File efuse=%s,Load File MAC=%s" -+ , pHalData->efuse_file_status == EFUSE_FILE_FAILED ? "FAIL" : "OK" -+ , pHalData->macaddr_file_status == MACADDR_FILE_FAILED ? "FAIL" : "OK" -+ ); -+ goto exit; -+ } else if (strcmp(tmp[0], "drvmap") == 0) { -+ static u8 drvmaporder = 0; -+ u8 *efuse; -+ u32 shift, cnt; -+ u32 blksz = 0x200; /* The size of one time show, default 512 */ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, _FALSE); -+ -+ efuse = pHalData->efuse_eeprom_data; -+ -+ shift = blksz * drvmaporder; -+ efuse += shift; -+ cnt = mapLen - shift; -+ -+ if (cnt > blksz) { -+ cnt = blksz; -+ drvmaporder++; -+ } else -+ drvmaporder = 0; -+ -+ sprintf(extra, "\n"); -+ for (i = 0; i < cnt; i += 16) { -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "0x%02x\t", shift + i); -+ for (j = 0; j < 8; j++) -+ pextra += sprintf(pextra, "%02X ", efuse[i + j]); -+ pextra += sprintf(pextra, "\t"); -+ for (; j < 16; j++) -+ pextra += sprintf(pextra, "%02X ", efuse[i + j]); -+ pextra += sprintf(pextra, "\n"); -+ } -+ if ((shift + cnt) < mapLen) -+ pextra += sprintf(pextra, "\t...more (left:%d/%d)\n", mapLen-(shift + cnt), mapLen); -+ -+ } else if (strcmp(tmp[0], "realmap") == 0) { -+ static u8 order = 0; -+ u8 *efuse; -+ u32 shift, cnt; -+ u32 blksz = 0x200; /* The size of one time show, default 512 */ -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (void *)&mapLen, _FALSE); -+ efuse = pEfuseHal->fakeEfuseInitMap; -+ if (rtw_efuse_mask_map_read(padapter, 0, mapLen, efuse) == _FAIL) { -+ RTW_INFO("%s: read realmap Fail!!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+#if 0 -+ RTW_INFO("OFFSET\tVALUE(hex)\n"); -+ for (i = 0; i < mapLen; i += 16) { -+ RTW_INFO("0x%02x\t", i); -+ for (j = 0; j < 8; j++) -+ RTW_INFO("%02X ", efuse[i + j]); -+ RTW_INFO("\t"); -+ for (; j < 16; j++) -+ RTW_INFO("%02X ", efuse[i + j]); -+ RTW_INFO("\n"); -+ } -+ RTW_INFO("\n"); -+#endif -+ -+ shift = blksz * order; -+ efuse += shift; -+ cnt = mapLen - shift; -+ if (cnt > blksz) { -+ cnt = blksz; -+ order++; -+ } else -+ order = 0; -+ -+ sprintf(extra, "\n"); -+ for (i = 0; i < cnt; i += 16) { -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "0x%02x\t", shift + i); -+ for (j = 0; j < 8; j++) -+ pextra += sprintf(pextra, "%02X ", efuse[i + j]); -+ pextra += sprintf(pextra, "\t"); -+ for (; j < 16; j++) -+ pextra += sprintf(pextra, "%02X ", efuse[i + j]); -+ pextra += sprintf(pextra, "\n"); -+ } -+ if ((shift + cnt) < mapLen) -+ pextra += sprintf(pextra, "\t...more (left:%d/%d)\n", mapLen-(shift + cnt), mapLen); -+ } else if (strcmp(tmp[0], "rmap") == 0) { -+ if ((tmp[1] == NULL) || (tmp[2] == NULL)) { -+ RTW_INFO("%s: rmap Fail!! Parameters error!\n", __FUNCTION__); -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ /* rmap addr cnts */ -+ addr = simple_strtoul(tmp[1], &ptmp, 16); -+ RTW_INFO("%s: addr=%x\n", __FUNCTION__, addr); -+ -+ cnts = simple_strtoul(tmp[2], &ptmp, 10); -+ if (cnts == 0) { -+ RTW_INFO("%s: rmap Fail!! cnts error!\n", __FUNCTION__); -+ err = -EINVAL; -+ goto exit; -+ } -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (void *)&max_available_len, _FALSE); -+ if ((addr + cnts) > max_available_len) { -+ RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ if (rtw_efuse_mask_map_read(padapter, addr, cnts, data) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_mask_map_read error!\n", __func__); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ /* RTW_INFO("%s: data={", __FUNCTION__); */ -+ *extra = 0; -+ pextra = extra; -+ for (i = 0; i < cnts; i++) { -+ /* RTW_INFO("0x%02x ", data[i]); */ -+ pextra += sprintf(pextra, "0x%02X ", data[i]); -+ } -+ /* RTW_INFO("}\n"); */ -+ } else if (strcmp(tmp[0], "realraw") == 0) { -+ static u8 raw_order = 0; -+ u32 shift, cnt; -+ u32 blksz = 0x200; /* The size of one time show, default 512 */ -+ -+ addr = 0; -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN , (void *)&mapLen, _FALSE); -+ RTW_INFO("Real content len = %d\n",mapLen ); -+ -+ if (rtw_efuse_access(padapter, _FALSE, addr, mapLen, rawdata) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_access Fail!!\n", __func__); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ _rtw_memset(extra, '\0', strlen(extra)); -+ -+ shift = blksz * raw_order; -+ rawdata += shift; -+ cnt = mapLen - shift; -+ if (cnt > blksz) { -+ cnt = blksz; -+ raw_order++; -+ } else -+ raw_order = 0; -+ -+ sprintf(extra, "\n"); -+ for (i = 0; i < cnt; i += 16) { -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "0x%02x\t", shift + i); -+ for (j = 0; j < 8; j++) -+ pextra += sprintf(pextra, "%02X ", rawdata[i + j]); -+ pextra += sprintf(pextra, "\t"); -+ for (; j < 16; j++) -+ pextra += sprintf(pextra, "%02X ", rawdata[i + j]); -+ pextra += sprintf(pextra, "\n"); -+ } -+ if ((shift + cnt) < mapLen) -+ pextra += sprintf(pextra, "\t...more (left:%d/%d)\n", mapLen-(shift + cnt), mapLen); -+ -+ } else if (strcmp(tmp[0], "btrealraw") == 0) { -+ static u8 bt_raw_order = 0; -+ u32 shift, cnt; -+ u32 blksz = 0x200; /* The size of one time show, default 512 */ -+ -+ addr = 0; -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&mapLen, _FALSE); -+ RTW_INFO("Real content len = %d\n", mapLen); -+#ifdef RTW_HALMAC -+ if (rtw_efuse_bt_access(padapter, _FALSE, 0, mapLen, rawdata) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_access Fail!!\n", __func__); -+ err = -EFAULT; -+ goto exit; -+ } -+#else -+ rtw_write8(padapter, 0x35, 0x1); -+ -+ if (rtw_efuse_access(padapter, _FALSE, addr, mapLen, rawdata) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_access Fail!!\n", __func__); -+ err = -EFAULT; -+ goto exit; -+ } -+#endif -+ _rtw_memset(extra, '\0', strlen(extra)); -+ -+ shift = blksz * bt_raw_order; -+ rawdata += shift; -+ cnt = mapLen - shift; -+ if (cnt > blksz) { -+ cnt = blksz; -+ bt_raw_order++; -+ } else -+ bt_raw_order = 0; -+ -+ sprintf(extra, "\n"); -+ for (i = 0; i < cnt; i += 16) { -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "0x%02x\t", shift + i); -+ for (j = 0; j < 8; j++) -+ pextra += sprintf(pextra, "%02X ", rawdata[i + j]); -+ pextra += sprintf(pextra, "\t"); -+ for (; j < 16; j++) -+ pextra += sprintf(pextra, "%02X ", rawdata[i + j]); -+ pextra += sprintf(pextra, "\n"); -+ } -+ if ((shift + cnt) < mapLen) -+ pextra += sprintf(pextra, "\t...more (left:%d/%d)\n", mapLen-(shift + cnt), mapLen); -+ -+ } else if (strcmp(tmp[0], "mac") == 0) { -+ if (hal_efuse_macaddr_offset(padapter) == -1) { -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ addr = hal_efuse_macaddr_offset(padapter); -+ cnts = 6; -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); -+ if ((addr + cnts) > max_available_len) { -+ RTW_INFO("%s: addr(0x%02x)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ if (rtw_efuse_mask_map_read(padapter, addr, cnts, data) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_mask_map_read error!\n", __func__); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ /* RTW_INFO("%s: MAC address={", __FUNCTION__); */ -+ *extra = 0; -+ pextra = extra; -+ for (i = 0; i < cnts; i++) { -+ /* RTW_INFO("%02X", data[i]); */ -+ pextra += sprintf(pextra, "%02X", data[i]); -+ if (i != (cnts - 1)) { -+ /* RTW_INFO(":"); */ -+ pextra += sprintf(pextra, ":"); -+ } -+ } -+ /* RTW_INFO("}\n"); */ -+ } else if (strcmp(tmp[0], "vidpid") == 0) { -+#ifdef CONFIG_RTL8188E -+#ifdef CONFIG_USB_HCI -+ addr = EEPROM_VID_88EU; -+#endif -+#ifdef CONFIG_PCI_HCI -+ addr = EEPROM_VID_88EE; -+#endif -+#endif /* CONFIG_RTL8188E */ -+ -+#ifdef CONFIG_RTL8192E -+#ifdef CONFIG_USB_HCI -+ addr = EEPROM_VID_8192EU; -+#endif -+#ifdef CONFIG_PCI_HCI -+ addr = EEPROM_VID_8192EE; -+#endif -+#endif /* CONFIG_RTL8192E */ -+#ifdef CONFIG_RTL8723B -+ addr = EEPROM_VID_8723BU; -+#endif /* CONFIG_RTL8192E */ -+ -+#ifdef CONFIG_RTL8188F -+ addr = EEPROM_VID_8188FU; -+#endif /* CONFIG_RTL8188F */ -+ -+#ifdef CONFIG_RTL8188GTV -+ addr = EEPROM_VID_8188GTVU; -+#endif -+ -+#ifdef CONFIG_RTL8703B -+#ifdef CONFIG_USB_HCI -+ addr = EEPROM_VID_8703BU; -+#endif -+#endif /* CONFIG_RTL8703B */ -+ -+#ifdef CONFIG_RTL8723D -+#ifdef CONFIG_USB_HCI -+ addr = EEPROM_VID_8723DU; -+#endif /* CONFIG_USB_HCI */ -+#endif /* CONFIG_RTL8723D */ -+ -+ cnts = 4; -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); -+ if ((addr + cnts) > max_available_len) { -+ RTW_INFO("%s: addr(0x%02x)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); -+ err = -EFAULT; -+ goto exit; -+ } -+ if (rtw_efuse_mask_map_read(padapter, addr, cnts, data) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_access error!!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ /* RTW_INFO("%s: {VID,PID}={", __FUNCTION__); */ -+ *extra = 0; -+ pextra = extra; -+ for (i = 0; i < cnts; i++) { -+ /* RTW_INFO("0x%02x", data[i]); */ -+ pextra += sprintf(pextra, "0x%02X", data[i]); -+ if (i != (cnts - 1)) { -+ /* RTW_INFO(","); */ -+ pextra += sprintf(pextra, ","); -+ } -+ } -+ /* RTW_INFO("}\n"); */ -+ } else if (strcmp(tmp[0], "ableraw") == 0) { -+#ifdef RTW_HALMAC -+ raw_maxsize = efuse_GetavailableSize(padapter); -+#else -+ efuse_GetCurrentSize(padapter, &raw_cursize); -+ raw_maxsize = efuse_GetMaxSize(padapter); -+#endif -+ sprintf(extra, "[available raw size]= %d bytes\n", raw_maxsize - raw_cursize); -+ } else if (strcmp(tmp[0], "btableraw") == 0) { -+ efuse_bt_GetCurrentSize(padapter, &raw_cursize); -+ raw_maxsize = efuse_bt_GetMaxSize(padapter); -+ sprintf(extra, "[available raw size]= %d bytes\n", raw_maxsize - raw_cursize); -+ } else if (strcmp(tmp[0], "btfmap") == 0) { -+ -+ BTEfuse_PowerSwitch(padapter, 1, _TRUE); -+ -+ mapLen = EFUSE_BT_MAX_MAP_LEN; -+ if (rtw_BT_efuse_map_read(padapter, 0, mapLen, pEfuseHal->BTEfuseInitMap) == _FAIL) { -+ RTW_INFO("%s: rtw_BT_efuse_map_read Fail!!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ /* RTW_INFO("OFFSET\tVALUE(hex)\n"); */ -+ sprintf(extra, "\n"); -+ for (i = 0; i < 512; i += 16) { /* set 512 because the iwpriv's extra size have limit 0x7FF */ -+ /* RTW_INFO("0x%03x\t", i); */ -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "0x%03x\t", i); -+ for (j = 0; j < 8; j++) { -+ /* RTW_INFO("%02X ", pEfuseHal->BTEfuseInitMap[i+j]); */ -+ pextra += sprintf(pextra, "%02X ", pEfuseHal->BTEfuseInitMap[i+j]); -+ } -+ /* RTW_INFO("\t"); */ -+ pextra += sprintf(pextra, "\t"); -+ for (; j < 16; j++) { -+ /* RTW_INFO("%02X ", pEfuseHal->BTEfuseInitMap[i+j]); */ -+ pextra += sprintf(pextra, "%02X ", pEfuseHal->BTEfuseInitMap[i+j]); -+ } -+ /* RTW_INFO("\n"); */ -+ pextra += sprintf(pextra, "\n"); -+ } -+ /* RTW_INFO("\n"); */ -+ } else if (strcmp(tmp[0], "btbmap") == 0) { -+ BTEfuse_PowerSwitch(padapter, 1, _TRUE); -+ -+ mapLen = EFUSE_BT_MAX_MAP_LEN; -+ if (rtw_BT_efuse_map_read(padapter, 0, mapLen, pEfuseHal->BTEfuseInitMap) == _FAIL) { -+ RTW_INFO("%s: rtw_BT_efuse_map_read Fail!!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ /* RTW_INFO("OFFSET\tVALUE(hex)\n"); */ -+ sprintf(extra, "\n"); -+ for (i = 512; i < 1024 ; i += 16) { -+ /* RTW_INFO("0x%03x\t", i); */ -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "0x%03x\t", i); -+ for (j = 0; j < 8; j++) { -+ /* RTW_INFO("%02X ", data[i+j]); */ -+ pextra += sprintf(pextra, "%02X ", pEfuseHal->BTEfuseInitMap[i+j]); -+ } -+ /* RTW_INFO("\t"); */ -+ pextra += sprintf(pextra, "\t"); -+ for (; j < 16; j++) { -+ /* RTW_INFO("%02X ", data[i+j]); */ -+ pextra += sprintf(pextra, "%02X ", pEfuseHal->BTEfuseInitMap[i+j]); -+ } -+ /* RTW_INFO("\n"); */ -+ pextra += sprintf(pextra, "\n"); -+ } -+ /* RTW_INFO("\n"); */ -+ } else if (strcmp(tmp[0], "btrmap") == 0) { -+ u8 BTStatus; -+ -+ rtw_write8(padapter, 0xa3, 0x05); /* For 8723AB ,8821S ? */ -+ BTStatus = rtw_read8(padapter, 0xa0); -+ -+ RTW_INFO("%s: Check 0xa0 BT Status =0x%x\n", __FUNCTION__, BTStatus); -+ if (BTStatus != 0x04) { -+ sprintf(extra, "BT Status not Active ,can't to read BT eFuse\n"); -+ goto exit; -+ } -+ -+ if ((tmp[1] == NULL) || (tmp[2] == NULL)) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ BTEfuse_PowerSwitch(padapter, 1, _TRUE); -+ -+ /* rmap addr cnts */ -+ addr = simple_strtoul(tmp[1], &ptmp, 16); -+ RTW_INFO("%s: addr=0x%X\n", __FUNCTION__, addr); -+ -+ cnts = simple_strtoul(tmp[2], &ptmp, 10); -+ if (cnts == 0) { -+ RTW_INFO("%s: btrmap Fail!! cnts error!\n", __FUNCTION__); -+ err = -EINVAL; -+ goto exit; -+ } -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+#ifndef RTW_HALMAC -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); -+ if ((addr + cnts) > max_available_len) { -+ RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); -+ err = -EFAULT; -+ goto exit; -+ } -+#endif -+ if (rtw_BT_efuse_map_read(padapter, addr, cnts, data) == _FAIL) { -+ RTW_INFO("%s: rtw_BT_efuse_map_read error!!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ *extra = 0; -+ pextra = extra; -+ /* RTW_INFO("%s: bt efuse data={", __FUNCTION__); */ -+ for (i = 0; i < cnts; i++) { -+ /* RTW_INFO("0x%02x ", data[i]); */ -+ pextra += sprintf(pextra, " 0x%02X ", data[i]); -+ } -+ /* RTW_INFO("}\n"); */ -+ RTW_INFO(FUNC_ADPT_FMT ": BT MAC=[%s]\n", FUNC_ADPT_ARG(padapter), extra); -+ } else if (strcmp(tmp[0], "btffake") == 0) { -+ /* RTW_INFO("OFFSET\tVALUE(hex)\n"); */ -+ sprintf(extra, "\n"); -+ for (i = 0; i < 512; i += 16) { -+ /* RTW_INFO("0x%03x\t", i); */ -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "0x%03x\t", i); -+ for (j = 0; j < 8; j++) { -+ /* RTW_INFO("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); */ -+ pextra += sprintf(pextra, "%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); -+ } -+ /* RTW_INFO("\t"); */ -+ pextra += sprintf(pextra, "\t"); -+ for (; j < 16; j++) { -+ /* RTW_INFO("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); */ -+ pextra += sprintf(pextra, "%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); -+ } -+ /* RTW_INFO("\n"); */ -+ pextra += sprintf(pextra, "\n"); -+ } -+ /* RTW_INFO("\n"); */ -+ } else if (strcmp(tmp[0], "btbfake") == 0) { -+ /* RTW_INFO("OFFSET\tVALUE(hex)\n"); */ -+ sprintf(extra, "\n"); -+ for (i = 512; i < 1024; i += 16) { -+ /* RTW_INFO("0x%03x\t", i); */ -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "0x%03x\t", i); -+ for (j = 0; j < 8; j++) { -+ /* RTW_INFO("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); */ -+ pextra += sprintf(pextra, "%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); -+ } -+ /* RTW_INFO("\t"); */ -+ pextra += sprintf(pextra, "\t"); -+ for (; j < 16; j++) { -+ /* RTW_INFO("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); */ -+ pextra += sprintf(pextra, "%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); -+ } -+ /* RTW_INFO("\n"); */ -+ pextra += sprintf(pextra, "\n"); -+ } -+ /* RTW_INFO("\n"); */ -+ } else if (strcmp(tmp[0], "wlrfkmap") == 0) { -+ static u8 fk_order = 0; -+ u8 *efuse; -+ u32 shift, cnt; -+ u32 blksz = 0x200; /* The size of one time show, default 512 */ -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (void *)&mapLen, _FALSE); -+ efuse = pEfuseHal->fakeEfuseModifiedMap; -+ -+ shift = blksz * fk_order; -+ efuse += shift; -+ cnt = mapLen - shift; -+ if (cnt > blksz) { -+ cnt = blksz; -+ fk_order++; -+ } else -+ fk_order = 0; -+ -+ sprintf(extra, "\n"); -+ for (i = 0; i < cnt; i += 16) { -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "0x%02x\t", shift + i); -+ for (j = 0; j < 8; j++) -+ pextra += sprintf(pextra, "%02X ", efuse[i + j]); -+ pextra += sprintf(pextra, "\t"); -+ for (; j < 16; j++) -+ pextra += sprintf(pextra, "%02X ", efuse[i + j]); -+ pextra += sprintf(pextra, "\n"); -+ } -+ if ((shift + cnt) < mapLen) -+ pextra += sprintf(pextra, "\t...more\n"); -+ -+ } else if (strcmp(tmp[0], "wlrfkrmap") == 0) { -+ if ((tmp[1] == NULL) || (tmp[2] == NULL)) { -+ RTW_INFO("%s: rmap Fail!! Parameters error!\n", __FUNCTION__); -+ err = -EINVAL; -+ goto exit; -+ } -+ /* rmap addr cnts */ -+ addr = simple_strtoul(tmp[1], &ptmp, 16); -+ RTW_INFO("%s: addr=%x\n", __FUNCTION__, addr); -+ -+ cnts = simple_strtoul(tmp[2], &ptmp, 10); -+ if (cnts == 0) { -+ RTW_INFO("%s: rmap Fail!! cnts error!\n", __FUNCTION__); -+ err = -EINVAL; -+ goto exit; -+ } -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ -+ /* RTW_INFO("%s: data={", __FUNCTION__); */ -+ *extra = 0; -+ pextra = extra; -+ for (i = 0; i < cnts; i++) { -+ RTW_INFO("wlrfkrmap = 0x%02x\n", pEfuseHal->fakeEfuseModifiedMap[addr + i]); -+ pextra += sprintf(pextra, "0x%02X ", pEfuseHal->fakeEfuseModifiedMap[addr+i]); -+ } -+ } else if (strcmp(tmp[0], "btrfkrmap") == 0) { -+ if ((tmp[1] == NULL) || (tmp[2] == NULL)) { -+ RTW_INFO("%s: rmap Fail!! Parameters error!\n", __FUNCTION__); -+ err = -EINVAL; -+ goto exit; -+ } -+ /* rmap addr cnts */ -+ addr = simple_strtoul(tmp[1], &ptmp, 16); -+ RTW_INFO("%s: addr=%x\n", __FUNCTION__, addr); -+ -+ cnts = simple_strtoul(tmp[2], &ptmp, 10); -+ if (cnts == 0) { -+ RTW_INFO("%s: rmap Fail!! cnts error!\n", __FUNCTION__); -+ err = -EINVAL; -+ goto exit; -+ } -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ -+ /* RTW_INFO("%s: data={", __FUNCTION__); */ -+ *extra = 0; -+ pextra = extra; -+ for (i = 0; i < cnts; i++) { -+ RTW_INFO("wlrfkrmap = 0x%02x\n", pEfuseHal->fakeBTEfuseModifiedMap[addr + i]); -+ pextra += sprintf(pextra, "0x%02X ", pEfuseHal->fakeBTEfuseModifiedMap[addr+i]); -+ } -+ } else if (strcmp(tmp[0], "mask") == 0) { -+ *extra = 0; -+ mask_len = sizeof(u8) * rtw_get_efuse_mask_arraylen(padapter); -+ rtw_efuse_mask_array(padapter, mask_buf); -+ -+ if (padapter->registrypriv.bFileMaskEfuse == _TRUE) -+ _rtw_memcpy(mask_buf, maskfileBuffer, mask_len); -+ -+ sprintf(extra, "\n"); -+ pextra = extra + strlen(extra); -+ for (i = 0; i < mask_len; i++) -+ pextra += sprintf(pextra, "0x%02X\n", mask_buf[i]); -+ -+ } else if (strcmp(tmp[0], "btmask") == 0) { -+ *extra = 0; -+ mask_len = sizeof(u8) * rtw_get_bt_efuse_mask_arraylen(padapter); -+ rtw_bt_efuse_mask_array(padapter, mask_buf); -+ -+ if (padapter->registrypriv.bBTFileMaskEfuse == _TRUE) -+ _rtw_memcpy(mask_buf, btmaskfileBuffer, mask_len); -+ -+ sprintf(extra, "\n"); -+ pextra = extra + strlen(extra); -+ for (i = 0; i < mask_len; i++) -+ pextra += sprintf(pextra, "0x%02X\n", mask_buf[i]); -+ -+ } else -+ sprintf(extra, "Command not found!"); -+ -+exit: -+ if (data) -+ rtw_mfree(data, EFUSE_BT_MAX_MAP_LEN); -+ if (rawdata) -+ rtw_mfree(rawdata, EFUSE_BT_MAX_MAP_LEN); -+ if (!err) -+ wrqu->length = strlen(extra); -+ -+ if (padapter->registrypriv.mp_mode == 0) { -+#ifdef CONFIG_IPS -+ rtw_pm_set_ips(padapter, ips_mode); -+#endif /* CONFIG_IPS */ -+ -+#ifdef CONFIG_LPS -+ rtw_pm_set_lps(padapter, lps_mode); -+#endif /* CONFIG_LPS */ -+ } -+ -+#ifdef CONFIG_IOL -+ padapter->registrypriv.fw_iol = org_fw_iol;/* 0:Disable, 1:enable, 2:by usb speed */ -+#endif -+ return err; -+} -+ -+ -+#ifdef CONFIG_MP_INCLUDED -+static int rtw_mp_efuse_set(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wdata, char *extra) -+{ -+ struct iw_point *wrqu; -+ PADAPTER padapter; -+ struct pwrctrl_priv *pwrctrlpriv ; -+ PHAL_DATA_TYPE pHalData; -+ PEFUSE_HAL pEfuseHal; -+ struct hal_ops *pHalFunc; -+ struct mp_priv *pmp_priv; -+ -+ u8 ips_mode = IPS_NUM; /* init invalid value */ -+ u8 lps_mode = PS_MODE_NUM; /* init invalid value */ -+ u32 i = 0, j = 0, jj, kk; -+ u8 *setdata = NULL; -+ u8 *ShadowMapBT = NULL; -+ u8 *ShadowMapWiFi = NULL; -+ u8 *setrawdata = NULL; -+ char *pch, *ptmp, *token, *tmp[3] = {0x00, 0x00, 0x00}; -+ u16 addr = 0xFF, cnts = 0, BTStatus = 0 , max_available_len = 0; -+ u16 wifimaplen; -+ int err; -+ boolean bcmpchk = _TRUE; -+ -+ -+ wrqu = (struct iw_point *)wdata; -+ padapter = rtw_netdev_priv(dev); -+ pwrctrlpriv = adapter_to_pwrctl(padapter); -+ pHalData = GET_HAL_DATA(padapter); -+ pEfuseHal = &pHalData->EfuseHal; -+ pHalFunc = &padapter->hal_func; -+ pmp_priv = &padapter->mppriv; -+ -+ err = 0; -+ -+ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+#ifdef CONFIG_RTL8822C -+ rtw_pre_bt_efuse(padapter); -+#endif -+ *(extra + wrqu->length) = '\0'; -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (void *)&wifimaplen, _FALSE); -+ -+ setdata = rtw_zmalloc(1024); -+ if (setdata == NULL) { -+ err = -ENOMEM; -+ goto exit; -+ } -+ ShadowMapBT = rtw_malloc(EFUSE_BT_MAX_MAP_LEN); -+ if (ShadowMapBT == NULL) { -+ err = -ENOMEM; -+ goto exit; -+ } -+ ShadowMapWiFi = rtw_malloc(wifimaplen); -+ if (ShadowMapWiFi == NULL) { -+ err = -ENOMEM; -+ goto exit; -+ } -+ setrawdata = rtw_malloc(EFUSE_MAX_SIZE); -+ if (setrawdata == NULL) { -+ err = -ENOMEM; -+ goto exit; -+ } -+ -+#ifdef CONFIG_LPS -+ lps_mode = pwrctrlpriv->power_mgnt;/* keep org value */ -+ rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); -+#endif -+ -+#ifdef CONFIG_IPS -+ ips_mode = pwrctrlpriv->ips_mode;/* keep org value */ -+ rtw_pm_set_ips(padapter, IPS_NONE); -+#endif -+ -+ pch = extra; -+ RTW_INFO("%s: in=%s\n", __FUNCTION__, extra); -+ -+ i = 0; -+ while ((token = strsep(&pch, ",")) != NULL) { -+ if (i > 2) -+ break; -+ tmp[i] = token; -+ i++; -+ } -+ -+ /* tmp[0],[1],[2] */ -+ /* wmap,addr,00e04c871200 */ -+ if (strcmp(tmp[0], "wmap") == 0) { -+ if ((tmp[1] == NULL) || (tmp[2] == NULL)) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+#ifndef RTW_HALMAC -+ /* unknown bug workaround, need to fix later */ -+ addr = 0x1ff; -+ rtw_write8(padapter, EFUSE_CTRL + 1, (addr & 0xff)); -+ rtw_msleep_os(10); -+ rtw_write8(padapter, EFUSE_CTRL + 2, ((addr >> 8) & 0x03)); -+ rtw_msleep_os(10); -+ rtw_write8(padapter, EFUSE_CTRL + 3, 0x72); -+ rtw_msleep_os(10); -+ rtw_read8(padapter, EFUSE_CTRL); -+#endif /* RTW_HALMAC */ -+ -+ addr = simple_strtoul(tmp[1], &ptmp, 16); -+ addr &= 0xFFF; -+ -+ cnts = strlen(tmp[2]); -+ if (cnts % 2) { -+ err = -EINVAL; -+ goto exit; -+ } -+ cnts /= 2; -+ if (cnts == 0) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ RTW_INFO("%s: addr=0x%X\n", __FUNCTION__, addr); -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ RTW_INFO("%s: map data=%s\n", __FUNCTION__, tmp[2]); -+ -+ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) -+ setdata[jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]); -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); -+ -+ if ((addr + cnts) > max_available_len) { -+ RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ if (rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_map_write error!!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+ *extra = 0; -+ RTW_INFO("%s: after rtw_efuse_map_write to _rtw_memcmp\n", __func__); -+ if (rtw_efuse_mask_map_read(padapter, addr, cnts, ShadowMapWiFi) == _SUCCESS) { -+ if (_rtw_memcmp((void *)ShadowMapWiFi , (void *)setdata, cnts)) { -+ RTW_INFO("%s: WiFi write map afterf compare success\n", __FUNCTION__); -+ sprintf(extra, "WiFi write map compare OK\n"); -+ err = 0; -+ goto exit; -+ } else { -+ sprintf(extra, "WiFi write map compare FAIL\n"); -+ RTW_INFO("%s: WiFi write map compare Fail\n", __FUNCTION__); -+ err = 0; -+ goto exit; -+ } -+ } -+ } else if (strcmp(tmp[0], "wraw") == 0) { -+ if ((tmp[1] == NULL) || (tmp[2] == NULL)) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ addr = simple_strtoul(tmp[1], &ptmp, 16); -+ addr &= 0xFFF; -+ -+ cnts = strlen(tmp[2]); -+ if (cnts % 2) { -+ err = -EINVAL; -+ goto exit; -+ } -+ cnts /= 2; -+ if (cnts == 0) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ RTW_INFO("%s: addr=0x%X\n", __FUNCTION__, addr); -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ RTW_INFO("%s: raw data=%s\n", __FUNCTION__, tmp[2]); -+ -+ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) -+ setrawdata[jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]); -+ -+ if (rtw_efuse_access(padapter, _TRUE, addr, cnts, setrawdata) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_access error!!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+ } else if (strcmp(tmp[0], "btwraw") == 0) { -+ if ((tmp[1] == NULL) || (tmp[2] == NULL)) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ addr = simple_strtoul(tmp[1], &ptmp, 16); -+ addr &= 0xFFF; -+ -+ cnts = strlen(tmp[2]); -+ if (cnts % 2) { -+ err = -EINVAL; -+ goto exit; -+ } -+ cnts /= 2; -+ if (cnts == 0) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ RTW_INFO("%s: addr=0x%X\n", __FUNCTION__, addr); -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ RTW_INFO("%s: raw data=%s\n", __FUNCTION__, tmp[2]); -+ -+ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) -+ setrawdata[jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]); -+#ifdef RTW_HALMAC -+ if (rtw_efuse_bt_access(padapter, _TRUE, addr, cnts, setrawdata) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_access error!!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+#else -+ rtw_write8(padapter, 0x35, 1); /* switch bank 1 (BT)*/ -+ if (rtw_efuse_access(padapter, _TRUE, addr, cnts, setrawdata) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_access error!!\n", __FUNCTION__); -+ rtw_write8(padapter, 0x35, 0); /* switch bank 0 (WiFi)*/ -+ err = -EFAULT; -+ goto exit; -+ } -+ rtw_write8(padapter, 0x35, 0); /* switch bank 0 (WiFi)*/ -+#endif -+ } else if (strcmp(tmp[0], "mac") == 0) { -+ if (tmp[1] == NULL) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ /* mac,00e04c871200 */ -+ -+ if (hal_efuse_macaddr_offset(padapter) == -1) { -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ addr = hal_efuse_macaddr_offset(padapter); -+ cnts = strlen(tmp[1]); -+ if (cnts % 2) { -+ err = -EINVAL; -+ goto exit; -+ } -+ cnts /= 2; -+ if (cnts == 0) { -+ err = -EINVAL; -+ goto exit; -+ } -+ if (cnts > 6) { -+ RTW_INFO("%s: error data for mac addr=\"%s\"\n", __FUNCTION__, tmp[1]); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ RTW_INFO("%s: addr=0x%X\n", __FUNCTION__, addr); -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ RTW_INFO("%s: MAC address=%s\n", __FUNCTION__, tmp[1]); -+ -+ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) -+ setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); -+ -+ if ((addr + cnts) > max_available_len) { -+ RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ if (rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_map_write error!!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+ } else if (strcmp(tmp[0], "vidpid") == 0) { -+ if (tmp[1] == NULL) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ /* pidvid,da0b7881 */ -+#ifdef CONFIG_RTL8188E -+#ifdef CONFIG_USB_HCI -+ addr = EEPROM_VID_88EU; -+#endif -+#ifdef CONFIG_PCI_HCI -+ addr = EEPROM_VID_88EE; -+#endif -+#endif /* CONFIG_RTL8188E */ -+ -+#ifdef CONFIG_RTL8192E -+#ifdef CONFIG_USB_HCI -+ addr = EEPROM_VID_8192EU; -+#endif -+#ifdef CONFIG_PCI_HCI -+ addr = EEPROM_VID_8192EE; -+#endif -+#endif /* CONFIG_RTL8188E */ -+ -+#ifdef CONFIG_RTL8723B -+ addr = EEPROM_VID_8723BU; -+#endif -+ -+#ifdef CONFIG_RTL8188F -+ addr = EEPROM_VID_8188FU; -+#endif -+ -+#ifdef CONFIG_RTL8188GTV -+ addr = EEPROM_VID_8188GTVU; -+#endif -+ -+#ifdef CONFIG_RTL8703B -+#ifdef CONFIG_USB_HCI -+ addr = EEPROM_VID_8703BU; -+#endif /* CONFIG_USB_HCI */ -+#endif /* CONFIG_RTL8703B */ -+ -+#ifdef CONFIG_RTL8723D -+#ifdef CONFIG_USB_HCI -+ addr = EEPROM_VID_8723DU; -+#endif /* CONFIG_USB_HCI */ -+#endif /* CONFIG_RTL8723D */ -+ -+ cnts = strlen(tmp[1]); -+ if (cnts % 2) { -+ err = -EINVAL; -+ goto exit; -+ } -+ cnts /= 2; -+ if (cnts == 0) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ RTW_INFO("%s: addr=0x%X\n", __FUNCTION__, addr); -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ RTW_INFO("%s: VID/PID=%s\n", __FUNCTION__, tmp[1]); -+ -+ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) -+ setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); -+ if ((addr + cnts) > max_available_len) { -+ RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ if (rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_map_write error!!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+ } else if (strcmp(tmp[0], "wldumpfake") == 0) { -+ if (wifimaplen > EFUSE_MAX_MAP_LEN) -+ cnts = EFUSE_MAX_MAP_LEN; -+ else -+ cnts = wifimaplen; -+ if (rtw_efuse_mask_map_read(padapter, 0, cnts, pEfuseHal->fakeEfuseModifiedMap) == _SUCCESS) -+ RTW_INFO("%s: WiFi hw efuse dump to Fake map success\n", __func__); -+ else { -+ RTW_INFO("%s: WiFi hw efuse dump to Fake map Fail\n", __func__); -+ err = -EFAULT; -+ } -+ } else if (strcmp(tmp[0], "btwmap") == 0) { -+ rtw_write8(padapter, 0xa3, 0x05); /* For 8723AB ,8821S ? */ -+ BTStatus = rtw_read8(padapter, 0xa0); -+ RTW_INFO("%s: btwmap before read 0xa0 BT Status =0x%x\n", __FUNCTION__, BTStatus); -+ if (BTStatus != 0x04) { -+ sprintf(extra, "BT Status not Active ,can't do Write\n"); -+ goto exit; -+ } -+ -+ if ((tmp[1] == NULL) || (tmp[2] == NULL)) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+#ifndef RTW_HALMAC -+ BTEfuse_PowerSwitch(padapter, 1, _TRUE); -+ addr = 0x1ff; -+ rtw_write8(padapter, EFUSE_CTRL + 1, (addr & 0xff)); -+ rtw_msleep_os(10); -+ rtw_write8(padapter, EFUSE_CTRL + 2, ((addr >> 8) & 0x03)); -+ rtw_msleep_os(10); -+ rtw_write8(padapter, EFUSE_CTRL + 3, 0x72); -+ rtw_msleep_os(10); -+ rtw_read8(padapter, EFUSE_CTRL); -+ BTEfuse_PowerSwitch(padapter, 1, _FALSE); -+#endif /* RTW_HALMAC */ -+ -+ addr = simple_strtoul(tmp[1], &ptmp, 16); -+ addr &= 0xFFF; -+ -+ cnts = strlen(tmp[2]); -+ if (cnts % 2) { -+ err = -EINVAL; -+ goto exit; -+ } -+ cnts /= 2; -+ if (cnts == 0) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ RTW_INFO("%s: addr=0x%X\n", __FUNCTION__, addr); -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ RTW_INFO("%s: BT data=%s\n", __FUNCTION__, tmp[2]); -+ -+ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) -+ setdata[jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]); -+#ifndef RTW_HALMAC -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&max_available_len, _FALSE); -+ if ((addr + cnts) > max_available_len) { -+ RTW_INFO("%s: addr(0x%X)+cnts(%d) parameter error!\n", __FUNCTION__, addr, cnts); -+ err = -EFAULT; -+ goto exit; -+ } -+#endif -+ if (rtw_BT_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) { -+ RTW_INFO("%s: rtw_BT_efuse_map_write error!!\n", __FUNCTION__); -+ sprintf(extra, "BT write FAIL !!!\n"); -+ err = -EFAULT; -+ goto exit; -+ } -+ *extra = 0; -+ RTW_INFO("%s: after rtw_BT_efuse_map_write to _rtw_memcmp\n", __FUNCTION__); -+ if ((rtw_BT_efuse_map_read(padapter, addr, cnts, ShadowMapBT) == _SUCCESS)) { -+ if (_rtw_memcmp((void *)ShadowMapBT , (void *)setdata, cnts)) { -+ RTW_INFO("%s: BT write map compare OK BTStatus=0x%x\n", __FUNCTION__, BTStatus); -+ sprintf(extra, "BT write map compare OK"); -+ err = 0; -+ goto exit; -+ } else { -+ sprintf(extra, "BT write map compare FAIL"); -+ RTW_INFO("%s: BT write map compare FAIL BTStatus=0x%x\n", __FUNCTION__, BTStatus); -+ err = 0; -+ goto exit; -+ } -+ } -+ } else if (strcmp(tmp[0], "btwfake") == 0) { -+ if ((tmp[1] == NULL) || (tmp[2] == NULL)) { -+ err = -EINVAL; -+ goto exit; -+ } -+ if (pmp_priv->bprocess_mp_mode != _TRUE) { -+ RTW_INFO("%s: btwfake not to be exec, please first to mp_start\n", __FUNCTION__); -+ sprintf(extra, "Error, btwfake cant to be exec, please first to mp_start !!!!\n"); -+ err = 0; -+ goto exit; -+ } -+ addr = simple_strtoul(tmp[1], &ptmp, 16); -+ addr &= 0xFFF; -+ -+ cnts = strlen(tmp[2]); -+ if (cnts % 2) { -+ err = -EINVAL; -+ goto exit; -+ } -+ cnts /= 2; -+ if (cnts == 0) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ RTW_INFO("%s: addr=0x%X\n", __FUNCTION__, addr); -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ RTW_INFO("%s: BT tmp data=%s\n", __FUNCTION__, tmp[2]); -+ -+ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) -+ pEfuseHal->fakeBTEfuseModifiedMap[addr + jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]); -+ } else if (strcmp(tmp[0], "btdumpfake") == 0) { -+ if (rtw_BT_efuse_map_read(padapter, 0, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseModifiedMap) == _SUCCESS) -+ RTW_INFO("%s: BT read all map success\n", __FUNCTION__); -+ else { -+ RTW_INFO("%s: BT read all map Fail!\n", __FUNCTION__); -+ err = -EFAULT; -+ } -+ } else if (strcmp(tmp[0], "btfk2map") == 0) { -+#ifdef CONFIG_BT_EFUSE_MASK -+ if (padapter->registrypriv.bBTFileMaskEfuse != _TRUE && pmp_priv->bloadBTefusemap == _TRUE) { -+ RTW_INFO("%s: File BT eFuse mask file not to be loaded\n", __FUNCTION__); -+ sprintf(extra, "Not load BT eFuse mask file yet, Please advance to use [ efuse_bt_mask ], now remove the Adapter.!!!!\n"); -+ rtw_set_surprise_removed(padapter); -+ err = 0; -+ goto exit; -+ } -+#endif -+ rtw_write8(padapter, 0xa3, 0x05); -+ BTStatus = rtw_read8(padapter, 0xa0); -+ RTW_INFO("%s: btwmap before read 0xa0 BT Status =0x%x\n", __FUNCTION__, BTStatus); -+ if (BTStatus != 0x04) { -+ sprintf(extra, "BT Status not Active Write FAIL\n"); -+ goto exit; -+ } -+ if (pmp_priv->bprocess_mp_mode != _TRUE) { -+ RTW_INFO("%s: btfk2map not to be exec, please first to mp_start\n", __FUNCTION__); -+ sprintf(extra, "Error, btfk2map cant to be exec, please first to mp_start !!!!\n"); -+ err = 0; -+ goto exit; -+ } -+#ifndef RTW_HALMAC -+ BTEfuse_PowerSwitch(padapter, 1, _TRUE); -+ addr = 0x1ff; -+ rtw_write8(padapter, EFUSE_CTRL + 1, (addr & 0xff)); -+ rtw_msleep_os(10); -+ rtw_write8(padapter, EFUSE_CTRL + 2, ((addr >> 8) & 0x03)); -+ rtw_msleep_os(10); -+ rtw_write8(padapter, EFUSE_CTRL + 3, 0x72); -+ rtw_msleep_os(10); -+ rtw_read8(padapter, EFUSE_CTRL); -+ BTEfuse_PowerSwitch(padapter, 1, _FALSE); -+#endif /* RTW_HALMAC */ -+ -+ if (rtw_BT_efuse_map_write(padapter, 0x00, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseModifiedMap) == _FAIL) { -+ RTW_INFO("%s: rtw_BT_efuse_map_write error!\n", __FUNCTION__); -+ sprintf(extra, "BT write FAIL !!!\n"); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ RTW_INFO("pEfuseHal->fakeBTEfuseModifiedMap OFFSET\tVALUE(hex)\n"); -+ for (i = 0; i < EFUSE_BT_MAX_MAP_LEN; i += 16) { -+ printk("0x%02x\t", i); -+ for (j = 0; j < 8; j++) -+ printk("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i + j]); -+ printk("\t"); -+ -+ for (; j < 16; j++) -+ printk("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i + j]); -+ printk("\n"); -+ } -+ printk("\n"); -+#if 1 -+ err = -EFAULT; -+ RTW_INFO("%s: rtw_BT_efuse_map_read _rtw_memcmp\n", __FUNCTION__); -+ if ((rtw_BT_efuse_map_read(padapter, 0x00, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseInitMap) == _SUCCESS)) { -+ if (_rtw_memcmp((void *)pEfuseHal->fakeBTEfuseModifiedMap, (void *)pEfuseHal->fakeBTEfuseInitMap, EFUSE_BT_MAX_MAP_LEN)) { -+ sprintf(extra, "BT write map compare OK"); -+ RTW_INFO("%s: BT write map afterf compare success BTStatus=0x%x\n", __FUNCTION__, BTStatus); -+ err = 0; -+ goto exit; -+ } else { -+ sprintf(extra, "BT write map compare FAIL"); -+ if (rtw_BT_efuse_map_write(padapter, 0x00, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseModifiedMap) == _FAIL) -+ RTW_INFO("%s: rtw_BT_efuse_map_write compare error,retry = %d!\n", __FUNCTION__, i); -+ -+ if (rtw_BT_efuse_map_read(padapter, EFUSE_BT, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseInitMap) == _SUCCESS) { -+ RTW_INFO("pEfuseHal->fakeBTEfuseInitMap OFFSET\tVALUE(hex)\n"); -+ -+ for (i = 0; i < EFUSE_BT_MAX_MAP_LEN; i += 16) { -+ printk("0x%02x\t", i); -+ for (j = 0; j < 8; j++) -+ printk("%02X ", pEfuseHal->fakeBTEfuseInitMap[i + j]); -+ printk("\t"); -+ for (; j < 16; j++) -+ printk("%02X ", pEfuseHal->fakeBTEfuseInitMap[i + j]); -+ printk("\n"); -+ } -+ printk("\n"); -+ } -+ RTW_INFO("%s: BT write map afterf compare not match to write efuse try write Map again , BTStatus=0x%x\n", __FUNCTION__, BTStatus); -+ goto exit; -+ } -+ } -+#endif -+ -+ } else if (strcmp(tmp[0], "wlfk2map") == 0) { -+ *extra = 0; -+ -+ if (padapter->registrypriv.bFileMaskEfuse != _TRUE && pmp_priv->bloadefusemap == _TRUE) { -+ RTW_INFO("%s: File eFuse mask file not to be loaded\n", __FUNCTION__); -+ sprintf(extra, "Not load eFuse mask file yet, Please use the efuse_mask CMD, now remove the interface !!!!\n"); -+ rtw_set_surprise_removed(padapter); -+ err = 0; -+ goto exit; -+ } -+ -+ if (pmp_priv->bprocess_mp_mode != _TRUE) { -+ RTW_INFO("%s: wlfk2map not to be exec, please first to mp_start\n", __FUNCTION__); -+ sprintf(extra, "Error, wlfk2map cant to be exec, please first to mp_start !!!!\n"); -+ err = 0; -+ goto exit; -+ } -+ if (wifimaplen > EFUSE_MAX_MAP_LEN) -+ cnts = EFUSE_MAX_MAP_LEN; -+ else -+ cnts = wifimaplen; -+ if (rtw_efuse_map_write(padapter, 0x00, cnts, pEfuseHal->fakeEfuseModifiedMap) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_map_write fakeEfuseModifiedMap error!\n", __FUNCTION__); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ if (rtw_efuse_mask_map_read(padapter, 0x00, wifimaplen, ShadowMapWiFi) == _SUCCESS) { -+ addr = 0x00; -+ err = _TRUE; -+ -+ for (i = 0; i < cnts; i++) { -+ if (padapter->registrypriv.boffefusemask == 0) { -+ if (padapter->registrypriv.bFileMaskEfuse == _TRUE) { -+ if (rtw_file_efuse_IsMasked(padapter, addr + i, maskfileBuffer) == _TRUE) /*use file efuse mask. */ -+ bcmpchk = _FALSE; -+ } else { -+ if (efuse_IsMasked(padapter, addr + i) == _TRUE) -+ bcmpchk = _FALSE; -+ } -+ } -+ -+ if (bcmpchk == _TRUE) { -+ RTW_INFO("compare readMapWiFi[0x%02x] = %x, ModifiedMap = %x\n", addr + i, ShadowMapWiFi[ addr + i], pEfuseHal->fakeEfuseModifiedMap[addr + i]); -+ if (_rtw_memcmp((void *) &ShadowMapWiFi[addr + i], (void *)&pEfuseHal->fakeEfuseModifiedMap[addr + i], 1) == _FALSE){ -+ err = _FALSE; -+ break; -+ } -+ } -+ bcmpchk = _TRUE; -+ } -+ } -+ -+ if (err) { -+ RTW_INFO("%s: WiFi write map afterf compare OK\n", __FUNCTION__); -+ sprintf(extra, "WiFi write map compare OK\n"); -+ err = 0; -+ goto exit; -+ } else { -+ sprintf(extra, "WiFi write map compare FAIL\n"); -+ RTW_INFO("%s: WiFi write map compare Fail\n", __FUNCTION__); -+ err = 0; -+ goto exit; -+ } -+ } else if (strcmp(tmp[0], "wlwfake") == 0) { -+ if ((tmp[1] == NULL) || (tmp[2] == NULL)) { -+ err = -EINVAL; -+ goto exit; -+ } -+ if (pmp_priv->bprocess_mp_mode != _TRUE) { -+ RTW_INFO("%s: wlwfake not to be exec, please first to mp_start\n", __FUNCTION__); -+ sprintf(extra, "Error, wlwfake cant to be exec, please first to mp_start !!!!\n"); -+ err = 0; -+ goto exit; -+ } -+ addr = simple_strtoul(tmp[1], &ptmp, 16); -+ addr &= 0xFFF; -+ -+ cnts = strlen(tmp[2]); -+ if (cnts % 2) { -+ err = -EINVAL; -+ goto exit; -+ } -+ cnts /= 2; -+ if (cnts == 0) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ RTW_INFO("%s: addr=0x%X\n", __FUNCTION__, addr); -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ RTW_INFO("%s: map tmp data=%s\n", __FUNCTION__, tmp[2]); -+ -+ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) -+ pEfuseHal->fakeEfuseModifiedMap[addr + jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]); -+ _rtw_memset(extra, '\0', strlen(extra)); -+ sprintf(extra, "wlwfake OK\n"); -+ -+ } -+ else if (strcmp(tmp[0], "wfakemac") == 0) { -+ if (tmp[1] == NULL) { -+ err = -EINVAL; -+ goto exit; -+ } -+ if (pmp_priv->bprocess_mp_mode != _TRUE) { -+ RTW_INFO("%s: wfakemac not to be exec, please first to mp_start\n", __FUNCTION__); -+ sprintf(extra, "Error, wfakemac cant to be exec, please first to mp_start !!!!\n"); -+ err = 0; -+ goto exit; -+ } -+ /* wfakemac,00e04c871200 */ -+ if (hal_efuse_macaddr_offset(padapter) == -1) { -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ addr = hal_efuse_macaddr_offset(padapter); -+ cnts = strlen(tmp[1]); -+ if (cnts % 2) { -+ err = -EINVAL; -+ goto exit; -+ } -+ cnts /= 2; -+ if (cnts == 0) { -+ err = -EINVAL; -+ goto exit; -+ } -+ if (cnts > 6) { -+ RTW_INFO("%s: error data for mac addr=\"%s\"\n", __FUNCTION__, tmp[1]); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ RTW_INFO("%s: addr=0x%X\n", __FUNCTION__, addr); -+ RTW_INFO("%s: cnts=%d\n", __FUNCTION__, cnts); -+ RTW_INFO("%s: MAC address=%s\n", __FUNCTION__, tmp[1]); -+ -+ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) -+ if ((addr + jj) < EFUSE_MAX_MAP_LEN) -+ pEfuseHal->fakeEfuseModifiedMap[addr + jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); -+ -+ _rtw_memset(extra, '\0', strlen(extra)); -+ sprintf(extra, "write mac addr to fake map OK\n"); -+ } else if(strcmp(tmp[0], "update") == 0) { -+ RTW_INFO("To Use new eFuse map ver3\n"); -+ if (tmp[1] != 0x00) { -+ pmp_priv->efuse_update_file = _TRUE; -+ strcpy(pmp_priv->efuse_file_path , tmp[1]); -+ RTW_INFO("Got file path %s\n", pmp_priv->efuse_file_path); -+ } -+ /*step read efuse/eeprom data and get mac_addr*/ -+ if (padapter->hal_func.read_adapter_info(padapter)) { -+ _rtw_memset(extra, '\0', strlen(extra)); -+ sprintf(extra, "eFuse Update OK\n"); -+ RTW_INFO("eFuse Update OK\n"); -+ } else { -+ _rtw_memset(extra, '\0', strlen(extra)); -+ sprintf(extra, "eFuse Update FAIL\n"); -+ RTW_INFO("eFuse Update FAIL\n"); -+ } -+ pmp_priv->efuse_update_file = _FALSE; -+ RTW_INFO("To Use new eFuse map done ver3\n"); -+ } else if (strcmp(tmp[0], "analyze") == 0) { -+ -+ rtw_efuse_analyze(padapter, EFUSE_WIFI, 0); -+ _rtw_memset(extra, '\0', strlen(extra)); -+ sprintf(extra, "eFuse Analyze OK,please to check kernel log\n"); -+ } -+exit: -+ if (setdata) -+ rtw_mfree(setdata, 1024); -+ if (ShadowMapBT) -+ rtw_mfree(ShadowMapBT, EFUSE_BT_MAX_MAP_LEN); -+ if (ShadowMapWiFi) -+ rtw_mfree(ShadowMapWiFi, wifimaplen); -+ if (setrawdata) -+ rtw_mfree(setrawdata, EFUSE_MAX_SIZE); -+ -+ wrqu->length = strlen(extra); -+ -+ if (padapter->registrypriv.mp_mode == 0) { -+#ifdef CONFIG_IPS -+ rtw_pm_set_ips(padapter, ips_mode); -+#endif /* CONFIG_IPS */ -+ -+#ifdef CONFIG_LPS -+ rtw_pm_set_lps(padapter, lps_mode); -+#endif /* CONFIG_LPS */ -+ } -+ -+ return err; -+} -+ -+#ifdef CONFIG_RTW_CUSTOMER_STR -+static int rtw_mp_customer_str( -+ struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ _adapter *adapter = rtw_netdev_priv(dev); -+ u32 len; -+ u8 *pbuf = NULL, *pch; -+ char *ptmp; -+ u8 param[RTW_CUSTOMER_STR_LEN]; -+ u8 count = 0; -+ u8 tmp; -+ u8 i; -+ u32 pos; -+ u8 ret; -+ u8 read = 0; -+ -+ if (adapter->registrypriv.mp_mode != 1 -+ || !adapter->registrypriv.mp_customer_str) -+ return -EFAULT; -+ -+ len = wrqu->data.length + 1; -+ -+ pbuf = (u8 *)rtw_zmalloc(len); -+ if (pbuf == NULL) { -+ RTW_WARN("%s: no memory!\n", __func__); -+ return -ENOMEM; -+ } -+ -+ if (copy_from_user(pbuf, wrqu->data.pointer, wrqu->data.length)) { -+ rtw_mfree(pbuf, len); -+ RTW_WARN("%s: copy from user fail!\n", __func__); -+ return -EFAULT; -+ } -+ RTW_INFO("%s: string=\"%s\"\n", __func__, pbuf); -+ -+ ptmp = (char *)pbuf; -+ pch = strsep(&ptmp, ","); -+ if ((pch == NULL) || (strlen(pch) == 0)) { -+ rtw_mfree(pbuf, len); -+ RTW_INFO("%s: parameter error(no cmd)!\n", __func__); -+ return -EFAULT; -+ } -+ -+ _rtw_memset(param, 0xFF, RTW_CUSTOMER_STR_LEN); -+ -+ if (strcmp(pch, "read") == 0) { -+ read = 1; -+ ret = rtw_hal_customer_str_read(adapter, param); -+ -+ } else if (strcmp(pch, "write") == 0) { -+ do { -+ pch = strsep(&ptmp, ":"); -+ if ((pch == NULL) || (strlen(pch) == 0)) -+ break; -+ if (strlen(pch) != 2 -+ || IsHexDigit(*pch) == _FALSE -+ || IsHexDigit(*(pch + 1)) == _FALSE -+ || sscanf(pch, "%hhx", &tmp) != 1 -+ ) { -+ RTW_WARN("%s: invalid 8-bit hex!\n", __func__); -+ rtw_mfree(pbuf, len); -+ return -EFAULT; -+ } -+ -+ param[count++] = tmp; -+ -+ } while (count < RTW_CUSTOMER_STR_LEN); -+ -+ if (count == 0) { -+ rtw_mfree(pbuf, len); -+ RTW_WARN("%s: no input!\n", __func__); -+ return -EFAULT; -+ } -+ ret = rtw_hal_customer_str_write(adapter, param); -+ } else { -+ rtw_mfree(pbuf, len); -+ RTW_INFO("%s: parameter error(unknown cmd)!\n", __func__); -+ return -EFAULT; -+ } -+ -+ pos = sprintf(extra, "%s: ", read ? "read" : "write"); -+ if (read == 0 || ret == _SUCCESS) { -+ for (i = 0; i < RTW_CUSTOMER_STR_LEN; i++) -+ pos += sprintf(extra + pos, "%02x:", param[i]); -+ extra[pos] = 0; -+ pos--; -+ } -+ pos += sprintf(extra + pos, " %s", ret == _SUCCESS ? "OK" : "FAIL"); -+ -+ wrqu->data.length = strlen(extra) + 1; -+ -+ rtw_mfree(pbuf, len); -+ return 0; -+} -+#endif /* CONFIG_RTW_CUSTOMER_STR */ -+ -+static int rtw_priv_mp_set(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wdata, char *extra) -+{ -+ -+ struct iw_point *wrqu = (struct iw_point *)wdata; -+ u32 subcmd = wrqu->flags; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ int status = 0; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (!is_primary_adapter(padapter)) { -+ RTW_INFO("MP mode only primary Adapter support\n"); -+ return -EIO; -+ } -+#endif -+ -+ RTW_INFO("%s mutx in %d\n", __func__, subcmd); -+ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->ioctrl_mutex), NULL); -+ switch (subcmd) { -+ case CTA_TEST: -+ RTW_INFO("set CTA_TEST\n"); -+ status = rtw_cta_test_start(dev, info, wdata, extra); -+ break; -+ case MP_DISABLE_BT_COEXIST: -+ RTW_INFO("set case MP_DISABLE_BT_COEXIST\n"); -+ status = rtw_mp_disable_bt_coexist(dev, info, wdata, extra); -+ break; -+ case MP_IQK: -+ RTW_INFO("set MP_IQK\n"); -+ status = rtw_mp_iqk(dev, info, wrqu, extra); -+ break; -+ case MP_LCK: -+ RTW_INFO("set MP_LCK\n"); -+ status = rtw_mp_lck(dev, info, wrqu, extra); -+ break; -+ -+ default: -+ status = -EIO; -+ } -+ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->ioctrl_mutex), NULL); -+ RTW_INFO("%s mutx done %d\n", __func__, subcmd); -+ -+ return status; -+} -+ -+static int rtw_priv_mp_get(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wdata, char *extra) -+{ -+ -+ struct iw_point *wrqu = (struct iw_point *)wdata; -+ u32 subcmd = wrqu->flags; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ int status = 0; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (!is_primary_adapter(padapter)) { -+ RTW_INFO("MP mode only primary Adapter support\n"); -+ return -EIO; -+ } -+#endif -+ -+ RTW_INFO("%s mutx in %d\n", __func__, subcmd); -+ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->ioctrl_mutex), NULL); -+ -+ switch (subcmd) { -+ case MP_START: -+ RTW_INFO("set case mp_start\n"); -+ status = rtw_mp_start(dev, info, wrqu, extra); -+ break; -+ case MP_STOP: -+ RTW_INFO("set case mp_stop\n"); -+ status = rtw_mp_stop(dev, info, wrqu, extra); -+ break; -+ case MP_BANDWIDTH: -+ RTW_INFO("set case mp_bandwidth\n"); -+ status = rtw_mp_bandwidth(dev, info, wrqu, extra); -+ break; -+ case MP_RESET_STATS: -+ RTW_INFO("set case MP_RESET_STATS\n"); -+ status = rtw_mp_reset_stats(dev, info, wrqu, extra); -+ break; -+ case MP_SetRFPathSwh: -+ RTW_INFO("set MP_SetRFPathSwitch\n"); -+ status = rtw_mp_SetRFPath(dev, info, wrqu, extra); -+ break; -+ case WRITE_REG: -+ status = rtw_mp_write_reg(dev, info, wrqu, extra); -+ break; -+ case WRITE_RF: -+ status = rtw_mp_write_rf(dev, info, wrqu, extra); -+ break; -+ case MP_PHYPARA: -+ RTW_INFO("mp_get MP_PHYPARA\n"); -+ status = rtw_mp_phypara(dev, info, wrqu, extra); -+ break; -+ case MP_CHANNEL: -+ RTW_INFO("set case mp_channel\n"); -+ status = rtw_mp_channel(dev , info, wrqu, extra); -+ break; -+ case MP_CHL_OFFSET: -+ RTW_INFO("set case mp_ch_offset\n"); -+ status = rtw_mp_ch_offset(dev , info, wrqu, extra); -+ break; -+ case READ_REG: -+ RTW_INFO("mp_get READ_REG\n"); -+ status = rtw_mp_read_reg(dev, info, wrqu, extra); -+ break; -+ case READ_RF: -+ RTW_INFO("mp_get READ_RF\n"); -+ status = rtw_mp_read_rf(dev, info, wrqu, extra); -+ break; -+ case MP_RATE: -+ RTW_INFO("set case mp_rate\n"); -+ status = rtw_mp_rate(dev, info, wrqu, extra); -+ break; -+ case MP_TXPOWER: -+ RTW_INFO("set case MP_TXPOWER\n"); -+ status = rtw_mp_txpower(dev, info, wrqu, extra); -+ break; -+ case MP_ANT_TX: -+ RTW_INFO("set case MP_ANT_TX\n"); -+ status = rtw_mp_ant_tx(dev, info, wrqu, extra); -+ break; -+ case MP_ANT_RX: -+ RTW_INFO("set case MP_ANT_RX\n"); -+ status = rtw_mp_ant_rx(dev, info, wrqu, extra); -+ break; -+ case MP_QUERY: -+ status = rtw_mp_trx_query(dev, info, wrqu, extra); -+ break; -+ case MP_CTX: -+ RTW_INFO("set case MP_CTX\n"); -+ status = rtw_mp_ctx(dev, info, wrqu, extra); -+ break; -+ case MP_ARX: -+ RTW_INFO("set case MP_ARX\n"); -+ status = rtw_mp_arx(dev, info, wrqu, extra); -+ break; -+ case MP_DUMP: -+ RTW_INFO("set case MP_DUMP\n"); -+ status = rtw_mp_dump(dev, info, wrqu, extra); -+ break; -+ case MP_PSD: -+ RTW_INFO("set case MP_PSD\n"); -+ status = rtw_mp_psd(dev, info, wrqu, extra); -+ break; -+ case MP_THER: -+ RTW_INFO("set case MP_THER\n"); -+ status = rtw_mp_thermal(dev, info, wrqu, extra); -+ break; -+ case MP_PwrCtlDM: -+ RTW_INFO("set MP_PwrCtlDM\n"); -+ status = rtw_mp_PwrCtlDM(dev, info, wrqu, extra); -+ break; -+ case MP_QueryDrvStats: -+ RTW_INFO("mp_get MP_QueryDrvStats\n"); -+ status = rtw_mp_QueryDrv(dev, info, wdata, extra); -+ break; -+ case MP_PWRTRK: -+ RTW_INFO("set case MP_PWRTRK\n"); -+ status = rtw_mp_pwrtrk(dev, info, wrqu, extra); -+ break; -+ case MP_SET_TSSIDE: -+ RTW_INFO("set case MP_TSSI_DE\n"); -+ status = rtw_mp_set_tsside(dev, info, wrqu, extra); -+ break; -+#ifdef CONFIG_MP_INCLUDED -+ case EFUSE_SET: -+ RTW_INFO("set case efuse set\n"); -+ status = rtw_mp_efuse_set(dev, info, wdata, extra); -+ break; -+#endif -+ case EFUSE_GET: -+ RTW_INFO("efuse get EFUSE_GET\n"); -+ status = rtw_mp_efuse_get(dev, info, wdata, extra); -+ break; -+ case MP_GET_TXPOWER_INX: -+ RTW_INFO("mp_get MP_GET_TXPOWER_INX\n"); -+ status = rtw_mp_txpower_index(dev, info, wrqu, extra); -+ break; -+ case MP_GETVER: -+ RTW_INFO("mp_get MP_GETVER\n"); -+ status = rtw_mp_getver(dev, info, wdata, extra); -+ break; -+ case MP_MON: -+ RTW_INFO("mp_get MP_MON\n"); -+ status = rtw_mp_mon(dev, info, wdata, extra); -+ break; -+ case EFUSE_BT_MASK: -+ RTW_INFO("mp_get EFUSE_BT_MASK\n"); -+ status = rtw_bt_efuse_mask_file(dev, info, wdata, extra); -+ break; -+ case EFUSE_MASK: -+ RTW_INFO("mp_get EFUSE_MASK\n"); -+ status = rtw_efuse_mask_file(dev, info, wdata, extra); -+ break; -+ case EFUSE_FILE: -+ RTW_INFO("mp_get EFUSE_FILE\n"); -+ status = rtw_efuse_file_map(dev, info, wdata, extra); -+ break; -+ case EFUSE_FILE_STORE: -+ RTW_INFO("mp_get EFUSE_FILE_STORE\n"); -+ status = rtw_efuse_file_map_store(dev, info, wdata, extra); -+ break; -+ case MP_TX: -+ RTW_INFO("mp_get MP_TX\n"); -+ status = rtw_mp_tx(dev, info, wdata, extra); -+ break; -+ case MP_RX: -+ RTW_INFO("mp_get MP_RX\n"); -+ status = rtw_mp_rx(dev, info, wdata, extra); -+ break; -+ case MP_HW_TX_MODE: -+ RTW_INFO("mp_get MP_HW_TX_MODE\n"); -+ status = rtw_mp_hwtx(dev, info, wdata, extra); -+ break; -+ case MP_GET_TSSIDE: -+ RTW_INFO("mp_get TSSI_DE\n"); -+ status = rtw_mp_get_tsside(dev, info, wrqu, extra); -+ break; -+#ifdef CONFIG_RTW_CUSTOMER_STR -+ case MP_CUSTOMER_STR: -+ RTW_INFO("customer str\n"); -+ status = rtw_mp_customer_str(dev, info, wdata, extra); -+ break; -+#endif -+ case MP_PWRLMT: -+ RTW_INFO("mp_get MP_SETPWRLMT\n"); -+ status = rtw_mp_pwrlmt(dev, info, wdata, extra); -+ break; -+ case MP_PWRBYRATE: -+ RTW_INFO("mp_get MP_SETPWRBYRATE\n"); -+ status = rtw_mp_pwrbyrate(dev, info, wdata, extra); -+ break; -+ case BT_EFUSE_FILE: -+ RTW_INFO("mp_get BT EFUSE_FILE\n"); -+ status = rtw_bt_efuse_file_map(dev, info, wdata, extra); -+ break; -+ case MP_SWRFPath: -+ RTW_INFO("mp_get MP_SWRFPath\n"); -+ status = rtw_mp_switch_rf_path(dev, info, wrqu, extra); -+ break; -+ case MP_LINK: -+ RTW_INFO("mp_get MP_LINK\n"); -+ status = rtw_mp_link(dev, info, wrqu, extra); -+ break; -+ case MP_DPK_TRK: -+ RTW_INFO("mp_get MP_DPK_TRK\n"); -+ status = rtw_mp_dpk_track(dev, info, wdata, extra); -+ break; -+ case MP_DPK: -+ RTW_INFO("set MP_DPK\n"); -+ status = rtw_mp_dpk(dev, info, wdata, extra); -+ break; -+ default: -+ status = -EIO; -+ } -+ -+ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->ioctrl_mutex), NULL); -+ RTW_INFO("%s mutx done_%d\n", __func__, subcmd); -+ -+ return status; -+} -+#endif /*#if defined(CONFIG_MP_INCLUDED)*/ -+ -+ -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+#define DBG_MP_SDIO_INDIRECT_ACCESS 1 -+static int rtw_mp_sd_iread(struct net_device *dev -+ , struct iw_request_info *info -+ , struct iw_point *wrqu -+ , char *extra) -+{ -+ char input[16]; -+ u8 width; -+ unsigned long addr; -+ u32 ret = 0; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ if (wrqu->length > 16) { -+ RTW_INFO(FUNC_ADPT_FMT" wrqu->length:%d\n", FUNC_ADPT_ARG(padapter), wrqu->length); -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) { -+ RTW_INFO(FUNC_ADPT_FMT" copy_from_user fail\n", FUNC_ADPT_ARG(padapter)); -+ ret = -EFAULT; -+ goto exit; -+ } -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ -+ if (sscanf(input, "%hhu,%lx", &width, &addr) != 2) { -+ RTW_INFO(FUNC_ADPT_FMT" sscanf fail\n", FUNC_ADPT_ARG(padapter)); -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (addr > 0x3FFF) { -+ RTW_INFO(FUNC_ADPT_FMT" addr:0x%lx\n", FUNC_ADPT_ARG(padapter), addr); -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (DBG_MP_SDIO_INDIRECT_ACCESS) -+ RTW_INFO(FUNC_ADPT_FMT" width:%u, addr:0x%lx\n", FUNC_ADPT_ARG(padapter), width, addr); -+ -+ switch (width) { -+ case 1: -+ sprintf(extra, "0x%02x", rtw_sd_iread8(padapter, addr)); -+ wrqu->length = strlen(extra); -+ break; -+ case 2: -+ sprintf(extra, "0x%04x", rtw_sd_iread16(padapter, addr)); -+ wrqu->length = strlen(extra); -+ break; -+ case 4: -+ sprintf(extra, "0x%08x", rtw_sd_iread32(padapter, addr)); -+ wrqu->length = strlen(extra); -+ break; -+ default: -+ wrqu->length = 0; -+ ret = -EINVAL; -+ break; -+ } -+ -+exit: -+ return ret; -+} -+ -+static int rtw_mp_sd_iwrite(struct net_device *dev -+ , struct iw_request_info *info -+ , struct iw_point *wrqu -+ , char *extra) -+{ -+ char width; -+ unsigned long addr, data; -+ int ret = 0; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ char input[32]; -+ -+ if (wrqu->length > 32) { -+ RTW_INFO(FUNC_ADPT_FMT" wrqu->length:%d\n", FUNC_ADPT_ARG(padapter), wrqu->length); -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) { -+ RTW_INFO(FUNC_ADPT_FMT" copy_from_user fail\n", FUNC_ADPT_ARG(padapter)); -+ ret = -EFAULT; -+ goto exit; -+ } -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ -+ if (sscanf(input, "%hhu,%lx,%lx", &width, &addr, &data) != 3) { -+ RTW_INFO(FUNC_ADPT_FMT" sscanf fail\n", FUNC_ADPT_ARG(padapter)); -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (addr > 0x3FFF) { -+ RTW_INFO(FUNC_ADPT_FMT" addr:0x%lx\n", FUNC_ADPT_ARG(padapter), addr); -+ ret = -EINVAL; -+ goto exit; -+ } -+ -+ if (DBG_MP_SDIO_INDIRECT_ACCESS) -+ RTW_INFO(FUNC_ADPT_FMT" width:%u, addr:0x%lx, data:0x%lx\n", FUNC_ADPT_ARG(padapter), width, addr, data); -+ -+ switch (width) { -+ case 1: -+ if (data > 0xFF) { -+ ret = -EINVAL; -+ break; -+ } -+ rtw_sd_iwrite8(padapter, addr, data); -+ break; -+ case 2: -+ if (data > 0xFFFF) { -+ ret = -EINVAL; -+ break; -+ } -+ rtw_sd_iwrite16(padapter, addr, data); -+ break; -+ case 4: -+ rtw_sd_iwrite32(padapter, addr, data); -+ break; -+ default: -+ wrqu->length = 0; -+ ret = -EINVAL; -+ break; -+ } -+ -+exit: -+ return ret; -+} -+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */ -+ -+static int rtw_priv_set(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wdata, char *extra) -+{ -+ struct iw_point *wrqu = (struct iw_point *)wdata; -+ u32 subcmd = wrqu->flags; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ if (padapter == NULL) -+ return -ENETDOWN; -+ -+ if (padapter->bup == _FALSE) { -+ RTW_INFO(" %s fail =>(padapter->bup == _FALSE )\n", __FUNCTION__); -+ return -ENETDOWN; -+ } -+ -+ if (RTW_CANNOT_RUN(padapter)) { -+ RTW_INFO("%s fail =>(bSurpriseRemoved == _TRUE) || ( bDriverStopped == _TRUE)\n", __func__); -+ return -ENETDOWN; -+ } -+ -+ if (extra == NULL) { -+ wrqu->length = 0; -+ return -EIO; -+ } -+ -+ if (subcmd < MP_NULL) { -+#ifdef CONFIG_MP_INCLUDED -+ rtw_priv_mp_set(dev, info, wdata, extra); -+#endif -+ return 0; -+ } -+ -+ switch (subcmd) { -+#ifdef CONFIG_WOWLAN -+ case MP_WOW_ENABLE: -+ RTW_INFO("set case MP_WOW_ENABLE: %s\n", extra); -+ -+ rtw_wowlan_ctrl(dev, info, wdata, extra); -+ break; -+ case MP_WOW_SET_PATTERN: -+ RTW_INFO("set case MP_WOW_SET_PATTERN: %s\n", extra); -+ rtw_wowlan_set_pattern(dev, info, wdata, extra); -+ break; -+ #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ case MP_WOW_SET_KEEP_ALIVE_PATTERN: -+ RTW_INFO("set case MP_WOW_SET_KEEP_ALIVE_PATTERN: %s\n", extra); -+ rtw_wowlan_set_keep_alive_pattern(dev, info, wdata, extra); -+ break; -+ #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ -+#endif -+#ifdef CONFIG_AP_WOWLAN -+ case MP_AP_WOW_ENABLE: -+ RTW_INFO("set case MP_AP_WOW_ENABLE: %s\n", extra); -+ rtw_ap_wowlan_ctrl(dev, info, wdata, extra); -+ break; -+#endif -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ case VENDOR_IE_SET: -+ RTW_INFO("set case VENDOR_IE_SET\n"); -+ rtw_vendor_ie_set(dev , info , wdata , extra); -+ break; -+#endif -+ default: -+ return -EIO; -+ } -+ -+ return 0; -+} -+ -+ -+static int rtw_priv_get(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wdata, char *extra) -+{ -+ struct iw_point *wrqu = (struct iw_point *)wdata; -+ u32 subcmd = wrqu->flags; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *p_dm = &pHalData->odmpriv; -+ struct dm_rf_calibration_struct *p_rf_calibrate_info = &(p_dm->rf_calibrate_info); -+ struct dm_iqk_info *p_iqk_info = &p_dm->IQK_info; -+ u32 i = 100; -+ -+ -+ if (padapter->bup == _FALSE) { -+ RTW_INFO(" %s fail =>(padapter->bup == _FALSE )\n", __FUNCTION__); -+ return -ENETDOWN; -+ } -+ -+ if (RTW_CANNOT_RUN(padapter)) { -+ RTW_INFO("%s fail =>(padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)\n", __func__); -+ return -ENETDOWN; -+ } -+ -+ if (extra == NULL) { -+ wrqu->length = 0; -+ return -EIO; -+ } -+ -+ if (subcmd < MP_NULL) { -+#ifdef CONFIG_MP_INCLUDED -+ while (i > 1) { -+ if (p_rf_calibrate_info->is_iqk_in_progress) { -+ rtw_msleep_os(10); -+ } else { -+ p_iqk_info->rfk_forbidden = _TRUE; -+ break; -+ } -+ i--; -+ } -+ if (subcmd == MP_CHANNEL || subcmd == MP_BANDWIDTH || subcmd == MP_START || subcmd == MP_DPK) -+ p_iqk_info->rfk_forbidden = _FALSE; -+ rtw_priv_mp_get(dev, info, wdata, extra); -+ rtw_msleep_os(10); /* delay 5ms for sending pkt before exit adb shell operation */ -+ p_iqk_info->rfk_forbidden = _FALSE; -+#endif -+ } else { -+ switch (subcmd) { -+#if defined(CONFIG_RTL8723B) -+ case MP_SetBT: -+ RTW_INFO("set MP_SetBT\n"); -+ rtw_mp_SetBT(dev, info, wdata, extra); -+ break; -+#endif -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+ case MP_SD_IREAD: -+ rtw_mp_sd_iread(dev, info, wrqu, extra); -+ break; -+ case MP_SD_IWRITE: -+ rtw_mp_sd_iwrite(dev, info, wrqu, extra); -+ break; -+#endif -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ case VENDOR_IE_GET: -+ RTW_INFO("get case VENDOR_IE_GET\n"); -+ rtw_vendor_ie_get(dev , info , wdata , extra); -+ break; -+#endif -+ default: -+ return -EIO; -+ } -+ } -+ -+ return 0; -+} -+ -+ -+#ifdef CONFIG_TDLS -+static int rtw_wx_tdls_wfd_enable(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_WFD -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ if (extra[0] == '0') -+ rtw_tdls_wfd_enable(padapter, 0); -+ else -+ rtw_tdls_wfd_enable(padapter, 1); -+ -+#endif /* CONFIG_WFD */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_weaksec(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+ -+ u8 i, j; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ if (extra[0] == '0') -+ padapter->wdinfo.wfd_tdls_weaksec = 0; -+ else -+ padapter->wdinfo.wfd_tdls_weaksec = 1; -+ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+ -+static int rtw_tdls_enable(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ if (extra[0] == '0') -+ rtw_disable_tdls_func(padapter, _TRUE); -+ else if (extra[0] == '1') -+ rtw_enable_tdls_func(padapter); -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_setup(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+#ifdef CONFIG_TDLS -+ u8 i, j; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_txmgmt txmgmt; -+#ifdef CONFIG_WFD -+ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); -+#endif /* CONFIG_WFD */ -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ if (wrqu->data.length - 1 != 17) { -+ RTW_INFO("[%s] length:%d != 17\n", __FUNCTION__, (wrqu->data.length - 1)); -+ return ret; -+ } -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ for (i = 0, j = 0 ; i < ETH_ALEN; i++, j += 3) -+ txmgmt.peer[i] = key_2char2num(*(extra + j), *(extra + j + 1)); -+ -+#ifdef CONFIG_WFD -+ if (_AES_ != padapter->securitypriv.dot11PrivacyAlgrthm) { -+ /* Weak Security situation with AP. */ -+ if (0 == pwdinfo->wfd_tdls_weaksec) { -+ /* Can't send the tdls setup request out!! */ -+ RTW_INFO("[%s] Current link is not AES, " -+ "SKIP sending the tdls setup request!!\n", __FUNCTION__); -+ } else -+ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); -+ } else -+#endif /* CONFIG_WFD */ -+ { -+ issue_tdls_setup_req(padapter, &txmgmt, _TRUE); -+ } -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_teardown(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+ -+ u8 i, j; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sta_info *ptdls_sta = NULL; -+ struct tdls_txmgmt txmgmt; -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ if (wrqu->data.length - 1 != 17 && wrqu->data.length - 1 != 19) { -+ RTW_INFO("[%s] length:%d != 17 or 19\n", -+ __FUNCTION__, (wrqu->data.length - 1)); -+ return ret; -+ } -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ for (i = 0, j = 0; i < ETH_ALEN; i++, j += 3) -+ txmgmt.peer[i] = key_2char2num(*(extra + j), *(extra + j + 1)); -+ -+ ptdls_sta = rtw_get_stainfo(&(padapter->stapriv), txmgmt.peer); -+ -+ if (ptdls_sta != NULL) { -+ txmgmt.status_code = _RSON_TDLS_TEAR_UN_RSN_; -+ if (wrqu->data.length - 1 == 19) -+ issue_tdls_teardown(padapter, &txmgmt, _FALSE); -+ else -+ issue_tdls_teardown(padapter, &txmgmt, _TRUE); -+ } else -+ RTW_INFO("TDLS peer not found\n"); -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_discovery(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_txmgmt txmgmt; -+ int i = 0, j = 0; -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ for (i = 0, j = 0 ; i < ETH_ALEN; i++, j += 3) -+ txmgmt.peer[i] = key_2char2num(*(extra + j), *(extra + j + 1)); -+ -+ issue_tdls_dis_req(padapter, &txmgmt); -+ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_ch_switch(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_CH_SW -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ u8 i, j; -+ struct sta_info *ptdls_sta = NULL; -+ u8 take_care_iqk; -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) { -+ RTW_INFO("TDLS channel switch is not allowed\n"); -+ return ret; -+ } -+ -+ for (i = 0, j = 0 ; i < ETH_ALEN; i++, j += 3) -+ pchsw_info->addr[i] = key_2char2num(*(extra + j), *(extra + j + 1)); -+ -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pchsw_info->addr); -+ if (ptdls_sta == NULL) -+ return ret; -+ -+ pchsw_info->ch_sw_state |= TDLS_CH_SW_INITIATOR_STATE; -+ -+ if (ptdls_sta != NULL) { -+ if (pchsw_info->off_ch_num == 0) -+ pchsw_info->off_ch_num = 11; -+ } else -+ RTW_INFO("TDLS peer not found\n"); -+ -+ rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk); -+ if (take_care_iqk == _TRUE) { -+#ifdef CONFIG_TDLS_CH_SW_V2 -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_PREPARE); -+#else -+ u8 central_chnl; -+ u8 bw_mode; -+ -+ bw_mode = (pchsw_info->ch_offset) ? CHANNEL_WIDTH_40 : CHANNEL_WIDTH_20; -+ central_chnl = rtw_get_center_ch(pchsw_info->off_ch_num, bw_mode, pchsw_info->ch_offset); -+ if (rtw_hal_ch_sw_iqk_info_search(padapter, central_chnl, bw_mode) >= 0) -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_START); -+ else -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_PREPARE); -+#endif -+ } else -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_START); -+ -+ /* issue_tdls_ch_switch_req(padapter, ptdls_sta); */ -+ /* RTW_INFO("issue tdls ch switch req\n"); */ -+ -+#endif /* CONFIG_TDLS_CH_SW */ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_ch_switch_off(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_CH_SW -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_ch_switch *pchsw_info = &padapter->tdlsinfo.chsw_info; -+ u8 i, j, mac_addr[ETH_ALEN]; -+ struct sta_info *ptdls_sta = NULL; -+ struct tdls_txmgmt txmgmt; -+ -+ _rtw_memset(&txmgmt, 0x00, sizeof(struct tdls_txmgmt)); -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ if (rtw_tdls_is_chsw_allowed(padapter) == _FALSE) { -+ RTW_INFO("TDLS channel switch is not allowed\n"); -+ return ret; -+ } -+ -+ if (wrqu->data.length >= 17) { -+ for (i = 0, j = 0 ; i < ETH_ALEN; i++, j += 3) -+ mac_addr[i] = key_2char2num(*(extra + j), *(extra + j + 1)); -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); -+ } -+ -+ if (ptdls_sta == NULL) -+ return ret; -+ -+ rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_END_TO_BASE_CHNL); -+ -+ pchsw_info->ch_sw_state &= ~(TDLS_CH_SW_INITIATOR_STATE | -+ TDLS_CH_SWITCH_ON_STATE | -+ TDLS_PEER_AT_OFF_STATE); -+ _rtw_memset(pchsw_info->addr, 0x00, ETH_ALEN); -+ -+ ptdls_sta->ch_switch_time = 0; -+ ptdls_sta->ch_switch_timeout = 0; -+ _cancel_timer_ex(&ptdls_sta->ch_sw_timer); -+ _cancel_timer_ex(&ptdls_sta->delay_timer); -+ _cancel_timer_ex(&ptdls_sta->stay_on_base_chnl_timer); -+ _cancel_timer_ex(&ptdls_sta->ch_sw_monitor_timer); -+ -+ rtw_pm_set_lps(padapter, PS_MODE_MAX); -+#endif /* CONFIG_TDLS_CH_SW */ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_dump_ch(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_CH_SW -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ RTW_INFO("[%s] dump_stack:%s\n", __FUNCTION__, extra); -+ -+ extra[wrqu->data.length] = 0x00; -+ ptdlsinfo->chsw_info.dump_stack = rtw_atoi(extra); -+ -+ return ret; -+ -+#endif -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_off_ch_num(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_CH_SW -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ RTW_INFO("[%s] off_ch_num:%s\n", __FUNCTION__, extra); -+ -+ extra[wrqu->data.length] = 0x00; -+ ptdlsinfo->chsw_info.off_ch_num = rtw_atoi(extra); -+ -+ return ret; -+ -+#endif -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_ch_offset(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_TDLS_CH_SW -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ RTW_INFO("[%s] ch_offset:%s\n", __FUNCTION__, extra); -+ -+ extra[wrqu->data.length] = 0x00; -+ switch (rtw_atoi(extra)) { -+ case SCA: -+ ptdlsinfo->chsw_info.ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; -+ break; -+ -+ case SCB: -+ ptdlsinfo->chsw_info.ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; -+ break; -+ -+ default: -+ ptdlsinfo->chsw_info.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ break; -+ } -+ -+ return ret; -+ -+#endif -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_pson(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 i, j, mac_addr[ETH_ALEN]; -+ struct sta_info *ptdls_sta = NULL; -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ for (i = 0, j = 0; i < ETH_ALEN; i++, j += 3) -+ mac_addr[i] = key_2char2num(*(extra + j), *(extra + j + 1)); -+ -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); -+ -+ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->cmn.mac_addr, 1, 3, 500); -+ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_psoff(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 i, j, mac_addr[ETH_ALEN]; -+ struct sta_info *ptdls_sta = NULL; -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ for (i = 0, j = 0; i < ETH_ALEN; i++, j += 3) -+ mac_addr[i] = key_2char2num(*(extra + j), *(extra + j + 1)); -+ -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); -+ -+ if (ptdls_sta) -+ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta->cmn.mac_addr, 0, 3, 500); -+ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_setip(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_WFD -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; -+ u8 i = 0, j = 0, k = 0, tag = 0; -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1); -+ -+ while (i < 4) { -+ for (j = 0; j < 4; j++) { -+ if (*(extra + j + tag) == '.' || *(extra + j + tag) == '\0') { -+ if (j == 1) -+ pwfd_info->ip_address[i] = convert_ip_addr('0', '0', *(extra + (j - 1) + tag)); -+ if (j == 2) -+ pwfd_info->ip_address[i] = convert_ip_addr('0', *(extra + (j - 2) + tag), *(extra + (j - 1) + tag)); -+ if (j == 3) -+ pwfd_info->ip_address[i] = convert_ip_addr(*(extra + (j - 3) + tag), *(extra + (j - 2) + tag), *(extra + (j - 1) + tag)); -+ -+ tag += j + 1; -+ break; -+ } -+ } -+ i++; -+ } -+ -+ RTW_INFO("[%s] Set IP = %u.%u.%u.%u\n", __FUNCTION__, -+ ptdlsinfo->wfd_info->ip_address[0], -+ ptdlsinfo->wfd_info->ip_address[1], -+ ptdlsinfo->wfd_info->ip_address[2], -+ ptdlsinfo->wfd_info->ip_address[3]); -+ -+#endif /* CONFIG_WFD */ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_getip(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_WFD -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; -+ -+ RTW_INFO("[%s]\n", __FUNCTION__); -+ -+ sprintf(extra, "\n\n%u.%u.%u.%u\n", -+ pwfd_info->peer_ip_address[0], pwfd_info->peer_ip_address[1], -+ pwfd_info->peer_ip_address[2], pwfd_info->peer_ip_address[3]); -+ -+ RTW_INFO("[%s] IP=%u.%u.%u.%u\n", __FUNCTION__, -+ pwfd_info->peer_ip_address[0], pwfd_info->peer_ip_address[1], -+ pwfd_info->peer_ip_address[2], pwfd_info->peer_ip_address[3]); -+ -+ wrqu->data.length = strlen(extra); -+ -+#endif /* CONFIG_WFD */ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+static int rtw_tdls_getport(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_WFD -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; -+ -+ RTW_INFO("[%s]\n", __FUNCTION__); -+ -+ sprintf(extra, "\n\n%d\n", pwfd_info->peer_rtsp_ctrlport); -+ RTW_INFO("[%s] remote port = %d\n", -+ __FUNCTION__, pwfd_info->peer_rtsp_ctrlport); -+ -+ wrqu->data.length = strlen(extra); -+ -+#endif /* CONFIG_WFD */ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+ -+} -+ -+/* WFDTDLS, for sigma test */ -+static int rtw_tdls_dis_result(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+#ifdef CONFIG_WFD -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ RTW_INFO("[%s]\n", __FUNCTION__); -+ -+ if (ptdlsinfo->dev_discovered == _TRUE) { -+ sprintf(extra, "\n\nDis=1\n"); -+ ptdlsinfo->dev_discovered = _FALSE; -+ } -+ -+ wrqu->data.length = strlen(extra); -+ -+#endif /* CONFIG_WFD */ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+ -+} -+ -+/* WFDTDLS, for sigma test */ -+static int rtw_wfd_tdls_status(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; -+ -+ RTW_INFO("[%s]\n", __FUNCTION__); -+ -+ sprintf(extra, "\nlink_established:%d\n" -+ "sta_cnt:%d\n" -+ "sta_maximum:%d\n" -+ "cur_channel:%d\n" -+ "tdls_enable:%d" -+#ifdef CONFIG_TDLS_CH_SW -+ "ch_sw_state:%08x\n" -+ "chsw_on:%d\n" -+ "off_ch_num:%d\n" -+ "cur_time:%d\n" -+ "ch_offset:%d\n" -+ "delay_swtich_back:%d" -+#endif -+ , -+ ptdlsinfo->link_established, ptdlsinfo->sta_cnt, -+ ptdlsinfo->sta_maximum, ptdlsinfo->cur_channel, -+ rtw_is_tdls_enabled(padapter) -+#ifdef CONFIG_TDLS_CH_SW -+ , -+ ptdlsinfo->chsw_info.ch_sw_state, -+ ATOMIC_READ(&padapter->tdlsinfo.chsw_info.chsw_on), -+ ptdlsinfo->chsw_info.off_ch_num, -+ ptdlsinfo->chsw_info.cur_time, -+ ptdlsinfo->chsw_info.ch_offset, -+ ptdlsinfo->chsw_info.delay_switch_back -+#endif -+ ); -+ -+ wrqu->data.length = strlen(extra); -+ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+ -+} -+ -+static int rtw_tdls_getsta(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ -+ int ret = 0; -+#ifdef CONFIG_TDLS -+ u8 i, j; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 addr[ETH_ALEN] = {0}; -+ char charmac[17]; -+ struct sta_info *ptdls_sta = NULL; -+ -+ RTW_INFO("[%s] %s %d\n", __FUNCTION__, -+ (char *)wrqu->data.pointer, wrqu->data.length - 1); -+ -+ if (copy_from_user(charmac, wrqu->data.pointer + 9, 17)) { -+ ret = -EFAULT; -+ goto exit; -+ } -+ -+ RTW_INFO("[%s] %d, charmac:%s\n", __FUNCTION__, __LINE__, charmac); -+ for (i = 0, j = 0 ; i < ETH_ALEN; i++, j += 3) -+ addr[i] = key_2char2num(*(charmac + j), *(charmac + j + 1)); -+ -+ RTW_INFO("[%s] %d, charmac:%s, addr:"MAC_FMT"\n", -+ __FUNCTION__, __LINE__, charmac, MAC_ARG(addr)); -+ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, addr); -+ if (ptdls_sta) { -+ sprintf(extra, "\n\ntdls_sta_state=0x%08x\n", ptdls_sta->tdls_sta_state); -+ RTW_INFO("\n\ntdls_sta_state=%d\n", ptdls_sta->tdls_sta_state); -+ } else { -+ sprintf(extra, "\n\nNot found this sta\n"); -+ RTW_INFO("\n\nNot found this sta\n"); -+ } -+ wrqu->data.length = strlen(extra); -+ -+exit: -+#endif /* CONFIG_TDLS */ -+ return ret; -+ -+} -+ -+static int rtw_tdls_get_best_ch(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+#ifdef CONFIG_FIND_BEST_CHANNEL -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0; -+ -+ for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) { -+ if (rfctl->channel_set[i].ChannelNum == 1) -+ index_24G = i; -+ if (rfctl->channel_set[i].ChannelNum == 36) -+ index_5G = i; -+ } -+ -+ for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) { -+ /* 2.4G */ -+ if (rfctl->channel_set[i].ChannelNum == 6 || rfctl->channel_set[i].ChannelNum == 11) { -+ if (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_24G].rx_count) { -+ index_24G = i; -+ best_channel_24G = rfctl->channel_set[i].ChannelNum; -+ } -+ } -+ -+ /* 5G */ -+ if (rfctl->channel_set[i].ChannelNum >= 36 -+ && rfctl->channel_set[i].ChannelNum < 140) { -+ /* Find primary channel */ -+ if (((rfctl->channel_set[i].ChannelNum - 36) % 8 == 0) -+ && (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_5G].rx_count)) { -+ index_5G = i; -+ best_channel_5G = rfctl->channel_set[i].ChannelNum; -+ } -+ } -+ -+ if (rfctl->channel_set[i].ChannelNum >= 149 -+ && rfctl->channel_set[i].ChannelNum < 165) { -+ /* Find primary channel */ -+ if (((rfctl->channel_set[i].ChannelNum - 149) % 8 == 0) -+ && (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_5G].rx_count)) { -+ index_5G = i; -+ best_channel_5G = rfctl->channel_set[i].ChannelNum; -+ } -+ } -+#if 1 /* debug */ -+ RTW_INFO("The rx cnt of channel %3d = %d\n", -+ rfctl->channel_set[i].ChannelNum, -+ rfctl->channel_set[i].rx_count); -+#endif -+ } -+ -+ sprintf(extra, "\nbest_channel_24G = %d\n", best_channel_24G); -+ RTW_INFO("best_channel_24G = %d\n", best_channel_24G); -+ -+ if (index_5G != 0) { -+ sprintf(extra, "best_channel_5G = %d\n", best_channel_5G); -+ RTW_INFO("best_channel_5G = %d\n", best_channel_5G); -+ } -+ -+ wrqu->data.length = strlen(extra); -+ -+#endif -+ -+ return 0; -+ -+} -+#endif /*#ifdef CONFIG_TDLS*/ -+static int rtw_tdls(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_INFO("[%s] extra = %s\n", __FUNCTION__, extra); -+ -+ if (hal_chk_wl_func(padapter, WL_FUNC_TDLS) == _FALSE) { -+ RTW_INFO("Discard tdls oper since hal doesn't support tdls\n"); -+ return 0; -+ } -+ -+ if (rtw_is_tdls_enabled(padapter) == _FALSE) { -+ RTW_INFO("TDLS is not enabled\n"); -+ return 0; -+ } -+ -+ /* WFD Sigma will use the tdls enable command to let the driver know we want to test the tdls now! */ -+ -+ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { -+ if (_rtw_memcmp(extra, "wfdenable=", 10)) { -+ wrqu->data.length -= 10; -+ rtw_wx_tdls_wfd_enable(dev, info, wrqu, &extra[10]); -+ return ret; -+ } -+ } -+ -+ if (_rtw_memcmp(extra, "weaksec=", 8)) { -+ wrqu->data.length -= 8; -+ rtw_tdls_weaksec(dev, info, wrqu, &extra[8]); -+ return ret; -+ } else if (_rtw_memcmp(extra, "tdlsenable=", 11)) { -+ wrqu->data.length -= 11; -+ rtw_tdls_enable(dev, info, wrqu, &extra[11]); -+ return ret; -+ } -+ -+ if (_rtw_memcmp(extra, "setup=", 6)) { -+ wrqu->data.length -= 6; -+ rtw_tdls_setup(dev, info, wrqu, &extra[6]); -+ } else if (_rtw_memcmp(extra, "tear=", 5)) { -+ wrqu->data.length -= 5; -+ rtw_tdls_teardown(dev, info, wrqu, &extra[5]); -+ } else if (_rtw_memcmp(extra, "dis=", 4)) { -+ wrqu->data.length -= 4; -+ rtw_tdls_discovery(dev, info, wrqu, &extra[4]); -+ } else if (_rtw_memcmp(extra, "swoff=", 6)) { -+ wrqu->data.length -= 6; -+ rtw_tdls_ch_switch_off(dev, info, wrqu, &extra[6]); -+ } else if (_rtw_memcmp(extra, "sw=", 3)) { -+ wrqu->data.length -= 3; -+ rtw_tdls_ch_switch(dev, info, wrqu, &extra[3]); -+ } else if (_rtw_memcmp(extra, "dumpstack=", 10)) { -+ wrqu->data.length -= 10; -+ rtw_tdls_dump_ch(dev, info, wrqu, &extra[10]); -+ } else if (_rtw_memcmp(extra, "offchnum=", 9)) { -+ wrqu->data.length -= 9; -+ rtw_tdls_off_ch_num(dev, info, wrqu, &extra[9]); -+ } else if (_rtw_memcmp(extra, "choffset=", 9)) { -+ wrqu->data.length -= 9; -+ rtw_tdls_ch_offset(dev, info, wrqu, &extra[9]); -+ } else if (_rtw_memcmp(extra, "pson=", 5)) { -+ wrqu->data.length -= 5; -+ rtw_tdls_pson(dev, info, wrqu, &extra[5]); -+ } else if (_rtw_memcmp(extra, "psoff=", 6)) { -+ wrqu->data.length -= 6; -+ rtw_tdls_psoff(dev, info, wrqu, &extra[6]); -+ } -+ -+#ifdef CONFIG_WFD -+ if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { -+ if (_rtw_memcmp(extra, "setip=", 6)) { -+ wrqu->data.length -= 6; -+ rtw_tdls_setip(dev, info, wrqu, &extra[6]); -+ } else if (_rtw_memcmp(extra, "tprobe=", 6)) -+ issue_tunneled_probe_req((_adapter *)rtw_netdev_priv(dev)); -+ } -+#endif /* CONFIG_WFD */ -+ -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+ -+static int rtw_tdls_get(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_TDLS -+ -+ RTW_INFO("[%s] extra = %s\n", __FUNCTION__, (char *) wrqu->data.pointer); -+ -+ if (_rtw_memcmp(wrqu->data.pointer, "ip", 2)) -+ rtw_tdls_getip(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "port", 4)) -+ rtw_tdls_getport(dev, info, wrqu, extra); -+ /* WFDTDLS, for sigma test */ -+ else if (_rtw_memcmp(wrqu->data.pointer, "dis", 3)) -+ rtw_tdls_dis_result(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "status", 6)) -+ rtw_wfd_tdls_status(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "tdls_sta=", 9)) -+ rtw_tdls_getsta(dev, info, wrqu, extra); -+ else if (_rtw_memcmp(wrqu->data.pointer, "best_ch", 7)) -+ rtw_tdls_get_best_ch(dev, info, wrqu, extra); -+#endif /* CONFIG_TDLS */ -+ -+ return ret; -+} -+ -+#ifdef CONFIG_MAC_LOOPBACK_DRIVER -+ -+#if defined(CONFIG_RTL8188E) -+#include -+extern void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+#define cal_txdesc_chksum(padapter, desc) rtl8188e_cal_txdesc_chksum(desc) -+#ifdef CONFIG_SDIO_HCI || defined(CONFIG_GSPI_HCI) -+extern void rtl8188es_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); -+#define fill_default_txdesc rtl8188es_fill_default_txdesc -+#endif /* CONFIG_SDIO_HCI */ -+#endif /* CONFIG_RTL8188E */ -+#if defined(CONFIG_RTL8723B) -+extern void rtl8723b_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+#define cal_txdesc_chksum(padapter, desc) rtl8723b_cal_txdesc_chksum(desc) -+extern void rtl8723b_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); -+#define fill_default_txdesc rtl8723b_fill_default_txdesc -+#endif /* CONFIG_RTL8723B */ -+ -+#if defined(CONFIG_RTL8703B) -+/* extern void rtl8703b_cal_txdesc_chksum(struct tx_desc *ptxdesc); */ -+#define cal_txdesc_chksum(padapter, desc) rtl8703b_cal_txdesc_chksum(desc) -+/* extern void rtl8703b_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); */ -+#define fill_default_txdesc rtl8703b_fill_default_txdesc -+#endif /* CONFIG_RTL8703B */ -+ -+#if defined(CONFIG_RTL8723D) -+/* extern void rtl8723d_cal_txdesc_chksum(struct tx_desc *ptxdesc); */ -+#define cal_txdesc_chksum(padapter, desc) rtl8723d_cal_txdesc_chksum(desc) -+/* extern void rtl8723d_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); */ -+#define fill_default_txdesc rtl8723d_fill_default_txdesc -+#endif /* CONFIG_RTL8723D */ -+ -+#if defined(CONFIG_RTL8710B) -+#define cal_txdesc_chksum(padapter, desc) rtl8710b_cal_txdesc_chksum(desc) -+#define fill_default_txdesc rtl8710b_fill_default_txdesc -+#endif /* CONFIG_RTL8710B */ -+ -+#if defined(CONFIG_RTL8192E) -+extern void rtl8192e_cal_txdesc_chksum(struct tx_desc *ptxdesc); -+#define cal_txdesc_chksum(padapter, desc) rtl8192e_cal_txdesc_chksum(desc) -+#ifdef CONFIG_SDIO_HCI || defined(CONFIG_GSPI_HCI) -+extern void rtl8192es_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); -+#define fill_default_txdesc rtl8192es_fill_default_txdesc -+#endif /* CONFIG_SDIO_HCI */ -+#endif /* CONFIG_RTL8192E */ -+ -+#if defined(CONFIG_RTL8192F) -+/* extern void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc); */ -+#define cal_txdesc_chksum(padapter, desc) rtl8192f_cal_txdesc_chksum(desc) -+/* extern void rtl8192f_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); */ -+#define fill_default_txdesc rtl8192f_fill_default_txdesc -+#endif /* CONFIG_RTL8192F */ -+ -+#ifdef CONFIG_RTL8723F -+#include <../../hal/rtl8723f/rtl8723f.h> -+ -+#define REG_LOOPBACK_ENABLE 0x0103 -+#define LOOKBACK_ENABLE_VALUE 0x0b -+#define cal_txdesc_chksum(padapter, desc) rtl8723f_cal_txdesc_chksum(padapter, desc) -+#define dump_txdesc_data(padapter, desc) rtl8723f_dbg_dump_tx_desc(padapter, DATA_FRAMETAG, desc); -+#define get_rx_desc(rx_desc, rxbuf) rtl8723f_rxdesc2attribute(rx_desc, rxbuf) -+#define hal_init rtl8723f_hal_init -+#endif /* CONFIG_RTL8723F */ -+ -+void dbg_dump_pkt(char *s, u8 *buf, u8 len) -+{ -+ u8 i, j = 1; -+ -+ RTW_INFO("%s size = %u\n", s, len); -+ -+ for (i = 0; (i + 4) < len; i += 4) { -+ if (j % 4 == 1) -+ RTW_PRINT("idx:%u:", i); -+ _RTW_PRINT(" 0x%02x 0x%02x 0x%02x 0x%02x", buf[i], buf[i+1], buf[i+2], buf[i+3]); -+ if ((j++) % 4 == 0) -+ _RTW_PRINT("\n"); -+ } -+ -+ for (; i < len ; i++) { -+ _RTW_PRINT(" 0x%02x", buf[i]); -+ } -+ _RTW_PRINT("\n ================================\n"); -+} -+ -+static s32 initLoopback(PADAPTER padapter) -+{ -+ PLOOPBACKDATA ploopback; -+ -+ if (padapter->ploopback == NULL) { -+ ploopback = (PLOOPBACKDATA)rtw_zmalloc(sizeof(LOOPBACKDATA)); -+ if (ploopback == NULL) -+ return -ENOMEM; -+ -+ _rtw_init_sema(&ploopback->sema, 0); -+ ploopback->bstop = _TRUE; -+ ploopback->cnt = 0; -+ ploopback->size = 300; -+ _rtw_memset(ploopback->msg, 0, sizeof(ploopback->msg)); -+ -+ padapter->ploopback = ploopback; -+ } -+ -+ return 0; -+} -+ -+static void freeLoopback(PADAPTER padapter) -+{ -+ PLOOPBACKDATA ploopback; -+ -+ ploopback = padapter->ploopback; -+ if (ploopback) { -+ rtw_mfree((u8 *)ploopback, sizeof(LOOPBACKDATA)); -+ padapter->ploopback = NULL; -+ } -+} -+ -+static s32 initpseudoadhoc(PADAPTER padapter) -+{ -+ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; -+ s32 err; -+ -+ networkType = Ndis802_11IBSS; -+ err = rtw_set_802_11_infrastructure_mode(padapter, networkType, 0); -+ if (err == _FALSE) -+ return _FAIL; -+ -+ err = rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_WAIT_ACK); -+ if (err == _FAIL) -+ return _FAIL; -+ -+ return _SUCCESS; -+} -+ -+static s32 createpseudoadhoc(PADAPTER padapter) -+{ -+ NDIS_802_11_AUTHENTICATION_MODE authmode; -+ struct mlme_priv *pmlmepriv; -+ NDIS_802_11_SSID *passoc_ssid; -+ WLAN_BSSID_EX *pdev_network; -+ u8 *pibss; -+ u8 ssid[] = "pseduo_ad-hoc"; -+ s32 err; -+ _irqL irqL; -+ -+ pmlmepriv = &padapter->mlmepriv; -+ -+ authmode = Ndis802_11AuthModeOpen; -+ err = rtw_set_802_11_authentication_mode(padapter, authmode); -+ if (err == _FALSE) -+ return _FAIL; -+ -+ passoc_ssid = &pmlmepriv->assoc_ssid; -+ _rtw_memset(passoc_ssid, 0, sizeof(NDIS_802_11_SSID)); -+ passoc_ssid->SsidLength = sizeof(ssid) - 1; -+ _rtw_memcpy(passoc_ssid->Ssid, ssid, passoc_ssid->SsidLength); -+ -+ pdev_network = &padapter->registrypriv.dev_network; -+ pibss = padapter->registrypriv.dev_network.MacAddress; -+ _rtw_memcpy(&pdev_network->Ssid, passoc_ssid, sizeof(NDIS_802_11_SSID)); -+ -+ rtw_update_registrypriv_dev_network(padapter); -+ rtw_generate_random_ibss(pibss); -+ -+ _enter_critical_bh(&pmlmepriv->lock, &irqL); -+ /*pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE;*/ -+ init_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); -+ -+ _exit_critical_bh(&pmlmepriv->lock, &irqL); -+ -+#if 0 -+ err = rtw_create_ibss_cmd(padapter, 0); -+ if (err == _FAIL) -+ return _FAIL; -+#else -+ { -+ struct wlan_network *pcur_network; -+ struct sta_info *psta; -+ -+ /* 3 create a new psta */ -+ pcur_network = &pmlmepriv->cur_network; -+ -+ /* clear psta in the cur_network, if any */ -+ psta = rtw_get_stainfo(&padapter->stapriv, pcur_network->network.MacAddress); -+ if (psta) -+ rtw_free_stainfo(padapter, psta); -+ -+ psta = rtw_alloc_stainfo(&padapter->stapriv, pibss); -+ if (psta == NULL) -+ return _FAIL; -+ -+ /* 3 join psudo AdHoc */ -+ pcur_network->join_res = 1; -+ pcur_network->aid = psta->cmn.aid = 1; -+ _rtw_memcpy(&pcur_network->network, pdev_network, get_WLAN_BSSID_EX_sz(pdev_network)); -+ -+ /* set msr to WIFI_FW_ADHOC_STATE */ -+ padapter->hw_port = HW_PORT0; -+ Set_MSR(padapter, WIFI_FW_ADHOC_STATE); -+ -+ } -+#endif -+ -+ return _SUCCESS; -+} -+ -+static struct xmit_frame *createloopbackpkt(PADAPTER padapter, u32 size) -+{ -+ struct xmit_priv *pxmitpriv; -+ struct xmit_frame *pframe; -+ struct xmit_buf *pxmitbuf; -+ struct pkt_attrib *pattrib; -+ struct tx_desc *desc; -+ u8 *pkt_start, *pkt_end, *ptr; -+ struct rtw_ieee80211_hdr *hdr; -+ s32 bmcast; -+ _irqL irqL; -+ -+ -+ if ((TXDESC_SIZE + WLANHDR_OFFSET + size) > MAX_XMITBUF_SZ) -+ return NULL; -+ -+ pxmitpriv = &padapter->xmitpriv; -+ pframe = NULL; -+ -+ /* 2 1. allocate xmit frame */ -+ pframe = rtw_alloc_xmitframe(pxmitpriv, 0); -+ if (pframe == NULL) -+ return NULL; -+ pframe->padapter = padapter; -+ -+ /* 2 2. allocate xmit buffer */ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ if (pxmitbuf == NULL) { -+ rtw_free_xmitframe(pxmitpriv, pframe); -+ return NULL; -+ } -+ -+ pframe->pxmitbuf = pxmitbuf; -+ pframe->buf_addr = pxmitbuf->pbuf; -+ pxmitbuf->priv_data = pframe; -+ -+ /* 2 3. update_attrib() */ -+ pattrib = &pframe->attrib; -+ -+ /* init xmitframe attribute */ -+ _rtw_memset(pattrib, 0, sizeof(struct pkt_attrib)); -+ -+ pattrib->ether_type = 0x8723; -+ _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN); -+ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); -+ _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); -+ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); -+ -+ /* pattrib->dhcp_pkt = 0; -+ * pattrib->pktlen = 0; */ -+ pattrib->ack_policy = 0; -+ /* pattrib->pkt_hdrlen = ETH_HLEN; */ -+ pattrib->hdrlen = WLAN_HDR_A3_LEN; -+ pattrib->subtype = WIFI_DATA; -+ pattrib->priority = 0; -+ pattrib->qsel = pattrib->priority; -+ /* do_queue_select(padapter, pattrib); */ -+ pattrib->nr_frags = 1; -+ pattrib->encrypt = 0; -+ pattrib->bswenc = _FALSE; -+ pattrib->qos_en = _FALSE; -+ -+ bmcast = IS_MCAST(pattrib->ra); -+ if (bmcast) -+ pattrib->psta = rtw_get_bcmc_stainfo(padapter); -+ else -+ pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); -+ -+ pattrib->mac_id = pattrib->psta->cmn.mac_id; -+ pattrib->pktlen = size; -+ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen; -+ -+ /* 2 4. fill TX descriptor */ -+ desc = (struct tx_desc *)pframe->buf_addr; -+ _rtw_memset(desc, 0, TXDESC_SIZE); -+ -+ fill_default_txdesc(pframe, (u8 *)desc); -+ -+#if 0 -+ /* Hw set sequence number */ -+ ((PTXDESC)desc)->hwseq_en = 0; /* HWSEQ_EN, 0:disable, 1:enable -+ * ((PTXDESC)desc)->hwseq_sel = 0; */ /* HWSEQ_SEL */ -+ -+ ((PTXDESC)desc)->disdatafb = 1; -+ -+ /* convert to little endian */ -+ desc->txdw0 = cpu_to_le32(desc->txdw0); -+ desc->txdw1 = cpu_to_le32(desc->txdw1); -+ desc->txdw2 = cpu_to_le32(desc->txdw2); -+ desc->txdw3 = cpu_to_le32(desc->txdw3); -+ desc->txdw4 = cpu_to_le32(desc->txdw4); -+ desc->txdw5 = cpu_to_le32(desc->txdw5); -+ desc->txdw6 = cpu_to_le32(desc->txdw6); -+ desc->txdw7 = cpu_to_le32(desc->txdw7); -+#ifdef CONFIG_PCI_HCI -+ desc->txdw8 = cpu_to_le32(desc->txdw8); -+ desc->txdw9 = cpu_to_le32(desc->txdw9); -+ desc->txdw10 = cpu_to_le32(desc->txdw10); -+ desc->txdw11 = cpu_to_le32(desc->txdw11); -+ desc->txdw12 = cpu_to_le32(desc->txdw12); -+ desc->txdw13 = cpu_to_le32(desc->txdw13); -+ desc->txdw14 = cpu_to_le32(desc->txdw14); -+ desc->txdw15 = cpu_to_le32(desc->txdw15); -+#endif -+#endif -+ -+ cal_txdesc_chksum(padapter, (u8*)desc); -+ /* dump_txdesc_data(padapter, (u8*)desc); */ -+ -+ /* 2 5. coalesce */ -+ pkt_start = pframe->buf_addr + TXDESC_SIZE; -+ pkt_end = pkt_start + pattrib->last_txcmdsz; -+ -+ /* 3 5.1. make wlan header, make_wlanhdr() */ -+ hdr = (struct rtw_ieee80211_hdr *)pkt_start; -+ set_frame_sub_type(&hdr->frame_ctl, pattrib->subtype); -+ _rtw_memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); /* DA */ -+ _rtw_memcpy(hdr->addr2, pattrib->src, ETH_ALEN); /* SA */ -+ _rtw_memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); /* RA, BSSID */ -+ -+ /* 3 5.2. make payload */ -+ ptr = pkt_start + pattrib->hdrlen; -+ get_random_bytes(ptr, pkt_end - ptr); -+ -+ pxmitbuf->len = TXDESC_SIZE + pattrib->last_txcmdsz; -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pxmitbuf->ptail += pxmitbuf->len; -+#endif -+ -+ dbg_dump_pkt("TX packet", pxmitbuf->pbuf, pxmitbuf->len); -+ -+ return pframe; -+} -+ -+static void freeloopbackpkt(PADAPTER padapter, struct xmit_frame *pframe) -+{ -+ struct xmit_priv *pxmitpriv; -+ struct xmit_buf *pxmitbuf; -+ -+ pxmitpriv = &padapter->xmitpriv; -+ pxmitbuf = pframe->pxmitbuf; -+ -+ rtw_free_xmitframe(pxmitpriv, pframe); -+ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); -+} -+ -+static void printdata(u8 *pbuf, u32 len) -+{ -+ u32 i, val; -+ -+ for (i = 0; (i + 4) <= len; i += 4) { -+ printk("%08X", *(u32 *)(pbuf + i)); -+ if ((i + 4) & 0x1F) -+ printk(" "); -+ else -+ printk("\n"); -+ } -+ -+ if (i < len) { -+#ifdef CONFIG_BIG_ENDIAN -+ for (; i < len, i++) -+ printk("%02X", pbuf + i); -+#else /* CONFIG_LITTLE_ENDIAN */ -+#if 0 -+ val = 0; -+ _rtw_memcpy(&val, pbuf + i, len - i); -+ printk("%8X", val); -+#else -+ u8 str[9]; -+ u8 n; -+ val = 0; -+ n = len - i; -+ _rtw_memcpy(&val, pbuf + i, n); -+ sprintf(str, "%08X", val); -+ n = (4 - n) * 2; -+ printk("%8s", str + n); -+#endif -+#endif /* CONFIG_LITTLE_ENDIAN */ -+ } -+ printk("\n"); -+} -+ -+static u8 pktcmp(PADAPTER padapter, u8 *txbuf, u32 txsz, u8 *rxbuf, u32 rxsz) -+{ -+ struct rx_pkt_attrib rx_desc; -+#if 0 -+ struct recv_stat *prxstat; -+ struct recv_stat report; -+ PRXREPORT prxreport; -+#endif -+ u32 rxpktsize; -+ u8 drvinfosize; -+ u8 shiftsize; -+ u8 ret = _FALSE; -+ u8 skip_len = 4; /* Don't compare the frame control and duration field */ -+ get_rx_desc(&rx_desc, rxbuf); -+ rxpktsize = rx_desc.pkt_len; -+ drvinfosize = rx_desc.drvinfo_sz; -+ shiftsize = rx_desc.shift_sz; -+ -+#if 0 -+ prxstat = (struct recv_stat *)rxbuf; -+ report.rxdw0 = le32_to_cpu(prxstat->rxdw0); -+ report.rxdw1 = le32_to_cpu(prxstat->rxdw1); -+ report.rxdw2 = le32_to_cpu(prxstat->rxdw2); -+ report.rxdw3 = le32_to_cpu(prxstat->rxdw3); -+ report.rxdw4 = le32_to_cpu(prxstat->rxdw4); -+ report.rxdw5 = le32_to_cpu(prxstat->rxdw5); -+ -+ prxreport = (PRXREPORT)&report; -+ drvinfosize = prxreport->drvinfosize << 3; -+ rxpktsize = prxreport->pktlen; -+#endif -+ -+ if (rtw_hal_rcr_check(padapter, RCR_APPFCS)) -+ rxpktsize -= IEEE80211_FCS_LEN; -+ -+ if ((txsz - TXDESC_SIZE) != rxpktsize) { -+ RTW_INFO("%s: ERROR! size not match tx/rx=%d/%d !\n", -+ __func__, txsz - TXDESC_SIZE, rxpktsize); -+ ret = _FALSE; -+ } else { -+ ret = _rtw_memcmp(txbuf + TXDESC_SIZE + skip_len, \ -+ rxbuf + RXDESC_SIZE + skip_len + drvinfosize, \ -+ txsz - TXDESC_SIZE - skip_len); -+ if (ret == _FALSE) -+ RTW_INFO("%s: ERROR! pkt content mismatch!\n", __func__); -+ } -+ -+ if (ret == _FALSE) { -+ RTW_INFO("\n%s: TX PKT total=%d, desc=%d, content=%d\n", -+ __func__, txsz, TXDESC_SIZE, txsz - TXDESC_SIZE); -+ dbg_dump_pkt("TX DESC", txbuf, TXDESC_SIZE); -+ dbg_dump_pkt("TX content", txbuf + TXDESC_SIZE, txsz - TXDESC_SIZE); -+ -+ RTW_INFO("\n%s: RX PKT read=%d offset=%d(%d,%d) content=%d\n", -+ __func__, rxsz, RXDESC_SIZE + drvinfosize, RXDESC_SIZE, drvinfosize, rxpktsize); -+ if (rxpktsize != 0) { -+ dbg_dump_pkt("RX DESC", rxbuf, RXDESC_SIZE); -+ dbg_dump_pkt("RX drvinfo", rxbuf + RXDESC_SIZE, drvinfosize); -+ dbg_dump_pkt("RX packet content", rxbuf + RXDESC_SIZE + drvinfosize, rxpktsize); -+ } else { -+ RTW_INFO("%s: RX data size=%d\n", __func__, rxsz); -+ } -+ } -+ -+ return ret; -+} -+ -+thread_return lbk_thread(thread_context context) -+{ -+ s32 err; -+ PADAPTER padapter; -+ PLOOPBACKDATA ploopback; -+ struct xmit_frame *pxmitframe; -+ u32 cnt, ok, fail, headerlen; -+ u32 pktsize; -+ u32 ff_hwaddr; -+ -+ padapter = (PADAPTER)context; -+ ploopback = padapter->ploopback; -+ if (ploopback == NULL) -+ return -1; -+ cnt = 0; -+ ok = 0; -+ fail = 0; -+ -+ thread_enter("RTW_LBK_THREAD"); -+ /* daemonize("%s", "RTW_LBK_THREAD"); */ -+ allow_signal(SIGTERM); -+ -+ do { -+ if (ploopback->size == 0) { -+ get_random_bytes(&pktsize, 4); -+ pktsize = (pktsize % 1535) + 1; /* 1~1535 */ -+ } else -+ pktsize = ploopback->size; -+ -+ pxmitframe = createloopbackpkt(padapter, pktsize); -+ if (pxmitframe == NULL) { -+ sprintf(ploopback->msg, "loopback FAIL! 3. create Packet FAIL!"); -+ break; -+ } -+ -+ ploopback->txsize = TXDESC_SIZE + pxmitframe->attrib.last_txcmdsz; -+ _rtw_memcpy(ploopback->txbuf, pxmitframe->buf_addr, ploopback->txsize); -+ ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); -+ cnt++; -+ RTW_INFO("%s: wirte port cnt=%d size=%d\n", __func__, cnt, ploopback->txsize); -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ pxmitframe->pxmitbuf->pdata = ploopback->txbuf; -+#endif -+ rtw_write_port(padapter, ff_hwaddr, ploopback->txsize, (u8 *)pxmitframe->pxmitbuf); -+ -+ /* wait for rx pkt */ -+ RTW_INFO("%s: wait for rx packet\n", __func__); -+ _rtw_down_sema(&ploopback->sema); -+ -+ err = pktcmp(padapter, ploopback->txbuf, ploopback->txsize, ploopback->rxbuf, ploopback->rxsize); -+ if (err == _TRUE) -+ ok++; -+ else -+ fail++; -+ -+ ploopback->txsize = 0; -+ _rtw_memset(ploopback->txbuf, 0, 0x8000); -+ ploopback->rxsize = 0; -+ _rtw_memset(ploopback->rxbuf, 0, 0x8000); -+ -+ freeloopbackpkt(padapter, pxmitframe); -+ pxmitframe = NULL; -+ -+ flush_signals_thread(); -+ -+ if ((ploopback->bstop == _TRUE) || -+ ((ploopback->cnt != 0) && (ploopback->cnt == cnt))) { -+ u32 ok_rate, fail_rate, all; -+ all = cnt; -+ ok_rate = (ok * 100) / all; -+ fail_rate = (fail * 100) / all; -+ sprintf(ploopback->msg, \ -+ "loopback result: ok=%d%%(%d/%d),error=%d%%(%d/%d)", \ -+ ok_rate, ok, all, fail_rate, fail, all); -+ break; -+ } -+ } while (1); -+ -+ ploopback->bstop = _TRUE; -+ -+ thread_exit(NULL); -+ return 0; -+} -+ -+static void loopbackTest(PADAPTER padapter, u32 cnt, u32 size, u8 *pmsg) -+{ -+ PLOOPBACKDATA ploopback; -+ u32 len; -+ s32 err; -+ -+ ploopback = padapter->ploopback; -+ -+ if (ploopback) { -+ if (ploopback->bstop == _FALSE) { -+ ploopback->bstop = _TRUE; -+ _rtw_up_sema(&ploopback->sema); -+ } -+ len = 0; -+ do { -+ len = strlen(ploopback->msg); -+ if (len) -+ break; -+ rtw_msleep_os(1); -+ } while (1); -+ RTW_INFO("Free loopback, end the test.\n"); -+ _rtw_memcpy(pmsg, ploopback->msg, len + 1); -+ freeLoopback(padapter); -+ -+ return; -+ } -+ -+ /* disable dynamic algorithm */ -+#ifndef CONFIG_NO_PHYDM -+ rtw_phydm_ability_backup(padapter); -+ rtw_phydm_func_disable_all(padapter); -+#endif -+ -+ /* create pseudo ad-hoc connection */ -+ err = initpseudoadhoc(padapter); -+ if (err == _FAIL) { -+ sprintf(pmsg, "loopback FAIL! 1.1 init ad-hoc FAIL!"); -+ return; -+ } -+ -+ err = createpseudoadhoc(padapter); -+ if (err == _FAIL) { -+ sprintf(pmsg, "loopback FAIL! 1.2 create ad-hoc master FAIL!"); -+ return; -+ } -+ -+ err = initLoopback(padapter); -+ if (err) { -+ sprintf(pmsg, "loopback FAIL! 2. init FAIL! error code=%d", err); -+ return; -+ } -+ -+ ploopback = padapter->ploopback; -+ -+ ploopback->bstop = _FALSE; -+ ploopback->cnt = cnt; -+ ploopback->size = size; -+ ploopback->lbkthread = kthread_run(lbk_thread, padapter, "RTW_LBK_THREAD"); -+ if (IS_ERR(ploopback->lbkthread)) { -+ freeLoopback(padapter); -+ ploopback->lbkthread = NULL; -+ sprintf(pmsg, "loopback start FAIL! cnt=%d", cnt); -+ return; -+ } -+ -+ sprintf(pmsg, "loopback start! cnt=%d", cnt); -+} -+#endif /* CONFIG_MAC_LOOPBACK_DRIVER */ -+ -+static int rtw_test( -+ struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ u32 len; -+ u8 *pbuf, *pch; -+ char *ptmp; -+ u8 *delim = ","; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ -+ RTW_INFO("+%s\n", __func__); -+ len = wrqu->data.length; -+ -+ pbuf = (u8 *)rtw_zmalloc(len + 1); -+ if (pbuf == NULL) { -+ RTW_INFO("%s: no memory!\n", __func__); -+ return -ENOMEM; -+ } -+ -+ if (copy_from_user(pbuf, wrqu->data.pointer, len)) { -+ rtw_mfree(pbuf, len + 1); -+ RTW_INFO("%s: copy from user fail!\n", __func__); -+ return -EFAULT; -+ } -+ -+ pbuf[len] = '\0'; -+ -+ RTW_INFO("%s: string=\"%s\"\n", __func__, pbuf); -+ -+ ptmp = (char *)pbuf; -+ pch = strsep(&ptmp, delim); -+ if ((pch == NULL) || (strlen(pch) == 0)) { -+ rtw_mfree(pbuf, len); -+ RTW_INFO("%s: parameter error(level 1)!\n", __func__); -+ return -EFAULT; -+ } -+ -+#ifdef CONFIG_MAC_LOOPBACK_DRIVER -+ if (strcmp(pch, "init") == 0) { -+ u8 status; -+ -+ rtw_clr_drv_stopped(padapter); /* should clear drv_stopped, otherwise driver can't trx */ -+ -+ status = hal_init(padapter); -+ RTW_INFO("HAL_INIT %s\n", status ? "SUCCESS" : "FAIL"); -+ -+ rtw_write8(padapter, REG_LOOPBACK_ENABLE, LOOKBACK_ENABLE_VALUE); -+ RTW_INFO("Write 0x%03x to 0x%02x, enable loopback\n", -+ REG_LOOPBACK_ENABLE, LOOKBACK_ENABLE_VALUE); -+ -+ } else if (strcmp(pch, "loopback") == 0) { -+ s32 cnt = 0; -+ u32 size = 64; -+ -+ pch = strsep(&ptmp, delim); -+ if ((pch == NULL) || (strlen(pch) == 0)) { -+ rtw_mfree(pbuf, len); -+ RTW_INFO("%s: parameter error(level 2)!\n", __func__); -+ return -EFAULT; -+ } -+ -+ sscanf(pch, "%d", &cnt); -+ RTW_INFO("%s: loopback cnt=%d\n", __func__, cnt); -+ -+ pch = strsep(&ptmp, delim); -+ if ((pch == NULL) || (strlen(pch) == 0)) { -+ rtw_mfree(pbuf, len); -+ RTW_INFO("%s: parameter error(level 2)!\n", __func__); -+ return -EFAULT; -+ } -+ -+ sscanf(pch, "%d", &size); -+ RTW_INFO("%s: loopback size=%d\n", __func__, size); -+ -+ loopbackTest(padapter, cnt, size, extra); -+ wrqu->data.length = strlen(extra) + 1; -+ -+ goto free_buf; -+ } -+#endif -+ -+ -+#ifdef CONFIG_BT_COEXIST -+ if (strcmp(pch, "bton") == 0) { -+ rtw_btcoex_SetManualControl(padapter, _FALSE); -+ goto free_buf; -+ } else if (strcmp(pch, "btoff") == 0) { -+ rtw_btcoex_SetManualControl(padapter, _TRUE); -+ goto free_buf; -+ } else if (strcmp(pch, "coex_auto") == 0) { -+ rtw_btcoex_set_policy_control(padapter, BTCOEX_POLICY_CONTROL_AUTO); -+ goto free_buf; -+ } else if (strcmp(pch, "coex_force_freerun") == 0) { -+ rtw_btcoex_set_policy_control(padapter, BTCOEX_POLICY_CONTROL_FORCE_FREERUN); -+ goto free_buf; -+ } else if (strcmp(pch, "coex_force_tdma") == 0) { -+ rtw_btcoex_set_policy_control(padapter, BTCOEX_POLICY_CONTROL_FORCE_TDMA); -+ goto free_buf; -+ } -+#endif -+ -+ if (strcmp(pch, "h2c") == 0) { -+ u8 param[8]; -+ u8 count = 0; -+ u32 tmp; -+ u8 i; -+ u32 pos; -+ u8 ret; -+ -+ do { -+ pch = strsep(&ptmp, delim); -+ if ((pch == NULL) || (strlen(pch) == 0)) -+ break; -+ -+ sscanf(pch, "%x", &tmp); -+ param[count++] = (u8)tmp; -+ } while (count < 8); -+ -+ if (count == 0) { -+ rtw_mfree(pbuf, len); -+ RTW_INFO("%s: parameter error(level 2)!\n", __func__); -+ return -EFAULT; -+ } -+ -+ ret = rtw_test_h2c_cmd(padapter, param, count); -+ -+ pos = sprintf(extra, "H2C ID=0x%02x content=", param[0]); -+ for (i = 1; i < count; i++) -+ pos += sprintf(extra + pos, "%02x,", param[i]); -+ extra[pos] = 0; -+ pos--; -+ pos += sprintf(extra + pos, " %s", ret == _FAIL ? "FAIL" : "OK"); -+ -+ wrqu->data.length = strlen(extra) + 1; -+ -+ goto free_buf; -+ } -+ -+ if (strcmp(pch, "dump_mac_reg") == 0) { -+ mac_reg_dump(RTW_DBGDUMP, padapter); -+ goto free_buf; -+ } -+ -+free_buf: -+ rtw_mfree(pbuf, len); -+ return 0; -+} -+ -+static iw_handler rtw_handlers[] = { -+#ifdef CONFIG_IOCTL_WEXT -+ NULL, /* SIOCSIWCOMMIT */ -+ rtw_wx_get_name, /* SIOCGIWNAME */ -+ dummy, /* SIOCSIWNWID */ -+ dummy, /* SIOCGIWNWID */ -+ rtw_wx_set_freq, /* SIOCSIWFREQ */ -+ rtw_wx_get_freq, /* SIOCGIWFREQ */ -+ rtw_wx_set_mode, /* SIOCSIWMODE */ -+ rtw_wx_get_mode, /* SIOCGIWMODE */ -+ dummy, /* SIOCSIWSENS */ -+ rtw_wx_get_sens, /* SIOCGIWSENS */ -+ NULL, /* SIOCSIWRANGE */ -+ rtw_wx_get_range, /* SIOCGIWRANGE */ -+ rtw_wx_set_priv, /* SIOCSIWPRIV */ -+ NULL, /* SIOCGIWPRIV */ -+ NULL, /* SIOCSIWSTATS */ -+ NULL, /* SIOCGIWSTATS */ -+ dummy, /* SIOCSIWSPY */ -+ dummy, /* SIOCGIWSPY */ -+ NULL, /* SIOCGIWTHRSPY */ -+ NULL, /* SIOCWIWTHRSPY */ -+ rtw_wx_set_wap, /* SIOCSIWAP */ -+ rtw_wx_get_wap, /* SIOCGIWAP */ -+ rtw_wx_set_mlme, /* request MLME operation; uses struct iw_mlme */ -+ dummy, /* SIOCGIWAPLIST -- depricated */ -+ rtw_wx_set_scan, /* SIOCSIWSCAN */ -+ rtw_wx_get_scan, /* SIOCGIWSCAN */ -+ rtw_wx_set_essid, /* SIOCSIWESSID */ -+ rtw_wx_get_essid, /* SIOCGIWESSID */ -+ dummy, /* SIOCSIWNICKN */ -+ rtw_wx_get_nick, /* SIOCGIWNICKN */ -+ NULL, /* -- hole -- */ -+ NULL, /* -- hole -- */ -+ rtw_wx_set_rate, /* SIOCSIWRATE */ -+ rtw_wx_get_rate, /* SIOCGIWRATE */ -+ rtw_wx_set_rts, /* SIOCSIWRTS */ -+ rtw_wx_get_rts, /* SIOCGIWRTS */ -+ rtw_wx_set_frag, /* SIOCSIWFRAG */ -+ rtw_wx_get_frag, /* SIOCGIWFRAG */ -+ dummy, /* SIOCSIWTXPOW */ -+ dummy, /* SIOCGIWTXPOW */ -+ dummy, /* SIOCSIWRETRY */ -+ rtw_wx_get_retry, /* SIOCGIWRETRY */ -+ rtw_wx_set_enc, /* SIOCSIWENCODE */ -+ rtw_wx_get_enc, /* SIOCGIWENCODE */ -+ dummy, /* SIOCSIWPOWER */ -+ rtw_wx_get_power, /* SIOCGIWPOWER */ -+ NULL, /*---hole---*/ -+ NULL, /*---hole---*/ -+ rtw_wx_set_gen_ie, /* SIOCSIWGENIE */ -+ NULL, /* SIOCGWGENIE */ -+ rtw_wx_set_auth, /* SIOCSIWAUTH */ -+ NULL, /* SIOCGIWAUTH */ -+ rtw_wx_set_enc_ext, /* SIOCSIWENCODEEXT */ -+ NULL, /* SIOCGIWENCODEEXT */ -+ rtw_wx_set_pmkid, /* SIOCSIWPMKSA */ -+ NULL, /*---hole---*/ -+#endif -+}; -+ -+ -+static const struct iw_priv_args rtw_private_args[] = { -+ { -+ SIOCIWFIRSTPRIV + 0x0, -+ IW_PRIV_TYPE_CHAR | 0x7FF, 0, "write" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x1, -+ IW_PRIV_TYPE_CHAR | 0x7FF, -+ IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "read" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x2, 0, 0, "driver_ext" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x3, 0, 0, "mp_ioctl" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x4, -+ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "apinfo" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x5, -+ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "setpid" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x6, -+ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_start" -+ }, -+ /* for PLATFORM_MT53XX */ -+ { -+ SIOCIWFIRSTPRIV + 0x7, -+ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "get_sensitivity" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x8, -+ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_prob_req_ie" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x9, -+ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_assoc_req_ie" -+ }, -+ -+ /* for RTK_DMP_PLATFORM */ -+ { -+ SIOCIWFIRSTPRIV + 0xA, -+ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "channel_plan" -+ }, -+ -+ { -+ SIOCIWFIRSTPRIV + 0xB, -+ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "dbg" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0xC, -+ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "rfw" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0xD, -+ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "rfr" -+ }, -+#if 0 -+ { -+ SIOCIWFIRSTPRIV + 0xE, 0, 0, "wowlan_ctrl" -+ }, -+#endif -+ { -+ SIOCIWFIRSTPRIV + 0x10, -+ IW_PRIV_TYPE_CHAR | 1024, 0, "p2p_set" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x11, -+ IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "p2p_get" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x12, 0, 0, "NULL" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x13, -+ IW_PRIV_TYPE_CHAR | 64, IW_PRIV_TYPE_CHAR | 64 , "p2p_get2" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x14, -+ IW_PRIV_TYPE_CHAR | 64, 0, "tdls" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x15, -+ IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | 1024 , "tdls_get" -+ }, -+ { -+ SIOCIWFIRSTPRIV + 0x16, -+ IW_PRIV_TYPE_CHAR | 64, 0, "pm_set" -+ }, -+#ifdef CONFIG_RTW_80211K -+ { -+ SIOCIWFIRSTPRIV + 0x17, -+ IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | 1024 , "rrm" -+ }, -+#else -+ {SIOCIWFIRSTPRIV + 0x17, IW_PRIV_TYPE_CHAR | 1024 , 0 , "NULL"}, -+#endif -+ -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ {SIOCIWFIRSTPRIV + 0x18, IW_PRIV_TYPE_CHAR | 1024 , 0 , "cmap_intfs"}, -+#else -+ {SIOCIWFIRSTPRIV + 0x18, 0, 0, "NULL"}, -+#endif -+ -+#ifdef CONFIG_MP_INCLUDED -+ {SIOCIWFIRSTPRIV + 0x1A, IW_PRIV_TYPE_CHAR | 1024, 0, "NULL"}, -+ {SIOCIWFIRSTPRIV + 0x1B, IW_PRIV_TYPE_CHAR | 128, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "NULL"}, -+#else -+ {SIOCIWFIRSTPRIV + 0x1A, IW_PRIV_TYPE_CHAR | 1024, 0, "NULL"}, -+ {SIOCIWFIRSTPRIV + 0x1B, IW_PRIV_TYPE_CHAR | 128, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_get"}, -+#endif -+ { -+ SIOCIWFIRSTPRIV + 0x1D, -+ IW_PRIV_TYPE_CHAR | 40, IW_PRIV_TYPE_CHAR | 0x7FF, "test" -+ }, -+ -+ { SIOCIWFIRSTPRIV + 0x0E, IW_PRIV_TYPE_CHAR | 1024, 0 , ""}, /* set */ -+ { SIOCIWFIRSTPRIV + 0x0F, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , ""},/* get -+ * --- sub-ioctls definitions --- */ -+ -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ { VENDOR_IE_SET, IW_PRIV_TYPE_CHAR | 1024 , 0 , "vendor_ie_set" }, -+ { VENDOR_IE_GET, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "vendor_ie_get" }, -+#endif -+#if defined(CONFIG_RTL8723B) -+ { MP_SetBT, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_setbt" }, -+ { MP_DISABLE_BT_COEXIST, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_disa_btcoex"}, -+#endif -+#ifdef CONFIG_WOWLAN -+ { MP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "wow_mode" }, -+ { MP_WOW_SET_PATTERN , IW_PRIV_TYPE_CHAR | 1024, 0, "wow_set_pattern" }, -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ { MP_WOW_SET_KEEP_ALIVE_PATTERN ,IW_PRIV_TYPE_CHAR | 1024 , 0 , "wow_keep_alive"}, -+#endif /* defined (CONFIG_KEEP_ALIVE_PATTERN)*/ -+#endif -+ -+#ifdef CONFIG_AP_WOWLAN -+ { MP_AP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "ap_wow_mode" }, /* set */ -+#endif -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+ { MP_SD_IREAD, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "sd_iread" }, -+ { MP_SD_IWRITE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "sd_iwrite" }, -+#endif -+}; -+ -+ -+static const struct iw_priv_args rtw_mp_private_args[] = { -+ /* --- sub-ioctls definitions --- */ -+#ifdef CONFIG_MP_INCLUDED -+ { MP_START , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_start" }, -+ { MP_PHYPARA, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_phypara" }, -+ { MP_STOP , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_stop" }, -+ { MP_CHANNEL , IW_PRIV_TYPE_CHAR | 1024 , IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_channel" }, -+ { MP_CHL_OFFSET , IW_PRIV_TYPE_CHAR | 1024 , IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ch_offset" }, -+ { MP_BANDWIDTH , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_bandwidth"}, -+ { MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" }, -+ { MP_RESET_STATS , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_reset_stats"}, -+ { MP_QUERY , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "mp_query"}, -+ { READ_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_reg" }, -+ { MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" }, -+ { READ_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_rf" }, -+ { MP_PSD , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_psd"}, -+ { MP_DUMP, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_dump" }, -+ { MP_TXPOWER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_txpower"}, -+ { MP_ANT_TX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_tx"}, -+ { MP_ANT_RX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_rx"}, -+ { WRITE_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "write_reg" }, -+ { WRITE_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "write_rf" }, -+ { MP_CTX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ctx"}, -+ { MP_ARX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_arx"}, -+ { MP_THER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ther"}, -+ { EFUSE_SET, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_set" }, -+ { EFUSE_GET, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_get" }, -+ { MP_PWRTRK , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_pwrtrk"}, -+ { MP_QueryDrvStats, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_drvquery" }, -+ { MP_IOCTL, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_ioctl"}, -+ { MP_SetRFPathSwh, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_setrfpath" }, -+ { MP_PwrCtlDM, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_pwrctldm" }, -+ { MP_GET_TXPOWER_INX, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_get_txpower" }, -+ { MP_GETVER, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_priv_ver" }, -+ { MP_MON, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_mon" }, -+ { EFUSE_BT_MASK, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_bt_mask" }, -+ { EFUSE_MASK, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_mask" }, -+ { EFUSE_FILE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_file" }, -+ { EFUSE_FILE_STORE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_store" }, -+ { MP_TX, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_tx" }, -+ { MP_RX, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rx" }, -+ { MP_HW_TX_MODE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_hxtx" }, -+ { MP_PWRLMT, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_pwrlmt" }, -+ { MP_PWRBYRATE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_pwrbyrate" }, -+ { CTA_TEST, IW_PRIV_TYPE_CHAR | 1024, 0, "cta_test"}, -+ { MP_IQK, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_iqk"}, -+ { MP_LCK, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_lck"}, -+ { BT_EFUSE_FILE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "bt_efuse_file" }, -+ { MP_SWRFPath, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_swrfpath" }, -+ { MP_LINK, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_link" }, -+ { MP_DPK, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_dpk"}, -+ { MP_DPK_TRK, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_dpk_trk" }, -+ { MP_GET_TSSIDE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_get_tsside" }, -+ { MP_SET_TSSIDE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_set_tsside" }, -+#ifdef CONFIG_RTW_CUSTOMER_STR -+ { MP_CUSTOMER_STR, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "customer_str" }, -+#endif -+ -+#endif /* CONFIG_MP_INCLUDED */ -+}; -+ -+static iw_handler rtw_private_handler[] = { -+ rtw_wx_write32, /* 0x00 */ -+ rtw_wx_read32, /* 0x01 */ -+ NULL, /* 0x02 */ -+#ifdef MP_IOCTL_HDL -+ rtw_mp_ioctl_hdl, /* 0x03 */ -+#else -+ rtw_wx_priv_null, -+#endif -+ /* for MM DTV platform */ -+ rtw_get_ap_info, /* 0x04 */ -+ -+ rtw_set_pid, /* 0x05 */ -+ rtw_wps_start, /* 0x06 */ -+ -+ /* for PLATFORM_MT53XX */ -+ rtw_wx_get_sensitivity, /* 0x07 */ -+ rtw_wx_set_mtk_wps_probe_ie, /* 0x08 */ -+ rtw_wx_set_mtk_wps_ie, /* 0x09 */ -+ -+ /* for RTK_DMP_PLATFORM -+ * Set Channel depend on the country code */ -+ rtw_wx_set_channel_plan, /* 0x0A */ -+ -+ rtw_dbg_port, /* 0x0B */ -+ rtw_wx_write_rf, /* 0x0C */ -+ rtw_wx_read_rf, /* 0x0D */ -+ -+ rtw_priv_set, /*0x0E*/ -+ rtw_priv_get, /*0x0F*/ -+ -+ rtw_p2p_set, /* 0x10 */ -+ rtw_p2p_get, /* 0x11 */ -+ NULL, /* 0x12 */ -+ rtw_p2p_get2, /* 0x13 */ -+ -+ rtw_tdls, /* 0x14 */ -+ rtw_tdls_get, /* 0x15 */ -+ -+ rtw_pm_set, /* 0x16 */ -+#ifdef CONFIG_RTW_80211K -+ rtw_wx_priv_rrm, /* 0x17 */ -+#else -+ rtw_wx_priv_null, /* 0x17 */ -+#endif -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ cmap_intfs_ioctl, /* 0x18 */ -+#else -+ NULL, /* 0x18 */ -+#endif -+ rtw_wx_priv_null, /* 0x19 */ -+#ifdef CONFIG_MP_INCLUDED -+ rtw_wx_priv_null, /* 0x1A */ -+ rtw_wx_priv_null, /* 0x1B */ -+#else -+ rtw_wx_priv_null, /* 0x1A */ -+ rtw_mp_efuse_get, /* 0x1B */ -+#endif -+ NULL, /* 0x1C is reserved for hostapd */ -+ rtw_test, /* 0x1D */ -+}; -+ -+#ifdef CONFIG_WIRELESS_EXT -+#if WIRELESS_EXT >= 17 -+static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct iw_statistics *piwstats = &padapter->iwstats; -+ int tmp_level = 0; -+ int tmp_qual = 0; -+ int tmp_noise = 0; -+ -+ if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) != _TRUE) { -+ piwstats->qual.qual = 0; -+ piwstats->qual.level = 0; -+ piwstats->qual.noise = 0; -+ /* RTW_INFO("No link level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise); */ -+ } else { -+#ifdef CONFIG_SIGNAL_DISPLAY_DBM -+ tmp_level = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); -+#else -+ tmp_level = padapter->recvpriv.signal_strength; -+#endif -+ -+ tmp_qual = padapter->recvpriv.signal_qual; -+ #ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ if (IS_NM_ENABLE(padapter)) { -+ tmp_noise = rtw_noise_measure_curchan(padapter); -+ #ifndef CONFIG_SIGNAL_DISPLAY_DBM -+ tmp_noise = translate_dbm_to_percentage(tmp_noise);/*percentage*/ -+ #endif -+ } -+ #endif -+ /* RTW_INFO("level:%d, qual:%d, noise:%d, rssi (%d)\n", tmp_level, tmp_qual, tmp_noise,padapter->recvpriv.rssi); */ -+ -+ piwstats->qual.level = tmp_level; -+ piwstats->qual.qual = tmp_qual; -+ piwstats->qual.noise = tmp_noise; -+ } -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 14)) -+ piwstats->qual.updated = IW_QUAL_ALL_UPDATED ;/* |IW_QUAL_DBM; */ -+#else -+#ifdef RTK_DMP_PLATFORM -+ /* IW_QUAL_DBM= 0x8, if driver use this flag, wireless extension will show value of dbm. */ -+ /* remove this flag for show percentage 0~100 */ -+ piwstats->qual.updated = 0x07; -+#else -+ piwstats->qual.updated = 0x0f; -+#endif -+#endif -+ -+#ifdef CONFIG_SIGNAL_DISPLAY_DBM -+ piwstats->qual.updated = piwstats->qual.updated | IW_QUAL_DBM; -+#endif -+ -+ return &padapter->iwstats; -+} -+#endif -+ -+struct iw_handler_def rtw_handlers_def = { -+ .standard = rtw_handlers, -+ .num_standard = sizeof(rtw_handlers) / sizeof(iw_handler), -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 33)) || defined(CONFIG_WEXT_PRIV) -+ .private = rtw_private_handler, -+ .private_args = (struct iw_priv_args *)rtw_private_args, -+ .num_private = sizeof(rtw_private_handler) / sizeof(iw_handler), -+ .num_private_args = sizeof(rtw_private_args) / sizeof(struct iw_priv_args), -+#endif -+#if WIRELESS_EXT >= 17 -+ .get_wireless_stats = rtw_get_wireless_stats, -+#endif -+}; -+#endif -+ -+/* copy from net/wireless/wext.c start -+ * ---------------------------------------------------------------- -+ * -+ * Calculate size of private arguments -+ */ -+static const char iw_priv_type_size[] = { -+ 0, /* IW_PRIV_TYPE_NONE */ -+ 1, /* IW_PRIV_TYPE_BYTE */ -+ 1, /* IW_PRIV_TYPE_CHAR */ -+ 0, /* Not defined */ -+ sizeof(__u32), /* IW_PRIV_TYPE_INT */ -+ sizeof(struct iw_freq), /* IW_PRIV_TYPE_FLOAT */ -+ sizeof(struct sockaddr), /* IW_PRIV_TYPE_ADDR */ -+ 0, /* Not defined */ -+}; -+ -+static int get_priv_size(__u16 args) -+{ -+ int num = args & IW_PRIV_SIZE_MASK; -+ int type = (args & IW_PRIV_TYPE_MASK) >> 12; -+ -+ return num * iw_priv_type_size[type]; -+} -+/* copy from net/wireless/wext.c end */ -+ -+ -+static int _rtw_ioctl_wext_private(struct net_device *dev, union iwreq_data *wrq_data) -+{ -+ int err = 0; -+ u8 *input = NULL; -+ u32 input_len = 0; -+ const char delim[] = " "; -+ u8 *output = NULL; -+ u32 output_len = 0; -+ u32 count = 0; -+ u8 *buffer = NULL; -+ u32 buffer_len = 0; -+ char *ptr = NULL; -+ u8 cmdname[17] = {0}; /* IFNAMSIZ+1 */ -+ u32 cmdlen; -+ s32 len; -+ u8 *extra = NULL; -+ u32 extra_size = 0; -+ -+ s32 k; -+ const iw_handler *priv; /* Private ioctl */ -+ const struct iw_priv_args *priv_args; /* Private ioctl description */ -+ const struct iw_priv_args *mp_priv_args; /*MP Private ioctl description */ -+ const struct iw_priv_args *sel_priv_args; /*Selected Private ioctl description */ -+ u32 num_priv; /* Number of ioctl */ -+ u32 num_priv_args; /* Number of descriptions */ -+ u32 num_mp_priv_args; /*Number of MP descriptions */ -+ u32 num_sel_priv_args; /*Number of Selected descriptions */ -+ iw_handler handler; -+ int temp; -+ int subcmd = 0; /* sub-ioctl index */ -+ int offset = 0; /* Space for sub-ioctl index */ -+ -+ union iwreq_data wdata; -+ -+ _rtw_memcpy(&wdata, wrq_data, sizeof(wdata)); -+ -+ input_len = wdata.data.length; -+ if (!input_len) -+ return -EINVAL; -+ input = rtw_zmalloc(input_len); -+ -+ if (input == NULL) { -+ err = -EOPNOTSUPP; -+ goto exit; -+ } -+ -+ if (copy_from_user(input, wdata.data.pointer, input_len)) { -+ err = -EFAULT; -+ goto exit; -+ } -+ input[input_len - 1] = '\0'; -+ ptr = input; -+ len = input_len; -+ -+ sscanf(ptr, "%16s", cmdname); -+ cmdlen = strlen(cmdname); -+ RTW_DBG("%s: cmd=%s\n", __func__, cmdname); -+ -+ /* skip command string */ -+ if (cmdlen > 0) -+ cmdlen += 1; /* skip one space */ -+ ptr += cmdlen; -+ len -= cmdlen; -+ RTW_DBG("%s: parameters=%s\n", __func__, ptr); -+ -+ priv = rtw_private_handler; -+ priv_args = rtw_private_args; -+ mp_priv_args = rtw_mp_private_args; -+ num_priv = sizeof(rtw_private_handler) / sizeof(iw_handler); -+ num_priv_args = sizeof(rtw_private_args) / sizeof(struct iw_priv_args); -+ num_mp_priv_args = sizeof(rtw_mp_private_args) / sizeof(struct iw_priv_args); -+ -+ if (num_priv_args == 0) { -+ err = -EOPNOTSUPP; -+ goto exit; -+ } -+ -+ /* Search the correct ioctl */ -+ k = -1; -+ sel_priv_args = priv_args; -+ num_sel_priv_args = num_priv_args; -+ while -+ ((++k < num_sel_priv_args) && strcmp(sel_priv_args[k].name, cmdname)) -+ ; -+ -+ /* If not found... */ -+ if (k == num_sel_priv_args) { -+ k = -1; -+ sel_priv_args = mp_priv_args; -+ num_sel_priv_args = num_mp_priv_args; -+ while -+ ((++k < num_sel_priv_args) && strcmp(sel_priv_args[k].name, cmdname)) -+ ; -+ -+ if (k == num_sel_priv_args) { -+ err = -EOPNOTSUPP; -+ goto exit; -+ } -+ } -+ -+ /* Watch out for sub-ioctls ! */ -+ if (sel_priv_args[k].cmd < SIOCDEVPRIVATE) { -+ int j = -1; -+ -+ /* Find the matching *real* ioctl */ -+ while ((++j < num_priv_args) && ((priv_args[j].name[0] != '\0') || -+ (priv_args[j].set_args != sel_priv_args[k].set_args) || -+ (priv_args[j].get_args != sel_priv_args[k].get_args))) -+ ; -+ -+ /* If not found... */ -+ if (j == num_priv_args) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ /* Save sub-ioctl number */ -+ subcmd = sel_priv_args[k].cmd; -+ /* Reserve one int (simplify alignment issues) */ -+ offset = sizeof(__u32); -+ /* Use real ioctl definition from now on */ -+ k = j; -+ } -+ -+ buffer = rtw_zmalloc(4096); -+ if (NULL == buffer) { -+ err = -ENOMEM; -+ goto exit; -+ } -+ -+ if (k >= num_priv_args) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ /* If we have to set some data */ -+ if ((priv_args[k].set_args & IW_PRIV_TYPE_MASK) && -+ (priv_args[k].set_args & IW_PRIV_SIZE_MASK)) { -+ u8 *str; -+ -+ switch (priv_args[k].set_args & IW_PRIV_TYPE_MASK) { -+ case IW_PRIV_TYPE_BYTE: -+ /* Fetch args */ -+ count = 0; -+ do { -+ str = strsep(&ptr, delim); -+ if (NULL == str) -+ break; -+ sscanf(str, "%i", &temp); -+ buffer[count++] = (u8)temp; -+ } while (1); -+ buffer_len = count; -+ -+ /* Number of args to fetch */ -+ wdata.data.length = count; -+ if (wdata.data.length > (priv_args[k].set_args & IW_PRIV_SIZE_MASK)) -+ wdata.data.length = priv_args[k].set_args & IW_PRIV_SIZE_MASK; -+ -+ break; -+ -+ case IW_PRIV_TYPE_INT: -+ /* Fetch args */ -+ count = 0; -+ do { -+ str = strsep(&ptr, delim); -+ if (NULL == str) -+ break; -+ sscanf(str, "%i", &temp); -+ ((s32 *)buffer)[count++] = (s32)temp; -+ } while (1); -+ buffer_len = count * sizeof(s32); -+ -+ /* Number of args to fetch */ -+ wdata.data.length = count; -+ if (wdata.data.length > (priv_args[k].set_args & IW_PRIV_SIZE_MASK)) -+ wdata.data.length = priv_args[k].set_args & IW_PRIV_SIZE_MASK; -+ -+ break; -+ -+ case IW_PRIV_TYPE_CHAR: -+ if (len > 0) { -+ /* Size of the string to fetch */ -+ wdata.data.length = len; -+ if (wdata.data.length > (priv_args[k].set_args & IW_PRIV_SIZE_MASK)) -+ wdata.data.length = priv_args[k].set_args & IW_PRIV_SIZE_MASK; -+ -+ /* Fetch string */ -+ _rtw_memcpy(buffer, ptr, wdata.data.length); -+ } else { -+ wdata.data.length = 1; -+ buffer[0] = '\0'; -+ } -+ buffer_len = wdata.data.length; -+ break; -+ -+ default: -+ RTW_INFO("%s: Not yet implemented...\n", __func__); -+ err = -1; -+ goto exit; -+ } -+ -+ if ((priv_args[k].set_args & IW_PRIV_SIZE_FIXED) && -+ (wdata.data.length != (priv_args[k].set_args & IW_PRIV_SIZE_MASK))) { -+ RTW_INFO("%s: The command %s needs exactly %d argument(s)...\n", -+ __func__, cmdname, priv_args[k].set_args & IW_PRIV_SIZE_MASK); -+ err = -EINVAL; -+ goto exit; -+ } -+ } /* if args to set */ -+ else -+ wdata.data.length = 0L; -+ -+ /* Those two tests are important. They define how the driver -+ * will have to handle the data */ -+ if ((priv_args[k].set_args & IW_PRIV_SIZE_FIXED) && -+ ((get_priv_size(priv_args[k].set_args) + offset) <= IFNAMSIZ)) { -+ /* First case : all SET args fit within wrq */ -+ if (offset) -+ wdata.mode = subcmd; -+ _rtw_memcpy(wdata.name + offset, buffer, IFNAMSIZ - offset); -+ } else { -+ if ((priv_args[k].set_args == 0) && -+ (priv_args[k].get_args & IW_PRIV_SIZE_FIXED) && -+ (get_priv_size(priv_args[k].get_args) <= IFNAMSIZ)) { -+ /* Second case : no SET args, GET args fit within wrq */ -+ if (offset) -+ wdata.mode = subcmd; -+ } else { -+ /* Third case : args won't fit in wrq, or variable number of args */ -+ if (copy_to_user(wdata.data.pointer, buffer, buffer_len)) { -+ err = -EFAULT; -+ goto exit; -+ } -+ wdata.data.flags = subcmd; -+ } -+ } -+ -+ rtw_mfree(input, input_len); -+ input = NULL; -+ -+ extra_size = 0; -+ if (IW_IS_SET(priv_args[k].cmd)) { -+ /* Size of set arguments */ -+ extra_size = get_priv_size(priv_args[k].set_args); -+ -+ /* Does it fits in iwr ? */ -+ if ((priv_args[k].set_args & IW_PRIV_SIZE_FIXED) && -+ ((extra_size + offset) <= IFNAMSIZ)) -+ extra_size = 0; -+ } else { -+ /* Size of get arguments */ -+ extra_size = get_priv_size(priv_args[k].get_args); -+ -+ /* Does it fits in iwr ? */ -+ if ((priv_args[k].get_args & IW_PRIV_SIZE_FIXED) && -+ (extra_size <= IFNAMSIZ)) -+ extra_size = 0; -+ } -+ -+ if (extra_size == 0) { -+ extra = (u8 *)&wdata; -+ rtw_mfree(buffer, 4096); -+ buffer = NULL; -+ } else -+ extra = buffer; -+ -+ handler = priv[priv_args[k].cmd - SIOCIWFIRSTPRIV]; -+ err = handler(dev, NULL, &wdata, extra); -+ -+ /* If we have to get some data */ -+ if ((priv_args[k].get_args & IW_PRIV_TYPE_MASK) && -+ (priv_args[k].get_args & IW_PRIV_SIZE_MASK)) { -+ int j; -+ int n = 0; /* number of args */ -+ u8 str[20] = {0}; -+ -+ /* Check where is the returned data */ -+ if ((priv_args[k].get_args & IW_PRIV_SIZE_FIXED) && -+ (get_priv_size(priv_args[k].get_args) <= IFNAMSIZ)) -+ n = priv_args[k].get_args & IW_PRIV_SIZE_MASK; -+ else -+ n = wdata.data.length; -+ -+ output = rtw_zmalloc(4096); -+ if (NULL == output) { -+ err = -ENOMEM; -+ goto exit; -+ } -+ -+ switch (priv_args[k].get_args & IW_PRIV_TYPE_MASK) { -+ case IW_PRIV_TYPE_BYTE: -+ /* Display args */ -+ for (j = 0; j < n; j++) { -+ sprintf(str, "%d ", extra[j]); -+ len = strlen(str); -+ output_len = strlen(output); -+ if ((output_len + len + 1) > 4096) { -+ err = -E2BIG; -+ goto exit; -+ } -+ _rtw_memcpy(output + output_len, str, len); -+ } -+ break; -+ -+ case IW_PRIV_TYPE_INT: -+ /* Display args */ -+ for (j = 0; j < n; j++) { -+ sprintf(str, "%d ", ((__s32 *)extra)[j]); -+ len = strlen(str); -+ output_len = strlen(output); -+ if ((output_len + len + 1) > 4096) { -+ err = -E2BIG; -+ goto exit; -+ } -+ _rtw_memcpy(output + output_len, str, len); -+ } -+ break; -+ -+ case IW_PRIV_TYPE_CHAR: -+ /* Display args */ -+ _rtw_memcpy(output, extra, n); -+ break; -+ -+ default: -+ RTW_INFO("%s: Not yet implemented...\n", __func__); -+ err = -1; -+ goto exit; -+ } -+ -+ output_len = strlen(output) + 1; -+ wrq_data->data.length = output_len; -+ if (copy_to_user(wrq_data->data.pointer, output, output_len)) { -+ err = -EFAULT; -+ goto exit; -+ } -+ } /* if args to set */ -+ else -+ wrq_data->data.length = 0; -+ -+exit: -+ if (input) -+ rtw_mfree(input, input_len); -+ if (buffer) -+ rtw_mfree(buffer, 4096); -+ if (output) -+ rtw_mfree(output, 4096); -+ -+ return err; -+} -+ -+#ifdef CONFIG_COMPAT -+static int rtw_ioctl_compat_wext_private(struct net_device *dev, struct ifreq *rq) -+{ -+ struct compat_iw_point iwp_compat; -+ union iwreq_data wrq_data; -+ int err = 0; -+ RTW_DBG("%s:...\n", __func__); -+ if (copy_from_user(&iwp_compat, rq->ifr_ifru.ifru_data, sizeof(struct compat_iw_point))) -+ return -EFAULT; -+ -+ wrq_data.data.pointer = compat_ptr(iwp_compat.pointer); -+ wrq_data.data.length = iwp_compat.length; -+ wrq_data.data.flags = iwp_compat.flags; -+ -+ err = _rtw_ioctl_wext_private(dev, &wrq_data); -+ -+ iwp_compat.pointer = ptr_to_compat(wrq_data.data.pointer); -+ iwp_compat.length = wrq_data.data.length; -+ iwp_compat.flags = wrq_data.data.flags; -+ if (copy_to_user(rq->ifr_ifru.ifru_data, &iwp_compat, sizeof(struct compat_iw_point))) -+ return -EFAULT; -+ -+ return err; -+} -+#endif /* CONFIG_COMPAT */ -+ -+static int rtw_ioctl_standard_wext_private(struct net_device *dev, struct ifreq *rq) -+{ -+ struct iw_point *iwp; -+ union iwreq_data wrq_data; -+ int err = 0; -+ iwp = &wrq_data.data; -+ RTW_DBG("%s:...\n", __func__); -+ if (copy_from_user(iwp, rq->ifr_ifru.ifru_data, sizeof(struct iw_point))) -+ return -EFAULT; -+ -+ err = _rtw_ioctl_wext_private(dev, &wrq_data); -+ -+ if (copy_to_user(rq->ifr_ifru.ifru_data, iwp, sizeof(struct iw_point))) -+ return -EFAULT; -+ -+ return err; -+} -+ -+static int rtw_ioctl_wext_private(struct net_device *dev, struct ifreq *rq) -+{ -+#ifdef CONFIG_COMPAT -+#if (KERNEL_VERSION(4, 6, 0) > LINUX_VERSION_CODE) -+ if (is_compat_task()) -+#else -+ if (in_compat_syscall()) -+#endif -+ return rtw_ioctl_compat_wext_private(dev, rq); -+ else -+#endif /* CONFIG_COMPAT */ -+ return rtw_ioctl_standard_wext_private(dev, rq); -+} -+ -+int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) -+{ -+ struct iwreq *wrq = (struct iwreq *)rq; -+ int ret = 0; -+ -+ switch (cmd) { -+#ifdef CONFIG_IOCTL_WEXT -+ case RTL_IOCTL_WPA_SUPPLICANT: -+ ret = wpa_supplicant_ioctl(dev, &wrq->u.data); -+ break; -+#ifdef CONFIG_AP_MODE -+ case RTL_IOCTL_HOSTAPD: -+ ret = rtw_hostapd_ioctl(dev, &wrq->u.data); -+ break; -+#ifdef CONFIG_WIRELESS_EXT -+ case SIOCSIWMODE: -+ ret = rtw_wx_set_mode(dev, NULL, &wrq->u, NULL); -+ break; -+#endif -+#endif /* CONFIG_AP_MODE */ -+#endif /* CONFIG_IOCTL_WEXT */ -+ case SIOCDEVPRIVATE: -+ ret = rtw_ioctl_wext_private(dev, rq); -+ break; -+ case (SIOCDEVPRIVATE+1): -+ ret = rtw_android_priv_cmd(dev, rq, cmd); -+ break; -+ default: -+ ret = -EOPNOTSUPP; -+ break; -+ } -+ -+ return ret; -+} -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/ioctl_mp.c b/drivers/staging/rtl8723cs/os_dep/linux/ioctl_mp.c -new file mode 100644 -index 000000000000..185cc9478015 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/ioctl_mp.c -@@ -0,0 +1,3531 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#if defined(CONFIG_MP_INCLUDED) -+ -+#include -+#include -+#include "../../hal/phydm/phydm_precomp.h" -+#include -+ -+ -+#if defined(CONFIG_RTL8723B) -+ #include -+#endif -+ -+#define RTW_IWD_MAX_LEN 128 -+inline u8 rtw_do_mp_iwdata_len_chk(const char *caller, u32 len) -+{ -+ u8 is_illegal = _FALSE; -+ if (len >= RTW_IWD_MAX_LEN) { -+ RTW_ERR("%s : iw data len(%u) > RTW_IWD_MAX_LEN(%u)", -+ caller, len, RTW_IWD_MAX_LEN); -+ is_illegal = _TRUE; -+ } -+ return is_illegal; -+} -+ -+/* -+ * Input Format: %s,%d,%d -+ * %s is width, could be -+ * "b" for 1 byte -+ * "w" for WORD (2 bytes) -+ * "dw" for DWORD (4 bytes) -+ * 1st %d is address(offset) -+ * 2st %d is data to write -+ */ -+int rtw_mp_write_reg(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ char *pch, *pnext; -+ char *width_str; -+ char width; -+ u32 addr, data; -+ int ret; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ char input[RTW_IWD_MAX_LEN]; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, (wrqu->length + 1))) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ input[wrqu->length] = '\0'; -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ -+ pch = input; -+ -+ pnext = strpbrk(pch, " ,.-"); -+ if (pnext == NULL) -+ return -EINVAL; -+ *pnext = 0; -+ width_str = pch; -+ -+ pch = pnext + 1; -+ pnext = strpbrk(pch, " ,.-"); -+ if (pnext == NULL) -+ return -EINVAL; -+ *pnext = 0; -+ /*addr = simple_strtoul(pch, &ptmp, 16); -+ _rtw_memset(buf, '\0', sizeof(buf)); -+ _rtw_memcpy(buf, pch, pnext-pch); -+ ret = kstrtoul(buf, 16, &addr);*/ -+ ret = sscanf(pch, "%x", &addr); -+ -+ pch = pnext + 1; -+ pnext = strpbrk(pch, " ,.-"); -+ if ((pch - input) >= wrqu->length) -+ return -EINVAL; -+ /*data = simple_strtoul(pch, &ptmp, 16);*/ -+ ret = sscanf(pch, "%x", &data); -+ RTW_INFO("data=%x,addr=%x\n", (u32)data, (u32)addr); -+ ret = 0; -+ width = width_str[0]; -+ switch (width) { -+ case 'b': -+ /* 1 byte*/ -+ if (data > 0xFF) { -+ ret = -EINVAL; -+ break; -+ } -+ rtw_write8(padapter, addr, data); -+ break; -+ case 'w': -+ /* 2 bytes*/ -+ if (data > 0xFFFF) { -+ ret = -EINVAL; -+ break; -+ } -+ rtw_write16(padapter, addr, data); -+ break; -+ case 'd': -+ /* 4 bytes*/ -+ rtw_write32(padapter, addr, data); -+ break; -+ default: -+ ret = -EINVAL; -+ break; -+ } -+ -+ return ret; -+} -+ -+ -+/* -+ * Input Format: %s,%d -+ * %s is width, could be -+ * "b" for 1 byte -+ * "w" for WORD (2 bytes) -+ * "dw" for DWORD (4 bytes) -+ * %d is address(offset) -+ * -+ * Return: -+ * %d for data readed -+ */ -+int rtw_mp_read_reg(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ char input[RTW_IWD_MAX_LEN]; -+ char *pch, *pnext; -+ char *width_str; -+ char width; -+ char data[20], tmp[20]; -+ u32 addr = 0, strtout = 0; -+ u32 i = 0, j = 0, ret = 0, data32 = 0; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ char *pextra = extra; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, (wrqu->length + 1))) -+ return -EFAULT; -+ -+ if (wrqu->length > 128) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ input[wrqu->length] = '\0'; -+ _rtw_memset(extra, 0, wrqu->length); -+ _rtw_memset(data, '\0', sizeof(data)); -+ _rtw_memset(tmp, '\0', sizeof(tmp)); -+ pch = input; -+ pnext = strpbrk(pch, " ,.-"); -+ if (pnext == NULL) -+ return -EINVAL; -+ *pnext = 0; -+ width_str = pch; -+ -+ pch = pnext + 1; -+ -+ ret = sscanf(pch, "%x", &addr); -+ if (addr > MP_READ_REG_MAX_OFFSET) -+ return -EINVAL; -+ -+ ret = 0; -+ width = width_str[0]; -+ -+ switch (width) { -+ case 'b': -+ data32 = rtw_read8(padapter, addr); -+ RTW_INFO("%x\n", data32); -+ sprintf(extra, "%d", data32); -+ wrqu->length = strlen(extra); -+ break; -+ case 'w': -+ /* 2 bytes*/ -+ sprintf(data, "%04x\n", rtw_read16(padapter, addr)); -+ -+ for (i = 0 ; i <= strlen(data) ; i++) { -+ if (i % 2 == 0) { -+ tmp[j] = ' '; -+ j++; -+ } -+ if (data[i] != '\0') -+ tmp[j] = data[i]; -+ -+ j++; -+ } -+ pch = tmp; -+ RTW_INFO("pch=%s", pch); -+ -+ while (*pch != '\0') { -+ pnext = strpbrk(pch, " "); -+ if (!pnext || ((pnext - tmp) > 4)) -+ break; -+ -+ pnext++; -+ if (*pnext != '\0') { -+ /*strtout = simple_strtoul(pnext , &ptmp, 16);*/ -+ ret = sscanf(pnext, "%x", &strtout); -+ pextra += sprintf(pextra, " %d", strtout); -+ } else -+ break; -+ pch = pnext; -+ } -+ wrqu->length = strlen(extra); -+ break; -+ case 'd': -+ /* 4 bytes */ -+ sprintf(data, "%08x", rtw_read32(padapter, addr)); -+ /*add read data format blank*/ -+ for (i = 0 ; i <= strlen(data) ; i++) { -+ if (i % 2 == 0) { -+ tmp[j] = ' '; -+ j++; -+ } -+ if (data[i] != '\0') -+ tmp[j] = data[i]; -+ -+ j++; -+ } -+ pch = tmp; -+ RTW_INFO("pch=%s", pch); -+ -+ while (*pch != '\0') { -+ pnext = strpbrk(pch, " "); -+ if (!pnext) -+ break; -+ -+ pnext++; -+ if (*pnext != '\0') { -+ ret = sscanf(pnext, "%x", &strtout); -+ pextra += sprintf(pextra, " %d", strtout); -+ } else -+ break; -+ pch = pnext; -+ } -+ wrqu->length = strlen(extra); -+ break; -+ -+ default: -+ wrqu->length = 0; -+ ret = -EINVAL; -+ break; -+ } -+ -+ return ret; -+} -+ -+ -+/* -+ * Input Format: %d,%x,%x -+ * %d is RF path, should be smaller than MAX_RF_PATH_NUMS -+ * 1st %x is address(offset) -+ * 2st %x is data to write -+ */ -+int rtw_mp_write_rf(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u32 path, addr, data; -+ int ret; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ char input[RTW_IWD_MAX_LEN]; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, wrqu->length); -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ -+ ret = sscanf(input, "%d,%x,%x", &path, &addr, &data); -+ if (ret < 3) -+ return -EINVAL; -+ -+ if (path >= hal_spec->rf_reg_path_num) -+ return -EINVAL; -+ if (addr > 0xFF) -+ return -EINVAL; -+ if (data > 0xFFFFF) -+ return -EINVAL; -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ -+ write_rfreg(padapter, path, addr, data); -+ -+ sprintf(extra, "write_rf completed\n"); -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+ -+/* -+ * Input Format: %d,%x -+ * %d is RF path, should be smaller than MAX_RF_PATH_NUMS -+ * %x is address(offset) -+ * -+ * Return: -+ * %d for data readed -+ */ -+int rtw_mp_read_rf(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ char input[RTW_IWD_MAX_LEN]; -+ char *pch, *pnext; -+ char data[20], tmp[20]; -+ u32 path, addr, strtou; -+ u32 ret, i = 0 , j = 0; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ char *pextra = extra; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (wrqu->length > 128) -+ return -EFAULT; -+ _rtw_memset(input, 0, wrqu->length); -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ ret = sscanf(input, "%d,%x", &path, &addr); -+ if (ret < 2) -+ return -EINVAL; -+ -+ if (path >= hal_spec->rf_reg_path_num) -+ return -EINVAL; -+ -+ if (addr > MP_READ_REG_MAX_OFFSET) -+ return -EINVAL; -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ -+ sprintf(data, "%08x", read_rfreg(padapter, path, addr)); -+ /*add read data format blank*/ -+ for (i = 0 ; i <= strlen(data) ; i++) { -+ if (i % 2 == 0) { -+ tmp[j] = ' '; -+ j++; -+ } -+ tmp[j] = data[i]; -+ j++; -+ } -+ pch = tmp; -+ RTW_INFO("pch=%s", pch); -+ -+ while (*pch != '\0') { -+ pnext = strpbrk(pch, " "); -+ if (!pnext) -+ break; -+ pnext++; -+ if (*pnext != '\0') { -+ /*strtou =simple_strtoul(pnext , &ptmp, 16);*/ -+ ret = sscanf(pnext, "%x", &strtou); -+ pextra += sprintf(pextra, " %d", strtou); -+ } else -+ break; -+ pch = pnext; -+ } -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+ -+int rtw_mp_start(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ int ret = 0; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct mp_priv *pmppriv = &padapter->mppriv; -+ -+ rtw_pm_set_ips(padapter, IPS_NONE); -+ LeaveAllPowerSaveMode(padapter); -+ -+ pmppriv->bprocess_mp_mode = _TRUE; -+ -+ if (rtw_mi_check_fwstate(padapter, WIFI_UNDER_SURVEY)) { -+ rtw_mi_buddy_set_scan_deny(padapter, 5000); -+ rtw_mi_scan_abort(padapter, _TRUE); -+ } -+ -+ rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); -+ -+ if (rtw_mp_cmd(padapter, MP_START, RTW_CMDF_WAIT_ACK) != _SUCCESS) -+ ret = -EPERM; -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ sprintf(extra, "mp_start %s\n", ret == 0 ? "ok" : "fail"); -+ wrqu->length = strlen(extra); -+ -+ return ret; -+} -+ -+ -+ -+int rtw_mp_stop(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ int ret = 0; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct mp_priv *pmppriv = &padapter->mppriv; -+ -+ if (pmppriv->mode != MP_ON) -+ return -EPERM; -+ -+ if (rtw_mp_cmd(padapter, MP_STOP, RTW_CMDF_WAIT_ACK) != _SUCCESS) -+ ret = -EPERM; -+ -+ pmppriv->bprocess_mp_mode = _FALSE; -+ _rtw_memset(extra, 0, wrqu->length); -+ sprintf(extra, "mp_stop %s\n", ret == 0 ? "ok" : "fail"); -+ wrqu->length = strlen(extra); -+ -+ return ret; -+} -+ -+ -+int rtw_mp_rate(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u32 rate = MPT_RATE_1M; -+ u8 err = 0; -+ u8 input[RTW_IWD_MAX_LEN]; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ struct mp_priv *pmppriv = &padapter->mppriv; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, (wrqu->length + 1))) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ input[wrqu->length] = '\0'; -+ rate = rtw_mpRateParseFunc(padapter, input); -+ pmppriv->rateidx = rate; -+ -+ if (rate == 0 && strcmp(input, "1M") != 0) { -+ rate = rtw_atoi(input); -+ if (rate <= MGN_VHT4SS_MCS9) -+ pmppriv->rateidx = MRateToHwRate(rate); -+ /*if (rate <= 0x7f) -+ rate = wifirate2_ratetbl_inx((u8)rate); -+ else if (rate < 0xC8) -+ rate = (rate - 0x79 + MPT_RATE_MCS0); -+ HT rate 0x80(MCS0) ~ 0x8F(MCS15) ~ 0x9F(MCS31) 128~159 -+ VHT1SS~2SS rate 0xA0 (VHT1SS_MCS0 44) ~ 0xB3 (VHT2SS_MCS9 #63) 160~179 -+ VHT rate 0xB4 (VHT3SS_MCS0 64) ~ 0xC7 (VHT2SS_MCS9 #83) 180~199 -+ else -+ VHT rate 0x90(VHT1SS_MCS0) ~ 0x99(VHT1SS_MCS9) 144~153 -+ rate =(rate - MPT_RATE_VHT1SS_MCS0); -+ */ -+ } -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ -+ if (pmppriv->rateidx > DESC_RATEVHTSS4MCS9) { -+ sprintf(extra, "Set %s Error" , input); -+ return -EINVAL; -+ } -+ -+ if (hal_spec->tx_nss_num < 2 && MPT_IS_2SS_RATE(HwRateToMPTRate(pmppriv->rateidx))) -+ err = 1; -+ if (hal_spec->tx_nss_num < 3 && MPT_IS_3SS_RATE(HwRateToMPTRate(pmppriv->rateidx))) -+ err = 1; -+ if (hal_spec->tx_nss_num < 4 && MPT_IS_4SS_RATE(HwRateToMPTRate(pmppriv->rateidx))) -+ err = 1; -+ if (!is_supported_vht(padapter->registrypriv.wireless_mode) && MPT_IS_VHT_RATE(HwRateToMPTRate(pmppriv->rateidx))) -+ err = 1; -+ if (!is_supported_ht(padapter->registrypriv.wireless_mode) && MPT_IS_HT_RATE(HwRateToMPTRate(pmppriv->rateidx))) -+ err = 1; -+ -+ if (err == 1) { -+ sprintf(extra, "Set data rate to %s Error" , input); -+ pmppriv->rateidx = 0; -+ } else { -+ sprintf(extra, "Set data rate to %s index %d" , input, pmppriv->rateidx); -+ RTW_INFO("%s: %s rate index=%d\n", __func__, input, pmppriv->rateidx); -+ pMptCtx->mpt_rate_index = HwRateToMPTRate(pmppriv->rateidx); -+ SetDataRate(padapter); -+ } -+ wrqu->length = strlen(extra); -+ return err; -+} -+ -+int rtw_mp_channel(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ u8 input[RTW_IWD_MAX_LEN]; -+ u8 channel = 1; -+ struct mp_priv *pmppriv = &padapter->mppriv; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, (wrqu->length + 1))) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ input[wrqu->length] = '\0'; -+ channel = rtw_atoi(input); -+ /*RTW_INFO("%s: channel=%d\n", __func__, channel);*/ -+ _rtw_memset(extra, 0, wrqu->length); -+ sprintf(extra, "Change channel %d to channel %d", padapter->mppriv.channel , channel); -+ padapter->mppriv.channel = channel; -+ rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); -+ rtw_adjust_chbw(padapter, channel, &pmppriv->bandwidth, &pmppriv->prime_channel_offset); -+ SetChannel(padapter); -+ pHalData->current_channel = channel; -+ -+ wrqu->length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_mp_ch_offset(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ u8 input[RTW_IWD_MAX_LEN]; -+ u32 ch_offset = 0; -+ char *pch; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, (wrqu->length + 1))) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ input[wrqu->length] = '\0'; -+ ch_offset = rtw_atoi(input); -+ /*RTW_INFO("%s: channel=%d\n", __func__, channel);*/ -+ _rtw_memset(extra, 0, wrqu->length); -+ pch = extra; -+ pch += sprintf(pch, "Change prime channel offset %d to %d", padapter->mppriv.prime_channel_offset , ch_offset); -+ padapter->mppriv.prime_channel_offset = ch_offset; -+ SetChannel(padapter); -+ -+ wrqu->length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_mp_bandwidth(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u8 bandwidth = 0, sg = 0; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct mp_priv *pmppriv = &padapter->mppriv; -+ u8 input[RTW_IWD_MAX_LEN]; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ if (sscanf(input, "40M=%hhd,shortGI=%hhd", &bandwidth, &sg) > 0) -+ RTW_INFO("%s: bw=%hhd sg=%hhd\n", __func__, bandwidth , sg); -+ -+ rtw_adjust_chbw(padapter, pmppriv->channel, &bandwidth, &pmppriv->prime_channel_offset); -+ -+ padapter->mppriv.bandwidth = (u8)bandwidth; -+ padapter->mppriv.preamble = sg; -+ _rtw_memset(extra, 0, wrqu->length); -+ sprintf(extra, "Change BW %d to BW %d\n", pHalData->current_channel_bw , bandwidth); -+ rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); -+ SetBandwidth(padapter); -+ pHalData->current_channel_bw = bandwidth; -+ -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+ -+int rtw_mp_txpower_index(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *phal_data = GET_HAL_DATA(padapter); -+ char input[RTW_IWD_MAX_LEN]; -+ u32 rfpath = 0 ; -+ u32 txpower_inx = 0, tarpowerdbm = 0; -+ char *pextra = extra; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, (wrqu->length + 1))) -+ return -EFAULT; -+ -+ if (wrqu->length > 128) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ input[wrqu->length] = '\0'; -+ _rtw_memset(extra, 0, strlen(extra)); -+ -+ if (wrqu->length == 2) { -+ if (input[0] != '\0' ) { -+ rfpath = rtw_atoi(input); -+ txpower_inx = mpt_ProQueryCalTxPower(padapter, rfpath); -+ } -+ pextra += sprintf(pextra, " %d\n", txpower_inx); -+ tarpowerdbm = mpt_get_tx_power_finalabs_val(padapter, rfpath); -+ if (tarpowerdbm > 0) -+ pextra += sprintf(pextra, "\t\t dBm:%d", tarpowerdbm); -+ } else { -+ if (phal_data->ant_path == 1) -+ rfpath = 1; -+ else -+ rfpath = 0; -+ -+ txpower_inx = mpt_ProQueryCalTxPower(padapter, rfpath); -+ pextra += sprintf(pextra, "patha=%d", txpower_inx); -+ if (phal_data->rf_type > RF_1T2R) { -+ txpower_inx = mpt_ProQueryCalTxPower(padapter, 1); -+ pextra += sprintf(pextra, ",pathb=%d", txpower_inx); -+ } -+ if (phal_data->rf_type > RF_2T4R) { -+ txpower_inx = mpt_ProQueryCalTxPower(padapter, 2); -+ pextra += sprintf(pextra, ",pathc=%d", txpower_inx); -+ } -+ if (phal_data->rf_type > RF_3T4R) { -+ txpower_inx = mpt_ProQueryCalTxPower(padapter, 3); -+ pextra += sprintf(pextra, ",pathd=%d", txpower_inx); -+ } -+ -+ tarpowerdbm = mpt_get_tx_power_finalabs_val(padapter, rfpath); -+ pextra += sprintf(pextra, "\n\t\t\tpatha dBm=%d", tarpowerdbm); -+ if (phal_data->rf_type > RF_1T2R) { -+ tarpowerdbm = mpt_get_tx_power_finalabs_val(padapter, 1); -+ pextra += sprintf(pextra, ",pathb dBm=%d", tarpowerdbm); -+ } -+ if (phal_data->rf_type > RF_2T4R) { -+ tarpowerdbm = mpt_get_tx_power_finalabs_val(padapter, 2); -+ pextra += sprintf(pextra, ",pathc dBm=%d", tarpowerdbm); -+ } -+ if (phal_data->rf_type > RF_3T4R) { -+ tarpowerdbm = mpt_get_tx_power_finalabs_val(padapter, 3); -+ pextra += sprintf(pextra, ",pathd dBm=%d", tarpowerdbm); -+ } -+ } -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+ -+int rtw_mp_txpower(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u32 idx_a = 0, idx_b = 0, idx_c = 0, idx_d = 0; -+ int MsetPower = 1; -+ u8 input[RTW_IWD_MAX_LEN]; -+ u8 res = 0; -+ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ MsetPower = strncmp(input, "off", 3); -+ if (MsetPower == 0) { -+ padapter->mppriv.bSetTxPower = 0; -+ sprintf(extra, "MP Set power off"); -+ } else { -+ res = sscanf(input, "patha=%d,pathb=%d,pathc=%d,pathd=%d", &idx_a, &idx_b, &idx_c, &idx_d); -+ if (res < 1) { -+ if(isdigit(input[0])){ -+ idx_a = rtw_atoi(input); -+ RTW_INFO("direct set RF Path A Power =%d\n", idx_a); -+ } else -+ RTW_INFO("Invalid format on %s !, Get patha=%d,pathb=%d,pathc=%d,pathd=%d\n", input , idx_a , idx_b , idx_c , idx_d); -+ } -+ if (res > 0 || idx_a !=0) -+ sprintf(extra, "Set power level path_A:%d path_B:%d path_C:%d path_D:%d", idx_a , idx_b , idx_c , idx_d); -+ else -+ sprintf(extra, "Invalid format on string :%s ", input); -+ -+ padapter->mppriv.txpoweridx = (u8)idx_a; -+ -+ pMptCtx->TxPwrLevel[RF_PATH_A] = (u8)idx_a; -+ pMptCtx->TxPwrLevel[RF_PATH_B] = (u8)idx_b; -+ pMptCtx->TxPwrLevel[RF_PATH_C] = (u8)idx_c; -+ pMptCtx->TxPwrLevel[RF_PATH_D] = (u8)idx_d; -+ padapter->mppriv.bSetTxPower = 1; -+ -+ SetTxPower(padapter); -+ } -+ -+ wrqu->length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_mp_ant_tx(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u8 i; -+ u8 input[RTW_IWD_MAX_LEN]; -+ u16 antenna = 0; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, (wrqu->length + 1))) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ input[wrqu->length] = '\0'; -+ sprintf(extra, "switch Tx antenna to %s", input); -+ -+ for (i = 0; i < strlen(input); i++) { -+ switch (input[i]) { -+ case 'a': -+ antenna |= ANTENNA_A; -+ break; -+ case 'b': -+ antenna |= ANTENNA_B; -+ break; -+ case 'c': -+ antenna |= ANTENNA_C; -+ break; -+ case 'd': -+ antenna |= ANTENNA_D; -+ break; -+ } -+ } -+ /*antenna |= BIT(extra[i]-'a');*/ -+ RTW_INFO("%s: antenna=0x%x\n", __func__, antenna); -+ padapter->mppriv.antenna_tx = antenna; -+ -+ /*RTW_INFO("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_tx);*/ -+ pHalData->antenna_tx_path = antenna; -+ if (IS_HARDWARE_TYPE_8822C(padapter) && padapter->mppriv.antenna_tx == ANTENNA_B) { -+ if (padapter->mppriv.antenna_rx == ANTENNA_A || padapter->mppriv.antenna_rx == ANTENNA_B) { -+ padapter->mppriv.antenna_rx = ANTENNA_AB; -+ pHalData->AntennaRxPath = ANTENNA_AB; -+ RTW_INFO("%s:8822C Tx-B Rx Ant to AB\n", __func__); -+ } -+ } -+ SetAntenna(padapter); -+ -+ wrqu->length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_mp_ant_rx(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u8 i; -+ u16 antenna = 0; -+ u8 input[RTW_IWD_MAX_LEN]; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, (wrqu->length + 1))) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ input[wrqu->length] = '\0'; -+ /*RTW_INFO("%s: input=%s\n", __func__, input);*/ -+ _rtw_memset(extra, 0, wrqu->length); -+ -+ sprintf(extra, "switch Rx antenna to %s", input); -+ -+ for (i = 0; i < strlen(input); i++) { -+ switch (input[i]) { -+ case 'a': -+ antenna |= ANTENNA_A; -+ break; -+ case 'b': -+ antenna |= ANTENNA_B; -+ break; -+ case 'c': -+ antenna |= ANTENNA_C; -+ break; -+ case 'd': -+ antenna |= ANTENNA_D; -+ break; -+ } -+ } -+ -+ RTW_INFO("%s: antenna=0x%x\n", __func__, antenna); -+ -+ padapter->mppriv.antenna_rx = antenna; -+ pHalData->AntennaRxPath = antenna; -+ /*RTW_INFO("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_rx);*/ -+ SetAntenna(padapter); -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+ -+int rtw_set_ctx_destAddr(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ int jj, kk = 0; -+ -+ struct pkt_attrib *pattrib; -+ struct mp_priv *pmp_priv; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ pmp_priv = &padapter->mppriv; -+ pattrib = &pmp_priv->tx.attrib; -+ -+ if (strlen(extra) < 5) -+ return _FAIL; -+ -+ RTW_INFO("%s: in=%s\n", __func__, extra); -+ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) -+ pattrib->dst[jj] = key_2char2num(extra[kk], extra[kk + 1]); -+ -+ RTW_INFO("pattrib->dst:%x %x %x %x %x %x\n", pattrib->dst[0], pattrib->dst[1], pattrib->dst[2], pattrib->dst[3], pattrib->dst[4], pattrib->dst[5]); -+ return 0; -+} -+ -+ -+ -+int rtw_mp_ctx(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u32 pkTx = 1; -+ int countPkTx = 1, cotuTx = 1, CarrSprTx = 1, scTx = 1, sgleTx = 1, stop = 1, payload = 1; -+ u32 bStartTest = 1; -+ u32 count = 0, pktinterval = 0, pktlen = 0; -+ u8 status; -+ struct mp_priv *pmp_priv; -+ struct pkt_attrib *pattrib; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ pmp_priv = &padapter->mppriv; -+ pattrib = &pmp_priv->tx.attrib; -+ -+ if (padapter->registrypriv.mp_mode != 1 ) { -+ sprintf(extra, "Error: can't tx ,not in MP mode. \n"); -+ wrqu->length = strlen(extra); -+ return 0; -+ } -+ -+ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ *(extra + wrqu->length) = '\0'; -+ RTW_INFO("%s: in=%s\n", __func__, extra); -+#ifdef CONFIG_CONCURRENT_MODE -+ if (!is_primary_adapter(padapter)) { -+ sprintf(extra, "Error: MP mode can't support Virtual Adapter, Please to use main Adapter.\n"); -+ wrqu->length = strlen(extra); -+ return 0; -+ } -+#endif -+ countPkTx = strncmp(extra, "count=", 5); /* strncmp TRUE is 0*/ -+ cotuTx = strncmp(extra, "background", 20); -+ CarrSprTx = strncmp(extra, "background,cs", 20); -+ scTx = strncmp(extra, "background,sc", 20); -+ sgleTx = strncmp(extra, "background,stone", 20); -+ pkTx = strncmp(extra, "background,pkt", 20); -+ stop = strncmp(extra, "stop", 4); -+ payload = strncmp(extra, "payload=", 8); -+ -+ if (sscanf(extra, "count=%d,pkt", &count) > 0) -+ RTW_INFO("count= %d\n", count); -+ if (sscanf(extra, "pktinterval=%d", &pktinterval) > 0) -+ RTW_INFO("pktinterval= %d\n", pktinterval); -+ if (sscanf(extra, "pktlen=%d", &pktlen) > 0) -+ RTW_INFO("pktlen= %d\n", pktlen); -+ -+ if (payload == 0) { -+ payload = MP_TX_Payload_default_random; -+ if (strncmp(extra, "payload=prbs9", 14) == 0) { -+ payload = MP_TX_Payload_prbs9; -+ sprintf(extra, "config payload PRBS9\n"); -+ } else { -+ if (sscanf(extra, "payload=%x", &payload) > 0){ -+ RTW_INFO("payload= %x\n", payload); -+ sprintf(extra, "config payload setting = %x\n" -+ "1. input payload=[]:\n " -+ "[0]: 00, [1]: A5, [2]: 5A, [3]: FF, [4]: PRBS-9, [5]: Random\n" -+ "2. specified a hex payload: payload=0xee\n", payload); -+ } -+ } -+ pmp_priv->tx.payload = payload; -+ wrqu->length = strlen(extra); -+ return 0; -+ } -+ -+ if (_rtw_memcmp(extra, "destmac=", 8)) { -+ wrqu->length -= 8; -+ rtw_set_ctx_destAddr(dev, info, wrqu, &extra[8]); -+ sprintf(extra, "Set dest mac OK !\n"); -+ return 0; -+ } -+ /*RTW_INFO("%s: count=%d countPkTx=%d cotuTx=%d CarrSprTx=%d scTx=%d sgleTx=%d pkTx=%d stop=%d\n", __func__, count, countPkTx, cotuTx, CarrSprTx, pkTx, sgleTx, scTx, stop);*/ -+ _rtw_memset(extra, '\0', strlen(extra)); -+ -+ if (pktinterval != 0) { -+ sprintf(extra, "Pkt Interval = %d", pktinterval); -+ padapter->mppriv.pktInterval = pktinterval; -+ wrqu->length = strlen(extra); -+ return 0; -+ -+ } else if (pktlen != 0) { -+ sprintf(extra, "Pkt len = %d", pktlen); -+ pattrib->pktlen = pktlen; -+ wrqu->length = strlen(extra); -+ return 0; -+ -+ } else if (stop == 0) { -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ _queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue; -+ _queue *pfree_xmit_queue = &pxmitpriv->free_xmit_queue; -+ -+ u32 i = 0; -+ bStartTest = 0; /* To set Stop*/ -+ pmp_priv->tx.stop = 1; -+ sprintf(extra, "Stop continuous Tx"); -+ odm_write_dig(&pHalData->odmpriv, 0x20); -+ do { -+ if (pxmitpriv->free_xmitframe_cnt == NR_XMITFRAME && pxmitpriv->free_xmitbuf_cnt == NR_XMITBUFF) -+ break; -+ else { -+ i++; -+ RTW_INFO("%s:wait queue_empty %d!!\n", __func__, i); -+ rtw_msleep_os(10); -+ } -+ } while (i < 1000); -+ } else { -+ bStartTest = 1; -+ odm_write_dig(&pHalData->odmpriv, 0x3f); -+ if (IS_HARDWARE_TYPE_8822C(padapter) && pmp_priv->antenna_tx == ANTENNA_B) { -+ if (pmp_priv->antenna_rx == ANTENNA_A || pmp_priv->antenna_rx == ANTENNA_B) { -+ pmp_priv->antenna_rx = ANTENNA_AB; -+ pHalData->AntennaRxPath = ANTENNA_AB; -+ RTW_INFO("%s:8822C Tx-B Rx Ant to AB\n", __func__); -+ SetAntenna(padapter); -+ } -+ } -+ if (pmp_priv->mode != MP_ON) { -+ if (pmp_priv->tx.stop != 1) { -+ RTW_INFO("%s:Error MP_MODE %d != ON\n", __func__, pmp_priv->mode); -+ return -EFAULT; -+ } -+ } -+ } -+ -+ pmp_priv->tx.count = count; -+ -+ if (pkTx == 0 || countPkTx == 0) -+ pmp_priv->mode = MP_PACKET_TX; -+ if (sgleTx == 0) -+ pmp_priv->mode = MP_SINGLE_TONE_TX; -+ if (cotuTx == 0) -+ pmp_priv->mode = MP_CONTINUOUS_TX; -+ if (CarrSprTx == 0) -+ pmp_priv->mode = MP_CARRIER_SUPPRISSION_TX; -+ if (scTx == 0) -+ pmp_priv->mode = MP_SINGLE_CARRIER_TX; -+ -+ status = rtw_mp_pretx_proc(padapter, bStartTest, extra); -+ -+ if (stop == 0) -+ pmp_priv->mode = MP_ON; -+ -+ wrqu->length = strlen(extra); -+ return status; -+} -+ -+ -+ -+int rtw_mp_disable_bt_coexist(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+#ifdef CONFIG_BT_COEXIST -+ PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); -+ -+#endif -+ u8 input[RTW_IWD_MAX_LEN]; -+ u32 bt_coexist; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, (wrqu->data.length + 1))) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ -+ if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ input[wrqu->data.length] = '\0'; -+ -+ bt_coexist = rtw_atoi(input); -+ -+ if (bt_coexist == 0) { -+ RTW_INFO("Set OID_RT_SET_DISABLE_BT_COEXIST: disable BT_COEXIST\n"); -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_HaltNotify(padapter); -+ rtw_btcoex_SetManualControl(padapter, _TRUE); -+ /* Force to switch Antenna to WiFi*/ -+ rtw_write16(padapter, 0x870, 0x300); -+ rtw_write16(padapter, 0x860, 0x110); -+#endif -+ /* CONFIG_BT_COEXIST */ -+ } else { -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_SetManualControl(padapter, _FALSE); -+#endif -+ } -+ -+ return 0; -+} -+ -+ -+int rtw_mp_arx(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ int bStartRx = 0, bStopRx = 0, bQueryPhy = 0, bQueryMac = 0, bSetBssid = 0, bSetRxframe = 0; -+ int bmac_filter = 0, bmon = 0, bSmpCfg = 0; -+ u8 input[RTW_IWD_MAX_LEN]; -+ char *pch, *token, *tmp[2] = {0x00, 0x00}; -+ u32 i = 0, jj = 0, kk = 0, cnts = 0, ret; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct mp_priv *pmppriv = &padapter->mppriv; -+ struct dbg_rx_counter rx_counter; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ RTW_INFO("%s: %s\n", __func__, input); -+#ifdef CONFIG_CONCURRENT_MODE -+ if (!is_primary_adapter(padapter)) { -+ sprintf(extra, "Error: MP mode can't support Virtual Adapter, Please to use main Adapter.\n"); -+ wrqu->length = strlen(extra); -+ return 0; -+ } -+#endif -+ bStartRx = (strncmp(input, "start", 5) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ -+ bStopRx = (strncmp(input, "stop", 5) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ -+ bQueryPhy = (strncmp(input, "phy", 3) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ -+ bQueryMac = (strncmp(input, "mac", 3) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ -+ bSetBssid = (strncmp(input, "setbssid=", 8) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ -+ bSetRxframe = (strncmp(input, "frametype", 9) == 0) ? 1 : 0; -+ /*bfilter_init = (strncmp(input, "filter_init",11)==0)?1:0;*/ -+ bmac_filter = (strncmp(input, "accept_mac", 10) == 0) ? 1 : 0; -+ bmon = (strncmp(input, "mon=", 4) == 0) ? 1 : 0; -+ bSmpCfg = (strncmp(input , "smpcfg=" , 7) == 0) ? 1 : 0; -+ pmppriv->bloopback = (strncmp(input, "loopbk", 6) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ -+ -+ if (bSetBssid == 1) { -+ pch = input; -+ while ((token = strsep(&pch, "=")) != NULL) { -+ if (i > 1) -+ break; -+ tmp[i] = token; -+ i++; -+ } -+ if ((tmp[0] != NULL) && (tmp[1] != NULL)) { -+ cnts = strlen(tmp[1]) / 2; -+ if (cnts < 1) -+ return -EFAULT; -+ RTW_INFO("%s: cnts=%d\n", __func__, cnts); -+ RTW_INFO("%s: data=%s\n", __func__, tmp[1]); -+ for (jj = 0, kk = 0; jj < cnts ; jj++, kk += 2) { -+ pmppriv->network_macaddr[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); -+ RTW_INFO("network_macaddr[%d]=%x\n", jj, pmppriv->network_macaddr[jj]); -+ } -+ } else -+ return -EFAULT; -+ -+ pmppriv->bSetRxBssid = _TRUE; -+ } -+ if (bSetRxframe) { -+ if (strncmp(input, "frametype beacon", 16) == 0) -+ pmppriv->brx_filter_beacon = _TRUE; -+ else -+ pmppriv->brx_filter_beacon = _FALSE; -+ } -+ -+ if (bmac_filter) { -+ pmppriv->bmac_filter = bmac_filter; -+ pch = input; -+ while ((token = strsep(&pch, "=")) != NULL) { -+ if (i > 1) -+ break; -+ tmp[i] = token; -+ i++; -+ } -+ if ((tmp[0] != NULL) && (tmp[1] != NULL)) { -+ cnts = strlen(tmp[1]) / 2; -+ if (cnts < 1) -+ return -EFAULT; -+ RTW_INFO("%s: cnts=%d\n", __func__, cnts); -+ RTW_INFO("%s: data=%s\n", __func__, tmp[1]); -+ for (jj = 0, kk = 0; jj < cnts ; jj++, kk += 2) { -+ pmppriv->mac_filter[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); -+ RTW_INFO("%s mac_filter[%d]=%x\n", __func__, jj, pmppriv->mac_filter[jj]); -+ } -+ } else -+ return -EFAULT; -+ -+ } -+ -+ if (bStartRx) { -+ sprintf(extra, "start"); -+ SetPacketRx(padapter, bStartRx, _FALSE); -+ } else if (bStopRx) { -+ SetPacketRx(padapter, bStartRx, _FALSE); -+ pmppriv->bmac_filter = _FALSE; -+ pmppriv->bSetRxBssid = _FALSE; -+ sprintf(extra, "Received packet OK:%d CRC error:%d ,Filter out:%d", padapter->mppriv.rx_pktcount, padapter->mppriv.rx_crcerrpktcount, padapter->mppriv.rx_pktcount_filter_out); -+ } else if (bQueryPhy) { -+ _rtw_memset(&rx_counter, 0, sizeof(struct dbg_rx_counter)); -+ rtw_dump_phy_rx_counters(padapter, &rx_counter); -+ -+ RTW_INFO("%s: OFDM_FA =%d\n", __func__, rx_counter.rx_ofdm_fa); -+ RTW_INFO("%s: CCK_FA =%d\n", __func__, rx_counter.rx_cck_fa); -+ sprintf(extra, "Phy Received packet OK:%d CRC error:%d FA Counter: %d", rx_counter.rx_pkt_ok, rx_counter.rx_pkt_crc_error, rx_counter.rx_cck_fa + rx_counter.rx_ofdm_fa); -+ -+ -+ } else if (bQueryMac) { -+ _rtw_memset(&rx_counter, 0, sizeof(struct dbg_rx_counter)); -+ rtw_dump_mac_rx_counters(padapter, &rx_counter); -+ sprintf(extra, "Mac Received packet OK: %d , CRC error: %d , Drop Packets: %d\n", -+ rx_counter.rx_pkt_ok, rx_counter.rx_pkt_crc_error, rx_counter.rx_pkt_drop); -+ -+ } -+ -+ if (bmon == 1) { -+ ret = sscanf(input, "mon=%d", &bmon); -+ -+ if (bmon == 1) { -+ pmppriv->rx_bindicatePkt = _TRUE; -+ sprintf(extra, "Indicating Receive Packet to network start\n"); -+ } else { -+ pmppriv->rx_bindicatePkt = _FALSE; -+ sprintf(extra, "Indicating Receive Packet to network Stop\n"); -+ } -+ } -+ if (bSmpCfg == 1) { -+ ret = sscanf(input, "smpcfg=%d", &bSmpCfg); -+ -+ if (bSmpCfg == 1) { -+ pmppriv->bRTWSmbCfg = _TRUE; -+ sprintf(extra , "Indicate By Simple Config Format\n"); -+ SetPacketRx(padapter, _TRUE, _TRUE); -+ } else { -+ pmppriv->bRTWSmbCfg = _FALSE; -+ sprintf(extra , "Indicate By Normal Format\n"); -+ SetPacketRx(padapter, _TRUE, _FALSE); -+ } -+ } -+ -+ if (pmppriv->bloopback == _TRUE) { -+ sprintf(extra , "Enter MAC LoopBack mode\n"); -+#if defined(CONFIG_RTL8814B) -+ /* 1. No adhoc, 2. Enable short cut */ -+ rtw_write32(padapter, 0x100, 0x0B000EFF); -+#else -+ rtw_write32(padapter, 0x100, 0x0B0106FF); -+#endif -+ RTW_INFO("0x100 :0x%x", rtw_read32(padapter, 0x100)); -+ rtw_write16(padapter, 0x608, 0x30c); -+ RTW_INFO("0x608 :0x%x", rtw_read32(padapter, 0x608)); -+ } -+ -+ wrqu->length = strlen(extra) + 1; -+ -+ return 0; -+} -+ -+ -+int rtw_mp_trx_query(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u32 txok, txfail, rxok, rxfail, rxfilterout; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); -+ RT_PMAC_TX_INFO PMacTxInfo = pMptCtx->PMacTxInfo; -+ -+ if (PMacTxInfo.bEnPMacTx == TRUE) -+ txok = hal_mpt_query_phytxok(padapter); -+ else -+ txok = padapter->mppriv.tx.sended; -+ -+ txfail = 0; -+ rxok = padapter->mppriv.rx_pktcount; -+ rxfail = padapter->mppriv.rx_crcerrpktcount; -+ rxfilterout = padapter->mppriv.rx_pktcount_filter_out; -+ -+ _rtw_memset(extra, '\0', 128); -+ -+ sprintf(extra, "Tx OK:%d, Tx Fail:%d, Rx OK:%d, CRC error:%d ,Rx Filter out:%d\n", txok, txfail, rxok, rxfail, rxfilterout); -+ -+ wrqu->length = strlen(extra) + 1; -+ -+ return 0; -+} -+ -+ -+int rtw_mp_pwrtrk(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u8 enable; -+ u32 thermal; -+ s32 ret; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ u8 input[RTW_IWD_MAX_LEN]; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ -+ enable = 1; -+ if (wrqu->length > 1) { -+ /* not empty string*/ -+ if (strncmp(input, "stop", 4) == 0) { -+ enable = 0; -+ sprintf(extra, "mp tx power tracking stop"); -+ } else if (sscanf(input, "ther=%d", &thermal) == 1) { -+ ret = SetThermalMeter(padapter, (u8)thermal); -+ if (ret == _FAIL) -+ return -EPERM; -+ sprintf(extra, "mp tx power tracking start,target value=%d ok", thermal); -+ } else -+ return -EINVAL; -+ } -+ -+ ret = SetPowerTracking(padapter, enable); -+ if (ret == _FAIL) -+ return -EPERM; -+ -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+ -+ -+int rtw_mp_psd(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ u8 input[RTW_IWD_MAX_LEN]; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, (wrqu->length + 1))) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ input[wrqu->length] = '\0'; -+ strcpy(extra, input); -+ -+ wrqu->length = mp_query_psd(padapter, extra); -+ -+ return 0; -+} -+ -+ -+int rtw_mp_thermal(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u8 val[4] = {0}; -+ u8 ret = 0; -+ u16 ther_path_addr[4] = {0}; -+ u16 cnt = 1; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ int rfpath = RF_PATH_A; -+ -+#ifdef CONFIG_RTL8188E -+ ther_path_addr[0] = EEPROM_THERMAL_METER_88E; -+#endif -+#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8812; -+#endif -+#ifdef CONFIG_RTL8192E -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8192E; -+#endif -+#ifdef CONFIG_RTL8192F -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8192F; -+#endif -+#ifdef CONFIG_RTL8723B -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8723B; -+#endif -+#ifdef CONFIG_RTL8703B -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8703B; -+#endif -+#ifdef CONFIG_RTL8723D -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8723D; -+#endif -+#ifdef CONFIG_RTL8188F -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8188F; -+#endif -+#ifdef CONFIG_RTL8188GTV -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8188GTV; -+#endif -+#ifdef CONFIG_RTL8822B -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8822B; -+#endif -+#ifdef CONFIG_RTL8821C -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8821C; -+#endif -+#ifdef CONFIG_RTL8710B -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8710B; -+#endif -+#ifdef CONFIG_RTL8822C -+ ther_path_addr[0] = EEPROM_THERMAL_METER_A_8822C; -+ ther_path_addr[1] = EEPROM_THERMAL_METER_B_8822C; -+#endif -+#ifdef CONFIG_RTL8814B -+ ther_path_addr[0] = EEPROM_THERMAL_METER_A_8814B; -+ ther_path_addr[1] = EEPROM_THERMAL_METER_B_8814B; -+ ther_path_addr[2] = EEPROM_THERMAL_METER_C_8814B; -+ ther_path_addr[3] = EEPROM_THERMAL_METER_D_8814B; -+#endif -+#ifdef CONFIG_RTL8723F -+ ther_path_addr[0] = EEPROM_THERMAL_METER_8723F; -+#endif -+ -+ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ if ((strncmp(extra, "write", 6) == 0)) { -+ int i; -+ u16 raw_cursize = 0, raw_maxsize = 0; -+#ifdef RTW_HALMAC -+ raw_maxsize = efuse_GetavailableSize(padapter); -+#else -+ efuse_GetCurrentSize(padapter, &raw_cursize); -+ raw_maxsize = efuse_GetMaxSize(padapter); -+#endif -+ RTW_INFO("[eFuse available raw size]= %d bytes\n", raw_maxsize - raw_cursize); -+ if (2 > raw_maxsize - raw_cursize) { -+ RTW_INFO("no available efuse!\n"); -+ return -EFAULT; -+ } -+ -+ for (i = 0; i < hal_spec->rf_reg_path_num; i++) { -+ GetThermalMeter(padapter, i , &val[i]); -+ if (ther_path_addr[i] != 0 && val[i] != 0) { -+ if (rtw_efuse_map_write(padapter, ther_path_addr[i], cnt, &val[i]) == _FAIL) { -+ RTW_INFO("Error efuse write thermal addr 0x%x ,val = 0x%x\n", ther_path_addr[i], val[i]); -+ return -EFAULT; -+ } -+ } else { -+ RTW_INFO("Error efuse write thermal Null addr,val \n"); -+ return -EFAULT; -+ } -+ } -+ _rtw_memset(extra, 0, wrqu->length); -+ sprintf(extra, " efuse write ok :%d", val[0]); -+ } else { -+ ret = sscanf(extra, "%d", &rfpath); -+ if (ret < 1) { -+ rfpath = RF_PATH_A; -+ RTW_INFO("default thermal of path(%d)\n", rfpath); -+ } -+ if (rfpath >= hal_spec->rf_reg_path_num) -+ return -EINVAL; -+ -+ RTW_INFO("read thermal of path(%d)\n", rfpath); -+ GetThermalMeter(padapter, rfpath, &val[0]); -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ sprintf(extra, "%d", val[0]); -+ } -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+ -+ -+int rtw_mp_reset_stats(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ struct mp_priv *pmp_priv; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ pmp_priv = &padapter->mppriv; -+ -+ pmp_priv->tx.sended = 0; -+ pmp_priv->tx_pktcount = 0; -+ pmp_priv->rx_pktcount = 0; -+ pmp_priv->rx_pktcount_filter_out = 0; -+ pmp_priv->rx_crcerrpktcount = 0; -+ -+ rtw_reset_phy_rx_counters(padapter); -+ rtw_reset_mac_rx_counters(padapter); -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ sprintf(extra, "mp_reset_stats ok\n"); -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+ -+int rtw_mp_dump(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ struct mp_priv *pmp_priv; -+ u8 input[RTW_IWD_MAX_LEN]; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ pmp_priv = &padapter->mppriv; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ if (strncmp(input, "all", 4) == 0) { -+ mac_reg_dump(RTW_DBGDUMP, padapter); -+ bb_reg_dump(RTW_DBGDUMP, padapter); -+ rf_reg_dump(RTW_DBGDUMP, padapter); -+ } -+ return 0; -+} -+ -+ -+int rtw_mp_phypara(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ char input[RTW_IWD_MAX_LEN]; -+ u32 invalxcap = 0, ret = 0, bwrite_xcap = 0, hwxtaladdr = 0; -+ u16 pgval; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ RTW_INFO("%s:priv in=%s\n", __func__, input); -+ bwrite_xcap = (strncmp(input, "write_xcap=", 11) == 0) ? 1 : 0; -+ -+ if (bwrite_xcap == 1) { -+ ret = sscanf(input, "write_xcap=%d", &invalxcap); -+ invalxcap = invalxcap & 0x7f; /* xtal bit 0 ~6 */ -+ RTW_INFO("get crystal_cap %d\n", invalxcap); -+ -+ if (IS_HARDWARE_TYPE_8822C(padapter) && ret == 1) { -+ hwxtaladdr = 0x110; -+ pgval = invalxcap | 0x80; /* reserved default bit7 on */ -+ pgval = pgval | pgval << 8; /* xtal xi/xo efuse 0x110 0x111 */ -+ -+ RTW_INFO("Get crystal_cap 0x%x\n", pgval); -+ if (rtw_efuse_map_write(padapter, hwxtaladdr, 2, (u8*)&pgval) == _FAIL) { -+ RTW_INFO("%s: rtw_efuse_map_write xcap error!!\n", __func__); -+ sprintf(extra, "write xcap pgdata fail"); -+ ret = -EFAULT; -+ } else -+ sprintf(extra, "write xcap pgdata ok"); -+ -+ } -+ } else { -+ ret = sscanf(input, "xcap=%d", &invalxcap); -+ -+ if (ret == 1) { -+ pHalData->crystal_cap = (u8)invalxcap; -+ RTW_INFO("%s:crystal_cap=%d\n", __func__, pHalData->crystal_cap); -+ -+ if (rtw_phydm_set_crystal_cap(padapter, pHalData->crystal_cap) == _FALSE) { -+ RTW_ERR("set crystal_cap failed\n"); -+ rtw_warn_on(1); -+ } -+ sprintf(extra, "Set xcap=%d", invalxcap); -+ } -+ } -+ -+ wrqu->length = strlen(extra) + 1; -+ return ret; -+} -+ -+ -+int rtw_mp_SetRFPath(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ char input[RTW_IWD_MAX_LEN]; -+ int bMain = 1, bTurnoff = 1; -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ u8 ret = _TRUE; -+#endif -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ RTW_INFO("%s:iwpriv in=%s\n", __func__, input); -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ bMain = strncmp(input, "1", 2); /* strncmp TRUE is 0*/ -+ bTurnoff = strncmp(input, "0", 3); /* strncmp TRUE is 0*/ -+ -+ _rtw_memset(extra, 0, wrqu->length); -+#ifdef CONFIG_ANTENNA_DIVERSITY -+ if (bMain == 0) -+ ret = rtw_mp_set_antdiv(padapter, _TRUE); -+ else -+ ret = rtw_mp_set_antdiv(padapter, _FALSE); -+ if (ret == _FALSE) -+ RTW_INFO("%s:ANTENNA_DIVERSITY FAIL\n", __func__); -+#endif -+ -+ if (bMain == 0) { -+ MP_PHY_SetRFPathSwitch(padapter, _TRUE); -+ RTW_INFO("%s:PHY_SetRFPathSwitch=TRUE\n", __func__); -+ sprintf(extra, "mp_setrfpath Main\n"); -+ -+ } else if (bTurnoff == 0) { -+ MP_PHY_SetRFPathSwitch(padapter, _FALSE); -+ RTW_INFO("%s:PHY_SetRFPathSwitch=FALSE\n", __func__); -+ sprintf(extra, "mp_setrfpath Aux\n"); -+ } else { -+ bMain = MP_PHY_QueryRFPathSwitch(padapter); -+ RTW_INFO("%s:Query RF Path = %s\n", __func__, (bMain ? "Main":"Aux")); -+ sprintf(extra, "RF Path %s\n" , (bMain ? "1":"0")); -+ } -+ -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+ -+int rtw_mp_switch_rf_path(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct mp_priv *pmp_priv; -+ char input[RTW_IWD_MAX_LEN]; -+ char *pch; -+ int bwlg = 1, bwla = 1, btg = 1, bbt=1; -+ u8 ret = 0; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ pmp_priv = &padapter->mppriv; -+ -+ RTW_INFO("%s: in=%s\n", __func__, input); -+ -+ _rtw_memset(extra, '\0', wrqu->length); -+ pch = extra; -+#ifdef CONFIG_RTL8821C /* only support for 8821c wlg/wla/btg/bt RF switch path */ -+ if ((strncmp(input, "WLG", 3) == 0) || (strncmp(input, "1", 1) == 0)) { -+ pmp_priv->rf_path_cfg = SWITCH_TO_WLG; -+ pch += sprintf(pch, "switch rf path WLG\n"); -+ -+ } else if ((strncmp(input, "WLA", 3) == 0) || (strncmp(input, "2", 1) == 0)) { -+ pmp_priv->rf_path_cfg = SWITCH_TO_WLA; -+ pch += sprintf(pch, "switch rf path WLA\n"); -+ -+ } else if ((strncmp(input, "BTG", 3) == 0) || (strncmp(input, "0", 1) == 0)) { -+ pmp_priv->rf_path_cfg = SWITCH_TO_BTG; -+ pch += sprintf(pch, "switch rf path BTG\n"); -+ -+ } else if ((strncmp(input, "BT", 3) == 0) || (strncmp(input, "3", 1) == 0)) { -+ pmp_priv->rf_path_cfg = SWITCH_TO_BT; -+ pch += sprintf(pch, "switch rf path BT\n"); -+ } else { -+ pmp_priv->rf_path_cfg = SWITCH_TO_WLG; -+ pch += sprintf(pch, "Error input, default set WLG\n"); -+ return -EFAULT; -+ } -+ -+ mp_phy_switch_rf_path_set(padapter, &pmp_priv->rf_path_cfg); -+#endif -+ wrqu->length = strlen(extra); -+ -+ return ret; -+ -+} -+int rtw_mp_QueryDrv(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ char input[RTW_IWD_MAX_LEN]; -+ int qAutoLoad = 1; -+ -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->data.length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ RTW_INFO("%s:iwpriv in=%s\n", __func__, input); -+ -+ qAutoLoad = strncmp(input, "autoload", 8); /* strncmp TRUE is 0*/ -+ -+ if (qAutoLoad == 0) { -+ RTW_INFO("%s:qAutoLoad\n", __func__); -+ -+ if (pHalData->bautoload_fail_flag) -+ sprintf(extra, "fail"); -+ else -+ sprintf(extra, "ok"); -+ } -+ wrqu->data.length = strlen(extra) + 1; -+ return 0; -+} -+ -+ -+int rtw_mp_PwrCtlDM(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ u8 input[RTW_IWD_MAX_LEN]; -+ u8 pwrtrk_state = 0; -+ u8 pwtk_type[5][25] = {"Thermal tracking off","Thermal tracking on", -+ "TSSI tracking off","TSSI tracking on","TSSI calibration"}; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ input[wrqu->length - 1] = '\0'; -+ RTW_INFO("%s: in=%s\n", __func__, input); -+ -+ if (wrqu->length == 2) { -+ if(input[0] >= '0' && input[0] <= '4') { -+ pwrtrk_state = rtw_atoi(input); -+ MPT_PwrCtlDM(padapter, pwrtrk_state); -+ sprintf(extra, "PwrCtlDM start %s\n" , pwtk_type[pwrtrk_state]); -+ } else { -+ sprintf(extra, "Error unknown number ! Please check your input number\n" -+ " 0 : Thermal tracking off\n 1 : Thermal tracking on\n 2 : TSSI tracking off\n" -+ " 3 : TSSI tracking on\n 4 : TSSI calibration\n"); -+ } -+ wrqu->length = strlen(extra); -+ -+ return 0; -+ } -+ if (strncmp(input, "start", 5) == 0 || strncmp(input, "thertrk on", 10) == 0) {/* strncmp TRUE is 0*/ -+ pwrtrk_state = 1; -+ sprintf(extra, "PwrCtlDM start %s\n" , pwtk_type[pwrtrk_state]); -+ } else if (strncmp(input, "thertrk off", 11) == 0 || strncmp(input, "stop", 5) == 0) { -+ pwrtrk_state = 0; -+ sprintf(extra, "PwrCtlDM stop %s\n" , pwtk_type[pwrtrk_state]); -+ } else if (strncmp(input, "tssitrk off", 11) == 0){ -+ pwrtrk_state = 2; -+ sprintf(extra, "PwrCtlDM stop %s\n" , pwtk_type[pwrtrk_state]); -+ } else if (strncmp(input, "tssitrk on", 10) == 0){ -+ pwrtrk_state = 3; -+ sprintf(extra, "PwrCtlDM start %s\n" , pwtk_type[pwrtrk_state]); -+ } else if (strncmp(input, "tssik", 5) == 0){ -+ pwrtrk_state = 4; -+ sprintf(extra, "PwrCtlDM start %s\n" , pwtk_type[pwrtrk_state]); -+ } else { -+ sprintf(extra, "Error input !!!\n" -+ " thertrk off : Thermal tracking off\n thertrk on : Thermal tracking on\n" -+ " tssitrk off : TSSI tracking off\n tssitrk on : TSSI tracking on\n tssik : TSSI calibration\n\n" -+ " 0 : Thermal tracking off\n 1 : Thermal tracking on\n 2 : TSSI tracking off\n" -+ " 3 : TSSI tracking on\n 4 : TSSI calibration\n"); -+ wrqu->length = strlen(extra); -+ return 0; -+ } -+ -+ MPT_PwrCtlDM(padapter, pwrtrk_state); -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+int rtw_mp_iqk(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ rtw_mp_trigger_iqk(padapter); -+ -+ return 0; -+} -+ -+int rtw_mp_lck(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ rtw_mp_trigger_lck(padapter); -+ -+ return 0; -+} -+ -+int rtw_mp_dpk(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ char *pch; -+ -+ u8 ips_mode = IPS_NUM; /* init invalid value */ -+ u8 lps_mode = PS_MODE_NUM; /* init invalid value */ -+ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ *(extra + wrqu->data.length) = '\0'; -+ pch = extra; -+ -+ if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) { -+ pDM_Odm->dpk_info.is_dpk_enable = 0; -+ halrf_dpk_enable_disable(pDM_Odm); -+ pch += sprintf(pch, "set dpk off\n"); -+ -+ } else if (strncmp(extra, "on", 2) == 0 && strlen(extra) < 3) { -+ pDM_Odm->dpk_info.is_dpk_enable = 1; -+ halrf_dpk_enable_disable(pDM_Odm); -+ pch += sprintf(pch, "set dpk on\n"); -+ } else { -+#ifdef CONFIG_LPS -+ lps_mode = pwrctrlpriv->power_mgnt;/* keep org value */ -+ rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); -+#endif -+#ifdef CONFIG_IPS -+ ips_mode = pwrctrlpriv->ips_mode;/* keep org value */ -+ rtw_pm_set_ips(padapter, IPS_NONE); -+#endif -+ rtw_mp_trigger_dpk(padapter); -+ if (padapter->registrypriv.mp_mode == 0) { -+#ifdef CONFIG_IPS -+ rtw_pm_set_ips(padapter, ips_mode); -+#endif /* CONFIG_IPS */ -+ -+#ifdef CONFIG_LPS -+ rtw_pm_set_lps(padapter, lps_mode); -+#endif /* CONFIG_LPS */ -+ } -+ pch += sprintf(pch, "set dpk trigger\n"); -+ } -+ -+ wrqu->data.length = strlen(extra); -+ -+ return 0; -+} -+ -+int rtw_mp_get_tsside(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ char input[RTW_IWD_MAX_LEN]; -+ u8 rfpath; -+ u32 tssi_de; -+ -+ u8 legal_param_num = 1; -+ int param_num; -+ char pout_str_buf[7]; -+ u8 signed_flag = 0; -+ int integer_num; -+ u32 decimal_num; -+ s32 pout; -+ char *pextra; -+ int i; -+ -+ #ifdef CONFIG_RTL8723F -+ /* -+ * rtwpriv wlan0 mp_get_tsside rf_path pout -+ * rf_path : 0 ~ 1 -+ * pout : -15.000 ~ 25.000 -+ * ex : rtwpriv wlan0 mp_get_tsside 0 -12.123 -+ */ -+ legal_param_num = 2; -+ #endif -+ if (wrqu->length > 128) -+ return -EFAULT; -+ -+ _rtw_memset(input, 0, sizeof(input)); -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ param_num = sscanf(input, "%hhu %7s", &rfpath, pout_str_buf); -+ -+ /* Check parameter format*/ -+ if(param_num != legal_param_num) -+ goto invalid_param_format; -+ -+ if(rfpath <0 || 3 < rfpath) -+ goto invalid_param_format; -+ -+#ifdef CONFIG_RTL8723F -+ /* Convert pout from floating-point to integer -+ * For Floating-Point Precision, pout*1000 -+ */ -+ if(pout_str_buf[0] == '-') -+ signed_flag = 1; -+ i = sscanf(pout_str_buf, "%d.%3u", &integer_num, &decimal_num); -+ pout = integer_num * 1000; -+ if(i == 2) { -+ /* Convert decimal number -+ * ex : 0.1 => 100, -0.1 => 100 -+ */ -+ decimal_num = (decimal_num < 10) ? decimal_num * 100 : decimal_num; -+ decimal_num = (decimal_num < 100) ? decimal_num * 10 : decimal_num; -+ pout += ((pout < 0 || signed_flag == 1) ? -decimal_num : decimal_num); -+ } -+ if(pout < -15000 || 25000 < pout) -+ goto invalid_param_format; -+#endif -+ -+#ifdef CONFIG_RTL8723F -+ /* For Floating-Point Precision, pout */ -+ tssi_de = halrf_get_online_tssi_de(pDM_Odm, rfpath, pout); -+#else -+ tssi_de = halrf_tssi_get_de(pDM_Odm, rfpath); -+#endif -+ -+ if (rfpath == 0) -+ sprintf(extra, "patha=%d", tssi_de); -+ else if (rfpath == 1) -+ sprintf(extra, "pathb=%d", tssi_de); -+ else if (rfpath == 2) -+ sprintf(extra, "pathc=%d", tssi_de); -+ else if (rfpath == 3) -+ sprintf(extra, "pathd=%d", tssi_de); -+ -+ wrqu->length = strlen(extra); -+ return 0; -+ -+invalid_param_format: -+ sprintf(extra, "Invalid command format, please indicate RF path 0/1/2/3"); -+#ifdef CONFIG_RTL8723F -+ pextra = extra + strlen(extra); -+ sprintf(pextra, " and pout value : -15.000 ~ 25.000\n"); -+#endif -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+int rtw_mp_set_tsside(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ u32 tsside_a = 0, tsside_b = 0, tsside_c = 0, tsside_d = 0; -+ char input[RTW_IWD_MAX_LEN]; -+ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ if (sscanf(input, "patha=%d", &tsside_a) == 1) { -+ sprintf(extra, "Set TSSI DE path_A: %d", tsside_a); -+ halrf_tssi_set_de_for_tx_verify(pDM_Odm, tsside_a, RF_PATH_A); -+ mpt_trigger_tssi_tracking(padapter, RF_PATH_A); -+ -+ } else if (sscanf(input, "pathb=%d", &tsside_b) == 1) { -+ sprintf(extra, "Set TSSI DE path_B: %d", tsside_b); -+ halrf_tssi_set_de_for_tx_verify(pDM_Odm, tsside_b, RF_PATH_B); -+ mpt_trigger_tssi_tracking(padapter, RF_PATH_B); -+ -+ } else if (sscanf(input, "pathc=%d", &tsside_c) == 1) { -+ sprintf(extra, "Set TSSI DE path_C: %d", tsside_c); -+ halrf_tssi_set_de_for_tx_verify(pDM_Odm, tsside_c, RF_PATH_C); -+ mpt_trigger_tssi_tracking(padapter, RF_PATH_C); -+ -+ } else if (sscanf(input, "pathd=%d", &tsside_d) == 1) { -+ sprintf(extra, "Set TSSI DE path_D: %d", tsside_d); -+ halrf_tssi_set_de_for_tx_verify(pDM_Odm, tsside_d, RF_PATH_D); -+ mpt_trigger_tssi_tracking(padapter, RF_PATH_D); -+ -+ } else -+ sprintf(extra, "Invalid command format, please input TSSI DE value within patha/b/c/d=xyz"); -+ -+ wrqu->length = strlen(extra); -+ -+ return 0; -+} -+ -+int rtw_mp_getver(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct mp_priv *pmp_priv; -+ -+ pmp_priv = &padapter->mppriv; -+ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ sprintf(extra, "rtwpriv=%d\n", RTWPRIV_VER_INFO); -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_mp_mon(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct hal_ops *pHalFunc = &padapter->hal_func; -+ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; -+ int bstart = 1, bstop = 1; -+ -+ networkType = Ndis802_11Infrastructure; -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ *(extra + wrqu->data.length) = '\0'; -+ rtw_pm_set_ips(padapter, IPS_NONE); -+ LeaveAllPowerSaveMode(padapter); -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (init_mp_priv(padapter) == _FAIL) -+ RTW_INFO("%s: initialize MP private data Fail!\n", __func__); -+ padapter->mppriv.channel = 6; -+ -+ bstart = strncmp(extra, "start", 5); /* strncmp TRUE is 0*/ -+ bstop = strncmp(extra, "stop", 4); /* strncmp TRUE is 0*/ -+ if (bstart == 0) { -+ mp_join(padapter, WIFI_FW_ADHOC_STATE); -+ SetPacketRx(padapter, _TRUE, _FALSE); -+ SetChannel(padapter); -+ pmp_priv->rx_bindicatePkt = _TRUE; -+ pmp_priv->bRTWSmbCfg = _TRUE; -+ sprintf(extra, "monitor mode start\n"); -+ } else if (bstop == 0) { -+ SetPacketRx(padapter, _FALSE, _FALSE); -+ pmp_priv->rx_bindicatePkt = _FALSE; -+ pmp_priv->bRTWSmbCfg = _FALSE; -+ padapter->registrypriv.mp_mode = 1; -+ pHalFunc->hal_deinit(padapter); -+ padapter->registrypriv.mp_mode = 0; -+ pHalFunc->hal_init(padapter); -+ /*rtw_disassoc_cmd(padapter, 0, 0);*/ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ rtw_disassoc_cmd(padapter, 500, 0); -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ /*rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);*/ -+ } -+ rtw_pm_set_ips(padapter, IPS_NORMAL); -+ sprintf(extra, "monitor mode Stop\n"); -+ } -+#endif -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra) -+{ -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ char *pextra = extra; -+ -+ switch (pmp_priv->mode) { -+ -+ case MP_PACKET_TX: -+ if (bStartTest == 0) { -+ pmp_priv->tx.stop = 1; -+ pmp_priv->mode = MP_ON; -+ #ifdef CONFIG_RTL8822B -+ rtw_write8(padapter, 0x838, 0x61); -+ #endif -+ sprintf(extra, "Stop continuous Tx"); -+ } else if (pmp_priv->tx.stop == 1) { -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "\nStart continuous DA=ffffffffffff len=1500 count=%u\n", pmp_priv->tx.count); -+ pmp_priv->tx.stop = 0; -+ #ifdef CONFIG_RTL8822B -+ rtw_write8(padapter, 0x838, 0x6d); -+ #endif -+ SetPacketTx(padapter); -+ } else -+ return -EFAULT; -+ return 0; -+ case MP_SINGLE_TONE_TX: -+ if (bStartTest != 0) -+ strcat(extra, "\nStart continuous DA=ffffffffffff len=1500\n infinite=yes."); -+ SetSingleToneTx(padapter, (u8)bStartTest); -+ break; -+ case MP_CONTINUOUS_TX: -+ if (bStartTest != 0) -+ strcat(extra, "\nStart continuous DA=ffffffffffff len=1500\n infinite=yes."); -+ SetContinuousTx(padapter, (u8)bStartTest); -+ break; -+ case MP_CARRIER_SUPPRISSION_TX: -+ if (bStartTest != 0) { -+ if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_11M) -+ strcat(extra, "\nStart continuous DA=ffffffffffff len=1500\n infinite=yes."); -+ else -+ strcat(extra, "\nSpecify carrier suppression but not CCK rate"); -+ } -+ SetCarrierSuppressionTx(padapter, (u8)bStartTest); -+ break; -+ case MP_SINGLE_CARRIER_TX: -+ if (bStartTest != 0) -+ strcat(extra, "\nStart continuous DA=ffffffffffff len=1500\n infinite=yes."); -+ SetSingleCarrierTx(padapter, (u8)bStartTest); -+ break; -+ -+ default: -+ sprintf(extra, "Error! Continuous-Tx is not on-going."); -+ return -EFAULT; -+ } -+ -+ if (bStartTest == 1 && pmp_priv->mode != MP_ON) { -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ -+ if (pmp_priv->tx.stop == 0) { -+ pmp_priv->tx.stop = 1; -+ rtw_msleep_os(5); -+ } -+#ifdef CONFIG_80211N_HT -+ if(padapter->registrypriv.ht_enable && -+ is_supported_ht(padapter->registrypriv.wireless_mode)) -+ pmp_priv->tx.attrib.ht_en = 1; -+#endif -+ pmp_priv->tx.stop = 0; -+ pmp_priv->tx.count = 1; -+ SetPacketTx(padapter); -+ } else -+ pmp_priv->mode = MP_ON; -+ -+#if defined(CONFIG_RTL8812A) -+ if (IS_HARDWARE_TYPE_8812AU(padapter)) { -+ /* <20130425, Kordan> Turn off OFDM Rx to prevent from CCA causing Tx hang.*/ -+ if (pmp_priv->mode == MP_PACKET_TX) -+ phy_set_bb_reg(padapter, rCCAonSec_Jaguar, BIT3, 1); -+ else -+ phy_set_bb_reg(padapter, rCCAonSec_Jaguar, BIT3, 0); -+ } -+#endif -+ -+ return 0; -+} -+ -+ -+int rtw_mp_tx(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); -+ char *pextra = extra; -+ u32 bandwidth = 0, sg = 0, channel = 6, txpower = 40, rate = 108, ant = 0, txmode = 1, count = 0; -+ u8 bStartTest = 1, status = 0; -+#ifdef CONFIG_MP_VHT_HW_TX_MODE -+ u8 Idx = 0, tmpU1B; -+#endif -+ u16 antenna = 0; -+ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ RTW_INFO("extra = %s\n", extra); -+#ifdef CONFIG_CONCURRENT_MODE -+ if (!is_primary_adapter(padapter)) { -+ sprintf(extra, "Error: MP mode can't support Virtual Adapter, Please to use main Adapter.\n"); -+ wrqu->data.length = strlen(extra); -+ return 0; -+ } -+#endif -+ -+ if (strncmp(extra, "stop", 3) == 0) { -+ bStartTest = 0; /* To set Stop*/ -+ pmp_priv->tx.stop = 1; -+ sprintf(extra, "Stop continuous Tx"); -+ status = rtw_mp_pretx_proc(padapter, bStartTest, extra); -+ wrqu->data.length = strlen(extra); -+ return status; -+ } else if (strncmp(extra, "count", 5) == 0) { -+ if (sscanf(extra, "count=%d", &count) < 1) -+ RTW_INFO("Got Count=%d]\n", count); -+ pmp_priv->tx.count = count; -+ return 0; -+ } else if (strncmp(extra, "setting", 7) == 0) { -+ _rtw_memset(extra, 0, wrqu->data.length); -+ pextra += sprintf(pextra, "Current Setting :\n Channel:%d", pmp_priv->channel); -+ pextra += sprintf(pextra, "\n Bandwidth:%d", pmp_priv->bandwidth); -+ pextra += sprintf(pextra, "\n Rate index:%d", pmp_priv->rateidx); -+ pextra += sprintf(pextra, "\n TxPower index:%d", pmp_priv->txpoweridx); -+ pextra += sprintf(pextra, "\n Antenna TxPath:%d", pmp_priv->antenna_tx); -+ pextra += sprintf(pextra, "\n Antenna RxPath:%d", pmp_priv->antenna_rx); -+ pextra += sprintf(pextra, "\n MP Mode:%d", pmp_priv->mode); -+ wrqu->data.length = strlen(extra); -+ return 0; -+#ifdef CONFIG_MP_VHT_HW_TX_MODE -+ } else if (strncmp(extra, "pmact", 5) == 0) { -+ if (strncmp(extra, "pmact=", 6) == 0) { -+ _rtw_memset(&pMptCtx->PMacTxInfo, 0, sizeof(pMptCtx->PMacTxInfo)); -+ if (strncmp(extra, "pmact=start", 11) == 0) { -+ pMptCtx->PMacTxInfo.bEnPMacTx = _TRUE; -+ sprintf(extra, "Set PMac Tx Mode start\n"); -+ } else { -+ pMptCtx->PMacTxInfo.bEnPMacTx = _FALSE; -+ sprintf(extra, "Set PMac Tx Mode Stop\n"); -+ } -+ if (pMptCtx->bldpc == TRUE) -+ pMptCtx->PMacTxInfo.bLDPC = _TRUE; -+ -+ if (pMptCtx->bstbc == TRUE) -+ pMptCtx->PMacTxInfo.bSTBC = _TRUE; -+ -+ pMptCtx->PMacTxInfo.bSPreamble = pmp_priv->preamble; -+ pMptCtx->PMacTxInfo.bSGI = pmp_priv->preamble; -+ pMptCtx->PMacTxInfo.BandWidth = pmp_priv->bandwidth; -+ pMptCtx->PMacTxInfo.TX_RATE = HwRateToMPTRate(pmp_priv->rateidx); -+ -+ pMptCtx->PMacTxInfo.Mode = pMptCtx->HWTxmode; -+ -+ pMptCtx->PMacTxInfo.NDP_sound = FALSE;/*(Adapter.PacketType == NDP_PKT)?TRUE:FALSE;*/ -+ -+ if (padapter->mppriv.pktInterval == 0) -+ pMptCtx->PMacTxInfo.PacketPeriod = 100; -+ else -+ pMptCtx->PMacTxInfo.PacketPeriod = padapter->mppriv.pktInterval; -+ -+ if (padapter->mppriv.pktLength < 1000) -+ pMptCtx->PMacTxInfo.PacketLength = 1000; -+ else -+ pMptCtx->PMacTxInfo.PacketLength = padapter->mppriv.pktLength; -+ -+ pMptCtx->PMacTxInfo.PacketPattern = rtw_random32() % 0xFF; -+ -+ if (padapter->mppriv.tx_pktcount != 0) -+ pMptCtx->PMacTxInfo.PacketCount = padapter->mppriv.tx_pktcount; -+ -+ pMptCtx->PMacTxInfo.Ntx = 0; -+ for (Idx = 16; Idx < 20; Idx++) { -+ tmpU1B = (padapter->mppriv.antenna_tx >> Idx) & 1; -+ if (tmpU1B) -+ pMptCtx->PMacTxInfo.Ntx++; -+ } -+ -+ _rtw_memset(pMptCtx->PMacTxInfo.MacAddress, 0xFF, ETH_ALEN); -+ -+ PMAC_Get_Pkt_Param(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); -+ -+ if (MPT_IS_CCK_RATE(pMptCtx->PMacTxInfo.TX_RATE)) -+ -+ CCK_generator(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); -+ else { -+ PMAC_Nsym_generator(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); -+ /* 24 BIT*/ -+ L_SIG_generator(pMptCtx->PMacPktInfo.N_sym, &pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); -+ } -+ /* 48BIT*/ -+ if (MPT_IS_HT_RATE(pMptCtx->PMacTxInfo.TX_RATE)) -+ HT_SIG_generator(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); -+ else if (MPT_IS_VHT_RATE(pMptCtx->PMacTxInfo.TX_RATE)) { -+ /* 48BIT*/ -+ VHT_SIG_A_generator(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); -+ -+ /* 26/27/29 BIT & CRC 8 BIT*/ -+ VHT_SIG_B_generator(&pMptCtx->PMacTxInfo); -+ -+ /* 32 BIT*/ -+ VHT_Delimiter_generator(&pMptCtx->PMacTxInfo); -+ } -+ -+ mpt_ProSetPMacTx(padapter); -+ -+ } else if (strncmp(extra, "pmact,mode=", 11) == 0) { -+ int txmode = 0; -+ -+ if (sscanf(extra, "pmact,mode=%d", &txmode) > 0) { -+ if (txmode == 1) { -+ pMptCtx->HWTxmode = CONTINUOUS_TX; -+ sprintf(extra, "\t Config HW Tx mode = CONTINUOUS_TX\n"); -+ } else if (txmode == 2) { -+ pMptCtx->HWTxmode = OFDM_Single_Tone_TX; -+ sprintf(extra, "\t Config HW Tx mode = OFDM_Single_Tone_TX\n"); -+ } else { -+ pMptCtx->HWTxmode = PACKETS_TX; -+ sprintf(extra, "\t Config HW Tx mode = PACKETS_TX\n"); -+ } -+ } else { -+ pMptCtx->HWTxmode = PACKETS_TX; -+ sprintf(extra, "\t Config HW Tx mode=\n 0 = PACKETS_TX\n 1 = CONTINUOUS_TX\n 2 = OFDM_Single_Tone_TX"); -+ } -+ } else if (strncmp(extra, "pmact,", 6) == 0) { -+ int PacketPeriod = 0, PacketLength = 0, PacketCout = 0; -+ int bldpc = 0, bstbc = 0; -+ -+ if (sscanf(extra, "pmact,period=%d", &PacketPeriod) > 0) { -+ padapter->mppriv.pktInterval = PacketPeriod; -+ RTW_INFO("PacketPeriod=%d\n", padapter->mppriv.pktInterval); -+ sprintf(extra, "PacketPeriod [1~255]= %d\n", padapter->mppriv.pktInterval); -+ -+ } else if (sscanf(extra, "pmact,length=%d", &PacketLength) > 0) { -+ padapter->mppriv.pktLength = PacketLength; -+ RTW_INFO("PacketPeriod=%d\n", padapter->mppriv.pktLength); -+ sprintf(extra, "PacketLength[~65535]=%d\n", padapter->mppriv.pktLength); -+ -+ } else if (sscanf(extra, "pmact,count=%d", &PacketCout) > 0) { -+ padapter->mppriv.tx_pktcount = PacketCout; -+ RTW_INFO("Packet Cout =%d\n", padapter->mppriv.tx_pktcount); -+ sprintf(extra, "Packet Cout =%d\n", padapter->mppriv.tx_pktcount); -+ -+ } else if (sscanf(extra, "pmact,ldpc=%d", &bldpc) > 0) { -+ pMptCtx->bldpc = bldpc; -+ RTW_INFO("Set LDPC =%d\n", pMptCtx->bldpc); -+ sprintf(extra, "Set LDPC =%d\n", pMptCtx->bldpc); -+ -+ } else if (sscanf(extra, "pmact,stbc=%d", &bstbc) > 0) { -+ pMptCtx->bstbc = bstbc; -+ RTW_INFO("Set STBC =%d\n", pMptCtx->bstbc); -+ sprintf(extra, "Set STBC =%d\n", pMptCtx->bstbc); -+ } else -+ sprintf(extra, "\n period={1~255}\n length={1000~65535}\n count={0~}\n ldpc={0/1}\n stbc={0/1}"); -+ -+ } -+ -+ wrqu->data.length = strlen(extra); -+ return 0; -+#endif -+ } else { -+ -+ if (sscanf(extra, "ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d", &channel, &bandwidth, &rate, &txpower, &ant, &txmode) < 6) { -+ RTW_INFO("Invalid format [ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d]\n", channel, bandwidth, rate, txpower, ant, txmode); -+ _rtw_memset(extra, 0, wrqu->data.length); -+ pextra += sprintf(pextra, "\n Please input correct format as bleow:\n"); -+ pextra += sprintf(pextra, "\t ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d\n", channel, bandwidth, rate, txpower, ant, txmode); -+ pextra += sprintf(pextra, "\n [ ch : BGN = <1~14> , A or AC = <36~165> ]"); -+ pextra += sprintf(pextra, "\n [ bw : Bandwidth: 0 = 20M, 1 = 40M, 2 = 80M ]"); -+ pextra += sprintf(pextra, "\n [ rate : CCK: 1 2 5.5 11M X 2 = < 2 4 11 22 >]"); -+ pextra += sprintf(pextra, "\n [ OFDM: 6 9 12 18 24 36 48 54M X 2 = < 12 18 24 36 48 72 96 108>"); -+ pextra += sprintf(pextra, "\n [ HT 1S2SS MCS0 ~ MCS15 : < [MCS0]=128 ~ [MCS7]=135 ~ [MCS15]=143 >"); -+ pextra += sprintf(pextra, "\n [ HT 3SS MCS16 ~ MCS32 : < [MCS16]=144 ~ [MCS23]=151 ~ [MCS32]=159 >"); -+ pextra += sprintf(pextra, "\n [ VHT 1SS MCS0 ~ MCS9 : < [MCS0]=160 ~ [MCS9]=169 >"); -+ pextra += sprintf(pextra, "\n [ txpower : 1~63 power index"); -+ pextra += sprintf(pextra, "\n [ ant : ,2T ex: AB=3 BC=6 CD=12"); -+ pextra += sprintf(pextra, "\n [ txmode : < 0 = CONTINUOUS_TX, 1 = PACKET_TX, 2 = SINGLE_TONE_TX, 3 = CARRIER_SUPPRISSION_TX, 4 = SINGLE_CARRIER_TX>\n"); -+ wrqu->data.length = strlen(extra); -+ return status; -+ -+ } else { -+ char *pextra = extra; -+ RTW_INFO("Got format [ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d]\n", channel, bandwidth, rate, txpower, ant, txmode); -+ _rtw_memset(extra, 0, wrqu->data.length); -+ sprintf(extra, "Change Current channel %d to channel %d", padapter->mppriv.channel , channel); -+ padapter->mppriv.channel = channel; -+ SetChannel(padapter); -+ pHalData->current_channel = channel; -+ -+ if (bandwidth == 1) -+ bandwidth = CHANNEL_WIDTH_40; -+ else if (bandwidth == 2) -+ bandwidth = CHANNEL_WIDTH_80; -+ pextra = extra + strlen(pextra); -+ pextra += sprintf(pextra, "\nChange Current Bandwidth %d to Bandwidth %d", padapter->mppriv.bandwidth, bandwidth); -+ padapter->mppriv.bandwidth = (u8)bandwidth; -+ padapter->mppriv.preamble = sg; -+ SetBandwidth(padapter); -+ pHalData->current_channel_bw = bandwidth; -+ -+ pextra += sprintf(pextra, "\nSet power level :%d", txpower); -+ padapter->mppriv.txpoweridx = (u8)txpower; -+ pMptCtx->TxPwrLevel[RF_PATH_A] = (u8)txpower; -+ pMptCtx->TxPwrLevel[RF_PATH_B] = (u8)txpower; -+ pMptCtx->TxPwrLevel[RF_PATH_C] = (u8)txpower; -+ pMptCtx->TxPwrLevel[RF_PATH_D] = (u8)txpower; -+ SetTxPower(padapter); -+ -+ RTW_INFO("%s: bw=%d sg=%d\n", __func__, bandwidth, sg); -+ -+ if (rate <= 0x7f) -+ rate = wifirate2_ratetbl_inx((u8)rate); -+ else if (rate < 0xC8) -+ rate = (rate - 0x80 + MPT_RATE_MCS0); -+ /*HT rate 0x80(MCS0) ~ 0x8F(MCS15) ~ 0x9F(MCS31) 128~159 -+ VHT1SS~2SS rate 0xA0 (VHT1SS_MCS0 44) ~ 0xB3 (VHT2SS_MCS9 #63) 160~179 -+ VHT rate 0xB4 (VHT3SS_MCS0 64) ~ 0xC7 (VHT2SS_MCS9 #83) 180~199 -+ else -+ VHT rate 0x90(VHT1SS_MCS0) ~ 0x99(VHT1SS_MCS9) 144~153 -+ rate =(rate - MPT_RATE_VHT1SS_MCS0); -+ */ -+ RTW_INFO("%s: rate index=%d\n", __func__, rate); -+ if (rate >= MPT_RATE_LAST) -+ return -EINVAL; -+ pextra += sprintf(pextra, "\nSet data rate to %d index %d", padapter->mppriv.rateidx, rate); -+ -+ padapter->mppriv.rateidx = rate; -+ pMptCtx->mpt_rate_index = rate; -+ SetDataRate(padapter); -+ -+ pextra += sprintf(pextra, "\nSet Antenna Path :%d", ant); -+ switch (ant) { -+ case 1: -+ antenna = ANTENNA_A; -+ break; -+ case 2: -+ antenna = ANTENNA_B; -+ break; -+ case 4: -+ antenna = ANTENNA_C; -+ break; -+ case 8: -+ antenna = ANTENNA_D; -+ break; -+ case 3: -+ antenna = ANTENNA_AB; -+ break; -+ case 5: -+ antenna = ANTENNA_AC; -+ break; -+ case 9: -+ antenna = ANTENNA_AD; -+ break; -+ case 6: -+ antenna = ANTENNA_BC; -+ break; -+ case 10: -+ antenna = ANTENNA_BD; -+ break; -+ case 12: -+ antenna = ANTENNA_CD; -+ break; -+ case 7: -+ antenna = ANTENNA_ABC; -+ break; -+ case 14: -+ antenna = ANTENNA_BCD; -+ break; -+ case 11: -+ antenna = ANTENNA_ABD; -+ break; -+ case 15: -+ antenna = ANTENNA_ABCD; -+ break; -+ } -+ RTW_INFO("%s: antenna=0x%x\n", __func__, antenna); -+ padapter->mppriv.antenna_tx = antenna; -+ padapter->mppriv.antenna_rx = antenna; -+ pHalData->antenna_tx_path = antenna; -+ SetAntenna(padapter); -+ -+ if (txmode == 0) -+ pmp_priv->mode = MP_CONTINUOUS_TX; -+ else if (txmode == 1) { -+ pmp_priv->mode = MP_PACKET_TX; -+ pmp_priv->tx.count = count; -+ } else if (txmode == 2) -+ pmp_priv->mode = MP_SINGLE_TONE_TX; -+ else if (txmode == 3) -+ pmp_priv->mode = MP_CARRIER_SUPPRISSION_TX; -+ else if (txmode == 4) -+ pmp_priv->mode = MP_SINGLE_CARRIER_TX; -+ -+ status = rtw_mp_pretx_proc(padapter, bStartTest, extra); -+ } -+ -+ } -+ -+ wrqu->data.length = strlen(extra); -+ return status; -+} -+ -+ -+int rtw_mp_rx(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ char *pextra = extra; -+ u32 bandwidth = 0, sg = 0, channel = 6, ant = 0; -+ u16 antenna = 0; -+ u8 bStartRx = 0; -+ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (!is_primary_adapter(padapter)) { -+ sprintf(extra, "Error: MP mode can't support Virtual Adapter, Please to use main Adapter.\n"); -+ wrqu->data.length = strlen(extra); -+ return 0; -+ } -+#endif -+ -+ if (strncmp(extra, "stop", 4) == 0) { -+ _rtw_memset(extra, 0, wrqu->data.length); -+ SetPacketRx(padapter, bStartRx, _FALSE); -+ pmp_priv->bmac_filter = _FALSE; -+ sprintf(extra, "Received packet OK:%d CRC error:%d ,Filter out:%d", padapter->mppriv.rx_pktcount, padapter->mppriv.rx_crcerrpktcount, padapter->mppriv.rx_pktcount_filter_out); -+ wrqu->data.length = strlen(extra); -+ return 0; -+ -+ } else if (sscanf(extra, "ch=%d,bw=%d,ant=%d", &channel, &bandwidth, &ant) < 3) { -+ RTW_INFO("Invalid format [ch=%d,bw=%d,ant=%d]\n", channel, bandwidth, ant); -+ _rtw_memset(extra, 0, wrqu->data.length); -+ pextra += sprintf(pextra, "\n Please input correct format as bleow:\n"); -+ pextra += sprintf(pextra, "\t ch=%d,bw=%d,ant=%d\n", channel, bandwidth, ant); -+ pextra += sprintf(pextra, "\n [ ch : BGN = <1~14> , A or AC = <36~165> ]"); -+ pextra += sprintf(pextra, "\n [ bw : Bandwidth: 0 = 20M, 1 = 40M, 2 = 80M ]"); -+ pextra += sprintf(pextra, "\n [ ant : ,2T ex: AB=3 BC=6 CD=12"); -+ wrqu->data.length = strlen(extra); -+ return 0; -+ -+ } else { -+ char *pextra = extra; -+ bStartRx = 1; -+ RTW_INFO("Got format [ch=%d,bw=%d,ant=%d]\n", channel, bandwidth, ant); -+ _rtw_memset(extra, 0, wrqu->data.length); -+ sprintf(extra, "Change Current channel %d to channel %d", padapter->mppriv.channel , channel); -+ padapter->mppriv.channel = channel; -+ SetChannel(padapter); -+ pHalData->current_channel = channel; -+ -+ if (bandwidth == 1) -+ bandwidth = CHANNEL_WIDTH_40; -+ else if (bandwidth == 2) -+ bandwidth = CHANNEL_WIDTH_80; -+ pextra = extra + strlen(extra); -+ pextra += sprintf(pextra, "\nChange Current Bandwidth %d to Bandwidth %d", padapter->mppriv.bandwidth, bandwidth); -+ padapter->mppriv.bandwidth = (u8)bandwidth; -+ padapter->mppriv.preamble = sg; -+ SetBandwidth(padapter); -+ pHalData->current_channel_bw = bandwidth; -+ -+ pextra += sprintf(pextra, "\nSet Antenna Path :%d", ant); -+ switch (ant) { -+ case 1: -+ antenna = ANTENNA_A; -+ break; -+ case 2: -+ antenna = ANTENNA_B; -+ break; -+ case 4: -+ antenna = ANTENNA_C; -+ break; -+ case 8: -+ antenna = ANTENNA_D; -+ break; -+ case 3: -+ antenna = ANTENNA_AB; -+ break; -+ case 5: -+ antenna = ANTENNA_AC; -+ break; -+ case 9: -+ antenna = ANTENNA_AD; -+ break; -+ case 6: -+ antenna = ANTENNA_BC; -+ break; -+ case 10: -+ antenna = ANTENNA_BD; -+ break; -+ case 12: -+ antenna = ANTENNA_CD; -+ break; -+ case 7: -+ antenna = ANTENNA_ABC; -+ break; -+ case 14: -+ antenna = ANTENNA_BCD; -+ break; -+ case 11: -+ antenna = ANTENNA_ABD; -+ break; -+ case 15: -+ antenna = ANTENNA_ABCD; -+ break; -+ } -+ RTW_INFO("%s: antenna=0x%x\n", __func__, antenna); -+ padapter->mppriv.antenna_tx = antenna; -+ padapter->mppriv.antenna_rx = antenna; -+ pHalData->antenna_tx_path = antenna; -+ SetAntenna(padapter); -+ -+ strcat(extra, "\nstart Rx"); -+ SetPacketRx(padapter, bStartRx, _FALSE); -+ } -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_mp_hwtx(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); -+ char *pch; -+ -+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) \ -+ || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_RTL8723F) -+/* todo: 8723F */ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ *(extra + wrqu->data.length) = '\0'; -+ -+ _rtw_memset(&pMptCtx->PMacTxInfo, 0, sizeof(RT_PMAC_TX_INFO)); -+ _rtw_memcpy((void *)&pMptCtx->PMacTxInfo, (void *)extra, sizeof(RT_PMAC_TX_INFO)); -+ _rtw_memset(extra, 0, wrqu->data.length); -+ pch = extra; -+ -+ if (pMptCtx->PMacTxInfo.bEnPMacTx == 1 && pmp_priv->mode != MP_ON) { -+ pch += sprintf(pch, "MP Tx Running, Please Set PMac Tx Mode Stop\n"); -+ RTW_INFO("Error !!! MP Tx Running, Please Set PMac Tx Mode Stop\n"); -+ } else { -+ RTW_INFO("To set MAC Tx mode\n"); -+ if (mpt_ProSetPMacTx(padapter)) -+ pch += sprintf(pch, "Set PMac Tx Mode OK\n"); -+ else -+ pch += sprintf(pch, "Set PMac Tx Mode Error\n"); -+ } -+ wrqu->data.length = strlen(extra); -+#endif -+ return 0; -+ -+} -+ -+int rtw_mp_pwrlmt(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ char *pch; -+ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ *(extra + wrqu->data.length) = '\0'; -+ pch = extra; -+ -+#if CONFIG_TXPWR_LIMIT -+ if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) { -+ padapter->registrypriv.RegEnableTxPowerLimit = 0; -+ pch += sprintf(pch, "Turn off Power Limit\n"); -+ -+ } else if (strncmp(extra, "on", 2) == 0 && strlen(extra) < 3) { -+ padapter->registrypriv.RegEnableTxPowerLimit = 1; -+ pch += sprintf(pch, "Turn on Power Limit\n"); -+ -+ } else -+#endif -+ pch += sprintf(pch, "Get Power Limit Status:%s\n", (registry_par->RegEnableTxPowerLimit == 1) ? "ON" : "OFF"); -+ -+ -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+int rtw_mp_pwrbyrate(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ *(extra + wrqu->data.length) = '\0'; -+ if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) { -+ padapter->registrypriv.RegEnableTxPowerByRate = 0; -+ sprintf(extra, "Turn off Tx Power by Rate\n"); -+ -+ } else if (strncmp(extra, "on", 2) == 0 && strlen(extra) < 3) { -+ padapter->registrypriv.RegEnableTxPowerByRate = 1; -+ sprintf(extra, "Turn On Tx Power by Rate\n"); -+ -+ } else { -+ sprintf(extra, "Get Power by Rate Status:%s\n", (padapter->registrypriv.RegEnableTxPowerByRate == 1) ? "ON" : "OFF"); -+ } -+ -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_mp_dpk_track(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct dm_struct *pDM_Odm = &pHalData->odmpriv; -+ char *pch; -+ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ *(extra + wrqu->data.length) = '\0'; -+ pch = extra; -+ -+ if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) { -+ halrf_set_dpk_track(pDM_Odm, FALSE); -+ pch += sprintf(pch, "set dpk track off\n"); -+ -+ } else if (strncmp(extra, "on", 2) == 0 && strlen(extra) < 3) { -+ halrf_set_dpk_track(pDM_Odm, TRUE); -+ pch += sprintf(pch, "set dpk track on\n"); -+ } -+ -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_bt_efuse_mask_file(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ char *rtw_efuse_mask_file_path; -+ u8 *pch; -+ char *ptmp, tmp; -+ u8 Status; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ _rtw_memset(btmaskfileBuffer, 0x00, sizeof(btmaskfileBuffer)); -+ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ *(extra + wrqu->data.length) = '\0'; -+ ptmp = extra; -+ -+ if (strncmp(extra, "data,", 5) == 0) { -+ u8 count = 0; -+ u8 i = 0; -+ -+ pch = strsep(&ptmp, ","); -+ -+ if ((pch == NULL) || (strlen(pch) == 0)) { -+ RTW_INFO("%s: parameter error(no cmd)!\n", __func__); -+ return -EFAULT; -+ } -+ -+ do { -+ pch = strsep(&ptmp, ":"); -+ if ((pch == NULL) || (strlen(pch) == 0)) -+ break; -+ if (strlen(pch) != 2 -+ || IsHexDigit(*pch) == _FALSE -+ || IsHexDigit(*(pch + 1)) == _FALSE -+ || sscanf(pch, "%hhx", &tmp) != 1 -+ ) { -+ RTW_INFO("%s: invalid 8-bit hex! input format: data,01:23:45:67:89:ab:cd:ef...\n", __func__); -+ return -EFAULT; -+ } -+ btmaskfileBuffer[count++] = tmp; -+ -+ } while (count < 64); -+ -+ _rtw_memset(extra, '\0' , strlen(extra)); -+ -+ for (i = 0; i < count; i++) -+ ptmp += sprintf(ptmp, "%02x:", btmaskfileBuffer[i]); -+ -+ padapter->registrypriv.bBTFileMaskEfuse = _TRUE; -+ -+ ptmp += sprintf(ptmp, "\nLoad BT Efuse Mask data %d hex ok\n", count); -+ wrqu->data.length = strlen(extra); -+ return 0; -+ } -+ rtw_efuse_mask_file_path = extra; -+ -+ if (rtw_is_file_readable(rtw_efuse_mask_file_path) == _TRUE) { -+ RTW_INFO("%s do rtw_is_file_readable = %s! ,sizeof BT maskfileBuffer %zu\n", __func__, rtw_efuse_mask_file_path, sizeof(btmaskfileBuffer)); -+ Status = rtw_efuse_file_read(padapter, rtw_efuse_mask_file_path, btmaskfileBuffer, sizeof(btmaskfileBuffer)); -+ _rtw_memset(extra, '\0' , strlen(extra)); -+ if (Status == _TRUE) { -+ padapter->registrypriv.bBTFileMaskEfuse = _TRUE; -+ ptmp += sprintf(ptmp, "BT efuse mask file read OK\n"); -+ } else { -+ padapter->registrypriv.bBTFileMaskEfuse = _FALSE; -+ ptmp += sprintf(ptmp, "read BT efuse mask file FAIL\n"); -+ RTW_INFO("%s rtw_efuse_file_read BT mask fail!\n", __func__); -+ } -+ } else { -+ padapter->registrypriv.bBTFileMaskEfuse = _FALSE; -+ ptmp += sprintf(ptmp, "BT efuse mask file readable FAIL\n"); -+ RTW_INFO("%s rtw_is_file_readable BT Mask file fail!\n", __func__); -+ } -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_efuse_mask_file(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ char *rtw_efuse_mask_file_path; -+ u8 Status; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ -+ _rtw_memset(maskfileBuffer, 0x00, sizeof(maskfileBuffer)); -+ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ *(extra + wrqu->data.length) = '\0'; -+ if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) { -+ padapter->registrypriv.boffefusemask = 1; -+ sprintf(extra, "Turn off Efuse Mask\n"); -+ wrqu->data.length = strlen(extra); -+ return 0; -+ } -+ if (strncmp(extra, "on", 2) == 0 && strlen(extra) < 3) { -+ padapter->registrypriv.boffefusemask = 0; -+ sprintf(extra, "Turn on Efuse Mask\n"); -+ wrqu->data.length = strlen(extra); -+ return 0; -+ } -+ if (strncmp(extra, "data,", 5) == 0) { -+ u8 *pch; -+ char *ptmp, tmp; -+ u8 count = 0; -+ u8 i = 0; -+ -+ ptmp = extra; -+ pch = strsep(&ptmp, ","); -+ -+ if ((pch == NULL) || (strlen(pch) == 0)) { -+ RTW_INFO("%s: parameter error(no cmd)!\n", __func__); -+ return -EFAULT; -+ } -+ -+ do { -+ pch = strsep(&ptmp, ":"); -+ if ((pch == NULL) || (strlen(pch) == 0)) -+ break; -+ if (strlen(pch) != 2 -+ || IsHexDigit(*pch) == _FALSE -+ || IsHexDigit(*(pch + 1)) == _FALSE -+ || sscanf(pch, "%hhx", &tmp) != 1 -+ ) { -+ RTW_INFO("%s: invalid 8-bit hex! input format: data,01:23:45:67:89:ab:cd:ef...\n", __func__); -+ return -EFAULT; -+ } -+ maskfileBuffer[count++] = tmp; -+ -+ } while (count < 64); -+ -+ _rtw_memset(extra, '\0' , strlen(extra)); -+ -+ for (i = 0; i < count; i++) -+ ptmp += sprintf(ptmp, "%02x:", maskfileBuffer[i]); -+ -+ padapter->registrypriv.bFileMaskEfuse = _TRUE; -+ -+ sprintf(ptmp, "\nLoad Efuse Mask data %d hex ok\n", count); -+ wrqu->data.length = strlen(extra); -+ return 0; -+ } -+ rtw_efuse_mask_file_path = extra; -+ -+ if (rtw_is_file_readable(rtw_efuse_mask_file_path) == _TRUE) { -+ RTW_INFO("%s do rtw_efuse_mask_file_read = %s! ,sizeof maskfileBuffer %zu\n", __func__, rtw_efuse_mask_file_path, sizeof(maskfileBuffer)); -+ Status = rtw_efuse_file_read(padapter, rtw_efuse_mask_file_path, maskfileBuffer, sizeof(maskfileBuffer)); -+ if (Status == _TRUE) { -+ padapter->registrypriv.bFileMaskEfuse = _TRUE; -+ sprintf(extra, "efuse mask file read OK\n"); -+ } else { -+ padapter->registrypriv.bFileMaskEfuse = _FALSE; -+ sprintf(extra, "read efuse mask file FAIL\n"); -+ RTW_INFO("%s rtw_efuse_file_read mask fail!\n", __func__); -+ } -+ } else { -+ padapter->registrypriv.bFileMaskEfuse = _FALSE; -+ sprintf(extra, "efuse mask file readable FAIL\n"); -+ RTW_INFO("%s rtw_is_file_readable fail!\n", __func__); -+ } -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_efuse_file_map(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ char *rtw_efuse_file_map_path; -+ u8 Status; -+ PEFUSE_HAL pEfuseHal; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ -+ pEfuseHal = &pHalData->EfuseHal; -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ rtw_efuse_file_map_path = extra; -+ -+ _rtw_memset(pEfuseHal->fakeEfuseModifiedMap, 0xFF, EFUSE_MAX_MAP_LEN); -+ -+ if (rtw_is_file_readable(rtw_efuse_file_map_path) == _TRUE) { -+ RTW_INFO("%s do rtw_efuse_mask_file_read = %s!\n", __func__, rtw_efuse_file_map_path); -+ Status = rtw_efuse_file_read(padapter, rtw_efuse_file_map_path, pEfuseHal->fakeEfuseModifiedMap, sizeof(pEfuseHal->fakeEfuseModifiedMap)); -+ if (Status == _TRUE) { -+ pmp_priv->bloadefusemap = _TRUE; -+ sprintf(extra, "efuse file file_read OK\n"); -+ } else { -+ pmp_priv->bloadefusemap = _FALSE; -+ sprintf(extra, "efuse file file_read FAIL\n"); -+ } -+ } else { -+ sprintf(extra, "efuse file readable FAIL\n"); -+ RTW_INFO("%s rtw_is_file_readable fail!\n", __func__); -+ } -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+ -+int rtw_efuse_file_map_store(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ char *rtw_efuse_file_map_path; -+ u8 Status; -+ u16 mapLen; -+ PEFUSE_HAL pEfuseHal; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ -+ pEfuseHal = &pHalData->EfuseHal; -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ rtw_efuse_file_map_path = extra; -+ RTW_INFO("%s rtw_is_file_readable! %s\n", __func__, rtw_efuse_file_map_path); -+ -+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN , (void *)&mapLen, _FALSE); -+ -+ if (mapLen != 0) { -+ RTW_INFO("%s, efuse store path = %s! mapLen = %d\n", __func__, rtw_efuse_file_map_path, mapLen); -+ Status = rtw_efuse_file_store(padapter, rtw_efuse_file_map_path, pEfuseHal->fakeEfuseModifiedMap, mapLen); -+ if (Status) { -+ sprintf(extra, "efuse file restore OK\n"); -+ } else { -+ sprintf(extra, "efuse file restore FAIL\n"); -+ } -+ } else { -+ sprintf(extra, "efuse file readable FAIL\n"); -+ RTW_INFO("%s rtw_is_file_readable fail! map Len %d\n", __func__, mapLen); -+ } -+ -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+int rtw_bt_efuse_file_map(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ char *rtw_efuse_file_map_path; -+ u8 Status; -+ PEFUSE_HAL pEfuseHal; -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ struct mp_priv *pmp_priv = &padapter->mppriv; -+ -+ pEfuseHal = &pHalData->EfuseHal; -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ rtw_efuse_file_map_path = extra; -+ -+ _rtw_memset(pEfuseHal->fakeBTEfuseModifiedMap, 0xFF, EFUSE_BT_MAX_MAP_LEN); -+ -+ if (rtw_is_file_readable(rtw_efuse_file_map_path) == _TRUE) { -+ RTW_INFO("%s do rtw_efuse_mask_file_read = %s!\n", __func__, rtw_efuse_file_map_path); -+ Status = rtw_efuse_file_read(padapter, rtw_efuse_file_map_path, pEfuseHal->fakeBTEfuseModifiedMap, sizeof(pEfuseHal->fakeBTEfuseModifiedMap)); -+ if (Status == _TRUE) { -+ pmp_priv->bloadBTefusemap = _TRUE; -+ sprintf(extra, "BT efuse file file_read OK\n"); -+ } else { -+ pmp_priv->bloadBTefusemap = _FALSE; -+ sprintf(extra, "BT efuse file file_read FAIL\n"); -+ } -+ } else { -+ sprintf(extra, "BT efuse file readable FAIL\n"); -+ RTW_INFO("%s rtw_is_file_readable fail!\n", __func__); -+ } -+ wrqu->data.length = strlen(extra); -+ return 0; -+} -+ -+ -+static inline void dump_buf(u8 *buf, u32 len) -+{ -+ u32 i; -+ -+ RTW_INFO("-----------------Len %d----------------\n", len); -+ for (i = 0; i < len; i++) -+ RTW_INFO("%2.2x-", *(buf + i)); -+ RTW_INFO("\n"); -+} -+ -+int rtw_mp_link(struct net_device *dev, -+ struct iw_request_info *info, -+ struct iw_point *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct mp_priv *pmp_priv; -+ char input[RTW_IWD_MAX_LEN]; -+ int bgetrxdata = 0, btxdata = 0, bsetbt = 0; -+ u8 err = 0; -+ u32 i = 0, datalen = 0,jj, kk, waittime = 0; -+ u16 val = 0x00, ret = 0; -+ char *pextra = NULL; -+ u8 *setdata = NULL; -+ char *pch, *ptmp, *token, *tmp[4] = {0x00, 0x00, 0x00}; -+ -+ pmp_priv = &padapter->mppriv; -+ -+ if (rtw_do_mp_iwdata_len_chk(__func__, wrqu->length)) -+ return -EFAULT; -+ -+ if (copy_from_user(input, wrqu->pointer, wrqu->length)) -+ return -EFAULT; -+ -+ _rtw_memset(extra, 0, wrqu->length); -+ -+ RTW_INFO("%s: in=%s\n", __func__, input); -+ -+ bgetrxdata = (strncmp(input, "rxdata", 6) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ -+ btxdata = (strncmp(input, "txdata", 6) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ -+ bsetbt = (strncmp(input, "setbt", 5) == 0) ? 1 : 0; /* strncmp TRUE is 0*/ -+ -+ if (bgetrxdata) { -+ RTW_INFO("%s: in= 1 \n", __func__); -+ if (pmp_priv->mplink_brx == _TRUE) { -+ pch = extra; -+ while (waittime < 100 && pmp_priv->mplink_brx == _FALSE) { -+ if (pmp_priv->mplink_brx == _FALSE) -+ rtw_msleep_os(10); -+ else -+ break; -+ waittime++; -+ } -+ if (pmp_priv->mplink_brx == _TRUE) { -+ pch += sprintf(pch, "\n"); -+ -+ for (i = 0; i < pmp_priv->mplink_rx_len; i ++) { -+ pch += sprintf(pch, "%02x:", pmp_priv->mplink_buf[i]); -+ } -+ _rtw_memset(pmp_priv->mplink_buf, '\0' , sizeof(pmp_priv->mplink_buf)); -+ pmp_priv->mplink_brx = _FALSE; -+ } -+ } -+ } else if (btxdata) { -+ struct pkt_attrib *pattrib; -+ -+ pch = input; -+ setdata = rtw_zmalloc(1024); -+ if (setdata == NULL) { -+ err = -ENOMEM; -+ goto exit; -+ } -+ -+ i = 0; -+ while ((token = strsep(&pch, ",")) != NULL) { -+ if (i > 2) -+ break; -+ tmp[i] = token; -+ i++; -+ } -+ -+ /* tmp[0],[1],[2] */ -+ /* txdata,00e04c871200........... */ -+ if (strcmp(tmp[0], "txdata") == 0) { -+ if (tmp[1] == NULL) { -+ err = -EINVAL; -+ goto exit; -+ } -+ } -+ -+ datalen = strlen(tmp[1]); -+ if (datalen % 2) { -+ err = -EINVAL; -+ goto exit; -+ } -+ datalen /= 2; -+ if (datalen == 0) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ RTW_INFO("%s: data len=%d\n", __FUNCTION__, datalen); -+ RTW_INFO("%s: tx data=%s\n", __FUNCTION__, tmp[1]); -+ -+ for (jj = 0, kk = 0; jj < datalen; jj++, kk += 2) -+ setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); -+ -+ dump_buf(setdata, datalen); -+ _rtw_memset(pmp_priv->mplink_buf, '\0' , sizeof(pmp_priv->mplink_buf)); -+ _rtw_memcpy(pmp_priv->mplink_buf, setdata, datalen); -+ -+ pattrib = &pmp_priv->tx.attrib; -+ pattrib->pktlen = datalen; -+ pmp_priv->tx.count = 1; -+ pmp_priv->tx.stop = 0; -+ pmp_priv->mplink_btx = _TRUE; -+ SetPacketTx(padapter); -+ pmp_priv->mode = MP_PACKET_TX; -+ -+ } else if (bsetbt) { -+ -+#ifdef CONFIG_BT_COEXIST -+ pch = input; -+ i = 0; -+ -+ while ((token = strsep(&pch, ",")) != NULL) { -+ if (i > 3) -+ break; -+ tmp[i] = token; -+ i++; -+ } -+ -+ if (tmp[1] == NULL) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ if (strcmp(tmp[1], "scbd") == 0) { -+ u16 org_val = 0x8002, pre_val, read_score_board_val; -+ u8 state; -+ -+ pre_val = (rtw_read16(padapter,(0xaa))) & 0x7fff; -+ -+ if (tmp[2] != NULL) { -+ state = simple_strtoul(tmp[2], &ptmp, 10); -+ -+ if (state) -+ org_val = org_val | BIT6; -+ else -+ org_val = org_val & (~BIT6); -+ -+ if (org_val != pre_val) { -+ pre_val = org_val; -+ rtw_write16(padapter, 0xaa, org_val); -+ RTW_INFO("%s,setbt scbd write org_val = 0x%x , pre_val = 0x%x\n", __func__, org_val, pre_val); -+ } else { -+ RTW_INFO("%s,setbt scbd org_val = 0x%x ,pre_val = 0x%x\n", __func__, org_val, pre_val); -+ } -+ } else { -+ read_score_board_val = (rtw_read16(padapter,(0xaa))) & 0x7fff; -+ RTW_INFO("%s,read_score_board_val = 0x%x\n", __func__, read_score_board_val); -+ } -+ goto exit; -+ -+ } else if (strcmp(tmp[1], "testmode") == 0) { -+ -+ if (tmp[2] == NULL) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ val = simple_strtoul(tmp[2], &ptmp, 16); -+ RTW_INFO("get tmp, type %s, val =0x%x!\n", tmp[1], val); -+ -+ if (tmp[2] != NULL) { -+ _rtw_memset(extra, 0, wrqu->length); -+ pch = extra; -+ ret = rtw_btcoex_btset_testmode(padapter, val); -+ if (!CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(ret, BT_STATUS_BT_OP_SUCCESS)) { -+ RTW_INFO("%s: BT_OP fail = 0x%x!\n", __FUNCTION__, val); -+ pch += sprintf(pch, "BT_OP fail 0x%x!\n", val); -+ } else -+ pch += sprintf(pch, "Set BT_OP 0x%x done!\n", val); -+ } -+ -+ } -+#endif /* CONFIG_BT_COEXIST */ -+ } -+ -+exit: -+ if (setdata) -+ rtw_mfree(setdata, 1024); -+ -+ wrqu->length = strlen(extra); -+ return err; -+ -+} -+ -+#if defined(CONFIG_RTL8723B) -+int rtw_mp_SetBT(struct net_device *dev, -+ struct iw_request_info *info, -+ union iwreq_data *wrqu, char *extra) -+{ -+ PADAPTER padapter = rtw_netdev_priv(dev); -+ struct hal_ops *pHalFunc = &padapter->hal_func; -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+ -+ BT_REQ_CMD BtReq; -+ PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); -+ PBT_RSP_CMD pBtRsp = (PBT_RSP_CMD)&pMptCtx->mptOutBuf[0]; -+ char input[128]; -+ char *pch, *ptmp, *token, *tmp[2] = {0x00, 0x00}; -+ u8 setdata[100]; -+ u8 resetbt = 0x00; -+ u8 tempval, BTStatus; -+ u8 H2cSetbtmac[6]; -+ u8 u1H2CBtMpOperParm[4] = {0x01}; -+ int testmode = 1, ready = 1, trxparam = 1, setgen = 1, getgen = 1, testctrl = 1, testbt = 1, readtherm = 1, setbtmac = 1; -+ u32 i = 0, ii = 0, jj = 0, kk = 0, cnts = 0, status = 0; -+ PRT_MP_FIRMWARE pBTFirmware = NULL; -+ -+ if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) -+ return -EFAULT; -+ -+ *(extra + wrqu->data.length) = '\0'; -+ pch = extra; -+ -+ if (strlen(extra) < 1) -+ return -EFAULT; -+ -+ RTW_INFO("%s:iwpriv in=%s\n", __func__, extra); -+ ready = strncmp(extra, "ready", 5); -+ testmode = strncmp(extra, "testmode", 8); /* strncmp TRUE is 0*/ -+ trxparam = strncmp(extra, "trxparam", 8); -+ setgen = strncmp(extra, "setgen", 6); -+ getgen = strncmp(extra, "getgen", 6); -+ testctrl = strncmp(extra, "testctrl", 8); -+ testbt = strncmp(extra, "testbt", 6); -+ readtherm = strncmp(extra, "readtherm", 9); -+ setbtmac = strncmp(extra, "setbtmac", 8); -+ -+ if (strncmp(extra, "dlbt", 4) == 0) { -+ pHalData->LastHMEBoxNum = 0; -+ pHalData->bBTFWReady = _FALSE; -+ rtw_write8(padapter, 0xa3, 0x05); -+ BTStatus = rtw_read8(padapter, 0xa0); -+ RTW_INFO("%s: btwmap before read 0xa0 BT Status =0x%x\n", __func__, BTStatus); -+ if (BTStatus != 0x04) { -+ pch += sprintf(pch, "BT Status not Active DLFW FAIL\n"); -+ goto exit; -+ } -+ -+ tempval = rtw_read8(padapter, 0x6B); -+ tempval |= BIT7; -+ rtw_write8(padapter, 0x6B, tempval); -+ -+ /* Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay*/ -+ /* So don't write 0x6A[14]=1 and 0x6A[15]=0 together!*/ -+ rtw_usleep_os(100); -+ /* disable BT power cut*/ -+ /* 0x6A[14] = 0*/ -+ tempval = rtw_read8(padapter, 0x6B); -+ tempval &= ~BIT6; -+ rtw_write8(padapter, 0x6B, tempval); -+ rtw_usleep_os(100); -+ MPT_PwrCtlDM(padapter, 0); -+ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) | 0x00000004)); -+ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) & 0xFFFFFFEF)); -+ rtw_msleep_os(600); -+ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) | 0x00000010)); -+ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) & 0xFFFFFFFB)); -+ rtw_msleep_os(1200); -+ pBTFirmware = (PRT_MP_FIRMWARE)rtw_zmalloc(sizeof(RT_MP_FIRMWARE)); -+ if (pBTFirmware == NULL) -+ goto exit; -+ pHalData->bBTFWReady = _FALSE; -+ FirmwareDownloadBT(padapter, pBTFirmware); -+ if (pBTFirmware) -+ rtw_mfree((u8 *)pBTFirmware, sizeof(RT_MP_FIRMWARE)); -+ -+ RTW_INFO("Wait for FirmwareDownloadBT fw boot!\n"); -+ rtw_msleep_os(2000); -+ _rtw_memset(extra, '\0', wrqu->data.length); -+ BtReq.opCodeVer = 1; -+ BtReq.OpCode = 0; -+ BtReq.paraLength = 0; -+ mptbt_BtControlProcess(padapter, &BtReq); -+ rtw_msleep_os(100); -+ -+ RTW_INFO("FirmwareDownloadBT ready = 0x%x 0x%x", pMptCtx->mptOutBuf[4], pMptCtx->mptOutBuf[5]); -+ if ((pMptCtx->mptOutBuf[4] == 0x00) && (pMptCtx->mptOutBuf[5] == 0x00)) { -+ -+ if (padapter->mppriv.bTxBufCkFail == _TRUE) -+ pch += sprintf(pch, "check TxBuf Fail.\n"); -+ else -+ pch += sprintf(pch, "download FW Fail.\n"); -+ } else { -+ pch += sprintf(pch, "download FW OK.\n"); -+ goto exit; -+ } -+ goto exit; -+ } -+ if (strncmp(extra, "dlfw", 4) == 0) { -+ pHalData->LastHMEBoxNum = 0; -+ pHalData->bBTFWReady = _FALSE; -+ rtw_write8(padapter, 0xa3, 0x05); -+ BTStatus = rtw_read8(padapter, 0xa0); -+ RTW_INFO("%s: btwmap before read 0xa0 BT Status =0x%x\n", __func__, BTStatus); -+ if (BTStatus != 0x04) { -+ pch += sprintf(pch, "BT Status not Active DLFW FAIL\n"); -+ goto exit; -+ } -+ -+ tempval = rtw_read8(padapter, 0x6B); -+ tempval |= BIT7; -+ rtw_write8(padapter, 0x6B, tempval); -+ -+ /* Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay*/ -+ /* So don't write 0x6A[14]=1 and 0x6A[15]=0 together!*/ -+ rtw_usleep_os(100); -+ /* disable BT power cut*/ -+ /* 0x6A[14] = 0*/ -+ tempval = rtw_read8(padapter, 0x6B); -+ tempval &= ~BIT6; -+ rtw_write8(padapter, 0x6B, tempval); -+ rtw_usleep_os(100); -+ -+ MPT_PwrCtlDM(padapter, 0); -+ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) | 0x00000004)); -+ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) & 0xFFFFFFEF)); -+ rtw_msleep_os(600); -+ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) | 0x00000010)); -+ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) & 0xFFFFFFFB)); -+ rtw_msleep_os(1200); -+ -+#if defined(CONFIG_PLATFORM_SPRD) && (MP_DRIVER == 1) -+ /* Pull up BT reset pin.*/ -+ RTW_INFO("%s: pull up BT reset pin when bt start mp test\n", __func__); -+ rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON); -+#endif -+ RTW_INFO(" FirmwareDownload!\n"); -+ -+#if defined(CONFIG_RTL8723B) -+ status = rtl8723b_FirmwareDownload(padapter, _FALSE); -+#endif -+ RTW_INFO("Wait for FirmwareDownloadBT fw boot!\n"); -+ rtw_msleep_os(1000); -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_HaltNotify(padapter); -+ RTW_INFO("SetBT btcoex HaltNotify !\n"); -+ /*hal_btcoex1ant_SetAntPath(padapter);*/ -+ rtw_btcoex_SetManualControl(padapter, _TRUE); -+#endif -+ _rtw_memset(extra, '\0', wrqu->data.length); -+ BtReq.opCodeVer = 1; -+ BtReq.OpCode = 0; -+ BtReq.paraLength = 0; -+ mptbt_BtControlProcess(padapter, &BtReq); -+ rtw_msleep_os(200); -+ -+ RTW_INFO("FirmwareDownloadBT ready = 0x%x 0x%x", pMptCtx->mptOutBuf[4], pMptCtx->mptOutBuf[5]); -+ if ((pMptCtx->mptOutBuf[4] == 0x00) && (pMptCtx->mptOutBuf[5] == 0x00)) { -+ if (padapter->mppriv.bTxBufCkFail == _TRUE) -+ pch += sprintf(pch, "check TxBuf Fail.\n"); -+ else -+ pch += sprintf(pch, "download FW Fail.\n"); -+ } else { -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_SwitchBtTRxMask(padapter); -+#endif -+ rtw_msleep_os(200); -+ pch += sprintf(pch, "download FW OK.\n"); -+ goto exit; -+ } -+ goto exit; -+ } -+ -+ if (strncmp(extra, "down", 4) == 0) { -+ RTW_INFO("SetBT down for to hal_init !\n"); -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_SetManualControl(padapter, _FALSE); -+ rtw_btcoex_Initialize(padapter); -+#endif -+ pHalFunc->read_adapter_info(padapter); -+ pHalFunc->hal_deinit(padapter); -+ pHalFunc->hal_init(padapter); -+ rtw_pm_set_ips(padapter, IPS_NONE); -+ LeaveAllPowerSaveMode(padapter); -+ MPT_PwrCtlDM(padapter, 0); -+ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) | 0x00000004)); -+ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) & 0xFFFFFFEF)); -+ rtw_msleep_os(600); -+ /*rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a)& 0xFFFFFFFE));*/ -+ rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b) | 0x00000010)); -+ rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc) & 0xFFFFFFFB)); -+ rtw_msleep_os(1200); -+ goto exit; -+ } -+ if (strncmp(extra, "disable", 7) == 0) { -+ RTW_INFO("SetBT disable !\n"); -+ rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a) & 0xFFFFFFFB)); -+ rtw_msleep_os(500); -+ goto exit; -+ } -+ if (strncmp(extra, "enable", 6) == 0) { -+ RTW_INFO("SetBT enable !\n"); -+ rtw_write32(padapter, 0x6a, (rtw_read32(padapter, 0x6a) | 0x00000004)); -+ rtw_msleep_os(500); -+ goto exit; -+ } -+ if (strncmp(extra, "h2c", 3) == 0) { -+ RTW_INFO("SetBT h2c !\n"); -+ pHalData->bBTFWReady = _TRUE; -+ rtw_hal_fill_h2c_cmd(padapter, 0x63, 1, u1H2CBtMpOperParm); -+ goto exit; -+ } -+ if (strncmp(extra, "2ant", 4) == 0) { -+ RTW_INFO("Set BT 2ant use!\n"); -+ phy_set_mac_reg(padapter, 0x67, BIT5, 0x1); -+ rtw_write32(padapter, 0x948, 0000); -+ -+ goto exit; -+ } -+ -+ if (ready != 0 && testmode != 0 && trxparam != 0 && setgen != 0 && getgen != 0 && testctrl != 0 && testbt != 0 && readtherm != 0 && setbtmac != 0) -+ return -EFAULT; -+ -+ if (testbt == 0) { -+ BtReq.opCodeVer = 1; -+ BtReq.OpCode = 6; -+ BtReq.paraLength = cnts / 2; -+ goto todo; -+ } -+ if (ready == 0) { -+ BtReq.opCodeVer = 1; -+ BtReq.OpCode = 0; -+ BtReq.paraLength = 0; -+ goto todo; -+ } -+ -+ i = 0; -+ while ((token = strsep(&pch, ",")) != NULL) { -+ if (i > 1) -+ break; -+ tmp[i] = token; -+ i++; -+ } -+ -+ if ((tmp[0] != NULL) && (tmp[1] != NULL)) { -+ cnts = strlen(tmp[1]); -+ if (cnts < 1) -+ return -EFAULT; -+ -+ RTW_INFO("%s: cnts=%d\n", __func__, cnts); -+ RTW_INFO("%s: data=%s\n", __func__, tmp[1]); -+ -+ for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2) { -+ BtReq.pParamStart[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]); -+ /* RTW_INFO("BtReq.pParamStart[%d]=0x%02x\n", jj, BtReq.pParamStart[jj]);*/ -+ } -+ } else -+ return -EFAULT; -+ -+ if (testmode == 0) { -+ BtReq.opCodeVer = 1; -+ BtReq.OpCode = 1; -+ BtReq.paraLength = 1; -+ } -+ if (trxparam == 0) { -+ BtReq.opCodeVer = 1; -+ BtReq.OpCode = 2; -+ BtReq.paraLength = cnts / 2; -+ } -+ if (setgen == 0) { -+ RTW_INFO("%s: BT_SET_GENERAL\n", __func__); -+ BtReq.opCodeVer = 1; -+ BtReq.OpCode = 3;/*BT_SET_GENERAL 3*/ -+ BtReq.paraLength = cnts / 2; -+ } -+ if (getgen == 0) { -+ RTW_INFO("%s: BT_GET_GENERAL\n", __func__); -+ BtReq.opCodeVer = 1; -+ BtReq.OpCode = 4;/*BT_GET_GENERAL 4*/ -+ BtReq.paraLength = cnts / 2; -+ } -+ if (readtherm == 0) { -+ RTW_INFO("%s: BT_GET_GENERAL\n", __func__); -+ BtReq.opCodeVer = 1; -+ BtReq.OpCode = 4;/*BT_GET_GENERAL 4*/ -+ BtReq.paraLength = cnts / 2; -+ } -+ -+ if (testctrl == 0) { -+ RTW_INFO("%s: BT_TEST_CTRL\n", __func__); -+ BtReq.opCodeVer = 1; -+ BtReq.OpCode = 5;/*BT_TEST_CTRL 5*/ -+ BtReq.paraLength = cnts / 2; -+ } -+ -+ RTW_INFO("%s: Req opCodeVer=%d OpCode=%d paraLength=%d\n", -+ __func__, BtReq.opCodeVer, BtReq.OpCode, BtReq.paraLength); -+ -+ if (BtReq.paraLength < 1) -+ goto todo; -+ for (i = 0; i < BtReq.paraLength; i++) { -+ RTW_INFO("%s: BtReq.pParamStart[%d] = 0x%02x\n", -+ __func__, i, BtReq.pParamStart[i]); -+ } -+ -+todo: -+ _rtw_memset(extra, '\0', wrqu->data.length); -+ -+ if (pHalData->bBTFWReady == _FALSE) { -+ pch += sprintf(pch, "BTFWReady = FALSE.\n"); -+ goto exit; -+ } -+ -+ mptbt_BtControlProcess(padapter, &BtReq); -+ -+ if (readtherm == 0) { -+ pch += sprintf(pch, "BT thermal="); -+ for (i = 4; i < pMptCtx->mptOutLen; i++) { -+ if ((pMptCtx->mptOutBuf[i] == 0x00) && (pMptCtx->mptOutBuf[i + 1] == 0x00)) -+ goto exit; -+ -+ pch += sprintf(pch, " %d ", (pMptCtx->mptOutBuf[i] & 0x1f)); -+ } -+ } else { -+ for (i = 4; i < pMptCtx->mptOutLen; i++) -+ pch += sprintf(pch, " 0x%x ", pMptCtx->mptOutBuf[i]); -+ } -+ -+exit: -+ wrqu->data.length = strlen(extra) + 1; -+ RTW_INFO("-%s: output len=%d data=%s\n", __func__, wrqu->data.length, extra); -+ -+ return status; -+} -+ -+#endif /*#ifdef CONFIG_RTL8723B*/ -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/mlme_linux.c b/drivers/staging/rtl8723cs/os_dep/linux/mlme_linux.c -new file mode 100644 -index 000000000000..6fd24e8e2f3b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/mlme_linux.c -@@ -0,0 +1,444 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+#define _MLME_OSDEP_C_ -+ -+#include -+ -+ -+#ifdef RTK_DMP_PLATFORM -+void Linkup_workitem_callback(struct work_struct *work) -+{ -+ struct mlme_priv *pmlmepriv = container_of(work, struct mlme_priv, Linkup_workitem); -+ _adapter *padapter = container_of(pmlmepriv, _adapter, mlmepriv); -+ -+ -+ -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 12)) -+ kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_LINKUP); -+#else -+ kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_LINKUP); -+#endif -+ -+} -+ -+void Linkdown_workitem_callback(struct work_struct *work) -+{ -+ struct mlme_priv *pmlmepriv = container_of(work, struct mlme_priv, Linkdown_workitem); -+ _adapter *padapter = container_of(pmlmepriv, _adapter, mlmepriv); -+ -+ -+ -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 12)) -+ kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_LINKDOWN); -+#else -+ kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_LINKDOWN); -+#endif -+ -+} -+#endif -+ -+extern void rtw_indicate_wx_assoc_event(_adapter *padapter); -+extern void rtw_indicate_wx_disassoc_event(_adapter *padapter); -+ -+void rtw_os_indicate_connect(_adapter *adapter) -+{ -+ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || -+ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) -+ rtw_cfg80211_ibss_indicate_connect(adapter); -+ else -+ rtw_cfg80211_indicate_connect(adapter); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ rtw_indicate_wx_assoc_event(adapter); -+ -+#ifdef CONFIG_RTW_MESH -+#if CONFIG_RTW_MESH_CTO_MGATE_CARRIER -+ if (!rtw_mesh_cto_mgate_required(adapter)) -+#endif -+#endif -+ rtw_netif_carrier_on(adapter->pnetdev); -+ -+ if (adapter->pid[2] != 0) -+ rtw_signal_process(adapter->pid[2], SIGALRM); -+ -+#ifdef RTK_DMP_PLATFORM -+ _set_workitem(&adapter->mlmepriv.Linkup_workitem); -+#endif -+ -+ -+} -+ -+extern void indicate_wx_scan_complete_event(_adapter *padapter); -+void rtw_os_indicate_scan_done(_adapter *padapter, bool aborted) -+{ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_indicate_scan_done(padapter, aborted); -+#endif -+ indicate_wx_scan_complete_event(padapter); -+} -+ -+static RT_PMKID_LIST backupPMKIDList[NUM_PMKID_CACHE]; -+void rtw_reset_securitypriv(_adapter *adapter) -+{ -+ u8 backupPMKIDIndex = 0; -+ u8 backupTKIPCountermeasure = 0x00; -+ u32 backupTKIPcountermeasure_time = 0; -+ /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ _irqL irqL; -+ -+ _enter_critical_bh(&adapter->security_key_mutex, &irqL); -+ -+ if (adapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { /* 802.1x */ -+ u8 backup_sw_encrypt, backup_sw_decrypt; -+ -+ backup_sw_encrypt = adapter->securitypriv.sw_encrypt; -+ backup_sw_decrypt = adapter->securitypriv.sw_decrypt; -+ -+ /* Added by Albert 2009/02/18 */ -+ /* We have to backup the PMK information for WiFi PMK Caching test item. */ -+ /* */ -+ /* Backup the btkip_countermeasure information. */ -+ /* When the countermeasure is trigger, the driver have to disconnect with AP for 60 seconds. */ -+ -+ _rtw_memset(&backupPMKIDList[0], 0x00, sizeof(RT_PMKID_LIST) * NUM_PMKID_CACHE); -+ -+ _rtw_memcpy(&backupPMKIDList[0], &adapter->securitypriv.PMKIDList[0], sizeof(RT_PMKID_LIST) * NUM_PMKID_CACHE); -+ backupPMKIDIndex = adapter->securitypriv.PMKIDIndex; -+ backupTKIPCountermeasure = adapter->securitypriv.btkip_countermeasure; -+ backupTKIPcountermeasure_time = adapter->securitypriv.btkip_countermeasure_time; -+ _rtw_memset((unsigned char *)&adapter->securitypriv, 0, sizeof(struct security_priv)); -+ -+ /* Added by Albert 2009/02/18 */ -+ /* Restore the PMK information to securitypriv structure for the following connection. */ -+ _rtw_memcpy(&adapter->securitypriv.PMKIDList[0], &backupPMKIDList[0], sizeof(RT_PMKID_LIST) * NUM_PMKID_CACHE); -+ adapter->securitypriv.PMKIDIndex = backupPMKIDIndex; -+ adapter->securitypriv.btkip_countermeasure = backupTKIPCountermeasure; -+ adapter->securitypriv.btkip_countermeasure_time = backupTKIPcountermeasure_time; -+ -+ adapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; -+ adapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; -+ -+ adapter->securitypriv.extauth_status = WLAN_STATUS_UNSPECIFIED_FAILURE; -+ -+ adapter->securitypriv.sw_encrypt = backup_sw_encrypt; -+ adapter->securitypriv.sw_decrypt = backup_sw_decrypt; -+ -+ } else { /* reset values in securitypriv */ -+ /* if(adapter->mlmepriv.fw_state & WIFI_STATION_STATE) */ -+ /* { */ -+ struct security_priv *psec_priv = &adapter->securitypriv; -+ -+ psec_priv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; /* open system */ -+ psec_priv->dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ psec_priv->dot11PrivacyKeyIndex = 0; -+ -+ psec_priv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ psec_priv->dot118021XGrpKeyid = 1; -+ -+ psec_priv->ndisauthtype = Ndis802_11AuthModeOpen; -+ psec_priv->ndisencryptstatus = Ndis802_11WEPDisabled; -+ /* } */ -+ -+ psec_priv->extauth_status = WLAN_STATUS_UNSPECIFIED_FAILURE; -+ } -+ /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ _exit_critical_bh(&adapter->security_key_mutex, &irqL); -+ -+ RTW_INFO(FUNC_ADPT_FMT" - End to Disconnect\n", FUNC_ADPT_ARG(adapter)); -+} -+ -+void rtw_os_indicate_disconnect(_adapter *adapter, u16 reason, u8 locally_generated) -+{ -+ /* RT_PMKID_LIST backupPMKIDList[NUM_PMKID_CACHE]; */ -+ -+ -+ rtw_netif_carrier_off(adapter->pnetdev); /* Do it first for tx broadcast pkt after disconnection issue! */ -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_indicate_disconnect(adapter, reason, locally_generated); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+ rtw_indicate_wx_disassoc_event(adapter); -+ -+#ifdef RTK_DMP_PLATFORM -+ _set_workitem(&adapter->mlmepriv.Linkdown_workitem); -+#endif -+ /* modify for CONFIG_IEEE80211W, none 11w also can use the same command */ -+ rtw_reset_securitypriv_cmd(adapter); -+ -+ -+} -+ -+void rtw_report_sec_ie(_adapter *adapter, u8 authmode, u8 *sec_ie) -+{ -+ uint len; -+ u8 *buff, *p, i; -+ union iwreq_data wrqu; -+ -+ -+ -+ buff = NULL; -+ if (authmode == _WPA_IE_ID_) { -+ -+ buff = rtw_zmalloc(IW_CUSTOM_MAX); -+ if (NULL == buff) { -+ RTW_INFO(FUNC_ADPT_FMT ": alloc memory FAIL!!\n", -+ FUNC_ADPT_ARG(adapter)); -+ return; -+ } -+ p = buff; -+ -+ p += sprintf(p, "ASSOCINFO(ReqIEs="); -+ -+ len = sec_ie[1] + 2; -+ len = (len < IW_CUSTOM_MAX) ? len : IW_CUSTOM_MAX; -+ -+ for (i = 0; i < len; i++) -+ p += sprintf(p, "%02x", sec_ie[i]); -+ -+ p += sprintf(p, ")"); -+ -+ _rtw_memset(&wrqu, 0, sizeof(wrqu)); -+ -+ wrqu.data.length = p - buff; -+ -+ wrqu.data.length = (wrqu.data.length < IW_CUSTOM_MAX) ? wrqu.data.length : IW_CUSTOM_MAX; -+ -+#ifndef CONFIG_IOCTL_CFG80211 -+ wireless_send_event(adapter->pnetdev, IWEVCUSTOM, &wrqu, buff); -+#endif -+ -+ rtw_mfree(buff, IW_CUSTOM_MAX); -+ } -+ -+ -+} -+ -+#ifdef CONFIG_AP_MODE -+ -+void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta) -+{ -+ union iwreq_data wrqu; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ if (psta == NULL) -+ return; -+ -+ if (psta->cmn.aid > pstapriv->max_aid) -+ return; -+ -+ if (pstapriv->sta_aid[psta->cmn.aid - 1] != psta) -+ return; -+ -+ -+ wrqu.addr.sa_family = ARPHRD_ETHER; -+ -+ _rtw_memcpy(wrqu.addr.sa_data, psta->cmn.mac_addr, ETH_ALEN); -+ -+ RTW_INFO("+rtw_indicate_sta_assoc_event\n"); -+ -+#ifndef CONFIG_IOCTL_CFG80211 -+ wireless_send_event(padapter->pnetdev, IWEVREGISTERED, &wrqu, NULL); -+#endif -+ -+} -+ -+void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta) -+{ -+ union iwreq_data wrqu; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ -+ if (psta == NULL) -+ return; -+ -+ if (psta->cmn.aid > pstapriv->max_aid) -+ return; -+ -+ if (pstapriv->sta_aid[psta->cmn.aid - 1] != psta) -+ return; -+ -+ -+ wrqu.addr.sa_family = ARPHRD_ETHER; -+ -+ _rtw_memcpy(wrqu.addr.sa_data, psta->cmn.mac_addr, ETH_ALEN); -+ -+ RTW_INFO("+rtw_indicate_sta_disassoc_event\n"); -+ -+#ifndef CONFIG_IOCTL_CFG80211 -+ wireless_send_event(padapter->pnetdev, IWEVEXPIRED, &wrqu, NULL); -+#endif -+ -+} -+ -+ -+#ifdef CONFIG_HOSTAPD_MLME -+ -+static int mgnt_xmit_entry(struct sk_buff *skb, struct net_device *pnetdev) -+{ -+ struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); -+ _adapter *padapter = (_adapter *)phostapdpriv->padapter; -+ -+ /* RTW_INFO("%s\n", __FUNCTION__); */ -+ -+ return rtw_hal_hostap_mgnt_xmit_entry(padapter, skb); -+} -+ -+static int mgnt_netdev_open(struct net_device *pnetdev) -+{ -+ struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); -+ -+ RTW_INFO("mgnt_netdev_open: MAC Address:" MAC_FMT "\n", MAC_ARG(pnetdev->dev_addr)); -+ -+ -+ init_usb_anchor(&phostapdpriv->anchored); -+ -+ rtw_netif_wake_queue(pnetdev); -+ -+ rtw_netif_carrier_on(pnetdev); -+ -+ /* rtw_write16(phostapdpriv->padapter, 0x0116, 0x0100); */ /* only excluding beacon */ -+ -+ return 0; -+} -+static int mgnt_netdev_close(struct net_device *pnetdev) -+{ -+ struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); -+ -+ RTW_INFO("%s\n", __FUNCTION__); -+ -+ usb_kill_anchored_urbs(&phostapdpriv->anchored); -+ -+ rtw_netif_carrier_off(pnetdev); -+ -+ rtw_netif_stop_queue(pnetdev); -+ -+ /* rtw_write16(phostapdpriv->padapter, 0x0116, 0x3f3f); */ -+ -+ return 0; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+static const struct net_device_ops rtl871x_mgnt_netdev_ops = { -+ .ndo_open = mgnt_netdev_open, -+ .ndo_stop = mgnt_netdev_close, -+ .ndo_start_xmit = mgnt_xmit_entry, -+ #if 0 -+ .ndo_set_mac_address = r871x_net_set_mac_address, -+ .ndo_get_stats = r871x_net_get_stats, -+ .ndo_do_ioctl = r871x_mp_ioctl, -+ #endif -+}; -+#endif -+ -+int hostapd_mode_init(_adapter *padapter) -+{ -+ unsigned char mac[ETH_ALEN]; -+ struct hostapd_priv *phostapdpriv; -+ struct net_device *pnetdev; -+ -+ pnetdev = rtw_alloc_etherdev(sizeof(struct hostapd_priv)); -+ if (!pnetdev) -+ return -ENOMEM; -+ -+ /* SET_MODULE_OWNER(pnetdev); */ -+ ether_setup(pnetdev); -+ -+ /* pnetdev->type = ARPHRD_IEEE80211; */ -+ -+ phostapdpriv = rtw_netdev_priv(pnetdev); -+ phostapdpriv->pmgnt_netdev = pnetdev; -+ phostapdpriv->padapter = padapter; -+ padapter->phostapdpriv = phostapdpriv; -+ -+ /* pnetdev->init = NULL; */ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+ -+ RTW_INFO("register rtl871x_mgnt_netdev_ops to netdev_ops\n"); -+ -+ pnetdev->netdev_ops = &rtl871x_mgnt_netdev_ops; -+ -+#else -+ -+ pnetdev->open = mgnt_netdev_open; -+ -+ pnetdev->stop = mgnt_netdev_close; -+ -+ pnetdev->hard_start_xmit = mgnt_xmit_entry; -+ -+ /* pnetdev->set_mac_address = r871x_net_set_mac_address; */ -+ -+ /* pnetdev->get_stats = r871x_net_get_stats; */ -+ -+ /* pnetdev->do_ioctl = r871x_mp_ioctl; */ -+ -+#endif -+ -+ pnetdev->watchdog_timeo = HZ; /* 1 second timeout */ -+ -+ /* pnetdev->wireless_handlers = NULL; */ -+ -+ -+ -+ -+ if (dev_alloc_name(pnetdev, "mgnt.wlan%d") < 0) -+ RTW_INFO("hostapd_mode_init(): dev_alloc_name, fail!\n"); -+ -+ -+ /* SET_NETDEV_DEV(pnetdev, pintfpriv->udev); */ -+ -+ -+ mac[0] = 0x00; -+ mac[1] = 0xe0; -+ mac[2] = 0x4c; -+ mac[3] = 0x87; -+ mac[4] = 0x11; -+ mac[5] = 0x12; -+ -+ _rtw_memcpy(pnetdev->dev_addr, mac, ETH_ALEN); -+ -+ -+ rtw_netif_carrier_off(pnetdev); -+ -+ -+ /* Tell the network stack we exist */ -+ if (register_netdev(pnetdev) != 0) { -+ RTW_INFO("hostapd_mode_init(): register_netdev fail!\n"); -+ -+ if (pnetdev) -+ rtw_free_netdev(pnetdev); -+ } -+ -+ return 0; -+ -+} -+ -+void hostapd_mode_unload(_adapter *padapter) -+{ -+ struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; -+ struct net_device *pnetdev = phostapdpriv->pmgnt_netdev; -+ -+ unregister_netdev(pnetdev); -+ rtw_free_netdev(pnetdev); -+ -+} -+ -+#endif -+#endif -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/nlrtw.c b/drivers/staging/rtl8723cs/os_dep/linux/nlrtw.c -new file mode 100644 -index 000000000000..14d164b7ac95 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/nlrtw.c -@@ -0,0 +1,583 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2020 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RTW_NLRTW_C_ -+ -+#include -+#include "nlrtw.h" -+ -+#ifdef CONFIG_RTW_NLRTW -+ -+#include -+#include -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 7, 0)) -+#include -+#endif -+ -+ -+enum nlrtw_cmds { -+ NLRTW_CMD_UNSPEC, -+ -+ NLRTW_CMD_CHANNEL_UTILIZATION, -+ NLRTW_CMD_REG_CHANGE, -+ NLRTW_CMD_REG_BEACON_HINT, -+ NLRTW_CMD_RADAR_EVENT, -+ NLRTW_CMD_RADIO_OPMODE, -+ -+ __NLRTW_CMD_AFTER_LAST, -+ NLRTW_CMD_MAX = __NLRTW_CMD_AFTER_LAST - 1 -+}; -+ -+enum nlrtw_attrs { -+ NLRTW_ATTR_UNSPEC, -+ -+ NLRTW_ATTR_WIPHY_NAME, -+ NLRTW_ATTR_CHANNEL_UTILIZATIONS, -+ NLRTW_ATTR_CHANNEL_UTILIZATION_THRESHOLD, -+ NLRTW_ATTR_CHANNEL_CENTER, -+ NLRTW_ATTR_CHANNEL_WIDTH, -+ NLRTW_ATTR_RADAR_EVENT, -+ NLRTW_ATTR_OP_CLASS, -+ NLRTW_ATTR_OP_CHANNEL, -+ NLRTW_ATTR_OP_TXPWR_MAX, -+ NLRTW_ATTR_IF_OPMODES, -+ -+ __NLRTW_ATTR_AFTER_LAST, -+ NUM_NLRTW_ATTR = __NLRTW_ATTR_AFTER_LAST, -+ NLRTW_ATTR_MAX = __NLRTW_ATTR_AFTER_LAST - 1 -+}; -+ -+enum nlrtw_ch_util_attrs { -+ __NLRTW_ATTR_CHANNEL_UTILIZATION_INVALID, -+ -+ NLRTW_ATTR_CHANNEL_UTILIZATION_VALUE, -+ NLRTW_ATTR_CHANNEL_UTILIZATION_BSSID, -+ -+ __NLRTW_ATTR_CHANNEL_UTILIZATION_AFTER_LAST, -+ NUM_NLRTW_ATTR_CHANNEL_UTILIZATION = __NLRTW_ATTR_CHANNEL_UTILIZATION_AFTER_LAST, -+ NLRTW_ATTR_CHANNEL_UTILIZATION_MAX = __NLRTW_ATTR_CHANNEL_UTILIZATION_AFTER_LAST - 1 -+}; -+ -+enum nlrtw_radar_event { -+ NLRTW_RADAR_DETECTED, -+ NLRTW_RADAR_CAC_FINISHED, -+ NLRTW_RADAR_CAC_ABORTED, -+ NLRTW_RADAR_NOP_FINISHED, -+ NLRTW_RADAR_NOP_STARTED, /* NON_OCP started not by local radar detection */ -+}; -+ -+enum nlrtw_if_opmode_attrs { -+ NLRTW_IF_OPMODE_UNSPEC, -+ -+ NLRTW_IF_OPMODE_MACADDR, -+ NLRTW_IF_OPMODE_OP_CLASS, -+ NLRTW_IF_OPMODE_OP_CHANNEL, -+ -+ __NLRTW_IF_OPMODE_ATTR_AFTER_LAST, -+ NUM_NLRTW_IF_OPMODE_ATTR = __NLRTW_IF_OPMODE_ATTR_AFTER_LAST, -+ NLRTW_IF_OPMODE_ATTR_MAX = __NLRTW_IF_OPMODE_ATTR_AFTER_LAST - 1 -+}; -+ -+static int nlrtw_ch_util_set(struct sk_buff *skb, struct genl_info *info) -+{ -+ unsigned int msg; -+ -+ if (!info->attrs[NLRTW_ATTR_CHANNEL_UTILIZATION_THRESHOLD]) -+ return -EINVAL; -+ msg = nla_get_u8(info->attrs[NLRTW_ATTR_CHANNEL_UTILIZATION_THRESHOLD]); -+ -+ return 0; -+} -+ -+static struct nla_policy nlrtw_genl_policy[NUM_NLRTW_ATTR] = { -+ [NLRTW_ATTR_CHANNEL_UTILIZATION_THRESHOLD] = { .type = NLA_U8 }, -+}; -+ -+static struct genl_ops nlrtw_genl_ops[] = { -+ { -+ .cmd = NLRTW_CMD_CHANNEL_UTILIZATION, -+ .flags = 0, -+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 2, 0) -+ .policy = nlrtw_genl_policy, -+#endif -+ .doit = nlrtw_ch_util_set, -+ .dumpit = NULL, -+ }, -+}; -+ -+enum nlrtw_multicast_groups { -+ NLRTW_MCGRP_DEFAULT, -+}; -+static struct genl_multicast_group nlrtw_genl_mcgrp[] = { -+ [NLRTW_MCGRP_DEFAULT] = { .name = "nlrtw_default" }, -+}; -+ -+/* family definition */ -+static struct genl_family nlrtw_genl_family = { -+ .hdrsize = 0, -+ .name = "nlrtw_"DRV_NAME, -+ .version = 1, -+ .maxattr = NLRTW_ATTR_MAX, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 2, 0) -+ .policy = nlrtw_genl_policy, -+#endif -+ .netnsok = true, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 12) -+ .module = THIS_MODULE, -+#endif -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0) -+ .ops = nlrtw_genl_ops, -+ .n_ops = ARRAY_SIZE(nlrtw_genl_ops), -+ .mcgrps = nlrtw_genl_mcgrp, -+ .n_mcgrps = ARRAY_SIZE(nlrtw_genl_mcgrp), -+#endif -+}; -+ -+static inline int nlrtw_multicast(const struct genl_family *family, -+ struct sk_buff *skb, u32 portid, -+ unsigned int group, gfp_t flags) -+{ -+ int ret; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0) -+ ret = genlmsg_multicast(&nlrtw_genl_family, skb, portid, group, flags); -+#else -+ ret = genlmsg_multicast(skb, portid, nlrtw_genl_mcgrp[group].id, flags); -+#endif -+ return ret; -+} -+ -+int rtw_nlrtw_ch_util_rpt(_adapter *adapter, u8 n_rpts, u8 *val, u8 **mac_addr) -+{ -+ struct sk_buff *skb = NULL; -+ void *msg_header = NULL; -+ struct nlattr *nl_ch_util, *nl_ch_utils; -+ struct wiphy *wiphy; -+ u8 i; -+ int ret; -+ -+ wiphy = adapter_to_wiphy(adapter); -+ if (!wiphy) -+ return -EINVAL; -+ -+ /* allocate memory */ -+ skb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); -+ if (!skb) { -+ nlmsg_free(skb); -+ return -ENOMEM; -+ } -+ -+ /* create the message headers */ -+ msg_header = genlmsg_put(skb, 0, 0, &nlrtw_genl_family, 0, -+ NLRTW_CMD_CHANNEL_UTILIZATION); -+ if (!msg_header) { -+ ret = -ENOMEM; -+ goto err_out; -+ } -+ -+ /* add attributes */ -+ ret = nla_put_string(skb, NLRTW_ATTR_WIPHY_NAME, wiphy_name(wiphy)); -+ -+ nl_ch_utils = nla_nest_start(skb, NLRTW_ATTR_CHANNEL_UTILIZATIONS); -+ if (!nl_ch_utils) { -+ ret = -EMSGSIZE; -+ goto err_out; -+ } -+ -+ for (i = 0; i < n_rpts; i++) { -+ nl_ch_util = nla_nest_start(skb, i); -+ if (!nl_ch_util) { -+ ret = -EMSGSIZE; -+ goto err_out; -+ } -+ -+ ret = nla_put(skb, NLRTW_ATTR_CHANNEL_UTILIZATION_BSSID, ETH_ALEN, *(mac_addr + i)); -+ if (ret != 0) -+ goto err_out; -+ -+ ret = nla_put_u8(skb, NLRTW_ATTR_CHANNEL_UTILIZATION_VALUE, *(val + i)); -+ if (ret != 0) -+ goto err_out; -+ -+ nla_nest_end(skb, nl_ch_util); -+ } -+ -+ nla_nest_end(skb, nl_ch_utils); -+ -+ /* finalize the message */ -+ genlmsg_end(skb, msg_header); -+ -+ ret = nlrtw_multicast(&nlrtw_genl_family, skb, 0, NLRTW_MCGRP_DEFAULT, GFP_KERNEL); -+ if (ret == -ESRCH) { -+ RTW_INFO("[%s] return ESRCH(No such process)." -+ " Maybe no process waits for this msg\n", __func__); -+ return ret; -+ } else if (ret != 0) { -+ RTW_INFO("[%s] ret = %d\n", __func__, ret); -+ return ret; -+ } -+ -+ return 0; -+err_out: -+ nlmsg_free(skb); -+ return ret; -+} -+ -+int rtw_nlrtw_reg_change_event(_adapter *adapter) -+{ -+ struct sk_buff *skb = NULL; -+ void *msg_header = NULL; -+ struct wiphy *wiphy; -+ u8 i; -+ int ret; -+ -+ wiphy = adapter_to_wiphy(adapter); -+ if (!wiphy) { -+ ret = -EINVAL; -+ goto err_out; -+ } -+ -+ /* allocate memory */ -+ skb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); -+ if (!skb) { -+ ret = -ENOMEM; -+ goto err_out; -+ } -+ -+ /* create the message headers */ -+ msg_header = genlmsg_put(skb, 0, 0, &nlrtw_genl_family, 0, NLRTW_CMD_REG_CHANGE); -+ if (!msg_header) { -+ ret = -ENOMEM; -+ goto err_out; -+ } -+ -+ /* add attributes */ -+ ret = nla_put_string(skb, NLRTW_ATTR_WIPHY_NAME, wiphy_name(wiphy)); -+ if (ret) -+ goto err_out; -+ -+ /* finalize the message */ -+ genlmsg_end(skb, msg_header); -+ -+ ret = nlrtw_multicast(&nlrtw_genl_family, skb, 0, NLRTW_MCGRP_DEFAULT, GFP_KERNEL); -+ if (ret == -ESRCH) { -+ RTW_DBG(FUNC_WIPHY_FMT" return -ESRCH(No such process)." -+ " Maybe no process waits for this msg\n", FUNC_WIPHY_ARG(wiphy)); -+ return ret; -+ } else if (ret != 0) { -+ RTW_WARN(FUNC_WIPHY_FMT" return %d\n", FUNC_WIPHY_ARG(wiphy), ret); -+ return ret; -+ } -+ -+ return 0; -+ -+err_out: -+ if (skb) -+ nlmsg_free(skb); -+ return ret; -+} -+ -+int rtw_nlrtw_reg_beacon_hint_event(_adapter *adapter) -+{ -+ struct sk_buff *skb = NULL; -+ void *msg_header = NULL; -+ struct wiphy *wiphy; -+ u8 i; -+ int ret; -+ -+ wiphy = adapter_to_wiphy(adapter); -+ if (!wiphy) { -+ ret = -EINVAL; -+ goto err_out; -+ } -+ -+ /* allocate memory */ -+ skb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); -+ if (!skb) { -+ ret = -ENOMEM; -+ goto err_out; -+ } -+ -+ /* create the message headers */ -+ msg_header = genlmsg_put(skb, 0, 0, &nlrtw_genl_family, 0, NLRTW_CMD_REG_BEACON_HINT); -+ if (!msg_header) { -+ ret = -ENOMEM; -+ goto err_out; -+ } -+ -+ /* add attributes */ -+ ret = nla_put_string(skb, NLRTW_ATTR_WIPHY_NAME, wiphy_name(wiphy)); -+ if (ret) -+ goto err_out; -+ -+ /* finalize the message */ -+ genlmsg_end(skb, msg_header); -+ -+ ret = nlrtw_multicast(&nlrtw_genl_family, skb, 0, NLRTW_MCGRP_DEFAULT, GFP_KERNEL); -+ if (ret == -ESRCH) { -+ RTW_DBG(FUNC_WIPHY_FMT" return -ESRCH(No such process)." -+ " Maybe no process waits for this msg\n", FUNC_WIPHY_ARG(wiphy)); -+ return ret; -+ } else if (ret != 0) { -+ RTW_WARN(FUNC_WIPHY_FMT" return %d\n", FUNC_WIPHY_ARG(wiphy), ret); -+ return ret; -+ } -+ -+ return 0; -+ -+err_out: -+ if (skb) -+ nlmsg_free(skb); -+ return ret; -+} -+ -+#ifdef CONFIG_DFS_MASTER -+static int _rtw_nlrtw_radar_event(_adapter *adapter, enum nlrtw_radar_event evt_type, u8 cch, u8 bw) -+{ -+ struct sk_buff *skb = NULL; -+ void *msg_header = NULL; -+ struct wiphy *wiphy; -+ u8 i; -+ int ret; -+ -+ wiphy = adapter_to_wiphy(adapter); -+ if (!wiphy) { -+ ret = -EINVAL; -+ goto err_out; -+ } -+ -+ /* allocate memory */ -+ skb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); -+ if (!skb) { -+ ret = -ENOMEM; -+ goto err_out; -+ } -+ -+ /* create the message headers */ -+ msg_header = genlmsg_put(skb, 0, 0, &nlrtw_genl_family, 0, NLRTW_CMD_RADAR_EVENT); -+ if (!msg_header) { -+ ret = -ENOMEM; -+ goto err_out; -+ } -+ -+ /* add attributes */ -+ ret = nla_put_string(skb, NLRTW_ATTR_WIPHY_NAME, wiphy_name(wiphy)); -+ if (ret) -+ goto err_out; -+ -+ ret = nla_put_u8(skb, NLRTW_ATTR_RADAR_EVENT, (uint8_t)evt_type); -+ if (ret != 0) -+ goto err_out; -+ -+ ret = nla_put_u8(skb, NLRTW_ATTR_CHANNEL_CENTER, cch); -+ if (ret != 0) -+ goto err_out; -+ -+ ret = nla_put_u8(skb, NLRTW_ATTR_CHANNEL_WIDTH, bw); -+ if (ret != 0) -+ goto err_out; -+ -+ /* finalize the message */ -+ genlmsg_end(skb, msg_header); -+ -+ ret = nlrtw_multicast(&nlrtw_genl_family, skb, 0, NLRTW_MCGRP_DEFAULT, GFP_KERNEL); -+ if (ret == -ESRCH) { -+ RTW_DBG(FUNC_WIPHY_FMT" return -ESRCH(No such process)." -+ " Maybe no process waits for this msg\n", FUNC_WIPHY_ARG(wiphy)); -+ return ret; -+ } else if (ret != 0) { -+ RTW_WARN(FUNC_WIPHY_FMT" return %d\n", FUNC_WIPHY_ARG(wiphy), ret); -+ return ret; -+ } -+ -+ return 0; -+ -+err_out: -+ if (skb) -+ nlmsg_free(skb); -+ return ret; -+} -+ -+int rtw_nlrtw_radar_detect_event(_adapter *adapter, u8 cch, u8 bw) -+{ -+ return _rtw_nlrtw_radar_event(adapter, NLRTW_RADAR_DETECTED, cch, bw); -+} -+ -+int rtw_nlrtw_cac_finish_event(_adapter *adapter, u8 cch, u8 bw) -+{ -+ return _rtw_nlrtw_radar_event(adapter, NLRTW_RADAR_CAC_FINISHED, cch, bw); -+} -+ -+int rtw_nlrtw_cac_abort_event(_adapter *adapter, u8 cch, u8 bw) -+{ -+ return _rtw_nlrtw_radar_event(adapter, NLRTW_RADAR_CAC_ABORTED, cch, bw); -+} -+ -+int rtw_nlrtw_nop_finish_event(_adapter *adapter, u8 cch, u8 bw) -+{ -+ return _rtw_nlrtw_radar_event(adapter, NLRTW_RADAR_NOP_FINISHED, cch, bw); -+} -+ -+int rtw_nlrtw_nop_start_event(_adapter *adapter, u8 cch, u8 bw) -+{ -+ return _rtw_nlrtw_radar_event(adapter, NLRTW_RADAR_NOP_STARTED, cch, bw); -+} -+#endif /* CONFIG_DFS_MASTER */ -+ -+int rtw_nlrtw_radio_opmode_notify(struct rf_ctl_t *rfctl) -+{ -+ struct dvobj_priv *dvobj = rfctl_to_dvobj(rfctl); -+ _adapter *iface; -+ struct sk_buff *skb = NULL; -+ void *msg_header = NULL; -+ struct nlattr *nl_if_opmodes, *nl_if_opmode; -+ struct wiphy *wiphy; -+ u16 op_txpwr_max_u16; -+ u8 i; -+ int ret; -+ -+ wiphy = dvobj_to_wiphy(dvobj); -+ if (!wiphy) { -+ ret = -EINVAL; -+ goto err_out; -+ } -+ -+ /* allocate memory */ -+ skb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); -+ if (!skb) { -+ ret = -ENOMEM; -+ goto err_out; -+ } -+ -+ /* create the message headers */ -+ msg_header = genlmsg_put(skb, 0, 0, &nlrtw_genl_family, 0, NLRTW_CMD_RADIO_OPMODE); -+ if (!msg_header) { -+ ret = -ENOBUFS; -+ goto err_out; -+ } -+ -+ /* add attributes */ -+ ret = nla_put_string(skb, NLRTW_ATTR_WIPHY_NAME, wiphy_name(wiphy)); -+ if (ret) -+ goto err_out; -+ -+ ret = nla_put_u8(skb, NLRTW_ATTR_OP_CLASS, rfctl->op_class); -+ if (ret != 0) -+ goto err_out; -+ -+ ret = nla_put_u8(skb, NLRTW_ATTR_OP_CHANNEL, rfctl->op_ch); -+ if (ret != 0) -+ goto err_out; -+ -+ *((s16 *)&op_txpwr_max_u16) = rfctl->op_txpwr_max; -+ ret = nla_put_u16(skb, NLRTW_ATTR_OP_TXPWR_MAX, op_txpwr_max_u16); -+ if (ret != 0) -+ goto err_out; -+ -+ if (0) -+ RTW_INFO("radio: %u,%u %d\n", rfctl->op_class, rfctl->op_ch, rfctl->op_txpwr_max); -+ -+ nl_if_opmodes = nla_nest_start(skb, NLRTW_ATTR_IF_OPMODES); -+ if (!nl_if_opmodes) { -+ ret = -ENOBUFS; -+ goto err_out; -+ } -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!dvobj->padapters[i]) -+ continue; -+ iface = dvobj->padapters[i]; -+ -+ if (!rfctl->if_op_class[i] || !rfctl->if_op_ch[i]) -+ continue; -+ -+ if (0) -+ RTW_INFO(ADPT_FMT": %u,%u\n", ADPT_ARG(iface), rfctl->if_op_class[i], rfctl->if_op_ch[i]); -+ -+ nl_if_opmode = nla_nest_start(skb, i + 1); -+ if (!nl_if_opmode) { -+ ret = -ENOBUFS; -+ goto err_out; -+ } -+ -+ ret = nla_put(skb, NLRTW_IF_OPMODE_MACADDR, ETH_ALEN, adapter_mac_addr(iface)); -+ if (ret != 0) -+ goto err_out; -+ -+ ret = nla_put_u8(skb, NLRTW_IF_OPMODE_OP_CLASS, rfctl->if_op_class[i]); -+ if (ret != 0) -+ goto err_out; -+ -+ ret = nla_put_u8(skb, NLRTW_IF_OPMODE_OP_CHANNEL, rfctl->if_op_ch[i]); -+ if (ret != 0) -+ goto err_out; -+ -+ nla_nest_end(skb, nl_if_opmode); -+ } -+ -+ nla_nest_end(skb, nl_if_opmodes); -+ -+ /* finalize the message */ -+ genlmsg_end(skb, msg_header); -+ -+ ret = nlrtw_multicast(&nlrtw_genl_family, skb, 0, NLRTW_MCGRP_DEFAULT, GFP_KERNEL); -+ if (ret == -ESRCH) { -+ RTW_DBG(FUNC_WIPHY_FMT" return -ESRCH(No such process)." -+ " Maybe no process waits for this msg\n", FUNC_WIPHY_ARG(wiphy)); -+ return ret; -+ } else if (ret != 0) { -+ RTW_WARN(FUNC_WIPHY_FMT" return %d\n", FUNC_WIPHY_ARG(wiphy), ret); -+ return ret; -+ } -+ -+ return 0; -+ -+err_out: -+ if (skb) -+ nlmsg_free(skb); -+ return ret; -+} -+ -+int rtw_nlrtw_init(void) -+{ -+ int err; -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0) -+ err = genl_register_family(&nlrtw_genl_family); -+ if (err) -+ return err; -+#else -+ err = genl_register_family_with_ops(&nlrtw_genl_family, nlrtw_genl_ops, ARRAY_SIZE(nlrtw_genl_ops)); -+ if (err) -+ return err; -+ -+ err = genl_register_mc_group(&nlrtw_genl_family, &nlrtw_genl_mcgrp[0]); -+ if (err) { -+ genl_unregister_family(&nlrtw_genl_family); -+ return err; -+ } -+#endif -+ RTW_INFO("[%s] %s\n", __func__, nlrtw_genl_family.name); -+ return 0; -+} -+ -+int rtw_nlrtw_deinit(void) -+{ -+ int err; -+ -+ err = genl_unregister_family(&nlrtw_genl_family); -+ RTW_INFO("[%s] err = %d\n", __func__, err); -+ -+ return err; -+} -+#endif /* CONFIG_RTW_NLRTW */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/nlrtw.h b/drivers/staging/rtl8723cs/os_dep/linux/nlrtw.h -new file mode 100644 -index 000000000000..374002a8a057 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/nlrtw.h -@@ -0,0 +1,48 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2020 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_NLRTW_H_ -+#define __RTW_NLRTW_H_ -+ -+#ifdef CONFIG_RTW_NLRTW -+int rtw_nlrtw_init(void); -+int rtw_nlrtw_deinit(void); -+int rtw_nlrtw_ch_util_rpt(_adapter *adapter, u8 n_rpts, u8 *val, u8 **mac_addr); -+int rtw_nlrtw_reg_change_event(_adapter *adapter); -+int rtw_nlrtw_reg_beacon_hint_event(_adapter *adapter); -+int rtw_nlrtw_radio_opmode_notify(struct rf_ctl_t *rfctl); -+#else -+static inline int rtw_nlrtw_init(void) {return _FAIL;} -+static inline int rtw_nlrtw_deinit(void) {return _FAIL;} -+static inline int rtw_nlrtw_ch_util_rpt(_adapter *adapter, u8 n_rpts, u8 *val, u8 **mac_addr) {return _FAIL;} -+static inline int rtw_nlrtw_reg_change_event(_adapter *adapter) {return _FAIL;} -+static inline int rtw_nlrtw_reg_beacon_hint_event(_adapter *adapter) {return _FAIL;} -+static inline int rtw_nlrtw_radio_opmode_notify(struct rf_ctl_t *rfctl) {return _FAIL;} -+#endif /* CONFIG_RTW_NLRTW */ -+ -+#if defined(CONFIG_RTW_NLRTW) && defined(CONFIG_DFS_MASTER) -+int rtw_nlrtw_radar_detect_event(_adapter *adapter, u8 cch, u8 bw); -+int rtw_nlrtw_cac_finish_event(_adapter *adapter, u8 cch, u8 bw); -+int rtw_nlrtw_cac_abort_event(_adapter *adapter, u8 cch, u8 bw); -+int rtw_nlrtw_nop_finish_event(_adapter *adapter, u8 cch, u8 bw); -+int rtw_nlrtw_nop_start_event(_adapter *adapter, u8 cch, u8 bw); -+#else -+static inline int rtw_nlrtw_radar_detect_event(_adapter *adapter, u8 cch, u8 bw) {return _FAIL;} -+static inline int rtw_nlrtw_cac_finish_event(_adapter *adapter, u8 cch, u8 bw) {return _FAIL;} -+static inline int rtw_nlrtw_cac_abort_event(_adapter *adapter, u8 cch, u8 bw) {return _FAIL;} -+static inline int rtw_nlrtw_nop_finish_event(_adapter *adapter, u8 cch, u8 bw) {return _FAIL;} -+static inline int rtw_nlrtw_nop_start_event(_adapter *adapter, u8 cch, u8 bw) {return _FAIL;} -+#endif /* defined(CONFIG_RTW_NLRTW) && defined(CONFIG_DFS_MASTER) */ -+ -+#endif /* __RTW_NLRTW_H_ */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/os_intfs.c b/drivers/staging/rtl8723cs/os_dep/linux/os_intfs.c -new file mode 100644 -index 000000000000..c982c2d0447b ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/os_intfs.c -@@ -0,0 +1,5744 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _OS_INTFS_C_ -+ -+#include -+#include -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); -+MODULE_AUTHOR("Realtek Semiconductor Corp."); -+MODULE_VERSION(DRIVERVERSION); -+ -+/* module param defaults */ -+int rtw_chip_version = 0x00; -+int rtw_rfintfs = HWPI; -+int rtw_lbkmode = 0;/* RTL8712_AIR_TRX; */ -+#ifdef DBG_LA_MODE -+int rtw_la_mode_en=0; -+module_param(rtw_la_mode_en, int, 0644); -+#endif -+int rtw_network_mode = Ndis802_11IBSS;/* Ndis802_11Infrastructure; */ /* infra, ad-hoc, auto */ -+/* NDIS_802_11_SSID ssid; */ -+int rtw_channel = 1;/* ad-hoc support requirement */ -+int rtw_wireless_mode = WIRELESS_MODE_MAX; -+module_param(rtw_wireless_mode, int, 0644); -+int rtw_vrtl_carrier_sense = AUTO_VCS; -+int rtw_vcs_type = RTS_CTS; -+int rtw_rts_thresh = 2347; -+int rtw_frag_thresh = 2346; -+int rtw_preamble = PREAMBLE_LONG;/* long, short, auto */ -+int rtw_scan_mode = 1;/* active, passive */ -+/* int smart_ps = 1; */ -+#ifdef CONFIG_POWER_SAVING -+ /* IPS configuration */ -+ int rtw_ips_mode = RTW_IPS_MODE; -+ -+ /* LPS configuration */ -+/* RTW_LPS_MODE=0:disable, 1:LPS , 2:LPS with clock gating, 3: power gating */ -+#if (RTW_LPS_MODE > 0) -+ int rtw_power_mgnt = PS_MODE_MAX; -+ -+ #ifdef CONFIG_USB_HCI -+ int rtw_lps_level = LPS_NORMAL; /*USB default LPS level*/ -+ #else /*SDIO,PCIE*/ -+ int rtw_lps_level = (RTW_LPS_MODE - 1); -+ #endif/*CONFIG_USB_HCI*/ -+#else -+ int rtw_power_mgnt = PS_MODE_ACTIVE; -+ int rtw_lps_level = LPS_NORMAL; -+#endif -+ -+ int rtw_lps_chk_by_tp = 1; -+ -+ /* WOW LPS configuration */ -+#ifdef CONFIG_WOWLAN -+/* RTW_WOW_LPS_MODE=0:disable, 1:LPS , 2:LPS with clock gating, 3: power gating */ -+#if (RTW_WOW_LPS_MODE > 0) -+ int rtw_wow_power_mgnt = PS_MODE_MAX; -+ int rtw_wow_lps_level = (RTW_WOW_LPS_MODE - 1); -+#else -+ int rtw_wow_power_mgnt = PS_MODE_ACTIVE; -+ int rtw_wow_lps_level = LPS_NORMAL; -+#endif -+#endif /* CONFIG_WOWLAN */ -+ -+#else /* !CONFIG_POWER_SAVING */ -+ int rtw_ips_mode = IPS_NONE; -+ int rtw_power_mgnt = PS_MODE_ACTIVE; -+ int rtw_lps_level = LPS_NORMAL; -+ int rtw_lps_chk_by_tp = 0; -+#ifdef CONFIG_WOWLAN -+ int rtw_wow_power_mgnt = PS_MODE_ACTIVE; -+ int rtw_wow_lps_level = LPS_NORMAL; -+#endif /* CONFIG_WOWLAN */ -+#endif /* CONFIG_POWER_SAVING */ -+ -+#ifdef CONFIG_NARROWBAND_SUPPORTING -+int rtw_nb_config = CONFIG_NB_VALUE; -+module_param(rtw_nb_config, int, 0644); -+MODULE_PARM_DESC(rtw_nb_config, "5M/10M/Normal bandwidth configuration"); -+#endif -+ -+module_param(rtw_ips_mode, int, 0644); -+MODULE_PARM_DESC(rtw_ips_mode, "The default IPS mode"); -+ -+module_param(rtw_lps_level, int, 0644); -+MODULE_PARM_DESC(rtw_lps_level, "The default LPS level"); -+ -+#ifdef CONFIG_LPS_1T1R -+int rtw_lps_1t1r = RTW_LPS_1T1R; -+module_param(rtw_lps_1t1r, int, 0644); -+MODULE_PARM_DESC(rtw_lps_1t1r, "The default LPS 1T1R setting"); -+#endif -+ -+module_param(rtw_lps_chk_by_tp, int, 0644); -+ -+#ifdef CONFIG_WOWLAN -+module_param(rtw_wow_power_mgnt, int, 0644); -+MODULE_PARM_DESC(rtw_wow_power_mgnt, "The default WOW LPS mode"); -+module_param(rtw_wow_lps_level, int, 0644); -+MODULE_PARM_DESC(rtw_wow_lps_level, "The default WOW LPS level"); -+#ifdef CONFIG_LPS_1T1R -+int rtw_wow_lps_1t1r = RTW_WOW_LPS_1T1R; -+module_param(rtw_wow_lps_1t1r, int, 0644); -+MODULE_PARM_DESC(rtw_wow_lps_1t1r, "The default WOW LPS 1T1R setting"); -+#endif -+#endif /* CONFIG_WOWLAN */ -+ -+/* LPS: -+ * rtw_smart_ps = 0 => TX: pwr bit = 1, RX: PS_Poll -+ * rtw_smart_ps = 1 => TX: pwr bit = 0, RX: PS_Poll -+ * rtw_smart_ps = 2 => TX: pwr bit = 0, RX: NullData with pwr bit = 0 -+*/ -+int rtw_smart_ps = 2; -+ -+int rtw_max_bss_cnt = 0; -+module_param(rtw_max_bss_cnt, int, 0644); -+#ifdef CONFIG_WMMPS_STA -+/* WMMPS: -+ * rtw_smart_ps = 0 => Only for fw test -+ * rtw_smart_ps = 1 => Refer to Beacon's TIM Bitmap -+ * rtw_smart_ps = 2 => Don't refer to Beacon's TIM Bitmap -+*/ -+int rtw_wmm_smart_ps = 2; -+#endif /* CONFIG_WMMPS_STA */ -+ -+int rtw_check_fw_ps = 1; -+ -+#ifdef CONFIG_TX_EARLY_MODE -+int rtw_early_mode = 1; -+#endif -+ -+int rtw_usb_rxagg_mode = 2;/* RX_AGG_DMA=1, RX_AGG_USB=2 */ -+module_param(rtw_usb_rxagg_mode, int, 0644); -+ -+int rtw_dynamic_agg_enable = 1; -+module_param(rtw_dynamic_agg_enable, int, 0644); -+ -+/* set log level when inserting driver module, default log level is _DRV_INFO_ = 4, -+* please refer to "How_to_set_driver_debug_log_level.doc" to set the available level. -+*/ -+#ifdef CONFIG_RTW_DEBUG -+#ifdef RTW_LOG_LEVEL -+ uint rtw_drv_log_level = (uint)RTW_LOG_LEVEL; /* from Makefile */ -+#else -+ uint rtw_drv_log_level = _DRV_INFO_; -+#endif -+module_param(rtw_drv_log_level, uint, 0644); -+MODULE_PARM_DESC(rtw_drv_log_level, "set log level when insert driver module, default log level is _DRV_INFO_ = 4"); -+#endif -+int rtw_radio_enable = 1; -+int rtw_long_retry_lmt = 7; -+int rtw_short_retry_lmt = 7; -+int rtw_busy_thresh = 40; -+/* int qos_enable = 0; */ /* * */ -+int rtw_ack_policy = NORMAL_ACK; -+ -+int rtw_mp_mode = 0; -+ -+#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR) -+uint rtw_mp_customer_str = 0; -+module_param(rtw_mp_customer_str, uint, 0644); -+MODULE_PARM_DESC(rtw_mp_customer_str, "Whether or not to enable customer str support on MP mode"); -+#endif -+ -+int rtw_software_encrypt = 0; -+int rtw_software_decrypt = 0; -+ -+int rtw_acm_method = 0;/* 0:By SW 1:By HW. */ -+ -+int rtw_wmm_enable = 1;/* default is set to enable the wmm. */ -+ -+#ifdef CONFIG_WMMPS_STA -+/* uapsd (unscheduled automatic power-save delivery) = a kind of wmmps */ -+/* 0: NO_LIMIT, 1: TWO_MSDU, 2: FOUR_MSDU, 3: SIX_MSDU */ -+int rtw_uapsd_max_sp = NO_LIMIT; -+/* BIT0: AC_VO UAPSD, BIT1: AC_VI UAPSD, BIT2: AC_BK UAPSD, BIT3: AC_BE UAPSD */ -+int rtw_uapsd_ac_enable = 0x0; -+#endif /* CONFIG_WMMPS_STA */ -+ -+#if defined(CONFIG_RTL8814A) -+ int rtw_pwrtrim_enable = 2; /* disable kfree , rename to power trim disable */ -+#elif defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) -+ /*PHYDM API, must enable by default*/ -+ int rtw_pwrtrim_enable = 1; -+#else -+ int rtw_pwrtrim_enable = 0; /* Default Enalbe power trim by efuse config */ -+#endif -+ -+#if CONFIG_TX_AC_LIFETIME -+uint rtw_tx_aclt_flags = CONFIG_TX_ACLT_FLAGS; -+module_param(rtw_tx_aclt_flags, uint, 0644); -+MODULE_PARM_DESC(rtw_tx_aclt_flags, "device TX AC queue packet lifetime control flags"); -+ -+static uint rtw_tx_aclt_conf_default[3] = CONFIG_TX_ACLT_CONF_DEFAULT; -+static uint rtw_tx_aclt_conf_default_num = 0; -+module_param_array(rtw_tx_aclt_conf_default, uint, &rtw_tx_aclt_conf_default_num, 0644); -+MODULE_PARM_DESC(rtw_tx_aclt_conf_default, "device TX AC queue lifetime config for default status"); -+ -+#ifdef CONFIG_AP_MODE -+#if CONFIG_RTW_AP_DATA_BMC_TO_UC -+static uint rtw_tx_aclt_conf_ap_m2u[3] = CONFIG_TX_ACLT_CONF_AP_M2U; -+static uint rtw_tx_aclt_conf_ap_m2u_num = 0; -+module_param_array(rtw_tx_aclt_conf_ap_m2u, uint, &rtw_tx_aclt_conf_ap_m2u_num, 0644); -+MODULE_PARM_DESC(rtw_tx_aclt_conf_ap_m2u, "device TX AC queue lifetime config for AP mode M2U status"); -+#endif -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_RTW_MESH -+static uint rtw_tx_aclt_conf_mesh[3] = CONFIG_TX_ACLT_CONF_MESH; -+static uint rtw_tx_aclt_conf_mesh_num = 0; -+module_param_array(rtw_tx_aclt_conf_mesh, uint, &rtw_tx_aclt_conf_mesh_num, 0644); -+MODULE_PARM_DESC(rtw_tx_aclt_conf_mesh, "device TX AC queue lifetime config for MESH status"); -+#endif -+#endif /* CONFIG_TX_AC_LIFETIME */ -+ -+uint rtw_tx_bw_mode = 0x21; -+module_param(rtw_tx_bw_mode, uint, 0644); -+MODULE_PARM_DESC(rtw_tx_bw_mode, "The max tx bw for 2.4G and 5G. format is the same as rtw_bw_mode"); -+ -+#ifdef CONFIG_FW_HANDLE_TXBCN -+uint rtw_tbtt_rpt = 0; /*ROOT AP - BIT0, VAP1 - BIT1, VAP2 - BIT2, VAP3 - VAP3, FW report TBTT INT by C2H*/ -+module_param(rtw_tbtt_rpt, uint, 0644); -+#endif -+ -+#ifdef CONFIG_80211N_HT -+int rtw_ht_enable = 1; -+/* 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz, 4: 80+80MHz -+* 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7 -+* 0x21 means enable 2.4G 40MHz & 5G 80MHz */ -+#ifdef CONFIG_RTW_CUSTOMIZE_BWMODE -+int rtw_bw_mode = CONFIG_RTW_CUSTOMIZE_BWMODE; -+#else -+int rtw_bw_mode = 0x21; -+#endif -+int rtw_ampdu_enable = 1;/* for enable tx_ampdu , */ /* 0: disable, 0x1:enable */ -+int rtw_rx_stbc = 1;/* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */ -+#if (defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8814B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI) -+int rtw_rx_ampdu_amsdu = 2;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */ -+#elif ((defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)) && defined(CONFIG_SDIO_HCI)) -+int rtw_rx_ampdu_amsdu = 1; -+#else -+int rtw_rx_ampdu_amsdu;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */ -+#endif -+/* -+* 2: Follow the AMSDU filed in ADDBA Resp. (Deault) -+* 0: Force the AMSDU filed in ADDBA Resp. to be disabled. -+* 1: Force the AMSDU filed in ADDBA Resp. to be enabled. -+*/ -+int rtw_tx_ampdu_amsdu = 2; -+ -+int rtw_quick_addba_req = 0; -+ -+static uint rtw_rx_ampdu_sz_limit_1ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS; -+static uint rtw_rx_ampdu_sz_limit_1ss_num = 0; -+module_param_array(rtw_rx_ampdu_sz_limit_1ss, uint, &rtw_rx_ampdu_sz_limit_1ss_num, 0644); -+MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_1ss, "RX AMPDU size limit for 1SS link of each BW, 0xFF: no limitation"); -+ -+static uint rtw_rx_ampdu_sz_limit_2ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_2SS; -+static uint rtw_rx_ampdu_sz_limit_2ss_num = 0; -+module_param_array(rtw_rx_ampdu_sz_limit_2ss, uint, &rtw_rx_ampdu_sz_limit_2ss_num, 0644); -+MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_2ss, "RX AMPDU size limit for 2SS link of each BW, 0xFF: no limitation"); -+ -+static uint rtw_rx_ampdu_sz_limit_3ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_3SS; -+static uint rtw_rx_ampdu_sz_limit_3ss_num = 0; -+module_param_array(rtw_rx_ampdu_sz_limit_3ss, uint, &rtw_rx_ampdu_sz_limit_3ss_num, 0644); -+MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_3ss, "RX AMPDU size limit for 3SS link of each BW, 0xFF: no limitation"); -+ -+static uint rtw_rx_ampdu_sz_limit_4ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_4SS; -+static uint rtw_rx_ampdu_sz_limit_4ss_num = 0; -+module_param_array(rtw_rx_ampdu_sz_limit_4ss, uint, &rtw_rx_ampdu_sz_limit_4ss_num, 0644); -+MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_4ss, "RX AMPDU size limit for 4SS link of each BW, 0xFF: no limitation"); -+ -+/* Short GI support Bit Map -+* BIT0 - 20MHz, 0: non-support, 1: support -+* BIT1 - 40MHz, 0: non-support, 1: support -+* BIT2 - 80MHz, 0: non-support, 1: support -+* BIT3 - 160MHz, 0: non-support, 1: support */ -+int rtw_short_gi = 0xf; -+/* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx */ -+int rtw_ldpc_cap = 0x33; -+/* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx */ -+#ifdef CONFIG_RTL8192F -+int rtw_stbc_cap = 0x30; -+#else -+int rtw_stbc_cap = 0x13; -+#endif -+module_param(rtw_stbc_cap, int, 0644); -+/* -+* BIT0: Enable VHT SU Beamformer -+* BIT1: Enable VHT SU Beamformee -+* BIT2: Enable VHT MU Beamformer, depend on VHT SU Beamformer -+* BIT3: Enable VHT MU Beamformee, depend on VHT SU Beamformee -+* BIT4: Enable HT Beamformer -+* BIT5: Enable HT Beamformee -+*/ -+int rtw_beamform_cap = BIT(1) | BIT(3); -+int rtw_bfer_rf_number = 0; /*BeamformerCapRfNum Rf path number, 0 for auto, others for manual*/ -+int rtw_bfee_rf_number = 0; /*BeamformeeCapRfNum Rf path number, 0 for auto, others for manual*/ -+ -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_80211AC_VHT -+int rtw_vht_enable = 1; /* 0:disable, 1:enable, 2:force auto enable */ -+module_param(rtw_vht_enable, int, 0644); -+ -+int rtw_vht_24g_enable = 1; /* 0:disable, 1:enable */ -+module_param(rtw_vht_24g_enable, int, 0644); -+ -+int rtw_ampdu_factor = 7; -+ -+uint rtw_vht_rx_mcs_map = 0xaaaa; -+module_param(rtw_vht_rx_mcs_map, uint, 0644); -+MODULE_PARM_DESC(rtw_vht_rx_mcs_map, "VHT RX MCS map"); -+#endif /* CONFIG_80211AC_VHT */ -+ -+ -+/* 0: not check in watch dog, 1: check in watch dog */ -+int rtw_check_hw_status = 0; -+ -+int rtw_low_power = 0; -+int rtw_wifi_spec = 0; -+ -+ -+int rtw_trx_path_bmp = 0x00; -+module_param(rtw_trx_path_bmp, int, 0644); /* [7:4]TX path bmp, [0:3]RX path bmp, 0: not specified */ -+ -+#ifdef CONFIG_SPECIAL_RF_PATH /* configure Nss/xTxR IC to 1ss/1T1R */ -+int rtw_tx_path_lmt = 1; -+int rtw_rx_path_lmt = 1; -+int rtw_tx_nss = 1; -+int rtw_rx_nss = 1; -+#elif defined(CONFIG_CUSTOMER01_SMART_ANTENNA) -+int rtw_tx_path_lmt = 2; -+int rtw_rx_path_lmt = 2; -+int rtw_tx_nss = 1; -+int rtw_rx_nss = 1; -+#else -+int rtw_tx_path_lmt = 0; -+int rtw_rx_path_lmt = 0; -+int rtw_tx_nss = 0; -+int rtw_rx_nss = 0; -+#endif -+module_param(rtw_tx_path_lmt, int, 0644); /* limit of TX path number, 0: not specified */ -+module_param(rtw_rx_path_lmt, int, 0644); /* limit of RX path number, 0: not specified */ -+module_param(rtw_tx_nss, int, 0644); -+module_param(rtw_rx_nss, int, 0644); -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+static uint rtw_regd_src = CONFIG_RTW_REGD_SRC; -+module_param(rtw_regd_src, uint, 0644); -+MODULE_PARM_DESC(rtw_regd_src, "The default regd source selection, 0:Realtek defined, 1: OS"); -+#endif -+ -+char rtw_country_unspecified[] = {0xFF, 0xFF, 0x00}; -+char *rtw_country_code = rtw_country_unspecified; -+module_param(rtw_country_code, charp, 0644); -+MODULE_PARM_DESC(rtw_country_code, "The default country code (in alpha2)"); -+ -+int rtw_channel_plan = CONFIG_RTW_CHPLAN; -+module_param(rtw_channel_plan, int, 0644); -+MODULE_PARM_DESC(rtw_channel_plan, "The default chplan ID when rtw_alpha2 is not specified or valid"); -+ -+static uint rtw_excl_chs[MAX_CHANNEL_NUM] = CONFIG_RTW_EXCL_CHS; -+static int rtw_excl_chs_num = 0; -+module_param_array(rtw_excl_chs, uint, &rtw_excl_chs_num, 0644); -+MODULE_PARM_DESC(rtw_excl_chs, "exclusive channel array"); -+ -+/*if concurrent softap + p2p(GO) is needed, this param lets p2p response full channel list. -+But Softap must be SHUT DOWN once P2P decide to set up connection and become a GO.*/ -+#ifdef CONFIG_FULL_CH_IN_P2P_HANDSHAKE -+ int rtw_full_ch_in_p2p_handshake = 1; /* reply full channel list*/ -+#else -+ int rtw_full_ch_in_p2p_handshake = 0; /* reply only softap channel*/ -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+int rtw_btcoex_enable = 2; -+module_param(rtw_btcoex_enable, int, 0644); -+MODULE_PARM_DESC(rtw_btcoex_enable, "BT co-existence on/off, 0:off, 1:on, 2:by efuse"); -+ -+int rtw_ant_num = 0; -+module_param(rtw_ant_num, int, 0644); -+MODULE_PARM_DESC(rtw_ant_num, "Antenna number setting, 0:by efuse"); -+ -+int rtw_bt_iso = 2;/* 0:Low, 1:High, 2:From Efuse */ -+int rtw_bt_sco = 3;/* 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy */ -+int rtw_bt_ampdu = 1 ; /* 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. */ -+#endif /* CONFIG_BT_COEXIST */ -+ -+int rtw_AcceptAddbaReq = _TRUE;/* 0:Reject AP's Add BA req, 1:Accept AP's Add BA req. */ -+ -+int rtw_antdiv_cfg = 2; /* 0:OFF , 1:ON, 2:decide by Efuse config */ -+int rtw_antdiv_type = 0 -+ ; /* 0:decide by efuse 1: for 88EE, 1Tx and 1RxCG are diversity.(2 Ant with SPDT), 2: for 88EE, 1Tx and 2Rx are diversity.( 2 Ant, Tx and RxCG are both on aux port, RxCS is on main port ), 3: for 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */ -+ -+int rtw_drv_ant_band_switch = 1; /* 0:OFF , 1:ON, Driver control antenna band switch*/ -+ -+int rtw_single_ant_path; /*0:main ant , 1:aux ant , Fixed single antenna path, default main ant*/ -+ -+/* 0: doesn't switch, 1: switch from usb2.0 to usb 3.0 2: switch from usb3.0 to usb 2.0 */ -+int rtw_switch_usb_mode = 0; -+ -+#ifdef CONFIG_USB_AUTOSUSPEND -+int rtw_enusbss = 1;/* 0:disable,1:enable */ -+#else -+int rtw_enusbss = 0;/* 0:disable,1:enable */ -+#endif -+ -+int rtw_hwpdn_mode = 2; /* 0:disable,1:enable,2: by EFUSE config */ -+ -+#ifdef CONFIG_HW_PWRP_DETECTION -+int rtw_hwpwrp_detect = 1; -+#else -+int rtw_hwpwrp_detect = 0; /* HW power ping detect 0:disable , 1:enable */ -+#endif -+ -+#ifdef CONFIG_USB_HCI -+int rtw_hw_wps_pbc = 1; -+#else -+int rtw_hw_wps_pbc = 0; -+#endif -+ -+#ifdef CONFIG_80211D -+int rtw_80211d = 0; -+#endif -+ -+#ifdef CONFIG_PCI_ASPM -+/* CLK_REQ:BIT0 L0s:BIT1 ASPM_L1:BIT2 L1Off:BIT3*/ -+int rtw_pci_aspm_enable = 0x5; -+#else -+int rtw_pci_aspm_enable; -+#endif -+ -+/* -+ * BIT [15:12] mask of ps mode -+ * BIT [11:8] val of ps mode -+ * BIT [7:4] mask of perf mode -+ * BIT [3:0] val of perf mode -+ * -+ * L0s:BIT[+0] L1:BIT[+1] -+ * -+ * 0x0030: change value only if perf mode -+ * 0x3300: change value only if ps mode -+ * 0x3330: change value in both perf and ps mode -+ */ -+#ifdef CONFIG_PCI_DYNAMIC_ASPM -+#ifdef CONFIG_PCI_ASPM -+int rtw_pci_dynamic_aspm_linkctrl = 0x3330; -+#else -+int rtw_pci_dynamic_aspm_linkctrl = 0x0030; -+#endif -+#else -+int rtw_pci_dynamic_aspm_linkctrl = 0x0000; -+#endif -+module_param(rtw_pci_dynamic_aspm_linkctrl, int, 0644); -+ -+#ifdef CONFIG_QOS_OPTIMIZATION -+int rtw_qos_opt_enable = 1; /* 0: disable,1:enable */ -+#else -+int rtw_qos_opt_enable = 0; /* 0: disable,1:enable */ -+#endif -+module_param(rtw_qos_opt_enable, int, 0644); -+ -+#ifdef CONFIG_RTW_ACS -+int rtw_acs_auto_scan = 0; /*0:disable, 1:enable*/ -+module_param(rtw_acs_auto_scan, int, 0644); -+ -+int rtw_acs = 1; -+module_param(rtw_acs, int, 0644); -+#endif -+ -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+int rtw_nm = 1;/*noise monitor*/ -+module_param(rtw_nm, int, 0644); -+#endif -+ -+char *ifname = "wlan%d"; -+module_param(ifname, charp, 0644); -+MODULE_PARM_DESC(ifname, "The default name to allocate for first interface"); -+ -+#ifdef CONFIG_PLATFORM_ANDROID -+ char *if2name = "p2p%d"; -+#else /* CONFIG_PLATFORM_ANDROID */ -+ char *if2name = "wlan%d"; -+#endif /* CONFIG_PLATFORM_ANDROID */ -+module_param(if2name, charp, 0644); -+MODULE_PARM_DESC(if2name, "The default name to allocate for second interface"); -+ -+char *rtw_initmac = 0; /* temp mac address if users want to use instead of the mac address in Efuse */ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ -+ #if (CONFIG_IFACE_NUMBER > 2) -+ int rtw_virtual_iface_num = CONFIG_IFACE_NUMBER - 1; -+ module_param(rtw_virtual_iface_num, int, 0644); -+ #else -+ int rtw_virtual_iface_num = 1; -+ #endif -+ -+#ifdef CONFIG_P2P -+ -+ #ifdef CONFIG_SEL_P2P_IFACE -+ int rtw_sel_p2p_iface = CONFIG_SEL_P2P_IFACE; -+ #else -+ int rtw_sel_p2p_iface = IFACE_ID1; -+ #endif -+ -+ module_param(rtw_sel_p2p_iface, int, 0644); -+ -+#endif -+ -+#endif -+ -+#ifdef CONFIG_AP_MODE -+u8 rtw_bmc_tx_rate = MGN_UNKNOWN; -+ -+#if CONFIG_RTW_AP_DATA_BMC_TO_UC -+int rtw_ap_src_b2u_flags = CONFIG_RTW_AP_SRC_B2U_FLAGS; -+module_param(rtw_ap_src_b2u_flags, int, 0644); -+ -+int rtw_ap_fwd_b2u_flags = CONFIG_RTW_AP_FWD_B2U_FLAGS; -+module_param(rtw_ap_fwd_b2u_flags, int, 0644); -+#endif /* CONFIG_RTW_AP_DATA_BMC_TO_UC */ -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_RTW_MESH -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+int rtw_msrc_b2u_flags = CONFIG_RTW_MSRC_B2U_FLAGS; -+module_param(rtw_msrc_b2u_flags, int, 0644); -+ -+int rtw_mfwd_b2u_flags = CONFIG_RTW_MFWD_B2U_FLAGS; -+module_param(rtw_mfwd_b2u_flags, int, 0644); -+#endif /* CONFIG_RTW_MESH_DATA_BMC_TO_UC */ -+#endif /* CONFIG_RTW_MESH */ -+ -+#ifdef RTW_WOW_STA_MIX -+int rtw_wowlan_sta_mix_mode = 1; -+#else -+int rtw_wowlan_sta_mix_mode = 0; -+#endif -+module_param(rtw_wowlan_sta_mix_mode, int, 0644); -+module_param(rtw_pwrtrim_enable, int, 0644); -+module_param(rtw_initmac, charp, 0644); -+module_param(rtw_chip_version, int, 0644); -+module_param(rtw_rfintfs, int, 0644); -+module_param(rtw_lbkmode, int, 0644); -+module_param(rtw_network_mode, int, 0644); -+module_param(rtw_channel, int, 0644); -+module_param(rtw_mp_mode, int, 0644); -+module_param(rtw_wmm_enable, int, 0644); -+#ifdef CONFIG_WMMPS_STA -+module_param(rtw_uapsd_max_sp, int, 0644); -+module_param(rtw_uapsd_ac_enable, int, 0644); -+module_param(rtw_wmm_smart_ps, int, 0644); -+#endif /* CONFIG_WMMPS_STA */ -+module_param(rtw_vrtl_carrier_sense, int, 0644); -+module_param(rtw_vcs_type, int, 0644); -+module_param(rtw_busy_thresh, int, 0644); -+ -+#ifdef CONFIG_80211N_HT -+module_param(rtw_ht_enable, int, 0644); -+module_param(rtw_bw_mode, int, 0644); -+module_param(rtw_ampdu_enable, int, 0644); -+module_param(rtw_rx_stbc, int, 0644); -+module_param(rtw_rx_ampdu_amsdu, int, 0644); -+module_param(rtw_tx_ampdu_amsdu, int, 0644); -+module_param(rtw_quick_addba_req, int, 0644); -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_BEAMFORMING -+module_param(rtw_beamform_cap, int, 0644); -+#endif -+ -+module_param(rtw_power_mgnt, int, 0644); -+module_param(rtw_smart_ps, int, 0644); -+module_param(rtw_low_power, int, 0644); -+module_param(rtw_wifi_spec, int, 0644); -+ -+module_param(rtw_full_ch_in_p2p_handshake, int, 0644); -+module_param(rtw_antdiv_cfg, int, 0644); -+module_param(rtw_antdiv_type, int, 0644); -+ -+module_param(rtw_drv_ant_band_switch, int, 0644); -+module_param(rtw_single_ant_path, int, 0644); -+ -+module_param(rtw_switch_usb_mode, int, 0644); -+ -+module_param(rtw_enusbss, int, 0644); -+module_param(rtw_hwpdn_mode, int, 0644); -+module_param(rtw_hwpwrp_detect, int, 0644); -+ -+module_param(rtw_hw_wps_pbc, int, 0644); -+module_param(rtw_check_hw_status, int, 0644); -+ -+#ifdef CONFIG_PCI_HCI -+module_param(rtw_pci_aspm_enable, int, 0644); -+#endif -+ -+#ifdef CONFIG_TX_EARLY_MODE -+module_param(rtw_early_mode, int, 0644); -+#endif -+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE -+char *rtw_adaptor_info_caching_file_path = "/data/misc/wifi/rtw_cache"; -+module_param(rtw_adaptor_info_caching_file_path, charp, 0644); -+MODULE_PARM_DESC(rtw_adaptor_info_caching_file_path, "The path of adapter info cache file"); -+#endif /* CONFIG_ADAPTOR_INFO_CACHING_FILE */ -+ -+#ifdef CONFIG_LAYER2_ROAMING -+uint rtw_max_roaming_times = 2; -+module_param(rtw_max_roaming_times, uint, 0644); -+MODULE_PARM_DESC(rtw_max_roaming_times, "The max roaming times to try"); -+#endif /* CONFIG_LAYER2_ROAMING */ -+ -+#ifdef CONFIG_IOL -+int rtw_fw_iol = 1; -+module_param(rtw_fw_iol, int, 0644); -+MODULE_PARM_DESC(rtw_fw_iol, "FW IOL. 0:Disable, 1:enable, 2:by usb speed"); -+#endif /* CONFIG_IOL */ -+ -+#ifdef CONFIG_FILE_FWIMG -+char *rtw_fw_file_path = "/system/etc/firmware/rtlwifi/FW_NIC.BIN"; -+module_param(rtw_fw_file_path, charp, 0644); -+MODULE_PARM_DESC(rtw_fw_file_path, "The path of fw image"); -+ -+char *rtw_fw_wow_file_path = "/system/etc/firmware/rtlwifi/FW_WoWLAN.BIN"; -+module_param(rtw_fw_wow_file_path, charp, 0644); -+MODULE_PARM_DESC(rtw_fw_wow_file_path, "The path of fw for Wake on Wireless image"); -+ -+#ifdef CONFIG_MP_INCLUDED -+char *rtw_fw_mp_bt_file_path = ""; -+module_param(rtw_fw_mp_bt_file_path, charp, 0644); -+MODULE_PARM_DESC(rtw_fw_mp_bt_file_path, "The path of fw for MP-BT image"); -+#endif /* CONFIG_MP_INCLUDED */ -+#endif /* CONFIG_FILE_FWIMG */ -+ -+#ifdef CONFIG_80211D -+module_param(rtw_80211d, int, 0644); -+MODULE_PARM_DESC(rtw_80211d, "Enable 802.11d mechanism"); -+#endif -+ -+#ifdef CONFIG_ADVANCE_OTA -+/* BIT(0): OTA continuous rotated test within low RSSI,1R CCA in path B -+ BIT(1) & BIT(2): OTA continuous rotated test with low high RSSI */ -+/* Experimental environment: shielding room with half of absorber and 2~3 rotation per minute */ -+int rtw_advnace_ota; -+module_param(rtw_advnace_ota, int, 0644); -+#endif -+ -+uint rtw_notch_filter = RTW_NOTCH_FILTER; -+module_param(rtw_notch_filter, uint, 0644); -+MODULE_PARM_DESC(rtw_notch_filter, "0:Disable, 1:Enable, 2:Enable only for P2P"); -+ -+uint rtw_hiq_filter = CONFIG_RTW_HIQ_FILTER; -+module_param(rtw_hiq_filter, uint, 0644); -+MODULE_PARM_DESC(rtw_hiq_filter, "0:allow all, 1:allow special, 2:deny all"); -+ -+uint rtw_adaptivity_en = CONFIG_RTW_ADAPTIVITY_EN; -+module_param(rtw_adaptivity_en, uint, 0644); -+MODULE_PARM_DESC(rtw_adaptivity_en, "0:disable, 1:enable"); -+ -+uint rtw_adaptivity_mode = CONFIG_RTW_ADAPTIVITY_MODE; -+module_param(rtw_adaptivity_mode, uint, 0644); -+MODULE_PARM_DESC(rtw_adaptivity_mode, "0:normal, 1:carrier sense"); -+ -+int rtw_adaptivity_th_l2h_ini = CONFIG_RTW_ADAPTIVITY_TH_L2H_INI; -+module_param(rtw_adaptivity_th_l2h_ini, int, 0644); -+MODULE_PARM_DESC(rtw_adaptivity_th_l2h_ini, "th_l2h_ini for Adaptivity"); -+ -+int rtw_adaptivity_th_edcca_hl_diff = CONFIG_RTW_ADAPTIVITY_TH_EDCCA_HL_DIFF; -+module_param(rtw_adaptivity_th_edcca_hl_diff, int, 0644); -+MODULE_PARM_DESC(rtw_adaptivity_th_edcca_hl_diff, "th_edcca_hl_diff for Adaptivity"); -+ -+#ifdef CONFIG_DFS_MASTER -+uint rtw_dfs_region_domain = CONFIG_RTW_DFS_REGION_DOMAIN; -+module_param(rtw_dfs_region_domain, uint, 0644); -+MODULE_PARM_DESC(rtw_dfs_region_domain, "0:NONE, 1:FCC, 2:MKK, 3:ETSI"); -+#endif -+ -+uint rtw_amplifier_type_2g = CONFIG_RTW_AMPLIFIER_TYPE_2G; -+module_param(rtw_amplifier_type_2g, uint, 0644); -+MODULE_PARM_DESC(rtw_amplifier_type_2g, "BIT3:2G ext-PA, BIT4:2G ext-LNA"); -+ -+uint rtw_amplifier_type_5g = CONFIG_RTW_AMPLIFIER_TYPE_5G; -+module_param(rtw_amplifier_type_5g, uint, 0644); -+MODULE_PARM_DESC(rtw_amplifier_type_5g, "BIT6:5G ext-PA, BIT7:5G ext-LNA"); -+ -+uint rtw_RFE_type = CONFIG_RTW_RFE_TYPE; -+module_param(rtw_RFE_type, uint, 0644); -+MODULE_PARM_DESC(rtw_RFE_type, "default init value:64"); -+ -+uint rtw_powertracking_type = 64; -+module_param(rtw_powertracking_type, uint, 0644); -+MODULE_PARM_DESC(rtw_powertracking_type, "default init value:64"); -+ -+uint rtw_GLNA_type = CONFIG_RTW_GLNA_TYPE; -+module_param(rtw_GLNA_type, uint, 0644); -+MODULE_PARM_DESC(rtw_GLNA_type, "default init value:0"); -+ -+uint rtw_TxBBSwing_2G = 0xFF; -+module_param(rtw_TxBBSwing_2G, uint, 0644); -+MODULE_PARM_DESC(rtw_TxBBSwing_2G, "default init value:0xFF"); -+ -+uint rtw_TxBBSwing_5G = 0xFF; -+module_param(rtw_TxBBSwing_5G, uint, 0644); -+MODULE_PARM_DESC(rtw_TxBBSwing_5G, "default init value:0xFF"); -+ -+uint rtw_OffEfuseMask = 0; -+module_param(rtw_OffEfuseMask, uint, 0644); -+MODULE_PARM_DESC(rtw_OffEfuseMask, "default open Efuse Mask value:0"); -+ -+uint rtw_FileMaskEfuse = 0; -+module_param(rtw_FileMaskEfuse, uint, 0644); -+MODULE_PARM_DESC(rtw_FileMaskEfuse, "default drv Mask Efuse value:0"); -+ -+uint rtw_rxgain_offset_2g = 0; -+module_param(rtw_rxgain_offset_2g, uint, 0644); -+MODULE_PARM_DESC(rtw_rxgain_offset_2g, "default RF Gain 2G Offset value:0"); -+ -+uint rtw_rxgain_offset_5gl = 0; -+module_param(rtw_rxgain_offset_5gl, uint, 0644); -+MODULE_PARM_DESC(rtw_rxgain_offset_5gl, "default RF Gain 5GL Offset value:0"); -+ -+uint rtw_rxgain_offset_5gm = 0; -+module_param(rtw_rxgain_offset_5gm, uint, 0644); -+MODULE_PARM_DESC(rtw_rxgain_offset_5gm, "default RF Gain 5GM Offset value:0"); -+ -+uint rtw_rxgain_offset_5gh = 0; -+module_param(rtw_rxgain_offset_5gh, uint, 0644); -+MODULE_PARM_DESC(rtw_rxgain_offset_5gm, "default RF Gain 5GL Offset value:0"); -+ -+uint rtw_pll_ref_clk_sel = CONFIG_RTW_PLL_REF_CLK_SEL; -+module_param(rtw_pll_ref_clk_sel, uint, 0644); -+MODULE_PARM_DESC(rtw_pll_ref_clk_sel, "force pll_ref_clk_sel, 0xF:use autoload value"); -+ -+int rtw_tx_pwr_by_rate = CONFIG_TXPWR_BY_RATE_EN; -+module_param(rtw_tx_pwr_by_rate, int, 0644); -+MODULE_PARM_DESC(rtw_tx_pwr_by_rate, "0:Disable, 1:Enable, 2: Depend on efuse"); -+ -+#if CONFIG_TXPWR_LIMIT -+int rtw_tx_pwr_lmt_enable = CONFIG_TXPWR_LIMIT_EN; -+module_param(rtw_tx_pwr_lmt_enable, int, 0644); -+MODULE_PARM_DESC(rtw_tx_pwr_lmt_enable, "0:Disable, 1:Enable, 2: Depend on efuse"); -+#endif -+ -+static int rtw_target_tx_pwr_2g_a[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_A; -+static int rtw_target_tx_pwr_2g_a_num = 0; -+module_param_array(rtw_target_tx_pwr_2g_a, int, &rtw_target_tx_pwr_2g_a_num, 0644); -+MODULE_PARM_DESC(rtw_target_tx_pwr_2g_a, "2.4G target tx power (unit:dBm) of RF path A for each rate section, should match the real calibrate power, -1: undefined"); -+ -+static int rtw_target_tx_pwr_2g_b[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_B; -+static int rtw_target_tx_pwr_2g_b_num = 0; -+module_param_array(rtw_target_tx_pwr_2g_b, int, &rtw_target_tx_pwr_2g_b_num, 0644); -+MODULE_PARM_DESC(rtw_target_tx_pwr_2g_b, "2.4G target tx power (unit:dBm) of RF path B for each rate section, should match the real calibrate power, -1: undefined"); -+ -+static int rtw_target_tx_pwr_2g_c[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_C; -+static int rtw_target_tx_pwr_2g_c_num = 0; -+module_param_array(rtw_target_tx_pwr_2g_c, int, &rtw_target_tx_pwr_2g_c_num, 0644); -+MODULE_PARM_DESC(rtw_target_tx_pwr_2g_c, "2.4G target tx power (unit:dBm) of RF path C for each rate section, should match the real calibrate power, -1: undefined"); -+ -+static int rtw_target_tx_pwr_2g_d[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_D; -+static int rtw_target_tx_pwr_2g_d_num = 0; -+module_param_array(rtw_target_tx_pwr_2g_d, int, &rtw_target_tx_pwr_2g_d_num, 0644); -+MODULE_PARM_DESC(rtw_target_tx_pwr_2g_d, "2.4G target tx power (unit:dBm) of RF path D for each rate section, should match the real calibrate power, -1: undefined"); -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+static int rtw_target_tx_pwr_5g_a[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_A; -+static int rtw_target_tx_pwr_5g_a_num = 0; -+module_param_array(rtw_target_tx_pwr_5g_a, int, &rtw_target_tx_pwr_5g_a_num, 0644); -+MODULE_PARM_DESC(rtw_target_tx_pwr_5g_a, "5G target tx power (unit:dBm) of RF path A for each rate section, should match the real calibrate power, -1: undefined"); -+ -+static int rtw_target_tx_pwr_5g_b[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_B; -+static int rtw_target_tx_pwr_5g_b_num = 0; -+module_param_array(rtw_target_tx_pwr_5g_b, int, &rtw_target_tx_pwr_5g_b_num, 0644); -+MODULE_PARM_DESC(rtw_target_tx_pwr_5g_b, "5G target tx power (unit:dBm) of RF path B for each rate section, should match the real calibrate power, -1: undefined"); -+ -+static int rtw_target_tx_pwr_5g_c[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_C; -+static int rtw_target_tx_pwr_5g_c_num = 0; -+module_param_array(rtw_target_tx_pwr_5g_c, int, &rtw_target_tx_pwr_5g_c_num, 0644); -+MODULE_PARM_DESC(rtw_target_tx_pwr_5g_c, "5G target tx power (unit:dBm) of RF path C for each rate section, should match the real calibrate power, -1: undefined"); -+ -+static int rtw_target_tx_pwr_5g_d[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_D; -+static int rtw_target_tx_pwr_5g_d_num = 0; -+module_param_array(rtw_target_tx_pwr_5g_d, int, &rtw_target_tx_pwr_5g_d_num, 0644); -+MODULE_PARM_DESC(rtw_target_tx_pwr_5g_d, "5G target tx power (unit:dBm) of RF path D for each rate section, should match the real calibrate power, -1: undefined"); -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+ -+int rtw_antenna_gain = CONFIG_RTW_ANTENNA_GAIN; -+module_param(rtw_antenna_gain, int, 0644); -+MODULE_PARM_DESC(rtw_antenna_gain, "Antenna gain in mBi. 0x7FFF: unspecifed"); -+ -+#ifdef CONFIG_RTW_TX_NPATH_EN -+/*0:disable ,1: 2path*/ -+int rtw_tx_npath_enable = 1; -+module_param(rtw_tx_npath_enable, int, 0644); -+MODULE_PARM_DESC(rtw_tx_npath_enable, "0:Disable, 1:TX-2PATH"); -+#endif -+ -+#ifdef CONFIG_RTW_PATH_DIV -+/*0:disable ,1: path diversity*/ -+int rtw_path_div_enable = 1; -+module_param(rtw_path_div_enable, int, 0644); -+MODULE_PARM_DESC(rtw_path_div_enable, "0:Disable, 1:Enable path diversity"); -+#endif -+ -+ -+int rtw_tsf_update_pause_factor = CONFIG_TSF_UPDATE_PAUSE_FACTOR; -+module_param(rtw_tsf_update_pause_factor, int, 0644); -+MODULE_PARM_DESC(rtw_tsf_update_pause_factor, "num of bcn intervals to stay TSF update pause status"); -+ -+int rtw_tsf_update_restore_factor = CONFIG_TSF_UPDATE_RESTORE_FACTOR; -+module_param(rtw_tsf_update_restore_factor, int, 0644); -+MODULE_PARM_DESC(rtw_tsf_update_restore_factor, "num of bcn intervals to stay TSF update restore status"); -+ -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+char *rtw_phy_file_path = REALTEK_CONFIG_PATH; -+module_param(rtw_phy_file_path, charp, 0644); -+MODULE_PARM_DESC(rtw_phy_file_path, "The path of phy parameter"); -+/* PHY FILE Bit Map -+* BIT0 - MAC, 0: non-support, 1: support -+* BIT1 - BB, 0: non-support, 1: support -+* BIT2 - BB_PG, 0: non-support, 1: support -+* BIT3 - BB_MP, 0: non-support, 1: support -+* BIT4 - RF, 0: non-support, 1: support -+* BIT5 - RF_TXPWR_TRACK, 0: non-support, 1: support -+* BIT6 - RF_TXPWR_LMT, 0: non-support, 1: support */ -+int rtw_load_phy_file = (BIT2 | BIT6); -+module_param(rtw_load_phy_file, int, 0644); -+MODULE_PARM_DESC(rtw_load_phy_file, "PHY File Bit Map"); -+int rtw_decrypt_phy_file = 0; -+module_param(rtw_decrypt_phy_file, int, 0644); -+MODULE_PARM_DESC(rtw_decrypt_phy_file, "Enable Decrypt PHY File"); -+#endif -+ -+uint rtw_recvbuf_nr = NR_RECVBUFF; -+module_param(rtw_recvbuf_nr, int, 0644); -+MODULE_PARM_DESC(rtw_recvbuf_nr, "Preallocated number of struct recv_buf"); -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+#ifdef DFT_TRX_SHARE_MODE -+int rtw_trx_share_mode = DFT_TRX_SHARE_MODE; -+#else -+int rtw_trx_share_mode = 0; -+#endif -+module_param(rtw_trx_share_mode, int, 0644); -+MODULE_PARM_DESC(rtw_trx_share_mode, "TRx FIFO Shared"); -+#endif -+ -+#ifdef CONFIG_DYNAMIC_SOML -+uint rtw_dynamic_soml_en = 1; -+module_param(rtw_dynamic_soml_en, int, 0644); -+MODULE_PARM_DESC(rtw_dynamic_soml_en, "0: disable, 1: enable with default param, 2: enable with specified param."); -+ -+uint rtw_dynamic_soml_train_num = 0; -+module_param(rtw_dynamic_soml_train_num, int, 0644); -+MODULE_PARM_DESC(rtw_dynamic_soml_train_num, "SOML training number"); -+ -+uint rtw_dynamic_soml_interval = 0; -+module_param(rtw_dynamic_soml_interval, int, 0644); -+MODULE_PARM_DESC(rtw_dynamic_soml_interval, "SOML training interval"); -+ -+uint rtw_dynamic_soml_period = 0; -+module_param(rtw_dynamic_soml_period, int, 0644); -+MODULE_PARM_DESC(rtw_dynamic_soml_period, "SOML training period"); -+ -+uint rtw_dynamic_soml_delay = 0; -+module_param(rtw_dynamic_soml_delay, int, 0644); -+MODULE_PARM_DESC(rtw_dynamic_soml_delay, "SOML training delay"); -+#endif -+ -+uint rtw_phydm_ability = 0xffffffff; -+module_param(rtw_phydm_ability, uint, 0644); -+ -+uint rtw_halrf_ability = 0xffffffff; -+module_param(rtw_halrf_ability, uint, 0644); -+ -+#ifdef CONFIG_RTW_MESH -+uint rtw_peer_alive_based_preq = 1; -+module_param(rtw_peer_alive_based_preq, uint, 0644); -+MODULE_PARM_DESC(rtw_peer_alive_based_preq, -+ "On demand PREQ will reference peer alive status. 0: Off, 1: On"); -+#endif -+ -+int _netdev_open(struct net_device *pnetdev); -+int netdev_open(struct net_device *pnetdev); -+static int netdev_close(struct net_device *pnetdev); -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+extern int rtw_sdio_set_power(int on); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ -+#ifdef CONFIG_MCC_MODE -+/* enable MCC mode or not */ -+int rtw_en_mcc = 1; -+/* can referece following value before insmod driver */ -+int rtw_mcc_ap_bw20_target_tx_tp = MCC_AP_BW20_TARGET_TX_TP; -+int rtw_mcc_ap_bw40_target_tx_tp = MCC_AP_BW40_TARGET_TX_TP; -+int rtw_mcc_ap_bw80_target_tx_tp = MCC_AP_BW80_TARGET_TX_TP; -+int rtw_mcc_sta_bw20_target_tx_tp = MCC_STA_BW20_TARGET_TX_TP; -+int rtw_mcc_sta_bw40_target_tx_tp = MCC_STA_BW40_TARGET_TX_TP; -+int rtw_mcc_sta_bw80_target_tx_tp = MCC_STA_BW80_TARGET_TX_TP; -+int rtw_mcc_single_tx_cri = MCC_SINGLE_TX_CRITERIA; -+int rtw_mcc_policy_table_idx = 0; -+int rtw_mcc_duration = 0; -+int rtw_mcc_enable_runtime_duration = 1; -+#ifdef CONFIG_MCC_PHYDM_OFFLOAD -+int rtw_mcc_phydm_offload = 1; -+#else -+int rtw_mcc_phydm_offload = 0; -+#endif -+module_param(rtw_en_mcc, int, 0644); -+module_param(rtw_mcc_single_tx_cri, int, 0644); -+module_param(rtw_mcc_ap_bw20_target_tx_tp, int, 0644); -+module_param(rtw_mcc_ap_bw40_target_tx_tp, int, 0644); -+module_param(rtw_mcc_ap_bw80_target_tx_tp, int, 0644); -+module_param(rtw_mcc_sta_bw20_target_tx_tp, int, 0644); -+module_param(rtw_mcc_sta_bw40_target_tx_tp, int, 0644); -+module_param(rtw_mcc_sta_bw80_target_tx_tp, int, 0644); -+module_param(rtw_mcc_policy_table_idx, int, 0644); -+module_param(rtw_mcc_duration, int, 0644); -+module_param(rtw_mcc_phydm_offload, int, 0644); -+#endif /*CONFIG_MCC_MODE */ -+ -+#ifdef CONFIG_RTW_NAPI -+/*following setting should define NAPI in Makefile -+enable napi only = 1, disable napi = 0*/ -+int rtw_en_napi = 1; -+module_param(rtw_en_napi, int, 0644); -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+int rtw_napi_threshold = 100; /* unit: Mbps */ -+module_param(rtw_napi_threshold, int, 0644); -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+#ifdef CONFIG_RTW_GRO -+/*following setting should define GRO in Makefile -+enable gro = 1, disable gro = 0*/ -+int rtw_en_gro = 1; -+module_param(rtw_en_gro, int, 0644); -+#endif /* CONFIG_RTW_GRO */ -+#endif /* CONFIG_RTW_NAPI */ -+ -+#ifdef RTW_IQK_FW_OFFLOAD -+int rtw_iqk_fw_offload = 1; -+#else -+int rtw_iqk_fw_offload; -+#endif /* RTW_IQK_FW_OFFLOAD */ -+module_param(rtw_iqk_fw_offload, int, 0644); -+ -+#ifdef RTW_CHANNEL_SWITCH_OFFLOAD -+int rtw_ch_switch_offload = 0; -+#else -+int rtw_ch_switch_offload; -+#endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ -+module_param(rtw_ch_switch_offload, int, 0644); -+ -+#ifdef CONFIG_TDLS -+int rtw_en_tdls = 1; -+module_param(rtw_en_tdls, int, 0644); -+#endif -+ -+#ifdef CONFIG_FW_OFFLOAD_PARAM_INIT -+int rtw_fw_param_init = 1; -+module_param(rtw_fw_param_init, int, 0644); -+#endif -+ -+#ifdef CONFIG_TDMADIG -+int rtw_tdmadig_en = 1; -+/* -+1:MODE_PERFORMANCE -+2:MODE_COVERAGE -+*/ -+int rtw_tdmadig_mode = 1; -+int rtw_dynamic_tdmadig = 0; -+module_param(rtw_tdmadig_en, int, 0644); -+module_param(rtw_tdmadig_mode, int, 0644); -+module_param(rtw_dynamic_tdmadig, int, 0644); -+#endif/*CONFIG_TDMADIG*/ -+ -+/*dynamic RRSR default enable*/ -+int rtw_en_dyn_rrsr = 1; -+int rtw_rrsr_value = 0xFFFFFFFF; -+module_param(rtw_en_dyn_rrsr, int, 0644); -+module_param(rtw_rrsr_value, int, 0644); -+ -+#ifdef CONFIG_WOWLAN -+/* -+ * 0: disable, 1: enable -+ */ -+uint rtw_wow_enable = 1; -+module_param(rtw_wow_enable, uint, 0644); -+/* -+ * bit[0]: magic packet wake up -+ * bit[1]: unucast packet(HW/FW unuicast) -+ * bit[2]: deauth wake up -+ */ -+uint rtw_wakeup_event = RTW_WAKEUP_EVENT; -+module_param(rtw_wakeup_event, uint, 0644); -+/* -+ * 0: common WOWLAN -+ * bit[0]: disable BB RF -+ * bit[1]: For wireless remote controller with or without connection -+ */ -+uint rtw_suspend_type = RTW_SUSPEND_TYPE; -+module_param(rtw_suspend_type, uint, 0644); -+#endif -+ -+#ifdef RTW_BUSY_DENY_SCAN -+uint rtw_scan_interval_thr = BUSY_TRAFFIC_SCAN_DENY_PERIOD; -+module_param(rtw_scan_interval_thr, uint, 0644); -+MODULE_PARM_DESC(rtw_scan_interval_thr, "Threshold used to judge if scan " \ -+ "request comes from scan UI, unit is ms."); -+#endif /* RTW_BUSY_DENY_SCAN */ -+ -+#ifdef CONFIG_RTL8822C_XCAP_NEW_POLICY -+uint rtw_8822c_xcap_overwrite = 1; -+module_param(rtw_8822c_xcap_overwrite, uint, 0644); -+#endif -+ -+#ifdef CONFIG_RTW_MULTI_AP -+static int rtw_unassoc_sta_mode_of_stype[UNASOC_STA_SRC_NUM] = CONFIG_RTW_UNASOC_STA_MODE_OF_STYPE; -+static int rtw_unassoc_sta_mode_of_stype_num = 0; -+module_param_array(rtw_unassoc_sta_mode_of_stype, int, &rtw_unassoc_sta_mode_of_stype_num, 0644); -+ -+uint rtw_max_unassoc_sta_cnt = 0; -+module_param(rtw_max_unassoc_sta_cnt, uint, 0644); -+#endif -+ -+#if CONFIG_TX_AC_LIFETIME -+static void rtw_regsty_load_tx_ac_lifetime(struct registry_priv *regsty) -+{ -+ int i, j; -+ struct tx_aclt_conf_t *conf; -+ uint *parm; -+ -+ regsty->tx_aclt_flags = (u8)rtw_tx_aclt_flags; -+ -+ for (i = 0; i < TX_ACLT_CONF_NUM; i++) { -+ conf = ®sty->tx_aclt_confs[i]; -+ if (i == TX_ACLT_CONF_DEFAULT) -+ parm = rtw_tx_aclt_conf_default; -+ #ifdef CONFIG_AP_MODE -+ #if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ else if (i == TX_ACLT_CONF_AP_M2U) -+ parm = rtw_tx_aclt_conf_ap_m2u; -+ #endif -+ #endif /* CONFIG_AP_MODE */ -+ #ifdef CONFIG_RTW_MESH -+ else if (i == TX_ACLT_CONF_MESH) -+ parm = rtw_tx_aclt_conf_mesh; -+ #endif -+ else -+ parm = NULL; -+ -+ if (parm) { -+ conf->en = parm[0] & 0xF; -+ conf->vo_vi = parm[1]; -+ conf->be_bk = parm[2]; -+ } -+ } -+} -+#endif -+ -+void rtw_regsty_load_target_tx_power(struct registry_priv *regsty) -+{ -+ int path, rs; -+ int *target_tx_pwr; -+ -+ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) { -+ if (path == RF_PATH_A) -+ target_tx_pwr = rtw_target_tx_pwr_2g_a; -+ else if (path == RF_PATH_B) -+ target_tx_pwr = rtw_target_tx_pwr_2g_b; -+ else if (path == RF_PATH_C) -+ target_tx_pwr = rtw_target_tx_pwr_2g_c; -+ else if (path == RF_PATH_D) -+ target_tx_pwr = rtw_target_tx_pwr_2g_d; -+ -+ for (rs = CCK; rs < RATE_SECTION_NUM; rs++) -+ regsty->target_tx_pwr_2g[path][rs] = target_tx_pwr[rs]; -+ } -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ for (path = RF_PATH_A; path < RF_PATH_MAX; path++) { -+ if (path == RF_PATH_A) -+ target_tx_pwr = rtw_target_tx_pwr_5g_a; -+ else if (path == RF_PATH_B) -+ target_tx_pwr = rtw_target_tx_pwr_5g_b; -+ else if (path == RF_PATH_C) -+ target_tx_pwr = rtw_target_tx_pwr_5g_c; -+ else if (path == RF_PATH_D) -+ target_tx_pwr = rtw_target_tx_pwr_5g_d; -+ -+ for (rs = OFDM; rs < RATE_SECTION_NUM; rs++) -+ regsty->target_tx_pwr_5g[path][rs - 1] = target_tx_pwr[rs - 1]; -+ } -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+} -+ -+inline void rtw_regsty_load_excl_chs(struct registry_priv *regsty) -+{ -+ int i; -+ int ch_num = 0; -+ -+ for (i = 0; i < MAX_CHANNEL_NUM; i++) -+ if (((u8)rtw_excl_chs[i]) != 0) -+ regsty->excl_chs[ch_num++] = (u8)rtw_excl_chs[i]; -+ -+ if (ch_num < MAX_CHANNEL_NUM) -+ regsty->excl_chs[ch_num] = 0; -+} -+ -+#ifdef CONFIG_80211N_HT -+inline void rtw_regsty_init_rx_ampdu_sz_limit(struct registry_priv *regsty) -+{ -+ int i, j; -+ uint *sz_limit; -+ -+ for (i = 0; i < 4; i++) { -+ if (i == 0) -+ sz_limit = rtw_rx_ampdu_sz_limit_1ss; -+ else if (i == 1) -+ sz_limit = rtw_rx_ampdu_sz_limit_2ss; -+ else if (i == 2) -+ sz_limit = rtw_rx_ampdu_sz_limit_3ss; -+ else if (i == 3) -+ sz_limit = rtw_rx_ampdu_sz_limit_4ss; -+ -+ for (j = 0; j < 4; j++) -+ regsty->rx_ampdu_sz_limit_by_nss_bw[i][j] = sz_limit[j]; -+ } -+} -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_RTW_MULTI_AP -+inline void rtw_regsty_init_unassoc_sta_param(struct registry_priv *regsty) -+{ -+ int i; -+ -+ for (i = 0; i < UNASOC_STA_SRC_NUM; i++) -+ regsty->unassoc_sta_mode_of_stype[i] = rtw_unassoc_sta_mode_of_stype[i]; -+ -+ regsty->max_unassoc_sta_cnt = (u16) rtw_max_unassoc_sta_cnt; -+} -+#endif -+ -+uint loadparam(_adapter *padapter) -+{ -+ uint status = _SUCCESS; -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ -+ -+#ifdef CONFIG_RTW_DEBUG -+ if (rtw_drv_log_level >= _DRV_MAX_) -+ rtw_drv_log_level = _DRV_DEBUG_; -+#endif -+ -+ registry_par->chip_version = (u8)rtw_chip_version; -+ registry_par->rfintfs = (u8)rtw_rfintfs; -+ registry_par->lbkmode = (u8)rtw_lbkmode; -+ /* registry_par->hci = (u8)hci; */ -+ registry_par->network_mode = (u8)rtw_network_mode; -+ -+ _rtw_memcpy(registry_par->ssid.Ssid, "ANY", 3); -+ registry_par->ssid.SsidLength = 3; -+ -+ registry_par->channel = (u8)rtw_channel; -+#ifdef CONFIG_NARROWBAND_SUPPORTING -+ if (rtw_nb_config != RTW_NB_CONFIG_NONE) -+ rtw_wireless_mode &= ~WIRELESS_11B; -+#endif -+ registry_par->wireless_mode = (u8)rtw_wireless_mode; -+ -+ if (IsSupported24G(registry_par->wireless_mode) && (!is_supported_5g(registry_par->wireless_mode)) -+ && (registry_par->channel > 14)) -+ registry_par->channel = 1; -+ else if (is_supported_5g(registry_par->wireless_mode) && (!IsSupported24G(registry_par->wireless_mode)) -+ && (registry_par->channel <= 14)) -+ registry_par->channel = 36; -+ -+ registry_par->vrtl_carrier_sense = (u8)rtw_vrtl_carrier_sense ; -+ registry_par->vcs_type = (u8)rtw_vcs_type; -+ registry_par->rts_thresh = (u16)rtw_rts_thresh; -+ registry_par->frag_thresh = (u16)rtw_frag_thresh; -+ registry_par->preamble = (u8)rtw_preamble; -+ registry_par->scan_mode = (u8)rtw_scan_mode; -+ registry_par->smart_ps = (u8)rtw_smart_ps; -+ registry_par->check_fw_ps = (u8)rtw_check_fw_ps; -+ #ifdef CONFIG_TDMADIG -+ registry_par->tdmadig_en = (u8)rtw_tdmadig_en; -+ registry_par->tdmadig_mode = (u8)rtw_tdmadig_mode; -+ registry_par->tdmadig_dynamic = (u8) rtw_dynamic_tdmadig; -+ registry_par->power_mgnt = PS_MODE_ACTIVE; -+ registry_par->ips_mode = IPS_NONE; -+ #else -+ registry_par->power_mgnt = (u8)rtw_power_mgnt; -+ registry_par->ips_mode = (u8)rtw_ips_mode; -+ #endif/*CONFIG_TDMADIG*/ -+ registry_par->lps_level = (u8)rtw_lps_level; -+ registry_par->en_dyn_rrsr = (u8)rtw_en_dyn_rrsr; -+ registry_par->set_rrsr_value = (u32)rtw_rrsr_value; -+#ifdef CONFIG_LPS_1T1R -+ registry_par->lps_1t1r = (u8)(rtw_lps_1t1r ? 1 : 0); -+#endif -+ registry_par->lps_chk_by_tp = (u8)rtw_lps_chk_by_tp; -+#ifdef CONFIG_WOWLAN -+ registry_par->wow_power_mgnt = (u8)rtw_wow_power_mgnt; -+ registry_par->wow_lps_level = (u8)rtw_wow_lps_level; -+ #ifdef CONFIG_LPS_1T1R -+ registry_par->wow_lps_1t1r = (u8)(rtw_wow_lps_1t1r ? 1 : 0); -+ #endif -+#endif /* CONFIG_WOWLAN */ -+ registry_par->radio_enable = (u8)rtw_radio_enable; -+ registry_par->long_retry_lmt = (u8)rtw_long_retry_lmt; -+ registry_par->short_retry_lmt = (u8)rtw_short_retry_lmt; -+ registry_par->busy_thresh = (u16)rtw_busy_thresh; -+ registry_par->max_bss_cnt = (u16)rtw_max_bss_cnt; -+ /* registry_par->qos_enable = (u8)rtw_qos_enable; */ -+ registry_par->ack_policy = (u8)rtw_ack_policy; -+ registry_par->mp_mode = (u8)rtw_mp_mode; -+#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR) -+ registry_par->mp_customer_str = (u8)rtw_mp_customer_str; -+#endif -+ registry_par->software_encrypt = (u8)rtw_software_encrypt; -+ registry_par->software_decrypt = (u8)rtw_software_decrypt; -+ -+ registry_par->acm_method = (u8)rtw_acm_method; -+ registry_par->usb_rxagg_mode = (u8)rtw_usb_rxagg_mode; -+ registry_par->dynamic_agg_enable = (u8)rtw_dynamic_agg_enable; -+ -+ /* WMM */ -+ registry_par->wmm_enable = (u8)rtw_wmm_enable; -+ -+#ifdef CONFIG_WMMPS_STA -+ /* UAPSD */ -+ registry_par->uapsd_max_sp_len= (u8)rtw_uapsd_max_sp; -+ registry_par->uapsd_ac_enable = (u8)rtw_uapsd_ac_enable; -+ registry_par->wmm_smart_ps = (u8)rtw_wmm_smart_ps; -+#endif /* CONFIG_WMMPS_STA */ -+ -+ registry_par->RegPwrTrimEnable = (u8)rtw_pwrtrim_enable; -+ -+#if CONFIG_TX_AC_LIFETIME -+ rtw_regsty_load_tx_ac_lifetime(registry_par); -+#endif -+ -+ registry_par->tx_bw_mode = (u8)rtw_tx_bw_mode; -+ -+#ifdef CONFIG_80211N_HT -+ registry_par->ht_enable = (u8)rtw_ht_enable; -+ if (registry_par->ht_enable && is_supported_ht(registry_par->wireless_mode)) { -+#ifdef CONFIG_NARROWBAND_SUPPORTING -+ if (rtw_nb_config != RTW_NB_CONFIG_NONE) -+ rtw_bw_mode = 0; -+#endif -+ registry_par->bw_mode = (u8)rtw_bw_mode; -+ registry_par->ampdu_enable = (u8)rtw_ampdu_enable; -+ registry_par->rx_stbc = (u8)rtw_rx_stbc; -+ registry_par->rx_ampdu_amsdu = (u8)rtw_rx_ampdu_amsdu; -+ registry_par->tx_ampdu_amsdu = (u8)rtw_tx_ampdu_amsdu; -+ registry_par->tx_quick_addba_req = (u8)rtw_quick_addba_req; -+ registry_par->short_gi = (u8)rtw_short_gi; -+ registry_par->ldpc_cap = (u8)rtw_ldpc_cap; -+#if defined(CONFIG_CUSTOMER01_SMART_ANTENNA) -+ rtw_stbc_cap = 0x0; -+#endif -+#ifdef CONFIG_RTW_TX_NPATH_EN -+ registry_par->tx_npath = (u8)rtw_tx_npath_enable; -+#endif -+#ifdef CONFIG_RTW_PATH_DIV -+ registry_par->path_div = (u8)rtw_path_div_enable; -+#endif -+ registry_par->stbc_cap = (u8)rtw_stbc_cap; -+ registry_par->beamform_cap = (u8)rtw_beamform_cap; -+ registry_par->beamformer_rf_num = (u8)rtw_bfer_rf_number; -+ registry_par->beamformee_rf_num = (u8)rtw_bfee_rf_number; -+ rtw_regsty_init_rx_ampdu_sz_limit(registry_par); -+ } -+#endif -+#ifdef DBG_LA_MODE -+ registry_par->la_mode_en = (u8)rtw_la_mode_en; -+#endif -+#ifdef CONFIG_NARROWBAND_SUPPORTING -+ registry_par->rtw_nb_config = (u8)rtw_nb_config; -+#endif -+ -+#ifdef CONFIG_80211AC_VHT -+ registry_par->vht_enable = (u8)rtw_vht_enable; -+ registry_par->vht_24g_enable = (u8)rtw_vht_24g_enable; -+ registry_par->ampdu_factor = (u8)rtw_ampdu_factor; -+ registry_par->vht_rx_mcs_map[0] = (u8)(rtw_vht_rx_mcs_map & 0xFF); -+ registry_par->vht_rx_mcs_map[1] = (u8)((rtw_vht_rx_mcs_map & 0xFF00) >> 8); -+#endif -+ -+#ifdef CONFIG_TX_EARLY_MODE -+ registry_par->early_mode = (u8)rtw_early_mode; -+#endif -+ registry_par->trx_path_bmp = (u8)rtw_trx_path_bmp; -+ registry_par->tx_path_lmt = (u8)rtw_tx_path_lmt; -+ registry_par->rx_path_lmt = (u8)rtw_rx_path_lmt; -+ registry_par->tx_nss = (u8)rtw_tx_nss; -+ registry_par->rx_nss = (u8)rtw_rx_nss; -+ registry_par->low_power = (u8)rtw_low_power; -+ -+ registry_par->check_hw_status = (u8)rtw_check_hw_status; -+ -+ registry_par->wifi_spec = (u8)rtw_wifi_spec; -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+ if (regd_src_is_valid(rtw_regd_src)) -+ registry_par->regd_src = (u8)rtw_regd_src; -+ else { -+ RTW_WARN("%s invalid rtw_regd_src(%u), use REGD_SRC_RTK_PRIV instead\n", __func__, rtw_regd_src); -+ registry_par->regd_src = REGD_SRC_RTK_PRIV; -+ } -+#endif -+ -+ if (strlen(rtw_country_code) != 2 -+ || is_alpha(rtw_country_code[0]) == _FALSE -+ || is_alpha(rtw_country_code[1]) == _FALSE -+ ) { -+ if (rtw_country_code != rtw_country_unspecified) -+ RTW_ERR("%s discard rtw_country_code not in alpha2\n", __func__); -+ _rtw_memset(registry_par->alpha2, 0xFF, 2); -+ } else -+ _rtw_memcpy(registry_par->alpha2, rtw_country_code, 2); -+ -+ registry_par->channel_plan = (u8)rtw_channel_plan; -+ rtw_regsty_load_excl_chs(registry_par); -+ -+ registry_par->full_ch_in_p2p_handshake = (u8)rtw_full_ch_in_p2p_handshake; -+#ifdef CONFIG_BT_COEXIST -+ registry_par->btcoex = (u8)rtw_btcoex_enable; -+ registry_par->bt_iso = (u8)rtw_bt_iso; -+ registry_par->bt_sco = (u8)rtw_bt_sco; -+ registry_par->bt_ampdu = (u8)rtw_bt_ampdu; -+ registry_par->ant_num = (u8)rtw_ant_num; -+ registry_par->single_ant_path = (u8) rtw_single_ant_path; -+#endif -+ -+ registry_par->bAcceptAddbaReq = (u8)rtw_AcceptAddbaReq; -+ -+ registry_par->antdiv_cfg = (u8)rtw_antdiv_cfg; -+ registry_par->antdiv_type = (u8)rtw_antdiv_type; -+ -+ registry_par->drv_ant_band_switch = (u8) rtw_drv_ant_band_switch; -+ -+ registry_par->switch_usb_mode = (u8)rtw_switch_usb_mode; -+#ifdef SUPPORT_HW_RFOFF_DETECTED -+ registry_par->hwpdn_mode = (u8)rtw_hwpdn_mode;/* 0:disable,1:enable,2:by EFUSE config */ -+ registry_par->hwpwrp_detect = (u8)rtw_hwpwrp_detect;/* 0:disable,1:enable */ -+#endif -+ -+ registry_par->hw_wps_pbc = (u8)rtw_hw_wps_pbc; -+ -+#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE -+ snprintf(registry_par->adaptor_info_caching_file_path, PATH_LENGTH_MAX, "%s", rtw_adaptor_info_caching_file_path); -+ registry_par->adaptor_info_caching_file_path[PATH_LENGTH_MAX - 1] = 0; -+#endif -+ -+#ifdef CONFIG_LAYER2_ROAMING -+ registry_par->max_roaming_times = (u8)rtw_max_roaming_times; -+#endif -+ -+#ifdef CONFIG_IOL -+ registry_par->fw_iol = rtw_fw_iol; -+#endif -+ -+#ifdef CONFIG_80211D -+ registry_par->enable80211d = (u8)rtw_80211d; -+#endif -+ -+ snprintf(registry_par->ifname, 16, "%s", ifname); -+ snprintf(registry_par->if2name, 16, "%s", if2name); -+ -+ registry_par->notch_filter = (u8)rtw_notch_filter; -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ registry_par->virtual_iface_num = (u8)rtw_virtual_iface_num; -+#ifdef CONFIG_P2P -+ registry_par->sel_p2p_iface = (u8)rtw_sel_p2p_iface; -+ RTW_INFO("%s, Select P2P interface: iface_id:%d\n", __func__, registry_par->sel_p2p_iface); -+#endif -+#endif -+ registry_par->pll_ref_clk_sel = (u8)rtw_pll_ref_clk_sel; -+ -+#if CONFIG_TXPWR_LIMIT -+ registry_par->RegEnableTxPowerLimit = (u8)rtw_tx_pwr_lmt_enable; -+#endif -+ registry_par->RegEnableTxPowerByRate = (u8)rtw_tx_pwr_by_rate; -+ -+ rtw_regsty_load_target_tx_power(registry_par); -+ -+ registry_par->antenna_gain = (s16)rtw_antenna_gain; -+ -+ registry_par->tsf_update_pause_factor = (u8)rtw_tsf_update_pause_factor; -+ registry_par->tsf_update_restore_factor = (u8)rtw_tsf_update_restore_factor; -+ -+ registry_par->TxBBSwing_2G = (s8)rtw_TxBBSwing_2G; -+ registry_par->TxBBSwing_5G = (s8)rtw_TxBBSwing_5G; -+ registry_par->bEn_RFE = 1; -+ registry_par->RFE_Type = (u8)rtw_RFE_type; -+ registry_par->PowerTracking_Type = (u8)rtw_powertracking_type; -+ registry_par->AmplifierType_2G = (u8)rtw_amplifier_type_2g; -+ registry_par->AmplifierType_5G = (u8)rtw_amplifier_type_5g; -+ registry_par->GLNA_Type = (u8)rtw_GLNA_type; -+#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ registry_par->load_phy_file = (u8)rtw_load_phy_file; -+ registry_par->RegDecryptCustomFile = (u8)rtw_decrypt_phy_file; -+#endif -+ registry_par->qos_opt_enable = (u8)rtw_qos_opt_enable; -+ -+ registry_par->hiq_filter = (u8)rtw_hiq_filter; -+ -+ registry_par->adaptivity_en = (u8)rtw_adaptivity_en; -+ registry_par->adaptivity_mode = (u8)rtw_adaptivity_mode; -+ registry_par->adaptivity_th_l2h_ini = (s8)rtw_adaptivity_th_l2h_ini; -+ registry_par->adaptivity_th_edcca_hl_diff = (s8)rtw_adaptivity_th_edcca_hl_diff; -+ -+#ifdef CONFIG_DYNAMIC_SOML -+ registry_par->dyn_soml_en = (u8)rtw_dynamic_soml_en; -+ registry_par->dyn_soml_train_num = (u8)rtw_dynamic_soml_train_num; -+ registry_par->dyn_soml_interval = (u8)rtw_dynamic_soml_interval; -+ registry_par->dyn_soml_period = (u8)rtw_dynamic_soml_period; -+ registry_par->dyn_soml_delay = (u8)rtw_dynamic_soml_delay; -+#endif -+ -+ registry_par->boffefusemask = (u8)rtw_OffEfuseMask; -+ registry_par->bFileMaskEfuse = (u8)rtw_FileMaskEfuse; -+ registry_par->bBTFileMaskEfuse = (u8)rtw_FileMaskEfuse; -+ -+#ifdef CONFIG_RTW_ACS -+ registry_par->acs_mode = (u8)rtw_acs; -+ registry_par->acs_auto_scan = (u8)rtw_acs_auto_scan; -+#endif -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ registry_par->nm_mode = (u8)rtw_nm; -+#endif -+ registry_par->reg_rxgain_offset_2g = (u32) rtw_rxgain_offset_2g; -+ registry_par->reg_rxgain_offset_5gl = (u32) rtw_rxgain_offset_5gl; -+ registry_par->reg_rxgain_offset_5gm = (u32) rtw_rxgain_offset_5gm; -+ registry_par->reg_rxgain_offset_5gh = (u32) rtw_rxgain_offset_5gh; -+ -+#ifdef CONFIG_DFS_MASTER -+ registry_par->dfs_region_domain = (u8)rtw_dfs_region_domain; -+ #ifdef CONFIG_REGD_SRC_FROM_OS -+ if (rtw_regd_src == REGD_SRC_OS && registry_par->dfs_region_domain != RTW_DFS_REGD_NONE) { -+ RTW_WARN("%s force disable radar detection capability when regd_src is OS\n", __func__); -+ registry_par->dfs_region_domain = RTW_DFS_REGD_NONE; -+ } -+ #endif -+#endif -+ -+#ifdef CONFIG_MCC_MODE -+ registry_par->en_mcc = (u8)rtw_en_mcc; -+ registry_par->rtw_mcc_ap_bw20_target_tx_tp = (u32)rtw_mcc_ap_bw20_target_tx_tp; -+ registry_par->rtw_mcc_ap_bw40_target_tx_tp = (u32)rtw_mcc_ap_bw40_target_tx_tp; -+ registry_par->rtw_mcc_ap_bw80_target_tx_tp = (u32)rtw_mcc_ap_bw80_target_tx_tp; -+ registry_par->rtw_mcc_sta_bw20_target_tx_tp = (u32)rtw_mcc_sta_bw20_target_tx_tp; -+ registry_par->rtw_mcc_sta_bw40_target_tx_tp = (u32)rtw_mcc_sta_bw40_target_tx_tp; -+ registry_par->rtw_mcc_sta_bw80_target_tx_tp = (u32)rtw_mcc_sta_bw80_target_tx_tp; -+ registry_par->rtw_mcc_single_tx_cri = (u32)rtw_mcc_single_tx_cri; -+ registry_par->rtw_mcc_policy_table_idx = rtw_mcc_policy_table_idx; -+ registry_par->rtw_mcc_duration = (u8)rtw_mcc_duration; -+ registry_par->rtw_mcc_enable_runtime_duration = rtw_mcc_enable_runtime_duration; -+ registry_par->rtw_mcc_phydm_offload = rtw_mcc_phydm_offload; -+#endif /*CONFIG_MCC_MODE */ -+ -+#ifdef CONFIG_WOWLAN -+ registry_par->wowlan_enable = rtw_wow_enable; -+ registry_par->wakeup_event = rtw_wakeup_event; -+ registry_par->suspend_type = rtw_suspend_type; -+#endif -+ -+#if defined(CONFIG_SDIO_HCI) && defined(CONFIG_PREALLOC_RX_SKB_BUFFER) -+ if (rtw_recvbuf_nr != NR_RECVBUFF) { -+ RTW_WARN("CONFIG_PREALLOC_RX_SKB_BUFFER && CONFIG_SDIO_HCI, force recvbuf_nr to NR_RECVBUFF(%d)\n", NR_RECVBUFF); -+ rtw_recvbuf_nr = NR_RECVBUFF; -+ } -+#endif -+ registry_par->recvbuf_nr = rtw_recvbuf_nr; -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+ registry_par->trx_share_mode = rtw_trx_share_mode; -+#endif -+ registry_par->wowlan_sta_mix_mode = rtw_wowlan_sta_mix_mode; -+ -+#ifdef CONFIG_PCI_HCI -+ registry_par->pci_aspm_config = rtw_pci_aspm_enable; -+ registry_par->pci_dynamic_aspm_linkctrl = rtw_pci_dynamic_aspm_linkctrl; -+#endif -+ -+#ifdef CONFIG_RTW_NAPI -+ registry_par->en_napi = (u8)rtw_en_napi; -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+ registry_par->napi_threshold = (u32)rtw_napi_threshold; -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+#ifdef CONFIG_RTW_GRO -+ registry_par->en_gro = (u8)rtw_en_gro; -+ if (!registry_par->en_napi && registry_par->en_gro) { -+ registry_par->en_gro = 0; -+ RTW_WARN("Disable GRO because NAPI is not enabled\n"); -+ } -+#endif /* CONFIG_RTW_GRO */ -+#endif /* CONFIG_RTW_NAPI */ -+ -+ registry_par->iqk_fw_offload = (u8)rtw_iqk_fw_offload; -+ registry_par->ch_switch_offload = (u8)rtw_ch_switch_offload; -+ -+#ifdef CONFIG_TDLS -+ registry_par->en_tdls = rtw_en_tdls; -+#endif -+ -+#ifdef CONFIG_ADVANCE_OTA -+ registry_par->adv_ota = rtw_advnace_ota; -+#endif -+#ifdef CONFIG_FW_OFFLOAD_PARAM_INIT -+ registry_par->fw_param_init = rtw_fw_param_init; -+#endif -+#ifdef CONFIG_AP_MODE -+ registry_par->bmc_tx_rate = rtw_bmc_tx_rate; -+ #if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ registry_par->ap_src_b2u_flags = rtw_ap_src_b2u_flags; -+ registry_par->ap_fwd_b2u_flags = rtw_ap_fwd_b2u_flags; -+ #endif -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_RTW_MESH -+ #if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ registry_par->msrc_b2u_flags = rtw_msrc_b2u_flags; -+ registry_par->mfwd_b2u_flags = rtw_mfwd_b2u_flags; -+ #endif -+#endif /* CONFIG_RTW_MESH */ -+ -+#ifdef CONFIG_FW_HANDLE_TXBCN -+ registry_par->fw_tbtt_rpt = rtw_tbtt_rpt; -+#endif -+ registry_par->phydm_ability = rtw_phydm_ability; -+ registry_par->halrf_ability = rtw_halrf_ability; -+#ifdef CONFIG_RTW_MESH -+ registry_par->peer_alive_based_preq = rtw_peer_alive_based_preq; -+#endif -+ -+#ifdef RTW_BUSY_DENY_SCAN -+ registry_par->scan_interval_thr = rtw_scan_interval_thr; -+#endif -+ -+#ifdef CONFIG_RTL8822C_XCAP_NEW_POLICY -+ registry_par->rtw_8822c_xcap_overwrite = (u8)rtw_8822c_xcap_overwrite; -+#endif -+ -+#ifdef CONFIG_RTW_MULTI_AP -+ rtw_regsty_init_unassoc_sta_param(registry_par); -+#endif -+ -+ return status; -+} -+ -+/** -+ * rtw_net_set_mac_address -+ * This callback function is used for the Media Access Control address -+ * of each net_device needs to be changed. -+ * -+ * Arguments: -+ * @pnetdev: net_device pointer. -+ * @addr: new MAC address. -+ * -+ * Return: -+ * ret = 0: Permit to change net_device's MAC address. -+ * ret = -1 (Default): Operation not permitted. -+ * -+ * Auther: Arvin Liu -+ * Date: 2015/05/29 -+ */ -+static int rtw_net_set_mac_address(struct net_device *pnetdev, void *addr) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct sockaddr *sa = (struct sockaddr *)addr; -+ int ret = -1; -+ -+ /* only the net_device is in down state to permit modifying mac addr */ -+ if ((pnetdev->flags & IFF_UP) == _TRUE) { -+ RTW_INFO(FUNC_ADPT_FMT": The net_device's is not in down state\n" -+ , FUNC_ADPT_ARG(padapter)); -+ -+ return ret; -+ } -+ -+ /* if the net_device is linked, it's not permit to modify mac addr */ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) || -+ check_fwstate(pmlmepriv, WIFI_ASOC_STATE) || -+ check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY)) { -+ RTW_INFO(FUNC_ADPT_FMT": The net_device's is not idle currently\n" -+ , FUNC_ADPT_ARG(padapter)); -+ -+ return ret; -+ } -+ -+ /* check whether the input mac address is valid to permit modifying mac addr */ -+ if (rtw_check_invalid_mac_address(sa->sa_data, _FALSE) == _TRUE) { -+ RTW_INFO(FUNC_ADPT_FMT": Invalid Mac Addr for "MAC_FMT"\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(sa->sa_data)); -+ -+ return ret; -+ } -+ -+ _rtw_memcpy(adapter_mac_addr(padapter), sa->sa_data, ETH_ALEN); /* set mac addr to adapter */ -+ _rtw_memcpy(pnetdev->dev_addr, sa->sa_data, ETH_ALEN); /* set mac addr to net_device */ -+ -+#if 0 -+ if (rtw_is_hw_init_completed(padapter)) { -+ rtw_ps_deny(padapter, PS_DENY_IOCTL); -+ LeaveAllPowerSaveModeDirect(padapter); /* leave PS mode for guaranteeing to access hw register successfully */ -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_hal_change_macaddr_mbid(padapter, sa->sa_data); -+#else -+ rtw_hal_set_hwreg(padapter, HW_VAR_MAC_ADDR, sa->sa_data); /* set mac addr to mac register */ -+#endif -+ -+ rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); -+ } -+#else -+ rtw_ps_deny(padapter, PS_DENY_IOCTL); -+ LeaveAllPowerSaveModeDirect(padapter); /* leave PS mode for guaranteeing to access hw register successfully */ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_hal_change_macaddr_mbid(padapter, sa->sa_data); -+#else -+ rtw_hal_set_hwreg(padapter, HW_VAR_MAC_ADDR, sa->sa_data); /* set mac addr to mac register */ -+#endif -+ rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); -+#endif -+ -+ RTW_INFO(FUNC_ADPT_FMT": Set Mac Addr to "MAC_FMT" Successfully\n" -+ , FUNC_ADPT_ARG(padapter), MAC_ARG(sa->sa_data)); -+ -+ ret = 0; -+ -+ return ret; -+} -+ -+static struct net_device_stats *rtw_net_get_stats(struct net_device *pnetdev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct recv_priv *precvpriv = &(padapter->recvpriv); -+ -+ padapter->stats.tx_packets = pxmitpriv->tx_pkts;/* pxmitpriv->tx_pkts++; */ -+ padapter->stats.rx_packets = precvpriv->rx_pkts;/* precvpriv->rx_pkts++; */ -+ padapter->stats.tx_dropped = pxmitpriv->tx_drop; -+ padapter->stats.rx_dropped = precvpriv->rx_drop; -+ padapter->stats.tx_bytes = pxmitpriv->tx_bytes; -+ padapter->stats.rx_bytes = precvpriv->rx_bytes; -+ -+ return &padapter->stats; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+/* -+ * AC to queue mapping -+ * -+ * AC_VO -> queue 0 -+ * AC_VI -> queue 1 -+ * AC_BE -> queue 2 -+ * AC_BK -> queue 3 -+ */ -+static const u16 rtw_1d_to_queue[8] = { 2, 3, 3, 2, 1, 1, 0, 0 }; -+ -+/* Given a data frame determine the 802.1p/1d tag to use. */ -+unsigned int rtw_classify8021d(struct sk_buff *skb) -+{ -+ unsigned int dscp; -+ -+ /* skb->priority values from 256->263 are magic values to -+ * directly indicate a specific 802.1d priority. This is used -+ * to allow 802.1d priority to be passed directly in from VLAN -+ * tags, etc. -+ */ -+ if (skb->priority >= 256 && skb->priority <= 263) -+ return skb->priority - 256; -+ -+ switch (skb->protocol) { -+ case htons(ETH_P_IP): -+ dscp = ip_hdr(skb)->tos & 0xfc; -+ break; -+ default: -+ return 0; -+ } -+ -+ return dscp >> 5; -+} -+ -+ -+static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0) -+ #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 19, 0) -+ , struct net_device *sb_dev -+ #else -+ , void *accel_priv -+ #endif -+ #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 2, 0))) -+ , select_queue_fallback_t fallback -+ #endif -+#endif -+) -+{ -+ _adapter *padapter = rtw_netdev_priv(dev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ skb->priority = rtw_classify8021d(skb); -+ -+ if (pmlmepriv->acm_mask != 0) -+ skb->priority = qos_acm(pmlmepriv->acm_mask, skb->priority); -+ -+ return rtw_1d_to_queue[skb->priority]; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) */ -+ -+u16 rtw_os_recv_select_queue(u8 *msdu, enum rtw_rx_llc_hdl llc_hdl) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ u32 priority = 0; -+ -+ if (llc_hdl == RTW_RX_LLC_REMOVE) { -+ u16 eth_type = RTW_GET_BE16(msdu + SNAP_SIZE); -+ -+ if (eth_type == ETH_P_IP) { -+ struct iphdr *iphdr = (struct iphdr *)(msdu + SNAP_SIZE + 2); -+ unsigned int dscp = iphdr->tos & 0xfc; -+ -+ priority = dscp >> 5; -+ } -+ } -+ -+ return rtw_1d_to_queue[priority]; -+#else -+ return 0; -+#endif -+} -+ -+static u8 is_rtw_ndev(struct net_device *ndev) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+ return ndev->netdev_ops -+ && ndev->netdev_ops->ndo_do_ioctl -+ && ndev->netdev_ops->ndo_do_ioctl == rtw_ioctl; -+#else -+ return ndev->do_ioctl -+ && ndev->do_ioctl == rtw_ioctl; -+#endif -+} -+ -+static int rtw_ndev_notifier_call(struct notifier_block *nb, unsigned long state, void *ptr) -+{ -+ struct net_device *ndev; -+ -+ if (ptr == NULL) -+ return NOTIFY_DONE; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) -+ ndev = netdev_notifier_info_to_dev(ptr); -+#else -+ ndev = ptr; -+#endif -+ -+ if (ndev == NULL) -+ return NOTIFY_DONE; -+ -+ if (!is_rtw_ndev(ndev)) -+ return NOTIFY_DONE; -+ -+ RTW_INFO(FUNC_NDEV_FMT" state:%lu\n", FUNC_NDEV_ARG(ndev), state); -+ -+ switch (state) { -+ case NETDEV_CHANGENAME: -+ rtw_adapter_proc_replace(ndev); -+ break; -+ #ifdef CONFIG_NEW_NETDEV_HDL -+ case NETDEV_PRE_UP : -+ { -+ _adapter *adapter = rtw_netdev_priv(ndev); -+ -+ rtw_pwr_wakeup(adapter); -+ } -+ break; -+ #endif -+ } -+ -+ return NOTIFY_DONE; -+} -+ -+static struct notifier_block rtw_ndev_notifier = { -+ .notifier_call = rtw_ndev_notifier_call, -+}; -+ -+int rtw_ndev_notifier_register(void) -+{ -+ return register_netdevice_notifier(&rtw_ndev_notifier); -+} -+ -+void rtw_ndev_notifier_unregister(void) -+{ -+ unregister_netdevice_notifier(&rtw_ndev_notifier); -+} -+ -+int rtw_ndev_init(struct net_device *dev) -+{ -+ _adapter *adapter = rtw_netdev_priv(dev); -+ -+ RTW_PRINT(FUNC_ADPT_FMT" if%d mac_addr="MAC_FMT"\n" -+ , FUNC_ADPT_ARG(adapter), (adapter->iface_id + 1), MAC_ARG(dev->dev_addr)); -+ strncpy(adapter->old_ifname, dev->name, IFNAMSIZ); -+ adapter->old_ifname[IFNAMSIZ - 1] = '\0'; -+ rtw_adapter_proc_init(dev); -+ -+ return 0; -+} -+ -+void rtw_ndev_uninit(struct net_device *dev) -+{ -+ _adapter *adapter = rtw_netdev_priv(dev); -+ -+ RTW_PRINT(FUNC_ADPT_FMT" if%d\n" -+ , FUNC_ADPT_ARG(adapter), (adapter->iface_id + 1)); -+ rtw_adapter_proc_deinit(dev); -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+static const struct net_device_ops rtw_netdev_ops = { -+ .ndo_init = rtw_ndev_init, -+ .ndo_uninit = rtw_ndev_uninit, -+ .ndo_open = netdev_open, -+ .ndo_stop = netdev_close, -+ .ndo_start_xmit = rtw_xmit_entry, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ .ndo_select_queue = rtw_select_queue, -+#endif -+ .ndo_set_mac_address = rtw_net_set_mac_address, -+ .ndo_get_stats = rtw_net_get_stats, -+ .ndo_do_ioctl = rtw_ioctl, -+}; -+#endif -+ -+int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname) -+{ -+#ifdef CONFIG_EASY_REPLACEMENT -+ _adapter *padapter = rtw_netdev_priv(pnetdev); -+ struct net_device *TargetNetdev = NULL; -+ _adapter *TargetAdapter = NULL; -+ -+ if (padapter->bDongle == 1) { -+ TargetNetdev = rtw_get_same_net_ndev_by_name(pnetdev, "wlan0"); -+ if (TargetNetdev) { -+ RTW_INFO("Force onboard module driver disappear !!!\n"); -+ TargetAdapter = rtw_netdev_priv(TargetNetdev); -+ TargetAdapter->DriverState = DRIVER_DISAPPEAR; -+ -+ padapter->pid[0] = TargetAdapter->pid[0]; -+ padapter->pid[1] = TargetAdapter->pid[1]; -+ padapter->pid[2] = TargetAdapter->pid[2]; -+ -+ dev_put(TargetNetdev); -+ unregister_netdev(TargetNetdev); -+ -+ padapter->DriverState = DRIVER_REPLACE_DONGLE; -+ } -+ } -+#endif /* CONFIG_EASY_REPLACEMENT */ -+ -+ if (dev_alloc_name(pnetdev, ifname) < 0) -+ RTW_ERR("dev_alloc_name, fail!\n"); -+ -+ rtw_netif_carrier_off(pnetdev); -+ /* rtw_netif_stop_queue(pnetdev); */ -+ -+ return 0; -+} -+ -+void rtw_hook_if_ops(struct net_device *ndev) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+ ndev->netdev_ops = &rtw_netdev_ops; -+#else -+ ndev->init = rtw_ndev_init; -+ ndev->uninit = rtw_ndev_uninit; -+ ndev->open = netdev_open; -+ ndev->stop = netdev_close; -+ ndev->hard_start_xmit = rtw_xmit_entry; -+ ndev->set_mac_address = rtw_net_set_mac_address; -+ ndev->get_stats = rtw_net_get_stats; -+ ndev->do_ioctl = rtw_ioctl; -+#endif -+} -+ -+#ifdef CONFIG_CONCURRENT_MODE -+static void rtw_hook_vir_if_ops(struct net_device *ndev); -+#endif -+struct net_device *rtw_init_netdev(_adapter *old_padapter) -+{ -+ _adapter *padapter; -+ struct net_device *pnetdev; -+ -+ if (old_padapter != NULL) { -+ rtw_os_ndev_free(old_padapter); -+ pnetdev = rtw_alloc_etherdev_with_old_priv(sizeof(_adapter), (void *)old_padapter); -+ } else -+ pnetdev = rtw_alloc_etherdev(sizeof(_adapter)); -+ -+ if (!pnetdev) -+ return NULL; -+ -+ padapter = rtw_netdev_priv(pnetdev); -+ padapter->pnetdev = pnetdev; -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24) -+ SET_MODULE_OWNER(pnetdev); -+#endif -+ -+ rtw_hook_if_ops(pnetdev); -+#ifdef CONFIG_CONCURRENT_MODE -+ if (!is_primary_adapter(padapter)) -+ rtw_hook_vir_if_ops(pnetdev); -+#endif /* CONFIG_CONCURRENT_MODE */ -+ -+ -+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX -+ pnetdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39) -+ pnetdev->hw_features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); -+#endif -+#endif -+ -+#ifdef CONFIG_RTW_NETIF_SG -+ pnetdev->features |= NETIF_F_SG; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39) -+ pnetdev->hw_features |= NETIF_F_SG; -+#endif -+#endif -+ -+ if ((pnetdev->features & NETIF_F_SG) && (pnetdev->features & NETIF_F_IP_CSUM)) { -+ pnetdev->features |= (NETIF_F_TSO | NETIF_F_GSO); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39) -+ pnetdev->hw_features |= (NETIF_F_TSO | NETIF_F_GSO); -+#endif -+ } -+ /* pnetdev->tx_timeout = NULL; */ -+ pnetdev->watchdog_timeo = HZ * 3; /* 3 second timeout */ -+ -+#ifdef CONFIG_WIRELESS_EXT -+ pnetdev->wireless_handlers = (struct iw_handler_def *)&rtw_handlers_def; -+#endif -+ -+#ifdef WIRELESS_SPY -+ /* priv->wireless_data.spy_data = &priv->spy_data; */ -+ /* pnetdev->wireless_data = &priv->wireless_data; */ -+#endif -+ -+ return pnetdev; -+} -+ -+int rtw_os_ndev_alloc(_adapter *adapter) -+{ -+ int ret = _FAIL; -+ struct net_device *ndev = NULL; -+ -+ ndev = rtw_init_netdev(adapter); -+ if (ndev == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0) -+ SET_NETDEV_DEV(ndev, dvobj_to_dev(adapter_to_dvobj(adapter))); -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ if (adapter_to_dvobj(adapter)->bdma64) -+ ndev->features |= NETIF_F_HIGHDMA; -+ ndev->irq = adapter_to_dvobj(adapter)->irq; -+#endif -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+ if (rtw_cfg80211_ndev_res_alloc(adapter) != _SUCCESS) { -+ rtw_warn_on(1); -+ } else -+#endif -+ ret = _SUCCESS; -+ -+ if (ret != _SUCCESS && ndev) -+ rtw_free_netdev(ndev); -+exit: -+ return ret; -+} -+ -+void rtw_os_ndev_free(_adapter *adapter) -+{ -+#if defined(CONFIG_IOCTL_CFG80211) -+ rtw_cfg80211_ndev_res_free(adapter); -+#endif -+ -+ if (adapter->pnetdev) { -+ rtw_free_netdev(adapter->pnetdev); -+ adapter->pnetdev = NULL; -+ } -+} -+ -+/* For ethtool +++ */ -+#ifdef CONFIG_IOCTL_CFG80211 -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 7, 8)) -+static void rtw_ethtool_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) -+{ -+ struct wireless_dev *wdev = NULL; -+ _adapter *padapter = NULL; -+ HAL_DATA_TYPE *hal_data = NULL; -+ -+ wdev = dev->ieee80211_ptr; -+ if (wdev) { -+ strlcpy(info->driver, wiphy_dev(wdev->wiphy)->driver->name, -+ sizeof(info->driver)); -+ } else { -+ strlcpy(info->driver, "N/A", sizeof(info->driver)); -+ } -+ -+ strlcpy(info->version, DRIVERVERSION, sizeof(info->version)); -+ -+ padapter = (_adapter *)rtw_netdev_priv(dev); -+ if (padapter) { -+ hal_data = GET_HAL_DATA(padapter); -+ } -+ -+ if (hal_data) { -+ scnprintf(info->fw_version, sizeof(info->fw_version), "%d.%d", -+ hal_data->firmware_version, hal_data->firmware_sub_version); -+ } else { -+ strlcpy(info->fw_version, "N/A", sizeof(info->fw_version)); -+ } -+ -+ strlcpy(info->bus_info, dev_name(wiphy_dev(wdev->wiphy)), -+ sizeof(info->bus_info)); -+} -+ -+static const char rtw_ethtool_gstrings_sta_stats[][ETH_GSTRING_LEN] = { -+ "rx_packets", "rx_bytes", "rx_dropped", -+ "tx_packets", "tx_bytes", "tx_dropped", -+}; -+ -+#define RTW_ETHTOOL_STATS_LEN ARRAY_SIZE(rtw_ethtool_gstrings_sta_stats) -+ -+static int rtw_ethtool_get_sset_count(struct net_device *dev, int sset) -+{ -+ int rv = 0; -+ -+ if (sset == ETH_SS_STATS) -+ rv += RTW_ETHTOOL_STATS_LEN; -+ -+ if (rv == 0) -+ return -EOPNOTSUPP; -+ -+ return rv; -+} -+ -+static void rtw_ethtool_get_strings(struct net_device *dev, u32 sset, u8 *data) -+{ -+ int sz_sta_stats = 0; -+ -+ if (sset == ETH_SS_STATS) { -+ sz_sta_stats = sizeof(rtw_ethtool_gstrings_sta_stats); -+ memcpy(data, rtw_ethtool_gstrings_sta_stats, sz_sta_stats); -+ } -+} -+ -+static void rtw_ethtool_get_stats(struct net_device *dev, -+ struct ethtool_stats *stats, -+ u64 *data) -+{ -+ int i = 0; -+ _adapter *padapter = NULL; -+ struct xmit_priv *pxmitpriv = NULL; -+ struct recv_priv *precvpriv = NULL; -+ -+ memset(data, 0, sizeof(u64) * RTW_ETHTOOL_STATS_LEN); -+ -+ padapter = (_adapter *)rtw_netdev_priv(dev); -+ if (padapter) { -+ pxmitpriv = &(padapter->xmitpriv); -+ precvpriv = &(padapter->recvpriv); -+ -+ data[i++] = precvpriv->rx_pkts; -+ data[i++] = precvpriv->rx_bytes; -+ data[i++] = precvpriv->rx_drop; -+ -+ data[i++] = pxmitpriv->tx_pkts; -+ data[i++] = pxmitpriv->tx_bytes; -+ data[i++] = pxmitpriv->tx_drop; -+ } else { -+ data[i++] = 0; -+ data[i++] = 0; -+ data[i++] = 0; -+ -+ data[i++] = 0; -+ data[i++] = 0; -+ data[i++] = 0; -+ } -+} -+ -+static const struct ethtool_ops rtw_ethtool_ops = { -+ .get_drvinfo = rtw_ethtool_get_drvinfo, -+ .get_link = ethtool_op_get_link, -+ .get_strings = rtw_ethtool_get_strings, -+ .get_ethtool_stats = rtw_ethtool_get_stats, -+ .get_sset_count = rtw_ethtool_get_sset_count, -+}; -+#endif // LINUX_VERSION_CODE >= 3.7.8 -+#endif /* CONFIG_IOCTL_CFG80211 */ -+/* For ethtool --- */ -+ -+int rtw_os_ndev_register(_adapter *adapter, const char *name) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ int ret = _SUCCESS; -+ struct net_device *ndev = adapter->pnetdev; -+ u8 rtnl_lock_needed = rtw_rtnl_lock_needed(dvobj); -+ -+#ifdef CONFIG_RTW_NAPI -+ netif_napi_add(ndev, &adapter->napi, rtw_recv_napi_poll, RTL_NAPI_WEIGHT); -+#endif /* CONFIG_RTW_NAPI */ -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+ if (rtw_cfg80211_ndev_res_register(adapter) != _SUCCESS) { -+ rtw_warn_on(1); -+ ret = _FAIL; -+ goto exit; -+ } -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 7, 8)) -+ netdev_set_default_ethtool_ops(ndev, &rtw_ethtool_ops); -+#endif /* LINUX_VERSION_CODE >= 3.7.8 */ -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && defined(CONFIG_PCI_HCI) -+ ndev->gro_flush_timeout = 100000; -+#endif -+ /* alloc netdev name */ -+ rtw_init_netdev_name(ndev, name); -+ -+ _rtw_memcpy(ndev->dev_addr, adapter_mac_addr(adapter), ETH_ALEN); -+ -+ /* Tell the network stack we exist */ -+ -+ if (rtnl_lock_needed) -+ ret = (register_netdev(ndev) == 0) ? _SUCCESS : _FAIL; -+ else -+ ret = (register_netdevice(ndev) == 0) ? _SUCCESS : _FAIL; -+ -+ if (ret == _SUCCESS) -+ adapter->registered = 1; -+ else -+ RTW_INFO(FUNC_NDEV_FMT" if%d Failed!\n", FUNC_NDEV_ARG(ndev), (adapter->iface_id + 1)); -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+ if (ret != _SUCCESS) { -+ rtw_cfg80211_ndev_res_unregister(adapter); -+ #if !defined(RTW_SINGLE_WIPHY) -+ rtw_wiphy_unregister(adapter_to_wiphy(adapter)); -+ #endif -+ } -+#endif -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+exit: -+#endif -+#ifdef CONFIG_RTW_NAPI -+ if (ret != _SUCCESS) -+ netif_napi_del(&adapter->napi); -+#endif /* CONFIG_RTW_NAPI */ -+ -+ return ret; -+} -+ -+void rtw_os_ndev_unregister(_adapter *adapter) -+{ -+ struct net_device *netdev = NULL; -+ -+ if (adapter == NULL || adapter->registered == 0) -+ return; -+ -+ adapter->ndev_unregistering = 1; -+ -+ netdev = adapter->pnetdev; -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+ rtw_cfg80211_ndev_res_unregister(adapter); -+#endif -+ -+ if ((adapter->DriverState != DRIVER_DISAPPEAR) && netdev) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 rtnl_lock_needed = rtw_rtnl_lock_needed(dvobj); -+ -+ if (rtnl_lock_needed) -+ unregister_netdev(netdev); -+ else -+ unregister_netdevice(netdev); -+ } -+ -+#if defined(CONFIG_IOCTL_CFG80211) && !defined(RTW_SINGLE_WIPHY) -+#ifdef CONFIG_RFKILL_POLL -+ rtw_cfg80211_deinit_rfkill(adapter_to_wiphy(adapter)); -+#endif -+ rtw_wiphy_unregister(adapter_to_wiphy(adapter)); -+#endif -+ -+#ifdef CONFIG_RTW_NAPI -+ if (adapter->napi_state == NAPI_ENABLE) { -+ napi_disable(&adapter->napi); -+ adapter->napi_state = NAPI_DISABLE; -+ } -+ netif_napi_del(&adapter->napi); -+#endif /* CONFIG_RTW_NAPI */ -+ -+ adapter->registered = 0; -+ adapter->ndev_unregistering = 0; -+} -+ -+/** -+ * rtw_os_ndev_init - Allocate and register OS layer net device and relating structures for @adapter -+ * @adapter: the adapter on which this function applies -+ * @name: the requesting net device name -+ * -+ * Returns: -+ * _SUCCESS or _FAIL -+ */ -+int rtw_os_ndev_init(_adapter *adapter, const char *name) -+{ -+ int ret = _FAIL; -+ -+ if (rtw_os_ndev_alloc(adapter) != _SUCCESS) -+ goto exit; -+ -+ if (rtw_os_ndev_register(adapter, name) != _SUCCESS) -+ goto os_ndev_free; -+ -+ ret = _SUCCESS; -+ -+os_ndev_free: -+ if (ret != _SUCCESS) -+ rtw_os_ndev_free(adapter); -+exit: -+ return ret; -+} -+ -+/** -+ * rtw_os_ndev_deinit - Unregister and free OS layer net device and relating structures for @adapter -+ * @adapter: the adapter on which this function applies -+ */ -+void rtw_os_ndev_deinit(_adapter *adapter) -+{ -+ rtw_os_ndev_unregister(adapter); -+ rtw_os_ndev_free(adapter); -+} -+ -+int rtw_os_ndevs_alloc(struct dvobj_priv *dvobj) -+{ -+ int i, status = _SUCCESS; -+ _adapter *adapter; -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+ if (rtw_cfg80211_dev_res_alloc(dvobj) != _SUCCESS) { -+ rtw_warn_on(1); -+ return _FAIL; -+ } -+#endif -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ -+ if (i >= CONFIG_IFACE_NUMBER) { -+ RTW_ERR("%s %d >= CONFIG_IFACE_NUMBER(%d)\n", __func__, i, CONFIG_IFACE_NUMBER); -+ rtw_warn_on(1); -+ continue; -+ } -+ -+ adapter = dvobj->padapters[i]; -+ if (adapter && !adapter->pnetdev) { -+ -+ #ifdef CONFIG_RTW_DYNAMIC_NDEV -+ if (!is_primary_adapter(adapter)) -+ continue; -+ #endif -+ -+ status = rtw_os_ndev_alloc(adapter); -+ if (status != _SUCCESS) { -+ rtw_warn_on(1); -+ break; -+ } -+ } -+ } -+ -+ if (status != _SUCCESS) { -+ for (; i >= 0; i--) { -+ adapter = dvobj->padapters[i]; -+ if (adapter && adapter->pnetdev) -+ rtw_os_ndev_free(adapter); -+ } -+ } -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+ if (status != _SUCCESS) -+ rtw_cfg80211_dev_res_free(dvobj); -+#endif -+ -+ return status; -+} -+ -+void rtw_os_ndevs_free(struct dvobj_priv *dvobj) -+{ -+ int i; -+ _adapter *adapter = NULL; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ -+ if (i >= CONFIG_IFACE_NUMBER) { -+ RTW_ERR("%s %d >= CONFIG_IFACE_NUMBER(%d)\n", __func__, i, CONFIG_IFACE_NUMBER); -+ rtw_warn_on(1); -+ continue; -+ } -+ -+ adapter = dvobj->padapters[i]; -+ -+ if (adapter == NULL) -+ continue; -+ -+ rtw_os_ndev_free(adapter); -+ } -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+ rtw_cfg80211_dev_res_free(dvobj); -+#endif -+} -+ -+u32 rtw_start_drv_threads(_adapter *padapter) -+{ -+ u32 _status = _SUCCESS; -+ -+ RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(padapter)); -+ -+#ifdef CONFIG_XMIT_THREAD_MODE -+#if defined(CONFIG_SDIO_HCI) -+ if (is_primary_adapter(padapter)) -+#endif -+ { -+ if (padapter->xmitThread == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT " start RTW_XMIT_THREAD\n", FUNC_ADPT_ARG(padapter)); -+ padapter->xmitThread = kthread_run(rtw_xmit_thread, padapter, "RTW_XMIT_THREAD"); -+ if (IS_ERR(padapter->xmitThread)) { -+ padapter->xmitThread = NULL; -+ _status = _FAIL; -+ } -+ } -+ } -+#endif /* #ifdef CONFIG_XMIT_THREAD_MODE */ -+ -+#ifdef CONFIG_RECV_THREAD_MODE -+ if (is_primary_adapter(padapter)) { -+ if (padapter->recvThread == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT " start RTW_RECV_THREAD\n", FUNC_ADPT_ARG(padapter)); -+ padapter->recvThread = kthread_run(rtw_recv_thread, padapter, "RTW_RECV_THREAD"); -+ if (IS_ERR(padapter->recvThread)) { -+ padapter->recvThread = NULL; -+ _status = _FAIL; -+ } -+ } -+ } -+#endif -+ -+ if (is_primary_adapter(padapter)) { -+ if (padapter->cmdThread == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT " start RTW_CMD_THREAD\n", FUNC_ADPT_ARG(padapter)); -+ padapter->cmdThread = kthread_run(rtw_cmd_thread, padapter, "RTW_CMD_THREAD"); -+ if (IS_ERR(padapter->cmdThread)) { -+ padapter->cmdThread = NULL; -+ _status = _FAIL; -+ } -+ else -+ _rtw_down_sema(&padapter->cmdpriv.start_cmdthread_sema); /* wait for cmd_thread to run */ -+ } -+ } -+ -+ -+#ifdef CONFIG_EVENT_THREAD_MODE -+ if (padapter->evtThread == NULL) { -+ RTW_INFO(FUNC_ADPT_FMT " start RTW_EVENT_THREAD\n", FUNC_ADPT_ARG(padapter)); -+ padapter->evtThread = kthread_run(event_thread, padapter, "RTW_EVENT_THREAD"); -+ if (IS_ERR(padapter->evtThread)) { -+ padapter->evtThread = NULL; -+ _status = _FAIL; -+ } -+ } -+#endif -+ -+ rtw_hal_start_thread(padapter); -+ return _status; -+ -+} -+ -+void rtw_stop_drv_threads(_adapter *padapter) -+{ -+ RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(padapter)); -+ if (is_primary_adapter(padapter)) -+ rtw_stop_cmd_thread(padapter); -+ -+#ifdef CONFIG_EVENT_THREAD_MODE -+ if (padapter->evtThread) { -+ _rtw_up_sema(&padapter->evtpriv.evt_notify); -+ rtw_thread_stop(padapter->evtThread); -+ padapter->evtThread = NULL; -+ } -+#endif -+ -+#ifdef CONFIG_XMIT_THREAD_MODE -+ /* Below is to termindate tx_thread... */ -+#if defined(CONFIG_SDIO_HCI) -+ /* Only wake-up primary adapter */ -+ if (is_primary_adapter(padapter)) -+#endif /*SDIO_HCI */ -+ { -+ if (padapter->xmitThread) { -+ _rtw_up_sema(&padapter->xmitpriv.xmit_sema); -+ rtw_thread_stop(padapter->xmitThread); -+ padapter->xmitThread = NULL; -+ } -+ } -+#endif -+ -+#ifdef CONFIG_RECV_THREAD_MODE -+ if (is_primary_adapter(padapter) && padapter->recvThread) { -+ /* Below is to termindate rx_thread... */ -+ _rtw_up_sema(&padapter->recvpriv.recv_sema); -+ rtw_thread_stop(padapter->recvThread); -+ padapter->recvThread = NULL; -+ } -+#endif -+ -+ rtw_hal_stop_thread(padapter); -+} -+ -+u8 rtw_init_default_value(_adapter *padapter) -+{ -+ u8 ret = _SUCCESS; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ -+ /* xmit_priv */ -+ pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense; -+ pxmitpriv->vcs = pregistrypriv->vcs_type; -+ pxmitpriv->vcs_type = pregistrypriv->vcs_type; -+ /* pxmitpriv->rts_thresh = pregistrypriv->rts_thresh; */ -+ pxmitpriv->frag_len = pregistrypriv->frag_thresh; -+ -+ /* security_priv */ -+ /* rtw_get_encrypt_decrypt_from_registrypriv(padapter); */ -+ psecuritypriv->binstallGrpkey = _FAIL; -+#ifdef CONFIG_GTK_OL -+ psecuritypriv->binstallKCK_KEK = _FAIL; -+#endif /* CONFIG_GTK_OL */ -+ psecuritypriv->sw_encrypt = pregistrypriv->software_encrypt; -+ psecuritypriv->sw_decrypt = pregistrypriv->software_decrypt; -+ -+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; /* open system */ -+ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; -+ -+ psecuritypriv->dot11PrivacyKeyIndex = 0; -+ -+ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; -+ psecuritypriv->dot118021XGrpKeyid = 1; -+ -+ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; -+ psecuritypriv->ndisencryptstatus = Ndis802_11WEPDisabled; -+ psecuritypriv->dot118021x_bmc_cam_id = INVALID_SEC_MAC_CAM_ID; -+ -+ -+ /* pwrctrl_priv */ -+ -+ -+ /* registry_priv */ -+ rtw_init_registrypriv_dev_network(padapter); -+ rtw_update_registrypriv_dev_network(padapter); -+ -+ -+ /* hal_priv */ -+ rtw_hal_def_value_init(padapter); -+ -+#ifdef CONFIG_MCC_MODE -+ /* MCC parameter */ -+ rtw_hal_mcc_parameter_init(padapter); -+#endif /* CONFIG_MCC_MODE */ -+ -+ /* misc. */ -+ RTW_ENABLE_FUNC(padapter, DF_RX_BIT); -+ RTW_ENABLE_FUNC(padapter, DF_TX_BIT); -+ padapter->bLinkInfoDump = 0; -+ padapter->bNotifyChannelChange = _FALSE; -+#ifdef CONFIG_P2P -+ padapter->bShowGetP2PState = 1; -+#endif -+ -+ /* for debug purpose */ -+ padapter->fix_rate = 0xFF; -+ padapter->data_fb = 0; -+ padapter->fix_bw = 0xFF; -+ padapter->power_offset = 0; -+ padapter->rsvd_page_offset = 0; -+ padapter->rsvd_page_num = 0; -+#ifdef CONFIG_AP_MODE -+ padapter->bmc_tx_rate = pregistrypriv->bmc_tx_rate; -+ #if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ padapter->b2u_flags_ap_src = pregistrypriv->ap_src_b2u_flags; -+ padapter->b2u_flags_ap_fwd = pregistrypriv->ap_fwd_b2u_flags; -+ #endif -+#endif -+ padapter->driver_tx_bw_mode = pregistrypriv->tx_bw_mode; -+ -+ padapter->driver_ampdu_spacing = 0xFF; -+ padapter->driver_rx_ampdu_factor = 0xFF; -+ padapter->driver_rx_ampdu_spacing = 0xFF; -+ padapter->fix_rx_ampdu_accept = RX_AMPDU_ACCEPT_INVALID; -+ padapter->fix_rx_ampdu_size = RX_AMPDU_SIZE_INVALID; -+#ifdef CONFIG_TX_AMSDU -+ padapter->tx_amsdu = 2; -+ padapter->tx_amsdu_rate = 400; -+#endif -+ padapter->driver_tx_max_agg_num = 0xFF; -+#ifdef DBG_RX_COUNTER_DUMP -+ padapter->dump_rx_cnt_mode = 0; -+ padapter->drv_rx_cnt_ok = 0; -+ padapter->drv_rx_cnt_crcerror = 0; -+ padapter->drv_rx_cnt_drop = 0; -+#endif -+#ifdef CONFIG_RTW_NAPI -+ padapter->napi_state = NAPI_DISABLE; -+#endif -+ -+#ifdef CONFIG_RTW_ACS -+ if (pregistrypriv->acs_mode) -+ rtw_acs_start(padapter); -+ else -+ rtw_acs_stop(padapter); -+#endif -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ if (pregistrypriv->nm_mode) -+ rtw_nm_enable(padapter); -+ else -+ rtw_nm_disable(padapter); -+#endif -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ ATOMIC_SET(&padapter->tbtx_tx_pause, _FALSE); -+ ATOMIC_SET(&padapter->tbtx_remove_tx_pause, _FALSE); -+ padapter->tbtx_capability = _TRUE; -+#endif -+ -+ return ret; -+} -+#ifdef CONFIG_CLIENT_PORT_CFG -+extern void rtw_clt_port_init(struct clt_port_t *cltp); -+extern void rtw_clt_port_deinit(struct clt_port_t *cltp); -+#endif -+ -+struct dvobj_priv *devobj_init(void) -+{ -+ struct dvobj_priv *pdvobj = NULL; -+ -+ pdvobj = (struct dvobj_priv *)rtw_zmalloc(sizeof(*pdvobj)); -+ if (pdvobj == NULL) -+ return NULL; -+ -+ _rtw_mutex_init(&pdvobj->hw_init_mutex); -+ _rtw_mutex_init(&pdvobj->h2c_fwcmd_mutex); -+ _rtw_mutex_init(&pdvobj->setch_mutex); -+ _rtw_mutex_init(&pdvobj->setbw_mutex); -+ _rtw_mutex_init(&pdvobj->rf_read_reg_mutex); -+ _rtw_mutex_init(&pdvobj->ioctrl_mutex); -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+ _rtw_mutex_init(&pdvobj->sd_indirect_access_mutex); -+#endif -+#ifdef CONFIG_SYSON_INDIRECT_ACCESS -+ _rtw_mutex_init(&pdvobj->syson_indirect_access_mutex); -+#endif -+#ifdef CONFIG_RTW_CUSTOMER_STR -+ _rtw_mutex_init(&pdvobj->customer_str_mutex); -+ _rtw_memset(pdvobj->customer_str, 0xFF, RTW_CUSTOMER_STR_LEN); -+#endif -+#ifdef CONFIG_PROTSEL_PORT -+ _rtw_mutex_init(&pdvobj->protsel_port.mutex); -+#endif -+#ifdef CONFIG_PROTSEL_ATIMDTIM -+ _rtw_mutex_init(&pdvobj->protsel_atimdtim.mutex); -+#endif -+#ifdef CONFIG_PROTSEL_MACSLEEP -+ _rtw_mutex_init(&pdvobj->protsel_macsleep.mutex); -+#endif -+ -+ pdvobj->processing_dev_remove = _FALSE; -+ -+ ATOMIC_SET(&pdvobj->disable_func, 0); -+ -+ rtw_macid_ctl_init(&pdvobj->macid_ctl); -+#ifdef CONFIG_CLIENT_PORT_CFG -+ rtw_clt_port_init(&pdvobj->clt_port); -+#endif -+ _rtw_spinlock_init(&pdvobj->cam_ctl.lock); -+ _rtw_mutex_init(&pdvobj->cam_ctl.sec_cam_access_mutex); -+#if defined(CONFIG_PLATFORM_RTK129X) && defined(CONFIG_PCI_HCI) -+ _rtw_spinlock_init(&pdvobj->io_reg_lock); -+#endif -+#ifdef CONFIG_MBSSID_CAM -+ rtw_mbid_cam_init(pdvobj); -+#endif -+ -+#ifdef CONFIG_AP_MODE -+ #ifdef CONFIG_SUPPORT_MULTI_BCN -+ pdvobj->nr_ap_if = 0; -+ pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL; /* default value is equal to the default beacon_interval (100ms) */ -+ _rtw_init_queue(&pdvobj->ap_if_q); -+ pdvobj->vap_map = 0; -+ #endif /*CONFIG_SUPPORT_MULTI_BCN*/ -+ #ifdef CONFIG_SWTIMER_BASED_TXBCN -+ rtw_init_timer(&(pdvobj->txbcn_timer), NULL, tx_beacon_timer_handlder, pdvobj); -+ #endif -+#endif -+ -+ rtw_init_timer(&(pdvobj->dynamic_chk_timer), NULL, rtw_dynamic_check_timer_handlder, pdvobj); -+ rtw_init_timer(&(pdvobj->periodic_tsf_update_end_timer), NULL, rtw_hal_periodic_tsf_update_end_timer_hdl, pdvobj); -+ -+#ifdef CONFIG_MCC_MODE -+ _rtw_mutex_init(&(pdvobj->mcc_objpriv.mcc_mutex)); -+ _rtw_mutex_init(&(pdvobj->mcc_objpriv.mcc_tsf_req_mutex)); -+ _rtw_mutex_init(&(pdvobj->mcc_objpriv.mcc_dbg_reg_mutex)); -+ _rtw_spinlock_init(&pdvobj->mcc_objpriv.mcc_lock); -+#endif /* CONFIG_MCC_MODE */ -+ -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+ pdvobj->en_napi_dynamic = 0; -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+ -+ -+#ifdef CONFIG_RTW_TPT_MODE -+ pdvobj->tpt_mode = 0; -+ pdvobj->edca_be_ul = 0x5ea42b; -+ pdvobj->edca_be_dl = 0x00a42b; -+#endif -+ pdvobj->scan_deny = _FALSE; -+ -+ return pdvobj; -+ -+} -+ -+void devobj_deinit(struct dvobj_priv *pdvobj) -+{ -+ if (!pdvobj) -+ return; -+ -+ /* TODO: use rtw_os_ndevs_deinit instead at the first stage of driver's dev deinit function */ -+#if defined(CONFIG_IOCTL_CFG80211) -+ rtw_cfg80211_dev_res_free(pdvobj); -+#endif -+ -+#ifdef CONFIG_MCC_MODE -+ _rtw_mutex_free(&(pdvobj->mcc_objpriv.mcc_mutex)); -+ _rtw_mutex_free(&(pdvobj->mcc_objpriv.mcc_tsf_req_mutex)); -+ _rtw_mutex_free(&(pdvobj->mcc_objpriv.mcc_dbg_reg_mutex)); -+ _rtw_spinlock_free(&pdvobj->mcc_objpriv.mcc_lock); -+#endif /* CONFIG_MCC_MODE */ -+ -+ _rtw_mutex_free(&pdvobj->hw_init_mutex); -+ _rtw_mutex_free(&pdvobj->h2c_fwcmd_mutex); -+ -+#ifdef CONFIG_RTW_CUSTOMER_STR -+ _rtw_mutex_free(&pdvobj->customer_str_mutex); -+#endif -+#ifdef CONFIG_PROTSEL_PORT -+ _rtw_mutex_free(&pdvobj->protsel_port.mutex); -+#endif -+#ifdef CONFIG_PROTSEL_ATIMDTIM -+ _rtw_mutex_free(&pdvobj->protsel_atimdtim.mutex); -+#endif -+#ifdef CONFIG_PROTSEL_MACSLEEP -+ _rtw_mutex_free(&pdvobj->protsel_macsleep.mutex); -+#endif -+ -+ _rtw_mutex_free(&pdvobj->setch_mutex); -+ _rtw_mutex_free(&pdvobj->setbw_mutex); -+ _rtw_mutex_free(&pdvobj->rf_read_reg_mutex); -+ _rtw_mutex_free(&pdvobj->ioctrl_mutex); -+#ifdef CONFIG_SDIO_INDIRECT_ACCESS -+ _rtw_mutex_free(&pdvobj->sd_indirect_access_mutex); -+#endif -+#ifdef CONFIG_SYSON_INDIRECT_ACCESS -+ _rtw_mutex_free(&pdvobj->syson_indirect_access_mutex); -+#endif -+ -+ rtw_macid_ctl_deinit(&pdvobj->macid_ctl); -+#ifdef CONFIG_CLIENT_PORT_CFG -+ rtw_clt_port_deinit(&pdvobj->clt_port); -+#endif -+ -+ _rtw_spinlock_free(&pdvobj->cam_ctl.lock); -+ _rtw_mutex_free(&pdvobj->cam_ctl.sec_cam_access_mutex); -+ -+#if defined(CONFIG_PLATFORM_RTK129X) && defined(CONFIG_PCI_HCI) -+ _rtw_spinlock_free(&pdvobj->io_reg_lock); -+#endif -+#ifdef CONFIG_MBSSID_CAM -+ rtw_mbid_cam_deinit(pdvobj); -+#endif -+#ifdef CONFIG_SUPPORT_MULTI_BCN -+ _rtw_spinlock_free(&(pdvobj->ap_if_q.lock)); -+#endif -+ rtw_mfree((u8 *)pdvobj, sizeof(*pdvobj)); -+} -+ -+inline u8 rtw_rtnl_lock_needed(struct dvobj_priv *dvobj) -+{ -+ if (dvobj->rtnl_lock_holder && dvobj->rtnl_lock_holder == current) -+ return 0; -+ return 1; -+} -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)) -+static inline int rtnl_is_locked(void) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 17)) -+ if (unlikely(rtnl_trylock())) { -+ rtnl_unlock(); -+#else -+ if (unlikely(down_trylock(&rtnl_sem) == 0)) { -+ up(&rtnl_sem); -+#endif -+ return 0; -+ } -+ return 1; -+} -+#endif -+ -+inline void rtw_set_rtnl_lock_holder(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl) -+{ -+ rtw_warn_on(!rtnl_is_locked()); -+ -+ if (!thd_hdl || rtnl_is_locked()) -+ dvobj->rtnl_lock_holder = thd_hdl; -+ -+ if (dvobj->rtnl_lock_holder && 0) -+ RTW_INFO("rtnl_lock_holder: %s:%d\n", current->comm, current->pid); -+} -+ -+u8 rtw_reset_drv_sw(_adapter *padapter) -+{ -+ u8 ret8 = _SUCCESS; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ /* hal_priv */ -+ rtw_hal_def_value_init(padapter); -+ -+ RTW_ENABLE_FUNC(padapter, DF_RX_BIT); -+ RTW_ENABLE_FUNC(padapter, DF_TX_BIT); -+ -+ padapter->bLinkInfoDump = 0; -+ -+ padapter->xmitpriv.tx_pkts = 0; -+ padapter->recvpriv.rx_pkts = 0; -+ -+ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; -+ -+ /* pmlmepriv->LinkDetectInfo.TrafficBusyState = _FALSE; */ -+ pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 0; -+ pmlmepriv->LinkDetectInfo.LowPowerTransitionCount = 0; -+ -+ _clr_fwstate_(pmlmepriv, WIFI_UNDER_SURVEY | WIFI_UNDER_LINKING); -+ -+#ifdef DBG_CONFIG_ERROR_DETECT -+ if (is_primary_adapter(padapter)) -+ rtw_hal_sreset_reset_value(padapter); -+#endif -+ pwrctrlpriv->pwr_state_check_cnts = 0; -+ -+ /* mlmeextpriv */ -+ mlmeext_set_scan_state(&padapter->mlmeextpriv, SCAN_DISABLE); -+ -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ rtw_set_signal_stat_timer(&padapter->recvpriv); -+#endif -+ -+ return ret8; -+} -+ -+ -+u8 rtw_init_drv_sw(_adapter *padapter) -+{ -+ u8 ret8 = _SUCCESS; -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+#endif -+ -+ #if defined(CONFIG_AP_MODE) && defined(CONFIG_SUPPORT_MULTI_BCN) -+ _rtw_init_listhead(&padapter->list); -+ #ifdef CONFIG_FW_HANDLE_TXBCN -+ padapter->vap_id = CONFIG_LIMITED_AP_NUM; -+ if (is_primary_adapter(padapter)) -+ adapter_to_dvobj(padapter)->vap_tbtt_rpt_map = adapter_to_regsty(padapter)->fw_tbtt_rpt; -+ #endif -+ #endif -+ -+ #ifdef CONFIG_CLIENT_PORT_CFG -+ padapter->client_id = MAX_CLIENT_PORT_NUM; -+ padapter->client_port = CLT_PORT_INVALID; -+ #endif -+ -+ if (is_primary_adapter(padapter)) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ -+ dvobj->macid_ctl.num = rtw_min(hal_spec->macid_num, MACID_NUM_SW_LIMIT); -+ dvobj->macid_ctl.macid_cap = hal_spec->macid_cap; -+ dvobj->macid_ctl.macid_txrpt = hal_spec->macid_txrpt; -+ dvobj->macid_ctl.macid_txrpt_pgsz = hal_spec->macid_txrpt_pgsz; -+ dvobj->cam_ctl.sec_cap = hal_spec->sec_cap; -+ dvobj->cam_ctl.num = rtw_min(hal_spec->sec_cam_ent_num, SEC_CAM_ENT_NUM_SW_LIMIT); -+ -+ dvobj->wow_ctl.wow_cap = hal_spec->wow_cap; -+ -+ #ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ dvobj->tx_aval_int_thr_mode = 2; /*setting by max tx length*/ -+ dvobj->tx_aval_int_thr_value = 0; -+ #endif /*CONFIG_SDIO_TX_ENABLE_AVAL_INT*/ -+ -+ #if CONFIG_TX_AC_LIFETIME -+ { -+ struct registry_priv *regsty = adapter_to_regsty(padapter); -+ int i; -+ -+ dvobj->tx_aclt_flags = regsty->tx_aclt_flags; -+ for (i = 0; i < TX_ACLT_CONF_NUM; i++) { -+ dvobj->tx_aclt_confs[i].en = regsty->tx_aclt_confs[i].en; -+ dvobj->tx_aclt_confs[i].vo_vi -+ = regsty->tx_aclt_confs[i].vo_vi / (hal_spec->tx_aclt_unit_factor * 32); -+ if (dvobj->tx_aclt_confs[i].vo_vi > 0xFFFF) -+ dvobj->tx_aclt_confs[i].vo_vi = 0xFFFF; -+ dvobj->tx_aclt_confs[i].be_bk -+ = regsty->tx_aclt_confs[i].be_bk / (hal_spec->tx_aclt_unit_factor * 32); -+ if (dvobj->tx_aclt_confs[i].be_bk > 0xFFFF) -+ dvobj->tx_aclt_confs[i].be_bk = 0xFFFF; -+ } -+ -+ dvobj->tx_aclt_force_val.en = 0xFF; -+ } -+ #endif -+ } -+ -+ ret8 = rtw_init_default_value(padapter); -+ -+ if ((rtw_init_cmd_priv(&padapter->cmdpriv)) == _FAIL) { -+ ret8 = _FAIL; -+ goto exit; -+ } -+ -+ padapter->cmdpriv.padapter = padapter; -+ -+ if ((rtw_init_evt_priv(&padapter->evtpriv)) == _FAIL) { -+ ret8 = _FAIL; -+ goto exit; -+ } -+ -+ if (is_primary_adapter(padapter)) { -+ if (rtw_hal_rfpath_init(padapter) == _FAIL) { -+ ret8 = _FAIL; -+ goto exit; -+ } -+ if (rtw_hal_trxnss_init(padapter) == _FAIL) { -+ ret8 = _FAIL; -+ goto exit; -+ } -+ if (rtw_hal_runtime_trx_path_decision(padapter) == _FAIL) { -+ ret8 = _FAIL; -+ goto exit; -+ } -+ if (rtw_rfctl_init(padapter) == _FAIL) { -+ ret8 = _FAIL; -+ goto exit; -+ } -+ } -+ -+ if (rtw_init_mlme_priv(padapter) == _FAIL) { -+ ret8 = _FAIL; -+ goto exit; -+ } -+ -+#if (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211) -+ rtw_init_roch_info(padapter); -+#endif -+ -+#ifdef CONFIG_P2P -+ rtw_init_wifidirect_timers(padapter); -+ init_wifidirect_info(padapter, P2P_ROLE_DISABLE); -+ reset_global_wifidirect_info(padapter); -+#ifdef CONFIG_WFD -+ if (rtw_init_wifi_display_info(padapter) == _FAIL) -+ RTW_ERR("Can't init init_wifi_display_info\n"); -+#endif -+#endif /* CONFIG_P2P */ -+ -+ if (init_mlme_ext_priv(padapter) == _FAIL) { -+ ret8 = _FAIL; -+ goto exit; -+ } -+ -+#ifdef CONFIG_TDLS -+ if (rtw_init_tdls_info(padapter) == _FAIL) { -+ RTW_INFO("Can't rtw_init_tdls_info\n"); -+ ret8 = _FAIL; -+ goto exit; -+ } -+#endif /* CONFIG_TDLS */ -+ -+#ifdef CONFIG_RTW_MESH -+ rtw_mesh_cfg_init(padapter); -+#endif -+ -+ if (_rtw_init_xmit_priv(&padapter->xmitpriv, padapter) == _FAIL) { -+ RTW_INFO("Can't _rtw_init_xmit_priv\n"); -+ ret8 = _FAIL; -+ goto exit; -+ } -+ -+ if (_rtw_init_recv_priv(&padapter->recvpriv, padapter) == _FAIL) { -+ RTW_INFO("Can't _rtw_init_recv_priv\n"); -+ ret8 = _FAIL; -+ goto exit; -+ } -+ /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ _rtw_spinlock_init(&padapter->security_key_mutex); -+ -+ /* We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). */ -+ /* _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); */ -+ -+ if (_rtw_init_sta_priv(&padapter->stapriv) == _FAIL) { -+ RTW_INFO("Can't _rtw_init_sta_priv\n"); -+ ret8 = _FAIL; -+ goto exit; -+ } -+ -+ padapter->setband = WIFI_FREQUENCY_BAND_AUTO; -+ padapter->fix_rate = 0xFF; -+ padapter->power_offset = 0; -+ padapter->rsvd_page_offset = 0; -+ padapter->rsvd_page_num = 0; -+ -+ padapter->data_fb = 0; -+ padapter->fix_rx_ampdu_accept = RX_AMPDU_ACCEPT_INVALID; -+ padapter->fix_rx_ampdu_size = RX_AMPDU_SIZE_INVALID; -+#ifdef DBG_RX_COUNTER_DUMP -+ padapter->dump_rx_cnt_mode = 0; -+ padapter->drv_rx_cnt_ok = 0; -+ padapter->drv_rx_cnt_crcerror = 0; -+ padapter->drv_rx_cnt_drop = 0; -+#endif -+ rtw_init_bcmc_stainfo(padapter); -+ -+ rtw_init_pwrctrl_priv(padapter); -+ -+ /* _rtw_memset((u8 *)&padapter->qospriv, 0, sizeof (struct qos_priv)); */ /* move to mlme_priv */ -+ -+#ifdef CONFIG_MP_INCLUDED -+ if (init_mp_priv(padapter) == _FAIL) -+ RTW_INFO("%s: initialize MP private data Fail!\n", __func__); -+#endif -+ -+ rtw_hal_dm_init(padapter); -+ -+ if (is_primary_adapter(padapter)) -+ rtw_rfctl_chplan_init(padapter); -+ -+#ifdef CONFIG_RTW_SW_LED -+ rtw_hal_sw_led_init(padapter); -+#endif -+#ifdef DBG_CONFIG_ERROR_DETECT -+ rtw_hal_sreset_init(padapter); -+#endif -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ padapter->WapiSupport = true; /* set true temp, will revise according to Efuse or Registry value later. */ -+ rtw_wapi_init(padapter); -+#endif -+ -+#ifdef CONFIG_BR_EXT -+ _rtw_spinlock_init(&padapter->br_ext_lock); -+#endif /* CONFIG_BR_EXT */ -+ -+#ifdef CONFIG_BEAMFORMING -+#ifdef RTW_BEAMFORMING_VERSION_2 -+ rtw_bf_init(padapter); -+#endif /* RTW_BEAMFORMING_VERSION_2 */ -+#endif /* CONFIG_BEAMFORMING */ -+ -+#ifdef CONFIG_RTW_REPEATER_SON -+ init_rtw_rson_data(adapter_to_dvobj(padapter)); -+#endif -+ -+#ifdef CONFIG_RTW_80211K -+ rtw_init_rm(padapter); -+#endif -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ memset(pwdev_priv->pno_mac_addr, 0xFF, ETH_ALEN); -+#endif -+ -+exit: -+ -+ -+ -+ return ret8; -+ -+} -+ -+#ifdef CONFIG_WOWLAN -+void rtw_cancel_dynamic_chk_timer(_adapter *padapter) -+{ -+ _cancel_timer_ex(&adapter_to_dvobj(padapter)->dynamic_chk_timer); -+} -+#endif -+ -+void rtw_cancel_all_timer(_adapter *padapter) -+{ -+ -+ _cancel_timer_ex(&padapter->mlmepriv.assoc_timer); -+ -+ _cancel_timer_ex(&padapter->mlmepriv.scan_to_timer); -+ -+#ifdef CONFIG_DFS_MASTER -+ _cancel_timer_ex(&adapter_to_rfctl(padapter)->radar_detect_timer); -+#endif -+ -+ _cancel_timer_ex(&adapter_to_dvobj(padapter)->dynamic_chk_timer); -+ _cancel_timer_ex(&adapter_to_dvobj(padapter)->periodic_tsf_update_end_timer); -+#ifdef CONFIG_RTW_SW_LED -+ /* cancel sw led timer */ -+ rtw_hal_sw_led_deinit(padapter); -+#endif -+ _cancel_timer_ex(&(adapter_to_pwrctl(padapter)->pwr_state_check_timer)); -+ -+#ifdef CONFIG_TX_AMSDU -+ _cancel_timer_ex(&padapter->xmitpriv.amsdu_bk_timer); -+ _cancel_timer_ex(&padapter->xmitpriv.amsdu_be_timer); -+ _cancel_timer_ex(&padapter->xmitpriv.amsdu_vo_timer); -+ _cancel_timer_ex(&padapter->xmitpriv.amsdu_vi_timer); -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ _cancel_timer_ex(&padapter->rochinfo.remain_on_ch_timer); -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+#ifdef CONFIG_SET_SCAN_DENY_TIMER -+ _cancel_timer_ex(&padapter->mlmepriv.set_scan_deny_timer); -+ rtw_clear_scan_deny(padapter); -+#endif -+ -+#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS -+ _cancel_timer_ex(&padapter->recvpriv.signal_stat_timer); -+#endif -+ -+#ifdef CONFIG_LPS_RPWM_TIMER -+ _cancel_timer_ex(&(adapter_to_pwrctl(padapter)->pwr_rpwm_timer)); -+#endif /* CONFIG_LPS_RPWM_TIMER */ -+ -+#ifdef CONFIG_RTW_TOKEN_BASED_XMIT -+ _cancel_timer_ex(&padapter->mlmeextpriv.tbtx_xmit_timer); -+ _cancel_timer_ex(&padapter->mlmeextpriv.tbtx_token_dispatch_timer); -+#endif -+ -+ /* cancel dm timer */ -+ rtw_hal_dm_deinit(padapter); -+ -+#ifdef CONFIG_PLATFORM_FS_MX61 -+ msleep(50); -+#endif -+} -+ -+u8 rtw_free_drv_sw(_adapter *padapter) -+{ -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ rtw_wapi_free(padapter); -+#endif -+ -+ /* we can call rtw_p2p_enable here, but: */ -+ /* 1. rtw_p2p_enable may have IO operation */ -+ /* 2. rtw_p2p_enable is bundled with wext interface */ -+ #ifdef CONFIG_P2P -+ { -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+ #ifdef CONFIG_CONCURRENT_MODE -+ struct roch_info *prochinfo = &padapter->rochinfo; -+ #endif -+ if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) { -+ _cancel_timer_ex(&pwdinfo->find_phase_timer); -+ _cancel_timer_ex(&pwdinfo->restore_p2p_state_timer); -+ _cancel_timer_ex(&pwdinfo->pre_tx_scan_timer); -+ #ifdef CONFIG_CONCURRENT_MODE -+ _cancel_timer_ex(&prochinfo->ap_roch_ch_switch_timer); -+ #endif /* CONFIG_CONCURRENT_MODE */ -+ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); -+ } -+ } -+ #endif -+ /* add for CONFIG_IEEE80211W, none 11w also can use */ -+ _rtw_spinlock_free(&padapter->security_key_mutex); -+ -+#ifdef CONFIG_BR_EXT -+ _rtw_spinlock_free(&padapter->br_ext_lock); -+#endif /* CONFIG_BR_EXT */ -+ -+ free_mlme_ext_priv(&padapter->mlmeextpriv); -+ -+#ifdef CONFIG_TDLS -+ /* rtw_free_tdls_info(&padapter->tdlsinfo); */ -+#endif /* CONFIG_TDLS */ -+ -+#ifdef CONFIG_RTW_80211K -+ rtw_free_rm_priv(padapter); -+#endif -+ -+ rtw_free_cmd_priv(&padapter->cmdpriv); -+ -+ rtw_free_evt_priv(&padapter->evtpriv); -+ -+ rtw_free_mlme_priv(&padapter->mlmepriv); -+ -+ if (is_primary_adapter(padapter)) -+ rtw_rfctl_deinit(padapter); -+ -+ /* free_io_queue(padapter); */ -+ -+ _rtw_free_xmit_priv(&padapter->xmitpriv); -+ -+ _rtw_free_sta_priv(&padapter->stapriv); /* will free bcmc_stainfo here */ -+ -+ _rtw_free_recv_priv(&padapter->recvpriv); -+ -+ rtw_free_pwrctrl_priv(padapter); -+ -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ if (padapter->cmap_bss_status_evt) { -+ cmap_intfs_mfree(padapter->cmap_bss_status_evt, padapter->cmap_bss_status_evt_len); -+ padapter->cmap_bss_status_evt = NULL; -+ } -+#endif -+ -+ /* rtw_mfree((void *)padapter, sizeof (padapter)); */ -+ -+ rtw_hal_free_data(padapter); -+ -+ return _SUCCESS; -+ -+} -+void rtw_intf_start(_adapter *adapter) -+{ -+ if (adapter->intf_start) -+ adapter->intf_start(adapter); -+ GET_HAL_DATA(adapter)->intf_start = 1; -+} -+void rtw_intf_stop(_adapter *adapter) -+{ -+ if (adapter->intf_stop) -+ adapter->intf_stop(adapter); -+ GET_HAL_DATA(adapter)->intf_start = 0; -+} -+ -+#ifdef CONFIG_CONCURRENT_MODE -+#ifndef CONFIG_NEW_NETDEV_HDL -+int _netdev_vir_if_open(struct net_device *pnetdev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ _adapter *primary_padapter = GET_PRIMARY_ADAPTER(padapter); -+ -+ RTW_INFO(FUNC_NDEV_FMT" , bup=%d\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); -+ -+ if (!primary_padapter) -+ goto _netdev_virtual_iface_open_error; -+ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ if (padapter->bup == _FALSE) { -+ u8 mac[ETH_ALEN]; -+ -+ /* get mac address from primary_padapter */ -+ if (primary_padapter->bup == _FALSE) -+ rtw_macaddr_cfg(adapter_mac_addr(primary_padapter), get_hal_mac_addr(primary_padapter)); -+ -+ _rtw_memcpy(mac, adapter_mac_addr(primary_padapter), ETH_ALEN); -+ -+ /* -+ * If the BIT1 is 0, the address is universally administered. -+ * If it is 1, the address is locally administered -+ */ -+ mac[0] |= BIT(1); -+ -+ _rtw_memcpy(adapter_mac_addr(padapter), mac, ETH_ALEN); -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_mbid_camid_alloc(padapter, adapter_mac_addr(padapter)); -+#endif -+ rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); -+ _rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN); -+ } -+#endif /*CONFIG_PLATFORM_INTEL_BYT*/ -+ -+ if (primary_padapter->bup == _FALSE || !rtw_is_hw_init_completed(primary_padapter)) -+ _netdev_open(primary_padapter->pnetdev); -+ -+ if (padapter->bup == _FALSE && primary_padapter->bup == _TRUE && -+ rtw_is_hw_init_completed(primary_padapter)) { -+#if 0 /*#ifdef CONFIG_MI_WITH_MBSSID_CAM*/ -+ rtw_hal_set_hwreg(padapter, HW_VAR_MAC_ADDR, adapter_mac_addr(padapter)); /* set mac addr to mac register */ -+#endif -+ -+ } -+ -+ if (padapter->bup == _FALSE) { -+ if (rtw_start_drv_threads(padapter) == _FAIL) -+ goto _netdev_virtual_iface_open_error; -+ } -+ -+#ifdef CONFIG_RTW_NAPI -+ if (padapter->napi_state == NAPI_DISABLE) { -+ napi_enable(&padapter->napi); -+ padapter->napi_state = NAPI_ENABLE; -+ } -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_init_wdev_data(padapter); -+#endif -+ -+ padapter->bup = _TRUE; -+ -+ padapter->net_closed = _FALSE; -+ -+ rtw_netif_wake_queue(pnetdev); -+ -+ RTW_INFO(FUNC_NDEV_FMT" (bup=%d) exit\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); -+ -+ return 0; -+ -+_netdev_virtual_iface_open_error: -+ -+ padapter->bup = _FALSE; -+ -+#ifdef CONFIG_RTW_NAPI -+ if(padapter->napi_state == NAPI_ENABLE) { -+ napi_disable(&padapter->napi); -+ padapter->napi_state = NAPI_DISABLE; -+ } -+#endif -+ -+ rtw_netif_carrier_off(pnetdev); -+ rtw_netif_stop_queue(pnetdev); -+ -+ return -1; -+ -+} -+ -+int netdev_vir_if_open(struct net_device *pnetdev) -+{ -+ int ret; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ -+ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); -+ ret = _netdev_vir_if_open(pnetdev); -+ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); -+ -+#ifdef CONFIG_AUTO_AP_MODE -+ /* if(padapter->iface_id == 2) */ -+ /* rtw_start_auto_ap(padapter); */ -+#endif -+ -+ return ret; -+} -+ -+static int netdev_vir_if_close(struct net_device *pnetdev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ RTW_INFO(FUNC_NDEV_FMT" , bup=%d\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); -+ padapter->net_closed = _TRUE; -+ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; -+ -+ if (pnetdev) -+ rtw_netif_stop_queue(pnetdev); -+ -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_role(&padapter->wdinfo, P2P_ROLE_DISABLE)) -+ rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); -+#endif -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_scan_abort(padapter); -+ rtw_cfg80211_wait_scan_req_empty(padapter, 200); -+ adapter_wdev_data(padapter)->bandroid_scan = _FALSE; -+#endif -+ -+ return 0; -+} -+#endif /*#ifndef CONFIG_NEW_NETDEV_HDL*/ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+static const struct net_device_ops rtw_netdev_vir_if_ops = { -+ .ndo_init = rtw_ndev_init, -+ .ndo_uninit = rtw_ndev_uninit, -+ #ifdef CONFIG_NEW_NETDEV_HDL -+ .ndo_open = netdev_open, -+ .ndo_stop = netdev_close, -+ #else -+ .ndo_open = netdev_vir_if_open, -+ .ndo_stop = netdev_vir_if_close, -+ #endif -+ .ndo_start_xmit = rtw_xmit_entry, -+ .ndo_set_mac_address = rtw_net_set_mac_address, -+ .ndo_get_stats = rtw_net_get_stats, -+ .ndo_do_ioctl = rtw_ioctl, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ .ndo_select_queue = rtw_select_queue, -+#endif -+}; -+#endif -+ -+static void rtw_hook_vir_if_ops(struct net_device *ndev) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+ ndev->netdev_ops = &rtw_netdev_vir_if_ops; -+#else -+ ndev->init = rtw_ndev_init; -+ ndev->uninit = rtw_ndev_uninit; -+ #ifdef CONFIG_NEW_NETDEV_HDL -+ ndev->open = netdev_open; -+ ndev->stop = netdev_close; -+ #else -+ ndev->open = netdev_vir_if_open; -+ ndev->stop = netdev_vir_if_close; -+ #endif -+ -+ ndev->set_mac_address = rtw_net_set_mac_address; -+#endif -+} -+_adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, -+ void (*set_intf_ops)(_adapter *primary_padapter, struct _io_ops *pops)) -+{ -+ int res = _FAIL; -+ _adapter *padapter = NULL; -+ struct dvobj_priv *pdvobjpriv; -+ u8 mac[ETH_ALEN]; -+#ifdef CONFIG_MI_UNIQUE_MACADDR_BIT -+ u32 mi_unique_macaddr_bit = 0; -+ u8 i; -+#endif -+ -+ /****** init adapter ******/ -+ padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter)); -+ if (padapter == NULL) -+ goto exit; -+ -+ if (loadparam(padapter) != _SUCCESS) -+ goto free_adapter; -+ -+ _rtw_memcpy(padapter, primary_padapter, sizeof(_adapter)); -+ -+ /* */ -+ padapter->bup = _FALSE; -+ padapter->net_closed = _TRUE; -+ padapter->dir_dev = NULL; -+ padapter->dir_odm = NULL; -+ -+ /*set adapter_type/iface type*/ -+ padapter->isprimary = _FALSE; -+ padapter->adapter_type = VIRTUAL_ADAPTER; -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ padapter->hw_port = HW_PORT0; -+#elif defined(CONFIG_PORT_BASED_TXBCN) -+ padapter->hw_port = adapter_to_dvobj(padapter)->iface_nums; -+#else -+ padapter->hw_port = HW_PORT1; -+#endif -+ -+ -+ /****** hook vir if into dvobj ******/ -+ pdvobjpriv = adapter_to_dvobj(padapter); -+ padapter->iface_id = pdvobjpriv->iface_nums; -+ pdvobjpriv->padapters[pdvobjpriv->iface_nums++] = padapter; -+ -+ padapter->intf_start = primary_padapter->intf_start; -+ padapter->intf_stop = primary_padapter->intf_stop; -+ -+ /* step init_io_priv */ -+ if ((rtw_init_io_priv(padapter, set_intf_ops)) == _FAIL) { -+ goto free_adapter; -+ } -+ -+ /*init drv data*/ -+ if (rtw_init_drv_sw(padapter) != _SUCCESS) -+ goto free_drv_sw; -+ -+ -+ /*get mac address from primary_padapter*/ -+ _rtw_memcpy(mac, adapter_mac_addr(primary_padapter), ETH_ALEN); -+ -+#ifdef CONFIG_MI_UNIQUE_MACADDR_BIT -+ mi_unique_macaddr_bit = BIT(CONFIG_MI_UNIQUE_MACADDR_BIT) >> 24; -+ /* Find out CONFIG_MI_UNIQUE_MACADDR_BIT in which nic specific byte */ -+ for(i=3;i<6;i++) { -+ if((mi_unique_macaddr_bit >> 8) == 0) -+ break; -+ -+ mi_unique_macaddr_bit >>= 8; -+ } -+ -+ if((mac[i] & (u8)mi_unique_macaddr_bit)== 0) { -+ RTW_INFO("%s() "MAC_FMT" : BIT%u is zero\n", __func__, MAC_ARG(mac), CONFIG_MI_UNIQUE_MACADDR_BIT); -+ /* IFACE_ID1/IFACE_ID3 : set locally administered bit */ -+ if(padapter->iface_id & BIT(0)) -+ mac[0] |= BIT(1); -+ /* IFACE_ID2/IFACE_ID3 : set bit(CONFIG_MI_UNIQUE_MACADDR_BIT) */ -+ if(padapter->iface_id >> 1) -+ mac[i] |= (u8)mi_unique_macaddr_bit; -+ } else -+#endif -+ { -+ /* -+ * If the BIT1 is 0, the address is universally administered. -+ * If it is 1, the address is locally administered -+ */ -+ mac[0] |= BIT(1); -+ if (padapter->iface_id > IFACE_ID1) -+ mac[0] ^= ((padapter->iface_id)<<2); -+ } -+ -+ _rtw_memcpy(adapter_mac_addr(padapter), mac, ETH_ALEN); -+ /* update mac-address to mbsid-cam cache*/ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_mbid_camid_alloc(padapter, adapter_mac_addr(padapter)); -+#endif -+ RTW_INFO("%s if%d mac_addr : "MAC_FMT"\n", __func__, padapter->iface_id + 1, MAC_ARG(adapter_mac_addr(padapter))); -+#ifdef CONFIG_P2P -+ rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); -+#endif -+ -+ rtw_led_set_ctl_en_mask_virtual(padapter); -+ rtw_led_set_iface_en(padapter, 1); -+ -+ res = _SUCCESS; -+ -+free_drv_sw: -+ if (res != _SUCCESS && padapter) -+ rtw_free_drv_sw(padapter); -+free_adapter: -+ if (res != _SUCCESS && padapter) { -+ rtw_vmfree((u8 *)padapter, sizeof(*padapter)); -+ padapter = NULL; -+ } -+exit: -+ return padapter; -+} -+ -+void rtw_drv_stop_vir_if(_adapter *padapter) -+{ -+ struct net_device *pnetdev = NULL; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ if (padapter == NULL) -+ return; -+ RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(padapter)); -+ -+ pnetdev = padapter->pnetdev; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) -+ rtw_disassoc_cmd(padapter, 0, RTW_CMDF_DIRECTLY); -+ -+#ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { -+ free_mlme_ap_info(padapter); -+ #ifdef CONFIG_HOSTAPD_MLME -+ hostapd_mode_unload(padapter); -+ #endif -+ } -+#endif -+ -+ if (padapter->bup == _TRUE) { -+ #ifdef CONFIG_XMIT_ACK -+ if (padapter->xmitpriv.ack_tx) -+ rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); -+ #endif -+ -+ rtw_intf_stop(padapter); -+ #ifndef CONFIG_NEW_NETDEV_HDL -+ rtw_stop_drv_threads(padapter); -+ #endif -+ padapter->bup = _FALSE; -+ } -+ #ifdef CONFIG_NEW_NETDEV_HDL -+ rtw_stop_drv_threads(padapter); -+ #endif -+ /* cancel timer after thread stop */ -+ rtw_cancel_all_timer(padapter); -+} -+ -+void rtw_drv_free_vir_if(_adapter *padapter) -+{ -+ if (padapter == NULL) -+ return; -+ -+ RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ rtw_free_drv_sw(padapter); -+ -+ /* TODO: use rtw_os_ndevs_deinit instead at the first stage of driver's dev deinit function */ -+ rtw_os_ndev_free(padapter); -+ -+ rtw_vmfree((u8 *)padapter, sizeof(_adapter)); -+} -+ -+ -+void rtw_drv_stop_vir_ifaces(struct dvobj_priv *dvobj) -+{ -+ int i; -+ -+ for (i = VIF_START_ID; i < dvobj->iface_nums; i++) -+ rtw_drv_stop_vir_if(dvobj->padapters[i]); -+} -+ -+void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj) -+{ -+ int i; -+ -+ for (i = VIF_START_ID; i < dvobj->iface_nums; i++) -+ rtw_drv_free_vir_if(dvobj->padapters[i]); -+} -+ -+ -+#endif /*end of CONFIG_CONCURRENT_MODE*/ -+ -+/* IPv4, IPv6 IP addr notifier */ -+static int rtw_inetaddr_notifier_call(struct notifier_block *nb, -+ unsigned long action, void *data) -+{ -+ struct in_ifaddr *ifa = (struct in_ifaddr *)data; -+ struct net_device *ndev; -+ struct mlme_ext_priv *pmlmeext = NULL; -+ struct mlme_ext_info *pmlmeinfo = NULL; -+ _adapter *adapter = NULL; -+ -+ if (!ifa || !ifa->ifa_dev || !ifa->ifa_dev->dev) -+ return NOTIFY_DONE; -+ -+ ndev = ifa->ifa_dev->dev; -+ -+ if (!is_rtw_ndev(ndev)) -+ return NOTIFY_DONE; -+ -+ adapter = (_adapter *)rtw_netdev_priv(ifa->ifa_dev->dev); -+ -+ if (adapter == NULL) -+ return NOTIFY_DONE; -+ -+ pmlmeext = &adapter->mlmeextpriv; -+ pmlmeinfo = &pmlmeext->mlmext_info; -+ -+ switch (action) { -+ case NETDEV_UP: -+ _rtw_memcpy(pmlmeinfo->ip_addr, &ifa->ifa_address, -+ RTW_IP_ADDR_LEN); -+ RTW_DBG("%s[%s]: up IP: %pI4\n", __func__, -+ ifa->ifa_label, pmlmeinfo->ip_addr); -+ break; -+ case NETDEV_DOWN: -+ _rtw_memset(pmlmeinfo->ip_addr, 0, RTW_IP_ADDR_LEN); -+ RTW_DBG("%s[%s]: down IP: %pI4\n", __func__, -+ ifa->ifa_label, pmlmeinfo->ip_addr); -+ break; -+ default: -+ RTW_DBG("%s: default action\n", __func__); -+ break; -+ } -+ return NOTIFY_DONE; -+} -+ -+#ifdef CONFIG_IPV6 -+static int rtw_inet6addr_notifier_call(struct notifier_block *nb, -+ unsigned long action, void *data) -+{ -+ struct inet6_ifaddr *inet6_ifa = data; -+ struct net_device *ndev; -+ struct pwrctrl_priv *pwrctl = NULL; -+ struct mlme_ext_priv *pmlmeext = NULL; -+ struct mlme_ext_info *pmlmeinfo = NULL; -+ _adapter *adapter = NULL; -+ -+ if (!inet6_ifa || !inet6_ifa->idev || !inet6_ifa->idev->dev) -+ return NOTIFY_DONE; -+ -+ ndev = inet6_ifa->idev->dev; -+ -+ if (!is_rtw_ndev(ndev)) -+ return NOTIFY_DONE; -+ -+ adapter = (_adapter *)rtw_netdev_priv(inet6_ifa->idev->dev); -+ -+ if (adapter == NULL) -+ return NOTIFY_DONE; -+ -+ pmlmeext = &adapter->mlmeextpriv; -+ pmlmeinfo = &pmlmeext->mlmext_info; -+ pwrctl = adapter_to_pwrctl(adapter); -+ -+ pmlmeext = &adapter->mlmeextpriv; -+ pmlmeinfo = &pmlmeext->mlmext_info; -+ -+ switch (action) { -+ case NETDEV_UP: -+#ifdef CONFIG_WOWLAN -+ pwrctl->wowlan_ns_offload_en = _TRUE; -+#endif -+ _rtw_memcpy(pmlmeinfo->ip6_addr, &inet6_ifa->addr, -+ RTW_IPv6_ADDR_LEN); -+ RTW_DBG("%s: up IPv6 addrs: %pI6\n", __func__, -+ pmlmeinfo->ip6_addr); -+ break; -+ case NETDEV_DOWN: -+#ifdef CONFIG_WOWLAN -+ pwrctl->wowlan_ns_offload_en = _FALSE; -+#endif -+ _rtw_memset(pmlmeinfo->ip6_addr, 0, RTW_IPv6_ADDR_LEN); -+ RTW_DBG("%s: down IPv6 addrs: %pI6\n", __func__, -+ pmlmeinfo->ip6_addr); -+ break; -+ default: -+ RTW_DBG("%s: default action\n", __func__); -+ break; -+ } -+ return NOTIFY_DONE; -+} -+#endif -+ -+static struct notifier_block rtw_inetaddr_notifier = { -+ .notifier_call = rtw_inetaddr_notifier_call -+}; -+ -+#ifdef CONFIG_IPV6 -+static struct notifier_block rtw_inet6addr_notifier = { -+ .notifier_call = rtw_inet6addr_notifier_call -+}; -+#endif -+ -+void rtw_inetaddr_notifier_register(void) -+{ -+ RTW_INFO("%s\n", __func__); -+ register_inetaddr_notifier(&rtw_inetaddr_notifier); -+#ifdef CONFIG_IPV6 -+ register_inet6addr_notifier(&rtw_inet6addr_notifier); -+#endif -+} -+ -+void rtw_inetaddr_notifier_unregister(void) -+{ -+ RTW_INFO("%s\n", __func__); -+ unregister_inetaddr_notifier(&rtw_inetaddr_notifier); -+#ifdef CONFIG_IPV6 -+ unregister_inet6addr_notifier(&rtw_inet6addr_notifier); -+#endif -+} -+ -+int rtw_os_ndevs_register(struct dvobj_priv *dvobj) -+{ -+ int i, status = _SUCCESS; -+ struct registry_priv *regsty = dvobj_to_regsty(dvobj); -+ _adapter *adapter; -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+ if (rtw_cfg80211_dev_res_register(dvobj) != _SUCCESS) { -+ rtw_warn_on(1); -+ return _FAIL; -+ } -+#endif -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ -+ if (i >= CONFIG_IFACE_NUMBER) { -+ RTW_ERR("%s %d >= CONFIG_IFACE_NUMBER(%d)\n", __func__, i, CONFIG_IFACE_NUMBER); -+ rtw_warn_on(1); -+ continue; -+ } -+ -+ adapter = dvobj->padapters[i]; -+ if (adapter) { -+ char *name; -+ -+ #ifdef CONFIG_RTW_DYNAMIC_NDEV -+ if (!is_primary_adapter(adapter)) -+ continue; -+ #endif -+ -+ if (adapter->iface_id == IFACE_ID0) -+ name = regsty->ifname; -+ else if (adapter->iface_id == IFACE_ID1) -+ name = regsty->if2name; -+ else -+ name = "wlan%d"; -+ -+ status = rtw_os_ndev_register(adapter, name); -+ -+ if (status != _SUCCESS) { -+ rtw_warn_on(1); -+ break; -+ } -+ } -+ } -+ -+ if (status != _SUCCESS) { -+ for (; i >= 0; i--) { -+ adapter = dvobj->padapters[i]; -+ if (adapter) -+ rtw_os_ndev_unregister(adapter); -+ } -+ } -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+ if (status != _SUCCESS) -+ rtw_cfg80211_dev_res_unregister(dvobj); -+#endif -+ return status; -+} -+ -+void rtw_os_ndevs_unregister(struct dvobj_priv *dvobj) -+{ -+ int i; -+ _adapter *adapter = NULL; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ adapter = dvobj->padapters[i]; -+ -+ if (adapter == NULL) -+ continue; -+ -+ rtw_os_ndev_unregister(adapter); -+ } -+ -+#if defined(CONFIG_IOCTL_CFG80211) -+ rtw_cfg80211_dev_res_unregister(dvobj); -+#endif -+} -+ -+/** -+ * rtw_os_ndevs_init - Allocate and register OS layer net devices and relating structures for @dvobj -+ * @dvobj: the dvobj on which this function applies -+ * -+ * Returns: -+ * _SUCCESS or _FAIL -+ */ -+int rtw_os_ndevs_init(struct dvobj_priv *dvobj) -+{ -+ int ret = _FAIL; -+ -+ if (rtw_os_ndevs_alloc(dvobj) != _SUCCESS) -+ goto exit; -+ -+ if (rtw_os_ndevs_register(dvobj) != _SUCCESS) -+ goto os_ndevs_free; -+ -+ ret = _SUCCESS; -+ -+os_ndevs_free: -+ if (ret != _SUCCESS) -+ rtw_os_ndevs_free(dvobj); -+exit: -+ return ret; -+} -+ -+/** -+ * rtw_os_ndevs_deinit - Unregister and free OS layer net devices and relating structures for @dvobj -+ * @dvobj: the dvobj on which this function applies -+ */ -+void rtw_os_ndevs_deinit(struct dvobj_priv *dvobj) -+{ -+ rtw_os_ndevs_unregister(dvobj); -+ rtw_os_ndevs_free(dvobj); -+} -+ -+#ifdef CONFIG_BR_EXT -+void netdev_br_init(struct net_device *netdev) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); -+ -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) -+ rcu_read_lock(); -+#endif -+ -+ /* if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) */ -+ { -+ /* struct net_bridge *br = netdev->br_port->br; */ /* ->dev->dev_addr; */ -+ #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) -+ if (netdev->br_port) -+ #else -+ if (rcu_dereference(adapter->pnetdev->rx_handler_data)) -+ #endif -+ { -+ struct net_device *br_netdev; -+ -+ br_netdev = rtw_get_bridge_ndev_by_name(CONFIG_BR_EXT_BRNAME); -+ if (br_netdev) { -+ memcpy(adapter->br_mac, br_netdev->dev_addr, ETH_ALEN); -+ dev_put(br_netdev); -+ RTW_INFO(FUNC_NDEV_FMT" bind bridge dev "NDEV_FMT"("MAC_FMT")\n" -+ , FUNC_NDEV_ARG(netdev), NDEV_ARG(br_netdev), MAC_ARG(br_netdev->dev_addr)); -+ } else { -+ RTW_INFO(FUNC_NDEV_FMT" can't get bridge dev by name \"%s\"\n" -+ , FUNC_NDEV_ARG(netdev), CONFIG_BR_EXT_BRNAME); -+ } -+ } -+ -+ adapter->ethBrExtInfo.addPPPoETag = 1; -+ } -+ -+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) -+ rcu_read_unlock(); -+#endif -+} -+#endif /* CONFIG_BR_EXT */ -+ -+#ifdef CONFIG_NEW_NETDEV_HDL -+int _netdev_open(struct net_device *pnetdev) -+{ -+ uint status; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ RTW_INFO(FUNC_NDEV_FMT" start\n", FUNC_NDEV_ARG(pnetdev)); -+ -+ if (!rtw_is_hw_init_completed(padapter)) { // ips -+ rtw_clr_surprise_removed(padapter); -+ rtw_clr_drv_stopped(padapter); -+ RTW_ENABLE_FUNC(padapter, DF_RX_BIT); -+ RTW_ENABLE_FUNC(padapter, DF_TX_BIT); -+ status = rtw_hal_init(padapter); -+ if (status == _FAIL) -+ goto netdev_open_error; -+ rtw_led_control(padapter, LED_CTL_NO_LINK); -+ #ifndef RTW_HALMAC -+ status = rtw_mi_start_drv_threads(padapter); -+ if (status == _FAIL) { -+ RTW_ERR(FUNC_NDEV_FMT "Initialize driver thread failed!\n", FUNC_NDEV_ARG(pnetdev)); -+ goto netdev_open_error; -+ } -+ -+ rtw_intf_start(GET_PRIMARY_ADAPTER(padapter)); -+ #endif /* !RTW_HALMAC */ -+ -+ { -+ #ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ _adapter *prim_adpt = GET_PRIMARY_ADAPTER(padapter); -+ -+ if (prim_adpt && (_TRUE == prim_adpt->EEPROMBluetoothCoexist)) { -+ rtw_btcoex_init_socket(prim_adpt); -+ prim_adpt->coex_info.BtMgnt.ExtConfig.HCIExtensionVer = 0x04; -+ rtw_btcoex_SetHciVersion(prim_adpt, 0x04); -+ } -+ #endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ -+ _set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000); -+ -+ #ifndef CONFIG_IPS_CHECK_IN_WD -+ rtw_set_pwr_state_check_timer(pwrctrlpriv); -+ #endif /*CONFIG_IPS_CHECK_IN_WD*/ -+ } -+ -+ } -+ -+ /*if (padapter->bup == _FALSE) */ -+ { -+ rtw_hal_iface_init(padapter); -+ -+ #ifdef CONFIG_RTW_NAPI -+ if(padapter->napi_state == NAPI_DISABLE) { -+ napi_enable(&padapter->napi); -+ padapter->napi_state = NAPI_ENABLE; -+ } -+ #endif -+ -+ #ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_init_wdev_data(padapter); -+ #endif -+ /* rtw_netif_carrier_on(pnetdev); */ /* call this func when rtw_joinbss_event_callback return success */ -+ rtw_netif_wake_queue(pnetdev); -+ -+ #ifdef CONFIG_BR_EXT -+ if (is_primary_adapter(padapter)) -+ netdev_br_init(pnetdev); -+ #endif /* CONFIG_BR_EXT */ -+ -+ -+ padapter->bup = _TRUE; -+ padapter->net_closed = _FALSE; -+ padapter->netif_up = _TRUE; -+ pwrctrlpriv->bips_processing = _FALSE; -+ } -+ -+ RTW_INFO(FUNC_NDEV_FMT" Success (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); -+ return 0; -+ -+netdev_open_error: -+ padapter->bup = _FALSE; -+ -+ #ifdef CONFIG_RTW_NAPI -+ if(padapter->napi_state == NAPI_ENABLE) { -+ napi_disable(&padapter->napi); -+ padapter->napi_state = NAPI_DISABLE; -+ } -+ #endif -+ -+ rtw_netif_carrier_off(pnetdev); -+ rtw_netif_stop_queue(pnetdev); -+ -+ RTW_ERR(FUNC_NDEV_FMT" Failed!! (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); -+ -+ return -1; -+ -+} -+ -+#else -+int _netdev_open(struct net_device *pnetdev) -+{ -+ uint status; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ -+ -+ RTW_INFO(FUNC_NDEV_FMT" , bup=%d\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); -+ -+ padapter->netif_up = _TRUE; -+ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ rtw_sdio_set_power(1); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ -+ if (padapter->bup == _FALSE) { -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ rtw_macaddr_cfg(adapter_mac_addr(padapter), get_hal_mac_addr(padapter)); -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_mbid_camid_alloc(padapter, adapter_mac_addr(padapter)); -+#endif -+ rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); -+ _rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ -+ rtw_clr_surprise_removed(padapter); -+ rtw_clr_drv_stopped(padapter); -+ -+ status = rtw_hal_init(padapter); -+ if (status == _FAIL) { -+ goto netdev_open_error; -+ } -+#if 0/*#ifdef CONFIG_MI_WITH_MBSSID_CAM*/ -+ rtw_hal_set_hwreg(padapter, HW_VAR_MAC_ADDR, adapter_mac_addr(padapter)); /* set mac addr to mac register */ -+#endif -+ -+ RTW_INFO("MAC Address = "MAC_FMT"\n", MAC_ARG(pnetdev->dev_addr)); -+ -+#ifndef RTW_HALMAC -+ status = rtw_start_drv_threads(padapter); -+ if (status == _FAIL) { -+ RTW_INFO("Initialize driver software resource Failed!\n"); -+ goto netdev_open_error; -+ } -+#endif /* !RTW_HALMAC */ -+ -+#ifdef CONFIG_RTW_NAPI -+ if(padapter->napi_state == NAPI_DISABLE) { -+ napi_enable(&padapter->napi); -+ padapter->napi_state = NAPI_ENABLE; -+ } -+#endif -+ -+#ifndef RTW_HALMAC -+ rtw_intf_start(padapter); -+#endif /* !RTW_HALMAC */ -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_init_wdev_data(padapter); -+#endif -+ -+ rtw_led_control(padapter, LED_CTL_NO_LINK); -+ -+ padapter->bup = _TRUE; -+ pwrctrlpriv->bips_processing = _FALSE; -+ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_IpsNotify(padapter, IPS_NONE); -+#endif /* CONFIG_BT_COEXIST */ -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ } -+ padapter->net_closed = _FALSE; -+ -+ _set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000); -+ -+#ifndef CONFIG_IPS_CHECK_IN_WD -+ rtw_set_pwr_state_check_timer(pwrctrlpriv); -+#endif -+ -+ /* rtw_netif_carrier_on(pnetdev); */ /* call this func when rtw_joinbss_event_callback return success */ -+ rtw_netif_wake_queue(pnetdev); -+ -+#ifdef CONFIG_BR_EXT -+ netdev_br_init(pnetdev); -+#endif /* CONFIG_BR_EXT */ -+ -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ if (is_primary_adapter(padapter) && (_TRUE == pHalData->EEPROMBluetoothCoexist)) { -+ rtw_btcoex_init_socket(padapter); -+ padapter->coex_info.BtMgnt.ExtConfig.HCIExtensionVer = 0x04; -+ rtw_btcoex_SetHciVersion(padapter, 0x04); -+ } else -+ RTW_INFO("CONFIG_BT_COEXIST: VIRTUAL_ADAPTER\n"); -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ { -+ _adapter *sec_adapter = adapter_to_dvobj(padapter)->padapters[IFACE_ID1]; -+ -+ #ifndef CONFIG_RTW_DYNAMIC_NDEV -+ if (sec_adapter && (sec_adapter->bup == _FALSE)) -+ _netdev_vir_if_open(sec_adapter->pnetdev); -+ #endif -+ } -+#endif -+ -+#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS -+ pwrctrlpriv->radio_on_start_time = rtw_get_current_time(); -+ pwrctrlpriv->pwr_saving_start_time = rtw_get_current_time(); -+ pwrctrlpriv->pwr_saving_time = 0; -+ pwrctrlpriv->on_time = 0; -+ pwrctrlpriv->tx_time = 0; -+ pwrctrlpriv->rx_time = 0; -+#endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ -+ -+ RTW_INFO("-871x_drv - drv_open, bup=%d\n", padapter->bup); -+ -+ return 0; -+ -+netdev_open_error: -+ -+ padapter->bup = _FALSE; -+ -+#ifdef CONFIG_RTW_NAPI -+ if(padapter->napi_state == NAPI_ENABLE) { -+ napi_disable(&padapter->napi); -+ padapter->napi_state = NAPI_DISABLE; -+ } -+#endif -+ -+ rtw_netif_carrier_off(pnetdev); -+ rtw_netif_stop_queue(pnetdev); -+ -+ RTW_INFO("-871x_drv - drv_open fail, bup=%d\n", padapter->bup); -+ -+ return -1; -+ -+} -+#endif -+int netdev_open(struct net_device *pnetdev) -+{ -+ int ret = _FALSE; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ -+ if (pwrctrlpriv->bInSuspend == _TRUE) { -+ RTW_INFO(" [WARN] "ADPT_FMT" %s failed, bInSuspend=%d\n", ADPT_ARG(padapter), __func__, pwrctrlpriv->bInSuspend); -+ return 0; -+ } -+ -+ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); -+#ifdef CONFIG_NEW_NETDEV_HDL -+ ret = _netdev_open(pnetdev); -+#else -+ if (is_primary_adapter(padapter)) -+ ret = _netdev_open(pnetdev); -+#ifdef CONFIG_CONCURRENT_MODE -+ else -+ ret = _netdev_vir_if_open(pnetdev); -+#endif -+#endif -+ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); -+ -+ -+#ifdef CONFIG_AUTO_AP_MODE -+ if (padapter->iface_id == IFACE_ID2) -+ rtw_start_auto_ap(padapter); -+#endif -+ -+ return ret; -+} -+ -+#ifdef CONFIG_IPS -+int ips_netdrv_open(_adapter *padapter) -+{ -+ int status = _SUCCESS; -+ /* struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); */ -+ -+ padapter->net_closed = _FALSE; -+ -+ RTW_INFO("===> %s.........\n", __FUNCTION__); -+ -+ -+ rtw_clr_drv_stopped(padapter); -+ /* padapter->bup = _TRUE; */ -+#ifdef CONFIG_NEW_NETDEV_HDL -+ if (!rtw_is_hw_init_completed(padapter)) { -+ status = rtw_hal_init(padapter); -+ if (status == _FAIL) { -+ goto netdev_open_error; -+ } -+ rtw_mi_hal_iface_init(padapter); -+ } -+#else -+ status = rtw_hal_init(padapter); -+ if (status == _FAIL) { -+ goto netdev_open_error; -+ } -+#endif -+#if 0 -+ rtw_mi_set_mac_addr(padapter); -+#endif -+#ifndef RTW_HALMAC -+ rtw_intf_start(padapter); -+#endif /* !RTW_HALMAC */ -+ -+#ifndef CONFIG_IPS_CHECK_IN_WD -+ rtw_set_pwr_state_check_timer(adapter_to_pwrctl(padapter)); -+#endif -+ _set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000); -+ -+ return _SUCCESS; -+ -+netdev_open_error: -+ /* padapter->bup = _FALSE; */ -+ RTW_INFO("-ips_netdrv_open - drv_open failure, bup=%d\n", padapter->bup); -+ -+ return _FAIL; -+} -+ -+int rtw_ips_pwr_up(_adapter *padapter) -+{ -+ int result; -+#if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) -+#ifdef DBG_CONFIG_ERROR_DETECT -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+#endif/* #ifdef DBG_CONFIG_ERROR_DETECT */ -+#endif /* defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) */ -+ systime start_time = rtw_get_current_time(); -+ RTW_INFO("===> rtw_ips_pwr_up..............\n"); -+ -+#if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) -+#ifdef DBG_CONFIG_ERROR_DETECT -+ if (psrtpriv->silent_reset_inprogress == _TRUE) -+#endif/* #ifdef DBG_CONFIG_ERROR_DETECT */ -+#endif /* defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) */ -+ rtw_reset_drv_sw(padapter); -+ -+ result = ips_netdrv_open(padapter); -+ -+ rtw_led_control(padapter, LED_CTL_NO_LINK); -+ -+ RTW_INFO("<=== rtw_ips_pwr_up.............. in %dms\n", rtw_get_passing_time_ms(start_time)); -+ return result; -+ -+} -+ -+void rtw_ips_pwr_down(_adapter *padapter) -+{ -+ systime start_time = rtw_get_current_time(); -+ RTW_INFO("===> rtw_ips_pwr_down...................\n"); -+ -+ padapter->net_closed = _TRUE; -+ -+ rtw_ips_dev_unload(padapter); -+ RTW_INFO("<=== rtw_ips_pwr_down..................... in %dms\n", rtw_get_passing_time_ms(start_time)); -+} -+#endif -+void rtw_ips_dev_unload(_adapter *padapter) -+{ -+#if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) -+#ifdef DBG_CONFIG_ERROR_DETECT -+ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); -+ struct sreset_priv *psrtpriv = &pHalData->srestpriv; -+#endif/* #ifdef DBG_CONFIG_ERROR_DETECT */ -+#endif /* defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) */ -+ RTW_INFO("====> %s...\n", __FUNCTION__); -+ -+ -+#if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) -+#ifdef DBG_CONFIG_ERROR_DETECT -+ if (psrtpriv->silent_reset_inprogress == _TRUE) -+#endif /* #ifdef DBG_CONFIG_ERROR_DETECT */ -+#endif /* defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) */ -+ { -+ rtw_hal_set_hwreg(padapter, HW_VAR_FIFO_CLEARN_UP, 0); -+ rtw_intf_stop(padapter); -+ } -+ -+ if (!rtw_is_surprise_removed(padapter)) -+ rtw_hal_deinit(padapter); -+ -+} -+#ifdef CONFIG_NEW_NETDEV_HDL -+int _pm_netdev_open(_adapter *padapter) -+{ -+ uint status; -+ struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); -+ struct net_device *pnetdev = padapter->pnetdev; -+ -+ RTW_INFO(FUNC_NDEV_FMT" start\n", FUNC_NDEV_ARG(pnetdev)); -+ -+ if (!rtw_is_hw_init_completed(padapter)) { // ips -+ rtw_clr_surprise_removed(padapter); -+ rtw_clr_drv_stopped(padapter); -+ status = rtw_hal_init(padapter); -+ if (status == _FAIL) -+ goto netdev_open_error; -+ rtw_led_control(padapter, LED_CTL_NO_LINK); -+ #ifndef RTW_HALMAC -+ status = rtw_mi_start_drv_threads(padapter); -+ if (status == _FAIL) { -+ RTW_ERR(FUNC_NDEV_FMT "Initialize driver thread failed!\n", FUNC_NDEV_ARG(pnetdev)); -+ goto netdev_open_error; -+ } -+ -+ rtw_intf_start(GET_PRIMARY_ADAPTER(padapter)); -+ #endif /* !RTW_HALMAC */ -+ -+ { -+ _set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000); -+ -+ #ifndef CONFIG_IPS_CHECK_IN_WD -+ rtw_set_pwr_state_check_timer(pwrctrlpriv); -+ #endif /*CONFIG_IPS_CHECK_IN_WD*/ -+ } -+ -+ } -+ -+ /*if (padapter->bup == _FALSE) */ -+ { -+ rtw_hal_iface_init(padapter); -+ -+ padapter->bup = _TRUE; -+ padapter->net_closed = _FALSE; -+ padapter->netif_up = _TRUE; -+ pwrctrlpriv->bips_processing = _FALSE; -+ } -+ -+ RTW_INFO(FUNC_NDEV_FMT" Success (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); -+ return 0; -+ -+netdev_open_error: -+ padapter->bup = _FALSE; -+ -+ rtw_netif_carrier_off(pnetdev); -+ rtw_netif_stop_queue(pnetdev); -+ -+ RTW_ERR(FUNC_NDEV_FMT" Failed!! (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); -+ -+ return -1; -+ -+} -+int _mi_pm_netdev_open(struct net_device *pnetdev) -+{ -+ int i; -+ int status = 0; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface->netif_up) { -+ status = _pm_netdev_open(iface); -+ if (status == -1) { -+ RTW_ERR("%s failled\n", __func__); -+ break; -+ } -+ } -+ } -+ -+ return status; -+} -+#endif /*CONFIG_NEW_NETDEV_HDL*/ -+int pm_netdev_open(struct net_device *pnetdev, u8 bnormal) -+{ -+ int status = 0; -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ -+ if (_TRUE == bnormal) { -+ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); -+ #ifdef CONFIG_NEW_NETDEV_HDL -+ status = _mi_pm_netdev_open(pnetdev); -+ #else -+ status = _netdev_open(pnetdev); -+ #endif -+ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); -+ } -+#ifdef CONFIG_IPS -+ else -+ status = (_SUCCESS == ips_netdrv_open(padapter)) ? (0) : (-1); -+#endif -+ -+ return status; -+} -+#ifdef CONFIG_CLIENT_PORT_CFG -+extern void rtw_hw_client_port_release(_adapter *adapter); -+#endif -+static int netdev_close(struct net_device *pnetdev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+ -+ RTW_INFO(FUNC_NDEV_FMT" , bup=%d\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); -+#ifndef CONFIG_PLATFORM_INTEL_BYT -+ padapter->net_closed = _TRUE; -+ padapter->netif_up = _FALSE; -+ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; -+ -+#ifdef CONFIG_CLIENT_PORT_CFG -+ if (MLME_IS_STA(padapter)) -+ rtw_hw_client_port_release(padapter); -+#endif -+ /* if (!rtw_is_hw_init_completed(padapter)) { -+ RTW_INFO("(1)871x_drv - drv_close, bup=%d, hw_init_completed=%s\n", padapter->bup, rtw_is_hw_init_completed(padapter)?"_TRUE":"_FALSE"); -+ -+ rtw_set_drv_stopped(padapter); -+ -+ rtw_dev_unload(padapter); -+ } -+ else*/ -+ if (pwrctl->rf_pwrstate == rf_on) { -+ RTW_INFO("(2)871x_drv - drv_close, bup=%d, hw_init_completed=%s\n", padapter->bup, rtw_is_hw_init_completed(padapter) ? "_TRUE" : "_FALSE"); -+ -+ /* s1. */ -+ if (pnetdev) -+ rtw_netif_stop_queue(pnetdev); -+ -+#ifndef CONFIG_RTW_ANDROID -+ /* s2. */ -+ LeaveAllPowerSaveMode(padapter); -+ rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK); -+ /* s2-2. indicate disconnect to os */ -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ /* s2-3. */ -+ rtw_free_assoc_resources_cmd(padapter, _TRUE, RTW_CMDF_WAIT_ACK); -+ /* s2-4. */ -+ rtw_free_network_queue(padapter, _TRUE); -+#endif -+ } -+ -+#ifdef CONFIG_BR_EXT -+ /* if (OPMODE & (WIFI_STATION_STATE | WIFI_ADHOC_STATE)) */ -+ { -+ /* void nat25_db_cleanup(_adapter *priv); */ -+ nat25_db_cleanup(padapter); -+ } -+#endif /* CONFIG_BR_EXT */ -+ -+#ifdef CONFIG_P2P -+ if (!rtw_p2p_chk_role(&padapter->wdinfo, P2P_ROLE_DISABLE)) -+ rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); -+#endif /* CONFIG_P2P */ -+ -+ rtw_scan_abort(padapter); /* stop scanning process before wifi is going to down */ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_wait_scan_req_empty(padapter, 200); -+ adapter_wdev_data(padapter)->bandroid_scan = _FALSE; -+ /* padapter->rtw_wdev->iftype = NL80211_IFTYPE_MONITOR; */ /* set this at the end */ -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+#ifdef CONFIG_WAPI_SUPPORT -+ rtw_wapi_disable_tx(padapter); -+#endif -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ if (is_primary_adapter(padapter) && (_TRUE == pHalData->EEPROMBluetoothCoexist)) -+ rtw_btcoex_close_socket(padapter); -+ else -+ RTW_INFO("CONFIG_BT_COEXIST: VIRTUAL_ADAPTER\n"); -+#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ -+#else /* !CONFIG_PLATFORM_INTEL_BYT */ -+ -+ if (pwrctl->bInSuspend == _TRUE) { -+ RTW_INFO("+871x_drv - drv_close, bInSuspend=%d\n", pwrctl->bInSuspend); -+ return 0; -+ } -+ -+ rtw_scan_abort(padapter); /* stop scanning process before wifi is going to down */ -+#ifdef CONFIG_IOCTL_CFG80211 -+ rtw_cfg80211_wait_scan_req_empty(padapter, 200); -+#endif -+ -+ RTW_INFO("netdev_close, bips_processing=%d\n", pwrctl->bips_processing); -+ while (pwrctl->bips_processing == _TRUE) /* waiting for ips_processing done before call rtw_dev_unload() */ -+ rtw_msleep_os(1); -+ -+ rtw_dev_unload(padapter); -+ rtw_sdio_set_power(0); -+ -+#endif /* !CONFIG_PLATFORM_INTEL_BYT */ -+ -+ RTW_INFO("-871x_drv - drv_close, bup=%d\n", padapter->bup); -+ -+ return 0; -+ -+} -+ -+int pm_netdev_close(struct net_device *pnetdev, u8 bnormal) -+{ -+ int status = 0; -+ -+ status = netdev_close(pnetdev); -+ -+ return status; -+} -+ -+void rtw_ndev_destructor(struct net_device *ndev) -+{ -+ RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (ndev->ieee80211_ptr) -+ rtw_mfree((u8 *)ndev->ieee80211_ptr, sizeof(struct wireless_dev)); -+#endif -+ free_netdev(ndev); -+} -+ -+#ifdef CONFIG_ARP_KEEP_ALIVE -+struct route_info { -+ struct in_addr dst_addr; -+ struct in_addr src_addr; -+ struct in_addr gateway; -+ unsigned int dev_index; -+}; -+ -+static void parse_routes(struct nlmsghdr *nl_hdr, struct route_info *rt_info) -+{ -+ struct rtmsg *rt_msg; -+ struct rtattr *rt_attr; -+ int rt_len; -+ -+ rt_msg = (struct rtmsg *) NLMSG_DATA(nl_hdr); -+ if ((rt_msg->rtm_family != AF_INET) || (rt_msg->rtm_table != RT_TABLE_MAIN)) -+ return; -+ -+ rt_attr = (struct rtattr *) RTM_RTA(rt_msg); -+ rt_len = RTM_PAYLOAD(nl_hdr); -+ -+ for (; RTA_OK(rt_attr, rt_len); rt_attr = RTA_NEXT(rt_attr, rt_len)) { -+ switch (rt_attr->rta_type) { -+ case RTA_OIF: -+ rt_info->dev_index = *(int *) RTA_DATA(rt_attr); -+ break; -+ case RTA_GATEWAY: -+ rt_info->gateway.s_addr = *(u_int *) RTA_DATA(rt_attr); -+ break; -+ case RTA_PREFSRC: -+ rt_info->src_addr.s_addr = *(u_int *) RTA_DATA(rt_attr); -+ break; -+ case RTA_DST: -+ rt_info->dst_addr.s_addr = *(u_int *) RTA_DATA(rt_attr); -+ break; -+ } -+ } -+} -+ -+static int route_dump(u32 *gw_addr , int *gw_index) -+{ -+ int err = 0; -+ struct socket *sock; -+ struct { -+ struct nlmsghdr nlh; -+ struct rtgenmsg g; -+ } req; -+ struct msghdr msg; -+ struct iovec iov; -+ struct sockaddr_nl nladdr; -+ mm_segment_t oldfs; -+ char *pg; -+ int size = 0; -+ -+ err = sock_create(AF_NETLINK, SOCK_DGRAM, NETLINK_ROUTE, &sock); -+ if (err) { -+ printk(": Could not create a datagram socket, error = %d\n", -ENXIO); -+ return err; -+ } -+ -+ memset(&nladdr, 0, sizeof(nladdr)); -+ nladdr.nl_family = AF_NETLINK; -+ -+ req.nlh.nlmsg_len = sizeof(req); -+ req.nlh.nlmsg_type = RTM_GETROUTE; -+ req.nlh.nlmsg_flags = NLM_F_ROOT | NLM_F_MATCH | NLM_F_REQUEST; -+ req.nlh.nlmsg_pid = 0; -+ req.g.rtgen_family = AF_INET; -+ -+ iov.iov_base = &req; -+ iov.iov_len = sizeof(req); -+ -+ msg.msg_name = &nladdr; -+ msg.msg_namelen = sizeof(nladdr); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) -+ /* referece:sock_xmit in kernel code -+ * WRITE for sock_sendmsg, READ for sock_recvmsg -+ * third parameter for msg_iovlen -+ * last parameter for iov_len -+ */ -+ iov_iter_init(&msg.msg_iter, WRITE, &iov, 1, sizeof(req)); -+#else -+ msg.msg_iov = &iov; -+ msg.msg_iovlen = 1; -+#endif -+ msg.msg_control = NULL; -+ msg.msg_controllen = 0; -+ msg.msg_flags = MSG_DONTWAIT; -+ -+ oldfs = get_fs(); -+ set_fs(KERNEL_DS); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ err = sock_sendmsg(sock, &msg); -+#else -+ err = sock_sendmsg(sock, &msg, sizeof(req)); -+#endif -+ set_fs(oldfs); -+ -+ if (err < 0) -+ goto out_sock; -+ -+ pg = (char *) __get_free_page(GFP_KERNEL); -+ if (pg == NULL) { -+ err = -ENOMEM; -+ goto out_sock; -+ } -+ -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+restart: -+#endif -+ -+ for (;;) { -+ struct nlmsghdr *h; -+ -+ iov.iov_base = pg; -+ iov.iov_len = PAGE_SIZE; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) -+ iov_iter_init(&msg.msg_iter, READ, &iov, 1, PAGE_SIZE); -+#endif -+ -+ oldfs = get_fs(); -+ set_fs(KERNEL_DS); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)) -+ err = sock_recvmsg(sock, &msg, MSG_DONTWAIT); -+#else -+ err = sock_recvmsg(sock, &msg, PAGE_SIZE, MSG_DONTWAIT); -+#endif -+ set_fs(oldfs); -+ -+ if (err < 0) -+ goto out_sock_pg; -+ -+ if (msg.msg_flags & MSG_TRUNC) { -+ err = -ENOBUFS; -+ goto out_sock_pg; -+ } -+ -+ h = (struct nlmsghdr *) pg; -+ -+ while (NLMSG_OK(h, err)) { -+ struct route_info rt_info; -+ if (h->nlmsg_type == NLMSG_DONE) { -+ err = 0; -+ goto done; -+ } -+ -+ if (h->nlmsg_type == NLMSG_ERROR) { -+ struct nlmsgerr *errm = (struct nlmsgerr *) NLMSG_DATA(h); -+ err = errm->error; -+ printk("NLMSG error: %d\n", errm->error); -+ goto done; -+ } -+ -+ if (h->nlmsg_type == RTM_GETROUTE) -+ printk("RTM_GETROUTE: NLMSG: %d\n", h->nlmsg_type); -+ if (h->nlmsg_type != RTM_NEWROUTE) { -+ printk("NLMSG: %d\n", h->nlmsg_type); -+ err = -EINVAL; -+ goto done; -+ } -+ -+ memset(&rt_info, 0, sizeof(struct route_info)); -+ parse_routes(h, &rt_info); -+ if (!rt_info.dst_addr.s_addr && rt_info.gateway.s_addr && rt_info.dev_index) { -+ *gw_addr = rt_info.gateway.s_addr; -+ *gw_index = rt_info.dev_index; -+ -+ } -+ h = NLMSG_NEXT(h, err); -+ } -+ -+ if (err) { -+ printk("!!!Remnant of size %d %d %d\n", err, h->nlmsg_len, h->nlmsg_type); -+ err = -EINVAL; -+ break; -+ } -+ } -+ -+done: -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ if (!err && req.g.rtgen_family == AF_INET) { -+ req.g.rtgen_family = AF_INET6; -+ -+ iov.iov_base = &req; -+ iov.iov_len = sizeof(req); -+ -+ msg.msg_name = &nladdr; -+ msg.msg_namelen = sizeof(nladdr); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) -+ iov_iter_init(&msg.msg_iter, WRITE, &iov, 1, sizeof(req)); -+#else -+ msg.msg_iov = &iov; -+ msg.msg_iovlen = 1; -+#endif -+ msg.msg_control = NULL; -+ msg.msg_controllen = 0; -+ msg.msg_flags = MSG_DONTWAIT; -+ -+ oldfs = get_fs(); -+ set_fs(KERNEL_DS); -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ err = sock_sendmsg(sock, &msg); -+#else -+ err = sock_sendmsg(sock, &msg, sizeof(req)); -+#endif -+ set_fs(oldfs); -+ -+ if (err > 0) -+ goto restart; -+ } -+#endif -+ -+out_sock_pg: -+ free_page((unsigned long) pg); -+ -+out_sock: -+ sock_release(sock); -+ return err; -+} -+ -+static int arp_query(unsigned char *haddr, u32 paddr, -+ struct net_device *dev) -+{ -+ struct neighbour *neighbor_entry; -+ int ret = 0; -+ -+ neighbor_entry = neigh_lookup(&arp_tbl, &paddr, dev); -+ -+ if (neighbor_entry != NULL) { -+ neighbor_entry->used = jiffies; -+ if (neighbor_entry->nud_state & NUD_VALID) { -+ _rtw_memcpy(haddr, neighbor_entry->ha, dev->addr_len); -+ ret = 1; -+ } -+ neigh_release(neighbor_entry); -+ } -+ return ret; -+} -+ -+static int get_defaultgw(u32 *ip_addr , char mac[]) -+{ -+ int gw_index = 0; /* oif device index */ -+ struct net_device *gw_dev = NULL; /* oif device */ -+ -+ route_dump(ip_addr, &gw_index); -+ -+ if (!(*ip_addr) || !gw_index) { -+ /* RTW_INFO("No default GW\n"); */ -+ return -1; -+ } -+ -+ gw_dev = dev_get_by_index(&init_net, gw_index); -+ -+ if (gw_dev == NULL) { -+ /* RTW_INFO("get Oif Device Fail\n"); */ -+ return -1; -+ } -+ -+ if (!arp_query(mac, *ip_addr, gw_dev)) { -+ /* RTW_INFO( "arp query failed\n"); */ -+ dev_put(gw_dev); -+ return -1; -+ -+ } -+ dev_put(gw_dev); -+ -+ return 0; -+} -+ -+int rtw_gw_addr_query(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ u32 gw_addr = 0; /* default gw address */ -+ unsigned char gw_mac[32] = {0}; /* default gw mac */ -+ int i; -+ int res; -+ -+ res = get_defaultgw(&gw_addr, gw_mac); -+ if (!res) { -+ pmlmepriv->gw_ip[0] = gw_addr & 0xff; -+ pmlmepriv->gw_ip[1] = (gw_addr & 0xff00) >> 8; -+ pmlmepriv->gw_ip[2] = (gw_addr & 0xff0000) >> 16; -+ pmlmepriv->gw_ip[3] = (gw_addr & 0xff000000) >> 24; -+ _rtw_memcpy(pmlmepriv->gw_mac_addr, gw_mac, ETH_ALEN); -+ RTW_INFO("%s Gateway Mac:\t" MAC_FMT "\n", __FUNCTION__, MAC_ARG(pmlmepriv->gw_mac_addr)); -+ RTW_INFO("%s Gateway IP:\t" IP_FMT "\n", __FUNCTION__, IP_ARG(pmlmepriv->gw_ip)); -+ } else -+ RTW_INFO("Get Gateway IP/MAC fail!\n"); -+ -+ return res; -+} -+#endif -+ -+void rtw_dev_unload(PADAPTER padapter) -+{ -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ struct dvobj_priv *pobjpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &pobjpriv->drv_dbg; -+ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; -+ -+ if (padapter->bup == _TRUE) { -+ RTW_INFO("==> "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ -+#ifdef CONFIG_WOWLAN -+#ifdef CONFIG_GPIO_WAKEUP -+ /*default wake up pin change to BT*/ -+ RTW_INFO("%s:default wake up pin change to BT\n", __FUNCTION__); -+ rtw_hal_switch_gpio_wl_ctrl(padapter, pwrctl->wowlan_gpio_index, _FALSE); -+#endif /* CONFIG_GPIO_WAKEUP */ -+#endif /* CONFIG_WOWLAN */ -+ -+ rtw_set_drv_stopped(padapter); -+#ifdef CONFIG_XMIT_ACK -+ if (padapter->xmitpriv.ack_tx) -+ rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); -+#endif -+ -+ rtw_intf_stop(padapter); -+ -+ rtw_stop_drv_threads(padapter); -+ -+ if (ATOMIC_READ(&(pcmdpriv->cmdthd_running)) == _TRUE) { -+ RTW_ERR("cmd_thread not stop !!\n"); -+ rtw_warn_on(1); -+ } -+ -+ /* check the status of IPS */ -+ if (rtw_hal_check_ips_status(padapter) == _TRUE || pwrctl->rf_pwrstate == rf_off) { /* check HW status and SW state */ -+ RTW_PRINT("%s: driver in IPS-FWLPS\n", __func__); -+ pdbgpriv->dbg_dev_unload_inIPS_cnt++; -+ } else -+ RTW_PRINT("%s: driver not in IPS\n", __func__); -+ -+ if (!rtw_is_surprise_removed(padapter)) { -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_IpsNotify(padapter, pwrctl->ips_mode_req); -+#endif -+#ifdef CONFIG_WOWLAN -+ if (pwrctl->bSupportRemoteWakeup == _TRUE && -+ pwrctl->wowlan_mode == _TRUE) -+ RTW_PRINT("%s bSupportRemoteWakeup==_TRUE do not run rtw_hal_deinit()\n", __FUNCTION__); -+ else -+#endif -+ { -+ /* amy modify 20120221 for power seq is different between driver open and ips */ -+ rtw_hal_deinit(padapter); -+ } -+ rtw_set_surprise_removed(padapter); -+ } -+ -+ padapter->bup = _FALSE; -+ -+ RTW_INFO("<== "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); -+ } else { -+ RTW_INFO("%s: bup==_FALSE\n", __FUNCTION__); -+ } -+ rtw_cancel_all_timer(padapter); -+} -+ -+int rtw_suspend_free_assoc_resource(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+#ifdef CONFIG_P2P -+ struct wifidirect_info *pwdinfo = &padapter->wdinfo; -+#endif /* CONFIG_P2P */ -+ -+ RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); -+ -+ if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) { -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) -+ && check_fwstate(pmlmepriv, WIFI_ASOC_STATE) -+ #ifdef CONFIG_P2P -+ && (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) -+ #if defined(CONFIG_IOCTL_CFG80211) && RTW_P2P_GROUP_INTERFACE -+ || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) -+ #endif -+ ) -+ #endif /* CONFIG_P2P */ -+ ) { -+ RTW_INFO("%s %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n", __FUNCTION__, -+ pmlmepriv->cur_network.network.Ssid.Ssid, -+ MAC_ARG(pmlmepriv->cur_network.network.MacAddress), -+ pmlmepriv->cur_network.network.Ssid.SsidLength, -+ pmlmepriv->assoc_ssid.SsidLength); -+ rtw_set_to_roam(padapter, 1); -+ } -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) { -+ rtw_disassoc_cmd(padapter, 0, RTW_CMDF_DIRECTLY); -+ /* s2-2. indicate disconnect to os */ -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ } -+#ifdef CONFIG_AP_MODE -+ else if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) -+ rtw_sta_flush(padapter, _TRUE); -+#endif -+ -+ /* s2-3. */ -+ rtw_free_assoc_resources(padapter, _TRUE); -+ -+ /* s2-4. */ -+ rtw_free_network_queue(padapter, _TRUE); -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY)) { -+ RTW_PRINT("%s: fw_under_survey\n", __func__); -+ rtw_indicate_scan_done(padapter, 1); -+ clr_fwstate(pmlmepriv, WIFI_UNDER_SURVEY); -+ } -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING) == _TRUE) { -+ RTW_PRINT("%s: fw_under_linking\n", __FUNCTION__); -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ } -+ -+ RTW_INFO("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); -+ return _SUCCESS; -+} -+ -+#ifdef CONFIG_WOWLAN -+int rtw_suspend_wow(_adapter *padapter) -+{ -+ u8 ch, bw, offset; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct wowlan_ioctl_param poidparam; -+ int ret = _SUCCESS; -+ u8 en = _TRUE, i; -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ _adapter *iface = NULL; -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter); -+ -+ RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); -+ -+ -+ RTW_INFO("wowlan_mode: %d\n", pwrpriv->wowlan_mode); -+ RTW_INFO("wowlan_pno_enable: %d\n", pwrpriv->wowlan_pno_enable); -+#ifdef CONFIG_P2P_WOWLAN -+ RTW_INFO("wowlan_p2p_enable: %d\n", pwrpriv->wowlan_p2p_enable); -+#endif -+ -+ if (pwrpriv->wowlan_mode == _TRUE) { -+ rtw_mi_netif_stop_queue(padapter); -+ #ifdef CONFIG_CONCURRENT_MODE -+ rtw_mi_buddy_netif_carrier_off(padapter); -+ #endif -+ -+ /* 0. Power off LED */ -+ rtw_led_control(padapter, LED_CTL_POWER_OFF); -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ /* 2.only for SDIO disable interrupt */ -+ rtw_intf_stop(padapter); -+ -+ /* 2.1 clean interrupt */ -+ rtw_hal_clear_interrupt(padapter); -+#endif /* CONFIG_SDIO_HCI */ -+ -+ /* enable ac lifetime during scan to avoid txfifo not empty. */ -+ dvobj->lifetime_en = rtw_read8(padapter, 0x426); -+ dvobj->pkt_lifetime = rtw_read32(padapter, 0x4c0); -+ rtw_write8(padapter, 0x426, rtw_read8(padapter, 0x426) | 0x0f); -+ if(hal_spec->tx_aclt_unit_factor == 1) { -+ rtw_write16(padapter, 0x4c0, 0x1000); // unit: 32us. 131ms -+ rtw_write16(padapter, 0x4c0 + 2 , 0x1000); // unit: 32us. 131ms -+ } else { -+ rtw_write16(padapter, 0x4c0, 0x0200); // unit: 256us. 131ms -+ rtw_write16(padapter, 0x4c0 + 2 , 0x0200); // unit: 256us. 131ms -+ } -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ rtw_write_port_cancel(iface); -+ RTW_INFO(ADPT_FMT " write port cancel\n", ADPT_ARG(iface)); -+ } -+ } -+ RTW_INFO("lifetime_en=%x, pkt_lifetime=%x\n", rtw_read8(padapter, 0x426), rtw_read32(padapter, 0x4c0)); -+ rtw_msleep_os(200); -+ -+ /* 1. stop thread */ -+ rtw_set_drv_stopped(padapter); /*for stop thread*/ -+ rtw_mi_stop_drv_threads(padapter); -+ -+ rtw_clr_drv_stopped(padapter); /*for 32k command*/ -+ -+ /* #ifdef CONFIG_LPS */ -+ /* rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); */ -+ /* #endif */ -+ -+ #ifdef CONFIG_SDIO_HCI -+ /* 2.2 free irq */ -+ #if !(CONFIG_RTW_SDIO_KEEP_IRQ) -+ sdio_free_irq(adapter_to_dvobj(padapter)); -+ #endif -+ #endif/*CONFIG_SDIO_HCI*/ -+ -+#ifdef CONFIG_RUNTIME_PORT_SWITCH -+ if (rtw_port_switch_chk(padapter)) { -+ RTW_INFO(" ### PORT SWITCH ###\n"); -+ rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); -+ } -+#endif -+ if(registry_par->suspend_type == FW_IPS_WRC) -+ rtw_hal_set_hwreg(padapter, HW_VAR_VENDOR_WOW_MODE, &en); -+#ifdef CONFIG_LPS -+ rtw_wow_lps_level_decide(padapter, _TRUE); -+#endif -+ poidparam.subcode = WOWLAN_ENABLE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_WOWLAN, (u8 *)&poidparam); -+ if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) { -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) -+ && check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) { -+ RTW_INFO("%s %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n", __FUNCTION__, -+ pmlmepriv->cur_network.network.Ssid.Ssid, -+ MAC_ARG(pmlmepriv->cur_network.network.MacAddress), -+ pmlmepriv->cur_network.network.Ssid.SsidLength, -+ pmlmepriv->assoc_ssid.SsidLength); -+ -+ rtw_set_to_roam(padapter, 0); -+ } -+ } -+ -+ RTW_PRINT("%s: wowmode suspending\n", __func__); -+ -+ if (check_fwstate(pmlmepriv, WIFI_UNDER_SURVEY) == _TRUE) { -+ RTW_PRINT("%s: fw_under_survey\n", __func__); -+ rtw_indicate_scan_done(padapter, 1); -+ clr_fwstate(pmlmepriv, WIFI_UNDER_SURVEY); -+ } -+ -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ ch = rtw_mi_get_union_chan(padapter); -+ bw = rtw_mi_get_union_bw(padapter); -+ offset = rtw_mi_get_union_offset(padapter); -+ RTW_INFO(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", -+ FUNC_ADPT_ARG(padapter), ch, bw, offset); -+ set_channel_bwmode(padapter, ch, offset, bw); -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ rtw_mi_buddy_suspend_free_assoc_resource(padapter); -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_SuspendNotify(padapter, BTCOEX_SUSPEND_STATE_SUSPEND_KEEP_ANT); -+#endif -+ -+ if (pwrpriv->wowlan_pno_enable) { -+ RTW_PRINT("%s: pno: %d\n", __func__, -+ pwrpriv->wowlan_pno_enable); -+#ifdef CONFIG_FWLPS_IN_IPS -+ rtw_set_fw_in_ips_mode(padapter, _TRUE); -+#endif -+ } -+#ifdef CONFIG_LPS -+ else { -+ if(pwrpriv->wowlan_power_mgmt != PS_MODE_ACTIVE) { -+ rtw_set_ps_mode(padapter, pwrpriv->wowlan_power_mgmt, 0, 0, "WOWLAN"); -+ } -+ } -+#endif /* #ifdef CONFIG_LPS */ -+ -+ } else -+ RTW_PRINT("%s: ### ERROR ### wowlan_mode=%d\n", __FUNCTION__, pwrpriv->wowlan_mode); -+ RTW_INFO("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); -+ return ret; -+} -+#endif /* #ifdef CONFIG_WOWLAN */ -+ -+#ifdef CONFIG_AP_WOWLAN -+int rtw_suspend_ap_wow(_adapter *padapter) -+{ -+ u8 ch, bw, offset; -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct wowlan_ioctl_param poidparam; -+ int ret = _SUCCESS; -+ -+ RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); -+ -+ pwrpriv->wowlan_ap_mode = _TRUE; -+ -+ RTW_INFO("wowlan_ap_mode: %d\n", pwrpriv->wowlan_ap_mode); -+ -+ rtw_mi_netif_stop_queue(padapter); -+ -+ /* 0. Power off LED */ -+ rtw_led_control(padapter, LED_CTL_POWER_OFF); -+#ifdef CONFIG_SDIO_HCI -+ /* 2.only for SDIO disable interrupt*/ -+ rtw_intf_stop(padapter); -+ -+ /* 2.1 clean interrupt */ -+ rtw_hal_clear_interrupt(padapter); -+#endif /* CONFIG_SDIO_HCI */ -+ -+ /* 1. stop thread */ -+ rtw_set_drv_stopped(padapter); /*for stop thread*/ -+ rtw_mi_stop_drv_threads(padapter); -+ rtw_clr_drv_stopped(padapter); /*for 32k command*/ -+ -+ #ifdef CONFIG_SDIO_HCI -+ /* 2.2 free irq */ -+ #if !(CONFIG_RTW_SDIO_KEEP_IRQ) -+ sdio_free_irq(adapter_to_dvobj(padapter)); -+ #endif -+ #endif/*CONFIG_SDIO_HCI*/ -+ -+#ifdef CONFIG_RUNTIME_PORT_SWITCH -+ if (rtw_port_switch_chk(padapter)) { -+ RTW_INFO(" ### PORT SWITCH ###\n"); -+ rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); -+ } -+#endif -+ -+ rtw_wow_lps_level_decide(padapter, _TRUE); -+ poidparam.subcode = WOWLAN_AP_ENABLE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_WOWLAN, (u8 *)&poidparam); -+ -+ RTW_PRINT("%s: wowmode suspending\n", __func__); -+ -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ ch = rtw_mi_get_union_chan(padapter); -+ bw = rtw_mi_get_union_bw(padapter); -+ offset = rtw_mi_get_union_offset(padapter); -+ RTW_INFO("back to linked/linking union - ch:%u, bw:%u, offset:%u\n", ch, bw, offset); -+ set_channel_bwmode(padapter, ch, offset, bw); -+ } -+ -+ /*FOR ONE AP - TODO :Multi-AP*/ -+ { -+ int i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE | WIFI_MESH_STATE) == _FALSE) -+ rtw_suspend_free_assoc_resource(iface); -+ } -+ } -+ -+ } -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_SuspendNotify(padapter, BTCOEX_SUSPEND_STATE_SUSPEND_KEEP_ANT); -+#endif -+ -+#ifdef CONFIG_LPS -+ if(pwrpriv->wowlan_power_mgmt != PS_MODE_ACTIVE) { -+ rtw_set_ps_mode(padapter, pwrpriv->wowlan_power_mgmt, 0, 0, "AP-WOWLAN"); -+ } -+#endif -+ -+ RTW_INFO("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); -+ return ret; -+} -+#endif /* CONFIG_AP_WOWLAN */ -+ -+ -+int rtw_suspend_normal(_adapter *padapter) -+{ -+ int ret = _SUCCESS; -+ -+ RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_SuspendNotify(padapter, BTCOEX_SUSPEND_STATE_SUSPEND); -+#endif -+ rtw_mi_netif_caroff_qstop(padapter); -+ -+ rtw_mi_suspend_free_assoc_resource(padapter); -+ -+ rtw_led_control(padapter, LED_CTL_POWER_OFF); -+ -+ if ((rtw_hal_check_ips_status(padapter) == _TRUE) -+ || (adapter_to_pwrctl(padapter)->rf_pwrstate == rf_off)) -+ RTW_PRINT("%s: ### ERROR #### driver in IPS ####ERROR###!!!\n", __FUNCTION__); -+ -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ rtw_set_drv_stopped(padapter); /*for stop thread*/ -+ rtw_stop_cmd_thread(padapter); -+ rtw_drv_stop_vir_ifaces(adapter_to_dvobj(padapter)); -+#endif -+ rtw_dev_unload(padapter); -+ -+ #ifdef CONFIG_SDIO_HCI -+ sdio_deinit(adapter_to_dvobj(padapter)); -+ -+ #if !(CONFIG_RTW_SDIO_KEEP_IRQ) -+ sdio_free_irq(adapter_to_dvobj(padapter)); -+ #endif -+ #endif /*CONFIG_SDIO_HCI*/ -+ -+ RTW_INFO("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); -+ return ret; -+} -+ -+int rtw_suspend_common(_adapter *padapter) -+{ -+ struct dvobj_priv *dvobj = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &dvobj->drv_dbg; -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); -+#ifdef CONFIG_WOWLAN -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct registry_priv *registry_par = &padapter->registrypriv; -+#endif -+ -+ int ret = 0; -+ systime start_time = rtw_get_current_time(); -+ -+ RTW_PRINT(" suspend start\n"); -+ RTW_INFO("==> %s (%s:%d)\n", __FUNCTION__, current->comm, current->pid); -+ -+ pdbgpriv->dbg_suspend_cnt++; -+ -+ pwrpriv->bInSuspend = _TRUE; -+ -+ while (pwrpriv->bips_processing == _TRUE) -+ rtw_msleep_os(1); -+ -+#ifdef CONFIG_IOL_READ_EFUSE_MAP -+ if (!padapter->bup) { -+ u8 bMacPwrCtrlOn = _FALSE; -+ rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); -+ if (bMacPwrCtrlOn) -+ rtw_hal_power_off(padapter); -+ } -+#endif -+ -+ if ((!padapter->bup) || RTW_CANNOT_RUN(padapter)) { -+ RTW_INFO("%s bup=%d bDriverStopped=%s bSurpriseRemoved = %s\n", __func__ -+ , padapter->bup -+ , rtw_is_drv_stopped(padapter) ? "True" : "False" -+ , rtw_is_surprise_removed(padapter) ? "True" : "False"); -+ pdbgpriv->dbg_suspend_error_cnt++; -+ goto exit; -+ } -+ rtw_mi_scan_abort(padapter, _TRUE); -+ rtw_ps_deny(padapter, PS_DENY_SUSPEND); -+ -+ rtw_mi_cancel_all_timer(padapter); -+ LeaveAllPowerSaveModeDirect(padapter); -+ -+ rtw_ps_deny_cancel(padapter, PS_DENY_SUSPEND); -+ -+ if (rtw_mi_check_status(padapter, MI_AP_MODE) == _FALSE) { -+#ifdef CONFIG_WOWLAN -+ if (WOWLAN_IS_STA_MIX_MODE(padapter)) -+ pwrpriv->wowlan_mode = _TRUE; -+ else if ( registry_par->wowlan_enable && check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) -+ pwrpriv->wowlan_mode = _TRUE; -+ else if (pwrpriv->wowlan_pno_enable == _TRUE) -+ pwrpriv->wowlan_mode |= pwrpriv->wowlan_pno_enable; -+ -+#ifdef CONFIG_P2P_WOWLAN -+ if (!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE) || P2P_ROLE_DISABLE != padapter->wdinfo.role) -+ pwrpriv->wowlan_p2p_mode = _TRUE; -+ if (_TRUE == pwrpriv->wowlan_p2p_mode) -+ pwrpriv->wowlan_mode |= pwrpriv->wowlan_p2p_mode; -+#endif /* CONFIG_P2P_WOWLAN */ -+ -+ if (pwrpriv->wowlan_mode == _TRUE) -+ rtw_suspend_wow(padapter); -+ else -+#endif /* CONFIG_WOWLAN */ -+ rtw_suspend_normal(padapter); -+ } else if (rtw_mi_check_status(padapter, MI_AP_MODE)) { -+#ifdef CONFIG_AP_WOWLAN -+ rtw_suspend_ap_wow(padapter); -+#else -+ rtw_suspend_normal(padapter); -+#endif /*CONFIG_AP_WOWLAN*/ -+ } -+ -+ -+ RTW_PRINT("rtw suspend success in %d ms\n", -+ rtw_get_passing_time_ms(start_time)); -+ -+exit: -+ RTW_INFO("<=== %s return %d.............. in %dms\n", __FUNCTION__ -+ , ret, rtw_get_passing_time_ms(start_time)); -+ -+ return ret; -+} -+ -+#ifdef CONFIG_WOWLAN -+int rtw_resume_process_wow(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ struct wowlan_ioctl_param poidparam; -+ struct sta_info *psta = NULL; -+ struct registry_priv *registry_par = &padapter->registrypriv; -+ int ret = _SUCCESS; -+ u8 en = _FALSE; -+ -+ RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); -+ -+ if (padapter) { -+ pwrpriv = adapter_to_pwrctl(padapter); -+ } else { -+ pdbgpriv->dbg_resume_error_cnt++; -+ ret = -1; -+ goto exit; -+ } -+ -+ if (RTW_CANNOT_RUN(padapter)) { -+ RTW_INFO("%s pdapter %p bDriverStopped %s bSurpriseRemoved %s\n" -+ , __func__, padapter -+ , rtw_is_drv_stopped(padapter) ? "True" : "False" -+ , rtw_is_surprise_removed(padapter) ? "True" : "False"); -+ goto exit; -+ } -+ -+ pwrpriv->wowlan_in_resume = _TRUE; -+#ifdef CONFIG_PNO_SUPPORT -+#ifdef CONFIG_FWLPS_IN_IPS -+ if (pwrpriv->wowlan_pno_enable) -+ rtw_set_fw_in_ips_mode(padapter, _FALSE); -+#endif /* CONFIG_FWLPS_IN_IPS */ -+#endif/* CONFIG_PNO_SUPPORT */ -+ -+ if (pwrpriv->wowlan_mode == _TRUE) { -+#ifdef CONFIG_LPS -+ if(pwrpriv->wowlan_power_mgmt != PS_MODE_ACTIVE) { -+ rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); -+ rtw_wow_lps_level_decide(padapter, _FALSE); -+ } -+#endif /* CONFIG_LPS */ -+ -+ rtw_write8(padapter, 0x426, psdpriv->lifetime_en); -+ rtw_write32(padapter, 0x4c0, psdpriv->pkt_lifetime); -+ -+ pwrpriv->bFwCurrentInPSMode = _FALSE; -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI) -+ rtw_mi_intf_stop(padapter); -+ rtw_hal_clear_interrupt(padapter); -+#endif -+ -+ #ifdef CONFIG_SDIO_HCI -+ #if !(CONFIG_RTW_SDIO_KEEP_IRQ) -+ if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) { -+ ret = -1; -+ goto exit; -+ } -+ #endif -+ #endif/*CONFIG_SDIO_HCI*/ -+ -+ /* Disable WOW, set H2C command */ -+ poidparam.subcode = WOWLAN_DISABLE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_WOWLAN, (u8 *)&poidparam); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ rtw_mi_buddy_reset_drv_sw(padapter); -+#endif -+ -+ psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); -+ if (psta) -+ set_sta_rate(padapter, psta); -+ -+ -+ rtw_clr_drv_stopped(padapter); -+ RTW_INFO("%s: wowmode resuming, DriverStopped:%s\n", __func__, rtw_is_drv_stopped(padapter) ? "True" : "False"); -+ -+ if(registry_par->suspend_type == FW_IPS_WRC) -+ rtw_hal_set_hwreg(padapter, HW_VAR_VENDOR_WOW_MODE, &en); -+ -+ rtw_mi_start_drv_threads(padapter); -+ -+ rtw_mi_intf_start(padapter); -+ -+ if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) { -+ if (!rtw_is_surprise_removed(padapter)) { -+ rtw_hal_deinit(padapter); -+ rtw_hal_init(padapter); -+ } -+ RTW_INFO("FW_IPS_DISABLE_BBRF hal deinit, hal init \n"); -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ rtw_mi_buddy_netif_carrier_on(padapter); -+#endif -+ -+ /* start netif queue */ -+ rtw_mi_netif_wake_queue(padapter); -+ -+ } else -+ -+ RTW_PRINT("%s: ### ERROR ### wowlan_mode=%d\n", __FUNCTION__, pwrpriv->wowlan_mode); -+ -+ if (padapter->pid[1] != 0) { -+ RTW_INFO("pid[1]:%d\n", padapter->pid[1]); -+ rtw_signal_process(padapter->pid[1], SIGUSR2); -+ } -+ -+ if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) { -+ if (pwrpriv->wowlan_wake_reason == FW_DECISION_DISCONNECT || -+ pwrpriv->wowlan_wake_reason == RX_DISASSOC|| -+ pwrpriv->wowlan_wake_reason == RX_DEAUTH) { -+ -+ RTW_INFO("%s: disconnect reason: %02x\n", __func__, -+ pwrpriv->wowlan_wake_reason); -+ rtw_indicate_disconnect(padapter, 0, _FALSE); -+ -+ rtw_sta_media_status_rpt(padapter, -+ rtw_get_stainfo(&padapter->stapriv, -+ get_bssid(&padapter->mlmepriv)), 0); -+ -+ rtw_free_assoc_resources(padapter, _TRUE); -+ pmlmeinfo->state = WIFI_FW_NULL_STATE; -+ -+ } else { -+ RTW_INFO("%s: do roaming\n", __func__); -+ rtw_roaming(padapter, NULL); -+ } -+ } -+ -+ if (pwrpriv->wowlan_mode == _TRUE) { -+ pwrpriv->bips_processing = _FALSE; -+ _set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000); -+#ifndef CONFIG_IPS_CHECK_IN_WD -+ rtw_set_pwr_state_check_timer(pwrpriv); -+#endif -+ } else -+ RTW_PRINT("do not reset timer\n"); -+ -+ pwrpriv->wowlan_mode = _FALSE; -+ -+ /* Power On LED */ -+#ifdef CONFIG_RTW_SW_LED -+ -+ if (pwrpriv->wowlan_wake_reason == RX_DISASSOC|| -+ pwrpriv->wowlan_wake_reason == RX_DEAUTH|| -+ pwrpriv->wowlan_wake_reason == FW_DECISION_DISCONNECT) -+ rtw_led_control(padapter, LED_CTL_NO_LINK); -+ else -+ rtw_led_control(padapter, LED_CTL_LINK); -+#endif -+ /* clean driver side wake up reason. */ -+ pwrpriv->wowlan_last_wake_reason = pwrpriv->wowlan_wake_reason; -+ pwrpriv->wowlan_wake_reason = 0; -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_SuspendNotify(padapter, BTCOEX_SUSPEND_STATE_RESUME); -+#endif /* CONFIG_BT_COEXIST */ -+ -+exit: -+ RTW_INFO("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); -+ return ret; -+} -+#endif /* #ifdef CONFIG_WOWLAN */ -+ -+#ifdef CONFIG_AP_WOWLAN -+int rtw_resume_process_ap_wow(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ struct wowlan_ioctl_param poidparam; -+ struct sta_info *psta = NULL; -+ int ret = _SUCCESS; -+ u8 ch, bw, offset; -+ -+ RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); -+ -+ if (padapter) { -+ pwrpriv = adapter_to_pwrctl(padapter); -+ } else { -+ pdbgpriv->dbg_resume_error_cnt++; -+ ret = -1; -+ goto exit; -+ } -+ -+ -+#ifdef CONFIG_LPS -+ if(pwrpriv->wowlan_power_mgmt != PS_MODE_ACTIVE) { -+ rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "AP-WOWLAN"); -+ rtw_wow_lps_level_decide(padapter, _FALSE); -+ } -+#endif /* CONFIG_LPS */ -+ -+ pwrpriv->bFwCurrentInPSMode = _FALSE; -+ -+ rtw_hal_disable_interrupt(padapter); -+ -+ rtw_hal_clear_interrupt(padapter); -+ -+ #ifdef CONFIG_SDIO_HCI -+ #if !(CONFIG_RTW_SDIO_KEEP_IRQ) -+ if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) { -+ ret = -1; -+ goto exit; -+ } -+ #endif -+ #endif/*CONFIG_SDIO_HCI*/ -+ /* Disable WOW, set H2C command */ -+ poidparam.subcode = WOWLAN_AP_DISABLE; -+ rtw_hal_set_hwreg(padapter, HW_VAR_WOWLAN, (u8 *)&poidparam); -+ pwrpriv->wowlan_ap_mode = _FALSE; -+ -+ rtw_clr_drv_stopped(padapter); -+ RTW_INFO("%s: wowmode resuming, DriverStopped:%s\n", __func__, rtw_is_drv_stopped(padapter) ? "True" : "False"); -+ -+ rtw_mi_start_drv_threads(padapter); -+ -+ if (rtw_mi_check_status(padapter, MI_LINKED)) { -+ ch = rtw_mi_get_union_chan(padapter); -+ bw = rtw_mi_get_union_bw(padapter); -+ offset = rtw_mi_get_union_offset(padapter); -+ RTW_INFO(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n", FUNC_ADPT_ARG(padapter), ch, bw, offset); -+ set_channel_bwmode(padapter, ch, offset, bw); -+ } -+ -+ /*FOR ONE AP - TODO :Multi-AP*/ -+ { -+ int i; -+ _adapter *iface; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE | WIFI_MESH_STATE | WIFI_ASOC_STATE)) -+ rtw_reset_drv_sw(iface); -+ } -+ } -+ -+ } -+ rtw_mi_intf_start(padapter); -+ -+ /* start netif queue */ -+ rtw_mi_netif_wake_queue(padapter); -+ -+ if (padapter->pid[1] != 0) { -+ RTW_INFO("pid[1]:%d\n", padapter->pid[1]); -+ rtw_signal_process(padapter->pid[1], SIGUSR2); -+ } -+ -+#ifdef CONFIG_RESUME_IN_WORKQUEUE -+ /* rtw_unlock_suspend(); */ -+#endif /* CONFIG_RESUME_IN_WORKQUEUE */ -+ -+ pwrpriv->bips_processing = _FALSE; -+ _set_timer(&adapter_to_dvobj(padapter)->dynamic_chk_timer, 2000); -+#ifndef CONFIG_IPS_CHECK_IN_WD -+ rtw_set_pwr_state_check_timer(pwrpriv); -+#endif -+ /* clean driver side wake up reason. */ -+ pwrpriv->wowlan_wake_reason = 0; -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_SuspendNotify(padapter, BTCOEX_SUSPEND_STATE_RESUME); -+#endif /* CONFIG_BT_COEXIST */ -+ -+ /* Power On LED */ -+#ifdef CONFIG_RTW_SW_LED -+ -+ rtw_led_control(padapter, LED_CTL_LINK); -+#endif -+exit: -+ RTW_INFO("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); -+ return ret; -+} -+#endif /* #ifdef CONFIG_APWOWLAN */ -+ -+void rtw_mi_resume_process_normal(_adapter *padapter) -+{ -+ int i; -+ _adapter *iface; -+ struct mlme_priv *pmlmepriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if ((iface) && rtw_is_adapter_up(iface)) { -+ pmlmepriv = &iface->mlmepriv; -+ -+ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { -+ RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(iface), get_fwstate(pmlmepriv)); -+ -+ if (rtw_chk_roam_flags(iface, RTW_ROAM_ON_RESUME)) -+ rtw_roaming(iface, NULL); -+ -+ } -+#ifdef CONFIG_AP_MODE -+ else if (MLME_IS_AP(iface) || MLME_IS_MESH(iface)) { -+ RTW_INFO(FUNC_ADPT_FMT" %s\n", FUNC_ADPT_ARG(iface), MLME_IS_AP(iface) ? "AP" : "MESH"); -+ rtw_ap_restore_network(iface); -+ } -+#endif -+ else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) -+ RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(iface), get_fwstate(pmlmepriv)); -+ else -+ RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(iface), get_fwstate(pmlmepriv)); -+ } -+ } -+} -+ -+int rtw_resume_process_normal(_adapter *padapter) -+{ -+ struct net_device *pnetdev; -+ struct pwrctrl_priv *pwrpriv; -+ struct dvobj_priv *psdpriv; -+ struct debug_priv *pdbgpriv; -+ -+ int ret = _SUCCESS; -+ -+ if (!padapter) { -+ ret = -1; -+ goto exit; -+ } -+ -+ pnetdev = padapter->pnetdev; -+ pwrpriv = adapter_to_pwrctl(padapter); -+ psdpriv = padapter->dvobj; -+ pdbgpriv = &psdpriv->drv_dbg; -+ -+ RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); -+ -+ #ifdef CONFIG_SDIO_HCI -+ /* interface init */ -+ if (sdio_init(adapter_to_dvobj(padapter)) != _SUCCESS) { -+ ret = -1; -+ goto exit; -+ } -+ #endif/*CONFIG_SDIO_HCI*/ -+ -+ rtw_clr_surprise_removed(padapter); -+ rtw_hal_disable_interrupt(padapter); -+ -+ #ifdef CONFIG_SDIO_HCI -+ #if !(CONFIG_RTW_SDIO_KEEP_IRQ) -+ if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) { -+ ret = -1; -+ goto exit; -+ } -+ #endif -+ #endif/*CONFIG_SDIO_HCI*/ -+ -+ rtw_mi_reset_drv_sw(padapter); -+ -+ pwrpriv->bkeepfwalive = _FALSE; -+ -+ RTW_INFO("bkeepfwalive(%x)\n", pwrpriv->bkeepfwalive); -+ if (pm_netdev_open(pnetdev, _TRUE) != 0) { -+ ret = -1; -+ pdbgpriv->dbg_resume_error_cnt++; -+ goto exit; -+ } -+ -+ rtw_mi_netif_caron_qstart(padapter); -+ -+ if (padapter->pid[1] != 0) { -+ RTW_INFO("pid[1]:%d\n", padapter->pid[1]); -+ rtw_signal_process(padapter->pid[1], SIGUSR2); -+ } -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_SuspendNotify(padapter, BTCOEX_SUSPEND_STATE_RESUME); -+#endif /* CONFIG_BT_COEXIST */ -+ -+ rtw_mi_resume_process_normal(padapter); -+ -+#ifdef CONFIG_RESUME_IN_WORKQUEUE -+ /* rtw_unlock_suspend(); */ -+#endif /* CONFIG_RESUME_IN_WORKQUEUE */ -+ RTW_INFO("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); -+ -+exit: -+ return ret; -+} -+ -+int rtw_resume_common(_adapter *padapter) -+{ -+ int ret = 0; -+ systime start_time = rtw_get_current_time(); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ -+ if (pwrpriv == NULL) -+ return 0; -+ -+ if (pwrpriv->bInSuspend == _FALSE) -+ return 0; -+ -+ RTW_PRINT("resume start\n"); -+ RTW_INFO("==> %s (%s:%d)\n", __FUNCTION__, current->comm, current->pid); -+ -+ if (rtw_mi_check_status(padapter, MI_AP_MODE) == _FALSE) { -+#ifdef CONFIG_WOWLAN -+ if (pwrpriv->wowlan_mode == _TRUE) -+ rtw_resume_process_wow(padapter); -+ else -+#endif -+ rtw_resume_process_normal(padapter); -+ -+ } else if (rtw_mi_check_status(padapter, MI_AP_MODE)) { -+#ifdef CONFIG_AP_WOWLAN -+ rtw_resume_process_ap_wow(padapter); -+#else -+ rtw_resume_process_normal(padapter); -+#endif /* CONFIG_AP_WOWLAN */ -+ } -+ -+ pwrpriv->bInSuspend = _FALSE; -+ pwrpriv->wowlan_in_resume = _FALSE; -+ -+ RTW_PRINT("%s:%d in %d ms\n", __FUNCTION__ , ret, -+ rtw_get_passing_time_ms(start_time)); -+ -+ -+ return ret; -+} -+ -+#ifdef CONFIG_GPIO_API -+u8 rtw_get_gpio(struct net_device *netdev, u8 gpio_num) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); -+ return rtw_hal_get_gpio(adapter, gpio_num); -+} -+EXPORT_SYMBOL(rtw_get_gpio); -+ -+int rtw_set_gpio_output_value(struct net_device *netdev, u8 gpio_num, bool isHigh) -+{ -+ u8 direction = 0; -+ u8 res = -1; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); -+ return rtw_hal_set_gpio_output_value(adapter, gpio_num, isHigh); -+} -+EXPORT_SYMBOL(rtw_set_gpio_output_value); -+ -+int rtw_config_gpio(struct net_device *netdev, u8 gpio_num, bool isOutput) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); -+ return rtw_hal_config_gpio(adapter, gpio_num, isOutput); -+} -+EXPORT_SYMBOL(rtw_config_gpio); -+int rtw_register_gpio_interrupt(struct net_device *netdev, int gpio_num, void(*callback)(u8 level)) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); -+ return rtw_hal_register_gpio_interrupt(adapter, gpio_num, callback); -+} -+EXPORT_SYMBOL(rtw_register_gpio_interrupt); -+ -+int rtw_disable_gpio_interrupt(struct net_device *netdev, int gpio_num) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); -+ return rtw_hal_disable_gpio_interrupt(adapter, gpio_num); -+} -+EXPORT_SYMBOL(rtw_disable_gpio_interrupt); -+ -+#endif /* #ifdef CONFIG_GPIO_API */ -+ -+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE -+ -+int rtw_vendor_ie_get_api(struct net_device *dev, int ie_num, char *extra, -+ u16 extra_len) -+{ -+ int ret = 0; -+ -+ ret = rtw_vendor_ie_get_raw_data(dev, ie_num, extra, extra_len); -+ return ret; -+} -+EXPORT_SYMBOL(rtw_vendor_ie_get_api); -+ -+int rtw_vendor_ie_set_api(struct net_device *dev, char *extra) -+{ -+ return rtw_vendor_ie_set(dev, NULL, NULL, extra); -+} -+EXPORT_SYMBOL(rtw_vendor_ie_set_api); -+ -+#endif -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/recv_linux.c b/drivers/staging/rtl8723cs/os_dep/linux/recv_linux.c -new file mode 100644 -index 000000000000..13cd7660ac7e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/recv_linux.c -@@ -0,0 +1,734 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _RECV_OSDEP_C_ -+ -+#include -+ -+int rtw_os_recvframe_duplicate_skb(_adapter *padapter, union recv_frame *pcloneframe, _pkt *pskb) -+{ -+ int res = _SUCCESS; -+ _pkt *pkt_copy = NULL; -+ -+ if (pskb == NULL) { -+ RTW_INFO("%s [WARN] skb == NULL, drop frag frame\n", __func__); -+ return _FAIL; -+ } -+#if 1 -+ pkt_copy = rtw_skb_copy(pskb); -+ -+ if (pkt_copy == NULL) { -+ RTW_INFO("%s [WARN] rtw_skb_copy fail , drop frag frame\n", __func__); -+ return _FAIL; -+ } -+#else -+ pkt_copy = rtw_skb_clone(pskb); -+ -+ if (pkt_copy == NULL) { -+ RTW_INFO("%s [WARN] rtw_skb_clone fail , drop frag frame\n", __func__); -+ return _FAIL; -+ } -+#endif -+ pkt_copy->dev = padapter->pnetdev; -+ -+ pcloneframe->u.hdr.pkt = pkt_copy; -+ pcloneframe->u.hdr.rx_head = pkt_copy->head; -+ pcloneframe->u.hdr.rx_data = pkt_copy->data; -+ pcloneframe->u.hdr.rx_end = skb_end_pointer(pkt_copy); -+ pcloneframe->u.hdr.rx_tail = skb_tail_pointer(pkt_copy); -+ pcloneframe->u.hdr.len = pkt_copy->len; -+ -+ return res; -+} -+ -+int rtw_os_alloc_recvframe(_adapter *padapter, union recv_frame *precvframe, u8 *pdata, _pkt *pskb) -+{ -+ int res = _SUCCESS; -+ u8 shift_sz = 0; -+ u32 skb_len, alloc_sz; -+ _pkt *pkt_copy = NULL; -+ struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; -+ -+ -+ if (pdata == NULL) { -+ precvframe->u.hdr.pkt = NULL; -+ res = _FAIL; -+ return res; -+ } -+ -+ -+ /* Modified by Albert 20101213 */ -+ /* For 8 bytes IP header alignment. */ -+ shift_sz = pattrib->qos ? 6 : 0; /* Qos data, wireless lan header length is 26 */ -+ -+ skb_len = pattrib->pkt_len; -+ -+ /* for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. */ -+ /* modify alloc_sz for recvive crc error packet by thomas 2011-06-02 */ -+ if ((pattrib->mfrag == 1) && (pattrib->frag_num == 0)) { -+ /* alloc_sz = 1664; */ /* 1664 is 128 alignment. */ -+ alloc_sz = (skb_len <= 1650) ? 1664 : (skb_len + 14); -+ } else { -+ alloc_sz = skb_len; -+ /* 6 is for IP header 8 bytes alignment in QoS packet case. */ -+ /* 8 is for skb->data 4 bytes alignment. */ -+ alloc_sz += 14; -+ } -+ -+ pkt_copy = rtw_skb_alloc(alloc_sz); -+ -+ if (pkt_copy) { -+ pkt_copy->dev = padapter->pnetdev; -+ pkt_copy->len = skb_len; -+ precvframe->u.hdr.pkt = pkt_copy; -+ precvframe->u.hdr.rx_head = pkt_copy->head; -+ precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; -+ skb_reserve(pkt_copy, 8 - ((SIZE_PTR)(pkt_copy->data) & 7)); /* force pkt_copy->data at 8-byte alignment address */ -+ skb_reserve(pkt_copy, shift_sz);/* force ip_hdr at 8-byte alignment address according to shift_sz. */ -+ _rtw_memcpy(pkt_copy->data, pdata, skb_len); -+ precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; -+ } else { -+#if 0 -+ { -+ rtw_free_recvframe(precvframe_if2, &precvpriv->free_recv_queue); -+ rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); -+ -+ /* The case of can't allocate skb is serious and may never be recovered, -+ once bDriverStopped is enable, this task should be stopped.*/ -+ if (!rtw_is_drv_stopped(secondary_padapter)) -+#ifdef PLATFORM_LINUX -+ tasklet_schedule(&precvpriv->recv_tasklet); -+#endif -+ return ret; -+ } -+ -+#endif -+ -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX -+ RTW_INFO("%s:can not allocate memory for skb copy\n", __func__); -+ -+ precvframe->u.hdr.pkt = NULL; -+ -+ /* rtw_free_recvframe(precvframe, pfree_recv_queue); */ -+ /*exit_rtw_os_recv_resource_alloc;*/ -+ -+ res = _FAIL; -+#else -+ if ((pattrib->mfrag == 1) && (pattrib->frag_num == 0)) { -+ RTW_INFO("%s: alloc_skb fail , drop frag frame\n", __FUNCTION__); -+ /* rtw_free_recvframe(precvframe, pfree_recv_queue); */ -+ res = _FAIL; -+ goto exit_rtw_os_recv_resource_alloc; -+ } -+ -+ if (pskb == NULL) { -+ res = _FAIL; -+ goto exit_rtw_os_recv_resource_alloc; -+ } -+ -+ precvframe->u.hdr.pkt = rtw_skb_clone(pskb); -+ if (precvframe->u.hdr.pkt) { -+ precvframe->u.hdr.pkt->dev = padapter->pnetdev; -+ precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pdata; -+ precvframe->u.hdr.rx_end = pdata + alloc_sz; -+ } else { -+ RTW_INFO("%s: rtw_skb_clone fail\n", __FUNCTION__); -+ /* rtw_free_recvframe(precvframe, pfree_recv_queue); */ -+ /*exit_rtw_os_recv_resource_alloc;*/ -+ res = _FAIL; -+ } -+#endif -+ } -+ -+exit_rtw_os_recv_resource_alloc: -+ -+ return res; -+ -+} -+ -+void rtw_os_free_recvframe(union recv_frame *precvframe) -+{ -+ if (precvframe->u.hdr.pkt) { -+ rtw_os_pkt_free(precvframe->u.hdr.pkt); -+ precvframe->u.hdr.pkt = NULL; -+ } -+} -+ -+/* init os related resource in struct recv_priv */ -+int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter) -+{ -+ int res = _SUCCESS; -+ -+ -+#ifdef CONFIG_RTW_NAPI -+ skb_queue_head_init(&precvpriv->rx_napi_skb_queue); -+#endif /* CONFIG_RTW_NAPI */ -+ -+ return res; -+} -+ -+/* alloc os related resource in union recv_frame */ -+int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe) -+{ -+ int res = _SUCCESS; -+ -+ precvframe->u.hdr.pkt = NULL; -+ -+ return res; -+} -+ -+/* free os related resource in union recv_frame */ -+void rtw_os_recv_resource_free(struct recv_priv *precvpriv) -+{ -+ sint i; -+ union recv_frame *precvframe; -+ precvframe = (union recv_frame *) precvpriv->precv_frame_buf; -+ -+ -+#ifdef CONFIG_RTW_NAPI -+ if (skb_queue_len(&precvpriv->rx_napi_skb_queue)) -+ RTW_WARN("rx_napi_skb_queue not empty\n"); -+ rtw_skb_queue_purge(&precvpriv->rx_napi_skb_queue); -+#endif /* CONFIG_RTW_NAPI */ -+ -+ for (i = 0; i < NR_RECVFRAME; i++) { -+ rtw_os_free_recvframe(precvframe); -+ precvframe++; -+ } -+} -+ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+#if !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8822C) -+#ifdef CONFIG_SDIO_RX_COPY -+static int sdio_init_recvbuf_with_skb(struct recv_priv *recvpriv, struct recv_buf *rbuf, u32 size) -+{ -+#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ if (RBUF_IS_PREALLOC(rbuf)) { -+ rbuf->pskb = rtw_alloc_skb_premem(size); -+ if (!rbuf->pskb) { -+ RTW_WARN("%s: Fail to get pre-alloc skb! size=%d\n", __func__, size); -+ return _FAIL; -+ } -+ skb_set_tail_pointer(rbuf->pskb, 0); /* TODO: do this in RTKM */ -+ } else -+#else -+ { -+ SIZE_PTR tmpaddr = 0; -+ SIZE_PTR alignment = 0; -+ -+ rbuf->pskb = rtw_skb_alloc(size + RECVBUFF_ALIGN_SZ); -+ if (!rbuf->pskb) -+ return _FAIL; -+ -+ tmpaddr = (SIZE_PTR)rbuf->pskb->data; -+ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1); -+ skb_reserve(rbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); -+ } -+#endif -+ -+ rbuf->pskb->dev = recvpriv->adapter->pnetdev; -+ -+ /* init recvbuf */ -+ rbuf->phead = rbuf->pskb->head; -+ rbuf->pdata = rbuf->pskb->data; -+ rbuf->ptail = skb_tail_pointer(rbuf->pskb); -+ rbuf->pend = skb_end_pointer(rbuf->pskb); -+ rbuf->len = 0; -+ -+ return _SUCCESS; -+} -+#endif /* CONFIG_SDIO_RX_COPY */ -+#endif /* !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8822C) */ -+#endif /* defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) */ -+ -+/* alloc os related resource in struct recv_buf */ -+int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf, u32 size) -+{ -+ int res = _SUCCESS; -+ -+#ifdef CONFIG_USB_HCI -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct usb_device *pusbd = pdvobjpriv->pusbdev; -+#endif -+ -+ precvbuf->irp_pending = _FALSE; -+ precvbuf->purb = usb_alloc_urb(0, GFP_KERNEL); -+ if (precvbuf->purb == NULL) -+ res = _FAIL; -+ -+ precvbuf->pskb = NULL; -+ -+ precvbuf->pallocated_buf = precvbuf->pbuf = NULL; -+ -+ precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pend = NULL; -+ -+ precvbuf->transfer_len = 0; -+ -+ precvbuf->len = 0; -+ -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX -+ precvbuf->pallocated_buf = rtw_usb_buffer_alloc(pusbd, (size_t)size, &precvbuf->dma_transfer_addr); -+ precvbuf->pbuf = precvbuf->pallocated_buf; -+ if (precvbuf->pallocated_buf == NULL) -+ return _FAIL; -+#endif /* CONFIG_USE_USB_BUFFER_ALLOC_RX */ -+ -+#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ #if !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8822C) -+ #ifdef CONFIG_SDIO_RX_COPY -+ res = sdio_init_recvbuf_with_skb(&padapter->recvpriv, precvbuf, size); -+ #endif -+ #endif -+ -+#endif /* CONFIG_XXX_HCI */ -+ -+ return res; -+} -+ -+/* free os related resource in struct recv_buf */ -+int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf) -+{ -+ int ret = _SUCCESS; -+ -+#ifdef CONFIG_USB_HCI -+ -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX -+ -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct usb_device *pusbd = pdvobjpriv->pusbdev; -+ -+ rtw_usb_buffer_free(pusbd, (size_t)precvbuf->alloc_sz, precvbuf->pallocated_buf, precvbuf->dma_transfer_addr); -+ precvbuf->pallocated_buf = NULL; -+ precvbuf->dma_transfer_addr = 0; -+ -+#endif /* CONFIG_USE_USB_BUFFER_ALLOC_RX */ -+ -+ if (precvbuf->purb) { -+ /* usb_kill_urb(precvbuf->purb); */ -+ usb_free_urb(precvbuf->purb); -+ } -+ -+#endif /* CONFIG_USB_HCI */ -+ -+ -+ if (precvbuf->pskb) { -+#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ if (rtw_free_skb_premem(precvbuf->pskb) != 0) -+#endif -+ rtw_skb_free(precvbuf->pskb); -+ } -+ return ret; -+ -+} -+ -+_pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, const u8 *da, const u8 *sa -+ , u8 *msdu ,u16 msdu_len, enum rtw_rx_llc_hdl llc_hdl) -+{ -+ u8 *data_ptr; -+ _pkt *sub_skb; -+ struct rx_pkt_attrib *pattrib; -+ -+ pattrib = &prframe->u.hdr.attrib; -+ -+#ifdef CONFIG_SKB_COPY -+ sub_skb = rtw_skb_alloc(msdu_len + 14); -+ if (sub_skb) { -+ skb_reserve(sub_skb, 14); -+ data_ptr = (u8 *)skb_put(sub_skb, msdu_len); -+ _rtw_memcpy(data_ptr, msdu, msdu_len); -+ } else -+#endif /* CONFIG_SKB_COPY */ -+ { -+ sub_skb = rtw_skb_clone(prframe->u.hdr.pkt); -+ if (sub_skb) { -+ sub_skb->data = msdu; -+ sub_skb->len = msdu_len; -+ skb_set_tail_pointer(sub_skb, msdu_len); -+ } else { -+ RTW_INFO("%s(): rtw_skb_clone() Fail!!!\n", __FUNCTION__); -+ return NULL; -+ } -+ } -+ -+ if (llc_hdl) { -+ /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ -+ skb_pull(sub_skb, SNAP_SIZE); -+ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), sa, ETH_ALEN); -+ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), da, ETH_ALEN); -+ } else { -+ /* Leave Ethernet header part of hdr and full payload */ -+ u16 len; -+ -+ len = htons(sub_skb->len); -+ _rtw_memcpy(skb_push(sub_skb, 2), &len, 2); -+ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), sa, ETH_ALEN); -+ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), da, ETH_ALEN); -+ } -+ -+ return sub_skb; -+} -+ -+#ifdef CONFIG_RTW_NAPI -+static int napi_recv(_adapter *padapter, int budget) -+{ -+ _pkt *pskb; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ int work_done = 0; -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+ u8 rx_ok; -+ -+ -+ while ((work_done < budget) && -+ (!skb_queue_empty(&precvpriv->rx_napi_skb_queue))) { -+ pskb = skb_dequeue(&precvpriv->rx_napi_skb_queue); -+ if (!pskb) -+ break; -+ -+ rx_ok = _FALSE; -+ -+#ifdef CONFIG_RTW_GRO -+ /* -+ cloned SKB use dataref to avoid kernel release it. -+ But dataref changed in napi_gro_receive. -+ So, we should prevent cloned SKB go into napi_gro_receive. -+ */ -+ if (pregistrypriv->en_gro && !skb_cloned(pskb)) { -+ if (rtw_napi_gro_receive(&padapter->napi, pskb) != GRO_DROP) -+ rx_ok = _TRUE; -+ goto next; -+ } -+#endif /* CONFIG_RTW_GRO */ -+ -+ if (rtw_netif_receive_skb(padapter->pnetdev, pskb) == NET_RX_SUCCESS) -+ rx_ok = _TRUE; -+ -+next: -+ if (rx_ok == _TRUE) { -+ work_done++; -+ DBG_COUNTER(padapter->rx_logs.os_netif_ok); -+ } else { -+ DBG_COUNTER(padapter->rx_logs.os_netif_err); -+ } -+ } -+ -+ return work_done; -+} -+ -+int rtw_recv_napi_poll(struct napi_struct *napi, int budget) -+{ -+ _adapter *padapter = container_of(napi, _adapter, napi); -+ int work_done = 0; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ -+ -+ work_done = napi_recv(padapter, budget); -+ if (work_done < budget) { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) && defined(CONFIG_PCI_HCI) -+ napi_complete_done(napi, work_done); -+#else -+ napi_complete(napi); -+#endif -+ if (!skb_queue_empty(&precvpriv->rx_napi_skb_queue)) -+ napi_schedule(napi); -+ } -+ -+ return work_done; -+} -+ -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+void dynamic_napi_th_chk (_adapter *adapter) -+{ -+ -+ if (adapter->registrypriv.en_napi) { -+ struct dvobj_priv *dvobj; -+ struct registry_priv *registry; -+ -+ dvobj = adapter_to_dvobj(adapter); -+ registry = &adapter->registrypriv; -+ if (dvobj->traffic_stat.cur_rx_tp > registry->napi_threshold) -+ dvobj->en_napi_dynamic = 1; -+ else -+ dvobj->en_napi_dynamic = 0; -+ } -+ -+} -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+#endif /* CONFIG_RTW_NAPI */ -+ -+void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, union recv_frame *rframe) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct recv_priv *precvpriv = &(padapter->recvpriv); -+ struct registry_priv *pregistrypriv = &padapter->registrypriv; -+#ifdef CONFIG_BR_EXT -+ void *br_port = NULL; -+#endif -+ int ret; -+ -+ /* Indicat the packets to upper layer */ -+ if (pkt) { -+ struct ethhdr *ehdr = (struct ethhdr *)pkt->data; -+ -+ DBG_COUNTER(padapter->rx_logs.os_indicate); -+ -+#ifdef CONFIG_BR_EXT -+ if (!adapter_use_wds(padapter) && check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE) == _TRUE) { -+ /* Insert NAT2.5 RX here! */ -+ #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) -+ br_port = padapter->pnetdev->br_port; -+ #else -+ rcu_read_lock(); -+ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); -+ rcu_read_unlock(); -+ #endif -+ -+ if (br_port) { -+ int nat25_handle_frame(_adapter *priv, struct sk_buff *skb); -+ -+ if (nat25_handle_frame(padapter, pkt) == -1) { -+ /* priv->ext_stats.rx_data_drops++; */ -+ /* DEBUG_ERR("RX DROP: nat25_handle_frame fail!\n"); */ -+ /* return FAIL; */ -+ -+ #if 1 -+ /* bypass this frame to upper layer!! */ -+ #else -+ rtw_skb_free(sub_skb); -+ continue; -+ #endif -+ } -+ } -+ } -+#endif /* CONFIG_BR_EXT */ -+ -+ /* After eth_type_trans process , pkt->data pointer will move from ethrnet header to ip header */ -+ pkt->protocol = eth_type_trans(pkt, padapter->pnetdev); -+ pkt->dev = padapter->pnetdev; -+ pkt->ip_summed = CHECKSUM_NONE; /* CONFIG_TCP_CSUM_OFFLOAD_RX */ -+#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX -+ if ((rframe->u.hdr.attrib.csum_valid == 1) -+ && (rframe->u.hdr.attrib.csum_err == 0)) -+ pkt->ip_summed = CHECKSUM_UNNECESSARY; -+#endif /* CONFIG_TCP_CSUM_OFFLOAD_RX */ -+ -+#ifdef CONFIG_RTW_NAPI -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+ if (!skb_queue_empty(&precvpriv->rx_napi_skb_queue) -+ && !adapter_to_dvobj(padapter)->en_napi_dynamic -+ ) -+ napi_recv(padapter, RTL_NAPI_WEIGHT); -+#endif -+ -+ if (pregistrypriv->en_napi -+ #ifdef CONFIG_RTW_NAPI_DYNAMIC -+ && adapter_to_dvobj(padapter)->en_napi_dynamic -+ #endif -+ ) { -+ skb_queue_tail(&precvpriv->rx_napi_skb_queue, pkt); -+ #ifndef CONFIG_RTW_NAPI_V2 -+ napi_schedule(&padapter->napi); -+ #endif -+ return; -+ } -+#endif /* CONFIG_RTW_NAPI */ -+ -+ ret = rtw_netif_rx(padapter->pnetdev, pkt); -+ if (ret == NET_RX_SUCCESS) -+ DBG_COUNTER(padapter->rx_logs.os_netif_ok); -+ else -+ DBG_COUNTER(padapter->rx_logs.os_netif_err); -+ } -+} -+ -+void rtw_handle_tkip_mic_err(_adapter *padapter, struct sta_info *sta, u8 bgroup) -+{ -+#ifdef CONFIG_IOCTL_CFG80211 -+ enum nl80211_key_type key_type = 0; -+#endif -+ union iwreq_data wrqu; -+ struct iw_michaelmicfailure ev; -+ struct security_priv *psecuritypriv = &padapter->securitypriv; -+ systime cur_time = 0; -+ -+ if (psecuritypriv->last_mic_err_time == 0) -+ psecuritypriv->last_mic_err_time = rtw_get_current_time(); -+ else { -+ cur_time = rtw_get_current_time(); -+ -+ if (cur_time - psecuritypriv->last_mic_err_time < 60 * HZ) { -+ psecuritypriv->btkip_countermeasure = _TRUE; -+ psecuritypriv->last_mic_err_time = 0; -+ psecuritypriv->btkip_countermeasure_time = cur_time; -+ } else -+ psecuritypriv->last_mic_err_time = rtw_get_current_time(); -+ } -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ if (bgroup) -+ key_type |= NL80211_KEYTYPE_GROUP; -+ else -+ key_type |= NL80211_KEYTYPE_PAIRWISE; -+ -+ cfg80211_michael_mic_failure(padapter->pnetdev, sta->cmn.mac_addr, key_type, -1, NULL, GFP_ATOMIC); -+#endif -+ -+ _rtw_memset(&ev, 0x00, sizeof(ev)); -+ if (bgroup) -+ ev.flags |= IW_MICFAILURE_GROUP; -+ else -+ ev.flags |= IW_MICFAILURE_PAIRWISE; -+ -+ ev.src_addr.sa_family = ARPHRD_ETHER; -+ _rtw_memcpy(ev.src_addr.sa_data, sta->cmn.mac_addr, ETH_ALEN); -+ -+ _rtw_memset(&wrqu, 0x00, sizeof(wrqu)); -+ wrqu.data.length = sizeof(ev); -+ -+#ifndef CONFIG_IOCTL_CFG80211 -+ wireless_send_event(padapter->pnetdev, IWEVMICHAELMICFAILURE, &wrqu, (char *) &ev); -+#endif -+} -+ -+#ifdef CONFIG_HOSTAPD_MLME -+void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ _pkt *skb; -+ struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; -+ struct net_device *pmgnt_netdev = phostapdpriv->pmgnt_netdev; -+ -+ -+ skb = precv_frame->u.hdr.pkt; -+ -+ if (skb == NULL) -+ return; -+ -+ skb->data = precv_frame->u.hdr.rx_data; -+ skb->tail = precv_frame->u.hdr.rx_tail; -+ skb->len = precv_frame->u.hdr.len; -+ -+ /* pskb_copy = rtw_skb_copy(skb); -+ * if(skb == NULL) goto _exit; */ -+ -+ skb->dev = pmgnt_netdev; -+ skb->ip_summed = CHECKSUM_NONE; -+ skb->pkt_type = PACKET_OTHERHOST; -+ /* skb->protocol = __constant_htons(0x0019); ETH_P_80211_RAW */ -+ skb->protocol = __constant_htons(0x0003); /*ETH_P_80211_RAW*/ -+ -+ /* RTW_INFO("(1)data=0x%x, head=0x%x, tail=0x%x, mac_header=0x%x, len=%d\n", skb->data, skb->head, skb->tail, skb->mac_header, skb->len); */ -+ -+ /* skb->mac.raw = skb->data; */ -+ skb_reset_mac_header(skb); -+ -+ /* skb_pull(skb, 24); */ -+ _rtw_memset(skb->cb, 0, sizeof(skb->cb)); -+ -+ rtw_netif_rx(pmgnt_netdev, skb); -+ -+ precv_frame->u.hdr.pkt = NULL; /* set pointer to NULL before rtw_free_recvframe() if call rtw_netif_rx() */ -+} -+#endif /* CONFIG_HOSTAPD_MLME */ -+ -+#ifdef CONFIG_WIFI_MONITOR -+/* -+ precv_frame: impossible to be NULL -+ precv_frame: free by caller -+ */ -+int rtw_recv_monitor(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ int ret = _FAIL; -+ _pkt *skb; -+ -+ skb = precv_frame->u.hdr.pkt; -+ if (skb == NULL) { -+ RTW_INFO("%s :skb==NULL something wrong!!!!\n", __func__); -+ goto _recv_drop; -+ } -+ -+ skb->data = precv_frame->u.hdr.rx_data; -+ skb_set_tail_pointer(skb, precv_frame->u.hdr.len); -+ skb->len = precv_frame->u.hdr.len; -+ skb->ip_summed = CHECKSUM_NONE; -+ skb->pkt_type = PACKET_OTHERHOST; -+ skb->protocol = htons(0x0019); /* ETH_P_80211_RAW */ -+ -+ /* send to kernel */ -+ rtw_netif_rx(padapter->pnetdev, skb); -+ -+ /* pointers to NULL before rtw_free_recvframe() */ -+ precv_frame->u.hdr.pkt = NULL; -+ -+ ret = _SUCCESS; -+ -+_recv_drop: -+ return ret; -+} -+#endif /* CONFIG_WIFI_MONITOR */ -+ -+inline void rtw_rframe_set_os_pkt(union recv_frame *rframe) -+{ -+ _pkt *skb = rframe->u.hdr.pkt; -+ -+ skb->data = rframe->u.hdr.rx_data; -+ skb_set_tail_pointer(skb, rframe->u.hdr.len); -+ skb->len = rframe->u.hdr.len; -+} -+ -+int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame) -+{ -+ struct recv_priv *precvpriv; -+ _queue *pfree_recv_queue; -+ -+ precvpriv = &(padapter->recvpriv); -+ pfree_recv_queue = &(precvpriv->free_recv_queue); -+ -+ if (precv_frame->u.hdr.pkt == NULL) -+ goto _recv_indicatepkt_drop; -+ -+ rtw_os_recv_indicate_pkt(padapter, precv_frame->u.hdr.pkt, precv_frame); -+ -+ precv_frame->u.hdr.pkt = NULL; -+ rtw_free_recvframe(precv_frame, pfree_recv_queue); -+ return _SUCCESS; -+ -+_recv_indicatepkt_drop: -+ rtw_free_recvframe(precv_frame, pfree_recv_queue); -+ DBG_COUNTER(padapter->rx_logs.os_indicate_err); -+ return _FAIL; -+} -+ -+void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf) -+{ -+#ifdef CONFIG_USB_HCI -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ -+ precvbuf->ref_cnt--; -+ -+ /* free skb in recv_buf */ -+ rtw_skb_free(precvbuf->pskb); -+ -+ precvbuf->pskb = NULL; -+ -+ if (precvbuf->irp_pending == _FALSE) -+ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); -+ -+ -+#endif -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ precvbuf->pskb = NULL; -+#endif -+ -+} -+ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/rhashtable.c b/drivers/staging/rtl8723cs/os_dep/linux/rhashtable.c -new file mode 100644 -index 000000000000..0163a4b07ec1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/rhashtable.c -@@ -0,0 +1,844 @@ -+/* -+ * Resizable, Scalable, Concurrent Hash Table -+ * -+ * Copyright (c) 2015 Herbert Xu -+ * Copyright (c) 2014-2015 Thomas Graf -+ * Copyright (c) 2008-2014 Patrick McHardy -+ * -+ * Code partially derived from nft_hash -+ * Rewritten with rehash code from br_multicast plus single list -+ * pointer as suggested by Josh Triplett -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define HASH_DEFAULT_SIZE 64UL -+#define HASH_MIN_SIZE 4U -+#define BUCKET_LOCKS_PER_CPU 128UL -+ -+static u32 head_hashfn(struct rhashtable *ht, -+ const struct bucket_table *tbl, -+ const struct rhash_head *he) -+{ -+ return rht_head_hashfn(ht, tbl, he, ht->p); -+} -+ -+#ifdef CONFIG_PROVE_LOCKING -+#define ASSERT_RHT_MUTEX(HT) BUG_ON(!lockdep_rht_mutex_is_held(HT)) -+ -+int lockdep_rht_mutex_is_held(struct rhashtable *ht) -+{ -+ return (debug_locks) ? lockdep_is_held(&ht->mutex) : 1; -+} -+ -+int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, u32 hash) -+{ -+ spinlock_t *lock = rht_bucket_lock(tbl, hash); -+ -+ return (debug_locks) ? lockdep_is_held(lock) : 1; -+} -+#else -+#define ASSERT_RHT_MUTEX(HT) -+#endif -+ -+ -+static int alloc_bucket_locks(struct rhashtable *ht, struct bucket_table *tbl, -+ gfp_t gfp) -+{ -+ unsigned int i, size; -+#if defined(CONFIG_PROVE_LOCKING) -+ unsigned int nr_pcpus = 2; -+#else -+ unsigned int nr_pcpus = num_possible_cpus(); -+#endif -+ -+ nr_pcpus = min_t(unsigned int, nr_pcpus, 32UL); -+ size = roundup_pow_of_two(nr_pcpus * ht->p.locks_mul); -+ -+ /* Never allocate more than 0.5 locks per bucket */ -+ size = min_t(unsigned int, size, tbl->size >> 1); -+ -+ if (sizeof(spinlock_t) != 0) { -+#ifdef CONFIG_NUMA -+ if (size * sizeof(spinlock_t) > PAGE_SIZE && -+ gfp == GFP_KERNEL) -+ tbl->locks = vmalloc(size * sizeof(spinlock_t)); -+ else -+#endif -+ tbl->locks = kmalloc_array(size, sizeof(spinlock_t), -+ gfp); -+ if (!tbl->locks) -+ return -ENOMEM; -+ for (i = 0; i < size; i++) -+ spin_lock_init(&tbl->locks[i]); -+ } -+ tbl->locks_mask = size - 1; -+ -+ return 0; -+} -+ -+static void bucket_table_free(const struct bucket_table *tbl) -+{ -+ if (tbl) -+ kvfree(tbl->locks); -+ -+ kvfree(tbl); -+} -+ -+static void bucket_table_free_rcu(struct rcu_head *head) -+{ -+ bucket_table_free(container_of(head, struct bucket_table, rcu)); -+} -+ -+static struct bucket_table *bucket_table_alloc(struct rhashtable *ht, -+ size_t nbuckets, -+ gfp_t gfp) -+{ -+ struct bucket_table *tbl = NULL; -+ size_t size; -+ int i; -+ -+ size = sizeof(*tbl) + nbuckets * sizeof(tbl->buckets[0]); -+ if (size <= (PAGE_SIZE << PAGE_ALLOC_COSTLY_ORDER) || -+ gfp != GFP_KERNEL) -+ tbl = kzalloc(size, gfp | __GFP_NOWARN | __GFP_NORETRY); -+ if (tbl == NULL && gfp == GFP_KERNEL) -+ tbl = vzalloc(size); -+ if (tbl == NULL) -+ return NULL; -+ -+ tbl->size = nbuckets; -+ -+ if (alloc_bucket_locks(ht, tbl, gfp) < 0) { -+ bucket_table_free(tbl); -+ return NULL; -+ } -+ -+ INIT_LIST_HEAD(&tbl->walkers); -+ -+ get_random_bytes(&tbl->hash_rnd, sizeof(tbl->hash_rnd)); -+ -+ for (i = 0; i < nbuckets; i++) -+ INIT_RHT_NULLS_HEAD(tbl->buckets[i], ht, i); -+ -+ return tbl; -+} -+ -+static struct bucket_table *rhashtable_last_table(struct rhashtable *ht, -+ struct bucket_table *tbl) -+{ -+ struct bucket_table *new_tbl; -+ -+ do { -+ new_tbl = tbl; -+ tbl = rht_dereference_rcu(tbl->future_tbl, ht); -+ } while (tbl); -+ -+ return new_tbl; -+} -+ -+static int rhashtable_rehash_one(struct rhashtable *ht, unsigned int old_hash) -+{ -+ struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht); -+ struct bucket_table *new_tbl = rhashtable_last_table(ht, -+ rht_dereference_rcu(old_tbl->future_tbl, ht)); -+ struct rhash_head __rcu **pprev = &old_tbl->buckets[old_hash]; -+ int err = -ENOENT; -+ struct rhash_head *head, *next, *entry; -+ spinlock_t *new_bucket_lock; -+ unsigned int new_hash; -+ -+ rht_for_each(entry, old_tbl, old_hash) { -+ err = 0; -+ next = rht_dereference_bucket(entry->next, old_tbl, old_hash); -+ -+ if (rht_is_a_nulls(next)) -+ break; -+ -+ pprev = &entry->next; -+ } -+ -+ if (err) -+ goto out; -+ -+ new_hash = head_hashfn(ht, new_tbl, entry); -+ -+ new_bucket_lock = rht_bucket_lock(new_tbl, new_hash); -+ -+ spin_lock_nested(new_bucket_lock, SINGLE_DEPTH_NESTING); -+ head = rht_dereference_bucket(new_tbl->buckets[new_hash], -+ new_tbl, new_hash); -+ -+ RCU_INIT_POINTER(entry->next, head); -+ -+ rcu_assign_pointer(new_tbl->buckets[new_hash], entry); -+ spin_unlock(new_bucket_lock); -+ -+ rcu_assign_pointer(*pprev, next); -+ -+out: -+ return err; -+} -+ -+static void rhashtable_rehash_chain(struct rhashtable *ht, -+ unsigned int old_hash) -+{ -+ struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht); -+ spinlock_t *old_bucket_lock; -+ -+ old_bucket_lock = rht_bucket_lock(old_tbl, old_hash); -+ -+ spin_lock_bh(old_bucket_lock); -+ while (!rhashtable_rehash_one(ht, old_hash)) -+ ; -+ old_tbl->rehash++; -+ spin_unlock_bh(old_bucket_lock); -+} -+ -+static int rhashtable_rehash_attach(struct rhashtable *ht, -+ struct bucket_table *old_tbl, -+ struct bucket_table *new_tbl) -+{ -+ /* Protect future_tbl using the first bucket lock. */ -+ spin_lock_bh(old_tbl->locks); -+ -+ /* Did somebody beat us to it? */ -+ if (rcu_access_pointer(old_tbl->future_tbl)) { -+ spin_unlock_bh(old_tbl->locks); -+ return -EEXIST; -+ } -+ -+ /* Make insertions go into the new, empty table right away. Deletions -+ * and lookups will be attempted in both tables until we synchronize. -+ */ -+ rcu_assign_pointer(old_tbl->future_tbl, new_tbl); -+ -+ /* Ensure the new table is visible to readers. */ -+ smp_wmb(); -+ -+ spin_unlock_bh(old_tbl->locks); -+ -+ return 0; -+} -+ -+static int rhashtable_rehash_table(struct rhashtable *ht) -+{ -+ struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht); -+ struct bucket_table *new_tbl; -+ struct rhashtable_walker *walker; -+ unsigned int old_hash; -+ -+ new_tbl = rht_dereference(old_tbl->future_tbl, ht); -+ if (!new_tbl) -+ return 0; -+ -+ for (old_hash = 0; old_hash < old_tbl->size; old_hash++) -+ rhashtable_rehash_chain(ht, old_hash); -+ -+ /* Publish the new table pointer. */ -+ rcu_assign_pointer(ht->tbl, new_tbl); -+ -+ spin_lock(&ht->lock); -+ list_for_each_entry(walker, &old_tbl->walkers, list) -+ walker->tbl = NULL; -+ spin_unlock(&ht->lock); -+ -+ /* Wait for readers. All new readers will see the new -+ * table, and thus no references to the old table will -+ * remain. -+ */ -+ call_rcu(&old_tbl->rcu, bucket_table_free_rcu); -+ -+ return rht_dereference(new_tbl->future_tbl, ht) ? -EAGAIN : 0; -+} -+ -+/** -+ * rhashtable_expand - Expand hash table while allowing concurrent lookups -+ * @ht: the hash table to expand -+ * -+ * A secondary bucket array is allocated and the hash entries are migrated. -+ * -+ * This function may only be called in a context where it is safe to call -+ * synchronize_rcu(), e.g. not within a rcu_read_lock() section. -+ * -+ * The caller must ensure that no concurrent resizing occurs by holding -+ * ht->mutex. -+ * -+ * It is valid to have concurrent insertions and deletions protected by per -+ * bucket locks or concurrent RCU protected lookups and traversals. -+ */ -+static int rhashtable_expand(struct rhashtable *ht) -+{ -+ struct bucket_table *new_tbl, *old_tbl = rht_dereference(ht->tbl, ht); -+ int err; -+ -+ ASSERT_RHT_MUTEX(ht); -+ -+ old_tbl = rhashtable_last_table(ht, old_tbl); -+ -+ new_tbl = bucket_table_alloc(ht, old_tbl->size * 2, GFP_KERNEL); -+ if (new_tbl == NULL) -+ return -ENOMEM; -+ -+ err = rhashtable_rehash_attach(ht, old_tbl, new_tbl); -+ if (err) -+ bucket_table_free(new_tbl); -+ -+ return err; -+} -+ -+/** -+ * rhashtable_shrink - Shrink hash table while allowing concurrent lookups -+ * @ht: the hash table to shrink -+ * -+ * This function shrinks the hash table to fit, i.e., the smallest -+ * size would not cause it to expand right away automatically. -+ * -+ * The caller must ensure that no concurrent resizing occurs by holding -+ * ht->mutex. -+ * -+ * The caller must ensure that no concurrent table mutations take place. -+ * It is however valid to have concurrent lookups if they are RCU protected. -+ * -+ * It is valid to have concurrent insertions and deletions protected by per -+ * bucket locks or concurrent RCU protected lookups and traversals. -+ */ -+static int rhashtable_shrink(struct rhashtable *ht) -+{ -+ struct bucket_table *new_tbl, *old_tbl = rht_dereference(ht->tbl, ht); -+ unsigned int size; -+ int err; -+ -+ ASSERT_RHT_MUTEX(ht); -+ -+ size = roundup_pow_of_two(atomic_read(&ht->nelems) * 3 / 2); -+ if (size < ht->p.min_size) -+ size = ht->p.min_size; -+ -+ if (old_tbl->size <= size) -+ return 0; -+ -+ if (rht_dereference(old_tbl->future_tbl, ht)) -+ return -EEXIST; -+ -+ new_tbl = bucket_table_alloc(ht, size, GFP_KERNEL); -+ if (new_tbl == NULL) -+ return -ENOMEM; -+ -+ err = rhashtable_rehash_attach(ht, old_tbl, new_tbl); -+ if (err) -+ bucket_table_free(new_tbl); -+ -+ return err; -+} -+ -+static void rht_deferred_worker(struct work_struct *work) -+{ -+ struct rhashtable *ht; -+ struct bucket_table *tbl; -+ int err = 0; -+ -+ ht = container_of(work, struct rhashtable, run_work); -+ mutex_lock(&ht->mutex); -+ -+ tbl = rht_dereference(ht->tbl, ht); -+ tbl = rhashtable_last_table(ht, tbl); -+ -+ if (rht_grow_above_75(ht, tbl)) -+ rhashtable_expand(ht); -+ else if (ht->p.automatic_shrinking && rht_shrink_below_30(ht, tbl)) -+ rhashtable_shrink(ht); -+ -+ err = rhashtable_rehash_table(ht); -+ -+ mutex_unlock(&ht->mutex); -+ -+ if (err) -+ schedule_work(&ht->run_work); -+} -+ -+static bool rhashtable_check_elasticity(struct rhashtable *ht, -+ struct bucket_table *tbl, -+ unsigned int hash) -+{ -+ unsigned int elasticity = ht->elasticity; -+ struct rhash_head *head; -+ -+ rht_for_each(head, tbl, hash) -+ if (!--elasticity) -+ return true; -+ -+ return false; -+} -+ -+int rhashtable_insert_rehash(struct rhashtable *ht, -+ struct bucket_table *tbl) -+{ -+ struct bucket_table *old_tbl; -+ struct bucket_table *new_tbl; -+ unsigned int size; -+ int err; -+ -+ old_tbl = rht_dereference_rcu(ht->tbl, ht); -+ -+ size = tbl->size; -+ -+ err = -EBUSY; -+ -+ if (rht_grow_above_75(ht, tbl)) -+ size *= 2; -+ /* Do not schedule more than one rehash */ -+ else if (old_tbl != tbl) -+ goto fail; -+ -+ err = -ENOMEM; -+ -+ new_tbl = bucket_table_alloc(ht, size, GFP_ATOMIC); -+ if (new_tbl == NULL) -+ goto fail; -+ -+ err = rhashtable_rehash_attach(ht, tbl, new_tbl); -+ if (err) { -+ bucket_table_free(new_tbl); -+ if (err == -EEXIST) -+ err = 0; -+ } else -+ schedule_work(&ht->run_work); -+ -+ return err; -+ -+fail: -+ /* Do not fail the insert if someone else did a rehash. */ -+ if (likely(rcu_dereference_raw(tbl->future_tbl))) -+ return 0; -+ -+ /* Schedule async rehash to retry allocation in process context. */ -+ if (err == -ENOMEM) -+ schedule_work(&ht->run_work); -+ -+ return err; -+} -+ -+struct bucket_table *rhashtable_insert_slow(struct rhashtable *ht, -+ const void *key, -+ struct rhash_head *obj, -+ struct bucket_table *tbl) -+{ -+ struct rhash_head *head; -+ unsigned int hash; -+ int err; -+ -+ tbl = rhashtable_last_table(ht, tbl); -+ hash = head_hashfn(ht, tbl, obj); -+ spin_lock_nested(rht_bucket_lock(tbl, hash), SINGLE_DEPTH_NESTING); -+ -+ err = -EEXIST; -+ if (key && rhashtable_lookup_fast(ht, key, ht->p)) -+ goto exit; -+ -+ err = -E2BIG; -+ if (unlikely(rht_grow_above_max(ht, tbl))) -+ goto exit; -+ -+ err = -EAGAIN; -+ if (rhashtable_check_elasticity(ht, tbl, hash) || -+ rht_grow_above_100(ht, tbl)) -+ goto exit; -+ -+ err = 0; -+ -+ head = rht_dereference_bucket(tbl->buckets[hash], tbl, hash); -+ -+ RCU_INIT_POINTER(obj->next, head); -+ -+ rcu_assign_pointer(tbl->buckets[hash], obj); -+ -+ atomic_inc(&ht->nelems); -+ -+exit: -+ spin_unlock(rht_bucket_lock(tbl, hash)); -+ -+ if (err == 0) -+ return NULL; -+ else if (err == -EAGAIN) -+ return tbl; -+ else -+ return ERR_PTR(err); -+} -+ -+/** -+ * rhashtable_walk_init - Initialise an iterator -+ * @ht: Table to walk over -+ * @iter: Hash table Iterator -+ * -+ * This function prepares a hash table walk. -+ * -+ * Note that if you restart a walk after rhashtable_walk_stop you -+ * may see the same object twice. Also, you may miss objects if -+ * there are removals in between rhashtable_walk_stop and the next -+ * call to rhashtable_walk_start. -+ * -+ * For a completely stable walk you should construct your own data -+ * structure outside the hash table. -+ * -+ * This function may sleep so you must not call it from interrupt -+ * context or with spin locks held. -+ * -+ * You must call rhashtable_walk_exit if this function returns -+ * successfully. -+ */ -+int rhashtable_walk_init(struct rhashtable *ht, struct rhashtable_iter *iter) -+{ -+ iter->ht = ht; -+ iter->p = NULL; -+ iter->slot = 0; -+ iter->skip = 0; -+ -+ iter->walker = kmalloc(sizeof(*iter->walker), GFP_KERNEL); -+ if (!iter->walker) -+ return -ENOMEM; -+ -+ spin_lock(&ht->lock); -+ iter->walker->tbl = -+ rcu_dereference_protected(ht->tbl, lockdep_is_held(&ht->lock)); -+ list_add(&iter->walker->list, &iter->walker->tbl->walkers); -+ spin_unlock(&ht->lock); -+ -+ return 0; -+} -+ -+/** -+ * rhashtable_walk_exit - Free an iterator -+ * @iter: Hash table Iterator -+ * -+ * This function frees resources allocated by rhashtable_walk_init. -+ */ -+void rhashtable_walk_exit(struct rhashtable_iter *iter) -+{ -+ spin_lock(&iter->ht->lock); -+ if (iter->walker->tbl) -+ list_del(&iter->walker->list); -+ spin_unlock(&iter->ht->lock); -+ kfree(iter->walker); -+} -+ -+/** -+ * rhashtable_walk_start - Start a hash table walk -+ * @iter: Hash table iterator -+ * -+ * Start a hash table walk. Note that we take the RCU lock in all -+ * cases including when we return an error. So you must always call -+ * rhashtable_walk_stop to clean up. -+ * -+ * Returns zero if successful. -+ * -+ * Returns -EAGAIN if resize event occured. Note that the iterator -+ * will rewind back to the beginning and you may use it immediately -+ * by calling rhashtable_walk_next. -+ */ -+int rhashtable_walk_start(struct rhashtable_iter *iter) -+ __acquires(RCU) -+{ -+ struct rhashtable *ht = iter->ht; -+ -+ rcu_read_lock(); -+ -+ spin_lock(&ht->lock); -+ if (iter->walker->tbl) -+ list_del(&iter->walker->list); -+ spin_unlock(&ht->lock); -+ -+ if (!iter->walker->tbl) { -+ iter->walker->tbl = rht_dereference_rcu(ht->tbl, ht); -+ return -EAGAIN; -+ } -+ -+ return 0; -+} -+ -+/** -+ * rhashtable_walk_next - Return the next object and advance the iterator -+ * @iter: Hash table iterator -+ * -+ * Note that you must call rhashtable_walk_stop when you are finished -+ * with the walk. -+ * -+ * Returns the next object or NULL when the end of the table is reached. -+ * -+ * Returns -EAGAIN if resize event occured. Note that the iterator -+ * will rewind back to the beginning and you may continue to use it. -+ */ -+void *rhashtable_walk_next(struct rhashtable_iter *iter) -+{ -+ struct bucket_table *tbl = iter->walker->tbl; -+ struct rhashtable *ht = iter->ht; -+ struct rhash_head *p = iter->p; -+ -+ if (p) { -+ p = rht_dereference_bucket_rcu(p->next, tbl, iter->slot); -+ goto next; -+ } -+ -+ for (; iter->slot < tbl->size; iter->slot++) { -+ int skip = iter->skip; -+ -+ rht_for_each_rcu(p, tbl, iter->slot) { -+ if (!skip) -+ break; -+ skip--; -+ } -+ -+next: -+ if (!rht_is_a_nulls(p)) { -+ iter->skip++; -+ iter->p = p; -+ return rht_obj(ht, p); -+ } -+ -+ iter->skip = 0; -+ } -+ -+ iter->p = NULL; -+ -+ /* Ensure we see any new tables. */ -+ smp_rmb(); -+ -+ iter->walker->tbl = rht_dereference_rcu(tbl->future_tbl, ht); -+ if (iter->walker->tbl) { -+ iter->slot = 0; -+ iter->skip = 0; -+ return ERR_PTR(-EAGAIN); -+ } -+ -+ return NULL; -+} -+ -+/** -+ * rhashtable_walk_stop - Finish a hash table walk -+ * @iter: Hash table iterator -+ * -+ * Finish a hash table walk. -+ */ -+void rhashtable_walk_stop(struct rhashtable_iter *iter) -+ __releases(RCU) -+{ -+ struct rhashtable *ht; -+ struct bucket_table *tbl = iter->walker->tbl; -+ -+ if (!tbl) -+ goto out; -+ -+ ht = iter->ht; -+ -+ spin_lock(&ht->lock); -+ if (tbl->rehash < tbl->size) -+ list_add(&iter->walker->list, &tbl->walkers); -+ else -+ iter->walker->tbl = NULL; -+ spin_unlock(&ht->lock); -+ -+ iter->p = NULL; -+ -+out: -+ rcu_read_unlock(); -+} -+ -+static size_t rounded_hashtable_size(const struct rhashtable_params *params) -+{ -+ return max(roundup_pow_of_two(params->nelem_hint * 4 / 3), -+ (unsigned long)params->min_size); -+} -+ -+static u32 rhashtable_jhash2(const void *key, u32 length, u32 seed) -+{ -+ return jhash2(key, length, seed); -+} -+ -+/** -+ * rhashtable_init - initialize a new hash table -+ * @ht: hash table to be initialized -+ * @params: configuration parameters -+ * -+ * Initializes a new hash table based on the provided configuration -+ * parameters. A table can be configured either with a variable or -+ * fixed length key: -+ * -+ * Configuration Example 1: Fixed length keys -+ * struct test_obj { -+ * int key; -+ * void * my_member; -+ * struct rhash_head node; -+ * }; -+ * -+ * struct rhashtable_params params = { -+ * .head_offset = offsetof(struct test_obj, node), -+ * .key_offset = offsetof(struct test_obj, key), -+ * .key_len = sizeof(int), -+ * .hashfn = jhash, -+ * .nulls_base = (1U << RHT_BASE_SHIFT), -+ * }; -+ * -+ * Configuration Example 2: Variable length keys -+ * struct test_obj { -+ * [...] -+ * struct rhash_head node; -+ * }; -+ * -+ * u32 my_hash_fn(const void *data, u32 len, u32 seed) -+ * { -+ * struct test_obj *obj = data; -+ * -+ * return [... hash ...]; -+ * } -+ * -+ * struct rhashtable_params params = { -+ * .head_offset = offsetof(struct test_obj, node), -+ * .hashfn = jhash, -+ * .obj_hashfn = my_hash_fn, -+ * }; -+ */ -+int rhashtable_init(struct rhashtable *ht, -+ const struct rhashtable_params *params) -+{ -+ struct bucket_table *tbl; -+ size_t size; -+ -+ size = HASH_DEFAULT_SIZE; -+ -+ if ((!params->key_len && !params->obj_hashfn) || -+ (params->obj_hashfn && !params->obj_cmpfn)) -+ return -EINVAL; -+ -+ if (params->nulls_base && params->nulls_base < (1U << RHT_BASE_SHIFT)) -+ return -EINVAL; -+ -+ memset(ht, 0, sizeof(*ht)); -+ mutex_init(&ht->mutex); -+ spin_lock_init(&ht->lock); -+ memcpy(&ht->p, params, sizeof(*params)); -+ -+ if (params->min_size) -+ ht->p.min_size = roundup_pow_of_two(params->min_size); -+ -+ if (params->max_size) -+ ht->p.max_size = rounddown_pow_of_two(params->max_size); -+ -+ if (params->insecure_max_entries) -+ ht->p.insecure_max_entries = -+ rounddown_pow_of_two(params->insecure_max_entries); -+ else -+ ht->p.insecure_max_entries = ht->p.max_size * 2; -+ -+ ht->p.min_size = max(ht->p.min_size, HASH_MIN_SIZE); -+ -+ if (params->nelem_hint) -+ size = rounded_hashtable_size(&ht->p); -+ -+ /* The maximum (not average) chain length grows with the -+ * size of the hash table, at a rate of (log N)/(log log N). -+ * The value of 16 is selected so that even if the hash -+ * table grew to 2^32 you would not expect the maximum -+ * chain length to exceed it unless we are under attack -+ * (or extremely unlucky). -+ * -+ * As this limit is only to detect attacks, we don't need -+ * to set it to a lower value as you'd need the chain -+ * length to vastly exceed 16 to have any real effect -+ * on the system. -+ */ -+ if (!params->insecure_elasticity) -+ ht->elasticity = 16; -+ -+ if (params->locks_mul) -+ ht->p.locks_mul = roundup_pow_of_two(params->locks_mul); -+ else -+ ht->p.locks_mul = BUCKET_LOCKS_PER_CPU; -+ -+ ht->key_len = ht->p.key_len; -+ if (!params->hashfn) { -+ ht->p.hashfn = jhash; -+ -+ if (!(ht->key_len & (sizeof(u32) - 1))) { -+ ht->key_len /= sizeof(u32); -+ ht->p.hashfn = rhashtable_jhash2; -+ } -+ } -+ -+ tbl = bucket_table_alloc(ht, size, GFP_KERNEL); -+ if (tbl == NULL) -+ return -ENOMEM; -+ -+ atomic_set(&ht->nelems, 0); -+ -+ RCU_INIT_POINTER(ht->tbl, tbl); -+ -+ INIT_WORK(&ht->run_work, rht_deferred_worker); -+ -+ return 0; -+} -+ -+/** -+ * rhashtable_free_and_destroy - free elements and destroy hash table -+ * @ht: the hash table to destroy -+ * @free_fn: callback to release resources of element -+ * @arg: pointer passed to free_fn -+ * -+ * Stops an eventual async resize. If defined, invokes free_fn for each -+ * element to releasal resources. Please note that RCU protected -+ * readers may still be accessing the elements. Releasing of resources -+ * must occur in a compatible manner. Then frees the bucket array. -+ * -+ * This function will eventually sleep to wait for an async resize -+ * to complete. The caller is responsible that no further write operations -+ * occurs in parallel. -+ */ -+void rhashtable_free_and_destroy(struct rhashtable *ht, -+ void (*free_fn)(void *ptr, void *arg), -+ void *arg) -+{ -+ const struct bucket_table *tbl; -+ unsigned int i; -+ -+ cancel_work_sync(&ht->run_work); -+ -+ mutex_lock(&ht->mutex); -+ tbl = rht_dereference(ht->tbl, ht); -+ if (free_fn) { -+ for (i = 0; i < tbl->size; i++) { -+ struct rhash_head *pos, *next; -+ -+ for (pos = rht_dereference(tbl->buckets[i], ht), -+ next = !rht_is_a_nulls(pos) ? -+ rht_dereference(pos->next, ht) : NULL; -+ !rht_is_a_nulls(pos); -+ pos = next, -+ next = !rht_is_a_nulls(pos) ? -+ rht_dereference(pos->next, ht) : NULL) -+ free_fn(rht_obj(ht, pos), arg); -+ } -+ } -+ -+ bucket_table_free(tbl); -+ mutex_unlock(&ht->mutex); -+} -+ -+void rhashtable_destroy(struct rhashtable *ht) -+{ -+ return rhashtable_free_and_destroy(ht, NULL, NULL); -+} -+ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/rhashtable.h b/drivers/staging/rtl8723cs/os_dep/linux/rhashtable.h -new file mode 100644 -index 000000000000..b47107ff619f ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/rhashtable.h -@@ -0,0 +1,827 @@ -+/* -+ * Resizable, Scalable, Concurrent Hash Table -+ * -+ * Copyright (c) 2015 Herbert Xu -+ * Copyright (c) 2014-2015 Thomas Graf -+ * Copyright (c) 2008-2014 Patrick McHardy -+ * -+ * Code partially derived from nft_hash -+ * Rewritten with rehash code from br_multicast plus single list -+ * pointer as suggested by Josh Triplett -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef _LINUX_RHASHTABLE_H -+#define _LINUX_RHASHTABLE_H -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* -+ * The end of the chain is marked with a special nulls marks which has -+ * the following format: -+ * -+ * +-------+-----------------------------------------------------+-+ -+ * | Base | Hash |1| -+ * +-------+-----------------------------------------------------+-+ -+ * -+ * Base (4 bits) : Reserved to distinguish between multiple tables. -+ * Specified via &struct rhashtable_params.nulls_base. -+ * Hash (27 bits): Full hash (unmasked) of first element added to bucket -+ * 1 (1 bit) : Nulls marker (always set) -+ * -+ * The remaining bits of the next pointer remain unused for now. -+ */ -+#define RHT_BASE_BITS 4 -+#define RHT_HASH_BITS 27 -+#define RHT_BASE_SHIFT RHT_HASH_BITS -+ -+/* Base bits plus 1 bit for nulls marker */ -+#define RHT_HASH_RESERVED_SPACE (RHT_BASE_BITS + 1) -+ -+struct rhash_head { -+ struct rhash_head __rcu *next; -+}; -+ -+/** -+ * struct bucket_table - Table of hash buckets -+ * @size: Number of hash buckets -+ * @rehash: Current bucket being rehashed -+ * @hash_rnd: Random seed to fold into hash -+ * @locks_mask: Mask to apply before accessing locks[] -+ * @locks: Array of spinlocks protecting individual buckets -+ * @walkers: List of active walkers -+ * @rcu: RCU structure for freeing the table -+ * @future_tbl: Table under construction during rehashing -+ * @buckets: size * hash buckets -+ */ -+struct bucket_table { -+ unsigned int size; -+ unsigned int rehash; -+ u32 hash_rnd; -+ unsigned int locks_mask; -+ spinlock_t *locks; -+ struct list_head walkers; -+ struct rcu_head rcu; -+ -+ struct bucket_table __rcu *future_tbl; -+ -+ struct rhash_head __rcu *buckets[] ____cacheline_aligned_in_smp; -+}; -+ -+/** -+ * struct rhashtable_compare_arg - Key for the function rhashtable_compare -+ * @ht: Hash table -+ * @key: Key to compare against -+ */ -+struct rhashtable_compare_arg { -+ struct rhashtable *ht; -+ const void *key; -+}; -+ -+typedef u32 (*rht_hashfn_t)(const void *data, u32 len, u32 seed); -+typedef u32 (*rht_obj_hashfn_t)(const void *data, u32 len, u32 seed); -+typedef int (*rht_obj_cmpfn_t)(struct rhashtable_compare_arg *arg, -+ const void *obj); -+ -+struct rhashtable; -+ -+/** -+ * struct rhashtable_params - Hash table construction parameters -+ * @nelem_hint: Hint on number of elements, should be 75% of desired size -+ * @key_len: Length of key -+ * @key_offset: Offset of key in struct to be hashed -+ * @head_offset: Offset of rhash_head in struct to be hashed -+ * @insecure_max_entries: Maximum number of entries (may be exceeded) -+ * @max_size: Maximum size while expanding -+ * @min_size: Minimum size while shrinking -+ * @nulls_base: Base value to generate nulls marker -+ * @insecure_elasticity: Set to true to disable chain length checks -+ * @automatic_shrinking: Enable automatic shrinking of tables -+ * @locks_mul: Number of bucket locks to allocate per cpu (default: 128) -+ * @hashfn: Hash function (default: jhash2 if !(key_len % 4), or jhash) -+ * @obj_hashfn: Function to hash object -+ * @obj_cmpfn: Function to compare key with object -+ */ -+struct rhashtable_params { -+ size_t nelem_hint; -+ size_t key_len; -+ size_t key_offset; -+ size_t head_offset; -+ unsigned int insecure_max_entries; -+ unsigned int max_size; -+ unsigned int min_size; -+ u32 nulls_base; -+ bool insecure_elasticity; -+ bool automatic_shrinking; -+ size_t locks_mul; -+ rht_hashfn_t hashfn; -+ rht_obj_hashfn_t obj_hashfn; -+ rht_obj_cmpfn_t obj_cmpfn; -+}; -+ -+/** -+ * struct rhashtable - Hash table handle -+ * @tbl: Bucket table -+ * @nelems: Number of elements in table -+ * @key_len: Key length for hashfn -+ * @elasticity: Maximum chain length before rehash -+ * @p: Configuration parameters -+ * @run_work: Deferred worker to expand/shrink asynchronously -+ * @mutex: Mutex to protect current/future table swapping -+ * @lock: Spin lock to protect walker list -+ */ -+struct rhashtable { -+ struct bucket_table __rcu *tbl; -+ atomic_t nelems; -+ unsigned int key_len; -+ unsigned int elasticity; -+ struct rhashtable_params p; -+ struct work_struct run_work; -+ struct mutex mutex; -+ spinlock_t lock; -+}; -+ -+/** -+ * struct rhashtable_walker - Hash table walker -+ * @list: List entry on list of walkers -+ * @tbl: The table that we were walking over -+ */ -+struct rhashtable_walker { -+ struct list_head list; -+ struct bucket_table *tbl; -+}; -+ -+/** -+ * struct rhashtable_iter - Hash table iterator, fits into netlink cb -+ * @ht: Table to iterate through -+ * @p: Current pointer -+ * @walker: Associated rhashtable walker -+ * @slot: Current slot -+ * @skip: Number of entries to skip in slot -+ */ -+struct rhashtable_iter { -+ struct rhashtable *ht; -+ struct rhash_head *p; -+ struct rhashtable_walker *walker; -+ unsigned int slot; -+ unsigned int skip; -+}; -+ -+static inline unsigned long rht_marker(const struct rhashtable *ht, u32 hash) -+{ -+ return NULLS_MARKER(ht->p.nulls_base + hash); -+} -+ -+#define INIT_RHT_NULLS_HEAD(ptr, ht, hash) \ -+ ((ptr) = (typeof(ptr)) rht_marker(ht, hash)) -+ -+static inline bool rht_is_a_nulls(const struct rhash_head *ptr) -+{ -+ return ((unsigned long) ptr & 1); -+} -+ -+static inline unsigned long rht_get_nulls_value(const struct rhash_head *ptr) -+{ -+ return ((unsigned long) ptr) >> 1; -+} -+ -+static inline void *rht_obj(const struct rhashtable *ht, -+ const struct rhash_head *he) -+{ -+ return (char *)he - ht->p.head_offset; -+} -+ -+static inline unsigned int rht_bucket_index(const struct bucket_table *tbl, -+ unsigned int hash) -+{ -+ return (hash >> RHT_HASH_RESERVED_SPACE) & (tbl->size - 1); -+} -+ -+static inline unsigned int rht_key_hashfn( -+ struct rhashtable *ht, const struct bucket_table *tbl, -+ const void *key, const struct rhashtable_params params) -+{ -+ unsigned int hash; -+ -+ /* params must be equal to ht->p if it isn't constant. */ -+ if (!__builtin_constant_p(params.key_len)) -+ hash = ht->p.hashfn(key, ht->key_len, tbl->hash_rnd); -+ else if (params.key_len) { -+ unsigned int key_len = params.key_len; -+ -+ if (params.hashfn) -+ hash = params.hashfn(key, key_len, tbl->hash_rnd); -+ else if (key_len & (sizeof(u32) - 1)) -+ hash = jhash(key, key_len, tbl->hash_rnd); -+ else -+ hash = jhash2(key, key_len / sizeof(u32), -+ tbl->hash_rnd); -+ } else { -+ unsigned int key_len = ht->p.key_len; -+ -+ if (params.hashfn) -+ hash = params.hashfn(key, key_len, tbl->hash_rnd); -+ else -+ hash = jhash(key, key_len, tbl->hash_rnd); -+ } -+ -+ return rht_bucket_index(tbl, hash); -+} -+ -+static inline unsigned int rht_head_hashfn( -+ struct rhashtable *ht, const struct bucket_table *tbl, -+ const struct rhash_head *he, const struct rhashtable_params params) -+{ -+ const char *ptr = rht_obj(ht, he); -+ -+ return likely(params.obj_hashfn) ? -+ rht_bucket_index(tbl, params.obj_hashfn(ptr, params.key_len ?: -+ ht->p.key_len, -+ tbl->hash_rnd)) : -+ rht_key_hashfn(ht, tbl, ptr + params.key_offset, params); -+} -+ -+/** -+ * rht_grow_above_75 - returns true if nelems > 0.75 * table-size -+ * @ht: hash table -+ * @tbl: current table -+ */ -+static inline bool rht_grow_above_75(const struct rhashtable *ht, -+ const struct bucket_table *tbl) -+{ -+ /* Expand table when exceeding 75% load */ -+ return atomic_read(&ht->nelems) > (tbl->size / 4 * 3) && -+ (!ht->p.max_size || tbl->size < ht->p.max_size); -+} -+ -+/** -+ * rht_shrink_below_30 - returns true if nelems < 0.3 * table-size -+ * @ht: hash table -+ * @tbl: current table -+ */ -+static inline bool rht_shrink_below_30(const struct rhashtable *ht, -+ const struct bucket_table *tbl) -+{ -+ /* Shrink table beneath 30% load */ -+ return atomic_read(&ht->nelems) < (tbl->size * 3 / 10) && -+ tbl->size > ht->p.min_size; -+} -+ -+/** -+ * rht_grow_above_100 - returns true if nelems > table-size -+ * @ht: hash table -+ * @tbl: current table -+ */ -+static inline bool rht_grow_above_100(const struct rhashtable *ht, -+ const struct bucket_table *tbl) -+{ -+ return atomic_read(&ht->nelems) > tbl->size && -+ (!ht->p.max_size || tbl->size < ht->p.max_size); -+} -+ -+/** -+ * rht_grow_above_max - returns true if table is above maximum -+ * @ht: hash table -+ * @tbl: current table -+ */ -+static inline bool rht_grow_above_max(const struct rhashtable *ht, -+ const struct bucket_table *tbl) -+{ -+ return ht->p.insecure_max_entries && -+ atomic_read(&ht->nelems) >= ht->p.insecure_max_entries; -+} -+ -+/* The bucket lock is selected based on the hash and protects mutations -+ * on a group of hash buckets. -+ * -+ * A maximum of tbl->size/2 bucket locks is allocated. This ensures that -+ * a single lock always covers both buckets which may both contains -+ * entries which link to the same bucket of the old table during resizing. -+ * This allows to simplify the locking as locking the bucket in both -+ * tables during resize always guarantee protection. -+ * -+ * IMPORTANT: When holding the bucket lock of both the old and new table -+ * during expansions and shrinking, the old bucket lock must always be -+ * acquired first. -+ */ -+static inline spinlock_t *rht_bucket_lock(const struct bucket_table *tbl, -+ unsigned int hash) -+{ -+ return &tbl->locks[hash & tbl->locks_mask]; -+} -+ -+#ifdef CONFIG_PROVE_LOCKING -+int lockdep_rht_mutex_is_held(struct rhashtable *ht); -+int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, u32 hash); -+#else -+static inline int lockdep_rht_mutex_is_held(struct rhashtable *ht) -+{ -+ return 1; -+} -+ -+static inline int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, -+ u32 hash) -+{ -+ return 1; -+} -+#endif /* CONFIG_PROVE_LOCKING */ -+ -+int rhashtable_init(struct rhashtable *ht, -+ const struct rhashtable_params *params); -+ -+struct bucket_table *rhashtable_insert_slow(struct rhashtable *ht, -+ const void *key, -+ struct rhash_head *obj, -+ struct bucket_table *old_tbl); -+int rhashtable_insert_rehash(struct rhashtable *ht, struct bucket_table *tbl); -+ -+int rhashtable_walk_init(struct rhashtable *ht, struct rhashtable_iter *iter); -+void rhashtable_walk_exit(struct rhashtable_iter *iter); -+int rhashtable_walk_start(struct rhashtable_iter *iter) __acquires(RCU); -+void *rhashtable_walk_next(struct rhashtable_iter *iter); -+void rhashtable_walk_stop(struct rhashtable_iter *iter) __releases(RCU); -+ -+void rhashtable_free_and_destroy(struct rhashtable *ht, -+ void (*free_fn)(void *ptr, void *arg), -+ void *arg); -+void rhashtable_destroy(struct rhashtable *ht); -+ -+#define rht_dereference(p, ht) \ -+ rcu_dereference_protected(p, lockdep_rht_mutex_is_held(ht)) -+ -+#define rht_dereference_rcu(p, ht) \ -+ rcu_dereference_check(p, lockdep_rht_mutex_is_held(ht)) -+ -+#define rht_dereference_bucket(p, tbl, hash) \ -+ rcu_dereference_protected(p, lockdep_rht_bucket_is_held(tbl, hash)) -+ -+#define rht_dereference_bucket_rcu(p, tbl, hash) \ -+ rcu_dereference_check(p, lockdep_rht_bucket_is_held(tbl, hash)) -+ -+#define rht_entry(tpos, pos, member) \ -+ ({ tpos = container_of(pos, typeof(*tpos), member); 1; }) -+ -+/** -+ * rht_for_each_continue - continue iterating over hash chain -+ * @pos: the &struct rhash_head to use as a loop cursor. -+ * @head: the previous &struct rhash_head to continue from -+ * @tbl: the &struct bucket_table -+ * @hash: the hash value / bucket index -+ */ -+#define rht_for_each_continue(pos, head, tbl, hash) \ -+ for (pos = rht_dereference_bucket(head, tbl, hash); \ -+ !rht_is_a_nulls(pos); \ -+ pos = rht_dereference_bucket((pos)->next, tbl, hash)) -+ -+/** -+ * rht_for_each - iterate over hash chain -+ * @pos: the &struct rhash_head to use as a loop cursor. -+ * @tbl: the &struct bucket_table -+ * @hash: the hash value / bucket index -+ */ -+#define rht_for_each(pos, tbl, hash) \ -+ rht_for_each_continue(pos, (tbl)->buckets[hash], tbl, hash) -+ -+/** -+ * rht_for_each_entry_continue - continue iterating over hash chain -+ * @tpos: the type * to use as a loop cursor. -+ * @pos: the &struct rhash_head to use as a loop cursor. -+ * @head: the previous &struct rhash_head to continue from -+ * @tbl: the &struct bucket_table -+ * @hash: the hash value / bucket index -+ * @member: name of the &struct rhash_head within the hashable struct. -+ */ -+#define rht_for_each_entry_continue(tpos, pos, head, tbl, hash, member) \ -+ for (pos = rht_dereference_bucket(head, tbl, hash); \ -+ (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ -+ pos = rht_dereference_bucket((pos)->next, tbl, hash)) -+ -+/** -+ * rht_for_each_entry - iterate over hash chain of given type -+ * @tpos: the type * to use as a loop cursor. -+ * @pos: the &struct rhash_head to use as a loop cursor. -+ * @tbl: the &struct bucket_table -+ * @hash: the hash value / bucket index -+ * @member: name of the &struct rhash_head within the hashable struct. -+ */ -+#define rht_for_each_entry(tpos, pos, tbl, hash, member) \ -+ rht_for_each_entry_continue(tpos, pos, (tbl)->buckets[hash], \ -+ tbl, hash, member) -+ -+/** -+ * rht_for_each_entry_safe - safely iterate over hash chain of given type -+ * @tpos: the type * to use as a loop cursor. -+ * @pos: the &struct rhash_head to use as a loop cursor. -+ * @next: the &struct rhash_head to use as next in loop cursor. -+ * @tbl: the &struct bucket_table -+ * @hash: the hash value / bucket index -+ * @member: name of the &struct rhash_head within the hashable struct. -+ * -+ * This hash chain list-traversal primitive allows for the looped code to -+ * remove the loop cursor from the list. -+ */ -+#define rht_for_each_entry_safe(tpos, pos, next, tbl, hash, member) \ -+ for (pos = rht_dereference_bucket((tbl)->buckets[hash], tbl, hash), \ -+ next = !rht_is_a_nulls(pos) ? \ -+ rht_dereference_bucket(pos->next, tbl, hash) : NULL; \ -+ (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ -+ pos = next, \ -+ next = !rht_is_a_nulls(pos) ? \ -+ rht_dereference_bucket(pos->next, tbl, hash) : NULL) -+ -+/** -+ * rht_for_each_rcu_continue - continue iterating over rcu hash chain -+ * @pos: the &struct rhash_head to use as a loop cursor. -+ * @head: the previous &struct rhash_head to continue from -+ * @tbl: the &struct bucket_table -+ * @hash: the hash value / bucket index -+ * -+ * This hash chain list-traversal primitive may safely run concurrently with -+ * the _rcu mutation primitives such as rhashtable_insert() as long as the -+ * traversal is guarded by rcu_read_lock(). -+ */ -+#define rht_for_each_rcu_continue(pos, head, tbl, hash) \ -+ for (({barrier(); }), \ -+ pos = rht_dereference_bucket_rcu(head, tbl, hash); \ -+ !rht_is_a_nulls(pos); \ -+ pos = rcu_dereference_raw(pos->next)) -+ -+/** -+ * rht_for_each_rcu - iterate over rcu hash chain -+ * @pos: the &struct rhash_head to use as a loop cursor. -+ * @tbl: the &struct bucket_table -+ * @hash: the hash value / bucket index -+ * -+ * This hash chain list-traversal primitive may safely run concurrently with -+ * the _rcu mutation primitives such as rhashtable_insert() as long as the -+ * traversal is guarded by rcu_read_lock(). -+ */ -+#define rht_for_each_rcu(pos, tbl, hash) \ -+ rht_for_each_rcu_continue(pos, (tbl)->buckets[hash], tbl, hash) -+ -+/** -+ * rht_for_each_entry_rcu_continue - continue iterating over rcu hash chain -+ * @tpos: the type * to use as a loop cursor. -+ * @pos: the &struct rhash_head to use as a loop cursor. -+ * @head: the previous &struct rhash_head to continue from -+ * @tbl: the &struct bucket_table -+ * @hash: the hash value / bucket index -+ * @member: name of the &struct rhash_head within the hashable struct. -+ * -+ * This hash chain list-traversal primitive may safely run concurrently with -+ * the _rcu mutation primitives such as rhashtable_insert() as long as the -+ * traversal is guarded by rcu_read_lock(). -+ */ -+#define rht_for_each_entry_rcu_continue(tpos, pos, head, tbl, hash, member) \ -+ for (({barrier(); }), \ -+ pos = rht_dereference_bucket_rcu(head, tbl, hash); \ -+ (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ -+ pos = rht_dereference_bucket_rcu(pos->next, tbl, hash)) -+ -+/** -+ * rht_for_each_entry_rcu - iterate over rcu hash chain of given type -+ * @tpos: the type * to use as a loop cursor. -+ * @pos: the &struct rhash_head to use as a loop cursor. -+ * @tbl: the &struct bucket_table -+ * @hash: the hash value / bucket index -+ * @member: name of the &struct rhash_head within the hashable struct. -+ * -+ * This hash chain list-traversal primitive may safely run concurrently with -+ * the _rcu mutation primitives such as rhashtable_insert() as long as the -+ * traversal is guarded by rcu_read_lock(). -+ */ -+#define rht_for_each_entry_rcu(tpos, pos, tbl, hash, member) \ -+ rht_for_each_entry_rcu_continue(tpos, pos, (tbl)->buckets[hash],\ -+ tbl, hash, member) -+ -+static inline int rhashtable_compare(struct rhashtable_compare_arg *arg, -+ const void *obj) -+{ -+ struct rhashtable *ht = arg->ht; -+ const char *ptr = obj; -+ -+ return memcmp(ptr + ht->p.key_offset, arg->key, ht->p.key_len); -+} -+ -+/** -+ * rhashtable_lookup_fast - search hash table, inlined version -+ * @ht: hash table -+ * @key: the pointer to the key -+ * @params: hash table parameters -+ * -+ * Computes the hash value for the key and traverses the bucket chain looking -+ * for a entry with an identical key. The first matching entry is returned. -+ * -+ * Returns the first entry on which the compare function returned true. -+ */ -+static inline void *rhashtable_lookup_fast( -+ struct rhashtable *ht, const void *key, -+ const struct rhashtable_params params) -+{ -+ struct rhashtable_compare_arg arg = { -+ .ht = ht, -+ .key = key, -+ }; -+ const struct bucket_table *tbl; -+ struct rhash_head *he; -+ unsigned int hash; -+ -+ rcu_read_lock(); -+ -+ tbl = rht_dereference_rcu(ht->tbl, ht); -+restart: -+ hash = rht_key_hashfn(ht, tbl, key, params); -+ rht_for_each_rcu(he, tbl, hash) { -+ if (params.obj_cmpfn ? -+ params.obj_cmpfn(&arg, rht_obj(ht, he)) : -+ rhashtable_compare(&arg, rht_obj(ht, he))) -+ continue; -+ rcu_read_unlock(); -+ return rht_obj(ht, he); -+ } -+ -+ /* Ensure we see any new tables. */ -+ smp_rmb(); -+ -+ tbl = rht_dereference_rcu(tbl->future_tbl, ht); -+ if (unlikely(tbl)) -+ goto restart; -+ rcu_read_unlock(); -+ -+ return NULL; -+} -+ -+/* Internal function, please use rhashtable_insert_fast() instead */ -+static inline int __rhashtable_insert_fast( -+ struct rhashtable *ht, const void *key, struct rhash_head *obj, -+ const struct rhashtable_params params) -+{ -+ struct rhashtable_compare_arg arg = { -+ .ht = ht, -+ .key = key, -+ }; -+ struct bucket_table *tbl, *new_tbl; -+ struct rhash_head *head; -+ spinlock_t *lock; -+ unsigned int elasticity; -+ unsigned int hash; -+ int err; -+ -+restart: -+ rcu_read_lock(); -+ -+ tbl = rht_dereference_rcu(ht->tbl, ht); -+ -+ /* All insertions must grab the oldest table containing -+ * the hashed bucket that is yet to be rehashed. -+ */ -+ for (;;) { -+ hash = rht_head_hashfn(ht, tbl, obj, params); -+ lock = rht_bucket_lock(tbl, hash); -+ spin_lock_bh(lock); -+ -+ if (tbl->rehash <= hash) -+ break; -+ -+ spin_unlock_bh(lock); -+ tbl = rht_dereference_rcu(tbl->future_tbl, ht); -+ } -+ -+ new_tbl = rht_dereference_rcu(tbl->future_tbl, ht); -+ if (unlikely(new_tbl)) { -+ tbl = rhashtable_insert_slow(ht, key, obj, new_tbl); -+ if (!IS_ERR_OR_NULL(tbl)) -+ goto slow_path; -+ -+ err = PTR_ERR(tbl); -+ goto out; -+ } -+ -+ err = -E2BIG; -+ if (unlikely(rht_grow_above_max(ht, tbl))) -+ goto out; -+ -+ if (unlikely(rht_grow_above_100(ht, tbl))) { -+slow_path: -+ spin_unlock_bh(lock); -+ err = rhashtable_insert_rehash(ht, tbl); -+ rcu_read_unlock(); -+ if (err) -+ return err; -+ -+ goto restart; -+ } -+ -+ err = -EEXIST; -+ elasticity = ht->elasticity; -+ rht_for_each(head, tbl, hash) { -+ if (key && -+ unlikely(!(params.obj_cmpfn ? -+ params.obj_cmpfn(&arg, rht_obj(ht, head)) : -+ rhashtable_compare(&arg, rht_obj(ht, head))))) -+ goto out; -+ if (!--elasticity) -+ goto slow_path; -+ } -+ -+ err = 0; -+ -+ head = rht_dereference_bucket(tbl->buckets[hash], tbl, hash); -+ -+ RCU_INIT_POINTER(obj->next, head); -+ -+ rcu_assign_pointer(tbl->buckets[hash], obj); -+ -+ atomic_inc(&ht->nelems); -+ if (rht_grow_above_75(ht, tbl)) -+ schedule_work(&ht->run_work); -+ -+out: -+ spin_unlock_bh(lock); -+ rcu_read_unlock(); -+ -+ return err; -+} -+ -+/** -+ * rhashtable_insert_fast - insert object into hash table -+ * @ht: hash table -+ * @obj: pointer to hash head inside object -+ * @params: hash table parameters -+ * -+ * Will take a per bucket spinlock to protect against mutual mutations -+ * on the same bucket. Multiple insertions may occur in parallel unless -+ * they map to the same bucket lock. -+ * -+ * It is safe to call this function from atomic context. -+ * -+ * Will trigger an automatic deferred table resizing if the size grows -+ * beyond the watermark indicated by grow_decision() which can be passed -+ * to rhashtable_init(). -+ */ -+static inline int rhashtable_insert_fast( -+ struct rhashtable *ht, struct rhash_head *obj, -+ const struct rhashtable_params params) -+{ -+ return __rhashtable_insert_fast(ht, NULL, obj, params); -+} -+ -+/** -+ * rhashtable_lookup_insert_fast - lookup and insert object into hash table -+ * @ht: hash table -+ * @obj: pointer to hash head inside object -+ * @params: hash table parameters -+ * -+ * Locks down the bucket chain in both the old and new table if a resize -+ * is in progress to ensure that writers can't remove from the old table -+ * and can't insert to the new table during the atomic operation of search -+ * and insertion. Searches for duplicates in both the old and new table if -+ * a resize is in progress. -+ * -+ * This lookup function may only be used for fixed key hash table (key_len -+ * parameter set). It will BUG() if used inappropriately. -+ * -+ * It is safe to call this function from atomic context. -+ * -+ * Will trigger an automatic deferred table resizing if the size grows -+ * beyond the watermark indicated by grow_decision() which can be passed -+ * to rhashtable_init(). -+ */ -+static inline int rhashtable_lookup_insert_fast( -+ struct rhashtable *ht, struct rhash_head *obj, -+ const struct rhashtable_params params) -+{ -+ const char *key = rht_obj(ht, obj); -+ -+ BUG_ON(ht->p.obj_hashfn); -+ -+ return __rhashtable_insert_fast(ht, key + ht->p.key_offset, obj, -+ params); -+} -+ -+/** -+ * rhashtable_lookup_insert_key - search and insert object to hash table -+ * with explicit key -+ * @ht: hash table -+ * @key: key -+ * @obj: pointer to hash head inside object -+ * @params: hash table parameters -+ * -+ * Locks down the bucket chain in both the old and new table if a resize -+ * is in progress to ensure that writers can't remove from the old table -+ * and can't insert to the new table during the atomic operation of search -+ * and insertion. Searches for duplicates in both the old and new table if -+ * a resize is in progress. -+ * -+ * Lookups may occur in parallel with hashtable mutations and resizing. -+ * -+ * Will trigger an automatic deferred table resizing if the size grows -+ * beyond the watermark indicated by grow_decision() which can be passed -+ * to rhashtable_init(). -+ * -+ * Returns zero on success. -+ */ -+static inline int rhashtable_lookup_insert_key( -+ struct rhashtable *ht, const void *key, struct rhash_head *obj, -+ const struct rhashtable_params params) -+{ -+ BUG_ON(!ht->p.obj_hashfn || !key); -+ -+ return __rhashtable_insert_fast(ht, key, obj, params); -+} -+ -+/* Internal function, please use rhashtable_remove_fast() instead */ -+static inline int __rhashtable_remove_fast( -+ struct rhashtable *ht, struct bucket_table *tbl, -+ struct rhash_head *obj, const struct rhashtable_params params) -+{ -+ struct rhash_head __rcu **pprev; -+ struct rhash_head *he; -+ spinlock_t * lock; -+ unsigned int hash; -+ int err = -ENOENT; -+ -+ hash = rht_head_hashfn(ht, tbl, obj, params); -+ lock = rht_bucket_lock(tbl, hash); -+ -+ spin_lock_bh(lock); -+ -+ pprev = &tbl->buckets[hash]; -+ rht_for_each(he, tbl, hash) { -+ if (he != obj) { -+ pprev = &he->next; -+ continue; -+ } -+ -+ rcu_assign_pointer(*pprev, obj->next); -+ err = 0; -+ break; -+ } -+ -+ spin_unlock_bh(lock); -+ -+ return err; -+} -+ -+/** -+ * rhashtable_remove_fast - remove object from hash table -+ * @ht: hash table -+ * @obj: pointer to hash head inside object -+ * @params: hash table parameters -+ * -+ * Since the hash chain is single linked, the removal operation needs to -+ * walk the bucket chain upon removal. The removal operation is thus -+ * considerable slow if the hash table is not correctly sized. -+ * -+ * Will automatically shrink the table via rhashtable_expand() if the -+ * shrink_decision function specified at rhashtable_init() returns true. -+ * -+ * Returns zero on success, -ENOENT if the entry could not be found. -+ */ -+static inline int rhashtable_remove_fast( -+ struct rhashtable *ht, struct rhash_head *obj, -+ const struct rhashtable_params params) -+{ -+ struct bucket_table *tbl; -+ int err; -+ -+ rcu_read_lock(); -+ -+ tbl = rht_dereference_rcu(ht->tbl, ht); -+ -+ /* Because we have already taken (and released) the bucket -+ * lock in old_tbl, if we find that future_tbl is not yet -+ * visible then that guarantees the entry to still be in -+ * the old tbl if it exists. -+ */ -+ while ((err = __rhashtable_remove_fast(ht, tbl, obj, params)) && -+ (tbl = rht_dereference_rcu(tbl->future_tbl, ht))) -+ ; -+ -+ if (err) -+ goto out; -+ -+ atomic_dec(&ht->nelems); -+ if (unlikely(ht->p.automatic_shrinking && -+ rht_shrink_below_30(ht, tbl))) -+ schedule_work(&ht->run_work); -+ -+out: -+ rcu_read_unlock(); -+ -+ return err; -+} -+ -+#endif /* _LINUX_RHASHTABLE_H */ -+ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/rtw_android.c b/drivers/staging/rtl8723cs/os_dep/linux/rtw_android.c -new file mode 100644 -index 000000000000..10f8f232d696 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/rtw_android.c -@@ -0,0 +1,1346 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#include -+#endif -+ -+#include -+ -+#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) -+#include -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ #include -+#else -+ #include -+#endif -+#endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) -+#define strnicmp strncasecmp -+#endif /* Linux kernel >= 4.0.0 */ -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#include -+#include -+#endif -+ -+#include "rtw_version.h" -+ -+extern void macstr2num(u8 *dst, u8 *src); -+ -+const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = { -+ "START", -+ "STOP", -+ "SCAN-ACTIVE", -+ "SCAN-PASSIVE", -+ "RSSI", -+ "LINKSPEED", -+ "RXFILTER-START", -+ "RXFILTER-STOP", -+ "RXFILTER-ADD", -+ "RXFILTER-REMOVE", -+ "BTCOEXSCAN-START", -+ "BTCOEXSCAN-STOP", -+ "BTCOEXMODE", -+ "SETSUSPENDMODE", -+ "SETSUSPENDOPT", -+ "P2P_DEV_ADDR", -+ "SETFWPATH", -+ "SETBAND", -+ "GETBAND", -+ "COUNTRY", -+ "P2P_SET_NOA", -+ "P2P_GET_NOA", -+ "P2P_SET_PS", -+ "SET_AP_WPS_P2P_IE", -+ -+ "MIRACAST", -+ -+#ifdef CONFIG_PNO_SUPPORT -+ "PNOSSIDCLR", -+ "PNOSETUP", -+ "PNOFORCE", -+ "PNODEBUG", -+#endif -+ -+ "MACADDR", -+ -+ "BLOCK_SCAN", -+ "BLOCK", -+ "WFD-ENABLE", -+ "WFD-DISABLE", -+ "WFD-SET-TCPPORT", -+ "WFD-SET-MAXTPUT", -+ "WFD-SET-DEVTYPE", -+ "SET_DTIM", -+ "HOSTAPD_SET_MACADDR_ACL", -+ "HOSTAPD_ACL_ADD_STA", -+ "HOSTAPD_ACL_REMOVE_STA", -+#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 1, 0)) -+ "GTK_REKEY_OFFLOAD", -+#endif /* CONFIG_GTK_OL */ -+/* Private command for P2P disable*/ -+ "P2P_DISABLE", -+ "SET_AEK", -+ "EXT_AUTH_STATUS", -+ "DRIVER_VERSION" -+}; -+ -+#ifdef CONFIG_PNO_SUPPORT -+#define PNO_TLV_PREFIX 'S' -+#define PNO_TLV_VERSION '1' -+#define PNO_TLV_SUBVERSION '2' -+#define PNO_TLV_RESERVED '0' -+#define PNO_TLV_TYPE_SSID_IE 'S' -+#define PNO_TLV_TYPE_TIME 'T' -+#define PNO_TLV_FREQ_REPEAT 'R' -+#define PNO_TLV_FREQ_EXPO_MAX 'M' -+ -+typedef struct cmd_tlv { -+ char prefix; -+ char version; -+ char subver; -+ char reserved; -+} cmd_tlv_t; -+ -+#ifdef CONFIG_PNO_SET_DEBUG -+char pno_in_example[] = { -+ 'P', 'N', 'O', 'S', 'E', 'T', 'U', 'P', ' ', -+ 'S', '1', '2', '0', -+ 'S', /* 1 */ -+ 0x05, -+ 'd', 'l', 'i', 'n', 'k', -+ 'S', /* 2 */ -+ 0x06, -+ 'B', 'U', 'F', 'B', 'U', 'F', -+ 'S', /* 3 */ -+ 0x20, -+ 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', 'n', 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z', '!', '@', '#', '$', '%', '^', -+ 'S', /* 4 */ -+ 0x0a, -+ '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', -+ 'T', -+ '0', '5', -+ 'R', -+ '2', -+ 'M', -+ '2', -+ 0x00 -+}; -+#endif /* CONFIG_PNO_SET_DEBUG */ -+#endif /* PNO_SUPPORT */ -+ -+typedef struct android_wifi_priv_cmd { -+ char *buf; -+ int used_len; -+ int total_len; -+} android_wifi_priv_cmd; -+ -+#ifdef CONFIG_COMPAT -+typedef struct compat_android_wifi_priv_cmd { -+ compat_uptr_t buf; -+ int used_len; -+ int total_len; -+} compat_android_wifi_priv_cmd; -+#endif /* CONFIG_COMPAT */ -+ -+/** -+ * Local (static) functions and variables -+ */ -+ -+/* Initialize g_wifi_on to 1 so dhd_bus_start will be called for the first -+ * time (only) in dhd_open, subsequential wifi on will be handled by -+ * wl_android_wifi_on -+ */ -+static int g_wifi_on = _TRUE; -+ -+unsigned int oob_irq = 0; -+unsigned int oob_gpio = 0; -+ -+#ifdef CONFIG_PNO_SUPPORT -+/* -+ * rtw_android_pno_setup -+ * Description: -+ * This is used for private command. -+ * -+ * Parameter: -+ * net: net_device -+ * command: parameters from private command -+ * total_len: the length of the command. -+ * -+ * */ -+static int rtw_android_pno_setup(struct net_device *net, char *command, int total_len) -+{ -+ pno_ssid_t pno_ssids_local[MAX_PNO_LIST_COUNT]; -+ int res = -1; -+ int nssid = 0; -+ cmd_tlv_t *cmd_tlv_temp; -+ char *str_ptr; -+ int tlv_size_left; -+ int pno_time = 0; -+ int pno_repeat = 0; -+ int pno_freq_expo_max = 0; -+ int cmdlen = strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_PNOSETUP_SET]) + 1; -+ -+#ifdef CONFIG_PNO_SET_DEBUG -+ int i; -+ char *p; -+ p = pno_in_example; -+ -+ total_len = sizeof(pno_in_example); -+ str_ptr = p + cmdlen; -+#else -+ str_ptr = command + cmdlen; -+#endif -+ -+ if (total_len < (cmdlen + sizeof(cmd_tlv_t))) { -+ RTW_INFO("%s argument=%d less min size\n", __func__, total_len); -+ goto exit_proc; -+ } -+ -+ tlv_size_left = total_len - cmdlen; -+ -+ cmd_tlv_temp = (cmd_tlv_t *)str_ptr; -+ memset(pno_ssids_local, 0, sizeof(pno_ssids_local)); -+ -+ if ((cmd_tlv_temp->prefix == PNO_TLV_PREFIX) && -+ (cmd_tlv_temp->version == PNO_TLV_VERSION) && -+ (cmd_tlv_temp->subver == PNO_TLV_SUBVERSION)) { -+ -+ str_ptr += sizeof(cmd_tlv_t); -+ tlv_size_left -= sizeof(cmd_tlv_t); -+ -+ nssid = rtw_parse_ssid_list_tlv(&str_ptr, pno_ssids_local, -+ MAX_PNO_LIST_COUNT, &tlv_size_left); -+ if (nssid <= 0) { -+ RTW_INFO("SSID is not presented or corrupted ret=%d\n", nssid); -+ goto exit_proc; -+ } else { -+ if ((str_ptr[0] != PNO_TLV_TYPE_TIME) || (tlv_size_left <= 1)) { -+ RTW_INFO("%s scan duration corrupted field size %d\n", -+ __func__, tlv_size_left); -+ goto exit_proc; -+ } -+ str_ptr++; -+ pno_time = simple_strtoul(str_ptr, &str_ptr, 16); -+ RTW_INFO("%s: pno_time=%d\n", __func__, pno_time); -+ -+ if (str_ptr[0] != 0) { -+ if ((str_ptr[0] != PNO_TLV_FREQ_REPEAT)) { -+ RTW_INFO("%s pno repeat : corrupted field\n", -+ __func__); -+ goto exit_proc; -+ } -+ str_ptr++; -+ pno_repeat = simple_strtoul(str_ptr, &str_ptr, 16); -+ RTW_INFO("%s :got pno_repeat=%d\n", __FUNCTION__, pno_repeat); -+ if (str_ptr[0] != PNO_TLV_FREQ_EXPO_MAX) { -+ RTW_INFO("%s FREQ_EXPO_MAX corrupted field size\n", -+ __func__); -+ goto exit_proc; -+ } -+ str_ptr++; -+ pno_freq_expo_max = simple_strtoul(str_ptr, &str_ptr, 16); -+ RTW_INFO("%s: pno_freq_expo_max=%d\n", -+ __func__, pno_freq_expo_max); -+ } -+ } -+ } else { -+ RTW_INFO("%s get wrong TLV command\n", __FUNCTION__); -+ goto exit_proc; -+ } -+ -+ res = rtw_dev_pno_set(net, pno_ssids_local, nssid, pno_time, pno_repeat, pno_freq_expo_max); -+ -+#ifdef CONFIG_PNO_SET_DEBUG -+ rtw_dev_pno_debug(net); -+#endif -+ -+exit_proc: -+ return res; -+} -+ -+/* -+ * rtw_android_cfg80211_pno_setup -+ * Description: -+ * This is used for cfg80211 sched_scan. -+ * -+ * Parameter: -+ * net: net_device -+ * request: cfg80211_request -+ * */ -+ -+int rtw_android_cfg80211_pno_setup(struct net_device *net, -+ struct cfg80211_ssid *ssids, int n_ssids, int interval) -+{ -+ int res = -1; -+ int nssid = 0; -+ int pno_time = 0; -+ int pno_repeat = 0; -+ int pno_freq_expo_max = 0; -+ int index = 0; -+ pno_ssid_t pno_ssids_local[MAX_PNO_LIST_COUNT]; -+ -+ if (n_ssids > MAX_PNO_LIST_COUNT || n_ssids < 0) { -+ RTW_INFO("%s: nssids(%d) is invalid.\n", __func__, n_ssids); -+ return -EINVAL; -+ } -+ -+ memset(pno_ssids_local, 0, sizeof(pno_ssids_local)); -+ -+ nssid = n_ssids; -+ -+ for (index = 0 ; index < nssid ; index++) { -+ pno_ssids_local[index].SSID_len = ssids[index].ssid_len; -+ memcpy(pno_ssids_local[index].SSID, ssids[index].ssid, -+ ssids[index].ssid_len); -+ } -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0) -+ if(ssids) -+ rtw_mfree((u8 *)ssids, (n_ssids * sizeof(struct cfg80211_ssid))); -+#endif -+ pno_time = (interval / 1000); -+ -+ RTW_INFO("%s: nssids: %d, pno_time=%d\n", __func__, nssid, pno_time); -+ -+ res = rtw_dev_pno_set(net, pno_ssids_local, nssid, pno_time, -+ pno_repeat, pno_freq_expo_max); -+ -+#ifdef CONFIG_PNO_SET_DEBUG -+ rtw_dev_pno_debug(net); -+#endif -+exit_proc: -+ return res; -+} -+ -+int rtw_android_pno_enable(struct net_device *net, int pno_enable) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); -+ struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); -+ -+ if (pwrctl) { -+ pwrctl->wowlan_pno_enable = pno_enable; -+ RTW_INFO("%s: wowlan_pno_enable: %d\n", __func__, pwrctl->wowlan_pno_enable); -+ if (pwrctl->wowlan_pno_enable == 0) { -+ if (pwrctl->pnlo_info != NULL) { -+ rtw_mfree((u8 *)pwrctl->pnlo_info, sizeof(pno_nlo_info_t)); -+ pwrctl->pnlo_info = NULL; -+ } -+ if (pwrctl->pno_ssid_list != NULL) { -+ rtw_mfree((u8 *)pwrctl->pno_ssid_list, sizeof(pno_ssid_list_t)); -+ pwrctl->pno_ssid_list = NULL; -+ } -+ if (pwrctl->pscan_info != NULL) { -+ rtw_mfree((u8 *)pwrctl->pscan_info, sizeof(pno_scan_info_t)); -+ pwrctl->pscan_info = NULL; -+ } -+ } -+ return 0; -+ } else -+ return -1; -+} -+#endif /* CONFIG_PNO_SUPPORT */ -+ -+int rtw_android_cmdstr_to_num(char *cmdstr) -+{ -+ int cmd_num; -+ for (cmd_num = 0 ; cmd_num < ANDROID_WIFI_CMD_MAX; cmd_num++) -+ if (0 == strnicmp(cmdstr , android_wifi_cmd_str[cmd_num], strlen(android_wifi_cmd_str[cmd_num]))) -+ break; -+ -+ return cmd_num; -+} -+ -+int rtw_android_get_rssi(struct net_device *net, char *command, int total_len) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct wlan_network *pcur_network = &pmlmepriv->cur_network; -+ int bytes_written = 0; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { -+ bytes_written += snprintf(&command[bytes_written], total_len, "%s rssi %d", -+ pcur_network->network.Ssid.Ssid, padapter->recvpriv.rssi); -+ } -+ -+ return bytes_written; -+} -+ -+int rtw_android_get_link_speed(struct net_device *net, char *command, int total_len) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); -+ int bytes_written = 0; -+ u16 link_speed = 0; -+ -+ link_speed = rtw_get_cur_max_rate(padapter) / 10; -+ bytes_written = snprintf(command, total_len, "LinkSpeed %d", link_speed); -+ -+ return bytes_written; -+} -+ -+int rtw_android_get_macaddr(struct net_device *net, char *command, int total_len) -+{ -+ int bytes_written = 0; -+ -+ bytes_written = snprintf(command, total_len, "Macaddr = "MAC_FMT, MAC_ARG(net->dev_addr)); -+ return bytes_written; -+} -+ -+int rtw_android_set_country(struct net_device *net, char *command, int total_len) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); -+ char *country_code = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_COUNTRY]) + 1; -+ int ret = _FAIL; -+ -+ ret = rtw_set_country(adapter, country_code); -+ -+ return (ret == _SUCCESS) ? 0 : -1; -+} -+ -+int rtw_android_get_p2p_dev_addr(struct net_device *net, char *command, int total_len) -+{ -+ int bytes_written = 0; -+ -+ /* We use the same address as our HW MAC address */ -+ _rtw_memcpy(command, net->dev_addr, ETH_ALEN); -+ -+ bytes_written = ETH_ALEN; -+ return bytes_written; -+} -+ -+int rtw_android_set_block_scan(struct net_device *net, char *command, int total_len) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); -+ char *block_value = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_BLOCK_SCAN]) + 1; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ adapter_wdev_data(adapter)->block_scan = (*block_value == '0') ? _FALSE : _TRUE; -+#endif -+ -+ return 0; -+} -+ -+int rtw_android_set_block(struct net_device *net, char *command, int total_len) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); -+ char *block_value = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_BLOCK]) + 1; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ adapter_wdev_data(adapter)->block = (*block_value == '0') ? _FALSE : _TRUE; -+#endif -+ -+ return 0; -+} -+ -+int rtw_android_setband(struct net_device *net, char *command, int total_len) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); -+ char *arg = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SETBAND]) + 1; -+ u32 band = WIFI_FREQUENCY_BAND_AUTO; -+ int ret = _FAIL; -+ -+ if (sscanf(arg, "%u", &band) >= 1) -+ ret = rtw_set_band(adapter, band); -+ -+ return (ret == _SUCCESS) ? 0 : -1; -+} -+ -+int rtw_android_getband(struct net_device *net, char *command, int total_len) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); -+ int bytes_written = 0; -+ -+ bytes_written = snprintf(command, total_len, "%u", adapter->setband); -+ -+ return bytes_written; -+} -+ -+#ifdef CONFIG_WFD -+int rtw_android_set_miracast_mode(struct net_device *net, char *command, int total_len) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); -+ struct wifi_display_info *wfd_info = &adapter->wfd_info; -+ char *arg = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_MIRACAST]) + 1; -+ u8 mode; -+ int num; -+ int ret = _FAIL; -+ -+ num = sscanf(arg, "%hhu", &mode); -+ -+ if (num < 1) -+ goto exit; -+ -+ switch (mode) { -+ case 1: /* soruce */ -+ mode = MIRACAST_SOURCE; -+ break; -+ case 2: /* sink */ -+ mode = MIRACAST_SINK; -+ break; -+ case 0: /* disabled */ -+ default: -+ mode = MIRACAST_DISABLED; -+ break; -+ } -+ wfd_info->stack_wfd_mode = mode; -+ RTW_INFO("stack miracast mode: %s\n", get_miracast_mode_str(wfd_info->stack_wfd_mode)); -+ -+ ret = _SUCCESS; -+ -+exit: -+ return (ret == _SUCCESS) ? 0 : -1; -+} -+#endif /* CONFIG_WFD */ -+ -+int get_int_from_command(char *pcmd) -+{ -+ int i = 0; -+ -+ for (i = 0; i < strlen(pcmd); i++) { -+ if (pcmd[i] == '=') { -+ /* Skip the '=' and space characters. */ -+ i += 2; -+ break; -+ } -+ } -+ return rtw_atoi(pcmd + i) ; -+} -+ -+#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 1, 0)) -+int rtw_gtk_offload(struct net_device *net, u8 *cmd_ptr) -+{ -+ int i; -+ /* u8 *cmd_ptr = priv_cmd.buf; */ -+ struct sta_info *psta; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ struct security_priv *psecuritypriv = &(padapter->securitypriv); -+ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); -+ -+ -+ if (psta == NULL) -+ RTW_INFO("%s, : Obtain Sta_info fail\n", __func__); -+ else { -+ /* string command length of "GTK_REKEY_OFFLOAD" */ -+ cmd_ptr += 18; -+ -+ _rtw_memcpy(psta->kek, cmd_ptr, RTW_KEK_LEN); -+ cmd_ptr += RTW_KEK_LEN; -+ /* -+ printk("supplicant KEK: "); -+ for(i=0;ikek[i]); -+ printk("\n supplicant KCK: "); -+ */ -+ _rtw_memcpy(psta->kck, cmd_ptr, RTW_KCK_LEN); -+ cmd_ptr += RTW_KCK_LEN; -+ /* -+ for(i=0;ikck[i]); -+ */ -+ _rtw_memcpy(psta->replay_ctr, cmd_ptr, RTW_REPLAY_CTR_LEN); -+ psecuritypriv->binstallKCK_KEK = _TRUE; -+ -+ /* printk("\nREPLAY_CTR: "); */ -+ /* for(i=0;ireplay_ctr[i]); */ -+ } -+ -+ return _SUCCESS; -+} -+#endif /* CONFIG_GTK_OL */ -+ -+#ifdef CONFIG_RTW_MESH_AEK -+static int rtw_android_set_aek(struct net_device *ndev, char *command, int total_len) -+{ -+#define SET_AEK_DATA_LEN (ETH_ALEN + 32) -+ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(ndev); -+ u8 *addr; -+ u8 *aek; -+ int err = 0; -+ -+ if (total_len - strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SET_AEK]) - 1 != SET_AEK_DATA_LEN) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ addr = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SET_AEK]) + 1; -+ aek = addr + ETH_ALEN; -+ -+ RTW_PRINT(FUNC_NDEV_FMT" addr="MAC_FMT"\n" -+ , FUNC_NDEV_ARG(ndev), MAC_ARG(addr)); -+ if (0) -+ RTW_PRINT(FUNC_NDEV_FMT" aek="KEY_FMT KEY_FMT"\n" -+ , FUNC_NDEV_ARG(ndev), KEY_ARG(aek), KEY_ARG(aek + 16)); -+ -+ if (rtw_mesh_plink_set_aek(adapter, addr, aek) != _SUCCESS) -+ err = -ENOENT; -+ -+exit: -+ return err; -+} -+#endif /* CONFIG_RTW_MESH_AEK */ -+ -+int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) -+{ -+ #define PRIVATE_COMMAND_MAX_LEN 8192 -+ int ret = 0; -+ char *command = NULL; -+ int cmd_num; -+ int bytes_written = 0; -+#ifdef CONFIG_PNO_SUPPORT -+ uint cmdlen = 0; -+ uint pno_enable = 0; -+#endif -+ android_wifi_priv_cmd priv_cmd; -+ _adapter *padapter = (_adapter *) rtw_netdev_priv(net); -+#ifdef CONFIG_WFD -+ struct wifi_display_info *pwfd_info; -+#endif -+ -+ rtw_lock_suspend(); -+ -+ if (!ifr->ifr_data) { -+ ret = -EINVAL; -+ goto exit; -+ } -+ if (padapter->registrypriv.mp_mode == 1) { -+ ret = -EINVAL; -+ goto exit; -+ } -+#ifdef CONFIG_COMPAT -+#if (KERNEL_VERSION(4, 6, 0) > LINUX_VERSION_CODE) -+ if (is_compat_task()) { -+#else -+ if (in_compat_syscall()) { -+#endif -+ /* User space is 32-bit, use compat ioctl */ -+ compat_android_wifi_priv_cmd compat_priv_cmd; -+ -+ if (copy_from_user(&compat_priv_cmd, ifr->ifr_data, sizeof(compat_android_wifi_priv_cmd))) { -+ ret = -EFAULT; -+ goto exit; -+ } -+ priv_cmd.buf = compat_ptr(compat_priv_cmd.buf); -+ priv_cmd.used_len = compat_priv_cmd.used_len; -+ priv_cmd.total_len = compat_priv_cmd.total_len; -+ } else -+#endif /* CONFIG_COMPAT */ -+ if (copy_from_user(&priv_cmd, ifr->ifr_data, sizeof(android_wifi_priv_cmd))) { -+ ret = -EFAULT; -+ goto exit; -+ } -+ if (padapter->registrypriv.mp_mode == 1) { -+ ret = -EFAULT; -+ goto exit; -+ } -+ /*RTW_INFO("%s priv_cmd.buf=%p priv_cmd.total_len=%d priv_cmd.used_len=%d\n",__func__,priv_cmd.buf,priv_cmd.total_len,priv_cmd.used_len);*/ -+ if (priv_cmd.total_len > PRIVATE_COMMAND_MAX_LEN || priv_cmd.total_len < 0) { -+ RTW_WARN("%s: invalid private command (%d)\n", __FUNCTION__, -+ priv_cmd.total_len); -+ ret = -EFAULT; -+ goto exit; -+ } -+ -+ command = rtw_zmalloc(priv_cmd.total_len+1); -+ if (!command) { -+ RTW_INFO("%s: failed to allocate memory\n", __FUNCTION__); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)) -+ if (!access_ok(priv_cmd.buf, priv_cmd.total_len)) { -+ #else -+ if (!access_ok(VERIFY_READ, priv_cmd.buf, priv_cmd.total_len)) { -+ #endif -+ RTW_INFO("%s: failed to access memory\n", __FUNCTION__); -+ ret = -EFAULT; -+ goto exit; -+ } -+ if (copy_from_user(command, (void *)priv_cmd.buf, priv_cmd.total_len)) { -+ ret = -EFAULT; -+ goto exit; -+ } -+ command[priv_cmd.total_len] = '\0'; -+ RTW_INFO("%s: Android private cmd \"%s\" on %s\n" -+ , __FUNCTION__, command, ifr->ifr_name); -+ -+ cmd_num = rtw_android_cmdstr_to_num(command); -+ -+ switch (cmd_num) { -+ case ANDROID_WIFI_CMD_START: -+ /* bytes_written = wl_android_wifi_on(net); */ -+ goto response; -+ case ANDROID_WIFI_CMD_SETFWPATH: -+ goto response; -+ } -+ -+ if (!g_wifi_on) { -+ RTW_INFO("%s: Ignore private cmd \"%s\" - iface %s is down\n" -+ , __FUNCTION__, command, ifr->ifr_name); -+ ret = 0; -+ goto exit; -+ } -+ -+ if (!hal_chk_wl_func(padapter, WL_FUNC_MIRACAST)) { -+ switch (cmd_num) { -+ case ANDROID_WIFI_CMD_WFD_ENABLE: -+ case ANDROID_WIFI_CMD_WFD_DISABLE: -+ case ANDROID_WIFI_CMD_WFD_SET_TCPPORT: -+ case ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT: -+ case ANDROID_WIFI_CMD_WFD_SET_DEVTYPE: -+ goto response; -+ } -+ } -+ -+ switch (cmd_num) { -+ -+ case ANDROID_WIFI_CMD_STOP: -+ /* bytes_written = wl_android_wifi_off(net); */ -+ break; -+ -+ case ANDROID_WIFI_CMD_SCAN_ACTIVE: -+ /* rtw_set_scan_mode((_adapter *)rtw_netdev_priv(net), SCAN_ACTIVE); */ -+#ifdef CONFIG_PLATFORM_MSTAR -+#ifdef CONFIG_IOCTL_CFG80211 -+ adapter_wdev_data((_adapter *)rtw_netdev_priv(net))->bandroid_scan = _TRUE; -+#endif /* CONFIG_IOCTL_CFG80211 */ -+#endif /* CONFIG_PLATFORM_MSTAR */ -+ break; -+ case ANDROID_WIFI_CMD_SCAN_PASSIVE: -+ /* rtw_set_scan_mode((_adapter *)rtw_netdev_priv(net), SCAN_PASSIVE); */ -+ break; -+ -+ case ANDROID_WIFI_CMD_RSSI: -+ bytes_written = rtw_android_get_rssi(net, command, priv_cmd.total_len); -+ break; -+ case ANDROID_WIFI_CMD_LINKSPEED: -+ bytes_written = rtw_android_get_link_speed(net, command, priv_cmd.total_len); -+ break; -+ -+ case ANDROID_WIFI_CMD_MACADDR: -+ bytes_written = rtw_android_get_macaddr(net, command, priv_cmd.total_len); -+ break; -+ -+ case ANDROID_WIFI_CMD_BLOCK_SCAN: -+ bytes_written = rtw_android_set_block_scan(net, command, priv_cmd.total_len); -+ break; -+ -+ case ANDROID_WIFI_CMD_BLOCK: -+ bytes_written = rtw_android_set_block(net, command, priv_cmd.total_len); -+ break; -+ -+ case ANDROID_WIFI_CMD_RXFILTER_START: -+ /* bytes_written = net_os_set_packet_filter(net, 1); */ -+ break; -+ case ANDROID_WIFI_CMD_RXFILTER_STOP: -+ /* bytes_written = net_os_set_packet_filter(net, 0); */ -+ break; -+ case ANDROID_WIFI_CMD_RXFILTER_ADD: -+ /* int filter_num = *(command + strlen(CMD_RXFILTER_ADD) + 1) - '0'; */ -+ /* bytes_written = net_os_rxfilter_add_remove(net, TRUE, filter_num); */ -+ break; -+ case ANDROID_WIFI_CMD_RXFILTER_REMOVE: -+ /* int filter_num = *(command + strlen(CMD_RXFILTER_REMOVE) + 1) - '0'; */ -+ /* bytes_written = net_os_rxfilter_add_remove(net, FALSE, filter_num); */ -+ break; -+ -+ case ANDROID_WIFI_CMD_BTCOEXSCAN_START: -+ /* TBD: BTCOEXSCAN-START */ -+ break; -+ case ANDROID_WIFI_CMD_BTCOEXSCAN_STOP: -+ /* TBD: BTCOEXSCAN-STOP */ -+ break; -+ case ANDROID_WIFI_CMD_BTCOEXMODE: -+#if 0 -+ uint mode = *(command + strlen(CMD_BTCOEXMODE) + 1) - '0'; -+ if (mode == 1) -+ net_os_set_packet_filter(net, 0); /* DHCP starts */ -+ else -+ net_os_set_packet_filter(net, 1); /* DHCP ends */ -+#ifdef WL_CFG80211 -+ bytes_written = wl_cfg80211_set_btcoex_dhcp(net, command); -+#endif -+#endif -+ break; -+ -+ case ANDROID_WIFI_CMD_SETSUSPENDMODE: -+ break; -+ -+ case ANDROID_WIFI_CMD_SETSUSPENDOPT: -+ /* bytes_written = wl_android_set_suspendopt(net, command, priv_cmd.total_len); */ -+ break; -+ -+ case ANDROID_WIFI_CMD_SETBAND: -+ bytes_written = rtw_android_setband(net, command, priv_cmd.total_len); -+ break; -+ -+ case ANDROID_WIFI_CMD_GETBAND: -+ bytes_written = rtw_android_getband(net, command, priv_cmd.total_len); -+ break; -+ -+ case ANDROID_WIFI_CMD_COUNTRY: -+ bytes_written = rtw_android_set_country(net, command, priv_cmd.total_len); -+ break; -+ -+#ifdef CONFIG_PNO_SUPPORT -+ case ANDROID_WIFI_CMD_PNOSSIDCLR_SET: -+ /* bytes_written = dhd_dev_pno_reset(net); */ -+ break; -+ case ANDROID_WIFI_CMD_PNOSETUP_SET: -+ bytes_written = rtw_android_pno_setup(net, command, priv_cmd.total_len); -+ break; -+ case ANDROID_WIFI_CMD_PNOENABLE_SET: -+ cmdlen = strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_PNOENABLE_SET]); -+ pno_enable = *(command + cmdlen + 1) - '0'; -+ bytes_written = rtw_android_pno_enable(net, pno_enable); -+ break; -+#endif -+ -+ case ANDROID_WIFI_CMD_P2P_DEV_ADDR: -+ bytes_written = rtw_android_get_p2p_dev_addr(net, command, priv_cmd.total_len); -+ break; -+ case ANDROID_WIFI_CMD_P2P_SET_NOA: -+ /* int skip = strlen(CMD_P2P_SET_NOA) + 1; */ -+ /* bytes_written = wl_cfg80211_set_p2p_noa(net, command + skip, priv_cmd.total_len - skip); */ -+ break; -+ case ANDROID_WIFI_CMD_P2P_GET_NOA: -+ /* bytes_written = wl_cfg80211_get_p2p_noa(net, command, priv_cmd.total_len); */ -+ break; -+ case ANDROID_WIFI_CMD_P2P_SET_PS: -+ /* int skip = strlen(CMD_P2P_SET_PS) + 1; */ -+ /* bytes_written = wl_cfg80211_set_p2p_ps(net, command + skip, priv_cmd.total_len - skip); */ -+ break; -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ #ifdef CONFIG_AP_MODE -+ case ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE: { -+ int skip = strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE]) + 3; -+ bytes_written = rtw_cfg80211_set_mgnt_wpsp2pie(net, command + skip, priv_cmd.total_len - skip, *(command + skip - 2) - '0'); -+ break; -+ } -+ #endif -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+#ifdef CONFIG_WFD -+ -+ case ANDROID_WIFI_CMD_MIRACAST: -+ bytes_written = rtw_android_set_miracast_mode(net, command, priv_cmd.total_len); -+ break; -+ -+ case ANDROID_WIFI_CMD_WFD_ENABLE: { -+ /* Commented by Albert 2012/07/24 */ -+ /* We can enable the WFD function by using the following command: */ -+ /* wpa_cli driver wfd-enable */ -+ -+ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) -+ rtw_wfd_enable(padapter, 1); -+ break; -+ } -+ -+ case ANDROID_WIFI_CMD_WFD_DISABLE: { -+ /* Commented by Albert 2012/07/24 */ -+ /* We can disable the WFD function by using the following command: */ -+ /* wpa_cli driver wfd-disable */ -+ -+ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) -+ rtw_wfd_enable(padapter, 0); -+ break; -+ } -+ case ANDROID_WIFI_CMD_WFD_SET_TCPPORT: { -+ /* Commented by Albert 2012/07/24 */ -+ /* We can set the tcp port number by using the following command: */ -+ /* wpa_cli driver wfd-set-tcpport = 554 */ -+ -+ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) -+ rtw_wfd_set_ctrl_port(padapter, (u16)get_int_from_command(command)); -+ break; -+ } -+ case ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT: { -+ break; -+ } -+ case ANDROID_WIFI_CMD_WFD_SET_DEVTYPE: { -+ /* Commented by Albert 2012/08/28 */ -+ /* Specify the WFD device type ( WFD source/primary sink ) */ -+ -+ pwfd_info = &padapter->wfd_info; -+ if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) { -+ pwfd_info->wfd_device_type = (u8) get_int_from_command(command); -+ pwfd_info->wfd_device_type &= WFD_DEVINFO_DUAL; -+ } -+ break; -+ } -+#endif -+ case ANDROID_WIFI_CMD_CHANGE_DTIM: { -+#ifdef CONFIG_LPS -+ u8 dtim; -+ u8 *ptr = (u8 *) command; -+ -+ ptr += 9;/* string command length of "SET_DTIM"; */ -+ -+ dtim = rtw_atoi(ptr); -+ -+ RTW_INFO("DTIM=%d\n", dtim); -+ -+ rtw_lps_change_dtim_cmd(padapter, dtim); -+#endif -+ } -+ break; -+ -+#if CONFIG_RTW_MACADDR_ACL -+ case ANDROID_WIFI_CMD_HOSTAPD_SET_MACADDR_ACL: { -+ rtw_set_macaddr_acl(padapter, RTW_ACL_PERIOD_BSS, get_int_from_command(command)); -+ break; -+ } -+ case ANDROID_WIFI_CMD_HOSTAPD_ACL_ADD_STA: { -+ u8 addr[ETH_ALEN] = {0x00}; -+ macstr2num(addr, command + strlen("HOSTAPD_ACL_ADD_STA") + 3); /* 3 is space bar + "=" + space bar these 3 chars */ -+ rtw_acl_add_sta(padapter, RTW_ACL_PERIOD_BSS, addr); -+ break; -+ } -+ case ANDROID_WIFI_CMD_HOSTAPD_ACL_REMOVE_STA: { -+ u8 addr[ETH_ALEN] = {0x00}; -+ macstr2num(addr, command + strlen("HOSTAPD_ACL_REMOVE_STA") + 3); /* 3 is space bar + "=" + space bar these 3 chars */ -+ rtw_acl_remove_sta(padapter, RTW_ACL_PERIOD_BSS, addr); -+ break; -+ } -+#endif /* CONFIG_RTW_MACADDR_ACL */ -+#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 1, 0)) -+ case ANDROID_WIFI_CMD_GTK_REKEY_OFFLOAD: -+ rtw_gtk_offload(net, (u8 *)command); -+ break; -+#endif /* CONFIG_GTK_OL */ -+ case ANDROID_WIFI_CMD_P2P_DISABLE: { -+#ifdef CONFIG_P2P -+ rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); -+#endif /* CONFIG_P2P */ -+ break; -+ } -+ -+#ifdef CONFIG_RTW_MESH_AEK -+ case ANDROID_WIFI_CMD_SET_AEK: -+ bytes_written = rtw_android_set_aek(net, command, priv_cmd.total_len); -+ break; -+#endif -+ -+ case ANDROID_WIFI_CMD_EXT_AUTH_STATUS: { -+ rtw_set_external_auth_status(padapter, -+ command + strlen("EXT_AUTH_STATUS "), -+ priv_cmd.total_len - strlen("EXT_AUTH_STATUS ")); -+ break; -+ } -+ case ANDROID_WIFI_CMD_DRIVERVERSION: { -+ bytes_written = strlen(DRIVERVERSION); -+ snprintf(command, bytes_written + 1, DRIVERVERSION); -+ break; -+ } -+ default: -+ RTW_INFO("Unknown PRIVATE command %s - ignored\n", command); -+ snprintf(command, 3, "OK"); -+ bytes_written = strlen("OK"); -+ } -+ -+response: -+ if (bytes_written >= 0) { -+ if ((bytes_written == 0) && (priv_cmd.total_len > 0)) -+ command[0] = '\0'; -+ if (bytes_written >= priv_cmd.total_len) { -+ RTW_INFO("%s: bytes_written = %d\n", __FUNCTION__, bytes_written); -+ bytes_written = priv_cmd.total_len; -+ } else -+ bytes_written++; -+ priv_cmd.used_len = bytes_written; -+ if (copy_to_user((void *)priv_cmd.buf, command, bytes_written)) { -+ RTW_INFO("%s: failed to copy data to user buffer\n", __FUNCTION__); -+ ret = -EFAULT; -+ } -+ } else -+ ret = bytes_written; -+ -+exit: -+ rtw_unlock_suspend(); -+ if (command) -+ rtw_mfree(command, priv_cmd.total_len + 1); -+ -+ return ret; -+} -+ -+ -+/** -+ * Functions for Android WiFi card detection -+ */ -+#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) -+ -+static int g_wifidev_registered = 0; -+static struct semaphore wifi_control_sem; -+static struct wifi_platform_data *wifi_control_data = NULL; -+static struct resource *wifi_irqres = NULL; -+ -+static int wifi_add_dev(void); -+static void wifi_del_dev(void); -+ -+int rtw_android_wifictrl_func_add(void) -+{ -+ int ret = 0; -+ sema_init(&wifi_control_sem, 0); -+ -+ ret = wifi_add_dev(); -+ if (ret) { -+ RTW_INFO("%s: platform_driver_register failed\n", __FUNCTION__); -+ return ret; -+ } -+ g_wifidev_registered = 1; -+ -+ /* Waiting callback after platform_driver_register is done or exit with error */ -+ if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) { -+ ret = -EINVAL; -+ RTW_INFO("%s: platform_driver_register timeout\n", __FUNCTION__); -+ } -+ -+ return ret; -+} -+ -+void rtw_android_wifictrl_func_del(void) -+{ -+ if (g_wifidev_registered) { -+ wifi_del_dev(); -+ g_wifidev_registered = 0; -+ } -+} -+ -+void *wl_android_prealloc(int section, unsigned long size) -+{ -+ void *alloc_ptr = NULL; -+ if (wifi_control_data && wifi_control_data->mem_prealloc) { -+ alloc_ptr = wifi_control_data->mem_prealloc(section, size); -+ if (alloc_ptr) { -+ RTW_INFO("success alloc section %d\n", section); -+ if (size != 0L) -+ memset(alloc_ptr, 0, size); -+ return alloc_ptr; -+ } -+ } -+ -+ RTW_INFO("can't alloc section %d\n", section); -+ return NULL; -+} -+ -+int wifi_get_irq_number(unsigned long *irq_flags_ptr) -+{ -+ if (wifi_irqres) { -+ *irq_flags_ptr = wifi_irqres->flags & IRQF_TRIGGER_MASK; -+ return (int)wifi_irqres->start; -+ } -+#ifdef CUSTOM_OOB_GPIO_NUM -+ return CUSTOM_OOB_GPIO_NUM; -+#else -+ return -1; -+#endif -+} -+ -+int wifi_set_power(int on, unsigned long msec) -+{ -+ RTW_INFO("%s = %d\n", __FUNCTION__, on); -+ if (wifi_control_data && wifi_control_data->set_power) -+ wifi_control_data->set_power(on); -+ if (msec) -+ msleep(msec); -+ return 0; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+int wifi_get_mac_addr(unsigned char *buf) -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ if (!buf) -+ return -EINVAL; -+ if (wifi_control_data && wifi_control_data->get_mac_addr) -+ return wifi_control_data->get_mac_addr(buf); -+ return -EOPNOTSUPP; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) */ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) || defined(COMPAT_KERNEL_RELEASE) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)) -+void *wifi_get_country_code(char *ccode, u32 flags) -+#else /* Linux kernel < 3.18 */ -+void *wifi_get_country_code(char *ccode) -+#endif /* Linux kernel < 3.18 */ -+{ -+ RTW_INFO("%s\n", __FUNCTION__); -+ if (!ccode) -+ return NULL; -+ if (wifi_control_data && wifi_control_data->get_country_code) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)) -+ return wifi_control_data->get_country_code(ccode, flags); -+#else /* Linux kernel < 3.18 */ -+ return wifi_control_data->get_country_code(ccode); -+#endif /* Linux kernel < 3.18 */ -+ return NULL; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) */ -+ -+static int wifi_set_carddetect(int on) -+{ -+ RTW_INFO("%s = %d\n", __FUNCTION__, on); -+ if (wifi_control_data && wifi_control_data->set_carddetect) -+ wifi_control_data->set_carddetect(on); -+ return 0; -+} -+ -+static int wifi_probe(struct platform_device *pdev) -+{ -+ struct wifi_platform_data *wifi_ctrl = -+ (struct wifi_platform_data *)(pdev->dev.platform_data); -+ int wifi_wake_gpio = 0; -+ -+ RTW_INFO("## %s\n", __FUNCTION__); -+ wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "bcmdhd_wlan_irq"); -+ -+ if (wifi_irqres == NULL) -+ wifi_irqres = platform_get_resource_byname(pdev, -+ IORESOURCE_IRQ, "bcm4329_wlan_irq"); -+ else -+ wifi_wake_gpio = wifi_irqres->start; -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ RTW_INFO("%s: gpio:%d wifi_wake_gpio:%d\n", __func__, -+ (int)wifi_irqres->start, wifi_wake_gpio); -+ -+ if (wifi_wake_gpio > 0) { -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ wifi_configure_gpio(); -+#else /* CONFIG_PLATFORM_INTEL_BYT */ -+ gpio_request(wifi_wake_gpio, "oob_irq"); -+ gpio_direction_input(wifi_wake_gpio); -+ oob_irq = gpio_to_irq(wifi_wake_gpio); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ RTW_INFO("%s oob_irq:%d\n", __func__, oob_irq); -+ } else if (wifi_irqres) { -+ oob_irq = wifi_irqres->start; -+ RTW_INFO("%s oob_irq:%d\n", __func__, oob_irq); -+ } -+#endif -+ wifi_control_data = wifi_ctrl; -+ -+ wifi_set_power(1, 0); /* Power On */ -+ wifi_set_carddetect(1); /* CardDetect (0->1) */ -+ -+ up(&wifi_control_sem); -+ return 0; -+} -+ -+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN -+extern PADAPTER g_test_adapter; -+ -+static void shutdown_card(void) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(g_test_adapter); -+ u32 addr; -+ u8 tmp8, cnt = 0; -+ -+ if (NULL == g_test_adapter) { -+ RTW_INFO("%s: padapter==NULL\n", __FUNCTION__); -+ return; -+ } -+ -+#ifdef CONFIG_FWLPS_IN_IPS -+ LeaveAllPowerSaveMode(g_test_adapter); -+#endif /* CONFIG_FWLPS_IN_IPS */ -+ -+#ifdef CONFIG_WOWLAN -+#ifdef CONFIG_GPIO_WAKEUP -+ /*default wake up pin change to BT*/ -+ RTW_INFO("%s:default wake up pin change to BT\n", __FUNCTION__); -+ rtw_hal_switch_gpio_wl_ctrl(g_test_adapter, pwrpriv->wowlan_gpio_index, _FALSE); -+#endif /* CONFIG_GPIO_WAKEUP */ -+#endif /* CONFIG_WOWLAN */ -+ -+ /* Leave SDIO HCI Suspend */ -+ addr = 0x10250086; -+ rtw_write8(g_test_adapter, addr, 0); -+ do { -+ tmp8 = rtw_read8(g_test_adapter, addr); -+ cnt++; -+ RTW_INFO(FUNC_ADPT_FMT ": polling SDIO_HSUS_CTRL(0x%x)=0x%x, cnt=%d\n", -+ FUNC_ADPT_ARG(g_test_adapter), addr, tmp8, cnt); -+ -+ if (tmp8 & BIT(1)) -+ break; -+ -+ if (cnt >= 100) { -+ RTW_INFO(FUNC_ADPT_FMT ": polling 0x%x[1]==1 FAIL!!\n", -+ FUNC_ADPT_ARG(g_test_adapter), addr); -+ break; -+ } -+ -+ rtw_mdelay_os(10); -+ } while (1); -+ -+ /* unlock register I/O */ -+ rtw_write8(g_test_adapter, 0x1C, 0); -+ -+ /* enable power down function */ -+ /* 0x04[4] = 1 */ -+ /* 0x05[7] = 1 */ -+ addr = 0x04; -+ tmp8 = rtw_read8(g_test_adapter, addr); -+ tmp8 |= BIT(4); -+ rtw_write8(g_test_adapter, addr, tmp8); -+ RTW_INFO(FUNC_ADPT_FMT ": read after write 0x%x=0x%x\n", -+ FUNC_ADPT_ARG(g_test_adapter), addr, rtw_read8(g_test_adapter, addr)); -+ -+ addr = 0x05; -+ tmp8 = rtw_read8(g_test_adapter, addr); -+ tmp8 |= BIT(7); -+ rtw_write8(g_test_adapter, addr, tmp8); -+ RTW_INFO(FUNC_ADPT_FMT ": read after write 0x%x=0x%x\n", -+ FUNC_ADPT_ARG(g_test_adapter), addr, rtw_read8(g_test_adapter, addr)); -+ -+ /* lock register page0 0x0~0xB read/write */ -+ rtw_write8(g_test_adapter, 0x1C, 0x0E); -+ -+ rtw_set_surprise_removed(g_test_adapter); -+ RTW_INFO(FUNC_ADPT_FMT ": bSurpriseRemoved=%s\n", -+ FUNC_ADPT_ARG(g_test_adapter), rtw_is_surprise_removed(g_test_adapter) ? "True" : "False"); -+} -+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */ -+ -+static int wifi_remove(struct platform_device *pdev) -+{ -+ struct wifi_platform_data *wifi_ctrl = -+ (struct wifi_platform_data *)(pdev->dev.platform_data); -+ -+ RTW_INFO("## %s\n", __FUNCTION__); -+ wifi_control_data = wifi_ctrl; -+ -+ wifi_set_power(0, 0); /* Power Off */ -+ wifi_set_carddetect(0); /* CardDetect (1->0) */ -+ -+ up(&wifi_control_sem); -+ return 0; -+} -+ -+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN -+static void wifi_shutdown(struct platform_device *pdev) -+{ -+ struct wifi_platform_data *wifi_ctrl = -+ (struct wifi_platform_data *)(pdev->dev.platform_data); -+ -+ -+ RTW_INFO("## %s\n", __FUNCTION__); -+ -+ wifi_control_data = wifi_ctrl; -+ -+ shutdown_card(); -+ wifi_set_power(0, 0); /* Power Off */ -+ wifi_set_carddetect(0); /* CardDetect (1->0) */ -+} -+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */ -+ -+static int wifi_suspend(struct platform_device *pdev, pm_message_t state) -+{ -+ RTW_INFO("##> %s\n", __FUNCTION__); -+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 39)) && defined(OOB_INTR_ONLY) -+ bcmsdh_oob_intr_set(0); -+#endif -+ return 0; -+} -+ -+static int wifi_resume(struct platform_device *pdev) -+{ -+ RTW_INFO("##> %s\n", __FUNCTION__); -+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 39)) && defined(OOB_INTR_ONLY) -+ if (dhd_os_check_if_up(bcmsdh_get_drvdata())) -+ bcmsdh_oob_intr_set(1); -+#endif -+ return 0; -+} -+ -+/* temporarily use these two */ -+static struct platform_driver wifi_device = { -+ .probe = wifi_probe, -+ .remove = wifi_remove, -+ .suspend = wifi_suspend, -+ .resume = wifi_resume, -+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN -+ .shutdown = wifi_shutdown, -+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */ -+ .driver = { -+ .name = "bcmdhd_wlan", -+ } -+}; -+ -+static struct platform_driver wifi_device_legacy = { -+ .probe = wifi_probe, -+ .remove = wifi_remove, -+ .suspend = wifi_suspend, -+ .resume = wifi_resume, -+ .driver = { -+ .name = "bcm4329_wlan", -+ } -+}; -+ -+static int wifi_add_dev(void) -+{ -+ RTW_INFO("## Calling platform_driver_register\n"); -+ platform_driver_register(&wifi_device); -+ platform_driver_register(&wifi_device_legacy); -+ return 0; -+} -+ -+static void wifi_del_dev(void) -+{ -+ RTW_INFO("## Unregister platform_driver_register\n"); -+ platform_driver_unregister(&wifi_device); -+ platform_driver_unregister(&wifi_device_legacy); -+} -+#endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+int wifi_configure_gpio(void) -+{ -+ if (gpio_request(oob_gpio, "oob_irq")) { -+ RTW_INFO("## %s Cannot request GPIO\n", __FUNCTION__); -+ return -1; -+ } -+ gpio_export(oob_gpio, 0); -+ if (gpio_direction_input(oob_gpio)) { -+ RTW_INFO("## %s Cannot set GPIO direction input\n", __FUNCTION__); -+ return -1; -+ } -+ oob_irq = gpio_to_irq(oob_gpio); -+ if (oob_irq < 0) { -+ RTW_INFO("## %s Cannot convert GPIO to IRQ\n", __FUNCTION__); -+ return -1; -+ } -+ -+ RTW_INFO("## %s OOB_IRQ=%d\n", __FUNCTION__, oob_irq); -+ -+ return 0; -+} -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+void wifi_free_gpio(unsigned int gpio) -+{ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ if (gpio) -+ gpio_free(gpio); -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+} -+#endif /* CONFIG_GPIO_WAKEUP */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/rtw_cfgvendor.c b/drivers/staging/rtl8723cs/os_dep/linux/rtw_cfgvendor.c -new file mode 100644 -index 000000000000..6daa9e2d6dd1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/rtw_cfgvendor.c -@@ -0,0 +1,2170 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) -+ -+/* -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+*/ -+ -+#include -+ -+#ifndef MIN -+#define MIN(x,y) (((x) < (y)) ? (x) : (y)) -+#endif -+ -+#ifdef DBG_MEM_ALLOC -+extern bool match_mstat_sniff_rules(const enum mstat_f flags, const size_t size); -+struct sk_buff *dbg_rtw_cfg80211_vendor_event_alloc(struct wiphy *wiphy, struct wireless_dev *wdev, int len, int event_id, gfp_t gfp -+ , const enum mstat_f flags, const char *func, const int line) -+{ -+ struct sk_buff *skb; -+ unsigned int truesize = 0; -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0)) -+ skb = cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp); -+#else -+ skb = cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp); -+#endif -+ -+ if (skb) -+ truesize = skb->truesize; -+ -+ if (!skb || truesize < len || match_mstat_sniff_rules(flags, truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d), skb:%p, truesize=%u\n", func, line, __FUNCTION__, len, skb, truesize); -+ -+ rtw_mstat_update( -+ flags -+ , skb ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , truesize -+ ); -+ -+ return skb; -+} -+ -+void dbg_rtw_cfg80211_vendor_event(struct sk_buff *skb, gfp_t gfp -+ , const enum mstat_f flags, const char *func, const int line) -+{ -+ unsigned int truesize = skb->truesize; -+ -+ if (match_mstat_sniff_rules(flags, truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); -+ -+ cfg80211_vendor_event(skb, gfp); -+ -+ rtw_mstat_update( -+ flags -+ , MSTAT_FREE -+ , truesize -+ ); -+} -+ -+struct sk_buff *dbg_rtw_cfg80211_vendor_cmd_alloc_reply_skb(struct wiphy *wiphy, int len -+ , const enum mstat_f flags, const char *func, const int line) -+{ -+ struct sk_buff *skb; -+ unsigned int truesize = 0; -+ -+ skb = cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len); -+ -+ if (skb) -+ truesize = skb->truesize; -+ -+ if (!skb || truesize < len || match_mstat_sniff_rules(flags, truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d), skb:%p, truesize=%u\n", func, line, __FUNCTION__, len, skb, truesize); -+ -+ rtw_mstat_update( -+ flags -+ , skb ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , truesize -+ ); -+ -+ return skb; -+} -+ -+int dbg_rtw_cfg80211_vendor_cmd_reply(struct sk_buff *skb -+ , const enum mstat_f flags, const char *func, const int line) -+{ -+ unsigned int truesize = skb->truesize; -+ int ret; -+ -+ if (match_mstat_sniff_rules(flags, truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); -+ -+ ret = cfg80211_vendor_cmd_reply(skb); -+ -+ rtw_mstat_update( -+ flags -+ , MSTAT_FREE -+ , truesize -+ ); -+ -+ return ret; -+} -+ -+#define rtw_cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp) \ -+ dbg_rtw_cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+ -+#define rtw_cfg80211_vendor_event(skb, gfp) \ -+ dbg_rtw_cfg80211_vendor_event(skb, gfp, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+ -+#define rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len) \ -+ dbg_rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+ -+#define rtw_cfg80211_vendor_cmd_reply(skb) \ -+ dbg_rtw_cfg80211_vendor_cmd_reply(skb, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -+#else -+ -+struct sk_buff *rtw_cfg80211_vendor_event_alloc( -+ struct wiphy *wiphy, struct wireless_dev *wdev, int len, int event_id, gfp_t gfp) -+{ -+ struct sk_buff *skb; -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0)) -+ skb = cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp); -+#else -+ skb = cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp); -+#endif -+ return skb; -+} -+ -+#define rtw_cfg80211_vendor_event(skb, gfp) \ -+ cfg80211_vendor_event(skb, gfp) -+ -+#define rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len) \ -+ cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len) -+ -+#define rtw_cfg80211_vendor_cmd_reply(skb) \ -+ cfg80211_vendor_cmd_reply(skb) -+#endif /* DBG_MEM_ALLOC */ -+ -+/* -+ * This API is to be used for asynchronous vendor events. This -+ * shouldn't be used in response to a vendor command from its -+ * do_it handler context (instead rtw_cfgvendor_send_cmd_reply should -+ * be used). -+ */ -+int rtw_cfgvendor_send_async_event(struct wiphy *wiphy, -+ struct net_device *dev, int event_id, const void *data, int len) -+{ -+ gfp_t kflags; -+ struct sk_buff *skb; -+ -+ kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; -+ -+ /* Alloc the SKB for vendor_event */ -+ skb = rtw_cfg80211_vendor_event_alloc(wiphy, ndev_to_wdev(dev), len, event_id, kflags); -+ if (!skb) { -+ RTW_ERR(FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(dev)); -+ return -ENOMEM; -+ } -+ -+ /* Push the data to the skb */ -+ nla_put_nohdr(skb, len, data); -+ -+ rtw_cfg80211_vendor_event(skb, kflags); -+ -+ return 0; -+} -+ -+static int rtw_cfgvendor_send_cmd_reply(struct wiphy *wiphy, -+ struct net_device *dev, const void *data, int len) -+{ -+ struct sk_buff *skb; -+ -+ /* Alloc the SKB for vendor_event */ -+ skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len); -+ if (unlikely(!skb)) { -+ RTW_ERR(FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(dev)); -+ return -ENOMEM; -+ } -+ -+ /* Push the data to the skb */ -+ nla_put_nohdr(skb, len, data); -+ -+ return rtw_cfg80211_vendor_cmd_reply(skb); -+} -+ -+/* Feature enums */ -+#define WIFI_FEATURE_INFRA 0x0001 // Basic infrastructure mode -+#define WIFI_FEATURE_INFRA_5G 0x0002 // Support for 5 GHz Band -+#define WIFI_FEATURE_HOTSPOT 0x0004 // Support for GAS/ANQP -+#define WIFI_FEATURE_P2P 0x0008 // Wifi-Direct -+#define WIFI_FEATURE_SOFT_AP 0x0010 // Soft AP -+#define WIFI_FEATURE_GSCAN 0x0020 // Google-Scan APIs -+#define WIFI_FEATURE_NAN 0x0040 // Neighbor Awareness Networking -+#define WIFI_FEATURE_D2D_RTT 0x0080 // Device-to-device RTT -+#define WIFI_FEATURE_D2AP_RTT 0x0100 // Device-to-AP RTT -+#define WIFI_FEATURE_BATCH_SCAN 0x0200 // Batched Scan (legacy) -+#define WIFI_FEATURE_PNO 0x0400 // Preferred network offload -+#define WIFI_FEATURE_ADDITIONAL_STA 0x0800 // Support for two STAs -+#define WIFI_FEATURE_TDLS 0x1000 // Tunnel directed link setup -+#define WIFI_FEATURE_TDLS_OFFCHANNEL 0x2000 // Support for TDLS off channel -+#define WIFI_FEATURE_EPR 0x4000 // Enhanced power reporting -+#define WIFI_FEATURE_AP_STA 0x8000 // Support for AP STA Concurrency -+#define WIFI_FEATURE_LINK_LAYER_STATS 0x10000 // Link layer stats collection -+#define WIFI_FEATURE_LOGGER 0x20000 // WiFi Logger -+#define WIFI_FEATURE_HAL_EPNO 0x40000 // WiFi PNO enhanced -+#define WIFI_FEATURE_RSSI_MONITOR 0x80000 // RSSI Monitor -+#define WIFI_FEATURE_MKEEP_ALIVE 0x100000 // WiFi mkeep_alive -+#define WIFI_FEATURE_CONFIG_NDO 0x200000 // ND offload configure -+#define WIFI_FEATURE_TX_TRANSMIT_POWER 0x400000 // Capture Tx transmit power levels -+#define WIFI_FEATURE_CONTROL_ROAMING 0x800000 // Enable/Disable firmware roaming -+#define WIFI_FEATURE_IE_WHITELIST 0x1000000 // Support Probe IE white listing -+#define WIFI_FEATURE_SCAN_RAND 0x2000000 // Support MAC & Probe Sequence Number randomization -+#define WIFI_FEATURE_SET_TX_POWER_LIMIT 0x4000000 // Support Tx Power Limit setting -+#define WIFI_FEATURE_USE_BODY_HEAD_SAR 0x8000000 // Support Using Body/Head Proximity for SAR -+#define WIFI_FEATURE_SET_LATENCY_MODE 0x40000000 // Support Latency mode setting -+#define WIFI_FEATURE_P2P_RAND_MAC 0x80000000 // Support Support P2P MAC randomization -+// Add more features here -+ -+#define MAX_FEATURE_SET_CONCURRRENT_GROUPS 3 -+ -+#include -+int rtw_dev_get_feature_set(struct net_device *dev) -+{ -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter); -+ int feature_set = 0; -+ -+ feature_set |= WIFI_FEATURE_INFRA; -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ if (is_supported_5g(adapter_to_regsty(adapter)->wireless_mode)) -+ feature_set |= WIFI_FEATURE_INFRA_5G; -+#endif -+ -+ feature_set |= WIFI_FEATURE_P2P; -+ feature_set |= WIFI_FEATURE_SOFT_AP; -+ -+ feature_set |= WIFI_FEATURE_ADDITIONAL_STA; -+#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS -+ feature_set |= WIFI_FEATURE_LINK_LAYER_STATS; -+#endif /* CONFIG_RTW_CFGVENDOR_LLSTATS */ -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RSSIMONITOR -+ feature_set |= WIFI_FEATURE_RSSI_MONITOR; -+#endif -+ -+#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER -+ feature_set |= WIFI_FEATURE_LOGGER; -+#endif -+ -+#ifdef CONFIG_RTW_WIFI_HAL -+ feature_set |= WIFI_FEATURE_CONFIG_NDO; -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ feature_set |= WIFI_FEATURE_SCAN_RAND; -+#endif -+#endif -+ -+ return feature_set; -+} -+ -+int *rtw_dev_get_feature_set_matrix(struct net_device *dev, int *num) -+{ -+ int feature_set_full, mem_needed; -+ int *ret; -+ -+ *num = 0; -+ mem_needed = sizeof(int) * MAX_FEATURE_SET_CONCURRRENT_GROUPS; -+ ret = (int *)rtw_malloc(mem_needed); -+ -+ if (!ret) { -+ RTW_ERR(FUNC_NDEV_FMT" failed to allocate %d bytes\n" -+ , FUNC_NDEV_ARG(dev), mem_needed); -+ return ret; -+ } -+ -+ feature_set_full = rtw_dev_get_feature_set(dev); -+ -+ ret[0] = (feature_set_full & WIFI_FEATURE_INFRA) | -+ (feature_set_full & WIFI_FEATURE_INFRA_5G) | -+ (feature_set_full & WIFI_FEATURE_NAN) | -+ (feature_set_full & WIFI_FEATURE_D2D_RTT) | -+ (feature_set_full & WIFI_FEATURE_D2AP_RTT) | -+ (feature_set_full & WIFI_FEATURE_PNO) | -+ (feature_set_full & WIFI_FEATURE_BATCH_SCAN) | -+ (feature_set_full & WIFI_FEATURE_GSCAN) | -+ (feature_set_full & WIFI_FEATURE_HOTSPOT) | -+ (feature_set_full & WIFI_FEATURE_ADDITIONAL_STA) | -+ (feature_set_full & WIFI_FEATURE_EPR); -+ -+ ret[1] = (feature_set_full & WIFI_FEATURE_INFRA) | -+ (feature_set_full & WIFI_FEATURE_INFRA_5G) | -+ /* Not yet verified NAN with P2P */ -+ /* (feature_set_full & WIFI_FEATURE_NAN) | */ -+ (feature_set_full & WIFI_FEATURE_P2P) | -+ (feature_set_full & WIFI_FEATURE_D2AP_RTT) | -+ (feature_set_full & WIFI_FEATURE_D2D_RTT) | -+ (feature_set_full & WIFI_FEATURE_EPR); -+ -+ ret[2] = (feature_set_full & WIFI_FEATURE_INFRA) | -+ (feature_set_full & WIFI_FEATURE_INFRA_5G) | -+ (feature_set_full & WIFI_FEATURE_NAN) | -+ (feature_set_full & WIFI_FEATURE_D2D_RTT) | -+ (feature_set_full & WIFI_FEATURE_D2AP_RTT) | -+ (feature_set_full & WIFI_FEATURE_TDLS) | -+ (feature_set_full & WIFI_FEATURE_TDLS_OFFCHANNEL) | -+ (feature_set_full & WIFI_FEATURE_EPR); -+ *num = MAX_FEATURE_SET_CONCURRRENT_GROUPS; -+ -+ return ret; -+} -+ -+static int rtw_cfgvendor_get_feature_set(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ int reply; -+ -+ reply = rtw_dev_get_feature_set(wdev_to_ndev(wdev)); -+ -+ err = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), &reply, sizeof(int)); -+ -+ if (unlikely(err)) -+ RTW_ERR(FUNC_NDEV_FMT" Vendor Command reply failed ret:%d\n" -+ , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); -+ -+ return err; -+} -+ -+static int rtw_cfgvendor_get_feature_set_matrix(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ struct sk_buff *skb; -+ int *reply; -+ int num, mem_needed, i; -+ -+ reply = rtw_dev_get_feature_set_matrix(wdev_to_ndev(wdev), &num); -+ -+ if (!reply) { -+ RTW_ERR(FUNC_NDEV_FMT" Could not get feature list matrix\n" -+ , FUNC_NDEV_ARG(wdev_to_ndev(wdev))); -+ err = -EINVAL; -+ return err; -+ } -+ -+ mem_needed = VENDOR_REPLY_OVERHEAD + (ATTRIBUTE_U32_LEN * num) + -+ ATTRIBUTE_U32_LEN; -+ -+ /* Alloc the SKB for vendor_event */ -+ skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed); -+ if (unlikely(!skb)) { -+ RTW_ERR(FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(wdev_to_ndev(wdev))); -+ err = -ENOMEM; -+ goto exit; -+ } -+ -+ nla_put_u32(skb, ANDR_WIFI_ATTRIBUTE_NUM_FEATURE_SET, num); -+ for (i = 0; i < num; i++) -+ nla_put_u32(skb, ANDR_WIFI_ATTRIBUTE_FEATURE_SET, reply[i]); -+ -+ err = rtw_cfg80211_vendor_cmd_reply(skb); -+ -+ if (unlikely(err)) -+ RTW_ERR(FUNC_NDEV_FMT" Vendor Command reply failed ret:%d\n" -+ , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); -+exit: -+ rtw_mfree((u8 *)reply, sizeof(int) * num); -+ return err; -+} -+ -+#if defined(GSCAN_SUPPORT) && 0 -+int rtw_cfgvendor_send_hotlist_event(struct wiphy *wiphy, -+ struct net_device *dev, void *data, int len, rtw_vendor_event_t event) -+{ -+ u16 kflags; -+ const void *ptr; -+ struct sk_buff *skb; -+ int malloc_len, total, iter_cnt_to_send, cnt; -+ gscan_results_cache_t *cache = (gscan_results_cache_t *)data; -+ -+ total = len / sizeof(wifi_gscan_result_t); -+ while (total > 0) { -+ malloc_len = (total * sizeof(wifi_gscan_result_t)) + VENDOR_DATA_OVERHEAD; -+ if (malloc_len > NLMSG_DEFAULT_SIZE) -+ malloc_len = NLMSG_DEFAULT_SIZE; -+ iter_cnt_to_send = -+ (malloc_len - VENDOR_DATA_OVERHEAD) / sizeof(wifi_gscan_result_t); -+ total = total - iter_cnt_to_send; -+ -+ kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; -+ -+ /* Alloc the SKB for vendor_event */ -+ skb = rtw_cfg80211_vendor_event_alloc(wiphy, ndev_to_wdev(dev), malloc_len, event, kflags); -+ if (!skb) { -+ WL_ERR(("skb alloc failed")); -+ return -ENOMEM; -+ } -+ -+ while (cache && iter_cnt_to_send) { -+ ptr = (const void *) &cache->results[cache->tot_consumed]; -+ -+ if (iter_cnt_to_send < (cache->tot_count - cache->tot_consumed)) -+ cnt = iter_cnt_to_send; -+ else -+ cnt = (cache->tot_count - cache->tot_consumed); -+ -+ iter_cnt_to_send -= cnt; -+ cache->tot_consumed += cnt; -+ /* Push the data to the skb */ -+ nla_append(skb, cnt * sizeof(wifi_gscan_result_t), ptr); -+ if (cache->tot_consumed == cache->tot_count) -+ cache = cache->next; -+ -+ } -+ -+ rtw_cfg80211_vendor_event(skb, kflags); -+ } -+ -+ return 0; -+} -+ -+ -+static int rtw_cfgvendor_gscan_get_capabilities(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ dhd_pno_gscan_capabilities_t *reply = NULL; -+ uint32 reply_len = 0; -+ -+ -+ reply = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg), -+ DHD_PNO_GET_CAPABILITIES, NULL, &reply_len); -+ if (!reply) { -+ WL_ERR(("Could not get capabilities\n")); -+ err = -EINVAL; -+ return err; -+ } -+ -+ err = rtw_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg), -+ reply, reply_len); -+ -+ if (unlikely(err)) -+ WL_ERR(("Vendor Command reply failed ret:%d\n", err)); -+ -+ kfree(reply); -+ return err; -+} -+ -+static int rtw_cfgvendor_gscan_get_channel_list(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0, type, band; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ uint16 *reply = NULL; -+ uint32 reply_len = 0, num_channels, mem_needed; -+ struct sk_buff *skb; -+ -+ type = nla_type(data); -+ -+ if (type == GSCAN_ATTRIBUTE_BAND) -+ band = nla_get_u32(data); -+ else -+ return -1; -+ -+ reply = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg), -+ DHD_PNO_GET_CHANNEL_LIST, &band, &reply_len); -+ -+ if (!reply) { -+ WL_ERR(("Could not get channel list\n")); -+ err = -EINVAL; -+ return err; -+ } -+ num_channels = reply_len / sizeof(uint32); -+ mem_needed = reply_len + VENDOR_REPLY_OVERHEAD + (ATTRIBUTE_U32_LEN * 2); -+ -+ /* Alloc the SKB for vendor_event */ -+ skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed); -+ if (unlikely(!skb)) { -+ WL_ERR(("skb alloc failed")); -+ err = -ENOMEM; -+ goto exit; -+ } -+ -+ nla_put_u32(skb, GSCAN_ATTRIBUTE_NUM_CHANNELS, num_channels); -+ nla_put(skb, GSCAN_ATTRIBUTE_CHANNEL_LIST, reply_len, reply); -+ -+ err = rtw_cfg80211_vendor_cmd_reply(skb); -+ -+ if (unlikely(err)) -+ WL_ERR(("Vendor Command reply failed ret:%d\n", err)); -+exit: -+ kfree(reply); -+ return err; -+} -+ -+static int rtw_cfgvendor_gscan_get_batch_results(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ gscan_results_cache_t *results, *iter; -+ uint32 reply_len, complete = 0, num_results_iter; -+ int32 mem_needed; -+ wifi_gscan_result_t *ptr; -+ uint16 num_scan_ids, num_results; -+ struct sk_buff *skb; -+ struct nlattr *scan_hdr; -+ -+ dhd_dev_wait_batch_results_complete(bcmcfg_to_prmry_ndev(cfg)); -+ dhd_dev_pno_lock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); -+ results = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg), -+ DHD_PNO_GET_BATCH_RESULTS, NULL, &reply_len); -+ -+ if (!results) { -+ WL_ERR(("No results to send %d\n", err)); -+ err = rtw_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg), -+ results, 0); -+ -+ if (unlikely(err)) -+ WL_ERR(("Vendor Command reply failed ret:%d\n", err)); -+ dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); -+ return err; -+ } -+ num_scan_ids = reply_len & 0xFFFF; -+ num_results = (reply_len & 0xFFFF0000) >> 16; -+ mem_needed = (num_results * sizeof(wifi_gscan_result_t)) + -+ (num_scan_ids * GSCAN_BATCH_RESULT_HDR_LEN) + -+ VENDOR_REPLY_OVERHEAD + SCAN_RESULTS_COMPLETE_FLAG_LEN; -+ -+ if (mem_needed > (int32)NLMSG_DEFAULT_SIZE) { -+ mem_needed = (int32)NLMSG_DEFAULT_SIZE; -+ complete = 0; -+ } else -+ complete = 1; -+ -+ WL_TRACE(("complete %d mem_needed %d max_mem %d\n", complete, mem_needed, -+ (int)NLMSG_DEFAULT_SIZE)); -+ /* Alloc the SKB for vendor_event */ -+ skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed); -+ if (unlikely(!skb)) { -+ WL_ERR(("skb alloc failed")); -+ dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); -+ return -ENOMEM; -+ } -+ iter = results; -+ -+ nla_put_u32(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS_COMPLETE, complete); -+ -+ mem_needed = mem_needed - (SCAN_RESULTS_COMPLETE_FLAG_LEN + VENDOR_REPLY_OVERHEAD); -+ -+ while (iter && ((mem_needed - GSCAN_BATCH_RESULT_HDR_LEN) > 0)) { -+ scan_hdr = nla_nest_start(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS); -+ nla_put_u32(skb, GSCAN_ATTRIBUTE_SCAN_ID, iter->scan_id); -+ nla_put_u8(skb, GSCAN_ATTRIBUTE_SCAN_FLAGS, iter->flag); -+ num_results_iter = -+ (mem_needed - GSCAN_BATCH_RESULT_HDR_LEN) / sizeof(wifi_gscan_result_t); -+ -+ if ((iter->tot_count - iter->tot_consumed) < num_results_iter) -+ num_results_iter = iter->tot_count - iter->tot_consumed; -+ -+ nla_put_u32(skb, GSCAN_ATTRIBUTE_NUM_OF_RESULTS, num_results_iter); -+ if (num_results_iter) { -+ ptr = &iter->results[iter->tot_consumed]; -+ iter->tot_consumed += num_results_iter; -+ nla_put(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS, -+ num_results_iter * sizeof(wifi_gscan_result_t), ptr); -+ } -+ nla_nest_end(skb, scan_hdr); -+ mem_needed -= GSCAN_BATCH_RESULT_HDR_LEN + -+ (num_results_iter * sizeof(wifi_gscan_result_t)); -+ iter = iter->next; -+ } -+ -+ dhd_dev_gscan_batch_cache_cleanup(bcmcfg_to_prmry_ndev(cfg)); -+ dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); -+ -+ return rtw_cfg80211_vendor_cmd_reply(skb); -+} -+ -+static int rtw_cfgvendor_initiate_gscan(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ int type, tmp = len; -+ int run = 0xFF; -+ int flush = 0; -+ const struct nlattr *iter; -+ -+ nla_for_each_attr(iter, data, len, tmp) { -+ type = nla_type(iter); -+ if (type == GSCAN_ATTRIBUTE_ENABLE_FEATURE) -+ run = nla_get_u32(iter); -+ else if (type == GSCAN_ATTRIBUTE_FLUSH_FEATURE) -+ flush = nla_get_u32(iter); -+ } -+ -+ if (run != 0xFF) { -+ err = dhd_dev_pno_run_gscan(bcmcfg_to_prmry_ndev(cfg), run, flush); -+ -+ if (unlikely(err)) -+ WL_ERR(("Could not run gscan:%d\n", err)); -+ return err; -+ } else -+ return -1; -+ -+ -+} -+ -+static int rtw_cfgvendor_enable_full_scan_result(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ int type; -+ bool real_time = FALSE; -+ -+ type = nla_type(data); -+ -+ if (type == GSCAN_ATTRIBUTE_ENABLE_FULL_SCAN_RESULTS) { -+ real_time = nla_get_u32(data); -+ -+ err = dhd_dev_pno_enable_full_scan_result(bcmcfg_to_prmry_ndev(cfg), real_time); -+ -+ if (unlikely(err)) -+ WL_ERR(("Could not run gscan:%d\n", err)); -+ -+ } else -+ err = -1; -+ -+ return err; -+} -+ -+static int rtw_cfgvendor_set_scan_cfg(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ gscan_scan_params_t *scan_param; -+ int j = 0; -+ int type, tmp, tmp1, tmp2, k = 0; -+ const struct nlattr *iter, *iter1, *iter2; -+ struct dhd_pno_gscan_channel_bucket *ch_bucket; -+ -+ scan_param = kzalloc(sizeof(gscan_scan_params_t), GFP_KERNEL); -+ if (!scan_param) { -+ WL_ERR(("Could not set GSCAN scan cfg, mem alloc failure\n")); -+ err = -EINVAL; -+ return err; -+ -+ } -+ -+ scan_param->scan_fr = PNO_SCAN_MIN_FW_SEC; -+ nla_for_each_attr(iter, data, len, tmp) { -+ type = nla_type(iter); -+ -+ if (j >= GSCAN_MAX_CH_BUCKETS) -+ break; -+ -+ switch (type) { -+ case GSCAN_ATTRIBUTE_BASE_PERIOD: -+ scan_param->scan_fr = nla_get_u32(iter) / 1000; -+ break; -+ case GSCAN_ATTRIBUTE_NUM_BUCKETS: -+ scan_param->nchannel_buckets = nla_get_u32(iter); -+ break; -+ case GSCAN_ATTRIBUTE_CH_BUCKET_1: -+ case GSCAN_ATTRIBUTE_CH_BUCKET_2: -+ case GSCAN_ATTRIBUTE_CH_BUCKET_3: -+ case GSCAN_ATTRIBUTE_CH_BUCKET_4: -+ case GSCAN_ATTRIBUTE_CH_BUCKET_5: -+ case GSCAN_ATTRIBUTE_CH_BUCKET_6: -+ case GSCAN_ATTRIBUTE_CH_BUCKET_7: -+ nla_for_each_nested(iter1, iter, tmp1) { -+ type = nla_type(iter1); -+ ch_bucket = -+ scan_param->channel_bucket; -+ -+ switch (type) { -+ case GSCAN_ATTRIBUTE_BUCKET_ID: -+ break; -+ case GSCAN_ATTRIBUTE_BUCKET_PERIOD: -+ ch_bucket[j].bucket_freq_multiple = -+ nla_get_u32(iter1) / 1000; -+ break; -+ case GSCAN_ATTRIBUTE_BUCKET_NUM_CHANNELS: -+ ch_bucket[j].num_channels = -+ nla_get_u32(iter1); -+ break; -+ case GSCAN_ATTRIBUTE_BUCKET_CHANNELS: -+ nla_for_each_nested(iter2, iter1, tmp2) { -+ if (k >= PFN_SWC_RSSI_WINDOW_MAX) -+ break; -+ ch_bucket[j].chan_list[k] = -+ nla_get_u32(iter2); -+ k++; -+ } -+ k = 0; -+ break; -+ case GSCAN_ATTRIBUTE_BUCKETS_BAND: -+ ch_bucket[j].band = (uint16) -+ nla_get_u32(iter1); -+ break; -+ case GSCAN_ATTRIBUTE_REPORT_EVENTS: -+ ch_bucket[j].report_flag = (uint8) -+ nla_get_u32(iter1); -+ break; -+ } -+ } -+ j++; -+ break; -+ } -+ } -+ -+ if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), -+ DHD_PNO_SCAN_CFG_ID, scan_param, 0) < 0) { -+ WL_ERR(("Could not set GSCAN scan cfg\n")); -+ err = -EINVAL; -+ } -+ -+ kfree(scan_param); -+ return err; -+ -+} -+ -+static int rtw_cfgvendor_hotlist_cfg(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ gscan_hotlist_scan_params_t *hotlist_params; -+ int tmp, tmp1, tmp2, type, j = 0, dummy; -+ const struct nlattr *outer, *inner, *iter; -+ uint8 flush = 0; -+ struct bssid_t *pbssid; -+ -+ hotlist_params = (gscan_hotlist_scan_params_t *)kzalloc(len, GFP_KERNEL); -+ if (!hotlist_params) { -+ WL_ERR(("Cannot Malloc mem to parse config commands size - %d bytes\n", len)); -+ return -1; -+ } -+ -+ hotlist_params->lost_ap_window = GSCAN_LOST_AP_WINDOW_DEFAULT; -+ -+ nla_for_each_attr(iter, data, len, tmp2) { -+ type = nla_type(iter); -+ switch (type) { -+ case GSCAN_ATTRIBUTE_HOTLIST_BSSIDS: -+ pbssid = hotlist_params->bssid; -+ nla_for_each_nested(outer, iter, tmp) { -+ nla_for_each_nested(inner, outer, tmp1) { -+ type = nla_type(inner); -+ -+ switch (type) { -+ case GSCAN_ATTRIBUTE_BSSID: -+ memcpy(&(pbssid[j].macaddr), -+ nla_data(inner), ETHER_ADDR_LEN); -+ break; -+ case GSCAN_ATTRIBUTE_RSSI_LOW: -+ pbssid[j].rssi_reporting_threshold = -+ (int8) nla_get_u8(inner); -+ break; -+ case GSCAN_ATTRIBUTE_RSSI_HIGH: -+ dummy = (int8) nla_get_u8(inner); -+ break; -+ } -+ } -+ j++; -+ } -+ hotlist_params->nbssid = j; -+ break; -+ case GSCAN_ATTRIBUTE_HOTLIST_FLUSH: -+ flush = nla_get_u8(iter); -+ break; -+ case GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE: -+ hotlist_params->lost_ap_window = nla_get_u32(iter); -+ break; -+ } -+ -+ } -+ -+ if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), -+ DHD_PNO_GEOFENCE_SCAN_CFG_ID, hotlist_params, flush) < 0) { -+ WL_ERR(("Could not set GSCAN HOTLIST cfg\n")); -+ err = -EINVAL; -+ goto exit; -+ } -+exit: -+ kfree(hotlist_params); -+ return err; -+} -+static int rtw_cfgvendor_set_batch_scan_cfg(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0, tmp, type; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ gscan_batch_params_t batch_param; -+ const struct nlattr *iter; -+ -+ batch_param.mscan = batch_param.bestn = 0; -+ batch_param.buffer_threshold = GSCAN_BATCH_NO_THR_SET; -+ -+ nla_for_each_attr(iter, data, len, tmp) { -+ type = nla_type(iter); -+ -+ switch (type) { -+ case GSCAN_ATTRIBUTE_NUM_AP_PER_SCAN: -+ batch_param.bestn = nla_get_u32(iter); -+ break; -+ case GSCAN_ATTRIBUTE_NUM_SCANS_TO_CACHE: -+ batch_param.mscan = nla_get_u32(iter); -+ break; -+ case GSCAN_ATTRIBUTE_REPORT_THRESHOLD: -+ batch_param.buffer_threshold = nla_get_u32(iter); -+ break; -+ } -+ } -+ -+ if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), -+ DHD_PNO_BATCH_SCAN_CFG_ID, &batch_param, 0) < 0) { -+ WL_ERR(("Could not set batch cfg\n")); -+ err = -EINVAL; -+ return err; -+ } -+ -+ return err; -+} -+ -+static int rtw_cfgvendor_significant_change_cfg(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ gscan_swc_params_t *significant_params; -+ int tmp, tmp1, tmp2, type, j = 0; -+ const struct nlattr *outer, *inner, *iter; -+ uint8 flush = 0; -+ wl_pfn_significant_bssid_t *pbssid; -+ -+ significant_params = (gscan_swc_params_t *) kzalloc(len, GFP_KERNEL); -+ if (!significant_params) { -+ WL_ERR(("Cannot Malloc mem to parse config commands size - %d bytes\n", len)); -+ return -1; -+ } -+ -+ -+ nla_for_each_attr(iter, data, len, tmp2) { -+ type = nla_type(iter); -+ -+ switch (type) { -+ case GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_FLUSH: -+ flush = nla_get_u8(iter); -+ break; -+ case GSCAN_ATTRIBUTE_RSSI_SAMPLE_SIZE: -+ significant_params->rssi_window = nla_get_u16(iter); -+ break; -+ case GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE: -+ significant_params->lost_ap_window = nla_get_u16(iter); -+ break; -+ case GSCAN_ATTRIBUTE_MIN_BREACHING: -+ significant_params->swc_threshold = nla_get_u16(iter); -+ break; -+ case GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_BSSIDS: -+ pbssid = significant_params->bssid_elem_list; -+ nla_for_each_nested(outer, iter, tmp) { -+ nla_for_each_nested(inner, outer, tmp1) { -+ switch (nla_type(inner)) { -+ case GSCAN_ATTRIBUTE_BSSID: -+ memcpy(&(pbssid[j].macaddr), -+ nla_data(inner), -+ ETHER_ADDR_LEN); -+ break; -+ case GSCAN_ATTRIBUTE_RSSI_HIGH: -+ pbssid[j].rssi_high_threshold = -+ (int8) nla_get_u8(inner); -+ break; -+ case GSCAN_ATTRIBUTE_RSSI_LOW: -+ pbssid[j].rssi_low_threshold = -+ (int8) nla_get_u8(inner); -+ break; -+ } -+ } -+ j++; -+ } -+ break; -+ } -+ } -+ significant_params->nbssid = j; -+ -+ if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), -+ DHD_PNO_SIGNIFICANT_SCAN_CFG_ID, significant_params, flush) < 0) { -+ WL_ERR(("Could not set GSCAN significant cfg\n")); -+ err = -EINVAL; -+ goto exit; -+ } -+exit: -+ kfree(significant_params); -+ return err; -+} -+#endif /* GSCAN_SUPPORT */ -+ -+#if defined(RTT_SUPPORT) && 0 -+void rtw_cfgvendor_rtt_evt(void *ctx, void *rtt_data) -+{ -+ struct wireless_dev *wdev = (struct wireless_dev *)ctx; -+ struct wiphy *wiphy; -+ struct sk_buff *skb; -+ uint32 tot_len = NLMSG_DEFAULT_SIZE, entry_len = 0; -+ gfp_t kflags; -+ rtt_report_t *rtt_report = NULL; -+ rtt_result_t *rtt_result = NULL; -+ struct list_head *rtt_list; -+ wiphy = wdev->wiphy; -+ -+ WL_DBG(("In\n")); -+ /* Push the data to the skb */ -+ if (!rtt_data) { -+ WL_ERR(("rtt_data is NULL\n")); -+ goto exit; -+ } -+ rtt_list = (struct list_head *)rtt_data; -+ kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; -+ /* Alloc the SKB for vendor_event */ -+ skb = rtw_cfg80211_vendor_event_alloc(wiphy, wdev, tot_len, GOOGLE_RTT_COMPLETE_EVENT, kflags); -+ if (!skb) { -+ WL_ERR(("skb alloc failed")); -+ goto exit; -+ } -+ /* fill in the rtt results on each entry */ -+ list_for_each_entry(rtt_result, rtt_list, list) { -+ entry_len = 0; -+ if (rtt_result->TOF_type == TOF_TYPE_ONE_WAY) { -+ entry_len = sizeof(rtt_report_t); -+ rtt_report = kzalloc(entry_len, kflags); -+ if (!rtt_report) { -+ WL_ERR(("rtt_report alloc failed")); -+ goto exit; -+ } -+ rtt_report->addr = rtt_result->peer_mac; -+ rtt_report->num_measurement = 1; /* ONE SHOT */ -+ rtt_report->status = rtt_result->err_code; -+ rtt_report->type = (rtt_result->TOF_type == TOF_TYPE_ONE_WAY) ? RTT_ONE_WAY : RTT_TWO_WAY; -+ rtt_report->peer = rtt_result->target_info->peer; -+ rtt_report->channel = rtt_result->target_info->channel; -+ rtt_report->rssi = rtt_result->avg_rssi; -+ /* tx_rate */ -+ rtt_report->tx_rate = rtt_result->tx_rate; -+ /* RTT */ -+ rtt_report->rtt = rtt_result->meanrtt; -+ rtt_report->rtt_sd = rtt_result->sdrtt; -+ /* convert to centi meter */ -+ if (rtt_result->distance != 0xffffffff) -+ rtt_report->distance = (rtt_result->distance >> 2) * 25; -+ else /* invalid distance */ -+ rtt_report->distance = -1; -+ -+ rtt_report->ts = rtt_result->ts; -+ nla_append(skb, entry_len, rtt_report); -+ kfree(rtt_report); -+ } -+ } -+ rtw_cfg80211_vendor_event(skb, kflags); -+exit: -+ return; -+} -+ -+static int rtw_cfgvendor_rtt_set_config(struct wiphy *wiphy, struct wireless_dev *wdev, -+ const void *data, int len) -+{ -+ int err = 0, rem, rem1, rem2, type; -+ rtt_config_params_t rtt_param; -+ rtt_target_info_t *rtt_target = NULL; -+ const struct nlattr *iter, *iter1, *iter2; -+ int8 eabuf[ETHER_ADDR_STR_LEN]; -+ int8 chanbuf[CHANSPEC_STR_LEN]; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ -+ WL_DBG(("In\n")); -+ err = dhd_dev_rtt_register_noti_callback(wdev->netdev, wdev, wl_cfgvendor_rtt_evt); -+ if (err < 0) { -+ WL_ERR(("failed to register rtt_noti_callback\n")); -+ goto exit; -+ } -+ memset(&rtt_param, 0, sizeof(rtt_param)); -+ nla_for_each_attr(iter, data, len, rem) { -+ type = nla_type(iter); -+ switch (type) { -+ case RTT_ATTRIBUTE_TARGET_CNT: -+ rtt_param.rtt_target_cnt = nla_get_u8(iter); -+ if (rtt_param.rtt_target_cnt > RTT_MAX_TARGET_CNT) { -+ WL_ERR(("exceed max target count : %d\n", -+ rtt_param.rtt_target_cnt)); -+ err = BCME_RANGE; -+ } -+ break; -+ case RTT_ATTRIBUTE_TARGET_INFO: -+ rtt_target = rtt_param.target_info; -+ nla_for_each_nested(iter1, iter, rem1) { -+ nla_for_each_nested(iter2, iter1, rem2) { -+ type = nla_type(iter2); -+ switch (type) { -+ case RTT_ATTRIBUTE_TARGET_MAC: -+ memcpy(&rtt_target->addr, nla_data(iter2), ETHER_ADDR_LEN); -+ break; -+ case RTT_ATTRIBUTE_TARGET_TYPE: -+ rtt_target->type = nla_get_u8(iter2); -+ break; -+ case RTT_ATTRIBUTE_TARGET_PEER: -+ rtt_target->peer = nla_get_u8(iter2); -+ break; -+ case RTT_ATTRIBUTE_TARGET_CHAN: -+ memcpy(&rtt_target->channel, nla_data(iter2), -+ sizeof(rtt_target->channel)); -+ break; -+ case RTT_ATTRIBUTE_TARGET_MODE: -+ rtt_target->continuous = nla_get_u8(iter2); -+ break; -+ case RTT_ATTRIBUTE_TARGET_INTERVAL: -+ rtt_target->interval = nla_get_u32(iter2); -+ break; -+ case RTT_ATTRIBUTE_TARGET_NUM_MEASUREMENT: -+ rtt_target->measure_cnt = nla_get_u32(iter2); -+ break; -+ case RTT_ATTRIBUTE_TARGET_NUM_PKT: -+ rtt_target->ftm_cnt = nla_get_u32(iter2); -+ break; -+ case RTT_ATTRIBUTE_TARGET_NUM_RETRY: -+ rtt_target->retry_cnt = nla_get_u32(iter2); -+ } -+ } -+ /* convert to chanspec value */ -+ rtt_target->chanspec = dhd_rtt_convert_to_chspec(rtt_target->channel); -+ if (rtt_target->chanspec == 0) { -+ WL_ERR(("Channel is not valid\n")); -+ goto exit; -+ } -+ WL_INFORM(("Target addr %s, Channel : %s for RTT\n", -+ bcm_ether_ntoa((const struct ether_addr *)&rtt_target->addr, eabuf), -+ wf_chspec_ntoa(rtt_target->chanspec, chanbuf))); -+ rtt_target++; -+ } -+ break; -+ } -+ } -+ WL_DBG(("leave :target_cnt : %d\n", rtt_param.rtt_target_cnt)); -+ if (dhd_dev_rtt_set_cfg(bcmcfg_to_prmry_ndev(cfg), &rtt_param) < 0) { -+ WL_ERR(("Could not set RTT configuration\n")); -+ err = -EINVAL; -+ } -+exit: -+ return err; -+} -+ -+static int rtw_cfgvendor_rtt_cancel_config(struct wiphy *wiphy, struct wireless_dev *wdev, -+ const void *data, int len) -+{ -+ int err = 0, rem, type, target_cnt = 0; -+ const struct nlattr *iter; -+ struct ether_addr *mac_list = NULL, *mac_addr = NULL; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ -+ nla_for_each_attr(iter, data, len, rem) { -+ type = nla_type(iter); -+ switch (type) { -+ case RTT_ATTRIBUTE_TARGET_CNT: -+ target_cnt = nla_get_u8(iter); -+ mac_list = (struct ether_addr *)kzalloc(target_cnt * ETHER_ADDR_LEN , GFP_KERNEL); -+ if (mac_list == NULL) { -+ WL_ERR(("failed to allocate mem for mac list\n")); -+ goto exit; -+ } -+ mac_addr = &mac_list[0]; -+ break; -+ case RTT_ATTRIBUTE_TARGET_MAC: -+ if (mac_addr) -+ memcpy(mac_addr++, nla_data(iter), ETHER_ADDR_LEN); -+ else { -+ WL_ERR(("mac_list is NULL\n")); -+ goto exit; -+ } -+ break; -+ } -+ if (dhd_dev_rtt_cancel_cfg(bcmcfg_to_prmry_ndev(cfg), mac_list, target_cnt) < 0) { -+ WL_ERR(("Could not cancel RTT configuration\n")); -+ err = -EINVAL; -+ goto exit; -+ } -+ } -+exit: -+ if (mac_list) -+ kfree(mac_list); -+ return err; -+} -+static int rtw_cfgvendor_rtt_get_capability(struct wiphy *wiphy, struct wireless_dev *wdev, -+ const void *data, int len) -+{ -+ int err = 0; -+ struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); -+ rtt_capabilities_t capability; -+ -+ err = dhd_dev_rtt_capability(bcmcfg_to_prmry_ndev(cfg), &capability); -+ if (unlikely(err)) { -+ WL_ERR(("Vendor Command reply failed ret:%d\n", err)); -+ goto exit; -+ } -+ err = rtw_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg), -+ &capability, sizeof(capability)); -+ -+ if (unlikely(err)) -+ WL_ERR(("Vendor Command reply failed ret:%d\n", err)); -+exit: -+ return err; -+} -+ -+#endif /* RTT_SUPPORT */ -+ -+#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS -+enum { -+ LSTATS_SUBCMD_GET_INFO = ANDROID_NL80211_SUBCMD_LSTATS_RANGE_START, -+ LSTATS_SUBCMD_SET_INFO, -+ LSTATS_SUBCMD_CLEAR_INFO, -+}; -+static void LinkLayerStats(_adapter *padapter) -+{ -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ struct recv_priv *precvpriv = &(padapter->recvpriv); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ u32 ps_time, trx_total_time; -+ u64 tx_bytes, rx_bytes, trx_total_bytes = 0; -+ u64 tmp = 0; -+ -+ RTW_DBG("%s adapter type : %u\n", __func__, padapter->adapter_type); -+ -+ tx_bytes = 0; -+ rx_bytes = 0; -+ ps_time = 0; -+ trx_total_time = 0; -+ -+ if ( padapter->netif_up == _TRUE ) { -+ -+ pwrpriv->on_time = rtw_get_passing_time_ms(pwrpriv->radio_on_start_time); -+ -+ if (rtw_mi_check_fwstate(padapter, WIFI_ASOC_STATE)) { -+ if ( pwrpriv->bpower_saving == _TRUE ) { -+ pwrpriv->pwr_saving_time += rtw_get_passing_time_ms(pwrpriv->pwr_saving_start_time); -+ pwrpriv->pwr_saving_start_time = rtw_get_current_time(); -+ } -+ } else { -+#ifdef CONFIG_IPS -+ if ( pwrpriv->bpower_saving == _TRUE ) { -+ pwrpriv->pwr_saving_time += rtw_get_passing_time_ms(pwrpriv->pwr_saving_start_time); -+ pwrpriv->pwr_saving_start_time = rtw_get_current_time(); -+ } -+#else -+ pwrpriv->pwr_saving_time = pwrpriv->on_time; -+#endif -+ } -+ -+ ps_time = pwrpriv->pwr_saving_time; -+ -+ /* Deviation caused by caculation start time */ -+ if ( ps_time > pwrpriv->on_time ) -+ ps_time = pwrpriv->on_time; -+ -+ tx_bytes = pdvobjpriv->traffic_stat.last_tx_bytes; -+ rx_bytes = pdvobjpriv->traffic_stat.last_rx_bytes; -+ trx_total_bytes = tx_bytes + rx_bytes; -+ -+ trx_total_time = pwrpriv->on_time - ps_time; -+ -+ if ( trx_total_bytes == 0) { -+ pwrpriv->tx_time = 0; -+ pwrpriv->rx_time = 0; -+ } else { -+ -+ /* tx_time = (trx_total_time * tx_total_bytes) / trx_total_bytes; */ -+ /* rx_time = (trx_total_time * rx_total_bytes) / trx_total_bytes; */ -+ -+ tmp = (tx_bytes * trx_total_time); -+ tmp = rtw_division64(tmp, trx_total_bytes); -+ pwrpriv->tx_time = tmp; -+ -+ tmp = (rx_bytes * trx_total_time); -+ tmp = rtw_division64(tmp, trx_total_bytes); -+ pwrpriv->rx_time = tmp; -+ -+ } -+ -+ } -+ else { -+ pwrpriv->on_time = 0; -+ pwrpriv->tx_time = 0; -+ pwrpriv->rx_time = 0; -+ } -+ -+#ifdef CONFIG_RTW_WIFI_HAL_DEBUG -+ RTW_INFO("- tx_bytes : %llu rx_bytes : %llu total bytes : %llu\n", tx_bytes, rx_bytes, trx_total_bytes); -+ RTW_INFO("- netif_up = %s, on_time : %u ms\n", padapter->netif_up ? "1":"0", pwrpriv->on_time); -+ RTW_INFO("- pwr_saving_time : %u (%u) ms\n", pwrpriv->pwr_saving_time, ps_time); -+ RTW_INFO("- trx_total_time : %u ms\n", trx_total_time); -+ RTW_INFO("- tx_time : %u ms\n", pwrpriv->tx_time); -+ RTW_INFO("- rx_time : %u ms\n", pwrpriv->rx_time); -+#endif /* CONFIG_RTW_WIFI_HAL_DEBUG */ -+ -+} -+ -+#define DUMMY_TIME_STATICS 99 -+static int rtw_cfgvendor_lstats_get_info(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ wifi_radio_stat_internal *radio; -+ wifi_iface_stat *iface; -+ char *output; -+ -+ output = rtw_malloc(sizeof(wifi_radio_stat_internal) + sizeof(wifi_iface_stat)); -+ if (output == NULL) { -+ RTW_DBG("Allocate lstats info buffer fail!\n"); -+ } -+ -+ radio = (wifi_radio_stat_internal *)output; -+ -+ radio->num_channels = 0; -+ radio->radio = 1; -+ -+ /* to get on_time, tx_time, rx_time */ -+ LinkLayerStats(padapter); -+ -+ radio->on_time = pwrpriv->on_time; -+ radio->tx_time = pwrpriv->tx_time; -+ radio->rx_time = pwrpriv->rx_time; -+ radio->on_time_scan = 0; -+ radio->on_time_nbd = 0; -+ radio->on_time_gscan = 0; -+ radio->on_time_pno_scan = 0; -+ radio->on_time_hs20 = 0; -+ #ifdef CONFIG_RTW_WIFI_HAL_DEBUG -+ RTW_INFO("==== %s ====\n", __func__); -+ RTW_INFO("radio->radio : %d\n", (radio->radio)); -+ RTW_INFO("pwrpriv->on_time : %u ms\n", (pwrpriv->on_time)); -+ RTW_INFO("pwrpriv->tx_time : %u ms\n", (pwrpriv->tx_time)); -+ RTW_INFO("pwrpriv->rx_time : %u ms\n", (pwrpriv->rx_time)); -+ RTW_INFO("radio->on_time : %u ms\n", (radio->on_time)); -+ RTW_INFO("radio->tx_time : %u ms\n", (radio->tx_time)); -+ RTW_INFO("radio->rx_time : %u ms\n", (radio->rx_time)); -+ #endif /* CONFIG_RTW_WIFI_HAL_DEBUG */ -+ -+ RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); -+ err = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), -+ output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat_internal)); -+ if (unlikely(err)) -+ RTW_ERR(FUNC_NDEV_FMT"Vendor Command reply failed ret:%d \n" -+ , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); -+ rtw_mfree(output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat_internal)); -+ return err; -+} -+static int rtw_cfgvendor_lstats_set_info(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ RTW_INFO("%s\n", __func__); -+ return err; -+} -+static int rtw_cfgvendor_lstats_clear_info(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ RTW_INFO("%s\n", __func__); -+ return err; -+} -+#endif /* CONFIG_RTW_CFGVENDOR_LLSTATS */ -+#ifdef CONFIG_RTW_CFGVENDOR_RSSIMONITOR -+static int rtw_cfgvendor_set_rssi_monitor(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ int err = 0, rem, type; -+ const struct nlattr *iter; -+ -+ RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); -+ -+ nla_for_each_attr(iter, data, len, rem) { -+ type = nla_type(iter); -+ -+ switch (type) { -+ case RSSI_MONITOR_ATTRIBUTE_MAX_RSSI: -+ pwdev_priv->rssi_monitor_max = (s8)nla_get_u32(iter);; -+ break; -+ case RSSI_MONITOR_ATTRIBUTE_MIN_RSSI: -+ pwdev_priv->rssi_monitor_min = (s8)nla_get_u32(iter); -+ break; -+ case RSSI_MONITOR_ATTRIBUTE_START: -+ pwdev_priv->rssi_monitor_enable = (u8)nla_get_u32(iter); -+ break; -+ } -+ } -+ -+ return err; -+} -+ -+void rtw_cfgvendor_rssi_monitor_evt(_adapter *padapter) { -+ struct wireless_dev *wdev = padapter->rtw_wdev; -+ struct wiphy *wiphy= wdev->wiphy; -+ struct recv_priv *precvpriv = &padapter->recvpriv; -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ struct wlan_network *pcur_network = &pmlmepriv->cur_network; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); -+ struct sk_buff *skb; -+ u32 tot_len = NLMSG_DEFAULT_SIZE; -+ gfp_t kflags; -+ rssi_monitor_evt data ; -+ s8 rssi = precvpriv->rssi; -+ -+ if (pwdev_priv->rssi_monitor_enable == 0 || check_fwstate(pmlmepriv, WIFI_ASOC_STATE) != _TRUE) -+ return; -+ -+ if (rssi < pwdev_priv->rssi_monitor_max || rssi > pwdev_priv->rssi_monitor_min) -+ return; -+ -+ kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; -+ -+ /* Alloc the SKB for vendor_event */ -+ skb = rtw_cfg80211_vendor_event_alloc(wiphy, wdev, tot_len, GOOGLE_RSSI_MONITOR_EVENT, kflags); -+ if (!skb) { -+ goto exit; -+ } -+ -+ _rtw_memset(&data, 0, sizeof(data)); -+ -+ data.version = RSSI_MONITOR_EVT_VERSION; -+ data.cur_rssi = rssi; -+ _rtw_memcpy(data.BSSID, pcur_network->network.MacAddress, sizeof(mac_addr)); -+ -+ nla_append(skb, sizeof(data), &data); -+ -+ rtw_cfg80211_vendor_event(skb, kflags); -+exit: -+ return; -+} -+#endif /* CONFIG_RTW_CFGVENDOR_RSSIMONITR */ -+ -+#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER -+static int rtw_cfgvendor_logger_start_logging(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int ret = 0, rem, type; -+ char ring_name[32] = {0}; -+ int log_level = 0, flags = 0, time_intval = 0, threshold = 0; -+ const struct nlattr *iter; -+ -+ nla_for_each_attr(iter, data, len, rem) { -+ type = nla_type(iter); -+ switch (type) { -+ case LOGGER_ATTRIBUTE_RING_NAME: -+ strncpy(ring_name, nla_data(iter), -+ MIN(sizeof(ring_name) -1, nla_len(iter))); -+ break; -+ case LOGGER_ATTRIBUTE_LOG_LEVEL: -+ log_level = nla_get_u32(iter); -+ break; -+ case LOGGER_ATTRIBUTE_RING_FLAGS: -+ flags = nla_get_u32(iter); -+ break; -+ case LOGGER_ATTRIBUTE_LOG_TIME_INTVAL: -+ time_intval = nla_get_u32(iter); -+ break; -+ case LOGGER_ATTRIBUTE_LOG_MIN_DATA_SIZE: -+ threshold = nla_get_u32(iter); -+ break; -+ default: -+ RTW_ERR("Unknown type: %d\n", type); -+ ret = WIFI_ERROR_INVALID_ARGS; -+ goto exit; -+ } -+ } -+ -+exit: -+ return ret; -+} -+static int rtw_cfgvendor_logger_get_feature(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ u32 supported_features = 0; -+ -+ err = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), &supported_features, sizeof(supported_features)); -+ -+ if (unlikely(err)) -+ RTW_ERR(FUNC_NDEV_FMT" Vendor Command reply failed ret:%d\n" -+ , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); -+ -+ return err; -+} -+static int rtw_cfgvendor_logger_get_version(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); -+ HAL_DATA_TYPE *hal = GET_HAL_DATA(padapter); -+ int ret = 0, rem, type; -+ int buf_len = 1024; -+ char *buf_ptr; -+ const struct nlattr *iter; -+ gfp_t kflags; -+ -+ kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; -+ buf_ptr = kzalloc(buf_len, kflags); -+ if (!buf_ptr) { -+ RTW_ERR("failed to allocate the buffer for version n"); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ nla_for_each_attr(iter, data, len, rem) { -+ type = nla_type(iter); -+ switch (type) { -+ case LOGGER_ATTRIBUTE_GET_DRIVER: -+ memcpy(buf_ptr, DRIVERVERSION, strlen(DRIVERVERSION)+1); -+ break; -+ case LOGGER_ATTRIBUTE_GET_FW: -+ sprintf(buf_ptr, "v%d.%d", hal->firmware_version, hal->firmware_sub_version); -+ break; -+ default: -+ RTW_ERR("Unknown type: %d\n", type); -+ ret = -EINVAL; -+ goto exit; -+ } -+ } -+ if (ret < 0) { -+ RTW_ERR("failed to get the version %d\n", ret); -+ goto exit; -+ } -+ -+ -+ ret = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), buf_ptr, strlen(buf_ptr)); -+exit: -+ kfree(buf_ptr); -+ return ret; -+} -+ -+static int rtw_cfgvendor_logger_get_ring_status(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int ret = 0; -+ int ring_id; -+ char ring_buf_name[] = "RTW_RING_BUFFER"; -+ -+ struct sk_buff *skb; -+ wifi_ring_buffer_status ring_status; -+ -+ -+ _rtw_memcpy(ring_status.name, ring_buf_name, strlen(ring_buf_name)+1); -+ ring_status.ring_id = 1; -+ /* Alloc the SKB for vendor_event */ -+ skb = cfg80211_vendor_cmd_alloc_reply_skb(wiphy, -+ sizeof(wifi_ring_buffer_status)); -+ if (!skb) { -+ RTW_ERR("skb allocation is failed\n"); -+ ret = FAIL; -+ goto exit; -+ } -+ -+ nla_put_u32(skb, LOGGER_ATTRIBUTE_RING_NUM, 1); -+ nla_put(skb, LOGGER_ATTRIBUTE_RING_STATUS, sizeof(wifi_ring_buffer_status), -+ &ring_status); -+ ret = cfg80211_vendor_cmd_reply(skb); -+ -+ if (ret) { -+ RTW_ERR("Vendor Command reply failed ret:%d \n", ret); -+ } -+exit: -+ return ret; -+} -+ -+static int rtw_cfgvendor_logger_get_ring_data(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int ret = 0, rem, type; -+ char ring_name[32] = {0}; -+ const struct nlattr *iter; -+ -+ nla_for_each_attr(iter, data, len, rem) { -+ type = nla_type(iter); -+ switch (type) { -+ case LOGGER_ATTRIBUTE_RING_NAME: -+ strncpy(ring_name, nla_data(iter), -+ MIN(sizeof(ring_name) -1, nla_len(iter))); -+ RTW_INFO(" %s LOGGER_ATTRIBUTE_RING_NAME : %s\n", __func__, ring_name); -+ break; -+ default: -+ RTW_ERR("Unknown type: %d\n", type); -+ return ret; -+ } -+ } -+ -+ -+ return ret; -+} -+ -+static int rtw_cfgvendor_logger_get_firmware_memory_dump(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int ret = WIFI_ERROR_NOT_SUPPORTED; -+ -+ return ret; -+} -+ -+static int rtw_cfgvendor_logger_start_pkt_fate_monitoring(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int ret = WIFI_SUCCESS; -+ -+ return ret; -+} -+ -+static int rtw_cfgvendor_logger_get_tx_pkt_fates(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int ret = WIFI_SUCCESS; -+ -+ return ret; -+} -+ -+static int rtw_cfgvendor_logger_get_rx_pkt_fates(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int ret = WIFI_SUCCESS; -+ -+ return ret; -+} -+ -+#endif /* CONFIG_RTW_CFGVENDOR_WIFI_LOGGER */ -+#ifdef CONFIG_RTW_WIFI_HAL -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ -+#ifndef ETHER_ISMULTI -+#define ETHER_ISMULTI(ea) (((const u8 *)(ea))[0] & 1) -+#endif -+ -+ -+static u8 null_addr[ETH_ALEN] = {0}; -+static void rtw_hal_random_gen_mac_addr(u8 *mac_addr) -+{ -+ do { -+ get_random_bytes(&mac_addr[3], ETH_ALEN-3); -+ if (memcmp(mac_addr, null_addr, ETH_ALEN) != 0) -+ break; -+ } while(1); -+} -+ -+void rtw_hal_pno_random_gen_mac_addr(PADAPTER adapter) -+{ -+ u8 mac_addr[ETH_ALEN]; -+ struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); -+ -+ memcpy(mac_addr, pwdev_priv->pno_mac_addr, ETH_ALEN); -+ if (mac_addr[0] == 0xFF) return; -+ rtw_hal_random_gen_mac_addr(mac_addr); -+ memcpy(pwdev_priv->pno_mac_addr, mac_addr, ETH_ALEN); -+#ifdef CONFIG_RTW_DEBUG -+ print_hex_dump(KERN_DEBUG, "pno_mac_addr: ", -+ DUMP_PREFIX_OFFSET, 16, 1, pwdev_priv->pno_mac_addr, -+ ETH_ALEN, 1); -+#endif -+} -+ -+void rtw_hal_set_hw_mac_addr(PADAPTER adapter, u8 *mac_addr) -+{ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ LeaveAllPowerSaveModeDirect(adapter); -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_hal_change_macaddr_mbid(adapter, mac_addr); -+#else -+ rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, mac_addr); -+#endif -+#ifdef CONFIG_RTW_DEBUG -+ rtw_hal_dump_macaddr(RTW_DBGDUMP, adapter); -+#endif -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+} -+ -+static int rtw_cfgvendor_set_rand_mac_oui(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ PADAPTER adapter; -+ void *devaddr; -+ struct net_device *netdev; -+ int type, mac_len; -+ u8 pno_random_mac_oui[3]; -+ u8 mac_addr[ETH_ALEN] = {0}; -+ struct pwrctrl_priv *pwrctl; -+ struct rtw_wdev_priv *pwdev_priv; -+ -+ type = nla_type(data); -+ mac_len = nla_len(data); -+ if (mac_len != 3) { -+ RTW_ERR("%s oui len error %d != 3\n", __func__, mac_len); -+ return -1; -+ } -+ -+ if (type == ANDR_WIFI_ATTRIBUTE_RANDOM_MAC_OUI) { -+ memcpy(pno_random_mac_oui, nla_data(data), 3); -+ print_hex_dump(KERN_DEBUG, "pno_random_mac_oui: ", -+ DUMP_PREFIX_OFFSET, 16, 1, pno_random_mac_oui, -+ 3, 1); -+ -+ if (ETHER_ISMULTI(pno_random_mac_oui)) { -+ pr_err("%s: oui is multicast address\n", __func__); -+ return -1; -+ } -+ -+ adapter = wiphy_to_adapter(wiphy); -+ if (adapter == NULL) { -+ pr_err("%s: wiphy_to_adapter == NULL\n", __func__); -+ return -1; -+ } -+ -+ pwdev_priv = adapter_wdev_data(adapter); -+ -+ memcpy(mac_addr, pno_random_mac_oui, 3); -+ rtw_hal_random_gen_mac_addr(mac_addr); -+ memcpy(pwdev_priv->pno_mac_addr, mac_addr, ETH_ALEN); -+#ifdef CONFIG_RTW_DEBUG -+ print_hex_dump(KERN_DEBUG, "pno_mac_addr: ", -+ DUMP_PREFIX_OFFSET, 16, 1, pwdev_priv->pno_mac_addr, -+ ETH_ALEN, 1); -+#endif -+ } else { -+ RTW_ERR("%s oui type error %x != 0x2\n", __func__, type); -+ err = -1; -+ } -+ -+ -+ return err; -+} -+ -+#endif -+ -+#ifdef CONFIG_RTW_CFGVENDOR_WIFI_OFFLOAD -+static int rtw_cfgvendor_start_mkeep_alive(struct wiphy *wiphy, struct wireless_dev *wdev, -+ const void *data, int len) -+{ -+ int ret = WIFI_SUCCESS; -+ -+ RTW_INFO("%s : TODO\n", __func__); -+ -+ return ret; -+} -+ -+static int rtw_cfgvendor_stop_mkeep_alive(struct wiphy *wiphy, struct wireless_dev *wdev, -+ const void *data, int len) -+{ -+ int ret = WIFI_SUCCESS; -+ -+ RTW_INFO("%s : TODO\n", __func__); -+ -+ return ret; -+} -+#endif -+ -+static int rtw_cfgvendor_set_nodfs_flag(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ int type; -+ u32 nodfs = 0; -+ _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); -+ -+ RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); -+ -+ type = nla_type(data); -+ if (type == ANDR_WIFI_ATTRIBUTE_NODFS_SET) { -+ nodfs = nla_get_u32(data); -+ adapter_to_dvobj(padapter)->nodfs = nodfs; -+ } else { -+ err = -EINVAL; -+ } -+ -+ RTW_INFO("%s nodfs=%d, err=%d\n", __func__, nodfs, err); -+ -+ return err; -+} -+ -+static int rtw_cfgvendor_set_country(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+#define CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ -+ int err = 0, rem, type; -+ char country_code[CNTRY_BUF_SZ] = {0}; -+ const struct nlattr *iter; -+ _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); -+ -+ RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); -+ -+ nla_for_each_attr(iter, data, len, rem) { -+ type = nla_type(iter); -+ switch (type) { -+ case ANDR_WIFI_ATTRIBUTE_COUNTRY: -+ _rtw_memcpy(country_code, nla_data(iter), -+ MIN(nla_len(iter), CNTRY_BUF_SZ)); -+ break; -+ default: -+ RTW_ERR("Unknown type: %d\n", type); -+ return -EINVAL; -+ } -+ } -+ -+ RTW_INFO("%s country_code:\"%c%c\" \n", __func__, country_code[0], country_code[1]); -+ -+ rtw_set_country(padapter, country_code); -+ -+ return err; -+} -+ -+static int rtw_cfgvendor_set_nd_offload(struct wiphy *wiphy, -+ struct wireless_dev *wdev, const void *data, int len) -+{ -+ int err = 0; -+ int type; -+ u8 nd_en = 0; -+ _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); -+ -+ RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); -+ -+ type = nla_type(data); -+ if (type == ANDR_WIFI_ATTRIBUTE_ND_OFFLOAD_VALUE) { -+ nd_en = nla_get_u8(data); -+ /* ND has been enabled when wow is enabled */ -+ } else { -+ err = -EINVAL; -+ } -+ -+ RTW_INFO("%s nd_en=%d, err=%d\n", __func__, nd_en, err); -+ -+ return err; -+} -+#endif /* CONFIG_RTW_WIFI_HAL */ -+ -+static const struct wiphy_vendor_command rtw_vendor_cmds[] = { -+#if defined(GSCAN_SUPPORT) && 0 -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = GSCAN_SUBCMD_GET_CAPABILITIES -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_gscan_get_capabilities -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = GSCAN_SUBCMD_SET_CONFIG -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_set_scan_cfg -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = GSCAN_SUBCMD_SET_SCAN_CONFIG -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_set_batch_scan_cfg -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = GSCAN_SUBCMD_ENABLE_GSCAN -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_initiate_gscan -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = GSCAN_SUBCMD_ENABLE_FULL_SCAN_RESULTS -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_enable_full_scan_result -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = GSCAN_SUBCMD_SET_HOTLIST -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_hotlist_cfg -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = GSCAN_SUBCMD_SET_SIGNIFICANT_CHANGE_CONFIG -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_significant_change_cfg -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = GSCAN_SUBCMD_GET_SCAN_RESULTS -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_gscan_get_batch_results -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = GSCAN_SUBCMD_GET_CHANNEL_LIST -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_gscan_get_channel_list -+ }, -+#endif /* GSCAN_SUPPORT */ -+#if defined(RTT_SUPPORT) && 0 -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = RTT_SUBCMD_SET_CONFIG -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_rtt_set_config -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = RTT_SUBCMD_CANCEL_CONFIG -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_rtt_cancel_config -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = RTT_SUBCMD_GETCAPABILITY -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+ .doit = rtw_cfgvendor_rtt_get_capability -+ }, -+#endif /* RTT_SUPPORT */ -+#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LSTATS_SUBCMD_GET_INFO -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_lstats_get_info -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LSTATS_SUBCMD_SET_INFO -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_lstats_set_info -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LSTATS_SUBCMD_CLEAR_INFO -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_lstats_clear_info -+ }, -+#endif /* CONFIG_RTW_CFGVENDOR_LLSTATS */ -+#ifdef CONFIG_RTW_CFGVENDOR_RSSIMONITOR -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = WIFI_SUBCMD_SET_RSSI_MONITOR -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_set_rssi_monitor -+ }, -+#endif /* CONFIG_RTW_CFGVENDOR_RSSIMONITOR */ -+#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LOGGER_START_LOGGING -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_logger_start_logging -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LOGGER_GET_FEATURE -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_logger_get_feature -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LOGGER_GET_VER -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_logger_get_version -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LOGGER_GET_RING_STATUS -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_logger_get_ring_status -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LOGGER_GET_RING_DATA -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_logger_get_ring_data -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LOGGER_TRIGGER_MEM_DUMP -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_logger_get_firmware_memory_dump -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LOGGER_START_PKT_FATE_MONITORING -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_logger_start_pkt_fate_monitoring -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LOGGER_GET_TX_PKT_FATES -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_logger_get_tx_pkt_fates -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = LOGGER_GET_RX_PKT_FATES -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_logger_get_rx_pkt_fates -+ }, -+#endif /* CONFIG_RTW_CFGVENDOR_WIFI_LOGGER */ -+#ifdef CONFIG_RTW_WIFI_HAL -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = WIFI_SUBCMD_SET_PNO_RANDOM_MAC_OUI -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_set_rand_mac_oui -+ }, -+#endif -+#ifdef CONFIG_RTW_CFGVENDOR_WIFI_OFFLOAD -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = WIFI_OFFLOAD_SUBCMD_START_MKEEP_ALIVE -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_start_mkeep_alive -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = WIFI_OFFLOAD_SUBCMD_STOP_MKEEP_ALIVE -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_stop_mkeep_alive -+ }, -+#endif -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = WIFI_SUBCMD_NODFS_SET -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_set_nodfs_flag -+ -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = WIFI_SUBCMD_SET_COUNTRY_CODE -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_set_country -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = WIFI_SUBCMD_CONFIG_ND_OFFLOAD -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_set_nd_offload -+ }, -+#endif /* CONFIG_RTW_WIFI_HAL */ -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = WIFI_SUBCMD_GET_FEATURE_SET -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_get_feature_set -+ }, -+ { -+ { -+ .vendor_id = OUI_GOOGLE, -+ .subcmd = WIFI_SUBCMD_GET_FEATURE_SET_MATRIX -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0)) -+ .policy = VENDOR_CMD_RAW_DATA, -+#endif -+ .doit = rtw_cfgvendor_get_feature_set_matrix -+ } -+}; -+ -+static const struct nl80211_vendor_cmd_info rtw_vendor_events[] = { -+#if defined(GSCAN_SUPPORT) && 0 -+ { OUI_GOOGLE, GSCAN_EVENT_SIGNIFICANT_CHANGE_RESULTS }, -+ { OUI_GOOGLE, GSCAN_EVENT_HOTLIST_RESULTS_FOUND }, -+ { OUI_GOOGLE, GSCAN_EVENT_SCAN_RESULTS_AVAILABLE }, -+ { OUI_GOOGLE, GSCAN_EVENT_FULL_SCAN_RESULTS }, -+#endif /* GSCAN_SUPPORT */ -+#if defined(RTT_SUPPORT) && 0 -+ { OUI_GOOGLE, RTT_EVENT_COMPLETE }, -+#endif /* RTT_SUPPORT */ -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RSSIMONITOR -+ { OUI_GOOGLE, GOOGLE_RSSI_MONITOR_EVENT }, -+#endif /* RTW_CFGVENDOR_RSSIMONITR */ -+ -+#if defined(GSCAN_SUPPORT) && 0 -+ { OUI_GOOGLE, GSCAN_EVENT_COMPLETE_SCAN }, -+ { OUI_GOOGLE, GSCAN_EVENT_HOTLIST_RESULTS_LOST } -+#endif /* GSCAN_SUPPORT */ -+}; -+ -+int rtw_cfgvendor_attach(struct wiphy *wiphy) -+{ -+ -+ RTW_INFO("Register RTW cfg80211 vendor cmd(0x%x) interface\n", NL80211_CMD_VENDOR); -+ -+ wiphy->vendor_commands = rtw_vendor_cmds; -+ wiphy->n_vendor_commands = ARRAY_SIZE(rtw_vendor_cmds); -+ wiphy->vendor_events = rtw_vendor_events; -+ wiphy->n_vendor_events = ARRAY_SIZE(rtw_vendor_events); -+ -+ return 0; -+} -+ -+int rtw_cfgvendor_detach(struct wiphy *wiphy) -+{ -+ RTW_INFO("Vendor: Unregister RTW cfg80211 vendor interface\n"); -+ -+ wiphy->vendor_commands = NULL; -+ wiphy->vendor_events = NULL; -+ wiphy->n_vendor_commands = 0; -+ wiphy->n_vendor_events = 0; -+ -+ return 0; -+} -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) */ -+ -+#endif /* CONFIG_IOCTL_CFG80211 */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/rtw_cfgvendor.h b/drivers/staging/rtl8723cs/os_dep/linux/rtw_cfgvendor.h -new file mode 100644 -index 000000000000..0e59b2b9454e ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/rtw_cfgvendor.h -@@ -0,0 +1,636 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef _RTW_CFGVENDOR_H_ -+#define _RTW_CFGVENDOR_H_ -+ -+#define OUI_GOOGLE 0x001A11 -+#define ATTRIBUTE_U32_LEN (NLA_HDRLEN + 4) -+#define VENDOR_ID_OVERHEAD ATTRIBUTE_U32_LEN -+#define VENDOR_SUBCMD_OVERHEAD ATTRIBUTE_U32_LEN -+#define VENDOR_DATA_OVERHEAD (NLA_HDRLEN) -+ -+#define SCAN_RESULTS_COMPLETE_FLAG_LEN ATTRIBUTE_U32_LEN -+#define SCAN_INDEX_HDR_LEN (NLA_HDRLEN) -+#define SCAN_ID_HDR_LEN ATTRIBUTE_U32_LEN -+#define SCAN_FLAGS_HDR_LEN ATTRIBUTE_U32_LEN -+#define GSCAN_NUM_RESULTS_HDR_LEN ATTRIBUTE_U32_LEN -+#define GSCAN_RESULTS_HDR_LEN (NLA_HDRLEN) -+#define GSCAN_BATCH_RESULT_HDR_LEN (SCAN_INDEX_HDR_LEN + SCAN_ID_HDR_LEN + \ -+ SCAN_FLAGS_HDR_LEN + \ -+ GSCAN_NUM_RESULTS_HDR_LEN + \ -+ GSCAN_RESULTS_HDR_LEN) -+ -+#define VENDOR_REPLY_OVERHEAD (VENDOR_ID_OVERHEAD + \ -+ VENDOR_SUBCMD_OVERHEAD + \ -+ VENDOR_DATA_OVERHEAD) -+typedef enum { -+ /* don't use 0 as a valid subcommand */ -+ VENDOR_NL80211_SUBCMD_UNSPECIFIED, -+ -+ /* define all vendor startup commands between 0x0 and 0x0FFF */ -+ VENDOR_NL80211_SUBCMD_RANGE_START = 0x0001, -+ VENDOR_NL80211_SUBCMD_RANGE_END = 0x0FFF, -+ -+ /* define all GScan related commands between 0x1000 and 0x10FF */ -+ ANDROID_NL80211_SUBCMD_GSCAN_RANGE_START = 0x1000, -+ ANDROID_NL80211_SUBCMD_GSCAN_RANGE_END = 0x10FF, -+ -+ /* define all NearbyDiscovery related commands between 0x1100 and 0x11FF */ -+ ANDROID_NL80211_SUBCMD_NBD_RANGE_START = 0x1100, -+ ANDROID_NL80211_SUBCMD_NBD_RANGE_END = 0x11FF, -+ -+ /* define all RTT related commands between 0x1100 and 0x11FF */ -+ ANDROID_NL80211_SUBCMD_RTT_RANGE_START = 0x1100, -+ ANDROID_NL80211_SUBCMD_RTT_RANGE_END = 0x11FF, -+ -+ ANDROID_NL80211_SUBCMD_LSTATS_RANGE_START = 0x1200, -+ ANDROID_NL80211_SUBCMD_LSTATS_RANGE_END = 0x12FF, -+ -+ /* define all Logger related commands between 0x1400 and 0x14FF */ -+ ANDROID_NL80211_SUBCMD_DEBUG_RANGE_START = 0x1400, -+ ANDROID_NL80211_SUBCMD_DEBUG_RANGE_END = 0x14FF, -+ -+ /* define all wifi offload related commands between 0x1600 and 0x16FF */ -+ ANDROID_NL80211_SUBCMD_WIFI_OFFLOAD_RANGE_START = 0x1600, -+ ANDROID_NL80211_SUBCMD_WIFI_OFFLOAD_RANGE_END = 0x16FF, -+ -+ /* define all NAN related commands between 0x1700 and 0x17FF */ -+ ANDROID_NL80211_SUBCMD_NAN_RANGE_START = 0x1700, -+ ANDROID_NL80211_SUBCMD_NAN_RANGE_END = 0x17FF, -+ -+ /* define all Android Packet Filter related commands between 0x1800 and 0x18FF */ -+ ANDROID_NL80211_SUBCMD_PKT_FILTER_RANGE_START = 0x1800, -+ ANDROID_NL80211_SUBCMD_PKT_FILTER_RANGE_END = 0x18FF, -+ -+ /* This is reserved for future usage */ -+ -+} ANDROID_VENDOR_SUB_COMMAND; -+ -+enum rtw_vendor_subcmd { -+ GSCAN_SUBCMD_GET_CAPABILITIES = ANDROID_NL80211_SUBCMD_GSCAN_RANGE_START, -+ -+ GSCAN_SUBCMD_SET_CONFIG, /* 0x1001 */ -+ -+ GSCAN_SUBCMD_SET_SCAN_CONFIG, /* 0x1002 */ -+ GSCAN_SUBCMD_ENABLE_GSCAN, /* 0x1003 */ -+ GSCAN_SUBCMD_GET_SCAN_RESULTS, /* 0x1004 */ -+ GSCAN_SUBCMD_SCAN_RESULTS, /* 0x1005 */ -+ -+ GSCAN_SUBCMD_SET_HOTLIST, /* 0x1006 */ -+ -+ GSCAN_SUBCMD_SET_SIGNIFICANT_CHANGE_CONFIG, /* 0x1007 */ -+ GSCAN_SUBCMD_ENABLE_FULL_SCAN_RESULTS, /* 0x1008 */ -+ GSCAN_SUBCMD_GET_CHANNEL_LIST, /* 0x1009 */ -+ -+ WIFI_SUBCMD_GET_FEATURE_SET, /* 0x100A */ -+ WIFI_SUBCMD_GET_FEATURE_SET_MATRIX, /* 0x100B */ -+ WIFI_SUBCMD_SET_PNO_RANDOM_MAC_OUI, /* 0x100C */ -+ WIFI_SUBCMD_NODFS_SET, /* 0x100D */ -+ WIFI_SUBCMD_SET_COUNTRY_CODE, /* 0x100E */ -+ /* Add more sub commands here */ -+ GSCAN_SUBCMD_SET_EPNO_SSID, /* 0x100F */ -+ -+ WIFI_SUBCMD_SET_SSID_WHITE_LIST, /* 0x1010 */ -+ WIFI_SUBCMD_SET_ROAM_PARAMS, /* 0x1011 */ -+ WIFI_SUBCMD_ENABLE_LAZY_ROAM, /* 0x1012 */ -+ WIFI_SUBCMD_SET_BSSID_PREF, /* 0x1013 */ -+ WIFI_SUBCMD_SET_BSSID_BLACKLIST, /* 0x1014 */ -+ -+ GSCAN_SUBCMD_ANQPO_CONFIG, /* 0x1015 */ -+ WIFI_SUBCMD_SET_RSSI_MONITOR, /* 0x1016 */ -+ WIFI_SUBCMD_CONFIG_ND_OFFLOAD, /* 0x1017 */ -+ /* Add more sub commands here */ -+ -+ GSCAN_SUBCMD_MAX, -+ -+ RTT_SUBCMD_SET_CONFIG = ANDROID_NL80211_SUBCMD_RTT_RANGE_START, -+ RTT_SUBCMD_CANCEL_CONFIG, -+ RTT_SUBCMD_GETCAPABILITY, -+ -+ APF_SUBCMD_GET_CAPABILITIES = ANDROID_NL80211_SUBCMD_PKT_FILTER_RANGE_START, -+ APF_SUBCMD_SET_FILTER, -+ -+ LOGGER_START_LOGGING = ANDROID_NL80211_SUBCMD_DEBUG_RANGE_START, -+ LOGGER_TRIGGER_MEM_DUMP, -+ LOGGER_GET_MEM_DUMP, -+ LOGGER_GET_VER, -+ LOGGER_GET_RING_STATUS, -+ LOGGER_GET_RING_DATA, -+ LOGGER_GET_FEATURE, -+ LOGGER_RESET_LOGGING, -+ LOGGER_TRIGGER_DRIVER_MEM_DUMP, -+ LOGGER_GET_DRIVER_MEM_DUMP, -+ LOGGER_START_PKT_FATE_MONITORING, -+ LOGGER_GET_TX_PKT_FATES, -+ LOGGER_GET_RX_PKT_FATES, -+ -+ WIFI_OFFLOAD_SUBCMD_START_MKEEP_ALIVE = ANDROID_NL80211_SUBCMD_WIFI_OFFLOAD_RANGE_START, -+ WIFI_OFFLOAD_SUBCMD_STOP_MKEEP_ALIVE, -+ -+ VENDOR_SUBCMD_MAX -+}; -+ -+enum gscan_attributes { -+ GSCAN_ATTRIBUTE_NUM_BUCKETS = 10, -+ GSCAN_ATTRIBUTE_BASE_PERIOD, -+ GSCAN_ATTRIBUTE_BUCKETS_BAND, -+ GSCAN_ATTRIBUTE_BUCKET_ID, -+ GSCAN_ATTRIBUTE_BUCKET_PERIOD, -+ GSCAN_ATTRIBUTE_BUCKET_NUM_CHANNELS, -+ GSCAN_ATTRIBUTE_BUCKET_CHANNELS, -+ GSCAN_ATTRIBUTE_NUM_AP_PER_SCAN, -+ GSCAN_ATTRIBUTE_REPORT_THRESHOLD, -+ GSCAN_ATTRIBUTE_NUM_SCANS_TO_CACHE, -+ GSCAN_ATTRIBUTE_BAND = GSCAN_ATTRIBUTE_BUCKETS_BAND, -+ -+ GSCAN_ATTRIBUTE_ENABLE_FEATURE = 20, -+ GSCAN_ATTRIBUTE_SCAN_RESULTS_COMPLETE, -+ GSCAN_ATTRIBUTE_FLUSH_FEATURE, -+ GSCAN_ATTRIBUTE_ENABLE_FULL_SCAN_RESULTS, -+ GSCAN_ATTRIBUTE_REPORT_EVENTS, -+ /* remaining reserved for additional attributes */ -+ GSCAN_ATTRIBUTE_NUM_OF_RESULTS = 30, -+ GSCAN_ATTRIBUTE_FLUSH_RESULTS, -+ GSCAN_ATTRIBUTE_SCAN_RESULTS, /* flat array of wifi_scan_result */ -+ GSCAN_ATTRIBUTE_SCAN_ID, /* indicates scan number */ -+ GSCAN_ATTRIBUTE_SCAN_FLAGS, /* indicates if scan was aborted */ -+ GSCAN_ATTRIBUTE_AP_FLAGS, /* flags on significant change event */ -+ GSCAN_ATTRIBUTE_NUM_CHANNELS, -+ GSCAN_ATTRIBUTE_CHANNEL_LIST, -+ -+ /* remaining reserved for additional attributes */ -+ -+ GSCAN_ATTRIBUTE_SSID = 40, -+ GSCAN_ATTRIBUTE_BSSID, -+ GSCAN_ATTRIBUTE_CHANNEL, -+ GSCAN_ATTRIBUTE_RSSI, -+ GSCAN_ATTRIBUTE_TIMESTAMP, -+ GSCAN_ATTRIBUTE_RTT, -+ GSCAN_ATTRIBUTE_RTTSD, -+ -+ /* remaining reserved for additional attributes */ -+ -+ GSCAN_ATTRIBUTE_HOTLIST_BSSIDS = 50, -+ GSCAN_ATTRIBUTE_RSSI_LOW, -+ GSCAN_ATTRIBUTE_RSSI_HIGH, -+ GSCAN_ATTRIBUTE_HOSTLIST_BSSID_ELEM, -+ GSCAN_ATTRIBUTE_HOTLIST_FLUSH, -+ -+ /* remaining reserved for additional attributes */ -+ GSCAN_ATTRIBUTE_RSSI_SAMPLE_SIZE = 60, -+ GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE, -+ GSCAN_ATTRIBUTE_MIN_BREACHING, -+ GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_BSSIDS, -+ GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_FLUSH, -+ GSCAN_ATTRIBUTE_MAX -+}; -+ -+enum gscan_bucket_attributes { -+ GSCAN_ATTRIBUTE_CH_BUCKET_1, -+ GSCAN_ATTRIBUTE_CH_BUCKET_2, -+ GSCAN_ATTRIBUTE_CH_BUCKET_3, -+ GSCAN_ATTRIBUTE_CH_BUCKET_4, -+ GSCAN_ATTRIBUTE_CH_BUCKET_5, -+ GSCAN_ATTRIBUTE_CH_BUCKET_6, -+ GSCAN_ATTRIBUTE_CH_BUCKET_7 -+}; -+ -+enum gscan_ch_attributes { -+ GSCAN_ATTRIBUTE_CH_ID_1, -+ GSCAN_ATTRIBUTE_CH_ID_2, -+ GSCAN_ATTRIBUTE_CH_ID_3, -+ GSCAN_ATTRIBUTE_CH_ID_4, -+ GSCAN_ATTRIBUTE_CH_ID_5, -+ GSCAN_ATTRIBUTE_CH_ID_6, -+ GSCAN_ATTRIBUTE_CH_ID_7 -+}; -+ -+enum wifi_rssi_monitor_attr { -+ RSSI_MONITOR_ATTRIBUTE_MAX_RSSI, -+ RSSI_MONITOR_ATTRIBUTE_MIN_RSSI, -+ RSSI_MONITOR_ATTRIBUTE_START, -+}; -+ -+ -+enum rtt_attributes { -+ RTT_ATTRIBUTE_TARGET_CNT, -+ RTT_ATTRIBUTE_TARGET_INFO, -+ RTT_ATTRIBUTE_TARGET_MAC, -+ RTT_ATTRIBUTE_TARGET_TYPE, -+ RTT_ATTRIBUTE_TARGET_PEER, -+ RTT_ATTRIBUTE_TARGET_CHAN, -+ RTT_ATTRIBUTE_TARGET_MODE, -+ RTT_ATTRIBUTE_TARGET_INTERVAL, -+ RTT_ATTRIBUTE_TARGET_NUM_MEASUREMENT, -+ RTT_ATTRIBUTE_TARGET_NUM_PKT, -+ RTT_ATTRIBUTE_TARGET_NUM_RETRY -+}; -+ -+enum logger_attributes { -+ LOGGER_ATTRIBUTE_GET_DRIVER, -+ LOGGER_ATTRIBUTE_GET_FW, -+ LOGGER_ATTRIBUTE_RING_ID, -+ LOGGER_ATTRIBUTE_RING_NAME, -+ LOGGER_ATTRIBUTE_RING_FLAGS, -+ LOGGER_ATTRIBUTE_LOG_LEVEL, -+ LOGGER_ATTRIBUTE_LOG_TIME_INTVAL, -+ LOGGER_ATTRIBUTE_LOG_MIN_DATA_SIZE, -+ LOGGER_ATTRIBUTE_FW_DUMP_LEN, -+ LOGGER_ATTRIBUTE_FW_DUMP_DATA, -+ LOGGERG_ATTRIBUTE_RING_DATA, -+ LOGGER_ATTRIBUTE_RING_STATUS, -+ LOGGER_ATTRIBUTE_RING_NUM -+}; -+typedef enum rtw_vendor_event { -+ RTK_RESERVED1, -+ RTK_RESERVED2, -+ GSCAN_EVENT_SIGNIFICANT_CHANGE_RESULTS , -+ GSCAN_EVENT_HOTLIST_RESULTS_FOUND, -+ GSCAN_EVENT_SCAN_RESULTS_AVAILABLE, -+ GSCAN_EVENT_FULL_SCAN_RESULTS, -+ RTT_EVENT_COMPLETE, -+ GSCAN_EVENT_COMPLETE_SCAN, -+ GSCAN_EVENT_HOTLIST_RESULTS_LOST, -+ GSCAN_EVENT_EPNO_EVENT, -+ GOOGLE_DEBUG_RING_EVENT, -+ GOOGLE_DEBUG_MEM_DUMP_EVENT, -+ GSCAN_EVENT_ANQPO_HOTSPOT_MATCH, -+ GOOGLE_RSSI_MONITOR_EVENT -+} rtw_vendor_event_t; -+ -+enum andr_wifi_feature_set_attr { -+ ANDR_WIFI_ATTRIBUTE_NUM_FEATURE_SET, -+ ANDR_WIFI_ATTRIBUTE_FEATURE_SET, -+ ANDR_WIFI_ATTRIBUTE_RANDOM_MAC_OUI, -+ ANDR_WIFI_ATTRIBUTE_NODFS_SET, -+ ANDR_WIFI_ATTRIBUTE_COUNTRY, -+ ANDR_WIFI_ATTRIBUTE_ND_OFFLOAD_VALUE -+ // Add more attribute here -+}; -+ -+typedef enum rtw_vendor_gscan_attribute { -+ ATTR_START_GSCAN, -+ ATTR_STOP_GSCAN, -+ ATTR_SET_SCAN_BATCH_CFG_ID, /* set batch scan params */ -+ ATTR_SET_SCAN_GEOFENCE_CFG_ID, /* set list of bssids to track */ -+ ATTR_SET_SCAN_SIGNIFICANT_CFG_ID, /* set list of bssids, rssi threshold etc.. */ -+ ATTR_SET_SCAN_CFG_ID, /* set common scan config params here */ -+ ATTR_GET_GSCAN_CAPABILITIES_ID, -+ /* Add more sub commands here */ -+ ATTR_GSCAN_MAX -+} rtw_vendor_gscan_attribute_t; -+ -+typedef enum gscan_batch_attribute { -+ ATTR_GSCAN_BATCH_BESTN, -+ ATTR_GSCAN_BATCH_MSCAN, -+ ATTR_GSCAN_BATCH_BUFFER_THRESHOLD -+} gscan_batch_attribute_t; -+ -+typedef enum gscan_geofence_attribute { -+ ATTR_GSCAN_NUM_HOTLIST_BSSID, -+ ATTR_GSCAN_HOTLIST_BSSID -+} gscan_geofence_attribute_t; -+ -+typedef enum gscan_complete_event { -+ WIFI_SCAN_BUFFER_FULL, -+ WIFI_SCAN_COMPLETE -+} gscan_complete_event_t; -+/* wifi_hal.h */ -+/* WiFi Common definitions */ -+typedef unsigned char byte; -+typedef int wifi_request_id; -+typedef int wifi_channel; // indicates channel frequency in MHz -+typedef int wifi_rssi; -+typedef byte mac_addr[6]; -+typedef byte oui[3]; -+typedef int64_t wifi_timestamp; // In microseconds (us) -+typedef int64_t wifi_timespan; // In picoseconds (ps) -+ -+struct wifi_info; -+struct wifi_interface_info; -+typedef struct wifi_info *wifi_handle; -+typedef struct wifi_interface_info *wifi_interface_handle; -+ -+/* channel operating width */ -+typedef enum { -+ WIFI_CHAN_WIDTH_20 = 0, -+ WIFI_CHAN_WIDTH_40 = 1, -+ WIFI_CHAN_WIDTH_80 = 2, -+ WIFI_CHAN_WIDTH_160 = 3, -+ WIFI_CHAN_WIDTH_80P80 = 4, -+ WIFI_CHAN_WIDTH_5 = 5, -+ WIFI_CHAN_WIDTH_10 = 6, -+ WIFI_CHAN_WIDTH_INVALID = -1 -+} wifi_channel_width; -+ -+typedef int wifi_radio; -+ -+typedef struct { -+ wifi_channel_width width; -+ int center_frequency0; -+ int center_frequency1; -+ int primary_frequency; -+} wifi_channel_spec; -+ -+typedef enum { -+ WIFI_SUCCESS = 0, -+ WIFI_ERROR_NONE = 0, -+ WIFI_ERROR_UNKNOWN = -1, -+ WIFI_ERROR_UNINITIALIZED = -2, -+ WIFI_ERROR_NOT_SUPPORTED = -3, -+ WIFI_ERROR_NOT_AVAILABLE = -4, // Not available right now, but try later -+ WIFI_ERROR_INVALID_ARGS = -5, -+ WIFI_ERROR_INVALID_REQUEST_ID = -6, -+ WIFI_ERROR_TIMED_OUT = -7, -+ WIFI_ERROR_TOO_MANY_REQUESTS = -8, // Too many instances of this request -+ WIFI_ERROR_OUT_OF_MEMORY = -9, -+ WIFI_ERROR_BUSY = -10, -+} wifi_error; -+ -+typedef int wifi_ring_buffer_id; -+/* ring buffer params */ -+/** -+ * written_bytes and read_bytes implement a producer consumer API -+ * hence written_bytes >= read_bytes -+ * a modulo arithmetic of the buffer size has to be applied to those counters: -+ * actual offset into ring buffer = written_bytes % ring_buffer_byte_size -+ * -+ */ -+typedef struct { -+ u8 name[32]; -+ u32 flags; -+ wifi_ring_buffer_id ring_id; // unique integer representing the ring -+ u32 ring_buffer_byte_size; // total memory size allocated for the buffer -+ u32 verbose_level; // verbose level for ring buffer -+ u32 written_bytes; // number of bytes that was written to the buffer by driver, -+ // monotonously increasing integer -+ u32 read_bytes; // number of bytes that was read from the buffer by user land, -+ // monotonously increasing integer -+ u32 written_records; // number of records that was written to the buffer by driver, -+ // monotonously increasing integer -+} wifi_ring_buffer_status; -+ -+#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS -+#define STATS_MAJOR_VERSION 1 -+#define STATS_MINOR_VERSION 0 -+#define STATS_MICRO_VERSION 0 -+ -+typedef enum { -+ WIFI_DISCONNECTED = 0, -+ WIFI_AUTHENTICATING = 1, -+ WIFI_ASSOCIATING = 2, -+ WIFI_ASSOCIATED = 3, -+ WIFI_EAPOL_STARTED = 4, // if done by firmware/driver -+ WIFI_EAPOL_COMPLETED = 5, // if done by firmware/driver -+} wifi_connection_state; -+ -+typedef enum { -+ WIFI_ROAMING_IDLE = 0, -+ WIFI_ROAMING_ACTIVE = 1, -+} wifi_roam_state; -+ -+typedef enum { -+ WIFI_INTERFACE_STA = 0, -+ WIFI_INTERFACE_SOFTAP = 1, -+ WIFI_INTERFACE_IBSS = 2, -+ WIFI_INTERFACE_P2P_CLIENT = 3, -+ WIFI_INTERFACE_P2P_GO = 4, -+ WIFI_INTERFACE_NAN = 5, -+ WIFI_INTERFACE_MESH = 6, -+ WIFI_INTERFACE_UNKNOWN = -1 -+ } wifi_interface_mode; -+ -+#define WIFI_CAPABILITY_QOS 0x00000001 // set for QOS association -+#define WIFI_CAPABILITY_PROTECTED 0x00000002 // set for protected association (802.11 beacon frame control protected bit set) -+#define WIFI_CAPABILITY_INTERWORKING 0x00000004 // set if 802.11 Extended Capabilities element interworking bit is set -+#define WIFI_CAPABILITY_HS20 0x00000008 // set for HS20 association -+#define WIFI_CAPABILITY_SSID_UTF8 0x00000010 // set is 802.11 Extended Capabilities element UTF-8 SSID bit is set -+#define WIFI_CAPABILITY_COUNTRY 0x00000020 // set is 802.11 Country Element is present -+ -+typedef struct { -+ wifi_interface_mode mode; // interface mode -+ u8 mac_addr[6]; // interface mac address (self) -+ wifi_connection_state state; // connection state (valid for STA, CLI only) -+ wifi_roam_state roaming; // roaming state -+ u32 capabilities; // WIFI_CAPABILITY_XXX (self) -+ u8 ssid[33]; // null terminated SSID -+ u8 bssid[6]; // bssid -+ u8 ap_country_str[3]; // country string advertised by AP -+ u8 country_str[3]; // country string for this association -+} wifi_interface_link_layer_info; -+ -+/* channel information */ -+typedef struct { -+ wifi_channel_width width; // channel width (20, 40, 80, 80+80, 160) -+ wifi_channel center_freq; // primary 20 MHz channel -+ wifi_channel center_freq0; // center frequency (MHz) first segment -+ wifi_channel center_freq1; // center frequency (MHz) second segment -+} wifi_channel_info; -+ -+/* wifi rate */ -+typedef struct { -+ u32 preamble :3; // 0: OFDM, 1:CCK, 2:HT 3:VHT 4..7 reserved -+ u32 nss :2; // 0:1x1, 1:2x2, 3:3x3, 4:4x4 -+ u32 bw :3; // 0:20MHz, 1:40Mhz, 2:80Mhz, 3:160Mhz -+ u32 rateMcsIdx :8; // OFDM/CCK rate code would be as per ieee std in the units of 0.5mbps -+ // HT/VHT it would be mcs index -+ u32 reserved :16; // reserved -+ u32 bitrate; // units of 100 Kbps -+} wifi_rate; -+ -+/* channel statistics */ -+typedef struct { -+ wifi_channel_info channel; // channel -+ u32 on_time; // msecs the radio is awake (32 bits number accruing over time) -+ u32 cca_busy_time; // msecs the CCA register is busy (32 bits number accruing over time) -+} wifi_channel_stat; -+ -+// Max number of tx power levels. The actual number vary per device and is specified by |num_tx_levels| -+#define RADIO_STAT_MAX_TX_LEVELS 256 -+ -+/* Internal radio statistics structure in the driver */ -+typedef struct { -+ wifi_radio radio; // wifi radio (if multiple radio supported) -+ u32 on_time; // msecs the radio is awake (32 bits number accruing over time) -+ u32 tx_time; // msecs the radio is transmitting (32 bits number accruing over time) -+ u32 rx_time; // msecs the radio is in active receive (32 bits number accruing over time) -+ u32 on_time_scan; // msecs the radio is awake due to all scan (32 bits number accruing over time) -+ u32 on_time_nbd; // msecs the radio is awake due to NAN (32 bits number accruing over time) -+ u32 on_time_gscan; // msecs the radio is awake due to G?scan (32 bits number accruing over time) -+ u32 on_time_roam_scan; // msecs the radio is awake due to roam?scan (32 bits number accruing over time) -+ u32 on_time_pno_scan; // msecs the radio is awake due to PNO scan (32 bits number accruing over time) -+ u32 on_time_hs20; // msecs the radio is awake due to HS2.0 scans and GAS exchange (32 bits number accruing over time) -+ u32 num_channels; // number of channels -+ wifi_channel_stat channels[]; // channel statistics -+} wifi_radio_stat_internal; -+ -+/** -+ * Packet statistics reporting by firmware is performed on MPDU basi (i.e. counters increase by 1 for each MPDU) -+ * As well, "data packet" in associated comments, shall be interpreted as 802.11 data packet, -+ * that is, 802.11 frame control subtype == 2 and excluding management and control frames. -+ * -+ * As an example, in the case of transmission of an MSDU fragmented in 16 MPDUs which are transmitted -+ * OTA in a 16 units long a-mpdu, for which a block ack is received with 5 bits set: -+ * tx_mpdu : shall increase by 5 -+ * retries : shall increase by 16 -+ * tx_ampdu : shall increase by 1 -+ * data packet counters shall not increase regardless of the number of BAR potentially sent by device for this a-mpdu -+ * data packet counters shall not increase regardless of the number of BA received by device for this a-mpdu -+ * -+ * For each subsequent retransmission of the 11 remaining non ACK'ed mpdus -+ * (regardless of the fact that they are transmitted in a-mpdu or not) -+ * retries : shall increase by 1 -+ * -+ * If no subsequent BA or ACK are received from AP, until packet lifetime expires for those 11 packet that were not ACK'ed -+ * mpdu_lost : shall increase by 11 -+ */ -+ -+/* per rate statistics */ -+typedef struct { -+ wifi_rate rate; // rate information -+ u32 tx_mpdu; // number of successfully transmitted data pkts (ACK rcvd) -+ u32 rx_mpdu; // number of received data pkts -+ u32 mpdu_lost; // number of data packet losses (no ACK) -+ u32 retries; // total number of data pkt retries -+ u32 retries_short; // number of short data pkt retries -+ u32 retries_long; // number of long data pkt retries -+} wifi_rate_stat; -+ -+/* access categories */ -+typedef enum { -+ WIFI_AC_VO = 0, -+ WIFI_AC_VI = 1, -+ WIFI_AC_BE = 2, -+ WIFI_AC_BK = 3, -+ WIFI_AC_MAX = 4, -+} wifi_traffic_ac; -+ -+/* wifi peer type */ -+typedef enum -+{ -+ WIFI_PEER_STA, -+ WIFI_PEER_AP, -+ WIFI_PEER_P2P_GO, -+ WIFI_PEER_P2P_CLIENT, -+ WIFI_PEER_NAN, -+ WIFI_PEER_TDLS, -+ WIFI_PEER_INVALID, -+} wifi_peer_type; -+ -+/* per peer statistics */ -+typedef struct { -+ wifi_peer_type type; // peer type (AP, TDLS, GO etc.) -+ u8 peer_mac_address[6]; // mac address -+ u32 capabilities; // peer WIFI_CAPABILITY_XXX -+ u32 num_rate; // number of rates -+ wifi_rate_stat rate_stats[]; // per rate statistics, number of entries = num_rate -+} wifi_peer_info; -+ -+/* Per access category statistics */ -+typedef struct { -+ wifi_traffic_ac ac; // access category (VI, VO, BE, BK) -+ u32 tx_mpdu; // number of successfully transmitted unicast data pkts (ACK rcvd) -+ u32 rx_mpdu; // number of received unicast data packets -+ u32 tx_mcast; // number of succesfully transmitted multicast data packets -+ // STA case: implies ACK received from AP for the unicast packet in which mcast pkt was sent -+ u32 rx_mcast; // number of received multicast data packets -+ u32 rx_ampdu; // number of received unicast a-mpdus; support of this counter is optional -+ u32 tx_ampdu; // number of transmitted unicast a-mpdus; support of this counter is optional -+ u32 mpdu_lost; // number of data pkt losses (no ACK) -+ u32 retries; // total number of data pkt retries -+ u32 retries_short; // number of short data pkt retries -+ u32 retries_long; // number of long data pkt retries -+ u32 contention_time_min; // data pkt min contention time (usecs) -+ u32 contention_time_max; // data pkt max contention time (usecs) -+ u32 contention_time_avg; // data pkt avg contention time (usecs) -+ u32 contention_num_samples; // num of data pkts used for contention statistics -+} wifi_wmm_ac_stat; -+ -+/* interface statistics */ -+typedef struct { -+ wifi_interface_handle iface; // wifi interface -+ wifi_interface_link_layer_info info; // current state of the interface -+ u32 beacon_rx; // access point beacon received count from connected AP -+ u64 average_tsf_offset; // average beacon offset encountered (beacon_TSF - TBTT) -+ // The average_tsf_offset field is used so as to calculate the -+ // typical beacon contention time on the channel as well may be -+ // used to debug beacon synchronization and related power consumption issue -+ u32 leaky_ap_detected; // indicate that this AP typically leaks packets beyond the driver guard time. -+ u32 leaky_ap_avg_num_frames_leaked; // average number of frame leaked by AP after frame with PM bit set was ACK'ed by AP -+ u32 leaky_ap_guard_time; // guard time currently in force (when implementing IEEE power management based on -+ // frame control PM bit), How long driver waits before shutting down the radio and -+ // after receiving an ACK for a data frame with PM bit set) -+ u32 mgmt_rx; // access point mgmt frames received count from connected AP (including Beacon) -+ u32 mgmt_action_rx; // action frames received count -+ u32 mgmt_action_tx; // action frames transmit count -+ wifi_rssi rssi_mgmt; // access Point Beacon and Management frames RSSI (averaged) -+ wifi_rssi rssi_data; // access Point Data Frames RSSI (averaged) from connected AP -+ wifi_rssi rssi_ack; // access Point ACK RSSI (averaged) from connected AP -+ wifi_wmm_ac_stat ac[WIFI_AC_MAX]; // per ac data packet statistics -+ u32 num_peers; // number of peers -+ wifi_peer_info peer_info[]; // per peer statistics -+} wifi_iface_stat; -+ -+/* configuration params */ -+typedef struct { -+ u32 mpdu_size_threshold; // threshold to classify the pkts as short or long -+ // packet size < mpdu_size_threshold => short -+ u32 aggressive_statistics_gathering; // set for field debug mode. Driver should collect all statistics regardless of performance impact. -+} wifi_link_layer_params; -+ -+#define RSSI_MONITOR_EVT_VERSION 1 -+typedef struct { -+ u8 version; -+ s8 cur_rssi; -+ mac_addr BSSID; -+} rssi_monitor_evt; -+ -+ -+/* wifi statistics bitmap */ -+#define WIFI_STATS_RADIO 0x00000001 // all radio statistics -+#define WIFI_STATS_RADIO_CCA 0x00000002 // cca_busy_time (within radio statistics) -+#define WIFI_STATS_RADIO_CHANNELS 0x00000004 // all channel statistics (within radio statistics) -+#define WIFI_STATS_RADIO_SCAN 0x00000008 // all scan statistics (within radio statistics) -+#define WIFI_STATS_IFACE 0x00000010 // all interface statistics -+#define WIFI_STATS_IFACE_TXRATE 0x00000020 // all tx rate statistics (within interface statistics) -+#define WIFI_STATS_IFACE_AC 0x00000040 // all ac statistics (within interface statistics) -+#define WIFI_STATS_IFACE_CONTENTION 0x00000080 // all contention (min, max, avg) statistics (within ac statisctics) -+ -+#endif /* CONFIG_RTW_CFGVENDOR_LLSTATS */ -+ -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) -+extern int rtw_cfgvendor_attach(struct wiphy *wiphy); -+extern int rtw_cfgvendor_detach(struct wiphy *wiphy); -+extern int rtw_cfgvendor_send_async_event(struct wiphy *wiphy, -+ struct net_device *dev, int event_id, const void *data, int len); -+#if defined(GSCAN_SUPPORT) && 0 -+extern int rtw_cfgvendor_send_hotlist_event(struct wiphy *wiphy, -+ struct net_device *dev, void *data, int len, rtw_vendor_event_t event); -+#endif -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) */ -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RSSIMONITOR -+void rtw_cfgvendor_rssi_monitor_evt(_adapter *padapter); -+#endif -+ -+#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -+void rtw_hal_pno_random_gen_mac_addr(PADAPTER adapter); -+void rtw_hal_set_hw_mac_addr(PADAPTER adapter, u8 *mac_addr); -+#endif -+ -+ -+#endif /* _RTW_CFGVENDOR_H_ */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/rtw_proc.c b/drivers/staging/rtl8723cs/os_dep/linux/rtw_proc.c -new file mode 100644 -index 000000000000..bfe65dbbc4f9 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/rtw_proc.c -@@ -0,0 +1,6233 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include /* tolower() */ -+#include -+#include -+#include "rtw_proc.h" -+#include -+ -+#ifdef CONFIG_PROC_DEBUG -+ -+static struct proc_dir_entry *rtw_proc = NULL; -+ -+inline struct proc_dir_entry *get_rtw_drv_proc(void) -+{ -+ return rtw_proc; -+} -+ -+#define RTW_PROC_NAME DRV_NAME -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 9, 0)) -+#define file_inode(file) ((file)->f_dentry->d_inode) -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0)) -+#define PDE_DATA(inode) PDE((inode))->data -+#define proc_get_parent_data(inode) PDE((inode))->parent->data -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) -+#define get_proc_net proc_net -+#else -+#define get_proc_net init_net.proc_net -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0)) -+int single_open_size(struct file *file, int (*show)(struct seq_file *, void *), -+ void *data, size_t size) -+{ -+ char *buf = kmalloc(size, GFP_KERNEL); -+ int ret; -+ if (!buf) -+ return -ENOMEM; -+ ret = single_open(file, show, data); -+ if (ret) { -+ kfree(buf); -+ return ret; -+ } -+ ((struct seq_file *)file->private_data)->buf = buf; -+ ((struct seq_file *)file->private_data)->size = size; -+ return 0; -+} -+#endif -+ -+inline struct proc_dir_entry *rtw_proc_create_dir(const char *name, struct proc_dir_entry *parent, void *data) -+{ -+ struct proc_dir_entry *entry; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) -+ entry = proc_mkdir_data(name, S_IRUGO | S_IXUGO, parent, data); -+#else -+ /* entry = proc_mkdir_mode(name, S_IRUGO|S_IXUGO, parent); */ -+ entry = proc_mkdir(name, parent); -+ if (entry) -+ entry->data = data; -+#endif -+ -+ return entry; -+} -+ -+inline struct proc_dir_entry *rtw_proc_create_entry(const char *name, struct proc_dir_entry *parent, -+ const struct rtw_proc_ops *fops, void * data) -+{ -+ struct proc_dir_entry *entry; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 26)) -+ entry = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUGO, parent, fops, data); -+#else -+ entry = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUGO, parent); -+ if (entry) { -+ entry->data = data; -+ entry->proc_fops = fops; -+ } -+#endif -+ -+ return entry; -+} -+ -+static int proc_get_dummy(struct seq_file *m, void *v) -+{ -+ return 0; -+} -+ -+static int proc_get_drv_version(struct seq_file *m, void *v) -+{ -+ dump_drv_version(m); -+ return 0; -+} -+ -+static int proc_get_log_level(struct seq_file *m, void *v) -+{ -+ dump_log_level(m); -+ return 0; -+} -+ -+static int proc_get_drv_cfg(struct seq_file *m, void *v) -+{ -+ dump_drv_cfg(m); -+ return 0; -+} -+ -+static ssize_t proc_set_log_level(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[32]; -+ int log_level; -+ -+ if (count < 1) -+ return -EINVAL; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+#ifdef CONFIG_RTW_DEBUG -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d ", &log_level); -+ -+ if (num == 1 && -+ log_level >= _DRV_NONE_ && log_level <= _DRV_MAX_) { -+ rtw_drv_log_level = log_level; -+ printk("rtw_drv_log_level:%d\n", rtw_drv_log_level); -+ } -+ } else -+ return -EFAULT; -+#else -+ printk("CONFIG_RTW_DEBUG is disabled\n"); -+#endif -+ -+ return count; -+} -+ -+#ifdef DBG_MEM_ALLOC -+static int proc_get_mstat(struct seq_file *m, void *v) -+{ -+ rtw_mstat_dump(m); -+ return 0; -+} -+#endif /* DBG_MEM_ALLOC */ -+ -+static int proc_get_country_chplan_map(struct seq_file *m, void *v) -+{ -+ dump_country_chplan_map(m); -+ return 0; -+} -+ -+static int proc_get_chplan_id_list(struct seq_file *m, void *v) -+{ -+ dump_chplan_id_list(m); -+ return 0; -+} -+ -+#ifdef CONFIG_RTW_DEBUG -+static int proc_get_chplan_test(struct seq_file *m, void *v) -+{ -+ dump_chplan_test(m); -+ return 0; -+} -+#endif -+ -+static int proc_get_chplan_ver(struct seq_file *m, void *v) -+{ -+ dump_chplan_ver(m); -+ return 0; -+} -+ -+static int proc_get_global_op_class(struct seq_file *m, void *v) -+{ -+ dump_global_op_class(m); -+ return 0; -+} -+ -+#ifdef CONFIG_RTW_DEBUG -+static int proc_get_hw_rate_map_test(struct seq_file *m, void *v) -+{ -+ dump_hw_rate_map_test(m); -+ return 0; -+} -+#endif -+ -+#ifdef RTW_HALMAC -+extern void rtw_halmac_get_version(char *str, u32 len); -+ -+static int proc_get_halmac_info(struct seq_file *m, void *v) -+{ -+ char ver[30] = {0}; -+ -+ -+ rtw_halmac_get_version(ver, 30); -+ RTW_PRINT_SEL(m, "version: %s\n", ver); -+ -+ return 0; -+} -+#endif -+ -+/* -+* rtw_drv_proc: -+* init/deinit when register/unregister driver -+*/ -+const struct rtw_proc_hdl drv_proc_hdls[] = { -+ RTW_PROC_HDL_SSEQ("ver_info", proc_get_drv_version, NULL), -+ RTW_PROC_HDL_SSEQ("log_level", proc_get_log_level, proc_set_log_level), -+ RTW_PROC_HDL_SSEQ("drv_cfg", proc_get_drv_cfg, NULL), -+#ifdef DBG_MEM_ALLOC -+ RTW_PROC_HDL_SSEQ("mstat", proc_get_mstat, NULL), -+#endif /* DBG_MEM_ALLOC */ -+ RTW_PROC_HDL_SSEQ("country_chplan_map", proc_get_country_chplan_map, NULL), -+ RTW_PROC_HDL_SSEQ("chplan_id_list", proc_get_chplan_id_list, NULL), -+#ifdef CONFIG_RTW_DEBUG -+ RTW_PROC_HDL_SSEQ("chplan_test", proc_get_chplan_test, NULL), -+#endif -+ RTW_PROC_HDL_SSEQ("chplan_ver", proc_get_chplan_ver, NULL), -+ RTW_PROC_HDL_SSEQ("global_op_class", proc_get_global_op_class, NULL), -+#ifdef CONFIG_RTW_DEBUG -+ RTW_PROC_HDL_SSEQ("hw_rate_map_test", proc_get_hw_rate_map_test, NULL), -+#endif -+#ifdef RTW_HALMAC -+ RTW_PROC_HDL_SSEQ("halmac_info", proc_get_halmac_info, NULL), -+#endif /* RTW_HALMAC */ -+}; -+ -+const int drv_proc_hdls_num = sizeof(drv_proc_hdls) / sizeof(struct rtw_proc_hdl); -+ -+static int rtw_drv_proc_open(struct inode *inode, struct file *file) -+{ -+ /* struct net_device *dev = proc_get_parent_data(inode); */ -+ ssize_t index = (ssize_t)PDE_DATA(inode); -+ const struct rtw_proc_hdl *hdl = drv_proc_hdls + index; -+ void *private = NULL; -+ -+ if (hdl->type == RTW_PROC_HDL_TYPE_SEQ) { -+ int res = seq_open(file, hdl->u.seq_op); -+ -+ if (res == 0) -+ ((struct seq_file *)file->private_data)->private = private; -+ -+ return res; -+ } else if (hdl->type == RTW_PROC_HDL_TYPE_SSEQ) { -+ int (*show)(struct seq_file *, void *) = hdl->u.show ? hdl->u.show : proc_get_dummy; -+ -+ return single_open(file, show, private); -+ } else if (hdl->type == RTW_PROC_HDL_TYPE_SZSEQ) { -+ int (*show)(struct seq_file *, void *) = hdl->u.sz.show ? hdl->u.sz.show : proc_get_dummy; -+ -+ return single_open_size(file, show, private, hdl->u.sz.size); -+ } else { -+ return -EROFS; -+ } -+} -+ -+static ssize_t rtw_drv_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) -+{ -+ ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); -+ const struct rtw_proc_hdl *hdl = drv_proc_hdls + index; -+ ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; -+ -+ if (write) -+ return write(file, buffer, count, pos, NULL); -+ -+ return -EROFS; -+} -+ -+static const struct rtw_proc_ops rtw_drv_proc_seq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+ .proc_open = rtw_drv_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = seq_release, -+ .proc_write = rtw_drv_proc_write, -+#else -+ .owner = THIS_MODULE, -+ .open = rtw_drv_proc_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = seq_release, -+ .write = rtw_drv_proc_write, -+#endif -+}; -+ -+static const struct rtw_proc_ops rtw_drv_proc_sseq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+ .proc_open = rtw_drv_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = single_release, -+ .proc_write = rtw_drv_proc_write, -+#else -+ .owner = THIS_MODULE, -+ .open = rtw_drv_proc_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+ .write = rtw_drv_proc_write, -+#endif -+}; -+ -+int rtw_drv_proc_init(void) -+{ -+ int ret = _FAIL; -+ ssize_t i; -+ struct proc_dir_entry *entry = NULL; -+ -+ if (rtw_proc != NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ rtw_proc = rtw_proc_create_dir(RTW_PROC_NAME, get_proc_net, NULL); -+ -+ if (rtw_proc == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ for (i = 0; i < drv_proc_hdls_num; i++) { -+ if (drv_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SEQ) -+ entry = rtw_proc_create_entry(drv_proc_hdls[i].name, rtw_proc, &rtw_drv_proc_seq_fops, (void *)i); -+ else if (drv_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SSEQ || -+ drv_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SZSEQ) -+ entry = rtw_proc_create_entry(drv_proc_hdls[i].name, rtw_proc, &rtw_drv_proc_sseq_fops, (void *)i); -+ else -+ entry = NULL; -+ -+ if (!entry) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ } -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+void rtw_drv_proc_deinit(void) -+{ -+ int i; -+ -+ if (rtw_proc == NULL) -+ return; -+ -+ for (i = 0; i < drv_proc_hdls_num; i++) -+ remove_proc_entry(drv_proc_hdls[i].name, rtw_proc); -+ -+ remove_proc_entry(RTW_PROC_NAME, get_proc_net); -+ rtw_proc = NULL; -+} -+ -+#ifndef RTW_SEQ_FILE_TEST -+#define RTW_SEQ_FILE_TEST 0 -+#endif -+ -+#if RTW_SEQ_FILE_TEST -+#define RTW_SEQ_FILE_TEST_SHOW_LIMIT 300 -+static void *proc_start_seq_file_test(struct seq_file *m, loff_t *pos) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); -+ if (*pos >= RTW_SEQ_FILE_TEST_SHOW_LIMIT) { -+ RTW_PRINT(FUNC_ADPT_FMT" pos:%llu, out of range return\n", FUNC_ADPT_ARG(adapter), *pos); -+ return NULL; -+ } -+ -+ RTW_PRINT(FUNC_ADPT_FMT" return pos:%lld\n", FUNC_ADPT_ARG(adapter), *pos); -+ return pos; -+} -+void proc_stop_seq_file_test(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); -+} -+ -+void *proc_next_seq_file_test(struct seq_file *m, void *v, loff_t *pos) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ (*pos)++; -+ if (*pos >= RTW_SEQ_FILE_TEST_SHOW_LIMIT) { -+ RTW_PRINT(FUNC_ADPT_FMT" pos:%lld, out of range return\n", FUNC_ADPT_ARG(adapter), *pos); -+ return NULL; -+ } -+ -+ RTW_PRINT(FUNC_ADPT_FMT" return pos:%lld\n", FUNC_ADPT_ARG(adapter), *pos); -+ return pos; -+} -+ -+static int proc_get_seq_file_test(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ u32 pos = *((loff_t *)(v)); -+ RTW_PRINT(FUNC_ADPT_FMT" pos:%d\n", FUNC_ADPT_ARG(adapter), pos); -+ RTW_PRINT_SEL(m, FUNC_ADPT_FMT" pos:%d\n", FUNC_ADPT_ARG(adapter), pos); -+ return 0; -+} -+ -+struct seq_operations seq_file_test = { -+ .start = proc_start_seq_file_test, -+ .stop = proc_stop_seq_file_test, -+ .next = proc_next_seq_file_test, -+ .show = proc_get_seq_file_test, -+}; -+#endif /* RTW_SEQ_FILE_TEST */ -+ -+#ifdef CONFIG_SDIO_HCI -+static int proc_get_sd_f0_reg_dump(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ sd_f0_reg_dump(m, adapter); -+ -+ return 0; -+} -+ -+static int proc_get_sdio_local_reg_dump(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ sdio_local_reg_dump(m, adapter); -+ -+ return 0; -+} -+static int proc_get_sdio_card_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_sdio_card_info(m, adapter_to_dvobj(adapter)); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_SDIO_RECVBUF_AGGREGATION -+int proc_get_sdio_recvbuf_aggregation(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = GET_PRIMARY_ADAPTER((_adapter *)rtw_netdev_priv(dev)); -+ struct recv_priv *recvpriv = &adapter->recvpriv; -+ -+ RTW_PRINT_SEL(m, "%d\n", recvpriv->recvbuf_agg); -+ -+ return 0; -+} -+ -+ssize_t proc_set_sdio_recvbuf_aggregation(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = GET_PRIMARY_ADAPTER((_adapter *)rtw_netdev_priv(dev)); -+ struct recv_priv *recvpriv = &adapter->recvpriv; -+ -+ char tmp[32]; -+ u8 enable; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu", &enable); -+ -+ if (num >= 1) -+ recvpriv->recvbuf_agg = enable ? 1 : 0; -+ } -+ -+ return count; -+} -+#endif /* CONFIG_SDIO_RECVBUF_AGGREGATION */ -+ -+#ifdef CONFIG_SDIO_RECVBUF_PWAIT -+int proc_get_sdio_recvbuf_pwait(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = GET_PRIMARY_ADAPTER((_adapter *)rtw_netdev_priv(dev)); -+ struct recv_priv *recvpriv = &adapter->recvpriv; -+ -+ dump_recvbuf_pwait_conf(m, recvpriv); -+ -+ return 0; -+} -+ -+ssize_t proc_set_sdio_recvbuf_pwait(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+#ifdef CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST -+ struct net_device *dev = data; -+ _adapter *adapter = GET_PRIMARY_ADAPTER((_adapter *)rtw_netdev_priv(dev)); -+ struct recv_priv *recvpriv = &adapter->recvpriv; -+ -+ char tmp[64]; -+ char type[64]; -+ s32 time; -+ s32 cnt_lmt; -+ -+ if (count < 3) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%s %d %d", type, &time, &cnt_lmt); -+ int i; -+ -+ if (num < 3) -+ return -EINVAL; -+ -+ for (i = 0; i < RTW_PWAIT_TYPE_NUM; i++) -+ if (strncmp(_rtw_pwait_type_str[i], type, strlen(_rtw_pwait_type_str[i])) == 0) -+ break; -+ -+ if (i < RTW_PWAIT_TYPE_NUM && recvbuf_pwait_config_req(recvpriv, i, time, cnt_lmt) != _SUCCESS) -+ return -EINVAL; -+ } -+ return count; -+#else -+ return -EFAULT; -+#endif /* CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST */ -+} -+#endif /* CONFIG_SDIO_RECVBUF_PWAIT */ -+ -+#ifdef DBG_SDIO -+static int proc_get_sdio_dbg(struct seq_file *m, void *v) -+{ -+ struct net_device *dev; -+ struct _ADAPTER *a; -+ struct dvobj_priv *d; -+ struct sdio_data *sdio; -+ -+ -+ dev = m->private; -+ a = (struct _ADAPTER *)rtw_netdev_priv(dev); -+ d = adapter_to_dvobj(a); -+ sdio = &d->intf_data; -+ -+ dump_sdio_card_info(m, d); -+ -+ RTW_PRINT_SEL(m, "CMD52 error cnt: %d\n", sdio->cmd52_err_cnt); -+ RTW_PRINT_SEL(m, "CMD53 error cnt: %d\n", sdio->cmd53_err_cnt); -+ -+#if (DBG_SDIO >= 3) -+ RTW_PRINT_SEL(m, "dbg: %s\n", sdio->dbg_enable?"enable":"disable"); -+ RTW_PRINT_SEL(m, "err_stop: %s\n", sdio->err_stop?"enable":"disable"); -+ RTW_PRINT_SEL(m, "err_test: %s\n", sdio->err_test?"enable":"disable"); -+ RTW_PRINT_SEL(m, "err_test_triggered: %s\n", -+ sdio->err_test_triggered?"yes":"no"); -+#endif /* DBG_SDIO >= 3 */ -+ -+#if (DBG_SDIO >= 2) -+ RTW_PRINT_SEL(m, "I/O error dump mark: %d\n", sdio->reg_dump_mark); -+ if (sdio->reg_dump_mark) { -+ if (sdio->dbg_msg) -+ RTW_PRINT_SEL(m, "debug messages: %s\n", sdio->dbg_msg); -+ if (sdio->reg_mac) -+ RTW_BUF_DUMP_SEL(_DRV_ALWAYS_, m, "MAC register:", -+ _TRUE, sdio->reg_mac, 0x800); -+ if (sdio->reg_mac_ext) -+ RTW_BUF_DUMP_SEL(_DRV_ALWAYS_, m, "MAC EXT register:", -+ _TRUE, sdio->reg_mac_ext, 0x800); -+ if (sdio->reg_local) -+ RTW_BUF_DUMP_SEL(_DRV_ALWAYS_, m, "SDIO Local register:", -+ _TRUE, sdio->reg_local, 0x100); -+ if (sdio->reg_cia) -+ RTW_BUF_DUMP_SEL(_DRV_ALWAYS_, m, "SDIO CIA register:", -+ _TRUE, sdio->reg_cia, 0x200); -+ } -+#endif /* DBG_SDIO >= 2 */ -+ -+ return 0; -+} -+ -+#if (DBG_SDIO >= 2) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) -+#define strnicmp strncasecmp -+#endif /* Linux kernel >= 4.0.0 */ -+void rtw_sdio_dbg_reg_free(struct dvobj_priv *d); -+#endif /* DBG_SDIO >= 2 */ -+ -+ssize_t proc_set_sdio_dbg(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data) -+{ -+#if (DBG_SDIO >= 2) -+ struct net_device *dev = data; -+ struct dvobj_priv *d; -+ struct _ADAPTER *a; -+ struct sdio_data *sdio; -+ char tmp[32], cmd[32] = {0}; -+ int num; -+ -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ a = (struct _ADAPTER *)rtw_netdev_priv(dev); -+ d = adapter_to_dvobj(a); -+ sdio = &d->intf_data; -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ num = sscanf(tmp, "%s", cmd); -+ -+ if (num >= 1) { -+ if (strnicmp(cmd, "reg_reset", 10) == 0) { -+ sdio->reg_dump_mark = 0; -+ goto exit; -+ } -+ if (strnicmp(cmd, "reg_free", 9) == 0) { -+ rtw_sdio_dbg_reg_free(d); -+ sdio->reg_dump_mark = 0; -+ goto exit; -+ } -+#if (DBG_SDIO >= 3) -+ if (strnicmp(cmd, "dbg_enable", 11) == 0) { -+ sdio->dbg_enable = 1; -+ goto exit; -+ } -+ if (strnicmp(cmd, "dbg_disable", 12) == 0) { -+ sdio->dbg_enable = 0; -+ goto exit; -+ } -+ if (strnicmp(cmd, "err_stop", 9) == 0) { -+ sdio->err_stop = 1; -+ goto exit; -+ } -+ if (strnicmp(cmd, "err_stop_disable", 16) == 0) { -+ sdio->err_stop = 0; -+ goto exit; -+ } -+ if (strnicmp(cmd, "err_test", 9) == 0) { -+ sdio->err_test_triggered = 0; -+ sdio->err_test = 1; -+ goto exit; -+ } -+#endif /* DBG_SDIO >= 3 */ -+ } -+ -+ return -EINVAL; -+ } -+ -+exit: -+#endif /* DBG_SDIO >= 2 */ -+ return count; -+} -+#endif /* DBG_SDIO */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+static int proc_get_fw_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_dump_fw_info(m, adapter); -+ return 0; -+} -+static int proc_get_mac_reg_dump(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ mac_reg_dump(m, adapter); -+ -+ return 0; -+} -+ -+static int proc_get_bb_reg_dump(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ bb_reg_dump(m, adapter); -+ -+ return 0; -+} -+ -+static int proc_get_bb_reg_dump_ex(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ bb_reg_dump_ex(m, adapter); -+ -+ return 0; -+} -+ -+static int proc_get_rf_reg_dump(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rf_reg_dump(m, adapter); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_RTW_LED -+int proc_get_led_config(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_led_config(m, adapter); -+ -+ return 0; -+} -+ -+ssize_t proc_set_led_config(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ char tmp[32]; -+ u8 strategy; -+ u8 iface_en_mask; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu %hhx", &strategy, &iface_en_mask); -+ -+ if (num >= 1) -+ rtw_led_set_strategy(adapter, strategy); -+ if (num >= 2) -+ rtw_led_set_iface_en_mask(adapter, iface_en_mask); -+ } -+ -+ return count; -+} -+#endif /* CONFIG_RTW_LED */ -+ -+#ifdef CONFIG_AP_MODE -+int proc_get_aid_status(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_aid_status(m, adapter); -+ -+ return 0; -+} -+ -+ssize_t proc_set_aid_status(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sta_priv *stapriv = &adapter->stapriv; -+ -+ char tmp[32]; -+ u8 rr; -+ u16 started_aid; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu %hu", &rr, &started_aid); -+ -+ if (num >= 1) -+ stapriv->rr_aid = rr ? 1 : 0; -+ if (num >= 2) { -+ started_aid = started_aid % (stapriv->max_aid + 1); -+ stapriv->started_aid = started_aid ? started_aid : 1; -+ } -+ } -+ -+ return count; -+} -+ -+int proc_get_ap_isolate(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "%d\n", adapter->mlmepriv.ap_isolate); -+ -+ return 0; -+} -+ -+ssize_t proc_set_ap_isolate(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int ap_isolate; -+ int num = sscanf(tmp, "%d", &ap_isolate); -+ -+ if (num >= 1) -+ adapter->mlmepriv.ap_isolate = ap_isolate ? 1 : 0; -+ } -+ -+ return count; -+} -+ -+#if CONFIG_RTW_AP_DATA_BMC_TO_UC -+static int proc_get_ap_b2u_flags(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ -+ if (MLME_IS_AP(adapter)) -+ dump_ap_b2u_flags(m, adapter); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_ap_b2u_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ u8 src, fwd; -+ int num = sscanf(tmp, "%hhx %hhx", &src, &fwd); -+ -+ if (num >= 1) -+ adapter->b2u_flags_ap_src = src; -+ if (num >= 2) -+ adapter->b2u_flags_ap_fwd = fwd; -+ } -+ -+ return count; -+} -+#endif /* CONFIG_RTW_AP_DATA_BMC_TO_UC */ -+#endif /* CONFIG_AP_MODE */ -+ -+static int proc_get_dump_tx_rate_bmp(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_tx_rate_bmp(m, adapter_to_dvobj(adapter)); -+ -+ return 0; -+} -+ -+static int proc_get_dump_adapters_status(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_adapters_status(m, adapter_to_dvobj(adapter)); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_RTW_CUSTOMER_STR -+static int proc_get_customer_str(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ u8 cstr[RTW_CUSTOMER_STR_LEN]; -+ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ if (rtw_pwr_wakeup(adapter) == _FAIL) -+ goto exit; -+ -+ if (rtw_hal_customer_str_read(adapter, cstr) != _SUCCESS) -+ goto exit; -+ -+ RTW_PRINT_SEL(m, RTW_CUSTOMER_STR_FMT"\n", RTW_CUSTOMER_STR_ARG(cstr)); -+ -+exit: -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+ return 0; -+} -+#endif /* CONFIG_RTW_CUSTOMER_STR */ -+ -+#ifdef CONFIG_SCAN_BACKOP -+static int proc_get_backop_flags_sta(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ -+ RTW_PRINT_SEL(m, "0x%02x\n", mlmeext_scan_backop_flags_sta(mlmeext)); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_backop_flags_sta(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ -+ char tmp[32]; -+ u8 flags; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx", &flags); -+ -+ if (num == 1) -+ mlmeext_assign_scan_backop_flags_sta(mlmeext, flags); -+ } -+ -+ return count; -+} -+ -+#ifdef CONFIG_AP_MODE -+static int proc_get_backop_flags_ap(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ -+ RTW_PRINT_SEL(m, "0x%02x\n", mlmeext_scan_backop_flags_ap(mlmeext)); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_backop_flags_ap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ -+ char tmp[32]; -+ u8 flags; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx", &flags); -+ -+ if (num == 1) -+ mlmeext_assign_scan_backop_flags_ap(mlmeext, flags); -+ } -+ -+ return count; -+} -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef CONFIG_RTW_MESH -+static int proc_get_backop_flags_mesh(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ -+ RTW_PRINT_SEL(m, "0x%02x\n", mlmeext_scan_backop_flags_mesh(mlmeext)); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_backop_flags_mesh(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ -+ char tmp[32]; -+ u8 flags; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx", &flags); -+ -+ if (num == 1) -+ mlmeext_assign_scan_backop_flags_mesh(mlmeext, flags); -+ } -+ -+ return count; -+} -+#endif /* CONFIG_RTW_MESH */ -+ -+#endif /* CONFIG_SCAN_BACKOP */ -+ -+#if defined(CONFIG_LPS_PG) && defined(CONFIG_RTL8822C) -+static int proc_get_lps_pg_debug(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ struct dm_struct *dm = adapter_to_phydm(adapter); -+ -+ rtw_run_in_thread_cmd(adapter, ((void *)(odm_lps_pg_debug_8822c)), dm); -+ -+ return 0; -+} -+#endif -+ -+/* gpio setting */ -+#ifdef CONFIG_GPIO_API -+static ssize_t proc_set_config_gpio(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32] = {0}; -+ int num = 0, gpio_pin = 0, gpio_mode = 0; /* gpio_mode:0 input 1:output; */ -+ -+ if (count < 2) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ num = sscanf(tmp, "%d %d", &gpio_pin, &gpio_mode); -+ RTW_INFO("num=%d gpio_pin=%d mode=%d\n", num, gpio_pin, gpio_mode); -+ padapter->pre_gpio_pin = gpio_pin; -+ -+ if (gpio_mode == 0 || gpio_mode == 1) -+ rtw_hal_config_gpio(padapter, gpio_pin, gpio_mode); -+ } -+ return count; -+ -+} -+static ssize_t proc_set_gpio_output_value(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32] = {0}; -+ int num = 0, gpio_pin = 0, pin_mode = 0; /* pin_mode: 1 high 0:low */ -+ -+ if (count < 2) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ num = sscanf(tmp, "%d %d", &gpio_pin, &pin_mode); -+ RTW_INFO("num=%d gpio_pin=%d pin_high=%d\n", num, gpio_pin, pin_mode); -+ padapter->pre_gpio_pin = gpio_pin; -+ -+ if (pin_mode == 0 || pin_mode == 1) -+ rtw_hal_set_gpio_output_value(padapter, gpio_pin, pin_mode); -+ } -+ return count; -+} -+static int proc_get_gpio(struct seq_file *m, void *v) -+{ -+ u8 gpioreturnvalue = 0; -+ struct net_device *dev = m->private; -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ if (!padapter) -+ return -EFAULT; -+ gpioreturnvalue = rtw_hal_get_gpio(padapter, padapter->pre_gpio_pin); -+ RTW_PRINT_SEL(m, "get_gpio %d:%d\n", padapter->pre_gpio_pin, gpioreturnvalue); -+ -+ return 0; -+ -+} -+static ssize_t proc_set_gpio(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32] = {0}; -+ int num = 0, gpio_pin = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ num = sscanf(tmp, "%d", &gpio_pin); -+ RTW_INFO("num=%d gpio_pin=%d\n", num, gpio_pin); -+ padapter->pre_gpio_pin = gpio_pin; -+ -+ } -+ return count; -+} -+#endif -+ -+static ssize_t proc_set_rx_info_msg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct recv_priv *precvpriv = &(padapter->recvpriv); -+ char tmp[32] = {0}; -+ int phy_info_flag = 0; -+ -+ if (!padapter) -+ return -EFAULT; -+ -+ if (count < 1) { -+ RTW_INFO("argument size is less than 1\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%d", &phy_info_flag); -+ -+ if (num == 1) -+ precvpriv->store_law_data_flag = (BOOLEAN) phy_info_flag; -+ -+ /*RTW_INFO("precvpriv->store_law_data_flag = %d\n",( BOOLEAN )(precvpriv->store_law_data_flag));*/ -+ } -+ return count; -+} -+static int proc_get_rx_info_msg(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_hal_set_odm_var(padapter, HAL_ODM_RX_Dframe_INFO, m, _FALSE); -+ return 0; -+} -+static int proc_get_tx_info_msg(struct seq_file *m, void *v) -+{ -+ _irqL irqL; -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sta_info *psta; -+ u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -+ u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct sta_priv *pstapriv = &padapter->stapriv; -+ int i; -+ _list *plist, *phead; -+ u8 current_rate_id = 0, current_sgi = 0; -+ -+ char *BW, *status; -+ -+ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ if (MLME_IS_STA(padapter)) -+ status = "station mode"; -+ else if (MLME_IS_AP(padapter)) -+ status = "AP mode"; -+ else if (MLME_IS_MESH(padapter)) -+ status = "mesh mode"; -+ else -+ status = " "; -+ _RTW_PRINT_SEL(m, "status=%s\n", status); -+ for (i = 0; i < NUM_STA; i++) { -+ phead = &(pstapriv->sta_hash[i]); -+ plist = get_next(phead); -+ -+ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { -+ -+ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); -+ -+ plist = get_next(plist); -+ -+ if ((_rtw_memcmp(psta->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) -+ && (_rtw_memcmp(psta->cmn.mac_addr, null_addr, ETH_ALEN) != _TRUE) -+ && (_rtw_memcmp(psta->cmn.mac_addr, adapter_mac_addr(padapter), ETH_ALEN) != _TRUE)) { -+ -+ switch (psta->cmn.bw_mode) { -+ -+ case CHANNEL_WIDTH_20: -+ BW = "20M"; -+ break; -+ -+ case CHANNEL_WIDTH_40: -+ BW = "40M"; -+ break; -+ -+ case CHANNEL_WIDTH_80: -+ BW = "80M"; -+ break; -+ -+ case CHANNEL_WIDTH_160: -+ BW = "160M"; -+ break; -+ -+ default: -+ BW = ""; -+ break; -+ } -+ current_rate_id = rtw_get_current_tx_rate(adapter, psta); -+ current_sgi = rtw_get_current_tx_sgi(adapter, psta); -+ -+ RTW_PRINT_SEL(m, "==============================\n"); -+ _RTW_PRINT_SEL(m, "macaddr=" MAC_FMT"\n", MAC_ARG(psta->cmn.mac_addr)); -+ _RTW_PRINT_SEL(m, "Tx_Data_Rate=%s\n", HDATA_RATE(current_rate_id)); -+ _RTW_PRINT_SEL(m, "BW=%s,sgi=%u\n", BW, current_sgi); -+ -+ } -+ } -+ } -+ -+ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); -+ -+ return 0; -+ -+} -+ -+ -+static int proc_get_linked_info_dump(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ if (padapter) -+ RTW_PRINT_SEL(m, "linked_info_dump :%s\n", (padapter->bLinkInfoDump) ? "enable" : "disable"); -+ -+ return 0; -+} -+ -+ -+static ssize_t proc_set_linked_info_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ char tmp[32] = {0}; -+ int mode = 0, pre_mode = 0; -+ int num = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ pre_mode = padapter->bLinkInfoDump; -+ RTW_INFO("pre_mode=%d\n", pre_mode); -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ num = sscanf(tmp, "%d ", &mode); -+ RTW_INFO("num=%d mode=%d\n", num, mode); -+ -+ if (num != 1) { -+ RTW_INFO("argument number is wrong\n"); -+ return -EFAULT; -+ } -+ -+ if (mode == 1 || (mode == 0 && pre_mode == 1)) /* not consider pwr_saving 0: */ -+ padapter->bLinkInfoDump = mode; -+ -+ else if ((mode == 2) || (mode == 0 && pre_mode == 2)) { /* consider power_saving */ -+ /* RTW_INFO("linked_info_dump =%s\n", (padapter->bLinkInfoDump)?"enable":"disable") */ -+ linked_info_dump(padapter, mode); -+ } -+ } -+ return count; -+} -+ -+ -+static int proc_get_sta_tp_dump(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (padapter) -+ RTW_PRINT_SEL(m, "sta_tp_dump :%s\n", (padapter->bsta_tp_dump) ? "enable" : "disable"); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_sta_tp_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ char tmp[32] = {0}; -+ int mode = 0; -+ int num = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ num = sscanf(tmp, "%d ", &mode); -+ -+ if (num != 1) { -+ RTW_INFO("argument number is wrong\n"); -+ return -EFAULT; -+ } -+ if (padapter) -+ padapter->bsta_tp_dump = mode; -+ } -+ return count; -+} -+ -+static int proc_get_sta_tp_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (padapter) -+ rtw_sta_traffic_info(m, padapter); -+ -+ return 0; -+} -+ -+static int proc_get_turboedca_ctrl(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ -+ if (hal_data) { -+ -+ u32 edca_param; -+ -+ if (hal_data->dis_turboedca == 0) -+ RTW_PRINT_SEL(m, "Turbo-EDCA : %s\n", "Enable"); -+ else -+ RTW_PRINT_SEL(m, "Turbo-EDCA : %s, mode=%d, edca_param_mode=0x%x\n", "Disable", hal_data->dis_turboedca, hal_data->edca_param_mode); -+ -+ -+ rtw_hal_get_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param)); -+ -+ _RTW_PRINT_SEL(m, "PARAM_BE:0x%x\n", edca_param); -+ -+ } -+ -+ return 0; -+} -+ -+static ssize_t proc_set_turboedca_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter); -+ char tmp[32] = {0}; -+ int mode = 0, num = 0; -+ u32 param_mode = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) -+ return -EFAULT; -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ num = sscanf(tmp, "%d %x", &mode, ¶m_mode); -+ -+ if (num < 1 || num > 2) { -+ RTW_INFO("argument number is wrong\n"); -+ return -EFAULT; -+ } -+ -+ /* 0: enable turboedca, -+ 1: disable turboedca, -+ 2: disable turboedca and setting EDCA parameter based on the input parameter -+ > 2 : currently reset to 0 */ -+ -+ if (mode > 2) -+ mode = 0; -+ -+ hal_data->dis_turboedca = mode; -+ -+ hal_data->edca_param_mode = 0; /* init. value */ -+ -+ RTW_INFO("dis_turboedca mode = 0x%x\n", hal_data->dis_turboedca); -+ -+ if (num == 2) { -+ -+ hal_data->edca_param_mode = param_mode; -+ -+ RTW_INFO("param_mode = 0x%x\n", param_mode); -+ } -+ -+ } -+ -+ return count; -+ -+} -+ -+static int proc_get_mac_qinfo(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_hal_get_hwreg(adapter, HW_VAR_DUMP_MAC_QUEUE_INFO, (u8 *)m); -+ -+ return 0; -+} -+ -+int proc_get_wifi_spec(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregpriv = &padapter->registrypriv; -+ -+ RTW_PRINT_SEL(m, "wifi_spec=%d\n", pregpriv->wifi_spec); -+ return 0; -+} -+ -+static int proc_get_chan_plan(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_cur_chset(m, adapter_to_rfctl(adapter)); -+ return 0; -+} -+ -+static ssize_t proc_set_chan_plan(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 chan_plan = RTW_CHPLAN_UNSPECIFIED; -+ -+ if (!padapter) -+ return -EFAULT; -+ -+ if (count < 1) { -+ RTW_INFO("argument size is less than 1\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%hhx", &chan_plan); -+ if (num != 1) -+ return count; -+ } -+ -+ rtw_set_channel_plan(padapter, chan_plan); -+ -+ return count; -+} -+ -+static int proc_get_country_code(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ if (rfctl->country_ent) -+ dump_country_chplan(m, rfctl->country_ent); -+ else -+ RTW_PRINT_SEL(m, "unspecified\n"); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_country_code(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ char alpha2[2]; -+ int num; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%c%c", &alpha2[0], &alpha2[1]); -+ if (num != 2) -+ return count; -+ -+ rtw_set_country(padapter, alpha2); -+ -+exit: -+ return count; -+} -+ -+static int cap_spt_op_class_ch_detail = 0; -+ -+static int proc_get_cap_spt_op_class_ch(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_cap_spt_op_class_ch(m , adapter_to_rfctl(adapter), cap_spt_op_class_ch_detail); -+ return 0; -+} -+ -+static ssize_t proc_set_cap_spt_op_class_ch(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ int num; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%d", &cap_spt_op_class_ch_detail); -+ -+exit: -+ return count; -+} -+ -+static int reg_spt_op_class_ch_detail = 0; -+ -+static int proc_get_reg_spt_op_class_ch(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_reg_spt_op_class_ch(m , adapter_to_rfctl(adapter), reg_spt_op_class_ch_detail); -+ return 0; -+} -+ -+static ssize_t proc_set_reg_spt_op_class_ch(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ int num; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%d", ®_spt_op_class_ch_detail); -+ -+exit: -+ return count; -+} -+ -+static int cur_spt_op_class_ch_detail = 0; -+ -+static int proc_get_cur_spt_op_class_ch(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_cur_spt_op_class_ch(m , adapter_to_rfctl(adapter), cur_spt_op_class_ch_detail); -+ return 0; -+} -+ -+static ssize_t proc_set_cur_spt_op_class_ch(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ int num; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%d", &cur_spt_op_class_ch_detail); -+ -+exit: -+ return count; -+} -+ -+#if CONFIG_RTW_MACADDR_ACL -+static int proc_get_macaddr_acl(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_macaddr_acl(m, adapter); -+ return 0; -+} -+ -+ssize_t proc_set_macaddr_acl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[17 * NUM_ACL + 32] = {0}; -+ u8 period; -+ char cmd[32]; -+ u8 mode; -+ u8 addr[ETH_ALEN]; -+ -+#define MAC_ACL_CMD_MODE 0 -+#define MAC_ACL_CMD_ADD 1 -+#define MAC_ACL_CMD_DEL 2 -+#define MAC_ACL_CMD_CLR 3 -+#define MAC_ACL_CMD_NUM 4 -+ -+ static const char * const mac_acl_cmd_str[] = { -+ "mode", -+ "add", -+ "del", -+ "clr", -+ }; -+ u8 cmd_id = MAC_ACL_CMD_NUM; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ /* -+ * mode [] -+ * mode -+ * add [] -+ * del [] -+ * clr -+ */ -+ char *c, *next; -+ int i; -+ u8 is_bcast; -+ -+ next = tmp; -+ c = strsep(&next, " \t"); -+ if (!c || sscanf(c, "%hhu", &period) != 1) -+ goto exit; -+ -+ if (period >= RTW_ACL_PERIOD_NUM) { -+ RTW_WARN(FUNC_ADPT_FMT" invalid period:%u", FUNC_ADPT_ARG(adapter), period); -+ goto exit; -+ } -+ -+ c = strsep(&next, " \t"); -+ if (!c || sscanf(c, "%s", cmd) != 1) -+ goto exit; -+ -+ for (i = 0; i < MAC_ACL_CMD_NUM; i++) -+ if (strcmp(mac_acl_cmd_str[i], cmd) == 0) -+ cmd_id = i; -+ -+ switch (cmd_id) { -+ case MAC_ACL_CMD_MODE: -+ c = strsep(&next, " \t"); -+ if (!c || sscanf(c, "%hhu", &mode) != 1) -+ goto exit; -+ -+ if (mode >= RTW_ACL_MODE_MAX) { -+ RTW_WARN(FUNC_ADPT_FMT" invalid mode:%u", FUNC_ADPT_ARG(adapter), mode); -+ goto exit; -+ } -+ break; -+ -+ case MAC_ACL_CMD_ADD: -+ case MAC_ACL_CMD_DEL: -+ break; -+ -+ case MAC_ACL_CMD_CLR: -+ /* clear settings */ -+ rtw_macaddr_acl_clear(adapter, period); -+ goto exit; -+ -+ default: -+ RTW_WARN(FUNC_ADPT_FMT" invalid cmd:\"%s\"", FUNC_ADPT_ARG(adapter), cmd); -+ goto exit; -+ } -+ -+ /* check for macaddr list */ -+ c = strsep(&next, " \t"); -+ if (!c && cmd_id == MAC_ACL_CMD_MODE) { -+ /* set mode only */ -+ rtw_set_macaddr_acl(adapter, period, mode); -+ goto exit; -+ } -+ -+ if (cmd_id == MAC_ACL_CMD_MODE) { -+ /* set mode and entire macaddr list */ -+ rtw_macaddr_acl_clear(adapter, period); -+ rtw_set_macaddr_acl(adapter, period, mode); -+ } -+ -+ while (c != NULL) { -+ if (sscanf(c, MAC_SFMT, MAC_SARG(addr)) != 6) -+ break; -+ -+ is_bcast = is_broadcast_mac_addr(addr); -+ if (is_bcast -+ || rtw_check_invalid_mac_address(addr, 0) == _FALSE -+ ) { -+ if (cmd_id == MAC_ACL_CMD_DEL) { -+ rtw_acl_remove_sta(adapter, period, addr); -+ if (is_bcast) -+ break; -+ } else if (!is_bcast) -+ rtw_acl_add_sta(adapter, period, addr); -+ } -+ -+ c = strsep(&next, " \t"); -+ } -+ } -+ -+exit: -+ return count; -+} -+#endif /* CONFIG_RTW_MACADDR_ACL */ -+ -+#if CONFIG_RTW_PRE_LINK_STA -+static int proc_get_pre_link_sta(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_pre_link_sta_ctl(m, &adapter->stapriv); -+ return 0; -+} -+ -+ssize_t proc_set_pre_link_sta(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; -+ char tmp[17 * RTW_PRE_LINK_STA_NUM + 32] = {0}; -+ char arg0[16] = {0}; -+ u8 addr[ETH_ALEN]; -+ -+#define PRE_LINK_STA_CMD_RESET 0 -+#define PRE_LINK_STA_CMD_ADD 1 -+#define PRE_LINK_STA_CMD_DEL 2 -+#define PRE_LINK_STA_CMD_NUM 3 -+ -+ static const char * const pre_link_sta_cmd_str[] = { -+ "reset", -+ "add", -+ "del" -+ }; -+ u8 cmd_id = PRE_LINK_STA_CMD_NUM; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ /* cmd [] */ -+ char *c, *next; -+ int i; -+ -+ next = tmp; -+ c = strsep(&next, " \t"); -+ -+ if (sscanf(c, "%s", arg0) != 1) -+ goto exit; -+ -+ for (i = 0; i < PRE_LINK_STA_CMD_NUM; i++) -+ if (strcmp(pre_link_sta_cmd_str[i], arg0) == 0) -+ cmd_id = i; -+ -+ switch (cmd_id) { -+ case PRE_LINK_STA_CMD_RESET: -+ rtw_pre_link_sta_ctl_reset(&adapter->stapriv); -+ goto exit; -+ case PRE_LINK_STA_CMD_ADD: -+ case PRE_LINK_STA_CMD_DEL: -+ break; -+ default: -+ goto exit; -+ } -+ -+ /* macaddr list */ -+ c = strsep(&next, " \t"); -+ while (c != NULL) { -+ if (sscanf(c, MAC_SFMT, MAC_SARG(addr)) != 6) -+ break; -+ -+ if (rtw_check_invalid_mac_address(addr, 0) == _FALSE) { -+ if (cmd_id == PRE_LINK_STA_CMD_ADD) -+ rtw_pre_link_sta_add(&adapter->stapriv, addr); -+ else -+ rtw_pre_link_sta_del(&adapter->stapriv, addr); -+ } -+ -+ c = strsep(&next, " \t"); -+ } -+ } -+ -+exit: -+ return count; -+} -+#endif /* CONFIG_RTW_PRE_LINK_STA */ -+ -+static int proc_get_ch_sel_policy(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ RTW_PRINT_SEL(m, "%-16s\n", "within_same_band"); -+ -+ RTW_PRINT_SEL(m, "%16d\n", rfctl->ch_sel_within_same_band); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_ch_sel_policy(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ char tmp[32]; -+ u8 within_sb; -+ int num; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%hhu", &within_sb); -+ if (num >= 1) -+ rfctl->ch_sel_within_same_band = within_sb ? 1 : 0; -+ -+exit: -+ return count; -+} -+ -+#ifdef CONFIG_DFS_MASTER -+static int proc_get_dfs_test_case(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ RTW_PRINT_SEL(m, "%-24s %-19s\n", "radar_detect_trigger_non", "choose_dfs_ch_first"); -+ RTW_PRINT_SEL(m, "%24hhu %19hhu\n" -+ , rfctl->dbg_dfs_radar_detect_trigger_non -+ , rfctl->dbg_dfs_choose_dfs_ch_first -+ ); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_dfs_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ char tmp[32]; -+ u8 radar_detect_trigger_non; -+ u8 choose_dfs_ch_first; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%hhu %hhu", &radar_detect_trigger_non, &choose_dfs_ch_first); -+ -+ if (num >= 1) -+ rfctl->dbg_dfs_radar_detect_trigger_non = radar_detect_trigger_non; -+ if (num >= 2) -+ rfctl->dbg_dfs_choose_dfs_ch_first = choose_dfs_ch_first; -+ } -+ -+ return count; -+} -+ -+ssize_t proc_set_update_non_ocp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ char tmp[32]; -+ u8 ch, bw = CHANNEL_WIDTH_20, offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -+ int ms = -1; -+ bool updated = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu %hhu %hhu %d", &ch, &bw, &offset, &ms); -+ -+ if (num < 1 || (bw != CHANNEL_WIDTH_20 && num < 3)) -+ goto exit; -+ -+ if (bw == CHANNEL_WIDTH_20) -+ updated = rtw_chset_update_non_ocp_ms(rfctl->channel_set -+ , ch, bw, HAL_PRIME_CHNL_OFFSET_DONT_CARE, ms); -+ else -+ updated = rtw_chset_update_non_ocp_ms(rfctl->channel_set -+ , ch, bw, offset, ms); -+ -+ if (updated) { -+ u8 cch = rtw_get_center_ch(ch, bw, offset); -+ -+ rtw_nlrtw_nop_start_event(adapter, cch, bw); -+ } -+ } -+ -+exit: -+ return count; -+} -+ -+ssize_t proc_set_radar_detect(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ char tmp[32]; -+ u8 fake_radar_detect_cnt = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu", &fake_radar_detect_cnt); -+ -+ if (num < 1) -+ goto exit; -+ -+ rfctl->dbg_dfs_fake_radar_detect_cnt = fake_radar_detect_cnt; -+ } -+ -+exit: -+ return count; -+} -+ -+static int proc_get_dfs_ch_sel_e_flags(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ RTW_PRINT_SEL(m, "0x%02x\n", rfctl->dfs_ch_sel_e_flags); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_dfs_ch_sel_e_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ char tmp[32]; -+ u8 e_flags; -+ int num; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%hhx", &e_flags); -+ if (num != 1) -+ goto exit; -+ -+ rfctl->dfs_ch_sel_e_flags = e_flags; -+ -+exit: -+ return count; -+} -+ -+static int proc_get_dfs_ch_sel_d_flags(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ RTW_PRINT_SEL(m, "0x%02x\n", rfctl->dfs_ch_sel_d_flags); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_dfs_ch_sel_d_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ char tmp[32]; -+ u8 d_flags; -+ int num; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%hhx", &d_flags); -+ if (num != 1) -+ goto exit; -+ -+ rfctl->dfs_ch_sel_d_flags = d_flags; -+ -+exit: -+ return count; -+} -+ -+#if CONFIG_DFS_SLAVE_WITH_RADAR_DETECT -+static int proc_get_dfs_slave_with_rd(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ RTW_PRINT_SEL(m, "%u\n", rfctl->dfs_slave_with_rd); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_dfs_slave_with_rd(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ char tmp[32]; -+ u8 rd; -+ int num; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%hhu", &rd); -+ if (num != 1) -+ goto exit; -+ -+ rd = rd ? 1 : 0; -+ -+ if (rfctl->dfs_slave_with_rd != rd) { -+ rfctl->dfs_slave_with_rd = rd; -+ rtw_dfs_rd_en_decision_cmd(adapter); -+ } -+ -+exit: -+ return count; -+} -+#endif /* CONFIG_DFS_SLAVE_WITH_RADAR_DETECT */ -+#endif /* CONFIG_DFS_MASTER */ -+ -+#ifdef CONFIG_80211N_HT -+int proc_get_rx_ampdu_size_limit(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_regsty_rx_ampdu_size_limit(m, adapter); -+ -+ return 0; -+} -+ -+ssize_t proc_set_rx_ampdu_size_limit(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *regsty = adapter_to_regsty(adapter); -+ char tmp[32]; -+ u8 nss; -+ u8 limit_by_bw[4] = {0xFF}; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int i; -+ int num = sscanf(tmp, "%hhu %hhu %hhu %hhu %hhu" -+ , &nss, &limit_by_bw[0], &limit_by_bw[1], &limit_by_bw[2], &limit_by_bw[3]); -+ -+ if (num < 2) -+ goto exit; -+ if (nss == 0 || nss > 4) -+ goto exit; -+ -+ for (i = 0; i < num - 1; i++) -+ regsty->rx_ampdu_sz_limit_by_nss_bw[nss - 1][i] = limit_by_bw[i]; -+ -+ rtw_rx_ampdu_apply(adapter); -+ } -+ -+exit: -+ return count; -+} -+#endif /* CONFIG_80211N_HT */ -+ -+static int proc_get_rx_chk_limit(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "Rx chk limit : %d\n", rtw_get_rx_chk_limit(padapter)); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_rx_chk_limit(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ char tmp[32]; -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ int rx_chk_limit; -+ -+ if (count < 1) { -+ RTW_INFO("argument size is less than 1\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%d", &rx_chk_limit); -+ -+ rtw_set_rx_chk_limit(padapter, rx_chk_limit); -+ } -+ -+ return count; -+} -+ -+static int proc_get_udpport(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct recv_priv *precvpriv = &(padapter->recvpriv); -+ -+ RTW_PRINT_SEL(m, "%d\n", precvpriv->sink_udpport); -+ return 0; -+} -+static ssize_t proc_set_udpport(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct recv_priv *precvpriv = &(padapter->recvpriv); -+ int sink_udpport = 0; -+ char tmp[32]; -+ -+ -+ if (!padapter) -+ return -EFAULT; -+ -+ if (count < 1) { -+ RTW_INFO("argument size is less than 1\n"); -+ return -EFAULT; -+ } -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%d", &sink_udpport); -+ -+ if (num != 1) { -+ RTW_INFO("invalid input parameter number!\n"); -+ return count; -+ } -+ -+ } -+ precvpriv->sink_udpport = sink_udpport; -+ -+ return count; -+ -+} -+ -+static int proc_get_mi_ap_bc_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ u8 i; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) -+ RTW_PRINT_SEL(m, "iface_id:%d, mac_id && sec_cam_id = %d\n", i, macid_ctl->iface_bmc[i]); -+ -+ return 0; -+} -+static int proc_get_macid_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); -+ u8 i; -+ u8 null_addr[ETH_ALEN] = {0}; -+ u8 *macaddr; -+ -+ RTW_PRINT_SEL(m, "max_num:%u\n", macid_ctl->num); -+ RTW_PRINT_SEL(m, "\n"); -+ -+ RTW_PRINT_SEL(m, "used:\n"); -+ dump_macid_map(m, &macid_ctl->used, macid_ctl->num); -+ RTW_PRINT_SEL(m, "\n"); -+ -+ RTW_PRINT_SEL(m, "%-3s %-3s %-5s %-4s %-17s %-6s %-3s" -+ , "id", "bmc", "ifbmp", "ch_g", "macaddr", "bw", "vht"); -+ -+ if (GET_HAL_TX_NSS(adapter) > 2) -+ _RTW_PRINT_SEL(m, " %-10s", "rate_bmp1"); -+ -+ _RTW_PRINT_SEL(m, " %-10s %s\n", "rate_bmp0", "status"); -+ -+ for (i = 0; i < macid_ctl->num; i++) { -+ if (rtw_macid_is_used(macid_ctl, i) -+ || macid_ctl->h2c_msr[i] -+ ) { -+ if (macid_ctl->sta[i]) -+ macaddr = macid_ctl->sta[i]->cmn.mac_addr; -+ else -+ macaddr = null_addr; -+ -+ RTW_PRINT_SEL(m, "%3u %3u 0x%02x %4d "MAC_FMT" %6s %3u" -+ , i -+ , rtw_macid_is_bmc(macid_ctl, i) -+ , rtw_macid_get_iface_bmp(macid_ctl, i) -+ , rtw_macid_get_ch_g(macid_ctl, i) -+ , MAC_ARG(macaddr) -+ , ch_width_str(macid_ctl->bw[i]) -+ , macid_ctl->vht_en[i] -+ ); -+ -+ if (GET_HAL_TX_NSS(adapter) > 2) -+ _RTW_PRINT_SEL(m, " 0x%08X", macid_ctl->rate_bmp1[i]); -+ -+ _RTW_PRINT_SEL(m, " 0x%08X "H2C_MSR_FMT" %s\n" -+ , macid_ctl->rate_bmp0[i] -+ , H2C_MSR_ARG(&macid_ctl->h2c_msr[i]) -+ , rtw_macid_is_used(macid_ctl, i) ? "" : "[unused]" -+ ); -+ } -+ } -+ RTW_PRINT_SEL(m, "\n"); -+ -+ for (i = 0; i < H2C_MSR_ROLE_MAX; i++) { -+ if (macid_ctl->op_num[i]) { -+ RTW_PRINT_SEL(m, "%-5s op_num:%u\n" -+ , h2c_msr_role_str(i), macid_ctl->op_num[i]); -+ } -+ } -+ -+ return 0; -+} -+ -+static int proc_get_sec_cam(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ -+ RTW_PRINT_SEL(m, "sec_cap:0x%02x\n", cam_ctl->sec_cap); -+ RTW_PRINT_SEL(m, "flags:0x%08x\n", cam_ctl->flags); -+ RTW_PRINT_SEL(m, "\n"); -+ -+ RTW_PRINT_SEL(m, "max_num:%u\n", cam_ctl->num); -+ RTW_PRINT_SEL(m, "used:\n"); -+ dump_sec_cam_map(m, &cam_ctl->used, cam_ctl->num); -+ RTW_PRINT_SEL(m, "\n"); -+ -+ RTW_PRINT_SEL(m, "reg_scr:0x%04x\n", rtw_read16(adapter, 0x680)); -+ RTW_PRINT_SEL(m, "\n"); -+ -+ dump_sec_cam(m, adapter); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_sec_cam(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; -+ char tmp[32] = {0}; -+ char cmd[4]; -+ u8 id_1 = 0, id_2 = 0; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ /* c : clear specific cam entry */ -+ /* wfc : write specific cam entry from cam cache */ -+ /* sw : sec_cam 1/2 swap */ -+ -+ int num = sscanf(tmp, "%s %hhu %hhu", cmd, &id_1, &id_2); -+ -+ if (num < 2) -+ return count; -+ -+ if ((id_1 >= cam_ctl->num) || (id_2 >= cam_ctl->num)) { -+ RTW_ERR(FUNC_ADPT_FMT" invalid id_1:%u id_2:%u\n", FUNC_ADPT_ARG(adapter), id_1, id_2); -+ return count; -+ } -+ -+ if (strcmp("c", cmd) == 0) { -+ _clear_cam_entry(adapter, id_1); -+ adapter->securitypriv.hw_decrypted = _FALSE; /* temporarily set this for TX path to use SW enc */ -+ } else if (strcmp("wfc", cmd) == 0) -+ write_cam_from_cache(adapter, id_1); -+ else if (strcmp("sw", cmd) == 0) -+ rtw_sec_cam_swap(adapter, id_1, id_2); -+ else if (strcmp("cdk", cmd) == 0) -+ rtw_clean_dk_section(adapter); -+#ifdef DBG_SEC_CAM_MOVE -+ else if (strcmp("sgd", cmd) == 0) -+ rtw_hal_move_sta_gk_to_dk(adapter); -+ else if (strcmp("rsd", cmd) == 0) -+ rtw_hal_read_sta_dk_key(adapter, id_1); -+#endif -+ } -+ -+ return count; -+} -+ -+static int proc_get_sec_cam_cache(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_sec_cam_cache(m, adapter); -+ return 0; -+} -+ -+#ifdef CONFIG_AP_MODE -+static ssize_t proc_set_change_bss_chbw(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ int i; -+ char tmp[32]; -+ s16 ch; -+ s8 bw = REQ_BW_NONE, offset = REQ_OFFSET_NONE; -+ u8 ifbmp = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hd %hhd %hhd %hhx", &ch, &bw, &offset, &ifbmp); -+ -+ if (num < 1 || (bw != CHANNEL_WIDTH_20 && num < 3)) -+ goto exit; -+ -+ if (num < 4) -+ ifbmp = BIT(adapter->iface_id); -+ else -+ ifbmp &= (1 << dvobj->iface_nums) - 1; -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ if (!(ifbmp & BIT(i)) || !dvobj->padapters[i]) -+ continue; -+ -+ if (!CHK_MLME_STATE(dvobj->padapters[i], WIFI_AP_STATE | WIFI_MESH_STATE) -+ || !MLME_IS_ASOC(dvobj->padapters[i])) -+ ifbmp &= ~BIT(i); -+ } -+ -+ if (ifbmp) -+ rtw_change_bss_chbw_cmd(adapter, RTW_CMDF_WAIT_ACK, ifbmp, 0, ch, bw, offset); -+ } -+ -+exit: -+ return count; -+} -+#endif -+ -+#if CONFIG_TX_AC_LIFETIME -+static int proc_get_tx_aclt_force_val(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ dump_tx_aclt_force_val(m, dvobj); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_tx_aclt_force_val(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ char tmp[32] = {0}; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ struct tx_aclt_conf_t input; -+ int num = sscanf(tmp, "%hhx %u %u", &input.en, &input.vo_vi, &input.be_bk); -+ -+ if (num < 1) -+ return count; -+ -+ rtw_hal_set_tx_aclt_force_val(adapter, &input, num); -+ rtw_run_in_thread_cmd(adapter, ((void *)(rtw_hal_update_tx_aclt)), adapter); -+ } -+ -+ return count; -+} -+ -+static int proc_get_tx_aclt_flags(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ RTW_PRINT_SEL(m, "0x%02x\n", dvobj->tx_aclt_flags); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_tx_aclt_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ char tmp[32] = {0}; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 flags; -+ int num = sscanf(tmp, "%hhx", &flags); -+ -+ if (num < 1) -+ return count; -+ -+ if (dvobj->tx_aclt_flags == flags) -+ return count; -+ -+ dvobj->tx_aclt_flags = flags; -+ -+ rtw_run_in_thread_cmd(adapter, ((void *)(rtw_hal_update_tx_aclt)), adapter); -+ } -+ -+ return count; -+} -+ -+static int proc_get_tx_aclt_confs(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ RTW_PRINT_SEL(m, "flags:0x%02x\n", dvobj->tx_aclt_flags); -+ dump_tx_aclt_confs(m, dvobj); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_tx_aclt_confs(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ char tmp[32] = {0}; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ u8 id; -+ struct tx_aclt_conf_t input; -+ int num = sscanf(tmp, "%hhu %hhx %u %u", &id, &input.en, &input.vo_vi, &input.be_bk); -+ -+ if (num < 2) -+ return count; -+ -+ rtw_hal_set_tx_aclt_conf(adapter, id, &input, num - 1); -+ rtw_run_in_thread_cmd(adapter, ((void *)(rtw_hal_update_tx_aclt)), adapter); -+ } -+ -+ return count; -+} -+#endif /* CONFIG_TX_AC_LIFETIME */ -+ -+static int proc_get_tx_bw_mode(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "0x%02x\n", adapter->driver_tx_bw_mode); -+ RTW_PRINT_SEL(m, "2.4G:%s\n", ch_width_str(ADAPTER_TX_BW_2G(adapter))); -+ RTW_PRINT_SEL(m, "5G:%s\n", ch_width_str(ADAPTER_TX_BW_5G(adapter))); -+ -+ return 0; -+} -+ -+static void rtw_set_tx_bw_mode(struct _ADAPTER *adapter, u8 bw_mode) -+{ -+ struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); -+ struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl; -+ u8 update = _FALSE; -+ -+ if ((MLME_STATE(adapter) & WIFI_ASOC_STATE) -+ && ((mlmeext->cur_channel <= 14 && BW_MODE_2G(bw_mode) != ADAPTER_TX_BW_2G(adapter)) -+ || (mlmeext->cur_channel >= 36 && BW_MODE_5G(bw_mode) != ADAPTER_TX_BW_5G(adapter))) -+ ) { -+ /* RA mask update needed */ -+ update = _TRUE; -+ } -+ adapter->driver_tx_bw_mode = bw_mode; -+ -+ if (update == _TRUE) { -+ struct sta_info *sta; -+ int i; -+ -+ for (i = 0; i < MACID_NUM_SW_LIMIT; i++) { -+ sta = macid_ctl->sta[i]; -+ if (sta && !is_broadcast_mac_addr(sta->cmn.mac_addr)) -+ rtw_dm_ra_mask_wk_cmd(adapter, (u8 *)sta); -+ } -+ } -+} -+ -+static ssize_t proc_set_tx_bw_mode(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 bw_mode; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx", &bw_mode); -+ -+ if (num < 1 || bw_mode == adapter->driver_tx_bw_mode) -+ goto exit; -+ -+ rtw_set_tx_bw_mode(adapter, bw_mode); -+ } -+ -+exit: -+ return count; -+} -+ -+static int proc_get_hal_txpwr_info(struct seq_file *m, void *v) -+{ -+#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ -+ if (hal_data->txpwr_pg_mode == TXPWR_PG_WITH_PWR_IDX) { -+ if (hal_is_band_support(adapter, BAND_ON_2_4G)) -+ dump_hal_txpwr_info_2g(m, adapter, hal_spec->rfpath_num_2g, hal_data->max_tx_cnt); -+ -+ #if CONFIG_IEEE80211_BAND_5GHZ -+ if (hal_is_band_support(adapter, BAND_ON_5G)) -+ dump_hal_txpwr_info_5g(m, adapter, hal_spec->rfpath_num_5g, hal_data->max_tx_cnt); -+ #endif -+ } -+#endif -+ -+ return 0; -+} -+ -+static int proc_get_target_tx_power(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_target_tx_power(m, adapter); -+ -+ return 0; -+} -+ -+static int proc_get_tx_power_by_rate(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_tx_power_by_rate(m, adapter); -+ -+ return 0; -+} -+ -+#if CONFIG_TXPWR_LIMIT -+static int proc_get_tx_power_limit(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_txpwr_lmt(m, adapter); -+ -+ return 0; -+} -+#endif /* CONFIG_TXPWR_LIMIT */ -+ -+static int proc_get_tpc_settings(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_txpwr_tpc_settings(m, adapter); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_tpc_settings(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ char tmp[32] = {0}; -+ u8 mode; -+ u16 m_constraint; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu %hu", &mode, &m_constraint); -+ -+ if (num < 1) -+ return count; -+ -+ if (mode >= TPC_MODE_INVALID) -+ return count; -+ -+ if (mode == TPC_MODE_MANUAL && num >= 2) -+ rfctl->tpc_manual_constraint = rtw_min(m_constraint, TPC_MANUAL_CONSTRAINT_MAX); -+ rfctl->tpc_mode = mode; -+ -+ if (rtw_get_hw_init_completed(adapter)) -+ rtw_run_in_thread_cmd_wait(adapter, ((void *)(rtw_hal_update_txpwr_level)), adapter, 2000); -+ } -+ -+ return count; -+} -+ -+static int proc_get_antenna_gain(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_txpwr_antenna_gain(m, adapter); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_antenna_gain(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); -+ -+ char tmp[32] = {0}; -+ s16 gain; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hd", &gain); -+ -+ if (num < 1) -+ return count; -+ -+ rfctl->antenna_gain = gain; -+ -+ if (rtw_get_hw_init_completed(adapter)) -+ rtw_run_in_thread_cmd_wait(adapter, ((void *)(rtw_hal_update_txpwr_level)), adapter, 2000); -+ } -+ -+ return count; -+} -+ -+static int proc_get_tx_power_ext_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_tx_power_ext_info(m, adapter); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_tx_power_ext_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ char tmp[32] = {0}; -+ char cmd[16] = {0}; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%s", cmd); -+ -+ if (num < 1) -+ return count; -+ -+ #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE -+ phy_free_filebuf_mask(adapter, LOAD_BB_PG_PARA_FILE | LOAD_RF_TXPWR_LMT_PARA_FILE); -+ #endif -+ -+ rtw_ps_deny(adapter, PS_DENY_IOCTL); -+ if (rtw_pwr_wakeup(adapter) == _FALSE) -+ goto clear_ps_deny; -+ -+ if (strcmp("default", cmd) == 0) -+ rtw_run_in_thread_cmd(adapter, ((void *)(phy_reload_default_tx_power_ext_info)), adapter); -+ else -+ rtw_run_in_thread_cmd(adapter, ((void *)(phy_reload_tx_power_ext_info)), adapter); -+ -+ rtw_run_in_thread_cmd_wait(adapter, ((void *)(rtw_hal_update_txpwr_level)), adapter, 2000); -+ -+clear_ps_deny: -+ rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -+ } -+ -+ return count; -+} -+ -+static void *proc_start_tx_power_idx(struct seq_file *m, loff_t *pos) -+{ -+ u8 path = ((*pos) & 0xFF00) >> 8; -+ -+ if (path >= RF_PATH_MAX) -+ return NULL; -+ -+ return pos; -+} -+static void proc_stop_tx_power_idx(struct seq_file *m, void *v) -+{ -+} -+ -+static void *proc_next_tx_power_idx(struct seq_file *m, void *v, loff_t *pos) -+{ -+ u8 path = ((*pos) & 0xFF00) >> 8; -+ u8 rs = *pos & 0xFF; -+ -+ rs++; -+ if (rs >= RATE_SECTION_NUM) { -+ rs = 0; -+ path++; -+ } -+ -+ if (path >= RF_PATH_MAX) -+ return NULL; -+ -+ *pos = (path << 8) | rs; -+ -+ return pos; -+} -+ -+static int proc_get_tx_power_idx(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u32 pos = *((loff_t *)(v)); -+ u8 path = (pos & 0xFF00) >> 8; -+ u8 rs = pos & 0xFF; -+ enum channel_width bw = hal_data->current_channel_bw; -+ u8 cch = hal_data->current_channel; -+ -+ if (0) -+ RTW_INFO("%s path=%u, rs=%u\n", __func__, path, rs); -+ -+ if (path == RF_PATH_A && rs == CCK) -+ dump_tx_power_idx_title(m, adapter, bw, cch, 0); -+ dump_tx_power_idx_by_path_rs(m, adapter, path, rs, bw, cch, 0); -+ -+ return 0; -+} -+ -+static struct seq_operations seq_ops_tx_power_idx = { -+ .start = proc_start_tx_power_idx, -+ .stop = proc_stop_tx_power_idx, -+ .next = proc_next_tx_power_idx, -+ .show = proc_get_tx_power_idx, -+}; -+ -+static ssize_t proc_set_tx_power_idx_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ char tmp[32] = {0}; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ u8 ch, bw, offset; -+ u8 cch; -+ -+ int num = sscanf(tmp, "%hhu %hhu %hhu", &ch, &bw, &offset); -+ -+ if (num < 3) -+ return count; -+ -+ cch = rtw_get_center_ch(ch, bw, offset); -+ dump_tx_power_idx(RTW_DBGDUMP, adapter, bw, cch, ch); -+ } -+ -+ return count; -+} -+ -+static void *proc_start_txpwr_total_dbm(struct seq_file *m, loff_t *pos) -+{ -+ u8 rs = *pos; -+ -+ if (rs >= RATE_SECTION_NUM) -+ return NULL; -+ -+ return pos; -+} -+ -+static void proc_stop_txpwr_total_dbm(struct seq_file *m, void *v) -+{ -+} -+ -+static void *proc_next_txpwr_total_dbm(struct seq_file *m, void *v, loff_t *pos) -+{ -+ u8 rs = *pos; -+ -+ rs++; -+ if (rs >= RATE_SECTION_NUM) -+ return NULL; -+ -+ *pos = rs; -+ -+ return pos; -+} -+ -+static int proc_get_txpwr_total_dbm(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); -+ u32 pos = *((loff_t *)(v)); -+ u8 rs = pos; -+ enum channel_width bw = hal_data->current_channel_bw; -+ u8 cch = hal_data->current_channel; -+ -+ if (rs == CCK) -+ dump_txpwr_total_dbm_title(m, adapter, bw, cch, 0); -+ dump_txpwr_total_dbm_by_rs(m, adapter, rs, bw, cch, 0); -+ -+ return 0; -+} -+ -+static struct seq_operations seq_ops_txpwr_total_dbm = { -+ .start = proc_start_txpwr_total_dbm, -+ .stop = proc_stop_txpwr_total_dbm, -+ .next = proc_next_txpwr_total_dbm, -+ .show = proc_get_txpwr_total_dbm, -+}; -+ -+static ssize_t proc_set_txpwr_total_dbm_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ char tmp[32] = {0}; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ u8 ch, bw, offset; -+ u8 cch; -+ -+ int num = sscanf(tmp, "%hhu %hhu %hhu", &ch, &bw, &offset); -+ -+ if (num < 3) -+ return count; -+ -+ cch = rtw_get_center_ch(ch, bw, offset); -+ dump_txpwr_total_dbm(RTW_DBGDUMP, adapter, bw, cch, ch); -+ } -+ -+ return count; -+} -+ -+#ifdef CONFIG_RF_POWER_TRIM -+static int proc_get_kfree_flag(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); -+ -+ RTW_PRINT_SEL(m, "0x%02x\n", kfree_data->flag); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_kfree_flag(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); -+ char tmp[32] = {0}; -+ u8 flag; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhx", &flag); -+ -+ if (num < 1) -+ return count; -+ -+ kfree_data->flag = flag; -+ } -+ -+ return count; -+} -+ -+static int proc_get_kfree_bb_gain(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); -+ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); -+ u8 i, j; -+ -+ for (i = 0; i < BB_GAIN_NUM; i++) { -+ -+ if (i == 0) -+ _RTW_PRINT_SEL(m, "2G: "); -+#if CONFIG_IEEE80211_BAND_5GHZ -+ switch (i) { -+ case 1: -+ _RTW_PRINT_SEL(m, "5GLB1: "); -+ break; -+ case 2: -+ _RTW_PRINT_SEL(m, "5GLB2: "); -+ break; -+ case 3: -+ _RTW_PRINT_SEL(m, "5GMB1: "); -+ break; -+ case 4: -+ _RTW_PRINT_SEL(m, "5GMB2: "); -+ break; -+ case 5: -+ _RTW_PRINT_SEL(m, "5GHB: "); -+ break; -+ } -+#endif -+ for (j = 0; j < hal_spec->rf_reg_path_num; j++) -+ _RTW_PRINT_SEL(m, "%d ", kfree_data->bb_gain[i][j]); -+ _RTW_PRINT_SEL(m, "\n"); -+ } -+ -+ return 0; -+} -+ -+static ssize_t proc_set_kfree_bb_gain(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); -+ char tmp[BB_GAIN_NUM * RF_PATH_MAX] = {0}; -+ u8 chidx; -+ s8 bb_gain[BB_GAIN_NUM]; -+ char ch_band_Group[6]; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ char *c, *next; -+ int i = 0; -+ -+ next = tmp; -+ c = strsep(&next, " \t"); -+ -+ if (sscanf(c, "%s", ch_band_Group) != 1) { -+ RTW_INFO("Error Head Format, channel Group select\n,Please input:\t 2G , 5GLB1 , 5GLB2 , 5GMB1 , 5GMB2 , 5GHB\n"); -+ return count; -+ } -+ if (strcmp("2G", ch_band_Group) == 0) -+ chidx = BB_GAIN_2G; -+#if CONFIG_IEEE80211_BAND_5GHZ -+ else if (strcmp("5GLB1", ch_band_Group) == 0) -+ chidx = BB_GAIN_5GLB1; -+ else if (strcmp("5GLB2", ch_band_Group) == 0) -+ chidx = BB_GAIN_5GLB2; -+ else if (strcmp("5GMB1", ch_band_Group) == 0) -+ chidx = BB_GAIN_5GMB1; -+ else if (strcmp("5GMB2", ch_band_Group) == 0) -+ chidx = BB_GAIN_5GMB2; -+ else if (strcmp("5GHB", ch_band_Group) == 0) -+ chidx = BB_GAIN_5GHB; -+#endif /*CONFIG_IEEE80211_BAND_5GHZ*/ -+ else { -+ RTW_INFO("Error Head Format, channel Group select\n,Please input:\t 2G , 5GLB1 , 5GLB2 , 5GMB1 , 5GMB2 , 5GHB\n"); -+ return count; -+ } -+ c = strsep(&next, " \t"); -+ -+ while (c != NULL) { -+ if (sscanf(c, "%hhx", &bb_gain[i]) != 1) -+ break; -+ -+ kfree_data->bb_gain[chidx][i] = bb_gain[i]; -+ RTW_INFO("%s,kfree_data->bb_gain[%d][%d]=%x\n", __func__, chidx, i, kfree_data->bb_gain[chidx][i]); -+ -+ c = strsep(&next, " \t"); -+ i++; -+ } -+ -+ } -+ -+ return count; -+ -+} -+ -+static int proc_get_kfree_thermal(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); -+ -+ _RTW_PRINT_SEL(m, "%d\n", kfree_data->thermal); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_kfree_thermal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct kfree_data_t *kfree_data = GET_KFREE_DATA(adapter); -+ char tmp[32] = {0}; -+ s8 thermal; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhd", &thermal); -+ -+ if (num < 1) -+ return count; -+ -+ kfree_data->thermal = thermal; -+ } -+ -+ return count; -+} -+ -+static ssize_t proc_set_tx_gain_offset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter; -+ char tmp[32] = {0}; -+ u8 rf_path; -+ s8 offset; -+ -+ adapter = (_adapter *)rtw_netdev_priv(dev); -+ if (!adapter) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = sscanf(tmp, "%hhu %hhd", &rf_path, &offset); -+ -+ if (num < 2) -+ return count; -+ -+ RTW_INFO("write rf_path:%u tx gain offset:%d\n", rf_path, offset); -+ rtw_rf_set_tx_gain_offset(adapter, rf_path, offset); -+ } -+ -+ return count; -+} -+#endif /* CONFIG_RF_POWER_TRIM */ -+ -+#ifdef CONFIG_BT_COEXIST -+ssize_t proc_set_btinfo_evt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 btinfo[8]; -+ -+ if (count < 6) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ int num = 0; -+ -+ _rtw_memset(btinfo, 0, 8); -+ -+ num = sscanf(tmp, "%hhx %hhx %hhx %hhx %hhx %hhx %hhx %hhx" -+ , &btinfo[0], &btinfo[1], &btinfo[2], &btinfo[3] -+ , &btinfo[4], &btinfo[5], &btinfo[6], &btinfo[7]); -+ -+ if (num < 6) -+ return -EINVAL; -+ -+ btinfo[1] = num - 2; -+ -+ rtw_btinfo_cmd(padapter, btinfo, btinfo[1] + 2); -+ } -+ -+ return count; -+} -+ -+static u8 btreg_read_type = 0; -+static u16 btreg_read_addr = 0; -+static int btreg_read_error = 0; -+static u8 btreg_write_type = 0; -+static u16 btreg_write_addr = 0; -+static int btreg_write_error = 0; -+ -+static u8 *btreg_type[] = { -+ "rf", -+ "modem", -+ "bluewize", -+ "vendor", -+ "le" -+}; -+ -+static int btreg_parse_str(char const *input, u8 *type, u16 *addr, u16 *val) -+{ -+ u32 num; -+ u8 str[80] = {0}; -+ u8 t = 0; -+ u32 a, v; -+ u8 i, n; -+ -+ -+ num = sscanf(input, "%s %x %x", str, &a, &v); -+ if (num < 2) { -+ RTW_INFO("%s: INVALID input!(%s)\n", __FUNCTION__, input); -+ return -EINVAL; -+ } -+ if ((num < 3) && val) { -+ RTW_INFO("%s: INVALID input!(%s)\n", __FUNCTION__, input); -+ return -EINVAL; -+ } -+ -+ n = sizeof(btreg_type) / sizeof(btreg_type[0]); -+ for (i = 0; i < n; i++) { -+ if (!strcasecmp(str, btreg_type[i])) { -+ t = i; -+ break; -+ } -+ } -+ if (i == n) { -+ RTW_INFO("%s: unknown type(%s)!\n", __FUNCTION__, str); -+ return -EINVAL; -+ } -+ -+ switch (t) { -+ case 0: -+ /* RF */ -+ if (a & 0xFFFFFF80) { -+ RTW_INFO("%s: INVALID address(0x%X) for type %s(%d)!\n", -+ __FUNCTION__, a, btreg_type[t], t); -+ return -EINVAL; -+ } -+ break; -+ case 1: -+ /* Modem */ -+ if (a & 0xFFFFFE00) { -+ RTW_INFO("%s: INVALID address(0x%X) for type %s(%d)!\n", -+ __FUNCTION__, a, btreg_type[t], t); -+ return -EINVAL; -+ } -+ break; -+ default: -+ /* Others(Bluewize, Vendor, LE) */ -+ if (a & 0xFFFFF000) { -+ RTW_INFO("%s: INVALID address(0x%X) for type %s(%d)!\n", -+ __FUNCTION__, a, btreg_type[t], t); -+ return -EINVAL; -+ } -+ break; -+ } -+ -+ if (val) { -+ if (v & 0xFFFF0000) { -+ RTW_INFO("%s: INVALID value(0x%x)!\n", __FUNCTION__, v); -+ return -EINVAL; -+ } -+ *val = (u16)v; -+ } -+ -+ *type = (u8)t; -+ *addr = (u16)a; -+ -+ return 0; -+} -+ -+int proc_get_btreg_read(struct seq_file *m, void *v) -+{ -+ struct net_device *dev; -+ PADAPTER padapter; -+ u16 ret; -+ u32 data; -+ -+ -+ if (btreg_read_error) -+ return btreg_read_error; -+ -+ dev = m->private; -+ padapter = (PADAPTER)rtw_netdev_priv(dev); -+ -+ ret = rtw_btcoex_btreg_read(padapter, btreg_read_type, btreg_read_addr, &data); -+ if (CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(ret, BT_STATUS_BT_OP_SUCCESS)) -+ RTW_PRINT_SEL(m, "BTREG read: (%s)0x%04X = 0x%08x\n", btreg_type[btreg_read_type], btreg_read_addr, data); -+ else -+ RTW_PRINT_SEL(m, "BTREG read: (%s)0x%04X read fail. error code = 0x%04x.\n", btreg_type[btreg_read_type], btreg_read_addr, ret); -+ -+ return 0; -+} -+ -+ssize_t proc_set_btreg_read(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ PADAPTER padapter; -+ u8 tmp[80] = {0}; -+ u32 num; -+ int err; -+ -+ -+ padapter = (PADAPTER)rtw_netdev_priv(dev); -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", -+ FUNC_ADPT_ARG(padapter)); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", -+ FUNC_ADPT_ARG(padapter)); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ num = count; -+ if (num > (sizeof(tmp) - 1)) -+ num = (sizeof(tmp) - 1); -+ -+ if (copy_from_user(tmp, buffer, num)) { -+ RTW_INFO(FUNC_ADPT_FMT ": copy buffer from user space FAIL!\n", -+ FUNC_ADPT_ARG(padapter)); -+ err = -EFAULT; -+ goto exit; -+ } -+ /* [Coverity] sure tmp end with '\0'(string terminal) */ -+ tmp[sizeof(tmp) - 1] = 0; -+ -+ err = btreg_parse_str(tmp, &btreg_read_type, &btreg_read_addr, NULL); -+ if (err) -+ goto exit; -+ -+ RTW_INFO(FUNC_ADPT_FMT ": addr=(%s)0x%X\n", -+ FUNC_ADPT_ARG(padapter), btreg_type[btreg_read_type], btreg_read_addr); -+ -+exit: -+ btreg_read_error = err; -+ -+ return count; -+} -+ -+int proc_get_btreg_write(struct seq_file *m, void *v) -+{ -+ struct net_device *dev; -+ PADAPTER padapter; -+ u16 ret; -+ u32 data; -+ -+ -+ if (btreg_write_error < 0) -+ return btreg_write_error; -+ else if (btreg_write_error > 0) { -+ RTW_PRINT_SEL(m, "BTREG write: (%s)0x%04X write fail. error code = 0x%04x.\n", btreg_type[btreg_write_type], btreg_write_addr, btreg_write_error); -+ return 0; -+ } -+ -+ dev = m->private; -+ padapter = (PADAPTER)rtw_netdev_priv(dev); -+ -+ ret = rtw_btcoex_btreg_read(padapter, btreg_write_type, btreg_write_addr, &data); -+ if (CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(ret, BT_STATUS_BT_OP_SUCCESS)) -+ RTW_PRINT_SEL(m, "BTREG read: (%s)0x%04X = 0x%08x\n", btreg_type[btreg_write_type], btreg_write_addr, data); -+ else -+ RTW_PRINT_SEL(m, "BTREG read: (%s)0x%04X read fail. error code = 0x%04x.\n", btreg_type[btreg_write_type], btreg_write_addr, ret); -+ -+ return 0; -+} -+ -+ssize_t proc_set_btreg_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ PADAPTER padapter; -+ u8 tmp[80] = {0}; -+ u32 num; -+ u16 val; -+ u16 ret; -+ int err; -+ -+ -+ padapter = (PADAPTER)rtw_netdev_priv(dev); -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", -+ FUNC_ADPT_ARG(padapter)); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", -+ FUNC_ADPT_ARG(padapter)); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ num = count; -+ if (num > (sizeof(tmp) - 1)) -+ num = (sizeof(tmp) - 1); -+ -+ if (copy_from_user(tmp, buffer, num)) { -+ RTW_INFO(FUNC_ADPT_FMT ": copy buffer from user space FAIL!\n", -+ FUNC_ADPT_ARG(padapter)); -+ err = -EFAULT; -+ goto exit; -+ } -+ -+ err = btreg_parse_str(tmp, &btreg_write_type, &btreg_write_addr, &val); -+ if (err) -+ goto exit; -+ -+ RTW_INFO(FUNC_ADPT_FMT ": Set (%s)0x%X = 0x%x\n", -+ FUNC_ADPT_ARG(padapter), btreg_type[btreg_write_type], btreg_write_addr, val); -+ -+ ret = rtw_btcoex_btreg_write(padapter, btreg_write_type, btreg_write_addr, val); -+ if (!CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(ret, BT_STATUS_BT_OP_SUCCESS)) -+ err = ret; -+ -+exit: -+ btreg_write_error = err; -+ -+ return count; -+} -+ -+int proc_get_btc_reduce_wl_txpwr(struct seq_file *m, void *v) -+{ -+ struct net_device *dev; -+ PADAPTER padapter; -+ u8 data; -+ -+ dev = m->private; -+ padapter = (PADAPTER)rtw_netdev_priv(dev); -+ -+ data = rtw_btcoex_get_reduce_wl_txpwr(padapter); -+ RTW_PRINT_SEL(m, "BTC reduce WL TxPwr = %d dB\n", data); -+ -+ return 0; -+} -+ -+ssize_t proc_set_btc_reduce_wl_txpwr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ PADAPTER padapter; -+ HAL_DATA_TYPE *hal_data; -+ u8 tmp[80] = {0}; -+ u32 val = 0; -+ u32 num; -+ -+ padapter = (PADAPTER)rtw_netdev_priv(dev); -+ hal_data = GET_HAL_DATA(padapter); -+ -+ /* RTW_INFO("+" FUNC_ADPT_FMT "\n", FUNC_ADPT_ARG(padapter)); */ -+ -+ if (NULL == buffer) { -+ RTW_INFO(FUNC_ADPT_FMT ": input buffer is NULL!\n", -+ FUNC_ADPT_ARG(padapter)); -+ -+ return -EFAULT; -+ } -+ -+ if (count < 1) { -+ RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", -+ FUNC_ADPT_ARG(padapter)); -+ -+ return -EFAULT; -+ } -+ -+ num = count; -+ if (num > (sizeof(tmp) - 1)) -+ num = (sizeof(tmp) - 1); -+ -+ if (copy_from_user(tmp, buffer, num)) { -+ RTW_INFO(FUNC_ADPT_FMT ": copy buffer from user space FAIL!\n", -+ FUNC_ADPT_ARG(padapter)); -+ -+ return -EFAULT; -+ } -+ -+ num = sscanf(tmp, "%d", &val); -+ -+ if ((IS_HARDWARE_TYPE_8822C(padapter)) && (hal_data->EEPROMBluetoothCoexist == _TRUE)) -+ rtw_btc_reduce_wl_txpwr_cmd(padapter, val); -+ -+ return count; -+} -+ -+#endif /* CONFIG_BT_COEXIST */ -+ -+#ifdef CONFIG_MBSSID_CAM -+int proc_get_mbid_cam_cache(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_mbid_cam_cache_dump(m, __func__, adapter); -+ rtw_mbid_cam_dump(m, __func__, adapter); -+ return 0; -+} -+#endif /* CONFIG_MBSSID_CAM */ -+ -+int proc_get_mac_addr(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_hal_dump_macaddr(m, adapter); -+ return 0; -+} -+ -+static int proc_get_skip_band(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ int bandskip; -+ -+ bandskip = RTW_GET_SCAN_BAND_SKIP(adapter); -+ RTW_PRINT_SEL(m, "bandskip:0x%02x\n", bandskip); -+ return 0; -+} -+ -+static ssize_t proc_set_skip_band(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[6]; -+ u8 skip_band; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu", &skip_band); -+ -+ if (num < 1) -+ return -EINVAL; -+ -+ if (1 == skip_band) -+ RTW_SET_SCAN_BAND_SKIP(padapter, BAND_24G); -+ else if (2 == skip_band) -+ RTW_SET_SCAN_BAND_SKIP(padapter, BAND_5G); -+ else if (3 == skip_band) -+ RTW_CLR_SCAN_BAND_SKIP(padapter, BAND_24G); -+ else if (4 == skip_band) -+ RTW_CLR_SCAN_BAND_SKIP(padapter, BAND_5G); -+ } -+ return count; -+ -+} -+ -+#ifdef CONFIG_RTW_ACS -+static int proc_get_chan_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_acs_chan_info_dump(m, adapter); -+ return 0; -+} -+ -+static int proc_get_best_chan(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (IS_ACS_ENABLE(adapter)) -+ rtw_acs_info_dump(m, adapter); -+ else -+ _RTW_PRINT_SEL(m,"ACS disabled\n"); -+ return 0; -+} -+ -+static ssize_t proc_set_acs(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+#ifdef CONFIG_RTW_ACS_DBG -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 acs_state = 0; -+ u16 scan_ch_ms= 0, acs_scan_ch_ms = 0; -+ u8 scan_type = SCAN_ACTIVE, igi= 0, bw = 0; -+ u8 acs_scan_type = SCAN_ACTIVE, acs_igi= 0, acs_bw = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu %hhu %hu %hhx %hhu", -+ &acs_state, &scan_type, &scan_ch_ms, &igi, &bw); -+ -+ if (num < 1) -+ return -EINVAL; -+ -+ if (acs_state) -+ rtw_acs_start(padapter); -+ else -+ rtw_acs_stop(padapter); -+ num = num -1; -+ -+ if(num) { -+ if (num-- > 0) -+ acs_scan_type = scan_type; -+ if (num-- > 0) -+ acs_scan_ch_ms = scan_ch_ms; -+ if (num-- > 0) -+ acs_igi = igi; -+ if (num-- > 0) -+ acs_bw = bw; -+ rtw_acs_adv_setting(padapter, acs_scan_type, acs_scan_ch_ms, acs_igi, acs_bw); -+ } -+ } -+#endif /*CONFIG_RTW_ACS_DBG*/ -+ return count; -+} -+#endif /*CONFIG_RTW_ACS*/ -+ -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+static int proc_get_nm(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_noise_info_dump(m, adapter); -+ return 0; -+} -+ -+static ssize_t proc_set_nm(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 nm_state = 0; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu", &nm_state); -+ -+ if (num < 1) -+ return -EINVAL; -+ -+ if (nm_state) -+ rtw_nm_enable(padapter); -+ else -+ rtw_nm_disable(padapter); -+ -+ } -+ return count; -+} -+#endif /*CONFIG_RTW_ACS*/ -+ -+static int proc_get_hal_spec(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_hal_spec(m, adapter); -+ return 0; -+} -+ -+static int proc_get_hal_trx_mode(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ -+ dump_hal_trx_mode(m, adapter); -+ return 0; -+} -+ -+static int proc_get_phy_cap(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_dump_phy_cap(m, adapter); -+#ifdef CONFIG_80211N_HT -+ rtw_dump_drv_phy_cap(m, adapter); -+ rtw_get_dft_phy_cap(m, adapter); -+#endif /* CONFIG_80211N_HT */ -+ return 0; -+} -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+#include "../../hal/hal_halmac.h" -+static int proc_get_trx_share_mode(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_trx_share_mode(m, adapter); -+ return 0; -+} -+#endif -+ -+static int proc_dump_rsvd_page(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_dump_rsvd_page(m, adapter, adapter->rsvd_page_offset, adapter->rsvd_page_num); -+ return 0; -+} -+static ssize_t proc_set_rsvd_page_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 page_offset, page_num; -+ -+ if (count < 2) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu %hhu", &page_offset, &page_num); -+ -+ if (num < 2) -+ return -EINVAL; -+ padapter->rsvd_page_offset = page_offset; -+ padapter->rsvd_page_num = page_num; -+ } -+ return count; -+} -+ -+#ifdef CONFIG_SUPPORT_FIFO_DUMP -+static int proc_dump_fifo(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_dump_fifo(m, adapter, adapter->fifo_sel, adapter->fifo_addr, adapter->fifo_size); -+ return 0; -+} -+static ssize_t proc_set_fifo_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u8 fifo_sel = 0; -+ u32 fifo_addr = 0; -+ u32 fifo_size = 0; -+ -+ if (count < 3) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%hhu %x %d", &fifo_sel, &fifo_addr, &fifo_size); -+ -+ if (num < 3) -+ return -EINVAL; -+ -+ padapter->fifo_sel = fifo_sel; -+ padapter->fifo_addr = fifo_addr; -+ padapter->fifo_size = fifo_size; -+ } -+ return count; -+} -+#endif -+ -+#ifdef CONFIG_WOW_PATTERN_HW_CAM -+int proc_dump_pattern_cam(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ int i; -+ struct rtl_wow_pattern context; -+ -+ for (i = 0 ; i < pwrpriv->wowlan_pattern_idx; i++) { -+ rtw_wow_pattern_read_cam_ent(padapter, i, &context); -+ rtw_dump_wow_pattern(m, &context, i); -+ } -+ -+ return 0; -+} -+#endif -+ -+static int proc_get_napi_info(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregistrypriv = &adapter->registrypriv; -+ u8 napi = 0, gro = 0; -+ u32 weight = 0; -+ struct dvobj_priv *d; -+ d = adapter_to_dvobj(adapter); -+ -+ -+#ifdef CONFIG_RTW_NAPI -+ if (pregistrypriv->en_napi) { -+ napi = 1; -+ weight = RTL_NAPI_WEIGHT; -+ } -+ -+#ifdef CONFIG_RTW_GRO -+ if (pregistrypriv->en_gro) -+ gro = 1; -+#endif /* CONFIG_RTW_GRO */ -+#endif /* CONFIG_RTW_NAPI */ -+ -+ if (napi) { -+ RTW_PRINT_SEL(m, "NAPI enable, weight=%d\n", weight); -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+ RTW_PRINT_SEL(m, "Dynamaic NAPI mechanism is on, current NAPI %s\n", -+ d->en_napi_dynamic ? "enable" : "disable"); -+ RTW_PRINT_SEL(m, "Dynamaic NAPI info:\n" -+ "\ttcp_rx_threshold = %d Mbps\n" -+ "\tcur_rx_tp = %d Mbps\n", -+ pregistrypriv->napi_threshold, -+ d->traffic_stat.cur_rx_tp); -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+ } else { -+ RTW_PRINT_SEL(m, "NAPI disable\n"); -+ } -+ RTW_PRINT_SEL(m, "GRO %s\n", gro?"enable":"disable"); -+ -+ return 0; -+ -+} -+ -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+static ssize_t proc_set_napi_th(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ struct _ADAPTER *adapter = (struct _ADAPTER *)rtw_netdev_priv(dev); -+ struct registry_priv *registry = &adapter->registrypriv; -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ PADAPTER iface = NULL; -+ char tmp[32] = {0}; -+ int thrshld = 0; -+ int num = 0, i = 0; -+ -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ RTW_INFO("%s: Last threshold = %d Mbps\n", __FUNCTION__, registry->napi_threshold); -+ -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface) { -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ registry = &iface->registrypriv; -+ num = sscanf(tmp, "%d", &thrshld); -+ if (num > 0) { -+ if (thrshld > 0) -+ registry->napi_threshold = thrshld; -+ } -+ } -+ } -+ } -+ RTW_INFO("%s: New threshold = %d Mbps\n", __FUNCTION__, registry->napi_threshold); -+ RTW_INFO("%s: Current RX throughput = %d Mbps\n", -+ __FUNCTION__, adapter_to_dvobj(adapter)->traffic_stat.cur_rx_tp); -+ -+ return count; -+} -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+ -+ -+ssize_t proc_set_dynamic_agg_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ int enable = 0, i = 0; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); -+ PADAPTER iface = NULL; -+ int num = sscanf(tmp, "%d", &enable); -+ -+ if (num != 1) { -+ RTW_INFO("invalid parameter!\n"); -+ return count; -+ } -+ -+ RTW_INFO("dynamic_agg_enable:%d\n", enable); -+ -+ for (i = 0; i < dvobj->iface_nums; i++) { -+ iface = dvobj->padapters[i]; -+ if (iface) -+ iface->registrypriv.dynamic_agg_enable = enable; -+ } -+ -+ } -+ -+ return count; -+ -+} -+ -+static int proc_get_dynamic_agg_enable(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *pregistrypriv = &adapter->registrypriv; -+ -+ RTW_PRINT_SEL(m, "dynamic_agg_enable:%d\n", pregistrypriv->dynamic_agg_enable); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_RTW_WDS -+static int proc_get_wds_en(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ -+ if (MLME_STATE(adapter) & (WIFI_AP_STATE | WIFI_STATION_STATE)) -+ RTW_PRINT_SEL(m, "%d\n", adapter_use_wds(adapter)); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_wds_en(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (!(MLME_STATE(adapter) & (WIFI_AP_STATE | WIFI_STATION_STATE))) -+ return -EFAULT; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ u8 enable; -+ int num = sscanf(tmp, "%hhu", &enable); -+ -+ if (num >= 1) -+ adapter_set_use_wds(adapter, enable); -+ } -+ -+ return count; -+} -+ -+static ssize_t proc_set_sta_wds_en(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ u8 enable; -+ u8 addr[ETH_ALEN]; -+ struct sta_info *sta; -+ int num = sscanf(tmp, "%hhu "MAC_SFMT, &enable, MAC_SARG(addr)); -+ -+ if (num != 7) -+ return -EINVAL; -+ -+ if (IS_MCAST(addr) || _rtw_memcmp(adapter_mac_addr(adapter), addr, ETH_ALEN)) -+ return -EINVAL; -+ -+ sta = rtw_get_stainfo(&adapter->stapriv, addr); -+ if (!sta) -+ return -EINVAL; -+ -+ if (enable) -+ sta->flags |= WLAN_STA_WDS; -+ else -+ sta->flags &= ~WLAN_STA_WDS; -+ } -+ -+ return count; -+} -+ -+static int proc_get_wds_gptr(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ -+ if (MLME_IS_STA(adapter) && MLME_IS_ASOC(adapter)) -+ dump_wgptr(m, adapter); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_AP_MODE -+static int proc_get_wds_path(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ -+ if (MLME_IS_AP(adapter) && MLME_IS_ASOC(adapter)) -+ dump_wpath(m, adapter); -+ -+ return 0; -+} -+#endif /* CONFIG_AP_MODE */ -+#endif /* CONFIG_RTW_WDS */ -+ -+#ifdef CONFIG_RTW_MULTI_AP -+static int proc_get_multi_ap_opmode(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ -+ if (MLME_STATE(adapter) & (WIFI_AP_STATE | WIFI_STATION_STATE)) -+ RTW_PRINT_SEL(m, "0x%02x\n", adapter->multi_ap); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_multi_ap_opmode(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (!(MLME_STATE(adapter) & (WIFI_AP_STATE | WIFI_STATION_STATE))) -+ return -EFAULT; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ u8 mode; -+ int num = sscanf(tmp, "%hhx", &mode); -+ -+ if (num >= 1) { -+ if (MLME_IS_AP(adapter)) -+ adapter->multi_ap = mode & (MULTI_AP_FRONTHAUL_BSS | MULTI_AP_BACKHAUL_BSS); -+ else -+ adapter->multi_ap = mode & MULTI_AP_BACKHAUL_STA; -+ if (adapter->multi_ap & (MULTI_AP_BACKHAUL_BSS | MULTI_AP_BACKHAUL_STA)) -+ adapter_set_use_wds(adapter, 1); -+ } -+ } -+ -+ return count; -+} -+ -+static int proc_get_unassoc_sta(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = GET_PRIMARY_ADAPTER(rtw_netdev_priv(dev)); -+ -+ dump_unassoc_sta(m, adapter); -+ -+ return 0; -+} -+ -+ssize_t proc_set_unassoc_sta(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = GET_PRIMARY_ADAPTER(rtw_netdev_priv(dev)); -+ char tmp[17 * 10 + 32] = {0}; -+ char cmd[32]; -+ u8 mode; -+ u8 stype = 0; -+ u8 addr[ETH_ALEN]; -+ -+#define UNASOC_STA_CMD_MODE 0 -+#define UNASOC_STA_CMD_ADD 1 -+#define UNASOC_STA_CMD_DEL 2 -+#define UNASOC_STA_CMD_CLR 3 -+#define UNASOC_STA_CMD_UNINT 4 -+#define UNASOC_STA_CMD_NUM 5 -+ -+ static const char * const unasoc_sta_cmd_str[] = { -+ "mode", -+ "add", -+ "del", -+ "clr", -+ "uninterest", -+ }; -+ u8 cmd_id = UNASOC_STA_CMD_NUM; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ RTW_WARN(FUNC_ADPT_FMT" input string too long\n", FUNC_ADPT_ARG(adapter)); -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ /* -+ * mode , -+ * add [] -+ * del [] -+ * clr -+ */ -+ char *c, *next; -+ int i; -+ u8 is_bcast; -+ -+ next = tmp; -+ c = strsep(&next, " \t"); -+ if (!c || sscanf(c, "%s", cmd) != 1) -+ goto exit; -+ -+ for (i = 0; i < UNASOC_STA_CMD_NUM; i++) -+ if (strcmp(unasoc_sta_cmd_str[i], cmd) == 0) -+ cmd_id = i; -+ -+ switch (cmd_id) { -+ case UNASOC_STA_CMD_MODE: -+ c = strsep(&next, " \t"); -+ if (!c || sscanf(c, "%hhu,%hhu", &stype, &mode) != 2) { -+ RTW_WARN(FUNC_ADPT_FMT" invalid arguments of mode cmd\n", FUNC_ADPT_ARG(adapter)); -+ goto exit; -+ } -+ if (stype >= UNASOC_STA_SRC_NUM) { -+ RTW_WARN(FUNC_ADPT_FMT" invalid stype:%u\n", FUNC_ADPT_ARG(adapter), stype); -+ goto exit; -+ } -+ if (mode >= UNASOC_STA_MODE_NUM) { -+ RTW_WARN(FUNC_ADPT_FMT" invalid mode:%u\n", FUNC_ADPT_ARG(adapter), mode); -+ goto exit; -+ } -+ rtw_unassoc_sta_set_mode(adapter, stype, mode); -+ break; -+ -+ case UNASOC_STA_CMD_ADD: -+ case UNASOC_STA_CMD_DEL: -+ case UNASOC_STA_CMD_UNINT: -+ /* check for macaddr list */ -+ c = strsep(&next, " \t"); -+ while (c != NULL) { -+ if (sscanf(c, MAC_SFMT, MAC_SARG(addr)) != 6) -+ break; -+ -+ is_bcast = is_broadcast_mac_addr(addr); -+ if (is_bcast -+ || rtw_check_invalid_mac_address(addr, 0) == _FALSE -+ ) { -+ if (cmd_id == UNASOC_STA_CMD_DEL) { -+ if (is_bcast) { -+ rtw_del_unassoc_sta_queue(adapter); -+ break; -+ } else -+ rtw_del_unassoc_sta(adapter, addr); -+ } else if (cmd_id == UNASOC_STA_CMD_UNINT) { -+ if (is_bcast) { -+ rtw_undo_all_interested_unassoc_sta(adapter); -+ break; -+ } else -+ rtw_undo_interested_unassoc_sta(adapter, addr); -+ } else if (!is_bcast) -+ rtw_add_interested_unassoc_sta(adapter, addr); -+ } -+ -+ c = strsep(&next, " \t"); -+ } -+ break; -+ -+ case UNASOC_STA_CMD_CLR: -+ /* clear sta list */ -+ rtw_del_unassoc_sta_queue(adapter); -+ goto exit; -+ -+ default: -+ RTW_WARN(FUNC_ADPT_FMT" invalid cmd:\"%s\"\n", FUNC_ADPT_ARG(adapter), cmd); -+ goto exit; -+ } -+ } -+ -+exit: -+ return count; -+} -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+static u8 assoc_req_mac_addr[6]; -+int proc_get_sta_assoc_req_frame_body(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_AP(adapter)) { -+ struct sta_info *psta; -+ _irqL irqL; -+ u8 *passoc_req = NULL; -+ u32 assoc_req_len = 0; -+ -+ psta = rtw_get_stainfo(&adapter->stapriv, assoc_req_mac_addr); -+ if (psta == NULL) { -+ RTW_PRINT(FUNC_ADPT_FMT" sta("MAC_FMT") not found\n", -+ FUNC_ADPT_ARG(adapter), MAC_ARG(assoc_req_mac_addr)); -+ return 0; -+ } -+ RTW_PRINT(FUNC_ADPT_FMT" sta("MAC_FMT") found\n", -+ FUNC_ADPT_ARG(adapter), MAC_ARG(assoc_req_mac_addr)); -+ _enter_critical_bh(&psta->lock, &irqL); -+ if (psta->passoc_req && psta->assoc_req_len > 0) { -+ passoc_req = rtw_zmalloc(psta->assoc_req_len); -+ if (passoc_req) { -+ assoc_req_len = psta->assoc_req_len; -+ _rtw_memcpy(passoc_req, psta->passoc_req, assoc_req_len); -+ } -+ } -+ _exit_critical_bh(&psta->lock, &irqL); -+ if (passoc_req && assoc_req_len > IEEE80211_3ADDR_LEN) { -+ u8 *body = passoc_req + IEEE80211_3ADDR_LEN; -+ u32 body_len = assoc_req_len - IEEE80211_3ADDR_LEN; -+ u16 i; -+ -+ for (i = 0; i < body_len; i++) -+ _RTW_PRINT_SEL(m, "%02X", body[i]); -+ _RTW_PRINT_SEL(m, "\n"); -+ } -+ if (passoc_req && assoc_req_len > 0) -+ rtw_mfree(passoc_req, assoc_req_len); -+ } -+ -+ return 0; -+} -+ -+ssize_t proc_set_sta_assoc_req_frame_body(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[18] = {0}; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ if (sscanf(tmp, MAC_SFMT, MAC_SARG(assoc_req_mac_addr)) != 6) { -+ _rtw_memset(assoc_req_mac_addr, 0, 6); -+ RTW_PRINT(FUNC_ADPT_FMT" Invalid format\n", -+ FUNC_ADPT_ARG(adapter)); -+ } -+ -+ } -+ -+ return count; -+} -+#endif /* CONFIG_IOCTL_CFG80211 */ -+ -+static int proc_get_ch_util_threshold(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = GET_PRIMARY_ADAPTER(rtw_netdev_priv(dev)); -+ -+ RTW_PRINT_SEL(m, "%hhu\n", adapter->ch_util_threshold); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_ch_util_threshold(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = GET_PRIMARY_ADAPTER(rtw_netdev_priv(dev)); -+ char tmp[4]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ u8 threshold; -+ int num = sscanf(tmp, "%hhu", &threshold); -+ -+ if (num == 1) -+ adapter->ch_util_threshold = threshold; -+ } -+ -+ return count; -+} -+ -+static int proc_get_ch_utilization(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ RTW_PRINT_SEL(m, "%hhu\n", rtw_get_ch_utilization(adapter)); -+ -+ return 0; -+} -+#endif /* CONFIG_RTW_MULTI_AP */ -+ -+#ifdef CONFIG_RTW_MESH -+static int proc_get_mesh_peer_sel_policy(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_mesh_peer_sel_policy(m, adapter); -+ -+ return 0; -+} -+ -+#if CONFIG_RTW_MESH_ACNODE_PREVENT -+static int proc_get_mesh_acnode_prevent(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter)) -+ dump_mesh_acnode_prevent_settings(m, adapter); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_mesh_acnode_prevent(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -+ u8 enable; -+ u32 conf_timeout_ms; -+ u32 notify_timeout_ms; -+ int num = sscanf(tmp, "%hhu %u %u", &enable, &conf_timeout_ms, ¬ify_timeout_ms); -+ -+ if (num >= 1) -+ peer_sel_policy->acnode_prevent = enable; -+ if (num >= 2) -+ peer_sel_policy->acnode_conf_timeout_ms = conf_timeout_ms; -+ if (num >= 3) -+ peer_sel_policy->acnode_notify_timeout_ms = notify_timeout_ms; -+ } -+ -+ return count; -+} -+#endif /* CONFIG_RTW_MESH_ACNODE_PREVENT */ -+ -+#if CONFIG_RTW_MESH_OFFCH_CAND -+static int proc_get_mesh_offch_cand(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter)) -+ dump_mesh_offch_cand_settings(m, adapter); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_mesh_offch_cand(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -+ u8 enable; -+ u32 find_int_ms; -+ int num = sscanf(tmp, "%hhu %u", &enable, &find_int_ms); -+ -+ if (num >= 1) -+ peer_sel_policy->offch_cand = enable; -+ if (num >= 2) -+ peer_sel_policy->offch_find_int_ms = find_int_ms; -+ } -+ -+ return count; -+} -+#endif /* CONFIG_RTW_MESH_OFFCH_CAND */ -+ -+#if CONFIG_RTW_MESH_PEER_BLACKLIST -+static int proc_get_mesh_peer_blacklist(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter)) { -+ dump_mesh_peer_blacklist_settings(m, adapter); -+ if (MLME_IS_ASOC(adapter)) -+ dump_mesh_peer_blacklist(m, adapter); -+ } -+ -+ return 0; -+} -+ -+static ssize_t proc_set_mesh_peer_blacklist(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -+ u32 conf_timeout_ms; -+ u32 blacklist_timeout_ms; -+ int num = sscanf(tmp, "%u %u", &conf_timeout_ms, &blacklist_timeout_ms); -+ -+ if (num >= 1) -+ peer_sel_policy->peer_conf_timeout_ms = conf_timeout_ms; -+ if (num >= 2) -+ peer_sel_policy->peer_blacklist_timeout_ms = blacklist_timeout_ms; -+ } -+ -+ return count; -+} -+#endif /* CONFIG_RTW_MESH_PEER_BLACKLIST */ -+ -+#if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+static int proc_get_mesh_cto_mgate_require(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter)) -+ RTW_PRINT_SEL(m, "%u\n", adapter->mesh_cfg.peer_sel_policy.cto_mgate_require); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_mesh_cto_mgate_require(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -+ u8 require; -+ int num = sscanf(tmp, "%hhu", &require); -+ -+ if (num >= 1) { -+ peer_sel_policy->cto_mgate_require = require; -+ #if CONFIG_RTW_MESH_CTO_MGATE_CARRIER -+ if (rtw_mesh_cto_mgate_required(adapter)) -+ rtw_netif_carrier_off(adapter->pnetdev); -+ else -+ rtw_netif_carrier_on(adapter->pnetdev); -+ #endif -+ } -+ } -+ -+ return count; -+} -+ -+static int proc_get_mesh_cto_mgate_blacklist(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter)) { -+ dump_mesh_cto_mgate_blacklist_settings(m, adapter); -+ if (MLME_IS_ASOC(adapter)) -+ dump_mesh_cto_mgate_blacklist(m, adapter); -+ } -+ -+ return 0; -+} -+ -+static ssize_t proc_set_mesh_cto_mgate_blacklist(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct mesh_peer_sel_policy *peer_sel_policy = &adapter->mesh_cfg.peer_sel_policy; -+ u32 conf_timeout_ms; -+ u32 blacklist_timeout_ms; -+ int num = sscanf(tmp, "%u %u", &conf_timeout_ms, &blacklist_timeout_ms); -+ -+ if (num >= 1) -+ peer_sel_policy->cto_mgate_conf_timeout_ms = conf_timeout_ms; -+ if (num >= 2) -+ peer_sel_policy->cto_mgate_blacklist_timeout_ms = blacklist_timeout_ms; -+ } -+ -+ return count; -+} -+#endif /* CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST */ -+ -+static int proc_get_mesh_networks(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ dump_mesh_networks(m, adapter); -+ -+ return 0; -+} -+ -+static int proc_get_mesh_plink_ctl(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter)) -+ dump_mesh_plink_ctl(m, adapter); -+ -+ return 0; -+} -+ -+static int proc_get_mesh_mpath(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)) -+ dump_mpath(m, adapter); -+ -+ return 0; -+} -+ -+static int proc_get_mesh_mpp(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter) && MLME_IS_ASOC(adapter)) -+ dump_mpp(m, adapter); -+ -+ return 0; -+} -+ -+static int proc_get_mesh_known_gates(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter)) -+ dump_known_gates(m, adapter); -+ -+ return 0; -+} -+ -+#if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+static int proc_get_mesh_b2u_flags(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter)) -+ dump_mesh_b2u_flags(m, adapter); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_mesh_b2u_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ u8 msrc, mfwd; -+ int num = sscanf(tmp, "%hhx %hhx", &msrc, &mfwd); -+ -+ if (num >= 1) -+ mcfg->b2u_flags_msrc = msrc; -+ if (num >= 2) -+ mcfg->b2u_flags_mfwd = mfwd; -+ } -+ -+ return count; -+} -+#endif /* CONFIG_RTW_MESH_DATA_BMC_TO_UC */ -+ -+static int proc_get_mesh_stats(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter)) -+ dump_mesh_stats(m, adapter); -+ -+ return 0; -+} -+ -+static int proc_get_mesh_gate_timeout(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ if (MLME_IS_MESH(adapter)) -+ RTW_PRINT_SEL(m, "%u factor\n", -+ adapter->mesh_cfg.path_gate_timeout_factor); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_mesh_gate_timeout(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ u32 timeout; -+ int num = sscanf(tmp, "%u", &timeout); -+ -+ if (num < 1) -+ goto exit; -+ -+ mcfg->path_gate_timeout_factor = timeout; -+ } -+ -+exit: -+ return count; -+} -+ -+static int proc_get_mesh_gate_state(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct rtw_mesh_cfg *mcfg = &adapter->mesh_cfg; -+ u8 cto_mgate = 0; -+ -+ if (MLME_IS_MESH(adapter)) { -+ if (rtw_mesh_is_primary_gate(adapter)) -+ RTW_PRINT_SEL(m, "PG\n"); -+ else if (mcfg->dot11MeshGateAnnouncementProtocol) -+ RTW_PRINT_SEL(m, "G\n"); -+ else if (rtw_mesh_gate_num(adapter)) -+ RTW_PRINT_SEL(m, "C\n"); -+ else -+ RTW_PRINT_SEL(m, "N\n"); -+ } -+ -+ return 0; -+} -+ -+static int proc_get_peer_alive_based_preq(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ struct _ADAPTER *adapter= (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *rp = &adapter->registrypriv; -+ -+ RTW_PRINT_SEL(m, "peer_alive_based_preq = %u\n", -+ rp->peer_alive_based_preq); -+ -+ return 0; -+} -+ -+static ssize_t -+proc_set_peer_alive_based_preq(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct registry_priv *rp = &adapter->registrypriv; -+ char tmp[8]; -+ int num = 0; -+ u8 enable = 0; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%hhu", &enable); -+ if (num != 1) { -+ RTW_ERR("%s: invalid parameter!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ if (enable > 1) { -+ RTW_ERR("%s: invalid value!\n", __FUNCTION__); -+ goto exit; -+ } -+ rp->peer_alive_based_preq = enable; -+ -+exit: -+ return count; -+} -+#endif /* CONFIG_RTW_MESH */ -+ -+#ifdef RTW_BUSY_DENY_SCAN -+static int proc_get_scan_interval_thr(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ struct _ADAPTER *adapter= (struct _ADAPTER *)rtw_netdev_priv(dev); -+ struct registry_priv *rp = &adapter->registrypriv; -+ -+ -+ RTW_PRINT_SEL(m, "scan interval threshold = %u ms\n", -+ rp->scan_interval_thr); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_scan_interval_thr(struct file *file, -+ const char __user *buffer, -+ size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ struct _ADAPTER *adapter= (struct _ADAPTER *)rtw_netdev_priv(dev); -+ struct registry_priv *rp = &adapter->registrypriv; -+ char tmp[12]; -+ int num = 0; -+ u32 thr = 0; -+ -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%u", &thr); -+ if (num != 1) { -+ RTW_ERR("%s: invalid parameter!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ rp->scan_interval_thr = thr; -+ -+ RTW_PRINT("%s: scan interval threshold = %u ms\n", -+ __FUNCTION__, rp->scan_interval_thr); -+ -+exit: -+ return count; -+} -+ -+#endif /* RTW_BUSY_DENY_SCAN */ -+ -+static int proc_get_scan_deny(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ struct _ADAPTER *adapter= (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ RTW_PRINT_SEL(m, "scan_deny is %s\n", (dvobj->scan_deny == _TRUE) ? "enable":"disable"); -+ -+ return 0; -+} -+ -+static ssize_t proc_set_scan_deny(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ char tmp[8]; -+ int num = 0; -+ int enable = 0; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%d", &enable); -+ if (num != 1) { -+ RTW_ERR("%s: invalid parameter!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ dvobj->scan_deny = enable ? _TRUE : _FALSE; -+ -+ RTW_PRINT("%s: scan_deny is %s\n", -+ __FUNCTION__, (dvobj->scan_deny == _TRUE) ? "enable":"disable"); -+ -+exit: -+ return count; -+} -+ -+#ifdef CONFIG_RTW_TPT_MODE -+static int proc_get_tpt_mode(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ struct _ADAPTER *adapter= (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ RTW_PRINT_SEL(m, "current tpt_mode = %d\n", dvobj->tpt_mode); -+ -+ return 0; -+} -+ -+static void tpt_mode_default(struct _ADAPTER *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ /* 1. disable scan deny */ -+ dvobj->scan_deny = _FALSE; -+ -+ /* 2. back to original LPS mode */ -+#ifdef CONFIG_LPS -+ rtw_pm_set_lps(adapter, adapter->registrypriv.power_mgnt); -+#endif -+ -+ /* 3. back to original 2.4 tx bw mode */ -+ rtw_set_tx_bw_mode(adapter, adapter->registrypriv.tx_bw_mode); -+} -+ -+static void rtw_tpt_mode(struct _ADAPTER *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ -+ if (dvobj->tpt_mode > 0) { -+ -+ /* when enable each tpt mode -+ 1. scan deny -+ 2. disable LPS */ -+ -+ dvobj->scan_deny = _TRUE; -+ -+#ifdef CONFIG_LPS -+ rtw_pm_set_lps(adapter, PS_MODE_ACTIVE); -+#endif -+ -+ } -+ -+ switch (dvobj->tpt_mode) { -+ case 0: /* default mode */ -+ tpt_mode_default(adapter); -+ break; -+ case 1: /* High TP*/ -+ /*tpt_mode1(adapter);*/ -+ dvobj->edca_be_ul = 0x5e431c; -+ dvobj->edca_be_dl = 0x00431c; -+ break; -+ case 2: /* noise */ -+ /* tpt_mode2(adapter); */ -+ dvobj->edca_be_ul = 0x00431c; -+ dvobj->edca_be_dl = 0x00431c; -+ -+ rtw_set_tx_bw_mode(adapter, 0x20); /* for 2.4g, fixed tx_bw_mode to 20Mhz */ -+ break; -+ case 3: /* long distance */ -+ /* tpt_mode3(adapter); */ -+ dvobj->edca_be_ul = 0x00431c; -+ dvobj->edca_be_dl = 0x00431c; -+ -+ rtw_set_tx_bw_mode(adapter, 0x20); /* for 2.4g, fixed tx_bw_mode to 20Mhz */ -+ break; -+ case 4: /* noise + long distance */ -+ /* tpt_mode4(adapter); */ -+ dvobj->edca_be_ul = 0x00431c; -+ dvobj->edca_be_dl = 0x00431c; -+ -+ rtw_set_tx_bw_mode(adapter, 0x20); /* for 2.4g, fixed tx_bw_mode to 20Mhz */ -+ break; -+ default: /* default mode */ -+ tpt_mode_default(adapter); -+ break; -+ } -+ -+} -+ -+static ssize_t proc_set_tpt_mode(struct file *file, const char __user *buffer, -+ size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ struct _ADAPTER *adapter = (_adapter *)rtw_netdev_priv(dev); -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ char tmp[32]; -+ int num = 0; -+ int mode = 0; -+ -+#define MAX_TPT_MODE_NUM 4 -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (!buffer || copy_from_user(tmp, buffer, count)) -+ goto exit; -+ -+ num = sscanf(tmp, "%d", &mode); -+ if (num != 1) { -+ RTW_ERR("%s: invalid parameter!\n", __FUNCTION__); -+ goto exit; -+ } -+ -+ if (mode > MAX_TPT_MODE_NUM ) -+ mode = 0; -+ -+ RTW_PRINT("%s: previous mode = %d\n", -+ __FUNCTION__, dvobj->tpt_mode); -+ -+ RTW_PRINT("%s: enabled mode = %d\n", -+ __FUNCTION__, mode); -+ -+ dvobj->tpt_mode = mode; -+ -+ rtw_tpt_mode(adapter); -+ -+exit: -+ return count; -+ -+} -+#endif /* CONFIG_RTW_TPT_MODE */ -+ -+int proc_get_cur_beacon_keys(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ struct mlme_priv *mlme = &adapter->mlmepriv; -+ -+ rtw_dump_bcn_keys(m, &mlme->cur_beacon_keys); -+ -+ return 0; -+} -+ -+/* -+* rtw_adapter_proc: -+* init/deinit when register/unregister net_device -+*/ -+const struct rtw_proc_hdl adapter_proc_hdls[] = { -+#if RTW_SEQ_FILE_TEST -+ RTW_PROC_HDL_SEQ("seq_file_test", &seq_file_test, NULL), -+#endif -+ RTW_PROC_HDL_SSEQ("write_reg", NULL, proc_set_write_reg), -+ RTW_PROC_HDL_SSEQ("read_reg", proc_get_read_reg, proc_set_read_reg), -+ RTW_PROC_HDL_SSEQ("tx_rate_bmp", proc_get_dump_tx_rate_bmp, NULL), -+ RTW_PROC_HDL_SSEQ("adapters_status", proc_get_dump_adapters_status, NULL), -+#ifdef CONFIG_RTW_CUSTOMER_STR -+ RTW_PROC_HDL_SSEQ("customer_str", proc_get_customer_str, NULL), -+#endif -+ RTW_PROC_HDL_SSEQ("fwstate", proc_get_fwstate, NULL), -+ RTW_PROC_HDL_SSEQ("sec_info", proc_get_sec_info, NULL), -+ RTW_PROC_HDL_SSEQ("mlmext_state", proc_get_mlmext_state, NULL), -+ RTW_PROC_HDL_SSEQ("qos_option", proc_get_qos_option, NULL), -+ RTW_PROC_HDL_SSEQ("ht_option", proc_get_ht_option, NULL), -+ RTW_PROC_HDL_SSEQ("rf_info", proc_get_rf_info, NULL), -+ RTW_PROC_HDL_SSEQ("scan_param", proc_get_scan_param, proc_set_scan_param), -+ RTW_PROC_HDL_SSEQ("scan_abort", proc_get_scan_abort, NULL), -+#ifdef CONFIG_SCAN_BACKOP -+ RTW_PROC_HDL_SSEQ("backop_flags_sta", proc_get_backop_flags_sta, proc_set_backop_flags_sta), -+ #ifdef CONFIG_AP_MODE -+ RTW_PROC_HDL_SSEQ("backop_flags_ap", proc_get_backop_flags_ap, proc_set_backop_flags_ap), -+ #endif -+ #ifdef CONFIG_RTW_MESH -+ RTW_PROC_HDL_SSEQ("backop_flags_mesh", proc_get_backop_flags_mesh, proc_set_backop_flags_mesh), -+ #endif -+#endif -+#ifdef CONFIG_RTW_REPEATER_SON -+ RTW_PROC_HDL_SSEQ("rson_data", proc_get_rson_data, proc_set_rson_data), -+#endif -+ RTW_PROC_HDL_SSEQ("survey_info", proc_get_survey_info, proc_set_survey_info), -+ RTW_PROC_HDL_SSEQ("ap_info", proc_get_ap_info, NULL), -+#ifdef ROKU_PRIVATE -+ RTW_PROC_HDL_SSEQ("infra_ap", proc_get_infra_ap, NULL), -+#endif /* ROKU_PRIVATE */ -+ RTW_PROC_HDL_SSEQ("trx_info", proc_get_trx_info, proc_reset_trx_info), -+ RTW_PROC_HDL_SSEQ("tx_power_offset", proc_get_tx_power_offset, proc_set_tx_power_offset), -+ RTW_PROC_HDL_SSEQ("rate_ctl", proc_get_rate_ctl, proc_set_rate_ctl), -+ RTW_PROC_HDL_SSEQ("bw_ctl", proc_get_bw_ctl, proc_set_bw_ctl), -+ RTW_PROC_HDL_SSEQ("mac_qinfo", proc_get_mac_qinfo, NULL), -+ RTW_PROC_HDL_SSEQ("macid_info", proc_get_macid_info, NULL), -+ RTW_PROC_HDL_SSEQ("bcmc_info", proc_get_mi_ap_bc_info, NULL), -+ RTW_PROC_HDL_SSEQ("sec_cam", proc_get_sec_cam, proc_set_sec_cam), -+ RTW_PROC_HDL_SSEQ("sec_cam_cache", proc_get_sec_cam_cache, NULL), -+ RTW_PROC_HDL_SSEQ("ps_dbg_info", proc_get_ps_dbg_info, proc_set_ps_dbg_info), -+ RTW_PROC_HDL_SSEQ("wifi_spec", proc_get_wifi_spec, NULL), -+#ifdef CONFIG_LAYER2_ROAMING -+ RTW_PROC_HDL_SSEQ("roam_flags", proc_get_roam_flags, proc_set_roam_flags), -+ RTW_PROC_HDL_SSEQ("roam_param", proc_get_roam_param, proc_set_roam_param), -+ RTW_PROC_HDL_SSEQ("roam_tgt_addr", NULL, proc_set_roam_tgt_addr), -+#endif /* CONFIG_LAYER2_ROAMING */ -+#ifdef CONFIG_RTW_MBO -+ RTW_PROC_HDL_SSEQ("non_pref_ch", rtw_mbo_proc_non_pref_chans_get, rtw_mbo_proc_non_pref_chans_set), -+ RTW_PROC_HDL_SSEQ("cell_data", rtw_mbo_proc_cell_data_get, rtw_mbo_proc_cell_data_set), -+#endif -+#ifdef CONFIG_RTW_80211R -+ RTW_PROC_HDL_SSEQ("ft_flags", rtw_ft_proc_flags_get, rtw_ft_proc_flags_set), -+#endif -+ RTW_PROC_HDL_SSEQ("defs_param", proc_get_defs_param, proc_set_defs_param), -+#ifdef CONFIG_SDIO_HCI -+ RTW_PROC_HDL_SSEQ("sd_f0_reg_dump", proc_get_sd_f0_reg_dump, NULL), -+ RTW_PROC_HDL_SSEQ("sdio_local_reg_dump", proc_get_sdio_local_reg_dump, NULL), -+ RTW_PROC_HDL_SSEQ("sdio_card_info", proc_get_sdio_card_info, NULL), -+ #ifdef CONFIG_SDIO_RECVBUF_AGGREGATION -+ RTW_PROC_HDL_SSEQ("sdio_recvbuf_aggregation", proc_get_sdio_recvbuf_aggregation, proc_set_sdio_recvbuf_aggregation), -+ #endif -+ #ifdef CONFIG_SDIO_RECVBUF_PWAIT -+ RTW_PROC_HDL_SSEQ("sdio_recvbuf_pwait", proc_get_sdio_recvbuf_pwait, proc_set_sdio_recvbuf_pwait), -+ #endif -+#ifdef DBG_SDIO -+ RTW_PROC_HDL_SSEQ("sdio_dbg", proc_get_sdio_dbg, proc_set_sdio_dbg), -+#endif /* DBG_SDIO */ -+#endif /* CONFIG_SDIO_HCI */ -+ -+ RTW_PROC_HDL_SSEQ("fwdl_test_case", NULL, proc_set_fwdl_test_case), -+ RTW_PROC_HDL_SSEQ("del_rx_ampdu_test_case", NULL, proc_set_del_rx_ampdu_test_case), -+ RTW_PROC_HDL_SSEQ("wait_hiq_empty", NULL, proc_set_wait_hiq_empty), -+ RTW_PROC_HDL_SSEQ("sta_linking_test", NULL, proc_set_sta_linking_test), -+#ifdef CONFIG_AP_MODE -+ RTW_PROC_HDL_SSEQ("ap_linking_test", NULL, proc_set_ap_linking_test), -+#endif -+ -+ RTW_PROC_HDL_SSEQ("mac_reg_dump", proc_get_mac_reg_dump, NULL), -+ RTW_PROC_HDL_SSEQ("bb_reg_dump", proc_get_bb_reg_dump, NULL), -+ RTW_PROC_HDL_SSEQ("bb_reg_dump_ex", proc_get_bb_reg_dump_ex, NULL), -+ RTW_PROC_HDL_SSEQ("rf_reg_dump", proc_get_rf_reg_dump, NULL), -+ -+#ifdef CONFIG_RTW_LED -+ RTW_PROC_HDL_SSEQ("led_config", proc_get_led_config, proc_set_led_config), -+#endif -+ -+#ifdef CONFIG_AP_MODE -+ RTW_PROC_HDL_SSEQ("aid_status", proc_get_aid_status, proc_set_aid_status), -+ RTW_PROC_HDL_SSEQ("ap_isolate", proc_get_ap_isolate, proc_set_ap_isolate), -+ RTW_PROC_HDL_SSEQ("all_sta_info", proc_get_all_sta_info, NULL), -+ RTW_PROC_HDL_SSEQ("bmc_tx_rate", proc_get_bmc_tx_rate, proc_set_bmc_tx_rate), -+ #if CONFIG_RTW_AP_DATA_BMC_TO_UC -+ RTW_PROC_HDL_SSEQ("ap_b2u_flags", proc_get_ap_b2u_flags, proc_set_ap_b2u_flags), -+ #endif -+#endif /* CONFIG_AP_MODE */ -+ -+#ifdef DBG_MEMORY_LEAK -+ RTW_PROC_HDL_SSEQ("_malloc_cnt", proc_get_malloc_cnt, NULL), -+#endif /* DBG_MEMORY_LEAK */ -+ -+#ifdef CONFIG_FIND_BEST_CHANNEL -+ RTW_PROC_HDL_SSEQ("best_channel", proc_get_best_channel, proc_set_best_channel), -+#endif -+ -+ RTW_PROC_HDL_SSEQ("rx_signal", proc_get_rx_signal, proc_set_rx_signal), -+ RTW_PROC_HDL_SSEQ("rx_chk_limit", proc_get_rx_chk_limit, proc_set_rx_chk_limit), -+ RTW_PROC_HDL_SSEQ("hw_info", proc_get_hw_status, proc_set_hw_status), -+ RTW_PROC_HDL_SSEQ("mac_rptbuf", proc_get_mac_rptbuf, NULL), -+#ifdef CONFIG_80211N_HT -+ RTW_PROC_HDL_SSEQ("ht_enable", proc_get_ht_enable, proc_set_ht_enable), -+ RTW_PROC_HDL_SSEQ("bw_mode", proc_get_bw_mode, proc_set_bw_mode), -+ RTW_PROC_HDL_SSEQ("ampdu_enable", proc_get_ampdu_enable, proc_set_ampdu_enable), -+ RTW_PROC_HDL_SSEQ("rx_ampdu", proc_get_rx_ampdu, proc_set_rx_ampdu), -+ RTW_PROC_HDL_SSEQ("rx_ampdu_size_limit", proc_get_rx_ampdu_size_limit, proc_set_rx_ampdu_size_limit), -+ RTW_PROC_HDL_SSEQ("rx_ampdu_factor", proc_get_rx_ampdu_factor, proc_set_rx_ampdu_factor), -+ RTW_PROC_HDL_SSEQ("rx_ampdu_density", proc_get_rx_ampdu_density, proc_set_rx_ampdu_density), -+ RTW_PROC_HDL_SSEQ("tx_ampdu_density", proc_get_tx_ampdu_density, proc_set_tx_ampdu_density), -+ RTW_PROC_HDL_SSEQ("tx_max_agg_num", proc_get_tx_max_agg_num, proc_set_tx_max_agg_num), -+ RTW_PROC_HDL_SSEQ("tx_quick_addba_req", proc_get_tx_quick_addba_req, proc_set_tx_quick_addba_req), -+#ifdef CONFIG_TX_AMSDU -+ RTW_PROC_HDL_SSEQ("tx_amsdu", proc_get_tx_amsdu, proc_set_tx_amsdu), -+ RTW_PROC_HDL_SSEQ("tx_amsdu_rate", proc_get_tx_amsdu_rate, proc_set_tx_amsdu_rate), -+#endif -+#endif /* CONFIG_80211N_HT */ -+ -+#ifdef CONFIG_80211AC_VHT -+ RTW_PROC_HDL_SSEQ("vht_24g_enable", proc_get_vht_24g_enable, proc_set_vht_24g_enable), -+#endif -+ -+ #ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT -+ RTW_PROC_HDL_SSEQ("tx_aval_int_threshold", proc_get_tx_aval_th, proc_set_tx_aval_th), -+ #endif -+ -+ RTW_PROC_HDL_SSEQ("dynamic_rrsr", proc_get_dyn_rrsr, proc_set_dyn_rrsr), -+ RTW_PROC_HDL_SSEQ("en_fwps", proc_get_en_fwps, proc_set_en_fwps), -+ -+ /* RTW_PROC_HDL_SSEQ("path_rssi", proc_get_two_path_rssi, NULL), -+ * RTW_PROC_HDL_SSEQ("rssi_disp",proc_get_rssi_disp, proc_set_rssi_disp), */ -+ -+#ifdef CONFIG_BT_COEXIST -+ RTW_PROC_HDL_SSEQ("btcoex_dbg", proc_get_btcoex_dbg, proc_set_btcoex_dbg), -+ RTW_PROC_HDL_SSEQ("btcoex", proc_get_btcoex_info, NULL), -+ RTW_PROC_HDL_SSEQ("btinfo_evt", NULL, proc_set_btinfo_evt), -+ RTW_PROC_HDL_SSEQ("btreg_read", proc_get_btreg_read, proc_set_btreg_read), -+ RTW_PROC_HDL_SSEQ("btreg_write", proc_get_btreg_write, proc_set_btreg_write), -+ RTW_PROC_HDL_SSEQ("btc_reduce_wl_txpwr", proc_get_btc_reduce_wl_txpwr, proc_set_btc_reduce_wl_txpwr), -+#ifdef CONFIG_RF4CE_COEXIST -+ RTW_PROC_HDL_SSEQ("rf4ce_state", proc_get_rf4ce_state, proc_set_rf4ce_state), -+#endif -+#endif /* CONFIG_BT_COEXIST */ -+ -+#if defined(DBG_CONFIG_ERROR_DETECT) -+ RTW_PROC_HDL_SSEQ("sreset", proc_get_sreset, proc_set_sreset), -+#endif /* DBG_CONFIG_ERROR_DETECT */ -+ RTW_PROC_HDL_SSEQ("trx_info_debug", proc_get_trx_info_debug, NULL), -+ -+#ifdef CONFIG_HUAWEI_PROC -+ RTW_PROC_HDL_SSEQ("huawei_trx_info", proc_get_huawei_trx_info, NULL), -+#endif -+ RTW_PROC_HDL_SSEQ("linked_info_dump", proc_get_linked_info_dump, proc_set_linked_info_dump), -+ RTW_PROC_HDL_SSEQ("sta_tp_dump", proc_get_sta_tp_dump, proc_set_sta_tp_dump), -+ RTW_PROC_HDL_SSEQ("sta_tp_info", proc_get_sta_tp_info, NULL), -+ RTW_PROC_HDL_SSEQ("dis_turboedca", proc_get_turboedca_ctrl, proc_set_turboedca_ctrl), -+ RTW_PROC_HDL_SSEQ("tx_info_msg", proc_get_tx_info_msg, NULL), -+ RTW_PROC_HDL_SSEQ("rx_info_msg", proc_get_rx_info_msg, proc_set_rx_info_msg), -+ -+#if defined(CONFIG_LPS_PG) && defined(CONFIG_RTL8822C) -+ RTW_PROC_HDL_SSEQ("lps_pg_debug", proc_get_lps_pg_debug, NULL), -+#endif -+ -+#ifdef CONFIG_GPIO_API -+ RTW_PROC_HDL_SSEQ("gpio_info", proc_get_gpio, proc_set_gpio), -+ RTW_PROC_HDL_SSEQ("gpio_set_output_value", NULL, proc_set_gpio_output_value), -+ RTW_PROC_HDL_SSEQ("gpio_set_direction", NULL, proc_set_config_gpio), -+#endif -+ -+#ifdef CONFIG_DBG_COUNTER -+ RTW_PROC_HDL_SSEQ("rx_logs", proc_get_rx_logs, NULL), -+ RTW_PROC_HDL_SSEQ("tx_logs", proc_get_tx_logs, NULL), -+ RTW_PROC_HDL_SSEQ("int_logs", proc_get_int_logs, NULL), -+#endif -+ -+#ifdef CONFIG_DBG_RF_CAL -+ RTW_PROC_HDL_SSEQ("iqk", proc_get_iqk_info, proc_set_iqk), -+ RTW_PROC_HDL_SSEQ("lck", proc_get_lck_info, proc_set_lck), -+#endif -+ -+#ifdef CONFIG_PCI_HCI -+ RTW_PROC_HDL_SSEQ("rx_ring", proc_get_rx_ring, NULL), -+ RTW_PROC_HDL_SSEQ("tx_ring", proc_get_tx_ring, NULL), -+#ifdef DBG_TXBD_DESC_DUMP -+ RTW_PROC_HDL_SSEQ("tx_ring_ext", proc_get_tx_ring_ext, proc_set_tx_ring_ext), -+#endif -+ RTW_PROC_HDL_SSEQ("pci_aspm", proc_get_pci_aspm, NULL), -+ -+ RTW_PROC_HDL_SSEQ("pci_conf_space", proc_get_pci_conf_space, proc_set_pci_conf_space), -+ -+ RTW_PROC_HDL_SSEQ("pci_bridge_conf_space", proc_get_pci_bridge_conf_space, proc_set_pci_bridge_conf_space), -+ -+#endif -+ -+#ifdef CONFIG_WOWLAN -+ RTW_PROC_HDL_SSEQ("wow_enable", proc_get_wow_enable, proc_set_wow_enable), -+ RTW_PROC_HDL_SSEQ("wow_pattern_info", proc_get_pattern_info, proc_set_pattern_info), -+ RTW_PROC_HDL_SSEQ("wow_wakeup_event", proc_get_wakeup_event, -+ proc_set_wakeup_event), -+ RTW_PROC_HDL_SSEQ("wowlan_last_wake_reason", proc_get_wakeup_reason, NULL), -+#ifdef CONFIG_WOW_PATTERN_HW_CAM -+ RTW_PROC_HDL_SSEQ("wow_pattern_cam", proc_dump_pattern_cam, NULL), -+#endif -+#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN -+ RTW_PROC_HDL_SSEQ("wow_keep_alive_info", proc_dump_wow_keep_alive_info, NULL), -+#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ -+ -+#endif -+ -+#ifdef CONFIG_GPIO_WAKEUP -+ RTW_PROC_HDL_SSEQ("wowlan_gpio_info", proc_get_wowlan_gpio_info, proc_set_wowlan_gpio_info), -+#endif -+#ifdef CONFIG_P2P_WOWLAN -+ RTW_PROC_HDL_SSEQ("p2p_wowlan_info", proc_get_p2p_wowlan_info, NULL), -+#endif -+ RTW_PROC_HDL_SSEQ("country_code", proc_get_country_code, proc_set_country_code), -+ RTW_PROC_HDL_SSEQ("chan_plan", proc_get_chan_plan, proc_set_chan_plan), -+ RTW_PROC_HDL_SSEQ("cap_spt_op_class_ch", proc_get_cap_spt_op_class_ch, proc_set_cap_spt_op_class_ch), -+ RTW_PROC_HDL_SSEQ("reg_spt_op_class_ch", proc_get_reg_spt_op_class_ch, proc_set_reg_spt_op_class_ch), -+ RTW_PROC_HDL_SSEQ("cur_spt_op_class_ch", proc_get_cur_spt_op_class_ch, proc_set_cur_spt_op_class_ch), -+#if CONFIG_RTW_MACADDR_ACL -+ RTW_PROC_HDL_SSEQ("macaddr_acl", proc_get_macaddr_acl, proc_set_macaddr_acl), -+#endif -+#if CONFIG_RTW_PRE_LINK_STA -+ RTW_PROC_HDL_SSEQ("pre_link_sta", proc_get_pre_link_sta, proc_set_pre_link_sta), -+#endif -+ RTW_PROC_HDL_SSEQ("ch_sel_policy", proc_get_ch_sel_policy, proc_set_ch_sel_policy), -+#ifdef CONFIG_DFS_MASTER -+ RTW_PROC_HDL_SSEQ("dfs_test_case", proc_get_dfs_test_case, proc_set_dfs_test_case), -+ RTW_PROC_HDL_SSEQ("update_non_ocp", NULL, proc_set_update_non_ocp), -+ RTW_PROC_HDL_SSEQ("radar_detect", NULL, proc_set_radar_detect), -+ RTW_PROC_HDL_SSEQ("dfs_ch_sel_e_flags", proc_get_dfs_ch_sel_e_flags, proc_set_dfs_ch_sel_e_flags), -+ RTW_PROC_HDL_SSEQ("dfs_ch_sel_d_flags", proc_get_dfs_ch_sel_d_flags, proc_set_dfs_ch_sel_d_flags), -+ #if CONFIG_DFS_SLAVE_WITH_RADAR_DETECT -+ RTW_PROC_HDL_SSEQ("dfs_slave_with_rd", proc_get_dfs_slave_with_rd, proc_set_dfs_slave_with_rd), -+ #endif -+#endif -+#ifdef CONFIG_BCN_CNT_CONFIRM_HDL -+ RTW_PROC_HDL_SSEQ("new_bcn_max", proc_get_new_bcn_max, proc_set_new_bcn_max), -+#endif -+ RTW_PROC_HDL_SSEQ("sink_udpport", proc_get_udpport, proc_set_udpport), -+#ifdef DBG_RX_COUNTER_DUMP -+ RTW_PROC_HDL_SSEQ("dump_rx_cnt_mode", proc_get_rx_cnt_dump, proc_set_rx_cnt_dump), -+#endif -+#ifdef CONFIG_AP_MODE -+ RTW_PROC_HDL_SSEQ("change_bss_chbw", NULL, proc_set_change_bss_chbw), -+#endif -+#if CONFIG_TX_AC_LIFETIME -+ RTW_PROC_HDL_SSEQ("tx_aclt_force_val", proc_get_tx_aclt_force_val, proc_set_tx_aclt_force_val), -+ RTW_PROC_HDL_SSEQ("tx_aclt_flags", proc_get_tx_aclt_flags, proc_set_tx_aclt_flags), -+ RTW_PROC_HDL_SSEQ("tx_aclt_confs", proc_get_tx_aclt_confs, proc_set_tx_aclt_confs), -+#endif -+ RTW_PROC_HDL_SSEQ("tx_bw_mode", proc_get_tx_bw_mode, proc_set_tx_bw_mode), -+ RTW_PROC_HDL_SSEQ("hal_txpwr_info", proc_get_hal_txpwr_info, NULL), -+ RTW_PROC_HDL_SSEQ("target_tx_power", proc_get_target_tx_power, NULL), -+ RTW_PROC_HDL_SSEQ("tx_power_by_rate", proc_get_tx_power_by_rate, NULL), -+#if CONFIG_TXPWR_LIMIT -+ RTW_PROC_HDL_SSEQ("tx_power_limit", proc_get_tx_power_limit, NULL), -+#endif -+ RTW_PROC_HDL_SSEQ("tpc_settings", proc_get_tpc_settings, proc_set_tpc_settings), -+ RTW_PROC_HDL_SSEQ("antenna_gain", proc_get_antenna_gain, proc_set_antenna_gain), -+ RTW_PROC_HDL_SSEQ("tx_power_ext_info", proc_get_tx_power_ext_info, proc_set_tx_power_ext_info), -+ RTW_PROC_HDL_SEQ("tx_power_idx", &seq_ops_tx_power_idx, proc_set_tx_power_idx_dump), -+ RTW_PROC_HDL_SEQ("txpwr_total_dbm", &seq_ops_txpwr_total_dbm, proc_set_txpwr_total_dbm_dump), -+#ifdef CONFIG_RF_POWER_TRIM -+ RTW_PROC_HDL_SSEQ("tx_gain_offset", NULL, proc_set_tx_gain_offset), -+ RTW_PROC_HDL_SSEQ("kfree_flag", proc_get_kfree_flag, proc_set_kfree_flag), -+ RTW_PROC_HDL_SSEQ("kfree_bb_gain", proc_get_kfree_bb_gain, proc_set_kfree_bb_gain), -+ RTW_PROC_HDL_SSEQ("kfree_thermal", proc_get_kfree_thermal, proc_set_kfree_thermal), -+#endif -+#ifdef CONFIG_POWER_SAVING -+ RTW_PROC_HDL_SSEQ("ps_info", proc_get_ps_info, proc_set_ps_info), -+#ifdef CONFIG_WMMPS_STA -+ RTW_PROC_HDL_SSEQ("wmmps_info", proc_get_wmmps_info, proc_set_wmmps_info), -+#endif /* CONFIG_WMMPS_STA */ -+#endif -+#ifdef CONFIG_TDLS -+ RTW_PROC_HDL_SSEQ("tdls_info", proc_get_tdls_info, NULL), -+ RTW_PROC_HDL_SSEQ("tdls_enable", proc_get_tdls_enable, proc_set_tdls_enable), -+#endif -+ RTW_PROC_HDL_SSEQ("monitor", proc_get_monitor, proc_set_monitor), -+#ifdef RTW_SIMPLE_CONFIG -+ RTW_PROC_HDL_SSEQ("rtw_simple_config", proc_get_simple_config, proc_set_simple_config), -+#endif -+ -+#ifdef CONFIG_RTW_ACS -+ RTW_PROC_HDL_SSEQ("acs", proc_get_best_chan, proc_set_acs), -+ RTW_PROC_HDL_SSEQ("chan_info", proc_get_chan_info, NULL), -+#endif -+ -+#ifdef CONFIG_BACKGROUND_NOISE_MONITOR -+ RTW_PROC_HDL_SSEQ("noise_monitor", proc_get_nm, proc_set_nm), -+#endif -+ -+#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER -+ RTW_PROC_HDL_SSEQ("rtkm_info", proc_get_rtkm_info, NULL), -+#endif -+ RTW_PROC_HDL_SSEQ("efuse_map", proc_get_efuse_map, NULL), -+#ifdef CONFIG_IEEE80211W -+ RTW_PROC_HDL_SSEQ("11w_tx_sa_query", proc_get_tx_sa_query, proc_set_tx_sa_query), -+ RTW_PROC_HDL_SSEQ("11w_tx_deauth", proc_get_tx_deauth, proc_set_tx_deauth), -+ RTW_PROC_HDL_SSEQ("11w_tx_auth", proc_get_tx_auth, proc_set_tx_auth), -+#endif /* CONFIG_IEEE80211W */ -+ -+#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA -+ RTW_PROC_HDL_SSEQ("pathb_phase", proc_get_pathb_phase, proc_set_pathb_phase), -+#endif -+ -+#ifdef CONFIG_MBSSID_CAM -+ RTW_PROC_HDL_SSEQ("mbid_cam", proc_get_mbid_cam_cache, NULL), -+#endif -+ RTW_PROC_HDL_SSEQ("mac_addr", proc_get_mac_addr, NULL), -+ RTW_PROC_HDL_SSEQ("skip_band", proc_get_skip_band, proc_set_skip_band), -+ RTW_PROC_HDL_SSEQ("hal_spec", proc_get_hal_spec, NULL), -+ RTW_PROC_HDL_SSEQ("hal_trx_mode", proc_get_hal_trx_mode, NULL), -+ -+ RTW_PROC_HDL_SSEQ("rx_stat", proc_get_rx_stat, NULL), -+ -+ RTW_PROC_HDL_SSEQ("tx_stat", proc_get_tx_stat, NULL), -+ /**** PHY Capability ****/ -+ RTW_PROC_HDL_SSEQ("phy_cap", proc_get_phy_cap, NULL), -+#ifdef CONFIG_80211N_HT -+ RTW_PROC_HDL_SSEQ("rx_stbc", proc_get_rx_stbc, proc_set_rx_stbc), -+ RTW_PROC_HDL_SSEQ("stbc_cap", proc_get_stbc_cap, proc_set_stbc_cap), -+ RTW_PROC_HDL_SSEQ("ldpc_cap", proc_get_ldpc_cap, proc_set_ldpc_cap), -+#endif /* CONFIG_80211N_HT */ -+#ifdef CONFIG_BEAMFORMING -+ RTW_PROC_HDL_SSEQ("txbf_cap", proc_get_txbf_cap, proc_set_txbf_cap), -+#endif -+ -+#ifdef CONFIG_SUPPORT_TRX_SHARED -+ RTW_PROC_HDL_SSEQ("trx_share_mode", proc_get_trx_share_mode, NULL), -+#endif -+ RTW_PROC_HDL_SSEQ("napi_info", proc_get_napi_info, NULL), -+#ifdef CONFIG_RTW_NAPI_DYNAMIC -+ RTW_PROC_HDL_SSEQ("napi_th", proc_get_napi_info, proc_set_napi_th), -+#endif /* CONFIG_RTW_NAPI_DYNAMIC */ -+ -+ RTW_PROC_HDL_SSEQ("rsvd_page", proc_dump_rsvd_page, proc_set_rsvd_page_info), -+ -+#ifdef CONFIG_SUPPORT_FIFO_DUMP -+ RTW_PROC_HDL_SSEQ("fifo_dump", proc_dump_fifo, proc_set_fifo_info), -+#endif -+ RTW_PROC_HDL_SSEQ("fw_info", proc_get_fw_info, NULL), -+ -+#ifdef DBG_XMIT_BLOCK -+ RTW_PROC_HDL_SSEQ("xmit_block", proc_get_xmit_block, proc_set_xmit_block), -+#endif -+ -+ RTW_PROC_HDL_SSEQ("ack_timeout", proc_get_ack_timeout, proc_set_ack_timeout), -+ -+ RTW_PROC_HDL_SSEQ("dynamic_agg_enable", proc_get_dynamic_agg_enable, proc_set_dynamic_agg_enable), -+ RTW_PROC_HDL_SSEQ("fw_offload", proc_get_fw_offload, proc_set_fw_offload), -+ -+#ifdef CONFIG_RTW_WDS -+ RTW_PROC_HDL_SSEQ("wds_en", proc_get_wds_en, proc_set_wds_en), -+ RTW_PROC_HDL_SSEQ("sta_wds_en", NULL, proc_set_sta_wds_en), -+ RTW_PROC_HDL_SSEQ("wds_gptr", proc_get_wds_gptr, NULL), -+ #ifdef CONFIG_AP_MODE -+ RTW_PROC_HDL_SSEQ("wds_path", proc_get_wds_path, NULL), -+ #endif -+#endif -+ -+#ifdef CONFIG_RTW_MULTI_AP -+ RTW_PROC_HDL_SSEQ("multi_ap_opmode", proc_get_multi_ap_opmode, proc_set_multi_ap_opmode), -+ RTW_PROC_HDL_SSEQ("unassoc_sta", proc_get_unassoc_sta, proc_set_unassoc_sta), -+#ifdef CONFIG_IOCTL_CFG80211 -+ RTW_PROC_HDL_SSEQ("sta_assoc_req_frame_body", proc_get_sta_assoc_req_frame_body, proc_set_sta_assoc_req_frame_body), -+#endif -+ RTW_PROC_HDL_SSEQ("ch_util_threshold", proc_get_ch_util_threshold, proc_set_ch_util_threshold), -+ RTW_PROC_HDL_SSEQ("ch_utilization", proc_get_ch_utilization, NULL), -+#endif -+ -+#ifdef CONFIG_RTW_MESH -+ #if CONFIG_RTW_MESH_ACNODE_PREVENT -+ RTW_PROC_HDL_SSEQ("mesh_acnode_prevent", proc_get_mesh_acnode_prevent, proc_set_mesh_acnode_prevent), -+ #endif -+ #if CONFIG_RTW_MESH_OFFCH_CAND -+ RTW_PROC_HDL_SSEQ("mesh_offch_cand", proc_get_mesh_offch_cand, proc_set_mesh_offch_cand), -+ #endif -+ #if CONFIG_RTW_MESH_PEER_BLACKLIST -+ RTW_PROC_HDL_SSEQ("mesh_peer_blacklist", proc_get_mesh_peer_blacklist, proc_set_mesh_peer_blacklist), -+ #endif -+ #if CONFIG_RTW_MESH_CTO_MGATE_BLACKLIST -+ RTW_PROC_HDL_SSEQ("mesh_cto_mgate_require", proc_get_mesh_cto_mgate_require, proc_set_mesh_cto_mgate_require), -+ RTW_PROC_HDL_SSEQ("mesh_cto_mgate_blacklist", proc_get_mesh_cto_mgate_blacklist, proc_set_mesh_cto_mgate_blacklist), -+ #endif -+ RTW_PROC_HDL_SSEQ("mesh_peer_sel_policy", proc_get_mesh_peer_sel_policy, NULL), -+ RTW_PROC_HDL_SSEQ("mesh_networks", proc_get_mesh_networks, NULL), -+ RTW_PROC_HDL_SSEQ("mesh_plink_ctl", proc_get_mesh_plink_ctl, NULL), -+ RTW_PROC_HDL_SSEQ("mesh_mpath", proc_get_mesh_mpath, NULL), -+ RTW_PROC_HDL_SSEQ("mesh_mpp", proc_get_mesh_mpp, NULL), -+ RTW_PROC_HDL_SSEQ("mesh_known_gates", proc_get_mesh_known_gates, NULL), -+ #if CONFIG_RTW_MESH_DATA_BMC_TO_UC -+ RTW_PROC_HDL_SSEQ("mesh_b2u_flags", proc_get_mesh_b2u_flags, proc_set_mesh_b2u_flags), -+ #endif -+ RTW_PROC_HDL_SSEQ("mesh_stats", proc_get_mesh_stats, NULL), -+ RTW_PROC_HDL_SSEQ("mesh_gate_timeout_factor", proc_get_mesh_gate_timeout, proc_set_mesh_gate_timeout), -+ RTW_PROC_HDL_SSEQ("mesh_gate_state", proc_get_mesh_gate_state, NULL), -+ RTW_PROC_HDL_SSEQ("mesh_peer_alive_based_preq", proc_get_peer_alive_based_preq, proc_set_peer_alive_based_preq), -+#endif -+#ifdef CONFIG_FW_HANDLE_TXBCN -+ RTW_PROC_HDL_SSEQ("fw_tbtt_rpt", proc_get_fw_tbtt_rpt, proc_set_fw_tbtt_rpt), -+#endif -+#ifdef CONFIG_LPS_CHK_BY_TP -+ RTW_PROC_HDL_SSEQ("lps_chk_tp", proc_get_lps_chk_tp, proc_set_lps_chk_tp), -+#endif -+#ifdef CONFIG_SUPPORT_STATIC_SMPS -+ RTW_PROC_HDL_SSEQ("smps", proc_get_smps, proc_set_smps), -+#endif -+ -+#ifdef RTW_BUSY_DENY_SCAN -+ RTW_PROC_HDL_SSEQ("scan_interval_thr", proc_get_scan_interval_thr, \ -+ proc_set_scan_interval_thr), -+#endif -+ RTW_PROC_HDL_SSEQ("scan_deny", proc_get_scan_deny, proc_set_scan_deny), -+#ifdef CONFIG_RTW_TPT_MODE -+ RTW_PROC_HDL_SSEQ("tpt_mode", proc_get_tpt_mode, proc_set_tpt_mode), -+#endif -+ -+#ifdef CONFIG_CTRL_TXSS_BY_TP -+ RTW_PROC_HDL_SSEQ("txss_tp", proc_get_txss_tp, proc_set_txss_tp), -+ #ifdef DBG_CTRL_TXSS -+ RTW_PROC_HDL_SSEQ("txss_ctrl", proc_get_txss_ctrl, proc_set_txss_ctrl), -+ #endif -+#endif -+ -+ RTW_PROC_HDL_SSEQ("cur_beacon_keys", proc_get_cur_beacon_keys, NULL), -+ -+#ifdef CONFIG_WAR_OFFLOAD -+ RTW_PROC_HDL_SSEQ("war_offload_enable", proc_get_war_offload_enable, proc_set_war_offload_enable), -+ RTW_PROC_HDL_SSEQ("war_offload_ipv4_addr", NULL, proc_set_war_offload_ipv4_addr), -+ RTW_PROC_HDL_SSEQ("war_offload_ipv6_addr", NULL, proc_set_war_offload_ipv6_addr), -+#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) -+ RTW_PROC_HDL_SSEQ("war_offload_mdns_domain_name", proc_get_war_offload_mdns_domain_name, proc_set_war_offload_mdns_domain_name), -+ RTW_PROC_HDL_SSEQ("war_offload_mdns_machine_name", proc_get_war_offload_mdns_machine_name, proc_set_war_offload_mdns_machine_name), -+ RTW_PROC_HDL_SSEQ("war_offload_mdns_service_info", proc_get_war_offload_mdns_service_info, proc_set_war_offload_mdns_service_info), -+ RTW_PROC_HDL_SSEQ("war_offload_mdns_service_info_txt_rsp", proc_get_war_offload_mdns_txt_rsp, proc_set_war_offload_mdns_txt_rsp), -+#endif /* CONFIG_OFFLOAD_MDNS_V4 || CONFIG_OFFLOAD_MDNS_V6 */ -+#endif /* CONFIG_WAR_OFFLOAD */ -+ -+}; -+ -+const int adapter_proc_hdls_num = sizeof(adapter_proc_hdls) / sizeof(struct rtw_proc_hdl); -+ -+static int rtw_adapter_proc_open(struct inode *inode, struct file *file) -+{ -+ ssize_t index = (ssize_t)PDE_DATA(inode); -+ const struct rtw_proc_hdl *hdl = adapter_proc_hdls + index; -+ void *private = proc_get_parent_data(inode); -+ -+ if (hdl->type == RTW_PROC_HDL_TYPE_SEQ) { -+ int res = seq_open(file, hdl->u.seq_op); -+ -+ if (res == 0) -+ ((struct seq_file *)file->private_data)->private = private; -+ -+ return res; -+ } else if (hdl->type == RTW_PROC_HDL_TYPE_SSEQ) { -+ int (*show)(struct seq_file *, void *) = hdl->u.show ? hdl->u.show : proc_get_dummy; -+ -+ return single_open(file, show, private); -+ } else if (hdl->type == RTW_PROC_HDL_TYPE_SZSEQ) { -+ int (*show)(struct seq_file *, void *) = hdl->u.sz.show ? hdl->u.sz.show : proc_get_dummy; -+ -+ return single_open_size(file, show, private, hdl->u.sz.size); -+ } else { -+ return -EROFS; -+ } -+} -+ -+static ssize_t rtw_adapter_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) -+{ -+ ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); -+ const struct rtw_proc_hdl *hdl = adapter_proc_hdls + index; -+ ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; -+ -+ if (write) -+ return write(file, buffer, count, pos, ((struct seq_file *)file->private_data)->private); -+ -+ return -EROFS; -+} -+ -+static const struct rtw_proc_ops rtw_adapter_proc_seq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+ .proc_open = rtw_adapter_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = seq_release, -+ .proc_write = rtw_adapter_proc_write, -+#else -+ .owner = THIS_MODULE, -+ .open = rtw_adapter_proc_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = seq_release, -+ .write = rtw_adapter_proc_write, -+#endif -+}; -+ -+static const struct rtw_proc_ops rtw_adapter_proc_sseq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+ .proc_open = rtw_adapter_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = single_release, -+ .proc_write = rtw_adapter_proc_write, -+#else -+ .owner = THIS_MODULE, -+ .open = rtw_adapter_proc_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+ .write = rtw_adapter_proc_write, -+#endif -+}; -+ -+int proc_get_odm_adaptivity(struct seq_file *m, void *v) -+{ -+ struct net_device *dev = m->private; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ -+ rtw_odm_adaptivity_parm_msg(m, padapter); -+ -+ return 0; -+} -+ -+ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *dev = data; -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); -+ char tmp[32]; -+ u32 th_l2h_ini; -+ s8 th_edcca_hl_diff; -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) { -+ rtw_warn_on(1); -+ return -EFAULT; -+ } -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ -+ int num = sscanf(tmp, "%x %hhd", &th_l2h_ini, &th_edcca_hl_diff); -+ -+ if (num != 2) -+ return count; -+ -+ rtw_odm_adaptivity_parm_set(padapter, (s8)th_l2h_ini, th_edcca_hl_diff); -+ } -+ -+ return count; -+} -+ -+static char *phydm_msg = NULL; -+#define PHYDM_MSG_LEN 80*24*4 -+ -+int proc_get_phydm_cmd(struct seq_file *m, void *v) -+{ -+ struct net_device *netdev; -+ PADAPTER padapter; -+ struct dm_struct *phydm; -+ -+ -+ netdev = m->private; -+ padapter = (PADAPTER)rtw_netdev_priv(netdev); -+ phydm = adapter_to_phydm(padapter); -+ -+ if (NULL == phydm_msg) { -+ phydm_msg = rtw_zmalloc(PHYDM_MSG_LEN); -+ if (NULL == phydm_msg) -+ return -ENOMEM; -+ -+ phydm_cmd(phydm, NULL, 0, 0, phydm_msg, PHYDM_MSG_LEN); -+ } -+ -+ _RTW_PRINT_SEL(m, "%s\n", phydm_msg); -+ -+ rtw_mfree(phydm_msg, PHYDM_MSG_LEN); -+ phydm_msg = NULL; -+ -+ return 0; -+} -+ -+ssize_t proc_set_phydm_cmd(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) -+{ -+ struct net_device *netdev; -+ PADAPTER padapter; -+ struct dm_struct *phydm; -+ char tmp[64] = {0}; -+ -+ -+ netdev = (struct net_device *)data; -+ padapter = (PADAPTER)rtw_netdev_priv(netdev); -+ phydm = adapter_to_phydm(padapter); -+ -+ if (count < 1) -+ return -EFAULT; -+ -+ if (count > sizeof(tmp)) -+ return -EFAULT; -+ -+ if (buffer && !copy_from_user(tmp, buffer, count)) { -+ if (NULL == phydm_msg) { -+ phydm_msg = rtw_zmalloc(PHYDM_MSG_LEN); -+ if (NULL == phydm_msg) -+ return -ENOMEM; -+ } else -+ _rtw_memset(phydm_msg, 0, PHYDM_MSG_LEN); -+ -+ phydm_cmd(phydm, tmp, count, 1, phydm_msg, PHYDM_MSG_LEN); -+ -+ if (strlen(phydm_msg) == 0) { -+ rtw_mfree(phydm_msg, PHYDM_MSG_LEN); -+ phydm_msg = NULL; -+ } -+ } -+ -+ return count; -+} -+ -+/* -+* rtw_odm_proc: -+* init/deinit when register/unregister net_device, along with rtw_adapter_proc -+*/ -+const struct rtw_proc_hdl odm_proc_hdls[] = { -+ RTW_PROC_HDL_SSEQ("adaptivity", proc_get_odm_adaptivity, proc_set_odm_adaptivity), -+ RTW_PROC_HDL_SZSEQ("cmd", proc_get_phydm_cmd, proc_set_phydm_cmd, PHYDM_MSG_LEN), -+}; -+ -+const int odm_proc_hdls_num = sizeof(odm_proc_hdls) / sizeof(struct rtw_proc_hdl); -+ -+static int rtw_odm_proc_open(struct inode *inode, struct file *file) -+{ -+ ssize_t index = (ssize_t)PDE_DATA(inode); -+ const struct rtw_proc_hdl *hdl = odm_proc_hdls + index; -+ void *private = proc_get_parent_data(inode); -+ -+ if (hdl->type == RTW_PROC_HDL_TYPE_SEQ) { -+ int res = seq_open(file, hdl->u.seq_op); -+ -+ if (res == 0) -+ ((struct seq_file *)file->private_data)->private = private; -+ -+ return res; -+ } else if (hdl->type == RTW_PROC_HDL_TYPE_SSEQ) { -+ int (*show)(struct seq_file *, void *) = hdl->u.show ? hdl->u.show : proc_get_dummy; -+ -+ return single_open(file, show, private); -+ } else if (hdl->type == RTW_PROC_HDL_TYPE_SZSEQ) { -+ int (*show)(struct seq_file *, void *) = hdl->u.sz.show ? hdl->u.sz.show : proc_get_dummy; -+ -+ return single_open_size(file, show, private, hdl->u.sz.size); -+ } else { -+ return -EROFS; -+ } -+} -+ -+static ssize_t rtw_odm_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) -+{ -+ ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); -+ const struct rtw_proc_hdl *hdl = odm_proc_hdls + index; -+ ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; -+ -+ if (write) -+ return write(file, buffer, count, pos, ((struct seq_file *)file->private_data)->private); -+ -+ return -EROFS; -+} -+ -+static const struct rtw_proc_ops rtw_odm_proc_seq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+ .proc_open = rtw_odm_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = seq_release, -+ .proc_write = rtw_odm_proc_write, -+#else -+ .owner = THIS_MODULE, -+ .open = rtw_odm_proc_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = seq_release, -+ .write = rtw_odm_proc_write, -+#endif -+}; -+ -+static const struct rtw_proc_ops rtw_odm_proc_sseq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+ .proc_open = rtw_odm_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = single_release, -+ .proc_write = rtw_odm_proc_write, -+#else -+ .owner = THIS_MODULE, -+ .open = rtw_odm_proc_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+ .write = rtw_odm_proc_write, -+#endif -+}; -+ -+struct proc_dir_entry *rtw_odm_proc_init(struct net_device *dev) -+{ -+ struct proc_dir_entry *dir_odm = NULL; -+ struct proc_dir_entry *entry = NULL; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ ssize_t i; -+ -+ if (adapter->dir_dev == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (adapter->dir_odm != NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ dir_odm = rtw_proc_create_dir("odm", adapter->dir_dev, dev); -+ if (dir_odm == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ adapter->dir_odm = dir_odm; -+ -+ for (i = 0; i < odm_proc_hdls_num; i++) { -+ if (odm_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SEQ) -+ entry = rtw_proc_create_entry(odm_proc_hdls[i].name, dir_odm, &rtw_odm_proc_seq_fops, (void *)i); -+ else if (odm_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SSEQ || -+ odm_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SZSEQ) -+ entry = rtw_proc_create_entry(odm_proc_hdls[i].name, dir_odm, &rtw_odm_proc_sseq_fops, (void *)i); -+ else -+ entry = NULL; -+ -+ if (!entry) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ } -+ -+exit: -+ return dir_odm; -+} -+ -+void rtw_odm_proc_deinit(_adapter *adapter) -+{ -+ struct proc_dir_entry *dir_odm = NULL; -+ int i; -+ -+ dir_odm = adapter->dir_odm; -+ -+ if (dir_odm == NULL) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ for (i = 0; i < odm_proc_hdls_num; i++) -+ remove_proc_entry(odm_proc_hdls[i].name, dir_odm); -+ -+ remove_proc_entry("odm", adapter->dir_dev); -+ -+ adapter->dir_odm = NULL; -+ -+ if (phydm_msg) { -+ rtw_mfree(phydm_msg, PHYDM_MSG_LEN); -+ phydm_msg = NULL; -+ } -+} -+ -+#ifdef CONFIG_MCC_MODE -+/* -+* rtw_mcc_proc: -+* init/deinit when register/unregister net_device, along with rtw_adapter_proc -+*/ -+const struct rtw_proc_hdl mcc_proc_hdls[] = { -+ RTW_PROC_HDL_SSEQ("mcc_info", proc_get_mcc_info, NULL), -+ RTW_PROC_HDL_SSEQ("mcc_enable", proc_get_mcc_info, proc_set_mcc_enable), -+ RTW_PROC_HDL_SSEQ("mcc_duration", proc_get_mcc_info, proc_set_mcc_duration), -+ #ifdef CONFIG_MCC_PHYDM_OFFLOAD -+ RTW_PROC_HDL_SSEQ("mcc_phydm_offload", proc_get_mcc_info, proc_set_mcc_phydm_offload_enable), -+ #endif -+ RTW_PROC_HDL_SSEQ("mcc_single_tx_criteria", proc_get_mcc_info, proc_set_mcc_single_tx_criteria), -+ RTW_PROC_HDL_SSEQ("mcc_ap_bw20_target_tp", proc_get_mcc_info, proc_set_mcc_ap_bw20_target_tp), -+ RTW_PROC_HDL_SSEQ("mcc_ap_bw40_target_tp", proc_get_mcc_info, proc_set_mcc_ap_bw40_target_tp), -+ RTW_PROC_HDL_SSEQ("mcc_ap_bw80_target_tp", proc_get_mcc_info, proc_set_mcc_ap_bw80_target_tp), -+ RTW_PROC_HDL_SSEQ("mcc_sta_bw20_target_tp", proc_get_mcc_info, proc_set_mcc_sta_bw20_target_tp), -+ RTW_PROC_HDL_SSEQ("mcc_sta_bw40_target_tp", proc_get_mcc_info, proc_set_mcc_sta_bw40_target_tp), -+ RTW_PROC_HDL_SSEQ("mcc_sta_bw80_target_tp", proc_get_mcc_info, proc_set_mcc_sta_bw80_target_tp), -+ RTW_PROC_HDL_SSEQ("mcc_policy_table", proc_get_mcc_policy_table, NULL), -+}; -+ -+const int mcc_proc_hdls_num = sizeof(mcc_proc_hdls) / sizeof(struct rtw_proc_hdl); -+ -+static int rtw_mcc_proc_open(struct inode *inode, struct file *file) -+{ -+ ssize_t index = (ssize_t)PDE_DATA(inode); -+ const struct rtw_proc_hdl *hdl = mcc_proc_hdls + index; -+ void *private = proc_get_parent_data(inode); -+ -+ if (hdl->type == RTW_PROC_HDL_TYPE_SEQ) { -+ int res = seq_open(file, hdl->u.seq_op); -+ -+ if (res == 0) -+ ((struct seq_file *)file->private_data)->private = private; -+ -+ return res; -+ } else if (hdl->type == RTW_PROC_HDL_TYPE_SSEQ) { -+ int (*show)(struct seq_file *, void *) = hdl->u.show ? hdl->u.show : proc_get_dummy; -+ -+ return single_open(file, show, private); -+ } else if (hdl->type == RTW_PROC_HDL_TYPE_SZSEQ) { -+ int (*show)(struct seq_file *, void *) = hdl->u.sz.show ? hdl->u.sz.show : proc_get_dummy; -+ -+ return single_open_size(file, show, private, hdl->u.sz.size); -+ } else { -+ return -EROFS; -+ } -+} -+ -+static ssize_t rtw_mcc_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) -+{ -+ ssize_t index = (ssize_t)PDE_DATA(file_inode(file)); -+ const struct rtw_proc_hdl *hdl = mcc_proc_hdls + index; -+ ssize_t (*write)(struct file *, const char __user *, size_t, loff_t *, void *) = hdl->write; -+ -+ if (write) -+ return write(file, buffer, count, pos, ((struct seq_file *)file->private_data)->private); -+ -+ return -EROFS; -+} -+ -+static const struct rtw_proc_ops rtw_mcc_proc_seq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+ .proc_open = rtw_mcc_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = seq_release, -+ .proc_write = rtw_mcc_proc_write, -+#else -+ .owner = THIS_MODULE, -+ .open = rtw_mcc_proc_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = seq_release, -+ .write = rtw_mcc_proc_write, -+#endif -+}; -+ -+static const struct rtw_proc_ops rtw_mcc_proc_sseq_fops = { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+ .proc_open = rtw_mcc_proc_open, -+ .proc_read = seq_read, -+ .proc_lseek = seq_lseek, -+ .proc_release = single_release, -+ .proc_write = rtw_mcc_proc_write, -+#else -+ .owner = THIS_MODULE, -+ .open = rtw_mcc_proc_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+ .write = rtw_mcc_proc_write, -+#endif -+}; -+ -+struct proc_dir_entry *rtw_mcc_proc_init(struct net_device *dev) -+{ -+ struct proc_dir_entry *dir_mcc = NULL; -+ struct proc_dir_entry *entry = NULL; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ ssize_t i; -+ -+ if (adapter->dir_dev == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (adapter->dir_mcc != NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ dir_mcc = rtw_proc_create_dir("mcc", adapter->dir_dev, dev); -+ if (dir_mcc == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ adapter->dir_mcc = dir_mcc; -+ -+ for (i = 0; i < mcc_proc_hdls_num; i++) { -+ if (mcc_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SEQ) -+ entry = rtw_proc_create_entry(mcc_proc_hdls[i].name, dir_mcc, &rtw_mcc_proc_seq_fops, (void *)i); -+ else if (mcc_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SSEQ || -+ mcc_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SZSEQ) -+ entry = rtw_proc_create_entry(mcc_proc_hdls[i].name, dir_mcc, &rtw_mcc_proc_sseq_fops, (void *)i); -+ else -+ entry = NULL; -+ -+ if (!entry) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ } -+ -+exit: -+ return dir_mcc; -+} -+ -+void rtw_mcc_proc_deinit(_adapter *adapter) -+{ -+ struct proc_dir_entry *dir_mcc = NULL; -+ int i; -+ -+ dir_mcc = adapter->dir_mcc; -+ -+ if (dir_mcc == NULL) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ for (i = 0; i < mcc_proc_hdls_num; i++) -+ remove_proc_entry(mcc_proc_hdls[i].name, dir_mcc); -+ -+ remove_proc_entry("mcc", adapter->dir_dev); -+ -+ adapter->dir_mcc = NULL; -+} -+#endif /* CONFIG_MCC_MODE */ -+ -+struct proc_dir_entry *rtw_adapter_proc_init(struct net_device *dev) -+{ -+ struct proc_dir_entry *drv_proc = get_rtw_drv_proc(); -+ struct proc_dir_entry *dir_dev = NULL; -+ struct proc_dir_entry *entry = NULL; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ ssize_t i; -+ -+ if (drv_proc == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (adapter->dir_dev != NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ dir_dev = rtw_proc_create_dir(dev->name, drv_proc, dev); -+ if (dir_dev == NULL) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ adapter->dir_dev = dir_dev; -+ -+ for (i = 0; i < adapter_proc_hdls_num; i++) { -+ if (adapter_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SEQ) -+ entry = rtw_proc_create_entry(adapter_proc_hdls[i].name, dir_dev, &rtw_adapter_proc_seq_fops, (void *)i); -+ else if (adapter_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SSEQ || -+ adapter_proc_hdls[i].type == RTW_PROC_HDL_TYPE_SZSEQ) -+ entry = rtw_proc_create_entry(adapter_proc_hdls[i].name, dir_dev, &rtw_adapter_proc_sseq_fops, (void *)i); -+ else -+ entry = NULL; -+ -+ if (!entry) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ } -+ -+ rtw_odm_proc_init(dev); -+ -+#ifdef CONFIG_MCC_MODE -+ rtw_mcc_proc_init(dev); -+#endif /* CONFIG_MCC_MODE */ -+ -+exit: -+ return dir_dev; -+} -+ -+void rtw_adapter_proc_deinit(struct net_device *dev) -+{ -+ struct proc_dir_entry *drv_proc = get_rtw_drv_proc(); -+ struct proc_dir_entry *dir_dev = NULL; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ int i; -+ -+ dir_dev = adapter->dir_dev; -+ -+ if (dir_dev == NULL) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ for (i = 0; i < adapter_proc_hdls_num; i++) -+ remove_proc_entry(adapter_proc_hdls[i].name, dir_dev); -+ -+ rtw_odm_proc_deinit(adapter); -+ -+#ifdef CONFIG_MCC_MODE -+ rtw_mcc_proc_deinit(adapter); -+#endif /* CONFIG_MCC_MODE */ -+ -+ remove_proc_entry(dev->name, drv_proc); -+ -+ adapter->dir_dev = NULL; -+} -+ -+void rtw_adapter_proc_replace(struct net_device *dev) -+{ -+ struct proc_dir_entry *drv_proc = get_rtw_drv_proc(); -+ struct proc_dir_entry *dir_dev = NULL; -+ _adapter *adapter = rtw_netdev_priv(dev); -+ int i; -+ -+ dir_dev = adapter->dir_dev; -+ -+ if (dir_dev == NULL) { -+ rtw_warn_on(1); -+ return; -+ } -+ -+ for (i = 0; i < adapter_proc_hdls_num; i++) -+ remove_proc_entry(adapter_proc_hdls[i].name, dir_dev); -+ -+ rtw_odm_proc_deinit(adapter); -+ -+#ifdef CONFIG_MCC_MODE -+ rtw_mcc_proc_deinit(adapter); -+#endif /* CONIG_MCC_MODE */ -+ -+ remove_proc_entry(adapter->old_ifname, drv_proc); -+ -+ adapter->dir_dev = NULL; -+ -+ rtw_adapter_proc_init(dev); -+ -+} -+ -+#endif /* CONFIG_PROC_DEBUG */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/rtw_proc.h b/drivers/staging/rtl8723cs/os_dep/linux/rtw_proc.h -new file mode 100644 -index 000000000000..9247e3637e31 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/rtw_proc.h -@@ -0,0 +1,72 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_PROC_H__ -+#define __RTW_PROC_H__ -+ -+#include -+#include -+ -+#define RTW_PROC_HDL_TYPE_SEQ 0 -+#define RTW_PROC_HDL_TYPE_SSEQ 1 -+#define RTW_PROC_HDL_TYPE_SZSEQ 2 -+ -+struct rtw_proc_hdl { -+ char *name; -+ u8 type; -+ union { -+ int (*show)(struct seq_file *, void *); -+ struct seq_operations *seq_op; -+ struct { -+ int (*show)(struct seq_file *, void *); -+ size_t size; -+ } sz; -+ } u; -+ ssize_t (*write)(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -+}; -+ -+#define RTW_PROC_HDL_SEQ(_name, _seq_op, _write) \ -+ { .name = _name, .type = RTW_PROC_HDL_TYPE_SEQ, .u.seq_op = _seq_op, .write = _write} -+ -+#define RTW_PROC_HDL_SSEQ(_name, _show, _write) \ -+ { .name = _name, .type = RTW_PROC_HDL_TYPE_SSEQ, .u.show = _show, .write = _write} -+ -+#define RTW_PROC_HDL_SZSEQ(_name, _show, _write, _size) \ -+ { .name = _name, .type = RTW_PROC_HDL_TYPE_SZSEQ, .u.sz.show = _show, .write = _write, .u.sz.size = _size} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) -+#define rtw_proc_ops proc_ops -+#else -+#define rtw_proc_ops file_operations -+#endif -+ -+#ifdef CONFIG_PROC_DEBUG -+ -+int rtw_drv_proc_init(void); -+void rtw_drv_proc_deinit(void); -+struct proc_dir_entry *rtw_adapter_proc_init(struct net_device *dev); -+void rtw_adapter_proc_deinit(struct net_device *dev); -+void rtw_adapter_proc_replace(struct net_device *dev); -+ -+#else /* !CONFIG_PROC_DEBUG */ -+ -+static inline int rtw_drv_proc_init(void) {return _FAIL;} -+#define rtw_drv_proc_deinit() do {} while (0) -+static inline struct proc_dir_entry *rtw_adapter_proc_init(struct net_device *dev) {return NULL;} -+#define rtw_adapter_proc_deinit(dev) do {} while (0) -+#define rtw_adapter_proc_replace(dev) do {} while (0) -+ -+#endif /* !CONFIG_PROC_DEBUG */ -+ -+#endif /* __RTW_PROC_H__ */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/rtw_rhashtable.c b/drivers/staging/rtl8723cs/os_dep/linux/rtw_rhashtable.c -new file mode 100644 -index 000000000000..df303b237366 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/rtw_rhashtable.c -@@ -0,0 +1,77 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+ -+#if defined(CONFIG_RTW_WDS) || defined(CONFIG_RTW_MESH) /* for now, only promised for kernel versions we support mesh */ -+ -+int rtw_rhashtable_walk_enter(rtw_rhashtable *ht, rtw_rhashtable_iter *iter) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 9, 0)) -+ rhashtable_walk_enter((ht), (iter)); -+ return 0; -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)) -+ return rhashtable_walk_init((ht), (iter), GFP_ATOMIC); -+#else -+ /* kernel >= 4.4.0 rhashtable_walk_init use GFP_KERNEL to alloc, spin_lock for assignment */ -+ iter->ht = ht; -+ iter->p = NULL; -+ iter->slot = 0; -+ iter->skip = 0; -+ -+ iter->walker = kmalloc(sizeof(*iter->walker), GFP_ATOMIC); -+ if (!iter->walker) -+ return -ENOMEM; -+ -+ spin_lock(&ht->lock); -+ iter->walker->tbl = -+ rcu_dereference_protected(ht->tbl, lockdep_is_held(&ht->lock)); -+ list_add(&iter->walker->list, &iter->walker->tbl->walkers); -+ spin_unlock(&ht->lock); -+ -+ return 0; -+#endif -+} -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)) -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)) -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25)) -+static inline int is_vmalloc_addr(const void *x) -+{ -+#ifdef CONFIG_MMU -+ unsigned long addr = (unsigned long)x; -+ -+ return addr >= VMALLOC_START && addr < VMALLOC_END; -+#else -+ return 0; -+#endif -+} -+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25)) */ -+ -+void kvfree(const void *addr) -+{ -+ if (is_vmalloc_addr(addr)) -+ vfree(addr); -+ else -+ kfree(addr); -+} -+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)) */ -+ -+#include "rhashtable.c" -+ -+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)) */ -+ -+#endif /* defined(CONFIG_RTW_WDS) || defined(CONFIG_RTW_MESH) */ -+ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/rtw_rhashtable.h b/drivers/staging/rtl8723cs/os_dep/linux/rtw_rhashtable.h -new file mode 100644 -index 000000000000..af5ba7e4dbb0 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/rtw_rhashtable.h -@@ -0,0 +1,67 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __RTW_RHASHTABLE_H__ -+#define __RTW_RHASHTABLE_H__ -+ -+#if defined(CONFIG_RTW_WDS) || defined(CONFIG_RTW_MESH) /* for now, only promised for kernel versions we support mesh */ -+ -+/* directly reference rhashtable in kernel */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)) -+#include -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)) */ -+ -+/* Use rhashtable from kernel 4.4 */ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)) -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 0, 0)) -+#define NULLS_MARKER(value) (1UL | (((long)value) << 1)) -+#endif -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) -+static inline void *kmalloc_array(size_t n, size_t size, gfp_t flags) -+{ -+ if (size != 0 && n > ULONG_MAX / size) -+ return NULL; -+ return __kmalloc(n * size, flags); -+} -+#endif -+#include "rhashtable.h" -+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)) */ -+ -+typedef struct rhashtable rtw_rhashtable; -+typedef struct rhash_head rtw_rhash_head; -+typedef struct rhashtable_params rtw_rhashtable_params; -+ -+#define rtw_rhashtable_init(ht, params) rhashtable_init(ht, params) -+ -+typedef struct rhashtable_iter rtw_rhashtable_iter; -+ -+int rtw_rhashtable_walk_enter(rtw_rhashtable *ht, rtw_rhashtable_iter *iter); -+#define rtw_rhashtable_walk_exit(iter) rhashtable_walk_exit(iter) -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 16, 0)) -+#define rtw_rhashtable_walk_start(iter) rhashtable_walk_start_check(iter) -+#else -+#define rtw_rhashtable_walk_start(iter) rhashtable_walk_start(iter) -+#endif -+#define rtw_rhashtable_walk_next(iter) rhashtable_walk_next(iter) -+#define rtw_rhashtable_walk_stop(iter) rhashtable_walk_stop(iter) -+ -+#define rtw_rhashtable_free_and_destroy(ht, free_fn, arg) rhashtable_free_and_destroy((ht), (free_fn), (arg)) -+#define rtw_rhashtable_lookup_fast(ht, key, params) rhashtable_lookup_fast((ht), (key), (params)) -+#define rtw_rhashtable_lookup_insert_fast(ht, obj, params) rhashtable_lookup_insert_fast((ht), (obj), (params)) -+#define rtw_rhashtable_remove_fast(ht, obj, params) rhashtable_remove_fast((ht), (obj), (params)) -+ -+#endif /* defined(CONFIG_RTW_WDS) || defined(CONFIG_RTW_MESH) */ -+ -+#endif /* __RTW_RHASHTABLE_H__ */ -+ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/sdio_intf.c b/drivers/staging/rtl8723cs/os_dep/linux/sdio_intf.c -new file mode 100644 -index 000000000000..d6494bad9591 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/sdio_intf.c -@@ -0,0 +1,1424 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _HCI_INTF_C_ -+ -+#include -+#include -+#include -+ -+#include -+#include -+ -+#ifndef CONFIG_SDIO_HCI -+#error "CONFIG_SDIO_HCI shall be on!\n" -+#endif -+ -+#ifdef CONFIG_RTL8822B -+#include /* rtl8822bs_set_hal_ops() */ -+#endif /* CONFIG_RTL8822B */ -+ -+#ifdef CONFIG_RTL8822C -+#include -+#endif /* CONFIG_RTL8822C */ -+ -+#ifdef CONFIG_RTL8723F -+#include /* rtl8723fs_set_hal_ops() */ -+#endif /* CONFIG_RTL8723F */ -+ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+#ifdef CONFIG_ACPI -+#include -+#include -+#include "rtw_android.h" -+#endif -+static int wlan_en_gpio = -1; -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ -+#ifndef dev_to_sdio_func -+#define dev_to_sdio_func(d) container_of(d, struct sdio_func, dev) -+#endif -+ -+static const struct sdio_device_id sdio_ids[] = { -+#ifdef CONFIG_RTL8723B -+ { SDIO_DEVICE(0x024c, 0xB723), .driver_data = RTL8723B}, -+#endif -+#ifdef CONFIG_RTL8188E -+ { SDIO_DEVICE(0x024c, 0x8179), .driver_data = RTL8188E}, -+#endif /* CONFIG_RTL8188E */ -+ -+#ifdef CONFIG_RTL8821A -+ { SDIO_DEVICE(0x024c, 0x8821), .driver_data = RTL8821}, -+#endif /* CONFIG_RTL8821A */ -+ -+#ifdef CONFIG_RTL8192E -+ { SDIO_DEVICE(0x024c, 0x818B), .driver_data = RTL8192E}, -+#endif /* CONFIG_RTL8192E */ -+ -+#ifdef CONFIG_RTL8703B -+ { SDIO_DEVICE(0x024c, 0xB703), .driver_data = RTL8703B}, -+#endif -+ -+#ifdef CONFIG_RTL8188F -+ {SDIO_DEVICE(0x024c, 0xF179), .driver_data = RTL8188F}, -+#endif -+ -+#ifdef CONFIG_RTL8188GTV -+ {SDIO_DEVICE(0x024c, 0x018C), .driver_data = RTL8188GTV}, -+#endif -+ -+#ifdef CONFIG_RTL8822B -+ {SDIO_DEVICE(0x024c, 0xB822), .driver_data = RTL8822B}, -+#endif -+ -+#ifdef CONFIG_RTL8723D -+ { SDIO_DEVICE(0x024c, 0xD723), .driver_data = RTL8723D}, -+ { SDIO_DEVICE(0x024c, 0xD724), .driver_data = RTL8723D}, -+#endif -+ -+#ifdef CONFIG_RTL8192F -+ { SDIO_DEVICE(0x024c, 0x818C), .driver_data = RTL8192F},/*A CUT*/ -+ { SDIO_DEVICE(0x024c, 0xF192), .driver_data = RTL8192F},/*B CUT*/ -+ { SDIO_DEVICE(0x024c, 0xA725), .driver_data = RTL8192F},/*8725AS*/ -+#endif /* CONFIG_RTL8192F */ -+ -+#ifdef CONFIG_RTL8821C -+ {SDIO_DEVICE(0x024C, 0xB821), .driver_data = RTL8821C}, -+ {SDIO_DEVICE(0x024C, 0xC821), .driver_data = RTL8821C}, -+ {SDIO_DEVICE(0x024C, 0x8733), .driver_data = RTL8821C}, /* 8733AS */ -+ {SDIO_DEVICE(0x024C, 0xC80C), .driver_data = RTL8821C}, /* 8821CSH-VQ */ -+#endif -+ -+#ifdef CONFIG_RTL8822C -+ {SDIO_DEVICE(0x024c, 0xC822), .class = SDIO_CLASS_WLAN, .driver_data = RTL8822C}, -+ {SDIO_DEVICE(0x024c, 0xD821), .class = SDIO_CLASS_WLAN, .driver_data = RTL8822C}, /* 8821DS */ -+#endif -+ -+#ifdef CONFIG_RTL8723F -+ {SDIO_DEVICE(0x024c, 0xB733), .class = SDIO_CLASS_WLAN, .driver_data = RTL8723F}, -+#endif -+ -+#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) /* temporarily add this to accept all sdio wlan id */ -+ { SDIO_DEVICE_CLASS(SDIO_CLASS_WLAN) }, -+#endif -+ { /* end: all zeroes */ }, -+}; -+ -+MODULE_DEVICE_TABLE(sdio, sdio_ids); -+ -+static int rtw_drv_init(struct sdio_func *func, const struct sdio_device_id *id); -+static void rtw_dev_remove(struct sdio_func *func); -+#ifdef CONFIG_SDIO_HOOK_DEV_SHUTDOWN -+static void rtw_dev_shutdown(struct device *dev); -+#endif -+static int rtw_sdio_resume(struct device *dev); -+static int rtw_sdio_suspend(struct device *dev); -+extern void rtw_dev_unload(PADAPTER padapter); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+static const struct dev_pm_ops rtw_sdio_pm_ops = { -+ .suspend = rtw_sdio_suspend, -+ .resume = rtw_sdio_resume, -+}; -+#endif -+ -+struct sdio_drv_priv { -+ struct sdio_driver r871xs_drv; -+ int drv_registered; -+}; -+ -+static struct sdio_drv_priv sdio_drvpriv = { -+ .r871xs_drv.probe = rtw_drv_init, -+ .r871xs_drv.remove = rtw_dev_remove, -+ .r871xs_drv.name = (char *)DRV_NAME, -+ .r871xs_drv.id_table = sdio_ids, -+ .r871xs_drv.drv = { -+#ifdef CONFIG_SDIO_HOOK_DEV_SHUTDOWN -+ .shutdown = rtw_dev_shutdown, -+#endif -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) -+ .pm = &rtw_sdio_pm_ops, -+#endif -+ } -+}; -+ -+static struct rtw_if_operations sdio_ops = { -+ .read = rtw_sdio_raw_read, -+ .write = rtw_sdio_raw_write, -+}; -+ -+static void sd_sync_int_hdl(struct sdio_func *func) -+{ -+ struct dvobj_priv *psdpriv; -+ -+ psdpriv = sdio_get_drvdata(func); -+ -+ if (!dvobj_get_primary_adapter(psdpriv)) { -+ RTW_INFO("%s primary adapter == NULL\n", __func__); -+ return; -+ } -+ -+ rtw_sdio_set_irq_thd(psdpriv, current); -+ sd_int_hdl(dvobj_get_primary_adapter(psdpriv)); -+ rtw_sdio_set_irq_thd(psdpriv, NULL); -+} -+ -+int sdio_alloc_irq(struct dvobj_priv *dvobj) -+{ -+ PSDIO_DATA psdio_data; -+ struct sdio_func *func; -+ int err; -+ -+ psdio_data = &dvobj->intf_data; -+ func = psdio_data->func; -+ -+ sdio_claim_host(func); -+ -+ err = sdio_claim_irq(func, &sd_sync_int_hdl); -+ if (err) { -+ dvobj->drv_dbg.dbg_sdio_alloc_irq_error_cnt++; -+ RTW_PRINT("%s: sdio_claim_irq FAIL(%d)!\n", __func__, err); -+ } else { -+ dvobj->drv_dbg.dbg_sdio_alloc_irq_cnt++; -+ dvobj->irq_alloc = 1; -+ } -+ -+ sdio_release_host(func); -+ -+ return err ? _FAIL : _SUCCESS; -+} -+ -+void sdio_free_irq(struct dvobj_priv *dvobj) -+{ -+ PSDIO_DATA psdio_data; -+ struct sdio_func *func; -+ int err; -+ -+ if (dvobj->irq_alloc) { -+ psdio_data = &dvobj->intf_data; -+ func = psdio_data->func; -+ -+ if (func) { -+ sdio_claim_host(func); -+ err = sdio_release_irq(func); -+ if (err) { -+ dvobj->drv_dbg.dbg_sdio_free_irq_error_cnt++; -+ RTW_ERR("%s: sdio_release_irq FAIL(%d)!\n", __func__, err); -+ } else -+ dvobj->drv_dbg.dbg_sdio_free_irq_cnt++; -+ sdio_release_host(func); -+ } -+ dvobj->irq_alloc = 0; -+ } -+} -+ -+#ifdef CONFIG_GPIO_WAKEUP -+extern unsigned int oob_irq; -+extern unsigned int oob_gpio; -+static irqreturn_t gpio_hostwakeup_irq_thread(int irq, void *data) -+{ -+ PADAPTER padapter = (PADAPTER)data; -+ RTW_PRINT("gpio_hostwakeup_irq_thread\n"); -+ /* Disable interrupt before calling handler */ -+ /* disable_irq_nosync(oob_irq); */ -+#ifdef CONFIG_PLATFORM_ARM_SUN6I -+ return 0; -+#else -+ return IRQ_HANDLED; -+#endif -+} -+ -+static u8 gpio_hostwakeup_alloc_irq(PADAPTER padapter) -+{ -+ int err; -+ u32 status = 0; -+ -+ if (oob_irq == 0) { -+ RTW_INFO("oob_irq ZERO!\n"); -+ return _FAIL; -+ } -+ -+ RTW_INFO("%s : oob_irq = %d\n", __func__, oob_irq); -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32)) -+ status = IRQF_NO_SUSPEND; -+#endif -+ -+ if (HIGH_ACTIVE_DEV2HST) -+ status |= IRQF_TRIGGER_RISING; -+ else -+ status |= IRQF_TRIGGER_FALLING; -+ -+ err = request_threaded_irq(oob_irq, gpio_hostwakeup_irq_thread, NULL, -+ status, "rtw_wifi_gpio_wakeup", padapter); -+ -+ if (err < 0) { -+ RTW_INFO("Oops: can't allocate gpio irq %d err:%d\n", oob_irq, err); -+ return _FALSE; -+ } else -+ RTW_INFO("allocate gpio irq %d ok\n", oob_irq); -+ -+ enable_irq_wake(oob_irq); -+ -+ return _SUCCESS; -+} -+ -+static void gpio_hostwakeup_free_irq(PADAPTER padapter) -+{ -+ wifi_free_gpio(oob_gpio); -+ -+ if (oob_irq == 0) -+ return; -+ -+ disable_irq_wake(oob_irq); -+ -+ free_irq(oob_irq, padapter); -+} -+#endif -+ -+void dump_sdio_card_info(void *sel, struct dvobj_priv *dvobj) -+{ -+ PSDIO_DATA psdio_data = &dvobj->intf_data; -+ struct mmc_card *card = psdio_data->card; -+ int i; -+ -+ RTW_PRINT_SEL(sel, "== SDIO Card Info ==\n"); -+ RTW_PRINT_SEL(sel, " card: %p\n", card); -+ RTW_PRINT_SEL(sel, " clock: %d Hz\n", psdio_data->clock); -+ -+ RTW_PRINT_SEL(sel, " timing spec: "); -+ switch (psdio_data->timing) { -+ case MMC_TIMING_LEGACY: -+ _RTW_PRINT_SEL(sel, "legacy"); -+ break; -+ case MMC_TIMING_MMC_HS: -+ _RTW_PRINT_SEL(sel, "mmc high-speed"); -+ break; -+ case MMC_TIMING_SD_HS: -+ _RTW_PRINT_SEL(sel, "sd high-speed"); -+ break; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0) -+ #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0) -+ case MMC_TIMING_UHS_SDR12: -+ _RTW_PRINT_SEL(sel, "sd uhs SDR12"); -+ break; -+ case MMC_TIMING_UHS_SDR25: -+ _RTW_PRINT_SEL(sel, "sd uhs SDR25"); -+ break; -+ #endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0) */ -+ -+ case MMC_TIMING_UHS_SDR50: -+ _RTW_PRINT_SEL(sel, "sd uhs SDR50"); -+ break; -+ -+ #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0) -+ case MMC_TIMING_MMC_DDR52: -+ _RTW_PRINT_SEL(sel, "mmc DDR52"); -+ break; -+ #endif -+ -+ case MMC_TIMING_UHS_SDR104: -+ _RTW_PRINT_SEL(sel, "sd uhs SDR104"); -+ break; -+ case MMC_TIMING_UHS_DDR50: -+ _RTW_PRINT_SEL(sel, "sd uhs DDR50"); -+ break; -+ -+ #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0) -+ case MMC_TIMING_MMC_HS200: -+ _RTW_PRINT_SEL(sel, "mmc HS200"); -+ break; -+ #endif -+ -+ #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0) -+ case MMC_TIMING_MMC_HS400: -+ _RTW_PRINT_SEL(sel, "mmc HS400"); -+ break; -+ #endif -+#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0) */ -+ default: -+ _RTW_PRINT_SEL(sel, "unknown(%d)", psdio_data->timing); -+ break; -+ } -+ _RTW_PRINT_SEL(sel, "\n"); -+ -+ RTW_PRINT_SEL(sel, " sd3_bus_mode: %s\n", (psdio_data->sd3_bus_mode) ? "TRUE" : "FALSE"); -+ -+ rtw_warn_on(card->sdio_funcs != sdio_get_num_of_func(dvobj)); -+ RTW_PRINT_SEL(sel, " func num: %u\n", card->sdio_funcs); -+ for (i = 0; card->sdio_func[i]; i++) { -+ RTW_PRINT_SEL(sel, " func%u: %p%s\n" -+ , card->sdio_func[i]->num, card->sdio_func[i] -+ , psdio_data->func == card->sdio_func[i] ? " (*)" : ""); -+ } -+ -+ RTW_PRINT_SEL(sel, "================\n"); -+} -+ -+#define SDIO_CARD_INFO_DUMP(dvobj) dump_sdio_card_info(RTW_DBGDUMP, dvobj) -+ -+#ifdef DBG_SDIO -+#if (DBG_SDIO >= 2) -+void rtw_sdio_dbg_reg_free(struct dvobj_priv *d) -+{ -+ struct sdio_data *sdio; -+ u8 *buf; -+ u32 size; -+ -+ -+ sdio = &d->intf_data; -+ -+ buf = sdio->dbg_msg; -+ size = sdio->dbg_msg_size; -+ if (buf){ -+ sdio->dbg_msg = NULL; -+ sdio->dbg_msg_size = 0; -+ rtw_mfree(buf, size); -+ } -+ -+ buf = sdio->reg_mac; -+ if (buf) { -+ sdio->reg_mac = NULL; -+ rtw_mfree(buf, 0x800); -+ } -+ -+ buf = sdio->reg_mac_ext; -+ if (buf) { -+ sdio->reg_mac_ext = NULL; -+ rtw_mfree(buf, 0x800); -+ } -+ -+ buf = sdio->reg_local; -+ if (buf) { -+ sdio->reg_local = NULL; -+ rtw_mfree(buf, 0x100); -+ } -+ -+ buf = sdio->reg_cia; -+ if (buf) { -+ sdio->reg_cia = NULL; -+ rtw_mfree(buf, 0x200); -+ } -+} -+ -+void rtw_sdio_dbg_reg_alloc(struct dvobj_priv *d) -+{ -+ struct sdio_data *sdio; -+ u8 *buf; -+ -+ -+ sdio = &d->intf_data; -+ -+ buf = _rtw_zmalloc(0x800); -+ if (buf) -+ sdio->reg_mac = buf; -+ -+ buf = _rtw_zmalloc(0x800); -+ if (buf) -+ sdio->reg_mac_ext = buf; -+ -+ buf = _rtw_zmalloc(0x100); -+ if (buf) -+ sdio->reg_local = buf; -+ -+ buf = _rtw_zmalloc(0x200); -+ if (buf) -+ sdio->reg_cia = buf; -+} -+#endif /* DBG_SDIO >= 2 */ -+ -+static void sdio_dbg_init(struct dvobj_priv *d) -+{ -+ struct sdio_data *sdio; -+ -+ -+ sdio = &d->intf_data; -+ -+ sdio->cmd52_err_cnt = 0; -+ sdio->cmd53_err_cnt = 0; -+ -+#if (DBG_SDIO >= 1) -+ sdio->reg_dump_mark = 0; -+#endif /* DBG_SDIO >= 1 */ -+ -+#if (DBG_SDIO >= 3) -+ sdio->dbg_enable = 0; -+ sdio->err_stop = 0; -+ sdio->err_test = 0; -+ sdio->err_test_triggered = 0; -+#endif /* DBG_SDIO >= 3 */ -+} -+ -+static void sdio_dbg_deinit(struct dvobj_priv *d) -+{ -+#if (DBG_SDIO >= 2) -+ rtw_sdio_dbg_reg_free(d); -+#endif /* DBG_SDIO >= 2 */ -+} -+#endif /* DBG_SDIO */ -+ -+u32 sdio_init(struct dvobj_priv *dvobj) -+{ -+ PSDIO_DATA psdio_data; -+ struct sdio_func *func; -+ int err; -+ -+ -+ psdio_data = &dvobj->intf_data; -+ func = psdio_data->func; -+ -+ /* 3 1. init SDIO bus */ -+ sdio_claim_host(func); -+ -+ err = sdio_enable_func(func); -+ if (err) { -+ dvobj->drv_dbg.dbg_sdio_init_error_cnt++; -+ RTW_PRINT("%s: sdio_enable_func FAIL(%d)!\n", __func__, err); -+ goto release; -+ } -+ -+ err = sdio_set_block_size(func, 512); -+ if (err) { -+ dvobj->drv_dbg.dbg_sdio_init_error_cnt++; -+ RTW_PRINT("%s: sdio_set_block_size FAIL(%d)!\n", __func__, err); -+ goto release; -+ } -+ psdio_data->block_transfer_len = 512; -+ psdio_data->tx_block_mode = 1; -+ psdio_data->rx_block_mode = 1; -+ -+ psdio_data->card = func->card; -+ psdio_data->timing = func->card->host->ios.timing; -+ psdio_data->clock = func->card->host->ios.clock; -+ psdio_data->func_number = func->card->sdio_funcs; -+ -+ psdio_data->sd3_bus_mode = _FALSE; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0) -+ if (psdio_data->timing <= MMC_TIMING_UHS_DDR50 -+ #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0) -+ && psdio_data->timing >= MMC_TIMING_UHS_SDR12 -+ #else -+ && psdio_data->timing >= MMC_TIMING_UHS_SDR50 -+ #endif -+ ) -+ psdio_data->sd3_bus_mode = _TRUE; -+#endif -+ -+#ifdef DBG_SDIO -+ sdio_dbg_init(dvobj); -+#endif /* DBG_SDIO */ -+ -+ SDIO_CARD_INFO_DUMP(dvobj); -+ -+ -+release: -+ sdio_release_host(func); -+ -+ if (err) -+ return _FAIL; -+ return _SUCCESS; -+} -+ -+void sdio_deinit(struct dvobj_priv *dvobj) -+{ -+ struct sdio_func *func; -+ int err; -+ -+ -+ -+ func = dvobj->intf_data.func; -+ -+ if (func) { -+ sdio_claim_host(func); -+ err = sdio_disable_func(func); -+ if (err) { -+ dvobj->drv_dbg.dbg_sdio_deinit_error_cnt++; -+ RTW_ERR("%s: sdio_disable_func(%d)\n", __func__, err); -+ } -+ -+ sdio_release_host(func); -+ } -+ -+#ifdef DBG_SDIO -+ sdio_dbg_deinit(dvobj); -+#endif /* DBG_SDIO */ -+} -+ -+u8 sdio_get_num_of_func(struct dvobj_priv *dvobj) -+{ -+ return dvobj->intf_data.func_number; -+} -+ -+static void rtw_decide_chip_type_by_device_id(struct dvobj_priv *dvobj, const struct sdio_device_id *pdid) -+{ -+ dvobj->chip_type = pdid->driver_data; -+ -+#if defined(CONFIG_RTL8188E) -+ if (dvobj->chip_type == RTL8188E) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8188ES; -+ RTW_INFO("CHIP TYPE: RTL8188E\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8723B) -+ if (dvobj->chip_type == RTL8723B) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8723BS; -+ RTW_INFO("CHIP TYPE: RTL8723B\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8821A) -+ if (dvobj->chip_type == RTL8821) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8821S; -+ RTW_INFO("CHIP TYPE: RTL8821A\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8192E) -+ if (dvobj->chip_type == RTL8192E) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8192ES; -+ RTW_INFO("CHIP TYPE: RTL8192E\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8703B) -+ if (dvobj->chip_type == RTL8703B) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8703BS; -+ RTW_INFO("CHIP TYPE: RTL8703B\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8723D) -+ if (dvobj->chip_type == RTL8723D) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8723DS; -+ RTW_INFO("CHIP TYPE: RTL8723D\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8188F) -+ if (dvobj->chip_type == RTL8188F) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8188FS; -+ RTW_INFO("CHIP TYPE: RTL8188F\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8188GTV) -+ if (dvobj->chip_type == RTL8188GTV) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8188GTVS; -+ RTW_INFO("CHIP TYPE: RTL8188GTV\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8822B) -+ if (dvobj->chip_type == RTL8822B) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8822BS; -+ RTW_INFO("CHIP TYPE: RTL8822B\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8821C) -+ if (dvobj->chip_type == RTL8821C) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8821CS; -+ RTW_INFO("CHIP TYPE: RTL8821C\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8192F) -+ if (dvobj->chip_type == RTL8192F) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8192FS; -+ RTW_INFO("CHIP TYPE: RTL8192F\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8822C) -+ if (dvobj->chip_type == RTL8822C) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8822CS; -+ RTW_INFO("CHIP TYPE: RTL8822C\n"); -+ } -+#endif -+ -+#if defined(CONFIG_RTL8723F) -+ if (dvobj->chip_type == RTL8723F) { -+ dvobj->HardwareType = HARDWARE_TYPE_RTL8723FS; -+ RTW_INFO("CHIP TYPE: RTL8723F\n"); -+ } -+#endif -+} -+ -+static struct dvobj_priv *sdio_dvobj_init(struct sdio_func *func, const struct sdio_device_id *pdid) -+{ -+ int status = _FAIL; -+ struct dvobj_priv *dvobj = NULL; -+ PSDIO_DATA psdio; -+ -+ dvobj = devobj_init(); -+ if (dvobj == NULL) -+ goto exit; -+ dvobj->intf_ops = &sdio_ops; -+ -+ sdio_set_drvdata(func, dvobj); -+ -+ psdio = &dvobj->intf_data; -+ psdio->func = func; -+ -+ if (sdio_init(dvobj) != _SUCCESS) { -+ goto free_dvobj; -+ } -+ -+ dvobj->interface_type = RTW_SDIO; -+ rtw_decide_chip_type_by_device_id(dvobj, pdid); -+ -+ rtw_reset_continual_io_error(dvobj); -+ status = _SUCCESS; -+ -+free_dvobj: -+ if (status != _SUCCESS && dvobj) { -+ sdio_set_drvdata(func, NULL); -+ -+ devobj_deinit(dvobj); -+ -+ dvobj = NULL; -+ } -+exit: -+ return dvobj; -+} -+ -+static void sdio_dvobj_deinit(struct sdio_func *func) -+{ -+ struct dvobj_priv *dvobj = sdio_get_drvdata(func); -+ -+ sdio_set_drvdata(func, NULL); -+ if (dvobj) { -+ sdio_deinit(dvobj); -+ sdio_free_irq(dvobj); -+ devobj_deinit(dvobj); -+ } -+ -+ return; -+} -+ -+u8 rtw_set_hal_ops(PADAPTER padapter) -+{ -+ /* alloc memory for HAL DATA */ -+ if (rtw_hal_data_init(padapter) == _FAIL) -+ return _FAIL; -+ -+#if defined(CONFIG_RTL8188E) -+ if (rtw_get_chip_type(padapter) == RTL8188E) -+ rtl8188es_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8723B) -+ if (rtw_get_chip_type(padapter) == RTL8723B) -+ rtl8723bs_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8821A) -+ if (rtw_get_chip_type(padapter) == RTL8821) -+ rtl8821as_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8192E) -+ if (rtw_get_chip_type(padapter) == RTL8192E) -+ rtl8192es_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8703B) -+ if (rtw_get_chip_type(padapter) == RTL8703B) -+ rtl8703bs_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8723D) -+ if (rtw_get_chip_type(padapter) == RTL8723D) -+ rtl8723ds_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8188F) -+ if (rtw_get_chip_type(padapter) == RTL8188F) -+ rtl8188fs_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8188GTV) -+ if (rtw_get_chip_type(padapter) == RTL8188GTV) -+ rtl8188gtvs_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8822B) -+ if (rtw_get_chip_type(padapter) == RTL8822B) -+ rtl8822bs_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8821C) -+ if (rtw_get_chip_type(padapter) == RTL8821C) { -+ if (rtl8821cs_set_hal_ops(padapter) == _FAIL) -+ return _FAIL; -+ } -+#endif -+ -+#if defined(CONFIG_RTL8192F) -+ if (rtw_get_chip_type(padapter) == RTL8192F) -+ rtl8192fs_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8822C) -+ if (rtw_get_chip_type(padapter) == RTL8822C) -+ rtl8822cs_set_hal_ops(padapter); -+#endif -+ -+#if defined(CONFIG_RTL8723F) -+ if (rtw_get_chip_type(padapter) == RTL8723F) -+ rtl8723fs_set_hal_ops(padapter); -+#endif -+ -+ if (rtw_hal_ops_check(padapter) == _FAIL) -+ return _FAIL; -+ -+ if (hal_spec_init(padapter) == _FAIL) -+ return _FAIL; -+ -+ return _SUCCESS; -+} -+ -+static void sd_intf_start(PADAPTER padapter) -+{ -+ if (padapter == NULL) { -+ RTW_ERR("%s: padapter is NULL!\n", __func__); -+ return; -+ } -+ -+ /* hal dep */ -+ rtw_hal_enable_interrupt(padapter); -+} -+ -+static void sd_intf_stop(PADAPTER padapter) -+{ -+ if (padapter == NULL) { -+ RTW_ERR("%s: padapter is NULL!\n", __func__); -+ return; -+ } -+ -+ /* hal dep */ -+ rtw_hal_disable_interrupt(padapter); -+} -+ -+ -+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN -+PADAPTER g_test_adapter = NULL; -+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */ -+ -+_adapter *rtw_sdio_primary_adapter_init(struct dvobj_priv *dvobj) -+{ -+ int status = _FAIL; -+ PADAPTER padapter = NULL; -+ PSDIO_DATA psdio = &dvobj->intf_data; -+ struct device_node *np = psdio->func->dev.of_node; -+ const unsigned char *addr; -+ int len; -+ -+ padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter)); -+ if (padapter == NULL) -+ goto exit; -+ -+ if (loadparam(padapter) != _SUCCESS) -+ goto free_adapter; -+ -+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN -+ g_test_adapter = padapter; -+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */ -+ padapter->dvobj = dvobj; -+ -+ rtw_set_drv_stopped(padapter);/*init*/ -+ -+ dvobj->padapters[dvobj->iface_nums++] = padapter; -+ padapter->iface_id = IFACE_ID0; -+ -+ /* set adapter_type/iface type for primary padapter */ -+ padapter->isprimary = _TRUE; -+ padapter->adapter_type = PRIMARY_ADAPTER; -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ padapter->hw_port = HW_PORT0; -+#else -+ padapter->hw_port = HW_PORT0; -+#endif -+ -+ /* 3 3. init driver special setting, interface, OS and hardware relative */ -+ -+ /* 4 3.1 set hardware operation functions */ -+ if (rtw_set_hal_ops(padapter) == _FAIL) -+ goto free_hal_data; -+ -+ /* 3 5. initialize Chip version */ -+ padapter->intf_start = &sd_intf_start; -+ padapter->intf_stop = &sd_intf_stop; -+ -+ if (rtw_init_io_priv(padapter, sdio_set_intf_ops) == _FAIL) { -+ goto free_hal_data; -+ } -+ -+ rtw_hal_read_chip_version(padapter); -+ -+ rtw_hal_chip_configure(padapter); -+ -+#ifdef CONFIG_BT_COEXIST -+ rtw_btcoex_Initialize(padapter); -+#endif -+ rtw_btcoex_wifionly_initialize(padapter); -+ -+ /* 3 6. read efuse/eeprom data */ -+ if (rtw_hal_read_chip_info(padapter) == _FAIL) -+ goto free_hal_data; -+ -+ /* 3 7. init driver common data */ -+ if (rtw_init_drv_sw(padapter) == _FAIL) { -+ goto free_hal_data; -+ } -+ -+ /* 3 8. get WLan MAC address */ -+ if (np && (addr = of_get_property(np, "local-mac-address", &len)) && len == ETH_ALEN) { -+ memcpy(adapter_mac_addr(padapter), addr, ETH_ALEN); -+ } else { -+ rtw_macaddr_cfg(adapter_mac_addr(padapter), get_hal_mac_addr(padapter)); -+ } -+ -+#ifdef CONFIG_MI_WITH_MBSSID_CAM -+ rtw_mbid_camid_alloc(padapter, adapter_mac_addr(padapter)); -+#endif -+#ifdef CONFIG_P2P -+ rtw_init_wifidirect_addrs(padapter, adapter_mac_addr(padapter), adapter_mac_addr(padapter)); -+#endif /* CONFIG_P2P */ -+ -+ rtw_hal_disable_interrupt(padapter); -+ -+ RTW_INFO("bDriverStopped:%s, bSurpriseRemoved:%s, bup:%d, hw_init_completed:%d\n" -+ , rtw_is_drv_stopped(padapter) ? "True" : "False" -+ , rtw_is_surprise_removed(padapter) ? "True" : "False" -+ , padapter->bup -+ , rtw_get_hw_init_completed(padapter) -+ ); -+ -+ status = _SUCCESS; -+ -+free_hal_data: -+ if (status != _SUCCESS && padapter->HalData) -+ rtw_hal_free_data(padapter); -+ -+free_adapter: -+ if (status != _SUCCESS && padapter) { -+ #ifdef RTW_HALMAC -+ rtw_halmac_deinit_adapter(dvobj); -+ #endif -+ rtw_vmfree((u8 *)padapter, sizeof(*padapter)); -+ padapter = NULL; -+ } -+exit: -+ return padapter; -+} -+ -+static void rtw_sdio_primary_adapter_deinit(_adapter *padapter) -+{ -+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -+ -+ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) -+ rtw_disassoc_cmd(padapter, 0, RTW_CMDF_DIRECTLY); -+ -+#ifdef CONFIG_AP_MODE -+ if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) { -+ free_mlme_ap_info(padapter); -+ #ifdef CONFIG_HOSTAPD_MLME -+ hostapd_mode_unload(padapter); -+ #endif -+ } -+#endif -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#ifdef CONFIG_PLATFORM_ARM_SUN6I -+ sw_gpio_eint_set_enable(gpio_eint_wlan, 0); -+ sw_gpio_irq_free(eint_wlan_handle); -+#else -+ gpio_hostwakeup_free_irq(padapter); -+#endif -+#endif -+ -+ /*rtw_cancel_all_timer(if1);*/ -+ -+#ifdef CONFIG_WOWLAN -+ adapter_to_pwrctl(padapter)->wowlan_mode = _FALSE; -+ RTW_PRINT("%s wowlan_mode:%d\n", __func__, adapter_to_pwrctl(padapter)->wowlan_mode); -+#endif /* CONFIG_WOWLAN */ -+ -+ rtw_dev_unload(padapter); -+ RTW_INFO("+r871xu_dev_remove, hw_init_completed=%d\n", rtw_get_hw_init_completed(padapter)); -+ -+ rtw_free_drv_sw(padapter); -+ -+ /* TODO: use rtw_os_ndevs_deinit instead at the first stage of driver's dev deinit function */ -+ rtw_os_ndev_free(padapter); -+ -+#ifdef RTW_HALMAC -+ rtw_halmac_deinit_adapter(adapter_to_dvobj(padapter)); -+#endif /* RTW_HALMAC */ -+ -+ rtw_vmfree((u8 *)padapter, sizeof(_adapter)); -+ -+#ifdef CONFIG_PLATFORM_RTD2880B -+ RTW_INFO("wlan link down\n"); -+ rtd2885_wlan_netlink_sendMsg("linkdown", "8712"); -+#endif -+ -+#ifdef RTW_SUPPORT_PLATFORM_SHUTDOWN -+ g_test_adapter = NULL; -+#endif /* RTW_SUPPORT_PLATFORM_SHUTDOWN */ -+} -+ -+/* -+ * drv_init() - a device potentially for us -+ * -+ * notes: drv_init() is called when the bus driver has located a card for us to support. -+ * We accept the new device by returning 0. -+ */ -+static int rtw_drv_init( -+ struct sdio_func *func, -+ const struct sdio_device_id *id) -+{ -+ int status = _FAIL; -+#ifdef CONFIG_CONCURRENT_MODE -+ int i; -+#endif -+ PADAPTER padapter = NULL; -+ struct dvobj_priv *dvobj; -+#ifdef CONFIG_OF -+ struct device_node *np; -+#endif -+ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+ -+#ifdef CONFIG_ACPI -+ acpi_handle handle; -+ struct acpi_device *adev; -+#endif -+#if defined(CONFIG_ACPI) && defined(CONFIG_GPIO_WAKEUP) -+ handle = ACPI_HANDLE(&func->dev); -+ -+ if (handle) { -+ /* Dont try to do acpi pm for the wifi module */ -+ if (!handle || acpi_bus_get_device(handle, &adev)) -+ RTW_INFO("Could not get acpi pointer!\n"); -+ else { -+ adev->flags.power_manageable = 0; -+ RTW_INFO("Disabling ACPI power management support!\n"); -+ } -+ oob_gpio = acpi_get_gpio_by_index(&func->dev, 0, NULL); -+ RTW_INFO("rtw_drv_init: ACPI_HANDLE found oob_gpio %d!\n", oob_gpio); -+ wifi_configure_gpio(); -+ } else -+ RTW_INFO("rtw_drv_init: ACPI_HANDLE NOT found!\n"); -+#endif -+ -+#if defined(CONFIG_ACPI) -+ if (&func->dev && ACPI_HANDLE(&func->dev)) { -+ wlan_en_gpio = acpi_get_gpio_by_index(&func->dev, 1, NULL); -+ RTW_INFO("rtw_drv_init: ACPI_HANDLE found wlan_en %d!\n", wlan_en_gpio); -+ } else -+ RTW_INFO("rtw_drv_init: ACPI_HANDLE NOT found!\n"); -+#endif -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ -+#ifdef CONFIG_OF -+ np = func->dev.of_node; -+ if (np) { -+ /* make sure there are interrupts defined in the node */ -+ if (of_find_property(np, "interrupts", NULL)) -+ oob_irq = irq_of_parse_and_map(np, 0); -+ } -+#endif -+ -+ dvobj = sdio_dvobj_init(func, id); -+ if (dvobj == NULL) { -+ goto exit; -+ } -+ -+ padapter = rtw_sdio_primary_adapter_init(dvobj); -+ if (padapter == NULL) { -+ RTW_INFO("rtw_init_primary_adapter Failed!\n"); -+ goto free_dvobj; -+ } -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ if (padapter->registrypriv.virtual_iface_num > (CONFIG_IFACE_NUMBER - 1)) -+ padapter->registrypriv.virtual_iface_num = (CONFIG_IFACE_NUMBER - 1); -+ -+ for (i = 0; i < padapter->registrypriv.virtual_iface_num; i++) { -+ if (rtw_drv_add_vir_if(padapter, sdio_set_intf_ops) == NULL) { -+ RTW_INFO("rtw_drv_add_iface failed! (%d)\n", i); -+ goto free_if_vir; -+ } -+ } -+#endif -+ -+ /* dev_alloc_name && register_netdev */ -+ if (rtw_os_ndevs_init(dvobj) != _SUCCESS) -+ goto free_if_vir; -+ -+#ifdef CONFIG_HOSTAPD_MLME -+ hostapd_mode_init(padapter); -+#endif -+ -+#ifdef CONFIG_PLATFORM_RTD2880B -+ RTW_INFO("wlan link up\n"); -+ rtd2885_wlan_netlink_sendMsg("linkup", "8712"); -+#endif -+ -+ if (sdio_alloc_irq(dvobj) != _SUCCESS) -+ goto os_ndevs_deinit; -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#ifdef CONFIG_PLATFORM_ARM_SUN6I -+ eint_wlan_handle = sw_gpio_irq_request(gpio_eint_wlan, TRIG_EDGE_NEGATIVE, (peint_handle)gpio_hostwakeup_irq_thread, NULL); -+ if (!eint_wlan_handle) { -+ RTW_INFO("%s: request irq failed\n", __func__); -+ return -1; -+ } -+#else -+ gpio_hostwakeup_alloc_irq(padapter); -+#endif -+#endif -+ -+#ifdef CONFIG_GLOBAL_UI_PID -+ if (ui_pid[1] != 0) { -+ RTW_INFO("ui_pid[1]:%d\n", ui_pid[1]); -+ rtw_signal_process(ui_pid[1], SIGUSR2); -+ } -+#endif -+ -+ -+ status = _SUCCESS; -+ -+os_ndevs_deinit: -+ if (status != _SUCCESS) -+ rtw_os_ndevs_deinit(dvobj); -+free_if_vir: -+ if (status != _SUCCESS) { -+ #ifdef CONFIG_CONCURRENT_MODE -+ rtw_drv_stop_vir_ifaces(dvobj); -+ rtw_drv_free_vir_ifaces(dvobj); -+ #endif -+ } -+ -+ if (status != _SUCCESS && padapter) -+ rtw_sdio_primary_adapter_deinit(padapter); -+ -+free_dvobj: -+ if (status != _SUCCESS) -+ sdio_dvobj_deinit(func); -+exit: -+ return status == _SUCCESS ? 0 : -ENODEV; -+} -+ -+static void rtw_dev_remove(struct sdio_func *func) -+{ -+ struct dvobj_priv *dvobj = sdio_get_drvdata(func); -+ struct pwrctrl_priv *pwrctl = dvobj_to_pwrctl(dvobj); -+ PADAPTER padapter = dvobj_get_primary_adapter(dvobj); -+ -+ -+ -+ dvobj->processing_dev_remove = _TRUE; -+ -+ /* TODO: use rtw_os_ndevs_deinit instead at the first stage of driver's dev deinit function */ -+ rtw_os_ndevs_unregister(dvobj); -+ -+ if (!rtw_is_surprise_removed(padapter)) { -+ int err; -+ -+ /* test surprise remove */ -+ sdio_claim_host(func); -+ sdio_readb(func, 0, &err); -+ sdio_release_host(func); -+ if (err == -ENOMEDIUM) { -+ rtw_set_surprise_removed(padapter); -+ RTW_INFO("%s: device had been removed!\n", __func__); -+ } -+ } -+ -+#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) -+ rtw_unregister_early_suspend(pwrctl); -+#endif -+ -+ if (GET_HAL_DATA(padapter)->bFWReady == _TRUE) { -+ rtw_ps_deny(padapter, PS_DENY_DRV_REMOVE); -+ rtw_pm_set_ips(padapter, IPS_NONE); -+ rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); -+ LeaveAllPowerSaveMode(padapter); -+ } -+ rtw_set_drv_stopped(padapter); /*for stop thread*/ -+ rtw_stop_cmd_thread(padapter); -+#ifdef CONFIG_CONCURRENT_MODE -+ rtw_drv_stop_vir_ifaces(dvobj); -+#endif -+ -+#ifdef CONFIG_BT_COEXIST -+#ifdef CONFIG_BT_COEXIST_SOCKET_TRX -+ if (GET_HAL_DATA(padapter)->EEPROMBluetoothCoexist) -+ rtw_btcoex_close_socket(padapter); -+#endif -+ rtw_btcoex_HaltNotify(padapter); -+#endif -+ -+ rtw_sdio_primary_adapter_deinit(padapter); -+ -+#ifdef CONFIG_CONCURRENT_MODE -+ rtw_drv_free_vir_ifaces(dvobj); -+#endif -+ -+ sdio_dvobj_deinit(func); -+ -+ -+} -+ -+#ifdef CONFIG_SDIO_HOOK_DEV_SHUTDOWN -+static void rtw_dev_shutdown(struct device *dev) -+{ -+ struct sdio_func *func = dev_to_sdio_func(dev); -+ -+ if (func == NULL) -+ return; -+ -+ RTW_INFO("==> %s !\n", __func__); -+ -+ rtw_dev_remove(func); -+ -+ RTW_INFO("<== %s !\n", __func__); -+} -+#endif -+ -+extern int pm_netdev_open(struct net_device *pnetdev, u8 bnormal); -+extern int pm_netdev_close(struct net_device *pnetdev, u8 bnormal); -+ -+static int rtw_sdio_suspend(struct device *dev) -+{ -+ struct sdio_func *func = dev_to_sdio_func(dev); -+ struct dvobj_priv *psdpriv; -+ struct pwrctrl_priv *pwrpriv = NULL; -+ _adapter *padapter = NULL; -+ struct debug_priv *pdbgpriv = NULL; -+ int ret = 0; -+#ifdef CONFIG_RTW_SDIO_PM_KEEP_POWER -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34)) -+ mmc_pm_flag_t pm_flag = 0; -+#endif -+#endif -+ -+ if (dev == NULL) -+ goto exit; -+ -+ psdpriv = sdio_get_drvdata(func); -+ if (psdpriv == NULL) -+ goto exit; -+ -+ pwrpriv = dvobj_to_pwrctl(psdpriv); -+ padapter = dvobj_get_primary_adapter(psdpriv); -+ pdbgpriv = &psdpriv->drv_dbg; -+ if (rtw_is_drv_stopped(padapter)) { -+ RTW_INFO("%s bDriverStopped == _TRUE\n", __func__); -+ goto exit; -+ } -+ -+ if (pwrpriv->bInSuspend == _TRUE) { -+ RTW_INFO("%s bInSuspend = %d\n", __func__, pwrpriv->bInSuspend); -+ pdbgpriv->dbg_suspend_error_cnt++; -+ goto exit; -+ } -+ -+ ret = rtw_suspend_common(padapter); -+ -+#ifdef CONFIG_RTW_SDIO_PM_KEEP_POWER -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34)) -+ /* Android 4.0 don't support WIFI close power */ -+ /* or power down or clock will close after wifi resume, */ -+ /* this is sprd's bug in Android 4.0, but sprd don't */ -+ /* want to fix it. */ -+ /* we have test power under 8723as, power consumption is ok */ -+ pm_flag = sdio_get_host_pm_caps(func); -+ RTW_INFO("cmd: %s: suspend: PM flag = 0x%x\n", sdio_func_id(func), pm_flag); -+ if (!(pm_flag & MMC_PM_KEEP_POWER)) { -+ RTW_INFO("%s: cannot remain alive while host is suspended\n", sdio_func_id(func)); -+ if (pdbgpriv) -+ pdbgpriv->dbg_suspend_error_cnt++; -+ return -ENOSYS; -+ } else { -+ RTW_INFO("cmd: suspend with MMC_PM_KEEP_POWER\n"); -+ sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); -+ } -+#endif -+#endif -+exit: -+ return ret; -+} -+int rtw_resume_process(_adapter *padapter) -+{ -+ struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); -+ struct dvobj_priv *psdpriv = padapter->dvobj; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ -+ if (pwrpriv->bInSuspend == _FALSE) { -+ pdbgpriv->dbg_resume_error_cnt++; -+ RTW_INFO("%s bInSuspend = %d\n", __FUNCTION__, pwrpriv->bInSuspend); -+ return -1; -+ } -+ -+ return rtw_resume_common(padapter); -+} -+ -+static int rtw_sdio_resume(struct device *dev) -+{ -+ struct sdio_func *func = dev_to_sdio_func(dev); -+ struct dvobj_priv *psdpriv = sdio_get_drvdata(func); -+ struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(psdpriv); -+ _adapter *padapter = dvobj_get_primary_adapter(psdpriv); -+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -+ int ret = 0; -+ struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; -+ -+ RTW_INFO("==> %s (%s:%d)\n", __FUNCTION__, current->comm, current->pid); -+ -+ pdbgpriv->dbg_resume_cnt++; -+ -+#ifdef CONFIG_PLATFORM_ROCKCHIPS -+ if (0) -+#else -+ if (pwrpriv->wowlan_mode || pwrpriv->wowlan_ap_mode) -+#endif -+ { -+ rtw_resume_lock_suspend(); -+ ret = rtw_resume_process(padapter); -+ rtw_resume_unlock_suspend(); -+ } else { -+#ifdef CONFIG_RESUME_IN_WORKQUEUE -+ rtw_resume_in_workqueue(pwrpriv); -+#else -+ if (rtw_is_earlysuspend_registered(pwrpriv)) { -+ /* jeff: bypass resume here, do in late_resume */ -+ rtw_set_do_late_resume(pwrpriv, _TRUE); -+ } else { -+ rtw_resume_lock_suspend(); -+ ret = rtw_resume_process(padapter); -+ rtw_resume_unlock_suspend(); -+ } -+#endif -+ } -+ pmlmeext->last_scan_time = rtw_get_current_time(); -+ RTW_INFO("<======== %s return %d\n", __FUNCTION__, ret); -+ return ret; -+ -+} -+ -+static int rtw_drv_entry(void) -+{ -+ int ret = 0; -+ -+ RTW_PRINT("module init start\n"); -+ dump_drv_version(RTW_DBGDUMP); -+#ifdef BTCOEXVERSION -+ RTW_PRINT(DRV_NAME" BT-Coex version = %s\n", BTCOEXVERSION); -+#endif /* BTCOEXVERSION */ -+ -+#ifndef CONFIG_PLATFORM_INTEL_BYT -+ rtw_android_wifictrl_func_add(); -+#endif /* !CONFIG_PLATFORM_INTEL_BYT */ -+ -+ ret = platform_wifi_power_on(); -+ if (ret) { -+ RTW_INFO("%s: power on failed!!(%d)\n", __FUNCTION__, ret); -+ ret = -1; -+ goto exit; -+ } -+ -+ sdio_drvpriv.drv_registered = _TRUE; -+ rtw_suspend_lock_init(); -+ rtw_drv_proc_init(); -+ rtw_nlrtw_init(); -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ cmap_intfs_init(); -+#endif -+ rtw_ndev_notifier_register(); -+ rtw_inetaddr_notifier_register(); -+ -+ ret = sdio_register_driver(&sdio_drvpriv.r871xs_drv); -+ if (ret != 0) { -+ sdio_drvpriv.drv_registered = _FALSE; -+ rtw_suspend_lock_uninit(); -+ rtw_drv_proc_deinit(); -+ rtw_nlrtw_deinit(); -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ cmap_intfs_deinit(); -+#endif -+ rtw_ndev_notifier_unregister(); -+ rtw_inetaddr_notifier_unregister(); -+ RTW_INFO("%s: register driver failed!!(%d)\n", __FUNCTION__, ret); -+ goto poweroff; -+ } -+ -+ goto exit; -+ -+poweroff: -+ platform_wifi_power_off(); -+ -+exit: -+ RTW_PRINT("module init ret=%d\n", ret); -+ return ret; -+} -+ -+static void rtw_drv_halt(void) -+{ -+ RTW_PRINT("module exit start\n"); -+ -+ sdio_drvpriv.drv_registered = _FALSE; -+ -+ sdio_unregister_driver(&sdio_drvpriv.r871xs_drv); -+ -+ rtw_android_wifictrl_func_del(); -+ -+ platform_wifi_power_off(); -+ -+ rtw_suspend_lock_uninit(); -+ rtw_drv_proc_deinit(); -+ rtw_nlrtw_deinit(); -+#ifdef CONFIG_PLATFORM_CMAP_INTFS -+ cmap_intfs_deinit(); -+#endif -+ rtw_ndev_notifier_unregister(); -+ rtw_inetaddr_notifier_unregister(); -+ -+ RTW_PRINT("module exit success\n"); -+ -+ rtw_mstat_dump(RTW_DBGDUMP); -+} -+ -+#ifdef CONFIG_PLATFORM_INTEL_BYT -+int rtw_sdio_set_power(int on) -+{ -+ -+ if (wlan_en_gpio >= 0) { -+ if (on) -+ gpio_set_value(wlan_en_gpio, 1); -+ else -+ gpio_set_value(wlan_en_gpio, 0); -+ } -+ -+ return 0; -+} -+#endif /* CONFIG_PLATFORM_INTEL_BYT */ -+ -+module_init(rtw_drv_entry); -+module_exit(rtw_drv_halt); -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/sdio_ops_linux.c b/drivers/staging/rtl8723cs/os_dep/linux/sdio_ops_linux.c -new file mode 100644 -index 000000000000..af6a9636ec37 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/sdio_ops_linux.c -@@ -0,0 +1,1347 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2019 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _SDIO_OPS_LINUX_C_ -+ -+#include -+ -+inline bool rtw_is_sdio30(_adapter *adapter) -+{ -+ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); -+ PSDIO_DATA psdio_data = &dvobj->intf_data; -+ -+ return (psdio_data->sd3_bus_mode) ? _TRUE : _FALSE; -+} -+ -+static bool rtw_sdio_claim_host_needed(struct sdio_func *func) -+{ -+ struct dvobj_priv *dvobj = sdio_get_drvdata(func); -+ PSDIO_DATA sdio_data = &dvobj->intf_data; -+ -+ if (sdio_data->sys_sdio_irq_thd && sdio_data->sys_sdio_irq_thd == current) -+ return _FALSE; -+ return _TRUE; -+} -+ -+inline void rtw_sdio_set_irq_thd(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl) -+{ -+ PSDIO_DATA sdio_data = &dvobj->intf_data; -+ -+ sdio_data->sys_sdio_irq_thd = thd_hdl; -+} -+#ifndef RTW_HALMAC -+u8 sd_f0_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ u8 v = 0; -+ struct sdio_func *func; -+ bool claim_needed; -+ -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return v; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ v = sdio_f0_readb(func, addr, err); -+ if (claim_needed) -+ sdio_release_host(func); -+ if (err && *err) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x\n", __func__, *err, addr); -+ -+ -+ return v; -+} -+ -+void sd_f0_write8(struct intf_hdl *pintfhdl, u32 addr, u8 v, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ struct sdio_func *func; -+ bool claim_needed; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ sdio_f0_writeb(func, v, addr, err); -+ if (claim_needed) -+ sdio_release_host(func); -+ if (err && *err) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x val=0x%02x\n", __func__, *err, addr, v); -+ -+} -+ -+/* -+ * Return: -+ * 0 Success -+ * others Fail -+ */ -+s32 _sd_cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ int err = 0, i; -+ struct sdio_func *func; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return err; -+ } -+ -+ func = psdio->func; -+ -+ for (i = 0; i < cnt; i++) { -+ pdata[i] = sdio_readb(func, addr + i, &err); -+ if (err) { -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x\n", __func__, err, addr + i); -+ break; -+ } -+ } -+ -+ -+ return err; -+} -+ -+/* -+ * Return: -+ * 0 Success -+ * others Fail -+ */ -+s32 sd_cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ int err = 0, i; -+ struct sdio_func *func; -+ bool claim_needed; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return err; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ err = _sd_cmd52_read(pintfhdl, addr, cnt, pdata); -+ if (claim_needed) -+ sdio_release_host(func); -+ -+ -+ return err; -+} -+ -+/* -+ * Return: -+ * 0 Success -+ * others Fail -+ */ -+s32 _sd_cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ int err = 0, i; -+ struct sdio_func *func; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return err; -+ } -+ -+ func = psdio->func; -+ -+ for (i = 0; i < cnt; i++) { -+ sdio_writeb(func, pdata[i], addr + i, &err); -+ if (err) { -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x val=0x%02x\n", __func__, err, addr + i, pdata[i]); -+ break; -+ } -+ } -+ -+ -+ return err; -+} -+ -+/* -+ * Return: -+ * 0 Success -+ * others Fail -+ */ -+s32 sd_cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ int err = 0, i; -+ struct sdio_func *func; -+ bool claim_needed; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return err; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ err = _sd_cmd52_write(pintfhdl, addr, cnt, pdata); -+ if (claim_needed) -+ sdio_release_host(func); -+ -+ -+ return err; -+} -+ -+u8 _sd_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ u8 v = 0; -+ struct sdio_func *func; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return v; -+ } -+ -+ func = psdio->func; -+ -+ v = sdio_readb(func, addr, err); -+ -+ if (err && *err) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x\n", __func__, *err, addr); -+ -+ -+ return v; -+} -+ -+u8 sd_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ u8 v = 0; -+ struct sdio_func *func; -+ bool claim_needed; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return v; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ v = sdio_readb(func, addr, err); -+ if (claim_needed) -+ sdio_release_host(func); -+ if (err && *err) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x\n", __func__, *err, addr); -+ -+ -+ return v; -+} -+ -+u16 sd_read16(struct intf_hdl *pintfhdl, u32 addr, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ u16 v = 0; -+ struct sdio_func *func; -+ bool claim_needed; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return v; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ v = sdio_readw(func, addr, err); -+ if (claim_needed) -+ sdio_release_host(func); -+ if (err && *err) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x\n", __func__, *err, addr); -+ -+ -+ return v; -+} -+ -+u32 _sd_read32(struct intf_hdl *pintfhdl, u32 addr, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ u32 v = 0; -+ struct sdio_func *func; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return v; -+ } -+ -+ func = psdio->func; -+ -+ v = sdio_readl(func, addr, err); -+ -+ if (err && *err) { -+ int i; -+ -+ RTW_ERR("%s: (%d) addr=0x%05x, val=0x%x\n", __func__, *err, addr, v); -+ -+ *err = 0; -+ for (i = 0; i < SD_IO_TRY_CNT; i++) { -+ /* sdio_claim_host(func); */ -+ v = sdio_readl(func, addr, err); -+ /* sdio_release_host(func); */ -+ if (*err == 0) { -+ rtw_reset_continual_io_error(psdiodev); -+ break; -+ } else { -+ RTW_ERR("%s: (%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ if ((-ESHUTDOWN == *err) || (-ENODEV == *err)) -+ rtw_set_surprise_removed(padapter); -+ -+ if (rtw_inc_and_chk_continual_io_error(psdiodev) == _TRUE) { -+ rtw_set_surprise_removed(padapter); -+ break; -+ } -+ -+ } -+ } -+ -+ if (i == SD_IO_TRY_CNT) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ else -+ RTW_ERR("%s: (%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ -+ } -+ -+ -+ return v; -+} -+ -+u32 sd_read32(struct intf_hdl *pintfhdl, u32 addr, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ u32 v = 0; -+ struct sdio_func *func; -+ bool claim_needed; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return v; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ v = sdio_readl(func, addr, err); -+ if (claim_needed) -+ sdio_release_host(func); -+ -+ if (err && *err) { -+ int i; -+ -+ RTW_ERR("%s: (%d) addr=0x%05x, val=0x%x\n", __func__, *err, addr, v); -+ -+ *err = 0; -+ for (i = 0; i < SD_IO_TRY_CNT; i++) { -+ if (claim_needed) -+ sdio_claim_host(func); -+ v = sdio_readl(func, addr, err); -+ if (claim_needed) -+ sdio_release_host(func); -+ -+ if (*err == 0) { -+ rtw_reset_continual_io_error(psdiodev); -+ break; -+ } else { -+ RTW_ERR("%s: (%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ if ((-ESHUTDOWN == *err) || (-ENODEV == *err)) -+ rtw_set_surprise_removed(padapter); -+ -+ if (rtw_inc_and_chk_continual_io_error(psdiodev) == _TRUE) { -+ rtw_set_surprise_removed(padapter); -+ break; -+ } -+ } -+ } -+ -+ if (i == SD_IO_TRY_CNT) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ else -+ RTW_ERR("%s: (%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ -+ } -+ -+ -+ return v; -+} -+ -+void sd_write8(struct intf_hdl *pintfhdl, u32 addr, u8 v, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ struct sdio_func *func; -+ bool claim_needed; -+ -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return ; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ sdio_writeb(func, v, addr, err); -+ if (claim_needed) -+ sdio_release_host(func); -+ if (err && *err) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x val=0x%02x\n", __func__, *err, addr, v); -+ -+} -+ -+void sd_write16(struct intf_hdl *pintfhdl, u32 addr, u16 v, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ struct sdio_func *func; -+ bool claim_needed; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return ; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ sdio_writew(func, v, addr, err); -+ if (claim_needed) -+ sdio_release_host(func); -+ if (err && *err) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x val=0x%04x\n", __func__, *err, addr, v); -+ -+} -+ -+void _sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ struct sdio_func *func; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return ; -+ } -+ -+ func = psdio->func; -+ -+ sdio_writel(func, v, addr, err); -+ -+ if (err && *err) { -+ int i; -+ -+ RTW_ERR("%s: (%d) addr=0x%05x val=0x%08x\n", __func__, *err, addr, v); -+ -+ *err = 0; -+ for (i = 0; i < SD_IO_TRY_CNT; i++) { -+ sdio_writel(func, v, addr, err); -+ if (*err == 0) { -+ rtw_reset_continual_io_error(psdiodev); -+ break; -+ } else { -+ RTW_ERR("%s: (%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ if ((-ESHUTDOWN == *err) || (-ENODEV == *err)) -+ rtw_set_surprise_removed(padapter); -+ -+ if (rtw_inc_and_chk_continual_io_error(psdiodev) == _TRUE) { -+ rtw_set_surprise_removed(padapter); -+ break; -+ } -+ } -+ } -+ -+ if (i == SD_IO_TRY_CNT) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x val=0x%08x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ else -+ RTW_ERR("%s: (%d) addr=0x%05x val=0x%08x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ -+ } -+ -+} -+ -+void sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ struct sdio_func *func; -+ bool claim_needed; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return ; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ sdio_writel(func, v, addr, err); -+ if (claim_needed) -+ sdio_release_host(func); -+ -+ if (err && *err) { -+ int i; -+ -+ RTW_ERR("%s: (%d) addr=0x%05x val=0x%08x\n", __func__, *err, addr, v); -+ -+ *err = 0; -+ for (i = 0; i < SD_IO_TRY_CNT; i++) { -+ if (claim_needed) -+ sdio_claim_host(func); -+ sdio_writel(func, v, addr, err); -+ if (claim_needed) -+ sdio_release_host(func); -+ if (*err == 0) { -+ rtw_reset_continual_io_error(psdiodev); -+ break; -+ } else { -+ RTW_ERR("%s: (%d) addr=0x%05x, val=0x%x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ if ((-ESHUTDOWN == *err) || (-ENODEV == *err)) -+ rtw_set_surprise_removed(padapter); -+ -+ if (rtw_inc_and_chk_continual_io_error(psdiodev) == _TRUE) { -+ rtw_set_surprise_removed(padapter); -+ break; -+ } -+ } -+ } -+ -+ if (i == SD_IO_TRY_CNT) -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x val=0x%08x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ else -+ RTW_ERR("%s: (%d) addr=0x%05x val=0x%08x, try_cnt=%d\n", __func__, *err, addr, v, i); -+ } -+ -+} -+#endif /* !RTW_HALMAC */ -+ -+/* -+ * Use CMD53 to read data from SDIO device. -+ * This function MUST be called after sdio_claim_host() or -+ * in SDIO ISR(host had been claimed). -+ * -+ * Parameters: -+ * psdio pointer of SDIO_DATA -+ * addr address to read -+ * cnt amount to read -+ * pdata pointer to put data, this should be a "DMA:able scratch buffer"! -+ * -+ * Return: -+ * 0 Success -+ * others Fail -+ */ -+s32 _sd_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ int err = -EPERM; -+ struct sdio_func *func; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return err; -+ } -+ -+ func = psdio->func; -+ -+ if (unlikely((cnt == 1) || (cnt == 2))) { -+ int i; -+ u8 *pbuf = (u8 *)pdata; -+ -+ for (i = 0; i < cnt; i++) { -+ *(pbuf + i) = sdio_readb(func, addr + i, &err); -+ -+ if (err) { -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x\n", __func__, err, addr); -+ break; -+ } -+ } -+ return err; -+ } -+ -+ err = sdio_memcpy_fromio(func, pdata, addr, cnt); -+ if (err) -+ RTW_ERR("%s: FAIL(%d)! ADDR=%#x Size=%d\n", __func__, err, addr, cnt); -+ -+ if (err == (-ESHUTDOWN) || err == (-ENODEV) || err == (-ENOMEDIUM) || err == (-ETIMEDOUT)) -+ rtw_set_surprise_removed(padapter); -+ -+ -+ return err; -+} -+ -+/* -+ * Use CMD53 to read data from SDIO device. -+ * -+ * Parameters: -+ * psdio pointer of SDIO_DATA -+ * addr address to read -+ * cnt amount to read -+ * pdata pointer to put data, this should be a "DMA:able scratch buffer"! -+ * -+ * Return: -+ * 0 Success -+ * others Fail -+ */ -+s32 sd_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ struct sdio_func *func; -+ bool claim_needed; -+ s32 err = -EPERM; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return err; -+ } -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ err = _sd_read(pintfhdl, addr, cnt, pdata); -+ if (claim_needed) -+ sdio_release_host(func); -+ return err; -+} -+ -+/* -+ * Use CMD53 to write data to SDIO device. -+ * This function MUST be called after sdio_claim_host() or -+ * in SDIO ISR(host had been claimed). -+ * -+ * Parameters: -+ * psdio pointer of SDIO_DATA -+ * addr address to write -+ * cnt amount to write -+ * pdata data pointer, this should be a "DMA:able scratch buffer"! -+ * -+ * Return: -+ * 0 Success -+ * others Fail -+ */ -+s32 _sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ struct sdio_func *func; -+ u32 size; -+ s32 err = -EPERM; -+ -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return err; -+ } -+ -+ func = psdio->func; -+ /* size = sdio_align_size(func, cnt); */ -+ -+ if (unlikely((cnt == 1) || (cnt == 2))) { -+ int i; -+ u8 *pbuf = (u8 *)pdata; -+ -+ for (i = 0; i < cnt; i++) { -+ sdio_writeb(func, *(pbuf + i), addr + i, &err); -+ if (err) { -+ RTW_ERR("%s: FAIL!(%d) addr=0x%05x val=0x%02x\n", __func__, err, addr, *(pbuf + i)); -+ break; -+ } -+ } -+ -+ return err; -+ } -+ -+ size = cnt; -+ err = sdio_memcpy_toio(func, addr, pdata, size); -+ if (err) -+ RTW_ERR("%s: FAIL(%d)! ADDR=%#x Size=%d(%d)\n", __func__, err, addr, cnt, size); -+ -+ -+ return err; -+} -+ -+/* -+ * Use CMD53 to write data to SDIO device. -+ * -+ * Parameters: -+ * psdio pointer of SDIO_DATA -+ * addr address to write -+ * cnt amount to write -+ * pdata data pointer, this should be a "DMA:able scratch buffer"! -+ * -+ * Return: -+ * 0 Success -+ * others Fail -+ */ -+s32 sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata) -+{ -+ PADAPTER padapter; -+ struct dvobj_priv *psdiodev; -+ PSDIO_DATA psdio; -+ -+ struct sdio_func *func; -+ bool claim_needed; -+ s32 err = -EPERM; -+ padapter = pintfhdl->padapter; -+ psdiodev = pintfhdl->pintf_dev; -+ psdio = &psdiodev->intf_data; -+ -+ if (rtw_is_surprise_removed(padapter)) { -+ /* RTW_INFO(" %s (padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n",__FUNCTION__); */ -+ return err; -+ } -+ -+ func = psdio->func; -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ err = _sd_write(pintfhdl, addr, cnt, pdata); -+ if (claim_needed) -+ sdio_release_host(func); -+ return err; -+} -+ -+#if 1 -+/*#define RTW_SDIO_DUMP*/ -+#ifdef RTW_SDIO_DUMP -+#define DUMP_LEN_LMT 0 /* buffer dump size limit */ -+ /* unit: byte, 0 for no limit */ -+#else -+#define DUMP_LEN_LMT 32 -+#endif -+#define GET_DUMP_LEN(len) (DUMP_LEN_LMT ? rtw_min(len, DUMP_LEN_LMT) : len) -+ -+#ifdef DBG_SDIO -+#if (DBG_SDIO >= 1) -+static void sdio_dump_reg_by_cmd52(struct dvobj_priv *d, -+ u32 addr, size_t len, u8 *buf) -+{ -+ struct sdio_func *func; -+ size_t i; -+ u8 val; -+ u8 str[80], used = 0; -+ u8 read_twice = 0; -+ int error; -+ -+ -+ if (buf) -+ _rtw_memset(buf, 0xAE, len); -+ func = dvobj_to_sdio_func(d); -+ /* -+ * When register is WLAN IOREG, -+ * read twice to guarantee the result is correct. -+ */ -+ if (addr & 0x10000) -+ read_twice = 1; -+ -+ _rtw_memset(str, 0, 80); -+ used = 0; -+ if (addr & 0xF) { -+ used += snprintf(str+used, (80-used), "0x%02x:\t", addr&~0xF); -+ used += snprintf(str+used, (80-used), "%*s", (addr&0xF)*5, ""); -+ } -+ for (i = 0; i < len; i++, addr++) { -+ val = sdio_readb(func, addr, &error); -+ if (read_twice) -+ val = sdio_readb(func, addr, &error); -+ if (error) -+ break; -+ -+ if (buf) -+ buf[i] = val; -+ -+ if (!(addr & 0xF)) -+ used += snprintf(str+used, (80-used), "0x%02x:\t", addr&~0xF); -+ used += snprintf(str+used, (80-used), "%02x ", val); -+ if (((i + 1) < len) && ((addr + 1) & 0xF) == 0) { -+ dev_err(&func->dev, "%s", str); -+ _rtw_memset(str, 0, 80); -+ used = 0; -+ } -+ } -+ -+ if (used) { -+ dev_err(&func->dev, "%s", str); -+ _rtw_memset(str, 0, 80); -+ used = 0; -+ } -+ -+ if (error) -+ dev_err(&func->dev, "rtw_sdio_dbg: READ 0x%02x FAIL!", addr); -+} -+ -+static void sdio_dump_cia(struct dvobj_priv *d, u32 addr, size_t len, u8 *buf) -+{ -+ struct sdio_func *func; -+ size_t i; -+ u8 val; -+ u8 str[80], used = 0; -+ int error; -+ -+ -+ if (buf) -+ _rtw_memset(buf, 0xAE, len); -+ func = dvobj_to_sdio_func(d); -+ -+ _rtw_memset(str, 0, 80); -+ used = 0; -+ if (addr & 0xF) { -+ used += snprintf(str+used, (80-used), "0x%02x:\t", addr&~0xF); -+ used += snprintf(str+used, (80-used), "%*s", (addr&0xF)*5, ""); -+ } -+ for (i = 0; i < len; i++, addr++) { -+ val = sdio_f0_readb(func, addr, &error); -+ if (error) -+ break; -+ -+ if (buf) -+ buf[i] = val; -+ -+ if (!(addr & 0xF)) -+ used += snprintf(str+used, (80-used), "0x%02x:\t", addr&~0xF); -+ used += snprintf(str+used, (80-used), "%02x ", val); -+ if (((i + 1) < len) && ((addr + 1) & 0xF) == 0) { -+ dev_err(&func->dev, "%s", str); -+ _rtw_memset(str, 0, 80); -+ used = 0; -+ } -+ } -+ -+ if (used) { -+ dev_err(&func->dev, "%s", str); -+ _rtw_memset(str, 0, 80); -+ used = 0; -+ } -+ -+ if (error) -+ dev_err(&func->dev, "rtw_sdio_dbg: READ CIA 0x%02x FAIL!", -+ addr); -+} -+ -+#if (DBG_SDIO >= 2) -+void rtw_sdio_dbg_reg_alloc(struct dvobj_priv *d); -+#endif /* DBG_SDIO >= 2 */ -+ -+/* -+ * Dump register when CMD53 fail -+ */ -+static void sdio_dump_dbg_reg(struct dvobj_priv *d, u8 write, -+ unsigned int addr, size_t len) -+{ -+ struct sdio_data *sdio; -+ struct sdio_func *func; -+ u8 *buf = NULL; -+#if (DBG_SDIO >= 2) -+ u8 *msg; -+#endif /* DBG_SDIO >= 2 */ -+ -+ -+ sdio = &d->intf_data; -+ if (sdio->reg_dump_mark) -+ return; -+ func = dvobj_to_sdio_func(d); -+ -+ sdio->reg_dump_mark = sdio->cmd53_err_cnt; -+ -+#if (DBG_SDIO >= 2) -+ if (!sdio->dbg_msg) { -+ msg = rtw_zmalloc(80); -+ if (msg) { -+ sdio->dbg_msg = msg; -+ sdio->dbg_msg_size = 80; -+ } -+ } -+ if (sdio->dbg_msg_size) { -+ snprintf(sdio->dbg_msg, sdio->dbg_msg_size, -+ "CMD53 %s 0x%05x, %zu bytes FAIL " -+ "at err_cnt=%d", -+ write?"WRITE":"READ", -+ addr, len, sdio->reg_dump_mark); -+ } -+ -+ rtw_sdio_dbg_reg_alloc(d); -+#endif /* DBG_SDIO >= 2 */ -+ -+ /* MAC register */ -+ dev_err(&func->dev, "MAC register:"); -+#if (DBG_SDIO >= 2) -+ buf = sdio->reg_mac; -+#endif /* DBG_SDIO >= 2 */ -+ sdio_dump_reg_by_cmd52(d, 0x10000, 0x800, buf); -+ dev_err(&func->dev, "MAC Extend register:"); -+#if (DBG_SDIO >= 2) -+ buf = sdio->reg_mac_ext; -+#endif /* DBG_SDIO >= 2 */ -+ sdio_dump_reg_by_cmd52(d, 0x11000, 0x800, buf); -+ -+ /* SDIO local register */ -+ dev_err(&func->dev, "SDIO Local register:"); -+#if (DBG_SDIO >= 2) -+ buf = sdio->reg_local; -+#endif /* DBG_SDIO >= 2 */ -+ sdio_dump_reg_by_cmd52(d, 0x0, 0x100, buf); -+ -+ /* F0 */ -+ dev_err(&func->dev, "f0 register:"); -+#if (DBG_SDIO >= 2) -+ buf = sdio->reg_cia; -+#endif /* DBG_SDIO >= 2 */ -+ sdio_dump_cia(d, 0x0, 0x200, buf); -+} -+#endif /* DBG_SDIO >= 1 */ -+#endif /* DBG_SDIO */ -+ -+/** -+ * Returns driver error code, -+ * 0 no error -+ * -1 Level 1 error, critical error and can't be recovered -+ * -2 Level 2 error, normal error, retry to recover is possible -+ */ -+static int linux_io_err_to_drv_err(int err) -+{ -+ if (!err) -+ return 0; -+ -+ /* critical error */ -+ if ((err == -ESHUTDOWN) || -+ (err == -ENODEV) || -+ (err == -ENOMEDIUM)) -+ return -1; -+ -+ /* other error */ -+ return -2; -+} -+ -+/** -+ * rtw_sdio_raw_read - Read from SDIO device -+ * @d: driver object private data -+ * @addr: address to read -+ * @buf: buffer to store the data -+ * @len: number of bytes to read -+ * @fixed: -+ * -+ * Reads from the address space of a SDIO device. -+ * Return value indicates if the transfer succeeded or not. -+ */ -+int __must_check rtw_sdio_raw_read(struct dvobj_priv *d, unsigned int addr, -+ void *buf, size_t len, bool fixed) -+{ -+ int error = -EPERM; -+ bool f0, cmd52; -+ struct sdio_func *func; -+ bool claim_needed; -+ u32 offset, i; -+ -+ -+ func = dvobj_to_sdio_func(d); -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ f0 = RTW_SDIO_ADDR_F0_CHK(addr); -+ cmd52 = RTW_SDIO_ADDR_CMD52_CHK(addr); -+ -+ /* -+ * Mask addr to remove driver defined bit and -+ * make sure addr is in valid range -+ */ -+ if (f0) -+ addr &= 0xFFF; -+ else -+ addr &= 0x1FFFF; -+ -+#ifdef RTW_SDIO_DUMP -+ if (f0) -+ dev_dbg(&func->dev, "rtw_sdio: READ F0\n"); -+ else if (cmd52) -+ dev_dbg(&func->dev, "rtw_sdio: READ use CMD52\n"); -+ else -+ dev_dbg(&func->dev, "rtw_sdio: READ use CMD53\n"); -+ -+ dev_dbg(&func->dev, "rtw_sdio: READ from 0x%05x\n", addr); -+#endif /* RTW_SDIO_DUMP */ -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ -+ if (f0) { -+ offset = addr; -+ for (i = 0; i < len; i++, offset++) { -+ ((u8 *)buf)[i] = sdio_f0_readb(func, offset, &error); -+ if (error) -+ break; -+#if 0 -+ dev_info(&func->dev, "%s: sdio f0 read 52 addr 0x%x, byte 0x%02x\n", -+ __func__, offset, ((u8 *)buf)[i]); -+#endif -+ } -+ } else { -+ if (cmd52) { -+#ifdef RTW_SDIO_IO_DBG -+ dev_info(&func->dev, "%s: sdio read 52 addr 0x%x, %zu bytes\n", -+ __func__, addr, len); -+#endif -+ offset = addr; -+ for (i = 0; i < len; i++) { -+ ((u8 *)buf)[i] = sdio_readb(func, offset, &error); -+ if (error) -+ break; -+#if 0 -+ dev_info(&func->dev, "%s: sdio read 52 addr 0x%x, byte 0x%02x\n", -+ __func__, offset, ((u8 *)buf)[i]); -+#endif -+ if (!fixed) -+ offset++; -+ } -+ } else { -+#ifdef RTW_SDIO_IO_DBG -+ dev_info(&func->dev, "%s: sdio read 53 addr 0x%x, %zu bytes\n", -+ __func__, addr, len); -+#endif -+ if (fixed) -+ error = sdio_readsb(func, buf, addr, len); -+ else -+ error = sdio_memcpy_fromio(func, buf, addr, len); -+ } -+ } -+ -+#ifdef DBG_SDIO -+#if (DBG_SDIO >= 3) -+ if (!error && !f0 && !cmd52 -+ && (d->intf_data.dbg_enable -+ && d->intf_data.err_test && !d->intf_data.err_test_triggered -+ && ((addr & 0x10000) -+ || (!(addr & 0xE000) -+ && !((addr >= 0x40) && (addr < 0x48)))))) { -+ d->intf_data.err_test_triggered = 1; -+ error = -ETIMEDOUT; -+ dev_warn(&func->dev, "Simulate error(%d) READ addr=0x%05x %zu bytes", -+ error, addr, len); -+ } -+#endif /* DBG_SDIO >= 3 */ -+ -+ if (error) { -+ if (f0 || cmd52) { -+ d->intf_data.cmd52_err_cnt++; -+ } else { -+ d->intf_data.cmd53_err_cnt++; -+#if (DBG_SDIO >= 1) -+ sdio_dump_dbg_reg(d, 0, addr, len); -+#endif /* DBG_SDIO >= 1 */ -+ } -+ } -+#endif /* DBG_SDIO */ -+ -+ if (claim_needed) -+ sdio_release_host(func); -+ -+#ifdef RTW_SDIO_DUMP -+ print_hex_dump(KERN_DEBUG, "rtw_sdio: READ ", -+ DUMP_PREFIX_OFFSET, 16, 1, -+ buf, GET_DUMP_LEN(len), false); -+#endif /* RTW_SDIO_DUMP */ -+ -+ if (WARN_ON(error)) { -+ dev_err(&func->dev, "%s: sdio read failed (%d)\n", __func__, error); -+#ifndef RTW_SDIO_DUMP -+ if (f0) -+ dev_err(&func->dev, "rtw_sdio: READ F0\n"); -+ if (cmd52) -+ dev_err(&func->dev, "rtw_sdio: READ use CMD52\n"); -+ else -+ dev_err(&func->dev, "rtw_sdio: READ use CMD53\n"); -+ dev_err(&func->dev, "rtw_sdio: READ from 0x%05x, %zu bytes\n", addr, len); -+ print_hex_dump(KERN_ERR, "rtw_sdio: READ ", -+ DUMP_PREFIX_OFFSET, 16, 1, -+ buf, GET_DUMP_LEN(len), false); -+#endif /* !RTW_SDIO_DUMP */ -+ } -+ -+ return linux_io_err_to_drv_err(error); -+} -+ -+/** -+ * rtw_sdio_raw_write - Write to SDIO device -+ * @d: driver object private data -+ * @addr: address to write -+ * @buf: buffer that contains the data to write -+ * @len: number of bytes to write -+ * @fixed: address is fixed(FIFO) or incremented -+ * -+ * Writes to the address space of a SDIO device. -+ * Return value indicates if the transfer succeeded or not. -+ */ -+int __must_check rtw_sdio_raw_write(struct dvobj_priv *d, unsigned int addr, -+ void *buf, size_t len, bool fixed) -+{ -+ int error = -EPERM; -+ bool f0, cmd52; -+ struct sdio_func *func; -+ bool claim_needed; -+ u32 offset, i; -+ -+ -+ func = dvobj_to_sdio_func(d); -+ claim_needed = rtw_sdio_claim_host_needed(func); -+ f0 = RTW_SDIO_ADDR_F0_CHK(addr); -+ cmd52 = RTW_SDIO_ADDR_CMD52_CHK(addr); -+ -+ /* -+ * Mask addr to remove driver defined bit and -+ * make sure addr is in valid range -+ */ -+ if (f0) -+ addr &= 0xFFF; -+ else -+ addr &= 0x1FFFF; -+ -+#ifdef RTW_SDIO_DUMP -+ if (f0) -+ dev_dbg(&func->dev, "rtw_sdio: WRITE F0\n"); -+ else if (cmd52) -+ dev_dbg(&func->dev, "rtw_sdio: WRITE use CMD52\n"); -+ else -+ dev_dbg(&func->dev, "rtw_sdio: WRITE use CMD53\n"); -+ dev_dbg(&func->dev, "rtw_sdio: WRITE to 0x%05x\n", addr); -+ print_hex_dump(KERN_DEBUG, "rtw_sdio: WRITE ", -+ DUMP_PREFIX_OFFSET, 16, 1, -+ buf, GET_DUMP_LEN(len), false); -+#endif /* RTW_SDIO_DUMP */ -+ -+ if (claim_needed) -+ sdio_claim_host(func); -+ -+ if (f0) { -+ offset = addr; -+ for (i = 0; i < len; i++, offset++) { -+ sdio_f0_writeb(func, ((u8 *)buf)[i], offset, &error); -+ if (error) -+ break; -+#if 0 -+ dev_info(&func->dev, "%s: sdio f0 write 52 addr 0x%x, byte 0x%02x\n", -+ __func__, offset, ((u8 *)buf)[i]); -+#endif -+ } -+ } else { -+ if (cmd52) { -+#ifdef RTW_SDIO_IO_DBG -+ dev_info(&func->dev, "%s: sdio write 52 addr 0x%x, %zu bytes\n", -+ __func__, addr, len); -+#endif -+ offset = addr; -+ for (i = 0; i < len; i++) { -+ sdio_writeb(func, ((u8 *)buf)[i], offset, &error); -+ if (error) -+ break; -+#if 0 -+ dev_info(&func->dev, "%s: sdio write 52 addr 0x%x, byte 0x%02x\n", -+ __func__, offset, ((u8 *)buf)[i]); -+#endif -+ if (!fixed) -+ offset++; -+ } -+ } else { -+#ifdef RTW_SDIO_IO_DBG -+ dev_info(&func->dev, "%s: sdio write 53 addr 0x%x, %zu bytes\n", -+ __func__, addr, len); -+#endif -+ if (fixed) -+ error = sdio_writesb(func, addr, buf, len); -+ else -+ error = sdio_memcpy_toio(func, addr, buf, len); -+ } -+ } -+ -+#ifdef DBG_SDIO -+ if (error) { -+ if (f0 || cmd52) { -+ d->intf_data.cmd52_err_cnt++; -+ } else { -+ d->intf_data.cmd53_err_cnt++; -+#if (DBG_SDIO >= 1) -+ sdio_dump_dbg_reg(d, 1, addr, len); -+#endif /* DBG_SDIO >= 1 */ -+ } -+ } -+#endif /* DBG_SDIO */ -+ -+ if (claim_needed) -+ sdio_release_host(func); -+ -+ if (WARN_ON(error)) { -+ dev_err(&func->dev, "%s: sdio write failed (%d)\n", __func__, error); -+#ifndef RTW_SDIO_DUMP -+ if (f0) -+ dev_err(&func->dev, "rtw_sdio: WRITE F0\n"); -+ if (cmd52) -+ dev_err(&func->dev, "rtw_sdio: WRITE use CMD52\n"); -+ else -+ dev_err(&func->dev, "rtw_sdio: WRITE use CMD53\n"); -+ dev_err(&func->dev, "rtw_sdio: WRITE to 0x%05x, %zu bytes\n", addr, len); -+ print_hex_dump(KERN_ERR, "rtw_sdio: WRITE ", -+ DUMP_PREFIX_OFFSET, 16, 1, -+ buf, GET_DUMP_LEN(len), false); -+#endif /* !RTW_SDIO_DUMP */ -+ } -+ -+ return linux_io_err_to_drv_err(error); -+} -+#endif -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/wifi_regd.c b/drivers/staging/rtl8723cs/os_dep/linux/wifi_regd.c -new file mode 100644 -index 000000000000..b4b0bcd5114d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/wifi_regd.c -@@ -0,0 +1,410 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2009-2010 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#include -+ -+#ifdef CONFIG_IOCTL_CFG80211 -+static void rtw_regd_overide_flags(struct wiphy *wiphy, struct rf_ctl_t *rfctl) -+{ -+ RT_CHANNEL_INFO *channel_set = rfctl->channel_set; -+ u8 max_chan_nums = rfctl->max_chan_nums; -+ struct ieee80211_supported_band *sband; -+ struct ieee80211_channel *ch; -+ unsigned int i, j; -+ u16 channel; -+ u32 freq; -+ -+ /* all channels disable */ -+ for (i = 0; i < NUM_NL80211_BANDS; i++) { -+ sband = wiphy->bands[i]; -+ if (!sband) -+ continue; -+ for (j = 0; j < sband->n_channels; j++) { -+ ch = &sband->channels[j]; -+ if (!ch) -+ continue; -+ ch->flags = IEEE80211_CHAN_DISABLED; -+ } -+ } -+ -+ /* channels apply by channel plans. */ -+ for (i = 0; i < max_chan_nums; i++) { -+ channel = channel_set[i].ChannelNum; -+ freq = rtw_ch2freq(channel); -+ ch = ieee80211_get_channel(wiphy, freq); -+ if (!ch) { -+ rtw_warn_on(1); -+ continue; -+ } -+ -+ /* enable */ -+ ch->flags = 0; -+ -+ if (channel_set[i].flags & RTW_CHF_DFS) { -+ /* -+ * before integrating with nl80211 flow -+ * bypass IEEE80211_CHAN_RADAR when configured with radar detection -+ * to prevent from hostapd blocking DFS channels -+ */ -+ if (rtw_rfctl_dfs_domain_unknown(rfctl)) -+ ch->flags |= IEEE80211_CHAN_RADAR; -+ } -+ -+ if (channel_set[i].flags & RTW_CHF_NO_IR) { -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) -+ ch->flags |= IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_PASSIVE_SCAN; -+ #else -+ ch->flags |= IEEE80211_CHAN_NO_IR; -+ #endif -+ } -+ } -+} -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+static void rtw_regd_apply_dfs_flags(struct rf_ctl_t *rfctl) -+{ -+ RT_CHANNEL_INFO *channel_set = rfctl->channel_set; -+ u8 max_chan_nums = rfctl->max_chan_nums; -+ unsigned int i; -+ struct ieee80211_channel *chan; -+ -+ /* channels apply by channel plans. */ -+ for (i = 0; i < max_chan_nums; i++) { -+ chan = channel_set[i].os_chan; -+ if (channel_set[i].flags & RTW_CHF_DFS) { -+ /* -+ * before integrating with nl80211 flow -+ * clear IEEE80211_CHAN_RADAR when configured with radar detection -+ * to prevent from hostapd blocking DFS channels -+ */ -+ if (!rtw_rfctl_dfs_domain_unknown(rfctl)) -+ chan->flags &= ~IEEE80211_CHAN_RADAR; -+ } -+ } -+} -+#endif -+ -+void rtw_regd_apply_flags(struct wiphy *wiphy) -+{ -+ struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy); -+ struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); -+ -+ if (rfctl->regd_src == REGD_SRC_RTK_PRIV) -+ rtw_regd_overide_flags(wiphy, rfctl); -+#ifdef CONFIG_REGD_SRC_FROM_OS -+ else if (rfctl->regd_src == REGD_SRC_OS) -+ rtw_regd_apply_dfs_flags(rfctl); -+#endif -+ else -+ rtw_warn_on(1); -+} -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+/* init_channel_set_from_wiphy */ -+u8 rtw_os_init_channel_set(_adapter *padapter, RT_CHANNEL_INFO *channel_set) -+{ -+ struct wiphy *wiphy = adapter_to_wiphy(padapter); -+ struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); -+ struct registry_priv *regsty = adapter_to_regsty(padapter); -+ struct ieee80211_channel *chan; -+ u8 chanset_size = 0; -+ int i, j; -+ -+ _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM); -+ -+ for (i = NL80211_BAND_2GHZ; i <= NL80211_BAND_5GHZ; i++) { -+ if (!wiphy->bands[i]) -+ continue; -+ for (j = 0; j < wiphy->bands[i]->n_channels; j++) { -+ chan = &wiphy->bands[i]->channels[j]; -+ if (chan->flags & IEEE80211_CHAN_DISABLED) -+ continue; -+ if (rtw_regsty_is_excl_chs(regsty, chan->hw_value)) -+ continue; -+ -+ if (chanset_size >= MAX_CHANNEL_NUM) { -+ RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); -+ i = NL80211_BAND_5GHZ + 1; -+ break; -+ } -+ -+ channel_set[chanset_size].ChannelNum = chan->hw_value; -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) -+ if (chan->flags & (IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_PASSIVE_SCAN)) -+ #else -+ if (chan->flags & IEEE80211_CHAN_NO_IR) -+ #endif -+ channel_set[chanset_size].flags |= RTW_CHF_NO_IR; -+ if (chan->flags & IEEE80211_CHAN_RADAR) -+ channel_set[chanset_size].flags |= RTW_CHF_DFS; -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) -+ if (chan->flags & IEEE80211_CHAN_NO_HT40PLUS) -+ channel_set[chanset_size].flags |= RTW_CHF_NO_HT40U; -+ if (chan->flags & IEEE80211_CHAN_NO_HT40MINUS) -+ channel_set[chanset_size].flags |= RTW_CHF_NO_HT40L; -+ #endif -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)) -+ if (chan->flags & IEEE80211_CHAN_NO_80MHZ) -+ channel_set[chanset_size].flags |= RTW_CHF_NO_80MHZ; -+ if (chan->flags & IEEE80211_CHAN_NO_160MHZ) -+ channel_set[chanset_size].flags |= RTW_CHF_NO_160MHZ; -+ #endif -+ channel_set[chanset_size].os_chan = chan; -+ chanset_size++; -+ } -+ } -+ -+#if CONFIG_IEEE80211_BAND_5GHZ -+ #ifdef CONFIG_DFS_MASTER -+ for (i = 0; i < chanset_size; i++) -+ channel_set[i].non_ocp_end_time = rtw_get_current_time(); -+ #endif -+#endif /* CONFIG_IEEE80211_BAND_5GHZ */ -+ -+ if (chanset_size) -+ RTW_INFO(FUNC_ADPT_FMT" ch num:%d\n" -+ , FUNC_ADPT_ARG(padapter), chanset_size); -+ else -+ RTW_WARN(FUNC_ADPT_FMT" final chset has no channel\n" -+ , FUNC_ADPT_ARG(padapter)); -+ -+ return chanset_size; -+} -+ -+s16 rtw_os_get_total_txpwr_regd_lmt_mbm(_adapter *adapter, u8 cch, enum channel_width bw) -+{ -+ struct wiphy *wiphy = adapter_to_wiphy(adapter); -+ s16 mbm = UNSPECIFIED_MBM; -+ u8 *op_chs; -+ u8 op_ch_num; -+ u8 i; -+ u32 freq; -+ struct ieee80211_channel *ch; -+ -+ if (!rtw_get_op_chs_by_cch_bw(cch, bw, &op_chs, &op_ch_num)) -+ goto exit; -+ -+ for (i = 0; i < op_ch_num; i++) { -+ freq = rtw_ch2freq(op_chs[i]); -+ ch = ieee80211_get_channel(wiphy, freq); -+ if (!ch) { -+ rtw_warn_on(1); -+ continue; -+ } -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0)) -+ mbm = rtw_min(mbm, ch->max_reg_power * MBM_PDBM); -+ #else -+ /* require max_power == 0 (therefore orig_mpwr set to 0) when wiphy registration */ -+ mbm = rtw_min(mbm, ch->max_power * MBM_PDBM); -+ #endif -+ } -+ -+exit: -+ return mbm; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+static enum rtw_dfs_regd nl80211_dfs_regions_to_rtw_dfs_region(enum nl80211_dfs_regions region) -+{ -+ switch (region) { -+ case NL80211_DFS_FCC: -+ return RTW_DFS_REGD_FCC; -+ case NL80211_DFS_ETSI: -+ return RTW_DFS_REGD_ETSI; -+ case NL80211_DFS_JP: -+ return RTW_DFS_REGD_MKK; -+ case NL80211_DFS_UNSET: -+ default: -+ return RTW_DFS_REGD_NONE; -+ } -+}; -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) */ -+#endif /* CONFIG_REGD_SRC_FROM_OS */ -+ -+#ifdef CONFIG_RTW_DEBUG -+static const char *nl80211_reg_initiator_str(enum nl80211_reg_initiator initiator) -+{ -+ switch (initiator) { -+ case NL80211_REGDOM_SET_BY_DRIVER: -+ return "DRIVER"; -+ case NL80211_REGDOM_SET_BY_CORE: -+ return "CORE"; -+ case NL80211_REGDOM_SET_BY_USER: -+ return "USER"; -+ case NL80211_REGDOM_SET_BY_COUNTRY_IE: -+ return "COUNTRY_IE"; -+ } -+ rtw_warn_on(1); -+ return "UNKNOWN"; -+} -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+static const char *nl80211_user_reg_hint_type_str(enum nl80211_user_reg_hint_type type) -+{ -+ switch (type) { -+ case NL80211_USER_REG_HINT_USER: -+ return "USER"; -+ case NL80211_USER_REG_HINT_CELL_BASE: -+ return "CELL_BASE"; -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0)) -+ case NL80211_USER_REG_HINT_INDOOR: -+ return "INDOOR"; -+ #endif -+ } -+ rtw_warn_on(1); -+ return "UNKNOWN"; -+} -+#endif -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+static const char *nl80211_dfs_regions_str(enum nl80211_dfs_regions region) -+{ -+ switch (region) { -+ case NL80211_DFS_UNSET: -+ return "UNSET"; -+ case NL80211_DFS_FCC: -+ return "FCC"; -+ case NL80211_DFS_ETSI: -+ return "ETSI"; -+ case NL80211_DFS_JP: -+ return "JP"; -+ } -+ rtw_warn_on(1); -+ return "UNKNOWN"; -+}; -+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) */ -+ -+static const char *environment_cap_str(enum environment_cap cap) -+{ -+ switch (cap) { -+ case ENVIRON_ANY: -+ return "ANY"; -+ case ENVIRON_INDOOR: -+ return "INDOOR"; -+ case ENVIRON_OUTDOOR: -+ return "OUTDOOR"; -+ } -+ rtw_warn_on(1); -+ return "UNKNOWN"; -+} -+ -+static void dump_requlatory_request(void *sel, struct regulatory_request *request) -+{ -+ u8 alpha2_len; -+ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 16, 0)) -+ alpha2_len = 3; -+ #else -+ alpha2_len = 2; -+ #endif -+ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) -+ RTW_PRINT_SEL(sel, "initiator:%s, wiphy_idx:%d, type:%s\n" -+ , nl80211_reg_initiator_str(request->initiator) -+ , request->wiphy_idx -+ , nl80211_user_reg_hint_type_str(request->user_reg_hint_type)); -+ #else -+ RTW_PRINT_SEL(sel, "initiator:%s, wiphy_idx:%d\n" -+ , nl80211_reg_initiator_str(request->initiator) -+ , request->wiphy_idx); -+ #endif -+ -+ RTW_PRINT_SEL(sel, "alpha2:%.*s\n", alpha2_len, request->alpha2); -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+ RTW_PRINT_SEL(sel, "dfs_region:%s\n", nl80211_dfs_regions_str(request->dfs_region)); -+ #endif -+ -+ RTW_PRINT_SEL(sel, "intersect:%d\n", request->intersect); -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) -+ RTW_PRINT_SEL(sel, "processed:%d\n", request->processed); -+ #endif -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36)) -+ RTW_PRINT_SEL(sel, "country_ie_checksum:0x%08x\n", request->country_ie_checksum); -+ #endif -+ -+ RTW_PRINT_SEL(sel, "country_ie_env:%s\n", environment_cap_str(request->country_ie_env)); -+} -+#endif /* CONFIG_RTW_DEBUG */ -+ -+static void rtw_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request) -+{ -+ struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy); -+ struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); -+ struct registry_priv *regsty = dvobj_to_regsty(dvobj); -+ -+#ifdef CONFIG_RTW_DEBUG -+ if (rtw_drv_log_level >= _DRV_INFO_) { -+ RTW_INFO(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -+ dump_requlatory_request(RTW_DBGDUMP, request); -+ } -+#endif -+ -+#ifdef CONFIG_REGD_SRC_FROM_OS -+ if (REGSTY_REGD_SRC_FROM_OS(regsty)) { -+ enum rtw_dfs_regd dfs_region = RTW_DFS_REGD_NONE; -+ -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) -+ dfs_region = nl80211_dfs_regions_to_rtw_dfs_region(request->dfs_region); -+ #endif -+ -+ /* trigger command to sync regulatory form OS */ -+ rtw_sync_os_regd_cmd(wiphy_to_adapter(wiphy), RTW_CMDF_WAIT_ACK, request->alpha2, dfs_region); -+ } else -+#endif -+ { -+ /* use alpha2 as input to select the corresponding channel plan settings defined by Realtek */ -+ switch (request->initiator) { -+ case NL80211_REGDOM_SET_BY_DRIVER: -+ break; -+ case NL80211_REGDOM_SET_BY_CORE: -+ break; -+ case NL80211_REGDOM_SET_BY_USER: -+ rtw_set_country(wiphy_to_adapter(wiphy), request->alpha2); -+ break; -+ case NL80211_REGDOM_SET_BY_COUNTRY_IE: -+ break; -+ } -+ -+ rtw_regd_apply_flags(wiphy); -+ } -+} -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 9, 0)) -+static int rtw_reg_notifier_return(struct wiphy *wiphy, struct regulatory_request *request) -+{ -+ rtw_reg_notifier(wiphy, request); -+ return 0; -+} -+#endif -+ -+int rtw_regd_init(struct wiphy *wiphy) -+{ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 9, 0)) -+ wiphy->reg_notifier = rtw_reg_notifier_return; -+#else -+ wiphy->reg_notifier = rtw_reg_notifier; -+#endif -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) -+ wiphy->flags &= ~WIPHY_FLAG_STRICT_REGULATORY; -+ wiphy->flags &= ~WIPHY_FLAG_DISABLE_BEACON_HINTS; -+#else -+ wiphy->regulatory_flags &= ~REGULATORY_STRICT_REG; -+ wiphy->regulatory_flags &= ~REGULATORY_DISABLE_BEACON_HINTS; -+#endif -+ -+ return 0; -+} -+#endif /* CONFIG_IOCTL_CFG80211 */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/wifi_regd.h b/drivers/staging/rtl8723cs/os_dep/linux/wifi_regd.h -new file mode 100644 -index 000000000000..4e147fc51dbc ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/wifi_regd.h -@@ -0,0 +1,27 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2009-2010 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#ifndef __WIFI_REGD_H__ -+#define __WIFI_REGD_H__ -+ -+void rtw_regd_apply_flags(struct wiphy *wiphy); -+#ifdef CONFIG_REGD_SRC_FROM_OS -+struct _RT_CHANNEL_INFO; -+u8 rtw_os_init_channel_set(_adapter *padapter, struct _RT_CHANNEL_INFO *channel_set); -+s16 rtw_os_get_total_txpwr_regd_lmt_mbm(_adapter *adapter, u8 cch, enum channel_width bw); -+#endif -+int rtw_regd_init(struct wiphy *wiphy); -+ -+#endif /* __WIFI_REGD_H__ */ -diff --git a/drivers/staging/rtl8723cs/os_dep/linux/xmit_linux.c b/drivers/staging/rtl8723cs/os_dep/linux/xmit_linux.c -new file mode 100644 -index 000000000000..fdcba46c556a ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/linux/xmit_linux.c -@@ -0,0 +1,538 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#define _XMIT_OSDEP_C_ -+ -+#include -+ -+#define DBG_DUMP_OS_QUEUE_CTL 0 -+ -+uint rtw_remainder_len(struct pkt_file *pfile) -+{ -+ return pfile->buf_len - ((SIZE_PTR)(pfile->cur_addr) - (SIZE_PTR)(pfile->buf_start)); -+} -+ -+void _rtw_open_pktfile(_pkt *pktptr, struct pkt_file *pfile) -+{ -+ -+ pfile->pkt = pktptr; -+ pfile->cur_addr = pfile->buf_start = pktptr->data; -+ pfile->pkt_len = pfile->buf_len = pktptr->len; -+ -+ pfile->cur_buffer = pfile->buf_start ; -+ -+} -+ -+uint _rtw_pktfile_read(struct pkt_file *pfile, u8 *rmem, uint rlen) -+{ -+ uint len = 0; -+ -+ -+ len = rtw_remainder_len(pfile); -+ len = (rlen > len) ? len : rlen; -+ -+ if (rmem) -+ skb_copy_bits(pfile->pkt, pfile->buf_len - pfile->pkt_len, rmem, len); -+ -+ pfile->cur_addr += len; -+ pfile->pkt_len -= len; -+ -+ -+ return len; -+} -+ -+sint rtw_endofpktfile(struct pkt_file *pfile) -+{ -+ -+ if (pfile->pkt_len == 0) { -+ return _TRUE; -+ } -+ -+ -+ return _FALSE; -+} -+ -+void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib) -+{ -+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX -+ struct sk_buff *skb = (struct sk_buff *)pkt; -+ struct iphdr *iph = NULL; -+ struct ipv6hdr *i6ph = NULL; -+ struct udphdr *uh = NULL; -+ struct tcphdr *th = NULL; -+ u8 protocol = 0xFF; -+ -+ if (skb->protocol == htons(ETH_P_IP)) { -+ iph = (struct iphdr *)skb_network_header(skb); -+ protocol = iph->protocol; -+ } else if (skb->protocol == htons(ETH_P_IPV6)) { -+ i6ph = (struct ipv6hdr *)skb_network_header(skb); -+ protocol = i6ph->nexthdr; -+ } else -+ {} -+ -+ /* HW unable to compute CSUM if header & payload was be encrypted by SW(cause TXDMA error) */ -+ if (pattrib->bswenc == _TRUE) { -+ if (skb->ip_summed == CHECKSUM_PARTIAL) -+ skb_checksum_help(skb); -+ return; -+ } -+ -+ /* For HW rule, clear ipv4_csum & UDP/TCP_csum if it is UDP/TCP packet */ -+ switch (protocol) { -+ case IPPROTO_UDP: -+ uh = (struct udphdr *)skb_transport_header(skb); -+ uh->check = 0; -+ if (iph) -+ iph->check = 0; -+ pattrib->hw_csum = _TRUE; -+ break; -+ case IPPROTO_TCP: -+ th = (struct tcphdr *)skb_transport_header(skb); -+ th->check = 0; -+ if (iph) -+ iph->check = 0; -+ pattrib->hw_csum = _TRUE; -+ break; -+ default: -+ break; -+ } -+#endif -+ -+} -+ -+int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf, u32 alloc_sz, u8 flag) -+{ -+ if (alloc_sz > 0) { -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct usb_device *pusbd = pdvobjpriv->pusbdev; -+ -+ pxmitbuf->pallocated_buf = rtw_usb_buffer_alloc(pusbd, (size_t)alloc_sz, &pxmitbuf->dma_transfer_addr); -+ pxmitbuf->pbuf = pxmitbuf->pallocated_buf; -+ if (pxmitbuf->pallocated_buf == NULL) -+ return _FAIL; -+#else /* CONFIG_USE_USB_BUFFER_ALLOC_TX */ -+ -+ pxmitbuf->pallocated_buf = rtw_zmalloc(alloc_sz); -+ if (pxmitbuf->pallocated_buf == NULL) -+ return _FAIL; -+ -+ pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ); -+ -+#endif /* CONFIG_USE_USB_BUFFER_ALLOC_TX */ -+ } -+ -+ if (flag) { -+#ifdef CONFIG_USB_HCI -+ int i; -+ for (i = 0; i < 8; i++) { -+ pxmitbuf->pxmit_urb[i] = usb_alloc_urb(0, GFP_KERNEL); -+ if (pxmitbuf->pxmit_urb[i] == NULL) { -+ RTW_INFO("pxmitbuf->pxmit_urb[i]==NULL"); -+ return _FAIL; -+ } -+ } -+#endif -+ } -+ -+ return _SUCCESS; -+} -+ -+void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf, u32 free_sz, u8 flag) -+{ -+ if (flag) { -+#ifdef CONFIG_USB_HCI -+ int i; -+ -+ for (i = 0; i < 8; i++) { -+ if (pxmitbuf->pxmit_urb[i]) { -+ /* usb_kill_urb(pxmitbuf->pxmit_urb[i]); */ -+ usb_free_urb(pxmitbuf->pxmit_urb[i]); -+ } -+ } -+#endif -+ } -+ -+ if (free_sz > 0) { -+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX -+ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); -+ struct usb_device *pusbd = pdvobjpriv->pusbdev; -+ -+ rtw_usb_buffer_free(pusbd, (size_t)free_sz, pxmitbuf->pallocated_buf, pxmitbuf->dma_transfer_addr); -+ pxmitbuf->pallocated_buf = NULL; -+ pxmitbuf->dma_transfer_addr = 0; -+#else /* CONFIG_USE_USB_BUFFER_ALLOC_TX */ -+ if (pxmitbuf->pallocated_buf) -+ rtw_mfree(pxmitbuf->pallocated_buf, free_sz); -+#endif /* CONFIG_USE_USB_BUFFER_ALLOC_TX */ -+ } -+} -+ -+void dump_os_queue(void *sel, _adapter *padapter) -+{ -+ struct net_device *ndev = padapter->pnetdev; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ int i; -+ -+ for (i = 0; i < 4; i++) { -+ RTW_PRINT_SEL(sel, "os_queue[%d]:%s\n" -+ , i, __netif_subqueue_stopped(ndev, i) ? "stopped" : "waked"); -+ } -+#else -+ RTW_PRINT_SEL(sel, "os_queue:%s\n" -+ , netif_queue_stopped(ndev) ? "stopped" : "waked"); -+#endif -+} -+ -+#define WMM_XMIT_THRESHOLD (NR_XMITFRAME*2/5) -+ -+static inline bool rtw_os_need_wake_queue(_adapter *padapter, u16 os_qid) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+ -+ if (padapter->registrypriv.wifi_spec) { -+ if (pxmitpriv->hwxmits[os_qid].accnt < WMM_XMIT_THRESHOLD) -+ return _TRUE; -+#ifdef DBG_CONFIG_ERROR_DETECT -+#ifdef DBG_CONFIG_ERROR_RESET -+ } else if (rtw_hal_sreset_inprogress(padapter) == _TRUE) { -+ return _FALSE; -+#endif/* #ifdef DBG_CONFIG_ERROR_RESET */ -+#endif/* #ifdef DBG_CONFIG_ERROR_DETECT */ -+ } else { -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) { -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC) -+ && MCC_STOP(padapter)) -+ return _FALSE; -+ } -+#endif /* CONFIG_MCC_MODE */ -+ return _TRUE; -+ } -+ return _FALSE; -+#else -+#ifdef CONFIG_MCC_MODE -+ if (MCC_EN(padapter)) { -+ if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC) -+ && MCC_STOP(padapter)) -+ return _FALSE; -+ } -+#endif /* CONFIG_MCC_MODE */ -+ return _TRUE; -+#endif -+} -+ -+static inline bool rtw_os_need_stop_queue(_adapter *padapter, u16 os_qid) -+{ -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ if (padapter->registrypriv.wifi_spec) { -+ /* No free space for Tx, tx_worker is too slow */ -+ if (pxmitpriv->hwxmits[os_qid].accnt > WMM_XMIT_THRESHOLD) -+ return _TRUE; -+ } else { -+ if (pxmitpriv->free_xmitframe_cnt <= 4) -+ return _TRUE; -+ } -+#else -+ if (pxmitpriv->free_xmitframe_cnt <= 4) -+ return _TRUE; -+#endif -+ return _FALSE; -+} -+ -+void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt) -+{ -+ rtw_skb_free(pkt); -+} -+ -+void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe) -+{ -+ if (pxframe->pkt) -+ rtw_os_pkt_complete(padapter, pxframe->pkt); -+ -+ pxframe->pkt = NULL; -+} -+ -+void rtw_os_xmit_schedule(_adapter *padapter) -+{ -+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -+ _adapter *pri_adapter; -+ -+ if (!padapter) -+ return; -+ pri_adapter = GET_PRIMARY_ADAPTER(padapter); -+ -+ if (_rtw_queue_empty(&padapter->xmitpriv.pending_xmitbuf_queue) == _FALSE) -+ _rtw_up_sema(&pri_adapter->xmitpriv.xmit_sema); -+ -+ -+#else -+ _irqL irqL; -+ struct xmit_priv *pxmitpriv; -+ -+ if (!padapter) -+ return; -+ -+ pxmitpriv = &padapter->xmitpriv; -+ -+ _enter_critical_bh(&pxmitpriv->lock, &irqL); -+ -+ if (rtw_txframes_pending(padapter)) -+ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); -+ -+ _exit_critical_bh(&pxmitpriv->lock, &irqL); -+ -+#if defined(CONFIG_PCI_HCI) && defined(CONFIG_XMIT_THREAD_MODE) -+ if (_rtw_queue_empty(&padapter->xmitpriv.pending_xmitbuf_queue) == _FALSE) -+ _rtw_up_sema(&padapter->xmitpriv.xmit_sema); -+#endif -+ -+ -+#endif -+} -+ -+void rtw_os_check_wakup_queue(_adapter *adapter, u16 os_qid) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ if (rtw_os_need_wake_queue(adapter, os_qid)) { -+ if (DBG_DUMP_OS_QUEUE_CTL) -+ RTW_INFO(FUNC_ADPT_FMT": netif_wake_subqueue[%d]\n", FUNC_ADPT_ARG(adapter), os_qid); -+ netif_wake_subqueue(adapter->pnetdev, os_qid); -+ } -+#else -+ if (rtw_os_need_wake_queue(adapter, 0)) { -+ if (DBG_DUMP_OS_QUEUE_CTL) -+ RTW_INFO(FUNC_ADPT_FMT": netif_wake_queue\n", FUNC_ADPT_ARG(adapter)); -+ netif_wake_queue(adapter->pnetdev); -+ } -+#endif -+} -+ -+bool rtw_os_check_stop_queue(_adapter *adapter, u16 os_qid) -+{ -+ bool busy = _FALSE; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ if (rtw_os_need_stop_queue(adapter, os_qid)) { -+ if (DBG_DUMP_OS_QUEUE_CTL) -+ RTW_INFO(FUNC_ADPT_FMT": netif_stop_subqueue[%d]\n", FUNC_ADPT_ARG(adapter), os_qid); -+ netif_stop_subqueue(adapter->pnetdev, os_qid); -+ busy = _TRUE; -+ } -+#else -+ if (rtw_os_need_stop_queue(adapter, 0)) { -+ if (DBG_DUMP_OS_QUEUE_CTL) -+ RTW_INFO(FUNC_ADPT_FMT": netif_stop_queue\n", FUNC_ADPT_ARG(adapter)); -+ rtw_netif_stop_queue(adapter->pnetdev); -+ busy = _TRUE; -+ } -+#endif -+ return busy; -+} -+ -+void rtw_os_wake_queue_at_free_stainfo(_adapter *padapter, int *qcnt_freed) -+{ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ int i; -+ -+ for (i = 0; i < 4; i++) { -+ if (qcnt_freed[i] == 0) -+ continue; -+ -+ if (rtw_os_need_wake_queue(padapter, i)) { -+ if (DBG_DUMP_OS_QUEUE_CTL) -+ RTW_INFO(FUNC_ADPT_FMT": netif_wake_subqueue[%d]\n", FUNC_ADPT_ARG(padapter), i); -+ netif_wake_subqueue(padapter->pnetdev, i); -+ } -+ } -+#else -+ if (qcnt_freed[0] || qcnt_freed[1] || qcnt_freed[2] || qcnt_freed[3]) { -+ if (rtw_os_need_wake_queue(padapter, 0)) { -+ if (DBG_DUMP_OS_QUEUE_CTL) -+ RTW_INFO(FUNC_ADPT_FMT": netif_wake_queue\n", FUNC_ADPT_ARG(padapter)); -+ netif_wake_queue(padapter->pnetdev); -+ } -+ } -+#endif -+} -+ -+int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; -+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX -+ struct sk_buff *skb = pkt; -+ struct sk_buff *segs, *nskb; -+ netdev_features_t features = padapter->pnetdev->features; -+#endif -+ u16 os_qid = 0; -+ s32 res = 0; -+ -+ if (padapter->registrypriv.mp_mode) { -+ RTW_INFO("MP_TX_DROP_OS_FRAME\n"); -+ goto drop_packet; -+ } -+ DBG_COUNTER(padapter->tx_logs.os_tx); -+ -+ if (rtw_if_up(padapter) == _FALSE) { -+ DBG_COUNTER(padapter->tx_logs.os_tx_err_up); -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s if_up fail\n", __FUNCTION__); -+ #endif -+ goto drop_packet; -+ } -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ os_qid = skb_get_queue_mapping(pkt); -+#endif -+ -+#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX -+ if (skb_shinfo(skb)->gso_size) { -+ /* split a big(65k) skb into several small(1.5k) skbs */ -+ features &= ~(NETIF_F_TSO | NETIF_F_TSO6); -+ segs = skb_gso_segment(skb, features); -+ if (IS_ERR(segs) || !segs) -+ goto drop_packet; -+ -+ do { -+ nskb = segs; -+ segs = segs->next; -+ nskb->next = NULL; -+ rtw_mstat_update( MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, nskb->truesize); -+ res = rtw_xmit(padapter, &nskb, os_qid); -+ if (res < 0) { -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s rtw_xmit fail\n", __FUNCTION__); -+ #endif -+ pxmitpriv->tx_drop++; -+ rtw_os_pkt_complete(padapter, nskb); -+ } -+ } while (segs); -+ rtw_os_pkt_complete(padapter, skb); -+ goto exit; -+ } -+#endif -+ -+ res = rtw_xmit(padapter, &pkt, os_qid); -+ if (res < 0) { -+ #ifdef DBG_TX_DROP_FRAME -+ RTW_INFO("DBG_TX_DROP_FRAME %s rtw_xmit fail\n", __FUNCTION__); -+ #endif -+ goto drop_packet; -+ } -+ -+ goto exit; -+ -+drop_packet: -+ pxmitpriv->tx_drop++; -+ rtw_os_pkt_complete(padapter, pkt); -+ -+exit: -+ -+ -+ return 0; -+} -+ -+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL -+int check_alibaba_meshpkt(struct sk_buff *skb) -+{ -+ u16 protocol; -+ -+ if (skb) -+ return (htons(skb->protocol) == ETH_P_ALL); -+ -+ return _FALSE; -+} -+ -+s32 rtw_alibaba_mesh_xmit_entry(_pkt *pkt, struct net_device *ndev) -+{ -+ u16 frame_ctl; -+ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); -+ struct pkt_file pktfile; -+ struct rtw_ieee80211_hdr *pwlanhdr; -+ struct pkt_attrib *pattrib; -+ struct xmit_frame *pmgntframe; -+ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); -+ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); -+ unsigned char *pframe; -+ struct sk_buff *skb = (struct sk_buff *)pkt; -+ int len = skb->len; -+ -+ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); -+ -+ pmgntframe = alloc_mgtxmitframe(pxmitpriv); -+ if (pmgntframe == NULL) { -+ goto fail; -+ return -1; -+ } -+ -+ pattrib = &pmgntframe->attrib; -+ update_mgntframe_attrib(padapter, pattrib); -+ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); -+ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; -+ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; -+ -+ _rtw_open_pktfile(pkt, &pktfile); -+ _rtw_pktfile_read(&pktfile, pframe, len); -+ -+ pattrib->type = pframe[0] & 0x0C; -+ pattrib->subtype = pframe[0] & 0xF0; -+ pattrib->raid = rtw_get_mgntframe_raid(padapter, WIRELESS_11G); -+ pattrib->rate = MGN_24M; -+ pattrib->pktlen = len; -+ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); -+ pmlmeext->mgnt_seq++; -+ -+ RTW_DBG_DUMP("rtw_alibaba_mesh_xmit_entry payload:", skb->data, len); -+ -+ pattrib->last_txcmdsz = pattrib->pktlen; -+ dump_mgntframe(padapter, pmgntframe); -+ -+fail: -+ rtw_skb_free(skb); -+ return 0; -+} -+#endif -+ -+int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) -+{ -+ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); -+ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); -+ int ret = 0; -+ -+ if (pkt) { -+#ifdef CONFIG_CUSTOMER_ALIBABA_GENERAL -+ if (check_alibaba_meshpkt(pkt)) { -+ return rtw_alibaba_mesh_xmit_entry(pkt, pnetdev); -+ } -+#endif -+ if (check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) == _TRUE) { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) -+ rtw_monitor_xmit_entry((struct sk_buff *)pkt, pnetdev); -+#endif -+ } -+ else { -+ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, pkt->truesize); -+ ret = _rtw_xmit_entry(pkt, pnetdev); -+ } -+ -+ } -+ -+ return ret; -+} -diff --git a/drivers/staging/rtl8723cs/os_dep/osdep_service.c b/drivers/staging/rtl8723cs/os_dep/osdep_service.c -new file mode 100644 -index 000000000000..82c887874d41 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/os_dep/osdep_service.c -@@ -0,0 +1,3430 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2007 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+ -+#define _OSDEP_SERVICE_C_ -+ -+#include -+ -+#define RT_TAG '1178' -+ -+#ifdef DBG_MEMORY_LEAK -+#ifdef PLATFORM_LINUX -+atomic_t _malloc_cnt = ATOMIC_INIT(0); -+atomic_t _malloc_size = ATOMIC_INIT(0); -+#endif -+#endif /* DBG_MEMORY_LEAK */ -+ -+ -+#if defined(PLATFORM_LINUX) -+/* -+* Translate the OS dependent @param error_code to OS independent RTW_STATUS_CODE -+* @return: one of RTW_STATUS_CODE -+*/ -+inline int RTW_STATUS_CODE(int error_code) -+{ -+ if (error_code >= 0) -+ return _SUCCESS; -+ -+ switch (error_code) { -+ /* case -ETIMEDOUT: */ -+ /* return RTW_STATUS_TIMEDOUT; */ -+ default: -+ return _FAIL; -+ } -+} -+#else -+inline int RTW_STATUS_CODE(int error_code) -+{ -+ return error_code; -+} -+#endif -+ -+u32 rtw_atoi(u8 *s) -+{ -+ -+ int num = 0, flag = 0; -+ int i; -+ for (i = 0; i <= strlen(s); i++) { -+ if (s[i] >= '0' && s[i] <= '9') -+ num = num * 10 + s[i] - '0'; -+ else if (s[0] == '-' && i == 0) -+ flag = 1; -+ else -+ break; -+ } -+ -+ if (flag == 1) -+ num = num * -1; -+ -+ return num; -+ -+} -+ -+inline void *_rtw_vmalloc(u32 sz) -+{ -+ void *pbuf; -+#ifdef PLATFORM_LINUX -+ pbuf = vmalloc(sz); -+#endif -+#ifdef PLATFORM_FREEBSD -+ pbuf = malloc(sz, M_DEVBUF, M_NOWAIT); -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ NdisAllocateMemoryWithTag(&pbuf, sz, RT_TAG); -+#endif -+ -+#ifdef DBG_MEMORY_LEAK -+#ifdef PLATFORM_LINUX -+ if (pbuf != NULL) { -+ atomic_inc(&_malloc_cnt); -+ atomic_add(sz, &_malloc_size); -+ } -+#endif -+#endif /* DBG_MEMORY_LEAK */ -+ -+ return pbuf; -+} -+ -+inline void *_rtw_zvmalloc(u32 sz) -+{ -+ void *pbuf; -+#ifdef PLATFORM_LINUX -+ pbuf = _rtw_vmalloc(sz); -+ if (pbuf != NULL) -+ memset(pbuf, 0, sz); -+#endif -+#ifdef PLATFORM_FREEBSD -+ pbuf = malloc(sz, M_DEVBUF, M_ZERO | M_NOWAIT); -+#endif -+#ifdef PLATFORM_WINDOWS -+ NdisAllocateMemoryWithTag(&pbuf, sz, RT_TAG); -+ if (pbuf != NULL) -+ NdisFillMemory(pbuf, sz, 0); -+#endif -+ -+ return pbuf; -+} -+ -+inline void _rtw_vmfree(void *pbuf, u32 sz) -+{ -+#ifdef PLATFORM_LINUX -+ vfree(pbuf); -+#endif -+#ifdef PLATFORM_FREEBSD -+ free(pbuf, M_DEVBUF); -+#endif -+#ifdef PLATFORM_WINDOWS -+ NdisFreeMemory(pbuf, sz, 0); -+#endif -+ -+#ifdef DBG_MEMORY_LEAK -+#ifdef PLATFORM_LINUX -+ atomic_dec(&_malloc_cnt); -+ atomic_sub(sz, &_malloc_size); -+#endif -+#endif /* DBG_MEMORY_LEAK */ -+} -+ -+void *_rtw_malloc(u32 sz) -+{ -+ void *pbuf = NULL; -+ -+#ifdef PLATFORM_LINUX -+#ifdef RTK_DMP_PLATFORM -+ if (sz > 0x4000) -+ pbuf = dvr_malloc(sz); -+ else -+#endif -+ pbuf = kmalloc(sz, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ pbuf = malloc(sz, M_DEVBUF, M_NOWAIT); -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisAllocateMemoryWithTag(&pbuf, sz, RT_TAG); -+ -+#endif -+ -+#ifdef DBG_MEMORY_LEAK -+#ifdef PLATFORM_LINUX -+ if (pbuf != NULL) { -+ atomic_inc(&_malloc_cnt); -+ atomic_add(sz, &_malloc_size); -+ } -+#endif -+#endif /* DBG_MEMORY_LEAK */ -+ -+ return pbuf; -+ -+} -+ -+ -+void *_rtw_zmalloc(u32 sz) -+{ -+#ifdef PLATFORM_FREEBSD -+ return malloc(sz, M_DEVBUF, M_ZERO | M_NOWAIT); -+#else /* PLATFORM_FREEBSD */ -+ void *pbuf = _rtw_malloc(sz); -+ -+ if (pbuf != NULL) { -+ -+#ifdef PLATFORM_LINUX -+ memset(pbuf, 0, sz); -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ NdisFillMemory(pbuf, sz, 0); -+#endif -+ -+ } -+ -+ return pbuf; -+#endif /* PLATFORM_FREEBSD */ -+} -+ -+void _rtw_mfree(void *pbuf, u32 sz) -+{ -+ -+#ifdef PLATFORM_LINUX -+#ifdef RTK_DMP_PLATFORM -+ if (sz > 0x4000) -+ dvr_free(pbuf); -+ else -+#endif -+ kfree(pbuf); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ free(pbuf, M_DEVBUF); -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisFreeMemory(pbuf, sz, 0); -+ -+#endif -+ -+#ifdef DBG_MEMORY_LEAK -+#ifdef PLATFORM_LINUX -+ atomic_dec(&_malloc_cnt); -+ atomic_sub(sz, &_malloc_size); -+#endif -+#endif /* DBG_MEMORY_LEAK */ -+ -+} -+ -+#ifdef PLATFORM_FREEBSD -+/* review again */ -+struct sk_buff *dev_alloc_skb(unsigned int size) -+{ -+ struct sk_buff *skb = NULL; -+ u8 *data = NULL; -+ -+ /* skb = _rtw_zmalloc(sizeof(struct sk_buff)); */ /* for skb->len, etc. */ -+ skb = _rtw_malloc(sizeof(struct sk_buff)); -+ if (!skb) -+ goto out; -+ data = _rtw_malloc(size); -+ if (!data) -+ goto nodata; -+ -+ skb->head = (unsigned char *)data; -+ skb->data = (unsigned char *)data; -+ skb->tail = (unsigned char *)data; -+ skb->end = (unsigned char *)data + size; -+ skb->len = 0; -+ /* printf("%s()-%d: skb=%p, skb->head = %p\n", __FUNCTION__, __LINE__, skb, skb->head); */ -+ -+out: -+ return skb; -+nodata: -+ _rtw_mfree(skb, sizeof(struct sk_buff)); -+ skb = NULL; -+ goto out; -+ -+} -+ -+void dev_kfree_skb_any(struct sk_buff *skb) -+{ -+ /* printf("%s()-%d: skb->head = %p\n", __FUNCTION__, __LINE__, skb->head); */ -+ if (skb->head) -+ _rtw_mfree(skb->head, 0); -+ /* printf("%s()-%d: skb = %p\n", __FUNCTION__, __LINE__, skb); */ -+ if (skb) -+ _rtw_mfree(skb, 0); -+} -+struct sk_buff *skb_clone(const struct sk_buff *skb) -+{ -+ return NULL; -+} -+ -+#endif /* PLATFORM_FREEBSD */ -+ -+inline struct sk_buff *_rtw_skb_alloc(u32 sz) -+{ -+#ifdef PLATFORM_LINUX -+ return __dev_alloc_skb(sz, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); -+#endif /* PLATFORM_LINUX */ -+ -+#ifdef PLATFORM_FREEBSD -+ return dev_alloc_skb(sz); -+#endif /* PLATFORM_FREEBSD */ -+} -+ -+inline void _rtw_skb_free(struct sk_buff *skb) -+{ -+ dev_kfree_skb_any(skb); -+} -+ -+inline struct sk_buff *_rtw_skb_copy(const struct sk_buff *skb) -+{ -+#ifdef PLATFORM_LINUX -+ return skb_copy(skb, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); -+#endif /* PLATFORM_LINUX */ -+ -+#ifdef PLATFORM_FREEBSD -+ return NULL; -+#endif /* PLATFORM_FREEBSD */ -+} -+ -+inline struct sk_buff *_rtw_skb_clone(struct sk_buff *skb) -+{ -+#ifdef PLATFORM_LINUX -+ return skb_clone(skb, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); -+#endif /* PLATFORM_LINUX */ -+ -+#ifdef PLATFORM_FREEBSD -+ return skb_clone(skb); -+#endif /* PLATFORM_FREEBSD */ -+} -+inline struct sk_buff *_rtw_pskb_copy(struct sk_buff *skb) -+{ -+#ifdef PLATFORM_LINUX -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) -+ return pskb_copy(skb, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); -+#else -+ return skb_clone(skb, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); -+#endif -+#endif /* PLATFORM_LINUX */ -+ -+#ifdef PLATFORM_FREEBSD -+ return NULL; -+#endif /* PLATFORM_FREEBSD */ -+} -+ -+inline int _rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb) -+{ -+#if defined(PLATFORM_LINUX) -+ skb->dev = ndev; -+ return netif_rx(skb); -+#elif defined(PLATFORM_FREEBSD) -+ return (*ndev->if_input)(ndev, skb); -+#else -+ rtw_warn_on(1); -+ return -1; -+#endif -+} -+ -+#ifdef CONFIG_RTW_NAPI -+inline int _rtw_netif_receive_skb(_nic_hdl ndev, struct sk_buff *skb) -+{ -+#if defined(PLATFORM_LINUX) -+ skb->dev = ndev; -+ return netif_receive_skb(skb); -+#else -+ rtw_warn_on(1); -+ return -1; -+#endif -+} -+ -+#ifdef CONFIG_RTW_GRO -+inline gro_result_t _rtw_napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb) -+{ -+#if defined(PLATFORM_LINUX) -+ return napi_gro_receive(napi, skb); -+#else -+ rtw_warn_on(1); -+ return -1; -+#endif -+} -+#endif /* CONFIG_RTW_GRO */ -+#endif /* CONFIG_RTW_NAPI */ -+ -+void _rtw_skb_queue_purge(struct sk_buff_head *list) -+{ -+ struct sk_buff *skb; -+ -+ while ((skb = skb_dequeue(list)) != NULL) -+ _rtw_skb_free(skb); -+} -+ -+#ifdef CONFIG_USB_HCI -+inline void *_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma) -+{ -+#ifdef PLATFORM_LINUX -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ return usb_alloc_coherent(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma); -+#else -+ return usb_buffer_alloc(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma); -+#endif -+#endif /* PLATFORM_LINUX */ -+ -+#ifdef PLATFORM_FREEBSD -+ return malloc(size, M_USBDEV, M_NOWAIT | M_ZERO); -+#endif /* PLATFORM_FREEBSD */ -+} -+inline void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma) -+{ -+#ifdef PLATFORM_LINUX -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ usb_free_coherent(dev, size, addr, dma); -+#else -+ usb_buffer_free(dev, size, addr, dma); -+#endif -+#endif /* PLATFORM_LINUX */ -+ -+#ifdef PLATFORM_FREEBSD -+ free(addr, M_USBDEV); -+#endif /* PLATFORM_FREEBSD */ -+} -+#endif /* CONFIG_USB_HCI */ -+ -+#if defined(DBG_MEM_ALLOC) -+ -+struct rtw_mem_stat { -+ ATOMIC_T alloc; /* the memory bytes we allocate currently */ -+ ATOMIC_T peak; /* the peak memory bytes we allocate */ -+ ATOMIC_T alloc_cnt; /* the alloc count for alloc currently */ -+ ATOMIC_T alloc_err_cnt; /* the error times we fail to allocate memory */ -+}; -+ -+struct rtw_mem_stat rtw_mem_type_stat[mstat_tf_idx(MSTAT_TYPE_MAX)]; -+#ifdef RTW_MEM_FUNC_STAT -+struct rtw_mem_stat rtw_mem_func_stat[mstat_ff_idx(MSTAT_FUNC_MAX)]; -+#endif -+ -+char *MSTAT_TYPE_str[] = { -+ "VIR", -+ "PHY", -+ "SKB", -+ "USB", -+}; -+ -+#ifdef RTW_MEM_FUNC_STAT -+char *MSTAT_FUNC_str[] = { -+ "UNSP", -+ "IO", -+ "TXIO", -+ "RXIO", -+ "TX", -+ "RX", -+}; -+#endif -+ -+void rtw_mstat_dump(void *sel) -+{ -+ int i; -+ int value_t[4][mstat_tf_idx(MSTAT_TYPE_MAX)]; -+#ifdef RTW_MEM_FUNC_STAT -+ int value_f[4][mstat_ff_idx(MSTAT_FUNC_MAX)]; -+#endif -+ -+ for (i = 0; i < mstat_tf_idx(MSTAT_TYPE_MAX); i++) { -+ value_t[0][i] = ATOMIC_READ(&(rtw_mem_type_stat[i].alloc)); -+ value_t[1][i] = ATOMIC_READ(&(rtw_mem_type_stat[i].peak)); -+ value_t[2][i] = ATOMIC_READ(&(rtw_mem_type_stat[i].alloc_cnt)); -+ value_t[3][i] = ATOMIC_READ(&(rtw_mem_type_stat[i].alloc_err_cnt)); -+ } -+ -+#ifdef RTW_MEM_FUNC_STAT -+ for (i = 0; i < mstat_ff_idx(MSTAT_FUNC_MAX); i++) { -+ value_f[0][i] = ATOMIC_READ(&(rtw_mem_func_stat[i].alloc)); -+ value_f[1][i] = ATOMIC_READ(&(rtw_mem_func_stat[i].peak)); -+ value_f[2][i] = ATOMIC_READ(&(rtw_mem_func_stat[i].alloc_cnt)); -+ value_f[3][i] = ATOMIC_READ(&(rtw_mem_func_stat[i].alloc_err_cnt)); -+ } -+#endif -+ -+ RTW_PRINT_SEL(sel, "===================== MSTAT =====================\n"); -+ RTW_PRINT_SEL(sel, "%4s %10s %10s %10s %10s\n", "TAG", "alloc", "peak", "aloc_cnt", "err_cnt"); -+ RTW_PRINT_SEL(sel, "-------------------------------------------------\n"); -+ for (i = 0; i < mstat_tf_idx(MSTAT_TYPE_MAX); i++) -+ RTW_PRINT_SEL(sel, "%4s %10d %10d %10d %10d\n", MSTAT_TYPE_str[i], value_t[0][i], value_t[1][i], value_t[2][i], value_t[3][i]); -+#ifdef RTW_MEM_FUNC_STAT -+ RTW_PRINT_SEL(sel, "-------------------------------------------------\n"); -+ for (i = 0; i < mstat_ff_idx(MSTAT_FUNC_MAX); i++) -+ RTW_PRINT_SEL(sel, "%4s %10d %10d %10d %10d\n", MSTAT_FUNC_str[i], value_f[0][i], value_f[1][i], value_f[2][i], value_f[3][i]); -+#endif -+} -+ -+void rtw_mstat_update(const enum mstat_f flags, const MSTAT_STATUS status, u32 sz) -+{ -+ static systime update_time = 0; -+ int peak, alloc; -+ int i; -+ -+ /* initialization */ -+ if (!update_time) { -+ for (i = 0; i < mstat_tf_idx(MSTAT_TYPE_MAX); i++) { -+ ATOMIC_SET(&(rtw_mem_type_stat[i].alloc), 0); -+ ATOMIC_SET(&(rtw_mem_type_stat[i].peak), 0); -+ ATOMIC_SET(&(rtw_mem_type_stat[i].alloc_cnt), 0); -+ ATOMIC_SET(&(rtw_mem_type_stat[i].alloc_err_cnt), 0); -+ } -+ #ifdef RTW_MEM_FUNC_STAT -+ for (i = 0; i < mstat_ff_idx(MSTAT_FUNC_MAX); i++) { -+ ATOMIC_SET(&(rtw_mem_func_stat[i].alloc), 0); -+ ATOMIC_SET(&(rtw_mem_func_stat[i].peak), 0); -+ ATOMIC_SET(&(rtw_mem_func_stat[i].alloc_cnt), 0); -+ ATOMIC_SET(&(rtw_mem_func_stat[i].alloc_err_cnt), 0); -+ } -+ #endif -+ } -+ -+ switch (status) { -+ case MSTAT_ALLOC_SUCCESS: -+ ATOMIC_INC(&(rtw_mem_type_stat[mstat_tf_idx(flags)].alloc_cnt)); -+ alloc = ATOMIC_ADD_RETURN(&(rtw_mem_type_stat[mstat_tf_idx(flags)].alloc), sz); -+ peak = ATOMIC_READ(&(rtw_mem_type_stat[mstat_tf_idx(flags)].peak)); -+ if (peak < alloc) -+ ATOMIC_SET(&(rtw_mem_type_stat[mstat_tf_idx(flags)].peak), alloc); -+ -+ #ifdef RTW_MEM_FUNC_STAT -+ ATOMIC_INC(&(rtw_mem_func_stat[mstat_ff_idx(flags)].alloc_cnt)); -+ alloc = ATOMIC_ADD_RETURN(&(rtw_mem_func_stat[mstat_ff_idx(flags)].alloc), sz); -+ peak = ATOMIC_READ(&(rtw_mem_func_stat[mstat_ff_idx(flags)].peak)); -+ if (peak < alloc) -+ ATOMIC_SET(&(rtw_mem_func_stat[mstat_ff_idx(flags)].peak), alloc); -+ #endif -+ break; -+ -+ case MSTAT_ALLOC_FAIL: -+ ATOMIC_INC(&(rtw_mem_type_stat[mstat_tf_idx(flags)].alloc_err_cnt)); -+ #ifdef RTW_MEM_FUNC_STAT -+ ATOMIC_INC(&(rtw_mem_func_stat[mstat_ff_idx(flags)].alloc_err_cnt)); -+ #endif -+ break; -+ -+ case MSTAT_FREE: -+ ATOMIC_DEC(&(rtw_mem_type_stat[mstat_tf_idx(flags)].alloc_cnt)); -+ ATOMIC_SUB(&(rtw_mem_type_stat[mstat_tf_idx(flags)].alloc), sz); -+ #ifdef RTW_MEM_FUNC_STAT -+ ATOMIC_DEC(&(rtw_mem_func_stat[mstat_ff_idx(flags)].alloc_cnt)); -+ ATOMIC_SUB(&(rtw_mem_func_stat[mstat_ff_idx(flags)].alloc), sz); -+ #endif -+ break; -+ }; -+ -+ /* if (rtw_get_passing_time_ms(update_time) > 5000) { */ -+ /* rtw_mstat_dump(RTW_DBGDUMP); */ -+ update_time = rtw_get_current_time(); -+ /* } */ -+} -+ -+#ifndef SIZE_MAX -+ #define SIZE_MAX (~(size_t)0) -+#endif -+ -+struct mstat_sniff_rule { -+ enum mstat_f flags; -+ size_t lb; -+ size_t hb; -+}; -+ -+struct mstat_sniff_rule mstat_sniff_rules[] = { -+ {MSTAT_TYPE_PHY, 4097, SIZE_MAX}, -+}; -+ -+int mstat_sniff_rule_num = sizeof(mstat_sniff_rules) / sizeof(struct mstat_sniff_rule); -+ -+bool match_mstat_sniff_rules(const enum mstat_f flags, const size_t size) -+{ -+ int i; -+ for (i = 0; i < mstat_sniff_rule_num; i++) { -+ if (mstat_sniff_rules[i].flags == flags -+ && mstat_sniff_rules[i].lb <= size -+ && mstat_sniff_rules[i].hb >= size) -+ return _TRUE; -+ } -+ -+ return _FALSE; -+} -+ -+inline void *dbg_rtw_vmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line) -+{ -+ void *p; -+ -+ if (match_mstat_sniff_rules(flags, sz)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); -+ -+ p = _rtw_vmalloc((sz)); -+ -+ rtw_mstat_update( -+ flags -+ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , sz -+ ); -+ -+ return p; -+} -+ -+inline void *dbg_rtw_zvmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line) -+{ -+ void *p; -+ -+ if (match_mstat_sniff_rules(flags, sz)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); -+ -+ p = _rtw_zvmalloc((sz)); -+ -+ rtw_mstat_update( -+ flags -+ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , sz -+ ); -+ -+ return p; -+} -+ -+inline void dbg_rtw_vmfree(void *pbuf, u32 sz, const enum mstat_f flags, const char *func, const int line) -+{ -+ -+ if (match_mstat_sniff_rules(flags, sz)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); -+ -+ _rtw_vmfree((pbuf), (sz)); -+ -+ rtw_mstat_update( -+ flags -+ , MSTAT_FREE -+ , sz -+ ); -+} -+ -+inline void *dbg_rtw_malloc(u32 sz, const enum mstat_f flags, const char *func, const int line) -+{ -+ void *p; -+ -+ if (match_mstat_sniff_rules(flags, sz)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); -+ -+ p = _rtw_malloc((sz)); -+ -+ rtw_mstat_update( -+ flags -+ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , sz -+ ); -+ -+ return p; -+} -+ -+inline void *dbg_rtw_zmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line) -+{ -+ void *p; -+ -+ if (match_mstat_sniff_rules(flags, sz)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); -+ -+ p = _rtw_zmalloc((sz)); -+ -+ rtw_mstat_update( -+ flags -+ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , sz -+ ); -+ -+ return p; -+} -+ -+inline void dbg_rtw_mfree(void *pbuf, u32 sz, const enum mstat_f flags, const char *func, const int line) -+{ -+ if (match_mstat_sniff_rules(flags, sz)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); -+ -+ _rtw_mfree((pbuf), (sz)); -+ -+ rtw_mstat_update( -+ flags -+ , MSTAT_FREE -+ , sz -+ ); -+} -+ -+inline struct sk_buff *dbg_rtw_skb_alloc(unsigned int size, const enum mstat_f flags, const char *func, int line) -+{ -+ struct sk_buff *skb; -+ unsigned int truesize = 0; -+ -+ skb = _rtw_skb_alloc(size); -+ -+ if (skb) -+ truesize = skb->truesize; -+ -+ if (!skb || truesize < size || match_mstat_sniff_rules(flags, truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d), skb:%p, truesize=%u\n", func, line, __FUNCTION__, size, skb, truesize); -+ -+ rtw_mstat_update( -+ flags -+ , skb ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , truesize -+ ); -+ -+ return skb; -+} -+ -+inline void dbg_rtw_skb_free(struct sk_buff *skb, const enum mstat_f flags, const char *func, int line) -+{ -+ unsigned int truesize = skb->truesize; -+ -+ if (match_mstat_sniff_rules(flags, truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); -+ -+ _rtw_skb_free(skb); -+ -+ rtw_mstat_update( -+ flags -+ , MSTAT_FREE -+ , truesize -+ ); -+} -+ -+inline struct sk_buff *dbg_rtw_skb_copy(const struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line) -+{ -+ struct sk_buff *skb_cp; -+ unsigned int truesize = skb->truesize; -+ unsigned int cp_truesize = 0; -+ -+ skb_cp = _rtw_skb_copy(skb); -+ if (skb_cp) -+ cp_truesize = skb_cp->truesize; -+ -+ if (!skb_cp || cp_truesize < truesize || match_mstat_sniff_rules(flags, cp_truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%u), skb_cp:%p, cp_truesize=%u\n", func, line, __FUNCTION__, truesize, skb_cp, cp_truesize); -+ -+ rtw_mstat_update( -+ flags -+ , skb_cp ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , cp_truesize -+ ); -+ -+ return skb_cp; -+} -+ -+inline struct sk_buff *dbg_rtw_skb_clone(struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line) -+{ -+ struct sk_buff *skb_cl; -+ unsigned int truesize = skb->truesize; -+ unsigned int cl_truesize = 0; -+ -+ skb_cl = _rtw_skb_clone(skb); -+ if (skb_cl) -+ cl_truesize = skb_cl->truesize; -+ -+ if (!skb_cl || cl_truesize < truesize || match_mstat_sniff_rules(flags, cl_truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%u), skb_cl:%p, cl_truesize=%u\n", func, line, __FUNCTION__, truesize, skb_cl, cl_truesize); -+ -+ rtw_mstat_update( -+ flags -+ , skb_cl ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , cl_truesize -+ ); -+ -+ return skb_cl; -+} -+ -+inline int dbg_rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb, const enum mstat_f flags, const char *func, int line) -+{ -+ int ret; -+ unsigned int truesize = skb->truesize; -+ -+ if (match_mstat_sniff_rules(flags, truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); -+ -+ ret = _rtw_netif_rx(ndev, skb); -+ -+ rtw_mstat_update( -+ flags -+ , MSTAT_FREE -+ , truesize -+ ); -+ -+ return ret; -+} -+ -+#ifdef CONFIG_RTW_NAPI -+inline int dbg_rtw_netif_receive_skb(_nic_hdl ndev, struct sk_buff *skb, const enum mstat_f flags, const char *func, int line) -+{ -+ int ret; -+ unsigned int truesize = skb->truesize; -+ -+ if (match_mstat_sniff_rules(flags, truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); -+ -+ ret = _rtw_netif_receive_skb(ndev, skb); -+ -+ rtw_mstat_update( -+ flags -+ , MSTAT_FREE -+ , truesize -+ ); -+ -+ return ret; -+} -+ -+#ifdef CONFIG_RTW_GRO -+inline gro_result_t dbg_rtw_napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb, const enum mstat_f flags, const char *func, int line) -+{ -+ int ret; -+ unsigned int truesize = skb->truesize; -+ -+ if (match_mstat_sniff_rules(flags, truesize)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); -+ -+ ret = _rtw_napi_gro_receive(napi, skb); -+ -+ rtw_mstat_update( -+ flags -+ , MSTAT_FREE -+ , truesize -+ ); -+ -+ return ret; -+} -+#endif /* CONFIG_RTW_GRO */ -+#endif /* CONFIG_RTW_NAPI */ -+ -+inline void dbg_rtw_skb_queue_purge(struct sk_buff_head *list, enum mstat_f flags, const char *func, int line) -+{ -+ struct sk_buff *skb; -+ -+ while ((skb = skb_dequeue(list)) != NULL) -+ dbg_rtw_skb_free(skb, flags, func, line); -+} -+ -+#ifdef CONFIG_USB_HCI -+inline void *dbg_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma, const enum mstat_f flags, const char *func, int line) -+{ -+ void *p; -+ -+ if (match_mstat_sniff_rules(flags, size)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%zu)\n", func, line, __FUNCTION__, size); -+ -+ p = _rtw_usb_buffer_alloc(dev, size, dma); -+ -+ rtw_mstat_update( -+ flags -+ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL -+ , size -+ ); -+ -+ return p; -+} -+ -+inline void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma, const enum mstat_f flags, const char *func, int line) -+{ -+ -+ if (match_mstat_sniff_rules(flags, size)) -+ RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%zu)\n", func, line, __FUNCTION__, size); -+ -+ _rtw_usb_buffer_free(dev, size, addr, dma); -+ -+ rtw_mstat_update( -+ flags -+ , MSTAT_FREE -+ , size -+ ); -+} -+#endif /* CONFIG_USB_HCI */ -+ -+#endif /* defined(DBG_MEM_ALLOC) */ -+ -+void *rtw_malloc2d(int h, int w, size_t size) -+{ -+ int j; -+ -+ void **a = (void **) rtw_zmalloc(h * sizeof(void *) + h * w * size); -+ if (a == NULL) { -+ RTW_INFO("%s: alloc memory fail!\n", __FUNCTION__); -+ return NULL; -+ } -+ -+ for (j = 0; j < h; j++) -+ a[j] = ((char *)(a + h)) + j * w * size; -+ -+ return a; -+} -+ -+void rtw_mfree2d(void *pbuf, int h, int w, int size) -+{ -+ rtw_mfree((u8 *)pbuf, h * sizeof(void *) + w * h * size); -+} -+ -+inline void rtw_os_pkt_free(_pkt *pkt) -+{ -+#if defined(PLATFORM_LINUX) -+ rtw_skb_free(pkt); -+#elif defined(PLATFORM_FREEBSD) -+ m_freem(pkt); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+inline _pkt *rtw_os_pkt_copy(_pkt *pkt) -+{ -+#if defined(PLATFORM_LINUX) -+ return rtw_skb_copy(pkt); -+#elif defined(PLATFORM_FREEBSD) -+ return m_dup(pkt, M_NOWAIT); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+inline void *rtw_os_pkt_data(_pkt *pkt) -+{ -+#if defined(PLATFORM_LINUX) -+ return pkt->data; -+#elif defined(PLATFORM_FREEBSD) -+ return pkt->m_data; -+#else -+ #error "TBD\n" -+#endif -+} -+ -+inline u32 rtw_os_pkt_len(_pkt *pkt) -+{ -+#if defined(PLATFORM_LINUX) -+ return pkt->len; -+#elif defined(PLATFORM_FREEBSD) -+ return pkt->m_pkthdr.len; -+#else -+ #error "TBD\n" -+#endif -+} -+ -+void _rtw_memcpy(void *dst, const void *src, u32 sz) -+{ -+ -+#if defined(PLATFORM_LINUX) || defined (PLATFORM_FREEBSD) -+ -+ memcpy(dst, src, sz); -+ -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ -+ NdisMoveMemory(dst, src, sz); -+ -+#endif -+ -+} -+ -+inline void _rtw_memmove(void *dst, const void *src, u32 sz) -+{ -+#if defined(PLATFORM_LINUX) -+ memmove(dst, src, sz); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+int _rtw_memcmp(const void *dst, const void *src, u32 sz) -+{ -+ -+#if defined(PLATFORM_LINUX) || defined (PLATFORM_FREEBSD) -+ /* under Linux/GNU/GLibc, the return value of memcmp for two same mem. chunk is 0 */ -+ -+ if (!(memcmp(dst, src, sz))) -+ return _TRUE; -+ else -+ return _FALSE; -+#endif -+ -+ -+#ifdef PLATFORM_WINDOWS -+ /* under Windows, the return value of NdisEqualMemory for two same mem. chunk is 1 */ -+ -+ if (NdisEqualMemory(dst, src, sz)) -+ return _TRUE; -+ else -+ return _FALSE; -+ -+#endif -+ -+ -+ -+} -+ -+int _rtw_memcmp2(const void *dst, const void *src, u32 sz) -+{ -+ const unsigned char *p1 = dst, *p2 = src; -+ -+ if (sz == 0) -+ return 0; -+ -+ while (*p1 == *p2) { -+ p1++; -+ p2++; -+ sz--; -+ if (sz == 0) -+ return 0; -+ } -+ -+ return *p1 - *p2; -+} -+ -+void _rtw_memset(void *pbuf, int c, u32 sz) -+{ -+ -+#if defined(PLATFORM_LINUX) || defined (PLATFORM_FREEBSD) -+ -+ memset(pbuf, c, sz); -+ -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+#if 0 -+ NdisZeroMemory(pbuf, sz); -+ if (c != 0) -+ memset(pbuf, c, sz); -+#else -+ NdisFillMemory(pbuf, sz, c); -+#endif -+#endif -+ -+} -+ -+#ifdef PLATFORM_FREEBSD -+static inline void __list_add(_list *pnew, _list *pprev, _list *pnext) -+{ -+ pnext->prev = pnew; -+ pnew->next = pnext; -+ pnew->prev = pprev; -+ pprev->next = pnew; -+} -+#endif /* PLATFORM_FREEBSD */ -+ -+ -+void _rtw_init_listhead(_list *list) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ INIT_LIST_HEAD(list); -+ -+#endif -+ -+#ifdef PLATFORM_FREEBSD -+ list->next = list; -+ list->prev = list; -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisInitializeListHead(list); -+ -+#endif -+ -+} -+ -+ -+/* -+For the following list_xxx operations, -+caller must guarantee the atomic context. -+Otherwise, there will be racing condition. -+*/ -+u32 rtw_is_list_empty(_list *phead) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ if (list_empty(phead)) -+ return _TRUE; -+ else -+ return _FALSE; -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ -+ if (phead->next == phead) -+ return _TRUE; -+ else -+ return _FALSE; -+ -+#endif -+ -+ -+#ifdef PLATFORM_WINDOWS -+ -+ if (IsListEmpty(phead)) -+ return _TRUE; -+ else -+ return _FALSE; -+ -+#endif -+ -+ -+} -+ -+void rtw_list_insert_head(_list *plist, _list *phead) -+{ -+ -+#ifdef PLATFORM_LINUX -+ list_add(plist, phead); -+#endif -+ -+#ifdef PLATFORM_FREEBSD -+ __list_add(plist, phead, phead->next); -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ InsertHeadList(phead, plist); -+#endif -+} -+ -+void rtw_list_insert_tail(_list *plist, _list *phead) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ list_add_tail(plist, phead); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ -+ __list_add(plist, phead->prev, phead); -+ -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ InsertTailList(phead, plist); -+ -+#endif -+ -+} -+ -+inline void rtw_list_splice(_list *list, _list *head) -+{ -+#ifdef PLATFORM_LINUX -+ list_splice(list, head); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+inline void rtw_list_splice_init(_list *list, _list *head) -+{ -+#ifdef PLATFORM_LINUX -+ list_splice_init(list, head); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+inline void rtw_list_splice_tail(_list *list, _list *head) -+{ -+#ifdef PLATFORM_LINUX -+ #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27)) -+ if (!list_empty(list)) -+ __list_splice(list, head); -+ #else -+ list_splice_tail(list, head); -+ #endif -+#else -+ #error "TBD\n" -+#endif -+} -+ -+inline void rtw_hlist_head_init(rtw_hlist_head *h) -+{ -+#ifdef PLATFORM_LINUX -+ INIT_HLIST_HEAD(h); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+inline void rtw_hlist_add_head(rtw_hlist_node *n, rtw_hlist_head *h) -+{ -+#ifdef PLATFORM_LINUX -+ hlist_add_head(n, h); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+inline void rtw_hlist_del(rtw_hlist_node *n) -+{ -+#ifdef PLATFORM_LINUX -+ hlist_del(n); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+inline void rtw_hlist_add_head_rcu(rtw_hlist_node *n, rtw_hlist_head *h) -+{ -+#ifdef PLATFORM_LINUX -+ hlist_add_head_rcu(n, h); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+inline void rtw_hlist_del_rcu(rtw_hlist_node *n) -+{ -+#ifdef PLATFORM_LINUX -+ hlist_del_rcu(n); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+void rtw_init_timer(_timer *ptimer, void *padapter, void *pfunc, void *ctx) -+{ -+ _adapter *adapter = (_adapter *)padapter; -+ -+#ifdef PLATFORM_LINUX -+ _init_timer(ptimer, adapter->pnetdev, pfunc, ctx); -+#endif -+#ifdef PLATFORM_FREEBSD -+ _init_timer(ptimer, adapter->pifp, pfunc, ctx); -+#endif -+#ifdef PLATFORM_WINDOWS -+ _init_timer(ptimer, adapter->hndis_adapter, pfunc, ctx); -+#endif -+} -+ -+/* -+ -+Caller must check if the list is empty before calling rtw_list_delete -+ -+*/ -+ -+ -+void _rtw_init_sema(_sema *sema, int init_val) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ sema_init(sema, init_val); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ sema_init(sema, init_val, "rtw_drv"); -+#endif -+#ifdef PLATFORM_OS_XP -+ -+ KeInitializeSemaphore(sema, init_val, SEMA_UPBND); /* count=0; */ -+ -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ if (*sema == NULL) -+ *sema = CreateSemaphore(NULL, init_val, SEMA_UPBND, NULL); -+#endif -+ -+} -+ -+void _rtw_free_sema(_sema *sema) -+{ -+#ifdef PLATFORM_FREEBSD -+ sema_destroy(sema); -+#endif -+#ifdef PLATFORM_OS_CE -+ CloseHandle(*sema); -+#endif -+ -+} -+ -+void _rtw_up_sema(_sema *sema) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ up(sema); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ sema_post(sema); -+#endif -+#ifdef PLATFORM_OS_XP -+ -+ KeReleaseSemaphore(sema, IO_NETWORK_INCREMENT, 1, FALSE); -+ -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ ReleaseSemaphore(*sema, 1, NULL); -+#endif -+} -+ -+u32 _rtw_down_sema(_sema *sema) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ if (down_interruptible(sema)) -+ return _FAIL; -+ else -+ return _SUCCESS; -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ sema_wait(sema); -+ return _SUCCESS; -+#endif -+#ifdef PLATFORM_OS_XP -+ -+ if (STATUS_SUCCESS == KeWaitForSingleObject(sema, Executive, KernelMode, TRUE, NULL)) -+ return _SUCCESS; -+ else -+ return _FAIL; -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ if (WAIT_OBJECT_0 == WaitForSingleObject(*sema, INFINITE)) -+ return _SUCCESS; -+ else -+ return _FAIL; -+#endif -+} -+ -+inline void thread_exit(_completion *comp) -+{ -+#ifdef PLATFORM_LINUX -+ complete_and_exit(comp, 0); -+#endif -+ -+#ifdef PLATFORM_FREEBSD -+ printf("%s", "RTKTHREAD_exit"); -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ ExitThread(STATUS_SUCCESS); -+#endif -+ -+#ifdef PLATFORM_OS_XP -+ PsTerminateSystemThread(STATUS_SUCCESS); -+#endif -+} -+ -+inline void _rtw_init_completion(_completion *comp) -+{ -+#ifdef PLATFORM_LINUX -+ init_completion(comp); -+#endif -+} -+inline void _rtw_wait_for_comp_timeout(_completion *comp) -+{ -+#ifdef PLATFORM_LINUX -+ wait_for_completion_timeout(comp, msecs_to_jiffies(3000)); -+#endif -+} -+inline void _rtw_wait_for_comp(_completion *comp) -+{ -+#ifdef PLATFORM_LINUX -+ wait_for_completion(comp); -+#endif -+} -+ -+void _rtw_mutex_init(_mutex *pmutex) -+{ -+#ifdef PLATFORM_LINUX -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) -+ mutex_init(pmutex); -+#else -+ init_MUTEX(pmutex); -+#endif -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ mtx_init(pmutex, "", NULL, MTX_DEF | MTX_RECURSE); -+#endif -+#ifdef PLATFORM_OS_XP -+ -+ KeInitializeMutex(pmutex, 0); -+ -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ *pmutex = CreateMutex(NULL, _FALSE, NULL); -+#endif -+} -+ -+void _rtw_mutex_free(_mutex *pmutex); -+void _rtw_mutex_free(_mutex *pmutex) -+{ -+#ifdef PLATFORM_LINUX -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) -+ mutex_destroy(pmutex); -+#else -+#endif -+ -+#ifdef PLATFORM_FREEBSD -+ sema_destroy(pmutex); -+#endif -+ -+#endif -+ -+#ifdef PLATFORM_OS_XP -+ -+#endif -+ -+#ifdef PLATFORM_OS_CE -+ -+#endif -+} -+ -+void _rtw_spinlock_init(_lock *plock) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ spin_lock_init(plock); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ mtx_init(plock, "", NULL, MTX_DEF | MTX_RECURSE); -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisAllocateSpinLock(plock); -+ -+#endif -+ -+} -+ -+void _rtw_spinlock_free(_lock *plock) -+{ -+#ifdef PLATFORM_FREEBSD -+ mtx_destroy(plock); -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ -+ NdisFreeSpinLock(plock); -+ -+#endif -+ -+} -+#ifdef PLATFORM_FREEBSD -+extern PADAPTER prtw_lock; -+ -+void rtw_mtx_lock(_lock *plock) -+{ -+ if (prtw_lock) -+ mtx_lock(&prtw_lock->glock); -+ else -+ printf("%s prtw_lock==NULL", __FUNCTION__); -+} -+void rtw_mtx_unlock(_lock *plock) -+{ -+ if (prtw_lock) -+ mtx_unlock(&prtw_lock->glock); -+ else -+ printf("%s prtw_lock==NULL", __FUNCTION__); -+ -+} -+#endif /* PLATFORM_FREEBSD */ -+ -+ -+void _rtw_spinlock(_lock *plock) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ spin_lock(plock); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ mtx_lock(plock); -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisAcquireSpinLock(plock); -+ -+#endif -+ -+} -+ -+void _rtw_spinunlock(_lock *plock) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ spin_unlock(plock); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ mtx_unlock(plock); -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisReleaseSpinLock(plock); -+ -+#endif -+} -+ -+ -+void _rtw_spinlock_ex(_lock *plock) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ spin_lock(plock); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ mtx_lock(plock); -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisDprAcquireSpinLock(plock); -+ -+#endif -+ -+} -+ -+void _rtw_spinunlock_ex(_lock *plock) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ spin_unlock(plock); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ mtx_unlock(plock); -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisDprReleaseSpinLock(plock); -+ -+#endif -+} -+ -+ -+ -+void _rtw_init_queue(_queue *pqueue) -+{ -+ _rtw_init_listhead(&(pqueue->queue)); -+ _rtw_spinlock_init(&(pqueue->lock)); -+} -+ -+void _rtw_deinit_queue(_queue *pqueue) -+{ -+ _rtw_spinlock_free(&(pqueue->lock)); -+} -+ -+u32 _rtw_queue_empty(_queue *pqueue) -+{ -+ return rtw_is_list_empty(&(pqueue->queue)); -+} -+ -+ -+u32 rtw_end_of_queue_search(_list *head, _list *plist) -+{ -+ if (head == plist) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+ -+systime _rtw_get_current_time(void) -+{ -+ -+#ifdef PLATFORM_LINUX -+ return jiffies; -+#endif -+#ifdef PLATFORM_FREEBSD -+ struct timeval tvp; -+ getmicrotime(&tvp); -+ return tvp.tv_sec; -+#endif -+#ifdef PLATFORM_WINDOWS -+ LARGE_INTEGER SystemTime; -+ NdisGetCurrentSystemTime(&SystemTime); -+ return SystemTime.LowPart;/* count of 100-nanosecond intervals */ -+#endif -+} -+ -+inline u32 _rtw_systime_to_ms(systime stime) -+{ -+#ifdef PLATFORM_LINUX -+ return jiffies_to_msecs(stime); -+#endif -+#ifdef PLATFORM_FREEBSD -+ return stime * 1000; -+#endif -+#ifdef PLATFORM_WINDOWS -+ return stime / 10000 ; -+#endif -+} -+ -+inline systime _rtw_ms_to_systime(u32 ms) -+{ -+#ifdef PLATFORM_LINUX -+ return msecs_to_jiffies(ms); -+#endif -+#ifdef PLATFORM_FREEBSD -+ return ms / 1000; -+#endif -+#ifdef PLATFORM_WINDOWS -+ return ms * 10000 ; -+#endif -+} -+ -+inline systime _rtw_us_to_systime(u32 us) -+{ -+#ifdef PLATFORM_LINUX -+ return usecs_to_jiffies(us); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+/* the input parameter start use the same unit as returned by rtw_get_current_time */ -+inline s32 _rtw_get_passing_time_ms(systime start) -+{ -+ return _rtw_systime_to_ms(_rtw_get_current_time() - start); -+} -+ -+inline s32 _rtw_get_remaining_time_ms(systime end) -+{ -+ return _rtw_systime_to_ms(end - _rtw_get_current_time()); -+} -+ -+inline s32 _rtw_get_time_interval_ms(systime start, systime end) -+{ -+ return _rtw_systime_to_ms(end - start); -+} -+ -+inline bool _rtw_time_after(systime a, systime b) -+{ -+#ifdef PLATFORM_LINUX -+ return time_after(a, b); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+sysptime rtw_sptime_get(void) -+{ -+ /* CLOCK_MONOTONIC */ -+#ifdef PLATFORM_LINUX -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 17, 0)) -+ struct timespec64 cur; -+ -+ ktime_get_ts64(&cur); -+ return timespec64_to_ktime(cur); -+ #else -+ struct timespec cur; -+ -+ ktime_get_ts(&cur); -+ return timespec_to_ktime(cur); -+ #endif -+#else -+ #error "TBD\n" -+#endif -+} -+ -+sysptime rtw_sptime_set(s64 secs, const u32 nsecs) -+{ -+#ifdef PLATFORM_LINUX -+ return ktime_set(secs, nsecs); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+sysptime rtw_sptime_zero(void) -+{ -+#ifdef PLATFORM_LINUX -+ return ktime_set(0, 0); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+/* -+ * cmp1 < cmp2: return <0 -+ * cmp1 == cmp2: return 0 -+ * cmp1 > cmp2: return >0 -+ */ -+int rtw_sptime_cmp(const sysptime cmp1, const sysptime cmp2) -+{ -+#ifdef PLATFORM_LINUX -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ return ktime_compare(cmp1, cmp2); -+ #else -+ if (cmp1.tv64 < cmp2.tv64) -+ return -1; -+ if (cmp1.tv64 > cmp2.tv64) -+ return 1; -+ return 0; -+ #endif -+#else -+ #error "TBD\n" -+#endif -+} -+ -+bool rtw_sptime_eql(const sysptime cmp1, const sysptime cmp2) -+{ -+#ifdef PLATFORM_LINUX -+ return rtw_sptime_cmp(cmp1, cmp2) == 0; -+#else -+ #error "TBD\n" -+#endif -+} -+ -+bool rtw_sptime_is_zero(const sysptime sptime) -+{ -+#ifdef PLATFORM_LINUX -+ return rtw_sptime_cmp(sptime, rtw_sptime_zero()) == 0; -+#else -+ #error "TBD\n" -+#endif -+} -+ -+/* -+ * sub = lhs - rhs, in normalized form -+ */ -+sysptime rtw_sptime_sub(const sysptime lhs, const sysptime rhs) -+{ -+#ifdef PLATFORM_LINUX -+ return ktime_sub(lhs, rhs); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+/* -+ * add = lhs + rhs, in normalized form -+ */ -+sysptime rtw_sptime_add(const sysptime lhs, const sysptime rhs) -+{ -+#ifdef PLATFORM_LINUX -+ return ktime_add(lhs, rhs); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+s64 rtw_sptime_to_ms(const sysptime sptime) -+{ -+#ifdef PLATFORM_LINUX -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ return ktime_to_ms(sptime); -+ #else -+ struct timeval tv = ktime_to_timeval(sptime); -+ -+ return (s64) tv.tv_sec * MSEC_PER_SEC + tv.tv_usec / USEC_PER_MSEC; -+ #endif -+#else -+ #error "TBD\n" -+#endif -+} -+ -+sysptime rtw_ms_to_sptime(u64 ms) -+{ -+#ifdef PLATFORM_LINUX -+ return ns_to_ktime(ms * NSEC_PER_MSEC); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+s64 rtw_sptime_to_us(const sysptime sptime) -+{ -+#ifdef PLATFORM_LINUX -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22)) -+ return ktime_to_us(sptime); -+ #else -+ struct timeval tv = ktime_to_timeval(sptime); -+ -+ return (s64) tv.tv_sec * USEC_PER_SEC + tv.tv_usec; -+ #endif -+#else -+ #error "TBD\n" -+#endif -+} -+ -+sysptime rtw_us_to_sptime(u64 us) -+{ -+#ifdef PLATFORM_LINUX -+ return ns_to_ktime(us * NSEC_PER_USEC); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+s64 rtw_sptime_to_ns(const sysptime sptime) -+{ -+#ifdef PLATFORM_LINUX -+ return ktime_to_ns(sptime); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+sysptime rtw_ns_to_sptime(u64 ns) -+{ -+#ifdef PLATFORM_LINUX -+ return ns_to_ktime(ns); -+#else -+ #error "TBD\n" -+#endif -+} -+ -+s64 rtw_sptime_diff_ms(const sysptime start, const sysptime end) -+{ -+ sysptime diff; -+ -+ diff = rtw_sptime_sub(end, start); -+ -+ return rtw_sptime_to_ms(diff); -+} -+ -+s64 rtw_sptime_pass_ms(const sysptime start) -+{ -+ sysptime cur, diff; -+ -+ cur = rtw_sptime_get(); -+ diff = rtw_sptime_sub(cur, start); -+ -+ return rtw_sptime_to_ms(diff); -+} -+ -+s64 rtw_sptime_diff_us(const sysptime start, const sysptime end) -+{ -+ sysptime diff; -+ -+ diff = rtw_sptime_sub(end, start); -+ -+ return rtw_sptime_to_us(diff); -+} -+ -+s64 rtw_sptime_pass_us(const sysptime start) -+{ -+ sysptime cur, diff; -+ -+ cur = rtw_sptime_get(); -+ diff = rtw_sptime_sub(cur, start); -+ -+ return rtw_sptime_to_us(diff); -+} -+ -+s64 rtw_sptime_diff_ns(const sysptime start, const sysptime end) -+{ -+ sysptime diff; -+ -+ diff = rtw_sptime_sub(end, start); -+ -+ return rtw_sptime_to_ns(diff); -+} -+ -+s64 rtw_sptime_pass_ns(const sysptime start) -+{ -+ sysptime cur, diff; -+ -+ cur = rtw_sptime_get(); -+ diff = rtw_sptime_sub(cur, start); -+ -+ return rtw_sptime_to_ns(diff); -+} -+ -+void rtw_sleep_schedulable(int ms) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ u32 delta; -+ -+ delta = (ms * HZ) / 1000; /* (ms) */ -+ if (delta == 0) { -+ delta = 1;/* 1 ms */ -+ } -+ set_current_state(TASK_INTERRUPTIBLE); -+ schedule_timeout(delta); -+ return; -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ DELAY(ms * 1000); -+ return ; -+#endif -+ -+#ifdef PLATFORM_WINDOWS -+ -+ NdisMSleep(ms * 1000); /* (us)*1000=(ms) */ -+ -+#endif -+ -+} -+ -+ -+void rtw_msleep_os(int ms) -+{ -+ -+#ifdef PLATFORM_LINUX -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) -+ if (ms < 20) { -+ unsigned long us = ms * 1000UL; -+ usleep_range(us, us + 1000UL); -+ } else -+#endif -+ msleep((unsigned int)ms); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ /* Delay for delay microseconds */ -+ DELAY(ms * 1000); -+ return ; -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisMSleep(ms * 1000); /* (us)*1000=(ms) */ -+ -+#endif -+ -+ -+} -+void rtw_usleep_os(int us) -+{ -+#ifdef PLATFORM_LINUX -+ -+ /* msleep((unsigned int)us); */ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) -+ usleep_range(us, us + 1); -+#else -+ if (1 < (us / 1000)) -+ msleep(1); -+ else -+ msleep((us / 1000) + 1); -+#endif -+#endif -+ -+#ifdef PLATFORM_FREEBSD -+ /* Delay for delay microseconds */ -+ DELAY(us); -+ -+ return ; -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisMSleep(us); /* (us) */ -+ -+#endif -+ -+ -+} -+ -+ -+#ifdef DBG_DELAY_OS -+void _rtw_mdelay_os(int ms, const char *func, const int line) -+{ -+#if 0 -+ if (ms > 10) -+ RTW_INFO("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms); -+ rtw_msleep_os(ms); -+ return; -+#endif -+ -+ -+ RTW_INFO("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms); -+ -+#if defined(PLATFORM_LINUX) -+ -+ mdelay((unsigned long)ms); -+ -+#elif defined(PLATFORM_WINDOWS) -+ -+ NdisStallExecution(ms * 1000); /* (us)*1000=(ms) */ -+ -+#endif -+ -+ -+} -+void _rtw_udelay_os(int us, const char *func, const int line) -+{ -+ -+#if 0 -+ if (us > 1000) { -+ RTW_INFO("%s:%d %s(%d)\n", func, line, __FUNCTION__, us); -+ rtw_usleep_os(us); -+ return; -+ } -+#endif -+ -+ -+ RTW_INFO("%s:%d %s(%d)\n", func, line, __FUNCTION__, us); -+ -+ -+#if defined(PLATFORM_LINUX) -+ -+ udelay((unsigned long)us); -+ -+#elif defined(PLATFORM_WINDOWS) -+ -+ NdisStallExecution(us); /* (us) */ -+ -+#endif -+ -+} -+#else -+void rtw_mdelay_os(int ms) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ mdelay((unsigned long)ms); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ DELAY(ms * 1000); -+ return ; -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisStallExecution(ms * 1000); /* (us)*1000=(ms) */ -+ -+#endif -+ -+ -+} -+void rtw_udelay_os(int us) -+{ -+ -+#ifdef PLATFORM_LINUX -+ -+ udelay((unsigned long)us); -+ -+#endif -+#ifdef PLATFORM_FREEBSD -+ /* Delay for delay microseconds */ -+ DELAY(us); -+ return ; -+#endif -+#ifdef PLATFORM_WINDOWS -+ -+ NdisStallExecution(us); /* (us) */ -+ -+#endif -+ -+} -+#endif -+ -+void rtw_yield_os(void) -+{ -+#ifdef PLATFORM_LINUX -+ yield(); -+#endif -+#ifdef PLATFORM_FREEBSD -+ yield(); -+#endif -+#ifdef PLATFORM_WINDOWS -+ SwitchToThread(); -+#endif -+} -+ -+const char *_rtw_pwait_type_str[] = { -+ [RTW_PWAIT_TYPE_MSLEEP] = "MS", -+ [RTW_PWAIT_TYPE_USLEEP] = "US", -+ [RTW_PWAIT_TYPE_YIELD] = "Y", -+ [RTW_PWAIT_TYPE_MDELAY] = "MD", -+ [RTW_PWAIT_TYPE_UDELAY] = "UD", -+ [RTW_PWAIT_TYPE_NUM] = "unknown", -+}; -+ -+static void rtw_pwctx_yield(int us) -+{ -+ rtw_yield_os(); -+} -+ -+static void (*const rtw_pwait_hdl[])(int)= { -+ [RTW_PWAIT_TYPE_MSLEEP] = rtw_msleep_os, -+ [RTW_PWAIT_TYPE_USLEEP] = rtw_usleep_os, -+ [RTW_PWAIT_TYPE_YIELD] = rtw_pwctx_yield, -+ [RTW_PWAIT_TYPE_MDELAY] = rtw_mdelay_os, -+ [RTW_PWAIT_TYPE_UDELAY] = rtw_udelay_os, -+}; -+ -+int rtw_pwctx_config(struct rtw_pwait_ctx *pwctx, enum rtw_pwait_type type, s32 time, s32 cnt_lmt) -+{ -+ int ret = _FAIL; -+ -+ if (!RTW_PWAIT_TYPE_VALID(type)) -+ goto exit; -+ -+ pwctx->conf.type = type; -+ pwctx->conf.wait_time = time; -+ pwctx->conf.wait_cnt_lmt = cnt_lmt; -+ pwctx->wait_hdl = rtw_pwait_hdl[type]; -+ -+ ret = _SUCCESS; -+ -+exit: -+ return ret; -+} -+ -+bool rtw_macaddr_is_larger(const u8 *a, const u8 *b) -+{ -+ u32 va, vb; -+ -+ va = be32_to_cpu(*((u32 *)a)); -+ vb = be32_to_cpu(*((u32 *)b)); -+ if (va > vb) -+ return 1; -+ else if (va < vb) -+ return 0; -+ -+ return be16_to_cpu(*((u16 *)(a + 4))) > be16_to_cpu(*((u16 *)(b + 4))); -+} -+ -+#define RTW_SUSPEND_LOCK_NAME "rtw_wifi" -+#define RTW_SUSPEND_TRAFFIC_LOCK_NAME "rtw_wifi_traffic" -+#define RTW_SUSPEND_RESUME_LOCK_NAME "rtw_wifi_resume" -+#ifdef CONFIG_WAKELOCK -+static struct wake_lock rtw_suspend_lock; -+static struct wake_lock rtw_suspend_traffic_lock; -+static struct wake_lock rtw_suspend_resume_lock; -+#elif defined(CONFIG_ANDROID_POWER) -+static android_suspend_lock_t rtw_suspend_lock = { -+ .name = RTW_SUSPEND_LOCK_NAME -+}; -+static android_suspend_lock_t rtw_suspend_traffic_lock = { -+ .name = RTW_SUSPEND_TRAFFIC_LOCK_NAME -+}; -+static android_suspend_lock_t rtw_suspend_resume_lock = { -+ .name = RTW_SUSPEND_RESUME_LOCK_NAME -+}; -+#endif -+ -+inline void rtw_suspend_lock_init(void) -+{ -+#ifdef CONFIG_WAKELOCK -+ wake_lock_init(&rtw_suspend_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_LOCK_NAME); -+ wake_lock_init(&rtw_suspend_traffic_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_TRAFFIC_LOCK_NAME); -+ wake_lock_init(&rtw_suspend_resume_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_RESUME_LOCK_NAME); -+#elif defined(CONFIG_ANDROID_POWER) -+ android_init_suspend_lock(&rtw_suspend_lock); -+ android_init_suspend_lock(&rtw_suspend_traffic_lock); -+ android_init_suspend_lock(&rtw_suspend_resume_lock); -+#endif -+} -+ -+inline void rtw_suspend_lock_uninit(void) -+{ -+#ifdef CONFIG_WAKELOCK -+ wake_lock_destroy(&rtw_suspend_lock); -+ wake_lock_destroy(&rtw_suspend_traffic_lock); -+ wake_lock_destroy(&rtw_suspend_resume_lock); -+#elif defined(CONFIG_ANDROID_POWER) -+ android_uninit_suspend_lock(&rtw_suspend_lock); -+ android_uninit_suspend_lock(&rtw_suspend_traffic_lock); -+ android_uninit_suspend_lock(&rtw_suspend_resume_lock); -+#endif -+} -+ -+inline void rtw_lock_suspend(void) -+{ -+#ifdef CONFIG_WAKELOCK -+ wake_lock(&rtw_suspend_lock); -+#elif defined(CONFIG_ANDROID_POWER) -+ android_lock_suspend(&rtw_suspend_lock); -+#endif -+ -+#if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) -+ /* RTW_INFO("####%s: suspend_lock_count:%d####\n", __FUNCTION__, rtw_suspend_lock.stat.count); */ -+#endif -+} -+ -+inline void rtw_unlock_suspend(void) -+{ -+#ifdef CONFIG_WAKELOCK -+ wake_unlock(&rtw_suspend_lock); -+#elif defined(CONFIG_ANDROID_POWER) -+ android_unlock_suspend(&rtw_suspend_lock); -+#endif -+ -+#if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) -+ /* RTW_INFO("####%s: suspend_lock_count:%d####\n", __FUNCTION__, rtw_suspend_lock.stat.count); */ -+#endif -+} -+ -+inline void rtw_resume_lock_suspend(void) -+{ -+#ifdef CONFIG_WAKELOCK -+ wake_lock(&rtw_suspend_resume_lock); -+#elif defined(CONFIG_ANDROID_POWER) -+ android_lock_suspend(&rtw_suspend_resume_lock); -+#endif -+ -+#if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) -+ /* RTW_INFO("####%s: suspend_lock_count:%d####\n", __FUNCTION__, rtw_suspend_lock.stat.count); */ -+#endif -+} -+ -+inline void rtw_resume_unlock_suspend(void) -+{ -+#ifdef CONFIG_WAKELOCK -+ wake_unlock(&rtw_suspend_resume_lock); -+#elif defined(CONFIG_ANDROID_POWER) -+ android_unlock_suspend(&rtw_suspend_resume_lock); -+#endif -+ -+#if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) -+ /* RTW_INFO("####%s: suspend_lock_count:%d####\n", __FUNCTION__, rtw_suspend_lock.stat.count); */ -+#endif -+} -+ -+inline void rtw_lock_suspend_timeout(u32 timeout_ms) -+{ -+#ifdef CONFIG_WAKELOCK -+ wake_lock_timeout(&rtw_suspend_lock, rtw_ms_to_systime(timeout_ms)); -+#elif defined(CONFIG_ANDROID_POWER) -+ android_lock_suspend_auto_expire(&rtw_suspend_lock, rtw_ms_to_systime(timeout_ms)); -+#endif -+} -+ -+ -+inline void rtw_lock_traffic_suspend_timeout(u32 timeout_ms) -+{ -+#ifdef CONFIG_WAKELOCK -+ wake_lock_timeout(&rtw_suspend_traffic_lock, rtw_ms_to_systime(timeout_ms)); -+#elif defined(CONFIG_ANDROID_POWER) -+ android_lock_suspend_auto_expire(&rtw_suspend_traffic_lock, rtw_ms_to_systime(timeout_ms)); -+#endif -+ /* RTW_INFO("traffic lock timeout:%d\n", timeout_ms); */ -+} -+ -+inline void rtw_set_bit(int nr, unsigned long *addr) -+{ -+#ifdef PLATFORM_LINUX -+ set_bit(nr, addr); -+#else -+ #error "TBD\n"; -+#endif -+} -+ -+inline void rtw_clear_bit(int nr, unsigned long *addr) -+{ -+#ifdef PLATFORM_LINUX -+ clear_bit(nr, addr); -+#else -+ #error "TBD\n"; -+#endif -+} -+ -+inline int rtw_test_and_clear_bit(int nr, unsigned long *addr) -+{ -+#ifdef PLATFORM_LINUX -+ return test_and_clear_bit(nr, addr); -+#else -+ #error "TBD\n"; -+#endif -+} -+ -+inline void ATOMIC_SET(ATOMIC_T *v, int i) -+{ -+#ifdef PLATFORM_LINUX -+ atomic_set(v, i); -+#elif defined(PLATFORM_WINDOWS) -+ *v = i; /* other choice???? */ -+#elif defined(PLATFORM_FREEBSD) -+ atomic_set_int(v, i); -+#endif -+} -+ -+inline int ATOMIC_READ(ATOMIC_T *v) -+{ -+#ifdef PLATFORM_LINUX -+ return atomic_read(v); -+#elif defined(PLATFORM_WINDOWS) -+ return *v; /* other choice???? */ -+#elif defined(PLATFORM_FREEBSD) -+ return atomic_load_acq_32(v); -+#endif -+} -+ -+inline void ATOMIC_ADD(ATOMIC_T *v, int i) -+{ -+#ifdef PLATFORM_LINUX -+ atomic_add(i, v); -+#elif defined(PLATFORM_WINDOWS) -+ InterlockedAdd(v, i); -+#elif defined(PLATFORM_FREEBSD) -+ atomic_add_int(v, i); -+#endif -+} -+inline void ATOMIC_SUB(ATOMIC_T *v, int i) -+{ -+#ifdef PLATFORM_LINUX -+ atomic_sub(i, v); -+#elif defined(PLATFORM_WINDOWS) -+ InterlockedAdd(v, -i); -+#elif defined(PLATFORM_FREEBSD) -+ atomic_subtract_int(v, i); -+#endif -+} -+ -+inline void ATOMIC_INC(ATOMIC_T *v) -+{ -+#ifdef PLATFORM_LINUX -+ atomic_inc(v); -+#elif defined(PLATFORM_WINDOWS) -+ InterlockedIncrement(v); -+#elif defined(PLATFORM_FREEBSD) -+ atomic_add_int(v, 1); -+#endif -+} -+ -+inline void ATOMIC_DEC(ATOMIC_T *v) -+{ -+#ifdef PLATFORM_LINUX -+ atomic_dec(v); -+#elif defined(PLATFORM_WINDOWS) -+ InterlockedDecrement(v); -+#elif defined(PLATFORM_FREEBSD) -+ atomic_subtract_int(v, 1); -+#endif -+} -+ -+inline int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i) -+{ -+#ifdef PLATFORM_LINUX -+ return atomic_add_return(i, v); -+#elif defined(PLATFORM_WINDOWS) -+ return InterlockedAdd(v, i); -+#elif defined(PLATFORM_FREEBSD) -+ atomic_add_int(v, i); -+ return atomic_load_acq_32(v); -+#endif -+} -+ -+inline int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i) -+{ -+#ifdef PLATFORM_LINUX -+ return atomic_sub_return(i, v); -+#elif defined(PLATFORM_WINDOWS) -+ return InterlockedAdd(v, -i); -+#elif defined(PLATFORM_FREEBSD) -+ atomic_subtract_int(v, i); -+ return atomic_load_acq_32(v); -+#endif -+} -+ -+inline int ATOMIC_INC_RETURN(ATOMIC_T *v) -+{ -+#ifdef PLATFORM_LINUX -+ return atomic_inc_return(v); -+#elif defined(PLATFORM_WINDOWS) -+ return InterlockedIncrement(v); -+#elif defined(PLATFORM_FREEBSD) -+ atomic_add_int(v, 1); -+ return atomic_load_acq_32(v); -+#endif -+} -+ -+inline int ATOMIC_DEC_RETURN(ATOMIC_T *v) -+{ -+#ifdef PLATFORM_LINUX -+ return atomic_dec_return(v); -+#elif defined(PLATFORM_WINDOWS) -+ return InterlockedDecrement(v); -+#elif defined(PLATFORM_FREEBSD) -+ atomic_subtract_int(v, 1); -+ return atomic_load_acq_32(v); -+#endif -+} -+ -+inline bool ATOMIC_INC_UNLESS(ATOMIC_T *v, int u) -+{ -+#ifdef PLATFORM_LINUX -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 15)) -+ return atomic_add_unless(v, 1, u); -+#else -+ /* only make sure not exceed after this function */ -+ if (ATOMIC_INC_RETURN(v) > u) { -+ ATOMIC_DEC(v); -+ return 0; -+ } -+ return 1; -+#endif -+#else -+ #error "TBD\n" -+#endif -+} -+ -+#ifdef PLATFORM_LINUX -+/* -+* Open a file with the specific @param path, @param flag, @param mode -+* @param fpp the pointer of struct file pointer to get struct file pointer while file opening is success -+* @param path the path of the file to open -+* @param flag file operation flags, please refer to linux document -+* @param mode please refer to linux document -+* @return Linux specific error code -+*/ -+static int openFile(struct file **fpp, const char *path, int flag, int mode) -+{ -+ struct file *fp; -+ -+ fp = filp_open(path, flag, mode); -+ if (IS_ERR(fp)) { -+ *fpp = NULL; -+ return PTR_ERR(fp); -+ } else { -+ *fpp = fp; -+ return 0; -+ } -+} -+ -+/* -+* Close the file with the specific @param fp -+* @param fp the pointer of struct file to close -+* @return always 0 -+*/ -+static int closeFile(struct file *fp) -+{ -+ filp_close(fp, NULL); -+ return 0; -+} -+ -+static int readFile(struct file *fp, char *buf, int len) -+{ -+ int rlen = 0, sum = 0; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ if (!(fp->f_mode & FMODE_CAN_READ)) -+#else -+ if (!fp->f_op || !fp->f_op->read) -+#endif -+ return -EPERM; -+ -+ while (sum < len) { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0)) -+ rlen = kernel_read(fp, buf + sum, len - sum, &fp->f_pos); -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ rlen = __vfs_read(fp, buf + sum, len - sum, &fp->f_pos); -+#else -+ rlen = fp->f_op->read(fp, buf + sum, len - sum, &fp->f_pos); -+#endif -+ if (rlen > 0) -+ sum += rlen; -+ else if (0 != rlen) -+ return rlen; -+ else -+ break; -+ } -+ -+ return sum; -+ -+} -+ -+static int writeFile(struct file *fp, char *buf, int len) -+{ -+ int wlen = 0, sum = 0; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ if (!(fp->f_mode & FMODE_CAN_WRITE)) -+#else -+ if (!fp->f_op || !fp->f_op->write) -+#endif -+ return -EPERM; -+ -+ while (sum < len) { -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0)) -+ wlen = kernel_write(fp, buf + sum, len - sum, &fp->f_pos); -+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) -+ wlen = __vfs_write(fp, buf + sum, len - sum, &fp->f_pos); -+#else -+ wlen = fp->f_op->write(fp, buf + sum, len - sum, &fp->f_pos); -+#endif -+ if (wlen > 0) -+ sum += wlen; -+ else if (0 != wlen) -+ return wlen; -+ else -+ break; -+ } -+ -+ return sum; -+ -+} -+ -+/* -+* Test if the specifi @param pathname is a direct and readable -+* If readable, @param sz is not used -+* @param pathname the name of the path to test -+* @return Linux specific error code -+*/ -+static int isDirReadable(const char *pathname, u32 *sz) -+{ -+ struct path path; -+ int error = 0; -+ -+ return kern_path(pathname, LOOKUP_FOLLOW, &path); -+} -+ -+/* -+* Test if the specifi @param path is a file and readable -+* If readable, @param sz is got -+* @param path the path of the file to test -+* @return Linux specific error code -+*/ -+static int isFileReadable(const char *path, u32 *sz) -+{ -+ struct file *fp; -+ int ret = 0; -+ char buf; -+ -+ fp = filp_open(path, O_RDONLY, 0); -+ if (IS_ERR(fp)) -+ ret = PTR_ERR(fp); -+ else { -+ if (1 != readFile(fp, &buf, 1)) -+ ret = PTR_ERR(fp); -+ -+ if (ret == 0 && sz) { -+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) -+ *sz = i_size_read(fp->f_path.dentry->d_inode); -+ #else -+ *sz = i_size_read(fp->f_dentry->d_inode); -+ #endif -+ } -+ -+ filp_close(fp, NULL); -+ } -+ return ret; -+} -+ -+/* -+* Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most -+* @param path the path of the file to open and read -+* @param buf the starting address of the buffer to store file content -+* @param sz how many bytes to read at most -+* @return the byte we've read, or Linux specific error code -+*/ -+static int retriveFromFile(const char *path, u8 *buf, u32 sz) -+{ -+ int ret = -1; -+ struct file *fp; -+ -+ if (path && buf) { -+ ret = openFile(&fp, path, O_RDONLY, 0); -+ if (0 == ret) { -+ RTW_INFO("%s openFile path:%s fp=%p\n", __FUNCTION__, path , fp); -+ -+ ret = readFile(fp, buf, sz); -+ closeFile(fp); -+ -+ RTW_INFO("%s readFile, ret:%d\n", __FUNCTION__, ret); -+ -+ } else -+ RTW_INFO("%s openFile path:%s Fail, ret:%d\n", __FUNCTION__, path, ret); -+ } else { -+ RTW_INFO("%s NULL pointer\n", __FUNCTION__); -+ ret = -EINVAL; -+ } -+ return ret; -+} -+ -+/* -+* Open the file with @param path and wirte @param sz byte of data starting from @param buf into the file -+* @param path the path of the file to open and write -+* @param buf the starting address of the data to write into file -+* @param sz how many bytes to write at most -+* @return the byte we've written, or Linux specific error code -+*/ -+static int storeToFile(const char *path, u8 *buf, u32 sz) -+{ -+ int ret = 0; -+ struct file *fp; -+ -+ if (path && buf) { -+ ret = openFile(&fp, path, O_CREAT | O_WRONLY, 0666); -+ if (0 == ret) { -+ RTW_INFO("%s openFile path:%s fp=%p\n", __FUNCTION__, path , fp); -+ -+ ret = writeFile(fp, buf, sz); -+ closeFile(fp); -+ -+ RTW_INFO("%s writeFile, ret:%d\n", __FUNCTION__, ret); -+ -+ } else -+ RTW_INFO("%s openFile path:%s Fail, ret:%d\n", __FUNCTION__, path, ret); -+ } else { -+ RTW_INFO("%s NULL pointer\n", __FUNCTION__); -+ ret = -EINVAL; -+ } -+ return ret; -+} -+#endif /* PLATFORM_LINUX */ -+ -+/* -+* Test if the specifi @param path is a direct and readable -+* @param path the path of the direct to test -+* @return _TRUE or _FALSE -+*/ -+int rtw_is_dir_readable(const char *path) -+{ -+#ifdef PLATFORM_LINUX -+ if (isDirReadable(path, NULL) == 0) -+ return _TRUE; -+ else -+ return _FALSE; -+#else -+ /* Todo... */ -+ return _FALSE; -+#endif -+} -+ -+/* -+* Test if the specifi @param path is a file and readable -+* @param path the path of the file to test -+* @return _TRUE or _FALSE -+*/ -+int rtw_is_file_readable(const char *path) -+{ -+#ifdef PLATFORM_LINUX -+ if (isFileReadable(path, NULL) == 0) -+ return _TRUE; -+ else -+ return _FALSE; -+#else -+ /* Todo... */ -+ return _FALSE; -+#endif -+} -+ -+/* -+* Test if the specifi @param path is a file and readable. -+* If readable, @param sz is got -+* @param path the path of the file to test -+* @return _TRUE or _FALSE -+*/ -+int rtw_is_file_readable_with_size(const char *path, u32 *sz) -+{ -+#ifdef PLATFORM_LINUX -+ if (isFileReadable(path, sz) == 0) -+ return _TRUE; -+ else -+ return _FALSE; -+#else -+ /* Todo... */ -+ return _FALSE; -+#endif -+} -+ -+/* -+* Test if the specifi @param path is a readable file with valid size. -+* If readable, @param sz is got -+* @param path the path of the file to test -+* @return _TRUE or _FALSE -+*/ -+int rtw_readable_file_sz_chk(const char *path, u32 sz) -+{ -+ u32 fsz; -+ -+ if (rtw_is_file_readable_with_size(path, &fsz) == _FALSE) -+ return _FALSE; -+ -+ if (fsz > sz) -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+/* -+* Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most -+* @param path the path of the file to open and read -+* @param buf the starting address of the buffer to store file content -+* @param sz how many bytes to read at most -+* @return the byte we've read -+*/ -+int rtw_retrieve_from_file(const char *path, u8 *buf, u32 sz) -+{ -+#ifdef PLATFORM_LINUX -+ int ret = retriveFromFile(path, buf, sz); -+ return ret >= 0 ? ret : 0; -+#else -+ /* Todo... */ -+ return 0; -+#endif -+} -+ -+/* -+* Open the file with @param path and wirte @param sz byte of data starting from @param buf into the file -+* @param path the path of the file to open and write -+* @param buf the starting address of the data to write into file -+* @param sz how many bytes to write at most -+* @return the byte we've written -+*/ -+int rtw_store_to_file(const char *path, u8 *buf, u32 sz) -+{ -+#ifdef PLATFORM_LINUX -+ int ret = storeToFile(path, buf, sz); -+ return ret >= 0 ? ret : 0; -+#else -+ /* Todo... */ -+ return 0; -+#endif -+} -+ -+#ifdef PLATFORM_LINUX -+struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv) -+{ -+ struct net_device *pnetdev; -+ struct rtw_netdev_priv_indicator *pnpi; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ pnetdev = alloc_etherdev_mq(sizeof(struct rtw_netdev_priv_indicator), 4); -+#else -+ pnetdev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); -+#endif -+ if (!pnetdev) -+ goto RETURN; -+ -+ pnpi = netdev_priv(pnetdev); -+ pnpi->priv = old_priv; -+ pnpi->sizeof_priv = sizeof_priv; -+ -+RETURN: -+ return pnetdev; -+} -+ -+struct net_device *rtw_alloc_etherdev(int sizeof_priv) -+{ -+ struct net_device *pnetdev; -+ struct rtw_netdev_priv_indicator *pnpi; -+ -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) -+ pnetdev = alloc_etherdev_mq(sizeof(struct rtw_netdev_priv_indicator), 4); -+#else -+ pnetdev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); -+#endif -+ if (!pnetdev) -+ goto RETURN; -+ -+ pnpi = netdev_priv(pnetdev); -+ -+ pnpi->priv = rtw_zvmalloc(sizeof_priv); -+ if (!pnpi->priv) { -+ free_netdev(pnetdev); -+ pnetdev = NULL; -+ goto RETURN; -+ } -+ -+ pnpi->sizeof_priv = sizeof_priv; -+RETURN: -+ return pnetdev; -+} -+ -+void rtw_free_netdev(struct net_device *netdev) -+{ -+ struct rtw_netdev_priv_indicator *pnpi; -+ -+ if (!netdev) -+ goto RETURN; -+ -+ pnpi = netdev_priv(netdev); -+ -+ if (!pnpi->priv) -+ goto RETURN; -+ -+ free_netdev(netdev); -+ -+RETURN: -+ return; -+} -+ -+#endif -+ -+#ifdef PLATFORM_FREEBSD -+/* -+ * Copy a buffer from userspace and write into kernel address -+ * space. -+ * -+ * This emulation just calls the FreeBSD copyin function (to -+ * copy data from user space buffer into a kernel space buffer) -+ * and is designed to be used with the above io_write_wrapper. -+ * -+ * This function should return the number of bytes not copied. -+ * I.e. success results in a zero value. -+ * Negative error values are not returned. -+ */ -+unsigned long -+copy_from_user(void *to, const void *from, unsigned long n) -+{ -+ if (copyin(from, to, n) != 0) { -+ /* Any errors will be treated as a failure -+ to copy any of the requested bytes */ -+ return n; -+ } -+ -+ return 0; -+} -+ -+unsigned long -+copy_to_user(void *to, const void *from, unsigned long n) -+{ -+ if (copyout(from, to, n) != 0) { -+ /* Any errors will be treated as a failure -+ to copy any of the requested bytes */ -+ return n; -+ } -+ -+ return 0; -+} -+ -+ -+/* -+ * The usb_register and usb_deregister functions are used to register -+ * usb drivers with the usb subsystem. In this compatibility layer -+ * emulation a list of drivers (struct usb_driver) is maintained -+ * and is used for probing/attaching etc. -+ * -+ * usb_register and usb_deregister simply call these functions. -+ */ -+int -+usb_register(struct usb_driver *driver) -+{ -+ rtw_usb_linux_register(driver); -+ return 0; -+} -+ -+ -+int -+usb_deregister(struct usb_driver *driver) -+{ -+ rtw_usb_linux_deregister(driver); -+ return 0; -+} -+ -+void module_init_exit_wrapper(void *arg) -+{ -+ int (*func)(void) = arg; -+ func(); -+ return; -+} -+ -+#endif /* PLATFORM_FREEBSD */ -+ -+#ifdef CONFIG_PLATFORM_SPRD -+ #ifdef do_div -+ #undef do_div -+ #endif -+ #include -+#endif -+ -+u64 rtw_modular64(u64 x, u64 y) -+{ -+#ifdef PLATFORM_LINUX -+ return do_div(x, y); -+#elif defined(PLATFORM_WINDOWS) -+ return x % y; -+#elif defined(PLATFORM_FREEBSD) -+ return x % y; -+#endif -+} -+ -+u64 rtw_division64(u64 x, u64 y) -+{ -+#ifdef PLATFORM_LINUX -+ do_div(x, y); -+ return x; -+#elif defined(PLATFORM_WINDOWS) -+ return x / y; -+#elif defined(PLATFORM_FREEBSD) -+ return x / y; -+#endif -+} -+ -+inline u32 rtw_random32(void) -+{ -+#ifdef PLATFORM_LINUX -+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) -+ return prandom_u32(); -+#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 18)) -+ u32 random_int; -+ get_random_bytes(&random_int , 4); -+ return random_int; -+#else -+ return random32(); -+#endif -+#elif defined(PLATFORM_WINDOWS) -+#error "to be implemented\n" -+#elif defined(PLATFORM_FREEBSD) -+#error "to be implemented\n" -+#endif -+} -+ -+void rtw_buf_free(u8 **buf, u32 *buf_len) -+{ -+ u32 ori_len; -+ -+ if (!buf || !buf_len) -+ return; -+ -+ ori_len = *buf_len; -+ -+ if (*buf) { -+ u32 tmp_buf_len = *buf_len; -+ *buf_len = 0; -+ rtw_mfree(*buf, tmp_buf_len); -+ *buf = NULL; -+ } -+} -+ -+void rtw_buf_update(u8 **buf, u32 *buf_len, u8 *src, u32 src_len) -+{ -+ u32 ori_len = 0, dup_len = 0; -+ u8 *ori = NULL; -+ u8 *dup = NULL; -+ -+ if (!buf || !buf_len) -+ return; -+ -+ if (!src || !src_len) -+ goto keep_ori; -+ -+ /* duplicate src */ -+ dup = rtw_malloc(src_len); -+ if (dup) { -+ dup_len = src_len; -+ _rtw_memcpy(dup, src, dup_len); -+ } -+ -+keep_ori: -+ ori = *buf; -+ ori_len = *buf_len; -+ -+ /* replace buf with dup */ -+ *buf_len = 0; -+ *buf = dup; -+ *buf_len = dup_len; -+ -+ /* free ori */ -+ if (ori && ori_len > 0) -+ rtw_mfree(ori, ori_len); -+} -+ -+ -+/** -+ * rtw_cbuf_full - test if cbuf is full -+ * @cbuf: pointer of struct rtw_cbuf -+ * -+ * Returns: _TRUE if cbuf is full -+ */ -+inline bool rtw_cbuf_full(struct rtw_cbuf *cbuf) -+{ -+ return (cbuf->write == cbuf->read - 1) ? _TRUE : _FALSE; -+} -+ -+/** -+ * rtw_cbuf_empty - test if cbuf is empty -+ * @cbuf: pointer of struct rtw_cbuf -+ * -+ * Returns: _TRUE if cbuf is empty -+ */ -+inline bool rtw_cbuf_empty(struct rtw_cbuf *cbuf) -+{ -+ return (cbuf->write == cbuf->read) ? _TRUE : _FALSE; -+} -+ -+/** -+ * rtw_cbuf_push - push a pointer into cbuf -+ * @cbuf: pointer of struct rtw_cbuf -+ * @buf: pointer to push in -+ * -+ * Lock free operation, be careful of the use scheme -+ * Returns: _TRUE push success -+ */ -+bool rtw_cbuf_push(struct rtw_cbuf *cbuf, void *buf) -+{ -+ if (rtw_cbuf_full(cbuf)) -+ return _FAIL; -+ -+ if (0) -+ RTW_INFO("%s on %u\n", __func__, cbuf->write); -+ cbuf->bufs[cbuf->write] = buf; -+ cbuf->write = (cbuf->write + 1) % cbuf->size; -+ -+ return _SUCCESS; -+} -+ -+/** -+ * rtw_cbuf_pop - pop a pointer from cbuf -+ * @cbuf: pointer of struct rtw_cbuf -+ * -+ * Lock free operation, be careful of the use scheme -+ * Returns: pointer popped out -+ */ -+void *rtw_cbuf_pop(struct rtw_cbuf *cbuf) -+{ -+ void *buf; -+ if (rtw_cbuf_empty(cbuf)) -+ return NULL; -+ -+ if (0) -+ RTW_INFO("%s on %u\n", __func__, cbuf->read); -+ buf = cbuf->bufs[cbuf->read]; -+ cbuf->read = (cbuf->read + 1) % cbuf->size; -+ -+ return buf; -+} -+ -+/** -+ * rtw_cbuf_alloc - allocte a rtw_cbuf with given size and do initialization -+ * @size: size of pointer -+ * -+ * Returns: pointer of srtuct rtw_cbuf, NULL for allocation failure -+ */ -+struct rtw_cbuf *rtw_cbuf_alloc(u32 size) -+{ -+ struct rtw_cbuf *cbuf; -+ -+ cbuf = (struct rtw_cbuf *)rtw_malloc(sizeof(*cbuf) + sizeof(void *) * size); -+ -+ if (cbuf) { -+ cbuf->write = cbuf->read = 0; -+ cbuf->size = size; -+ } -+ -+ return cbuf; -+} -+ -+/** -+ * rtw_cbuf_free - free the given rtw_cbuf -+ * @cbuf: pointer of struct rtw_cbuf to free -+ */ -+void rtw_cbuf_free(struct rtw_cbuf *cbuf) -+{ -+ rtw_mfree((u8 *)cbuf, sizeof(*cbuf) + sizeof(void *) * cbuf->size); -+} -+ -+/** -+ * map_readN - read a range of map data -+ * @map: map to read -+ * @offset: start address to read -+ * @len: length to read -+ * @buf: pointer of buffer to store data read -+ * -+ * Returns: _SUCCESS or _FAIL -+ */ -+int map_readN(const struct map_t *map, u16 offset, u16 len, u8 *buf) -+{ -+ const struct map_seg_t *seg; -+ int ret = _FAIL; -+ int i; -+ -+ if (len == 0) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ if (offset + len > map->len) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ _rtw_memset(buf, map->init_value, len); -+ -+ for (i = 0; i < map->seg_num; i++) { -+ u8 *c_dst, *c_src; -+ u16 c_len; -+ -+ seg = map->segs + i; -+ if (seg->sa + seg->len <= offset || seg->sa >= offset + len) -+ continue; -+ -+ if (seg->sa >= offset) { -+ c_dst = buf + (seg->sa - offset); -+ c_src = seg->c; -+ if (seg->sa + seg->len <= offset + len) -+ c_len = seg->len; -+ else -+ c_len = offset + len - seg->sa; -+ } else { -+ c_dst = buf; -+ c_src = seg->c + (offset - seg->sa); -+ if (seg->sa + seg->len >= offset + len) -+ c_len = len; -+ else -+ c_len = seg->sa + seg->len - offset; -+ } -+ -+ _rtw_memcpy(c_dst, c_src, c_len); -+ } -+ -+exit: -+ return ret; -+} -+ -+/** -+ * map_read8 - read 1 byte of map data -+ * @map: map to read -+ * @offset: address to read -+ * -+ * Returns: value of data of specified offset. map.init_value if offset is out of range -+ */ -+u8 map_read8(const struct map_t *map, u16 offset) -+{ -+ const struct map_seg_t *seg; -+ u8 val = map->init_value; -+ int i; -+ -+ if (offset + 1 > map->len) { -+ rtw_warn_on(1); -+ goto exit; -+ } -+ -+ for (i = 0; i < map->seg_num; i++) { -+ seg = map->segs + i; -+ if (seg->sa + seg->len <= offset || seg->sa >= offset + 1) -+ continue; -+ -+ val = *(seg->c + offset - seg->sa); -+ break; -+ } -+ -+exit: -+ return val; -+} -+ -+#ifdef CONFIG_RTW_MESH -+int rtw_blacklist_add(_queue *blist, const u8 *addr, u32 timeout_ms) -+{ -+ struct blacklist_ent *ent; -+ _list *list, *head; -+ u8 exist = _FALSE, timeout = _FALSE; -+ -+ enter_critical_bh(&blist->lock); -+ -+ head = &blist->queue; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ ent = LIST_CONTAINOR(list, struct blacklist_ent, list); -+ list = get_next(list); -+ -+ if (_rtw_memcmp(ent->addr, addr, ETH_ALEN) == _TRUE) { -+ exist = _TRUE; -+ if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) -+ timeout = _TRUE; -+ ent->exp_time = rtw_get_current_time() -+ + rtw_ms_to_systime(timeout_ms); -+ break; -+ } -+ -+ if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) { -+ rtw_list_delete(&ent->list); -+ rtw_mfree(ent, sizeof(struct blacklist_ent)); -+ } -+ } -+ -+ if (exist == _FALSE) { -+ ent = rtw_malloc(sizeof(struct blacklist_ent)); -+ if (ent) { -+ _rtw_memcpy(ent->addr, addr, ETH_ALEN); -+ ent->exp_time = rtw_get_current_time() -+ + rtw_ms_to_systime(timeout_ms); -+ rtw_list_insert_tail(&ent->list, head); -+ } -+ } -+ -+ exit_critical_bh(&blist->lock); -+ -+ return (exist == _TRUE && timeout == _FALSE) ? RTW_ALREADY : (ent ? _SUCCESS : _FAIL); -+} -+ -+int rtw_blacklist_del(_queue *blist, const u8 *addr) -+{ -+ struct blacklist_ent *ent = NULL; -+ _list *list, *head; -+ u8 exist = _FALSE; -+ -+ enter_critical_bh(&blist->lock); -+ head = &blist->queue; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ ent = LIST_CONTAINOR(list, struct blacklist_ent, list); -+ list = get_next(list); -+ -+ if (_rtw_memcmp(ent->addr, addr, ETH_ALEN) == _TRUE) { -+ rtw_list_delete(&ent->list); -+ rtw_mfree(ent, sizeof(struct blacklist_ent)); -+ exist = _TRUE; -+ break; -+ } -+ -+ if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) { -+ rtw_list_delete(&ent->list); -+ rtw_mfree(ent, sizeof(struct blacklist_ent)); -+ } -+ } -+ -+ exit_critical_bh(&blist->lock); -+ -+ return exist == _TRUE ? _SUCCESS : RTW_ALREADY; -+} -+ -+int rtw_blacklist_search(_queue *blist, const u8 *addr) -+{ -+ struct blacklist_ent *ent = NULL; -+ _list *list, *head; -+ u8 exist = _FALSE; -+ -+ enter_critical_bh(&blist->lock); -+ head = &blist->queue; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ ent = LIST_CONTAINOR(list, struct blacklist_ent, list); -+ list = get_next(list); -+ -+ if (_rtw_memcmp(ent->addr, addr, ETH_ALEN) == _TRUE) { -+ if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) { -+ rtw_list_delete(&ent->list); -+ rtw_mfree(ent, sizeof(struct blacklist_ent)); -+ } else -+ exist = _TRUE; -+ break; -+ } -+ -+ if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) { -+ rtw_list_delete(&ent->list); -+ rtw_mfree(ent, sizeof(struct blacklist_ent)); -+ } -+ } -+ -+ exit_critical_bh(&blist->lock); -+ -+ return exist; -+} -+ -+void rtw_blacklist_flush(_queue *blist) -+{ -+ struct blacklist_ent *ent; -+ _list *list, *head; -+ _list tmp; -+ -+ _rtw_init_listhead(&tmp); -+ -+ enter_critical_bh(&blist->lock); -+ rtw_list_splice_init(&blist->queue, &tmp); -+ exit_critical_bh(&blist->lock); -+ -+ head = &tmp; -+ list = get_next(head); -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ ent = LIST_CONTAINOR(list, struct blacklist_ent, list); -+ list = get_next(list); -+ rtw_list_delete(&ent->list); -+ rtw_mfree(ent, sizeof(struct blacklist_ent)); -+ } -+} -+ -+void dump_blacklist(void *sel, _queue *blist, const char *title) -+{ -+ struct blacklist_ent *ent = NULL; -+ _list *list, *head; -+ -+ enter_critical_bh(&blist->lock); -+ head = &blist->queue; -+ list = get_next(head); -+ -+ if (rtw_end_of_queue_search(head, list) == _FALSE) { -+ if (title) -+ RTW_PRINT_SEL(sel, "%s:\n", title); -+ -+ while (rtw_end_of_queue_search(head, list) == _FALSE) { -+ ent = LIST_CONTAINOR(list, struct blacklist_ent, list); -+ list = get_next(list); -+ -+ if (rtw_time_after(rtw_get_current_time(), ent->exp_time)) -+ RTW_PRINT_SEL(sel, MAC_FMT" expired\n", MAC_ARG(ent->addr)); -+ else -+ RTW_PRINT_SEL(sel, MAC_FMT" %u\n", MAC_ARG(ent->addr) -+ , rtw_get_remaining_time_ms(ent->exp_time)); -+ } -+ -+ } -+ exit_critical_bh(&blist->lock); -+} -+#endif -+ -+/** -+* is_null - -+* -+* Return TRUE if c is null character -+* FALSE otherwise. -+*/ -+inline BOOLEAN is_null(char c) -+{ -+ if (c == '\0') -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+inline BOOLEAN is_all_null(char *c, int len) -+{ -+ for (; len > 0; len--) -+ if (c[len - 1] != '\0') -+ return _FALSE; -+ -+ return _TRUE; -+} -+ -+/** -+* is_eol - -+* -+* Return TRUE if c is represent for EOL (end of line) -+* FALSE otherwise. -+*/ -+inline BOOLEAN is_eol(char c) -+{ -+ if (c == '\r' || c == '\n') -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+/** -+* is_space - -+* -+* Return TRUE if c is represent for space -+* FALSE otherwise. -+*/ -+inline BOOLEAN is_space(char c) -+{ -+ if (c == ' ' || c == '\t') -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+/** -+* IsHexDigit - -+* -+* Return TRUE if chTmp is represent for hex digit -+* FALSE otherwise. -+*/ -+inline BOOLEAN IsHexDigit(char chTmp) -+{ -+ if ((chTmp >= '0' && chTmp <= '9') || -+ (chTmp >= 'a' && chTmp <= 'f') || -+ (chTmp >= 'A' && chTmp <= 'F')) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+/** -+* is_alpha - -+* -+* Return TRUE if chTmp is represent for alphabet -+* FALSE otherwise. -+*/ -+inline BOOLEAN is_alpha(char chTmp) -+{ -+ if ((chTmp >= 'a' && chTmp <= 'z') || -+ (chTmp >= 'A' && chTmp <= 'Z')) -+ return _TRUE; -+ else -+ return _FALSE; -+} -+ -+inline char alpha_to_upper(char c) -+{ -+ if ((c >= 'a' && c <= 'z')) -+ c = 'A' + (c - 'a'); -+ return c; -+} -+ -+int hex2num_i(char c) -+{ -+ if (c >= '0' && c <= '9') -+ return c - '0'; -+ if (c >= 'a' && c <= 'f') -+ return c - 'a' + 10; -+ if (c >= 'A' && c <= 'F') -+ return c - 'A' + 10; -+ return -1; -+} -+ -+int hex2byte_i(const char *hex) -+{ -+ int a, b; -+ a = hex2num_i(*hex++); -+ if (a < 0) -+ return -1; -+ b = hex2num_i(*hex++); -+ if (b < 0) -+ return -1; -+ return (a << 4) | b; -+} -+ -+int hexstr2bin(const char *hex, u8 *buf, size_t len) -+{ -+ size_t i; -+ int a; -+ const char *ipos = hex; -+ u8 *opos = buf; -+ -+ for (i = 0; i < len; i++) { -+ a = hex2byte_i(ipos); -+ if (a < 0) -+ return -1; -+ *opos++ = a; -+ ipos += 2; -+ } -+ return 0; -+} -+ -+/** -+ * hwaddr_aton - Convert ASCII string to MAC address -+ * @txt: MAC address as a string (e.g., "00:11:22:33:44:55") -+ * @addr: Buffer for the MAC address (ETH_ALEN = 6 bytes) -+ * Returns: 0 on success, -1 on failure (e.g., string not a MAC address) -+ */ -+int hwaddr_aton_i(const char *txt, u8 *addr) -+{ -+ int i; -+ -+ for (i = 0; i < 6; i++) { -+ int a, b; -+ -+ a = hex2num_i(*txt++); -+ if (a < 0) -+ return -1; -+ b = hex2num_i(*txt++); -+ if (b < 0) -+ return -1; -+ *addr++ = (a << 4) | b; -+ if (i < 5 && *txt++ != ':') -+ return -1; -+ } -+ -+ return 0; -+} -+ -diff --git a/drivers/staging/rtl8723cs/platform/custom_country_chplan.h b/drivers/staging/rtl8723cs/platform/custom_country_chplan.h -new file mode 100644 -index 000000000000..67f621fe54e4 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/custom_country_chplan.h -@@ -0,0 +1,22 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+ -+#error "You have defined CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP to use a customized map of your own instead of the default one" -+#error "Before removing these error notifications, please make sure regulatory certification requirements of your target markets" -+ -+static const struct country_chplan CUSTOMIZED_country_chplan_map[] = { -+ COUNTRY_CHPLAN_ENT("TW", 0x76, 1), /* Taiwan */ -+}; -+ -diff --git a/drivers/staging/rtl8723cs/platform/platform_ARM_SUN50IW1P1_sdio.c b/drivers/staging/rtl8723cs/platform/platform_ARM_SUN50IW1P1_sdio.c -new file mode 100644 -index 000000000000..2586455de8c3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_ARM_SUN50IW1P1_sdio.c -@@ -0,0 +1,86 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/* -+ * Description: -+ * This file can be applied to following platforms: -+ * CONFIG_PLATFORM_ARM_SUN50IW1P1 -+ */ -+#include -+#ifdef CONFIG_GPIO_WAKEUP -+#include -+#endif -+ -+#ifdef CONFIG_MMC -+#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) -+extern void sunxi_mmc_rescan_card(unsigned ids); -+extern void sunxi_wlan_set_power(int on); -+extern int sunxi_wlan_get_bus_index(void); -+extern int sunxi_wlan_get_oob_irq(void); -+extern int sunxi_wlan_get_oob_irq_flags(void); -+#endif -+#ifdef CONFIG_GPIO_WAKEUP -+extern unsigned int oob_irq; -+#endif -+#endif /* CONFIG_MMC */ -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_MMC -+ { -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) -+ int wlan_bus_index = sunxi_wlan_get_bus_index(); -+ if (wlan_bus_index < 0) -+ return wlan_bus_index; -+ -+ sunxi_wlan_set_power(1); -+ mdelay(100); -+ sunxi_mmc_rescan_card(wlan_bus_index); -+#endif -+ RTW_INFO("%s: power up, rescan card.\n", __FUNCTION__); -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) -+ oob_irq = sunxi_wlan_get_oob_irq(); -+#endif -+#endif /* CONFIG_GPIO_WAKEUP */ -+ } -+#endif /* CONFIG_MMC */ -+ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+#ifdef CONFIG_MMC -+#if defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) -+ int wlan_bus_index = sunxi_wlan_get_bus_index(); -+ if (wlan_bus_index < 0) -+ return; -+ -+ sunxi_mmc_rescan_card(wlan_bus_index); -+ mdelay(100); -+ sunxi_wlan_set_power(0); -+#endif -+ RTW_INFO("%s: remove card, power off.\n", __FUNCTION__); -+#endif /* CONFIG_MMC */ -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_ARM_SUNnI_sdio.c b/drivers/staging/rtl8723cs/platform/platform_ARM_SUNnI_sdio.c -new file mode 100644 -index 000000000000..8a52aa90cb0d ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_ARM_SUNnI_sdio.c -@@ -0,0 +1,130 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/* -+ * Description: -+ * This file can be applied to following platforms: -+ * CONFIG_PLATFORM_ARM_SUN6I -+ * CONFIG_PLATFORM_ARM_SUN7I -+ * CONFIG_PLATFORM_ARM_SUN8I -+ */ -+#include -+#include -+#ifdef CONFIG_GPIO_WAKEUP -+#include -+#endif -+ -+#ifdef CONFIG_MMC -+static int sdc_id = -1; -+static signed int gpio_eint_wlan = -1; -+static u32 eint_wlan_handle = 0; -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+extern void sw_mci_rescan_card(unsigned id, unsigned insert); -+#elif defined(CONFIG_PLATFORM_ARM_SUN8I) -+extern void sunxi_mci_rescan_card(unsigned id, unsigned insert); -+#endif -+ -+#ifdef CONFIG_PLATFORM_ARM_SUN8I_W5P1 -+extern int get_rf_mod_type(void); -+#else -+extern int wifi_pm_get_mod_type(void); -+#endif -+ -+extern void wifi_pm_power(int on); -+#ifdef CONFIG_GPIO_WAKEUP -+extern unsigned int oob_irq; -+#endif -+#endif /* CONFIG_MMC */ -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_MMC -+ { -+ script_item_u val; -+ script_item_value_type_e type; -+ -+#ifdef CONFIG_PLATFORM_ARM_SUN8I_W5P1 -+ unsigned int mod_sel = get_rf_mod_type(); -+#else -+ unsigned int mod_sel = wifi_pm_get_mod_type(); -+#endif -+ -+ type = script_get_item("wifi_para", "wifi_sdc_id", &val); -+ if (SCIRPT_ITEM_VALUE_TYPE_INT != type) { -+ RTW_INFO("get wifi_sdc_id failed\n"); -+ ret = -1; -+ } else { -+ sdc_id = val.val; -+ RTW_INFO("----- %s sdc_id: %d, mod_sel: %d\n", __FUNCTION__, sdc_id, mod_sel); -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+ sw_mci_rescan_card(sdc_id, 1); -+#elif defined(CONFIG_PLATFORM_ARM_SUN8I) -+ sunxi_mci_rescan_card(sdc_id, 1); -+#endif -+ mdelay(100); -+ wifi_pm_power(1); -+ -+ RTW_INFO("%s: power up, rescan card.\n", __FUNCTION__); -+ } -+ -+#ifdef CONFIG_GPIO_WAKEUP -+#ifdef CONFIG_PLATFORM_ARM_SUN8I_W5P1 -+ type = script_get_item("wifi_para", "wl_host_wake", &val); -+#else -+#ifdef CONFIG_RTL8723B -+ type = script_get_item("wifi_para", "rtl8723bs_wl_host_wake", &val); -+#endif -+#ifdef CONFIG_RTL8188E -+ type = script_get_item("wifi_para", "rtl8189es_host_wake", &val); -+#endif -+#endif /* CONFIG_PLATFORM_ARM_SUN8I_W5P1 */ -+ if (SCIRPT_ITEM_VALUE_TYPE_PIO != type) { -+ RTW_INFO("No definition of wake up host PIN\n"); -+ ret = -1; -+ } else { -+ gpio_eint_wlan = val.gpio.gpio; -+#ifdef CONFIG_PLATFORM_ARM_SUN8I -+ oob_irq = gpio_to_irq(gpio_eint_wlan); -+#endif -+ } -+#endif /* CONFIG_GPIO_WAKEUP */ -+ } -+#endif /* CONFIG_MMC */ -+ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+#ifdef CONFIG_MMC -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+ sw_mci_rescan_card(sdc_id, 0); -+#elif defined(CONFIG_PLATFORM_ARM_SUN8I) -+ sunxi_mci_rescan_card(sdc_id, 0); -+#endif -+ mdelay(100); -+ wifi_pm_power(0); -+ -+ RTW_INFO("%s: remove card, power off.\n", __FUNCTION__); -+#endif /* CONFIG_MMC */ -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_ARM_SUNxI_sdio.c b/drivers/staging/rtl8723cs/platform/platform_ARM_SUNxI_sdio.c -new file mode 100644 -index 000000000000..795b7e7f7998 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_ARM_SUNxI_sdio.c -@@ -0,0 +1,90 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include -+ -+#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL -+#ifdef CONFIG_WITS_EVB_V13 -+ #define SDIOID 0 -+#else /* !CONFIG_WITS_EVB_V13 */ -+ #define SDIOID (CONFIG_CHIP_ID == 1123 ? 3 : 1) -+#endif /* !CONFIG_WITS_EVB_V13 */ -+ -+#define SUNXI_SDIO_WIFI_NUM_RTL8189ES 10 -+extern void sunximmc_rescan_card(unsigned id, unsigned insert); -+extern int mmc_pm_get_mod_type(void); -+extern int mmc_pm_gpio_ctrl(char *name, int level); -+/* -+ * rtl8189es_shdn = port:PH09<1><0> -+ * rtl8189es_wakeup = port:PH10<1><1> -+ * rtl8189es_vdd_en = port:PH11<1><0> -+ * rtl8189es_vcc_en = port:PH12<1><0> -+ */ -+ -+int rtl8189es_sdio_powerup(void) -+{ -+ mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 1); -+ udelay(100); -+ mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 1); -+ udelay(50); -+ mmc_pm_gpio_ctrl("rtl8189es_shdn", 1); -+ return 0; -+} -+ -+int rtl8189es_sdio_poweroff(void) -+{ -+ mmc_pm_gpio_ctrl("rtl8189es_shdn", 0); -+ mmc_pm_gpio_ctrl("rtl8189es_vcc_en", 0); -+ mmc_pm_gpio_ctrl("rtl8189es_vdd_en", 0); -+ return 0; -+} -+#endif /* CONFIG_MMC_SUNXI_POWER_CONTROL */ -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL -+ unsigned int mod_sel = mmc_pm_get_mod_type(); -+#endif /* CONFIG_MMC_SUNXI_POWER_CONTROL */ -+ -+ -+#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL -+ if (mod_sel == SUNXI_SDIO_WIFI_NUM_RTL8189ES) { -+ rtl8189es_sdio_powerup(); -+ sunximmc_rescan_card(SDIOID, 1); -+ printk("[rtl8189es] %s: power up, rescan card.\n", __FUNCTION__); -+ } else { -+ ret = -1; -+ printk("[rtl8189es] %s: mod_sel = %d is incorrect.\n", __FUNCTION__, mod_sel); -+ } -+#endif /* CONFIG_MMC_SUNXI_POWER_CONTROL */ -+ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+#ifdef CONFIG_MMC_SUNXI_POWER_CONTROL -+ sunximmc_rescan_card(SDIOID, 0); -+#ifdef CONFIG_RTL8188E -+ rtl8189es_sdio_poweroff(); -+ printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); -+#endif /* CONFIG_RTL8188E */ -+#endif /* CONFIG_MMC_SUNXI_POWER_CONTROL */ -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_ARM_SUNxI_usb.c b/drivers/staging/rtl8723cs/platform/platform_ARM_SUNxI_usb.c -new file mode 100644 -index 000000000000..9c2abc4f6f44 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_ARM_SUNxI_usb.c -@@ -0,0 +1,136 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/* -+ * Description: -+ * This file can be applied to following platforms: -+ * CONFIG_PLATFORM_ARM_SUNXI Series platform -+ * -+ */ -+ -+#include -+#include -+ -+#ifdef CONFIG_PLATFORM_ARM_SUNxI -+extern int sw_usb_disable_hcd(__u32 usbc_no); -+extern int sw_usb_enable_hcd(__u32 usbc_no); -+static int usb_wifi_host = 2; -+#endif -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+extern int sw_usb_disable_hcd(__u32 usbc_no); -+extern int sw_usb_enable_hcd(__u32 usbc_no); -+extern void wifi_pm_power(int on); -+static script_item_u item; -+#endif -+ -+#ifdef CONFIG_PLATFORM_ARM_SUN8I -+extern int sunxi_usb_disable_hcd(__u32 usbc_no); -+extern int sunxi_usb_enable_hcd(__u32 usbc_no); -+extern void wifi_pm_power(int on); -+static script_item_u item; -+#endif -+ -+ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_PLATFORM_ARM_SUNxI -+#ifndef CONFIG_RTL8723A -+ { -+ /* ----------get usb_wifi_usbc_num------------- */ -+ ret = script_parser_fetch("usb_wifi_para", "usb_wifi_usbc_num", (int *)&usb_wifi_host, 64); -+ if (ret != 0) { -+ RTW_INFO("ERR: script_parser_fetch usb_wifi_usbc_num failed\n"); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ RTW_INFO("sw_usb_enable_hcd: usbc_num = %d\n", usb_wifi_host); -+ sw_usb_enable_hcd(usb_wifi_host); -+ } -+#endif /* CONFIG_RTL8723A */ -+#endif /* CONFIG_PLATFORM_ARM_SUNxI */ -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+ { -+ script_item_value_type_e type; -+ -+ type = script_get_item("wifi_para", "wifi_usbc_id", &item); -+ if (SCIRPT_ITEM_VALUE_TYPE_INT != type) { -+ printk("ERR: script_get_item wifi_usbc_id failed\n"); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ -+ printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); -+ wifi_pm_power(1); -+ mdelay(10); -+ -+#if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) -+ sw_usb_enable_hcd(item.val); -+#endif -+ } -+#endif /* defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) */ -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN8I) -+ { -+ script_item_value_type_e type; -+ -+ type = script_get_item("wifi_para", "wifi_usbc_id", &item); -+ if (SCIRPT_ITEM_VALUE_TYPE_INT != type) { -+ printk("ERR: script_get_item wifi_usbc_id failed\n"); -+ ret = -ENOMEM; -+ goto exit; -+ } -+ -+ printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); -+ wifi_pm_power(1); -+ mdelay(10); -+ -+#if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) -+ sunxi_usb_enable_hcd(item.val); -+#endif -+ } -+#endif /* CONFIG_PLATFORM_ARM_SUN8I */ -+ -+exit: -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+ -+#ifdef CONFIG_PLATFORM_ARM_SUNxI -+#ifndef CONFIG_RTL8723A -+ RTW_INFO("sw_usb_disable_hcd: usbc_num = %d\n", usb_wifi_host); -+ sw_usb_disable_hcd(usb_wifi_host); -+#endif /* ifndef CONFIG_RTL8723A */ -+#endif /* CONFIG_PLATFORM_ARM_SUNxI */ -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) -+ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) -+ sw_usb_disable_hcd(item.val); -+ #endif -+ wifi_pm_power(0); -+#endif /* defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) */ -+ -+#if defined(CONFIG_PLATFORM_ARM_SUN8I) -+ #if !(defined(CONFIG_RTL8723A)) && !(defined(CONFIG_RTL8723B)) -+ sunxi_usb_disable_hcd(item.val); -+ #endif -+ wifi_pm_power(0); -+#endif /* defined(CONFIG_PLATFORM_ARM_SUN8I) */ -+ -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_ARM_WMT_sdio.c b/drivers/staging/rtl8723cs/platform/platform_ARM_WMT_sdio.c -new file mode 100644 -index 000000000000..d85002c15fd3 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_ARM_WMT_sdio.c -@@ -0,0 +1,46 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include -+#include -+#include -+ -+extern void wmt_detect_sdio2(void); -+extern void force_remove_sdio2(void); -+ -+int platform_wifi_power_on(void) -+{ -+ int err = 0; -+ err = gpio_request(WMT_PIN_GP62_SUSGPIO1, "wifi_chip_en"); -+ if (err < 0) { -+ printk("request gpio for rtl8188eu failed!\n"); -+ return err; -+ } -+ gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 0);/* pull sus_gpio1 to 0 to open vcc_wifi. */ -+ printk("power on rtl8189.\n"); -+ msleep(500); -+ wmt_detect_sdio2(); -+ printk("[rtl8189es] %s: new card, power on.\n", __FUNCTION__); -+ return err; -+} -+ -+void platform_wifi_power_off(void) -+{ -+ force_remove_sdio2(); -+ -+ gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 1);/* pull sus_gpio1 to 1 to close vcc_wifi. */ -+ printk("power off rtl8189.\n"); -+ gpio_free(WMT_PIN_GP62_SUSGPIO1); -+ printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_RTK_DMP_usb.c b/drivers/staging/rtl8723cs/platform/platform_RTK_DMP_usb.c -new file mode 100644 -index 000000000000..cb740b2eebb5 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_RTK_DMP_usb.c -@@ -0,0 +1,30 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include -+ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ u32 tmp; -+ tmp = readl((volatile unsigned int *)0xb801a608); -+ tmp &= 0xffffff00; -+ tmp |= 0x55; -+ writel(tmp, (volatile unsigned int *)0xb801a608); /* write dummy register for 1055 */ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_aml_s905_sdio.c b/drivers/staging/rtl8723cs/platform/platform_aml_s905_sdio.c -new file mode 100644 -index 000000000000..334ca03c9801 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_aml_s905_sdio.c -@@ -0,0 +1,54 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2018 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include /* pr_info(() */ -+#include /* msleep() */ -+#include "platform_aml_s905_sdio.h" /* sdio_reinit() and etc */ -+ -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) -+ ret = wifi_setup_dt(); -+ if (ret) { -+ pr_err("%s: setup dt failed!!(%d)\n", __func__, ret); -+ return -1; -+ } -+#endif /* kernel < 3.14.0 */ -+ -+#if 0 /* Seems redundancy? Already done before insert driver */ -+ pr_info("######%s:\n", __func__); -+ extern_wifi_set_enable(0); -+ msleep(500); -+ extern_wifi_set_enable(1); -+ msleep(500); -+ sdio_reinit(); -+#endif -+ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) -+ wifi_teardown_dt(); -+#endif /* kernel < 3.14.0 */ -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_aml_s905_sdio.h b/drivers/staging/rtl8723cs/platform/platform_aml_s905_sdio.h -new file mode 100644 -index 000000000000..2b87576dd629 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_aml_s905_sdio.h -@@ -0,0 +1,28 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2018 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __PLATFORM_AML_S905_SDIO_H__ -+#define __PLATFORM_AML_S905_SDIO_H__ -+ -+#include /* Linux vresion */ -+ -+extern void sdio_reinit(void); -+extern void extern_wifi_set_enable(int is_on); -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) -+extern void wifi_teardown_dt(void); -+extern int wifi_setup_dt(void); -+#endif /* kernel < 3.14.0 */ -+ -+#endif /* __PLATFORM_AML_S905_SDIO_H__ */ -diff --git a/drivers/staging/rtl8723cs/platform/platform_arm_act_sdio.c b/drivers/staging/rtl8723cs/platform/platform_arm_act_sdio.c -new file mode 100644 -index 000000000000..ad7b6cfed455 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_arm_act_sdio.c -@@ -0,0 +1,53 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+/* -+ * Description: -+ * This file can be applied to following platforms: -+ * CONFIG_PLATFORM_ACTIONS_ATM703X -+ */ -+#include -+ -+#ifdef CONFIG_PLATFORM_ACTIONS_ATM705X -+extern int acts_wifi_init(void); -+extern void acts_wifi_cleanup(void); -+#endif -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+#ifdef CONFIG_PLATFORM_ACTIONS_ATM705X -+ ret = acts_wifi_init(); -+ if (unlikely(ret < 0)) { -+ pr_err("%s Failed to register the power control driver.\n", __FUNCTION__); -+ goto exit; -+ } -+#endif -+ -+exit: -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+#ifdef CONFIG_PLATFORM_ACTIONS_ATM705X -+ acts_wifi_cleanup(); -+#endif -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_hisilicon_hi3798_sdio.c b/drivers/staging/rtl8723cs/platform/platform_hisilicon_hi3798_sdio.c -new file mode 100644 -index 000000000000..11a08320ed82 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_hisilicon_hi3798_sdio.c -@@ -0,0 +1,110 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2017 - 2018 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include /* mdelay() */ -+#include /* __io_address(), readl(), writel() */ -+#include "platform_hisilicon_hi3798_sdio.h" /* HI_S32() and etc. */ -+ -+typedef enum hi_GPIO_DIR_E { -+ HI_DIR_OUT = 0, -+ HI_DIR_IN = 1, -+} HI_GPIO_DIR_E; -+ -+#define RTL_REG_ON_GPIO (4*8 + 3) -+ -+#define REG_BASE_CTRL __io_address(0xf8a20008) -+ -+int gpio_wlan_reg_on = RTL_REG_ON_GPIO; -+#if 0 -+module_param(gpio_wlan_reg_on, uint, 0644); -+MODULE_PARM_DESC(gpio_wlan_reg_on, "wlan reg_on gpio num (default:gpio4_3)"); -+#endif -+ -+static int hi_gpio_set_value(u32 gpio, u32 value) -+{ -+ HI_S32 s32Status; -+ -+ s32Status = HI_DRV_GPIO_SetDirBit(gpio, HI_DIR_OUT); -+ if (s32Status != HI_SUCCESS) { -+ pr_err("gpio(%d) HI_DRV_GPIO_SetDirBit HI_DIR_OUT failed\n", -+ gpio); -+ return -1; -+ } -+ -+ s32Status = HI_DRV_GPIO_WriteBit(gpio, value); -+ if (s32Status != HI_SUCCESS) { -+ pr_err("gpio(%d) HI_DRV_GPIO_WriteBit value(%d) failed\n", -+ gpio, value); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+static int hisi_wlan_set_carddetect(bool present) -+{ -+ u32 regval; -+ u32 mask; -+ -+ -+#ifndef CONFIG_HISI_SDIO_ID -+ return; -+#endif -+ pr_info("SDIO ID=%d\n", CONFIG_HISI_SDIO_ID); -+#if (CONFIG_HISI_SDIO_ID == 1) -+ mask = 1; -+#elif (CONFIG_HISI_SDIO_ID == 0) -+ mask = 2; -+#endif -+ -+ regval = readl(REG_BASE_CTRL); -+ if (present) { -+ pr_info("====== Card detection to detect SDIO card! ======\n"); -+ /* set card_detect low to detect card */ -+ regval |= mask; -+ } else { -+ pr_info("====== Card detection to remove SDIO card! ======\n"); -+ /* set card_detect high to remove card */ -+ regval &= ~(mask); -+ } -+ writel(regval, REG_BASE_CTRL); -+ -+ return 0; -+} -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+ -+ hi_gpio_set_value(gpio_wlan_reg_on, 1); -+ mdelay(100); -+ hisi_wlan_set_carddetect(1); -+ mdelay(2000); -+ pr_info("======== set_carddetect delay 2s! ========\n"); -+ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+ hisi_wlan_set_carddetect(0); -+ mdelay(100); -+ hi_gpio_set_value(gpio_wlan_reg_on, 0); -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_hisilicon_hi3798_sdio.h b/drivers/staging/rtl8723cs/platform/platform_hisilicon_hi3798_sdio.h -new file mode 100644 -index 000000000000..1ad42406f014 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_hisilicon_hi3798_sdio.h -@@ -0,0 +1,28 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2017 - 2018 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __PLATFORM_HISILICON_HI3798_SDIO_H__ -+#define __PLATFORM_HISILICON_HI3798_SDIO_H__ -+ -+typedef unsigned int HI_U32; -+ -+typedef int HI_S32; -+ -+#define HI_SUCCESS 0 -+#define HI_FAILURE (-1) -+ -+extern HI_S32 HI_DRV_GPIO_SetDirBit(HI_U32 u32GpioNo, HI_U32 u32DirBit); -+extern HI_S32 HI_DRV_GPIO_WriteBit(HI_U32 u32GpioNo, HI_U32 u32BitValue); -+ -+#endif /* __PLATFORM_HISILICON_HI3798_SDIO_H__ */ -diff --git a/drivers/staging/rtl8723cs/platform/platform_ops.c b/drivers/staging/rtl8723cs/platform/platform_ops.c -new file mode 100644 -index 000000000000..de08abc00759 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_ops.c -@@ -0,0 +1,34 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef CONFIG_PLATFORM_OPS -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+#include -+extern unsigned int oob_irq; -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+ //oob_irq = rockchip_wifi_get_oob_irq(); -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+} -+#endif /* !CONFIG_PLATFORM_OPS */ -diff --git a/drivers/staging/rtl8723cs/platform/platform_ops.h b/drivers/staging/rtl8723cs/platform/platform_ops.h -new file mode 100644 -index 000000000000..12caf3c853a1 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_ops.h -@@ -0,0 +1,26 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __PLATFORM_OPS_H__ -+#define __PLATFORM_OPS_H__ -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void); -+void platform_wifi_power_off(void); -+ -+#endif /* __PLATFORM_OPS_H__ */ -diff --git a/drivers/staging/rtl8723cs/platform/platform_sprd_sdio.c b/drivers/staging/rtl8723cs/platform/platform_sprd_sdio.c -new file mode 100644 -index 000000000000..34061d05d428 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_sprd_sdio.c -@@ -0,0 +1,84 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2013 - 2017 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include -+ -+extern void sdhci_bus_scan(void); -+#ifndef ANDROID_2X -+extern int sdhci_device_attached(void); -+#endif -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+ -+#ifdef CONFIG_RTL8188E -+ rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_ON); -+#endif /* CONFIG_RTL8188E */ -+ -+ /* Pull up pwd pin, make wifi leave power down mode. */ -+ rtw_wifi_gpio_init(); -+ rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_ON); -+ -+#if (MP_DRIVER == 1) && (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) -+ /* Pull up BT reset pin. */ -+ rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON); -+#endif -+ rtw_mdelay_os(5); -+ -+ sdhci_bus_scan(); -+#ifdef CONFIG_RTL8723B -+ /* YJ,test,130305 */ -+ rtw_mdelay_os(1000); -+#endif -+#ifdef ANDROID_2X -+ rtw_mdelay_os(200); -+#else /* !ANDROID_2X */ -+ if (1) { -+ int i = 0; -+ -+ for (i = 0; i <= 50; i++) { -+ msleep(10); -+ if (sdhci_device_attached()) -+ break; -+ printk("%s delay times:%d\n", __func__, i); -+ } -+ } -+#endif /* !ANDROID_2X */ -+ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+ /* Pull down pwd pin, make wifi enter power down mode. */ -+ rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF); -+ rtw_mdelay_os(5); -+ rtw_wifi_gpio_deinit(); -+ -+#ifdef CONFIG_RTL8188E -+ rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_OFF); -+#endif /* CONFIG_RTL8188E */ -+ -+#ifdef CONFIG_WOWLAN -+ if (mmc_host) -+ mmc_host->pm_flags &= ~MMC_PM_KEEP_POWER; -+#endif /* CONFIG_WOWLAN */ -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_zte_zx296716_sdio.c b/drivers/staging/rtl8723cs/platform/platform_zte_zx296716_sdio.c -new file mode 100644 -index 000000000000..472d24d8563c ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_zte_zx296716_sdio.c -@@ -0,0 +1,53 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2018 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#include /* pr_info(() */ -+#include /* msleep() */ -+#include "platform_zte_zx296716_sdio.h" /* sdio_reinit() and etc */ -+ -+ -+/* -+ * Return: -+ * 0: power on successfully -+ * others: power on failed -+ */ -+int platform_wifi_power_on(void) -+{ -+ int ret = 0; -+ -+ pr_info("######%s: disable--1--\n", __func__); -+ extern_wifi_set_enable(0); -+ /*msleep(500);*/ /* add in function:extern_wifi_set_enable */ -+ pr_info("######%s: enable--2---\n", __func__); -+ extern_wifi_set_enable(1); -+ /*msleep(500);*/ -+ sdio_reinit(); -+ -+ return ret; -+} -+ -+void platform_wifi_power_off(void) -+{ -+ int card_val; -+ -+ pr_info("######%s:\n", __func__); -+#ifdef CONFIG_A16T03_BOARD -+ card_val = sdio_host_is_null(); -+ if (card_val) -+ remove_card(); -+#endif /* CONFIG_A16T03_BOARD */ -+ extern_wifi_set_enable(0); -+ -+ /*msleep(500);*/ -+} -diff --git a/drivers/staging/rtl8723cs/platform/platform_zte_zx296716_sdio.h b/drivers/staging/rtl8723cs/platform/platform_zte_zx296716_sdio.h -new file mode 100644 -index 000000000000..3a4fba1a5743 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/platform/platform_zte_zx296716_sdio.h -@@ -0,0 +1,25 @@ -+/****************************************************************************** -+ * -+ * Copyright(c) 2016 - 2018 Realtek Corporation. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ *****************************************************************************/ -+#ifndef __PLATFORM_ZTE_ZX296716_SDIO_H__ -+#define __PLATFORM_ZTE_ZX296716_SDIO_H__ -+ -+extern void sdio_reinit(void); -+extern void extern_wifi_set_enable(int val); -+#ifdef CONFIG_A16T03_BOARD -+extern int sdio_host_is_null(void); -+extern void remove_card(void); -+#endif /* CONFIG_A16T03_BOARD */ -+ -+#endif /* __PLATFORM_ZTE_ZX296716_SDIO_H__ */ -diff --git a/drivers/staging/rtl8723cs/runwpa b/drivers/staging/rtl8723cs/runwpa -new file mode 100644 -index 000000000000..f825e8bdb123 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/runwpa -@@ -0,0 +1,20 @@ -+#!/bin/bash -+ -+if [ "`which iwconfig`" = "" ] ; then -+ echo "WARNING:Wireless tool not exist!" -+ echo " Please install it!" -+ exit -+else -+ if [ `uname -r | cut -d. -f2` -eq 4 ]; then -+ wpa_supplicant -D ipw -c wpa1.conf -i wlan0 -+ else -+ if [ `iwconfig -v |awk '{print $4}' | head -n 1` -lt 18 ] ; then -+ wpa_supplicant -D ipw -c wpa1.conf -i wlan0 -+ else -+ wpa_supplicant -D wext -c wpa1.conf -i wlan0 -+ fi -+ -+ fi -+fi -+ -+ -diff --git a/drivers/staging/rtl8723cs/wlan0dhcp b/drivers/staging/rtl8723cs/wlan0dhcp -new file mode 100644 -index 000000000000..60433829cfe6 ---- /dev/null -+++ b/drivers/staging/rtl8723cs/wlan0dhcp -@@ -0,0 +1,16 @@ -+#!/bin/bash -+ -+var0=`ps aux|awk '/dhclient wlan0/'|awk '$11!="awk"{print $2}'` -+ -+kill $var0 -+cp ifcfg-wlan0 /etc/sysconfig/network-scripts/ -+ -+dhclient wlan0 -+ -+var1=`ifconfig wlan0 |awk '/inet/{print $2}'|awk -F: '{print $2}'` -+ -+ -+rm -f /etc/sysconfig/network-scripts/ifcfg-wlan0 -+ -+echo "get ip: $var1" -+ -diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c -index 8c80bd06dd9f..f234c37dc574 100644 ---- a/drivers/thermal/sun8i_thermal.c -+++ b/drivers/thermal/sun8i_thermal.c -@@ -288,8 +288,13 @@ static int sun8i_ths_calibrate(struct ths_device *tmdev) - - calcell = devm_nvmem_cell_get(dev, "calibration"); - if (IS_ERR(calcell)) { -+ dev_err_probe(dev, PTR_ERR(calcell), -+ "Failed to get calibration nvmem cell (%pe)\n", -+ calcell); -+ - if (PTR_ERR(calcell) == -EPROBE_DEFER) - return -EPROBE_DEFER; -+ - /* - * Even if the external calibration data stored in sid is - * not accessible, the THS hardware can still work, although -@@ -309,6 +314,8 @@ static int sun8i_ths_calibrate(struct ths_device *tmdev) - caldata = nvmem_cell_read(calcell, &callen); - if (IS_ERR(caldata)) { - ret = PTR_ERR(caldata); -+ dev_err(dev, "Failed to read calibration data (%pe)\n", -+ caldata); - goto out; - } - -@@ -331,23 +338,33 @@ static int sun8i_ths_resource_init(struct ths_device *tmdev) - return PTR_ERR(base); - - tmdev->regmap = devm_regmap_init_mmio(dev, base, &config); -- if (IS_ERR(tmdev->regmap)) -+ if (IS_ERR(tmdev->regmap)) { -+ dev_err(dev, "Failed to init regmap (%pe)\n", tmdev->regmap); - return PTR_ERR(tmdev->regmap); -+ } - - if (tmdev->chip->has_bus_clk_reset) { - tmdev->reset = devm_reset_control_get(dev, NULL); -- if (IS_ERR(tmdev->reset)) -+ if (IS_ERR(tmdev->reset)) { -+ dev_err(dev, "Failed to get reset (%pe)\n", tmdev->reset); - return PTR_ERR(tmdev->reset); -+ } - - tmdev->bus_clk = devm_clk_get(&pdev->dev, "bus"); -- if (IS_ERR(tmdev->bus_clk)) -+ if (IS_ERR(tmdev->bus_clk)) { -+ dev_err(dev, "Failed to get bus clock (%pe)\n", -+ tmdev->bus_clk); - return PTR_ERR(tmdev->bus_clk); -+ } - } - - if (tmdev->chip->has_mod_clk) { - tmdev->mod_clk = devm_clk_get(&pdev->dev, "mod"); -- if (IS_ERR(tmdev->mod_clk)) -+ if (IS_ERR(tmdev->mod_clk)) { -+ dev_err(dev, "Failed to get mod clock (%pe)\n", -+ tmdev->mod_clk); - return PTR_ERR(tmdev->mod_clk); -+ } - } - - ret = reset_control_deassert(tmdev->reset); -@@ -472,8 +489,12 @@ static int sun8i_ths_register(struct ths_device *tmdev) - i, - &tmdev->sensor[i], - &ths_ops); -- if (IS_ERR(tmdev->sensor[i].tzd)) -+ if (IS_ERR(tmdev->sensor[i].tzd)) { -+ dev_err(tmdev->dev, -+ "Failed to register sensor %d (%pe)\n", -+ i, tmdev->sensor[i].tzd); - return PTR_ERR(tmdev->sensor[i].tzd); -+ } - - if (devm_thermal_add_hwmon_sysfs(tmdev->sensor[i].tzd)) - dev_warn(tmdev->dev, -@@ -524,8 +545,10 @@ static int sun8i_ths_probe(struct platform_device *pdev) - ret = devm_request_threaded_irq(dev, irq, NULL, - sun8i_irq_thread, - IRQF_ONESHOT, "ths", tmdev); -- if (ret) -+ if (ret) { -+ dev_err(dev, "Failed to request irq (%d)\n", ret); - return ret; -+ } - - return 0; - } -diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c -index 9e204f9b799a..458de6713f70 100644 ---- a/drivers/tty/serial/8250/8250_dw.c -+++ b/drivers/tty/serial/8250/8250_dw.c -@@ -522,6 +522,10 @@ static int dw8250_probe(struct platform_device *pdev) - /* Always ask for fixed clock rate from a property. */ - device_property_read_u32(dev, "clock-frequency", &p->uartclk); - -+ val = 0; -+ device_property_read_u32(dev, "fifo-size", &val); -+ p->fifosize = val; -+ - /* If there is separate baudclk, get the rate from it. */ - data->clk = devm_clk_get_optional(dev, "baudclk"); - if (data->clk == NULL) -diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c -index b0af13074cd3..3d3a656d6e95 100644 ---- a/drivers/tty/serial/8250/8250_port.c -+++ b/drivers/tty/serial/8250/8250_port.c -@@ -847,6 +847,9 @@ static int size_fifo(struct uart_8250_port *up) - unsigned short old_dl; - int count; - -+ if (up->port.fifosize) -+ return up->port.fifosize; -+ - old_lcr = serial_in(up, UART_LCR); - serial_out(up, UART_LCR, 0); - old_fcr = serial_in(up, UART_FCR); -diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c -index 6ade3daf7858..cb556617aa34 100644 ---- a/drivers/usb/core/quirks.c -+++ b/drivers/usb/core/quirks.c -@@ -501,6 +501,9 @@ static const struct usb_device_id usb_quirk_list[] = { - /* INTEL VALUE SSD */ - { USB_DEVICE(0x8086, 0xf1a5), .driver_info = USB_QUIRK_RESET_RESUME }, - -+ /* Quectel EG25G Modem */ -+ { USB_DEVICE(0x2c7c, 0x0125), .driver_info = USB_QUIRK_RESET }, -+ - { } /* terminating entry must be last */ - }; - -diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c -index 1cd87729ba60..fc0457db62e1 100644 ---- a/drivers/usb/musb/musb_core.c -+++ b/drivers/usb/musb/musb_core.c -@@ -2004,10 +2004,14 @@ static void musb_pm_runtime_check_session(struct musb *musb) - MUSB_DEVCTL_HR; - switch (devctl & ~s) { - case MUSB_QUIRK_B_DISCONNECT_99: -- musb_dbg(musb, "Poll devctl in case of suspend after disconnect\n"); -- schedule_delayed_work(&musb->irq_work, -- msecs_to_jiffies(1000)); -- break; -+ if (musb->quirk_retries && !musb->flush_irq_work) { -+ musb_dbg(musb, "Poll devctl in case of suspend after disconnect\n"); -+ schedule_delayed_work(&musb->irq_work, -+ msecs_to_jiffies(1000)); -+ musb->quirk_retries--; -+ break; -+ } -+ fallthrough; - case MUSB_QUIRK_B_INVALID_VBUS_91: - if (musb->quirk_retries && !musb->flush_irq_work) { - musb_dbg(musb, -diff --git a/drivers/usb/typec/Kconfig b/drivers/usb/typec/Kconfig -index 270e81c087e9..fcc8e05a7eb4 100644 ---- a/drivers/usb/typec/Kconfig -+++ b/drivers/usb/typec/Kconfig -@@ -50,6 +50,17 @@ source "drivers/usb/typec/tcpm/Kconfig" - - source "drivers/usb/typec/ucsi/Kconfig" - -+config TYPEC_ANX7688 -+ tristate "Analogix ANX7688 Type-C DRP Port controller and mux driver" -+ depends on I2C -+ depends on USB_ROLE_SWITCH -+ help -+ Say Y or M here if your system has Analogix ANX7688 Type-C Bridge -+ controller driver. -+ -+ If you choose to build this driver as a dynamically linked module, the -+ module will be called anx7688.ko. -+ - config TYPEC_HD3SS3220 - tristate "TI HD3SS3220 Type-C DRP Port controller driver" - depends on I2C -diff --git a/drivers/usb/typec/Makefile b/drivers/usb/typec/Makefile -index d03b48c4b864..d5e407d9e250 100644 ---- a/drivers/usb/typec/Makefile -+++ b/drivers/usb/typec/Makefile -@@ -4,6 +4,7 @@ typec-y := class.o mux.o bus.o - obj-$(CONFIG_TYPEC) += altmodes/ - obj-$(CONFIG_TYPEC_TCPM) += tcpm/ - obj-$(CONFIG_TYPEC_UCSI) += ucsi/ -+obj-$(CONFIG_TYPEC_ANX7688) += anx7688.o - obj-$(CONFIG_TYPEC_HD3SS3220) += hd3ss3220.o - obj-$(CONFIG_TYPEC_TPS6598X) += tps6598x.o - obj-$(CONFIG_TYPEC_QCOM_PMIC) += qcom-pmic-typec.o -diff --git a/drivers/usb/typec/anx7688.c b/drivers/usb/typec/anx7688.c -new file mode 100644 -index 000000000000..5aaea9e257b0 ---- /dev/null -+++ b/drivers/usb/typec/anx7688.c -@@ -0,0 +1,2183 @@ -+/* -+ * ANX7688 USB-C HDMI bridge/PD driver -+ * -+ * Warning, this driver is somewhat PinePhone specific. -+ * -+ * How this works: -+ * - this driver allows to program firmware into ANX7688 EEPROM, and -+ * initialize it -+ * - it then communicates with the firmware running on the OCM (on-chip -+ * microcontroller) -+ * - it detects whether there is cable plugged in or not and powers -+ * up or down the ANX7688 based on that -+ * - when the cable is connected the firmware on the OCM will handle -+ * the detection of the nature of the device on the other end -+ * of the USB-C cable -+ * - this driver then communicates with the USB phy to let it swap -+ * data roles accordingly -+ * - it also enables VBUS and VCONN regulators as appropriate -+ * - USB phy driver (Allwinner) needs to know whether to switch to -+ * device or host mode, or whether to turn off -+ * - when the firmware detects SRC.1.5A or SRC.3.0A via CC pins -+ * or something else via PD, it notifies this driver via software -+ * interrupt and this driver will determine how to update the TypeC -+ * port status and what input current limit is appropriate -+ * - input current limit determination happens 500ms after cable -+ * insertion or hard reset (delay is necessary to determine whether -+ * the remote end is PD capable or not) -+ * - this driver tells to the PMIC driver that the input current limit -+ * needs to be changed -+ * - this driver also monitors PMIC status and re-sets the input current -+ * limit if it changes for some reason (due to PMIC internal decision -+ * making) (this is disabled for now) -+ * -+ * ANX7688 FW behavior as observed: -+ * -+ * - DO NOT SET MORE THAN 1 SINK CAPABILITY! Firmware will ignore what -+ * you set and send hardcoded PDO_BATT 5-21V 30W message! -+ */ -+ -+#define DEBUG -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define DISABLE_OCM 0 -+ -+/* firmware regs */ -+ -+#define ANX7688_REG_VBUS_OFF_DELAY_TIME 0x22 -+#define ANX7688_REG_FEATURE_CTRL 0x27 -+#define ANX7688_REG_EEPROM_LOAD_STATUS1 0x11 -+#define ANX7688_REG_EEPROM_LOAD_STATUS0 0x12 -+#define ANX7688_REG_FW_VERSION1 0x15 -+#define ANX7688_REG_FW_VERSION0 0x16 -+ -+#define ANX7688_EEPROM_FW_LOADED 0x01 -+ -+#define ANX7688_REG_STATUS_INT_MASK 0x17 -+#define ANX7688_REG_STATUS_INT 0x28 -+#define ANX7688_IRQS_RECEIVED_MSG BIT(0) -+#define ANX7688_IRQS_RECEIVED_ACK BIT(1) -+#define ANX7688_IRQS_VCONN_CHANGE BIT(2) -+#define ANX7688_IRQS_VBUS_CHANGE BIT(3) -+#define ANX7688_IRQS_CC_STATUS_CHANGE BIT(4) -+#define ANX7688_IRQS_DATA_ROLE_CHANGE BIT(5) -+ -+#define ANX7688_REG_STATUS 0x29 -+#define ANX7688_VCONN_STATUS BIT(2) /* 0 = off 1 = on */ -+#define ANX7688_VBUS_STATUS BIT(3) /* 0 = off 1 = on */ -+#define ANX7688_DATA_ROLE_STATUS BIT(5) /* 0 = device 1 = host */ -+ -+#define ANX7688_REG_CC_STATUS 0x2a -+#define ANX7688_REG_TRY_UFP_TIMER 0x23 -+#define ANX7688_REG_TIME_CTRL 0x24 -+ -+#define ANX7688_REG_MAX_VOLTAGE 0x1b -+#define ANX7688_REG_MAX_POWER 0x1c -+#define ANX7688_REG_MIN_POWER 0x1d -+#define ANX7688_REG_MAX_VOLTAGE_STATUS 0x1e -+#define ANX7688_REG_MAX_POWER_STATUS 0x1f -+ -+#define ANX7688_SOFT_INT_MASK 0x7f -+ -+/* tcpc regs */ -+ -+#define ANX7688_TCPC_REG_VENDOR_ID0 0x00 -+#define ANX7688_TCPC_REG_VENDOR_ID1 0x01 -+#define ANX7688_TCPC_REG_ALERT0 0x10 -+#define ANX7688_TCPC_REG_ALERT1 0x11 -+#define ANX7688_TCPC_REG_ALERT_MASK0 0x12 -+#define ANX7688_TCPC_REG_ALERT_MASK1 0x13 -+#define ANX7688_TCPC_REG_INTERFACE_SEND 0x30 -+#define ANX7688_TCPC_REG_INTERFACE_RECV 0x51 -+ -+/* hw regs */ -+ -+#define ANX7688_REG_IRQ_EXT_SOURCE0 0x3e -+#define ANX7688_REG_IRQ_EXT_SOURCE1 0x4e -+#define ANX7688_REG_IRQ_EXT_SOURCE2 0x4f -+#define ANX7688_REG_IRQ_EXT_MASK0 0x3b -+#define ANX7688_REG_IRQ_EXT_MASK1 0x3c -+#define ANX7688_REG_IRQ_EXT_MASK2 0x3d -+#define ANX7688_REG_IRQ_SOURCE0 0x54 -+#define ANX7688_REG_IRQ_SOURCE1 0x55 -+#define ANX7688_REG_IRQ_SOURCE2 0x56 -+#define ANX7688_REG_IRQ_MASK0 0x57 -+#define ANX7688_REG_IRQ_MASK1 0x58 -+#define ANX7688_REG_IRQ_MASK2 0x59 -+ -+#define ANX7688_IRQ2_SOFT_INT BIT(2) -+ -+#define ANX7688_REG_USBC_RESET_CTRL 0x05 -+#define ANX7688_USBC_RESET_CTRL_OCM_RESET BIT(4) -+ -+//#define ANX7688_IRQ2_USB_PLUGIN BIT(4) -+//#define ANX7688_REG_IRQ_STATUS 0x53 -+ -+/* ocm messages */ -+ -+#define ANX7688_OCM_MSG_PWR_SRC_CAP 0x00 -+#define ANX7688_OCM_MSG_PWR_SNK_CAP 0x01 -+#define ANX7688_OCM_MSG_DP_SNK_IDENTITY 0x02 -+#define ANX7688_OCM_MSG_SVID 0x03 -+#define ANX7688_OCM_MSG_GET_DP_SNK_CAP 0x04 -+#define ANX7688_OCM_MSG_ACCEPT 0x05 -+#define ANX7688_OCM_MSG_REJECT 0x06 -+#define ANX7688_OCM_MSG_PSWAP_REQ 0x10 -+#define ANX7688_OCM_MSG_DSWAP_REQ 0x11 -+#define ANX7688_OCM_MSG_GOTO_MIN_REQ 0x12 -+#define ANX7688_OCM_MSG_VCONN_SWAP_REQ 0x13 -+#define ANX7688_OCM_MSG_VDM 0x14 -+#define ANX7688_OCM_MSG_DP_SNK_CFG 0x15 -+#define ANX7688_OCM_MSG_PWR_OBJ_REQ 0x16 -+#define ANX7688_OCM_MSG_PD_STATUS_REQ 0x17 -+#define ANX7688_OCM_MSG_DP_ALT_ENTER 0x19 -+#define ANX7688_OCM_MSG_DP_ALT_EXIT 0x1a -+#define ANX7688_OCM_MSG_GET_SNK_CAP 0x1b -+#define ANX7688_OCM_MSG_RESPONSE_TO_REQ 0xf0 -+#define ANX7688_OCM_MSG_SOFT_RST 0xf1 -+#define ANX7688_OCM_MSG_HARD_RST 0xf2 -+#define ANX7688_OCM_MSG_RESTART 0xf3 -+ -+static const char * const anx7688_supply_names[] = { -+ "avdd33", -+ "avdd18", -+ "dvdd18", -+ "avdd10", -+ "dvdd10", -+ "hdmi_vt", -+ -+ "vconn", // power for VCONN1/VCONN2 switches -+ "vbus", // vbus power -+}; -+ -+#define ANX7688_NUM_SUPPLIES ARRAY_SIZE(anx7688_supply_names) -+#define ANX7688_NUM_ALWAYS_ON_SUPPLIES (ANX7688_NUM_SUPPLIES - 1) -+#define ANX7688_VCONN_INDEX (ANX7688_NUM_SUPPLIES - 2) -+#define ANX7688_VBUS_INDEX (ANX7688_NUM_SUPPLIES - 1) -+ -+enum { -+ ANX7688_F_POWERED, -+ ANX7688_F_CONNECTED, -+ ANX7688_F_FW_FAILED, -+ ANX7688_F_PWRSUPPLY_CHANGE, -+ ANX7688_F_CURRENT_UPDATE, -+}; -+ -+struct anx7688 { -+ struct device *dev; -+ struct i2c_client *client; -+ struct i2c_client *client_tcpc; -+ struct regulator_bulk_data supplies[ANX7688_NUM_SUPPLIES]; -+ struct power_supply *vbus_in_supply; -+ struct notifier_block vbus_in_nb; -+ int input_current_limit; // mA -+ struct gpio_desc *gpio_enable; -+ struct gpio_desc *gpio_reset; -+ struct gpio_desc *gpio_cabledet; -+ -+ uint32_t src_caps[8]; -+ unsigned n_src_caps; -+ -+ uint32_t snk_caps[8]; -+ unsigned n_snk_caps; -+ -+ unsigned long flags[1]; -+ -+ struct delayed_work work; -+ struct timer_list work_timer; -+ -+ struct mutex lock; -+ bool vbus_on, vconn_on; -+ bool pd_capable; -+ int pd_current_limit; // mA -+ struct timer_list nopd_timer; -+ -+ struct typec_port *port; -+ struct typec_partner *partner; -+ struct usb_pd_identity partner_identity; -+ struct usb_role_switch *role_sw; -+ int pwr_role, data_role; -+ -+ struct dentry *debug_root; -+ -+ /* for debug */ -+ int last_status; -+ int last_cc_status; -+ int last_dp_state; -+ int last_bc_result; -+}; -+ -+static int anx7688_reg_read(struct anx7688 *anx7688, u8 reg_addr) -+{ -+ int ret; -+ -+ ret = i2c_smbus_read_byte_data(anx7688->client, reg_addr); -+ if (ret < 0) -+ dev_err(anx7688->dev, "i2c read failed at 0x%x (%d)\n", -+ reg_addr, ret); -+ -+ return ret; -+} -+ -+static int anx7688_reg_write(struct anx7688 *anx7688, u8 reg_addr, u8 value) -+{ -+ int ret; -+ -+ ret = i2c_smbus_write_byte_data(anx7688->client, reg_addr, value); -+ if (ret < 0) -+ dev_err(anx7688->dev, "i2c write failed at 0x%x (%d)\n", -+ reg_addr, ret); -+ -+ return ret; -+} -+ -+static int anx7688_reg_update_bits(struct anx7688 *anx7688, u8 reg_addr, -+ u8 mask, u8 value) -+{ -+ int ret; -+ -+ ret = anx7688_reg_read(anx7688, reg_addr); -+ if (ret < 0) -+ return ret; -+ -+ ret &= ~mask; -+ ret |= value; -+ -+ return anx7688_reg_write(anx7688, reg_addr, ret); -+} -+ -+static int anx7688_tcpc_reg_read(struct anx7688 *anx7688, u8 reg_addr) -+{ -+ int ret; -+ -+ ret = i2c_smbus_read_byte_data(anx7688->client_tcpc, reg_addr); -+ if (ret < 0) -+ dev_err(anx7688->dev, "tcpc i2c read failed at 0x%x (%d)\n", -+ reg_addr, ret); -+ -+ return ret; -+} -+ -+static int anx7688_tcpc_reg_write(struct anx7688 *anx7688, u8 reg_addr, u8 value) -+{ -+ int ret; -+ -+ ret = i2c_smbus_write_byte_data(anx7688->client_tcpc, reg_addr, value); -+ if (ret < 0) -+ dev_err(anx7688->dev, "tcpc i2c write failed at 0x%x (%d)\n", -+ reg_addr, ret); -+ -+ return ret; -+} -+ -+static void anx7688_power_enable(struct anx7688 *anx7688) -+{ -+ gpiod_set_value(anx7688->gpio_reset, 1); -+ gpiod_set_value(anx7688->gpio_enable, 1); -+ -+ /* wait for power to stabilize and release reset */ -+ msleep(10); -+ gpiod_set_value(anx7688->gpio_reset, 0); -+ udelay(2); -+ -+ dev_dbg(anx7688->dev, "power enabled\n"); -+ -+ set_bit(ANX7688_F_POWERED, anx7688->flags); -+} -+ -+static void anx7688_power_disable(struct anx7688 *anx7688) -+{ -+ gpiod_set_value(anx7688->gpio_reset, 1); -+ msleep(5); -+ gpiod_set_value(anx7688->gpio_enable, 0); -+ -+ dev_dbg(anx7688->dev, "power disabled\n"); -+ -+ clear_bit(ANX7688_F_POWERED, anx7688->flags); -+} -+ -+static int anx7688_send_ocm_message(struct anx7688 *anx7688, int cmd, -+ const u8 *data, int data_len) -+{ -+ int ret = 0, i; -+ u8 pkt[32]; -+ -+ if (data_len > sizeof(pkt) - 3) { -+ dev_dbg(anx7688->dev, -+ "invalid ocm message length cmd=0x%02x len=%d\n", -+ cmd, data_len); -+ return -EINVAL; -+ } -+ -+ // prepare pd packet -+ pkt[0] = data_len + 1; -+ pkt[1] = cmd; -+ if (data_len > 0) -+ memcpy(pkt + 2, data, data_len); -+ pkt[2 + data_len] = 0; -+ for (i = 0; i < data_len + 2; i++) -+ pkt[data_len + 2] -= pkt[i]; -+ -+ dev_dbg(anx7688->dev, "send pd packet cmd=0x%02x %*ph\n", -+ cmd, data_len + 3, pkt); -+ -+ ret = anx7688_tcpc_reg_read(anx7688, ANX7688_TCPC_REG_INTERFACE_SEND); -+ if (ret) { -+ dev_err(anx7688->dev, -+ "failed to send pd packet (tx buffer full)\n"); -+ return -EBUSY; -+ } -+ -+ ret = i2c_smbus_write_i2c_block_data(anx7688->client_tcpc, -+ ANX7688_TCPC_REG_INTERFACE_SEND, -+ data_len + 3, pkt); -+ if (ret < 0) -+ dev_err(anx7688->dev, -+ "failed to send pd packet (err=%d)\n", ret); -+ -+ // wait until the message is processed (30ms max) -+ for (i = 0; i < 300; i++) { -+ ret = anx7688_tcpc_reg_read(anx7688, ANX7688_TCPC_REG_INTERFACE_SEND); -+ if (ret <= 0) -+ return ret; -+ -+ udelay(100); -+ } -+ -+ dev_err(anx7688->dev, "timeout waiting for the message queue flush\n"); -+ return -ETIMEDOUT; -+} -+ -+static int anx7688_connect(struct anx7688 *anx7688) -+{ -+#if DISABLE_OCM -+ int ret; -+ -+ dev_dbg(anx7688->dev, "cable inserted\n"); -+ -+ msleep(10); -+ anx7688_power_enable(anx7688); -+ -+ /* reset the OCM right away */ -+ ret = anx7688_reg_update_bits(anx7688, ANX7688_REG_USBC_RESET_CTRL, -+ ANX7688_USBC_RESET_CTRL_OCM_RESET, -+ ANX7688_USBC_RESET_CTRL_OCM_RESET); -+ if (ret) -+ goto err_poweroff; -+ -+ /* enable interrupts for VBUS, etc. */ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_IRQ_EXT_SOURCE2, 0xff); -+ if (ret) -+ goto err_poweroff; -+ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_IRQ_EXT_MASK2, ~(BIT(6) | BIT(5) | BIT(4))); -+ if (ret) -+ goto err_poweroff; -+ -+ set_bit(ANX7688_F_CONNECTED, anx7688->flags); -+ return 0; -+ -+err_poweroff: -+ anx7688_power_disable(anx7688); -+ return ret; -+#else -+ struct typec_partner_desc desc = {}; -+ int ret, i; -+ u8 fw[2]; -+ const u8 dp_snk_identity[16] = { -+ 0x00, 0x00, 0x00, 0xec, /* snk_id_hdr */ -+ 0x00, 0x00, 0x00, 0x00, /* snk_cert */ -+ 0x00, 0x00, 0x00, 0x00, /* snk_prd */ -+ 0x39, 0x00, 0x00, 0x51 /* snk_ama */ -+ }; -+ const u8 svid[4] = { -+ 0x00, 0x00, 0x01, 0xff, -+ }; -+ u32 caps[8]; -+ -+ dev_dbg(anx7688->dev, "cable inserted\n"); -+ -+ anx7688->last_status = -1; -+ anx7688->last_cc_status = -1; -+ anx7688->last_dp_state = -1; -+ -+ msleep(10); -+ anx7688_power_enable(anx7688); -+ -+ ret = regulator_enable(anx7688->supplies[ANX7688_VCONN_INDEX].consumer); -+ if (ret) { -+ dev_err(anx7688->dev, "failed to enable vconn\n"); -+ goto err_poweroff; -+ } -+ anx7688->vconn_on = true; -+ -+ /* wait till the firmware is loaded (typically ~30ms) */ -+ for (i = 0; i < 100; i++) { -+ ret = anx7688_reg_read(anx7688, ANX7688_REG_EEPROM_LOAD_STATUS0); -+ -+ if (ret >= 0 && (ret & ANX7688_EEPROM_FW_LOADED) == ANX7688_EEPROM_FW_LOADED) { -+ dev_dbg(anx7688->dev, "eeprom0 = 0x%02x\n", ret); -+ dev_info(anx7688->dev, "fw loaded after %d ms\n", i * 10); -+ goto fw_loaded; -+ } -+ -+ msleep(5); -+ } -+ -+ set_bit(ANX7688_F_FW_FAILED, anx7688->flags); -+ dev_err(anx7688->dev, "boot firmware load failed (you may need to flash FW to anx7688 first)\n"); -+ ret = -ETIMEDOUT; -+ goto err_vconoff; -+ -+fw_loaded: -+ ret = i2c_smbus_read_i2c_block_data(anx7688->client, -+ ANX7688_REG_FW_VERSION1, 2, fw); -+ if (ret < 0) { -+ dev_err(anx7688->dev, "failed to read firmware version\n"); -+ goto err_vconoff; -+ } -+ -+ dev_info(anx7688->dev, "OCM firmware loaded (version 0x%04x)\n", -+ fw[1] | fw[0] << 8); -+ -+ /* Unmask interrupts */ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_STATUS_INT, 0); -+ if (ret) -+ goto err_vconoff; -+ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_STATUS_INT_MASK, ~ANX7688_SOFT_INT_MASK); -+ if (ret) -+ goto err_vconoff; -+ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_IRQ_EXT_SOURCE2, 0xff); -+ if (ret) -+ goto err_vconoff; -+ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_IRQ_EXT_MASK2, (u8)~ANX7688_IRQ2_SOFT_INT); -+ if (ret) -+ goto err_vconoff; -+ -+ /* time to turn off vbus after cc disconnect (unit is 4 ms) */ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_VBUS_OFF_DELAY_TIME, 100 / 4); -+ if (ret) -+ goto err_vconoff; -+ -+ //anx7688_reg_write(anx7688, ANX7688_REG_TIME_CTRL, 0x00); -+ -+ /* 300ms (unit is 2 ms) */ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_TRY_UFP_TIMER, 300 / 2); -+ if (ret) -+ goto err_vconoff; -+ -+ /* maximum voltage in 100 mV units */ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_MAX_VOLTAGE, 50); /* 5 V */ -+ if (ret) -+ goto err_vconoff; -+ -+ /* min/max power in 500 mW units */ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_MAX_POWER, 15 * 2); /* 15 W */ -+ if (ret) -+ goto err_vconoff; -+ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_MIN_POWER, 1); /* 0.5 W */ -+ if (ret) -+ goto err_vconoff; -+ -+ /* auto_pd, try.src, try.sink, goto safe 5V */ -+ ret = anx7688_reg_write(anx7688, ANX7688_REG_FEATURE_CTRL, 0x1e & ~BIT(2)); // disable try_src -+ if (ret) -+ goto err_vconoff; -+ -+ for (i = 0; i < anx7688->n_src_caps; i++) -+ caps[i] = cpu_to_le32(anx7688->src_caps[i]); -+ ret = anx7688_send_ocm_message(anx7688, ANX7688_OCM_MSG_PWR_SRC_CAP, -+ (u8*)&caps, 4 * anx7688->n_src_caps); -+ if (ret) -+ goto err_vconoff; -+ -+ for (i = 0; i < anx7688->n_snk_caps; i++) -+ caps[i] = cpu_to_le32(anx7688->snk_caps[i]); -+ ret = anx7688_send_ocm_message(anx7688, ANX7688_OCM_MSG_PWR_SNK_CAP, -+ (u8*)&caps, 4 * anx7688->n_snk_caps); -+ if (ret) -+ goto err_vconoff; -+ -+ /* Send DP SNK identity */ -+ ret = anx7688_send_ocm_message(anx7688, ANX7688_OCM_MSG_DP_SNK_IDENTITY, -+ dp_snk_identity, sizeof dp_snk_identity); -+ if (ret) -+ goto err_vconoff; -+ -+ ret = anx7688_send_ocm_message(anx7688, ANX7688_OCM_MSG_SVID, -+ svid, sizeof svid); -+ if (ret) -+ goto err_vconoff; -+ -+ dev_dbg(anx7688->dev, "OCM configuration completed\n"); -+ -+ desc.accessory = TYPEC_ACCESSORY_NONE; -+ -+ typec_unregister_partner(anx7688->partner); -+ -+ anx7688->partner = typec_register_partner(anx7688->port, &desc); -+ if (IS_ERR(anx7688->partner)) { -+ ret = PTR_ERR(anx7688->partner); -+ goto err_vconoff; -+ } -+ -+ // after this timer fires we'll check if device is pd_capable and -+ // set up the current limit accordingly -+ mod_timer(&anx7688->nopd_timer, jiffies + msecs_to_jiffies(3000)); -+ clear_bit(ANX7688_F_CURRENT_UPDATE, anx7688->flags); -+ -+ set_bit(ANX7688_F_CONNECTED, anx7688->flags); -+ return 0; -+ -+err_vconoff: -+ regulator_disable(anx7688->supplies[ANX7688_VCONN_INDEX].consumer); -+ anx7688->vconn_on = false; -+err_poweroff: -+ anx7688_power_disable(anx7688); -+ dev_err(anx7688->dev, "OCM configuration failed\n"); -+ return ret; -+#endif -+} -+ -+static void anx7688_disconnect(struct anx7688 *anx7688) -+{ -+ union power_supply_propval val = {0,}; -+ struct device *dev = anx7688->dev; -+ int ret; -+ -+ dev_dbg(dev, "cable removed\n"); -+ -+ del_timer_sync(&anx7688->nopd_timer); -+ -+ if (anx7688->vconn_on) { -+ regulator_disable(anx7688->supplies[ANX7688_VCONN_INDEX].consumer); -+ anx7688->vconn_on = false; -+ } -+ -+ if (anx7688->vbus_on) { -+ regulator_disable(anx7688->supplies[ANX7688_VBUS_INDEX].consumer); -+ anx7688->vbus_on = false; -+ } -+ -+ anx7688_power_disable(anx7688); -+ -+ anx7688->pd_capable = false; -+ -+ typec_unregister_partner(anx7688->partner); -+ anx7688->partner = NULL; -+ -+ anx7688->pwr_role = TYPEC_SINK; -+ anx7688->data_role = TYPEC_DEVICE; -+ typec_set_pwr_role(anx7688->port, anx7688->pwr_role); -+ typec_set_data_role(anx7688->port, anx7688->data_role); -+ typec_set_pwr_opmode(anx7688->port, TYPEC_PWR_MODE_USB); -+ typec_set_vconn_role(anx7688->port, TYPEC_SINK); -+ -+ usb_role_switch_set_role(anx7688->role_sw, USB_ROLE_NONE); -+ -+ val.intval = 500 * 1000; -+ dev_dbg(dev, "setting vbus_in current limit to %d mA\n", val.intval); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, -+ &val); -+ if (ret) -+ dev_err(dev, "failed to set vbus_in current to %d mA\n", -+ val.intval / 1000); -+ -+ val.intval = 0; -+ dev_dbg(dev, "disabling vbus_in power path\n"); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_ONLINE, -+ &val); -+ if (ret) -+ dev_err(dev, "failed to offline vbus_in\n"); -+ -+ val.intval = 1; -+ dev_dbg(dev, "enabling USB BC 1.2 detection\n"); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_USB_BC_ENABLED, -+ &val); -+ if (ret) -+ dev_err(dev, "failed to enabled USB BC1.2 detection\n"); -+ -+ clear_bit(ANX7688_F_CONNECTED, anx7688->flags); -+} -+ -+static void anx7688_handle_cable_change(struct anx7688* anx7688) -+{ -+ int cabledet; -+ bool connected; -+ -+ connected = test_bit(ANX7688_F_CONNECTED, anx7688->flags); -+ cabledet = gpiod_get_value(anx7688->gpio_cabledet); -+ -+ if (cabledet && !connected) -+ anx7688_connect(anx7688); -+ else if (!cabledet && connected) -+ anx7688_disconnect(anx7688); -+} -+ -+static irqreturn_t anx7688_irq_plug_handler(int irq, void *data) -+{ -+ struct anx7688 *anx7688 = data; -+ -+ dev_dbg(anx7688->dev, "plug irq (cd=%d)\n", -+ gpiod_get_value(anx7688->gpio_cabledet)); -+ -+ /* -+ * After each cabledet change the scheduled work timer is reset -+ * to fire in ~10ms. So the work is done only after the cabledet -+ * is stable for ~10ms. -+ */ -+ schedule_delayed_work(&anx7688->work, msecs_to_jiffies(10)); -+ -+ return IRQ_HANDLED; -+} -+ -+static void anx7688_nopd_timer_fn(struct timer_list *t) -+{ -+ struct anx7688 *anx7688 = from_timer(anx7688, t, nopd_timer); -+ -+ set_bit(ANX7688_F_CURRENT_UPDATE, anx7688->flags); -+ schedule_delayed_work(&anx7688->work, 0); -+} -+ -+enum { -+ CMD_SUCCESS, -+ CMD_REJECT, -+ CMD_FAIL, -+ CMD_BUSY, -+}; -+ -+static const char* anx7688_cmd_statuses[] = { -+ "SUCCESS", -+ "REJECT", -+ "FAIL", -+ "BUSY", -+}; -+ -+static int anx7688_handle_pd_message_response(struct anx7688* anx7688, -+ u8 to_cmd, u8 resp) -+{ -+ const char* status = resp <= CMD_BUSY ? anx7688_cmd_statuses[resp] : "UNKNOWN"; -+ -+ switch (to_cmd) { -+ case ANX7688_OCM_MSG_PSWAP_REQ: -+ dev_info(anx7688->dev, "received response to PSWAP_REQ (%s)\n", status); -+ break; -+ -+ case ANX7688_OCM_MSG_DSWAP_REQ: -+ dev_info(anx7688->dev, "received response to DSWAP_REQ (%s)\n", status); -+ break; -+ -+ case ANX7688_OCM_MSG_VCONN_SWAP_REQ: -+ dev_info(anx7688->dev, "received response to VCONN_SWAP_REQ (%s)\n", status); -+ break; -+ -+ case ANX7688_OCM_MSG_PWR_OBJ_REQ: -+ dev_info(anx7688->dev, "received response to PWR_OBJ_REQ (%s)\n", status); -+ break; -+ -+ case ANX7688_OCM_MSG_VDM: -+ dev_info(anx7688->dev, "received response to VDM (%s)\n", status); -+ break; -+ -+ case ANX7688_OCM_MSG_GOTO_MIN_REQ: -+ dev_info(anx7688->dev, "received response to GOTO_MIN_REQ (%s)\n", status); -+ break; -+ -+ case ANX7688_OCM_MSG_GET_SNK_CAP: -+ dev_info(anx7688->dev, "received response to GET_SNK_CAP (%s)\n", status); -+ break; -+ -+ default: -+ dev_info(anx7688->dev, "received response to unknown request (%s)\n", status); -+ break; -+ } -+ -+ return 0; -+} -+ -+static int anx7688_handle_pd_message(struct anx7688* anx7688, -+ u8 cmd, u8* msg, unsigned len) -+{ -+ struct device *dev = anx7688->dev; -+ union power_supply_propval psy_val = {0,}; -+ uint32_t* pdos = (uint32_t*)msg; -+ int ret, i, rdo_max_v, rdo_max_p; -+ uint32_t pdo, rdo; -+ -+ switch (cmd) { -+ case ANX7688_OCM_MSG_PWR_SRC_CAP: -+ dev_info(anx7688->dev, "received SRC_CAP\n"); -+ -+ if (len % 4 != 0) { -+ dev_warn(anx7688->dev, "received invalid sized PDO array\n"); -+ break; -+ } -+ -+ /* the partner is PD capable */ -+ anx7688->pd_capable = true; -+ -+ for (i = 0; i < len / 4; i++) { -+ pdo = le32_to_cpu(pdos[i]); -+ -+ if (pdo_type(pdo) == PDO_TYPE_FIXED) { -+ unsigned voltage = pdo_fixed_voltage(pdo); -+ unsigned max_curr = pdo_max_current(pdo); -+ -+ dev_info(anx7688->dev, "SRC_CAP PDO_FIXED (%umV %umA)\n", voltage, max_curr); -+ } else if (pdo_type(pdo) == PDO_TYPE_BATT) { -+ unsigned min_volt = pdo_min_voltage(pdo); -+ unsigned max_volt = pdo_max_voltage(pdo); -+ unsigned max_pow = pdo_max_power(pdo); -+ -+ dev_info(anx7688->dev, "SRC_CAP PDO_BATT (%umV-%umV %umW)\n", min_volt, max_volt, max_pow); -+ } else if (pdo_type(pdo) == PDO_TYPE_VAR) { -+ unsigned min_volt = pdo_min_voltage(pdo); -+ unsigned max_volt = pdo_max_voltage(pdo); -+ unsigned max_curr = pdo_max_current(pdo); -+ -+ dev_info(anx7688->dev, "SRC_CAP PDO_VAR (%umV-%umV %umA)\n", min_volt, max_volt, max_curr); -+ } else { -+ dev_info(anx7688->dev, "SRC_CAP PDO_APDO (0x%08X)\n", pdo); -+ } -+ } -+ -+ /* when auto_pd mode is enabled, the FW has already set -+ * RDO_MAX_VOLTAGE and RDO_MAX_POWER for the RDO it sent to the -+ * partner based on the received SOURCE_CAPs. This does not -+ * mean, the request was acked, but we can't do better here than -+ * calculate the current_limit to set later and hope for the best. -+ */ -+ rdo_max_v = anx7688_reg_read(anx7688, ANX7688_REG_MAX_VOLTAGE_STATUS); -+ if (rdo_max_v < 0) -+ return rdo_max_v; -+ if (rdo_max_v == 0) -+ return -EINVAL; -+ -+ rdo_max_p = anx7688_reg_read(anx7688, ANX7688_REG_MAX_POWER_STATUS); -+ if (rdo_max_p < 0) -+ return rdo_max_p; -+ -+ anx7688->pd_current_limit = rdo_max_p * 5000 / rdo_max_v; -+ -+ dev_dbg(anx7688->dev, "RDO max voltage = %dmV, max power = %dmW, PD current limit = %dmA\n", -+ rdo_max_v * 100, rdo_max_p * 500, anx7688->pd_current_limit); -+ -+ // update current limit sooner, now that we have PD negotiation result -+ mod_timer(&anx7688->nopd_timer, jiffies + msecs_to_jiffies(500)); -+ -+ //TODO: we should go through PDOs and decide which one -+ //to request, build a RDO with a proper index of the -+ //selected PDO and send it via PWR_OBJ_REQ message to FW -+ //but we're using auto_pd, so FW does this for us -+ // -+ //rdo = cpu_to_le32(RDO_FIXED(0, 1500, 1500, RDO_USB_COMM)); -+ //ret = anx7688_send_ocm_message(anx7688, ANX7688_OCM_MSG_PWR_OBJ_REQ, &rdo, 4); -+ -+ break; -+ -+ case ANX7688_OCM_MSG_PWR_SNK_CAP: -+ dev_info(anx7688->dev, "received SNK_CAP\n"); -+ -+ if (len % 4 != 0) { -+ dev_warn(anx7688->dev, "received invalid sized PDO array\n"); -+ break; -+ } -+ -+ for (i = 0; i < len / 4; i++) { -+ pdo = le32_to_cpu(pdos[i]); -+ -+ if (pdo_type(pdo) == PDO_TYPE_FIXED) { -+ unsigned voltage = pdo_fixed_voltage(pdo); -+ unsigned max_curr = pdo_max_current(pdo); -+ -+ dev_info(anx7688->dev, "SNK_CAP PDO_FIXED (%umV %umA)\n", voltage, max_curr); -+ } else if (pdo_type(pdo) == PDO_TYPE_BATT) { -+ unsigned min_volt = pdo_min_voltage(pdo); -+ unsigned max_volt = pdo_max_voltage(pdo); -+ unsigned max_pow = pdo_max_power(pdo); -+ -+ dev_info(anx7688->dev, "SNK_CAP PDO_BATT (%umV-%umV %umW)\n", min_volt, max_volt, max_pow); -+ } else if (pdo_type(pdo) == PDO_TYPE_VAR) { -+ unsigned min_volt = pdo_min_voltage(pdo); -+ unsigned max_volt = pdo_max_voltage(pdo); -+ unsigned max_curr = pdo_max_current(pdo); -+ -+ dev_info(anx7688->dev, "SNK_CAP PDO_VAR (%umV-%umV %umA)\n", min_volt, max_volt, max_curr); -+ } else { -+ dev_info(anx7688->dev, "SNK_CAP PDO_APDO (0x%08X)\n", pdo); -+ } -+ } -+ -+ break; -+ -+ case ANX7688_OCM_MSG_PWR_OBJ_REQ: -+ dev_info(anx7688->dev, "received PWR_OBJ_REQ\n"); -+ -+ anx7688->pd_capable = true; -+ -+ if (len != 4) { -+ dev_warn(anx7688->dev, "received invalid sized RDO\n"); -+ break; -+ } -+ -+ rdo = le32_to_cpu(pdos[0]); -+ -+ if (rdo_index(rdo) >= 1 && rdo_index(rdo) <= anx7688->n_src_caps) { -+ unsigned rdo_op_curr = rdo_op_current(rdo); -+ unsigned rdo_max_curr = rdo_max_current(rdo); -+ unsigned rdo_idx = rdo_index(rdo) - 1; -+ unsigned pdo_volt, pdo_max_curr; -+ -+ pdo = anx7688->src_caps[rdo_idx]; -+ pdo_volt = pdo_fixed_voltage(pdo); -+ pdo_max_curr = pdo_max_current(pdo); -+ -+ dev_info(anx7688->dev, "RDO (idx=%d op=%umA max=%umA)\n", -+ rdo_idx, rdo_op_curr, rdo_max_curr); -+ -+ dev_info(anx7688->dev, "PDO_FIXED (%umV %umA)\n", -+ pdo_volt, pdo_max_curr); -+ -+ //TODO: we should check the req and respond with accept/reject -+ // but we're using auto_pd feature, so the FW will do -+ // this for us -+ if (rdo_op_curr > pdo_max_curr || rdo_max_curr > pdo_max_curr) { -+ //ret = anx7688_send_ocm_message(anx7688, ANX7688_OCM_MSG_REJECT, 0, 0); -+ } else { -+ //ret = anx7688_send_ocm_message(anx7688, ANX7688_OCM_MSG_ACCEPT, 0, 0); -+ } -+ } else { -+ dev_info(anx7688->dev, "PWR_OBJ RDO index out of range (RDO = 0x%08X)\n", rdo); -+ } -+ -+ break; -+ -+ case ANX7688_OCM_MSG_ACCEPT: -+ dev_info(anx7688->dev, "received ACCEPT\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_REJECT: -+ dev_info(anx7688->dev, "received REJECT\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_RESPONSE_TO_REQ: -+ if (len < 2) { -+ dev_warn(anx7688->dev, "received short RESPONSE_TO_REQ\n"); -+ break; -+ } -+ -+ anx7688_handle_pd_message_response(anx7688, msg[0], msg[1]); -+ break; -+ -+ case ANX7688_OCM_MSG_SOFT_RST: -+ dev_info(anx7688->dev, "received SOFT_RST\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_HARD_RST: -+ if (anx7688->pd_capable) { -+ dev_info(anx7688->dev, "received HARD_RST\n"); -+ -+ // stop drawing power from VBUS -+ psy_val.intval = 0; -+ dev_dbg(dev, "disabling vbus_in power path\n"); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_ONLINE, -+ &psy_val); -+ if (ret) -+ dev_err(anx7688->dev, "failed to offline vbus_in\n"); -+ -+ // wait till the dust settles -+ mod_timer(&anx7688->nopd_timer, jiffies + msecs_to_jiffies(3000)); -+ } else { -+ dev_dbg(anx7688->dev, "received HARD_RST, idiot firmware is bored\n"); -+ } -+ -+ break; -+ -+ case ANX7688_OCM_MSG_RESTART: -+ dev_info(anx7688->dev, "received RESTART\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_PSWAP_REQ: -+ dev_info(anx7688->dev, "received PSWAP_REQ\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_DSWAP_REQ: -+ dev_info(anx7688->dev, "received DSWAP_REQ\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_VCONN_SWAP_REQ: -+ dev_info(anx7688->dev, "received VCONN_SWAP_REQ\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_DP_ALT_ENTER: -+ dev_info(anx7688->dev, "received DP_ALT_ENTER\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_DP_ALT_EXIT: -+ dev_info(anx7688->dev, "received DP_ALT_EXIT\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_DP_SNK_IDENTITY: -+ dev_info(anx7688->dev, "received DP_SNK_IDENTITY\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_SVID: -+ dev_info(anx7688->dev, "received SVID\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_VDM: -+ dev_info(anx7688->dev, "received VDM\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_GOTO_MIN_REQ: -+ dev_info(anx7688->dev, "received GOTO_MIN_REQ\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_PD_STATUS_REQ: -+ dev_info(anx7688->dev, "received PD_STATUS_REQ\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_GET_DP_SNK_CAP: -+ dev_info(anx7688->dev, "received GET_DP_SNK_CAP\n"); -+ break; -+ -+ case ANX7688_OCM_MSG_DP_SNK_CFG: -+ dev_info(anx7688->dev, "received DP_SNK_CFG\n"); -+ break; -+ -+ default: -+ dev_info(anx7688->dev, "received unknown message 0x%02x\n", cmd); -+ break; -+ } -+ -+ return 0; -+} -+ -+static int anx7688_receive_msg(struct anx7688* anx7688) -+{ -+ u8 pkt[32], checksum = 0; -+ int i, ret; -+ -+ ret = i2c_smbus_read_i2c_block_data(anx7688->client_tcpc, -+ ANX7688_TCPC_REG_INTERFACE_RECV, -+ 32, pkt); -+ if (ret < 0) { -+ dev_err(anx7688->dev, "failed to read pd msg\n"); -+ return ret; -+ } -+ -+ ret = anx7688_tcpc_reg_write(anx7688, ANX7688_TCPC_REG_INTERFACE_RECV, 0); -+ if (ret) { -+ dev_warn(anx7688->dev, "failed to clear recv fifo\n"); -+ } -+ -+ if (pkt[0] == 0 || pkt[0] > sizeof(pkt) - 2) { -+ dev_err(anx7688->dev, "received invalid pd message: %*ph\n", -+ (int)sizeof(pkt), pkt); -+ return -EINVAL; -+ } -+ -+ dev_dbg(anx7688->dev, "recv ocm message cmd=0x%02x %*ph\n", -+ pkt[1], pkt[0] + 2, pkt); -+ -+ for (i = 0; i < pkt[0] + 2; i++) -+ checksum += pkt[i]; -+ -+ if (checksum != 0) { -+ dev_err(anx7688->dev, "bad checksum on received message\n"); -+ return -EINVAL; -+ } -+ -+ anx7688_handle_pd_message(anx7688, pkt[1], pkt + 2, pkt[0] - 1); -+ return 0; -+} -+ -+static const char* anx7688_cc_status_string(unsigned v) -+{ -+ switch (v) { -+ case 0: return "SRC.Open"; -+ case 1: return "SRC.Rd"; -+ case 2: return "SRC.Ra"; -+ case 4: return "SNK.Default"; -+ case 8: return "SNK.Power1.5"; -+ case 12: return "SNK.Power3.0"; -+ default: return "UNK"; -+ } -+} -+ -+static int anx7688_update_status(struct anx7688 *anx7688) -+{ -+ struct device *dev = anx7688->dev; -+ bool vbus_on, vconn_on, dr_dfp; -+ int status, cc_status, dp_state, ret; -+ -+ status = anx7688_reg_read(anx7688, ANX7688_REG_STATUS); -+ if (status < 0) -+ return status; -+ -+ cc_status = anx7688_reg_read(anx7688, ANX7688_REG_CC_STATUS); -+ if (cc_status < 0) -+ return cc_status; -+ -+ dp_state = anx7688_tcpc_reg_read(anx7688, 0x87); -+ if (dp_state < 0) -+ return dp_state; -+ -+ if (anx7688->last_status == -1 || anx7688->last_status != status) { -+ anx7688->last_status = status; -+ dev_dbg(dev, "status changed to 0x%02x\n", status); -+ } -+ -+ if (anx7688->last_cc_status == -1 || anx7688->last_cc_status != cc_status) { -+ anx7688->last_cc_status = cc_status; -+ dev_dbg(dev, "cc_status changed to CC1 = %s CC2 = %s\n", -+ anx7688_cc_status_string(cc_status & 0xf), -+ anx7688_cc_status_string((cc_status >> 4) & 0xf)); -+ } -+ -+ if (anx7688->last_dp_state == -1 || anx7688->last_dp_state != dp_state) { -+ anx7688->last_dp_state = dp_state; -+ dev_dbg(dev, "DP state changed to 0x%02x\n", dp_state); -+ } -+ -+ vbus_on = !!(status & ANX7688_VBUS_STATUS); -+ vconn_on = !!(status & ANX7688_VCONN_STATUS); -+ dr_dfp = !!(status & ANX7688_DATA_ROLE_STATUS); -+ -+ if (anx7688->vbus_on != vbus_on) { -+ dev_dbg(anx7688->dev, "POWER role change to %s\n", -+ vbus_on ? "SOURCE" : "SINK"); -+ -+ if (vbus_on) { -+ ret = regulator_enable(anx7688->supplies[ANX7688_VBUS_INDEX].consumer); -+ if (ret) { -+ dev_err(anx7688->dev, "failed to enable vbus\n"); -+ return ret; -+ } -+ } else { -+ ret = regulator_disable(anx7688->supplies[ANX7688_VBUS_INDEX].consumer); -+ if (ret) { -+ dev_err(anx7688->dev, "failed to disable vbus\n"); -+ return ret; -+ } -+ } -+ -+ anx7688->pwr_role = vbus_on ? TYPEC_SOURCE : TYPEC_SINK; -+ typec_set_pwr_role(anx7688->port, anx7688->pwr_role); -+ anx7688->vbus_on = vbus_on; -+ } -+ -+ if (anx7688->vconn_on != vconn_on) { -+ dev_dbg(anx7688->dev, "VCONN role change to %s\n", -+ vconn_on ? "SOURCE" : "SINK"); -+ -+ if (vconn_on) { -+ ret = regulator_enable(anx7688->supplies[ANX7688_VCONN_INDEX].consumer); -+ if (ret) { -+ dev_err(anx7688->dev, "failed to enable vconn\n"); -+ return ret; -+ } -+ } else { -+ ret = regulator_disable(anx7688->supplies[ANX7688_VCONN_INDEX].consumer); -+ if (ret) { -+ dev_err(anx7688->dev, "failed to disable vconn\n"); -+ return ret; -+ } -+ } -+ -+ typec_set_vconn_role(anx7688->port, vconn_on ? TYPEC_SOURCE : TYPEC_SINK); -+ anx7688->vconn_on = vconn_on; -+ } -+ -+ anx7688->data_role = dr_dfp ? TYPEC_HOST : TYPEC_DEVICE; -+ typec_set_data_role(anx7688->port, anx7688->data_role); -+ -+ if (usb_role_switch_get_role(anx7688->role_sw) != -+ (dr_dfp ? USB_ROLE_HOST : USB_ROLE_DEVICE)) { -+ dev_dbg(anx7688->dev, "DATA role change requested to %s\n", -+ dr_dfp ? "DFP" : "UFP"); -+ -+ ret = usb_role_switch_set_role(anx7688->role_sw, -+ dr_dfp ? USB_ROLE_HOST : USB_ROLE_DEVICE); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static irqreturn_t anx7688_irq_status_handler(int irq, void *data) -+{ -+#if DISABLE_OCM -+ struct anx7688 *anx7688 = data; -+ struct device *dev = anx7688->dev; -+ int ext2_status; -+ -+ mutex_lock(&anx7688->lock); -+ -+ if (!test_bit(ANX7688_F_CONNECTED, anx7688->flags)) { -+ /* -+ * The chip should be disabled and powered off, nothing -+ * more to do. -+ */ -+ dev_dbg(dev, "spurious status irq\n"); -+ goto out_unlock; -+ } -+ -+ //dev_dbg(dev, "status irq\n"); -+ -+ ext2_status = anx7688_reg_read(anx7688, ANX7688_REG_IRQ_EXT_SOURCE2); -+ dev_dbg(dev, " ext2 = 0x%02x\n", ext2_status); -+ anx7688_reg_write(anx7688, ANX7688_REG_IRQ_EXT_SOURCE2, ext2_status); -+ -+out_unlock: -+ mutex_unlock(&anx7688->lock); -+ -+ return IRQ_HANDLED; -+#else -+ struct anx7688 *anx7688 = data; -+ struct device *dev = anx7688->dev; -+ int tcpc_status, ext2_status, soft_status; -+ -+ mutex_lock(&anx7688->lock); -+ -+ if (!test_bit(ANX7688_F_CONNECTED, anx7688->flags)) { -+ dev_dbg(dev, "spurious status irq\n"); -+ /* anx chip should be disabled and power off, nothing -+ * more to do */ -+ goto out_unlock; -+ } -+ -+ //dev_dbg(dev, "status irq\n"); -+ -+ // clear tcpc interrupt -+ tcpc_status = anx7688_tcpc_reg_read(anx7688, ANX7688_TCPC_REG_ALERT0); -+ if (tcpc_status > 0) { -+ //dev_dbg(dev, " tcpc = 0x%02x\n", tcpc_status); -+ anx7688_tcpc_reg_write(anx7688, ANX7688_TCPC_REG_ALERT0, tcpc_status); -+ } -+ -+ ext2_status = anx7688_reg_read(anx7688, ANX7688_REG_IRQ_EXT_SOURCE2); -+ if (ext2_status & ANX7688_IRQ2_SOFT_INT) { -+ soft_status = anx7688_reg_read(anx7688, ANX7688_REG_STATUS_INT); -+ anx7688_reg_write(anx7688, ANX7688_REG_STATUS_INT, 0); -+ -+ //dev_dbg(dev, " soft = 0x%02x\n", soft_status); -+ -+ if (soft_status > 0) { -+ soft_status &= ANX7688_SOFT_INT_MASK; -+ -+ if (soft_status & ANX7688_IRQS_RECEIVED_MSG) -+ anx7688_receive_msg(anx7688); -+ -+ if (soft_status & (ANX7688_IRQS_CC_STATUS_CHANGE | -+ ANX7688_IRQS_VBUS_CHANGE | -+ ANX7688_IRQS_VCONN_CHANGE | -+ ANX7688_IRQS_DATA_ROLE_CHANGE)) { -+ anx7688_update_status(anx7688); -+ } -+ } -+ -+ anx7688_reg_write(anx7688, ANX7688_REG_IRQ_EXT_SOURCE2, ANX7688_IRQ2_SOFT_INT); -+ } -+ -+out_unlock: -+ mutex_unlock(&anx7688->lock); -+ -+ return IRQ_HANDLED; -+#endif -+} -+ -+static int anx7688_dr_set(struct typec_port *port, enum typec_data_role role) -+{ -+ struct anx7688 *anx7688 = typec_get_drvdata(port); -+ int ret = 0; -+ -+ dev_info(anx7688->dev, "data role set %d\n", role); -+ -+ if (anx7688->data_role != role) { -+ mutex_lock(&anx7688->lock); -+ ret = anx7688_send_ocm_message(anx7688, ANX7688_OCM_MSG_DSWAP_REQ, 0, 0); -+ mutex_unlock(&anx7688->lock); -+ } -+ -+ return ret; -+} -+ -+static int anx7688_pr_set(struct typec_port *port, enum typec_role role) -+{ -+ struct anx7688 *anx7688 = typec_get_drvdata(port); -+ int ret = 0; -+ -+ dev_info(anx7688->dev, "power role set %d\n", role); -+ -+ if (anx7688->pwr_role != role) { -+ mutex_lock(&anx7688->lock); -+ ret = anx7688_send_ocm_message(anx7688, ANX7688_OCM_MSG_PSWAP_REQ, 0, 0); -+ mutex_unlock(&anx7688->lock); -+ } -+ -+ return ret; -+} -+ -+/* -+ * Calls to the eerpom functions need to be taken under the anx7688 lock. -+ */ -+ -+static int anx7688_eeprom_set_address(struct anx7688 *anx7688, u16 addr) -+{ -+ int ret; -+ -+ ret = anx7688_reg_write(anx7688, 0xe0, (addr >> 8) & 0xff); -+ if (ret < 0) -+ return ret; -+ -+ return anx7688_reg_write(anx7688, 0xe1, addr & 0xff); -+} -+ -+static int anx7688_eeprom_wait_done(struct anx7688 *anx7688) -+{ -+ ktime_t timeout; -+ int ret; -+ -+ // wait for read to be done -+ timeout = ktime_add_us(ktime_get(), 50000); -+ while (true) { -+ ret = anx7688_reg_read(anx7688, 0xe2); -+ if (ret < 0) -+ return ret; -+ -+ if (ret & BIT(3)) -+ return 0; -+ -+ if (ktime_after(ktime_get(), timeout)) { -+ dev_err(anx7688->dev, "timeout waiting for eeprom\n"); -+ return -ETIMEDOUT; -+ } -+ } -+} -+ -+/* wait for internal FSM of EEPROM to be in a state ready for -+ * programming/reading -+ */ -+static int anx7688_eeprom_wait_ready(struct anx7688 *anx7688) -+{ -+ ktime_t timeout; -+ int ret; -+ -+ // wait until eeprom is ready -+ timeout = ktime_add_us(ktime_get(), 1000000); -+ while (true) { -+ ret = anx7688_reg_read(anx7688, 0x7f); -+ if (ret < 0) -+ return ret; -+ -+ if ((ret & 0x0f) == 7) -+ return 0; -+ -+ if (ktime_after(ktime_get(), timeout)) { -+ dev_err(anx7688->dev, "timeout waiting for eeprom to initialize\n"); -+ return -ETIMEDOUT; -+ } -+ -+ msleep(5); -+ } -+} -+ -+static int anx7688_eeprom_read(struct anx7688 *anx7688, unsigned addr, u8 buf[16]) -+{ -+ int ret; -+ -+ ret = anx7688_eeprom_set_address(anx7688, addr); -+ if (ret) -+ return ret; -+ -+ // initiate read -+ ret = anx7688_reg_write(anx7688, 0xe2, 0x06); -+ if (ret < 0) -+ return ret; -+ -+ ret = anx7688_eeprom_wait_done(anx7688); -+ if (ret) -+ return ret; -+ -+ ret = i2c_smbus_read_i2c_block_data(anx7688->client, 0xd0, 16, buf); -+ if (ret < 0) { -+ dev_err(anx7688->dev, -+ "failed to read eeprom data (err=%d)\n", ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int anx7688_eeprom_write(struct anx7688 *anx7688, unsigned addr, -+ const u8 buf[16]) -+{ -+ int ret; -+ -+ ret = anx7688_eeprom_set_address(anx7688, addr); -+ if (ret) -+ return ret; -+ -+ ret = i2c_smbus_write_i2c_block_data(anx7688->client, 0xd0, 16, buf); -+ if (ret < 0) { -+ dev_err(anx7688->dev, -+ "failed to write eeprom data (err=%d)\n", ret); -+ return ret; -+ } -+ -+ dev_info(anx7688->dev, "eeprom wr %x %*ph\n", addr, 16, buf); -+ -+ // initiate write -+ ret = anx7688_reg_write(anx7688, 0xe2, 0x01); -+ if (ret < 0) -+ return ret; -+ -+ ret = anx7688_eeprom_wait_done(anx7688); -+ if (ret) -+ return ret; -+ -+ udelay(1500); -+ udelay(1000); -+ -+ return 0; -+} -+ -+/* -+ * The firmware is flashed as is from address 0x10 up to 0xffff. -+ */ -+static int anx7688_flash_firmware(struct anx7688 *anx7688) -+{ -+ const char* fw_name = "anx7688-fw.bin"; -+ const struct firmware *fw; -+ unsigned addr; -+ u8 buf[16]; -+ int ret; -+ -+ ret = request_firmware(&fw, fw_name, anx7688->dev); -+ if (ret < 0) -+ return ret; -+ -+ if (fw->size > 0x10000 - 16) { -+ dev_err(anx7688->dev, "Firmware is too big %s\n", fw_name); -+ ret = -E2BIG; -+ goto err_release; -+ } -+ -+ mutex_lock(&anx7688->lock); -+ -+ /* -+ * Cabledet changes will not be processed, since we're holding the -+ * lock, so the firmware flashing is safe from interruptions. -+ */ -+ -+ if (test_bit(ANX7688_F_CONNECTED, anx7688->flags)) -+ anx7688_disconnect(anx7688); -+ -+ msleep(20); -+ -+ anx7688_power_enable(anx7688); -+ -+ // reset OCM -+ ret = anx7688_reg_update_bits(anx7688, ANX7688_REG_USBC_RESET_CTRL, -+ ANX7688_USBC_RESET_CTRL_OCM_RESET, -+ ANX7688_USBC_RESET_CTRL_OCM_RESET); -+ if (ret < 0) -+ goto err_unlock; -+ -+ ret = anx7688_eeprom_wait_ready(anx7688); -+ if (ret) -+ goto err_unlock; -+ -+ msleep(10); -+ -+ /* -+ * Write to some magic registers to unlock flashing the EEPROM. -+ */ -+ ret = anx7688_reg_update_bits(anx7688, 0x3f, BIT(5), BIT(5)); -+ if (ret < 0) -+ goto err_unlock; -+ -+ ret = anx7688_reg_update_bits(anx7688, 0x44, -+ BIT(0) | BIT(7), -+ BIT(0) | BIT(7)); -+ if (ret < 0) -+ goto err_unlock; -+ -+ ret = anx7688_reg_update_bits(anx7688, 0x66, BIT(3), BIT(3)); -+ if (ret < 0) -+ goto err_unlock; -+ -+ msleep(50); -+ -+ ret = anx7688_eeprom_wait_done(anx7688); -+ if (ret) -+ goto err_unlock; -+ -+ for (addr = 0; addr < fw->size; addr += sizeof buf) { -+ memset(buf, 0, sizeof buf); -+ memcpy(buf, fw->data + addr, min_t(unsigned, fw->size - addr, sizeof buf)); -+ -+ ret = anx7688_eeprom_write(anx7688, addr + 0x10, buf); -+ if (ret < 0) -+ goto err_unlock; -+ } -+ -+ clear_bit(ANX7688_F_FW_FAILED, anx7688->flags); -+ -+err_unlock: -+ anx7688_power_disable(anx7688); -+ schedule_delayed_work(&anx7688->work, msecs_to_jiffies(20)); -+ mutex_unlock(&anx7688->lock); -+ -+err_release: -+ release_firmware(fw); -+ return ret; -+} -+ -+static const struct typec_operations anx7688_typec_ops = { -+ .dr_set = anx7688_dr_set, -+ .pr_set = anx7688_pr_set, -+}; -+ -+static ssize_t flash_eeprom_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ return scnprintf(buf, PAGE_SIZE, "Write 1 to this file to initiate firmware flashing. Consult dmesg for results.\n"); -+} -+ -+static ssize_t flash_eeprom_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ struct anx7688 *anx7688 = i2c_get_clientdata(to_i2c_client(dev)); -+ unsigned val; -+ int ret; -+ -+ ret = kstrtouint(buf, 0, &val); -+ if (ret) -+ return ret; -+ -+ if (val == 1) { -+ ret = anx7688_flash_firmware(anx7688); -+ if (ret) -+ return ret; -+ } -+ -+ return len; -+} -+static DEVICE_ATTR_RW(flash_eeprom); -+ -+static ssize_t reg_update_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ struct anx7688 *anx7688 = i2c_get_clientdata(to_i2c_client(dev)); -+ unsigned val, addr, devaddr, data; -+ int ret; -+ -+ ret = kstrtouint(buf, 16, &val); -+ if (ret) -+ return ret; -+ -+ data = val & 0xff; -+ addr = (val >> 8) & 0xff; -+ devaddr = (val >> 16) & 0xff; -+ -+ mutex_lock(&anx7688->lock); -+ -+ if (!test_bit(ANX7688_F_POWERED, anx7688->flags)) { -+ ret = -ENODEV; -+ goto out_unlock; -+ } -+ -+ if (devaddr == 0x50) -+ ret = anx7688_reg_write(anx7688, addr, val); -+ else if (devaddr == 0x58) -+ ret = anx7688_tcpc_reg_write(anx7688, addr, val); -+ else -+ ret = -EINVAL; -+ -+out_unlock: -+ mutex_unlock(&anx7688->lock); -+ -+ return ret ? ret : len; -+} -+static DEVICE_ATTR_WO(reg_update); -+ -+static ssize_t hwreset_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ struct anx7688 *anx7688 = i2c_get_clientdata(to_i2c_client(dev)); -+ -+ mutex_lock(&anx7688->lock); -+ -+ if (test_bit(ANX7688_F_CONNECTED, anx7688->flags)) -+ anx7688_disconnect(anx7688); -+ -+ schedule_delayed_work(&anx7688->work, msecs_to_jiffies(20)); -+ mutex_unlock(&anx7688->lock); -+ -+ return len; -+} -+static DEVICE_ATTR_WO(hwreset); -+ -+static struct attribute *anx7688_attrs[] = { -+ &dev_attr_flash_eeprom.attr, -+ &dev_attr_reg_update.attr, -+ &dev_attr_hwreset.attr, -+ NULL, -+}; -+ -+ATTRIBUTE_GROUPS(anx7688); -+ -+/* -+ * This function has to work when the ANX7688 is active, and when -+ * it is powered down. It power cycles the chip and asserts the OCM -+ * reset, to prevent OCM FW interfering with EEPROM reading. -+ * -+ * After reading EEPROM, the reconnection is scheduled. -+ */ -+static int anx7688_firmware_show(struct seq_file *s, void *data) -+{ -+ struct anx7688 *anx7688 = s->private; -+ unsigned addr; -+ u8 buf[16]; -+ int ret; -+ -+ mutex_lock(&anx7688->lock); -+ -+ if (test_bit(ANX7688_F_CONNECTED, anx7688->flags)) -+ anx7688_disconnect(anx7688); -+ -+ msleep(20); -+ -+ anx7688_power_enable(anx7688); -+ -+ ret = anx7688_reg_update_bits(anx7688, ANX7688_REG_USBC_RESET_CTRL, -+ ANX7688_USBC_RESET_CTRL_OCM_RESET, -+ ANX7688_USBC_RESET_CTRL_OCM_RESET); -+ if (ret < 0) -+ goto out_powerdown; -+ -+ ret = anx7688_eeprom_wait_ready(anx7688); -+ if (ret) -+ goto out_powerdown; -+ -+ msleep(10); -+ -+ for (addr = 0x10; addr < 0x10000; addr += 16) { -+ // set address -+ ret = anx7688_eeprom_read(anx7688, addr, buf); -+ if (ret < 0) -+ goto out_powerdown; -+ -+ seq_write(s, buf, sizeof buf); -+ } -+ -+out_powerdown: -+ anx7688_power_disable(anx7688); -+ schedule_delayed_work(&anx7688->work, 0); -+ mutex_unlock(&anx7688->lock); -+ -+ return ret; -+} -+DEFINE_SHOW_ATTRIBUTE(anx7688_firmware); -+ -+static int anx7688_regs_show(struct seq_file *s, void *data) -+{ -+ struct anx7688 *anx7688 = s->private; -+ u8 buf[16]; -+ unsigned i, addr; -+ int ret = -ENODEV; -+ -+ mutex_lock(&anx7688->lock); -+ -+ if (!test_bit(ANX7688_F_POWERED, anx7688->flags)) -+ goto out_unlock; -+ -+ for (addr = 0; addr < 256; addr += 16) { -+ ret = i2c_smbus_read_i2c_block_data(anx7688->client, addr, -+ sizeof buf, buf); -+ if (ret < 0) { -+ dev_err(anx7688->dev, -+ "failed to read registers (err=%d)\n", ret); -+ goto out_unlock; -+ } -+ -+ for (i = 0; i < 16; i++) -+ seq_printf(s, "50%02x: %02x\n", addr + i, buf[i]); -+ } -+ -+ for (addr = 0; addr < 256; addr += 16) { -+ ret = i2c_smbus_read_i2c_block_data(anx7688->client_tcpc, addr, -+ sizeof buf, buf); -+ if (ret < 0) { -+ dev_err(anx7688->dev, -+ "failed to read registers (err=%d)\n", ret); -+ goto out_unlock; -+ } -+ -+ for (i = 0; i < 16; i++) -+ seq_printf(s, "58%02x: %02x\n", addr + i, buf[i]); -+ } -+ -+out_unlock: -+ mutex_unlock(&anx7688->lock); -+ -+ return ret; -+} -+DEFINE_SHOW_ATTRIBUTE(anx7688_regs); -+ -+static int anx7688_status_show(struct seq_file *s, void *data) -+{ -+ struct anx7688 *anx7688 = s->private; -+ -+ mutex_lock(&anx7688->lock); -+ -+ seq_printf(s, "not much\n"); -+ -+ mutex_unlock(&anx7688->lock); -+ -+ return 0; -+} -+DEFINE_SHOW_ATTRIBUTE(anx7688_status); -+ -+/* -+ * This is just a 1s watchdog checking the state if cabledet pin. -+ */ -+static void anx7688_cabledet_timer_fn(struct timer_list *t) -+{ -+ struct anx7688 *anx7688 = from_timer(anx7688, t, work_timer); -+ -+ schedule_delayed_work(&anx7688->work, 0); -+ mod_timer(t, jiffies + msecs_to_jiffies(1000)); -+} -+ -+static void anx7688_handle_vbus_in_notify(struct anx7688* anx7688) -+{ -+ union power_supply_propval psy_val = {0,}; -+ struct device *dev = anx7688->dev; -+ int ret; -+ -+ /* PD charger doesn't like this for some reason, so it's disabled for now */ -+ if (anx7688->input_current_limit && false) { -+ ret = power_supply_get_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, -+ &psy_val); -+ if (ret) { -+ dev_err(dev, "failed to get vbus_in current\n"); -+ return; -+ } -+ -+ if (psy_val.intval == anx7688->input_current_limit) -+ goto check_type; -+ -+ psy_val.intval = anx7688->input_current_limit * 1000; -+ dev_dbg(dev, "setting vbus_in current limit to %d mA\n", -+ psy_val.intval / 1000); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, -+ &psy_val); -+ if (ret) -+ dev_err(dev, "failed to set vbus_in current to %d mA\n", -+ psy_val.intval / 1000); -+ } -+ -+check_type: -+ ret = power_supply_get_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_USB_TYPE, -+ &psy_val); -+ if (ret) { -+ dev_err(dev, "failed to get USB BC1.2 result\n"); -+ return; -+ } -+ -+ if (anx7688->last_bc_result == psy_val.intval) -+ return; -+ -+ anx7688->last_bc_result = psy_val.intval; -+ -+ switch (psy_val.intval) { -+ case POWER_SUPPLY_USB_TYPE_DCP: -+ case POWER_SUPPLY_USB_TYPE_CDP: -+ dev_dbg(dev, "BC 1.2 result: DCP or CDP\n"); -+ break; -+ case POWER_SUPPLY_USB_TYPE_SDP: -+ default: -+ dev_dbg(dev, "BC 1.2 result: SDP\n"); -+ break; -+ } -+} -+ -+static int anx7688_cc_status(unsigned v) -+{ -+ switch (v) { -+ case 0: return -1; -+ case 1: return -1; -+ case 2: return -1; -+ case 4: return TYPEC_PWR_MODE_USB; -+ case 8: return TYPEC_PWR_MODE_1_5A; -+ case 12: return TYPEC_PWR_MODE_3_0A; -+ default: return -1; -+ } -+} -+ -+static const char* anx7688_get_power_mode_name(enum typec_pwr_opmode mode) -+{ -+ switch (mode) { -+ case TYPEC_PWR_MODE_USB: return "USB"; -+ case TYPEC_PWR_MODE_1_5A: return "1.5A"; -+ case TYPEC_PWR_MODE_3_0A: return "3.0A"; -+ case TYPEC_PWR_MODE_PD: return "PD"; -+ default: return "Unknown"; -+ } -+} -+ -+/* -+ * This is called after 500ms after connection when the PD contract should have -+ * been negotiated. We should inspect CC pins or PD status here and decide what -+ * input current limit to set. -+ */ -+static void anx7688_handle_current_update(struct anx7688* anx7688) -+{ -+ unsigned cc_status = anx7688->last_cc_status; -+ union power_supply_propval val = {0,}; -+ struct device *dev = anx7688->dev; -+ int pwr_mode, ret, current_limit = 0; -+ -+ if (anx7688->pd_capable) { -+ pwr_mode = TYPEC_PWR_MODE_PD; -+ } else if (cc_status < 0) { -+ pwr_mode = TYPEC_PWR_MODE_USB; -+ } else { -+ pwr_mode = anx7688_cc_status(cc_status & 0xf); -+ if (pwr_mode < 0) -+ pwr_mode = anx7688_cc_status((cc_status >> 4) & 0xf); -+ if (pwr_mode < 0) -+ pwr_mode = TYPEC_PWR_MODE_USB; -+ } -+ -+ if (pwr_mode == TYPEC_PWR_MODE_1_5A) -+ current_limit = 1500; -+ else if (pwr_mode == TYPEC_PWR_MODE_3_0A) -+ current_limit = 3000; -+ else if (pwr_mode == TYPEC_PWR_MODE_PD) -+ current_limit = anx7688->pd_current_limit; -+ -+ anx7688->input_current_limit = current_limit; -+ -+ dev_info(anx7688->dev, "updating power mode to %s, current limit %dmA (0 => BC1.2)\n", -+ anx7688_get_power_mode_name(pwr_mode), current_limit); -+ -+ if (current_limit) { -+ /* -+ * Disable BC1.2 detection, because we'll be setting -+ * a current limit determined by USB-PD -+ */ -+ val.intval = 0; -+ dev_dbg(dev, "disabling USB BC 1.2 detection\n"); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_USB_BC_ENABLED, -+ &val); -+ if (ret) -+ dev_err(dev, "failed to disable USB BC1.2 detection\n"); -+ -+ val.intval = current_limit * 1000; -+ dev_dbg(dev, "setting vbus_in current limit to %d mA\n", current_limit); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, -+ &val); -+ if (ret) -+ dev_err(dev, "failed to set vbus_in current to %d mA\n", -+ current_limit); -+ } else { -+ /* -+ * Use the result of BC1.2 detection performed by PMIC. -+ */ -+ ret = power_supply_get_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_USB_BC_ENABLED, -+ &val); -+ if (ret) -+ dev_err(dev, "failed to get USB BC1.2 detection status\n"); -+ -+ if (ret != 0 || val.intval == 0) { -+ /* -+ * If BC is disabled or we can't get its status, -+ * set conservative 500mA limit. Otherwise leave -+ * the limit to BC1.2. -+ */ -+ val.intval = 500 * 1000; -+ dev_dbg(dev, "setting vbus_in current limit to %d mA\n", -+ val.intval / 1000); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, -+ &val); -+ if (ret) -+ dev_err(dev, "failed to set vbus_in current to %d mA\n", -+ val.intval / 1000); -+ } -+ } -+ -+ /* Turn on VBUS power path inside PMIC. */ -+ val.intval = 1; -+ dev_dbg(dev, "enabling vbus_in power path\n"); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_ONLINE, -+ &val); -+ if (ret) -+ dev_err(anx7688->dev, "failed to enable vbus_in\n"); -+ -+ typec_set_pwr_opmode(anx7688->port, pwr_mode); -+} -+ -+static int anx7688_vbus_in_notify(struct notifier_block *nb, -+ unsigned long val, void *v) -+{ -+ struct anx7688 *anx7688 = container_of(nb, struct anx7688, vbus_in_nb); -+ struct power_supply *psy = v; -+ -+ /* atomic context */ -+ if (val == PSY_EVENT_PROP_CHANGED && psy == anx7688->vbus_in_supply) { -+ set_bit(ANX7688_F_PWRSUPPLY_CHANGE, anx7688->flags); -+ schedule_delayed_work(&anx7688->work, 0); -+ } -+ -+ return NOTIFY_OK; -+} -+ -+static void anx7688_work(struct work_struct *work) -+{ -+ struct anx7688 *anx7688 = container_of(work, struct anx7688, work.work); -+ -+ if (test_bit(ANX7688_F_FW_FAILED, anx7688->flags)) -+ return; -+ -+ mutex_lock(&anx7688->lock); -+ -+ if (test_and_clear_bit(ANX7688_F_PWRSUPPLY_CHANGE, anx7688->flags)) -+ anx7688_handle_vbus_in_notify(anx7688); -+ -+ anx7688_handle_cable_change(anx7688); -+ -+ if (test_bit(ANX7688_F_CONNECTED, anx7688->flags)) { -+ /* -+ * We check status periodically outside of interrupt, just to -+ * be sure we didn't miss any status interrupts -+ */ -+ anx7688_update_status(anx7688); -+ -+ if (test_and_clear_bit(ANX7688_F_CURRENT_UPDATE, anx7688->flags)) -+ anx7688_handle_current_update(anx7688); -+ } -+ -+ mutex_unlock(&anx7688->lock); -+} -+ -+static int anx7688_i2c_probe(struct i2c_client *client, -+ const struct i2c_device_id *id) -+{ -+ struct anx7688 *anx7688; -+ struct device *dev = &client->dev; -+ struct typec_capability typec_cap = { }; -+ union power_supply_propval psy_val; -+ int i, vid_h, vid_l; -+ int irq_cabledet; -+ int ret = 0; -+ -+ anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL); -+ if (!anx7688) -+ return -ENOMEM; -+ -+ i2c_set_clientdata(client, anx7688); -+ anx7688->client = client; -+ anx7688->dev = &client->dev; -+ mutex_init(&anx7688->lock); -+ INIT_DELAYED_WORK(&anx7688->work, anx7688_work); -+ -+ ret = of_property_read_variable_u32_array(dev->of_node, "source-caps", -+ anx7688->src_caps, -+ 1, ARRAY_SIZE(anx7688->src_caps)); -+ if (ret < 0) { -+ dev_err(dev, "failed to get source-caps from DT\n"); -+ return ret; -+ } -+ anx7688->n_src_caps = ret; -+ -+ ret = of_property_read_variable_u32_array(dev->of_node, "sink-caps", -+ anx7688->snk_caps, -+ 1, ARRAY_SIZE(anx7688->snk_caps)); -+ if (ret < 0) { -+ dev_err(dev, "failed to get sink-caps from DT\n"); -+ return ret; -+ } -+ anx7688->n_snk_caps = ret; -+ -+ for (i = 0; i < ANX7688_NUM_SUPPLIES; i++) -+ anx7688->supplies[i].supply = anx7688_supply_names[i]; -+ ret = devm_regulator_bulk_get(dev, ANX7688_NUM_SUPPLIES, -+ anx7688->supplies); -+ if (ret) -+ return ret; -+ -+ anx7688->vbus_in_supply = -+ devm_power_supply_get_by_phandle(dev, "vbus_in-supply"); -+ if (IS_ERR(anx7688->vbus_in_supply)) { -+ dev_err(dev, "Couldn't get the VBUS power supply\n"); -+ return PTR_ERR(anx7688->vbus_in_supply); -+ } -+ -+ if (!anx7688->vbus_in_supply) -+ return -EPROBE_DEFER; -+ -+ anx7688->gpio_enable = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW); -+ if (IS_ERR(anx7688->gpio_enable)) { -+ dev_err(dev, "Could not get enable gpio\n"); -+ return PTR_ERR(anx7688->gpio_enable); -+ } -+ -+ anx7688->gpio_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); -+ if (IS_ERR(anx7688->gpio_reset)) { -+ dev_err(dev, "Could not get reset gpio\n"); -+ return PTR_ERR(anx7688->gpio_reset); -+ } -+ -+ anx7688->gpio_cabledet = devm_gpiod_get(dev, "cabledet", GPIOD_IN); -+ if (IS_ERR(anx7688->gpio_cabledet)) { -+ dev_err(dev, "Could not get cabledet gpio\n"); -+ return PTR_ERR(anx7688->gpio_cabledet); -+ } -+ -+ irq_cabledet = gpiod_to_irq(anx7688->gpio_cabledet); -+ if (irq_cabledet < 0) { -+ dev_err(dev, "Could not get cabledet irq\n"); -+ return irq_cabledet; -+ } -+ -+ ret = devm_device_add_groups(&client->dev, anx7688_groups); -+ if (ret) -+ return ret; -+ -+ // Register the TCPC i2c interface as second interface (0x58) -+ anx7688->client_tcpc = i2c_new_dummy_device(client->adapter, 0x2c); -+ if (IS_ERR(anx7688->client_tcpc)) { -+ dev_err(dev, "Could not register tcpc i2c client\n"); -+ return PTR_ERR(anx7688->client_tcpc); -+ } -+ i2c_set_clientdata(anx7688->client_tcpc, anx7688); -+ -+ // powerup and probe the ANX chip -+ -+ ret = regulator_bulk_enable(ANX7688_NUM_ALWAYS_ON_SUPPLIES, -+ anx7688->supplies); -+ if (ret) { -+ dev_err(dev, "Could not enable regulators\n"); -+ goto err_dummy_dev; -+ } -+ -+ msleep(10); -+ -+ anx7688_power_enable(anx7688); -+ -+ vid_l = anx7688_tcpc_reg_read(anx7688, ANX7688_TCPC_REG_VENDOR_ID0); -+ vid_h = anx7688_tcpc_reg_read(anx7688, ANX7688_TCPC_REG_VENDOR_ID1); -+ if (vid_l < 0 || vid_h < 0) { -+ anx7688_power_disable(anx7688); -+ goto err_disable_reg; -+ } -+ -+ dev_info(dev, "Vendor id 0x%04x\n", vid_l | vid_h << 8); -+ -+ anx7688_power_disable(anx7688); -+ -+ anx7688->role_sw = usb_role_switch_get(dev); -+ if (IS_ERR(anx7688->role_sw)) { -+ dev_err(dev, "Could not get role switch\n"); -+ ret = PTR_ERR(anx7688->role_sw); -+ goto err_disable_reg; -+ } -+ -+ // setup a typec port device -+ typec_cap.revision = USB_TYPEC_REV_1_2; -+ typec_cap.pd_revision = 0x200; -+ typec_cap.prefer_role = TYPEC_NO_PREFERRED_ROLE; -+ typec_cap.type = TYPEC_PORT_DRP; -+ typec_cap.data = TYPEC_PORT_DRD; -+ typec_cap.driver_data = anx7688; -+ typec_cap.ops = &anx7688_typec_ops; -+ -+ anx7688->port = typec_register_port(dev, &typec_cap); -+ if (IS_ERR(anx7688->port)) { -+ dev_err(dev, "Could not register type-c port\n"); -+ ret = PTR_ERR(anx7688->port); -+ goto err_role_sw; -+ } -+ -+ anx7688->pwr_role = TYPEC_SINK; -+ anx7688->data_role = TYPEC_DEVICE; -+ typec_set_pwr_role(anx7688->port, anx7688->pwr_role); -+ typec_set_data_role(anx7688->port, anx7688->data_role); -+ typec_set_pwr_opmode(anx7688->port, TYPEC_PWR_MODE_USB); -+ typec_set_vconn_role(anx7688->port, TYPEC_SINK); -+ -+ ret = devm_request_irq(dev, irq_cabledet, anx7688_irq_plug_handler, -+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, -+ "anx7688-cabledet", anx7688); -+ if (ret < 0) { -+ dev_err(dev, "Could not request cabledet irq (%d)\n", ret); -+ goto err_cport; -+ } -+ -+ ret = devm_request_threaded_irq(dev, client->irq, -+ NULL, anx7688_irq_status_handler, -+ IRQF_ONESHOT, NULL, anx7688); -+ if (ret < 0) { -+ dev_err(dev, "Could not request irq (%d)\n", ret); -+ goto err_cport; -+ } -+ -+ // enable BC1.2 detection in PMIC and set current limit to 500mA until -+ // proper limit is established via BC1.2 or USB-PD -+ psy_val.intval = 1; -+ dev_dbg(dev, "enabling USB BC 1.2 detection\n"); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_USB_BC_ENABLED, -+ &psy_val); -+ if (ret) { -+ dev_err(anx7688->dev, "failed to disable BC1.2 detection\n"); -+ goto err_cport; -+ } -+ -+ psy_val.intval = 500000; -+ dev_dbg(dev, "setting vbus_in current limit to %d mA\n", psy_val.intval); -+ ret = power_supply_set_property(anx7688->vbus_in_supply, -+ POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, -+ &psy_val); -+ if (ret) { -+ dev_err(anx7688->dev, "failed to set vbus_in current to %d mA\n", -+ psy_val.intval / 1000); -+ goto err_cport; -+ } -+ -+ anx7688->last_bc_result = -1; -+ anx7688->vbus_in_nb.notifier_call = anx7688_vbus_in_notify; -+ anx7688->vbus_in_nb.priority = 0; -+ ret = power_supply_reg_notifier(&anx7688->vbus_in_nb); -+ if (ret) -+ goto err_cport; -+ -+ anx7688->debug_root = debugfs_create_dir("anx7688", NULL); -+ debugfs_create_file("firmware", 0444, anx7688->debug_root, anx7688, -+ &anx7688_firmware_fops); -+ debugfs_create_file("regs", 0444, anx7688->debug_root, anx7688, -+ &anx7688_regs_fops); -+ debugfs_create_file("status", 0444, anx7688->debug_root, anx7688, -+ &anx7688_status_fops); -+ -+ schedule_delayed_work(&anx7688->work, msecs_to_jiffies(10)); -+ -+ timer_setup(&anx7688->nopd_timer, anx7688_nopd_timer_fn, 0); -+ -+ timer_setup(&anx7688->work_timer, anx7688_cabledet_timer_fn, 0); -+ mod_timer(&anx7688->work_timer, jiffies + msecs_to_jiffies(1000)); -+ -+ return 0; -+ -+err_cport: -+ typec_unregister_port(anx7688->port); -+err_role_sw: -+ usb_role_switch_put(anx7688->role_sw); -+err_disable_reg: -+ regulator_bulk_disable(ANX7688_NUM_ALWAYS_ON_SUPPLIES, anx7688->supplies); -+err_dummy_dev: -+ i2c_unregister_device(anx7688->client_tcpc); -+ return ret; -+} -+ -+static int anx7688_i2c_remove(struct i2c_client *client) -+{ -+ struct anx7688 *anx7688 = i2c_get_clientdata(client); -+ -+ mutex_lock(&anx7688->lock); -+ -+ power_supply_unreg_notifier(&anx7688->vbus_in_nb); -+ -+ del_timer_sync(&anx7688->work_timer); -+ del_timer_sync(&anx7688->nopd_timer); -+ -+ cancel_delayed_work_sync(&anx7688->work); -+ -+ if (test_bit(ANX7688_F_CONNECTED, anx7688->flags)) -+ anx7688_disconnect(anx7688); -+ -+ typec_unregister_partner(anx7688->partner); -+ typec_unregister_port(anx7688->port); -+ usb_role_switch_put(anx7688->role_sw); -+ -+ regulator_bulk_disable(ANX7688_NUM_ALWAYS_ON_SUPPLIES, anx7688->supplies); -+ i2c_unregister_device(anx7688->client_tcpc); -+ -+ debugfs_remove(anx7688->debug_root); -+ -+ mutex_unlock(&anx7688->lock); -+ -+ return 0; -+} -+ -+static const struct i2c_device_id anx7688_ids[] = { -+ { "anx7688", 0 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(i2c, anx7688_ids); -+ -+#ifdef CONFIG_OF -+static struct of_device_id anx7688_of_match_table[] = { -+ { .compatible = "analogix,anx7688" }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, anx7688_of_match_table); -+#endif -+ -+static struct i2c_driver anx7688_driver = { -+ .driver = { -+ .name = "anx7688", -+#ifdef CONFIG_OF -+ .of_match_table = anx7688_of_match_table, -+#endif -+ }, -+ .probe = anx7688_i2c_probe, -+ .remove = anx7688_i2c_remove, -+ .id_table = anx7688_ids, -+}; -+ -+module_i2c_driver(anx7688_driver); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Martijn Braam "); -+MODULE_AUTHOR("Ondrej Jirman "); -+MODULE_DESCRIPTION("Analogix ANX7688 USB-C DisplayPort bridge"); -diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c -index e48fded3e414..0fcee08df220 100644 ---- a/drivers/video/backlight/pwm_bl.c -+++ b/drivers/video/backlight/pwm_bl.c -@@ -444,7 +444,7 @@ static int pwm_backlight_probe(struct platform_device *pdev) - struct backlight_device *bl; - struct device_node *node = pdev->dev.of_node; - struct pwm_bl_data *pb; -- struct pwm_state state; -+ struct pwm_state state, state_real; - unsigned int i; - int ret; - -@@ -523,6 +523,11 @@ static int pwm_backlight_probe(struct platform_device *pdev) - /* Sync up PWM state. */ - pwm_init_state(pb->pwm, &state); - -+ /* Read real state, but only if the PWM is enabled. */ -+ pwm_get_state(pb->pwm, &state_real); -+ if (state_real.enabled) -+ state = state_real; -+ - /* - * The DT case will set the pwm_period_ns field to 0 and store the - * period, parsed from the DT, in the PWM device. For the non-DT case, -@@ -617,6 +622,22 @@ static int pwm_backlight_probe(struct platform_device *pdev) - - bl->props.brightness = data->dft_brightness; - bl->props.power = pwm_backlight_initial_power_state(pb); -+ if (bl->props.power == FB_BLANK_UNBLANK && pb->levels) { -+ /* If the backlight is already on, determine the default -+ * brightness from PWM duty cycle instead of forcing -+ * the brightness determined by the driver -+ */ -+ pwm_get_state(pb->pwm, &state); -+ u64 level = (u64)state.duty_cycle * pb->scale; -+ do_div(level, (u64)state.period); -+ -+ for (i = 0; i <= data->max_brightness; i++) { -+ if (data->levels[i] > level) { -+ bl->props.brightness = i; -+ break; -+ } -+ } -+ } - backlight_update_status(bl); - - platform_set_drvdata(pdev, bl); -diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig -index 4f02db65dede..e01faabaae85 100644 ---- a/drivers/video/fbdev/Kconfig -+++ b/drivers/video/fbdev/Kconfig -@@ -870,6 +870,18 @@ config FB_ATMEL - help - This enables support for the AT91 LCD Controller. - -+config FB_SUN5I_EINK -+ tristate "eInk display Framebuffer Support (A13 based eBook readers)" -+ depends on FB -+ select FB_MODE_HELPERS -+ select FB_CFB_FILLRECT -+ select FB_CFB_COPYAREA -+ select FB_CFB_IMAGEBLIT -+ select BITREVERSE -+ help -+ This driver supports PocketBook Touch Lux 3 e-paper display. -+ -+ - config FB_NVIDIA - tristate "nVidia Framebuffer Support" - depends on FB && PCI -diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile -index 477b9624b703..429d1fb46a9f 100644 ---- a/drivers/video/fbdev/Makefile -+++ b/drivers/video/fbdev/Makefile -@@ -132,3 +132,7 @@ obj-$(CONFIG_FB_SIMPLE) += simplefb.o - - # the test framebuffer is last - obj-$(CONFIG_FB_VIRTUAL) += vfb.o -+ -+obj-$(CONFIG_FB_SUN5I_EINK) += sun5ieink.o -+sun5ieink-objs = sun5i-eink.o sun5i-eink-neon.o -+CFLAGS_sun5i-eink-neon.o += -march=armv7-a -mfloat-abi=softfp -mfpu=neon -ffreestanding -diff --git a/drivers/video/fbdev/sun5i-eink-neon.c b/drivers/video/fbdev/sun5i-eink-neon.c -new file mode 100644 -index 000000000000..9e2386fd91ea ---- /dev/null -+++ b/drivers/video/fbdev/sun5i-eink-neon.c -@@ -0,0 +1,49 @@ -+#include -+#include -+#include -+#include -+ -+void eink_ctlstream_fill_data_neon(u32* cmd, u8* fb, int stride, -+ int sources, int gates, u32 masks[4]) -+{ -+ uint32x4_t mask; -+ int g, s; -+ int cutoff = sources / 4 / 8 / 3 * 2; -+ -+ mask = vdupq_n_u32(0); -+ -+ for (g = 0; g < gates; g++) { -+ if (unlikely(g == 0)) -+ mask = vdupq_n_u32(masks[0]); -+ else -+ mask = vdupq_n_u32(masks[2]); -+ -+ for (s = 0; s < sources / 4 / 8; s++) { -+ uint8x8_t src; -+ uint16x8_t dst; -+ uint32x4_t out; -+ -+ if (unlikely(s == cutoff)) -+ mask = vdupq_n_u32(g == 0 ? masks[1] : masks[3]); -+ -+ src = vld1_u8(fb); -+ fb += 8; -+ -+ dst = vshll_n_u8(src, 3); -+ dst = vsliq_n_u16(dst, vmovl_u8(vshr_n_u8(src, 3)), 8); -+ -+ out = vmovl_u16(vget_low_u16(dst)); -+ out = vorrq_u32(out, mask); -+ vst1q_u32(cmd, out); -+ cmd += 4; -+ -+ out = vmovl_u16(vget_high_u16(dst)); -+ out = vorrq_u32(out, mask); -+ vst1q_u32(cmd, out); -+ cmd += 4; -+ } -+ -+ cmd += stride - sources / 4; -+ } -+} -+EXPORT_SYMBOL_GPL(eink_ctlstream_fill_data_neon); -diff --git a/drivers/video/fbdev/sun5i-eink.c b/drivers/video/fbdev/sun5i-eink.c -new file mode 100644 -index 000000000000..d4e8829d3be4 ---- /dev/null -+++ b/drivers/video/fbdev/sun5i-eink.c -@@ -0,0 +1,1157 @@ -+/* -+ * Copyright Ondrej Jirman -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+// {{{ Registry defines -+ -+#define SUN4I_TCON_GCTL_REG 0x0 -+#define SUN4I_TCON_GCTL_TCON_ENABLE BIT(31) -+#define SUN4I_TCON_GCTL_IOMAP_MASK BIT(0) -+#define SUN4I_TCON_GCTL_IOMAP_TCON1 (1 << 0) -+#define SUN4I_TCON_GCTL_IOMAP_TCON0 (0 << 0) -+ -+#define SUN4I_TCON_GINT0_REG 0x4 -+#define SUN4I_TCON_GINT0_VBLANK_ENABLE(pipe) BIT(31 - (pipe)) -+#define SUN4I_TCON_GINT0_VBLANK_INT(pipe) BIT(15 - (pipe)) -+#define SUN4I_TCON_GINT0_LINE_ENABLE(pipe) BIT(29 - (pipe)) -+#define SUN4I_TCON_GINT0_LINE_INT(pipe) BIT(13 - (pipe)) -+ -+#define SUN4I_TCON_GINT1_REG 0x8 -+ -+#define SUN4I_TCON0_CTL_REG 0x40 -+#define SUN4I_TCON0_CTL_TCON_ENABLE BIT(31) -+#define SUN4I_TCON0_CTL_IF_MASK GENMASK(25, 24) -+#define SUN4I_TCON0_CTL_IF_8080 (1 << 24) -+#define SUN4I_TCON0_CTL_CLK_DELAY_MASK GENMASK(8, 4) -+#define SUN4I_TCON0_CTL_CLK_DELAY(delay) ((delay << 4) & SUN4I_TCON0_CTL_CLK_DELAY_MASK) -+#define SUN4I_TCON0_CTL_SRC_SEL_MASK GENMASK(2, 0) -+ -+#define SUN4I_TCON0_DCLK_REG 0x44 -+#define SUN4I_TCON0_DCLK_GATE_BIT (31) -+#define SUN4I_TCON0_DCLK_DIV_SHIFT (0) -+#define SUN4I_TCON0_DCLK_DIV_WIDTH (7) -+ -+#define SUN4I_TCON0_BASIC0_REG 0x48 -+#define SUN4I_TCON0_BASIC0_X(width) ((((width) - 1) & 0xfff) << 16) -+#define SUN4I_TCON0_BASIC0_Y(height) (((height) - 1) & 0xfff) -+ -+#define SUN4I_TCON0_BASIC1_REG 0x4c -+#define SUN4I_TCON0_BASIC1_H_TOTAL(total) ((((total) - 1) & 0x1fff) << 16) -+#define SUN4I_TCON0_BASIC1_H_BACKPORCH(bp) (((bp) - 1) & 0xfff) -+ -+#define SUN4I_TCON0_BASIC2_REG 0x50 -+#define SUN4I_TCON0_BASIC2_V_TOTAL(total) (((total) & 0x1fff) << 16) -+#define SUN4I_TCON0_BASIC2_V_BACKPORCH(bp) (((bp) - 1) & 0xfff) -+ -+#define SUN4I_TCON0_BASIC3_REG 0x54 -+#define SUN4I_TCON0_BASIC3_H_SYNC(width) ((((width) - 1) & 0x7ff) << 16) -+#define SUN4I_TCON0_BASIC3_V_SYNC(height) (((height) - 1) & 0x7ff) -+ -+#define SUN4I_TCON0_HV_IF_REG 0x58 -+ -+#define SUN4I_TCON0_IO_POL_REG 0x88 -+#define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase) ((phase & 3) << 28) -+#define SUN4I_TCON0_IO_POL_DE_NEGATIVE BIT(27) -+#define SUN4I_TCON0_IO_POL_DCLK_NEGATIVE BIT(26) -+#define SUN4I_TCON0_IO_POL_HSYNC_POSITIVE BIT(25) -+#define SUN4I_TCON0_IO_POL_VSYNC_POSITIVE BIT(24) -+ -+#define SUN4I_TCON0_IO_TRI_REG 0x8c -+#define SUN4I_TCON0_IO_TRI_HSYNC_DISABLE BIT(25) -+#define SUN4I_TCON0_IO_TRI_VSYNC_DISABLE BIT(24) -+#define SUN4I_TCON0_IO_TRI_DATA_PINS_DISABLE(pins) GENMASK(pins, 0) -+ -+#define SUN4I_BACKEND_MODCTL_REG 0x800 -+#define SUN4I_BACKEND_MODCTL_LINE_SEL BIT(29) -+#define SUN4I_BACKEND_MODCTL_ITLMOD_EN BIT(28) -+#define SUN4I_BACKEND_MODCTL_OUT_SEL GENMASK(22, 20) -+#define SUN4I_BACKEND_MODCTL_OUT_LCD0 (0 << 20) -+#define SUN4I_BACKEND_MODCTL_OUT_LCD1 (1 << 20) -+#define SUN4I_BACKEND_MODCTL_OUT_FE0 (6 << 20) -+#define SUN4I_BACKEND_MODCTL_OUT_FE1 (7 << 20) -+#define SUN4I_BACKEND_MODCTL_HWC_EN BIT(16) -+#define SUN4I_BACKEND_MODCTL_LAY_EN(l) BIT(8 + l) -+#define SUN4I_BACKEND_MODCTL_OCSC_EN BIT(5) -+#define SUN4I_BACKEND_MODCTL_DFLK_EN BIT(4) -+#define SUN4I_BACKEND_MODCTL_DLP_START_CTL BIT(2) -+#define SUN4I_BACKEND_MODCTL_START_CTL BIT(1) -+#define SUN4I_BACKEND_MODCTL_DEBE_EN BIT(0) -+ -+#define SUN4I_BACKEND_BACKCOLOR_REG 0x804 -+#define SUN4I_BACKEND_BACKCOLOR(r, g, b) (((r) << 16) | ((g) << 8) | (b)) -+ -+#define SUN4I_BACKEND_DISSIZE_REG 0x808 -+#define SUN4I_BACKEND_DISSIZE(w, h) (((((h) - 1) & 0xffff) << 16) | \ -+ (((w) - 1) & 0xffff)) -+ -+#define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l))) -+#define SUN4I_BACKEND_LAYSIZE(w, h) (((((h) - 1) & 0x1fff) << 16) | \ -+ (((w) - 1) & 0x1fff)) -+ -+#define SUN4I_BACKEND_LAYCOOR_REG(l) (0x820 + (0x4 * (l))) -+#define SUN4I_BACKEND_LAYCOOR(x, y) ((((u32)(y) & 0xffff) << 16) | \ -+ ((u32)(x) & 0xffff)) -+ -+#define SUN4I_BACKEND_LAYLINEWIDTH_REG(l) (0x840 + (0x4 * (l))) -+ -+#define SUN4I_BACKEND_LAYFB_L32ADD_REG(l) (0x850 + (0x4 * (l))) -+ -+#define SUN4I_BACKEND_LAYFB_H4ADD_REG 0x860 -+#define SUN4I_BACKEND_LAYFB_H4ADD_MSK(l) GENMASK(3 + ((l) * 8), (l) * 8) -+#define SUN4I_BACKEND_LAYFB_H4ADD(l, val) ((val) << ((l) * 8)) -+ -+#define SUN4I_BACKEND_REGBUFFCTL_REG 0x870 -+#define SUN4I_BACKEND_REGBUFFCTL_AUTOLOAD_DIS BIT(1) -+#define SUN4I_BACKEND_REGBUFFCTL_LOADCTL BIT(0) -+ -+#define SUN4I_BACKEND_CKMAX_REG 0x880 -+#define SUN4I_BACKEND_CKMIN_REG 0x884 -+#define SUN4I_BACKEND_CKCFG_REG 0x888 -+#define SUN4I_BACKEND_ATTCTL_REG0(l) (0x890 + (0x4 * (l))) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_MASK GENMASK(31, 24) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA(x) ((x) << 24) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL_MASK BIT(15) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(x) ((x) << 15) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL_MASK GENMASK(11, 10) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL(x) ((x) << 10) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_WORKMOD_MASK GENMASK(23, 22) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_WORKMOD(x) ((x) << 22) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_YUVEN BIT(2) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_VDOEN BIT(1) -+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_EN BIT(0) -+ -+#define SUN4I_BACKEND_ATTCTL_REG1(l) (0x8a0 + (0x4 * (l))) -+#define SUN4I_BACKEND_ATTCTL_REG1_LAY_HSCAFCT GENMASK(15, 14) -+#define SUN4I_BACKEND_ATTCTL_REG1_LAY_WSCAFCT GENMASK(13, 12) -+#define SUN4I_BACKEND_ATTCTL_REG1_LAY_FBFMT GENMASK(11, 8) -+#define SUN4I_BACKEND_LAY_FBFMT_1BPP (0 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_2BPP (1 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_4BPP (2 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_8BPP (3 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_RGB655 (4 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_RGB565 (5 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_RGB556 (6 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_ARGB1555 (7 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_RGBA5551 (8 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_XRGB8888 (9 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_ARGB8888 (10 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_RGB888 (11 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_ARGB4444 (12 << 8) -+#define SUN4I_BACKEND_LAY_FBFMT_RGBA4444 (13 << 8) -+ -+// }}} -+ -+#define EINK_IOCTL_UPDATE _IO('A', 0) -+//#define EINK_IOCTL_STATUS _IOR('A', 2, int) -+ -+enum { -+ EINK_REQ_NONE = 0, -+ EINK_REQ_UPDATE, -+ EINK_REQ_POWERDOWN, -+}; -+ -+enum { -+ EINK_WORKING, -+ EINK_OPEN, -+ EINK_WAITING_INT, -+ EINK_BE_SETUP, -+}; -+ -+struct eink_dev { -+ struct device *dev; -+ -+ // io -+ struct pinctrl* pinctrl; -+ struct pinctrl_state *pinctrl_active; -+ struct pinctrl_state *pinctrl_idle; -+ struct gpio_descs* gpios; -+ -+ // power -+ struct regulator *panel_supply; -+ struct timer_list powerdown_timer; -+ bool powered; -+ -+ // tcon0 -+ struct clk_bulk_data *clks; -+ int num_clks; -+ -+ struct reset_control *rstc; -+ struct regmap *tcon_regs; -+ struct regmap *be_regs; -+ int irq; -+ -+ // framebuffers -+ u8* framebuffers[2]; -+ u32* ctlstream; -+ dma_addr_t ctlstream_paddr; -+ size_t ctlstream_size; // byte size -+ -+ // control device -+ struct cdev cdev; -+ dev_t major; -+ bool is_open; // device can be used by only one user -+ -+ // rendering work -+ spinlock_t lock; -+ wait_queue_head_t waitqueue; -+ struct workqueue_struct *wq; -+ struct work_struct work; -+ unsigned long flags[1]; -+ int last_request; -+ -+ const struct eink_panel_config* panel; -+}; -+ -+struct eink_panel_config { -+ int sources; -+ int gates; -+ int h_lead; -+ int h_trail; -+ int v_extra; -+}; -+ -+static const struct eink_panel_config eink_ed060xd4_panel = { -+ .sources = 1024, -+ .gates = 758, -+ .h_lead = 40, // 1000ns (should be multiple of 8 for 256-bit alignment) -+ .h_trail = 8, // should be multiple of 8 for 256-bit alignment -+ .v_extra = 9, -+}; -+ -+// buf format is 1 byte per pixel, len needs to be multiple of 4 bytes -+ -+/* PocketBook 626(2) (Touch Lux 3) port D <-> Panel pin map */ -+ -+#define D0 BIT(3) -+#define D1 BIT(4) -+#define D2 BIT(5) -+#define D3 BIT(6) -+#define D4 BIT(7) -+ -+#define D5 BIT(10) -+#define D6 BIT(11) -+#define D7 BIT(12) -+#define S_LE BIT(13) -+#define G_MODE1 BIT(15) -+ -+#define S_OE BIT(20) -+#define S_SP BIT(21) -+#define G_CLK BIT(22) -+#define G_SP BIT(23) -+ -+/* -+ * we need to encode stream of control signals for various operations -+ * into separate rows: -+ * -+ * - sequence for starting a frame -+ * - three leading G_CLK pulses -+ * - sequence for all data rows -+ * - wait time with OE for previous row -+ * - wait time for the last row without shifting in more data -+ * - trailing row with a sequence for ending a frame -+ * -+ * So we have to have: -+ * - 6 special rows with no data + all the data rows -+ * - all of these have to have the same width -+ * - we want to use TCON to manage timing of the OE via HT/HBP settings -+ * -+ * Timings: -+ * - we use 20MHz clock (50ns period) -+ * - we have to spend 256 clocks per row, pushing data -+ * - we want to have 85Hz frame refresh rate -+ * - 11765us budget per frame -+ * - minimum G_CLK low time is 500ns, minimum G_CLK cycle time is 5us -+ * - G_SP 100ns setup (to G_CLK H->L)/hold time(after G_CLK H->L) -+ * - LE pulse width >150ns -+ * - LE delay before more data 200ns -+ * - 12us time the output reacts to LE (this should be hsync time/hbp) -+ * - at 20MHz, time to load data is 13us (about 100 FPS) -+ */ -+static void eink_ctlstream_prepare(struct eink_dev* eink) -+{ -+ const struct eink_panel_config* pc = eink->panel; -+ u32* p = eink->ctlstream; -+ int row_width = pc->sources / 4 + pc->h_lead + pc->h_trail; // ~262 -+ int i, j, t, r; -+ u32 base; -+ -+#define SET_PINS(t, v) { \ -+ for (i = 0; i < t; i++) \ -+ *p++ = v; \ -+ r -= t; \ -+ } -+ -+ // prepare a startup row -+ t = row_width / 3; -+ -+ r = row_width; -+ SET_PINS(20, G_MODE1 | G_SP | S_SP ); -+ SET_PINS(2*t,G_MODE1 | G_SP | S_SP | G_CLK ); -+ SET_PINS(r, G_MODE1 | G_SP | S_SP ); -+ -+ r = row_width; -+ SET_PINS(t, G_MODE1 | G_SP | S_SP | G_CLK ); -+ SET_PINS(t, G_MODE1 | S_SP | G_CLK ); -+ SET_PINS(r, G_MODE1 | S_SP ); -+ -+ r = row_width; -+ SET_PINS(t, G_MODE1 | S_SP | G_CLK ); -+ SET_PINS(t, G_MODE1 | G_SP | S_SP | G_CLK ); -+ SET_PINS(r, G_MODE1 | G_SP | S_SP ); -+ -+ // three empty rows -+ for (j = 0; j < 3; j++) { -+ r = row_width; -+ -+ SET_PINS(2*t, G_MODE1 | G_SP | S_SP | G_CLK ); -+ SET_PINS(r, G_MODE1 | G_SP | S_SP ); -+ } -+ -+ // extra row is there to keep S_OE high for the previous last data -+ // row that was shifted in -+ for (j = 0; j < pc->gates + 1; j++) { -+ base = G_MODE1 | G_SP; -+ -+ // We have 40 periods here to work with here (h_lead). -+ r = pc->h_lead; -+ -+ // S_SP goes high after the last data and there's 2us -+ // delay (it may even go high during the last data period?) -+ SET_PINS(20, base | S_SP); // 1000ns for tLEdly -+ base &= ~S_OE; -+ SET_PINS(2, base | S_SP); -+ SET_PINS(6, base | S_SP | (j > 0 ? S_LE : 0)); // 300ns for tLEw -+ if (j > 0) -+ base |= S_OE; -+ SET_PINS(2, base | S_SP | (j > 0 ? S_LE : 0)); // S_OE goes high -+ SET_PINS(r-2,base | S_SP); // 400ns for tLEoff -+ SET_PINS(r, base | S_SP | G_CLK); // 400ns for tLEoff -+ -+ if (j >= pc->gates) -+ base |= S_SP; -+ -+ // start loading data immediately at S_SP going low -+ r = pc->sources / 4; -+ t = r / 3; -+ SET_PINS(t, base | G_CLK); -+ SET_PINS(r, base); -+ -+ r = pc->h_trail; -+ SET_PINS(r, base | S_SP); -+ } -+ -+ r = row_width; -+ SET_PINS(r, G_SP | S_SP ); -+ -+ // this last row will be stopped by an interrupt before finishing -+ // completely, so it's a dummy one -+ r = row_width; -+ SET_PINS(r, G_SP | S_SP ); -+} -+ -+void eink_ctlstream_fill_data_neon(u32* cmd, u8* fb, int stride, -+ int sources, int gates, u32 masks[4]); -+ -+static void eink_ctlstream_fill_data(struct eink_dev* eink, u8* fb) -+{ -+ const struct eink_panel_config* pc = eink->panel; -+ int row_width = pc->sources / 4 + pc->h_lead + pc->h_trail; -+ u32 masks[4] = { -+ G_MODE1 | G_SP | G_CLK, -+ G_MODE1 | G_SP, -+ G_MODE1 | G_SP | S_OE | G_CLK, -+ G_MODE1 | G_SP | S_OE, -+ }; -+ -+ kernel_neon_begin(); -+ eink_ctlstream_fill_data_neon(eink->ctlstream + 6 * row_width + pc->h_lead, -+ fb, row_width, pc->sources, -+ pc->gates, masks); -+ kernel_neon_end(); -+} -+ -+static int eink_set_power(struct eink_dev* eink, bool en) -+{ -+ int ret; -+ -+ if (!en != !eink->powered) { -+ dev_warn(eink->dev, "%sable power supply", en ? "en" : "dis"); -+ -+ if (en) -+ ret = regulator_enable(eink->panel_supply); -+ else -+ ret = regulator_disable(eink->panel_supply); -+ if (ret) { -+ dev_err(eink->dev, "can't %sable power supply (%d)", -+ en ? "en" : "dis", ret); -+ return ret; -+ } -+ } -+ -+ if (en) -+ mod_timer(&eink->powerdown_timer, -+ jiffies + msecs_to_jiffies(5000)); -+ else -+ del_timer_sync(&eink->powerdown_timer); -+ -+ eink->powered = en; -+ return 0; -+} -+ -+static void print_time(struct device* dev, u64 ts, char *buf) -+{ -+ do_div(ts, 1000); -+ dev_info(dev, "[%s] %6lu us", buf, (unsigned long)ts); -+} -+ -+// DCLK = 20MHz -+static int eink_update(struct eink_dev* eink) -+{ -+ struct regmap *tcon = eink->tcon_regs; -+ struct regmap *be = eink->be_regs; -+ unsigned long sclk_rate; -+ u32 ddiv = 6, w, h; -+ u32 lo_paddr, hi_paddr; -+ u32 vbp = 1, hbp = 40; -+ int ret; -+ -+ ret = eink_set_power(eink, 1); -+ if (ret) -+ return ret; -+ -+ sclk_rate = clk_get_rate(eink->clks[1].clk); -+ if (sclk_rate == 0) -+ return -EINVAL; -+ -+ spin_lock(&eink->lock); -+ eink_ctlstream_fill_data(eink, eink->framebuffers[0]); -+ spin_unlock(&eink->lock); -+ -+ w = eink->panel->sources / 4 + eink->panel->h_lead + eink->panel->h_trail; -+ h = eink->panel->gates + eink->panel->v_extra; -+ -+ // Setup DEBE -+ -+ if (!test_bit(EINK_BE_SETUP, eink->flags)) { -+ regmap_write(be, SUN4I_BACKEND_DISSIZE_REG, -+ SUN4I_BACKEND_DISSIZE(w, h)); -+ regmap_write(be, SUN4I_BACKEND_LAYSIZE_REG(0), -+ SUN4I_BACKEND_LAYSIZE(w, h)); -+ regmap_write(be, SUN4I_BACKEND_LAYCOOR_REG(0), -+ SUN4I_BACKEND_LAYCOOR(0, 0)); -+ regmap_write(be, SUN4I_BACKEND_LAYLINEWIDTH_REG(0), -+ w * 4 * 8); /* input format has 4 bytes per pixel */ -+ -+ lo_paddr = eink->ctlstream_paddr << 3; -+ hi_paddr = eink->ctlstream_paddr >> 29; -+ regmap_write(be, SUN4I_BACKEND_LAYFB_L32ADD_REG(0), lo_paddr); -+ regmap_update_bits(be, SUN4I_BACKEND_LAYFB_H4ADD_REG, -+ SUN4I_BACKEND_LAYFB_H4ADD_MSK(0), -+ SUN4I_BACKEND_LAYFB_H4ADD(0, hi_paddr)); -+ -+ regmap_write(be, SUN4I_BACKEND_ATTCTL_REG0(0), -+ SUN4I_BACKEND_ATTCTL_REG0_LAY_WORKMOD(0) | -+ SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(0) | -+ SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL(3)); -+ -+ regmap_write(be, SUN4I_BACKEND_ATTCTL_REG1(0), -+ SUN4I_BACKEND_LAY_FBFMT_XRGB8888); -+ -+ /* load BE buffers */ -+ regmap_write(be, SUN4I_BACKEND_REGBUFFCTL_REG, -+ SUN4I_BACKEND_REGBUFFCTL_AUTOLOAD_DIS | -+ SUN4I_BACKEND_REGBUFFCTL_LOADCTL); -+ set_bit(EINK_BE_SETUP, eink->flags); -+ } -+ -+ // Setup TCON/TCON0 -+ // -+ // TCON0 timings, allwinner style: -+ // -+ // ht - horizontal total time -+ // - total number of clock cycles in a row -+ // hbp - horizontal back porch -+ // - number of dclk cycles between start of hsync and data -+ // vt - vertical total time -+ // - number of rows in two frames -+ // vbp - vertical back porch -+ // - number of rows between vsync start and a valid data line -+ // hspw -+ // - width of hsync signal (in # of dclk cycles) -+ // vspw -+ // - width of vsync signal (in # of rows) -+ // -+ // Notes: -+ // hbp(aw)=hbp(panel)+hspw(panel) (same for vbp) -+ -+ /* Enable tcon module */ -+ regmap_write(tcon, SUN4I_TCON_GCTL_REG, -+ SUN4I_TCON_GCTL_TCON_ENABLE | -+ SUN4I_TCON_GCTL_IOMAP_TCON0); -+ -+ /* Set the resolution */ -+ regmap_write(tcon, SUN4I_TCON0_BASIC0_REG, -+ SUN4I_TCON0_BASIC0_X(w) | -+ SUN4I_TCON0_BASIC0_Y(h)); -+ -+ /* Set horizontal display timings */ -+ regmap_write(tcon, SUN4I_TCON0_BASIC1_REG, -+ SUN4I_TCON0_BASIC1_H_TOTAL(w + hbp + 2) | -+ SUN4I_TCON0_BASIC1_H_BACKPORCH(hbp)); -+ -+ /* Set vertical display timings */ -+ regmap_write(tcon, SUN4I_TCON0_BASIC2_REG, -+ SUN4I_TCON0_BASIC2_V_TOTAL((h + vbp + 2) * 2) | -+ SUN4I_TCON0_BASIC2_V_BACKPORCH(vbp)); -+ -+ /* Set Hsync and Vsync length */ -+ regmap_write(tcon, SUN4I_TCON0_BASIC3_REG, -+ SUN4I_TCON0_BASIC3_V_SYNC(1) | -+ SUN4I_TCON0_BASIC3_H_SYNC(1)); -+ -+ /* Setup output mode/pins */ -+ regmap_write(tcon, SUN4I_TCON0_HV_IF_REG, 0); // 24bit parallel mode -+ regmap_write(tcon, SUN4I_TCON0_IO_POL_REG, SUN4I_TCON0_IO_POL_DCLK_NEGATIVE); -+ regmap_write(tcon, SUN4I_TCON0_IO_TRI_REG, 0); -+ -+ ret = pinctrl_select_state(eink->pinctrl, eink->pinctrl_active); -+ if (ret) { -+ dev_err(eink->dev, "can't switch to active pinctrl state (%d)", -+ ret); -+ } -+ -+ set_bit(EINK_WAITING_INT, eink->flags); -+ -+ /* Interrupt after h lines */ -+ regmap_write(tcon, SUN4I_TCON_GINT0_REG, 0); -+ regmap_write(tcon, SUN4I_TCON_GINT1_REG, (h + vbp + 2) << 16); -+ //regmap_write(tcon, SUN4I_TCON_GINT0_REG, -+ //SUN4I_TCON_GINT0_VBLANK_ENABLE(0)); -+ regmap_write(tcon, SUN4I_TCON_GINT0_REG, -+ SUN4I_TCON_GINT0_LINE_ENABLE(0)); -+ -+ /* Configure and enable the dot clock */ -+ regmap_write(tcon, SUN4I_TCON0_DCLK_REG, -+ BIT(SUN4I_TCON0_DCLK_GATE_BIT) | -+ (ddiv << SUN4I_TCON0_DCLK_DIV_SHIFT)); -+ -+ /* Enable tcon 0, set clk delay */ -+ regmap_write(tcon, SUN4I_TCON0_CTL_REG, -+ SUN4I_TCON0_CTL_CLK_DELAY(3)); // up to 30 -+ -+ regmap_update_bits(tcon, SUN4I_TCON0_CTL_REG, -+ SUN4I_TCON0_CTL_TCON_ENABLE, -+ SUN4I_TCON0_CTL_TCON_ENABLE); -+ -+ ret = wait_event_timeout(eink->waitqueue, -+ !test_bit(EINK_WAITING_INT, eink->flags), -+ msecs_to_jiffies(100)); -+ if (ret == 0) -+ dev_warn(eink->dev, "Timeout waiting for TCON transfer\n"); -+ -+ // stop everything, cleanup -+ //regmap_write(tcon, SUN4I_TCON0_DCLK_REG, 0); -+ regmap_update_bits(tcon, SUN4I_TCON0_CTL_REG, -+ SUN4I_TCON0_CTL_TCON_ENABLE, -+ 0); -+ //regmap_write(tcon, SUN4I_TCON_GCTL_REG, 0); -+ regmap_write(tcon, SUN4I_TCON_GINT0_REG, 0); -+ regmap_write(tcon, SUN4I_TCON_GINT1_REG, 0); -+ -+ ret = pinctrl_select_state(eink->pinctrl, eink->pinctrl_idle); -+ if (ret) { -+ dev_err(eink->dev, "can't switch to idle pinctrl state (%d)", -+ ret); -+ } -+ -+ regmap_write(tcon, SUN4I_TCON0_IO_TRI_REG, ~0); -+ -+ return ret; -+} -+ -+static void eink_supply_powerdown_timer(struct timer_list *t) -+{ -+ struct eink_dev *eink = from_timer(eink, t, powerdown_timer); -+ -+ //dev_info(eink->dev, "powering down"); -+ -+ spin_lock(&eink->lock); -+ eink->last_request = EINK_REQ_POWERDOWN; -+ spin_unlock(&eink->lock); -+ -+ queue_work(eink->wq, &eink->work); -+} -+ -+static void eink_work_handler(struct work_struct *work) -+{ -+ struct eink_dev *eink = container_of(work, struct eink_dev, work); -+ int last_request; -+ -+ spin_lock(&eink->lock); -+ last_request = eink->last_request; -+ eink->last_request = 0; -+ spin_unlock(&eink->lock); -+ -+ if (last_request == EINK_REQ_UPDATE) { -+ eink_update(eink); -+ } else if (last_request == EINK_REQ_POWERDOWN) { -+ eink_set_power(eink, 0); -+ } -+ -+ clear_bit(EINK_WORKING, eink->flags); -+ wake_up(&eink->waitqueue); -+} -+ -+static ssize_t eink_read(struct file *fp, char __user *buf, size_t len, -+ loff_t *off) -+{ -+ struct eink_dev* eink = fp->private_data; -+ int ret, fb_size; -+ -+ fb_size = eink->panel->sources / 4 * eink->panel->gates; -+ if (len != fb_size) -+ return -EINVAL; -+ -+ spin_lock(&eink->lock); -+ if (copy_to_user(buf, eink->framebuffers[0], fb_size)) -+ ret = -EFAULT; -+ else -+ ret = fb_size; -+ spin_unlock(&eink->lock); -+ -+ return ret; -+} -+ -+static ssize_t eink_write(struct file *fp, const char __user *buf, -+ size_t len, loff_t *off) -+{ -+ struct eink_dev* eink = fp->private_data; -+ int non_blocking = fp->f_flags & O_NONBLOCK; -+ int ret, fb_size; -+ -+ fb_size = eink->panel->sources / 4 * eink->panel->gates; -+ if (len != fb_size) -+ return -EINVAL; -+ -+ if (test_and_set_bit(EINK_WORKING, eink->flags)) -+ return -EBUSY; -+ -+ spin_lock(&eink->lock); -+ ret = copy_from_user(eink->framebuffers[0], buf, len); -+ if (ret) { -+ clear_bit(EINK_WORKING, eink->flags); -+ spin_unlock(&eink->lock); -+ return -EFAULT; -+ } -+ -+ eink->last_request = EINK_REQ_UPDATE; -+ spin_unlock(&eink->lock); -+ -+ queue_work(eink->wq, &eink->work); -+ -+ // first handle non-blocking path -+ if (non_blocking && test_bit(EINK_WORKING, eink->flags)) -+ return -EWOULDBLOCK; -+ -+ // wait for availability of wakeup -+ wait_event(eink->waitqueue, -+ !test_bit(EINK_WORKING, eink->flags)); -+ -+ //u64 ts = ktime_get_boottime_ns(); -+ //print_time(eink->dev, ktime_get_boottime() - ts, "one frame"); -+ -+ return len; -+} -+ -+static unsigned int eink_poll(struct file *fp, poll_table *wait) -+{ -+ struct eink_dev* eink = fp->private_data; -+ int ret = 0; -+ -+ poll_wait(fp, &eink->waitqueue, wait); -+ -+ if (!test_bit(EINK_WORKING, eink->flags)) -+ ret |= POLLIN | POLLRDNORM; -+ -+ return ret; -+} -+ -+static long eink_ioctl(struct file *fp, unsigned int cmd, unsigned long arg) -+{ -+ struct eink_dev* eink = fp->private_data; -+ unsigned long flags; -+ int ret = -ENOSYS; -+ //void __user *parg = (void __user *)arg; -+ -+ if (!capable(CAP_SYS_ADMIN)) -+ return -EACCES; -+ -+ if (test_and_set_bit(EINK_WORKING, eink->flags)) -+ return -EBUSY; -+ -+ spin_lock_irqsave(&eink->lock, flags); -+ -+ switch (cmd) { -+ case EINK_IOCTL_UPDATE: -+ eink->last_request = EINK_REQ_UPDATE; -+ ret = 0; -+ break; -+ /* -+ case EINK_IOCTL_BLANK: -+ eink->last_request = EINK_REQ_BLANK; -+ ret = 0; -+ break; -+ case EINK_IOCTL_STATUS: -+ if (copy_to_user(parg, &powered, sizeof powered)) -+ return -EFAULT; -+ -+ return 0; -+ */ -+ } -+ -+ spin_unlock_irqrestore(&eink->lock, flags); -+ -+ if (ret == 0) -+ queue_work(eink->wq, &eink->work); -+ else -+ clear_bit(EINK_WORKING, eink->flags); -+ -+ return ret; -+} -+ -+static int eink_release(struct inode *ip, struct file *fp) -+{ -+ struct eink_dev* eink = fp->private_data; -+ -+ clear_bit(EINK_OPEN, eink->flags); -+ return 0; -+} -+ -+static int eink_open(struct inode *ip, struct file *fp) -+{ -+ struct eink_dev* eink = container_of(ip->i_cdev, struct eink_dev, cdev); -+ -+ if (test_and_set_bit(EINK_OPEN, eink->flags)) -+ return -EBUSY; -+ -+ fp->private_data = eink; -+ -+ nonseekable_open(ip, fp); -+ return 0; -+} -+ -+static const struct file_operations eink_fops = { -+ .owner = THIS_MODULE, -+ .read = eink_read, -+ .write = eink_write, -+ .poll = eink_poll, -+ .unlocked_ioctl = eink_ioctl, -+ .open = eink_open, -+ .release = eink_release, -+ .llseek = noop_llseek, -+}; -+ -+static struct regmap_config eink_tcon_regmap_config = { -+ .name = "tcon", -+ .reg_bits = 32, -+ .val_bits = 32, -+ .reg_stride = 4, -+ .max_register = 0x7ff, -+ .cache_type = REGCACHE_NONE, -+}; -+ -+static struct regmap_config eink_be_regmap_config = { -+ .name = "be", -+ .reg_bits = 32, -+ .val_bits = 32, -+ .reg_stride = 4, -+ .max_register = 0x57ff, -+ .cache_type = REGCACHE_NONE, -+}; -+ -+static struct class* eink_class; -+ -+static irqreturn_t eink_tcon0_irq_handler(int irq, void *private) -+{ -+ struct eink_dev *eink = private; -+ struct regmap *tcon = eink->tcon_regs; -+ unsigned int status; -+ -+ regmap_read(eink->tcon_regs, SUN4I_TCON_GINT0_REG, &status); -+ -+ if (!(status & (SUN4I_TCON_GINT0_VBLANK_INT(0) | -+ SUN4I_TCON_GINT0_LINE_INT(0)))) -+ return IRQ_NONE; -+ -+ // stop everything -+ //regmap_write(tcon, SUN4I_TCON_GCTL_REG, 0); -+ -+ regmap_update_bits(tcon, SUN4I_TCON0_CTL_REG, -+ SUN4I_TCON0_CTL_TCON_ENABLE, -+ 0); -+ -+ regmap_write(tcon, SUN4I_TCON_GINT0_REG, 0); -+ regmap_write(tcon, SUN4I_TCON_GINT1_REG, 0); -+ //regmap_write(tcon, SUN4I_TCON0_DCLK_REG, 0); -+ //regmap_write(tcon, SUN4I_TCON0_IO_TRI_REG, ~0); -+ -+ clear_bit(EINK_WAITING_INT, eink->flags); -+ wake_up(&eink->waitqueue); -+ -+ /* -+ regmap_update_bits(eink->tcon_regs, SUN4I_TCON_GINT0_REG, -+ SUN4I_TCON_GINT0_VBLANK_INT(0) | -+ SUN4I_TCON_GINT0_LINE_INT(0), -+ 0); -+ */ -+ -+ return IRQ_HANDLED; -+} -+ -+static const struct clk_bulk_data eink_clocks[] = { -+ { .id = "tcon_bus" }, -+ { .id = "tcon_mod" }, -+ { .id = "be_bus" }, -+ { .id = "be_mod" }, -+ { .id = "be_ram" }, -+}; -+ -+static int eink_probe(struct platform_device *pdev) -+{ -+ struct eink_dev *eink; -+ struct device *dev = &pdev->dev; -+ struct device_node *np = dev->of_node; -+ struct device *sdev; -+ const char* cdev_name = NULL; -+ void __iomem *tcon_regs, *be_regs; -+ int ret, i, fb_size, cs_size; -+ -+ eink = devm_kzalloc(dev, sizeof(*eink), GFP_KERNEL); -+ if (!eink) -+ return -ENOMEM; -+ -+ eink->panel = &eink_ed060xd4_panel; -+ fb_size = eink->panel->sources / 4 * eink->panel->gates; -+ -+ // we shift four 2-bit source values per clock cycle -+ cs_size = ((eink->panel->sources / 4 + eink->panel->h_lead + eink->panel->h_trail) * -+ (eink->panel->gates + eink->panel->v_extra)) * 4; -+ -+ eink->framebuffers[0] = devm_kzalloc(dev, fb_size, GFP_KERNEL); -+ if (!eink->framebuffers[0]) -+ return -ENOMEM; -+ -+ eink->framebuffers[1] = devm_kzalloc(dev, fb_size, GFP_KERNEL); -+ if (!eink->framebuffers[1]) -+ return -ENOMEM; -+ -+ eink->dev = dev; -+ platform_set_drvdata(pdev, eink); -+ init_waitqueue_head(&eink->waitqueue); -+ spin_lock_init(&eink->lock); -+ INIT_WORK(&eink->work, &eink_work_handler); -+ timer_setup(&eink->powerdown_timer, eink_supply_powerdown_timer, 0); -+ -+ ret = of_dma_configure(dev, dev->of_node, true); -+ if (ret) { -+ dev_err(dev, "failed to configure dma (%d)\n", ret); -+ return ret; -+ } -+ -+ tcon_regs = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(tcon_regs)) -+ return PTR_ERR(tcon_regs); -+ -+ be_regs = devm_platform_ioremap_resource(pdev, 1); -+ if (IS_ERR(be_regs)) -+ return PTR_ERR(be_regs); -+ -+ eink->pinctrl = devm_pinctrl_get(dev); -+ if (IS_ERR(eink->pinctrl)) { -+ ret = PTR_ERR(eink->pinctrl); -+ dev_err(dev, "can't get pinctrl (%d)\n", ret); -+ return ret; -+ } -+ -+ eink->pinctrl_active = pinctrl_lookup_state(eink->pinctrl, "active"); -+ if (!eink->pinctrl_active) { -+ dev_err(dev, "missing active pinctrl state"); -+ return -EINVAL; -+ } -+ -+ eink->pinctrl_idle = pinctrl_lookup_state(eink->pinctrl, "idle"); -+ if (!eink->pinctrl_idle) { -+ dev_err(dev, "missing idle pinctrl state"); -+ return -EINVAL; -+ } -+ -+ ret = pinctrl_select_state(eink->pinctrl, eink->pinctrl_idle); -+ if (ret) { -+ dev_err(eink->dev, "can't switch to idle pinctrl state (%d)", -+ ret); -+ return ret; -+ } -+ -+ eink->gpios = devm_gpiod_get_array(dev, "all", GPIOD_OUT_LOW); -+ if (IS_ERR(eink->gpios)) { -+ ret = PTR_ERR(eink->gpios); -+ dev_err(dev, "can't get all gpios (%d)\n", ret); -+ return ret; -+ } -+ -+ eink->irq = platform_get_irq(pdev, 0); -+ if (eink->irq < 0) { -+ dev_err(dev, "Couldn't retrieve the TCON interrupt\n"); -+ return eink->irq; -+ } -+ -+ ret = of_property_read_string(np, "control-device-name", &cdev_name); -+ if (ret) { -+ dev_err(dev, "char-device-name is not configured (%d)\n", ret); -+ return ret; -+ } -+ -+ eink->panel_supply = devm_regulator_get(dev, "panel"); -+ if (IS_ERR(eink->panel_supply)) { -+ ret = PTR_ERR(eink->panel_supply); -+ dev_err(dev, "can't get panel supply (%d)\n", ret); -+ return ret; -+ } -+ -+ eink->clks = devm_kmemdup(dev, eink_clocks, sizeof(eink_clocks), -+ GFP_KERNEL); -+ if (!eink->clks) -+ return -ENOMEM; -+ -+ eink->num_clks = ARRAY_SIZE(eink_clocks); -+ ret = devm_clk_bulk_get(dev, eink->num_clks, eink->clks); -+ if (ret) -+ return ret; -+ -+ eink->rstc = devm_reset_control_array_get(dev, false, false); -+ if (IS_ERR(eink->rstc)) { -+ ret = PTR_ERR(eink->rstc); -+ dev_err(dev, "Couldn't get our reset line (%d)\n", ret); -+ return ret; -+ } -+ -+ eink->tcon_regs = devm_regmap_init_mmio(dev, tcon_regs, &eink_tcon_regmap_config); -+ if (IS_ERR(eink->tcon_regs)) { -+ ret = PTR_ERR(eink->tcon_regs); -+ dev_err(dev, "Couldn't create the TCON regmap (%d)\n", ret); -+ return ret; -+ } -+ -+ eink->be_regs = devm_regmap_init_mmio(dev, be_regs, &eink_be_regmap_config); -+ if (IS_ERR(eink->be_regs)) { -+ ret = PTR_ERR(eink->be_regs); -+ dev_err(dev, "Couldn't create the BE regmap (%d)\n", ret); -+ return ret; -+ } -+ -+ // init the actual hardware -+ ret = reset_control_deassert(eink->rstc); -+ if (ret) { -+ dev_err(dev, "Couldn't deassert our reset line (%d)\n", ret); -+ return ret; -+ } -+ -+ // possible to set 27-381MHz in 3MHz steps -+ ret = clk_set_rate(eink->clks[1].clk, 120000000); -+ if (ret) { -+ dev_err(dev, "Couldn't set tcon0 rate to (%d)\n", ret); -+ goto err_reset; -+ } -+ -+ ret = clk_bulk_prepare_enable(eink->num_clks, eink->clks); -+ if (ret) { -+ dev_err(dev, "Couldn't enable clocks (%d)\n", ret); -+ goto err_reset; -+ } -+ -+ /* Clear DEBE registers */ -+ for (i = 0x800; i < 0x1000; i += 4) -+ regmap_write(eink->be_regs, i, 0); -+ -+ /* Disable registers autoloading */ -+ regmap_write(eink->be_regs, -+ SUN4I_BACKEND_REGBUFFCTL_REG, -+ SUN4I_BACKEND_REGBUFFCTL_AUTOLOAD_DIS); -+ -+ regmap_write(eink->be_regs, -+ SUN4I_BACKEND_MODCTL_REG, -+ SUN4I_BACKEND_MODCTL_START_CTL); -+ -+ /* Enable the backend */ -+ regmap_write(eink->be_regs, -+ SUN4I_BACKEND_MODCTL_REG, -+ SUN4I_BACKEND_MODCTL_DEBE_EN | -+ SUN4I_BACKEND_MODCTL_START_CTL | -+ SUN4I_BACKEND_MODCTL_OUT_LCD0 | -+ SUN4I_BACKEND_MODCTL_LAY_EN(0)); -+ -+ /* Make sure the TCON is disabled and all IRQs are off */ -+ regmap_write(eink->tcon_regs, SUN4I_TCON_GCTL_REG, 0); -+ regmap_write(eink->tcon_regs, SUN4I_TCON_GINT0_REG, 0); -+ regmap_write(eink->tcon_regs, SUN4I_TCON_GINT1_REG, 0); -+ -+ /* Disable IO lines and set them to tristate */ -+ regmap_write(eink->tcon_regs, SUN4I_TCON0_IO_TRI_REG, ~0); -+ -+ ret = devm_request_irq(dev, eink->irq, eink_tcon0_irq_handler, 0, -+ dev_name(dev), eink); -+ if (ret) { -+ dev_err(dev, "Couldn't request the IRQ\n"); -+ goto err_disable_hw; -+ } -+ -+ // create char device -+ ret = alloc_chrdev_region(&eink->major, 0, 1, "eink"); -+ if (ret) { -+ dev_err(dev, "can't allocate chrdev region"); -+ goto err_disable_hw; -+ } -+ -+ cdev_init(&eink->cdev, &eink_fops); -+ eink->cdev.owner = THIS_MODULE; -+ ret = cdev_add(&eink->cdev, eink->major, 1); -+ if (ret) { -+ dev_err(dev, "can't add cdev"); -+ goto err_unreg_chrev_region; -+ } -+ -+ sdev = device_create(eink_class, dev, eink->major, eink, cdev_name); -+ if (IS_ERR(sdev)) { -+ ret = PTR_ERR(sdev); -+ goto err_del_cdev; -+ } -+ -+ eink->ctlstream_size = round_up(cs_size, PAGE_SIZE); -+ eink->ctlstream = dma_alloc_wc(dev, eink->ctlstream_size, -+ &eink->ctlstream_paddr, -+ GFP_KERNEL | __GFP_NOWARN); -+ if (!eink->ctlstream) { -+ ret = -ENOMEM; -+ dev_err(dev, "failed to allocate buffer with size %zu\n", -+ eink->ctlstream_size); -+ goto err_destroy_device; -+ } -+ -+ eink_ctlstream_prepare(eink); -+ -+ eink->wq = alloc_workqueue("eink", WQ_SYSFS | WQ_HIGHPRI, 0); -+ if (!eink->wq) { -+ ret = -ENOMEM; -+ dev_err(dev, "failed to allocate workqueue\n"); -+ goto err_free_dma; -+ } -+ -+ dev_info(dev, "eink-panel driver ready!\n"); -+ return 0; -+ -+err_free_dma: -+ dma_free_wc(eink->dev, eink->ctlstream_size, eink->ctlstream, -+ eink->ctlstream_paddr); -+err_destroy_device: -+ device_destroy(eink_class, eink->major); -+err_del_cdev: -+ cdev_del(&eink->cdev); -+err_unreg_chrev_region: -+ unregister_chrdev(eink->major, "eink"); -+err_disable_hw: -+ clk_bulk_disable_unprepare(eink->num_clks, eink->clks); -+err_reset: -+ reset_control_assert(eink->rstc); -+ cancel_work_sync(&eink->work); -+ -+ return ret; -+} -+ -+static int eink_remove(struct platform_device *pdev) -+{ -+ struct eink_dev *eink = platform_get_drvdata(pdev); -+ -+ eink_set_power(eink, 0); -+ -+ del_timer_sync(&eink->powerdown_timer); -+ cancel_work_sync(&eink->work); -+ destroy_workqueue(eink->wq); -+ -+ dma_free_wc(eink->dev, eink->ctlstream_size, eink->ctlstream, -+ eink->ctlstream_paddr); -+ -+ clk_bulk_disable_unprepare(eink->num_clks, eink->clks); -+ reset_control_assert(eink->rstc); -+ -+ device_destroy(eink_class, eink->major); -+ cdev_del(&eink->cdev); -+ unregister_chrdev(eink->major, "eink"); -+ -+ return 0; -+} -+ -+static const struct of_device_id eink_of_match[] = { -+ { .compatible = "custom,pocketbook-touch-lux-3-tcon0-ed060xd4-display" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, eink_of_match); -+ -+static struct platform_driver eink_platform_driver = { -+ .probe = eink_probe, -+ .remove = eink_remove, -+ .driver = { -+ .name = "eink_tcon0", -+ .of_match_table = eink_of_match, -+ }, -+}; -+ -+static int __init eink_driver_init(void) -+{ -+ int ret; -+ -+ eink_class = class_create(THIS_MODULE, "eink-panel"); -+ -+ ret = platform_driver_register(&eink_platform_driver); -+ if (ret) -+ class_destroy(eink_class); -+ -+ return ret; -+} -+ -+static void __exit eink_driver_exit(void) -+{ -+ platform_driver_unregister(&eink_platform_driver); -+ class_destroy(eink_class); -+} -+ -+module_init(eink_driver_init); -+module_exit(eink_driver_exit); -+ -+MODULE_VERSION("1.0.0"); -+MODULE_DESCRIPTION("eInk display Allwinner TCON0 based bit-banging driver"); -+MODULE_AUTHOR("Ondrej Jirman "); -+MODULE_LICENSE("GPL v2"); -diff --git a/include/linux/mfd/ac100.h b/include/linux/mfd/ac100.h -index 88005c3a1b2d..621bd10b79b2 100644 ---- a/include/linux/mfd/ac100.h -+++ b/include/linux/mfd/ac100.h -@@ -80,6 +80,7 @@ struct ac100_dev { - #define AC100_ERPOUT_CTRL 0x57 - #define AC100_SPKOUT_CTRL 0x58 - #define AC100_LINEOUT_CTRL 0x59 -+#define AC100_ADDA_TUNE1 0x5a - - /* ADC digital audio processing (high pass filter & auto gain control */ - #define AC100_ADC_DAP_L_STA 0x80 -diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h -index fd5957c042da..00967b50f33f 100644 ---- a/include/linux/mfd/axp20x.h -+++ b/include/linux/mfd/axp20x.h -@@ -130,6 +130,7 @@ enum axp20x_variants { - - /* Other DCDC regulator control registers are the same as AXP803 */ - #define AXP813_DCDC7_V_OUT 0x26 -+#define AXP813_CHRG_CTRL3 0x35 - - /* Interrupt */ - #define AXP152_IRQ1_EN 0x40 -diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h -index ea0ccf33a459..021f820f9d52 100644 ---- a/include/linux/mfd/sun4i-gpadc.h -+++ b/include/linux/mfd/sun4i-gpadc.h -@@ -81,8 +81,8 @@ - #define SUN4I_GPADC_TEMP_DATA 0x20 - #define SUN4I_GPADC_DATA 0x24 - --#define SUN4I_GPADC_IRQ_FIFO_DATA 0 --#define SUN4I_GPADC_IRQ_TEMP_DATA 1 -+#define SUN4I_GPADC_IRQ_FIFO_DATA 1 -+#define SUN4I_GPADC_IRQ_TEMP_DATA 2 - - /* 10s delay before suspending the IP */ - #define SUN4I_GPADC_AUTOSUSPEND_DELAY 10000 -diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h -index d13958de6d8a..6be370720e26 100644 ---- a/include/linux/mtd/spi-nor.h -+++ b/include/linux/mtd/spi-nor.h -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - - /* - * Note on opcode nomenclature: some opcodes have a format like -@@ -413,6 +414,8 @@ struct spi_nor { - struct spi_mem_dirmap_desc *wdesc; - } dirmap; - -+ struct regulator* reg_vdd; -+ - void *priv; - }; - -diff --git a/include/linux/platform_data/cyttsp4.h b/include/linux/platform_data/cyttsp4.h -index 5dc9d2be384b..e69de29bb2d1 100644 ---- a/include/linux/platform_data/cyttsp4.h -+++ b/include/linux/platform_data/cyttsp4.h -@@ -1,62 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0-only */ --/* -- * Header file for: -- * Cypress TrueTouch(TM) Standard Product (TTSP) touchscreen drivers. -- * For use with Cypress Txx3xx parts. -- * Supported parts include: -- * CY8CTST341 -- * CY8CTMA340 -- * -- * Copyright (C) 2009, 2010, 2011 Cypress Semiconductor, Inc. -- * Copyright (C) 2012 Javier Martinez Canillas -- * -- * Contact Cypress Semiconductor at www.cypress.com (kev@cypress.com) -- */ --#ifndef _CYTTSP4_H_ --#define _CYTTSP4_H_ -- --#define CYTTSP4_MT_NAME "cyttsp4_mt" --#define CYTTSP4_I2C_NAME "cyttsp4_i2c_adapter" --#define CYTTSP4_SPI_NAME "cyttsp4_spi_adapter" -- --#define CY_TOUCH_SETTINGS_MAX 32 -- --struct touch_framework { -- const uint16_t *abs; -- uint8_t size; -- uint8_t enable_vkeys; --} __packed; -- --struct cyttsp4_mt_platform_data { -- struct touch_framework *frmwrk; -- unsigned short flags; -- char const *inp_dev_name; --}; -- --struct touch_settings { -- const uint8_t *data; -- uint32_t size; -- uint8_t tag; --} __packed; -- --struct cyttsp4_core_platform_data { -- int irq_gpio; -- int rst_gpio; -- int level_irq_udelay; -- int (*xres)(struct cyttsp4_core_platform_data *pdata, -- struct device *dev); -- int (*init)(struct cyttsp4_core_platform_data *pdata, -- int on, struct device *dev); -- int (*power)(struct cyttsp4_core_platform_data *pdata, -- int on, struct device *dev, atomic_t *ignore_irq); -- int (*irq_stat)(struct cyttsp4_core_platform_data *pdata, -- struct device *dev); -- struct touch_settings *sett[CY_TOUCH_SETTINGS_MAX]; --}; -- --struct cyttsp4_platform_data { -- struct cyttsp4_core_platform_data *core_pdata; -- struct cyttsp4_mt_platform_data *mt_pdata; --}; -- --#endif /* _CYTTSP4_H_ */ -diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h -index 81a55e974feb..5dcaad0fac8c 100644 ---- a/include/linux/power_supply.h -+++ b/include/linux/power_supply.h -@@ -159,6 +159,8 @@ enum power_supply_property { - POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, - POWER_SUPPLY_PROP_TIME_TO_FULL_AVG, - POWER_SUPPLY_PROP_TYPE, /* use power_supply.type instead */ -+ POWER_SUPPLY_PROP_USB_BC_ENABLED, -+ POWER_SUPPLY_PROP_USB_DCP_INPUT_CURRENT_LIMIT, - POWER_SUPPLY_PROP_USB_TYPE, - POWER_SUPPLY_PROP_SCOPE, - POWER_SUPPLY_PROP_PRECHARGE_CURRENT, -diff --git a/include/linux/scpi_protocol.h b/include/linux/scpi_protocol.h -index afbf8037d8db..116559c7fa6f 100644 ---- a/include/linux/scpi_protocol.h -+++ b/include/linux/scpi_protocol.h -@@ -68,6 +68,7 @@ struct scpi_ops { - int (*sensor_get_value)(u16, u64 *); - int (*device_get_power_state)(u16); - int (*device_set_power_state)(u16, u8); -+ int (*sys_set_power_state)(u8); - }; - - #if IS_REACHABLE(CONFIG_ARM_SCPI_PROTOCOL) -diff --git a/include/uapi/drm/lima_drm.h b/include/uapi/drm/lima_drm.h -index 1ec58d652a5a..3e699bb78394 100644 ---- a/include/uapi/drm/lima_drm.h -+++ b/include/uapi/drm/lima_drm.h -@@ -37,7 +37,12 @@ struct drm_lima_get_param { - * due to lack of heap memory. size field of heap buffer is an up bound of - * the backup memory which can be set to a fairly large value. - */ --#define LIMA_BO_FLAG_HEAP (1 << 0) -+#define LIMA_BO_FLAG_HEAP (1 << 0) -+/* -+ * force buffer GPU virtual address to be drm_lima_gem_create.va, this is -+ * used to replay some task with fixed GPU virtual address -+ */ -+#define LIMA_BO_FLAG_FORCE_VA (1 << 1) - - /** - * create a buffer for used by GPU -@@ -46,7 +51,7 @@ struct drm_lima_gem_create { - __u32 size; /* in, buffer size */ - __u32 flags; /* in, buffer flags */ - __u32 handle; /* out, GEM buffer handle */ -- __u32 pad; /* pad, must be zero */ -+ __u32 va; /* in, buffer va */ - }; - - /** -diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c -index 67668be3461e..9c8c9f215804 100644 ---- a/net/bluetooth/hci_event.c -+++ b/net/bluetooth/hci_event.c -@@ -700,7 +700,9 @@ static void hci_cc_read_local_ext_features(struct hci_dev *hdev, - if (rp->status) - return; - -- if (hdev->max_page < rp->max_page) -+ if (!test_bit(HCI_QUIRK_BROKEN_LOCAL_EXT_FTR_MAX_PAGE, -+ &hdev->quirks) && -+ hdev->max_page < rp->max_page) - hdev->max_page = rp->max_page; - - if (rp->page < HCI_MAX_PAGES) -diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig -index 9bf6bfdaf11e..05863d0348f2 100644 ---- a/sound/soc/codecs/Kconfig -+++ b/sound/soc/codecs/Kconfig -@@ -787,6 +787,9 @@ config SND_SOC_HDMI_CODEC - select SND_PCM_IEC958 - select HDMI - -+config SND_SOC_EC25 -+ tristate "EC25 LTE module CODEC" -+ - config SND_SOC_ES7134 - tristate "Everest Semi ES7134 CODEC" - -diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile -index d277f0366e09..e527abe5ba5c 100644 ---- a/sound/soc/codecs/Makefile -+++ b/sound/soc/codecs/Makefile -@@ -87,6 +87,7 @@ snd-soc-da7219-objs := da7219.o da7219-aad.o - snd-soc-da732x-objs := da732x.o - snd-soc-da9055-objs := da9055.o - snd-soc-dmic-objs := dmic.o -+snd-soc-ec25-objs := ec25.o - snd-soc-es7134-objs := es7134.o - snd-soc-es7241-objs := es7241.o - snd-soc-es8316-objs := es8316.o -@@ -404,6 +405,7 @@ obj-$(CONFIG_SND_SOC_DA7219) += snd-soc-da7219.o - obj-$(CONFIG_SND_SOC_DA732X) += snd-soc-da732x.o - obj-$(CONFIG_SND_SOC_DA9055) += snd-soc-da9055.o - obj-$(CONFIG_SND_SOC_DMIC) += snd-soc-dmic.o -+obj-$(CONFIG_SND_SOC_EC25) += snd-soc-ec25.o - obj-$(CONFIG_SND_SOC_ES7134) += snd-soc-es7134.o - obj-$(CONFIG_SND_SOC_ES7241) += snd-soc-es7241.o - obj-$(CONFIG_SND_SOC_ES8316) += snd-soc-es8316.o -diff --git a/sound/soc/codecs/bt-sco.c b/sound/soc/codecs/bt-sco.c -index 4d286844e3c8..ecb73d119a5b 100644 ---- a/sound/soc/codecs/bt-sco.c -+++ b/sound/soc/codecs/bt-sco.c -@@ -17,7 +17,9 @@ static const struct snd_soc_dapm_widget bt_sco_widgets[] = { - - static const struct snd_soc_dapm_route bt_sco_routes[] = { - { "Capture", NULL, "RX" }, -+ { "Wideband Capture", NULL, "RX" }, - { "TX", NULL, "Playback" }, -+ { "TX", NULL, "Wideband Playback" }, - }; - - static struct snd_soc_dai_driver bt_sco_dai[] = { -@@ -41,14 +43,14 @@ static struct snd_soc_dai_driver bt_sco_dai[] = { - { - .name = "bt-sco-pcm-wb", - .playback = { -- .stream_name = "Playback", -+ .stream_name = "Wideband Playback", - .channels_min = 1, - .channels_max = 1, - .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, - .formats = SNDRV_PCM_FMTBIT_S16_LE, - }, - .capture = { -- .stream_name = "Capture", -+ .stream_name = "Wideband Capture", - .channels_min = 1, - .channels_max = 1, - .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, -diff --git a/sound/soc/codecs/ec25.c b/sound/soc/codecs/ec25.c -new file mode 100644 -index 000000000000..7c96aa7a79d0 ---- /dev/null -+++ b/sound/soc/codecs/ec25.c -@@ -0,0 +1,95 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+ -+#include -+#include -+ -+static const struct snd_soc_dapm_widget ec25_dapm_widgets[] = { -+ SND_SOC_DAPM_OUTPUT("AOUT"), -+ SND_SOC_DAPM_INPUT("AIN"), -+}; -+ -+static const struct snd_soc_dapm_route ec25_dapm_routes[] = { -+ { "AOUT", NULL, "Playback" }, -+ { "AOUT", NULL, "Wideband Playback" }, -+ { "Capture", NULL, "AIN" }, -+ { "Wideband Capture", NULL, "AIN" }, -+}; -+ -+static const struct snd_soc_component_driver ec25_component_driver = { -+ .dapm_widgets = ec25_dapm_widgets, -+ .num_dapm_widgets = ARRAY_SIZE(ec25_dapm_widgets), -+ .dapm_routes = ec25_dapm_routes, -+ .num_dapm_routes = ARRAY_SIZE(ec25_dapm_routes), -+ .endianness = 1, -+ .non_legacy_dai_naming = 1, -+}; -+ -+static struct snd_soc_dai_driver ec25_dais[] = { -+ { -+ .name = "ec25", -+ .capture = { -+ .stream_name = "Capture", -+ .channels_min = 1, -+ .channels_max = 1, -+ .rates = SNDRV_PCM_RATE_8000, -+ .formats = SNDRV_PCM_FMTBIT_S16_LE, -+ }, -+ .playback = { -+ .stream_name = "Playback", -+ .channels_min = 1, -+ .channels_max = 1, -+ .rates = SNDRV_PCM_RATE_8000, -+ .formats = SNDRV_PCM_FMTBIT_S16_LE, -+ }, -+ .symmetric_rates = 1, -+ .symmetric_channels = 1, -+ .symmetric_samplebits = 1, -+ }, -+ { -+ .name = "ec25-wb", -+ .capture = { -+ .stream_name = "Wideband Capture", -+ .channels_min = 1, -+ .channels_max = 1, -+ .rates = SNDRV_PCM_RATE_16000, -+ .formats = SNDRV_PCM_FMTBIT_S16_LE, -+ }, -+ .playback = { -+ .stream_name = "Wideband Playback", -+ .channels_min = 1, -+ .channels_max = 1, -+ .rates = SNDRV_PCM_RATE_16000, -+ .formats = SNDRV_PCM_FMTBIT_S16_LE, -+ }, -+ .symmetric_rates = 1, -+ .symmetric_channels = 1, -+ .symmetric_samplebits = 1, -+ }, -+}; -+ -+static int ec25_codec_probe(struct platform_device *pdev) -+{ -+ return devm_snd_soc_register_component(&pdev->dev, &ec25_component_driver, -+ ec25_dais, ARRAY_SIZE(ec25_dais)); -+} -+ -+static const struct of_device_id ec25_codec_of_match[] = { -+ { .compatible = "quectel,ec25", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, ec25_codec_of_match); -+ -+static struct platform_driver ec25_codec_driver = { -+ .driver = { -+ .name = "ec25", -+ .of_match_table = of_match_ptr(ec25_codec_of_match), -+ }, -+ .probe = ec25_codec_probe, -+}; -+ -+module_platform_driver(ec25_codec_driver); -+ -+MODULE_DESCRIPTION("ASoC ec25 driver"); -+MODULE_AUTHOR("Samuel Holland "); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:ec25"); -diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig -index ddcaaa98d3cb..bcd947bb112b 100644 ---- a/sound/soc/sunxi/Kconfig -+++ b/sound/soc/sunxi/Kconfig -@@ -16,12 +16,25 @@ config SND_SUN8I_CODEC - depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST - depends on COMMON_CLK - select REGMAP_MMIO -+ select MFD_AC100 - help - This option enables the digital part of the internal audio codec for -- Allwinner sun8i SoC (and particularly A33). -+ Allwinner sun8i SoC (and particularly A33). It also supports digital -+ part of X-Powers AC100. - - Say Y or M if you want to add sun8i digital audio codec support. - -+config SND_AC100_CODEC -+ tristate "Allwinner (X-Powers) AC100 audio codec (analog part)" -+ depends on OF -+ depends on MACH_SUN8I || COMPILE_TEST -+ select MFD_AC100 -+ help -+ This option enables the audio codec support for Allwinner (X-Powers) -+ AC100 chip. -+ -+ Say Y or M if you want to add AC100 audio codec support. -+ - config SND_SUN8I_CODEC_ANALOG - tristate "Allwinner sun8i Codec Analog Controls Support" - depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST -diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile -index a86be340a076..dbae27074df3 100644 ---- a/sound/soc/sunxi/Makefile -+++ b/sound/soc/sunxi/Makefile -@@ -6,3 +6,4 @@ obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o - obj-$(CONFIG_SND_SUN50I_CODEC_ANALOG) += sun50i-codec-analog.o - obj-$(CONFIG_SND_SUN8I_CODEC) += sun8i-codec.o - obj-$(CONFIG_SND_SUN8I_ADDA_PR_REGMAP) += sun8i-adda-pr-regmap.o -+obj-$(CONFIG_SND_AC100_CODEC) += ac100-codec.o -diff --git a/sound/soc/sunxi/ac100-codec.c b/sound/soc/sunxi/ac100-codec.c -new file mode 100644 -index 000000000000..df18b0afcc62 ---- /dev/null -+++ b/sound/soc/sunxi/ac100-codec.c -@@ -0,0 +1,1002 @@ -+/* -+ * This driver supports the controls for X-Powers (Allwinner) -+ * AC100 audio codec. This codec is co-packaged with AXP81x PMICs. -+ * -+ * (C) Copyright 2020 Ondrej Jirman -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#define AC100_ADC_APC_CTRL_ADCR_EN_OFF 15 -+#define AC100_ADC_APC_CTRL_ADCR_EN_MASK BIT(15) -+#define AC100_ADC_APC_CTRL_ADCR_EN_DISABLED 0 -+#define AC100_ADC_APC_CTRL_ADCR_EN_ENABLED BIT(15) -+#define AC100_ADC_APC_CTRL_ADCR_GAIN_OFF 12 -+#define AC100_ADC_APC_CTRL_ADCR_GAIN(v) (((v) & 0x7) << 12) -+#define AC100_ADC_APC_CTRL_ADCL_EN_OFF 11 -+#define AC100_ADC_APC_CTRL_ADCL_EN_MASK BIT(11) -+#define AC100_ADC_APC_CTRL_ADCL_EN_DISABLED 0 -+#define AC100_ADC_APC_CTRL_ADCL_EN_ENABLED BIT(11) -+#define AC100_ADC_APC_CTRL_ADCL_GAIN_OFF 8 -+#define AC100_ADC_APC_CTRL_ADCL_GAIN(v) (((v) & 0x7) << 8) -+#define AC100_ADC_APC_CTRL_MBIAS_EN_OFF 7 -+#define AC100_ADC_APC_CTRL_MBIAS_EN_MASK BIT(7) -+#define AC100_ADC_APC_CTRL_MBIAS_EN_DISABLED 0 -+#define AC100_ADC_APC_CTRL_MBIAS_EN_ENABLED BIT(7) -+#define AC100_ADC_APC_CTRL_MMIC_BIAS_CHOPPER_EN_OFF 6 -+#define AC100_ADC_APC_CTRL_MMIC_BIAS_CHOPPER_EN_MASK BIT(6) -+#define AC100_ADC_APC_CTRL_MMIC_BIAS_CHOPPER_EN_DISABLED 0 -+#define AC100_ADC_APC_CTRL_MMIC_BIAS_CHOPPER_EN_ENABLED BIT(6) -+#define AC100_ADC_APC_CTRL_MMIC_BIAS_CHOPPER_CKS_OFF 4 -+#define AC100_ADC_APC_CTRL_MMIC_BIAS_CHOPPER_CKS_MASK GENMASK(5, 4) -+#define AC100_ADC_APC_CTRL_MMIC_BIAS_CHOPPER_CKS_250K (0x0 << 4) -+#define AC100_ADC_APC_CTRL_MMIC_BIAS_CHOPPER_CKS_500K (0x1 << 4) -+#define AC100_ADC_APC_CTRL_MMIC_BIAS_CHOPPER_CKS_1M (0x2 << 4) -+#define AC100_ADC_APC_CTRL_MMIC_BIAS_CHOPPER_CKS_2M (0x3 << 4) -+#define AC100_ADC_APC_CTRL_HBIAS_MODE_OFF 2 -+#define AC100_ADC_APC_CTRL_HBIAS_MODE_MASK BIT(2) -+#define AC100_ADC_APC_CTRL_HBIAS_MODE_LOAD 0 -+#define AC100_ADC_APC_CTRL_HBIAS_MODE_HBIAS_EN BIT(2) -+#define AC100_ADC_APC_CTRL_HBIAS_EN_OFF 1 -+#define AC100_ADC_APC_CTRL_HBIAS_EN_MASK BIT(1) -+#define AC100_ADC_APC_CTRL_HBIAS_EN_DISABLED 0 -+#define AC100_ADC_APC_CTRL_HBIAS_EN_ENABLED BIT(1) -+#define AC100_ADC_APC_CTRL_HBIAS_ADC_EN_OFF 0 -+#define AC100_ADC_APC_CTRL_HBIAS_ADC_EN_MASK BIT(0) -+#define AC100_ADC_APC_CTRL_HBIAS_ADC_EN_DISABLED 0 -+#define AC100_ADC_APC_CTRL_HBIAS_ADC_EN_ENABLED BIT(0) -+ -+#define AC100_ADC_SRC_ADCR_MIC1_BOOST_OFF 13 -+#define AC100_ADC_SRC_ADCR_MIC1_BOOST_MASK BIT(13) -+#define AC100_ADC_SRC_ADCR_MIC1_BOOST_DISABLED 0 -+#define AC100_ADC_SRC_ADCR_MIC1_BOOST_ENABLED BIT(13) -+#define AC100_ADC_SRC_ADCR_MIC2_BOOST_OFF 12 -+#define AC100_ADC_SRC_ADCR_MIC2_BOOST_MASK BIT(12) -+#define AC100_ADC_SRC_ADCR_MIC2_BOOST_DISABLED 0 -+#define AC100_ADC_SRC_ADCR_MIC2_BOOST_ENABLED BIT(12) -+#define AC100_ADC_SRC_ADCR_LINEINL_LINEINR_OFF 11 -+#define AC100_ADC_SRC_ADCR_LINEINL_LINEINR_MASK BIT(11) -+#define AC100_ADC_SRC_ADCR_LINEINL_LINEINR_DISABLED 0 -+#define AC100_ADC_SRC_ADCR_LINEINL_LINEINR_ENABLED BIT(11) -+#define AC100_ADC_SRC_ADCR_LINEINR_OFF 10 -+#define AC100_ADC_SRC_ADCR_LINEINR_MASK BIT(10) -+#define AC100_ADC_SRC_ADCR_LINEINR_DISABLED 0 -+#define AC100_ADC_SRC_ADCR_LINEINR_ENABLED BIT(10) -+#define AC100_ADC_SRC_ADCR_AUXINR_OFF 9 -+#define AC100_ADC_SRC_ADCR_AUXINR_MASK BIT(9) -+#define AC100_ADC_SRC_ADCR_AUXINR_DISABLED 0 -+#define AC100_ADC_SRC_ADCR_AUXINR_ENABLED BIT(9) -+#define AC100_ADC_SRC_ADCR_ROUTMIX_OFF 8 -+#define AC100_ADC_SRC_ADCR_ROUTMIX_MASK BIT(8) -+#define AC100_ADC_SRC_ADCR_ROUTMIX_DISABLED 0 -+#define AC100_ADC_SRC_ADCR_ROUTMIX_ENABLED BIT(8) -+#define AC100_ADC_SRC_ADCR_LOUTMIX_OFF 7 -+#define AC100_ADC_SRC_ADCR_LOUTMIX_MASK BIT(7) -+#define AC100_ADC_SRC_ADCR_LOUTMIX_DISABLED 0 -+#define AC100_ADC_SRC_ADCR_LOUTMIX_ENABLED BIT(7) -+#define AC100_ADC_SRC_ADCL_MIC1_BOOST_OFF 6 -+#define AC100_ADC_SRC_ADCL_MIC1_BOOST_MASK BIT(6) -+#define AC100_ADC_SRC_ADCL_MIC1_BOOST_DISABLED 0 -+#define AC100_ADC_SRC_ADCL_MIC1_BOOST_ENABLED BIT(6) -+#define AC100_ADC_SRC_ADCL_MIC2_BOOST_OFF 5 -+#define AC100_ADC_SRC_ADCL_MIC2_BOOST_MASK BIT(5) -+#define AC100_ADC_SRC_ADCL_MIC2_BOOST_DISABLED 0 -+#define AC100_ADC_SRC_ADCL_MIC2_BOOST_ENABLED BIT(5) -+#define AC100_ADC_SRC_ADCL_LINEINL_LINEINR_OFF 4 -+#define AC100_ADC_SRC_ADCL_LINEINL_LINEINR_MASK BIT(4) -+#define AC100_ADC_SRC_ADCL_LINEINL_LINEINR_DISABLED 0 -+#define AC100_ADC_SRC_ADCL_LINEINL_LINEINR_ENABLED BIT(4) -+#define AC100_ADC_SRC_ADCL_LINEINL_OFF 3 -+#define AC100_ADC_SRC_ADCL_LINEINL_MASK BIT(3) -+#define AC100_ADC_SRC_ADCL_LINEINL_DISABLED 0 -+#define AC100_ADC_SRC_ADCL_LINEINL_ENABLED BIT(3) -+#define AC100_ADC_SRC_ADCL_AUXINL_OFF 2 -+#define AC100_ADC_SRC_ADCL_AUXINL_MASK BIT(2) -+#define AC100_ADC_SRC_ADCL_AUXINL_DISABLED 0 -+#define AC100_ADC_SRC_ADCL_AUXINL_ENABLED BIT(2) -+#define AC100_ADC_SRC_ADCL_LOUTMIX_OFF 1 -+#define AC100_ADC_SRC_ADCL_LOUTMIX_MASK BIT(1) -+#define AC100_ADC_SRC_ADCL_LOUTMIX_DISABLED 0 -+#define AC100_ADC_SRC_ADCL_LOUTMIX_ENABLED BIT(1) -+#define AC100_ADC_SRC_ADCL_ROUTMIX_OFF 0 -+#define AC100_ADC_SRC_ADCL_ROUTMIX_MASK BIT(0) -+#define AC100_ADC_SRC_ADCL_ROUTMIX_DISABLED 0 -+#define AC100_ADC_SRC_ADCL_ROUTMIX_ENABLED BIT(0) -+ -+#define AC100_ADC_SRC_BST_CTRL_MIC1AMPEN_OFF 15 -+#define AC100_ADC_SRC_BST_CTRL_MIC1AMPEN_MASK BIT(15) -+#define AC100_ADC_SRC_BST_CTRL_MIC1AMPEN_DISABLED 0 -+#define AC100_ADC_SRC_BST_CTRL_MIC1AMPEN_ENABLED BIT(15) -+#define AC100_ADC_SRC_BST_CTRL_MIC1BOOST_OFF 12 -+#define AC100_ADC_SRC_BST_CTRL_MIC1BOOST(v) (((v) & 0x7) << 12) -+#define AC100_ADC_SRC_BST_CTRL_MIC2AMPEN_OFF 11 -+#define AC100_ADC_SRC_BST_CTRL_MIC2AMPEN_MASK BIT(11) -+#define AC100_ADC_SRC_BST_CTRL_MIC2AMPEN_DISABLED 0 -+#define AC100_ADC_SRC_BST_CTRL_MIC2AMPEN_ENABLED BIT(11) -+#define AC100_ADC_SRC_BST_CTRL_MIC2BOOST_OFF 8 -+#define AC100_ADC_SRC_BST_CTRL_MIC2BOOST(v) (((v) & 0x7) << 8) -+#define AC100_ADC_SRC_BST_CTRL_MIC2SLT_OFF 7 -+#define AC100_ADC_SRC_BST_CTRL_MIC2SLT_MASK BIT(7) -+#define AC100_ADC_SRC_BST_CTRL_MIC2SLT_MIC2 0 -+#define AC100_ADC_SRC_BST_CTRL_MIC2SLT_MIC3 BIT(7) -+#define AC100_ADC_SRC_BST_CTRL_LINEIN_DIFF_PREG_OFF 4 -+#define AC100_ADC_SRC_BST_CTRL_LINEIN_DIFF_PREG(v) (((v) & 0x7) << 4) -+#define AC100_ADC_SRC_BST_CTRL_AXI_PREG_OFF 0 -+#define AC100_ADC_SRC_BST_CTRL_AXI_PREG(v) ((v) & 0x7) -+ -+#define AC100_OUT_MXR_DAC_A_CTRL_DAC_AR_EN_OFF 15 -+#define AC100_OUT_MXR_DAC_A_CTRL_DAC_AR_EN_MASK BIT(15) -+#define AC100_OUT_MXR_DAC_A_CTRL_DAC_AR_EN_DISABLED 0 -+#define AC100_OUT_MXR_DAC_A_CTRL_DAC_AR_EN_ENABLED BIT(15) -+#define AC100_OUT_MXR_DAC_A_CTRL_DAC_AL_EN_OFF 14 -+#define AC100_OUT_MXR_DAC_A_CTRL_DAC_AL_EN_MASK BIT(14) -+#define AC100_OUT_MXR_DAC_A_CTRL_DAC_AL_EN_DISABLED 0 -+#define AC100_OUT_MXR_DAC_A_CTRL_DAC_AL_EN_ENABLED BIT(14) -+#define AC100_OUT_MXR_DAC_A_CTRL_AR_MIX_EN_OFF 13 -+#define AC100_OUT_MXR_DAC_A_CTRL_AR_MIX_EN_MASK BIT(13) -+#define AC100_OUT_MXR_DAC_A_CTRL_AR_MIX_EN_DISABLED 0 -+#define AC100_OUT_MXR_DAC_A_CTRL_AR_MIX_EN_ENABLED BIT(13) -+#define AC100_OUT_MXR_DAC_A_CTRL_AL_MIX_EN_OFF 12 -+#define AC100_OUT_MXR_DAC_A_CTRL_AL_MIX_EN_MASK BIT(12) -+#define AC100_OUT_MXR_DAC_A_CTRL_AL_MIX_EN_DISABLED 0 -+#define AC100_OUT_MXR_DAC_A_CTRL_AL_MIX_EN_ENABLED BIT(12) -+#define AC100_OUT_MXR_DAC_A_CTRL_HP_DCRM_EN_OFF 8 -+#define AC100_OUT_MXR_DAC_A_CTRL_HP_DCRM_EN(v) (((v) & 0xf) << 8) -+ -+#define AC100_OUT_MXR_SRC_RMIX_MIC1_BOOST_OFF 13 -+#define AC100_OUT_MXR_SRC_RMIX_MIC1_BOOST_MASK BIT(13) -+#define AC100_OUT_MXR_SRC_RMIX_MIC1_BOOST_DISABLED 0 -+#define AC100_OUT_MXR_SRC_RMIX_MIC1_BOOST_ENABLED BIT(13) -+#define AC100_OUT_MXR_SRC_RMIX_MIC2_BOOST_OFF 12 -+#define AC100_OUT_MXR_SRC_RMIX_MIC2_BOOST_MASK BIT(12) -+#define AC100_OUT_MXR_SRC_RMIX_MIC2_BOOST_DISABLED 0 -+#define AC100_OUT_MXR_SRC_RMIX_MIC2_BOOST_ENABLED BIT(12) -+#define AC100_OUT_MXR_SRC_RMIX_LINEINL_LINEINR_OFF 11 -+#define AC100_OUT_MXR_SRC_RMIX_LINEINL_LINEINR_MASK BIT(11) -+#define AC100_OUT_MXR_SRC_RMIX_LINEINL_LINEINR_DISABLED 0 -+#define AC100_OUT_MXR_SRC_RMIX_LINEINL_LINEINR_ENABLED BIT(11) -+#define AC100_OUT_MXR_SRC_RMIX_LINEINR_OFF 10 -+#define AC100_OUT_MXR_SRC_RMIX_LINEINR_MASK BIT(10) -+#define AC100_OUT_MXR_SRC_RMIX_LINEINR_DISABLED 0 -+#define AC100_OUT_MXR_SRC_RMIX_LINEINR_ENABLED BIT(10) -+#define AC100_OUT_MXR_SRC_RMIX_AUXINR_OFF 9 -+#define AC100_OUT_MXR_SRC_RMIX_AUXINR_MASK BIT(9) -+#define AC100_OUT_MXR_SRC_RMIX_AUXINR_DISABLED 0 -+#define AC100_OUT_MXR_SRC_RMIX_AUXINR_ENABLED BIT(9) -+#define AC100_OUT_MXR_SRC_RMIX_DACR_OFF 8 -+#define AC100_OUT_MXR_SRC_RMIX_DACR_MASK BIT(8) -+#define AC100_OUT_MXR_SRC_RMIX_DACR_DISABLED 0 -+#define AC100_OUT_MXR_SRC_RMIX_DACR_ENABLED BIT(8) -+#define AC100_OUT_MXR_SRC_RMIX_DACL_OFF 7 -+#define AC100_OUT_MXR_SRC_RMIX_DACL_MASK BIT(7) -+#define AC100_OUT_MXR_SRC_RMIX_DACL_DISABLED 0 -+#define AC100_OUT_MXR_SRC_RMIX_DACL_ENABLED BIT(7) -+#define AC100_OUT_MXR_SRC_LMIX_MIC1_BOOST_OFF 6 -+#define AC100_OUT_MXR_SRC_LMIX_MIC1_BOOST_MASK BIT(6) -+#define AC100_OUT_MXR_SRC_LMIX_MIC1_BOOST_DISABLED 0 -+#define AC100_OUT_MXR_SRC_LMIX_MIC1_BOOST_ENABLED BIT(6) -+#define AC100_OUT_MXR_SRC_LMIX_MIC2_BOOST_OFF 5 -+#define AC100_OUT_MXR_SRC_LMIX_MIC2_BOOST_MASK BIT(5) -+#define AC100_OUT_MXR_SRC_LMIX_MIC2_BOOST_DISABLED 0 -+#define AC100_OUT_MXR_SRC_LMIX_MIC2_BOOST_ENABLED BIT(5) -+#define AC100_OUT_MXR_SRC_LMIX_LINEINL_LINEINR_OFF 4 -+#define AC100_OUT_MXR_SRC_LMIX_LINEINL_LINEINR_MASK BIT(4) -+#define AC100_OUT_MXR_SRC_LMIX_LINEINL_LINEINR_DISABLED 0 -+#define AC100_OUT_MXR_SRC_LMIX_LINEINL_LINEINR_ENABLED BIT(4) -+#define AC100_OUT_MXR_SRC_LMIX_LINEINL_OFF 3 -+#define AC100_OUT_MXR_SRC_LMIX_LINEINL_MASK BIT(3) -+#define AC100_OUT_MXR_SRC_LMIX_LINEINL_DISABLED 0 -+#define AC100_OUT_MXR_SRC_LMIX_LINEINL_ENABLED BIT(3) -+#define AC100_OUT_MXR_SRC_LMIX_AUXINL_OFF 2 -+#define AC100_OUT_MXR_SRC_LMIX_AUXINL_MASK BIT(2) -+#define AC100_OUT_MXR_SRC_LMIX_AUXINL_DISABLED 0 -+#define AC100_OUT_MXR_SRC_LMIX_AUXINL_ENABLED BIT(2) -+#define AC100_OUT_MXR_SRC_LMIX_DACL_OFF 1 -+#define AC100_OUT_MXR_SRC_LMIX_DACL_MASK BIT(1) -+#define AC100_OUT_MXR_SRC_LMIX_DACL_DISABLED 0 -+#define AC100_OUT_MXR_SRC_LMIX_DACL_ENABLED BIT(1) -+#define AC100_OUT_MXR_SRC_LMIX_DACR_OFF 0 -+#define AC100_OUT_MXR_SRC_LMIX_DACR_MASK BIT(0) -+#define AC100_OUT_MXR_SRC_LMIX_DACR_DISABLED 0 -+#define AC100_OUT_MXR_SRC_LMIX_DACR_ENABLED BIT(0) -+ -+#define AC100_OUT_MXR_SRC_BST_HMICBIAS_VOLTAGE_OFF 14 -+#define AC100_OUT_MXR_SRC_BST_HMICBIAS_VOLTAGE_MASK GENMASK(15, 14) -+#define AC100_OUT_MXR_SRC_BST_HMICBIAS_VOLTAGE_1_88V (0x0 << 14) -+#define AC100_OUT_MXR_SRC_BST_HMICBIAS_VOLTAGE_2_09V (0x1 << 14) -+#define AC100_OUT_MXR_SRC_BST_HMICBIAS_VOLTAGE_2_33V (0x2 << 14) -+#define AC100_OUT_MXR_SRC_BST_HMICBIAS_VOLTAGE_2_50V (0x3 << 14) -+#define AC100_OUT_MXR_SRC_BST_MMICBIAS_VOLTAGE_OFF 12 -+#define AC100_OUT_MXR_SRC_BST_MMICBIAS_VOLTAGE_MASK GENMASK(13, 12) -+#define AC100_OUT_MXR_SRC_BST_MMICBIAS_VOLTAGE_1_88V (0x0 << 12) -+#define AC100_OUT_MXR_SRC_BST_MMICBIAS_VOLTAGE_2_09V (0x1 << 12) -+#define AC100_OUT_MXR_SRC_BST_MMICBIAS_VOLTAGE_2_33V (0x2 << 12) -+#define AC100_OUT_MXR_SRC_BST_MMICBIAS_VOLTAGE_2_50V (0x3 << 12) -+#define AC100_OUT_MXR_SRC_BST_AX_GAIN_OFF 9 -+#define AC100_OUT_MXR_SRC_BST_AX_GAIN(v) (((v) & 0x7) << 9) -+#define AC100_OUT_MXR_SRC_BST_MIC1_GAIN_OFF 6 -+#define AC100_OUT_MXR_SRC_BST_MIC1_GAIN(v) (((v) & 0x7) << 6) -+#define AC100_OUT_MXR_SRC_BST_MIC2_GAIN_OFF 3 -+#define AC100_OUT_MXR_SRC_BST_MIC2_GAIN(v) (((v) & 0x7) << 3) -+#define AC100_OUT_MXR_SRC_BST_LINEIN_GAIN_OFF 0 -+#define AC100_OUT_MXR_SRC_BST_LINEIN_GAIN(v) ((v) & 0x7) -+ -+#define AC100_HPOUT_CTRL_RIGHT_SRC_OFF 15 -+#define AC100_HPOUT_CTRL_RIGHT_SRC_MASK BIT(15) -+#define AC100_HPOUT_CTRL_RIGHT_SRC_DACR 0 -+#define AC100_HPOUT_CTRL_RIGHT_SRC_RAMIX BIT(15) -+#define AC100_HPOUT_CTRL_LEFT_SRC_OFF 14 -+#define AC100_HPOUT_CTRL_LEFT_SRC_MASK BIT(14) -+#define AC100_HPOUT_CTRL_LEFT_SRC_DACL 0 -+#define AC100_HPOUT_CTRL_LEFT_SRC_LAMIX BIT(14) -+#define AC100_HPOUT_CTRL_RIGHT_PA_MUTE_OFF 13 -+#define AC100_HPOUT_CTRL_RIGHT_PA_MUTE_MASK BIT(13) -+#define AC100_HPOUT_CTRL_RIGHT_PA_MUTE_MUTE 0 -+#define AC100_HPOUT_CTRL_RIGHT_PA_MUTE_NOT_MUTE BIT(13) -+#define AC100_HPOUT_CTRL_LEFT_PA_MUTE_OFF 12 -+#define AC100_HPOUT_CTRL_LEFT_PA_MUTE_MASK BIT(12) -+#define AC100_HPOUT_CTRL_LEFT_PA_MUTE_MUTE 0 -+#define AC100_HPOUT_CTRL_LEFT_PA_MUTE_NOT_MUTE BIT(12) -+#define AC100_HPOUT_CTRL_PA_EN_OFF 11 -+#define AC100_HPOUT_CTRL_PA_EN_MASK BIT(11) -+#define AC100_HPOUT_CTRL_PA_EN_DISABLED 0 -+#define AC100_HPOUT_CTRL_PA_EN_ENABLED BIT(11) -+#define AC100_HPOUT_CTRL_VOLUME_OFF 4 -+#define AC100_HPOUT_CTRL_VOLUME(v) (((v) & 0x3f) << 4) -+#define AC100_HPOUT_CTRL_STARTUP_DELAY_OFF 2 -+#define AC100_HPOUT_CTRL_STARTUP_DELAY_MASK GENMASK(3, 2) -+#define AC100_HPOUT_CTRL_STARTUP_DELAY_4ms (0x0 << 2) -+#define AC100_HPOUT_CTRL_STARTUP_DELAY_8ms (0x1 << 2) -+#define AC100_HPOUT_CTRL_STARTUP_DELAY_16ms (0x2 << 2) -+#define AC100_HPOUT_CTRL_STARTUP_DELAY_32ms (0x3 << 2) -+#define AC100_HPOUT_CTRL_OUTPUT_CURRENT_OFF 0 -+#define AC100_HPOUT_CTRL_OUTPUT_CURRENT(v) ((v) & 0x3) -+ -+#define AC100_ERPOUT_CTRL_RAMP_TIME_OFF 11 -+#define AC100_ERPOUT_CTRL_RAMP_TIME_MASK GENMASK(12, 11) -+#define AC100_ERPOUT_CTRL_RAMP_TIME_256ms (0x0 << 11) -+#define AC100_ERPOUT_CTRL_RAMP_TIME_512ms (0x1 << 11) -+#define AC100_ERPOUT_CTRL_RAMP_TIME_640ms (0x2 << 11) -+#define AC100_ERPOUT_CTRL_RAMP_TIME_768ms (0x3 << 11) -+#define AC100_ERPOUT_CTRL_OUT_CURRENT_OFF 9 -+#define AC100_ERPOUT_CTRL_OUT_CURRENT(v) (((v) & 0x3) << 9) -+#define AC100_ERPOUT_CTRL_INPUT_SOURCE_OFF 7 -+#define AC100_ERPOUT_CTRL_INPUT_SOURCE_MASK GENMASK(8, 7) -+#define AC100_ERPOUT_CTRL_INPUT_SOURCE_DACR (0x0 << 7) -+#define AC100_ERPOUT_CTRL_INPUT_SOURCE_DACL (0x1 << 7) -+#define AC100_ERPOUT_CTRL_INPUT_SOURCE_RAMIX (0x2 << 7) -+#define AC100_ERPOUT_CTRL_INPUT_SOURCE_LAMIX (0x3 << 7) -+#define AC100_ERPOUT_CTRL_MUTE_OFF 6 -+#define AC100_ERPOUT_CTRL_MUTE_MASK BIT(6) -+#define AC100_ERPOUT_CTRL_MUTE_MUTE 0 -+#define AC100_ERPOUT_CTRL_MUTE_NOT_MUTE BIT(6) -+#define AC100_ERPOUT_CTRL_PA_EN_OFF 5 -+#define AC100_ERPOUT_CTRL_PA_EN_MASK BIT(5) -+#define AC100_ERPOUT_CTRL_PA_EN_DISABLED 0 -+#define AC100_ERPOUT_CTRL_PA_EN_ENABLED BIT(5) -+#define AC100_ERPOUT_CTRL_VOLUME_OFF 0 -+#define AC100_ERPOUT_CTRL_VOLUME(v) ((v) & 0x1f) -+ -+#define AC100_SPKOUT_CTRL_RIGHT_SRC_OFF 12 -+#define AC100_SPKOUT_CTRL_RIGHT_SRC_MASK BIT(12) -+#define AC100_SPKOUT_CTRL_RIGHT_SRC_MIXR 0 -+#define AC100_SPKOUT_CTRL_RIGHT_SRC_MIXL_MIXR BIT(12) -+#define AC100_SPKOUT_CTRL_RIGHT_INV_EN_OFF 11 -+#define AC100_SPKOUT_CTRL_RIGHT_INV_EN_MASK BIT(11) -+#define AC100_SPKOUT_CTRL_RIGHT_INV_EN_DISABLED 0 -+#define AC100_SPKOUT_CTRL_RIGHT_INV_EN_ENABLED BIT(11) -+#define AC100_SPKOUT_CTRL_RIGHT_EN_OFF 9 -+#define AC100_SPKOUT_CTRL_RIGHT_EN_MASK BIT(9) -+#define AC100_SPKOUT_CTRL_RIGHT_EN_DISABLED 0 -+#define AC100_SPKOUT_CTRL_RIGHT_EN_ENABLED BIT(9) -+#define AC100_SPKOUT_CTRL_LEFT_SRC_OFF 8 -+#define AC100_SPKOUT_CTRL_LEFT_SRC_MASK BIT(8) -+#define AC100_SPKOUT_CTRL_LEFT_SRC_MIXL 0 -+#define AC100_SPKOUT_CTRL_LEFT_SRC_MIXL_MIXR BIT(8) -+#define AC100_SPKOUT_CTRL_LEFT_INV_EN_OFF 7 -+#define AC100_SPKOUT_CTRL_LEFT_INV_EN_MASK BIT(7) -+#define AC100_SPKOUT_CTRL_LEFT_INV_EN_DISABLED 0 -+#define AC100_SPKOUT_CTRL_LEFT_INV_EN_ENABLED BIT(7) -+#define AC100_SPKOUT_CTRL_LEFT_EN_OFF 5 -+#define AC100_SPKOUT_CTRL_LEFT_EN_MASK BIT(5) -+#define AC100_SPKOUT_CTRL_LEFT_EN_DISABLED 0 -+#define AC100_SPKOUT_CTRL_LEFT_EN_ENABLED BIT(5) -+#define AC100_SPKOUT_CTRL_VOLUME_OFF 0 -+#define AC100_SPKOUT_CTRL_VOLUME(v) ((v) & 0x1f) -+ -+#define AC100_LINEOUT_CTRL_LINEOUT_GAIN_OFF 5 -+#define AC100_LINEOUT_CTRL_LINEOUT_GAIN(v) (((v) & 0x7) << 5) -+#define AC100_LINEOUT_CTRL_LINEOUT_EN_OFF 4 -+#define AC100_LINEOUT_CTRL_LINEOUT_EN_MASK BIT(4) -+#define AC100_LINEOUT_CTRL_LINEOUT_EN_DISABLED 0 -+#define AC100_LINEOUT_CTRL_LINEOUT_EN_ENABLED BIT(4) -+#define AC100_LINEOUT_CTRL_LINEOUT_S0_OFF 3 -+#define AC100_LINEOUT_CTRL_LINEOUT_S0_MASK BIT(3) -+#define AC100_LINEOUT_CTRL_LINEOUT_S0_MUTE 0 -+#define AC100_LINEOUT_CTRL_LINEOUT_S0_ON BIT(3) -+#define AC100_LINEOUT_CTRL_LINEOUT_S1_OFF 2 -+#define AC100_LINEOUT_CTRL_LINEOUT_S1_MASK BIT(2) -+#define AC100_LINEOUT_CTRL_LINEOUT_S1_MUTE 0 -+#define AC100_LINEOUT_CTRL_LINEOUT_S1_ON BIT(2) -+#define AC100_LINEOUT_CTRL_LINEOUT_S2_OFF 1 -+#define AC100_LINEOUT_CTRL_LINEOUT_S2_MASK BIT(1) -+#define AC100_LINEOUT_CTRL_LINEOUT_S2_MUTE 0 -+#define AC100_LINEOUT_CTRL_LINEOUT_S2_ON BIT(1) -+#define AC100_LINEOUT_CTRL_LINEOUT_S3_OFF 0 -+#define AC100_LINEOUT_CTRL_LINEOUT_S3_MASK BIT(0) -+#define AC100_LINEOUT_CTRL_LINEOUT_S3_MUTE 0 -+#define AC100_LINEOUT_CTRL_LINEOUT_S3_ON BIT(0) -+ -+#define AC100_ADDA_TUNE1_ZERO_CROSSOVER_EN_OFF 8 -+#define AC100_ADDA_TUNE1_ZERO_CROSSOVER_EN_MASK BIT(8) -+#define AC100_ADDA_TUNE1_ZERO_CROSSOVER_EN_DIS 0 -+#define AC100_ADDA_TUNE1_ZERO_CROSSOVER_EN_EN BIT(8) -+#define AC100_ADDA_TUNE1_ZERO_CROSSOVER_TIME_OFF 7 -+#define AC100_ADDA_TUNE1_ZERO_CROSSOVER_TIME BIT(7) -+ -+struct ac100_codec { -+ struct device *dev; -+ struct snd_soc_component component; -+}; -+ -+/* ADC mixer controls */ -+static const struct snd_kcontrol_new ac100_codec_adc_mixer_controls[] = { -+ SOC_DAPM_DOUBLE("Mic1 Capture Switch", -+ AC100_ADC_SRC, -+ AC100_ADC_SRC_ADCL_MIC1_BOOST_OFF, -+ AC100_ADC_SRC_ADCR_MIC1_BOOST_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("Mic2 Capture Switch", -+ AC100_ADC_SRC, -+ AC100_ADC_SRC_ADCL_MIC2_BOOST_OFF, -+ AC100_ADC_SRC_ADCR_MIC2_BOOST_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("Line In Differential Capture Switch", -+ AC100_ADC_SRC, -+ AC100_ADC_SRC_ADCL_LINEINL_LINEINR_OFF, -+ AC100_ADC_SRC_ADCR_LINEINL_LINEINR_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("Line In Capture Switch", -+ AC100_ADC_SRC, -+ AC100_ADC_SRC_ADCL_LINEINL_OFF, -+ AC100_ADC_SRC_ADCR_LINEINR_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("Aux In Capture Switch", -+ AC100_ADC_SRC, -+ AC100_ADC_SRC_ADCL_AUXINL_OFF, -+ AC100_ADC_SRC_ADCR_AUXINR_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("Mixer Capture Switch", -+ AC100_ADC_SRC, -+ AC100_ADC_SRC_ADCL_LOUTMIX_OFF, -+ AC100_ADC_SRC_ADCR_ROUTMIX_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("Mixer Reversed Capture Switch", -+ AC100_ADC_SRC, -+ AC100_ADC_SRC_ADCL_ROUTMIX_OFF, -+ AC100_ADC_SRC_ADCR_LOUTMIX_OFF, 1, 0), -+}; -+ -+/* Output mixer controls */ -+static const struct snd_kcontrol_new ac100_codec_mixer_controls[] = { -+ SOC_DAPM_DOUBLE("Mic1 Playback Switch", -+ AC100_OUT_MXR_SRC, -+ AC100_OUT_MXR_SRC_LMIX_MIC1_BOOST_OFF, -+ AC100_OUT_MXR_SRC_RMIX_MIC1_BOOST_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("Mic2 Playback Switch", -+ AC100_OUT_MXR_SRC, -+ AC100_OUT_MXR_SRC_LMIX_MIC2_BOOST_OFF, -+ AC100_OUT_MXR_SRC_RMIX_MIC2_BOOST_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("Line In Differential Playback Switch", -+ AC100_OUT_MXR_SRC, -+ AC100_OUT_MXR_SRC_LMIX_LINEINL_LINEINR_OFF, -+ AC100_OUT_MXR_SRC_RMIX_LINEINL_LINEINR_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("Line In Playback Switch", -+ AC100_OUT_MXR_SRC, -+ AC100_OUT_MXR_SRC_LMIX_LINEINL_OFF, -+ AC100_OUT_MXR_SRC_RMIX_LINEINR_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("Aux In Playback Switch", -+ AC100_OUT_MXR_SRC, -+ AC100_OUT_MXR_SRC_LMIX_AUXINL_OFF, -+ AC100_OUT_MXR_SRC_RMIX_AUXINR_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("DAC Playback Switch", -+ AC100_OUT_MXR_SRC, -+ AC100_OUT_MXR_SRC_LMIX_DACL_OFF, -+ AC100_OUT_MXR_SRC_RMIX_DACR_OFF, 1, 0), -+ SOC_DAPM_DOUBLE("DAC Reversed Playback Switch", -+ AC100_OUT_MXR_SRC, -+ AC100_OUT_MXR_SRC_LMIX_DACR_OFF, -+ AC100_OUT_MXR_SRC_RMIX_DACL_OFF, 1, 0), -+}; -+ -+static const DECLARE_TLV_DB_SCALE(ac100_codec_out_mixer_pregain_scale, -+ -450, 150, 0); -+ -+static const DECLARE_TLV_DB_RANGE(ac100_codec_mic_gain_scale, -+ 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), -+ 1, 7, TLV_DB_SCALE_ITEM(3000, 300, 0), -+); -+ -+static const DECLARE_TLV_DB_SCALE(ac100_codec_pre_gain_scale, -+ -1200, 300, 0); -+ -+static const DECLARE_TLV_DB_RANGE(ac100_codec_earpiece_vol_scale, -+ 0, 1, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), -+ 2, 31, TLV_DB_SCALE_ITEM(-4350, 150, 0), -+); -+ -+static const DECLARE_TLV_DB_SCALE(ac100_codec_lineout_vol_scale, -450, 150, 0); -+ -+static const DECLARE_TLV_DB_SCALE(ac100_codec_hp_vol_scale, -6300, 100, 1); -+ -+static const char *ac100_codec_hp_pa_delay_texts[] = { -+ "4ms", "8ms", "16ms", "32ms" -+}; -+ -+static SOC_ENUM_SINGLE_DECL(ac100_codec_hp_pa_delay_enum, -+ AC100_HPOUT_CTRL, -+ AC100_HPOUT_CTRL_STARTUP_DELAY_OFF, -+ ac100_codec_hp_pa_delay_texts); -+ -+static const char *ac100_codec_hp_pa_cur_texts[] = { -+ "low", "mid", "higher", "highest" -+}; -+ -+static SOC_ENUM_SINGLE_DECL(ac100_codec_hp_pa_cur_enum, -+ AC100_HPOUT_CTRL, -+ AC100_HPOUT_CTRL_OUTPUT_CURRENT_OFF, -+ ac100_codec_hp_pa_cur_texts); -+ -+static SOC_ENUM_SINGLE_DECL(ac100_codec_ep_pa_cur_enum, -+ AC100_ERPOUT_CTRL, -+ AC100_ERPOUT_CTRL_OUT_CURRENT_OFF, -+ ac100_codec_hp_pa_cur_texts); -+ -+static const char *ac100_codec_ep_pa_ramp_time_texts[] = { -+ "256ms", "512ms", "640ms", "768ms" -+}; -+ -+static SOC_ENUM_SINGLE_DECL(ac100_codec_ep_pa_ramp_time_enum, -+ AC100_ERPOUT_CTRL, -+ AC100_ERPOUT_CTRL_RAMP_TIME_OFF, -+ ac100_codec_ep_pa_ramp_time_texts); -+ -+static const char *ac100_codec_mic_bv_texts[] = { -+ "1.88V", "2.09V", "2.33V", "2.5V" -+}; -+ -+static SOC_ENUM_SINGLE_DECL(ac100_codec_mic1_bv_enum, -+ AC100_OUT_MXR_SRC_BST, -+ AC100_OUT_MXR_SRC_BST_MMICBIAS_VOLTAGE_OFF, -+ ac100_codec_mic_bv_texts); -+ -+static SOC_ENUM_SINGLE_DECL(ac100_codec_mic2_bv_enum, -+ AC100_OUT_MXR_SRC_BST, -+ AC100_OUT_MXR_SRC_BST_HMICBIAS_VOLTAGE_OFF, -+ ac100_codec_mic_bv_texts); -+ -+/* volume / mute controls */ -+static const struct snd_kcontrol_new ac100_codec_controls[] = { -+ /* Microphone Amp boost gain */ -+ SOC_SINGLE_TLV("Mic1 Boost Volume", AC100_ADC_SRC_BST_CTRL, -+ AC100_ADC_SRC_BST_CTRL_MIC1BOOST_OFF, 0x7, 0, -+ ac100_codec_mic_gain_scale), -+ -+ SOC_SINGLE_TLV("Mic2 Boost Volume", AC100_ADC_SRC_BST_CTRL, -+ AC100_ADC_SRC_BST_CTRL_MIC2BOOST_OFF, 0x7, 0, -+ ac100_codec_mic_gain_scale), -+ -+ SOC_SINGLE_TLV("Line In Pre-Gain Volume", AC100_ADC_SRC_BST_CTRL, -+ AC100_ADC_SRC_BST_CTRL_LINEIN_DIFF_PREG_OFF, 0x7, 0, -+ ac100_codec_pre_gain_scale), -+ -+ SOC_SINGLE_TLV("Aux In Pre-Gain Volume", AC100_ADC_SRC_BST_CTRL, -+ AC100_ADC_SRC_BST_CTRL_AXI_PREG_OFF, 0x7, 0, -+ ac100_codec_pre_gain_scale), -+ -+ /* ADC */ -+ SOC_DOUBLE_TLV("ADC Gain Capture Volume", AC100_ADC_APC_CTRL, -+ AC100_ADC_APC_CTRL_ADCL_GAIN_OFF, -+ AC100_ADC_APC_CTRL_ADCR_GAIN_OFF, 0x7, 0, -+ ac100_codec_out_mixer_pregain_scale), -+ -+ /* Mixer pre-gain */ -+ SOC_SINGLE_TLV("Mic1 Playback Volume", AC100_OUT_MXR_SRC_BST, -+ AC100_OUT_MXR_SRC_BST_MIC1_GAIN_OFF, -+ 0x7, 0, ac100_codec_out_mixer_pregain_scale), -+ -+ SOC_SINGLE_TLV("Mic2 Playback Volume", AC100_OUT_MXR_SRC_BST, -+ AC100_OUT_MXR_SRC_BST_MIC2_GAIN_OFF, -+ 0x7, 0, ac100_codec_out_mixer_pregain_scale), -+ -+ SOC_SINGLE_TLV("Line In Playback Volume", AC100_OUT_MXR_SRC_BST, -+ AC100_OUT_MXR_SRC_BST_LINEIN_GAIN_OFF, -+ 0x7, 0, ac100_codec_out_mixer_pregain_scale), -+ -+ SOC_SINGLE_TLV("Aux In Playback Volume", AC100_OUT_MXR_SRC_BST, -+ AC100_OUT_MXR_SRC_BST_AX_GAIN_OFF, -+ 0x7, 0, ac100_codec_out_mixer_pregain_scale), -+ -+ SOC_SINGLE_TLV("Headphone Playback Volume", -+ AC100_HPOUT_CTRL, -+ AC100_HPOUT_CTRL_VOLUME_OFF, 0x3f, 0, -+ ac100_codec_hp_vol_scale), -+ -+ SOC_SINGLE_TLV("Earpiece Playback Volume", -+ AC100_ERPOUT_CTRL, -+ AC100_ERPOUT_CTRL_VOLUME_OFF, 0x1f, 0, -+ ac100_codec_earpiece_vol_scale), -+ -+ SOC_SINGLE_TLV("Speaker Playback Volume", -+ AC100_SPKOUT_CTRL, -+ AC100_SPKOUT_CTRL_VOLUME_OFF, 0x1f, 0, -+ ac100_codec_earpiece_vol_scale), -+ -+ SOC_SINGLE_TLV("Line Out Playback Volume", -+ AC100_LINEOUT_CTRL, -+ AC100_LINEOUT_CTRL_LINEOUT_GAIN_OFF, 0x7, 0, -+ ac100_codec_lineout_vol_scale), -+ -+ SOC_ENUM("Headphone Amplifier Startup Delay", -+ ac100_codec_hp_pa_delay_enum), -+ SOC_ENUM("Headphone Amplifier Current", ac100_codec_hp_pa_cur_enum), -+ -+ SOC_ENUM("Earpiece Amplifier Ramp Time", -+ ac100_codec_ep_pa_ramp_time_enum), -+ SOC_ENUM("Earpiece Amplifier Current", ac100_codec_ep_pa_cur_enum), -+ -+ SOC_ENUM("Mic1 Bias Voltage", ac100_codec_mic1_bv_enum), -+ SOC_ENUM("Mic2 Bias Voltage", ac100_codec_mic2_bv_enum), -+}; -+ -+/* Headphone */ -+ -+static const char * const ac100_codec_hp_src_enum_text[] = { -+ "DAC", "Mixer", -+}; -+ -+static SOC_ENUM_DOUBLE_DECL(ac100_codec_hp_src_enum, -+ AC100_HPOUT_CTRL, -+ AC100_HPOUT_CTRL_LEFT_SRC_OFF, -+ AC100_HPOUT_CTRL_RIGHT_SRC_OFF, -+ ac100_codec_hp_src_enum_text); -+ -+static const struct snd_kcontrol_new ac100_codec_hp_src[] = { -+ SOC_DAPM_ENUM("Headphone Source Playback Route", -+ ac100_codec_hp_src_enum), -+}; -+ -+static const struct snd_kcontrol_new ac100_codec_hp_switch = -+ SOC_DAPM_DOUBLE("Headphone Playback Switch", -+ AC100_HPOUT_CTRL, -+ AC100_HPOUT_CTRL_LEFT_PA_MUTE_OFF, -+ AC100_HPOUT_CTRL_RIGHT_PA_MUTE_OFF, 1, 0); -+ -+/* Earpiece */ -+ -+static const struct snd_kcontrol_new ac100_codec_earpiece_switch = -+ SOC_DAPM_SINGLE("Playback Switch", -+ AC100_ERPOUT_CTRL, -+ AC100_ERPOUT_CTRL_MUTE_OFF, 1, 0); -+ -+static const char * const ac100_codec_earpiece_src_enum_text[] = { -+ "DACR", "DACL", "Right Mixer", "Left Mixer", -+}; -+ -+static SOC_ENUM_SINGLE_DECL(ac100_codec_earpiece_src_enum, -+ AC100_ERPOUT_CTRL, -+ AC100_ERPOUT_CTRL_INPUT_SOURCE_OFF, -+ ac100_codec_earpiece_src_enum_text); -+ -+static const struct snd_kcontrol_new ac100_codec_earpiece_src[] = { -+ SOC_DAPM_ENUM("Earpiece Source Playback Route", -+ ac100_codec_earpiece_src_enum), -+}; -+ -+/* Speaker */ -+ -+static const char * const ac100_codec_spk_src_enum_text[] = { -+ "Stereo", "Mono", -+}; -+ -+static SOC_ENUM_DOUBLE_DECL(ac100_codec_spk_src_enum, -+ AC100_SPKOUT_CTRL, -+ AC100_SPKOUT_CTRL_LEFT_SRC_OFF, -+ AC100_SPKOUT_CTRL_RIGHT_SRC_OFF, -+ ac100_codec_spk_src_enum_text); -+ -+static const struct snd_kcontrol_new ac100_codec_spk_src[] = { -+ SOC_DAPM_ENUM("Speaker Source Playback Route", -+ ac100_codec_spk_src_enum), -+}; -+ -+static const struct snd_kcontrol_new ac100_codec_spk_switch = -+ SOC_DAPM_DOUBLE("Speaker Playback Switch", -+ AC100_SPKOUT_CTRL, -+ AC100_SPKOUT_CTRL_LEFT_EN_OFF, -+ AC100_SPKOUT_CTRL_RIGHT_EN_OFF, 1, 0); -+ -+static const struct snd_kcontrol_new ac100_codec_spk_inv_switch = -+ SOC_DAPM_DOUBLE("Speaker Invert Switch", -+ AC100_SPKOUT_CTRL, -+ AC100_SPKOUT_CTRL_LEFT_INV_EN_OFF, -+ AC100_SPKOUT_CTRL_RIGHT_INV_EN_OFF, 1, 0); -+ -+/* Line Out */ -+ -+static const struct snd_kcontrol_new ac100_codec_lineout_mixer_controls[] = { -+ SOC_DAPM_SINGLE("Mic1 Playback Switch", -+ AC100_LINEOUT_CTRL, -+ AC100_LINEOUT_CTRL_LINEOUT_S0_OFF, 1, 0), -+ SOC_DAPM_SINGLE("Mic2 Playback Switch", -+ AC100_LINEOUT_CTRL, -+ AC100_LINEOUT_CTRL_LINEOUT_S1_OFF, 1, 0), -+ SOC_DAPM_SINGLE("Right Mixer Playback Switch", -+ AC100_LINEOUT_CTRL, -+ AC100_LINEOUT_CTRL_LINEOUT_S2_OFF, 1, 0), -+ SOC_DAPM_SINGLE("Left Mixer Playback Switch", -+ AC100_LINEOUT_CTRL, -+ AC100_LINEOUT_CTRL_LINEOUT_S3_OFF, 1, 0), -+}; -+ -+static const struct snd_kcontrol_new ac100_codec_lineout_switch = -+ SOC_DAPM_SINGLE("Playback Switch", -+ AC100_LINEOUT_CTRL, -+ AC100_LINEOUT_CTRL_LINEOUT_EN_OFF, 1, 0); -+ -+/* Mic2 Boost Source */ -+ -+static const char * const ac100_codec_mic2boost_src_enum_text[] = { -+ "Mic2", "Mic3", -+}; -+ -+static SOC_ENUM_SINGLE_DECL(ac100_codec_mic2boost_src_enum, -+ AC100_ADC_SRC_BST_CTRL, -+ AC100_ADC_SRC_BST_CTRL_MIC2SLT_OFF, -+ ac100_codec_mic2boost_src_enum_text); -+ -+static const struct snd_kcontrol_new ac100_codec_mic2boost_src[] = { -+ SOC_DAPM_ENUM("Mic2 Source Capture Route", -+ ac100_codec_mic2boost_src_enum), -+}; -+ -+/* This is done to remove the headphone buffer DC offset. */ -+static int ac100_codec_hp_power(struct snd_soc_dapm_widget *w, -+ struct snd_kcontrol *k, int event) -+{ -+ struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); -+ unsigned int val = SND_SOC_DAPM_EVENT_ON(event) ? 0xf : 0; -+ -+ // zero cross detection -+ if (SND_SOC_DAPM_EVENT_OFF(event)) { -+ snd_soc_component_update_bits(component, -+ AC100_ADDA_TUNE1, -+ AC100_ADDA_TUNE1_ZERO_CROSSOVER_EN_MASK, -+ AC100_ADDA_TUNE1_ZERO_CROSSOVER_EN_EN); -+ } else { -+ snd_soc_component_update_bits(component, -+ AC100_ADDA_TUNE1, -+ AC100_ADDA_TUNE1_ZERO_CROSSOVER_EN_MASK, -+ AC100_ADDA_TUNE1_ZERO_CROSSOVER_EN_DIS); -+ } -+ -+ snd_soc_component_update_bits(component, AC100_OUT_MXR_DAC_A_CTRL, -+ AC100_OUT_MXR_DAC_A_CTRL_HP_DCRM_EN(0xf), -+ AC100_OUT_MXR_DAC_A_CTRL_HP_DCRM_EN(val)); -+ return 0; -+} -+ -+static const struct snd_soc_dapm_widget ac100_codec_widgets[] = { -+ /* DAC */ -+ SND_SOC_DAPM_DAC("Left DAC", NULL, AC100_OUT_MXR_DAC_A_CTRL, -+ AC100_OUT_MXR_DAC_A_CTRL_DAC_AL_EN_OFF, 0), -+ SND_SOC_DAPM_DAC("Right DAC", NULL, AC100_OUT_MXR_DAC_A_CTRL, -+ AC100_OUT_MXR_DAC_A_CTRL_DAC_AR_EN_OFF, 0), -+ -+ /* ADC */ -+ SND_SOC_DAPM_ADC("Left ADC", NULL, AC100_ADC_APC_CTRL, -+ AC100_ADC_APC_CTRL_ADCL_EN_OFF, 0), -+ SND_SOC_DAPM_ADC("Right ADC", NULL, AC100_ADC_APC_CTRL, -+ AC100_ADC_APC_CTRL_ADCR_EN_OFF, 0), -+ -+ /* -+ * Due to this component and the codec belonging to separate DAPM -+ * contexts, we need to manually link the above widgets to their -+ * stream widgets at the card level. -+ */ -+ -+ /* Headphones */ -+ -+ SND_SOC_DAPM_REGULATOR_SUPPLY("cpvdd", 0, 0), -+ SND_SOC_DAPM_MUX("Left Headphone Source", -+ SND_SOC_NOPM, 0, 0, ac100_codec_hp_src), -+ SND_SOC_DAPM_MUX("Right Headphone Source", -+ SND_SOC_NOPM, 0, 0, ac100_codec_hp_src), -+ SND_SOC_DAPM_SWITCH("Left Headphone Switch", -+ SND_SOC_NOPM, 0, 0, &ac100_codec_hp_switch), -+ SND_SOC_DAPM_SWITCH("Right Headphone Switch", -+ SND_SOC_NOPM, 0, 0, &ac100_codec_hp_switch), -+ SND_SOC_DAPM_OUT_DRV("Left Headphone Amp", -+ SND_SOC_NOPM, 0, 0, NULL, 0), -+ SND_SOC_DAPM_OUT_DRV("Right Headphone Amp", -+ SND_SOC_NOPM, 0, 0, NULL, 0), -+ SND_SOC_DAPM_SUPPLY("Headphone Amp", AC100_HPOUT_CTRL, -+ AC100_HPOUT_CTRL_PA_EN_OFF, 0, -+ ac100_codec_hp_power, -+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), -+ SND_SOC_DAPM_OUTPUT("HP"), -+ -+ /* Earpiece */ -+ -+ SND_SOC_DAPM_MUX("Earpiece Source Playback Route", -+ SND_SOC_NOPM, 0, 0, ac100_codec_earpiece_src), -+ SND_SOC_DAPM_SWITCH("Earpiece", -+ SND_SOC_NOPM, 0, 0, &ac100_codec_earpiece_switch), -+ SND_SOC_DAPM_OUT_DRV("Earpiece Amp", AC100_ERPOUT_CTRL, -+ AC100_ERPOUT_CTRL_PA_EN_OFF, 0, NULL, 0), -+ SND_SOC_DAPM_OUTPUT("EARPIECE"), -+ -+ /* Speaker */ -+ -+ SND_SOC_DAPM_MUX("Left Speaker Source", -+ SND_SOC_NOPM, 0, 0, ac100_codec_spk_src), -+ SND_SOC_DAPM_MUX("Right Speaker Source", -+ SND_SOC_NOPM, 0, 0, ac100_codec_spk_src), -+ SND_SOC_DAPM_SWITCH("Left Speaker Switch", -+ SND_SOC_NOPM, 0, 0, &ac100_codec_spk_switch), -+ SND_SOC_DAPM_SWITCH("Right Speaker Switch", -+ SND_SOC_NOPM, 0, 0, &ac100_codec_spk_switch), -+ SND_SOC_DAPM_SWITCH("Left Speaker Invert Switch", -+ SND_SOC_NOPM, 0, 0, &ac100_codec_spk_inv_switch), -+ SND_SOC_DAPM_SWITCH("Right Speaker Invert Switch", -+ SND_SOC_NOPM, 0, 0, &ac100_codec_spk_inv_switch), -+ SND_SOC_DAPM_OUTPUT("SPKOUTL"), -+ SND_SOC_DAPM_OUTPUT("SPKOUTR"), -+ -+ /* Line Out */ -+ -+ SND_SOC_DAPM_MIXER("Line Out Mixer", SND_SOC_NOPM, 0, 0, -+ ac100_codec_lineout_mixer_controls, -+ ARRAY_SIZE(ac100_codec_lineout_mixer_controls)), -+ SND_SOC_DAPM_SWITCH("Line Out", -+ SND_SOC_NOPM, 0, 0, &ac100_codec_lineout_switch), -+ SND_SOC_DAPM_OUTPUT("LINEOUT"), -+ -+ /* Microphone 1 */ -+ -+ SND_SOC_DAPM_INPUT("MIC1"), -+ SND_SOC_DAPM_SUPPLY("MBIAS", AC100_ADC_APC_CTRL, -+ AC100_ADC_APC_CTRL_MBIAS_EN_OFF, -+ 0, NULL, 0), -+ SND_SOC_DAPM_PGA("Mic1 Amplifier", AC100_ADC_SRC_BST_CTRL, -+ AC100_ADC_SRC_BST_CTRL_MIC1AMPEN_OFF, 0, NULL, 0), -+ -+ /* Microphone 2 and 3 */ -+ -+ SND_SOC_DAPM_INPUT("MIC2"), -+ SND_SOC_DAPM_INPUT("MIC3"), -+ SND_SOC_DAPM_MUX("Mic2 Amplifier Source", -+ SND_SOC_NOPM, 0, 0, ac100_codec_mic2boost_src), -+ SND_SOC_DAPM_SUPPLY("HBIAS", AC100_ADC_APC_CTRL, -+ AC100_ADC_APC_CTRL_HBIAS_EN_OFF, -+ 0, NULL, 0), -+ SND_SOC_DAPM_PGA("Mic2 Amplifier", AC100_ADC_SRC_BST_CTRL, -+ AC100_ADC_SRC_BST_CTRL_MIC2AMPEN_OFF, 0, NULL, 0), -+ -+ /* Line input */ -+ -+ SND_SOC_DAPM_INPUT("LINEIN"), -+ -+ /* Aux input */ -+ -+ SND_SOC_DAPM_INPUT("AUXIN"), -+ -+ /* Output mixers */ -+ SND_SOC_DAPM_MIXER("Left Mixer", AC100_OUT_MXR_DAC_A_CTRL, -+ AC100_OUT_MXR_DAC_A_CTRL_AL_MIX_EN_OFF, 0, -+ ac100_codec_mixer_controls, -+ ARRAY_SIZE(ac100_codec_mixer_controls)), -+ SND_SOC_DAPM_MIXER("Right Mixer", AC100_OUT_MXR_DAC_A_CTRL, -+ AC100_OUT_MXR_DAC_A_CTRL_AR_MIX_EN_OFF, 0, -+ ac100_codec_mixer_controls, -+ ARRAY_SIZE(ac100_codec_mixer_controls)), -+ -+ /* Input mixers */ -+ SND_SOC_DAPM_MIXER("Left ADC Mixer", SND_SOC_NOPM, 0, 0, -+ ac100_codec_adc_mixer_controls, -+ ARRAY_SIZE(ac100_codec_adc_mixer_controls)), -+ SND_SOC_DAPM_MIXER("Right ADC Mixer", SND_SOC_NOPM, 0, 0, -+ ac100_codec_adc_mixer_controls, -+ ARRAY_SIZE(ac100_codec_adc_mixer_controls)), -+}; -+ -+static const struct snd_soc_dapm_route ac100_codec_routes[] = { -+ /* Microphone Routes */ -+ { "Mic1 Amplifier", NULL, "MIC1"}, -+ { "Mic2 Amplifier", NULL, "Mic2 Amplifier Source"}, -+ { "Mic2 Amplifier Source", "Mic2", "MIC2" }, -+ { "Mic2 Amplifier Source", "Mic3", "MIC3" }, -+ -+ /* Mixer Routes */ -+ { "Left Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" }, -+ { "Left Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" }, -+ { "Left Mixer", "Line In Differential Playback Switch", "LINEIN" }, -+ { "Left Mixer", "Line In Playback Switch", "LINEIN" }, -+ { "Left Mixer", "Aux In Playback Switch", "AUXIN" }, -+ { "Left Mixer", "DAC Playback Switch", "Left DAC" }, -+ { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" }, -+ -+ { "Right Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" }, -+ { "Right Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" }, -+ { "Right Mixer", "Line In Differential Playback Switch", "LINEIN" }, -+ { "Right Mixer", "Line In Playback Switch", "LINEIN" }, -+ { "Right Mixer", "Aux In Playback Switch", "AUXIN" }, -+ { "Right Mixer", "DAC Playback Switch", "Right DAC" }, -+ { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" }, -+ -+ /* ADC Mixer Routes */ -+ { "Left ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" }, -+ { "Left ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" }, -+ { "Left ADC Mixer", "Line In Differential Capture Switch", "LINEIN" }, -+ { "Left ADC Mixer", "Line In Capture Switch", "LINEIN" }, -+ { "Left ADC Mixer", "Aux In Capture Switch", "AUXIN" }, -+ { "Left ADC Mixer", "Mixer Capture Switch", "Left Mixer" }, -+ { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" }, -+ -+ { "Right ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" }, -+ { "Right ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" }, -+ { "Right ADC Mixer", "Line In Differential Capture Switch", "LINEIN" }, -+ { "Right ADC Mixer", "Line In Capture Switch", "LINEIN" }, -+ { "Right ADC Mixer", "Aux In Capture Switch", "AUXIN" }, -+ { "Right ADC Mixer", "Mixer Capture Switch", "Right Mixer" }, -+ { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" }, -+ -+ /* ADC Routes */ -+ { "Left ADC", NULL, "Left ADC Mixer" }, -+ { "Right ADC", NULL, "Right ADC Mixer" }, -+ -+ /* Headphone Routes */ -+ { "Left Headphone Source", "DAC", "Left DAC" }, -+ { "Left Headphone Source", "Mixer", "Left Mixer" }, -+ { "Left Headphone Switch", "Headphone Playback Switch", "Left Headphone Source" }, -+ { "Left Headphone Amp", NULL, "Left Headphone Switch" }, -+ { "Left Headphone Amp", NULL, "Headphone Amp" }, -+ { "HP", NULL, "Left Headphone Amp" }, -+ -+ { "Right Headphone Source", "DAC", "Right DAC" }, -+ { "Right Headphone Source", "Mixer", "Right Mixer" }, -+ { "Right Headphone Switch", "Headphone Playback Switch", "Right Headphone Source" }, -+ { "Right Headphone Amp", NULL, "Right Headphone Switch" }, -+ { "Right Headphone Amp", NULL, "Headphone Amp" }, -+ { "HP", NULL, "Right Headphone Amp" }, -+ -+ { "Headphone Amp", NULL, "cpvdd" }, -+ -+ /* Speaker Routes */ -+ { "Left Speaker Source", "Stereo", "Left Mixer" }, -+ { "Left Speaker Source", "Mono", "Right Mixer" }, -+ { "Left Speaker Source", "Mono", "Left Mixer" }, -+ { "Left Speaker Switch", "Speaker Playback Switch", "Left Speaker Source" }, -+ { "SPKOUTL", NULL, "Left Speaker Switch" }, -+ -+ { "Right Speaker Source", "Stereo", "Right Mixer" }, -+ { "Right Speaker Source", "Mono", "Right Mixer" }, -+ { "Right Speaker Source", "Mono", "Left Mixer" }, -+ { "Right Speaker Switch", "Speaker Playback Switch", "Right Speaker Source" }, -+ { "SPKOUTR", NULL, "Right Speaker Switch" }, -+ -+ /* Earpiece Routes */ -+ { "Earpiece Source Playback Route", "DACR", "Right DAC" }, -+ { "Earpiece Source Playback Route", "DACL", "Left DAC" }, -+ { "Earpiece Source Playback Route", "Right Mixer", "Right Mixer" }, -+ { "Earpiece Source Playback Route", "Left Mixer", "Left Mixer" }, -+ { "Earpiece", "Playback Switch", "Earpiece Source Playback Route" }, -+ { "Earpiece Amp", NULL, "Earpiece" }, -+ { "EARPIECE", NULL, "Earpiece Amp" }, -+ -+ /* Line-out Routes */ -+ { "Line Out", "Playback Switch", "Line Out Mixer" }, -+ { "Line Out Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" }, -+ { "Line Out Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" }, -+ { "Line Out Mixer", "Right Mixer Playback Switch", "Right Mixer" }, -+ { "Line Out Mixer", "Left Mixer Playback Switch", "Left Mixer" }, -+ { "LINEOUT", NULL, "Line Out" }, -+}; -+ -+static int ac100_codec_set_bias_level(struct snd_soc_component *component, -+ enum snd_soc_bias_level level) -+{ -+ if (level == SND_SOC_BIAS_OFF) { -+ pr_err("XX: idle bias off\n"); -+ } -+ -+ return 0; -+} -+ -+static const struct snd_soc_component_driver ac100_codec_analog_cmpnt_drv = { -+ .controls = ac100_codec_controls, -+ .num_controls = ARRAY_SIZE(ac100_codec_controls), -+ .dapm_widgets = ac100_codec_widgets, -+ .num_dapm_widgets = ARRAY_SIZE(ac100_codec_widgets), -+ .dapm_routes = ac100_codec_routes, -+ .num_dapm_routes = ARRAY_SIZE(ac100_codec_routes), -+ .set_bias_level = ac100_codec_set_bias_level, -+}; -+ -+static int ac100_codec_probe(struct platform_device *pdev) -+{ -+ struct ac100_dev *ac100 = dev_get_drvdata(pdev->dev.parent); -+ struct ac100_codec *codec; -+ int ret = 0; -+ -+ codec = devm_kzalloc(&pdev->dev, sizeof(*codec), GFP_KERNEL); -+ if (!codec) -+ return -ENOMEM; -+ -+ codec->dev = &pdev->dev; -+ platform_set_drvdata(pdev, codec); -+ -+ snd_soc_component_init_regmap(&codec->component, ac100->regmap); -+ -+ ret = snd_soc_component_initialize(&codec->component, -+ &ac100_codec_analog_cmpnt_drv, -+ &pdev->dev); -+ if (ret < 0) -+ return ret; -+ -+ ret = snd_soc_add_component(&codec->component, NULL, 0); -+ if (ret) { -+ dev_err(&pdev->dev, -+ "Failed to register codec component (%d)\n", ret); -+ return ret; -+ } -+ -+ return ret; -+} -+ -+static int ac100_codec_remove(struct platform_device *pdev) -+{ -+ snd_soc_unregister_component(&pdev->dev); -+ -+ /* -+ * We do not call snd_soc_component_exit_regmap, because regmap -+ * is still owned by the mfd device. -+ */ -+ return 0; -+} -+ -+static const struct of_device_id ac100_codec_of_match[] = { -+ { .compatible = "x-powers,ac100-codec-analog" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, ac100_codec_of_match); -+ -+static struct platform_driver ac100_codec_driver = { -+ .driver = { -+ .name = "ac100-codec-analog", -+ .of_match_table = ac100_codec_of_match, -+ }, -+ .probe = ac100_codec_probe, -+ .remove = ac100_codec_remove, -+}; -+module_platform_driver(ac100_codec_driver); -+ -+MODULE_DESCRIPTION("X-Powers AC100 codec driver"); -+MODULE_AUTHOR("Ondrej Jirman "); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:ac100-codec"); -diff --git a/sound/soc/sunxi/sun50i-codec-analog.c b/sound/soc/sunxi/sun50i-codec-analog.c -index a41e25ad0aaf..b5de3cbd2062 100644 ---- a/sound/soc/sunxi/sun50i-codec-analog.c -+++ b/sound/soc/sunxi/sun50i-codec-analog.c -@@ -117,7 +117,14 @@ - #define SUN50I_ADDA_HS_MBIAS_CTRL_MMICBIASEN 7 - - #define SUN50I_ADDA_JACK_MIC_CTRL 0x1d -+#define SUN50I_ADDA_JACK_MIC_CTRL_JACKDETEN 7 -+#define SUN50I_ADDA_JACK_MIC_CTRL_INNERRESEN 6 - #define SUN50I_ADDA_JACK_MIC_CTRL_HMICBIASEN 5 -+#define SUN50I_ADDA_JACK_MIC_CTRL_MICADCEN 4 -+ -+struct sun50i_codec_analog { -+ bool internal_bias_resistor; -+}; - - /* mixer controls */ - static const struct snd_kcontrol_new sun50i_a64_codec_mixer_controls[] = { -@@ -296,6 +303,19 @@ static const struct snd_kcontrol_new sun50i_codec_earpiece_switch[] = { - SUN50I_ADDA_EARPIECE_CTRL1_ESPPA_MUTE, 1, 0), - }; - -+static int sun50i_codec_hbias_event(struct snd_soc_dapm_widget *w, -+ struct snd_kcontrol *kcontrol, int event) -+{ -+ struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); -+ u32 value = !!SND_SOC_DAPM_EVENT_ON(event); -+ -+ regmap_update_bits(component->regmap, SUN50I_ADDA_JACK_MIC_CTRL, -+ BIT(SUN50I_ADDA_JACK_MIC_CTRL_MICADCEN), -+ value << SUN50I_ADDA_JACK_MIC_CTRL_MICADCEN); -+ -+ return 0; -+} -+ - static const struct snd_soc_dapm_widget sun50i_a64_codec_widgets[] = { - /* DAC */ - SND_SOC_DAPM_DAC("Left DAC", NULL, SUN50I_ADDA_MIX_DAC_CTRL, -@@ -367,7 +387,8 @@ static const struct snd_soc_dapm_widget sun50i_a64_codec_widgets[] = { - /* Microphone Bias */ - SND_SOC_DAPM_SUPPLY("HBIAS", SUN50I_ADDA_JACK_MIC_CTRL, - SUN50I_ADDA_JACK_MIC_CTRL_HMICBIASEN, -- 0, NULL, 0), -+ 0, sun50i_codec_hbias_event, -+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - - /* Mic input path */ - SND_SOC_DAPM_PGA("Mic2 Amplifier", SUN50I_ADDA_MIC2_CTRL, -@@ -471,17 +492,50 @@ static const struct snd_soc_dapm_route sun50i_a64_codec_routes[] = { - { "EARPIECE", NULL, "Earpiece Amp" }, - }; - --static int sun50i_a64_codec_suspend(struct snd_soc_component *component) -+static int sun50i_a64_codec_probe(struct snd_soc_component *component) - { -- return regmap_update_bits(component->regmap, SUN50I_ADDA_HP_CTRL, -- BIT(SUN50I_ADDA_HP_CTRL_PA_CLK_GATE), -- BIT(SUN50I_ADDA_HP_CTRL_PA_CLK_GATE)); -+ struct sun50i_codec_analog *codec = snd_soc_component_get_drvdata(component); -+ -+ regmap_update_bits(component->regmap, SUN50I_ADDA_JACK_MIC_CTRL, -+ BIT(SUN50I_ADDA_JACK_MIC_CTRL_INNERRESEN), -+ codec->internal_bias_resistor << -+ SUN50I_ADDA_JACK_MIC_CTRL_INNERRESEN); -+ -+ return 0; - } - --static int sun50i_a64_codec_resume(struct snd_soc_component *component) -+static int sun50i_a64_codec_set_bias_level(struct snd_soc_component *component, -+ enum snd_soc_bias_level level) - { -- return regmap_update_bits(component->regmap, SUN50I_ADDA_HP_CTRL, -- BIT(SUN50I_ADDA_HP_CTRL_PA_CLK_GATE), 0); -+ struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); -+ int hbias; -+ -+ switch (level) { -+ case SND_SOC_BIAS_OFF: -+ regmap_update_bits(component->regmap, SUN50I_ADDA_JACK_MIC_CTRL, -+ BIT(SUN50I_ADDA_JACK_MIC_CTRL_JACKDETEN) | -+ BIT(SUN50I_ADDA_JACK_MIC_CTRL_MICADCEN), 0); -+ -+ regmap_update_bits(component->regmap, SUN50I_ADDA_HP_CTRL, -+ BIT(SUN50I_ADDA_HP_CTRL_PA_CLK_GATE), -+ BIT(SUN50I_ADDA_HP_CTRL_PA_CLK_GATE)); -+ break; -+ case SND_SOC_BIAS_STANDBY: -+ regmap_update_bits(component->regmap, SUN50I_ADDA_HP_CTRL, -+ BIT(SUN50I_ADDA_HP_CTRL_PA_CLK_GATE), 0); -+ -+ hbias = snd_soc_dapm_get_pin_status(dapm, "HBIAS"); -+ regmap_update_bits(component->regmap, SUN50I_ADDA_JACK_MIC_CTRL, -+ BIT(SUN50I_ADDA_JACK_MIC_CTRL_JACKDETEN) | -+ BIT(SUN50I_ADDA_JACK_MIC_CTRL_MICADCEN), -+ BIT(SUN50I_ADDA_JACK_MIC_CTRL_JACKDETEN) | -+ hbias << SUN50I_ADDA_JACK_MIC_CTRL_MICADCEN); -+ break; -+ default: -+ break; -+ } -+ -+ return 0; - } - - static const struct snd_soc_component_driver sun50i_codec_analog_cmpnt_drv = { -@@ -491,8 +545,10 @@ static const struct snd_soc_component_driver sun50i_codec_analog_cmpnt_drv = { - .num_dapm_widgets = ARRAY_SIZE(sun50i_a64_codec_widgets), - .dapm_routes = sun50i_a64_codec_routes, - .num_dapm_routes = ARRAY_SIZE(sun50i_a64_codec_routes), -- .suspend = sun50i_a64_codec_suspend, -- .resume = sun50i_a64_codec_resume, -+ .probe = sun50i_a64_codec_probe, -+ .set_bias_level = sun50i_a64_codec_set_bias_level, -+ .idle_bias_on = true, -+ .suspend_bias_off = true, - }; - - static const struct of_device_id sun50i_codec_analog_of_match[] = { -@@ -505,9 +561,19 @@ MODULE_DEVICE_TABLE(of, sun50i_codec_analog_of_match); - - static int sun50i_codec_analog_probe(struct platform_device *pdev) - { -+ struct sun50i_codec_analog *codec; - struct regmap *regmap; - void __iomem *base; - -+ codec = devm_kzalloc(&pdev->dev, sizeof(*codec), GFP_KERNEL); -+ if (!codec) -+ return -ENOMEM; -+ -+ codec->internal_bias_resistor = of_property_read_bool(pdev->dev.of_node, -+ "allwinner,internal-bias-resistor"); -+ -+ platform_set_drvdata(pdev, codec); -+ - base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) { - dev_err(&pdev->dev, "Failed to map the registers\n"); -diff --git a/sound/soc/sunxi/sun8i-codec.c b/sound/soc/sunxi/sun8i-codec.c -index 180442c62be1..4265d77e13aa 100644 ---- a/sound/soc/sunxi/sun8i-codec.c -+++ b/sound/soc/sunxi/sun8i-codec.c -@@ -12,15 +12,21 @@ - #include - #include - #include -+#include - #include -+#include - #include - #include - #include -+#include - #include -+#include - -+#include - #include - #include - #include -+#include - - #define SUN8I_SYSCLK_CTL 0x00c - #define SUN8I_SYSCLK_CTL_AIF1CLK_ENA 11 -@@ -72,6 +78,12 @@ - #define SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_AIF2DACR 10 - #define SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_ADCR 9 - #define SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_AIF2DACL 8 -+#define SUN8I_AIF1_VOL_CTRL1 0x050 -+#define SUN8I_AIF1_VOL_CTRL1_AD0L_VOL 8 -+#define SUN8I_AIF1_VOL_CTRL1_AD0R_VOL 0 -+#define SUN8I_AIF1_VOL_CTRL3 0x058 -+#define SUN8I_AIF1_VOL_CTRL3_DA0L_VOL 8 -+#define SUN8I_AIF1_VOL_CTRL3_DA0R_VOL 0 - #define SUN8I_AIF2_ADCDAT_CTRL 0x084 - #define SUN8I_AIF2_ADCDAT_CTRL_AIF2_ADCL_ENA 15 - #define SUN8I_AIF2_ADCDAT_CTRL_AIF2_ADCR_ENA 14 -@@ -91,6 +103,12 @@ - #define SUN8I_AIF2_MXR_SRC_ADCR_MXR_SRC_AIF1DA1R 10 - #define SUN8I_AIF2_MXR_SRC_ADCR_MXR_SRC_AIF2DACL 9 - #define SUN8I_AIF2_MXR_SRC_ADCR_MXR_SRC_ADCR 8 -+#define SUN8I_AIF2_VOL_CTRL1 0x090 -+#define SUN8I_AIF2_VOL_CTRL1_ADCL_VOL 8 -+#define SUN8I_AIF2_VOL_CTRL1_ADCR_VOL 0 -+#define SUN8I_AIF2_VOL_CTRL2 0x098 -+#define SUN8I_AIF2_VOL_CTRL2_DACL_VOL 8 -+#define SUN8I_AIF2_VOL_CTRL2_DACR_VOL 0 - #define SUN8I_AIF3_CLK_CTRL_AIF3_CLK_SRC_AIF1 (0x0 << 0) - #define SUN8I_AIF3_CLK_CTRL_AIF3_CLK_SRC_AIF2 (0x1 << 0) - #define SUN8I_AIF3_CLK_CTRL_AIF3_CLK_SRC_AIF1CLK (0x2 << 0) -@@ -102,8 +120,27 @@ - #define SUN8I_ADC_DIG_CTRL_ENAD 15 - #define SUN8I_ADC_DIG_CTRL_ADOUT_DTS 2 - #define SUN8I_ADC_DIG_CTRL_ADOUT_DLY 1 -+#define SUN8I_ADC_VOL_CTRL 0x104 -+#define SUN8I_ADC_VOL_CTRL_ADCL_VOL 8 -+#define SUN8I_ADC_VOL_CTRL_ADCR_VOL 0 -+#define SUN8I_HMIC_CTRL1 0x110 -+#define SUN8I_HMIC_CTRL1_HMIC_N 8 -+#define SUN8I_HMIC_CTRL1_JACK_OUT_IRQ_EN 4 -+#define SUN8I_HMIC_CTRL1_JACK_IN_IRQ_EN 3 -+#define SUN8I_HMIC_CTRL1_HMIC_DATA_IRQ_EN 0 -+#define SUN8I_HMIC_CTRL2 0x114 -+#define SUN8I_HMIC_CTRL2_HMIC_SAMPLE 14 -+#define SUN8I_HMIC_CTRL2_HMIC_SF 6 -+#define SUN8I_HMIC_STS 0x118 -+#define SUN8I_HMIC_STS_HMIC_DATA 8 -+#define SUN8I_HMIC_STS_JACK_OUT_IRQ_ST 4 -+#define SUN8I_HMIC_STS_JACK_IN_IRQ_ST 3 -+#define SUN8I_HMIC_STS_HMIC_DATA_IRQ_ST 0 - #define SUN8I_DAC_DIG_CTRL 0x120 - #define SUN8I_DAC_DIG_CTRL_ENDA 15 -+#define SUN8I_DAC_VOL_CTRL 0x124 -+#define SUN8I_DAC_VOL_CTRL_DACL_VOL 8 -+#define SUN8I_DAC_VOL_CTRL_DACR_VOL 0 - #define SUN8I_DAC_MXR_SRC 0x130 - #define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA0L 15 - #define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA1L 14 -@@ -124,6 +161,14 @@ - #define SUN8I_AIF_CLK_CTRL_WORD_SIZ_MASK GENMASK(5, 4) - #define SUN8I_AIF_CLK_CTRL_DATA_FMT_MASK GENMASK(3, 2) - #define SUN8I_AIF3_CLK_CTRL_AIF3_CLK_SRC_MASK GENMASK(1, 0) -+#define SUN8I_HMIC_CTRL1_HMIC_N_MASK GENMASK(11, 8) -+#define SUN8I_HMIC_CTRL2_HMIC_SAMPLE_MASK GENMASK(15, 14) -+#define SUN8I_HMIC_CTRL2_HMIC_SF_MASK GENMASK(7, 6) -+#define SUN8I_HMIC_STS_HMIC_DATA_MASK GENMASK(12, 8) -+ -+#define SUN8I_CODEC_BUTTONS (SND_JACK_BTN_0|\ -+ SND_JACK_BTN_1|\ -+ SND_JACK_BTN_2) - - #define SUN8I_CODEC_PASSTHROUGH_SAMPLE_RATE 48000 - -@@ -158,17 +203,31 @@ struct sun8i_codec_aif { - }; - - struct sun8i_codec_quirks { -- bool legacy_widgets : 1; -- bool lrck_inversion : 1; -+ bool bus_clock : 1; -+ bool jack_detection : 1; -+ bool legacy_widgets : 1; -+ bool lrck_inversion : 1; - }; - -+#define AC100_NUM_SUPPLIES 4 -+ - struct sun8i_codec { - struct regmap *regmap; -+ struct snd_soc_card *card; -+ struct clk *clk_bus; - struct clk *clk_module; - const struct sun8i_codec_quirks *quirks; - struct sun8i_codec_aif aifs[SUN8I_CODEC_NAIFS]; -+ struct snd_soc_jack jack; -+ struct delayed_work jack_work; -+ int jack_irq; -+ int jack_pending; -+ int jack_type; - unsigned int sysclk_rate; - int sysclk_refcnt; -+ -+ struct regmap *ac100_regmap; -+ struct regulator_bulk_data supplies[AC100_NUM_SUPPLIES]; - }; - - static struct snd_soc_dai_driver sun8i_codec_dais[]; -@@ -178,6 +237,14 @@ static int sun8i_codec_runtime_resume(struct device *dev) - struct sun8i_codec *scodec = dev_get_drvdata(dev); - int ret; - -+ if (scodec->clk_bus) { -+ ret = clk_prepare_enable(scodec->clk_bus); -+ if (ret) { -+ dev_err(dev, "Failed to enable the bus clock\n"); -+ return ret; -+ } -+ } -+ - regcache_cache_only(scodec->regmap, false); - - ret = regcache_sync(scodec->regmap); -@@ -196,6 +263,9 @@ static int sun8i_codec_runtime_suspend(struct device *dev) - regcache_cache_only(scodec->regmap, true); - regcache_mark_dirty(scodec->regmap); - -+ if (scodec->clk_bus) -+ clk_disable_unprepare(scodec->clk_bus); -+ - return 0; - } - -@@ -561,6 +631,7 @@ static int sun8i_codec_hw_params(struct snd_pcm_substream *substream, - SUN8I_AIF_CLK_CTRL_BCLK_DIV_MASK, - bclk_div << SUN8I_AIF_CLK_CTRL_BCLK_DIV); - -+ if (!scodec->ac100_regmap) { - /* - * SYSCLK rate - * -@@ -582,6 +653,7 @@ static int sun8i_codec_hw_params(struct snd_pcm_substream *substream, - if (!aif->open_streams) - scodec->sysclk_refcnt++; - scodec->sysclk_rate = sysclk_rate; -+ } - - aif->lrck_div_order = lrck_div_order; - aif->sample_rate = sample_rate; -@@ -600,8 +672,11 @@ static int sun8i_codec_hw_free(struct snd_pcm_substream *substream, - if (aif->open_streams != BIT(substream->stream)) - goto done; - -- clk_rate_exclusive_put(scodec->clk_module); -- scodec->sysclk_refcnt--; -+ if (!scodec->ac100_regmap) { -+ clk_rate_exclusive_put(scodec->clk_module); -+ scodec->sysclk_refcnt--; -+ } -+ - aif->lrck_div_order = 0; - aif->sample_rate = 0; - -@@ -696,6 +771,41 @@ static struct snd_soc_dai_driver sun8i_codec_dais[] = { - }, - }; - -+static const DECLARE_TLV_DB_SCALE(sun8i_codec_vol_scale, -12000, 75, 1); -+ -+static const struct snd_kcontrol_new sun8i_codec_controls[] = { -+ SOC_DOUBLE_TLV("AIF1 AD0 Capture Volume", -+ SUN8I_AIF1_VOL_CTRL1, -+ SUN8I_AIF1_VOL_CTRL1_AD0L_VOL, -+ SUN8I_AIF1_VOL_CTRL1_AD0R_VOL, -+ 0xc0, 0, sun8i_codec_vol_scale), -+ SOC_DOUBLE_TLV("AIF1 DA0 Playback Volume", -+ SUN8I_AIF1_VOL_CTRL3, -+ SUN8I_AIF1_VOL_CTRL3_DA0L_VOL, -+ SUN8I_AIF1_VOL_CTRL3_DA0R_VOL, -+ 0xc0, 0, sun8i_codec_vol_scale), -+ SOC_DOUBLE_TLV("AIF2 ADC Capture Volume", -+ SUN8I_AIF2_VOL_CTRL1, -+ SUN8I_AIF2_VOL_CTRL1_ADCL_VOL, -+ SUN8I_AIF2_VOL_CTRL1_ADCR_VOL, -+ 0xc0, 0, sun8i_codec_vol_scale), -+ SOC_DOUBLE_TLV("AIF2 DAC Playback Volume", -+ SUN8I_AIF2_VOL_CTRL2, -+ SUN8I_AIF2_VOL_CTRL2_DACL_VOL, -+ SUN8I_AIF2_VOL_CTRL2_DACR_VOL, -+ 0xc0, 0, sun8i_codec_vol_scale), -+ SOC_DOUBLE_TLV("ADC Capture Volume", -+ SUN8I_ADC_VOL_CTRL, -+ SUN8I_ADC_VOL_CTRL_ADCL_VOL, -+ SUN8I_ADC_VOL_CTRL_ADCR_VOL, -+ 0xc0, 0, sun8i_codec_vol_scale), -+ SOC_DOUBLE_TLV("DAC Playback Volume", -+ SUN8I_DAC_VOL_CTRL, -+ SUN8I_DAC_VOL_CTRL_DACL_VOL, -+ SUN8I_DAC_VOL_CTRL_DACR_VOL, -+ 0xc0, 0, sun8i_codec_vol_scale), -+}; -+ - static int sun8i_codec_aif_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) - { -@@ -839,8 +949,6 @@ static const struct snd_kcontrol_new sun8i_dac_mixer_controls[] = { - - static const struct snd_soc_dapm_widget sun8i_codec_dapm_widgets[] = { - /* System Clocks */ -- SND_SOC_DAPM_CLOCK_SUPPLY("mod"), -- - SND_SOC_DAPM_SUPPLY("AIF1CLK", - SUN8I_SYSCLK_CTL, - SUN8I_SYSCLK_CTL_AIF1CLK_ENA, 0, NULL, 0), -@@ -1001,8 +1109,6 @@ static const struct snd_soc_dapm_widget sun8i_codec_dapm_widgets[] = { - - static const struct snd_soc_dapm_route sun8i_codec_dapm_routes[] = { - /* Clock Routes */ -- { "AIF1CLK", NULL, "mod" }, -- - { "SYSCLK", NULL, "AIF1CLK" }, - - { "CLK AIF1", NULL, "AIF1CLK" }, -@@ -1172,12 +1278,103 @@ static const struct snd_soc_dapm_route sun8i_codec_legacy_routes[] = { - { "AIF1 Slot 0 Right", NULL, "DACR" }, - }; - -+static const struct snd_soc_dapm_widget sun8i_codec_dapm_widgets_sun8i[] = { -+ SND_SOC_DAPM_CLOCK_SUPPLY("mod"), -+}; -+ -+static const struct snd_soc_dapm_route sun8i_codec_dapm_routes_sun8i[] = { -+ { "AIF1CLK", NULL, "mod" }, -+}; -+ -+static struct snd_soc_jack_pin sun8i_codec_jack_pins[] = { -+ { -+ .pin = "Headphone Jack", -+ .mask = SND_JACK_HEADPHONE, -+ }, -+ { -+ .pin = "Headset Microphone", -+ .mask = SND_JACK_MICROPHONE, -+ }, -+}; -+ -+static int sun8i_codec_jack_init(struct sun8i_codec *scodec) -+{ -+ int pins = 0; -+ int type = 0; -+ int i, ret; -+ -+ for (i = 0; i < ARRAY_SIZE(sun8i_codec_jack_pins); ++i) { -+ struct snd_soc_jack_pin *pin = &sun8i_codec_jack_pins[i]; -+ struct snd_soc_dapm_widget *w; -+ -+ for_each_card_widgets(scodec->card, w) { -+ if (!strcmp(pin->pin, w->name)) { -+ pins |= BIT(i); -+ type |= pin->mask; -+ break; -+ } -+ } -+ } -+ -+ if (!type) -+ return 0; -+ -+ if (type & SND_JACK_MICROPHONE) -+ type |= SUN8I_CODEC_BUTTONS; -+ -+ ret = snd_soc_card_jack_new(scodec->card, "Headset Jack", type, -+ &scodec->jack, NULL, 0); -+ if (ret) -+ return ret; -+ -+ for (i = 0; i < ARRAY_SIZE(sun8i_codec_jack_pins); ++i) { -+ struct snd_soc_jack_pin *pin = &sun8i_codec_jack_pins[i]; -+ -+ if (pins & BIT(i)) { -+ ret = snd_soc_jack_add_pins(&scodec->jack, 1, pin); -+ if (ret) -+ return ret; -+ } -+ } -+ -+ if (type & SND_JACK_MICROPHONE) { -+ struct snd_jack *jack = scodec->jack.jack; -+ -+ snd_jack_set_key(jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); -+ snd_jack_set_key(jack, SND_JACK_BTN_1, KEY_VOLUMEUP); -+ snd_jack_set_key(jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN); -+ } -+ -+ scodec->jack_type = type; -+ -+ return 0; -+} -+ -+static int ac100_codec_component_probe(struct snd_soc_component *component); -+ - static int sun8i_codec_component_probe(struct snd_soc_component *component) - { - struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); - struct sun8i_codec *scodec = snd_soc_component_get_drvdata(component); - int ret; - -+ if (scodec->ac100_regmap) -+ return ac100_codec_component_probe(component); -+ -+ ret = snd_soc_dapm_new_controls(dapm, -+ sun8i_codec_dapm_widgets_sun8i, -+ ARRAY_SIZE(sun8i_codec_dapm_widgets_sun8i)); -+ if (ret) -+ return ret; -+ -+ ret = snd_soc_dapm_add_routes(dapm, -+ sun8i_codec_dapm_routes_sun8i, -+ ARRAY_SIZE(sun8i_codec_dapm_routes_sun8i)); -+ if (ret) -+ return ret; -+ -+ scodec->card = component->card; -+ - /* Add widgets for backward compatibility with old device trees. */ - if (scodec->quirks->legacy_widgets) { - ret = snd_soc_dapm_new_controls(dapm, sun8i_codec_legacy_widgets, -@@ -1211,39 +1408,365 @@ static int sun8i_codec_component_probe(struct snd_soc_component *component) - /* Program the default sample rate. */ - sun8i_codec_update_sample_rate(scodec); - -+ if (scodec->quirks->jack_detection) { -+ ret = sun8i_codec_jack_init(scodec); -+ if (ret) -+ return ret; -+ } -+ -+ if (scodec->jack_type) { -+ int irq_mask = BIT(SUN8I_HMIC_CTRL1_JACK_OUT_IRQ_EN) | -+ BIT(SUN8I_HMIC_CTRL1_JACK_IN_IRQ_EN); -+ -+ /* Reserved value required for jack IRQs to trigger. */ -+ regmap_update_bits(scodec->regmap, SUN8I_HMIC_CTRL1, -+ SUN8I_HMIC_CTRL1_HMIC_N_MASK, -+ 0xf << SUN8I_HMIC_CTRL1_HMIC_N); -+ -+ /* Sample the ADC at 64 Hz; average across 2 samples. */ -+ regmap_update_bits(scodec->regmap, SUN8I_HMIC_CTRL2, -+ SUN8I_HMIC_CTRL2_HMIC_SAMPLE_MASK | -+ SUN8I_HMIC_CTRL2_HMIC_SF_MASK, -+ 0x1 << SUN8I_HMIC_CTRL2_HMIC_SAMPLE | -+ 0x1 << SUN8I_HMIC_CTRL2_HMIC_SF); -+ -+ regmap_update_bits(scodec->regmap, SUN8I_HMIC_CTRL1, -+ irq_mask, irq_mask); -+ -+ enable_irq(scodec->jack_irq); -+ } -+ - return 0; - } - -+static void sun8i_codec_component_remove(struct snd_soc_component *component) -+{ -+ struct sun8i_codec *scodec = snd_soc_component_get_drvdata(component); -+ -+ if (scodec->jack_type) { -+ int irq_mask = BIT(SUN8I_HMIC_CTRL1_JACK_OUT_IRQ_EN) | -+ BIT(SUN8I_HMIC_CTRL1_JACK_IN_IRQ_EN) | -+ BIT(SUN8I_HMIC_CTRL1_HMIC_DATA_IRQ_EN); -+ -+ disable_irq(scodec->jack_irq); -+ cancel_delayed_work_sync(&scodec->jack_work); -+ -+ regmap_update_bits(scodec->regmap, SUN8I_HMIC_CTRL1, -+ irq_mask, 0); -+ } -+} -+ - static const struct snd_soc_component_driver sun8i_soc_component = { -+ .controls = sun8i_codec_controls, -+ .num_controls = ARRAY_SIZE(sun8i_codec_controls), - .dapm_widgets = sun8i_codec_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(sun8i_codec_dapm_widgets), - .dapm_routes = sun8i_codec_dapm_routes, - .num_dapm_routes = ARRAY_SIZE(sun8i_codec_dapm_routes), - .probe = sun8i_codec_component_probe, -+ .remove = sun8i_codec_component_remove, - .idle_bias_on = 1, -+ .suspend_bias_off = 1, - .endianness = 1, - .non_legacy_dai_naming = 1, - }; - --static const struct regmap_config sun8i_codec_regmap_config = { -+static bool sun8i_codec_volatile_reg(struct device *dev, unsigned int reg) -+{ -+ return reg == SUN8I_HMIC_STS; -+} -+ -+static struct regmap_config sun8i_codec_regmap_config = { - .reg_bits = 32, - .reg_stride = 4, - .val_bits = 32, -+ .volatile_reg = sun8i_codec_volatile_reg, - .max_register = SUN8I_DAC_MXR_SRC, - - .cache_type = REGCACHE_FLAT, - }; - -+static int sun8i_codec_read_hmic_button(struct sun8i_codec *scodec) -+{ -+ unsigned int value; -+ int button; -+ -+ regmap_read(scodec->regmap, SUN8I_HMIC_STS, &value); -+ value &= SUN8I_HMIC_STS_HMIC_DATA_MASK; -+ value >>= SUN8I_HMIC_STS_HMIC_DATA; -+ -+ if (value < 0x2) -+ button = SND_JACK_BTN_0; -+ else if (value < 0x7) -+ button = SND_JACK_BTN_1; -+ else if (value < 0x10) -+ button = SND_JACK_BTN_2; -+ else -+ button = 0; -+ -+ dev_dbg(scodec->card->dev, "HMIC ADC read %u => %#x\n", value, button); -+ -+ return button; -+} -+ -+static void sun8i_codec_set_hmic_bias(struct sun8i_codec *scodec, bool enable) -+{ -+ struct snd_soc_dapm_context *dapm = &scodec->card->dapm; -+ int irq_mask = BIT(SUN8I_HMIC_CTRL1_HMIC_DATA_IRQ_EN); -+ -+ if (enable) -+ snd_soc_dapm_force_enable_pin(dapm, "HBIAS"); -+ else -+ snd_soc_dapm_disable_pin(dapm, "HBIAS"); -+ snd_soc_dapm_sync(dapm); -+ -+ dev_dbg(scodec->card->dev, "HMIC bias %s\n", enable ? "on" : "off"); -+ -+ regmap_update_bits(scodec->regmap, SUN8I_HMIC_CTRL1, -+ irq_mask, enable ? irq_mask : 0); -+} -+ -+static void sun8i_codec_jack_work(struct work_struct *work) -+{ -+ struct sun8i_codec *scodec = container_of(work, struct sun8i_codec, -+ jack_work.work); -+ int type; -+ -+ /* Prevent a well-timed button press from affecting detection. */ -+ synchronize_irq(scodec->jack_irq); -+ if (!scodec->jack_pending) -+ return; -+ -+ if (sun8i_codec_read_hmic_button(scodec)) { -+ sun8i_codec_set_hmic_bias(scodec, false); -+ type = SND_JACK_HEADPHONE; -+ } else { -+ type = SND_JACK_HEADSET; -+ } -+ -+ snd_soc_jack_report(&scodec->jack, type, scodec->jack_type); -+} -+ -+static irqreturn_t sun8i_codec_jack_irq(int irq, void *dev_id) -+{ -+ struct sun8i_codec *scodec = dev_id; -+ unsigned int status; -+ -+ regmap_read(scodec->regmap, SUN8I_HMIC_STS, &status); -+ -+ if (status & BIT(SUN8I_HMIC_STS_JACK_OUT_IRQ_ST)) { -+ if (scodec->jack_type & SND_JACK_MICROPHONE) { -+ sun8i_codec_set_hmic_bias(scodec, false); -+ scodec->jack_pending = false; -+ } -+ -+ dev_dbg(scodec->card->dev, "jack out\n"); -+ snd_soc_jack_report(&scodec->jack, 0, scodec->jack_type); -+ } else if (status & BIT(SUN8I_HMIC_STS_JACK_IN_IRQ_ST)) { -+ int type = SND_JACK_HEADPHONE; -+ -+ if (scodec->jack_type & SND_JACK_MICROPHONE) { -+ sun8i_codec_set_hmic_bias(scodec, true); -+ scodec->jack_pending = true; -+ queue_delayed_work(system_power_efficient_wq, -+ &scodec->jack_work, -+ msecs_to_jiffies(600)); -+ } -+ -+ dev_dbg(scodec->card->dev, "jack in\n"); -+ snd_soc_jack_report(&scodec->jack, type, type); -+ } else if (status & BIT(SUN8I_HMIC_STS_HMIC_DATA_IRQ_ST)) { -+ int type = SND_JACK_HEADSET | sun8i_codec_read_hmic_button(scodec); -+ -+ scodec->jack_pending = false; -+ snd_soc_jack_report(&scodec->jack, type, scodec->jack_type); -+ } else { -+ return IRQ_NONE; -+ } -+ -+ regmap_write(scodec->regmap, SUN8I_HMIC_STS, status); -+ -+ return IRQ_HANDLED; -+} -+ -+/* AC100 Codec Support (digital parts) */ -+ -+static int sun8i_codec_ac100_regmap_read(void *context, unsigned int reg, unsigned int *val) -+{ -+ struct sun8i_codec *scodec = context; -+ -+ return regmap_read(scodec->ac100_regmap, reg / 4, val); -+} -+ -+static int sun8i_codec_ac100_regmap_write(void *context, unsigned int reg, unsigned int val) -+{ -+ struct sun8i_codec *scodec = context; -+ -+ return regmap_write(scodec->ac100_regmap, reg / 4, val); -+} -+ -+static struct regmap_bus sun8i_codec_ac100_regmap_bus = { -+ .reg_write = sun8i_codec_ac100_regmap_write, -+ .reg_read = sun8i_codec_ac100_regmap_read, -+}; -+ -+static const char *const ac100_supply_names[AC100_NUM_SUPPLIES] = { -+ "LDOIN", -+ "AVCC", -+ "VDDIO1", -+ "VDDIO2", -+}; -+ -+#define AC100_SYSCLK_CTRL_PLLCLK_ENA_OFF 15 -+#define AC100_SYSCLK_CTRL_PLLCLK_ENA_MASK BIT(15) -+#define AC100_SYSCLK_CTRL_PLLCLK_ENA_DISABLED 0 -+#define AC100_SYSCLK_CTRL_PLLCLK_ENA_ENABLED BIT(15) -+#define AC100_SYSCLK_CTRL_PLLCLK_SRC_OFF 12 -+#define AC100_SYSCLK_CTRL_PLLCLK_SRC_MASK GENMASK(13, 12) -+#define AC100_SYSCLK_CTRL_PLLCLK_SRC_MCLK1 (0x0 << 12) -+#define AC100_SYSCLK_CTRL_PLLCLK_SRC_MCLK2 (0x1 << 12) -+#define AC100_SYSCLK_CTRL_PLLCLK_SRC_BCLK1 (0x2 << 12) -+#define AC100_SYSCLK_CTRL_PLLCLK_SRC_BCLK2 (0x3 << 12) -+#define AC100_SYSCLK_CTRL_I2S1CLK_ENA_OFF 11 -+#define AC100_SYSCLK_CTRL_I2S1CLK_ENA_MASK BIT(11) -+#define AC100_SYSCLK_CTRL_I2S1CLK_ENA_DISABLED 0 -+#define AC100_SYSCLK_CTRL_I2S1CLK_ENA_ENABLED BIT(11) -+#define AC100_SYSCLK_CTRL_I2S1CLK_SRC_OFF 8 -+#define AC100_SYSCLK_CTRL_I2S1CLK_SRC_MASK GENMASK(9, 8) -+#define AC100_SYSCLK_CTRL_I2S1CLK_SRC_MCLK1 (0x0 << 8) -+#define AC100_SYSCLK_CTRL_I2S1CLK_SRC_MCLK2 (0x1 << 8) -+#define AC100_SYSCLK_CTRL_I2S1CLK_SRC_PLL (0x2 << 8) -+#define AC100_SYSCLK_CTRL_I2S2CLK_ENA_OFF 7 -+#define AC100_SYSCLK_CTRL_I2S2CLK_ENA_MASK BIT(7) -+#define AC100_SYSCLK_CTRL_I2S2CLK_ENA_DISABLED 0 -+#define AC100_SYSCLK_CTRL_I2S2CLK_ENA_ENABLED BIT(7) -+#define AC100_SYSCLK_CTRL_I2S2CLK_SRC_OFF 4 -+#define AC100_SYSCLK_CTRL_I2S2CLK_SRC_MASK GENMASK(5, 4) -+#define AC100_SYSCLK_CTRL_I2S2CLK_SRC_MCLK1 (0x0 << 4) -+#define AC100_SYSCLK_CTRL_I2S2CLK_SRC_MCLK2 (0x1 << 4) -+#define AC100_SYSCLK_CTRL_I2S2CLK_SRC_PLL (0x2 << 4) -+#define AC100_SYSCLK_CTRL_SYSCLK_ENA_OFF 3 -+#define AC100_SYSCLK_CTRL_SYSCLK_ENA_MASK BIT(3) -+#define AC100_SYSCLK_CTRL_SYSCLK_ENA_DISABLED 0 -+#define AC100_SYSCLK_CTRL_SYSCLK_ENA_ENABLED BIT(3) -+#define AC100_SYSCLK_CTRL_SYSCLK_SRC_OFF 0 -+#define AC100_SYSCLK_CTRL_SYSCLK_SRC_MASK BIT(0) -+#define AC100_SYSCLK_CTRL_SYSCLK_SRC_I2S1CLK 0 -+#define AC100_SYSCLK_CTRL_SYSCLK_SRC_I2S2CLK BIT(0) -+ -+ -+static int ac100_codec_component_probe(struct snd_soc_component *component) -+{ -+ struct sun8i_codec *scodec = snd_soc_component_get_drvdata(component); -+ -+ // The system clock(SYSCLK) of AC100 must be 512*fs(fs=48KHz or 44.1KHz) -+ -+ // Source clocks from the SoC -+ -+ regmap_update_bits(scodec->ac100_regmap, AC100_SYSCLK_CTRL, -+ AC100_SYSCLK_CTRL_I2S1CLK_SRC_MASK, -+ AC100_SYSCLK_CTRL_I2S1CLK_SRC_MCLK1); -+ regmap_update_bits(scodec->ac100_regmap, AC100_SYSCLK_CTRL, -+ AC100_SYSCLK_CTRL_I2S2CLK_SRC_MASK, -+ AC100_SYSCLK_CTRL_I2S2CLK_SRC_MCLK1); -+ regmap_update_bits(scodec->ac100_regmap, AC100_SYSCLK_CTRL, -+ AC100_SYSCLK_CTRL_SYSCLK_SRC_MASK, -+ AC100_SYSCLK_CTRL_SYSCLK_SRC_I2S1CLK); -+ -+ /* Program the default sample rate. */ -+ sun8i_codec_update_sample_rate(scodec); -+ -+ return 0; -+} -+ -+static int sun8i_codec_probe_ac100(struct platform_device *pdev) -+{ -+ struct ac100_dev *ac100 = dev_get_drvdata(pdev->dev.parent); -+ struct device* dev = &pdev->dev; -+ struct sun8i_codec *scodec; -+ int ret, i; -+ -+ scodec = devm_kzalloc(dev, sizeof(*scodec), GFP_KERNEL); -+ if (!scodec) -+ return -ENOMEM; -+ -+ scodec->quirks = of_device_get_match_data(&pdev->dev); -+ scodec->ac100_regmap = ac100->regmap; -+ -+ platform_set_drvdata(pdev, scodec); -+ -+ // caching is done by the MFD regmap -+ sun8i_codec_regmap_config.cache_type = REGCACHE_NONE; -+ -+ // we need to create a custom regmap_bus that will map reads/writes to the MFD regmap -+ scodec->regmap = __regmap_lockdep_wrapper(__devm_regmap_init, -+ "ac100-regmap-codec", dev, -+ &sun8i_codec_ac100_regmap_bus, scodec, -+ &sun8i_codec_regmap_config); -+ if (IS_ERR(scodec->regmap)) { -+ dev_err(dev, "Failed to create our regmap\n"); -+ return PTR_ERR(scodec->regmap); -+ } -+ -+ for (i = 0; i < ARRAY_SIZE(scodec->supplies); i++) -+ scodec->supplies[i].supply = ac100_supply_names[i]; -+ -+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(scodec->supplies), -+ scodec->supplies); -+ if (ret != 0) { -+ if (ret != -EPROBE_DEFER) -+ dev_err(dev, "Failed to request supplies: %d\n", ret); -+ return ret; -+ } -+ -+ ret = regulator_bulk_enable(ARRAY_SIZE(scodec->supplies), -+ scodec->supplies); -+ if (ret != 0) { -+ dev_err(dev, "Failed to enable supplies: %d\n", ret); -+ return ret; -+ } -+ -+ ret = devm_snd_soc_register_component(dev, &sun8i_soc_component, -+ sun8i_codec_dais, -+ ARRAY_SIZE(sun8i_codec_dais)); -+ if (ret) { -+ dev_err(dev, "Failed to register codec\n"); -+ goto err_disable_reg; -+ } -+ -+ return ret; -+ -+err_disable_reg: -+ regulator_bulk_disable(ARRAY_SIZE(scodec->supplies), -+ scodec->supplies); -+ return ret; -+} -+ - static int sun8i_codec_probe(struct platform_device *pdev) - { - struct sun8i_codec *scodec; - void __iomem *base; - int ret; - -+ if (of_device_is_compatible(pdev->dev.of_node, "x-powers,ac100-codec")) -+ return sun8i_codec_probe_ac100(pdev); -+ - scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL); - if (!scodec) - return -ENOMEM; - -+ scodec->quirks = of_device_get_match_data(&pdev->dev); -+ -+ platform_set_drvdata(pdev, scodec); -+ -+ if (scodec->quirks->bus_clock) { -+ scodec->clk_bus = devm_clk_get(&pdev->dev, "bus"); -+ if (IS_ERR(scodec->clk_bus)) { -+ dev_err(&pdev->dev, "Failed to get the bus clock\n"); -+ return PTR_ERR(scodec->clk_bus); -+ } -+ } -+ - scodec->clk_module = devm_clk_get(&pdev->dev, "mod"); - if (IS_ERR(scodec->clk_module)) { - dev_err(&pdev->dev, "Failed to get the module clock\n"); -@@ -1256,17 +1779,30 @@ static int sun8i_codec_probe(struct platform_device *pdev) - return PTR_ERR(base); - } - -- scodec->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "bus", base, -- &sun8i_codec_regmap_config); -+ scodec->regmap = devm_regmap_init_mmio(&pdev->dev, base, -+ &sun8i_codec_regmap_config); - if (IS_ERR(scodec->regmap)) { - dev_err(&pdev->dev, "Failed to create our regmap\n"); - return PTR_ERR(scodec->regmap); - } - -- scodec->quirks = of_device_get_match_data(&pdev->dev); -+ if (scodec->quirks->jack_detection) { -+ scodec->jack_irq = platform_get_irq(pdev, 0); -+ if (scodec->jack_irq < 0) -+ return scodec->jack_irq; - -- platform_set_drvdata(pdev, scodec); -+ irq_set_status_flags(scodec->jack_irq, IRQ_NOAUTOEN); -+ ret = devm_request_threaded_irq(&pdev->dev, scodec->jack_irq, -+ NULL, sun8i_codec_jack_irq, -+ IRQF_ONESHOT, -+ dev_name(&pdev->dev), scodec); -+ if (ret) -+ return ret; -+ -+ INIT_DELAYED_WORK(&scodec->jack_work, sun8i_codec_jack_work); -+ } - -+ regcache_cache_only(scodec->regmap, true); - pm_runtime_enable(&pdev->dev); - if (!pm_runtime_enabled(&pdev->dev)) { - ret = sun8i_codec_runtime_resume(&pdev->dev); -@@ -1296,6 +1832,14 @@ err_pm_disable: - - static int sun8i_codec_remove(struct platform_device *pdev) - { -+ struct sun8i_codec *scodec = dev_get_drvdata(&pdev->dev); -+ -+ if (scodec->ac100_regmap) { -+ regulator_bulk_disable(ARRAY_SIZE(scodec->supplies), -+ scodec->supplies); -+ return 0; -+ } -+ - pm_runtime_disable(&pdev->dev); - if (!pm_runtime_status_suspended(&pdev->dev)) - sun8i_codec_runtime_suspend(&pdev->dev); -@@ -1304,16 +1848,23 @@ static int sun8i_codec_remove(struct platform_device *pdev) - } - - static const struct sun8i_codec_quirks sun8i_a33_quirks = { -+ .bus_clock = true, - .legacy_widgets = true, - .lrck_inversion = true, - }; - - static const struct sun8i_codec_quirks sun50i_a64_quirks = { -+ .bus_clock = true, -+ .jack_detection = true, -+}; -+ -+static const struct sun8i_codec_quirks ac100_quirks = { - }; - - static const struct of_device_id sun8i_codec_of_match[] = { - { .compatible = "allwinner,sun8i-a33-codec", .data = &sun8i_a33_quirks }, - { .compatible = "allwinner,sun50i-a64-codec", .data = &sun50i_a64_quirks }, -+ { .compatible = "x-powers,ac100-codec", .data = &ac100_quirks }, - {} - }; - MODULE_DEVICE_TABLE(of, sun8i_codec_of_match); -diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h -index ba2f439..401d850 100644 ---- a/include/net/bluetooth/hci.h -+++ b/include/net/bluetooth/hci.h -@@ -246,6 +246,14 @@ enum { - * HCI after resume. - */ - HCI_QUIRK_NO_SUSPEND_NOTIFIER, -+ -+ /* When this quirk is set, max_page for local extended features -+ * is set to 1, even if controller reports higher number. Some -+ * controllers (e.g. RTL8723CS) report more pages, but they -+ * don't actually support features declared there. -+ */ -+ HCI_QUIRK_BROKEN_LOCAL_EXT_FTR_MAX_PAGE, -+ - }; - - /* HCI device flags */ diff --git a/sys-kernel/pinephone-sources/files/camera-added-bggr-bayer-mode.patch b/sys-kernel/pinephone-sources/files/camera-added-bggr-bayer-mode.patch deleted file mode 100644 index c7b869d..0000000 --- a/sys-kernel/pinephone-sources/files/camera-added-bggr-bayer-mode.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 298c18c5bdc5f1ff302e6c83d642a7ce6307c921 Mon Sep 17 00:00:00 2001 -From: Martijn Braam -Date: Fri, 4 Sep 2020 17:35:39 +0200 -Subject: [PATCH] media: gc2145: Added BGGR bayer mode - -Not all raw bayer modes from the sensor match up with the ones defined -in v4l, mostly because they're mirrored. ---- - drivers/media/i2c/gc2145.c | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/drivers/media/i2c/gc2145.c b/drivers/media/i2c/gc2145.c -index 40a50ee17fd3..bed611045de9 100644 ---- a/drivers/media/i2c/gc2145.c -+++ b/drivers/media/i2c/gc2145.c -@@ -187,6 +187,11 @@ static const struct gc2145_pixfmt gc2145_formats[] = { - .colorspace = V4L2_COLORSPACE_SRGB, - .fmt_setup = 0x06, - }, -+ { -+ .code = MEDIA_BUS_FMT_SBGGR8_1X8, -+ .colorspace = V4L2_COLORSPACE_RAW, -+ .fmt_setup = 0x17, -+ }, - }; - - static const struct gc2145_pixfmt *gc2145_find_format(u32 code) --- -GitLab - diff --git a/sys-kernel/pinephone-sources/files/camera-autofocus.patch b/sys-kernel/pinephone-sources/files/camera-autofocus.patch deleted file mode 100644 index abb6941..0000000 --- a/sys-kernel/pinephone-sources/files/camera-autofocus.patch +++ /dev/null @@ -1,390 +0,0 @@ -From c2ea6ff2636e4e2bc88244c57197318b3d9d806b Mon Sep 17 00:00:00 2001 -From: Martijn Braam -Date: Mon, 28 Sep 2020 14:26:11 +0200 -Subject: [PATCH] media: ov5640: Implement autofocus - -The autofocus functionality needs a firmware blob loaded into the -internal microcontroller. - -V4L2 doesn't have an api to control all autofocus functionality, but -this at least makes it possible to focus on the center of the sensor. - -Signed-off-by: Martijn Braam ---- - drivers/media/i2c/ov5640.c | 254 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 254 insertions(+) - -diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c -index 16ecde24a192..d90fc35e8503 100644 ---- a/drivers/media/i2c/ov5640.c -+++ b/drivers/media/i2c/ov5640.c -@@ -9,6 +9,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -31,7 +32,11 @@ - - #define OV5640_DEFAULT_SLAVE_ID 0x3c - -+#define OV5640_REG_SYS_RESET00 0x3000 -+#define OV5640_REG_SYS_RESET01 0x3001 - #define OV5640_REG_SYS_RESET02 0x3002 -+#define OV5640_REG_SYS_CLOCK_ENABLE00 0x3004 -+#define OV5640_REG_SYS_CLOCK_ENABLE01 0x3005 - #define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006 - #define OV5640_REG_SYS_CTRL0 0x3008 - #define OV5640_REG_CHIP_ID 0x300a -@@ -39,6 +44,14 @@ - #define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017 - #define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018 - #define OV5640_REG_PAD_OUTPUT00 0x3019 -+#define OV5640_REG_FW_CMD_MAIN 0x3022 -+#define OV5640_REG_FW_CMD_ACK 0x3023 -+#define OV5640_REG_FW_CMD_PARA0 0x3024 -+#define OV5640_REG_FW_CMD_PARA1 0x3025 -+#define OV5640_REG_FW_CMD_PARA2 0x3026 -+#define OV5640_REG_FW_CMD_PARA3 0x3027 -+#define OV5640_REG_FW_CMD_PARA4 0x3028 -+#define OV5640_REG_FW_STATUS 0x3029 - #define OV5640_REG_SYSTEM_CONTROL1 0x302e - #define OV5640_REG_SC_PLL_CTRL0 0x3034 - #define OV5640_REG_SC_PLL_CTRL1 0x3035 -@@ -57,6 +70,7 @@ - #define OV5640_REG_AEC_PK_MANUAL 0x3503 - #define OV5640_REG_AEC_PK_REAL_GAIN 0x350a - #define OV5640_REG_AEC_PK_VTS 0x350c -+#define OV5640_REG_VCM_CONTROL4 0x3606 - #define OV5640_REG_TIMING_DVPHO 0x3808 - #define OV5640_REG_TIMING_DVPVO 0x380a - #define OV5640_REG_TIMING_HTS 0x380c -@@ -93,6 +107,20 @@ - #define OV5640_REG_SDE_CTRL4 0x5584 - #define OV5640_REG_SDE_CTRL5 0x5585 - #define OV5640_REG_AVG_READOUT 0x56a1 -+#define OV5640_REG_FIRMWARE_BASE 0x8000 -+ -+#define OV5640_FW_STATUS_S_FIRMWARE 0x7f -+#define OV5640_FW_STATUS_S_STARTUP 0x7e -+#define OV5640_FW_STATUS_S_IDLE 0x70 -+#define OV5640_FW_STATUS_S_FOCUSING 0x00 -+#define OV5640_FW_STATUS_S_FOCUSED 0x10 -+ -+#define OV5640_FW_CMD_TRIGGER_FOCUS 0x03 -+#define OV5640_FW_CMD_CONTINUOUS_FOCUS 0x04 -+#define OV5640_FW_CMD_GET_FOCUS_RESULT 0x07 -+#define OV5640_FW_CMD_RELEASE_FOCUS 0x08 -+#define OV5640_FW_CMD_ZONE_CONFIG 0x12 -+#define OV5640_FW_CMD_DEFAULT_ZONES 0x80 - - enum ov5640_mode_id { - OV5640_MODE_QCIF_176_144 = 0, -@@ -216,6 +244,12 @@ struct ov5640_ctrls { - struct v4l2_ctrl *auto_gain; - struct v4l2_ctrl *gain; - }; -+ struct { -+ struct v4l2_ctrl *focus_auto; -+ struct v4l2_ctrl *af_start; -+ struct v4l2_ctrl *af_stop; -+ struct v4l2_ctrl *af_status; -+ }; - struct v4l2_ctrl *brightness; - struct v4l2_ctrl *light_freq; - struct v4l2_ctrl *saturation; -@@ -259,6 +293,8 @@ struct ov5640_dev { - - bool pending_mode_change; - bool streaming; -+ -+ bool af_initialized; - }; - - static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd) -@@ -1982,6 +2018,99 @@ static void ov5640_reset(struct ov5640_dev *sensor) - usleep_range(20000, 25000); - } - -+static int ov5640_copy_fw_to_device(struct ov5640_dev *sensor, -+ const struct firmware *fw) -+{ -+ struct i2c_client *client = sensor->i2c_client; -+ const u8 *data = (const u8 *)fw->data; -+ u8 fw_status; -+ int i; -+ int ret; -+ -+ // Putting MCU in reset state -+ ret = ov5640_write_reg(sensor, OV5640_REG_SYS_RESET00, 0x20); -+ if (ret) -+ return ret; -+ -+ // Write firmware -+ for (i = 0; i < fw->size / sizeof(u8); i++) -+ ov5640_write_reg(sensor, -+ OV5640_REG_FIRMWARE_BASE + i, -+ data[i]); -+ -+ // Reset MCU state -+ ov5640_write_reg(sensor, OV5640_REG_FW_CMD_MAIN, 0x00); -+ ov5640_write_reg(sensor, OV5640_REG_FW_CMD_ACK, 0x00); -+ ov5640_write_reg(sensor, OV5640_REG_FW_CMD_PARA0, 0x00); -+ ov5640_write_reg(sensor, OV5640_REG_FW_CMD_PARA1, 0x00); -+ ov5640_write_reg(sensor, OV5640_REG_FW_CMD_PARA2, 0x00); -+ ov5640_write_reg(sensor, OV5640_REG_FW_CMD_PARA3, 0x00); -+ ov5640_write_reg(sensor, OV5640_REG_FW_CMD_PARA4, 0x00); -+ ov5640_write_reg(sensor, OV5640_REG_FW_STATUS, 0x7f); -+ -+ // Start AF MCU -+ ov5640_write_reg(sensor, OV5640_REG_SYS_RESET00, 0x00); -+ if (ret) -+ return ret; -+ -+ dev_info(&client->dev, "firmware upload success\n"); -+ -+ // Wait for firmware to be ready -+ for (i = 0; i < 100; i++) { -+ ret = ov5640_read_reg(sensor, OV5640_REG_FW_STATUS, &fw_status); -+ if (fw_status == OV5640_FW_STATUS_S_IDLE) { -+ dev_info(&client->dev, "fw started after %d ms\n", i * 50); -+ return ret; -+ } -+ msleep(50); -+ } -+ dev_err(&client->dev, "uploaded firmware didn't start, got to 0x%x\n", fw_status); -+ return -ETIMEDOUT; -+} -+ -+static int ov5640_af_init(struct ov5640_dev *sensor) -+{ -+ struct i2c_client *client = sensor->i2c_client; -+ const char* fwname = "ov5640_af.bin"; -+ const struct firmware *fw; -+ int ret; -+ -+ if (sensor->af_initialized) { -+ return 0; -+ } -+ -+ if (firmware_request_nowarn(&fw, fwname, &client->dev) == 0) { -+ ret = ov5640_copy_fw_to_device(sensor, fw); -+ if (ret == 0) -+ sensor->af_initialized = 1; -+ } else { -+ dev_warn(&client->dev, "%s: no autofocus firmware available (%s)\n", -+ __func__, fwname); -+ ret = -1; -+ } -+ release_firmware(fw); -+ -+ if (ret) -+ return ret; -+ -+ // Enable AF systems -+ ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE00, -+ (BIT(6) | BIT(5)), (BIT(6) | BIT(5))); -+ if (ret) -+ return ret; -+ ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE01, -+ BIT(6), BIT(6)); -+ if (ret) -+ return ret; -+ -+ // Set lens focus driver on -+ ov5640_write_reg(sensor, OV5640_REG_VCM_CONTROL4, 0x3f); -+ if (ret) -+ return ret; -+ -+ return ret; -+} -+ - static int ov5640_set_power_on(struct ov5640_dev *sensor) - { - struct i2c_client *client = sensor->i2c_client; -@@ -2003,6 +2132,8 @@ static int ov5640_set_power_on(struct ov5640_dev *sensor) - goto xclk_off; - } - -+ sensor->af_initialized = 0; -+ - ov5640_reset(sensor); - ov5640_power(sensor, true); - -@@ -2392,6 +2523,35 @@ static int ov5640_set_framefmt(struct ov5640_dev *sensor, - is_jpeg ? (BIT(5) | BIT(3)) : 0); - } - -+static int ov5640_fw_command(struct ov5640_dev *sensor, int command) -+{ -+ u8 fw_ack; -+ int i; -+ int ret; -+ -+ ret = ov5640_write_reg(sensor, OV5640_REG_FW_CMD_ACK, 0x01); -+ if(ret) -+ return ret; -+ -+ ret = ov5640_write_reg(sensor, OV5640_REG_FW_CMD_MAIN, command); -+ if(ret) -+ return ret; -+ -+ for (i = 0; i < 100; i++) { -+ ret = ov5640_read_reg(sensor, OV5640_REG_FW_CMD_ACK, &fw_ack); -+ if (ret) -+ return ret; -+ -+ if (fw_ack == 0){ -+ return ret; -+ } -+ -+ msleep(50); -+ } -+ return -ETIMEDOUT; -+} -+ -+ - /* - * Sensor Controls. - */ -@@ -2508,6 +2668,41 @@ static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor, - return ret; - } - -+static int ov5640_set_ctrl_focus(struct ov5640_dev *sensor, int command) -+{ -+ struct i2c_client *client = sensor->i2c_client; -+ int ret; -+ -+ ret = ov5640_af_init(sensor); -+ if (ret) { -+ dev_err(&client->dev, "%s: no autofocus firmware loaded\n", -+ __func__); -+ return ret; -+ } -+ -+ if (command == OV5640_FW_CMD_RELEASE_FOCUS) { -+ dev_dbg(&client->dev, "%s: Releasing autofocus\n", -+ __func__); -+ return ov5640_fw_command(sensor, OV5640_FW_CMD_RELEASE_FOCUS); -+ } -+ -+ // Restart zone config -+ ret = ov5640_fw_command(sensor, OV5640_FW_CMD_ZONE_CONFIG); -+ if (ret) -+ return ret; -+ -+ // Set default focus zones -+ ret = ov5640_fw_command(sensor, OV5640_FW_CMD_DEFAULT_ZONES); -+ if (ret) -+ return ret; -+ -+ dev_dbg(&client->dev, "%s: Triggering autofocus\n", -+ __func__); -+ -+ // Start focussing -+ return ov5640_fw_command(sensor, command); -+} -+ - static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain) - { - struct ov5640_ctrls *ctrls = &sensor->ctrls; -@@ -2614,6 +2809,32 @@ static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value) - (BIT(2) | BIT(1)) : 0); - } - -+static int ov5640_get_af_status(struct ov5640_dev *sensor) -+{ -+ u8 fw_status; -+ int ret; -+ -+ ret = ov5640_read_reg(sensor, OV5640_REG_FW_STATUS, &fw_status); -+ if (ret) -+ return ret; -+ -+ switch (fw_status) { -+ case OV5640_FW_STATUS_S_FIRMWARE: -+ case OV5640_FW_STATUS_S_STARTUP: -+ return V4L2_AUTO_FOCUS_STATUS_FAILED; -+ break; -+ case OV5640_FW_STATUS_S_IDLE: -+ return V4L2_AUTO_FOCUS_STATUS_IDLE; -+ break; -+ case OV5640_FW_STATUS_S_FOCUSED: -+ return V4L2_AUTO_FOCUS_STATUS_REACHED; -+ break; -+ default: -+ return V4L2_AUTO_FOCUS_STATUS_BUSY; -+ break; -+ } -+} -+ - static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl) - { - struct v4l2_subdev *sd = ctrl_to_sd(ctrl); -@@ -2635,6 +2856,12 @@ static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl) - return val; - sensor->ctrls.exposure->val = val; - break; -+ case V4L2_CID_FOCUS_AUTO: -+ val = ov5640_get_af_status(sensor); -+ if (val < 0) -+ return val; -+ sensor->ctrls.af_status->val = val; -+ break; - } - - return 0; -@@ -2666,6 +2893,18 @@ static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl) - case V4L2_CID_AUTO_WHITE_BALANCE: - ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val); - break; -+ case V4L2_CID_FOCUS_AUTO: -+ if (ctrl->val) -+ ret = ov5640_set_ctrl_focus(sensor, OV5640_FW_CMD_CONTINUOUS_FOCUS); -+ else -+ ret = ov5640_set_ctrl_focus(sensor, OV5640_FW_CMD_RELEASE_FOCUS); -+ break; -+ case V4L2_CID_AUTO_FOCUS_START: -+ ret = ov5640_set_ctrl_focus(sensor, OV5640_FW_CMD_TRIGGER_FOCUS); -+ break; -+ case V4L2_CID_AUTO_FOCUS_STOP: -+ ret = ov5640_set_ctrl_focus(sensor, OV5640_FW_CMD_RELEASE_FOCUS); -+ break; - case V4L2_CID_HUE: - ret = ov5640_set_ctrl_hue(sensor, ctrl->val); - break; -@@ -2738,6 +2977,20 @@ static int ov5640_init_controls(struct ov5640_dev *sensor) - ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, - 0, 1023, 1, 0); - -+ /* Autofocus */ -+ ctrls->focus_auto = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FOCUS_AUTO, -+ 0, 1, 1, 0); -+ ctrls->af_start = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTO_FOCUS_START, -+ 0, 1, 1, 0); -+ ctrls->af_stop = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTO_FOCUS_STOP, -+ 0, 1, 1, 0); -+ ctrls->af_status = v4l2_ctrl_new_std(hdl, ops, -+ V4L2_CID_AUTO_FOCUS_STATUS, 0, -+ (V4L2_AUTO_FOCUS_STATUS_BUSY | -+ V4L2_AUTO_FOCUS_STATUS_REACHED | -+ V4L2_AUTO_FOCUS_STATUS_FAILED), -+ 0, V4L2_AUTO_FOCUS_STATUS_IDLE); -+ - ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, - 0, 255, 1, 64); - ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE, -@@ -2771,6 +3024,7 @@ static int ov5640_init_controls(struct ov5640_dev *sensor) - v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false); - v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true); - v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true); -+ v4l2_ctrl_cluster(4, &ctrls->focus_auto); - - sensor->sd.ctrl_handler = hdl; - return 0; --- -GitLab - diff --git a/sys-kernel/pinephone-sources/files/config b/sys-kernel/pinephone-sources/files/config deleted file mode 100644 index f5ec438..0000000 --- a/sys-kernel/pinephone-sources/files/config +++ /dev/null @@ -1,6457 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.11.0-0 Kernel Configuration -# -CONFIG_CC_VERSION_TEXT="gcc (GCC) 10.2.0" -CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=100200 -CONFIG_LD_VERSION=235000000 -CONFIG_CLANG_VERSION=0 -CONFIG_LLD_VERSION=0 -CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y -CONFIG_CC_HAS_ASM_GOTO=y -CONFIG_CC_HAS_ASM_INLINE=y -CONFIG_IRQ_WORK=y -CONFIG_BUILDTIME_TABLE_SORT=y -CONFIG_THREAD_INFO_IN_TASK=y - -# -# General setup -# -CONFIG_INIT_ENV_ARG_LIMIT=32 -# CONFIG_COMPILE_TEST is not set -CONFIG_LOCALVERSION="-MANJARO-ARM" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_BUILD_SALT="" -CONFIG_DEFAULT_INIT="" -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_WATCH_QUEUE is not set -CONFIG_CROSS_MEMORY_ATTACH=y -# CONFIG_USELIB is not set -# CONFIG_AUDIT is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y -CONFIG_GENERIC_IRQ_IPI=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_IRQ_MSI_IOMMU=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_SPARSE_IRQ=y -# CONFIG_GENERIC_IRQ_DEBUGFS is not set -# end of IRQ subsystem - -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y - -# -# Timers subsystem -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ_COMMON=y -# CONFIG_HZ_PERIODIC is not set -CONFIG_NO_HZ_IDLE=y -# CONFIG_NO_HZ_FULL is not set -# CONFIG_NO_HZ is not set -CONFIG_HIGH_RES_TIMERS=y -# end of Timers subsystem - -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set - -# -# CPU/Task time and stats accounting -# -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_PSI is not set -# end of CPU/Task time and stats accounting - -CONFIG_CPU_ISOLATION=y - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_RCU_EXPERT is not set -CONFIG_SRCU=y -CONFIG_TREE_SRCU=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RCU_NEED_SEGCBLIST=y -# end of RCU Subsystem - -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -# CONFIG_IKHEADERS is not set -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 -CONFIG_GENERIC_SCHED_CLOCK=y - -# -# Scheduler features -# -# CONFIG_UCLAMP_TASK is not set -# end of Scheduler features - -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_CC_HAS_INT128=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_NUMA_BALANCING=y -CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y -CONFIG_CGROUPS=y -CONFIG_PAGE_COUNTER=y -CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_KMEM=y -CONFIG_BLK_CGROUP=y -CONFIG_CGROUP_WRITEBACK=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_CFS_BANDWIDTH is not set -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_CGROUP_PIDS=y -# CONFIG_CGROUP_RDMA is not set -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_HUGETLB=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_PERF=y -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_TIME_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -# CONFIG_CHECKPOINT_RESTORE is not set -CONFIG_SCHED_AUTOGROUP=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_RD_XZ=y -CONFIG_RD_LZO=y -CONFIG_RD_LZ4=y -CONFIG_RD_ZSTD=y -# CONFIG_BOOT_CONFIG is not set -CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_LD_ORPHAN_WARN=y -CONFIG_SYSCTL=y -CONFIG_HAVE_UID16=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_BPF=y -# CONFIG_EXPERT is not set -CONFIG_UID16=y -CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_FHANDLE=y -CONFIG_POSIX_TIMERS=y -CONFIG_PRINTK=y -CONFIG_PRINTK_NMI=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_FUTEX_PI=y -CONFIG_HAVE_FUTEX_CMPXCHG=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_IO_URING=y -CONFIG_ADVISE_SYSCALLS=y -CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -# CONFIG_BPF_SYSCALL is not set -CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y -CONFIG_BPF_JIT_DEFAULT_ON=y -# CONFIG_USERFAULTFD is not set -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_RSEQ=y -# CONFIG_EMBEDDED is not set -CONFIG_HAVE_PERF_EVENTS=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# end of Kernel Performance Events And Counters - -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -CONFIG_SLAB_MERGE_DEFAULT=y -# CONFIG_SLAB_FREELIST_RANDOM is not set -# CONFIG_SLAB_FREELIST_HARDENED is not set -# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set -CONFIG_SLUB_CPU_PARTIAL=y -CONFIG_SYSTEM_DATA_VERIFICATION=y -CONFIG_PROFILING=y -# end of General setup - -CONFIG_ARM64=y -CONFIG_64BIT=y -CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_CONT_PTE_SHIFT=4 -CONFIG_ARM64_CONT_PMD_SHIFT=4 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=33 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 -CONFIG_NO_IOPORT_MAP=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_ZONE_DMA32=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_SMP=y -CONFIG_KERNEL_MODE_NEON=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_PGTABLE_LEVELS=4 -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_PROC_KCORE_TEXT=y - -# -# Platform selection -# -# CONFIG_ARCH_ACTIONS is not set -# CONFIG_ARCH_AGILEX is not set -CONFIG_ARCH_SUNXI=y -# CONFIG_ARCH_ALPINE is not set -# CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM4908 is not set -# CONFIG_ARCH_BCM_IPROC is not set -# CONFIG_ARCH_BERLIN is not set -# CONFIG_ARCH_BITMAIN is not set -# CONFIG_ARCH_BRCMSTB is not set -# CONFIG_ARCH_EXYNOS is not set -# CONFIG_ARCH_SPARX5 is not set -# CONFIG_ARCH_K3 is not set -# CONFIG_ARCH_LAYERSCAPE is not set -# CONFIG_ARCH_LG1K is not set -# CONFIG_ARCH_HISI is not set -# CONFIG_ARCH_KEEMBAY is not set -# CONFIG_ARCH_MEDIATEK is not set -# CONFIG_ARCH_MESON is not set -# CONFIG_ARCH_MVEBU is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_REALTEK is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_ROCKCHIP is not set -# CONFIG_ARCH_S32 is not set -# CONFIG_ARCH_SEATTLE is not set -# CONFIG_ARCH_STRATIX10 is not set -# CONFIG_ARCH_SYNQUACER is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_SPRD is not set -# CONFIG_ARCH_THUNDER is not set -# CONFIG_ARCH_THUNDER2 is not set -# CONFIG_ARCH_UNIPHIER is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_VISCONTI is not set -# CONFIG_ARCH_XGENE is not set -# CONFIG_ARCH_ZX is not set -# CONFIG_ARCH_ZYNQMP is not set -# end of Platform selection - -# -# Kernel Features -# - -# -# ARM errata workarounds via the alternatives framework -# -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_834220=y -CONFIG_ARM64_ERRATUM_845719=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_1024718=y -CONFIG_ARM64_ERRATUM_1418040=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1319367=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_ERRATUM_1463225=y -CONFIG_ARM64_ERRATUM_1542419=y -CONFIG_ARM64_ERRATUM_1508412=y -CONFIG_CAVIUM_ERRATUM_22375=y -CONFIG_CAVIUM_ERRATUM_23144=y -CONFIG_CAVIUM_ERRATUM_23154=y -CONFIG_CAVIUM_ERRATUM_27456=y -CONFIG_CAVIUM_ERRATUM_30115=y -CONFIG_CAVIUM_TX2_ERRATUM_219=y -CONFIG_FUJITSU_ERRATUM_010001=y -CONFIG_HISILICON_ERRATUM_161600802=y -CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_QCOM_FALKOR_ERRATUM_1009=y -CONFIG_QCOM_QDF2400_ERRATUM_0065=y -CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y -# end of ARM errata workarounds via the alternatives framework - -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_16K_PAGES is not set -# CONFIG_ARM64_64K_PAGES is not set -# CONFIG_ARM64_VA_BITS_39 is not set -CONFIG_ARM64_VA_BITS_48=y -CONFIG_ARM64_VA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PA_BITS=48 -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SCHED_MC=y -# CONFIG_SCHED_SMT is not set -CONFIG_NR_CPUS=64 -CONFIG_HOTPLUG_CPU=y -CONFIG_NUMA=y -CONFIG_NODES_SHIFT=2 -CONFIG_USE_PERCPU_NUMA_NODE_ID=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_300 is not set -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_SCHED_HRTICK=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_HW_PERF_EVENTS=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_PARAVIRT=y -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set -CONFIG_KEXEC=y -CONFIG_KEXEC_FILE=y -# CONFIG_KEXEC_SIG is not set -CONFIG_CRASH_DUMP=y -CONFIG_XEN_DOM0=y -CONFIG_XEN=y -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_COMPAT=y -CONFIG_KUSER_HELPERS=y -# CONFIG_ARMV8_DEPRECATED is not set - -# -# ARMv8.1 architectural features -# -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_PAN=y -CONFIG_AS_HAS_LDAPR=y -CONFIG_ARM64_LSE_ATOMICS=y -CONFIG_ARM64_USE_LSE_ATOMICS=y -CONFIG_ARM64_VHE=y -# end of ARMv8.1 architectural features - -# -# ARMv8.2 architectural features -# -# CONFIG_ARM64_PMEM is not set -CONFIG_ARM64_RAS_EXTN=y -CONFIG_ARM64_CNP=y -# end of ARMv8.2 architectural features - -# -# ARMv8.3 architectural features -# -CONFIG_ARM64_PTR_AUTH=y -CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y -CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y -CONFIG_AS_HAS_PAC=y -CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y -# end of ARMv8.3 architectural features - -# -# ARMv8.4 architectural features -# -CONFIG_ARM64_AMU_EXTN=y -CONFIG_AS_HAS_ARMV8_4=y -CONFIG_ARM64_TLB_RANGE=y -# end of ARMv8.4 architectural features - -# -# ARMv8.5 architectural features -# -CONFIG_AS_HAS_ARMV8_5=y -CONFIG_ARM64_BTI=y -CONFIG_ARM64_BTI_KERNEL=y -CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y -CONFIG_ARM64_E0PD=y -CONFIG_ARCH_RANDOM=y -CONFIG_ARM64_AS_HAS_MTE=y -CONFIG_ARM64_MTE=y -# end of ARMv8.5 architectural features - -CONFIG_ARM64_SVE=y -CONFIG_ARM64_MODULE_PLTS=y -# CONFIG_ARM64_PSEUDO_NMI is not set -CONFIG_RELOCATABLE=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_STACKPROTECTOR_PER_TASK=y -# end of Kernel Features - -# -# Boot options -# -CONFIG_CMDLINE="console=ttyAMA0" -CONFIG_CMDLINE_FROM_BOOTLOADER=y -# CONFIG_CMDLINE_EXTEND is not set -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_EFI is not set -# end of Boot options - -CONFIG_SYSVIPC_COMPAT=y -CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y -CONFIG_ARCH_ENABLE_THP_MIGRATION=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HIBERNATION=y -CONFIG_HIBERNATION_SNAPSHOT_DEV=y -CONFIG_PM_STD_PARTITION="" -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_PM_AUTOSLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_WAKELOCKS_LIMIT=100 -CONFIG_PM_WAKELOCKS_GC=y -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_CPU_PM=y -CONFIG_ENERGY_MODEL=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_HIBERNATION_HEADER=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# end of Power management options - -# -# CPU Power Management -# - -# -# CPU Idle -# -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y -# CONFIG_CPU_IDLE_GOV_LADDER is not set -CONFIG_CPU_IDLE_GOV_MENU=y -# CONFIG_CPU_IDLE_GOV_TEO is not set -CONFIG_DT_IDLE_STATES=y - -# -# ARM CPU Idle Drivers -# -CONFIG_ARM_CPUIDLE=y -CONFIG_ARM_PSCI_CPUIDLE=y -CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y -# end of ARM CPU Idle Drivers -# end of CPU Idle - -# -# CPU Frequency scaling -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y - -# -# CPU frequency scaling drivers -# -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -# CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is not set -CONFIG_ARM_SCPI_CPUFREQ=y -# end of CPU Frequency scaling -# end of CPU Power Management - -# -# Firmware Drivers -# -# CONFIG_ARM_SCMI_PROTOCOL is not set -CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y -# CONFIG_ARM_SDE_INTERFACE is not set -# CONFIG_GOOGLE_FIRMWARE is not set -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_PSCI_CHECKER is not set -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y -CONFIG_ARM_SMCCC_SOC_ID=y - -# -# Tegra firmware driver -# -# end of Tegra firmware driver -# end of Firmware Drivers - -CONFIG_IRQ_BYPASS_MANAGER=y -CONFIG_VIRTUALIZATION=y -CONFIG_KVM=y -CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM_IRQFD=y -CONFIG_HAVE_KVM_IRQ_ROUTING=y -CONFIG_HAVE_KVM_EVENTFD=y -CONFIG_KVM_MMIO=y -CONFIG_HAVE_KVM_MSI=y -CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y -CONFIG_KVM_VFIO=y -CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y -CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y -CONFIG_HAVE_KVM_IRQ_BYPASS=y -CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y -CONFIG_ARM64_CRYPTO=y -CONFIG_CRYPTO_SHA256_ARM64=y -CONFIG_CRYPTO_SHA512_ARM64=m -CONFIG_CRYPTO_SHA1_ARM64_CE=y -CONFIG_CRYPTO_SHA2_ARM64_CE=y -CONFIG_CRYPTO_SHA512_ARM64_CE=m -CONFIG_CRYPTO_SHA3_ARM64=m -CONFIG_CRYPTO_SM3_ARM64_CE=m -# CONFIG_CRYPTO_SM4_ARM64_CE is not set -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m -CONFIG_CRYPTO_CHACHA20_NEON=m -CONFIG_CRYPTO_POLY1305_NEON=m -# CONFIG_CRYPTO_NHPOLY1305_NEON is not set -CONFIG_CRYPTO_AES_ARM64_BS=m - -# -# General architecture-dependent options -# -CONFIG_CRASH_CORE=y -CONFIG_KEXEC_CORE=y -# CONFIG_KPROBES is not set -CONFIG_JUMP_LABEL=y -# CONFIG_STATIC_KEYS_SELFTEST is not set -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y -CONFIG_HAVE_NMI=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_KEEPINITRD=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SET_DIRECT_MAP=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ASM_MODVERSIONS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y -CONFIG_MMU_GATHER_TABLE_FREE=y -CONFIG_MMU_GATHER_RCU_TABLE_FREE=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_HAVE_ARCH_SECCOMP=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_SECCOMP=y -CONFIG_SECCOMP_FILTER=y -# CONFIG_SECCOMP_CACHE_DEBUG is not set -CONFIG_HAVE_ARCH_STACKLEAK=y -CONFIG_HAVE_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR_STRONG=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MOVE_PUD=y -CONFIG_HAVE_MOVE_PMD=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_HAVE_ARCH_MMAP_RND_BITS=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 -CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_COMPAT_OLD_SIGACTION=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_VMAP_STACK=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_STRICT_MODULE_RWX=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -# CONFIG_LOCK_EVENT_COUNTS is not set -CONFIG_ARCH_HAS_RELR=y -CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -# end of GCOV-based kernel profiling - -CONFIG_HAVE_GCC_PLUGINS=y -CONFIG_GCC_PLUGINS=y -# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set -# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set -# end of General architecture-dependent options - -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -# CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -CONFIG_MODULE_COMPRESS_XZ=y -# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_TRIM_UNUSED_KSYMS is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_BLOCK=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y -# CONFIG_BLK_DEV_ZONED is not set -# CONFIG_BLK_DEV_THROTTLING is not set -# CONFIG_BLK_CMDLINE_PARSER is not set -# CONFIG_BLK_WBT is not set -# CONFIG_BLK_CGROUP_IOLATENCY is not set -# CONFIG_BLK_CGROUP_IOCOST is not set -CONFIG_BLK_DEBUG_FS=y -# CONFIG_BLK_SED_OPAL is not set -# CONFIG_BLK_INLINE_ENCRYPTION is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -CONFIG_EFI_PARTITION=y -# end of Partition Types - -CONFIG_BLOCK_COMPAT=y -CONFIG_BLK_PM=y - -# -# IO Schedulers -# -CONFIG_MQ_IOSCHED_DEADLINE=y -CONFIG_MQ_IOSCHED_KYBER=y -# CONFIG_IOSCHED_BFQ is not set -# end of IO Schedulers - -CONFIG_PREEMPT_NOTIFIERS=y -CONFIG_ASN1=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQ=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_FREEZER=y - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_HAVE_ELF_PROT=y -CONFIG_ARCH_USE_GNU_PROPERTY=y -CONFIG_ELFCORE=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_BINFMT_SCRIPT=y -CONFIG_BINFMT_MISC=y -CONFIG_COREDUMP=y -# end of Executable file formats - -# -# Memory Management options -# -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM=y -CONFIG_NEED_MULTIPLE_NODES=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MEMORY_HOTPLUG is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -# CONFIG_PAGE_REPORTING is not set -CONFIG_MIGRATION=y -CONFIG_CONTIG_ALLOC=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_BOUNCE=y -CONFIG_MMU_NOTIFIER=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_MEMORY_FAILURE=y -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -# CONFIG_CLEANCACHE is not set -CONFIG_FRONTSWAP=y -CONFIG_CMA=y -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_AREAS=7 -CONFIG_ZSWAP=y -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set -CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set -CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lzo" -CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y -# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set -# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set -CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" -# CONFIG_ZSWAP_DEFAULT_ON is not set -CONFIG_ZPOOL=y -CONFIG_ZBUD=y -CONFIG_Z3FOLD=y -CONFIG_ZSMALLOC=m -# CONFIG_ZSMALLOC_STAT is not set -CONFIG_GENERIC_EARLY_IOREMAP=y -# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set -# CONFIG_IDLE_PAGE_TRACKING is not set -CONFIG_ARCH_HAS_PTE_DEVMAP=y -CONFIG_FRAME_VECTOR=y -CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y -# CONFIG_PERCPU_STATS is not set -# CONFIG_GUP_TEST is not set -# CONFIG_READ_ONLY_THP_FOR_FS is not set -CONFIG_ARCH_HAS_PTE_SPECIAL=y -# end of Memory Management options - -CONFIG_NET=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_NET_INGRESS=y -CONFIG_SKB_EXTENSIONS=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set -CONFIG_UNIX=y -CONFIG_UNIX_SCM=y -# CONFIG_UNIX_DIAG is not set -# CONFIG_TLS is not set -# CONFIG_XFRM_USER is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE_DEMUX is not set -CONFIG_NET_IP_TUNNEL=m -# CONFIG_IP_MROUTE is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_NET_IPVTI is not set -CONFIG_NET_UDP_TUNNEL=m -# CONFIG_NET_FOU is not set -# CONFIG_NET_FOU_IP_TUNNELS is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_INET_UDP_DIAG is not set -# CONFIG_INET_RAW_DIAG is not set -# CONFIG_INET_DIAG_DESTROY is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_IPV6_ILA is not set -CONFIG_INET6_TUNNEL=m -# CONFIG_IPV6_VTI is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_IPV6_SEG6_LWTUNNEL is not set -# CONFIG_IPV6_SEG6_HMAC is not set -# CONFIG_IPV6_RPL_LWTUNNEL is not set -# CONFIG_NETLABEL is not set -# CONFIG_MPTCP is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NET_PTP_CLASSIFY=y -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -CONFIG_NETFILTER=y -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=m - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_INGRESS=y -CONFIG_NETFILTER_FAMILY_BRIDGE=y -# CONFIG_NETFILTER_NETLINK_ACCT is not set -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set -# CONFIG_NETFILTER_NETLINK_OSF is not set -CONFIG_NF_CONNTRACK=y -CONFIG_NF_LOG_COMMON=y -# CONFIG_NF_LOG_NETDEV is not set -CONFIG_NETFILTER_CONNCOUNT=y -# CONFIG_NF_CONNTRACK_MARK is not set -# CONFIG_NF_CONNTRACK_ZONES is not set -CONFIG_NF_CONNTRACK_PROCFS=y -CONFIG_NF_CONNTRACK_EVENTS=y -# CONFIG_NF_CONNTRACK_TIMEOUT is not set -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -# CONFIG_NF_CONNTRACK_LABELS is not set -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_SCTP=y -CONFIG_NF_CT_PROTO_UDPLITE=y -# CONFIG_NF_CONNTRACK_AMANDA is not set -# CONFIG_NF_CONNTRACK_FTP is not set -# CONFIG_NF_CONNTRACK_H323 is not set -# CONFIG_NF_CONNTRACK_IRC is not set -# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set -# CONFIG_NF_CONNTRACK_SNMP is not set -# CONFIG_NF_CONNTRACK_PPTP is not set -# CONFIG_NF_CONNTRACK_SANE is not set -# CONFIG_NF_CONNTRACK_SIP is not set -# CONFIG_NF_CONNTRACK_TFTP is not set -# CONFIG_NF_CT_NETLINK is not set -CONFIG_NF_NAT=y -CONFIG_NF_NAT_REDIRECT=y -CONFIG_NF_NAT_MASQUERADE=y -# CONFIG_NF_TABLES is not set -CONFIG_NETFILTER_XTABLES=y - -# -# Xtables combined modules -# -# CONFIG_NETFILTER_XT_MARK is not set -# CONFIG_NETFILTER_XT_CONNMARK is not set - -# -# Xtables targets -# -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set -# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -# CONFIG_NETFILTER_XT_TARGET_HL is not set -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set -# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_LOG=y -# CONFIG_NETFILTER_XT_TARGET_MARK is not set -CONFIG_NETFILTER_XT_NAT=m -# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set -# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set -# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set -# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set -CONFIG_NETFILTER_XT_TARGET_REDIRECT=m -CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set -# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=y -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y -# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_DSCP is not set -# CONFIG_NETFILTER_XT_MATCH_ECN is not set -# CONFIG_NETFILTER_XT_MATCH_ESP is not set -# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_HELPER is not set -# CONFIG_NETFILTER_XT_MATCH_HL is not set -# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set -# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set -# CONFIG_NETFILTER_XT_MATCH_L2TP is not set -# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set -# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_MAC is not set -# CONFIG_NETFILTER_XT_MATCH_MARK is not set -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -# CONFIG_NETFILTER_XT_MATCH_OWNER is not set -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set -# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_RECENT is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set -# CONFIG_NETFILTER_XT_MATCH_STATE is not set -# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set -# CONFIG_NETFILTER_XT_MATCH_STRING is not set -# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set -# CONFIG_NETFILTER_XT_MATCH_TIME is not set -# CONFIG_NETFILTER_XT_MATCH_U32 is not set -# end of Core Netfilter Configuration - -# CONFIG_IP_SET is not set -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=y -# CONFIG_NF_SOCKET_IPV4 is not set -# CONFIG_NF_TPROXY_IPV4 is not set -# CONFIG_NF_DUP_IPV4 is not set -# CONFIG_NF_LOG_ARP is not set -CONFIG_NF_LOG_IPV4=y -CONFIG_NF_REJECT_IPV4=y -CONFIG_IP_NF_IPTABLES=y -# CONFIG_IP_NF_MATCH_AH is not set -# CONFIG_IP_NF_MATCH_ECN is not set -# CONFIG_IP_NF_MATCH_RPFILTER is not set -# CONFIG_IP_NF_MATCH_TTL is not set -CONFIG_IP_NF_FILTER=y -CONFIG_IP_NF_TARGET_REJECT=y -# CONFIG_IP_NF_TARGET_SYNPROXY is not set -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -# CONFIG_IP_NF_TARGET_NETMAP is not set -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_IP_NF_MANGLE=y -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set -# CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set -# CONFIG_IP_NF_SECURITY is not set -# CONFIG_IP_NF_ARPTABLES is not set -# end of IP: Netfilter Configuration - -# -# IPv6: Netfilter Configuration -# -# CONFIG_NF_SOCKET_IPV6 is not set -# CONFIG_NF_TPROXY_IPV6 is not set -# CONFIG_NF_DUP_IPV6 is not set -CONFIG_NF_REJECT_IPV6=m -CONFIG_NF_LOG_IPV6=m -CONFIG_IP6_NF_IPTABLES=m -# CONFIG_IP6_NF_MATCH_AH is not set -# CONFIG_IP6_NF_MATCH_EUI64 is not set -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_HL is not set -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -# CONFIG_IP6_NF_MATCH_MH is not set -# CONFIG_IP6_NF_MATCH_RPFILTER is not set -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_MATCH_SRH is not set -# CONFIG_IP6_NF_TARGET_HL is not set -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -# CONFIG_IP6_NF_TARGET_SYNPROXY is not set -CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set -# CONFIG_IP6_NF_SECURITY is not set -CONFIG_IP6_NF_NAT=m -CONFIG_IP6_NF_TARGET_MASQUERADE=m -# CONFIG_IP6_NF_TARGET_NPT is not set -# end of IPv6: Netfilter Configuration - -CONFIG_NF_DEFRAG_IPV6=y -# CONFIG_NF_CONNTRACK_BRIDGE is not set -# CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_L2TP is not set -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_MRP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -CONFIG_BRIDGE_VLAN_FILTERING=y -# CONFIG_BRIDGE_MRP is not set -# CONFIG_BRIDGE_CFM is not set -CONFIG_HAVE_NET_DSA=y -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -CONFIG_VLAN_8021Q_MVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_PHONET is not set -# CONFIG_6LOWPAN is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=y -# CONFIG_BATMAN_ADV is not set -# CONFIG_OPENVSWITCH is not set -CONFIG_VSOCKETS=m -CONFIG_VSOCKETS_DIAG=m -CONFIG_VSOCKETS_LOOPBACK=m -CONFIG_VIRTIO_VSOCKETS_COMMON=m -# CONFIG_NETLINK_DIAG is not set -# CONFIG_MPLS is not set -# CONFIG_NET_NSH is not set -# CONFIG_HSR is not set -# CONFIG_NET_SWITCHDEV is not set -# CONFIG_NET_L3_MASTER_DEV is not set -# CONFIG_QRTR is not set -# CONFIG_NET_NCSI is not set -CONFIG_RPS=y -CONFIG_RFS_ACCEL=y -CONFIG_XPS=y -# CONFIG_CGROUP_NET_PRIO is not set -# CONFIG_CGROUP_NET_CLASSID is not set -CONFIG_NET_RX_BUSY_POLL=y -CONFIG_BQL=y -CONFIG_BPF_JIT=y -CONFIG_NET_FLOW_LIMIT=y - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# end of Network testing -# end of Networking options - -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -CONFIG_BT=m -CONFIG_BT_BREDR=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HS=y -CONFIG_BT_LE=y -CONFIG_BT_LEDS=y -# CONFIG_BT_MSFTEXT is not set -# CONFIG_BT_DEBUGFS is not set -# CONFIG_BT_FEATURE_DEBUG is not set - -# -# Bluetooth device drivers -# -CONFIG_BT_INTEL=m -CONFIG_BT_BCM=m -CONFIG_BT_RTL=m -CONFIG_BT_HCIBTUSB=m -# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set -CONFIG_BT_HCIBTUSB_BCM=y -# CONFIG_BT_HCIBTUSB_MTK is not set -CONFIG_BT_HCIBTUSB_RTL=y -# CONFIG_BT_HCIBTSDIO is not set -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_SERDEV=y -CONFIG_BT_HCIUART_H4=y -# CONFIG_BT_HCIUART_NOKIA is not set -# CONFIG_BT_HCIUART_BCSP is not set -# CONFIG_BT_HCIUART_ATH3K is not set -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIUART_3WIRE=y -# CONFIG_BT_HCIUART_INTEL is not set -CONFIG_BT_HCIUART_BCM=y -CONFIG_BT_HCIUART_RTL=y -# CONFIG_BT_HCIUART_QCA is not set -# CONFIG_BT_HCIUART_AG6XX is not set -# CONFIG_BT_HCIUART_MRVL is not set -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBFUSB is not set -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -# CONFIG_BT_ATH3K is not set -# CONFIG_BT_MTKSDIO is not set -# CONFIG_BT_MTKUART is not set -# end of Bluetooth device drivers - -# CONFIG_AF_RXRPC is not set -# CONFIG_AF_KCM is not set -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y -CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_CFG80211_CRDA_SUPPORT=y -# CONFIG_CFG80211_WEXT is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_RFKILL_GPIO=m -CONFIG_NET_9P=y -# CONFIG_NET_9P_XEN is not set -# CONFIG_NET_9P_DEBUG is not set -# CONFIG_CAIF is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_NFC is not set -# CONFIG_PSAMPLE is not set -# CONFIG_NET_IFE is not set -# CONFIG_LWTUNNEL is not set -CONFIG_DST_CACHE=y -CONFIG_GRO_CELLS=y -CONFIG_PAGE_POOL=y -CONFIG_FAILOVER=y -CONFIG_ETHTOOL_NETLINK=y -CONFIG_HAVE_EBPF_JIT=y - -# -# Device Drivers -# -CONFIG_ARM_AMBA=y -CONFIG_HAVE_PCI=y -# CONFIG_PCI is not set -# CONFIG_PCCARD is not set - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y - -# -# Firmware loader -# -CONFIG_FW_LOADER=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_FW_LOADER_USER_HELPER is not set -# CONFIG_FW_LOADER_COMPRESS is not set -CONFIG_FW_CACHE=y -# end of Firmware loader - -CONFIG_WANT_DEV_COREDUMP=y -CONFIG_ALLOW_DEV_COREDUMP=y -CONFIG_DEV_COREDUMP=y -# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_SOC_BUS=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_SPI=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_IRQ=y -CONFIG_DMA_SHARED_BUFFER=y -# CONFIG_DMA_FENCE_TRACE is not set -CONFIG_GENERIC_ARCH_TOPOLOGY=y -# end of Generic Driver Options - -# -# Bus devices -# -CONFIG_BRCMSTB_GISB_ARB=y -# CONFIG_MOXTET is not set -CONFIG_SIMPLE_PM_BUS=y -CONFIG_SUN50I_DE2_BUS=y -CONFIG_SUNXI_RSB=y -CONFIG_VEXPRESS_CONFIG=y -# CONFIG_MHI_BUS is not set -# end of Bus devices - -# CONFIG_CONNECTOR is not set -# CONFIG_GNSS is not set -CONFIG_MTD=y -# CONFIG_MTD_TESTS is not set - -# -# Partition parsers -# -# CONFIG_MTD_AR7_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -CONFIG_MTD_OF_PARTS=y -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_REDBOOT_PARTS is not set -# end of Partition parsers - -# -# User Modules And Translation Layers -# -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_SM_FTL is not set -# CONFIG_MTD_OOPS is not set -# CONFIG_MTD_SWAP is not set -# CONFIG_MTD_PARTITIONED_MASTER is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set -# end of RAM/ROM/Flash chip drivers - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set -# end of Mapping drivers for chip access - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_MCHP23K256 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOCG3 is not set -# end of Self-contained MTD device drivers - -# -# NAND -# -# CONFIG_MTD_ONENAND is not set -# CONFIG_MTD_RAW_NAND is not set -# CONFIG_MTD_SPI_NAND is not set - -# -# ECC engine support -# -# CONFIG_MTD_NAND_ECC_SW_HAMMING is not set -# CONFIG_MTD_NAND_ECC_SW_BCH is not set -# end of ECC engine support -# end of NAND - -# -# LPDDR & LPDDR2 PCM memory drivers -# -# CONFIG_MTD_LPDDR is not set -# end of LPDDR & LPDDR2 PCM memory drivers - -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y -# CONFIG_MTD_SPI_NOR_SWP_DISABLE is not set -CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y -# CONFIG_MTD_SPI_NOR_SWP_KEEP is not set -# CONFIG_MTD_UBI is not set -# CONFIG_MTD_HYPERBUS is not set -CONFIG_DTC=y -CONFIG_OF=y -# CONFIG_OF_UNITTEST is not set -CONFIG_OF_FLATTREE=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_KOBJ=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_IRQ=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OF_RESOLVE=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_NUMA=y -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_NULL_BLK is not set -CONFIG_ZRAM=m -CONFIG_ZRAM_DEF_COMP_LZORLE=y -# CONFIG_ZRAM_DEF_COMP_LZO is not set -CONFIG_ZRAM_DEF_COMP="lzo-rle" -# CONFIG_ZRAM_WRITEBACK is not set -# CONFIG_ZRAM_MEMORY_TRACKING is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -CONFIG_BLK_DEV_CRYPTOLOOP=y -# CONFIG_BLK_DEV_DRBD is not set -CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_RAM=m -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_XEN_BLKDEV_FRONTEND is not set -# CONFIG_BLK_DEV_RBD is not set - -# -# NVME Support -# -# CONFIG_NVME_FC is not set -# CONFIG_NVME_TARGET is not set -# end of NVME Support - -# -# Misc devices -# -CONFIG_SENSORS_LIS3LV02D=m -# CONFIG_AD525X_DPOT is not set -# CONFIG_DUMMY_IRQ is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_HMC6352 is not set -# CONFIG_DS1682 is not set -# CONFIG_LATTICE_ECP3_CONFIG is not set -CONFIG_SRAM=y -# CONFIG_XILINX_SDFEC is not set -# CONFIG_PVPANIC is not set -# CONFIG_HISI_HIKEY_USB is not set -# CONFIG_MODEM_POWER is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT24 is not set -CONFIG_EEPROM_AT25=m -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_EEPROM_93XX46 is not set -# CONFIG_EEPROM_IDT_89HPESX is not set -# CONFIG_EEPROM_EE1004 is not set -# end of EEPROM support - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - -CONFIG_SENSORS_LIS3_SPI=m -CONFIG_SENSORS_LIS3_I2C=m -# CONFIG_ALTERA_STAPL is not set -# CONFIG_ECHO is not set -# CONFIG_MISC_RTSX_USB is not set -# CONFIG_UACCE is not set -# end of Misc devices - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_PROC_FS is not set - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -CONFIG_SCSI_SAS_ATTRS=y -CONFIG_SCSI_SAS_LIBSAS=y -CONFIG_SCSI_SAS_HOST_SMP=y -# CONFIG_SCSI_SRP_ATTRS is not set -# end of SCSI Transports - -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_ISCSI_BOOT_SYSFS is not set -CONFIG_SCSI_HISI_SAS=m -CONFIG_SCSI_UFSHCD=m -CONFIG_SCSI_UFSHCD_PLATFORM=m -# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set -# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set -# CONFIG_SCSI_UFS_BSG is not set -# CONFIG_XEN_SCSI_FRONTEND is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# end of SCSI device support - -CONFIG_HAVE_PATA_PLATFORM=y -CONFIG_ATA=m -CONFIG_SATA_HOST=y -CONFIG_ATA_VERBOSE_ERROR=y -CONFIG_ATA_FORCE=y -CONFIG_SATA_PMP=y - -# -# Controllers with non-SFF native interface -# -CONFIG_SATA_AHCI_PLATFORM=m -CONFIG_AHCI_CEVA=m -# CONFIG_AHCI_SUNXI is not set -CONFIG_AHCI_XGENE=m -CONFIG_AHCI_QORIQ=m -CONFIG_ATA_SFF=y - -# -# SFF controllers with custom DMA interface -# -CONFIG_ATA_BMDMA=y - -# -# SATA SFF controllers with BMDMA -# -# CONFIG_SATA_DWC is not set - -# -# PATA SFF controllers with BMDMA -# - -# -# PIO-only SFF controllers -# -# CONFIG_PATA_PLATFORM is not set - -# -# Generic fallback / legacy drivers -# -CONFIG_MD=y -# CONFIG_BLK_DEV_MD is not set -# CONFIG_BCACHE is not set -CONFIG_BLK_DEV_DM_BUILTIN=y -CONFIG_BLK_DEV_DM=y -# CONFIG_DM_DEBUG is not set -# CONFIG_DM_UNSTRIPED is not set -CONFIG_DM_CRYPT=y -# CONFIG_DM_SNAPSHOT is not set -# CONFIG_DM_THIN_PROVISIONING is not set -# CONFIG_DM_CACHE is not set -# CONFIG_DM_WRITECACHE is not set -# CONFIG_DM_EBS is not set -# CONFIG_DM_ERA is not set -# CONFIG_DM_CLONE is not set -# CONFIG_DM_MIRROR is not set -# CONFIG_DM_RAID is not set -# CONFIG_DM_ZERO is not set -# CONFIG_DM_MULTIPATH is not set -# CONFIG_DM_DELAY is not set -# CONFIG_DM_DUST is not set -# CONFIG_DM_INIT is not set -# CONFIG_DM_UEVENT is not set -# CONFIG_DM_FLAKEY is not set -# CONFIG_DM_VERITY is not set -# CONFIG_DM_SWITCH is not set -# CONFIG_DM_LOG_WRITES is not set -# CONFIG_DM_INTEGRITY is not set -CONFIG_TARGET_CORE=m -# CONFIG_TCM_IBLOCK is not set -# CONFIG_TCM_FILEIO is not set -# CONFIG_TCM_PSCSI is not set -# CONFIG_LOOPBACK_TARGET is not set -# CONFIG_ISCSI_TARGET is not set -CONFIG_NETDEVICES=y -CONFIG_MII=y -CONFIG_NET_CORE=y -# CONFIG_BONDING is not set -# CONFIG_DUMMY is not set -CONFIG_WIREGUARD=m -# CONFIG_WIREGUARD_DEBUG is not set -# CONFIG_EQUALIZER is not set -# CONFIG_NET_TEAM is not set -CONFIG_MACVLAN=m -CONFIG_MACVTAP=m -# CONFIG_IPVLAN is not set -# CONFIG_VXLAN is not set -# CONFIG_GENEVE is not set -# CONFIG_BAREUDP is not set -# CONFIG_GTP is not set -# CONFIG_MACSEC is not set -# CONFIG_NETCONSOLE is not set -CONFIG_TUN=y -CONFIG_TAP=m -# CONFIG_TUN_VNET_CROSS_LE is not set -CONFIG_VETH=m -# CONFIG_NLMON is not set -# CONFIG_VSOCKMON is not set - -# -# Distributed Switch Architecture drivers -# -# end of Distributed Switch Architecture drivers - -CONFIG_ETHERNET=y -CONFIG_NET_VENDOR_ALACRITECH=y -CONFIG_NET_VENDOR_ALLWINNER=y -# CONFIG_SUN4I_EMAC is not set -# CONFIG_ALTERA_TSE is not set -CONFIG_NET_VENDOR_AMAZON=y -CONFIG_NET_VENDOR_AMD=y -CONFIG_AMD_XGBE=y -CONFIG_NET_VENDOR_AQUANTIA=y -CONFIG_NET_VENDOR_ARC=y -CONFIG_NET_VENDOR_AURORA=y -# CONFIG_AURORA_NB8800 is not set -CONFIG_NET_VENDOR_BROADCOM=y -# CONFIG_B44 is not set -# CONFIG_BCMGENET is not set -# CONFIG_SYSTEMPORT is not set -CONFIG_NET_VENDOR_CADENCE=y -CONFIG_MACB=y -CONFIG_MACB_USE_HWSTAMP=y -CONFIG_NET_VENDOR_CAVIUM=y -CONFIG_NET_VENDOR_CORTINA=y -# CONFIG_GEMINI_ETHERNET is not set -# CONFIG_DNET is not set -CONFIG_NET_VENDOR_EZCHIP=y -# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set -CONFIG_NET_VENDOR_GOOGLE=y -CONFIG_NET_VENDOR_HISILICON=y -CONFIG_HIX5HD2_GMAC=y -# CONFIG_HISI_FEMAC is not set -# CONFIG_HIP04_ETH is not set -CONFIG_HNS_MDIO=y -CONFIG_HNS=y -CONFIG_HNS_DSAF=y -CONFIG_HNS_ENET=y -CONFIG_NET_VENDOR_HUAWEI=y -CONFIG_NET_VENDOR_I825XX=y -CONFIG_NET_VENDOR_INTEL=y -CONFIG_NET_VENDOR_MARVELL=y -CONFIG_MVMDIO=y -CONFIG_NET_VENDOR_MELLANOX=y -# CONFIG_MLXSW_CORE is not set -# CONFIG_MLXFW is not set -CONFIG_NET_VENDOR_MICREL=y -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -CONFIG_NET_VENDOR_MICROCHIP=y -# CONFIG_ENC28J60 is not set -# CONFIG_ENCX24J600 is not set -CONFIG_NET_VENDOR_MICROSEMI=y -CONFIG_NET_VENDOR_NATSEMI=y -CONFIG_NET_VENDOR_NETRONOME=y -CONFIG_NET_VENDOR_NI=y -# CONFIG_NI_XGE_MANAGEMENT_ENET is not set -CONFIG_NET_VENDOR_8390=y -# CONFIG_ETHOC is not set -CONFIG_NET_VENDOR_PENSANDO=y -CONFIG_NET_VENDOR_QUALCOMM=y -# CONFIG_QCA7000_SPI is not set -# CONFIG_QCA7000_UART is not set -CONFIG_QCOM_EMAC=m -# CONFIG_RMNET is not set -CONFIG_NET_VENDOR_RENESAS=y -CONFIG_NET_VENDOR_ROCKER=y -CONFIG_NET_VENDOR_SAMSUNG=y -# CONFIG_SXGBE_ETH is not set -CONFIG_NET_VENDOR_SEEQ=y -CONFIG_NET_VENDOR_SOLARFLARE=y -CONFIG_NET_VENDOR_SMSC=y -CONFIG_SMC91X=y -CONFIG_SMSC911X=y -CONFIG_NET_VENDOR_SOCIONEXT=y -CONFIG_NET_VENDOR_STMICRO=y -CONFIG_STMMAC_ETH=m -# CONFIG_STMMAC_SELFTESTS is not set -CONFIG_STMMAC_PLATFORM=m -# CONFIG_DWMAC_DWC_QOS_ETH is not set -CONFIG_DWMAC_GENERIC=m -CONFIG_DWMAC_SUNXI=m -CONFIG_DWMAC_SUN8I=m -# CONFIG_DWMAC_INTEL_PLAT is not set -CONFIG_NET_VENDOR_SYNOPSYS=y -# CONFIG_DWC_XLGMAC is not set -CONFIG_NET_VENDOR_VIA=y -# CONFIG_VIA_VELOCITY is not set -CONFIG_NET_VENDOR_WIZNET=y -# CONFIG_WIZNET_W5100 is not set -# CONFIG_WIZNET_W5300 is not set -CONFIG_NET_VENDOR_XILINX=y -# CONFIG_XILINX_AXI_EMAC is not set -# CONFIG_XILINX_LL_TEMAC is not set -CONFIG_PHYLINK=y -CONFIG_PHYLIB=y -CONFIG_SWPHY=y -# CONFIG_LED_TRIGGER_PHY is not set -CONFIG_FIXED_PHY=y -# CONFIG_SFP is not set - -# -# MII PHY device drivers -# -# CONFIG_AMD_PHY is not set -# CONFIG_ADIN_PHY is not set -# CONFIG_AQUANTIA_PHY is not set -# CONFIG_AX88796B_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_BCM54140_PHY is not set -# CONFIG_BCM7XXX_PHY is not set -# CONFIG_BCM84881_PHY is not set -# CONFIG_BCM87XX_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_CORTINA_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_INTEL_XWAY_PHY is not set -# CONFIG_LSI_ET1011C_PHY is not set -CONFIG_MARVELL_PHY=m -CONFIG_MARVELL_10G_PHY=m -CONFIG_MICREL_PHY=y -CONFIG_MICROCHIP_PHY=m -# CONFIG_MICROCHIP_T1_PHY is not set -# CONFIG_MICROSEMI_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_NXP_TJA11XX_PHY is not set -CONFIG_AT803X_PHY=m -# CONFIG_QSEMI_PHY is not set -CONFIG_REALTEK_PHY=m -# CONFIG_RENESAS_PHY is not set -CONFIG_ROCKCHIP_PHY=y -CONFIG_SMSC_PHY=m -# CONFIG_STE10XP is not set -# CONFIG_TERANETICS_PHY is not set -# CONFIG_DP83822_PHY is not set -# CONFIG_DP83TC811_PHY is not set -# CONFIG_DP83848_PHY is not set -# CONFIG_DP83867_PHY is not set -# CONFIG_DP83869_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_XILINX_GMII2RGMII is not set -# CONFIG_MICREL_KS8995MA is not set -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_BUS=y -CONFIG_OF_MDIO=y -CONFIG_MDIO_DEVRES=y -# CONFIG_MDIO_SUN4I is not set -CONFIG_MDIO_BITBANG=y -# CONFIG_MDIO_BCM_UNIMAC is not set -# CONFIG_MDIO_GPIO is not set -# CONFIG_MDIO_HISI_FEMAC is not set -# CONFIG_MDIO_MVUSB is not set -# CONFIG_MDIO_MSCC_MIIM is not set -# CONFIG_MDIO_OCTEON is not set -# CONFIG_MDIO_IPQ4019 is not set -# CONFIG_MDIO_IPQ8064 is not set - -# -# MDIO Multiplexers -# -CONFIG_MDIO_BUS_MUX=y -# CONFIG_MDIO_BUS_MUX_GPIO is not set -# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set -CONFIG_MDIO_BUS_MUX_MMIOREG=y - -# -# PCS device drivers -# -CONFIG_PCS_XPCS=m -# end of PCS device drivers - -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_FILTER=y -CONFIG_PPP_MPPE=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPPOE=m -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_SLIP=m -CONFIG_SLHC=m -CONFIG_SLIP_COMPRESSED=y -CONFIG_SLIP_SMART=y -CONFIG_SLIP_MODE_SLIP6=y -CONFIG_USB_NET_DRIVERS=y -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_RTL8152=m -CONFIG_USB_LAN78XX=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_AX88179_178A=m -CONFIG_USB_NET_CDCETHER=m -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_CDC_NCM=m -# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set -# CONFIG_USB_NET_CDC_MBIM is not set -CONFIG_USB_NET_DM9601=m -# CONFIG_USB_NET_SR9700 is not set -CONFIG_USB_NET_SR9800=m -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=m -# CONFIG_USB_NET_GL620A is not set -CONFIG_USB_NET_NET1080=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET_ENABLE=m -CONFIG_USB_NET_CDC_SUBSET=m -# CONFIG_USB_ALI_M5632 is not set -# CONFIG_USB_AN2720 is not set -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -# CONFIG_USB_EPSON2888 is not set -# CONFIG_USB_KC2190 is not set -CONFIG_USB_NET_ZAURUS=m -# CONFIG_USB_NET_CX82310_ETH is not set -# CONFIG_USB_NET_KALMIA is not set -CONFIG_USB_NET_QMI_WWAN=m -# CONFIG_USB_HSO is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_USB_IPHETH is not set -# CONFIG_USB_SIERRA_NET is not set -# CONFIG_USB_VL600 is not set -# CONFIG_USB_NET_CH9200 is not set -# CONFIG_USB_NET_AQC111 is not set -# CONFIG_USB_RTL8153_ECM is not set -CONFIG_WLAN=y -CONFIG_WLAN_VENDOR_ADMTEK=y -CONFIG_ATH_COMMON=m -CONFIG_WLAN_VENDOR_ATH=y -# CONFIG_ATH_DEBUG is not set -# CONFIG_ATH9K is not set -# CONFIG_ATH9K_HTC is not set -# CONFIG_CARL9170 is not set -# CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set -CONFIG_ATH10K=m -CONFIG_ATH10K_CE=y -# CONFIG_ATH10K_SDIO is not set -# CONFIG_ATH10K_USB is not set -# CONFIG_ATH10K_DEBUG is not set -# CONFIG_ATH10K_DEBUGFS is not set -# CONFIG_WCN36XX is not set -CONFIG_WLAN_VENDOR_ATMEL=y -# CONFIG_AT76C50X_USB is not set -CONFIG_WLAN_VENDOR_BROADCOM=y -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_BRCMUTIL=m -# CONFIG_BRCMSMAC is not set -CONFIG_BRCMFMAC=m -CONFIG_BRCMFMAC_PROTO_BCDC=y -CONFIG_BRCMFMAC_SDIO=y -# CONFIG_BRCMFMAC_USB is not set -# CONFIG_BRCM_TRACING is not set -# CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y -CONFIG_WLAN_VENDOR_INTEL=y -CONFIG_WLAN_VENDOR_INTERSIL=y -# CONFIG_HOSTAP is not set -# CONFIG_P54_COMMON is not set -CONFIG_WLAN_VENDOR_MARVELL=y -# CONFIG_LIBERTAS is not set -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_MWIFIEX=m -# CONFIG_MWIFIEX_SDIO is not set -# CONFIG_MWIFIEX_USB is not set -CONFIG_WLAN_VENDOR_MEDIATEK=y -# CONFIG_MT7601U is not set -# CONFIG_MT76x0U is not set -# CONFIG_MT76x2U is not set -# CONFIG_MT7663U is not set -# CONFIG_MT7663S is not set -CONFIG_WLAN_VENDOR_MICROCHIP=y -# CONFIG_WILC1000_SDIO is not set -# CONFIG_WILC1000_SPI is not set -CONFIG_WLAN_VENDOR_RALINK=y -CONFIG_RT2X00=m -# CONFIG_RT2500USB is not set -# CONFIG_RT73USB is not set -CONFIG_RT2800USB=m -CONFIG_RT2800USB_RT33XX=y -CONFIG_RT2800USB_RT35XX=y -CONFIG_RT2800USB_RT3573=y -CONFIG_RT2800USB_RT53XX=y -CONFIG_RT2800USB_RT55XX=y -# CONFIG_RT2800USB_UNKNOWN is not set -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WLAN_VENDOR_REALTEK=y -# CONFIG_RTL8187 is not set -CONFIG_RTL_CARDS=m -# CONFIG_RTL8192CU is not set -# CONFIG_RTL8XXXU is not set -# CONFIG_RTW88 is not set -CONFIG_WLAN_VENDOR_RSI=y -# CONFIG_RSI_91X is not set -CONFIG_WLAN_VENDOR_ST=y -# CONFIG_CW1200 is not set -CONFIG_WLAN_VENDOR_TI=y -# CONFIG_WL1251 is not set -# CONFIG_WL12XX is not set -CONFIG_WL18XX=m -CONFIG_WLCORE=m -# CONFIG_WLCORE_SPI is not set -CONFIG_WLCORE_SDIO=m -CONFIG_WILINK_PLATFORM_DATA=y -CONFIG_WLAN_VENDOR_ZYDAS=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_ZD1211RW is not set -CONFIG_WLAN_VENDOR_QUANTENNA=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_VIRT_WIFI is not set -# CONFIG_WAN is not set -# CONFIG_XEN_NETDEV_FRONTEND is not set -# CONFIG_NETDEVSIM is not set -CONFIG_NET_FAILOVER=y -# CONFIG_ISDN is not set -# CONFIG_NVM is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_LEDS=y -CONFIG_INPUT_FF_MEMLESS=y -# CONFIG_INPUT_SPARSEKMAP is not set -CONFIG_INPUT_MATRIXKMAP=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ADC=m -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_QT1050 is not set -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -# CONFIG_KEYBOARD_DLINK_DIR685 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_GPIO_POLLED is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_TCA8418 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_LM8333 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_SAMSUNG is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_SUN4I_LRADC=m -# CONFIG_KEYBOARD_OMAP4 is not set -# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_CROS_EC is not set -# CONFIG_KEYBOARD_CAP11XX is not set -# CONFIG_KEYBOARD_BCM is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_BYD=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y -CONFIG_MOUSE_PS2_CYPRESS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_PS2_FOCALTECH=y -CONFIG_MOUSE_PS2_SMBUS=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -# CONFIG_MOUSE_ELAN_I2C is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_MOUSE_SYNAPTICS_USB is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_PROPERTIES=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_ADC is not set -# CONFIG_TOUCHSCREEN_AR1021_I2C is not set -CONFIG_TOUCHSCREEN_ATMEL_MXT=m -# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set -# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_BU21029 is not set -# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set -# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_EGALAX is not set -# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set -# CONFIG_TOUCHSCREEN_EXC3000 is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -CONFIG_TOUCHSCREEN_GOODIX=y -# CONFIG_TOUCHSCREEN_HIDEEP is not set -# CONFIG_TOUCHSCREEN_ILI210X is not set -# CONFIG_TOUCHSCREEN_S6SY761 is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_EKTF2127 is not set -# CONFIG_TOUCHSCREEN_ELAN is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_WACOM_I2C is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MMS114 is not set -# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -CONFIG_TOUCHSCREEN_EDT_FT5X06=y -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_PIXCIR is not set -# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC_SERIO is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_TSC2005 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_RM_TS is not set -# CONFIG_TOUCHSCREEN_SILEAD is not set -# CONFIG_TOUCHSCREEN_SIS_I2C is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_STMFTS is not set -CONFIG_TOUCHSCREEN_SUN4I=m -# CONFIG_TOUCHSCREEN_SUR40 is not set -# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set -# CONFIG_TOUCHSCREEN_SX8654 is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -# CONFIG_TOUCHSCREEN_ZET6223 is not set -# CONFIG_TOUCHSCREEN_ZFORCE is not set -# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set -# CONFIG_TOUCHSCREEN_IQS5XX is not set -# CONFIG_TOUCHSCREEN_ZINITIX is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_ATMEL_CAPTOUCH is not set -CONFIG_INPUT_BMA150=m -# CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GPIO_BEEPER is not set -# CONFIG_INPUT_GPIO_DECODER is not set -CONFIG_INPUT_GPIO_VIBRA=y -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_KXTJ9 is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -# CONFIG_INPUT_REGULATOR_HAPTIC is not set -CONFIG_INPUT_AXP20X_PEK=y -CONFIG_INPUT_UINPUT=m -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_PWM_BEEPER is not set -CONFIG_INPUT_PWM_VIBRA=m -# CONFIG_INPUT_RK805_PWRKEY is not set -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -# CONFIG_INPUT_DA7280_HAPTICS is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_IMS_PCU is not set -# CONFIG_INPUT_IQS269A is not set -# CONFIG_INPUT_CMA3000 is not set -CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y -# CONFIG_INPUT_DRV260X_HAPTICS is not set -# CONFIG_INPUT_DRV2665_HAPTICS is not set -# CONFIG_INPUT_DRV2667_HAPTICS is not set -# CONFIG_RMI4_CORE is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIO_AMBAKMI=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_SERIO_ARC_PS2 is not set -# CONFIG_SERIO_APBPS2 is not set -# CONFIG_SERIO_SUN4I_PS2 is not set -# CONFIG_SERIO_GPIO_PS2 is not set -# CONFIG_USERIO is not set -# CONFIG_GAMEPORT is not set -# end of Hardware I/O ports -# end of Input device support - -# -# Character devices -# -CONFIG_TTY=y -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_LDISC_AUTOLOAD=y - -# -# Serial drivers -# -CONFIG_SERIAL_EARLYCON=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -# CONFIG_SERIAL_8250_FINTEK is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_DMA=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_ASPEED_VUART is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -# CONFIG_SERIAL_8250_RSA is not set -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_DW=y -# CONFIG_SERIAL_8250_RT288X is not set -CONFIG_SERIAL_OF_PLATFORM=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_AMBA_PL010 is not set -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX310X is not set -# CONFIG_SERIAL_UARTLITE is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_SIFIVE is not set -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_SC16IS7XX is not set -# CONFIG_SERIAL_BCM63XX is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -# CONFIG_SERIAL_IFX6X60 is not set -CONFIG_SERIAL_XILINX_PS_UART=y -CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_SERIAL_FSL_LINFLEXUART is not set -# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set -# CONFIG_SERIAL_SPRD is not set -# end of Serial drivers - -CONFIG_SERIAL_MCTRL_GPIO=y -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_NULL_TTY is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_HVC_XEN is not set -# CONFIG_HVC_DCC is not set -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -# CONFIG_VIRTIO_CONSOLE is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_IPMB_DEVICE_INTERFACE is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_HW_RANDOM_BA431 is not set -CONFIG_HW_RANDOM_OPTEE=m -# CONFIG_HW_RANDOM_CCTRNG is not set -# CONFIG_HW_RANDOM_XIPHERA is not set -CONFIG_DEVMEM=y -# CONFIG_RAW_DRIVER is not set -CONFIG_TCG_TPM=y -# CONFIG_TCG_TIS is not set -# CONFIG_TCG_TIS_SPI is not set -# CONFIG_TCG_TIS_I2C_ATMEL is not set -CONFIG_TCG_TIS_I2C_INFINEON=y -# CONFIG_TCG_TIS_I2C_NUVOTON is not set -# CONFIG_TCG_XEN is not set -# CONFIG_TCG_VTPM_PROXY is not set -# CONFIG_TCG_FTPM_TEE is not set -# CONFIG_TCG_TIS_ST33ZP24_I2C is not set -# CONFIG_TCG_TIS_ST33ZP24_SPI is not set -# CONFIG_XILLYBUS is not set -# end of Character devices - -# CONFIG_RANDOM_TRUST_CPU is not set -# CONFIG_RANDOM_TRUST_BOOTLOADER is not set - -# -# I2C support -# -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MUX=y - -# -# Multiplexer I2C Chip support -# -# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set -# CONFIG_I2C_MUX_GPIO is not set -# CONFIG_I2C_MUX_GPMUX is not set -# CONFIG_I2C_MUX_LTC4306 is not set -# CONFIG_I2C_MUX_PCA9541 is not set -CONFIG_I2C_MUX_PCA954x=y -# CONFIG_I2C_MUX_PINCTRL is not set -# CONFIG_I2C_MUX_REG is not set -# CONFIG_I2C_DEMUX_PINCTRL is not set -# CONFIG_I2C_MUX_MLXCPLD is not set -# end of Multiplexer I2C Chip support - -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_CADENCE is not set -# CONFIG_I2C_CBUS_GPIO is not set -CONFIG_I2C_DESIGNWARE_CORE=y -# CONFIG_I2C_DESIGNWARE_SLAVE is not set -CONFIG_I2C_DESIGNWARE_PLATFORM=y -# CONFIG_I2C_EMEV2 is not set -CONFIG_I2C_GPIO=m -# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set -CONFIG_I2C_MV64XXX=y -# CONFIG_I2C_NOMADIK is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PCA_PLATFORM is not set -CONFIG_I2C_RK3X=y -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_ROBOTFUZZ_OSIF is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_CROS_EC_TUNNEL is not set -# end of I2C Hardware Bus support - -# CONFIG_I2C_STUB is not set -CONFIG_I2C_SLAVE=y -# CONFIG_I2C_SLAVE_EEPROM is not set -# CONFIG_I2C_SLAVE_TESTUNIT is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# end of I2C support - -# CONFIG_I3C is not set -CONFIG_SPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_AXI_SPI_ENGINE is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_CADENCE is not set -# CONFIG_SPI_CADENCE_QUADSPI is not set -# CONFIG_SPI_DESIGNWARE is not set -# CONFIG_SPI_NXP_FLEXSPI is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_FSL_SPI is not set -# CONFIG_SPI_OC_TINY is not set -CONFIG_SPI_PL022=y -CONFIG_SPI_ROCKCHIP=y -# CONFIG_SPI_SC18IS602 is not set -# CONFIG_SPI_SIFIVE is not set -# CONFIG_SPI_SUN4I is not set -# CONFIG_SPI_SUN6I is not set -# CONFIG_SPI_MXIC is not set -# CONFIG_SPI_XCOMM is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_ZYNQMP_GQSPI is not set -# CONFIG_SPI_AMD is not set - -# -# SPI Multiplexer support -# -# CONFIG_SPI_MUX is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=m -# CONFIG_SPI_LOOPBACK_TEST is not set -# CONFIG_SPI_TLE62X0 is not set -# CONFIG_SPI_SLAVE is not set -CONFIG_SPI_DYNAMIC=y -CONFIG_SPMI=y -# CONFIG_HSI is not set -CONFIG_PPS=y -# CONFIG_PPS_DEBUG is not set - -# -# PPS clients support -# -# CONFIG_PPS_CLIENT_KTIMER is not set -# CONFIG_PPS_CLIENT_LDISC is not set -# CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# - -# -# PTP clock support -# -CONFIG_PTP_1588_CLOCK=y - -# -# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. -# -# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set -# CONFIG_PTP_1588_CLOCK_IDTCM is not set -# end of PTP clock support - -CONFIG_PINCTRL=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_PINMUX=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_PINCONF=y -CONFIG_GENERIC_PINCONF=y -# CONFIG_PINCTRL_AXP209 is not set -# CONFIG_PINCTRL_MCP23S08 is not set -CONFIG_PINCTRL_SINGLE=y -# CONFIG_PINCTRL_SX150X is not set -# CONFIG_PINCTRL_STMFX is not set -CONFIG_PINCTRL_MAX77620=y -# CONFIG_PINCTRL_RK805 is not set -# CONFIG_PINCTRL_OCELOT is not set -# CONFIG_PINCTRL_MICROCHIP_SGPIO is not set - -# -# Renesas pinctrl drivers -# -# end of Renesas pinctrl drivers - -CONFIG_PINCTRL_SUNXI=y -# CONFIG_PINCTRL_SUN4I_A10 is not set -# CONFIG_PINCTRL_SUN5I is not set -# CONFIG_PINCTRL_SUN6I_A31 is not set -# CONFIG_PINCTRL_SUN6I_A31_R is not set -# CONFIG_PINCTRL_SUN8I_A23 is not set -# CONFIG_PINCTRL_SUN8I_A33 is not set -# CONFIG_PINCTRL_SUN8I_A83T is not set -# CONFIG_PINCTRL_SUN8I_A83T_R is not set -# CONFIG_PINCTRL_SUN8I_A23_R is not set -# CONFIG_PINCTRL_SUN8I_H3 is not set -CONFIG_PINCTRL_SUN8I_H3_R=y -# CONFIG_PINCTRL_SUN8I_V3S is not set -# CONFIG_PINCTRL_SUN9I_A80 is not set -# CONFIG_PINCTRL_SUN9I_A80_R is not set -CONFIG_PINCTRL_SUN50I_A64=y -CONFIG_PINCTRL_SUN50I_A64_R=y -CONFIG_PINCTRL_SUN50I_A100=y -CONFIG_PINCTRL_SUN50I_A100_R=y -CONFIG_PINCTRL_SUN50I_H5=y -CONFIG_PINCTRL_SUN50I_H6=y -CONFIG_PINCTRL_SUN50I_H6_R=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_FASTPATH_LIMIT=512 -CONFIG_OF_GPIO=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_CDEV_V1=y -CONFIG_GPIO_GENERIC=y - -# -# Memory mapped GPIO drivers -# -# CONFIG_GPIO_74XX_MMIO is not set -# CONFIG_GPIO_ALTERA is not set -# CONFIG_GPIO_CADENCE is not set -CONFIG_GPIO_DWAPB=y -# CONFIG_GPIO_FTGPIO010 is not set -CONFIG_GPIO_GENERIC_PLATFORM=y -# CONFIG_GPIO_GRGPIO is not set -# CONFIG_GPIO_HLWD is not set -# CONFIG_GPIO_LOGICVC is not set -CONFIG_GPIO_MB86S7X=y -CONFIG_GPIO_PL061=y -# CONFIG_GPIO_SAMA5D2_PIOBU is not set -# CONFIG_GPIO_SIFIVE is not set -# CONFIG_GPIO_SYSCON is not set -CONFIG_GPIO_XGENE=y -# CONFIG_GPIO_XILINX is not set -# CONFIG_GPIO_AMD_FCH is not set -# end of Memory mapped GPIO drivers - -# -# I2C GPIO expanders -# -# CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_ADNP is not set -# CONFIG_GPIO_GW_PLD is not set -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -# CONFIG_GPIO_PCA9570 is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_TPIC2810 is not set -# end of I2C GPIO expanders - -# -# MFD GPIO expanders -# -# CONFIG_GPIO_BD9571MWV is not set -CONFIG_GPIO_MAX77620=y -# end of MFD GPIO expanders - -# -# SPI GPIO expanders -# -# CONFIG_GPIO_74X164 is not set -# CONFIG_GPIO_MAX3191X is not set -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_PISOSR is not set -# CONFIG_GPIO_XRA1403 is not set -# end of SPI GPIO expanders - -# -# USB GPIO expanders -# -# end of USB GPIO expanders - -# -# Virtual GPIO drivers -# -# CONFIG_GPIO_AGGREGATOR is not set -# CONFIG_GPIO_MOCKUP is not set -# end of Virtual GPIO drivers - -# CONFIG_W1 is not set -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_BRCMSTB=y -# CONFIG_POWER_RESET_GPIO is not set -# CONFIG_POWER_RESET_GPIO_RESTART is not set -# CONFIG_POWER_RESET_LTC2952 is not set -# CONFIG_POWER_RESET_REGULATOR is not set -# CONFIG_POWER_RESET_RESTART is not set -CONFIG_POWER_RESET_VEXPRESS=y -CONFIG_POWER_RESET_XGENE=y -CONFIG_POWER_RESET_SYSCON=y -# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set -CONFIG_REBOOT_MODE=y -CONFIG_SYSCON_REBOOT_MODE=y -# CONFIG_NVMEM_REBOOT_MODE is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -CONFIG_POWER_SUPPLY_HWMON=y -# CONFIG_PDA_POWER is not set -# CONFIG_GENERIC_ADC_BATTERY is not set -# CONFIG_TEST_POWER is not set -# CONFIG_CHARGER_ADP5061 is not set -# CONFIG_BATTERY_CW2015 is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -CONFIG_BATTERY_SBS=m -# CONFIG_CHARGER_SBS is not set -# CONFIG_MANAGER_SBS is not set -CONFIG_BATTERY_BQ27XXX=y -CONFIG_BATTERY_BQ27XXX_I2C=y -# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set -CONFIG_CHARGER_AXP20X=y -CONFIG_BATTERY_AXP20X=y -CONFIG_AXP20X_POWER=y -CONFIG_AXP288_FUEL_GAUGE=y -# CONFIG_BATTERY_MAX17040 is not set -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_CHARGER_ISP1704 is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_MANAGER is not set -# CONFIG_CHARGER_LT3651 is not set -# CONFIG_CHARGER_DETECTOR_MAX14656 is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set -# CONFIG_CHARGER_BQ2515X is not set -# CONFIG_CHARGER_BQ25890 is not set -# CONFIG_CHARGER_BQ25980 is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_BATTERY_GAUGE_LTC2941 is not set -# CONFIG_CHARGER_RT9455 is not set -# CONFIG_CHARGER_CROS_USBPD is not set -# CONFIG_CHARGER_UCS1002 is not set -# CONFIG_CHARGER_BD99954 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7314 is not set -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM1177 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7310 is not set -# CONFIG_SENSORS_ADT7410 is not set -# CONFIG_SENSORS_ADT7411 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_AS370 is not set -# CONFIG_SENSORS_ASC7621 is not set -# CONFIG_SENSORS_AXI_FAN_CONTROL is not set -CONFIG_SENSORS_ARM_SCPI=y -# CONFIG_SENSORS_ASPEED is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_CORSAIR_CPRO is not set -# CONFIG_SENSORS_CORSAIR_PSU is not set -# CONFIG_SENSORS_DRIVETEMP is not set -# CONFIG_SENSORS_DS620 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_FTSTEUTATES is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_G762 is not set -# CONFIG_SENSORS_GPIO_FAN is not set -# CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_IIO_HWMON is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_POWR1220 is not set -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LTC2945 is not set -# CONFIG_SENSORS_LTC2947_I2C is not set -# CONFIG_SENSORS_LTC2947_SPI is not set -# CONFIG_SENSORS_LTC2990 is not set -# CONFIG_SENSORS_LTC2992 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4222 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4260 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX127 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_MAX31722 is not set -# CONFIG_SENSORS_MAX31730 is not set -# CONFIG_SENSORS_MAX6621 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_MAX6697 is not set -# CONFIG_SENSORS_MAX31790 is not set -# CONFIG_SENSORS_MCP3021 is not set -# CONFIG_SENSORS_TC654 is not set -# CONFIG_SENSORS_MR75203 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -CONFIG_SENSORS_LM90=m -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LM95234 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_LM95245 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_NTC_THERMISTOR is not set -# CONFIG_SENSORS_NCT6683 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_NCT7802 is not set -# CONFIG_SENSORS_NCT7904 is not set -# CONFIG_SENSORS_NPCM7XX is not set -# CONFIG_SENSORS_OCC_P8_I2C is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_PWM_FAN is not set -# CONFIG_SENSORS_SBTSI is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SHT3x is not set -# CONFIG_SENSORS_SHTC1 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_SCH5636 is not set -# CONFIG_SENSORS_STTS751 is not set -# CONFIG_SENSORS_SMM665 is not set -# CONFIG_SENSORS_ADC128D818 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_ADS7871 is not set -# CONFIG_SENSORS_AMC6821 is not set -# CONFIG_SENSORS_INA209 is not set -CONFIG_SENSORS_INA2XX=m -# CONFIG_SENSORS_INA3221 is not set -# CONFIG_SENSORS_TC74 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP102 is not set -# CONFIG_SENSORS_TMP103 is not set -# CONFIG_SENSORS_TMP108 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_TMP513 is not set -# CONFIG_SENSORS_VEXPRESS is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83773G is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -CONFIG_THERMAL=y -# CONFIG_THERMAL_NETLINK is not set -CONFIG_THERMAL_STATISTICS=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set -# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set -CONFIG_THERMAL_GOV_FAIR_SHARE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_BANG_BANG=y -# CONFIG_THERMAL_GOV_USER_SPACE is not set -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_FREQ_THERMAL=y -CONFIG_DEVFREQ_THERMAL=y -CONFIG_THERMAL_EMULATION=y -# CONFIG_THERMAL_MMIO is not set -# CONFIG_MAX77620_THERMAL is not set -CONFIG_SUN8I_THERMAL=y -# CONFIG_GENERIC_ADC_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WATCHDOG_NOWAYOUT is not set -CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y -CONFIG_WATCHDOG_OPEN_TIMEOUT=0 -# CONFIG_WATCHDOG_SYSFS is not set - -# -# Watchdog Pretimeout Governors -# -# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_GPIO_WATCHDOG is not set -# CONFIG_XILINX_WATCHDOG is not set -# CONFIG_ZIIRAVE_WATCHDOG is not set -CONFIG_ARM_SP805_WATCHDOG=y -# CONFIG_ARM_SBSA_WATCHDOG is not set -# CONFIG_CADENCE_WATCHDOG is not set -# CONFIG_DW_WATCHDOG is not set -# CONFIG_SUNXI_WATCHDOG is not set -# CONFIG_MAX63XX_WATCHDOG is not set -# CONFIG_MAX77620_WATCHDOG is not set -# CONFIG_ARM_SMC_WATCHDOG is not set -# CONFIG_MEN_A21_WDT is not set -# CONFIG_XEN_WDT is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set -CONFIG_BCMA_POSSIBLE=y -# CONFIG_BCMA is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_ACT8945A is not set -# CONFIG_MFD_SUN4I_GPADC is not set -# CONFIG_MFD_AS3711 is not set -# CONFIG_MFD_AS3722 is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_AAT2870_CORE is not set -# CONFIG_MFD_ATMEL_FLEXCOM is not set -# CONFIG_MFD_ATMEL_HLCDC is not set -# CONFIG_MFD_BCM590XX is not set -CONFIG_MFD_BD9571MWV=y -CONFIG_MFD_AC100=m -CONFIG_MFD_AXP20X=y -CONFIG_MFD_AXP20X_I2C=y -CONFIG_MFD_AXP20X_RSB=y -CONFIG_MFD_CROS_EC_DEV=y -# CONFIG_MFD_MADERA is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_MFD_DA9052_SPI is not set -# CONFIG_MFD_DA9052_I2C is not set -# CONFIG_MFD_DA9055 is not set -# CONFIG_MFD_DA9062 is not set -# CONFIG_MFD_DA9063 is not set -# CONFIG_MFD_DA9150 is not set -# CONFIG_MFD_DLN2 is not set -# CONFIG_MFD_GATEWORKS_GSC is not set -# CONFIG_MFD_MC13XXX_SPI is not set -# CONFIG_MFD_MC13XXX_I2C is not set -# CONFIG_MFD_MP2629 is not set -CONFIG_MFD_HI6421_PMIC=y -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set -# CONFIG_MFD_IQS62X is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_MFD_88PM800 is not set -# CONFIG_MFD_88PM805 is not set -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_MAX14577 is not set -CONFIG_MFD_MAX77620=y -# CONFIG_MFD_MAX77650 is not set -# CONFIG_MFD_MAX77686 is not set -# CONFIG_MFD_MAX77693 is not set -# CONFIG_MFD_MAX77843 is not set -# CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_MFD_MT6360 is not set -# CONFIG_MFD_MT6397 is not set -# CONFIG_MFD_MENF21BMC is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_CPCAP is not set -# CONFIG_MFD_VIPERBOARD is not set -# CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_RT5033 is not set -# CONFIG_MFD_RC5T583 is not set -CONFIG_MFD_RK808=y -# CONFIG_MFD_RN5T618 is not set -CONFIG_MFD_SEC_CORE=y -# CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_SKY81452 is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_MFD_STMPE is not set -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_LP3943 is not set -# CONFIG_MFD_LP8788 is not set -# CONFIG_MFD_TI_LMU is not set -# CONFIG_MFD_PALMAS is not set -# CONFIG_TPS6105X is not set -# CONFIG_TPS65010 is not set -# CONFIG_TPS6507X is not set -# CONFIG_MFD_TPS65086 is not set -# CONFIG_MFD_TPS65090 is not set -# CONFIG_MFD_TPS65217 is not set -# CONFIG_MFD_TI_LP873X is not set -# CONFIG_MFD_TI_LP87565 is not set -# CONFIG_MFD_TPS65218 is not set -# CONFIG_MFD_TPS6586X is not set -# CONFIG_MFD_TPS65910 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_TPS65912_SPI is not set -# CONFIG_MFD_TPS80031 is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_TWL6040_CORE is not set -# CONFIG_MFD_WL1273_CORE is not set -# CONFIG_MFD_LM3533 is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TQMX86 is not set -# CONFIG_MFD_LOCHNAGAR is not set -# CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_ARIZONA_SPI is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_ROHM_BD718XX is not set -# CONFIG_MFD_ROHM_BD70528 is not set -# CONFIG_MFD_ROHM_BD71828 is not set -# CONFIG_MFD_STPMIC1 is not set -# CONFIG_MFD_STMFX is not set -CONFIG_MFD_VEXPRESS_SYSREG=y -# CONFIG_RAVE_SP_CORE is not set -# CONFIG_MFD_INTEL_M10_BMC is not set -# end of Multifunction device drivers - -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER_OF is not set -# CONFIG_REGULATOR_88PG86X is not set -# CONFIG_REGULATOR_ACT8865 is not set -# CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_AXP20X=y -CONFIG_REGULATOR_BD9571MWV=y -# CONFIG_REGULATOR_CROS_EC is not set -# CONFIG_REGULATOR_DA9121 is not set -# CONFIG_REGULATOR_DA9210 is not set -# CONFIG_REGULATOR_DA9211 is not set -CONFIG_REGULATOR_FAN53555=y -# CONFIG_REGULATOR_FAN53880 is not set -CONFIG_REGULATOR_GPIO=y -# CONFIG_REGULATOR_HI6421 is not set -CONFIG_REGULATOR_HI6421V530=y -# CONFIG_REGULATOR_ISL9305 is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -# CONFIG_REGULATOR_LP872X is not set -# CONFIG_REGULATOR_LP8755 is not set -# CONFIG_REGULATOR_LTC3589 is not set -# CONFIG_REGULATOR_LTC3676 is not set -# CONFIG_REGULATOR_MAX1586 is not set -CONFIG_REGULATOR_MAX77620=y -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -# CONFIG_REGULATOR_MAX8973 is not set -# CONFIG_REGULATOR_MAX77826 is not set -# CONFIG_REGULATOR_MCP16502 is not set -# CONFIG_REGULATOR_MP5416 is not set -# CONFIG_REGULATOR_MP8859 is not set -# CONFIG_REGULATOR_MP886X is not set -# CONFIG_REGULATOR_MPQ7920 is not set -# CONFIG_REGULATOR_MT6311 is not set -# CONFIG_REGULATOR_PCA9450 is not set -# CONFIG_REGULATOR_PF8X00 is not set -# CONFIG_REGULATOR_PFUZE100 is not set -# CONFIG_REGULATOR_PV88060 is not set -# CONFIG_REGULATOR_PV88080 is not set -# CONFIG_REGULATOR_PV88090 is not set -CONFIG_REGULATOR_PWM=y -CONFIG_REGULATOR_QCOM_SPMI=y -# CONFIG_REGULATOR_QCOM_USB_VBUS is not set -# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set -CONFIG_REGULATOR_RK808=y -# CONFIG_REGULATOR_RT4801 is not set -# CONFIG_REGULATOR_RTMV20 is not set -# CONFIG_REGULATOR_S2MPA01 is not set -CONFIG_REGULATOR_S2MPS11=y -# CONFIG_REGULATOR_S5M8767 is not set -# CONFIG_REGULATOR_SLG51000 is not set -# CONFIG_REGULATOR_SY8106A is not set -# CONFIG_REGULATOR_SY8824X is not set -# CONFIG_REGULATOR_SY8827N is not set -# CONFIG_REGULATOR_TPS51632 is not set -# CONFIG_REGULATOR_TPS62360 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_TPS65132 is not set -# CONFIG_REGULATOR_TPS6524X is not set -CONFIG_REGULATOR_VCTRL=m -# CONFIG_REGULATOR_VEXPRESS is not set -# CONFIG_REGULATOR_QCOM_LABIBB is not set -# CONFIG_REGULATOR_TP65185X is not set -CONFIG_RC_CORE=m -# CONFIG_RC_MAP is not set -# CONFIG_LIRC is not set -# CONFIG_RC_DECODERS is not set -# CONFIG_RC_DEVICES is not set -CONFIG_CEC_CORE=m -# CONFIG_MEDIA_CEC_RC is not set -# CONFIG_MEDIA_CEC_SUPPORT is not set -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_SUPPORT_FILTER=y -# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set - -# -# Media device types -# -CONFIG_MEDIA_CAMERA_SUPPORT=y -# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set -# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_PLATFORM_SUPPORT=y -# CONFIG_MEDIA_TEST_SUPPORT is not set -# end of Media device types - -CONFIG_VIDEO_DEV=y -CONFIG_MEDIA_CONTROLLER=y - -# -# Video4Linux options -# -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_V4L2_MEM2MEM_DEV=y -CONFIG_V4L2_FLASH_LED_CLASS=y -CONFIG_V4L2_FWNODE=y -# end of Video4Linux options - -# -# Media controller options -# -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y - -# -# Please notice that the enabled Media controller Request API is EXPERIMENTAL -# -# end of Media controller options - -# -# Media drivers -# - -# -# Drivers filtered as selected at 'Filter media drivers' -# -CONFIG_MEDIA_USB_SUPPORT=y - -# -# Webcam devices -# -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_BENQ is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_CPIA1 is not set -# CONFIG_USB_GSPCA_DTCS033 is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_JL2005BCD is not set -# CONFIG_USB_GSPCA_KINECT is not set -# CONFIG_USB_GSPCA_KONICA is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_NW80X is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_OV534_9 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SE401 is not set -# CONFIG_USB_GSPCA_SN9C2028 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SPCA1528 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_SQ930X is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STK1135 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TOPRO is not set -# CONFIG_USB_GSPCA_TOUPTEK is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_VICAM is not set -# CONFIG_USB_GSPCA_XIRLINK_CIT is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -# CONFIG_USB_PWC is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_VIDEO_USBTV is not set - -# -# Webcam, TV (analog/digital) USB devices -# -# CONFIG_VIDEO_EM28XX is not set -CONFIG_VIDEOBUF2_CORE=y -CONFIG_VIDEOBUF2_V4L2=y -CONFIG_VIDEOBUF2_MEMOPS=y -CONFIG_VIDEOBUF2_DMA_CONTIG=y -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_V4L_PLATFORM_DRIVERS=y -# CONFIG_VIDEO_CADENCE is not set -# CONFIG_VIDEO_ASPEED is not set -# CONFIG_VIDEO_MUX is not set -# CONFIG_VIDEO_XILINX is not set -# CONFIG_VIDEO_SUN4I_CSI is not set -CONFIG_VIDEO_SUN6I_CSI=y -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_DEINTERLACE=y -CONFIG_VIDEO_SUN8I_DEINTERLACE=y -CONFIG_VIDEO_SUN8I_ROTATE=y -# end of Media drivers - -# -# Media ancillary drivers -# -# CONFIG_VIDEO_IR_I2C is not set - -# -# Audio decoders, processors and mixers -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA1997X is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS3308 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_UDA1342 is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set -# CONFIG_VIDEO_SONY_BTF_MPX is not set -# end of Audio decoders, processors and mixers - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set -# end of RDS decoders - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_ADV7183 is not set -# CONFIG_VIDEO_ADV748X is not set -# CONFIG_VIDEO_ADV7604 is not set -# CONFIG_VIDEO_ADV7842 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_ML86V7667 is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_TC358743 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_TVP7002 is not set -# CONFIG_VIDEO_TW2804 is not set -# CONFIG_VIDEO_TW9903 is not set -# CONFIG_VIDEO_TW9906 is not set -# CONFIG_VIDEO_TW9910 is not set -# CONFIG_VIDEO_VPX3220 is not set -# CONFIG_VIDEO_MAX9286 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_CX25840 is not set -# end of Video decoders - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_ADV7343 is not set -# CONFIG_VIDEO_ADV7393 is not set -# CONFIG_VIDEO_AD9389B is not set -# CONFIG_VIDEO_AK881X is not set -# CONFIG_VIDEO_THS8200 is not set -# end of Video encoders - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# end of Video improvement chips - -# -# Audio/Video compression chips -# -# CONFIG_VIDEO_SAA6752HS is not set -# end of Audio/Video compression chips - -# -# SDR tuner chips -# -# end of SDR tuner chips - -# -# Miscellaneous helper chips -# -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_I2C is not set -# CONFIG_VIDEO_ST_MIPID02 is not set -# end of Miscellaneous helper chips - -# -# Camera sensor devices -# -# CONFIG_VIDEO_HI556 is not set -# CONFIG_VIDEO_IMX214 is not set -# CONFIG_VIDEO_IMX219 is not set -# CONFIG_VIDEO_IMX258 is not set -# CONFIG_VIDEO_IMX274 is not set -# CONFIG_VIDEO_IMX290 is not set -# CONFIG_VIDEO_IMX319 is not set -# CONFIG_VIDEO_IMX355 is not set -# CONFIG_VIDEO_OV02A10 is not set -# CONFIG_VIDEO_OV2640 is not set -# CONFIG_VIDEO_OV2659 is not set -# CONFIG_VIDEO_OV2680 is not set -# CONFIG_VIDEO_OV2685 is not set -CONFIG_VIDEO_OV5640=m -# CONFIG_VIDEO_OV5645 is not set -# CONFIG_VIDEO_OV5647 is not set -# CONFIG_VIDEO_OV6650 is not set -# CONFIG_VIDEO_OV5670 is not set -# CONFIG_VIDEO_OV5675 is not set -# CONFIG_VIDEO_OV5695 is not set -# CONFIG_VIDEO_OV7251 is not set -# CONFIG_VIDEO_OV772X is not set -# CONFIG_VIDEO_OV7640 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_OV7740 is not set -# CONFIG_VIDEO_OV8856 is not set -# CONFIG_VIDEO_OV9640 is not set -# CONFIG_VIDEO_OV9650 is not set -# CONFIG_VIDEO_OV13858 is not set -# CONFIG_VIDEO_VS6624 is not set -# CONFIG_VIDEO_MT9M001 is not set -# CONFIG_VIDEO_MT9M032 is not set -# CONFIG_VIDEO_MT9M111 is not set -# CONFIG_VIDEO_MT9P031 is not set -# CONFIG_VIDEO_MT9T001 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V032 is not set -# CONFIG_VIDEO_MT9V111 is not set -# CONFIG_VIDEO_SR030PC30 is not set -# CONFIG_VIDEO_NOON010PC30 is not set -# CONFIG_VIDEO_M5MOLS is not set -# CONFIG_VIDEO_RDACM20 is not set -# CONFIG_VIDEO_RJ54N1 is not set -# CONFIG_VIDEO_S5K6AA is not set -# CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_S5K4ECGX is not set -# CONFIG_VIDEO_S5K5BAF is not set -# CONFIG_VIDEO_CCS is not set -# CONFIG_VIDEO_ET8EK8 is not set -# CONFIG_VIDEO_S5C73M3 is not set -# CONFIG_VIDEO_HM5065 is not set -CONFIG_VIDEO_GC2145=y -# end of Camera sensor devices - -# -# Lens drivers -# -# CONFIG_VIDEO_AD5820 is not set -# CONFIG_VIDEO_AK7375 is not set -# CONFIG_VIDEO_DW9714 is not set -# CONFIG_VIDEO_DW9768 is not set -# CONFIG_VIDEO_DW9807_VCM is not set -# end of Lens drivers - -# -# Flash devices -# -# CONFIG_VIDEO_ADP1653 is not set -# CONFIG_VIDEO_LM3560 is not set -# CONFIG_VIDEO_LM3646 is not set -# end of Flash devices - -# -# SPI helper chips -# -# CONFIG_VIDEO_GS1662 is not set -# end of SPI helper chips - -# -# Media SPI Adapters -# -# end of Media SPI Adapters -# end of Media ancillary drivers - -# -# Graphics support -# -CONFIG_DRM=y -CONFIG_DRM_MIPI_DSI=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DEBUG_MM is not set -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -# CONFIG_DRM_DP_CEC is not set -CONFIG_DRM_GEM_CMA_HELPER=y -CONFIG_DRM_KMS_CMA_HELPER=y -CONFIG_DRM_GEM_SHMEM_HELPER=y -CONFIG_DRM_SCHED=y - -# -# I2C encoder or helper chips -# -CONFIG_DRM_I2C_CH7006=m -CONFIG_DRM_I2C_SIL164=m -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - -# -# ARM devices -# -# CONFIG_DRM_HDLCD is not set -CONFIG_DRM_MALI_DISPLAY=m -# CONFIG_DRM_KOMEDA is not set -# end of ARM devices - -# CONFIG_DRM_VGEM is not set -# CONFIG_DRM_VKMS is not set -# CONFIG_DRM_UDL is not set -# CONFIG_DRM_RCAR_DW_HDMI is not set -CONFIG_DRM_RCAR_LVDS=y -CONFIG_DRM_SUN4I=y -CONFIG_DRM_SUN4I_HDMI=y -# CONFIG_DRM_SUN4I_HDMI_CEC is not set -CONFIG_DRM_SUN4I_BACKEND=y -CONFIG_DRM_SUN6I_DSI=y -CONFIG_DRM_SUN8I_DW_HDMI=y -CONFIG_DRM_SUN8I_MIXER=y -CONFIG_DRM_SUN8I_TCON_TOP=y -CONFIG_DRM_PANEL=y - -# -# Display Panels -# -# CONFIG_DRM_PANEL_ABT_Y030XX067A is not set -# CONFIG_DRM_PANEL_ARM_VERSATILE is not set -# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set -# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set -# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=m -# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set -CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=y -CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=y -# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set -# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set -# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set -# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set -# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set -# CONFIG_DRM_PANEL_LG_LB035Q02 is not set -# CONFIG_DRM_PANEL_LG_LG4573 is not set -# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set -# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set -# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set -# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set -# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set -# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set -# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set -# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set -# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set -# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set -CONFIG_DRM_PANEL_SITRONIX_ST7703=m -# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set -# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set -# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set -# CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set -# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set -# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set -# CONFIG_DRM_PANEL_TPO_TPG110 is not set -# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set -# end of Display Panels - -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_PANEL_BRIDGE=y - -# -# Display Interface Bridges -# -# CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_CHRONTEL_CH7033 is not set -CONFIG_DRM_DISPLAY_CONNECTOR=m -# CONFIG_DRM_LONTIUM_LT9611 is not set -# CONFIG_DRM_LONTIUM_LT9611UXC is not set -# CONFIG_DRM_LVDS_CODEC is not set -# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set -# CONFIG_DRM_NWL_MIPI_DSI is not set -# CONFIG_DRM_NXP_PTN3460 is not set -# CONFIG_DRM_PARADE_PS8622 is not set -# CONFIG_DRM_PARADE_PS8640 is not set -# CONFIG_DRM_SIL_SII8620 is not set -# CONFIG_DRM_SII902X is not set -# CONFIG_DRM_SII9234 is not set -CONFIG_DRM_SIMPLE_BRIDGE=m -# CONFIG_DRM_THINE_THC63LVD1024 is not set -# CONFIG_DRM_TOSHIBA_TC358762 is not set -# CONFIG_DRM_TOSHIBA_TC358764 is not set -# CONFIG_DRM_TOSHIBA_TC358767 is not set -# CONFIG_DRM_TOSHIBA_TC358768 is not set -# CONFIG_DRM_TOSHIBA_TC358775 is not set -# CONFIG_DRM_TI_TFP410 is not set -# CONFIG_DRM_TI_SN65DSI86 is not set -# CONFIG_DRM_TI_TPD12S015 is not set -# CONFIG_DRM_ANALOGIX_ANX6345 is not set -# CONFIG_DRM_ANALOGIX_ANX78XX is not set -# CONFIG_DRM_ANALOGIX_ANX7625 is not set -CONFIG_DRM_I2C_ADV7511=m -# CONFIG_DRM_I2C_ADV7511_AUDIO is not set -CONFIG_DRM_I2C_ADV7511_CEC=y -# CONFIG_DRM_CDNS_MHDP8546 is not set -CONFIG_DRM_DW_HDMI=y -# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set -# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set -# CONFIG_DRM_DW_HDMI_CEC is not set -# end of Display Interface Bridges - -# CONFIG_DRM_ETNAVIV is not set -# CONFIG_DRM_ARCPGU is not set -# CONFIG_DRM_HISI_KIRIN is not set -# CONFIG_DRM_MXSFB is not set -# CONFIG_DRM_GM12U320 is not set -# CONFIG_TINYDRM_HX8357D is not set -# CONFIG_TINYDRM_ILI9225 is not set -# CONFIG_TINYDRM_ILI9341 is not set -# CONFIG_TINYDRM_ILI9486 is not set -# CONFIG_TINYDRM_MI0283QT is not set -# CONFIG_TINYDRM_REPAPER is not set -# CONFIG_TINYDRM_ST7586 is not set -# CONFIG_TINYDRM_ST7735R is not set -# CONFIG_DRM_PL111 is not set -# CONFIG_DRM_XEN is not set -CONFIG_DRM_LIMA=y -# CONFIG_DRM_PANFROST is not set -# CONFIG_DRM_TIDSS is not set -# CONFIG_DRM_LEGACY is not set -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y - -# -# Frame buffer Devices -# -CONFIG_FB_CMDLINE=y -CONFIG_FB_NOTIFY=y -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_IMAGEBLIT=y -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -CONFIG_FB_ARMCLCD=y -# CONFIG_FB_OPENCORES is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_SUN5I_EINK is not set -# CONFIG_FB_SMSCUFX is not set -CONFIG_FB_UDL=m -# CONFIG_FB_IBM_GXT4500 is not set -# CONFIG_FB_VIRTUAL is not set -CONFIG_XEN_FBDEV_FRONTEND=y -# CONFIG_FB_METRONOME is not set -CONFIG_FB_SIMPLE=y -# CONFIG_FB_SSD1307 is not set -# end of Frame buffer Devices - -# -# Backlight & LCD device support -# -CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_L4F00242T03 is not set -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_ILI922X is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -# CONFIG_LCD_PLATFORM is not set -# CONFIG_LCD_AMS369FG06 is not set -# CONFIG_LCD_LMS501KF03 is not set -# CONFIG_LCD_HX8357 is not set -# CONFIG_LCD_OTM3225A is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_BACKLIGHT_KTD253 is not set -CONFIG_BACKLIGHT_PWM=y -# CONFIG_BACKLIGHT_QCOM_WLED is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_LM3630A is not set -# CONFIG_BACKLIGHT_LM3639 is not set -CONFIG_BACKLIGHT_LP855X=y -# CONFIG_BACKLIGHT_GPIO is not set -# CONFIG_BACKLIGHT_LV5207LP is not set -# CONFIG_BACKLIGHT_BD6107 is not set -# CONFIG_BACKLIGHT_ARCXCNN is not set -CONFIG_BACKLIGHT_LED=m -# end of Backlight & LCD device support - -CONFIG_VIDEOMODE_HELPERS=y -CONFIG_HDMI=y - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_DUMMY_CONSOLE_COLUMNS=80 -CONFIG_DUMMY_CONSOLE_ROWS=25 -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set -CONFIG_BOOTSPLASH=y -# end of Console display driver support - -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -# end of Graphics support - -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -CONFIG_SND_DMAENGINE_PCM=m -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -CONFIG_SND_JACK_INPUT_DEV=y -# CONFIG_SND_OSSEMUL is not set -CONFIG_SND_PCM_TIMER=y -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_PROC_FS=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_SEQUENCER is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_ALOOP=m -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# HD-Audio -# -# end of HD-Audio - -CONFIG_SND_HDA_PREALLOC_SIZE=64 -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y -# CONFIG_SND_USB_UA101 is not set -# CONFIG_SND_USB_CAIAQ is not set -# CONFIG_SND_USB_6FIRE is not set -# CONFIG_SND_USB_HIFACE is not set -# CONFIG_SND_BCD2000 is not set -# CONFIG_SND_USB_POD is not set -# CONFIG_SND_USB_PODHD is not set -# CONFIG_SND_USB_TONEPORT is not set -# CONFIG_SND_USB_VARIAX is not set -CONFIG_SND_SOC=m -CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y -# CONFIG_SND_SOC_ADI is not set -# CONFIG_SND_SOC_AMD_ACP is not set -# CONFIG_SND_ATMEL_SOC is not set -# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set -# CONFIG_SND_DESIGNWARE_I2S is not set - -# -# SoC Audio for Freescale CPUs -# - -# -# Common SoC Audio options for Freescale CPUs: -# -# CONFIG_SND_SOC_FSL_ASRC is not set -# CONFIG_SND_SOC_FSL_SAI is not set -# CONFIG_SND_SOC_FSL_AUDMIX is not set -# CONFIG_SND_SOC_FSL_SSI is not set -# CONFIG_SND_SOC_FSL_SPDIF is not set -# CONFIG_SND_SOC_FSL_ESAI is not set -# CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_FSL_XCVR is not set -# CONFIG_SND_SOC_IMX_AUDMUX is not set -# end of SoC Audio for Freescale CPUs - -# CONFIG_SND_I2S_HI6210_I2S is not set -# CONFIG_SND_SOC_IMG is not set -# CONFIG_SND_SOC_MTK_BTCVSD is not set -# CONFIG_SND_SOC_SOF_TOPLEVEL is not set - -# -# STMicroelectronics STM32 SOC audio support -# -# end of STMicroelectronics STM32 SOC audio support - -# -# Allwinner SoC Audio support -# -CONFIG_SND_SUN4I_CODEC=m -CONFIG_SND_SUN8I_CODEC=m -CONFIG_SND_SUN8I_CODEC_ANALOG=m -CONFIG_SND_SUN50I_CODEC_ANALOG=m -CONFIG_SND_SUN4I_I2S=m -CONFIG_SND_SUN4I_SPDIF=m -CONFIG_SND_SUN8I_ADDA_PR_REGMAP=m -# end of Allwinner SoC Audio support - -# CONFIG_SND_SOC_XILINX_I2S is not set -# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set -# CONFIG_SND_SOC_XILINX_SPDIF is not set -# CONFIG_SND_SOC_XTFPGA_I2S is not set -# CONFIG_ZX_TDM is not set -CONFIG_SND_SOC_I2C_AND_SPI=m - -# -# CODEC drivers -# -# CONFIG_SND_SOC_AC97_CODEC is not set -# CONFIG_SND_SOC_ADAU1372_I2C is not set -# CONFIG_SND_SOC_ADAU1372_SPI is not set -# CONFIG_SND_SOC_ADAU1701 is not set -# CONFIG_SND_SOC_ADAU1761_I2C is not set -# CONFIG_SND_SOC_ADAU1761_SPI is not set -# CONFIG_SND_SOC_ADAU7002 is not set -# CONFIG_SND_SOC_ADAU7118_HW is not set -# CONFIG_SND_SOC_ADAU7118_I2C is not set -# CONFIG_SND_SOC_AK4104 is not set -# CONFIG_SND_SOC_AK4118 is not set -# CONFIG_SND_SOC_AK4458 is not set -# CONFIG_SND_SOC_AK4554 is not set -CONFIG_SND_SOC_AK4613=m -# CONFIG_SND_SOC_AK4642 is not set -# CONFIG_SND_SOC_AK5386 is not set -# CONFIG_SND_SOC_AK5558 is not set -# CONFIG_SND_SOC_ALC5623 is not set -# CONFIG_SND_SOC_BD28623 is not set -CONFIG_SND_SOC_BT_SCO=m -# CONFIG_SND_SOC_CROS_EC_CODEC is not set -# CONFIG_SND_SOC_CS35L32 is not set -# CONFIG_SND_SOC_CS35L33 is not set -# CONFIG_SND_SOC_CS35L34 is not set -# CONFIG_SND_SOC_CS35L35 is not set -# CONFIG_SND_SOC_CS35L36 is not set -# CONFIG_SND_SOC_CS42L42 is not set -# CONFIG_SND_SOC_CS42L51_I2C is not set -# CONFIG_SND_SOC_CS42L52 is not set -# CONFIG_SND_SOC_CS42L56 is not set -# CONFIG_SND_SOC_CS42L73 is not set -# CONFIG_SND_SOC_CS4234 is not set -# CONFIG_SND_SOC_CS4265 is not set -# CONFIG_SND_SOC_CS4270 is not set -# CONFIG_SND_SOC_CS4271_I2C is not set -# CONFIG_SND_SOC_CS4271_SPI is not set -# CONFIG_SND_SOC_CS42XX8_I2C is not set -# CONFIG_SND_SOC_CS43130 is not set -# CONFIG_SND_SOC_CS4341 is not set -# CONFIG_SND_SOC_CS4349 is not set -# CONFIG_SND_SOC_CS53L30 is not set -# CONFIG_SND_SOC_CX2072X is not set -# CONFIG_SND_SOC_DA7213 is not set -CONFIG_SND_SOC_DMIC=m -CONFIG_SND_SOC_EC25=m -# CONFIG_SND_SOC_ES7134 is not set -# CONFIG_SND_SOC_ES7241 is not set -# CONFIG_SND_SOC_ES8316 is not set -# CONFIG_SND_SOC_ES8328_I2C is not set -# CONFIG_SND_SOC_ES8328_SPI is not set -# CONFIG_SND_SOC_GTM601 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set -# CONFIG_SND_SOC_MAX98088 is not set -CONFIG_SND_SOC_MAX98357A=m -# CONFIG_SND_SOC_MAX98504 is not set -# CONFIG_SND_SOC_MAX9867 is not set -# CONFIG_SND_SOC_MAX98927 is not set -# CONFIG_SND_SOC_MAX98373_I2C is not set -# CONFIG_SND_SOC_MAX98390 is not set -# CONFIG_SND_SOC_MAX9860 is not set -CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m -CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m -# CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM1789_I2C is not set -# CONFIG_SND_SOC_PCM179X_I2C is not set -# CONFIG_SND_SOC_PCM179X_SPI is not set -# CONFIG_SND_SOC_PCM186X_I2C is not set -# CONFIG_SND_SOC_PCM186X_SPI is not set -# CONFIG_SND_SOC_PCM3060_I2C is not set -# CONFIG_SND_SOC_PCM3060_SPI is not set -# CONFIG_SND_SOC_PCM3168A_I2C is not set -# CONFIG_SND_SOC_PCM3168A_SPI is not set -# CONFIG_SND_SOC_PCM5102A is not set -# CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_PCM512x_SPI is not set -# CONFIG_SND_SOC_RK3328 is not set -# CONFIG_SND_SOC_RT5616 is not set -# CONFIG_SND_SOC_RT5631 is not set -# CONFIG_SND_SOC_SGTL5000 is not set -CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m -# CONFIG_SND_SOC_SIMPLE_MUX is not set -# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set -# CONFIG_SND_SOC_SPDIF is not set -# CONFIG_SND_SOC_SSM2305 is not set -# CONFIG_SND_SOC_SSM2602_SPI is not set -# CONFIG_SND_SOC_SSM2602_I2C is not set -# CONFIG_SND_SOC_SSM4567 is not set -# CONFIG_SND_SOC_STA32X is not set -# CONFIG_SND_SOC_STA350 is not set -# CONFIG_SND_SOC_STI_SAS is not set -# CONFIG_SND_SOC_TAS2552 is not set -# CONFIG_SND_SOC_TAS2562 is not set -# CONFIG_SND_SOC_TAS2764 is not set -# CONFIG_SND_SOC_TAS2770 is not set -# CONFIG_SND_SOC_TAS5086 is not set -# CONFIG_SND_SOC_TAS571X is not set -# CONFIG_SND_SOC_TAS5720 is not set -# CONFIG_SND_SOC_TAS6424 is not set -# CONFIG_SND_SOC_TDA7419 is not set -# CONFIG_SND_SOC_TFA9879 is not set -# CONFIG_SND_SOC_TLV320AIC23_I2C is not set -# CONFIG_SND_SOC_TLV320AIC23_SPI is not set -# CONFIG_SND_SOC_TLV320AIC31XX is not set -# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set -# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set -# CONFIG_SND_SOC_TLV320AIC3X is not set -# CONFIG_SND_SOC_TLV320ADCX140 is not set -# CONFIG_SND_SOC_TS3A227E is not set -# CONFIG_SND_SOC_TSCS42XX is not set -# CONFIG_SND_SOC_TSCS454 is not set -# CONFIG_SND_SOC_UDA1334 is not set -# CONFIG_SND_SOC_WM8510 is not set -# CONFIG_SND_SOC_WM8523 is not set -# CONFIG_SND_SOC_WM8524 is not set -# CONFIG_SND_SOC_WM8580 is not set -# CONFIG_SND_SOC_WM8711 is not set -# CONFIG_SND_SOC_WM8728 is not set -# CONFIG_SND_SOC_WM8731 is not set -# CONFIG_SND_SOC_WM8737 is not set -# CONFIG_SND_SOC_WM8741 is not set -# CONFIG_SND_SOC_WM8750 is not set -# CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8770 is not set -# CONFIG_SND_SOC_WM8776 is not set -# CONFIG_SND_SOC_WM8782 is not set -# CONFIG_SND_SOC_WM8804_I2C is not set -# CONFIG_SND_SOC_WM8804_SPI is not set -# CONFIG_SND_SOC_WM8903 is not set -# CONFIG_SND_SOC_WM8904 is not set -# CONFIG_SND_SOC_WM8960 is not set -# CONFIG_SND_SOC_WM8962 is not set -# CONFIG_SND_SOC_WM8974 is not set -# CONFIG_SND_SOC_WM8978 is not set -# CONFIG_SND_SOC_WM8985 is not set -# CONFIG_SND_SOC_ZL38060 is not set -# CONFIG_SND_SOC_ZX_AUD96P22 is not set -# CONFIG_SND_SOC_MAX9759 is not set -# CONFIG_SND_SOC_MT6351 is not set -# CONFIG_SND_SOC_MT6358 is not set -# CONFIG_SND_SOC_MT6660 is not set -# CONFIG_SND_SOC_NAU8315 is not set -# CONFIG_SND_SOC_NAU8540 is not set -# CONFIG_SND_SOC_NAU8810 is not set -# CONFIG_SND_SOC_NAU8822 is not set -# CONFIG_SND_SOC_NAU8824 is not set -# CONFIG_SND_SOC_TPA6130A2 is not set -# CONFIG_SND_SOC_LPASS_WSA_MACRO is not set -# CONFIG_SND_SOC_LPASS_VA_MACRO is not set -# end of CODEC drivers - -CONFIG_SND_SIMPLE_CARD_UTILS=m -CONFIG_SND_SIMPLE_CARD=m -CONFIG_SND_AUDIO_GRAPH_CARD=m -# CONFIG_SND_XEN_FRONTEND is not set - -# -# HID support -# -CONFIG_HID=y -CONFIG_HID_BATTERY_STRENGTH=y -CONFIG_HIDRAW=y -CONFIG_UHID=y -CONFIG_HID_GENERIC=y - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=y -# CONFIG_HID_ACCUTOUCH is not set -# CONFIG_HID_ACRUX is not set -CONFIG_HID_APPLE=y -# CONFIG_HID_APPLEIR is not set -# CONFIG_HID_ASUS is not set -# CONFIG_HID_AUREAL is not set -CONFIG_HID_BELKIN=y -# CONFIG_HID_BETOP_FF is not set -# CONFIG_HID_BIGBEN_FF is not set -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -# CONFIG_HID_CORSAIR is not set -# CONFIG_HID_COUGAR is not set -# CONFIG_HID_MACALLY is not set -# CONFIG_HID_PRODIKEYS is not set -# CONFIG_HID_CMEDIA is not set -# CONFIG_HID_CP2112 is not set -# CONFIG_HID_CREATIVE_SB0540 is not set -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_ELAN is not set -# CONFIG_HID_ELECOM is not set -# CONFIG_HID_ELO is not set -CONFIG_HID_EZKEY=y -# CONFIG_HID_GEMBIRD is not set -# CONFIG_HID_GFRM is not set -# CONFIG_HID_GLORIOUS is not set -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_GOOGLE_HAMMER is not set -# CONFIG_HID_VIVALDI is not set -# CONFIG_HID_GT683R is not set -# CONFIG_HID_KEYTOUCH is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_WALTOP is not set -# CONFIG_HID_VIEWSONIC is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_ICADE is not set -CONFIG_HID_ITE=y -# CONFIG_HID_JABRA is not set -# CONFIG_HID_TWINHAN is not set -CONFIG_HID_KENSINGTON=y -# CONFIG_HID_LCPOWER is not set -# CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set -CONFIG_HID_LOGITECH=y -CONFIG_HID_LOGITECH_DJ=y -CONFIG_HID_LOGITECH_HIDPP=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIWHEELS_FF is not set -# CONFIG_HID_MAGICMOUSE is not set -# CONFIG_HID_MALTRON is not set -# CONFIG_HID_MAYFLASH is not set -CONFIG_HID_REDRAGON=y -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -# CONFIG_HID_MULTITOUCH is not set -# CONFIG_HID_NTI is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_ORTEK is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PENMOUNT is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_PICOLCD is not set -# CONFIG_HID_PLANTRONICS is not set -# CONFIG_HID_PRIMAX is not set -# CONFIG_HID_RETRODE is not set -# CONFIG_HID_ROCCAT is not set -# CONFIG_HID_SAITEK is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SPEEDLINK is not set -# CONFIG_HID_STEAM is not set -# CONFIG_HID_STEELSERIES is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_RMI is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TIVO is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THINGM is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_UDRAW_PS3 is not set -# CONFIG_HID_U2FZERO is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_WIIMOTE is not set -# CONFIG_HID_XINMO is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -# CONFIG_HID_SENSOR_HUB is not set -# CONFIG_HID_ALPS is not set -# CONFIG_HID_MCP2221 is not set -# end of Special HID drivers - -# -# USB HID support -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set -# end of USB HID support - -# -# I2C HID support -# -CONFIG_I2C_HID=m -# end of I2C HID support -# end of HID support - -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_COMMON=y -# CONFIG_USB_LED_TRIG is not set -CONFIG_USB_ULPI_BUS=y -# CONFIG_USB_CONN_GPIO is not set -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB=y -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEFAULT_PERSIST=y -# CONFIG_USB_FEW_INIT_RETRIES is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_PRODUCTLIST is not set -# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set -# CONFIG_USB_OTG_FSM is not set -# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set -CONFIG_USB_AUTOSUSPEND_DELAY=2 -# CONFIG_USB_MON is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_XHCI_HCD=y -# CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_EHCI_FSL is not set -CONFIG_USB_EHCI_HCD_PLATFORM=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_FOTG210_HCD is not set -# CONFIG_USB_MAX3421_HCD is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HCD_TEST_MODE is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -CONFIG_USB_WDM=m -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_REALTEK is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set -# CONFIG_USB_UAS is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USBIP_CORE is not set -# CONFIG_USB_CDNS3 is not set -CONFIG_USB_MUSB_HDRC=y -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_GADGET is not set -CONFIG_USB_MUSB_DUAL_ROLE=y - -# -# Platform Glue Layer -# -CONFIG_USB_MUSB_SUNXI=y - -# -# MUSB DMA mode -# -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_DWC3=y -# CONFIG_USB_DWC3_ULPI is not set -# CONFIG_USB_DWC3_HOST is not set -# CONFIG_USB_DWC3_GADGET is not set -CONFIG_USB_DWC3_DUAL_ROLE=y - -# -# Platform Glue Driver Support -# -CONFIG_USB_DWC3_OF_SIMPLE=y -CONFIG_USB_DWC2=y -# CONFIG_USB_DWC2_HOST is not set - -# -# Gadget/Dual-role mode requires USB Gadget support to be enabled -# -# CONFIG_USB_DWC2_PERIPHERAL is not set -CONFIG_USB_DWC2_DUAL_ROLE=y -# CONFIG_USB_DWC2_DEBUG is not set -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_MSM=y -CONFIG_USB_CHIPIDEA_IMX=y -CONFIG_USB_CHIPIDEA_GENERIC=y -CONFIG_USB_CHIPIDEA_TEGRA=y -CONFIG_USB_ISP1760=y -CONFIG_USB_ISP1760_HCD=y -CONFIG_USB_ISP1761_UDC=y -# CONFIG_USB_ISP1760_HOST_ROLE is not set -# CONFIG_USB_ISP1760_GADGET_ROLE is not set -CONFIG_USB_ISP1760_DUAL_ROLE=y - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_SIMPLE is not set -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -CONFIG_USB_SERIAL_CH341=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_CP210X is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_F81232 is not set -# CONFIG_USB_SERIAL_F8153X is not set -# CONFIG_USB_SERIAL_GARMIN is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_IUU is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_METRO is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_MXUPORT is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_OTI6858 is not set -# CONFIG_USB_SERIAL_QCAUX is not set -# CONFIG_USB_SERIAL_QUALCOMM is not set -# CONFIG_USB_SERIAL_SPCP8X5 is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -CONFIG_USB_SERIAL_WWAN=m -CONFIG_USB_SERIAL_OPTION=m -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_SERIAL_OPTICON is not set -# CONFIG_USB_SERIAL_XSENS_MT is not set -# CONFIG_USB_SERIAL_WISHBONE is not set -# CONFIG_USB_SERIAL_SSU100 is not set -# CONFIG_USB_SERIAL_QT2 is not set -# CONFIG_USB_SERIAL_UPD78F0730 is not set -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_APPLE_MFI_FASTCHARGE is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_EHSET_TEST_FIXTURE is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_YUREX is not set -# CONFIG_USB_EZUSB_FX2 is not set -# CONFIG_USB_HUB_USB251XB is not set -CONFIG_USB_HSIC_USB3503=y -# CONFIG_USB_HSIC_USB4604 is not set -# CONFIG_USB_LINK_LAYER_TEST is not set -# CONFIG_USB_CHAOSKEY is not set - -# -# USB Physical Layer drivers -# -CONFIG_USB_PHY=y -CONFIG_NOP_USB_XCEIV=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ISP1301 is not set -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_VIEWPORT=y -# end of USB Physical Layer drivers - -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 - -# -# USB Peripheral Controller -# -# CONFIG_USB_FOTG210_UDC is not set -# CONFIG_USB_GR_UDC is not set -# CONFIG_USB_R8A66597 is not set -# CONFIG_USB_PXA27X is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MV_U3D is not set -CONFIG_USB_SNP_CORE=y -CONFIG_USB_SNP_UDC_PLAT=y -# CONFIG_USB_M66592 is not set -CONFIG_USB_BDC_UDC=y - -# -# Platform Support -# -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_GADGET_XILINX is not set -# CONFIG_USB_MAX3420_UDC is not set -# CONFIG_USB_DUMMY_HCD is not set -# end of USB Peripheral Controller - -CONFIG_USB_LIBCOMPOSITE=y -CONFIG_USB_U_ETHER=y -CONFIG_USB_F_NCM=y -CONFIG_USB_F_ECM=y -CONFIG_USB_F_EEM=y -CONFIG_USB_F_SUBSET=y -CONFIG_USB_F_RNDIS=y -CONFIG_USB_F_MASS_STORAGE=y -CONFIG_USB_F_FS=y -CONFIG_USB_F_TCM=m -CONFIG_USB_CONFIGFS=y -# CONFIG_USB_CONFIGFS_SERIAL is not set -# CONFIG_USB_CONFIGFS_ACM is not set -# CONFIG_USB_CONFIGFS_OBEX is not set -CONFIG_USB_CONFIGFS_NCM=y -CONFIG_USB_CONFIGFS_ECM=y -# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set -CONFIG_USB_CONFIGFS_RNDIS=y -CONFIG_USB_CONFIGFS_EEM=y -CONFIG_USB_CONFIGFS_MASS_STORAGE=y -# CONFIG_USB_CONFIGFS_F_LB_SS is not set -# CONFIG_USB_CONFIGFS_F_FS is not set -# CONFIG_USB_CONFIGFS_F_UAC1 is not set -# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set -# CONFIG_USB_CONFIGFS_F_UAC2 is not set -# CONFIG_USB_CONFIGFS_F_MIDI is not set -# CONFIG_USB_CONFIGFS_F_HID is not set -# CONFIG_USB_CONFIGFS_F_UVC is not set -# CONFIG_USB_CONFIGFS_F_PRINTER is not set -CONFIG_USB_CONFIGFS_F_TCM=y - -# -# USB Gadget precomposed configurations -# -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_ETH is not set -# CONFIG_USB_G_NCM is not set -# CONFIG_USB_GADGETFS is not set -CONFIG_USB_FUNCTIONFS=y -CONFIG_USB_FUNCTIONFS_ETH=y -CONFIG_USB_FUNCTIONFS_RNDIS=y -CONFIG_USB_FUNCTIONFS_GENERIC=y -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_GADGET_TARGET is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_ACM_MS is not set -# CONFIG_USB_G_MULTI is not set -# CONFIG_USB_G_HID is not set -# CONFIG_USB_G_DBGP is not set -# CONFIG_USB_G_WEBCAM is not set -# CONFIG_USB_RAW_GADGET is not set -# end of USB Gadget precomposed configurations - -CONFIG_TYPEC=y -CONFIG_TYPEC_TCPM=m -CONFIG_TYPEC_TCPCI=m -# CONFIG_TYPEC_RT1711H is not set -# CONFIG_TYPEC_TCPCI_MAXIM is not set -CONFIG_TYPEC_FUSB302=m -CONFIG_TYPEC_UCSI=m -# CONFIG_UCSI_CCG is not set -CONFIG_TYPEC_ANX7688=m -# CONFIG_TYPEC_HD3SS3220 is not set -# CONFIG_TYPEC_TPS6598X is not set -# CONFIG_TYPEC_STUSB160X is not set - -# -# USB Type-C Multiplexer/DeMultiplexer Switch support -# -# CONFIG_TYPEC_MUX_PI3USB30532 is not set -# end of USB Type-C Multiplexer/DeMultiplexer Switch support - -# -# USB Type-C Alternate Mode drivers -# -CONFIG_TYPEC_DP_ALTMODE=m -# CONFIG_TYPEC_NVIDIA_ALTMODE is not set -# end of USB Type-C Alternate Mode drivers - -CONFIG_USB_ROLE_SWITCH=y -CONFIG_MMC=y -CONFIG_PWRSEQ_EMMC=y -# CONFIG_PWRSEQ_SD8787 is not set -CONFIG_PWRSEQ_SIMPLE=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_ARMMMCI=y -CONFIG_MMC_STM32_SDMMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_OF_ARASAN=y -# CONFIG_MMC_SDHCI_OF_ASPEED is not set -# CONFIG_MMC_SDHCI_OF_AT91 is not set -# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set -CONFIG_MMC_SDHCI_CADENCE=y -CONFIG_MMC_SDHCI_F_SDH30=y -# CONFIG_MMC_SDHCI_MILBEAUT is not set -CONFIG_MMC_SPI=y -CONFIG_MMC_DW=y -CONFIG_MMC_DW_PLTFM=y -# CONFIG_MMC_DW_BLUEFIELD is not set -CONFIG_MMC_DW_EXYNOS=y -CONFIG_MMC_DW_HI3798CV200=y -CONFIG_MMC_DW_K3=y -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MMC_USDHI6ROL0 is not set -CONFIG_MMC_SUNXI=y -CONFIG_MMC_CQHCI=y -# CONFIG_MMC_HSQ is not set -# CONFIG_MMC_MTK is not set -CONFIG_MMC_SDHCI_XENON=y -# CONFIG_MMC_SDHCI_OMAP is not set -# CONFIG_MMC_SDHCI_AM654 is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_CLASS_FLASH=y -# CONFIG_LEDS_CLASS_MULTICOLOR is not set -CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y - -# -# LED drivers -# -# CONFIG_LEDS_AAT1290 is not set -# CONFIG_LEDS_AN30259A is not set -# CONFIG_LEDS_AS3645A is not set -# CONFIG_LEDS_AW2013 is not set -# CONFIG_LEDS_BCM6328 is not set -# CONFIG_LEDS_BCM6358 is not set -# CONFIG_LEDS_CR0014114 is not set -# CONFIG_LEDS_EL15203000 is not set -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM3532 is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_LM3692X is not set -# CONFIG_LEDS_LM3601X is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP50XX is not set -# CONFIG_LEDS_LP55XX_COMMON is not set -# CONFIG_LEDS_LP8860 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -# CONFIG_LEDS_DAC124S085 is not set -CONFIG_LEDS_PWM=y -# CONFIG_LEDS_REGULATOR is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_TLC591XX is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_KTD2692 is not set -# CONFIG_LEDS_IS31FL319X is not set -# CONFIG_LEDS_IS31FL32XX is not set - -# -# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) -# -# CONFIG_LEDS_BLINKM is not set -CONFIG_LEDS_SYSCON=y -# CONFIG_LEDS_MLXREG is not set -# CONFIG_LEDS_USER is not set -# CONFIG_LEDS_SPI_BYTE is not set -# CONFIG_LEDS_TI_LMU_COMMON is not set -CONFIG_LEDS_SGM3140=m -# CONFIG_LEDS_AXP20X is not set - -# -# Flash and Torch LED drivers -# -# CONFIG_LEDS_RT8515 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_TIMER is not set -# CONFIG_LEDS_TRIGGER_ONESHOT is not set -CONFIG_LEDS_TRIGGER_DISK=y -# CONFIG_LEDS_TRIGGER_MTD is not set -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -CONFIG_LEDS_TRIGGER_CPU=y -# CONFIG_LEDS_TRIGGER_ACTIVITY is not set -# CONFIG_LEDS_TRIGGER_GPIO is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_LEDS_TRIGGER_TRANSIENT is not set -# CONFIG_LEDS_TRIGGER_CAMERA is not set -CONFIG_LEDS_TRIGGER_PANIC=y -# CONFIG_LEDS_TRIGGER_NETDEV is not set -CONFIG_LEDS_TRIGGER_PATTERN=y -# CONFIG_LEDS_TRIGGER_AUDIO is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_INFINIBAND is not set -CONFIG_EDAC_SUPPORT=y -CONFIG_EDAC=y -CONFIG_EDAC_LEGACY_SYSFS=y -# CONFIG_EDAC_DEBUG is not set -# CONFIG_EDAC_XGENE is not set -# CONFIG_EDAC_DMC520 is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -CONFIG_RTC_SYSTOHC=y -CONFIG_RTC_SYSTOHC_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set -CONFIG_RTC_NVMEM=y - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_ABB5ZES3 is not set -# CONFIG_RTC_DRV_ABEOZ9 is not set -# CONFIG_RTC_DRV_ABX80X is not set -# CONFIG_RTC_DRV_AC100 is not set -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_HYM8563 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -CONFIG_RTC_DRV_MAX77686=y -CONFIG_RTC_DRV_RK808=m -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_ISL12026 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8523 is not set -# CONFIG_RTC_DRV_PCF85063 is not set -# CONFIG_RTC_DRV_PCF85363 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8010 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_RV3028 is not set -# CONFIG_RTC_DRV_RV3032 is not set -# CONFIG_RTC_DRV_RV8803 is not set -CONFIG_RTC_DRV_S5M=y -# CONFIG_RTC_DRV_SD3078 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T93 is not set -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1302 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1343 is not set -# CONFIG_RTC_DRV_DS1347 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6916 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RX4581 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_PCF2123 is not set -# CONFIG_RTC_DRV_MCP795 is not set -CONFIG_RTC_I2C_AND_SPI=y - -# -# SPI and I2C RTC drivers -# -CONFIG_RTC_DRV_DS3232=y -CONFIG_RTC_DRV_DS3232_HWMON=y -# CONFIG_RTC_DRV_PCF2127 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set -# CONFIG_RTC_DRV_RX6110 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1685_FAMILY is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_DS2404 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set -# CONFIG_RTC_DRV_ZYNQMP is not set -# CONFIG_RTC_DRV_CROS_EC is not set - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_PL030 is not set -CONFIG_RTC_DRV_PL031=y -CONFIG_RTC_DRV_SUN6I=y -# CONFIG_RTC_DRV_CADENCE is not set -# CONFIG_RTC_DRV_FTRTC010 is not set -# CONFIG_RTC_DRV_R7301 is not set - -# -# HID Sensor RTC drivers -# -# CONFIG_RTC_DRV_GOLDFISH is not set -CONFIG_DMADEVICES=y -# CONFIG_DMADEVICES_DEBUG is not set - -# -# DMA Devices -# -CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DMA_OF=y -# CONFIG_ALTERA_MSGDMA is not set -# CONFIG_AMBA_PL08X is not set -CONFIG_BCM_SBA_RAID=m -CONFIG_DMA_SUN6I=y -# CONFIG_DW_AXI_DMAC is not set -# CONFIG_FSL_EDMA is not set -# CONFIG_FSL_QDMA is not set -# CONFIG_INTEL_IDMA64 is not set -CONFIG_MV_XOR_V2=y -CONFIG_PL330_DMA=y -# CONFIG_XILINX_DMA is not set -# CONFIG_XILINX_ZYNQMP_DMA is not set -# CONFIG_XILINX_ZYNQMP_DPDMA is not set -CONFIG_QCOM_HIDMA_MGMT=y -CONFIG_QCOM_HIDMA=y -# CONFIG_DW_DMAC is not set -# CONFIG_SF_PDMA is not set - -# -# DMA Clients -# -# CONFIG_ASYNC_TX_DMA is not set -# CONFIG_DMATEST is not set -CONFIG_DMA_ENGINE_RAID=y - -# -# DMABUF options -# -CONFIG_SYNC_FILE=y -# CONFIG_SW_SYNC is not set -# CONFIG_UDMABUF is not set -# CONFIG_DMABUF_MOVE_NOTIFY is not set -# CONFIG_DMABUF_SELFTESTS is not set -# CONFIG_DMABUF_HEAPS is not set -# end of DMABUF options - -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set -CONFIG_VFIO_IOMMU_TYPE1=y -CONFIG_VFIO=y -# CONFIG_VFIO_NOIOMMU is not set -# CONFIG_VFIO_PLATFORM is not set -# CONFIG_VFIO_MDEV is not set -# CONFIG_VIRT_DRIVERS is not set -# CONFIG_VIRTIO_MENU is not set -# CONFIG_VDPA is not set -CONFIG_VHOST_IOTLB=m -CONFIG_VHOST=m -CONFIG_VHOST_MENU=y -CONFIG_VHOST_NET=m -# CONFIG_VHOST_SCSI is not set -CONFIG_VHOST_VSOCK=m -# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set - -# -# Microsoft Hyper-V guest support -# -# end of Microsoft Hyper-V guest support - -# -# Xen driver support -# -# CONFIG_XEN_BALLOON is not set -# CONFIG_XEN_DEV_EVTCHN is not set -# CONFIG_XEN_BACKEND is not set -# CONFIG_XENFS is not set -# CONFIG_XEN_SYS_HYPERVISOR is not set -CONFIG_XEN_XENBUS_FRONTEND=y -# CONFIG_XEN_GNTDEV is not set -# CONFIG_XEN_GRANT_DEV_ALLOC is not set -# CONFIG_XEN_GRANT_DMA_ALLOC is not set -CONFIG_SWIOTLB_XEN=y -# CONFIG_XEN_PVCALLS_FRONTEND is not set -CONFIG_XEN_PRIVCMD=m -CONFIG_XEN_AUTO_XLATE=y -# end of Xen driver support - -# CONFIG_GREYBUS is not set -CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_COMEDI is not set -# CONFIG_RTLLIB is not set -CONFIG_RTL8723BS=m -# CONFIG_R8712U is not set -# CONFIG_R8188EU is not set -# CONFIG_VT6656 is not set - -# -# IIO staging drivers -# - -# -# Accelerometers -# -# CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set -# end of Accelerometers - -# -# Analog to digital converters -# -# CONFIG_AD7816 is not set -# CONFIG_AD7280 is not set -# end of Analog to digital converters - -# -# Analog digital bi-direction converters -# -# CONFIG_ADT7316 is not set -# end of Analog digital bi-direction converters - -# -# Capacitance to digital converters -# -# CONFIG_AD7150 is not set -# CONFIG_AD7746 is not set -# end of Capacitance to digital converters - -# -# Direct Digital Synthesis -# -# CONFIG_AD9832 is not set -# CONFIG_AD9834 is not set -# end of Direct Digital Synthesis - -# -# Network Analyzer, Impedance Converters -# -# CONFIG_AD5933 is not set -# end of Network Analyzer, Impedance Converters - -# -# Active energy metering IC -# -# CONFIG_ADE7854 is not set -# end of Active energy metering IC - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters -# end of IIO staging drivers - -CONFIG_STAGING_MEDIA=y -CONFIG_VIDEO_SUNXI=y -CONFIG_VIDEO_SUNXI_CEDRUS=y - -# -# Android -# -CONFIG_ASHMEM=y -# end of Android - -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_GS_FPGABOOT is not set -# CONFIG_UNISYSSPAR is not set -# CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set - -# -# Gasket devices -# -# end of Gasket devices - -# CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set -# CONFIG_WIMAX is not set -# CONFIG_WFX is not set -# CONFIG_SPMI_HISI3670 is not set -# CONFIG_MFD_HI6421_SPMI is not set -CONFIG_RTL8723CS=m -# CONFIG_GOLDFISH is not set -CONFIG_CHROME_PLATFORMS=y -CONFIG_CROS_EC=y -# CONFIG_CROS_EC_I2C is not set -# CONFIG_CROS_EC_RPMSG is not set -# CONFIG_CROS_EC_SPI is not set -CONFIG_CROS_EC_PROTO=y -CONFIG_CROS_EC_CHARDEV=y -CONFIG_CROS_EC_LIGHTBAR=y -CONFIG_CROS_EC_VBC=y -CONFIG_CROS_EC_DEBUGFS=y -CONFIG_CROS_EC_SENSORHUB=y -CONFIG_CROS_EC_SYSFS=y -CONFIG_CROS_EC_TYPEC=y -CONFIG_CROS_USBPD_NOTIFY=y -# CONFIG_MELLANOX_PLATFORM is not set -CONFIG_HAVE_CLK=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_MAX77686 is not set -# CONFIG_COMMON_CLK_MAX9485 is not set -CONFIG_COMMON_CLK_RK808=y -CONFIG_COMMON_CLK_SCPI=y -# CONFIG_COMMON_CLK_SI5341 is not set -# CONFIG_COMMON_CLK_SI5351 is not set -# CONFIG_COMMON_CLK_SI514 is not set -# CONFIG_COMMON_CLK_SI544 is not set -# CONFIG_COMMON_CLK_SI570 is not set -# CONFIG_COMMON_CLK_CDCE706 is not set -# CONFIG_COMMON_CLK_CDCE925 is not set -CONFIG_COMMON_CLK_CS2000_CP=y -CONFIG_COMMON_CLK_S2MPS11=y -CONFIG_COMMON_CLK_XGENE=y -CONFIG_COMMON_CLK_PWM=y -# CONFIG_COMMON_CLK_VC5 is not set -# CONFIG_COMMON_CLK_FIXED_MMIO is not set -CONFIG_CLK_SUNXI=y -CONFIG_CLK_SUNXI_CLOCKS=y -CONFIG_CLK_SUNXI_PRCM_SUN6I=y -CONFIG_CLK_SUNXI_PRCM_SUN8I=y -CONFIG_CLK_SUNXI_PRCM_SUN9I=y -CONFIG_SUNXI_CCU=y -CONFIG_SUN50I_A64_CCU=y -CONFIG_SUN50I_A100_CCU=y -CONFIG_SUN50I_A100_R_CCU=y -CONFIG_SUN50I_H6_CCU=y -CONFIG_SUN50I_H6_R_CCU=y -# CONFIG_SUN8I_A83T_CCU is not set -CONFIG_SUN8I_H3_CCU=y -CONFIG_SUN8I_DE2_CCU=y -CONFIG_SUN8I_R_CCU=y -CONFIG_HWSPINLOCK=y - -# -# Clock Source drivers -# -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_FSL_ERRATUM_A008585=y -CONFIG_HISILICON_ERRATUM_161010101=y -CONFIG_ARM64_ERRATUM_858921=y -CONFIG_SUN50I_ERRATUM_UNKNOWN1=y -# CONFIG_MICROCHIP_PIT64B is not set -# end of Clock Source drivers - -CONFIG_MAILBOX=y -CONFIG_ARM_MHU=y -# CONFIG_ARM_MHU_V2 is not set -CONFIG_PLATFORM_MHU=y -# CONFIG_PL320_MBOX is not set -# CONFIG_ALTERA_MBOX is not set -# CONFIG_MAILBOX_TEST is not set -CONFIG_SUN6I_MSGBOX=y -CONFIG_IOMMU_IOVA=y -CONFIG_IOMMU_API=y -CONFIG_IOMMU_SUPPORT=y - -# -# Generic IOMMU Pagetable Support -# -CONFIG_IOMMU_IO_PGTABLE=y -CONFIG_IOMMU_IO_PGTABLE_LPAE=y -# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# end of Generic IOMMU Pagetable Support - -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -CONFIG_OF_IOMMU=y -CONFIG_IOMMU_DMA=y -# CONFIG_SUN50I_IOMMU is not set -CONFIG_ARM_SMMU=y -# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set -CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y -CONFIG_ARM_SMMU_V3=y -# CONFIG_ARM_SMMU_V3_SVA is not set - -# -# Remoteproc drivers -# -# CONFIG_REMOTEPROC is not set -# end of Remoteproc drivers - -# -# Rpmsg drivers -# -CONFIG_RPMSG=y -# CONFIG_RPMSG_CHAR is not set -# CONFIG_RPMSG_NS is not set -CONFIG_RPMSG_QCOM_GLINK=y -CONFIG_RPMSG_QCOM_GLINK_RPM=y -# CONFIG_RPMSG_VIRTIO is not set -# end of Rpmsg drivers - -# CONFIG_SOUNDWIRE is not set - -# -# SOC (System On Chip) specific Drivers -# - -# -# Amlogic SoC drivers -# -# end of Amlogic SoC drivers - -# -# Broadcom SoC drivers -# -CONFIG_SOC_BRCMSTB=y -# end of Broadcom SoC drivers - -# -# NXP/Freescale QorIQ SoC drivers -# -# CONFIG_QUICC_ENGINE is not set -# CONFIG_FSL_RCPM is not set -# end of NXP/Freescale QorIQ SoC drivers - -# -# i.MX SoC drivers -# -# end of i.MX SoC drivers - -# -# Enable LiteX SoC Builder specific drivers -# -# CONFIG_LITEX_SOC_CONTROLLER is not set -# end of Enable LiteX SoC Builder specific drivers - -# -# Qualcomm SoC drivers -# -# end of Qualcomm SoC drivers - -CONFIG_SUNXI_MBUS=y -CONFIG_SUNXI_SRAM=y -CONFIG_SOC_TI=y - -# -# Xilinx SoC drivers -# -# CONFIG_XILINX_VCU is not set -# end of Xilinx SoC drivers -# end of SOC (System On Chip) specific Drivers - -CONFIG_PM_DEVFREQ=y - -# -# DEVFREQ Governors -# -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set -# CONFIG_DEVFREQ_GOV_POWERSAVE is not set -# CONFIG_DEVFREQ_GOV_USERSPACE is not set -# CONFIG_DEVFREQ_GOV_PASSIVE is not set - -# -# DEVFREQ Drivers -# -# CONFIG_PM_DEVFREQ_EVENT is not set -CONFIG_EXTCON=y - -# -# Extcon Device Drivers -# -# CONFIG_EXTCON_ADC_JACK is not set -# CONFIG_EXTCON_FSA9480 is not set -# CONFIG_EXTCON_GPIO is not set -# CONFIG_EXTCON_MAX3355 is not set -# CONFIG_EXTCON_PTN5150 is not set -# CONFIG_EXTCON_RT8973A is not set -# CONFIG_EXTCON_SM5502 is not set -CONFIG_EXTCON_USB_GPIO=y -# CONFIG_EXTCON_USBC_CROS_EC is not set -# CONFIG_EXTCON_USBC_TUSB320 is not set -CONFIG_MEMORY=y -# CONFIG_ARM_PL172_MPMC is not set -CONFIG_IIO=y -CONFIG_IIO_BUFFER=y -# CONFIG_IIO_BUFFER_CB is not set -# CONFIG_IIO_BUFFER_DMA is not set -# CONFIG_IIO_BUFFER_DMAENGINE is not set -# CONFIG_IIO_BUFFER_HW_CONSUMER is not set -CONFIG_IIO_KFIFO_BUF=m -CONFIG_IIO_TRIGGERED_BUFFER=m -# CONFIG_IIO_CONFIGFS is not set -CONFIG_IIO_TRIGGER=y -CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 -# CONFIG_IIO_SW_DEVICE is not set -# CONFIG_IIO_SW_TRIGGER is not set -# CONFIG_IIO_TRIGGERED_EVENT is not set - -# -# Accelerometers -# -# CONFIG_ADIS16201 is not set -# CONFIG_ADIS16209 is not set -# CONFIG_ADXL345_I2C is not set -# CONFIG_ADXL345_SPI is not set -# CONFIG_ADXL372_SPI is not set -# CONFIG_ADXL372_I2C is not set -CONFIG_BMA220=m -# CONFIG_BMA400 is not set -CONFIG_BMC150_ACCEL=m -CONFIG_BMC150_ACCEL_I2C=m -CONFIG_BMC150_ACCEL_SPI=m -# CONFIG_DA280 is not set -# CONFIG_DA311 is not set -# CONFIG_DMARD06 is not set -# CONFIG_DMARD09 is not set -# CONFIG_DMARD10 is not set -CONFIG_IIO_ST_ACCEL_3AXIS=m -CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m -CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m -# CONFIG_KXSD9 is not set -# CONFIG_KXCJK1013 is not set -# CONFIG_MC3230 is not set -# CONFIG_MMA7455_I2C is not set -# CONFIG_MMA7455_SPI is not set -# CONFIG_MMA7660 is not set -# CONFIG_MMA8452 is not set -# CONFIG_MMA9551 is not set -# CONFIG_MMA9553 is not set -# CONFIG_MXC4005 is not set -# CONFIG_MXC6255 is not set -# CONFIG_SCA3000 is not set -CONFIG_STK8312=m -CONFIG_STK8BA50=m -# end of Accelerometers - -# -# Analog to digital converters -# -# CONFIG_AD7091R5 is not set -# CONFIG_AD7124 is not set -# CONFIG_AD7192 is not set -# CONFIG_AD7266 is not set -# CONFIG_AD7291 is not set -# CONFIG_AD7292 is not set -# CONFIG_AD7298 is not set -# CONFIG_AD7476 is not set -# CONFIG_AD7606_IFACE_PARALLEL is not set -# CONFIG_AD7606_IFACE_SPI is not set -# CONFIG_AD7766 is not set -# CONFIG_AD7768_1 is not set -# CONFIG_AD7780 is not set -# CONFIG_AD7791 is not set -# CONFIG_AD7793 is not set -# CONFIG_AD7887 is not set -# CONFIG_AD7923 is not set -# CONFIG_AD7949 is not set -# CONFIG_AD799X is not set -# CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set -CONFIG_AXP20X_ADC=y -# CONFIG_AXP288_ADC is not set -# CONFIG_CC10001_ADC is not set -# CONFIG_ENVELOPE_DETECTOR is not set -# CONFIG_HI8435 is not set -# CONFIG_HX711 is not set -# CONFIG_INA2XX_ADC is not set -# CONFIG_LTC2471 is not set -# CONFIG_LTC2485 is not set -# CONFIG_LTC2496 is not set -# CONFIG_LTC2497 is not set -# CONFIG_MAX1027 is not set -# CONFIG_MAX11100 is not set -# CONFIG_MAX1118 is not set -# CONFIG_MAX1241 is not set -# CONFIG_MAX1363 is not set -# CONFIG_MAX9611 is not set -# CONFIG_MCP320X is not set -# CONFIG_MCP3422 is not set -# CONFIG_MCP3911 is not set -# CONFIG_NAU7802 is not set -# CONFIG_QCOM_SPMI_IADC is not set -# CONFIG_QCOM_SPMI_VADC is not set -# CONFIG_QCOM_SPMI_ADC5 is not set -# CONFIG_SD_ADC_MODULATOR is not set -# CONFIG_TI_ADC081C is not set -# CONFIG_TI_ADC0832 is not set -# CONFIG_TI_ADC084S021 is not set -# CONFIG_TI_ADC12138 is not set -# CONFIG_TI_ADC108S102 is not set -# CONFIG_TI_ADC128S052 is not set -# CONFIG_TI_ADC161S626 is not set -# CONFIG_TI_ADS1015 is not set -# CONFIG_TI_ADS7950 is not set -# CONFIG_TI_ADS8344 is not set -# CONFIG_TI_ADS8688 is not set -# CONFIG_TI_ADS124S08 is not set -# CONFIG_TI_TLC4541 is not set -# CONFIG_VF610_ADC is not set -# CONFIG_XILINX_XADC is not set -# end of Analog to digital converters - -# -# Analog Front Ends -# -# CONFIG_IIO_RESCALE is not set -# end of Analog Front Ends - -# -# Amplifiers -# -# CONFIG_AD8366 is not set -# CONFIG_HMC425 is not set -# end of Amplifiers - -# -# Chemical Sensors -# -# CONFIG_ATLAS_PH_SENSOR is not set -# CONFIG_ATLAS_EZO_SENSOR is not set -# CONFIG_BME680 is not set -# CONFIG_CCS811 is not set -# CONFIG_IAQCORE is not set -# CONFIG_PMS7003 is not set -# CONFIG_SCD30_CORE is not set -# CONFIG_SENSIRION_SGP30 is not set -# CONFIG_SPS30 is not set -# CONFIG_VZ89X is not set -# end of Chemical Sensors - -# CONFIG_IIO_CROS_EC_SENSORS_CORE is not set - -# -# Hid Sensor IIO Common -# -# end of Hid Sensor IIO Common - -# -# SSP Sensor Common -# -# CONFIG_IIO_SSP_SENSORHUB is not set -# end of SSP Sensor Common - -CONFIG_IIO_ST_SENSORS_I2C=m -CONFIG_IIO_ST_SENSORS_SPI=m -CONFIG_IIO_ST_SENSORS_CORE=m - -# -# Digital to analog converters -# -# CONFIG_AD5064 is not set -# CONFIG_AD5360 is not set -# CONFIG_AD5380 is not set -# CONFIG_AD5421 is not set -# CONFIG_AD5446 is not set -# CONFIG_AD5449 is not set -# CONFIG_AD5592R is not set -# CONFIG_AD5593R is not set -# CONFIG_AD5504 is not set -# CONFIG_AD5624R_SPI is not set -# CONFIG_AD5686_SPI is not set -# CONFIG_AD5696_I2C is not set -# CONFIG_AD5755 is not set -# CONFIG_AD5758 is not set -# CONFIG_AD5761 is not set -# CONFIG_AD5764 is not set -# CONFIG_AD5770R is not set -# CONFIG_AD5791 is not set -# CONFIG_AD7303 is not set -# CONFIG_AD8801 is not set -# CONFIG_DPOT_DAC is not set -# CONFIG_DS4424 is not set -# CONFIG_LTC1660 is not set -# CONFIG_LTC2632 is not set -# CONFIG_M62332 is not set -# CONFIG_MAX517 is not set -# CONFIG_MAX5821 is not set -# CONFIG_MCP4725 is not set -# CONFIG_MCP4922 is not set -# CONFIG_TI_DAC082S085 is not set -# CONFIG_TI_DAC5571 is not set -# CONFIG_TI_DAC7311 is not set -# CONFIG_TI_DAC7612 is not set -# CONFIG_VF610_DAC is not set -# end of Digital to analog converters - -# -# IIO dummy driver -# -# end of IIO dummy driver - -# -# Frequency Synthesizers DDS/PLL -# - -# -# Clock Generator/Distribution -# -# CONFIG_AD9523 is not set -# end of Clock Generator/Distribution - -# -# Phase-Locked Loop (PLL) frequency synthesizers -# -# CONFIG_ADF4350 is not set -# CONFIG_ADF4371 is not set -# end of Phase-Locked Loop (PLL) frequency synthesizers -# end of Frequency Synthesizers DDS/PLL - -# -# Digital gyroscope sensors -# -# CONFIG_ADIS16080 is not set -# CONFIG_ADIS16130 is not set -# CONFIG_ADIS16136 is not set -# CONFIG_ADIS16260 is not set -# CONFIG_ADXRS290 is not set -# CONFIG_ADXRS450 is not set -# CONFIG_BMG160 is not set -# CONFIG_FXAS21002C is not set -# CONFIG_MPU3050_I2C is not set -# CONFIG_IIO_ST_GYRO_3AXIS is not set -# CONFIG_ITG3200 is not set -# end of Digital gyroscope sensors - -# -# Health Sensors -# - -# -# Heart Rate Monitors -# -# CONFIG_AFE4403 is not set -# CONFIG_AFE4404 is not set -# CONFIG_MAX30100 is not set -# CONFIG_MAX30102 is not set -# end of Heart Rate Monitors -# end of Health Sensors - -# -# Humidity sensors -# -# CONFIG_AM2315 is not set -# CONFIG_DHT11 is not set -# CONFIG_HDC100X is not set -# CONFIG_HDC2010 is not set -# CONFIG_HTS221 is not set -# CONFIG_HTU21 is not set -# CONFIG_SI7005 is not set -# CONFIG_SI7020 is not set -# end of Humidity sensors - -# -# Inertial measurement units -# -# CONFIG_ADIS16400 is not set -# CONFIG_ADIS16460 is not set -# CONFIG_ADIS16475 is not set -# CONFIG_ADIS16480 is not set -# CONFIG_BMI160_I2C is not set -# CONFIG_BMI160_SPI is not set -# CONFIG_FXOS8700_I2C is not set -# CONFIG_FXOS8700_SPI is not set -# CONFIG_KMX61 is not set -# CONFIG_INV_ICM42600_I2C is not set -# CONFIG_INV_ICM42600_SPI is not set -CONFIG_INV_MPU6050_IIO=m -CONFIG_INV_MPU6050_I2C=m -# CONFIG_INV_MPU6050_SPI is not set -# CONFIG_IIO_ST_LSM6DSX is not set -# end of Inertial measurement units - -# -# Light sensors -# -# CONFIG_ADJD_S311 is not set -# CONFIG_ADUX1020 is not set -# CONFIG_AL3010 is not set -# CONFIG_AL3320A is not set -# CONFIG_APDS9300 is not set -# CONFIG_APDS9960 is not set -# CONFIG_AS73211 is not set -# CONFIG_BH1750 is not set -# CONFIG_BH1780 is not set -# CONFIG_CM32181 is not set -# CONFIG_CM3232 is not set -# CONFIG_CM3323 is not set -# CONFIG_CM3605 is not set -# CONFIG_CM36651 is not set -# CONFIG_GP2AP002 is not set -# CONFIG_GP2AP020A00F is not set -# CONFIG_SENSORS_ISL29018 is not set -# CONFIG_SENSORS_ISL29028 is not set -# CONFIG_ISL29125 is not set -# CONFIG_JSA1212 is not set -# CONFIG_RPR0521 is not set -# CONFIG_LTR501 is not set -# CONFIG_LV0104CS is not set -# CONFIG_MAX44000 is not set -# CONFIG_MAX44009 is not set -# CONFIG_NOA1305 is not set -# CONFIG_OPT3001 is not set -# CONFIG_PA12203001 is not set -# CONFIG_SI1133 is not set -# CONFIG_SI1145 is not set -CONFIG_STK3310=m -# CONFIG_ST_UVIS25 is not set -# CONFIG_TCS3414 is not set -# CONFIG_TCS3472 is not set -# CONFIG_SENSORS_TSL2563 is not set -# CONFIG_TSL2583 is not set -# CONFIG_TSL2772 is not set -# CONFIG_TSL4531 is not set -# CONFIG_US5182D is not set -# CONFIG_VCNL4000 is not set -# CONFIG_VCNL4035 is not set -# CONFIG_VEML6030 is not set -# CONFIG_VEML6070 is not set -# CONFIG_VL6180 is not set -# CONFIG_ZOPT2201 is not set -# end of Light sensors - -# -# Magnetometer sensors -# -# CONFIG_AK8974 is not set -# CONFIG_AK8975 is not set -# CONFIG_AK09911 is not set -# CONFIG_BMC150_MAGN_I2C is not set -# CONFIG_BMC150_MAGN_SPI is not set -# CONFIG_MAG3110 is not set -# CONFIG_MMC35240 is not set -CONFIG_IIO_ST_MAGN_3AXIS=m -CONFIG_IIO_ST_MAGN_I2C_3AXIS=m -CONFIG_IIO_ST_MAGN_SPI_3AXIS=m -# CONFIG_SENSORS_HMC5843_I2C is not set -# CONFIG_SENSORS_HMC5843_SPI is not set -# CONFIG_SENSORS_RM3100_I2C is not set -# CONFIG_SENSORS_RM3100_SPI is not set -# end of Magnetometer sensors - -# -# Multiplexers -# -# CONFIG_IIO_MUX is not set -# end of Multiplexers - -# -# Inclinometer sensors -# -# end of Inclinometer sensors - -# -# Triggers - standalone -# -# CONFIG_IIO_INTERRUPT_TRIGGER is not set -# CONFIG_IIO_SYSFS_TRIGGER is not set -# end of Triggers - standalone - -# -# Linear and angular position sensors -# -# end of Linear and angular position sensors - -# -# Digital potentiometers -# -# CONFIG_AD5272 is not set -# CONFIG_DS1803 is not set -# CONFIG_MAX5432 is not set -# CONFIG_MAX5481 is not set -# CONFIG_MAX5487 is not set -# CONFIG_MCP4018 is not set -# CONFIG_MCP4131 is not set -# CONFIG_MCP4531 is not set -# CONFIG_MCP41010 is not set -# CONFIG_TPL0102 is not set -# end of Digital potentiometers - -# -# Digital potentiostats -# -# CONFIG_LMP91000 is not set -# end of Digital potentiostats - -# -# Pressure sensors -# -# CONFIG_ABP060MG is not set -# CONFIG_BMP280 is not set -# CONFIG_DLHL60D is not set -# CONFIG_DPS310 is not set -# CONFIG_HP03 is not set -# CONFIG_ICP10100 is not set -# CONFIG_MPL115_I2C is not set -# CONFIG_MPL115_SPI is not set -# CONFIG_MPL3115 is not set -# CONFIG_MS5611 is not set -# CONFIG_MS5637 is not set -CONFIG_IIO_ST_PRESS=m -CONFIG_IIO_ST_PRESS_I2C=m -CONFIG_IIO_ST_PRESS_SPI=m -# CONFIG_T5403 is not set -# CONFIG_HP206C is not set -# CONFIG_ZPA2326 is not set -# end of Pressure sensors - -# -# Lightning sensors -# -# CONFIG_AS3935 is not set -# end of Lightning sensors - -# -# Proximity and distance sensors -# -# CONFIG_ISL29501 is not set -# CONFIG_LIDAR_LITE_V2 is not set -# CONFIG_MB1232 is not set -# CONFIG_PING is not set -# CONFIG_RFD77402 is not set -# CONFIG_SRF04 is not set -# CONFIG_SX9310 is not set -# CONFIG_SX9500 is not set -# CONFIG_SRF08 is not set -# CONFIG_VCNL3020 is not set -# CONFIG_VL53L0X_I2C is not set -# end of Proximity and distance sensors - -# -# Resolver to digital converters -# -# CONFIG_AD2S90 is not set -# CONFIG_AD2S1200 is not set -# end of Resolver to digital converters - -# -# Temperature sensors -# -# CONFIG_LTC2983 is not set -# CONFIG_MAXIM_THERMOCOUPLE is not set -# CONFIG_MLX90614 is not set -# CONFIG_MLX90632 is not set -# CONFIG_TMP006 is not set -# CONFIG_TMP007 is not set -# CONFIG_TSYS01 is not set -# CONFIG_TSYS02D is not set -# CONFIG_MAX31856 is not set -# end of Temperature sensors - -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -# CONFIG_PWM_ATMEL_TCB is not set -# CONFIG_PWM_CROS_EC is not set -# CONFIG_PWM_FSL_FTM is not set -# CONFIG_PWM_PCA9685 is not set -CONFIG_PWM_SUN4I=y - -# -# IRQ chip support -# -CONFIG_IRQCHIP=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_MAX_NR=1 -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -# CONFIG_AL_FIC is not set -CONFIG_PARTITION_PERCPU=y -# end of IRQ chip support - -# CONFIG_IPACK_BUS is not set -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_RESET_CONTROLLER=y -# CONFIG_RESET_BRCMSTB_RESCAL is not set -# CONFIG_RESET_INTEL_GW is not set -CONFIG_RESET_SIMPLE=y -CONFIG_RESET_SUNXI=y -# CONFIG_RESET_TI_SYSCON is not set - -# -# PHY Subsystem -# -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PHY_MIPI_DPHY=y -CONFIG_PHY_XGENE=y -# CONFIG_USB_LGM_PHY is not set -CONFIG_PHY_SUN4I_USB=y -CONFIG_PHY_SUN6I_MIPI_DPHY=y -# CONFIG_PHY_SUN9I_USB is not set -# CONFIG_PHY_SUN50I_USB3 is not set -# CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_PHY_CADENCE_TORRENT is not set -# CONFIG_PHY_CADENCE_DPHY is not set -# CONFIG_PHY_CADENCE_SIERRA is not set -# CONFIG_PHY_CADENCE_SALVO is not set -# CONFIG_PHY_FSL_IMX8MQ_USB is not set -# CONFIG_PHY_MIXEL_MIPI_DPHY is not set -# CONFIG_PHY_PXA_28NM_HSIC is not set -# CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_CPCAP_USB is not set -# CONFIG_PHY_MAPPHONE_MDM6600 is not set -# CONFIG_PHY_OCELOT_SERDES is not set -CONFIG_PHY_QCOM_USB_HS=y -# CONFIG_PHY_QCOM_USB_HSIC is not set -CONFIG_PHY_SAMSUNG_USB2=y -# CONFIG_PHY_TUSB1210 is not set -# end of PHY Subsystem - -# CONFIG_POWERCAP is not set -# CONFIG_MCB is not set - -# -# Performance monitor support -# -# CONFIG_ARM_CCI_PMU is not set -# CONFIG_ARM_CCN is not set -# CONFIG_ARM_CMN is not set -CONFIG_ARM_PMU=y -# CONFIG_ARM_DSU_PMU is not set -# CONFIG_ARM_SPE_PMU is not set -# end of Performance monitor support - -CONFIG_RAS=y - -# -# Android -# -CONFIG_ANDROID=y -CONFIG_ANDROID_BINDER_IPC=y -CONFIG_ANDROID_BINDERFS=y -CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder" -# CONFIG_ANDROID_BINDER_IPC_SELFTEST is not set -# end of Android - -# CONFIG_LIBNVDIMM is not set -# CONFIG_DAX is not set -CONFIG_NVMEM=y -CONFIG_NVMEM_SYSFS=y -# CONFIG_NVMEM_SPMI_SDAM is not set -CONFIG_NVMEM_SUNXI_SID=y - -# -# HW tracing support -# -# CONFIG_STM is not set -# CONFIG_INTEL_TH is not set -# end of HW tracing support - -# CONFIG_FPGA is not set -# CONFIG_FSI is not set -CONFIG_TEE=y - -# -# TEE drivers -# -CONFIG_OPTEE=y -CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 -# end of TEE drivers - -CONFIG_PM_OPP=y -# CONFIG_SIOX is not set -# CONFIG_SLIMBUS is not set -# CONFIG_INTERCONNECT is not set -# CONFIG_COUNTER is not set -# CONFIG_MOST is not set -# end of Device Drivers - -# -# File systems -# -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_VALIDATE_FS_PARSER=y -CONFIG_FS_IOMAP=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_ASSERT is not set -# CONFIG_BTRFS_FS_REF_VERIFY is not set -# CONFIG_NILFS2_FS is not set -CONFIG_F2FS_FS=m -CONFIG_F2FS_STAT_FS=y -CONFIG_F2FS_FS_XATTR=y -CONFIG_F2FS_FS_POSIX_ACL=y -# CONFIG_F2FS_FS_SECURITY is not set -# CONFIG_F2FS_CHECK_FS is not set -# CONFIG_F2FS_FAULT_INJECTION is not set -CONFIG_F2FS_FS_COMPRESSION=y -CONFIG_F2FS_FS_LZO=y -CONFIG_F2FS_FS_LZ4=y -CONFIG_F2FS_FS_ZSTD=y -CONFIG_F2FS_FS_LZORLE=y -# CONFIG_FS_DAX is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=y -# CONFIG_EXPORTFS_BLOCK_OPS is not set -CONFIG_FILE_LOCKING=y -CONFIG_MANDATORY_FILE_LOCKING=y -# CONFIG_FS_ENCRYPTION is not set -# CONFIG_FS_VERITY is not set -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_FANOTIFY=y -CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=y -CONFIG_AUTOFS_FS=y -CONFIG_FUSE_FS=y -CONFIG_CUSE=m -# CONFIG_VIRTIO_FS is not set -CONFIG_OVERLAY_FS=m -# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set -CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y -# CONFIG_OVERLAY_FS_INDEX is not set -# CONFIG_OVERLAY_FS_XINO_AUTO is not set -# CONFIG_OVERLAY_FS_METACOPY is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set -# end of Caches - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set -# end of CD-ROM/DVD Filesystems - -# -# DOS/FAT/EXFAT/NT Filesystems -# -CONFIG_FAT_FS=y -# CONFIG_MSDOS_FS is not set -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_FAT_DEFAULT_UTF8 is not set -CONFIG_EXFAT_FS=m -CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y -# end of DOS/FAT/EXFAT/NT Filesystems - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -# CONFIG_PROC_KCORE is not set -CONFIG_PROC_VMCORE=y -# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_PROC_CHILDREN is not set -CONFIG_KERNFS=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TMPFS_XATTR=y -# CONFIG_TMPFS_INODE64 is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -CONFIG_MEMFD_CREATE=y -CONFIG_ARCH_HAS_GIGANTIC_PAGE=y -CONFIG_CONFIGFS_FS=y -# end of Pseudo filesystems - -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ORANGEFS_FS is not set -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_ECRYPT_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_SQUASHFS=y -CONFIG_SQUASHFS_FILE_CACHE=y -# CONFIG_SQUASHFS_FILE_DIRECT is not set -CONFIG_SQUASHFS_DECOMP_SINGLE=y -# CONFIG_SQUASHFS_DECOMP_MULTI is not set -# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set -CONFIG_SQUASHFS_XATTR=y -CONFIG_SQUASHFS_ZLIB=y -CONFIG_SQUASHFS_LZ4=y -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_ZSTD is not set -# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=y -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_PSTORE=y -CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240 -CONFIG_PSTORE_DEFLATE_COMPRESS=y -# CONFIG_PSTORE_LZO_COMPRESS is not set -# CONFIG_PSTORE_LZ4_COMPRESS is not set -# CONFIG_PSTORE_LZ4HC_COMPRESS is not set -# CONFIG_PSTORE_842_COMPRESS is not set -# CONFIG_PSTORE_ZSTD_COMPRESS is not set -CONFIG_PSTORE_COMPRESS=y -CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y -CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" -# CONFIG_PSTORE_CONSOLE is not set -# CONFIG_PSTORE_PMSG is not set -# CONFIG_PSTORE_RAM is not set -# CONFIG_PSTORE_BLK is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_EROFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V2=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_SWAP is not set -CONFIG_NFS_V4_1=y -CONFIG_NFS_V4_2=y -CONFIG_PNFS_FILE_LAYOUT=y -CONFIG_PNFS_BLOCK=y -CONFIG_PNFS_FLEXFILE_LAYOUT=m -CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" -# CONFIG_NFS_V4_1_MIGRATION is not set -CONFIG_NFS_V4_SECURITY_LABEL=y -CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -CONFIG_NFS_DISABLE_UDP_SUPPORT=y -# CONFIG_NFS_V4_2_READ_PLUS is not set -# CONFIG_NFSD is not set -CONFIG_GRACE_PERIOD=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_SUNRPC_BACKCHANNEL=y -# CONFIG_SUNRPC_DEBUG is not set -# CONFIG_CEPH_FS is not set -CONFIG_CIFS=m -# CONFIG_CIFS_STATS2 is not set -CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -# CONFIG_CIFS_POSIX is not set -CONFIG_CIFS_DEBUG=y -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set -# CONFIG_CIFS_DFS_UPCALL is not set -# CONFIG_CIFS_SWN_UPCALL is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -CONFIG_9P_FS=y -# CONFIG_9P_FS_POSIX_ACL is not set -# CONFIG_9P_FS_SECURITY is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_MAC_ROMAN is not set -# CONFIG_NLS_MAC_CELTIC is not set -# CONFIG_NLS_MAC_CENTEURO is not set -# CONFIG_NLS_MAC_CROATIAN is not set -# CONFIG_NLS_MAC_CYRILLIC is not set -# CONFIG_NLS_MAC_GAELIC is not set -# CONFIG_NLS_MAC_GREEK is not set -# CONFIG_NLS_MAC_ICELAND is not set -# CONFIG_NLS_MAC_INUIT is not set -# CONFIG_NLS_MAC_ROMANIAN is not set -# CONFIG_NLS_MAC_TURKISH is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set -# CONFIG_UNICODE is not set -CONFIG_IO_WQ=y -# end of File systems - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_REQUEST_CACHE is not set -# CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_TRUSTED_KEYS is not set -# CONFIG_ENCRYPTED_KEYS is not set -# CONFIG_KEY_DH_OPERATIONS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -CONFIG_SECURITY=y -CONFIG_SECURITYFS=y -# CONFIG_SECURITY_NETWORK is not set -# CONFIG_SECURITY_PATH is not set -CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set -# CONFIG_STATIC_USERMODEHELPER is not set -# CONFIG_SECURITY_SMACK is not set -# CONFIG_SECURITY_TOMOYO is not set -# CONFIG_SECURITY_APPARMOR is not set -# CONFIG_SECURITY_LOADPIN is not set -# CONFIG_SECURITY_YAMA is not set -# CONFIG_SECURITY_SAFESETID is not set -# CONFIG_SECURITY_LOCKDOWN_LSM is not set -CONFIG_INTEGRITY=y -# CONFIG_INTEGRITY_SIGNATURE is not set -# CONFIG_IMA is not set -# CONFIG_EVM is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_LSM="yama,loadpin,integrity,selinux,smack,tomoyo,apparmor" - -# -# Kernel hardening options -# - -# -# Memory initialization -# -CONFIG_INIT_STACK_NONE=y -# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set -# CONFIG_GCC_PLUGIN_STACKLEAK is not set -# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set -# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set -# end of Memory initialization -# end of Kernel hardening options -# end of Security options - -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y -CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_SKCIPHER=y -CONFIG_CRYPTO_SKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_KPP=m -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_USER is not set -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -# CONFIG_CRYPTO_PCRYPT is not set -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_AUTHENC=y -# CONFIG_CRYPTO_TEST is not set -CONFIG_CRYPTO_SIMD=y - -# -# Public-key cryptography -# -CONFIG_CRYPTO_RSA=y -# CONFIG_CRYPTO_DH is not set -CONFIG_CRYPTO_ECC=m -CONFIG_CRYPTO_ECDH=m -# CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set -# CONFIG_CRYPTO_CURVE25519 is not set - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=y -CONFIG_CRYPTO_GCM=y -# CONFIG_CRYPTO_CHACHA20POLY1305 is not set -# CONFIG_CRYPTO_AEGIS128 is not set -CONFIG_CRYPTO_SEQIV=m -CONFIG_CRYPTO_ECHAINIV=y - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set -CONFIG_CRYPTO_CTR=y -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set -# CONFIG_CRYPTO_KEYWRAP is not set -# CONFIG_CRYPTO_ADIANTUM is not set -CONFIG_CRYPTO_ESSIV=y - -# -# Hash modes -# -CONFIG_CRYPTO_CMAC=y -CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32=m -CONFIG_CRYPTO_XXHASH=m -CONFIG_CRYPTO_BLAKE2B=m -# CONFIG_CRYPTO_BLAKE2S is not set -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_GHASH=y -# CONFIG_CRYPTO_POLY1305 is not set -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=m -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_SHA3=m -CONFIG_CRYPTO_SM3=m -# CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_TI is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=m -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_SALSA20 is not set -CONFIG_CRYPTO_CHACHA20=m -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_SM4 is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_LZO=y -# CONFIG_CRYPTO_842 is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set -# CONFIG_CRYPTO_ZSTD is not set - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_DRBG_HMAC=y -# CONFIG_CRYPTO_DRBG_HASH is not set -# CONFIG_CRYPTO_DRBG_CTR is not set -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_USER_API_HASH is not set -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -# CONFIG_CRYPTO_USER_API_RNG is not set -# CONFIG_CRYPTO_USER_API_AEAD is not set -CONFIG_CRYPTO_HASH_INFO=y - -# -# Crypto library routines -# -CONFIG_CRYPTO_LIB_AES=y -CONFIG_CRYPTO_LIB_ARC4=m -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=m -CONFIG_CRYPTO_LIB_BLAKE2S=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m -CONFIG_CRYPTO_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m -CONFIG_CRYPTO_LIB_CURVE25519=m -CONFIG_CRYPTO_LIB_DES=m -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 -CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_ALLWINNER=y -# CONFIG_CRYPTO_DEV_SUN4I_SS is not set -# CONFIG_CRYPTO_DEV_SUN8I_CE is not set -# CONFIG_CRYPTO_DEV_SUN8I_SS is not set -# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set -# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set -# CONFIG_CRYPTO_DEV_CCP is not set -# CONFIG_CRYPTO_DEV_SAFEXCEL is not set -# CONFIG_CRYPTO_DEV_CCREE is not set -# CONFIG_CRYPTO_DEV_HISI_SEC is not set -# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set -CONFIG_ASYMMETRIC_KEY_TYPE=y -CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y -CONFIG_X509_CERTIFICATE_PARSER=y -# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set -CONFIG_PKCS7_MESSAGE_PARSER=y -# CONFIG_PKCS7_TEST_KEY is not set -# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set - -# -# Certificates for signature checking -# -CONFIG_SYSTEM_TRUSTED_KEYRING=y -CONFIG_SYSTEM_TRUSTED_KEYS="" -# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set -# CONFIG_SECONDARY_TRUSTED_KEYRING is not set -# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set -# end of Certificates for signature checking - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_RAID6_PQ_BENCHMARK=y -CONFIG_LINEAR_RANGES=y -# CONFIG_PACKING is not set -CONFIG_BITREVERSE=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_NET_UTILS=y -# CONFIG_CORDIC is not set -# CONFIG_PRIME_NUMBERS is not set -CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_USE_SYM_ANNOTATIONS=y -CONFIG_INDIRECT_PIO=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -# CONFIG_CRC8 is not set -CONFIG_XXHASH=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_RANDOM32_SELFTEST is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_LZ4_COMPRESS=y -CONFIG_LZ4_DECOMPRESS=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y -CONFIG_XZ_DEC=y -CONFIG_XZ_DEC_X86=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_BCJ=y -# CONFIG_XZ_DEC_TEST is not set -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_LZ4=y -CONFIG_DECOMPRESS_ZSTD=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_INTERVAL_TREE=y -CONFIG_XARRAY_MULTI=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_DMA_DECLARE_COHERENT=y -CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y -CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y -CONFIG_SWIOTLB=y -CONFIG_DMA_NONCOHERENT_MMAP=y -CONFIG_DMA_COHERENT_POOL=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_CMA=y -CONFIG_DMA_PERNUMA_CMA=y - -# -# Default contiguous memory area size: -# -CONFIG_CMA_SIZE_MBYTES=256 -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_ALIGNMENT=8 -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_DMA_MAP_BENCHMARK is not set -CONFIG_SGL_ALLOC=y -CONFIG_CPU_RMAP=y -CONFIG_DQL=y -CONFIG_GLOB=y -# CONFIG_GLOB_SELFTEST is not set -CONFIG_NLATTR=y -CONFIG_CLZ_TAB=y -# CONFIG_IRQ_POLL is not set -CONFIG_MPILIB=y -CONFIG_LIBFDT=y -CONFIG_OID_REGISTRY=y -CONFIG_HAVE_GENERIC_VDSO=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_VDSO_TIME_NS=y -CONFIG_FONT_SUPPORT=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_SG_POOL=y -CONFIG_ARCH_STACKWALK=y -CONFIG_SBITMAP=y -# CONFIG_STRING_SELFTEST is not set -# end of Library routines - -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y - -# -# Kernel hacking -# - -# -# printk and dmesg options -# -CONFIG_PRINTK_TIME=y -# CONFIG_PRINTK_CALLER is not set -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 -CONFIG_CONSOLE_LOGLEVEL_QUIET=4 -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DYNAMIC_DEBUG_CORE is not set -CONFIG_SYMBOLIC_ERRNAME=y -CONFIG_DEBUG_BUGVERBOSE=y -# end of printk and dmesg options - -# -# Compile-time checks and compiler options -# -CONFIG_FRAME_WARN=2048 -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_HEADERS_INSTALL is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_SECTION_MISMATCH_WARN_ONLY=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_FRAME_POINTER=y -# end of Compile-time checks and compiler options - -# -# Generic Kernel Debugging Instruments -# -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 -CONFIG_MAGIC_SYSRQ_SERIAL=y -CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_FS_ALLOW_ALL=y -# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set -# CONFIG_DEBUG_FS_ALLOW_NONE is not set -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y -# CONFIG_UBSAN is not set -# end of Generic Kernel Debugging Instruments - -# CONFIG_DEBUG_KERNEL is not set - -# -# Memory Debugging -# -# CONFIG_PAGE_EXTENSION is not set -# CONFIG_PAGE_POISONING is not set -# CONFIG_DEBUG_RODATA_TEST is not set -CONFIG_ARCH_HAS_DEBUG_WX=y -# CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y -# CONFIG_DEBUG_VM_PGTABLE is not set -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y -CONFIG_HAVE_ARCH_KASAN_HW_TAGS=y -CONFIG_CC_HAS_KASAN_GENERIC=y -CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y -# CONFIG_KASAN is not set -# end of Memory Debugging - -# -# Debug Oops, Lockups and Hangs -# -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -# CONFIG_TEST_LOCKUP is not set -# end of Debug Oops, Lockups and Hangs - -# -# Scheduler Debugging -# -CONFIG_SCHED_INFO=y -# end of Scheduler Debugging - -# CONFIG_DEBUG_TIMEKEEPING is not set - -# -# Lock Debugging (spinlocks, mutexes, etc...) -# -CONFIG_LOCK_DEBUGGING_SUPPORT=y -# CONFIG_WW_MUTEX_SELFTEST is not set -# end of Lock Debugging (spinlocks, mutexes, etc...) - -# CONFIG_STACKTRACE is not set -# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set -CONFIG_HAVE_DEBUG_BUGVERBOSE=y - -# -# Debug kernel data structures -# -# CONFIG_BUG_ON_DATA_CORRUPTION is not set -# end of Debug kernel data structures - -# -# RCU Debugging -# -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# end of RCU Debugging - -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_SAMPLES is not set -CONFIG_STRICT_DEVMEM=y -# CONFIG_IO_STRICT_DEVMEM is not set - -# -# arm64 Debugging -# -# CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_ARM64_RELOC_TEST is not set -# CONFIG_CORESIGHT is not set -# end of arm64 Debugging - -# -# Kernel Testing and Coverage -# -# CONFIG_KUNIT is not set -CONFIG_ARCH_HAS_KCOV=y -CONFIG_CC_HAS_SANCOV_TRACE_PC=y -# CONFIG_KCOV is not set -CONFIG_RUNTIME_TESTING_MENU=y -# CONFIG_LKDTM is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_TEST_MIN_HEAP is not set -# CONFIG_TEST_SORT is not set -# CONFIG_REED_SOLOMON_TEST is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_TEST_HEXDUMP is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_STRSCPY is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_BITMAP is not set -# CONFIG_TEST_UUID is not set -# CONFIG_TEST_XARRAY is not set -# CONFIG_TEST_OVERFLOW is not set -# CONFIG_TEST_RHASHTABLE is not set -# CONFIG_TEST_HASH is not set -# CONFIG_TEST_IDA is not set -# CONFIG_TEST_LKM is not set -# CONFIG_TEST_BITOPS is not set -# CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set -# CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set -# CONFIG_FIND_BIT_BENCHMARK is not set -# CONFIG_TEST_FIRMWARE is not set -# CONFIG_TEST_SYSCTL is not set -# CONFIG_TEST_UDELAY is not set -# CONFIG_TEST_STATIC_KEYS is not set -# CONFIG_TEST_KMOD is not set -# CONFIG_TEST_MEMCAT_P is not set -# CONFIG_TEST_STACKINIT is not set -# CONFIG_TEST_MEMINIT is not set -# CONFIG_TEST_FREE_PAGES is not set -CONFIG_MEMTEST=y -# end of Kernel Testing and Coverage -# end of Kernel hacking diff --git a/sys-kernel/pinephone-sources/files/config-5.10.14 b/sys-kernel/pinephone-sources/files/config-5.10.14 deleted file mode 100644 index 99178ff..0000000 --- a/sys-kernel/pinephone-sources/files/config-5.10.14 +++ /dev/null @@ -1,5849 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.10.14 Kernel Configuration -# -CONFIG_CC_VERSION_TEXT="aarch64-unknown-linux-gnu-gcc (Gentoo 10.2.0-r5 p6) 10.2.0" -CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=100200 -CONFIG_LD_VERSION=235010000 -CONFIG_CLANG_VERSION=0 -CONFIG_LLD_VERSION=0 -CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y -CONFIG_CC_HAS_ASM_GOTO=y -CONFIG_CC_HAS_ASM_INLINE=y -CONFIG_IRQ_WORK=y -CONFIG_BUILDTIME_TABLE_SORT=y -CONFIG_THREAD_INFO_IN_TASK=y - -# -# General setup -# -CONFIG_INIT_ENV_ARG_LIMIT=32 -# CONFIG_COMPILE_TEST is not set -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_BUILD_SALT="" -CONFIG_DEFAULT_INIT="" -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_WATCH_QUEUE is not set -CONFIG_CROSS_MEMORY_ATTACH=y -# CONFIG_USELIB is not set -# CONFIG_AUDIT is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y -CONFIG_GENERIC_IRQ_IPI=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_IRQ_MSI_IOMMU=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_SPARSE_IRQ=y -# CONFIG_GENERIC_IRQ_DEBUGFS is not set -# end of IRQ subsystem - -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y - -# -# Timers subsystem -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ_COMMON=y -# CONFIG_HZ_PERIODIC is not set -CONFIG_NO_HZ_IDLE=y -# CONFIG_NO_HZ_FULL is not set -# CONFIG_NO_HZ is not set -CONFIG_HIGH_RES_TIMERS=y -# end of Timers subsystem - -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set - -# -# CPU/Task time and stats accounting -# -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_PSI is not set -# end of CPU/Task time and stats accounting - -CONFIG_CPU_ISOLATION=y - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_RCU_EXPERT is not set -CONFIG_SRCU=y -CONFIG_TREE_SRCU=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RCU_NEED_SEGCBLIST=y -# end of RCU Subsystem - -CONFIG_IKCONFIG=m -CONFIG_IKCONFIG_PROC=y -# CONFIG_IKHEADERS is not set -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 -CONFIG_GENERIC_SCHED_CLOCK=y - -# -# Scheduler features -# -# CONFIG_UCLAMP_TASK is not set -# end of Scheduler features - -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_CC_HAS_INT128=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_NUMA_BALANCING=y -CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y -CONFIG_CGROUPS=y -CONFIG_PAGE_COUNTER=y -CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_KMEM=y -CONFIG_BLK_CGROUP=y -CONFIG_CGROUP_WRITEBACK=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_CFS_BANDWIDTH is not set -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_CGROUP_PIDS=y -# CONFIG_CGROUP_RDMA is not set -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_HUGETLB=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_PERF=y -# CONFIG_CGROUP_DEBUG is not set -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_TIME_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -# CONFIG_CHECKPOINT_RESTORE is not set -CONFIG_SCHED_AUTOGROUP=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_RD_XZ=y -CONFIG_RD_LZO=y -CONFIG_RD_LZ4=y -CONFIG_RD_ZSTD=y -# CONFIG_BOOT_CONFIG is not set -CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_LD_ORPHAN_WARN=y -CONFIG_SYSCTL=y -CONFIG_HAVE_UID16=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_BPF=y -# CONFIG_EXPERT is not set -CONFIG_UID16=y -CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_FHANDLE=y -CONFIG_POSIX_TIMERS=y -CONFIG_PRINTK=y -CONFIG_PRINTK_NMI=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_FUTEX_PI=y -CONFIG_HAVE_FUTEX_CMPXCHG=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_IO_URING=y -CONFIG_ADVISE_SYSCALLS=y -CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -# CONFIG_BPF_SYSCALL is not set -CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y -CONFIG_BPF_JIT_DEFAULT_ON=y -# CONFIG_USERFAULTFD is not set -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_RSEQ=y -# CONFIG_EMBEDDED is not set -CONFIG_HAVE_PERF_EVENTS=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -# end of Kernel Performance Events And Counters - -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -CONFIG_SLAB_MERGE_DEFAULT=y -# CONFIG_SLAB_FREELIST_RANDOM is not set -# CONFIG_SLAB_FREELIST_HARDENED is not set -# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set -CONFIG_SLUB_CPU_PARTIAL=y -CONFIG_SYSTEM_DATA_VERIFICATION=y -CONFIG_PROFILING=y -# end of General setup - -CONFIG_ARM64=y -CONFIG_64BIT=y -CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_CONT_PTE_SHIFT=4 -CONFIG_ARM64_CONT_PMD_SHIFT=4 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=33 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 -CONFIG_NO_IOPORT_MAP=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_ZONE_DMA32=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_SMP=y -CONFIG_KERNEL_MODE_NEON=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_PGTABLE_LEVELS=4 -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_PROC_KCORE_TEXT=y - -# -# Platform selection -# -# CONFIG_ARCH_ACTIONS is not set -# CONFIG_ARCH_AGILEX is not set -CONFIG_ARCH_SUNXI=y -# CONFIG_ARCH_ALPINE is not set -# CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM_IPROC is not set -# CONFIG_ARCH_BERLIN is not set -# CONFIG_ARCH_BITMAIN is not set -# CONFIG_ARCH_BRCMSTB is not set -# CONFIG_ARCH_EXYNOS is not set -# CONFIG_ARCH_SPARX5 is not set -# CONFIG_ARCH_K3 is not set -# CONFIG_ARCH_LAYERSCAPE is not set -# CONFIG_ARCH_LG1K is not set -# CONFIG_ARCH_HISI is not set -# CONFIG_ARCH_KEEMBAY is not set -# CONFIG_ARCH_MEDIATEK is not set -# CONFIG_ARCH_MESON is not set -# CONFIG_ARCH_MVEBU is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_REALTEK is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_ROCKCHIP is not set -# CONFIG_ARCH_S32 is not set -# CONFIG_ARCH_SEATTLE is not set -# CONFIG_ARCH_STRATIX10 is not set -# CONFIG_ARCH_SYNQUACER is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_SPRD is not set -# CONFIG_ARCH_THUNDER is not set -# CONFIG_ARCH_THUNDER2 is not set -# CONFIG_ARCH_UNIPHIER is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_VISCONTI is not set -# CONFIG_ARCH_XGENE is not set -# CONFIG_ARCH_ZX is not set -# CONFIG_ARCH_ZYNQMP is not set -# end of Platform selection - -# -# Kernel Features -# - -# -# ARM errata workarounds via the alternatives framework -# -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_845719=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_1024718=y -CONFIG_ARM64_ERRATUM_1418040=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1319367=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_ERRATUM_1463225=y -CONFIG_ARM64_ERRATUM_1542419=y -CONFIG_ARM64_ERRATUM_1508412=y -CONFIG_CAVIUM_ERRATUM_22375=y -CONFIG_CAVIUM_ERRATUM_23144=y -CONFIG_CAVIUM_ERRATUM_23154=y -CONFIG_CAVIUM_ERRATUM_27456=y -CONFIG_CAVIUM_ERRATUM_30115=y -CONFIG_CAVIUM_TX2_ERRATUM_219=y -CONFIG_FUJITSU_ERRATUM_010001=y -CONFIG_HISILICON_ERRATUM_161600802=y -CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_QCOM_FALKOR_ERRATUM_1009=y -CONFIG_QCOM_QDF2400_ERRATUM_0065=y -CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y -# end of ARM errata workarounds via the alternatives framework - -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_16K_PAGES is not set -# CONFIG_ARM64_64K_PAGES is not set -# CONFIG_ARM64_VA_BITS_39 is not set -CONFIG_ARM64_VA_BITS_48=y -CONFIG_ARM64_VA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PA_BITS=48 -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SCHED_MC=y -# CONFIG_SCHED_SMT is not set -CONFIG_NR_CPUS=64 -CONFIG_HOTPLUG_CPU=y -CONFIG_NUMA=y -CONFIG_NODES_SHIFT=2 -CONFIG_USE_PERCPU_NUMA_NODE_ID=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_300 is not set -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_SCHED_HRTICK=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HW_PERF_EVENTS=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_PARAVIRT=y -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set -CONFIG_KEXEC=y -# CONFIG_KEXEC_FILE is not set -CONFIG_CRASH_DUMP=y -CONFIG_XEN_DOM0=y -CONFIG_XEN=y -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_COMPAT=y -CONFIG_KUSER_HELPERS=y -# CONFIG_ARMV8_DEPRECATED is not set - -# -# ARMv8.1 architectural features -# -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_PAN=y -CONFIG_ARM64_LSE_ATOMICS=y -CONFIG_ARM64_USE_LSE_ATOMICS=y -CONFIG_ARM64_VHE=y -# end of ARMv8.1 architectural features - -# -# ARMv8.2 architectural features -# -CONFIG_ARM64_UAO=y -# CONFIG_ARM64_PMEM is not set -CONFIG_ARM64_RAS_EXTN=y -CONFIG_ARM64_CNP=y -# end of ARMv8.2 architectural features - -# -# ARMv8.3 architectural features -# -CONFIG_ARM64_PTR_AUTH=y -CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y -CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y -CONFIG_AS_HAS_PAC=y -CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y -# end of ARMv8.3 architectural features - -# -# ARMv8.4 architectural features -# -CONFIG_ARM64_AMU_EXTN=y -CONFIG_AS_HAS_ARMV8_4=y -CONFIG_ARM64_TLB_RANGE=y -# end of ARMv8.4 architectural features - -# -# ARMv8.5 architectural features -# -CONFIG_ARM64_BTI=y -CONFIG_ARM64_BTI_KERNEL=y -CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y -CONFIG_ARM64_E0PD=y -CONFIG_ARCH_RANDOM=y -CONFIG_ARM64_AS_HAS_MTE=y -CONFIG_ARM64_MTE=y -# end of ARMv8.5 architectural features - -CONFIG_ARM64_SVE=y -CONFIG_ARM64_MODULE_PLTS=y -# CONFIG_ARM64_PSEUDO_NMI is not set -CONFIG_RELOCATABLE=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_STACKPROTECTOR_PER_TASK=y -# end of Kernel Features - -# -# Boot options -# -CONFIG_CMDLINE="console=ttyAMA0" -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_EFI is not set -# end of Boot options - -CONFIG_SYSVIPC_COMPAT=y -CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y -CONFIG_ARCH_ENABLE_THP_MIGRATION=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HIBERNATION=y -CONFIG_HIBERNATION_SNAPSHOT_DEV=y -CONFIG_PM_STD_PARTITION="" -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_PM_AUTOSLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_WAKELOCKS_LIMIT=100 -CONFIG_PM_WAKELOCKS_GC=y -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_CPU_PM=y -CONFIG_ENERGY_MODEL=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_HIBERNATION_HEADER=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# end of Power management options - -# -# CPU Power Management -# - -# -# CPU Idle -# -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y -# CONFIG_CPU_IDLE_GOV_LADDER is not set -CONFIG_CPU_IDLE_GOV_MENU=y -# CONFIG_CPU_IDLE_GOV_TEO is not set -CONFIG_DT_IDLE_STATES=y - -# -# ARM CPU Idle Drivers -# -CONFIG_ARM_CPUIDLE=y -# CONFIG_ARM_PSCI_CPUIDLE is not set -# end of ARM CPU Idle Drivers -# end of CPU Idle - -# -# CPU Frequency scaling -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y - -# -# CPU frequency scaling drivers -# -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -# CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is not set -CONFIG_ARM_SCPI_CPUFREQ=y -# end of CPU Frequency scaling -# end of CPU Power Management - -# -# Firmware Drivers -# -# CONFIG_ARM_SCMI_PROTOCOL is not set -CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y -# CONFIG_ARM_SDE_INTERFACE is not set -# CONFIG_GOOGLE_FIRMWARE is not set -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_PSCI_CHECKER is not set -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y -CONFIG_ARM_SMCCC_SOC_ID=y - -# -# Tegra firmware driver -# -# end of Tegra firmware driver -# end of Firmware Drivers - -# CONFIG_VIRTUALIZATION is not set -CONFIG_ARM64_CRYPTO=y -CONFIG_CRYPTO_SHA256_ARM64=m -CONFIG_CRYPTO_SHA512_ARM64=m -CONFIG_CRYPTO_SHA1_ARM64_CE=m -CONFIG_CRYPTO_SHA2_ARM64_CE=m -CONFIG_CRYPTO_SHA512_ARM64_CE=m -CONFIG_CRYPTO_SHA3_ARM64=m -CONFIG_CRYPTO_SM3_ARM64_CE=m -CONFIG_CRYPTO_SM4_ARM64_CE=m -CONFIG_CRYPTO_GHASH_ARM64_CE=m -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m -CONFIG_CRYPTO_AES_ARM64=m -CONFIG_CRYPTO_AES_ARM64_CE=m -CONFIG_CRYPTO_AES_ARM64_CE_CCM=m -CONFIG_CRYPTO_AES_ARM64_CE_BLK=m -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m -CONFIG_CRYPTO_CHACHA20_NEON=m -CONFIG_CRYPTO_POLY1305_NEON=m -CONFIG_CRYPTO_NHPOLY1305_NEON=m -CONFIG_CRYPTO_AES_ARM64_BS=m - -# -# General architecture-dependent options -# -CONFIG_CRASH_CORE=y -CONFIG_KEXEC_CORE=y -CONFIG_SET_FS=y -# CONFIG_KPROBES is not set -CONFIG_JUMP_LABEL=y -# CONFIG_STATIC_KEYS_SELFTEST is not set -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y -CONFIG_HAVE_NMI=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_KEEPINITRD=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SET_DIRECT_MAP=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ASM_MODVERSIONS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y -CONFIG_MMU_GATHER_TABLE_FREE=y -CONFIG_MMU_GATHER_RCU_TABLE_FREE=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_HAVE_ARCH_SECCOMP=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_SECCOMP=y -CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_STACKLEAK=y -CONFIG_HAVE_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR_STRONG=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MOVE_PMD=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_HAVE_ARCH_MMAP_RND_BITS=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 -CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_COMPAT_OLD_SIGACTION=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_VMAP_STACK=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_STRICT_MODULE_RWX=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -# CONFIG_LOCK_EVENT_COUNTS is not set -CONFIG_ARCH_HAS_RELR=y -CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -# end of GCOV-based kernel profiling - -CONFIG_HAVE_GCC_PLUGINS=y -CONFIG_GCC_PLUGINS=y -# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set -# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set -# end of General architecture-dependent options - -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -# CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -CONFIG_MODULE_COMPRESS_XZ=y -# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_TRIM_UNUSED_KSYMS is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_BLOCK=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BLK_CGROUP_RWSTAT=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=m -# CONFIG_BLK_DEV_ZONED is not set -# CONFIG_BLK_DEV_THROTTLING is not set -# CONFIG_BLK_CMDLINE_PARSER is not set -# CONFIG_BLK_WBT is not set -# CONFIG_BLK_CGROUP_IOLATENCY is not set -# CONFIG_BLK_CGROUP_IOCOST is not set -CONFIG_BLK_DEBUG_FS=y -# CONFIG_BLK_SED_OPAL is not set -# CONFIG_BLK_INLINE_ENCRYPTION is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -CONFIG_EFI_PARTITION=y -# end of Partition Types - -CONFIG_BLOCK_COMPAT=y -CONFIG_BLK_PM=y - -# -# IO Schedulers -# -CONFIG_MQ_IOSCHED_DEADLINE=m -CONFIG_MQ_IOSCHED_KYBER=m -CONFIG_IOSCHED_BFQ=m -CONFIG_BFQ_GROUP_IOSCHED=y -CONFIG_BFQ_CGROUP_DEBUG=y -# end of IO Schedulers - -CONFIG_ASN1=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQ=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_FREEZER=y - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_HAVE_ELF_PROT=y -CONFIG_ARCH_USE_GNU_PROPERTY=y -CONFIG_ELFCORE=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_BINFMT_SCRIPT=y -# CONFIG_BINFMT_MISC is not set -CONFIG_COREDUMP=y -# end of Executable file formats - -# -# Memory Management options -# -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM=y -CONFIG_NEED_MULTIPLE_NODES=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MEMORY_HOTPLUG is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -# CONFIG_PAGE_REPORTING is not set -CONFIG_MIGRATION=y -CONFIG_CONTIG_ALLOC=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_BOUNCE=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_MEMORY_FAILURE=y -# CONFIG_HWPOISON_INJECT is not set -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -# CONFIG_CLEANCACHE is not set -CONFIG_FRONTSWAP=y -CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_AREAS=7 -CONFIG_ZSWAP=y -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set -CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y -CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd" -CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y -# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set -# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set -CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" -# CONFIG_ZSWAP_DEFAULT_ON is not set -CONFIG_ZPOOL=y -CONFIG_ZBUD=y -# CONFIG_Z3FOLD is not set -CONFIG_ZSMALLOC=m -# CONFIG_ZSMALLOC_STAT is not set -CONFIG_GENERIC_EARLY_IOREMAP=y -# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set -# CONFIG_IDLE_PAGE_TRACKING is not set -CONFIG_ARCH_HAS_PTE_DEVMAP=y -CONFIG_FRAME_VECTOR=y -CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y -# CONFIG_PERCPU_STATS is not set -# CONFIG_GUP_BENCHMARK is not set -# CONFIG_READ_ONLY_THP_FOR_FS is not set -CONFIG_ARCH_HAS_PTE_SPECIAL=y -# end of Memory Management options - -CONFIG_NET=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_NET_INGRESS=y -CONFIG_SKB_EXTENSIONS=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set -CONFIG_UNIX=y -CONFIG_UNIX_SCM=y -# CONFIG_UNIX_DIAG is not set -# CONFIG_TLS is not set -CONFIG_XFRM=y -CONFIG_XFRM_ALGO=y -CONFIG_XFRM_USER=y -# CONFIG_XFRM_INTERFACE is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_AH=m -CONFIG_XFRM_ESP=y -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -# CONFIG_IP_FIB_TRIE_STATS is not set -CONFIG_IP_MULTIPLE_TABLES=y -# CONFIG_IP_ROUTE_MULTIPATH is not set -# CONFIG_IP_ROUTE_VERBOSE is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE_DEMUX is not set -CONFIG_NET_IP_TUNNEL=m -# CONFIG_IP_MROUTE is not set -CONFIG_SYN_COOKIES=y -# CONFIG_NET_IPVTI is not set -CONFIG_NET_UDP_TUNNEL=m -# CONFIG_NET_FOU is not set -# CONFIG_NET_FOU_IP_TUNNELS is not set -# CONFIG_INET_AH is not set -CONFIG_INET_ESP=y -# CONFIG_INET_ESP_OFFLOAD is not set -# CONFIG_INET_ESPINTCP is not set -# CONFIG_INET_IPCOMP is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_INET_UDP_DIAG is not set -# CONFIG_INET_RAW_DIAG is not set -CONFIG_INET_DIAG_DESTROY=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_IPV6_ROUTE_INFO=y -CONFIG_IPV6_OPTIMISTIC_DAD=y -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -# CONFIG_INET6_ESP_OFFLOAD is not set -# CONFIG_INET6_ESPINTCP is not set -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -# CONFIG_IPV6_ILA is not set -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -# CONFIG_IPV6_VTI is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -# CONFIG_IPV6_SUBTREES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_IPV6_SEG6_LWTUNNEL is not set -# CONFIG_IPV6_SEG6_HMAC is not set -# CONFIG_IPV6_RPL_LWTUNNEL is not set -# CONFIG_NETLABEL is not set -# CONFIG_MPTCP is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -CONFIG_NETFILTER=y -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=m - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_INGRESS=y -CONFIG_NETFILTER_NETLINK=y -CONFIG_NETFILTER_FAMILY_BRIDGE=y -CONFIG_NETFILTER_FAMILY_ARP=y -# CONFIG_NETFILTER_NETLINK_ACCT is not set -CONFIG_NETFILTER_NETLINK_QUEUE=y -CONFIG_NETFILTER_NETLINK_LOG=y -CONFIG_NETFILTER_NETLINK_OSF=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_LOG_COMMON=y -# CONFIG_NF_LOG_NETDEV is not set -CONFIG_NETFILTER_CONNCOUNT=m -CONFIG_NF_CONNTRACK_MARK=y -# CONFIG_NF_CONNTRACK_ZONES is not set -CONFIG_NF_CONNTRACK_PROCFS=y -CONFIG_NF_CONNTRACK_EVENTS=y -# CONFIG_NF_CONNTRACK_TIMEOUT is not set -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -# CONFIG_NF_CONNTRACK_LABELS is not set -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_GRE=y -CONFIG_NF_CT_PROTO_SCTP=y -CONFIG_NF_CT_PROTO_UDPLITE=y -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -# CONFIG_NF_CONNTRACK_SNMP is not set -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -# CONFIG_NF_CONNTRACK_SIP is not set -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set -CONFIG_NF_NAT=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_REDIRECT=y -CONFIG_NF_NAT_MASQUERADE=y -CONFIG_NETFILTER_SYNPROXY=m -CONFIG_NF_TABLES=m -CONFIG_NF_TABLES_INET=y -CONFIG_NF_TABLES_NETDEV=y -CONFIG_NFT_NUMGEN=m -CONFIG_NFT_CT=m -CONFIG_NFT_COUNTER=m -CONFIG_NFT_CONNLIMIT=m -CONFIG_NFT_LOG=m -CONFIG_NFT_LIMIT=m -CONFIG_NFT_MASQ=m -CONFIG_NFT_REDIR=m -CONFIG_NFT_NAT=m -CONFIG_NFT_TUNNEL=m -CONFIG_NFT_OBJREF=m -# CONFIG_NFT_QUEUE is not set -CONFIG_NFT_QUOTA=m -CONFIG_NFT_REJECT=m -CONFIG_NFT_REJECT_INET=m -CONFIG_NFT_COMPAT=m -CONFIG_NFT_HASH=m -# CONFIG_NFT_XFRM is not set -CONFIG_NFT_SOCKET=m -CONFIG_NFT_OSF=m -CONFIG_NFT_TPROXY=m -CONFIG_NFT_SYNPROXY=m -CONFIG_NF_DUP_NETDEV=m -CONFIG_NFT_DUP_NETDEV=m -CONFIG_NFT_FWD_NETDEV=m -# CONFIG_NF_FLOW_TABLE is not set -CONFIG_NETFILTER_XTABLES=y - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=y -CONFIG_NETFILTER_XT_CONNMARK=m -CONFIG_NETFILTER_XT_SET=m - -# -# Xtables targets -# -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -# CONFIG_NETFILTER_XT_TARGET_CT is not set -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -# CONFIG_NETFILTER_XT_TARGET_HL is not set -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_LOG=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_NAT=m -CONFIG_NETFILTER_XT_TARGET_NETMAP=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set -CONFIG_NETFILTER_XT_TARGET_REDIRECT=m -CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -CONFIG_NETFILTER_XT_TARGET_TPROXY=m -CONFIG_NETFILTER_XT_TARGET_TRACE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_DSCP is not set -CONFIG_NETFILTER_XT_MATCH_ECN=y -# CONFIG_NETFILTER_XT_MATCH_ESP is not set -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=y -# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -# CONFIG_NETFILTER_XT_MATCH_L2TP is not set -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_RECENT is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -CONFIG_NETFILTER_XT_MATCH_SOCKET=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=y -CONFIG_NETFILTER_XT_MATCH_STRING=y -# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set -CONFIG_NETFILTER_XT_MATCH_TIME=y -CONFIG_NETFILTER_XT_MATCH_U32=y -# end of Core Netfilter Configuration - -CONFIG_IP_SET=m -CONFIG_IP_SET_MAX=256 -CONFIG_IP_SET_BITMAP_IP=m -CONFIG_IP_SET_BITMAP_IPMAC=m -CONFIG_IP_SET_BITMAP_PORT=m -CONFIG_IP_SET_HASH_IP=m -CONFIG_IP_SET_HASH_IPMARK=m -CONFIG_IP_SET_HASH_IPPORT=m -CONFIG_IP_SET_HASH_IPPORTIP=m -CONFIG_IP_SET_HASH_IPPORTNET=m -CONFIG_IP_SET_HASH_IPMAC=m -CONFIG_IP_SET_HASH_MAC=m -CONFIG_IP_SET_HASH_NETPORTNET=m -CONFIG_IP_SET_HASH_NET=m -CONFIG_IP_SET_HASH_NETNET=m -CONFIG_IP_SET_HASH_NETPORT=m -CONFIG_IP_SET_HASH_NETIFACE=m -CONFIG_IP_SET_LIST_SET=m -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_SOCKET_IPV4=y -CONFIG_NF_TPROXY_IPV4=y -CONFIG_NF_TABLES_IPV4=y -CONFIG_NFT_REJECT_IPV4=m -# CONFIG_NFT_DUP_IPV4 is not set -# CONFIG_NFT_FIB_IPV4 is not set -# CONFIG_NF_TABLES_ARP is not set -# CONFIG_NF_DUP_IPV4 is not set -# CONFIG_NF_LOG_ARP is not set -CONFIG_NF_LOG_IPV4=y -CONFIG_NF_REJECT_IPV4=y -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_IP_NF_IPTABLES=y -CONFIG_IP_NF_MATCH_AH=y -CONFIG_IP_NF_MATCH_ECN=y -# CONFIG_IP_NF_MATCH_RPFILTER is not set -CONFIG_IP_NF_MATCH_TTL=y -CONFIG_IP_NF_FILTER=y -CONFIG_IP_NF_TARGET_REJECT=y -# CONFIG_IP_NF_TARGET_SYNPROXY is not set -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_IP_NF_MANGLE=y -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set -# CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_TTL is not set -CONFIG_IP_NF_RAW=y -CONFIG_IP_NF_SECURITY=y -CONFIG_IP_NF_ARPTABLES=y -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m -# end of IP: Netfilter Configuration - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_SOCKET_IPV6=m -CONFIG_NF_TPROXY_IPV6=m -CONFIG_NF_TABLES_IPV6=y -CONFIG_NFT_REJECT_IPV6=m -# CONFIG_NFT_DUP_IPV6 is not set -# CONFIG_NFT_FIB_IPV6 is not set -# CONFIG_NF_DUP_IPV6 is not set -CONFIG_NF_REJECT_IPV6=m -CONFIG_NF_LOG_IPV6=m -CONFIG_IP6_NF_IPTABLES=m -# CONFIG_IP6_NF_MATCH_AH is not set -# CONFIG_IP6_NF_MATCH_EUI64 is not set -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_HL is not set -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -# CONFIG_IP6_NF_MATCH_MH is not set -# CONFIG_IP6_NF_MATCH_RPFILTER is not set -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_MATCH_SRH is not set -# CONFIG_IP6_NF_TARGET_HL is not set -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -# CONFIG_IP6_NF_TARGET_SYNPROXY is not set -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_IP6_NF_SECURITY is not set -# CONFIG_IP6_NF_NAT is not set -# end of IPv6: Netfilter Configuration - -CONFIG_NF_DEFRAG_IPV6=m -# CONFIG_NF_TABLES_BRIDGE is not set -# CONFIG_NF_CONNTRACK_BRIDGE is not set -# CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_L2TP is not set -CONFIG_STP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -CONFIG_BRIDGE_VLAN_FILTERING=y -# CONFIG_BRIDGE_MRP is not set -CONFIG_HAVE_NET_DSA=y -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -# CONFIG_VLAN_8021Q_GVRP is not set -# CONFIG_VLAN_8021Q_MVRP is not set -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_PHONET is not set -# CONFIG_6LOWPAN is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -# CONFIG_NET_SCH_CBQ is not set -CONFIG_NET_SCH_HTB=m -# CONFIG_NET_SCH_HFSC is not set -# CONFIG_NET_SCH_PRIO is not set -# CONFIG_NET_SCH_MULTIQ is not set -# CONFIG_NET_SCH_RED is not set -# CONFIG_NET_SCH_SFB is not set -# CONFIG_NET_SCH_SFQ is not set -# CONFIG_NET_SCH_TEQL is not set -# CONFIG_NET_SCH_TBF is not set -# CONFIG_NET_SCH_CBS is not set -# CONFIG_NET_SCH_ETF is not set -# CONFIG_NET_SCH_TAPRIO is not set -# CONFIG_NET_SCH_GRED is not set -# CONFIG_NET_SCH_DSMARK is not set -# CONFIG_NET_SCH_NETEM is not set -# CONFIG_NET_SCH_DRR is not set -# CONFIG_NET_SCH_MQPRIO is not set -# CONFIG_NET_SCH_SKBPRIO is not set -# CONFIG_NET_SCH_CHOKE is not set -# CONFIG_NET_SCH_QFQ is not set -# CONFIG_NET_SCH_CODEL is not set -CONFIG_NET_SCH_FQ_CODEL=m -# CONFIG_NET_SCH_CAKE is not set -# CONFIG_NET_SCH_FQ is not set -# CONFIG_NET_SCH_HHF is not set -# CONFIG_NET_SCH_PIE is not set -# CONFIG_NET_SCH_PLUG is not set -# CONFIG_NET_SCH_ETS is not set -# CONFIG_NET_SCH_DEFAULT is not set - -# -# Classification -# -CONFIG_NET_CLS=y -# CONFIG_NET_CLS_BASIC is not set -# CONFIG_NET_CLS_TCINDEX is not set -# CONFIG_NET_CLS_ROUTE4 is not set -# CONFIG_NET_CLS_FW is not set -CONFIG_NET_CLS_U32=m -# CONFIG_CLS_U32_PERF is not set -# CONFIG_CLS_U32_MARK is not set -# CONFIG_NET_CLS_RSVP is not set -# CONFIG_NET_CLS_RSVP6 is not set -# CONFIG_NET_CLS_FLOW is not set -# CONFIG_NET_CLS_CGROUP is not set -# CONFIG_NET_CLS_BPF is not set -# CONFIG_NET_CLS_FLOWER is not set -# CONFIG_NET_CLS_MATCHALL is not set -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=m -# CONFIG_BATMAN_ADV is not set -# CONFIG_OPENVSWITCH is not set -# CONFIG_VSOCKETS is not set -# CONFIG_NETLINK_DIAG is not set -# CONFIG_MPLS is not set -# CONFIG_NET_NSH is not set -# CONFIG_HSR is not set -# CONFIG_NET_SWITCHDEV is not set -# CONFIG_NET_L3_MASTER_DEV is not set -# CONFIG_QRTR is not set -# CONFIG_NET_NCSI is not set -CONFIG_RPS=y -CONFIG_RFS_ACCEL=y -CONFIG_XPS=y -# CONFIG_CGROUP_NET_PRIO is not set -# CONFIG_CGROUP_NET_CLASSID is not set -CONFIG_NET_RX_BUSY_POLL=y -CONFIG_BQL=y -CONFIG_BPF_JIT=y -CONFIG_NET_FLOW_LIMIT=y - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# end of Network testing -# end of Networking options - -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -CONFIG_BT=m -CONFIG_BT_BREDR=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HS=y -CONFIG_BT_LE=y -CONFIG_BT_LEDS=y -# CONFIG_BT_MSFTEXT is not set -# CONFIG_BT_DEBUGFS is not set -# CONFIG_BT_SELFTEST is not set -# CONFIG_BT_FEATURE_DEBUG is not set - -# -# Bluetooth device drivers -# -CONFIG_BT_INTEL=m -CONFIG_BT_BCM=m -CONFIG_BT_RTL=m -CONFIG_BT_HCIBTUSB=m -# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set -CONFIG_BT_HCIBTUSB_BCM=y -# CONFIG_BT_HCIBTUSB_MTK is not set -CONFIG_BT_HCIBTUSB_RTL=y -# CONFIG_BT_HCIBTSDIO is not set -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_SERDEV=y -CONFIG_BT_HCIUART_H4=y -# CONFIG_BT_HCIUART_NOKIA is not set -# CONFIG_BT_HCIUART_BCSP is not set -# CONFIG_BT_HCIUART_ATH3K is not set -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIUART_3WIRE=y -# CONFIG_BT_HCIUART_INTEL is not set -CONFIG_BT_HCIUART_BCM=y -CONFIG_BT_HCIUART_RTL=y -# CONFIG_BT_HCIUART_QCA is not set -# CONFIG_BT_HCIUART_AG6XX is not set -# CONFIG_BT_HCIUART_MRVL is not set -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBFUSB is not set -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -# CONFIG_BT_ATH3K is not set -# CONFIG_BT_MTKSDIO is not set -# CONFIG_BT_MTKUART is not set -# end of Bluetooth device drivers - -# CONFIG_AF_RXRPC is not set -# CONFIG_AF_KCM is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y -CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_CFG80211_CRDA_SUPPORT=y -# CONFIG_CFG80211_WEXT is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -# CONFIG_WIMAX is not set -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_RFKILL_GPIO=m -# CONFIG_NET_9P is not set -# CONFIG_CAIF is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_NFC is not set -# CONFIG_PSAMPLE is not set -# CONFIG_NET_IFE is not set -# CONFIG_LWTUNNEL is not set -CONFIG_DST_CACHE=y -CONFIG_GRO_CELLS=y -# CONFIG_FAILOVER is not set -CONFIG_ETHTOOL_NETLINK=y -CONFIG_HAVE_EBPF_JIT=y - -# -# Device Drivers -# -CONFIG_ARM_AMBA=y -CONFIG_HAVE_PCI=y -# CONFIG_PCI is not set -# CONFIG_PCCARD is not set - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y - -# -# Firmware loader -# -CONFIG_FW_LOADER=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_FW_LOADER_USER_HELPER is not set -# CONFIG_FW_LOADER_COMPRESS is not set -CONFIG_FW_CACHE=y -# end of Firmware loader - -CONFIG_WANT_DEV_COREDUMP=y -CONFIG_ALLOW_DEV_COREDUMP=y -CONFIG_DEV_COREDUMP=y -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set -# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_SOC_BUS=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=m -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_IRQ=y -CONFIG_DMA_SHARED_BUFFER=y -# CONFIG_DMA_FENCE_TRACE is not set -CONFIG_GENERIC_ARCH_TOPOLOGY=y -# end of Generic Driver Options - -# -# Bus devices -# -# CONFIG_BRCMSTB_GISB_ARB is not set -CONFIG_SIMPLE_PM_BUS=y -CONFIG_SUN50I_DE2_BUS=y -CONFIG_SUNXI_RSB=y -# CONFIG_VEXPRESS_CONFIG is not set -# CONFIG_MHI_BUS is not set -# end of Bus devices - -# CONFIG_CONNECTOR is not set -# CONFIG_GNSS is not set -# CONFIG_MTD is not set -CONFIG_DTC=y -CONFIG_OF=y -# CONFIG_OF_UNITTEST is not set -CONFIG_OF_FLATTREE=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_KOBJ=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_IRQ=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OF_RESOLVE=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_NUMA=y -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_NULL_BLK is not set -CONFIG_ZRAM=m -# CONFIG_ZRAM_WRITEBACK is not set -# CONFIG_ZRAM_MEMORY_TRACKING is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_DRBD is not set -CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_XEN_BLKDEV_FRONTEND is not set -# CONFIG_BLK_DEV_RBD is not set - -# -# NVME Support -# -# CONFIG_NVME_FC is not set -# CONFIG_NVME_TARGET is not set -# end of NVME Support - -# -# Misc devices -# -# CONFIG_AD525X_DPOT is not set -# CONFIG_DUMMY_IRQ is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_HMC6352 is not set -# CONFIG_DS1682 is not set -CONFIG_SRAM=y -# CONFIG_XILINX_SDFEC is not set -# CONFIG_PVPANIC is not set -# CONFIG_HISI_HIKEY_USB is not set -# CONFIG_MODEM_POWER is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_EEPROM_IDT_89HPESX is not set -# CONFIG_EEPROM_EE1004 is not set -# end of EEPROM support - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - -# CONFIG_SENSORS_LIS3_I2C is not set - -# -# Altera FPGA firmware download module (requires I2C) -# -# CONFIG_ALTERA_STAPL is not set -# CONFIG_ECHO is not set -# CONFIG_MISC_RTSX_USB is not set -# CONFIG_UACCE is not set -# end of Misc devices - -# -# SCSI device support -# -CONFIG_SCSI_MOD=m -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=m -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_PROC_FS is not set - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=m -# CONFIG_CHR_DEV_ST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -CONFIG_SCSI_SAS_ATTRS=m -CONFIG_SCSI_SAS_LIBSAS=m -CONFIG_SCSI_SAS_HOST_SMP=y -# CONFIG_SCSI_SRP_ATTRS is not set -# end of SCSI Transports - -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_ISCSI_BOOT_SYSFS is not set -CONFIG_SCSI_UFSHCD=m -CONFIG_SCSI_UFSHCD_PLATFORM=m -# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set -# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set -# CONFIG_SCSI_UFS_BSG is not set -# CONFIG_XEN_SCSI_FRONTEND is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# end of SCSI device support - -CONFIG_HAVE_PATA_PLATFORM=y -# CONFIG_ATA is not set -CONFIG_MD=y -# CONFIG_BLK_DEV_MD is not set -# CONFIG_BCACHE is not set -CONFIG_BLK_DEV_DM_BUILTIN=y -CONFIG_BLK_DEV_DM=y -# CONFIG_DM_DEBUG is not set -# CONFIG_DM_UNSTRIPED is not set -CONFIG_DM_CRYPT=y -# CONFIG_DM_SNAPSHOT is not set -# CONFIG_DM_THIN_PROVISIONING is not set -# CONFIG_DM_CACHE is not set -# CONFIG_DM_WRITECACHE is not set -# CONFIG_DM_EBS is not set -# CONFIG_DM_ERA is not set -# CONFIG_DM_CLONE is not set -# CONFIG_DM_MIRROR is not set -# CONFIG_DM_RAID is not set -# CONFIG_DM_ZERO is not set -# CONFIG_DM_MULTIPATH is not set -# CONFIG_DM_DELAY is not set -# CONFIG_DM_DUST is not set -# CONFIG_DM_INIT is not set -# CONFIG_DM_UEVENT is not set -# CONFIG_DM_FLAKEY is not set -# CONFIG_DM_VERITY is not set -# CONFIG_DM_SWITCH is not set -# CONFIG_DM_LOG_WRITES is not set -# CONFIG_DM_INTEGRITY is not set -CONFIG_TARGET_CORE=m -# CONFIG_TCM_IBLOCK is not set -# CONFIG_TCM_FILEIO is not set -# CONFIG_TCM_PSCSI is not set -# CONFIG_LOOPBACK_TARGET is not set -# CONFIG_ISCSI_TARGET is not set -CONFIG_NETDEVICES=y -CONFIG_MII=m -CONFIG_NET_CORE=y -# CONFIG_BONDING is not set -# CONFIG_DUMMY is not set -CONFIG_WIREGUARD=m -# CONFIG_WIREGUARD_DEBUG is not set -# CONFIG_EQUALIZER is not set -# CONFIG_NET_TEAM is not set -# CONFIG_MACVLAN is not set -# CONFIG_IPVLAN is not set -# CONFIG_VXLAN is not set -# CONFIG_GENEVE is not set -# CONFIG_BAREUDP is not set -# CONFIG_GTP is not set -# CONFIG_MACSEC is not set -# CONFIG_NETCONSOLE is not set -CONFIG_TUN=m -# CONFIG_TUN_VNET_CROSS_LE is not set -CONFIG_VETH=m -# CONFIG_NLMON is not set - -# -# Distributed Switch Architecture drivers -# -# end of Distributed Switch Architecture drivers - -CONFIG_ETHERNET=y -# CONFIG_NET_VENDOR_ALACRITECH is not set -CONFIG_NET_VENDOR_ALLWINNER=y -# CONFIG_SUN4I_EMAC is not set -# CONFIG_ALTERA_TSE is not set -# CONFIG_NET_VENDOR_AMAZON is not set -# CONFIG_NET_VENDOR_AMD is not set -# CONFIG_NET_VENDOR_AQUANTIA is not set -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_VENDOR_AURORA is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CADENCE is not set -# CONFIG_NET_VENDOR_CAVIUM is not set -# CONFIG_NET_VENDOR_CORTINA is not set -# CONFIG_DNET is not set -# CONFIG_NET_VENDOR_EZCHIP is not set -# CONFIG_NET_VENDOR_GOOGLE is not set -# CONFIG_NET_VENDOR_HISILICON is not set -# CONFIG_NET_VENDOR_HUAWEI is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MELLANOX is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_MICROSEMI is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_NETRONOME is not set -# CONFIG_NET_VENDOR_NI is not set -# CONFIG_ETHOC is not set -# CONFIG_NET_VENDOR_PENSANDO is not set -# CONFIG_NET_VENDOR_QUALCOMM is not set -# CONFIG_NET_VENDOR_RENESAS is not set -# CONFIG_NET_VENDOR_ROCKER is not set -# CONFIG_NET_VENDOR_SAMSUNG is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SOLARFLARE is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_SOCIONEXT is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_SYNOPSYS is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_NET_VENDOR_XILINX is not set -CONFIG_PHYLIB=m -CONFIG_SWPHY=y -# CONFIG_LED_TRIGGER_PHY is not set -CONFIG_FIXED_PHY=m - -# -# MII PHY device drivers -# -# CONFIG_AMD_PHY is not set -# CONFIG_ADIN_PHY is not set -# CONFIG_AQUANTIA_PHY is not set -# CONFIG_AX88796B_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_BCM54140_PHY is not set -# CONFIG_BCM7XXX_PHY is not set -# CONFIG_BCM84881_PHY is not set -# CONFIG_BCM87XX_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_CORTINA_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_INTEL_XWAY_PHY is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_MARVELL_PHY is not set -# CONFIG_MARVELL_10G_PHY is not set -# CONFIG_MICREL_PHY is not set -CONFIG_MICROCHIP_PHY=m -# CONFIG_MICROCHIP_T1_PHY is not set -# CONFIG_MICROSEMI_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_NXP_TJA11XX_PHY is not set -# CONFIG_AT803X_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_REALTEK_PHY=m -# CONFIG_RENESAS_PHY is not set -# CONFIG_ROCKCHIP_PHY is not set -CONFIG_SMSC_PHY=m -# CONFIG_STE10XP is not set -# CONFIG_TERANETICS_PHY is not set -# CONFIG_DP83822_PHY is not set -# CONFIG_DP83TC811_PHY is not set -# CONFIG_DP83848_PHY is not set -# CONFIG_DP83867_PHY is not set -# CONFIG_DP83869_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_XILINX_GMII2RGMII is not set -CONFIG_MDIO_DEVICE=m -CONFIG_MDIO_BUS=m -CONFIG_OF_MDIO=m -CONFIG_MDIO_DEVRES=m -# CONFIG_MDIO_SUN4I is not set -CONFIG_MDIO_BITBANG=m -# CONFIG_MDIO_BCM_UNIMAC is not set -# CONFIG_MDIO_GPIO is not set -# CONFIG_MDIO_HISI_FEMAC is not set -# CONFIG_MDIO_MVUSB is not set -# CONFIG_MDIO_MSCC_MIIM is not set -# CONFIG_MDIO_OCTEON is not set -# CONFIG_MDIO_IPQ4019 is not set -# CONFIG_MDIO_IPQ8064 is not set - -# -# MDIO Multiplexers -# -CONFIG_MDIO_BUS_MUX=m -# CONFIG_MDIO_BUS_MUX_GPIO is not set -# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set -CONFIG_MDIO_BUS_MUX_MMIOREG=m - -# -# PCS device drivers -# -# CONFIG_PCS_XPCS is not set -# end of PCS device drivers - -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Host-side USB support is needed for USB Network Adapter support -# -CONFIG_USB_NET_DRIVERS=m -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_RTL8152=m -CONFIG_USB_LAN78XX=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_AX88179_178A=m -CONFIG_USB_NET_CDCETHER=m -# CONFIG_USB_NET_CDC_EEM is not set -# CONFIG_USB_NET_CDC_NCM is not set -# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set -# CONFIG_USB_NET_CDC_MBIM is not set -# CONFIG_USB_NET_DM9601 is not set -# CONFIG_USB_NET_SR9700 is not set -CONFIG_USB_NET_SR9800=m -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=m -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET_ENABLE=m -CONFIG_USB_NET_CDC_SUBSET=m -# CONFIG_USB_ALI_M5632 is not set -# CONFIG_USB_AN2720 is not set -CONFIG_USB_BELKIN=y -# CONFIG_USB_ARMLINUX is not set -# CONFIG_USB_EPSON2888 is not set -# CONFIG_USB_KC2190 is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_NET_CX82310_ETH is not set -# CONFIG_USB_NET_KALMIA is not set -CONFIG_USB_NET_QMI_WWAN=m -# CONFIG_USB_HSO is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_USB_IPHETH is not set -# CONFIG_USB_SIERRA_NET is not set -# CONFIG_USB_VL600 is not set -# CONFIG_USB_NET_CH9200 is not set -# CONFIG_USB_NET_AQC111 is not set -CONFIG_WLAN=y -# CONFIG_WLAN_VENDOR_ADMTEK is not set -CONFIG_ATH_COMMON=m -CONFIG_WLAN_VENDOR_ATH=y -# CONFIG_ATH_DEBUG is not set -# CONFIG_ATH9K is not set -# CONFIG_ATH9K_HTC is not set -# CONFIG_CARL9170 is not set -# CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set -CONFIG_ATH10K=m -CONFIG_ATH10K_CE=y -# CONFIG_ATH10K_SDIO is not set -# CONFIG_ATH10K_USB is not set -# CONFIG_ATH10K_DEBUG is not set -# CONFIG_ATH10K_DEBUGFS is not set -# CONFIG_WCN36XX is not set -CONFIG_WLAN_VENDOR_ATMEL=y -# CONFIG_AT76C50X_USB is not set -CONFIG_WLAN_VENDOR_BROADCOM=y -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_BRCMUTIL=m -# CONFIG_BRCMSMAC is not set -CONFIG_BRCMFMAC=m -CONFIG_BRCMFMAC_PROTO_BCDC=y -CONFIG_BRCMFMAC_SDIO=y -# CONFIG_BRCMFMAC_USB is not set -# CONFIG_BRCM_TRACING is not set -# CONFIG_BRCMDBG is not set -# CONFIG_WLAN_VENDOR_CISCO is not set -# CONFIG_WLAN_VENDOR_INTEL is not set -# CONFIG_WLAN_VENDOR_INTERSIL is not set -# CONFIG_WLAN_VENDOR_MARVELL is not set -# CONFIG_WLAN_VENDOR_MEDIATEK is not set -CONFIG_WLAN_VENDOR_MICROCHIP=y -# CONFIG_WILC1000_SDIO is not set -CONFIG_WLAN_VENDOR_RALINK=y -CONFIG_RT2X00=m -# CONFIG_RT2500USB is not set -# CONFIG_RT73USB is not set -CONFIG_RT2800USB=m -CONFIG_RT2800USB_RT33XX=y -CONFIG_RT2800USB_RT35XX=y -CONFIG_RT2800USB_RT3573=y -CONFIG_RT2800USB_RT53XX=y -CONFIG_RT2800USB_RT55XX=y -# CONFIG_RT2800USB_UNKNOWN is not set -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WLAN_VENDOR_REALTEK=y -# CONFIG_RTL8187 is not set -CONFIG_RTL_CARDS=m -# CONFIG_RTL8192CU is not set -# CONFIG_RTL8XXXU is not set -# CONFIG_RTW88 is not set -# CONFIG_WLAN_VENDOR_RSI is not set -# CONFIG_WLAN_VENDOR_ST is not set -# CONFIG_WLAN_VENDOR_TI is not set -# CONFIG_WLAN_VENDOR_ZYDAS is not set -# CONFIG_WLAN_VENDOR_QUANTENNA is not set -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_VIRT_WIFI is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# -# CONFIG_WAN is not set -# CONFIG_XEN_NETDEV_FRONTEND is not set -# CONFIG_NETDEVSIM is not set -# CONFIG_NET_FAILOVER is not set -# CONFIG_ISDN is not set -# CONFIG_NVM is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_LEDS=m -CONFIG_INPUT_FF_MEMLESS=m -CONFIG_INPUT_POLLDEV=m -# CONFIG_INPUT_SPARSEKMAP is not set -CONFIG_INPUT_MATRIXKMAP=m - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=m -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ADC=m -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_KEYBOARD_QT1050 is not set -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -# CONFIG_KEYBOARD_DLINK_DIR685 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=m -# CONFIG_KEYBOARD_GPIO_POLLED is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_TCA8418 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_LM8333 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_SAMSUNG is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_SUN4I_LRADC=m -# CONFIG_KEYBOARD_OMAP4 is not set -# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_CAP11XX is not set -# CONFIG_KEYBOARD_BCM is not set -CONFIG_INPUT_MOUSE=y -# CONFIG_MOUSE_PS2 is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -# CONFIG_MOUSE_ELAN_I2C is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_MOUSE_SYNAPTICS_USB is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_PROPERTIES=y -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_ADC is not set -# CONFIG_TOUCHSCREEN_AR1021_I2C is not set -CONFIG_TOUCHSCREEN_ATMEL_MXT=m -# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set -# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_BU21029 is not set -# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set -# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_EGALAX is not set -# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set -# CONFIG_TOUCHSCREEN_EXC3000 is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -CONFIG_TOUCHSCREEN_GOODIX=m -# CONFIG_TOUCHSCREEN_HIDEEP is not set -# CONFIG_TOUCHSCREEN_ILI210X is not set -# CONFIG_TOUCHSCREEN_S6SY761 is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_EKTF2127 is not set -# CONFIG_TOUCHSCREEN_ELAN is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_WACOM_I2C is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MMS114 is not set -# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -CONFIG_TOUCHSCREEN_EDT_FT5X06=m -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_PIXCIR is not set -# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC_SERIO is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_RM_TS is not set -# CONFIG_TOUCHSCREEN_SILEAD is not set -# CONFIG_TOUCHSCREEN_SIS_I2C is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_STMFTS is not set -# CONFIG_TOUCHSCREEN_SUN4I is not set -# CONFIG_TOUCHSCREEN_SUR40 is not set -# CONFIG_TOUCHSCREEN_SX8654 is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -# CONFIG_TOUCHSCREEN_ZET6223 is not set -# CONFIG_TOUCHSCREEN_ZFORCE is not set -# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set -# CONFIG_TOUCHSCREEN_IQS5XX is not set -# CONFIG_TOUCHSCREEN_ZINITIX is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_ATMEL_CAPTOUCH is not set -# CONFIG_INPUT_BMA150 is not set -# CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GPIO_BEEPER is not set -# CONFIG_INPUT_GPIO_DECODER is not set -CONFIG_INPUT_GPIO_VIBRA=m -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_KXTJ9 is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -# CONFIG_INPUT_REGULATOR_HAPTIC is not set -CONFIG_INPUT_AXP20X_PEK=m -CONFIG_INPUT_UINPUT=m -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_PWM_BEEPER is not set -# CONFIG_INPUT_PWM_VIBRA is not set -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_IMS_PCU is not set -# CONFIG_INPUT_IQS269A is not set -# CONFIG_INPUT_CMA3000 is not set -# CONFIG_INPUT_XEN_KBDDEV_FRONTEND is not set -# CONFIG_INPUT_DRV260X_HAPTICS is not set -# CONFIG_INPUT_DRV2665_HAPTICS is not set -# CONFIG_INPUT_DRV2667_HAPTICS is not set -# CONFIG_RMI4_CORE is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_AMBAKMI is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_SERIO_ARC_PS2 is not set -# CONFIG_SERIO_APBPS2 is not set -# CONFIG_SERIO_SUN4I_PS2 is not set -# CONFIG_SERIO_GPIO_PS2 is not set -# CONFIG_USERIO is not set -# CONFIG_GAMEPORT is not set -# end of Hardware I/O ports -# end of Input device support - -# -# Character devices -# -CONFIG_TTY=y -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_LDISC_AUTOLOAD=y - -# -# Serial drivers -# -CONFIG_SERIAL_EARLYCON=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -# CONFIG_SERIAL_8250_FINTEK is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_DMA=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_ASPEED_VUART is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -# CONFIG_SERIAL_8250_RSA is not set -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_DW=y -# CONFIG_SERIAL_8250_RT288X is not set -CONFIG_SERIAL_OF_PLATFORM=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_AMBA_PL010 is not set -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set -# CONFIG_SERIAL_UARTLITE is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_SIFIVE is not set -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_SC16IS7XX is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -CONFIG_SERIAL_XILINX_PS_UART=y -CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_SERIAL_FSL_LINFLEXUART is not set -# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set -# CONFIG_SERIAL_SPRD is not set -# end of Serial drivers - -CONFIG_SERIAL_MCTRL_GPIO=y -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_NULL_TTY is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_HVC_XEN is not set -# CONFIG_HVC_DCC is not set -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -# CONFIG_VIRTIO_CONSOLE is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_IPMB_DEVICE_INTERFACE is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_HW_RANDOM_BA431 is not set -CONFIG_HW_RANDOM_OPTEE=m -# CONFIG_HW_RANDOM_CCTRNG is not set -# CONFIG_HW_RANDOM_XIPHERA is not set -CONFIG_DEVMEM=y -# CONFIG_RAW_DRIVER is not set -CONFIG_TCG_TPM=m -CONFIG_HW_RANDOM_TPM=y -# CONFIG_TCG_TIS is not set -# CONFIG_TCG_TIS_I2C_ATMEL is not set -CONFIG_TCG_TIS_I2C_INFINEON=m -# CONFIG_TCG_TIS_I2C_NUVOTON is not set -# CONFIG_TCG_XEN is not set -# CONFIG_TCG_VTPM_PROXY is not set -# CONFIG_TCG_FTPM_TEE is not set -# CONFIG_TCG_TIS_ST33ZP24_I2C is not set -# CONFIG_XILLYBUS is not set -# end of Character devices - -# CONFIG_RANDOM_TRUST_CPU is not set -# CONFIG_RANDOM_TRUST_BOOTLOADER is not set - -# -# I2C support -# -CONFIG_I2C=m -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_MUX=m - -# -# Multiplexer I2C Chip support -# -# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set -# CONFIG_I2C_MUX_GPIO is not set -# CONFIG_I2C_MUX_GPMUX is not set -# CONFIG_I2C_MUX_LTC4306 is not set -# CONFIG_I2C_MUX_PCA9541 is not set -CONFIG_I2C_MUX_PCA954x=m -# CONFIG_I2C_MUX_PINCTRL is not set -# CONFIG_I2C_MUX_REG is not set -# CONFIG_I2C_DEMUX_PINCTRL is not set -# CONFIG_I2C_MUX_MLXCPLD is not set -# end of Multiplexer I2C Chip support - -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=m - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_CADENCE is not set -# CONFIG_I2C_CBUS_GPIO is not set -CONFIG_I2C_DESIGNWARE_CORE=m -# CONFIG_I2C_DESIGNWARE_SLAVE is not set -CONFIG_I2C_DESIGNWARE_PLATFORM=m -# CONFIG_I2C_EMEV2 is not set -CONFIG_I2C_GPIO=m -# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set -CONFIG_I2C_MV64XXX=m -# CONFIG_I2C_NOMADIK is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PCA_PLATFORM is not set -CONFIG_I2C_RK3X=m -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_ROBOTFUZZ_OSIF is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# end of I2C Hardware Bus support - -# CONFIG_I2C_STUB is not set -CONFIG_I2C_SLAVE=y -# CONFIG_I2C_SLAVE_EEPROM is not set -# CONFIG_I2C_SLAVE_TESTUNIT is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# end of I2C support - -# CONFIG_I3C is not set -# CONFIG_SPI is not set -CONFIG_SPMI=y -# CONFIG_HSI is not set -# CONFIG_PPS is not set - -# -# PTP clock support -# -# CONFIG_PTP_1588_CLOCK is not set - -# -# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. -# -# end of PTP clock support - -CONFIG_PINCTRL=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_PINMUX=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_PINCONF=y -CONFIG_GENERIC_PINCONF=y -# CONFIG_DEBUG_PINCTRL is not set -# CONFIG_PINCTRL_AXP209 is not set -# CONFIG_PINCTRL_MCP23S08 is not set -CONFIG_PINCTRL_SINGLE=y -# CONFIG_PINCTRL_STMFX is not set -# CONFIG_PINCTRL_OCELOT is not set - -# -# Renesas pinctrl drivers -# -# end of Renesas pinctrl drivers - -CONFIG_PINCTRL_SUNXI=y -# CONFIG_PINCTRL_SUN4I_A10 is not set -# CONFIG_PINCTRL_SUN5I is not set -# CONFIG_PINCTRL_SUN6I_A31 is not set -# CONFIG_PINCTRL_SUN6I_A31_R is not set -# CONFIG_PINCTRL_SUN8I_A23 is not set -# CONFIG_PINCTRL_SUN8I_A33 is not set -# CONFIG_PINCTRL_SUN8I_A83T is not set -# CONFIG_PINCTRL_SUN8I_A83T_R is not set -# CONFIG_PINCTRL_SUN8I_A23_R is not set -# CONFIG_PINCTRL_SUN8I_H3 is not set -CONFIG_PINCTRL_SUN8I_H3_R=y -# CONFIG_PINCTRL_SUN8I_V3S is not set -# CONFIG_PINCTRL_SUN9I_A80 is not set -# CONFIG_PINCTRL_SUN9I_A80_R is not set -CONFIG_PINCTRL_SUN50I_A64=y -CONFIG_PINCTRL_SUN50I_A64_R=y -CONFIG_PINCTRL_SUN50I_A100=y -CONFIG_PINCTRL_SUN50I_A100_R=y -CONFIG_PINCTRL_SUN50I_H5=y -CONFIG_PINCTRL_SUN50I_H6=y -CONFIG_PINCTRL_SUN50I_H6_R=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_FASTPATH_LIMIT=512 -CONFIG_OF_GPIO=y -CONFIG_GPIOLIB_IRQCHIP=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_CDEV_V1=y -CONFIG_GPIO_GENERIC=m - -# -# Memory mapped GPIO drivers -# -# CONFIG_GPIO_74XX_MMIO is not set -# CONFIG_GPIO_ALTERA is not set -# CONFIG_GPIO_CADENCE is not set -# CONFIG_GPIO_DWAPB is not set -# CONFIG_GPIO_FTGPIO010 is not set -CONFIG_GPIO_GENERIC_PLATFORM=m -# CONFIG_GPIO_GRGPIO is not set -# CONFIG_GPIO_HLWD is not set -# CONFIG_GPIO_LOGICVC is not set -CONFIG_GPIO_MB86S7X=m -CONFIG_GPIO_PL061=m -# CONFIG_GPIO_SAMA5D2_PIOBU is not set -# CONFIG_GPIO_SIFIVE is not set -# CONFIG_GPIO_SYSCON is not set -CONFIG_GPIO_XGENE=y -# CONFIG_GPIO_XILINX is not set -# CONFIG_GPIO_AMD_FCH is not set -# end of Memory mapped GPIO drivers - -# -# I2C GPIO expanders -# -# CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_ADNP is not set -# CONFIG_GPIO_GW_PLD is not set -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=m -CONFIG_GPIO_PCA953X_IRQ=y -# CONFIG_GPIO_PCA9570 is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_TPIC2810 is not set -# end of I2C GPIO expanders - -# -# MFD GPIO expanders -# -# end of MFD GPIO expanders - -# -# USB GPIO expanders -# -# end of USB GPIO expanders - -# CONFIG_GPIO_AGGREGATOR is not set -# CONFIG_GPIO_MOCKUP is not set -# CONFIG_W1 is not set -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_BRCMSTB=y -# CONFIG_POWER_RESET_GPIO is not set -# CONFIG_POWER_RESET_GPIO_RESTART is not set -# CONFIG_POWER_RESET_LTC2952 is not set -# CONFIG_POWER_RESET_RESTART is not set -CONFIG_POWER_RESET_XGENE=y -CONFIG_POWER_RESET_SYSCON=y -# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set -CONFIG_REBOOT_MODE=y -CONFIG_SYSCON_REBOOT_MODE=y -# CONFIG_NVMEM_REBOOT_MODE is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -CONFIG_POWER_SUPPLY_HWMON=y -# CONFIG_PDA_POWER is not set -# CONFIG_GENERIC_ADC_BATTERY is not set -# CONFIG_TEST_POWER is not set -# CONFIG_CHARGER_ADP5061 is not set -# CONFIG_BATTERY_CW2015 is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_SBS is not set -# CONFIG_CHARGER_SBS is not set -# CONFIG_MANAGER_SBS is not set -CONFIG_BATTERY_BQ27XXX=m -CONFIG_BATTERY_BQ27XXX_I2C=m -# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set -CONFIG_CHARGER_AXP20X=m -CONFIG_BATTERY_AXP20X=m -CONFIG_AXP20X_POWER=m -CONFIG_AXP288_FUEL_GAUGE=m -# CONFIG_BATTERY_MAX17040 is not set -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_CHARGER_ISP1704 is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_MANAGER is not set -# CONFIG_CHARGER_LT3651 is not set -# CONFIG_CHARGER_DETECTOR_MAX14656 is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set -# CONFIG_CHARGER_BQ2515X is not set -# CONFIG_CHARGER_BQ25890 is not set -# CONFIG_CHARGER_BQ25980 is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_BATTERY_GAUGE_LTC2941 is not set -# CONFIG_CHARGER_RT9455 is not set -# CONFIG_CHARGER_UCS1002 is not set -# CONFIG_CHARGER_BD99954 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM1177 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7410 is not set -# CONFIG_SENSORS_ADT7411 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_AS370 is not set -# CONFIG_SENSORS_ASC7621 is not set -# CONFIG_SENSORS_AXI_FAN_CONTROL is not set -CONFIG_SENSORS_ARM_SCPI=m -# CONFIG_SENSORS_ASPEED is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_CORSAIR_CPRO is not set -# CONFIG_SENSORS_DS620 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_FTSTEUTATES is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_G762 is not set -# CONFIG_SENSORS_GPIO_FAN is not set -# CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_IIO_HWMON is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_POWR1220 is not set -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LTC2945 is not set -# CONFIG_SENSORS_LTC2947_I2C is not set -# CONFIG_SENSORS_LTC2990 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4222 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4260 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_MAX31730 is not set -# CONFIG_SENSORS_MAX6621 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_MAX6697 is not set -# CONFIG_SENSORS_MAX31790 is not set -# CONFIG_SENSORS_MCP3021 is not set -# CONFIG_SENSORS_TC654 is not set -# CONFIG_SENSORS_MR75203 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LM95234 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_LM95245 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_NTC_THERMISTOR is not set -# CONFIG_SENSORS_NCT6683 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_NCT7802 is not set -# CONFIG_SENSORS_NCT7904 is not set -# CONFIG_SENSORS_NPCM7XX is not set -# CONFIG_SENSORS_OCC_P8_I2C is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_PWM_FAN is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SHT3x is not set -# CONFIG_SENSORS_SHTC1 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_SCH5636 is not set -# CONFIG_SENSORS_STTS751 is not set -# CONFIG_SENSORS_SMM665 is not set -# CONFIG_SENSORS_ADC128D818 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_AMC6821 is not set -# CONFIG_SENSORS_INA209 is not set -# CONFIG_SENSORS_INA2XX is not set -# CONFIG_SENSORS_INA3221 is not set -# CONFIG_SENSORS_TC74 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP102 is not set -# CONFIG_SENSORS_TMP103 is not set -# CONFIG_SENSORS_TMP108 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_TMP513 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83773G is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -CONFIG_THERMAL=y -# CONFIG_THERMAL_NETLINK is not set -CONFIG_THERMAL_STATISTICS=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set -# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set -CONFIG_THERMAL_GOV_FAIR_SHARE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_BANG_BANG=y -CONFIG_THERMAL_GOV_USER_SPACE=y -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_FREQ_THERMAL=y -CONFIG_DEVFREQ_THERMAL=y -CONFIG_THERMAL_EMULATION=y -# CONFIG_THERMAL_MMIO is not set -CONFIG_SUN8I_THERMAL=m -# CONFIG_GENERIC_ADC_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WATCHDOG_NOWAYOUT is not set -CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y -CONFIG_WATCHDOG_OPEN_TIMEOUT=0 -# CONFIG_WATCHDOG_SYSFS is not set - -# -# Watchdog Pretimeout Governors -# -# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_GPIO_WATCHDOG is not set -# CONFIG_XILINX_WATCHDOG is not set -# CONFIG_ZIIRAVE_WATCHDOG is not set -CONFIG_ARM_SP805_WATCHDOG=m -# CONFIG_ARM_SBSA_WATCHDOG is not set -# CONFIG_CADENCE_WATCHDOG is not set -# CONFIG_DW_WATCHDOG is not set -# CONFIG_SUNXI_WATCHDOG is not set -# CONFIG_MAX63XX_WATCHDOG is not set -# CONFIG_ARM_SMC_WATCHDOG is not set -# CONFIG_MEN_A21_WDT is not set -# CONFIG_XEN_WDT is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set -CONFIG_BCMA_POSSIBLE=y -# CONFIG_BCMA is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_ACT8945A is not set -# CONFIG_MFD_SUN4I_GPADC is not set -# CONFIG_MFD_ATMEL_FLEXCOM is not set -# CONFIG_MFD_ATMEL_HLCDC is not set -# CONFIG_MFD_BCM590XX is not set -# CONFIG_MFD_BD9571MWV is not set -CONFIG_MFD_AC100=m -CONFIG_MFD_AXP20X=y -# CONFIG_MFD_AXP20X_I2C is not set -CONFIG_MFD_AXP20X_RSB=y -# CONFIG_MFD_MADERA is not set -# CONFIG_MFD_DA9062 is not set -# CONFIG_MFD_DA9063 is not set -# CONFIG_MFD_DA9150 is not set -# CONFIG_MFD_DLN2 is not set -# CONFIG_MFD_GATEWORKS_GSC is not set -# CONFIG_MFD_MC13XXX_I2C is not set -# CONFIG_MFD_MP2629 is not set -# CONFIG_MFD_HI6421_PMIC is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_IQS62X is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_MFD_88PM800 is not set -# CONFIG_MFD_88PM805 is not set -# CONFIG_MFD_MAX14577 is not set -# CONFIG_MFD_MAX77650 is not set -# CONFIG_MFD_MAX77686 is not set -# CONFIG_MFD_MAX77693 is not set -# CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_MT6360 is not set -# CONFIG_MFD_MT6397 is not set -# CONFIG_MFD_MENF21BMC is not set -# CONFIG_MFD_VIPERBOARD is not set -# CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_RT5033 is not set -# CONFIG_MFD_RK808 is not set -# CONFIG_MFD_RN5T618 is not set -# CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_SKY81452 is not set -# CONFIG_ABX500_CORE is not set -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_LP3943 is not set -# CONFIG_MFD_TI_LMU is not set -# CONFIG_TPS6105X is not set -# CONFIG_TPS65010 is not set -# CONFIG_TPS6507X is not set -# CONFIG_MFD_TPS65086 is not set -# CONFIG_MFD_TPS65217 is not set -# CONFIG_MFD_TI_LP873X is not set -# CONFIG_MFD_TI_LP87565 is not set -# CONFIG_MFD_TPS65218 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_WL1273_CORE is not set -# CONFIG_MFD_LM3533 is not set -# CONFIG_MFD_TQMX86 is not set -# CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_STMFX is not set -# CONFIG_RAVE_SP_CORE is not set -# end of Multifunction device drivers - -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_FIXED_VOLTAGE=m -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER_OF is not set -# CONFIG_REGULATOR_88PG86X is not set -# CONFIG_REGULATOR_ACT8865 is not set -# CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_AXP20X=y -# CONFIG_REGULATOR_DA9210 is not set -# CONFIG_REGULATOR_DA9211 is not set -CONFIG_REGULATOR_FAN53555=m -# CONFIG_REGULATOR_FAN53880 is not set -CONFIG_REGULATOR_GPIO=m -# CONFIG_REGULATOR_ISL9305 is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -# CONFIG_REGULATOR_LP872X is not set -# CONFIG_REGULATOR_LP8755 is not set -# CONFIG_REGULATOR_LTC3589 is not set -# CONFIG_REGULATOR_LTC3676 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -# CONFIG_REGULATOR_MAX8973 is not set -# CONFIG_REGULATOR_MAX77826 is not set -# CONFIG_REGULATOR_MCP16502 is not set -# CONFIG_REGULATOR_MP5416 is not set -# CONFIG_REGULATOR_MP8859 is not set -# CONFIG_REGULATOR_MP886X is not set -# CONFIG_REGULATOR_MPQ7920 is not set -# CONFIG_REGULATOR_MT6311 is not set -# CONFIG_REGULATOR_PCA9450 is not set -# CONFIG_REGULATOR_PFUZE100 is not set -# CONFIG_REGULATOR_PV88060 is not set -# CONFIG_REGULATOR_PV88080 is not set -# CONFIG_REGULATOR_PV88090 is not set -CONFIG_REGULATOR_PWM=m -# CONFIG_REGULATOR_QCOM_SPMI is not set -# CONFIG_REGULATOR_QCOM_USB_VBUS is not set -# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set -# CONFIG_REGULATOR_RT4801 is not set -# CONFIG_REGULATOR_RTMV20 is not set -# CONFIG_REGULATOR_SLG51000 is not set -# CONFIG_REGULATOR_SY8106A is not set -# CONFIG_REGULATOR_SY8824X is not set -# CONFIG_REGULATOR_SY8827N is not set -# CONFIG_REGULATOR_TPS51632 is not set -# CONFIG_REGULATOR_TPS62360 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_TPS65132 is not set -CONFIG_REGULATOR_VCTRL=m -# CONFIG_REGULATOR_QCOM_LABIBB is not set -# CONFIG_REGULATOR_TP65185X is not set -# CONFIG_RC_CORE is not set -# CONFIG_MEDIA_CEC_SUPPORT is not set -CONFIG_MEDIA_SUPPORT=m -CONFIG_MEDIA_SUPPORT_FILTER=y -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y - -# -# Media device types -# -CONFIG_MEDIA_CAMERA_SUPPORT=y -# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set -# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_PLATFORM_SUPPORT=y -# CONFIG_MEDIA_TEST_SUPPORT is not set -# end of Media device types - -CONFIG_VIDEO_DEV=m -CONFIG_MEDIA_CONTROLLER=y - -# -# Video4Linux options -# -CONFIG_VIDEO_V4L2=m -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_V4L2_MEM2MEM_DEV=m -CONFIG_V4L2_FLASH_LED_CLASS=m -CONFIG_V4L2_FWNODE=m -# end of Video4Linux options - -# -# Media controller options -# -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y - -# -# Please notice that the enabled Media controller Request API is EXPERIMENTAL -# -# end of Media controller options - -# -# Media drivers -# - -# -# Drivers filtered as selected at 'Filter media drivers' -# -CONFIG_MEDIA_USB_SUPPORT=y - -# -# Webcam devices -# -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_BENQ is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_CPIA1 is not set -# CONFIG_USB_GSPCA_DTCS033 is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_JL2005BCD is not set -# CONFIG_USB_GSPCA_KINECT is not set -# CONFIG_USB_GSPCA_KONICA is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_NW80X is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_OV534_9 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SE401 is not set -# CONFIG_USB_GSPCA_SN9C2028 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SPCA1528 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_SQ930X is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STK1135 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TOPRO is not set -# CONFIG_USB_GSPCA_TOUPTEK is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_VICAM is not set -# CONFIG_USB_GSPCA_XIRLINK_CIT is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -# CONFIG_USB_PWC is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_VIDEO_USBTV is not set - -# -# Webcam, TV (analog/digital) USB devices -# -# CONFIG_VIDEO_EM28XX is not set -CONFIG_VIDEOBUF2_CORE=m -CONFIG_VIDEOBUF2_V4L2=m -CONFIG_VIDEOBUF2_MEMOPS=m -CONFIG_VIDEOBUF2_DMA_CONTIG=m -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_V4L_PLATFORM_DRIVERS=y -# CONFIG_VIDEO_CADENCE is not set -# CONFIG_VIDEO_ASPEED is not set -# CONFIG_VIDEO_MUX is not set -# CONFIG_VIDEO_XILINX is not set -# CONFIG_VIDEO_SUN4I_CSI is not set -CONFIG_VIDEO_SUN6I_CSI=m -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m -CONFIG_VIDEO_SUN8I_DEINTERLACE=m -CONFIG_VIDEO_SUN8I_ROTATE=m -# end of Media drivers - -CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y - -# -# Media ancillary drivers -# - -# -# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers' -# - -# -# Video and audio decoders -# - -# -# Camera sensor devices -# -# CONFIG_VIDEO_HI556 is not set -# CONFIG_VIDEO_IMX214 is not set -# CONFIG_VIDEO_IMX219 is not set -# CONFIG_VIDEO_IMX258 is not set -# CONFIG_VIDEO_IMX274 is not set -# CONFIG_VIDEO_IMX290 is not set -# CONFIG_VIDEO_IMX319 is not set -# CONFIG_VIDEO_IMX355 is not set -# CONFIG_VIDEO_OV2640 is not set -# CONFIG_VIDEO_OV2659 is not set -# CONFIG_VIDEO_OV2680 is not set -# CONFIG_VIDEO_OV2685 is not set -CONFIG_VIDEO_OV5640=m -# CONFIG_VIDEO_OV5645 is not set -# CONFIG_VIDEO_OV5647 is not set -# CONFIG_VIDEO_OV6650 is not set -# CONFIG_VIDEO_OV5670 is not set -# CONFIG_VIDEO_OV5675 is not set -# CONFIG_VIDEO_OV5695 is not set -# CONFIG_VIDEO_OV7251 is not set -# CONFIG_VIDEO_OV772X is not set -# CONFIG_VIDEO_OV7640 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_OV7740 is not set -# CONFIG_VIDEO_OV8856 is not set -# CONFIG_VIDEO_OV9640 is not set -# CONFIG_VIDEO_OV9650 is not set -# CONFIG_VIDEO_OV13858 is not set -# CONFIG_VIDEO_VS6624 is not set -# CONFIG_VIDEO_MT9M001 is not set -# CONFIG_VIDEO_MT9M032 is not set -# CONFIG_VIDEO_MT9M111 is not set -# CONFIG_VIDEO_MT9P031 is not set -# CONFIG_VIDEO_MT9T001 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V032 is not set -# CONFIG_VIDEO_MT9V111 is not set -# CONFIG_VIDEO_SR030PC30 is not set -# CONFIG_VIDEO_NOON010PC30 is not set -# CONFIG_VIDEO_M5MOLS is not set -# CONFIG_VIDEO_RDACM20 is not set -# CONFIG_VIDEO_RJ54N1 is not set -# CONFIG_VIDEO_S5K6AA is not set -# CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_S5K4ECGX is not set -# CONFIG_VIDEO_S5K5BAF is not set -# CONFIG_VIDEO_SMIAPP is not set -# CONFIG_VIDEO_ET8EK8 is not set -# CONFIG_VIDEO_HM5065 is not set -CONFIG_VIDEO_GC2145=m -# end of Camera sensor devices - -# -# Lens drivers -# -# CONFIG_VIDEO_AD5820 is not set -# CONFIG_VIDEO_AK7375 is not set -# CONFIG_VIDEO_DW9714 is not set -# CONFIG_VIDEO_DW9768 is not set -# CONFIG_VIDEO_DW9807_VCM is not set -# end of Lens drivers - -# -# Flash devices -# -# CONFIG_VIDEO_ADP1653 is not set -# CONFIG_VIDEO_LM3560 is not set -# CONFIG_VIDEO_LM3646 is not set -# end of Flash devices -# end of Media ancillary drivers - -# -# Graphics support -# -CONFIG_DRM=m -CONFIG_DRM_MIPI_DSI=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DEBUG_SELFTEST is not set -CONFIG_DRM_KMS_HELPER=m -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -# CONFIG_DRM_DP_CEC is not set -CONFIG_DRM_GEM_CMA_HELPER=y -CONFIG_DRM_KMS_CMA_HELPER=y -CONFIG_DRM_GEM_SHMEM_HELPER=y -CONFIG_DRM_SCHED=m - -# -# I2C encoder or helper chips -# -CONFIG_DRM_I2C_CH7006=m -CONFIG_DRM_I2C_SIL164=m -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - -# -# ARM devices -# -# CONFIG_DRM_HDLCD is not set -CONFIG_DRM_MALI_DISPLAY=m -# CONFIG_DRM_KOMEDA is not set -# end of ARM devices - -# CONFIG_DRM_VGEM is not set -# CONFIG_DRM_VKMS is not set -CONFIG_DRM_UDL=m -# CONFIG_DRM_RCAR_DW_HDMI is not set -# CONFIG_DRM_RCAR_LVDS is not set -CONFIG_DRM_SUN4I=m -CONFIG_DRM_SUN4I_HDMI=m -# CONFIG_DRM_SUN4I_HDMI_CEC is not set -CONFIG_DRM_SUN4I_BACKEND=m -CONFIG_DRM_SUN6I_DSI=m -CONFIG_DRM_SUN8I_DW_HDMI=m -CONFIG_DRM_SUN8I_MIXER=m -CONFIG_DRM_SUN8I_TCON_TOP=m -CONFIG_DRM_PANEL=y - -# -# Display Panels -# -# CONFIG_DRM_PANEL_ARM_VERSATILE is not set -# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set -# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set -# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=m -# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set -CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m -CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m -CONFIG_DRM_PANEL_ILITEK_ILI9881C=m -# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set -# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set -# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set -# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set -# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set -# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set -# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set -# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set -# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set -# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set -# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set -CONFIG_DRM_PANEL_SITRONIX_ST7703=m -# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set -# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set -# end of Display Panels - -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_PANEL_BRIDGE=y - -# -# Display Interface Bridges -# -# CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_CHRONTEL_CH7033 is not set -CONFIG_DRM_DISPLAY_CONNECTOR=m -# CONFIG_DRM_LONTIUM_LT9611 is not set -# CONFIG_DRM_LVDS_CODEC is not set -# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set -# CONFIG_DRM_NWL_MIPI_DSI is not set -# CONFIG_DRM_NXP_PTN3460 is not set -# CONFIG_DRM_PARADE_PS8622 is not set -# CONFIG_DRM_PARADE_PS8640 is not set -# CONFIG_DRM_SIL_SII8620 is not set -# CONFIG_DRM_SII902X is not set -# CONFIG_DRM_SII9234 is not set -# CONFIG_DRM_SIMPLE_BRIDGE is not set -# CONFIG_DRM_THINE_THC63LVD1024 is not set -# CONFIG_DRM_TOSHIBA_TC358762 is not set -# CONFIG_DRM_TOSHIBA_TC358764 is not set -# CONFIG_DRM_TOSHIBA_TC358767 is not set -# CONFIG_DRM_TOSHIBA_TC358768 is not set -# CONFIG_DRM_TOSHIBA_TC358775 is not set -# CONFIG_DRM_TI_TFP410 is not set -# CONFIG_DRM_TI_SN65DSI86 is not set -# CONFIG_DRM_TI_TPD12S015 is not set -# CONFIG_DRM_ANALOGIX_ANX6345 is not set -# CONFIG_DRM_ANALOGIX_ANX78XX is not set -# CONFIG_DRM_I2C_ADV7511 is not set -# CONFIG_DRM_CDNS_MHDP8546 is not set -CONFIG_DRM_DW_HDMI=m -# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set -# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set -# CONFIG_DRM_DW_HDMI_CEC is not set -# end of Display Interface Bridges - -# CONFIG_DRM_ETNAVIV is not set -# CONFIG_DRM_ARCPGU is not set -# CONFIG_DRM_HISI_KIRIN is not set -# CONFIG_DRM_MXSFB is not set -# CONFIG_DRM_GM12U320 is not set -# CONFIG_DRM_PL111 is not set -# CONFIG_DRM_XEN is not set -CONFIG_DRM_LIMA=m -# CONFIG_DRM_PANFROST is not set -# CONFIG_DRM_TIDSS is not set -# CONFIG_DRM_LEGACY is not set -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=m - -# -# Frame buffer Devices -# -CONFIG_FB_CMDLINE=y -CONFIG_FB_NOTIFY=y -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_SYS_FILLRECT=m -CONFIG_FB_SYS_COPYAREA=m -CONFIG_FB_SYS_IMAGEBLIT=m -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=m -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_ARMCLCD is not set -# CONFIG_FB_OPENCORES is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_SUN5I_EINK is not set -# CONFIG_FB_SMSCUFX is not set -CONFIG_FB_UDL=m -# CONFIG_FB_IBM_GXT4500 is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_XEN_FBDEV_FRONTEND is not set -# CONFIG_FB_METRONOME is not set -CONFIG_FB_SIMPLE=y -# CONFIG_FB_SSD1307 is not set -# end of Frame buffer Devices - -# -# Backlight & LCD device support -# -CONFIG_LCD_CLASS_DEVICE=m -# CONFIG_LCD_PLATFORM is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=m -# CONFIG_BACKLIGHT_KTD253 is not set -CONFIG_BACKLIGHT_PWM=m -# CONFIG_BACKLIGHT_QCOM_WLED is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_LM3630A is not set -# CONFIG_BACKLIGHT_LM3639 is not set -# CONFIG_BACKLIGHT_LP855X is not set -# CONFIG_BACKLIGHT_GPIO is not set -# CONFIG_BACKLIGHT_LV5207LP is not set -# CONFIG_BACKLIGHT_BD6107 is not set -# CONFIG_BACKLIGHT_ARCXCNN is not set -# CONFIG_BACKLIGHT_LED is not set -# end of Backlight & LCD device support - -CONFIG_VIDEOMODE_HELPERS=y -CONFIG_HDMI=y - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_DUMMY_CONSOLE_COLUMNS=80 -CONFIG_DUMMY_CONSOLE_ROWS=25 -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set -# end of Console display driver support - -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -# end of Graphics support - -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -CONFIG_SND_DMAENGINE_PCM=m -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -CONFIG_SND_JACK_INPUT_DEV=y -# CONFIG_SND_OSSEMUL is not set -CONFIG_SND_PCM_TIMER=y -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_PROC_FS=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_SEQUENCER is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_ALOOP=m -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# HD-Audio -# -# end of HD-Audio - -CONFIG_SND_HDA_PREALLOC_SIZE=64 -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y -# CONFIG_SND_USB_UA101 is not set -# CONFIG_SND_USB_CAIAQ is not set -# CONFIG_SND_USB_6FIRE is not set -# CONFIG_SND_USB_HIFACE is not set -# CONFIG_SND_BCD2000 is not set -# CONFIG_SND_USB_POD is not set -# CONFIG_SND_USB_PODHD is not set -# CONFIG_SND_USB_TONEPORT is not set -# CONFIG_SND_USB_VARIAX is not set -CONFIG_SND_SOC=m -CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y -# CONFIG_SND_SOC_AMD_ACP is not set -# CONFIG_SND_ATMEL_SOC is not set -# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set -# CONFIG_SND_DESIGNWARE_I2S is not set - -# -# SoC Audio for Freescale CPUs -# - -# -# Common SoC Audio options for Freescale CPUs: -# -# CONFIG_SND_SOC_FSL_ASRC is not set -# CONFIG_SND_SOC_FSL_SAI is not set -# CONFIG_SND_SOC_FSL_AUDMIX is not set -# CONFIG_SND_SOC_FSL_SSI is not set -# CONFIG_SND_SOC_FSL_SPDIF is not set -# CONFIG_SND_SOC_FSL_ESAI is not set -# CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_IMX_AUDMUX is not set -# end of SoC Audio for Freescale CPUs - -# CONFIG_SND_I2S_HI6210_I2S is not set -# CONFIG_SND_SOC_IMG is not set -# CONFIG_SND_SOC_MTK_BTCVSD is not set -# CONFIG_SND_SOC_SOF_TOPLEVEL is not set - -# -# STMicroelectronics STM32 SOC audio support -# -# end of STMicroelectronics STM32 SOC audio support - -# -# Allwinner SoC Audio support -# -CONFIG_SND_SUN4I_CODEC=m -CONFIG_SND_SUN8I_CODEC=m -CONFIG_SND_SUN8I_CODEC_ANALOG=m -CONFIG_SND_SUN50I_CODEC_ANALOG=m -CONFIG_SND_SUN4I_I2S=m -CONFIG_SND_SUN4I_SPDIF=m -CONFIG_SND_SUN8I_ADDA_PR_REGMAP=m -# end of Allwinner SoC Audio support - -# CONFIG_SND_SOC_XILINX_I2S is not set -# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set -# CONFIG_SND_SOC_XILINX_SPDIF is not set -# CONFIG_SND_SOC_XTFPGA_I2S is not set -# CONFIG_ZX_TDM is not set -CONFIG_SND_SOC_I2C_AND_SPI=m - -# -# CODEC drivers -# -# CONFIG_SND_SOC_AC97_CODEC is not set -# CONFIG_SND_SOC_ADAU1701 is not set -# CONFIG_SND_SOC_ADAU1761_I2C is not set -# CONFIG_SND_SOC_ADAU7002 is not set -# CONFIG_SND_SOC_ADAU7118_HW is not set -# CONFIG_SND_SOC_ADAU7118_I2C is not set -# CONFIG_SND_SOC_AK4118 is not set -# CONFIG_SND_SOC_AK4458 is not set -# CONFIG_SND_SOC_AK4554 is not set -CONFIG_SND_SOC_AK4613=m -# CONFIG_SND_SOC_AK4642 is not set -# CONFIG_SND_SOC_AK5386 is not set -# CONFIG_SND_SOC_AK5558 is not set -# CONFIG_SND_SOC_ALC5623 is not set -# CONFIG_SND_SOC_BD28623 is not set -CONFIG_SND_SOC_BT_SCO=m -# CONFIG_SND_SOC_CS35L32 is not set -# CONFIG_SND_SOC_CS35L33 is not set -# CONFIG_SND_SOC_CS35L34 is not set -# CONFIG_SND_SOC_CS35L35 is not set -# CONFIG_SND_SOC_CS35L36 is not set -# CONFIG_SND_SOC_CS42L42 is not set -# CONFIG_SND_SOC_CS42L51_I2C is not set -# CONFIG_SND_SOC_CS42L52 is not set -# CONFIG_SND_SOC_CS42L56 is not set -# CONFIG_SND_SOC_CS42L73 is not set -# CONFIG_SND_SOC_CS4234 is not set -# CONFIG_SND_SOC_CS4265 is not set -# CONFIG_SND_SOC_CS4270 is not set -# CONFIG_SND_SOC_CS4271_I2C is not set -# CONFIG_SND_SOC_CS42XX8_I2C is not set -# CONFIG_SND_SOC_CS43130 is not set -# CONFIG_SND_SOC_CS4341 is not set -# CONFIG_SND_SOC_CS4349 is not set -# CONFIG_SND_SOC_CS53L30 is not set -# CONFIG_SND_SOC_CX2072X is not set -# CONFIG_SND_SOC_DA7213 is not set -CONFIG_SND_SOC_DMIC=m -CONFIG_SND_SOC_EC25=m -# CONFIG_SND_SOC_ES7134 is not set -# CONFIG_SND_SOC_ES7241 is not set -# CONFIG_SND_SOC_ES8316 is not set -# CONFIG_SND_SOC_ES8328_I2C is not set -# CONFIG_SND_SOC_GTM601 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set -# CONFIG_SND_SOC_MAX98088 is not set -# CONFIG_SND_SOC_MAX98357A is not set -# CONFIG_SND_SOC_MAX98504 is not set -# CONFIG_SND_SOC_MAX9867 is not set -# CONFIG_SND_SOC_MAX98927 is not set -# CONFIG_SND_SOC_MAX98373_I2C is not set -# CONFIG_SND_SOC_MAX98390 is not set -# CONFIG_SND_SOC_MAX9860 is not set -# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set -# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set -# CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM1789_I2C is not set -# CONFIG_SND_SOC_PCM179X_I2C is not set -# CONFIG_SND_SOC_PCM186X_I2C is not set -# CONFIG_SND_SOC_PCM3060_I2C is not set -# CONFIG_SND_SOC_PCM3168A_I2C is not set -# CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_RK3328 is not set -# CONFIG_SND_SOC_RT5616 is not set -# CONFIG_SND_SOC_RT5631 is not set -# CONFIG_SND_SOC_SGTL5000 is not set -CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m -# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set -# CONFIG_SND_SOC_SPDIF is not set -# CONFIG_SND_SOC_SSM2305 is not set -# CONFIG_SND_SOC_SSM2602_I2C is not set -# CONFIG_SND_SOC_SSM4567 is not set -# CONFIG_SND_SOC_STA32X is not set -# CONFIG_SND_SOC_STA350 is not set -# CONFIG_SND_SOC_STI_SAS is not set -# CONFIG_SND_SOC_TAS2552 is not set -# CONFIG_SND_SOC_TAS2562 is not set -# CONFIG_SND_SOC_TAS2764 is not set -# CONFIG_SND_SOC_TAS2770 is not set -# CONFIG_SND_SOC_TAS5086 is not set -# CONFIG_SND_SOC_TAS571X is not set -# CONFIG_SND_SOC_TAS5720 is not set -# CONFIG_SND_SOC_TAS6424 is not set -# CONFIG_SND_SOC_TDA7419 is not set -# CONFIG_SND_SOC_TFA9879 is not set -# CONFIG_SND_SOC_TLV320AIC23_I2C is not set -# CONFIG_SND_SOC_TLV320AIC31XX is not set -# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set -# CONFIG_SND_SOC_TLV320AIC3X is not set -# CONFIG_SND_SOC_TLV320ADCX140 is not set -# CONFIG_SND_SOC_TS3A227E is not set -# CONFIG_SND_SOC_TSCS42XX is not set -# CONFIG_SND_SOC_TSCS454 is not set -# CONFIG_SND_SOC_UDA1334 is not set -# CONFIG_SND_SOC_WM8510 is not set -# CONFIG_SND_SOC_WM8523 is not set -# CONFIG_SND_SOC_WM8524 is not set -# CONFIG_SND_SOC_WM8580 is not set -# CONFIG_SND_SOC_WM8711 is not set -# CONFIG_SND_SOC_WM8728 is not set -# CONFIG_SND_SOC_WM8731 is not set -# CONFIG_SND_SOC_WM8737 is not set -# CONFIG_SND_SOC_WM8741 is not set -# CONFIG_SND_SOC_WM8750 is not set -# CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8776 is not set -# CONFIG_SND_SOC_WM8782 is not set -# CONFIG_SND_SOC_WM8804_I2C is not set -# CONFIG_SND_SOC_WM8903 is not set -# CONFIG_SND_SOC_WM8904 is not set -# CONFIG_SND_SOC_WM8960 is not set -# CONFIG_SND_SOC_WM8962 is not set -# CONFIG_SND_SOC_WM8974 is not set -# CONFIG_SND_SOC_WM8978 is not set -# CONFIG_SND_SOC_WM8985 is not set -# CONFIG_SND_SOC_ZX_AUD96P22 is not set -# CONFIG_SND_SOC_MAX9759 is not set -# CONFIG_SND_SOC_MT6351 is not set -# CONFIG_SND_SOC_MT6358 is not set -# CONFIG_SND_SOC_MT6660 is not set -# CONFIG_SND_SOC_NAU8540 is not set -# CONFIG_SND_SOC_NAU8810 is not set -# CONFIG_SND_SOC_NAU8822 is not set -# CONFIG_SND_SOC_NAU8824 is not set -# CONFIG_SND_SOC_TPA6130A2 is not set -# end of CODEC drivers - -CONFIG_SND_SIMPLE_CARD_UTILS=m -CONFIG_SND_SIMPLE_CARD=m -CONFIG_SND_AUDIO_GRAPH_CARD=m -# CONFIG_SND_XEN_FRONTEND is not set - -# -# HID support -# -CONFIG_HID=y -CONFIG_HID_BATTERY_STRENGTH=y -CONFIG_HIDRAW=y -CONFIG_UHID=m -CONFIG_HID_GENERIC=m - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=m -# CONFIG_HID_ACCUTOUCH is not set -# CONFIG_HID_ACRUX is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_APPLEIR is not set -# CONFIG_HID_ASUS is not set -# CONFIG_HID_AUREAL is not set -CONFIG_HID_BELKIN=m -# CONFIG_HID_BETOP_FF is not set -# CONFIG_HID_BIGBEN_FF is not set -CONFIG_HID_CHERRY=m -CONFIG_HID_CHICONY=m -# CONFIG_HID_CORSAIR is not set -# CONFIG_HID_COUGAR is not set -# CONFIG_HID_MACALLY is not set -# CONFIG_HID_PRODIKEYS is not set -# CONFIG_HID_CMEDIA is not set -# CONFIG_HID_CP2112 is not set -# CONFIG_HID_CREATIVE_SB0540 is not set -CONFIG_HID_CYPRESS=m -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_ELAN is not set -# CONFIG_HID_ELECOM is not set -# CONFIG_HID_ELO is not set -CONFIG_HID_EZKEY=m -# CONFIG_HID_GEMBIRD is not set -# CONFIG_HID_GFRM is not set -# CONFIG_HID_GLORIOUS is not set -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_VIVALDI is not set -# CONFIG_HID_GT683R is not set -# CONFIG_HID_KEYTOUCH is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_WALTOP is not set -# CONFIG_HID_VIEWSONIC is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_ICADE is not set -CONFIG_HID_ITE=m -# CONFIG_HID_JABRA is not set -# CONFIG_HID_TWINHAN is not set -CONFIG_HID_KENSINGTON=m -# CONFIG_HID_LCPOWER is not set -# CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set -CONFIG_HID_LOGITECH=m -CONFIG_HID_LOGITECH_DJ=m -CONFIG_HID_LOGITECH_HIDPP=m -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIWHEELS_FF is not set -CONFIG_HID_MAGICMOUSE=m -# CONFIG_HID_MALTRON is not set -# CONFIG_HID_MAYFLASH is not set -CONFIG_HID_REDRAGON=m -CONFIG_HID_MICROSOFT=m -CONFIG_HID_MONTEREY=m -CONFIG_HID_MULTITOUCH=m -# CONFIG_HID_NTI is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_ORTEK is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PENMOUNT is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_PICOLCD is not set -# CONFIG_HID_PLANTRONICS is not set -# CONFIG_HID_PRIMAX is not set -# CONFIG_HID_RETRODE is not set -# CONFIG_HID_ROCCAT is not set -# CONFIG_HID_SAITEK is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SPEEDLINK is not set -# CONFIG_HID_STEAM is not set -# CONFIG_HID_STEELSERIES is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_RMI is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TIVO is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THINGM is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_UDRAW_PS3 is not set -# CONFIG_HID_U2FZERO is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_WIIMOTE is not set -# CONFIG_HID_XINMO is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -# CONFIG_HID_SENSOR_HUB is not set -# CONFIG_HID_ALPS is not set -# CONFIG_HID_MCP2221 is not set -# end of Special HID drivers - -# -# USB HID support -# -CONFIG_USB_HID=m -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set -# end of USB HID support - -# -# I2C HID support -# -CONFIG_I2C_HID=m -# end of I2C HID support -# end of HID support - -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_COMMON=y -# CONFIG_USB_LED_TRIG is not set -CONFIG_USB_ULPI_BUS=y -# CONFIG_USB_CONN_GPIO is not set -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB=m -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEFAULT_PERSIST=y -# CONFIG_USB_FEW_INIT_RETRIES is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_PRODUCTLIST is not set -# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set -# CONFIG_USB_OTG_FSM is not set -# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set -CONFIG_USB_AUTOSUSPEND_DELAY=2 -# CONFIG_USB_MON is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_XHCI_HCD=m -# CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set -CONFIG_USB_XHCI_PLATFORM=m -CONFIG_USB_EHCI_HCD=m -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_EHCI_FSL is not set -CONFIG_USB_EHCI_HCD_PLATFORM=m -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_FOTG210_HCD is not set -CONFIG_USB_OHCI_HCD=m -CONFIG_USB_OHCI_HCD_PLATFORM=m -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HCD_TEST_MODE is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -CONFIG_USB_WDM=m -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=m -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_REALTEK is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set -# CONFIG_USB_UAS is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USBIP_CORE is not set -# CONFIG_USB_CDNS3 is not set -CONFIG_USB_MUSB_HDRC=m -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_GADGET is not set -CONFIG_USB_MUSB_DUAL_ROLE=y - -# -# Platform Glue Layer -# -CONFIG_USB_MUSB_SUNXI=m - -# -# MUSB DMA mode -# -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_DWC3=m -# CONFIG_USB_DWC3_ULPI is not set -# CONFIG_USB_DWC3_HOST is not set -# CONFIG_USB_DWC3_GADGET is not set -CONFIG_USB_DWC3_DUAL_ROLE=y - -# -# Platform Glue Driver Support -# -CONFIG_USB_DWC3_OF_SIMPLE=m -CONFIG_USB_DWC2=m -# CONFIG_USB_DWC2_HOST is not set - -# -# Gadget/Dual-role mode requires USB Gadget support to be enabled -# -# CONFIG_USB_DWC2_PERIPHERAL is not set -CONFIG_USB_DWC2_DUAL_ROLE=y -# CONFIG_USB_DWC2_DEBUG is not set -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set -CONFIG_USB_CHIPIDEA=m -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_MSM=m -CONFIG_USB_CHIPIDEA_IMX=m -CONFIG_USB_CHIPIDEA_GENERIC=m -CONFIG_USB_CHIPIDEA_TEGRA=m -CONFIG_USB_ISP1760=m -CONFIG_USB_ISP1760_HCD=y -CONFIG_USB_ISP1761_UDC=y -# CONFIG_USB_ISP1760_HOST_ROLE is not set -# CONFIG_USB_ISP1760_GADGET_ROLE is not set -CONFIG_USB_ISP1760_DUAL_ROLE=y - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_SIMPLE is not set -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -CONFIG_USB_SERIAL_CH341=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_CP210X is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_F81232 is not set -# CONFIG_USB_SERIAL_F8153X is not set -# CONFIG_USB_SERIAL_GARMIN is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_IUU is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_METRO is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_MXUPORT is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_OTI6858 is not set -# CONFIG_USB_SERIAL_QCAUX is not set -# CONFIG_USB_SERIAL_QUALCOMM is not set -# CONFIG_USB_SERIAL_SPCP8X5 is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -CONFIG_USB_SERIAL_WWAN=m -CONFIG_USB_SERIAL_OPTION=m -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_SERIAL_OPTICON is not set -# CONFIG_USB_SERIAL_XSENS_MT is not set -# CONFIG_USB_SERIAL_WISHBONE is not set -# CONFIG_USB_SERIAL_SSU100 is not set -# CONFIG_USB_SERIAL_QT2 is not set -# CONFIG_USB_SERIAL_UPD78F0730 is not set -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_APPLE_MFI_FASTCHARGE is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_EHSET_TEST_FIXTURE is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_YUREX is not set -# CONFIG_USB_EZUSB_FX2 is not set -# CONFIG_USB_HUB_USB251XB is not set -CONFIG_USB_HSIC_USB3503=m -# CONFIG_USB_HSIC_USB4604 is not set -# CONFIG_USB_LINK_LAYER_TEST is not set -# CONFIG_USB_CHAOSKEY is not set - -# -# USB Physical Layer drivers -# -CONFIG_USB_PHY=y -CONFIG_NOP_USB_XCEIV=m -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ISP1301 is not set -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_VIEWPORT=y -# end of USB Physical Layer drivers - -CONFIG_USB_GADGET=m -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 - -# -# USB Peripheral Controller -# -# CONFIG_USB_FOTG210_UDC is not set -# CONFIG_USB_GR_UDC is not set -# CONFIG_USB_R8A66597 is not set -# CONFIG_USB_PXA27X is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MV_U3D is not set -CONFIG_USB_SNP_CORE=m -CONFIG_USB_SNP_UDC_PLAT=m -# CONFIG_USB_M66592 is not set -CONFIG_USB_BDC_UDC=m - -# -# Platform Support -# -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_GADGET_XILINX is not set -# CONFIG_USB_DUMMY_HCD is not set -# end of USB Peripheral Controller - -CONFIG_USB_LIBCOMPOSITE=m -CONFIG_USB_U_ETHER=m -CONFIG_USB_F_NCM=m -CONFIG_USB_F_ECM=m -CONFIG_USB_F_EEM=m -CONFIG_USB_F_RNDIS=m -CONFIG_USB_F_MASS_STORAGE=m -CONFIG_USB_F_TCM=m -CONFIG_USB_CONFIGFS=m -# CONFIG_USB_CONFIGFS_SERIAL is not set -# CONFIG_USB_CONFIGFS_ACM is not set -# CONFIG_USB_CONFIGFS_OBEX is not set -CONFIG_USB_CONFIGFS_NCM=y -CONFIG_USB_CONFIGFS_ECM=y -# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set -CONFIG_USB_CONFIGFS_RNDIS=y -CONFIG_USB_CONFIGFS_EEM=y -CONFIG_USB_CONFIGFS_MASS_STORAGE=y -# CONFIG_USB_CONFIGFS_F_LB_SS is not set -# CONFIG_USB_CONFIGFS_F_FS is not set -# CONFIG_USB_CONFIGFS_F_UAC1 is not set -# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set -# CONFIG_USB_CONFIGFS_F_UAC2 is not set -# CONFIG_USB_CONFIGFS_F_MIDI is not set -# CONFIG_USB_CONFIGFS_F_HID is not set -# CONFIG_USB_CONFIGFS_F_UVC is not set -# CONFIG_USB_CONFIGFS_F_PRINTER is not set -CONFIG_USB_CONFIGFS_F_TCM=y - -# -# USB Gadget precomposed configurations -# -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_ETH is not set -# CONFIG_USB_G_NCM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FUNCTIONFS is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_GADGET_TARGET is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_ACM_MS is not set -# CONFIG_USB_G_MULTI is not set -# CONFIG_USB_G_HID is not set -# CONFIG_USB_G_DBGP is not set -# CONFIG_USB_G_WEBCAM is not set -# CONFIG_USB_RAW_GADGET is not set -# end of USB Gadget precomposed configurations - -CONFIG_TYPEC=m -CONFIG_TYPEC_TCPM=m -CONFIG_TYPEC_TCPCI=m -# CONFIG_TYPEC_RT1711H is not set -# CONFIG_TYPEC_TCPCI_MAXIM is not set -# CONFIG_TYPEC_FUSB302 is not set -CONFIG_TYPEC_UCSI=m -# CONFIG_UCSI_CCG is not set -CONFIG_TYPEC_ANX7688=m -# CONFIG_TYPEC_HD3SS3220 is not set -# CONFIG_TYPEC_TPS6598X is not set -# CONFIG_TYPEC_STUSB160X is not set - -# -# USB Type-C Multiplexer/DeMultiplexer Switch support -# -# CONFIG_TYPEC_MUX_PI3USB30532 is not set -# end of USB Type-C Multiplexer/DeMultiplexer Switch support - -# -# USB Type-C Alternate Mode drivers -# -CONFIG_TYPEC_DP_ALTMODE=m -# CONFIG_TYPEC_NVIDIA_ALTMODE is not set -# end of USB Type-C Alternate Mode drivers - -CONFIG_USB_ROLE_SWITCH=y -CONFIG_MMC=m -CONFIG_PWRSEQ_EMMC=m -CONFIG_PWRSEQ_SIMPLE=m -CONFIG_MMC_BLOCK=m -CONFIG_MMC_BLOCK_MINORS=32 -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_ARMMMCI=m -CONFIG_MMC_STM32_SDMMC=y -CONFIG_MMC_SDHCI=m -CONFIG_MMC_SDHCI_PLTFM=m -CONFIG_MMC_SDHCI_OF_ARASAN=m -# CONFIG_MMC_SDHCI_OF_ASPEED is not set -# CONFIG_MMC_SDHCI_OF_AT91 is not set -# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set -CONFIG_MMC_SDHCI_CADENCE=m -# CONFIG_MMC_SDHCI_F_SDH30 is not set -# CONFIG_MMC_SDHCI_MILBEAUT is not set -# CONFIG_MMC_DW is not set -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MMC_USDHI6ROL0 is not set -CONFIG_MMC_SUNXI=m -CONFIG_MMC_CQHCI=m -# CONFIG_MMC_HSQ is not set -# CONFIG_MMC_MTK is not set -# CONFIG_MMC_SDHCI_XENON is not set -# CONFIG_MMC_SDHCI_OMAP is not set -# CONFIG_MMC_SDHCI_AM654 is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=m -CONFIG_LEDS_CLASS_FLASH=m -# CONFIG_LEDS_CLASS_MULTICOLOR is not set -CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y - -# -# LED drivers -# -# CONFIG_LEDS_AAT1290 is not set -# CONFIG_LEDS_AN30259A is not set -# CONFIG_LEDS_AS3645A is not set -# CONFIG_LEDS_AW2013 is not set -# CONFIG_LEDS_BCM6328 is not set -# CONFIG_LEDS_BCM6358 is not set -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM3532 is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_LM3692X is not set -# CONFIG_LEDS_LM3601X is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=m -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP50XX is not set -# CONFIG_LEDS_LP55XX_COMMON is not set -# CONFIG_LEDS_LP8860 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -CONFIG_LEDS_PWM=m -# CONFIG_LEDS_REGULATOR is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_TLC591XX is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_KTD2692 is not set -# CONFIG_LEDS_IS31FL319X is not set -# CONFIG_LEDS_IS31FL32XX is not set - -# -# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) -# -# CONFIG_LEDS_BLINKM is not set -# CONFIG_LEDS_MLXREG is not set -# CONFIG_LEDS_USER is not set -# CONFIG_LEDS_TI_LMU_COMMON is not set -CONFIG_LEDS_SGM3140=m -# CONFIG_LEDS_AXP20X is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_TIMER is not set -# CONFIG_LEDS_TRIGGER_ONESHOT is not set -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -CONFIG_LEDS_TRIGGER_CPU=y -# CONFIG_LEDS_TRIGGER_ACTIVITY is not set -# CONFIG_LEDS_TRIGGER_GPIO is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_LEDS_TRIGGER_TRANSIENT is not set -# CONFIG_LEDS_TRIGGER_CAMERA is not set -CONFIG_LEDS_TRIGGER_PANIC=y -# CONFIG_LEDS_TRIGGER_NETDEV is not set -CONFIG_LEDS_TRIGGER_PATTERN=y -# CONFIG_LEDS_TRIGGER_AUDIO is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_INFINIBAND is not set -CONFIG_EDAC_SUPPORT=y -CONFIG_EDAC=y -CONFIG_EDAC_LEGACY_SYSFS=y -# CONFIG_EDAC_DEBUG is not set -# CONFIG_EDAC_XGENE is not set -# CONFIG_EDAC_DMC520 is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -CONFIG_RTC_SYSTOHC=y -CONFIG_RTC_SYSTOHC_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set -CONFIG_RTC_NVMEM=y - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_ABB5ZES3 is not set -# CONFIG_RTC_DRV_ABEOZ9 is not set -# CONFIG_RTC_DRV_ABX80X is not set -# CONFIG_RTC_DRV_AC100 is not set -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_HYM8563 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_ISL12026 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8523 is not set -# CONFIG_RTC_DRV_PCF85063 is not set -# CONFIG_RTC_DRV_PCF85363 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8010 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_RV3028 is not set -# CONFIG_RTC_DRV_RV3032 is not set -# CONFIG_RTC_DRV_RV8803 is not set -# CONFIG_RTC_DRV_SD3078 is not set - -# -# SPI RTC drivers -# -CONFIG_RTC_I2C_AND_SPI=m - -# -# SPI and I2C RTC drivers -# -CONFIG_RTC_DRV_DS3232=m -CONFIG_RTC_DRV_DS3232_HWMON=y -# CONFIG_RTC_DRV_PCF2127 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1685_FAMILY is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_DS2404 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set -# CONFIG_RTC_DRV_ZYNQMP is not set - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_PL030 is not set -CONFIG_RTC_DRV_PL031=y -CONFIG_RTC_DRV_SUN6I=y -# CONFIG_RTC_DRV_CADENCE is not set -# CONFIG_RTC_DRV_FTRTC010 is not set -# CONFIG_RTC_DRV_R7301 is not set - -# -# HID Sensor RTC drivers -# -CONFIG_DMADEVICES=y -# CONFIG_DMADEVICES_DEBUG is not set - -# -# DMA Devices -# -CONFIG_DMA_ENGINE=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DMA_OF=y -# CONFIG_ALTERA_MSGDMA is not set -# CONFIG_AMBA_PL08X is not set -# CONFIG_BCM_SBA_RAID is not set -CONFIG_DMA_SUN6I=y -# CONFIG_DW_AXI_DMAC is not set -# CONFIG_FSL_EDMA is not set -# CONFIG_FSL_QDMA is not set -# CONFIG_INTEL_IDMA64 is not set -# CONFIG_MV_XOR_V2 is not set -CONFIG_PL330_DMA=y -# CONFIG_XILINX_DMA is not set -# CONFIG_XILINX_ZYNQMP_DMA is not set -# CONFIG_XILINX_ZYNQMP_DPDMA is not set -# CONFIG_QCOM_HIDMA_MGMT is not set -# CONFIG_QCOM_HIDMA is not set -# CONFIG_DW_DMAC is not set -# CONFIG_SF_PDMA is not set - -# -# DMA Clients -# -# CONFIG_ASYNC_TX_DMA is not set -# CONFIG_DMATEST is not set - -# -# DMABUF options -# -CONFIG_SYNC_FILE=y -# CONFIG_SW_SYNC is not set -# CONFIG_UDMABUF is not set -# CONFIG_DMABUF_MOVE_NOTIFY is not set -# CONFIG_DMABUF_SELFTESTS is not set -# CONFIG_DMABUF_HEAPS is not set -# end of DMABUF options - -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set -# CONFIG_VFIO is not set -# CONFIG_VIRT_DRIVERS is not set -# CONFIG_VIRTIO_MENU is not set -# CONFIG_VDPA is not set -# CONFIG_VHOST_MENU is not set - -# -# Microsoft Hyper-V guest support -# -# end of Microsoft Hyper-V guest support - -# -# Xen driver support -# -# CONFIG_XEN_BALLOON is not set -# CONFIG_XEN_DEV_EVTCHN is not set -# CONFIG_XEN_BACKEND is not set -# CONFIG_XENFS is not set -# CONFIG_XEN_SYS_HYPERVISOR is not set -# CONFIG_XEN_GNTDEV is not set -# CONFIG_XEN_GRANT_DEV_ALLOC is not set -# CONFIG_XEN_GRANT_DMA_ALLOC is not set -CONFIG_SWIOTLB_XEN=y -# CONFIG_XEN_PVCALLS_FRONTEND is not set -CONFIG_XEN_PRIVCMD=m -CONFIG_XEN_AUTO_XLATE=y -# end of Xen driver support - -# CONFIG_GREYBUS is not set -CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_COMEDI is not set -# CONFIG_RTLLIB is not set -CONFIG_RTL8723BS=m -# CONFIG_R8712U is not set -# CONFIG_R8188EU is not set -# CONFIG_VT6656 is not set - -# -# IIO staging drivers -# - -# -# Accelerometers -# -# end of Accelerometers - -# -# Analog to digital converters -# -# end of Analog to digital converters - -# -# Analog digital bi-direction converters -# -# CONFIG_ADT7316 is not set -# end of Analog digital bi-direction converters - -# -# Capacitance to digital converters -# -# CONFIG_AD7150 is not set -# CONFIG_AD7746 is not set -# end of Capacitance to digital converters - -# -# Direct Digital Synthesis -# -# end of Direct Digital Synthesis - -# -# Network Analyzer, Impedance Converters -# -# CONFIG_AD5933 is not set -# end of Network Analyzer, Impedance Converters - -# -# Active energy metering IC -# -# CONFIG_ADE7854 is not set -# end of Active energy metering IC - -# -# Resolver to digital converters -# -# end of Resolver to digital converters -# end of IIO staging drivers - -CONFIG_STAGING_MEDIA=y -CONFIG_VIDEO_SUNXI=y -CONFIG_VIDEO_SUNXI_CEDRUS=m - -# -# Android -# -CONFIG_ASHMEM=y -# CONFIG_ION is not set -# end of Android - -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_GS_FPGABOOT is not set -# CONFIG_UNISYSSPAR is not set -# CONFIG_KS7010 is not set - -# -# Gasket devices -# -# end of Gasket devices - -# CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set -# CONFIG_WFX is not set -# CONFIG_SPMI_HISI3670 is not set -# CONFIG_MFD_HI6421_SPMI is not set -CONFIG_RTL8723CS=m -# CONFIG_GOLDFISH is not set -# CONFIG_CHROME_PLATFORMS is not set -# CONFIG_MELLANOX_PLATFORM is not set -CONFIG_HAVE_CLK=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_MAX9485 is not set -CONFIG_COMMON_CLK_SCPI=y -# CONFIG_COMMON_CLK_SI5341 is not set -# CONFIG_COMMON_CLK_SI5351 is not set -# CONFIG_COMMON_CLK_SI514 is not set -# CONFIG_COMMON_CLK_SI544 is not set -# CONFIG_COMMON_CLK_SI570 is not set -# CONFIG_COMMON_CLK_CDCE706 is not set -# CONFIG_COMMON_CLK_CDCE925 is not set -CONFIG_COMMON_CLK_CS2000_CP=m -CONFIG_CLK_QORIQ=y -CONFIG_COMMON_CLK_XGENE=y -CONFIG_COMMON_CLK_PWM=m -# CONFIG_COMMON_CLK_VC5 is not set -# CONFIG_COMMON_CLK_FIXED_MMIO is not set -CONFIG_CLK_SUNXI=y -CONFIG_CLK_SUNXI_CLOCKS=y -CONFIG_CLK_SUNXI_PRCM_SUN6I=y -CONFIG_CLK_SUNXI_PRCM_SUN8I=y -CONFIG_CLK_SUNXI_PRCM_SUN9I=y -CONFIG_SUNXI_CCU=y -CONFIG_SUN50I_A64_CCU=y -CONFIG_SUN50I_A100_CCU=y -CONFIG_SUN50I_A100_R_CCU=y -CONFIG_SUN50I_H6_CCU=y -CONFIG_SUN50I_H6_R_CCU=y -# CONFIG_SUN8I_A83T_CCU is not set -CONFIG_SUN8I_H3_CCU=y -CONFIG_SUN8I_DE2_CCU=y -CONFIG_SUN8I_R_CCU=y -CONFIG_HWSPINLOCK=y - -# -# Clock Source drivers -# -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -# CONFIG_FSL_ERRATUM_A008585 is not set -# CONFIG_HISILICON_ERRATUM_161010101 is not set -# CONFIG_ARM64_ERRATUM_858921 is not set -CONFIG_SUN50I_ERRATUM_UNKNOWN1=y -# CONFIG_MICROCHIP_PIT64B is not set -# end of Clock Source drivers - -CONFIG_MAILBOX=y -CONFIG_ARM_MHU=m -CONFIG_PLATFORM_MHU=m -# CONFIG_PL320_MBOX is not set -# CONFIG_ALTERA_MBOX is not set -# CONFIG_MAILBOX_TEST is not set -CONFIG_SUN6I_MSGBOX=m -CONFIG_IOMMU_IOVA=y -CONFIG_IOMMU_API=y -CONFIG_IOMMU_SUPPORT=y - -# -# Generic IOMMU Pagetable Support -# -CONFIG_IOMMU_IO_PGTABLE=y -CONFIG_IOMMU_IO_PGTABLE_LPAE=y -# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# end of Generic IOMMU Pagetable Support - -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -CONFIG_OF_IOMMU=y -CONFIG_IOMMU_DMA=y -# CONFIG_SUN50I_IOMMU is not set -CONFIG_ARM_SMMU=m -CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y -CONFIG_ARM_SMMU_V3=m -# CONFIG_ARM_SMMU_V3_SVA is not set - -# -# Remoteproc drivers -# -# CONFIG_REMOTEPROC is not set -# end of Remoteproc drivers - -# -# Rpmsg drivers -# -# CONFIG_RPMSG_QCOM_GLINK_RPM is not set -# CONFIG_RPMSG_VIRTIO is not set -# end of Rpmsg drivers - -# CONFIG_SOUNDWIRE is not set - -# -# SOC (System On Chip) specific Drivers -# - -# -# Amlogic SoC drivers -# -# end of Amlogic SoC drivers - -# -# Aspeed SoC drivers -# -# end of Aspeed SoC drivers - -# -# Broadcom SoC drivers -# -# CONFIG_SOC_BRCMSTB is not set -# end of Broadcom SoC drivers - -# -# NXP/Freescale QorIQ SoC drivers -# -# CONFIG_QUICC_ENGINE is not set -# CONFIG_FSL_RCPM is not set -# end of NXP/Freescale QorIQ SoC drivers - -# -# i.MX SoC drivers -# -# end of i.MX SoC drivers - -# -# Qualcomm SoC drivers -# -# end of Qualcomm SoC drivers - -CONFIG_SUNXI_SRAM=y -# CONFIG_SOC_TI is not set - -# -# Xilinx SoC drivers -# -# CONFIG_XILINX_VCU is not set -# end of Xilinx SoC drivers -# end of SOC (System On Chip) specific Drivers - -CONFIG_PM_DEVFREQ=y - -# -# DEVFREQ Governors -# -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m -CONFIG_DEVFREQ_GOV_PERFORMANCE=m -CONFIG_DEVFREQ_GOV_POWERSAVE=m -CONFIG_DEVFREQ_GOV_USERSPACE=m -CONFIG_DEVFREQ_GOV_PASSIVE=m - -# -# DEVFREQ Drivers -# -CONFIG_PM_DEVFREQ_EVENT=y -CONFIG_EXTCON=y - -# -# Extcon Device Drivers -# -# CONFIG_EXTCON_ADC_JACK is not set -# CONFIG_EXTCON_FSA9480 is not set -# CONFIG_EXTCON_GPIO is not set -# CONFIG_EXTCON_MAX3355 is not set -# CONFIG_EXTCON_PTN5150 is not set -# CONFIG_EXTCON_RT8973A is not set -# CONFIG_EXTCON_SM5502 is not set -CONFIG_EXTCON_USB_GPIO=m -CONFIG_MEMORY=y -CONFIG_ARM_PL172_MPMC=m -CONFIG_IIO=m -CONFIG_IIO_BUFFER=y -# CONFIG_IIO_BUFFER_CB is not set -# CONFIG_IIO_BUFFER_DMA is not set -# CONFIG_IIO_BUFFER_DMAENGINE is not set -# CONFIG_IIO_BUFFER_HW_CONSUMER is not set -CONFIG_IIO_KFIFO_BUF=m -CONFIG_IIO_TRIGGERED_BUFFER=m -# CONFIG_IIO_CONFIGFS is not set -CONFIG_IIO_TRIGGER=y -CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 -# CONFIG_IIO_SW_DEVICE is not set -# CONFIG_IIO_SW_TRIGGER is not set -# CONFIG_IIO_TRIGGERED_EVENT is not set - -# -# Accelerometers -# -# CONFIG_ADXL345_I2C is not set -# CONFIG_ADXL372_I2C is not set -# CONFIG_BMA180 is not set -# CONFIG_BMA400 is not set -CONFIG_BMC150_ACCEL=m -CONFIG_BMC150_ACCEL_I2C=m -# CONFIG_DA280 is not set -# CONFIG_DA311 is not set -# CONFIG_DMARD06 is not set -# CONFIG_DMARD09 is not set -# CONFIG_DMARD10 is not set -# CONFIG_IIO_ST_ACCEL_3AXIS is not set -# CONFIG_KXSD9 is not set -# CONFIG_KXCJK1013 is not set -# CONFIG_MC3230 is not set -# CONFIG_MMA7455_I2C is not set -# CONFIG_MMA7660 is not set -# CONFIG_MMA8452 is not set -# CONFIG_MMA9551 is not set -# CONFIG_MMA9553 is not set -# CONFIG_MXC4005 is not set -# CONFIG_MXC6255 is not set -# CONFIG_STK8312 is not set -# CONFIG_STK8BA50 is not set -# end of Accelerometers - -# -# Analog to digital converters -# -# CONFIG_AD7091R5 is not set -# CONFIG_AD7291 is not set -# CONFIG_AD7606_IFACE_PARALLEL is not set -# CONFIG_AD799X is not set -# CONFIG_ADI_AXI_ADC is not set -CONFIG_AXP20X_ADC=m -# CONFIG_AXP288_ADC is not set -# CONFIG_CC10001_ADC is not set -# CONFIG_ENVELOPE_DETECTOR is not set -# CONFIG_HX711 is not set -# CONFIG_INA2XX_ADC is not set -# CONFIG_LTC2471 is not set -# CONFIG_LTC2485 is not set -# CONFIG_LTC2497 is not set -# CONFIG_MAX1363 is not set -# CONFIG_MAX9611 is not set -# CONFIG_MCP3422 is not set -# CONFIG_NAU7802 is not set -# CONFIG_QCOM_SPMI_IADC is not set -# CONFIG_QCOM_SPMI_VADC is not set -# CONFIG_QCOM_SPMI_ADC5 is not set -# CONFIG_SD_ADC_MODULATOR is not set -# CONFIG_TI_ADC081C is not set -# CONFIG_TI_ADS1015 is not set -# CONFIG_VF610_ADC is not set -# CONFIG_XILINX_XADC is not set -# end of Analog to digital converters - -# -# Analog Front Ends -# -# CONFIG_IIO_RESCALE is not set -# end of Analog Front Ends - -# -# Amplifiers -# -# CONFIG_HMC425 is not set -# end of Amplifiers - -# -# Chemical Sensors -# -# CONFIG_ATLAS_PH_SENSOR is not set -# CONFIG_ATLAS_EZO_SENSOR is not set -# CONFIG_BME680 is not set -# CONFIG_CCS811 is not set -# CONFIG_IAQCORE is not set -# CONFIG_PMS7003 is not set -# CONFIG_SCD30_CORE is not set -# CONFIG_SENSIRION_SGP30 is not set -# CONFIG_SPS30 is not set -# CONFIG_VZ89X is not set -# end of Chemical Sensors - -# -# Hid Sensor IIO Common -# -# end of Hid Sensor IIO Common - -# -# SSP Sensor Common -# -# end of SSP Sensor Common - -CONFIG_IIO_ST_SENSORS_I2C=m -CONFIG_IIO_ST_SENSORS_CORE=m - -# -# Digital to analog converters -# -# CONFIG_AD5064 is not set -# CONFIG_AD5380 is not set -# CONFIG_AD5446 is not set -# CONFIG_AD5593R is not set -# CONFIG_AD5696_I2C is not set -# CONFIG_DPOT_DAC is not set -# CONFIG_DS4424 is not set -# CONFIG_M62332 is not set -# CONFIG_MAX517 is not set -# CONFIG_MAX5821 is not set -# CONFIG_MCP4725 is not set -# CONFIG_TI_DAC5571 is not set -# CONFIG_VF610_DAC is not set -# end of Digital to analog converters - -# -# IIO dummy driver -# -# end of IIO dummy driver - -# -# Frequency Synthesizers DDS/PLL -# - -# -# Clock Generator/Distribution -# -# end of Clock Generator/Distribution - -# -# Phase-Locked Loop (PLL) frequency synthesizers -# -# end of Phase-Locked Loop (PLL) frequency synthesizers -# end of Frequency Synthesizers DDS/PLL - -# -# Digital gyroscope sensors -# -# CONFIG_BMG160 is not set -# CONFIG_FXAS21002C is not set -# CONFIG_MPU3050_I2C is not set -# CONFIG_IIO_ST_GYRO_3AXIS is not set -# CONFIG_ITG3200 is not set -# end of Digital gyroscope sensors - -# -# Health Sensors -# - -# -# Heart Rate Monitors -# -# CONFIG_AFE4404 is not set -# CONFIG_MAX30100 is not set -# CONFIG_MAX30102 is not set -# end of Heart Rate Monitors -# end of Health Sensors - -# -# Humidity sensors -# -# CONFIG_AM2315 is not set -# CONFIG_DHT11 is not set -# CONFIG_HDC100X is not set -# CONFIG_HDC2010 is not set -# CONFIG_HTS221 is not set -# CONFIG_HTU21 is not set -# CONFIG_SI7005 is not set -# CONFIG_SI7020 is not set -# end of Humidity sensors - -# -# Inertial measurement units -# -# CONFIG_BMI160_I2C is not set -# CONFIG_FXOS8700_I2C is not set -# CONFIG_KMX61 is not set -# CONFIG_INV_ICM42600_I2C is not set -CONFIG_INV_MPU6050_IIO=m -CONFIG_INV_MPU6050_I2C=m -# CONFIG_IIO_ST_LSM6DSX is not set -# end of Inertial measurement units - -# -# Light sensors -# -# CONFIG_ADJD_S311 is not set -# CONFIG_ADUX1020 is not set -# CONFIG_AL3010 is not set -# CONFIG_AL3320A is not set -# CONFIG_APDS9300 is not set -# CONFIG_APDS9960 is not set -# CONFIG_AS73211 is not set -# CONFIG_BH1750 is not set -# CONFIG_BH1780 is not set -# CONFIG_CM32181 is not set -# CONFIG_CM3232 is not set -# CONFIG_CM3323 is not set -# CONFIG_CM3605 is not set -# CONFIG_CM36651 is not set -# CONFIG_GP2AP002 is not set -# CONFIG_GP2AP020A00F is not set -# CONFIG_SENSORS_ISL29018 is not set -# CONFIG_SENSORS_ISL29028 is not set -# CONFIG_ISL29125 is not set -# CONFIG_JSA1212 is not set -# CONFIG_RPR0521 is not set -# CONFIG_LTR501 is not set -# CONFIG_LV0104CS is not set -# CONFIG_MAX44000 is not set -# CONFIG_MAX44009 is not set -# CONFIG_NOA1305 is not set -# CONFIG_OPT3001 is not set -# CONFIG_PA12203001 is not set -# CONFIG_SI1133 is not set -# CONFIG_SI1145 is not set -CONFIG_STK3310=m -# CONFIG_ST_UVIS25 is not set -# CONFIG_TCS3414 is not set -# CONFIG_TCS3472 is not set -# CONFIG_SENSORS_TSL2563 is not set -# CONFIG_TSL2583 is not set -# CONFIG_TSL2772 is not set -# CONFIG_TSL4531 is not set -# CONFIG_US5182D is not set -# CONFIG_VCNL4000 is not set -# CONFIG_VCNL4035 is not set -# CONFIG_VEML6030 is not set -# CONFIG_VEML6070 is not set -# CONFIG_VL6180 is not set -# CONFIG_ZOPT2201 is not set -# end of Light sensors - -# -# Magnetometer sensors -# -# CONFIG_AK8974 is not set -# CONFIG_AK8975 is not set -# CONFIG_AK09911 is not set -# CONFIG_BMC150_MAGN_I2C is not set -# CONFIG_MAG3110 is not set -# CONFIG_MMC35240 is not set -CONFIG_IIO_ST_MAGN_3AXIS=m -CONFIG_IIO_ST_MAGN_I2C_3AXIS=m -# CONFIG_SENSORS_HMC5843_I2C is not set -# CONFIG_SENSORS_RM3100_I2C is not set -# end of Magnetometer sensors - -# -# Multiplexers -# -# CONFIG_IIO_MUX is not set -# end of Multiplexers - -# -# Inclinometer sensors -# -# end of Inclinometer sensors - -# -# Triggers - standalone -# -# CONFIG_IIO_INTERRUPT_TRIGGER is not set -# CONFIG_IIO_SYSFS_TRIGGER is not set -# end of Triggers - standalone - -# -# Linear and angular position sensors -# -# end of Linear and angular position sensors - -# -# Digital potentiometers -# -# CONFIG_AD5272 is not set -# CONFIG_DS1803 is not set -# CONFIG_MAX5432 is not set -# CONFIG_MCP4018 is not set -# CONFIG_MCP4531 is not set -# CONFIG_TPL0102 is not set -# end of Digital potentiometers - -# -# Digital potentiostats -# -# CONFIG_LMP91000 is not set -# end of Digital potentiostats - -# -# Pressure sensors -# -# CONFIG_ABP060MG is not set -# CONFIG_BMP280 is not set -# CONFIG_DLHL60D is not set -# CONFIG_DPS310 is not set -# CONFIG_HP03 is not set -# CONFIG_ICP10100 is not set -# CONFIG_MPL115_I2C is not set -# CONFIG_MPL3115 is not set -# CONFIG_MS5611 is not set -# CONFIG_MS5637 is not set -# CONFIG_IIO_ST_PRESS is not set -# CONFIG_T5403 is not set -# CONFIG_HP206C is not set -# CONFIG_ZPA2326 is not set -# end of Pressure sensors - -# -# Lightning sensors -# -# end of Lightning sensors - -# -# Proximity and distance sensors -# -# CONFIG_ISL29501 is not set -# CONFIG_LIDAR_LITE_V2 is not set -# CONFIG_MB1232 is not set -# CONFIG_PING is not set -# CONFIG_RFD77402 is not set -# CONFIG_SRF04 is not set -# CONFIG_SX9310 is not set -# CONFIG_SX9500 is not set -# CONFIG_SRF08 is not set -# CONFIG_VCNL3020 is not set -# CONFIG_VL53L0X_I2C is not set -# end of Proximity and distance sensors - -# -# Resolver to digital converters -# -# end of Resolver to digital converters - -# -# Temperature sensors -# -# CONFIG_MLX90614 is not set -# CONFIG_MLX90632 is not set -# CONFIG_TMP006 is not set -# CONFIG_TMP007 is not set -# CONFIG_TSYS01 is not set -# CONFIG_TSYS02D is not set -# end of Temperature sensors - -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -# CONFIG_PWM_DEBUG is not set -# CONFIG_PWM_FSL_FTM is not set -# CONFIG_PWM_PCA9685 is not set -CONFIG_PWM_SUN4I=m - -# -# IRQ chip support -# -CONFIG_IRQCHIP=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_MAX_NR=1 -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -# CONFIG_AL_FIC is not set -CONFIG_PARTITION_PERCPU=y -# end of IRQ chip support - -# CONFIG_IPACK_BUS is not set -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_RESET_CONTROLLER=y -# CONFIG_RESET_BRCMSTB_RESCAL is not set -# CONFIG_RESET_INTEL_GW is not set -CONFIG_RESET_SIMPLE=y -CONFIG_RESET_SUNXI=y -# CONFIG_RESET_TI_SYSCON is not set - -# -# PHY Subsystem -# -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PHY_MIPI_DPHY=y -CONFIG_PHY_XGENE=m -# CONFIG_USB_LGM_PHY is not set -CONFIG_PHY_SUN4I_USB=m -CONFIG_PHY_SUN6I_MIPI_DPHY=m -# CONFIG_PHY_SUN9I_USB is not set -# CONFIG_PHY_SUN50I_USB3 is not set -# CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_PHY_CADENCE_TORRENT is not set -# CONFIG_PHY_CADENCE_DPHY is not set -# CONFIG_PHY_CADENCE_SIERRA is not set -# CONFIG_PHY_CADENCE_SALVO is not set -# CONFIG_PHY_FSL_IMX8MQ_USB is not set -# CONFIG_PHY_MIXEL_MIPI_DPHY is not set -# CONFIG_PHY_PXA_28NM_HSIC is not set -# CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_CPCAP_USB is not set -# CONFIG_PHY_MAPPHONE_MDM6600 is not set -# CONFIG_PHY_OCELOT_SERDES is not set -CONFIG_PHY_QCOM_USB_HS=m -# CONFIG_PHY_QCOM_USB_HSIC is not set -CONFIG_PHY_SAMSUNG_USB2=m -# CONFIG_PHY_TUSB1210 is not set -# end of PHY Subsystem - -# CONFIG_POWERCAP is not set -# CONFIG_MCB is not set - -# -# Performance monitor support -# -# CONFIG_ARM_CCI_PMU is not set -# CONFIG_ARM_CCN is not set -# CONFIG_ARM_CMN is not set -CONFIG_ARM_PMU=y -# CONFIG_ARM_DSU_PMU is not set -# CONFIG_ARM_SPE_PMU is not set -# end of Performance monitor support - -CONFIG_RAS=y - -# -# Android -# -CONFIG_ANDROID=y -CONFIG_ANDROID_BINDER_IPC=y -# CONFIG_ANDROID_BINDERFS is not set -CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder" -CONFIG_ANDROID_BINDER_IPC_SELFTEST=y -# end of Android - -# CONFIG_LIBNVDIMM is not set -# CONFIG_DAX is not set -CONFIG_NVMEM=y -# CONFIG_NVMEM_SYSFS is not set -# CONFIG_NVMEM_SPMI_SDAM is not set -CONFIG_NVMEM_SUNXI_SID=m - -# -# HW tracing support -# -# CONFIG_STM is not set -# CONFIG_INTEL_TH is not set -# end of HW tracing support - -# CONFIG_FPGA is not set -# CONFIG_FSI is not set -CONFIG_TEE=m - -# -# TEE drivers -# -CONFIG_OPTEE=m -CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 -# end of TEE drivers - -CONFIG_PM_OPP=y -# CONFIG_SIOX is not set -# CONFIG_SLIMBUS is not set -# CONFIG_INTERCONNECT is not set -# CONFIG_COUNTER is not set -# CONFIG_MOST is not set -# end of Device Drivers - -# -# File systems -# -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_VALIDATE_FS_PARSER=y -CONFIG_FS_IOMAP=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_ASSERT is not set -# CONFIG_BTRFS_FS_REF_VERIFY is not set -# CONFIG_NILFS2_FS is not set -CONFIG_F2FS_FS=y -CONFIG_F2FS_STAT_FS=y -CONFIG_F2FS_FS_XATTR=y -CONFIG_F2FS_FS_POSIX_ACL=y -CONFIG_F2FS_FS_SECURITY=y -# CONFIG_F2FS_CHECK_FS is not set -# CONFIG_F2FS_FAULT_INJECTION is not set -CONFIG_F2FS_FS_COMPRESSION=y -CONFIG_F2FS_FS_LZO=y -CONFIG_F2FS_FS_LZ4=y -CONFIG_F2FS_FS_ZSTD=y -CONFIG_F2FS_FS_LZORLE=y -# CONFIG_FS_DAX is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=y -# CONFIG_EXPORTFS_BLOCK_OPS is not set -CONFIG_FILE_LOCKING=y -CONFIG_MANDATORY_FILE_LOCKING=y -# CONFIG_FS_ENCRYPTION is not set -# CONFIG_FS_VERITY is not set -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_FANOTIFY=y -CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=m -CONFIG_AUTOFS_FS=y -CONFIG_FUSE_FS=m -# CONFIG_CUSE is not set -# CONFIG_VIRTIO_FS is not set -# CONFIG_OVERLAY_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set -# end of Caches - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set -# end of CD-ROM/DVD Filesystems - -# -# DOS/FAT/EXFAT/NT Filesystems -# -CONFIG_FAT_FS=y -# CONFIG_MSDOS_FS is not set -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_FAT_DEFAULT_UTF8 is not set -# CONFIG_EXFAT_FS is not set -# CONFIG_NTFS_FS is not set -# end of DOS/FAT/EXFAT/NT Filesystems - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -# CONFIG_PROC_KCORE is not set -CONFIG_PROC_VMCORE=y -# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_PROC_CHILDREN is not set -CONFIG_KERNFS=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TMPFS_XATTR=y -# CONFIG_TMPFS_INODE64 is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -CONFIG_MEMFD_CREATE=y -CONFIG_ARCH_HAS_GIGANTIC_PAGE=y -CONFIG_CONFIGFS_FS=y -# end of Pseudo filesystems - -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ORANGEFS_FS is not set -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -CONFIG_ECRYPT_FS=m -# CONFIG_ECRYPT_FS_MESSAGING is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_SQUASHFS=m -# CONFIG_SQUASHFS_FILE_CACHE is not set -CONFIG_SQUASHFS_FILE_DIRECT=y -# CONFIG_SQUASHFS_DECOMP_SINGLE is not set -# CONFIG_SQUASHFS_DECOMP_MULTI is not set -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -CONFIG_SQUASHFS_XATTR=y -CONFIG_SQUASHFS_ZLIB=y -# CONFIG_SQUASHFS_LZ4 is not set -# CONFIG_SQUASHFS_LZO is not set -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_ZSTD is not set -# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_EROFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=m -CONFIG_NFS_V2=m -CONFIG_NFS_V3=m -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=m -# CONFIG_NFS_SWAP is not set -CONFIG_NFS_V4_1=y -CONFIG_NFS_V4_2=y -CONFIG_PNFS_FILE_LAYOUT=m -CONFIG_PNFS_BLOCK=m -CONFIG_PNFS_FLEXFILE_LAYOUT=m -CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" -# CONFIG_NFS_V4_1_MIGRATION is not set -CONFIG_NFS_V4_SECURITY_LABEL=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -CONFIG_NFS_DISABLE_UDP_SUPPORT=y -# CONFIG_NFS_V4_2_READ_PLUS is not set -# CONFIG_NFSD is not set -CONFIG_GRACE_PERIOD=m -CONFIG_LOCKD=m -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=m -CONFIG_SUNRPC_GSS=m -CONFIG_SUNRPC_BACKCHANNEL=y -# CONFIG_SUNRPC_DEBUG is not set -# CONFIG_CEPH_FS is not set -CONFIG_CIFS=m -CONFIG_CIFS_STATS2=y -CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -CONFIG_CIFS_DEBUG=y -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set -# CONFIG_CIFS_DFS_UPCALL is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_MAC_ROMAN is not set -# CONFIG_NLS_MAC_CELTIC is not set -# CONFIG_NLS_MAC_CENTEURO is not set -# CONFIG_NLS_MAC_CROATIAN is not set -# CONFIG_NLS_MAC_CYRILLIC is not set -# CONFIG_NLS_MAC_GAELIC is not set -# CONFIG_NLS_MAC_GREEK is not set -# CONFIG_NLS_MAC_ICELAND is not set -# CONFIG_NLS_MAC_INUIT is not set -# CONFIG_NLS_MAC_ROMANIAN is not set -# CONFIG_NLS_MAC_TURKISH is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set -# CONFIG_UNICODE is not set -CONFIG_IO_WQ=y -# end of File systems - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_REQUEST_CACHE is not set -# CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_TRUSTED_KEYS is not set -# CONFIG_ENCRYPTED_KEYS is not set -# CONFIG_KEY_DH_OPERATIONS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -CONFIG_SECURITY=y -CONFIG_SECURITYFS=y -# CONFIG_SECURITY_NETWORK is not set -# CONFIG_SECURITY_PATH is not set -CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set -# CONFIG_STATIC_USERMODEHELPER is not set -# CONFIG_SECURITY_SMACK is not set -# CONFIG_SECURITY_TOMOYO is not set -# CONFIG_SECURITY_APPARMOR is not set -# CONFIG_SECURITY_LOADPIN is not set -# CONFIG_SECURITY_YAMA is not set -# CONFIG_SECURITY_SAFESETID is not set -# CONFIG_SECURITY_LOCKDOWN_LSM is not set -CONFIG_INTEGRITY=y -# CONFIG_INTEGRITY_SIGNATURE is not set -# CONFIG_IMA is not set -# CONFIG_EVM is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_LSM="yama,loadpin,integrity,selinux,smack,tomoyo,apparmor" - -# -# Kernel hardening options -# - -# -# Memory initialization -# -CONFIG_INIT_STACK_NONE=y -# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set -# CONFIG_GCC_PLUGIN_STACKLEAK is not set -# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set -# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set -# end of Memory initialization -# end of Kernel hardening options -# end of Security options - -CONFIG_XOR_BLOCKS=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_SKCIPHER=y -CONFIG_CRYPTO_SKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_KPP=m -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_USER=m -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -# CONFIG_CRYPTO_PCRYPT is not set -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=y -# CONFIG_CRYPTO_TEST is not set -CONFIG_CRYPTO_SIMD=m - -# -# Public-key cryptography -# -CONFIG_CRYPTO_RSA=y -# CONFIG_CRYPTO_DH is not set -CONFIG_CRYPTO_ECC=m -CONFIG_CRYPTO_ECDH=m -# CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set -# CONFIG_CRYPTO_CURVE25519 is not set - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=y -# CONFIG_CRYPTO_CHACHA20POLY1305 is not set -# CONFIG_CRYPTO_AEGIS128 is not set -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_ECHAINIV=y - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set -CONFIG_CRYPTO_CTR=y -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=y -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set -# CONFIG_CRYPTO_PCBC is not set -CONFIG_CRYPTO_XTS=y -# CONFIG_CRYPTO_KEYWRAP is not set -CONFIG_CRYPTO_NHPOLY1305=m -# CONFIG_CRYPTO_ADIANTUM is not set -CONFIG_CRYPTO_ESSIV=y - -# -# Hash modes -# -CONFIG_CRYPTO_CMAC=m -CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_XXHASH=m -CONFIG_CRYPTO_BLAKE2B=m -# CONFIG_CRYPTO_BLAKE2S is not set -CONFIG_CRYPTO_CRCT10DIF=m -CONFIG_CRYPTO_GHASH=y -# CONFIG_CRYPTO_POLY1305 is not set -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=m -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_SHA3=m -CONFIG_CRYPTO_SM3=m -# CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_TI is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=m -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_SALSA20 is not set -CONFIG_CRYPTO_CHACHA20=m -# CONFIG_CRYPTO_SERPENT is not set -CONFIG_CRYPTO_SM4=m -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_LZO=m -# CONFIG_CRYPTO_842 is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set -CONFIG_CRYPTO_ZSTD=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_DRBG_HMAC=y -# CONFIG_CRYPTO_DRBG_HASH is not set -# CONFIG_CRYPTO_DRBG_CTR is not set -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_USER_API_HASH is not set -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -# CONFIG_CRYPTO_USER_API_RNG is not set -# CONFIG_CRYPTO_USER_API_AEAD is not set -# CONFIG_CRYPTO_STATS is not set -CONFIG_CRYPTO_HASH_INFO=y - -# -# Crypto library routines -# -CONFIG_CRYPTO_LIB_AES=y -CONFIG_CRYPTO_LIB_ARC4=m -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=m -CONFIG_CRYPTO_LIB_BLAKE2S=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m -CONFIG_CRYPTO_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m -CONFIG_CRYPTO_LIB_CURVE25519=m -CONFIG_CRYPTO_LIB_DES=m -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 -CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m -CONFIG_CRYPTO_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_ALLWINNER=y -# CONFIG_CRYPTO_DEV_SUN4I_SS is not set -# CONFIG_CRYPTO_DEV_SUN8I_CE is not set -# CONFIG_CRYPTO_DEV_SUN8I_SS is not set -# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set -# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set -# CONFIG_CRYPTO_DEV_CCP is not set -# CONFIG_CRYPTO_DEV_SAFEXCEL is not set -# CONFIG_CRYPTO_DEV_CCREE is not set -# CONFIG_CRYPTO_DEV_HISI_SEC is not set -# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set -CONFIG_ASYMMETRIC_KEY_TYPE=y -CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y -CONFIG_X509_CERTIFICATE_PARSER=y -# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set -CONFIG_PKCS7_MESSAGE_PARSER=y -# CONFIG_PKCS7_TEST_KEY is not set -# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set - -# -# Certificates for signature checking -# -CONFIG_SYSTEM_TRUSTED_KEYRING=y -CONFIG_SYSTEM_TRUSTED_KEYS="" -# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set -# CONFIG_SECONDARY_TRUSTED_KEYRING is not set -# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set -# end of Certificates for signature checking - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_RAID6_PQ_BENCHMARK=y -CONFIG_LINEAR_RANGES=y -# CONFIG_PACKING is not set -CONFIG_BITREVERSE=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_NET_UTILS=y -# CONFIG_CORDIC is not set -# CONFIG_PRIME_NUMBERS is not set -CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_USE_SYM_ANNOTATIONS=y -CONFIG_INDIRECT_PIO=y -CONFIG_CRC_CCITT=m -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=m -CONFIG_CRC_ITU_T=m -CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -CONFIG_CRC7=m -CONFIG_LIBCRC32C=m -# CONFIG_CRC8 is not set -CONFIG_XXHASH=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_RANDOM32_SELFTEST is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=m -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_LZ4_COMPRESS=y -CONFIG_LZ4_DECOMPRESS=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y -CONFIG_XZ_DEC=y -CONFIG_XZ_DEC_X86=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_BCJ=y -# CONFIG_XZ_DEC_TEST is not set -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_LZ4=y -CONFIG_DECOMPRESS_ZSTD=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=y -CONFIG_TEXTSEARCH_BM=y -CONFIG_TEXTSEARCH_FSM=y -CONFIG_XARRAY_MULTI=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_DMA_DECLARE_COHERENT=y -CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y -CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y -CONFIG_SWIOTLB=y -CONFIG_DMA_NONCOHERENT_MMAP=y -CONFIG_DMA_COHERENT_POOL=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_CMA=y -CONFIG_DMA_PERNUMA_CMA=y - -# -# Default contiguous memory area size: -# -CONFIG_CMA_SIZE_MBYTES=256 -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_ALIGNMENT=8 -# CONFIG_DMA_API_DEBUG is not set -CONFIG_SGL_ALLOC=y -CONFIG_CPU_RMAP=y -CONFIG_DQL=y -CONFIG_GLOB=y -# CONFIG_GLOB_SELFTEST is not set -CONFIG_NLATTR=y -CONFIG_CLZ_TAB=y -# CONFIG_IRQ_POLL is not set -CONFIG_MPILIB=y -CONFIG_LIBFDT=y -CONFIG_OID_REGISTRY=y -CONFIG_HAVE_GENERIC_VDSO=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_VDSO_TIME_NS=y -CONFIG_FONT_SUPPORT=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_SG_POOL=y -CONFIG_ARCH_STACKWALK=y -CONFIG_SBITMAP=y -# CONFIG_STRING_SELFTEST is not set -# end of Library routines - -# -# Kernel hacking -# - -# -# printk and dmesg options -# -CONFIG_PRINTK_TIME=y -# CONFIG_PRINTK_CALLER is not set -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 -CONFIG_CONSOLE_LOGLEVEL_QUIET=4 -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DYNAMIC_DEBUG_CORE is not set -CONFIG_SYMBOLIC_ERRNAME=y -CONFIG_DEBUG_BUGVERBOSE=y -# end of printk and dmesg options - -# -# Compile-time checks and compiler options -# -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_INFO_REDUCED is not set -# CONFIG_DEBUG_INFO_COMPRESSED is not set -# CONFIG_DEBUG_INFO_SPLIT is not set -# CONFIG_DEBUG_INFO_DWARF4 is not set -# CONFIG_DEBUG_INFO_BTF is not set -# CONFIG_GDB_SCRIPTS is not set -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=2048 -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_READABLE_ASM is not set -# CONFIG_HEADERS_INSTALL is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_SECTION_MISMATCH_WARN_ONLY=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_FRAME_POINTER=y -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# end of Compile-time checks and compiler options - -# -# Generic Kernel Debugging Instruments -# -# CONFIG_MAGIC_SYSRQ is not set -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_FS_ALLOW_ALL=y -# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set -# CONFIG_DEBUG_FS_ALLOW_NONE is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y -# CONFIG_UBSAN is not set -# end of Generic Kernel Debugging Instruments - -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MISC=y - -# -# Memory Debugging -# -# CONFIG_PAGE_EXTENSION is not set -# CONFIG_DEBUG_PAGEALLOC is not set -# CONFIG_PAGE_OWNER is not set -# CONFIG_PAGE_POISONING is not set -# CONFIG_DEBUG_RODATA_TEST is not set -CONFIG_ARCH_HAS_DEBUG_WX=y -# CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y -# CONFIG_PTDUMP_DEBUGFS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_HAVE_DEBUG_KMEMLEAK=y -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_SCHED_STACK_END_CHECK is not set -CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_VM_PGTABLE is not set -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -# CONFIG_DEBUG_VIRTUAL is not set -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_PER_CPU_MAPS is not set -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y -CONFIG_CC_HAS_KASAN_GENERIC=y -CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y -# CONFIG_KASAN is not set -# end of Memory Debugging - -# CONFIG_DEBUG_SHIRQ is not set - -# -# Debug Oops, Lockups and Hangs -# -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -# CONFIG_SOFTLOCKUP_DETECTOR is not set -# CONFIG_DETECT_HUNG_TASK is not set -# CONFIG_WQ_WATCHDOG is not set -# CONFIG_TEST_LOCKUP is not set -# end of Debug Oops, Lockups and Hangs - -# -# Scheduler Debugging -# -# CONFIG_SCHED_DEBUG is not set -CONFIG_SCHED_INFO=y -# CONFIG_SCHEDSTATS is not set -# end of Scheduler Debugging - -# CONFIG_DEBUG_TIMEKEEPING is not set - -# -# Lock Debugging (spinlocks, mutexes, etc...) -# -CONFIG_LOCK_DEBUGGING_SUPPORT=y -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set -# CONFIG_DEBUG_RWSEMS is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_DEBUG_ATOMIC_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_LOCK_TORTURE_TEST is not set -# CONFIG_WW_MUTEX_SELFTEST is not set -# CONFIG_SCF_TORTURE_TEST is not set -# CONFIG_CSD_LOCK_WAIT_DEBUG is not set -# end of Lock Debugging (spinlocks, mutexes, etc...) - -# CONFIG_STACKTRACE is not set -# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_HAVE_DEBUG_BUGVERBOSE=y - -# -# Debug kernel data structures -# -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_PLIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_BUG_ON_DATA_CORRUPTION is not set -# end of Debug kernel data structures - -# CONFIG_DEBUG_CREDENTIALS is not set - -# -# RCU Debugging -# -# CONFIG_RCU_SCALE_TEST is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_REF_SCALE_TEST is not set -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# CONFIG_RCU_TRACE is not set -# CONFIG_RCU_EQS_DEBUG is not set -# end of RCU Debugging - -# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -# CONFIG_LATENCYTOP is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_SAMPLES is not set -CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y -CONFIG_STRICT_DEVMEM=y -# CONFIG_IO_STRICT_DEVMEM is not set - -# -# arm64 Debugging -# -# CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_ARM64_RELOC_TEST is not set -# CONFIG_CORESIGHT is not set -# end of arm64 Debugging - -# -# Kernel Testing and Coverage -# -# CONFIG_KUNIT is not set -# CONFIG_NOTIFIER_ERROR_INJECTION is not set -# CONFIG_FAULT_INJECTION is not set -CONFIG_ARCH_HAS_KCOV=y -CONFIG_CC_HAS_SANCOV_TRACE_PC=y -# CONFIG_KCOV is not set -CONFIG_RUNTIME_TESTING_MENU=y -# CONFIG_LKDTM is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_TEST_MIN_HEAP is not set -# CONFIG_TEST_SORT is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_RBTREE_TEST is not set -# CONFIG_REED_SOLOMON_TEST is not set -# CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_PERCPU_TEST is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_TEST_HEXDUMP is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_STRSCPY is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_BITMAP is not set -# CONFIG_TEST_UUID is not set -# CONFIG_TEST_XARRAY is not set -# CONFIG_TEST_OVERFLOW is not set -# CONFIG_TEST_RHASHTABLE is not set -# CONFIG_TEST_HASH is not set -# CONFIG_TEST_IDA is not set -# CONFIG_TEST_LKM is not set -# CONFIG_TEST_BITOPS is not set -# CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set -# CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set -# CONFIG_FIND_BIT_BENCHMARK is not set -# CONFIG_TEST_FIRMWARE is not set -# CONFIG_TEST_SYSCTL is not set -# CONFIG_TEST_UDELAY is not set -# CONFIG_TEST_STATIC_KEYS is not set -# CONFIG_TEST_KMOD is not set -# CONFIG_TEST_MEMCAT_P is not set -# CONFIG_TEST_STACKINIT is not set -# CONFIG_TEST_MEMINIT is not set -# CONFIG_TEST_FREE_PAGES is not set -CONFIG_MEMTEST=y -# end of Kernel Testing and Coverage -# end of Kernel hacking diff --git a/sys-kernel/pinephone-sources/files/config-5.10.15 b/sys-kernel/pinephone-sources/files/config-5.10.15 deleted file mode 100644 index b062550..0000000 --- a/sys-kernel/pinephone-sources/files/config-5.10.15 +++ /dev/null @@ -1,5737 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.10.15 Kernel Configuration -# -CONFIG_CC_VERSION_TEXT="aarch64-unknown-linux-gnu-gcc (Gentoo 10.2.0-r5 p6) 10.2.0" -CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=100200 -CONFIG_LD_VERSION=235020000 -CONFIG_CLANG_VERSION=0 -CONFIG_LLD_VERSION=0 -CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y -CONFIG_CC_HAS_ASM_GOTO=y -CONFIG_CC_HAS_ASM_INLINE=y -CONFIG_IRQ_WORK=y -CONFIG_BUILDTIME_TABLE_SORT=y -CONFIG_THREAD_INFO_IN_TASK=y - -# -# General setup -# -CONFIG_INIT_ENV_ARG_LIMIT=32 -# CONFIG_COMPILE_TEST is not set -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_BUILD_SALT="" -CONFIG_DEFAULT_INIT="" -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_WATCH_QUEUE is not set -CONFIG_CROSS_MEMORY_ATTACH=y -# CONFIG_USELIB is not set -# CONFIG_AUDIT is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y -CONFIG_GENERIC_IRQ_IPI=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_IRQ_MSI_IOMMU=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_SPARSE_IRQ=y -# CONFIG_GENERIC_IRQ_DEBUGFS is not set -# end of IRQ subsystem - -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y - -# -# Timers subsystem -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ_COMMON=y -# CONFIG_HZ_PERIODIC is not set -CONFIG_NO_HZ_IDLE=y -# CONFIG_NO_HZ_FULL is not set -# CONFIG_NO_HZ is not set -CONFIG_HIGH_RES_TIMERS=y -# end of Timers subsystem - -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set - -# -# CPU/Task time and stats accounting -# -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_PSI is not set -# end of CPU/Task time and stats accounting - -CONFIG_CPU_ISOLATION=y - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_RCU_EXPERT is not set -CONFIG_SRCU=y -CONFIG_TREE_SRCU=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RCU_NEED_SEGCBLIST=y -# end of RCU Subsystem - -CONFIG_IKCONFIG=m -CONFIG_IKCONFIG_PROC=y -# CONFIG_IKHEADERS is not set -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 -CONFIG_GENERIC_SCHED_CLOCK=y - -# -# Scheduler features -# -# CONFIG_UCLAMP_TASK is not set -# end of Scheduler features - -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_CC_HAS_INT128=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_NUMA_BALANCING=y -CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y -CONFIG_CGROUPS=y -CONFIG_PAGE_COUNTER=y -CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_KMEM=y -CONFIG_BLK_CGROUP=y -CONFIG_CGROUP_WRITEBACK=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_CFS_BANDWIDTH is not set -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_CGROUP_PIDS=y -# CONFIG_CGROUP_RDMA is not set -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_HUGETLB=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_PERF=y -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_TIME_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -# CONFIG_CHECKPOINT_RESTORE is not set -CONFIG_SCHED_AUTOGROUP=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_RD_XZ=y -CONFIG_RD_LZO=y -CONFIG_RD_LZ4=y -CONFIG_RD_ZSTD=y -# CONFIG_BOOT_CONFIG is not set -CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_LD_ORPHAN_WARN=y -CONFIG_SYSCTL=y -CONFIG_HAVE_UID16=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_BPF=y -# CONFIG_EXPERT is not set -CONFIG_UID16=y -CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_FHANDLE=y -CONFIG_POSIX_TIMERS=y -CONFIG_PRINTK=y -CONFIG_PRINTK_NMI=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_FUTEX_PI=y -CONFIG_HAVE_FUTEX_CMPXCHG=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_IO_URING=y -CONFIG_ADVISE_SYSCALLS=y -CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -# CONFIG_BPF_SYSCALL is not set -CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y -CONFIG_BPF_JIT_DEFAULT_ON=y -# CONFIG_USERFAULTFD is not set -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_RSEQ=y -# CONFIG_EMBEDDED is not set -CONFIG_HAVE_PERF_EVENTS=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# end of Kernel Performance Events And Counters - -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -CONFIG_SLAB_MERGE_DEFAULT=y -# CONFIG_SLAB_FREELIST_RANDOM is not set -# CONFIG_SLAB_FREELIST_HARDENED is not set -# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set -CONFIG_SLUB_CPU_PARTIAL=y -CONFIG_SYSTEM_DATA_VERIFICATION=y -CONFIG_PROFILING=y -# end of General setup - -CONFIG_ARM64=y -CONFIG_64BIT=y -CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_CONT_PTE_SHIFT=4 -CONFIG_ARM64_CONT_PMD_SHIFT=4 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=33 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 -CONFIG_NO_IOPORT_MAP=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_ZONE_DMA32=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_SMP=y -CONFIG_KERNEL_MODE_NEON=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_PGTABLE_LEVELS=4 -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_PROC_KCORE_TEXT=y - -# -# Platform selection -# -# CONFIG_ARCH_ACTIONS is not set -# CONFIG_ARCH_AGILEX is not set -CONFIG_ARCH_SUNXI=y -# CONFIG_ARCH_ALPINE is not set -# CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM_IPROC is not set -# CONFIG_ARCH_BERLIN is not set -# CONFIG_ARCH_BITMAIN is not set -# CONFIG_ARCH_BRCMSTB is not set -# CONFIG_ARCH_EXYNOS is not set -# CONFIG_ARCH_SPARX5 is not set -# CONFIG_ARCH_K3 is not set -# CONFIG_ARCH_LAYERSCAPE is not set -# CONFIG_ARCH_LG1K is not set -# CONFIG_ARCH_HISI is not set -# CONFIG_ARCH_KEEMBAY is not set -# CONFIG_ARCH_MEDIATEK is not set -# CONFIG_ARCH_MESON is not set -# CONFIG_ARCH_MVEBU is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_REALTEK is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_ROCKCHIP is not set -# CONFIG_ARCH_S32 is not set -# CONFIG_ARCH_SEATTLE is not set -# CONFIG_ARCH_STRATIX10 is not set -# CONFIG_ARCH_SYNQUACER is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_SPRD is not set -# CONFIG_ARCH_THUNDER is not set -# CONFIG_ARCH_THUNDER2 is not set -# CONFIG_ARCH_UNIPHIER is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_VISCONTI is not set -# CONFIG_ARCH_XGENE is not set -# CONFIG_ARCH_ZX is not set -# CONFIG_ARCH_ZYNQMP is not set -# end of Platform selection - -# -# Kernel Features -# - -# -# ARM errata workarounds via the alternatives framework -# -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_845719=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_1024718=y -CONFIG_ARM64_ERRATUM_1418040=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1319367=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_ERRATUM_1463225=y -CONFIG_ARM64_ERRATUM_1542419=y -CONFIG_ARM64_ERRATUM_1508412=y -CONFIG_CAVIUM_ERRATUM_22375=y -CONFIG_CAVIUM_ERRATUM_23144=y -CONFIG_CAVIUM_ERRATUM_23154=y -CONFIG_CAVIUM_ERRATUM_27456=y -CONFIG_CAVIUM_ERRATUM_30115=y -CONFIG_CAVIUM_TX2_ERRATUM_219=y -CONFIG_FUJITSU_ERRATUM_010001=y -CONFIG_HISILICON_ERRATUM_161600802=y -CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_QCOM_FALKOR_ERRATUM_1009=y -CONFIG_QCOM_QDF2400_ERRATUM_0065=y -CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y -# end of ARM errata workarounds via the alternatives framework - -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_16K_PAGES is not set -# CONFIG_ARM64_64K_PAGES is not set -# CONFIG_ARM64_VA_BITS_39 is not set -CONFIG_ARM64_VA_BITS_48=y -CONFIG_ARM64_VA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PA_BITS=48 -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SCHED_MC=y -# CONFIG_SCHED_SMT is not set -CONFIG_NR_CPUS=64 -CONFIG_HOTPLUG_CPU=y -CONFIG_NUMA=y -CONFIG_NODES_SHIFT=2 -CONFIG_USE_PERCPU_NUMA_NODE_ID=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_300 is not set -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_SCHED_HRTICK=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HW_PERF_EVENTS=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_PARAVIRT=y -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set -CONFIG_KEXEC=y -# CONFIG_KEXEC_FILE is not set -CONFIG_CRASH_DUMP=y -CONFIG_XEN_DOM0=y -CONFIG_XEN=y -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_COMPAT=y -CONFIG_KUSER_HELPERS=y -# CONFIG_ARMV8_DEPRECATED is not set - -# -# ARMv8.1 architectural features -# -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_PAN=y -CONFIG_ARM64_LSE_ATOMICS=y -CONFIG_ARM64_USE_LSE_ATOMICS=y -CONFIG_ARM64_VHE=y -# end of ARMv8.1 architectural features - -# -# ARMv8.2 architectural features -# -CONFIG_ARM64_UAO=y -# CONFIG_ARM64_PMEM is not set -CONFIG_ARM64_RAS_EXTN=y -CONFIG_ARM64_CNP=y -# end of ARMv8.2 architectural features - -# -# ARMv8.3 architectural features -# -CONFIG_ARM64_PTR_AUTH=y -CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y -CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y -CONFIG_AS_HAS_PAC=y -CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y -# end of ARMv8.3 architectural features - -# -# ARMv8.4 architectural features -# -CONFIG_ARM64_AMU_EXTN=y -CONFIG_AS_HAS_ARMV8_4=y -CONFIG_ARM64_TLB_RANGE=y -# end of ARMv8.4 architectural features - -# -# ARMv8.5 architectural features -# -CONFIG_ARM64_BTI=y -CONFIG_ARM64_BTI_KERNEL=y -CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y -CONFIG_ARM64_E0PD=y -CONFIG_ARCH_RANDOM=y -CONFIG_ARM64_AS_HAS_MTE=y -CONFIG_ARM64_MTE=y -# end of ARMv8.5 architectural features - -CONFIG_ARM64_SVE=y -CONFIG_ARM64_MODULE_PLTS=y -# CONFIG_ARM64_PSEUDO_NMI is not set -CONFIG_RELOCATABLE=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_STACKPROTECTOR_PER_TASK=y -# end of Kernel Features - -# -# Boot options -# -CONFIG_CMDLINE="console=ttyAMA0" -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_EFI is not set -# end of Boot options - -CONFIG_SYSVIPC_COMPAT=y -CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y -CONFIG_ARCH_ENABLE_THP_MIGRATION=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HIBERNATION=y -CONFIG_HIBERNATION_SNAPSHOT_DEV=y -CONFIG_PM_STD_PARTITION="" -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_PM_AUTOSLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_WAKELOCKS_LIMIT=100 -CONFIG_PM_WAKELOCKS_GC=y -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_CPU_PM=y -CONFIG_ENERGY_MODEL=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_HIBERNATION_HEADER=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# end of Power management options - -# -# CPU Power Management -# - -# -# CPU Idle -# -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y -# CONFIG_CPU_IDLE_GOV_LADDER is not set -CONFIG_CPU_IDLE_GOV_MENU=y -# CONFIG_CPU_IDLE_GOV_TEO is not set -CONFIG_DT_IDLE_STATES=y - -# -# ARM CPU Idle Drivers -# -CONFIG_ARM_CPUIDLE=y -# CONFIG_ARM_PSCI_CPUIDLE is not set -# end of ARM CPU Idle Drivers -# end of CPU Idle - -# -# CPU Frequency scaling -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y - -# -# CPU frequency scaling drivers -# -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -# CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is not set -CONFIG_ARM_SCPI_CPUFREQ=y -# end of CPU Frequency scaling -# end of CPU Power Management - -# -# Firmware Drivers -# -# CONFIG_ARM_SCMI_PROTOCOL is not set -CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y -# CONFIG_ARM_SDE_INTERFACE is not set -# CONFIG_GOOGLE_FIRMWARE is not set -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_PSCI_CHECKER is not set -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y -CONFIG_ARM_SMCCC_SOC_ID=y - -# -# Tegra firmware driver -# -# end of Tegra firmware driver -# end of Firmware Drivers - -# CONFIG_VIRTUALIZATION is not set -CONFIG_ARM64_CRYPTO=y -CONFIG_CRYPTO_SHA256_ARM64=m -CONFIG_CRYPTO_SHA512_ARM64=m -CONFIG_CRYPTO_SHA1_ARM64_CE=m -CONFIG_CRYPTO_SHA2_ARM64_CE=m -CONFIG_CRYPTO_SHA512_ARM64_CE=m -CONFIG_CRYPTO_SHA3_ARM64=m -CONFIG_CRYPTO_SM3_ARM64_CE=m -CONFIG_CRYPTO_SM4_ARM64_CE=m -CONFIG_CRYPTO_GHASH_ARM64_CE=m -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m -CONFIG_CRYPTO_AES_ARM64=m -CONFIG_CRYPTO_AES_ARM64_CE=m -CONFIG_CRYPTO_AES_ARM64_CE_CCM=m -CONFIG_CRYPTO_AES_ARM64_CE_BLK=m -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m -CONFIG_CRYPTO_CHACHA20_NEON=m -CONFIG_CRYPTO_POLY1305_NEON=m -CONFIG_CRYPTO_NHPOLY1305_NEON=m -CONFIG_CRYPTO_AES_ARM64_BS=m - -# -# General architecture-dependent options -# -CONFIG_CRASH_CORE=y -CONFIG_KEXEC_CORE=y -CONFIG_SET_FS=y -# CONFIG_KPROBES is not set -CONFIG_JUMP_LABEL=y -# CONFIG_STATIC_KEYS_SELFTEST is not set -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y -CONFIG_HAVE_NMI=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_KEEPINITRD=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SET_DIRECT_MAP=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ASM_MODVERSIONS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y -CONFIG_MMU_GATHER_TABLE_FREE=y -CONFIG_MMU_GATHER_RCU_TABLE_FREE=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_HAVE_ARCH_SECCOMP=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_SECCOMP=y -CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_STACKLEAK=y -CONFIG_HAVE_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR_STRONG=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MOVE_PMD=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_HAVE_ARCH_MMAP_RND_BITS=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 -CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_COMPAT_OLD_SIGACTION=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_VMAP_STACK=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_STRICT_MODULE_RWX=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -# CONFIG_LOCK_EVENT_COUNTS is not set -CONFIG_ARCH_HAS_RELR=y -CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -# end of GCOV-based kernel profiling - -CONFIG_HAVE_GCC_PLUGINS=y -CONFIG_GCC_PLUGINS=y -# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set -# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set -# end of General architecture-dependent options - -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -# CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -CONFIG_MODULE_COMPRESS_XZ=y -# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_TRIM_UNUSED_KSYMS is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_BLOCK=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BLK_CGROUP_RWSTAT=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=m -# CONFIG_BLK_DEV_ZONED is not set -# CONFIG_BLK_DEV_THROTTLING is not set -# CONFIG_BLK_CMDLINE_PARSER is not set -# CONFIG_BLK_WBT is not set -# CONFIG_BLK_CGROUP_IOLATENCY is not set -# CONFIG_BLK_CGROUP_IOCOST is not set -CONFIG_BLK_DEBUG_FS=y -# CONFIG_BLK_SED_OPAL is not set -# CONFIG_BLK_INLINE_ENCRYPTION is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -CONFIG_EFI_PARTITION=y -# end of Partition Types - -CONFIG_BLOCK_COMPAT=y -CONFIG_BLK_PM=y - -# -# IO Schedulers -# -CONFIG_MQ_IOSCHED_DEADLINE=m -CONFIG_MQ_IOSCHED_KYBER=m -CONFIG_IOSCHED_BFQ=m -CONFIG_BFQ_GROUP_IOSCHED=y -CONFIG_BFQ_CGROUP_DEBUG=y -# end of IO Schedulers - -CONFIG_ASN1=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQ=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_FREEZER=y - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_HAVE_ELF_PROT=y -CONFIG_ARCH_USE_GNU_PROPERTY=y -CONFIG_ELFCORE=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_BINFMT_SCRIPT=y -# CONFIG_BINFMT_MISC is not set -CONFIG_COREDUMP=y -# end of Executable file formats - -# -# Memory Management options -# -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM=y -CONFIG_NEED_MULTIPLE_NODES=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MEMORY_HOTPLUG is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -# CONFIG_PAGE_REPORTING is not set -CONFIG_MIGRATION=y -CONFIG_CONTIG_ALLOC=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_BOUNCE=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_MEMORY_FAILURE=y -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -# CONFIG_CLEANCACHE is not set -CONFIG_FRONTSWAP=y -CONFIG_CMA=y -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_AREAS=7 -CONFIG_ZSWAP=y -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set -CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y -CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd" -CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y -# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set -# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set -CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" -# CONFIG_ZSWAP_DEFAULT_ON is not set -CONFIG_ZPOOL=y -CONFIG_ZBUD=y -# CONFIG_Z3FOLD is not set -CONFIG_ZSMALLOC=m -# CONFIG_ZSMALLOC_STAT is not set -CONFIG_GENERIC_EARLY_IOREMAP=y -# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set -# CONFIG_IDLE_PAGE_TRACKING is not set -CONFIG_ARCH_HAS_PTE_DEVMAP=y -CONFIG_FRAME_VECTOR=y -CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y -# CONFIG_PERCPU_STATS is not set -# CONFIG_GUP_BENCHMARK is not set -# CONFIG_READ_ONLY_THP_FOR_FS is not set -CONFIG_ARCH_HAS_PTE_SPECIAL=y -# end of Memory Management options - -CONFIG_NET=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_NET_INGRESS=y -CONFIG_SKB_EXTENSIONS=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set -CONFIG_UNIX=y -CONFIG_UNIX_SCM=y -# CONFIG_UNIX_DIAG is not set -# CONFIG_TLS is not set -CONFIG_XFRM=y -CONFIG_XFRM_ALGO=y -CONFIG_XFRM_USER=y -# CONFIG_XFRM_INTERFACE is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_AH=m -CONFIG_XFRM_ESP=y -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -# CONFIG_IP_FIB_TRIE_STATS is not set -CONFIG_IP_MULTIPLE_TABLES=y -# CONFIG_IP_ROUTE_MULTIPATH is not set -# CONFIG_IP_ROUTE_VERBOSE is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE_DEMUX is not set -CONFIG_NET_IP_TUNNEL=m -# CONFIG_IP_MROUTE is not set -CONFIG_SYN_COOKIES=y -# CONFIG_NET_IPVTI is not set -CONFIG_NET_UDP_TUNNEL=m -# CONFIG_NET_FOU is not set -# CONFIG_NET_FOU_IP_TUNNELS is not set -# CONFIG_INET_AH is not set -CONFIG_INET_ESP=y -# CONFIG_INET_ESP_OFFLOAD is not set -# CONFIG_INET_ESPINTCP is not set -# CONFIG_INET_IPCOMP is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_INET_UDP_DIAG is not set -# CONFIG_INET_RAW_DIAG is not set -CONFIG_INET_DIAG_DESTROY=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_IPV6_ROUTE_INFO=y -CONFIG_IPV6_OPTIMISTIC_DAD=y -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -# CONFIG_INET6_ESP_OFFLOAD is not set -# CONFIG_INET6_ESPINTCP is not set -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -# CONFIG_IPV6_ILA is not set -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -# CONFIG_IPV6_VTI is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -# CONFIG_IPV6_SUBTREES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_IPV6_SEG6_LWTUNNEL is not set -# CONFIG_IPV6_SEG6_HMAC is not set -# CONFIG_IPV6_RPL_LWTUNNEL is not set -# CONFIG_NETLABEL is not set -# CONFIG_MPTCP is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -CONFIG_NETFILTER=y -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=m - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_INGRESS=y -CONFIG_NETFILTER_NETLINK=y -CONFIG_NETFILTER_FAMILY_BRIDGE=y -CONFIG_NETFILTER_FAMILY_ARP=y -# CONFIG_NETFILTER_NETLINK_ACCT is not set -CONFIG_NETFILTER_NETLINK_QUEUE=y -CONFIG_NETFILTER_NETLINK_LOG=y -CONFIG_NETFILTER_NETLINK_OSF=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_LOG_COMMON=y -# CONFIG_NF_LOG_NETDEV is not set -CONFIG_NETFILTER_CONNCOUNT=m -CONFIG_NF_CONNTRACK_MARK=y -# CONFIG_NF_CONNTRACK_ZONES is not set -CONFIG_NF_CONNTRACK_PROCFS=y -CONFIG_NF_CONNTRACK_EVENTS=y -# CONFIG_NF_CONNTRACK_TIMEOUT is not set -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -# CONFIG_NF_CONNTRACK_LABELS is not set -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_GRE=y -CONFIG_NF_CT_PROTO_SCTP=y -CONFIG_NF_CT_PROTO_UDPLITE=y -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -# CONFIG_NF_CONNTRACK_SNMP is not set -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -# CONFIG_NF_CONNTRACK_SIP is not set -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set -CONFIG_NF_NAT=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_REDIRECT=y -CONFIG_NF_NAT_MASQUERADE=y -CONFIG_NETFILTER_SYNPROXY=m -CONFIG_NF_TABLES=m -CONFIG_NF_TABLES_INET=y -CONFIG_NF_TABLES_NETDEV=y -CONFIG_NFT_NUMGEN=m -CONFIG_NFT_CT=m -CONFIG_NFT_COUNTER=m -CONFIG_NFT_CONNLIMIT=m -CONFIG_NFT_LOG=m -CONFIG_NFT_LIMIT=m -CONFIG_NFT_MASQ=m -CONFIG_NFT_REDIR=m -CONFIG_NFT_NAT=m -CONFIG_NFT_TUNNEL=m -CONFIG_NFT_OBJREF=m -# CONFIG_NFT_QUEUE is not set -CONFIG_NFT_QUOTA=m -CONFIG_NFT_REJECT=m -CONFIG_NFT_REJECT_INET=m -CONFIG_NFT_COMPAT=m -CONFIG_NFT_HASH=m -# CONFIG_NFT_XFRM is not set -CONFIG_NFT_SOCKET=m -CONFIG_NFT_OSF=m -CONFIG_NFT_TPROXY=m -CONFIG_NFT_SYNPROXY=m -CONFIG_NF_DUP_NETDEV=m -CONFIG_NFT_DUP_NETDEV=m -CONFIG_NFT_FWD_NETDEV=m -# CONFIG_NF_FLOW_TABLE is not set -CONFIG_NETFILTER_XTABLES=y - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=y -CONFIG_NETFILTER_XT_CONNMARK=m -CONFIG_NETFILTER_XT_SET=m - -# -# Xtables targets -# -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -# CONFIG_NETFILTER_XT_TARGET_CT is not set -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -# CONFIG_NETFILTER_XT_TARGET_HL is not set -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_LOG=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_NAT=m -CONFIG_NETFILTER_XT_TARGET_NETMAP=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set -CONFIG_NETFILTER_XT_TARGET_REDIRECT=m -CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -CONFIG_NETFILTER_XT_TARGET_TPROXY=m -CONFIG_NETFILTER_XT_TARGET_TRACE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_DSCP is not set -CONFIG_NETFILTER_XT_MATCH_ECN=y -# CONFIG_NETFILTER_XT_MATCH_ESP is not set -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=y -# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -# CONFIG_NETFILTER_XT_MATCH_L2TP is not set -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_RECENT is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -CONFIG_NETFILTER_XT_MATCH_SOCKET=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=y -CONFIG_NETFILTER_XT_MATCH_STRING=y -# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set -CONFIG_NETFILTER_XT_MATCH_TIME=y -CONFIG_NETFILTER_XT_MATCH_U32=y -# end of Core Netfilter Configuration - -CONFIG_IP_SET=m -CONFIG_IP_SET_MAX=256 -CONFIG_IP_SET_BITMAP_IP=m -CONFIG_IP_SET_BITMAP_IPMAC=m -CONFIG_IP_SET_BITMAP_PORT=m -CONFIG_IP_SET_HASH_IP=m -CONFIG_IP_SET_HASH_IPMARK=m -CONFIG_IP_SET_HASH_IPPORT=m -CONFIG_IP_SET_HASH_IPPORTIP=m -CONFIG_IP_SET_HASH_IPPORTNET=m -CONFIG_IP_SET_HASH_IPMAC=m -CONFIG_IP_SET_HASH_MAC=m -CONFIG_IP_SET_HASH_NETPORTNET=m -CONFIG_IP_SET_HASH_NET=m -CONFIG_IP_SET_HASH_NETNET=m -CONFIG_IP_SET_HASH_NETPORT=m -CONFIG_IP_SET_HASH_NETIFACE=m -CONFIG_IP_SET_LIST_SET=m -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_SOCKET_IPV4=y -CONFIG_NF_TPROXY_IPV4=y -CONFIG_NF_TABLES_IPV4=y -CONFIG_NFT_REJECT_IPV4=m -# CONFIG_NFT_DUP_IPV4 is not set -# CONFIG_NFT_FIB_IPV4 is not set -# CONFIG_NF_TABLES_ARP is not set -# CONFIG_NF_DUP_IPV4 is not set -# CONFIG_NF_LOG_ARP is not set -CONFIG_NF_LOG_IPV4=y -CONFIG_NF_REJECT_IPV4=y -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_IP_NF_IPTABLES=y -CONFIG_IP_NF_MATCH_AH=y -CONFIG_IP_NF_MATCH_ECN=y -# CONFIG_IP_NF_MATCH_RPFILTER is not set -CONFIG_IP_NF_MATCH_TTL=y -CONFIG_IP_NF_FILTER=y -CONFIG_IP_NF_TARGET_REJECT=y -# CONFIG_IP_NF_TARGET_SYNPROXY is not set -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_IP_NF_MANGLE=y -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set -# CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_TTL is not set -CONFIG_IP_NF_RAW=y -CONFIG_IP_NF_SECURITY=y -CONFIG_IP_NF_ARPTABLES=y -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m -# end of IP: Netfilter Configuration - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_SOCKET_IPV6=m -CONFIG_NF_TPROXY_IPV6=m -CONFIG_NF_TABLES_IPV6=y -CONFIG_NFT_REJECT_IPV6=m -# CONFIG_NFT_DUP_IPV6 is not set -# CONFIG_NFT_FIB_IPV6 is not set -# CONFIG_NF_DUP_IPV6 is not set -CONFIG_NF_REJECT_IPV6=m -CONFIG_NF_LOG_IPV6=m -CONFIG_IP6_NF_IPTABLES=m -# CONFIG_IP6_NF_MATCH_AH is not set -# CONFIG_IP6_NF_MATCH_EUI64 is not set -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_HL is not set -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -# CONFIG_IP6_NF_MATCH_MH is not set -# CONFIG_IP6_NF_MATCH_RPFILTER is not set -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_MATCH_SRH is not set -# CONFIG_IP6_NF_TARGET_HL is not set -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -# CONFIG_IP6_NF_TARGET_SYNPROXY is not set -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_IP6_NF_SECURITY is not set -# CONFIG_IP6_NF_NAT is not set -# end of IPv6: Netfilter Configuration - -CONFIG_NF_DEFRAG_IPV6=m -# CONFIG_NF_TABLES_BRIDGE is not set -# CONFIG_NF_CONNTRACK_BRIDGE is not set -# CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_L2TP is not set -CONFIG_STP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -CONFIG_BRIDGE_VLAN_FILTERING=y -# CONFIG_BRIDGE_MRP is not set -CONFIG_HAVE_NET_DSA=y -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -# CONFIG_VLAN_8021Q_GVRP is not set -# CONFIG_VLAN_8021Q_MVRP is not set -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_PHONET is not set -# CONFIG_6LOWPAN is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -# CONFIG_NET_SCH_CBQ is not set -CONFIG_NET_SCH_HTB=m -# CONFIG_NET_SCH_HFSC is not set -# CONFIG_NET_SCH_PRIO is not set -# CONFIG_NET_SCH_MULTIQ is not set -# CONFIG_NET_SCH_RED is not set -# CONFIG_NET_SCH_SFB is not set -# CONFIG_NET_SCH_SFQ is not set -# CONFIG_NET_SCH_TEQL is not set -# CONFIG_NET_SCH_TBF is not set -# CONFIG_NET_SCH_CBS is not set -# CONFIG_NET_SCH_ETF is not set -# CONFIG_NET_SCH_TAPRIO is not set -# CONFIG_NET_SCH_GRED is not set -# CONFIG_NET_SCH_DSMARK is not set -# CONFIG_NET_SCH_NETEM is not set -# CONFIG_NET_SCH_DRR is not set -# CONFIG_NET_SCH_MQPRIO is not set -# CONFIG_NET_SCH_SKBPRIO is not set -# CONFIG_NET_SCH_CHOKE is not set -# CONFIG_NET_SCH_QFQ is not set -# CONFIG_NET_SCH_CODEL is not set -CONFIG_NET_SCH_FQ_CODEL=m -# CONFIG_NET_SCH_CAKE is not set -# CONFIG_NET_SCH_FQ is not set -# CONFIG_NET_SCH_HHF is not set -# CONFIG_NET_SCH_PIE is not set -# CONFIG_NET_SCH_PLUG is not set -# CONFIG_NET_SCH_ETS is not set -# CONFIG_NET_SCH_DEFAULT is not set - -# -# Classification -# -CONFIG_NET_CLS=y -# CONFIG_NET_CLS_BASIC is not set -# CONFIG_NET_CLS_TCINDEX is not set -# CONFIG_NET_CLS_ROUTE4 is not set -# CONFIG_NET_CLS_FW is not set -CONFIG_NET_CLS_U32=m -# CONFIG_CLS_U32_PERF is not set -# CONFIG_CLS_U32_MARK is not set -# CONFIG_NET_CLS_RSVP is not set -# CONFIG_NET_CLS_RSVP6 is not set -# CONFIG_NET_CLS_FLOW is not set -# CONFIG_NET_CLS_CGROUP is not set -# CONFIG_NET_CLS_BPF is not set -# CONFIG_NET_CLS_FLOWER is not set -# CONFIG_NET_CLS_MATCHALL is not set -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=m -# CONFIG_BATMAN_ADV is not set -# CONFIG_OPENVSWITCH is not set -# CONFIG_VSOCKETS is not set -# CONFIG_NETLINK_DIAG is not set -# CONFIG_MPLS is not set -# CONFIG_NET_NSH is not set -# CONFIG_HSR is not set -# CONFIG_NET_SWITCHDEV is not set -# CONFIG_NET_L3_MASTER_DEV is not set -# CONFIG_QRTR is not set -# CONFIG_NET_NCSI is not set -CONFIG_RPS=y -CONFIG_RFS_ACCEL=y -CONFIG_XPS=y -# CONFIG_CGROUP_NET_PRIO is not set -# CONFIG_CGROUP_NET_CLASSID is not set -CONFIG_NET_RX_BUSY_POLL=y -CONFIG_BQL=y -CONFIG_BPF_JIT=y -CONFIG_NET_FLOW_LIMIT=y - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# end of Network testing -# end of Networking options - -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -CONFIG_BT=m -CONFIG_BT_BREDR=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HS=y -CONFIG_BT_LE=y -CONFIG_BT_LEDS=y -# CONFIG_BT_MSFTEXT is not set -# CONFIG_BT_DEBUGFS is not set -# CONFIG_BT_FEATURE_DEBUG is not set - -# -# Bluetooth device drivers -# -CONFIG_BT_INTEL=m -CONFIG_BT_BCM=m -CONFIG_BT_RTL=m -CONFIG_BT_HCIBTUSB=m -# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set -CONFIG_BT_HCIBTUSB_BCM=y -# CONFIG_BT_HCIBTUSB_MTK is not set -CONFIG_BT_HCIBTUSB_RTL=y -# CONFIG_BT_HCIBTSDIO is not set -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_SERDEV=y -CONFIG_BT_HCIUART_H4=y -# CONFIG_BT_HCIUART_NOKIA is not set -# CONFIG_BT_HCIUART_BCSP is not set -# CONFIG_BT_HCIUART_ATH3K is not set -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIUART_3WIRE=y -# CONFIG_BT_HCIUART_INTEL is not set -CONFIG_BT_HCIUART_BCM=y -CONFIG_BT_HCIUART_RTL=y -# CONFIG_BT_HCIUART_QCA is not set -# CONFIG_BT_HCIUART_AG6XX is not set -# CONFIG_BT_HCIUART_MRVL is not set -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBFUSB is not set -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -# CONFIG_BT_ATH3K is not set -# CONFIG_BT_MTKSDIO is not set -# CONFIG_BT_MTKUART is not set -# end of Bluetooth device drivers - -# CONFIG_AF_RXRPC is not set -# CONFIG_AF_KCM is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y -CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_CFG80211_CRDA_SUPPORT=y -# CONFIG_CFG80211_WEXT is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -# CONFIG_WIMAX is not set -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_RFKILL_GPIO=m -# CONFIG_NET_9P is not set -# CONFIG_CAIF is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_NFC is not set -# CONFIG_PSAMPLE is not set -# CONFIG_NET_IFE is not set -# CONFIG_LWTUNNEL is not set -CONFIG_DST_CACHE=y -CONFIG_GRO_CELLS=y -# CONFIG_FAILOVER is not set -CONFIG_ETHTOOL_NETLINK=y -CONFIG_HAVE_EBPF_JIT=y - -# -# Device Drivers -# -CONFIG_ARM_AMBA=y -CONFIG_HAVE_PCI=y -# CONFIG_PCI is not set -# CONFIG_PCCARD is not set - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y - -# -# Firmware loader -# -CONFIG_FW_LOADER=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_FW_LOADER_USER_HELPER is not set -# CONFIG_FW_LOADER_COMPRESS is not set -CONFIG_FW_CACHE=y -# end of Firmware loader - -CONFIG_WANT_DEV_COREDUMP=y -CONFIG_ALLOW_DEV_COREDUMP=y -CONFIG_DEV_COREDUMP=y -# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_SOC_BUS=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=m -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_IRQ=y -CONFIG_DMA_SHARED_BUFFER=y -# CONFIG_DMA_FENCE_TRACE is not set -CONFIG_GENERIC_ARCH_TOPOLOGY=y -# end of Generic Driver Options - -# -# Bus devices -# -# CONFIG_BRCMSTB_GISB_ARB is not set -CONFIG_SIMPLE_PM_BUS=y -CONFIG_SUN50I_DE2_BUS=y -CONFIG_SUNXI_RSB=y -# CONFIG_VEXPRESS_CONFIG is not set -# CONFIG_MHI_BUS is not set -# end of Bus devices - -# CONFIG_CONNECTOR is not set -# CONFIG_GNSS is not set -# CONFIG_MTD is not set -CONFIG_DTC=y -CONFIG_OF=y -# CONFIG_OF_UNITTEST is not set -CONFIG_OF_FLATTREE=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_KOBJ=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_IRQ=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OF_RESOLVE=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_NUMA=y -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_NULL_BLK is not set -CONFIG_ZRAM=m -# CONFIG_ZRAM_WRITEBACK is not set -# CONFIG_ZRAM_MEMORY_TRACKING is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_DRBD is not set -CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_XEN_BLKDEV_FRONTEND is not set -# CONFIG_BLK_DEV_RBD is not set - -# -# NVME Support -# -# CONFIG_NVME_FC is not set -# CONFIG_NVME_TARGET is not set -# end of NVME Support - -# -# Misc devices -# -# CONFIG_AD525X_DPOT is not set -# CONFIG_DUMMY_IRQ is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_HMC6352 is not set -# CONFIG_DS1682 is not set -CONFIG_SRAM=y -# CONFIG_XILINX_SDFEC is not set -# CONFIG_PVPANIC is not set -# CONFIG_HISI_HIKEY_USB is not set -# CONFIG_MODEM_POWER is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_EEPROM_IDT_89HPESX is not set -# CONFIG_EEPROM_EE1004 is not set -# end of EEPROM support - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - -# CONFIG_SENSORS_LIS3_I2C is not set - -# -# Altera FPGA firmware download module (requires I2C) -# -# CONFIG_ALTERA_STAPL is not set -# CONFIG_ECHO is not set -# CONFIG_MISC_RTSX_USB is not set -# CONFIG_UACCE is not set -# end of Misc devices - -# -# SCSI device support -# -CONFIG_SCSI_MOD=m -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=m -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_PROC_FS is not set - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=m -# CONFIG_CHR_DEV_ST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -CONFIG_SCSI_SAS_ATTRS=m -CONFIG_SCSI_SAS_LIBSAS=m -CONFIG_SCSI_SAS_HOST_SMP=y -# CONFIG_SCSI_SRP_ATTRS is not set -# end of SCSI Transports - -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_ISCSI_BOOT_SYSFS is not set -CONFIG_SCSI_UFSHCD=m -CONFIG_SCSI_UFSHCD_PLATFORM=m -# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set -# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set -# CONFIG_SCSI_UFS_BSG is not set -# CONFIG_XEN_SCSI_FRONTEND is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# end of SCSI device support - -CONFIG_HAVE_PATA_PLATFORM=y -# CONFIG_ATA is not set -CONFIG_MD=y -# CONFIG_BLK_DEV_MD is not set -# CONFIG_BCACHE is not set -CONFIG_BLK_DEV_DM_BUILTIN=y -CONFIG_BLK_DEV_DM=y -# CONFIG_DM_DEBUG is not set -# CONFIG_DM_UNSTRIPED is not set -CONFIG_DM_CRYPT=y -# CONFIG_DM_SNAPSHOT is not set -# CONFIG_DM_THIN_PROVISIONING is not set -# CONFIG_DM_CACHE is not set -# CONFIG_DM_WRITECACHE is not set -# CONFIG_DM_EBS is not set -# CONFIG_DM_ERA is not set -# CONFIG_DM_CLONE is not set -# CONFIG_DM_MIRROR is not set -# CONFIG_DM_RAID is not set -# CONFIG_DM_ZERO is not set -# CONFIG_DM_MULTIPATH is not set -# CONFIG_DM_DELAY is not set -# CONFIG_DM_DUST is not set -# CONFIG_DM_INIT is not set -# CONFIG_DM_UEVENT is not set -# CONFIG_DM_FLAKEY is not set -# CONFIG_DM_VERITY is not set -# CONFIG_DM_SWITCH is not set -# CONFIG_DM_LOG_WRITES is not set -# CONFIG_DM_INTEGRITY is not set -CONFIG_TARGET_CORE=m -# CONFIG_TCM_IBLOCK is not set -# CONFIG_TCM_FILEIO is not set -# CONFIG_TCM_PSCSI is not set -# CONFIG_LOOPBACK_TARGET is not set -# CONFIG_ISCSI_TARGET is not set -CONFIG_NETDEVICES=y -CONFIG_MII=m -CONFIG_NET_CORE=y -# CONFIG_BONDING is not set -# CONFIG_DUMMY is not set -CONFIG_WIREGUARD=m -# CONFIG_WIREGUARD_DEBUG is not set -# CONFIG_EQUALIZER is not set -# CONFIG_NET_TEAM is not set -# CONFIG_MACVLAN is not set -# CONFIG_IPVLAN is not set -# CONFIG_VXLAN is not set -# CONFIG_GENEVE is not set -# CONFIG_BAREUDP is not set -# CONFIG_GTP is not set -# CONFIG_MACSEC is not set -# CONFIG_NETCONSOLE is not set -CONFIG_TUN=m -# CONFIG_TUN_VNET_CROSS_LE is not set -CONFIG_VETH=m -# CONFIG_NLMON is not set - -# -# Distributed Switch Architecture drivers -# -# end of Distributed Switch Architecture drivers - -CONFIG_ETHERNET=y -# CONFIG_NET_VENDOR_ALACRITECH is not set -CONFIG_NET_VENDOR_ALLWINNER=y -# CONFIG_SUN4I_EMAC is not set -# CONFIG_ALTERA_TSE is not set -# CONFIG_NET_VENDOR_AMAZON is not set -# CONFIG_NET_VENDOR_AMD is not set -# CONFIG_NET_VENDOR_AQUANTIA is not set -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_VENDOR_AURORA is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CADENCE is not set -# CONFIG_NET_VENDOR_CAVIUM is not set -# CONFIG_NET_VENDOR_CORTINA is not set -# CONFIG_DNET is not set -# CONFIG_NET_VENDOR_EZCHIP is not set -# CONFIG_NET_VENDOR_GOOGLE is not set -# CONFIG_NET_VENDOR_HISILICON is not set -# CONFIG_NET_VENDOR_HUAWEI is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MELLANOX is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_MICROSEMI is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_NETRONOME is not set -# CONFIG_NET_VENDOR_NI is not set -# CONFIG_ETHOC is not set -# CONFIG_NET_VENDOR_PENSANDO is not set -# CONFIG_NET_VENDOR_QUALCOMM is not set -# CONFIG_NET_VENDOR_RENESAS is not set -# CONFIG_NET_VENDOR_ROCKER is not set -# CONFIG_NET_VENDOR_SAMSUNG is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SOLARFLARE is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_SOCIONEXT is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_SYNOPSYS is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_NET_VENDOR_XILINX is not set -CONFIG_PHYLIB=m -CONFIG_SWPHY=y -# CONFIG_LED_TRIGGER_PHY is not set -CONFIG_FIXED_PHY=m - -# -# MII PHY device drivers -# -# CONFIG_AMD_PHY is not set -# CONFIG_ADIN_PHY is not set -# CONFIG_AQUANTIA_PHY is not set -# CONFIG_AX88796B_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_BCM54140_PHY is not set -# CONFIG_BCM7XXX_PHY is not set -# CONFIG_BCM84881_PHY is not set -# CONFIG_BCM87XX_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_CORTINA_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_INTEL_XWAY_PHY is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_MARVELL_PHY is not set -# CONFIG_MARVELL_10G_PHY is not set -# CONFIG_MICREL_PHY is not set -CONFIG_MICROCHIP_PHY=m -# CONFIG_MICROCHIP_T1_PHY is not set -# CONFIG_MICROSEMI_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_NXP_TJA11XX_PHY is not set -# CONFIG_AT803X_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_REALTEK_PHY=m -# CONFIG_RENESAS_PHY is not set -# CONFIG_ROCKCHIP_PHY is not set -CONFIG_SMSC_PHY=m -# CONFIG_STE10XP is not set -# CONFIG_TERANETICS_PHY is not set -# CONFIG_DP83822_PHY is not set -# CONFIG_DP83TC811_PHY is not set -# CONFIG_DP83848_PHY is not set -# CONFIG_DP83867_PHY is not set -# CONFIG_DP83869_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_XILINX_GMII2RGMII is not set -CONFIG_MDIO_DEVICE=m -CONFIG_MDIO_BUS=m -CONFIG_OF_MDIO=m -CONFIG_MDIO_DEVRES=m -# CONFIG_MDIO_SUN4I is not set -CONFIG_MDIO_BITBANG=m -# CONFIG_MDIO_BCM_UNIMAC is not set -# CONFIG_MDIO_GPIO is not set -# CONFIG_MDIO_HISI_FEMAC is not set -# CONFIG_MDIO_MVUSB is not set -# CONFIG_MDIO_MSCC_MIIM is not set -# CONFIG_MDIO_OCTEON is not set -# CONFIG_MDIO_IPQ4019 is not set -# CONFIG_MDIO_IPQ8064 is not set - -# -# MDIO Multiplexers -# -CONFIG_MDIO_BUS_MUX=m -# CONFIG_MDIO_BUS_MUX_GPIO is not set -# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set -CONFIG_MDIO_BUS_MUX_MMIOREG=m - -# -# PCS device drivers -# -# CONFIG_PCS_XPCS is not set -# end of PCS device drivers - -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Host-side USB support is needed for USB Network Adapter support -# -CONFIG_USB_NET_DRIVERS=m -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_RTL8152=m -CONFIG_USB_LAN78XX=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_AX88179_178A=m -CONFIG_USB_NET_CDCETHER=m -# CONFIG_USB_NET_CDC_EEM is not set -# CONFIG_USB_NET_CDC_NCM is not set -# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set -# CONFIG_USB_NET_CDC_MBIM is not set -# CONFIG_USB_NET_DM9601 is not set -# CONFIG_USB_NET_SR9700 is not set -CONFIG_USB_NET_SR9800=m -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=m -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET_ENABLE=m -CONFIG_USB_NET_CDC_SUBSET=m -# CONFIG_USB_ALI_M5632 is not set -# CONFIG_USB_AN2720 is not set -CONFIG_USB_BELKIN=y -# CONFIG_USB_ARMLINUX is not set -# CONFIG_USB_EPSON2888 is not set -# CONFIG_USB_KC2190 is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_NET_CX82310_ETH is not set -# CONFIG_USB_NET_KALMIA is not set -CONFIG_USB_NET_QMI_WWAN=m -# CONFIG_USB_HSO is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_USB_IPHETH is not set -# CONFIG_USB_SIERRA_NET is not set -# CONFIG_USB_VL600 is not set -# CONFIG_USB_NET_CH9200 is not set -# CONFIG_USB_NET_AQC111 is not set -CONFIG_WLAN=y -# CONFIG_WLAN_VENDOR_ADMTEK is not set -CONFIG_ATH_COMMON=m -CONFIG_WLAN_VENDOR_ATH=y -# CONFIG_ATH_DEBUG is not set -# CONFIG_ATH9K is not set -# CONFIG_ATH9K_HTC is not set -# CONFIG_CARL9170 is not set -# CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set -CONFIG_ATH10K=m -CONFIG_ATH10K_CE=y -# CONFIG_ATH10K_SDIO is not set -# CONFIG_ATH10K_USB is not set -# CONFIG_ATH10K_DEBUG is not set -# CONFIG_ATH10K_DEBUGFS is not set -# CONFIG_WCN36XX is not set -CONFIG_WLAN_VENDOR_ATMEL=y -# CONFIG_AT76C50X_USB is not set -CONFIG_WLAN_VENDOR_BROADCOM=y -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_BRCMUTIL=m -# CONFIG_BRCMSMAC is not set -CONFIG_BRCMFMAC=m -CONFIG_BRCMFMAC_PROTO_BCDC=y -CONFIG_BRCMFMAC_SDIO=y -# CONFIG_BRCMFMAC_USB is not set -# CONFIG_BRCM_TRACING is not set -# CONFIG_BRCMDBG is not set -# CONFIG_WLAN_VENDOR_CISCO is not set -# CONFIG_WLAN_VENDOR_INTEL is not set -# CONFIG_WLAN_VENDOR_INTERSIL is not set -# CONFIG_WLAN_VENDOR_MARVELL is not set -# CONFIG_WLAN_VENDOR_MEDIATEK is not set -CONFIG_WLAN_VENDOR_MICROCHIP=y -# CONFIG_WILC1000_SDIO is not set -CONFIG_WLAN_VENDOR_RALINK=y -CONFIG_RT2X00=m -# CONFIG_RT2500USB is not set -# CONFIG_RT73USB is not set -CONFIG_RT2800USB=m -CONFIG_RT2800USB_RT33XX=y -CONFIG_RT2800USB_RT35XX=y -CONFIG_RT2800USB_RT3573=y -CONFIG_RT2800USB_RT53XX=y -CONFIG_RT2800USB_RT55XX=y -# CONFIG_RT2800USB_UNKNOWN is not set -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WLAN_VENDOR_REALTEK=y -# CONFIG_RTL8187 is not set -CONFIG_RTL_CARDS=m -# CONFIG_RTL8192CU is not set -# CONFIG_RTL8XXXU is not set -# CONFIG_RTW88 is not set -# CONFIG_WLAN_VENDOR_RSI is not set -# CONFIG_WLAN_VENDOR_ST is not set -# CONFIG_WLAN_VENDOR_TI is not set -# CONFIG_WLAN_VENDOR_ZYDAS is not set -# CONFIG_WLAN_VENDOR_QUANTENNA is not set -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_VIRT_WIFI is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# -# CONFIG_WAN is not set -# CONFIG_XEN_NETDEV_FRONTEND is not set -# CONFIG_NETDEVSIM is not set -# CONFIG_NET_FAILOVER is not set -# CONFIG_ISDN is not set -# CONFIG_NVM is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_LEDS=m -CONFIG_INPUT_FF_MEMLESS=m -CONFIG_INPUT_POLLDEV=m -# CONFIG_INPUT_SPARSEKMAP is not set -CONFIG_INPUT_MATRIXKMAP=m - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=m -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ADC=m -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_KEYBOARD_QT1050 is not set -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -# CONFIG_KEYBOARD_DLINK_DIR685 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=m -# CONFIG_KEYBOARD_GPIO_POLLED is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_TCA8418 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_LM8333 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_SAMSUNG is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_SUN4I_LRADC=m -# CONFIG_KEYBOARD_OMAP4 is not set -# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_CAP11XX is not set -# CONFIG_KEYBOARD_BCM is not set -CONFIG_INPUT_MOUSE=y -# CONFIG_MOUSE_PS2 is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -# CONFIG_MOUSE_ELAN_I2C is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_MOUSE_SYNAPTICS_USB is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_PROPERTIES=y -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_ADC is not set -# CONFIG_TOUCHSCREEN_AR1021_I2C is not set -CONFIG_TOUCHSCREEN_ATMEL_MXT=m -# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set -# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_BU21029 is not set -# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set -# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_EGALAX is not set -# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set -# CONFIG_TOUCHSCREEN_EXC3000 is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -CONFIG_TOUCHSCREEN_GOODIX=m -# CONFIG_TOUCHSCREEN_HIDEEP is not set -# CONFIG_TOUCHSCREEN_ILI210X is not set -# CONFIG_TOUCHSCREEN_S6SY761 is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_EKTF2127 is not set -# CONFIG_TOUCHSCREEN_ELAN is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_WACOM_I2C is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MMS114 is not set -# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -CONFIG_TOUCHSCREEN_EDT_FT5X06=m -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_PIXCIR is not set -# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC_SERIO is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_RM_TS is not set -# CONFIG_TOUCHSCREEN_SILEAD is not set -# CONFIG_TOUCHSCREEN_SIS_I2C is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_STMFTS is not set -# CONFIG_TOUCHSCREEN_SUN4I is not set -# CONFIG_TOUCHSCREEN_SUR40 is not set -# CONFIG_TOUCHSCREEN_SX8654 is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -# CONFIG_TOUCHSCREEN_ZET6223 is not set -# CONFIG_TOUCHSCREEN_ZFORCE is not set -# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set -# CONFIG_TOUCHSCREEN_IQS5XX is not set -# CONFIG_TOUCHSCREEN_ZINITIX is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_ATMEL_CAPTOUCH is not set -# CONFIG_INPUT_BMA150 is not set -# CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GPIO_BEEPER is not set -# CONFIG_INPUT_GPIO_DECODER is not set -CONFIG_INPUT_GPIO_VIBRA=m -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_KXTJ9 is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -# CONFIG_INPUT_REGULATOR_HAPTIC is not set -CONFIG_INPUT_AXP20X_PEK=m -CONFIG_INPUT_UINPUT=m -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_PWM_BEEPER is not set -# CONFIG_INPUT_PWM_VIBRA is not set -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_IMS_PCU is not set -# CONFIG_INPUT_IQS269A is not set -# CONFIG_INPUT_CMA3000 is not set -# CONFIG_INPUT_XEN_KBDDEV_FRONTEND is not set -# CONFIG_INPUT_DRV260X_HAPTICS is not set -# CONFIG_INPUT_DRV2665_HAPTICS is not set -# CONFIG_INPUT_DRV2667_HAPTICS is not set -# CONFIG_RMI4_CORE is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_AMBAKMI is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_SERIO_ARC_PS2 is not set -# CONFIG_SERIO_APBPS2 is not set -# CONFIG_SERIO_SUN4I_PS2 is not set -# CONFIG_SERIO_GPIO_PS2 is not set -# CONFIG_USERIO is not set -# CONFIG_GAMEPORT is not set -# end of Hardware I/O ports -# end of Input device support - -# -# Character devices -# -CONFIG_TTY=y -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_LDISC_AUTOLOAD=y - -# -# Serial drivers -# -CONFIG_SERIAL_EARLYCON=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -# CONFIG_SERIAL_8250_FINTEK is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_DMA=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_ASPEED_VUART is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -# CONFIG_SERIAL_8250_RSA is not set -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_DW=y -# CONFIG_SERIAL_8250_RT288X is not set -CONFIG_SERIAL_OF_PLATFORM=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_AMBA_PL010 is not set -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set -# CONFIG_SERIAL_UARTLITE is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_SIFIVE is not set -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_SC16IS7XX is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -CONFIG_SERIAL_XILINX_PS_UART=y -CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_SERIAL_FSL_LINFLEXUART is not set -# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set -# CONFIG_SERIAL_SPRD is not set -# end of Serial drivers - -CONFIG_SERIAL_MCTRL_GPIO=y -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_NULL_TTY is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_HVC_XEN is not set -# CONFIG_HVC_DCC is not set -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -# CONFIG_VIRTIO_CONSOLE is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_IPMB_DEVICE_INTERFACE is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_HW_RANDOM_BA431 is not set -CONFIG_HW_RANDOM_OPTEE=m -# CONFIG_HW_RANDOM_CCTRNG is not set -# CONFIG_HW_RANDOM_XIPHERA is not set -CONFIG_DEVMEM=y -# CONFIG_RAW_DRIVER is not set -CONFIG_TCG_TPM=m -CONFIG_HW_RANDOM_TPM=y -# CONFIG_TCG_TIS is not set -# CONFIG_TCG_TIS_I2C_ATMEL is not set -CONFIG_TCG_TIS_I2C_INFINEON=m -# CONFIG_TCG_TIS_I2C_NUVOTON is not set -# CONFIG_TCG_XEN is not set -# CONFIG_TCG_VTPM_PROXY is not set -# CONFIG_TCG_FTPM_TEE is not set -# CONFIG_TCG_TIS_ST33ZP24_I2C is not set -# CONFIG_XILLYBUS is not set -# end of Character devices - -# CONFIG_RANDOM_TRUST_CPU is not set -# CONFIG_RANDOM_TRUST_BOOTLOADER is not set - -# -# I2C support -# -CONFIG_I2C=m -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_MUX=m - -# -# Multiplexer I2C Chip support -# -# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set -# CONFIG_I2C_MUX_GPIO is not set -# CONFIG_I2C_MUX_GPMUX is not set -# CONFIG_I2C_MUX_LTC4306 is not set -# CONFIG_I2C_MUX_PCA9541 is not set -CONFIG_I2C_MUX_PCA954x=m -# CONFIG_I2C_MUX_PINCTRL is not set -# CONFIG_I2C_MUX_REG is not set -# CONFIG_I2C_DEMUX_PINCTRL is not set -# CONFIG_I2C_MUX_MLXCPLD is not set -# end of Multiplexer I2C Chip support - -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=m - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_CADENCE is not set -# CONFIG_I2C_CBUS_GPIO is not set -CONFIG_I2C_DESIGNWARE_CORE=m -# CONFIG_I2C_DESIGNWARE_SLAVE is not set -CONFIG_I2C_DESIGNWARE_PLATFORM=m -# CONFIG_I2C_EMEV2 is not set -CONFIG_I2C_GPIO=m -# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set -CONFIG_I2C_MV64XXX=m -# CONFIG_I2C_NOMADIK is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PCA_PLATFORM is not set -CONFIG_I2C_RK3X=m -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_ROBOTFUZZ_OSIF is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# end of I2C Hardware Bus support - -# CONFIG_I2C_STUB is not set -CONFIG_I2C_SLAVE=y -# CONFIG_I2C_SLAVE_EEPROM is not set -# CONFIG_I2C_SLAVE_TESTUNIT is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# end of I2C support - -# CONFIG_I3C is not set -# CONFIG_SPI is not set -CONFIG_SPMI=y -# CONFIG_HSI is not set -# CONFIG_PPS is not set - -# -# PTP clock support -# -# CONFIG_PTP_1588_CLOCK is not set - -# -# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. -# -# end of PTP clock support - -CONFIG_PINCTRL=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_PINMUX=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_PINCONF=y -CONFIG_GENERIC_PINCONF=y -# CONFIG_PINCTRL_AXP209 is not set -# CONFIG_PINCTRL_MCP23S08 is not set -CONFIG_PINCTRL_SINGLE=y -# CONFIG_PINCTRL_STMFX is not set -# CONFIG_PINCTRL_OCELOT is not set - -# -# Renesas pinctrl drivers -# -# end of Renesas pinctrl drivers - -CONFIG_PINCTRL_SUNXI=y -# CONFIG_PINCTRL_SUN4I_A10 is not set -# CONFIG_PINCTRL_SUN5I is not set -# CONFIG_PINCTRL_SUN6I_A31 is not set -# CONFIG_PINCTRL_SUN6I_A31_R is not set -# CONFIG_PINCTRL_SUN8I_A23 is not set -# CONFIG_PINCTRL_SUN8I_A33 is not set -# CONFIG_PINCTRL_SUN8I_A83T is not set -# CONFIG_PINCTRL_SUN8I_A83T_R is not set -# CONFIG_PINCTRL_SUN8I_A23_R is not set -# CONFIG_PINCTRL_SUN8I_H3 is not set -CONFIG_PINCTRL_SUN8I_H3_R=y -# CONFIG_PINCTRL_SUN8I_V3S is not set -# CONFIG_PINCTRL_SUN9I_A80 is not set -# CONFIG_PINCTRL_SUN9I_A80_R is not set -CONFIG_PINCTRL_SUN50I_A64=y -CONFIG_PINCTRL_SUN50I_A64_R=y -CONFIG_PINCTRL_SUN50I_A100=y -CONFIG_PINCTRL_SUN50I_A100_R=y -CONFIG_PINCTRL_SUN50I_H5=y -CONFIG_PINCTRL_SUN50I_H6=y -CONFIG_PINCTRL_SUN50I_H6_R=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_FASTPATH_LIMIT=512 -CONFIG_OF_GPIO=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_CDEV_V1=y -CONFIG_GPIO_GENERIC=m - -# -# Memory mapped GPIO drivers -# -# CONFIG_GPIO_74XX_MMIO is not set -# CONFIG_GPIO_ALTERA is not set -# CONFIG_GPIO_CADENCE is not set -# CONFIG_GPIO_DWAPB is not set -# CONFIG_GPIO_FTGPIO010 is not set -CONFIG_GPIO_GENERIC_PLATFORM=m -# CONFIG_GPIO_GRGPIO is not set -# CONFIG_GPIO_HLWD is not set -# CONFIG_GPIO_LOGICVC is not set -CONFIG_GPIO_MB86S7X=m -CONFIG_GPIO_PL061=m -# CONFIG_GPIO_SAMA5D2_PIOBU is not set -# CONFIG_GPIO_SIFIVE is not set -# CONFIG_GPIO_SYSCON is not set -CONFIG_GPIO_XGENE=y -# CONFIG_GPIO_XILINX is not set -# CONFIG_GPIO_AMD_FCH is not set -# end of Memory mapped GPIO drivers - -# -# I2C GPIO expanders -# -# CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_ADNP is not set -# CONFIG_GPIO_GW_PLD is not set -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=m -CONFIG_GPIO_PCA953X_IRQ=y -# CONFIG_GPIO_PCA9570 is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_TPIC2810 is not set -# end of I2C GPIO expanders - -# -# MFD GPIO expanders -# -# end of MFD GPIO expanders - -# -# USB GPIO expanders -# -# end of USB GPIO expanders - -# CONFIG_GPIO_AGGREGATOR is not set -# CONFIG_GPIO_MOCKUP is not set -# CONFIG_W1 is not set -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_BRCMSTB=y -# CONFIG_POWER_RESET_GPIO is not set -# CONFIG_POWER_RESET_GPIO_RESTART is not set -# CONFIG_POWER_RESET_LTC2952 is not set -# CONFIG_POWER_RESET_RESTART is not set -CONFIG_POWER_RESET_XGENE=y -CONFIG_POWER_RESET_SYSCON=y -# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set -CONFIG_REBOOT_MODE=y -CONFIG_SYSCON_REBOOT_MODE=y -# CONFIG_NVMEM_REBOOT_MODE is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -CONFIG_POWER_SUPPLY_HWMON=y -# CONFIG_PDA_POWER is not set -# CONFIG_GENERIC_ADC_BATTERY is not set -# CONFIG_TEST_POWER is not set -# CONFIG_CHARGER_ADP5061 is not set -# CONFIG_BATTERY_CW2015 is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_SBS is not set -# CONFIG_CHARGER_SBS is not set -# CONFIG_MANAGER_SBS is not set -CONFIG_BATTERY_BQ27XXX=m -CONFIG_BATTERY_BQ27XXX_I2C=m -# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set -CONFIG_CHARGER_AXP20X=m -CONFIG_BATTERY_AXP20X=m -CONFIG_AXP20X_POWER=m -CONFIG_AXP288_FUEL_GAUGE=m -# CONFIG_BATTERY_MAX17040 is not set -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_CHARGER_ISP1704 is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_MANAGER is not set -# CONFIG_CHARGER_LT3651 is not set -# CONFIG_CHARGER_DETECTOR_MAX14656 is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set -# CONFIG_CHARGER_BQ2515X is not set -# CONFIG_CHARGER_BQ25890 is not set -# CONFIG_CHARGER_BQ25980 is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_BATTERY_GAUGE_LTC2941 is not set -# CONFIG_CHARGER_RT9455 is not set -# CONFIG_CHARGER_UCS1002 is not set -# CONFIG_CHARGER_BD99954 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM1177 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7410 is not set -# CONFIG_SENSORS_ADT7411 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_AS370 is not set -# CONFIG_SENSORS_ASC7621 is not set -# CONFIG_SENSORS_AXI_FAN_CONTROL is not set -CONFIG_SENSORS_ARM_SCPI=m -# CONFIG_SENSORS_ASPEED is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_CORSAIR_CPRO is not set -# CONFIG_SENSORS_DS620 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_FTSTEUTATES is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_G762 is not set -# CONFIG_SENSORS_GPIO_FAN is not set -# CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_IIO_HWMON is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_POWR1220 is not set -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LTC2945 is not set -# CONFIG_SENSORS_LTC2947_I2C is not set -# CONFIG_SENSORS_LTC2990 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4222 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4260 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_MAX31730 is not set -# CONFIG_SENSORS_MAX6621 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_MAX6697 is not set -# CONFIG_SENSORS_MAX31790 is not set -# CONFIG_SENSORS_MCP3021 is not set -# CONFIG_SENSORS_TC654 is not set -# CONFIG_SENSORS_MR75203 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LM95234 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_LM95245 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_NTC_THERMISTOR is not set -# CONFIG_SENSORS_NCT6683 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_NCT7802 is not set -# CONFIG_SENSORS_NCT7904 is not set -# CONFIG_SENSORS_NPCM7XX is not set -# CONFIG_SENSORS_OCC_P8_I2C is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_PWM_FAN is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SHT3x is not set -# CONFIG_SENSORS_SHTC1 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_SCH5636 is not set -# CONFIG_SENSORS_STTS751 is not set -# CONFIG_SENSORS_SMM665 is not set -# CONFIG_SENSORS_ADC128D818 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_AMC6821 is not set -# CONFIG_SENSORS_INA209 is not set -# CONFIG_SENSORS_INA2XX is not set -# CONFIG_SENSORS_INA3221 is not set -# CONFIG_SENSORS_TC74 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP102 is not set -# CONFIG_SENSORS_TMP103 is not set -# CONFIG_SENSORS_TMP108 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_TMP513 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83773G is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -CONFIG_THERMAL=y -# CONFIG_THERMAL_NETLINK is not set -CONFIG_THERMAL_STATISTICS=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set -# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set -CONFIG_THERMAL_GOV_FAIR_SHARE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_BANG_BANG=y -CONFIG_THERMAL_GOV_USER_SPACE=y -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_FREQ_THERMAL=y -CONFIG_DEVFREQ_THERMAL=y -CONFIG_THERMAL_EMULATION=y -# CONFIG_THERMAL_MMIO is not set -CONFIG_SUN8I_THERMAL=m -# CONFIG_GENERIC_ADC_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_CORE=m -# CONFIG_WATCHDOG_NOWAYOUT is not set -CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y -CONFIG_WATCHDOG_OPEN_TIMEOUT=0 -# CONFIG_WATCHDOG_SYSFS is not set - -# -# Watchdog Pretimeout Governors -# -# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_GPIO_WATCHDOG is not set -# CONFIG_XILINX_WATCHDOG is not set -# CONFIG_ZIIRAVE_WATCHDOG is not set -CONFIG_ARM_SP805_WATCHDOG=m -# CONFIG_ARM_SBSA_WATCHDOG is not set -# CONFIG_CADENCE_WATCHDOG is not set -# CONFIG_DW_WATCHDOG is not set -# CONFIG_SUNXI_WATCHDOG is not set -# CONFIG_MAX63XX_WATCHDOG is not set -# CONFIG_ARM_SMC_WATCHDOG is not set -# CONFIG_MEN_A21_WDT is not set -# CONFIG_XEN_WDT is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set -CONFIG_BCMA_POSSIBLE=y -# CONFIG_BCMA is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_ACT8945A is not set -# CONFIG_MFD_SUN4I_GPADC is not set -# CONFIG_MFD_ATMEL_FLEXCOM is not set -# CONFIG_MFD_ATMEL_HLCDC is not set -# CONFIG_MFD_BCM590XX is not set -# CONFIG_MFD_BD9571MWV is not set -CONFIG_MFD_AC100=m -CONFIG_MFD_AXP20X=y -# CONFIG_MFD_AXP20X_I2C is not set -CONFIG_MFD_AXP20X_RSB=y -# CONFIG_MFD_MADERA is not set -# CONFIG_MFD_DA9062 is not set -# CONFIG_MFD_DA9063 is not set -# CONFIG_MFD_DA9150 is not set -# CONFIG_MFD_DLN2 is not set -# CONFIG_MFD_GATEWORKS_GSC is not set -# CONFIG_MFD_MC13XXX_I2C is not set -# CONFIG_MFD_MP2629 is not set -# CONFIG_MFD_HI6421_PMIC is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_IQS62X is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_MFD_88PM800 is not set -# CONFIG_MFD_88PM805 is not set -# CONFIG_MFD_MAX14577 is not set -# CONFIG_MFD_MAX77650 is not set -# CONFIG_MFD_MAX77686 is not set -# CONFIG_MFD_MAX77693 is not set -# CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_MT6360 is not set -# CONFIG_MFD_MT6397 is not set -# CONFIG_MFD_MENF21BMC is not set -# CONFIG_MFD_VIPERBOARD is not set -# CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_RT5033 is not set -# CONFIG_MFD_RK808 is not set -# CONFIG_MFD_RN5T618 is not set -# CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_SKY81452 is not set -# CONFIG_ABX500_CORE is not set -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_LP3943 is not set -# CONFIG_MFD_TI_LMU is not set -# CONFIG_TPS6105X is not set -# CONFIG_TPS65010 is not set -# CONFIG_TPS6507X is not set -# CONFIG_MFD_TPS65086 is not set -# CONFIG_MFD_TPS65217 is not set -# CONFIG_MFD_TI_LP873X is not set -# CONFIG_MFD_TI_LP87565 is not set -# CONFIG_MFD_TPS65218 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_WL1273_CORE is not set -# CONFIG_MFD_LM3533 is not set -# CONFIG_MFD_TQMX86 is not set -# CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_STMFX is not set -# CONFIG_RAVE_SP_CORE is not set -# end of Multifunction device drivers - -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_FIXED_VOLTAGE=m -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER_OF is not set -# CONFIG_REGULATOR_88PG86X is not set -# CONFIG_REGULATOR_ACT8865 is not set -# CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_AXP20X=y -# CONFIG_REGULATOR_DA9210 is not set -# CONFIG_REGULATOR_DA9211 is not set -CONFIG_REGULATOR_FAN53555=m -# CONFIG_REGULATOR_FAN53880 is not set -CONFIG_REGULATOR_GPIO=m -# CONFIG_REGULATOR_ISL9305 is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -# CONFIG_REGULATOR_LP872X is not set -# CONFIG_REGULATOR_LP8755 is not set -# CONFIG_REGULATOR_LTC3589 is not set -# CONFIG_REGULATOR_LTC3676 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -# CONFIG_REGULATOR_MAX8973 is not set -# CONFIG_REGULATOR_MAX77826 is not set -# CONFIG_REGULATOR_MCP16502 is not set -# CONFIG_REGULATOR_MP5416 is not set -# CONFIG_REGULATOR_MP8859 is not set -# CONFIG_REGULATOR_MP886X is not set -# CONFIG_REGULATOR_MPQ7920 is not set -# CONFIG_REGULATOR_MT6311 is not set -# CONFIG_REGULATOR_PCA9450 is not set -# CONFIG_REGULATOR_PFUZE100 is not set -# CONFIG_REGULATOR_PV88060 is not set -# CONFIG_REGULATOR_PV88080 is not set -# CONFIG_REGULATOR_PV88090 is not set -CONFIG_REGULATOR_PWM=m -# CONFIG_REGULATOR_QCOM_SPMI is not set -# CONFIG_REGULATOR_QCOM_USB_VBUS is not set -# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set -# CONFIG_REGULATOR_RT4801 is not set -# CONFIG_REGULATOR_RTMV20 is not set -# CONFIG_REGULATOR_SLG51000 is not set -# CONFIG_REGULATOR_SY8106A is not set -# CONFIG_REGULATOR_SY8824X is not set -# CONFIG_REGULATOR_SY8827N is not set -# CONFIG_REGULATOR_TPS51632 is not set -# CONFIG_REGULATOR_TPS62360 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_TPS65132 is not set -CONFIG_REGULATOR_VCTRL=m -# CONFIG_REGULATOR_QCOM_LABIBB is not set -# CONFIG_REGULATOR_TP65185X is not set -# CONFIG_RC_CORE is not set -# CONFIG_MEDIA_CEC_SUPPORT is not set -CONFIG_MEDIA_SUPPORT=m -CONFIG_MEDIA_SUPPORT_FILTER=y -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y - -# -# Media device types -# -CONFIG_MEDIA_CAMERA_SUPPORT=y -# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set -# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_PLATFORM_SUPPORT=y -# CONFIG_MEDIA_TEST_SUPPORT is not set -# end of Media device types - -CONFIG_VIDEO_DEV=m -CONFIG_MEDIA_CONTROLLER=y - -# -# Video4Linux options -# -CONFIG_VIDEO_V4L2=m -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_V4L2_MEM2MEM_DEV=m -CONFIG_V4L2_FLASH_LED_CLASS=m -CONFIG_V4L2_FWNODE=m -# end of Video4Linux options - -# -# Media controller options -# -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y - -# -# Please notice that the enabled Media controller Request API is EXPERIMENTAL -# -# end of Media controller options - -# -# Media drivers -# - -# -# Drivers filtered as selected at 'Filter media drivers' -# -CONFIG_MEDIA_USB_SUPPORT=y - -# -# Webcam devices -# -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_BENQ is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_CPIA1 is not set -# CONFIG_USB_GSPCA_DTCS033 is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_JL2005BCD is not set -# CONFIG_USB_GSPCA_KINECT is not set -# CONFIG_USB_GSPCA_KONICA is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_NW80X is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_OV534_9 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SE401 is not set -# CONFIG_USB_GSPCA_SN9C2028 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SPCA1528 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_SQ930X is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STK1135 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TOPRO is not set -# CONFIG_USB_GSPCA_TOUPTEK is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_VICAM is not set -# CONFIG_USB_GSPCA_XIRLINK_CIT is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -# CONFIG_USB_PWC is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_VIDEO_USBTV is not set - -# -# Webcam, TV (analog/digital) USB devices -# -# CONFIG_VIDEO_EM28XX is not set -CONFIG_VIDEOBUF2_CORE=m -CONFIG_VIDEOBUF2_V4L2=m -CONFIG_VIDEOBUF2_MEMOPS=m -CONFIG_VIDEOBUF2_DMA_CONTIG=m -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_V4L_PLATFORM_DRIVERS=y -# CONFIG_VIDEO_CADENCE is not set -# CONFIG_VIDEO_ASPEED is not set -# CONFIG_VIDEO_MUX is not set -# CONFIG_VIDEO_XILINX is not set -# CONFIG_VIDEO_SUN4I_CSI is not set -CONFIG_VIDEO_SUN6I_CSI=m -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m -CONFIG_VIDEO_SUN8I_DEINTERLACE=m -CONFIG_VIDEO_SUN8I_ROTATE=m -# end of Media drivers - -CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y - -# -# Media ancillary drivers -# - -# -# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers' -# - -# -# Video and audio decoders -# - -# -# Camera sensor devices -# -# CONFIG_VIDEO_HI556 is not set -# CONFIG_VIDEO_IMX214 is not set -# CONFIG_VIDEO_IMX219 is not set -# CONFIG_VIDEO_IMX258 is not set -# CONFIG_VIDEO_IMX274 is not set -# CONFIG_VIDEO_IMX290 is not set -# CONFIG_VIDEO_IMX319 is not set -# CONFIG_VIDEO_IMX355 is not set -# CONFIG_VIDEO_OV2640 is not set -# CONFIG_VIDEO_OV2659 is not set -# CONFIG_VIDEO_OV2680 is not set -# CONFIG_VIDEO_OV2685 is not set -CONFIG_VIDEO_OV5640=m -# CONFIG_VIDEO_OV5645 is not set -# CONFIG_VIDEO_OV5647 is not set -# CONFIG_VIDEO_OV6650 is not set -# CONFIG_VIDEO_OV5670 is not set -# CONFIG_VIDEO_OV5675 is not set -# CONFIG_VIDEO_OV5695 is not set -# CONFIG_VIDEO_OV7251 is not set -# CONFIG_VIDEO_OV772X is not set -# CONFIG_VIDEO_OV7640 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_OV7740 is not set -# CONFIG_VIDEO_OV8856 is not set -# CONFIG_VIDEO_OV9640 is not set -# CONFIG_VIDEO_OV9650 is not set -# CONFIG_VIDEO_OV13858 is not set -# CONFIG_VIDEO_VS6624 is not set -# CONFIG_VIDEO_MT9M001 is not set -# CONFIG_VIDEO_MT9M032 is not set -# CONFIG_VIDEO_MT9M111 is not set -# CONFIG_VIDEO_MT9P031 is not set -# CONFIG_VIDEO_MT9T001 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V032 is not set -# CONFIG_VIDEO_MT9V111 is not set -# CONFIG_VIDEO_SR030PC30 is not set -# CONFIG_VIDEO_NOON010PC30 is not set -# CONFIG_VIDEO_M5MOLS is not set -# CONFIG_VIDEO_RDACM20 is not set -# CONFIG_VIDEO_RJ54N1 is not set -# CONFIG_VIDEO_S5K6AA is not set -# CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_S5K4ECGX is not set -# CONFIG_VIDEO_S5K5BAF is not set -# CONFIG_VIDEO_SMIAPP is not set -# CONFIG_VIDEO_ET8EK8 is not set -# CONFIG_VIDEO_HM5065 is not set -CONFIG_VIDEO_GC2145=m -# end of Camera sensor devices - -# -# Lens drivers -# -# CONFIG_VIDEO_AD5820 is not set -# CONFIG_VIDEO_AK7375 is not set -# CONFIG_VIDEO_DW9714 is not set -# CONFIG_VIDEO_DW9768 is not set -# CONFIG_VIDEO_DW9807_VCM is not set -# end of Lens drivers - -# -# Flash devices -# -# CONFIG_VIDEO_ADP1653 is not set -# CONFIG_VIDEO_LM3560 is not set -# CONFIG_VIDEO_LM3646 is not set -# end of Flash devices -# end of Media ancillary drivers - -# -# Graphics support -# -CONFIG_DRM=m -CONFIG_DRM_MIPI_DSI=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -CONFIG_DRM_KMS_HELPER=m -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -# CONFIG_DRM_DP_CEC is not set -CONFIG_DRM_GEM_CMA_HELPER=y -CONFIG_DRM_KMS_CMA_HELPER=y -CONFIG_DRM_GEM_SHMEM_HELPER=y -CONFIG_DRM_SCHED=m - -# -# I2C encoder or helper chips -# -CONFIG_DRM_I2C_CH7006=m -CONFIG_DRM_I2C_SIL164=m -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - -# -# ARM devices -# -# CONFIG_DRM_HDLCD is not set -CONFIG_DRM_MALI_DISPLAY=m -# CONFIG_DRM_KOMEDA is not set -# end of ARM devices - -# CONFIG_DRM_VGEM is not set -# CONFIG_DRM_VKMS is not set -CONFIG_DRM_UDL=m -# CONFIG_DRM_RCAR_DW_HDMI is not set -# CONFIG_DRM_RCAR_LVDS is not set -CONFIG_DRM_SUN4I=m -CONFIG_DRM_SUN4I_HDMI=m -# CONFIG_DRM_SUN4I_HDMI_CEC is not set -CONFIG_DRM_SUN4I_BACKEND=m -CONFIG_DRM_SUN6I_DSI=m -CONFIG_DRM_SUN8I_DW_HDMI=m -CONFIG_DRM_SUN8I_MIXER=m -CONFIG_DRM_SUN8I_TCON_TOP=m -CONFIG_DRM_PANEL=y - -# -# Display Panels -# -# CONFIG_DRM_PANEL_ARM_VERSATILE is not set -# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set -# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set -# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=m -# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set -CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m -CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m -CONFIG_DRM_PANEL_ILITEK_ILI9881C=m -# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set -# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set -# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set -# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set -# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set -# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set -# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set -# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set -# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set -# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set -# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set -CONFIG_DRM_PANEL_SITRONIX_ST7703=m -# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set -# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set -# end of Display Panels - -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_PANEL_BRIDGE=y - -# -# Display Interface Bridges -# -# CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_CHRONTEL_CH7033 is not set -CONFIG_DRM_DISPLAY_CONNECTOR=m -# CONFIG_DRM_LONTIUM_LT9611 is not set -# CONFIG_DRM_LVDS_CODEC is not set -# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set -# CONFIG_DRM_NWL_MIPI_DSI is not set -# CONFIG_DRM_NXP_PTN3460 is not set -# CONFIG_DRM_PARADE_PS8622 is not set -# CONFIG_DRM_PARADE_PS8640 is not set -# CONFIG_DRM_SIL_SII8620 is not set -# CONFIG_DRM_SII902X is not set -# CONFIG_DRM_SII9234 is not set -# CONFIG_DRM_SIMPLE_BRIDGE is not set -# CONFIG_DRM_THINE_THC63LVD1024 is not set -# CONFIG_DRM_TOSHIBA_TC358762 is not set -# CONFIG_DRM_TOSHIBA_TC358764 is not set -# CONFIG_DRM_TOSHIBA_TC358767 is not set -# CONFIG_DRM_TOSHIBA_TC358768 is not set -# CONFIG_DRM_TOSHIBA_TC358775 is not set -# CONFIG_DRM_TI_TFP410 is not set -# CONFIG_DRM_TI_SN65DSI86 is not set -# CONFIG_DRM_TI_TPD12S015 is not set -# CONFIG_DRM_ANALOGIX_ANX6345 is not set -# CONFIG_DRM_ANALOGIX_ANX78XX is not set -# CONFIG_DRM_I2C_ADV7511 is not set -# CONFIG_DRM_CDNS_MHDP8546 is not set -CONFIG_DRM_DW_HDMI=m -# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set -# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set -# CONFIG_DRM_DW_HDMI_CEC is not set -# end of Display Interface Bridges - -# CONFIG_DRM_ETNAVIV is not set -# CONFIG_DRM_ARCPGU is not set -# CONFIG_DRM_HISI_KIRIN is not set -# CONFIG_DRM_MXSFB is not set -# CONFIG_DRM_GM12U320 is not set -# CONFIG_DRM_PL111 is not set -# CONFIG_DRM_XEN is not set -CONFIG_DRM_LIMA=m -# CONFIG_DRM_PANFROST is not set -# CONFIG_DRM_TIDSS is not set -# CONFIG_DRM_LEGACY is not set -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=m - -# -# Frame buffer Devices -# -CONFIG_FB_CMDLINE=y -CONFIG_FB_NOTIFY=y -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_SYS_FILLRECT=m -CONFIG_FB_SYS_COPYAREA=m -CONFIG_FB_SYS_IMAGEBLIT=m -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=m -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_ARMCLCD is not set -# CONFIG_FB_OPENCORES is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_SUN5I_EINK is not set -# CONFIG_FB_SMSCUFX is not set -CONFIG_FB_UDL=m -# CONFIG_FB_IBM_GXT4500 is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_XEN_FBDEV_FRONTEND is not set -# CONFIG_FB_METRONOME is not set -CONFIG_FB_SIMPLE=y -# CONFIG_FB_SSD1307 is not set -# end of Frame buffer Devices - -# -# Backlight & LCD device support -# -CONFIG_LCD_CLASS_DEVICE=m -# CONFIG_LCD_PLATFORM is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=m -# CONFIG_BACKLIGHT_KTD253 is not set -CONFIG_BACKLIGHT_PWM=m -# CONFIG_BACKLIGHT_QCOM_WLED is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_LM3630A is not set -# CONFIG_BACKLIGHT_LM3639 is not set -# CONFIG_BACKLIGHT_LP855X is not set -# CONFIG_BACKLIGHT_GPIO is not set -# CONFIG_BACKLIGHT_LV5207LP is not set -# CONFIG_BACKLIGHT_BD6107 is not set -# CONFIG_BACKLIGHT_ARCXCNN is not set -# CONFIG_BACKLIGHT_LED is not set -# end of Backlight & LCD device support - -CONFIG_VIDEOMODE_HELPERS=y -CONFIG_HDMI=y - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_DUMMY_CONSOLE_COLUMNS=80 -CONFIG_DUMMY_CONSOLE_ROWS=25 -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set -# end of Console display driver support - -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -# end of Graphics support - -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -CONFIG_SND_DMAENGINE_PCM=m -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -CONFIG_SND_JACK_INPUT_DEV=y -# CONFIG_SND_OSSEMUL is not set -CONFIG_SND_PCM_TIMER=y -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_PROC_FS=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_SEQUENCER is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_ALOOP=m -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# HD-Audio -# -# end of HD-Audio - -CONFIG_SND_HDA_PREALLOC_SIZE=64 -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y -# CONFIG_SND_USB_UA101 is not set -# CONFIG_SND_USB_CAIAQ is not set -# CONFIG_SND_USB_6FIRE is not set -# CONFIG_SND_USB_HIFACE is not set -# CONFIG_SND_BCD2000 is not set -# CONFIG_SND_USB_POD is not set -# CONFIG_SND_USB_PODHD is not set -# CONFIG_SND_USB_TONEPORT is not set -# CONFIG_SND_USB_VARIAX is not set -CONFIG_SND_SOC=m -CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y -# CONFIG_SND_SOC_AMD_ACP is not set -# CONFIG_SND_ATMEL_SOC is not set -# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set -# CONFIG_SND_DESIGNWARE_I2S is not set - -# -# SoC Audio for Freescale CPUs -# - -# -# Common SoC Audio options for Freescale CPUs: -# -# CONFIG_SND_SOC_FSL_ASRC is not set -# CONFIG_SND_SOC_FSL_SAI is not set -# CONFIG_SND_SOC_FSL_AUDMIX is not set -# CONFIG_SND_SOC_FSL_SSI is not set -# CONFIG_SND_SOC_FSL_SPDIF is not set -# CONFIG_SND_SOC_FSL_ESAI is not set -# CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_IMX_AUDMUX is not set -# end of SoC Audio for Freescale CPUs - -# CONFIG_SND_I2S_HI6210_I2S is not set -# CONFIG_SND_SOC_IMG is not set -# CONFIG_SND_SOC_MTK_BTCVSD is not set -# CONFIG_SND_SOC_SOF_TOPLEVEL is not set - -# -# STMicroelectronics STM32 SOC audio support -# -# end of STMicroelectronics STM32 SOC audio support - -# -# Allwinner SoC Audio support -# -CONFIG_SND_SUN4I_CODEC=m -CONFIG_SND_SUN8I_CODEC=m -CONFIG_SND_SUN8I_CODEC_ANALOG=m -CONFIG_SND_SUN50I_CODEC_ANALOG=m -CONFIG_SND_SUN4I_I2S=m -CONFIG_SND_SUN4I_SPDIF=m -CONFIG_SND_SUN8I_ADDA_PR_REGMAP=m -# end of Allwinner SoC Audio support - -# CONFIG_SND_SOC_XILINX_I2S is not set -# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set -# CONFIG_SND_SOC_XILINX_SPDIF is not set -# CONFIG_SND_SOC_XTFPGA_I2S is not set -# CONFIG_ZX_TDM is not set -CONFIG_SND_SOC_I2C_AND_SPI=m - -# -# CODEC drivers -# -# CONFIG_SND_SOC_AC97_CODEC is not set -# CONFIG_SND_SOC_ADAU1701 is not set -# CONFIG_SND_SOC_ADAU1761_I2C is not set -# CONFIG_SND_SOC_ADAU7002 is not set -# CONFIG_SND_SOC_ADAU7118_HW is not set -# CONFIG_SND_SOC_ADAU7118_I2C is not set -# CONFIG_SND_SOC_AK4118 is not set -# CONFIG_SND_SOC_AK4458 is not set -# CONFIG_SND_SOC_AK4554 is not set -CONFIG_SND_SOC_AK4613=m -# CONFIG_SND_SOC_AK4642 is not set -# CONFIG_SND_SOC_AK5386 is not set -# CONFIG_SND_SOC_AK5558 is not set -# CONFIG_SND_SOC_ALC5623 is not set -# CONFIG_SND_SOC_BD28623 is not set -CONFIG_SND_SOC_BT_SCO=m -# CONFIG_SND_SOC_CS35L32 is not set -# CONFIG_SND_SOC_CS35L33 is not set -# CONFIG_SND_SOC_CS35L34 is not set -# CONFIG_SND_SOC_CS35L35 is not set -# CONFIG_SND_SOC_CS35L36 is not set -# CONFIG_SND_SOC_CS42L42 is not set -# CONFIG_SND_SOC_CS42L51_I2C is not set -# CONFIG_SND_SOC_CS42L52 is not set -# CONFIG_SND_SOC_CS42L56 is not set -# CONFIG_SND_SOC_CS42L73 is not set -# CONFIG_SND_SOC_CS4234 is not set -# CONFIG_SND_SOC_CS4265 is not set -# CONFIG_SND_SOC_CS4270 is not set -# CONFIG_SND_SOC_CS4271_I2C is not set -# CONFIG_SND_SOC_CS42XX8_I2C is not set -# CONFIG_SND_SOC_CS43130 is not set -# CONFIG_SND_SOC_CS4341 is not set -# CONFIG_SND_SOC_CS4349 is not set -# CONFIG_SND_SOC_CS53L30 is not set -# CONFIG_SND_SOC_CX2072X is not set -# CONFIG_SND_SOC_DA7213 is not set -CONFIG_SND_SOC_DMIC=m -CONFIG_SND_SOC_EC25=m -# CONFIG_SND_SOC_ES7134 is not set -# CONFIG_SND_SOC_ES7241 is not set -# CONFIG_SND_SOC_ES8316 is not set -# CONFIG_SND_SOC_ES8328_I2C is not set -# CONFIG_SND_SOC_GTM601 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set -# CONFIG_SND_SOC_MAX98088 is not set -# CONFIG_SND_SOC_MAX98357A is not set -# CONFIG_SND_SOC_MAX98504 is not set -# CONFIG_SND_SOC_MAX9867 is not set -# CONFIG_SND_SOC_MAX98927 is not set -# CONFIG_SND_SOC_MAX98373_I2C is not set -# CONFIG_SND_SOC_MAX98390 is not set -# CONFIG_SND_SOC_MAX9860 is not set -# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set -# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set -# CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM1789_I2C is not set -# CONFIG_SND_SOC_PCM179X_I2C is not set -# CONFIG_SND_SOC_PCM186X_I2C is not set -# CONFIG_SND_SOC_PCM3060_I2C is not set -# CONFIG_SND_SOC_PCM3168A_I2C is not set -# CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_RK3328 is not set -# CONFIG_SND_SOC_RT5616 is not set -# CONFIG_SND_SOC_RT5631 is not set -# CONFIG_SND_SOC_SGTL5000 is not set -CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m -# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set -# CONFIG_SND_SOC_SPDIF is not set -# CONFIG_SND_SOC_SSM2305 is not set -# CONFIG_SND_SOC_SSM2602_I2C is not set -# CONFIG_SND_SOC_SSM4567 is not set -# CONFIG_SND_SOC_STA32X is not set -# CONFIG_SND_SOC_STA350 is not set -# CONFIG_SND_SOC_STI_SAS is not set -# CONFIG_SND_SOC_TAS2552 is not set -# CONFIG_SND_SOC_TAS2562 is not set -# CONFIG_SND_SOC_TAS2764 is not set -# CONFIG_SND_SOC_TAS2770 is not set -# CONFIG_SND_SOC_TAS5086 is not set -# CONFIG_SND_SOC_TAS571X is not set -# CONFIG_SND_SOC_TAS5720 is not set -# CONFIG_SND_SOC_TAS6424 is not set -# CONFIG_SND_SOC_TDA7419 is not set -# CONFIG_SND_SOC_TFA9879 is not set -# CONFIG_SND_SOC_TLV320AIC23_I2C is not set -# CONFIG_SND_SOC_TLV320AIC31XX is not set -# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set -# CONFIG_SND_SOC_TLV320AIC3X is not set -# CONFIG_SND_SOC_TLV320ADCX140 is not set -# CONFIG_SND_SOC_TS3A227E is not set -# CONFIG_SND_SOC_TSCS42XX is not set -# CONFIG_SND_SOC_TSCS454 is not set -# CONFIG_SND_SOC_UDA1334 is not set -# CONFIG_SND_SOC_WM8510 is not set -# CONFIG_SND_SOC_WM8523 is not set -# CONFIG_SND_SOC_WM8524 is not set -# CONFIG_SND_SOC_WM8580 is not set -# CONFIG_SND_SOC_WM8711 is not set -# CONFIG_SND_SOC_WM8728 is not set -# CONFIG_SND_SOC_WM8731 is not set -# CONFIG_SND_SOC_WM8737 is not set -# CONFIG_SND_SOC_WM8741 is not set -# CONFIG_SND_SOC_WM8750 is not set -# CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8776 is not set -# CONFIG_SND_SOC_WM8782 is not set -# CONFIG_SND_SOC_WM8804_I2C is not set -# CONFIG_SND_SOC_WM8903 is not set -# CONFIG_SND_SOC_WM8904 is not set -# CONFIG_SND_SOC_WM8960 is not set -# CONFIG_SND_SOC_WM8962 is not set -# CONFIG_SND_SOC_WM8974 is not set -# CONFIG_SND_SOC_WM8978 is not set -# CONFIG_SND_SOC_WM8985 is not set -# CONFIG_SND_SOC_ZX_AUD96P22 is not set -# CONFIG_SND_SOC_MAX9759 is not set -# CONFIG_SND_SOC_MT6351 is not set -# CONFIG_SND_SOC_MT6358 is not set -# CONFIG_SND_SOC_MT6660 is not set -# CONFIG_SND_SOC_NAU8540 is not set -# CONFIG_SND_SOC_NAU8810 is not set -# CONFIG_SND_SOC_NAU8822 is not set -# CONFIG_SND_SOC_NAU8824 is not set -# CONFIG_SND_SOC_TPA6130A2 is not set -# end of CODEC drivers - -CONFIG_SND_SIMPLE_CARD_UTILS=m -CONFIG_SND_SIMPLE_CARD=m -CONFIG_SND_AUDIO_GRAPH_CARD=m -# CONFIG_SND_XEN_FRONTEND is not set - -# -# HID support -# -CONFIG_HID=m -CONFIG_HID_BATTERY_STRENGTH=y -CONFIG_HIDRAW=y -CONFIG_UHID=m -CONFIG_HID_GENERIC=m - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=m -# CONFIG_HID_ACCUTOUCH is not set -# CONFIG_HID_ACRUX is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_APPLEIR is not set -# CONFIG_HID_ASUS is not set -# CONFIG_HID_AUREAL is not set -CONFIG_HID_BELKIN=m -# CONFIG_HID_BETOP_FF is not set -# CONFIG_HID_BIGBEN_FF is not set -CONFIG_HID_CHERRY=m -CONFIG_HID_CHICONY=m -# CONFIG_HID_CORSAIR is not set -# CONFIG_HID_COUGAR is not set -# CONFIG_HID_MACALLY is not set -# CONFIG_HID_PRODIKEYS is not set -# CONFIG_HID_CMEDIA is not set -# CONFIG_HID_CP2112 is not set -# CONFIG_HID_CREATIVE_SB0540 is not set -CONFIG_HID_CYPRESS=m -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_ELAN is not set -# CONFIG_HID_ELECOM is not set -# CONFIG_HID_ELO is not set -CONFIG_HID_EZKEY=m -# CONFIG_HID_GEMBIRD is not set -# CONFIG_HID_GFRM is not set -# CONFIG_HID_GLORIOUS is not set -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_VIVALDI is not set -# CONFIG_HID_GT683R is not set -# CONFIG_HID_KEYTOUCH is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_WALTOP is not set -# CONFIG_HID_VIEWSONIC is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_ICADE is not set -CONFIG_HID_ITE=m -# CONFIG_HID_JABRA is not set -# CONFIG_HID_TWINHAN is not set -CONFIG_HID_KENSINGTON=m -# CONFIG_HID_LCPOWER is not set -# CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set -CONFIG_HID_LOGITECH=m -CONFIG_HID_LOGITECH_DJ=m -CONFIG_HID_LOGITECH_HIDPP=m -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIWHEELS_FF is not set -CONFIG_HID_MAGICMOUSE=m -# CONFIG_HID_MALTRON is not set -# CONFIG_HID_MAYFLASH is not set -CONFIG_HID_REDRAGON=m -CONFIG_HID_MICROSOFT=m -CONFIG_HID_MONTEREY=m -CONFIG_HID_MULTITOUCH=m -# CONFIG_HID_NTI is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_ORTEK is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PENMOUNT is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_PICOLCD is not set -# CONFIG_HID_PLANTRONICS is not set -# CONFIG_HID_PRIMAX is not set -# CONFIG_HID_RETRODE is not set -# CONFIG_HID_ROCCAT is not set -# CONFIG_HID_SAITEK is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SPEEDLINK is not set -# CONFIG_HID_STEAM is not set -# CONFIG_HID_STEELSERIES is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_RMI is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TIVO is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THINGM is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_UDRAW_PS3 is not set -# CONFIG_HID_U2FZERO is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_WIIMOTE is not set -# CONFIG_HID_XINMO is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -# CONFIG_HID_SENSOR_HUB is not set -# CONFIG_HID_ALPS is not set -# CONFIG_HID_MCP2221 is not set -# end of Special HID drivers - -# -# USB HID support -# -CONFIG_USB_HID=m -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set -# end of USB HID support - -# -# I2C HID support -# -CONFIG_I2C_HID=m -# end of I2C HID support -# end of HID support - -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_COMMON=m -# CONFIG_USB_LED_TRIG is not set -CONFIG_USB_ULPI_BUS=m -# CONFIG_USB_CONN_GPIO is not set -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB=m -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEFAULT_PERSIST=y -# CONFIG_USB_FEW_INIT_RETRIES is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_PRODUCTLIST is not set -# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set -# CONFIG_USB_OTG_FSM is not set -# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set -CONFIG_USB_AUTOSUSPEND_DELAY=2 -# CONFIG_USB_MON is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_XHCI_HCD=m -# CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set -CONFIG_USB_XHCI_PLATFORM=m -CONFIG_USB_EHCI_HCD=m -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_EHCI_FSL is not set -CONFIG_USB_EHCI_HCD_PLATFORM=m -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_FOTG210_HCD is not set -CONFIG_USB_OHCI_HCD=m -CONFIG_USB_OHCI_HCD_PLATFORM=m -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HCD_TEST_MODE is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -CONFIG_USB_WDM=m -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=m -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_REALTEK is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set -# CONFIG_USB_UAS is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USBIP_CORE is not set -# CONFIG_USB_CDNS3 is not set -CONFIG_USB_MUSB_HDRC=m -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_GADGET is not set -CONFIG_USB_MUSB_DUAL_ROLE=y - -# -# Platform Glue Layer -# -CONFIG_USB_MUSB_SUNXI=m - -# -# MUSB DMA mode -# -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_DWC3=m -# CONFIG_USB_DWC3_ULPI is not set -# CONFIG_USB_DWC3_HOST is not set -# CONFIG_USB_DWC3_GADGET is not set -CONFIG_USB_DWC3_DUAL_ROLE=y - -# -# Platform Glue Driver Support -# -CONFIG_USB_DWC3_OF_SIMPLE=m -CONFIG_USB_DWC2=m -# CONFIG_USB_DWC2_HOST is not set - -# -# Gadget/Dual-role mode requires USB Gadget support to be enabled -# -# CONFIG_USB_DWC2_PERIPHERAL is not set -CONFIG_USB_DWC2_DUAL_ROLE=y -# CONFIG_USB_DWC2_DEBUG is not set -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set -CONFIG_USB_CHIPIDEA=m -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_MSM=m -CONFIG_USB_CHIPIDEA_IMX=m -CONFIG_USB_CHIPIDEA_GENERIC=m -CONFIG_USB_CHIPIDEA_TEGRA=m -CONFIG_USB_ISP1760=m -CONFIG_USB_ISP1760_HCD=y -CONFIG_USB_ISP1761_UDC=y -# CONFIG_USB_ISP1760_HOST_ROLE is not set -# CONFIG_USB_ISP1760_GADGET_ROLE is not set -CONFIG_USB_ISP1760_DUAL_ROLE=y - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_SIMPLE is not set -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -CONFIG_USB_SERIAL_CH341=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_CP210X is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_F81232 is not set -# CONFIG_USB_SERIAL_F8153X is not set -# CONFIG_USB_SERIAL_GARMIN is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_IUU is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_METRO is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_MXUPORT is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_OTI6858 is not set -# CONFIG_USB_SERIAL_QCAUX is not set -# CONFIG_USB_SERIAL_QUALCOMM is not set -# CONFIG_USB_SERIAL_SPCP8X5 is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -CONFIG_USB_SERIAL_WWAN=m -CONFIG_USB_SERIAL_OPTION=m -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_SERIAL_OPTICON is not set -# CONFIG_USB_SERIAL_XSENS_MT is not set -# CONFIG_USB_SERIAL_WISHBONE is not set -# CONFIG_USB_SERIAL_SSU100 is not set -# CONFIG_USB_SERIAL_QT2 is not set -# CONFIG_USB_SERIAL_UPD78F0730 is not set -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_APPLE_MFI_FASTCHARGE is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_EHSET_TEST_FIXTURE is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_YUREX is not set -# CONFIG_USB_EZUSB_FX2 is not set -# CONFIG_USB_HUB_USB251XB is not set -CONFIG_USB_HSIC_USB3503=m -# CONFIG_USB_HSIC_USB4604 is not set -# CONFIG_USB_LINK_LAYER_TEST is not set -# CONFIG_USB_CHAOSKEY is not set - -# -# USB Physical Layer drivers -# -CONFIG_USB_PHY=y -CONFIG_NOP_USB_XCEIV=m -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ISP1301 is not set -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_VIEWPORT=y -# end of USB Physical Layer drivers - -CONFIG_USB_GADGET=m -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 - -# -# USB Peripheral Controller -# -# CONFIG_USB_FOTG210_UDC is not set -# CONFIG_USB_GR_UDC is not set -# CONFIG_USB_R8A66597 is not set -# CONFIG_USB_PXA27X is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MV_U3D is not set -CONFIG_USB_SNP_CORE=m -CONFIG_USB_SNP_UDC_PLAT=m -# CONFIG_USB_M66592 is not set -CONFIG_USB_BDC_UDC=m - -# -# Platform Support -# -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_GADGET_XILINX is not set -# CONFIG_USB_DUMMY_HCD is not set -# end of USB Peripheral Controller - -CONFIG_USB_LIBCOMPOSITE=m -CONFIG_USB_U_ETHER=m -CONFIG_USB_F_NCM=m -CONFIG_USB_F_ECM=m -CONFIG_USB_F_EEM=m -CONFIG_USB_F_RNDIS=m -CONFIG_USB_F_MASS_STORAGE=m -CONFIG_USB_F_TCM=m -CONFIG_USB_CONFIGFS=m -# CONFIG_USB_CONFIGFS_SERIAL is not set -# CONFIG_USB_CONFIGFS_ACM is not set -# CONFIG_USB_CONFIGFS_OBEX is not set -CONFIG_USB_CONFIGFS_NCM=y -CONFIG_USB_CONFIGFS_ECM=y -# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set -CONFIG_USB_CONFIGFS_RNDIS=y -CONFIG_USB_CONFIGFS_EEM=y -CONFIG_USB_CONFIGFS_MASS_STORAGE=y -# CONFIG_USB_CONFIGFS_F_LB_SS is not set -# CONFIG_USB_CONFIGFS_F_FS is not set -# CONFIG_USB_CONFIGFS_F_UAC1 is not set -# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set -# CONFIG_USB_CONFIGFS_F_UAC2 is not set -# CONFIG_USB_CONFIGFS_F_MIDI is not set -# CONFIG_USB_CONFIGFS_F_HID is not set -# CONFIG_USB_CONFIGFS_F_UVC is not set -# CONFIG_USB_CONFIGFS_F_PRINTER is not set -CONFIG_USB_CONFIGFS_F_TCM=y - -# -# USB Gadget precomposed configurations -# -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_ETH is not set -# CONFIG_USB_G_NCM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FUNCTIONFS is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_GADGET_TARGET is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_ACM_MS is not set -# CONFIG_USB_G_MULTI is not set -# CONFIG_USB_G_HID is not set -# CONFIG_USB_G_DBGP is not set -# CONFIG_USB_G_WEBCAM is not set -# CONFIG_USB_RAW_GADGET is not set -# end of USB Gadget precomposed configurations - -CONFIG_TYPEC=m -CONFIG_TYPEC_TCPM=m -CONFIG_TYPEC_TCPCI=m -# CONFIG_TYPEC_RT1711H is not set -# CONFIG_TYPEC_TCPCI_MAXIM is not set -# CONFIG_TYPEC_FUSB302 is not set -CONFIG_TYPEC_UCSI=m -# CONFIG_UCSI_CCG is not set -CONFIG_TYPEC_ANX7688=m -# CONFIG_TYPEC_HD3SS3220 is not set -# CONFIG_TYPEC_TPS6598X is not set -# CONFIG_TYPEC_STUSB160X is not set - -# -# USB Type-C Multiplexer/DeMultiplexer Switch support -# -# CONFIG_TYPEC_MUX_PI3USB30532 is not set -# end of USB Type-C Multiplexer/DeMultiplexer Switch support - -# -# USB Type-C Alternate Mode drivers -# -CONFIG_TYPEC_DP_ALTMODE=m -# CONFIG_TYPEC_NVIDIA_ALTMODE is not set -# end of USB Type-C Alternate Mode drivers - -CONFIG_USB_ROLE_SWITCH=m -CONFIG_MMC=m -CONFIG_PWRSEQ_EMMC=m -CONFIG_PWRSEQ_SIMPLE=m -CONFIG_MMC_BLOCK=m -CONFIG_MMC_BLOCK_MINORS=32 -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_ARMMMCI=m -CONFIG_MMC_STM32_SDMMC=y -CONFIG_MMC_SDHCI=m -CONFIG_MMC_SDHCI_PLTFM=m -CONFIG_MMC_SDHCI_OF_ARASAN=m -# CONFIG_MMC_SDHCI_OF_ASPEED is not set -# CONFIG_MMC_SDHCI_OF_AT91 is not set -# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set -CONFIG_MMC_SDHCI_CADENCE=m -# CONFIG_MMC_SDHCI_F_SDH30 is not set -# CONFIG_MMC_SDHCI_MILBEAUT is not set -# CONFIG_MMC_DW is not set -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MMC_USDHI6ROL0 is not set -CONFIG_MMC_SUNXI=m -CONFIG_MMC_CQHCI=m -# CONFIG_MMC_HSQ is not set -# CONFIG_MMC_MTK is not set -# CONFIG_MMC_SDHCI_XENON is not set -# CONFIG_MMC_SDHCI_OMAP is not set -# CONFIG_MMC_SDHCI_AM654 is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=m -CONFIG_LEDS_CLASS_FLASH=m -# CONFIG_LEDS_CLASS_MULTICOLOR is not set -CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y - -# -# LED drivers -# -# CONFIG_LEDS_AAT1290 is not set -# CONFIG_LEDS_AN30259A is not set -# CONFIG_LEDS_AS3645A is not set -# CONFIG_LEDS_AW2013 is not set -# CONFIG_LEDS_BCM6328 is not set -# CONFIG_LEDS_BCM6358 is not set -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM3532 is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_LM3692X is not set -# CONFIG_LEDS_LM3601X is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=m -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP50XX is not set -# CONFIG_LEDS_LP55XX_COMMON is not set -# CONFIG_LEDS_LP8860 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -CONFIG_LEDS_PWM=m -# CONFIG_LEDS_REGULATOR is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_TLC591XX is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_KTD2692 is not set -# CONFIG_LEDS_IS31FL319X is not set -# CONFIG_LEDS_IS31FL32XX is not set - -# -# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) -# -# CONFIG_LEDS_BLINKM is not set -# CONFIG_LEDS_MLXREG is not set -# CONFIG_LEDS_USER is not set -# CONFIG_LEDS_TI_LMU_COMMON is not set -CONFIG_LEDS_SGM3140=m -CONFIG_LEDS_AXP20X=m - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_ONESHOT=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=m -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_LEDS_TRIGGER_ACTIVITY=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -CONFIG_LEDS_TRIGGER_TRANSIENT=m -CONFIG_LEDS_TRIGGER_CAMERA=m -CONFIG_LEDS_TRIGGER_PANIC=y -CONFIG_LEDS_TRIGGER_NETDEV=m -CONFIG_LEDS_TRIGGER_PATTERN=m -CONFIG_LEDS_TRIGGER_AUDIO=m -# CONFIG_ACCESSIBILITY is not set -# CONFIG_INFINIBAND is not set -CONFIG_EDAC_SUPPORT=y -CONFIG_EDAC=y -CONFIG_EDAC_LEGACY_SYSFS=y -# CONFIG_EDAC_DEBUG is not set -# CONFIG_EDAC_XGENE is not set -# CONFIG_EDAC_DMC520 is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -CONFIG_RTC_SYSTOHC=y -CONFIG_RTC_SYSTOHC_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set -CONFIG_RTC_NVMEM=y - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_ABB5ZES3 is not set -# CONFIG_RTC_DRV_ABEOZ9 is not set -# CONFIG_RTC_DRV_ABX80X is not set -# CONFIG_RTC_DRV_AC100 is not set -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_HYM8563 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_ISL12026 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8523 is not set -# CONFIG_RTC_DRV_PCF85063 is not set -# CONFIG_RTC_DRV_PCF85363 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8010 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_RV3028 is not set -# CONFIG_RTC_DRV_RV3032 is not set -# CONFIG_RTC_DRV_RV8803 is not set -# CONFIG_RTC_DRV_SD3078 is not set - -# -# SPI RTC drivers -# -CONFIG_RTC_I2C_AND_SPI=m - -# -# SPI and I2C RTC drivers -# -CONFIG_RTC_DRV_DS3232=m -CONFIG_RTC_DRV_DS3232_HWMON=y -# CONFIG_RTC_DRV_PCF2127 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1685_FAMILY is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_DS2404 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set -# CONFIG_RTC_DRV_ZYNQMP is not set - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_PL030 is not set -CONFIG_RTC_DRV_PL031=y -CONFIG_RTC_DRV_SUN6I=y -# CONFIG_RTC_DRV_CADENCE is not set -# CONFIG_RTC_DRV_FTRTC010 is not set -# CONFIG_RTC_DRV_R7301 is not set - -# -# HID Sensor RTC drivers -# -CONFIG_DMADEVICES=y -# CONFIG_DMADEVICES_DEBUG is not set - -# -# DMA Devices -# -CONFIG_DMA_ENGINE=y -CONFIG_DMA_VIRTUAL_CHANNELS=m -CONFIG_DMA_OF=y -# CONFIG_ALTERA_MSGDMA is not set -# CONFIG_AMBA_PL08X is not set -# CONFIG_BCM_SBA_RAID is not set -CONFIG_DMA_SUN6I=m -# CONFIG_DW_AXI_DMAC is not set -# CONFIG_FSL_EDMA is not set -# CONFIG_FSL_QDMA is not set -# CONFIG_INTEL_IDMA64 is not set -# CONFIG_MV_XOR_V2 is not set -CONFIG_PL330_DMA=m -# CONFIG_XILINX_DMA is not set -# CONFIG_XILINX_ZYNQMP_DMA is not set -# CONFIG_XILINX_ZYNQMP_DPDMA is not set -# CONFIG_QCOM_HIDMA_MGMT is not set -# CONFIG_QCOM_HIDMA is not set -# CONFIG_DW_DMAC is not set -# CONFIG_SF_PDMA is not set - -# -# DMA Clients -# -# CONFIG_ASYNC_TX_DMA is not set -# CONFIG_DMATEST is not set - -# -# DMABUF options -# -CONFIG_SYNC_FILE=y -# CONFIG_SW_SYNC is not set -# CONFIG_UDMABUF is not set -# CONFIG_DMABUF_MOVE_NOTIFY is not set -# CONFIG_DMABUF_SELFTESTS is not set -# CONFIG_DMABUF_HEAPS is not set -# end of DMABUF options - -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set -# CONFIG_VFIO is not set -# CONFIG_VIRT_DRIVERS is not set -# CONFIG_VIRTIO_MENU is not set -# CONFIG_VDPA is not set -# CONFIG_VHOST_MENU is not set - -# -# Microsoft Hyper-V guest support -# -# end of Microsoft Hyper-V guest support - -# -# Xen driver support -# -# CONFIG_XEN_BALLOON is not set -# CONFIG_XEN_DEV_EVTCHN is not set -# CONFIG_XEN_BACKEND is not set -# CONFIG_XENFS is not set -# CONFIG_XEN_SYS_HYPERVISOR is not set -# CONFIG_XEN_GNTDEV is not set -# CONFIG_XEN_GRANT_DEV_ALLOC is not set -# CONFIG_XEN_GRANT_DMA_ALLOC is not set -CONFIG_SWIOTLB_XEN=y -# CONFIG_XEN_PVCALLS_FRONTEND is not set -CONFIG_XEN_PRIVCMD=m -CONFIG_XEN_AUTO_XLATE=y -# end of Xen driver support - -# CONFIG_GREYBUS is not set -CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_COMEDI is not set -# CONFIG_RTLLIB is not set -CONFIG_RTL8723BS=m -# CONFIG_R8712U is not set -# CONFIG_R8188EU is not set -# CONFIG_VT6656 is not set - -# -# IIO staging drivers -# - -# -# Accelerometers -# -# end of Accelerometers - -# -# Analog to digital converters -# -# end of Analog to digital converters - -# -# Analog digital bi-direction converters -# -# CONFIG_ADT7316 is not set -# end of Analog digital bi-direction converters - -# -# Capacitance to digital converters -# -# CONFIG_AD7150 is not set -# CONFIG_AD7746 is not set -# end of Capacitance to digital converters - -# -# Direct Digital Synthesis -# -# end of Direct Digital Synthesis - -# -# Network Analyzer, Impedance Converters -# -# CONFIG_AD5933 is not set -# end of Network Analyzer, Impedance Converters - -# -# Active energy metering IC -# -# CONFIG_ADE7854 is not set -# end of Active energy metering IC - -# -# Resolver to digital converters -# -# end of Resolver to digital converters -# end of IIO staging drivers - -CONFIG_STAGING_MEDIA=y -CONFIG_VIDEO_SUNXI=y -CONFIG_VIDEO_SUNXI_CEDRUS=m - -# -# Android -# -CONFIG_ASHMEM=y -# CONFIG_ION is not set -# end of Android - -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_GS_FPGABOOT is not set -# CONFIG_UNISYSSPAR is not set -# CONFIG_KS7010 is not set - -# -# Gasket devices -# -# end of Gasket devices - -# CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set -# CONFIG_WFX is not set -# CONFIG_SPMI_HISI3670 is not set -# CONFIG_MFD_HI6421_SPMI is not set -CONFIG_RTL8723CS=m -# CONFIG_GOLDFISH is not set -# CONFIG_CHROME_PLATFORMS is not set -# CONFIG_MELLANOX_PLATFORM is not set -CONFIG_HAVE_CLK=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_MAX9485 is not set -CONFIG_COMMON_CLK_SCPI=y -# CONFIG_COMMON_CLK_SI5341 is not set -# CONFIG_COMMON_CLK_SI5351 is not set -# CONFIG_COMMON_CLK_SI514 is not set -# CONFIG_COMMON_CLK_SI544 is not set -# CONFIG_COMMON_CLK_SI570 is not set -# CONFIG_COMMON_CLK_CDCE706 is not set -# CONFIG_COMMON_CLK_CDCE925 is not set -CONFIG_COMMON_CLK_CS2000_CP=m -CONFIG_CLK_QORIQ=y -CONFIG_COMMON_CLK_XGENE=y -CONFIG_COMMON_CLK_PWM=m -# CONFIG_COMMON_CLK_VC5 is not set -# CONFIG_COMMON_CLK_FIXED_MMIO is not set -CONFIG_CLK_SUNXI=y -CONFIG_CLK_SUNXI_CLOCKS=y -CONFIG_CLK_SUNXI_PRCM_SUN6I=y -CONFIG_CLK_SUNXI_PRCM_SUN8I=y -CONFIG_CLK_SUNXI_PRCM_SUN9I=y -CONFIG_SUNXI_CCU=y -CONFIG_SUN50I_A64_CCU=y -CONFIG_SUN50I_A100_CCU=y -CONFIG_SUN50I_A100_R_CCU=y -CONFIG_SUN50I_H6_CCU=y -CONFIG_SUN50I_H6_R_CCU=y -# CONFIG_SUN8I_A83T_CCU is not set -CONFIG_SUN8I_H3_CCU=y -CONFIG_SUN8I_DE2_CCU=y -CONFIG_SUN8I_R_CCU=y -CONFIG_HWSPINLOCK=y - -# -# Clock Source drivers -# -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -# CONFIG_FSL_ERRATUM_A008585 is not set -# CONFIG_HISILICON_ERRATUM_161010101 is not set -# CONFIG_ARM64_ERRATUM_858921 is not set -CONFIG_SUN50I_ERRATUM_UNKNOWN1=y -# CONFIG_MICROCHIP_PIT64B is not set -# end of Clock Source drivers - -CONFIG_MAILBOX=y -CONFIG_ARM_MHU=m -CONFIG_PLATFORM_MHU=m -# CONFIG_PL320_MBOX is not set -# CONFIG_ALTERA_MBOX is not set -# CONFIG_MAILBOX_TEST is not set -CONFIG_SUN6I_MSGBOX=m -CONFIG_IOMMU_IOVA=y -CONFIG_IOMMU_API=y -CONFIG_IOMMU_SUPPORT=y - -# -# Generic IOMMU Pagetable Support -# -CONFIG_IOMMU_IO_PGTABLE=y -CONFIG_IOMMU_IO_PGTABLE_LPAE=y -# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# end of Generic IOMMU Pagetable Support - -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -CONFIG_OF_IOMMU=y -CONFIG_IOMMU_DMA=y -# CONFIG_SUN50I_IOMMU is not set -CONFIG_ARM_SMMU=m -CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y -CONFIG_ARM_SMMU_V3=m -# CONFIG_ARM_SMMU_V3_SVA is not set - -# -# Remoteproc drivers -# -# CONFIG_REMOTEPROC is not set -# end of Remoteproc drivers - -# -# Rpmsg drivers -# -# CONFIG_RPMSG_QCOM_GLINK_RPM is not set -# CONFIG_RPMSG_VIRTIO is not set -# end of Rpmsg drivers - -# CONFIG_SOUNDWIRE is not set - -# -# SOC (System On Chip) specific Drivers -# - -# -# Amlogic SoC drivers -# -# end of Amlogic SoC drivers - -# -# Aspeed SoC drivers -# -# end of Aspeed SoC drivers - -# -# Broadcom SoC drivers -# -# CONFIG_SOC_BRCMSTB is not set -# end of Broadcom SoC drivers - -# -# NXP/Freescale QorIQ SoC drivers -# -# CONFIG_QUICC_ENGINE is not set -# CONFIG_FSL_RCPM is not set -# end of NXP/Freescale QorIQ SoC drivers - -# -# i.MX SoC drivers -# -# end of i.MX SoC drivers - -# -# Qualcomm SoC drivers -# -# end of Qualcomm SoC drivers - -CONFIG_SUNXI_SRAM=y -# CONFIG_SOC_TI is not set - -# -# Xilinx SoC drivers -# -# CONFIG_XILINX_VCU is not set -# end of Xilinx SoC drivers -# end of SOC (System On Chip) specific Drivers - -CONFIG_PM_DEVFREQ=y - -# -# DEVFREQ Governors -# -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m -CONFIG_DEVFREQ_GOV_PERFORMANCE=m -CONFIG_DEVFREQ_GOV_POWERSAVE=m -CONFIG_DEVFREQ_GOV_USERSPACE=m -CONFIG_DEVFREQ_GOV_PASSIVE=m - -# -# DEVFREQ Drivers -# -CONFIG_PM_DEVFREQ_EVENT=y -CONFIG_EXTCON=y - -# -# Extcon Device Drivers -# -# CONFIG_EXTCON_ADC_JACK is not set -# CONFIG_EXTCON_FSA9480 is not set -# CONFIG_EXTCON_GPIO is not set -# CONFIG_EXTCON_MAX3355 is not set -# CONFIG_EXTCON_PTN5150 is not set -# CONFIG_EXTCON_RT8973A is not set -# CONFIG_EXTCON_SM5502 is not set -CONFIG_EXTCON_USB_GPIO=m -CONFIG_MEMORY=y -CONFIG_ARM_PL172_MPMC=m -CONFIG_IIO=m -CONFIG_IIO_BUFFER=y -# CONFIG_IIO_BUFFER_CB is not set -# CONFIG_IIO_BUFFER_DMA is not set -# CONFIG_IIO_BUFFER_DMAENGINE is not set -# CONFIG_IIO_BUFFER_HW_CONSUMER is not set -CONFIG_IIO_KFIFO_BUF=m -CONFIG_IIO_TRIGGERED_BUFFER=m -# CONFIG_IIO_CONFIGFS is not set -CONFIG_IIO_TRIGGER=y -CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 -# CONFIG_IIO_SW_DEVICE is not set -# CONFIG_IIO_SW_TRIGGER is not set -# CONFIG_IIO_TRIGGERED_EVENT is not set - -# -# Accelerometers -# -# CONFIG_ADXL345_I2C is not set -# CONFIG_ADXL372_I2C is not set -# CONFIG_BMA180 is not set -# CONFIG_BMA400 is not set -CONFIG_BMC150_ACCEL=m -CONFIG_BMC150_ACCEL_I2C=m -# CONFIG_DA280 is not set -# CONFIG_DA311 is not set -# CONFIG_DMARD06 is not set -# CONFIG_DMARD09 is not set -# CONFIG_DMARD10 is not set -# CONFIG_IIO_ST_ACCEL_3AXIS is not set -# CONFIG_KXSD9 is not set -# CONFIG_KXCJK1013 is not set -# CONFIG_MC3230 is not set -# CONFIG_MMA7455_I2C is not set -# CONFIG_MMA7660 is not set -# CONFIG_MMA8452 is not set -# CONFIG_MMA9551 is not set -# CONFIG_MMA9553 is not set -# CONFIG_MXC4005 is not set -# CONFIG_MXC6255 is not set -# CONFIG_STK8312 is not set -# CONFIG_STK8BA50 is not set -# end of Accelerometers - -# -# Analog to digital converters -# -# CONFIG_AD7091R5 is not set -# CONFIG_AD7291 is not set -# CONFIG_AD7606_IFACE_PARALLEL is not set -# CONFIG_AD799X is not set -# CONFIG_ADI_AXI_ADC is not set -CONFIG_AXP20X_ADC=m -# CONFIG_AXP288_ADC is not set -# CONFIG_CC10001_ADC is not set -# CONFIG_ENVELOPE_DETECTOR is not set -# CONFIG_HX711 is not set -# CONFIG_INA2XX_ADC is not set -# CONFIG_LTC2471 is not set -# CONFIG_LTC2485 is not set -# CONFIG_LTC2497 is not set -# CONFIG_MAX1363 is not set -# CONFIG_MAX9611 is not set -# CONFIG_MCP3422 is not set -# CONFIG_NAU7802 is not set -# CONFIG_QCOM_SPMI_IADC is not set -# CONFIG_QCOM_SPMI_VADC is not set -# CONFIG_QCOM_SPMI_ADC5 is not set -# CONFIG_SD_ADC_MODULATOR is not set -# CONFIG_TI_ADC081C is not set -# CONFIG_TI_ADS1015 is not set -# CONFIG_VF610_ADC is not set -# CONFIG_XILINX_XADC is not set -# end of Analog to digital converters - -# -# Analog Front Ends -# -# CONFIG_IIO_RESCALE is not set -# end of Analog Front Ends - -# -# Amplifiers -# -# CONFIG_HMC425 is not set -# end of Amplifiers - -# -# Chemical Sensors -# -# CONFIG_ATLAS_PH_SENSOR is not set -# CONFIG_ATLAS_EZO_SENSOR is not set -# CONFIG_BME680 is not set -# CONFIG_CCS811 is not set -# CONFIG_IAQCORE is not set -# CONFIG_PMS7003 is not set -# CONFIG_SCD30_CORE is not set -# CONFIG_SENSIRION_SGP30 is not set -# CONFIG_SPS30 is not set -# CONFIG_VZ89X is not set -# end of Chemical Sensors - -# -# Hid Sensor IIO Common -# -# end of Hid Sensor IIO Common - -# -# SSP Sensor Common -# -# end of SSP Sensor Common - -CONFIG_IIO_ST_SENSORS_I2C=m -CONFIG_IIO_ST_SENSORS_CORE=m - -# -# Digital to analog converters -# -# CONFIG_AD5064 is not set -# CONFIG_AD5380 is not set -# CONFIG_AD5446 is not set -# CONFIG_AD5593R is not set -# CONFIG_AD5696_I2C is not set -# CONFIG_DPOT_DAC is not set -# CONFIG_DS4424 is not set -# CONFIG_M62332 is not set -# CONFIG_MAX517 is not set -# CONFIG_MAX5821 is not set -# CONFIG_MCP4725 is not set -# CONFIG_TI_DAC5571 is not set -# CONFIG_VF610_DAC is not set -# end of Digital to analog converters - -# -# IIO dummy driver -# -# end of IIO dummy driver - -# -# Frequency Synthesizers DDS/PLL -# - -# -# Clock Generator/Distribution -# -# end of Clock Generator/Distribution - -# -# Phase-Locked Loop (PLL) frequency synthesizers -# -# end of Phase-Locked Loop (PLL) frequency synthesizers -# end of Frequency Synthesizers DDS/PLL - -# -# Digital gyroscope sensors -# -# CONFIG_BMG160 is not set -# CONFIG_FXAS21002C is not set -# CONFIG_MPU3050_I2C is not set -# CONFIG_IIO_ST_GYRO_3AXIS is not set -# CONFIG_ITG3200 is not set -# end of Digital gyroscope sensors - -# -# Health Sensors -# - -# -# Heart Rate Monitors -# -# CONFIG_AFE4404 is not set -# CONFIG_MAX30100 is not set -# CONFIG_MAX30102 is not set -# end of Heart Rate Monitors -# end of Health Sensors - -# -# Humidity sensors -# -# CONFIG_AM2315 is not set -# CONFIG_DHT11 is not set -# CONFIG_HDC100X is not set -# CONFIG_HDC2010 is not set -# CONFIG_HTS221 is not set -# CONFIG_HTU21 is not set -# CONFIG_SI7005 is not set -# CONFIG_SI7020 is not set -# end of Humidity sensors - -# -# Inertial measurement units -# -# CONFIG_BMI160_I2C is not set -# CONFIG_FXOS8700_I2C is not set -# CONFIG_KMX61 is not set -# CONFIG_INV_ICM42600_I2C is not set -CONFIG_INV_MPU6050_IIO=m -CONFIG_INV_MPU6050_I2C=m -# CONFIG_IIO_ST_LSM6DSX is not set -# end of Inertial measurement units - -# -# Light sensors -# -# CONFIG_ADJD_S311 is not set -# CONFIG_ADUX1020 is not set -# CONFIG_AL3010 is not set -# CONFIG_AL3320A is not set -# CONFIG_APDS9300 is not set -# CONFIG_APDS9960 is not set -# CONFIG_AS73211 is not set -# CONFIG_BH1750 is not set -# CONFIG_BH1780 is not set -# CONFIG_CM32181 is not set -# CONFIG_CM3232 is not set -# CONFIG_CM3323 is not set -# CONFIG_CM3605 is not set -# CONFIG_CM36651 is not set -# CONFIG_GP2AP002 is not set -# CONFIG_GP2AP020A00F is not set -# CONFIG_SENSORS_ISL29018 is not set -# CONFIG_SENSORS_ISL29028 is not set -# CONFIG_ISL29125 is not set -# CONFIG_JSA1212 is not set -# CONFIG_RPR0521 is not set -# CONFIG_LTR501 is not set -# CONFIG_LV0104CS is not set -# CONFIG_MAX44000 is not set -# CONFIG_MAX44009 is not set -# CONFIG_NOA1305 is not set -# CONFIG_OPT3001 is not set -# CONFIG_PA12203001 is not set -# CONFIG_SI1133 is not set -# CONFIG_SI1145 is not set -CONFIG_STK3310=m -# CONFIG_ST_UVIS25 is not set -# CONFIG_TCS3414 is not set -# CONFIG_TCS3472 is not set -# CONFIG_SENSORS_TSL2563 is not set -# CONFIG_TSL2583 is not set -# CONFIG_TSL2772 is not set -# CONFIG_TSL4531 is not set -# CONFIG_US5182D is not set -# CONFIG_VCNL4000 is not set -# CONFIG_VCNL4035 is not set -# CONFIG_VEML6030 is not set -# CONFIG_VEML6070 is not set -# CONFIG_VL6180 is not set -# CONFIG_ZOPT2201 is not set -# end of Light sensors - -# -# Magnetometer sensors -# -# CONFIG_AK8974 is not set -# CONFIG_AK8975 is not set -# CONFIG_AK09911 is not set -# CONFIG_BMC150_MAGN_I2C is not set -# CONFIG_MAG3110 is not set -# CONFIG_MMC35240 is not set -CONFIG_IIO_ST_MAGN_3AXIS=m -CONFIG_IIO_ST_MAGN_I2C_3AXIS=m -# CONFIG_SENSORS_HMC5843_I2C is not set -# CONFIG_SENSORS_RM3100_I2C is not set -# end of Magnetometer sensors - -# -# Multiplexers -# -# CONFIG_IIO_MUX is not set -# end of Multiplexers - -# -# Inclinometer sensors -# -# end of Inclinometer sensors - -# -# Triggers - standalone -# -# CONFIG_IIO_INTERRUPT_TRIGGER is not set -# CONFIG_IIO_SYSFS_TRIGGER is not set -# end of Triggers - standalone - -# -# Linear and angular position sensors -# -# end of Linear and angular position sensors - -# -# Digital potentiometers -# -# CONFIG_AD5272 is not set -# CONFIG_DS1803 is not set -# CONFIG_MAX5432 is not set -# CONFIG_MCP4018 is not set -# CONFIG_MCP4531 is not set -# CONFIG_TPL0102 is not set -# end of Digital potentiometers - -# -# Digital potentiostats -# -# CONFIG_LMP91000 is not set -# end of Digital potentiostats - -# -# Pressure sensors -# -# CONFIG_ABP060MG is not set -# CONFIG_BMP280 is not set -# CONFIG_DLHL60D is not set -# CONFIG_DPS310 is not set -# CONFIG_HP03 is not set -# CONFIG_ICP10100 is not set -# CONFIG_MPL115_I2C is not set -# CONFIG_MPL3115 is not set -# CONFIG_MS5611 is not set -# CONFIG_MS5637 is not set -# CONFIG_IIO_ST_PRESS is not set -# CONFIG_T5403 is not set -# CONFIG_HP206C is not set -# CONFIG_ZPA2326 is not set -# end of Pressure sensors - -# -# Lightning sensors -# -# end of Lightning sensors - -# -# Proximity and distance sensors -# -# CONFIG_ISL29501 is not set -# CONFIG_LIDAR_LITE_V2 is not set -# CONFIG_MB1232 is not set -# CONFIG_PING is not set -# CONFIG_RFD77402 is not set -# CONFIG_SRF04 is not set -# CONFIG_SX9310 is not set -# CONFIG_SX9500 is not set -# CONFIG_SRF08 is not set -# CONFIG_VCNL3020 is not set -# CONFIG_VL53L0X_I2C is not set -# end of Proximity and distance sensors - -# -# Resolver to digital converters -# -# end of Resolver to digital converters - -# -# Temperature sensors -# -# CONFIG_MLX90614 is not set -# CONFIG_MLX90632 is not set -# CONFIG_TMP006 is not set -# CONFIG_TMP007 is not set -# CONFIG_TSYS01 is not set -# CONFIG_TSYS02D is not set -# end of Temperature sensors - -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -# CONFIG_PWM_FSL_FTM is not set -# CONFIG_PWM_PCA9685 is not set -CONFIG_PWM_SUN4I=m - -# -# IRQ chip support -# -CONFIG_IRQCHIP=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_MAX_NR=1 -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -# CONFIG_AL_FIC is not set -CONFIG_PARTITION_PERCPU=y -# end of IRQ chip support - -# CONFIG_IPACK_BUS is not set -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_RESET_CONTROLLER=y -# CONFIG_RESET_BRCMSTB_RESCAL is not set -# CONFIG_RESET_INTEL_GW is not set -CONFIG_RESET_SIMPLE=y -CONFIG_RESET_SUNXI=y -# CONFIG_RESET_TI_SYSCON is not set - -# -# PHY Subsystem -# -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PHY_MIPI_DPHY=y -CONFIG_PHY_XGENE=m -# CONFIG_USB_LGM_PHY is not set -CONFIG_PHY_SUN4I_USB=m -CONFIG_PHY_SUN6I_MIPI_DPHY=m -# CONFIG_PHY_SUN9I_USB is not set -# CONFIG_PHY_SUN50I_USB3 is not set -# CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_PHY_CADENCE_TORRENT is not set -# CONFIG_PHY_CADENCE_DPHY is not set -# CONFIG_PHY_CADENCE_SIERRA is not set -# CONFIG_PHY_CADENCE_SALVO is not set -# CONFIG_PHY_FSL_IMX8MQ_USB is not set -# CONFIG_PHY_MIXEL_MIPI_DPHY is not set -# CONFIG_PHY_PXA_28NM_HSIC is not set -# CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_CPCAP_USB is not set -# CONFIG_PHY_MAPPHONE_MDM6600 is not set -# CONFIG_PHY_OCELOT_SERDES is not set -CONFIG_PHY_QCOM_USB_HS=m -# CONFIG_PHY_QCOM_USB_HSIC is not set -CONFIG_PHY_SAMSUNG_USB2=m -# CONFIG_PHY_TUSB1210 is not set -# end of PHY Subsystem - -# CONFIG_POWERCAP is not set -# CONFIG_MCB is not set - -# -# Performance monitor support -# -# CONFIG_ARM_CCI_PMU is not set -# CONFIG_ARM_CCN is not set -# CONFIG_ARM_CMN is not set -CONFIG_ARM_PMU=y -# CONFIG_ARM_DSU_PMU is not set -# CONFIG_ARM_SPE_PMU is not set -# end of Performance monitor support - -CONFIG_RAS=y - -# -# Android -# -CONFIG_ANDROID=y -CONFIG_ANDROID_BINDER_IPC=y -# CONFIG_ANDROID_BINDERFS is not set -CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder" -CONFIG_ANDROID_BINDER_IPC_SELFTEST=y -# end of Android - -# CONFIG_LIBNVDIMM is not set -# CONFIG_DAX is not set -CONFIG_NVMEM=y -# CONFIG_NVMEM_SYSFS is not set -# CONFIG_NVMEM_SPMI_SDAM is not set -CONFIG_NVMEM_SUNXI_SID=m - -# -# HW tracing support -# -# CONFIG_STM is not set -# CONFIG_INTEL_TH is not set -# end of HW tracing support - -# CONFIG_FPGA is not set -# CONFIG_FSI is not set -CONFIG_TEE=m - -# -# TEE drivers -# -CONFIG_OPTEE=m -CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 -# end of TEE drivers - -CONFIG_PM_OPP=y -# CONFIG_SIOX is not set -# CONFIG_SLIMBUS is not set -# CONFIG_INTERCONNECT is not set -# CONFIG_COUNTER is not set -# CONFIG_MOST is not set -# end of Device Drivers - -# -# File systems -# -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_VALIDATE_FS_PARSER=y -CONFIG_FS_IOMAP=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_ASSERT is not set -# CONFIG_BTRFS_FS_REF_VERIFY is not set -# CONFIG_NILFS2_FS is not set -CONFIG_F2FS_FS=y -CONFIG_F2FS_STAT_FS=y -CONFIG_F2FS_FS_XATTR=y -CONFIG_F2FS_FS_POSIX_ACL=y -CONFIG_F2FS_FS_SECURITY=y -# CONFIG_F2FS_CHECK_FS is not set -# CONFIG_F2FS_FAULT_INJECTION is not set -CONFIG_F2FS_FS_COMPRESSION=y -CONFIG_F2FS_FS_LZO=y -CONFIG_F2FS_FS_LZ4=y -CONFIG_F2FS_FS_ZSTD=y -CONFIG_F2FS_FS_LZORLE=y -# CONFIG_FS_DAX is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=y -# CONFIG_EXPORTFS_BLOCK_OPS is not set -CONFIG_FILE_LOCKING=y -CONFIG_MANDATORY_FILE_LOCKING=y -# CONFIG_FS_ENCRYPTION is not set -# CONFIG_FS_VERITY is not set -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_FANOTIFY=y -CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=m -CONFIG_AUTOFS_FS=m -CONFIG_FUSE_FS=m -# CONFIG_CUSE is not set -# CONFIG_VIRTIO_FS is not set -# CONFIG_OVERLAY_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set -# end of Caches - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set -# end of CD-ROM/DVD Filesystems - -# -# DOS/FAT/EXFAT/NT Filesystems -# -CONFIG_FAT_FS=y -# CONFIG_MSDOS_FS is not set -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_FAT_DEFAULT_UTF8 is not set -# CONFIG_EXFAT_FS is not set -# CONFIG_NTFS_FS is not set -# end of DOS/FAT/EXFAT/NT Filesystems - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -# CONFIG_PROC_KCORE is not set -CONFIG_PROC_VMCORE=y -# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_PROC_CHILDREN is not set -CONFIG_KERNFS=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TMPFS_XATTR=y -# CONFIG_TMPFS_INODE64 is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -CONFIG_MEMFD_CREATE=y -CONFIG_ARCH_HAS_GIGANTIC_PAGE=y -CONFIG_CONFIGFS_FS=y -# end of Pseudo filesystems - -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ORANGEFS_FS is not set -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -CONFIG_ECRYPT_FS=m -# CONFIG_ECRYPT_FS_MESSAGING is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_SQUASHFS=m -# CONFIG_SQUASHFS_FILE_CACHE is not set -CONFIG_SQUASHFS_FILE_DIRECT=y -# CONFIG_SQUASHFS_DECOMP_SINGLE is not set -# CONFIG_SQUASHFS_DECOMP_MULTI is not set -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -CONFIG_SQUASHFS_XATTR=y -CONFIG_SQUASHFS_ZLIB=y -# CONFIG_SQUASHFS_LZ4 is not set -# CONFIG_SQUASHFS_LZO is not set -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_ZSTD is not set -# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_EROFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=m -CONFIG_NFS_V2=m -CONFIG_NFS_V3=m -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=m -# CONFIG_NFS_SWAP is not set -CONFIG_NFS_V4_1=y -CONFIG_NFS_V4_2=y -CONFIG_PNFS_FILE_LAYOUT=m -CONFIG_PNFS_BLOCK=m -CONFIG_PNFS_FLEXFILE_LAYOUT=m -CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" -# CONFIG_NFS_V4_1_MIGRATION is not set -CONFIG_NFS_V4_SECURITY_LABEL=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -CONFIG_NFS_DISABLE_UDP_SUPPORT=y -# CONFIG_NFS_V4_2_READ_PLUS is not set -# CONFIG_NFSD is not set -CONFIG_GRACE_PERIOD=m -CONFIG_LOCKD=m -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=m -CONFIG_SUNRPC_GSS=m -CONFIG_SUNRPC_BACKCHANNEL=y -# CONFIG_SUNRPC_DEBUG is not set -# CONFIG_CEPH_FS is not set -CONFIG_CIFS=m -CONFIG_CIFS_STATS2=y -CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -CONFIG_CIFS_DEBUG=y -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set -# CONFIG_CIFS_DFS_UPCALL is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_MAC_ROMAN is not set -# CONFIG_NLS_MAC_CELTIC is not set -# CONFIG_NLS_MAC_CENTEURO is not set -# CONFIG_NLS_MAC_CROATIAN is not set -# CONFIG_NLS_MAC_CYRILLIC is not set -# CONFIG_NLS_MAC_GAELIC is not set -# CONFIG_NLS_MAC_GREEK is not set -# CONFIG_NLS_MAC_ICELAND is not set -# CONFIG_NLS_MAC_INUIT is not set -# CONFIG_NLS_MAC_ROMANIAN is not set -# CONFIG_NLS_MAC_TURKISH is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set -# CONFIG_UNICODE is not set -CONFIG_IO_WQ=y -# end of File systems - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_REQUEST_CACHE is not set -# CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_TRUSTED_KEYS is not set -# CONFIG_ENCRYPTED_KEYS is not set -# CONFIG_KEY_DH_OPERATIONS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -CONFIG_SECURITY=y -CONFIG_SECURITYFS=y -# CONFIG_SECURITY_NETWORK is not set -# CONFIG_SECURITY_PATH is not set -CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set -# CONFIG_STATIC_USERMODEHELPER is not set -# CONFIG_SECURITY_SMACK is not set -# CONFIG_SECURITY_TOMOYO is not set -# CONFIG_SECURITY_APPARMOR is not set -# CONFIG_SECURITY_LOADPIN is not set -# CONFIG_SECURITY_YAMA is not set -# CONFIG_SECURITY_SAFESETID is not set -# CONFIG_SECURITY_LOCKDOWN_LSM is not set -CONFIG_INTEGRITY=y -# CONFIG_INTEGRITY_SIGNATURE is not set -# CONFIG_IMA is not set -# CONFIG_EVM is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_LSM="yama,loadpin,integrity,selinux,smack,tomoyo,apparmor" - -# -# Kernel hardening options -# - -# -# Memory initialization -# -CONFIG_INIT_STACK_NONE=y -# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set -# CONFIG_GCC_PLUGIN_STACKLEAK is not set -# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set -# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set -# end of Memory initialization -# end of Kernel hardening options -# end of Security options - -CONFIG_XOR_BLOCKS=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_SKCIPHER=y -CONFIG_CRYPTO_SKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_KPP=m -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_USER=m -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -# CONFIG_CRYPTO_PCRYPT is not set -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=y -# CONFIG_CRYPTO_TEST is not set -CONFIG_CRYPTO_SIMD=m - -# -# Public-key cryptography -# -CONFIG_CRYPTO_RSA=y -# CONFIG_CRYPTO_DH is not set -CONFIG_CRYPTO_ECC=m -CONFIG_CRYPTO_ECDH=m -# CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set -# CONFIG_CRYPTO_CURVE25519 is not set - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=y -# CONFIG_CRYPTO_CHACHA20POLY1305 is not set -# CONFIG_CRYPTO_AEGIS128 is not set -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_ECHAINIV=y - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set -CONFIG_CRYPTO_CTR=y -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=y -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set -# CONFIG_CRYPTO_PCBC is not set -CONFIG_CRYPTO_XTS=y -# CONFIG_CRYPTO_KEYWRAP is not set -CONFIG_CRYPTO_NHPOLY1305=m -# CONFIG_CRYPTO_ADIANTUM is not set -CONFIG_CRYPTO_ESSIV=y - -# -# Hash modes -# -CONFIG_CRYPTO_CMAC=m -CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_XXHASH=m -CONFIG_CRYPTO_BLAKE2B=m -# CONFIG_CRYPTO_BLAKE2S is not set -CONFIG_CRYPTO_CRCT10DIF=m -CONFIG_CRYPTO_GHASH=y -# CONFIG_CRYPTO_POLY1305 is not set -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=m -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_SHA3=m -CONFIG_CRYPTO_SM3=m -# CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_TI is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=m -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_SALSA20 is not set -CONFIG_CRYPTO_CHACHA20=m -# CONFIG_CRYPTO_SERPENT is not set -CONFIG_CRYPTO_SM4=m -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_LZO=m -# CONFIG_CRYPTO_842 is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set -CONFIG_CRYPTO_ZSTD=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_DRBG_HMAC=y -# CONFIG_CRYPTO_DRBG_HASH is not set -# CONFIG_CRYPTO_DRBG_CTR is not set -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_USER_API_HASH is not set -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -# CONFIG_CRYPTO_USER_API_RNG is not set -# CONFIG_CRYPTO_USER_API_AEAD is not set -# CONFIG_CRYPTO_STATS is not set -CONFIG_CRYPTO_HASH_INFO=y - -# -# Crypto library routines -# -CONFIG_CRYPTO_LIB_AES=y -CONFIG_CRYPTO_LIB_ARC4=m -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=m -CONFIG_CRYPTO_LIB_BLAKE2S=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m -CONFIG_CRYPTO_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m -CONFIG_CRYPTO_LIB_CURVE25519=m -CONFIG_CRYPTO_LIB_DES=m -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 -CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m -CONFIG_CRYPTO_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_ALLWINNER=y -# CONFIG_CRYPTO_DEV_SUN4I_SS is not set -# CONFIG_CRYPTO_DEV_SUN8I_CE is not set -# CONFIG_CRYPTO_DEV_SUN8I_SS is not set -# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set -# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set -# CONFIG_CRYPTO_DEV_CCP is not set -# CONFIG_CRYPTO_DEV_SAFEXCEL is not set -# CONFIG_CRYPTO_DEV_CCREE is not set -# CONFIG_CRYPTO_DEV_HISI_SEC is not set -# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set -CONFIG_ASYMMETRIC_KEY_TYPE=y -CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y -CONFIG_X509_CERTIFICATE_PARSER=y -# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set -CONFIG_PKCS7_MESSAGE_PARSER=y -# CONFIG_PKCS7_TEST_KEY is not set -# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set - -# -# Certificates for signature checking -# -CONFIG_SYSTEM_TRUSTED_KEYRING=y -CONFIG_SYSTEM_TRUSTED_KEYS="" -# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set -# CONFIG_SECONDARY_TRUSTED_KEYRING is not set -# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set -# end of Certificates for signature checking - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_RAID6_PQ_BENCHMARK=y -CONFIG_LINEAR_RANGES=y -# CONFIG_PACKING is not set -CONFIG_BITREVERSE=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_NET_UTILS=y -# CONFIG_CORDIC is not set -# CONFIG_PRIME_NUMBERS is not set -CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_USE_SYM_ANNOTATIONS=y -CONFIG_INDIRECT_PIO=y -CONFIG_CRC_CCITT=m -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=m -CONFIG_CRC_ITU_T=m -CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -CONFIG_CRC7=m -CONFIG_LIBCRC32C=m -# CONFIG_CRC8 is not set -CONFIG_XXHASH=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_RANDOM32_SELFTEST is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=m -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_LZ4_COMPRESS=y -CONFIG_LZ4_DECOMPRESS=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y -CONFIG_XZ_DEC=y -CONFIG_XZ_DEC_X86=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_BCJ=y -# CONFIG_XZ_DEC_TEST is not set -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_LZ4=y -CONFIG_DECOMPRESS_ZSTD=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=y -CONFIG_TEXTSEARCH_BM=y -CONFIG_TEXTSEARCH_FSM=y -CONFIG_XARRAY_MULTI=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_DMA_DECLARE_COHERENT=y -CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y -CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y -CONFIG_SWIOTLB=y -CONFIG_DMA_NONCOHERENT_MMAP=y -CONFIG_DMA_COHERENT_POOL=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_CMA=y -CONFIG_DMA_PERNUMA_CMA=y - -# -# Default contiguous memory area size: -# -CONFIG_CMA_SIZE_MBYTES=256 -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_ALIGNMENT=8 -# CONFIG_DMA_API_DEBUG is not set -CONFIG_SGL_ALLOC=y -CONFIG_CPU_RMAP=y -CONFIG_DQL=y -CONFIG_GLOB=y -# CONFIG_GLOB_SELFTEST is not set -CONFIG_NLATTR=y -CONFIG_CLZ_TAB=y -# CONFIG_IRQ_POLL is not set -CONFIG_MPILIB=y -CONFIG_LIBFDT=y -CONFIG_OID_REGISTRY=y -CONFIG_HAVE_GENERIC_VDSO=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_VDSO_TIME_NS=y -CONFIG_FONT_SUPPORT=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_SG_POOL=y -CONFIG_ARCH_STACKWALK=y -CONFIG_SBITMAP=y -# CONFIG_STRING_SELFTEST is not set -# end of Library routines - -# -# Kernel hacking -# - -# -# printk and dmesg options -# -CONFIG_PRINTK_TIME=y -# CONFIG_PRINTK_CALLER is not set -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 -CONFIG_CONSOLE_LOGLEVEL_QUIET=4 -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DYNAMIC_DEBUG_CORE is not set -CONFIG_SYMBOLIC_ERRNAME=y -CONFIG_DEBUG_BUGVERBOSE=y -# end of printk and dmesg options - -# -# Compile-time checks and compiler options -# -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=2048 -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_HEADERS_INSTALL is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_SECTION_MISMATCH_WARN_ONLY=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_FRAME_POINTER=y -# end of Compile-time checks and compiler options - -# -# Generic Kernel Debugging Instruments -# -# CONFIG_MAGIC_SYSRQ is not set -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_FS_ALLOW_ALL=y -# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set -# CONFIG_DEBUG_FS_ALLOW_NONE is not set -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y -# CONFIG_UBSAN is not set -# end of Generic Kernel Debugging Instruments - -# CONFIG_DEBUG_KERNEL is not set - -# -# Memory Debugging -# -# CONFIG_PAGE_EXTENSION is not set -# CONFIG_PAGE_POISONING is not set -# CONFIG_DEBUG_RODATA_TEST is not set -CONFIG_ARCH_HAS_DEBUG_WX=y -# CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y -# CONFIG_DEBUG_VM_PGTABLE is not set -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y -CONFIG_CC_HAS_KASAN_GENERIC=y -CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y -# CONFIG_KASAN is not set -# end of Memory Debugging - -# -# Debug Oops, Lockups and Hangs -# -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -# CONFIG_TEST_LOCKUP is not set -# end of Debug Oops, Lockups and Hangs - -# -# Scheduler Debugging -# -CONFIG_SCHED_INFO=y -# end of Scheduler Debugging - -# CONFIG_DEBUG_TIMEKEEPING is not set - -# -# Lock Debugging (spinlocks, mutexes, etc...) -# -CONFIG_LOCK_DEBUGGING_SUPPORT=y -# CONFIG_WW_MUTEX_SELFTEST is not set -# end of Lock Debugging (spinlocks, mutexes, etc...) - -# CONFIG_STACKTRACE is not set -# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set -CONFIG_HAVE_DEBUG_BUGVERBOSE=y - -# -# Debug kernel data structures -# -# CONFIG_BUG_ON_DATA_CORRUPTION is not set -# end of Debug kernel data structures - -# -# RCU Debugging -# -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# end of RCU Debugging - -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_SAMPLES is not set -CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y -CONFIG_STRICT_DEVMEM=y -# CONFIG_IO_STRICT_DEVMEM is not set - -# -# arm64 Debugging -# -# CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_ARM64_RELOC_TEST is not set -# CONFIG_CORESIGHT is not set -# end of arm64 Debugging - -# -# Kernel Testing and Coverage -# -# CONFIG_KUNIT is not set -CONFIG_ARCH_HAS_KCOV=y -CONFIG_CC_HAS_SANCOV_TRACE_PC=y -# CONFIG_KCOV is not set -# CONFIG_RUNTIME_TESTING_MENU is not set -# CONFIG_MEMTEST is not set -# end of Kernel Testing and Coverage -# end of Kernel hacking diff --git a/sys-kernel/pinephone-sources/files/config-5.11.0 b/sys-kernel/pinephone-sources/files/config-5.11.0 deleted file mode 100644 index 60c1f49..0000000 --- a/sys-kernel/pinephone-sources/files/config-5.11.0 +++ /dev/null @@ -1,5786 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.11.0 Kernel Configuration -# -CONFIG_CC_VERSION_TEXT="aarch64-unknown-linux-gnu-gcc (Gentoo 10.2.0-r5 p6) 10.2.0" -CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=100200 -CONFIG_LD_VERSION=235020000 -CONFIG_CLANG_VERSION=0 -CONFIG_LLD_VERSION=0 -CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y -CONFIG_CC_HAS_ASM_GOTO=y -CONFIG_CC_HAS_ASM_INLINE=y -CONFIG_IRQ_WORK=y -CONFIG_BUILDTIME_TABLE_SORT=y -CONFIG_THREAD_INFO_IN_TASK=y - -# -# General setup -# -CONFIG_INIT_ENV_ARG_LIMIT=32 -# CONFIG_COMPILE_TEST is not set -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_BUILD_SALT="" -CONFIG_DEFAULT_INIT="" -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_WATCH_QUEUE is not set -CONFIG_CROSS_MEMORY_ATTACH=y -# CONFIG_USELIB is not set -# CONFIG_AUDIT is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y -CONFIG_GENERIC_IRQ_IPI=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_IRQ_MSI_IOMMU=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_SPARSE_IRQ=y -# CONFIG_GENERIC_IRQ_DEBUGFS is not set -# end of IRQ subsystem - -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y - -# -# Timers subsystem -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ_COMMON=y -# CONFIG_HZ_PERIODIC is not set -CONFIG_NO_HZ_IDLE=y -# CONFIG_NO_HZ_FULL is not set -# CONFIG_NO_HZ is not set -CONFIG_HIGH_RES_TIMERS=y -# end of Timers subsystem - -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set - -# -# CPU/Task time and stats accounting -# -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_PSI is not set -# end of CPU/Task time and stats accounting - -CONFIG_CPU_ISOLATION=y - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_RCU_EXPERT is not set -CONFIG_SRCU=y -CONFIG_TREE_SRCU=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RCU_NEED_SEGCBLIST=y -# end of RCU Subsystem - -CONFIG_IKCONFIG=m -CONFIG_IKCONFIG_PROC=y -# CONFIG_IKHEADERS is not set -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 -CONFIG_GENERIC_SCHED_CLOCK=y - -# -# Scheduler features -# -# CONFIG_UCLAMP_TASK is not set -# end of Scheduler features - -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_CC_HAS_INT128=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_NUMA_BALANCING=y -CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y -CONFIG_CGROUPS=y -CONFIG_PAGE_COUNTER=y -CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_KMEM=y -CONFIG_BLK_CGROUP=y -CONFIG_CGROUP_WRITEBACK=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_CFS_BANDWIDTH is not set -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_CGROUP_PIDS=y -# CONFIG_CGROUP_RDMA is not set -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_HUGETLB=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_PERF=y -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_TIME_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -# CONFIG_CHECKPOINT_RESTORE is not set -CONFIG_SCHED_AUTOGROUP=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_RD_XZ=y -CONFIG_RD_LZO=y -CONFIG_RD_LZ4=y -CONFIG_RD_ZSTD=y -# CONFIG_BOOT_CONFIG is not set -CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_LD_ORPHAN_WARN=y -CONFIG_SYSCTL=y -CONFIG_HAVE_UID16=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_BPF=y -# CONFIG_EXPERT is not set -CONFIG_UID16=y -CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_FHANDLE=y -CONFIG_POSIX_TIMERS=y -CONFIG_PRINTK=y -CONFIG_PRINTK_NMI=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_FUTEX_PI=y -CONFIG_HAVE_FUTEX_CMPXCHG=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_IO_URING=y -CONFIG_ADVISE_SYSCALLS=y -CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -# CONFIG_BPF_SYSCALL is not set -CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y -CONFIG_BPF_JIT_DEFAULT_ON=y -# CONFIG_USERFAULTFD is not set -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_RSEQ=y -# CONFIG_EMBEDDED is not set -CONFIG_HAVE_PERF_EVENTS=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# end of Kernel Performance Events And Counters - -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -CONFIG_SLAB_MERGE_DEFAULT=y -# CONFIG_SLAB_FREELIST_RANDOM is not set -# CONFIG_SLAB_FREELIST_HARDENED is not set -# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set -CONFIG_SLUB_CPU_PARTIAL=y -CONFIG_SYSTEM_DATA_VERIFICATION=y -CONFIG_PROFILING=y -# end of General setup - -CONFIG_ARM64=y -CONFIG_64BIT=y -CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_CONT_PTE_SHIFT=4 -CONFIG_ARM64_CONT_PMD_SHIFT=4 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=33 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 -CONFIG_NO_IOPORT_MAP=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_ZONE_DMA32=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_SMP=y -CONFIG_KERNEL_MODE_NEON=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_PGTABLE_LEVELS=4 -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_PROC_KCORE_TEXT=y - -# -# Platform selection -# -# CONFIG_ARCH_ACTIONS is not set -# CONFIG_ARCH_AGILEX is not set -CONFIG_ARCH_SUNXI=y -# CONFIG_ARCH_ALPINE is not set -# CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM4908 is not set -# CONFIG_ARCH_BCM_IPROC is not set -# CONFIG_ARCH_BERLIN is not set -# CONFIG_ARCH_BITMAIN is not set -# CONFIG_ARCH_BRCMSTB is not set -# CONFIG_ARCH_EXYNOS is not set -# CONFIG_ARCH_SPARX5 is not set -# CONFIG_ARCH_K3 is not set -# CONFIG_ARCH_LAYERSCAPE is not set -# CONFIG_ARCH_LG1K is not set -# CONFIG_ARCH_HISI is not set -# CONFIG_ARCH_KEEMBAY is not set -# CONFIG_ARCH_MEDIATEK is not set -# CONFIG_ARCH_MESON is not set -# CONFIG_ARCH_MVEBU is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_REALTEK is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_ROCKCHIP is not set -# CONFIG_ARCH_S32 is not set -# CONFIG_ARCH_SEATTLE is not set -# CONFIG_ARCH_STRATIX10 is not set -# CONFIG_ARCH_SYNQUACER is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_SPRD is not set -# CONFIG_ARCH_THUNDER is not set -# CONFIG_ARCH_THUNDER2 is not set -# CONFIG_ARCH_UNIPHIER is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_VISCONTI is not set -# CONFIG_ARCH_XGENE is not set -# CONFIG_ARCH_ZX is not set -# CONFIG_ARCH_ZYNQMP is not set -# end of Platform selection - -# -# Kernel Features -# - -# -# ARM errata workarounds via the alternatives framework -# -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_845719=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_1024718=y -CONFIG_ARM64_ERRATUM_1418040=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1319367=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_ERRATUM_1463225=y -CONFIG_ARM64_ERRATUM_1542419=y -CONFIG_ARM64_ERRATUM_1508412=y -CONFIG_CAVIUM_ERRATUM_22375=y -CONFIG_CAVIUM_ERRATUM_23144=y -CONFIG_CAVIUM_ERRATUM_23154=y -CONFIG_CAVIUM_ERRATUM_27456=y -CONFIG_CAVIUM_ERRATUM_30115=y -CONFIG_CAVIUM_TX2_ERRATUM_219=y -CONFIG_FUJITSU_ERRATUM_010001=y -CONFIG_HISILICON_ERRATUM_161600802=y -CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_QCOM_FALKOR_ERRATUM_1009=y -CONFIG_QCOM_QDF2400_ERRATUM_0065=y -CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y -# end of ARM errata workarounds via the alternatives framework - -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_16K_PAGES is not set -# CONFIG_ARM64_64K_PAGES is not set -# CONFIG_ARM64_VA_BITS_39 is not set -CONFIG_ARM64_VA_BITS_48=y -CONFIG_ARM64_VA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PA_BITS=48 -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SCHED_MC=y -# CONFIG_SCHED_SMT is not set -CONFIG_NR_CPUS=64 -CONFIG_HOTPLUG_CPU=y -CONFIG_NUMA=y -CONFIG_NODES_SHIFT=2 -CONFIG_USE_PERCPU_NUMA_NODE_ID=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_300 is not set -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_SCHED_HRTICK=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_HW_PERF_EVENTS=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_PARAVIRT=y -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set -CONFIG_KEXEC=y -# CONFIG_KEXEC_FILE is not set -CONFIG_CRASH_DUMP=y -CONFIG_XEN_DOM0=y -CONFIG_XEN=y -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_COMPAT=y -CONFIG_KUSER_HELPERS=y -# CONFIG_ARMV8_DEPRECATED is not set - -# -# ARMv8.1 architectural features -# -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_PAN=y -CONFIG_AS_HAS_LDAPR=y -CONFIG_ARM64_LSE_ATOMICS=y -CONFIG_ARM64_USE_LSE_ATOMICS=y -CONFIG_ARM64_VHE=y -# end of ARMv8.1 architectural features - -# -# ARMv8.2 architectural features -# -# CONFIG_ARM64_PMEM is not set -CONFIG_ARM64_RAS_EXTN=y -CONFIG_ARM64_CNP=y -# end of ARMv8.2 architectural features - -# -# ARMv8.3 architectural features -# -CONFIG_ARM64_PTR_AUTH=y -CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y -CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y -CONFIG_AS_HAS_PAC=y -CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y -# end of ARMv8.3 architectural features - -# -# ARMv8.4 architectural features -# -CONFIG_ARM64_AMU_EXTN=y -CONFIG_AS_HAS_ARMV8_4=y -CONFIG_ARM64_TLB_RANGE=y -# end of ARMv8.4 architectural features - -# -# ARMv8.5 architectural features -# -CONFIG_AS_HAS_ARMV8_5=y -CONFIG_ARM64_BTI=y -CONFIG_ARM64_BTI_KERNEL=y -CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y -CONFIG_ARM64_E0PD=y -CONFIG_ARCH_RANDOM=y -CONFIG_ARM64_AS_HAS_MTE=y -CONFIG_ARM64_MTE=y -# end of ARMv8.5 architectural features - -CONFIG_ARM64_SVE=y -CONFIG_ARM64_MODULE_PLTS=y -# CONFIG_ARM64_PSEUDO_NMI is not set -CONFIG_RELOCATABLE=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_STACKPROTECTOR_PER_TASK=y -# end of Kernel Features - -# -# Boot options -# -CONFIG_CMDLINE="console=ttyAMA0" -CONFIG_CMDLINE_FROM_BOOTLOADER=y -# CONFIG_CMDLINE_EXTEND is not set -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_EFI is not set -# end of Boot options - -CONFIG_SYSVIPC_COMPAT=y -CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y -CONFIG_ARCH_ENABLE_THP_MIGRATION=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HIBERNATION=y -CONFIG_HIBERNATION_SNAPSHOT_DEV=y -CONFIG_PM_STD_PARTITION="" -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_PM_AUTOSLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_WAKELOCKS_LIMIT=100 -CONFIG_PM_WAKELOCKS_GC=y -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_CPU_PM=y -CONFIG_ENERGY_MODEL=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_HIBERNATION_HEADER=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# end of Power management options - -# -# CPU Power Management -# - -# -# CPU Idle -# -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y -# CONFIG_CPU_IDLE_GOV_LADDER is not set -CONFIG_CPU_IDLE_GOV_MENU=y -# CONFIG_CPU_IDLE_GOV_TEO is not set -CONFIG_DT_IDLE_STATES=y - -# -# ARM CPU Idle Drivers -# -CONFIG_ARM_CPUIDLE=y -# CONFIG_ARM_PSCI_CPUIDLE is not set -# end of ARM CPU Idle Drivers -# end of CPU Idle - -# -# CPU Frequency scaling -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y - -# -# CPU frequency scaling drivers -# -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -# CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is not set -CONFIG_ARM_SCPI_CPUFREQ=y -# end of CPU Frequency scaling -# end of CPU Power Management - -# -# Firmware Drivers -# -# CONFIG_ARM_SCMI_PROTOCOL is not set -CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y -# CONFIG_ARM_SDE_INTERFACE is not set -# CONFIG_GOOGLE_FIRMWARE is not set -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_PSCI_CHECKER is not set -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y -CONFIG_ARM_SMCCC_SOC_ID=y - -# -# Tegra firmware driver -# -# end of Tegra firmware driver -# end of Firmware Drivers - -# CONFIG_VIRTUALIZATION is not set -CONFIG_ARM64_CRYPTO=y -CONFIG_CRYPTO_SHA256_ARM64=m -CONFIG_CRYPTO_SHA512_ARM64=m -CONFIG_CRYPTO_SHA1_ARM64_CE=m -CONFIG_CRYPTO_SHA2_ARM64_CE=m -CONFIG_CRYPTO_SHA512_ARM64_CE=m -CONFIG_CRYPTO_SHA3_ARM64=m -CONFIG_CRYPTO_SM3_ARM64_CE=m -CONFIG_CRYPTO_SM4_ARM64_CE=m -CONFIG_CRYPTO_GHASH_ARM64_CE=m -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m -CONFIG_CRYPTO_AES_ARM64=m -CONFIG_CRYPTO_AES_ARM64_CE=m -CONFIG_CRYPTO_AES_ARM64_CE_CCM=m -CONFIG_CRYPTO_AES_ARM64_CE_BLK=m -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m -CONFIG_CRYPTO_CHACHA20_NEON=m -CONFIG_CRYPTO_POLY1305_NEON=m -CONFIG_CRYPTO_NHPOLY1305_NEON=m -CONFIG_CRYPTO_AES_ARM64_BS=m - -# -# General architecture-dependent options -# -CONFIG_CRASH_CORE=y -CONFIG_KEXEC_CORE=y -# CONFIG_KPROBES is not set -CONFIG_JUMP_LABEL=y -# CONFIG_STATIC_KEYS_SELFTEST is not set -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y -CONFIG_HAVE_NMI=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_KEEPINITRD=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SET_DIRECT_MAP=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ASM_MODVERSIONS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y -CONFIG_MMU_GATHER_TABLE_FREE=y -CONFIG_MMU_GATHER_RCU_TABLE_FREE=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_HAVE_ARCH_SECCOMP=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_SECCOMP=y -CONFIG_SECCOMP_FILTER=y -# CONFIG_SECCOMP_CACHE_DEBUG is not set -CONFIG_HAVE_ARCH_STACKLEAK=y -CONFIG_HAVE_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR_STRONG=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MOVE_PUD=y -CONFIG_HAVE_MOVE_PMD=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_HAVE_ARCH_MMAP_RND_BITS=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 -CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_COMPAT_OLD_SIGACTION=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_VMAP_STACK=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_STRICT_MODULE_RWX=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -# CONFIG_LOCK_EVENT_COUNTS is not set -CONFIG_ARCH_HAS_RELR=y -CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -# end of GCOV-based kernel profiling - -CONFIG_HAVE_GCC_PLUGINS=y -CONFIG_GCC_PLUGINS=y -# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set -# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set -# end of General architecture-dependent options - -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -# CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -CONFIG_MODULE_COMPRESS_XZ=y -# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_TRIM_UNUSED_KSYMS is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_BLOCK=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BLK_CGROUP_RWSTAT=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=m -# CONFIG_BLK_DEV_ZONED is not set -# CONFIG_BLK_DEV_THROTTLING is not set -# CONFIG_BLK_CMDLINE_PARSER is not set -# CONFIG_BLK_WBT is not set -# CONFIG_BLK_CGROUP_IOLATENCY is not set -# CONFIG_BLK_CGROUP_IOCOST is not set -CONFIG_BLK_DEBUG_FS=y -# CONFIG_BLK_SED_OPAL is not set -# CONFIG_BLK_INLINE_ENCRYPTION is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -CONFIG_EFI_PARTITION=y -# end of Partition Types - -CONFIG_BLOCK_COMPAT=y -CONFIG_BLK_PM=y - -# -# IO Schedulers -# -CONFIG_MQ_IOSCHED_DEADLINE=m -CONFIG_MQ_IOSCHED_KYBER=m -CONFIG_IOSCHED_BFQ=m -CONFIG_BFQ_GROUP_IOSCHED=y -CONFIG_BFQ_CGROUP_DEBUG=y -# end of IO Schedulers - -CONFIG_ASN1=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQ=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_FREEZER=y - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_HAVE_ELF_PROT=y -CONFIG_ARCH_USE_GNU_PROPERTY=y -CONFIG_ELFCORE=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_BINFMT_SCRIPT=y -# CONFIG_BINFMT_MISC is not set -CONFIG_COREDUMP=y -# end of Executable file formats - -# -# Memory Management options -# -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM=y -CONFIG_NEED_MULTIPLE_NODES=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MEMORY_HOTPLUG is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -# CONFIG_PAGE_REPORTING is not set -CONFIG_MIGRATION=y -CONFIG_CONTIG_ALLOC=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_BOUNCE=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_MEMORY_FAILURE=y -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -# CONFIG_CLEANCACHE is not set -CONFIG_FRONTSWAP=y -CONFIG_CMA=y -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_AREAS=7 -CONFIG_ZSWAP=y -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set -CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y -CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd" -CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y -# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set -# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set -CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" -# CONFIG_ZSWAP_DEFAULT_ON is not set -CONFIG_ZPOOL=y -CONFIG_ZBUD=y -# CONFIG_Z3FOLD is not set -CONFIG_ZSMALLOC=m -# CONFIG_ZSMALLOC_STAT is not set -CONFIG_GENERIC_EARLY_IOREMAP=y -# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set -# CONFIG_IDLE_PAGE_TRACKING is not set -CONFIG_ARCH_HAS_PTE_DEVMAP=y -CONFIG_FRAME_VECTOR=y -CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y -# CONFIG_PERCPU_STATS is not set -# CONFIG_GUP_TEST is not set -# CONFIG_READ_ONLY_THP_FOR_FS is not set -CONFIG_ARCH_HAS_PTE_SPECIAL=y -# end of Memory Management options - -CONFIG_NET=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_NET_INGRESS=y -CONFIG_SKB_EXTENSIONS=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set -CONFIG_UNIX=y -CONFIG_UNIX_SCM=y -# CONFIG_UNIX_DIAG is not set -# CONFIG_TLS is not set -CONFIG_XFRM=y -CONFIG_XFRM_ALGO=y -CONFIG_XFRM_USER=y -# CONFIG_XFRM_INTERFACE is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_AH=m -CONFIG_XFRM_ESP=y -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -# CONFIG_IP_FIB_TRIE_STATS is not set -CONFIG_IP_MULTIPLE_TABLES=y -# CONFIG_IP_ROUTE_MULTIPATH is not set -# CONFIG_IP_ROUTE_VERBOSE is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE_DEMUX is not set -CONFIG_NET_IP_TUNNEL=m -# CONFIG_IP_MROUTE is not set -CONFIG_SYN_COOKIES=y -# CONFIG_NET_IPVTI is not set -CONFIG_NET_UDP_TUNNEL=m -# CONFIG_NET_FOU is not set -# CONFIG_NET_FOU_IP_TUNNELS is not set -# CONFIG_INET_AH is not set -CONFIG_INET_ESP=y -# CONFIG_INET_ESP_OFFLOAD is not set -# CONFIG_INET_ESPINTCP is not set -# CONFIG_INET_IPCOMP is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_INET_UDP_DIAG is not set -# CONFIG_INET_RAW_DIAG is not set -CONFIG_INET_DIAG_DESTROY=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=m -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_IPV6_ROUTE_INFO=y -CONFIG_IPV6_OPTIMISTIC_DAD=y -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -# CONFIG_INET6_ESP_OFFLOAD is not set -# CONFIG_INET6_ESPINTCP is not set -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -# CONFIG_IPV6_ILA is not set -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -# CONFIG_IPV6_VTI is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -# CONFIG_IPV6_SUBTREES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_IPV6_SEG6_LWTUNNEL is not set -# CONFIG_IPV6_SEG6_HMAC is not set -# CONFIG_IPV6_RPL_LWTUNNEL is not set -# CONFIG_NETLABEL is not set -# CONFIG_MPTCP is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -CONFIG_NETFILTER=y -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=m - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_INGRESS=y -CONFIG_NETFILTER_NETLINK=y -CONFIG_NETFILTER_FAMILY_BRIDGE=y -CONFIG_NETFILTER_FAMILY_ARP=y -# CONFIG_NETFILTER_NETLINK_ACCT is not set -CONFIG_NETFILTER_NETLINK_QUEUE=y -CONFIG_NETFILTER_NETLINK_LOG=y -CONFIG_NETFILTER_NETLINK_OSF=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_LOG_COMMON=y -# CONFIG_NF_LOG_NETDEV is not set -CONFIG_NETFILTER_CONNCOUNT=m -CONFIG_NF_CONNTRACK_MARK=y -# CONFIG_NF_CONNTRACK_ZONES is not set -CONFIG_NF_CONNTRACK_PROCFS=y -CONFIG_NF_CONNTRACK_EVENTS=y -# CONFIG_NF_CONNTRACK_TIMEOUT is not set -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -# CONFIG_NF_CONNTRACK_LABELS is not set -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_GRE=y -CONFIG_NF_CT_PROTO_SCTP=y -CONFIG_NF_CT_PROTO_UDPLITE=y -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -# CONFIG_NF_CONNTRACK_SNMP is not set -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -# CONFIG_NF_CONNTRACK_SIP is not set -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set -CONFIG_NF_NAT=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_REDIRECT=y -CONFIG_NF_NAT_MASQUERADE=y -CONFIG_NETFILTER_SYNPROXY=m -CONFIG_NF_TABLES=m -CONFIG_NF_TABLES_INET=y -CONFIG_NF_TABLES_NETDEV=y -CONFIG_NFT_NUMGEN=m -CONFIG_NFT_CT=m -CONFIG_NFT_COUNTER=m -CONFIG_NFT_CONNLIMIT=m -CONFIG_NFT_LOG=m -CONFIG_NFT_LIMIT=m -CONFIG_NFT_MASQ=m -CONFIG_NFT_REDIR=m -CONFIG_NFT_NAT=m -CONFIG_NFT_TUNNEL=m -CONFIG_NFT_OBJREF=m -# CONFIG_NFT_QUEUE is not set -CONFIG_NFT_QUOTA=m -CONFIG_NFT_REJECT=m -CONFIG_NFT_REJECT_INET=m -CONFIG_NFT_COMPAT=m -CONFIG_NFT_HASH=m -# CONFIG_NFT_XFRM is not set -CONFIG_NFT_SOCKET=m -CONFIG_NFT_OSF=m -CONFIG_NFT_TPROXY=m -CONFIG_NFT_SYNPROXY=m -CONFIG_NF_DUP_NETDEV=m -CONFIG_NFT_DUP_NETDEV=m -CONFIG_NFT_FWD_NETDEV=m -CONFIG_NFT_REJECT_NETDEV=m -# CONFIG_NF_FLOW_TABLE is not set -CONFIG_NETFILTER_XTABLES=y - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=y -CONFIG_NETFILTER_XT_CONNMARK=m -CONFIG_NETFILTER_XT_SET=m - -# -# Xtables targets -# -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -# CONFIG_NETFILTER_XT_TARGET_CT is not set -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -# CONFIG_NETFILTER_XT_TARGET_HL is not set -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_LOG=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_NAT=m -CONFIG_NETFILTER_XT_TARGET_NETMAP=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set -CONFIG_NETFILTER_XT_TARGET_REDIRECT=m -CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -CONFIG_NETFILTER_XT_TARGET_TPROXY=m -CONFIG_NETFILTER_XT_TARGET_TRACE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_DSCP is not set -CONFIG_NETFILTER_XT_MATCH_ECN=y -# CONFIG_NETFILTER_XT_MATCH_ESP is not set -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=y -# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -# CONFIG_NETFILTER_XT_MATCH_L2TP is not set -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_RECENT is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -CONFIG_NETFILTER_XT_MATCH_SOCKET=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=y -CONFIG_NETFILTER_XT_MATCH_STRING=y -# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set -CONFIG_NETFILTER_XT_MATCH_TIME=y -CONFIG_NETFILTER_XT_MATCH_U32=y -# end of Core Netfilter Configuration - -CONFIG_IP_SET=m -CONFIG_IP_SET_MAX=256 -CONFIG_IP_SET_BITMAP_IP=m -CONFIG_IP_SET_BITMAP_IPMAC=m -CONFIG_IP_SET_BITMAP_PORT=m -CONFIG_IP_SET_HASH_IP=m -CONFIG_IP_SET_HASH_IPMARK=m -CONFIG_IP_SET_HASH_IPPORT=m -CONFIG_IP_SET_HASH_IPPORTIP=m -CONFIG_IP_SET_HASH_IPPORTNET=m -CONFIG_IP_SET_HASH_IPMAC=m -CONFIG_IP_SET_HASH_MAC=m -CONFIG_IP_SET_HASH_NETPORTNET=m -CONFIG_IP_SET_HASH_NET=m -CONFIG_IP_SET_HASH_NETNET=m -CONFIG_IP_SET_HASH_NETPORT=m -CONFIG_IP_SET_HASH_NETIFACE=m -CONFIG_IP_SET_LIST_SET=m -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_SOCKET_IPV4=y -CONFIG_NF_TPROXY_IPV4=y -CONFIG_NF_TABLES_IPV4=y -CONFIG_NFT_REJECT_IPV4=m -# CONFIG_NFT_DUP_IPV4 is not set -# CONFIG_NFT_FIB_IPV4 is not set -# CONFIG_NF_TABLES_ARP is not set -# CONFIG_NF_DUP_IPV4 is not set -# CONFIG_NF_LOG_ARP is not set -CONFIG_NF_LOG_IPV4=y -CONFIG_NF_REJECT_IPV4=y -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_IP_NF_IPTABLES=y -CONFIG_IP_NF_MATCH_AH=y -CONFIG_IP_NF_MATCH_ECN=y -# CONFIG_IP_NF_MATCH_RPFILTER is not set -CONFIG_IP_NF_MATCH_TTL=y -CONFIG_IP_NF_FILTER=y -CONFIG_IP_NF_TARGET_REJECT=y -# CONFIG_IP_NF_TARGET_SYNPROXY is not set -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_IP_NF_MANGLE=y -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set -# CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_TTL is not set -CONFIG_IP_NF_RAW=y -CONFIG_IP_NF_SECURITY=y -CONFIG_IP_NF_ARPTABLES=y -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m -# end of IP: Netfilter Configuration - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_SOCKET_IPV6=m -CONFIG_NF_TPROXY_IPV6=m -CONFIG_NF_TABLES_IPV6=y -CONFIG_NFT_REJECT_IPV6=m -# CONFIG_NFT_DUP_IPV6 is not set -# CONFIG_NFT_FIB_IPV6 is not set -# CONFIG_NF_DUP_IPV6 is not set -CONFIG_NF_REJECT_IPV6=m -CONFIG_NF_LOG_IPV6=m -CONFIG_IP6_NF_IPTABLES=m -# CONFIG_IP6_NF_MATCH_AH is not set -# CONFIG_IP6_NF_MATCH_EUI64 is not set -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_HL is not set -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -# CONFIG_IP6_NF_MATCH_MH is not set -# CONFIG_IP6_NF_MATCH_RPFILTER is not set -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_MATCH_SRH is not set -# CONFIG_IP6_NF_TARGET_HL is not set -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -# CONFIG_IP6_NF_TARGET_SYNPROXY is not set -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_IP6_NF_SECURITY is not set -# CONFIG_IP6_NF_NAT is not set -# end of IPv6: Netfilter Configuration - -CONFIG_NF_DEFRAG_IPV6=m -# CONFIG_NF_TABLES_BRIDGE is not set -# CONFIG_NF_CONNTRACK_BRIDGE is not set -# CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_L2TP is not set -CONFIG_STP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -CONFIG_BRIDGE_VLAN_FILTERING=y -# CONFIG_BRIDGE_MRP is not set -CONFIG_BRIDGE_CFM=y -CONFIG_HAVE_NET_DSA=y -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -# CONFIG_VLAN_8021Q_GVRP is not set -# CONFIG_VLAN_8021Q_MVRP is not set -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_PHONET is not set -# CONFIG_6LOWPAN is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -# CONFIG_NET_SCH_CBQ is not set -CONFIG_NET_SCH_HTB=m -# CONFIG_NET_SCH_HFSC is not set -# CONFIG_NET_SCH_PRIO is not set -# CONFIG_NET_SCH_MULTIQ is not set -# CONFIG_NET_SCH_RED is not set -# CONFIG_NET_SCH_SFB is not set -# CONFIG_NET_SCH_SFQ is not set -# CONFIG_NET_SCH_TEQL is not set -# CONFIG_NET_SCH_TBF is not set -# CONFIG_NET_SCH_CBS is not set -# CONFIG_NET_SCH_ETF is not set -# CONFIG_NET_SCH_TAPRIO is not set -# CONFIG_NET_SCH_GRED is not set -# CONFIG_NET_SCH_DSMARK is not set -# CONFIG_NET_SCH_NETEM is not set -# CONFIG_NET_SCH_DRR is not set -# CONFIG_NET_SCH_MQPRIO is not set -# CONFIG_NET_SCH_SKBPRIO is not set -# CONFIG_NET_SCH_CHOKE is not set -# CONFIG_NET_SCH_QFQ is not set -# CONFIG_NET_SCH_CODEL is not set -CONFIG_NET_SCH_FQ_CODEL=m -# CONFIG_NET_SCH_CAKE is not set -# CONFIG_NET_SCH_FQ is not set -# CONFIG_NET_SCH_HHF is not set -# CONFIG_NET_SCH_PIE is not set -# CONFIG_NET_SCH_PLUG is not set -# CONFIG_NET_SCH_ETS is not set -# CONFIG_NET_SCH_DEFAULT is not set - -# -# Classification -# -CONFIG_NET_CLS=y -# CONFIG_NET_CLS_BASIC is not set -# CONFIG_NET_CLS_TCINDEX is not set -# CONFIG_NET_CLS_ROUTE4 is not set -# CONFIG_NET_CLS_FW is not set -CONFIG_NET_CLS_U32=m -# CONFIG_CLS_U32_PERF is not set -# CONFIG_CLS_U32_MARK is not set -# CONFIG_NET_CLS_RSVP is not set -# CONFIG_NET_CLS_RSVP6 is not set -# CONFIG_NET_CLS_FLOW is not set -# CONFIG_NET_CLS_CGROUP is not set -# CONFIG_NET_CLS_BPF is not set -# CONFIG_NET_CLS_FLOWER is not set -# CONFIG_NET_CLS_MATCHALL is not set -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=m -# CONFIG_BATMAN_ADV is not set -# CONFIG_OPENVSWITCH is not set -# CONFIG_VSOCKETS is not set -# CONFIG_NETLINK_DIAG is not set -# CONFIG_MPLS is not set -# CONFIG_NET_NSH is not set -# CONFIG_HSR is not set -# CONFIG_NET_SWITCHDEV is not set -# CONFIG_NET_L3_MASTER_DEV is not set -# CONFIG_QRTR is not set -# CONFIG_NET_NCSI is not set -CONFIG_RPS=y -CONFIG_RFS_ACCEL=y -CONFIG_XPS=y -# CONFIG_CGROUP_NET_PRIO is not set -# CONFIG_CGROUP_NET_CLASSID is not set -CONFIG_NET_RX_BUSY_POLL=y -CONFIG_BQL=y -CONFIG_BPF_JIT=y -CONFIG_NET_FLOW_LIMIT=y - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# end of Network testing -# end of Networking options - -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -CONFIG_BT=m -CONFIG_BT_BREDR=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HS=y -CONFIG_BT_LE=y -CONFIG_BT_LEDS=y -# CONFIG_BT_MSFTEXT is not set -# CONFIG_BT_DEBUGFS is not set -# CONFIG_BT_FEATURE_DEBUG is not set - -# -# Bluetooth device drivers -# -CONFIG_BT_INTEL=m -CONFIG_BT_BCM=m -CONFIG_BT_RTL=m -CONFIG_BT_HCIBTUSB=m -# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set -CONFIG_BT_HCIBTUSB_BCM=y -# CONFIG_BT_HCIBTUSB_MTK is not set -CONFIG_BT_HCIBTUSB_RTL=y -# CONFIG_BT_HCIBTSDIO is not set -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_SERDEV=y -CONFIG_BT_HCIUART_H4=y -# CONFIG_BT_HCIUART_NOKIA is not set -# CONFIG_BT_HCIUART_BCSP is not set -# CONFIG_BT_HCIUART_ATH3K is not set -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIUART_3WIRE=y -# CONFIG_BT_HCIUART_INTEL is not set -CONFIG_BT_HCIUART_BCM=y -CONFIG_BT_HCIUART_RTL=y -# CONFIG_BT_HCIUART_QCA is not set -# CONFIG_BT_HCIUART_AG6XX is not set -# CONFIG_BT_HCIUART_MRVL is not set -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBFUSB is not set -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -# CONFIG_BT_ATH3K is not set -# CONFIG_BT_MTKSDIO is not set -# CONFIG_BT_MTKUART is not set -# end of Bluetooth device drivers - -# CONFIG_AF_RXRPC is not set -# CONFIG_AF_KCM is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y -CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_CFG80211_CRDA_SUPPORT=y -# CONFIG_CFG80211_WEXT is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_RFKILL_GPIO=m -# CONFIG_NET_9P is not set -# CONFIG_CAIF is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_NFC is not set -# CONFIG_PSAMPLE is not set -# CONFIG_NET_IFE is not set -# CONFIG_LWTUNNEL is not set -CONFIG_DST_CACHE=y -CONFIG_GRO_CELLS=y -# CONFIG_FAILOVER is not set -CONFIG_ETHTOOL_NETLINK=y -CONFIG_HAVE_EBPF_JIT=y - -# -# Device Drivers -# -CONFIG_ARM_AMBA=y -CONFIG_HAVE_PCI=y -# CONFIG_PCI is not set -# CONFIG_PCCARD is not set - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y - -# -# Firmware loader -# -CONFIG_FW_LOADER=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_FW_LOADER_USER_HELPER is not set -# CONFIG_FW_LOADER_COMPRESS is not set -CONFIG_FW_CACHE=y -# end of Firmware loader - -CONFIG_WANT_DEV_COREDUMP=y -CONFIG_ALLOW_DEV_COREDUMP=y -CONFIG_DEV_COREDUMP=y -# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_SOC_BUS=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=m -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_IRQ=y -CONFIG_DMA_SHARED_BUFFER=y -# CONFIG_DMA_FENCE_TRACE is not set -CONFIG_GENERIC_ARCH_TOPOLOGY=y -# end of Generic Driver Options - -# -# Bus devices -# -# CONFIG_BRCMSTB_GISB_ARB is not set -CONFIG_SIMPLE_PM_BUS=y -CONFIG_SUN50I_DE2_BUS=y -CONFIG_SUNXI_RSB=y -# CONFIG_VEXPRESS_CONFIG is not set -# CONFIG_MHI_BUS is not set -# end of Bus devices - -# CONFIG_CONNECTOR is not set -# CONFIG_GNSS is not set -# CONFIG_MTD is not set -CONFIG_DTC=y -CONFIG_OF=y -# CONFIG_OF_UNITTEST is not set -CONFIG_OF_FLATTREE=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_KOBJ=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_IRQ=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OF_RESOLVE=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_NUMA=y -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_NULL_BLK is not set -CONFIG_ZRAM=m -# CONFIG_ZRAM_DEF_COMP_LZORLE is not set -CONFIG_ZRAM_DEF_COMP_ZSTD=y -# CONFIG_ZRAM_DEF_COMP_LZO is not set -CONFIG_ZRAM_DEF_COMP="zstd" -# CONFIG_ZRAM_WRITEBACK is not set -# CONFIG_ZRAM_MEMORY_TRACKING is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_DRBD is not set -CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_XEN_BLKDEV_FRONTEND is not set -# CONFIG_BLK_DEV_RBD is not set - -# -# NVME Support -# -# CONFIG_NVME_FC is not set -# CONFIG_NVME_TARGET is not set -# end of NVME Support - -# -# Misc devices -# -# CONFIG_AD525X_DPOT is not set -# CONFIG_DUMMY_IRQ is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_HMC6352 is not set -# CONFIG_DS1682 is not set -CONFIG_SRAM=y -# CONFIG_XILINX_SDFEC is not set -# CONFIG_PVPANIC is not set -# CONFIG_HISI_HIKEY_USB is not set -# CONFIG_MODEM_POWER is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_EEPROM_IDT_89HPESX is not set -# CONFIG_EEPROM_EE1004 is not set -# end of EEPROM support - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - -# CONFIG_SENSORS_LIS3_I2C is not set - -# -# Altera FPGA firmware download module (requires I2C) -# -# CONFIG_ALTERA_STAPL is not set -# CONFIG_ECHO is not set -# CONFIG_MISC_RTSX_USB is not set -# CONFIG_UACCE is not set -# end of Misc devices - -# -# SCSI device support -# -CONFIG_SCSI_MOD=m -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=m -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_PROC_FS is not set - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=m -# CONFIG_CHR_DEV_ST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -CONFIG_SCSI_SAS_ATTRS=m -CONFIG_SCSI_SAS_LIBSAS=m -CONFIG_SCSI_SAS_HOST_SMP=y -# CONFIG_SCSI_SRP_ATTRS is not set -# end of SCSI Transports - -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_ISCSI_BOOT_SYSFS is not set -CONFIG_SCSI_UFSHCD=m -CONFIG_SCSI_UFSHCD_PLATFORM=m -# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set -# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set -# CONFIG_SCSI_UFS_BSG is not set -# CONFIG_XEN_SCSI_FRONTEND is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# end of SCSI device support - -CONFIG_HAVE_PATA_PLATFORM=y -# CONFIG_ATA is not set -CONFIG_MD=y -# CONFIG_BLK_DEV_MD is not set -# CONFIG_BCACHE is not set -CONFIG_BLK_DEV_DM_BUILTIN=y -CONFIG_BLK_DEV_DM=y -# CONFIG_DM_DEBUG is not set -# CONFIG_DM_UNSTRIPED is not set -CONFIG_DM_CRYPT=y -# CONFIG_DM_SNAPSHOT is not set -# CONFIG_DM_THIN_PROVISIONING is not set -# CONFIG_DM_CACHE is not set -# CONFIG_DM_WRITECACHE is not set -# CONFIG_DM_EBS is not set -# CONFIG_DM_ERA is not set -# CONFIG_DM_CLONE is not set -# CONFIG_DM_MIRROR is not set -# CONFIG_DM_RAID is not set -# CONFIG_DM_ZERO is not set -# CONFIG_DM_MULTIPATH is not set -# CONFIG_DM_DELAY is not set -# CONFIG_DM_DUST is not set -# CONFIG_DM_INIT is not set -# CONFIG_DM_UEVENT is not set -# CONFIG_DM_FLAKEY is not set -# CONFIG_DM_VERITY is not set -# CONFIG_DM_SWITCH is not set -# CONFIG_DM_LOG_WRITES is not set -# CONFIG_DM_INTEGRITY is not set -CONFIG_TARGET_CORE=m -# CONFIG_TCM_IBLOCK is not set -# CONFIG_TCM_FILEIO is not set -# CONFIG_TCM_PSCSI is not set -# CONFIG_LOOPBACK_TARGET is not set -# CONFIG_ISCSI_TARGET is not set -CONFIG_NETDEVICES=y -CONFIG_MII=m -CONFIG_NET_CORE=y -# CONFIG_BONDING is not set -# CONFIG_DUMMY is not set -CONFIG_WIREGUARD=m -# CONFIG_WIREGUARD_DEBUG is not set -# CONFIG_EQUALIZER is not set -# CONFIG_NET_TEAM is not set -# CONFIG_MACVLAN is not set -# CONFIG_IPVLAN is not set -# CONFIG_VXLAN is not set -# CONFIG_GENEVE is not set -# CONFIG_BAREUDP is not set -# CONFIG_GTP is not set -# CONFIG_MACSEC is not set -# CONFIG_NETCONSOLE is not set -CONFIG_TUN=m -# CONFIG_TUN_VNET_CROSS_LE is not set -CONFIG_VETH=m -# CONFIG_NLMON is not set - -# -# Distributed Switch Architecture drivers -# -# end of Distributed Switch Architecture drivers - -CONFIG_ETHERNET=y -# CONFIG_NET_VENDOR_ALACRITECH is not set -CONFIG_NET_VENDOR_ALLWINNER=y -# CONFIG_SUN4I_EMAC is not set -# CONFIG_ALTERA_TSE is not set -# CONFIG_NET_VENDOR_AMAZON is not set -# CONFIG_NET_VENDOR_AMD is not set -# CONFIG_NET_VENDOR_AQUANTIA is not set -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_VENDOR_AURORA is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CADENCE is not set -# CONFIG_NET_VENDOR_CAVIUM is not set -# CONFIG_NET_VENDOR_CORTINA is not set -# CONFIG_DNET is not set -# CONFIG_NET_VENDOR_EZCHIP is not set -# CONFIG_NET_VENDOR_GOOGLE is not set -# CONFIG_NET_VENDOR_HISILICON is not set -# CONFIG_NET_VENDOR_HUAWEI is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MELLANOX is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_MICROSEMI is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_NETRONOME is not set -# CONFIG_NET_VENDOR_NI is not set -# CONFIG_ETHOC is not set -# CONFIG_NET_VENDOR_PENSANDO is not set -# CONFIG_NET_VENDOR_QUALCOMM is not set -# CONFIG_NET_VENDOR_RENESAS is not set -# CONFIG_NET_VENDOR_ROCKER is not set -# CONFIG_NET_VENDOR_SAMSUNG is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SOLARFLARE is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_SOCIONEXT is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_SYNOPSYS is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_NET_VENDOR_XILINX is not set -CONFIG_PHYLIB=m -CONFIG_SWPHY=y -# CONFIG_LED_TRIGGER_PHY is not set -CONFIG_FIXED_PHY=m - -# -# MII PHY device drivers -# -# CONFIG_AMD_PHY is not set -# CONFIG_ADIN_PHY is not set -# CONFIG_AQUANTIA_PHY is not set -# CONFIG_AX88796B_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_BCM54140_PHY is not set -# CONFIG_BCM7XXX_PHY is not set -# CONFIG_BCM84881_PHY is not set -# CONFIG_BCM87XX_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_CORTINA_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_INTEL_XWAY_PHY is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_MARVELL_PHY is not set -# CONFIG_MARVELL_10G_PHY is not set -# CONFIG_MICREL_PHY is not set -CONFIG_MICROCHIP_PHY=m -# CONFIG_MICROCHIP_T1_PHY is not set -# CONFIG_MICROSEMI_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_NXP_TJA11XX_PHY is not set -# CONFIG_AT803X_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_REALTEK_PHY=m -# CONFIG_RENESAS_PHY is not set -# CONFIG_ROCKCHIP_PHY is not set -CONFIG_SMSC_PHY=m -# CONFIG_STE10XP is not set -# CONFIG_TERANETICS_PHY is not set -# CONFIG_DP83822_PHY is not set -# CONFIG_DP83TC811_PHY is not set -# CONFIG_DP83848_PHY is not set -# CONFIG_DP83867_PHY is not set -# CONFIG_DP83869_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_XILINX_GMII2RGMII is not set -CONFIG_MDIO_DEVICE=m -CONFIG_MDIO_BUS=m -CONFIG_OF_MDIO=m -CONFIG_MDIO_DEVRES=m -# CONFIG_MDIO_SUN4I is not set -CONFIG_MDIO_BITBANG=m -# CONFIG_MDIO_BCM_UNIMAC is not set -# CONFIG_MDIO_GPIO is not set -# CONFIG_MDIO_HISI_FEMAC is not set -# CONFIG_MDIO_MVUSB is not set -# CONFIG_MDIO_MSCC_MIIM is not set -# CONFIG_MDIO_OCTEON is not set -# CONFIG_MDIO_IPQ4019 is not set -# CONFIG_MDIO_IPQ8064 is not set - -# -# MDIO Multiplexers -# -CONFIG_MDIO_BUS_MUX=m -# CONFIG_MDIO_BUS_MUX_GPIO is not set -# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set -CONFIG_MDIO_BUS_MUX_MMIOREG=m - -# -# PCS device drivers -# -# CONFIG_PCS_XPCS is not set -# end of PCS device drivers - -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Host-side USB support is needed for USB Network Adapter support -# -CONFIG_USB_NET_DRIVERS=m -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_RTL8152=m -CONFIG_USB_LAN78XX=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_AX88179_178A=m -CONFIG_USB_NET_CDCETHER=m -# CONFIG_USB_NET_CDC_EEM is not set -# CONFIG_USB_NET_CDC_NCM is not set -# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set -# CONFIG_USB_NET_CDC_MBIM is not set -# CONFIG_USB_NET_DM9601 is not set -# CONFIG_USB_NET_SR9700 is not set -CONFIG_USB_NET_SR9800=m -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=m -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET_ENABLE=m -CONFIG_USB_NET_CDC_SUBSET=m -# CONFIG_USB_ALI_M5632 is not set -# CONFIG_USB_AN2720 is not set -CONFIG_USB_BELKIN=y -# CONFIG_USB_ARMLINUX is not set -# CONFIG_USB_EPSON2888 is not set -# CONFIG_USB_KC2190 is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_NET_CX82310_ETH is not set -# CONFIG_USB_NET_KALMIA is not set -CONFIG_USB_NET_QMI_WWAN=m -# CONFIG_USB_HSO is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_USB_IPHETH is not set -# CONFIG_USB_SIERRA_NET is not set -# CONFIG_USB_VL600 is not set -# CONFIG_USB_NET_CH9200 is not set -# CONFIG_USB_NET_AQC111 is not set -# CONFIG_USB_RTL8153_ECM is not set -CONFIG_WLAN=y -# CONFIG_WLAN_VENDOR_ADMTEK is not set -CONFIG_ATH_COMMON=m -CONFIG_WLAN_VENDOR_ATH=y -# CONFIG_ATH_DEBUG is not set -# CONFIG_ATH9K is not set -# CONFIG_ATH9K_HTC is not set -# CONFIG_CARL9170 is not set -# CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set -CONFIG_ATH10K=m -CONFIG_ATH10K_CE=y -# CONFIG_ATH10K_SDIO is not set -# CONFIG_ATH10K_USB is not set -# CONFIG_ATH10K_DEBUG is not set -# CONFIG_ATH10K_DEBUGFS is not set -# CONFIG_WCN36XX is not set -CONFIG_WLAN_VENDOR_ATMEL=y -# CONFIG_AT76C50X_USB is not set -CONFIG_WLAN_VENDOR_BROADCOM=y -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_BRCMUTIL=m -# CONFIG_BRCMSMAC is not set -CONFIG_BRCMFMAC=m -CONFIG_BRCMFMAC_PROTO_BCDC=y -CONFIG_BRCMFMAC_SDIO=y -# CONFIG_BRCMFMAC_USB is not set -# CONFIG_BRCM_TRACING is not set -# CONFIG_BRCMDBG is not set -# CONFIG_WLAN_VENDOR_CISCO is not set -# CONFIG_WLAN_VENDOR_INTEL is not set -# CONFIG_WLAN_VENDOR_INTERSIL is not set -# CONFIG_WLAN_VENDOR_MARVELL is not set -# CONFIG_WLAN_VENDOR_MEDIATEK is not set -CONFIG_WLAN_VENDOR_MICROCHIP=y -# CONFIG_WILC1000_SDIO is not set -CONFIG_WLAN_VENDOR_RALINK=y -CONFIG_RT2X00=m -# CONFIG_RT2500USB is not set -# CONFIG_RT73USB is not set -CONFIG_RT2800USB=m -CONFIG_RT2800USB_RT33XX=y -CONFIG_RT2800USB_RT35XX=y -CONFIG_RT2800USB_RT3573=y -CONFIG_RT2800USB_RT53XX=y -CONFIG_RT2800USB_RT55XX=y -# CONFIG_RT2800USB_UNKNOWN is not set -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WLAN_VENDOR_REALTEK=y -# CONFIG_RTL8187 is not set -CONFIG_RTL_CARDS=m -# CONFIG_RTL8192CU is not set -# CONFIG_RTL8XXXU is not set -# CONFIG_RTW88 is not set -# CONFIG_WLAN_VENDOR_RSI is not set -# CONFIG_WLAN_VENDOR_ST is not set -# CONFIG_WLAN_VENDOR_TI is not set -# CONFIG_WLAN_VENDOR_ZYDAS is not set -# CONFIG_WLAN_VENDOR_QUANTENNA is not set -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_VIRT_WIFI is not set -# CONFIG_WAN is not set -# CONFIG_XEN_NETDEV_FRONTEND is not set -# CONFIG_NETDEVSIM is not set -# CONFIG_NET_FAILOVER is not set -# CONFIG_ISDN is not set -# CONFIG_NVM is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_LEDS=m -CONFIG_INPUT_FF_MEMLESS=m -# CONFIG_INPUT_SPARSEKMAP is not set -CONFIG_INPUT_MATRIXKMAP=m - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=m -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ADC=m -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_KEYBOARD_QT1050 is not set -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -# CONFIG_KEYBOARD_DLINK_DIR685 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=m -# CONFIG_KEYBOARD_GPIO_POLLED is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_TCA8418 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_LM8333 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_SAMSUNG is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_SUN4I_LRADC=m -# CONFIG_KEYBOARD_OMAP4 is not set -# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_CAP11XX is not set -# CONFIG_KEYBOARD_BCM is not set -CONFIG_INPUT_MOUSE=y -# CONFIG_MOUSE_PS2 is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -# CONFIG_MOUSE_ELAN_I2C is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_MOUSE_SYNAPTICS_USB is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_PROPERTIES=y -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_ADC is not set -# CONFIG_TOUCHSCREEN_AR1021_I2C is not set -CONFIG_TOUCHSCREEN_ATMEL_MXT=m -# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set -# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_BU21029 is not set -# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set -# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_EGALAX is not set -# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set -# CONFIG_TOUCHSCREEN_EXC3000 is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -CONFIG_TOUCHSCREEN_GOODIX=m -# CONFIG_TOUCHSCREEN_HIDEEP is not set -# CONFIG_TOUCHSCREEN_ILI210X is not set -# CONFIG_TOUCHSCREEN_S6SY761 is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_EKTF2127 is not set -# CONFIG_TOUCHSCREEN_ELAN is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_WACOM_I2C is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MMS114 is not set -# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -CONFIG_TOUCHSCREEN_EDT_FT5X06=m -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_PIXCIR is not set -# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC_SERIO is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_RM_TS is not set -# CONFIG_TOUCHSCREEN_SILEAD is not set -# CONFIG_TOUCHSCREEN_SIS_I2C is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_STMFTS is not set -# CONFIG_TOUCHSCREEN_SUN4I is not set -# CONFIG_TOUCHSCREEN_SUR40 is not set -# CONFIG_TOUCHSCREEN_SX8654 is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -# CONFIG_TOUCHSCREEN_ZET6223 is not set -# CONFIG_TOUCHSCREEN_ZFORCE is not set -# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set -# CONFIG_TOUCHSCREEN_IQS5XX is not set -# CONFIG_TOUCHSCREEN_ZINITIX is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_ATMEL_CAPTOUCH is not set -# CONFIG_INPUT_BMA150 is not set -# CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GPIO_BEEPER is not set -# CONFIG_INPUT_GPIO_DECODER is not set -CONFIG_INPUT_GPIO_VIBRA=m -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_KXTJ9 is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -# CONFIG_INPUT_REGULATOR_HAPTIC is not set -CONFIG_INPUT_AXP20X_PEK=m -CONFIG_INPUT_UINPUT=m -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_PWM_BEEPER is not set -# CONFIG_INPUT_PWM_VIBRA is not set -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -# CONFIG_INPUT_DA7280_HAPTICS is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_IMS_PCU is not set -# CONFIG_INPUT_IQS269A is not set -# CONFIG_INPUT_CMA3000 is not set -# CONFIG_INPUT_XEN_KBDDEV_FRONTEND is not set -# CONFIG_INPUT_DRV260X_HAPTICS is not set -# CONFIG_INPUT_DRV2665_HAPTICS is not set -# CONFIG_INPUT_DRV2667_HAPTICS is not set -# CONFIG_RMI4_CORE is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_AMBAKMI is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_SERIO_ARC_PS2 is not set -# CONFIG_SERIO_APBPS2 is not set -# CONFIG_SERIO_SUN4I_PS2 is not set -# CONFIG_SERIO_GPIO_PS2 is not set -# CONFIG_USERIO is not set -# CONFIG_GAMEPORT is not set -# end of Hardware I/O ports -# end of Input device support - -# -# Character devices -# -CONFIG_TTY=y -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_LDISC_AUTOLOAD=y - -# -# Serial drivers -# -CONFIG_SERIAL_EARLYCON=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -# CONFIG_SERIAL_8250_FINTEK is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_DMA=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_ASPEED_VUART is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -# CONFIG_SERIAL_8250_RSA is not set -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_DW=y -# CONFIG_SERIAL_8250_RT288X is not set -CONFIG_SERIAL_OF_PLATFORM=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_AMBA_PL010 is not set -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set -# CONFIG_SERIAL_UARTLITE is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_SIFIVE is not set -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_SC16IS7XX is not set -# CONFIG_SERIAL_BCM63XX is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -CONFIG_SERIAL_XILINX_PS_UART=y -CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_SERIAL_FSL_LINFLEXUART is not set -# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set -# CONFIG_SERIAL_SPRD is not set -# end of Serial drivers - -CONFIG_SERIAL_MCTRL_GPIO=y -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_NULL_TTY is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_HVC_XEN is not set -# CONFIG_HVC_DCC is not set -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -# CONFIG_VIRTIO_CONSOLE is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_IPMB_DEVICE_INTERFACE is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_HW_RANDOM_BA431 is not set -CONFIG_HW_RANDOM_OPTEE=m -# CONFIG_HW_RANDOM_CCTRNG is not set -# CONFIG_HW_RANDOM_XIPHERA is not set -CONFIG_DEVMEM=y -# CONFIG_RAW_DRIVER is not set -CONFIG_TCG_TPM=m -CONFIG_HW_RANDOM_TPM=y -# CONFIG_TCG_TIS is not set -# CONFIG_TCG_TIS_I2C_ATMEL is not set -CONFIG_TCG_TIS_I2C_INFINEON=m -# CONFIG_TCG_TIS_I2C_NUVOTON is not set -# CONFIG_TCG_XEN is not set -# CONFIG_TCG_VTPM_PROXY is not set -# CONFIG_TCG_FTPM_TEE is not set -# CONFIG_TCG_TIS_ST33ZP24_I2C is not set -# CONFIG_XILLYBUS is not set -# end of Character devices - -# CONFIG_RANDOM_TRUST_CPU is not set -# CONFIG_RANDOM_TRUST_BOOTLOADER is not set - -# -# I2C support -# -CONFIG_I2C=m -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_MUX=m - -# -# Multiplexer I2C Chip support -# -# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set -# CONFIG_I2C_MUX_GPIO is not set -# CONFIG_I2C_MUX_GPMUX is not set -# CONFIG_I2C_MUX_LTC4306 is not set -# CONFIG_I2C_MUX_PCA9541 is not set -CONFIG_I2C_MUX_PCA954x=m -# CONFIG_I2C_MUX_PINCTRL is not set -# CONFIG_I2C_MUX_REG is not set -# CONFIG_I2C_DEMUX_PINCTRL is not set -# CONFIG_I2C_MUX_MLXCPLD is not set -# end of Multiplexer I2C Chip support - -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=m - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_CADENCE is not set -# CONFIG_I2C_CBUS_GPIO is not set -CONFIG_I2C_DESIGNWARE_CORE=m -# CONFIG_I2C_DESIGNWARE_SLAVE is not set -CONFIG_I2C_DESIGNWARE_PLATFORM=m -# CONFIG_I2C_EMEV2 is not set -CONFIG_I2C_GPIO=m -# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set -CONFIG_I2C_MV64XXX=m -# CONFIG_I2C_NOMADIK is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PCA_PLATFORM is not set -CONFIG_I2C_RK3X=m -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_ROBOTFUZZ_OSIF is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# end of I2C Hardware Bus support - -# CONFIG_I2C_STUB is not set -CONFIG_I2C_SLAVE=y -# CONFIG_I2C_SLAVE_EEPROM is not set -# CONFIG_I2C_SLAVE_TESTUNIT is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# end of I2C support - -# CONFIG_I3C is not set -# CONFIG_SPI is not set -CONFIG_SPMI=y -# CONFIG_HSI is not set -# CONFIG_PPS is not set - -# -# PTP clock support -# -# CONFIG_PTP_1588_CLOCK is not set - -# -# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. -# -# end of PTP clock support - -CONFIG_PINCTRL=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_PINMUX=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_PINCONF=y -CONFIG_GENERIC_PINCONF=y -# CONFIG_PINCTRL_AXP209 is not set -# CONFIG_PINCTRL_MCP23S08 is not set -CONFIG_PINCTRL_SINGLE=y -# CONFIG_PINCTRL_STMFX is not set -# CONFIG_PINCTRL_OCELOT is not set -# CONFIG_PINCTRL_MICROCHIP_SGPIO is not set - -# -# Renesas pinctrl drivers -# -# end of Renesas pinctrl drivers - -CONFIG_PINCTRL_SUNXI=y -# CONFIG_PINCTRL_SUN4I_A10 is not set -# CONFIG_PINCTRL_SUN5I is not set -# CONFIG_PINCTRL_SUN6I_A31 is not set -# CONFIG_PINCTRL_SUN6I_A31_R is not set -# CONFIG_PINCTRL_SUN8I_A23 is not set -# CONFIG_PINCTRL_SUN8I_A33 is not set -# CONFIG_PINCTRL_SUN8I_A83T is not set -# CONFIG_PINCTRL_SUN8I_A83T_R is not set -# CONFIG_PINCTRL_SUN8I_A23_R is not set -# CONFIG_PINCTRL_SUN8I_H3 is not set -CONFIG_PINCTRL_SUN8I_H3_R=y -# CONFIG_PINCTRL_SUN8I_V3S is not set -# CONFIG_PINCTRL_SUN9I_A80 is not set -# CONFIG_PINCTRL_SUN9I_A80_R is not set -CONFIG_PINCTRL_SUN50I_A64=y -CONFIG_PINCTRL_SUN50I_A64_R=y -CONFIG_PINCTRL_SUN50I_A100=y -CONFIG_PINCTRL_SUN50I_A100_R=y -CONFIG_PINCTRL_SUN50I_H5=y -CONFIG_PINCTRL_SUN50I_H6=y -CONFIG_PINCTRL_SUN50I_H6_R=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_FASTPATH_LIMIT=512 -CONFIG_OF_GPIO=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_CDEV_V1=y -CONFIG_GPIO_GENERIC=m - -# -# Memory mapped GPIO drivers -# -# CONFIG_GPIO_74XX_MMIO is not set -# CONFIG_GPIO_ALTERA is not set -# CONFIG_GPIO_CADENCE is not set -# CONFIG_GPIO_DWAPB is not set -# CONFIG_GPIO_FTGPIO010 is not set -CONFIG_GPIO_GENERIC_PLATFORM=m -# CONFIG_GPIO_GRGPIO is not set -# CONFIG_GPIO_HLWD is not set -# CONFIG_GPIO_LOGICVC is not set -CONFIG_GPIO_MB86S7X=m -CONFIG_GPIO_PL061=m -# CONFIG_GPIO_SAMA5D2_PIOBU is not set -# CONFIG_GPIO_SIFIVE is not set -# CONFIG_GPIO_SYSCON is not set -CONFIG_GPIO_XGENE=y -# CONFIG_GPIO_XILINX is not set -# CONFIG_GPIO_AMD_FCH is not set -# end of Memory mapped GPIO drivers - -# -# I2C GPIO expanders -# -# CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_ADNP is not set -# CONFIG_GPIO_GW_PLD is not set -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=m -CONFIG_GPIO_PCA953X_IRQ=y -# CONFIG_GPIO_PCA9570 is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_TPIC2810 is not set -# end of I2C GPIO expanders - -# -# MFD GPIO expanders -# -# end of MFD GPIO expanders - -# -# USB GPIO expanders -# -# end of USB GPIO expanders - -# -# Virtual GPIO drivers -# -# CONFIG_GPIO_AGGREGATOR is not set -# CONFIG_GPIO_MOCKUP is not set -# end of Virtual GPIO drivers - -# CONFIG_W1 is not set -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_BRCMSTB=y -# CONFIG_POWER_RESET_GPIO is not set -# CONFIG_POWER_RESET_GPIO_RESTART is not set -# CONFIG_POWER_RESET_LTC2952 is not set -CONFIG_POWER_RESET_REGULATOR=y -# CONFIG_POWER_RESET_RESTART is not set -CONFIG_POWER_RESET_XGENE=y -CONFIG_POWER_RESET_SYSCON=y -# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set -CONFIG_REBOOT_MODE=y -CONFIG_SYSCON_REBOOT_MODE=y -# CONFIG_NVMEM_REBOOT_MODE is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -CONFIG_POWER_SUPPLY_HWMON=y -# CONFIG_PDA_POWER is not set -# CONFIG_GENERIC_ADC_BATTERY is not set -# CONFIG_TEST_POWER is not set -# CONFIG_CHARGER_ADP5061 is not set -# CONFIG_BATTERY_CW2015 is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_SBS is not set -# CONFIG_CHARGER_SBS is not set -# CONFIG_MANAGER_SBS is not set -CONFIG_BATTERY_BQ27XXX=m -CONFIG_BATTERY_BQ27XXX_I2C=m -# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set -CONFIG_CHARGER_AXP20X=m -CONFIG_BATTERY_AXP20X=m -CONFIG_AXP20X_POWER=m -CONFIG_AXP288_FUEL_GAUGE=m -# CONFIG_BATTERY_MAX17040 is not set -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_CHARGER_ISP1704 is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_MANAGER is not set -# CONFIG_CHARGER_LT3651 is not set -# CONFIG_CHARGER_DETECTOR_MAX14656 is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set -# CONFIG_CHARGER_BQ2515X is not set -# CONFIG_CHARGER_BQ25890 is not set -# CONFIG_CHARGER_BQ25980 is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_BATTERY_GAUGE_LTC2941 is not set -# CONFIG_CHARGER_RT9455 is not set -# CONFIG_CHARGER_UCS1002 is not set -# CONFIG_CHARGER_BD99954 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM1177 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7410 is not set -# CONFIG_SENSORS_ADT7411 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_AS370 is not set -# CONFIG_SENSORS_ASC7621 is not set -# CONFIG_SENSORS_AXI_FAN_CONTROL is not set -CONFIG_SENSORS_ARM_SCPI=m -# CONFIG_SENSORS_ASPEED is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_CORSAIR_CPRO is not set -# CONFIG_SENSORS_CORSAIR_PSU is not set -# CONFIG_SENSORS_DS620 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_FTSTEUTATES is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_G762 is not set -# CONFIG_SENSORS_GPIO_FAN is not set -# CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_IIO_HWMON is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_POWR1220 is not set -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LTC2945 is not set -# CONFIG_SENSORS_LTC2947_I2C is not set -# CONFIG_SENSORS_LTC2990 is not set -# CONFIG_SENSORS_LTC2992 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4222 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4260 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_MAX127 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_MAX31730 is not set -# CONFIG_SENSORS_MAX6621 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_MAX6697 is not set -# CONFIG_SENSORS_MAX31790 is not set -# CONFIG_SENSORS_MCP3021 is not set -# CONFIG_SENSORS_TC654 is not set -# CONFIG_SENSORS_MR75203 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LM95234 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_LM95245 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_NTC_THERMISTOR is not set -# CONFIG_SENSORS_NCT6683 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_NCT7802 is not set -# CONFIG_SENSORS_NCT7904 is not set -# CONFIG_SENSORS_NPCM7XX is not set -# CONFIG_SENSORS_OCC_P8_I2C is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_PWM_FAN is not set -# CONFIG_SENSORS_SBTSI is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SHT3x is not set -# CONFIG_SENSORS_SHTC1 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_SCH5636 is not set -# CONFIG_SENSORS_STTS751 is not set -# CONFIG_SENSORS_SMM665 is not set -# CONFIG_SENSORS_ADC128D818 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_AMC6821 is not set -# CONFIG_SENSORS_INA209 is not set -# CONFIG_SENSORS_INA2XX is not set -# CONFIG_SENSORS_INA3221 is not set -# CONFIG_SENSORS_TC74 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP102 is not set -# CONFIG_SENSORS_TMP103 is not set -# CONFIG_SENSORS_TMP108 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_TMP513 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83773G is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -CONFIG_THERMAL=y -# CONFIG_THERMAL_NETLINK is not set -CONFIG_THERMAL_STATISTICS=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set -# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set -CONFIG_THERMAL_GOV_FAIR_SHARE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_BANG_BANG=y -CONFIG_THERMAL_GOV_USER_SPACE=y -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_FREQ_THERMAL=y -CONFIG_DEVFREQ_THERMAL=y -CONFIG_THERMAL_EMULATION=y -# CONFIG_THERMAL_MMIO is not set -CONFIG_SUN8I_THERMAL=m -# CONFIG_GENERIC_ADC_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_CORE=m -# CONFIG_WATCHDOG_NOWAYOUT is not set -CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y -CONFIG_WATCHDOG_OPEN_TIMEOUT=0 -# CONFIG_WATCHDOG_SYSFS is not set - -# -# Watchdog Pretimeout Governors -# -# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_GPIO_WATCHDOG is not set -# CONFIG_XILINX_WATCHDOG is not set -# CONFIG_ZIIRAVE_WATCHDOG is not set -CONFIG_ARM_SP805_WATCHDOG=m -# CONFIG_ARM_SBSA_WATCHDOG is not set -# CONFIG_CADENCE_WATCHDOG is not set -# CONFIG_DW_WATCHDOG is not set -# CONFIG_SUNXI_WATCHDOG is not set -# CONFIG_MAX63XX_WATCHDOG is not set -# CONFIG_ARM_SMC_WATCHDOG is not set -# CONFIG_MEN_A21_WDT is not set -# CONFIG_XEN_WDT is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set -CONFIG_BCMA_POSSIBLE=y -# CONFIG_BCMA is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_ACT8945A is not set -# CONFIG_MFD_SUN4I_GPADC is not set -# CONFIG_MFD_ATMEL_FLEXCOM is not set -# CONFIG_MFD_ATMEL_HLCDC is not set -# CONFIG_MFD_BCM590XX is not set -# CONFIG_MFD_BD9571MWV is not set -CONFIG_MFD_AC100=m -CONFIG_MFD_AXP20X=y -# CONFIG_MFD_AXP20X_I2C is not set -CONFIG_MFD_AXP20X_RSB=y -# CONFIG_MFD_MADERA is not set -# CONFIG_MFD_DA9062 is not set -# CONFIG_MFD_DA9063 is not set -# CONFIG_MFD_DA9150 is not set -# CONFIG_MFD_DLN2 is not set -# CONFIG_MFD_GATEWORKS_GSC is not set -# CONFIG_MFD_MC13XXX_I2C is not set -# CONFIG_MFD_MP2629 is not set -# CONFIG_MFD_HI6421_PMIC is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_IQS62X is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_MFD_88PM800 is not set -# CONFIG_MFD_88PM805 is not set -# CONFIG_MFD_MAX14577 is not set -# CONFIG_MFD_MAX77650 is not set -# CONFIG_MFD_MAX77686 is not set -# CONFIG_MFD_MAX77693 is not set -# CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_MT6360 is not set -# CONFIG_MFD_MT6397 is not set -# CONFIG_MFD_MENF21BMC is not set -# CONFIG_MFD_VIPERBOARD is not set -# CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_RT5033 is not set -# CONFIG_MFD_RK808 is not set -# CONFIG_MFD_RN5T618 is not set -# CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_SKY81452 is not set -# CONFIG_ABX500_CORE is not set -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_LP3943 is not set -# CONFIG_MFD_TI_LMU is not set -# CONFIG_TPS6105X is not set -# CONFIG_TPS65010 is not set -# CONFIG_TPS6507X is not set -# CONFIG_MFD_TPS65086 is not set -# CONFIG_MFD_TPS65217 is not set -# CONFIG_MFD_TI_LP873X is not set -# CONFIG_MFD_TI_LP87565 is not set -# CONFIG_MFD_TPS65218 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_WL1273_CORE is not set -# CONFIG_MFD_LM3533 is not set -# CONFIG_MFD_TQMX86 is not set -# CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_STMFX is not set -# CONFIG_RAVE_SP_CORE is not set -# end of Multifunction device drivers - -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_FIXED_VOLTAGE=m -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER_OF is not set -# CONFIG_REGULATOR_88PG86X is not set -# CONFIG_REGULATOR_ACT8865 is not set -# CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_AXP20X=y -# CONFIG_REGULATOR_DA9121 is not set -# CONFIG_REGULATOR_DA9210 is not set -# CONFIG_REGULATOR_DA9211 is not set -CONFIG_REGULATOR_FAN53555=m -# CONFIG_REGULATOR_FAN53880 is not set -CONFIG_REGULATOR_GPIO=m -# CONFIG_REGULATOR_ISL9305 is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -# CONFIG_REGULATOR_LP872X is not set -# CONFIG_REGULATOR_LP8755 is not set -# CONFIG_REGULATOR_LTC3589 is not set -# CONFIG_REGULATOR_LTC3676 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -# CONFIG_REGULATOR_MAX8973 is not set -# CONFIG_REGULATOR_MAX77826 is not set -# CONFIG_REGULATOR_MCP16502 is not set -# CONFIG_REGULATOR_MP5416 is not set -# CONFIG_REGULATOR_MP8859 is not set -# CONFIG_REGULATOR_MP886X is not set -# CONFIG_REGULATOR_MPQ7920 is not set -# CONFIG_REGULATOR_MT6311 is not set -# CONFIG_REGULATOR_PCA9450 is not set -# CONFIG_REGULATOR_PF8X00 is not set -# CONFIG_REGULATOR_PFUZE100 is not set -# CONFIG_REGULATOR_PV88060 is not set -# CONFIG_REGULATOR_PV88080 is not set -# CONFIG_REGULATOR_PV88090 is not set -CONFIG_REGULATOR_PWM=m -# CONFIG_REGULATOR_QCOM_SPMI is not set -# CONFIG_REGULATOR_QCOM_USB_VBUS is not set -# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set -# CONFIG_REGULATOR_RT4801 is not set -# CONFIG_REGULATOR_RTMV20 is not set -# CONFIG_REGULATOR_SLG51000 is not set -# CONFIG_REGULATOR_SY8106A is not set -# CONFIG_REGULATOR_SY8824X is not set -# CONFIG_REGULATOR_SY8827N is not set -# CONFIG_REGULATOR_TPS51632 is not set -# CONFIG_REGULATOR_TPS62360 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_TPS65132 is not set -CONFIG_REGULATOR_VCTRL=m -# CONFIG_REGULATOR_QCOM_LABIBB is not set -# CONFIG_REGULATOR_TP65185X is not set -# CONFIG_RC_CORE is not set -# CONFIG_MEDIA_CEC_SUPPORT is not set -CONFIG_MEDIA_SUPPORT=m -CONFIG_MEDIA_SUPPORT_FILTER=y -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y - -# -# Media device types -# -CONFIG_MEDIA_CAMERA_SUPPORT=y -# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set -# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_PLATFORM_SUPPORT=y -# CONFIG_MEDIA_TEST_SUPPORT is not set -# end of Media device types - -CONFIG_VIDEO_DEV=m -CONFIG_MEDIA_CONTROLLER=y - -# -# Video4Linux options -# -CONFIG_VIDEO_V4L2=m -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_V4L2_MEM2MEM_DEV=m -CONFIG_V4L2_FLASH_LED_CLASS=m -CONFIG_V4L2_FWNODE=m -# end of Video4Linux options - -# -# Media controller options -# -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y - -# -# Please notice that the enabled Media controller Request API is EXPERIMENTAL -# -# end of Media controller options - -# -# Media drivers -# - -# -# Drivers filtered as selected at 'Filter media drivers' -# -CONFIG_MEDIA_USB_SUPPORT=y - -# -# Webcam devices -# -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_BENQ is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_CPIA1 is not set -# CONFIG_USB_GSPCA_DTCS033 is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_JL2005BCD is not set -# CONFIG_USB_GSPCA_KINECT is not set -# CONFIG_USB_GSPCA_KONICA is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_NW80X is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_OV534_9 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SE401 is not set -# CONFIG_USB_GSPCA_SN9C2028 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SPCA1528 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_SQ930X is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STK1135 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TOPRO is not set -# CONFIG_USB_GSPCA_TOUPTEK is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_VICAM is not set -# CONFIG_USB_GSPCA_XIRLINK_CIT is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -# CONFIG_USB_PWC is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_VIDEO_USBTV is not set - -# -# Webcam, TV (analog/digital) USB devices -# -# CONFIG_VIDEO_EM28XX is not set -CONFIG_VIDEOBUF2_CORE=m -CONFIG_VIDEOBUF2_V4L2=m -CONFIG_VIDEOBUF2_MEMOPS=m -CONFIG_VIDEOBUF2_DMA_CONTIG=m -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_V4L_PLATFORM_DRIVERS=y -# CONFIG_VIDEO_CADENCE is not set -# CONFIG_VIDEO_ASPEED is not set -# CONFIG_VIDEO_MUX is not set -# CONFIG_VIDEO_XILINX is not set -# CONFIG_VIDEO_SUN4I_CSI is not set -CONFIG_VIDEO_SUN6I_CSI=m -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m -CONFIG_VIDEO_SUN8I_DEINTERLACE=m -CONFIG_VIDEO_SUN8I_ROTATE=m -# end of Media drivers - -CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y - -# -# Media ancillary drivers -# - -# -# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers' -# - -# -# Video and audio decoders -# - -# -# Camera sensor devices -# -# CONFIG_VIDEO_HI556 is not set -# CONFIG_VIDEO_IMX214 is not set -# CONFIG_VIDEO_IMX219 is not set -# CONFIG_VIDEO_IMX258 is not set -# CONFIG_VIDEO_IMX274 is not set -# CONFIG_VIDEO_IMX290 is not set -# CONFIG_VIDEO_IMX319 is not set -# CONFIG_VIDEO_IMX355 is not set -# CONFIG_VIDEO_OV02A10 is not set -# CONFIG_VIDEO_OV2640 is not set -# CONFIG_VIDEO_OV2659 is not set -# CONFIG_VIDEO_OV2680 is not set -# CONFIG_VIDEO_OV2685 is not set -CONFIG_VIDEO_OV5640=m -# CONFIG_VIDEO_OV5645 is not set -# CONFIG_VIDEO_OV5647 is not set -# CONFIG_VIDEO_OV6650 is not set -# CONFIG_VIDEO_OV5670 is not set -# CONFIG_VIDEO_OV5675 is not set -# CONFIG_VIDEO_OV5695 is not set -# CONFIG_VIDEO_OV7251 is not set -# CONFIG_VIDEO_OV772X is not set -# CONFIG_VIDEO_OV7640 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_OV7740 is not set -# CONFIG_VIDEO_OV8856 is not set -# CONFIG_VIDEO_OV9640 is not set -# CONFIG_VIDEO_OV9650 is not set -# CONFIG_VIDEO_OV13858 is not set -# CONFIG_VIDEO_VS6624 is not set -# CONFIG_VIDEO_MT9M001 is not set -# CONFIG_VIDEO_MT9M032 is not set -# CONFIG_VIDEO_MT9M111 is not set -# CONFIG_VIDEO_MT9P031 is not set -# CONFIG_VIDEO_MT9T001 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V032 is not set -# CONFIG_VIDEO_MT9V111 is not set -# CONFIG_VIDEO_SR030PC30 is not set -# CONFIG_VIDEO_NOON010PC30 is not set -# CONFIG_VIDEO_M5MOLS is not set -# CONFIG_VIDEO_RDACM20 is not set -# CONFIG_VIDEO_RJ54N1 is not set -# CONFIG_VIDEO_S5K6AA is not set -# CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_S5K4ECGX is not set -# CONFIG_VIDEO_S5K5BAF is not set -# CONFIG_VIDEO_CCS is not set -# CONFIG_VIDEO_ET8EK8 is not set -# CONFIG_VIDEO_HM5065 is not set -CONFIG_VIDEO_GC2145=m -# end of Camera sensor devices - -# -# Lens drivers -# -# CONFIG_VIDEO_AD5820 is not set -# CONFIG_VIDEO_AK7375 is not set -# CONFIG_VIDEO_DW9714 is not set -# CONFIG_VIDEO_DW9768 is not set -# CONFIG_VIDEO_DW9807_VCM is not set -# end of Lens drivers - -# -# Flash devices -# -# CONFIG_VIDEO_ADP1653 is not set -# CONFIG_VIDEO_LM3560 is not set -# CONFIG_VIDEO_LM3646 is not set -# end of Flash devices -# end of Media ancillary drivers - -# -# Graphics support -# -CONFIG_DRM=m -CONFIG_DRM_MIPI_DSI=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -CONFIG_DRM_KMS_HELPER=m -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -# CONFIG_DRM_DP_CEC is not set -CONFIG_DRM_GEM_CMA_HELPER=y -CONFIG_DRM_KMS_CMA_HELPER=y -CONFIG_DRM_GEM_SHMEM_HELPER=y -CONFIG_DRM_SCHED=m - -# -# I2C encoder or helper chips -# -CONFIG_DRM_I2C_CH7006=m -CONFIG_DRM_I2C_SIL164=m -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - -# -# ARM devices -# -# CONFIG_DRM_HDLCD is not set -CONFIG_DRM_MALI_DISPLAY=m -# CONFIG_DRM_KOMEDA is not set -# end of ARM devices - -# CONFIG_DRM_VGEM is not set -# CONFIG_DRM_VKMS is not set -CONFIG_DRM_UDL=m -# CONFIG_DRM_RCAR_DW_HDMI is not set -# CONFIG_DRM_RCAR_LVDS is not set -CONFIG_DRM_SUN4I=m -CONFIG_DRM_SUN4I_HDMI=m -# CONFIG_DRM_SUN4I_HDMI_CEC is not set -CONFIG_DRM_SUN4I_BACKEND=m -CONFIG_DRM_SUN6I_DSI=m -CONFIG_DRM_SUN8I_DW_HDMI=m -CONFIG_DRM_SUN8I_MIXER=m -CONFIG_DRM_SUN8I_TCON_TOP=m -CONFIG_DRM_PANEL=y - -# -# Display Panels -# -# CONFIG_DRM_PANEL_ARM_VERSATILE is not set -# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set -# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set -# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=m -# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set -CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m -CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m -CONFIG_DRM_PANEL_ILITEK_ILI9881C=m -# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set -# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set -# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set -# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set -# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set -# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set -# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set -# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set -# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set -# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set -# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set -CONFIG_DRM_PANEL_SITRONIX_ST7703=m -# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set -# CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set -# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set -# end of Display Panels - -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_PANEL_BRIDGE=y - -# -# Display Interface Bridges -# -# CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_CHRONTEL_CH7033 is not set -CONFIG_DRM_DISPLAY_CONNECTOR=m -# CONFIG_DRM_LONTIUM_LT9611 is not set -# CONFIG_DRM_LONTIUM_LT9611UXC is not set -# CONFIG_DRM_LVDS_CODEC is not set -# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set -# CONFIG_DRM_NWL_MIPI_DSI is not set -# CONFIG_DRM_NXP_PTN3460 is not set -# CONFIG_DRM_PARADE_PS8622 is not set -# CONFIG_DRM_PARADE_PS8640 is not set -# CONFIG_DRM_SIL_SII8620 is not set -# CONFIG_DRM_SII902X is not set -# CONFIG_DRM_SII9234 is not set -# CONFIG_DRM_SIMPLE_BRIDGE is not set -# CONFIG_DRM_THINE_THC63LVD1024 is not set -# CONFIG_DRM_TOSHIBA_TC358762 is not set -# CONFIG_DRM_TOSHIBA_TC358764 is not set -# CONFIG_DRM_TOSHIBA_TC358767 is not set -# CONFIG_DRM_TOSHIBA_TC358768 is not set -# CONFIG_DRM_TOSHIBA_TC358775 is not set -# CONFIG_DRM_TI_TFP410 is not set -# CONFIG_DRM_TI_SN65DSI86 is not set -# CONFIG_DRM_TI_TPD12S015 is not set -# CONFIG_DRM_ANALOGIX_ANX6345 is not set -# CONFIG_DRM_ANALOGIX_ANX78XX is not set -# CONFIG_DRM_ANALOGIX_ANX7625 is not set -# CONFIG_DRM_I2C_ADV7511 is not set -# CONFIG_DRM_CDNS_MHDP8546 is not set -CONFIG_DRM_DW_HDMI=m -# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set -# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set -# CONFIG_DRM_DW_HDMI_CEC is not set -# end of Display Interface Bridges - -# CONFIG_DRM_ETNAVIV is not set -# CONFIG_DRM_ARCPGU is not set -# CONFIG_DRM_HISI_KIRIN is not set -# CONFIG_DRM_MXSFB is not set -# CONFIG_DRM_GM12U320 is not set -# CONFIG_DRM_PL111 is not set -# CONFIG_DRM_XEN is not set -CONFIG_DRM_LIMA=m -# CONFIG_DRM_PANFROST is not set -# CONFIG_DRM_TIDSS is not set -# CONFIG_DRM_LEGACY is not set -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=m - -# -# Frame buffer Devices -# -CONFIG_FB_CMDLINE=y -CONFIG_FB_NOTIFY=y -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_SYS_FILLRECT=m -CONFIG_FB_SYS_COPYAREA=m -CONFIG_FB_SYS_IMAGEBLIT=m -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=m -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_ARMCLCD is not set -# CONFIG_FB_OPENCORES is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_SUN5I_EINK is not set -# CONFIG_FB_SMSCUFX is not set -CONFIG_FB_UDL=m -# CONFIG_FB_IBM_GXT4500 is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_XEN_FBDEV_FRONTEND is not set -# CONFIG_FB_METRONOME is not set -CONFIG_FB_SIMPLE=y -# CONFIG_FB_SSD1307 is not set -# end of Frame buffer Devices - -# -# Backlight & LCD device support -# -CONFIG_LCD_CLASS_DEVICE=m -# CONFIG_LCD_PLATFORM is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=m -# CONFIG_BACKLIGHT_KTD253 is not set -CONFIG_BACKLIGHT_PWM=m -# CONFIG_BACKLIGHT_QCOM_WLED is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_LM3630A is not set -# CONFIG_BACKLIGHT_LM3639 is not set -# CONFIG_BACKLIGHT_LP855X is not set -# CONFIG_BACKLIGHT_GPIO is not set -# CONFIG_BACKLIGHT_LV5207LP is not set -# CONFIG_BACKLIGHT_BD6107 is not set -# CONFIG_BACKLIGHT_ARCXCNN is not set -# CONFIG_BACKLIGHT_LED is not set -# end of Backlight & LCD device support - -CONFIG_VIDEOMODE_HELPERS=y -CONFIG_HDMI=y - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_DUMMY_CONSOLE_COLUMNS=80 -CONFIG_DUMMY_CONSOLE_ROWS=25 -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set -# end of Console display driver support - -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -# end of Graphics support - -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -CONFIG_SND_DMAENGINE_PCM=m -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -CONFIG_SND_JACK_INPUT_DEV=y -# CONFIG_SND_OSSEMUL is not set -CONFIG_SND_PCM_TIMER=y -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_PROC_FS=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_SEQUENCER is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_ALOOP=m -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# HD-Audio -# -# end of HD-Audio - -CONFIG_SND_HDA_PREALLOC_SIZE=64 -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y -# CONFIG_SND_USB_UA101 is not set -# CONFIG_SND_USB_CAIAQ is not set -# CONFIG_SND_USB_6FIRE is not set -# CONFIG_SND_USB_HIFACE is not set -# CONFIG_SND_BCD2000 is not set -# CONFIG_SND_USB_POD is not set -# CONFIG_SND_USB_PODHD is not set -# CONFIG_SND_USB_TONEPORT is not set -# CONFIG_SND_USB_VARIAX is not set -CONFIG_SND_SOC=m -CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y -CONFIG_SND_SOC_ADI=m -CONFIG_SND_SOC_ADI_AXI_I2S=m -CONFIG_SND_SOC_ADI_AXI_SPDIF=m -# CONFIG_SND_SOC_AMD_ACP is not set -# CONFIG_SND_ATMEL_SOC is not set -# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set -# CONFIG_SND_DESIGNWARE_I2S is not set - -# -# SoC Audio for Freescale CPUs -# - -# -# Common SoC Audio options for Freescale CPUs: -# -# CONFIG_SND_SOC_FSL_ASRC is not set -# CONFIG_SND_SOC_FSL_SAI is not set -# CONFIG_SND_SOC_FSL_AUDMIX is not set -# CONFIG_SND_SOC_FSL_SSI is not set -# CONFIG_SND_SOC_FSL_SPDIF is not set -# CONFIG_SND_SOC_FSL_ESAI is not set -# CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_FSL_XCVR is not set -# CONFIG_SND_SOC_IMX_AUDMUX is not set -# end of SoC Audio for Freescale CPUs - -# CONFIG_SND_I2S_HI6210_I2S is not set -# CONFIG_SND_SOC_IMG is not set -# CONFIG_SND_SOC_MTK_BTCVSD is not set -# CONFIG_SND_SOC_SOF_TOPLEVEL is not set - -# -# STMicroelectronics STM32 SOC audio support -# -# end of STMicroelectronics STM32 SOC audio support - -# -# Allwinner SoC Audio support -# -CONFIG_SND_SUN4I_CODEC=m -CONFIG_SND_SUN8I_CODEC=m -CONFIG_SND_SUN8I_CODEC_ANALOG=m -CONFIG_SND_SUN50I_CODEC_ANALOG=m -CONFIG_SND_SUN4I_I2S=m -CONFIG_SND_SUN4I_SPDIF=m -CONFIG_SND_SUN8I_ADDA_PR_REGMAP=m -# end of Allwinner SoC Audio support - -# CONFIG_SND_SOC_XILINX_I2S is not set -# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set -# CONFIG_SND_SOC_XILINX_SPDIF is not set -# CONFIG_SND_SOC_XTFPGA_I2S is not set -# CONFIG_ZX_TDM is not set -CONFIG_SND_SOC_I2C_AND_SPI=m - -# -# CODEC drivers -# -# CONFIG_SND_SOC_AC97_CODEC is not set -# CONFIG_SND_SOC_ADAU1372_I2C is not set -# CONFIG_SND_SOC_ADAU1701 is not set -# CONFIG_SND_SOC_ADAU1761_I2C is not set -# CONFIG_SND_SOC_ADAU7002 is not set -# CONFIG_SND_SOC_ADAU7118_HW is not set -# CONFIG_SND_SOC_ADAU7118_I2C is not set -# CONFIG_SND_SOC_AK4118 is not set -# CONFIG_SND_SOC_AK4458 is not set -# CONFIG_SND_SOC_AK4554 is not set -CONFIG_SND_SOC_AK4613=m -# CONFIG_SND_SOC_AK4642 is not set -# CONFIG_SND_SOC_AK5386 is not set -# CONFIG_SND_SOC_AK5558 is not set -# CONFIG_SND_SOC_ALC5623 is not set -# CONFIG_SND_SOC_BD28623 is not set -CONFIG_SND_SOC_BT_SCO=m -# CONFIG_SND_SOC_CS35L32 is not set -# CONFIG_SND_SOC_CS35L33 is not set -# CONFIG_SND_SOC_CS35L34 is not set -# CONFIG_SND_SOC_CS35L35 is not set -# CONFIG_SND_SOC_CS35L36 is not set -# CONFIG_SND_SOC_CS42L42 is not set -# CONFIG_SND_SOC_CS42L51_I2C is not set -# CONFIG_SND_SOC_CS42L52 is not set -# CONFIG_SND_SOC_CS42L56 is not set -# CONFIG_SND_SOC_CS42L73 is not set -# CONFIG_SND_SOC_CS4234 is not set -# CONFIG_SND_SOC_CS4265 is not set -# CONFIG_SND_SOC_CS4270 is not set -# CONFIG_SND_SOC_CS4271_I2C is not set -# CONFIG_SND_SOC_CS42XX8_I2C is not set -# CONFIG_SND_SOC_CS43130 is not set -# CONFIG_SND_SOC_CS4341 is not set -# CONFIG_SND_SOC_CS4349 is not set -# CONFIG_SND_SOC_CS53L30 is not set -# CONFIG_SND_SOC_CX2072X is not set -# CONFIG_SND_SOC_DA7213 is not set -CONFIG_SND_SOC_DMIC=m -CONFIG_SND_SOC_EC25=m -# CONFIG_SND_SOC_ES7134 is not set -# CONFIG_SND_SOC_ES7241 is not set -# CONFIG_SND_SOC_ES8316 is not set -# CONFIG_SND_SOC_ES8328_I2C is not set -# CONFIG_SND_SOC_GTM601 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set -# CONFIG_SND_SOC_MAX98088 is not set -# CONFIG_SND_SOC_MAX98357A is not set -# CONFIG_SND_SOC_MAX98504 is not set -# CONFIG_SND_SOC_MAX9867 is not set -# CONFIG_SND_SOC_MAX98927 is not set -# CONFIG_SND_SOC_MAX98373_I2C is not set -# CONFIG_SND_SOC_MAX98390 is not set -# CONFIG_SND_SOC_MAX9860 is not set -# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set -# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set -# CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM1789_I2C is not set -# CONFIG_SND_SOC_PCM179X_I2C is not set -# CONFIG_SND_SOC_PCM186X_I2C is not set -# CONFIG_SND_SOC_PCM3060_I2C is not set -# CONFIG_SND_SOC_PCM3168A_I2C is not set -# CONFIG_SND_SOC_PCM5102A is not set -# CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_RK3328 is not set -# CONFIG_SND_SOC_RT5616 is not set -# CONFIG_SND_SOC_RT5631 is not set -# CONFIG_SND_SOC_SGTL5000 is not set -CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m -CONFIG_SND_SOC_SIMPLE_MUX=m -# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set -# CONFIG_SND_SOC_SPDIF is not set -# CONFIG_SND_SOC_SSM2305 is not set -# CONFIG_SND_SOC_SSM2602_I2C is not set -# CONFIG_SND_SOC_SSM4567 is not set -# CONFIG_SND_SOC_STA32X is not set -# CONFIG_SND_SOC_STA350 is not set -# CONFIG_SND_SOC_STI_SAS is not set -# CONFIG_SND_SOC_TAS2552 is not set -# CONFIG_SND_SOC_TAS2562 is not set -# CONFIG_SND_SOC_TAS2764 is not set -# CONFIG_SND_SOC_TAS2770 is not set -# CONFIG_SND_SOC_TAS5086 is not set -# CONFIG_SND_SOC_TAS571X is not set -# CONFIG_SND_SOC_TAS5720 is not set -# CONFIG_SND_SOC_TAS6424 is not set -# CONFIG_SND_SOC_TDA7419 is not set -# CONFIG_SND_SOC_TFA9879 is not set -# CONFIG_SND_SOC_TLV320AIC23_I2C is not set -# CONFIG_SND_SOC_TLV320AIC31XX is not set -# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set -# CONFIG_SND_SOC_TLV320AIC3X is not set -# CONFIG_SND_SOC_TLV320ADCX140 is not set -# CONFIG_SND_SOC_TS3A227E is not set -# CONFIG_SND_SOC_TSCS42XX is not set -# CONFIG_SND_SOC_TSCS454 is not set -# CONFIG_SND_SOC_UDA1334 is not set -# CONFIG_SND_SOC_WM8510 is not set -# CONFIG_SND_SOC_WM8523 is not set -# CONFIG_SND_SOC_WM8524 is not set -# CONFIG_SND_SOC_WM8580 is not set -# CONFIG_SND_SOC_WM8711 is not set -# CONFIG_SND_SOC_WM8728 is not set -# CONFIG_SND_SOC_WM8731 is not set -# CONFIG_SND_SOC_WM8737 is not set -# CONFIG_SND_SOC_WM8741 is not set -# CONFIG_SND_SOC_WM8750 is not set -# CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8776 is not set -# CONFIG_SND_SOC_WM8782 is not set -# CONFIG_SND_SOC_WM8804_I2C is not set -# CONFIG_SND_SOC_WM8903 is not set -# CONFIG_SND_SOC_WM8904 is not set -# CONFIG_SND_SOC_WM8960 is not set -# CONFIG_SND_SOC_WM8962 is not set -# CONFIG_SND_SOC_WM8974 is not set -# CONFIG_SND_SOC_WM8978 is not set -# CONFIG_SND_SOC_WM8985 is not set -# CONFIG_SND_SOC_ZX_AUD96P22 is not set -# CONFIG_SND_SOC_MAX9759 is not set -# CONFIG_SND_SOC_MT6351 is not set -# CONFIG_SND_SOC_MT6358 is not set -# CONFIG_SND_SOC_MT6660 is not set -# CONFIG_SND_SOC_NAU8315 is not set -# CONFIG_SND_SOC_NAU8540 is not set -# CONFIG_SND_SOC_NAU8810 is not set -# CONFIG_SND_SOC_NAU8822 is not set -# CONFIG_SND_SOC_NAU8824 is not set -# CONFIG_SND_SOC_TPA6130A2 is not set -# CONFIG_SND_SOC_LPASS_WSA_MACRO is not set -# CONFIG_SND_SOC_LPASS_VA_MACRO is not set -# end of CODEC drivers - -CONFIG_SND_SIMPLE_CARD_UTILS=m -CONFIG_SND_SIMPLE_CARD=m -CONFIG_SND_AUDIO_GRAPH_CARD=m -# CONFIG_SND_XEN_FRONTEND is not set - -# -# HID support -# -CONFIG_HID=m -CONFIG_HID_BATTERY_STRENGTH=y -CONFIG_HIDRAW=y -CONFIG_UHID=m -CONFIG_HID_GENERIC=m - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=m -# CONFIG_HID_ACCUTOUCH is not set -# CONFIG_HID_ACRUX is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_APPLEIR is not set -# CONFIG_HID_ASUS is not set -# CONFIG_HID_AUREAL is not set -CONFIG_HID_BELKIN=m -# CONFIG_HID_BETOP_FF is not set -# CONFIG_HID_BIGBEN_FF is not set -CONFIG_HID_CHERRY=m -CONFIG_HID_CHICONY=m -# CONFIG_HID_CORSAIR is not set -# CONFIG_HID_COUGAR is not set -# CONFIG_HID_MACALLY is not set -# CONFIG_HID_PRODIKEYS is not set -# CONFIG_HID_CMEDIA is not set -# CONFIG_HID_CP2112 is not set -# CONFIG_HID_CREATIVE_SB0540 is not set -CONFIG_HID_CYPRESS=m -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_ELAN is not set -# CONFIG_HID_ELECOM is not set -# CONFIG_HID_ELO is not set -CONFIG_HID_EZKEY=m -# CONFIG_HID_GEMBIRD is not set -# CONFIG_HID_GFRM is not set -# CONFIG_HID_GLORIOUS is not set -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_VIVALDI is not set -# CONFIG_HID_GT683R is not set -# CONFIG_HID_KEYTOUCH is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_WALTOP is not set -# CONFIG_HID_VIEWSONIC is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_ICADE is not set -CONFIG_HID_ITE=m -# CONFIG_HID_JABRA is not set -# CONFIG_HID_TWINHAN is not set -CONFIG_HID_KENSINGTON=m -# CONFIG_HID_LCPOWER is not set -# CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set -CONFIG_HID_LOGITECH=m -CONFIG_HID_LOGITECH_DJ=m -CONFIG_HID_LOGITECH_HIDPP=m -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIWHEELS_FF is not set -CONFIG_HID_MAGICMOUSE=m -# CONFIG_HID_MALTRON is not set -# CONFIG_HID_MAYFLASH is not set -CONFIG_HID_REDRAGON=m -CONFIG_HID_MICROSOFT=m -CONFIG_HID_MONTEREY=m -CONFIG_HID_MULTITOUCH=m -# CONFIG_HID_NTI is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_ORTEK is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PENMOUNT is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_PICOLCD is not set -# CONFIG_HID_PLANTRONICS is not set -# CONFIG_HID_PRIMAX is not set -# CONFIG_HID_RETRODE is not set -# CONFIG_HID_ROCCAT is not set -# CONFIG_HID_SAITEK is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SPEEDLINK is not set -# CONFIG_HID_STEAM is not set -# CONFIG_HID_STEELSERIES is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_RMI is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TIVO is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THINGM is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_UDRAW_PS3 is not set -# CONFIG_HID_U2FZERO is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_WIIMOTE is not set -# CONFIG_HID_XINMO is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -# CONFIG_HID_SENSOR_HUB is not set -# CONFIG_HID_ALPS is not set -# CONFIG_HID_MCP2221 is not set -# end of Special HID drivers - -# -# USB HID support -# -CONFIG_USB_HID=m -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set -# end of USB HID support - -# -# I2C HID support -# -CONFIG_I2C_HID=m -# end of I2C HID support -# end of HID support - -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_COMMON=m -# CONFIG_USB_LED_TRIG is not set -CONFIG_USB_ULPI_BUS=m -# CONFIG_USB_CONN_GPIO is not set -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB=m -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEFAULT_PERSIST=y -# CONFIG_USB_FEW_INIT_RETRIES is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_PRODUCTLIST is not set -# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set -# CONFIG_USB_OTG_FSM is not set -# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set -CONFIG_USB_AUTOSUSPEND_DELAY=2 -# CONFIG_USB_MON is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_XHCI_HCD=m -# CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set -CONFIG_USB_XHCI_PLATFORM=m -CONFIG_USB_EHCI_HCD=m -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_EHCI_FSL is not set -CONFIG_USB_EHCI_HCD_PLATFORM=m -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_FOTG210_HCD is not set -CONFIG_USB_OHCI_HCD=m -CONFIG_USB_OHCI_HCD_PLATFORM=m -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HCD_TEST_MODE is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -CONFIG_USB_WDM=m -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=m -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_REALTEK is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set -# CONFIG_USB_UAS is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USBIP_CORE is not set -# CONFIG_USB_CDNS3 is not set -CONFIG_USB_MUSB_HDRC=m -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_GADGET is not set -CONFIG_USB_MUSB_DUAL_ROLE=y - -# -# Platform Glue Layer -# -CONFIG_USB_MUSB_SUNXI=m - -# -# MUSB DMA mode -# -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_DWC3=m -# CONFIG_USB_DWC3_ULPI is not set -# CONFIG_USB_DWC3_HOST is not set -# CONFIG_USB_DWC3_GADGET is not set -CONFIG_USB_DWC3_DUAL_ROLE=y - -# -# Platform Glue Driver Support -# -CONFIG_USB_DWC3_OF_SIMPLE=m -CONFIG_USB_DWC2=m -# CONFIG_USB_DWC2_HOST is not set - -# -# Gadget/Dual-role mode requires USB Gadget support to be enabled -# -# CONFIG_USB_DWC2_PERIPHERAL is not set -CONFIG_USB_DWC2_DUAL_ROLE=y -# CONFIG_USB_DWC2_DEBUG is not set -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set -CONFIG_USB_CHIPIDEA=m -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_MSM=m -CONFIG_USB_CHIPIDEA_IMX=m -CONFIG_USB_CHIPIDEA_GENERIC=m -CONFIG_USB_CHIPIDEA_TEGRA=m -CONFIG_USB_ISP1760=m -CONFIG_USB_ISP1760_HCD=y -CONFIG_USB_ISP1761_UDC=y -# CONFIG_USB_ISP1760_HOST_ROLE is not set -# CONFIG_USB_ISP1760_GADGET_ROLE is not set -CONFIG_USB_ISP1760_DUAL_ROLE=y - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_SIMPLE is not set -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -CONFIG_USB_SERIAL_CH341=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_CP210X is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_F81232 is not set -# CONFIG_USB_SERIAL_F8153X is not set -# CONFIG_USB_SERIAL_GARMIN is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_IUU is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_METRO is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_MXUPORT is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_OTI6858 is not set -# CONFIG_USB_SERIAL_QCAUX is not set -# CONFIG_USB_SERIAL_QUALCOMM is not set -# CONFIG_USB_SERIAL_SPCP8X5 is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -CONFIG_USB_SERIAL_WWAN=m -CONFIG_USB_SERIAL_OPTION=m -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_SERIAL_OPTICON is not set -# CONFIG_USB_SERIAL_XSENS_MT is not set -# CONFIG_USB_SERIAL_WISHBONE is not set -# CONFIG_USB_SERIAL_SSU100 is not set -# CONFIG_USB_SERIAL_QT2 is not set -# CONFIG_USB_SERIAL_UPD78F0730 is not set -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_APPLE_MFI_FASTCHARGE is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_EHSET_TEST_FIXTURE is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_YUREX is not set -# CONFIG_USB_EZUSB_FX2 is not set -# CONFIG_USB_HUB_USB251XB is not set -CONFIG_USB_HSIC_USB3503=m -# CONFIG_USB_HSIC_USB4604 is not set -# CONFIG_USB_LINK_LAYER_TEST is not set -# CONFIG_USB_CHAOSKEY is not set - -# -# USB Physical Layer drivers -# -CONFIG_USB_PHY=y -CONFIG_NOP_USB_XCEIV=m -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ISP1301 is not set -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_VIEWPORT=y -# end of USB Physical Layer drivers - -CONFIG_USB_GADGET=m -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 - -# -# USB Peripheral Controller -# -# CONFIG_USB_FOTG210_UDC is not set -# CONFIG_USB_GR_UDC is not set -# CONFIG_USB_R8A66597 is not set -# CONFIG_USB_PXA27X is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MV_U3D is not set -CONFIG_USB_SNP_CORE=m -CONFIG_USB_SNP_UDC_PLAT=m -# CONFIG_USB_M66592 is not set -CONFIG_USB_BDC_UDC=m - -# -# Platform Support -# -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_GADGET_XILINX is not set -# CONFIG_USB_DUMMY_HCD is not set -# end of USB Peripheral Controller - -CONFIG_USB_LIBCOMPOSITE=m -CONFIG_USB_U_ETHER=m -CONFIG_USB_F_NCM=m -CONFIG_USB_F_ECM=m -CONFIG_USB_F_EEM=m -CONFIG_USB_F_RNDIS=m -CONFIG_USB_F_MASS_STORAGE=m -CONFIG_USB_F_TCM=m -CONFIG_USB_CONFIGFS=m -# CONFIG_USB_CONFIGFS_SERIAL is not set -# CONFIG_USB_CONFIGFS_ACM is not set -# CONFIG_USB_CONFIGFS_OBEX is not set -CONFIG_USB_CONFIGFS_NCM=y -CONFIG_USB_CONFIGFS_ECM=y -# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set -CONFIG_USB_CONFIGFS_RNDIS=y -CONFIG_USB_CONFIGFS_EEM=y -CONFIG_USB_CONFIGFS_MASS_STORAGE=y -# CONFIG_USB_CONFIGFS_F_LB_SS is not set -# CONFIG_USB_CONFIGFS_F_FS is not set -# CONFIG_USB_CONFIGFS_F_UAC1 is not set -# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set -# CONFIG_USB_CONFIGFS_F_UAC2 is not set -# CONFIG_USB_CONFIGFS_F_MIDI is not set -# CONFIG_USB_CONFIGFS_F_HID is not set -# CONFIG_USB_CONFIGFS_F_UVC is not set -# CONFIG_USB_CONFIGFS_F_PRINTER is not set -CONFIG_USB_CONFIGFS_F_TCM=y - -# -# USB Gadget precomposed configurations -# -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_ETH is not set -# CONFIG_USB_G_NCM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FUNCTIONFS is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_GADGET_TARGET is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_ACM_MS is not set -# CONFIG_USB_G_MULTI is not set -# CONFIG_USB_G_HID is not set -# CONFIG_USB_G_DBGP is not set -# CONFIG_USB_G_WEBCAM is not set -# CONFIG_USB_RAW_GADGET is not set -# end of USB Gadget precomposed configurations - -CONFIG_TYPEC=m -CONFIG_TYPEC_TCPM=m -CONFIG_TYPEC_TCPCI=m -# CONFIG_TYPEC_RT1711H is not set -# CONFIG_TYPEC_TCPCI_MAXIM is not set -# CONFIG_TYPEC_FUSB302 is not set -CONFIG_TYPEC_UCSI=m -# CONFIG_UCSI_CCG is not set -CONFIG_TYPEC_ANX7688=m -# CONFIG_TYPEC_HD3SS3220 is not set -# CONFIG_TYPEC_TPS6598X is not set -# CONFIG_TYPEC_STUSB160X is not set - -# -# USB Type-C Multiplexer/DeMultiplexer Switch support -# -# CONFIG_TYPEC_MUX_PI3USB30532 is not set -# end of USB Type-C Multiplexer/DeMultiplexer Switch support - -# -# USB Type-C Alternate Mode drivers -# -CONFIG_TYPEC_DP_ALTMODE=m -# CONFIG_TYPEC_NVIDIA_ALTMODE is not set -# end of USB Type-C Alternate Mode drivers - -CONFIG_USB_ROLE_SWITCH=m -CONFIG_MMC=m -CONFIG_PWRSEQ_EMMC=m -CONFIG_PWRSEQ_SIMPLE=m -CONFIG_MMC_BLOCK=m -CONFIG_MMC_BLOCK_MINORS=32 -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_ARMMMCI=m -CONFIG_MMC_STM32_SDMMC=y -CONFIG_MMC_SDHCI=m -CONFIG_MMC_SDHCI_PLTFM=m -CONFIG_MMC_SDHCI_OF_ARASAN=m -# CONFIG_MMC_SDHCI_OF_ASPEED is not set -# CONFIG_MMC_SDHCI_OF_AT91 is not set -# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set -CONFIG_MMC_SDHCI_CADENCE=m -# CONFIG_MMC_SDHCI_F_SDH30 is not set -# CONFIG_MMC_SDHCI_MILBEAUT is not set -# CONFIG_MMC_DW is not set -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MMC_USDHI6ROL0 is not set -CONFIG_MMC_SUNXI=m -CONFIG_MMC_CQHCI=m -# CONFIG_MMC_HSQ is not set -# CONFIG_MMC_MTK is not set -# CONFIG_MMC_SDHCI_XENON is not set -# CONFIG_MMC_SDHCI_OMAP is not set -# CONFIG_MMC_SDHCI_AM654 is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=m -CONFIG_LEDS_CLASS_FLASH=m -# CONFIG_LEDS_CLASS_MULTICOLOR is not set -CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y - -# -# LED drivers -# -# CONFIG_LEDS_AAT1290 is not set -# CONFIG_LEDS_AN30259A is not set -# CONFIG_LEDS_AS3645A is not set -# CONFIG_LEDS_AW2013 is not set -# CONFIG_LEDS_BCM6328 is not set -# CONFIG_LEDS_BCM6358 is not set -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM3532 is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_LM3692X is not set -# CONFIG_LEDS_LM3601X is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=m -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP50XX is not set -# CONFIG_LEDS_LP55XX_COMMON is not set -# CONFIG_LEDS_LP8860 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -CONFIG_LEDS_PWM=m -# CONFIG_LEDS_REGULATOR is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_TLC591XX is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_KTD2692 is not set -# CONFIG_LEDS_IS31FL319X is not set -# CONFIG_LEDS_IS31FL32XX is not set - -# -# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) -# -# CONFIG_LEDS_BLINKM is not set -# CONFIG_LEDS_MLXREG is not set -# CONFIG_LEDS_USER is not set -# CONFIG_LEDS_TI_LMU_COMMON is not set -CONFIG_LEDS_SGM3140=m -CONFIG_LEDS_AXP20X=m - -# -# Flash and Torch LED drivers -# -# CONFIG_LEDS_RT8515 is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_LEDS_TRIGGER_ONESHOT=m -CONFIG_LEDS_TRIGGER_HEARTBEAT=m -CONFIG_LEDS_TRIGGER_BACKLIGHT=m -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_LEDS_TRIGGER_ACTIVITY=m -CONFIG_LEDS_TRIGGER_GPIO=m -CONFIG_LEDS_TRIGGER_DEFAULT_ON=m - -# -# iptables trigger is under Netfilter config (LED target) -# -CONFIG_LEDS_TRIGGER_TRANSIENT=m -CONFIG_LEDS_TRIGGER_CAMERA=m -CONFIG_LEDS_TRIGGER_PANIC=y -CONFIG_LEDS_TRIGGER_NETDEV=m -CONFIG_LEDS_TRIGGER_PATTERN=m -CONFIG_LEDS_TRIGGER_AUDIO=m -# CONFIG_ACCESSIBILITY is not set -# CONFIG_INFINIBAND is not set -CONFIG_EDAC_SUPPORT=y -CONFIG_EDAC=y -CONFIG_EDAC_LEGACY_SYSFS=y -# CONFIG_EDAC_DEBUG is not set -# CONFIG_EDAC_XGENE is not set -# CONFIG_EDAC_DMC520 is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -CONFIG_RTC_SYSTOHC=y -CONFIG_RTC_SYSTOHC_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set -CONFIG_RTC_NVMEM=y - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_ABB5ZES3 is not set -# CONFIG_RTC_DRV_ABEOZ9 is not set -# CONFIG_RTC_DRV_ABX80X is not set -# CONFIG_RTC_DRV_AC100 is not set -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_HYM8563 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_ISL12026 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8523 is not set -# CONFIG_RTC_DRV_PCF85063 is not set -# CONFIG_RTC_DRV_PCF85363 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8010 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_RV3028 is not set -# CONFIG_RTC_DRV_RV3032 is not set -# CONFIG_RTC_DRV_RV8803 is not set -# CONFIG_RTC_DRV_SD3078 is not set - -# -# SPI RTC drivers -# -CONFIG_RTC_I2C_AND_SPI=m - -# -# SPI and I2C RTC drivers -# -CONFIG_RTC_DRV_DS3232=m -CONFIG_RTC_DRV_DS3232_HWMON=y -# CONFIG_RTC_DRV_PCF2127 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set -# CONFIG_RTC_DRV_RX6110 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1685_FAMILY is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_DS2404 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set -# CONFIG_RTC_DRV_ZYNQMP is not set - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_PL030 is not set -CONFIG_RTC_DRV_PL031=y -CONFIG_RTC_DRV_SUN6I=y -# CONFIG_RTC_DRV_CADENCE is not set -# CONFIG_RTC_DRV_FTRTC010 is not set -# CONFIG_RTC_DRV_R7301 is not set - -# -# HID Sensor RTC drivers -# -# CONFIG_RTC_DRV_GOLDFISH is not set -CONFIG_DMADEVICES=y -# CONFIG_DMADEVICES_DEBUG is not set - -# -# DMA Devices -# -CONFIG_DMA_ENGINE=y -CONFIG_DMA_VIRTUAL_CHANNELS=m -CONFIG_DMA_OF=y -# CONFIG_ALTERA_MSGDMA is not set -# CONFIG_AMBA_PL08X is not set -# CONFIG_BCM_SBA_RAID is not set -CONFIG_DMA_SUN6I=m -# CONFIG_DW_AXI_DMAC is not set -# CONFIG_FSL_EDMA is not set -# CONFIG_FSL_QDMA is not set -# CONFIG_INTEL_IDMA64 is not set -# CONFIG_MV_XOR_V2 is not set -CONFIG_PL330_DMA=m -# CONFIG_XILINX_DMA is not set -# CONFIG_XILINX_ZYNQMP_DMA is not set -# CONFIG_XILINX_ZYNQMP_DPDMA is not set -# CONFIG_QCOM_HIDMA_MGMT is not set -# CONFIG_QCOM_HIDMA is not set -# CONFIG_DW_DMAC is not set -# CONFIG_SF_PDMA is not set - -# -# DMA Clients -# -# CONFIG_ASYNC_TX_DMA is not set -# CONFIG_DMATEST is not set - -# -# DMABUF options -# -CONFIG_SYNC_FILE=y -# CONFIG_SW_SYNC is not set -# CONFIG_UDMABUF is not set -# CONFIG_DMABUF_MOVE_NOTIFY is not set -# CONFIG_DMABUF_SELFTESTS is not set -# CONFIG_DMABUF_HEAPS is not set -# end of DMABUF options - -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set -# CONFIG_VFIO is not set -# CONFIG_VIRT_DRIVERS is not set -# CONFIG_VIRTIO_MENU is not set -# CONFIG_VDPA is not set -# CONFIG_VHOST_MENU is not set - -# -# Microsoft Hyper-V guest support -# -# end of Microsoft Hyper-V guest support - -# -# Xen driver support -# -# CONFIG_XEN_BALLOON is not set -# CONFIG_XEN_DEV_EVTCHN is not set -# CONFIG_XEN_BACKEND is not set -# CONFIG_XENFS is not set -# CONFIG_XEN_SYS_HYPERVISOR is not set -# CONFIG_XEN_GNTDEV is not set -# CONFIG_XEN_GRANT_DEV_ALLOC is not set -# CONFIG_XEN_GRANT_DMA_ALLOC is not set -CONFIG_SWIOTLB_XEN=y -# CONFIG_XEN_PVCALLS_FRONTEND is not set -CONFIG_XEN_PRIVCMD=m -CONFIG_XEN_AUTO_XLATE=y -# end of Xen driver support - -# CONFIG_GREYBUS is not set -CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_COMEDI is not set -# CONFIG_RTLLIB is not set -CONFIG_RTL8723BS=m -# CONFIG_R8712U is not set -# CONFIG_R8188EU is not set -# CONFIG_VT6656 is not set - -# -# IIO staging drivers -# - -# -# Accelerometers -# -# end of Accelerometers - -# -# Analog to digital converters -# -# end of Analog to digital converters - -# -# Analog digital bi-direction converters -# -# CONFIG_ADT7316 is not set -# end of Analog digital bi-direction converters - -# -# Capacitance to digital converters -# -# CONFIG_AD7150 is not set -# CONFIG_AD7746 is not set -# end of Capacitance to digital converters - -# -# Direct Digital Synthesis -# -# end of Direct Digital Synthesis - -# -# Network Analyzer, Impedance Converters -# -# CONFIG_AD5933 is not set -# end of Network Analyzer, Impedance Converters - -# -# Active energy metering IC -# -# CONFIG_ADE7854 is not set -# end of Active energy metering IC - -# -# Resolver to digital converters -# -# end of Resolver to digital converters -# end of IIO staging drivers - -CONFIG_STAGING_MEDIA=y -CONFIG_VIDEO_SUNXI=y -CONFIG_VIDEO_SUNXI_CEDRUS=m - -# -# Android -# -CONFIG_ASHMEM=y -# end of Android - -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_GS_FPGABOOT is not set -# CONFIG_UNISYSSPAR is not set -# CONFIG_KS7010 is not set - -# -# Gasket devices -# -# end of Gasket devices - -# CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set -# CONFIG_WIMAX is not set -# CONFIG_WFX is not set -# CONFIG_SPMI_HISI3670 is not set -# CONFIG_MFD_HI6421_SPMI is not set -CONFIG_RTL8723CS=m -# CONFIG_GOLDFISH is not set -# CONFIG_CHROME_PLATFORMS is not set -# CONFIG_MELLANOX_PLATFORM is not set -CONFIG_HAVE_CLK=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_MAX9485 is not set -CONFIG_COMMON_CLK_SCPI=y -# CONFIG_COMMON_CLK_SI5341 is not set -# CONFIG_COMMON_CLK_SI5351 is not set -# CONFIG_COMMON_CLK_SI514 is not set -# CONFIG_COMMON_CLK_SI544 is not set -# CONFIG_COMMON_CLK_SI570 is not set -# CONFIG_COMMON_CLK_CDCE706 is not set -# CONFIG_COMMON_CLK_CDCE925 is not set -CONFIG_COMMON_CLK_CS2000_CP=m -CONFIG_COMMON_CLK_XGENE=y -CONFIG_COMMON_CLK_PWM=m -# CONFIG_COMMON_CLK_VC5 is not set -# CONFIG_COMMON_CLK_FIXED_MMIO is not set -CONFIG_CLK_SUNXI=y -CONFIG_CLK_SUNXI_CLOCKS=y -CONFIG_CLK_SUNXI_PRCM_SUN6I=y -CONFIG_CLK_SUNXI_PRCM_SUN8I=y -CONFIG_CLK_SUNXI_PRCM_SUN9I=y -CONFIG_SUNXI_CCU=y -CONFIG_SUN50I_A64_CCU=y -CONFIG_SUN50I_A100_CCU=y -CONFIG_SUN50I_A100_R_CCU=y -CONFIG_SUN50I_H6_CCU=y -CONFIG_SUN50I_H6_R_CCU=y -# CONFIG_SUN8I_A83T_CCU is not set -CONFIG_SUN8I_H3_CCU=y -CONFIG_SUN8I_DE2_CCU=y -CONFIG_SUN8I_R_CCU=y -CONFIG_HWSPINLOCK=y - -# -# Clock Source drivers -# -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -# CONFIG_FSL_ERRATUM_A008585 is not set -# CONFIG_HISILICON_ERRATUM_161010101 is not set -# CONFIG_ARM64_ERRATUM_858921 is not set -CONFIG_SUN50I_ERRATUM_UNKNOWN1=y -# CONFIG_MICROCHIP_PIT64B is not set -# end of Clock Source drivers - -CONFIG_MAILBOX=y -CONFIG_ARM_MHU=m -CONFIG_ARM_MHU_V2=m -CONFIG_PLATFORM_MHU=m -# CONFIG_PL320_MBOX is not set -# CONFIG_ALTERA_MBOX is not set -# CONFIG_MAILBOX_TEST is not set -CONFIG_SUN6I_MSGBOX=m -CONFIG_IOMMU_IOVA=y -CONFIG_IOMMU_API=y -CONFIG_IOMMU_SUPPORT=y - -# -# Generic IOMMU Pagetable Support -# -CONFIG_IOMMU_IO_PGTABLE=y -CONFIG_IOMMU_IO_PGTABLE_LPAE=y -# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# end of Generic IOMMU Pagetable Support - -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -CONFIG_OF_IOMMU=y -CONFIG_IOMMU_DMA=y -# CONFIG_SUN50I_IOMMU is not set -CONFIG_ARM_SMMU=m -CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y -CONFIG_ARM_SMMU_V3=m -# CONFIG_ARM_SMMU_V3_SVA is not set - -# -# Remoteproc drivers -# -# CONFIG_REMOTEPROC is not set -# end of Remoteproc drivers - -# -# Rpmsg drivers -# -# CONFIG_RPMSG_QCOM_GLINK_RPM is not set -# CONFIG_RPMSG_VIRTIO is not set -# end of Rpmsg drivers - -# CONFIG_SOUNDWIRE is not set - -# -# SOC (System On Chip) specific Drivers -# - -# -# Amlogic SoC drivers -# -# end of Amlogic SoC drivers - -# -# Broadcom SoC drivers -# -# CONFIG_SOC_BRCMSTB is not set -# end of Broadcom SoC drivers - -# -# NXP/Freescale QorIQ SoC drivers -# -# CONFIG_QUICC_ENGINE is not set -# CONFIG_FSL_RCPM is not set -# end of NXP/Freescale QorIQ SoC drivers - -# -# i.MX SoC drivers -# -# end of i.MX SoC drivers - -# -# Enable LiteX SoC Builder specific drivers -# -# CONFIG_LITEX_SOC_CONTROLLER is not set -# end of Enable LiteX SoC Builder specific drivers - -# -# Qualcomm SoC drivers -# -# end of Qualcomm SoC drivers - -CONFIG_SUNXI_MBUS=y -CONFIG_SUNXI_SRAM=y -# CONFIG_SOC_TI is not set - -# -# Xilinx SoC drivers -# -# CONFIG_XILINX_VCU is not set -# end of Xilinx SoC drivers -# end of SOC (System On Chip) specific Drivers - -CONFIG_PM_DEVFREQ=y - -# -# DEVFREQ Governors -# -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m -CONFIG_DEVFREQ_GOV_PERFORMANCE=m -CONFIG_DEVFREQ_GOV_POWERSAVE=m -CONFIG_DEVFREQ_GOV_USERSPACE=m -CONFIG_DEVFREQ_GOV_PASSIVE=m - -# -# DEVFREQ Drivers -# -CONFIG_PM_DEVFREQ_EVENT=y -CONFIG_EXTCON=y - -# -# Extcon Device Drivers -# -# CONFIG_EXTCON_ADC_JACK is not set -# CONFIG_EXTCON_FSA9480 is not set -# CONFIG_EXTCON_GPIO is not set -# CONFIG_EXTCON_MAX3355 is not set -# CONFIG_EXTCON_PTN5150 is not set -# CONFIG_EXTCON_RT8973A is not set -# CONFIG_EXTCON_SM5502 is not set -CONFIG_EXTCON_USB_GPIO=m -# CONFIG_EXTCON_USBC_TUSB320 is not set -CONFIG_MEMORY=y -CONFIG_ARM_PL172_MPMC=m -CONFIG_IIO=m -CONFIG_IIO_BUFFER=y -# CONFIG_IIO_BUFFER_CB is not set -# CONFIG_IIO_BUFFER_DMA is not set -# CONFIG_IIO_BUFFER_DMAENGINE is not set -# CONFIG_IIO_BUFFER_HW_CONSUMER is not set -CONFIG_IIO_KFIFO_BUF=m -CONFIG_IIO_TRIGGERED_BUFFER=m -# CONFIG_IIO_CONFIGFS is not set -CONFIG_IIO_TRIGGER=y -CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 -# CONFIG_IIO_SW_DEVICE is not set -# CONFIG_IIO_SW_TRIGGER is not set -# CONFIG_IIO_TRIGGERED_EVENT is not set - -# -# Accelerometers -# -# CONFIG_ADXL345_I2C is not set -# CONFIG_ADXL372_I2C is not set -# CONFIG_BMA180 is not set -# CONFIG_BMA400 is not set -CONFIG_BMC150_ACCEL=m -CONFIG_BMC150_ACCEL_I2C=m -# CONFIG_DA280 is not set -# CONFIG_DA311 is not set -# CONFIG_DMARD06 is not set -# CONFIG_DMARD09 is not set -# CONFIG_DMARD10 is not set -# CONFIG_IIO_ST_ACCEL_3AXIS is not set -# CONFIG_KXSD9 is not set -# CONFIG_KXCJK1013 is not set -# CONFIG_MC3230 is not set -# CONFIG_MMA7455_I2C is not set -# CONFIG_MMA7660 is not set -# CONFIG_MMA8452 is not set -# CONFIG_MMA9551 is not set -# CONFIG_MMA9553 is not set -# CONFIG_MXC4005 is not set -# CONFIG_MXC6255 is not set -# CONFIG_STK8312 is not set -# CONFIG_STK8BA50 is not set -# end of Accelerometers - -# -# Analog to digital converters -# -# CONFIG_AD7091R5 is not set -# CONFIG_AD7291 is not set -# CONFIG_AD7606_IFACE_PARALLEL is not set -# CONFIG_AD799X is not set -# CONFIG_ADI_AXI_ADC is not set -CONFIG_AXP20X_ADC=m -# CONFIG_AXP288_ADC is not set -# CONFIG_CC10001_ADC is not set -# CONFIG_ENVELOPE_DETECTOR is not set -# CONFIG_HX711 is not set -# CONFIG_INA2XX_ADC is not set -# CONFIG_LTC2471 is not set -# CONFIG_LTC2485 is not set -# CONFIG_LTC2497 is not set -# CONFIG_MAX1363 is not set -# CONFIG_MAX9611 is not set -# CONFIG_MCP3422 is not set -# CONFIG_NAU7802 is not set -# CONFIG_QCOM_SPMI_IADC is not set -# CONFIG_QCOM_SPMI_VADC is not set -# CONFIG_QCOM_SPMI_ADC5 is not set -# CONFIG_SD_ADC_MODULATOR is not set -# CONFIG_TI_ADC081C is not set -# CONFIG_TI_ADS1015 is not set -# CONFIG_VF610_ADC is not set -# CONFIG_XILINX_XADC is not set -# end of Analog to digital converters - -# -# Analog Front Ends -# -# CONFIG_IIO_RESCALE is not set -# end of Analog Front Ends - -# -# Amplifiers -# -# CONFIG_HMC425 is not set -# end of Amplifiers - -# -# Chemical Sensors -# -# CONFIG_ATLAS_PH_SENSOR is not set -# CONFIG_ATLAS_EZO_SENSOR is not set -# CONFIG_BME680 is not set -# CONFIG_CCS811 is not set -# CONFIG_IAQCORE is not set -# CONFIG_PMS7003 is not set -# CONFIG_SCD30_CORE is not set -# CONFIG_SENSIRION_SGP30 is not set -# CONFIG_SPS30 is not set -# CONFIG_VZ89X is not set -# end of Chemical Sensors - -# -# Hid Sensor IIO Common -# -# end of Hid Sensor IIO Common - -# -# SSP Sensor Common -# -# end of SSP Sensor Common - -CONFIG_IIO_ST_SENSORS_I2C=m -CONFIG_IIO_ST_SENSORS_CORE=m - -# -# Digital to analog converters -# -# CONFIG_AD5064 is not set -# CONFIG_AD5380 is not set -# CONFIG_AD5446 is not set -# CONFIG_AD5593R is not set -# CONFIG_AD5696_I2C is not set -# CONFIG_DPOT_DAC is not set -# CONFIG_DS4424 is not set -# CONFIG_M62332 is not set -# CONFIG_MAX517 is not set -# CONFIG_MAX5821 is not set -# CONFIG_MCP4725 is not set -# CONFIG_TI_DAC5571 is not set -# CONFIG_VF610_DAC is not set -# end of Digital to analog converters - -# -# IIO dummy driver -# -# end of IIO dummy driver - -# -# Frequency Synthesizers DDS/PLL -# - -# -# Clock Generator/Distribution -# -# end of Clock Generator/Distribution - -# -# Phase-Locked Loop (PLL) frequency synthesizers -# -# end of Phase-Locked Loop (PLL) frequency synthesizers -# end of Frequency Synthesizers DDS/PLL - -# -# Digital gyroscope sensors -# -# CONFIG_BMG160 is not set -# CONFIG_FXAS21002C is not set -# CONFIG_MPU3050_I2C is not set -# CONFIG_IIO_ST_GYRO_3AXIS is not set -# CONFIG_ITG3200 is not set -# end of Digital gyroscope sensors - -# -# Health Sensors -# - -# -# Heart Rate Monitors -# -# CONFIG_AFE4404 is not set -# CONFIG_MAX30100 is not set -# CONFIG_MAX30102 is not set -# end of Heart Rate Monitors -# end of Health Sensors - -# -# Humidity sensors -# -# CONFIG_AM2315 is not set -# CONFIG_DHT11 is not set -# CONFIG_HDC100X is not set -# CONFIG_HDC2010 is not set -# CONFIG_HTS221 is not set -# CONFIG_HTU21 is not set -# CONFIG_SI7005 is not set -# CONFIG_SI7020 is not set -# end of Humidity sensors - -# -# Inertial measurement units -# -# CONFIG_BMI160_I2C is not set -# CONFIG_FXOS8700_I2C is not set -# CONFIG_KMX61 is not set -# CONFIG_INV_ICM42600_I2C is not set -CONFIG_INV_MPU6050_IIO=m -CONFIG_INV_MPU6050_I2C=m -# CONFIG_IIO_ST_LSM6DSX is not set -# end of Inertial measurement units - -# -# Light sensors -# -# CONFIG_ADJD_S311 is not set -# CONFIG_ADUX1020 is not set -# CONFIG_AL3010 is not set -# CONFIG_AL3320A is not set -# CONFIG_APDS9300 is not set -# CONFIG_APDS9960 is not set -# CONFIG_AS73211 is not set -# CONFIG_BH1750 is not set -# CONFIG_BH1780 is not set -# CONFIG_CM32181 is not set -# CONFIG_CM3232 is not set -# CONFIG_CM3323 is not set -# CONFIG_CM3605 is not set -# CONFIG_CM36651 is not set -# CONFIG_GP2AP002 is not set -# CONFIG_GP2AP020A00F is not set -# CONFIG_SENSORS_ISL29018 is not set -# CONFIG_SENSORS_ISL29028 is not set -# CONFIG_ISL29125 is not set -# CONFIG_JSA1212 is not set -# CONFIG_RPR0521 is not set -# CONFIG_LTR501 is not set -# CONFIG_LV0104CS is not set -# CONFIG_MAX44000 is not set -# CONFIG_MAX44009 is not set -# CONFIG_NOA1305 is not set -# CONFIG_OPT3001 is not set -# CONFIG_PA12203001 is not set -# CONFIG_SI1133 is not set -# CONFIG_SI1145 is not set -CONFIG_STK3310=m -# CONFIG_ST_UVIS25 is not set -# CONFIG_TCS3414 is not set -# CONFIG_TCS3472 is not set -# CONFIG_SENSORS_TSL2563 is not set -# CONFIG_TSL2583 is not set -# CONFIG_TSL2772 is not set -# CONFIG_TSL4531 is not set -# CONFIG_US5182D is not set -# CONFIG_VCNL4000 is not set -# CONFIG_VCNL4035 is not set -# CONFIG_VEML6030 is not set -# CONFIG_VEML6070 is not set -# CONFIG_VL6180 is not set -# CONFIG_ZOPT2201 is not set -# end of Light sensors - -# -# Magnetometer sensors -# -# CONFIG_AK8974 is not set -# CONFIG_AK8975 is not set -# CONFIG_AK09911 is not set -# CONFIG_BMC150_MAGN_I2C is not set -# CONFIG_MAG3110 is not set -# CONFIG_MMC35240 is not set -CONFIG_IIO_ST_MAGN_3AXIS=m -CONFIG_IIO_ST_MAGN_I2C_3AXIS=m -# CONFIG_SENSORS_HMC5843_I2C is not set -# CONFIG_SENSORS_RM3100_I2C is not set -# end of Magnetometer sensors - -# -# Multiplexers -# -# CONFIG_IIO_MUX is not set -# end of Multiplexers - -# -# Inclinometer sensors -# -# end of Inclinometer sensors - -# -# Triggers - standalone -# -# CONFIG_IIO_INTERRUPT_TRIGGER is not set -# CONFIG_IIO_SYSFS_TRIGGER is not set -# end of Triggers - standalone - -# -# Linear and angular position sensors -# -# end of Linear and angular position sensors - -# -# Digital potentiometers -# -# CONFIG_AD5272 is not set -# CONFIG_DS1803 is not set -# CONFIG_MAX5432 is not set -# CONFIG_MCP4018 is not set -# CONFIG_MCP4531 is not set -# CONFIG_TPL0102 is not set -# end of Digital potentiometers - -# -# Digital potentiostats -# -# CONFIG_LMP91000 is not set -# end of Digital potentiostats - -# -# Pressure sensors -# -# CONFIG_ABP060MG is not set -# CONFIG_BMP280 is not set -# CONFIG_DLHL60D is not set -# CONFIG_DPS310 is not set -# CONFIG_HP03 is not set -# CONFIG_ICP10100 is not set -# CONFIG_MPL115_I2C is not set -# CONFIG_MPL3115 is not set -# CONFIG_MS5611 is not set -# CONFIG_MS5637 is not set -# CONFIG_IIO_ST_PRESS is not set -# CONFIG_T5403 is not set -# CONFIG_HP206C is not set -# CONFIG_ZPA2326 is not set -# end of Pressure sensors - -# -# Lightning sensors -# -# end of Lightning sensors - -# -# Proximity and distance sensors -# -# CONFIG_ISL29501 is not set -# CONFIG_LIDAR_LITE_V2 is not set -# CONFIG_MB1232 is not set -# CONFIG_PING is not set -# CONFIG_RFD77402 is not set -# CONFIG_SRF04 is not set -# CONFIG_SX9310 is not set -# CONFIG_SX9500 is not set -# CONFIG_SRF08 is not set -# CONFIG_VCNL3020 is not set -# CONFIG_VL53L0X_I2C is not set -# end of Proximity and distance sensors - -# -# Resolver to digital converters -# -# end of Resolver to digital converters - -# -# Temperature sensors -# -# CONFIG_MLX90614 is not set -# CONFIG_MLX90632 is not set -# CONFIG_TMP006 is not set -# CONFIG_TMP007 is not set -# CONFIG_TSYS01 is not set -# CONFIG_TSYS02D is not set -# end of Temperature sensors - -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -CONFIG_PWM_ATMEL_TCB=m -# CONFIG_PWM_FSL_FTM is not set -# CONFIG_PWM_PCA9685 is not set -CONFIG_PWM_SUN4I=m - -# -# IRQ chip support -# -CONFIG_IRQCHIP=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_MAX_NR=1 -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -# CONFIG_AL_FIC is not set -CONFIG_PARTITION_PERCPU=y -# end of IRQ chip support - -# CONFIG_IPACK_BUS is not set -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_RESET_CONTROLLER=y -# CONFIG_RESET_BRCMSTB_RESCAL is not set -# CONFIG_RESET_INTEL_GW is not set -CONFIG_RESET_SIMPLE=y -CONFIG_RESET_SUNXI=y -# CONFIG_RESET_TI_SYSCON is not set - -# -# PHY Subsystem -# -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PHY_MIPI_DPHY=y -CONFIG_PHY_XGENE=m -# CONFIG_USB_LGM_PHY is not set -CONFIG_PHY_SUN4I_USB=m -CONFIG_PHY_SUN6I_MIPI_DPHY=m -# CONFIG_PHY_SUN9I_USB is not set -# CONFIG_PHY_SUN50I_USB3 is not set -# CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_PHY_CADENCE_TORRENT is not set -# CONFIG_PHY_CADENCE_DPHY is not set -# CONFIG_PHY_CADENCE_SIERRA is not set -# CONFIG_PHY_CADENCE_SALVO is not set -# CONFIG_PHY_FSL_IMX8MQ_USB is not set -# CONFIG_PHY_MIXEL_MIPI_DPHY is not set -# CONFIG_PHY_PXA_28NM_HSIC is not set -# CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_CPCAP_USB is not set -# CONFIG_PHY_MAPPHONE_MDM6600 is not set -# CONFIG_PHY_OCELOT_SERDES is not set -CONFIG_PHY_QCOM_USB_HS=m -# CONFIG_PHY_QCOM_USB_HSIC is not set -CONFIG_PHY_SAMSUNG_USB2=m -# CONFIG_PHY_TUSB1210 is not set -# end of PHY Subsystem - -# CONFIG_POWERCAP is not set -# CONFIG_MCB is not set - -# -# Performance monitor support -# -# CONFIG_ARM_CCI_PMU is not set -# CONFIG_ARM_CCN is not set -# CONFIG_ARM_CMN is not set -CONFIG_ARM_PMU=y -# CONFIG_ARM_DSU_PMU is not set -# CONFIG_ARM_SPE_PMU is not set -# end of Performance monitor support - -CONFIG_RAS=y - -# -# Android -# -CONFIG_ANDROID=y -CONFIG_ANDROID_BINDER_IPC=y -# CONFIG_ANDROID_BINDERFS is not set -CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder" -CONFIG_ANDROID_BINDER_IPC_SELFTEST=y -# end of Android - -# CONFIG_LIBNVDIMM is not set -# CONFIG_DAX is not set -CONFIG_NVMEM=y -# CONFIG_NVMEM_SYSFS is not set -# CONFIG_NVMEM_SPMI_SDAM is not set -CONFIG_NVMEM_SUNXI_SID=m - -# -# HW tracing support -# -# CONFIG_STM is not set -# CONFIG_INTEL_TH is not set -# end of HW tracing support - -# CONFIG_FPGA is not set -# CONFIG_FSI is not set -CONFIG_TEE=m - -# -# TEE drivers -# -CONFIG_OPTEE=m -CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 -# end of TEE drivers - -CONFIG_PM_OPP=y -# CONFIG_SIOX is not set -# CONFIG_SLIMBUS is not set -# CONFIG_INTERCONNECT is not set -# CONFIG_COUNTER is not set -# CONFIG_MOST is not set -# end of Device Drivers - -# -# File systems -# -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_VALIDATE_FS_PARSER=y -CONFIG_FS_IOMAP=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_ASSERT is not set -# CONFIG_BTRFS_FS_REF_VERIFY is not set -# CONFIG_NILFS2_FS is not set -CONFIG_F2FS_FS=y -CONFIG_F2FS_STAT_FS=y -CONFIG_F2FS_FS_XATTR=y -CONFIG_F2FS_FS_POSIX_ACL=y -CONFIG_F2FS_FS_SECURITY=y -# CONFIG_F2FS_CHECK_FS is not set -# CONFIG_F2FS_FAULT_INJECTION is not set -CONFIG_F2FS_FS_COMPRESSION=y -CONFIG_F2FS_FS_LZO=y -CONFIG_F2FS_FS_LZ4=y -CONFIG_F2FS_FS_ZSTD=y -CONFIG_F2FS_FS_LZORLE=y -# CONFIG_FS_DAX is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=y -# CONFIG_EXPORTFS_BLOCK_OPS is not set -CONFIG_FILE_LOCKING=y -CONFIG_MANDATORY_FILE_LOCKING=y -# CONFIG_FS_ENCRYPTION is not set -# CONFIG_FS_VERITY is not set -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_FANOTIFY=y -CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=m -CONFIG_AUTOFS_FS=m -CONFIG_FUSE_FS=m -# CONFIG_CUSE is not set -# CONFIG_VIRTIO_FS is not set -# CONFIG_OVERLAY_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set -# end of Caches - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set -# end of CD-ROM/DVD Filesystems - -# -# DOS/FAT/EXFAT/NT Filesystems -# -CONFIG_FAT_FS=y -# CONFIG_MSDOS_FS is not set -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_FAT_DEFAULT_UTF8 is not set -# CONFIG_EXFAT_FS is not set -# CONFIG_NTFS_FS is not set -# end of DOS/FAT/EXFAT/NT Filesystems - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -# CONFIG_PROC_KCORE is not set -CONFIG_PROC_VMCORE=y -# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_PROC_CHILDREN is not set -CONFIG_KERNFS=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TMPFS_XATTR=y -# CONFIG_TMPFS_INODE64 is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -CONFIG_MEMFD_CREATE=y -CONFIG_ARCH_HAS_GIGANTIC_PAGE=y -CONFIG_CONFIGFS_FS=y -# end of Pseudo filesystems - -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ORANGEFS_FS is not set -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -CONFIG_ECRYPT_FS=m -# CONFIG_ECRYPT_FS_MESSAGING is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_SQUASHFS=m -# CONFIG_SQUASHFS_FILE_CACHE is not set -CONFIG_SQUASHFS_FILE_DIRECT=y -# CONFIG_SQUASHFS_DECOMP_SINGLE is not set -# CONFIG_SQUASHFS_DECOMP_MULTI is not set -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -CONFIG_SQUASHFS_XATTR=y -CONFIG_SQUASHFS_ZLIB=y -# CONFIG_SQUASHFS_LZ4 is not set -# CONFIG_SQUASHFS_LZO is not set -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_ZSTD is not set -# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_EROFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=m -CONFIG_NFS_V2=m -CONFIG_NFS_V3=m -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=m -# CONFIG_NFS_SWAP is not set -CONFIG_NFS_V4_1=y -CONFIG_NFS_V4_2=y -CONFIG_PNFS_FILE_LAYOUT=m -CONFIG_PNFS_BLOCK=m -CONFIG_PNFS_FLEXFILE_LAYOUT=m -CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" -# CONFIG_NFS_V4_1_MIGRATION is not set -CONFIG_NFS_V4_SECURITY_LABEL=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -CONFIG_NFS_DISABLE_UDP_SUPPORT=y -# CONFIG_NFS_V4_2_READ_PLUS is not set -# CONFIG_NFSD is not set -CONFIG_GRACE_PERIOD=m -CONFIG_LOCKD=m -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=m -CONFIG_SUNRPC_GSS=m -CONFIG_SUNRPC_BACKCHANNEL=y -# CONFIG_SUNRPC_DEBUG is not set -# CONFIG_CEPH_FS is not set -CONFIG_CIFS=m -CONFIG_CIFS_STATS2=y -CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -CONFIG_CIFS_DEBUG=y -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set -# CONFIG_CIFS_DFS_UPCALL is not set -# CONFIG_CIFS_SWN_UPCALL is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_MAC_ROMAN is not set -# CONFIG_NLS_MAC_CELTIC is not set -# CONFIG_NLS_MAC_CENTEURO is not set -# CONFIG_NLS_MAC_CROATIAN is not set -# CONFIG_NLS_MAC_CYRILLIC is not set -# CONFIG_NLS_MAC_GAELIC is not set -# CONFIG_NLS_MAC_GREEK is not set -# CONFIG_NLS_MAC_ICELAND is not set -# CONFIG_NLS_MAC_INUIT is not set -# CONFIG_NLS_MAC_ROMANIAN is not set -# CONFIG_NLS_MAC_TURKISH is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set -# CONFIG_UNICODE is not set -CONFIG_IO_WQ=y -# end of File systems - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_REQUEST_CACHE is not set -# CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_TRUSTED_KEYS is not set -# CONFIG_ENCRYPTED_KEYS is not set -# CONFIG_KEY_DH_OPERATIONS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -CONFIG_SECURITY=y -CONFIG_SECURITYFS=y -# CONFIG_SECURITY_NETWORK is not set -# CONFIG_SECURITY_PATH is not set -CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set -# CONFIG_STATIC_USERMODEHELPER is not set -# CONFIG_SECURITY_SMACK is not set -# CONFIG_SECURITY_TOMOYO is not set -# CONFIG_SECURITY_APPARMOR is not set -# CONFIG_SECURITY_LOADPIN is not set -# CONFIG_SECURITY_YAMA is not set -# CONFIG_SECURITY_SAFESETID is not set -# CONFIG_SECURITY_LOCKDOWN_LSM is not set -CONFIG_INTEGRITY=y -# CONFIG_INTEGRITY_SIGNATURE is not set -# CONFIG_IMA is not set -# CONFIG_EVM is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_LSM="yama,loadpin,integrity,selinux,smack,tomoyo,apparmor" - -# -# Kernel hardening options -# - -# -# Memory initialization -# -CONFIG_INIT_STACK_NONE=y -# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set -# CONFIG_GCC_PLUGIN_STACKLEAK is not set -# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set -# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set -# end of Memory initialization -# end of Kernel hardening options -# end of Security options - -CONFIG_XOR_BLOCKS=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_SKCIPHER=y -CONFIG_CRYPTO_SKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_KPP=m -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_USER=m -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -# CONFIG_CRYPTO_PCRYPT is not set -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_AUTHENC=y -# CONFIG_CRYPTO_TEST is not set -CONFIG_CRYPTO_SIMD=m - -# -# Public-key cryptography -# -CONFIG_CRYPTO_RSA=y -# CONFIG_CRYPTO_DH is not set -CONFIG_CRYPTO_ECC=m -CONFIG_CRYPTO_ECDH=m -# CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set -# CONFIG_CRYPTO_CURVE25519 is not set - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=y -# CONFIG_CRYPTO_CHACHA20POLY1305 is not set -# CONFIG_CRYPTO_AEGIS128 is not set -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_ECHAINIV=y - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set -CONFIG_CRYPTO_CTR=y -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=y -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set -# CONFIG_CRYPTO_PCBC is not set -CONFIG_CRYPTO_XTS=y -# CONFIG_CRYPTO_KEYWRAP is not set -CONFIG_CRYPTO_NHPOLY1305=m -# CONFIG_CRYPTO_ADIANTUM is not set -CONFIG_CRYPTO_ESSIV=y - -# -# Hash modes -# -CONFIG_CRYPTO_CMAC=m -CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_XXHASH=m -CONFIG_CRYPTO_BLAKE2B=m -# CONFIG_CRYPTO_BLAKE2S is not set -CONFIG_CRYPTO_CRCT10DIF=m -CONFIG_CRYPTO_GHASH=y -# CONFIG_CRYPTO_POLY1305 is not set -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=m -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_SHA3=m -CONFIG_CRYPTO_SM3=m -# CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_TI is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=m -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_SALSA20 is not set -CONFIG_CRYPTO_CHACHA20=m -# CONFIG_CRYPTO_SERPENT is not set -CONFIG_CRYPTO_SM4=m -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_LZO=m -# CONFIG_CRYPTO_842 is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set -CONFIG_CRYPTO_ZSTD=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_DRBG_HMAC=y -# CONFIG_CRYPTO_DRBG_HASH is not set -# CONFIG_CRYPTO_DRBG_CTR is not set -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_USER_API_HASH is not set -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -# CONFIG_CRYPTO_USER_API_RNG is not set -# CONFIG_CRYPTO_USER_API_AEAD is not set -# CONFIG_CRYPTO_STATS is not set -CONFIG_CRYPTO_HASH_INFO=y - -# -# Crypto library routines -# -CONFIG_CRYPTO_LIB_AES=y -CONFIG_CRYPTO_LIB_ARC4=m -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=m -CONFIG_CRYPTO_LIB_BLAKE2S=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m -CONFIG_CRYPTO_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m -CONFIG_CRYPTO_LIB_CURVE25519=m -CONFIG_CRYPTO_LIB_DES=m -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 -CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m -CONFIG_CRYPTO_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_ALLWINNER=y -# CONFIG_CRYPTO_DEV_SUN4I_SS is not set -# CONFIG_CRYPTO_DEV_SUN8I_CE is not set -# CONFIG_CRYPTO_DEV_SUN8I_SS is not set -# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set -# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set -# CONFIG_CRYPTO_DEV_CCP is not set -# CONFIG_CRYPTO_DEV_SAFEXCEL is not set -# CONFIG_CRYPTO_DEV_CCREE is not set -# CONFIG_CRYPTO_DEV_HISI_SEC is not set -# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set -CONFIG_ASYMMETRIC_KEY_TYPE=y -CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y -CONFIG_X509_CERTIFICATE_PARSER=y -# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set -CONFIG_PKCS7_MESSAGE_PARSER=y -# CONFIG_PKCS7_TEST_KEY is not set -# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set - -# -# Certificates for signature checking -# -CONFIG_SYSTEM_TRUSTED_KEYRING=y -CONFIG_SYSTEM_TRUSTED_KEYS="" -# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set -# CONFIG_SECONDARY_TRUSTED_KEYRING is not set -# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set -# end of Certificates for signature checking - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_RAID6_PQ_BENCHMARK=y -CONFIG_LINEAR_RANGES=y -# CONFIG_PACKING is not set -CONFIG_BITREVERSE=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_NET_UTILS=y -# CONFIG_CORDIC is not set -# CONFIG_PRIME_NUMBERS is not set -CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_USE_SYM_ANNOTATIONS=y -CONFIG_INDIRECT_PIO=y -CONFIG_CRC_CCITT=m -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=m -CONFIG_CRC_ITU_T=m -CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -CONFIG_CRC7=m -CONFIG_LIBCRC32C=m -# CONFIG_CRC8 is not set -CONFIG_XXHASH=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_RANDOM32_SELFTEST is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=m -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_LZ4_COMPRESS=y -CONFIG_LZ4_DECOMPRESS=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y -CONFIG_XZ_DEC=y -CONFIG_XZ_DEC_X86=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_BCJ=y -# CONFIG_XZ_DEC_TEST is not set -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_LZ4=y -CONFIG_DECOMPRESS_ZSTD=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=y -CONFIG_TEXTSEARCH_BM=y -CONFIG_TEXTSEARCH_FSM=y -CONFIG_XARRAY_MULTI=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_DMA_DECLARE_COHERENT=y -CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y -CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y -CONFIG_SWIOTLB=y -CONFIG_DMA_NONCOHERENT_MMAP=y -CONFIG_DMA_COHERENT_POOL=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_CMA=y -CONFIG_DMA_PERNUMA_CMA=y - -# -# Default contiguous memory area size: -# -CONFIG_CMA_SIZE_MBYTES=256 -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_ALIGNMENT=8 -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_DMA_MAP_BENCHMARK is not set -CONFIG_SGL_ALLOC=y -CONFIG_CPU_RMAP=y -CONFIG_DQL=y -CONFIG_GLOB=y -# CONFIG_GLOB_SELFTEST is not set -CONFIG_NLATTR=y -CONFIG_CLZ_TAB=y -# CONFIG_IRQ_POLL is not set -CONFIG_MPILIB=y -CONFIG_LIBFDT=y -CONFIG_OID_REGISTRY=y -CONFIG_HAVE_GENERIC_VDSO=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_VDSO_TIME_NS=y -CONFIG_FONT_SUPPORT=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_SG_POOL=y -CONFIG_ARCH_STACKWALK=y -CONFIG_SBITMAP=y -# CONFIG_STRING_SELFTEST is not set -# end of Library routines - -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y - -# -# Kernel hacking -# - -# -# printk and dmesg options -# -CONFIG_PRINTK_TIME=y -# CONFIG_PRINTK_CALLER is not set -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 -CONFIG_CONSOLE_LOGLEVEL_QUIET=4 -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DYNAMIC_DEBUG_CORE is not set -CONFIG_SYMBOLIC_ERRNAME=y -CONFIG_DEBUG_BUGVERBOSE=y -# end of printk and dmesg options - -# -# Compile-time checks and compiler options -# -CONFIG_FRAME_WARN=2048 -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_HEADERS_INSTALL is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_SECTION_MISMATCH_WARN_ONLY=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_FRAME_POINTER=y -# end of Compile-time checks and compiler options - -# -# Generic Kernel Debugging Instruments -# -# CONFIG_MAGIC_SYSRQ is not set -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_FS_ALLOW_ALL=y -# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set -# CONFIG_DEBUG_FS_ALLOW_NONE is not set -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y -# CONFIG_UBSAN is not set -# end of Generic Kernel Debugging Instruments - -# CONFIG_DEBUG_KERNEL is not set - -# -# Memory Debugging -# -# CONFIG_PAGE_EXTENSION is not set -# CONFIG_PAGE_POISONING is not set -# CONFIG_DEBUG_RODATA_TEST is not set -CONFIG_ARCH_HAS_DEBUG_WX=y -# CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y -# CONFIG_DEBUG_VM_PGTABLE is not set -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y -CONFIG_HAVE_ARCH_KASAN_HW_TAGS=y -CONFIG_CC_HAS_KASAN_GENERIC=y -CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y -# CONFIG_KASAN is not set -# end of Memory Debugging - -# -# Debug Oops, Lockups and Hangs -# -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -# CONFIG_TEST_LOCKUP is not set -# end of Debug Oops, Lockups and Hangs - -# -# Scheduler Debugging -# -CONFIG_SCHED_INFO=y -# end of Scheduler Debugging - -# CONFIG_DEBUG_TIMEKEEPING is not set - -# -# Lock Debugging (spinlocks, mutexes, etc...) -# -CONFIG_LOCK_DEBUGGING_SUPPORT=y -# CONFIG_WW_MUTEX_SELFTEST is not set -# end of Lock Debugging (spinlocks, mutexes, etc...) - -# CONFIG_STACKTRACE is not set -# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set -CONFIG_HAVE_DEBUG_BUGVERBOSE=y - -# -# Debug kernel data structures -# -# CONFIG_BUG_ON_DATA_CORRUPTION is not set -# end of Debug kernel data structures - -# -# RCU Debugging -# -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# end of RCU Debugging - -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_SAMPLES is not set -CONFIG_STRICT_DEVMEM=y -# CONFIG_IO_STRICT_DEVMEM is not set - -# -# arm64 Debugging -# -# CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_ARM64_RELOC_TEST is not set -# CONFIG_CORESIGHT is not set -# end of arm64 Debugging - -# -# Kernel Testing and Coverage -# -# CONFIG_KUNIT is not set -CONFIG_ARCH_HAS_KCOV=y -CONFIG_CC_HAS_SANCOV_TRACE_PC=y -# CONFIG_KCOV is not set -# CONFIG_RUNTIME_TESTING_MENU is not set -# CONFIG_MEMTEST is not set -# end of Kernel Testing and Coverage -# end of Kernel hacking diff --git a/sys-kernel/pinephone-sources/files/config-5.9.11 b/sys-kernel/pinephone-sources/files/config-5.9.11 deleted file mode 100644 index 563c526..0000000 --- a/sys-kernel/pinephone-sources/files/config-5.9.11 +++ /dev/null @@ -1,6359 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.9.8-pinephone Kernel Configuration -# -CONFIG_CC_VERSION_TEXT="aarch64-unknown-linux-gnu-gcc (Gentoo 10.2.0-r3 p4) 10.2.0" -CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=100200 -CONFIG_LD_VERSION=235010000 -CONFIG_CLANG_VERSION=0 -CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y -CONFIG_CC_HAS_ASM_GOTO=y -CONFIG_CC_HAS_ASM_INLINE=y -CONFIG_IRQ_WORK=y -CONFIG_BUILDTIME_TABLE_SORT=y -CONFIG_THREAD_INFO_IN_TASK=y - -# -# General setup -# -CONFIG_INIT_ENV_ARG_LIMIT=32 -# CONFIG_COMPILE_TEST is not set -CONFIG_LOCALVERSION="-gentoo" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_BUILD_SALT="" -CONFIG_DEFAULT_INIT="" -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_WATCH_QUEUE is not set -CONFIG_CROSS_MEMORY_ATTACH=y -# CONFIG_USELIB is not set -# CONFIG_AUDIT is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_IRQ_MSI_IOMMU=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_SPARSE_IRQ=y -# CONFIG_GENERIC_IRQ_DEBUGFS is not set -# end of IRQ subsystem - -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y - -# -# Timers subsystem -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ_COMMON=y -# CONFIG_HZ_PERIODIC is not set -CONFIG_NO_HZ_IDLE=y -# CONFIG_NO_HZ_FULL is not set -# CONFIG_NO_HZ is not set -CONFIG_HIGH_RES_TIMERS=y -# end of Timers subsystem - -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set - -# -# CPU/Task time and stats accounting -# -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_PSI is not set -# end of CPU/Task time and stats accounting - -CONFIG_CPU_ISOLATION=y - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_RCU_EXPERT is not set -CONFIG_SRCU=y -CONFIG_TREE_SRCU=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RCU_NEED_SEGCBLIST=y -# end of RCU Subsystem - -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -# CONFIG_IKHEADERS is not set -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 -CONFIG_GENERIC_SCHED_CLOCK=y - -# -# Scheduler features -# -# CONFIG_UCLAMP_TASK is not set -# end of Scheduler features - -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_CC_HAS_INT128=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_NUMA_BALANCING=y -CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y -CONFIG_CGROUPS=y -CONFIG_PAGE_COUNTER=y -CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_KMEM=y -CONFIG_BLK_CGROUP=y -CONFIG_CGROUP_WRITEBACK=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_CFS_BANDWIDTH is not set -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_CGROUP_PIDS=y -# CONFIG_CGROUP_RDMA is not set -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_HUGETLB=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_PERF=y -CONFIG_CGROUP_BPF=y -CONFIG_SOCK_CGROUP_DATA=y -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_TIME_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -CONFIG_CHECKPOINT_RESTORE=y -CONFIG_SCHED_AUTOGROUP=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_RD_XZ=y -CONFIG_RD_LZO=y -CONFIG_RD_LZ4=y -CONFIG_RD_ZSTD=y -# CONFIG_BOOT_CONFIG is not set -CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SYSCTL=y -CONFIG_HAVE_UID16=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_BPF=y -# CONFIG_EXPERT is not set -CONFIG_UID16=y -CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_FHANDLE=y -CONFIG_POSIX_TIMERS=y -CONFIG_PRINTK=y -CONFIG_PRINTK_NMI=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_FUTEX_PI=y -CONFIG_HAVE_FUTEX_CMPXCHG=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_IO_URING=y -CONFIG_ADVISE_SYSCALLS=y -CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -CONFIG_BPF_SYSCALL=y -CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y -CONFIG_BPF_JIT_ALWAYS_ON=y -CONFIG_BPF_JIT_DEFAULT_ON=y -# CONFIG_USERFAULTFD is not set -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_RSEQ=y -# CONFIG_EMBEDDED is not set -CONFIG_HAVE_PERF_EVENTS=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# end of Kernel Performance Events And Counters - -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -CONFIG_SLAB_MERGE_DEFAULT=y -# CONFIG_SLAB_FREELIST_RANDOM is not set -# CONFIG_SLAB_FREELIST_HARDENED is not set -# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set -CONFIG_SLUB_CPU_PARTIAL=y -CONFIG_SYSTEM_DATA_VERIFICATION=y -CONFIG_PROFILING=y -# end of General setup - -CONFIG_ARM64=y -CONFIG_64BIT=y -CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_CONT_SHIFT=4 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=33 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 -CONFIG_NO_IOPORT_MAP=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_ZONE_DMA32=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_SMP=y -CONFIG_KERNEL_MODE_NEON=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_PGTABLE_LEVELS=4 -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_PROC_KCORE_TEXT=y - -# -# Platform selection -# -# CONFIG_ARCH_ACTIONS is not set -# CONFIG_ARCH_AGILEX is not set -CONFIG_ARCH_SUNXI=y -# CONFIG_ARCH_ALPINE is not set -# CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM_IPROC is not set -# CONFIG_ARCH_BERLIN is not set -# CONFIG_ARCH_BITMAIN is not set -# CONFIG_ARCH_BRCMSTB is not set -# CONFIG_ARCH_EXYNOS is not set -# CONFIG_ARCH_SPARX5 is not set -# CONFIG_ARCH_K3 is not set -# CONFIG_ARCH_LAYERSCAPE is not set -# CONFIG_ARCH_LG1K is not set -# CONFIG_ARCH_HISI is not set -# CONFIG_ARCH_KEEMBAY is not set -# CONFIG_ARCH_MEDIATEK is not set -# CONFIG_ARCH_MESON is not set -# CONFIG_ARCH_MVEBU is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_REALTEK is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_ROCKCHIP is not set -# CONFIG_ARCH_S32 is not set -# CONFIG_ARCH_SEATTLE is not set -# CONFIG_ARCH_STRATIX10 is not set -# CONFIG_ARCH_SYNQUACER is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_SPRD is not set -# CONFIG_ARCH_THUNDER is not set -# CONFIG_ARCH_THUNDER2 is not set -# CONFIG_ARCH_UNIPHIER is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_XGENE is not set -# CONFIG_ARCH_ZX is not set -# CONFIG_ARCH_ZYNQMP is not set -# end of Platform selection - -# -# Kernel Features -# - -# -# ARM errata workarounds via the alternatives framework -# -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_834220=y -CONFIG_ARM64_ERRATUM_845719=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_1024718=y -CONFIG_ARM64_ERRATUM_1418040=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1319367=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_ERRATUM_1463225=y -CONFIG_ARM64_ERRATUM_1542419=y -CONFIG_CAVIUM_ERRATUM_22375=y -CONFIG_CAVIUM_ERRATUM_23144=y -CONFIG_CAVIUM_ERRATUM_23154=y -CONFIG_CAVIUM_ERRATUM_27456=y -CONFIG_CAVIUM_ERRATUM_30115=y -CONFIG_CAVIUM_TX2_ERRATUM_219=y -CONFIG_FUJITSU_ERRATUM_010001=y -CONFIG_HISILICON_ERRATUM_161600802=y -CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_QCOM_FALKOR_ERRATUM_1009=y -CONFIG_QCOM_QDF2400_ERRATUM_0065=y -CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y -# end of ARM errata workarounds via the alternatives framework - -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_16K_PAGES is not set -# CONFIG_ARM64_64K_PAGES is not set -# CONFIG_ARM64_VA_BITS_39 is not set -CONFIG_ARM64_VA_BITS_48=y -CONFIG_ARM64_VA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PA_BITS=48 -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SCHED_MC=y -# CONFIG_SCHED_SMT is not set -CONFIG_NR_CPUS=64 -CONFIG_HOTPLUG_CPU=y -CONFIG_NUMA=y -CONFIG_NODES_SHIFT=2 -CONFIG_USE_PERCPU_NUMA_NODE_ID=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_300 is not set -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_SCHED_HRTICK=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HW_PERF_EVENTS=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_SECCOMP=y -CONFIG_PARAVIRT=y -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set -CONFIG_KEXEC=y -CONFIG_KEXEC_FILE=y -# CONFIG_KEXEC_SIG is not set -CONFIG_CRASH_DUMP=y -CONFIG_XEN_DOM0=y -CONFIG_XEN=y -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_ARM64_SSBD=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_COMPAT=y -CONFIG_KUSER_HELPERS=y -# CONFIG_ARMV8_DEPRECATED is not set - -# -# ARMv8.1 architectural features -# -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_PAN=y -CONFIG_ARM64_LSE_ATOMICS=y -CONFIG_ARM64_USE_LSE_ATOMICS=y -CONFIG_ARM64_VHE=y -# end of ARMv8.1 architectural features - -# -# ARMv8.2 architectural features -# -CONFIG_ARM64_UAO=y -# CONFIG_ARM64_PMEM is not set -CONFIG_ARM64_RAS_EXTN=y -CONFIG_ARM64_CNP=y -# end of ARMv8.2 architectural features - -# -# ARMv8.3 architectural features -# -CONFIG_ARM64_PTR_AUTH=y -CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y -CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y -CONFIG_AS_HAS_PAC=y -CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y -# end of ARMv8.3 architectural features - -# -# ARMv8.4 architectural features -# -CONFIG_ARM64_AMU_EXTN=y -CONFIG_AS_HAS_ARMV8_4=y -CONFIG_ARM64_TLB_RANGE=y -# end of ARMv8.4 architectural features - -# -# ARMv8.5 architectural features -# -CONFIG_ARM64_BTI=y -CONFIG_ARM64_BTI_KERNEL=y -CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y -CONFIG_ARM64_E0PD=y -CONFIG_ARCH_RANDOM=y -# end of ARMv8.5 architectural features - -CONFIG_ARM64_SVE=y -CONFIG_ARM64_MODULE_PLTS=y -# CONFIG_ARM64_PSEUDO_NMI is not set -CONFIG_RELOCATABLE=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_STACKPROTECTOR_PER_TASK=y -# end of Kernel Features - -# -# Boot options -# -CONFIG_CMDLINE="console=ttyAMA0" -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_EFI is not set -# end of Boot options - -CONFIG_SYSVIPC_COMPAT=y -CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HIBERNATION=y -CONFIG_HIBERNATION_SNAPSHOT_DEV=y -CONFIG_PM_STD_PARTITION="" -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_PM_AUTOSLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_WAKELOCKS_LIMIT=100 -CONFIG_PM_WAKELOCKS_GC=y -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_CPU_PM=y -CONFIG_ENERGY_MODEL=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_HIBERNATION_HEADER=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# end of Power management options - -# -# CPU Power Management -# - -# -# CPU Idle -# -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y -# CONFIG_CPU_IDLE_GOV_LADDER is not set -CONFIG_CPU_IDLE_GOV_MENU=y -# CONFIG_CPU_IDLE_GOV_TEO is not set -CONFIG_DT_IDLE_STATES=y - -# -# ARM CPU Idle Drivers -# -CONFIG_ARM_CPUIDLE=y -CONFIG_ARM_PSCI_CPUIDLE=y -CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y -# end of ARM CPU Idle Drivers -# end of CPU Idle - -# -# CPU Frequency scaling -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y - -# -# CPU frequency scaling drivers -# -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -# CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is not set -CONFIG_ARM_SCPI_CPUFREQ=y -# end of CPU Frequency scaling -# end of CPU Power Management - -# -# Firmware Drivers -# -# CONFIG_ARM_SCMI_PROTOCOL is not set -CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y -# CONFIG_ARM_SDE_INTERFACE is not set -# CONFIG_GOOGLE_FIRMWARE is not set -CONFIG_EFI_EARLYCON=y -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_PSCI_CHECKER is not set -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y -CONFIG_ARM_SMCCC_SOC_ID=y - -# -# Tegra firmware driver -# -# end of Tegra firmware driver -# end of Firmware Drivers - -CONFIG_IRQ_BYPASS_MANAGER=y -CONFIG_VIRTUALIZATION=y -CONFIG_KVM=y -CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM_IRQFD=y -CONFIG_HAVE_KVM_IRQ_ROUTING=y -CONFIG_HAVE_KVM_EVENTFD=y -CONFIG_KVM_MMIO=y -CONFIG_HAVE_KVM_MSI=y -CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y -CONFIG_KVM_VFIO=y -CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y -CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y -CONFIG_HAVE_KVM_IRQ_BYPASS=y -CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y -CONFIG_KVM_ARM_PMU=y -CONFIG_KVM_INDIRECT_VECTORS=y -CONFIG_ARM64_CRYPTO=y -CONFIG_CRYPTO_SHA256_ARM64=y -CONFIG_CRYPTO_SHA512_ARM64=m -CONFIG_CRYPTO_SHA1_ARM64_CE=y -CONFIG_CRYPTO_SHA2_ARM64_CE=y -CONFIG_CRYPTO_SHA512_ARM64_CE=m -CONFIG_CRYPTO_SHA3_ARM64=m -CONFIG_CRYPTO_SM3_ARM64_CE=m -# CONFIG_CRYPTO_SM4_ARM64_CE is not set -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m -CONFIG_CRYPTO_CHACHA20_NEON=m -CONFIG_CRYPTO_POLY1305_NEON=m -# CONFIG_CRYPTO_NHPOLY1305_NEON is not set -CONFIG_CRYPTO_AES_ARM64_BS=m - -# -# General architecture-dependent options -# -CONFIG_CRASH_CORE=y -CONFIG_KEXEC_CORE=y -# CONFIG_KPROBES is not set -CONFIG_JUMP_LABEL=y -# CONFIG_STATIC_KEYS_SELFTEST is not set -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y -CONFIG_HAVE_NMI=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_KEEPINITRD=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SET_DIRECT_MAP=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ASM_MODVERSIONS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y -CONFIG_MMU_GATHER_TABLE_FREE=y -CONFIG_MMU_GATHER_RCU_TABLE_FREE=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_STACKLEAK=y -CONFIG_HAVE_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR_STRONG=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_HAVE_ARCH_MMAP_RND_BITS=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 -CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_COMPAT_OLD_SIGACTION=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_VMAP_STACK=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_STRICT_MODULE_RWX=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -CONFIG_ARCH_USE_MEMREMAP_PROT=y -# CONFIG_LOCK_EVENT_COUNTS is not set -CONFIG_ARCH_HAS_RELR=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -# end of GCOV-based kernel profiling - -CONFIG_HAVE_GCC_PLUGINS=y -CONFIG_GCC_PLUGINS=y -# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set -# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set -# end of General architecture-dependent options - -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -# CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -CONFIG_MODULE_COMPRESS_XZ=y -# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_TRIM_UNUSED_KSYMS is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_BLOCK=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y -# CONFIG_BLK_DEV_ZONED is not set -# CONFIG_BLK_DEV_THROTTLING is not set -# CONFIG_BLK_CMDLINE_PARSER is not set -# CONFIG_BLK_WBT is not set -# CONFIG_BLK_CGROUP_IOLATENCY is not set -# CONFIG_BLK_CGROUP_IOCOST is not set -CONFIG_BLK_DEBUG_FS=y -# CONFIG_BLK_SED_OPAL is not set -# CONFIG_BLK_INLINE_ENCRYPTION is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -CONFIG_EFI_PARTITION=y -# end of Partition Types - -CONFIG_BLOCK_COMPAT=y -CONFIG_BLK_PM=y - -# -# IO Schedulers -# -CONFIG_MQ_IOSCHED_DEADLINE=y -CONFIG_MQ_IOSCHED_KYBER=y -# CONFIG_IOSCHED_BFQ is not set -# end of IO Schedulers - -CONFIG_PREEMPT_NOTIFIERS=y -CONFIG_ASN1=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQ=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_FREEZER=y - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_HAVE_ELF_PROT=y -CONFIG_ARCH_USE_GNU_PROPERTY=y -CONFIG_ELFCORE=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_BINFMT_SCRIPT=y -CONFIG_BINFMT_MISC=y -CONFIG_COREDUMP=y -# end of Executable file formats - -# -# Memory Management options -# -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM=y -CONFIG_NEED_MULTIPLE_NODES=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MEMORY_HOTPLUG is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -# CONFIG_PAGE_REPORTING is not set -CONFIG_MIGRATION=y -CONFIG_CONTIG_ALLOC=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_BOUNCE=y -CONFIG_MMU_NOTIFIER=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_MEMORY_FAILURE=y -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -# CONFIG_CLEANCACHE is not set -CONFIG_FRONTSWAP=y -CONFIG_CMA=y -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_AREAS=7 -CONFIG_ZSWAP=y -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set -CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y -CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd" -CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y -# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set -# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set -CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" -CONFIG_ZSWAP_DEFAULT_ON=y -CONFIG_ZPOOL=y -CONFIG_ZBUD=y -CONFIG_Z3FOLD=y -CONFIG_ZSMALLOC=m -# CONFIG_ZSMALLOC_STAT is not set -CONFIG_GENERIC_EARLY_IOREMAP=y -# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set -# CONFIG_IDLE_PAGE_TRACKING is not set -CONFIG_ARCH_HAS_PTE_DEVMAP=y -CONFIG_FRAME_VECTOR=y -# CONFIG_PERCPU_STATS is not set -# CONFIG_GUP_BENCHMARK is not set -# CONFIG_READ_ONLY_THP_FOR_FS is not set -CONFIG_ARCH_HAS_PTE_SPECIAL=y -# end of Memory Management options - -CONFIG_NET=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_NET_INGRESS=y -CONFIG_SKB_EXTENSIONS=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set -CONFIG_UNIX=y -CONFIG_UNIX_SCM=y -# CONFIG_UNIX_DIAG is not set -# CONFIG_TLS is not set -# CONFIG_XFRM_USER is not set -# CONFIG_NET_KEY is not set -CONFIG_XDP_SOCKETS=y -CONFIG_XDP_SOCKETS_DIAG=m -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE_DEMUX is not set -CONFIG_NET_IP_TUNNEL=m -# CONFIG_IP_MROUTE is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_NET_IPVTI is not set -CONFIG_NET_UDP_TUNNEL=m -# CONFIG_NET_FOU is not set -# CONFIG_NET_FOU_IP_TUNNELS is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_INET_UDP_DIAG is not set -# CONFIG_INET_RAW_DIAG is not set -# CONFIG_INET_DIAG_DESTROY is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=y -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_IPV6_ILA is not set -CONFIG_INET6_TUNNEL=m -# CONFIG_IPV6_VTI is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_IPV6_SEG6_LWTUNNEL is not set -# CONFIG_IPV6_SEG6_HMAC is not set -# CONFIG_IPV6_RPL_LWTUNNEL is not set -# CONFIG_NETLABEL is not set -# CONFIG_MPTCP is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NET_PTP_CLASSIFY=y -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -CONFIG_NETFILTER=y -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=m - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_INGRESS=y -CONFIG_NETFILTER_FAMILY_BRIDGE=y -# CONFIG_NETFILTER_NETLINK_ACCT is not set -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set -# CONFIG_NETFILTER_NETLINK_OSF is not set -CONFIG_NF_CONNTRACK=y -CONFIG_NF_LOG_COMMON=y -# CONFIG_NF_LOG_NETDEV is not set -CONFIG_NETFILTER_CONNCOUNT=y -# CONFIG_NF_CONNTRACK_MARK is not set -# CONFIG_NF_CONNTRACK_ZONES is not set -CONFIG_NF_CONNTRACK_PROCFS=y -CONFIG_NF_CONNTRACK_EVENTS=y -# CONFIG_NF_CONNTRACK_TIMEOUT is not set -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -# CONFIG_NF_CONNTRACK_LABELS is not set -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_SCTP=y -CONFIG_NF_CT_PROTO_UDPLITE=y -# CONFIG_NF_CONNTRACK_AMANDA is not set -# CONFIG_NF_CONNTRACK_FTP is not set -# CONFIG_NF_CONNTRACK_H323 is not set -# CONFIG_NF_CONNTRACK_IRC is not set -# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set -# CONFIG_NF_CONNTRACK_SNMP is not set -# CONFIG_NF_CONNTRACK_PPTP is not set -# CONFIG_NF_CONNTRACK_SANE is not set -# CONFIG_NF_CONNTRACK_SIP is not set -# CONFIG_NF_CONNTRACK_TFTP is not set -# CONFIG_NF_CT_NETLINK is not set -CONFIG_NF_NAT=y -CONFIG_NF_NAT_REDIRECT=y -CONFIG_NF_NAT_MASQUERADE=y -# CONFIG_NF_TABLES is not set -CONFIG_NETFILTER_XTABLES=y - -# -# Xtables combined modules -# -# CONFIG_NETFILTER_XT_MARK is not set -# CONFIG_NETFILTER_XT_CONNMARK is not set - -# -# Xtables targets -# -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set -# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -# CONFIG_NETFILTER_XT_TARGET_HL is not set -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set -# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_LOG=y -# CONFIG_NETFILTER_XT_TARGET_MARK is not set -CONFIG_NETFILTER_XT_NAT=m -# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set -# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set -# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set -# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set -CONFIG_NETFILTER_XT_TARGET_REDIRECT=m -CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set -# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=y -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y -# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_DSCP is not set -# CONFIG_NETFILTER_XT_MATCH_ECN is not set -# CONFIG_NETFILTER_XT_MATCH_ESP is not set -# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_HELPER is not set -# CONFIG_NETFILTER_XT_MATCH_HL is not set -# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set -# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set -# CONFIG_NETFILTER_XT_MATCH_L2TP is not set -# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set -# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_MAC is not set -# CONFIG_NETFILTER_XT_MATCH_MARK is not set -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -# CONFIG_NETFILTER_XT_MATCH_OWNER is not set -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set -# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_RECENT is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set -# CONFIG_NETFILTER_XT_MATCH_STATE is not set -# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set -# CONFIG_NETFILTER_XT_MATCH_STRING is not set -# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set -# CONFIG_NETFILTER_XT_MATCH_TIME is not set -# CONFIG_NETFILTER_XT_MATCH_U32 is not set -# end of Core Netfilter Configuration - -# CONFIG_IP_SET is not set -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=y -# CONFIG_NF_SOCKET_IPV4 is not set -# CONFIG_NF_TPROXY_IPV4 is not set -# CONFIG_NF_DUP_IPV4 is not set -# CONFIG_NF_LOG_ARP is not set -CONFIG_NF_LOG_IPV4=y -CONFIG_NF_REJECT_IPV4=y -CONFIG_IP_NF_IPTABLES=y -# CONFIG_IP_NF_MATCH_AH is not set -# CONFIG_IP_NF_MATCH_ECN is not set -# CONFIG_IP_NF_MATCH_RPFILTER is not set -# CONFIG_IP_NF_MATCH_TTL is not set -CONFIG_IP_NF_FILTER=y -CONFIG_IP_NF_TARGET_REJECT=y -# CONFIG_IP_NF_TARGET_SYNPROXY is not set -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -# CONFIG_IP_NF_TARGET_NETMAP is not set -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_IP_NF_MANGLE=y -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set -# CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set -# CONFIG_IP_NF_SECURITY is not set -# CONFIG_IP_NF_ARPTABLES is not set -# end of IP: Netfilter Configuration - -# -# IPv6: Netfilter Configuration -# -# CONFIG_NF_SOCKET_IPV6 is not set -# CONFIG_NF_TPROXY_IPV6 is not set -# CONFIG_NF_DUP_IPV6 is not set -CONFIG_NF_REJECT_IPV6=m -CONFIG_NF_LOG_IPV6=m -CONFIG_IP6_NF_IPTABLES=m -# CONFIG_IP6_NF_MATCH_AH is not set -# CONFIG_IP6_NF_MATCH_EUI64 is not set -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_HL is not set -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -# CONFIG_IP6_NF_MATCH_MH is not set -# CONFIG_IP6_NF_MATCH_RPFILTER is not set -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_MATCH_SRH is not set -# CONFIG_IP6_NF_TARGET_HL is not set -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -# CONFIG_IP6_NF_TARGET_SYNPROXY is not set -CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set -# CONFIG_IP6_NF_SECURITY is not set -CONFIG_IP6_NF_NAT=m -CONFIG_IP6_NF_TARGET_MASQUERADE=m -# CONFIG_IP6_NF_TARGET_NPT is not set -# end of IPv6: Netfilter Configuration - -CONFIG_NF_DEFRAG_IPV6=y -# CONFIG_NF_CONNTRACK_BRIDGE is not set -# CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_L2TP is not set -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_MRP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -CONFIG_BRIDGE_VLAN_FILTERING=y -# CONFIG_BRIDGE_MRP is not set -CONFIG_HAVE_NET_DSA=y -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -CONFIG_VLAN_8021Q_MVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_PHONET is not set -# CONFIG_6LOWPAN is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=y -# CONFIG_BATMAN_ADV is not set -# CONFIG_OPENVSWITCH is not set -CONFIG_VSOCKETS=m -CONFIG_VSOCKETS_DIAG=m -CONFIG_VSOCKETS_LOOPBACK=m -CONFIG_VIRTIO_VSOCKETS_COMMON=m -# CONFIG_NETLINK_DIAG is not set -# CONFIG_MPLS is not set -# CONFIG_NET_NSH is not set -# CONFIG_HSR is not set -# CONFIG_NET_SWITCHDEV is not set -# CONFIG_NET_L3_MASTER_DEV is not set -# CONFIG_QRTR is not set -# CONFIG_NET_NCSI is not set -CONFIG_RPS=y -CONFIG_RFS_ACCEL=y -CONFIG_XPS=y -# CONFIG_CGROUP_NET_PRIO is not set -# CONFIG_CGROUP_NET_CLASSID is not set -CONFIG_NET_RX_BUSY_POLL=y -CONFIG_BQL=y -CONFIG_BPF_JIT=y -CONFIG_BPF_STREAM_PARSER=y -CONFIG_NET_FLOW_LIMIT=y - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# end of Network testing -# end of Networking options - -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -CONFIG_BT=m -CONFIG_BT_BREDR=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HS=y -CONFIG_BT_LE=y -CONFIG_BT_LEDS=y -# CONFIG_BT_MSFTEXT is not set -# CONFIG_BT_DEBUGFS is not set -# CONFIG_BT_FEATURE_DEBUG is not set - -# -# Bluetooth device drivers -# -CONFIG_BT_INTEL=m -CONFIG_BT_BCM=m -CONFIG_BT_RTL=m -CONFIG_BT_HCIBTUSB=m -# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set -CONFIG_BT_HCIBTUSB_BCM=y -# CONFIG_BT_HCIBTUSB_MTK is not set -CONFIG_BT_HCIBTUSB_RTL=y -# CONFIG_BT_HCIBTSDIO is not set -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_SERDEV=y -CONFIG_BT_HCIUART_H4=y -# CONFIG_BT_HCIUART_NOKIA is not set -# CONFIG_BT_HCIUART_BCSP is not set -# CONFIG_BT_HCIUART_ATH3K is not set -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIUART_3WIRE=y -# CONFIG_BT_HCIUART_INTEL is not set -CONFIG_BT_HCIUART_BCM=y -CONFIG_BT_HCIUART_RTL=y -# CONFIG_BT_HCIUART_QCA is not set -# CONFIG_BT_HCIUART_AG6XX is not set -# CONFIG_BT_HCIUART_MRVL is not set -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBFUSB is not set -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -# CONFIG_BT_ATH3K is not set -# CONFIG_BT_MTKSDIO is not set -# CONFIG_BT_MTKUART is not set -# end of Bluetooth device drivers - -# CONFIG_AF_RXRPC is not set -# CONFIG_AF_KCM is not set -CONFIG_STREAM_PARSER=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y -CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_CFG80211_CRDA_SUPPORT=y -# CONFIG_CFG80211_WEXT is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -# CONFIG_WIMAX is not set -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -CONFIG_RFKILL_GPIO=m -CONFIG_NET_9P=y -# CONFIG_NET_9P_XEN is not set -# CONFIG_NET_9P_DEBUG is not set -# CONFIG_CAIF is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_NFC is not set -# CONFIG_PSAMPLE is not set -# CONFIG_NET_IFE is not set -# CONFIG_LWTUNNEL is not set -CONFIG_DST_CACHE=y -CONFIG_GRO_CELLS=y -CONFIG_NET_SOCK_MSG=y -CONFIG_PAGE_POOL=y -CONFIG_FAILOVER=y -CONFIG_ETHTOOL_NETLINK=y -CONFIG_HAVE_EBPF_JIT=y - -# -# Device Drivers -# -CONFIG_ARM_AMBA=y -CONFIG_HAVE_PCI=y -# CONFIG_PCI is not set -# CONFIG_PCCARD is not set - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y - -# -# Firmware loader -# -CONFIG_FW_LOADER=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_FW_LOADER_USER_HELPER is not set -# CONFIG_FW_LOADER_COMPRESS is not set -CONFIG_FW_CACHE=y -# end of Firmware loader - -CONFIG_WANT_DEV_COREDUMP=y -CONFIG_ALLOW_DEV_COREDUMP=y -CONFIG_DEV_COREDUMP=y -# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_SOC_BUS=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_SPI=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_IRQ=y -CONFIG_DMA_SHARED_BUFFER=y -# CONFIG_DMA_FENCE_TRACE is not set -CONFIG_GENERIC_ARCH_TOPOLOGY=y -# end of Generic Driver Options - -# -# Bus devices -# -CONFIG_BRCMSTB_GISB_ARB=y -# CONFIG_MOXTET is not set -CONFIG_SIMPLE_PM_BUS=y -CONFIG_SUN50I_DE2_BUS=y -CONFIG_SUNXI_RSB=y -CONFIG_VEXPRESS_CONFIG=y -# CONFIG_MHI_BUS is not set -# end of Bus devices - -# CONFIG_CONNECTOR is not set -# CONFIG_GNSS is not set -CONFIG_MTD=y -# CONFIG_MTD_TESTS is not set - -# -# Partition parsers -# -# CONFIG_MTD_AR7_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -CONFIG_MTD_OF_PARTS=y -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_REDBOOT_PARTS is not set -# end of Partition parsers - -# -# User Modules And Translation Layers -# -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_SM_FTL is not set -# CONFIG_MTD_OOPS is not set -# CONFIG_MTD_SWAP is not set -# CONFIG_MTD_PARTITIONED_MASTER is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set -# end of RAM/ROM/Flash chip drivers - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set -# end of Mapping drivers for chip access - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_MCHP23K256 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOCG3 is not set -# end of Self-contained MTD device drivers - -# -# NAND -# -# CONFIG_MTD_ONENAND is not set -# CONFIG_MTD_RAW_NAND is not set -# CONFIG_MTD_SPI_NAND is not set -# end of NAND - -# -# LPDDR & LPDDR2 PCM memory drivers -# -# CONFIG_MTD_LPDDR is not set -# end of LPDDR & LPDDR2 PCM memory drivers - -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y -# CONFIG_MTD_UBI is not set -# CONFIG_MTD_HYPERBUS is not set -CONFIG_DTC=y -CONFIG_OF=y -# CONFIG_OF_UNITTEST is not set -CONFIG_OF_FLATTREE=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_KOBJ=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_IRQ=y -CONFIG_OF_NET=y -CONFIG_OF_MDIO=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OF_RESOLVE=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_NUMA=y -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_NULL_BLK is not set -CONFIG_ZRAM=m -# CONFIG_ZRAM_WRITEBACK is not set -# CONFIG_ZRAM_MEMORY_TRACKING is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -CONFIG_BLK_DEV_CRYPTOLOOP=y -# CONFIG_BLK_DEV_DRBD is not set -CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_RAM=m -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_XEN_BLKDEV_FRONTEND is not set -# CONFIG_BLK_DEV_RBD is not set - -# -# NVME Support -# -# CONFIG_NVME_FC is not set -# CONFIG_NVME_TARGET is not set -# end of NVME Support - -# -# Misc devices -# -CONFIG_SENSORS_LIS3LV02D=m -# CONFIG_AD525X_DPOT is not set -# CONFIG_DUMMY_IRQ is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_HMC6352 is not set -# CONFIG_DS1682 is not set -# CONFIG_LATTICE_ECP3_CONFIG is not set -CONFIG_SRAM=y -# CONFIG_XILINX_SDFEC is not set -# CONFIG_PVPANIC is not set -CONFIG_MODEM_POWER=m -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT24 is not set -CONFIG_EEPROM_AT25=m -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_EEPROM_93XX46 is not set -# CONFIG_EEPROM_IDT_89HPESX is not set -# CONFIG_EEPROM_EE1004 is not set -# end of EEPROM support - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - -CONFIG_SENSORS_LIS3_SPI=m -CONFIG_SENSORS_LIS3_I2C=m -# CONFIG_ALTERA_STAPL is not set - -# -# Intel MIC & related support -# -# CONFIG_VOP_BUS is not set -# end of Intel MIC & related support - -# CONFIG_ECHO is not set -# CONFIG_MISC_RTSX_USB is not set -# CONFIG_UACCE is not set -# end of Misc devices - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_PROC_FS is not set - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -CONFIG_SCSI_SAS_ATTRS=y -CONFIG_SCSI_SAS_LIBSAS=y -CONFIG_SCSI_SAS_HOST_SMP=y -# CONFIG_SCSI_SRP_ATTRS is not set -# end of SCSI Transports - -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_ISCSI_BOOT_SYSFS is not set -CONFIG_SCSI_HISI_SAS=m -CONFIG_SCSI_UFSHCD=m -CONFIG_SCSI_UFSHCD_PLATFORM=m -# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set -# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set -# CONFIG_SCSI_UFS_BSG is not set -# CONFIG_XEN_SCSI_FRONTEND is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# end of SCSI device support - -CONFIG_HAVE_PATA_PLATFORM=y -CONFIG_ATA=m -CONFIG_SATA_HOST=y -CONFIG_ATA_VERBOSE_ERROR=y -CONFIG_ATA_FORCE=y -CONFIG_SATA_PMP=y - -# -# Controllers with non-SFF native interface -# -CONFIG_SATA_AHCI_PLATFORM=m -CONFIG_AHCI_CEVA=m -# CONFIG_AHCI_SUNXI is not set -CONFIG_AHCI_XGENE=m -CONFIG_AHCI_QORIQ=m -CONFIG_ATA_SFF=y - -# -# SFF controllers with custom DMA interface -# -CONFIG_ATA_BMDMA=y - -# -# SATA SFF controllers with BMDMA -# -# CONFIG_SATA_DWC is not set - -# -# PATA SFF controllers with BMDMA -# - -# -# PIO-only SFF controllers -# -# CONFIG_PATA_PLATFORM is not set - -# -# Generic fallback / legacy drivers -# -CONFIG_MD=y -# CONFIG_BLK_DEV_MD is not set -# CONFIG_BCACHE is not set -CONFIG_BLK_DEV_DM_BUILTIN=y -CONFIG_BLK_DEV_DM=y -# CONFIG_DM_DEBUG is not set -# CONFIG_DM_UNSTRIPED is not set -CONFIG_DM_CRYPT=y -# CONFIG_DM_SNAPSHOT is not set -# CONFIG_DM_THIN_PROVISIONING is not set -# CONFIG_DM_CACHE is not set -# CONFIG_DM_WRITECACHE is not set -# CONFIG_DM_EBS is not set -# CONFIG_DM_ERA is not set -# CONFIG_DM_CLONE is not set -# CONFIG_DM_MIRROR is not set -# CONFIG_DM_RAID is not set -# CONFIG_DM_ZERO is not set -# CONFIG_DM_MULTIPATH is not set -# CONFIG_DM_DELAY is not set -# CONFIG_DM_DUST is not set -# CONFIG_DM_INIT is not set -# CONFIG_DM_UEVENT is not set -# CONFIG_DM_FLAKEY is not set -# CONFIG_DM_VERITY is not set -# CONFIG_DM_SWITCH is not set -# CONFIG_DM_LOG_WRITES is not set -# CONFIG_DM_INTEGRITY is not set -CONFIG_TARGET_CORE=m -# CONFIG_TCM_IBLOCK is not set -# CONFIG_TCM_FILEIO is not set -# CONFIG_TCM_PSCSI is not set -# CONFIG_LOOPBACK_TARGET is not set -# CONFIG_ISCSI_TARGET is not set -CONFIG_NETDEVICES=y -CONFIG_MII=y -CONFIG_NET_CORE=y -# CONFIG_BONDING is not set -# CONFIG_DUMMY is not set -CONFIG_WIREGUARD=m -# CONFIG_WIREGUARD_DEBUG is not set -# CONFIG_EQUALIZER is not set -# CONFIG_NET_TEAM is not set -CONFIG_MACVLAN=m -CONFIG_MACVTAP=m -# CONFIG_IPVLAN is not set -# CONFIG_VXLAN is not set -# CONFIG_GENEVE is not set -# CONFIG_BAREUDP is not set -# CONFIG_GTP is not set -# CONFIG_MACSEC is not set -# CONFIG_NETCONSOLE is not set -CONFIG_TUN=y -CONFIG_TAP=m -# CONFIG_TUN_VNET_CROSS_LE is not set -CONFIG_VETH=m -# CONFIG_NLMON is not set -# CONFIG_VSOCKMON is not set - -# -# Distributed Switch Architecture drivers -# -# end of Distributed Switch Architecture drivers - -CONFIG_ETHERNET=y -CONFIG_NET_VENDOR_ALACRITECH=y -CONFIG_NET_VENDOR_ALLWINNER=y -# CONFIG_SUN4I_EMAC is not set -# CONFIG_ALTERA_TSE is not set -CONFIG_NET_VENDOR_AMAZON=y -CONFIG_NET_VENDOR_AMD=y -CONFIG_AMD_XGBE=y -CONFIG_NET_VENDOR_AQUANTIA=y -CONFIG_NET_VENDOR_ARC=y -CONFIG_NET_VENDOR_AURORA=y -# CONFIG_AURORA_NB8800 is not set -CONFIG_NET_VENDOR_BROADCOM=y -# CONFIG_B44 is not set -# CONFIG_BCMGENET is not set -# CONFIG_SYSTEMPORT is not set -CONFIG_NET_VENDOR_CADENCE=y -CONFIG_MACB=y -CONFIG_MACB_USE_HWSTAMP=y -CONFIG_NET_VENDOR_CAVIUM=y -CONFIG_NET_VENDOR_CORTINA=y -# CONFIG_GEMINI_ETHERNET is not set -# CONFIG_DNET is not set -CONFIG_NET_VENDOR_EZCHIP=y -# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set -CONFIG_NET_VENDOR_GOOGLE=y -CONFIG_NET_VENDOR_HISILICON=y -CONFIG_HIX5HD2_GMAC=y -# CONFIG_HISI_FEMAC is not set -# CONFIG_HIP04_ETH is not set -CONFIG_HNS_MDIO=y -CONFIG_HNS=y -CONFIG_HNS_DSAF=y -CONFIG_HNS_ENET=y -CONFIG_NET_VENDOR_HUAWEI=y -CONFIG_NET_VENDOR_I825XX=y -CONFIG_NET_VENDOR_INTEL=y -CONFIG_NET_VENDOR_MARVELL=y -CONFIG_MVMDIO=y -CONFIG_NET_VENDOR_MELLANOX=y -# CONFIG_MLXSW_CORE is not set -# CONFIG_MLXFW is not set -CONFIG_NET_VENDOR_MICREL=y -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -CONFIG_NET_VENDOR_MICROCHIP=y -# CONFIG_ENC28J60 is not set -# CONFIG_ENCX24J600 is not set -CONFIG_NET_VENDOR_MICROSEMI=y -CONFIG_NET_VENDOR_NATSEMI=y -CONFIG_NET_VENDOR_NETRONOME=y -CONFIG_NET_VENDOR_NI=y -# CONFIG_NI_XGE_MANAGEMENT_ENET is not set -CONFIG_NET_VENDOR_8390=y -# CONFIG_ETHOC is not set -CONFIG_NET_VENDOR_PENSANDO=y -CONFIG_NET_VENDOR_QUALCOMM=y -# CONFIG_QCA7000_SPI is not set -# CONFIG_QCA7000_UART is not set -CONFIG_QCOM_EMAC=m -# CONFIG_RMNET is not set -CONFIG_NET_VENDOR_RENESAS=y -CONFIG_NET_VENDOR_ROCKER=y -CONFIG_NET_VENDOR_SAMSUNG=y -# CONFIG_SXGBE_ETH is not set -CONFIG_NET_VENDOR_SEEQ=y -CONFIG_NET_VENDOR_SOLARFLARE=y -CONFIG_NET_VENDOR_SMSC=y -CONFIG_SMC91X=y -CONFIG_SMSC911X=y -CONFIG_NET_VENDOR_SOCIONEXT=y -CONFIG_NET_VENDOR_STMICRO=y -CONFIG_STMMAC_ETH=m -# CONFIG_STMMAC_SELFTESTS is not set -CONFIG_STMMAC_PLATFORM=m -# CONFIG_DWMAC_DWC_QOS_ETH is not set -CONFIG_DWMAC_GENERIC=m -CONFIG_DWMAC_SUNXI=m -CONFIG_DWMAC_SUN8I=m -CONFIG_NET_VENDOR_SYNOPSYS=y -# CONFIG_DWC_XLGMAC is not set -CONFIG_NET_VENDOR_VIA=y -# CONFIG_VIA_VELOCITY is not set -CONFIG_NET_VENDOR_WIZNET=y -# CONFIG_WIZNET_W5100 is not set -# CONFIG_WIZNET_W5300 is not set -CONFIG_NET_VENDOR_XILINX=y -# CONFIG_XILINX_AXI_EMAC is not set -# CONFIG_XILINX_LL_TEMAC is not set -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVRES=y -# CONFIG_MDIO_BCM_UNIMAC is not set -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BUS_MUX=y -# CONFIG_MDIO_BUS_MUX_GPIO is not set -CONFIG_MDIO_BUS_MUX_MMIOREG=y -# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set -# CONFIG_MDIO_GPIO is not set -# CONFIG_MDIO_HISI_FEMAC is not set -# CONFIG_MDIO_IPQ4019 is not set -# CONFIG_MDIO_IPQ8064 is not set -# CONFIG_MDIO_MSCC_MIIM is not set -# CONFIG_MDIO_MVUSB is not set -# CONFIG_MDIO_OCTEON is not set -# CONFIG_MDIO_SUN4I is not set -CONFIG_MDIO_XPCS=m -CONFIG_PHYLINK=y -CONFIG_PHYLIB=y -CONFIG_SWPHY=y -# CONFIG_LED_TRIGGER_PHY is not set - -# -# MII PHY device drivers -# -# CONFIG_SFP is not set -# CONFIG_ADIN_PHY is not set -# CONFIG_AMD_PHY is not set -# CONFIG_AQUANTIA_PHY is not set -# CONFIG_AX88796B_PHY is not set -# CONFIG_BCM7XXX_PHY is not set -# CONFIG_BCM87XX_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_BCM54140_PHY is not set -# CONFIG_BCM84881_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_CORTINA_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_DP83822_PHY is not set -# CONFIG_DP83TC811_PHY is not set -# CONFIG_DP83848_PHY is not set -# CONFIG_DP83867_PHY is not set -# CONFIG_DP83869_PHY is not set -CONFIG_FIXED_PHY=y -# CONFIG_ICPLUS_PHY is not set -# CONFIG_INTEL_XWAY_PHY is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_LXT_PHY is not set -CONFIG_MARVELL_PHY=m -CONFIG_MARVELL_10G_PHY=m -CONFIG_MICREL_PHY=y -CONFIG_MICROCHIP_PHY=m -# CONFIG_MICROCHIP_T1_PHY is not set -# CONFIG_MICROSEMI_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_NXP_TJA11XX_PHY is not set -CONFIG_AT803X_PHY=m -# CONFIG_QSEMI_PHY is not set -CONFIG_REALTEK_PHY=m -# CONFIG_RENESAS_PHY is not set -CONFIG_ROCKCHIP_PHY=y -# CONFIG_SMSC_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_TERANETICS_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_XILINX_GMII2RGMII is not set -# CONFIG_MICREL_KS8995MA is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -CONFIG_USB_NET_DRIVERS=y -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_RTL8152=m -CONFIG_USB_LAN78XX=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_AX88179_178A=m -CONFIG_USB_NET_CDCETHER=m -# CONFIG_USB_NET_CDC_EEM is not set -CONFIG_USB_NET_CDC_NCM=m -# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set -# CONFIG_USB_NET_CDC_MBIM is not set -CONFIG_USB_NET_DM9601=m -# CONFIG_USB_NET_SR9700 is not set -CONFIG_USB_NET_SR9800=m -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=m -# CONFIG_USB_NET_GL620A is not set -CONFIG_USB_NET_NET1080=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET_ENABLE=m -CONFIG_USB_NET_CDC_SUBSET=m -# CONFIG_USB_ALI_M5632 is not set -# CONFIG_USB_AN2720 is not set -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -# CONFIG_USB_EPSON2888 is not set -# CONFIG_USB_KC2190 is not set -CONFIG_USB_NET_ZAURUS=m -# CONFIG_USB_NET_CX82310_ETH is not set -# CONFIG_USB_NET_KALMIA is not set -CONFIG_USB_NET_QMI_WWAN=m -# CONFIG_USB_HSO is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_USB_IPHETH is not set -# CONFIG_USB_SIERRA_NET is not set -# CONFIG_USB_VL600 is not set -# CONFIG_USB_NET_CH9200 is not set -# CONFIG_USB_NET_AQC111 is not set -CONFIG_WLAN=y -CONFIG_WLAN_VENDOR_ADMTEK=y -CONFIG_ATH_COMMON=m -CONFIG_WLAN_VENDOR_ATH=y -# CONFIG_ATH_DEBUG is not set -# CONFIG_ATH9K is not set -# CONFIG_ATH9K_HTC is not set -# CONFIG_CARL9170 is not set -# CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set -CONFIG_ATH10K=m -CONFIG_ATH10K_CE=y -# CONFIG_ATH10K_SDIO is not set -# CONFIG_ATH10K_USB is not set -# CONFIG_ATH10K_DEBUG is not set -# CONFIG_ATH10K_DEBUGFS is not set -# CONFIG_WCN36XX is not set -CONFIG_WLAN_VENDOR_ATMEL=y -# CONFIG_AT76C50X_USB is not set -CONFIG_WLAN_VENDOR_BROADCOM=y -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_BRCMUTIL=m -# CONFIG_BRCMSMAC is not set -CONFIG_BRCMFMAC=m -CONFIG_BRCMFMAC_PROTO_BCDC=y -CONFIG_BRCMFMAC_SDIO=y -# CONFIG_BRCMFMAC_USB is not set -# CONFIG_BRCM_TRACING is not set -# CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y -CONFIG_WLAN_VENDOR_INTEL=y -CONFIG_WLAN_VENDOR_INTERSIL=y -# CONFIG_HOSTAP is not set -# CONFIG_P54_COMMON is not set -CONFIG_WLAN_VENDOR_MARVELL=y -# CONFIG_LIBERTAS is not set -# CONFIG_LIBERTAS_THINFIRM is not set -CONFIG_MWIFIEX=m -# CONFIG_MWIFIEX_SDIO is not set -# CONFIG_MWIFIEX_USB is not set -CONFIG_WLAN_VENDOR_MEDIATEK=y -# CONFIG_MT7601U is not set -# CONFIG_MT76x0U is not set -# CONFIG_MT76x2U is not set -# CONFIG_MT7663U is not set -# CONFIG_MT7663S is not set -CONFIG_WLAN_VENDOR_MICROCHIP=y -# CONFIG_WILC1000_SDIO is not set -# CONFIG_WILC1000_SPI is not set -CONFIG_WLAN_VENDOR_RALINK=y -CONFIG_RT2X00=m -# CONFIG_RT2500USB is not set -# CONFIG_RT73USB is not set -CONFIG_RT2800USB=m -CONFIG_RT2800USB_RT33XX=y -CONFIG_RT2800USB_RT35XX=y -CONFIG_RT2800USB_RT3573=y -CONFIG_RT2800USB_RT53XX=y -CONFIG_RT2800USB_RT55XX=y -# CONFIG_RT2800USB_UNKNOWN is not set -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WLAN_VENDOR_REALTEK=y -# CONFIG_RTL8187 is not set -CONFIG_RTL_CARDS=m -# CONFIG_RTL8192CU is not set -# CONFIG_RTL8XXXU is not set -# CONFIG_RTW88 is not set -CONFIG_WLAN_VENDOR_RSI=y -# CONFIG_RSI_91X is not set -CONFIG_WLAN_VENDOR_ST=y -# CONFIG_CW1200 is not set -CONFIG_WLAN_VENDOR_TI=y -# CONFIG_WL1251 is not set -# CONFIG_WL12XX is not set -CONFIG_WL18XX=m -CONFIG_WLCORE=m -# CONFIG_WLCORE_SPI is not set -CONFIG_WLCORE_SDIO=m -CONFIG_WILINK_PLATFORM_DATA=y -CONFIG_WLAN_VENDOR_ZYDAS=y -# CONFIG_USB_ZD1201 is not set -# CONFIG_ZD1211RW is not set -CONFIG_WLAN_VENDOR_QUANTENNA=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_VIRT_WIFI is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# -# CONFIG_WAN is not set -# CONFIG_XEN_NETDEV_FRONTEND is not set -# CONFIG_NETDEVSIM is not set -CONFIG_NET_FAILOVER=y -# CONFIG_ISDN is not set -# CONFIG_NVM is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_LEDS=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=m -# CONFIG_INPUT_SPARSEKMAP is not set -CONFIG_INPUT_MATRIXKMAP=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ADC=m -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_QT1050 is not set -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -# CONFIG_KEYBOARD_DLINK_DIR685 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_GPIO_POLLED is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_TCA8418 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_LM8333 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_SAMSUNG is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_SUN4I_LRADC=m -# CONFIG_KEYBOARD_OMAP4 is not set -# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_CROS_EC is not set -# CONFIG_KEYBOARD_CAP11XX is not set -# CONFIG_KEYBOARD_BCM is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_BYD=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y -CONFIG_MOUSE_PS2_CYPRESS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_PS2_FOCALTECH=y -CONFIG_MOUSE_PS2_SMBUS=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -# CONFIG_MOUSE_ELAN_I2C is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_MOUSE_SYNAPTICS_USB is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_PROPERTIES=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_ADC is not set -# CONFIG_TOUCHSCREEN_AR1021_I2C is not set -CONFIG_TOUCHSCREEN_ATMEL_MXT=m -# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set -# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_BU21029 is not set -# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set -# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_EGALAX is not set -# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set -# CONFIG_TOUCHSCREEN_EXC3000 is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -CONFIG_TOUCHSCREEN_GOODIX=y -# CONFIG_TOUCHSCREEN_HIDEEP is not set -# CONFIG_TOUCHSCREEN_ILI210X is not set -# CONFIG_TOUCHSCREEN_S6SY761 is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_EKTF2127 is not set -# CONFIG_TOUCHSCREEN_ELAN is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_WACOM_I2C is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MMS114 is not set -# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -CONFIG_TOUCHSCREEN_EDT_FT5X06=y -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_PIXCIR is not set -# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC_SERIO is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_TSC2005 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_RM_TS is not set -# CONFIG_TOUCHSCREEN_SILEAD is not set -# CONFIG_TOUCHSCREEN_SIS_I2C is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_STMFTS is not set -CONFIG_TOUCHSCREEN_SUN4I=m -# CONFIG_TOUCHSCREEN_SUR40 is not set -# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set -# CONFIG_TOUCHSCREEN_SX8654 is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -# CONFIG_TOUCHSCREEN_ZET6223 is not set -# CONFIG_TOUCHSCREEN_ZFORCE is not set -# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set -# CONFIG_TOUCHSCREEN_IQS5XX is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_ATMEL_CAPTOUCH is not set -CONFIG_INPUT_BMA150=m -# CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GPIO_BEEPER is not set -# CONFIG_INPUT_GPIO_DECODER is not set -CONFIG_INPUT_GPIO_VIBRA=y -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_KXTJ9 is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -# CONFIG_INPUT_REGULATOR_HAPTIC is not set -CONFIG_INPUT_AXP20X_PEK=y -CONFIG_INPUT_UINPUT=m -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_PWM_BEEPER is not set -CONFIG_INPUT_PWM_VIBRA=m -# CONFIG_INPUT_RK805_PWRKEY is not set -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_IMS_PCU is not set -# CONFIG_INPUT_IQS269A is not set -# CONFIG_INPUT_CMA3000 is not set -CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y -# CONFIG_INPUT_DRV260X_HAPTICS is not set -# CONFIG_INPUT_DRV2665_HAPTICS is not set -# CONFIG_INPUT_DRV2667_HAPTICS is not set -# CONFIG_RMI4_CORE is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIO_AMBAKMI=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_SERIO_ARC_PS2 is not set -# CONFIG_SERIO_APBPS2 is not set -# CONFIG_SERIO_SUN4I_PS2 is not set -# CONFIG_SERIO_GPIO_PS2 is not set -# CONFIG_USERIO is not set -# CONFIG_GAMEPORT is not set -# end of Hardware I/O ports -# end of Input device support - -# -# Character devices -# -CONFIG_TTY=y -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_LDISC_AUTOLOAD=y - -# -# Serial drivers -# -CONFIG_SERIAL_EARLYCON=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -# CONFIG_SERIAL_8250_FINTEK is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_DMA=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_ASPEED_VUART is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -# CONFIG_SERIAL_8250_RSA is not set -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_DW=y -# CONFIG_SERIAL_8250_RT288X is not set -CONFIG_SERIAL_OF_PLATFORM=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_AMBA_PL010 is not set -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX310X is not set -# CONFIG_SERIAL_UARTLITE is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_SIFIVE is not set -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_SC16IS7XX is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -# CONFIG_SERIAL_IFX6X60 is not set -CONFIG_SERIAL_XILINX_PS_UART=y -CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_SERIAL_FSL_LINFLEXUART is not set -# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set -# CONFIG_SERIAL_SPRD is not set -# end of Serial drivers - -CONFIG_SERIAL_MCTRL_GPIO=y -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_NULL_TTY is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_HVC_XEN is not set -# CONFIG_HVC_DCC is not set -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -# CONFIG_IPMI_HANDLER is not set -# CONFIG_IPMB_DEVICE_INTERFACE is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_HW_RANDOM_BA431 is not set -CONFIG_HW_RANDOM_OPTEE=m -# CONFIG_HW_RANDOM_CCTRNG is not set -CONFIG_DEVMEM=y -# CONFIG_RAW_DRIVER is not set -CONFIG_TCG_TPM=y -# CONFIG_TCG_TIS is not set -# CONFIG_TCG_TIS_SPI is not set -# CONFIG_TCG_TIS_I2C_ATMEL is not set -CONFIG_TCG_TIS_I2C_INFINEON=y -# CONFIG_TCG_TIS_I2C_NUVOTON is not set -# CONFIG_TCG_XEN is not set -# CONFIG_TCG_VTPM_PROXY is not set -# CONFIG_TCG_FTPM_TEE is not set -# CONFIG_TCG_TIS_ST33ZP24_I2C is not set -# CONFIG_TCG_TIS_ST33ZP24_SPI is not set -# CONFIG_XILLYBUS is not set -# end of Character devices - -# CONFIG_RANDOM_TRUST_CPU is not set -# CONFIG_RANDOM_TRUST_BOOTLOADER is not set - -# -# I2C support -# -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MUX=y - -# -# Multiplexer I2C Chip support -# -# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set -# CONFIG_I2C_MUX_GPIO is not set -# CONFIG_I2C_MUX_GPMUX is not set -# CONFIG_I2C_MUX_LTC4306 is not set -# CONFIG_I2C_MUX_PCA9541 is not set -CONFIG_I2C_MUX_PCA954x=y -# CONFIG_I2C_MUX_PINCTRL is not set -# CONFIG_I2C_MUX_REG is not set -# CONFIG_I2C_DEMUX_PINCTRL is not set -# CONFIG_I2C_MUX_MLXCPLD is not set -# end of Multiplexer I2C Chip support - -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_CADENCE is not set -# CONFIG_I2C_CBUS_GPIO is not set -CONFIG_I2C_DESIGNWARE_CORE=y -# CONFIG_I2C_DESIGNWARE_SLAVE is not set -CONFIG_I2C_DESIGNWARE_PLATFORM=y -# CONFIG_I2C_EMEV2 is not set -CONFIG_I2C_GPIO=m -# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set -CONFIG_I2C_MV64XXX=y -# CONFIG_I2C_NOMADIK is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PCA_PLATFORM is not set -CONFIG_I2C_RK3X=y -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_ROBOTFUZZ_OSIF is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_CROS_EC_TUNNEL is not set -# end of I2C Hardware Bus support - -# CONFIG_I2C_STUB is not set -CONFIG_I2C_SLAVE=y -# CONFIG_I2C_SLAVE_EEPROM is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# end of I2C support - -# CONFIG_I3C is not set -CONFIG_SPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_AXI_SPI_ENGINE is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_CADENCE is not set -# CONFIG_SPI_CADENCE_QUADSPI is not set -# CONFIG_SPI_DESIGNWARE is not set -# CONFIG_SPI_NXP_FLEXSPI is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_FSL_SPI is not set -# CONFIG_SPI_OC_TINY is not set -CONFIG_SPI_PL022=y -CONFIG_SPI_ROCKCHIP=y -# CONFIG_SPI_SC18IS602 is not set -# CONFIG_SPI_SIFIVE is not set -# CONFIG_SPI_SUN4I is not set -# CONFIG_SPI_SUN6I is not set -# CONFIG_SPI_MXIC is not set -# CONFIG_SPI_XCOMM is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_ZYNQMP_GQSPI is not set -# CONFIG_SPI_AMD is not set - -# -# SPI Multiplexer support -# -# CONFIG_SPI_MUX is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=m -# CONFIG_SPI_LOOPBACK_TEST is not set -# CONFIG_SPI_TLE62X0 is not set -# CONFIG_SPI_SLAVE is not set -CONFIG_SPI_DYNAMIC=y -CONFIG_SPMI=y -# CONFIG_HSI is not set -CONFIG_PPS=y -# CONFIG_PPS_DEBUG is not set - -# -# PPS clients support -# -# CONFIG_PPS_CLIENT_KTIMER is not set -# CONFIG_PPS_CLIENT_LDISC is not set -# CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# - -# -# PTP clock support -# -CONFIG_PTP_1588_CLOCK=y - -# -# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. -# -# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set -# CONFIG_PTP_1588_CLOCK_IDTCM is not set -# end of PTP clock support - -CONFIG_PINCTRL=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_PINMUX=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_PINCONF=y -CONFIG_GENERIC_PINCONF=y -# CONFIG_PINCTRL_AXP209 is not set -# CONFIG_PINCTRL_MCP23S08 is not set -CONFIG_PINCTRL_SINGLE=y -# CONFIG_PINCTRL_SX150X is not set -# CONFIG_PINCTRL_STMFX is not set -CONFIG_PINCTRL_MAX77620=y -# CONFIG_PINCTRL_RK805 is not set -# CONFIG_PINCTRL_OCELOT is not set -CONFIG_PINCTRL_SUNXI=y -# CONFIG_PINCTRL_SUN4I_A10 is not set -# CONFIG_PINCTRL_SUN5I is not set -# CONFIG_PINCTRL_SUN6I_A31 is not set -# CONFIG_PINCTRL_SUN6I_A31_R is not set -# CONFIG_PINCTRL_SUN8I_A23 is not set -# CONFIG_PINCTRL_SUN8I_A33 is not set -# CONFIG_PINCTRL_SUN8I_A83T is not set -# CONFIG_PINCTRL_SUN8I_A83T_R is not set -# CONFIG_PINCTRL_SUN8I_A23_R is not set -# CONFIG_PINCTRL_SUN8I_H3 is not set -CONFIG_PINCTRL_SUN8I_H3_R=y -# CONFIG_PINCTRL_SUN8I_V3S is not set -# CONFIG_PINCTRL_SUN9I_A80 is not set -# CONFIG_PINCTRL_SUN9I_A80_R is not set -CONFIG_PINCTRL_SUN50I_A64=y -CONFIG_PINCTRL_SUN50I_A64_R=y -CONFIG_PINCTRL_SUN50I_H5=y -CONFIG_PINCTRL_SUN50I_H6=y -CONFIG_PINCTRL_SUN50I_H6_R=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_FASTPATH_LIMIT=512 -CONFIG_OF_GPIO=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_GENERIC=y - -# -# Memory mapped GPIO drivers -# -# CONFIG_GPIO_74XX_MMIO is not set -# CONFIG_GPIO_ALTERA is not set -# CONFIG_GPIO_CADENCE is not set -CONFIG_GPIO_DWAPB=y -# CONFIG_GPIO_FTGPIO010 is not set -CONFIG_GPIO_GENERIC_PLATFORM=y -# CONFIG_GPIO_GRGPIO is not set -# CONFIG_GPIO_HLWD is not set -# CONFIG_GPIO_LOGICVC is not set -CONFIG_GPIO_MB86S7X=y -CONFIG_GPIO_PL061=y -# CONFIG_GPIO_SAMA5D2_PIOBU is not set -# CONFIG_GPIO_SIFIVE is not set -# CONFIG_GPIO_SYSCON is not set -CONFIG_GPIO_XGENE=y -# CONFIG_GPIO_XILINX is not set -# CONFIG_GPIO_AMD_FCH is not set -# end of Memory mapped GPIO drivers - -# -# I2C GPIO expanders -# -# CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_ADNP is not set -# CONFIG_GPIO_GW_PLD is not set -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -# CONFIG_GPIO_PCA9570 is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_TPIC2810 is not set -# end of I2C GPIO expanders - -# -# MFD GPIO expanders -# -# CONFIG_GPIO_BD9571MWV is not set -CONFIG_GPIO_MAX77620=y -# end of MFD GPIO expanders - -# -# SPI GPIO expanders -# -# CONFIG_GPIO_74X164 is not set -# CONFIG_GPIO_MAX3191X is not set -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_PISOSR is not set -# CONFIG_GPIO_XRA1403 is not set -# end of SPI GPIO expanders - -# -# USB GPIO expanders -# -# end of USB GPIO expanders - -# CONFIG_GPIO_AGGREGATOR is not set -# CONFIG_GPIO_MOCKUP is not set -# CONFIG_W1 is not set -CONFIG_POWER_AVS=y -# CONFIG_QCOM_CPR is not set -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_BRCMSTB=y -# CONFIG_POWER_RESET_GPIO is not set -# CONFIG_POWER_RESET_GPIO_RESTART is not set -# CONFIG_POWER_RESET_LTC2952 is not set -# CONFIG_POWER_RESET_RESTART is not set -CONFIG_POWER_RESET_VEXPRESS=y -CONFIG_POWER_RESET_XGENE=y -CONFIG_POWER_RESET_SYSCON=y -# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set -CONFIG_REBOOT_MODE=y -CONFIG_SYSCON_REBOOT_MODE=y -# CONFIG_NVMEM_REBOOT_MODE is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -CONFIG_POWER_SUPPLY_HWMON=y -# CONFIG_PDA_POWER is not set -# CONFIG_GENERIC_ADC_BATTERY is not set -# CONFIG_TEST_POWER is not set -# CONFIG_CHARGER_ADP5061 is not set -# CONFIG_BATTERY_CW2015 is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_LEGO_EV3 is not set -CONFIG_BATTERY_SBS=m -# CONFIG_CHARGER_SBS is not set -# CONFIG_MANAGER_SBS is not set -CONFIG_BATTERY_BQ27XXX=y -CONFIG_BATTERY_BQ27XXX_I2C=y -# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set -CONFIG_CHARGER_AXP20X=y -CONFIG_BATTERY_AXP20X=y -CONFIG_AXP20X_POWER=y -CONFIG_AXP288_FUEL_GAUGE=y -# CONFIG_BATTERY_MAX17040 is not set -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_CHARGER_ISP1704 is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_MANAGER is not set -# CONFIG_CHARGER_LT3651 is not set -# CONFIG_CHARGER_DETECTOR_MAX14656 is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set -# CONFIG_CHARGER_BQ2515X is not set -# CONFIG_CHARGER_BQ25890 is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_BATTERY_GAUGE_LTC2941 is not set -# CONFIG_CHARGER_RT9455 is not set -# CONFIG_CHARGER_CROS_USBPD is not set -# CONFIG_CHARGER_UCS1002 is not set -# CONFIG_CHARGER_BD99954 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7314 is not set -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM1177 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7310 is not set -# CONFIG_SENSORS_ADT7410 is not set -# CONFIG_SENSORS_ADT7411 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_AS370 is not set -# CONFIG_SENSORS_ASC7621 is not set -# CONFIG_SENSORS_AXI_FAN_CONTROL is not set -CONFIG_SENSORS_ARM_SCPI=y -# CONFIG_SENSORS_ASPEED is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_CORSAIR_CPRO is not set -# CONFIG_SENSORS_DRIVETEMP is not set -# CONFIG_SENSORS_DS620 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_FTSTEUTATES is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_G762 is not set -# CONFIG_SENSORS_GPIO_FAN is not set -# CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_IIO_HWMON is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_POWR1220 is not set -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LTC2945 is not set -# CONFIG_SENSORS_LTC2947_I2C is not set -# CONFIG_SENSORS_LTC2947_SPI is not set -# CONFIG_SENSORS_LTC2990 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4222 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4260 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_MAX31722 is not set -# CONFIG_SENSORS_MAX31730 is not set -# CONFIG_SENSORS_MAX6621 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_MAX6697 is not set -# CONFIG_SENSORS_MAX31790 is not set -# CONFIG_SENSORS_MCP3021 is not set -# CONFIG_SENSORS_TC654 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -CONFIG_SENSORS_LM90=m -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LM95234 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_LM95245 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_NTC_THERMISTOR is not set -# CONFIG_SENSORS_NCT6683 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_NCT7802 is not set -# CONFIG_SENSORS_NCT7904 is not set -# CONFIG_SENSORS_NPCM7XX is not set -# CONFIG_SENSORS_OCC_P8_I2C is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_PWM_FAN is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SHT3x is not set -# CONFIG_SENSORS_SHTC1 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_SCH5636 is not set -# CONFIG_SENSORS_STTS751 is not set -# CONFIG_SENSORS_SMM665 is not set -# CONFIG_SENSORS_ADC128D818 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_ADS7871 is not set -# CONFIG_SENSORS_AMC6821 is not set -# CONFIG_SENSORS_INA209 is not set -CONFIG_SENSORS_INA2XX=m -# CONFIG_SENSORS_INA3221 is not set -# CONFIG_SENSORS_TC74 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP102 is not set -# CONFIG_SENSORS_TMP103 is not set -# CONFIG_SENSORS_TMP108 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_TMP513 is not set -# CONFIG_SENSORS_VEXPRESS is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83773G is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -CONFIG_THERMAL=y -# CONFIG_THERMAL_NETLINK is not set -CONFIG_THERMAL_STATISTICS=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set -# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set -CONFIG_THERMAL_GOV_FAIR_SHARE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_BANG_BANG=y -# CONFIG_THERMAL_GOV_USER_SPACE is not set -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_FREQ_THERMAL=y -CONFIG_DEVFREQ_THERMAL=y -CONFIG_THERMAL_EMULATION=y -# CONFIG_THERMAL_MMIO is not set -# CONFIG_MAX77620_THERMAL is not set -CONFIG_SUN8I_THERMAL=y -# CONFIG_GENERIC_ADC_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WATCHDOG_NOWAYOUT is not set -CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y -CONFIG_WATCHDOG_OPEN_TIMEOUT=0 -# CONFIG_WATCHDOG_SYSFS is not set - -# -# Watchdog Pretimeout Governors -# -# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_GPIO_WATCHDOG is not set -# CONFIG_XILINX_WATCHDOG is not set -# CONFIG_ZIIRAVE_WATCHDOG is not set -CONFIG_ARM_SP805_WATCHDOG=y -# CONFIG_ARM_SBSA_WATCHDOG is not set -# CONFIG_CADENCE_WATCHDOG is not set -# CONFIG_DW_WATCHDOG is not set -# CONFIG_SUNXI_WATCHDOG is not set -# CONFIG_MAX63XX_WATCHDOG is not set -# CONFIG_MAX77620_WATCHDOG is not set -# CONFIG_ARM_SMC_WATCHDOG is not set -# CONFIG_MEN_A21_WDT is not set -# CONFIG_XEN_WDT is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set -CONFIG_BCMA_POSSIBLE=y -# CONFIG_BCMA is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_ACT8945A is not set -# CONFIG_MFD_SUN4I_GPADC is not set -# CONFIG_MFD_AS3711 is not set -# CONFIG_MFD_AS3722 is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_AAT2870_CORE is not set -# CONFIG_MFD_ATMEL_FLEXCOM is not set -# CONFIG_MFD_ATMEL_HLCDC is not set -# CONFIG_MFD_BCM590XX is not set -CONFIG_MFD_BD9571MWV=y -CONFIG_MFD_AC100=m -CONFIG_MFD_AXP20X=y -CONFIG_MFD_AXP20X_I2C=y -CONFIG_MFD_AXP20X_RSB=y -CONFIG_MFD_CROS_EC_DEV=y -# CONFIG_MFD_MADERA is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_MFD_DA9052_SPI is not set -# CONFIG_MFD_DA9052_I2C is not set -# CONFIG_MFD_DA9055 is not set -# CONFIG_MFD_DA9062 is not set -# CONFIG_MFD_DA9063 is not set -# CONFIG_MFD_DA9150 is not set -# CONFIG_MFD_DLN2 is not set -# CONFIG_MFD_GATEWORKS_GSC is not set -# CONFIG_MFD_MC13XXX_SPI is not set -# CONFIG_MFD_MC13XXX_I2C is not set -# CONFIG_MFD_MP2629 is not set -CONFIG_MFD_HI6421_PMIC=y -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set -# CONFIG_MFD_IQS62X is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_MFD_88PM800 is not set -# CONFIG_MFD_88PM805 is not set -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_MAX14577 is not set -CONFIG_MFD_MAX77620=y -# CONFIG_MFD_MAX77650 is not set -# CONFIG_MFD_MAX77686 is not set -# CONFIG_MFD_MAX77693 is not set -# CONFIG_MFD_MAX77843 is not set -# CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_MFD_MT6360 is not set -# CONFIG_MFD_MT6397 is not set -# CONFIG_MFD_MENF21BMC is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_CPCAP is not set -# CONFIG_MFD_VIPERBOARD is not set -# CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_RT5033 is not set -# CONFIG_MFD_RC5T583 is not set -CONFIG_MFD_RK808=y -# CONFIG_MFD_RN5T618 is not set -CONFIG_MFD_SEC_CORE=y -# CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_SKY81452 is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_MFD_STMPE is not set -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_LP3943 is not set -# CONFIG_MFD_LP8788 is not set -# CONFIG_MFD_TI_LMU is not set -# CONFIG_MFD_PALMAS is not set -# CONFIG_TPS6105X is not set -# CONFIG_TPS65010 is not set -# CONFIG_TPS6507X is not set -# CONFIG_MFD_TPS65086 is not set -# CONFIG_MFD_TPS65090 is not set -# CONFIG_MFD_TPS65217 is not set -# CONFIG_MFD_TI_LP873X is not set -# CONFIG_MFD_TI_LP87565 is not set -# CONFIG_MFD_TPS65218 is not set -# CONFIG_MFD_TPS6586X is not set -# CONFIG_MFD_TPS65910 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_TPS65912_SPI is not set -# CONFIG_MFD_TPS80031 is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_TWL6040_CORE is not set -# CONFIG_MFD_WL1273_CORE is not set -# CONFIG_MFD_LM3533 is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TQMX86 is not set -# CONFIG_MFD_LOCHNAGAR is not set -# CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_ARIZONA_SPI is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_ROHM_BD718XX is not set -# CONFIG_MFD_ROHM_BD70528 is not set -# CONFIG_MFD_ROHM_BD71828 is not set -# CONFIG_MFD_STPMIC1 is not set -# CONFIG_MFD_STMFX is not set -CONFIG_MFD_VEXPRESS_SYSREG=y -# CONFIG_RAVE_SP_CORE is not set -# end of Multifunction device drivers - -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -CONFIG_REGULATOR_USERSPACE_CONSUMER_OF=m -# CONFIG_REGULATOR_88PG86X is not set -# CONFIG_REGULATOR_ACT8865 is not set -# CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_AXP20X=y -CONFIG_REGULATOR_BD9571MWV=y -# CONFIG_REGULATOR_CROS_EC is not set -# CONFIG_REGULATOR_DA9210 is not set -# CONFIG_REGULATOR_DA9211 is not set -CONFIG_REGULATOR_FAN53555=y -# CONFIG_REGULATOR_FAN53880 is not set -CONFIG_REGULATOR_GPIO=y -# CONFIG_REGULATOR_HI6421 is not set -CONFIG_REGULATOR_HI6421V530=y -# CONFIG_REGULATOR_ISL9305 is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -# CONFIG_REGULATOR_LP872X is not set -# CONFIG_REGULATOR_LP8755 is not set -# CONFIG_REGULATOR_LTC3589 is not set -# CONFIG_REGULATOR_LTC3676 is not set -# CONFIG_REGULATOR_MAX1586 is not set -CONFIG_REGULATOR_MAX77620=y -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -# CONFIG_REGULATOR_MAX8973 is not set -# CONFIG_REGULATOR_MAX77826 is not set -# CONFIG_REGULATOR_MCP16502 is not set -# CONFIG_REGULATOR_MP5416 is not set -# CONFIG_REGULATOR_MP8859 is not set -# CONFIG_REGULATOR_MP886X is not set -# CONFIG_REGULATOR_MPQ7920 is not set -# CONFIG_REGULATOR_MT6311 is not set -# CONFIG_REGULATOR_PCA9450 is not set -# CONFIG_REGULATOR_PFUZE100 is not set -# CONFIG_REGULATOR_PV88060 is not set -# CONFIG_REGULATOR_PV88080 is not set -# CONFIG_REGULATOR_PV88090 is not set -CONFIG_REGULATOR_PWM=y -CONFIG_REGULATOR_QCOM_SPMI=y -# CONFIG_REGULATOR_QCOM_USB_VBUS is not set -CONFIG_REGULATOR_RK808=y -# CONFIG_REGULATOR_S2MPA01 is not set -CONFIG_REGULATOR_S2MPS11=y -# CONFIG_REGULATOR_S5M8767 is not set -# CONFIG_REGULATOR_SLG51000 is not set -# CONFIG_REGULATOR_SY8106A is not set -# CONFIG_REGULATOR_SY8824X is not set -# CONFIG_REGULATOR_SY8827N is not set -# CONFIG_REGULATOR_TPS51632 is not set -# CONFIG_REGULATOR_TPS62360 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_TPS65132 is not set -# CONFIG_REGULATOR_TPS6524X is not set -CONFIG_REGULATOR_VCTRL=m -# CONFIG_REGULATOR_VEXPRESS is not set -# CONFIG_REGULATOR_QCOM_LABIBB is not set -# CONFIG_REGULATOR_TP65185X is not set -CONFIG_RC_CORE=m -# CONFIG_RC_MAP is not set -# CONFIG_LIRC is not set -# CONFIG_RC_DECODERS is not set -# CONFIG_RC_DEVICES is not set -CONFIG_CEC_CORE=m -# CONFIG_MEDIA_CEC_RC is not set -# CONFIG_MEDIA_CEC_SUPPORT is not set -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_SUPPORT_FILTER=y -# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set - -# -# Media device types -# -CONFIG_MEDIA_CAMERA_SUPPORT=y -# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set -# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_PLATFORM_SUPPORT=y -# CONFIG_MEDIA_TEST_SUPPORT is not set -# end of Media device types - -CONFIG_VIDEO_DEV=y -CONFIG_MEDIA_CONTROLLER=y - -# -# Video4Linux options -# -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_V4L2_MEM2MEM_DEV=y -CONFIG_V4L2_FLASH_LED_CLASS=y -CONFIG_V4L2_FWNODE=y -# end of Video4Linux options - -# -# Media controller options -# -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y - -# -# Please notice that the enabled Media controller Request API is EXPERIMENTAL -# -# end of Media controller options - -# -# Media drivers -# - -# -# Drivers filtered as selected at 'Filter media drivers' -# -CONFIG_MEDIA_USB_SUPPORT=y - -# -# Webcam devices -# -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_BENQ is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_CPIA1 is not set -# CONFIG_USB_GSPCA_DTCS033 is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_JL2005BCD is not set -# CONFIG_USB_GSPCA_KINECT is not set -# CONFIG_USB_GSPCA_KONICA is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_NW80X is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_OV534_9 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SE401 is not set -# CONFIG_USB_GSPCA_SN9C2028 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SPCA1528 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_SQ930X is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STK1135 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TOPRO is not set -# CONFIG_USB_GSPCA_TOUPTEK is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_VICAM is not set -# CONFIG_USB_GSPCA_XIRLINK_CIT is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -# CONFIG_USB_PWC is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_VIDEO_USBTV is not set - -# -# Webcam, TV (analog/digital) USB devices -# -# CONFIG_VIDEO_EM28XX is not set -CONFIG_VIDEOBUF2_CORE=y -CONFIG_VIDEOBUF2_V4L2=y -CONFIG_VIDEOBUF2_MEMOPS=y -CONFIG_VIDEOBUF2_DMA_CONTIG=y -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_V4L_PLATFORM_DRIVERS=y -# CONFIG_VIDEO_CADENCE is not set -# CONFIG_VIDEO_ASPEED is not set -# CONFIG_VIDEO_MUX is not set -# CONFIG_VIDEO_XILINX is not set -# CONFIG_VIDEO_SUN4I_CSI is not set -CONFIG_VIDEO_SUN6I_CSI=y -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_DEINTERLACE=y -CONFIG_VIDEO_SUN8I_DEINTERLACE=y -CONFIG_VIDEO_SUN8I_ROTATE=y -# end of Media drivers - -# -# Media ancillary drivers -# -# CONFIG_VIDEO_IR_I2C is not set - -# -# Audio decoders, processors and mixers -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA1997X is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS3308 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_UDA1342 is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set -# CONFIG_VIDEO_SONY_BTF_MPX is not set -# end of Audio decoders, processors and mixers - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set -# end of RDS decoders - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_ADV7183 is not set -# CONFIG_VIDEO_ADV748X is not set -# CONFIG_VIDEO_ADV7604 is not set -# CONFIG_VIDEO_ADV7842 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_ML86V7667 is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_TC358743 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_TVP7002 is not set -# CONFIG_VIDEO_TW2804 is not set -# CONFIG_VIDEO_TW9903 is not set -# CONFIG_VIDEO_TW9906 is not set -# CONFIG_VIDEO_TW9910 is not set -# CONFIG_VIDEO_VPX3220 is not set -# CONFIG_VIDEO_MAX9286 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_CX25840 is not set -# end of Video decoders - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_ADV7343 is not set -# CONFIG_VIDEO_ADV7393 is not set -# CONFIG_VIDEO_AD9389B is not set -# CONFIG_VIDEO_AK881X is not set -# CONFIG_VIDEO_THS8200 is not set -# end of Video encoders - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# end of Video improvement chips - -# -# Audio/Video compression chips -# -# CONFIG_VIDEO_SAA6752HS is not set -# end of Audio/Video compression chips - -# -# SDR tuner chips -# -# end of SDR tuner chips - -# -# Miscellaneous helper chips -# -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_I2C is not set -# CONFIG_VIDEO_ST_MIPID02 is not set -# end of Miscellaneous helper chips - -# -# Camera sensor devices -# -# CONFIG_VIDEO_HI556 is not set -# CONFIG_VIDEO_IMX214 is not set -# CONFIG_VIDEO_IMX219 is not set -# CONFIG_VIDEO_IMX258 is not set -# CONFIG_VIDEO_IMX274 is not set -# CONFIG_VIDEO_IMX290 is not set -# CONFIG_VIDEO_IMX319 is not set -# CONFIG_VIDEO_IMX355 is not set -# CONFIG_VIDEO_OV2640 is not set -# CONFIG_VIDEO_OV2659 is not set -# CONFIG_VIDEO_OV2680 is not set -# CONFIG_VIDEO_OV2685 is not set -CONFIG_VIDEO_OV5640=m -# CONFIG_VIDEO_OV5645 is not set -# CONFIG_VIDEO_OV5647 is not set -# CONFIG_VIDEO_OV6650 is not set -# CONFIG_VIDEO_OV5670 is not set -# CONFIG_VIDEO_OV5675 is not set -# CONFIG_VIDEO_OV5695 is not set -# CONFIG_VIDEO_OV7251 is not set -# CONFIG_VIDEO_OV772X is not set -# CONFIG_VIDEO_OV7640 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_OV7740 is not set -# CONFIG_VIDEO_OV8856 is not set -# CONFIG_VIDEO_OV9640 is not set -# CONFIG_VIDEO_OV9650 is not set -# CONFIG_VIDEO_OV13858 is not set -# CONFIG_VIDEO_VS6624 is not set -# CONFIG_VIDEO_MT9M001 is not set -# CONFIG_VIDEO_MT9M032 is not set -# CONFIG_VIDEO_MT9M111 is not set -# CONFIG_VIDEO_MT9P031 is not set -# CONFIG_VIDEO_MT9T001 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V032 is not set -# CONFIG_VIDEO_MT9V111 is not set -# CONFIG_VIDEO_SR030PC30 is not set -# CONFIG_VIDEO_NOON010PC30 is not set -# CONFIG_VIDEO_M5MOLS is not set -# CONFIG_VIDEO_RDACM20 is not set -# CONFIG_VIDEO_RJ54N1 is not set -# CONFIG_VIDEO_S5K6AA is not set -# CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_S5K4ECGX is not set -# CONFIG_VIDEO_S5K5BAF is not set -# CONFIG_VIDEO_SMIAPP is not set -# CONFIG_VIDEO_ET8EK8 is not set -# CONFIG_VIDEO_S5C73M3 is not set -# CONFIG_VIDEO_HM5065 is not set -CONFIG_VIDEO_GC2145=y -# end of Camera sensor devices - -# -# Lens drivers -# -# CONFIG_VIDEO_AD5820 is not set -# CONFIG_VIDEO_AK7375 is not set -# CONFIG_VIDEO_DW9714 is not set -# CONFIG_VIDEO_DW9768 is not set -# CONFIG_VIDEO_DW9807_VCM is not set -# end of Lens drivers - -# -# Flash devices -# -# CONFIG_VIDEO_ADP1653 is not set -# CONFIG_VIDEO_LM3560 is not set -# CONFIG_VIDEO_LM3646 is not set -# end of Flash devices - -# -# SPI helper chips -# -# CONFIG_VIDEO_GS1662 is not set -# end of SPI helper chips - -# -# Media SPI Adapters -# -# end of Media SPI Adapters -# end of Media ancillary drivers - -# -# Graphics support -# -CONFIG_DRM=y -CONFIG_DRM_MIPI_DSI=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DEBUG_MM is not set -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -# CONFIG_DRM_DP_CEC is not set -CONFIG_DRM_GEM_CMA_HELPER=y -CONFIG_DRM_KMS_CMA_HELPER=y -CONFIG_DRM_GEM_SHMEM_HELPER=y -CONFIG_DRM_SCHED=m - -# -# I2C encoder or helper chips -# -CONFIG_DRM_I2C_CH7006=m -CONFIG_DRM_I2C_SIL164=m -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - -# -# ARM devices -# -# CONFIG_DRM_HDLCD is not set -CONFIG_DRM_MALI_DISPLAY=m -# CONFIG_DRM_KOMEDA is not set -# end of ARM devices - -# CONFIG_DRM_VGEM is not set -# CONFIG_DRM_VKMS is not set -# CONFIG_DRM_UDL is not set -# CONFIG_DRM_RCAR_DW_HDMI is not set -CONFIG_DRM_RCAR_LVDS=y -CONFIG_DRM_RCAR_WRITEBACK=y -CONFIG_DRM_SUN4I=y -CONFIG_DRM_SUN4I_HDMI=y -# CONFIG_DRM_SUN4I_HDMI_CEC is not set -CONFIG_DRM_SUN4I_BACKEND=y -CONFIG_DRM_SUN6I_DSI=y -CONFIG_DRM_SUN8I_DW_HDMI=y -CONFIG_DRM_SUN8I_MIXER=y -CONFIG_DRM_SUN8I_TCON_TOP=y -CONFIG_DRM_PANEL=y - -# -# Display Panels -# -# CONFIG_DRM_PANEL_ARM_VERSATILE is not set -# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set -# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set -# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=m -# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set -CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m -CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m -# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set -# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set -# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set -# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set -# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set -# CONFIG_DRM_PANEL_LG_LB035Q02 is not set -# CONFIG_DRM_PANEL_LG_LG4573 is not set -# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set -# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set -# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set -# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set -# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set -# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set -# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set -# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set -# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set -CONFIG_DRM_PANEL_SITRONIX_ST7703=m -# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set -# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set -# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set -# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set -# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set -# CONFIG_DRM_PANEL_TPO_TPG110 is not set -# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set -# end of Display Panels - -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_PANEL_BRIDGE=y - -# -# Display Interface Bridges -# -# CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_CHRONTEL_CH7033 is not set -CONFIG_DRM_DISPLAY_CONNECTOR=m -# CONFIG_DRM_LVDS_CODEC is not set -# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set -# CONFIG_DRM_NWL_MIPI_DSI is not set -# CONFIG_DRM_NXP_PTN3460 is not set -# CONFIG_DRM_PARADE_PS8622 is not set -# CONFIG_DRM_PARADE_PS8640 is not set -# CONFIG_DRM_SIL_SII8620 is not set -# CONFIG_DRM_SII902X is not set -# CONFIG_DRM_SII9234 is not set -CONFIG_DRM_SIMPLE_BRIDGE=m -# CONFIG_DRM_THINE_THC63LVD1024 is not set -# CONFIG_DRM_TOSHIBA_TC358764 is not set -# CONFIG_DRM_TOSHIBA_TC358767 is not set -# CONFIG_DRM_TOSHIBA_TC358768 is not set -# CONFIG_DRM_TI_TFP410 is not set -# CONFIG_DRM_TI_SN65DSI86 is not set -# CONFIG_DRM_TI_TPD12S015 is not set -# CONFIG_DRM_ANALOGIX_ANX6345 is not set -# CONFIG_DRM_ANALOGIX_ANX78XX is not set -CONFIG_DRM_I2C_ADV7511=m -# CONFIG_DRM_I2C_ADV7511_AUDIO is not set -CONFIG_DRM_I2C_ADV7511_CEC=y -CONFIG_DRM_DW_HDMI=y -# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set -# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set -# CONFIG_DRM_DW_HDMI_CEC is not set -# end of Display Interface Bridges - -# CONFIG_DRM_ETNAVIV is not set -# CONFIG_DRM_ARCPGU is not set -# CONFIG_DRM_HISI_KIRIN is not set -# CONFIG_DRM_MXSFB is not set -# CONFIG_DRM_GM12U320 is not set -# CONFIG_TINYDRM_HX8357D is not set -# CONFIG_TINYDRM_ILI9225 is not set -# CONFIG_TINYDRM_ILI9341 is not set -# CONFIG_TINYDRM_ILI9486 is not set -# CONFIG_TINYDRM_MI0283QT is not set -# CONFIG_TINYDRM_REPAPER is not set -# CONFIG_TINYDRM_ST7586 is not set -# CONFIG_TINYDRM_ST7735R is not set -# CONFIG_DRM_PL111 is not set -# CONFIG_DRM_XEN is not set -CONFIG_DRM_LIMA=m -# CONFIG_DRM_PANFROST is not set -# CONFIG_DRM_TIDSS is not set -# CONFIG_DRM_LEGACY is not set -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y - -# -# Frame buffer Devices -# -CONFIG_FB_CMDLINE=y -CONFIG_FB_NOTIFY=y -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_IMAGEBLIT=y -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -CONFIG_FB_ARMCLCD=y -# CONFIG_FB_OPENCORES is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_SUN5I_EINK is not set -# CONFIG_FB_SMSCUFX is not set -CONFIG_FB_UDL=m -# CONFIG_FB_IBM_GXT4500 is not set -# CONFIG_FB_VIRTUAL is not set -CONFIG_XEN_FBDEV_FRONTEND=y -# CONFIG_FB_METRONOME is not set -CONFIG_FB_SIMPLE=y -# CONFIG_FB_SSD1307 is not set -# end of Frame buffer Devices - -# -# Backlight & LCD device support -# -CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_L4F00242T03 is not set -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_ILI922X is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -# CONFIG_LCD_PLATFORM is not set -# CONFIG_LCD_AMS369FG06 is not set -# CONFIG_LCD_LMS501KF03 is not set -# CONFIG_LCD_HX8357 is not set -# CONFIG_LCD_OTM3225A is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_PWM=y -# CONFIG_BACKLIGHT_QCOM_WLED is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_LM3630A is not set -# CONFIG_BACKLIGHT_LM3639 is not set -CONFIG_BACKLIGHT_LP855X=y -# CONFIG_BACKLIGHT_GPIO is not set -# CONFIG_BACKLIGHT_LV5207LP is not set -# CONFIG_BACKLIGHT_BD6107 is not set -# CONFIG_BACKLIGHT_ARCXCNN is not set -CONFIG_BACKLIGHT_LED=m -# end of Backlight & LCD device support - -CONFIG_VIDEOMODE_HELPERS=y -CONFIG_HDMI=y - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_DUMMY_CONSOLE_COLUMNS=80 -CONFIG_DUMMY_CONSOLE_ROWS=25 -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set -# end of Console display driver support - -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -# end of Graphics support - -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -CONFIG_SND_DMAENGINE_PCM=m -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -CONFIG_SND_JACK_INPUT_DEV=y -# CONFIG_SND_OSSEMUL is not set -CONFIG_SND_PCM_TIMER=y -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_PROC_FS=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_SEQUENCER is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_ALOOP=m -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# HD-Audio -# -# end of HD-Audio - -CONFIG_SND_HDA_PREALLOC_SIZE=64 -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y -# CONFIG_SND_USB_UA101 is not set -# CONFIG_SND_USB_CAIAQ is not set -# CONFIG_SND_USB_6FIRE is not set -# CONFIG_SND_USB_HIFACE is not set -# CONFIG_SND_BCD2000 is not set -# CONFIG_SND_USB_POD is not set -# CONFIG_SND_USB_PODHD is not set -# CONFIG_SND_USB_TONEPORT is not set -# CONFIG_SND_USB_VARIAX is not set -CONFIG_SND_SOC=m -CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y -# CONFIG_SND_SOC_AMD_ACP is not set -# CONFIG_SND_ATMEL_SOC is not set -# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set -# CONFIG_SND_DESIGNWARE_I2S is not set - -# -# SoC Audio for Freescale CPUs -# - -# -# Common SoC Audio options for Freescale CPUs: -# -# CONFIG_SND_SOC_FSL_ASRC is not set -# CONFIG_SND_SOC_FSL_SAI is not set -# CONFIG_SND_SOC_FSL_AUDMIX is not set -# CONFIG_SND_SOC_FSL_SSI is not set -# CONFIG_SND_SOC_FSL_SPDIF is not set -# CONFIG_SND_SOC_FSL_ESAI is not set -# CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_IMX_AUDMUX is not set -# end of SoC Audio for Freescale CPUs - -# CONFIG_SND_I2S_HI6210_I2S is not set -# CONFIG_SND_SOC_IMG is not set -# CONFIG_SND_SOC_INTEL_KEEMBAY is not set -# CONFIG_SND_SOC_MTK_BTCVSD is not set -# CONFIG_SND_SOC_SOF_TOPLEVEL is not set - -# -# STMicroelectronics STM32 SOC audio support -# -# end of STMicroelectronics STM32 SOC audio support - -# -# Allwinner SoC Audio support -# -CONFIG_SND_SUN4I_CODEC=m -CONFIG_SND_SUN8I_CODEC=m -CONFIG_SND_SUN8I_CODEC_ANALOG=m -CONFIG_SND_SUN50I_CODEC_ANALOG=m -CONFIG_SND_SUN4I_I2S=m -CONFIG_SND_SUN4I_SPDIF=m -CONFIG_SND_SUN8I_ADDA_PR_REGMAP=m -# end of Allwinner SoC Audio support - -# CONFIG_SND_SOC_XILINX_I2S is not set -# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set -# CONFIG_SND_SOC_XILINX_SPDIF is not set -# CONFIG_SND_SOC_XTFPGA_I2S is not set -# CONFIG_ZX_TDM is not set -CONFIG_SND_SOC_I2C_AND_SPI=m - -# -# CODEC drivers -# -# CONFIG_SND_SOC_AC97_CODEC is not set -# CONFIG_SND_SOC_ADAU1701 is not set -# CONFIG_SND_SOC_ADAU1761_I2C is not set -# CONFIG_SND_SOC_ADAU1761_SPI is not set -# CONFIG_SND_SOC_ADAU7002 is not set -# CONFIG_SND_SOC_ADAU7118_HW is not set -# CONFIG_SND_SOC_ADAU7118_I2C is not set -# CONFIG_SND_SOC_AK4104 is not set -# CONFIG_SND_SOC_AK4118 is not set -# CONFIG_SND_SOC_AK4458 is not set -# CONFIG_SND_SOC_AK4554 is not set -CONFIG_SND_SOC_AK4613=m -# CONFIG_SND_SOC_AK4642 is not set -# CONFIG_SND_SOC_AK5386 is not set -# CONFIG_SND_SOC_AK5558 is not set -# CONFIG_SND_SOC_ALC5623 is not set -# CONFIG_SND_SOC_BD28623 is not set -CONFIG_SND_SOC_BT_SCO=m -# CONFIG_SND_SOC_CROS_EC_CODEC is not set -# CONFIG_SND_SOC_CS35L32 is not set -# CONFIG_SND_SOC_CS35L33 is not set -# CONFIG_SND_SOC_CS35L34 is not set -# CONFIG_SND_SOC_CS35L35 is not set -# CONFIG_SND_SOC_CS35L36 is not set -# CONFIG_SND_SOC_CS42L42 is not set -# CONFIG_SND_SOC_CS42L51_I2C is not set -# CONFIG_SND_SOC_CS42L52 is not set -# CONFIG_SND_SOC_CS42L56 is not set -# CONFIG_SND_SOC_CS42L73 is not set -# CONFIG_SND_SOC_CS4265 is not set -# CONFIG_SND_SOC_CS4270 is not set -# CONFIG_SND_SOC_CS4271_I2C is not set -# CONFIG_SND_SOC_CS4271_SPI is not set -# CONFIG_SND_SOC_CS42XX8_I2C is not set -# CONFIG_SND_SOC_CS43130 is not set -# CONFIG_SND_SOC_CS4341 is not set -# CONFIG_SND_SOC_CS4349 is not set -# CONFIG_SND_SOC_CS53L30 is not set -# CONFIG_SND_SOC_CX2072X is not set -# CONFIG_SND_SOC_DA7213 is not set -CONFIG_SND_SOC_DMIC=m -CONFIG_SND_SOC_EC25=m -# CONFIG_SND_SOC_ES7134 is not set -# CONFIG_SND_SOC_ES7241 is not set -# CONFIG_SND_SOC_ES8316 is not set -# CONFIG_SND_SOC_ES8328_I2C is not set -# CONFIG_SND_SOC_ES8328_SPI is not set -# CONFIG_SND_SOC_GTM601 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set -# CONFIG_SND_SOC_MAX98088 is not set -CONFIG_SND_SOC_MAX98357A=m -# CONFIG_SND_SOC_MAX98504 is not set -# CONFIG_SND_SOC_MAX9867 is not set -# CONFIG_SND_SOC_MAX98927 is not set -# CONFIG_SND_SOC_MAX98373_I2C is not set -# CONFIG_SND_SOC_MAX98390 is not set -# CONFIG_SND_SOC_MAX9860 is not set -CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m -CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m -# CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM1789_I2C is not set -# CONFIG_SND_SOC_PCM179X_I2C is not set -# CONFIG_SND_SOC_PCM179X_SPI is not set -# CONFIG_SND_SOC_PCM186X_I2C is not set -# CONFIG_SND_SOC_PCM186X_SPI is not set -# CONFIG_SND_SOC_PCM3060_I2C is not set -# CONFIG_SND_SOC_PCM3060_SPI is not set -# CONFIG_SND_SOC_PCM3168A_I2C is not set -# CONFIG_SND_SOC_PCM3168A_SPI is not set -# CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_PCM512x_SPI is not set -# CONFIG_SND_SOC_RK3328 is not set -# CONFIG_SND_SOC_RT5616 is not set -# CONFIG_SND_SOC_RT5631 is not set -# CONFIG_SND_SOC_SGTL5000 is not set -CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m -# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set -# CONFIG_SND_SOC_SPDIF is not set -# CONFIG_SND_SOC_SSM2305 is not set -# CONFIG_SND_SOC_SSM2602_SPI is not set -# CONFIG_SND_SOC_SSM2602_I2C is not set -# CONFIG_SND_SOC_SSM4567 is not set -# CONFIG_SND_SOC_STA32X is not set -# CONFIG_SND_SOC_STA350 is not set -# CONFIG_SND_SOC_STI_SAS is not set -# CONFIG_SND_SOC_TAS2552 is not set -# CONFIG_SND_SOC_TAS2562 is not set -# CONFIG_SND_SOC_TAS2770 is not set -# CONFIG_SND_SOC_TAS5086 is not set -# CONFIG_SND_SOC_TAS571X is not set -# CONFIG_SND_SOC_TAS5720 is not set -# CONFIG_SND_SOC_TAS6424 is not set -# CONFIG_SND_SOC_TDA7419 is not set -# CONFIG_SND_SOC_TFA9879 is not set -# CONFIG_SND_SOC_TLV320AIC23_I2C is not set -# CONFIG_SND_SOC_TLV320AIC23_SPI is not set -# CONFIG_SND_SOC_TLV320AIC31XX is not set -# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set -# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set -# CONFIG_SND_SOC_TLV320AIC3X is not set -# CONFIG_SND_SOC_TLV320ADCX140 is not set -# CONFIG_SND_SOC_TS3A227E is not set -# CONFIG_SND_SOC_TSCS42XX is not set -# CONFIG_SND_SOC_TSCS454 is not set -# CONFIG_SND_SOC_UDA1334 is not set -# CONFIG_SND_SOC_WM8510 is not set -# CONFIG_SND_SOC_WM8523 is not set -# CONFIG_SND_SOC_WM8524 is not set -# CONFIG_SND_SOC_WM8580 is not set -# CONFIG_SND_SOC_WM8711 is not set -# CONFIG_SND_SOC_WM8728 is not set -# CONFIG_SND_SOC_WM8731 is not set -# CONFIG_SND_SOC_WM8737 is not set -# CONFIG_SND_SOC_WM8741 is not set -# CONFIG_SND_SOC_WM8750 is not set -# CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8770 is not set -# CONFIG_SND_SOC_WM8776 is not set -# CONFIG_SND_SOC_WM8782 is not set -# CONFIG_SND_SOC_WM8804_I2C is not set -# CONFIG_SND_SOC_WM8804_SPI is not set -# CONFIG_SND_SOC_WM8903 is not set -# CONFIG_SND_SOC_WM8904 is not set -# CONFIG_SND_SOC_WM8960 is not set -# CONFIG_SND_SOC_WM8962 is not set -# CONFIG_SND_SOC_WM8974 is not set -# CONFIG_SND_SOC_WM8978 is not set -# CONFIG_SND_SOC_WM8985 is not set -# CONFIG_SND_SOC_ZL38060 is not set -# CONFIG_SND_SOC_ZX_AUD96P22 is not set -# CONFIG_SND_SOC_MAX9759 is not set -# CONFIG_SND_SOC_MT6351 is not set -# CONFIG_SND_SOC_MT6358 is not set -# CONFIG_SND_SOC_MT6660 is not set -# CONFIG_SND_SOC_NAU8540 is not set -# CONFIG_SND_SOC_NAU8810 is not set -# CONFIG_SND_SOC_NAU8822 is not set -# CONFIG_SND_SOC_NAU8824 is not set -# CONFIG_SND_SOC_TPA6130A2 is not set -# end of CODEC drivers - -CONFIG_SND_SIMPLE_CARD_UTILS=m -CONFIG_SND_SIMPLE_CARD=m -CONFIG_SND_AUDIO_GRAPH_CARD=m -# CONFIG_SND_XEN_FRONTEND is not set - -# -# HID support -# -CONFIG_HID=y -CONFIG_HID_BATTERY_STRENGTH=y -CONFIG_HIDRAW=y -CONFIG_UHID=y -CONFIG_HID_GENERIC=y - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=y -# CONFIG_HID_ACCUTOUCH is not set -# CONFIG_HID_ACRUX is not set -CONFIG_HID_APPLE=y -# CONFIG_HID_APPLEIR is not set -# CONFIG_HID_ASUS is not set -# CONFIG_HID_AUREAL is not set -CONFIG_HID_BELKIN=y -# CONFIG_HID_BETOP_FF is not set -# CONFIG_HID_BIGBEN_FF is not set -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -# CONFIG_HID_CORSAIR is not set -# CONFIG_HID_COUGAR is not set -# CONFIG_HID_MACALLY is not set -# CONFIG_HID_PRODIKEYS is not set -# CONFIG_HID_CMEDIA is not set -# CONFIG_HID_CP2112 is not set -# CONFIG_HID_CREATIVE_SB0540 is not set -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_ELAN is not set -# CONFIG_HID_ELECOM is not set -# CONFIG_HID_ELO is not set -CONFIG_HID_EZKEY=y -# CONFIG_HID_GEMBIRD is not set -# CONFIG_HID_GFRM is not set -# CONFIG_HID_GLORIOUS is not set -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_GOOGLE_HAMMER is not set -# CONFIG_HID_GT683R is not set -# CONFIG_HID_KEYTOUCH is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_WALTOP is not set -# CONFIG_HID_VIEWSONIC is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_ICADE is not set -CONFIG_HID_ITE=y -# CONFIG_HID_JABRA is not set -# CONFIG_HID_TWINHAN is not set -CONFIG_HID_KENSINGTON=y -# CONFIG_HID_LCPOWER is not set -# CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set -CONFIG_HID_LOGITECH=y -CONFIG_HID_LOGITECH_DJ=y -CONFIG_HID_LOGITECH_HIDPP=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIWHEELS_FF is not set -CONFIG_HID_MAGICMOUSE=m -# CONFIG_HID_MALTRON is not set -# CONFIG_HID_MAYFLASH is not set -CONFIG_HID_REDRAGON=y -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -# CONFIG_HID_MULTITOUCH is not set -# CONFIG_HID_NTI is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_ORTEK is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PENMOUNT is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_PICOLCD is not set -# CONFIG_HID_PLANTRONICS is not set -# CONFIG_HID_PRIMAX is not set -# CONFIG_HID_RETRODE is not set -# CONFIG_HID_ROCCAT is not set -# CONFIG_HID_SAITEK is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SPEEDLINK is not set -# CONFIG_HID_STEAM is not set -# CONFIG_HID_STEELSERIES is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_RMI is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TIVO is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THINGM is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_UDRAW_PS3 is not set -# CONFIG_HID_U2FZERO is not set -CONFIG_HID_WACOM=m -# CONFIG_HID_WIIMOTE is not set -# CONFIG_HID_XINMO is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -# CONFIG_HID_SENSOR_HUB is not set -# CONFIG_HID_ALPS is not set -# CONFIG_HID_MCP2221 is not set -# end of Special HID drivers - -# -# USB HID support -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set -# end of USB HID support - -# -# I2C HID support -# -CONFIG_I2C_HID=m -# end of I2C HID support -# end of HID support - -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_COMMON=y -# CONFIG_USB_LED_TRIG is not set -CONFIG_USB_ULPI_BUS=y -# CONFIG_USB_CONN_GPIO is not set -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB=y -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEFAULT_PERSIST=y -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_PRODUCTLIST is not set -# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set -# CONFIG_USB_OTG_FSM is not set -# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set -CONFIG_USB_AUTOSUSPEND_DELAY=2 -# CONFIG_USB_MON is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_XHCI_HCD=y -# CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_EHCI_FSL is not set -CONFIG_USB_EHCI_HCD_PLATFORM=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_FOTG210_HCD is not set -# CONFIG_USB_MAX3421_HCD is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HCD_TEST_MODE is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -CONFIG_USB_WDM=m -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_REALTEK is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set -# CONFIG_USB_UAS is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USBIP_CORE is not set -# CONFIG_USB_CDNS3 is not set -CONFIG_USB_MUSB_HDRC=y -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_GADGET is not set -CONFIG_USB_MUSB_DUAL_ROLE=y - -# -# Platform Glue Layer -# -CONFIG_USB_MUSB_SUNXI=y - -# -# MUSB DMA mode -# -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_DWC3=y -# CONFIG_USB_DWC3_ULPI is not set -# CONFIG_USB_DWC3_HOST is not set -# CONFIG_USB_DWC3_GADGET is not set -CONFIG_USB_DWC3_DUAL_ROLE=y - -# -# Platform Glue Driver Support -# -CONFIG_USB_DWC3_OF_SIMPLE=y -CONFIG_USB_DWC2=y -# CONFIG_USB_DWC2_HOST is not set - -# -# Gadget/Dual-role mode requires USB Gadget support to be enabled -# -# CONFIG_USB_DWC2_PERIPHERAL is not set -CONFIG_USB_DWC2_DUAL_ROLE=y -# CONFIG_USB_DWC2_DEBUG is not set -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_MSM=y -CONFIG_USB_CHIPIDEA_IMX=y -CONFIG_USB_CHIPIDEA_GENERIC=y -CONFIG_USB_CHIPIDEA_TEGRA=y -CONFIG_USB_ISP1760=y -CONFIG_USB_ISP1760_HCD=y -CONFIG_USB_ISP1761_UDC=y -# CONFIG_USB_ISP1760_HOST_ROLE is not set -# CONFIG_USB_ISP1760_GADGET_ROLE is not set -CONFIG_USB_ISP1760_DUAL_ROLE=y - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_SIMPLE is not set -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -CONFIG_USB_SERIAL_CH341=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_CP210X is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_F81232 is not set -# CONFIG_USB_SERIAL_F8153X is not set -# CONFIG_USB_SERIAL_GARMIN is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_IUU is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_METRO is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_MXUPORT is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_OTI6858 is not set -# CONFIG_USB_SERIAL_QCAUX is not set -# CONFIG_USB_SERIAL_QUALCOMM is not set -# CONFIG_USB_SERIAL_SPCP8X5 is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -CONFIG_USB_SERIAL_WWAN=m -CONFIG_USB_SERIAL_OPTION=m -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_SERIAL_OPTICON is not set -# CONFIG_USB_SERIAL_XSENS_MT is not set -# CONFIG_USB_SERIAL_WISHBONE is not set -# CONFIG_USB_SERIAL_SSU100 is not set -# CONFIG_USB_SERIAL_QT2 is not set -# CONFIG_USB_SERIAL_UPD78F0730 is not set -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_APPLE_MFI_FASTCHARGE is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_EHSET_TEST_FIXTURE is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_YUREX is not set -# CONFIG_USB_EZUSB_FX2 is not set -# CONFIG_USB_HUB_USB251XB is not set -CONFIG_USB_HSIC_USB3503=y -# CONFIG_USB_HSIC_USB4604 is not set -# CONFIG_USB_LINK_LAYER_TEST is not set -# CONFIG_USB_CHAOSKEY is not set - -# -# USB Physical Layer drivers -# -CONFIG_USB_PHY=y -CONFIG_NOP_USB_XCEIV=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ISP1301 is not set -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_VIEWPORT=y -# end of USB Physical Layer drivers - -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 - -# -# USB Peripheral Controller -# -# CONFIG_USB_FOTG210_UDC is not set -# CONFIG_USB_GR_UDC is not set -# CONFIG_USB_R8A66597 is not set -# CONFIG_USB_PXA27X is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MV_U3D is not set -CONFIG_USB_SNP_CORE=y -CONFIG_USB_SNP_UDC_PLAT=y -# CONFIG_USB_M66592 is not set -CONFIG_USB_BDC_UDC=y - -# -# Platform Support -# -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_GADGET_XILINX is not set -# CONFIG_USB_MAX3420_UDC is not set -# CONFIG_USB_DUMMY_HCD is not set -# end of USB Peripheral Controller - -CONFIG_USB_LIBCOMPOSITE=y -CONFIG_USB_U_ETHER=y -CONFIG_USB_F_NCM=y -CONFIG_USB_F_ECM=y -CONFIG_USB_F_EEM=y -CONFIG_USB_F_SUBSET=y -CONFIG_USB_F_RNDIS=y -CONFIG_USB_F_MASS_STORAGE=y -CONFIG_USB_F_FS=y -CONFIG_USB_F_TCM=m -CONFIG_USB_CONFIGFS=y -# CONFIG_USB_CONFIGFS_SERIAL is not set -# CONFIG_USB_CONFIGFS_ACM is not set -# CONFIG_USB_CONFIGFS_OBEX is not set -CONFIG_USB_CONFIGFS_NCM=y -CONFIG_USB_CONFIGFS_ECM=y -# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set -CONFIG_USB_CONFIGFS_RNDIS=y -CONFIG_USB_CONFIGFS_EEM=y -CONFIG_USB_CONFIGFS_MASS_STORAGE=y -# CONFIG_USB_CONFIGFS_F_LB_SS is not set -# CONFIG_USB_CONFIGFS_F_FS is not set -# CONFIG_USB_CONFIGFS_F_UAC1 is not set -# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set -# CONFIG_USB_CONFIGFS_F_UAC2 is not set -# CONFIG_USB_CONFIGFS_F_MIDI is not set -# CONFIG_USB_CONFIGFS_F_HID is not set -# CONFIG_USB_CONFIGFS_F_UVC is not set -# CONFIG_USB_CONFIGFS_F_PRINTER is not set -CONFIG_USB_CONFIGFS_F_TCM=y - -# -# USB Gadget precomposed configurations -# -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_ETH is not set -# CONFIG_USB_G_NCM is not set -# CONFIG_USB_GADGETFS is not set -CONFIG_USB_FUNCTIONFS=y -CONFIG_USB_FUNCTIONFS_ETH=y -CONFIG_USB_FUNCTIONFS_RNDIS=y -CONFIG_USB_FUNCTIONFS_GENERIC=y -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_GADGET_TARGET is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_ACM_MS is not set -# CONFIG_USB_G_MULTI is not set -# CONFIG_USB_G_HID is not set -# CONFIG_USB_G_DBGP is not set -# CONFIG_USB_G_WEBCAM is not set -# CONFIG_USB_RAW_GADGET is not set -# end of USB Gadget precomposed configurations - -CONFIG_TYPEC=y -CONFIG_TYPEC_TCPM=m -CONFIG_TYPEC_TCPCI=m -# CONFIG_TYPEC_RT1711H is not set -CONFIG_TYPEC_FUSB302=m -CONFIG_TYPEC_UCSI=m -# CONFIG_UCSI_CCG is not set -CONFIG_TYPEC_ANX7688=m -# CONFIG_TYPEC_HD3SS3220 is not set -# CONFIG_TYPEC_TPS6598X is not set - -# -# USB Type-C Multiplexer/DeMultiplexer Switch support -# -# CONFIG_TYPEC_MUX_PI3USB30532 is not set -# end of USB Type-C Multiplexer/DeMultiplexer Switch support - -# -# USB Type-C Alternate Mode drivers -# -CONFIG_TYPEC_DP_ALTMODE=m -# CONFIG_TYPEC_NVIDIA_ALTMODE is not set -# end of USB Type-C Alternate Mode drivers - -CONFIG_USB_ROLE_SWITCH=y -CONFIG_MMC=y -CONFIG_PWRSEQ_EMMC=y -# CONFIG_PWRSEQ_SD8787 is not set -CONFIG_PWRSEQ_SIMPLE=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_ARMMMCI=y -CONFIG_MMC_STM32_SDMMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_OF_ARASAN=y -# CONFIG_MMC_SDHCI_OF_ASPEED is not set -# CONFIG_MMC_SDHCI_OF_AT91 is not set -# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set -CONFIG_MMC_SDHCI_CADENCE=y -CONFIG_MMC_SDHCI_F_SDH30=y -# CONFIG_MMC_SDHCI_MILBEAUT is not set -CONFIG_MMC_SPI=y -CONFIG_MMC_DW=y -CONFIG_MMC_DW_PLTFM=y -# CONFIG_MMC_DW_BLUEFIELD is not set -CONFIG_MMC_DW_EXYNOS=y -CONFIG_MMC_DW_HI3798CV200=y -CONFIG_MMC_DW_K3=y -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MMC_USDHI6ROL0 is not set -CONFIG_MMC_SUNXI=y -CONFIG_MMC_CQHCI=y -# CONFIG_MMC_HSQ is not set -# CONFIG_MMC_MTK is not set -CONFIG_MMC_SDHCI_XENON=y -# CONFIG_MMC_SDHCI_OMAP is not set -# CONFIG_MMC_SDHCI_AM654 is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_CLASS_FLASH=y -# CONFIG_LEDS_CLASS_MULTICOLOR is not set -CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y - -# -# LED drivers -# -# CONFIG_LEDS_AAT1290 is not set -# CONFIG_LEDS_AN30259A is not set -# CONFIG_LEDS_AS3645A is not set -# CONFIG_LEDS_AW2013 is not set -# CONFIG_LEDS_BCM6328 is not set -# CONFIG_LEDS_BCM6358 is not set -# CONFIG_LEDS_CR0014114 is not set -# CONFIG_LEDS_EL15203000 is not set -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM3532 is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_LM3692X is not set -# CONFIG_LEDS_LM3601X is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP55XX_COMMON is not set -# CONFIG_LEDS_LP8860 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -# CONFIG_LEDS_DAC124S085 is not set -CONFIG_LEDS_PWM=y -# CONFIG_LEDS_REGULATOR is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_TLC591XX is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_KTD2692 is not set -# CONFIG_LEDS_IS31FL319X is not set -# CONFIG_LEDS_IS31FL32XX is not set - -# -# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) -# -# CONFIG_LEDS_BLINKM is not set -CONFIG_LEDS_SYSCON=y -# CONFIG_LEDS_MLXREG is not set -# CONFIG_LEDS_USER is not set -# CONFIG_LEDS_SPI_BYTE is not set -# CONFIG_LEDS_TI_LMU_COMMON is not set -CONFIG_LEDS_SGM3140=m -CONFIG_LEDS_AXP20X=m - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_TIMER is not set -# CONFIG_LEDS_TRIGGER_ONESHOT is not set -CONFIG_LEDS_TRIGGER_DISK=y -# CONFIG_LEDS_TRIGGER_MTD is not set -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -CONFIG_LEDS_TRIGGER_CPU=y -# CONFIG_LEDS_TRIGGER_ACTIVITY is not set -# CONFIG_LEDS_TRIGGER_GPIO is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_LEDS_TRIGGER_TRANSIENT is not set -# CONFIG_LEDS_TRIGGER_CAMERA is not set -CONFIG_LEDS_TRIGGER_PANIC=y -# CONFIG_LEDS_TRIGGER_NETDEV is not set -CONFIG_LEDS_TRIGGER_PATTERN=y -# CONFIG_LEDS_TRIGGER_AUDIO is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_INFINIBAND is not set -CONFIG_EDAC_SUPPORT=y -CONFIG_EDAC=y -CONFIG_EDAC_LEGACY_SYSFS=y -# CONFIG_EDAC_DEBUG is not set -# CONFIG_EDAC_XGENE is not set -# CONFIG_EDAC_DMC520 is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -CONFIG_RTC_SYSTOHC=y -CONFIG_RTC_SYSTOHC_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set -CONFIG_RTC_NVMEM=y - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_ABB5ZES3 is not set -# CONFIG_RTC_DRV_ABEOZ9 is not set -# CONFIG_RTC_DRV_ABX80X is not set -# CONFIG_RTC_DRV_AC100 is not set -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_HYM8563 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -CONFIG_RTC_DRV_MAX77686=y -CONFIG_RTC_DRV_RK808=m -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_ISL12026 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8523 is not set -# CONFIG_RTC_DRV_PCF85063 is not set -# CONFIG_RTC_DRV_PCF85363 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8010 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_RV3028 is not set -# CONFIG_RTC_DRV_RV8803 is not set -CONFIG_RTC_DRV_S5M=y -# CONFIG_RTC_DRV_SD3078 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T93 is not set -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1302 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1343 is not set -# CONFIG_RTC_DRV_DS1347 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6916 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RX4581 is not set -# CONFIG_RTC_DRV_RX6110 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_PCF2123 is not set -# CONFIG_RTC_DRV_MCP795 is not set -CONFIG_RTC_I2C_AND_SPI=y - -# -# SPI and I2C RTC drivers -# -CONFIG_RTC_DRV_DS3232=y -CONFIG_RTC_DRV_DS3232_HWMON=y -# CONFIG_RTC_DRV_PCF2127 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1685_FAMILY is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_DS2404 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set -# CONFIG_RTC_DRV_ZYNQMP is not set -# CONFIG_RTC_DRV_CROS_EC is not set - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_PL030 is not set -CONFIG_RTC_DRV_PL031=y -CONFIG_RTC_DRV_SUN6I=y -# CONFIG_RTC_DRV_CADENCE is not set -# CONFIG_RTC_DRV_FTRTC010 is not set -# CONFIG_RTC_DRV_R7301 is not set - -# -# HID Sensor RTC drivers -# -CONFIG_DMADEVICES=y -# CONFIG_DMADEVICES_DEBUG is not set - -# -# DMA Devices -# -CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DMA_OF=y -# CONFIG_ALTERA_MSGDMA is not set -# CONFIG_AMBA_PL08X is not set -CONFIG_BCM_SBA_RAID=m -CONFIG_DMA_SUN6I=y -# CONFIG_DW_AXI_DMAC is not set -# CONFIG_FSL_EDMA is not set -# CONFIG_FSL_QDMA is not set -# CONFIG_INTEL_IDMA64 is not set -CONFIG_MV_XOR_V2=y -CONFIG_PL330_DMA=y -# CONFIG_XILINX_DMA is not set -# CONFIG_XILINX_ZYNQMP_DMA is not set -# CONFIG_XILINX_ZYNQMP_DPDMA is not set -CONFIG_QCOM_HIDMA_MGMT=y -CONFIG_QCOM_HIDMA=y -# CONFIG_DW_DMAC is not set -# CONFIG_SF_PDMA is not set - -# -# DMA Clients -# -# CONFIG_ASYNC_TX_DMA is not set -# CONFIG_DMATEST is not set -CONFIG_DMA_ENGINE_RAID=y - -# -# DMABUF options -# -CONFIG_SYNC_FILE=y -# CONFIG_SW_SYNC is not set -# CONFIG_UDMABUF is not set -# CONFIG_DMABUF_MOVE_NOTIFY is not set -# CONFIG_DMABUF_SELFTESTS is not set -# CONFIG_DMABUF_HEAPS is not set -# end of DMABUF options - -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set -CONFIG_VFIO_IOMMU_TYPE1=y -CONFIG_VFIO=y -# CONFIG_VFIO_NOIOMMU is not set -# CONFIG_VFIO_PLATFORM is not set -# CONFIG_VFIO_MDEV is not set -# CONFIG_VIRT_DRIVERS is not set -# CONFIG_VIRTIO_MENU is not set -# CONFIG_VDPA is not set -CONFIG_VHOST_IOTLB=m -CONFIG_VHOST=m -CONFIG_VHOST_MENU=y -CONFIG_VHOST_NET=m -# CONFIG_VHOST_SCSI is not set -CONFIG_VHOST_VSOCK=m -# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set - -# -# Microsoft Hyper-V guest support -# -# end of Microsoft Hyper-V guest support - -# -# Xen driver support -# -# CONFIG_XEN_BALLOON is not set -# CONFIG_XEN_DEV_EVTCHN is not set -# CONFIG_XEN_BACKEND is not set -# CONFIG_XENFS is not set -# CONFIG_XEN_SYS_HYPERVISOR is not set -CONFIG_XEN_XENBUS_FRONTEND=y -# CONFIG_XEN_GNTDEV is not set -# CONFIG_XEN_GRANT_DEV_ALLOC is not set -# CONFIG_XEN_GRANT_DMA_ALLOC is not set -CONFIG_SWIOTLB_XEN=y -# CONFIG_XEN_PVCALLS_FRONTEND is not set -CONFIG_XEN_PRIVCMD=m -CONFIG_XEN_AUTO_XLATE=y -# end of Xen driver support - -# CONFIG_GREYBUS is not set -CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_COMEDI is not set -# CONFIG_RTLLIB is not set -CONFIG_RTL8723BS=m -# CONFIG_R8712U is not set -# CONFIG_R8188EU is not set -# CONFIG_VT6656 is not set - -# -# IIO staging drivers -# - -# -# Accelerometers -# -# CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set -# end of Accelerometers - -# -# Analog to digital converters -# -# CONFIG_AD7816 is not set -# CONFIG_AD7280 is not set -# end of Analog to digital converters - -# -# Analog digital bi-direction converters -# -# CONFIG_ADT7316 is not set -# end of Analog digital bi-direction converters - -# -# Capacitance to digital converters -# -# CONFIG_AD7150 is not set -# CONFIG_AD7746 is not set -# end of Capacitance to digital converters - -# -# Direct Digital Synthesis -# -# CONFIG_AD9832 is not set -# CONFIG_AD9834 is not set -# end of Direct Digital Synthesis - -# -# Network Analyzer, Impedance Converters -# -# CONFIG_AD5933 is not set -# end of Network Analyzer, Impedance Converters - -# -# Active energy metering IC -# -# CONFIG_ADE7854 is not set -# end of Active energy metering IC - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters -# end of IIO staging drivers - -CONFIG_STAGING_MEDIA=y -CONFIG_VIDEO_SUNXI=y -CONFIG_VIDEO_SUNXI_CEDRUS=y - -# -# Android -# -CONFIG_ASHMEM=y -# CONFIG_ION is not set -# end of Android - -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_GS_FPGABOOT is not set -# CONFIG_UNISYSSPAR is not set -# CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set - -# -# Gasket devices -# -# end of Gasket devices - -# CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set -# CONFIG_WFX is not set -CONFIG_RTL8723CS_NEW=m -# CONFIG_GOLDFISH is not set -CONFIG_MFD_CROS_EC=y -CONFIG_CHROME_PLATFORMS=y -CONFIG_CROS_EC=y -# CONFIG_CROS_EC_I2C is not set -# CONFIG_CROS_EC_RPMSG is not set -# CONFIG_CROS_EC_SPI is not set -CONFIG_CROS_EC_PROTO=y -CONFIG_CROS_EC_CHARDEV=y -CONFIG_CROS_EC_LIGHTBAR=y -CONFIG_CROS_EC_VBC=y -CONFIG_CROS_EC_DEBUGFS=y -CONFIG_CROS_EC_SENSORHUB=y -CONFIG_CROS_EC_SYSFS=y -CONFIG_CROS_EC_TYPEC=y -CONFIG_CROS_USBPD_NOTIFY=y -# CONFIG_MELLANOX_PLATFORM is not set -CONFIG_HAVE_CLK=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_COMMON_CLK=y -# CONFIG_CLK_HSDK is not set -# CONFIG_COMMON_CLK_MAX77686 is not set -# CONFIG_COMMON_CLK_MAX9485 is not set -CONFIG_COMMON_CLK_RK808=y -CONFIG_COMMON_CLK_SCPI=y -# CONFIG_COMMON_CLK_SI5341 is not set -# CONFIG_COMMON_CLK_SI5351 is not set -# CONFIG_COMMON_CLK_SI514 is not set -# CONFIG_COMMON_CLK_SI544 is not set -# CONFIG_COMMON_CLK_SI570 is not set -# CONFIG_COMMON_CLK_CDCE706 is not set -# CONFIG_COMMON_CLK_CDCE925 is not set -CONFIG_COMMON_CLK_CS2000_CP=y -CONFIG_COMMON_CLK_S2MPS11=y -CONFIG_CLK_QORIQ=y -CONFIG_COMMON_CLK_XGENE=y -CONFIG_COMMON_CLK_PWM=y -# CONFIG_COMMON_CLK_VC5 is not set -# CONFIG_COMMON_CLK_FIXED_MMIO is not set -CONFIG_CLK_SUNXI=y -CONFIG_CLK_SUNXI_CLOCKS=y -CONFIG_CLK_SUNXI_PRCM_SUN6I=y -CONFIG_CLK_SUNXI_PRCM_SUN8I=y -CONFIG_CLK_SUNXI_PRCM_SUN9I=y -CONFIG_SUNXI_CCU=y -CONFIG_SUN50I_A64_CCU=y -CONFIG_SUN50I_H6_CCU=y -CONFIG_SUN50I_H6_R_CCU=y -# CONFIG_SUN8I_A83T_CCU is not set -CONFIG_SUN8I_H3_CCU=y -CONFIG_SUN8I_DE2_CCU=y -CONFIG_SUN8I_R_CCU=y -CONFIG_HWSPINLOCK=y - -# -# Clock Source drivers -# -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_FSL_ERRATUM_A008585=y -CONFIG_HISILICON_ERRATUM_161010101=y -CONFIG_ARM64_ERRATUM_858921=y -CONFIG_SUN50I_ERRATUM_UNKNOWN1=y -# CONFIG_MICROCHIP_PIT64B is not set -# end of Clock Source drivers - -CONFIG_MAILBOX=y -CONFIG_ARM_MHU=y -CONFIG_PLATFORM_MHU=y -# CONFIG_PL320_MBOX is not set -# CONFIG_ALTERA_MBOX is not set -# CONFIG_MAILBOX_TEST is not set -CONFIG_SUN6I_MSGBOX=y -CONFIG_IOMMU_IOVA=y -CONFIG_IOMMU_API=y -CONFIG_IOMMU_SUPPORT=y - -# -# Generic IOMMU Pagetable Support -# -CONFIG_IOMMU_IO_PGTABLE=y -CONFIG_IOMMU_IO_PGTABLE_LPAE=y -# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# end of Generic IOMMU Pagetable Support - -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -CONFIG_OF_IOMMU=y -CONFIG_IOMMU_DMA=y -# CONFIG_SUN50I_IOMMU is not set -CONFIG_ARM_SMMU=y -# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set -CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y -CONFIG_ARM_SMMU_V3=y - -# -# Remoteproc drivers -# -# CONFIG_REMOTEPROC is not set -# end of Remoteproc drivers - -# -# Rpmsg drivers -# -CONFIG_RPMSG=y -# CONFIG_RPMSG_CHAR is not set -CONFIG_RPMSG_QCOM_GLINK=y -CONFIG_RPMSG_QCOM_GLINK_RPM=y -# CONFIG_RPMSG_VIRTIO is not set -# end of Rpmsg drivers - -# CONFIG_SOUNDWIRE is not set - -# -# SOC (System On Chip) specific Drivers -# - -# -# Amlogic SoC drivers -# -# end of Amlogic SoC drivers - -# -# Aspeed SoC drivers -# -# end of Aspeed SoC drivers - -# -# Broadcom SoC drivers -# -CONFIG_SOC_BRCMSTB=y -# end of Broadcom SoC drivers - -# -# NXP/Freescale QorIQ SoC drivers -# -# CONFIG_QUICC_ENGINE is not set -# CONFIG_FSL_RCPM is not set -# end of NXP/Freescale QorIQ SoC drivers - -# -# i.MX SoC drivers -# -# end of i.MX SoC drivers - -# -# Qualcomm SoC drivers -# -# end of Qualcomm SoC drivers - -CONFIG_SUNXI_SRAM=y -CONFIG_SOC_TI=y - -# -# Xilinx SoC drivers -# -# CONFIG_XILINX_VCU is not set -# end of Xilinx SoC drivers -# end of SOC (System On Chip) specific Drivers - -CONFIG_PM_DEVFREQ=y - -# -# DEVFREQ Governors -# -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set -# CONFIG_DEVFREQ_GOV_POWERSAVE is not set -# CONFIG_DEVFREQ_GOV_USERSPACE is not set -# CONFIG_DEVFREQ_GOV_PASSIVE is not set - -# -# DEVFREQ Drivers -# -# CONFIG_PM_DEVFREQ_EVENT is not set -CONFIG_EXTCON=y - -# -# Extcon Device Drivers -# -# CONFIG_EXTCON_ADC_JACK is not set -# CONFIG_EXTCON_FSA9480 is not set -# CONFIG_EXTCON_GPIO is not set -# CONFIG_EXTCON_MAX3355 is not set -# CONFIG_EXTCON_PTN5150 is not set -# CONFIG_EXTCON_RT8973A is not set -# CONFIG_EXTCON_SM5502 is not set -CONFIG_EXTCON_USB_GPIO=y -# CONFIG_EXTCON_USBC_CROS_EC is not set -CONFIG_MEMORY=y -# CONFIG_ARM_PL172_MPMC is not set -CONFIG_IIO=y -CONFIG_IIO_BUFFER=y -# CONFIG_IIO_BUFFER_CB is not set -# CONFIG_IIO_BUFFER_HW_CONSUMER is not set -CONFIG_IIO_KFIFO_BUF=m -CONFIG_IIO_TRIGGERED_BUFFER=m -# CONFIG_IIO_CONFIGFS is not set -CONFIG_IIO_TRIGGER=y -CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 -# CONFIG_IIO_SW_DEVICE is not set -# CONFIG_IIO_SW_TRIGGER is not set - -# -# Accelerometers -# -# CONFIG_ADIS16201 is not set -# CONFIG_ADIS16209 is not set -# CONFIG_ADXL345_I2C is not set -# CONFIG_ADXL345_SPI is not set -# CONFIG_ADXL372_SPI is not set -# CONFIG_ADXL372_I2C is not set -CONFIG_BMA220=m -# CONFIG_BMA400 is not set -CONFIG_BMC150_ACCEL=m -CONFIG_BMC150_ACCEL_I2C=m -CONFIG_BMC150_ACCEL_SPI=m -# CONFIG_DA280 is not set -# CONFIG_DA311 is not set -# CONFIG_DMARD06 is not set -# CONFIG_DMARD09 is not set -# CONFIG_DMARD10 is not set -CONFIG_IIO_ST_ACCEL_3AXIS=m -CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m -CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m -# CONFIG_KXSD9 is not set -# CONFIG_KXCJK1013 is not set -# CONFIG_MC3230 is not set -# CONFIG_MMA7455_I2C is not set -# CONFIG_MMA7455_SPI is not set -# CONFIG_MMA7660 is not set -# CONFIG_MMA8452 is not set -# CONFIG_MMA9551 is not set -# CONFIG_MMA9553 is not set -# CONFIG_MXC4005 is not set -# CONFIG_MXC6255 is not set -# CONFIG_SCA3000 is not set -CONFIG_STK8312=m -CONFIG_STK8BA50=m -# end of Accelerometers - -# -# Analog to digital converters -# -# CONFIG_AD7091R5 is not set -# CONFIG_AD7124 is not set -# CONFIG_AD7192 is not set -# CONFIG_AD7266 is not set -# CONFIG_AD7291 is not set -# CONFIG_AD7292 is not set -# CONFIG_AD7298 is not set -# CONFIG_AD7476 is not set -# CONFIG_AD7606_IFACE_PARALLEL is not set -# CONFIG_AD7606_IFACE_SPI is not set -# CONFIG_AD7766 is not set -# CONFIG_AD7768_1 is not set -# CONFIG_AD7780 is not set -# CONFIG_AD7791 is not set -# CONFIG_AD7793 is not set -# CONFIG_AD7887 is not set -# CONFIG_AD7923 is not set -# CONFIG_AD7949 is not set -# CONFIG_AD799X is not set -# CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set -CONFIG_AXP20X_ADC=y -# CONFIG_AXP288_ADC is not set -# CONFIG_CC10001_ADC is not set -# CONFIG_ENVELOPE_DETECTOR is not set -# CONFIG_HI8435 is not set -# CONFIG_HX711 is not set -# CONFIG_INA2XX_ADC is not set -# CONFIG_LTC2471 is not set -# CONFIG_LTC2485 is not set -# CONFIG_LTC2496 is not set -# CONFIG_LTC2497 is not set -# CONFIG_MAX1027 is not set -# CONFIG_MAX11100 is not set -# CONFIG_MAX1118 is not set -# CONFIG_MAX1241 is not set -# CONFIG_MAX1363 is not set -# CONFIG_MAX9611 is not set -# CONFIG_MCP320X is not set -# CONFIG_MCP3422 is not set -# CONFIG_MCP3911 is not set -# CONFIG_NAU7802 is not set -# CONFIG_QCOM_SPMI_IADC is not set -# CONFIG_QCOM_SPMI_VADC is not set -# CONFIG_QCOM_SPMI_ADC5 is not set -# CONFIG_SD_ADC_MODULATOR is not set -# CONFIG_TI_ADC081C is not set -# CONFIG_TI_ADC0832 is not set -# CONFIG_TI_ADC084S021 is not set -# CONFIG_TI_ADC12138 is not set -# CONFIG_TI_ADC108S102 is not set -# CONFIG_TI_ADC128S052 is not set -# CONFIG_TI_ADC161S626 is not set -# CONFIG_TI_ADS1015 is not set -# CONFIG_TI_ADS7950 is not set -# CONFIG_TI_ADS8344 is not set -# CONFIG_TI_ADS8688 is not set -# CONFIG_TI_ADS124S08 is not set -# CONFIG_TI_TLC4541 is not set -# CONFIG_VF610_ADC is not set -# CONFIG_XILINX_XADC is not set -# end of Analog to digital converters - -# -# Analog Front Ends -# -# CONFIG_IIO_RESCALE is not set -# end of Analog Front Ends - -# -# Amplifiers -# -# CONFIG_AD8366 is not set -# CONFIG_HMC425 is not set -# end of Amplifiers - -# -# Chemical Sensors -# -# CONFIG_ATLAS_PH_SENSOR is not set -# CONFIG_ATLAS_EZO_SENSOR is not set -# CONFIG_BME680 is not set -# CONFIG_CCS811 is not set -# CONFIG_IAQCORE is not set -# CONFIG_PMS7003 is not set -# CONFIG_SCD30_CORE is not set -# CONFIG_SENSIRION_SGP30 is not set -# CONFIG_SPS30 is not set -# CONFIG_VZ89X is not set -# end of Chemical Sensors - -# CONFIG_IIO_CROS_EC_SENSORS_CORE is not set - -# -# Hid Sensor IIO Common -# -# end of Hid Sensor IIO Common - -# -# SSP Sensor Common -# -# CONFIG_IIO_SSP_SENSORHUB is not set -# end of SSP Sensor Common - -CONFIG_IIO_ST_SENSORS_I2C=m -CONFIG_IIO_ST_SENSORS_SPI=m -CONFIG_IIO_ST_SENSORS_CORE=m - -# -# Digital to analog converters -# -# CONFIG_AD5064 is not set -# CONFIG_AD5360 is not set -# CONFIG_AD5380 is not set -# CONFIG_AD5421 is not set -# CONFIG_AD5446 is not set -# CONFIG_AD5449 is not set -# CONFIG_AD5592R is not set -# CONFIG_AD5593R is not set -# CONFIG_AD5504 is not set -# CONFIG_AD5624R_SPI is not set -# CONFIG_AD5686_SPI is not set -# CONFIG_AD5696_I2C is not set -# CONFIG_AD5755 is not set -# CONFIG_AD5758 is not set -# CONFIG_AD5761 is not set -# CONFIG_AD5764 is not set -# CONFIG_AD5770R is not set -# CONFIG_AD5791 is not set -# CONFIG_AD7303 is not set -# CONFIG_AD8801 is not set -# CONFIG_DPOT_DAC is not set -# CONFIG_DS4424 is not set -# CONFIG_LTC1660 is not set -# CONFIG_LTC2632 is not set -# CONFIG_M62332 is not set -# CONFIG_MAX517 is not set -# CONFIG_MAX5821 is not set -# CONFIG_MCP4725 is not set -# CONFIG_MCP4922 is not set -# CONFIG_TI_DAC082S085 is not set -# CONFIG_TI_DAC5571 is not set -# CONFIG_TI_DAC7311 is not set -# CONFIG_TI_DAC7612 is not set -# CONFIG_VF610_DAC is not set -# end of Digital to analog converters - -# -# IIO dummy driver -# -# end of IIO dummy driver - -# -# Frequency Synthesizers DDS/PLL -# - -# -# Clock Generator/Distribution -# -# CONFIG_AD9523 is not set -# end of Clock Generator/Distribution - -# -# Phase-Locked Loop (PLL) frequency synthesizers -# -# CONFIG_ADF4350 is not set -# CONFIG_ADF4371 is not set -# end of Phase-Locked Loop (PLL) frequency synthesizers -# end of Frequency Synthesizers DDS/PLL - -# -# Digital gyroscope sensors -# -# CONFIG_ADIS16080 is not set -# CONFIG_ADIS16130 is not set -# CONFIG_ADIS16136 is not set -# CONFIG_ADIS16260 is not set -# CONFIG_ADXRS450 is not set -# CONFIG_BMG160 is not set -# CONFIG_FXAS21002C is not set -# CONFIG_MPU3050_I2C is not set -# CONFIG_IIO_ST_GYRO_3AXIS is not set -# CONFIG_ITG3200 is not set -# end of Digital gyroscope sensors - -# -# Health Sensors -# - -# -# Heart Rate Monitors -# -# CONFIG_AFE4403 is not set -# CONFIG_AFE4404 is not set -# CONFIG_MAX30100 is not set -# CONFIG_MAX30102 is not set -# end of Heart Rate Monitors -# end of Health Sensors - -# -# Humidity sensors -# -# CONFIG_AM2315 is not set -# CONFIG_DHT11 is not set -# CONFIG_HDC100X is not set -# CONFIG_HTS221 is not set -# CONFIG_HTU21 is not set -# CONFIG_SI7005 is not set -# CONFIG_SI7020 is not set -# end of Humidity sensors - -# -# Inertial measurement units -# -# CONFIG_ADIS16400 is not set -# CONFIG_ADIS16460 is not set -# CONFIG_ADIS16475 is not set -# CONFIG_ADIS16480 is not set -# CONFIG_BMI160_I2C is not set -# CONFIG_BMI160_SPI is not set -# CONFIG_FXOS8700_I2C is not set -# CONFIG_FXOS8700_SPI is not set -# CONFIG_KMX61 is not set -# CONFIG_INV_ICM42600_I2C is not set -# CONFIG_INV_ICM42600_SPI is not set -CONFIG_INV_MPU6050_IIO=m -CONFIG_INV_MPU6050_I2C=m -# CONFIG_INV_MPU6050_SPI is not set -# CONFIG_IIO_ST_LSM6DSX is not set -# end of Inertial measurement units - -# -# Light sensors -# -# CONFIG_ADJD_S311 is not set -# CONFIG_ADUX1020 is not set -# CONFIG_AL3010 is not set -# CONFIG_AL3320A is not set -# CONFIG_APDS9300 is not set -# CONFIG_APDS9960 is not set -# CONFIG_BH1750 is not set -# CONFIG_BH1780 is not set -# CONFIG_CM32181 is not set -# CONFIG_CM3232 is not set -# CONFIG_CM3323 is not set -# CONFIG_CM3605 is not set -# CONFIG_CM36651 is not set -# CONFIG_GP2AP002 is not set -# CONFIG_GP2AP020A00F is not set -# CONFIG_SENSORS_ISL29018 is not set -# CONFIG_SENSORS_ISL29028 is not set -# CONFIG_ISL29125 is not set -# CONFIG_JSA1212 is not set -# CONFIG_RPR0521 is not set -# CONFIG_LTR501 is not set -# CONFIG_LV0104CS is not set -# CONFIG_MAX44000 is not set -# CONFIG_MAX44009 is not set -# CONFIG_NOA1305 is not set -# CONFIG_OPT3001 is not set -# CONFIG_PA12203001 is not set -# CONFIG_SI1133 is not set -# CONFIG_SI1145 is not set -CONFIG_STK3310=m -# CONFIG_ST_UVIS25 is not set -# CONFIG_TCS3414 is not set -# CONFIG_TCS3472 is not set -# CONFIG_SENSORS_TSL2563 is not set -# CONFIG_TSL2583 is not set -# CONFIG_TSL2772 is not set -# CONFIG_TSL4531 is not set -# CONFIG_US5182D is not set -# CONFIG_VCNL4000 is not set -# CONFIG_VCNL4035 is not set -# CONFIG_VEML6030 is not set -# CONFIG_VEML6070 is not set -# CONFIG_VL6180 is not set -# CONFIG_ZOPT2201 is not set -# end of Light sensors - -# -# Magnetometer sensors -# -# CONFIG_AK8974 is not set -# CONFIG_AK8975 is not set -# CONFIG_AK09911 is not set -# CONFIG_BMC150_MAGN_I2C is not set -# CONFIG_BMC150_MAGN_SPI is not set -# CONFIG_MAG3110 is not set -# CONFIG_MMC35240 is not set -CONFIG_IIO_ST_MAGN_3AXIS=m -CONFIG_IIO_ST_MAGN_I2C_3AXIS=m -CONFIG_IIO_ST_MAGN_SPI_3AXIS=m -# CONFIG_SENSORS_HMC5843_I2C is not set -# CONFIG_SENSORS_HMC5843_SPI is not set -# CONFIG_SENSORS_RM3100_I2C is not set -# CONFIG_SENSORS_RM3100_SPI is not set -# end of Magnetometer sensors - -# -# Multiplexers -# -# CONFIG_IIO_MUX is not set -# end of Multiplexers - -# -# Inclinometer sensors -# -# end of Inclinometer sensors - -# -# Triggers - standalone -# -# CONFIG_IIO_INTERRUPT_TRIGGER is not set -# CONFIG_IIO_SYSFS_TRIGGER is not set -# end of Triggers - standalone - -# -# Linear and angular position sensors -# -# end of Linear and angular position sensors - -# -# Digital potentiometers -# -# CONFIG_AD5272 is not set -# CONFIG_DS1803 is not set -# CONFIG_MAX5432 is not set -# CONFIG_MAX5481 is not set -# CONFIG_MAX5487 is not set -# CONFIG_MCP4018 is not set -# CONFIG_MCP4131 is not set -# CONFIG_MCP4531 is not set -# CONFIG_MCP41010 is not set -# CONFIG_TPL0102 is not set -# end of Digital potentiometers - -# -# Digital potentiostats -# -# CONFIG_LMP91000 is not set -# end of Digital potentiostats - -# -# Pressure sensors -# -# CONFIG_ABP060MG is not set -# CONFIG_BMP280 is not set -# CONFIG_DLHL60D is not set -# CONFIG_DPS310 is not set -# CONFIG_HP03 is not set -# CONFIG_ICP10100 is not set -# CONFIG_MPL115_I2C is not set -# CONFIG_MPL115_SPI is not set -# CONFIG_MPL3115 is not set -# CONFIG_MS5611 is not set -# CONFIG_MS5637 is not set -CONFIG_IIO_ST_PRESS=m -CONFIG_IIO_ST_PRESS_I2C=m -CONFIG_IIO_ST_PRESS_SPI=m -# CONFIG_T5403 is not set -# CONFIG_HP206C is not set -# CONFIG_ZPA2326 is not set -# end of Pressure sensors - -# -# Lightning sensors -# -# CONFIG_AS3935 is not set -# end of Lightning sensors - -# -# Proximity and distance sensors -# -# CONFIG_ISL29501 is not set -# CONFIG_LIDAR_LITE_V2 is not set -# CONFIG_MB1232 is not set -# CONFIG_PING is not set -# CONFIG_RFD77402 is not set -# CONFIG_SRF04 is not set -# CONFIG_SX9310 is not set -# CONFIG_SX9500 is not set -# CONFIG_SRF08 is not set -# CONFIG_VCNL3020 is not set -# CONFIG_VL53L0X_I2C is not set -# end of Proximity and distance sensors - -# -# Resolver to digital converters -# -# CONFIG_AD2S90 is not set -# CONFIG_AD2S1200 is not set -# end of Resolver to digital converters - -# -# Temperature sensors -# -# CONFIG_LTC2983 is not set -# CONFIG_MAXIM_THERMOCOUPLE is not set -# CONFIG_MLX90614 is not set -# CONFIG_MLX90632 is not set -# CONFIG_TMP006 is not set -# CONFIG_TMP007 is not set -# CONFIG_TSYS01 is not set -# CONFIG_TSYS02D is not set -# CONFIG_MAX31856 is not set -# end of Temperature sensors - -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -# CONFIG_PWM_CROS_EC is not set -# CONFIG_PWM_FSL_FTM is not set -# CONFIG_PWM_PCA9685 is not set -CONFIG_PWM_SUN4I=y - -# -# IRQ chip support -# -CONFIG_IRQCHIP=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_MAX_NR=1 -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -# CONFIG_AL_FIC is not set -CONFIG_PARTITION_PERCPU=y -# end of IRQ chip support - -# CONFIG_IPACK_BUS is not set -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_RESET_CONTROLLER=y -# CONFIG_RESET_BRCMSTB_RESCAL is not set -# CONFIG_RESET_INTEL_GW is not set -CONFIG_RESET_SIMPLE=y -CONFIG_RESET_SUNXI=y -# CONFIG_RESET_TI_SYSCON is not set - -# -# PHY Subsystem -# -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PHY_MIPI_DPHY=y -CONFIG_PHY_XGENE=y -CONFIG_PHY_SUN4I_USB=y -CONFIG_PHY_SUN6I_MIPI_DPHY=y -# CONFIG_PHY_SUN9I_USB is not set -# CONFIG_PHY_SUN50I_USB3 is not set -# CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_PHY_CADENCE_TORRENT is not set -# CONFIG_PHY_CADENCE_DPHY is not set -# CONFIG_PHY_CADENCE_SIERRA is not set -# CONFIG_PHY_CADENCE_SALVO is not set -# CONFIG_PHY_FSL_IMX8MQ_USB is not set -# CONFIG_PHY_MIXEL_MIPI_DPHY is not set -# CONFIG_PHY_PXA_28NM_HSIC is not set -# CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_CPCAP_USB is not set -# CONFIG_PHY_MAPPHONE_MDM6600 is not set -# CONFIG_PHY_OCELOT_SERDES is not set -CONFIG_PHY_QCOM_USB_HS=y -# CONFIG_PHY_QCOM_USB_HSIC is not set -CONFIG_PHY_SAMSUNG_USB2=y -# CONFIG_PHY_TUSB1210 is not set -# end of PHY Subsystem - -# CONFIG_POWERCAP is not set -# CONFIG_MCB is not set - -# -# Performance monitor support -# -# CONFIG_ARM_CCI_PMU is not set -# CONFIG_ARM_CCN is not set -CONFIG_ARM_PMU=y -# CONFIG_ARM_DSU_PMU is not set -# CONFIG_ARM_SPE_PMU is not set -# end of Performance monitor support - -CONFIG_RAS=y - -# -# Android -# -CONFIG_ANDROID=y -CONFIG_ANDROID_BINDER_IPC=y -CONFIG_ANDROID_BINDERFS=y -CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder" -# CONFIG_ANDROID_BINDER_IPC_SELFTEST is not set -# end of Android - -# CONFIG_LIBNVDIMM is not set -# CONFIG_DAX is not set -CONFIG_NVMEM=y -CONFIG_NVMEM_SYSFS=y -# CONFIG_NVMEM_SPMI_SDAM is not set -CONFIG_NVMEM_SUNXI_SID=y - -# -# HW tracing support -# -# CONFIG_STM is not set -# CONFIG_INTEL_TH is not set -# end of HW tracing support - -# CONFIG_FPGA is not set -# CONFIG_FSI is not set -CONFIG_TEE=y - -# -# TEE drivers -# -CONFIG_OPTEE=y -CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 -# end of TEE drivers - -CONFIG_PM_OPP=y -# CONFIG_SIOX is not set -# CONFIG_SLIMBUS is not set -# CONFIG_INTERCONNECT is not set -# CONFIG_COUNTER is not set -# CONFIG_MOST is not set -# end of Device Drivers - -# -# File systems -# -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_VALIDATE_FS_PARSER=y -CONFIG_FS_IOMAP=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_ASSERT is not set -# CONFIG_BTRFS_FS_REF_VERIFY is not set -# CONFIG_NILFS2_FS is not set -CONFIG_F2FS_FS=y -CONFIG_F2FS_STAT_FS=y -CONFIG_F2FS_FS_XATTR=y -CONFIG_F2FS_FS_POSIX_ACL=y -CONFIG_F2FS_FS_SECURITY=y -# CONFIG_F2FS_CHECK_FS is not set -# CONFIG_F2FS_FAULT_INJECTION is not set -CONFIG_F2FS_FS_COMPRESSION=y -CONFIG_F2FS_FS_LZO=y -CONFIG_F2FS_FS_LZ4=y -CONFIG_F2FS_FS_ZSTD=y -CONFIG_F2FS_FS_LZORLE=y -# CONFIG_FS_DAX is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=y -# CONFIG_EXPORTFS_BLOCK_OPS is not set -CONFIG_FILE_LOCKING=y -CONFIG_MANDATORY_FILE_LOCKING=y -# CONFIG_FS_ENCRYPTION is not set -# CONFIG_FS_VERITY is not set -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_FANOTIFY=y -CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=y -CONFIG_AUTOFS_FS=y -CONFIG_FUSE_FS=y -CONFIG_CUSE=m -# CONFIG_VIRTIO_FS is not set -CONFIG_OVERLAY_FS=m -# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set -CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y -# CONFIG_OVERLAY_FS_INDEX is not set -# CONFIG_OVERLAY_FS_XINO_AUTO is not set -# CONFIG_OVERLAY_FS_METACOPY is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set -# end of Caches - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set -# end of CD-ROM/DVD Filesystems - -# -# DOS/FAT/EXFAT/NT Filesystems -# -CONFIG_FAT_FS=y -# CONFIG_MSDOS_FS is not set -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_FAT_DEFAULT_UTF8 is not set -CONFIG_EXFAT_FS=m -CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y -# end of DOS/FAT/EXFAT/NT Filesystems - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -# CONFIG_PROC_KCORE is not set -CONFIG_PROC_VMCORE=y -# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_PROC_CHILDREN=y -CONFIG_KERNFS=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TMPFS_XATTR=y -# CONFIG_TMPFS_INODE64 is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -CONFIG_MEMFD_CREATE=y -CONFIG_ARCH_HAS_GIGANTIC_PAGE=y -CONFIG_CONFIGFS_FS=y -# end of Pseudo filesystems - -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ORANGEFS_FS is not set -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_ECRYPT_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_SQUASHFS=y -CONFIG_SQUASHFS_FILE_CACHE=y -# CONFIG_SQUASHFS_FILE_DIRECT is not set -CONFIG_SQUASHFS_DECOMP_SINGLE=y -# CONFIG_SQUASHFS_DECOMP_MULTI is not set -# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set -CONFIG_SQUASHFS_XATTR=y -CONFIG_SQUASHFS_ZLIB=y -CONFIG_SQUASHFS_LZ4=y -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_ZSTD is not set -# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=y -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_PSTORE=y -CONFIG_PSTORE_DEFLATE_COMPRESS=y -# CONFIG_PSTORE_LZO_COMPRESS is not set -# CONFIG_PSTORE_LZ4_COMPRESS is not set -# CONFIG_PSTORE_LZ4HC_COMPRESS is not set -# CONFIG_PSTORE_842_COMPRESS is not set -# CONFIG_PSTORE_ZSTD_COMPRESS is not set -CONFIG_PSTORE_COMPRESS=y -CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y -CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" -# CONFIG_PSTORE_CONSOLE is not set -# CONFIG_PSTORE_PMSG is not set -# CONFIG_PSTORE_RAM is not set -# CONFIG_PSTORE_BLK is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_EROFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V2=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_SWAP is not set -CONFIG_NFS_V4_1=y -CONFIG_NFS_V4_2=y -CONFIG_PNFS_FILE_LAYOUT=y -CONFIG_PNFS_BLOCK=y -CONFIG_PNFS_FLEXFILE_LAYOUT=m -CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" -# CONFIG_NFS_V4_1_MIGRATION is not set -CONFIG_NFS_V4_SECURITY_LABEL=y -CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -CONFIG_NFS_DISABLE_UDP_SUPPORT=y -# CONFIG_NFSD is not set -CONFIG_GRACE_PERIOD=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_SUNRPC_BACKCHANNEL=y -# CONFIG_SUNRPC_DEBUG is not set -# CONFIG_CEPH_FS is not set -CONFIG_CIFS=m -# CONFIG_CIFS_STATS2 is not set -CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -# CONFIG_CIFS_POSIX is not set -CONFIG_CIFS_DEBUG=y -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set -# CONFIG_CIFS_DFS_UPCALL is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -CONFIG_9P_FS=y -# CONFIG_9P_FS_POSIX_ACL is not set -# CONFIG_9P_FS_SECURITY is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_MAC_ROMAN is not set -# CONFIG_NLS_MAC_CELTIC is not set -# CONFIG_NLS_MAC_CENTEURO is not set -# CONFIG_NLS_MAC_CROATIAN is not set -# CONFIG_NLS_MAC_CYRILLIC is not set -# CONFIG_NLS_MAC_GAELIC is not set -# CONFIG_NLS_MAC_GREEK is not set -# CONFIG_NLS_MAC_ICELAND is not set -# CONFIG_NLS_MAC_INUIT is not set -# CONFIG_NLS_MAC_ROMANIAN is not set -# CONFIG_NLS_MAC_TURKISH is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set -# CONFIG_UNICODE is not set -CONFIG_IO_WQ=y -# end of File systems - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_REQUEST_CACHE is not set -# CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_TRUSTED_KEYS is not set -# CONFIG_ENCRYPTED_KEYS is not set -# CONFIG_KEY_DH_OPERATIONS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -CONFIG_SECURITY=y -CONFIG_SECURITYFS=y -# CONFIG_SECURITY_NETWORK is not set -# CONFIG_SECURITY_PATH is not set -CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set -# CONFIG_STATIC_USERMODEHELPER is not set -# CONFIG_SECURITY_SMACK is not set -# CONFIG_SECURITY_TOMOYO is not set -# CONFIG_SECURITY_APPARMOR is not set -# CONFIG_SECURITY_LOADPIN is not set -# CONFIG_SECURITY_YAMA is not set -# CONFIG_SECURITY_SAFESETID is not set -# CONFIG_SECURITY_LOCKDOWN_LSM is not set -CONFIG_INTEGRITY=y -# CONFIG_INTEGRITY_SIGNATURE is not set -# CONFIG_IMA is not set -# CONFIG_EVM is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_LSM="yama,loadpin,integrity,selinux,smack,tomoyo,apparmor" - -# -# Kernel hardening options -# - -# -# Memory initialization -# -CONFIG_INIT_STACK_NONE=y -# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set -# CONFIG_GCC_PLUGIN_STACKLEAK is not set -# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set -# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set -# end of Memory initialization -# end of Kernel hardening options -# end of Security options - -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y -CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_SKCIPHER=y -CONFIG_CRYPTO_SKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_KPP=m -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_USER is not set -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -# CONFIG_CRYPTO_PCRYPT is not set -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_AUTHENC=y -# CONFIG_CRYPTO_TEST is not set -CONFIG_CRYPTO_SIMD=y - -# -# Public-key cryptography -# -CONFIG_CRYPTO_RSA=y -# CONFIG_CRYPTO_DH is not set -CONFIG_CRYPTO_ECC=m -CONFIG_CRYPTO_ECDH=m -# CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_CURVE25519 is not set - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=y -CONFIG_CRYPTO_GCM=y -# CONFIG_CRYPTO_CHACHA20POLY1305 is not set -# CONFIG_CRYPTO_AEGIS128 is not set -CONFIG_CRYPTO_SEQIV=m -CONFIG_CRYPTO_ECHAINIV=y - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set -CONFIG_CRYPTO_CTR=y -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set -# CONFIG_CRYPTO_PCBC is not set -CONFIG_CRYPTO_XTS=m -# CONFIG_CRYPTO_KEYWRAP is not set -# CONFIG_CRYPTO_ADIANTUM is not set -CONFIG_CRYPTO_ESSIV=y - -# -# Hash modes -# -CONFIG_CRYPTO_CMAC=y -CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_XXHASH=m -CONFIG_CRYPTO_BLAKE2B=m -# CONFIG_CRYPTO_BLAKE2S is not set -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_GHASH=y -# CONFIG_CRYPTO_POLY1305 is not set -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=m -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_SHA3=m -CONFIG_CRYPTO_SM3=m -# CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_TI is not set -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=m -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -CONFIG_CRYPTO_CHACHA20=m -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_SM4 is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_LZO=y -# CONFIG_CRYPTO_842 is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set -CONFIG_CRYPTO_ZSTD=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_DRBG_HMAC=y -# CONFIG_CRYPTO_DRBG_HASH is not set -# CONFIG_CRYPTO_DRBG_CTR is not set -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_USER_API=y -CONFIG_CRYPTO_USER_API_HASH=y -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -# CONFIG_CRYPTO_USER_API_RNG is not set -# CONFIG_CRYPTO_USER_API_AEAD is not set -CONFIG_CRYPTO_HASH_INFO=y - -# -# Crypto library routines -# -CONFIG_CRYPTO_LIB_AES=y -CONFIG_CRYPTO_LIB_ARC4=m -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=m -CONFIG_CRYPTO_LIB_BLAKE2S=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m -CONFIG_CRYPTO_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m -CONFIG_CRYPTO_LIB_CURVE25519=m -CONFIG_CRYPTO_LIB_DES=m -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 -CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_ALLWINNER=y -# CONFIG_CRYPTO_DEV_SUN4I_SS is not set -# CONFIG_CRYPTO_DEV_SUN8I_CE is not set -# CONFIG_CRYPTO_DEV_SUN8I_SS is not set -# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set -# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set -# CONFIG_CRYPTO_DEV_CCP is not set -# CONFIG_CRYPTO_DEV_SAFEXCEL is not set -# CONFIG_CRYPTO_DEV_CCREE is not set -# CONFIG_CRYPTO_DEV_HISI_SEC is not set -# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set -CONFIG_ASYMMETRIC_KEY_TYPE=y -CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y -CONFIG_X509_CERTIFICATE_PARSER=y -# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set -CONFIG_PKCS7_MESSAGE_PARSER=y -# CONFIG_PKCS7_TEST_KEY is not set -# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set - -# -# Certificates for signature checking -# -CONFIG_SYSTEM_TRUSTED_KEYRING=y -CONFIG_SYSTEM_TRUSTED_KEYS="" -# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set -# CONFIG_SECONDARY_TRUSTED_KEYRING is not set -# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set -# end of Certificates for signature checking - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_RAID6_PQ_BENCHMARK=y -CONFIG_LINEAR_RANGES=y -# CONFIG_PACKING is not set -CONFIG_BITREVERSE=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_NET_UTILS=y -# CONFIG_CORDIC is not set -# CONFIG_PRIME_NUMBERS is not set -CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_USE_SYM_ANNOTATIONS=y -CONFIG_INDIRECT_PIO=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -# CONFIG_CRC8 is not set -CONFIG_XXHASH=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_RANDOM32_SELFTEST is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_LZ4_COMPRESS=y -CONFIG_LZ4_DECOMPRESS=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y -CONFIG_XZ_DEC=y -CONFIG_XZ_DEC_X86=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_BCJ=y -# CONFIG_XZ_DEC_TEST is not set -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_LZ4=y -CONFIG_DECOMPRESS_ZSTD=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_INTERVAL_TREE=y -CONFIG_XARRAY_MULTI=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_DMA_DECLARE_COHERENT=y -CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y -CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y -CONFIG_SWIOTLB=y -CONFIG_DMA_NONCOHERENT_MMAP=y -CONFIG_DMA_COHERENT_POOL=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_CMA=y - -# -# Default contiguous memory area size: -# -CONFIG_CMA_SIZE_MBYTES=256 -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_ALIGNMENT=8 -# CONFIG_DMA_API_DEBUG is not set -CONFIG_SGL_ALLOC=y -CONFIG_CPU_RMAP=y -CONFIG_DQL=y -CONFIG_GLOB=y -# CONFIG_GLOB_SELFTEST is not set -CONFIG_NLATTR=y -CONFIG_CLZ_TAB=y -# CONFIG_IRQ_POLL is not set -CONFIG_MPILIB=y -CONFIG_LIBFDT=y -CONFIG_OID_REGISTRY=y -CONFIG_HAVE_GENERIC_VDSO=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_VDSO_TIME_NS=y -CONFIG_FONT_SUPPORT=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_SG_POOL=y -CONFIG_SBITMAP=y -# CONFIG_STRING_SELFTEST is not set -# end of Library routines - -# -# Kernel hacking -# - -# -# printk and dmesg options -# -CONFIG_PRINTK_TIME=y -# CONFIG_PRINTK_CALLER is not set -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 -CONFIG_CONSOLE_LOGLEVEL_QUIET=4 -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DYNAMIC_DEBUG_CORE is not set -CONFIG_SYMBOLIC_ERRNAME=y -CONFIG_DEBUG_BUGVERBOSE=y -# end of printk and dmesg options - -# -# Compile-time checks and compiler options -# -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=2048 -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_HEADERS_INSTALL is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_SECTION_MISMATCH_WARN_ONLY=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_FRAME_POINTER=y -# end of Compile-time checks and compiler options - -# -# Generic Kernel Debugging Instruments -# -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 -CONFIG_MAGIC_SYSRQ_SERIAL=y -CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_FS_ALLOW_ALL=y -# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set -# CONFIG_DEBUG_FS_ALLOW_NONE is not set -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y -# CONFIG_UBSAN is not set -# end of Generic Kernel Debugging Instruments - -# CONFIG_DEBUG_KERNEL is not set - -# -# Memory Debugging -# -# CONFIG_PAGE_EXTENSION is not set -# CONFIG_PAGE_POISONING is not set -# CONFIG_DEBUG_RODATA_TEST is not set -CONFIG_ARCH_HAS_DEBUG_WX=y -# CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y -# CONFIG_DEBUG_VM_PGTABLE is not set -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y -CONFIG_CC_HAS_KASAN_GENERIC=y -CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y -# CONFIG_KASAN is not set -# end of Memory Debugging - -# -# Debug Oops, Lockups and Hangs -# -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -# CONFIG_TEST_LOCKUP is not set -# end of Debug Oops, Lockups and Hangs - -# -# Scheduler Debugging -# -CONFIG_SCHED_INFO=y -# end of Scheduler Debugging - -# CONFIG_DEBUG_TIMEKEEPING is not set - -# -# Lock Debugging (spinlocks, mutexes, etc...) -# -CONFIG_LOCK_DEBUGGING_SUPPORT=y -# CONFIG_WW_MUTEX_SELFTEST is not set -# end of Lock Debugging (spinlocks, mutexes, etc...) - -# CONFIG_STACKTRACE is not set -# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set -CONFIG_HAVE_DEBUG_BUGVERBOSE=y - -# -# Debug kernel data structures -# -# CONFIG_BUG_ON_DATA_CORRUPTION is not set -# end of Debug kernel data structures - -# -# RCU Debugging -# -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# end of RCU Debugging - -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_SAMPLES is not set -CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y -CONFIG_STRICT_DEVMEM=y -# CONFIG_IO_STRICT_DEVMEM is not set - -# -# arm64 Debugging -# -# CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_ARM64_RELOC_TEST is not set -# CONFIG_CORESIGHT is not set -# end of arm64 Debugging - -# -# Kernel Testing and Coverage -# -# CONFIG_KUNIT is not set -CONFIG_ARCH_HAS_KCOV=y -CONFIG_CC_HAS_SANCOV_TRACE_PC=y -# CONFIG_KCOV is not set -CONFIG_RUNTIME_TESTING_MENU=y -# CONFIG_LKDTM is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_TEST_MIN_HEAP is not set -# CONFIG_TEST_SORT is not set -# CONFIG_REED_SOLOMON_TEST is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_TEST_HEXDUMP is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_STRSCPY is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_BITMAP is not set -# CONFIG_TEST_BITFIELD is not set -# CONFIG_TEST_UUID is not set -# CONFIG_TEST_XARRAY is not set -# CONFIG_TEST_OVERFLOW is not set -# CONFIG_TEST_RHASHTABLE is not set -# CONFIG_TEST_HASH is not set -# CONFIG_TEST_IDA is not set -# CONFIG_TEST_LKM is not set -# CONFIG_TEST_BITOPS is not set -# CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set -# CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set -# CONFIG_FIND_BIT_BENCHMARK is not set -# CONFIG_TEST_FIRMWARE is not set -# CONFIG_TEST_SYSCTL is not set -# CONFIG_TEST_UDELAY is not set -# CONFIG_TEST_STATIC_KEYS is not set -# CONFIG_TEST_KMOD is not set -# CONFIG_TEST_MEMCAT_P is not set -# CONFIG_TEST_STACKINIT is not set -# CONFIG_TEST_MEMINIT is not set -# CONFIG_TEST_FREE_PAGES is not set -CONFIG_MEMTEST=y -# end of Kernel Testing and Coverage -# end of Kernel hacking - -# -# Gentoo Linux -# -CONFIG_GENTOO_LINUX=y -CONFIG_GENTOO_LINUX_UDEV=y -CONFIG_GENTOO_LINUX_PORTAGE=y - -# -# Support for init systems, system and service managers -# -CONFIG_GENTOO_LINUX_INIT_SCRIPT=y -CONFIG_GENTOO_LINUX_INIT_SYSTEMD=y -# end of Support for init systems, system and service managers -# end of Gentoo Linux diff --git a/sys-kernel/pinephone-sources/files/config-postmarketos-allwinner.aarch64 b/sys-kernel/pinephone-sources/files/config-postmarketos-allwinner.aarch64 deleted file mode 100644 index 50e6074..0000000 --- a/sys-kernel/pinephone-sources/files/config-postmarketos-allwinner.aarch64 +++ /dev/null @@ -1,5962 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.10.4 Kernel Configuration -# -CONFIG_CC_VERSION_TEXT="gcc (Alpine 10.2.1_pre1) 10.2.1 20201203" -CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=100201 -CONFIG_LD_VERSION=235010000 -CONFIG_CLANG_VERSION=0 -CONFIG_LLD_VERSION=0 -CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y -CONFIG_CC_HAS_ASM_GOTO=y -CONFIG_CC_HAS_ASM_INLINE=y -CONFIG_IRQ_WORK=y -CONFIG_BUILDTIME_TABLE_SORT=y -CONFIG_THREAD_INFO_IN_TASK=y - -# -# General setup -# -CONFIG_INIT_ENV_ARG_LIMIT=32 -# CONFIG_COMPILE_TEST is not set -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_BUILD_SALT="" -CONFIG_DEFAULT_INIT="" -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_WATCH_QUEUE is not set -CONFIG_CROSS_MEMORY_ATTACH=y -# CONFIG_USELIB is not set -# CONFIG_AUDIT is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y -CONFIG_GENERIC_IRQ_IPI=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_IRQ_MSI_IOMMU=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_SPARSE_IRQ=y -# CONFIG_GENERIC_IRQ_DEBUGFS is not set -# end of IRQ subsystem - -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y - -# -# Timers subsystem -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ_COMMON=y -# CONFIG_HZ_PERIODIC is not set -CONFIG_NO_HZ_IDLE=y -# CONFIG_NO_HZ_FULL is not set -# CONFIG_NO_HZ is not set -CONFIG_HIGH_RES_TIMERS=y -# end of Timers subsystem - -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set - -# -# CPU/Task time and stats accounting -# -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y -# CONFIG_PSI is not set -# end of CPU/Task time and stats accounting - -CONFIG_CPU_ISOLATION=y - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_RCU_EXPERT is not set -CONFIG_SRCU=y -CONFIG_TREE_SRCU=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RCU_NEED_SEGCBLIST=y -# end of RCU Subsystem - -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -# CONFIG_IKHEADERS is not set -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 -CONFIG_GENERIC_SCHED_CLOCK=y - -# -# Scheduler features -# -# CONFIG_UCLAMP_TASK is not set -# end of Scheduler features - -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_CC_HAS_INT128=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_NUMA_BALANCING=y -CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y -CONFIG_CGROUPS=y -CONFIG_PAGE_COUNTER=y -CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_KMEM=y -CONFIG_BLK_CGROUP=y -CONFIG_CGROUP_WRITEBACK=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_CFS_BANDWIDTH is not set -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_CGROUP_PIDS=y -# CONFIG_CGROUP_RDMA is not set -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_HUGETLB=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_PERF=y -# CONFIG_CGROUP_DEBUG is not set -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_TIME_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -# CONFIG_CHECKPOINT_RESTORE is not set -CONFIG_SCHED_AUTOGROUP=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_RD_XZ=y -CONFIG_RD_LZO=y -CONFIG_RD_LZ4=y -CONFIG_RD_ZSTD=y -# CONFIG_BOOT_CONFIG is not set -CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_LD_ORPHAN_WARN=y -CONFIG_SYSCTL=y -CONFIG_HAVE_UID16=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_BPF=y -# CONFIG_EXPERT is not set -CONFIG_UID16=y -CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_FHANDLE=y -CONFIG_POSIX_TIMERS=y -CONFIG_PRINTK=y -CONFIG_PRINTK_NMI=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_FUTEX_PI=y -CONFIG_HAVE_FUTEX_CMPXCHG=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_IO_URING=y -CONFIG_ADVISE_SYSCALLS=y -CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -# CONFIG_BPF_SYSCALL is not set -CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y -CONFIG_BPF_JIT_DEFAULT_ON=y -# CONFIG_USERFAULTFD is not set -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_RSEQ=y -# CONFIG_EMBEDDED is not set -CONFIG_HAVE_PERF_EVENTS=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -# end of Kernel Performance Events And Counters - -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -CONFIG_SLAB_MERGE_DEFAULT=y -# CONFIG_SLAB_FREELIST_RANDOM is not set -# CONFIG_SLAB_FREELIST_HARDENED is not set -# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set -CONFIG_SLUB_CPU_PARTIAL=y -CONFIG_SYSTEM_DATA_VERIFICATION=y -CONFIG_PROFILING=y -# end of General setup - -CONFIG_ARM64=y -CONFIG_64BIT=y -CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_CONT_PTE_SHIFT=4 -CONFIG_ARM64_CONT_PMD_SHIFT=4 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=33 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 -CONFIG_NO_IOPORT_MAP=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_ZONE_DMA32=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_SMP=y -CONFIG_KERNEL_MODE_NEON=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_PGTABLE_LEVELS=4 -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_BROKEN_GAS_INST=y - -# -# Platform selection -# -# CONFIG_ARCH_ACTIONS is not set -# CONFIG_ARCH_AGILEX is not set -CONFIG_ARCH_SUNXI=y -# CONFIG_ARCH_ALPINE is not set -# CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM_IPROC is not set -# CONFIG_ARCH_BERLIN is not set -# CONFIG_ARCH_BITMAIN is not set -# CONFIG_ARCH_BRCMSTB is not set -# CONFIG_ARCH_EXYNOS is not set -# CONFIG_ARCH_SPARX5 is not set -# CONFIG_ARCH_K3 is not set -# CONFIG_ARCH_LAYERSCAPE is not set -# CONFIG_ARCH_LG1K is not set -# CONFIG_ARCH_HISI is not set -# CONFIG_ARCH_KEEMBAY is not set -# CONFIG_ARCH_MEDIATEK is not set -# CONFIG_ARCH_MESON is not set -# CONFIG_ARCH_MVEBU is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_REALTEK is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_ROCKCHIP is not set -# CONFIG_ARCH_S32 is not set -# CONFIG_ARCH_SEATTLE is not set -# CONFIG_ARCH_STRATIX10 is not set -# CONFIG_ARCH_SYNQUACER is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_SPRD is not set -# CONFIG_ARCH_THUNDER is not set -# CONFIG_ARCH_THUNDER2 is not set -# CONFIG_ARCH_UNIPHIER is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_VISCONTI is not set -# CONFIG_ARCH_XGENE is not set -# CONFIG_ARCH_ZX is not set -# CONFIG_ARCH_ZYNQMP is not set -# end of Platform selection - -# -# Kernel Features -# - -# -# ARM errata workarounds via the alternatives framework -# -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_845719=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_1024718=y -CONFIG_ARM64_ERRATUM_1418040=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1319367=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_ERRATUM_1463225=y -CONFIG_ARM64_ERRATUM_1542419=y -CONFIG_ARM64_ERRATUM_1508412=y -CONFIG_CAVIUM_ERRATUM_22375=y -CONFIG_CAVIUM_ERRATUM_23144=y -CONFIG_CAVIUM_ERRATUM_23154=y -CONFIG_CAVIUM_ERRATUM_27456=y -CONFIG_CAVIUM_ERRATUM_30115=y -CONFIG_CAVIUM_TX2_ERRATUM_219=y -CONFIG_FUJITSU_ERRATUM_010001=y -CONFIG_HISILICON_ERRATUM_161600802=y -CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_QCOM_FALKOR_ERRATUM_1009=y -CONFIG_QCOM_QDF2400_ERRATUM_0065=y -CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y -# end of ARM errata workarounds via the alternatives framework - -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_16K_PAGES is not set -# CONFIG_ARM64_64K_PAGES is not set -# CONFIG_ARM64_VA_BITS_39 is not set -CONFIG_ARM64_VA_BITS_48=y -CONFIG_ARM64_VA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PA_BITS=48 -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SCHED_MC=y -# CONFIG_SCHED_SMT is not set -CONFIG_NR_CPUS=64 -CONFIG_HOTPLUG_CPU=y -CONFIG_NUMA=y -CONFIG_NODES_SHIFT=2 -CONFIG_USE_PERCPU_NUMA_NODE_ID=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_300 is not set -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_SCHED_HRTICK=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HW_PERF_EVENTS=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_PARAVIRT=y -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set -CONFIG_KEXEC=y -# CONFIG_KEXEC_FILE is not set -CONFIG_CRASH_DUMP=y -CONFIG_XEN_DOM0=y -CONFIG_XEN=y -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_COMPAT=y -CONFIG_KUSER_HELPERS=y -# CONFIG_ARMV8_DEPRECATED is not set - -# -# ARMv8.1 architectural features -# -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_PAN=y -CONFIG_ARM64_USE_LSE_ATOMICS=y -CONFIG_ARM64_VHE=y -# end of ARMv8.1 architectural features - -# -# ARMv8.2 architectural features -# -CONFIG_ARM64_UAO=y -# CONFIG_ARM64_PMEM is not set -CONFIG_ARM64_RAS_EXTN=y -CONFIG_ARM64_CNP=y -# end of ARMv8.2 architectural features - -# -# ARMv8.3 architectural features -# -CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y -# end of ARMv8.3 architectural features - -# -# ARMv8.4 architectural features -# -CONFIG_ARM64_AMU_EXTN=y -# end of ARMv8.4 architectural features - -# -# ARMv8.5 architectural features -# -CONFIG_ARM64_BTI=y -CONFIG_ARM64_E0PD=y -CONFIG_ARCH_RANDOM=y -# end of ARMv8.5 architectural features - -CONFIG_ARM64_SVE=y -CONFIG_ARM64_MODULE_PLTS=y -# CONFIG_ARM64_PSEUDO_NMI is not set -CONFIG_RELOCATABLE=y -# CONFIG_RANDOMIZE_BASE is not set -# end of Kernel Features - -# -# Boot options -# -CONFIG_CMDLINE="console=ttyAMA0" -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_EFI is not set -# end of Boot options - -CONFIG_SYSVIPC_COMPAT=y -CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y -CONFIG_ARCH_ENABLE_THP_MIGRATION=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HIBERNATION=y -CONFIG_HIBERNATION_SNAPSHOT_DEV=y -CONFIG_PM_STD_PARTITION="" -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_PM_AUTOSLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_WAKELOCKS_LIMIT=100 -CONFIG_PM_WAKELOCKS_GC=y -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_CPU_PM=y -CONFIG_ENERGY_MODEL=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_HIBERNATION_HEADER=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# end of Power management options - -# -# CPU Power Management -# - -# -# CPU Idle -# -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y -# CONFIG_CPU_IDLE_GOV_LADDER is not set -CONFIG_CPU_IDLE_GOV_MENU=y -# CONFIG_CPU_IDLE_GOV_TEO is not set -CONFIG_DT_IDLE_STATES=y - -# -# ARM CPU Idle Drivers -# -CONFIG_ARM_CPUIDLE=y -# CONFIG_ARM_PSCI_CPUIDLE is not set -# end of ARM CPU Idle Drivers -# end of CPU Idle - -# -# CPU Frequency scaling -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y - -# -# CPU frequency scaling drivers -# -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -# CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is not set -CONFIG_ARM_SCPI_CPUFREQ=y -# end of CPU Frequency scaling -# end of CPU Power Management - -# -# Firmware Drivers -# -# CONFIG_ARM_SCMI_PROTOCOL is not set -CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y -# CONFIG_ARM_SDE_INTERFACE is not set -# CONFIG_GOOGLE_FIRMWARE is not set -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_PSCI_CHECKER is not set -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y -CONFIG_ARM_SMCCC_SOC_ID=y - -# -# Tegra firmware driver -# -# end of Tegra firmware driver -# end of Firmware Drivers - -# CONFIG_VIRTUALIZATION is not set -CONFIG_ARM64_CRYPTO=y -CONFIG_CRYPTO_SHA256_ARM64=y -CONFIG_CRYPTO_SHA512_ARM64=m -CONFIG_CRYPTO_SHA1_ARM64_CE=y -CONFIG_CRYPTO_SHA2_ARM64_CE=y -CONFIG_CRYPTO_SHA512_ARM64_CE=m -CONFIG_CRYPTO_SHA3_ARM64=m -CONFIG_CRYPTO_SM3_ARM64_CE=m -# CONFIG_CRYPTO_SM4_ARM64_CE is not set -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m -CONFIG_CRYPTO_CHACHA20_NEON=m -CONFIG_CRYPTO_POLY1305_NEON=m -# CONFIG_CRYPTO_NHPOLY1305_NEON is not set -CONFIG_CRYPTO_AES_ARM64_BS=m - -# -# General architecture-dependent options -# -CONFIG_CRASH_CORE=y -CONFIG_KEXEC_CORE=y -CONFIG_SET_FS=y -# CONFIG_KPROBES is not set -CONFIG_JUMP_LABEL=y -# CONFIG_STATIC_KEYS_SELFTEST is not set -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y -CONFIG_HAVE_NMI=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_KEEPINITRD=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SET_DIRECT_MAP=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ASM_MODVERSIONS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y -CONFIG_MMU_GATHER_TABLE_FREE=y -CONFIG_MMU_GATHER_RCU_TABLE_FREE=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_HAVE_ARCH_SECCOMP=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_SECCOMP=y -CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_STACKLEAK=y -CONFIG_HAVE_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR_STRONG=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MOVE_PMD=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_HAVE_ARCH_MMAP_RND_BITS=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 -CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_COMPAT_OLD_SIGACTION=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_VMAP_STACK=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_STRICT_MODULE_RWX=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -# CONFIG_LOCK_EVENT_COUNTS is not set -CONFIG_ARCH_HAS_RELR=y -CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -# end of GCOV-based kernel profiling - -CONFIG_HAVE_GCC_PLUGINS=y -# end of General architecture-dependent options - -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -# CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -CONFIG_MODULE_COMPRESS_XZ=y -# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_TRIM_UNUSED_KSYMS is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_BLOCK=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y -# CONFIG_BLK_DEV_ZONED is not set -# CONFIG_BLK_DEV_THROTTLING is not set -# CONFIG_BLK_CMDLINE_PARSER is not set -# CONFIG_BLK_WBT is not set -# CONFIG_BLK_CGROUP_IOLATENCY is not set -# CONFIG_BLK_CGROUP_IOCOST is not set -CONFIG_BLK_DEBUG_FS=y -# CONFIG_BLK_SED_OPAL is not set -# CONFIG_BLK_INLINE_ENCRYPTION is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -CONFIG_EFI_PARTITION=y -# end of Partition Types - -CONFIG_BLOCK_COMPAT=y -CONFIG_BLK_PM=y - -# -# IO Schedulers -# -CONFIG_MQ_IOSCHED_DEADLINE=y -CONFIG_MQ_IOSCHED_KYBER=y -# CONFIG_IOSCHED_BFQ is not set -# end of IO Schedulers - -CONFIG_ASN1=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQ=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_FREEZER=y - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_HAVE_ELF_PROT=y -CONFIG_ARCH_USE_GNU_PROPERTY=y -CONFIG_ELFCORE=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_BINFMT_SCRIPT=y -# CONFIG_BINFMT_MISC is not set -CONFIG_COREDUMP=y -# end of Executable file formats - -# -# Memory Management options -# -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM=y -CONFIG_NEED_MULTIPLE_NODES=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MEMORY_HOTPLUG is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -# CONFIG_PAGE_REPORTING is not set -CONFIG_MIGRATION=y -CONFIG_CONTIG_ALLOC=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_BOUNCE=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_MEMORY_FAILURE=y -# CONFIG_HWPOISON_INJECT is not set -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -# CONFIG_CLEANCACHE is not set -CONFIG_FRONTSWAP=y -CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_AREAS=7 -CONFIG_ZSWAP=y -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set -CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y -CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd" -CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y -# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set -# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set -CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" -# CONFIG_ZSWAP_DEFAULT_ON is not set -CONFIG_ZPOOL=y -CONFIG_ZBUD=y -# CONFIG_Z3FOLD is not set -CONFIG_ZSMALLOC=y -# CONFIG_ZSMALLOC_STAT is not set -CONFIG_GENERIC_EARLY_IOREMAP=y -# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set -# CONFIG_IDLE_PAGE_TRACKING is not set -CONFIG_ARCH_HAS_PTE_DEVMAP=y -CONFIG_FRAME_VECTOR=y -# CONFIG_PERCPU_STATS is not set -# CONFIG_GUP_BENCHMARK is not set -# CONFIG_READ_ONLY_THP_FOR_FS is not set -CONFIG_ARCH_HAS_PTE_SPECIAL=y -# end of Memory Management options - -CONFIG_NET=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_NET_INGRESS=y -CONFIG_SKB_EXTENSIONS=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set -CONFIG_UNIX=y -CONFIG_UNIX_SCM=y -# CONFIG_UNIX_DIAG is not set -# CONFIG_TLS is not set -CONFIG_XFRM=y -CONFIG_XFRM_ALGO=y -CONFIG_XFRM_USER=y -# CONFIG_XFRM_INTERFACE is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_AH=y -CONFIG_XFRM_ESP=y -CONFIG_XFRM_IPCOMP=y -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -# CONFIG_IP_FIB_TRIE_STATS is not set -CONFIG_IP_MULTIPLE_TABLES=y -# CONFIG_IP_ROUTE_MULTIPATH is not set -# CONFIG_IP_ROUTE_VERBOSE is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE_DEMUX is not set -CONFIG_NET_IP_TUNNEL=m -# CONFIG_IP_MROUTE is not set -CONFIG_SYN_COOKIES=y -# CONFIG_NET_IPVTI is not set -CONFIG_NET_UDP_TUNNEL=m -# CONFIG_NET_FOU is not set -# CONFIG_NET_FOU_IP_TUNNELS is not set -# CONFIG_INET_AH is not set -CONFIG_INET_ESP=y -# CONFIG_INET_ESP_OFFLOAD is not set -# CONFIG_INET_ESPINTCP is not set -# CONFIG_INET_IPCOMP is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_INET_UDP_DIAG is not set -# CONFIG_INET_RAW_DIAG is not set -CONFIG_INET_DIAG_DESTROY=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=y -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_IPV6_ROUTE_INFO=y -CONFIG_IPV6_OPTIMISTIC_DAD=y -CONFIG_INET6_AH=y -CONFIG_INET6_ESP=y -# CONFIG_INET6_ESP_OFFLOAD is not set -# CONFIG_INET6_ESPINTCP is not set -CONFIG_INET6_IPCOMP=y -CONFIG_IPV6_MIP6=y -# CONFIG_IPV6_ILA is not set -CONFIG_INET6_XFRM_TUNNEL=y -CONFIG_INET6_TUNNEL=y -# CONFIG_IPV6_VTI is not set -CONFIG_IPV6_SIT=m -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -# CONFIG_IPV6_SUBTREES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_IPV6_SEG6_LWTUNNEL is not set -# CONFIG_IPV6_SEG6_HMAC is not set -# CONFIG_IPV6_RPL_LWTUNNEL is not set -# CONFIG_NETLABEL is not set -# CONFIG_MPTCP is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -CONFIG_NETFILTER=y -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=m - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_INGRESS=y -CONFIG_NETFILTER_NETLINK=y -CONFIG_NETFILTER_FAMILY_BRIDGE=y -CONFIG_NETFILTER_FAMILY_ARP=y -# CONFIG_NETFILTER_NETLINK_ACCT is not set -CONFIG_NETFILTER_NETLINK_QUEUE=y -CONFIG_NETFILTER_NETLINK_LOG=y -CONFIG_NETFILTER_NETLINK_OSF=m -CONFIG_NF_CONNTRACK=y -CONFIG_NF_LOG_COMMON=y -# CONFIG_NF_LOG_NETDEV is not set -CONFIG_NETFILTER_CONNCOUNT=y -CONFIG_NF_CONNTRACK_MARK=y -# CONFIG_NF_CONNTRACK_ZONES is not set -CONFIG_NF_CONNTRACK_PROCFS=y -CONFIG_NF_CONNTRACK_EVENTS=y -# CONFIG_NF_CONNTRACK_TIMEOUT is not set -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -# CONFIG_NF_CONNTRACK_LABELS is not set -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_GRE=y -CONFIG_NF_CT_PROTO_SCTP=y -CONFIG_NF_CT_PROTO_UDPLITE=y -CONFIG_NF_CONNTRACK_AMANDA=y -CONFIG_NF_CONNTRACK_FTP=y -CONFIG_NF_CONNTRACK_H323=y -CONFIG_NF_CONNTRACK_IRC=y -CONFIG_NF_CONNTRACK_BROADCAST=y -CONFIG_NF_CONNTRACK_NETBIOS_NS=y -# CONFIG_NF_CONNTRACK_SNMP is not set -CONFIG_NF_CONNTRACK_PPTP=y -CONFIG_NF_CONNTRACK_SANE=y -# CONFIG_NF_CONNTRACK_SIP is not set -CONFIG_NF_CONNTRACK_TFTP=y -CONFIG_NF_CT_NETLINK=y -# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set -CONFIG_NF_NAT=y -CONFIG_NF_NAT_AMANDA=y -CONFIG_NF_NAT_FTP=y -CONFIG_NF_NAT_IRC=y -CONFIG_NF_NAT_TFTP=y -CONFIG_NF_NAT_REDIRECT=y -CONFIG_NF_NAT_MASQUERADE=y -CONFIG_NETFILTER_SYNPROXY=m -CONFIG_NF_TABLES=m -CONFIG_NF_TABLES_INET=y -CONFIG_NF_TABLES_NETDEV=y -CONFIG_NFT_NUMGEN=m -CONFIG_NFT_CT=m -CONFIG_NFT_COUNTER=m -CONFIG_NFT_CONNLIMIT=m -CONFIG_NFT_LOG=m -CONFIG_NFT_LIMIT=m -CONFIG_NFT_MASQ=m -CONFIG_NFT_REDIR=m -CONFIG_NFT_NAT=m -CONFIG_NFT_TUNNEL=m -CONFIG_NFT_OBJREF=m -# CONFIG_NFT_QUEUE is not set -CONFIG_NFT_QUOTA=m -CONFIG_NFT_REJECT=m -CONFIG_NFT_REJECT_INET=m -CONFIG_NFT_COMPAT=m -CONFIG_NFT_HASH=m -# CONFIG_NFT_XFRM is not set -CONFIG_NFT_SOCKET=m -CONFIG_NFT_OSF=m -CONFIG_NFT_TPROXY=m -CONFIG_NFT_SYNPROXY=m -CONFIG_NF_DUP_NETDEV=m -CONFIG_NFT_DUP_NETDEV=m -CONFIG_NFT_FWD_NETDEV=m -# CONFIG_NF_FLOW_TABLE is not set -CONFIG_NETFILTER_XTABLES=y - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=y -CONFIG_NETFILTER_XT_CONNMARK=y -CONFIG_NETFILTER_XT_SET=m - -# -# Xtables targets -# -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y -CONFIG_NETFILTER_XT_TARGET_CONNMARK=y -# CONFIG_NETFILTER_XT_TARGET_CT is not set -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -# CONFIG_NETFILTER_XT_TARGET_HL is not set -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y -# CONFIG_NETFILTER_XT_TARGET_LED is not set -CONFIG_NETFILTER_XT_TARGET_LOG=y -CONFIG_NETFILTER_XT_TARGET_MARK=y -CONFIG_NETFILTER_XT_NAT=y -CONFIG_NETFILTER_XT_TARGET_NETMAP=y -CONFIG_NETFILTER_XT_TARGET_NFLOG=y -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set -CONFIG_NETFILTER_XT_TARGET_REDIRECT=y -CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -CONFIG_NETFILTER_XT_TARGET_TPROXY=y -CONFIG_NETFILTER_XT_TARGET_TRACE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=y -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=y -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y -CONFIG_NETFILTER_XT_MATCH_CONNMARK=y -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_DSCP is not set -CONFIG_NETFILTER_XT_MATCH_ECN=y -# CONFIG_NETFILTER_XT_MATCH_ESP is not set -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y -CONFIG_NETFILTER_XT_MATCH_HELPER=y -CONFIG_NETFILTER_XT_MATCH_HL=y -# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set -CONFIG_NETFILTER_XT_MATCH_IPRANGE=y -# CONFIG_NETFILTER_XT_MATCH_L2TP is not set -CONFIG_NETFILTER_XT_MATCH_LENGTH=y -CONFIG_NETFILTER_XT_MATCH_LIMIT=y -CONFIG_NETFILTER_XT_MATCH_MAC=y -CONFIG_NETFILTER_XT_MATCH_MARK=y -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y -CONFIG_NETFILTER_XT_MATCH_QUOTA=y -# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_RECENT is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -CONFIG_NETFILTER_XT_MATCH_SOCKET=y -CONFIG_NETFILTER_XT_MATCH_STATE=y -CONFIG_NETFILTER_XT_MATCH_STATISTIC=y -CONFIG_NETFILTER_XT_MATCH_STRING=y -# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set -CONFIG_NETFILTER_XT_MATCH_TIME=y -CONFIG_NETFILTER_XT_MATCH_U32=y -# end of Core Netfilter Configuration - -CONFIG_IP_SET=m -CONFIG_IP_SET_MAX=256 -CONFIG_IP_SET_BITMAP_IP=m -CONFIG_IP_SET_BITMAP_IPMAC=m -CONFIG_IP_SET_BITMAP_PORT=m -CONFIG_IP_SET_HASH_IP=m -CONFIG_IP_SET_HASH_IPMARK=m -CONFIG_IP_SET_HASH_IPPORT=m -CONFIG_IP_SET_HASH_IPPORTIP=m -CONFIG_IP_SET_HASH_IPPORTNET=m -CONFIG_IP_SET_HASH_IPMAC=m -CONFIG_IP_SET_HASH_MAC=m -CONFIG_IP_SET_HASH_NETPORTNET=m -CONFIG_IP_SET_HASH_NET=m -CONFIG_IP_SET_HASH_NETNET=m -CONFIG_IP_SET_HASH_NETPORT=m -CONFIG_IP_SET_HASH_NETIFACE=m -CONFIG_IP_SET_LIST_SET=m -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=y -CONFIG_NF_SOCKET_IPV4=y -CONFIG_NF_TPROXY_IPV4=y -CONFIG_NF_TABLES_IPV4=y -CONFIG_NFT_REJECT_IPV4=m -# CONFIG_NFT_DUP_IPV4 is not set -# CONFIG_NFT_FIB_IPV4 is not set -# CONFIG_NF_TABLES_ARP is not set -# CONFIG_NF_DUP_IPV4 is not set -# CONFIG_NF_LOG_ARP is not set -CONFIG_NF_LOG_IPV4=y -CONFIG_NF_REJECT_IPV4=y -CONFIG_NF_NAT_PPTP=y -CONFIG_NF_NAT_H323=y -CONFIG_IP_NF_IPTABLES=y -CONFIG_IP_NF_MATCH_AH=y -CONFIG_IP_NF_MATCH_ECN=y -# CONFIG_IP_NF_MATCH_RPFILTER is not set -CONFIG_IP_NF_MATCH_TTL=y -CONFIG_IP_NF_FILTER=y -CONFIG_IP_NF_TARGET_REJECT=y -# CONFIG_IP_NF_TARGET_SYNPROXY is not set -CONFIG_IP_NF_NAT=y -CONFIG_IP_NF_TARGET_MASQUERADE=y -CONFIG_IP_NF_TARGET_NETMAP=y -CONFIG_IP_NF_TARGET_REDIRECT=y -CONFIG_IP_NF_MANGLE=y -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set -# CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_TTL is not set -CONFIG_IP_NF_RAW=y -CONFIG_IP_NF_SECURITY=y -CONFIG_IP_NF_ARPTABLES=y -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m -# end of IP: Netfilter Configuration - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_SOCKET_IPV6=y -CONFIG_NF_TPROXY_IPV6=y -CONFIG_NF_TABLES_IPV6=y -CONFIG_NFT_REJECT_IPV6=m -# CONFIG_NFT_DUP_IPV6 is not set -# CONFIG_NFT_FIB_IPV6 is not set -# CONFIG_NF_DUP_IPV6 is not set -CONFIG_NF_REJECT_IPV6=y -CONFIG_NF_LOG_IPV6=y -CONFIG_IP6_NF_IPTABLES=y -# CONFIG_IP6_NF_MATCH_AH is not set -# CONFIG_IP6_NF_MATCH_EUI64 is not set -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_HL is not set -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -# CONFIG_IP6_NF_MATCH_MH is not set -# CONFIG_IP6_NF_MATCH_RPFILTER is not set -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_MATCH_SRH is not set -# CONFIG_IP6_NF_TARGET_HL is not set -CONFIG_IP6_NF_FILTER=y -CONFIG_IP6_NF_TARGET_REJECT=y -# CONFIG_IP6_NF_TARGET_SYNPROXY is not set -CONFIG_IP6_NF_MANGLE=y -CONFIG_IP6_NF_RAW=y -# CONFIG_IP6_NF_SECURITY is not set -# CONFIG_IP6_NF_NAT is not set -# end of IPv6: Netfilter Configuration - -CONFIG_NF_DEFRAG_IPV6=y -# CONFIG_NF_TABLES_BRIDGE is not set -# CONFIG_NF_CONNTRACK_BRIDGE is not set -# CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_L2TP is not set -CONFIG_STP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -CONFIG_BRIDGE_VLAN_FILTERING=y -# CONFIG_BRIDGE_MRP is not set -CONFIG_HAVE_NET_DSA=y -# CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -# CONFIG_VLAN_8021Q_GVRP is not set -# CONFIG_VLAN_8021Q_MVRP is not set -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_PHONET is not set -# CONFIG_6LOWPAN is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -# CONFIG_NET_SCH_CBQ is not set -CONFIG_NET_SCH_HTB=y -# CONFIG_NET_SCH_HFSC is not set -# CONFIG_NET_SCH_PRIO is not set -# CONFIG_NET_SCH_MULTIQ is not set -# CONFIG_NET_SCH_RED is not set -# CONFIG_NET_SCH_SFB is not set -# CONFIG_NET_SCH_SFQ is not set -# CONFIG_NET_SCH_TEQL is not set -# CONFIG_NET_SCH_TBF is not set -# CONFIG_NET_SCH_CBS is not set -# CONFIG_NET_SCH_ETF is not set -# CONFIG_NET_SCH_TAPRIO is not set -# CONFIG_NET_SCH_GRED is not set -# CONFIG_NET_SCH_DSMARK is not set -# CONFIG_NET_SCH_NETEM is not set -# CONFIG_NET_SCH_DRR is not set -# CONFIG_NET_SCH_MQPRIO is not set -# CONFIG_NET_SCH_SKBPRIO is not set -# CONFIG_NET_SCH_CHOKE is not set -# CONFIG_NET_SCH_QFQ is not set -# CONFIG_NET_SCH_CODEL is not set -# CONFIG_NET_SCH_FQ_CODEL is not set -# CONFIG_NET_SCH_CAKE is not set -# CONFIG_NET_SCH_FQ is not set -# CONFIG_NET_SCH_HHF is not set -# CONFIG_NET_SCH_PIE is not set -# CONFIG_NET_SCH_PLUG is not set -# CONFIG_NET_SCH_ETS is not set -# CONFIG_NET_SCH_DEFAULT is not set - -# -# Classification -# -CONFIG_NET_CLS=y -# CONFIG_NET_CLS_BASIC is not set -# CONFIG_NET_CLS_TCINDEX is not set -# CONFIG_NET_CLS_ROUTE4 is not set -# CONFIG_NET_CLS_FW is not set -CONFIG_NET_CLS_U32=m -# CONFIG_CLS_U32_PERF is not set -# CONFIG_CLS_U32_MARK is not set -# CONFIG_NET_CLS_RSVP is not set -# CONFIG_NET_CLS_RSVP6 is not set -# CONFIG_NET_CLS_FLOW is not set -# CONFIG_NET_CLS_CGROUP is not set -# CONFIG_NET_CLS_BPF is not set -# CONFIG_NET_CLS_FLOWER is not set -# CONFIG_NET_CLS_MATCHALL is not set -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_CLS_ACT is not set -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=y -# CONFIG_BATMAN_ADV is not set -# CONFIG_OPENVSWITCH is not set -# CONFIG_VSOCKETS is not set -# CONFIG_NETLINK_DIAG is not set -# CONFIG_MPLS is not set -# CONFIG_NET_NSH is not set -# CONFIG_HSR is not set -# CONFIG_NET_SWITCHDEV is not set -# CONFIG_NET_L3_MASTER_DEV is not set -# CONFIG_QRTR is not set -# CONFIG_NET_NCSI is not set -CONFIG_RPS=y -CONFIG_RFS_ACCEL=y -CONFIG_XPS=y -# CONFIG_CGROUP_NET_PRIO is not set -# CONFIG_CGROUP_NET_CLASSID is not set -CONFIG_NET_RX_BUSY_POLL=y -CONFIG_BQL=y -CONFIG_BPF_JIT=y -CONFIG_NET_FLOW_LIMIT=y - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# end of Network testing -# end of Networking options - -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -CONFIG_BT=m -CONFIG_BT_BREDR=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HS=y -CONFIG_BT_LE=y -CONFIG_BT_LEDS=y -# CONFIG_BT_MSFTEXT is not set -# CONFIG_BT_DEBUGFS is not set -# CONFIG_BT_SELFTEST is not set -# CONFIG_BT_FEATURE_DEBUG is not set - -# -# Bluetooth device drivers -# -CONFIG_BT_INTEL=m -CONFIG_BT_BCM=m -CONFIG_BT_RTL=m -CONFIG_BT_HCIBTUSB=m -# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set -CONFIG_BT_HCIBTUSB_BCM=y -# CONFIG_BT_HCIBTUSB_MTK is not set -CONFIG_BT_HCIBTUSB_RTL=y -# CONFIG_BT_HCIBTSDIO is not set -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_SERDEV=y -CONFIG_BT_HCIUART_H4=y -# CONFIG_BT_HCIUART_NOKIA is not set -# CONFIG_BT_HCIUART_BCSP is not set -# CONFIG_BT_HCIUART_ATH3K is not set -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIUART_3WIRE=y -# CONFIG_BT_HCIUART_INTEL is not set -CONFIG_BT_HCIUART_BCM=y -CONFIG_BT_HCIUART_RTL=y -# CONFIG_BT_HCIUART_QCA is not set -# CONFIG_BT_HCIUART_AG6XX is not set -# CONFIG_BT_HCIUART_MRVL is not set -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBFUSB is not set -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_MRVL is not set -# CONFIG_BT_ATH3K is not set -# CONFIG_BT_MTKSDIO is not set -# CONFIG_BT_MTKUART is not set -# end of Bluetooth device drivers - -# CONFIG_AF_RXRPC is not set -# CONFIG_AF_KCM is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=y -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y -CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -CONFIG_CFG80211_CRDA_SUPPORT=y -# CONFIG_CFG80211_WEXT is not set -CONFIG_MAC80211=y -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -# CONFIG_WIMAX is not set -CONFIG_RFKILL=y -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -# CONFIG_RFKILL_GPIO is not set -# CONFIG_NET_9P is not set -# CONFIG_CAIF is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_NFC is not set -# CONFIG_PSAMPLE is not set -# CONFIG_NET_IFE is not set -# CONFIG_LWTUNNEL is not set -CONFIG_DST_CACHE=y -CONFIG_GRO_CELLS=y -# CONFIG_FAILOVER is not set -CONFIG_ETHTOOL_NETLINK=y -CONFIG_HAVE_EBPF_JIT=y - -# -# Device Drivers -# -CONFIG_ARM_AMBA=y -CONFIG_HAVE_PCI=y -# CONFIG_PCI is not set -# CONFIG_PCCARD is not set - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y - -# -# Firmware loader -# -CONFIG_FW_LOADER=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_FW_LOADER_USER_HELPER is not set -# CONFIG_FW_LOADER_COMPRESS is not set -CONFIG_FW_CACHE=y -# end of Firmware loader - -CONFIG_WANT_DEV_COREDUMP=y -CONFIG_ALLOW_DEV_COREDUMP=y -CONFIG_DEV_COREDUMP=y -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set -# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_SOC_BUS=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_IRQ=y -CONFIG_DMA_SHARED_BUFFER=y -# CONFIG_DMA_FENCE_TRACE is not set -CONFIG_GENERIC_ARCH_TOPOLOGY=y -# end of Generic Driver Options - -# -# Bus devices -# -# CONFIG_BRCMSTB_GISB_ARB is not set -CONFIG_SIMPLE_PM_BUS=y -CONFIG_SUN50I_DE2_BUS=y -CONFIG_SUNXI_RSB=y -# CONFIG_VEXPRESS_CONFIG is not set -# CONFIG_MHI_BUS is not set -# end of Bus devices - -# CONFIG_CONNECTOR is not set -# CONFIG_GNSS is not set -# CONFIG_MTD is not set -CONFIG_DTC=y -CONFIG_OF=y -# CONFIG_OF_UNITTEST is not set -CONFIG_OF_FLATTREE=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_KOBJ=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_IRQ=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OF_RESOLVE=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_NUMA=y -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_NULL_BLK is not set -CONFIG_ZRAM=y -# CONFIG_ZRAM_WRITEBACK is not set -# CONFIG_ZRAM_MEMORY_TRACKING is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_DRBD is not set -CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_XEN_BLKDEV_FRONTEND is not set -# CONFIG_BLK_DEV_RBD is not set - -# -# NVME Support -# -# CONFIG_NVME_FC is not set -# CONFIG_NVME_TARGET is not set -# end of NVME Support - -# -# Misc devices -# -# CONFIG_AD525X_DPOT is not set -# CONFIG_DUMMY_IRQ is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_HMC6352 is not set -# CONFIG_DS1682 is not set -CONFIG_SRAM=y -# CONFIG_XILINX_SDFEC is not set -# CONFIG_PVPANIC is not set -# CONFIG_HISI_HIKEY_USB is not set -# CONFIG_MODEM_POWER is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_EEPROM_IDT_89HPESX is not set -# CONFIG_EEPROM_EE1004 is not set -# end of EEPROM support - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - -# CONFIG_SENSORS_LIS3_I2C is not set -# CONFIG_ALTERA_STAPL is not set -# CONFIG_ECHO is not set -# CONFIG_MISC_RTSX_USB is not set -# CONFIG_UACCE is not set -# end of Misc devices - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_PROC_FS is not set - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -CONFIG_SCSI_SAS_ATTRS=y -CONFIG_SCSI_SAS_LIBSAS=y -CONFIG_SCSI_SAS_HOST_SMP=y -# CONFIG_SCSI_SRP_ATTRS is not set -# end of SCSI Transports - -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_ISCSI_BOOT_SYSFS is not set -CONFIG_SCSI_UFSHCD=m -CONFIG_SCSI_UFSHCD_PLATFORM=m -# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set -# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set -# CONFIG_SCSI_UFS_BSG is not set -# CONFIG_XEN_SCSI_FRONTEND is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# end of SCSI device support - -CONFIG_HAVE_PATA_PLATFORM=y -# CONFIG_ATA is not set -CONFIG_MD=y -# CONFIG_BLK_DEV_MD is not set -# CONFIG_BCACHE is not set -CONFIG_BLK_DEV_DM_BUILTIN=y -CONFIG_BLK_DEV_DM=y -# CONFIG_DM_DEBUG is not set -# CONFIG_DM_UNSTRIPED is not set -CONFIG_DM_CRYPT=y -# CONFIG_DM_SNAPSHOT is not set -# CONFIG_DM_THIN_PROVISIONING is not set -# CONFIG_DM_CACHE is not set -# CONFIG_DM_WRITECACHE is not set -# CONFIG_DM_EBS is not set -# CONFIG_DM_ERA is not set -# CONFIG_DM_CLONE is not set -# CONFIG_DM_MIRROR is not set -# CONFIG_DM_RAID is not set -# CONFIG_DM_ZERO is not set -# CONFIG_DM_MULTIPATH is not set -# CONFIG_DM_DELAY is not set -# CONFIG_DM_DUST is not set -# CONFIG_DM_INIT is not set -# CONFIG_DM_UEVENT is not set -# CONFIG_DM_FLAKEY is not set -# CONFIG_DM_VERITY is not set -# CONFIG_DM_SWITCH is not set -# CONFIG_DM_LOG_WRITES is not set -# CONFIG_DM_INTEGRITY is not set -CONFIG_TARGET_CORE=m -# CONFIG_TCM_IBLOCK is not set -# CONFIG_TCM_FILEIO is not set -# CONFIG_TCM_PSCSI is not set -# CONFIG_LOOPBACK_TARGET is not set -# CONFIG_ISCSI_TARGET is not set -CONFIG_NETDEVICES=y -CONFIG_MII=m -CONFIG_NET_CORE=y -# CONFIG_BONDING is not set -# CONFIG_DUMMY is not set -CONFIG_WIREGUARD=m -# CONFIG_WIREGUARD_DEBUG is not set -# CONFIG_EQUALIZER is not set -# CONFIG_NET_TEAM is not set -# CONFIG_MACVLAN is not set -# CONFIG_IPVLAN is not set -# CONFIG_VXLAN is not set -# CONFIG_GENEVE is not set -# CONFIG_BAREUDP is not set -# CONFIG_GTP is not set -# CONFIG_MACSEC is not set -# CONFIG_NETCONSOLE is not set -CONFIG_TUN=y -# CONFIG_TUN_VNET_CROSS_LE is not set -CONFIG_VETH=m -# CONFIG_NLMON is not set - -# -# Distributed Switch Architecture drivers -# -# end of Distributed Switch Architecture drivers - -CONFIG_ETHERNET=y -# CONFIG_NET_VENDOR_ALACRITECH is not set -CONFIG_NET_VENDOR_ALLWINNER=y -# CONFIG_SUN4I_EMAC is not set -# CONFIG_ALTERA_TSE is not set -# CONFIG_NET_VENDOR_AMAZON is not set -# CONFIG_NET_VENDOR_AMD is not set -# CONFIG_NET_VENDOR_AQUANTIA is not set -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_VENDOR_AURORA is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CADENCE is not set -# CONFIG_NET_VENDOR_CAVIUM is not set -# CONFIG_NET_VENDOR_CORTINA is not set -# CONFIG_DNET is not set -# CONFIG_NET_VENDOR_EZCHIP is not set -# CONFIG_NET_VENDOR_GOOGLE is not set -# CONFIG_NET_VENDOR_HISILICON is not set -# CONFIG_NET_VENDOR_HUAWEI is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MELLANOX is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_MICROSEMI is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_NETRONOME is not set -# CONFIG_NET_VENDOR_NI is not set -# CONFIG_ETHOC is not set -# CONFIG_NET_VENDOR_PENSANDO is not set -# CONFIG_NET_VENDOR_QUALCOMM is not set -# CONFIG_NET_VENDOR_RENESAS is not set -# CONFIG_NET_VENDOR_ROCKER is not set -# CONFIG_NET_VENDOR_SAMSUNG is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SOLARFLARE is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_SOCIONEXT is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_SYNOPSYS is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_NET_VENDOR_XILINX is not set -CONFIG_PHYLIB=y -CONFIG_SWPHY=y -# CONFIG_LED_TRIGGER_PHY is not set -CONFIG_FIXED_PHY=y - -# -# MII PHY device drivers -# -# CONFIG_AMD_PHY is not set -# CONFIG_ADIN_PHY is not set -# CONFIG_AQUANTIA_PHY is not set -# CONFIG_AX88796B_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_BCM54140_PHY is not set -# CONFIG_BCM7XXX_PHY is not set -# CONFIG_BCM84881_PHY is not set -# CONFIG_BCM87XX_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_CORTINA_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_INTEL_XWAY_PHY is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_MARVELL_PHY is not set -# CONFIG_MARVELL_10G_PHY is not set -# CONFIG_MICREL_PHY is not set -CONFIG_MICROCHIP_PHY=m -# CONFIG_MICROCHIP_T1_PHY is not set -# CONFIG_MICROSEMI_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_NXP_TJA11XX_PHY is not set -# CONFIG_AT803X_PHY is not set -# CONFIG_QSEMI_PHY is not set -CONFIG_REALTEK_PHY=m -# CONFIG_RENESAS_PHY is not set -# CONFIG_ROCKCHIP_PHY is not set -CONFIG_SMSC_PHY=m -# CONFIG_STE10XP is not set -# CONFIG_TERANETICS_PHY is not set -# CONFIG_DP83822_PHY is not set -# CONFIG_DP83TC811_PHY is not set -# CONFIG_DP83848_PHY is not set -# CONFIG_DP83867_PHY is not set -# CONFIG_DP83869_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_XILINX_GMII2RGMII is not set -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_BUS=y -CONFIG_OF_MDIO=y -CONFIG_MDIO_DEVRES=y -# CONFIG_MDIO_SUN4I is not set -CONFIG_MDIO_BITBANG=y -# CONFIG_MDIO_BCM_UNIMAC is not set -# CONFIG_MDIO_GPIO is not set -# CONFIG_MDIO_HISI_FEMAC is not set -# CONFIG_MDIO_MVUSB is not set -# CONFIG_MDIO_MSCC_MIIM is not set -# CONFIG_MDIO_OCTEON is not set -# CONFIG_MDIO_IPQ4019 is not set -# CONFIG_MDIO_IPQ8064 is not set - -# -# MDIO Multiplexers -# -CONFIG_MDIO_BUS_MUX=y -# CONFIG_MDIO_BUS_MUX_GPIO is not set -# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set -CONFIG_MDIO_BUS_MUX_MMIOREG=y - -# -# PCS device drivers -# -# CONFIG_PCS_XPCS is not set -# end of PCS device drivers - -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -CONFIG_USB_NET_DRIVERS=y -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m -CONFIG_USB_RTL8152=m -CONFIG_USB_LAN78XX=m -CONFIG_USB_USBNET=m -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_AX88179_178A=m -CONFIG_USB_NET_CDCETHER=m -# CONFIG_USB_NET_CDC_EEM is not set -# CONFIG_USB_NET_CDC_NCM is not set -# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set -# CONFIG_USB_NET_CDC_MBIM is not set -# CONFIG_USB_NET_DM9601 is not set -# CONFIG_USB_NET_SR9700 is not set -CONFIG_USB_NET_SR9800=m -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=m -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_NET_CDC_SUBSET_ENABLE=m -CONFIG_USB_NET_CDC_SUBSET=m -# CONFIG_USB_ALI_M5632 is not set -# CONFIG_USB_AN2720 is not set -CONFIG_USB_BELKIN=y -# CONFIG_USB_ARMLINUX is not set -# CONFIG_USB_EPSON2888 is not set -# CONFIG_USB_KC2190 is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_NET_CX82310_ETH is not set -# CONFIG_USB_NET_KALMIA is not set -CONFIG_USB_NET_QMI_WWAN=m -# CONFIG_USB_HSO is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_USB_IPHETH is not set -# CONFIG_USB_SIERRA_NET is not set -# CONFIG_USB_VL600 is not set -# CONFIG_USB_NET_CH9200 is not set -# CONFIG_USB_NET_AQC111 is not set -CONFIG_WLAN=y -# CONFIG_WLAN_VENDOR_ADMTEK is not set -CONFIG_ATH_COMMON=m -CONFIG_WLAN_VENDOR_ATH=y -# CONFIG_ATH_DEBUG is not set -# CONFIG_ATH9K is not set -# CONFIG_ATH9K_HTC is not set -# CONFIG_CARL9170 is not set -# CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set -CONFIG_ATH10K=m -CONFIG_ATH10K_CE=y -# CONFIG_ATH10K_SDIO is not set -# CONFIG_ATH10K_USB is not set -# CONFIG_ATH10K_DEBUG is not set -# CONFIG_ATH10K_DEBUGFS is not set -# CONFIG_WCN36XX is not set -CONFIG_WLAN_VENDOR_ATMEL=y -# CONFIG_AT76C50X_USB is not set -CONFIG_WLAN_VENDOR_BROADCOM=y -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_BRCMUTIL=m -# CONFIG_BRCMSMAC is not set -CONFIG_BRCMFMAC=m -CONFIG_BRCMFMAC_PROTO_BCDC=y -CONFIG_BRCMFMAC_SDIO=y -# CONFIG_BRCMFMAC_USB is not set -# CONFIG_BRCM_TRACING is not set -# CONFIG_BRCMDBG is not set -# CONFIG_WLAN_VENDOR_CISCO is not set -# CONFIG_WLAN_VENDOR_INTEL is not set -# CONFIG_WLAN_VENDOR_INTERSIL is not set -# CONFIG_WLAN_VENDOR_MARVELL is not set -# CONFIG_WLAN_VENDOR_MEDIATEK is not set -CONFIG_WLAN_VENDOR_MICROCHIP=y -# CONFIG_WILC1000_SDIO is not set -CONFIG_WLAN_VENDOR_RALINK=y -CONFIG_RT2X00=m -# CONFIG_RT2500USB is not set -# CONFIG_RT73USB is not set -CONFIG_RT2800USB=m -CONFIG_RT2800USB_RT33XX=y -CONFIG_RT2800USB_RT35XX=y -CONFIG_RT2800USB_RT3573=y -CONFIG_RT2800USB_RT53XX=y -CONFIG_RT2800USB_RT55XX=y -# CONFIG_RT2800USB_UNKNOWN is not set -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_WLAN_VENDOR_REALTEK=y -# CONFIG_RTL8187 is not set -CONFIG_RTL_CARDS=m -# CONFIG_RTL8192CU is not set -# CONFIG_RTL8XXXU is not set -# CONFIG_RTW88 is not set -# CONFIG_WLAN_VENDOR_RSI is not set -# CONFIG_WLAN_VENDOR_ST is not set -# CONFIG_WLAN_VENDOR_TI is not set -# CONFIG_WLAN_VENDOR_ZYDAS is not set -# CONFIG_WLAN_VENDOR_QUANTENNA is not set -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_VIRT_WIFI is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# -# CONFIG_WAN is not set -# CONFIG_XEN_NETDEV_FRONTEND is not set -# CONFIG_NETDEVSIM is not set -# CONFIG_NET_FAILOVER is not set -# CONFIG_ISDN is not set -# CONFIG_NVM is not set - -# -# Input device support -# -CONFIG_INPUT=y -CONFIG_INPUT_LEDS=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=m -# CONFIG_INPUT_SPARSEKMAP is not set -CONFIG_INPUT_MATRIXKMAP=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ADC=m -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_KEYBOARD_QT1050 is not set -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -# CONFIG_KEYBOARD_DLINK_DIR685 is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_GPIO_POLLED is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_TCA8418 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_LM8333 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_SAMSUNG is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -CONFIG_KEYBOARD_SUN4I_LRADC=m -# CONFIG_KEYBOARD_OMAP4 is not set -# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_CAP11XX is not set -# CONFIG_KEYBOARD_BCM is not set -CONFIG_INPUT_MOUSE=y -# CONFIG_MOUSE_PS2 is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -# CONFIG_MOUSE_ELAN_I2C is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_MOUSE_SYNAPTICS_USB is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_PROPERTIES=y -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_ADC is not set -# CONFIG_TOUCHSCREEN_AR1021_I2C is not set -CONFIG_TOUCHSCREEN_ATMEL_MXT=m -# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set -# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_BU21029 is not set -# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set -# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_EGALAX is not set -# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set -# CONFIG_TOUCHSCREEN_EXC3000 is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -CONFIG_TOUCHSCREEN_GOODIX=y -# CONFIG_TOUCHSCREEN_HIDEEP is not set -# CONFIG_TOUCHSCREEN_ILI210X is not set -# CONFIG_TOUCHSCREEN_S6SY761 is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_EKTF2127 is not set -# CONFIG_TOUCHSCREEN_ELAN is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_WACOM_I2C is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MMS114 is not set -# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -CONFIG_TOUCHSCREEN_EDT_FT5X06=m -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_PIXCIR is not set -# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC_SERIO is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_RM_TS is not set -# CONFIG_TOUCHSCREEN_SILEAD is not set -# CONFIG_TOUCHSCREEN_SIS_I2C is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_STMFTS is not set -# CONFIG_TOUCHSCREEN_SUN4I is not set -# CONFIG_TOUCHSCREEN_SUR40 is not set -# CONFIG_TOUCHSCREEN_SX8654 is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -# CONFIG_TOUCHSCREEN_ZET6223 is not set -# CONFIG_TOUCHSCREEN_ZFORCE is not set -# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set -# CONFIG_TOUCHSCREEN_IQS5XX is not set -# CONFIG_TOUCHSCREEN_ZINITIX is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_ATMEL_CAPTOUCH is not set -# CONFIG_INPUT_BMA150 is not set -# CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GPIO_BEEPER is not set -# CONFIG_INPUT_GPIO_DECODER is not set -CONFIG_INPUT_GPIO_VIBRA=m -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_KXTJ9 is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -# CONFIG_INPUT_REGULATOR_HAPTIC is not set -CONFIG_INPUT_AXP20X_PEK=y -CONFIG_INPUT_UINPUT=m -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_PWM_BEEPER is not set -# CONFIG_INPUT_PWM_VIBRA is not set -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_IMS_PCU is not set -# CONFIG_INPUT_IQS269A is not set -# CONFIG_INPUT_CMA3000 is not set -# CONFIG_INPUT_XEN_KBDDEV_FRONTEND is not set -# CONFIG_INPUT_DRV260X_HAPTICS is not set -# CONFIG_INPUT_DRV2665_HAPTICS is not set -# CONFIG_INPUT_DRV2667_HAPTICS is not set -# CONFIG_RMI4_CORE is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_AMBAKMI is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_SERIO_ARC_PS2 is not set -# CONFIG_SERIO_APBPS2 is not set -# CONFIG_SERIO_SUN4I_PS2 is not set -# CONFIG_SERIO_GPIO_PS2 is not set -# CONFIG_USERIO is not set -# CONFIG_GAMEPORT is not set -# end of Hardware I/O ports -# end of Input device support - -# -# Character devices -# -CONFIG_TTY=y -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_LDISC_AUTOLOAD=y - -# -# Serial drivers -# -CONFIG_SERIAL_EARLYCON=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -# CONFIG_SERIAL_8250_16550A_VARIANTS is not set -# CONFIG_SERIAL_8250_FINTEK is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_DMA=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_ASPEED_VUART is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -# CONFIG_SERIAL_8250_RSA is not set -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_DW=y -# CONFIG_SERIAL_8250_RT288X is not set -CONFIG_SERIAL_OF_PLATFORM=y - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_AMBA_PL010 is not set -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set -# CONFIG_SERIAL_UARTLITE is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_SIFIVE is not set -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_SC16IS7XX is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -CONFIG_SERIAL_XILINX_PS_UART=y -CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_SERIAL_FSL_LINFLEXUART is not set -# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set -# CONFIG_SERIAL_SPRD is not set -# end of Serial drivers - -CONFIG_SERIAL_MCTRL_GPIO=y -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_NULL_TTY is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_HVC_XEN is not set -# CONFIG_HVC_DCC is not set -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -# CONFIG_VIRTIO_CONSOLE is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_IPMB_DEVICE_INTERFACE is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_HW_RANDOM_BA431 is not set -CONFIG_HW_RANDOM_OPTEE=m -# CONFIG_HW_RANDOM_CCTRNG is not set -# CONFIG_HW_RANDOM_XIPHERA is not set -CONFIG_DEVMEM=y -# CONFIG_RAW_DRIVER is not set -CONFIG_TCG_TPM=y -# CONFIG_TCG_TIS is not set -# CONFIG_TCG_TIS_I2C_ATMEL is not set -CONFIG_TCG_TIS_I2C_INFINEON=y -# CONFIG_TCG_TIS_I2C_NUVOTON is not set -# CONFIG_TCG_XEN is not set -# CONFIG_TCG_VTPM_PROXY is not set -# CONFIG_TCG_FTPM_TEE is not set -# CONFIG_TCG_TIS_ST33ZP24_I2C is not set -# CONFIG_XILLYBUS is not set -# end of Character devices - -# CONFIG_RANDOM_TRUST_CPU is not set -# CONFIG_RANDOM_TRUST_BOOTLOADER is not set - -# -# I2C support -# -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MUX=y - -# -# Multiplexer I2C Chip support -# -# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set -# CONFIG_I2C_MUX_GPIO is not set -# CONFIG_I2C_MUX_GPMUX is not set -# CONFIG_I2C_MUX_LTC4306 is not set -# CONFIG_I2C_MUX_PCA9541 is not set -CONFIG_I2C_MUX_PCA954x=y -# CONFIG_I2C_MUX_PINCTRL is not set -# CONFIG_I2C_MUX_REG is not set -# CONFIG_I2C_DEMUX_PINCTRL is not set -# CONFIG_I2C_MUX_MLXCPLD is not set -# end of Multiplexer I2C Chip support - -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_CADENCE is not set -# CONFIG_I2C_CBUS_GPIO is not set -CONFIG_I2C_DESIGNWARE_CORE=y -# CONFIG_I2C_DESIGNWARE_SLAVE is not set -CONFIG_I2C_DESIGNWARE_PLATFORM=y -# CONFIG_I2C_EMEV2 is not set -CONFIG_I2C_GPIO=m -# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set -CONFIG_I2C_MV64XXX=y -# CONFIG_I2C_NOMADIK is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PCA_PLATFORM is not set -CONFIG_I2C_RK3X=y -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_ROBOTFUZZ_OSIF is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# end of I2C Hardware Bus support - -# CONFIG_I2C_STUB is not set -CONFIG_I2C_SLAVE=y -# CONFIG_I2C_SLAVE_EEPROM is not set -# CONFIG_I2C_SLAVE_TESTUNIT is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# end of I2C support - -# CONFIG_I3C is not set -# CONFIG_SPI is not set -CONFIG_SPMI=y -# CONFIG_HSI is not set -# CONFIG_PPS is not set - -# -# PTP clock support -# -# CONFIG_PTP_1588_CLOCK is not set - -# -# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. -# -# end of PTP clock support - -CONFIG_PINCTRL=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_PINMUX=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_PINCONF=y -CONFIG_GENERIC_PINCONF=y -# CONFIG_DEBUG_PINCTRL is not set -# CONFIG_PINCTRL_AXP209 is not set -# CONFIG_PINCTRL_MCP23S08 is not set -CONFIG_PINCTRL_SINGLE=y -# CONFIG_PINCTRL_SX150X is not set -# CONFIG_PINCTRL_STMFX is not set -# CONFIG_PINCTRL_OCELOT is not set - -# -# Renesas pinctrl drivers -# -# end of Renesas pinctrl drivers - -CONFIG_PINCTRL_SUNXI=y -# CONFIG_PINCTRL_SUN4I_A10 is not set -# CONFIG_PINCTRL_SUN5I is not set -# CONFIG_PINCTRL_SUN6I_A31 is not set -# CONFIG_PINCTRL_SUN6I_A31_R is not set -# CONFIG_PINCTRL_SUN8I_A23 is not set -# CONFIG_PINCTRL_SUN8I_A33 is not set -# CONFIG_PINCTRL_SUN8I_A83T is not set -# CONFIG_PINCTRL_SUN8I_A83T_R is not set -# CONFIG_PINCTRL_SUN8I_A23_R is not set -# CONFIG_PINCTRL_SUN8I_H3 is not set -CONFIG_PINCTRL_SUN8I_H3_R=y -# CONFIG_PINCTRL_SUN8I_V3S is not set -# CONFIG_PINCTRL_SUN9I_A80 is not set -# CONFIG_PINCTRL_SUN9I_A80_R is not set -CONFIG_PINCTRL_SUN50I_A64=y -CONFIG_PINCTRL_SUN50I_A64_R=y -CONFIG_PINCTRL_SUN50I_A100=y -CONFIG_PINCTRL_SUN50I_A100_R=y -CONFIG_PINCTRL_SUN50I_H5=y -CONFIG_PINCTRL_SUN50I_H6=y -CONFIG_PINCTRL_SUN50I_H6_R=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_FASTPATH_LIMIT=512 -CONFIG_OF_GPIO=y -CONFIG_GPIOLIB_IRQCHIP=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_CDEV_V1=y -CONFIG_GPIO_GENERIC=y - -# -# Memory mapped GPIO drivers -# -# CONFIG_GPIO_74XX_MMIO is not set -# CONFIG_GPIO_ALTERA is not set -# CONFIG_GPIO_CADENCE is not set -# CONFIG_GPIO_DWAPB is not set -# CONFIG_GPIO_FTGPIO010 is not set -CONFIG_GPIO_GENERIC_PLATFORM=y -# CONFIG_GPIO_GRGPIO is not set -# CONFIG_GPIO_HLWD is not set -# CONFIG_GPIO_LOGICVC is not set -CONFIG_GPIO_MB86S7X=y -CONFIG_GPIO_PL061=y -# CONFIG_GPIO_SAMA5D2_PIOBU is not set -# CONFIG_GPIO_SIFIVE is not set -# CONFIG_GPIO_SYSCON is not set -CONFIG_GPIO_XGENE=y -# CONFIG_GPIO_XILINX is not set -# CONFIG_GPIO_AMD_FCH is not set -# end of Memory mapped GPIO drivers - -# -# I2C GPIO expanders -# -# CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_ADNP is not set -# CONFIG_GPIO_GW_PLD is not set -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -# CONFIG_GPIO_PCA9570 is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_TPIC2810 is not set -# end of I2C GPIO expanders - -# -# MFD GPIO expanders -# -# end of MFD GPIO expanders - -# -# USB GPIO expanders -# -# end of USB GPIO expanders - -# CONFIG_GPIO_AGGREGATOR is not set -# CONFIG_GPIO_MOCKUP is not set -# CONFIG_W1 is not set -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_BRCMSTB=y -# CONFIG_POWER_RESET_GPIO is not set -# CONFIG_POWER_RESET_GPIO_RESTART is not set -# CONFIG_POWER_RESET_LTC2952 is not set -# CONFIG_POWER_RESET_RESTART is not set -CONFIG_POWER_RESET_XGENE=y -CONFIG_POWER_RESET_SYSCON=y -# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set -CONFIG_REBOOT_MODE=y -CONFIG_SYSCON_REBOOT_MODE=y -# CONFIG_NVMEM_REBOOT_MODE is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -CONFIG_POWER_SUPPLY_HWMON=y -# CONFIG_PDA_POWER is not set -# CONFIG_GENERIC_ADC_BATTERY is not set -# CONFIG_TEST_POWER is not set -# CONFIG_CHARGER_ADP5061 is not set -# CONFIG_BATTERY_CW2015 is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_SBS is not set -# CONFIG_CHARGER_SBS is not set -# CONFIG_MANAGER_SBS is not set -CONFIG_BATTERY_BQ27XXX=y -CONFIG_BATTERY_BQ27XXX_I2C=y -# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set -CONFIG_CHARGER_AXP20X=y -CONFIG_BATTERY_AXP20X=y -CONFIG_AXP20X_POWER=y -CONFIG_AXP288_FUEL_GAUGE=y -# CONFIG_BATTERY_MAX17040 is not set -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_CHARGER_ISP1704 is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_MANAGER is not set -# CONFIG_CHARGER_LT3651 is not set -# CONFIG_CHARGER_DETECTOR_MAX14656 is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set -# CONFIG_CHARGER_BQ2515X is not set -# CONFIG_CHARGER_BQ25890 is not set -# CONFIG_CHARGER_BQ25980 is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_BATTERY_GAUGE_LTC2941 is not set -# CONFIG_CHARGER_RT9455 is not set -# CONFIG_CHARGER_UCS1002 is not set -# CONFIG_CHARGER_BD99954 is not set -CONFIG_HWMON=y -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM1177 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7410 is not set -# CONFIG_SENSORS_ADT7411 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_AS370 is not set -# CONFIG_SENSORS_ASC7621 is not set -# CONFIG_SENSORS_AXI_FAN_CONTROL is not set -CONFIG_SENSORS_ARM_SCPI=y -# CONFIG_SENSORS_ASPEED is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_CORSAIR_CPRO is not set -# CONFIG_SENSORS_DS620 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_FTSTEUTATES is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_G762 is not set -# CONFIG_SENSORS_GPIO_FAN is not set -# CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_IIO_HWMON is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_POWR1220 is not set -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LTC2945 is not set -# CONFIG_SENSORS_LTC2947_I2C is not set -# CONFIG_SENSORS_LTC2990 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4222 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4260 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_MAX31730 is not set -# CONFIG_SENSORS_MAX6621 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_MAX6697 is not set -# CONFIG_SENSORS_MAX31790 is not set -# CONFIG_SENSORS_MCP3021 is not set -# CONFIG_SENSORS_TC654 is not set -# CONFIG_SENSORS_MR75203 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LM95234 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_LM95245 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_NTC_THERMISTOR is not set -# CONFIG_SENSORS_NCT6683 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_NCT7802 is not set -# CONFIG_SENSORS_NCT7904 is not set -# CONFIG_SENSORS_NPCM7XX is not set -# CONFIG_SENSORS_OCC_P8_I2C is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_PWM_FAN is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SHT3x is not set -# CONFIG_SENSORS_SHTC1 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_SCH5636 is not set -# CONFIG_SENSORS_STTS751 is not set -# CONFIG_SENSORS_SMM665 is not set -# CONFIG_SENSORS_ADC128D818 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_AMC6821 is not set -# CONFIG_SENSORS_INA209 is not set -# CONFIG_SENSORS_INA2XX is not set -# CONFIG_SENSORS_INA3221 is not set -# CONFIG_SENSORS_TC74 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP102 is not set -# CONFIG_SENSORS_TMP103 is not set -# CONFIG_SENSORS_TMP108 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_TMP513 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83773G is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -CONFIG_THERMAL=y -# CONFIG_THERMAL_NETLINK is not set -CONFIG_THERMAL_STATISTICS=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set -# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set -CONFIG_THERMAL_GOV_FAIR_SHARE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_BANG_BANG=y -# CONFIG_THERMAL_GOV_USER_SPACE is not set -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_FREQ_THERMAL=y -CONFIG_DEVFREQ_THERMAL=y -CONFIG_THERMAL_EMULATION=y -# CONFIG_THERMAL_MMIO is not set -CONFIG_SUN8I_THERMAL=y -# CONFIG_GENERIC_ADC_THERMAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WATCHDOG_NOWAYOUT is not set -CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y -CONFIG_WATCHDOG_OPEN_TIMEOUT=0 -# CONFIG_WATCHDOG_SYSFS is not set - -# -# Watchdog Pretimeout Governors -# -# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_GPIO_WATCHDOG is not set -# CONFIG_XILINX_WATCHDOG is not set -# CONFIG_ZIIRAVE_WATCHDOG is not set -CONFIG_ARM_SP805_WATCHDOG=y -# CONFIG_ARM_SBSA_WATCHDOG is not set -# CONFIG_CADENCE_WATCHDOG is not set -# CONFIG_DW_WATCHDOG is not set -# CONFIG_SUNXI_WATCHDOG is not set -# CONFIG_MAX63XX_WATCHDOG is not set -# CONFIG_ARM_SMC_WATCHDOG is not set -# CONFIG_MEN_A21_WDT is not set -# CONFIG_XEN_WDT is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set -CONFIG_BCMA_POSSIBLE=y -# CONFIG_BCMA is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_ACT8945A is not set -# CONFIG_MFD_SUN4I_GPADC is not set -# CONFIG_MFD_AS3711 is not set -# CONFIG_MFD_AS3722 is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_AAT2870_CORE is not set -# CONFIG_MFD_ATMEL_FLEXCOM is not set -# CONFIG_MFD_ATMEL_HLCDC is not set -# CONFIG_MFD_BCM590XX is not set -# CONFIG_MFD_BD9571MWV is not set -CONFIG_MFD_AC100=m -CONFIG_MFD_AXP20X=y -# CONFIG_MFD_AXP20X_I2C is not set -CONFIG_MFD_AXP20X_RSB=y -# CONFIG_MFD_MADERA is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_MFD_DA9052_I2C is not set -# CONFIG_MFD_DA9055 is not set -# CONFIG_MFD_DA9062 is not set -# CONFIG_MFD_DA9063 is not set -# CONFIG_MFD_DA9150 is not set -# CONFIG_MFD_DLN2 is not set -# CONFIG_MFD_GATEWORKS_GSC is not set -# CONFIG_MFD_MC13XXX_I2C is not set -# CONFIG_MFD_MP2629 is not set -# CONFIG_MFD_HI6421_PMIC is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set -# CONFIG_MFD_IQS62X is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_MFD_88PM800 is not set -# CONFIG_MFD_88PM805 is not set -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_MAX14577 is not set -# CONFIG_MFD_MAX77620 is not set -# CONFIG_MFD_MAX77650 is not set -# CONFIG_MFD_MAX77686 is not set -# CONFIG_MFD_MAX77693 is not set -# CONFIG_MFD_MAX77843 is not set -# CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_MFD_MT6360 is not set -# CONFIG_MFD_MT6397 is not set -# CONFIG_MFD_MENF21BMC is not set -# CONFIG_MFD_VIPERBOARD is not set -# CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_RT5033 is not set -# CONFIG_MFD_RC5T583 is not set -# CONFIG_MFD_RK808 is not set -# CONFIG_MFD_RN5T618 is not set -# CONFIG_MFD_SEC_CORE is not set -# CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_SKY81452 is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_MFD_STMPE is not set -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_LP3943 is not set -# CONFIG_MFD_LP8788 is not set -# CONFIG_MFD_TI_LMU is not set -# CONFIG_MFD_PALMAS is not set -# CONFIG_TPS6105X is not set -# CONFIG_TPS65010 is not set -# CONFIG_TPS6507X is not set -# CONFIG_MFD_TPS65086 is not set -# CONFIG_MFD_TPS65090 is not set -# CONFIG_MFD_TPS65217 is not set -# CONFIG_MFD_TI_LP873X is not set -# CONFIG_MFD_TI_LP87565 is not set -# CONFIG_MFD_TPS65218 is not set -# CONFIG_MFD_TPS6586X is not set -# CONFIG_MFD_TPS65910 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_TPS80031 is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_TWL6040_CORE is not set -# CONFIG_MFD_WL1273_CORE is not set -# CONFIG_MFD_LM3533 is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TQMX86 is not set -# CONFIG_MFD_LOCHNAGAR is not set -# CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_ROHM_BD718XX is not set -# CONFIG_MFD_ROHM_BD70528 is not set -# CONFIG_MFD_ROHM_BD71828 is not set -# CONFIG_MFD_STPMIC1 is not set -# CONFIG_MFD_STMFX is not set -# CONFIG_RAVE_SP_CORE is not set -# end of Multifunction device drivers - -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER_OF is not set -# CONFIG_REGULATOR_88PG86X is not set -# CONFIG_REGULATOR_ACT8865 is not set -# CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_AXP20X=y -# CONFIG_REGULATOR_DA9210 is not set -# CONFIG_REGULATOR_DA9211 is not set -CONFIG_REGULATOR_FAN53555=y -# CONFIG_REGULATOR_FAN53880 is not set -CONFIG_REGULATOR_GPIO=y -# CONFIG_REGULATOR_ISL9305 is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -# CONFIG_REGULATOR_LP872X is not set -# CONFIG_REGULATOR_LP8755 is not set -# CONFIG_REGULATOR_LTC3589 is not set -# CONFIG_REGULATOR_LTC3676 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -# CONFIG_REGULATOR_MAX8973 is not set -# CONFIG_REGULATOR_MAX77826 is not set -# CONFIG_REGULATOR_MCP16502 is not set -# CONFIG_REGULATOR_MP5416 is not set -# CONFIG_REGULATOR_MP8859 is not set -# CONFIG_REGULATOR_MP886X is not set -# CONFIG_REGULATOR_MPQ7920 is not set -# CONFIG_REGULATOR_MT6311 is not set -# CONFIG_REGULATOR_PCA9450 is not set -# CONFIG_REGULATOR_PFUZE100 is not set -# CONFIG_REGULATOR_PV88060 is not set -# CONFIG_REGULATOR_PV88080 is not set -# CONFIG_REGULATOR_PV88090 is not set -CONFIG_REGULATOR_PWM=y -# CONFIG_REGULATOR_QCOM_SPMI is not set -# CONFIG_REGULATOR_QCOM_USB_VBUS is not set -# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set -# CONFIG_REGULATOR_RT4801 is not set -# CONFIG_REGULATOR_RTMV20 is not set -# CONFIG_REGULATOR_SLG51000 is not set -# CONFIG_REGULATOR_SY8106A is not set -# CONFIG_REGULATOR_SY8824X is not set -# CONFIG_REGULATOR_SY8827N is not set -# CONFIG_REGULATOR_TPS51632 is not set -# CONFIG_REGULATOR_TPS62360 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_TPS65132 is not set -CONFIG_REGULATOR_VCTRL=y -# CONFIG_REGULATOR_QCOM_LABIBB is not set -# CONFIG_REGULATOR_TP65185X is not set -# CONFIG_RC_CORE is not set -# CONFIG_MEDIA_CEC_SUPPORT is not set -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_SUPPORT_FILTER=y -# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set - -# -# Media device types -# -CONFIG_MEDIA_CAMERA_SUPPORT=y -# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set -# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_PLATFORM_SUPPORT=y -# CONFIG_MEDIA_TEST_SUPPORT is not set -# end of Media device types - -CONFIG_VIDEO_DEV=y -CONFIG_MEDIA_CONTROLLER=y - -# -# Video4Linux options -# -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L2_I2C=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_V4L2_MEM2MEM_DEV=y -CONFIG_V4L2_FLASH_LED_CLASS=y -CONFIG_V4L2_FWNODE=y -# end of Video4Linux options - -# -# Media controller options -# -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y - -# -# Please notice that the enabled Media controller Request API is EXPERIMENTAL -# -# end of Media controller options - -# -# Media drivers -# - -# -# Drivers filtered as selected at 'Filter media drivers' -# -CONFIG_MEDIA_USB_SUPPORT=y - -# -# Webcam devices -# -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_BENQ is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_CPIA1 is not set -# CONFIG_USB_GSPCA_DTCS033 is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_JL2005BCD is not set -# CONFIG_USB_GSPCA_KINECT is not set -# CONFIG_USB_GSPCA_KONICA is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_NW80X is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_OV534_9 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SE401 is not set -# CONFIG_USB_GSPCA_SN9C2028 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SPCA1528 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_SQ930X is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STK1135 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TOPRO is not set -# CONFIG_USB_GSPCA_TOUPTEK is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_VICAM is not set -# CONFIG_USB_GSPCA_XIRLINK_CIT is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -# CONFIG_USB_PWC is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_VIDEO_USBTV is not set - -# -# Webcam, TV (analog/digital) USB devices -# -# CONFIG_VIDEO_EM28XX is not set -CONFIG_VIDEOBUF2_CORE=y -CONFIG_VIDEOBUF2_V4L2=y -CONFIG_VIDEOBUF2_MEMOPS=y -CONFIG_VIDEOBUF2_DMA_CONTIG=y -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_V4L_PLATFORM_DRIVERS=y -# CONFIG_VIDEO_CADENCE is not set -# CONFIG_VIDEO_ASPEED is not set -# CONFIG_VIDEO_MUX is not set -# CONFIG_VIDEO_XILINX is not set -# CONFIG_VIDEO_SUN4I_CSI is not set -CONFIG_VIDEO_SUN6I_CSI=y -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_DEINTERLACE=y -CONFIG_VIDEO_SUN8I_DEINTERLACE=y -CONFIG_VIDEO_SUN8I_ROTATE=y -# end of Media drivers - -# -# Media ancillary drivers -# - -# -# Audio decoders, processors and mixers -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA1997X is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS3308 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_UDA1342 is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set -# CONFIG_VIDEO_SONY_BTF_MPX is not set -# end of Audio decoders, processors and mixers - -# -# RDS decoders -# -# CONFIG_VIDEO_SAA6588 is not set -# end of RDS decoders - -# -# Video decoders -# -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_ADV7183 is not set -# CONFIG_VIDEO_ADV748X is not set -# CONFIG_VIDEO_ADV7604 is not set -# CONFIG_VIDEO_ADV7842 is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_ML86V7667 is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_TC358743 is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_TVP7002 is not set -# CONFIG_VIDEO_TW2804 is not set -# CONFIG_VIDEO_TW9903 is not set -# CONFIG_VIDEO_TW9906 is not set -# CONFIG_VIDEO_TW9910 is not set -# CONFIG_VIDEO_VPX3220 is not set -# CONFIG_VIDEO_MAX9286 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_CX25840 is not set -# end of Video decoders - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_ADV7343 is not set -# CONFIG_VIDEO_ADV7393 is not set -# CONFIG_VIDEO_ADV7511 is not set -# CONFIG_VIDEO_AD9389B is not set -# CONFIG_VIDEO_AK881X is not set -# CONFIG_VIDEO_THS8200 is not set -# end of Video encoders - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# end of Video improvement chips - -# -# Audio/Video compression chips -# -# CONFIG_VIDEO_SAA6752HS is not set -# end of Audio/Video compression chips - -# -# SDR tuner chips -# -# end of SDR tuner chips - -# -# Miscellaneous helper chips -# -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_I2C is not set -# CONFIG_VIDEO_ST_MIPID02 is not set -# end of Miscellaneous helper chips - -# -# Camera sensor devices -# -# CONFIG_VIDEO_HI556 is not set -# CONFIG_VIDEO_IMX214 is not set -# CONFIG_VIDEO_IMX219 is not set -# CONFIG_VIDEO_IMX258 is not set -# CONFIG_VIDEO_IMX274 is not set -# CONFIG_VIDEO_IMX290 is not set -# CONFIG_VIDEO_IMX319 is not set -# CONFIG_VIDEO_IMX355 is not set -# CONFIG_VIDEO_OV2640 is not set -# CONFIG_VIDEO_OV2659 is not set -# CONFIG_VIDEO_OV2680 is not set -# CONFIG_VIDEO_OV2685 is not set -CONFIG_VIDEO_OV5640=m -# CONFIG_VIDEO_OV5645 is not set -# CONFIG_VIDEO_OV5647 is not set -# CONFIG_VIDEO_OV6650 is not set -# CONFIG_VIDEO_OV5670 is not set -# CONFIG_VIDEO_OV5675 is not set -# CONFIG_VIDEO_OV5695 is not set -# CONFIG_VIDEO_OV7251 is not set -# CONFIG_VIDEO_OV772X is not set -# CONFIG_VIDEO_OV7640 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_OV7740 is not set -# CONFIG_VIDEO_OV8856 is not set -# CONFIG_VIDEO_OV9640 is not set -# CONFIG_VIDEO_OV9650 is not set -# CONFIG_VIDEO_OV13858 is not set -# CONFIG_VIDEO_VS6624 is not set -# CONFIG_VIDEO_MT9M001 is not set -# CONFIG_VIDEO_MT9M032 is not set -# CONFIG_VIDEO_MT9M111 is not set -# CONFIG_VIDEO_MT9P031 is not set -# CONFIG_VIDEO_MT9T001 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V032 is not set -# CONFIG_VIDEO_MT9V111 is not set -# CONFIG_VIDEO_SR030PC30 is not set -# CONFIG_VIDEO_NOON010PC30 is not set -# CONFIG_VIDEO_M5MOLS is not set -# CONFIG_VIDEO_RDACM20 is not set -# CONFIG_VIDEO_RJ54N1 is not set -# CONFIG_VIDEO_S5K6AA is not set -# CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_S5K4ECGX is not set -# CONFIG_VIDEO_S5K5BAF is not set -# CONFIG_VIDEO_SMIAPP is not set -# CONFIG_VIDEO_ET8EK8 is not set -# CONFIG_VIDEO_HM5065 is not set -CONFIG_VIDEO_GC2145=m -# end of Camera sensor devices - -# -# Lens drivers -# -# CONFIG_VIDEO_AD5820 is not set -# CONFIG_VIDEO_AK7375 is not set -# CONFIG_VIDEO_DW9714 is not set -# CONFIG_VIDEO_DW9768 is not set -# CONFIG_VIDEO_DW9807_VCM is not set -# end of Lens drivers - -# -# Flash devices -# -# CONFIG_VIDEO_ADP1653 is not set -# CONFIG_VIDEO_LM3560 is not set -# CONFIG_VIDEO_LM3646 is not set -# end of Flash devices - -# -# SPI helper chips -# -# end of SPI helper chips -# end of Media ancillary drivers - -# -# Graphics support -# -CONFIG_DRM=y -CONFIG_DRM_MIPI_DSI=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DEBUG_MM is not set -# CONFIG_DRM_DEBUG_SELFTEST is not set -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -# CONFIG_DRM_DP_CEC is not set -CONFIG_DRM_GEM_CMA_HELPER=y -CONFIG_DRM_KMS_CMA_HELPER=y -CONFIG_DRM_GEM_SHMEM_HELPER=y -CONFIG_DRM_SCHED=y - -# -# I2C encoder or helper chips -# -CONFIG_DRM_I2C_CH7006=m -CONFIG_DRM_I2C_SIL164=m -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - -# -# ARM devices -# -# CONFIG_DRM_HDLCD is not set -CONFIG_DRM_MALI_DISPLAY=m -# CONFIG_DRM_KOMEDA is not set -# end of ARM devices - -# CONFIG_DRM_VGEM is not set -# CONFIG_DRM_VKMS is not set -CONFIG_DRM_UDL=m -# CONFIG_DRM_RCAR_DW_HDMI is not set -# CONFIG_DRM_RCAR_LVDS is not set -CONFIG_DRM_SUN4I=y -CONFIG_DRM_SUN4I_HDMI=y -# CONFIG_DRM_SUN4I_HDMI_CEC is not set -CONFIG_DRM_SUN4I_BACKEND=y -CONFIG_DRM_SUN6I_DSI=y -CONFIG_DRM_SUN8I_DW_HDMI=y -CONFIG_DRM_SUN8I_MIXER=y -CONFIG_DRM_SUN8I_TCON_TOP=y -CONFIG_DRM_PANEL=y - -# -# Display Panels -# -# CONFIG_DRM_PANEL_ARM_VERSATILE is not set -# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set -# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set -# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=y -# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set -CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=y -CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=y -CONFIG_DRM_PANEL_ILITEK_ILI9881C=y -# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set -# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set -# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set -# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set -# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set -# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set -# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set -# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set -# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set -# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set -# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set -# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set -CONFIG_DRM_PANEL_SITRONIX_ST7703=y -# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set -# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set -# end of Display Panels - -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_PANEL_BRIDGE=y - -# -# Display Interface Bridges -# -# CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_CHRONTEL_CH7033 is not set -# CONFIG_DRM_DISPLAY_CONNECTOR is not set -# CONFIG_DRM_LONTIUM_LT9611 is not set -# CONFIG_DRM_LVDS_CODEC is not set -# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set -# CONFIG_DRM_NWL_MIPI_DSI is not set -# CONFIG_DRM_NXP_PTN3460 is not set -# CONFIG_DRM_PARADE_PS8622 is not set -# CONFIG_DRM_PARADE_PS8640 is not set -# CONFIG_DRM_SIL_SII8620 is not set -# CONFIG_DRM_SII902X is not set -# CONFIG_DRM_SII9234 is not set -# CONFIG_DRM_SIMPLE_BRIDGE is not set -# CONFIG_DRM_THINE_THC63LVD1024 is not set -# CONFIG_DRM_TOSHIBA_TC358762 is not set -# CONFIG_DRM_TOSHIBA_TC358764 is not set -# CONFIG_DRM_TOSHIBA_TC358767 is not set -# CONFIG_DRM_TOSHIBA_TC358768 is not set -# CONFIG_DRM_TOSHIBA_TC358775 is not set -# CONFIG_DRM_TI_TFP410 is not set -# CONFIG_DRM_TI_SN65DSI86 is not set -# CONFIG_DRM_TI_TPD12S015 is not set -# CONFIG_DRM_ANALOGIX_ANX6345 is not set -# CONFIG_DRM_ANALOGIX_ANX78XX is not set -# CONFIG_DRM_I2C_ADV7511 is not set -# CONFIG_DRM_CDNS_MHDP8546 is not set -CONFIG_DRM_DW_HDMI=y -# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set -# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set -# CONFIG_DRM_DW_HDMI_CEC is not set -# end of Display Interface Bridges - -# CONFIG_DRM_ETNAVIV is not set -# CONFIG_DRM_ARCPGU is not set -# CONFIG_DRM_HISI_KIRIN is not set -# CONFIG_DRM_MXSFB is not set -# CONFIG_DRM_GM12U320 is not set -# CONFIG_DRM_PL111 is not set -# CONFIG_DRM_XEN is not set -CONFIG_DRM_LIMA=y -# CONFIG_DRM_PANFROST is not set -# CONFIG_DRM_TIDSS is not set -# CONFIG_DRM_LEGACY is not set -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y - -# -# Frame buffer Devices -# -CONFIG_FB_CMDLINE=y -CONFIG_FB_NOTIFY=y -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_IMAGEBLIT=y -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_ARMCLCD is not set -# CONFIG_FB_OPENCORES is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_SUN5I_EINK is not set -# CONFIG_FB_SMSCUFX is not set -CONFIG_FB_UDL=m -# CONFIG_FB_IBM_GXT4500 is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_XEN_FBDEV_FRONTEND is not set -# CONFIG_FB_METRONOME is not set -CONFIG_FB_SIMPLE=y -# CONFIG_FB_SSD1307 is not set -# end of Frame buffer Devices - -# -# Backlight & LCD device support -# -CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_PLATFORM is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_BACKLIGHT_KTD253 is not set -CONFIG_BACKLIGHT_PWM=y -# CONFIG_BACKLIGHT_QCOM_WLED is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_LM3630A is not set -# CONFIG_BACKLIGHT_LM3639 is not set -# CONFIG_BACKLIGHT_LP855X is not set -# CONFIG_BACKLIGHT_GPIO is not set -# CONFIG_BACKLIGHT_LV5207LP is not set -# CONFIG_BACKLIGHT_BD6107 is not set -# CONFIG_BACKLIGHT_ARCXCNN is not set -# CONFIG_BACKLIGHT_LED is not set -# end of Backlight & LCD device support - -CONFIG_VIDEOMODE_HELPERS=y -CONFIG_HDMI=y - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_DUMMY_CONSOLE_COLUMNS=80 -CONFIG_DUMMY_CONSOLE_ROWS=25 -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set -# end of Console display driver support - -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -# end of Graphics support - -CONFIG_SOUND=m -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -CONFIG_SND_DMAENGINE_PCM=m -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -CONFIG_SND_JACK_INPUT_DEV=y -# CONFIG_SND_OSSEMUL is not set -CONFIG_SND_PCM_TIMER=y -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_PROC_FS=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_SEQUENCER is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -CONFIG_SND_ALOOP=m -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# HD-Audio -# -# end of HD-Audio - -CONFIG_SND_HDA_PREALLOC_SIZE=64 -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y -# CONFIG_SND_USB_UA101 is not set -# CONFIG_SND_USB_CAIAQ is not set -# CONFIG_SND_USB_6FIRE is not set -# CONFIG_SND_USB_HIFACE is not set -# CONFIG_SND_BCD2000 is not set -# CONFIG_SND_USB_POD is not set -# CONFIG_SND_USB_PODHD is not set -# CONFIG_SND_USB_TONEPORT is not set -# CONFIG_SND_USB_VARIAX is not set -CONFIG_SND_SOC=m -CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y -# CONFIG_SND_SOC_AMD_ACP is not set -# CONFIG_SND_ATMEL_SOC is not set -# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set -# CONFIG_SND_DESIGNWARE_I2S is not set - -# -# SoC Audio for Freescale CPUs -# - -# -# Common SoC Audio options for Freescale CPUs: -# -# CONFIG_SND_SOC_FSL_ASRC is not set -# CONFIG_SND_SOC_FSL_SAI is not set -# CONFIG_SND_SOC_FSL_AUDMIX is not set -# CONFIG_SND_SOC_FSL_SSI is not set -# CONFIG_SND_SOC_FSL_SPDIF is not set -# CONFIG_SND_SOC_FSL_ESAI is not set -# CONFIG_SND_SOC_FSL_MICFIL is not set -# CONFIG_SND_SOC_IMX_AUDMUX is not set -# end of SoC Audio for Freescale CPUs - -# CONFIG_SND_I2S_HI6210_I2S is not set -# CONFIG_SND_SOC_IMG is not set -# CONFIG_SND_SOC_MTK_BTCVSD is not set -# CONFIG_SND_SOC_SOF_TOPLEVEL is not set - -# -# STMicroelectronics STM32 SOC audio support -# -# end of STMicroelectronics STM32 SOC audio support - -# -# Allwinner SoC Audio support -# -CONFIG_SND_SUN4I_CODEC=m -CONFIG_SND_SUN8I_CODEC=m -CONFIG_SND_SUN8I_CODEC_ANALOG=m -CONFIG_SND_SUN50I_CODEC_ANALOG=m -CONFIG_SND_SUN4I_I2S=m -CONFIG_SND_SUN4I_SPDIF=m -CONFIG_SND_SUN8I_ADDA_PR_REGMAP=m -# end of Allwinner SoC Audio support - -# CONFIG_SND_SOC_XILINX_I2S is not set -# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set -# CONFIG_SND_SOC_XILINX_SPDIF is not set -# CONFIG_SND_SOC_XTFPGA_I2S is not set -# CONFIG_ZX_TDM is not set -CONFIG_SND_SOC_I2C_AND_SPI=m - -# -# CODEC drivers -# -# CONFIG_SND_SOC_AC97_CODEC is not set -# CONFIG_SND_SOC_ADAU1701 is not set -# CONFIG_SND_SOC_ADAU1761_I2C is not set -# CONFIG_SND_SOC_ADAU7002 is not set -# CONFIG_SND_SOC_ADAU7118_HW is not set -# CONFIG_SND_SOC_ADAU7118_I2C is not set -# CONFIG_SND_SOC_AK4118 is not set -# CONFIG_SND_SOC_AK4458 is not set -# CONFIG_SND_SOC_AK4554 is not set -CONFIG_SND_SOC_AK4613=m -# CONFIG_SND_SOC_AK4642 is not set -# CONFIG_SND_SOC_AK5386 is not set -# CONFIG_SND_SOC_AK5558 is not set -# CONFIG_SND_SOC_ALC5623 is not set -# CONFIG_SND_SOC_BD28623 is not set -CONFIG_SND_SOC_BT_SCO=m -# CONFIG_SND_SOC_CS35L32 is not set -# CONFIG_SND_SOC_CS35L33 is not set -# CONFIG_SND_SOC_CS35L34 is not set -# CONFIG_SND_SOC_CS35L35 is not set -# CONFIG_SND_SOC_CS35L36 is not set -# CONFIG_SND_SOC_CS42L42 is not set -# CONFIG_SND_SOC_CS42L51_I2C is not set -# CONFIG_SND_SOC_CS42L52 is not set -# CONFIG_SND_SOC_CS42L56 is not set -# CONFIG_SND_SOC_CS42L73 is not set -# CONFIG_SND_SOC_CS4234 is not set -# CONFIG_SND_SOC_CS4265 is not set -# CONFIG_SND_SOC_CS4270 is not set -# CONFIG_SND_SOC_CS4271_I2C is not set -# CONFIG_SND_SOC_CS42XX8_I2C is not set -# CONFIG_SND_SOC_CS43130 is not set -# CONFIG_SND_SOC_CS4341 is not set -# CONFIG_SND_SOC_CS4349 is not set -# CONFIG_SND_SOC_CS53L30 is not set -# CONFIG_SND_SOC_CX2072X is not set -# CONFIG_SND_SOC_DA7213 is not set -CONFIG_SND_SOC_DMIC=m -CONFIG_SND_SOC_EC25=m -# CONFIG_SND_SOC_ES7134 is not set -# CONFIG_SND_SOC_ES7241 is not set -# CONFIG_SND_SOC_ES8316 is not set -# CONFIG_SND_SOC_ES8328_I2C is not set -# CONFIG_SND_SOC_GTM601 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set -# CONFIG_SND_SOC_MAX98088 is not set -# CONFIG_SND_SOC_MAX98357A is not set -# CONFIG_SND_SOC_MAX98504 is not set -# CONFIG_SND_SOC_MAX9867 is not set -# CONFIG_SND_SOC_MAX98927 is not set -# CONFIG_SND_SOC_MAX98373_I2C is not set -# CONFIG_SND_SOC_MAX98390 is not set -# CONFIG_SND_SOC_MAX9860 is not set -# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set -# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set -# CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM1789_I2C is not set -# CONFIG_SND_SOC_PCM179X_I2C is not set -# CONFIG_SND_SOC_PCM186X_I2C is not set -# CONFIG_SND_SOC_PCM3060_I2C is not set -# CONFIG_SND_SOC_PCM3168A_I2C is not set -# CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_RK3328 is not set -# CONFIG_SND_SOC_RT5616 is not set -# CONFIG_SND_SOC_RT5631 is not set -# CONFIG_SND_SOC_SGTL5000 is not set -CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m -# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set -# CONFIG_SND_SOC_SPDIF is not set -# CONFIG_SND_SOC_SSM2305 is not set -# CONFIG_SND_SOC_SSM2602_I2C is not set -# CONFIG_SND_SOC_SSM4567 is not set -# CONFIG_SND_SOC_STA32X is not set -# CONFIG_SND_SOC_STA350 is not set -# CONFIG_SND_SOC_STI_SAS is not set -# CONFIG_SND_SOC_TAS2552 is not set -# CONFIG_SND_SOC_TAS2562 is not set -# CONFIG_SND_SOC_TAS2764 is not set -# CONFIG_SND_SOC_TAS2770 is not set -# CONFIG_SND_SOC_TAS5086 is not set -# CONFIG_SND_SOC_TAS571X is not set -# CONFIG_SND_SOC_TAS5720 is not set -# CONFIG_SND_SOC_TAS6424 is not set -# CONFIG_SND_SOC_TDA7419 is not set -# CONFIG_SND_SOC_TFA9879 is not set -# CONFIG_SND_SOC_TLV320AIC23_I2C is not set -# CONFIG_SND_SOC_TLV320AIC31XX is not set -# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set -# CONFIG_SND_SOC_TLV320AIC3X is not set -# CONFIG_SND_SOC_TLV320ADCX140 is not set -# CONFIG_SND_SOC_TS3A227E is not set -# CONFIG_SND_SOC_TSCS42XX is not set -# CONFIG_SND_SOC_TSCS454 is not set -# CONFIG_SND_SOC_UDA1334 is not set -# CONFIG_SND_SOC_WM8510 is not set -# CONFIG_SND_SOC_WM8523 is not set -# CONFIG_SND_SOC_WM8524 is not set -# CONFIG_SND_SOC_WM8580 is not set -# CONFIG_SND_SOC_WM8711 is not set -# CONFIG_SND_SOC_WM8728 is not set -# CONFIG_SND_SOC_WM8731 is not set -# CONFIG_SND_SOC_WM8737 is not set -# CONFIG_SND_SOC_WM8741 is not set -# CONFIG_SND_SOC_WM8750 is not set -# CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8776 is not set -# CONFIG_SND_SOC_WM8782 is not set -# CONFIG_SND_SOC_WM8804_I2C is not set -# CONFIG_SND_SOC_WM8903 is not set -# CONFIG_SND_SOC_WM8904 is not set -# CONFIG_SND_SOC_WM8960 is not set -# CONFIG_SND_SOC_WM8962 is not set -# CONFIG_SND_SOC_WM8974 is not set -# CONFIG_SND_SOC_WM8978 is not set -# CONFIG_SND_SOC_WM8985 is not set -# CONFIG_SND_SOC_ZX_AUD96P22 is not set -# CONFIG_SND_SOC_MAX9759 is not set -# CONFIG_SND_SOC_MT6351 is not set -# CONFIG_SND_SOC_MT6358 is not set -# CONFIG_SND_SOC_MT6660 is not set -# CONFIG_SND_SOC_NAU8540 is not set -# CONFIG_SND_SOC_NAU8810 is not set -# CONFIG_SND_SOC_NAU8822 is not set -# CONFIG_SND_SOC_NAU8824 is not set -# CONFIG_SND_SOC_TPA6130A2 is not set -# end of CODEC drivers - -CONFIG_SND_SIMPLE_CARD_UTILS=m -CONFIG_SND_SIMPLE_CARD=m -CONFIG_SND_AUDIO_GRAPH_CARD=m -# CONFIG_SND_XEN_FRONTEND is not set - -# -# HID support -# -CONFIG_HID=y -CONFIG_HID_BATTERY_STRENGTH=y -CONFIG_HIDRAW=y -CONFIG_UHID=y -CONFIG_HID_GENERIC=y - -# -# Special HID drivers -# -CONFIG_HID_A4TECH=y -# CONFIG_HID_ACCUTOUCH is not set -# CONFIG_HID_ACRUX is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_APPLEIR is not set -# CONFIG_HID_ASUS is not set -# CONFIG_HID_AUREAL is not set -CONFIG_HID_BELKIN=y -# CONFIG_HID_BETOP_FF is not set -# CONFIG_HID_BIGBEN_FF is not set -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -# CONFIG_HID_CORSAIR is not set -# CONFIG_HID_COUGAR is not set -# CONFIG_HID_MACALLY is not set -# CONFIG_HID_PRODIKEYS is not set -# CONFIG_HID_CMEDIA is not set -# CONFIG_HID_CP2112 is not set -# CONFIG_HID_CREATIVE_SB0540 is not set -CONFIG_HID_CYPRESS=y -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_ELAN is not set -# CONFIG_HID_ELECOM is not set -# CONFIG_HID_ELO is not set -CONFIG_HID_EZKEY=y -# CONFIG_HID_GEMBIRD is not set -# CONFIG_HID_GFRM is not set -# CONFIG_HID_GLORIOUS is not set -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_VIVALDI is not set -# CONFIG_HID_GT683R is not set -# CONFIG_HID_KEYTOUCH is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_WALTOP is not set -# CONFIG_HID_VIEWSONIC is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_ICADE is not set -CONFIG_HID_ITE=y -# CONFIG_HID_JABRA is not set -# CONFIG_HID_TWINHAN is not set -CONFIG_HID_KENSINGTON=y -# CONFIG_HID_LCPOWER is not set -# CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set -CONFIG_HID_LOGITECH=y -CONFIG_HID_LOGITECH_DJ=y -CONFIG_HID_LOGITECH_HIDPP=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIWHEELS_FF is not set -# CONFIG_HID_MAGICMOUSE is not set -# CONFIG_HID_MALTRON is not set -# CONFIG_HID_MAYFLASH is not set -CONFIG_HID_REDRAGON=y -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -CONFIG_HID_MULTITOUCH=y -# CONFIG_HID_NTI is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_ORTEK is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PENMOUNT is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_PICOLCD is not set -# CONFIG_HID_PLANTRONICS is not set -# CONFIG_HID_PRIMAX is not set -# CONFIG_HID_RETRODE is not set -# CONFIG_HID_ROCCAT is not set -# CONFIG_HID_SAITEK is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SPEEDLINK is not set -# CONFIG_HID_STEAM is not set -# CONFIG_HID_STEELSERIES is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_RMI is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TIVO is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THINGM is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_UDRAW_PS3 is not set -# CONFIG_HID_U2FZERO is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_WIIMOTE is not set -# CONFIG_HID_XINMO is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -# CONFIG_HID_SENSOR_HUB is not set -# CONFIG_HID_ALPS is not set -# CONFIG_HID_MCP2221 is not set -# end of Special HID drivers - -# -# USB HID support -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set -# end of USB HID support - -# -# I2C HID support -# -CONFIG_I2C_HID=m -# end of I2C HID support -# end of HID support - -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_COMMON=y -# CONFIG_USB_LED_TRIG is not set -CONFIG_USB_ULPI_BUS=y -# CONFIG_USB_CONN_GPIO is not set -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB=y -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEFAULT_PERSIST=y -# CONFIG_USB_FEW_INIT_RETRIES is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_OTG=y -# CONFIG_USB_OTG_PRODUCTLIST is not set -# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set -# CONFIG_USB_OTG_FSM is not set -# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set -CONFIG_USB_AUTOSUSPEND_DELAY=2 -# CONFIG_USB_MON is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_XHCI_HCD=y -# CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_EHCI_FSL is not set -CONFIG_USB_EHCI_HCD_PLATFORM=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_FOTG210_HCD is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HCD_TEST_MODE is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -CONFIG_USB_WDM=m -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_REALTEK is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set -# CONFIG_USB_UAS is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USBIP_CORE is not set -# CONFIG_USB_CDNS3 is not set -CONFIG_USB_MUSB_HDRC=y -# CONFIG_USB_MUSB_HOST is not set -# CONFIG_USB_MUSB_GADGET is not set -CONFIG_USB_MUSB_DUAL_ROLE=y - -# -# Platform Glue Layer -# -CONFIG_USB_MUSB_SUNXI=y - -# -# MUSB DMA mode -# -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_USB_DWC3=y -# CONFIG_USB_DWC3_ULPI is not set -# CONFIG_USB_DWC3_HOST is not set -# CONFIG_USB_DWC3_GADGET is not set -CONFIG_USB_DWC3_DUAL_ROLE=y - -# -# Platform Glue Driver Support -# -CONFIG_USB_DWC3_OF_SIMPLE=y -CONFIG_USB_DWC2=y -# CONFIG_USB_DWC2_HOST is not set - -# -# Gadget/Dual-role mode requires USB Gadget support to be enabled -# -# CONFIG_USB_DWC2_PERIPHERAL is not set -CONFIG_USB_DWC2_DUAL_ROLE=y -# CONFIG_USB_DWC2_DEBUG is not set -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_MSM=y -CONFIG_USB_CHIPIDEA_IMX=y -CONFIG_USB_CHIPIDEA_GENERIC=y -CONFIG_USB_CHIPIDEA_TEGRA=y -CONFIG_USB_ISP1760=y -CONFIG_USB_ISP1760_HCD=y -CONFIG_USB_ISP1761_UDC=y -# CONFIG_USB_ISP1760_HOST_ROLE is not set -# CONFIG_USB_ISP1760_GADGET_ROLE is not set -CONFIG_USB_ISP1760_DUAL_ROLE=y - -# -# USB port drivers -# -CONFIG_USB_SERIAL=m -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_SIMPLE is not set -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -CONFIG_USB_SERIAL_CH341=m -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_CP210X is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_F81232 is not set -# CONFIG_USB_SERIAL_F8153X is not set -# CONFIG_USB_SERIAL_GARMIN is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_IUU is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_METRO is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_MXUPORT is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_OTI6858 is not set -# CONFIG_USB_SERIAL_QCAUX is not set -# CONFIG_USB_SERIAL_QUALCOMM is not set -# CONFIG_USB_SERIAL_SPCP8X5 is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -CONFIG_USB_SERIAL_WWAN=m -CONFIG_USB_SERIAL_OPTION=m -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_SERIAL_OPTICON is not set -# CONFIG_USB_SERIAL_XSENS_MT is not set -# CONFIG_USB_SERIAL_WISHBONE is not set -# CONFIG_USB_SERIAL_SSU100 is not set -# CONFIG_USB_SERIAL_QT2 is not set -# CONFIG_USB_SERIAL_UPD78F0730 is not set -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_APPLE_MFI_FASTCHARGE is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_EHSET_TEST_FIXTURE is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_YUREX is not set -# CONFIG_USB_EZUSB_FX2 is not set -# CONFIG_USB_HUB_USB251XB is not set -CONFIG_USB_HSIC_USB3503=y -# CONFIG_USB_HSIC_USB4604 is not set -# CONFIG_USB_LINK_LAYER_TEST is not set -# CONFIG_USB_CHAOSKEY is not set - -# -# USB Physical Layer drivers -# -CONFIG_USB_PHY=y -CONFIG_NOP_USB_XCEIV=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ISP1301 is not set -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_VIEWPORT=y -# end of USB Physical Layer drivers - -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 - -# -# USB Peripheral Controller -# -# CONFIG_USB_FOTG210_UDC is not set -# CONFIG_USB_GR_UDC is not set -# CONFIG_USB_R8A66597 is not set -# CONFIG_USB_PXA27X is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MV_U3D is not set -CONFIG_USB_SNP_CORE=y -CONFIG_USB_SNP_UDC_PLAT=y -# CONFIG_USB_M66592 is not set -CONFIG_USB_BDC_UDC=y - -# -# Platform Support -# -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_GADGET_XILINX is not set -# CONFIG_USB_DUMMY_HCD is not set -# end of USB Peripheral Controller - -CONFIG_USB_LIBCOMPOSITE=y -CONFIG_USB_U_ETHER=y -CONFIG_USB_F_NCM=y -CONFIG_USB_F_ECM=y -CONFIG_USB_F_EEM=y -CONFIG_USB_F_RNDIS=y -CONFIG_USB_F_MASS_STORAGE=y -CONFIG_USB_F_TCM=m -CONFIG_USB_CONFIGFS=y -# CONFIG_USB_CONFIGFS_SERIAL is not set -# CONFIG_USB_CONFIGFS_ACM is not set -# CONFIG_USB_CONFIGFS_OBEX is not set -CONFIG_USB_CONFIGFS_NCM=y -CONFIG_USB_CONFIGFS_ECM=y -# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set -CONFIG_USB_CONFIGFS_RNDIS=y -CONFIG_USB_CONFIGFS_EEM=y -CONFIG_USB_CONFIGFS_MASS_STORAGE=y -# CONFIG_USB_CONFIGFS_F_LB_SS is not set -# CONFIG_USB_CONFIGFS_F_FS is not set -# CONFIG_USB_CONFIGFS_F_UAC1 is not set -# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set -# CONFIG_USB_CONFIGFS_F_UAC2 is not set -# CONFIG_USB_CONFIGFS_F_MIDI is not set -# CONFIG_USB_CONFIGFS_F_HID is not set -# CONFIG_USB_CONFIGFS_F_UVC is not set -# CONFIG_USB_CONFIGFS_F_PRINTER is not set -CONFIG_USB_CONFIGFS_F_TCM=y - -# -# USB Gadget precomposed configurations -# -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_ETH is not set -# CONFIG_USB_G_NCM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FUNCTIONFS is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_GADGET_TARGET is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_ACM_MS is not set -# CONFIG_USB_G_MULTI is not set -# CONFIG_USB_G_HID is not set -# CONFIG_USB_G_DBGP is not set -# CONFIG_USB_G_WEBCAM is not set -# CONFIG_USB_RAW_GADGET is not set -# end of USB Gadget precomposed configurations - -CONFIG_TYPEC=y -CONFIG_TYPEC_TCPM=m -CONFIG_TYPEC_TCPCI=m -# CONFIG_TYPEC_RT1711H is not set -# CONFIG_TYPEC_TCPCI_MAXIM is not set -# CONFIG_TYPEC_FUSB302 is not set -CONFIG_TYPEC_UCSI=m -# CONFIG_UCSI_CCG is not set -CONFIG_TYPEC_ANX7688=m -# CONFIG_TYPEC_HD3SS3220 is not set -# CONFIG_TYPEC_TPS6598X is not set -# CONFIG_TYPEC_STUSB160X is not set - -# -# USB Type-C Multiplexer/DeMultiplexer Switch support -# -# CONFIG_TYPEC_MUX_PI3USB30532 is not set -# end of USB Type-C Multiplexer/DeMultiplexer Switch support - -# -# USB Type-C Alternate Mode drivers -# -CONFIG_TYPEC_DP_ALTMODE=m -# CONFIG_TYPEC_NVIDIA_ALTMODE is not set -# end of USB Type-C Alternate Mode drivers - -CONFIG_USB_ROLE_SWITCH=y -CONFIG_MMC=y -CONFIG_PWRSEQ_EMMC=y -CONFIG_PWRSEQ_SIMPLE=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_DEBUG is not set -CONFIG_MMC_ARMMMCI=y -CONFIG_MMC_STM32_SDMMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_OF_ARASAN=y -# CONFIG_MMC_SDHCI_OF_ASPEED is not set -# CONFIG_MMC_SDHCI_OF_AT91 is not set -# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set -CONFIG_MMC_SDHCI_CADENCE=y -CONFIG_MMC_SDHCI_F_SDH30=y -# CONFIG_MMC_SDHCI_MILBEAUT is not set -CONFIG_MMC_DW=y -CONFIG_MMC_DW_PLTFM=y -# CONFIG_MMC_DW_BLUEFIELD is not set -CONFIG_MMC_DW_EXYNOS=y -CONFIG_MMC_DW_HI3798CV200=y -CONFIG_MMC_DW_K3=y -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MMC_USDHI6ROL0 is not set -CONFIG_MMC_SUNXI=y -CONFIG_MMC_CQHCI=y -# CONFIG_MMC_HSQ is not set -# CONFIG_MMC_MTK is not set -CONFIG_MMC_SDHCI_XENON=y -# CONFIG_MMC_SDHCI_OMAP is not set -# CONFIG_MMC_SDHCI_AM654 is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_CLASS_FLASH=y -# CONFIG_LEDS_CLASS_MULTICOLOR is not set -CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y - -# -# LED drivers -# -# CONFIG_LEDS_AAT1290 is not set -# CONFIG_LEDS_AN30259A is not set -# CONFIG_LEDS_AS3645A is not set -# CONFIG_LEDS_AW2013 is not set -# CONFIG_LEDS_BCM6328 is not set -# CONFIG_LEDS_BCM6358 is not set -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM3532 is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_LM3692X is not set -# CONFIG_LEDS_LM3601X is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP50XX is not set -# CONFIG_LEDS_LP55XX_COMMON is not set -# CONFIG_LEDS_LP8860 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -CONFIG_LEDS_PWM=y -# CONFIG_LEDS_REGULATOR is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_TLC591XX is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_KTD2692 is not set -# CONFIG_LEDS_IS31FL319X is not set -# CONFIG_LEDS_IS31FL32XX is not set - -# -# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) -# -# CONFIG_LEDS_BLINKM is not set -CONFIG_LEDS_SYSCON=y -# CONFIG_LEDS_MLXREG is not set -# CONFIG_LEDS_USER is not set -# CONFIG_LEDS_TI_LMU_COMMON is not set -CONFIG_LEDS_SGM3140=y -# CONFIG_LEDS_AXP20X is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_TIMER is not set -# CONFIG_LEDS_TRIGGER_ONESHOT is not set -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -CONFIG_LEDS_TRIGGER_CPU=y -# CONFIG_LEDS_TRIGGER_ACTIVITY is not set -# CONFIG_LEDS_TRIGGER_GPIO is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_LEDS_TRIGGER_TRANSIENT is not set -# CONFIG_LEDS_TRIGGER_CAMERA is not set -CONFIG_LEDS_TRIGGER_PANIC=y -# CONFIG_LEDS_TRIGGER_NETDEV is not set -CONFIG_LEDS_TRIGGER_PATTERN=y -# CONFIG_LEDS_TRIGGER_AUDIO is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_INFINIBAND is not set -CONFIG_EDAC_SUPPORT=y -CONFIG_EDAC=y -CONFIG_EDAC_LEGACY_SYSFS=y -# CONFIG_EDAC_DEBUG is not set -# CONFIG_EDAC_XGENE is not set -# CONFIG_EDAC_DMC520 is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -CONFIG_RTC_SYSTOHC=y -CONFIG_RTC_SYSTOHC_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set -CONFIG_RTC_NVMEM=y - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_ABB5ZES3 is not set -# CONFIG_RTC_DRV_ABEOZ9 is not set -# CONFIG_RTC_DRV_ABX80X is not set -# CONFIG_RTC_DRV_AC100 is not set -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_HYM8563 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_ISL12026 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8523 is not set -# CONFIG_RTC_DRV_PCF85063 is not set -# CONFIG_RTC_DRV_PCF85363 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8010 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_RV3028 is not set -# CONFIG_RTC_DRV_RV3032 is not set -# CONFIG_RTC_DRV_RV8803 is not set -# CONFIG_RTC_DRV_SD3078 is not set - -# -# SPI RTC drivers -# -CONFIG_RTC_I2C_AND_SPI=y - -# -# SPI and I2C RTC drivers -# -CONFIG_RTC_DRV_DS3232=y -CONFIG_RTC_DRV_DS3232_HWMON=y -# CONFIG_RTC_DRV_PCF2127 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1685_FAMILY is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_DS2404 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set -# CONFIG_RTC_DRV_ZYNQMP is not set - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_PL030 is not set -CONFIG_RTC_DRV_PL031=y -CONFIG_RTC_DRV_SUN6I=y -# CONFIG_RTC_DRV_CADENCE is not set -# CONFIG_RTC_DRV_FTRTC010 is not set -# CONFIG_RTC_DRV_R7301 is not set - -# -# HID Sensor RTC drivers -# -CONFIG_DMADEVICES=y -# CONFIG_DMADEVICES_DEBUG is not set - -# -# DMA Devices -# -CONFIG_DMA_ENGINE=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DMA_OF=y -# CONFIG_ALTERA_MSGDMA is not set -# CONFIG_AMBA_PL08X is not set -# CONFIG_BCM_SBA_RAID is not set -CONFIG_DMA_SUN6I=y -# CONFIG_DW_AXI_DMAC is not set -# CONFIG_FSL_EDMA is not set -# CONFIG_FSL_QDMA is not set -# CONFIG_INTEL_IDMA64 is not set -# CONFIG_MV_XOR_V2 is not set -CONFIG_PL330_DMA=y -# CONFIG_XILINX_DMA is not set -# CONFIG_XILINX_ZYNQMP_DMA is not set -# CONFIG_XILINX_ZYNQMP_DPDMA is not set -# CONFIG_QCOM_HIDMA_MGMT is not set -# CONFIG_QCOM_HIDMA is not set -# CONFIG_DW_DMAC is not set -# CONFIG_SF_PDMA is not set - -# -# DMA Clients -# -# CONFIG_ASYNC_TX_DMA is not set -# CONFIG_DMATEST is not set - -# -# DMABUF options -# -CONFIG_SYNC_FILE=y -# CONFIG_SW_SYNC is not set -# CONFIG_UDMABUF is not set -# CONFIG_DMABUF_MOVE_NOTIFY is not set -# CONFIG_DMABUF_SELFTESTS is not set -# CONFIG_DMABUF_HEAPS is not set -# end of DMABUF options - -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set -CONFIG_VFIO_IOMMU_TYPE1=y -CONFIG_VFIO=y -# CONFIG_VFIO_NOIOMMU is not set -# CONFIG_VFIO_PLATFORM is not set -# CONFIG_VFIO_MDEV is not set -# CONFIG_VIRT_DRIVERS is not set -# CONFIG_VIRTIO_MENU is not set -# CONFIG_VDPA is not set -CONFIG_VHOST_MENU=y -# CONFIG_VHOST_NET is not set -# CONFIG_VHOST_SCSI is not set -# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set - -# -# Microsoft Hyper-V guest support -# -# end of Microsoft Hyper-V guest support - -# -# Xen driver support -# -# CONFIG_XEN_BALLOON is not set -# CONFIG_XEN_DEV_EVTCHN is not set -# CONFIG_XEN_BACKEND is not set -# CONFIG_XENFS is not set -# CONFIG_XEN_SYS_HYPERVISOR is not set -# CONFIG_XEN_GNTDEV is not set -# CONFIG_XEN_GRANT_DEV_ALLOC is not set -# CONFIG_XEN_GRANT_DMA_ALLOC is not set -CONFIG_SWIOTLB_XEN=y -# CONFIG_XEN_PVCALLS_FRONTEND is not set -CONFIG_XEN_PRIVCMD=m -CONFIG_XEN_AUTO_XLATE=y -# end of Xen driver support - -# CONFIG_GREYBUS is not set -CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_COMEDI is not set -# CONFIG_RTLLIB is not set -CONFIG_RTL8723BS=m -# CONFIG_R8712U is not set -# CONFIG_R8188EU is not set -# CONFIG_VT6656 is not set - -# -# IIO staging drivers -# - -# -# Accelerometers -# -# end of Accelerometers - -# -# Analog to digital converters -# -# end of Analog to digital converters - -# -# Analog digital bi-direction converters -# -# CONFIG_ADT7316 is not set -# end of Analog digital bi-direction converters - -# -# Capacitance to digital converters -# -# CONFIG_AD7150 is not set -# CONFIG_AD7746 is not set -# end of Capacitance to digital converters - -# -# Direct Digital Synthesis -# -# end of Direct Digital Synthesis - -# -# Network Analyzer, Impedance Converters -# -# CONFIG_AD5933 is not set -# end of Network Analyzer, Impedance Converters - -# -# Active energy metering IC -# -# CONFIG_ADE7854 is not set -# end of Active energy metering IC - -# -# Resolver to digital converters -# -# end of Resolver to digital converters -# end of IIO staging drivers - -CONFIG_STAGING_MEDIA=y -CONFIG_VIDEO_SUNXI=y -CONFIG_VIDEO_SUNXI_CEDRUS=y - -# -# Android -# -CONFIG_ASHMEM=y -# CONFIG_ION is not set -# end of Android - -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_GS_FPGABOOT is not set -# CONFIG_UNISYSSPAR is not set -# CONFIG_KS7010 is not set - -# -# Gasket devices -# -# end of Gasket devices - -# CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set -# CONFIG_WFX is not set -# CONFIG_SPMI_HISI3670 is not set -# CONFIG_MFD_HI6421_SPMI is not set -CONFIG_RTL8723CS=m -# CONFIG_GOLDFISH is not set -# CONFIG_CHROME_PLATFORMS is not set -# CONFIG_MELLANOX_PLATFORM is not set -CONFIG_HAVE_CLK=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_MAX9485 is not set -CONFIG_COMMON_CLK_SCPI=y -# CONFIG_COMMON_CLK_SI5341 is not set -# CONFIG_COMMON_CLK_SI5351 is not set -# CONFIG_COMMON_CLK_SI514 is not set -# CONFIG_COMMON_CLK_SI544 is not set -# CONFIG_COMMON_CLK_SI570 is not set -# CONFIG_COMMON_CLK_CDCE706 is not set -# CONFIG_COMMON_CLK_CDCE925 is not set -CONFIG_COMMON_CLK_CS2000_CP=y -CONFIG_CLK_QORIQ=y -CONFIG_COMMON_CLK_XGENE=y -CONFIG_COMMON_CLK_PWM=y -# CONFIG_COMMON_CLK_VC5 is not set -# CONFIG_COMMON_CLK_FIXED_MMIO is not set -CONFIG_CLK_SUNXI=y -CONFIG_CLK_SUNXI_CLOCKS=y -CONFIG_CLK_SUNXI_PRCM_SUN6I=y -CONFIG_CLK_SUNXI_PRCM_SUN8I=y -CONFIG_CLK_SUNXI_PRCM_SUN9I=y -CONFIG_SUNXI_CCU=y -CONFIG_SUN50I_A64_CCU=y -CONFIG_SUN50I_A100_CCU=y -CONFIG_SUN50I_A100_R_CCU=y -CONFIG_SUN50I_H6_CCU=y -CONFIG_SUN50I_H6_R_CCU=y -# CONFIG_SUN8I_A83T_CCU is not set -CONFIG_SUN8I_H3_CCU=y -CONFIG_SUN8I_DE2_CCU=y -CONFIG_SUN8I_R_CCU=y -CONFIG_HWSPINLOCK=y - -# -# Clock Source drivers -# -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -# CONFIG_FSL_ERRATUM_A008585 is not set -# CONFIG_HISILICON_ERRATUM_161010101 is not set -# CONFIG_ARM64_ERRATUM_858921 is not set -CONFIG_SUN50I_ERRATUM_UNKNOWN1=y -# CONFIG_MICROCHIP_PIT64B is not set -# end of Clock Source drivers - -CONFIG_MAILBOX=y -CONFIG_ARM_MHU=y -CONFIG_PLATFORM_MHU=y -# CONFIG_PL320_MBOX is not set -# CONFIG_ALTERA_MBOX is not set -# CONFIG_MAILBOX_TEST is not set -CONFIG_SUN6I_MSGBOX=y -CONFIG_IOMMU_IOVA=y -CONFIG_IOMMU_API=y -CONFIG_IOMMU_SUPPORT=y - -# -# Generic IOMMU Pagetable Support -# -CONFIG_IOMMU_IO_PGTABLE=y -CONFIG_IOMMU_IO_PGTABLE_LPAE=y -# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# end of Generic IOMMU Pagetable Support - -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -CONFIG_OF_IOMMU=y -CONFIG_IOMMU_DMA=y -# CONFIG_SUN50I_IOMMU is not set -CONFIG_ARM_SMMU=y -# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set -CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y -CONFIG_ARM_SMMU_V3=y -# CONFIG_ARM_SMMU_V3_SVA is not set - -# -# Remoteproc drivers -# -# CONFIG_REMOTEPROC is not set -# end of Remoteproc drivers - -# -# Rpmsg drivers -# -# CONFIG_RPMSG_QCOM_GLINK_RPM is not set -# CONFIG_RPMSG_VIRTIO is not set -# end of Rpmsg drivers - -# CONFIG_SOUNDWIRE is not set - -# -# SOC (System On Chip) specific Drivers -# - -# -# Amlogic SoC drivers -# -# end of Amlogic SoC drivers - -# -# Aspeed SoC drivers -# -# end of Aspeed SoC drivers - -# -# Broadcom SoC drivers -# -# CONFIG_SOC_BRCMSTB is not set -# end of Broadcom SoC drivers - -# -# NXP/Freescale QorIQ SoC drivers -# -# CONFIG_QUICC_ENGINE is not set -# CONFIG_FSL_RCPM is not set -# end of NXP/Freescale QorIQ SoC drivers - -# -# i.MX SoC drivers -# -# end of i.MX SoC drivers - -# -# Qualcomm SoC drivers -# -# end of Qualcomm SoC drivers - -CONFIG_SUNXI_SRAM=y -# CONFIG_SOC_TI is not set - -# -# Xilinx SoC drivers -# -# CONFIG_XILINX_VCU is not set -# end of Xilinx SoC drivers -# end of SOC (System On Chip) specific Drivers - -CONFIG_PM_DEVFREQ=y - -# -# DEVFREQ Governors -# -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set -# CONFIG_DEVFREQ_GOV_POWERSAVE is not set -# CONFIG_DEVFREQ_GOV_USERSPACE is not set -# CONFIG_DEVFREQ_GOV_PASSIVE is not set - -# -# DEVFREQ Drivers -# -# CONFIG_PM_DEVFREQ_EVENT is not set -CONFIG_EXTCON=y - -# -# Extcon Device Drivers -# -# CONFIG_EXTCON_ADC_JACK is not set -# CONFIG_EXTCON_FSA9480 is not set -# CONFIG_EXTCON_GPIO is not set -# CONFIG_EXTCON_MAX3355 is not set -# CONFIG_EXTCON_PTN5150 is not set -# CONFIG_EXTCON_RT8973A is not set -# CONFIG_EXTCON_SM5502 is not set -CONFIG_EXTCON_USB_GPIO=y -CONFIG_MEMORY=y -# CONFIG_ARM_PL172_MPMC is not set -CONFIG_IIO=y -CONFIG_IIO_BUFFER=y -# CONFIG_IIO_BUFFER_CB is not set -# CONFIG_IIO_BUFFER_DMA is not set -# CONFIG_IIO_BUFFER_DMAENGINE is not set -# CONFIG_IIO_BUFFER_HW_CONSUMER is not set -CONFIG_IIO_KFIFO_BUF=m -CONFIG_IIO_TRIGGERED_BUFFER=m -# CONFIG_IIO_CONFIGFS is not set -CONFIG_IIO_TRIGGER=y -CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 -# CONFIG_IIO_SW_DEVICE is not set -# CONFIG_IIO_SW_TRIGGER is not set -# CONFIG_IIO_TRIGGERED_EVENT is not set - -# -# Accelerometers -# -# CONFIG_ADXL345_I2C is not set -# CONFIG_ADXL372_I2C is not set -# CONFIG_BMA180 is not set -# CONFIG_BMA400 is not set -CONFIG_BMC150_ACCEL=m -CONFIG_BMC150_ACCEL_I2C=m -# CONFIG_DA280 is not set -# CONFIG_DA311 is not set -# CONFIG_DMARD06 is not set -# CONFIG_DMARD09 is not set -# CONFIG_DMARD10 is not set -# CONFIG_IIO_ST_ACCEL_3AXIS is not set -# CONFIG_KXSD9 is not set -# CONFIG_KXCJK1013 is not set -# CONFIG_MC3230 is not set -# CONFIG_MMA7455_I2C is not set -# CONFIG_MMA7660 is not set -# CONFIG_MMA8452 is not set -# CONFIG_MMA9551 is not set -# CONFIG_MMA9553 is not set -# CONFIG_MXC4005 is not set -# CONFIG_MXC6255 is not set -# CONFIG_STK8312 is not set -# CONFIG_STK8BA50 is not set -# end of Accelerometers - -# -# Analog to digital converters -# -# CONFIG_AD7091R5 is not set -# CONFIG_AD7291 is not set -# CONFIG_AD7606_IFACE_PARALLEL is not set -# CONFIG_AD799X is not set -# CONFIG_ADI_AXI_ADC is not set -CONFIG_AXP20X_ADC=y -# CONFIG_AXP288_ADC is not set -# CONFIG_CC10001_ADC is not set -# CONFIG_ENVELOPE_DETECTOR is not set -# CONFIG_HX711 is not set -# CONFIG_INA2XX_ADC is not set -# CONFIG_LTC2471 is not set -# CONFIG_LTC2485 is not set -# CONFIG_LTC2497 is not set -# CONFIG_MAX1363 is not set -# CONFIG_MAX9611 is not set -# CONFIG_MCP3422 is not set -# CONFIG_NAU7802 is not set -# CONFIG_QCOM_SPMI_IADC is not set -# CONFIG_QCOM_SPMI_VADC is not set -# CONFIG_QCOM_SPMI_ADC5 is not set -# CONFIG_SD_ADC_MODULATOR is not set -# CONFIG_TI_ADC081C is not set -# CONFIG_TI_ADS1015 is not set -# CONFIG_VF610_ADC is not set -# CONFIG_XILINX_XADC is not set -# end of Analog to digital converters - -# -# Analog Front Ends -# -# CONFIG_IIO_RESCALE is not set -# end of Analog Front Ends - -# -# Amplifiers -# -# CONFIG_HMC425 is not set -# end of Amplifiers - -# -# Chemical Sensors -# -# CONFIG_ATLAS_PH_SENSOR is not set -# CONFIG_ATLAS_EZO_SENSOR is not set -# CONFIG_BME680 is not set -# CONFIG_CCS811 is not set -# CONFIG_IAQCORE is not set -# CONFIG_PMS7003 is not set -# CONFIG_SCD30_CORE is not set -# CONFIG_SENSIRION_SGP30 is not set -# CONFIG_SPS30 is not set -# CONFIG_VZ89X is not set -# end of Chemical Sensors - -# -# Hid Sensor IIO Common -# -# end of Hid Sensor IIO Common - -# -# SSP Sensor Common -# -# end of SSP Sensor Common - -CONFIG_IIO_ST_SENSORS_I2C=m -CONFIG_IIO_ST_SENSORS_CORE=m - -# -# Digital to analog converters -# -# CONFIG_AD5064 is not set -# CONFIG_AD5380 is not set -# CONFIG_AD5446 is not set -# CONFIG_AD5593R is not set -# CONFIG_AD5696_I2C is not set -# CONFIG_DPOT_DAC is not set -# CONFIG_DS4424 is not set -# CONFIG_M62332 is not set -# CONFIG_MAX517 is not set -# CONFIG_MAX5821 is not set -# CONFIG_MCP4725 is not set -# CONFIG_TI_DAC5571 is not set -# CONFIG_VF610_DAC is not set -# end of Digital to analog converters - -# -# IIO dummy driver -# -# end of IIO dummy driver - -# -# Frequency Synthesizers DDS/PLL -# - -# -# Clock Generator/Distribution -# -# end of Clock Generator/Distribution - -# -# Phase-Locked Loop (PLL) frequency synthesizers -# -# end of Phase-Locked Loop (PLL) frequency synthesizers -# end of Frequency Synthesizers DDS/PLL - -# -# Digital gyroscope sensors -# -# CONFIG_BMG160 is not set -# CONFIG_FXAS21002C is not set -# CONFIG_MPU3050_I2C is not set -# CONFIG_IIO_ST_GYRO_3AXIS is not set -# CONFIG_ITG3200 is not set -# end of Digital gyroscope sensors - -# -# Health Sensors -# - -# -# Heart Rate Monitors -# -# CONFIG_AFE4404 is not set -# CONFIG_MAX30100 is not set -# CONFIG_MAX30102 is not set -# end of Heart Rate Monitors -# end of Health Sensors - -# -# Humidity sensors -# -# CONFIG_AM2315 is not set -# CONFIG_DHT11 is not set -# CONFIG_HDC100X is not set -# CONFIG_HDC2010 is not set -# CONFIG_HTS221 is not set -# CONFIG_HTU21 is not set -# CONFIG_SI7005 is not set -# CONFIG_SI7020 is not set -# end of Humidity sensors - -# -# Inertial measurement units -# -# CONFIG_BMI160_I2C is not set -# CONFIG_FXOS8700_I2C is not set -# CONFIG_KMX61 is not set -# CONFIG_INV_ICM42600_I2C is not set -CONFIG_INV_MPU6050_IIO=m -CONFIG_INV_MPU6050_I2C=m -# CONFIG_IIO_ST_LSM6DSX is not set -# end of Inertial measurement units - -# -# Light sensors -# -# CONFIG_ADJD_S311 is not set -# CONFIG_ADUX1020 is not set -# CONFIG_AL3010 is not set -# CONFIG_AL3320A is not set -# CONFIG_APDS9300 is not set -# CONFIG_APDS9960 is not set -# CONFIG_AS73211 is not set -# CONFIG_BH1750 is not set -# CONFIG_BH1780 is not set -# CONFIG_CM32181 is not set -# CONFIG_CM3232 is not set -# CONFIG_CM3323 is not set -# CONFIG_CM3605 is not set -# CONFIG_CM36651 is not set -# CONFIG_GP2AP002 is not set -# CONFIG_GP2AP020A00F is not set -# CONFIG_SENSORS_ISL29018 is not set -# CONFIG_SENSORS_ISL29028 is not set -# CONFIG_ISL29125 is not set -# CONFIG_JSA1212 is not set -# CONFIG_RPR0521 is not set -# CONFIG_LTR501 is not set -# CONFIG_LV0104CS is not set -# CONFIG_MAX44000 is not set -# CONFIG_MAX44009 is not set -# CONFIG_NOA1305 is not set -# CONFIG_OPT3001 is not set -# CONFIG_PA12203001 is not set -# CONFIG_SI1133 is not set -# CONFIG_SI1145 is not set -CONFIG_STK3310=m -# CONFIG_ST_UVIS25 is not set -# CONFIG_TCS3414 is not set -# CONFIG_TCS3472 is not set -# CONFIG_SENSORS_TSL2563 is not set -# CONFIG_TSL2583 is not set -# CONFIG_TSL2772 is not set -# CONFIG_TSL4531 is not set -# CONFIG_US5182D is not set -# CONFIG_VCNL4000 is not set -# CONFIG_VCNL4035 is not set -# CONFIG_VEML6030 is not set -# CONFIG_VEML6070 is not set -# CONFIG_VL6180 is not set -# CONFIG_ZOPT2201 is not set -# end of Light sensors - -# -# Magnetometer sensors -# -# CONFIG_AK8974 is not set -# CONFIG_AK8975 is not set -# CONFIG_AK09911 is not set -# CONFIG_BMC150_MAGN_I2C is not set -# CONFIG_MAG3110 is not set -# CONFIG_MMC35240 is not set -CONFIG_IIO_ST_MAGN_3AXIS=m -CONFIG_IIO_ST_MAGN_I2C_3AXIS=m -# CONFIG_SENSORS_HMC5843_I2C is not set -# CONFIG_SENSORS_RM3100_I2C is not set -# end of Magnetometer sensors - -# -# Multiplexers -# -# CONFIG_IIO_MUX is not set -# end of Multiplexers - -# -# Inclinometer sensors -# -# end of Inclinometer sensors - -# -# Triggers - standalone -# -# CONFIG_IIO_INTERRUPT_TRIGGER is not set -# CONFIG_IIO_SYSFS_TRIGGER is not set -# end of Triggers - standalone - -# -# Linear and angular position sensors -# -# end of Linear and angular position sensors - -# -# Digital potentiometers -# -# CONFIG_AD5272 is not set -# CONFIG_DS1803 is not set -# CONFIG_MAX5432 is not set -# CONFIG_MCP4018 is not set -# CONFIG_MCP4531 is not set -# CONFIG_TPL0102 is not set -# end of Digital potentiometers - -# -# Digital potentiostats -# -# CONFIG_LMP91000 is not set -# end of Digital potentiostats - -# -# Pressure sensors -# -# CONFIG_ABP060MG is not set -# CONFIG_BMP280 is not set -# CONFIG_DLHL60D is not set -# CONFIG_DPS310 is not set -# CONFIG_HP03 is not set -# CONFIG_ICP10100 is not set -# CONFIG_MPL115_I2C is not set -# CONFIG_MPL3115 is not set -# CONFIG_MS5611 is not set -# CONFIG_MS5637 is not set -# CONFIG_IIO_ST_PRESS is not set -# CONFIG_T5403 is not set -# CONFIG_HP206C is not set -# CONFIG_ZPA2326 is not set -# end of Pressure sensors - -# -# Lightning sensors -# -# end of Lightning sensors - -# -# Proximity and distance sensors -# -# CONFIG_ISL29501 is not set -# CONFIG_LIDAR_LITE_V2 is not set -# CONFIG_MB1232 is not set -# CONFIG_PING is not set -# CONFIG_RFD77402 is not set -# CONFIG_SRF04 is not set -# CONFIG_SX9310 is not set -# CONFIG_SX9500 is not set -# CONFIG_SRF08 is not set -# CONFIG_VCNL3020 is not set -# CONFIG_VL53L0X_I2C is not set -# end of Proximity and distance sensors - -# -# Resolver to digital converters -# -# end of Resolver to digital converters - -# -# Temperature sensors -# -# CONFIG_MLX90614 is not set -# CONFIG_MLX90632 is not set -# CONFIG_TMP006 is not set -# CONFIG_TMP007 is not set -# CONFIG_TSYS01 is not set -# CONFIG_TSYS02D is not set -# end of Temperature sensors - -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -# CONFIG_PWM_DEBUG is not set -# CONFIG_PWM_FSL_FTM is not set -# CONFIG_PWM_PCA9685 is not set -CONFIG_PWM_SUN4I=y - -# -# IRQ chip support -# -CONFIG_IRQCHIP=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_MAX_NR=1 -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -# CONFIG_AL_FIC is not set -CONFIG_PARTITION_PERCPU=y -# end of IRQ chip support - -# CONFIG_IPACK_BUS is not set -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_RESET_CONTROLLER=y -# CONFIG_RESET_BRCMSTB_RESCAL is not set -# CONFIG_RESET_INTEL_GW is not set -CONFIG_RESET_SIMPLE=y -CONFIG_RESET_SUNXI=y -# CONFIG_RESET_TI_SYSCON is not set - -# -# PHY Subsystem -# -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PHY_MIPI_DPHY=y -CONFIG_PHY_XGENE=y -# CONFIG_USB_LGM_PHY is not set -CONFIG_PHY_SUN4I_USB=y -CONFIG_PHY_SUN6I_MIPI_DPHY=y -# CONFIG_PHY_SUN9I_USB is not set -# CONFIG_PHY_SUN50I_USB3 is not set -# CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_PHY_CADENCE_TORRENT is not set -# CONFIG_PHY_CADENCE_DPHY is not set -# CONFIG_PHY_CADENCE_SIERRA is not set -# CONFIG_PHY_CADENCE_SALVO is not set -# CONFIG_PHY_FSL_IMX8MQ_USB is not set -# CONFIG_PHY_MIXEL_MIPI_DPHY is not set -# CONFIG_PHY_PXA_28NM_HSIC is not set -# CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_CPCAP_USB is not set -# CONFIG_PHY_MAPPHONE_MDM6600 is not set -# CONFIG_PHY_OCELOT_SERDES is not set -CONFIG_PHY_QCOM_USB_HS=y -# CONFIG_PHY_QCOM_USB_HSIC is not set -CONFIG_PHY_SAMSUNG_USB2=y -# CONFIG_PHY_TUSB1210 is not set -# end of PHY Subsystem - -# CONFIG_POWERCAP is not set -# CONFIG_MCB is not set - -# -# Performance monitor support -# -# CONFIG_ARM_CCI_PMU is not set -# CONFIG_ARM_CCN is not set -# CONFIG_ARM_CMN is not set -CONFIG_ARM_PMU=y -# CONFIG_ARM_DSU_PMU is not set -# CONFIG_ARM_SPE_PMU is not set -# end of Performance monitor support - -CONFIG_RAS=y - -# -# Android -# -CONFIG_ANDROID=y -CONFIG_ANDROID_BINDER_IPC=y -# CONFIG_ANDROID_BINDERFS is not set -CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder" -CONFIG_ANDROID_BINDER_IPC_SELFTEST=y -# end of Android - -# CONFIG_LIBNVDIMM is not set -# CONFIG_DAX is not set -CONFIG_NVMEM=y -# CONFIG_NVMEM_SYSFS is not set -# CONFIG_NVMEM_SPMI_SDAM is not set -CONFIG_NVMEM_SUNXI_SID=y - -# -# HW tracing support -# -# CONFIG_STM is not set -# CONFIG_INTEL_TH is not set -# end of HW tracing support - -# CONFIG_FPGA is not set -# CONFIG_FSI is not set -CONFIG_TEE=y - -# -# TEE drivers -# -CONFIG_OPTEE=y -CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 -# end of TEE drivers - -CONFIG_PM_OPP=y -# CONFIG_SIOX is not set -# CONFIG_SLIMBUS is not set -# CONFIG_INTERCONNECT is not set -# CONFIG_COUNTER is not set -# CONFIG_MOST is not set -# end of Device Drivers - -# -# File systems -# -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_VALIDATE_FS_PARSER=y -CONFIG_FS_IOMAP=y -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_ASSERT is not set -# CONFIG_BTRFS_FS_REF_VERIFY is not set -# CONFIG_NILFS2_FS is not set -CONFIG_F2FS_FS=y -CONFIG_F2FS_STAT_FS=y -CONFIG_F2FS_FS_XATTR=y -CONFIG_F2FS_FS_POSIX_ACL=y -CONFIG_F2FS_FS_SECURITY=y -# CONFIG_F2FS_CHECK_FS is not set -# CONFIG_F2FS_FAULT_INJECTION is not set -CONFIG_F2FS_FS_COMPRESSION=y -CONFIG_F2FS_FS_LZO=y -CONFIG_F2FS_FS_LZ4=y -CONFIG_F2FS_FS_ZSTD=y -CONFIG_F2FS_FS_LZORLE=y -# CONFIG_FS_DAX is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_EXPORTFS=y -# CONFIG_EXPORTFS_BLOCK_OPS is not set -CONFIG_FILE_LOCKING=y -CONFIG_MANDATORY_FILE_LOCKING=y -# CONFIG_FS_ENCRYPTION is not set -# CONFIG_FS_VERITY is not set -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_FANOTIFY=y -CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y -CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=y -CONFIG_AUTOFS_FS=y -CONFIG_FUSE_FS=y -# CONFIG_CUSE is not set -# CONFIG_VIRTIO_FS is not set -# CONFIG_OVERLAY_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set -# end of Caches - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set -# end of CD-ROM/DVD Filesystems - -# -# DOS/FAT/EXFAT/NT Filesystems -# -CONFIG_FAT_FS=y -# CONFIG_MSDOS_FS is not set -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_FAT_DEFAULT_UTF8 is not set -# CONFIG_EXFAT_FS is not set -# CONFIG_NTFS_FS is not set -# end of DOS/FAT/EXFAT/NT Filesystems - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -# CONFIG_PROC_KCORE is not set -CONFIG_PROC_VMCORE=y -# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_PROC_CHILDREN is not set -CONFIG_KERNFS=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TMPFS_XATTR=y -# CONFIG_TMPFS_INODE64 is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -CONFIG_MEMFD_CREATE=y -CONFIG_ARCH_HAS_GIGANTIC_PAGE=y -CONFIG_CONFIGFS_FS=y -# end of Pseudo filesystems - -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ORANGEFS_FS is not set -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -CONFIG_ECRYPT_FS=m -# CONFIG_ECRYPT_FS_MESSAGING is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -CONFIG_SQUASHFS=m -# CONFIG_SQUASHFS_FILE_CACHE is not set -CONFIG_SQUASHFS_FILE_DIRECT=y -# CONFIG_SQUASHFS_DECOMP_SINGLE is not set -# CONFIG_SQUASHFS_DECOMP_MULTI is not set -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -CONFIG_SQUASHFS_XATTR=y -CONFIG_SQUASHFS_ZLIB=y -# CONFIG_SQUASHFS_LZ4 is not set -# CONFIG_SQUASHFS_LZO is not set -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_ZSTD is not set -# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_EROFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V2=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_SWAP is not set -CONFIG_NFS_V4_1=y -CONFIG_NFS_V4_2=y -CONFIG_PNFS_FILE_LAYOUT=y -CONFIG_PNFS_BLOCK=y -CONFIG_PNFS_FLEXFILE_LAYOUT=m -CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" -# CONFIG_NFS_V4_1_MIGRATION is not set -CONFIG_NFS_V4_SECURITY_LABEL=y -CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -CONFIG_NFS_DISABLE_UDP_SUPPORT=y -# CONFIG_NFS_V4_2_READ_PLUS is not set -# CONFIG_NFSD is not set -CONFIG_GRACE_PERIOD=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_SUNRPC_BACKCHANNEL=y -# CONFIG_SUNRPC_DEBUG is not set -# CONFIG_CEPH_FS is not set -CONFIG_CIFS=m -CONFIG_CIFS_STATS2=y -CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -CONFIG_CIFS_DEBUG=y -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set -# CONFIG_CIFS_DFS_UPCALL is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_MAC_ROMAN is not set -# CONFIG_NLS_MAC_CELTIC is not set -# CONFIG_NLS_MAC_CENTEURO is not set -# CONFIG_NLS_MAC_CROATIAN is not set -# CONFIG_NLS_MAC_CYRILLIC is not set -# CONFIG_NLS_MAC_GAELIC is not set -# CONFIG_NLS_MAC_GREEK is not set -# CONFIG_NLS_MAC_ICELAND is not set -# CONFIG_NLS_MAC_INUIT is not set -# CONFIG_NLS_MAC_ROMANIAN is not set -# CONFIG_NLS_MAC_TURKISH is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set -# CONFIG_UNICODE is not set -CONFIG_IO_WQ=y -# end of File systems - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_KEYS_REQUEST_CACHE is not set -# CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_TRUSTED_KEYS is not set -# CONFIG_ENCRYPTED_KEYS is not set -# CONFIG_KEY_DH_OPERATIONS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -CONFIG_SECURITY=y -CONFIG_SECURITYFS=y -# CONFIG_SECURITY_NETWORK is not set -# CONFIG_SECURITY_PATH is not set -CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set -# CONFIG_STATIC_USERMODEHELPER is not set -# CONFIG_SECURITY_SMACK is not set -# CONFIG_SECURITY_TOMOYO is not set -# CONFIG_SECURITY_APPARMOR is not set -# CONFIG_SECURITY_LOADPIN is not set -# CONFIG_SECURITY_YAMA is not set -# CONFIG_SECURITY_SAFESETID is not set -# CONFIG_SECURITY_LOCKDOWN_LSM is not set -CONFIG_INTEGRITY=y -# CONFIG_INTEGRITY_SIGNATURE is not set -# CONFIG_IMA is not set -# CONFIG_EVM is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_LSM="yama,loadpin,integrity,selinux,smack,tomoyo,apparmor" - -# -# Kernel hardening options -# - -# -# Memory initialization -# -CONFIG_INIT_STACK_NONE=y -# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set -# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set -# end of Memory initialization -# end of Kernel hardening options -# end of Security options - -CONFIG_XOR_BLOCKS=m -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_SKCIPHER=y -CONFIG_CRYPTO_SKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_KPP=m -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_USER is not set -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -# CONFIG_CRYPTO_PCRYPT is not set -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_AUTHENC=y -# CONFIG_CRYPTO_TEST is not set -CONFIG_CRYPTO_SIMD=y - -# -# Public-key cryptography -# -CONFIG_CRYPTO_RSA=y -# CONFIG_CRYPTO_DH is not set -CONFIG_CRYPTO_ECC=m -CONFIG_CRYPTO_ECDH=m -# CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set -# CONFIG_CRYPTO_CURVE25519 is not set - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=y -CONFIG_CRYPTO_GCM=y -# CONFIG_CRYPTO_CHACHA20POLY1305 is not set -# CONFIG_CRYPTO_AEGIS128 is not set -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_ECHAINIV=y - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set -CONFIG_CRYPTO_CTR=y -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=y -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set -# CONFIG_CRYPTO_PCBC is not set -CONFIG_CRYPTO_XTS=y -# CONFIG_CRYPTO_KEYWRAP is not set -# CONFIG_CRYPTO_ADIANTUM is not set -CONFIG_CRYPTO_ESSIV=y - -# -# Hash modes -# -CONFIG_CRYPTO_CMAC=y -CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_XXHASH=m -CONFIG_CRYPTO_BLAKE2B=m -# CONFIG_CRYPTO_BLAKE2S is not set -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_GHASH=y -# CONFIG_CRYPTO_POLY1305 is not set -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=m -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_SHA3=m -CONFIG_CRYPTO_SM3=m -# CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_TI is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -CONFIG_CRYPTO_DES=m -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_SALSA20 is not set -CONFIG_CRYPTO_CHACHA20=m -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_SM4 is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_LZO=y -# CONFIG_CRYPTO_842 is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set -CONFIG_CRYPTO_ZSTD=y - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_DRBG_HMAC=y -# CONFIG_CRYPTO_DRBG_HASH is not set -# CONFIG_CRYPTO_DRBG_CTR is not set -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_USER_API_HASH is not set -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -# CONFIG_CRYPTO_USER_API_RNG is not set -# CONFIG_CRYPTO_USER_API_AEAD is not set -CONFIG_CRYPTO_HASH_INFO=y - -# -# Crypto library routines -# -CONFIG_CRYPTO_LIB_AES=y -CONFIG_CRYPTO_LIB_ARC4=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=m -CONFIG_CRYPTO_LIB_BLAKE2S=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m -CONFIG_CRYPTO_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m -CONFIG_CRYPTO_LIB_CURVE25519=m -CONFIG_CRYPTO_LIB_DES=m -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 -CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_DEV_ALLWINNER=y -# CONFIG_CRYPTO_DEV_SUN4I_SS is not set -# CONFIG_CRYPTO_DEV_SUN8I_CE is not set -# CONFIG_CRYPTO_DEV_SUN8I_SS is not set -# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set -# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set -# CONFIG_CRYPTO_DEV_CCP is not set -# CONFIG_CRYPTO_DEV_SAFEXCEL is not set -# CONFIG_CRYPTO_DEV_CCREE is not set -# CONFIG_CRYPTO_DEV_HISI_SEC is not set -# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set -CONFIG_ASYMMETRIC_KEY_TYPE=y -CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y -CONFIG_X509_CERTIFICATE_PARSER=y -# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set -CONFIG_PKCS7_MESSAGE_PARSER=y -# CONFIG_PKCS7_TEST_KEY is not set -# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set - -# -# Certificates for signature checking -# -CONFIG_SYSTEM_TRUSTED_KEYRING=y -CONFIG_SYSTEM_TRUSTED_KEYS="" -# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set -# CONFIG_SECONDARY_TRUSTED_KEYRING is not set -# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set -# end of Certificates for signature checking - -# -# Library routines -# -CONFIG_RAID6_PQ=m -CONFIG_RAID6_PQ_BENCHMARK=y -CONFIG_LINEAR_RANGES=y -# CONFIG_PACKING is not set -CONFIG_BITREVERSE=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_NET_UTILS=y -# CONFIG_CORDIC is not set -# CONFIG_PRIME_NUMBERS is not set -CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_USE_SYM_ANNOTATIONS=y -CONFIG_INDIRECT_PIO=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -# CONFIG_CRC8 is not set -CONFIG_XXHASH=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_RANDOM32_SELFTEST is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_LZ4_COMPRESS=y -CONFIG_LZ4_DECOMPRESS=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y -CONFIG_XZ_DEC=y -CONFIG_XZ_DEC_X86=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_BCJ=y -# CONFIG_XZ_DEC_TEST is not set -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_LZ4=y -CONFIG_DECOMPRESS_ZSTD=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=y -CONFIG_TEXTSEARCH_BM=y -CONFIG_TEXTSEARCH_FSM=y -CONFIG_XARRAY_MULTI=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_DMA_DECLARE_COHERENT=y -CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y -CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y -CONFIG_SWIOTLB=y -CONFIG_DMA_NONCOHERENT_MMAP=y -CONFIG_DMA_COHERENT_POOL=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_CMA=y -CONFIG_DMA_PERNUMA_CMA=y - -# -# Default contiguous memory area size: -# -CONFIG_CMA_SIZE_MBYTES=256 -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_ALIGNMENT=8 -# CONFIG_DMA_API_DEBUG is not set -CONFIG_SGL_ALLOC=y -CONFIG_CPU_RMAP=y -CONFIG_DQL=y -CONFIG_GLOB=y -# CONFIG_GLOB_SELFTEST is not set -CONFIG_NLATTR=y -CONFIG_CLZ_TAB=y -# CONFIG_IRQ_POLL is not set -CONFIG_MPILIB=y -CONFIG_LIBFDT=y -CONFIG_OID_REGISTRY=y -CONFIG_HAVE_GENERIC_VDSO=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_VDSO_TIME_NS=y -CONFIG_FONT_SUPPORT=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_SG_POOL=y -CONFIG_ARCH_STACKWALK=y -CONFIG_SBITMAP=y -# CONFIG_STRING_SELFTEST is not set -# end of Library routines - -# -# Kernel hacking -# - -# -# printk and dmesg options -# -CONFIG_PRINTK_TIME=y -# CONFIG_PRINTK_CALLER is not set -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 -CONFIG_CONSOLE_LOGLEVEL_QUIET=4 -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_DYNAMIC_DEBUG_CORE is not set -CONFIG_SYMBOLIC_ERRNAME=y -CONFIG_DEBUG_BUGVERBOSE=y -# end of printk and dmesg options - -# -# Compile-time checks and compiler options -# -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_INFO_REDUCED is not set -# CONFIG_DEBUG_INFO_COMPRESSED is not set -# CONFIG_DEBUG_INFO_SPLIT is not set -# CONFIG_DEBUG_INFO_DWARF4 is not set -# CONFIG_DEBUG_INFO_BTF is not set -# CONFIG_GDB_SCRIPTS is not set -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=2048 -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_READABLE_ASM is not set -# CONFIG_HEADERS_INSTALL is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_SECTION_MISMATCH_WARN_ONLY=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_FRAME_POINTER=y -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -# end of Compile-time checks and compiler options - -# -# Generic Kernel Debugging Instruments -# -# CONFIG_MAGIC_SYSRQ is not set -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_FS_ALLOW_ALL=y -# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set -# CONFIG_DEBUG_FS_ALLOW_NONE is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y -# CONFIG_UBSAN is not set -# end of Generic Kernel Debugging Instruments - -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_MISC=y - -# -# Memory Debugging -# -# CONFIG_PAGE_EXTENSION is not set -# CONFIG_DEBUG_PAGEALLOC is not set -# CONFIG_PAGE_OWNER is not set -# CONFIG_PAGE_POISONING is not set -# CONFIG_DEBUG_RODATA_TEST is not set -CONFIG_ARCH_HAS_DEBUG_WX=y -# CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y -# CONFIG_PTDUMP_DEBUGFS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_HAVE_DEBUG_KMEMLEAK=y -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_SCHED_STACK_END_CHECK is not set -CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_VM_PGTABLE is not set -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -# CONFIG_DEBUG_VIRTUAL is not set -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_PER_CPU_MAPS is not set -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y -CONFIG_CC_HAS_KASAN_GENERIC=y -CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y -# CONFIG_KASAN is not set -# end of Memory Debugging - -# CONFIG_DEBUG_SHIRQ is not set - -# -# Debug Oops, Lockups and Hangs -# -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -# CONFIG_SOFTLOCKUP_DETECTOR is not set -# CONFIG_DETECT_HUNG_TASK is not set -# CONFIG_WQ_WATCHDOG is not set -# CONFIG_TEST_LOCKUP is not set -# end of Debug Oops, Lockups and Hangs - -# -# Scheduler Debugging -# -# CONFIG_SCHED_DEBUG is not set -CONFIG_SCHED_INFO=y -# CONFIG_SCHEDSTATS is not set -# end of Scheduler Debugging - -# CONFIG_DEBUG_TIMEKEEPING is not set - -# -# Lock Debugging (spinlocks, mutexes, etc...) -# -CONFIG_LOCK_DEBUGGING_SUPPORT=y -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set -# CONFIG_DEBUG_RWSEMS is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_DEBUG_ATOMIC_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_LOCK_TORTURE_TEST is not set -# CONFIG_WW_MUTEX_SELFTEST is not set -# CONFIG_SCF_TORTURE_TEST is not set -# CONFIG_CSD_LOCK_WAIT_DEBUG is not set -# end of Lock Debugging (spinlocks, mutexes, etc...) - -# CONFIG_STACKTRACE is not set -# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_HAVE_DEBUG_BUGVERBOSE=y - -# -# Debug kernel data structures -# -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_PLIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_BUG_ON_DATA_CORRUPTION is not set -# end of Debug kernel data structures - -# CONFIG_DEBUG_CREDENTIALS is not set - -# -# RCU Debugging -# -# CONFIG_RCU_SCALE_TEST is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_REF_SCALE_TEST is not set -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# CONFIG_RCU_TRACE is not set -# CONFIG_RCU_EQS_DEBUG is not set -# end of RCU Debugging - -# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -# CONFIG_LATENCYTOP is not set -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set -# CONFIG_SAMPLES is not set -CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y -CONFIG_STRICT_DEVMEM=y -# CONFIG_IO_STRICT_DEVMEM is not set - -# -# arm64 Debugging -# -# CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_ARM64_RELOC_TEST is not set -# CONFIG_CORESIGHT is not set -# end of arm64 Debugging - -# -# Kernel Testing and Coverage -# -# CONFIG_KUNIT is not set -# CONFIG_NOTIFIER_ERROR_INJECTION is not set -# CONFIG_FAULT_INJECTION is not set -CONFIG_ARCH_HAS_KCOV=y -CONFIG_CC_HAS_SANCOV_TRACE_PC=y -# CONFIG_KCOV is not set -CONFIG_RUNTIME_TESTING_MENU=y -# CONFIG_LKDTM is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_TEST_MIN_HEAP is not set -# CONFIG_TEST_SORT is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_RBTREE_TEST is not set -# CONFIG_REED_SOLOMON_TEST is not set -# CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_PERCPU_TEST is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_TEST_HEXDUMP is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_STRSCPY is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_BITMAP is not set -# CONFIG_TEST_UUID is not set -# CONFIG_TEST_XARRAY is not set -# CONFIG_TEST_OVERFLOW is not set -# CONFIG_TEST_RHASHTABLE is not set -# CONFIG_TEST_HASH is not set -# CONFIG_TEST_IDA is not set -# CONFIG_TEST_LKM is not set -# CONFIG_TEST_BITOPS is not set -# CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set -# CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set -# CONFIG_FIND_BIT_BENCHMARK is not set -# CONFIG_TEST_FIRMWARE is not set -# CONFIG_TEST_SYSCTL is not set -# CONFIG_TEST_UDELAY is not set -# CONFIG_TEST_STATIC_KEYS is not set -# CONFIG_TEST_KMOD is not set -# CONFIG_TEST_MEMCAT_P is not set -# CONFIG_TEST_STACKINIT is not set -# CONFIG_TEST_MEMINIT is not set -# CONFIG_TEST_FREE_PAGES is not set -CONFIG_MEMTEST=y -# end of Kernel Testing and Coverage -# end of Kernel hacking diff --git a/sys-kernel/pinephone-sources/files/dracut-pp.conf b/sys-kernel/pinephone-sources/files/dracut-pp.conf deleted file mode 100644 index 97c37d8..0000000 --- a/sys-kernel/pinephone-sources/files/dracut-pp.conf +++ /dev/null @@ -1,10 +0,0 @@ -# load kernel modules that's needed to run accelarated osk SDL -force_drivers+=" lima gpu_sched goodix evdev sun6i_mipi_dsi sun8i-drm-hdmi sun8i-mixer panel-sitronix-st7703 " -# pmic -force_drivers+=" axp20x-pek axp20x_adc " -# force feedback -force_drivers+=" gpio-vibra " -# encryption module -force_drivers+=" crc-t10dif " -# emmc/sd driver -force_drivers+=" sunxi-mmc " diff --git a/sys-kernel/pinephone-sources/files/drm-lima-add-LIMA_BO_FLAG_FORCE_VA.patch b/sys-kernel/pinephone-sources/files/drm-lima-add-LIMA_BO_FLAG_FORCE_VA.patch deleted file mode 100644 index 4469192..0000000 --- a/sys-kernel/pinephone-sources/files/drm-lima-add-LIMA_BO_FLAG_FORCE_VA.patch +++ /dev/null @@ -1,280 +0,0 @@ -From patchwork Sat Feb 22 02:42:10 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Qiang Yu -X-Patchwork-Id: 11397805 -Return-Path: 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SMTP id - x28mr40685571pfq.157.1582339412254; - Fri, 21 Feb 2020 18:43:32 -0800 (PST) -Received: from localhost.localdomain ([103.219.195.110]) - by smtp.gmail.com with ESMTPSA id u13sm3797317pjn.29.2020.02.21.18.43.29 - (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); - Fri, 21 Feb 2020 18:43:31 -0800 (PST) -From: Qiang Yu -To: dri-devel@lists.freedesktop.org -Subject: [PATCH 5/5] drm/lima: add LIMA_BO_FLAG_FORCE_VA -Date: Sat, 22 Feb 2020 10:42:10 +0800 -Message-Id: <20200222024210.18697-6-yuq825@gmail.com> -X-Mailer: git-send-email 2.17.1 -In-Reply-To: <20200222024210.18697-1-yuq825@gmail.com> -References: <20200222024210.18697-1-yuq825@gmail.com> -X-BeenThere: dri-devel@lists.freedesktop.org -X-Mailman-Version: 2.1.29 -Precedence: list -List-Id: Direct Rendering Infrastructure - Development - -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Cc: lima@lists.freedesktop.org, David Airlie , - Vasily Khoruzhick , - Andreas Baierl , - Qiang Yu , Icenowy Zheng , - Erico Nunes -MIME-Version: 1.0 -Errors-To: dri-devel-bounces@lists.freedesktop.org -Sender: "dri-devel" - -User can force created buffer to be mapped to GPU VM at a user -specified address. This is used for debug tools in user space to -replay some task. - -Signed-off-by: Qiang Yu ---- - drivers/gpu/drm/lima/lima_drv.c | 26 +++++++++++++++++++------- - drivers/gpu/drm/lima/lima_gem.c | 7 +++++-- - drivers/gpu/drm/lima/lima_gem.h | 4 +++- - drivers/gpu/drm/lima/lima_vm.c | 13 ++++++++++++- - include/uapi/drm/lima_drm.h | 9 +++++++-- - 5 files changed, 46 insertions(+), 13 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index 8c5adc025902..f65021ea9598 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -73,16 +73,27 @@ static int lima_ioctl_gem_create(struct drm_device *dev, void *data, struct drm_ - { - struct drm_lima_gem_create *args = data; - -- if (args->pad) -- return -EINVAL; -- -- if (args->flags & ~(LIMA_BO_FLAG_HEAP)) -+ if (args->flags & ~(LIMA_BO_FLAG_HEAP | LIMA_BO_FLAG_FORCE_VA)) - return -EINVAL; - - if (args->size == 0) - return -EINVAL; - -- return lima_gem_create_handle(dev, file, args->size, args->flags, &args->handle); -+ if (args->flags & LIMA_BO_FLAG_FORCE_VA) { -+ u64 max = (u64)args->va + (u64)args->size; -+ -+ if (max > LIMA_VA_RESERVE_START) -+ return -EINVAL; -+ -+ if (!IS_ALIGNED(args->va, PAGE_SIZE)) -+ return -EINVAL; -+ } else { -+ if (args->va) -+ return -EINVAL; -+ } -+ -+ return lima_gem_create_handle(dev, file, args->size, args->flags, -+ &args->handle, args->va); - } - - static int lima_ioctl_gem_info(struct drm_device *dev, void *data, struct drm_file *file) -@@ -253,6 +264,7 @@ DEFINE_DRM_GEM_FOPS(lima_drm_driver_fops); - * Changelog: - * - * - 1.1.0 - add heap buffer support -+ * - 1.2.0 - add force va support - */ - - static struct drm_driver lima_drm_driver = { -@@ -264,9 +276,9 @@ static struct drm_driver lima_drm_driver = { - .fops = &lima_drm_driver_fops, - .name = "lima", - .desc = "lima DRM", -- .date = "20191231", -+ .date = "20200215", - .major = 1, -- .minor = 1, -+ .minor = 2, - .patchlevel = 0, - - .gem_create_object = lima_gem_create_object, -diff --git a/drivers/gpu/drm/lima/lima_gem.c b/drivers/gpu/drm/lima/lima_gem.c -index 5404e0d668db..c28d90756584 100644 ---- a/drivers/gpu/drm/lima/lima_gem.c -+++ b/drivers/gpu/drm/lima/lima_gem.c -@@ -95,7 +95,7 @@ int lima_heap_alloc(struct lima_bo *bo, struct lima_vm *vm) - } - - int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, -- u32 size, u32 flags, u32 *handle) -+ u32 size, u32 flags, u32 *handle, u32 va) - { - int err; - gfp_t mask; -@@ -116,8 +116,11 @@ int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, - mask |= __GFP_DMA32; - mapping_set_gfp_mask(obj->filp->f_mapping, mask); - -+ bo = to_lima_bo(obj); -+ bo->flags = flags; -+ bo->force_va = va; -+ - if (is_heap) { -- bo = to_lima_bo(obj); - err = lima_heap_alloc(bo, NULL); - if (err) - goto out; -diff --git a/drivers/gpu/drm/lima/lima_gem.h b/drivers/gpu/drm/lima/lima_gem.h -index ccea06142f4b..2a6db0c0be89 100644 ---- a/drivers/gpu/drm/lima/lima_gem.h -+++ b/drivers/gpu/drm/lima/lima_gem.h -@@ -15,6 +15,8 @@ struct lima_bo { - struct mutex lock; - struct list_head va; - -+ u32 flags; -+ u32 force_va; - size_t heap_size; - }; - -@@ -37,7 +39,7 @@ static inline struct dma_resv *lima_bo_resv(struct lima_bo *bo) - int lima_heap_alloc(struct lima_bo *bo, struct lima_vm *vm); - struct drm_gem_object *lima_gem_create_object(struct drm_device *dev, size_t size); - int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, -- u32 size, u32 flags, u32 *handle); -+ u32 size, u32 flags, u32 *handle, u32 va); - int lima_gem_get_info(struct drm_file *file, u32 handle, u32 *va, u64 *offset); - int lima_gem_submit(struct drm_file *file, struct lima_submit *submit); - int lima_gem_wait(struct drm_file *file, u32 handle, u32 op, s64 timeout_ns); -diff --git a/drivers/gpu/drm/lima/lima_vm.c b/drivers/gpu/drm/lima/lima_vm.c -index 5b92fb82674a..be0510032538 100644 ---- a/drivers/gpu/drm/lima/lima_vm.c -+++ b/drivers/gpu/drm/lima/lima_vm.c -@@ -3,6 +3,7 @@ - - #include - #include -+#include - - #include "lima_device.h" - #include "lima_vm.h" -@@ -93,6 +94,7 @@ int lima_vm_bo_add(struct lima_vm *vm, struct lima_bo *bo, bool create) - struct lima_bo_va *bo_va; - struct sg_dma_page_iter sg_iter; - int offset = 0, err; -+ u64 start, end; - - mutex_lock(&bo->lock); - -@@ -120,7 +122,16 @@ int lima_vm_bo_add(struct lima_vm *vm, struct lima_bo *bo, bool create) - - mutex_lock(&vm->lock); - -- err = drm_mm_insert_node(&vm->mm, &bo_va->node, lima_bo_size(bo)); -+ if (bo->flags & LIMA_BO_FLAG_FORCE_VA) { -+ start = bo->force_va; -+ end = start + lima_bo_size(bo); -+ } else { -+ start = 0; -+ end = U64_MAX; -+ } -+ -+ err = drm_mm_insert_node_in_range(&vm->mm, &bo_va->node, lima_bo_size(bo), -+ 0, 0, start, end, 0); - if (err) - goto err_out1; - -diff --git a/include/uapi/drm/lima_drm.h b/include/uapi/drm/lima_drm.h -index 1ec58d652a5a..3e699bb78394 100644 ---- a/include/uapi/drm/lima_drm.h -+++ b/include/uapi/drm/lima_drm.h -@@ -37,7 +37,12 @@ struct drm_lima_get_param { - * due to lack of heap memory. size field of heap buffer is an up bound of - * the backup memory which can be set to a fairly large value. - */ --#define LIMA_BO_FLAG_HEAP (1 << 0) -+#define LIMA_BO_FLAG_HEAP (1 << 0) -+/* -+ * force buffer GPU virtual address to be drm_lima_gem_create.va, this is -+ * used to replay some task with fixed GPU virtual address -+ */ -+#define LIMA_BO_FLAG_FORCE_VA (1 << 1) - - /** - * create a buffer for used by GPU -@@ -46,7 +51,7 @@ struct drm_lima_gem_create { - __u32 size; /* in, buffer size */ - __u32 flags; /* in, buffer flags */ - __u32 handle; /* out, GEM buffer handle */ -- __u32 pad; /* pad, must be zero */ -+ __u32 va; /* in, buffer va */ - }; - - /** diff --git a/sys-kernel/pinephone-sources/files/improve-pinephone-brightness.patch b/sys-kernel/pinephone-sources/files/improve-pinephone-brightness.patch deleted file mode 100644 index 3edaa35..0000000 --- a/sys-kernel/pinephone-sources/files/improve-pinephone-brightness.patch +++ /dev/null @@ -1,67 +0,0 @@ -From de578360d41d166ca75b0624e72c5b14f56c0bdf Mon Sep 17 00:00:00 2001 -From: Arnaud Ferraris -Date: Wed, 19 Aug 2020 13:10:02 +0200 -Subject: [PATCH] arm64: dts: sun50i-a64-pinephone: improve brightness values - on BH/CE - -Commit aad90c10 caused a brightness increase with the previous values. -Subsequently, the lowest brightness value would still be fairly bright. - -This commit aims at providing a wider range of usable brightness for -1.1+ devices. - -Signed-off-by: Arnaud Ferraris ---- - .../boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts | 10 +++++----- - .../boot/dts/allwinner/sun50i-a64-pinephone-1.2.dts | 13 ++++++------- - 2 files changed, 11 insertions(+), 12 deletions(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts -index 2f993ffc6..c8dcd2291 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts -@@ -34,11 +34,11 @@ &backlight { - * value here was chosen as a safe default. - */ - brightness-levels = < -- 774 793 814 842 -- 882 935 1003 1088 -- 1192 1316 1462 1633 -- 1830 2054 2309 2596 -- 2916 3271 3664 4096>; -+ 392 413 436 468 -+ 512 571 647 742 -+ 857 995 1159 1349 -+ 1568 1819 2103 2423 -+ 2779 3176 3614 4096>; - num-interpolated-steps = <50>; - default-brightness-level = <400>; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.2.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.2.dts -index 6c3019933..017104df2 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.2.dts -@@ -24,14 +24,13 @@ &backlight { - * chosen as a safe default. - */ - brightness-levels = < -- 5000 5248 5506 5858 6345 -- 6987 7805 8823 10062 11543 -- 13287 15317 17654 20319 23336 -- 26724 30505 34702 39335 44427 -- 50000 -- >; -+ 392 413 436 468 -+ 512 571 647 742 -+ 857 995 1159 1349 -+ 1568 1819 2103 2423 -+ 2779 3176 3614 4096>; - num-interpolated-steps = <50>; -- default-brightness-level = <500>; -+ default-brightness-level = <400>; - }; - - &lis3mdl { --- -2.28.0 - diff --git a/sys-kernel/pinephone-sources/files/linux-pinephone.install b/sys-kernel/pinephone-sources/files/linux-pinephone.install deleted file mode 100644 index a135c47..0000000 --- a/sys-kernel/pinephone-sources/files/linux-pinephone.install +++ /dev/null @@ -1,9 +0,0 @@ -post_upgrade() { - if findmnt --fstab -uno SOURCE /boot &>/dev/null && ! mountpoint -q /boot; then - echo "WARNING: /boot appears to be a separate partition but is not mounted." - fi -} - -post_remove() { - rm -f boot/initramfs-linux.img -} diff --git a/sys-kernel/pinephone-sources/files/media-ov5640-dont-break-when-firmware-for-autofocus-isnt-loaded.patch b/sys-kernel/pinephone-sources/files/media-ov5640-dont-break-when-firmware-for-autofocus-isnt-loaded.patch deleted file mode 100644 index 86a52c5..0000000 --- a/sys-kernel/pinephone-sources/files/media-ov5640-dont-break-when-firmware-for-autofocus-isnt-loaded.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- linux-pine64-5.9-da1a1dee4471aa5da391517c4af40d2c80fe828d/drivers/media/i2c/ov5640.c 2020-10-18 00:13:18.000000000 +0200 -+++ linux-pine64-5.9-da1a1dee4471aa5da391517c4af40d2c80fe828d/drivers/media/i2c/ov5640.c 2020-10-18 22:19:32.490533074 +0200 -@@ -2677,7 +2677,7 @@ static int ov5640_set_ctrl_focus(struct - if (ret) { - dev_err(&client->dev, "%s: no autofocus firmware loaded\n", - __func__); -- return ret; -+ return 0; - } - - if (command == OV5640_FW_CMD_RELEASE_FOCUS) { diff --git a/sys-kernel/pinephone-sources/files/megi-fix-mipi-dsi-panel-framerate.patch b/sys-kernel/pinephone-sources/files/megi-fix-mipi-dsi-panel-framerate.patch deleted file mode 100644 index 174b9d7..0000000 --- a/sys-kernel/pinephone-sources/files/megi-fix-mipi-dsi-panel-framerate.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 29533cb13f24e26e7ddbc044597a3020437352e2 Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Thu, 29 Oct 2020 01:13:49 +0100 -Subject: drm/sun4i: Fix mipi-dsi panel framerate being 2/3 of the expected - value - -This happens on Pinephone and on Pinetab. Both use MIPI-DSI panels. - -On Pinephone framerate is 36.6 instead of expected 55. -On Pinetab the similar 2/3 ratio holds. - -Myabe there's a bug in BSP and dclk_div should really be 6 instead of 4. - -Signed-off-by: Ondrej Jirman ---- - drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c -index ab06f5e1fc95..1c56b4fb9ac8 100644 ---- a/drivers/gpu/drm/sun4i/sun4i_tcon.c -+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c -@@ -398,8 +398,8 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon, - u32 block_space, start_delay; - u32 tcon_div; - -- tcon->dclk_min_div = SUN6I_DSI_TCON_DIV; -- tcon->dclk_max_div = SUN6I_DSI_TCON_DIV; -+ tcon->dclk_min_div = 6; -+ tcon->dclk_max_div = 6; - - sun4i_tcon0_mode_set_common(tcon, mode); - --- -cgit v1.2.3 - diff --git a/sys-kernel/pinephone-sources/files/megi-fix-xbd599-timings.patch b/sys-kernel/pinephone-sources/files/megi-fix-xbd599-timings.patch deleted file mode 100644 index d3ed377..0000000 --- a/sys-kernel/pinephone-sources/files/megi-fix-xbd599-timings.patch +++ /dev/null @@ -1,37 +0,0 @@ -From e8be2e4affb906af7137437ac62fb3912609c11e Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Thu, 29 Oct 2020 04:55:40 +0100 -Subject: drm: panel: st7703: Fix xbd599 timings to make refresh rate exactly - 60.006Hz - -Signed-off-by: Ondrej Jirman ---- - drivers/gpu/drm/panel/panel-sitronix-st7703.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c -index 4287aabb9007..070ef2baef6f 100644 ---- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c -+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c -@@ -334,14 +334,14 @@ static int xbd599_init_sequence(struct st7703 *ctx) - - static const struct drm_display_mode xbd599_mode = { - .hdisplay = 720, -- .hsync_start = 720 + 40, -- .hsync_end = 720 + 40 + 40, -- .htotal = 720 + 40 + 40 + 40, -+ .hsync_start = 720 + 30, -+ .hsync_end = 720 + 30 + 28, -+ .htotal = 720 + 30 + 28 + 30, - .vdisplay = 1440, - .vsync_start = 1440 + 18, - .vsync_end = 1440 + 18 + 10, - .vtotal = 1440 + 18 + 10 + 17, -- .clock = 69000, -+ .clock = 72000, - .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, - .width_mm = 68, - .height_mm = 136, --- -cgit v1.2.3 - diff --git a/sys-kernel/pinephone-sources/files/megi-recover-from-occasional-HW-failures.patch b/sys-kernel/pinephone-sources/files/megi-recover-from-occasional-HW-failures.patch deleted file mode 100644 index 5b0d14a..0000000 --- a/sys-kernel/pinephone-sources/files/megi-recover-from-occasional-HW-failures.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 8a0bf7456f10a06adeeed0690d181f67d887e18e Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Tue, 28 Jan 2020 00:26:17 +0100 -Subject: drm: sun4i-drm: Recover from occasional HW failures - -Layer can be disabled automatically by HW (HW clears the bit in -some unknown situations). We need to always update this bit, -so that DE2 will not fail. - -Signed-off-by: Ondrej Jirman ---- - drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 13 ++++++------- - drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 13 ++++++------- - 2 files changed, 12 insertions(+), 14 deletions(-) - -diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c -index f1c87695b4d7..e58482f6d7ba 100644 ---- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c -+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c -@@ -36,13 +36,12 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, - DRM_DEBUG_DRIVER("%sabling channel %d overlay %d\n", - enable ? "En" : "Dis", channel, overlay); - -- if (!was_enabled != !enable) { -- val = enable ? SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN : 0; -- -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), -- SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val); -- } -+ /* We always update the layer enable bit, because it can clear -+ * spontaneously for unknown reasons. */ -+ val = enable ? SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN : 0; -+ regmap_update_bits(mixer->engine.regs, -+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), -+ SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val); - - /* - * If this layer was enabled and is being disabled or if it is -diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c -index 81eda71c4fff..0c2ccc33d456 100644 ---- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c -+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c -@@ -30,13 +30,12 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, - DRM_DEBUG_DRIVER("%sabling VI channel %d overlay %d\n", - enable ? "En" : "Dis", channel, overlay); - -- if (!was_enabled != !enable) { -- val = enable ? SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN : 0; -- -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), -- SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val); -- } -+ /* We always update the layer enable bit, because it can clear -+ * spontaneously for unknown reasons. */ -+ val = enable ? SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN : 0; -+ regmap_update_bits(mixer->engine.regs, -+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), -+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val); - - /* - * If this layer was enabled and is being disabled or if it is --- -cgit v1.2.3 - diff --git a/sys-kernel/pinephone-sources/files/megi-switch-parent-of-MIPI-DSI.patch b/sys-kernel/pinephone-sources/files/megi-switch-parent-of-MIPI-DSI.patch deleted file mode 100644 index ec8af33..0000000 --- a/sys-kernel/pinephone-sources/files/megi-switch-parent-of-MIPI-DSI.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 2af59597979e0192cb4675c12e57ed2a857fe9ce Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Wed, 7 Oct 2020 02:11:35 +0200 -Subject: clk: sunxi-ng: sun50i-a64: Switch parent of MIPI-DSI to periph0(1x) - -This makes video0(1x) clock less constrained, and improves compatibility -with external monitors on Pinephone when using both internal display -and HDMI output at once. - -Signed-off-by: Ondrej Jirman -Modified by: Philip Müller ---- - drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 11 ++++++++++- - 1 file changed, 10 insertions(+), 1 deletion(-) - -diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c -index 8ac40a78e75e..e41eadc602e7 100644 ---- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c -+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c -@@ -969,6 +969,8 @@ static struct ccu_rate_reset_nb sun50i_a - .common = &pll_video0_clk.common, - }; - -+#define CCU_MIPI_DSI_CLK 0x168 -+ - static int sun50i_a64_ccu_probe(struct platform_device *pdev) - { - struct resource *res; -@@ -990,6 +992,12 @@ static int sun50i_a64_ccu_probe(struct p - writel(0x10040000, reg + SUN50I_A64_PLL_AUDIO_BIAS_REG); - - writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG); -+ -+ /* Set MIPI-DSI clock parent to periph0(1x), so that video0(1x) is free to change. */ -+ val = readl(reg + CCU_MIPI_DSI_CLK); -+ val &= 0x30f; -+ val |= (2 << 8) | ((4 - 1) << 0); /* M-1 */ -+ writel(val, reg + CCU_MIPI_DSI_CLK); - - /* Force the parent of TCON0 to PLL-MIPI */ - val = readl(reg + SUN50I_A64_TCON0_REG); --- -cgit v1.2.3 - diff --git a/sys-kernel/pinephone-sources/files/remove-v4l2-flash-pp.patch b/sys-kernel/pinephone-sources/files/remove-v4l2-flash-pp.patch deleted file mode 100644 index 5be8075..0000000 --- a/sys-kernel/pinephone-sources/files/remove-v4l2-flash-pp.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 5a3d7fd96843710d468603412a3270e7eefe997a Mon Sep 17 00:00:00 2001 -From: Danct12 -Date: Wed, 14 Oct 2020 01:18:40 +0700 -Subject: [PATCH] arm64: dts: pinephone: remove flash node for ov5640 - -Signed-off-by: Danct12 ---- - arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi -index 3781eb8ea..6bc0e9d6d 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi -@@ -439,8 +439,6 @@ ov5640: rear-camera@4c { - reset-gpios = <&pio 3 3 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; /* PD3 */ - powerdown-gpios = <&pio 2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; /* PC0 */ - -- flash-leds = <&sgm3140_flash>; -- - port { - ov5640_ep: endpoint { - remote-endpoint = <&csi_ov5640_ep>; --- -2.28.0 - diff --git a/sys-kernel/pinephone-sources/files/usb-musb-avoid-the-hang-in-musb_pm_runtime_check_ses.patch b/sys-kernel/pinephone-sources/files/usb-musb-avoid-the-hang-in-musb_pm_runtime_check_ses.patch deleted file mode 100644 index 0c2e361..0000000 --- a/sys-kernel/pinephone-sources/files/usb-musb-avoid-the-hang-in-musb_pm_runtime_check_ses.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 3ed430f6b94479c7b4d26323b5fe6381ca11c0e4 Mon Sep 17 00:00:00 2001 -From: Tony Lindgren -Date: Tue, 27 Oct 2020 13:18:57 +0530 -Subject: [PATCH] usb: musb: avoid the hang in musb_pm_runtime_check_session - -See thread at: https://lore.kernel.org/linux-usb/20201027045519.GA947883@aquila.localdomain/ ---- - drivers/usb/musb/musb_core.c | 11 +++++++---- - 1 file changed, 7 insertions(+), 4 deletions(-) - -diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c -index 384a8039a7fd5..fe87046d8b28a 100644 ---- a/drivers/usb/musb/musb_core.c -+++ b/drivers/usb/musb/musb_core.c -@@ -2005,10 +2005,13 @@ static void musb_pm_runtime_check_session(struct musb *musb) - MUSB_DEVCTL_HR; - switch (devctl & ~s) { - case MUSB_QUIRK_B_DISCONNECT_99: -- musb_dbg(musb, "Poll devctl in case of suspend after disconnect\n"); -- schedule_delayed_work(&musb->irq_work, -- msecs_to_jiffies(1000)); -- break; -+ if (musb->quirk_retries && !musb->flush_irq_work) { -+ musb_dbg(musb, "Poll devctl in case of suspend after disconnect\n"); -+ schedule_delayed_work(&musb->irq_work, -+ msecs_to_jiffies(1000)); -+ musb->quirk_retries--; -+ break; -+ } - case MUSB_QUIRK_B_INVALID_VBUS_91: - if (musb->quirk_retries && !musb->flush_irq_work) { - musb_dbg(musb, --- -2.29.1 - diff --git a/sys-kernel/pinephone-sources/files/wifi-power-saving.patch b/sys-kernel/pinephone-sources/files/wifi-power-saving.patch deleted file mode 100644 index e58a2af..0000000 --- a/sys-kernel/pinephone-sources/files/wifi-power-saving.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 62b516401f008d166b93ad2ea6f3012989b0cccb Mon Sep 17 00:00:00 2001 -From: Dalton -Date: Tue, 23 Jun 2020 20:54:12 -0500 -Subject: [PATCH] UBPORTS SAUCE: Disable 8723cs power saving - -The runtime power management features in the 8723cs firmware on the -PinePhone don't seem to work correctly. While we expect the chipset to -leave a low power state when it's time to send or receive data, instead -we get a delay of 10-20 seconds before any packets are sent. ---- - drivers/staging/rtl8723cs-new/os_dep/linux/os_intfs.c | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - -diff --git a/drivers/staging/rtl8723cs-new/os_dep/linux/os_intfs.c b/drivers/staging/rtl8723cs-new/os_dep/linux/os_intfs.c -index 3e6ba0a0fd17..5bb850a4caf0 100644 ---- a/drivers/staging/rtl8723cs-new/os_dep/linux/os_intfs.c -+++ b/drivers/staging/rtl8723cs-new/os_dep/linux/os_intfs.c -@@ -54,7 +54,12 @@ int rtw_adhoc_tx_pwr = 1; - int rtw_soft_ap = 0; - /* int smart_ps = 1; */ - #ifdef CONFIG_POWER_SAVING -- int rtw_power_mgnt = PS_MODE_MAX; -+ // Setting PS_MODE_ACTIVE by default keeps the power saving code in the -+ // driver but works around an issue where the 8723cs won't leave Leisure -+ // Power Saving mode without long delays. Allows for testing different -+ // firmwares. -+ // int rtw_power_mgnt = PS_MODE_MAX; -+ int rtw_power_mgnt = PS_MODE_ACTIVE; - #ifdef CONFIG_IPS_LEVEL_2 - int rtw_ips_mode = IPS_LEVEL_2; - #else --- -GitLab - diff --git a/sys-kernel/pinephone-sources/pinephone-sources-5.11.6.ebuild b/sys-kernel/pinephone-sources/pinephone-sources-5.11.6.ebuild index 2714334..c8d0fef 100755 --- a/sys-kernel/pinephone-sources/pinephone-sources-5.11.6.ebuild +++ b/sys-kernel/pinephone-sources/pinephone-sources-5.11.6.ebuild @@ -17,18 +17,23 @@ MEGI_PATCH_URI="https://xff.cz/kernels/${PV:0:4}/patches/all.patch" SRC_URI="${KERNEL_URI} ${MEGI_PATCH_URI} -> all-${PV}.patch" PATCHES=( - ${DISTDIR}/all-${PV}.patch + ${DISTDIR}/all-${PV}.patch ${FILESDIR}/panic-led.patch ${FILESDIR}/enable-hdmi-output-pinetab.patch ${FILESDIR}/improve-brightness.patch ${FILESDIR}/enable-jack-detection-pinetab.patch ${FILESDIR}/pinetab-bluetooth.patch ${FILESDIR}/pinetab-accelerometer.patch - ${FILESDIR}/camera-autofocus.patch - ${FILESDIR}/media-ov5640-dont-break-when-firmware-for-autofocus-isnt-loaded.patch ${FILESDIR}/dts-pinephone-drop-modem-power-node.patch ${FILESDIR}/dts-headphone-jack-detection.patch + ${FILESDIR}/media-ov5640-Implement-autofocus.patch + ${FILESDIR}/0011-dts-pinetab-hardcode-mmc-numbers.patch + ${FILESDIR}/0002-dts-add-pinetab-dev-old-display-panel.patch + ${FILESDIR}/0001-arm64-dts-allwinner-pinephone-stop-LEDs-on-suspend.patch + ${FILESDIR}/0010-dts-pinephone-Add-pine64-pinephone-to-compat-list.patch + ${FILESDIR}/0012-pinephone-fix-pogopin-i2c.patch ${FILESDIR}/0107-quirk-kernel-org-bug-210681-firmware_rome_error.patch + ) src_prepare() {